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authorScott Sweeny <scott.sweeny@timesys.com>2009-04-29 11:19:44 -0400
committerScott Sweeny <scott.sweeny@timesys.com>2009-04-29 11:19:44 -0400
commit1f6422345c3594647eb16e33194be62906dbdc22 (patch)
treea1b5a9cb51216df1b6ccdd434bfef6788627ed28
parente6b6d16de73de6a76e2ec4338291e828b860f040 (diff)
Add support for OMAP3430 Labrador
This patch originally from LogicPD OMAP35x Release 1.5.0 Original Patch Name: u-boot-1.1.4-omap3430-labrador.patch
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-rw-r--r--include/405_mal.h10
-rw-r--r--include/asm-arm/arch-arm1136/clocks.h97
-rw-r--r--include/asm-arm/arch-arm1136/clocks242x.h147
-rw-r--r--include/asm-arm/arch-arm1136/clocks243x.h223
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-rw-r--r--include/asm-arm/arch-arm1136/omap2420.h166
-rw-r--r--include/asm-arm/arch-arm1136/omap2430.h138
-rw-r--r--include/asm-arm/arch-arm1136/rev.h59
-rw-r--r--include/asm-arm/arch-arm1136/sys_info.h65
-rw-r--r--include/asm-arm/arch-arm720t/s3c4510b.h2
-rw-r--r--include/asm-arm/arch-ixp/ixp425.h56
-rw-r--r--include/asm-arm/arch-omap/sizes.h52
-rw-r--r--include/asm-arm/arch-omap3/bits.h48
-rw-r--r--include/asm-arm/arch-omap3/clocks.h35
-rw-r--r--include/asm-arm/arch-omap3/clocks343x.h155
-rw-r--r--include/asm-arm/arch-omap3/cpu.h247
-rw-r--r--include/asm-arm/arch-omap3/i2c.h131
-rw-r--r--include/asm-arm/arch-omap3/mem.h434
-rw-r--r--include/asm-arm/arch-omap3/mux.h437
-rw-r--r--include/asm-arm/arch-omap3/omap3430.h132
-rw-r--r--include/asm-arm/arch-omap3/rev.h43
-rw-r--r--include/asm-arm/arch-omap3/sizes.h49
-rw-r--r--include/asm-arm/arch-omap3/sys_info.h77
-rw-r--r--include/asm-arm/arch-omap3/sys_proto.h59
-rw-r--r--include/asm-arm/arch-pxa/hardware.h4
-rw-r--r--include/asm-arm/arch-pxa/pxa-regs.h718
-rw-r--r--include/asm-arm/io.h8
-rw-r--r--include/asm-arm/mach-types.h27
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-rw-r--r--include/asm-blackfin/bitops.h380
-rw-r--r--include/asm-blackfin/blackfin.h46
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-rw-r--r--include/asm-blackfin/cplbtab.h572
-rw-r--r--include/asm-blackfin/cpu/bf533_irq.h137
-rw-r--r--include/asm-blackfin/cpu/bf533_rtc.h46
-rw-r--r--include/asm-blackfin/cpu/bf533_serial.h79
-rw-r--r--include/asm-blackfin/cpu/cdefBF531.h24
-rw-r--r--include/asm-blackfin/cpu/cdefBF532.h398
-rw-r--r--include/asm-blackfin/cpu/cdefBF533.h24
-rw-r--r--include/asm-blackfin/cpu/cdefBF53x.h32
-rw-r--r--include/asm-blackfin/cpu/cdef_LPBlackfin.h185
-rw-r--r--include/asm-blackfin/cpu/defBF531.h24
-rw-r--r--include/asm-blackfin/cpu/defBF532.h1159
-rw-r--r--include/asm-blackfin/cpu/defBF533.h24
-rw-r--r--include/asm-blackfin/cpu/defBF533_extn.h76
-rw-r--r--include/asm-blackfin/cpu/def_LPBlackfin.h445
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-rw-r--r--include/asm-blackfin/entry.h385
-rw-r--r--include/asm-blackfin/errno.h156
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-rw-r--r--include/asm-blackfin/io-kernel.h135
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-rw-r--r--include/asm-blackfin/irq.h142
-rw-r--r--include/asm-blackfin/linkage.h60
-rw-r--r--include/asm-blackfin/machdep.h89
-rw-r--r--include/asm-blackfin/mem_init.h287
-rw-r--r--include/asm-blackfin/page.h128
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-rw-r--r--include/asm-blackfin/posix_types.h90
-rw-r--r--include/asm-blackfin/processor.h174
-rw-r--r--include/asm-blackfin/ptrace.h269
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-rw-r--r--include/asm-blackfin/shared_resources.h33
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-rw-r--r--include/asm-blackfin/system.h182
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-rw-r--r--include/asm-blackfin/types.h83
-rw-r--r--include/asm-blackfin/u-boot.h47
-rw-r--r--include/asm-blackfin/uaccess.h207
-rw-r--r--include/asm-blackfin/virtconvert.h47
-rw-r--r--include/asm-m68k/immap_5271.h98
-rw-r--r--include/asm-m68k/immap_5282.h82
-rw-r--r--include/asm-m68k/m5271.h114
-rw-r--r--include/asm-m68k/m5282.h529
-rw-r--r--include/asm-m68k/mcftimer.h2
-rw-r--r--include/asm-m68k/mcfuart.h2
-rw-r--r--include/asm-m68k/ptrace.h2
-rw-r--r--include/asm-mips/au1x00.h5
-rw-r--r--include/asm-nios2/io.h7
-rw-r--r--include/asm-ppc/i2c.h2
-rw-r--r--include/asm-ppc/immap_83xx.h143
-rw-r--r--include/asm-ppc/iopin_85xx.h146
-rw-r--r--include/asm-ppc/mmu.h41
-rw-r--r--include/asm-ppc/mpc8349_pci.h1
-rw-r--r--include/asm-ppc/processor.h4
-rw-r--r--include/bmp_logo.h1948
-rw-r--r--include/cmd_confdefs.h3
-rw-r--r--include/common.h12
-rw-r--r--include/commproc.h13
-rw-r--r--include/configs/ASH405.h3
-rw-r--r--include/configs/Adder.h33
-rw-r--r--include/configs/BC3450.h568
-rw-r--r--include/configs/BMW.h4
-rw-r--r--include/configs/CATcenter.h19
-rw-r--r--include/configs/CMS700.h2
-rw-r--r--include/configs/CPCI2DP.h10
-rw-r--r--include/configs/CPCI405.h6
-rw-r--r--include/configs/CPCI4052.h6
-rw-r--r--include/configs/CPCI405AB.h7
-rw-r--r--include/configs/CPCI405DT.h6
-rw-r--r--include/configs/CPCI750.h232
-rw-r--r--include/configs/CPU87.h26
-rw-r--r--include/configs/EB+MCF-EV123.h223
-rw-r--r--include/configs/EP1C20.h199
-rw-r--r--include/configs/EP1S10.h193
-rw-r--r--include/configs/EP1S40.h193
-rw-r--r--include/configs/EP88x.h205
-rw-r--r--include/configs/GEN860T.h2
-rw-r--r--include/configs/HH405.h17
-rw-r--r--include/configs/HUB405.h2
-rw-r--r--include/configs/IDS8247.h1
-rw-r--r--include/configs/ISPAN.h1
-rw-r--r--include/configs/IceCube.h57
-rw-r--r--include/configs/M5271EVB.h156
-rw-r--r--include/configs/MIP405.h3
-rw-r--r--include/configs/MPC8349ADS.h584
-rw-r--r--include/configs/MPC8349EMDS.h716
-rw-r--r--include/configs/MPC86xADS.h7
-rw-r--r--include/configs/MPC885ADS.h28
-rw-r--r--include/configs/NC650.h68
-rw-r--r--include/configs/NETPHONE.h1
-rw-r--r--include/configs/NETTA.h1
-rw-r--r--include/configs/NETTA2.h1
-rw-r--r--include/configs/NETVIA.h2
-rw-r--r--include/configs/PCIPPC2.h1
-rw-r--r--include/configs/PCIPPC6.h1
-rw-r--r--include/configs/PIP405.h3
-rw-r--r--include/configs/PK1C20.h20
-rw-r--r--include/configs/PLU405.h2
-rw-r--r--include/configs/PM520.h22
-rw-r--r--include/configs/PM826.h2
-rw-r--r--include/configs/PM828.h1
-rw-r--r--include/configs/PMC405.h42
-rw-r--r--include/configs/PPChameleonEVB.h67
-rw-r--r--include/configs/RPXlite.h68
-rw-r--r--include/configs/RPXlite_DW.h51
-rw-r--r--include/configs/RPXsuper.h1
-rw-r--r--include/configs/Rattler.h1
-rw-r--r--include/configs/SXNI855T.h1
-rw-r--r--include/configs/TB5200.h507
-rw-r--r--include/configs/TQM5200.h198
-rw-r--r--include/configs/TQM834x.h47
-rw-r--r--include/configs/TQM85xx.h11
-rw-r--r--include/configs/TQM885D.h492
-rw-r--r--include/configs/VCMA9.h1
-rw-r--r--include/configs/VOH405.h2
-rw-r--r--include/configs/WUH405.h2
-rw-r--r--include/configs/ZPC1900.h69
-rw-r--r--include/configs/aev.h5
-rw-r--r--include/configs/bamboo.h17
-rw-r--r--include/configs/cmc_pu2.h11
-rw-r--r--include/configs/dbau1x00.h7
-rw-r--r--include/configs/delta.h242
-rw-r--r--include/configs/ezkit533.h188
-rw-r--r--include/configs/gth2.h195
-rw-r--r--include/configs/gw8260.h1
-rw-r--r--include/configs/inka4x0.h30
-rw-r--r--include/configs/ixdp425.h32
-rw-r--r--include/configs/ixdpg425.h240
-rw-r--r--include/configs/kvme080.h262
-rw-r--r--include/configs/mcc200.h333
-rw-r--r--include/configs/netstar.h265
-rw-r--r--include/configs/omap1710h3.h236
-rw-r--r--include/configs/omap2420h4.h144
-rw-r--r--include/configs/omap2420h4.h.contrib277
-rw-r--r--include/configs/omap2420h4.h.keep301
-rw-r--r--include/configs/omap2430sdp.h305
-rw-r--r--include/configs/omap3430labrador.h309
-rw-r--r--include/configs/omap3430sdp.h331
-rw-r--r--include/configs/omap5912osk.h36
-rw-r--r--include/configs/omaptest2430.h304
-rw-r--r--include/configs/omapv1030gsample.h181
-rw-r--r--include/configs/p3p440.h13
-rw-r--r--include/configs/pcs440ep.h412
-rw-r--r--include/configs/pdnb3.h307
-rw-r--r--include/configs/ppmc7xx.h419
-rw-r--r--include/configs/ppmc8260.h1
-rw-r--r--include/configs/r5200.h169
-rw-r--r--include/configs/sacsng.h2
-rw-r--r--include/configs/sbc2410x.h239
-rw-r--r--include/configs/sbc8260.h2
-rw-r--r--include/configs/smmaco4.h373
-rw-r--r--include/configs/spc1920.h362
-rw-r--r--include/configs/spieval.h31
-rw-r--r--include/configs/stamp.h333
-rw-r--r--include/configs/stxxtc.h3
-rw-r--r--include/configs/svm_sc8xx.h1
-rw-r--r--include/configs/trab.h8
-rw-r--r--include/configs/utx8245.h1
-rw-r--r--include/configs/virtlab2.h461
-rw-r--r--include/configs/voiceblue.h56
-rw-r--r--include/configs/xm250.h6
-rw-r--r--include/configs/yellowstone.h4
-rw-r--r--include/configs/yosemite.h6
-rw-r--r--include/configs/yucca.h526
-rw-r--r--include/configs/zylonite.h228
-rw-r--r--include/crc.h100
-rw-r--r--include/da9030.h106
-rw-r--r--include/environment.h14
-rw-r--r--include/flash.h12
-rw-r--r--include/ft_build.h4
-rw-r--r--include/galileo/core.h3
-rw-r--r--include/image.h1
-rw-r--r--include/linux/mtd/bbm.h124
-rw-r--r--include/linux/mtd/compat.h44
-rw-r--r--include/linux/mtd/doc2000.h65
-rw-r--r--include/linux/mtd/mtd-abi.h99
-rw-r--r--include/linux/mtd/mtd.h214
-rw-r--r--include/linux/mtd/nand.h511
-rw-r--r--include/linux/mtd/nand_ecc.h30
-rw-r--r--include/linux/mtd/nand_ids.h6
-rw-r--r--include/linux/mtd/nand_legacy.h204
-rw-r--r--include/linux/mtd/onenand.h143
-rw-r--r--include/linux/mtd/onenand_regs.h180
-rw-r--r--include/linux/stat.h2
-rw-r--r--include/linux/string.h2
-rw-r--r--include/mpc5xxx.h1
-rw-r--r--include/mpc85xx.h35
-rw-r--r--include/nand.h63
-rw-r--r--include/nios2-epcs.h5
-rw-r--r--include/ns16550.h47
-rw-r--r--include/onenand_uboot.h117
-rw-r--r--include/pci.h8
-rw-r--r--include/pci_ids.h1
-rw-r--r--include/pcmcia.h10
-rw-r--r--include/ppc440.h1432
-rw-r--r--include/ppc4xx_enet.h26
-rw-r--r--include/s3c2400.h34
-rw-r--r--include/serial.h2
-rw-r--r--include/spd_sdram.h2
-rw-r--r--include/usb.h1
-rw-r--r--include/version.h4
-rw-r--r--include/xyzModem.h117
-rw-r--r--lib_arm/Makefile2
-rw-r--r--lib_arm/_ashldi3.S46
-rw-r--r--lib_arm/_ashrdi3.S46
-rw-r--r--lib_arm/_divsi3.S140
-rw-r--r--lib_arm/_modsi3.S99
-rw-r--r--lib_arm/armlinux.c8
-rw-r--r--lib_arm/board.c114
-rw-r--r--lib_arm/cache.c6
-rw-r--r--lib_blackfin/Makefile47
-rw-r--r--lib_blackfin/bf533_linux.c91
-rw-r--r--lib_blackfin/bf533_string.c185
-rw-r--r--lib_blackfin/blackfin_board.h62
-rw-r--r--lib_blackfin/board.c279
-rw-r--r--lib_blackfin/cache.c40
-rw-r--r--lib_blackfin/muldi3.c92
-rw-r--r--lib_generic/string.c2
-rw-r--r--lib_i386/bios_setup.c3
-rw-r--r--lib_i386/board.c8
-rw-r--r--lib_i386/i386_linux.c6
-rw-r--r--lib_m68k/board.c22
-rw-r--r--lib_m68k/m68k_linux.c4
-rw-r--r--lib_m68k/time.c9
-rw-r--r--lib_microblaze/board.c4
-rw-r--r--lib_mips/mips_linux.c4
-rw-r--r--lib_nios/board.c3
-rw-r--r--lib_nios2/board.c13
-rw-r--r--lib_ppc/board.c18
-rwxr-xr-xmkconfig6
-rw-r--r--net/bootp.c34
-rw-r--r--net/eth.c4
-rw-r--r--net/net.c11
-rw-r--r--nios2_config.mk2
-rw-r--r--post/ether.c3
-rw-r--r--post/memory.c3
-rw-r--r--post/post.c10
-rw-r--r--post/sysmon.c6
-rw-r--r--post/uart.c6
-rw-r--r--rtc/Makefile4
-rw-r--r--rtc/bf533_rtc.c145
-rw-r--r--rtc/ds1306.c12
-rw-r--r--rtc/ds1374.c253
-rw-r--r--rtc/rs5c372.c4
-rw-r--r--tools/env/fw_env.c6
-rw-r--r--tools/envcrc.c2
-rw-r--r--tools/mkimage.c16
-rw-r--r--tools/setlocalversion22
2974 files changed, 137545 insertions, 534371 deletions
diff --git a/CHANGELOG b/CHANGELOG
index 015932e74d..e39b1e7510 100644
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -1,4 +1,916 @@
======================================================================
+Changes since U-Boot 1.1.4:
+======================================================================
+
+* Prevent USB commands from working when USB is stopped.
+
+* Add rudimentary handling of alternate settings of USB interfaces.
+ This is in order to fix issues with some USB sticks timing out
+ during initialization. Some code readability improvements.
+
+* PPC440 DDR setup: Set SDRAM0_CFG0[PMU]=0 for best performance
+ AMCC suggested to set the PMU bit to 0 for best performace on
+ the PPC440 DDR controller.
+ Please see doc/README.440-DDR-performance for details.
+ Patch by Stefan Roese, 28 Jul 2006
+
+* AMCC bamboo (440EP) U-Boot image reduced to 384kbyte
+ Please see doc/README.bamboo for details.
+ Patch by Stefan Roese, 27 Jul 2006
+
+* Fix CONFIG_CMDLINE_EDITING implementation
+ Patch by Stefan Roese, 27 Jul 2006
+
+* Fix preboot message on TQM5200 after switching to hush parser.
+
+* MCC200: set default configuration to low_boot DDR,
+ and support for configurable options high_boot and/or SDRAM.
+
+* Add support for 256 MB SDRAM on CPU87
+ Patch by Josef Wagner, 25 Nov 2005
+
+* Add configuration for cam5200 board (based on TQM5200S).
+
+* More code cleanup
+
+* Disabled kvme080 board in MAKEALL because of build problems.
+
+* Code cleanup
+
+* Update NetStar board
+ Patch by Ladislav Michl, 03 Nov 2005
+
+* Make code better readable.
+ Patch by Ladislav Michl, 14 Sep 2005
+
+* Enable initrd ATAG for xm250 board.
+ Patch by Josef Wagner, 05 Sep 2005
+
+* Add readline cmdline-editing extension
+ Patch by JinHua Luo, 01 Sep 2005
+
+* Add support for friendly-arm SBC-2410X board
+ Patch by JinHua Luo, 01 Sep 2005
+
+* Fix multi-part image support on i386 platform.
+ Patch by David Updegraff, 19 Aug 2005
+
+* Add support for KVME080 board
+ Patch by Sangmoon Kim, 18 Aug 2005
+
+* Fix MIPS LE build problem
+ Patch by Matej Kupljen, 10 Aug 2005
+
+* Check argument count in "mii" command.
+ Problem pointed out by Andrew Dyer, 13 Jun 2005
+
+* Cleanup TQM5200 board configurations:
+ - make highboot configurations use environment at high end, too,
+ to avoid flash fragmentation
+ - always use redundand environment
+ - don't enable video code for modules without graphics controller
+ - provide useful (though different) mtdparts settings
+ - get rid of CONFIG_CS_AUTOCONF which was always set anyway
+
+* Extend mkconfig tool to print more useful target name
+
+* Add support for high-boot on TQM5200 and TQM5200S boards.
+ Hint: the CPLD on the TQM5200 must be programmed with a software
+ version supporting the high boot option! The new TQM5200S is
+ already supporting this option. On the TQM5200 this option will be
+ supported in configurations with MPC5200 rev B processors.
+ To actually "high boot", set jumper X30 on the STK52xx.
+ Patch by Martin Krause, 12 Jul 2006
+
+* Add support for new TQM5200 revisions
+ - Support for TQM5200S (short version without graphic controller)
+ - Support for modules with 'N' type S29GL128N Spansion flashes
+ (requires changes to flash layout)
+ - Support for MPC5200B cpu (mostly support for second SDRAM bank)
+ Patch by Martin Krause, 07 Jul 2006
+
+* Fix support for PS/2 keyboard on TQM85xx boards
+ The PS/2 keyobard driver for the TQM85xx modules only supports the
+ internal DUART of the MPC85xx CPU. Since the MPC8560 doesn't
+ include a DUART, the TQM8560 modules can't be used with the PS/2
+ keyboard controller on the STK85xx board.
+ The PS/2 keyboard driver should work with the modules TQM8540,
+ TQM8541 and TQM8555, but it only has been tested on a TQM8540, yet.
+ Make sure the PS/2 controller on the STK85xx is programmed. Jumper
+ settings: X66 1-2, 9-10; X61 2-3
+ Patch by Martin Krause, 21 Jun 2006
+
+* Adjust RTC century handling on STK52xx board to match Linux driver.
+ Patch by Martin Krause, 12 Jun 2006
+
+* Adjust filenames for USB update images on TRAB board.
+ During an automatic update via USB stick, U-Boot searches for
+ images with the name "firmware.img" and "kernel.img". This names
+ are now changed to "firmw_01.img" and "kernl_01.img". This is done,
+ to prevent updates of new boards (with the new macronics "c" step
+ flashes) with old, incompatible firmware or kernel versions.
+ Patch by Martin Krause, 21 Jun 2006
+
+* Bugfix in VFD routine on TRAB board.
+ Make sure upper lext pixel can be set to blue, too
+ (so far only red was possible).
+ Patch by Martin Krause, 15 Feb 2006
+
+* Enable buffered flash writes for TB5200 board.
+
+* Fix some bugs in TRAB board flash driver.
+ - increase CFG_FLASH_ERASE_TOUT from 2 to 15 seconds
+ - use CFG_FLASH_WRITE_TOUT for programming instead of CFG_FLASH_ERASE_TOUT
+ - remove "Unlock Bypass" mode, because macronix flashes do not support
+ this mode officially
+ - fix flash reset command from 0x00FF to 0x00F0. 0x00FF is only specified
+ for Intel compatible flashes, not for AMD compatible.
+ Patch by Martin Krause, 15 Feb 2006
+
+* Add additional error messages to flash driver on TRAB board
+ (for erase errors and timeout errors)
+ Patch by Martin Krause, 14 Feb 2006
+
+* Add support for TB5200 board
+ The TB5200 ("Tinybox") is a small baseboard for the TQM5200 module
+ integrated in a little aluminium case.
+ Patch by Martin Krause, 8 Jun 2006
+
+* Enable buffered flash writes for TQM5200 board.
+
+* Fix problems with SanDisk Corporation Cruzer Micro USB memory stick.
+
+* Add support for TQM885D board.
+ Patch by Martin Krause, 20 Mar 2006
+
+* Fix FEC initialisation: All MII configuration is done via FEC1
+ registers, but MII_SPEED was configured according to FEC used. So
+ if only FEC2 was used, this caused the real MII_SPEED register in
+ FEC1 to stay uninitalised, leqading to "mii_send STUCK!" messages.
+ Fix: always configure MII_SPEED on FEC1 only.
+ Patch by Markus Klotzbuecher, 12 Jul 2006
+
+* Add support for SPC1920 board.
+ Patch by Markus Klotzbuecher, 12 Jul 2006
+
+* MCC200 board: support console on any one of the Quad UART ports.
+
+* Fix error in flash protection calculation on MCC200 board.
+
+* Major PCMCIA Cleanup to make code better readable and maintainable.
+ Notes:
+ - Board-dependend code for RPXLITE and RPXCLASSIC-based boards
+ placed to the drivers/rpx_pmcia.c file to avoid duplication.
+ Same for TQM8xx-based boards (drivers/tqm8xx_pmcia.c).
+ - drivers/i82365.c has been split into two parts located at
+ board/atc/ti113x.c and board/cpc45/pd67290.c (ATC and CPC45 are
+ the only boards using CONFIG_82365).
+ - Changes were tested for clean build and *very* *few* boards.
+
+* Fix timer problems on AMCC yucca board.
+ Set Timer Clock Select to use CPU clock as a timer input source.
+
+* Bring yucca config more in line with other AMCC boards.
+
+* Add AMCC bamboo board to MAKEALL build script.
+
+* Fix AMCC bamboo eval board compilation errors.
+
+* Add system memory to the PCI region list for AMCC PPC44x CPUs.
+ Enabled it for Yucca board.
+
+* Cleanup config file and bootup output for Yucca board.
+
+* Fix CONFIG_440_GX define usage.
+
+* Remove autogenerated bmp_logo.h file.
+
+* Add support for AMCC 440SPe CPU based eval board (Yucca).
+
+* Call serial_initialize() before first debug() is used.
+
+* Cleanup trab board for GCC-4.x
+
+* VoiceBlue update: use new MTD flash partitioning methods, use more
+ reasonable TEXT_BASE, update default environment and enable keyed
+ autoboot.
+ Patch by Ladislav Michl, 16. Aug 2005
+
+* Add forgotten changes for the PLEB 2 Board.
+ Patch by David Snowdon, 13. Aug 2005
+
+* Add support for wrPPMC7xx/74xx boards
+ Patch by Richard Danter, 12 Aug 2005
+
+* Add support for gth2 board
+ Patch by Thomas Lange, Aug 11 2005
+
+* Add support for CONFIG_SERIAL_MULTI on MPC5xxx
+ Patch by Martin Krause, 8 Jun 2006
+
+ This patch supports two serial consoles on boards with
+ a MPC5xxx CPU. The console can be switched at runtime
+ by setting stdin, stdout and stderr to the desired serial
+ interface (serial0 or serial1). The PSCs to be used as
+ console port are definded by CONFIG_PSC_CONSOLE
+ and CONFIG_PSC_CONSOLE2.
+ See README.serial_multi for details.
+
+* Bugfix in I2C initialisation on S3C2400.
+ If the bus is blocked because of a previously interrupted
+ transfer, up to eleven clocks are generated on the I2CSCL
+ line to complete the transfer and to free the bus.
+ With this fix pin I2CSCL (PG6) is really configured as GPIO
+ so the clock pulses are really generated.
+ Patch by Martin Krause, 04 Apr 2006
+
+* Fix DDR6 errata on TQM834x boards
+ Patch by Thomas Waehner, 07 Mar 2006
+
+* Remove obsolete flash driver board/tqm5200/flash.c
+ Patch by Martin Krause, 11 Jan 2006
+
+* Update configuration for CMC-PU2 board
+ Patch by Martin Krause, 17 Nov 2005
+
+* Add support for PS/2 keyboard on TQM85xx board
+ Patch by Martin Krause, 07 Nov 2005
+
+ Tested on a STK85XX baseboard. Make sure the PS/2 controller
+ has been programmed. Jumper Settings: X66 1-2, 9-10; X61 2-3
+
+* Fix TRAB channel switching delay for trab_fkt.bin standalone applikation
+ In tsc2000_read_channel() the delay after setting the multiplexer
+ to a temperature channel is increased from 1,5 ms to 10 ms. This
+ is to allow the multiplexer inputs to stabilize after huge steps
+ of the input signal level.
+ Patch by Martin Krause, 08 Nov 2005
+
+* Adjust TQM5200 make targets
+ Make the automatic CS configuration the default.
+ The dedicated configurations CONFIG_TQM5200_AA, CONFIG_TQM5200_AB
+ and CONFIG_TQM5200_AC are removed.
+ "TQM5200_config" is now the default for STK52XX.200 base boards.
+ On a STK52XX.100 base board "TQM5200_STK100_config" must be used.
+ Patch by Martin Krause, 07 Nov 2005
+
+* Fix setting of environment variable "ver" on trab board
+ The environment variable "ver" is now set before
+ do_auto_update() is called, so that "ver" can be used
+ in USB update scripts.
+ Patch by Martin Krause, 27 Oct 2005
+
+* Fix wrong usage of udelay() in led_blink() on trab board
+ Patch by Martin Krause, 27 Oct 2005
+
+* Fix udelay bug in vfd.c for trab board
+ Patch by Martin Krause, 27 Oct 2005
+
+* Disable JFFS2 support for trab board
+ Patch by Martin Krause, 27 Oct 2005
+
+* Change mtdparts definition on trab board to match current flash map
+ Patch by Martin Krause, 27 Oct 2005
+
+* Fix memory init problems on MCC200 board
+
+* Fix IxEthDB.h to compile again
+ Patch by Stefan Roese, 14 Jun 2006
+
+* Minor cleanup for PCS440EP board
+ Patch by Stefan Roese, 13 Jun 2006
+
+* Add MCF5282 support (without preloader)
+ relocate ichache_State to ram
+ u-boot can run from internal flash
+ Add EB+MCF-EV123 board support.
+ Add m68k Boards to MAKEALL
+ Patch from Jens Scharsig, 08 Aug 2005
+
+* Nios II - Add Altera EP1C20, EP1S10 and EP1S40 boards
+ Patch by Scott McNutt, 08 Jun 2006
+
+* Nios II - Add EPCS Controller bootrom work-around
+ -When booting from an epcs controller, the epcs bootrom may leave the
+ slave select in an asserted state causing soft reset hang. This
+ patch ensures slave select is negated at reset.
+ Patch by Scott McNutt, 08 Jun 2006
+
+* Update PK1C20 board
+ -Update base addresses for standard configuration
+ -Eliminate use of CACHE_BYPASS in board code
+ Patch by Scott McNutt, 08 Jun 2006
+
+* Nios II - Fix I/O Macros and mini-app stubs
+ -Fix asm/io.h macros
+ -Eliminate use of CACHE_BYPASS in cpu code
+ -Eliminate assembler warnings
+ -Fix mini-app stubs and force no small data
+ Patch by Scott McNutt, 08 Jun 2006
+
+* Fix U-Boot environment sector protection on MCC200 board
+
+* Minor cleanup for PCS440EP board
+
+* Update PCS440EP port to fit into one flash device (incl. environment)
+ Patch by Stefan Roese, 06 Jun 2006
+
+* Add support for PCS440EP board
+ Patch by Stefan Roese, 02 Jun 2006
+
+* Fix examples/Makefile; some build targets were lost
+
+* Fix watchdog handling in CFI flash driver
+ Just use udelay() when waiting for status changes which will
+ implicitely trigger the watchdog.
+
+* Fix PCI to memory window size problems on PM82x boards
+ We use the "automatic" mode that was used for the MPC8266ADS and
+ MPC8272 boards. Eventually this should be used on all boards?]
+ Patch by Wolfgang Grandegger, 17 Jan 2006
+
+* Correct GPIO setup (UART1/IRQ's) on yosemite & yellowstone
+ Patch by Stefan Roese, 29 May 2006
+
+* Update Intel IXP4xx support
+ - Add IXP4xx NPE ethernet MAC support
+ - Add support for Intel IXDPG425 board
+ - Add support for Prodrive PDNB3 board
+ - Add IRQ support
+ Patch by Stefan Roese, 23 May 2006
+
+* Fix problem in PVR detection for 440GR
+ Patch by Stefan Roese, 18 May 2006
+
+* Fix gcc 3.4.x AFLAGS setting for m68k platform.
+
+* Enable autoboot for M5271EVB board.
+
+* Changed default ramdisk addr in yosemite/yellowstone ports
+ Patch by Stefan Roese, 15 May 2006
+
+* Fix PCMCIA support on virtlab2
+
+* Add support for VirtLab2 board
+ (needed because of differences in the PCMCIA hardware).
+
+* Minor cleanup.
+
+* Update yosemite configuration to enable flash write buffer support
+ Patch by Stefan Roese, 10 May 2006
+
+* Fix compile warnings in common/xyzModem.c
+ Patch by Stefan Roese, 10 May 2006
+
+* Add support for AMCC 440EP Rev C and 440GR Rev B
+ Patch by John Otken, 08 May 2006
+
+* OMAP 5912/OSK: update EMIFS CS1 timings:
+ Problems have been seen in the linux kernel's smc91x network driver
+ due to improper bus timings. The latest 2.6 OMAP kernels currently
+ have a workaround, but this fix belongs in u-boot.
+ Patch by Kevin Hilman, 13 Oct 2005
+
+* Fix REG_MPU_LOAD_TIMER definition in multiple OMAP ports
+ Patch by Hiroki Kaminaga, 11 Mar 2006
+
+* Update omap5912osk board support
+ - Fix OMAP support that omap5912osk compiles in current source tree
+ - Update with code from "http://omap.spectrumdigital.com/osk5912"
+ to fix problems with DDR initialization
+ - Fix timer setup
+ - Use CFI flash driver and support complete 32MB of onboard flash
+ - Add "print_cpuinfo()" and "checkboard()" functions to display
+ CPU (with frequency) and Board infos
+ Patch by Stefan Roese, 10 May 2006
+
+* Fix watchdog issues for ColdFire boards.
+
+* Add M5271EVB board support.
+
+* Make R5200 specific low level initialization board conditional.
+
+* Update CPU target identification strings for ColdFire family.
+
+* Update register definitions for MCF5271.
+
+* Fix serial console support for MCF5271.
+
+* Fixes for gcc 3.4 based m68k toolchain,
+ based on patch by Jate Sujjavanich.
+
+* Fix lowboot support on MCC200 board
+
+* Merged MPC8349ADS and MPC8349EMDS ports into MPC8349EMDS port:
+ - Removed MPC8349ADS port
+ - Added PCI support to MPC8349ADS
+ - reworked memory map to allow mapping of all regions with BATs
+ Patch by Kumar Gala, 20 Apr 2006
+
+* Coding Style cleanup
+
+* Write RTC seconds first to maintain settings integrity per
+ Maxim/Dallas DS1306 data sheet.
+ Patch by Alan J. Luse, 02 May 2006
+
+* Scheduled for removal: strnicmp() which is unused
+
+* Update for Intel Monahans boards:
+ - support for magic key detection and handling on delta board
+ - NAND support for zylonite board + some minor cleanup
+
+* Declare load_serial_ymodem() when using CFG_CMD_LOADB.
+ Patch by Jon Loeliger, 01 May 2006
+
+* Fixed handling of bad checksums with "mkimage -l"
+
+* Added support for BC3450 board
+ Patch by Stefan Strobl, 21 Oct 2005
+
+* Update for NC650 board:
+ - Support rev1 and rev2 hardware
+ - adapt to new NAND layer
+ - add CP850 configuration based on NC650
+
+* MPC5200: enable snooping of DMA transactions on XLB even if no PCI
+ is configured; othrwise DMA accesses aren't cache coherent which
+ causes for example USB to fail.
+
+* Some code cleanup
+
+* Fix dbau1x00 boards broken by dbau1550 patch
+ PLL:s were not set for boards other than 1550.
+ Flash CFI caused card to hang due to undefined CFG_FLASH_BANKS_LIST.
+ Default boot is now bootp for cards other than 1550.
+ Patch by Thomas Lange, 10 Aug 2005
+
+* Fixes common/cmd_flash.c:
+ - fix some compiler/parser error, if using m68k tool chain
+ - optical fix for protect on/off all messages, if using more
+ then one bank
+ Patch by Jens Scharsig, 28 Jul 2005
+
+* Fix Quad UART mapping on MCC200 board due to new HW revision
+
+* Fix JFFS2 support for legacy NAND driver.
+
+* Remove dependencies between DoC code and old legacy NAND driver.
+
+* Fix PM828_PCI target, for which PCI was *not* configured in.
+
+* Fix Lite5200B support: initialize SDelay register
+ See Freescale's AN3221 "MPC5200B SDRAM Initialization and
+ Configuration", 3.3.1 SDelay--MBAR + 0x0190
+
+* Changes/fixes for drivers/cfi_flash.c:
+
+ - Add Intel legacy lock/unlock support to common CFI driver
+
+ On some Intel flash's (e.g. Intel J3) legacy unlocking is
+ supported, meaning that unlocking of one sector will unlock
+ all sectors of this bank. Using this feature, unlocking
+ of all sectors upon startup (via env var "unlock=yes") will
+ get much faster.
+
+ - Fixed problem with multiple reads of envronment variable
+ "unlock" as pointed out by Reinhard Arlt & Anders Larsen.
+
+ - Removed unwanted linefeeds from "protect" command when
+ CFG_FLASH_PROTECTION is enabled.
+
+ - Changed p3p400 board to use CFG_FLASH_PROTECTION
+
+ Patch by Stefan Roese, 01 Apr 2006
+
+* Changes/fixes for drivers/cfi_flash.c:
+ - Correctly handle the cases where CFG_HZ != 1000 (several
+ XScale-based boards)
+ - Fix the timeout calculation of buffered writes (off by a
+ factor of 1000)
+ Patch by Anders Larsen, 31 Mar 2006
+
+* Updates to common PPC4xx onboard (DDR)SDRAM init code (405 and 440)
+
+ 405 SDRAM: - The SDRAM parameters can now be defined in the board
+ config file and the 405 SDRAM controller values will
+ be calculated upon bootup (see PPChameleonEVB).
+ When those settings are not defined in the board
+ config file, the register setup will be as it is now,
+ so this implementation should not break any current
+ design using this code.
+
+ Thanks to Andrea Marson from DAVE for this patch.
+
+ 440 DDR: - Added function sdram_tr1_set to auto calculate the
+ TR1 value for the DDR.
+ - Added ECC support (see p3p440).
+
+ Patch by Stefan Roese, 17 Mar 2006
+
+* Fix CONFIG_SKIP_LOWLEVEL_INIT dependency in cpu/arm920t/start.S
+ Patch by Peter Menzebach, 13 Oct 2005 [DNX#2006040142000473]
+
+* Add support for ymodem protocol download
+ Patch by Stefano Babic, 29 Mar 2006
+
+* Memory Map Update for Delta board: U-Boot is at 0x80000000-0x84000000
+ Merge from Markus Klotzbücher's repo, 01 Apr 2006
+
+* GCC-4.x fixes: clean up global data pointer initialization for all
+ boards
+
+* Update for Delta board:
+ - redundant NAND environment
+ - misc Monahans cleanups (remove dead code etc.)
+ - DA9030 Initialization; some minimal changes to PXA I2C driver to
+ make it work with the Monahans.
+ - Make Monahans clock frequency configurable using
+ CFG_MONAHANS_RUN_MODE_OSC_RATIO and
+ CFG_MONAHANS_TURBO_RUN_MODE_RATIO.
+ Merge from Markus Klotzbücher's repo, 25 Mar 2006
+
+* Enable Quad UART om MCC200 board.
+
+* Cleanup MCC200 board configuration; omit non-existent stuff.
+
+* Add support for MPC859/866 Rev. A.0
+
+* Add command for handling DDR ECC registers on MPC8349EE MDS board.
+
+* Fix DDR ECC bit definitions for MPC83xx.
+
+* Add initial support for MPC8349E MDS board.
+
+* Add support for ECC DDR initialization on MPC83xx.
+
+* Add DMA support for MPC83xx.
+
+* Add sync in do_reset() routine for MPC83xx after RPR register
+ was written to. It is need on some targets when BAT translation
+ is enabled.
+
+* Add bit definitions for MPC83xx DDR controller registers.
+
+* Add Dcbz(), Dcbi() and Dcbf() routines for MPC83xx.
+
+* Correct shift offsets in icache_status and dcache_status for MPC83xx.
+
+* Add support for DS1374 RTC chip.
+
+* Add support for Lite5200B board.
+ Patch by Patch by Jose Maria (Txema) Lopez, 16 Jan 2006
+
+* Apply SoC concept to arm926ejs CPUs, i.e. move the SoC specific
+ timer and cpu_reset code from cpu/$(CPU) into the new
+ cpu/$(CPU)/$(SOC) directories
+ Patch by Andreas Engel, 13 Mar 2006
+
+* Change max size of uncompressed uImage's to 8MByte and add
+ CFG_BOOTM_LEN to adjust this setting.
+
+ As mentioned by Robin Getz on 2005-05-24 the size of uncompressed
+ uImages was restricted to 4MBytes. This default size is now
+ increased to 8Mbytes and can be overrided by setting CFG_BOOTM_LEN
+ in the board config file.
+
+ Patch by Stefan Roese, 13 Mar 2006
+
+* Fix problem with updated PCI code in cpu/ppc4xx/405gp_pci.c
+ Patch by Stefan Roese, 13 Mar 2006
+
+* cpu/ppc4xx/start.S : exceptions are enabled after relocation
+ Patch by Cedric Vincent, 06 Jul 2005
+
+* au1x00_eth.c: check malloc return value and abort if it failed
+ Patch by Andrew Dyer, 26 Jul 2005
+
+* Change the sequence of events in soft_i2c.c:send_ack() to keep from
+ incorrectly generating start/stop conditions on the bus.
+ Patch by Andrew Dyer, 26 Jul 2005
+
+* Fix bug in [id]cache_status commands for MPC85xx processors;
+ should look at LSB of L1CSRn registers to determine if L1 cache is
+ enabled, not the MSB.
+ Patch by Murray Jensen, 19 Jul 2005
+
+* Fix array overflow with fw_setenv on uninitialised environment
+ Patch by Murray Jensen, 15 Jul 2005
+
+* Add support for EmbeddedPlanet EP88x boards
+ Patch by Yuli Barcohen, 13 Jul 2005
+
+* Remove board specific configuration includes from the common xilinx
+ ethernet and iic adapter code.
+ Patch by Michael Libeskind, 12 Jul 2005
+
+* Add Nat Semi DP83865 PHY support to MPC85xx TSEC driver
+ Patch by Murray Jensen, 08 Jul 2005
+
+* Add (some) definitions for the MPC85xx local bus controller
+ Patch by Murray Jensen, 08 Jul 2005
+
+* Add CPM2 I/O pin functions for MPC85xx processors
+ Patch by Murray Jensen, 08 Jul 2005
+
+* Fix compile problem
+
+* Added PCI support for MPC8349ADS board
+ Patch by Kumar Gala 11 Jan 2006
+
+* Enable address translation on MPC83xx
+ Patch by Kumar Gala, 10 Feb 2006
+
+* Decopuled setting of OR/BR and LBLAWBAR/LBLAWAR on MPC83xx
+ Patch by Kumar Gala, 25 Jan 2006
+
+* Fixed defines for MPC83xx SICRL register to match current specs
+ Patch by Kumar Gala, 23 Jan 2006
+
+* Only disable the MPC83xx watchdog if its enabled out of reset.
+ If its disabled out of reset SW can later enable it if so desired
+ Patch by Kumar Gala, 11 Jan 2006
+
+* Allow config of GPIO direction & data registers at boot on 83xx
+ Patch by Kumar Gala, 11 Jan 2006
+
+* Enable time handling on 83xx
+ Patch by Kumar Gala, 11 Jan 2006
+
+* Make System IO Config Registers board configurable on MPC83xx
+ Patch by Kumar Gala, 11 Jan 2006
+
+* Fixed PCI indirect config ops to handle multiple PCI controllers
+ We need to adjust the bus number we are trying to access based
+ on which PCI controller its on
+ Patch by Kumar Gala, 12 Jan 2006
+
+* Report back PCI bus when doing table based device config
+ Patch by Kumar Gala, 11 Jan 2006
+
+* Added support for PCI prefetchable region and BARs
+ If a host controller sets up a region as prefetchable and
+ a device's BAR denotes it as prefetchable, allocate the
+ BAR into the prefetch region.
+
+ If a BAR is prefetchable and no prefetchable region has
+ been setup by the controller we fall back to allocating
+ the BAR into the normally memory region.
+ Patch by Kumar Gala, 11 Jan 2006
+
+* Add helper function for generic flat device tree fixups for mpc83xx
+ Patch by Kumar Gala, 11 Jan 2006
+
+* Add support for passing initrd information via flat device tree
+ Patch by Kumar Gala, 11 Jan 2006
+
+* Added OF_STDOUT_PATH and OF_SOC
+
+ OF_STDOUT_PATH specifies the path to the device the kernel can use
+ for console output
+
+ OF_SOC specifies the proper name of the SOC node if one exists.
+ Patch by Kumar Gala, 11 Jan 2006
+
+* Allow board code to fixup the flat device tree before booting a kernel
+ Patch by Kumar Gala, 11 Jan 2006
+
+* Added CONFIG_ options for bd_t and env in flat dev tree
+
+ CONFIG_OF_HAS_BD_T will put a copy of the bd_t
+ into the resulting flat device tree.
+
+ CONFIG_OF_HAS_UBOOT_ENV will copy the environment
+ variables from u-boot into the flat device tree
+
+ Patch by Kumar Gala, 11 Jan 2006
+
+* Add support for the DHCP vendor optional bootfile (#67).
+ Ignores the vendor TFTP server name option (#66).
+ Patch by Murray Jensen, 30 Jun 2005
+
+* Fix a HW timing issue on 8548 CDS for eTSEC 3 in RGMII mode
+ Patch by Andy Fleming, 14 Jun 2005
+
+* Fix bad register definitions for LTX971 PHY on MPC85xx boards.
+ Patch by Gerhard Jaeger, 21 Jun 2005
+
+* Add netconsole and some more commands to RPXlite_DW board
+ Patch by Sam Song, 19 Jun 2005
+
+* Fix bad declaration on pci_cfgfunc_nothing
+ Patch by Sam Song, 19 Jun 2005
+
+* Adjust "echo" as a default command
+ Patch by Sam Song, 19 Jun 2005
+
+* Fix PCIDF calculation in cpu/mpc8260/speed.c for MPC8280EC
+ Patch by KokHow Teh, 16 Jun 2005
+
+* Add crc of data to jffs2 (in jffs2_1pass_build_lists()).
+ Patch by Rick Bronson, 15 Jun 2005
+
+* Coding Style cleanup
+
+* Avoid dereferencing NULL in find_cmd() if no valid commands were found
+ Patch by Andrew Dyer, 13 Jun 2005
+
+* Add ADI Blackfin support
+ - add support for Analog Devices Blackfin BF533 CPU
+ - add support for the ADI BF533 Stamp uClinux board
+ - add support for the ADI BF533 EZKit board
+ Patches by Richard Klingler, 11 Jun 2005
+
+* Add loads of ntohl() in image header handling
+ Patch by Steven Scholz, 10 Jun 2005
+
+* Switch MPC86xADS and MPC885ADS boards to use cpuclk environment
+ variable to set clock
+ Patch by Yuli Barcohen, 05 Jun 2005
+
+* RPXlite configuration fixes
+ - Use correct flash sector size
+ - Use correct memory test end address
+ - Add support for bzip2 compression
+ - Various small fixes
+ Patch by Yuli Barcohen, 05 Jun 2005
+
+* Memory configuration changes for ZPC.1900 board
+ - Fix SDRAM timing on both local bus and 60x bus
+ - Add support for second flash bank (SIMM)
+ - Change boot flash base
+ Patch by Yuli Barcohen, 05 Jun 2005
+
+* Add support for Adder boards with 16MB SDRAM;
+ add support for second FEC on Adder87x board.
+ Patch by Yuli Barcohen, 05 Jun 2005
+
+* Fix conditional for including ks8695eth driver
+ Patch by Greg Ungerer, 04 Jun 2005
+
+* Fix Makefile: include config.mk only after CROSS_COMPILE is defined
+ Patch by Friedrich Lobenstock, 02 Jun 2005
+
+* Fix comment in common/soft_i2c.c
+ Patches by Peter Korsgaard/Tolunay Orkun, 26 May 2005
+
+* Cleanup compiler warnings.
+ Patch by Greg Ungerer, 21 May 2005
+
+* Word alignment fixes for word aligned NS16550 UART
+ Patch by Jean-Paul Saman, 01 Mar 2005
+
+ Fixes bug with UART that only supports word aligned access: removed
+ "__attribute__ ((packed));" for "(CFG_NS16550_REG_SIZE == 4)" some
+ (broken!) versions of GCC generate byte accesses when encountering
+ the packed attribute regardless if the struct is already correctly
+ aligned for a platform. Peripherals that can only handle word
+ aligned access won't work properly when accessed with byte access.
+ The struct NS16550 is already word aligned for REG_SIZE = 4, so
+ there is no need to packed the struct in that case.
+
+* Fix behaviour if gatewayip is not set
+ Patch by Robin Gilks, 23 Dec 2004
+
+* Fix cleanup for netstart board.
+ Remove build results from repository
+
+* Some code cleanup for GCC 4.x
+
+* Fixes to support environment in NAND flash;
+ enable NAND flash based environment for delta board.
+
+* Add support for Intel Monahans CPU on Zylonite and Delta boards
+ (This is Work in Progress!)
+
+* Add support for TQM8260-AI boards.
+
+* Minor code cleanup
+
+* Merge the new NAND code (testing-NAND brach); see doc/README.nand
+ Rewrite of NAND code based on what is in 2.6.12 Linux kernel
+ Patch by Ladislav Michl, 29 Jun 2005
+
+* Add lowboot target to mcc200 board
+ Patch by Stefan Roese, 4 Mar 2006
+
+* Fix problem with flash_get_size() from CFI driver update
+ Patch by Stefan Roese, 1 Mar 2006
+
+* Make CFG_NO_FLASH work on ARM systems
+ Patch by Markus Klotzbuecher, 27 Feb 2006
+
+* Update mcc200 config: Disable PCI and DoC, use 133 MHz IPB clock,
+ use hush shell.
+
+* Convert mcc200 to use common CFI flash driver
+ Patch by Stefan Roese, 28 Feb 2006
+
+* Add env-variable "unlock" to handle initial state of sectors
+ (locked/unlocked).
+
+ Only the U-Boot image and it's environment is protected,
+ all other sectors are unprotected (unlocked) if flash
+ hardware protection is used (CFG_FLASH_PROTECTION) and
+ the environment variable "unlock" is set to "yes".
+
+ Patch by Stefan Roese, 28 Feb 2006
+
+* Update drivers/cfi_flash.c:
+ - find_sector() called in both versions of flash_write_cfiword()
+ Patch by Peter Pearse, 27th Feb 2006
+
+* CFI support for a x8/x16 AMD/Spansion flash configured in x8 mode
+ Patch by Jose Maria Lopez, 16 Jan 2006
+
+* Add support for AMD/Spansion Flashes in flash_write_cfibuffer
+ Patch by Alex Bastos and Thomas Schaefer, 2005-08-29
+
+* Changes/fixes for drivers/cfi_flash.c:
+ We *should* check if there are any error bits if the previous call
+ returned ERR_OK (Otherwise we will have output an error message in
+ flash_status_check() already.) The original code would only check for
+ error bits if flash_status_check() returns ERR_TIMEOUT.
+ Patch by Marcus Hall, 23 Aug 2005
+
+* Changes/fixes for drivers/cfi_flash.c:
+ - Add CFG_FLASH_PROTECT_CLEAR on drivers/cfi_flash.c
+ - Prohibit buffer write when buffer_size is 1 on drivers/cfi_flash.c
+ Patch by Sangmoon Kim, 19 Aug 2005
+
+* Fixes for drivers/cfi_flash.c:
+ - Fix wrong timeout value usage in flash_status_check()
+ - Round write_tout up when converting to msec in flash_get_size()
+ - Remove clearing flash status at the end of flash_write_cfibuffer()
+ which sets Intel 28F640J3 flash back to command mode on CSB472
+ Patch by Tolunay Orkun, 02 July 2005
+
+* Add basic support for the SMMACO4 Board from PanDaCom.
+ Patch by Heiko Schocher, 20 Feb 2006
+
+* Add GIT version information (commid ID) to untagged U-Boot versions
+
+ As done in the linux kernel, the U-Boot version (U_BOOT_VERSION)
+ of all unreleased (untagged) U-Boot images will be automatically
+ extended upon compiletime with a part of the GIT commit ID and
+ possibly with "dirty" if uncommited changes are detected.
+
+ Here an example for the resulting version:
+ "U-Boot 1.1.4-g3457ac18-dirty"
+
+ The version is now maintained in the toplevel Makefile and the
+ version headers are autogenerated.
+
+ Patch by Stefan Roese, 9 Feb 2006
+
+* Update default environment for INKA4x00 board.
+
+* Convert CPCI750 to use common CFI flash driver
+ Patch by Reinhard Arlt, 8 Feb 2006
+
+* Various changes to esd HH405 board specific files
+ Patch by Matthias Fuchs, 07 Feb 2006
+
+* Cleanup U-Boot boot messages on ARM.
+
+ To match the U-Boot user interface on ARM platforms to the U-Boot
+ standard (as on PPC platforms), some messages with debug character
+ are removed from the default U-Boot build.
+ Enable DEBUG for lib_arm/board.c to enable debug messages.
+ New CONFIG_DISPLAY_CPUINFO and CONFIG_DISPLAY_BOARDINFO options.
+ Patch by Stefan Roese, 24 Jan 2006
+
+* Fix various compiler warnings on ppc4xx builds (ELDK 4.0)
+ Patch by Stefan Roese, 18 Jan 2006
+
+* Add VGA support (CT69000) to CPCI750 board.
+ Insert missing __le32_to_cpu() for filesize in ext2fs_read_file().
+ Patch by Reinhard Arlt, 30 Dec 2005
+
+* PMC405 and CPCI405: Moved configuration of pci resources
+ into config file.
+ PMC405 and CPCI2DP: Added firmware download and booting via pci.
+ Patch by Matthias Fuchs, 20 Dec 2005
+
+* Add ColdFire targets to MAKEALL script
+ Patch by Zachary Landau, 26 Jan 2006
+
+* Add support for r5200 board
+ Patch by Zachary Landau, 26 Jan 2006
+
+* Add support for Freescale M5271 processor
+ Patch by Zachary Landau, 26 Jan 2006
+
+* Fix 28F256J3A support on PM520 board
+ (without bank-switching only 32 MB can be accessed)
+
+* Fix mkimage bug with multifile images created on 64 bit systems.
+
+* Add support for 28F256J3A flash (=> 64 MB) on PM520 board
+
+* Fix compiler problem with at91rm9200dk board.
+ Patch by Eugen Bigz, 19 Dec 2005
+
+======================================================================
Changes for U-Boot 1.1.4:
======================================================================
@@ -120,11 +1032,11 @@ Changes for U-Boot 1.1.4:
* Add support for multiple PHYs.
Tested on the following boards:
- cmcpu2 (at91rm9200/ether.c)
+ cmcpu2 (at91rm9200/ether.c)
PPChameleon (ppc4xx/4xx_enet.c)
- yukon (mpc8220/fec.c)
- uc100 (mpc8xx/fec.c)
- tqm834x (mpc834x/tsec.c) with EEPRO100
+ yukon (mpc8220/fec.c)
+ uc100 (mpc8xx/fec.c)
+ tqm834x (mpc834x/tsec.c) with EEPRO100
lite5200 (mpc5xxx/fec.c) with EEPRO100 card (drivers/eepro100.c)
Main changes include:
common/miiphyutil.c
@@ -664,18 +1576,18 @@ Changes for U-Boot 1.1.3:
The first one is to define a single, static partition:
#undef CONFIG_JFFS2_CMDLINE
- #define CONFIG_JFFS2_DEV "nor0"
- #define CONFIG_JFFS2_PART_SIZE 0xFFFFFFFF /* use whole device */
- #define CONFIG_JFFS2_PART_SIZE 0x00100000 /* use 1MB */
- #define CONFIG_JFFS2_PART_OFFSET 0x00000000
+ #define CONFIG_JFFS2_DEV "nor0"
+ #define CONFIG_JFFS2_PART_SIZE 0xFFFFFFFF /* use whole device */
+ #define CONFIG_JFFS2_PART_SIZE 0x00100000 /* use 1MB */
+ #define CONFIG_JFFS2_PART_OFFSET 0x00000000
The second method uses the mtdparts command line option and dynamic
partitioning:
/* mtdparts command line support */
#define CONFIG_JFFS2_CMDLINE
- #define MTDIDS_DEFAULT "nor1=zuma-1,nor2=zuma-2"
- #define MTDPARTS_DEFAULT "mtdparts=zuma-1:-(jffs2),zuma-2:-(user)"
+ #define MTDIDS_DEFAULT "nor1=zuma-1,nor2=zuma-2"
+ #define MTDPARTS_DEFAULT "mtdparts=zuma-1:-(jffs2),zuma-2:-(user)"
Command line of course produces bigger images, and may be inappropriate
for some targets, so by default it's off.
@@ -1285,7 +2197,7 @@ Changes for U-Boot 1.1.3:
- use -mtune=xscale and -march=armv5 options for PXA
* Patch by Florian Schlote, 08 Sep 2004:
- Add support for SenTec-COBRA5272-board (Coldfire).
+ Add support for SenTec-COBRA5272-board (ColdFire).
* Patch by Gleb Natapov, 07 Sep 2004:
mpc824x: set PCI latency timer to a sane value
@@ -1343,7 +2255,7 @@ Changes for U-Boot 1.1.2:
* Patch by Stefan Roese, 16 Dez 2004:
- ext2fs support added
- Tundra universe support added
- - Coldfire MCF5249 support added (no preloader needed!)
+ - ColdFire MCF5249 support added (no preloader needed!)
- MCF5249 board TASREG added
- PPC boards added: APC405, CPCI405DT, CPCI750, G2000, HH405,
VOM405, WUH405
@@ -1665,7 +2577,7 @@ Changes for U-Boot 1.1.2:
* Fix NSCU config; add ethernet wakeup code.
-* Add link for preloader for Motorola Coldfire to README.m68k
+* Add link for preloader for Motorola ColdFire to README.m68k
* Patch by Michael Bendzick, 12 Jul 2004:
fix output formatting in drivers/cfi_flash.c
@@ -2612,7 +3524,7 @@ Changes for U-Boot 1.1.0:
* Some code cleanup
* Patch by Josef Baumgartner, 10 Feb 2004:
- Fixes for Coldfire port
+ Fixes for ColdFire port
* Patch by Brad Kemp, 11 Feb 2004:
Fix CFI flash driver problems
@@ -2878,7 +3790,7 @@ Changes for U-Boot 1.0.1:
- 4xx: removed spurious MII error messages on "mii info" command.
* Patch by Bernhard Kuhn, 28 Nov 2003:
- add support for Coldfire CPU
+ add support for ColdFire CPU
add support for Motorola M5272C3 and M5282EVB boards
* Patch by Pierre Aubert, 24 Nov 2003:
@@ -2988,7 +3900,7 @@ Changes for U-Boot 1.0.1:
Bring ARM memory layout in sync with the documentation:
stack and malloc-heap are now located _below_ the U-Boot code
-* Accelerate booting on TRAB board: read and check autoupdate image
+* Accelerate booting on TRAB board: read and check autoupdate image
headers first instead of always reading the whole images.
* Fix type in MPC5XXX code (pointed out by Victor Wren)
@@ -3108,7 +4020,7 @@ Changes for U-Boot 1.0.0:
* Make 5200 reset command _really_ reset the board, without running
any other code after it
-* Fix errors with flash erase when range spans across banks
+* Fix errors with flash erase when range spans across banks
that are mapped in reverse order
* Fix flash mapping and display on P3G4 board
@@ -3352,7 +4264,7 @@ Changes for U-Boot 0.4.8:
or 1 x AM29LV652 (two LV065 in one chip = 16 MB);
Run IPB at 133 Mhz; adjust the MII clock frequency accordingly
-* Set BRG_CLK on PM825/826 to 64MHz (VCO_OUT / 4, instead of 16 MHz)
+* Set BRG_CLK on PM825/826 to 64MHz (VCO_OUT / 4, instead of 16 MHz)
to allow for more accurate baudrate settings
(error now 0.7% at 115 kbps, instead of 3.5% before)
@@ -3839,7 +4751,7 @@ Changes for U-Boot 0.4.0:
Update for MPC8266ADS board
* Get (mostly) rid of CFG_MONITOR_LEN definition; compute real length
- instead CFG_MONITOR_LEN is now only used to determine _at_compile_
+ instead CFG_MONITOR_LEN is now only used to determine _at_compile_
_time_ (!) if the environment is embedded within the U-Boot image,
or in a separate flash sector.
@@ -3889,7 +4801,7 @@ Changes for U-Boot 0.4.0:
* Patch by Thomas Schäfer, 28 Apr 2003:
Fix SPD handling for 256 ECC DIMM on Walnut
-* Add support for arbitrary bitmaps for TRAB's VFD command;
+* Add support for arbitrary bitmaps for TRAB's VFD command;
allow to pass boot bitmap addresses in environment variables;
allow for zero boot delay
@@ -4232,7 +5144,7 @@ Changes for U-Boot 0.3.0:
* Add VFD type detection to trab board
-* extend drivers/cs8900.c driver to synchronize ethaddr environment
+* extend drivers/cs8900.c driver to synchronize ethaddr environment
variable with value in the EEPROM
* Patch by Stefan Roese, 10 Feb 2003:
@@ -4392,7 +5304,7 @@ Changes for U-Boot 0.2.0:
* Patch by Pierre Aubert, 05 Nov 2002
Add support for slave serial Spartan 2 FPGAs
-* Fix uninitialized memory (MAC address) in 8xx SCC/FEC ethernet
+* Fix uninitialized memory (MAC address) in 8xx SCC/FEC ethernet
drivers
* Add support for log buffer which can be passed to Linux kernel's
diff --git a/CREDITS b/CREDITS
index f91fa3e48e..32d3060c3f 100644
--- a/CREDITS
+++ b/CREDITS
@@ -105,6 +105,10 @@ N: Magnus Damm
E: damm@opensource.se
D: 8xxrom
+N: Richard Danter
+E: richard.danter@windriver.com
+D: Support for Wind River PPMC 7xx/74xx boards
+
N: George G. Davis
E: gdavis@mvista.com
D: Board ports for ADS GraphicsClient+ and Intel Assabet
@@ -229,6 +233,7 @@ D: Port to Windriver ppmc8260 board
N: Sangmoon Kim
E: dogoil@etinsys.com
D: Support for debris board
+D: Support for KVME080 board
N: Frederick W. Klatt
E: fred.klatt@windriver.com
@@ -253,7 +258,7 @@ D Support for Intrinsyc CERF PXA250 board.
N: Thomas Lange
E: thomas@corelatus.se
-D: Support for GTH and dbau1x00 boards; lots of PCMCIA fixes
+D: Support for GTH, GTH2 and dbau1x00 boards; lots of PCMCIA fixes
N: Marc Leeman
E: marc.leeman@barco.com
diff --git a/MAINTAINERS b/MAINTAINERS
index 0ef9e0349a..e1baa422ae 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -197,6 +197,7 @@ Brad Kemp <Brad.Kemp@seranoa.com>
Sangmoon Kim <dogoil@etinsys.com>
debris MPC8245
+ KVME080 MPC8245
Thomas Lange <thomas@corelatus.se>
@@ -283,6 +284,7 @@ Stefan Roese <sr@denx.de>
ebony PPC440GP
ocotea PPC440GX
p3p440 PPC440GP
+ pcs440ep PPC440EP
sycamore PPC405GPr
walnut PPC405GP
yellowstone PPC440GR
@@ -434,6 +436,11 @@ Dave Peverley <dpeverley@mpc-data.co.uk>
omap730p2 ARM926EJS
+Stefan Roese <sr@denx.de>
+
+ ixdpg425 xscale
+ pdnb3 xscale
+
Robert Schwebel <r.schwebel@pengutronix.de>
csb226 xscale
@@ -483,6 +490,7 @@ Wolfgang Denk <wd@denx.de>
Thomas Lange <thomas@corelatus.se>
dbau1x00 MIPS32 Au1000
+ gth2 MIPS32 Au1000
#########################################################################
# Nios-32 Systems: #
@@ -511,6 +519,9 @@ Scott McNutt <smcnutt@psyent.com>
PCI5441 Nios-II
PK1C20 Nios-II
+ EP1C20 Nios-II
+ EP1S10 Nios-II
+ EP1S40 Nios-II
#########################################################################
# MicroBlaze Systems: #
@@ -534,6 +545,10 @@ Matthias Fuchs <matthias.fuchs@esd-electronics.com>
TASREG MCF5249
+Zachary P. Landau <zachary.landau@labxtechnologies.com>
+
+ r5200 mcf52x2
+
#########################################################################
# End of MAINTAINERS list #
#########################################################################
diff --git a/MAKEALL b/MAKEALL
index fcbab47cab..467a9bee0a 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -25,15 +25,16 @@ LIST_5xx=" \
#########################################################################
LIST_5xxx=" \
- cpci5200 icecube_5100 icecube_5200 EVAL5200 \
- pf5200 PM520 Total5100 Total5200 \
- Total5200_Rev2 TQM5200_auto o2dnt \
+ BC3450 cpci5200 EVAL5200 icecube_5100 \
+ icecube_5200 lite5200b mcc200 o2dnt \
+ pf5200 PM520 TB5200 Total5100 \
+ Total5200 Total5200_Rev2 TQM5200 TQM5200_B \
+ TQM5200S \
"
#########################################################################
## MPC8xx Systems
#########################################################################
-
LIST_8xx=" \
Adder87x GENIETV MBX860T R360MPI \
AdderII GTH MHPC RBC823 \
@@ -43,15 +44,17 @@ LIST_8xx=" \
CCM IP860 NETPHONE RPXlite_DW \
cogent_mpc8xx IVML24 NETTA RRvision \
ELPT860 IVML24_128 NETTA2 SM850 \
- ESTEEM192E IVML24_256 NETTA_ISDN SPD823TS \
- ETX094 IVMS8 NETVIA svm_sc8xx \
- FADS823 IVMS8_128 NETVIA_V2 SXNI855T \
- FADS850SAR IVMS8_256 NX823 TOP860 \
- FADS860T KUP4K pcu_e TQM823L \
- FLAGADM KUP4X QS823 TQM823L_LCD \
- FPS850L LANTEC QS850 TQM850L \
- GEN860T lwmon QS860T TQM855L \
- GEN860T_SC MBX quantum TQM860L \
+ EP88x IVML24_256 NETTA_ISDN spc1920 \
+ ESTEEM192E IVMS8 NETVIA SPD823TS \
+ ETX094 IVMS8_128 NETVIA_V2 svm_sc8xx \
+ FADS823 IVMS8_256 NX823 SXNI855T \
+ FADS850SAR KUP4K pcu_e TOP860 \
+ FADS860T KUP4X QS823 TQM823L \
+ FLAGADM LANTEC QS850 TQM823L_LCD \
+ FPS850L lwmon QS860T TQM850L \
+ GEN860T MBX quantum TQM855L \
+ GEN860T_SC TQM860L \
+ TQM885D \
uc100 \
v37 \
"
@@ -70,11 +73,11 @@ LIST_4xx=" \
HH405 HUB405 JSE KAREF \
luan METROBOX MIP405 MIP405T \
ML2 ml300 ocotea OCRTC \
- ORSG p3p440 PCI405 PIP405 \
- PLU405 PMC405 PPChameleonEVB sbc405 \
- VOH405 VOM405 W7OLMC W7OLMG \
- walnut WUH405 XPEDITE1K yellowstone \
- yosemite \
+ ORSG p3p440 PCI405 pcs440ep \
+ PIP405 PLU405 PMC405 PPChameleonEVB \
+ sbc405 VOH405 VOM405 W7OLMC \
+ W7OLMG walnut WUH405 XPEDITE1K \
+ yellowstone yosemite yucca bamboo \
"
#########################################################################
@@ -92,9 +95,9 @@ LIST_8220=" \
LIST_824x=" \
A3000 barco BMW CPC45 \
CU824 debris eXalion HIDDEN_DRAGON \
- MOUSSE MUSENKI MVBLUE OXC \
- PN62 Sandpoint8240 Sandpoint8245 sbc8240 \
- SL8245 utx8245 \
+ MOUSSE MUSENKI MVBLUE \
+ OXC PN62 Sandpoint8240 Sandpoint8245 \
+ sbc8240 SL8245 utx8245 \
"
#########################################################################
@@ -116,7 +119,7 @@ LIST_8260=" \
#########################################################################
LIST_83xx=" \
- MPC8349ADS TQM834x\
+ TQM834x MPC8349EMDS \
"
@@ -141,7 +144,7 @@ LIST_74xx=" \
"
LIST_7xx=" \
- BAB7xx CPCI750 ELPPC \
+ BAB7xx CPCI750 ELPPC ppmc7xx \
"
LIST_ppc="${LIST_5xx} ${LIST_5xxx} \
@@ -177,10 +180,11 @@ LIST_ARM9=" \
ap920t ap922_XA10 ap926ejs ap946es \
ap966 cp920t cp922_XA10 cp926ejs \
cp946es cp966 lpd7a400 mp2usb \
- mx1ads mx1fs2 omap1510inn omap1610h2 \
- omap1610inn omap730p2 scb9328 smdk2400 \
- smdk2410 trab VCMA9 versatile \
- versatileab versatilepb voiceblue
+ mx1ads mx1fs2 netstar omap1510inn \
+ omap1610h2 omap1610inn omap730p2 sbc2410x \
+ scb9328 smdk2400 smdk2410 trab \
+ VCMA9 versatile versatileab versatilepb \
+ voiceblue \
"
#########################################################################
@@ -203,11 +207,12 @@ LIST_ARM11=" \
LIST_pxa=" \
adsvix cerf250 cradle csb226 \
- innokom lubbock pxa255_idp wepep250 \
- xaeniax xm250 xsengine \
+ delta innokom lubbock pleb2 \
+ pxa255_idp wepep250 xaeniax xm250 \
+ xsengine zylonite \
"
-LIST_ixp="ixdp425"
+LIST_ixp="ixdp425 ixdpg425 pdnb3"
LIST_arm=" \
@@ -224,7 +229,7 @@ LIST_mips4kc="incaip"
LIST_mips5kc="purple"
-LIST_au1xx0="dbau1000 dbau1100 dbau1500 dbau1550 dbau1550_el"
+LIST_au1xx0="dbau1000 dbau1100 dbau1500 dbau1550 dbau1550_el gth2"
LIST_mips="${LIST_mips4kc} ${LIST_mips5kc} ${LIST_au1xx0}"
@@ -253,23 +258,38 @@ LIST_x86="${LIST_I486}"
#########################################################################
LIST_nios=" \
- ADNPESC1 ADNPESC1_base_32 \
+ ADNPESC1 ADNPESC1_base_32 \
ADNPESC1_DNPEVA2_base_32 \
- DK1C20 DK1C20_standard_32 \
- DK1S10 DK1S10_standard_32 DK1S10_mtx_ldk_20 \
+ DK1C20 DK1C20_standard_32 \
+ DK1S10 DK1S10_standard_32 DK1S10_mtx_ldk_20 \
"
#########################################################################
## Nios-II Systems
#########################################################################
-LIST_nios2="PCI5441 PK1C20"
+LIST_nios2=" \
+ EP1C20 EP1S10 EP1S40 \
+ PCI5441 PK1C20 \
+"
#########################################################################
## MicroBlaze Systems
#########################################################################
-LIST_microblaze="suzaku"
+LIST_microblaze=" \
+ suzaku
+"
+
+#########################################################################
+## ColdFire Systems
+#########################################################################
+
+LIST_coldfire=" \
+ cobra5272 EB+MCF-EV123 EB+MCF-EV123_internal \
+ M5271EVB M5272C3 M5282EVB TASREG \
+ r5200 M5271EVB \
+"
#-----------------------------------------------------------------------
@@ -298,7 +318,8 @@ do
microblaze| \
mips|mips_el| \
nios|nios2| \
- x86|I486)
+ x86|I486| \
+ coldfire)
for target in `eval echo '$LIST_'${arg}`
do
build_target ${target}
diff --git a/Makefile b/Makefile
index 9305cab38b..764cb96ba6 100644
--- a/Makefile
+++ b/Makefile
@@ -1,5 +1,5 @@
#
-# (C) Copyright 2000-2005
+# (C) Copyright 2000-2006
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
@@ -7,7 +7,7 @@
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
+# published by the Free Software Foundatio; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
@@ -21,6 +21,13 @@
# MA 02111-1307 USA
#
+VERSION = 1
+PATCHLEVEL = 1
+SUBLEVEL = 4
+EXTRAVERSION =
+U_BOOT_VERSION = $(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION)
+VERSION_FILE = include/version_autogenerated.h
+
HOSTARCH := $(shell uname -m | \
sed -e s/i.86/i386/ \
-e s/sun4u/sparc64/ \
@@ -46,9 +53,6 @@ ifeq (include/config.mk,$(wildcard include/config.mk))
# load ARCH, BOARD, and CPU configuration
include include/config.mk
export ARCH CPU BOARD VENDOR SOC
-# load other configuration
-include $(TOPDIR)/config.mk
-
ifndef CROSS_COMPILE
ifeq ($(HOSTARCH),ppc)
CROSS_COMPILE =
@@ -57,7 +61,8 @@ ifeq ($(ARCH),ppc)
CROSS_COMPILE = powerpc-linux-
endif
ifeq ($(ARCH),arm)
-CROSS_COMPILE = arm-linux-
+#CROSS_COMPILE = arm-linux-
+CROSS_COMPILE = arm-none-linux-gnueabi-
endif
ifeq ($(ARCH),i386)
ifeq ($(HOSTARCH),i386)
@@ -81,11 +86,18 @@ endif
ifeq ($(ARCH),microblaze)
CROSS_COMPILE = mb-
endif
+ifeq ($(ARCH),blackfin)
+CROSS_COMPILE = bfin-elf-
+endif
endif
endif
export CROSS_COMPILE
+# load other configuration
+include $(TOPDIR)/config.mk
+
+
#########################################################################
# U-Boot objects....order is important (i.e. start must be first)
@@ -103,6 +115,10 @@ endif
ifeq ($(CPU),mpc85xx)
OBJS += cpu/$(CPU)/resetvec.o
endif
+ifeq ($(CPU),bf533)
+OBJS += cpu/$(CPU)/start1.o cpu/$(CPU)/interrupt.o cpu/$(CPU)/cache.o
+OBJS += cpu/$(CPU)/cplbhdlr.o cpu/$(CPU)/cplbmgr.o cpu/$(CPU)/flush.o
+endif
LIBS = lib_generic/libgeneric.a
LIBS += board/$(BOARDDIR)/lib$(BOARD).a
@@ -118,9 +134,13 @@ LIBS += disk/libdisk.a
LIBS += rtc/librtc.a
LIBS += dtt/libdtt.a
LIBS += drivers/libdrivers.a
+LIBS += drivers/onenand/libonenand.a
+LIBS += drivers/nand/libnand.a
+LIBS += drivers/nand_legacy/libnand_legacy.a
LIBS += drivers/sk98lin/libsk98lin.a
LIBS += post/libpost.a post/cpu/libcpu.a
LIBS += common/libcommon.a
+LIBS += $(BOARDLIBS)
.PHONY : $(LIBS)
# Add GCC lib
@@ -130,7 +150,6 @@ PLATFORM_LIBS += -L $(shell dirname `$(CC) $(CFLAGS) -print-libgcc-file-name`) -
# The "tools" are needed early, so put this first
# Don't include stuff already done in $(LIBS)
SUBDIRS = tools \
- examples \
post \
post/cpu
.PHONY : $(SUBDIRS)
@@ -154,14 +173,14 @@ u-boot.bin: u-boot
u-boot.img: u-boot.bin
./tools/mkimage -A $(ARCH) -T firmware -C none \
-a $(TEXT_BASE) -e 0 \
- -n $(shell sed -n -e 's/.*U_BOOT_VERSION//p' include/version.h | \
+ -n $(shell sed -n -e 's/.*U_BOOT_VERSION//p' $(VERSION_FILE) | \
sed -e 's/"[ ]*$$/ for $(BOARD) board"/') \
-d $< $@
u-boot.dis: u-boot
$(OBJDUMP) -d $< > $@
-u-boot: depend $(SUBDIRS) $(OBJS) $(LIBS) $(LDSCRIPT)
+u-boot: depend version $(SUBDIRS) $(OBJS) $(LIBS) $(LDSCRIPT)
UNDEF_SYM=`$(OBJDUMP) -x $(LIBS) |sed -n -e 's/.*\(__u_boot_cmd_.*\)/-u\1/p'|sort|uniq`;\
$(LD) $(LDFLAGS) $$UNDEF_SYM $(OBJS) \
--start-group $(LIBS) --end-group $(PLATFORM_LIBS) \
@@ -173,6 +192,13 @@ $(LIBS):
$(SUBDIRS):
$(MAKE) -C $@ all
+version:
+ @echo -n "#define U_BOOT_VERSION \"U-Boot " > $(VERSION_FILE); \
+ echo -n "$(U_BOOT_VERSION)" >> $(VERSION_FILE); \
+ echo -n $(shell $(CONFIG_SHELL) $(TOPDIR)/tools/setlocalversion \
+ $(TOPDIR)) >> $(VERSION_FILE); \
+ echo "\"" >> $(VERSION_FILE)
+
gdbtools:
$(MAKE) -C tools/gdb || exit 1
@@ -234,6 +260,9 @@ PATI_config: unconfig
aev_config: unconfig
@./mkconfig -a aev ppc mpc5xxx tqm5200
+BC3450_config: unconfig
+ @./mkconfig -a BC3450 ppc mpc5xxx bc3450
+
cpci5200_config: unconfig
@./mkconfig -a cpci5200 ppc mpc5xxx cpci5200 esd
@@ -277,14 +306,49 @@ icecube_5100_config: unconfig
}
@./mkconfig -a IceCube ppc mpc5xxx icecube
-inka4x0_config: unconfig
+inka4x0_config: unconfig
@./mkconfig inka4x0 ppc mpc5xxx inka4x0
+lite5200b_config \
+lite5200b_LOWBOOT_config: unconfig
+ @ >include/config.h
+ @ echo "#define CONFIG_MPC5200_DDR" >>include/config.h
+ @ echo "... DDR memory revision"
+ @ echo "#define CONFIG_MPC5200" >>include/config.h
+ @ echo "#define CONFIG_LITE5200B" >>include/config.h
+ @[ -z "$(findstring LOWBOOT_,$@)" ] || \
+ { echo "TEXT_BASE = 0xFF000000" >board/icecube/config.tmp ; \
+ echo "... with LOWBOOT configuration" ; \
+ }
+ @ echo "... with MPC5200B processor"
+ @./mkconfig -a IceCube ppc mpc5xxx icecube
+
+mcc200_config \
+mcc200_SDRAM \
+mcc200_highboot \
+mcc200_highboot_SDRAM: unconfig
+ @ >include/config.h
+ @[ -n "$(findstring highboot,$@)" ] || \
+ { echo "... with lowboot configuration" ; \
+ }
+ @[ -z "$(findstring highboot,$@)" ] || \
+ { echo "TEXT_BASE = 0xFFF00000" >board/mcc200/config.tmp ; \
+ echo "... with highboot configuration" ; \
+ }
+ @[ -n "$(findstring _SDRAM,$@)" ] || \
+ { echo "... with DDR" ; \
+ }
+ @[ -z "$(findstring _SDRAM,$@)" ] || \
+ { echo "#define CONFIG_MCC200_SDRAM" >>include/config.h ; \
+ echo "... with SDRAM" ; \
+ }
+ @./mkconfig -a mcc200 ppc mpc5xxx mcc200
+
o2dnt_config:
- @./mkconfig -a o2dnt ppc mpc5xxx o2dnt
+ @./mkconfig o2dnt ppc mpc5xxx o2dnt
pf5200_config: unconfig
- @./mkconfig -a pf5200 ppc mpc5xxx pf5200 esd
+ @./mkconfig pf5200 ppc mpc5xxx pf5200 esd
PM520_config \
PM520_DDR_config \
@@ -301,11 +365,25 @@ PM520_ROMBOOT_DDR_config: unconfig
}
@./mkconfig -a PM520 ppc mpc5xxx pm520
+smmaco4_config: unconfig
+ @./mkconfig -a smmaco4 ppc mpc5xxx tqm5200
+
+spieval_config: unconfig
+ @./mkconfig -a spieval ppc mpc5xxx tqm5200
+
+TB5200_B_config \
+TB5200_config: unconfig
+ @[ -z "$(findstring _B,$@)" ] || \
+ { echo "#define CONFIG_TQM5200_B" >>include/config.h ; \
+ echo "... with MPC5200B processor" ; \
+ }
+ @./mkconfig -n $@ -a TB5200 ppc mpc5xxx tqm5200
+
MINI5200_config \
EVAL5200_config \
TOP5200_config: unconfig
@ echo "#define CONFIG_$(@:_config=) 1" >include/config.h
- @./mkconfig -a TOP5200 ppc mpc5xxx top5200 emk
+ @./mkconfig -n $@ -a TOP5200 ppc mpc5xxx top5200 emk
Total5100_config \
Total5200_config \
@@ -335,41 +413,40 @@ Total5200_Rev2_lowboot_config: unconfig
}
@./mkconfig -a Total5200 ppc mpc5xxx total5200
-TQM5200_auto_config \
-TQM5200_AA_config \
-TQM5200_AB_config \
-TQM5200_AC_config \
+TQM5200_config \
+TQM5200_B_config \
+TQM5200_B_HIGHBOOT_config \
+TQM5200S_config \
+TQM5200S_HIGHBOOT_config \
+TQM5200_STK100_config \
+cam5200_config \
MiniFAP_config: unconfig
@ >include/config.h
@[ -z "$(findstring MiniFAP,$@)" ] || \
{ echo "#define CONFIG_MINIFAP" >>include/config.h ; \
- echo "#define CONFIG_TQM5200_AC" >>include/config.h ; \
echo "... TQM5200_AC on MiniFAP" ; \
}
- @[ -z "$(findstring AA,$@)" ] || \
- { echo "#define CONFIG_TQM5200_AA" >>include/config.h ; \
- echo "... with 4 MB Flash, 16 MB SDRAM, 32 kB EEPROM" ; \
+ @[ -z "$(findstring cam5200,$@)" ] || \
+ { echo "#define CONFIG_CAM5200" >>include/config.h ; \
+ echo "#define CONFIG_TQM5200S" >>include/config.h ; \
+ echo "#define CONFIG_TQM5200_B" >>include/config.h ; \
+ echo "... TQM5200S on Cam5200" ; \
}
- @[ -z "$(findstring AB,$@)" ] || \
- { echo "#define CONFIG_TQM5200_AB" >>include/config.h ; \
- echo "... with 64 MB Flash, 64 MB SDRAM, 32 kB EEPROM, 512 kB SRAM" ; \
- echo "... with Graphics Controller"; \
+ @[ -z "$(findstring STK100,$@)" ] || \
+ { echo "#define CONFIG_STK52XX_REV100" >>include/config.h ; \
+ echo "... on a STK52XX.100 base board" ; \
}
- @[ -z "$(findstring AC,$@)" ] || \
- { echo "#define CONFIG_TQM5200_AC" >>include/config.h ; \
- echo "... with 4 MB Flash, 128 MB SDRAM" ; \
- echo "... with Graphics Controller"; \
+ @[ -z "$(findstring TQM5200_B,$@)" ] || \
+ { echo "#define CONFIG_TQM5200_B" >>include/config.h ; \
}
- @[ -z "$(findstring auto,$@)" ] || \
- { echo "#define CONFIG_CS_AUTOCONF" >>include/config.h ; \
- echo "... with automatic CS configuration" ; \
+ @[ -z "$(findstring TQM5200S,$@)" ] || \
+ { echo "#define CONFIG_TQM5200S" >>include/config.h ; \
+ echo "#define CONFIG_TQM5200_B" >>include/config.h ; \
}
- @./mkconfig -a TQM5200 ppc mpc5xxx tqm5200
-
-spieval_config: unconfig
- echo "#define CONFIG_CS_AUTOCONF">>include/config.h
- echo "... with automatic CS configuration"
- @./mkconfig -a spieval ppc mpc5xxx tqm5200
+ @[ -z "$(findstring HIGHBOOT,$@)" ] || \
+ { echo "TEXT_BASE = 0xFFF00000" >board/tqm5200/config.tmp ; \
+ }
+ @./mkconfig -n $@ -a TQM5200 ppc mpc5xxx tqm5200
#########################################################################
## MPC8xx Systems
@@ -406,6 +483,9 @@ cogent_mpc8xx_config: unconfig
ELPT860_config: unconfig
@./mkconfig $(@:_config=) ppc mpc8xx elpt860 LEOX
+EP88x_config: unconfig
+ @./mkconfig $(@:_config=) ppc mpc8xx ep88x
+
ESTEEM192E_config: unconfig
@./mkconfig $(@:_config=) ppc mpc8xx esteem192e
@@ -579,8 +659,21 @@ NETTA2_config: unconfig
}
@./mkconfig -a $(call xtract_NETTA2,$@) ppc mpc8xx netta2
-NC650_config: unconfig
- @./mkconfig $(@:_config=) ppc mpc8xx nc650
+NC650_Rev1_config \
+NC650_Rev2_config \
+CP850_config: unconfig
+ @ >include/config.h
+ @[ -z "$(findstring CP850,$@)" ] || \
+ { echo "#define CONFIG_CP850 1" >>include/config.h ; \
+ echo "#define CONFIG_IDS852_REV2 1" >>include/config.h ; \
+ }
+ @[ -z "$(findstring Rev1,$@)" ] || \
+ { echo "#define CONFIG_IDS852_REV1 1" >>include/config.h ; \
+ }
+ @[ -z "$(findstring Rev2,$@)" ] || \
+ { echo "#define CONFIG_IDS852_REV2 1" >>include/config.h ; \
+ }
+ @./mkconfig -a NC650 ppc mpc8xx nc650
NX823_config: unconfig
@./mkconfig $(@:_config=) ppc mpc8xx nx823
@@ -650,6 +743,9 @@ RRvision_LCD_config: unconfig
SM850_config : unconfig
@./mkconfig $(@:_config=) ppc mpc8xx tqm8xx
+spc1920_config:
+ @./mkconfig $(@:_config=) ppc mpc8xx spc1920
+
SPD823TS_config: unconfig
@./mkconfig $(@:_config=) ppc mpc8xx spd8xx
@@ -686,7 +782,9 @@ TQM850M_config \
TQM855M_config \
TQM860M_config \
TQM862M_config \
-TQM866M_config: unconfig
+TQM866M_config \
+TQM885D_config \
+virtlab2_config: unconfig
@ >include/config.h
@[ -z "$(findstring _LCD,$@)" ] || \
{ echo "#define CONFIG_LCD" >>include/config.h ; \
@@ -848,6 +946,9 @@ p3p440_config: unconfig
PCI405_config: unconfig
@./mkconfig $(@:_config=) ppc ppc4xx pci405 esd
+pcs440ep_config: unconfig
+ @./mkconfig $(@:_config=) ppc ppc4xx pcs440ep
+
PIP405_config: unconfig
@./mkconfig $(@:_config=) ppc ppc4xx pip405 mpl
@@ -922,6 +1023,9 @@ yosemite_config: unconfig
yellowstone_config: unconfig
@./mkconfig $(@:_config=) ppc ppc4xx yellowstone amcc
+yucca_config: unconfig
+ @./mkconfig $(@:_config=) ppc ppc4xx yucca amcc
+
#########################################################################
## MPC8220 Systems
#########################################################################
@@ -972,6 +1076,9 @@ eXalion_config: unconfig
HIDDEN_DRAGON_config: unconfig
@./mkconfig $(@:_config=) ppc mpc824x hidden_dragon
+kvme080_config: unconfig
+ @./mkconfig $(@:_config=) ppc mpc824x kvme080 etin
+
MOUSSE_config: unconfig
@./mkconfig $(@:_config=) ppc mpc824x mousse
@@ -1135,7 +1242,7 @@ PM828_config \
PM828_PCI_config \
PM828_ROMBOOT_config \
PM828_ROMBOOT_PCI_config: unconfig
- @if [ -z "$(findstring _PCI_,$@)" ] ; then \
+ @if [ "$(findstring _PCI_,$@)" ] ; then \
echo "#define CONFIG_PCI" >>include/config.h ; \
echo "... with PCI enabled" ; \
else \
@@ -1181,18 +1288,20 @@ TQM8260_AE_config \
TQM8260_AF_config \
TQM8260_AG_config \
TQM8260_AH_config \
+TQM8260_AI_config \
TQM8265_AA_config: unconfig
@case "$@" in \
- TQM8255_AA_config) CTYPE=MPC8255; CFREQ=300; CACHE=no; BMODE=8260;; \
- TQM8260_AA_config) CTYPE=MPC8260; CFREQ=200; CACHE=no; BMODE=8260;; \
- TQM8260_AB_config) CTYPE=MPC8260; CFREQ=200; CACHE=yes; BMODE=60x;; \
- TQM8260_AC_config) CTYPE=MPC8260; CFREQ=200; CACHE=yes; BMODE=60x;; \
- TQM8260_AD_config) CTYPE=MPC8260; CFREQ=300; CACHE=no; BMODE=60x;; \
- TQM8260_AE_config) CTYPE=MPC8260; CFREQ=266; CACHE=no; BMODE=8260;; \
- TQM8260_AF_config) CTYPE=MPC8260; CFREQ=300; CACHE=no; BMODE=60x;; \
- TQM8260_AG_config) CTYPE=MPC8260; CFREQ=300; CACHE=no; BMODE=8260;; \
- TQM8260_AH_config) CTYPE=MPC8260; CFREQ=300; CACHE=yes; BMODE=60x;; \
- TQM8265_AA_config) CTYPE=MPC8265; CFREQ=300; CACHE=no; BMODE=60x;; \
+ TQM8255_AA_config) CTYPE=MPC8255; CFREQ=300; CACHE=no; BMODE=8260;; \
+ TQM8260_AA_config) CTYPE=MPC8260; CFREQ=200; CACHE=no; BMODE=8260;; \
+ TQM8260_AB_config) CTYPE=MPC8260; CFREQ=200; CACHE=yes; BMODE=60x;; \
+ TQM8260_AC_config) CTYPE=MPC8260; CFREQ=200; CACHE=yes; BMODE=60x;; \
+ TQM8260_AD_config) CTYPE=MPC8260; CFREQ=300; CACHE=no; BMODE=60x;; \
+ TQM8260_AE_config) CTYPE=MPC8260; CFREQ=266; CACHE=no; BMODE=8260;; \
+ TQM8260_AF_config) CTYPE=MPC8260; CFREQ=300; CACHE=no; BMODE=60x;; \
+ TQM8260_AG_config) CTYPE=MPC8260; CFREQ=300; CACHE=no; BMODE=8260;; \
+ TQM8260_AH_config) CTYPE=MPC8260; CFREQ=300; CACHE=yes; BMODE=60x;; \
+ TQM8260_AI_config) CTYPE=MPC8260; CFREQ=300; CACHE=no; BMODE=60x;; \
+ TQM8265_AA_config) CTYPE=MPC8265; CFREQ=300; CACHE=no; BMODE=60x;; \
esac; \
>include/config.h ; \
if [ "$${CTYPE}" != "MPC8260" ] ; then \
@@ -1224,9 +1333,6 @@ VoVPN-GW_100MHz_config: unconfig
ZPC1900_config: unconfig
@./mkconfig $(@:_config=) ppc mpc8260 zpc1900
-#========================================================================
-# M68K
-#========================================================================
#########################################################################
## Coldfire
#########################################################################
@@ -1234,6 +1340,19 @@ ZPC1900_config: unconfig
cobra5272_config : unconfig
@./mkconfig $(@:_config=) m68k mcf52x2 cobra5272
+EB+MCF-EV123_config : unconfig
+ @ >include/config.h
+ @echo "TEXT_BASE = 0xFFE00000"|tee board/BuS/EB+MCF-EV123/textbase.mk
+ @./mkconfig EB+MCF-EV123 m68k mcf52x2 EB+MCF-EV123 BuS
+
+EB+MCF-EV123_internal_config : unconfig
+ @ >include/config.h
+ @echo "TEXT_BASE = 0xF0000000"|tee board/BuS/EB+MCF-EV123/textbase.mk
+ @./mkconfig EB+MCF-EV123 m68k mcf52x2 EB+MCF-EV123 BuS
+
+M5271EVB_config : unconfig
+ @./mkconfig $(@:_config=) m68k mcf52x2 m5271evb
+
M5272C3_config : unconfig
@./mkconfig $(@:_config=) m68k mcf52x2 m5272c3
@@ -1243,6 +1362,9 @@ M5282EVB_config : unconfig
TASREG_config : unconfig
@./mkconfig $(@:_config=) m68k mcf52x2 tasreg esd
+r5200_config : unconfig
+ @./mkconfig $(@:_config=) m68k mcf52x2 r5200
+
#########################################################################
## MPC83xx Systems
#########################################################################
@@ -1253,6 +1375,9 @@ MPC8349ADS_config: unconfig
TQM834x_config: unconfig
@./mkconfig $(@:_config=) ppc mpc83xx tqm834x
+MPC8349EMDS_config: unconfig
+ @./mkconfig $(@:_config=) ppc mpc83xx mpc8349emds
+
#########################################################################
## MPC85xx Systems
#########################################################################
@@ -1375,6 +1500,9 @@ PCIPPC6_config: unconfig
ZUMA_config: unconfig
@./mkconfig $(@:_config=) ppc 74xx_7xx evb64260
+ppmc7xx_config: unconfig
+ @./mkconfig $(@:_config=) ppc 74xx_7xx ppmc7xx
+
#========================================================================
# ARM
#========================================================================
@@ -1459,11 +1587,22 @@ mx1ads_config : unconfig
mx1fs2_config : unconfig
@./mkconfig $(@:_config=) arm arm920t mx1fs2 NULL imx
+netstar_32_config \
+netstar_config: unconfig
+ @if [ "$(findstring _32_,$@)" ] ; then \
+ echo "... 32MB SDRAM" ; \
+ echo "#define PHYS_SDRAM_1_SIZE SZ_32M" >>include/config.h ; \
+ else \
+ echo "... 64MB SDRAM" ; \
+ echo "#define PHYS_SDRAM_1_SIZE SZ_64M" >>include/config.h ; \
+ fi
+ @./mkconfig -a netstar arm arm925t netstar
+
omap1510inn_config : unconfig
@./mkconfig $(@:_config=) arm arm925t omap1510inn
omap5912osk_config : unconfig
- @./mkconfig $(@:_config=) arm arm926ejs omap5912osk
+ @./mkconfig $(@:_config=) arm arm926ejs omap5912osk NULL omap
omap1610inn_config \
omap1610inn_cs0boot_config \
@@ -1483,7 +1622,13 @@ omap1610h2_cs_autoboot_config: unconfig
echo "#define CONFIG_CS3_BOOT" >> ./include/config.h ; \
echo "... configured for CS3 boot"; \
fi;
- @./mkconfig -a $(call xtract_omap1610xxx,$@) arm arm926ejs omap1610inn
+ @./mkconfig -a $(call xtract_omap1610xxx,$@) arm arm926ejs omap1610inn NULL omap
+
+omap1710h3_config : unconfig
+ @./mkconfig $(@:_config=) arm arm926ejs omap1710h3
+
+omapv1030gsample_config : unconfig
+ @./mkconfig $(@:_config=) arm arm926ejs omapv1030gsample
omap730p2_config \
omap730p2_cs0boot_config \
@@ -1495,7 +1640,10 @@ omap730p2_cs3boot_config : unconfig
echo "#define CONFIG_CS3_BOOT" >> ./include/config.h ; \
echo "... configured for CS3 boot"; \
fi;
- @./mkconfig -a $(call xtract_omap730p2,$@) arm arm926ejs omap730p2
+ @./mkconfig -a $(call xtract_omap730p2,$@) arm arm926ejs omap730p2 NULL omap
+
+sbc2410x_config: unconfig
+ @./mkconfig $(@:_config=) arm arm920t sbc2410x NULL s3c24x0
scb9328_config : unconfig
@./mkconfig $(@:_config=) arm arm920t scb9328 NULL imx
@@ -1564,6 +1712,11 @@ cm4008_config : unconfig
cm41xx_config : unconfig
@./mkconfig $(@:_config=) arm arm920t cm41xx NULL ks8695
+gth2_config : unconfig
+ @ >include/config.h
+ @echo "#define CONFIG_GTH2 1" >>include/config.h
+ @./mkconfig -a gth2 mips mips gth2
+
#########################################################################
## S3C44B0 Systems
#########################################################################
@@ -1606,18 +1759,30 @@ cradle_config : unconfig
csb226_config : unconfig
@./mkconfig $(@:_config=) arm pxa csb226
+delta_config :
+ @./mkconfig $(@:_config=) arm pxa delta
+
innokom_config : unconfig
@./mkconfig $(@:_config=) arm pxa innokom
ixdp425_config : unconfig
@./mkconfig $(@:_config=) arm ixp ixdp425
+ixdpg425_config : unconfig
+ @./mkconfig $(@:_config=) arm ixp ixdp425
+
lubbock_config : unconfig
@./mkconfig $(@:_config=) arm pxa lubbock
+pleb2_config : unconfig
+ @./mkconfig $(@:_config=) arm pxa pleb2
+
logodl_config : unconfig
@./mkconfig $(@:_config=) arm pxa logodl
+pdnb3_config : unconfig
+ @./mkconfig $(@:_config=) arm ixp pdnb3 prodrive
+
pxa255_idp_config: unconfig
@./mkconfig $(@:_config=) arm pxa pxa255_idp
@@ -1633,12 +1798,34 @@ xm250_config : unconfig
xsengine_config : unconfig
@./mkconfig $(@:_config=) arm pxa xsengine
+zylonite_config :
+ @./mkconfig $(@:_config=) arm pxa zylonite
+
#########################################################################
## ARM1136 Systems
#########################################################################
+xtract_omap2430 = $(subst _gdp,,$(subst _config,,$1))
+
omap2420h4_config : unconfig
@./mkconfig $(@:_config=) arm arm1136 omap2420h4
+omap2430sdp_gdp_config \
+omap2430sdp_config : unconfig
+ @if [ "$(findstring _gdp_, $@)" ] ; then \
+ echo "#define OMAP2430_SDP_GDP_CONFIG" >> ./include/config.h ; \
+ echo "Configuring for GDP and .. "; \
+ fi;
+ @./mkconfig -a $(call xtract_omap2430,$@) arm arm1136 omap2430sdp
+
+#########################################################################
+## ARM CORTEX Systems
+#########################################################################
+omap3430sdp_config : unconfig
+ @./mkconfig $(@:_config=) arm omap3 omap3430sdp
+
+omap3430labrador_config : unconfig
+ @./mkconfig $(@:_config=) arm omap3 omap3430labrador
+
#========================================================================
# i386
#========================================================================
@@ -1795,6 +1982,15 @@ ADNPESC1_config: unconfig
## Nios-II
#########################################################################
+EP1C20_config : unconfig
+ @./mkconfig EP1C20 nios2 nios2 ep1c20 altera
+
+EP1S10_config : unconfig
+ @./mkconfig EP1S10 nios2 nios2 ep1s10 altera
+
+EP1S40_config : unconfig
+ @./mkconfig EP1S40 nios2 nios2 ep1s40 altera
+
PK1C20_config : unconfig
@./mkconfig PK1C20 nios2 nios2 pk1c20 psyent
@@ -1813,6 +2009,19 @@ suzaku_config: unconfig
@./mkconfig -a $(@:_config=) microblaze microblaze suzaku AtmarkTechno
#########################################################################
+## Blackfin
+#########################################################################
+ezkit533_config : unconfig
+ @./mkconfig $(@:_config=) blackfin bf533 ezkit533
+
+stamp_config : unconfig
+ @./mkconfig $(@:_config=) blackfin bf533 stamp
+
+dspstamp_config : unconfig
+ @./mkconfig $(@:_config=) blackfin bf533 dsp_stamp
+
+#########################################################################
+#########################################################################
#########################################################################
clean:
@@ -1823,6 +2032,7 @@ clean:
rm -f examples/hello_world examples/timer \
examples/eepro100_eeprom examples/sched \
examples/mem_to_mem_idma2intr examples/82559_eeprom \
+ examples/smc91111_eeprom \
examples/test_burst
rm -f tools/img2srec tools/mkimage tools/envcrc tools/gen_eth_addr
rm -f tools/mpc86x_clk tools/ncb
@@ -1830,15 +2040,18 @@ clean:
rm -f tools/gdb/astest tools/gdb/gdbcont tools/gdb/gdbsend
rm -f tools/env/fw_printenv tools/env/fw_setenv
rm -f board/cray/L1/bootscript.c board/cray/L1/bootscript.image
+ rm -f board/netstar/eeprom board/netstar/crcek
+ rm -f board/netstar/*.srec board/netstar/*.bin
rm -f board/trab/trab_fkt board/voiceblue/eeprom
rm -f board/integratorap/u-boot.lds board/integratorcp/u-boot.lds
+ rm -f include/bmp_logo.h
clobber: clean
find . -type f \( -name .depend \
-o -name '*.srec' -o -name '*.bin' -o -name u-boot.img \) \
-print0 \
| xargs -0 rm -f
- rm -f $(OBJS) *.bak tags TAGS
+ rm -f $(OBJS) *.bak tags TAGS include/version_autogenerated.h
rm -fr *.*~
rm -f u-boot u-boot.map u-boot.hex $(ALL)
rm -f tools/crc32.c tools/environment.c tools/env/crc32.c
diff --git a/README b/README
index 6f61008222..e772c1af00 100644
--- a/README
+++ b/README
@@ -246,6 +246,7 @@ The following options need to be configured:
CONFIG_SA1110
CONFIG_ARM7
CONFIG_PXA250
+ CONFIG_CPU_MONAHANS
MicroBlaze based CPUs:
----------------------
@@ -261,56 +262,57 @@ The following options need to be configured:
PowerPC based boards:
---------------------
- CONFIG_ADCIOP CONFIG_GEN860T CONFIG_PCIPPC2
- CONFIG_ADS860 CONFIG_GENIETV CONFIG_PCIPPC6
- CONFIG_AMX860 CONFIG_GTH CONFIG_pcu_e
- CONFIG_AP1000 CONFIG_gw8260 CONFIG_PIP405
- CONFIG_AR405 CONFIG_hermes CONFIG_PM826
- CONFIG_BAB7xx CONFIG_hymod CONFIG_ppmc8260
- CONFIG_c2mon CONFIG_IAD210 CONFIG_QS823
- CONFIG_CANBT CONFIG_ICU862 CONFIG_QS850
- CONFIG_CCM CONFIG_IP860 CONFIG_QS860T
- CONFIG_CMI CONFIG_IPHASE4539 CONFIG_RBC823
- CONFIG_cogent_mpc8260 CONFIG_IVML24 CONFIG_RPXClassic
- CONFIG_cogent_mpc8xx CONFIG_IVML24_128 CONFIG_RPXlite
- CONFIG_CPCI405 CONFIG_IVML24_256 CONFIG_RPXsuper
- CONFIG_CPCI4052 CONFIG_IVMS8 CONFIG_rsdproto
- CONFIG_CPCIISER4 CONFIG_IVMS8_128 CONFIG_sacsng
- CONFIG_CPU86 CONFIG_IVMS8_256 CONFIG_Sandpoint8240
- CONFIG_CRAYL1 CONFIG_JSE CONFIG_Sandpoint8245
- CONFIG_CSB272 CONFIG_LANTEC CONFIG_sbc8260
- CONFIG_CU824 CONFIG_lwmon CONFIG_sbc8560
- CONFIG_DASA_SIM CONFIG_MBX CONFIG_SM850
- CONFIG_DB64360 CONFIG_MBX860T CONFIG_SPD823TS
- CONFIG_DB64460 CONFIG_MHPC CONFIG_STXGP3
- CONFIG_DU405 CONFIG_MIP405 CONFIG_SXNI855T
- CONFIG_DUET_ADS CONFIG_MOUSSE CONFIG_TQM823L
- CONFIG_EBONY CONFIG_MPC8260ADS CONFIG_TQM8260
- CONFIG_ELPPC CONFIG_MPC8540ADS CONFIG_TQM850L
- CONFIG_ELPT860 CONFIG_MPC8540EVAL CONFIG_TQM855L
- CONFIG_ep8260 CONFIG_MPC8560ADS CONFIG_TQM860L
- CONFIG_ERIC CONFIG_MUSENKI CONFIG_TTTech
- CONFIG_ESTEEM192E CONFIG_MVS1 CONFIG_UTX8245
- CONFIG_ETX094 CONFIG_NETPHONE CONFIG_V37
- CONFIG_EVB64260 CONFIG_NETTA CONFIG_W7OLMC
- CONFIG_FADS823 CONFIG_NETVIA CONFIG_W7OLMG
- CONFIG_FADS850SAR CONFIG_NX823 CONFIG_WALNUT
- CONFIG_FADS860T CONFIG_OCRTC CONFIG_ZPC1900
- CONFIG_FLAGADM CONFIG_ORSG CONFIG_ZUMA
- CONFIG_FPS850L CONFIG_OXC
- CONFIG_FPS860L CONFIG_PCI405
+ CONFIG_ADCIOP CONFIG_FPS860L CONFIG_OXC
+ CONFIG_ADS860 CONFIG_GEN860T CONFIG_PCI405
+ CONFIG_AMX860 CONFIG_GENIETV CONFIG_PCIPPC2
+ CONFIG_AP1000 CONFIG_GTH CONFIG_PCIPPC6
+ CONFIG_AR405 CONFIG_gw8260 CONFIG_pcu_e
+ CONFIG_BAB7xx CONFIG_hermes CONFIG_PIP405
+ CONFIG_BC3450 CONFIG_hymod CONFIG_PM826
+ CONFIG_c2mon CONFIG_IAD210 CONFIG_ppmc8260
+ CONFIG_CANBT CONFIG_ICU862 CONFIG_QS823
+ CONFIG_CCM CONFIG_IP860 CONFIG_QS850
+ CONFIG_CMI CONFIG_IPHASE4539 CONFIG_QS860T
+ CONFIG_cogent_mpc8260 CONFIG_IVML24 CONFIG_RBC823
+ CONFIG_cogent_mpc8xx CONFIG_IVML24_128 CONFIG_RPXClassic
+ CONFIG_CPCI405 CONFIG_IVML24_256 CONFIG_RPXlite
+ CONFIG_CPCI4052 CONFIG_IVMS8 CONFIG_RPXsuper
+ CONFIG_CPCIISER4 CONFIG_IVMS8_128 CONFIG_rsdproto
+ CONFIG_CPU86 CONFIG_IVMS8_256 CONFIG_sacsng
+ CONFIG_CRAYL1 CONFIG_JSE CONFIG_Sandpoint8240
+ CONFIG_CSB272 CONFIG_LANTEC CONFIG_Sandpoint8245
+ CONFIG_CU824 CONFIG_LITE5200B CONFIG_sbc8260
+ CONFIG_DASA_SIM CONFIG_lwmon CONFIG_sbc8560
+ CONFIG_DB64360 CONFIG_MBX CONFIG_SM850
+ CONFIG_DB64460 CONFIG_MBX860T CONFIG_SPD823TS
+ CONFIG_DU405 CONFIG_MHPC CONFIG_STXGP3
+ CONFIG_DUET_ADS CONFIG_MIP405 CONFIG_SXNI855T
+ CONFIG_EBONY CONFIG_MOUSSE CONFIG_TQM823L
+ CONFIG_ELPPC CONFIG_MPC8260ADS CONFIG_TQM8260
+ CONFIG_ELPT860 CONFIG_MPC8540ADS CONFIG_TQM850L
+ CONFIG_ep8260 CONFIG_MPC8540EVAL CONFIG_TQM855L
+ CONFIG_ERIC CONFIG_MPC8560ADS CONFIG_TQM860L
+ CONFIG_ESTEEM192E CONFIG_MUSENKI CONFIG_TTTech
+ CONFIG_ETX094 CONFIG_MVS1 CONFIG_UTX8245
+ CONFIG_EVB64260 CONFIG_NETPHONE CONFIG_V37
+ CONFIG_FADS823 CONFIG_NETTA CONFIG_W7OLMC
+ CONFIG_FADS850SAR CONFIG_NETVIA CONFIG_W7OLMG
+ CONFIG_FADS860T CONFIG_NX823 CONFIG_WALNUT
+ CONFIG_FLAGADM CONFIG_OCRTC CONFIG_ZPC1900
+ CONFIG_FPS850L CONFIG_ORSG CONFIG_ZUMA
ARM based boards:
-----------------
CONFIG_ARMADILLO, CONFIG_AT91RM9200DK, CONFIG_CERF250,
- CONFIG_CSB637, CONFIG_DNP1110, CONFIG_EP7312,
- CONFIG_H2_OMAP1610, CONFIG_HHP_CRADLE, CONFIG_IMPA7,
- CONFIG_INNOVATOROMAP1510, CONFIG_INNOVATOROMAP1610, CONFIG_KB9202,
- CONFIG_LART, CONFIG_LPD7A400, CONFIG_LUBBOCK,
- CONFIG_OSK_OMAP5912, CONFIG_OMAP2420H4, CONFIG_SHANNON,
- CONFIG_P2_OMAP730, CONFIG_SMDK2400, CONFIG_SMDK2410,
- CONFIG_TRAB, CONFIG_VCMA9
+ CONFIG_CSB637, CONFIG_DELTA, CONFIG_DNP1110,
+ CONFIG_EP7312, CONFIG_H2_OMAP1610, CONFIG_HHP_CRADLE,
+ CONFIG_IMPA7, CONFIG_INNOVATOROMAP1510, CONFIG_INNOVATOROMAP1610,
+ CONFIG_KB9202, CONFIG_LART, CONFIG_LPD7A400,
+ CONFIG_LUBBOCK, CONFIG_OSK_OMAP5912, CONFIG_OMAP2420H4,
+ CONFIG_PLEB2, CONFIG_SHANNON, CONFIG_P2_OMAP730,
+ CONFIG_SMDK2400, CONFIG_SMDK2410, CONFIG_TRAB,
+ CONFIG_VCMA9
MicroBlaze based boards:
------------------------
@@ -321,6 +323,7 @@ The following options need to be configured:
------------------------
CONFIG_PCI5441 CONFIG_PK1C20
+ CONFIG_EP1C20 CONFIG_EP1S10 CONFIG_EP1S40
- CPU Module Type: (if CONFIG_COGENT is defined)
@@ -379,6 +382,20 @@ The following options need to be configured:
that this requires a (stable) reference clock (32 kHz
RTC clock or CFG_8XX_XIN)
+- Intel Monahans options:
+ CFG_MONAHANS_RUN_MODE_OSC_RATIO
+
+ Defines the Monahans run mode to oscillator
+ ratio. Valid values are 8, 16, 24, 31. The core
+ frequency is this value multiplied by 13 MHz.
+
+ CFG_MONAHANS_TURBO_RUN_MODE_RATIO
+
+ Defines the Monahans turbo mode to oscillator
+ ratio. Valid values are 1 (default if undefined) and
+ 2. The core frequency as calculated above is multiplied
+ by this value.
+
- Linux Kernel Interface:
CONFIG_CLOCKS_IN_MHZ
@@ -411,7 +428,24 @@ The following options need to be configured:
The maximum size of the constructed OF tree.
OF_CPU - The proper name of the cpus node.
+ OF_SOC - The proper name of the soc node.
OF_TBCLK - The timebase frequency.
+ OF_STDOUT_PATH - The path to the console device
+
+ CONFIG_OF_HAS_BD_T
+
+ The resulting flat device tree will have a copy of the bd_t.
+ Space should be pre-allocated in the dts for the bd_t.
+
+ CONFIG_OF_HAS_UBOOT_ENV
+
+ The resulting flat device tree will have a copy of u-boot's
+ environment variables
+
+ CONFIG_OF_BOARD_SETUP
+
+ Board code has addition modification that it wants to make
+ to the flat device tree before handing it off to the kernel
- Serial Ports:
CFG_PL010_SERIAL
@@ -606,7 +640,7 @@ The following options need to be configured:
CFG_CMD_DIAG * Diagnostics
CFG_CMD_DOC * Disk-On-Chip Support
CFG_CMD_DTT * Digital Therm and Thermostat
- CFG_CMD_ECHO * echo arguments
+ CFG_CMD_ECHO echo arguments
CFG_CMD_EEPROM * EEPROM read/write support
CFG_CMD_ELF * bootelf, bootvx
CFG_CMD_ENV saveenv
@@ -1456,6 +1490,12 @@ The following options need to be configured:
of the backslashes before semicolons and special
symbols.
+- Commandline Editing and History:
+ CONFIG_CMDLINE_EDITING
+
+ Enable editiong and History functions for interactive
+ commandline input operations
+
- Default Environment:
CONFIG_EXTRA_ENV_SETTINGS
@@ -1717,6 +1757,12 @@ Configuration Settings:
- CFG_MALLOC_LEN:
Size of DRAM reserved for malloc() use.
+- CFG_BOOTM_LEN:
+ Normally compressed uImages are limited to an
+ uncompressed size of 8 MBytes. If this is not enough,
+ you can define CFG_BOOTM_LEN in your board config file
+ to adjust this setting to your needs.
+
- CFG_BOOTMAPSZ:
Maximum size of memory mapped by the startup code of
the Linux kernel; all data that must be processed by
@@ -1946,6 +1992,17 @@ to save the current settings.
These two #defines specify the offset and size of the environment
area within the first NAND device.
+ - CFG_ENV_OFFSET_REDUND
+
+ This setting describes a second storage area of CFG_ENV_SIZE
+ size used to hold a redundant copy of the environment data,
+ so that there is a valid backup copy in case there is a
+ power failure during a "saveenv" operation.
+
+ Note: CFG_ENV_OFFSET and CFG_ENV_OFFSET_REDUND must be aligned
+ to a block boundary, and CFG_ENV_SIZE must be a multiple of
+ the NAND devices block size.
+
- CFG_SPI_INIT_OFFSET
Defines offset to the initial SPI buffer area in DPRAM. The
@@ -3260,6 +3317,8 @@ On ARM, the following registers are used:
==> U-Boot will use R8 to hold a pointer to the global data
+NOTE: DECLARE_GLOBAL_DATA_PTR must be used with file-global scope,
+or current versions of GCC may "optimize" the code too much.
Memory Management:
------------------
diff --git a/blackfin_config.mk b/blackfin_config.mk
new file mode 100644
index 0000000000..e2747aafe9
--- /dev/null
+++ b/blackfin_config.mk
@@ -0,0 +1,24 @@
+#
+# (C) Copyright 2000-2002
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+PLATFORM_CPPFLAGS += -DCONFIG_BLACKFIN -D__blackfin__
diff --git a/board/AtmarkTechno/suzaku/Makefile b/board/AtmarkTechno/suzaku/Makefile
deleted file mode 100644
index 7a17067936..0000000000
--- a/board/AtmarkTechno/suzaku/Makefile
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# (C) Copyright 2003
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/AtmarkTechno/suzaku/config.mk b/board/AtmarkTechno/suzaku/config.mk
deleted file mode 100644
index 7bbf2b130e..0000000000
--- a/board/AtmarkTechno/suzaku/config.mk
+++ /dev/null
@@ -1,29 +0,0 @@
-#
-# (C) Copyright 2004 Atmark Techno, Inc.
-#
-# Yasushi SHOJI <yashi@atmark-techno.com>
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-TEXT_BASE = 0x80F00000
-
-PLATFORM_CPPFLAGS += -mno-xl-soft-mul
-PLATFORM_CPPFLAGS += -mno-xl-soft-div
-PLATFORM_CPPFLAGS += -mxl-barrel-shift
diff --git a/board/AtmarkTechno/suzaku/flash.c b/board/AtmarkTechno/suzaku/flash.c
deleted file mode 100644
index 49a06733a5..0000000000
--- a/board/AtmarkTechno/suzaku/flash.c
+++ /dev/null
@@ -1,46 +0,0 @@
-/*
- * (C) Copyright 2004 Atmark Techno, Inc.
- *
- * Yasushi SHOJI <yashi@atmark-techno.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
-
-unsigned long flash_init(void)
-{
- return 0;
-}
-
-void flash_print_info(flash_info_t *info)
-{
-}
-
-int flash_erase(flash_info_t *info, int s_first, int s_last)
-{
- return 0;
-}
-
-int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- return 0;
-}
diff --git a/board/AtmarkTechno/suzaku/suzaku.c b/board/AtmarkTechno/suzaku/suzaku.c
deleted file mode 100644
index afe124a9d3..0000000000
--- a/board/AtmarkTechno/suzaku/suzaku.c
+++ /dev/null
@@ -1,32 +0,0 @@
-/*
- * (C) Copyright 2004 Atmark Techno, Inc.
- *
- * Yasushi SHOJI <yashi@atmark-techno.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/* This is a board specific file. It's OK to include board specific
- * header files */
-#include <asm/suzaku.h>
-
-void do_reset(void)
-{
- *((unsigned long *)(MICROBLAZE_SYSREG_BASE_ADDR)) = MICROBLAZE_SYSREG_RECONFIGURE;
-}
diff --git a/board/AtmarkTechno/suzaku/u-boot.lds b/board/AtmarkTechno/suzaku/u-boot.lds
deleted file mode 100644
index 00a8ef7ad9..0000000000
--- a/board/AtmarkTechno/suzaku/u-boot.lds
+++ /dev/null
@@ -1,66 +0,0 @@
-/*
- * (C) Copyright 2004 Atmark Techno, Inc.
- *
- * Yasushi SHOJI <yashi@atmark-techno.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(microblaze)
-ENTRY(_start)
-
-SECTIONS
-{
- .text ALIGN(0x4):
- {
- __text_start = .;
- cpu/microblaze/start.o (.text)
- *(.text)
- __text_end = .;
- }
-
- .rodata ALIGN(0x4):
- {
- __rodata_start = .;
- *(.rodata)
- __rodata_end = .;
- }
-
- .data ALIGN(0x4):
- {
- __data_start = .;
- *(.data)
- __data_end = .;
- }
-
- .u_boot_cmd ALIGN(0x4):
- {
- . = .;
- __u_boot_cmd_start = .;
- *(.u_boot_cmd)
- __u_boot_cmd_end = .;
- }
-
- .bss ALIGN(0x4):
- {
- __bss_start = .;
- *(.bss)
- __bss_start = .;
- }
-}
diff --git a/board/LEOX/elpt860/Makefile b/board/LEOX/elpt860/Makefile
deleted file mode 100644
index 3e731636e0..0000000000
--- a/board/LEOX/elpt860/Makefile
+++ /dev/null
@@ -1,48 +0,0 @@
-
-#######################################################################
-#
-# Copyright (C) 2000, 2001, 2002, 2003
-# The LEOX team <team@leox.org>, http://www.leox.org
-#
-# LEOX.org is about the development of free hardware and software resources
-# for system on chip.
-#
-# Description: U-Boot port on the LEOX's ELPT860 CPU board
-# ~~~~~~~~~~~
-#
-#######################################################################
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-#######################################################################
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/LEOX/elpt860/README.LEOX b/board/LEOX/elpt860/README.LEOX
deleted file mode 100644
index 9052b097b4..0000000000
--- a/board/LEOX/elpt860/README.LEOX
+++ /dev/null
@@ -1,424 +0,0 @@
-=============================================================================
-
- U-Boot port on the LEOX's ELPT860 CPU board
- -------------------------------------------
-
-LEOX.org is about the development of free hardware and software resources
- for system on chip.
-
-For more information, contact The LEOX team <team@leox.org>
-
-References:
-~~~~~~~~~~
- 1) Get the last stable release from denx.de:
- o ftp://ftp.denx.de/pub/u-boot/u-boot-0.2.0.tar.bz2
- 2) Get the current CVS snapshot:
- o cvs -d:pserver:anonymous@cvs.u-boot.sourceforge.net:/cvsroot/u-boot login
- o cvs -z6 -d:pserver:anonymous@cvs.u-boot.sourceforge.net:/cvsroot/u-boot co -P u-boot
-
-=============================================================================
-
-The ELPT860 CPU board has the following features:
-
-Processor: - MPC860T @ 50MHz
- - PowerPC Core
- - 65 MIPS
- - Caches: D->4KB, I->4KB
- - CPM: 4 SCCs, 2 SMCs
- - Ethernet 10/100
- - SPI, I2C, PCMCIA, Parallel
-
-CPU board: - DRAM: 16 MB
- - FLASH: 512 KB + (2 * 4 MB)
- - NVRAM: 128 KB
- - 1 Serial link
- - 2 Ethernet 10 BaseT Channels
-
-On power-up the processor jumps to the address of 0x02000100
-
-Thus, U-Boot is configured to reside in flash starting at the address of
-0x02001000. The environment space is located in NVRAM separately from
-U-Boot, at the address of 0x03000000.
-
-=============================================================================
-
- U-Boot test results
-
-=============================================================================
-
-
-##################################################
-# Operation on the serial console (SMC1)
-##############################
-
-U-Boot 0.2.2 (Jan 19 2003 - 11:08:39)
-
-CPU: XPC860xxZPnnB at 50 MHz: 4 kB I-Cache 4 kB D-Cache FEC present
- *** Warning: CPU Core has Silicon Bugs -- Check the Errata ***
-Board: ### No HW ID - assuming ELPT860
-DRAM: 16 MB
-FLASH: 512 kB
-In: serial
-Out: serial
-Err: serial
-Net: SCC ETHERNET
-
-Type "run nfsboot" to mount root filesystem over NFS
-
-Hit any key to stop autoboot: 0
-LEOX_elpt860: help
-askenv - get environment variables from stdin
-autoscr - run script from memory
-base - print or set address offset
-bdinfo - print Board Info structure
-bootm - boot application image from memory
-bootp - boot image via network using BootP/TFTP protocol
-bootd - boot default, i.e., run 'bootcmd'
-cmp - memory compare
-coninfo - print console devices and informations
-cp - memory copy
-crc32 - checksum calculation
-echo - echo args to console
-erase - erase FLASH memory
-flinfo - print FLASH memory information
-go - start application at address 'addr'
-help - print online help
-iminfo - print header information for application image
-loadb - load binary file over serial line (kermit mode)
-loads - load S-Record file over serial line
-loop - infinite loop on address range
-md - memory display
-mm - memory modify (auto-incrementing)
-mtest - simple RAM test
-mw - memory write (fill)
-nm - memory modify (constant address)
-printenv- print environment variables
-protect - enable or disable FLASH write protection
-rarpboot- boot image via network using RARP/TFTP protocol
-reset - Perform RESET of the CPU
-run - run commands in an environment variable
-saveenv - save environment variables to persistent storage
-setenv - set environment variables
-sleep - delay execution for some time
-tftpboot- boot image via network using TFTP protocol
- and env variables ipaddr and serverip
-version - print monitor version
-? - alias for 'help'
-
-##################################################
-# Environment Variables (CFG_ENV_IS_IN_NVRAM)
-##############################
-
-LEOX_elpt860: printenv
-bootdelay=5
-loads_echo=1
-baudrate=9600
-stdin=serial
-stdout=serial
-stderr=serial
-ethaddr=00:03:ca:00:64:df
-ipaddr=192.168.0.30
-netmask=255.255.255.0
-serverip=192.168.0.1
-nfsserverip=192.168.0.1
-preboot=echo;echo Type "run nfsboot" to mount root filesystem over NFS;echo
-gatewayip=192.168.0.1
-ramargs=setenv bootargs root=/dev/ram rw
-rootargs=setenv rootpath /tftp/${ipaddr}
-nfsargs=setenv bootargs root=/dev/nfs rw nfsroot=${nfsserverip}:${rootpath}
-addip=setenv bootargs ${bootargs} ip=${ipaddr}:${nfsserverip}:${gatewayip}:${netmask}:${hostname}:eth0:
-ramboot=tftp 400000 /home/leox/pMulti;run ramargs;bootm
-nfsboot=tftp 400000 /home/leox/uImage;run rootargs;run nfsargs;run addip;bootm
-bootcmd=run ramboot
-clocks_in_mhz=1
-
-Environment size: 730/16380 bytes
-
-##################################################
-# Flash Memory Information
-##############################
-
-LEOX_elpt860: flinfo
-
-Bank # 1: AMD AM29F040 (4 Mbits)
- Size: 512 KB in 8 Sectors
- Sector Start Addresses:
- 02000000 (RO) 02010000 (RO) 02020000 (RO) 02030000 (RO) 02040000
- 02050000 02060000 02070000
-
-##################################################
-# Board Information Structure
-##############################
-
-LEOX_elpt860: bdinfo
-memstart = 0x00000000
-memsize = 0x01000000
-flashstart = 0x02000000
-flashsize = 0x00080000
-flashoffset = 0x00030000
-sramstart = 0x00000000
-sramsize = 0x00000000
-immr_base = 0xFF000000
-bootflags = 0x00000001
-intfreq = 50 MHz
-busfreq = 50 MHz
-ethaddr = 00:03:ca:00:64:df
-IP addr = 192.168.0.30
-baudrate = 9600 bps
-
-##################################################
-# Image Download and run over serial port
-# hello_world (S-Record image)
-# ===> 1) Enter "loads" command into U-Boot monitor
-# ===> 2) From TeraTerm's bar menu, Select 'File/Send file...'
-# Then select 'hello_world.srec' with the file browser
-##############################
-
-U-Boot 0.2.2 (Jan 19 2003 - 11:08:39)
-
-CPU: XPC860xxZPnnB at 50 MHz: 4 kB I-Cache 4 kB D-Cache FEC present
- *** Warning: CPU Core has Silicon Bugs -- Check the Errata ***
-Board: ### No HW ID - assuming ELPT860
-DRAM: 16 MB
-FLASH: 512 kB
-In: serial
-Out: serial
-Err: serial
-Net: SCC ETHERNET
-
-Type "run nfsboot" to mount root filesystem over NFS
-
-Hit any key to stop autoboot: 0
-LEOX_elpt860: loads
-## Ready for S-Record download ...
-S804040004F3050154000501709905014C000501388D
-## First Load Addr = 0x00040000
-## Last Load Addr = 0x0005018B
-## Total Size = 0x0001018C = 65932 Bytes
-## Start Addr = 0x00040004
-LEOX_elpt860: go 40004 This is a test !!!
-## Starting application at 0x00040004 ...
-Hello World
-argc = 6
-argv[0] = "40004"
-argv[1] = "This"
-argv[2] = "is"
-argv[3] = "a"
-argv[4] = "test"
-argv[5] = "!!!"
-argv[6] = "<NULL>"
-Hit any key to exit ...
-
-## Application terminated, rc = 0x0
-
-##################################################
-# Image download and run over ethernet interface
-# Linux-2.4.4 (uImage) + Root filesystem mounted over NFS
-##############################
-
-U-Boot 0.2.2 (Jan 19 2003 - 11:08:39)
-
-CPU: XPC860xxZPnnB at 50 MHz: 4 kB I-Cache 4 kB D-Cache FEC present
- *** Warning: CPU Core has Silicon Bugs -- Check the Errata ***
-Board: ### No HW ID - assuming ELPT860
-DRAM: 16 MB
-FLASH: 512 kB
-In: serial
-Out: serial
-Err: serial
-Net: SCC ETHERNET
-
-Type "run nfsboot" to mount root filesystem over NFS
-
-Hit any key to stop autoboot: 0
-LEOX_elpt860: run nfsboot
-ARP broadcast 1
-TFTP from server 192.168.0.1; our IP address is 192.168.0.30
-Filename '/home/leox/uImage'.
-Load address: 0x400000
-Loading: #################################################################
- #############################
-done
-Bytes transferred = 477294 (7486e hex)
-## Booting image at 00400000 ...
- Image Name: Linux-2.4.4
- Image Type: PowerPC Linux Kernel Image (gzip compressed)
- Data Size: 477230 Bytes = 466 kB = 0 MB
- Load Address: 00000000
- Entry Point: 00000000
- Verifying Checksum ... OK
- Uncompressing Kernel Image ... OK
-Linux version 2.4.4-rthal5 (leox@p5ak6650) (gcc version 2.95.3 20010315 (release/MontaVista)) #1 Wed Jul 3 10:23:53 CEST 2002
-On node 0 totalpages: 4096
-zone(0): 4096 pages.
-zone(1): 0 pages.
-zone(2): 0 pages.
-Kernel command line: root=/dev/nfs rw nfsroot=192.168.0.1:/tftp/192.168.0.30 ip=192.168.0.30:192.168.0.1:192.168.0.1:255.255.255.0::eth0:
-rtsched version <20010618.1050.24>
-Decrementer Frequency: 3125000
-Warning: real time clock seems stuck!
-Calibrating delay loop... 49.76 BogoMIPS
-Memory: 14720k available (928k kernel code, 384k data, 44k init, 0k highmem)
-Dentry-cache hash table entries: 2048 (order: 2, 16384 bytes)
-Buffer-cache hash table entries: 1024 (order: 0, 4096 bytes)
-Page-cache hash table entries: 4096 (order: 2, 16384 bytes)
-Inode-cache hash table entries: 1024 (order: 1, 8192 bytes)
-POSIX conformance testing by UNIFIX
-Linux NET4.0 for Linux 2.4
-Based upon Swansea University Computer Society NET3.039
-Starting kswapd v1.8
-CPM UART driver version 0.03
-ttyS0 on SMC1 at 0x0280, BRG1
-block: queued sectors max/low 9701kB/3233kB, 64 slots per queue
-RAMDISK driver initialized: 16 RAM disks of 4096K size 1024 blocksize
-eth0: CPM ENET Version 0.2 on SCC1, 00:03:ca:00:64:df
-NET4: Linux TCP/IP 1.0 for NET4.0
-IP Protocols: ICMP, UDP, TCP
-IP: routing cache hash table of 512 buckets, 4Kbytes
-TCP: Hash tables configured (established 1024 bind 1024)
-NET4: Unix domain sockets 1.0/SMP for Linux NET4.0.
-Looking up port of RPC 100003/2 on 192.168.0.1
-Looking up port of RPC 100005/2 on 192.168.0.1
-VFS: Mounted root (nfs filesystem).
-Freeing unused kernel memory: 44k init
-INIT: version 2.78 booting
- Welcome to DENX Embedded Linux Environment
- Press 'I' to enter interactive startup.
-Mounting proc filesystem: [ OK ]
-Configuring kernel parameters: [ OK ]
-Cannot access the Hardware Clock via any known method.
-Use the --debug option to see the details of our search for an access method.
-Setting clock : Wed Dec 31 19:00:11 EST 1969 [ OK ]
-Activating swap partitions: [ OK ]
-Setting hostname 192.168.0.30: [ OK ]
-Finding module dependencies:
-[ OK ]
-Checking filesystems
-Checking all file systems.
-[ OK ]
-Mounting local filesystems: [ OK ]
-Enabling swap space: [ OK ]
-INIT: Entering runlevel: 3
-Entering non-interactive startup
-Starting system logger: [ OK ]
-Starting kernel logger: [ OK ]
-Starting xinetd: [ OK ]
-
-192 login: root
-Last login: Wed Dec 31 19:00:41 on ttyS0
-bash-2.04#
-
-##################################################
-# Image download and run over ethernet interface
-# Linux-2.4.4 + Root filesystem mounted from RAM (pMulti)
-##############################
-
-U-Boot 0.2.2 (Jan 19 2003 - 11:08:39)
-
-CPU: XPC860xxZPnnB at 50 MHz: 4 kB I-Cache 4 kB D-Cache FEC present
- *** Warning: CPU Core has Silicon Bugs -- Check the Errata ***
-Board: ### No HW ID - assuming ELPT860
-DRAM: 16 MB
-FLASH: 512 kB
-In: serial
-Out: serial
-Err: serial
-Net: SCC ETHERNET
-
-Type "run nfsboot" to mount root filesystem over NFS
-
-Hit any key to stop autoboot: 0
-LEOX_elpt860: run ramboot
-ARP broadcast 1
-TFTP from server 192.168.0.1; our IP address is 192.168.0.30
-Filename '/home/leox/pMulti'.
-Load address: 0x400000
-Loading: #################################################################
- #################################################################
- #################################################################
- #################################################################
- #################################################################
- ########################################################
-done
-Bytes transferred = 1947816 (1db8a8 hex)
-## Booting image at 00400000 ...
- Image Name: linux-2.4.4-2002-03-21 Multiboot
- Image Type: PowerPC Linux Multi-File Image (gzip compressed)
- Data Size: 1947752 Bytes = 1902 kB = 1 MB
- Load Address: 00000000
- Entry Point: 00000000
- Contents:
- Image 0: 477230 Bytes = 466 kB = 0 MB
- Image 1: 1470508 Bytes = 1436 kB = 1 MB
- Verifying Checksum ... OK
- Uncompressing Multi-File Image ... OK
- Loading Ramdisk to 00e44000, end 00fab02c ... OK
-Linux version 2.4.4-rthal5 (leox@p5ak6650) (gcc version 2.95.3 20010315 (release/MontaVista)) #1 Wed Jul 3 10:23:53 CEST 2002
-On node 0 totalpages: 4096
-zone(0): 4096 pages.
-zone(1): 0 pages.
-zone(2): 0 pages.
-Kernel command line: root=/dev/ram rw
-rtsched version <20010618.1050.24>
-Decrementer Frequency: 3125000
-Warning: real time clock seems stuck!
-Calibrating delay loop... 49.76 BogoMIPS
-Memory: 13280k available (928k kernel code, 384k data, 44k init, 0k highmem)
-Dentry-cache hash table entries: 2048 (order: 2, 16384 bytes)
-Buffer-cache hash table entries: 1024 (order: 0, 4096 bytes)
-Page-cache hash table entries: 4096 (order: 2, 16384 bytes)
-Inode-cache hash table entries: 1024 (order: 1, 8192 bytes)
-POSIX conformance testing by UNIFIX
-Linux NET4.0 for Linux 2.4
-Based upon Swansea University Computer Society NET3.039
-Starting kswapd v1.8
-CPM UART driver version 0.03
-ttyS0 on SMC1 at 0x0280, BRG1
-block: queued sectors max/low 8741kB/2913kB, 64 slots per queue
-RAMDISK driver initialized: 16 RAM disks of 4096K size 1024 blocksize
-eth0: CPM ENET Version 0.2 on SCC1, 00:03:ca:00:64:df
-RAMDISK: Compressed image found at block 0
-Freeing initrd memory: 1436k freed
-NET4: Linux TCP/IP 1.0 for NET4.0
-IP Protocols: ICMP, UDP, TCP
-IP: routing cache hash table of 512 buckets, 4Kbytes
-TCP: Hash tables configured (established 1024 bind 1024)
-IP-Config: Incomplete network configuration information.
-NET4: Unix domain sockets 1.0/SMP for Linux NET4.0.
-VFS: Mounted root (ext2 filesystem).
-Freeing unused kernel memory: 44k iné
-init started: BusyBox v0.60.2 (2002.07.01-12:06+0000) multi-call Configuring hostname
-Configuring lo...
-Configuring eth0...
-Configuring Gateway...
-
-Please press Enter to activate this console.
-
-ELPT860 login: root
-Password:
-Welcome to Linux-2.4.4 for ELPT CPU board (MPC860T @ 50MHz)
-
- a8888b.
- d888888b.
- 8P"YP"Y88
- _ _ 8|o||o|88
- | | |_| 8' .88
- | | _ ____ _ _ _ _ 8`._.' Y8.
- | | | | _ \| | | |\ \/ / d/ `8b.
- | |___ | | | | | |_| |/ \ .dP . Y8b.
- |_____||_|_| |_|\____|\_/\_/ d8:' " `::88b.
- d8" `Y88b
- :8P ' :888
- 8a. : _a88P
- ._/"Yaa_ : .| 88P|
- \ YP" `| 8P `.
- / \._____.d| .'
- `--..__)888888P`._.'
-login[21]: root login on `ttyS0'
-
-
-
-BusyBox v0.60.3 (2002.07.20-10:39+0000) Built-in shell (ash)
-Enter 'help' for a list of built-in commands.
-
-root@ELPT860:~ #
diff --git a/board/LEOX/elpt860/config.mk b/board/LEOX/elpt860/config.mk
deleted file mode 100644
index defc360800..0000000000
--- a/board/LEOX/elpt860/config.mk
+++ /dev/null
@@ -1,36 +0,0 @@
-#######################################################################
-#
-# Copyright (C) 2000, 2001, 2002, 2003
-# The LEOX team <team@leox.org>, http://www.leox.org
-#
-# LEOX.org is about the development of free hardware and software resources
-# for system on chip.
-#
-# Description: U-Boot port on the LEOX's ELPT860 CPU board
-# ~~~~~~~~~~~
-#
-#######################################################################
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-#######################################################################
-
-#
-# ELPT860 board
-#
-
-TEXT_BASE = 0x02000000
-#TEXT_BASE = 0x00FB0000
diff --git a/board/LEOX/elpt860/elpt860.c b/board/LEOX/elpt860/elpt860.c
deleted file mode 100644
index 775db738e6..0000000000
--- a/board/LEOX/elpt860/elpt860.c
+++ /dev/null
@@ -1,348 +0,0 @@
-/*
-**=====================================================================
-**
-** Copyright (C) 2000, 2001, 2002, 2003
-** The LEOX team <team@leox.org>, http://www.leox.org
-**
-** LEOX.org is about the development of free hardware and software resources
-** for system on chip.
-**
-** Description: U-Boot port on the LEOX's ELPT860 CPU board
-** ~~~~~~~~~~~
-**
-**=====================================================================
-**
-** This program is free software; you can redistribute it and/or
-** modify it under the terms of the GNU General Public License as
-** published by the Free Software Foundation; either version 2 of
-** the License, or (at your option) any later version.
-**
-** This program is distributed in the hope that it will be useful,
-** but WITHOUT ANY WARRANTY; without even the implied warranty of
-** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-** GNU General Public License for more details.
-**
-** You should have received a copy of the GNU General Public License
-** along with this program; if not, write to the Free Software
-** Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-** MA 02111-1307 USA
-**
-**=====================================================================
-*/
-
-/*
-** Note 1: In this file, you have to provide the following functions:
-** ------
-** int board_early_init_f(void)
-** int checkboard(void)
-** long int initdram(int board_type)
-** called from 'board_init_f()' into 'common/board.c'
-**
-** void reset_phy(void)
-** called from 'board_init_r()' into 'common/board.c'
-*/
-
-#include <common.h>
-#include <mpc8xx.h>
-
-/* ------------------------------------------------------------------------- */
-
-static long int dram_size (long int, long int *, long int);
-
-/* ------------------------------------------------------------------------- */
-
-#define _NOT_USED_ 0xFFFFFFFF
-
-const uint init_sdram_table[] = {
- /*
- * Single Read. (Offset 0 in UPMA RAM)
- */
- 0x0FFCCC04, 0xFFFFFC04, 0x0FFC3C04, 0xFFFFFC04,
- 0xFFFFFC04, /* last */
- /*
- * SDRAM Initialization (offset 5 in UPMA RAM)
- *
- * This is no UPM entry point. The following definition uses
- * the remaining space to establish an initialization
- * sequence, which is executed by a RUN command.
- *
- */
- 0xFFFFFC04, 0xFFFFFC04, 0x0FFC3C04, /* last */
- /*
- * Burst Read. (Offset 8 in UPMA RAM)
- */
- 0xFFFFFC04, 0xFFFFFC04, 0xFFFFFC04, 0xFFFFFC04,
- 0x0FFC3C04, 0xFFFFFC04, 0xFFFFFC04, 0xFFFFFC04,
- 0xFFFFFC04, 0x0FFC3C04, 0xFFFFFC04, 0xFFFFFC04,
- 0xFFFFFC04, 0xFFFFFC04, 0x0FFC3C04, 0xFFFFFC04, /* last */
- /*
- * Single Write. (Offset 18 in UPMA RAM)
- */
- 0xFFFFFC04, 0xFFFFFC04, 0xFFFFFC04, 0x0FFC3C04,
- 0xFFFFFC04, 0xFFFFFC04, 0x0FFFFC04, 0xFFFFFC04, /* last */
- /*
- * Burst Write. (Offset 20 in UPMA RAM)
- */
- 0x0FFC3C04, 0xFFFFFC04, 0xFFFFFC04, 0xFFFFFC04,
- 0xFFFFFC04, 0x0FFC3C04, 0xFFFFFC04, 0xFFFFFC04,
- 0xFFFFFC04, 0xFFFFFC04, 0xFFFFFC34, 0x0FAC0C34,
- 0xFFFFFC05, 0xFFFFFC04, 0x0FFCFC04, 0xFFFFFC05, /* last */
-};
-
-const uint sdram_table[] = {
- /*
- * Single Read. (Offset 0 in UPMA RAM)
- */
- 0x0F0FFC24, 0x0F0CFC04, 0xFF0FFC04, 0x00AF3C04,
- 0xFF0FFC00, /* last */
- /*
- * SDRAM Initialization (offset 5 in UPMA RAM)
- *
- * This is no UPM entry point. The following definition uses
- * the remaining space to establish an initialization
- * sequence, which is executed by a RUN command.
- *
- */
- 0x0FFCCC04, 0xFFAFFC05, 0xFFAFFC05, /* last */
- /*
- * Burst Read. (Offset 8 in UPMA RAM)
- */
- 0x0F0FFC24, 0x0F0CFC04, 0xFF0FFC04, 0x00AF3C04,
- 0xF00FFC00, 0xF00FFC00, 0xF00FFC00, 0xFF0FFC00,
- 0x0FFCCC04, 0xFFAFFC05, 0xFFAFFC04, 0xFFAFFC04,
- 0xFFAFFC04, 0xFFAFFC04, 0xFFAFFC04, 0xFFAFFC04, /* last */
- /*
- * Single Write. (Offset 18 in UPMA RAM)
- */
- 0x0F0FFC24, 0x0F0CFC04, 0xFF0FFC04, 0x00AF0C00,
- 0xFF0FFC04, 0x0FFCCC04, 0xFFAFFC05, /* last */
- _NOT_USED_,
- /*
- * Burst Write. (Offset 20 in UPMA RAM)
- */
- 0x0F0FFC24, 0x0F0CFC04, 0xFF0FFC00, 0x00AF0C00,
- 0xF00FFC00, 0xF00FFC00, 0xF00FFC04, 0x0FFCCC04,
- 0xFFAFFC04, 0xFFAFFC05, 0xFFAFFC04, 0xFFAFFC04,
- 0xFFAFFC04, 0xFFAFFC04, 0xFFAFFC04, 0xFFAFFC04, /* last */
- /*
- * Refresh (Offset 30 in UPMA RAM)
- */
- 0x0FFC3C04, 0xFFFFFC04, 0xFFFFFC04, 0xFFFFFC04,
- 0xFFFFFC05, 0xFFFFFC04, 0xFFFFFC05, _NOT_USED_,
- 0xFFAFFC04, 0xFFAFFC04, 0xFFAFFC04, 0xFFAFFC04, /* last */
- /*
- * Exception. (Offset 3c in UPMA RAM)
- */
- 0x0FFFFC34, 0x0FAC0C34, 0xFFFFFC05, 0xFFAFFC04, /* last */
-};
-
-/* ------------------------------------------------------------------------- */
-
-#define CFG_PC4 0x0800
-
-#define CFG_DS1 CFG_PC4
-
-/*
- * Very early board init code (fpga boot, etc.)
- */
-int board_early_init_f (void)
-{
- volatile immap_t *immr = (immap_t *) CFG_IMMR;
-
- /*
- * Light up the red led on ELPT860 pcb (DS1) (PCDAT)
- */
- immr->im_ioport.iop_pcdat &= ~CFG_DS1; /* PCDAT (DS1 = 0) */
- immr->im_ioport.iop_pcpar &= ~CFG_DS1; /* PCPAR (0=general purpose I/O) */
- immr->im_ioport.iop_pcdir |= CFG_DS1; /* PCDIR (I/O: 0=input, 1=output) */
-
- return (0); /* success */
-}
-
-/*
- * Check Board Identity:
- *
- * Test ELPT860 ID string
- *
- * Return 1 if no second DRAM bank, otherwise returns 0
- */
-
-int checkboard (void)
-{
- char *s = getenv ("serial#");
-
- if (!s || strncmp (s, "ELPT860", 7))
- printf ("### No HW ID - assuming ELPT860\n");
-
- return (0); /* success */
-}
-
-/* ------------------------------------------------------------------------- */
-
-long int initdram (int board_type)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- long int size8, size9;
- long int size_b0 = 0;
-
- /*
- * This sequence initializes SDRAM chips on ELPT860 board
- */
- upmconfig (UPMA, (uint *) init_sdram_table,
- sizeof (init_sdram_table) / sizeof (uint));
-
- memctl->memc_mptpr = 0x0200;
- memctl->memc_mamr = 0x18002111;
-
- memctl->memc_mar = 0x00000088;
- memctl->memc_mcr = 0x80002000; /* CS1: SDRAM bank 0 */
-
- upmconfig (UPMA, (uint *) sdram_table,
- sizeof (sdram_table) / sizeof (uint));
-
- /*
- * Preliminary prescaler for refresh (depends on number of
- * banks): This value is selected for four cycles every 62.4 us
- * with two SDRAM banks or four cycles every 31.2 us with one
- * bank. It will be adjusted after memory sizing.
- */
- memctl->memc_mptpr = CFG_MPTPR_2BK_8K;
-
- /*
- * The following value is used as an address (i.e. opcode) for
- * the LOAD MODE REGISTER COMMAND during SDRAM initialisation. If
- * the port size is 32bit the SDRAM does NOT "see" the lower two
- * address lines, i.e. mar=0x00000088 -> opcode=0x00000022 for
- * MICRON SDRAMs:
- * -> 0 00 010 0 010
- * | | | | +- Burst Length = 4
- * | | | +----- Burst Type = Sequential
- * | | +------- CAS Latency = 2
- * | +----------- Operating Mode = Standard
- * +-------------- Write Burst Mode = Programmed Burst Length
- */
- memctl->memc_mar = 0x00000088;
-
- /*
- * Map controller banks 2 and 3 to the SDRAM banks 2 and 3 at
- * preliminary addresses - these have to be modified after the
- * SDRAM size has been determined.
- */
- memctl->memc_or1 = CFG_OR1_PRELIM;
- memctl->memc_br1 = CFG_BR1_PRELIM;
-
- memctl->memc_mamr = CFG_MAMR_8COL & (~(MAMR_PTAE)); /* no refresh yet */
-
- udelay (200);
-
- /* perform SDRAM initializsation sequence */
-
- memctl->memc_mcr = 0x80002105; /* CS1: SDRAM bank 0 */
- udelay (1);
- memctl->memc_mcr = 0x80002230; /* CS1: SDRAM bank 0 - execute twice */
- udelay (1);
-
- memctl->memc_mamr |= MAMR_PTAE; /* enable refresh */
-
- udelay (1000);
-
- /*
- * Check Bank 0 Memory Size for re-configuration
- *
- * try 8 column mode
- */
- size8 = dram_size (CFG_MAMR_8COL,
- SDRAM_BASE1_PRELIM, SDRAM_MAX_SIZE);
-
- udelay (1000);
-
- /*
- * try 9 column mode
- */
- size9 = dram_size (CFG_MAMR_9COL,
- SDRAM_BASE1_PRELIM, SDRAM_MAX_SIZE);
-
- if (size8 < size9) { /* leave configuration at 9 columns */
- size_b0 = size9;
- /* debug ("SDRAM Bank 0 in 9 column mode: %ld MB\n", size >> 20); */
- } else { /* back to 8 columns */
-
- size_b0 = size8;
- memctl->memc_mamr = CFG_MAMR_8COL;
- udelay (500);
- /* debug ("SDRAM Bank 0 in 8 column mode: %ld MB\n", size >> 20); */
- }
-
- udelay (1000);
-
- /*
- * Adjust refresh rate depending on SDRAM type, both banks
- * For types > 128 MBit leave it at the current (fast) rate
- */
- if (size_b0 < 0x02000000) {
- /* reduce to 15.6 us (62.4 us / quad) */
- memctl->memc_mptpr = CFG_MPTPR_2BK_4K;
- udelay (1000);
- }
-
- /*
- * Final mapping: map bigger bank first
- */
- memctl->memc_or1 = ((-size_b0) & 0xFFFF0000) | CFG_OR_TIMING_SDRAM;
- memctl->memc_br1 = (CFG_SDRAM_BASE & BR_BA_MSK) | BR_MS_UPMA | BR_V;
-
- {
- unsigned long reg;
-
- /* adjust refresh rate depending on SDRAM type, one bank */
- reg = memctl->memc_mptpr;
- reg >>= 1; /* reduce to CFG_MPTPR_1BK_8K / _4K */
- memctl->memc_mptpr = reg;
- }
-
- udelay (10000);
-
- return (size_b0);
-}
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Check memory range for valid RAM. A simple memory test determines
- * the actually available RAM size between addresses `base' and
- * `base + maxsize'. Some (not all) hardware errors are detected:
- * - short between address lines
- * - short between data lines
- */
-
-static long int
-dram_size (long int mamr_value, long int *base, long int maxsize)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
-
- memctl->memc_mamr = mamr_value;
-
- return (get_ram_size (base, maxsize));
-}
-
-/* ------------------------------------------------------------------------- */
-
-#define CFG_PA1 0x4000
-#define CFG_PA2 0x2000
-
-#define CFG_LBKs (CFG_PA2 | CFG_PA1)
-
-void reset_phy (void)
-{
- volatile immap_t *immr = (immap_t *) CFG_IMMR;
-
- /*
- * Ensure LBK LXT901 ethernet 1 & 2 = 0 ... for normal loopback in effect
- * and no AUI loopback
- */
- immr->im_ioport.iop_padat &= ~CFG_LBKs; /* PADAT (LBK eth 1&2 = 0) */
- immr->im_ioport.iop_papar &= ~CFG_LBKs; /* PAPAR (0=general purpose I/O) */
- immr->im_ioport.iop_padir |= CFG_LBKs; /* PADIR (I/O: 0=input, 1=output) */
-}
diff --git a/board/LEOX/elpt860/flash.c b/board/LEOX/elpt860/flash.c
deleted file mode 100644
index c1b3b8513e..0000000000
--- a/board/LEOX/elpt860/flash.c
+++ /dev/null
@@ -1,615 +0,0 @@
-/*
-**=====================================================================
-**
-** Copyright (C) 2000, 2001, 2002, 2003
-** The LEOX team <team@leox.org>, http://www.leox.org
-**
-** LEOX.org is about the development of free hardware and software resources
-** for system on chip.
-**
-** Description: U-Boot port on the LEOX's ELPT860 CPU board
-** ~~~~~~~~~~~
-**
-**=====================================================================
-**
-** This program is free software; you can redistribute it and/or
-** modify it under the terms of the GNU General Public License as
-** published by the Free Software Foundation; either version 2 of
-** the License, or (at your option) any later version.
-**
-** This program is distributed in the hope that it will be useful,
-** but WITHOUT ANY WARRANTY; without even the implied warranty of
-** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-** GNU General Public License for more details.
-**
-** You should have received a copy of the GNU General Public License
-** along with this program; if not, write to the Free Software
-** Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-** MA 02111-1307 USA
-**
-**=====================================================================
-*/
-
-/*
-** Note 1: In this file, you have to provide the following variable:
-** ------
-** flash_info_t flash_info[CFG_MAX_FLASH_BANKS]
-** 'flash_info_t' structure is defined into 'include/flash.h'
-** and defined as extern into 'common/cmd_flash.c'
-**
-** Note 2: In this file, you have to provide the following functions:
-** ------
-** unsigned long flash_init(void)
-** called from 'board_init_r()' into 'common/board.c'
-**
-** void flash_print_info(flash_info_t *info)
-** called from 'do_flinfo()' into 'common/cmd_flash.c'
-**
-** int flash_erase(flash_info_t *info,
-** int s_first,
-** int s_last)
-** called from 'do_flerase()' & 'flash_sect_erase()' into 'common/cmd_flash.c'
-**
-** int write_buff (flash_info_t *info,
-** uchar *src,
-** ulong addr,
-** ulong cnt)
-** called from 'flash_write()' into 'common/cmd_flash.c'
-*/
-
-#include <common.h>
-#include <mpc8xx.h>
-
-
-#ifndef CFG_ENV_ADDR
-# define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_ENV_OFFSET)
-#endif
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/*-----------------------------------------------------------------------
- * Internal Functions
- */
-static void flash_get_offsets (ulong base, flash_info_t *info);
-static ulong flash_get_size (volatile unsigned char *addr, flash_info_t *info);
-
-static int write_word (flash_info_t *info, ulong dest, ulong data);
-static int write_byte (flash_info_t *info, ulong dest, uchar data);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long
-flash_init (void)
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- unsigned long size_b0;
- int i;
-
- /* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i)
- {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* Static FLASH Bank configuration here - FIXME XXX */
-
- size_b0 = flash_get_size ((volatile unsigned char *)FLASH_BASE0_PRELIM,
- &flash_info[0]);
-
- if ( flash_info[0].flash_id == FLASH_UNKNOWN )
- {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size_b0, size_b0<<20);
- }
-
- /* Remap FLASH according to real size */
- memctl->memc_or0 = CFG_OR_TIMING_FLASH | (-size_b0 & OR_AM_MSK);
- memctl->memc_br0 = (CFG_FLASH_BASE & BR_BA_MSK) | BR_MS_GPCM | BR_PS_8 | BR_V;
-
- /* Re-do sizing to get full correct info */
- size_b0 = flash_get_size ((volatile unsigned char *)CFG_FLASH_BASE,
- &flash_info[0]);
-
- flash_get_offsets (CFG_FLASH_BASE, &flash_info[0]);
-
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
- /* monitor protection ON by default */
- flash_protect (FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE + monitor_flash_len-1,
- &flash_info[0]);
-#endif
-
-#ifdef CFG_ENV_IS_IN_FLASH
- /* ENV protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE-1,
- &flash_info[0]);
-#endif
-
- flash_info[0].size = size_b0;
-
- return (size_b0);
-}
-
-/*-----------------------------------------------------------------------
- */
-static void
-flash_get_offsets (ulong base,
- flash_info_t *info)
-{
- int i;
-
-#define SECTOR_64KB 0x00010000
-
- /* set up sector start adress table */
- for (i = 0; i < info->sector_count; i++)
- {
- info->start[i] = base + (i * SECTOR_64KB);
- }
-}
-
-/*-----------------------------------------------------------------------
- */
-void
-flash_print_info (flash_info_t *info)
-{
- int i;
-
- if ( info->flash_id == FLASH_UNKNOWN )
- {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch ( info->flash_id & FLASH_VENDMASK )
- {
- case FLASH_MAN_AMD: printf ("AMD "); break;
- case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
- case FLASH_MAN_STM: printf ("STM (Thomson) "); break;
- default: printf ("Unknown Vendor "); break;
- }
-
- switch ( info->flash_id & FLASH_TYPEMASK )
- {
- case FLASH_AM040: printf ("AM29F040 (4 Mbits)\n");
- break;
- default: printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld KB in %d Sectors\n",
- info->size >> 10, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i)
- {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " "
- );
- }
- printf ("\n");
-
- return;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-
-static ulong
-flash_get_size (volatile unsigned char *addr,
- flash_info_t *info)
-{
- short i;
- uchar value;
- ulong base = (ulong)addr;
-
- /* Write auto select command: read Manufacturer ID */
- addr[0x0555] = 0xAA;
- addr[0x02AA] = 0x55;
- addr[0x0555] = 0x90;
-
- value = addr[0];
-
- switch ( value )
- {
- /* case AMD_MANUFACT: */
- case 0x01:
- info->flash_id = FLASH_MAN_AMD;
- break;
- /* case FUJ_MANUFACT: */
- case 0x04:
- info->flash_id = FLASH_MAN_FUJ;
- break;
- /* case STM_MANUFACT: */
- case 0x20:
- info->flash_id = FLASH_MAN_STM;
- break;
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- return (0); /* no or unknown flash */
- }
-
- value = addr[1]; /* device ID */
-
- switch ( value )
- {
- case STM_ID_F040B:
- case AMD_ID_F040B:
- info->flash_id += FLASH_AM040; /* 4 Mbits = 512k * 8 */
- info->sector_count = 8;
- info->size = 0x00080000;
- break;
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- return (0); /* => no or unknown flash */
- }
-
- /* set up sector start adress table */
- for (i = 0; i < info->sector_count; i++)
- {
- info->start[i] = base + (i * 0x00010000);
- }
-
- /* check for protected sectors */
- for (i = 0; i < info->sector_count; i++)
- {
- /* read sector protection at sector address, (A7 .. A0) = 0x02 */
- /* D0 = 1 if protected */
- addr = (volatile unsigned char *)(info->start[i]);
- info->protect[i] = addr[2] & 1;
- }
-
- /*
- * Prevent writes to uninitialized FLASH.
- */
- if ( info->flash_id != FLASH_UNKNOWN )
- {
- addr = (volatile unsigned char *)info->start[0];
-
- *addr = 0xF0; /* reset bank */
- }
-
- return (info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-int
-flash_erase (flash_info_t *info,
- int s_first,
- int s_last)
-{
- volatile unsigned char *addr = (volatile unsigned char *)(info->start[0]);
- int flag, prot, sect, l_sect;
- ulong start, now, last;
-
- if ( (s_first < 0) || (s_first > s_last) )
- {
- if ( info->flash_id == FLASH_UNKNOWN )
- {
- printf ("- missing\n");
- }
- else
- {
- printf ("- no sectors to erase\n");
- }
- return ( 1 );
- }
-
- if ( (info->flash_id == FLASH_UNKNOWN) ||
- (info->flash_id > FLASH_AMD_COMP) )
- {
- printf ("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- return ( 1 );
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect)
- {
- if ( info->protect[sect] )
- {
- prot++;
- }
- }
-
- if ( prot )
- {
- printf ("- Warning: %d protected sectors will not be erased!\n", prot);
- }
- else
- {
- printf ("\n");
- }
-
- l_sect = -1;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[0x0555] = 0xAA;
- addr[0x02AA] = 0x55;
- addr[0x0555] = 0x80;
- addr[0x0555] = 0xAA;
- addr[0x02AA] = 0x55;
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++)
- {
- if (info->protect[sect] == 0) /* not protected */
- {
- addr = (volatile unsigned char *)(info->start[sect]);
- addr[0] = 0x30;
- l_sect = sect;
- }
- }
-
- /* re-enable interrupts if necessary */
- if ( flag )
- enable_interrupts();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- /*
- * We wait for the last triggered sector
- */
- if ( l_sect < 0 )
- goto DONE;
-
- start = get_timer (0);
- last = start;
- addr = (volatile unsigned char *)(info->start[l_sect]);
- while ( (addr[0] & 0x80) != 0x80 )
- {
- if ( (now = get_timer(start)) > CFG_FLASH_ERASE_TOUT )
- {
- printf ("Timeout\n");
- return ( 1 );
- }
- /* show that we're waiting */
- if ( (now - last) > 1000 ) /* every second */
- {
- putc ('.');
- last = now;
- }
- }
-
-DONE:
- /* reset to read mode */
- addr = (volatile unsigned char *)info->start[0];
- addr[0] = 0xF0; /* reset bank */
-
- printf (" done\n");
-
- return ( 0 );
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int
-write_buff (flash_info_t *info,
- uchar *src,
- ulong addr,
- ulong cnt)
-{
- ulong cp, wp, data;
- uchar bdata;
- int i, l, rc;
-
- if ( (info->flash_id & FLASH_TYPEMASK) == FLASH_AM040 )
- {
- /* Width of the data bus: 8 bits */
-
- wp = addr;
-
- while ( cnt )
- {
- bdata = *src++;
-
- if ( (rc = write_byte(info, wp, bdata)) != 0 )
- {
- return (rc);
- }
-
- ++wp;
- --cnt;
- }
-
- return ( 0 );
- }
- else
- {
- /* Width of the data bus: 32 bits */
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ( (l = addr - wp) != 0 )
- {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp)
- {
- data = (data << 8) | (*(uchar *)cp);
- }
- for (; i<4 && cnt>0; ++i)
- {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<4; ++i, ++cp)
- {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- if ( (rc = write_word(info, wp, data)) != 0 )
- {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while ( cnt >= 4 )
- {
- data = 0;
- for (i=0; i<4; ++i)
- {
- data = (data << 8) | *src++;
- }
- if ( (rc = write_word(info, wp, data)) != 0 )
- {
- return (rc);
- }
- wp += 4;
- cnt -= 4;
- }
-
- if ( cnt == 0 )
- {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp)
- {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i<4; ++i, ++cp)
- {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- return (write_word(info, wp, data));
- }
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int
-write_word (flash_info_t *info,
- ulong dest,
- ulong data)
-{
- vu_long *addr = (vu_long*)(info->start[0]);
- ulong start;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ( (*((vu_long *)dest) & data) != data )
- {
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[0x0555] = 0x00AA00AA;
- addr[0x02AA] = 0x00550055;
- addr[0x0555] = 0x00A000A0;
-
- *((vu_long *)dest) = data;
-
- /* re-enable interrupts if necessary */
- if ( flag )
- enable_interrupts();
-
- /* data polling for D7 */
- start = get_timer (0);
- while ( (*((vu_long *)dest) & 0x00800080) != (data & 0x00800080) )
- {
- if ( get_timer(start) > CFG_FLASH_WRITE_TOUT )
- {
- return (1);
- }
- }
-
- return (0);
-}
-
-/*-----------------------------------------------------------------------
- * Write a byte to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int
-write_byte (flash_info_t *info,
- ulong dest,
- uchar data)
-{
- volatile unsigned char *addr = (volatile unsigned char *)(info->start[0]);
- ulong start;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ( (*((volatile unsigned char *)dest) & data) != data )
- {
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[0x0555] = 0xAA;
- addr[0x02AA] = 0x55;
- addr[0x0555] = 0xA0;
-
- *((volatile unsigned char *)dest) = data;
-
- /* re-enable interrupts if necessary */
- if ( flag )
- enable_interrupts();
-
- /* data polling for D7 */
- start = get_timer (0);
- while ( (*((volatile unsigned char *)dest) & 0x80) != (data & 0x80) )
- {
- if ( get_timer(start) > CFG_FLASH_WRITE_TOUT )
- {
- return (1);
- }
- }
-
- return (0);
-}
-
-/*-----------------------------------------------------------------------
- */
diff --git a/board/LEOX/elpt860/u-boot.lds b/board/LEOX/elpt860/u-boot.lds
deleted file mode 100644
index b09fc3390a..0000000000
--- a/board/LEOX/elpt860/u-boot.lds
+++ /dev/null
@@ -1,154 +0,0 @@
-/*
-**=====================================================================
-**
-** Copyright (C) 2000, 2001, 2002, 2003
-** The LEOX team <team@leox.org>, http://www.leox.org
-**
-** LEOX.org is about the development of free hardware and software resources
-** for system on chip.
-**
-** Description: U-Boot port on the LEOX's ELPT860 CPU board
-** ~~~~~~~~~~~
-**
-**=====================================================================
-**
-** This program is free software; you can redistribute it and/or
-** modify it under the terms of the GNU General Public License as
-** published by the Free Software Foundation; either version 2 of
-** the License, or (at your option) any later version.
-**
-** This program is distributed in the hope that it will be useful,
-** but WITHOUT ANY WARRANTY; without even the implied warranty of
-** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-** GNU General Public License for more details.
-**
-** You should have received a copy of the GNU General Public License
-** along with this program; if not, write to the Free Software
-** Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-** MA 02111-1307 USA
-**
-**=====================================================================
-*/
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc8xx/start.o (.text)
- common/dlmalloc.o (.text)
- lib_ppc/ppcstring.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
- lib_generic/zlib.o (.text)
- lib_generic/string.o (.text)
- lib_ppc/cache.o (.text)
- lib_ppc/extable.o (.text)
- lib_ppc/time.o (.text)
- lib_ppc/ticks.o (.text)
-
- . = env_offset;
- common/environment.o (.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/LEOX/elpt860/u-boot.lds.debug b/board/LEOX/elpt860/u-boot.lds.debug
deleted file mode 100644
index 6f5af91fd1..0000000000
--- a/board/LEOX/elpt860/u-boot.lds.debug
+++ /dev/null
@@ -1,141 +0,0 @@
-/*
-**=====================================================================
-**
-** Copyright (C) 2000, 2001, 2002, 2003
-** The LEOX team <team@leox.org>, http://www.leox.org
-**
-** LEOX.org is about the development of free hardware and software resources
-** for system on chip.
-**
-** Description: U-Boot port on the LEOX's ELPT860 CPU board
-** ~~~~~~~~~~~
-**
-**=====================================================================
-**
-** This program is free software; you can redistribute it and/or
-** modify it under the terms of the GNU General Public License as
-** published by the Free Software Foundation; either version 2 of
-** the License, or (at your option) any later version.
-**
-** This program is distributed in the hope that it will be useful,
-** but WITHOUT ANY WARRANTY; without even the implied warranty of
-** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-** GNU General Public License for more details.
-**
-** You should have received a copy of the GNU General Public License
-** along with this program; if not, write to the Free Software
-** Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-** MA 02111-1307 USA
-**
-**=====================================================================
-*/
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc8xx/start.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
-
- . = env_offset;
- common/environment.o (.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/MAI/AmigaOneG3SE/AmigaOneG3SE.c b/board/MAI/AmigaOneG3SE/AmigaOneG3SE.c
deleted file mode 100644
index 0934e1b693..0000000000
--- a/board/MAI/AmigaOneG3SE/AmigaOneG3SE.c
+++ /dev/null
@@ -1,114 +0,0 @@
-/*
- * (C) Copyright 2002
- * Hyperion Entertainment, ThomasF@hyperion-entertainment.com
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <command.h>
-#include <pci.h>
-#include "articiaS.h"
-#include "memio.h"
-#include "via686.h"
-
-__asm(" .globl send_kb \n
- send_kb: \n
- lis r9, 0xfe00 \n
- \n
- li r4, 0x10 # retries \n
- mtctr r4 \n
- \n
- idle: \n
- lbz r4, 0x64(r9) \n
- andi. r4, r4, 0x02 \n
- bne idle \n
- \n
- ready: \n
- stb r3, 0x60(r9) \n
- \n
- check: \n
- lbz r4, 0x64(r9) \n
- andi. r4, r4, 0x01 \n
- beq check \n
- \n
- lbz r4, 0x60(r9) \n
- cmpwi r4, 0xfa \n
- beq done \n
- \n
- bdnz idle \n
- \n
- li r3, 0 \n
- blr \n
- \n
- done: \n
- li r3, 1 \n
- blr \n
- \n
- .globl test_kb \n
- test_kb: \n
- mflr r10 \n
- li r3, 0xed \n
- bl send_kb \n
- li r3, 0x01 \n
- bl send_kb \n
- mtlr r10 \n
- blr \n
-");
-
-
-int checkboard (void)
-{
- printf ("Board: AmigaOneG3SE\n");
- return 0;
-}
-
-long initdram (int board_type)
-{
- return articiaS_ram_init ();
-}
-
-
-void after_reloc (ulong dest_addr, gd_t *gd)
-{
-/* HJF: DECLARE_GLOBAL_DATA_PTR; */
-
- board_init_r (gd, dest_addr);
-}
-
-
-int misc_init_r (void)
-{
- extern pci_dev_t video_dev;
- extern void drv_video_init (void);
-
- if (video_dev != ~0)
- drv_video_init ();
-
- return (0);
-}
-
-
-void pci_init_board (void)
-{
-#ifndef CONFIG_RAMBOOT
- articiaS_pci_init ();
-#endif
-}
diff --git a/board/MAI/AmigaOneG3SE/Makefile b/board/MAI/AmigaOneG3SE/Makefile
deleted file mode 100644
index b1247fe4e8..0000000000
--- a/board/MAI/AmigaOneG3SE/Makefile
+++ /dev/null
@@ -1,56 +0,0 @@
-#
-# (C) Copyright 2002
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-COBJS = $(BOARD).o articiaS.o flash.o serial.o smbus.o articiaS_pci.o \
- via686.o i8259.o ../bios_emulator/x86interface.o \
- ../bios_emulator/bios.o ../bios_emulator/glue.o \
- interrupts.o ps2kbd.o video.o usb_uhci.o enet.o \
- ../menu/cmd_menu.o cmd_boota.o nvram.o
-
-AOBJS = board_asm_init.o memio.o
-
-OBJS = $(COBJS) $(AOBJS)
-
-EMUDIR = ../bios_emulator/scitech/src/x86emu/
-EMUOBJ = $(EMUDIR)decode.o $(EMUDIR)ops2.o $(EMUDIR)fpu.o $(EMUDIR)prim_ops.o \
- $(EMUDIR)ops.o $(EMUDIR)sys.o
-EMUSRC = $(EMUOBJ:.o=.c)
-
-$(LIB): .depend $(OBJS) $(EMUSRC)
- make libx86emu.a -C ../bios_emulator/scitech/src/x86emu -f makefile.uboot CROSS_COMPILE=$(CROSS_COMPILE)
- -rm $(LIB)
- $(AR) crv $@ $(OBJS) $(EMUOBJ)
-
-
-#########################################################################
-
-.depend: Makefile $(AOBJS:.o=.S) $(COBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(AOBJS:.o=.S) $(COBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/MAI/AmigaOneG3SE/articiaS.c b/board/MAI/AmigaOneG3SE/articiaS.c
deleted file mode 100644
index a4dad6486b..0000000000
--- a/board/MAI/AmigaOneG3SE/articiaS.c
+++ /dev/null
@@ -1,705 +0,0 @@
-/*
- * (C) Copyright 2002
- * Hyperion Entertainment, ThomasF@hyperion-entertainment.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <pci.h>
-#include <asm/processor.h>
-#include "memio.h"
-#include "articiaS.h"
-#include "smbus.h"
-#include "via686.h"
-
-#undef DEBUG
-
-struct dimm_bank {
- uint8 used; /* Bank is populated */
- uint32 rows; /* Number of row addresses */
- uint32 columns; /* Number of column addresses */
- uint8 registered; /* SIMM is registered */
- uint8 ecc; /* SIMM has ecc */
- uint8 burst_len; /* Supported burst lengths */
- uint32 cas_lat; /* Supported CAS latencies */
- uint32 cas_used; /* CAS to use (not set by user) */
- uint32 trcd; /* RAS to CAS latency */
- uint32 trp; /* Precharge latency */
- uint32 tclk_hi; /* SDRAM cycle time (highest CAS latency) */
- uint32 tclk_2hi; /* SDRAM second highest CAS latency */
- uint32 size; /* Size of bank in bytes */
- uint8 auto_refresh; /* Module supports auto refresh */
- uint32 refresh_time; /* Refresh time (in ns) */
-};
-
-
-/*
-** Based in part on the evb64260 code
-*/
-
-/*
- * translate ns.ns/10 coding of SPD timing values
- * into 10 ps unit values
- */
-static inline unsigned short NS10to10PS (unsigned char spd_byte)
-{
- unsigned short ns, ns10;
-
- /* isolate upper nibble */
- ns = (spd_byte >> 4) & 0x0F;
- /* isolate lower nibble */
- ns10 = (spd_byte & 0x0F);
-
- return (ns * 100 + ns10 * 10);
-}
-
-/*
- * translate ns coding of SPD timing values
- * into 10 ps unit values
- */
-static inline unsigned short NSto10PS (unsigned char spd_byte)
-{
- return (spd_byte * 100);
-}
-
-
-long detect_sdram (uint8 * rom, int dimmNum, struct dimm_bank *banks)
-{
- DECLARE_GLOBAL_DATA_PTR;
- int dimm_address = (dimmNum == 0) ? SM_DIMM0_ADDR : SM_DIMM1_ADDR;
- uint32 busclock = gd->bus_clk;
- uint32 memclock = busclock;
- uint32 tmemclock = 1000000000 / (memclock / 100);
- uint32 datawidth;
-
- if (sm_get_data (rom, dimm_address) == 0) {
- /* Nothing in slot, make both banks empty */
- debug ("Slot %d: vacant\n", dimmNum);
- banks[0].used = 0;
- banks[1].used = 0;
- return 0;
- }
-
- if (rom[2] != 0x04) {
- debug ("Slot %d: No SDRAM\n", dimmNum);
- banks[0].used = 0;
- banks[1].used = 0;
- return 0;
- }
-
- /* Determine number of banks/rows */
- if (rom[5] == 1) {
- banks[0].used = 1;
- banks[1].used = 0;
- } else {
- banks[0].used = 1;
- banks[1].used = 1;
- }
-
- /* Determine number of row addresses */
- if (rom[3] & 0xf0) {
- /* Different banks sizes */
- banks[0].rows = rom[3] & 0x0f;
- banks[1].rows = (rom[3] & 0xf0) >> 4;
- } else {
- /* Equal sized banks */
- banks[0].rows = rom[3] & 0x0f;
- banks[1].rows = banks[0].rows;
- }
-
- /* Determine number of column addresses */
- if (rom[4] & 0xf0) {
- /* Different bank sizes */
- banks[0].columns = rom[4] & 0x0f;
- banks[1].columns = (rom[4] & 0xf0) >> 4;
- } else {
- banks[0].columns = rom[4] & 0x0f;
- banks[1].columns = banks[0].columns;
- }
-
- /* Check Jedec revision, and modify row/column accordingly */
- if (rom[62] > 0x10) {
- if (banks[0].rows <= 3)
- banks[0].rows += 15;
- if (banks[1].rows <= 3)
- banks[1].rows += 15;
- if (banks[0].columns <= 3)
- banks[0].columns += 15;
- if (banks[0].columns <= 3)
- banks[0].columns += 15;
- }
-
- /* Check registered/unregisterd */
- if (rom[21] & 0x12) {
- banks[0].registered = 1;
- banks[1].registered = 1;
- } else {
- banks[0].registered = 0;
- banks[1].registered = 0;
- }
-
-#ifdef CONFIG_ECC
- /* Check parity/ECC */
- banks[0].ecc = (rom[11] == 0x02);
- banks[1].ecc = (rom[11] == 0x02);
-#endif
-
- /* Find burst lengths supported */
- banks[0].burst_len = rom[16] & 0x8f;
- banks[1].burst_len = rom[16] & 0x8f;
-
- /* Find possible cas latencies */
- banks[0].cas_lat = rom[18] & 0x7F;
- banks[1].cas_lat = rom[18] & 0x7F;
-
- /* RAS/CAS latency */
- banks[0].trcd = (NSto10PS (rom[29]) + (tmemclock - 1)) / tmemclock;
- banks[1].trcd = (NSto10PS (rom[29]) + (tmemclock - 1)) / tmemclock;
-
- /* Precharge latency */
- banks[0].trp = (NSto10PS (rom[27]) + (tmemclock - 1)) / tmemclock;
- banks[1].trp = (NSto10PS (rom[27]) + (tmemclock - 1)) / tmemclock;
-
- /* highest CAS latency */
- banks[0].tclk_hi = NS10to10PS (rom[9]);
- banks[1].tclk_hi = NS10to10PS (rom[9]);
-
- /* second highest CAS latency */
- banks[0].tclk_2hi = NS10to10PS (rom[23]);
- banks[1].tclk_2hi = NS10to10PS (rom[23]);
-
- /* bank sizes */
- datawidth = rom[13] & 0x7f;
- banks[0].size =
- (1L << (banks[0].rows + banks[0].columns)) *
- /* FIXME datawidth */ 8 * rom[17];
- if (rom[13] & 0x80)
- banks[1].size = 2 * banks[0].size;
- else
- banks[1].size = (1L << (banks[1].rows + banks[1].columns)) *
- /* FIXME datawidth */ 8 * rom[17];
-
- /* Refresh */
- if (rom[12] & 0x80) {
- banks[0].auto_refresh = 1;
- banks[1].auto_refresh = 1;
- } else {
- banks[0].auto_refresh = 0;
- banks[1].auto_refresh = 0;
- }
-
- switch (rom[12] & 0x7f) {
- case 0:
- banks[0].refresh_time = (1562500 + (tmemclock - 1)) / tmemclock;
- banks[1].refresh_time = (1562500 + (tmemclock - 1)) / tmemclock;
- break;
- case 1:
- banks[0].refresh_time = (390600 + (tmemclock - 1)) / tmemclock;
- banks[1].refresh_time = (390600 + (tmemclock - 1)) / tmemclock;
- break;
- case 2:
- banks[0].refresh_time = (781200 + (tmemclock - 1)) / tmemclock;
- banks[1].refresh_time = (781200 + (tmemclock - 1)) / tmemclock;
- break;
- case 3:
- banks[0].refresh_time = (3125000 + (tmemclock - 1)) / tmemclock;
- banks[1].refresh_time = (3125000 + (tmemclock - 1)) / tmemclock;
- break;
- case 4:
- banks[0].refresh_time = (6250000 + (tmemclock - 1)) / tmemclock;
- banks[1].refresh_time = (6250000 + (tmemclock - 1)) / tmemclock;
- break;
- case 5:
- banks[0].refresh_time = (12500000 + (tmemclock - 1)) / tmemclock;
- banks[1].refresh_time = (12500000 + (tmemclock - 1)) / tmemclock;
- break;
- default:
- banks[0].refresh_time = 0x100; /* Default of Articia S */
- banks[1].refresh_time = 0x100;
- break;
- }
-
-#ifdef DEBUG
- printf ("\nInformation for SIMM bank %ld:\n", dimmNum);
- printf ("Number of banks: %ld\n", banks[0].used + banks[1].used);
- printf ("Number of row addresses: %ld\n", banks[0].rows);
- printf ("Number of coumns addresses: %ld\n", banks[0].columns);
- printf ("SIMM is %sregistered\n",
- banks[0].registered == 0 ? "not " : "");
-#ifdef CONFIG_ECC
- printf ("SIMM %s ECC\n",
- banks[0].ecc == 1 ? "supports" : "doesn't support");
-#endif
- printf ("Supported burst lenghts: %s %s %s %s %s\n",
- banks[0].burst_len & 0x08 ? "8" : " ",
- banks[0].burst_len & 0x04 ? "4" : " ",
- banks[0].burst_len & 0x02 ? "2" : " ",
- banks[0].burst_len & 0x01 ? "1" : " ",
- banks[0].burst_len & 0x80 ? "PAGE" : " ");
- printf ("Supported CAS latencies: %s %s %s\n",
- banks[0].cas_lat & 0x04 ? "CAS 3" : " ",
- banks[0].cas_lat & 0x02 ? "CAS 2" : " ",
- banks[0].cas_lat & 0x01 ? "CAS 1" : " ");
- printf ("RAS to CAS latency: %ld\n", banks[0].trcd);
- printf ("Precharge latency: %ld\n", banks[0].trp);
- printf ("SDRAM highest CAS latency: %ld\n", banks[0].tclk_hi);
- printf ("SDRAM 2nd highest CAS latency: %ld\n", banks[0].tclk_2hi);
- printf ("SDRAM data width: %ld\n", datawidth);
- printf ("Auto Refresh %ssupported\n",
- banks[0].auto_refresh ? "" : "not ");
- printf ("Refresh time: %ld clocks\n", banks[0].refresh_time);
- if (banks[0].used)
- printf ("Bank 0 size: %ld MB\n", banks[0].size / 1024 / 1024);
- if (banks[1].used)
- printf ("Bank 1 size: %ld MB\n", banks[1].size / 1024 / 1024);
-
- printf ("\n");
-#endif
-
- sm_term ();
- return 1;
-}
-
-void select_cas (struct dimm_bank *banks, uint8 fast)
-{
- if (!banks[0].used) {
- banks[0].cas_used = 0;
- banks[0].cas_used = 0;
- return;
- }
-
- if (fast) {
- /* Search for fast CAS */
- uint32 i;
- uint32 c = 0x01;
-
- for (i = 1; i < 5; i++) {
- if (banks[0].cas_lat & c) {
- banks[0].cas_used = i;
- banks[1].cas_used = i;
- debug ("Using CAS %d (fast)\n", i);
- return;
- }
- c <<= 1;
- }
-
- /* Default to CAS 3 */
- banks[0].cas_used = 3;
- banks[1].cas_used = 3;
- debug ("Using CAS 3 (fast)\n");
-
- return;
- } else {
- /* Search for slow cas */
- uint32 i;
- uint32 c = 0x08;
-
- for (i = 4; i > 1; i--) {
- if (banks[0].cas_lat & c) {
- banks[0].cas_used = i;
- banks[1].cas_used = i;
- debug ("Using CAS %d (slow)\n", i);
- return;
- }
- c >>= 1;
- }
-
- /* Default to CAS 3 */
- banks[0].cas_used = 3;
- banks[1].cas_used = 3;
- debug ("Using CAS 3 (slow)\n");
-
- return;
- }
-
- banks[0].cas_used = 3;
- banks[1].cas_used = 3;
- debug ("Using CAS 3\n");
-
- return;
-}
-
-uint32 get_reg_setting (uint32 banks, uint32 rows, uint32 columns, uint32 size)
-{
- uint32 i;
-
- struct RowColumnSize {
- uint32 banks;
- uint32 rows;
- uint32 columns;
- uint32 size;
- uint32 register_value;
- };
-
- struct RowColumnSize rcs_map[] = {
- /* Sbk Radr Cadr MB Value */
- {1, 11, 8, 8, 0x00840f00},
- {1, 11, 9, 16, 0x00925f00},
- {1, 11, 10, 32, 0x00a64f00},
- {2, 12, 8, 32, 0x00c55f00},
- {2, 12, 9, 64, 0x00d66f00},
- {2, 12, 10, 128, 0x00e77f00},
- {2, 12, 11, 256, 0x00ff8f00},
- {2, 13, 11, 512, 0x00ff9f00},
- {0, 0, 0, 0, 0x00000000}
- };
-
-
- i = 0;
-
- while (rcs_map[i].banks != 0) {
- if (rows == rcs_map[i].rows
- && columns == rcs_map[i].columns
- && (size / 1024 / 1024) == rcs_map[i].size)
- return rcs_map[i].register_value;
-
- i++;
- }
-
- return 0;
-}
-
-uint32 burst_to_len (uint32 support)
-{
- if (support & 0x80)
- return 0x7;
- else if (support & 0x8)
- return 0x3;
- else if (support & 0x4)
- return 0x2;
- else if (support & 0x2)
- return 0x1;
- else if (support & 0x1)
- return 0x0;
-
- return 0;
-}
-
-long articiaS_ram_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- register uint32 i;
- register uint32 value1;
- register uint32 value2;
- uint8 rom[128];
- uint32 burst_len;
- uint32 burst_support;
- uint32 total_ram = 0;
-
- struct dimm_bank banks[4]; /* FIXME: Move to initram */
- uint32 busclock = gd->bus_clk;
- uint32 memclock = busclock;
- uint32 reg32;
- uint32 refresh_clocks;
- uint8 auto_refresh;
-
- memset (banks, 0, sizeof (struct dimm_bank) * 4);
-
- detect_sdram (rom, 0, &banks[0]);
- detect_sdram (rom, 1, &banks[2]);
-
- for (i = 0; i < 4; i++) {
- total_ram = total_ram + (banks[i].used * banks[i].size);
- }
-
- pci_write_cfg_long (0, 0, GLOBALINFO0, 0x117430c0);
- pci_write_cfg_long (0, 0, HBUSACR0, 0x1f0100b0);
- pci_write_cfg_long (0, 0, SRAM_CR, 0x00f12000); /* Note: Might also try 0x00f10000 (original: 0x00f12000) */
- pci_write_cfg_byte (0, 0, DRAM_RAS_CTL0, 0x3f);
- pci_write_cfg_byte (0, 0, DRAM_RAS_CTL1, 0x00); /* was: 0x04); */
- pci_write_cfg_word (0, 0, DRAM_ECC0, 0x2020); /* was: 0x2400); No ECC yet */
-
- /* FIXME: Move this stuff to seperate function, like setup_dimm_bank */
- if (banks[0].used) {
- value1 = get_reg_setting (banks[0].used + banks[1].used,
- banks[0].rows, banks[0].columns,
- banks[0].size);
- } else {
- value1 = 0;
- }
-
- if (banks[1].used) {
- value2 = get_reg_setting (banks[0].used + banks[1].used,
- banks[1].rows, banks[1].columns,
- banks[1].size);
- } else {
- value2 = 0;
- }
-
- pci_write_cfg_long (0, 0, DIMM0_B0_SCR0, value1);
- pci_write_cfg_long (0, 0, DIMM0_B1_SCR0, value2);
-
- debug ("DIMM0_B0_SCR0 = 0x%08x\n", value1);
- debug ("DIMM0_B1_SCR0 = 0x%08x\n", value2);
-
- if (banks[2].used) {
- value1 = get_reg_setting (banks[2].used + banks[3].used,
- banks[2].rows, banks[2].columns,
- banks[2].size);
- } else {
- value1 = 0;
- }
-
- if (banks[3].used) {
- value2 = get_reg_setting (banks[2].used + banks[3].used,
- banks[3].rows, banks[3].columns,
- banks[3].size);
- } else {
- value2 = 0;
- }
-
- pci_write_cfg_long (0, 0, DIMM1_B2_SCR0, value1);
- pci_write_cfg_long (0, 0, DIMM1_B3_SCR0, value2);
-
- debug ("DIMM0_B2_SCR0 = 0x%08x\n", value1);
- debug ("DIMM0_B3_SCR0 = 0x%08x\n", value2);
-
- pci_write_cfg_long (0, 0, DIMM2_B4_SCR0, 0);
- pci_write_cfg_long (0, 0, DIMM2_B5_SCR0, 0);
- pci_write_cfg_long (0, 0, DIMM3_B6_SCR0, 0);
- pci_write_cfg_long (0, 0, DIMM3_B7_SCR0, 0);
-
- /* Determine timing */
- select_cas (&banks[0], 0);
- select_cas (&banks[2], 0);
-
- /* FIXME: What about write recovery */
- /* Auto refresh Precharge */
-#if 0
- reg32 = (0x3 << 13) | (0x7 << 10) | ((banks[0].trp - 2) << 8) |
- /* Write recovery CAS Latency */
- (0x1 << 6) | (banks[0].cas_used << 4) |
- /* RAS/CAS latency */
- ((banks[0].trcd - 1) << 0);
-
- reg32 |= ((0x3 << 13) | (0x7 << 10) | ((banks[2].trp - 2) << 8) |
- (0x1 << 6) | (banks[2].cas_used << 4) |
- ((banks[2].trcd - 1) << 0)) << 16;
-#else
- if (100000000 == gd->bus_clk)
- reg32 = 0x71737173;
- else
- reg32 = 0x69736973;
-#endif
- pci_write_cfg_long (0, 0, DIMM0_TCR0, reg32);
- debug ("DIMM0_TCR0 = 0x%08x\n", reg32);
-
- /* Write default in DIMM2/3 (not used on A1) */
- pci_write_cfg_long (0, 0, DIMM2_TCR0, 0x7d737d73);
-
-
- /* Determine buffered/unbuffered mode for each SIMM. Uses first bank as reference (second, if present, uses the same) */
- reg32 = pci_read_cfg_long (0, 0, DRAM_GCR0);
- reg32 &= 0xFF00FFFF;
-
-#if 0
- if (banks[0].used && banks[0].registered)
- reg32 |= 0x1 << 16;
-
- if (banks[2].used && banks[2].registered)
- reg32 |= 0x1 << 18;
-#else
- if (banks[0].registered || banks[2].registered)
- reg32 |= 0x55 << 16;
-#endif
- pci_write_cfg_long (0, 0, DRAM_GCR0, reg32);
- debug ("DRAM_GCR0 = 0x%08x\n", reg32);
-
- /* Determine refresh */
- refresh_clocks = 0xffffffff;
- auto_refresh = 1;
-
- for (i = 0; i < 4; i++) {
- if (banks[i].used) {
- if (banks[i].auto_refresh == 0)
- auto_refresh = 0;
- if (banks[i].refresh_time < refresh_clocks)
- refresh_clocks = banks[i].refresh_time;
- }
- }
-
-
-#if 1
- /* It seems this is suggested by the ArticiaS data book */
- if (100000000 == gd->bus_clk)
- refresh_clocks = 1561;
- else
- refresh_clocks = 2083;
-#endif
-
-
- debug ("Refresh set to %ld clocks, auto refresh %s\n",
- refresh_clocks, auto_refresh ? "on" : "off");
-
- pci_write_cfg_long (0, 0, DRAM_REFRESH0,
- (1 << 16) | (1 << 15) | (auto_refresh << 12) |
- (refresh_clocks));
- debug ("DRAM_REFRESH0 = 0x%08x\n",
- (1 << 16) | (1 << 15) | (auto_refresh << 12) |
- (refresh_clocks));
-
-/* pci_write_cfg_long(0, 0, DRAM_REFRESH0, 0x00019400); */
-
- /* Set mode registers */
- /* FIXME: For now, set same burst len for all modules. Dunno if that's necessary */
- /* Find a common burst len */
- burst_support = 0xff;
-
- if (banks[0].used)
- burst_support = banks[0].burst_len;
- if (banks[1].used)
- burst_support = banks[1].burst_len;
- if (banks[2].used)
- burst_support = banks[2].burst_len;
- if (banks[3].used)
- burst_support = banks[3].burst_len;
-
- /*
- ** Mode register:
- ** Bits Use
- ** 0-2 Burst len
- ** 3 Burst type (0 = sequential, 1 = interleave)
- ** 4-6 CAS latency
- ** 7-8 Operation mode (0 = default, all others invalid)
- ** 9 Write burst
- ** 10-11 Reserved
- **
- ** Mode register burst table:
- ** A2 A1 A0 lenght
- ** 0 0 0 1
- ** 0 0 1 2
- ** 0 1 0 4
- ** 0 1 1 8
- ** 1 0 0 invalid
- ** 1 0 1 invalid
- ** 1 1 0 invalid
- ** 1 1 1 page (only valid for non-interleaved)
- */
-
- burst_len = burst_to_len (burst_support);
- burst_len = 2; /* FIXME */
-
- if (banks[0].used) {
- pci_write_cfg_word (0, 0, DRAM_PCR0,
- 0x8000 | burst_len | (banks[0].cas_used << 4));
- debug ("Mode bank 0: 0x%08x\n",
- 0x8000 | burst_len | (banks[0].cas_used << 4));
- } else {
- /* Seems to be needed to disable the bank */
- pci_write_cfg_word (0, 0, DRAM_PCR0, 0x0000 | 0x032);
- }
-
- if (banks[1].used) {
- pci_write_cfg_word (0, 0, DRAM_PCR0,
- 0x9000 | burst_len | (banks[1].cas_used << 4));
- debug ("Mode bank 1: 0x%08x\n",
- 0x8000 | burst_len | (banks[1].cas_used << 4));
- } else {
- /* Seems to be needed to disable the bank */
- pci_write_cfg_word (0, 0, DRAM_PCR0, 0x1000 | 0x032);
- }
-
-
- if (banks[2].used) {
- pci_write_cfg_word (0, 0, DRAM_PCR0,
- 0xa000 | burst_len | (banks[2].cas_used << 4));
- debug ("Mode bank 2: 0x%08x\n",
- 0x8000 | burst_len | (banks[2].cas_used << 4));
- } else {
- /* Seems to be needed to disable the bank */
- pci_write_cfg_word (0, 0, DRAM_PCR0, 0x2000 | 0x032);
- }
-
-
- if (banks[3].used) {
- pci_write_cfg_word (0, 0, DRAM_PCR0,
- 0xb000 | burst_len | (banks[3].cas_used << 4));
- debug ("Mode bank 3: 0x%08x\n",
- 0x8000 | burst_len | (banks[3].cas_used << 4));
- } else {
- /* Seems to be needed to disable the bank */
- pci_write_cfg_word (0, 0, DRAM_PCR0, 0x3000 | 0x032);
- }
-
-
- pci_write_cfg_word (0, 0, 0xba, 0x00);
-
- return total_ram;
-}
-
-extern int drv_isa_kbd_init (void);
-
-int last_stage_init (void)
-{
- drv_isa_kbd_init ();
- return 0;
-}
-
-int overwrite_console (void)
-{
- return (0);
-}
-
-#define in_8 read_byte
-#define out_8 write_byte
-
-static __inline__ unsigned long get_msr (void)
-{
- unsigned long msr;
-
- asm volatile ("mfmsr %0":"=r" (msr):);
-
- return msr;
-}
-
-static __inline__ void set_msr (unsigned long msr)
-{
- asm volatile ("mtmsr %0"::"r" (msr));
-}
-
-int board_early_init_f (void)
-{
- unsigned char c_value = 0;
- unsigned long msr;
-
- /* Basic init of PS/2 keyboard (needed for some reason)... */
- /* Ripped from John's code */
- while ((in_8 ((unsigned char *) 0xfe000064) & 0x02) != 0);
- out_8 ((unsigned char *) 0xfe000064, 0xaa);
- while ((in_8 ((unsigned char *) 0xfe000064) & 0x01) == 0);
- c_value = in_8 ((unsigned char *) 0xfe000060);
- while ((in_8 ((unsigned char *) 0xfe000064) & 0x02) != 0);
- out_8 ((unsigned char *) 0xfe000064, 0xab);
- while ((in_8 ((unsigned char *) 0xfe000064) & 0x01) == 0);
- c_value = in_8 ((unsigned char *) 0xfe000060);
- while ((in_8 ((unsigned char *) 0xfe000064) & 0x02) != 0);
- out_8 ((unsigned char *) 0xfe000064, 0xae);
-/* while ((in_8((unsigned char *)0xfe000064) & 0x01) == 0); */
-/* c_value = in_8((unsigned char *)0xfe000060); */
-
- /* Enable FPU */
- msr = get_msr ();
- set_msr (msr | MSR_FP);
-
- via_calibrate_bus_freq ();
-
- return 0;
-}
diff --git a/board/MAI/AmigaOneG3SE/articiaS.h b/board/MAI/AmigaOneG3SE/articiaS.h
deleted file mode 100644
index ce20d03065..0000000000
--- a/board/MAI/AmigaOneG3SE/articiaS.h
+++ /dev/null
@@ -1,142 +0,0 @@
-#ifndef ARTICIAS_H
-#define ARTICIAS_H
-
-#include "short_types.h"
-#include <common.h>
-
-#define REG_GROUP 0xF0
-
-/* ArticiaS registers */
-#define GLOBALINFO0 0x50
-#define GLOBALINFO1 0x51
-#define GLOBALINFO2 0x52
-#define GLOBALINFO3 0x53
-#define GLOBALCTL0 0x54
-#define GLOBALCTL1 0x55
-#define NVRAMCTL 0x56
-#define PCI1ACR0 0x58
-#define PCI1ACR1 0x59
-#define PCI1ACR2 0x5a
-#define PCI1ACR3 0x5b
-#define HBUSACR0 0x5c
-#define HBUSACR1 0x5d
-#define HBUSACR2 0x5e
-#define HBUSACR3 0x5f
-#define HOSTINT0 0x68
-#define HOSTINT1 0x69
-#define HOSTINT2 0x6a
-#define HOSTINT3 0x6b
-#define HOSTRBCR 0x70
-#define XDBCR 0x74
-
-#define LBSBCR2 0xd2
-
-
-/* Memory controller */
-
-#define DIMM0_B0_SCR0 0x90
-#define DIMM0_B1_SCR0 0x94
-#define DIMM1_B2_SCR0 0x98
-#define DIMM1_B3_SCR0 0x9c
-#define DIMM2_B4_SCR0 0xa0
-#define DIMM2_B5_SCR0 0xa4
-#define DIMM3_B6_SCR0 0xa8
-#define DIMM3_B7_SCR0 0xac
-
-#define DIMM0_TCR0 0xb0
-#define DIMM1_TCR0 0xb2
-#define DIMM2_TCR0 0xb4
-#define DIMM3_TCR0 0xb6
-
-#define DRAM_REFRESH0 0xb8
-#define DRAM_GCR0 0xc0
-#define DRAM_PCR0 0xc6
-#define DRAM_ECC0 0xc4
-#define SRAM_CR 0xc8
-#define DRAM_RAS_CTL0 0xcc
-#define DRAM_RAS_CTL1 0xcd
-
-/* Bits for REG_GROUP */
-#define REG_GROUP_MULTI (1<<1)
-#define REG_GROUP_SPECIAL (1<<3)
-#define REG_GROUP_DIAG (0x1<<4)
-#define REG_GROUP_POWER (0x2<<4)
-
-
-#define GLOBALINFO0_BO (1<<7)
-
-
-#define GLOBALINFO2_B1ARBITER (1<<6)
-
-
-#define HBUSACR0_CPUAPC (1<<0)
-#define HBUSACR0_NUMREQ_2 (0<<1)
-#define HBUSACR0_NUMREQ_3 (1<<1)
-#define HBUSACR0_NUMREQ_4 (2<<1)
-#define HBUSACR0_NUMREQ_MASK (7<<1)
-#define HBUSACR0_RAW (1<<6)
-#define HBUSACR0_WAIT (1<<7)
-#define HBUSACR0_RESERVED (0x30)
-
-
-#define HBUSACR2_BURST (1<<0)
-#define HBUSACR2_LAT (1<<1)
-
-
-#define HBUSACR3_LMWC_SM (1<<0)
-#define HBUSACR3_LMWC_PCI1 (1<<1)
-#define HBUSACR3_LMWC_PCI0 (1<<2)
-#define HBUSACR3_PMWC_PCI1 (1<<3)
-#define HBUSACR3_PMWC_PCI0 (1<<4)
-#define HBUSACR3_FKH (1<<5)
-#define HBUSACR3_92H_EN (1<<6)
-#define HBUSACR3_60H_64H_EN (1<<7)
-
-
-#define HOSTRBCR_PREFETCH (1<<4)
-
-
-#define XDBCR_HWTOXD (1<<0)
-#define XDBCR_KBTOXD (1<<1)
-#define XDBCR_RTCTOXD (1<<2)
-#define XDBCR_SCALE_1_1 (0x0<<3)
-#define XDBCR_SCALE_2_2 (0x1<<3)
-#define XDBCR_SCALE_3_2 (0x2<<3)
-#define XDBCR_SCALE_4_4 (0x3<<3)
-#define XDBCR_SCALE_5_8 (0x4<<3)
-#define XDBCR_SCALE_6_8 (0x5<<3)
-#define XDBCR_SCALE_8_8 (0x6<<3)
-#define XDBCR_SCALE_0_16 (0x7<<3)
-#define XDBCR_XDPROM (1<<7)
-
-
-#define LBSBCR2_1_RWAC (1<<2)
-
-
-/* PCI controller */
-#define ARTICIAS_PCI_CFGADDR 0xfec00cf8
-#define ARTICIAS_PCI_CFGDATA 0xfee00cfc
-
-#define ARTICIAS_PCI_BUS 0x80000000
-#define ARTICIAS_PCI_MAXSIZE 0x7cffffff
-#define ARTICIAS_PCI_PHYS 0x80000000
-
-#define ARTICIAS_SYS_BUS 0x00000000
-#define ARTICIAS_SYS_MAXSIZE 0x7fffffff
-#define ARTICIAS_SYS_PHYS 0x00000000
-
-#define ARTICIAS_PCIIO_BUS 0x00800000
-#define ARTICIAS_PCIIO_MAXSIZE 0x003fffff
-#define ARTICIAS_PCIIO_PHYS 0xfe800000
-
-#define ARTICIAS_ISAIO_BUS 0x00002000
-#define ARTICIAS_ISAIO_MAXSIZE 0x0000d000
-#define ARTICIAS_ISAIO_PHYS 0xfe002000
-
-
-/* Prototypes */
-long articiaS_ram_init(void);
-void articiaS_pci_init(void);
-
-
-#endif
diff --git a/board/MAI/AmigaOneG3SE/articiaS_pci.c b/board/MAI/AmigaOneG3SE/articiaS_pci.c
deleted file mode 100644
index d2e9f292e0..0000000000
--- a/board/MAI/AmigaOneG3SE/articiaS_pci.c
+++ /dev/null
@@ -1,576 +0,0 @@
-/*
- * (C) Copyright 2002
- * Hyperion Entertainment, Hans-JoergF@hyperion-entertainment.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <pci.h>
-#include "memio.h"
-#include "articiaS.h"
-
-#undef ARTICIA_PCI_DEBUG
-
-#ifdef ARTICIA_PCI_DEBUG
-#define PRINTF(fmt,args...) printf (fmt ,##args)
-#else
-#define PRINTF(fmt,args...)
-#endif
-
-struct pci_controller articiaS_hose;
-
-long irq_alloc(long wanted);
-
-static pci_dev_t pci_hose_find_class(struct pci_controller *hose, int bus, short find_class, int index);
-static int articiaS_init_vga(void);
-static void pci_cfgfunc_dummy(struct pci_controller *host, pci_dev_t dev, struct pci_config_table *table);
-unsigned char pci_irq_alloc(void);
-
-extern void via_cfgfunc_via686(struct pci_controller * host, pci_dev_t dev, struct pci_config_table *table);
-extern void via_cfgfunc_ide_init(struct pci_controller *host, pci_dev_t dev, struct pci_config_table *table);
-extern void via_init_irq_routing(uint8 []);
-extern void via_init_afterscan(void);
-
-#define cfgfunc_via686 1
-#define cfgfunc_dummy 2
-#define cfgfunc_ide_init 3
-
-static struct pci_config_table config_table[] =
-{
- {
- 0x1106, PCI_ANY_ID, PCI_CLASS_BRIDGE_ISA, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
- (void *)cfgfunc_via686, {0, 0, 0}
- },
- {
- 0x1106, PCI_ANY_ID, PCI_ANY_ID, 0,7,4,
- (void *)cfgfunc_dummy, {0,0,0}
- },
- {
- 0x1106, 0x3068, PCI_ANY_ID, 0, 7, PCI_ANY_ID,
- (void *)cfgfunc_dummy, {0,0,0}
- },
- {
- 0x1106, PCI_ANY_ID, PCI_ANY_ID, 0,7,1,
- (void *)cfgfunc_ide_init, {0,0,0}
- },
- {
- 0,
- }
-};
-
-
-void pci_cfgfunc_dummy(struct pci_controller *host, pci_dev_t dev, struct pci_config_table *table)
-{
-
-
-}
-
-unsigned long irq_penalties[16] =
-{
- 1000, /* 0:timer */
- 1000, /* 1:keyboard */
- 1000, /* 2:cascade */
- 50, /* 3:serial (COM2) */
- 50, /* 4:serial (COM1) */
- 4, /* 5:USB2 */
- 100, /* 6:floppy */
- 3, /* 7:parallel */
- 50, /* 8:AC97/MC97 */
- 0, /* 9: */
- 3, /* 10:: */
- 0, /* 11: */
- 3, /* 12: USB1 */
- 0, /* 13: */
- 100, /* 14: ide0 */
- 100, /* 15: ide1 */
-};
-
-
-/*
- * The following defines a hard-coded interrupt mapping for the
- * know devices on the board.
- * If a device isn't found here, assumed to be a device that's
- * plugged into a PCI or AGP slot
- * NOTE: This table is machine dependant.
- */
-
-struct pci_irq_fixup_table
-{
- uint8 bus; /* Bus number */
- uint8 device; /* Device number */
- uint8 func; /* Function number */
- uint8 interrupt; /* Interrupt to use (0xff to disable) */
-};
-
-struct pci_irq_fixup_table fixuptab [] =
-{
- { 0, 0, 0, 0xff}, /* Articia S host bridge */
- { 0, 1, 0, 0xff}, /* Articia S AGP bridge */
-/* { 0, 6, 0, 0x05}, /###* 3COM ethernet */
- { 0, 7, 0, 0xff}, /* VIA southbridge */
- { 0, 7, 1, 0x0e}, /* IDE controller in legacy mode */
-/* { 0, 7, 2, 0x05}, /###* First USB controller */
-/* { 0, 7, 3, 0x0c}, /###* Second USB controller (shares interrupt with ethernet) */
- { 0, 7, 4, 0xff}, /* ACPI Power Management */
-/* { 0, 7, 5, 0x08}, /###* AC97 */
-/* { 0, 7, 6, 0x08}, /###* MC97 */
- { 0xff, 0xff, 0xff, 0xff}
-};
-
-
-/*
- * This table maps IRQ's to PCI interrupts
- */
-
-uint8 pci_intmap[4] = {0, 0, 0, 0};
-
-/*
- * Map PCI slots to interrupt routings
- * This table lists the device number assigned to a card inserted
- * into the slot, along with a permutation for the slot's IRQ routing.
- * NOTE: This table is machine dependant.
- */
-
-struct pci_slot_irq_routing
-{
- uint8 bus;
- uint8 device;
-
- uint8 ints[4];
-};
-
-struct pci_slot_irq_routing amigaone_pci_routing[] =
-{
- {0, 8, {0, 1, 2, 3}}, /* Slot 1 (left of riser slot) */
- {0, 9, {1, 2, 3, 0}}, /* Slot 2 (middle slot) */
- {0, 10, {2, 3, 0, 1}}, /* Slot 3 (leftmost slot) */
- {1, 0, {1, 0, 2, 3}}, /* AGP slot (only IRQA and IRQB) */
- {1, 1, {1, 2, 3, 0}}, /* PCI slot on AGP bus */
- {0, 6, {3, 3, 3, 3}}, /* On board ethernet */
- {0, 7, {0, 1, 2, 3}}, /* Southbridge */
- {0xff, 0, {0, 0, 0, 0}}
-};
-
-void articiaS_pci_irq_init(void)
-{
- char *s;
-
- s = getenv("pci_irqa");
- if (s)
- pci_intmap[0] = simple_strtoul (s, NULL, 10);
- else
- pci_intmap[0] = pci_irq_alloc();
-
- s = getenv("pci_irqb");
- if (s)
- pci_intmap[1] = simple_strtoul (s, NULL, 10);
- else
- pci_intmap[1] = pci_irq_alloc();
-
- s = getenv("pci_irqc");
- if (s)
- pci_intmap[2] = simple_strtoul (s, NULL, 10);
- else
- pci_intmap[2] = pci_irq_alloc();
-
- s = getenv("pci_irqd");
- if (s)
- pci_intmap[3] = simple_strtoul (s, NULL, 10);
- else
- pci_intmap[3] = pci_irq_alloc();
-}
-
-
-unsigned char pci_irq_alloc(void)
-{
- int i;
- int interrupt = 10;
- unsigned long min_penalty = 1000;
-
- /* Search for the minimal penalty, favoring interrupts at the end */
- for (i = 0; i < 16; i++)
- {
- if (irq_penalties[i] <= min_penalty)
- {
- interrupt = i;
- min_penalty = irq_penalties[i];
- }
- }
-
- PRINTF("pci_irq_alloc: Minimal penalty is %ld for %d\n", min_penalty, interrupt);
-
- irq_penalties[interrupt]++;
-
- return interrupt;
-}
-
-
-void articiaS_pci_fixup_irq(struct pci_controller *hose, pci_dev_t dev)
-{
- int8 bus, device, func, pin, line;
- int i;
-
- bus = PCI_BUS(dev);
- device = PCI_DEV(dev);
- func = PCI_FUNC(dev);
-
- PRINTF("Fixup irq of %d:%d.%d\n", bus, device, func);
-
- /* Search for the device in the table */
- for (i = 0; fixuptab[i].bus != 0xff; i++)
- {
- if (bus == fixuptab[i].bus && device == fixuptab[i].device && func == fixuptab[i].func)
- {
- /* If the device needs an interrupt, write it */
- if (fixuptab[i].interrupt != 0xff)
- {
- PRINTF("Assigning IRQ %d (fixed)\n", fixuptab[i].interrupt);
- pci_write_config_byte(dev, PCI_INTERRUPT_LINE, fixuptab[i].interrupt);
- }
- else
- {
- /* Otherwise, see if it wants an interrupt, and disable it if needed */
- pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
- if (pin)
- {
- PRINTF("Disabling IRQ\n");
- pci_write_config_byte(dev, PCI_INTERRUPT_LINE, 0xff);
- }
- }
-
- return;
- }
- }
-
- /* If we get here, we have another PCI device in a slot... find the appropriate IRQ */
-
- /* Find matching pin */
- pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
- pin--;
-
- /* Search for it's map */
- for (i = 0; amigaone_pci_routing[i].bus != 0xff; i++)
- {
- if (bus == amigaone_pci_routing[i].bus && device == amigaone_pci_routing[i].device)
- {
- line = pci_intmap[amigaone_pci_routing[i].ints[pin]];
- PRINTF("Assigning IRQ %d (pin %d)\n", line, pin);
- pci_write_config_byte(dev, PCI_INTERRUPT_LINE, line);
- return;
- }
- }
-
- PRINTF("Unkonwn PCI device found\n");
-}
-
-void articiaS_pci_init (void)
-{
- int i;
- char *s;
-
- PRINTF("atriciaS_pci_init\n");
-
- /* Why aren't these relocated?? */
- for (i=0; config_table[i].config_device; i++)
- {
- switch((int)config_table[i].config_device)
- {
- case cfgfunc_via686: config_table[i].config_device = via_cfgfunc_via686; break;
- case cfgfunc_dummy: config_table[i].config_device = pci_cfgfunc_dummy; break;
- case cfgfunc_ide_init: config_table[i].config_device = via_cfgfunc_ide_init; break;
- default: PRINTF("Error: Unknown constant\n");
- }
- }
-
- articiaS_hose.first_busno = 0;
- articiaS_hose.last_busno = 0xff;
- articiaS_hose.config_table = config_table;
- articiaS_hose.fixup_irq = articiaS_pci_fixup_irq;
-
- articiaS_pci_irq_init();
-
- /* System memory */
- pci_set_region(articiaS_hose.regions + 0,
- ARTICIAS_SYS_BUS,
- ARTICIAS_SYS_PHYS,
- ARTICIAS_SYS_MAXSIZE,
- PCI_REGION_MEM | PCI_REGION_MEMORY);
-
- /* PCI memory space */
- pci_set_region(articiaS_hose.regions + 1,
- ARTICIAS_PCI_BUS,
- ARTICIAS_PCI_PHYS,
- ARTICIAS_PCI_MAXSIZE,
- PCI_REGION_MEM);
-
- /* PCI io space */
- pci_set_region(articiaS_hose.regions + 2,
- ARTICIAS_PCIIO_BUS,
- ARTICIAS_PCIIO_PHYS,
- ARTICIAS_PCIIO_MAXSIZE,
- PCI_REGION_IO);
-
- /* PCI/ISA io space */
- pci_set_region(articiaS_hose.regions + 3,
- ARTICIAS_ISAIO_BUS,
- ARTICIAS_ISAIO_PHYS,
- ARTICIAS_ISAIO_MAXSIZE,
- PCI_REGION_IO);
-
-
- articiaS_hose.region_count = 4;
-
- pci_setup_indirect(&articiaS_hose, ARTICIAS_PCI_CFGADDR, ARTICIAS_PCI_CFGDATA);
- PRINTF("Registering articia hose...\n");
- pci_register_hose(&articiaS_hose);
- PRINTF("Enabling AGP...\n");
- pci_write_config_byte(PCI_BDF(0,0,0), 0x58, 0x01);
- PRINTF("Scanning bus...\n");
- articiaS_hose.last_busno = pci_hose_scan(&articiaS_hose);
-
- via_init_irq_routing(pci_intmap);
-
- PRINTF("After-Scan results:\n");
- PRINTF("Bus range: %d - %d\n", articiaS_hose.first_busno , articiaS_hose.last_busno);
-
- via_init_afterscan();
-
- pci_write_config_byte(PCI_BDF(0,1,0), PCI_INTERRUPT_LINE, 0xFF);
-
- s = getenv("as_irq");
- if (s)
- {
- pci_write_config_byte(PCI_BDF(0,0,0), PCI_INTERRUPT_LINE, simple_strtoul (s, NULL, 10));
- }
-
- s = getenv("x86_run_bios");
- if (!s || (s && strcmp(s, "on")==0))
- {
- if (articiaS_init_vga() == -1)
- {
- /* If the VGA didn't init and we have stdout set to VGA, reset to serial */
-/* s = getenv("stdout"); */
-/* if (s && strcmp(s, "vga") == 0) */
-/* { */
-/* setenv("stdout", "serial"); */
-/* } */
- }
- }
- pci_write_config_byte(PCI_BDF(0,1,0), PCI_INTERRUPT_LINE, 0xFF);
-
-}
-
-pci_dev_t pci_hose_find_class(struct pci_controller *hose, int bus, short find_class, int index)
-{
- unsigned int sub_bus, found_multi=0;
- unsigned short vendor, class;
- unsigned char header_type;
- pci_dev_t dev;
- u8 c1, c2;
-
- sub_bus = bus;
-
- for (dev = PCI_BDF(bus,0,0);
- dev < PCI_BDF(bus,PCI_MAX_PCI_DEVICES-1,PCI_MAX_PCI_FUNCTIONS-1);
- dev += PCI_BDF(0,0,1))
- {
- if ( dev == PCI_BDF(hose->first_busno,0,0) )
- continue;
-
- if (PCI_FUNC(dev) && !found_multi)
- continue;
-
- pci_hose_read_config_byte(hose, dev, PCI_HEADER_TYPE, &header_type);
-
- pci_hose_read_config_word(hose, dev, PCI_VENDOR_ID, &vendor);
-
- if (vendor != 0xffff && vendor != 0x0000)
- {
-
- if (!PCI_FUNC(dev))
- found_multi = header_type & 0x80;
- pci_hose_read_config_byte(hose, dev, 0x0B, &c1);
- pci_hose_read_config_byte(hose, dev, 0x0A, &c2);
- class = c1<<8 | c2;
- /*printf("At %02x:%02x:%02x: class %x\n", */
- /* PCI_BUS(dev), PCI_DEV(dev), PCI_FUNC(dev), class); */
- if (class == find_class)
- {
- if (index == 0)
- return dev;
- else index--;
- }
- }
- }
-
- return ~0;
-}
-
-
-/*
- * For a given bus number, find the bridge on this hose that provides this
- * bus number. The function scans for bridges and peeks config space offset
- * 0x19 (PCI_SECONDARY_BUS).
- */
-pci_dev_t pci_find_bridge_for_bus(struct pci_controller *hose, int busnr)
-{
- pci_dev_t dev;
- int bus;
- unsigned int found_multi=0;
- unsigned char header_type;
- unsigned short vendor;
- unsigned char secondary_bus;
-
- if (hose == NULL) hose = &articiaS_hose;
-
- if (busnr < hose->first_busno || busnr > hose->last_busno) return PCI_ANY_ID; /* Not in range */
-
- /*
- * The bridge must be on a lower bus number
- */
- for (bus = hose->first_busno; bus < busnr; bus++)
- {
- for (dev = PCI_BDF(bus,0,0);
- dev < PCI_BDF(bus,PCI_MAX_PCI_DEVICES-1,PCI_MAX_PCI_FUNCTIONS-1);
- dev += PCI_BDF(0,0,1))
- {
- if ( dev == PCI_BDF(hose->first_busno,0,0) )
- continue;
-
- if (PCI_FUNC(dev) && !found_multi)
- continue;
-
- pci_hose_read_config_byte(hose, dev, PCI_HEADER_TYPE, &header_type);
-
- pci_hose_read_config_word(hose, dev, PCI_VENDOR_ID, &vendor);
-
- if (vendor != 0xffff && vendor != 0x0000)
- {
-
- if (!PCI_FUNC(dev))
- found_multi = header_type & 0x80;
- if (header_type == 1) /* Bridge device header */
- {
- pci_hose_read_config_byte(hose, dev, PCI_SECONDARY_BUS, &secondary_bus);
- if ((int)secondary_bus == busnr) return dev;
- }
-
- }
- }
- }
- return PCI_ANY_ID;
-}
-
-static short classes[] =
-{
- PCI_CLASS_DISPLAY_VGA,
- PCI_CLASS_DISPLAY_XGA,
- PCI_CLASS_DISPLAY_3D,
- PCI_CLASS_DISPLAY_OTHER,
- ~0
-};
-
-extern int execute_bios(pci_dev_t gr_dev, void *);
-
-pci_dev_t video_dev;
-
-int articiaS_init_vga (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- extern void shutdown_bios(void);
- pci_dev_t dev = ~0;
- int busnr = 0;
- int classnr = 0;
-
- video_dev = PCI_ANY_ID;
-
- printf("VGA: ");
-
- PRINTF("Trying to initialize x86 VGA Card(s)\n");
-
- while (dev == ~0)
- {
- PRINTF("Searching for class 0x%x on bus %d\n", classes[classnr], busnr);
- /* Find the first of this class on this bus */
- dev = pci_hose_find_class(&articiaS_hose, busnr, classes[classnr], 0);
- if (dev != ~0)
- {
- PRINTF("Found VGA Card at %02x:%02x:%02x\n", PCI_BUS(dev), PCI_DEV(dev), PCI_FUNC(dev));
- break;
- }
- busnr++;
- if (busnr > articiaS_hose.last_busno)
- {
- busnr = 0;
- classnr ++;
- if (classes[classnr] == ~0)
- {
- printf("NOT PRESENT\n");
- return -1;
- }
- }
- }
-
- /*
- * If we get here we have found the first graphics card.
- * If the bus number is not 0, then it is probably behind a bridge, and the
- * bridge needs to be told to forward VGA access.
- */
-
- if (PCI_BUS(dev) != 0)
- {
- pci_dev_t bridge;
- PRINTF("Behind bridge, looking for bridge\n");
- bridge = pci_find_bridge_for_bus(&articiaS_hose, PCI_BUS(dev));
- if (dev != PCI_ANY_ID)
- {
- unsigned char agp_control_0;
- PRINTF("Got the bridge at %02x:%02x:%02x\n",
- PCI_BUS(bridge), PCI_DEV(bridge), PCI_FUNC(bridge));
- pci_hose_read_config_byte(&articiaS_hose, bridge, 0x3E, &agp_control_0);
- agp_control_0 |= 0x18;
- pci_hose_write_config_byte(&articiaS_hose, bridge, 0x3E, agp_control_0);
- PRINTF("Configured for VGA forwarding\n");
- }
- }
-
- /*
- * Now try to run the bios
- */
- PRINTF("Trying to run bios now\n");
- if (execute_bios(dev, gd->relocaddr))
- {
- printf("OK\n");
- video_dev = dev;
- }
- else
- {
- printf("ERROR\n");
- }
-
- PRINTF("Done scanning.\n");
-
- shutdown_bios();
-
- if (dev == PCI_ANY_ID) return -1;
- else return 0;
-
-}
diff --git a/board/MAI/AmigaOneG3SE/board_asm_init.S b/board/MAI/AmigaOneG3SE/board_asm_init.S
deleted file mode 100644
index 086b19c052..0000000000
--- a/board/MAI/AmigaOneG3SE/board_asm_init.S
+++ /dev/null
@@ -1,156 +0,0 @@
-#include "macros.h"
-
-
-#define GLOBALINFO0 0x50
-#define GLOBALINFO0_BO (1<<7)
-#define GLOBALINFO2_B1ARBITER (1<<6)
-#define HBUSACR0 0x5c
-#define HBUSACR2_BURST (1<<0)
-#define HBUSACR2_LAT (1<<1)
-
-#define RECEIVER_HOLDING 0
-#define TRANSMITTER_HOLDING 0
-#define INTERRUPT_ENABLE 1
-#define INTERRUPT_STATUS 2
-#define FIFO_CONTROL 2
-#define LINE_CONTROL 3
-#define MODEM_CONTROL 4
-#define LINE_STATUS 5
-#define MODEM_STATUS 6
-#define SCRATCH_PAD 7
-
-#define DIVISOR_LATCH_LSB 0
-#define DIVISOR_LATCH_MSB 1
-#define PRESCALER_DIVISION 5
-
-#define UART(x) (0x3f8+(x))
-
-#define GLOBALINFO0 0x50
-#define GLOBALINFO0_BO (1<<7)
-#define GLOBALINFO2_B1ARBITER (1<<6)
-#define HBUSACR0 0x5c
-#define HBUSACR2_BURST (1<<0)
-#define HBUSACR2_LAT (1<<1)
-
-#define SUPERIO_1 ((7 << 3) | (0))
-#define SUPERIO_2 ((7 << 3) | (1))
-
- .globl board_asm_init
-
-board_asm_init:
- mflr r29
- /* Set 'Must-set' register */
- li r3, 0
- li r4, 0
- li r5, 0x5e
- bl pci_read_cfg_byte
- ori r3, r3, (1<<1)
- xori r6, r3, (1<<1)
- li r3, 0
- bl pci_write_cfg_byte
-
- li r3, 0
- li r5, 0x52
- bl pci_read_cfg_byte
- ori r6, r3, (1<<6)
- li r3, 0
- bl pci_write_cfg_byte
-
- li r3, 0
- li r4, 0x08
- li r5, 0xd2
- bl pci_read_cfg_byte
- ori r6, r3, (1<<2)
- li r3, 0
- bl pci_write_cfg_byte
-
-
- /* Do PCI reset */
-/* li r3, 0
- li r4, 0x38
- li r5, 0x47
- bl pci_read_cfg_byte
- ori r6, r3, 0x01
- li r3, 0
- li r4, 0x38
- li r5, 0x47
- bl pci_write_cfg_byte*/
-
-
- /* Enable NVRAM for environment */
- li r3, 0
- li r4, 0
- li r5, 0x56
- li r6, 0x0B
- bl pci_write_cfg_byte
-
-
- /* Init Super-I/O chips */
-
- siowb 0x40, 0x08
- siowb 0x41, 0x01
- siowb 0x45, 0x80
- siowb 0x46, 0x60
- siowb 0x47, 0x20
- siowb 0x48, 0x01
- siowb 0x4a, 0xc4
- siowb 0x50, 0x0e
- siowb 0x51, 0x76
- siowb 0x52, 0x34
- siowb 0x54, 0x00
- siowb 0x55, 0x90
- siowb 0x56, 0x99
- siowb 0x57, 0x90
- siowb 0x85, 0x01
-
- /* Enable configuration mode for SuperIO */
- li r3, 0
- li r4, (7<<3)
- li r5, 0x85
- bl pci_read_cfg_byte
- ori r6, r3, 0x02
- mr r31, r6
- li r3,0
- bl pci_write_cfg_byte
-
- /* COM1 as 3f8 */
- outb 0x3f0, 0xe7
- outb 0x3f1, 0xfe
-
- /* COM2 as 2f8 */
- outb 0x3f0, 0xe8
- outb 0x3f1, 0xeb
-
- /* Enable */
- outb 0x3f0, 0xe2
- inb r3, 0x3f1
- ori r3, r3, 0x0c
- outb 0x3f0, 0xe2
- outbr 0x3f1, r3
-
- /* Disable configuration mode */
- li r3, 0
- li r4, (7<<3)
- li r5, 0x85
- mr r6, r31
- bl pci_write_cfg_byte
-
- /* Set line control */
- outb UART(LINE_CONTROL), 0x83
- outb UART(DIVISOR_LATCH_LSB), 0x0c
- outb UART(DIVISOR_LATCH_MSB), 0x00
- outb UART(LINE_CONTROL), 0x3
-
- mtlr r29
- blr
-
-
- .globl new_reset
- .globl new_reset_end
-new_reset:
- li r0, 0x100
- oris r0, r0, 0xFFF0
- mtlr r0
- blr
-
-new_reset_end:
diff --git a/board/MAI/AmigaOneG3SE/cmd_boota.c b/board/MAI/AmigaOneG3SE/cmd_boota.c
deleted file mode 100644
index 3e2835aaeb..0000000000
--- a/board/MAI/AmigaOneG3SE/cmd_boota.c
+++ /dev/null
@@ -1,129 +0,0 @@
-#include <common.h>
-#include <command.h>
-#include "../disk/part_amiga.h"
-#include <asm/cache.h>
-
-
-#undef BOOTA_DEBUG
-
-#ifdef BOOTA_DEBUG
-#define PRINTF(fmt,args...) printf (fmt ,##args)
-#else
-#define PRINTF(fmt,args...)
-#endif
-
-struct block_header {
- u32 id;
- u32 summed_longs;
- s32 chk_sum;
-};
-
-extern block_dev_desc_t *ide_get_dev (int dev);
-extern struct bootcode_block *get_bootcode (block_dev_desc_t * dev_desc);
-extern int sum_block (struct block_header *header);
-
-struct bootcode_block bblk;
-
-int do_boota (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
-{
- unsigned char *load_address = (unsigned char *) CFG_LOAD_ADDR;
- unsigned char *base_address;
- unsigned long offset;
-
- unsigned long part_number = 0;
- block_dev_desc_t *boot_disk;
- char *s;
- struct bootcode_block *boot_code;
-
- /* Get parameters */
-
- switch (argc) {
- case 2:
- load_address = (unsigned char *) simple_strtol (argv[1], NULL, 16);
- part_number = 0;
- break;
- case 3:
- load_address = (unsigned char *) simple_strtol (argv[1], NULL, 16);
- part_number = simple_strtol (argv[2], NULL, 16);
- break;
- }
-
- base_address = load_address;
-
- PRINTF ("Loading boot code from disk %d to %p\n", part_number,
- load_address);
-
- /* Find the appropriate disk device */
- boot_disk = ide_get_dev (part_number);
- if (!boot_disk) {
- PRINTF ("Unknown disk %d\n", part_number);
- return 1;
- }
-
- /* Find the bootcode block */
- boot_code = get_bootcode (boot_disk);
- if (!boot_code) {
- PRINTF ("Not a bootable disk %d\n", part_number);
- return 1;
- }
-
- /* Only use the offset from the first block */
- offset = boot_code->load_data[0];
- memcpy (load_address, &boot_code->load_data[1], 122 * 4);
- load_address += 122 * 4;
-
- /* Setup for the loop */
- bblk.next = boot_code->next;
- boot_code = &bblk;
-
- /* Scan the chain, and copy the loader succesively into the destination area */
- while (0xffffffff != boot_code->next) {
- PRINTF ("Loading block %d\n", boot_code->next);
-
- /* Load block */
- if (1 !=
- boot_disk->block_read (boot_disk->dev, boot_code->next, 1,
- (ulong *) & bblk)) {
- PRINTF ("Read error\n");
- return 1;
- }
-
- /* check sum */
- if (sum_block ((struct block_header *) (ulong *) & bblk) != 0) {
- PRINTF ("Checksum error\n");
- return 1;
- }
-
- /* Ok, concatenate it to the already loaded code */
- memcpy (load_address, boot_code->load_data, 123 * 4);
- load_address += 123 * 4;
- }
-
- printf ("Bootcode loaded to %p (size %d)\n", base_address,
- load_address - base_address);
- printf ("Entry point at %p\n", base_address + offset);
-
- flush_cache (base_address, load_address - base_address);
-
-
- s = getenv ("autostart");
- if (s && strcmp (s, "yes") == 0) {
- DECLARE_GLOBAL_DATA_PTR;
-
- void (*boot) (bd_t *, char *, block_dev_desc_t *);
- char *args;
-
- boot = (void (*)(bd_t *, char *, block_dev_desc_t *)) (base_address + offset);
- boot (gd->bd, getenv ("amiga_bootargs"), boot_disk);
- }
-
-
- return 0;
-}
-#if defined(CONFIG_AMIGAONEG3SE) && (CONFIG_COMMANDS & CFG_CMD_BSP)
-U_BOOT_CMD(
- boota, 3, 1, do_boota,
- "boota - boot an Amiga kernel\n",
- "address disk"
-);
-#endif /* _CMD_BOOTA_H */
diff --git a/board/MAI/AmigaOneG3SE/config.mk b/board/MAI/AmigaOneG3SE/config.mk
deleted file mode 100644
index 930a7930e2..0000000000
--- a/board/MAI/AmigaOneG3SE/config.mk
+++ /dev/null
@@ -1,32 +0,0 @@
-#
-# (C) Copyright 2002
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# AmigaOneG3SE boards
-#
-
-X86EMU = -I../bios_emulator/scitech/include -I../bios_emulator/scitech/src/x86emu
-
-TEXT_BASE = 0xfff00000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -Wa,-mregnames -DEASTEREGG $(X86EMU) -Dprintk=printf #-DDEBUG
diff --git a/board/MAI/AmigaOneG3SE/enet.c b/board/MAI/AmigaOneG3SE/enet.c
deleted file mode 100644
index d4be889ea8..0000000000
--- a/board/MAI/AmigaOneG3SE/enet.c
+++ /dev/null
@@ -1,884 +0,0 @@
-/*
- * (C) Copyright 2002
- * Adam Kowalczyk, ACK Software Controls Inc. akowalczyk@cogeco.ca
- *
- * Some portions taken from 3c59x.c Written 1996-1999 by Donald Becker.
- *
- * Outline of the program based on eepro100.c which is
- *
- * (C) Copyright 2002
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <malloc.h>
-#include <net.h>
-#include <asm/io.h>
-#include <pci.h>
-
-#include "articiaS.h"
-#include "memio.h"
-
-/* 3Com Ethernet PCI definitions*/
-
-/* #define PCI_VENDOR_ID_3COM 0x10B7 */
-#define PCI_DEVICE_ID_3COM_3C905C 0x9200
-
-/* 3Com Commands, top 5 bits are command and bottom 11 bits are parameters */
-
-#define TotalReset (0<<11)
-#define SelectWindow (1<<11)
-#define StartCoax (2<<11)
-#define RxDisable (3<<11)
-#define RxEnable (4<<11)
-#define RxReset (5<<11)
-#define UpStall (6<<11)
-#define UpUnstall (6<<11)+1
-#define DownStall (6<<11)+2
-#define DownUnstall (6<<11)+3
-#define RxDiscard (8<<11)
-#define TxEnable (9<<11)
-#define TxDisable (10<<11)
-#define TxReset (11<<11)
-#define FakeIntr (12<<11)
-#define AckIntr (13<<11)
-#define SetIntrEnb (14<<11)
-#define SetStatusEnb (15<<11)
-#define SetRxFilter (16<<11)
-#define SetRxThreshold (17<<11)
-#define SetTxThreshold (18<<11)
-#define SetTxStart (19<<11)
-#define StartDMAUp (20<<11)
-#define StartDMADown (20<<11)+1
-#define StatsEnable (21<<11)
-#define StatsDisable (22<<11)
-#define StopCoax (23<<11)
-#define SetFilterBit (25<<11)
-
-/* The SetRxFilter command accepts the following classes */
-
-#define RxStation 1
-#define RxMulticast 2
-#define RxBroadcast 4
-#define RxProm 8
-
-/* 3Com status word defnitions */
-
-#define IntLatch 0x0001
-#define HostError 0x0002
-#define TxComplete 0x0004
-#define TxAvailable 0x0008
-#define RxComplete 0x0010
-#define RxEarly 0x0020
-#define IntReq 0x0040
-#define StatsFull 0x0080
-#define DMADone (1<<8)
-#define DownComplete (1<<9)
-#define UpComplete (1<<10)
-#define DMAInProgress (1<<11) /* DMA controller is still busy.*/
-#define CmdInProgress (1<<12) /* EL3_CMD is still busy.*/
-
-/* Polling Registers */
-
-#define DnPoll 0x2d
-#define UpPoll 0x3d
-
-/* Register window 0 offets */
-
-#define Wn0EepromCmd 10 /* Window 0: EEPROM command register. */
-#define Wn0EepromData 12 /* Window 0: EEPROM results register. */
-#define IntrStatus 0x0E /* Valid in all windows. */
-
-/* Register window 0 EEPROM bits */
-
-#define EEPROM_Read 0x80
-#define EEPROM_WRITE 0x40
-#define EEPROM_ERASE 0xC0
-#define EEPROM_EWENB 0x30 /* Enable erasing/writing for 10 msec. */
-#define EEPROM_EWDIS 0x00 /* Disable EWENB before 10 msec timeout. */
-
-/* EEPROM locations. */
-
-#define PhysAddr01 0
-#define PhysAddr23 1
-#define PhysAddr45 2
-#define ModelID 3
-#define EtherLink3ID 7
-#define IFXcvrIO 8
-#define IRQLine 9
-#define NodeAddr01 10
-#define NodeAddr23 11
-#define NodeAddr45 12
-#define DriverTune 13
-#define Checksum 15
-
-/* Register window 1 offsets, the window used in normal operation */
-
-#define TX_FIFO 0x10
-#define RX_FIFO 0x10
-#define RxErrors 0x14
-#define RxStatus 0x18
-#define Timer 0x1A
-#define TxStatus 0x1B
-#define TxFree 0x1C /* Remaining free bytes in Tx buffer. */
-
-/* Register Window 2 */
-
-#define Wn2_ResetOptions 12
-
-/* Register Window 3: MAC/config bits */
-
-#define Wn3_Config 0 /* Internal Configuration */
-#define Wn3_MAC_Ctrl 6
-#define Wn3_Options 8
-
-#define BFEXT(value, offset, bitcount) \
- ((((unsigned long)(value)) >> (offset)) & ((1 << (bitcount)) - 1))
-
-#define BFINS(lhs, rhs, offset, bitcount) \
- (((lhs) & ~((((1 << (bitcount)) - 1)) << (offset))) | \
- (((rhs) & ((1 << (bitcount)) - 1)) << (offset)))
-
-#define RAM_SIZE(v) BFEXT(v, 0, 3)
-#define RAM_WIDTH(v) BFEXT(v, 3, 1)
-#define RAM_SPEED(v) BFEXT(v, 4, 2)
-#define ROM_SIZE(v) BFEXT(v, 6, 2)
-#define RAM_SPLIT(v) BFEXT(v, 16, 2)
-#define XCVR(v) BFEXT(v, 20, 4)
-#define AUTOSELECT(v) BFEXT(v, 24, 1)
-
-/* Register Window 4: Xcvr/media bits */
-
-#define Wn4_FIFODiag 4
-#define Wn4_NetDiag 6
-#define Wn4_PhysicalMgmt 8
-#define Wn4_Media 10
-
-#define Media_SQE 0x0008 /* Enable SQE error counting for AUI. */
-#define Media_10TP 0x00C0 /* Enable link beat and jabber for 10baseT. */
-#define Media_Lnk 0x0080 /* Enable just link beat for 100TX/100FX. */
-#define Media_LnkBeat 0x0800
-
-/* Register Window 7: Bus Master control */
-
-#define Wn7_MasterAddr 0
-#define Wn7_MasterLen 6
-#define Wn7_MasterStatus 12
-
-/* Boomerang bus master control registers. */
-
-#define PktStatus 0x20
-#define DownListPtr 0x24
-#define FragAddr 0x28
-#define FragLen 0x2c
-#define TxFreeThreshold 0x2f
-#define UpPktStatus 0x30
-#define UpListPtr 0x38
-
-/* The Rx and Tx descriptor lists. */
-
-#define LAST_FRAG 0x80000000 /* Last Addr/Len pair in descriptor. */
-#define DN_COMPLETE 0x00010000 /* This packet has been downloaded */
-
-struct rx_desc_3com {
- u32 next; /* Last entry points to 0 */
- u32 status; /* FSH -> Frame Start Header */
- u32 addr; /* Up to 63 addr/len pairs possible */
- u32 length; /* Set LAST_FRAG to indicate last pair */
-};
-
-/* Values for the Rx status entry. */
-
-#define RxDComplete 0x00008000
-#define RxDError 0x4000
-#define IPChksumErr (1<<25)
-#define TCPChksumErr (1<<26)
-#define UDPChksumErr (1<<27)
-#define IPChksumValid (1<<29)
-#define TCPChksumValid (1<<30)
-#define UDPChksumValid (1<<31)
-
-struct tx_desc_3com {
- u32 next; /* Last entry points to 0 */
- u32 status; /* bits 0:12 length, others see below */
- u32 addr;
- u32 length;
-};
-
-/* Values for the Tx status entry. */
-
-#define CRCDisable 0x2000
-#define TxDComplete 0x8000
-#define AddIPChksum 0x02000000
-#define AddTCPChksum 0x04000000
-#define AddUDPChksum 0x08000000
-#define TxIntrUploaded 0x80000000 /* IRQ when in FIFO, but maybe not sent. */
-
-/* XCVR Types */
-
-#define XCVR_10baseT 0
-#define XCVR_AUI 1
-#define XCVR_10baseTOnly 2
-#define XCVR_10base2 3
-#define XCVR_100baseTx 4
-#define XCVR_100baseFx 5
-#define XCVR_MII 6
-#define XCVR_NWAY 8
-#define XCVR_ExtMII 9
-#define XCVR_Default 10 /* I don't think this is correct -> should have been 0x10 if Auto Negotiate */
-
-struct descriptor { /* A generic descriptor. */
- u32 next; /* Last entry points to 0 */
- u32 status; /* FSH -> Frame Start Header */
- u32 addr; /* Up to 63 addr/len pairs possible */
- u32 length; /* Set LAST_FRAG to indicate last pair */
-};
-
-/* Misc. definitions */
-
-#define NUM_RX_DESC PKTBUFSRX * 10
-#define NUM_TX_DESC 1 /* Number of TX descriptors */
-
-#define TOUT_LOOP 1000000
-
-#define ETH_ALEN 6
-
-#define EL3WINDOW(dev, win_num) ETH_OUTW(dev, SelectWindow + (win_num), EL3_CMD)
-#define EL3_CMD 0x0e
-#define EL3_STATUS 0x0e
-
-
-#undef ETH_DEBUG
-
-#ifdef ETH_DEBUG
-#define PRINTF(fmt,args...) printf (fmt ,##args)
-#else
-#define PRINTF(fmt,args...)
-#endif
-
-
-static struct rx_desc_3com *rx_ring; /* RX descriptor ring */
-static struct tx_desc_3com *tx_ring; /* TX descriptor ring */
-static u8 rx_buffer[NUM_RX_DESC][PKTSIZE_ALIGN]; /* storage for the incoming messages */
-static int rx_next = 0; /* RX descriptor ring pointer */
-static int tx_next = 0; /* TX descriptor ring pointer */
-static int tx_threshold;
-
-static void init_rx_ring(struct eth_device* dev);
-static void purge_tx_ring(struct eth_device* dev);
-
-static void read_hw_addr(struct eth_device* dev, bd_t * bis);
-
-static int eth_3com_init(struct eth_device* dev, bd_t *bis);
-static int eth_3com_send(struct eth_device* dev, volatile void *packet, int length);
-static int eth_3com_recv(struct eth_device* dev);
-static void eth_3com_halt(struct eth_device* dev);
-
-#define io_to_phys(a) pci_io_to_phys((pci_dev_t)dev->priv, a)
-#define phys_to_io(a) pci_phys_to_io((pci_dev_t)dev->priv, a)
-#define mem_to_phys(a) pci_mem_to_phys((pci_dev_t)dev->priv, a)
-#define phys_to_mem(a) pci_phys_to_mem((pci_dev_t)dev->priv, a)
-
-static inline int ETH_INL(struct eth_device* dev, u_long addr)
-{
- __asm volatile ("eieio");
- return le32_to_cpu(*(volatile u32 *)io_to_phys(addr + dev->iobase));
-}
-
-static inline int ETH_INW(struct eth_device* dev, u_long addr)
-{
- __asm volatile ("eieio");
- return le16_to_cpu(*(volatile u16 *)io_to_phys(addr + dev->iobase));
-}
-
-static inline int ETH_INB(struct eth_device* dev, u_long addr)
-{
- __asm volatile ("eieio");
- return *(volatile u8 *)io_to_phys(addr + dev->iobase);
-}
-
-static inline void ETH_OUTB(struct eth_device* dev, int command, u_long addr)
-{
- *(volatile u8 *)io_to_phys(addr + dev->iobase) = command;
- __asm volatile ("eieio");
-}
-
-static inline void ETH_OUTW(struct eth_device* dev, int command, u_long addr)
-{
- *(volatile u16 *)io_to_phys(addr + dev->iobase) = cpu_to_le16(command);
- __asm volatile ("eieio");
-}
-
-static inline void ETH_OUTL(struct eth_device* dev, int command, u_long addr)
-{
- *(volatile u32 *)io_to_phys(addr + dev->iobase) = cpu_to_le32(command);
- __asm volatile ("eieio");
-}
-
-static inline int ETH_STATUS(struct eth_device* dev)
-{
- __asm volatile ("eieio");
- return le16_to_cpu(*(volatile u16 *)io_to_phys(EL3_STATUS + dev->iobase));
-}
-
-static inline void ETH_CMD(struct eth_device* dev, int command)
-{
- *(volatile u16 *)io_to_phys(EL3_CMD + dev->iobase) = cpu_to_le16(command);
- __asm volatile ("eieio");
-}
-
-/* Command register is always in the same spot in all the register windows */
-/* This function issues a command and waits for it so complete by checking the CmdInProgress bit */
-
-static int issue_and_wait(struct eth_device* dev, int command)
-{
-
- int i, status;
-
- ETH_CMD(dev, command);
- for (i = 0; i < 2000; i++) {
- status = ETH_STATUS(dev);
- /*printf ("Issue: status 0x%4x.\n", status); */
- if (!(status & CmdInProgress))
- return 1;
- }
-
- /* OK, that didn't work. Do it the slow way. One second */
- for (i = 0; i < 100000; i++) {
- status = ETH_STATUS(dev);
- /*printf ("Issue: status 0x%4x.\n", status); */
- return 1;
- udelay(10);
- }
- PRINTF("Ethernet command: 0x%4x did not complete! Status: 0x%4x\n", command, ETH_STATUS(dev) );
- return 0;
-}
-
-/* Determine network media type and set up 3com accordingly */
-/* I think I'm going to start with something known first like 10baseT */
-
-static int auto_negotiate(struct eth_device* dev)
-{
- int i;
-
- EL3WINDOW(dev, 1);
-
- /* Wait for Auto negotiation to complete */
- for (i = 0; i <= 1000; i++)
- {
- if (ETH_INW(dev, 2) & 0x04)
- break;
- udelay(100);
-
- if (i == 1000)
- {
- PRINTF("Error: Auto negotiation failed\n");
- return 0;
- }
- }
-
-
- return 1;
-}
-
-void eth_interrupt(struct eth_device *dev)
-{
- u16 status = ETH_STATUS(dev);
-
- printf("eth0: status = 0x%04x\n", status);
-
- if (!(status & IntLatch))
- return;
-
- if (status & (1<<6))
- {
- ETH_CMD(dev, AckIntr | (1<<6));
- printf("Acknowledged Interrupt command\n");
- }
-
- if (status & DownComplete)
- {
- ETH_CMD(dev, AckIntr | DownComplete);
- printf("Acknowledged DownComplete\n");
- }
-
- if (status & UpComplete)
- {
- ETH_CMD(dev, AckIntr | UpComplete);
- printf("Acknowledged UpComplete\n");
- }
-
- ETH_CMD(dev, AckIntr | IntLatch);
- printf("Acknowledged IntLatch\n");
-}
-
-int eth_3com_initialize(bd_t *bis)
-{
- u32 eth_iobase = 0, status;
- int card_number = 0, ret;
- struct eth_device* dev;
- pci_dev_t devno;
- char *s;
-
- s = getenv("3com_base");
-
- /* Find ethernet controller on the PCI bus */
-
- if ((devno = pci_find_device(PCI_VENDOR_ID_3COM, PCI_DEVICE_ID_3COM_3C905C, 0)) < 0)
- {
- PRINTF("Error: Cannot find the ethernet device on the PCI bus\n");
- goto Done;
- }
-
- if (s)
- {
- unsigned long base = atoi(s);
- pci_write_config_dword(devno, PCI_BASE_ADDRESS_0, base | 0x01);
- }
-
- ret = pci_read_config_dword(devno, PCI_BASE_ADDRESS_0, &eth_iobase);
- eth_iobase &= ~0xf;
-
- PRINTF("eth: 3Com Found at Address: 0x%x\n", eth_iobase);
-
- pci_write_config_dword(devno, PCI_COMMAND, PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
-
- /* Check if I/O accesses and Bus Mastering are enabled */
-
- ret = pci_read_config_dword(devno, PCI_COMMAND, &status);
-
- if (!(status & PCI_COMMAND_IO))
- {
- printf("Error: Cannot enable IO access.\n");
- goto Done;
- }
-
- if (!(status & PCI_COMMAND_MEMORY))
- {
- printf("Error: Cannot enable MEMORY access.\n");
- goto Done;
- }
-
- if (!(status & PCI_COMMAND_MASTER))
- {
- printf("Error: Cannot enable Bus Mastering.\n");
- goto Done;
- }
-
- dev = (struct eth_device*) malloc(sizeof(*dev)); /*struct eth_device)); */
-
- sprintf(dev->name, "3Com 3c920c#%d", card_number);
- dev->iobase = eth_iobase;
- dev->priv = (void*) devno;
- dev->init = eth_3com_init;
- dev->halt = eth_3com_halt;
- dev->send = eth_3com_send;
- dev->recv = eth_3com_recv;
-
- eth_register(dev);
-
-/* { */
-/* char interrupt; */
-/* devno = pci_find_device(PCI_VENDOR_ID_3COM, PCI_DEVICE_ID_3COM_3C905C, 0); */
-/* pci_read_config_byte(devno, PCI_INTERRUPT_LINE, &interrupt); */
-
-/* printf("Installing eth0 interrupt handler to %d\n", interrupt); */
-/* irq_install_handler(interrupt, eth_interrupt, dev); */
-/* } */
-
- card_number++;
-
- /* Set the latency timer for value */
- s = getenv("3com_latency");
- if (s)
- {
- ret = pci_write_config_byte(devno, PCI_LATENCY_TIMER, (unsigned char)atoi(s));
- }
- else ret = pci_write_config_byte(devno, PCI_LATENCY_TIMER, 0x0a);
-
- read_hw_addr(dev, bis); /* get the MAC address from Window 2*/
-
- /* Reset the ethernet controller */
-
- PRINTF ("Issuing reset command....\n");
- if (!issue_and_wait(dev, TotalReset))
- {
- printf("Error: Cannot reset ethernet controller.\n");
- goto Done;
- }
- else
- PRINTF ("Ethernet controller reset.\n");
-
- /* allocate memory for rx and tx rings */
-
- if(!(rx_ring = memalign(sizeof(struct rx_desc_3com) * NUM_RX_DESC, 16)))
- {
- PRINTF ("Cannot allocate memory for RX_RING.....\n");
- goto Done;
- }
-
- if (!(tx_ring = memalign(sizeof(struct tx_desc_3com) * NUM_TX_DESC, 16)))
- {
- PRINTF ("Cannot allocate memory for TX_RING.....\n");
- goto Done;
- }
-
-Done:
- return status;
-}
-
-
-static int eth_3com_init(struct eth_device* dev, bd_t *bis)
-{
- int i, status = 0;
- int tx_cur, loop;
- u16 status_enable, intr_enable;
- struct descriptor *ias_cmd;
-
- /* Determine what type of network the machine is connected to */
- /* presently drops the connect to 10Mbps */
-
- if (!auto_negotiate(dev))
- {
- printf("Error: Cannot determine network media.\n");
- goto Done;
- }
-
- issue_and_wait(dev, TxReset);
- issue_and_wait(dev, RxReset|0x04);
-
- /* Switch to register set 7 for normal use. */
- EL3WINDOW(dev, 7);
-
- /* Initialize Rx and Tx rings */
-
- init_rx_ring(dev);
- purge_tx_ring(dev);
-
- ETH_CMD(dev, SetRxFilter | RxStation | RxBroadcast | RxProm);
-
- issue_and_wait(dev,SetTxStart|0x07ff);
-
- /* Below sets which indication bits to be seen. */
-
- status_enable = SetStatusEnb | HostError | DownComplete | UpComplete | (1<<6);
- ETH_CMD(dev, status_enable);
-
- /* Below sets no bits are to cause an interrupt since this is just polling */
-
- intr_enable = SetIntrEnb;
-/* intr_enable = SetIntrEnb | (1<<9) | (1<<10) | (1<<6); */
- ETH_CMD(dev, intr_enable);
- ETH_OUTB(dev, 127, UpPoll);
-
- /* Ack all pending events, and set active indicator mask */
-
- ETH_CMD(dev, AckIntr | IntLatch | TxAvailable | RxEarly | IntReq);
- ETH_CMD(dev, intr_enable);
-
- /* Tell the adapter where the RX ring is located */
-
- issue_and_wait(dev,UpStall); /* Stall and set the UplistPtr */
- ETH_OUTL(dev, (u32)&rx_ring[rx_next], UpListPtr);
- ETH_CMD(dev, RxEnable); /* Enable the receiver. */
- issue_and_wait(dev,UpUnstall);
-
- /* Send the Individual Address Setup frame */
-
- tx_cur = tx_next;
- tx_next = ((tx_next+1) % NUM_TX_DESC);
-
- ias_cmd = (struct descriptor *)&tx_ring[tx_cur];
- ias_cmd->status = cpu_to_le32(1<<31); /* set DnIndicate bit. */
- ias_cmd->next = 0;
- ias_cmd->addr = cpu_to_le32((u32)&bis->bi_enetaddr[0]);
- ias_cmd->length = cpu_to_le32(6 | LAST_FRAG);
-
- /* Tell the adapter where the TX ring is located */
-
- ETH_CMD(dev, TxEnable); /* Enable transmitter. */
- issue_and_wait(dev, DownStall); /* Stall and set the DownListPtr. */
- ETH_OUTL(dev, (u32)&tx_ring[tx_cur], DownListPtr);
- issue_and_wait(dev, DownUnstall);
- for (i=0; !(ETH_STATUS(dev) & DownComplete); i++)
- {
- if (i >= TOUT_LOOP)
- {
- PRINTF("TX Ring status (Init): 0x%4x\n", le32_to_cpu(tx_ring[tx_cur].status));
- PRINTF("ETH_STATUS: 0x%x\n", ETH_STATUS(dev));
- goto Done;
- }
- }
- if (ETH_STATUS(dev) & DownComplete) /* If DownLoad Complete ACK the bit */
- {
- ETH_CMD(dev, AckIntr | DownComplete); /* acknowledge the indication bit */
- issue_and_wait(dev, DownStall); /* stall and clear DownListPtr */
- ETH_OUTL(dev, 0, DownListPtr);
- issue_and_wait(dev, DownUnstall);
- }
- status = 1;
-
-Done:
- return status;
-}
-
-int eth_3com_send(struct eth_device* dev, volatile void *packet, int length)
-{
- int i, status = 0;
- int tx_cur;
-
- if (length <= 0)
- {
- PRINTF("eth: bad packet size: %d\n", length);
- goto Done;
- }
-
- tx_cur = tx_next;
- tx_next = (tx_next+1) % NUM_TX_DESC;
-
- tx_ring[tx_cur].status = cpu_to_le32(1<<31); /* set DnIndicate bit */
- tx_ring[tx_cur].next = 0;
- tx_ring[tx_cur].addr = cpu_to_le32(((u32) packet));
- tx_ring[tx_cur].length = cpu_to_le32(length | LAST_FRAG);
-
- /* Send the packet */
-
- issue_and_wait(dev, DownStall); /* stall and set the DownListPtr */
- ETH_OUTL(dev, (u32) &tx_ring[tx_cur], DownListPtr);
- issue_and_wait(dev, DownUnstall);
-
- for (i=0; !(ETH_STATUS(dev) & DownComplete); i++)
- {
- if (i >= TOUT_LOOP)
- {
- PRINTF("TX Ring status (send): 0x%4x\n", le32_to_cpu(tx_ring[tx_cur].status));
- goto Done;
- }
- }
- if (ETH_STATUS(dev) & DownComplete) /* If DownLoad Complete ACK the bit */
- {
- ETH_CMD(dev, AckIntr | DownComplete); /* acknowledge the indication bit */
- issue_and_wait(dev, DownStall); /* stall and clear DownListPtr */
- ETH_OUTL(dev, 0, DownListPtr);
- issue_and_wait(dev, DownUnstall);
- }
- status=1;
- Done:
- return status;
-}
-
-void PrintPacket (uchar *packet, int length)
-{
-int loop;
-uchar *ptr;
-
- printf ("Printing packet of length %x.\n\n", length);
- ptr = packet;
- for (loop = 1; loop <= length; loop++)
- {
- printf ("%2x ", *ptr++);
- if ((loop % 40)== 0)
- printf ("\n");
- }
-}
-
-int eth_3com_recv(struct eth_device* dev)
-{
- u16 stat = 0;
- u32 status;
- int rx_prev, length = 0;
-
- while (!(ETH_STATUS(dev) & UpComplete)) /* wait on receipt of packet */
- ;
-
- status = le32_to_cpu(rx_ring[rx_next].status); /* packet status */
-
- while (status & (1<<15))
- {
- /* A packet has been received */
-
- if (status & (1<<15))
- {
- /* A valid frame received */
-
- length = le32_to_cpu(rx_ring[rx_next].status) & 0x1fff; /* length is in bits 0 - 12 */
-
- /* Pass the packet up to the protocol layers */
-
- NetReceive((uchar *)le32_to_cpu(rx_ring[rx_next].addr), length);
- rx_ring[rx_next].status = 0; /* clear the status word */
- ETH_CMD(dev, AckIntr | UpComplete);
- issue_and_wait(dev, UpUnstall);
- }
- else
- if (stat & HostError)
- {
- /* There was an error */
-
- printf("Rx error status: 0x%4x\n", stat);
- init_rx_ring(dev);
- goto Done;
- }
-
- rx_prev = rx_next;
- rx_next = (rx_next + 1) % NUM_RX_DESC;
- stat = ETH_STATUS(dev); /* register status */
- status = le32_to_cpu(rx_ring[rx_next].status); /* packet status */
- }
-
-Done:
- return length;
-}
-
-void eth_3com_halt(struct eth_device* dev)
-{
- if (!(dev->iobase))
- {
- goto Done;
- }
-
- issue_and_wait(dev, DownStall); /* shut down transmit and receive */
- issue_and_wait(dev, UpStall);
- issue_and_wait(dev, RxDisable);
- issue_and_wait(dev, TxDisable);
-
-/* free(tx_ring); /###* release memory allocated to the DPD and UPD rings */
-/* free(rx_ring); */
-
-Done:
- return;
-}
-
-static void init_rx_ring(struct eth_device* dev)
-{
- int i;
-
- PRINTF("Initializing rx_ring. rx_buffer = %p\n", rx_buffer);
- issue_and_wait(dev, UpStall);
-
- for (i = 0; i < NUM_RX_DESC; i++)
- {
- rx_ring[i].next = cpu_to_le32(((u32) &rx_ring[(i+1) % NUM_RX_DESC]));
- rx_ring[i].status = 0;
- rx_ring[i].addr = cpu_to_le32(((u32) &rx_buffer[i][0]));
- rx_ring[i].length = cpu_to_le32(PKTSIZE_ALIGN | LAST_FRAG);
- }
- rx_next = 0;
-}
-
-static void purge_tx_ring(struct eth_device* dev)
-{
- int i;
-
- PRINTF("Purging tx_ring.\n");
-
- tx_next = 0;
-
- for (i = 0; i < NUM_TX_DESC; i++)
- {
- tx_ring[i].next = 0;
- tx_ring[i].status = 0;
- tx_ring[i].addr = 0;
- tx_ring[i].length = 0;
- }
-}
-
-static void read_hw_addr(struct eth_device* dev, bd_t *bis)
-{
- u8 hw_addr[ETH_ALEN];
- unsigned int eeprom[0x40];
- unsigned int checksum = 0;
- int i, j, timer;
-
- /* Read the station address from the EEPROM. */
-
- EL3WINDOW(dev, 0);
- for (i = 0; i < 0x40; i++)
- {
- ETH_OUTW(dev, EEPROM_Read + i, Wn0EepromCmd);
- /* Pause for at least 162 us. for the read to take place. */
- for (timer = 10; timer >= 0; timer--)
- {
- udelay(162);
- if ((ETH_INW(dev, Wn0EepromCmd) & 0x8000) == 0)
- break;
- }
- eeprom[i] = ETH_INW(dev, Wn0EepromData);
- }
-
- /* Checksum calculation. I'm not sure about this part and there seems to be a bug on the 3com side of things */
-
- for (i = 0; i < 0x21; i++)
- checksum ^= eeprom[i];
- checksum = (checksum ^ (checksum >> 8)) & 0xff;
-
- if (checksum != 0xbb)
- printf(" *** INVALID EEPROM CHECKSUM %4.4x *** \n", checksum);
-
- for (i = 0, j = 0; i < 3; i++)
- {
- hw_addr[j++] = (u8)((eeprom[i+10] >> 8) & 0xff);
- hw_addr[j++] = (u8)(eeprom[i+10] & 0xff);
- }
-
- /* MAC Address is in window 2, write value from EEPROM to window 2 */
-
- EL3WINDOW(dev, 2);
- for (i = 0; i < 6; i++)
- ETH_OUTB(dev, hw_addr[i], i);
-
- for (j = 0; j < ETH_ALEN; j+=2)
- {
- hw_addr[j] = (u8)(ETH_INW(dev, j) & 0xff);
- hw_addr[j+1] = (u8)((ETH_INW(dev, j) >> 8) & 0xff);
- }
-
- for (i=0;i<ETH_ALEN;i++)
- {
- if (hw_addr[i] != bis->bi_enetaddr[i])
- {
-/* printf("Warning: HW address don't match:\n"); */
-/* printf("Address in 3Com Window 2 is " */
-/* "%02X:%02X:%02X:%02X:%02X:%02X\n", */
-/* hw_addr[0], hw_addr[1], hw_addr[2], */
-/* hw_addr[3], hw_addr[4], hw_addr[5]); */
-/* printf("Address used by U-Boot is " */
-/* "%02X:%02X:%02X:%02X:%02X:%02X\n", */
-/* bis->bi_enetaddr[0], bis->bi_enetaddr[1], */
-/* bis->bi_enetaddr[2], bis->bi_enetaddr[3], */
-/* bis->bi_enetaddr[4], bis->bi_enetaddr[5]); */
-/* goto Done; */
- char buffer[256];
- if (bis->bi_enetaddr[0] == 0 && bis->bi_enetaddr[1] == 0 &&
- bis->bi_enetaddr[2] == 0 && bis->bi_enetaddr[3] == 0 &&
- bis->bi_enetaddr[4] == 0 && bis->bi_enetaddr[5] == 0)
- {
-
- sprintf(buffer, "%02X:%02X:%02X:%02X:%02X:%02X",
- hw_addr[0], hw_addr[1], hw_addr[2],
- hw_addr[3], hw_addr[4], hw_addr[5]);
- setenv("ethaddr", buffer);
- }
- }
- }
-
- for(i=0; i<ETH_ALEN; i++) dev->enetaddr[i] = hw_addr[i];
-
-Done:
- return;
-}
diff --git a/board/MAI/AmigaOneG3SE/flash.c b/board/MAI/AmigaOneG3SE/flash.c
deleted file mode 100644
index 409b955fd5..0000000000
--- a/board/MAI/AmigaOneG3SE/flash.c
+++ /dev/null
@@ -1,35 +0,0 @@
-#include <common.h>
-#include <flash.h>
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
-
-
-unsigned long flash_init(void)
-{
- int i;
-
- for (i = 0; i < CFG_MAX_FLASH_BANKS; i++)
- {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- flash_info[i].sector_count = 0;
- flash_info[i].size = 0;
- }
-
-
- return 1;
-}
-
-int flash_erase(flash_info_t *info, int s_first, int s_last)
-{
- return 1;
-}
-
-void flash_print_info(flash_info_t *info)
-{
- printf("No flashrom installed\n");
-}
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- return 0;
-}
diff --git a/board/MAI/AmigaOneG3SE/flash_new.c b/board/MAI/AmigaOneG3SE/flash_new.c
deleted file mode 100644
index d46bf46465..0000000000
--- a/board/MAI/AmigaOneG3SE/flash_new.c
+++ /dev/null
@@ -1,651 +0,0 @@
-/*
- * (C) Copyright 2001
- * Josh Huber <huber@mclx.com>, Mission Critical Linux, Inc.
- *
- * (C) Copyright 2002
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <flash.h>
-#include <asm/io.h>
-#include "memio.h"
-
-/*---------------------------------------------------------------------*/
-#undef DEBUG_FLASH
-
-#ifdef DEBUG_FLASH
-#define DEBUGF(fmt,args...) printf(fmt ,##args)
-#else
-#define DEBUGF(fmt,args...)
-#endif
-/*---------------------------------------------------------------------*/
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
-
-static ulong flash_get_size (ulong addr, flash_info_t *info);
-static int flash_get_offsets (ulong base, flash_info_t *info);
-static int write_word (flash_info_t *info, ulong dest, ulong data);
-static void flash_reset (ulong addr);
-
-int flash_xd_nest;
-
-static void flash_to_xd(void)
-{
- unsigned char x;
-
- flash_xd_nest ++;
-
- if (flash_xd_nest == 1)
- {
- DEBUGF("Flash on XD\n");
- x = pci_read_cfg_byte(0, 0, 0x74);
- pci_write_cfg_byte(0, 0, 0x74, x|1);
- }
-}
-
-static void flash_to_mem(void)
-{
- unsigned char x;
-
- flash_xd_nest --;
-
- if (flash_xd_nest == 0)
- {
- DEBUGF("Flash on memory bus\n");
- x = pci_read_cfg_byte(0, 0, 0x74);
- pci_write_cfg_byte(0, 0, 0x74, x&0xFE);
- }
-}
-
-unsigned long flash_init_old(void)
-{
- int i;
-
- for (i = 0; i < CFG_MAX_FLASH_BANKS; i++)
- {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- flash_info[i].sector_count = 0;
- flash_info[i].size = 0;
- }
-
-
- return 1;
-}
-
-unsigned long flash_init (void)
-{
- unsigned int i;
- unsigned long flash_size = 0;
-
- flash_xd_nest = 0;
-
- flash_to_xd();
-
- /* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- flash_info[i].sector_count = 0;
- flash_info[i].size = 0;
- }
-
- DEBUGF("\n## Get flash size @ 0x%08x\n", CFG_FLASH_BASE);
-
- flash_size = flash_get_size (CFG_FLASH_BASE, flash_info);
-
- DEBUGF("## Flash bank size: %08lx\n", flash_size);
-
- if (flash_size) {
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE && \
- CFG_MONITOR_BASE < CFG_FLASH_BASE + CFG_FLASH_MAX_SIZE
- /* monitor protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE + monitor_flash_len - 1,
- &flash_info[0]);
-#endif
-
-#ifdef CFG_ENV_IS_IN_FLASH
- /* ENV protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1,
- &flash_info[0]);
-#endif
-
- } else {
- puts ("Warning: the BOOT Flash is not initialised !");
- }
-
- flash_to_mem();
-
- return flash_size;
-}
-
-/*
- * The following code cannot be run from FLASH!
- */
-static ulong flash_get_size (ulong addr, flash_info_t *info)
-{
- short i;
- uchar value;
- uchar *x = (uchar *)addr;
-
- flash_to_xd();
-
- /* Write auto select command: read Manufacturer ID */
- x[0x0555] = 0xAA;
- __asm volatile ("sync\n eieio");
- x[0x02AA] = 0x55;
- __asm volatile ("sync\n eieio");
- x[0x0555] = 0x90;
- __asm volatile ("sync\n eieio");
-
- value = x[0];
- __asm volatile ("sync\n eieio");
-
- DEBUGF("Manuf. ID @ 0x%08lx: 0x%08x\n", (ulong)addr, value);
-
- switch (value | (value << 16)) {
- case AMD_MANUFACT:
- info->flash_id = FLASH_MAN_AMD;
- break;
-
- case FUJ_MANUFACT:
- info->flash_id = FLASH_MAN_FUJ;
- break;
-
- case STM_MANUFACT:
- info->flash_id = FLASH_MAN_STM;
- break;
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- flash_reset (addr);
- return 0;
- }
-
- value = x[1];
- __asm volatile ("sync\n eieio");
-
- DEBUGF("Device ID @ 0x%08lx: 0x%08x\n", addr+1, value);
-
- switch (value) {
- case AMD_ID_F040B:
- DEBUGF("Am29F040B\n");
- info->flash_id += FLASH_AM040;
- info->sector_count = 8;
- info->size = 0x00080000;
- break; /* => 512 kB */
-
- case AMD_ID_LV040B:
- DEBUGF("Am29LV040B\n");
- info->flash_id += FLASH_AM040;
- info->sector_count = 8;
- info->size = 0x00080000;
- break; /* => 512 kB */
-
- case AMD_ID_LV400T:
- DEBUGF("Am29LV400T\n");
- info->flash_id += FLASH_AM400T;
- info->sector_count = 11;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case AMD_ID_LV400B:
- DEBUGF("Am29LV400B\n");
- info->flash_id += FLASH_AM400B;
- info->sector_count = 11;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case AMD_ID_LV800T:
- DEBUGF("Am29LV800T\n");
- info->flash_id += FLASH_AM800T;
- info->sector_count = 19;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case AMD_ID_LV800B:
- DEBUGF("Am29LV400B\n");
- info->flash_id += FLASH_AM800B;
- info->sector_count = 19;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case AMD_ID_LV160T:
- DEBUGF("Am29LV160T\n");
- info->flash_id += FLASH_AM160T;
- info->sector_count = 35;
- info->size = 0x00400000;
- break; /* => 4 MB */
-
- case AMD_ID_LV160B:
- DEBUGF("Am29LV160B\n");
- info->flash_id += FLASH_AM160B;
- info->sector_count = 35;
- info->size = 0x00400000;
- break; /* => 4 MB */
-
- case AMD_ID_LV320T:
- DEBUGF("Am29LV320T\n");
- info->flash_id += FLASH_AM320T;
- info->sector_count = 67;
- info->size = 0x00800000;
- break; /* => 8 MB */
-
-#if 0
- /* Has the same ID as AMD_ID_LV320T, to be fixed */
- case AMD_ID_LV320B:
- DEBUGF("Am29LV320B\n");
- info->flash_id += FLASH_AM320B;
- info->sector_count = 67;
- info->size = 0x00800000;
- break; /* => 8 MB */
-#endif
-
- case AMD_ID_LV033C:
- DEBUGF("Am29LV033C\n");
- info->flash_id += FLASH_AM033C;
- info->sector_count = 64;
- info->size = 0x01000000;
- break; /* => 16Mb */
-
- case STM_ID_F040B:
- DEBUGF("M29F040B\n");
- info->flash_id += FLASH_AM040;
- info->sector_count = 8;
- info->size = 0x00080000;
- break; /* => 512 kB */
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- flash_reset (addr);
- flash_to_mem();
- return (0); /* => no or unknown flash */
-
- }
-
- if (info->sector_count > CFG_MAX_FLASH_SECT) {
- printf ("** ERROR: sector count %d > max (%d) **\n",
- info->sector_count, CFG_MAX_FLASH_SECT);
- info->sector_count = CFG_MAX_FLASH_SECT;
- }
-
- if (! flash_get_offsets (addr, info)) {
- flash_reset (addr);
- flash_to_mem();
- return 0;
- }
-
- /* check for protected sectors */
- for (i = 0; i < info->sector_count; i++) {
- /* read sector protection at sector address, (A7 .. A0) = 0x02 */
- /* D0 = 1 if protected */
- value = in8(info->start[i] + 2);
- iobarrier_rw();
- info->protect[i] = (value & 1) != 0;
- }
-
- /*
- * Reset bank to read mode
- */
- flash_reset (addr);
-
- flash_to_mem();
-
- return (info->size);
-}
-
-static int flash_get_offsets (ulong base, flash_info_t *info)
-{
- unsigned int i;
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM040:
- /* set sector offsets for uniform sector type */
- for (i = 0; i < info->sector_count; i++) {
- info->start[i] = base + i * info->size /
- info->sector_count;
- }
- break;
- default:
- return 0;
- }
-
- return 1;
-}
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- volatile ulong addr = info->start[0];
- int flag, prot, sect, l_sect;
- ulong start, now, last;
-
- flash_to_xd();
-
- if (s_first < 0 || s_first > s_last) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- flash_to_mem();
- return 1;
- }
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- flash_to_mem();
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- l_sect = -1;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- out8(addr + 0x555, 0xAA);
- iobarrier_rw();
- out8(addr + 0x2AA, 0x55);
- iobarrier_rw();
- out8(addr + 0x555, 0x80);
- iobarrier_rw();
- out8(addr + 0x555, 0xAA);
- iobarrier_rw();
- out8(addr + 0x2AA, 0x55);
- iobarrier_rw();
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr = info->start[sect];
- out8(addr, 0x30);
- iobarrier_rw();
- l_sect = sect;
- }
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- /*
- * We wait for the last triggered sector
- */
- if (l_sect < 0)
- goto DONE;
-
- start = get_timer (0);
- last = start;
- addr = info->start[l_sect];
-
- DEBUGF ("Start erase timeout: %d\n", CFG_FLASH_ERASE_TOUT);
-
- while ((in8(addr) & 0x80) != 0x80) {
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- flash_reset (info->start[0]);
- flash_to_mem();
- return 1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- iobarrier_rw();
- }
-
-DONE:
- /* reset to read mode */
- flash_reset (info->start[0]);
- flash_to_mem();
-
- printf (" done\n");
- return 0;
-}
-
-/*
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int i, l, rc;
-
- flash_to_xd();
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
- for (; i<4 && cnt>0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- if ((rc = write_word(info, wp, data)) != 0) {
- flash_to_mem();
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = 0;
- for (i=0; i<4; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_word(info, wp, data)) != 0) {
- flash_to_mem();
- return (rc);
- }
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- flash_to_mem();
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
-
- flash_to_mem();
- return (write_word(info, wp, data));
-}
-
-/*
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word (flash_info_t *info, ulong dest, ulong data)
-{
- volatile ulong addr = info->start[0];
- ulong start;
- int i;
-
- flash_to_xd();
-
- /* Check if Flash is (sufficiently) erased */
- if ((in32(dest) & data) != data) {
- flash_to_mem();
- return (2);
- }
-
- /* write each byte out */
- for (i = 0; i < 4; i++) {
- char *data_ch = (char *)&data;
- int flag = disable_interrupts();
-
- out8(addr + 0x555, 0xAA);
- iobarrier_rw();
- out8(addr + 0x2AA, 0x55);
- iobarrier_rw();
- out8(addr + 0x555, 0xA0);
- iobarrier_rw();
- out8(dest+i, data_ch[i]);
- iobarrier_rw();
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* data polling for D7 */
- start = get_timer (0);
- while ((in8(dest+i) & 0x80) != (data_ch[i] & 0x80)) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- flash_reset (addr);
- flash_to_mem();
- return (1);
- }
- iobarrier_rw();
- }
- }
-
- flash_reset (addr);
- flash_to_mem();
- return (0);
-}
-
-/*
- * Reset bank to read mode
- */
-static void flash_reset (ulong addr)
-{
- flash_to_xd();
- out8(addr, 0xF0); /* reset bank */
- iobarrier_rw();
- flash_to_mem();
-}
-
-void flash_print_info (flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD: printf ("AMD "); break;
- case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
- case FLASH_MAN_BM: printf ("BRIGHT MICRO "); break;
- case FLASH_MAN_STM: printf ("SGS THOMSON "); break;
- default: printf ("Unknown Vendor "); break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM040: printf ("29F040 or 29LV040 (4 Mbit, uniform sectors)\n");
- break;
- case FLASH_AM400B: printf ("AM29LV400B (4 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM400T: printf ("AM29LV400T (4 Mbit, top boot sector)\n");
- break;
- case FLASH_AM800B: printf ("AM29LV800B (8 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM800T: printf ("AM29LV800T (8 Mbit, top boot sector)\n");
- break;
- case FLASH_AM160B: printf ("AM29LV160B (16 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM160T: printf ("AM29LV160T (16 Mbit, top boot sector)\n");
- break;
- case FLASH_AM320B: printf ("AM29LV320B (32 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM320T: printf ("AM29LV320T (32 Mbit, top boot sector)\n");
- break;
- default: printf ("Unknown Chip Type\n");
- break;
- }
-
- if (info->size % 0x100000 == 0) {
- printf (" Size: %ld MB in %d Sectors\n",
- info->size / 0x100000, info->sector_count);
- } else if (info->size % 0x400 == 0) {
- printf (" Size: %ld KB in %d Sectors\n",
- info->size / 0x400, info->sector_count);
- } else {
- printf (" Size: %ld B in %d Sectors\n",
- info->size, info->sector_count);
- }
-
- printf (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " "
- );
- }
- printf ("\n");
-}
diff --git a/board/MAI/AmigaOneG3SE/i8259.c b/board/MAI/AmigaOneG3SE/i8259.c
deleted file mode 100644
index 34f489f7c5..0000000000
--- a/board/MAI/AmigaOneG3SE/i8259.c
+++ /dev/null
@@ -1,230 +0,0 @@
-/*
- * (C) Copyright 2002
- * John W. Linville, linville@tuxdriver.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include "i8259.h"
-
-#undef IRQ_DEBUG
-
-#ifdef IRQ_DEBUG
-#define PRINTF(fmt,args...) printf (fmt ,##args)
-#else
-#define PRINTF(fmt,args...)
-#endif
-
-static inline unsigned char read_byte(volatile unsigned char* from)
-{
- int x;
- asm volatile ("lbz %0,%1\n eieio" : "=r" (x) : "m" (*from));
- return (unsigned char)x;
-}
-
-static inline void write_byte(volatile unsigned char *to, int x)
-{
- asm volatile ("stb %1,%0\n eieio" : "=m" (*to) : "r" (x));
-}
-
-static inline unsigned long read_long_little(volatile unsigned long *from)
-{
- unsigned long x;
- asm volatile ("lwbrx %0,0,%1\n eieio\n sync" : "=r" (x) : "r" (from), "m"(*from));
- return (unsigned long)x;
-}
-
-#ifdef out8
-#undef out8
-#endif
-
-#ifdef in8
-#undef in8
-#endif
-
-#define out8(addr, byte) write_byte(0xFE000000 | addr, byte)
-#define in8(addr) read_byte(0xFE000000 | addr)
-
-/*
- * This contains the irq mask for both 8259A irq controllers,
- */
-static char cached_imr[2] = {0xff, 0xff};
-
-#define cached_imr1 (cached_imr[0])
-#define cached_imr2 (cached_imr[1])
-
-void i8259_init(void)
-{
- char dummy;
- PRINTF("Initializing Interrupt controller\n");
- /* init master interrupt controller */
- out8(0x20, 0x11); /* 0x19); /###* Start init sequence */
- out8(0x21, 0x00); /* Vector base */
- out8(0x21, 0x04); /* edge tiggered, Cascade (slave) on IRQ2 */
- out8(0x21, 0x11); /* was: 0x01); /###* Select 8086 mode */
-
- /* init slave interrupt controller */
- out8(0xA0, 0x11); /* 0x19); /###* Start init sequence */
- out8(0xA1, 0x08); /* Vector base */
- out8(0xA1, 0x02); /* edge triggered, Cascade (slave) on IRQ2 */
- out8(0xA1, 0x11); /* was: 0x01); /###* Select 8086 mode */
-
- /* always read ISR */
- out8(0x20, 0x0B);
- dummy = in8(ISR_1);
- out8(0xA0, 0x0B);
- dummy = in8(ISR_2);
-
-/* out8(0x43, 0x30); */
-/* out8(0x40, 0); */
-/* out8(0x40, 0); */
-/* out8(0x43, 0x70); */
-/* out8(0x41, 0); */
-/* out8(0x41, 0); */
-/* out8(0x43, 0xb0); */
-/* out8(0x42, 0); */
-/* out8(0x42, 0); */
-
- /* Mask all interrupts */
- out8(IMR_2, cached_imr2);
- out8(IMR_1, cached_imr1);
-
- i8259_unmask_irq(2);
-#if 0
- {
- int i;
- for (i=0; i<16; i++)
- {
- i8259_unmask_irq(i);
- }
- }
-#endif
-}
-
-static volatile char *pci_intack = (void *)0xFEF00000;
-
-int i8259_irq(void)
-{
- int irq;
-
- irq = read_long_little(pci_intack) & 0xff;
- if (irq==7) {
- /*
- * This may be a spurious interrupt.
- *
- * Read the interrupt status register (ISR). If the most
- * significant bit is not set then there is no valid
- * interrupt.
- */
- if(~in8(0x20)&0x80) {
- irq = -1;
- }
- }
-
- return irq;
-}
-int i8259_get_irq(struct pt_regs *regs)
-{
- unsigned char irq;
-
- /*
- * Perform an interrupt acknowledge cycle on controller 1
- */
- out8(OCW3_1, 0x0C); /* prepare for poll */
- irq = in8(IPL_1) & 7;
- if (irq == 2) {
- /*
- * Interrupt is cascaded so perform interrupt
- * acknowledge on controller 2
- */
- out8(OCW3_2, 0x0C); /* prepare for poll */
- irq = (in8(IPL_2) & 7) + 8;
- if (irq == 15) {
- /*
- * This may be a spurious interrupt
- *
- * Read the interrupt status register. If the most
- * significant bit is not set then there is no valid
- * interrupt
- */
- out8(OCW3_2, 0x0b);
- if (~(in8(ISR_2) & 0x80)) {
- return -1;
- }
- }
- } else if (irq == 7) {
- /*
- * This may be a spurious interrupt
- *
- * Read the interrupt status register. If the most
- * significant bit is not set then there is no valid
- * interrupt
- */
- out8(OCW3_1, 0x0b);
- if (~(in8(ISR_1) & 0x80)) {
- return -1;
- }
- }
- return irq;
-}
-
-/*
- * Careful! The 8259A is a fragile beast, it pretty
- * much _has_ to be done exactly like this (mask it
- * first, _then_ send the EOI, and the order of EOI
- * to the two 8259s is important!
- */
-void i8259_mask_and_ack(int irq)
-{
- if (irq > 7) {
- cached_imr2 |= (1 << (irq - 8));
- in8(IMR_2); /* DUMMY */
- out8(IMR_2, cached_imr2);
- out8(OCW2_2, 0x20); /* Non-specific EOI */
- out8(OCW2_1, 0x20); /* Non-specific EOI to cascade */
- } else {
- cached_imr1 |= (1 << irq);
- in8(IMR_1); /* DUMMY */
- out8(IMR_1, cached_imr1);
- out8(OCW2_1, 0x20); /* Non-specific EOI */
- }
-}
-
-void i8259_mask_irq(int irq)
-{
- if (irq & 8) {
- cached_imr2 |= (1 << (irq & 7));
- out8(IMR_2, cached_imr2);
- } else {
- cached_imr1 |= (1 << irq);
- out8(IMR_1, cached_imr1);
- }
-}
-
-void i8259_unmask_irq(int irq)
-{
- if (irq & 8) {
- cached_imr2 &= ~(1 << (irq & 7));
- out8(IMR_2, cached_imr2);
- } else {
- cached_imr1 &= ~(1 << irq);
- out8(IMR_1, cached_imr1);
- }
-}
diff --git a/board/MAI/AmigaOneG3SE/i8259.h b/board/MAI/AmigaOneG3SE/i8259.h
deleted file mode 100644
index 05c40522d1..0000000000
--- a/board/MAI/AmigaOneG3SE/i8259.h
+++ /dev/null
@@ -1,56 +0,0 @@
-/*
- * (C) Copyright 2002
- * John W. Linville, linville@tuxdriver.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#define ICW1_1 CFG_ISA_IO_BASE_ADDRESS + ISA_INT1_ICW1
-#define ICW1_2 CFG_ISA_IO_BASE_ADDRESS + ISA_INT2_ICW1
-#define ICW2_1 CFG_ISA_IO_BASE_ADDRESS + ISA_INT1_ICW2
-#define ICW2_2 CFG_ISA_IO_BASE_ADDRESS + ISA_INT2_ICW2
-#define ICW3_1 CFG_ISA_IO_BASE_ADDRESS + ISA_INT1_ICW3
-#define ICW3_2 CFG_ISA_IO_BASE_ADDRESS + ISA_INT2_ICW3
-#define ICW4_1 CFG_ISA_IO_BASE_ADDRESS + ISA_INT1_ICW4
-#define ICW4_2 CFG_ISA_IO_BASE_ADDRESS + ISA_INT2_ICW4
-#define OCW1_1 CFG_ISA_IO_BASE_ADDRESS + ISA_INT1_OCW1
-#define OCW1_2 CFG_ISA_IO_BASE_ADDRESS + ISA_INT2_OCW1
-#define OCW2_1 CFG_ISA_IO_BASE_ADDRESS + ISA_INT1_OCW2
-#define OCW2_2 CFG_ISA_IO_BASE_ADDRESS + ISA_INT2_OCW2
-#define OCW3_1 CFG_ISA_IO_BASE_ADDRESS + ISA_INT1_OCW3
-#define OCW3_2 CFG_ISA_IO_BASE_ADDRESS + ISA_INT2_OCW3
-
-#define IMR_1 OCW1_1
-#define IMR_2 OCW1_2
-
-#define ISR_1 ICW1_1
-#define ISR_2 ICW1_2
-
-#define IPL_1 ICW1_1
-#define IPL_2 ICW1_2
-
-extern void i8259_init(void);
-
-extern int i8259_get_irq(struct pt_regs *regs);
-
-extern void i8259_mask_and_ack(int irq);
-
-extern void i8259_mask_irq(int irq);
-
-extern void i8259_unmask_irq(int irq);
diff --git a/board/MAI/AmigaOneG3SE/interrupts.c b/board/MAI/AmigaOneG3SE/interrupts.c
deleted file mode 100644
index 5b314a8b71..0000000000
--- a/board/MAI/AmigaOneG3SE/interrupts.c
+++ /dev/null
@@ -1,266 +0,0 @@
-/*
- * (C) Copyright 2002
- * John W. Linville <linville@tuxdriver.com>
- *
- * Copied and modified from original code by Josh Huber. Original
- * copyright notice preserved below.
- *
- * (C) Copyright 2001
- * Josh Huber <huber@mclx.com>, Mission Critical Linux, Inc.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * interrupts.c - just enough support for the decrementer/timer
- */
-
-#include <common.h>
-#include <asm/processor.h>
-#include <command.h>
-#include "i8259.h"
-
-#undef DEBUG
-#ifdef DEBUG
-#define PRINTF(fmt,args...) printf (fmt ,##args)
-#else
-#define PRINTF(fmt,args...)
-#endif
-#define NR_IRQS 16
-
-void irq_alloc_init(void);
-long irq_alloc(long wanted);
-
-/****************************************************************************/
-
-unsigned decrementer_count; /* count value for 1e6/HZ microseconds */
-
-struct irq_action {
- interrupt_handler_t *handler;
- void *arg;
- ulong count;
-};
-
-static struct irq_action irq_handlers[NR_IRQS];
-
-/****************************************************************************/
-
-static __inline__ unsigned long
-get_msr(void)
-{
- unsigned long msr;
-
- asm volatile("mfmsr %0" : "=r" (msr) :);
- return msr;
-}
-
-static __inline__ void
-set_msr(unsigned long msr)
-{
- asm volatile("mtmsr %0" : : "r" (msr));
-}
-
-static __inline__ unsigned long
-get_dec(void)
-{
- unsigned long val;
-
- asm volatile("mfdec %0" : "=r" (val) :);
- return val;
-}
-
-
-static __inline__ void
-set_dec(unsigned long val)
-{
- asm volatile("mtdec %0" : : "r" (val));
-}
-
-
-void
-enable_interrupts(void)
-{
- set_msr (get_msr() | MSR_EE);
-}
-
-/* returns flag if MSR_EE was set before */
-int
-disable_interrupts(void)
-{
- ulong msr;
-
- msr = get_msr();
- set_msr (msr & ~MSR_EE);
- return ((msr & MSR_EE) != 0);
-}
-
-/****************************************************************************/
-
-int interrupt_init (void)
-{
- extern void new_reset(void);
- extern void new_reset_end(void);
-#ifdef DEBUG
- puts("interrupt_init: setting decrementer_count\n");
-#endif
- decrementer_count = get_tbclk() / CFG_HZ;
-
-#ifdef DEBUG
- puts("interrupt_init: setting actual decremter\n");
-#endif
- set_dec (get_tbclk() / CFG_HZ);
-
-#ifdef DEBUG
- puts("interrupt_init: clearing external interrupt table\n");
-#endif
- /* clear external interrupt table here */
- memset(irq_handlers, 0, sizeof(irq_handlers));
-
-#ifdef DEBUG
- puts("interrupt_init: initializing interrupt controller\n");
-#endif
- i8259_init();
-
-#ifdef DEBUG
- puts("Copying reset trampoline\n");
-#endif
- /* WARNING: Assmues that the first megabyte is CACHEINHIBIT! */
- memcpy((void *)0x100, new_reset, new_reset_end - new_reset);
-
-#ifdef DEBUG
- PRINTF("interrupt_init: enabling interrupts (msr = %08x)\n",
- get_msr());
-#endif
- set_msr (get_msr() | MSR_EE);
-
-#ifdef DEBUG
- PRINTF("interrupt_init: done. (msr = %08x)\n", get_msr());
-#endif
-
-}
-
-/****************************************************************************/
-
-/*
- * Handle external interrupts
- */
-void
-external_interrupt(struct pt_regs *regs)
-{
- extern int i8259_irq(void);
-
- int irq, unmask = 1;
-
- irq = i8259_irq(); /*i8259_get_irq(regs); */
-/* printf("irq = %d, handler at %p ack=%d\n", irq, irq_handlers[irq].handler, *(volatile unsigned char *)0xFEF00000); */
- i8259_mask_and_ack(irq);
-
- if (irq_handlers[irq].handler != NULL)
- (*irq_handlers[irq].handler)(irq_handlers[irq].arg);
- else {
- PRINTF ("\nBogus External Interrupt IRQ %d\n", irq);
- /*
- * turn off the bogus interrupt, otherwise it
- * might repeat forever
- */
- unmask = 0;
- }
-
- if (unmask) i8259_unmask_irq(irq);
-}
-
-volatile ulong timestamp = 0;
-
-/*
- * timer_interrupt - gets called when the decrementer overflows,
- * with interrupts disabled.
- * Trivial implementation - no need to be really accurate.
- */
-void
-timer_interrupt(struct pt_regs *regs)
-{
- set_dec(decrementer_count);
- timestamp++;
-}
-
-/****************************************************************************/
-
-void
-reset_timer(void)
-{
- timestamp = 0;
-}
-
-ulong
-get_timer(ulong base)
-{
- return (timestamp - base);
-}
-
-void
-set_timer(ulong t)
-{
- timestamp = t;
-}
-
-/****************************************************************************/
-
-/*
- * Install and free a interrupt handler.
- */
-
-void
-irq_install_handler(int irq, interrupt_handler_t *handler, void *arg)
-{
- if (irq < 0 || irq >= NR_IRQS) {
- PRINTF("irq_install_handler: bad irq number %d\n", irq);
- return;
- }
-
- if (irq_handlers[irq].handler != NULL)
- PRINTF("irq_install_handler: 0x%08lx replacing 0x%08lx\n",
- (ulong)handler, (ulong)irq_handlers[irq].handler);
-
- irq_handlers[irq].handler = handler;
- irq_handlers[irq].arg = arg;
-
- i8259_unmask_irq(irq);
-}
-
-void
-irq_free_handler(int irq)
-{
- if (irq < 0 || irq >= NR_IRQS) {
- PRINTF("irq_free_handler: bad irq number %d\n", irq);
- return;
- }
-
- i8259_mask_irq(irq);
-
- irq_handlers[irq].handler = NULL;
- irq_handlers[irq].arg = NULL;
-}
-
-/****************************************************************************/
-
-void
-do_irqinfo(cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
-{
- puts("IRQ related functions are unimplemented currently.\n");
-}
diff --git a/board/MAI/AmigaOneG3SE/macros.h b/board/MAI/AmigaOneG3SE/macros.h
deleted file mode 100644
index 6020d7e1cb..0000000000
--- a/board/MAI/AmigaOneG3SE/macros.h
+++ /dev/null
@@ -1,84 +0,0 @@
-
-#ifndef _MACROS_H
-#define _MACROS_H
-
- /*
- ** Load a long integer into a register
- */
- .macro liw reg, value
- lis \reg, \value@h
- ori \reg, \reg, \value@l
- .endm
-
-
- /*
- ** Generate config_addr request
- ** This macro expects the values in registers:
- ** r3 - bus
- ** r4 - devfn
- ** r5 - offset
- */
- .macro config_addr
- rlwinm r9, r5, 24, 0, 6
- rlwinm r8, r4, 16, 0, 31
- rlwinm r7, r3, 8, 0, 31
- or r9, r8, r9
- or r9, r7, r9
- ori r9, r9, 0x80
- liw r10, 0xfec00cf8
- stw r9, 0(r10)
- eieio
- sync
- .endm
-
-
- /*
- ** Generate config_data address
- */
- .macro config_data mask
- andi. r9, r5, \mask
- addi r9, r9, 0xcfc
- oris r9, r9, 0xfee0
- .endm
-
-
- /*
- ** Write a byte value to an output port
- */
- .macro outb port, value
- lis r2, 0xfe00
- li r0, \value
- stb r0, \port(r2)
- .endm
-
-
- /*
- ** Write a register byte value to an output port
- */
- .macro outbr port, value
- lis r2, 0xfe00
- stb \value, \port(r2)
- .endm
-
-
- /*
- ** Read a byte value from a port into a specified register
- */
- .macro inb reg, port
- lis r2, 0xfe00
- lbz \reg, \port(r2)
- .endm
-
-
- /*
- ** Write a byte to the SuperIO config area
- */
- .macro siowb offset, value
- li r3, 0
- li r4, (7<<3)
- li r5, \offset
- li r6, \value
- bl pci_write_cfg_byte
- .endm
-
-#endif
diff --git a/board/MAI/AmigaOneG3SE/memio.S b/board/MAI/AmigaOneG3SE/memio.S
deleted file mode 100644
index 980d343556..0000000000
--- a/board/MAI/AmigaOneG3SE/memio.S
+++ /dev/null
@@ -1,67 +0,0 @@
-#include "macros.h"
-
-
- .globl pci_read_cfg_byte
-
-pci_read_cfg_byte:
- config_addr
- config_data 3
- eieio
- sync
- lbz r3, 0(r9)
- blr
-
-
- .globl pci_write_cfg_byte
-
-pci_write_cfg_byte:
- config_addr
- config_data 3
- stb r6, 0(r9)
- eieio
- sync
- blr
-
-
- .globl pci_read_cfg_word
-
-pci_read_cfg_word:
- config_addr
- config_data 2
- lhbrx r3, 0, r9
- eieio
- sync
- blr
-
-
- .globl pci_write_cfg_word
-
-pci_write_cfg_word:
- config_addr
- config_data 2
- sthbrx r6, 0, r9
- eieio
- sync
- blr
-
-
- .globl pci_read_cfg_long
-
-pci_read_cfg_long:
- config_addr
- config_data 0
- lwbrx r3, 0, r9
- eieio
- sync
- blr
-
-
- .globl pci_write_cfg_long
-
-pci_write_cfg_long:
- config_addr
- config_data 0
- stwbrx r6, 0, r9
- eieio
- sync
- blr
diff --git a/board/MAI/AmigaOneG3SE/memio.h b/board/MAI/AmigaOneG3SE/memio.h
deleted file mode 100644
index f5ce303070..0000000000
--- a/board/MAI/AmigaOneG3SE/memio.h
+++ /dev/null
@@ -1,113 +0,0 @@
-/*
- * Memory mapped IO
- *
- * (C) Copyright 2002
- * Hyperion Entertainment, ThomasF@hyperion-entertainment.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- * You may also use this under a BSD license.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
- *
- */
-
-#ifndef _MEMIO_H
-#define _MEMIO_H
-
-#include "short_types.h"
-
-#define IOBASE 0xFE000000
-
-#define in_byte(from) read_byte( (uint8 *)(IOBASE | (from)))
-#define in_word(from) read_word_little((uint16 *)(IOBASE | (from)))
-#define in_long(from) read_long_little((uint32 *)(IOBASE | (from)))
-#define out_byte(to, val) write_byte((uint8 *)(IOBASE | (to)), val)
-#define out_word(to, val) write_word_little((uint16 *)(IOBASE | (to)), val)
-#define out_long(to, val) write_long_little((uint32 *)(IOBASE | (to)), val)
-
-
-static inline uint8 read_byte(volatile uint8 *from)
-{
- int x;
- asm volatile ("lbz %0,%1\n eieio\n sync" : "=r" (x) : "m" (*from));
- return (uint8)x;
-}
-
-
-static inline void write_byte(volatile uint8 *to, uint8 x)
-{
- asm volatile ("stb %1,%0\n eieio\n sync" : "=m" (*to) : "r" (x));
-}
-
-static inline uint16 read_word_little(volatile uint16 *from)
-{
- int x;
- asm volatile ("lhbrx %0,0,%1\n eieio\n sync" : "=r" (x) : "r" (from), "m" (*from));
- return (uint16)x;
-}
-
-static inline uint16 read_word_big(volatile uint16 *from)
-{
- int x;
- asm volatile ("lhz %0,%1\n eieio\n sync" : "=r" (x) : "m" (*from));
- return (uint16)x;
-}
-
-static inline void write_word_little(volatile uint16 *to, int x)
-{
- asm volatile ("sthbrx %1,0,%2\n eieio\n sync" : "=m" (*to) : "r" (x), "r" (to));
-}
-
-static inline void write_word_big(volatile uint16 *to, int x)
-{
- asm volatile ("sth %1,%0\n eieio\n sync" : "=m" (*to) : "r" (x));
-}
-
-static inline uint32 read_long_little(volatile uint32 *from)
-{
- unsigned long x;
- asm volatile ("lwbrx %0,0,%1\n eieio\n sync" : "=r" (x) : "r" (from), "m"(*from));
- return (uint32)x;
-}
-
-static inline uint32 read_long_big(volatile uint32 *from)
-{
- unsigned long x;
- asm volatile ("lwz %0,%1\n eieio\n sync" : "=r" (x) : "m" (*from));
- return (uint32)x;
-}
-
-static inline void write_long_little(volatile uint32 *to, uint32 x)
-{
- asm volatile ("stwbrx %1,0,%2\n eieio\n sync" : "=m" (*to) : "r" (x), "r" (to));
-}
-
-static inline void write_long_big(volatile uint32 *to, uint32 x)
-{
- asm volatile ("stw %1,%0\n eieio\n sync" : "=m" (*to) : "r" (x));
-}
-
-#define CONFIG_ADDR(bus, devfn, offset) \
- write_long_big((uint32 *)0xFEC00CF8, \
- ((offset & 0xFC)<<24) | (devfn << 16) \
- | (bus<<8) | 0x80);
-#define CONFIG_DATA(offset,mask) ((void *)(0xFEE00CFC+(offset & mask)))
-
-
-uint8 pci_read_cfg_byte(int32 bus, int32 devfn, int32 offset);
-void pci_write_cfg_byte(int32 bus, int32 devfn, int32 offset, uint8 x);
-uint16 pci_read_cfg_word(int32 bus, int32 devfn, int32 offset);
-void pci_write_cfg_word(int32 bus, int32 devfn, int32 offset, uint16 x);
-uint32 pci_read_cfg_long(int32 bus, int32 devfn, int32 offset);
-void pci_write_cfg_long(int32 bus, int32 devfn, int32 offset, uint32 x);
-
-
-#endif
diff --git a/board/MAI/AmigaOneG3SE/memory_dump b/board/MAI/AmigaOneG3SE/memory_dump
deleted file mode 100644
index 65e79362a6..0000000000
--- a/board/MAI/AmigaOneG3SE/memory_dump
+++ /dev/null
@@ -1,30 +0,0 @@
-64 MB:
-0x00: 80 08 04 0c 09 01 40 00 01 a0 60 00 80 08 00 01
-0x10: 8f 04 04 01 01 00 06 a0 60 00 00 14 10 14 2d 10
-0x20: 20 10 20 10 00 00 00 00 00 00 00 00 00 00 00 00
-0x30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 12 f2
-0x40: 7f 61 00 00 00 00 00 00 46 04 00 ff ff ff ff ff
-0x50: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
-0x60: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
-0x70: ff ff ff ff ff ff ff ff ff ff ff ff ff ff 64 f4
-
-512 MB:
-0x00: 80 08 04 0d 0a 02 40 00 01 75 54 00 82 08 00 01
-0x10: 8f 04 04 01 01 00 0f 00 00 00 00 14 0f 14 2d 40
-0x20: 15 08 15 08 00 00 00 00 00 00 00 00 00 00 00 00
-0x30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 12 d2
-0x40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-0x50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-0x60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-0x70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 64 fd
-
-256 MB:
-0x00: 80 08 04 0c 0a 02 40 00 01 75 54 00 80 08 00 01
-0x10: 8f 04 06 01 01 00 0e a0 60 00 00 14 0f 14 2d 20
-0x20: 15 08 15 08 00 00 00 00 00 00 00 00 00 00 00 00
-0x30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 12 b0
-0x40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-0x50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-0x60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-0x70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 64 f6
-
diff --git a/board/MAI/AmigaOneG3SE/nvram.c b/board/MAI/AmigaOneG3SE/nvram.c
deleted file mode 100644
index d37eec1f9b..0000000000
--- a/board/MAI/AmigaOneG3SE/nvram.c
+++ /dev/null
@@ -1,36 +0,0 @@
-/*
- * (C) Copyright 2002
- * Thomas Frieden, Hyperion Entertainment
- * ThomasF@hyperion-entertainment.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include "memio.h"
-
-void enable_nvram(void)
-{
- pci_write_cfg_byte(0, 0, 0x56, 0x0b);
-}
-
-void disable_nvram(void)
-{
- pci_write_cfg_byte(0, 0, 0x56, 0x0);
-}
diff --git a/board/MAI/AmigaOneG3SE/ps2kbd.c b/board/MAI/AmigaOneG3SE/ps2kbd.c
deleted file mode 100644
index cf4f4d0e3d..0000000000
--- a/board/MAI/AmigaOneG3SE/ps2kbd.c
+++ /dev/null
@@ -1,690 +0,0 @@
-/*
- * (C) Copyright 2002
- * John W. Linville, linville@tuxdriver.com
- *
- * Modified from code for support of MIP405 and PIP405 boards. Previous
- * copyright follows.
- *
- * (C) Copyright 2001
- * Denis Peter, MPL AG Switzerland, d.peter@mpl.ch
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- *
- * Source partly derived from:
- * linux/drivers/char/pc_keyb.c
- *
- *
- */
-#include <common.h>
-#include <asm/processor.h>
-#include <devices.h>
-#include "ps2kbd.h"
-
-
-unsigned char kbd_read_status(void);
-unsigned char kbd_read_input(void);
-void kbd_send_data(unsigned char data);
-void i8259_mask_irq(unsigned int irq);
-void i8259_unmask_irq(unsigned int irq);
-
-/* used only by send_data - set by keyboard_interrupt */
-
-
-#undef KBG_DEBUG
-
-#ifdef KBG_DEBUG
-#define PRINTF(fmt,args...) printf (fmt ,##args)
-#else
-#define PRINTF(fmt,args...)
-#endif
-
-#define KBD_STAT_KOBF 0x01
-#define KBD_STAT_IBF 0x02
-#define KBD_STAT_SYS 0x04
-#define KBD_STAT_CD 0x08
-#define KBD_STAT_LOCK 0x10
-#define KBD_STAT_MOBF 0x20
-#define KBD_STAT_TI_OUT 0x40
-#define KBD_STAT_PARERR 0x80
-
-#define KBD_INIT_TIMEOUT 2000 /* Timeout in ms for initializing the keyboard */
-#define KBC_TIMEOUT 250 /* Timeout in ms for sending to keyboard controller */
-#define KBD_TIMEOUT 2000 /* Timeout in ms for keyboard command acknowledge */
-/*
- * Keyboard Controller Commands
- */
-
-#define KBD_CCMD_READ_MODE 0x20 /* Read mode bits */
-#define KBD_CCMD_WRITE_MODE 0x60 /* Write mode bits */
-#define KBD_CCMD_GET_VERSION 0xA1 /* Get controller version */
-#define KBD_CCMD_MOUSE_DISABLE 0xA7 /* Disable mouse interface */
-#define KBD_CCMD_MOUSE_ENABLE 0xA8 /* Enable mouse interface */
-#define KBD_CCMD_TEST_MOUSE 0xA9 /* Mouse interface test */
-#define KBD_CCMD_SELF_TEST 0xAA /* Controller self test */
-#define KBD_CCMD_KBD_TEST 0xAB /* Keyboard interface test */
-#define KBD_CCMD_KBD_DISABLE 0xAD /* Keyboard interface disable */
-#define KBD_CCMD_KBD_ENABLE 0xAE /* Keyboard interface enable */
-#define KBD_CCMD_WRITE_AUX_OBUF 0xD3 /* Write to output buffer as if
- initiated by the auxiliary device */
-#define KBD_CCMD_WRITE_MOUSE 0xD4 /* Write the following byte to the mouse */
-
-/*
- * Keyboard Commands
- */
-
-#define KBD_CMD_SET_LEDS 0xED /* Set keyboard leds */
-#define KBD_CMD_SET_RATE 0xF3 /* Set typematic rate */
-#define KBD_CMD_ENABLE 0xF4 /* Enable scanning */
-#define KBD_CMD_DISABLE 0xF5 /* Disable scanning */
-#define KBD_CMD_RESET 0xFF /* Reset */
-
-/*
- * Keyboard Replies
- */
-
-#define KBD_REPLY_POR 0xAA /* Power on reset */
-#define KBD_REPLY_ACK 0xFA /* Command ACK */
-#define KBD_REPLY_RESEND 0xFE /* Command NACK, send the cmd again */
-
-/*
- * Status Register Bits
- */
-
-#define KBD_STAT_OBF 0x01 /* Keyboard output buffer full */
-#define KBD_STAT_IBF 0x02 /* Keyboard input buffer full */
-#define KBD_STAT_SELFTEST 0x04 /* Self test successful */
-#define KBD_STAT_CMD 0x08 /* Last write was a command write (0=data) */
-#define KBD_STAT_UNLOCKED 0x10 /* Zero if keyboard locked */
-#define KBD_STAT_MOUSE_OBF 0x20 /* Mouse output buffer full */
-#define KBD_STAT_GTO 0x40 /* General receive/xmit timeout */
-#define KBD_STAT_PERR 0x80 /* Parity error */
-
-#define AUX_STAT_OBF (KBD_STAT_OBF | KBD_STAT_MOUSE_OBF)
-
-/*
- * Controller Mode Register Bits
- */
-
-#define KBD_MODE_KBD_INT 0x01 /* Keyboard data generate IRQ1 */
-#define KBD_MODE_MOUSE_INT 0x02 /* Mouse data generate IRQ12 */
-#define KBD_MODE_SYS 0x04 /* The system flag (?) */
-#define KBD_MODE_NO_KEYLOCK 0x08 /* The keylock doesn't affect the keyboard if set */
-#define KBD_MODE_DISABLE_KBD 0x10 /* Disable keyboard interface */
-#define KBD_MODE_DISABLE_MOUSE 0x20 /* Disable mouse interface */
-#define KBD_MODE_KCC 0x40 /* Scan code conversion to PC format */
-#define KBD_MODE_RFU 0x80
-
-
-#define KDB_DATA_PORT 0x60
-#define KDB_COMMAND_PORT 0x64
-
-#define LED_SCR 0x01 /* scroll lock led */
-#define LED_CAP 0x04 /* caps lock led */
-#define LED_NUM 0x02 /* num lock led */
-
-#define KBD_BUFFER_LEN 0x20 /* size of the keyboardbuffer */
-
-
-static volatile char kbd_buffer[KBD_BUFFER_LEN];
-static volatile int in_pointer = 0;
-static volatile int out_pointer = 0;
-
-
-static unsigned char num_lock = 0;
-static unsigned char caps_lock = 0;
-static unsigned char scroll_lock = 0;
-static unsigned char shift = 0;
-static unsigned char ctrl = 0;
-static unsigned char alt = 0;
-static unsigned char e0 = 0;
-static unsigned char leds = 0;
-
-#define DEVNAME "ps2kbd"
-
-/* Simple translation table for the keys */
-
-static unsigned char kbd_plain_xlate[] = {
- 0xff,0x1b, '1', '2', '3', '4', '5', '6', '7', '8', '9', '0', '-', '=','\b','\t', /* 0x00 - 0x0f */
- 'q', 'w', 'e', 'r', 't', 'y', 'u', 'i', 'o', 'p', '[', ']','\r',0xff, 'a', 's', /* 0x10 - 0x1f */
- 'd', 'f', 'g', 'h', 'j', 'k', 'l', ';','\'', '`',0xff,'\\', 'z', 'x', 'c', 'v', /* 0x20 - 0x2f */
- 'b', 'n', 'm', ',', '.', '/',0xff,0xff,0xff, ' ',0xff,0xff,0xff,0xff,0xff,0xff, /* 0x30 - 0x3f */
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff, '7', '8', '9', '-', '4', '5', '6', '+', '1', /* 0x40 - 0x4f */
- '2', '3', '0', '.',0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, /* 0x50 - 0x5F */
- '\r',0xff,0xff
- };
-
-static unsigned char kbd_shift_xlate[] = {
- 0xff,0x1b, '!', '@', '#', '$', '%', '^', '&', '*', '(', ')', '_', '+','\b','\t', /* 0x00 - 0x0f */
- 'Q', 'W', 'E', 'R', 'T', 'Y', 'U', 'I', 'O', 'P', '{', '}','\r',0xff, 'A', 'S', /* 0x10 - 0x1f */
- 'D', 'F', 'G', 'H', 'J', 'K', 'L', ':', '"', '~',0xff, '|', 'Z', 'X', 'C', 'V', /* 0x20 - 0x2f */
- 'B', 'N', 'M', '<', '>', '?',0xff,0xff,0xff, ' ',0xff,0xff,0xff,0xff,0xff,0xff, /* 0x30 - 0x3f */
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff, '7', '8', '9', '-', '4', '5', '6', '+', '1', /* 0x40 - 0x4f */
- '2', '3', '0', '.',0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, /* 0x50 - 0x5F */
- '\r',0xff,0xff
- };
-
-static unsigned char kbd_ctrl_xlate[] = {
- 0xff,0x1b, '1',0x00, '3', '4', '5',0x1E, '7', '8', '9', '0',0x1F, '=','\b','\t', /* 0x00 - 0x0f */
- 0x11,0x17,0x05,0x12,0x14,0x18,0x15,0x09,0x0f,0x10,0x1b,0x1d,'\n',0xff,0x01,0x13, /* 0x10 - 0x1f */
- 0x04,0x06,0x08,0x09,0x0a,0x0b,0x0c, ';','\'', '~',0x00,0x1c,0x1a,0x18,0x03,0x16, /* 0x20 - 0x2f */
- 0x02,0x0e,0x0d, '<', '>', '?',0xff,0xff,0xff,0x00,0xff,0xff,0xff,0xff,0xff,0xff, /* 0x30 - 0x3f */
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff, '7', '8', '9', '-', '4', '5', '6', '+', '1', /* 0x40 - 0x4f */
- '2', '3', '0', '.',0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, /* 0x50 - 0x5F */
- '\r',0xff,0xff
- };
-
-/******************************************************************
- * Init
- ******************************************************************/
-
-int isa_kbd_init(void)
-{
- char* result;
- result=kbd_initialize();
- if (result != NULL)
- {
- result = kbd_initialize();
- }
- if(result==NULL) {
- printf("AT Keyboard initialized\n");
- irq_install_handler(KBD_INTERRUPT, (interrupt_handler_t *)kbd_interrupt, NULL);
- return (1);
- }
- else {
- printf("%s\n",result);
- return (-1);
- }
-}
-
-#ifdef CFG_CONSOLE_OVERWRITE_ROUTINE
-extern int overwrite_console (void);
-#else
-int overwrite_console (void)
-{
- return (0);
-}
-#endif
-
-int drv_isa_kbd_init (void)
-{
- int error;
- device_t kbddev ;
- char *stdinname = getenv ("stdin");
-
- if(isa_kbd_init()==-1)
- return -1;
- memset (&kbddev, 0, sizeof(kbddev));
- strcpy(kbddev.name, DEVNAME);
- kbddev.flags = DEV_FLAGS_INPUT | DEV_FLAGS_SYSTEM;
- kbddev.putc = NULL ;
- kbddev.puts = NULL ;
- kbddev.getc = kbd_getc ;
- kbddev.tstc = kbd_testc ;
-
- error = device_register (&kbddev);
- if(error==0) {
- /* check if this is the standard input device */
- if(strcmp(stdinname,DEVNAME)==0) {
- /* reassign the console */
- if(overwrite_console()) {
- return 1;
- }
- error=console_assign(stdin,DEVNAME);
- if(error==0)
- return 1;
- else
- return error;
- }
- return 1;
- }
- return error;
-}
-
-/******************************************************************
- * Queue handling
- ******************************************************************/
-/* puts character in the queue and sets up the in and out pointer */
-void kbd_put_queue(char data)
-{
- if((in_pointer+1)==KBD_BUFFER_LEN) {
- if(out_pointer==0) {
- return; /* buffer full */
- } else{
- in_pointer=0;
- }
- } else {
- if((in_pointer+1)==out_pointer)
- return; /* buffer full */
- in_pointer++;
- }
- kbd_buffer[in_pointer]=data;
- return;
-}
-
-/* test if a character is in the queue */
-int kbd_testc(void)
-{
- if(in_pointer==out_pointer)
- return(0); /* no data */
- else
- return(1);
-}
-/* gets the character from the queue */
-int kbd_getc(void)
-{
- char c;
-
- while(in_pointer==out_pointer);
- if((out_pointer+1)==KBD_BUFFER_LEN)
- out_pointer=0;
- else
- out_pointer++;
- c=kbd_buffer[out_pointer];
- return (int)c;
-
-}
-
-
-/* set LEDs */
-
-void kbd_set_leds(void)
-{
- if(caps_lock==0)
- leds&=~LED_CAP; /* switch caps_lock off */
- else
- leds|=LED_CAP; /* switch on LED */
- if(num_lock==0)
- leds&=~LED_NUM; /* switch LED off */
- else
- leds|=LED_NUM; /* switch on LED */
- if(scroll_lock==0)
- leds&=~LED_SCR; /* switch LED off */
- else
- leds|=LED_SCR; /* switch on LED */
- kbd_send_data(KBD_CMD_SET_LEDS);
- kbd_send_data(leds);
-}
-
-
-void handle_keyboard_event(unsigned char scancode)
-{
- unsigned char keycode;
-
- /* Convert scancode to keycode */
- PRINTF("scancode %x\n",scancode);
- if(scancode==0xe0) {
- e0=1; /* special charakters */
- return;
- }
- if(e0==1) {
- e0=0; /* delete flag */
- if(!( ((scancode&0x7F)==0x38)|| /* the right ctrl key */
- ((scancode&0x7F)==0x1D)|| /* the right alt key */
- ((scancode&0x7F)==0x35)|| /* the right '/' key */
- ((scancode&0x7F)==0x1C)|| /* the right enter key */
- ((scancode)==0x48)|| /* arrow up */
- ((scancode)==0x50)|| /* arrow down */
- ((scancode)==0x4b)|| /* arrow left */
- ((scancode)==0x4d))) /* arrow right */
- /* we swallow unknown e0 codes */
- return;
- }
- /* special cntrl keys */
- switch(scancode)
- {
- case 0x48:
- kbd_put_queue(27);
- kbd_put_queue(91);
- kbd_put_queue('A');
- return;
- case 0x50:
- kbd_put_queue(27);
- kbd_put_queue(91);
- kbd_put_queue('B');
- return;
- case 0x4b:
- kbd_put_queue(27);
- kbd_put_queue(91);
- kbd_put_queue('D');
- return;
- case 0x4D:
- kbd_put_queue(27);
- kbd_put_queue(91);
- kbd_put_queue('C');
- return;
- case 0x58: /* F12 key */
- if (ctrl == 1)
- {
- extern int console_changed;
- setenv("stdin", DEVNAME);
- setenv("stdout", "vga");
- console_changed = 1;
- }
- return;
- case 0x2A:
- case 0x36: /* shift pressed */
- shift=1;
- return; /* do nothing else */
- case 0xAA:
- case 0xB6: /* shift released */
- shift=0;
- return; /* do nothing else */
- case 0x38: /* alt pressed */
- alt=1;
- return; /* do nothing else */
- case 0xB8: /* alt released */
- alt=0;
- return; /* do nothing else */
- case 0x1d: /* ctrl pressed */
- ctrl=1;
- return; /* do nothing else */
- case 0x9d: /* ctrl released */
- ctrl=0;
- return; /* do nothing else */
- case 0x46: /* scrollock pressed */
- scroll_lock=~scroll_lock;
- kbd_set_leds();
- return; /* do nothing else */
- case 0x3A: /* capslock pressed */
- caps_lock=~caps_lock;
- kbd_set_leds();
- return;
- case 0x45: /* numlock pressed */
- num_lock=~num_lock;
- kbd_set_leds();
- return;
- case 0xC6: /* scroll lock released */
- case 0xC5: /* num lock released */
- case 0xBA: /* caps lock released */
- return; /* just swallow */
- }
- if((scancode&0x80)==0x80) /* key released */
- return;
- /* now, decide which table we need */
- if(scancode > (sizeof(kbd_plain_xlate)/sizeof(kbd_plain_xlate[0]))) { /* scancode not in list */
- PRINTF("unkown scancode %X\n",scancode);
- return; /* swallow it */
- }
- /* setup plain code first */
- keycode=kbd_plain_xlate[scancode];
- if(caps_lock==1) { /* caps_lock is pressed, overwrite plain code */
- if(scancode > (sizeof(kbd_shift_xlate)/sizeof(kbd_shift_xlate[0]))) { /* scancode not in list */
- PRINTF("unkown caps-locked scancode %X\n",scancode);
- return; /* swallow it */
- }
- keycode=kbd_shift_xlate[scancode];
- if(keycode<'A') { /* we only want the alphas capital */
- keycode=kbd_plain_xlate[scancode];
- }
- }
- if(shift==1) { /* shift overwrites caps_lock */
- if(scancode > (sizeof(kbd_shift_xlate)/sizeof(kbd_shift_xlate[0]))) { /* scancode not in list */
- PRINTF("unkown shifted scancode %X\n",scancode);
- return; /* swallow it */
- }
- keycode=kbd_shift_xlate[scancode];
- }
- if(ctrl==1) { /* ctrl overwrites caps_lock and shift */
- if(scancode > (sizeof(kbd_ctrl_xlate)/sizeof(kbd_ctrl_xlate[0]))) { /* scancode not in list */
- PRINTF("unkown ctrl scancode %X\n",scancode);
- return; /* swallow it */
- }
- keycode=kbd_ctrl_xlate[scancode];
- }
- /* check if valid keycode */
- if(keycode==0xff) {
- PRINTF("unkown scancode %X\n",scancode);
- return; /* swallow unknown codes */
- }
-
- kbd_put_queue(keycode);
- PRINTF("%x\n",keycode);
-}
-
-/*
- * This reads the keyboard status port, and does the
- * appropriate action.
- *
- */
-unsigned char handle_kbd_event(void)
-{
- unsigned char status = kbd_read_status();
- unsigned int work = 10000;
-
- while ((--work > 0) && (status & KBD_STAT_OBF)) {
- unsigned char scancode;
-
- scancode = kbd_read_input();
-
- /* Error bytes must be ignored to make the
- Synaptics touchpads compaq use work */
- /* Ignore error bytes */
- if (!(status & (KBD_STAT_GTO | KBD_STAT_PERR)))
- {
- if (status & KBD_STAT_MOUSE_OBF)
- ; /* not supported: handle_mouse_event(scancode); */
- else
- handle_keyboard_event(scancode);
- }
- status = kbd_read_status();
- }
- if (!work)
- PRINTF("pc_keyb: controller jammed (0x%02X).\n", status);
- return status;
-}
-
-
-/******************************************************************************
- * Lowlevel Part of keyboard section
- */
-unsigned char kbd_read_status(void)
-{
- return(in8(CFG_ISA_IO_BASE_ADDRESS + KDB_COMMAND_PORT));
-}
-
-unsigned char kbd_read_input(void)
-{
- return(in8(CFG_ISA_IO_BASE_ADDRESS + KDB_DATA_PORT));
-}
-
-void kbd_write_command(unsigned char cmd)
-{
- out8(CFG_ISA_IO_BASE_ADDRESS + KDB_COMMAND_PORT,cmd);
-}
-
-void kbd_write_output(unsigned char data)
-{
- out8(CFG_ISA_IO_BASE_ADDRESS + KDB_DATA_PORT, data);
-}
-
-int kbd_read_data(void)
-{
- int val;
- unsigned char status;
-
- val=-1;
- status = kbd_read_status();
- if (status & KBD_STAT_OBF) {
- val = kbd_read_input();
- if (status & (KBD_STAT_GTO | KBD_STAT_PERR))
- val = -2;
- }
- return val;
-}
-
-int kbd_wait_for_input(void)
-{
- unsigned long timeout;
- int val;
-
- timeout = KBD_TIMEOUT;
- val=kbd_read_data();
- while(val < 0)
- {
- if(timeout--==0)
- return -1;
- udelay(1000);
- val=kbd_read_data();
- }
- return val;
-}
-
-
-int kb_wait(void)
-{
- unsigned long timeout = KBC_TIMEOUT * 10;
-
- do {
- unsigned char status = handle_kbd_event();
- if (!(status & KBD_STAT_IBF))
- return 0; /* ok */
- udelay(1000);
- timeout--;
- } while (timeout);
- return 1;
-}
-
-void kbd_write_command_w(int data)
-{
- if(kb_wait())
- PRINTF("timeout in kbd_write_command_w\n");
- kbd_write_command(data);
-}
-
-void kbd_write_output_w(int data)
-{
- if(kb_wait())
- PRINTF("timeout in kbd_write_output_w\n");
- kbd_write_output(data);
-}
-
-void kbd_send_data(unsigned char data)
-{
- unsigned char status;
- i8259_mask_irq(KBD_INTERRUPT); /* disable interrupt */
- kbd_write_output_w(data);
- status = kbd_wait_for_input();
- if (status == KBD_REPLY_ACK)
- i8259_unmask_irq(KBD_INTERRUPT); /* enable interrupt */
-}
-
-
-char * kbd_initialize(void)
-{
- int status;
-
- in_pointer = 0; /* delete in Buffer */
- out_pointer = 0;
- /*
- * Test the keyboard interface.
- * This seems to be the only way to get it going.
- * If the test is successful a x55 is placed in the input buffer.
- */
- kbd_write_command_w(KBD_CCMD_SELF_TEST);
- if (kbd_wait_for_input() != 0x55)
- return "Kbd: failed self test";
- /*
- * Perform a keyboard interface test. This causes the controller
- * to test the keyboard clock and data lines. The results of the
- * test are placed in the input buffer.
- */
- kbd_write_command_w(KBD_CCMD_KBD_TEST);
- if (kbd_wait_for_input() != 0x00)
- return "Kbd: interface failed self test";
- /*
- * Enable the keyboard by allowing the keyboard clock to run.
- */
- kbd_write_command_w(KBD_CCMD_KBD_ENABLE);
- status = kbd_wait_for_input();
- /*
- * Reset keyboard. If the read times out
- * then the assumption is that no keyboard is
- * plugged into the machine.
- * This defaults the keyboard to scan-code set 2.
- *
- * Set up to try again if the keyboard asks for RESEND.
- */
- do {
- kbd_write_output_w(KBD_CMD_RESET);
- status = kbd_wait_for_input();
- if (status == KBD_REPLY_ACK)
- break;
- if (status != KBD_REPLY_RESEND)
- {
- PRINTF("status: %X\n",status);
- return "Kbd: reset failed, no ACK";
- }
- } while (1);
- if (kbd_wait_for_input() != KBD_REPLY_POR)
- return "Kbd: reset failed, no POR";
-
- /*
- * Set keyboard controller mode. During this, the keyboard should be
- * in the disabled state.
- *
- * Set up to try again if the keyboard asks for RESEND.
- */
- do {
- kbd_write_output_w(KBD_CMD_DISABLE);
- status = kbd_wait_for_input();
- if (status == KBD_REPLY_ACK)
- break;
- if (status != KBD_REPLY_RESEND)
- return "Kbd: disable keyboard: no ACK";
- } while (1);
-
- kbd_write_command_w(KBD_CCMD_WRITE_MODE);
- kbd_write_output_w(KBD_MODE_KBD_INT
- | KBD_MODE_SYS
- | KBD_MODE_DISABLE_MOUSE
- | KBD_MODE_KCC);
-
- /* AMCC powerpc portables need this to use scan-code set 1 -- Cort */
- kbd_write_command_w(KBD_CCMD_READ_MODE);
- if (!(kbd_wait_for_input() & KBD_MODE_KCC)) {
- /*
- * If the controller does not support conversion,
- * Set the keyboard to scan-code set 1.
- */
- kbd_write_output_w(0xF0);
- kbd_wait_for_input();
- kbd_write_output_w(0x01);
- kbd_wait_for_input();
- }
- kbd_write_output_w(KBD_CMD_ENABLE);
- if (kbd_wait_for_input() != KBD_REPLY_ACK)
- return "Kbd: enable keyboard: no ACK";
-
- /*
- * Finally, set the typematic rate to maximum.
- */
- kbd_write_output_w(KBD_CMD_SET_RATE);
- if (kbd_wait_for_input() != KBD_REPLY_ACK)
- return "Kbd: Set rate: no ACK";
- kbd_write_output_w(0x00);
- if (kbd_wait_for_input() != KBD_REPLY_ACK)
- return "Kbd: Set rate: no ACK";
- return NULL;
-}
-
-void kbd_interrupt(void)
-{
- handle_kbd_event();
-}
diff --git a/board/MAI/AmigaOneG3SE/ps2kbd.h b/board/MAI/AmigaOneG3SE/ps2kbd.h
deleted file mode 100644
index fc5c4229dd..0000000000
--- a/board/MAI/AmigaOneG3SE/ps2kbd.h
+++ /dev/null
@@ -1,41 +0,0 @@
-/*
- * (C) Copyright 2002
- * John W. Linville, linville@tuxdriver.com
- *
- * Modified from code for support of MIP405 and PIP405 boards. Previous
- * copyright follows.
- *
- * (C) Copyright 2001
- * Denis Peter, MPL AG Switzerland, d.peter@mpl.ch
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- */
-
-#ifndef _KBD_H_
-#define _KBD_H_
-
-extern int kbd_testc(void);
-extern int kbd_getc(void);
-extern void kbd_interrupt(void);
-extern char *kbd_initialize(void);
-
-unsigned char kbd_is_init(void);
-#define KBD_INTERRUPT 1
-#endif
diff --git a/board/MAI/AmigaOneG3SE/serial.c b/board/MAI/AmigaOneG3SE/serial.c
deleted file mode 100644
index e83fb46c73..0000000000
--- a/board/MAI/AmigaOneG3SE/serial.c
+++ /dev/null
@@ -1,247 +0,0 @@
-#include <common.h>
-#include <ns16550.h>
-#include "short_types.h"
-#include "memio.h"
-#include "articiaS.h"
-
-#ifndef CFG_NS16550
-static uint32 ComPort1;
-
-uint16 SerialEcho = 1;
-
-
-#define RECEIVER_HOLDING 0
-#define TRANSMITTER_HOLDING 0
-#define INTERRUPT_ENABLE 1
-#define INTERRUPT_STATUS 2
-#define FIFO_CONTROL 2
-#define LINE_CONTROL 3
-#define MODEM_CONTROL 4
-#define LINE_STATUS 5
-#define MODEM_STATUS 6
-#define SCRATCH_PAD 7
-
-#define DIVISOR_LATCH_LSB 0
-#define DIVISOR_LATCH_MSB 1
-#define PRESCALER_DIVISION 5
-
-#define COM_WRITE_BYTE(reg, byte) out_byte((ComPort1+reg), byte)
-#define COM_READ_BYTE(reg) in_byte((ComPort1+reg))
-
-static int serial_init_done = 0;
-
-void serial_init (void)
-{
-#if 0
- uint32 clock_divisor = 115200 / baudrate;
- uint8 cfg;
- uint8 a;
- uint16 devfn = 7 << 3;
-
- if (serial_init_done)
- return;
-
- /* Enter configuration mode */
- cfg = pci_read_cfg_byte (0, devfn, 0x85);
- pci_write_cfg_byte (0, devfn, 0x85, cfg | 0x02);
-
- /* Set serial port COM1 as 3F8 */
- out_byte (0x3F0, 0xE7);
- out_byte (0x3f1, 0xfe);
-
- /* Set serial port COM2 as 2F8 */
- out_byte (0x3f0, 0xe8);
- out_byte (0x3f1, 0xeb);
-
- /* Enable */
- out_byte (0x3f0, 0xe2);
- a = in_byte (0x3f1);
- a |= 0xc;
- out_byte (0x3f0, 0xe2);
- out_byte (0x3f1, a);
-
- /* Reset the configuration mode */
- pci_write_cfg_byte (0, devfn, 0x85, cfg);
-#endif
-
- ComPort1 = 0x3F8;
-
- /* Disable interrupts */
- COM_WRITE_BYTE (INTERRUPT_ENABLE, 0x00);
-
- /* Set baud rate */
- /* COM_WRITE_BYTE(LINE_CONTROL, 0x83); */
- /* COM_WRITE_BYTE(DIVISOR_LATCH_LSB, (uint8)(clock_divisor & 0xFF)); */
- /* COM_WRITE_BYTE(DIVISOR_LATCH_MSB, (uint8)(clock_divisor >> 8)); */
- /* __asm("eieio"); */
-
- /* Set 8-N-1 */
- COM_WRITE_BYTE (LINE_CONTROL, 0x03);
- __asm ("eieio");
-
- /* Disable FIFO */
- COM_WRITE_BYTE (MODEM_CONTROL, 0x03);
- COM_WRITE_BYTE (FIFO_CONTROL, 0x07);
-
- __asm ("eieio");
- serial_init_done = 1;
-}
-
-extern int console_changed;
-
-void serial_putc (const char sendme)
-{
- if (sendme == '\n') {
- while ((in_byte (0x3FD) & 0x40) == 0);
- out_byte (0x3f8, 0x0D);
- }
-
- while ((in_byte (0x3FD) & 0x40) == 0);
- out_byte (0x3f8, sendme);
-}
-
-int serial_getc (void)
-{
-#if 0
- uint8 c;
-
- for (;;) {
- uint8 x = in_byte (0x3FD);
-
- if (x & 0x01)
- break;
-
- if (x & 0x0C)
- out_byte (0x3fd, 0x0c);
- }
-
- c = in_byte (0x3F8);
-
- return c;
-#else
- while ((in_byte (0x3FD) & 0x01) == 0) {
- if (console_changed != 0) {
- printf ("Console changed\n");
- console_changed = 0;
- return 0;
- }
- }
- return in_byte (0x3F8);
-#endif
-}
-
-int serial_tstc (void)
-{
- return (in_byte (0x03FD) & 0x01) != 0;
-}
-
-void serial_debug_putc (int c)
-{
- serial_puts ("DBG");
- serial_putc (c);
- serial_putc (0x0d);
- serial_putc (0x0A);
-}
-
-#else
-
-const NS16550_t Com0 = (NS16550_t) CFG_NS16550_COM1;
-const NS16550_t Com1 = (NS16550_t) CFG_NS16550_COM2;
-
-int serial_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- uint32 clock_divisor = 115200 / gd->baudrate;
-
- NS16550_init (Com0, clock_divisor);
- /* NS16550_reinit(Com1, clock_divisor); */
- /* serial_puts("COM1: 3F8h initalized"); */
-
- return (0);
-}
-
-#if 0
-void serial_putc (const char c)
-{
- NS16550_putc (Com0, c);
- if (c == '\n')
- NS16550_putc (Com0, 0x0D);
-}
-
-int serial_getc (void)
-{
- return (int) NS16550_getc (Com0);
-}
-
-int serial_tstc (void)
-{
- return NS16550_tstc (Com0);
-}
-#else
-void serial_putc (const char sendme)
-{
- if (sendme == '\n') {
- while ((in_byte (0x3FD) & 0x40) == 0);
- out_byte (0x3f8, 0x0D);
- }
-
- while ((in_byte (0x3FD) & 0x40) == 0);
- out_byte (0x3f8, sendme);
-}
-
-
-extern int console_changed;
-
-int serial_getc (void)
-{
-#if 0
- uint8 c;
-
- for (;;) {
- uint8 x = in_byte (0x3FD);
-
- if (x & 0x01)
- break;
-
- if (x & 0x0C)
- out_byte (0x3fd, 0x0c);
- }
-
- c = in_byte (0x3F8);
-
- return c;
-#else
- while ((in_byte (0x3FD) & 0x01) == 0) {
- if (console_changed != 0) {
- console_changed = 0;
- return 0;
- }
- }
-
- return in_byte (0x3F8);
-#endif
-}
-
-int serial_tstc (void)
-{
- return (in_byte (0x03FD) & 0x01) != 0;
-}
-#endif
-
-#endif
-
-void serial_puts (const char *string)
-{
- while (*string)
- serial_putc (*string++);
-}
-
-void serial_setbrg (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- uint32 clock_divisor = 115200 / gd->baudrate;
-
- NS16550_init (Com0, clock_divisor);
-}
diff --git a/board/MAI/AmigaOneG3SE/short_types.h b/board/MAI/AmigaOneG3SE/short_types.h
deleted file mode 100644
index 1840d28b45..0000000000
--- a/board/MAI/AmigaOneG3SE/short_types.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/*
- * short type names
- *
- * (C) Copyright 2002
- * Hyperion Entertainment, ThomasF@hyperion-entertainment.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef _SHORT_TYPES_H
-#define _SHORT_TYPES_H
-
-typedef unsigned long uint32;
-typedef long int32;
-typedef unsigned short uint16;
-typedef short int16;
-typedef unsigned char uint8;
-typedef signed char int8;
-
-#endif
diff --git a/board/MAI/AmigaOneG3SE/smbus.c b/board/MAI/AmigaOneG3SE/smbus.c
deleted file mode 100644
index de139773ea..0000000000
--- a/board/MAI/AmigaOneG3SE/smbus.c
+++ /dev/null
@@ -1,206 +0,0 @@
-#include "memio.h"
-#include "articiaS.h"
-
-#ifndef FALSE
-#define FALSE 0
-#endif
-
-#ifndef TRUE
-#define TRUE 1
-#endif
-
-
-void sm_write_mode(void)
-{
- out_byte(0xA539, 0x00);
- out_byte(0xA53A, 0x03);
-}
-
-void sm_read_mode(void)
-{
- out_byte(0xA53A, 0x02);
- out_byte(0xA539, 0x02);
-}
-
-void sm_write_byte(uint8 writeme)
-{
- int i;
- int level;
-
- out_byte(0xA539, 0x00);
-
- level = 0;
-
- for (i=0; i<8; i++)
- {
- if ((writeme & 0x80) == (level<<7))
- {
- /* Bit did not change, rewrite strobe */
- out_byte(0xA539, level | 0x02);
- out_byte(0xA539, level);
- }
- else
- {
- /* Bit changed, set bit, then strobe */
- level = (writeme & 0x80) >> 7;
- out_byte(0xA539, level);
- out_byte(0xA539, level | 0x02);
- out_byte(0xA539, level);
- }
- writeme <<= 1;
- }
- out_byte(0xA539, 0x00);
-}
-
-uint8 sm_read_byte(void)
-{
- uint8 retme, r;
- int i;
-
- retme = 0;
- for (i=0; i<8; i++)
- {
- retme <<= 1;
- out_byte(0xA539, 0x00);
- out_byte(0xA539, 0x02);
- r = in_byte(0xA538) & 0x01;
- retme |= r;
- }
-
- return retme;
-}
-
-int sm_get_ack(void)
-{
- uint8 r;
- r = in_byte(0xA538);
- if ((r&0x01) == 0) return TRUE;
- else return FALSE;
-}
-
-void sm_write_ack(void)
-{
- out_byte(0xA539, 0x00);
- out_byte(0xA539, 0x02);
- out_byte(0xA539, 0x00);
-}
-
-void sm_write_nack(void)
-{
- out_byte(0xA539, 0x01);
- out_byte(0xA539, 0x03);
- out_byte(0xA539, 0x01);
-}
-
-void sm_send_start(void)
-{
- out_byte(0xA539, 0x03);
- out_byte(0xA539, 0x02);
-}
-
-void sm_send_stop(void)
-{
- out_byte(0xA539, 0x02);
- out_byte(0xA539, 0x03);
-}
-
-int sm_read_byte_from_device(uint8 addr, uint8 reg, uint8 *storage)
-{
- /* S Addr Wr */
- sm_write_mode();
- sm_send_start();
- sm_write_byte((addr<<1));
-
- /* [A] */
- sm_read_mode();
- if (sm_get_ack() == FALSE) return FALSE;
-
- /* Comm */
- sm_write_mode();
- sm_write_byte(reg);
-
- /* [A] */
- sm_read_mode();
- if (sm_get_ack() == FALSE) return FALSE;
-
- /* S Addr Rd */
- sm_write_mode();
- sm_send_start();
- sm_write_byte((addr<<1)|1);
-
- /* [A] */
- sm_read_mode();
- if (sm_get_ack() == FALSE) return FALSE;
-
- /* [Data] */
- *storage = sm_read_byte();
-
- /* NA */
- sm_write_mode();
- sm_write_nack();
- sm_send_stop();
-
- return TRUE;
-}
-
-void sm_init(void)
-{
- /* Switch to PMC mode */
- pci_write_cfg_byte(0, 0, REG_GROUP, (uint8)(REG_GROUP_SPECIAL|REG_GROUP_POWER));
-
- /* Set GPIO Base */
- pci_write_cfg_long(0, 0, 0x40, 0xa500);
-
- /* Enable GPIO */
- pci_write_cfg_byte(0, 0, 0x44, 0x11);
-
- /* Set both GPIO 0 and 1 as output */
- out_byte(0xA53A, 0x03);
-}
-
-
-void sm_term(void)
-{
- /* Switch to normal mode */
- pci_write_cfg_byte(0, 0, REG_GROUP, 0);
-}
-
-
-int sm_get_data(uint8 *DataArray, int dimm_socket)
-{
- int j;
-
-#if 0
- /* Switch to PMC mode */
- pci_write_cfg_byte(0, 0, REG_GROUP, (uint8)(REG_GROUP_SPECIAL|REG_GROUP_POWER));
-
- /* Set GPIO Base */
- pci_write_cfg_long(0, 0, 0x40, 0xa500);
-
- /* Enable GPIO */
- pci_write_cfg_byte(0, 0, 0x44, 0x11);
-
- /* Set both GPIO 0 and 1 as output */
- out_byte(0xA53A, 0x03);
-#endif
-
- sm_init();
- /* Start reading the rom */
-
- j = 0;
-
- do
- {
- if (sm_read_byte_from_device(dimm_socket, (uint8)j, DataArray) == FALSE)
- {
- sm_term();
- return FALSE;
- }
-
- DataArray++;
- j++;
- } while (j < 128);
-
- sm_term();
- return TRUE;
-}
diff --git a/board/MAI/AmigaOneG3SE/smbus.h b/board/MAI/AmigaOneG3SE/smbus.h
deleted file mode 100644
index beeb6a06aa..0000000000
--- a/board/MAI/AmigaOneG3SE/smbus.h
+++ /dev/null
@@ -1,22 +0,0 @@
-#ifndef _SMBUS_H_
-#define _SMBUS_H_
-
-#include "short_types.h"
-
-#define SM_DIMM0_ADDR 0x51
-#define SM_DIMM1_ADDR 0x52
-
-void sm_write_mode(void);
-void sm_read_mode(void);
-void sm_write_byte(uint8 writeme);
-uint8 sm_read_byte(void);
-int sm_get_ack(void);
-void sm_write_ack(void);
-void sm_write_nack(void);
-void sm_send_start(void);
-void sm_send_stop(void);
-int sm_read_byte_from_device(uint8 addr, uint8 reg, uint8 *storage);
-int sm_get_data(uint8 *DataArray, int dimm_socket);
-void sm_init(void);
-void sm_term(void);
-#endif
diff --git a/board/MAI/AmigaOneG3SE/start.txt b/board/MAI/AmigaOneG3SE/start.txt
deleted file mode 100644
index e4214622ce..0000000000
--- a/board/MAI/AmigaOneG3SE/start.txt
+++ /dev/null
@@ -1,198 +0,0 @@
-
- /*------------------------------------------------------*/
- /* TERON Articia / SDRAM Init */
- /*------------------------------------------------------*/
-
-* XD_CTL = 0x81000000 (0x74)
-
-* HBUS_ACC_CTL_0 &= 0xFFFFFDFF (0x5c)
- /* host bus access ctl reg 2(5e) */
- /* set - CPU read from memory data one clock after data is latched */
-
-* GLOBL_INFO_0 |= 0x00004000 (0x50)
- /* global info register 2 (52), AGP/PCI bus 1 arbiter is addressed in Articia S */
-
- PCI_1_SB_CONFIG_0 |= 0x00000400 (0x80d0)
- /* PCI1 side band config reg 2 (d2), enable read acces while write buffer not empty */
-
- MEM_RAS_CTL_0 |= 0x3f000000 (0xcc)
- &= 0x3fffffff
- /* RAS park control reg 0(cc), park access enable is set */
-
- HOST_RDBUF_CTL |= 0x10000000 (0x70)
- &= 0x10ffffff
- /* host read buffer control reg, enable prefetch for CPU read from DRAM control */
-
- HBUS_ACC_CTL_0 |= 0x0100001f (0x5c)
- &= 0xf1ffffff
- /* host bus access control register, enable CPU address bus pipe control */
- /* two outstanding requests, *** changed to 2 from 3 */
- /* enable line merge write control for CPU write to system memory, PCI 1 */
- /* and PCI 0 bus memory; enable page merge write control for write to */
- /* PCI bus 0 & bus 1 memory */
-
- SRAM_CTL |= 0x00004000 (0xc8)
- &= 0xffbff7ff
- /* DRAM detail timing control register 1 (ca), bit 3 set to 0 */
- /* DRAM start access latency control - wait for one clock */
- /* ff9f changed to ffbf */
-
- DIM0_TIM_CTL_0 = 0x737d737d (0xc9)
- /* DRAM timing control for dimm0 & dimm1; set wait one clock */
- /* cycle for next data access */
-
- DIM2_TIM_CTL_0 = 0x737d737d (0xca)
- /* DRAM timing control for dimm2 & dimm3; set wait one clock */
- /* cycle for next data access */
-
- DIM0_BNK0_CTL_0 = BNK0_RAM_SIZ_128MB (0x90)
- /* set dimm0 bank0 for 128 MB */
-
- DIM0_BNK1_CTL_0 = BNK1_RAM_SIZ_128MB (0x94)
- /* set dimm0 for bank1 */
-
- DIM0_TIM_CTL_0 = 0xf3bf0000 (0xc9)
- /* dimm0 timing control register; RAS - CAS latency - 4 clock */
- /* CAS access latency - 3 wait; pre-charge latency - 3 wait */
- /* pre-charge command period control - 5 clock; wait one clock */
- /* cycle for next data access; read to write access latency control */
- /* - 2 clock cycles */
-
- DRAM_GBL_CTL_0 |= 0x00000100 (0xc0)
- &= 0xffff01ff
- /* memory global control register - support buffer sdram on bank 0 */
-
- DRAM_ECC_CTL_0 |= 0x00260000 (0xc4)
- &= 0xff26ffff
- /* enable ECC; enable read, modify, write control */
-
- DRAM_REF_CTL_0 = DRAM_REF_DATA (0xb8)
- /* set DRAM refresh parameters *** changed to 00940100 */
-
- nop
- nop
- nop
- nop
- nop
-
- DRAM_ECC_CTL_0 |= 0x20243280 (0xc4)
- /* turn off ecc */
- /* for SDRAM bank 0 */
-
- DRAM_ECC_CTL_0 |= 0x20243290 (0xc4) ?
- /* for SDRAM bank 1 */
-
-
-/* Additional Stuff...*/
-
- GLOBL_CTRL |= 0x20000b00 (0x54)
-
- PCI_0_SB_CONFIG |= 0x04100007 (0xd0)
- /* PCI 0 Side band config reg*/
-
- 0x8000083c |= 0x00080000
- /* Disable VGA decode on PCI Bus 1 */
-
-
-/*End Additional Stuff..*/
-
- /*--------------------------------------------------------------*/
- /* TERON serial port initialization code */
- /*--------------------------------------------------------------*/
-
- 0x84380080 |= 0x00030000
- /* enable super IO configuration VIA chip Register 85 */
- /* Enable super I/O config mode */
-
- 0xfe0003f0 = 0xe2
- bl delay1
-
- 0xfe0003f1 = 0x0f
- bl delay1
- /* enable com1 & com2, parallel port disabled */
-
- 0xfe0003f0 = 0xe7
- bl delay1
- /* let's make com1 base as 0x3f8 */
-
- 0xfe0003f1 = 0xfe
- bl delay1
-
- 0xfe0003f0 = 0xe8
- bl delay1
- /* let's make com2 base as 0x2f8 */
-
- 0xfe0003f1 = 0xbe
-
- 0x84380080 &= 0xfffdffff
- /* closing super IO configuration VIA chip Register 85 */
-
-
-/* -------------------------------*/
-
- 0xfe0003fb = 0x83
- bl delay1
- /*latch enable word length -8 bit */ /* set mslab bit */
- 0xfe0003f8 = 0x0c
- bl delay1
- /* set baud rate lsb for 9600 baud */
- 0xfe0003f9 = 0x0
- bl delay1
- /* set baud rate msb for 9600 baud */
- 0xfe0003fb = 0x03
- bl delay1
- /* reset mslab */
-
- /*--------------------------------------------------------------*/
- /* END TERON Serial Port Initialization Code */
- /*--------------------------------------------------------------*/
-
-
- /*--------------------------------------------------------------*/
- /* END TERON Articia / SDRAM Initialization code */
- /*--------------------------------------------------------------*/
-
-Proposed from Documentation:
-
-write dmem 0xfec00cf8 0x50000080
-write dmem 0xfee00cfc 0xc0305411
-
- Writes to index 0x50-0x53.
- 0x50: Global Information Register 0
- 0xC0 = Little Endian CPU, Sequential order Burst
- 0x51: Global Information Register 1
- Read only, 0x30 = Provides PowerPC and X86 support
- 0x52: Global Information Register 2
- 0x05 = 64/128 bit CPU bus support
- 0x53: Global Information Register 3
- 0x80 = PCI Bus 0 grant active time is 1 clock after REQ# deasserted
-
-write dmem 0xfec00cf8 0x5c000080
-write dmem 0xfee00cfc 0xb300011F
-
-write dmem 0xfec00cf8 0xc8000080
-write dmem 0xfee00cfc 0x0020f100
-
-write dmem 0xfec00cf8 0x90000080
-write dmem 0xfee00cfc 0x007fe700
-
-write dmem 0xfec00cf8 0x9400080
-write dmem 0xfee00cfc 0x007fe700
-
-write dmem 0xfec00cf8 0xb0000080
-write dmem 0xfee00cfc 0x737d737d
-
-write dmem 0xfec00cf8 0xb4000080
-write dmem 0xfee00cfc 0x737d737d
-
-write dmem 0xfec00cf8 0xc0000080
-write dmem 0xfee00cfc 0x40005500
-
-write dmem 0xfec00cf8 0xb8000080
-write dmem 0xfee00cfc 0x00940100
-
-write dmem 0xfec00cf8 0xc4000080
-write dmem 0xfee00cfc 0x00003280
-
-write dmem 0xfec00cf8 0xc4000080
-write dmem 0xfee00cfc 0x00003290
diff --git a/board/MAI/AmigaOneG3SE/todo.txt b/board/MAI/AmigaOneG3SE/todo.txt
deleted file mode 100644
index df25e3dee0..0000000000
--- a/board/MAI/AmigaOneG3SE/todo.txt
+++ /dev/null
@@ -1,3 +0,0 @@
-- Init interrupt controller
-- init sdram
-- init ide controller \ No newline at end of file
diff --git a/board/MAI/AmigaOneG3SE/u-boot.lds b/board/MAI/AmigaOneG3SE/u-boot.lds
deleted file mode 100644
index b36b3cb450..0000000000
--- a/board/MAI/AmigaOneG3SE/u-boot.lds
+++ /dev/null
@@ -1,140 +0,0 @@
-/*
- * (C) Copyright 2001
- * Josh Huber <huber@mclx.com>, Mission Critical Linux, Inc.
- *
- * (C) Copyright 2002
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * u-boot.lds - linker script for U-Boot on the AmigaOneG3SE Board.
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/74xx_7xx/start.o (.text)
-/* store the environment in a seperate sector in the boot flash */
-/* . = env_offset; */
- common/environment.o(.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = ALIGN(4) /*.*/ ;
- PROVIDE (end = ALIGN(4) /*.*/);
-}
diff --git a/board/MAI/AmigaOneG3SE/usb_uhci.c b/board/MAI/AmigaOneG3SE/usb_uhci.c
deleted file mode 100644
index 14e804308a..0000000000
--- a/board/MAI/AmigaOneG3SE/usb_uhci.c
+++ /dev/null
@@ -1,1178 +0,0 @@
-/*
- * (C) Copyright 2001
- * Denis Peter, MPL AG Switzerland
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- * Note: Part of this code has been derived from linux
- *
- */
-
-/**********************************************************************
- * How it works:
- * -------------
- * The framelist / Transfer descriptor / Queue Heads are similar like
- * in the linux usb_uhci.c.
- *
- * During initialization, the following skeleton is allocated in init_skel:
- *
- * framespecific | common chain
- *
- * framelist[]
- * [ 0 ]-----> TD ---------\
- * [ 1 ]-----> TD ----------> TD ------> QH -------> QH -------> QH ---> NULL
- * ... TD ---------/
- * [1023]-----> TD --------/
- *
- * ^^ ^^ ^^ ^^ ^^
- * 7 TDs for 1 TD for Start of Start of End Chain
- * INT (2-128ms) 1ms-INT CTRL Chain BULK Chain
- *
- *
- * Since this is a bootloader, the isochronous transfer descriptor have been removed.
- *
- * Interrupt Transfers.
- * --------------------
- * For Interupt transfers USB_MAX_TEMP_INT_TD Transfer descriptor are available. They
- * will be inserted after the appropriate (depending the interval setting) skeleton TD.
- * If an interrupt has been detected the dev->irqhandler is called. The status and number
- * of transfered bytes is stored in dev->irq_status resp. dev->irq_act_len. If the
- * dev->irqhandler returns 0, the interrupt TD is removed and disabled. If an 1 is returned,
- * the interrupt TD will be reactivated.
- *
- * Control Transfers
- * -----------------
- * Control Transfers are issued by filling the tmp_td with the appropriate data and connect
- * them to the qh_cntrl queue header. Before other control/bulk transfers can be issued,
- * the programm has to wait for completion. This does not allows asynchronous data transfer.
- *
- * Bulk Transfers
- * --------------
- * Bulk Transfers are issued by filling the tmp_td with the appropriate data and connect
- * them to the qh_bulk queue header. Before other control/bulk transfers can be issued,
- * the programm has to wait for completion. This does not allows asynchronous data transfer.
- *
- *
- */
-
-#include <common.h>
-#include <pci.h>
-
-#ifdef CONFIG_USB_UHCI
-
-#include <usb.h>
-#include "usb_uhci.h"
-
-#define USB_MAX_TEMP_TD 128 /* number of temporary TDs for bulk and control transfers */
-#define USB_MAX_TEMP_INT_TD 32 /* number of temporary TDs for Interrupt transfers */
-
-
-/*#define USB_UHCI_DEBUG */
-
-#ifdef USB_UHCI_DEBUG
-#define USB_UHCI_PRINTF(fmt,args...) printf (fmt ,##args)
-#else
-#define USB_UHCI_PRINTF(fmt,args...)
-#endif
-
-
-static int irqvec = -1; /* irq vector, if -1 uhci is stopped / reseted */
-unsigned int usb_base_addr; /* base address */
-
-static uhci_td_t td_int[8]; /* Interrupt Transfer descriptors */
-static uhci_qh_t qh_cntrl; /* control Queue Head */
-static uhci_qh_t qh_bulk; /* bulk Queue Head */
-static uhci_qh_t qh_end; /* end Queue Head */
-static uhci_td_t td_last; /* last TD (linked with end chain) */
-
-/* temporary tds */
-static uhci_td_t tmp_td[USB_MAX_TEMP_TD]; /* temporary bulk/control td's */
-static uhci_td_t tmp_int_td[USB_MAX_TEMP_INT_TD]; /* temporary interrupt td's */
-
-static unsigned long framelist[1024] __attribute__ ((aligned (0x1000))); /* frame list */
-
-static struct virt_root_hub rh; /* struct for root hub */
-
-/**********************************************************************
- * some forward decleration
- */
-int uhci_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
- void *buffer, int transfer_len,struct devrequest *setup);
-
-/* fill a td with the approproiate data. Link, status, info and buffer
- * are used by the USB controller itselfes, dev is used to identify the
- * "connected" device
- */
-void usb_fill_td(uhci_td_t* td,unsigned long link,unsigned long status,
- unsigned long info, unsigned long buffer, unsigned long dev)
-{
- td->link=swap_32(link);
- td->status=swap_32(status);
- td->info=swap_32(info);
- td->buffer=swap_32(buffer);
- td->dev_ptr=dev;
-}
-
-/* fill a qh with the approproiate data. Head and element are used by the USB controller
- * itselfes. As soon as a valid dev_ptr is filled, a td chain is connected to the qh.
- * Please note, that after completion of the td chain, the entry element is removed /
- * marked invalid by the USB controller.
- */
-void usb_fill_qh(uhci_qh_t* qh,unsigned long head,unsigned long element)
-{
- qh->head=swap_32(head);
- qh->element=swap_32(element);
- qh->dev_ptr=0L;
-}
-
-/* get the status of a td->status
- */
-unsigned long usb_uhci_td_stat(unsigned long status)
-{
- unsigned long result=0;
- result |= (status & TD_CTRL_NAK) ? USB_ST_NAK_REC : 0;
- result |= (status & TD_CTRL_STALLED) ? USB_ST_STALLED : 0;
- result |= (status & TD_CTRL_DBUFERR) ? USB_ST_BUF_ERR : 0;
- result |= (status & TD_CTRL_BABBLE) ? USB_ST_BABBLE_DET : 0;
- result |= (status & TD_CTRL_CRCTIMEO) ? USB_ST_CRC_ERR : 0;
- result |= (status & TD_CTRL_BITSTUFF) ? USB_ST_BIT_ERR : 0;
- result |= (status & TD_CTRL_ACTIVE) ? USB_ST_NOT_PROC : 0;
- return result;
-}
-
-/* get the status and the transfered len of a td chain.
- * called from the completion handler
- */
-int usb_get_td_status(uhci_td_t *td,struct usb_device *dev)
-{
- unsigned long temp,info;
- unsigned long stat;
- uhci_td_t *mytd=td;
-
- if(dev->devnum==rh.devnum)
- return 0;
- dev->act_len=0;
- stat=0;
- do {
- temp=swap_32((unsigned long)mytd->status);
- stat=usb_uhci_td_stat(temp);
- info=swap_32((unsigned long)mytd->info);
- if(((info & 0xff)!= USB_PID_SETUP) &&
- (((info >> 21) & 0x7ff)!= 0x7ff) &&
- (temp & 0x7FF)!=0x7ff)
- { /* if not setup and not null data pack */
- dev->act_len+=(temp & 0x7FF) + 1; /* the transfered len is act_len + 1 */
- }
- if(stat) { /* status no ok */
- dev->status=stat;
- return -1;
- }
- temp=swap_32((unsigned long)mytd->link);
- mytd=(uhci_td_t *)(temp & 0xfffffff0);
- }while((temp & 0x1)==0); /* process all TDs */
- dev->status=stat;
- return 0; /* Ok */
-}
-
-
-/*-------------------------------------------------------------------
- * LOW LEVEL STUFF
- * assembles QHs und TDs for control, bulk and iso
- *-------------------------------------------------------------------*/
-
-/* Submits a control message. That is a Setup, Data and Status transfer.
- * Routine does not wait for completion.
- */
-int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
- int transfer_len,struct devrequest *setup)
-{
- unsigned long destination, status;
- int maxsze = usb_maxpacket(dev, pipe);
- unsigned long dataptr;
- int len;
- int pktsze;
- int i=0;
-
- if (!maxsze) {
- USB_UHCI_PRINTF("uhci_submit_control_urb: pipesize for pipe %lx is zero\n", pipe);
- return -1;
- }
- if(((pipe>>8)&0x7f)==rh.devnum) {
- /* this is the root hub -> redirect it */
- return uhci_submit_rh_msg(dev,pipe,buffer,transfer_len,setup);
- }
- USB_UHCI_PRINTF("uhci_submit_control start len %x, maxsize %x\n",transfer_len,maxsze);
- /* The "pipe" thing contains the destination in bits 8--18 */
- destination = (pipe & PIPE_DEVEP_MASK) | USB_PID_SETUP; /* Setup stage */
- /* 3 errors */
- status = (pipe & TD_CTRL_LS) | TD_CTRL_ACTIVE | (3 << 27);
- /* (urb->transfer_flags & USB_DISABLE_SPD ? 0 : TD_CTRL_SPD); */
- /* Build the TD for the control request, try forever, 8 bytes of data */
- usb_fill_td(&tmp_td[i],UHCI_PTR_TERM ,status, destination | (7 << 21),(unsigned long)setup,(unsigned long)dev);
-#if 0
- {
- char *sp=(char *)setup;
- printf("SETUP to pipe %lx: %x %x %x %x %x %x %x %x\n", pipe,
- sp[0],sp[1],sp[2],sp[3],sp[4],sp[5],sp[6],sp[7]);
- }
-#endif
- dataptr = (unsigned long)buffer;
- len=transfer_len;
-
- /* If direction is "send", change the frame from SETUP (0x2D)
- to OUT (0xE1). Else change it from SETUP to IN (0x69). */
- destination = (pipe & PIPE_DEVEP_MASK) | ((pipe & USB_DIR_IN)==0 ? USB_PID_OUT : USB_PID_IN);
- while (len > 0) {
- /* data stage */
- pktsze = len;
- i++;
- if (pktsze > maxsze)
- pktsze = maxsze;
- destination ^= 1 << TD_TOKEN_TOGGLE; /* toggle DATA0/1 */
- usb_fill_td(&tmp_td[i],UHCI_PTR_TERM, status, destination | ((pktsze - 1) << 21),dataptr,(unsigned long)dev); /* Status, pktsze bytes of data */
- tmp_td[i-1].link=swap_32((unsigned long)&tmp_td[i]);
-
- dataptr += pktsze;
- len -= pktsze;
- }
-
- /* Build the final TD for control status */
- /* It's only IN if the pipe is out AND we aren't expecting data */
-
- destination &= ~UHCI_PID;
- if (((pipe & USB_DIR_IN)==0) || (transfer_len == 0))
- destination |= USB_PID_IN;
- else
- destination |= USB_PID_OUT;
- destination |= 1 << TD_TOKEN_TOGGLE; /* End in Data1 */
- i++;
- status &=~TD_CTRL_SPD;
- /* no limit on errors on final packet , 0 bytes of data */
- usb_fill_td(&tmp_td[i],UHCI_PTR_TERM, status | TD_CTRL_IOC, destination | (UHCI_NULL_DATA_SIZE << 21),0,(unsigned long)dev);
- tmp_td[i-1].link=swap_32((unsigned long)&tmp_td[i]); /* queue status td */
- /* usb_show_td(i+1);*/
- USB_UHCI_PRINTF("uhci_submit_control end (%d tmp_tds used)\n",i);
- /* first mark the control QH element terminated */
- qh_cntrl.element=0xffffffffL;
- /* set qh active */
- qh_cntrl.dev_ptr=(unsigned long)dev;
- /* fill in tmp_td_chain */
- qh_cntrl.element=swap_32((unsigned long)&tmp_td[0]);
- return 0;
-}
-
-/*-------------------------------------------------------------------
- * Prepare TDs for bulk transfers.
- */
-int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,int transfer_len)
-{
- unsigned long destination, status,info;
- unsigned long dataptr;
- int maxsze = usb_maxpacket(dev, pipe);
- int len;
- int i=0;
-
- if(transfer_len < 0) {
- printf("Negative transfer length in submit_bulk\n");
- return -1;
- }
- if (!maxsze)
- return -1;
- /* The "pipe" thing contains the destination in bits 8--18. */
- destination = (pipe & PIPE_DEVEP_MASK) | usb_packetid (pipe);
- /* 3 errors */
- status = (pipe & TD_CTRL_LS) | TD_CTRL_ACTIVE | (3 << 27);
- /* ((urb->transfer_flags & USB_DISABLE_SPD) ? 0 : TD_CTRL_SPD) | (3 << 27); */
- /* Build the TDs for the bulk request */
- len = transfer_len;
- dataptr = (unsigned long)buffer;
- do {
- int pktsze = len;
- if (pktsze > maxsze)
- pktsze = maxsze;
- /* pktsze bytes of data */
- info = destination | (((pktsze - 1)&UHCI_NULL_DATA_SIZE) << 21) |
- (usb_gettoggle (dev, usb_pipeendpoint (pipe), usb_pipeout (pipe)) << TD_TOKEN_TOGGLE);
-
- if((len-pktsze)==0)
- status |= TD_CTRL_IOC; /* last one generates INT */
-
- usb_fill_td(&tmp_td[i],UHCI_PTR_TERM, status, info,dataptr,(unsigned long)dev); /* Status, pktsze bytes of data */
- if(i>0)
- tmp_td[i-1].link=swap_32((unsigned long)&tmp_td[i]);
- i++;
- dataptr += pktsze;
- len -= pktsze;
- usb_dotoggle (dev, usb_pipeendpoint (pipe), usb_pipeout (pipe));
- } while (len > 0);
- /* first mark the bulk QH element terminated */
- qh_bulk.element=0xffffffffL;
- /* set qh active */
- qh_bulk.dev_ptr=(unsigned long)dev;
- /* fill in tmp_td_chain */
- qh_bulk.element=swap_32((unsigned long)&tmp_td[0]);
- return 0;
-}
-
-
-/* search a free interrupt td
- */
-uhci_td_t *uhci_alloc_int_td(void)
-{
- int i;
- for(i=0;i<USB_MAX_TEMP_INT_TD;i++) {
- if(tmp_int_td[i].dev_ptr==0) /* no device assigned -> free TD */
- return &tmp_int_td[i];
- }
- return NULL;
-}
-
-#if 0
-void uhci_show_temp_int_td(void)
-{
- int i;
- for(i=0;i<USB_MAX_TEMP_INT_TD;i++) {
- if((tmp_int_td[i].dev_ptr&0x01)!=0x1L) /* no device assigned -> free TD */
- printf("temp_td %d is assigned to dev %lx\n",i,tmp_int_td[i].dev_ptr);
- }
- printf("all others temp_tds are free\n");
-}
-#endif
-/*-------------------------------------------------------------------
- * submits USB interrupt (ie. polling ;-)
- */
-int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,int transfer_len, int interval)
-{
- int nint, n;
- unsigned long status, destination;
- unsigned long info,tmp;
- uhci_td_t *mytd;
- if (interval < 0 || interval >= 256)
- return -1;
-
- if (interval == 0)
- nint = 0;
- else {
- for (nint = 0, n = 1; nint <= 8; nint++, n += n) /* round interval down to 2^n */
- {
- if(interval < n) {
- interval = n / 2;
- break;
- }
- }
- nint--;
- }
-
- USB_UHCI_PRINTF("Rounded interval to %i, chain %i\n", interval, nint);
- mytd=uhci_alloc_int_td();
- if(mytd==NULL) {
- printf("No free INT TDs found\n");
- return -1;
- }
- status = (pipe & TD_CTRL_LS) | TD_CTRL_ACTIVE | TD_CTRL_IOC | (3 << 27);
-/* (urb->transfer_flags & USB_DISABLE_SPD ? 0 : TD_CTRL_SPD) | (3 << 27);
-*/
-
- destination =(pipe & PIPE_DEVEP_MASK) | usb_packetid (pipe) | (((transfer_len - 1) & 0x7ff) << 21);
-
- info = destination | (usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe)) << TD_TOKEN_TOGGLE);
- tmp = swap_32(td_int[nint].link);
- usb_fill_td(mytd,tmp,status, info,(unsigned long)buffer,(unsigned long)dev);
- /* Link it */
- tmp = swap_32((unsigned long)mytd);
- td_int[nint].link=tmp;
-
- usb_dotoggle (dev, usb_pipeendpoint (pipe), usb_pipeout (pipe));
-
- return 0;
-}
-
-/**********************************************************************
- * Low Level functions
- */
-
-
-void reset_hc(void)
-{
-
- /* Global reset for 100ms */
- out16r( usb_base_addr + USBPORTSC1,0x0204);
- out16r( usb_base_addr + USBPORTSC2,0x0204);
- out16r( usb_base_addr + USBCMD,USBCMD_GRESET | USBCMD_RS);
- /* Turn off all interrupts */
- out16r(usb_base_addr + USBINTR,0);
- wait_ms(50);
- out16r( usb_base_addr + USBCMD,0);
- wait_ms(10);
-}
-
-void start_hc(void)
-{
- int timeout = 1000;
-
- while(in16r(usb_base_addr + USBCMD) & USBCMD_HCRESET) {
- if (!--timeout) {
- printf("USBCMD_HCRESET timed out!\n");
- break;
- }
- }
- /* Turn on all interrupts */
- out16r(usb_base_addr + USBINTR,USBINTR_TIMEOUT | USBINTR_RESUME | USBINTR_IOC | USBINTR_SP);
- /* Start at frame 0 */
- out16r(usb_base_addr + USBFRNUM,0);
- /* set Framebuffer base address */
- out32r(usb_base_addr+USBFLBASEADD,(unsigned long)&framelist);
- /* Run and mark it configured with a 64-byte max packet */
- out16r(usb_base_addr + USBCMD,USBCMD_RS | USBCMD_CF | USBCMD_MAXP);
-}
-
-/* Initialize the skeleton
- */
-void usb_init_skel(void)
-{
- unsigned long temp;
- int n;
-
- for(n=0;n<USB_MAX_TEMP_INT_TD;n++)
- tmp_int_td[n].dev_ptr=0L; /* no devices connected */
- /* last td */
- usb_fill_td(&td_last,UHCI_PTR_TERM,TD_CTRL_IOC ,0,0,0L);
- /* usb_fill_td(&td_last,UHCI_PTR_TERM,0,0,0); */
- /* End Queue Header */
- usb_fill_qh(&qh_end,UHCI_PTR_TERM,(unsigned long)&td_last);
- /* Bulk Queue Header */
- temp=(unsigned long)&qh_end;
- usb_fill_qh(&qh_bulk,temp | UHCI_PTR_QH,UHCI_PTR_TERM);
- /* Control Queue Header */
- temp=(unsigned long)&qh_bulk;
- usb_fill_qh(&qh_cntrl, temp | UHCI_PTR_QH,UHCI_PTR_TERM);
- /* 1ms Interrupt td */
- temp=(unsigned long)&qh_cntrl;
- usb_fill_td(&td_int[0],temp | UHCI_PTR_QH,0,0,0,0L);
- temp=(unsigned long)&td_int[0];
- for(n=1; n<8; n++)
- usb_fill_td(&td_int[n],temp,0,0,0,0L);
- for (n = 0; n < 1024; n++) {
- /* link all framelist pointers to one of the interrupts */
- int m, o;
- if ((n&127)==127)
- framelist[n]= swap_32((unsigned long)&td_int[0]);
- else
- for (o = 1, m = 2; m <= 128; o++, m += m)
- if ((n & (m - 1)) == ((m - 1) / 2))
- framelist[n]= swap_32((unsigned long)&td_int[o]);
- }
-}
-
-/* check the common skeleton for completed transfers, and update the status
- * of the "connected" device. Called from the IRQ routine.
- */
-void usb_check_skel(void)
-{
- struct usb_device *dev;
- /* start with the control qh */
- if(qh_cntrl.dev_ptr!=0) /* it's a device assigned check if this caused IRQ */
- {
- dev=(struct usb_device *)qh_cntrl.dev_ptr;
- usb_get_td_status(&tmp_td[0],dev); /* update status */
- if(!(dev->status & USB_ST_NOT_PROC)) { /* is not active anymore, disconnect devices */
- qh_cntrl.dev_ptr=0;
- }
- }
- /* now process the bulk */
- if(qh_bulk.dev_ptr!=0) /* it's a device assigned check if this caused IRQ */
- {
- dev=(struct usb_device *)qh_bulk.dev_ptr;
- usb_get_td_status(&tmp_td[0],dev); /* update status */
- if(!(dev->status & USB_ST_NOT_PROC)) { /* is not active anymore, disconnect devices */
- qh_bulk.dev_ptr=0;
- }
- }
-}
-
-/* check the interrupt chain, ubdate the status of the appropriate device,
- * call the appropriate irqhandler and reactivate the TD if the irqhandler
- * returns with 1
- */
-void usb_check_int_chain(void)
-{
- int i,res;
- unsigned long link,status;
- struct usb_device *dev;
- uhci_td_t *td,*prevtd;
-
- for(i=0;i<8;i++) {
- prevtd=&td_int[i]; /* the first previous td is the skeleton td */
- link=swap_32(td_int[i].link) & 0xfffffff0; /* next in chain */
- td=(uhci_td_t *)link; /* assign it */
- /* all interrupt TDs are finally linked to the td_int[0].
- * so we process all until we find the td_int[0].
- * if int0 chain points to a QH, we're also done
- */
- while(((i>0) && (link != (unsigned long)&td_int[0])) ||
- ((i==0) && !(swap_32(td->link) & UHCI_PTR_QH)))
- {
- /* check if a device is assigned with this td */
- status=swap_32(td->status);
- if((td->dev_ptr!=0L) && !(status & TD_CTRL_ACTIVE)) {
- /* td is not active and a device is assigned -> call irqhandler */
- dev=(struct usb_device *)td->dev_ptr;
- dev->irq_act_len=((status & 0x7FF)==0x7FF) ? 0 : (status & 0x7FF) + 1; /* transfered length */
- dev->irq_status=usb_uhci_td_stat(status); /* get status */
- res=dev->irq_handle(dev); /* call irqhandler */
- if(res==1) {
- /* reactivate */
- status|=TD_CTRL_ACTIVE;
- td->status=swap_32(status);
- prevtd=td; /* previous td = this td */
- }
- else {
- prevtd->link=td->link; /* link previous td directly to the nex td -> unlinked */
- /* remove device pointer */
- td->dev_ptr=0L;
- }
- } /* if we call the irq handler */
- link=swap_32(td->link) & 0xfffffff0; /* next in chain */
- td=(uhci_td_t *)link; /* assign it */
- } /* process all td in this int chain */
- } /* next interrupt chain */
-}
-
-
-/* usb interrupt service routine.
- */
-void handle_usb_interrupt(void)
-{
- unsigned short status;
-
- /*
- * Read the interrupt status, and write it back to clear the
- * interrupt cause
- */
-
- status = in16r(usb_base_addr + USBSTS);
-
- if (!status) /* shared interrupt, not mine */
- return;
- if (status != 1) {
- /* remove host controller halted state */
- if ((status&0x20) && ((in16r(usb_base_addr+USBCMD) && USBCMD_RS)==0)) {
- out16r(usb_base_addr + USBCMD, USBCMD_RS | in16r(usb_base_addr + USBCMD));
- }
- }
- usb_check_int_chain(); /* call interrupt handlers for int tds */
- usb_check_skel(); /* call completion handler for common transfer routines */
- out16r(usb_base_addr+USBSTS,status);
-}
-
-
-/* init uhci
- */
-int usb_lowlevel_init(void)
-{
- unsigned char temp;
- int busdevfunc;
-/*
- * HJF - configure IRQ and base from variables optionally.
- */
- char *s;
-
-
- busdevfunc=pci_find_device(USB_UHCI_VEND_ID,USB_UHCI_DEV_ID,0); /* get PCI Device ID */
- if(busdevfunc==-1) {
- printf("Error USB UHCI (%04X,%04X) not found\n",USB_UHCI_VEND_ID,USB_UHCI_DEV_ID);
- return -1;
- }
-
-#if 1
- s = getenv("usb_irq");
- if (s)
- {
- temp = atoi(s);
- pci_write_config_byte(busdevfunc, PCI_INTERRUPT_LINE, temp);
- }
- else
-#endif
- pci_read_config_byte(busdevfunc,PCI_INTERRUPT_LINE,&temp);
-
- s = getenv("usb_base");
- if (s)
- {
- unsigned long temp2;
- temp2 = atoi(s);
- pci_write_config_dword(busdevfunc, PCI_BASE_ADDRESS_4, temp2|0x01);
- }
-
- irqvec = temp;
- irq_free_handler(irqvec);
- USB_UHCI_PRINTF("Interrupt Line = %d\n",irqvec);
- pci_read_config_byte(busdevfunc,PCI_INTERRUPT_PIN,&temp);
- USB_UHCI_PRINTF("Interrupt Pin = %ld\n",temp);
- pci_read_config_dword(busdevfunc,PCI_BASE_ADDRESS_4,&usb_base_addr);
- USB_UHCI_PRINTF("IO Base Address = 0x%lx\n",usb_base_addr);
- usb_base_addr&=0xFFFFFFF0;
- usb_base_addr+=CFG_ISA_IO_BASE_ADDRESS;
- rh.devnum = 0;
- usb_init_skel();
- reset_hc();
- start_hc();
- irq_install_handler(irqvec, (interrupt_handler_t *)handle_usb_interrupt, NULL);
- irq_install_handler(0, (interrupt_handler_t *)handle_usb_interrupt, NULL);
-
- return 0;
-}
-
-/* stop uhci
- */
-int usb_lowlevel_stop(void)
-{
- if(irqvec==-1)
- return 1;
- irq_free_handler(irqvec);
- irq_free_handler(0);
- reset_hc();
- irqvec=-1;
- return 0;
-}
-
-/*******************************************************************************************
- * Virtual Root Hub
- * Since the uhci does not have a real HUB, we simulate one ;-)
- */
-#undef USB_RH_DEBUG
-
-#ifdef USB_RH_DEBUG
-#define USB_RH_PRINTF(fmt,args...) printf (fmt ,##args)
-static void usb_display_wValue(unsigned short wValue,unsigned short wIndex);
-static void usb_display_Req(unsigned short req);
-#else
-#define USB_RH_PRINTF(fmt,args...)
-static void usb_display_wValue(unsigned short wValue,unsigned short wIndex) {}
-static void usb_display_Req(unsigned short req) {}
-#endif
-
-static unsigned char root_hub_dev_des[] =
-{
- 0x12, /* __u8 bLength; */
- 0x01, /* __u8 bDescriptorType; Device */
- 0x00, /* __u16 bcdUSB; v1.0 */
- 0x01,
- 0x09, /* __u8 bDeviceClass; HUB_CLASSCODE */
- 0x00, /* __u8 bDeviceSubClass; */
- 0x00, /* __u8 bDeviceProtocol; */
- 0x08, /* __u8 bMaxPacketSize0; 8 Bytes */
- 0x00, /* __u16 idVendor; */
- 0x00,
- 0x00, /* __u16 idProduct; */
- 0x00,
- 0x00, /* __u16 bcdDevice; */
- 0x00,
- 0x01, /* __u8 iManufacturer; */
- 0x00, /* __u8 iProduct; */
- 0x00, /* __u8 iSerialNumber; */
- 0x01 /* __u8 bNumConfigurations; */
-};
-
-
-/* Configuration descriptor */
-static unsigned char root_hub_config_des[] =
-{
- 0x09, /* __u8 bLength; */
- 0x02, /* __u8 bDescriptorType; Configuration */
- 0x19, /* __u16 wTotalLength; */
- 0x00,
- 0x01, /* __u8 bNumInterfaces; */
- 0x01, /* __u8 bConfigurationValue; */
- 0x00, /* __u8 iConfiguration; */
- 0x40, /* __u8 bmAttributes;
- Bit 7: Bus-powered, 6: Self-powered, 5 Remote-wakwup, 4..0: resvd */
- 0x00, /* __u8 MaxPower; */
-
- /* interface */
- 0x09, /* __u8 if_bLength; */
- 0x04, /* __u8 if_bDescriptorType; Interface */
- 0x00, /* __u8 if_bInterfaceNumber; */
- 0x00, /* __u8 if_bAlternateSetting; */
- 0x01, /* __u8 if_bNumEndpoints; */
- 0x09, /* __u8 if_bInterfaceClass; HUB_CLASSCODE */
- 0x00, /* __u8 if_bInterfaceSubClass; */
- 0x00, /* __u8 if_bInterfaceProtocol; */
- 0x00, /* __u8 if_iInterface; */
-
- /* endpoint */
- 0x07, /* __u8 ep_bLength; */
- 0x05, /* __u8 ep_bDescriptorType; Endpoint */
- 0x81, /* __u8 ep_bEndpointAddress; IN Endpoint 1 */
- 0x03, /* __u8 ep_bmAttributes; Interrupt */
- 0x08, /* __u16 ep_wMaxPacketSize; 8 Bytes */
- 0x00,
- 0xff /* __u8 ep_bInterval; 255 ms */
-};
-
-
-static unsigned char root_hub_hub_des[] =
-{
- 0x09, /* __u8 bLength; */
- 0x29, /* __u8 bDescriptorType; Hub-descriptor */
- 0x02, /* __u8 bNbrPorts; */
- 0x00, /* __u16 wHubCharacteristics; */
- 0x00,
- 0x01, /* __u8 bPwrOn2pwrGood; 2ms */
- 0x00, /* __u8 bHubContrCurrent; 0 mA */
- 0x00, /* __u8 DeviceRemovable; *** 7 Ports max *** */
- 0xff /* __u8 PortPwrCtrlMask; *** 7 ports max *** */
-};
-
-static unsigned char root_hub_str_index0[] =
-{
- 0x04, /* __u8 bLength; */
- 0x03, /* __u8 bDescriptorType; String-descriptor */
- 0x09, /* __u8 lang ID */
- 0x04, /* __u8 lang ID */
-};
-
-static unsigned char root_hub_str_index1[] =
-{
- 28, /* __u8 bLength; */
- 0x03, /* __u8 bDescriptorType; String-descriptor */
- 'U', /* __u8 Unicode */
- 0, /* __u8 Unicode */
- 'H', /* __u8 Unicode */
- 0, /* __u8 Unicode */
- 'C', /* __u8 Unicode */
- 0, /* __u8 Unicode */
- 'I', /* __u8 Unicode */
- 0, /* __u8 Unicode */
- ' ', /* __u8 Unicode */
- 0, /* __u8 Unicode */
- 'R', /* __u8 Unicode */
- 0, /* __u8 Unicode */
- 'o', /* __u8 Unicode */
- 0, /* __u8 Unicode */
- 'o', /* __u8 Unicode */
- 0, /* __u8 Unicode */
- 't', /* __u8 Unicode */
- 0, /* __u8 Unicode */
- ' ', /* __u8 Unicode */
- 0, /* __u8 Unicode */
- 'H', /* __u8 Unicode */
- 0, /* __u8 Unicode */
- 'u', /* __u8 Unicode */
- 0, /* __u8 Unicode */
- 'b', /* __u8 Unicode */
- 0, /* __u8 Unicode */
-};
-
-
-/*
- * Root Hub Control Pipe (interrupt Pipes are not supported)
- */
-
-
-int uhci_submit_rh_msg(struct usb_device *dev, unsigned long pipe, void *buffer,int transfer_len,struct devrequest *cmd)
-{
- void *data = buffer;
- int leni = transfer_len;
- int len = 0;
- int status = 0;
- int stat = 0;
- int i;
-
- unsigned short cstatus;
-
- unsigned short bmRType_bReq;
- unsigned short wValue;
- unsigned short wIndex;
- unsigned short wLength;
-
- if ((pipe & PIPE_INTERRUPT) == PIPE_INTERRUPT) {
- printf("Root-Hub submit IRQ: NOT implemented\n");
-#if 0
- uhci->rh.urb = urb;
- uhci->rh.send = 1;
- uhci->rh.interval = urb->interval;
- rh_init_int_timer (urb);
-#endif
- return 0;
- }
- bmRType_bReq = cmd->requesttype | cmd->request << 8;
- wValue = swap_16(cmd->value);
- wIndex = swap_16(cmd->index);
- wLength = swap_16(cmd->length);
- usb_display_Req(bmRType_bReq);
- for (i = 0; i < 8; i++)
- rh.c_p_r[i] = 0;
- USB_RH_PRINTF("Root-Hub: adr: %2x cmd(%1x): %02x%02x %04x %04x %04x\n",
- dev->devnum, 8, cmd->requesttype,cmd->request, wValue, wIndex, wLength);
-
- switch (bmRType_bReq) {
- /* Request Destination:
- without flags: Device,
- RH_INTERFACE: interface,
- RH_ENDPOINT: endpoint,
- RH_CLASS means HUB here,
- RH_OTHER | RH_CLASS almost ever means HUB_PORT here
- */
-
- case RH_GET_STATUS:
- *(unsigned short *) data = swap_16(1);
- len=2;
- break;
- case RH_GET_STATUS | RH_INTERFACE:
- *(unsigned short *) data = swap_16(0);
- len=2;
- break;
- case RH_GET_STATUS | RH_ENDPOINT:
- *(unsigned short *) data = swap_16(0);
- len=2;
- break;
- case RH_GET_STATUS | RH_CLASS:
- *(unsigned long *) data = swap_32(0);
- len=4;
- break; /* hub power ** */
- case RH_GET_STATUS | RH_OTHER | RH_CLASS:
-
- status = in16r(usb_base_addr + USBPORTSC1 + 2 * (wIndex - 1));
- cstatus = ((status & USBPORTSC_CSC) >> (1 - 0)) |
- ((status & USBPORTSC_PEC) >> (3 - 1)) |
- (rh.c_p_r[wIndex - 1] << (0 + 4));
- status = (status & USBPORTSC_CCS) |
- ((status & USBPORTSC_PE) >> (2 - 1)) |
- ((status & USBPORTSC_SUSP) >> (12 - 2)) |
- ((status & USBPORTSC_PR) >> (9 - 4)) |
- (1 << 8) | /* power on ** */
- ((status & USBPORTSC_LSDA) << (-8 + 9));
-
- *(unsigned short *) data = swap_16(status);
- *(unsigned short *) (data + 2) = swap_16(cstatus);
- len=4;
- break;
- case RH_CLEAR_FEATURE | RH_ENDPOINT:
- switch (wValue) {
- case (RH_ENDPOINT_STALL):
- len=0;
- break;
- }
- break;
-
- case RH_CLEAR_FEATURE | RH_CLASS:
- switch (wValue) {
- case (RH_C_HUB_OVER_CURRENT):
- len=0; /* hub power over current ** */
- break;
- }
- break;
-
- case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
- usb_display_wValue(wValue,wIndex);
- switch (wValue) {
- case (RH_PORT_ENABLE):
- status = in16r(usb_base_addr+USBPORTSC1+2*(wIndex-1));
- status = (status & 0xfff5) & ~USBPORTSC_PE;
- out16r(usb_base_addr+USBPORTSC1+2*(wIndex-1),status);
- len=0;
- break;
- case (RH_PORT_SUSPEND):
- status = in16r(usb_base_addr+USBPORTSC1+2*(wIndex-1));
- status = (status & 0xfff5) & ~USBPORTSC_SUSP;
- out16r(usb_base_addr+USBPORTSC1+2*(wIndex-1),status);
- len=0;
- break;
- case (RH_PORT_POWER):
- len=0; /* port power ** */
- break;
- case (RH_C_PORT_CONNECTION):
- status = in16r(usb_base_addr+USBPORTSC1+2*(wIndex-1));
- status = (status & 0xfff5) | USBPORTSC_CSC;
- out16r(usb_base_addr+USBPORTSC1+2*(wIndex-1),status);
- len=0;
- break;
- case (RH_C_PORT_ENABLE):
- status = in16r(usb_base_addr+USBPORTSC1+2*(wIndex-1));
- status = (status & 0xfff5) | USBPORTSC_PEC;
- out16r(usb_base_addr+USBPORTSC1+2*(wIndex-1),status);
- len=0;
- break;
- case (RH_C_PORT_SUSPEND):
-/*** WR_RH_PORTSTAT(RH_PS_PSSC); */
- len=0;
- break;
- case (RH_C_PORT_OVER_CURRENT):
- len=0;
- break;
- case (RH_C_PORT_RESET):
- rh.c_p_r[wIndex - 1] = 0;
- len=0;
- break;
- }
- break;
- case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
- usb_display_wValue(wValue,wIndex);
- switch (wValue) {
- case (RH_PORT_SUSPEND):
- status = in16r(usb_base_addr+USBPORTSC1+2*(wIndex-1));
- status = (status & 0xfff5) | USBPORTSC_SUSP;
- out16r(usb_base_addr+USBPORTSC1+2*(wIndex-1),status);
- len=0;
- break;
- case (RH_PORT_RESET):
- status = in16r(usb_base_addr+USBPORTSC1+2*(wIndex-1));
- status = (status & 0xfff5) | USBPORTSC_PR;
- out16r(usb_base_addr+USBPORTSC1+2*(wIndex-1),status);
- wait_ms(10);
- status = (status & 0xfff5) & ~USBPORTSC_PR;
- out16r(usb_base_addr+USBPORTSC1+2*(wIndex-1),status);
- udelay(10);
- status = (status & 0xfff5) | USBPORTSC_PE;
- out16r(usb_base_addr+USBPORTSC1+2*(wIndex-1),status);
- wait_ms(10);
- status = (status & 0xfff5) | 0xa;
- out16r(usb_base_addr+USBPORTSC1+2*(wIndex-1),status);
- len=0;
- break;
- case (RH_PORT_POWER):
- len=0; /* port power ** */
- break;
- case (RH_PORT_ENABLE):
- status = in16r(usb_base_addr+USBPORTSC1+2*(wIndex-1));
- status = (status & 0xfff5) | USBPORTSC_PE;
- out16r(usb_base_addr+USBPORTSC1+2*(wIndex-1),status);
- len=0;
- break;
- }
- break;
-
- case RH_SET_ADDRESS:
- rh.devnum = wValue;
- len=0;
- break;
- case RH_GET_DESCRIPTOR:
- switch ((wValue & 0xff00) >> 8) {
- case (0x01): /* device descriptor */
- i=sizeof(root_hub_config_des);
- status=i > wLength ? wLength : i;
- len = leni > status ? status : leni;
- memcpy (data, root_hub_dev_des, len);
- break;
- case (0x02): /* configuration descriptor */
- i=sizeof(root_hub_config_des);
- status=i > wLength ? wLength : i;
- len = leni > status ? status : leni;
- memcpy (data, root_hub_config_des, len);
- break;
- case (0x03): /*string descriptors */
- if(wValue==0x0300) {
- i=sizeof(root_hub_str_index0);
- status = i > wLength ? wLength : i;
- len = leni > status ? status : leni;
- memcpy (data, root_hub_str_index0, len);
- break;
- }
- if(wValue==0x0301) {
- i=sizeof(root_hub_str_index1);
- status = i > wLength ? wLength : i;
- len = leni > status ? status : leni;
- memcpy (data, root_hub_str_index1, len);
- break;
- }
- stat = USB_ST_STALLED;
- }
- break;
-
- case RH_GET_DESCRIPTOR | RH_CLASS:
- root_hub_hub_des[2] = 2;
- i=sizeof(root_hub_hub_des);
- status= i > wLength ? wLength : i;
- len = leni > status ? status : leni;
- memcpy (data, root_hub_hub_des, len);
- break;
- case RH_GET_CONFIGURATION:
- *(unsigned char *) data = 0x01;
- len = 1;
- break;
- case RH_SET_CONFIGURATION:
- len=0;
- break;
- default:
- stat = USB_ST_STALLED;
- }
- USB_RH_PRINTF("Root-Hub stat %lx port1: %x port2: %x\n\n",stat,
- in16r(usb_base_addr + USBPORTSC1), in16r(usb_base_addr + USBPORTSC2));
- dev->act_len=len;
- dev->status=stat;
- return stat;
-
-}
-
-/********************************************************************************
- * Some Debug Routines
- */
-
-#ifdef USB_RH_DEBUG
-
-static void usb_display_Req(unsigned short req)
-{
- USB_RH_PRINTF("- Root-Hub Request: ");
- switch (req) {
- case RH_GET_STATUS:
- USB_RH_PRINTF("Get Status ");
- break;
- case RH_GET_STATUS | RH_INTERFACE:
- USB_RH_PRINTF("Get Status Interface ");
- break;
- case RH_GET_STATUS | RH_ENDPOINT:
- USB_RH_PRINTF("Get Status Endpoint ");
- break;
- case RH_GET_STATUS | RH_CLASS:
- USB_RH_PRINTF("Get Status Class");
- break; /* hub power ** */
- case RH_GET_STATUS | RH_OTHER | RH_CLASS:
- USB_RH_PRINTF("Get Status Class Others");
- break;
- case RH_CLEAR_FEATURE | RH_ENDPOINT:
- USB_RH_PRINTF("Clear Feature Endpoint ");
- break;
- case RH_CLEAR_FEATURE | RH_CLASS:
- USB_RH_PRINTF("Clear Feature Class ");
- break;
- case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
- USB_RH_PRINTF("Clear Feature Other Class ");
- break;
- case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
- USB_RH_PRINTF("Set Feature Other Class ");
- break;
- case RH_SET_ADDRESS:
- USB_RH_PRINTF("Set Address ");
- break;
- case RH_GET_DESCRIPTOR:
- USB_RH_PRINTF("Get Descriptor ");
- break;
- case RH_GET_DESCRIPTOR | RH_CLASS:
- USB_RH_PRINTF("Get Descriptor Class ");
- break;
- case RH_GET_CONFIGURATION:
- USB_RH_PRINTF("Get Configuration ");
- break;
- case RH_SET_CONFIGURATION:
- USB_RH_PRINTF("Get Configuration ");
- break;
- default:
- USB_RH_PRINTF("****UNKNOWN**** 0x%04X ",req);
- }
- USB_RH_PRINTF("\n");
-
-}
-
-static void usb_display_wValue(unsigned short wValue,unsigned short wIndex)
-{
- switch (wValue) {
- case (RH_PORT_ENABLE):
- USB_RH_PRINTF("Root-Hub: Enable Port %d\n",wIndex);
- break;
- case (RH_PORT_SUSPEND):
- USB_RH_PRINTF("Root-Hub: Suspend Port %d\n",wIndex);
- break;
- case (RH_PORT_POWER):
- USB_RH_PRINTF("Root-Hub: Port Power %d\n",wIndex);
- break;
- case (RH_C_PORT_CONNECTION):
- USB_RH_PRINTF("Root-Hub: C Port Connection Port %d\n",wIndex);
- break;
- case (RH_C_PORT_ENABLE):
- USB_RH_PRINTF("Root-Hub: C Port Enable Port %d\n",wIndex);
- break;
- case (RH_C_PORT_SUSPEND):
- USB_RH_PRINTF("Root-Hub: C Port Suspend Port %d\n",wIndex);
- break;
- case (RH_C_PORT_OVER_CURRENT):
- USB_RH_PRINTF("Root-Hub: C Port Over Current Port %d\n",wIndex);
- break;
- case (RH_C_PORT_RESET):
- USB_RH_PRINTF("Root-Hub: C Port reset Port %d\n",wIndex);
- break;
- default:
- USB_RH_PRINTF("Root-Hub: unknown %x %x\n",wValue,wIndex);
- break;
- }
-}
-
-#endif
-
-
-#ifdef USB_UHCI_DEBUG
-
-static int usb_display_td(uhci_td_t *td)
-{
- unsigned long tmp;
- int valid;
-
- printf("TD at %p:\n",td);
-
- tmp=swap_32(td->link);
- printf("Link points to 0x%08lX, %s first, %s, %s\n",tmp&0xfffffff0,
- ((tmp & 0x4)==0x4) ? "Depth" : "Breath",
- ((tmp & 0x2)==0x2) ? "QH" : "TD",
- ((tmp & 0x1)==0x1) ? "invalid" : "valid");
- valid=((tmp & 0x1)==0x0);
- tmp=swap_32(td->status);
- printf(" %s %ld Errors %s %s %s \n %s %s %s %s %s %s\n Len 0x%lX\n",
- (((tmp>>29)&0x1)==0x1) ? "SPD Enable" : "SPD Disable",
- ((tmp>>28)&0x3),
- (((tmp>>26)&0x1)==0x1) ? "Low Speed" : "Full Speed",
- (((tmp>>25)&0x1)==0x1) ? "ISO " : "",
- (((tmp>>24)&0x1)==0x1) ? "IOC " : "",
- (((tmp>>23)&0x1)==0x1) ? "Active " : "Inactive ",
- (((tmp>>22)&0x1)==0x1) ? "Stalled" : "",
- (((tmp>>21)&0x1)==0x1) ? "Data Buffer Error" : "",
- (((tmp>>20)&0x1)==0x1) ? "Babble" : "",
- (((tmp>>19)&0x1)==0x1) ? "NAK" : "",
- (((tmp>>18)&0x1)==0x1) ? "Bitstuff Error" : "",
- (tmp&0x7ff));
- tmp=swap_32(td->info);
- printf(" MaxLen 0x%lX\n",((tmp>>21)&0x7FF));
- printf(" %s Endpoint 0x%lX Dev Addr 0x%lX PID 0x%lX\n",((tmp>>19)&0x1)==0x1 ? "TOGGLE" : "",
- ((tmp>>15)&0xF),((tmp>>8)&0x7F),tmp&0xFF);
- tmp=swap_32(td->buffer);
- printf(" Buffer 0x%08lX\n",tmp);
- printf(" DEV %08lX\n",td->dev_ptr);
- return valid;
-}
-
-
-void usb_show_td(int max)
-{
- int i;
- if(max>0) {
- for(i=0;i<max;i++) {
- usb_display_td(&tmp_td[i]);
- }
- }
- else {
- i=0;
- do {
- printf("tmp_td[%d]\n",i);
- }while(usb_display_td(&tmp_td[i++]));
- }
-}
-
-
-#endif
-#endif /* CONFIG_USB_UHCI */
-
-/* EOF */
diff --git a/board/MAI/AmigaOneG3SE/usb_uhci.h b/board/MAI/AmigaOneG3SE/usb_uhci.h
deleted file mode 100644
index 3387157320..0000000000
--- a/board/MAI/AmigaOneG3SE/usb_uhci.h
+++ /dev/null
@@ -1,192 +0,0 @@
-/*
- * (C) Copyright 2001
- * Denis Peter, MPL AG Switzerland
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- * Note: Part of this code has been derived from linux
- *
- */
-#ifndef _USB_UHCI_H_
-#define _USB_UHCI_H_
-
-#undef USB_UHCI_VEND_ID
-#define USB_UHCI_VEND_ID PCI_VENDOR_ID_VIA
-#undef USB_UHCI_DEV_ID
-#define USB_UHCI_DEV_ID 0x3038
-
-/* Command register */
-#define USBCMD 0
-#define USBCMD_RS 0x0001 /* Run/Stop */
-#define USBCMD_HCRESET 0x0002 /* Host reset */
-#define USBCMD_GRESET 0x0004 /* Global reset */
-#define USBCMD_EGSM 0x0008 /* Global Suspend Mode */
-#define USBCMD_FGR 0x0010 /* Force Global Resume */
-#define USBCMD_SWDBG 0x0020 /* SW Debug mode */
-#define USBCMD_CF 0x0040 /* Config Flag (sw only) */
-#define USBCMD_MAXP 0x0080 /* Max Packet (0 = 32, 1 = 64) */
-
-/* Status register */
-#define USBSTS 2
-#define USBSTS_USBINT 0x0001 /* Interrupt due to IOC */
-#define USBSTS_ERROR 0x0002 /* Interrupt due to error */
-#define USBSTS_RD 0x0004 /* Resume Detect */
-#define USBSTS_HSE 0x0008 /* Host System Error - basically PCI problems */
-#define USBSTS_HCPE 0x0010 /* Host Controller Process Error - the scripts were buggy */
-#define USBSTS_HCH 0x0020 /* HC Halted */
-
-/* Interrupt enable register */
-#define USBINTR 4
-#define USBINTR_TIMEOUT 0x0001 /* Timeout/CRC error enable */
-#define USBINTR_RESUME 0x0002 /* Resume interrupt enable */
-#define USBINTR_IOC 0x0004 /* Interrupt On Complete enable */
-#define USBINTR_SP 0x0008 /* Short packet interrupt enable */
-
-#define USBFRNUM 6
-#define USBFLBASEADD 8
-#define USBSOF 12
-
-/* USB port status and control registers */
-#define USBPORTSC1 16
-#define USBPORTSC2 18
-#define USBPORTSC_CCS 0x0001 /* Current Connect Status ("device present") */
-#define USBPORTSC_CSC 0x0002 /* Connect Status Change */
-#define USBPORTSC_PE 0x0004 /* Port Enable */
-#define USBPORTSC_PEC 0x0008 /* Port Enable Change */
-#define USBPORTSC_LS 0x0030 /* Line Status */
-#define USBPORTSC_RD 0x0040 /* Resume Detect */
-#define USBPORTSC_LSDA 0x0100 /* Low Speed Device Attached */
-#define USBPORTSC_PR 0x0200 /* Port Reset */
-#define USBPORTSC_SUSP 0x1000 /* Suspend */
-
-/* Legacy support register */
-#define USBLEGSUP 0xc0
-#define USBLEGSUP_DEFAULT 0x2000 /* only PIRQ enable set */
-
-#define UHCI_NULL_DATA_SIZE 0x7ff /* for UHCI controller TD */
-#define UHCI_PID 0xff /* PID MASK */
-
-#define UHCI_PTR_BITS 0x000F
-#define UHCI_PTR_TERM 0x0001
-#define UHCI_PTR_QH 0x0002
-#define UHCI_PTR_DEPTH 0x0004
-
-/* for TD <status>: */
-#define TD_CTRL_SPD (1 << 29) /* Short Packet Detect */
-#define TD_CTRL_C_ERR_MASK (3 << 27) /* Error Counter bits */
-#define TD_CTRL_LS (1 << 26) /* Low Speed Device */
-#define TD_CTRL_IOS (1 << 25) /* Isochronous Select */
-#define TD_CTRL_IOC (1 << 24) /* Interrupt on Complete */
-#define TD_CTRL_ACTIVE (1 << 23) /* TD Active */
-#define TD_CTRL_STALLED (1 << 22) /* TD Stalled */
-#define TD_CTRL_DBUFERR (1 << 21) /* Data Buffer Error */
-#define TD_CTRL_BABBLE (1 << 20) /* Babble Detected */
-#define TD_CTRL_NAK (1 << 19) /* NAK Received */
-#define TD_CTRL_CRCTIMEO (1 << 18) /* CRC/Time Out Error */
-#define TD_CTRL_BITSTUFF (1 << 17) /* Bit Stuff Error */
-#define TD_CTRL_ACTLEN_MASK 0x7ff /* actual length, encoded as n - 1 */
-
-#define TD_CTRL_ANY_ERROR (TD_CTRL_STALLED | TD_CTRL_DBUFERR | \
- TD_CTRL_BABBLE | TD_CTRL_CRCTIME | TD_CTRL_BITSTUFF)
-
-#define TD_TOKEN_TOGGLE 19
-
-/* ------------------------------------------------------------------------------------
- Virtual Root HUB
- ------------------------------------------------------------------------------------ */
-/* destination of request */
-#define RH_INTERFACE 0x01
-#define RH_ENDPOINT 0x02
-#define RH_OTHER 0x03
-
-#define RH_CLASS 0x20
-#define RH_VENDOR 0x40
-
-/* Requests: bRequest << 8 | bmRequestType */
-#define RH_GET_STATUS 0x0080
-#define RH_CLEAR_FEATURE 0x0100
-#define RH_SET_FEATURE 0x0300
-#define RH_SET_ADDRESS 0x0500
-#define RH_GET_DESCRIPTOR 0x0680
-#define RH_SET_DESCRIPTOR 0x0700
-#define RH_GET_CONFIGURATION 0x0880
-#define RH_SET_CONFIGURATION 0x0900
-#define RH_GET_STATE 0x0280
-#define RH_GET_INTERFACE 0x0A80
-#define RH_SET_INTERFACE 0x0B00
-#define RH_SYNC_FRAME 0x0C80
-/* Our Vendor Specific Request */
-#define RH_SET_EP 0x2000
-
-/* Hub port features */
-#define RH_PORT_CONNECTION 0x00
-#define RH_PORT_ENABLE 0x01
-#define RH_PORT_SUSPEND 0x02
-#define RH_PORT_OVER_CURRENT 0x03
-#define RH_PORT_RESET 0x04
-#define RH_PORT_POWER 0x08
-#define RH_PORT_LOW_SPEED 0x09
-#define RH_C_PORT_CONNECTION 0x10
-#define RH_C_PORT_ENABLE 0x11
-#define RH_C_PORT_SUSPEND 0x12
-#define RH_C_PORT_OVER_CURRENT 0x13
-#define RH_C_PORT_RESET 0x14
-
-/* Hub features */
-#define RH_C_HUB_LOCAL_POWER 0x00
-#define RH_C_HUB_OVER_CURRENT 0x01
-
-#define RH_DEVICE_REMOTE_WAKEUP 0x00
-#define RH_ENDPOINT_STALL 0x01
-
-/* Our Vendor Specific feature */
-#define RH_REMOVE_EP 0x00
-
-
-#define RH_ACK 0x01
-#define RH_REQ_ERR -1
-#define RH_NACK 0x00
-
-
-/* Transfer descriptor structure */
-typedef struct {
- unsigned long link; /* next td/qh (LE)*/
- unsigned long status; /* status of the td */
- unsigned long info; /* Max Lenght / Endpoint / device address and PID */
- unsigned long buffer; /* pointer to data buffer (LE) */
- unsigned long dev_ptr; /* pointer to the assigned device (BE) */
- unsigned long res[3]; /* reserved (TDs must be 8Byte aligned) */
-} uhci_td_t, *puhci_td_t;
-
-/* Queue Header structure */
-typedef struct {
- unsigned long head; /* Next QH (LE)*/
- unsigned long element; /* Queue element pointer (LE) */
- unsigned long res[5]; /* reserved */
- unsigned long dev_ptr; /* if 0 no tds have been assigned to this qh */
-} uhci_qh_t, *puhci_qh_t;
-
-struct virt_root_hub {
- int devnum; /* Address of Root Hub endpoint */
- int numports; /* number of ports */
- int c_p_r[8]; /* C_PORT_RESET */
-};
-
-
-#endif /* _USB_UHCI_H_ */
diff --git a/board/MAI/AmigaOneG3SE/via686.c b/board/MAI/AmigaOneG3SE/via686.c
deleted file mode 100644
index c797e47691..0000000000
--- a/board/MAI/AmigaOneG3SE/via686.c
+++ /dev/null
@@ -1,299 +0,0 @@
-/*
- * (C) Copyright 2002
- * Hyperion Entertainment, Hans-JoergF@hyperion-entertainment.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-#include <common.h>
-#include <pci.h>
-#include <ata.h>
-#include "memio.h"
-#include "articiaS.h"
-#include "via686.h"
-#include "i8259.h"
-
-#undef VIA_DEBUG
-
-#ifdef VIA_DEBUG
-#define PRINTF(fmt,args...) printf (fmt ,##args)
-#else
-#define PRINTF(fmt,args...)
-#endif
-
-
-/* Setup the ISA-to-PCI host bridge */
-void via_isa_init(pci_dev_t dev, struct pci_config_table *table)
-{
- char regval;
- if (PCI_FUNC(dev) == 0)
- {
- PRINTF("... PCI-to-ISA bridge, dev=0x%X\n", dev);
-
- /* Enable I/O Recovery time */
- pci_write_config_byte(dev, 0x40, 0x08);
-
- /* Enable ISA refresh */
- pci_write_config_byte(dev, 0x41, 0x41); /* was 01 */
-
- /* Enable ISA line buffer */
- pci_write_config_byte(dev, 0x45, 0x80);
-
- /* Gate INTR, and flush line buffer */
- pci_write_config_byte(dev, 0x46, 0x60);
-
- /* Enable EISA ports 4D0/4D1. Do we need this ? */
- pci_write_config_byte(dev, 0x47, 0xe6); /* was 20 */
-
- /* 512 K PCI Decode */
- pci_write_config_byte(dev, 0x48, 0x01);
-
- /* Wait for PGNT before grant to ISA Master/DMA */
- /* ports 0-FF to SDBus */
- /* IRQ 14 and 15 for ide 0/1 */
- pci_write_config_byte(dev, 0x4a, 0x04); /* Was c4 */
-
- /* Plug'n'Play */
- /* Parallel DRQ 3, Floppy DRQ 2 (default) */
- pci_write_config_byte(dev, 0x50, 0x0e);
-
- /* IRQ Routing for Floppy and Parallel port */
- /* IRQ 6 for floppy, IRQ 7 for parallel port */
- pci_write_config_byte(dev, 0x51, 0x76);
-
- /* IRQ Routing for serial ports (take IRQ 3 and 4) */
- pci_write_config_byte(dev, 0x52, 0x34);
-
- /* All IRQ's level triggered. */
- pci_write_config_byte(dev, 0x54, 0x00);
-
- /* PCI IRQ's all at IRQ 9 */
- pci_write_config_byte(dev, 0x55, 0x90);
- pci_write_config_byte(dev, 0x56, 0x99);
- pci_write_config_byte(dev, 0x57, 0x90);
-
- /* Enable Keyboard */
- pci_read_config_byte(dev, 0x5A, &regval);
- regval |= 0x01;
- pci_write_config_byte(dev, 0x5A, regval);
-
- pci_write_config_byte(dev, 0x80, 0);
- pci_write_config_byte(dev, 0x85, 0x01);
-
-/* pci_write_config_byte(dev, 0x77, 0x00); */
- }
-}
-
-/*
- * Initialize PNP irq routing
- */
-
-void via_init_irq_routing(uint8 irq_map[])
-{
- char *s;
- uint8 level_edge_bits = 0xf;
-
- /* Set irq routings */
- pci_write_cfg_byte(0, 7<<3, 0x55, irq_map[0]<<4);
- pci_write_cfg_byte(0, 7<<3, 0x56, irq_map[1] | irq_map[2]<<4);
- pci_write_cfg_byte(0, 7<<3, 0x57, irq_map[3]<<4);
-
- /*
- * Gather level/edge bits
- * Default is to assume level triggered
- */
-
- s = getenv("pci_irqa_select");
- if (s && strcmp(s, "level") == 0)
- level_edge_bits &= ~0x01;
-
- s = getenv("pci_irqb_select");
- if (s && strcmp(s, "level") == 0)
- level_edge_bits &= ~0x02;
-
- s = getenv("pci_irqc_select");
- if (s && strcmp(s, "level") == 0)
- level_edge_bits &= ~0x04;
-
- s = getenv("pci_irqd_select");
- if (s && strcmp(s, "level") == 0)
- level_edge_bits &= ~0x08;
-
- PRINTF("IRQ map\n");
- PRINTF("%d: %s\n", irq_map[0], level_edge_bits&0x1 ? "edge" : "level");
- PRINTF("%d: %s\n", irq_map[1], level_edge_bits&0x2 ? "edge" : "level");
- PRINTF("%d: %s\n", irq_map[2], level_edge_bits&0x4 ? "edge" : "level");
- PRINTF("%d: %s\n", irq_map[3], level_edge_bits&0x8 ? "edge" : "level");
- pci_write_cfg_byte(0, 7<<3, 0x54, level_edge_bits);
-
- PRINTF("%02x %02x %02x %02x\n", pci_read_cfg_byte(0, 7<<3, 0x54),
- pci_read_cfg_byte(0, 7<<3, 0x55), pci_read_cfg_byte(0, 7<<3, 0x56),
- pci_read_cfg_byte(0, 7<<3, 0x57));
-}
-
-
-/* Setup the IDE controller. This doesn't seem to work yet. I/O to an IDE controller port */
-/* always return the last character output on the serial port (!) */
-/* This function is called by the pnp-library when it encounters 0:7:1 */
-void via_cfgfunc_ide_init(struct pci_controller *host, pci_dev_t dev, struct pci_config_table *table)
-{
- PRINTF("... IDE controller, dev=0x%X\n", dev);
-
- /* Enable both IDE channels. */
- pci_write_config_byte(dev, 0x40, 0x03);
- /* udelay(10000); */
- /* udelay(10000); */
-
- /* Enable IO Space */
- pci_write_config_word(dev, 0x04, 0x03);
-
- /* Set to compatibility mode */
- pci_write_config_byte(dev, 0x09, 0x8A); /* WAS: 0x8f); */
-
- /* Set to legacy interrupt mode */
- pci_write_config_byte(dev, 0x3d, 0x00); /* WAS: 0x01); */
-
-}
-
-
-/* Set the base address of the floppy controller to 0x3F0 */
-void via_fdc_init(pci_dev_t dev)
-{
- unsigned char c;
- /* Enable Configuration mode */
- pci_read_config_byte(dev, 0x85, &c);
- c |= 0x02;
- pci_write_config_byte(dev, 0x85, c);
-
- /* Set floppy controller port to 0x3F0. */
- SIO_WRITE_CONFIG(0xE3, (0x3F<<2));
-
- /* Enable floppy controller */
- SIO_READ_CONFIG(0xE2, c);
- c |= 0x10;
- SIO_WRITE_CONFIG(0xE2, c);
-
- /* Switch of configuration mode */
- pci_read_config_byte(dev, 0x85, &c);
- c &= ~0x02;
- pci_write_config_byte(dev, 0x85, c);
-}
-
-/* Init function 0 of the via southbridge. Called by the pnp-library */
-void via_cfgfunc_via686(struct pci_controller *host, pci_dev_t dev, struct pci_config_table *table)
-{
- if (PCI_FUNC(dev) == 0)
- {
- /* FIXME: Try to generate a PCI reset */
- /* unsigned char c; */
- /* pci_read_config_byte(dev, 0x47, &c); */
- /* pci_write_config_byte(dev, 0x47, c | 0x01); */
-
- via_isa_init(dev, table);
- via_fdc_init(dev);
- }
-}
-
-__asm (" .globl via_calibrate_time_base \n"
- "via_calibrate_time_base: \n"
- " lis 9, 0xfe00 \n"
- " li 0, 0x00 \n"
- " mttbu 0 \n"
- " mttbl 0 \n"
- "ctb_loop: \n"
- " lbz 0, 0x61(9) \n"
- " eieio \n"
- " andi. 0, 0, 0x20 \n"
- " beq ctb_loop \n"
- "ctb_done: \n"
- " mftb 3 \n"
- " blr");
-
-extern unsigned long via_calibrate_time_base(void);
-
-void via_calibrate_bus_freq(void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- unsigned long tb;
-
- /* This is 20 microseconds */
- #define CALIBRATE_TIME 28636
-
-
- /* Enable the timer (and disable speaker) */
- unsigned char c;
- c = in_byte(0x61);
- out_byte(0x61, ((c & ~0x02) | 0x01));
-
- /* Set timer 2 to low/high writing */
- out_byte(0x43, 0xb0);
- out_byte(0x42, CALIBRATE_TIME & 0xff);
- out_byte(0x42, CALIBRATE_TIME >>8);
-
- /* Read the time base */
- tb = via_calibrate_time_base();
-
- if (tb >= 700000)
- gd->bus_clk = 133333333;
- else
- gd->bus_clk = 100000000;
-
-}
-
-
-void ide_led(uchar led, uchar status)
-{
-/* unsigned char c = in_byte(0x92); */
-
-/* if (!status) */
-/* out_byte(0x92, c | 0xC0); */
-/* else */
-/* out_byte(0x92, c & ~0xC0); */
-}
-
-
-void via_init_afterscan(void)
-{
- /* Modify IDE controller setup */
- pci_write_cfg_byte(0, 7<<3|1, PCI_LATENCY_TIMER, 0x20);
- pci_write_cfg_byte(0, 7<<3|1, PCI_COMMAND, PCI_COMMAND_IO|PCI_COMMAND_MEMORY|PCI_COMMAND_MASTER);
- pci_write_cfg_byte(0, 7<<3|1, PCI_INTERRUPT_LINE, 0xff);
- pci_write_cfg_byte(0, 7<<3|1, 0x40, 0x0b); /* FIXME: Might depend on drives connected */
- pci_write_cfg_byte(0, 7<<3|1, 0x41, 0x42); /* FIXME: Might depend on drives connected */
- pci_write_cfg_byte(0, 7<<3|1, 0x43, 0x05);
- pci_write_cfg_byte(0, 7<<3|1, 0x44, 0x18);
- pci_write_cfg_byte(0, 7<<3|1, 0x45, 0x10);
- pci_write_cfg_byte(0, 7<<3|1, 0x4e, 0x22); /* FIXME: Not documented, but set in PC bios */
- pci_write_cfg_byte(0, 7<<3|1, 0x4f, 0x20); /* FIXME: Not documented */
-
- /* Modify some values in the USB controller */
- pci_write_cfg_byte(0, 7<<3|2, 0x05, 0x17);
- pci_write_cfg_byte(0, 7<<3|2, 0x06, 0x01);
- pci_write_cfg_byte(0, 7<<3|2, 0x41, 0x12);
- pci_write_cfg_byte(0, 7<<3|2, 0x42, 0x03);
- pci_write_cfg_byte(0, 7<<3|2, PCI_LATENCY_TIMER, 0x40);
-
- pci_write_cfg_byte(0, 7<<3|3, 0x05, 0x17);
- pci_write_cfg_byte(0, 7<<3|3, 0x06, 0x01);
- pci_write_cfg_byte(0, 7<<3|3, 0x41, 0x12);
- pci_write_cfg_byte(0, 7<<3|3, 0x42, 0x03);
- pci_write_cfg_byte(0, 7<<3|3, PCI_LATENCY_TIMER, 0x40);
-
-
-}
diff --git a/board/MAI/AmigaOneG3SE/via686.h b/board/MAI/AmigaOneG3SE/via686.h
deleted file mode 100644
index 2a06a05e16..0000000000
--- a/board/MAI/AmigaOneG3SE/via686.h
+++ /dev/null
@@ -1,29 +0,0 @@
-#ifndef VIA686_H_
-#define VIA686_H_
-
-
-#define CMOS_ADDR 0x70
-#define CMOS_DATA 0x71
-
-#define I8259_MASTER_CONTROL 0x20
-#define I8259_MASTER_MASK 0x21
-
-#define I8259_SLAVE_CONTROL 0xA0
-#define I8259_SLAVE_MASK 0xA1
-
-#define SIO_CONFIG_ADDR 0x3F0
-#define SIO_CONFIG_DATA 0x3F1
-
-#define SIO_WRITE_CONFIG(addr, byte) \
- out_byte(SIO_CONFIG_ADDR, addr); \
- out_byte(SIO_CONFIG_DATA, byte);
-
-#define SIO_READ_CONFIG(addr, byte) \
- out_byte(SIO_CONFIG_ADDR, addr); \
- byte = in_byte(SIO_CONFIG_DATA);
-
-void via_init(void);
-
-void via_calibrate_bus_freq(void);
-
-#endif
diff --git a/board/MAI/AmigaOneG3SE/video.c b/board/MAI/AmigaOneG3SE/video.c
deleted file mode 100644
index 36e3c624a9..0000000000
--- a/board/MAI/AmigaOneG3SE/video.c
+++ /dev/null
@@ -1,539 +0,0 @@
-/*
- * (C) Copyright 2002
- * Hyperion Entertainment, Hans-JoergF@hyperion-entertainment.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <devices.h>
-#include "memio.h"
-#include <part.h>
-
-unsigned char *cursor_position;
-unsigned int cursor_row;
-unsigned int cursor_col;
-
-unsigned char current_attr;
-
-unsigned int video_numrows = 25;
-unsigned int video_numcols = 80;
-unsigned int video_scrolls = 0;
-
-#define VIDEO_BASE (unsigned char *)0xFD0B8000
-#define VIDEO_ROWS video_numrows
-#define VIDEO_COLS video_numcols
-#define VIDEO_PITCH (2 * video_numcols)
-#define VIDEO_SIZE (video_numrows * video_numcols * 2)
-#define VIDEO_NAME "vga"
-
-void video_test(void);
-void video_putc(char ch);
-void video_puts(char *string);
-void video_scroll(int rows);
-void video_banner(void);
-int video_init(void);
-int video_start(void);
-int video_rows(void);
-int video_cols(void);
-
-char *prompt_string = "=>";
-
-void video_set_color(unsigned char attr)
-{
- unsigned char *fb = (unsigned char *)VIDEO_BASE;
- int i;
-
- current_attr = video_get_attr();
-
- for (i=0; i<VIDEO_SIZE; i+=2)
- {
- *(fb+i+1) = current_attr;
- }
-}
-
-unsigned char video_get_attr(void)
-{
- char *s;
- unsigned char attr;
-
- attr = 0x0f;
-
- s = getenv("vga_fg_color");
- if (s)
- {
- attr = atoi(s);
- }
-
- s = getenv("vga_bg_color");
- if (s)
- {
- attr |= atoi(s)<<4;
- }
-
- return attr;
-}
-
-int video_inited = 0;
-
-int drv_video_init(void)
-{
- int error, devices = 1 ;
- device_t vgadev ;
- if (video_inited) return 1;
- video_inited = 1;
- video_init();
- memset (&vgadev, 0, sizeof(vgadev));
-
- strcpy(vgadev.name, VIDEO_NAME);
- vgadev.flags = DEV_FLAGS_OUTPUT | DEV_FLAGS_SYSTEM;
- vgadev.putc = video_putc;
- vgadev.puts = video_puts;
- vgadev.getc = NULL;
- vgadev.tstc = NULL;
- vgadev.start = video_start;
-
- error = device_register (&vgadev);
-
- if (error == 0)
- {
- char *s = getenv("stdout");
- if (s && strcmp(s, VIDEO_NAME)==0)
- {
- if (overwrite_console()) return 1;
- error = console_assign(stdout, VIDEO_NAME);
- if (error == 0) return 1;
- else return error;
- }
- return 1;
- }
-
- return error;
-}
-
-int video_init(void)
-{
- cursor_position = VIDEO_BASE; /* Color text display base */
- cursor_row = 0;
- cursor_col = 0;
- current_attr = video_get_attr(); /* Currently selected value for attribute. */
-/* video_test(); */
- video_set_color(current_attr);
-
- return 0;
-}
-
-void video_set_cursor(int line, int column)
-{
- unsigned short offset = line*video_numcols + column;
- cursor_position = VIDEO_BASE + line*VIDEO_PITCH + column*2;
- out_byte(0x3D4, 0x0E);
- out_byte(0x3D5, offset/256);
- out_byte(0x3D4, 0x0F);
- out_byte(0x3D5, offset%256);
-}
-
-void video_write_char(int character)
-{
- *cursor_position = character;
- *(cursor_position+1) = current_attr;
-}
-
-void video_test(void)
-{
-
-}
-
-void video_putc(char ch)
-{
- switch(ch)
- {
- case '\n':
- cursor_col = 0;
- cursor_row += 1;
- break;
- case '\r':
- cursor_col = 0;
- break;
- case '\b':
- if (cursor_col) cursor_col--;
- else return;
- break;
- case '\t':
- cursor_col = (cursor_col/8+1)*8;
- break;
- default:
- video_write_char(ch);
- cursor_col++;
- if (cursor_col > VIDEO_COLS-1)
- {
- cursor_row++;
- cursor_col=0;
- }
- }
-
- if (cursor_row > VIDEO_ROWS-1)
- video_scroll(1);
- video_set_cursor(cursor_row, cursor_col);
-}
-
-void video_scroll(int rows)
-{
- unsigned short clear = ((unsigned short)current_attr) | (' '<<8);
- unsigned short* addr16 = &((unsigned short *)VIDEO_BASE)[(VIDEO_ROWS-rows)*VIDEO_COLS];
- int i;
- char *s;
-
- s = getenv("vga_askscroll");
- video_scrolls += rows;
-
- if (video_scrolls >= video_numrows)
- {
- if (s && strcmp(s, "yes"))
- {
- while (-1 == tstc());
- }
-
- video_scrolls = 0;
- }
-
-
- memcpy(VIDEO_BASE, VIDEO_BASE+rows*(VIDEO_COLS*2), (VIDEO_ROWS-rows)*(VIDEO_COLS*2));
- for (i = 0 ; i < rows * VIDEO_COLS ; i++)
- addr16[i] = clear;
- cursor_row-=rows;
- cursor_col=0;
-}
-
-void video_puts(char *string)
-{
- while (*string)
- {
- video_putc(*string);
- string++;
- }
-}
-
-int video_start(void)
-{
- return 0;
-}
-
-unsigned char video_single_box[] =
-{
- 218, 196, 191,
- 179, 179,
- 192, 196, 217
-};
-
-unsigned char video_double_box[] =
-{
- 201, 205, 187,
- 186, 186,
- 200, 205, 188
-};
-
-unsigned char video_single_title[] =
-{
- 195, 196, 180, 180, 195
-};
-
-unsigned char video_double_title[] =
-{
- 204, 205, 185, 181, 198
-};
-
-#define SINGLE_BOX 0
-#define DOUBLE_BOX 1
-
-unsigned char *video_addr(int x, int y)
-{
- return VIDEO_BASE + 2*(VIDEO_COLS*y) + 2*x;
-}
-
-void video_bios_print_string(char *s, int x, int y, int attr, int count)
-{
- int cattr = current_attr;
- if (attr != -1) current_attr = attr;
- video_set_cursor(x,y);
- while (count)
- {
- char c = *s++;
- if (attr == -1) current_attr = *s++;
- video_putc(c);
- count--;
- }
-}
-
-void video_draw_box(int style, int attr, char *title, int separate, int x, int y, int w, int h)
-{
- unsigned char *fb, *fb2;
- unsigned char *st = (style == SINGLE_BOX)?video_single_box : video_double_box;
- unsigned char *ti = (style == SINGLE_BOX)?video_single_title : video_double_title;
- int i;
-
- fb = video_addr(x,y);
- *(fb) = st[0];
- *(fb+1) = attr;
- fb += 2;
-
- fb2 = video_addr(x,y+h-1);
- *(fb2) = st[5];
- *(fb2+1) = attr;
- fb2 += 2;
-
- for (i=0; i<w-2;i++)
- {
- *fb = st[1];
- fb++;
- *fb = attr;
- fb++;
-
- *fb2 = st[6];
- fb2++;
- *fb2 = attr;
- fb2++;
-
- }
- *fb = st[2];
- *(fb+1) = attr;
-
- *fb2 = st[7];
- *(fb2+1) = attr;
-
- fb = video_addr(x, y+1);
- fb2 = video_addr(x+w-1, y+1);
- for (i=0; i<h-2; i++)
- {
- *fb = st[3];
- *(fb+1) = attr; fb += 2*VIDEO_COLS;
-
- *fb2 = st[4];
- *(fb2+1) = attr; fb2 += 2*VIDEO_COLS;
- }
-
- /* Draw title */
- if (title)
- {
- if (separate == 0)
- {
- fb = video_addr(x+1, y);
- *fb = ti[3];
- fb += 2;
- *fb = ' ';
- fb += 2;
- while (*title)
- {
- *fb = *title;
- fb ++;
- *fb = attr;
- fb++; title++;
- }
- *fb = ' ';
- fb += 2;
- *fb = ti[4];
- }
- else
- {
- fb = video_addr(x, y+2);
- *fb = ti[0];
- fb += 2;
- for (i=0; i<w-2; i++)
- {
- *fb = ti[1];
- *(fb+1) = attr;
- fb += 2;
- }
- *fb = ti[2];
- *(fb+1) = attr;
- fb = video_addr(x+1, y+1);
- for (i=0; i<w-2; i++)
- {
- *fb = ' ';
- *(fb+1) = attr;
- fb += 2;
- }
- fb = video_addr(x+2, y+1);
-
- while (*title)
- {
- *fb = *title;
- *(fb+1) = attr;
- fb += 2;
- title++;
- }
- }
- }
-
-}
-
-void video_draw_text(int x, int y, int attr, char *text)
-{
- unsigned char *fb = video_addr(x,y);
- while (*text)
- {
- *fb++ = *text++;
- *fb++ = attr;
- }
-}
-
-void video_save_rect(int x, int y, int w, int h, void *save_area, int clearchar, int clearattr)
-{
- unsigned char *save = (unsigned char *)save_area;
- unsigned char *fb = video_addr(x,y);
- int i,j;
- for (i=0; i<h; i++)
- {
- unsigned char *fbb = fb;
- for (j=0; j<w; j++)
- {
- *save ++ = *fb;
- if (clearchar > 0) *fb = clearchar;
- fb ++;
- *save ++ = *fb;
- if (clearattr > 0) *fb = clearattr;
- }
- fb = fbb + 2*VIDEO_COLS;
- }
-}
-
-void video_restore_rect(int x, int y, int w, int h, void *save_area)
-{
- unsigned char *save = (unsigned char *)save_area;
- unsigned char *fb = video_addr(x,y);
- int i,j;
- for (i=0; i<h; i++)
- {
- unsigned char *fbb = fb;
- for (j=0; j<w; j++)
- {
- *fb ++ = *save ++;
- *fb ++ = *save ++;
- }
- fb = fbb + 2*VIDEO_COLS;
- }
-
-}
-
-int video_rows(void)
-{
- return VIDEO_ROWS;
-}
-
-int video_cols(void)
-{
- return VIDEO_COLS;
-}
-
-void video_size(int cols, int rows)
-{
- video_numrows = rows;
- video_numcols = cols;
-}
-
-void video_clear(void)
-{
- unsigned short *fbb = (unsigned short *)0xFD0B8000;
- int i,j;
- unsigned short val = 0x2000 | current_attr;
-
- for (i=0; i<video_rows(); i++)
- {
- for (j=0; j<video_cols(); j++)
- {
- *fbb++ = val;
- }
- }
- video_set_cursor(0,0);
- cursor_row = 0;
- cursor_col = 0;
-}
-
-#ifdef EASTEREGG
-int video_easteregg_active = 0;
-
-void video_easteregg(void)
-{
- video_easteregg_active = 1;
-}
-#endif
-
-extern block_dev_desc_t * ide_get_dev(int dev);
-extern char version_string[];
-
-void video_banner(void)
-{
- block_dev_desc_t *ide;
- DECLARE_GLOBAL_DATA_PTR;
- int i;
- char *s;
- int maxdev;
-
-
- if (video_inited == 0) return;
-#ifdef EASTEREGG
- if (video_easteregg_active)
- {
- prompt_string="";
- video_clear();
- printf("\n");
- printf(" **** COMMODORE 64 BASIC X2 ****\n\n");
- printf(" 64K RAM SYSTEM 38911 BASIC BYTES FREE\n\n");
- printf("READY\n");
- }
- else
- {
-#endif
- s = getenv("ide_maxbus");
- if (s)
- maxdev = atoi(s) * 2;
- else
- maxdev = 4;
-
- s = getenv("stdout");
- if (s && strcmp(s, "serial") == 0)
- return;
-
- video_clear();
- printf("%s\n\nCPU: ", version_string);
- checkcpu();
- printf("DRAM: %ld MB\n", gd->bd->bi_memsize/(1024*1024));
- printf("FSB: %ld MHz\n", gd->bd->bi_busfreq/1000000);
-
- printf("\n---- Disk summary ----\n");
- for (i = 0; i < maxdev; i++)
- {
- ide = ide_get_dev(i);
- printf("Device %d: ", i);
- dev_print(ide);
- }
-
-/*
- video_draw_box(SINGLE_BOX, 0x0F, "Test 1", 0, 0,18, 72, 4);
- video_draw_box(DOUBLE_BOX, 0x0F, "Test 2", 1, 4,10, 50, 6);
- video_draw_box(DOUBLE_BOX, 0x0F, "Test 3", 0, 40, 3, 20, 5);
-
- video_draw_text(1, 4, 0x2F, "Highlighted options");
- video_draw_text(1, 5, 0x0F, "Non-selected option");
- video_draw_text(1, 6, 0x07, "disabled option");
-*/
-#ifdef EASTEREGG
- }
-#endif
-}
diff --git a/board/MAI/bios_emulator/bios.c b/board/MAI/bios_emulator/bios.c
deleted file mode 100644
index d51eb64692..0000000000
--- a/board/MAI/bios_emulator/bios.c
+++ /dev/null
@@ -1,335 +0,0 @@
-/*
- * Mostly done after the Scitech Bios emulation
- * Written by Hans-Jörg Frieden
- * Hyperion Entertainment
- */
-#include "x86emu.h"
-#include "glue.h"
-
-#undef DEBUG
-#ifdef DEBUG
-#define PRINTF(fmt, args...) printf(fmt, ## args)
-#else
-#define PRINTF(fmt, args...)
-#endif
-
-#define BIOS_SEG 0xFFF0
-#define PCIBIOS_SUCCESSFUL 0
-#define PCIBIOS_DEVICE_NOT_FOUND 0x86
-
-typedef unsigned char UBYTE;
-typedef unsigned short UWORD;
-typedef unsigned long ULONG;
-
-typedef char BYTE;
-typedef short WORT;
-typedef long LONG;
-
-static inline UBYTE read_byte(volatile UBYTE* from)
-{
- int x;
- asm volatile ("lbz %0,%1\n eieio" : "=r" (x) : "m" (*from));
- return (UBYTE)x;
-}
-
-static inline void write_byte(volatile UBYTE *to, int x)
-{
- asm volatile ("stb %1,%0\n eieio" : "=m" (*to) : "r" (x));
-}
-
-static inline UWORD read_word_little(volatile UWORD *from)
-{
- int x;
- asm volatile ("lhbrx %0,0,%1\n eieio" : "=r" (x) : "r" (from), "m" (*from));
- return (UWORD)x;
-}
-
-static inline UWORD read_word_big(volatile UWORD *from)
-{
- int x;
- asm volatile ("lhz %0,%1\n eieio" : "=r" (x) : "m" (*from));
- return (UWORD)x;
-}
-
-static inline void write_word_little(volatile UWORD *to, int x)
-{
- asm volatile ("sthbrx %1,0,%2\n eieio" : "=m" (*to) : "r" (x), "r" (to));
-}
-
-static inline void write_word_big(volatile UWORD *to, int x)
-{
- asm volatile ("sth %1,%0\n eieio" : "=m" (*to) : "r" (x));
-}
-
-static inline ULONG read_long_little(volatile ULONG *from)
-{
- unsigned long x;
- asm volatile ("lwbrx %0,0,%1\n eieio" : "=r" (x) : "r" (from), "m"(*from));
- return (ULONG)x;
-}
-
-static inline ULONG read_long_big(volatile ULONG *from)
-{
- unsigned long x;
- asm volatile ("lwz %0,%1\n eieio" : "=r" (x) : "m" (*from));
- return (ULONG)x;
-}
-
-static inline void write_long_little(volatile ULONG *to, ULONG x)
-{
- asm volatile ("stwbrx %1,0,%2\n eieio" : "=m" (*to) : "r" (x), "r" (to));
-}
-
-static inline void write_long_big(volatile ULONG *to, ULONG x)
-{
- asm volatile ("stw %1,%0\n eieio" : "=m" (*to) : "r" (x));
-}
-
-#define port_to_mem(from) (0xFE000000|(from))
-#define in_byte(from) read_byte( (UBYTE *)port_to_mem(from))
-#define in_word(from) read_word_little((UWORD *)port_to_mem(from))
-#define in_long(from) read_long_little((ULONG *)port_to_mem(from))
-#define out_byte(to, val) write_byte((UBYTE *)port_to_mem(to), val)
-#define out_word(to, val) write_word_little((UWORD *)port_to_mem(to), val)
-#define out_long(to, val) write_long_little((ULONG *)port_to_mem(to), val)
-
-static void X86API undefined_intr(int intno)
-{
- extern u16 A1_rdw(u32 addr);
- if (A1_rdw(intno * 4 + 2) == BIOS_SEG)
- {
- PRINTF("Undefined interrupt %xh called AX = %xh, BX = %xh, CX = %xh, DX = %xh\n",
- intno, M.x86.R_AX, M.x86.R_BX, M.x86.R_CX, M.x86.R_DX);
- X86EMU_halt_sys();
- }
- else
- {
- PRINTF("Calling interrupt %xh, AL=%xh, AH=%xh\n", intno, M.x86.R_AL, M.x86.R_AH);
- X86EMU_prepareForInt(intno);
- }
-}
-
-static void X86API int42(int intno);
-static void X86API int15(int intno);
-
-static void X86API int10(int intno)
-{
- if (A1_rdw(intno*4+2) == BIOS_SEG)
- int42(intno);
- else
- {
- PRINTF("int10: branching to %04X:%04X, AL=%xh, AH=%xh\n", A1_rdw(intno*4+2), A1_rdw(intno*4),
- M.x86.R_AL, M.x86.R_AH);
- X86EMU_prepareForInt(intno);
- }
-}
-
-static void X86API int1A(int intno)
-{
- int device;
-
- switch(M.x86.R_AX)
- {
- case 0xB101: /* PCI Bios Present? */
- M.x86.R_AL = 0x00;
- M.x86.R_EDX = 0x20494350;
- M.x86.R_BX = 0x0210;
- M.x86.R_CL = 3;
- CLEAR_FLAG(F_CF);
- break;
- case 0xB102: /* Find device */
- device = mypci_find_device(M.x86.R_DX, M.x86.R_CX, M.x86.R_SI);
- if (device != -1)
- {
- M.x86.R_AH = PCIBIOS_SUCCESSFUL;
- M.x86.R_BH = mypci_bus(device);
- M.x86.R_BL = mypci_devfn(device);
- }
- else
- {
- M.x86.R_AH = PCIBIOS_DEVICE_NOT_FOUND;
- }
- CONDITIONAL_SET_FLAG((M.x86.R_AH != PCIBIOS_SUCCESSFUL), F_CF);
- break;
- case 0xB103: /* Find PCI class code */
- M.x86.R_AH = PCIBIOS_DEVICE_NOT_FOUND;
- /*printf("Find by class not yet implmented"); */
- CONDITIONAL_SET_FLAG((M.x86.R_AH != PCIBIOS_SUCCESSFUL), F_CF);
- break;
- case 0xB108: /* read config byte */
- M.x86.R_CL = mypci_read_cfg_byte(M.x86.R_BH, M.x86.R_BL, M.x86.R_DI);
- M.x86.R_AH = PCIBIOS_SUCCESSFUL;
- CONDITIONAL_SET_FLAG((M.x86.R_AH != PCIBIOS_SUCCESSFUL), F_CF);
- /*printf("read_config_byte %x,%x,%x -> %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI, */
- /* M.x86.R_CL); */
- break;
- case 0xB109: /* read config word */
- M.x86.R_CX = mypci_read_cfg_word(M.x86.R_BH, M.x86.R_BL, M.x86.R_DI);
- M.x86.R_AH = PCIBIOS_SUCCESSFUL;
- CONDITIONAL_SET_FLAG((M.x86.R_AH != PCIBIOS_SUCCESSFUL), F_CF);
- /*printf("read_config_word %x,%x,%x -> %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI, */
- /* M.x86.R_CX); */
- break;
- case 0xB10A: /* read config dword */
- M.x86.R_ECX = mypci_read_cfg_long(M.x86.R_BH, M.x86.R_BL, M.x86.R_DI);
- M.x86.R_AH = PCIBIOS_SUCCESSFUL;
- CONDITIONAL_SET_FLAG((M.x86.R_AH != PCIBIOS_SUCCESSFUL), F_CF);
- /*printf("read_config_long %x,%x,%x -> %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI, */
- /* M.x86.R_ECX); */
- break;
- case 0xB10B: /* write config byte */
- mypci_write_cfg_byte(M.x86.R_BH, M.x86.R_BL, M.x86.R_DI, M.x86.R_CL);
- M.x86.R_AH = PCIBIOS_SUCCESSFUL;
- CONDITIONAL_SET_FLAG((M.x86.R_AH != PCIBIOS_SUCCESSFUL), F_CF);
- /*printf("write_config_byte %x,%x,%x <- %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI, */
- /* M.x86.R_CL); */
- break;
- case 0xB10C: /* write config word */
- mypci_write_cfg_word(M.x86.R_BH, M.x86.R_BL, M.x86.R_DI, M.x86.R_CX);
- M.x86.R_AH = PCIBIOS_SUCCESSFUL;
- CONDITIONAL_SET_FLAG((M.x86.R_AH != PCIBIOS_SUCCESSFUL), F_CF);
- /*printf("write_config_word %x,%x,%x <- %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI, */
- /* M.x86.R_CX); */
- break;
- case 0xB10D: /* write config dword */
- mypci_write_cfg_long(M.x86.R_BH, M.x86.R_BL, M.x86.R_DI, M.x86.R_ECX);
- M.x86.R_AH = PCIBIOS_SUCCESSFUL;
- CONDITIONAL_SET_FLAG((M.x86.R_AH != PCIBIOS_SUCCESSFUL), F_CF);
- /*printf("write_config_long %x,%x,%x <- %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI, */
- /* M.x86.R_ECX); */
- break;
- default:
- PRINTF("BIOS int %xh: Unknown function AX=%04xh\n", intno, M.x86.R_AX);
-
- }
-}
-
-void bios_init(void)
-{
- int i;
- X86EMU_intrFuncs bios_intr_tab[256];
-
- for (i=0; i<256; i++)
- {
- write_long_little(M.mem_base+i*4, BIOS_SEG<<16);
- bios_intr_tab[i] = undefined_intr;
- }
-
- bios_intr_tab[0x10] = int10;
- bios_intr_tab[0x1A] = int1A;
- bios_intr_tab[0x42] = int42;
- bios_intr_tab[0x15] = int15;
-
- bios_intr_tab[0x6D] = int42;
-
- X86EMU_setupIntrFuncs(bios_intr_tab);
- video_init();
-}
-
-unsigned char setup_40x25[] =
-{
- 0x38, 0x28, 0x2d, 0x0a, 0x1f, 6, 0x19,
- 0x1c, 2, 7, 6, 7, 0, 0, 0, 0
-};
-
-unsigned char setup_80x25[] =
-{
- 0x71, 0x50, 0x5a, 0x0a, 0x1f, 6, 0x19,
- 0x1c, 2, 7, 6, 7, 0, 0, 0, 0
-};
-
-unsigned char setup_graphics[] =
-{
- 0x38, 0x28, 0x20, 0x0a, 0x7f, 6, 0x64,
- 0x70, 2, 1, 6, 7, 0, 0, 0, 0
-};
-
-unsigned char setup_bw[] =
-{
- 0x61, 0x50, 0x52, 0x0f, 0x19, 6, 0x19,
- 0x19, 2, 0x0d, 0x0b, 0x0c, 0, 0, 0, 0
-};
-
-unsigned char * setup_modes[] =
-{
- setup_40x25, /* mode 0: 40x25 bw text */
- setup_40x25, /* mode 1: 40x25 col text */
- setup_80x25, /* mode 2: 80x25 bw text */
- setup_80x25, /* mode 3: 80x25 col text */
- setup_graphics, /* mode 4: 320x200 col graphics */
- setup_graphics, /* mode 5: 320x200 bw graphics */
- setup_graphics, /* mode 6: 640x200 bw graphics */
- setup_bw /* mode 7: 80x25 mono text */
-};
-
-unsigned int setup_cols[] =
-{
- 40, 40, 80, 80, 40, 40, 80, 80
-};
-
-unsigned char setup_modesets[] =
-{
- 0x2C, 0x28, 0x2D, 0x29, 0x2A, 0x2E, 0x1E, 0x29
-};
-
-unsigned int setup_bufsize[] =
-{
- 2048, 2048, 4096, 2096, 16384, 16384, 16384, 4096
-};
-
-void bios_set_mode(int mode)
-{
- int i;
- unsigned char mode_set = setup_modesets[mode]; /* Control register value */
- unsigned char *setup_regs = setup_modes[mode]; /* Register 3D4 Array */
-
- /* Switch video off */
- out_byte(0x3D8, mode_set & 0x37);
-
- /* Set up parameters at 3D4h */
- for (i=0; i<16; i++)
- {
- out_byte(0x3D4, (unsigned char)i);
- out_byte(0x3D5, *setup_regs);
- setup_regs++;
- }
-
- /* Enable video */
- out_byte(0x3D8, mode_set);
-
- /* Set overscan */
- if (mode == 6) out_byte(0x3D9, 0x3F);
- else out_byte(0x3D9, 0x30);
-}
-
-static void bios_print_string(void)
-{
- extern void video_bios_print_string(char *string, int x, int y, int attr, int count);
- char *s = (char *)(M.x86.R_ES<<4) + M.x86.R_BP;
- int attr;
- if (M.x86.R_AL & 0x02) attr = - 1;
- else attr = M.x86.R_BL;
- video_bios_print_string(s, M.x86.R_DH, M.x86.R_DL, attr, M.x86.R_CX);
-}
-
-static void X86API int42(int intno)
-{
- switch (M.x86.R_AH)
- {
- case 0x00:
- bios_set_mode(M.x86.R_AL);
- break;
- case 0x13:
- bios_print_string();
- break;
- default:
- PRINTF("Warning: VIDEO BIOS interrupt %xh unimplemented function %xh, AL = %xh\n",
- intno, M.x86.R_AH, M.x86.R_AL);
- }
-}
-
-static void X86API int15(int intno)
-{
- PRINTF("Called interrupt 15h: AX = %xh, BX = %xh, CX = %xh, DX = %xh\n",
- M.x86.R_AX, M.x86.R_BX, M.x86.R_CX, M.x86.R_DX);
-}
diff --git a/board/MAI/bios_emulator/glue.c b/board/MAI/bios_emulator/glue.c
deleted file mode 100644
index b380f0dfe8..0000000000
--- a/board/MAI/bios_emulator/glue.c
+++ /dev/null
@@ -1,515 +0,0 @@
-#include <common.h>
-#include <pci.h>
-#include <74xx_7xx.h>
-
-
-#ifdef DEBUG
-#undef DEBUG
-#endif
-
-#ifdef DEBUG
-#define PRINTF(format, args...) _printf(format , ## args)
-#else
-#define PRINTF(format, argc...)
-#endif
-
-static pci_dev_t to_pci(int bus, int devfn)
-{
- return PCI_BDF(bus, (devfn>>3), devfn&3);
-}
-
-int mypci_find_device(int vendor, int product, int index)
-{
- return pci_find_device(vendor, product, index);
-}
-
-int mypci_bus(int device)
-{
- return PCI_BUS(device);
-}
-
-int mypci_devfn(int device)
-{
- return (PCI_DEV(device)<<3) | PCI_FUNC(device);
-}
-
-
-#define mypci_read_func(type, size) \
-type mypci_read_cfg_##size##(int bus, int devfn, int offset) \
-{ \
- type c; \
- pci_read_config_##size##(to_pci(bus, devfn), offset, &c); \
- return c; \
-}
-
-#define mypci_write_func(type, size) \
-void mypci_write_cfg_##size##(int bus, int devfn, int offset, int value) \
-{ \
- pci_write_config_##size##(to_pci(bus, devfn), offset, value); \
-}
-
-mypci_read_func(u8,byte);
-mypci_read_func(u16,word);
-
-mypci_write_func(u8,byte);
-mypci_write_func(u16,word);
-
-u32 mypci_read_cfg_long(int bus, int devfn, int offset)
-{
- u32 c;
- pci_read_config_dword(to_pci(bus, devfn), offset, &c);
- return c;
-}
-
-void mypci_write_cfg_long(int bus, int devfn, int offset, int value)
-{
- pci_write_config_dword(to_pci(bus, devfn), offset, value);
-}
-
-void _printf(const char *fmt, ...)
-{
- va_list args;
- char buf[CFG_PBSIZE];
-
- va_start(args, fmt);
- (void)vsprintf(buf, fmt, args);
- va_end(args);
-
- printf(buf);
-}
-
-char *_getenv(char *name)
-{
- return getenv(name);
-}
-
-unsigned long get_bar_size(pci_dev_t dev, int offset)
-{
- u32 bar_back, bar_value;
-
- /* Save old BAR value */
- pci_read_config_dword(dev, offset, &bar_back);
-
- /* Write all 1's. */
- pci_write_config_dword(dev, offset, ~0);
-
- /* Now read back the relevant bits */
- pci_read_config_dword(dev, offset, &bar_value);
-
- /* Restore original value */
- pci_write_config_dword(dev, offset, bar_back);
-
- if (bar_value == 0) return 0xFFFFFFFF; /* This BAR is disabled */
-
- if ((bar_value & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_MEMORY)
- {
- /* This is a memory space BAR. Mask it out so we get the size of it */
- return ~(bar_value & PCI_BASE_ADDRESS_MEM_MASK) + 1;
- }
-
- /* Not suitable */
- return 0xFFFFFFFF;
-}
-
-void enable_compatibility_hole(void)
-{
- u8 cfg;
- pci_dev_t art = PCI_BDF(0,0,0);
-
- pci_read_config_byte(art, 0x54, &cfg);
- /* cfg |= 0x08; */
- cfg |= 0x20;
- pci_write_config_byte(art, 0x54, cfg);
-}
-
-void disable_compatibility_hole(void)
-{
- u8 cfg;
- pci_dev_t art = PCI_BDF(0,0,0);
-
- pci_read_config_byte(art, 0x54, &cfg);
- /* cfg &= ~0x08; */
- cfg &= ~0x20;
- pci_write_config_byte(art, 0x54, cfg);
-}
-
-void map_rom(pci_dev_t dev, u32 address)
-{
- pci_write_config_dword(dev, PCI_ROM_ADDRESS, address|PCI_ROM_ADDRESS_ENABLE);
-}
-
-void unmap_rom(pci_dev_t dev)
-{
- pci_write_config_dword(dev, PCI_ROM_ADDRESS, 0);
-}
-
-void bat_map(u8 batnum, u32 address, u32 length)
-{
- u32 temp = address;
- address &= 0xFFFE0000;
- temp &= 0x0001FFFF;
- length = (length - 1 ) >> 17;
- length <<= 2;
-
- switch (batnum)
- {
- case 0:
- __asm volatile ("mtdbatu 0, %0" : : "r" (address | length | 3));
- __asm volatile ("mtdbatl 0, %0" : : "r" (address | 0x22));
- break;
- case 1:
- __asm volatile ("mtdbatu 1, %0" : : "r" (address | length | 3));
- __asm volatile ("mtdbatl 1, %0" : : "r" (address | 0x22));
- break;
- case 2:
- __asm volatile ("mtdbatu 2, %0" : : "r" (address | length | 3));
- __asm volatile ("mtdbatl 2, %0" : : "r" (address | 0x22));
- break;
- case 3:
- __asm volatile ("mtdbatu 3, %0" : : "r" (address | length | 3));
- __asm volatile ("mtdbatl 3, %0" : : "r" (address | 0x22));
- break;
- }
-}
-
-int find_image(u32 rom_address, u32 rom_size, void **image, u32 *image_size);
-
-int attempt_map_rom(pci_dev_t dev, void *copy_address)
-{
- u32 rom_size = 0;
- u32 rom_address = 0;
- u32 bar_size = 0;
- u32 bar_backup = 0;
- int i,j;
- void *image = 0;
- u32 image_size = 0;
- int did_correct = 0;
- u32 prefetch_addr = 0;
- u32 prefetch_size = 0;
- u32 prefetch_idx = 0;
-
- /* Get the size of the expansion rom */
- pci_write_config_dword(dev, PCI_ROM_ADDRESS, 0xFFFFFFFF);
- pci_read_config_dword(dev, PCI_ROM_ADDRESS, &rom_size);
- if ((rom_size & 0x01) == 0)
- {
- PRINTF("No ROM\n");
- return 0;
- }
-
- rom_size &= 0xFFFFF800;
- rom_size = (~rom_size)+1;
-
- PRINTF("ROM Size is %dK\n", rom_size/1024);
-
- /*
- * Try to find a place for the ROM. We always attempt to use
- * one of the card's bases for this, as this will be in any
- * bridge's resource range as well as being free of conflicts
- * with other cards. In a graphics card it is very unlikely
- * that there won't be any base address that is large enough to
- * hold the rom.
- *
- * FIXME: To work around this, theoretically the largest base
- * could be used if none is found in the loop below.
- */
-
- for (i = PCI_BASE_ADDRESS_0; i <= PCI_BASE_ADDRESS_5; i += 4)
- {
- bar_size = get_bar_size(dev, i);
- PRINTF("PCI_BASE_ADDRESS_%d is %dK large\n",
- (i - PCI_BASE_ADDRESS_0)/4,
- bar_size/1024);
- if (bar_size != 0xFFFFFFFF && bar_size >= rom_size)
- {
- PRINTF("Found a match for rom size\n");
- pci_read_config_dword(dev, i, &rom_address);
- rom_address &= 0xFFFFFFF0;
- if (rom_address != 0 && rom_address != 0xFFFFFFF0) break;
- }
- }
-
- if (rom_address == 0 || rom_address == 0xFFFFFFF0)
- {
- PRINTF("No suitable rom address found\n");
- return 0;
- }
-
- /* Disable the BAR */
- pci_read_config_dword(dev, i, &bar_backup);
- pci_write_config_dword(dev, i, 0);
-
- /* Map ROM */
- pci_write_config_dword(dev, PCI_ROM_ADDRESS, rom_address | PCI_ROM_ADDRESS_ENABLE);
-
- /* Copy the rom to a place in the emulator space */
- PRINTF("Claiming BAT 2\n");
- bat_map(2, rom_address, rom_size);
- /* show_bat_mapping(); */
-
- if (0 == find_image(rom_address, rom_size, &image, &image_size))
- {
- PRINTF("No x86 BIOS image found\n");
- return 0;
- }
-
- PRINTF("Copying %ld bytes from 0x%lx to 0x%lx\n", (long)image_size, (long)image, (long)copy_address);
-
- /* memcpy(copy_address, rom_address, rom_size); */
- {
- unsigned char *from = (unsigned char *)image; /* rom_address; */
- unsigned char *to = (unsigned char *)copy_address;
- for (j=0; j<image_size /*rom_size*/; j++)
- {
- *to++ = *from++;
- }
- }
-
- PRINTF("Copy is done\n");
-
- /* Unmap the ROM and restore the BAR */
- pci_write_config_dword(dev, PCI_ROM_ADDRESS, 0);
- pci_write_config_dword(dev, i, bar_backup);
-
- /* FIXME: Shouldn't be needed anymore*/
- /* bat_map(2, 0x80000000, 256*1024*1024);
- show_bat_mapping(); */
-
- /*
- * Since most cards can probably only do 16 bit IO addressing, we
- * correct their IO base into an appropriate value.
- * This should do for most.
- */
- for (i = PCI_BASE_ADDRESS_0; i <= PCI_BASE_ADDRESS_5; i += 4)
- {
- unsigned long value;
- pci_read_config_dword(dev, i, &value);
- if (value & 0x01) /* IO */
- {
- did_correct = 1;
- pci_write_config_dword(dev, i, 0x1001);
- break;
- }
-
- if (value & PCI_BASE_ADDRESS_MEM_PREFETCH)
- {
- prefetch_idx = i;
- prefetch_addr = value & PCI_BASE_ADDRESS_MEM_MASK;
- prefetch_size = get_bar_size(dev, i);
- }
- }
-
- if (1) /* did_correct) */
- {
- extern pci_dev_t pci_find_bridge_for_bus(struct pci_controller *hose, int busnr);
- int busnr = PCI_BUS(dev);
- if (busnr)
- {
- pci_dev_t bridge;
- PRINTF("Need to correct bridge device for IO range change\n");
- bridge = pci_find_bridge_for_bus(NULL, busnr);
- if (bridge == PCI_ANY_ID)
- {
- PRINTF("Didn't find bridge. Hope that's OK\n");
- }
- else
- {
- /*
- * Set upper I/O base/limit to 0
- */
- pci_write_config_byte(bridge, 0x30, 0x00);
- pci_write_config_byte(bridge, 0x31, 0x00);
- pci_write_config_byte(bridge, 0x32, 0x00);
- pci_write_config_byte(bridge, 0x33, 0x00);
- if (did_correct)
- {
- /*
- * set lower I/O base to 1000
- * That is, bits 0:3 are set to 0001 by default.
- * bits 7:4 contain I/O address bits 15:12
- * all others are assumed 0.
- */
- pci_write_config_byte(bridge, 0x1C, 0x11);
- /*
- * Set lower I/O limit to 1FFF
- * That is, bits 0:3 are reserved and always 0000
- * Bits 7:4 contain I/O address bits 15:12
- * All others are assumed F.
- */
- pci_write_config_byte(bridge, 0x1D, 0x10);
- pci_write_config_byte(bridge, 0x0D, 0x20);
- PRINTF("Corrected bridge resource range of bridge at %02x:%02x:%02x\n",
- PCI_BUS(bridge), PCI_DEV(bridge), PCI_FUNC(bridge));
-
- }
- else
- {
- /*
- * This card doesn't have I/O, we disable I/O forwarding
- */
- pci_write_config_byte(bridge, 0x1C, 0x11);
- pci_write_config_byte(bridge, 0x1D, 0x00);
- pci_write_config_byte(bridge, PCI_INTERRUPT_LINE, 0);
- pci_write_config_byte(bridge, PCI_INTERRUPT_PIN, 0);
- pci_write_config_dword(bridge, PCI_COMMAND, PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | PCI_COMMAND_IO);
- PRINTF("Disabled bridge resource range of bridge at %02x:%02x:%02x\n",
- PCI_BUS(bridge), PCI_DEV(bridge), PCI_FUNC(bridge));
-
- }
- }
- /*
- * Correct the prefetchable memory base, which is not set correctly by
- * the U-Boot autoconfig stuff
- */
- if (prefetch_idx)
- {
-/* PRINTF("Setting prefetchable range to %x, %x (%x and %x)\n", */
-/* prefetch_addr, prefetch_addr+prefetch_size, */
-/* prefetch_addr>>16, (prefetch_addr+prefetch_size)>>16); */
-/* pci_write_config_word(bridge, PCI_PREF_MEMORY_BASE, (prefetch_addr>>16)); */
-/* pci_write_config_word(bridge, PCI_PREF_MEMORY_LIMIT, (prefetch_addr+prefetch_size)>>16); */
- }
-
- pci_write_config_word(bridge, PCI_PREF_MEMORY_BASE, 0x1000);
- pci_write_config_word(bridge, PCI_PREF_MEMORY_LIMIT, 0x0000);
-
- pci_write_config_byte(bridge, 0xD0, 0x0A);
- pci_write_config_byte(bridge, 0xD3, 0x04);
-
- /*
- * Set the interrupt pin to 0
- */
-#if 0
- pci_write_config_byte(dev, PCI_INTERRUPT_LINE, 0);
- pci_write_config_byte(dev, PCI_INTERRUPT_PIN, 0);
-#endif
- pci_write_config_byte(bridge, PCI_INTERRUPT_LINE, 0);
- pci_write_config_byte(bridge, PCI_INTERRUPT_PIN, 0);
-
- }
- }
-
- /* Finally, enable the card's IO and memory response */
- pci_write_config_dword(dev, PCI_COMMAND, PCI_COMMAND_MEMORY | PCI_COMMAND_IO);
- pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, 0);
- pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0);
-
- return 1;
-}
-
-int find_image(u32 rom_address, u32 rom_size, void **image, u32 *image_size)
-{
- int i = 0;
- unsigned char *rom = (unsigned char *)rom_address;
- /* if (*rom != 0x55 || *(rom+1) != 0xAA) return 0; /* No bios rom this is, yes. */ */
-
- for (;;)
- {
- unsigned short pci_data_offset = *(rom+0x18) + 256 * *(rom+0x19);
- unsigned short pci_image_length = (*(rom+pci_data_offset+0x10) + 256 * *(rom+pci_data_offset+0x11)) * 512;
- unsigned char pci_image_type = *(rom+pci_data_offset+0x14);
- if (*rom != 0x55 || *(rom+1) != 0xAA)
- {
- PRINTF("Invalid header this is\n");
- return 0;
- }
- PRINTF("Image %i: Type %d (%s)\n", i++, pci_image_type,
- pci_image_type==0 ? "x86" :
- pci_image_type==1 ? "OpenFirmware" :
- "Unknown");
- if (pci_image_type == 0)
- {
- *image = rom;
- *image_size = pci_image_length;
- return 1;
- }
-
- if (*(rom+pci_data_offset+0x15) & 0x80)
- {
- PRINTF("LAST image encountered, no image found\n");
- return 0;
- }
-
- rom += pci_image_length;
- }
-}
-
-void show_bat_mapping(void)
-{
- u32 dbat0u, dbat0l, ibat0u, ibat0l;
- u32 dbat1u, dbat1l, ibat1u, ibat1l;
- u32 dbat2u, dbat2l, ibat2u, ibat2l;
- u32 dbat3u, dbat3l, ibat3u, ibat3l;
- u32 msr, hid0, l2cr_reg;
-
- __asm volatile ("mfdbatu %0,0" : "=r" (dbat0u));
- __asm volatile ("mfdbatl %0,0" : "=r" (dbat0l));
- __asm volatile ("mfibatu %0,0" : "=r" (ibat0u));
- __asm volatile ("mfibatl %0,0" : "=r" (ibat0l));
-
- __asm volatile ("mfdbatu %0,1" : "=r" (dbat1u));
- __asm volatile ("mfdbatl %0,1" : "=r" (dbat1l));
- __asm volatile ("mfibatu %0,1" : "=r" (ibat1u));
- __asm volatile ("mfibatl %0,1" : "=r" (ibat1l));
-
- __asm volatile ("mfdbatu %0,2" : "=r" (dbat2u));
- __asm volatile ("mfdbatl %0,2" : "=r" (dbat2l));
- __asm volatile ("mfibatu %0,2" : "=r" (ibat2u));
- __asm volatile ("mfibatl %0,2" : "=r" (ibat2l));
-
- __asm volatile ("mfdbatu %0,3" : "=r" (dbat3u));
- __asm volatile ("mfdbatl %0,3" : "=r" (dbat3l));
- __asm volatile ("mfibatu %0,3" : "=r" (ibat3u));
- __asm volatile ("mfibatl %0,3" : "=r" (ibat3l));
-
- __asm volatile ("mfmsr %0" : "=r" (msr));
- __asm volatile ("mfspr %0,1008": "=r" (hid0));
- __asm volatile ("mfspr %0,1017": "=r" (l2cr_reg));
-
- printf("dbat0u: %08x dbat0l: %08x ibat0u: %08x ibat0l: %08x\n",
- dbat0u, dbat0l, ibat0u, ibat0l);
- printf("dbat1u: %08x dbat1l: %08x ibat1u: %08x ibat1l: %08x\n",
- dbat1u, dbat1l, ibat1u, ibat1l);
- printf("dbat2u: %08x dbat2l: %08x ibat2u: %08x ibat2l: %08x\n",
- dbat2u, dbat2l, ibat2u, ibat2l);
- printf("dbat3u: %08x dbat3l: %08x ibat3u: %08x ibat3l: %08x\n",
- dbat3u, dbat3l, ibat3u, ibat3l);
-
- printf("\nMSR: %08x HID0: %08x L2CR: %08x \n", msr,hid0, l2cr_reg);
-}
-
-
-void remove_init_data(void)
-{
- char *s;
-
- /* Invalidate and disable data cache */
- invalidate_l1_data_cache();
- dcache_disable();
-
- s = getenv("x86_cache");
-
- if (!s)
- {
- icache_enable();
- dcache_enable();
- }
- else if (s)
- {
- if (strcmp(s, "dcache")==0)
- {
- dcache_enable();
- }
- else if (strcmp(s, "icache") == 0)
- {
- icache_enable();
- }
- else if (strcmp(s, "on")== 0 || strcmp(s, "both") == 0)
- {
- dcache_enable();
- icache_enable();
- }
- }
-
- /* show_bat_mapping();*/
-}
diff --git a/board/MAI/bios_emulator/glue.h b/board/MAI/bios_emulator/glue.h
deleted file mode 100644
index 585efe1286..0000000000
--- a/board/MAI/bios_emulator/glue.h
+++ /dev/null
@@ -1,57 +0,0 @@
-#ifndef GLUE_H
-#define GLUE_H
-
-typedef unsigned int pci_dev_t;
-
-int mypci_find_device(int vendor, int product, int index);
-int mypci_bus(int device);
-int mypci_devfn(int device);
-unsigned long get_bar_size(pci_dev_t dev, int offset);
-
-u8 mypci_read_cfg_byte(int bus, int devfn, int offset);
-u16 mypci_read_cfg_word(int bus, int devfn, int offset);
-u32 mypci_read_cfg_long(int bus, int devfn, int offset);
-
-void mypci_write_cfg_byte(int bus, int devfn, int offset, u8 value);
-void mypci_write_cfg_word(int bus, int devfn, int offset, u16 value);
-void mypci_write_cfg_long(int bus, int devfn, int offset, u32 value);
-
-void _printf(const char *fmt, ...);
-char *_getenv(char *name);
-
-void *malloc(size_t size);
-void memset(void *addr, int value, size_t size);
-void memcpy(void *to, void *from, size_t numbytes);
-int strcmp(char *, char *);
-
-void enable_compatibility_hole(void);
-void disable_compatibility_hole(void);
-
-void map_rom(pci_dev_t dev, unsigned long address);
-void unmap_rom(pci_dev_t dev);
-int attempt_map_rom(pci_dev_t dev, void *copy_address);
-
-#define PCI_BASE_ADDRESS_SPACE 0x01 /* 0 = memory, 1 = I/O */
-#define PCI_BASE_ADDRESS_SPACE_IO 0x01
-#define PCI_BASE_ADDRESS_SPACE_MEMORY 0x00
-#define PCI_BASE_ADDRESS_MEM_MASK (~0x0fUL)
-
-#define PCI_BASE_ADDRESS_0 0x10 /* 32 bits */
-#define PCI_BASE_ADDRESS_1 0x14 /* 32 bits [htype 0,1 only] */
-#define PCI_BASE_ADDRESS_2 0x18 /* 32 bits [htype 0 only] */
-#define PCI_BASE_ADDRESS_3 0x1c /* 32 bits */
-#define PCI_BASE_ADDRESS_4 0x20 /* 32 bits */
-#define PCI_BASE_ADDRESS_5 0x24 /* 32 bits */
-#define PCI_BUS(d) (((d) >> 16) & 0xff)
-#define PCI_DEV(d) (((d) >> 11) & 0x1f)
-#define PCI_FUNC(d) (((d) >> 8) & 0x7)
-#define PCI_BDF(b,d,f) ((b) << 16 | (d) << 11 | (f) << 8)
-
-#define PCI_ANY_ID (~0)
-#define PCI_ROM_ADDRESS 0x30 /* Bits 31..11 are address, 10..1 reserved */
-#define PCI_ROM_ADDRESS_ENABLE 0x01
-
-#define OFF(addr) ((addr) & 0xFFFF)
-#define SEG(addr) (((addr)>>4) &0xF000)
-
-#endif
diff --git a/board/MAI/bios_emulator/scitech/bin/bc31-d16.bat b/board/MAI/bios_emulator/scitech/bin/bc31-d16.bat
deleted file mode 100755
index 776d13820f..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/bc31-d16.bat
+++ /dev/null
@@ -1,28 +0,0 @@
-@echo off
-REM Setup for compiling with Borland C++ 3.1.
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\DOS16\BC3;%BC3_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\DOS16\BC3;%BC3_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%BC3_PATH%\INCLUDE;
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\BC3.MK
-SET USE_DPMI16=
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_SNAP=
-PATH %SCITECH_BIN%;%BC3_PATH%\BIN;%DEFPATH%
-
-REM: Create Borland compile/link configuration scripts
-echo -I%INCLUDE% > %BC3_PATH%\BIN\turboc.cfg
-echo -L%LIB% >> %BC3_PATH%\BIN\turboc.cfg
-echo -L%LIB% > %BC3_PATH%\BIN\tlink.cfg
-
-echo Borland C++ 3.1 DOS compilation configuration set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/bc45-c32.bat b/board/MAI/bios_emulator/scitech/bin/bc45-c32.bat
deleted file mode 100755
index d2939f458a..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/bc45-c32.bat
+++ /dev/null
@@ -1,37 +0,0 @@
-@echo off
-REM Setup for compiling with Borland C++ 4.5 in 32 bit Windows mode.
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\WIN32\BC4;%BC4_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\WIN32\BC4;%BC4_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%BC4_PATH%\INCLUDE;
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\BC32.MK
-SET USE_WIN16=
-SET USE_WIN32=1
-SET USE_VXD=
-SET USE_TNT=
-SET USE_BC5=
-SET WIN32_GUI=
-SET USE_SNAP=
-SET BC_LIBBASE=BC4
-PATH %SCITECH_BIN%;%BC4_PATH%\BIN;%DEFPATH%%BC_CD_PATH%
-
-REM: Enable Win32 SDK if desired (sdk on command line)
-if NOT .%1%==.sdk goto createfiles
-call win32sdk.bat borland
-
-:createfiles
-REM: Create Borland compile/link configuration scripts
-echo -I%INCLUDE% > %BC4_PATH%\BIN\bcc32.cfg
-echo -L%LIB% >> %BC4_PATH%\BIN\bcc32.cfg
-echo -L%LIB% > %BC4_PATH%\BIN\tlink32.cfg
-
-echo Borland C++ 4.5 32 bit Windows compilation configuration set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/bc45-d16.bat b/board/MAI/bios_emulator/scitech/bin/bc45-d16.bat
deleted file mode 100755
index 246517d103..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/bc45-d16.bat
+++ /dev/null
@@ -1,32 +0,0 @@
-@echo off
-REM Setup for compiling with Borland C++ 4.5 in 16 bit mode.
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\DOS16\BC4;%BC4_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\DOS16\BC4;%BC4_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%BC4_PATH%\INCLUDE
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\BC16.MK
-SET USE_DPMI16=
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_VXD=
-SET USE_BC5=
-SET WIN32_GUI=
-SET USE_SNAP=
-SET BC_LIBBASE=BC4
-PATH %SCITECH_BIN%;%BC4_PATH%\BIN;%DEFPATH%%BC_CD_PATH%
-
-REM: Create Borland compile/link configuration scripts
-echo -I%INCLUDE% > %BC4_PATH%\BIN\turboc.cfg
-echo -L%LIB% >> %BC4_PATH%\BIN\turboc.cfg
-echo -L%LIB% > %BC4_PATH%\BIN\tlink.cfg
-
-echo Borland C++ 4.5 16 bit DOS compilation configuration set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/bc45-d32.bat b/board/MAI/bios_emulator/scitech/bin/bc45-d32.bat
deleted file mode 100755
index cbb2c79510..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/bc45-d32.bat
+++ /dev/null
@@ -1,33 +0,0 @@
-@echo off
-REM Setup for compiling with Borland C++ 4.5 in 32 bit mode.
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\DOS32\BC4;%BC4_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\DOS32\BC4;%BC4_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%BC4_PATH%\INCLUDE;
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\BC32.MK
-SET USE_DPMI16=
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_VXD=
-SET USE_TNT=
-SET USE_BC5=
-SET WIN32_GUI=
-SET USE_SNAP=
-SET BC_LIBBASE=BC4
-PATH %SCITECH_BIN%;%BC4_PATH%\BIN;%DEFPATH%%BC_CD_PATH%
-
-REM: Create Borland compile/link configuration scripts
-echo -I%INCLUDE% > %BC4_PATH%\BIN\bcc32.cfg
-echo -L%LIB% >> %BC4_PATH%\BIN\bcc32.cfg
-echo -L%LIB% > %BC4_PATH%\BIN\tlink32.cfg
-
-echo Borland C++ 4.5 32 bit DOS compilation configuration set up (DPMI32).
diff --git a/board/MAI/bios_emulator/scitech/bin/bc45-snp.bat b/board/MAI/bios_emulator/scitech/bin/bc45-snp.bat
deleted file mode 100755
index 14d7c05b14..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/bc45-snp.bat
+++ /dev/null
@@ -1,32 +0,0 @@
-@echo off
-REM Setup for compiling with Borland C++ 4.5 in 32 bit Windows mode.
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\SNAP\BC4;%BC4_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\SNAP\BC4;%BC4_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\BC32.MK
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_VXD=
-SET USE_TNT=
-SET USE_BC5=
-SET WIN32_GUI=
-SET USE_SNAP=1
-SET BC_LIBBASE=BC4
-PATH %SCITECH_BIN%;%BC4_PATH%\BIN;%DEFPATH%%BC_CD_PATH%
-
-REM: Create Borland compile/link configuration scripts
-echo -I%INCLUDE% > %BC4_PATH%\BIN\bcc32.cfg
-echo -L%LIB% >> %BC4_PATH%\BIN\bcc32.cfg
-echo -L%LIB% > %BC4_PATH%\BIN\tlink32.cfg
-
-echo Borland C++ 4.5 Snap compilation configuration set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/bc45-tnt.bat b/board/MAI/bios_emulator/scitech/bin/bc45-tnt.bat
deleted file mode 100755
index 50bd3cb5d8..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/bc45-tnt.bat
+++ /dev/null
@@ -1,46 +0,0 @@
-@echo off
-REM Setup for compiling with Borland C++ 4.5 in 32 bit mode with Phar Lap TNT
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\DOS32\BC4;%BC4_PATH%\LIB;%TNT_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\DOS32\BC4;%BC4_PATH%\LIB;%TNT_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%BC4_PATH%\INCLUDE;%TNT_PATH%\INCLUDE;
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\BC32.MK
-SET USE_DPMI16=
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_VXD=
-SET USE_TNT=1
-SET USE_BC5=
-SET WIN32_GUI=
-SET USE_SNAP=
-SET BC_LIBBASE=BC4
-PATH %SCITECH_BIN%;%BC4_PATH%\BIN;%TNT_PATH%\BIN;%DEFPATH%%BC_CD_PATH%
-
-REM If you set the following to a 1, a TNT DosStyle app will be created.
-REM Otherwise a TNT NtStyle app will be created. NtStyle apps will *only*
-REM run under real DOS when using our libraries, since we require access
-REM to functions that the Win32 API does not support (such as direct access
-REM to video memory, calling Int 10h BIOS functions etc). DosStyle apps
-REM will however run fine in both DOS and a Win95 DOS box (NT DOS boxes don't
-REM work too well).
-REM
-REM If you are using the RealTime DOS extender, your apps *must* be NtStyle,
-REM and hence will never be able to run under Win95 or WinNT, only DOS.
-
-SET DOSSTYLE=
-
-REM: Create Borland compile/link configuration scripts
-echo -I%INCLUDE% > %BC4_PATH%\BIN\bcc32.cfg
-echo -L%LIB% >> %BC4_PATH%\BIN\bcc32.cfg
-echo -L%LIB% > %BC4_PATH%\BIN\tlink32.cfg
-
-echo Borland C++ 4.5 32 bit DOS compilation configuration set up (TNT).
diff --git a/board/MAI/bios_emulator/scitech/bin/bc45-vxd.bat b/board/MAI/bios_emulator/scitech/bin/bc45-vxd.bat
deleted file mode 100755
index 4b59fa422e..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/bc45-vxd.bat
+++ /dev/null
@@ -1,32 +0,0 @@
-@echo off
-REM Setup for compiling with Borland C++ 4.5 in 32 bit Windows VxD mode.
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\VXD\BC4;%BC4_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\VXD\BC4;%BC4_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%BC4_PATH%\INCLUDE;
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\BC32.MK
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_VXD=1
-SET USE_TNT=
-SET USE_BC5=
-SET WIN32_GUI=
-SET USE_SNAP=
-SET BC_LIBBASE=BC4
-PATH %SCITECH_BIN%;%BC4_PATH%\BIN;%DEFPATH%%BC_CD_PATH%
-
-REM: Create Borland compile/link configuration scripts
-echo -I%INCLUDE% > %BC4_PATH%\BIN\bcc32.cfg
-echo -L%LIB% >> %BC4_PATH%\BIN\bcc32.cfg
-echo -L%LIB% > %BC4_PATH%\BIN\tlink32.cfg
-
-echo Borland C++ 4.5 32-bit VxD compilation configuration set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/bc45-w16.bat b/board/MAI/bios_emulator/scitech/bin/bc45-w16.bat
deleted file mode 100755
index 4d799b47b6..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/bc45-w16.bat
+++ /dev/null
@@ -1,32 +0,0 @@
-@echo off
-REM Setup for compiling with Borland C++ 4.5 in 16 bit Windows mode.
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\WIN16\BC4;%BC4_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\WIN16\BC4;%BC4_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%BC4_PATH%\INCLUDE;
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\BC16.MK
-SET USE_DPMI16=
-SET USE_WIN16=1
-SET USE_WIN32=
-SET USE_VXD=
-SET USE_BC5=
-SET WIN32_GUI=
-SET USE_SNAP=
-SET BC_LIBBASE=BC4
-PATH %SCITECH_BIN%;%BC4_PATH%\BIN;%DEFPATH%%BC_CD_PATH%
-
-REM: Create Borland compile/link configuration scripts
-echo -I%INCLUDE% > %BC4_PATH%\BIN\turboc.cfg
-echo -L%LIB% >> %BC4_PATH%\BIN\turboc.cfg
-echo -L%LIB% > %BC4_PATH%\BIN\tlink.cfg
-
-echo Borland C++ 4.5 16 bit Windows compilation configuration set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/bc45-w32.bat b/board/MAI/bios_emulator/scitech/bin/bc45-w32.bat
deleted file mode 100755
index a6c199fe9a..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/bc45-w32.bat
+++ /dev/null
@@ -1,37 +0,0 @@
-@echo off
-REM Setup for compiling with Borland C++ 4.5 in 32 bit Windows mode.
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\WIN32\BC4;%BC4_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\WIN32\BC4;%BC4_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%BC4_PATH%\INCLUDE;
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\BC32.MK
-SET USE_WIN16=
-SET USE_WIN32=1
-SET USE_VXD=
-SET USE_TNT=
-SET USE_BC5=
-SET WIN32_GUI=1
-SET USE_SNAP=
-SET BC_LIBBASE=BC4
-PATH %SCITECH_BIN%;%BC4_PATH%\BIN;%DEFPATH%%BC_CD_PATH%
-
-REM: Enable Win32 SDK if desired (sdk on command line)
-if NOT .%1%==.sdk goto createfiles
-call win32sdk.bat borland
-
-:createfiles
-REM: Create Borland compile/link configuration scripts
-echo -I%INCLUDE% > %BC4_PATH%\BIN\bcc32.cfg
-echo -L%LIB% >> %BC4_PATH%\BIN\bcc32.cfg
-echo -L%LIB% > %BC4_PATH%\BIN\tlink32.cfg
-
-echo Borland C++ 4.5 32 bit Windows compilation configuration set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/bc50-c32.bat b/board/MAI/bios_emulator/scitech/bin/bc50-c32.bat
deleted file mode 100755
index 6a0fde2c9e..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/bc50-c32.bat
+++ /dev/null
@@ -1,40 +0,0 @@
-@echo off
-REM Setup for compiling with Borland C++ 5.0 in 32 bit Windows mode.
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\WIN32\BC5;%BC5_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\WIN32\BC5;%BC5_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET C_INCLUDE=%BC5_PATH%\INCLUDE
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%C_INCLUDE%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\BC32.MK
-SET USE_WIN16=
-SET USE_WIN32=1
-SET USE_VXD=
-SET USE_TNT=
-SET USE_SMX32=
-SET USE_SMX16=
-SET USE_BC5=1
-SET WIN32_GUI=
-SET USE_SNAP=
-SET BC_LIBBASE=BC5
-PATH %SCITECH_BIN%;%BC5_PATH%\BIN;%DEFPATH%%BC5_CD_PATH%
-
-REM: Enable Win32 SDK if desired (sdk on command line)
-if NOT .%1%==.sdk goto createfiles
-call win32sdk.bat borland
-
-:createfiles
-REM: Create Borland compile/link configuration scripts
-echo -I%INCLUDE% > %BC5_PATH%\BIN\bcc32.cfg
-echo -L%LIB% >> %BC5_PATH%\BIN\bcc32.cfg
-echo -L%LIB% > %BC5_PATH%\BIN\tlink32.cfg
-
-echo Borland C++ 5.0 32 bit Windows compilation configuration set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/bc50-d16.bat b/board/MAI/bios_emulator/scitech/bin/bc50-d16.bat
deleted file mode 100755
index 23b50389de..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/bc50-d16.bat
+++ /dev/null
@@ -1,34 +0,0 @@
-@echo off
-REM Setup for compiling with Borland C++ 5.0 in 16 bit mode.
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\DOS16\BC5;%BC5_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\DOS16\BC5;%BC5_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%BC5_PATH%\INCLUDE;
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\BC16.MK
-SET USE_DPMI16=
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_VXD=
-SET USE_SMX32=
-SET USE_SMX16=
-SET USE_BC5=1
-SET WIN32_GUI=
-SET USE_SNAP=
-SET BC_LIBBASE=BC5
-PATH %SCITECH_BIN%;%BC5_PATH%\BIN;%DEFPATH%%BC5_CD_PATH%
-
-REM: Create Borland compile/link configuration scripts
-echo -I%INCLUDE% > %BC5_PATH%\BIN\turboc.cfg
-echo -L%LIB% >> %BC5_PATH%\BIN\turboc.cfg
-echo -L%LIB% > %BC5_PATH%\BIN\tlink.cfg
-
-echo Borland C++ 5.0 16 bit DOS compilation configuration set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/bc50-d32.bat b/board/MAI/bios_emulator/scitech/bin/bc50-d32.bat
deleted file mode 100755
index 0521f93cec..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/bc50-d32.bat
+++ /dev/null
@@ -1,35 +0,0 @@
-@echo off
-REM Setup for compiling with Borland C++ 5.0 in 32 bit mode.
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\DOS32\BC5;%BC5_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\DOS32\BC5;%BC5_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%BC5_PATH%\INCLUDE;
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\BC32.MK
-SET USE_DPMI16=
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_VXD=
-SET USE_TNT=
-SET USE_SMX32=
-SET USE_SMX16=
-SET USE_BC5=1
-SET WIN32_GUI=
-SET USE_SNAP=
-SET BC_LIBBASE=BC5
-PATH %SCITECH_BIN%;%BC5_PATH%\BIN;%DEFPATH%%BC5_CD_PATH%
-
-REM: Create Borland compile/link configuration scripts
-echo -I%INCLUDE% > %BC5_PATH%\BIN\bcc32.cfg
-echo -L%LIB% >> %BC5_PATH%\BIN\bcc32.cfg
-echo -L%LIB% > %BC5_PATH%\BIN\tlink32.cfg
-
-echo Borland C++ 5.0 32 bit DOS compilation configuration set up (DPMI32).
diff --git a/board/MAI/bios_emulator/scitech/bin/bc50-smx.bat b/board/MAI/bios_emulator/scitech/bin/bc50-smx.bat
deleted file mode 100755
index e3241ffae3..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/bc50-smx.bat
+++ /dev/null
@@ -1,35 +0,0 @@
-@echo off
-REM Setup for compiling with Borland C++ 5.0 in 32 bit mode.
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\SMX32\BC5;%BC5_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\SMX32\BC5;%BC5_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%BC5_PATH%\INCLUDE;
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\BC32.MK
-SET USE_DPMI16=
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_VXD=
-SET USE_TNT=
-SET USE_SMX32=1
-SET USE_SMX16=
-SET USE_BC5=1
-SET WIN32_GUI=
-SET USE_SNAP=
-SET BC_LIBBASE=BC5
-PATH %SCITECH_BIN%;%BC5_PATH%\BIN;%DEFPATH%%BC5_CD_PATH%
-
-REM: Create Borland compile/link configuration scripts
-echo -I%INCLUDE% > %BC5_PATH%\BIN\bcc32.cfg
-echo -L%LIB% >> %BC5_PATH%\BIN\bcc32.cfg
-echo -L%LIB% > %BC5_PATH%\BIN\tlink32.cfg
-
-echo Borland C++ 5.0 32 bit SMX compilation configuration set up (SMX32).
diff --git a/board/MAI/bios_emulator/scitech/bin/bc50-snp.bat b/board/MAI/bios_emulator/scitech/bin/bc50-snp.bat
deleted file mode 100755
index ab3acd23c4..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/bc50-snp.bat
+++ /dev/null
@@ -1,34 +0,0 @@
-@echo off
-REM Setup for compiling with Borland C++ 5.0 in 32 bit Windows mode.
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\SNAP\BC5;%BC5_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\SNAP\BC5;%BC5_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\BC32.MK
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_VXD=
-SET USE_TNT=
-SET USE_SMX32=
-SET USE_SMX16=
-SET USE_BC5=1
-SET WIN32_GUI=
-SET USE_SNAP=1
-SET BC_LIBBASE=BC5
-PATH %SCITECH_BIN%;%BC5_PATH%\BIN;%DEFPATH%%BC5_CD_PATH%
-
-REM: Create Borland compile/link configuration scripts
-echo -I%INCLUDE% > %BC5_PATH%\BIN\bcc32.cfg
-echo -L%LIB% >> %BC5_PATH%\BIN\bcc32.cfg
-echo -L%LIB% > %BC5_PATH%\BIN\tlink32.cfg
-
-echo Borland C++ 5.0 Snap compilation configuration set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/bc50-tnt.bat b/board/MAI/bios_emulator/scitech/bin/bc50-tnt.bat
deleted file mode 100755
index 4dcc3723be..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/bc50-tnt.bat
+++ /dev/null
@@ -1,48 +0,0 @@
-@echo off
-REM Setup for compiling with Borland C++ 5.0 in 32 bit mode with Phar Lap TNT
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\DOS32\BC5;%BC5_PATH%\LIB;%TNT_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\DOS32\BC5;%BC5_PATH%\LIB;%TNT_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%BC5_PATH%\INCLUDE;%TNT_PATH%\INCLUDE;
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\BC32.MK
-SET USE_DPMI16=
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_VXD=
-SET USE_TNT=1
-SET USE_SMX32=
-SET USE_SMX16=
-SET USE_BC5=1
-SET WIN32_GUI=
-SET USE_SNAP=
-SET BC_LIBBASE=BC5
-PATH %SCITECH_BIN%;%BC5_PATH%\BIN;%TNT_PATH%\BIN;%DEFPATH%%BC_CD_PATH%
-
-REM If you set the following to a 1, a TNT DosStyle app will be created.
-REM Otherwise a TNT NtStyle app will be created. NtStyle apps will *only*
-REM run under real DOS when using our libraries, since we require access
-REM to functions that the Win32 API does not support (such as direct access
-REM to video memory, calling Int 10h BIOS functions etc). DosStyle apps
-REM will however run fine in both DOS and a Win95 DOS box (NT DOS boxes don't
-REM work too well).
-REM
-REM If you are using the RealTime DOS extender, your apps *must* be NtStyle,
-REM and hence will never be able to run under Win95 or WinNT, only DOS.
-
-SET DOSSTYLE=
-
-REM: Create Borland compile/link configuration scripts
-echo -I%INCLUDE% > %BC5_PATH%\BIN\bcc32.cfg
-echo -L%LIB% >> %BC5_PATH%\BIN\bcc32.cfg
-echo -L%LIB% > %BC5_PATH%\BIN\tlink32.cfg
-
-echo Borland C++ 5.0 32 bit DOS compilation configuration set up (TNT).
diff --git a/board/MAI/bios_emulator/scitech/bin/bc50-vxd.bat b/board/MAI/bios_emulator/scitech/bin/bc50-vxd.bat
deleted file mode 100755
index 2356911aba..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/bc50-vxd.bat
+++ /dev/null
@@ -1,34 +0,0 @@
-@echo off
-REM Setup for compiling with Borland C++ 5.0 in 32 bit Windows mode.
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\VXD\BC5;%BC5_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\VXD\BC5;%BC5_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%BC5_PATH%\INCLUDE;
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\BC32.MK
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_VXD=1
-SET USE_TNT=
-SET USE_SMX32=
-SET USE_SMX16=
-SET USE_BC5=1
-SET WIN32_GUI=
-SET USE_SNAP=
-SET BC_LIBBASE=BC5
-PATH %SCITECH_BIN%;%BC5_PATH%\BIN;%DEFPATH%%BC5_CD_PATH%
-
-REM: Create Borland compile/link configuration scripts
-echo -I%INCLUDE% > %BC5_PATH%\BIN\bcc32.cfg
-echo -L%LIB% >> %BC5_PATH%\BIN\bcc32.cfg
-echo -L%LIB% > %BC5_PATH%\BIN\tlink32.cfg
-
-echo Borland C++ 5.0 32 bit Windows (VxD) compilation configuration set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/bc50-w16.bat b/board/MAI/bios_emulator/scitech/bin/bc50-w16.bat
deleted file mode 100755
index cd79d86b8f..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/bc50-w16.bat
+++ /dev/null
@@ -1,34 +0,0 @@
- @echo off
-REM Setup for compiling with Borland C++ 5.0 in 16 bit Windows mode.
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\WIN16\BC5;%BC5_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\WIN16\BC5;%BC5_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%BC5_PATH%\INCLUDE;
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\BC16.MK
-SET USE_DPMI16=
-SET USE_WIN16=1
-SET USE_WIN32=
-SET USE_VXD=
-SET USE_BC5=1
-SET USE_SMX32=
-SET USE_SMX16=
-SET WIN32_GUI=
-SET USE_SNAP=
-SET BC_LIBBASE=BC5
-PATH %SCITECH_BIN%;%BC5_PATH%\BIN;%DEFPATH%%BC5_CD_PATH%
-
-REM: Create Borland compile/link configuration scripts
-echo -I%INCLUDE% > %BC5_PATH%\BIN\turboc.cfg
-echo -L%LIB% >> %BC5_PATH%\BIN\turboc.cfg
-echo -L%LIB% > %BC5_PATH%\BIN\tlink.cfg
-
-echo Borland C++ 5.0 16 bit Windows compilation configuration set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/bc50-w32.bat b/board/MAI/bios_emulator/scitech/bin/bc50-w32.bat
deleted file mode 100755
index 8b8cec9436..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/bc50-w32.bat
+++ /dev/null
@@ -1,40 +0,0 @@
-@echo off
-REM Setup for compiling with Borland C++ 5.0 in 32 bit Windows mode.
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\WIN32\BC5;%BC5_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\WIN32\BC5;%BC5_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET C_INCLUDE=%BC5_PATH%\INCLUDE
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%C_INCLUDE%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\BC32.MK
-SET USE_WIN16=
-SET USE_WIN32=1
-SET USE_VXD=
-SET USE_TNT=
-SET USE_SMX32=
-SET USE_SMX16=
-SET USE_BC5=1
-SET WIN32_GUI=1
-SET USE_SNAP=
-SET BC_LIBBASE=BC5
-PATH %SCITECH_BIN%;%BC5_PATH%\BIN;%DEFPATH%%BC5_CD_PATH%
-
-REM: Enable Win32 SDK if desired (sdk on command line)
-if NOT .%1%==.sdk goto createfiles
-call win32sdk.bat borland
-
-:createfiles
-REM: Create Borland compile/link configuration scripts
-echo -I%INCLUDE% > %BC5_PATH%\BIN\bcc32.cfg
-echo -L%LIB% >> %BC5_PATH%\BIN\bcc32.cfg
-echo -L%LIB% > %BC5_PATH%\BIN\tlink32.cfg
-
-echo Borland C++ 5.0 32 bit Windows compilation configuration set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/bc50-x11.bat b/board/MAI/bios_emulator/scitech/bin/bc50-x11.bat
deleted file mode 100755
index ebfeb2eb64..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/bc50-x11.bat
+++ /dev/null
@@ -1,34 +0,0 @@
-@echo off
-REM Setup for compiling with Borland C++ 5.0 in 32 bit Windows mode.
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\WIN32\BC5;%BC5_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\WIN32\BC5;%BC5_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%BC5_PATH%\INCLUDE;
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\BC32.MK
-SET USE_WIN16=
-SET USE_WIN32=1
-SET USE_VXD=
-SET USE_TNT=
-SET USE_SMX32=
-SET USE_SMX16=
-SET USE_BC5=1
-SET WIN32_GUI=1
-SET USE_SNAP=
-SET BC_LIBBASE=BC5
-PATH %SCITECH_BIN%;%BC5_PATH%\BIN;%DEFPATH%%BC5_CD_PATH%
-
-REM: Create Borland compile/link configuration scripts
-echo -I%INCLUDE% > %BC5_PATH%\BIN\bcc32.cfg
-echo -L%LIB% >> %BC5_PATH%\BIN\bcc32.cfg
-echo -L%LIB% > %BC5_PATH%\BIN\tlink32.cfg
-
-echo Borland C++ 5.0 32 bit Windows compilation configuration set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/bcb5-c32.bat b/board/MAI/bios_emulator/scitech/bin/bcb5-c32.bat
deleted file mode 100755
index 6e09428816..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/bcb5-c32.bat
+++ /dev/null
@@ -1,40 +0,0 @@
-@echo off
-REM Setup for compiling with Borland C++ Builder 5.0 in 32 bit Windows mode.
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\WIN32\BCB5;%BCB5_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\WIN32\BCB5;%BCB5_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET C_INCLUDE=%BCB5_PATH%\INCLUDE
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%C_INCLUDE%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\BC32.MK
-SET USE_WIN16=
-SET USE_WIN32=1
-SET USE_VXD=
-SET USE_TNT=
-SET USE_SMX32=
-SET USE_SMX16=
-SET USE_BC5=1
-SET WIN32_GUI=
-SET USE_SNAP=
-SET BC_LIBBASE=BC5
-PATH %SCITECH_BIN%;%BCB5_PATH%\BIN;%DEFPATH%%BC5_CD_PATH%
-
-REM: Enable Win32 SDK if desired (sdk on command line)
-if NOT .%1%==.sdk goto createfiles
-call win32sdk.bat borland
-
-:createfiles
-REM: Create Borland compile/link configuration scripts
-echo -I%INCLUDE% > %BCB5_PATH%\BIN\bcc32.cfg
-echo -L%LIB% >> %BCB5_PATH%\BIN\bcc32.cfg
-echo -L%LIB% > %BCB5_PATH%\BIN\tlink32.cfg
-
-echo Borland C++ Builder 5.0 32 bit Windows compilation configuration set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/bcb5-d16.bat b/board/MAI/bios_emulator/scitech/bin/bcb5-d16.bat
deleted file mode 100755
index aa13e7dd20..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/bcb5-d16.bat
+++ /dev/null
@@ -1,34 +0,0 @@
-@echo off
-REM Setup for compiling with Borland C++ Builder 5.0 in 16 bit mode.
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\DOS16\BCB5;%BCB5_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\DOS16\BCB5;%BCB5_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%BCB5_PATH%\INCLUDE;
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\BC16.MK
-SET USE_DPMI16=
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_VXD=
-SET USE_SMX32=
-SET USE_SMX16=
-SET USE_BC5=1
-SET WIN32_GUI=
-SET USE_SNAP=
-SET BC_LIBBASE=BC5
-PATH %SCITECH_BIN%;%BCB5_PATH%\BIN;%DEFPATH%%BC5_CD_PATH%
-
-REM: Create Borland compile/link configuration scripts
-echo -I%INCLUDE% > %BCB5_PATH%\BIN\turboc.cfg
-echo -L%LIB% >> %BCB5_PATH%\BIN\turboc.cfg
-echo -L%LIB% > %BCB5_PATH%\BIN\tlink.cfg
-
-echo Borland C++ Builder 5.0 16 bit DOS compilation configuration set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/bcb5-d32.bat b/board/MAI/bios_emulator/scitech/bin/bcb5-d32.bat
deleted file mode 100755
index d0017d4ccb..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/bcb5-d32.bat
+++ /dev/null
@@ -1,35 +0,0 @@
-@echo off
-REM Setup for compiling with Borland C++ Builder 5.0 in 32 bit mode.
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\DOS32\BCB5;%BCB5_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\DOS32\BCB5;%BCB5_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%BCB5_PATH%\INCLUDE;
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\BC32.MK
-SET USE_DPMI16=
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_VXD=
-SET USE_TNT=
-SET USE_SMX32=
-SET USE_SMX16=
-SET USE_BC5=1
-SET WIN32_GUI=
-SET USE_SNAP=
-SET BC_LIBBASE=BC5
-PATH %SCITECH_BIN%;%BCB5_PATH%\BIN;%DEFPATH%%BC5_CD_PATH%
-
-REM: Create Borland compile/link configuration scripts
-echo -I%INCLUDE% > %BCB5_PATH%\BIN\bcc32.cfg
-echo -L%LIB% >> %BCB5_PATH%\BIN\bcc32.cfg
-echo -L%LIB% > %BCB5_PATH%\BIN\tlink32.cfg
-
-echo Borland C++ Builder 5.0 32 bit DOS compilation configuration set up (DPMI32).
diff --git a/board/MAI/bios_emulator/scitech/bin/bcb5-smx.bat b/board/MAI/bios_emulator/scitech/bin/bcb5-smx.bat
deleted file mode 100755
index 2b969a93ba..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/bcb5-smx.bat
+++ /dev/null
@@ -1,35 +0,0 @@
-@echo off
-REM Setup for compiling with Borland C++ Builder 5.0 in 32 bit mode.
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\SMX32\BCB5;%BCB5_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\SMX32\BCB5;%BCB5_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%BCB5_PATH%\INCLUDE;
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\BC32.MK
-SET USE_DPMI16=
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_VXD=
-SET USE_TNT=
-SET USE_SMX32=1
-SET USE_SMX16=
-SET USE_BC5=1
-SET WIN32_GUI=
-SET USE_SNAP=
-SET BC_LIBBASE=BC5
-PATH %SCITECH_BIN%;%BCB5_PATH%\BIN;%DEFPATH%%BC5_CD_PATH%
-
-REM: Create Borland compile/link configuration scripts
-echo -I%INCLUDE% > %BCB5_PATH%\BIN\bcc32.cfg
-echo -L%LIB% >> %BCB5_PATH%\BIN\bcc32.cfg
-echo -L%LIB% > %BCB5_PATH%\BIN\tlink32.cfg
-
-echo Borland C++ Builder 5.0 32 bit SMX compilation configuration set up (SMX32).
diff --git a/board/MAI/bios_emulator/scitech/bin/bcb5-snp.bat b/board/MAI/bios_emulator/scitech/bin/bcb5-snp.bat
deleted file mode 100755
index d7b8ff20a8..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/bcb5-snp.bat
+++ /dev/null
@@ -1,34 +0,0 @@
-@echo off
-REM Setup for compiling with Borland C++ Builder 5.0 in 32 bit Windows mode.
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\SNAP\BCB5;%BCB5_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\SNAP\BCB5;%BCB5_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\BC32.MK
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_VXD=
-SET USE_TNT=
-SET USE_SMX32=
-SET USE_SMX16=
-SET USE_BC5=1
-SET WIN32_GUI=
-SET USE_SNAP=1
-SET BC_LIBBASE=BC5
-PATH %SCITECH_BIN%;%BCB5_PATH%\BIN;%DEFPATH%%BC5_CD_PATH%
-
-REM: Create Borland compile/link configuration scripts
-echo -I%INCLUDE% > %BCB5_PATH%\BIN\bcc32.cfg
-echo -L%LIB% >> %BCB5_PATH%\BIN\bcc32.cfg
-echo -L%LIB% > %BCB5_PATH%\BIN\tlink32.cfg
-
-echo Borland C++ Builder 5.0 Snap compilation configuration set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/bcb5-tnt.bat b/board/MAI/bios_emulator/scitech/bin/bcb5-tnt.bat
deleted file mode 100755
index 1de3601a59..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/bcb5-tnt.bat
+++ /dev/null
@@ -1,48 +0,0 @@
-@echo off
-REM Setup for compiling with Borland C++ Builder 5.0 in 32 bit mode with Phar Lap TNT
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\DOS32\BCB5;%BCB5_PATH%\LIB;%TNT_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\DOS32\BCB5;%BCB5_PATH%\LIB;%TNT_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%BCB5_PATH%\INCLUDE;%TNT_PATH%\INCLUDE;
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\BC32.MK
-SET USE_DPMI16=
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_VXD=
-SET USE_TNT=1
-SET USE_SMX32=
-SET USE_SMX16=
-SET USE_BC5=1
-SET WIN32_GUI=
-SET USE_SNAP=
-SET BC_LIBBASE=BC5
-PATH %SCITECH_BIN%;%BCB5_PATH%\BIN;%TNT_PATH%\BIN;%DEFPATH%%BC_CD_PATH%
-
-REM If you set the following to a 1, a TNT DosStyle app will be created.
-REM Otherwise a TNT NtStyle app will be created. NtStyle apps will *only*
-REM run under real DOS when using our libraries, since we require access
-REM to functions that the Win32 API does not support (such as direct access
-REM to video memory, calling Int 10h BIOS functions etc). DosStyle apps
-REM will however run fine in both DOS and a Win95 DOS box (NT DOS boxes don't
-REM work too well).
-REM
-REM If you are using the RealTime DOS extender, your apps *must* be NtStyle,
-REM and hence will never be able to run under Win95 or WinNT, only DOS.
-
-SET DOSSTYLE=
-
-REM: Create Borland compile/link configuration scripts
-echo -I%INCLUDE% > %BCB5_PATH%\BIN\bcc32.cfg
-echo -L%LIB% >> %BCB5_PATH%\BIN\bcc32.cfg
-echo -L%LIB% > %BCB5_PATH%\BIN\tlink32.cfg
-
-echo Borland C++ Builder 5.0 32 bit DOS compilation configuration set up (TNT).
diff --git a/board/MAI/bios_emulator/scitech/bin/bcb5-vxd.bat b/board/MAI/bios_emulator/scitech/bin/bcb5-vxd.bat
deleted file mode 100755
index 28de58c3f0..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/bcb5-vxd.bat
+++ /dev/null
@@ -1,34 +0,0 @@
-@echo off
-REM Setup for compiling with Borland C++ Builder 5.0 in 32 bit Windows mode.
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\VXD\BCB5;%BCB5_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\VXD\BCB5;%BCB5_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%BCB5_PATH%\INCLUDE;
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\BC32.MK
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_VXD=1
-SET USE_TNT=
-SET USE_SMX32=
-SET USE_SMX16=
-SET USE_BC5=1
-SET WIN32_GUI=
-SET USE_SNAP=
-SET BC_LIBBASE=BC5
-PATH %SCITECH_BIN%;%BCB5_PATH%\BIN;%DEFPATH%%BC5_CD_PATH%
-
-REM: Create Borland compile/link configuration scripts
-echo -I%INCLUDE% > %BCB5_PATH%\BIN\bcc32.cfg
-echo -L%LIB% >> %BCB5_PATH%\BIN\bcc32.cfg
-echo -L%LIB% > %BCB5_PATH%\BIN\tlink32.cfg
-
-echo Borland C++ Builder 5.0 32 bit Windows (VxD) compilation configuration set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/bcb5-w16.bat b/board/MAI/bios_emulator/scitech/bin/bcb5-w16.bat
deleted file mode 100755
index c30d004081..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/bcb5-w16.bat
+++ /dev/null
@@ -1,34 +0,0 @@
- @echo off
-REM Setup for compiling with Borland C++ Builder 5.0 in 16 bit Windows mode.
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\WIN16\BCB5;%BCB5_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\WIN16\BCB5;%BCB5_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%BCB5_PATH%\INCLUDE;
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\BC16.MK
-SET USE_DPMI16=
-SET USE_WIN16=1
-SET USE_WIN32=
-SET USE_VXD=
-SET USE_BC5=1
-SET USE_SMX32=
-SET USE_SMX16=
-SET WIN32_GUI=
-SET USE_SNAP=
-SET BC_LIBBASE=BC5
-PATH %SCITECH_BIN%;%BCB5_PATH%\BIN;%DEFPATH%%BC5_CD_PATH%
-
-REM: Create Borland compile/link configuration scripts
-echo -I%INCLUDE% > %BCB5_PATH%\BIN\turboc.cfg
-echo -L%LIB% >> %BCB5_PATH%\BIN\turboc.cfg
-echo -L%LIB% > %BCB5_PATH%\BIN\tlink.cfg
-
-echo Borland C++ Builder 5.0 16 bit Windows compilation configuration set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/bcb5-w32.bat b/board/MAI/bios_emulator/scitech/bin/bcb5-w32.bat
deleted file mode 100755
index 18760e1128..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/bcb5-w32.bat
+++ /dev/null
@@ -1,40 +0,0 @@
-@echo off
-REM Setup for compiling with Borland C++ Builder 5.0 in 32 bit Windows mode.
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\WIN32\BCB5;%BCB5_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\WIN32\BCB5;%BCB5_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET C_INCLUDE=%BCB5_PATH%\INCLUDE
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%C_INCLUDE%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\BC32.MK
-SET USE_WIN16=
-SET USE_WIN32=1
-SET USE_VXD=
-SET USE_TNT=
-SET USE_SMX32=
-SET USE_SMX16=
-SET USE_BC5=1
-SET WIN32_GUI=1
-SET USE_SNAP=
-SET BC_LIBBASE=BC5
-PATH %SCITECH_BIN%;%BCB5_PATH%\BIN;%DEFPATH%%BC5_CD_PATH%
-
-REM: Enable Win32 SDK if desired (sdk on command line)
-if NOT .%1%==.sdk goto createfiles
-call win32sdk.bat borland
-
-:createfiles
-REM: Create Borland compile/link configuration scripts
-echo -I%INCLUDE% > %BCB5_PATH%\BIN\bcc32.cfg
-echo -L%LIB% >> %BCB5_PATH%\BIN\bcc32.cfg
-echo -L%LIB% > %BCB5_PATH%\BIN\tlink32.cfg
-
-echo Borland C++ Builder 5.0 32 bit Windows compilation configuration set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/bcb5-x11.bat b/board/MAI/bios_emulator/scitech/bin/bcb5-x11.bat
deleted file mode 100755
index 198c1a2425..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/bcb5-x11.bat
+++ /dev/null
@@ -1,34 +0,0 @@
-@echo off
-REM Setup for compiling with Borland C++ Builder 5.0 in 32 bit Windows mode.
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\WIN32\BCB5;%BCB5_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\WIN32\BCB5;%BCB5_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%BCB5_PATH%\INCLUDE;
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\BC32.MK
-SET USE_WIN16=
-SET USE_WIN32=1
-SET USE_VXD=
-SET USE_TNT=
-SET USE_SMX32=
-SET USE_SMX16=
-SET USE_BC5=1
-SET WIN32_GUI=1
-SET USE_SNAP=
-SET BC_LIBBASE=BC5
-PATH %SCITECH_BIN%;%BCB5_PATH%\BIN;%DEFPATH%%BC5_CD_PATH%
-
-REM: Create Borland compile/link configuration scripts
-echo -I%INCLUDE% > %BCB5_PATH%\BIN\bcc32.cfg
-echo -L%LIB% >> %BCB5_PATH%\BIN\bcc32.cfg
-echo -L%LIB% > %BCB5_PATH%\BIN\tlink32.cfg
-
-echo Borland C++ Builder 5.0 32 bit Windows compilation configuration set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/build b/board/MAI/bios_emulator/scitech/bin/build
deleted file mode 100755
index ff1973dc81..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/build
+++ /dev/null
@@ -1,22 +0,0 @@
-#! /bin/sh
-
-if [ $# -lt 1 ] || ( [ "$1" != gcc-linux ] && [ "$1" != qnx4 ] ) ; then
- echo Usage: $0 compiler_name [DMAKE commands]
- echo
- echo Current compilers:
- echo " gcc-linux - GNU C/C++ 2.7 or higher, 32 bit"
- echo " qnx4 - Watcom C/C++ 10.6 or higher, 32 bit"
- exit 1
-fi
-
-unset DBG OPT OPT_SIZE BUILD_DLL IMPORT_DLL FPU CHECKS BETA
-. ${1}.sh
-
-shift
-dmake $* && exit 0
-
-echo *************************************************
-echo * An error occurred while building the library. *
-echo *************************************************
-exit 1
-
diff --git a/board/MAI/bios_emulator/scitech/bin/build.bat b/board/MAI/bios_emulator/scitech/bin/build.bat
deleted file mode 100755
index ee29093631..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/build.bat
+++ /dev/null
@@ -1,4 +0,0 @@
-@echo off
-rem Disable checked build and build release code
-set CHECKED=
-call build_it.bat %1 %2 %3 %4 %5 %6 %7 %8 %9
diff --git a/board/MAI/bios_emulator/scitech/bin/build_db.bat b/board/MAI/bios_emulator/scitech/bin/build_db.bat
deleted file mode 100755
index 2b325293ab..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/build_db.bat
+++ /dev/null
@@ -1,4 +0,0 @@
-@echo off
-rem Enable checked build and build debug code
-set CHECKED=1
-call build_it.bat %1 %2 %3 %4 %5 %6 %7 %8 %9
diff --git a/board/MAI/bios_emulator/scitech/bin/build_it.bat b/board/MAI/bios_emulator/scitech/bin/build_it.bat
deleted file mode 100755
index 5a619b4459..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/build_it.bat
+++ /dev/null
@@ -1,432 +0,0 @@
-@echo off
-rem Generic batch file to build a version of the library. This batch file
-rem assumes that the correct batch files exist to setup the appropriate
-rem compilation environments, and that the DMAKE.EXE program is available
-rem somewhere on the path.
-rem
-rem Builds as release or debug depending on the value of the CHECKED
-rem environment variable.
-
-rem Unset all environment variables that change the compile process
-set DBG=
-set OPT=
-set OPT_SIZE=
-set BUILD_DLL=
-set IMPORT_DLL=
-set FPU=
-set CHECKS=
-set BETA=
-
-if %1==bc31-d16 goto bc31-d16
-if %1==bc45-d16 goto bc45-d16
-if %1==bc45-d32 goto bc45-d32
-if %1==bc45-tnt goto bc45-tnt
-if %1==bc45-w16 goto bc45-w16
-if %1==bc45-w32 goto bc45-w32
-if %1==bc45-c32 goto bc45-c32
-if %1==bc45-vxd goto bc45-vxd
-if %1==bc45-snp goto bc45-snp
-if %1==bc50-d16 goto bc50-d16
-if %1==bc50-d32 goto bc50-d32
-if %1==bc50-tnt goto bc50-tnt
-if %1==bc50-w16 goto bc50-w16
-if %1==bc50-w32 goto bc50-w32
-if %1==bc50-c32 goto bc50-c32
-if %1==bc50-vxd goto bc50-vxd
-if %1==bc50-snp goto bc50-snp
-if %1==gcc2-d32 goto gcc2-d32
-if %1==gcc2-w32 goto gcc2-w32
-if %1==gcc2-c32 goto gcc2-c32
-if %1==gcc2-linux goto gcc2-linux
-if %1==vc40-d16 goto vc40-d16
-if %1==vc40-tnt goto vc40-tnt
-if %1==vc40-w16 goto vc40-w16
-if %1==vc40-w32 goto vc40-w32
-if %1==vc40-c32 goto vc40-c32
-if %1==vc40-drv9x goto vc40-drv9x
-if %1==vc40-drvnt goto vc40-drvnt
-if %1==vc40-rtt goto vc40-rtt
-if %1==vc40-snp goto vc40-snp
-if %1==vc50-d16 goto vc50-d16
-if %1==vc50-tnt goto vc50-tnt
-if %1==vc50-w16 goto vc50-w16
-if %1==vc50-w32 goto vc50-w32
-if %1==vc50-c32 goto vc50-c32
-if %1==vc50-drv9x goto vc50-drv9x
-if %1==vc50-drvnt goto vc50-drvnt
-if %1==vc50-rtt goto vc50-rtt
-if %1==vc50-snp goto vc50-snp
-if %1==vc60-d16 goto vc60-d16
-if %1==vc60-tnt goto vc60-tnt
-if %1==vc60-w16 goto vc60-w16
-if %1==vc60-w32 goto vc60-w32
-if %1==vc60-c32 goto vc60-c32
-if %1==vc60-drv9x goto vc60-drv9x
-if %1==vc60-drvnt goto vc60-drvnt
-if %1==vc60-drvw2k goto vc60-drvw2k
-if %1==vc60-rtt goto vc60-rtt
-if %1==vc60-snp goto vc60-snp
-if %1==wc10ad16 goto wc10ad16
-if %1==wc10ad32 goto wc10ad32
-if %1==wc10atnt goto wc10atnt
-if %1==wc10aw16 goto wc10aw16
-if %1==wc10aw32 goto wc10aw32
-if %1==wc10ac32 goto wc10ac32
-if %1==wc10ao32 goto wc10ao32
-if %1==wc10ap32 goto wc10ap32
-if %1==wc10asnp goto wc10asnp
-if %1==wc10-d16 goto wc10-d16
-if %1==wc10-d32 goto wc10-d32
-if %1==wc10-tnt goto wc10-tnt
-if %1==wc10-w16 goto wc10-w16
-if %1==wc10-w32 goto wc10-w32
-if %1==wc10-c32 goto wc10-c32
-if %1==wc10-o32 goto wc10-o32
-if %1==wc10-p32 goto wc10-p32
-if %1==wc10-snp goto wc10-snp
-if %1==wc11-d16 goto wc11-d16
-if %1==wc11-d32 goto wc11-d32
-if %1==wc11-tnt goto wc11-tnt
-if %1==wc11-w16 goto wc11-w16
-if %1==wc11-w32 goto wc11-w32
-if %1==wc11-c32 goto wc11-c32
-if %1==wc11-o32 goto wc11-o32
-if %1==wc11-p32 goto wc11-p32
-if %1==wc11-snp goto wc11-snp
-
-echo Usage: BUILD 'compiler_name' [DMAKE commands]
-echo.
-echo Where 'compiler_name' is of the form comp-os, where
-echo 'comp' defines the compiler and 'os' defines the OS environment.
-echo For instance 'bc50-w32' is for Borland C++ 5.0 for Win32.
-echo The value of 'comp' can be any of the following:
-echo.
-echo bc45 - Borland C++ 4.5x
-echo bc50 - Borland C++ 5.x
-echo vc40 - Visual C++ 4.x
-echo vc50 - Visual C++ 5.x
-echo vc60 - Visual C++ 6.x
-echo wc10 - Watcom C++ 10.6
-echo wc11 - Watcom C++ 11.0
-echo gcc2 - GNU C/C++ 2.9x
-echo.
-echo The value of 'os' can be one of the following:
-echo.
-echo d16 - 16-bit DOS
-echo d32 - 32-bit DOS
-echo w16 - 16-bit Windows GUI mode
-echo c32 - 32-bit Windows console mode
-echo w32 - 32-bit Windows GUI mode
-echo o16 - 16-bit OS/2 console mode
-echo o32 - 32-bit OS/2 console mode
-echo p32 - 32-bit OS/2 Presentation Manager
-echo snp - 32-bit SciTech Snap application
-echo linux - 32-bit Linux application
-goto end
-
-rem -------------------------------------------------------------------------
-rem Setup for the specified compiler
-
-:bc31-d16
-call bc31-d16.bat
-goto compileit
-
-:bc45-d16
-call bc45-d16.bat
-goto compileit
-
-:bc45-d32
-call bc45-d32.bat
-goto compileit
-
-:bc45-tnt
-call bc45-tnt.bat
-goto compileit
-
-:bc45-w16
-call bc45-w16.bat
-goto compileit
-
-:bc45-w32
-call bc45-w32.bat
-goto compileit
-
-:bc45-c32
-call bc45-c32.bat
-goto compileit
-
-:bc45-vxd
-call bc45-vxd.bat
-goto compileit
-
-:bc50-d16
-call bc50-d16.bat
-goto compileit
-
-:bc50-d32
-call bc50-d32.bat
-goto compileit
-
-:bc50-tnt
-call bc50-tnt.bat
-goto compileit
-
-:bc50-w16
-call bc50-w16.bat
-goto compileit
-
-:bc50-w32
-call bc50-w32.bat
-goto compileit
-
-:bc50-c32
-call bc50-c32.bat
-goto compileit
-
-:bc50-vxd
-call bc50-vxd.bat
-goto compileit
-
-:gcc2-d32
-call gcc2-d32.bat
-goto compileit
-
-:gcc2-w32
-call gcc2-w32.bat
-goto compileit
-
-:gcc2-c32
-call gcc2-c32.bat
-goto compileit
-
-:gcc2-linux
-call gcc2-linux.bat
-goto compileit
-
-:sc70-d16
-call sc70-d16.bat
-goto compileit
-
-:sc70-w16
-call sc70-w16.bat
-goto compileit
-
-:sc70-tnt
-call sc70-tnt.bat
-goto compileit
-
-:sc70-w32
-call sc70-w32.bat
-goto compileit
-
-:sc70-c32
-call sc70-c32.bat
-goto compileit
-
-:vc40-d16
-call vc40-d16.bat
-goto compileit
-
-:vc40-tnt
-call vc40-tnt.bat
-goto compileit
-
-:vc40-w16
-call vc40-w16.bat
-goto compileit
-
-:vc40-w32
-call vc40-w32.bat
-goto compileit
-
-:vc40-c32
-call vc40-c32.bat
-goto compileit
-
-:vc40-drv9x
-call vc40-drv9x.bat
-goto compileit
-
-:vc40-drvnt
-call vc40-drvnt.bat
-goto compileit
-
-:vc40-rtt
-call vc40-rtt.bat
-goto compileit
-
-:vc50-d16
-call vc50-d16.bat
-goto compileit
-
-:vc50-tnt
-call vc50-tnt.bat
-goto compileit
-
-:vc50-w16
-call vc50-w16.bat
-goto compileit
-
-:vc50-w32
-call vc50-w32.bat
-goto compileit
-
-:vc50-c32
-call vc50-c32.bat
-goto compileit
-
-:vc50-drv9x
-call vc50-drv9x.bat
-goto compileit
-
-:vc50-drvnt
-call vc50-drvnt.bat
-goto compileit
-
-:vc50-rtt
-call vc50-rtt.bat
-goto compileit
-
-:vc60-d16
-call vc60-d16.bat
-goto compileit
-
-:vc60-tnt
-call vc60-tnt.bat
-goto compileit
-
-:vc60-w16
-call vc60-w16.bat
-goto compileit
-
-:vc60-w32
-call vc60-w32.bat
-goto compileit
-
-:vc60-c32
-call vc60-c32.bat
-goto compileit
-
-:vc60-drv9x
-call vc60-drv9x.bat
-goto compileit
-
-:vc60-drvnt
-call vc60-drvnt.bat
-goto compileit
-
-:vc60-drvw2k
-call vc60-drvw2k.bat
-goto compileit
-
-:vc60-rtt
-call vc60-rtt.bat
-goto compileit
-
-:wc10ad16
-call wc10ad16.bat
-goto compileit
-
-:wc10ad32
-call wc10ad32.bat
-goto compileit
-
-:wc10atnt
-call wc10atnt.bat
-goto compileit
-
-:wc10aw16
-call wc10aw16.bat
-goto compileit
-
-:wc10aw32
-call wc10aw32.bat
-goto compileit
-
-:wc10ac32
-call wc10ac32.bat
-goto compileit
-
-:wc10ao32
-call wc10ao32.bat
-goto compileit
-
-:wc10ap32
-call wc10ap32.bat
-goto compileit
-
-:wc10-d16
-call wc10-d16.bat
-goto compileit
-
-:wc10-d32
-call wc10-d32.bat
-goto compileit
-
-:wc10-tnt
-call wc10-tnt.bat
-goto compileit
-
-:wc10-w16
-call wc10-w16.bat
-goto compileit
-
-:wc10-w32
-call wc10-w32.bat
-goto compileit
-
-:wc10-c32
-call wc10-c32.bat
-goto compileit
-
-:wc10-o32
-call wc10-o32.bat
-goto compileit
-
-:wc10-p32
-call wc10-p32.bat
-goto compileit
-
-:wc11-d16
-call wc11-d16.bat
-goto compileit
-
-:wc11-d32
-call wc11-d32.bat
-goto compileit
-
-:wc11-tnt
-call wc11-tnt.bat
-goto compileit
-
-:wc11-w16
-call wc11-w16.bat
-goto compileit
-
-:wc11-w32
-call wc11-w32.bat
-goto compileit
-
-:wc11-c32
-call wc11-c32.bat
-goto compileit
-
-:wc11-o32
-call wc11-o32.bat
-goto compileit
-
-:wc11-p32
-call wc11-p32.bat
-goto compileit
-
-:compileit
-k_rm -f *.lib *.a
-dmake %2 %3 %4 %5 %6 %7 %8 %9
-if errorlevel 1 goto errorend
-goto end
-
-:errorend
-echo *************************************************
-echo * An error occurred while building the library. *
-echo *************************************************
-:end
diff --git a/board/MAI/bios_emulator/scitech/bin/cddrv.bat b/board/MAI/bios_emulator/scitech/bin/cddrv.bat
deleted file mode 100755
index b64f4d7463..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/cddrv.bat
+++ /dev/null
@@ -1,6 +0,0 @@
-@echo off
-%1
-cd %3
-%4 %5 %6 %7 %8 %9
-%2
-
diff --git a/board/MAI/bios_emulator/scitech/bin/cdit b/board/MAI/bios_emulator/scitech/bin/cdit
deleted file mode 100755
index b22023d54c..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/cdit
+++ /dev/null
@@ -1,10 +0,0 @@
-#! /bin/sh
-
-cd $1
-PROG=$2
-shift 2
-rm -f *.lib *.a
-$PROG $*
-RET=$?
-cd ..
-exit $RET
diff --git a/board/MAI/bios_emulator/scitech/bin/cdit.bat b/board/MAI/bios_emulator/scitech/bin/cdit.bat
deleted file mode 100755
index 950b648071..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/cdit.bat
+++ /dev/null
@@ -1,5 +0,0 @@
-@echo off
-cd %1
-k_rm -f *.lib *.a
-shift 1
-%1 %2 %3 %4 %5 %6 %7 %8 %9
diff --git a/board/MAI/bios_emulator/scitech/bin/djgpp.env b/board/MAI/bios_emulator/scitech/bin/djgpp.env
deleted file mode 100644
index 5a2c3d816a..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/djgpp.env
+++ /dev/null
@@ -1,46 +0,0 @@
-#= Don't edit this line unless you move djgpp.env outside
-#= of the djgpp installation directory. If you do move
-#= it, set DJDIR to the directory you installed DJGPP in.
-#=
-DJDIR=%:/>DJGPP%
-
-+USER=dosuser
-+TMPDIR=%DJDIR%/tmp
-+EMU387=%DJDIR%/bin/emu387.dxe
-+LFN=y
-
-[bison]
-BISON_HAIRY=%DJDIR%/lib/bison.hai
-BISON_SIMPLE=%DJDIR%/lib/bison.sim
-
-[cpp]
-CPLUS_INCLUDE_PATH=%/>;CPLUS_INCLUDE_PATH%include;%SCITECH%/include;%PRIVATE%/include;.;%DJDIR%/lang/cxx;%DJDIR%/include;%DJDIR%/contrib/grx20/include
-C_INCLUDE_PATH=%/>;C_INCLUDE_PATH%include;%SCITECH%/include;%PRIVATE%/include;.;%DJDIR%/include;%DJDIR%/contrib/grx20/include
-OBJCPLUS_INCLUDE_PATH=%/>;OBJCPLUS_INCLUDE_PATH%%DJDIR%/include;%DJDIR%/lang/objc
-OBJC_INCLUDE_PATH=%/>;OBJC_INCLUDE_PATH%%DJDIR%/include;%DJDIR%/lang/objc
-
-[gcc]
-COMPILER_PATH=%/>;COMPILER_PATH%%DJDIR%/bin
-LIBRARY_PATH=%/>;LIBRARY_PATH%%DJDIR%/lib;%DJDIR%/contrib/grx20/lib;%SCITECH%/lib/release/dos32/dj2
-
-[info]
-INFOPATH=%/>;INFOPATH%%DJDIR%/info;%DJDIR%/gnu/emacs/info
-INFO_COLORS=0x1f.0x31
-
-[emacs]
-INFOPATH=%/>;INFOPATH%%DJDIR%/info;%DJDIR%/gnu/emacs/info
-
-[less]
-LESSBINFMT=*k<%X>
-LESSCHARDEF=8bcccbcc12bc5b95.b127.b
-LESS=%LESS% -h5$y5$Dd2.0$Du14.0$Ds4.7$Dk9.0$
-
-[locate]
-+LOCATE_PATH=%DJDIR%/lib/locatedb.dat
-
-[ls]
-+LS_COLORS=no=00:fi=00:di=36:lb=37;07:cd=40;33;01:ex=32:*.cmd=32:*.tar=01;31:*.tgz=01;31:*.arj=01;31:*.taz=01;31:*.lzh=01;31:*.zip=01;31:*.z=01;31:*.Z=01;31:*.gz=01;31:*.deb=01;31:*.jpg=01;34:*.gif=01;34:*.bmp=01;34:*.ppm=01;34:*.tga=01;34:*.xbm=01;34:*.xpm=01;34:*.tif=01;34:*.mpg=01;37:*.avi=01;37:*.gl=01;37:*.dl=01;37:*~=08:*.bak=08:
-[dir]
-+LS_COLORS=no=00:fi=00:di=36:lb=37;07:cd=40;33;01:ex=32:*.cmd=32:*.tar=01;31:*.tgz=01;31:*.arj=01;31:*.taz=01;31:*.lzh=01;31:*.zip=01;31:*.z=01;31:*.Z=01;31:*.gz=01;31:*.deb=01;31:*.jpg=01;34:*.gif=01;34:*.bmp=01;34:*.ppm=01;34:*.tga=01;34:*.xbm=01;34:*.xpm=01;34:*.tif=01;34:*.mpg=01;37:*.avi=01;37:*.gl=01;37:*.dl=01;37:*~=08:*.bak=08:
-[vdir]
-+LS_COLORS=no=00:fi=00:di=36:lb=37;07:cd=40;33;01:ex=32:*.cmd=32:*.tar=01;31:*.tgz=01;31:*.arj=01;31:*.taz=01;31:*.lzh=01;31:*.zip=01;31:*.z=01;31:*.Z=01;31:*.gz=01;31:*.deb=01;31:*.jpg=01;34:*.gif=01;34:*.bmp=01;34:*.ppm=01;34:*.tga=01;34:*.xbm=01;34:*.xpm=01;34:*.tif=01;34:*.mpg=01;37:*.avi=01;37:*.gl=01;37:*.dl=01;37:*~=08:*.bak=08:
diff --git a/board/MAI/bios_emulator/scitech/bin/djgpp_db.env b/board/MAI/bios_emulator/scitech/bin/djgpp_db.env
deleted file mode 100644
index 9b792c93e4..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/djgpp_db.env
+++ /dev/null
@@ -1,46 +0,0 @@
-#= Don't edit this line unless you move djgpp.env outside
-#= of the djgpp installation directory. If you do move
-#= it, set DJDIR to the directory you installed DJGPP in.
-#=
-DJDIR=%:/>DJGPP%
-
-+USER=dosuser
-+TMPDIR=%DJDIR%/tmp
-+EMU387=%DJDIR%/bin/emu387.dxe
-+LFN=y
-
-[bison]
-BISON_HAIRY=%DJDIR%/lib/bison.hai
-BISON_SIMPLE=%DJDIR%/lib/bison.sim
-
-[cpp]
-CPLUS_INCLUDE_PATH=%/>;CPLUS_INCLUDE_PATH%include;%SCITECH%/include;%PRIVATE%/include;.;%DJDIR%/lang/cxx;%DJDIR%/include;%DJDIR%/contrib/grx20/include
-C_INCLUDE_PATH=%/>;C_INCLUDE_PATH%include;%SCITECH%/include;%PRIVATE%/include;.;%DJDIR%/include;%DJDIR%/contrib/grx20/include
-OBJCPLUS_INCLUDE_PATH=%/>;OBJCPLUS_INCLUDE_PATH%%DJDIR%/include;%DJDIR%/lang/objc
-OBJC_INCLUDE_PATH=%/>;OBJC_INCLUDE_PATH%%DJDIR%/include;%DJDIR%/lang/objc
-
-[gcc]
-COMPILER_PATH=%/>;COMPILER_PATH%%DJDIR%/bin
-LIBRARY_PATH=%/>;LIBRARY_PATH%%DJDIR%/lib;%DJDIR%/contrib/grx20/lib;%SCITECH%/lib/debug/dos32/dj2
-
-[info]
-INFOPATH=%/>;INFOPATH%%DJDIR%/info;%DJDIR%/gnu/emacs/info
-INFO_COLORS=0x1f.0x31
-
-[emacs]
-INFOPATH=%/>;INFOPATH%%DJDIR%/info;%DJDIR%/gnu/emacs/info
-
-[less]
-LESSBINFMT=*k<%X>
-LESSCHARDEF=8bcccbcc12bc5b95.b127.b
-LESS=%LESS% -h5$y5$Dd2.0$Du14.0$Ds4.7$Dk9.0$
-
-[locate]
-+LOCATE_PATH=%DJDIR%/lib/locatedb.dat
-
-[ls]
-+LS_COLORS=no=00:fi=00:di=36:lb=37;07:cd=40;33;01:ex=32:*.cmd=32:*.tar=01;31:*.tgz=01;31:*.arj=01;31:*.taz=01;31:*.lzh=01;31:*.zip=01;31:*.z=01;31:*.Z=01;31:*.gz=01;31:*.deb=01;31:*.jpg=01;34:*.gif=01;34:*.bmp=01;34:*.ppm=01;34:*.tga=01;34:*.xbm=01;34:*.xpm=01;34:*.tif=01;34:*.mpg=01;37:*.avi=01;37:*.gl=01;37:*.dl=01;37:*~=08:*.bak=08:
-[dir]
-+LS_COLORS=no=00:fi=00:di=36:lb=37;07:cd=40;33;01:ex=32:*.cmd=32:*.tar=01;31:*.tgz=01;31:*.arj=01;31:*.taz=01;31:*.lzh=01;31:*.zip=01;31:*.z=01;31:*.Z=01;31:*.gz=01;31:*.deb=01;31:*.jpg=01;34:*.gif=01;34:*.bmp=01;34:*.ppm=01;34:*.tga=01;34:*.xbm=01;34:*.xpm=01;34:*.tif=01;34:*.mpg=01;37:*.avi=01;37:*.gl=01;37:*.dl=01;37:*~=08:*.bak=08:
-[vdir]
-+LS_COLORS=no=00:fi=00:di=36:lb=37;07:cd=40;33;01:ex=32:*.cmd=32:*.tar=01;31:*.tgz=01;31:*.arj=01;31:*.taz=01;31:*.lzh=01;31:*.zip=01;31:*.z=01;31:*.Z=01;31:*.gz=01;31:*.deb=01;31:*.jpg=01;34:*.gif=01;34:*.bmp=01;34:*.ppm=01;34:*.tga=01;34:*.xbm=01;34:*.xpm=01;34:*.tif=01;34:*.mpg=01;37:*.avi=01;37:*.gl=01;37:*.dl=01;37:*~=08:*.bak=08:
diff --git a/board/MAI/bios_emulator/scitech/bin/findint3.bat b/board/MAI/bios_emulator/scitech/bin/findint3.bat
deleted file mode 100755
index 2e1506c2ce..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/findint3.bat
+++ /dev/null
@@ -1 +0,0 @@
-perl c:\scitech\src\perl\findint3.per
diff --git a/board/MAI/bios_emulator/scitech/bin/gcc-beos.sh b/board/MAI/bios_emulator/scitech/bin/gcc-beos.sh
deleted file mode 100755
index 61ffd93507..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/gcc-beos.sh
+++ /dev/null
@@ -1,16 +0,0 @@
-#! /bin/sh
-
-# Setup for compiling with GCC/G++ for BeOS
-
-if [ "$CHECKED" = "1" ]; then
- echo Checked debug build enabled.
-else
- echo Release build enabled.
-fi
-
-export MAKESTARTUP=$SCITECH/makedefs/gcc_beos.mk
-export INCLUDE="-Iinclude -I$SCITECH/include -I$PRIVATE/include"
-export USE_X11=0
-export USE_BEOS=1
-
-echo GCC BeOS console compilation environment set up
diff --git a/board/MAI/bios_emulator/scitech/bin/gcc-freebsd.sh b/board/MAI/bios_emulator/scitech/bin/gcc-freebsd.sh
deleted file mode 100755
index 3816a5dca7..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/gcc-freebsd.sh
+++ /dev/null
@@ -1,16 +0,0 @@
-#! /bin/sh
-
-# Setup for compiling with GCC/G++ for FreeBSD
-
-if [ "$CHECKED" = "1" ]; then
- echo Checked debug build enabled.
-else
- echo Release build enabled.
-fi
-
-export MAKESTARTUP=$SCITECH/makedefs/gcc_freebsd.mk
-export INCLUDE="-Iinclude -I$SCITECH/include -I$PRIVATE/include"
-export USE_X11=1
-export USE_FREEBSD=1
-
-echo GCC FreeBSD console compilation environment set up
diff --git a/board/MAI/bios_emulator/scitech/bin/gcc-linux.sh b/board/MAI/bios_emulator/scitech/bin/gcc-linux.sh
deleted file mode 100755
index 27a4c49065..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/gcc-linux.sh
+++ /dev/null
@@ -1,19 +0,0 @@
-#! /bin/sh
-
-# Setup for compiling with GCC/G++ for Linux
-
-if [ "$CHECKED" = "1" ]; then
- echo Checked debug build enabled.
-else
- echo Release build enabled.
-fi
-
-export MAKESTARTUP=$SCITECH/makedefs/gcc_linux.mk
-export INCLUDE="include;$SCITECH/include;$PRIVATE/include"
-export USE_LINUX=1
-
-if [ "x$LIBC" = x ]; then
- echo "GCC Linux console compilation environment set up (glib)"
-else
- echo "GCC Linux console compilation environment set up (libc5)"
-fi
diff --git a/board/MAI/bios_emulator/scitech/bin/gcc2-c32.bat b/board/MAI/bios_emulator/scitech/bin/gcc2-c32.bat
deleted file mode 100755
index 13c4783699..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/gcc2-c32.bat
+++ /dev/null
@@ -1,26 +0,0 @@
-@echo off
-REM Setup for compiling with GNU C compiler
-
-if .%CHECKED%==.1 goto checked_build
-set LIB=%SCITECH_LIB%\LIB\release\win32\gcc2
-echo Release build enabled.
-goto setvars
-
-:checked_build
-set LIB=%SCITECH_LIB%\LIB\debug\win32\gcc2
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-set INCLUDE=include;%SCITECH%\include;%PRIVATE%\include
-set MAKESTARTUP=%SCITECH%\makedefs\gcc_win32.mk
-set MAKE_MODE=
-set USE_WIN16=
-set USE_WIN32=1
-set WIN32_GUI=
-set USE_SNAP=
-set GCC_LIBBASE=gcc2
-PATH %SCITECH_BIN%;%GCC2_PATH%\NATIVE\BIN;%DEFPATH%
-
-echo GCC 2.9.x 32-bit Win32 console compilation environment set up
-
diff --git a/board/MAI/bios_emulator/scitech/bin/gcc2-dos.bat b/board/MAI/bios_emulator/scitech/bin/gcc2-dos.bat
deleted file mode 100755
index 97cb8bda13..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/gcc2-dos.bat
+++ /dev/null
@@ -1,28 +0,0 @@
-@echo off
-REM Setup for compiling with DJGPP 2.02
-
-if .%CHECKED%==.1 goto checked_build
-set LIB=%SCITECH_LIB%\LIB\release\dos32\dj2
-%SCITECH%\bin-dos\k_cp %SCITECH%\BIN\DJGPP.ENV %DJ_PATH%\DJGPP.ENV
-echo Release build enabled.
-goto setvars
-
-:checked_build
-set LIB=%SCITECH_LIB%\LIB\debug\dos32\dj2
-%SCITECH%\bin-dos\k_cp %SCITECH%\BIN\DJGPP_DB.ENV %DJ_PATH%\DJGPP.ENV
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-set DJGPP=%DJ_PATH%\DJGPP.ENV
-set INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%DJ_PATH%\INCLUDE;
-set MAKESTARTUP=%SCITECH%\MAKEDEFS\DJ32.MK
-set USE_WIN16=
-set USE_WIN32=
-set WIN32_GUI=
-set USE_SNAP=
-set DJ_LIBBASE=dj2
-PATH %SCITECH_BIN%;%DJ_PATH%\BIN;%DEFPATH%
-
-echo DJGPP 2.02 32-bit DOS compilation environment set up (DPMI).
-
diff --git a/board/MAI/bios_emulator/scitech/bin/gcc2-linux.bat b/board/MAI/bios_emulator/scitech/bin/gcc2-linux.bat
deleted file mode 100755
index ceb2ab84e9..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/gcc2-linux.bat
+++ /dev/null
@@ -1,26 +0,0 @@
-@echo off
-REM Setup for compiling with GNU C cross-compiler
-
-if .%CHECKED%==.1 goto checked_build
-set LIB=%SCITECH_LIB%\LIB\release\win32\gcc2
-echo Release build enabled.
-goto setvars
-
-:checked_build
-set LIB=%SCITECH_LIB%\LIB\debug\win32\gcc2
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-set INCLUDE=include;%SCITECH%\include;%PRIVATE%\include
-set MAKESTARTUP=%SCITECH%\MAKEDEFS\gcc_linux.mk
-set MAKE_MODE=UNIX
-set USE_WIN16=
-set USE_WIN32=
-set WIN32_GUI=
-set USE_SNAP=
-set GCC_LIBBASE=gcc2
-PATH %SCITECH_BIN%;%GCC2_PATH%\cross-linux\i386-redhat-linux\BIN;%DEFPATH%
-
-echo GCC 2.9.x 32-bit Linux console cross compilation environment set up
-
diff --git a/board/MAI/bios_emulator/scitech/bin/gcc2-w32.bat b/board/MAI/bios_emulator/scitech/bin/gcc2-w32.bat
deleted file mode 100755
index bdb31aaf5d..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/gcc2-w32.bat
+++ /dev/null
@@ -1,26 +0,0 @@
-@echo off
-REM Setup for compiling with GNU C compiler
-
-if .%CHECKED%==.1 goto checked_build
-set LIB=%SCITECH_LIB%\LIB\release\win32\gcc2
-echo Release build enabled.
-goto setvars
-
-:checked_build
-set LIB=%SCITECH_LIB%\LIB\debug\win32\gcc2
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-set INCLUDE=include;%SCITECH%\include;%PRIVATE%\include
-set MAKESTARTUP=%SCITECH%\makedefs\gcc_win32.mk
-set MAKE_MODE=
-set USE_WIN16=
-set USE_WIN32=1
-set WIN32_GUI=1
-set USE_SNAP=
-set GCC_LIBBASE=gcc2
-PATH %SCITECH_BIN%;%GCC2_PATH%\NATIVE\BIN;%DEFPATH%
-
-echo GCC 2.9.x 32-bit Win32 GUI compilation environment set up
-
diff --git a/board/MAI/bios_emulator/scitech/bin/makelib.bat b/board/MAI/bios_emulator/scitech/bin/makelib.bat
deleted file mode 100755
index 631673483c..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/makelib.bat
+++ /dev/null
@@ -1,97 +0,0 @@
-call wc11-d32.bat
-
-cd c:\private\src\license
-dmake clean
-dmake depend
-dmake -u install
-cd c:\scitech\src\pm
-dmake clean
-dmake depend
-dmake -u install
-cd c:\scitech\src\console
-dmake clean
-dmake depend
-dmake -u install
-cd c:\scitech\src\nucleus
-dmake clean
-dmake depend
-dmake -u install
-cd c:\scitech\src\zlib
-dmake clean
-dmake depend
-dmake -u install
-
-cd c:\private\src\graphics\ref2d
-dmake clean
-dmake depend
-dmake -u install
-cd c:\private\src\drvlib
-dmake clean
-dmake depend
-dmake -u install
-
-call wc11-w32.bat
-
-cd c:\private\src\license
-dmake clean
-dmake depend
-dmake -u install
-cd c:\scitech\src\pm
-dmake clean
-dmake depend
-dmake -u install
-cd c:\scitech\src\console
-dmake clean
-dmake depend
-dmake -u install
-cd c:\scitech\src\nucleus
-dmake clean
-dmake depend
-dmake -u install
-cd c:\scitech\src\zlib
-dmake clean
-dmake depend
-dmake -u install
-
-cd c:\private\src\graphics\ref2d
-dmake clean
-dmake depend
-dmake -u install
-cd c:\private\src\drvlib
-dmake clean
-dmake depend
-dmake -u install
-
-call wc10-d32.bat
-
-cd c:\private\src\license
-dmake clean
-dmake depend
-dmake -u install
-cd c:\scitech\src\pm
-dmake clean
-dmake depend
-dmake -u install
-cd c:\scitech\src\console
-dmake clean
-dmake depend
-dmake -u install
-cd c:\scitech\src\nucleus
-dmake clean
-dmake depend
-dmake -u install
-cd c:\scitech\src\zlib
-dmake clean
-dmake depend
-dmake -u install
-
-cd c:\private\src\graphics\ref2d
-dmake clean
-dmake depend
-dmake -u install
-cd c:\private\src\drvlib
-dmake clean
-dmake depend
-dmake -u install
-
-cd \private\src\graphics\drivers
diff --git a/board/MAI/bios_emulator/scitech/bin/meltobjs.sh b/board/MAI/bios_emulator/scitech/bin/meltobjs.sh
deleted file mode 100755
index fd1804b70f..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/meltobjs.sh
+++ /dev/null
@@ -1,23 +0,0 @@
-#! /bin/sh
-#
-# This script generates a single object file from a set of libraries (*.a files)
-# Usage: meltobjs.sh target.o library1.a library2.a ...
-#
-# (C) SciTech Software, Inc. 1998
-#
-
-TMPDIR=/tmp/melt$$
-TARGET=$1
-TARGETDIR=$PWD
-shift
-mkdir $TMPDIR
-
-cd $TMPDIR
-
-for a in $*
-do
- ar x $a
-done
-ld -r -o $TARGETDIR/$TARGET *.o
-
-rm -fr $TMPDIR \ No newline at end of file
diff --git a/board/MAI/bios_emulator/scitech/bin/ntddk.bat b/board/MAI/bios_emulator/scitech/bin/ntddk.bat
deleted file mode 100755
index 07c0d78505..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/ntddk.bat
+++ /dev/null
@@ -1,42 +0,0 @@
-@echo off
-REM: Set up environment variables for Microsoft Windows NT DDK development.
-REM: Note that we have hard coded this for Windows NT i386 development.
-
-SET USE_NTDRV=1
-SET USE_W2KDRV=
-SET BASEDIR=%NT_DDKROOT%
-SET PATH=%BASEDIR%\bin;%PATH%
-SET NTMAKEENV=%BASEDIR%\inc
-SET BUILD_MAKE_PROGRAM=nmake.exe
-SET BUILD_DEFAULT=-ei -nmake -i
-SET BUILD_DEFAULT_TARGETS=-386
-SET _OBJ_DIR=obj
-SET NEW_CRTS=1
-SET _NTROOT=%BASEDIR%
-SET INCLUDE=%BASEDIR%\inc;%INCLUDE%
-
-if .%CHECKED%==.1 goto checked
-
-REM: set up an NT free build environment
-SET DDKBUILDENV=free
-SET C_DEFINES=-D_IDWBUILD
-SET NTDBGFILES=1
-SET NTDEBUG=
-SET NTDEBUGTYPE=
-SET MSC_OPTIMIZATION=
-set LIB=%BASEDIR%\lib\i386\free;%SCITECH_LIB%\LIB\RELEASE\NTDRV\VC6;%MSVCDir%\LIB;.
-
-goto done
-
-:checked
-
-REM: set up an NT checked build environment
-SET DDKBUILDENV=checked
-SET C_DEFINES=-D_IDWBUILD -DRDRDBG -DSRVDBG
-SET NTDBGFILES=
-SET NTDEBUG=ntsd
-SET NTDEBUGTYPE=both
-SET MSC_OPTIMIZATION=/Od /Oi
-set LIB=%BASEDIR%\lib\i386\free;%SCITECH_LIB%\LIB\DEBUG\NTDRV\VC6;%MSVCDir%\LIB;.
-
-:done
diff --git a/board/MAI/bios_emulator/scitech/bin/qnx4.sh b/board/MAI/bios_emulator/scitech/bin/qnx4.sh
deleted file mode 100755
index 843c4d9fb3..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/qnx4.sh
+++ /dev/null
@@ -1,18 +0,0 @@
-#! /bin/sh
-
-# Setup for compiling with Watcom C/C++ for QNX4
-
-if [ "$CHECKED" = "1" ]; then
- echo Checked debug build enabled.
-else
- echo Release build enabled.
-fi
-
-export MAKESTARTUP=$SCITECH/makedefs/qnx4.mk
-export INCLUDE="-I$SCITECH/include -I$PRIVATE/include -I/usr/include"
-export USE_QNX=1
-export USE_QNX4=1
-export WC_LIBBASE=wc10
-
-echo Qnx 4 console compilation environment set up
-
diff --git a/board/MAI/bios_emulator/scitech/bin/qnxnto.sh b/board/MAI/bios_emulator/scitech/bin/qnxnto.sh
deleted file mode 100755
index c114f9e337..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/qnxnto.sh
+++ /dev/null
@@ -1,21 +0,0 @@
-#! /bin/sh
-
-# Setup for compiling with Watcom C/C++ for QNX Neutrino
-
-if [ "$CHECKED" = "1" ]; then
- echo Checked debug build enabled.
-else
- echo Release build enabled.
-fi
-
-if [ X$GCC_PATH = "X" ]; then
- export GCC_PATH=/usr/gcc/bin
-fi
-
-export MAKESTARTUP=$SCITECH/makedefs/qnxnto.mk
-export INCLUDE="-I$SCITECH/include -I$PRIVATE/include -I/usr/nto/include"
-export USE_BIOS=1 # VBIOS lib is tiny under Neutrino, always include it
-export USE_QNX=1
-export USE_QNXNTO=1
-
-echo Qnx Neutrino console compilation environment set up
diff --git a/board/MAI/bios_emulator/scitech/bin/set-vars-beos.sh b/board/MAI/bios_emulator/scitech/bin/set-vars-beos.sh
deleted file mode 100755
index 0a272d6a46..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/set-vars-beos.sh
+++ /dev/null
@@ -1,42 +0,0 @@
-#! /bin/sh
-
-# BeOS VERSION
-# Set the place where SciTech Software is installed, and where each
-# of the supported compilers is installed. These environment variables
-# are used by the batch files in the SCITECH\BIN directory.
-#
-# Modify the as appropriate for your compiler configuration (you should
-# only need to change things in this batch file).
-#
-# This version is for a normal BeOS installation.
-
-# The SCITECH variable points to where batch files, makefile startups,
-# include files and source files will be found when compiling.
-
-export SCITECH=$MGL_ROOT
-
-# The SCITECH_LIB variable points to where the SciTech libraries live
-# for installation and linking. This allows you to have the source and
-# include files on local machines for compiling and have the libraries
-# located on a common network machine (for network builds).
-
-export SCITECH_LIB=$SCITECH
-
-# The PRIVATE variable points to where private source files reside that
-# do not live in the public source tree
-
-export PRIVATE=$HOME/private
-
-# The following define the locations of all the compilers that you may
-# be using. Change them to reflect where you have installed your
-# compilers.
-
-export GCC_PATH=/boot/develop/tools/gnupro/bin
-
-# Add the Scitech bin path to the current PATH
-export PATH=$SCITECH/bin:$SCITECH/bin-beos:$PATH
-#if [ "x$LIBC" = x ]; then
-# export PATH=$PATH:$SCITECH/bin-beos/glibc
-#else
-# export PATH=$PATH:$SCITECH/bin-beos/libc
-#fi
diff --git a/board/MAI/bios_emulator/scitech/bin/set-vars-freebsd.sh b/board/MAI/bios_emulator/scitech/bin/set-vars-freebsd.sh
deleted file mode 100755
index c920748a7f..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/set-vars-freebsd.sh
+++ /dev/null
@@ -1,37 +0,0 @@
-#! /bin/sh
-
-# LINUX VERSION
-# Set the place where SciTech Software is installed, and where each
-# of the supported compilers is installed. These environment variables
-# are used by the batch files in the SCITECH\BIN directory.
-#
-# Modify the as appropriate for your compiler configuration (you should
-# only need to change things in this batch file).
-#
-# This version is for a normal Linux installation.
-
-# The SCITECH variable points to where batch files, makefile startups,
-# include files and source files will be found when compiling.
-
-export SCITECH=$MGL_ROOT
-
-# The SCITECH_LIB variable points to where the SciTech libraries live
-# for installation and linking. This allows you to have the source and
-# include files on local machines for compiling and have the libraries
-# located on a common network machine (for network builds).
-
-export SCITECH_LIB=$SCITECH
-
-# The PRIVATE variable points to where private source files reside that
-# do not live in the public source tree
-
-export PRIVATE=$HOME/private
-
-# The following define the locations of all the compilers that you may
-# be using. Change them to reflect where you have installed your
-# compilers.
-
-export GCC_PATH=/usr/bin
-
-# Add the Scitech bin path to the current PATH
-export PATH=$SCITECH/bin:$SCITECH/bin-freebsd:$PATH
diff --git a/board/MAI/bios_emulator/scitech/bin/set-vars-linux.sh b/board/MAI/bios_emulator/scitech/bin/set-vars-linux.sh
deleted file mode 100755
index 35cbf1dc16..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/set-vars-linux.sh
+++ /dev/null
@@ -1,43 +0,0 @@
-#! /bin/sh
-
-# LINUX VERSION
-# Set the place where SciTech Software is installed, and where each
-# of the supported compilers is installed. These environment variables
-# are used by the batch files in the SCITECH\BIN directory.
-#
-# Modify the as appropriate for your compiler configuration (you should
-# only need to change things in this batch file).
-#
-# This version is for a normal Linux installation.
-
-# The SCITECH variable points to where batch files, makefile startups,
-# include files and source files will be found when compiling.
-
-export SCITECH=$MGL_ROOT
-
-# The SCITECH_LIB variable points to where the SciTech libraries live
-# for installation and linking. This allows you to have the source and
-# include files on local machines for compiling and have the libraries
-# located on a common network machine (for network builds).
-
-export SCITECH_LIB=$SCITECH
-
-# The PRIVATE variable points to where private source files reside that
-# do not live in the public source tree
-
-export PRIVATE=$HOME/private
-
-# The following define the locations of all the compilers that you may
-# be using. Change them to reflect where you have installed your
-# compilers.
-
-export GCC_PATH=/usr/bin
-export TEMP=/tmp TMP=/tmp
-
-# Add the Scitech bin path to the current PATH
-export PATH=$SCITECH/bin:$SCITECH/bin-linux:$PATH
-if [ "x$LIBC" = x ]; then
- export PATH=$SCITECH/bin-linux/glibc:$PATH
-else
- export PATH=$SCITECH/bin-linux/libc:$PATH
-fi
diff --git a/board/MAI/bios_emulator/scitech/bin/set-vars-qnx.sh b/board/MAI/bios_emulator/scitech/bin/set-vars-qnx.sh
deleted file mode 100755
index 1d73109ea4..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/set-vars-qnx.sh
+++ /dev/null
@@ -1,37 +0,0 @@
-#! /bin/sh
-
-# QNX 4 VERSION
-# Set the place where SciTech Software is installed, and where each
-# of the supported compilers is installed. These environment variables
-# are used by the batch files in the SCITECH\BIN directory.
-#
-# Modify the as appropriate for your compiler configuration (you should
-# only need to change things in this batch file).
-#
-# This version is for a normal Linux installation.
-
-# The SCITECH variable points to where batch files, makefile startups,
-# include files and source files will be found when compiling.
-
-export SCITECH=$MGL_ROOT
-
-# The SCITECH_LIB variable points to where the SciTech libraries live
-# for installation and linking. This allows you to have the source and
-# include files on local machines for compiling and have the libraries
-# located on a common network machine (for network builds).
-
-export SCITECH_LIB=$SCITECH
-
-# The PRIVATE variable points to where private source files reside that
-# do not live in the public source tree
-
-export PRIVATE=$HOME/private
-
-# The following define the locations of all the compilers that you may
-# be using. Change them to reflect where you have installed your
-# compilers.
-
-export WC10_PATH=/usr/watcom/10.6/usr
-
-# Add the Scitech bin path to the current PATH
-export PATH=$SCITECH/bin:$SCITECH/bin-qnx:$PATH
diff --git a/board/MAI/bios_emulator/scitech/bin/set-vars.bat b/board/MAI/bios_emulator/scitech/bin/set-vars.bat
deleted file mode 100755
index 2a2101d4b4..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/set-vars.bat
+++ /dev/null
@@ -1,110 +0,0 @@
-@echo off
-REM:=========================================================================
-REM: Master batch file to set up all necessary environment variables for
-REM: the SciTech makefile utilities. This batch file should be executed
-REM: *first* before any other batch files when you start a command shell.
-REM: You should not need to modify any batch files except this one to
-REM: configure the makefile utilities.
-REM:=========================================================================
-
-REM: Set the place where SciTech Software is installed, and where each
-REM: of the supported compilers is installed. These environment variables
-REM: are used by the batch files in the SCITECH\BIN directory.
-REM:
-REM: Modify the as appropriate for your compiler configuration (you should
-REM: only need to change things in this batch file).
-REM:
-REM: This version is for a normal MSDOS installation.
-
-REM: The SCITECH variable points to where batch files, makefile startups,
-REM: include files and source files will be found when compiling.
-
-SET SCITECH=c:\scitech
-
-REM: The SCITECH_LIB variable points to where the SciTech libraries live
-REM: for installation and linking. This allows you to have the source and
-REM: include files on local machines for compiling and have the libraries
-REM: located on a common network machine (for network builds).
-
-SET SCITECH_LIB=%SCITECH%
-
-REM: The PRIVATE variable points to where private source files reside that
-REM: do not live in the public source tree
-
-SET PRIVATE=c:\private
-
-REM: The following sets up the path to the SciTech command line utilities
-REM: for the development operating system. We select either DOS hosted
-REM: tools or Win32 hosted tools depending on whether you are running
-REM: on NT or not. Windows 9x users can use the Win32 hosted tools but
-REM: they run slower, but you will have long filenames if you do this.
-
-IF .%OS%==.Windows_NT goto Win32_path
-IF NOT .%WINDIR%==. goto Win32_path
-SET SCITECH_BIN=%SCITECH%\bin;%SCITECH%\bin-dos
-goto path_set
-
-REM: The following sets up the path to the SciTech command line utilities
-REM: for the development operating system. This version uses the Win32
-REM: hosted tools by default, so you can use long filenames.
-
-:Win32_path
-SET SCITECH_BIN=%SCITECH%\bin;%SCITECH%\bin-win32
-
-:path_set
-
-REM: Set the TMP variable for dmake if this is not already set
-
-SET TMP=%SCITECH%
-
-REM: Set the following environment variable to use the Netwide Assembler
-REM: (NASM) provided with the MGL tools to build all assembler modules.
-REM: If you have Turbo Assembler 4.0 or later and you wish to use it,
-REM: you can use it by removing the following line.
-
-SET USE_NASM=1
-
-REM: The following is used to set up DDK directories for device driver
-REM: development. They can safely be ignored unless you are using the
-REM: SciTech makefile utilities to build device drivers.
-
-SET DDKDRIVE=c:
-SET MSSDK=c:\c\win32sdk
-SET W95_DDKROOT=c:\c\95ddk
-SET W98_DDKROOT=c:\c\98ddk
-SET NT_DDKROOT=c:\c\ntddk
-SET W2K_DDKROOT=c:\c\2000ddk
-SET MASM_ROOT=c:\c\masm611
-SET VTOOLSD=c:\c\vtd95
-SET SOFTICE_PATH=c:\c\sint
-
-REM: The following define the locations of all the compilers that you may
-REM: be using. Change them to reflect where you have installed your
-REM: compilers.
-
-SET BC3_PATH=c:\c\bc3
-SET BC4_PATH=c:\c\bc45
-SET BC5_PATH=c:\c\bc50
-SET BCB5_PATH=c:\c\bcb50
-SET VC_PATH=c:\c\msvc
-SET VC4_PATH=c:\c\vc42
-SET VC5_PATH=c:\c\vc50
-SET VC6_PATH=c:\c\vc60
-SET SC70_PATH=c:\c\sc75
-SET WC10A_PATH=c:\c\wc10a
-SET WC10_PATH=c:\c\wc10
-SET WC11_PATH=c:\c\wc11
-SET TNT_PATH=c:\c\tnt
-SET DJ_PATH=c:\c\djgpp
-SET GCC2_PATH=c:\unix\usr
-
-REM: The following define the locations of the IDE and compiler path
-REM: tools for Visual C++. If you do a standard installation, you wont
-REM: need to change this. If however you did a custom install and changed
-REM: the paths to these directory, you will need to modify this to suit.
-
-SET VC5_MSDevDir=%VC5_PATH%\sharedide
-SET VC5_MSVCDir=%VC5_PATH%\vc
-SET VC6_MSDevDir=%VC6_PATH%\common\msdev98
-SET VC6_MSVCDir=%VC6_PATH%\vc98
-
diff --git a/board/MAI/bios_emulator/scitech/bin/vc40-c32.bat b/board/MAI/bios_emulator/scitech/bin/vc40-c32.bat
deleted file mode 100755
index 71f7d8e10d..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/vc40-c32.bat
+++ /dev/null
@@ -1,36 +0,0 @@
-@echo off
-REM Setup environment variables for Visual C++ 4.2 32 bit edition
-
-if .%CHECKED%==.1 goto checked_build
-set LIB=%SCITECH_LIB%\LIB\RELEASE\WIN32\VC4;%VC4_PATH%\LIB;%TNT_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-set LIB=%SCITECH_LIB%\LIB\DEBUG\WIN32\VC4;%VC4_PATH%\LIB;%TNT_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-set TOOLROOTDIR=%VC4_PATH%
-set C_INCLUDE=%VC4_PATH%\INCLUDE;%TNT_PATH%\INCLUDE;
-set INCLUDE=.;INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%C_INCLUDE%
-set INIT=%VC4_PATH%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\VC32.MK
-SET USE_TNT=
-SET USE_WIN16=
-SET USE_WIN32=1
-SET WIN32_GUI=
-SET USE_VXD=
-SET USE_NTDRV=
-SET USE_RTTARGET=
-SET USE_SNAP=
-SET VC_LIBBASE=VC4
-PATH %SCITECH_BIN%;%VC4_PATH%\BIN;%TNT_PATH%\BIN;%DEFPATH%%VC32_CD_PATH%
-
-REM: Enable Win32 SDK if desired (sdk on command line)
-if NOT .%1%==.sdk goto done
-call win32sdk.bat
-
-:done
-echo Visual C++ 4.2 32 bit Windows compilation environment set up
diff --git a/board/MAI/bios_emulator/scitech/bin/vc40-d16.bat b/board/MAI/bios_emulator/scitech/bin/vc40-d16.bat
deleted file mode 100755
index 9817493e37..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/vc40-d16.bat
+++ /dev/null
@@ -1,27 +0,0 @@
-@echo off
-REM Setup environment variables for Visual C++ 1.52c 16 bit edition
-
-if .%CHECKED%==.1 goto checked_build
-set LIB=%SCITECH_LIB%\LIB\RELEASE\DOS16\VC4;%VC_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-set LIB=%SCITECH_LIB%\LIB\DEBUG\DOS16\VC4;%VC_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-set TOOLROOTDIR=%VC_PATH%
-set INCLUDE=.;INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%VC_PATH%\INCLUDE;
-set INIT=%VC_PATH%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\VC16.MK
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_RTTARGET=
-SET USE_SNAP=
-SET VC_LIBBASE=VC4
-PATH %SCITECH_BIN%;%VC_PATH%\BIN;%DEFPATH%%VC_CD_PATH%
-
-echo Visual C++ 1.52c 16 DOS bit compilation environment set up.
-
diff --git a/board/MAI/bios_emulator/scitech/bin/vc40-drv9x.bat b/board/MAI/bios_emulator/scitech/bin/vc40-drv9x.bat
deleted file mode 100755
index 62e35214e9..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/vc40-drv9x.bat
+++ /dev/null
@@ -1,21 +0,0 @@
-@echo off
-REM Setup environment variables for Visual C++ 4.2 32 bit edition
-
-REM: First setup for Win32 console development
-call vc40-c32.bat > NUL
-
-REM: Extra stuff to set up for Windows 9x DDK development
-set MASTER_MAKE=1
-set DDKROOT=%W95_DDKROOT%
-set SDKROOT=%MSSDK%
-set C16_ROOT=%VC_PATH%
-set C32_ROOT=%VC4_PATH%
-
-if .%CHECKED%==.1 goto checked_build
-echo Release build enabled.
-goto done
-:checked_build
-echo Checked debug build enabled.
-goto done
-:done
-echo Visual C++ 4.2 Windows 9x driver compilation environment set up
diff --git a/board/MAI/bios_emulator/scitech/bin/vc40-drvnt.bat b/board/MAI/bios_emulator/scitech/bin/vc40-drvnt.bat
deleted file mode 100755
index 83b67802df..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/vc40-drvnt.bat
+++ /dev/null
@@ -1,18 +0,0 @@
-@echo off
-REM Setup environment variables for Visual C++ 4.2 32 bit edition
-
-REM: First setup for Win32 console development (with Platform SDK)
-call vc40-c32.bat sdk > NUL
-
-REM: Extra stuff to set up for Windows NT DDK development
-SET BASEDIR=%NT_DDKROOT%
-SET PATH=%NT_DDKROOT%\bin;%PATH%
-
-if .%CHECKED%==.1 goto checked_build
-echo Release build enabled.
-goto done
-:checked_build
-echo Checked debug build enabled.
-goto done
-:done
-echo Visual C++ 4.2 Windows NT driver compilation environment set up
diff --git a/board/MAI/bios_emulator/scitech/bin/vc40-snp.bat b/board/MAI/bios_emulator/scitech/bin/vc40-snp.bat
deleted file mode 100755
index 7997044f82..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/vc40-snp.bat
+++ /dev/null
@@ -1,31 +0,0 @@
-@echo off
-REM Setup environment variables for Visual C++ 4.2 32 bit edition
-
-if .%CHECKED%==.1 goto checked_build
-set LIB=%SCITECH_LIB%\LIB\RELEASE\SNAP\VC4;%VC4_PATH%\LIB;%TNT_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-set LIB=%SCITECH_LIB%\LIB\DEBUG\SNAP\VC4;%VC4_PATH%\LIB;%TNT_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-set TOOLROOTDIR=%VC4_PATH%
-set INCLUDE=.;INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE
-set INIT=%VC4_PATH%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\VC32.MK
-SET USE_TNT=
-SET USE_WIN16=
-SET USE_WIN32=
-SET WIN32_GUI=
-SET USE_VXD=
-SET USE_NTDRV=
-SET USE_RTTARGET=
-SET USE_SNAP=1
-SET VC_LIBBASE=VC4
-PATH %SCITECH_BIN%;%VC4_PATH%\BIN;%TNT_PATH%\BIN;%DEFPATH%%VC32_CD_PATH%
-
-echo Visual C++ 4.2 Snap compilation environment set up
-
diff --git a/board/MAI/bios_emulator/scitech/bin/vc40-tnt.bat b/board/MAI/bios_emulator/scitech/bin/vc40-tnt.bat
deleted file mode 100755
index b0fc93675b..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/vc40-tnt.bat
+++ /dev/null
@@ -1,42 +0,0 @@
-@echo off
-REM Setup environment variables for Visual C++ 4.2 32 bit edition
-
-if .%CHECKED%==.1 goto checked_build
-set LIB=%SCITECH_LIB%\LIB\RELEASE\DOS32\VC4;%VC4_PATH%\LIB;%TNT_PATH%\COFFLIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-set LIB=%SCITECH_LIB%\LIB\DEBUG\DOS32\VC4;%VC4_PATH%\LIB;%TNT_PATH%\COFFLIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-set TOOLROOTDIR=%VC4_PATH%
-set INCLUDE=.;INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%VC4_PATH%\INCLUDE;%TNT_PATH%\INCLUDE;
-set INIT=%VC4_PATH%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\VC32.MK
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_TNT=
-SET USE_VXD=
-SET USE_NTDRV=
-SET USE_RTTARGET=
-SET USE_SNAP=
-SET VC_LIBBASE=VC4
-PATH %SCITECH_BIN%;%VC4_PATH%\BIN;%TNT_PATH%\BIN;%DEFPATH%%VC32_CD_PATH%
-
-REM If you set the following to a 1, a TNT DosStyle app will be created.
-REM Otherwise a TNT NtStyle app will be created. NtStyle apps will *only*
-REM run under real DOS when using our libraries, since we require access
-REM to functions that the Win32 API does not support (such as direct access
-REM to video memory, calling Int 10h BIOS functions etc). DosStyle apps
-REM will however run fine in both DOS and a Win95 DOS box (NT DOS boxes don't
-REM work too well).
-REM
-REM If you are using the RealTime DOS extender, your apps *must* be NtStyle,
-REM and hence will never be able to run under Win95 or WinNT, only DOS.
-
-SET DOSSTYLE=
-
-echo Visual C++ 4.2 32-bit DOS compilation environment set up (TNT).
diff --git a/board/MAI/bios_emulator/scitech/bin/vc40-w16.bat b/board/MAI/bios_emulator/scitech/bin/vc40-w16.bat
deleted file mode 100755
index 2849a20e75..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/vc40-w16.bat
+++ /dev/null
@@ -1,26 +0,0 @@
-@echo off
-REM Setup environment variables for Visual C++ 1.52c 16 bit edition
-
-if .%CHECKED%==.1 goto checked_build
-set LIB=%SCITECH_LIB%\LIB\RELEASE\WIN16\VC4;%VC_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-set LIB=%SCITECH_LIB%\LIB\DEBUG\WIN16\VC4;%VC_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-set TOOLROOTDIR=%VC_PATH%
-set INCLUDE=.;INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%VC_PATH%\INCLUDE;
-set INIT=%VC_PATH%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\VC16.MK
-SET USE_WIN16=1
-SET USE_WIN32=
-SET VC_LIBBASE=VC4
-SET USE_RTTARGET=
-SET USE_SNAP=
-PATH %SCITECH_BIN%;%VC_PATH%\BIN;%DEFPATH%%VC_CD_PATH%
-
-echo Visual C++ 1.52c 16 bit Windows compilation environment set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/vc40-w32.bat b/board/MAI/bios_emulator/scitech/bin/vc40-w32.bat
deleted file mode 100755
index d93a6246e3..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/vc40-w32.bat
+++ /dev/null
@@ -1,37 +0,0 @@
-@echo off
-REM Setup environment variables for Visual C++ 4.2 32 bit edition
-
-if .%CHECKED%==.1 goto checked_build
-set LIB=%SCITECH_LIB%\LIB\RELEASE\WIN32\VC4;%VC4_PATH%\LIB;%TNT_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-set LIB=%SCITECH_LIB%\LIB\DEBUG\WIN32\VC4;%VC4_PATH%\LIB;%TNT_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-set TOOLROOTDIR=%VC4_PATH%
-set C_INCLUDE=%VC4_PATH%\INCLUDE;%TNT_PATH%\INCLUDE;
-set INCLUDE=.;INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%C_INCLUDE%
-set INIT=%VC4_PATH%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\VC32.MK
-SET USE_TNT=
-SET USE_WIN16=
-SET USE_WIN32=1
-SET WIN32_GUI=1
-SET USE_VXD=
-SET USE_NTDRV=
-SET USE_RTTARGET=
-SET USE_SNAP=
-SET VC_LIBBASE=VC4
-PATH %SCITECH_BIN%;%VC4_PATH%\BIN;%TNT_PATH%\BIN;%DEFPATH%%VC32_CD_PATH%
-
-REM: Enable Win32 SDK if desired (sdk on command line)
-if NOT .%1%==.sdk goto done
-call win32sdk.bat
-
-:done
-echo Visual C++ 4.2 32 bit Windows compilation environment set up
-
diff --git a/board/MAI/bios_emulator/scitech/bin/vc40-x11.bat b/board/MAI/bios_emulator/scitech/bin/vc40-x11.bat
deleted file mode 100755
index a420a54eab..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/vc40-x11.bat
+++ /dev/null
@@ -1,20 +0,0 @@
-@echo off
-REM Setup environment variables for Visual C++ 4.2 32 bit edition
-
-SET LIB=%VC4_PATH%\LIB;.
-SET TOOLROOTDIR=%VC4_PATH%
-SET INCLUDE=\xc\include;%VC4_PATH%\INCLUDE
-SET INIT=%VC4_PATH%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\VC32.MK
-SET USE_TNT=
-SET USE_WIN16=
-SET USE_WIN32=1
-SET WIN32_GUI=1
-SET USE_VXD=
-SET USE_NTDRV=
-SET USE_RTTARGET=
-SET USE_SNAP=
-SET VC_LIBBASE=VC4
-PATH %SCITECH_BIN%;%VC4_PATH%\BIN;%DEFPATH%
-
-echo Visual C++ 4.2 X11 compilation environment set up
diff --git a/board/MAI/bios_emulator/scitech/bin/vc50-c32.bat b/board/MAI/bios_emulator/scitech/bin/vc50-c32.bat
deleted file mode 100755
index 62d27b9bc7..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/vc50-c32.bat
+++ /dev/null
@@ -1,39 +0,0 @@
-@echo off
-REM Setup environment variables for Visual C++ 5.0 32 bit edition
-
-SET MSDevDir=%VC5_MSDevDir%
-SET MSVCDir=%VC5_MSVCDir%
-
-if .%CHECKED%==.1 goto checked_build
-set LIB=%SCITECH_LIB%\LIB\RELEASE\WIN32\VC5;%MSVCDir%\LIB;%TNT_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-set LIB=%SCITECH_LIB%\LIB\DEBUG\WIN32\VC5;%MSVCDir%\LIB;%TNT_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-set TOOLROOTDIR=%MSVCDir%
-set C_INCLUDE=%MSVCDir%\INCLUDE;%TNT_PATH%\INCLUDE;
-set INCLUDE=.;INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%C_INCLUDE%
-set INIT=%MSVCDir%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\VC32.MK
-SET USE_TNT=
-SET USE_WIN16=
-SET USE_WIN32=1
-SET WIN32_GUI=
-SET USE_VXD=
-SET USE_NTDRV=
-SET USE_RTTARGET=
-SET USE_SNAP=
-SET VC_LIBBASE=vc5
-PATH %SCITECH_BIN%;%MSVCDir%\BIN;%MSDevDir%\BIN;%TNT_PATH%\BIN;%DEFPATH%%VC32_CD_PATH%
-
-REM: Enable Win32 SDK if desired (sdk on command line)
-if NOT .%1%==.sdk goto done
-call win32sdk.bat
-
-:done
-echo Visual C++ 5.0 32-bit Windows console compilation environment set up
diff --git a/board/MAI/bios_emulator/scitech/bin/vc50-d16.bat b/board/MAI/bios_emulator/scitech/bin/vc50-d16.bat
deleted file mode 100755
index c789c5037d..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/vc50-d16.bat
+++ /dev/null
@@ -1,26 +0,0 @@
-@echo off
-REM Setup environment variables for Visual C++ 1.52c 16 bit edition
-
-if .%CHECKED%==.1 goto checked_build
-set LIB=%SCITECH_LIB%\LIB\RELEASE\DOS16\VC5;%VC_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-set LIB=%SCITECH_LIB%\LIB\DEBUG\DOS16\VC5;%VC_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-set TOOLROOTDIR=%VC_PATH%
-set INCLUDE=.;INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%VC_PATH%\INCLUDE;
-set INIT=%VC_PATH%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\VC16.MK
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_RTTARGET=
-SET USE_SNAP=
-SET VC_LIBBASE=vc5
-PATH %SCITECH_BIN%;%VC_PATH%\BIN;%DEFPATH%%VC_CD_PATH%
-
-echo Visual C++ 1.52c 16-bit DOS compilation environment set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/vc50-drv9x.bat b/board/MAI/bios_emulator/scitech/bin/vc50-drv9x.bat
deleted file mode 100755
index 27a4a1439f..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/vc50-drv9x.bat
+++ /dev/null
@@ -1,21 +0,0 @@
-@echo off
-REM Setup environment variables for Visual C++ 6.0 32 bit edition
-
-REM: First setup for Win32 console development
-call vc60-c32.bat > NUL
-
-REM: Extra stuff to set up for Windows 9x DDK development
-set MASTER_MAKE=1
-set DDKROOT=%W95_DDKROOT%
-set SDKROOT=%MSSDK%
-set C16_ROOT=%VC_PATH%
-set C32_ROOT=%VC6_PATH%
-
-if .%CHECKED%==.1 goto checked_build
-echo Release build enabled.
-goto done
-:checked_build
-echo Checked debug build enabled.
-goto done
-:done
-echo Visual C++ 6.0 Windows 9x driver compilation environment set up
diff --git a/board/MAI/bios_emulator/scitech/bin/vc50-drvnt.bat b/board/MAI/bios_emulator/scitech/bin/vc50-drvnt.bat
deleted file mode 100755
index 17b2f25cc7..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/vc50-drvnt.bat
+++ /dev/null
@@ -1,17 +0,0 @@
-@echo off
-REM Setup environment variables for Visual C++ 6.0 32 bit edition
-
-REM: First setup for Win32 console development (with Platform SDK)
-call vc60-c32.bat sdk > NUL
-
-REM: Now setup stuff for the NT DDK build environment
-call ntddk.bat
-
-if .%CHECKED%==.1 goto checked_build
-echo Release build enabled.
-goto done
-:checked_build
-echo Checked debug build enabled.
-goto done
-:done
-echo Visual C++ 6.0 Windows NT driver compilation environment set up
diff --git a/board/MAI/bios_emulator/scitech/bin/vc50-rtt.bat b/board/MAI/bios_emulator/scitech/bin/vc50-rtt.bat
deleted file mode 100755
index afb2fb186a..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/vc50-rtt.bat
+++ /dev/null
@@ -1,30 +0,0 @@
-@echo off
-REM Setup environment variables for Visual C++ 5.0 32 bit edition
-
-if .%CHECKED%==.1 goto checked_build
-set LIB=%SCITECH_LIB%\LIB\RELEASE\WIN32\VC5;%VC5_PATH%\VC\LIB;%TNT_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-set LIB=%SCITECH_LIB%\LIB\DEBUG\WIN32\VC5;%VC5_PATH%\VC\LIB;%TNT_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-set TOOLROOTDIR=%VC5_PATH%\VC
-set INCLUDE=.;INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%VC5_PATH%\VC\INCLUDE;%TNT_PATH%\INCLUDE;
-set INIT=%VC5_PATH%\VC
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\VC32.MK
-SET USE_TNT=
-SET USE_WIN16=
-SET USE_WIN32=
-SET WIN32_GUI=
-SET USE_VXD=
-SET USE_NTDRV=
-SET USE_RTTARGET=1
-SET USE_SNAP=
-SET VC_LIBBASE=vc5
-PATH %SCITECH_BIN%;%VC5_PATH%\VC\BIN;%VC5_PATH%\SHAREDIDE\BIN;%TNT_PATH%\BIN;%DEFPATH%%VC32_CD_PATH%
-
-echo Visual C++ 5.0 RTTarget-32 compilation environment set up
diff --git a/board/MAI/bios_emulator/scitech/bin/vc50-snp.bat b/board/MAI/bios_emulator/scitech/bin/vc50-snp.bat
deleted file mode 100755
index 22d2e13c26..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/vc50-snp.bat
+++ /dev/null
@@ -1,33 +0,0 @@
-@echo off REM Setup environment variables for Visual C++ 5.0 32 bit
-edition
-
-SET MSDevDir=%VC5_MSDevDir%
-SET MSVCDir=%VC5_MSVCDir%
-
-if .%CHECKED%==.1 goto checked_build
-set LIB=%SCITECH_LIB%\LIB\RELEASE\SNAP\VC5;%MSVCDir%\LIB;%TNT_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-set LIB=%SCITECH_LIB%\LIB\DEBUG\SNAP\VC5;%MSVCDir%\LIB;%TNT_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-set TOOLROOTDIR=%MSVCDir%
-set INCLUDE=.;INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE
-set INIT=%MSVCDir%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\VC32.MK
-SET USE_TNT=
-SET USE_WIN16=
-SET USE_WIN32=
-SET WIN32_GUI=
-SET USE_VXD=
-SET USE_NTDRV=
-SET USE_RTTARGET=
-SET USE_SNAP=1
-SET VC_LIBBASE=vc5
-PATH %SCITECH_BIN%;%MSVCDir%\BIN;%MSDevDir%\BIN;%TNT_PATH%\BIN;%DEFPATH%%VC32_CD_PATH%
-
-echo Visual C++ 5.0 Snap compilation environment set up
diff --git a/board/MAI/bios_emulator/scitech/bin/vc50-tnt.bat b/board/MAI/bios_emulator/scitech/bin/vc50-tnt.bat
deleted file mode 100755
index 6b09199054..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/vc50-tnt.bat
+++ /dev/null
@@ -1,42 +0,0 @@
-@echo off
-REM Setup environment variables for Visual C++ 5.0 32 bit edition
-
-if .%CHECKED%==.1 goto checked_build
-set LIB=%SCITECH_LIB%\LIB\RELEASE\DOS32\VC5;%VC5_PATH%\VC\LIB;%TNT_PATH%\COFFLIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-set LIB=%SCITECH_LIB%\LIB\RELEASE\DOS32\VC5;%VC5_PATH%\VC\LIB;%TNT_PATH%\COFFLIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-set TOOLROOTDIR=%VC5_PATH%\VC
-set INCLUDE=.;INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%VC5_PATH%\VC\INCLUDE;%TNT_PATH%\INCLUDE;
-set INIT=%VC5_PATH%\VC
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\VC32.MK
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_TNT=
-SET USE_VXD=
-SET USE_NTDRV=
-SET USE_RTTARGET=
-SET USE_SNAP=
-SET VC_LIBBASE=vc5
-PATH %SCITECH_BIN%;%VC5_PATH%\VC\BIN;%VC5_PATH%\SHAREDIDE\BIN;%TNT_PATH%\BIN;%DEFPATH%%VC32_CD_PATH%
-
-REM If you set the following to a 1, a TNT DosStyle app will be created.
-REM Otherwise a TNT NtStyle app will be created. NtStyle apps will *only*
-REM run under real DOS when using our libraries, since we require access
-REM to functions that the Win32 API does not support (such as direct access
-REM to video memory, calling Int 10h BIOS functions etc). DosStyle apps
-REM will however run fine in both DOS and a Win95 DOS box (NT DOS boxes don't
-REM work too well).
-REM
-REM If you are using the RealTime DOS extender, your apps *must* be NtStyle,
-REM and hence will never be able to run under Win95 or WinNT, only DOS.
-
-SET DOSSTYLE=
-
-echo Visual C++ 5.0 32-bit compilation environment set up (with TNT).
diff --git a/board/MAI/bios_emulator/scitech/bin/vc50-w16.bat b/board/MAI/bios_emulator/scitech/bin/vc50-w16.bat
deleted file mode 100755
index 52ab495a3b..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/vc50-w16.bat
+++ /dev/null
@@ -1,27 +0,0 @@
-@echo off
-REM Setup environment variables for Visual C++ 1.52c 16 bit edition
-
-if .%CHECKED%==.1 goto checked_build
-set LIB=%SCITECH_LIB%\LIB\RELEASE\WIN16\VC5;%VC_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-set LIB=%SCITECH_LIB%\LIB\DEBUG\WIN16\VC5;%VC_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-set TOOLROOTDIR=%VC_PATH%
-set INCLUDE=.;INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%VC_PATH%\INCLUDE;
-set INIT=%VC_PATH%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\VC16.MK
-SET USE_WIN16=1
-SET USE_WIN32=
-SET USE_RTTARGET=
-SET USE_SNAP=
-SET VC_LIBBASE=vc5
-PATH %SCITECH_BIN%;%VC_PATH%\BIN;%DEFPATH%%VC_CD_PATH%
-
-echo Visual C++ 1.52c 16-bit Windows compilation environment set up.
-
diff --git a/board/MAI/bios_emulator/scitech/bin/vc50-w32.bat b/board/MAI/bios_emulator/scitech/bin/vc50-w32.bat
deleted file mode 100755
index 07bc5e51df..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/vc50-w32.bat
+++ /dev/null
@@ -1,39 +0,0 @@
-@echo off
-REM Setup environment variables for Visual C++ 5.0 32 bit edition
-
-SET MSDevDir=%VC5_MSDevDir%
-SET MSVCDir=%VC5_MSVCDir%
-
-if .%CHECKED%==.1 goto checked_build
-set LIB=%SCITECH_LIB%\LIB\RELEASE\WIN32\VC5;%MSVCDir%\LIB;%TNT_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-set LIB=%SCITECH_LIB%\LIB\DEBUG\WIN32\VC5;%MSVCDir%\LIB;%TNT_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-set TOOLROOTDIR=%MSVCDir%
-set C_INCLUDE=%MSVCDir%\INCLUDE;%TNT_PATH%\INCLUDE;
-set INCLUDE=.;INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%C_INCLUDE%
-set INIT=%MSVCDir%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\VC32.MK
-SET USE_TNT=
-SET USE_WIN16=
-SET USE_WIN32=1
-SET WIN32_GUI=1
-SET USE_VXD=
-SET USE_NTDRV=
-SET USE_RTTARGET=
-SET USE_SNAP=
-SET VC_LIBBASE=vc5
-PATH %SCITECH_BIN%;%MSVCDir%\BIN;%MSDevDir%\BIN;%TNT_PATH%\BIN;%DEFPATH%%VC32_CD_PATH%
-
-REM: Enable Win32 SDK if desired (sdk on command line)
-if NOT .%1%==.sdk goto done
-call win32sdk.bat
-
-:done
-echo Visual C++ 5.0 32-bit Windows console compilation environment set up
diff --git a/board/MAI/bios_emulator/scitech/bin/vc50-x11.bat b/board/MAI/bios_emulator/scitech/bin/vc50-x11.bat
deleted file mode 100755
index fe286bd95d..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/vc50-x11.bat
+++ /dev/null
@@ -1,20 +0,0 @@
-@echo off
-REM Setup environment variables for Visual C++ 5.0 32 bit edition
-
-SET LIB=%VC5_PATH%\VC\LIB;.
-SET TOOLROOTDIR=%VC5_PATH%\VC
-SET INCLUDE=\xc\include;%VC5_PATH%\VC\INCLUDE
-SET INIT=%VC5_PATH%\VC
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\VC32.MK
-SET USE_TNT=
-SET USE_WIN16=
-SET USE_WIN32=1
-SET WIN32_GUI=1
-SET USE_VXD=
-SET USE_NTDRV=
-SET USE_RTTARGET=
-SET USE_SNAP=
-SET VC_LIBBASE=vc5
-PATH %SCITECH_BIN%;%VC5_PATH%\VC\BIN;%VC5_PATH%\SHAREDIDE\BIN;%DEFPATH%
-
-echo Visual C++ 5.0 X11 compilation environment set up
diff --git a/board/MAI/bios_emulator/scitech/bin/vc60-c32.bat b/board/MAI/bios_emulator/scitech/bin/vc60-c32.bat
deleted file mode 100755
index e98417d613..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/vc60-c32.bat
+++ /dev/null
@@ -1,39 +0,0 @@
-@echo off
-REM Setup environment variables for Visual C++ 6.0 32 bit edition
-
-SET MSDevDir=%VC6_MSDevDir%
-SET MSVCDir=%VC6_MSVCDir%
-
-if .%CHECKED%==.1 goto checked_build
-set LIB=%SCITECH_LIB%\LIB\RELEASE\WIN32\VC6;%MSVCDir%\LIB;%TNT_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-set LIB=%SCITECH_LIB%\LIB\DEBUG\WIN32\VC6;%MSVCDir%\LIB;%TNT_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-set TOOLROOTDIR=%MSVCDir%
-set C_INCLUDE=%MSVCDir%\INCLUDE;%TNT_PATH%\INCLUDE
-set INCLUDE=.;INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%C_INCLUDE%
-set INIT=%MSVCDir%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\VC32.MK
-SET USE_TNT=
-SET USE_WIN16=
-SET USE_WIN32=1
-SET WIN32_GUI=
-SET USE_VXD=
-SET USE_NTDRV=
-SET USE_RTTARGET=
-SET USE_SNAP=
-SET VC_LIBBASE=vc6
-PATH %SCITECH_BIN%;%MSVCDir%\BIN;%MSDevDir%\BIN;%TNT_PATH%\BIN;%DEFPATH%%VC32_CD_PATH%
-
-REM: Enable Win32 SDK if desired (sdk on command line)
-if NOT .%1%==.sdk goto done
-call win32sdk.bat
-
-:done
-echo Visual C++ 6.0 32-bit Windows console compilation environment set up
diff --git a/board/MAI/bios_emulator/scitech/bin/vc60-d16.bat b/board/MAI/bios_emulator/scitech/bin/vc60-d16.bat
deleted file mode 100755
index 10855e06cb..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/vc60-d16.bat
+++ /dev/null
@@ -1,26 +0,0 @@
-@echo off
-REM Setup environment variables for Visual C++ 1.52c 16 bit edition
-
-if .%CHECKED%==.1 goto checked_build
-set LIB=%SCITECH_LIB%\LIB\RELEASE\DOS16\VC6;%VC_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-set LIB=%SCITECH_LIB%\LIB\DEBUG\DOS16\VC6;%VC_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-set TOOLROOTDIR=%VC_PATH%
-set INCLUDE=.;INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%VC_PATH%\INCLUDE;
-set INIT=%VC_PATH%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\VC16.MK
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_RTTARGET=
-SET USE_SNAP=
-SET VC_LIBBASE=vc6
-PATH %SCITECH_BIN%;%VC_PATH%\BIN;%DEFPATH%%VC_CD_PATH%
-
-echo Visual C++ 1.52c 16-bit DOS compilation environment set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/vc60-drv9x.bat b/board/MAI/bios_emulator/scitech/bin/vc60-drv9x.bat
deleted file mode 100755
index 27a4a1439f..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/vc60-drv9x.bat
+++ /dev/null
@@ -1,21 +0,0 @@
-@echo off
-REM Setup environment variables for Visual C++ 6.0 32 bit edition
-
-REM: First setup for Win32 console development
-call vc60-c32.bat > NUL
-
-REM: Extra stuff to set up for Windows 9x DDK development
-set MASTER_MAKE=1
-set DDKROOT=%W95_DDKROOT%
-set SDKROOT=%MSSDK%
-set C16_ROOT=%VC_PATH%
-set C32_ROOT=%VC6_PATH%
-
-if .%CHECKED%==.1 goto checked_build
-echo Release build enabled.
-goto done
-:checked_build
-echo Checked debug build enabled.
-goto done
-:done
-echo Visual C++ 6.0 Windows 9x driver compilation environment set up
diff --git a/board/MAI/bios_emulator/scitech/bin/vc60-drvnt.bat b/board/MAI/bios_emulator/scitech/bin/vc60-drvnt.bat
deleted file mode 100755
index 17b2f25cc7..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/vc60-drvnt.bat
+++ /dev/null
@@ -1,17 +0,0 @@
-@echo off
-REM Setup environment variables for Visual C++ 6.0 32 bit edition
-
-REM: First setup for Win32 console development (with Platform SDK)
-call vc60-c32.bat sdk > NUL
-
-REM: Now setup stuff for the NT DDK build environment
-call ntddk.bat
-
-if .%CHECKED%==.1 goto checked_build
-echo Release build enabled.
-goto done
-:checked_build
-echo Checked debug build enabled.
-goto done
-:done
-echo Visual C++ 6.0 Windows NT driver compilation environment set up
diff --git a/board/MAI/bios_emulator/scitech/bin/vc60-drvw2k.bat b/board/MAI/bios_emulator/scitech/bin/vc60-drvw2k.bat
deleted file mode 100755
index f304293270..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/vc60-drvw2k.bat
+++ /dev/null
@@ -1,17 +0,0 @@
-@echo off
-REM Setup environment variables for Visual C++ 6.0 32 bit edition
-
-REM: First setup for Win32 console development (with Platform SDK)
-call vc60-c32.bat sdk > NUL
-
-REM: Now setup stuff for the NT DDK build environment
-call w2kddk.bat
-
-if .%CHECKED%==.1 goto checked_build
-echo Release build enabled.
-goto done
-:checked_build
-echo Checked debug build enabled.
-goto done
-:done
-echo Visual C++ 6.0 Windows Windows 2000 driver compilation environment set up
diff --git a/board/MAI/bios_emulator/scitech/bin/vc60-snp.bat b/board/MAI/bios_emulator/scitech/bin/vc60-snp.bat
deleted file mode 100755
index 5348ef9521..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/vc60-snp.bat
+++ /dev/null
@@ -1,33 +0,0 @@
-@echo off
-REM Setup environment variables for Visual C++ 6.0 32 bit edition
-
-SET MSDevDir=%VC6_MSDevDir%
-SET MSVCDir=%VC6_MSVCDir%
-
-if .%CHECKED%==.1 goto checked_build
-set LIB=%SCITECH_LIB%\LIB\RELEASE\SNAP\VC6;%MSVCDir%\LIB;%TNT_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-set LIB=%SCITECH_LIB%\LIB\DEBUG\SNAP\VC6;%MSVCDir%\LIB;%TNT_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-set TOOLROOTDIR=%MSVCDir%
-set INCLUDE=.;INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE
-set INIT=%MSVCDir%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\VC32.MK
-SET USE_TNT=
-SET USE_WIN16=
-SET USE_WIN32=
-SET WIN32_GUI=
-SET USE_VXD=
-SET USE_NTDRV=
-SET USE_RTTARGET=
-SET USE_SNAP=1
-SET VC_LIBBASE=vc6
-PATH %SCITECH_BIN%;%MSVCDir%\BIN;%MSDevDir%\BIN;%TNT_PATH%\BIN;%DEFPATH%%VC32_CD_PATH%
-
-echo Visual C++ 6.0 Snap compilation environment set up
diff --git a/board/MAI/bios_emulator/scitech/bin/vc60-tnt.bat b/board/MAI/bios_emulator/scitech/bin/vc60-tnt.bat
deleted file mode 100755
index 1d8b5e3038..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/vc60-tnt.bat
+++ /dev/null
@@ -1,42 +0,0 @@
-@echo off
-REM Setup environment variables for Visual C++ 6.0 32 bit edition
-
-if .%CHECKED%==.1 goto checked_build
-set LIB=%SCITECH_LIB%\LIB\RELEASE\DOS32\VC6;%VC6_PATH%\VC98\LIB;%TNT_PATH%\COFFLIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-set LIB=%SCITECH_LIB%\LIB\RELEASE\DOS32\VC6;%VC6_PATH%\VC98\LIB;%TNT_PATH%\COFFLIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-set TOOLROOTDIR=%VC6_PATH%\VC98
-set INCLUDE=.;INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%VC6_PATH%\VC98\INCLUDE;%TNT_PATH%\INCLUDE;
-set INIT=%VC6_PATH%\VC98
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\VC32.MK
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_TNT=
-SET USE_VXD=
-SET USE_NTDRV=
-SET USE_RTTARGET=
-SET USE_SNAP=
-SET VC_LIBBASE=vc6 PATH
-%SCITECH_BIN%;%VC6_PATH%\VC98\BIN;%VC6_PATH%\COMMON\MSDEV98\BIN;%TNT_PATH%\BIN;%DEFPATH%%VC32_CD_PATH%
-
-REM If you set the following to a 1, a TNT DosStyle app will be created.
-REM Otherwise a TNT NtStyle app will be created. NtStyle apps will *only*
-REM run under real DOS when using our libraries, since we require access
-REM to functions that the Win32 API does not support (such as direct access
-REM to video memory, calling Int 10h BIOS functions etc). DosStyle apps
-REM will however run fine in both DOS and a Win95 DOS box (NT DOS boxes don't
-REM work too well).
-REM
-REM If you are using the RealTime DOS extender, your apps *must* be NtStyle,
-REM and hence will never be able to run under Win95 or WinNT, only DOS.
-
-SET DOSSTYLE=
-
-echo Visual C++ 6.0 32-bit compilation environment set up (with TNT).
diff --git a/board/MAI/bios_emulator/scitech/bin/vc60-w16.bat b/board/MAI/bios_emulator/scitech/bin/vc60-w16.bat
deleted file mode 100755
index 70175c37ab..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/vc60-w16.bat
+++ /dev/null
@@ -1,27 +0,0 @@
-@echo off
-REM Setup environment variables for Visual C++ 1.52c 16 bit edition
-
-if .%CHECKED%==.1 goto checked_build
-set LIB=%SCITECH_LIB%\LIB\RELEASE\WIN16\VC6;%VC_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-set LIB=%SCITECH_LIB%\LIB\DEBUG\WIN16\VC6;%VC_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-set TOOLROOTDIR=%VC_PATH%
-set INCLUDE=.;INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%VC_PATH%\INCLUDE;
-set INIT=%VC_PATH%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\VC16.MK
-SET USE_WIN16=1
-SET USE_WIN32=
-SET USE_RTTARGET=
-SET USE_SNAP=
-SET VC_LIBBASE=vc6
-PATH %SCITECH_BIN%;%VC_PATH%\BIN;%DEFPATH%%VC_CD_PATH%
-
-echo Visual C++ 1.52c 16-bit Windows compilation environment set up.
-
diff --git a/board/MAI/bios_emulator/scitech/bin/vc60-w32.bat b/board/MAI/bios_emulator/scitech/bin/vc60-w32.bat
deleted file mode 100755
index 2f8e7ab9b8..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/vc60-w32.bat
+++ /dev/null
@@ -1,39 +0,0 @@
-@echo off
-REM Setup environment variables for Visual C++ 6.0 32 bit edition
-
-SET MSDevDir=%VC6_MSDevDir%
-SET MSVCDir=%VC6_MSVCDir%
-
-if .%CHECKED%==.1 goto checked_build
-set LIB=%SCITECH_LIB%\LIB\RELEASE\WIN32\VC6;%MSVCDir%\LIB;%TNT_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-set LIB=%SCITECH_LIB%\LIB\DEBUG\WIN32\VC6;%MSVCDir%\LIB;%TNT_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-set TOOLROOTDIR=%MSVCDir%
-set C_INCLUDE=%MSVCDir%\INCLUDE;%TNT_PATH%\INCLUDE
-set INCLUDE=.;INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%C_INCLUDE%
-set INIT=%MSVCDir%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\VC32.MK
-SET USE_TNT=
-SET USE_WIN16=
-SET USE_WIN32=1
-SET WIN32_GUI=1
-SET USE_VXD=
-SET USE_NTDRV=
-SET USE_RTTARGET=
-SET USE_SNAP=
-SET VC_LIBBASE=vc6
-PATH %SCITECH_BIN%;%MSVCDir%\BIN;%MSDevDir%\BIN;%TNT_PATH%\BIN;%DEFPATH%%VC32_CD_PATH%
-
-REM: Enable Win32 SDK if desired (sdk on command line)
-if NOT .%1%==.sdk goto done
-call win32sdk.bat
-
-:done
-echo Visual C++ 6.0 32-bit Windows compilation environment set up
diff --git a/board/MAI/bios_emulator/scitech/bin/vc60-x11.bat b/board/MAI/bios_emulator/scitech/bin/vc60-x11.bat
deleted file mode 100755
index 57b23d2048..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/vc60-x11.bat
+++ /dev/null
@@ -1,20 +0,0 @@
-@echo off
-REM Setup environment variables for Visual C++ 6.0 32 bit edition
-
-SET LIB=%VC6_PATH%\VC98\LIB;.
-SET TOOLROOTDIR=%VC6_PATH%\VC98
-SET INCLUDE=\xc\include;%VC6_PATH%\VC98\INCLUDE;
-SET INIT=%VC6_PATH%\VC98
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\VC32.MK
-SET USE_TNT=
-SET USE_WIN16=
-SET USE_WIN32=1
-SET WIN32_GUI=1
-SET USE_VXD=
-SET USE_NTDRV=
-SET USE_RTTARGET=
-SET USE_SNAP=
-SET VC_LIBBASE=vc6
-PATH %SCITECH_BIN%;%VC6_PATH%\VC98\BIN;%VC6_PATH%\COMMON\MSDEV98\BIN;%DEFPATH%
-
-echo Visual C++ 6.0 X11 compilation environment set up
diff --git a/board/MAI/bios_emulator/scitech/bin/w2kddk.bat b/board/MAI/bios_emulator/scitech/bin/w2kddk.bat
deleted file mode 100755
index 92858d162e..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/w2kddk.bat
+++ /dev/null
@@ -1,42 +0,0 @@
-@echo off
-REM: Set up environment variables for Microsoft Windows NT DDK development.
-REM: Note that we have hard coded this for Windows NT i386 development.
-
-SET USE_NTDRV=1
-SET USE_W2KDRV=1
-SET BASEDIR=%W2K_DDKROOT%
-SET PATH=%BASEDIR%\bin;%PATH%
-SET NTMAKEENV=%BASEDIR%\inc
-SET BUILD_MAKE_PROGRAM=nmake.exe
-SET BUILD_DEFAULT=-ei -nmake -i
-SET BUILD_DEFAULT_TARGETS=-386
-SET _OBJ_DIR=obj
-SET NEW_CRTS=1
-SET _NTROOT=%BASEDIR%
-SET INCLUDE=%BASEDIR%\inc;%BASEDIR%\inc\ddk;%INCLUDE%
-
-if .%CHECKED%==.1 goto checked
-
-REM: set up an NT free build environment
-SET DDKBUILDENV=free
-SET C_DEFINES=-D_IDWBUILD
-SET NTDBGFILES=1
-SET NTDEBUG=
-SET NTDEBUGTYPE=
-SET MSC_OPTIMIZATION=
-set LIB=%BASEDIR%\libfre\i386;%SCITECH_LIB%\LIB\RELEASE\W2KDRV\VC6;%MSVCDir%\LIB;.
-
-goto done
-
-:checked
-
-REM: set up an NT checked build environment
-SET DDKBUILDENV=checked
-SET C_DEFINES=-D_IDWBUILD -DRDRDBG -DSRVDBG
-SET NTDBGFILES=
-SET NTDEBUG=ntsd
-SET NTDEBUGTYPE=both
-SET MSC_OPTIMIZATION=/Od /Oi
-set LIB=%BASEDIR%\libchk\i386;%SCITECH_LIB%\LIB\DEBUG\W2KDRV\VC6;%MSVCDir%\LIB;.
-
-:done
diff --git a/board/MAI/bios_emulator/scitech/bin/wc10-c32.bat b/board/MAI/bios_emulator/scitech/bin/wc10-c32.bat
deleted file mode 100755
index 2d738f376f..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/wc10-c32.bat
+++ /dev/null
@@ -1,34 +0,0 @@
-@echo off
-REM Setup for compiling with Watcom C/C++ 10.6 in 32 bit mode
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\WIN32\WC10;%WC10_PATH%\LIB386;%WC10_PATH%\LIB386\NT;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\WIN32\WC10;%WC10_PATH%\LIB386;%WC10_PATH%\LIB386\NT;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET EDPATH=%WC10_PATH%\EDDAT
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%WC10_PATH%\H;%WC10_PATH%\H\NT;
-SET WATCOM=%WC10_PATH%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\WC32.MK
-SET USE_TNT=
-SET USE_X32=
-SET USE_X32VM=
-SET USE_WIN16=
-SET USE_WIN32=1
-SET USE_WIN386=
-SET WIN32_GUI=
-SET USE_OS216=
-SET USE_OS232=
-SET USE_OS2GUI=
-SET USE_SNAP=
-SET USE_QNX4=
-SET WC_LIBBASE=WC10
-PATH %SCITECH_BIN%;%WC10_PATH%\BINNT;%WC10_PATH%\BINW;%DEFPATH%%WC_CD_PATH%
-
-echo Watcom C/C++ 10.6 Win32 console compilation environment set up
diff --git a/board/MAI/bios_emulator/scitech/bin/wc10-d16.bat b/board/MAI/bios_emulator/scitech/bin/wc10-d16.bat
deleted file mode 100755
index 5c53a90a17..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/wc10-d16.bat
+++ /dev/null
@@ -1,30 +0,0 @@
-@echo off
-REM Setup for compiling with Watcom C/C++ 10.6 in 32 bit mode (DOS4GW)
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\DOS16\WC10;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\DOS16\WC10;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET EDPATH=%WC10_PATH%\EDDAT
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%WC10_PATH%\H;%WC10_PATH%\H\WIN;
-SET WATCOM=%WC10_PATH%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\WC16.MK
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_OS216=
-SET USE_OS232=
-SET USE_OS2GUI=
-SET USE_SNAP=
-SET USE_QNX4=
-SET WC_LIBBASE=WC10
-SET EDPATH=%WC10_PATH%\EDDAT
-PATH %SCITECH_BIN%;%WC10_PATH%\BINNT;%WC10_PATH%\BINW;%DEFPATH%%WC_CD_PATH%
-
-echo Watcom C/C++ 10.6 16-bit DOS compilation environment set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/wc10-d32.bat b/board/MAI/bios_emulator/scitech/bin/wc10-d32.bat
deleted file mode 100755
index a5c7210526..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/wc10-d32.bat
+++ /dev/null
@@ -1,34 +0,0 @@
-@echo off
-REM Setup for compiling with Watcom C/C++ 10.6 in 32 bit mode (DOS4GW)
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\DOS32\WC10;%WC10_PATH%\LIB386;%WC10_PATH%\LIB386\DOS;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\DOS32\WC10;%WC10_PATH%\LIB386;%WC10_PATH%\LIB386\DOS;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET EDPATH=%WC10_PATH%\EDDAT
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%WC10_PATH%\H;
-SET WATCOM=%WC10_PATH%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\WC32.MK
-SET USE_TNT=
-SET USE_X32=
-SET USE_X32VM=
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_WIN386=
-SET USE_OS216=
-SET USE_OS232=
-SET USE_OS2GUI=
-SET USE_SNAP=
-SET USE_QNX4=
-SET WC_LIBBASE=WC10
-PATH %SCITECH_BIN%;%WC10_PATH%\BINNT;%WC10_PATH%\BINW;%DJ_PATH%\BIN;%DEFPATH%%WC_CD_PATH%
-
-echo Watcom C/C++ 10.6 32-bit DOS compilation environment set up (DOS4GW)
-
diff --git a/board/MAI/bios_emulator/scitech/bin/wc10-o16.bat b/board/MAI/bios_emulator/scitech/bin/wc10-o16.bat
deleted file mode 100755
index 579dece3b0..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/wc10-o16.bat
+++ /dev/null
@@ -1,31 +0,0 @@
-@echo off
-REM Setup for compiling with Watcom C/C++ 10.6 in 16-bit OS/2 mode
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\lib\release\os216\wc10;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\lib\debug\os216\wc10;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET EDPATH=%WC10_PATH%\eddat
-SET INCLUDE=include;%SCITECH%\include;%PRIVATE%\include;%WC10_PATH%\h\os2;%WC10_PATH%\h
-SET WATCOM=%WC10_PATH%
-SET MAKESTARTUP=%SCITECH%\makedefs\wc16.mk
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_WIN386=
-SET USE_OS216=1
-SET USE_OS232=
-SET USE_OS2GUI=
-SET USE_SNAP=
-SET USE_QNX4=
-SET WC_LIBBASE=wc10
-SET EDPATH=%WC10_PATH%\EDDAT
-PATH %SCITECH_BIN%;%WC10_PATH%\BINNT;%WC10_PATH%\BINW;%DEFPATH%%WC_CD_PATH%
-
-echo Watcom C/C++ 10.6 16-bit OS/2 compilation environment set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/wc10-o32.bat b/board/MAI/bios_emulator/scitech/bin/wc10-o32.bat
deleted file mode 100755
index 3404b42a01..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/wc10-o32.bat
+++ /dev/null
@@ -1,31 +0,0 @@
-@echo off
-REM Setup for compiling with Watcom C/C++ 10.6 in 32-bit OS/2 mode
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\lib\release\os232\wc10;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\lib\debug\os232\wc10;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET EDPATH=%WC10_PATH%\eddat
-SET INCLUDE=include;%SCITECH%\include;%PRIVATE%\include;%WC10_PATH%\h\os2;%WC10_PATH%\h
-SET WATCOM=%WC10_PATH%
-SET MAKESTARTUP=%SCITECH%\makedefs\wc32.mk
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_WIN386=
-SET USE_OS216=
-SET USE_OS232=1
-SET USE_OS2GUI=
-SET USE_SNAP=
-SET USE_QNX4=
-SET WC_LIBBASE=wc10
-SET EDPATH=%WC10_PATH%\EDDAT
-PATH %SCITECH_BIN%;%WC10_PATH%\BINNT;%WC10_PATH%\BINW;%DEFPATH%%WC_CD_PATH%
-
-echo Watcom C/C++ 10.6 32-bit OS/2 console compilation environment set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/wc10-p32.bat b/board/MAI/bios_emulator/scitech/bin/wc10-p32.bat
deleted file mode 100755
index 57057de361..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/wc10-p32.bat
+++ /dev/null
@@ -1,31 +0,0 @@
-@echo off
-REM Setup for compiling with Watcom C/C++ 10.6 in 32-bit OS/2 mode
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\lib\release\os232\wc10;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\lib\debug\os232\wc10;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET EDPATH=%WC10_PATH%\eddat
-SET INCLUDE=include;%SCITECH%\include;%PRIVATE%\include;%WC10_PATH%\h\os2;%WC10_PATH%\h
-SET WATCOM=%WC10_PATH%
-SET MAKESTARTUP=%SCITECH%\makedefs\wc32.mk
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_WIN386=
-SET USE_OS216=
-SET USE_OS232=1
-SET USE_OS2GUI=1
-SET USE_SNAP=
-SET USE_QNX4=
-SET WC_LIBBASE=wc10
-SET EDPATH=%WC10_PATH%\EDDAT
-PATH %SCITECH_BIN%;%WC10_PATH%\BINNT;%WC10_PATH%\BINW;%DEFPATH%%WC_CD_PATH%
-
-echo Watcom C/C++ 10.6 32-bit OS/2 GUI compilation environment set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/wc10-qnx.bat b/board/MAI/bios_emulator/scitech/bin/wc10-qnx.bat
deleted file mode 100755
index 46f8659ce6..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/wc10-qnx.bat
+++ /dev/null
@@ -1,34 +0,0 @@
-@echo off
-REM Setup for compiling with Watcom C/C++ 10.6 in 32 bit mode (QNX 4)
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\QNX4\WC10;%WC10_PATH%\LIB386;%WC10_PATH%\LIB386\QNX;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\QNX4\WC10;%WC10_PATH%\LIB386;%WC10_PATH%\LIB386\QNX;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET EDPATH=%WC10_PATH%\EDDAT
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%WC10_PATH%\QH;
-SET WATCOM=%WC10_PATH%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\WC32.MK
-SET USE_TNT=
-SET USE_X32=
-SET USE_X32VM=
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_WIN386=
-SET USE_OS216=
-SET USE_OS232=
-SET USE_OS2GUI=
-SET USE_SNAP=
-SET USE_QNX4=1
-SET WC_LIBBASE=WC10
-PATH %SCITECH_BIN%;%WC10_PATH%\BINNT;%WC10_PATH%\BINW;%DJ_PATH%\BIN;%DEFPATH%%WC_CD_PATH%
-
-echo Watcom C/C++ 10.6 32-bit QNX compilation environment set up
-
diff --git a/board/MAI/bios_emulator/scitech/bin/wc10-snp.bat b/board/MAI/bios_emulator/scitech/bin/wc10-snp.bat
deleted file mode 100755
index 1fde624f1f..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/wc10-snp.bat
+++ /dev/null
@@ -1,34 +0,0 @@
-@echo off
-REM Setup for compiling with Watcom C/C++ 10.6 in 32 bit mode
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\SNAP\WC10;%WC10_PATH%\LIB386;%WC10_PATH%\LIB386\NT;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\SNAP\WC10;%WC10_PATH%\LIB386;%WC10_PATH%\LIB386\NT;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET EDPATH=%WC10_PATH%\EDDAT
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%WC10_PATH%\H
-SET WATCOM=%WC10_PATH%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\WC32.MK
-SET USE_TNT=
-SET USE_X32=
-SET USE_X32VM=
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_WIN386=
-SET WIN32_GUI=
-SET USE_OS216=
-SET USE_OS232=
-SET USE_OS2GUI=
-SET USE_SNAP=1
-SET USE_QNX4=
-SET WC_LIBBASE=WC10
-PATH %SCITECH_BIN%;%WC10_PATH%\BINNT;%WC10_PATH%\BINW;%DEFPATH%%WC_CD_PATH%
-
-echo Watcom C/C++ 10.6 Snap compilation environment set up
diff --git a/board/MAI/bios_emulator/scitech/bin/wc10-tnt.bat b/board/MAI/bios_emulator/scitech/bin/wc10-tnt.bat
deleted file mode 100755
index d12f042fa1..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/wc10-tnt.bat
+++ /dev/null
@@ -1,46 +0,0 @@
-@echo off
-REM Setup for compiling with Watcom C/C++ 10.6 in 32 bit mode with Phar Lap TNT
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\DOS32\WC10;%WC10_PATH%\LIB386;%WC10_PATH%\LIB386\DOS;%TNT_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\DOS32\WC10;%WC10_PATH%\LIB386;%WC10_PATH%\LIB386\DOS;%TNT_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET EDPATH=%WC10_PATH%\EDDAT
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%WC10_PATH%\H;%WC10_PATH%\H\NT;%TNT_PATH%\INCLUDE
-SET WATCOM=%WC10_PATH%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\WC32.MK
-SET USE_TNT=1
-SET USE_X32=
-SET USE_X32VM=
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_WIN386=
-SET USE_OS216=
-SET USE_OS232=
-SET USE_OS2GUI=
-SET USE_SNAP=
-SET USE_QNX4=
-SET WC_LIBBASE=WC10
-PATH %SCITECH_BIN%;%WC10_PATH%\BINNT;%WC10_PATH%\BINW;%DEFPATH%%WC_CD_PATH%
-
-REM If you set the following to a 1, a TNT DosStyle app will be created.
-REM Otherwise a TNT NtStyle app will be created. NtStyle apps will *only*
-REM run under real DOS when using our libraries, since we require access
-REM to functions that the Win32 API does not support (such as direct access
-REM to video memory, calling Int 10h BIOS functions etc). DosStyle apps
-REM will however run fine in both DOS and a Win95 DOS box (NT DOS boxes don't
-REM work too well).
-REM
-REM If you are using the RealTime DOS extender, your apps *must* be NtStyle,
-REM and hence will never be able to run under Win95 or WinNT, only DOS.
-
-SET DOSSTYLE=1
-
-echo Watcom C/C++ 10.6 32-bit DOS compilation environment set up (TNT).
diff --git a/board/MAI/bios_emulator/scitech/bin/wc10-w16.bat b/board/MAI/bios_emulator/scitech/bin/wc10-w16.bat
deleted file mode 100755
index e8ba871bb9..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/wc10-w16.bat
+++ /dev/null
@@ -1,32 +0,0 @@
-@echo off
-REM Setup for compiling with Watcom C/C++ 10.6 in 16 bit Windows mode
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\WIN16\WC10;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\WIN16\WC10;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET EDPATH=%WC10_PATH%\EDDAT
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%WC10_PATH%\H;%WC10_PATH%\H\WIN;
-SET WATCOM=%WC10_PATH%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\WC16.MK
-SET USE_WIN16=1
-SET USE_WIN32=
-SET USE_WIN386=
-SET USE_OS216=
-SET USE_OS232=
-SET USE_OS2GUI=
-SET USE_SNAP=
-SET USE_QNX4=
-SET WC_LIBBASE=WC10
-SET EDPATH=%WC10_PATH%\EDDAT
-PATH %SCITECH_BIN%;%WC10_PATH%\BINNT;%WC10_PATH%\BINW;%DEFPATH%%WC_CD_PATH%
-
-echo Watcom C/C++ 10.6 16-bit Windows compilation environment set up.
-
diff --git a/board/MAI/bios_emulator/scitech/bin/wc10-w32.bat b/board/MAI/bios_emulator/scitech/bin/wc10-w32.bat
deleted file mode 100755
index 839bdde9c0..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/wc10-w32.bat
+++ /dev/null
@@ -1,34 +0,0 @@
-@echo off
-REM Setup for compiling with Watcom C/C++ 10.6 in 32 bit mode
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\WIN32\WC10;%WC10_PATH%\LIB386;%WC10_PATH%\LIB386\NT;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\WIN32\WC10;%WC10_PATH%\LIB386;%WC10_PATH%\LIB386\NT;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET EDPATH=%WC10_PATH%\EDDAT
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%WC10_PATH%\H;%WC10_PATH%\H\NT;
-SET WATCOM=%WC10_PATH%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\WC32.MK
-SET USE_TNT=
-SET USE_X32=
-SET USE_X32VM=
-SET USE_WIN16=
-SET USE_WIN32=1
-SET USE_WIN386=
-SET WIN32_GUI=1
-SET USE_OS216=
-SET USE_OS232=
-SET USE_OS2GUI=
-SET USE_SNAP=
-SET USE_QNX4=
-SET WC_LIBBASE=WC10
-PATH %SCITECH_BIN%;%WC10_PATH%\BINNT;%WC10_PATH%\BINW;%DEFPATH%%WC_CD_PATH%
-
-echo Watcom C/C++ 10.6 Win32 GUI compilation environment set up
diff --git a/board/MAI/bios_emulator/scitech/bin/wc10-x11.bat b/board/MAI/bios_emulator/scitech/bin/wc10-x11.bat
deleted file mode 100755
index fc783d8143..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/wc10-x11.bat
+++ /dev/null
@@ -1,24 +0,0 @@
-@echo off
-REM Setup for compiling with Watcom C/C++ 10.6 in 32 bit mode
-
-SET LIB=%WC10_PATH%\LIB386;%WC10_PATH%\LIB386\NT;.
-SET EDPATH=%WC10_PATH%\EDDAT
-SET INCLUDE=%WC10_PATH%\H;%WC10_PATH%\H\NT;
-SET WATCOM=%WC10_PATH%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\WC32.MK
-SET USE_TNT=
-SET USE_X32=
-SET USE_X32VM=
-SET USE_WIN16=
-SET USE_WIN32=1
-SET USE_WIN386=
-SET WIN32_GUI=1
-SET USE_OS216=
-SET USE_OS232=
-SET USE_OS2GUI=
-SET USE_SNAP=
-SET USE_QNX4=
-SET WC_LIBBASE=WC10
-PATH %SCITECH_BIN%;%WC10_PATH%\BINNT;%WC10_PATH%\BINW;%DEFPATH%%WC_CD_PATH%
-
-echo Watcom C/C++ 10.6 X11 compilation environment set up
diff --git a/board/MAI/bios_emulator/scitech/bin/wc10ac32.bat b/board/MAI/bios_emulator/scitech/bin/wc10ac32.bat
deleted file mode 100755
index 6e0c24d5e7..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/wc10ac32.bat
+++ /dev/null
@@ -1,33 +0,0 @@
-@echo off
-REM Setup for compiling with Watcom C/C++ 10.0a in 32 bit mode
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\WIN32\WC10A;%WC10A_PATH%\LIB386;%WC10A_PATH%\LIB386\NT;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\WIN32\WC10A;%WC10A_PATH%\LIB386;%WC10A_PATH%\LIB386\NT;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET EDPATH=%WC10A_PATH%\EDDAT
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%WC10A_PATH%\H;%WC10A_PATH%\H\NT;
-SET WATCOM=%WC10A_PATH%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\WC32.MK
-SET USE_TNT=
-SET USE_X32=
-SET USE_X32VM=
-SET USE_WIN16=
-SET USE_WIN32=1
-SET USE_WIN386=
-SET WIN32_GUI=
-SET USE_OS216=
-SET USE_OS232=
-SET USE_OS2GUI=
-SET USE_SNAP=
-SET WC_LIBBASE=WC10A
-PATH %SCITECH_BIN%;%WC10A_PATH%\BINNT;%WC10A_PATH%\BINB;%DEFPATH%%WC_CD_PATH%
-
-echo Watcom C/C++ 10.0a Win32 console compilation environment set up
diff --git a/board/MAI/bios_emulator/scitech/bin/wc10ad16.bat b/board/MAI/bios_emulator/scitech/bin/wc10ad16.bat
deleted file mode 100755
index f9ecb67273..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/wc10ad16.bat
+++ /dev/null
@@ -1,29 +0,0 @@
-@echo off
-REM Setup for compiling with Watcom C/C++ 10.0a in 32 bit mode (DOS4GW)
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\DOS16\WC10A;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\DOS16\WC10A;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET EDPATH=%WC10A_PATH%\EDDAT
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%WC10A_PATH%\H;%WC10A_PATH%\H\WIN;
-SET WATCOM=%WC10A_PATH%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\WC16.MK
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_OS216=
-SET USE_OS232=
-SET USE_OS2GUI=
-SET USE_SNAP=
-SET WC_LIBBASE=WC10A
-SET EDPATH=%WC10A_PATH%\EDDAT
-PATH %SCITECH_BIN%;%WC10A_PATH%\BINNT;%WC10A_PATH%\BINB;%DEFPATH%%WC_CD_PATH%
-
-echo Watcom C/C++ 10.0a 16-bit DOS compilation environment set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/wc10ad32.bat b/board/MAI/bios_emulator/scitech/bin/wc10ad32.bat
deleted file mode 100755
index d52b79a82c..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/wc10ad32.bat
+++ /dev/null
@@ -1,32 +0,0 @@
-@echo off
-REM Setup for compiling with Watcom C/C++ 10.0a in 32 bit mode (DOS4GW)
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\DOS32\WC10A;%WC10A_PATH%\LIB386;%WC10A_PATH%\LIB386\DOS;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\DOS32\WC10A;%WC10A_PATH%\LIB386;%WC10A_PATH%\LIB386\DOS;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET EDPATH=%WC10A_PATH%\EDDAT
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%WC10A_PATH%\H;
-SET WATCOM=%WC10A_PATH%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\WC32.MK
-SET USE_TNT=
-SET USE_X32=
-SET USE_X32VM=
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_WIN386=
-SET USE_OS216=
-SET USE_OS232=
-SET USE_OS2GUI=
-SET USE_SNAP=
-SET WC_LIBBASE=WC10A
-PATH %SCITECH_BIN%;%WC10A_PATH%\BINNT;%WC10A_PATH%\BINB;%DEFPATH%%WC_CD_PATH%
-
-echo Watcom C/C++ 10.0a 32-bit DOS compilation environment set up (DOS4GW)
diff --git a/board/MAI/bios_emulator/scitech/bin/wc10ao16.bat b/board/MAI/bios_emulator/scitech/bin/wc10ao16.bat
deleted file mode 100755
index ba7351d0d8..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/wc10ao16.bat
+++ /dev/null
@@ -1,30 +0,0 @@
-@echo off
-REM Setup for compiling with Watcom C/C++ 10.0a in 16-bit OS/2 mode
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\lib\release\os216\wc10;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\lib\debug\os216\wc10;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET EDPATH=%WC10A_PATH%\eddat
-SET INCLUDE=include;%SCITECH%\include;%PRIVATE%\include;%WC10A_PATH%\h\os2;%WC10A_PATH%\h
-SET WATCOM=%WC10A_PATH%
-SET MAKESTARTUP=%SCITECH%\makedefs\wc16.mk
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_WIN386=
-SET USE_OS216=1
-SET USE_OS232=
-SET USE_OS2GUI=
-SET USE_SNAP=
-SET WC_LIBBASE=wc10
-SET EDPATH=%WC10A_PATH%\EDDAT
-PATH %SCITECH_BIN%;%WC10A_PATH%\BINNT;%WC10A_PATH%\BINB;%DEFPATH%%WC_CD_PATH%
-
-echo Watcom C/C++ 10.0a 16-bit OS/2 compilation environment set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/wc10ao32.bat b/board/MAI/bios_emulator/scitech/bin/wc10ao32.bat
deleted file mode 100755
index f3caa59591..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/wc10ao32.bat
+++ /dev/null
@@ -1,30 +0,0 @@
-@echo off
-REM Setup for compiling with Watcom C/C++ 10.0a in 32-bit OS/2 mode
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\lib\release\os232\wc10;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\lib\debug\os232\wc10;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET EDPATH=%WC10AA_PATH%\eddat
-SET INCLUDE=include;%SCITECH%\include;%PRIVATE%\include;%WC10AA_PATH%\h\os2;%WC10AA_PATH%\h
-SET WATCOM=%WC10AA_PATH%
-SET MAKESTARTUP=%SCITECH%\makedefs\wc32.mk
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_WIN386=
-SET USE_OS216=
-SET USE_OS232=1
-SET USE_OS2GUI=
-SET USE_SNAP=
-SET WC_LIBBASE=WC10A
-SET EDPATH=%WC10AA_PATH%\EDDAT
-PATH %SCITECH_BIN%;%WC10AA_PATH%\BINNT;%WC10AA6_PATH%\BINB;%DEFPATH%%WC_CD_PATH%
-
-echo Watcom C/C++ 10.0a 32-bit OS/2 console compilation environment set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/wc10ap32.bat b/board/MAI/bios_emulator/scitech/bin/wc10ap32.bat
deleted file mode 100755
index 8d21c62eac..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/wc10ap32.bat
+++ /dev/null
@@ -1,30 +0,0 @@
-@echo off
-REM Setup for compiling with Watcom C/C++ 10.0a in 32-bit OS/2 mode
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\lib\release\os232\wc10;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\lib\debug\os232\wc10;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET EDPATH=%WC10_PATH%\eddat
-SET INCLUDE=include;%SCITECH%\include;%PRIVATE%\include;%WC10_PATH%\h\os2;%WC10_PATH%\h
-SET WATCOM=%WC10_PATH%
-SET MAKESTARTUP=%SCITECH%\makedefs\wc32.mk
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_WIN386=
-SET USE_OS216=
-SET USE_OS232=1
-SET USE_OS2GUI=1
-SET USE_SNAP=
-SET WC_LIBBASE=WC10A
-SET EDPATH=%WC10_PATH%\EDDAT
-PATH %SCITECH_BIN%;%WC10_PATH%\BINNT;%WC10_PATH%\BINB;%DEFPATH%%WC_CD_PATH%
-
-echo Watcom C/C++ 10.0a 32-bit OS/2 GUI compilation environment set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/wc10asnp.bat b/board/MAI/bios_emulator/scitech/bin/wc10asnp.bat
deleted file mode 100755
index 28f857c80d..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/wc10asnp.bat
+++ /dev/null
@@ -1,33 +0,0 @@
-@echo off
-REM Setup for compiling with Watcom C/C++ 10.0a in 32 bit mode
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\SNAP\WC10A;%WC10A_PATH%\LIB386;%WC10A_PATH%\LIB386\NT;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\SNAP\WC10A;%WC10A_PATH%\LIB386;%WC10A_PATH%\LIB386\NT;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET EDPATH=%WC10A_PATH%\EDDAT
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE
-SET WATCOM=%WC10A_PATH%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\WC32.MK
-SET USE_TNT=
-SET USE_X32=
-SET USE_X32VM=
-SET USE_WIN16=
-SET USE_WIN32=1
-SET USE_WIN386=
-SET WIN32_GUI=
-SET USE_OS216=
-SET USE_OS232=
-SET USE_OS2GUI=
-SET USE_SNAP=1
-SET WC_LIBBASE=WC10A
-PATH %SCITECH_BIN%;%WC10A_PATH%\BINNT;%WC10A_PATH%\BINB;%DEFPATH%%WC_CD_PATH%
-
-echo Watcom C/C++ 10.0a Snap compilation environment set up
diff --git a/board/MAI/bios_emulator/scitech/bin/wc10atnt.bat b/board/MAI/bios_emulator/scitech/bin/wc10atnt.bat
deleted file mode 100755
index a2b32193e4..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/wc10atnt.bat
+++ /dev/null
@@ -1,45 +0,0 @@
-@echo off
-REM Setup for compiling with Watcom C/C++ 10.0a in 32 bit mode with Phar Lap TNT
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\DOS32\WC10A;%WC10A_PATH%\LIB386;%WC10A_PATH%\LIB386\DOS;%TNT_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\DOS32\WC10A;%WC10A_PATH%\LIB386;%WC10A_PATH%\LIB386\DOS;%TNT_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET EDPATH=%WC10A_PATH%\EDDAT
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%WC10A_PATH%\H;%WC10A_PATH%\H\NT;%TNT_PATH%\INCLUDE
-SET WATCOM=%WC10A_PATH%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\WC32.MK
-SET USE_TNT=1
-SET USE_X32=
-SET USE_X32VM=
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_WIN386=
-SET USE_OS216=
-SET USE_OS232=
-SET USE_OS2GUI=
-SET USE_SNAP=
-SET WC_LIBBASE=WC10A
-PATH %SCITECH_BIN%;%WC10A_PATH%\BINNT;%WC10A_PATH%\BINB;%DEFPATH%%WC_CD_PATH%
-
-REM If you set the following to a 1, a TNT DosStyle app will be created.
-REM Otherwise a TNT NtStyle app will be created. NtStyle apps will *only*
-REM run under real DOS when using our libraries, since we require access
-REM to functions that the Win32 API does not support (such as direct access
-REM to video memory, calling Int 10h BIOS functions etc). DosStyle apps
-REM will however run fine in both DOS and a Win95 DOS box (NT DOS boxes don't
-REM work too well).
-REM
-REM If you are using the RealTime DOS extender, your apps *must* be NtStyle,
-REM and hence will never be able to run under Win95 or WinNT, only DOS.
-
-SET DOSSTYLE=1
-
-echo Watcom C/C++ 10.0a 32-bit DOS compilation environment set up (TNT).
diff --git a/board/MAI/bios_emulator/scitech/bin/wc10aw16.bat b/board/MAI/bios_emulator/scitech/bin/wc10aw16.bat
deleted file mode 100755
index 94011cc337..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/wc10aw16.bat
+++ /dev/null
@@ -1,31 +0,0 @@
-@echo off
-REM Setup for compiling with Watcom C/C++ 10.0a in 16 bit Windows mode
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\WIN16\WC10A;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\WIN16\WC10A;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET EDPATH=%WC10A_PATH%\EDDAT
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%WC10A_PATH%\H;%WC10A_PATH%\H\WIN;
-SET WATCOM=%WC10A_PATH%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\WC16.MK
-SET USE_WIN16=1
-SET USE_WIN32=
-SET USE_WIN386=
-SET USE_OS216=
-SET USE_OS232=
-SET USE_OS2GUI=
-SET USE_SNAP=
-SET WC_LIBBASE=WC10A
-SET EDPATH=%WC10A_PATH%\EDDAT
-PATH %SCITECH_BIN%;%WC10A_PATH%\BINNT;%WC10A_PATH%\BINB;%DEFPATH%%WC_CD_PATH%
-
-echo Watcom C/C++ 10.0a 16-bit Windows compilation environment set up.
-
diff --git a/board/MAI/bios_emulator/scitech/bin/wc10aw32.bat b/board/MAI/bios_emulator/scitech/bin/wc10aw32.bat
deleted file mode 100755
index 1e14dbc9f2..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/wc10aw32.bat
+++ /dev/null
@@ -1,33 +0,0 @@
-@echo off
-REM Setup for compiling with Watcom C/C++ 10.0a in 32 bit mode
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\WIN32\WC10A;%WC10A_PATH%\LIB386;%WC10A_PATH%\LIB386\NT;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\WIN32\WC10A;%WC10A_PATH%\LIB386;%WC10A_PATH%\LIB386\NT;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET EDPATH=%WC10A_PATH%\EDDAT
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%WC10A_PATH%\H;%WC10A_PATH%\H\NT;
-SET WATCOM=%WC10A_PATH%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\WC32.MK
-SET USE_TNT=
-SET USE_X32=
-SET USE_X32VM=
-SET USE_WIN16=
-SET USE_WIN32=1
-SET USE_WIN386=
-SET WIN32_GUI=1
-SET USE_OS216=
-SET USE_OS232=
-SET USE_OS2GUI=
-SET USE_SNAP=
-SET WC_LIBBASE=WC10A
-PATH %SCITECH_BIN%;%WC10A_PATH%\BINNT;%WC10A_PATH%\BINB;%DEFPATH%%WC_CD_PATH%
-
-echo Watcom C/C++ 10.0a Win32 GUI compilation environment set up
diff --git a/board/MAI/bios_emulator/scitech/bin/wc11-c32.bat b/board/MAI/bios_emulator/scitech/bin/wc11-c32.bat
deleted file mode 100755
index e75312927c..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/wc11-c32.bat
+++ /dev/null
@@ -1,40 +0,0 @@
-@echo off
-REM Setup for compiling with Watcom C/C++ 11.0 in 32 bit mode
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\WIN32\WC11;%WC11_PATH%\LIB386;%WC11_PATH%\LIB386\NT;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\WIN32\WC11;%WC11_PATH%\LIB386;%WC11_PATH%\LIB386\NT;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET EDPATH=%WC11_PATH%\EDDAT
-SET C_INCLUDE=%WC11_PATH%\H;%WC11_PATH%\H\NT
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%C_INCLUDE%
-SET WATCOM=%WC11_PATH%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\WC32.MK
-SET USE_TNT=
-SET USE_X32=
-SET USE_X32VM=
-SET USE_WIN16=
-SET USE_WIN32=1
-SET USE_WIN386=
-SET WIN32_GUI=
-SET USE_OS216=
-SET USE_OS232=
-SET USE_OS2GUI=
-SET USE_SNAP=
-SET USE_QNX4=
-SET WC_LIBBASE=WC11
-PATH %SCITECH_BIN%;%WC11_PATH%\BINNT;%WC11_PATH%\BINW;%DEFPATH%%WC_CD_PATH%
-
-REM: Enable Win32 SDK if desired (sdk on command line)
-if NOT .%1%==.sdk goto done
-call win32sdk.bat
-
-:done
-echo Watcom C/C++ 11.0 Win32 console compilation environment set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/wc11-d16.bat b/board/MAI/bios_emulator/scitech/bin/wc11-d16.bat
deleted file mode 100755
index 4338adaef9..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/wc11-d16.bat
+++ /dev/null
@@ -1,30 +0,0 @@
-@echo off
-REM SETup for compiling with Watcom C/C++ 11.0 in 16 bit mode
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\DOS16\WC11;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\DOS16\WC11;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET EDPATH=%WC11_PATH%\EDDAT
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%WC11_PATH%\H;%WC11_PATH%\H\WIN;
-SET WATCOM=%WC11_PATH%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\WC16.MK
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_OS216=
-SET USE_OS232=
-SET USE_OS2GUI=
-SET USE_SNAP=
-SET USE_QNX4=
-SET WC_LIBBASE=WC11
-SET EDPATH=%WC11_PATH%\EDDAT
-PATH %SCITECH_BIN%;%WC11_PATH%\BINNT;%WC11_PATH%\BINW;%DEFPATH%%WC_CD_PATH%
-
-echo Watcom C/C++ 11.0 16-bit DOS compilation environment set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/wc11-d32.bat b/board/MAI/bios_emulator/scitech/bin/wc11-d32.bat
deleted file mode 100755
index e5a54d4bb4..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/wc11-d32.bat
+++ /dev/null
@@ -1,33 +0,0 @@
-@echo off
-REM Setup for compiling with Watcom C/C++ 11.0 in 32 bit mode (DOS4GW)
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\DOS32\WC11;%WC11_PATH%\LIB386;%WC11_PATH%\LIB386\DOS;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\DOS32\WC11;%WC11_PATH%\LIB386;%WC11_PATH%\LIB386\DOS;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET EDPATH=%WC11_PATH%\EDDAT
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%WC11_PATH%\H;
-SET WATCOM=%WC11_PATH%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\WC32.MK
-SET USE_TNT=
-SET USE_X32=
-SET USE_X32VM=
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_WIN386=
-SET USE_OS216=
-SET USE_OS232=
-SET USE_OS2GUI=
-SET USE_SNAP=
-SET USE_QNX4=
-SET WC_LIBBASE=WC11
-PATH %SCITECH_BIN%;%WC11_PATH%\BINNT;%WC11_PATH%\BINW;%DJ_PATH%\BIN;%DEFPATH%%WC_CD_PATH%
-
-echo Watcom C/C++ 11.0 32-bit DOS compilation environment set up (DOS4GW).
diff --git a/board/MAI/bios_emulator/scitech/bin/wc11-o16.bat b/board/MAI/bios_emulator/scitech/bin/wc11-o16.bat
deleted file mode 100755
index d46754a3c0..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/wc11-o16.bat
+++ /dev/null
@@ -1,31 +0,0 @@
-@echo off
-REM Setup for compiling with Watcom C/C++ 11.0 in 16-bit OS/2 mode
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\lib\release\os216\wc11;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\lib\debug\os216\wc11;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET EDPATH=%WC11_PATH%\eddat
-SET INCLUDE=include;%SCITECH%\include;%PRIVATE%\include;%WC11_PATH%\h\os2;%WC11_PATH%\h
-SET WATCOM=%WC11_PATH%
-SET MAKESTARTUP=%SCITECH%\makedefs\wc16.mk
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_WIN386=
-SET USE_OS216=1
-SET USE_OS232=
-SET USE_OS2GUI=
-SET USE_SNAP=
-SET USE_QNX4=
-SET WC_LIBBASE=wc11
-SET EDPATH=%WC11_PATH%\EDDAT
-PATH %SCITECH_BIN%;%WC11_PATH%\BINNT;%WC11_PATH%\BINW;%DEFPATH%%WC_CD_PATH%
-
-echo Watcom C/C++ 11.0 16-bit OS/2 compilation environment set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/wc11-o32.bat b/board/MAI/bios_emulator/scitech/bin/wc11-o32.bat
deleted file mode 100755
index 37f5dc7617..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/wc11-o32.bat
+++ /dev/null
@@ -1,31 +0,0 @@
-@echo off
-REM Setup for compiling with Watcom C/C++ 11.0 in 32-bit OS/2 mode
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\lib\release\os232\wc11;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\lib\debug\os232\wc11;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET EDPATH=%WC11_PATH%\eddat
-SET INCLUDE=include;%SCITECH%\include;%PRIVATE%\include;%WC11_PATH%\h\os2;%WC11_PATH%\h
-SET WATCOM=%WC11_PATH%
-SET MAKESTARTUP=%SCITECH%\makedefs\wc32.mk
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_WIN386=
-SET USE_OS216=
-SET USE_OS232=1
-SET USE_OS2GUI=
-SET USE_SNAP=
-SET USE_QNX4=
-SET WC_LIBBASE=wc11
-SET EDPATH=%WC11_PATH%\EDDAT
-PATH %SCITECH_BIN%;%WC11_PATH%\BINNT;%WC11_PATH%\BINW;%DEFPATH%%WC_CD_PATH%
-
-echo Watcom C/C++ 11.0 32-bit OS/2 console compilation environment set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/wc11-p32.bat b/board/MAI/bios_emulator/scitech/bin/wc11-p32.bat
deleted file mode 100755
index 348cbbda81..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/wc11-p32.bat
+++ /dev/null
@@ -1,31 +0,0 @@
-@echo off
-REM Setup for compiling with Watcom C/C++ 11.0 in 32-bit OS/2 mode
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\lib\release\os232\wc11;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\lib\debug\os232\wc11;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET EDPATH=%WC11_PATH%\eddat
-SET INCLUDE=include;%SCITECH%\include;%PRIVATE%\include;%WC11_PATH%\h\os2;%WC11_PATH%\h
-SET WATCOM=%WC11_PATH%
-SET MAKESTARTUP=%SCITECH%\makedefs\wc32.mk
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_WIN386=
-SET USE_OS216=
-SET USE_OS232=1
-SET USE_OS2GUI=1
-SET USE_SNAP=
-SET USE_QNX4=
-SET WC_LIBBASE=wc11
-SET EDPATH=%WC11_PATH%\EDDAT
-PATH %SCITECH_BIN%;%WC11_PATH%\BINNT;%WC11_PATH%\BINW;%DEFPATH%%WC_CD_PATH%
-
-echo Watcom C/C++ 11.0 32-bit OS/2 GUI compilation environment set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/wc11-qnx.bat b/board/MAI/bios_emulator/scitech/bin/wc11-qnx.bat
deleted file mode 100755
index 1fd60feea8..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/wc11-qnx.bat
+++ /dev/null
@@ -1,34 +0,0 @@
-@echo off
-REM Setup for compiling with Watcom C/C++ 11.0 in 32 bit mode (QNX 4)
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\QNX4\WC11;%WC11_PATH%\LIB386;%WC11_PATH%\LIB386\QNX;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\QNX4\WC11;%WC11_PATH%\LIB386;%WC11_PATH%\LIB386\QNX;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET EDPATH=%WC11_PATH%\EDDAT
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%WC11_PATH%\QH;
-SET WATCOM=%WC11_PATH%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\WC32.MK
-SET USE_TNT=
-SET USE_X32=
-SET USE_X32VM=
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_WIN386=
-SET USE_OS216=
-SET USE_OS232=
-SET USE_OS2GUI=
-SET USE_SNAP=
-SET USE_QNX4=1
-SET WC_LIBBASE=WC11
-PATH %SCITECH_BIN%;%WC11_PATH%\BINNT;%WC11_PATH%\BINW;%DJ_PATH%\BIN;%DEFPATH%%WC_CD_PATH%
-
-echo Watcom C/C++ 11.0 32-bit QNX compilation environment set up
-
diff --git a/board/MAI/bios_emulator/scitech/bin/wc11-snp.bat b/board/MAI/bios_emulator/scitech/bin/wc11-snp.bat
deleted file mode 100755
index 6d2ac5783d..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/wc11-snp.bat
+++ /dev/null
@@ -1,34 +0,0 @@
-@echo off
-REM Setup for compiling with Watcom C/C++ 11.0 in 32 bit mode
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\SNAP\WC11;%WC11_PATH%\LIB386;%WC11_PATH%\LIB386\NT;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\SNAP\WC11;%WC11_PATH%\LIB386;%WC11_PATH%\LIB386\NT;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET EDPATH=%WC11_PATH%\EDDAT
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%WC11_PATH%\H
-SET WATCOM=%WC11_PATH%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\WC32.MK
-SET USE_TNT=
-SET USE_X32=
-SET USE_X32VM=
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_WIN386=
-SET WIN32_GUI=
-SET USE_OS216=
-SET USE_OS232=
-SET USE_OS2GUI=
-SET USE_SNAP=1
-SET USE_QNX4=
-SET WC_LIBBASE=WC11
-PATH %SCITECH_BIN%;%WC11_PATH%\BINNT;%WC11_PATH%\BINW;%DEFPATH%%WC_CD_PATH%
-
-echo Watcom C/C++ 11.0 Snap compilation environment set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/wc11-tnt.bat b/board/MAI/bios_emulator/scitech/bin/wc11-tnt.bat
deleted file mode 100755
index 44dbf24847..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/wc11-tnt.bat
+++ /dev/null
@@ -1,46 +0,0 @@
-@echo off
-REM Setup for compiling with Watcom C/C++ 11.0 in 32 bit mode with Phar Lap TNT
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\DOS32\WC11;%WC11_PATH%\LIB386;%WC11_PATH%\LIB386\DOS;%TNT_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\DOS32\WC11;%WC11_PATH%\LIB386;%WC11_PATH%\LIB386\DOS;%TNT_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET EDPATH=%WC11_PATH%\EDDAT
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%WC11_PATH%\H;%WC11_PATH%\H\NT;%TNT_PATH%\INCLUDE
-SET WATCOM=%WC11_PATH%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\WC32.MK
-SET USE_TNT=1
-SET USE_X32=
-SET USE_X32VM=
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_WIN386=
-SET USE_OS216=
-SET USE_OS232=
-SET USE_OS2GUI=
-SET USE_SNAP=
-SET USE_QNX4=
-SET WC_LIBBASE=WC11
-PATH %SCITECH_BIN%;%WC11_PATH%\BINNT;%WC11_PATH%\BINW;%DEFPATH%%WC_CD_PATH%
-
-REM If you set the following to a 1, a TNT DosStyle app will be created.
-REM Otherwise a TNT NtStyle app will be created. NtStyle apps will *only*
-REM run under real DOS when using our libraries, since we require access
-REM to functions that the Win32 API does not support (such as direct access
-REM to video memory, calling Int 10h BIOS functions etc). DosStyle apps
-REM will however run fine in both DOS and a Win95 DOS box (NT DOS boxes don't
-REM work too well).
-REM
-REM If you are using the RealTime DOS extender, your apps *must* be NtStyle,
-REM and hence will never be able to run under Win95 or WinNT, only DOS.
-
-SET DOSSTYLE=1
-
-echo Watcom C/C++ 11.0 32-bit DOS compilation environment set up (TNT).
diff --git a/board/MAI/bios_emulator/scitech/bin/wc11-w16.bat b/board/MAI/bios_emulator/scitech/bin/wc11-w16.bat
deleted file mode 100755
index e65c70e178..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/wc11-w16.bat
+++ /dev/null
@@ -1,31 +0,0 @@
-@echo off
-REM Setup for compiling with Watcom C/C++ 11.0 in 16 bit Windows mode
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\WIN16\WC11;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\WIN16\WC11;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET EDPATH=%WC11_PATH%\EDDAT
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%WC11_PATH%\H;%WC11_PATH%\H\WIN;
-SET WATCOM=%WC11_PATH%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\WC16.MK
-SET USE_WIN16=1
-SET USE_WIN32=
-SET USE_WIN386=
-SET USE_OS216=
-SET USE_OS232=
-SET USE_OS2GUI=
-SET USE_SNAP=
-SET USE_QNX4=
-SET WC_LIBBASE=WC11
-SET EDPATH=%WC11_PATH%\EDDAT
-PATH %SCITECH_BIN%;%WC11_PATH%\BINNT;%WC11_PATH%\BINW;%DEFPATH%%WC_CD_PATH%
-
-echo Watcom C/C++ 11.0 16-bit Windows compilation environment set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/wc11-w32.bat b/board/MAI/bios_emulator/scitech/bin/wc11-w32.bat
deleted file mode 100755
index 764cdbd111..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/wc11-w32.bat
+++ /dev/null
@@ -1,40 +0,0 @@
-@echo off
-REM Setup for compiling with Watcom C/C++ 11.0 in 32 bit mode
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\WIN32\WC11;%WC11_PATH%\LIB386;%WC11_PATH%\LIB386\NT;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\WIN32\WC11;%WC11_PATH%\LIB386;%WC11_PATH%\LIB386\NT;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET EDPATH=%WC11_PATH%\EDDAT
-SET C_INCLUDE=%WC11_PATH%\H;%WC11_PATH%\H\NT
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%C_INCLUDE%
-SET WATCOM=%WC11_PATH%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\WC32.MK
-SET USE_TNT=
-SET USE_X32=
-SET USE_X32VM=
-SET USE_WIN16=
-SET USE_WIN32=1
-SET USE_WIN386=
-SET WIN32_GUI=1
-SET USE_OS216=
-SET USE_OS232=
-SET USE_OS2GUI=
-SET USE_SNAP=
-SET USE_QNX4=
-SET WC_LIBBASE=WC11
-PATH %SCITECH_BIN%;%WC11_PATH%\BINNT;%WC11_PATH%\BINW;%DEFPATH%%WC_CD_PATH%
-
-REM: Enable Win32 SDK if desired (sdk on command line)
-if NOT .%1%==.sdk goto done
-call win32sdk.bat
-
-:done
-echo Watcom C/C++ 11.0 Win32 GUI compilation environment set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/wc11-x11.bat b/board/MAI/bios_emulator/scitech/bin/wc11-x11.bat
deleted file mode 100755
index c2569a3eb9..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/wc11-x11.bat
+++ /dev/null
@@ -1,34 +0,0 @@
-@echo off
-REM Setup for compiling with Watcom C/C++ 11.0 in 32 bit mode
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\WIN32\WC11;%WC11_PATH%\LIB386;%WC11_PATH%\LIB386\NT;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\WIN32\WC11;%WC11_PATH%\LIB386;%WC11_PATH%\LIB386\NT;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET EDPATH=%WC11_PATH%\EDDAT
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%WC11_PATH%\H;%WC11_PATH%\H\NT;
-SET WATCOM=%WC11_PATH%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\WC32.MK
-SET USE_TNT=
-SET USE_X32=
-SET USE_X32VM=
-SET USE_WIN16=
-SET USE_WIN32=1
-SET USE_WIN386=
-SET WIN32_GUI=1
-SET USE_OS216=
-SET USE_OS232=
-SET USE_OS2GUI=
-SET USE_SNAP=
-SET USE_QNX4=
-SET WC_LIBBASE=WC11
-PATH %SCITECH_BIN%;%WC11_PATH%\BINNT;%WC11_PATH%\BINW;%DEFPATH%%WC_CD_PATH%
-
-echo Watcom C/C++ 11.0 Win32 GUI compilation environment set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/win32sdk.bat b/board/MAI/bios_emulator/scitech/bin/win32sdk.bat
deleted file mode 100755
index 3c7f017cb5..0000000000
--- a/board/MAI/bios_emulator/scitech/bin/win32sdk.bat
+++ /dev/null
@@ -1,20 +0,0 @@
-@echo off
-REM: Set up environment variables for Microsoft Platform SDK development
-REM: Note that we have hard coded this for Windows NT i386 development.
-
-SET MSTOOLS=%MSSDK%
-SET DXSDKROOT=%MSTOOLS%
-SET INETSDK=%MSTOOLS%
-SET BKOFFICE=%MSTOOLS%
-SET BASEMAKE=%BKOFFICE%\INCLUDE\BKOffice.Mak
-SET INCLUDE=.;INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%MSTOOLS%\INCLUDE;%C_INCLUDE%
-if .%1%==.borland goto borland
-SET LIB=%MSTOOLS%\LIB;%LIB%
-goto notborland
-:borland
-SET LIB=%MSTOOLS%\LIB\BORLAND;%LIB%
-:notborland
-SET PATH=%MSTOOLS%\Bin\;%MSTOOLS%\Bin\WinNT;%PATH%
-SET CPU=i386
-
-echo Microsoft Platform SDK support enbabled.
diff --git a/board/MAI/bios_emulator/scitech/include/biosemu.h b/board/MAI/bios_emulator/scitech/include/biosemu.h
deleted file mode 100644
index 82c33a7c1d..0000000000
--- a/board/MAI/bios_emulator/scitech/include/biosemu.h
+++ /dev/null
@@ -1,154 +0,0 @@
-/****************************************************************************
-*
-* BIOS emulator and interface
-* to Realmode X86 Emulator Library
-*
-* Copyright (C) 1996-1999 SciTech Software, Inc.
-*
-* ========================================================================
-*
-* Permission to use, copy, modify, distribute, and sell this software and
-* its documentation for any purpose is hereby granted without fee,
-* provided that the above copyright notice appear in all copies and that
-* both that copyright notice and this permission notice appear in
-* supporting documentation, and that the name of the authors not be used
-* in advertising or publicity pertaining to distribution of the software
-* without specific, written prior permission. The authors makes no
-* representations about the suitability of this software for any purpose.
-* It is provided "as is" without express or implied warranty.
-*
-* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
-* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
-* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
-* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
-* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
-* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
-* PERFORMANCE OF THIS SOFTWARE.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-* Developer: Kendall Bennett
-*
-* Description: Header file for the real mode x86 BIOS emulator, which is
-* used to warmboot any number of VGA compatible PCI/AGP
-* controllers under any OS, on any processor family that
-* supports PCI. We also allow the user application to call
-* real mode BIOS functions and Int 10h functions (including
-* the VESA BIOS).
-*
-****************************************************************************/
-
-#ifndef __BIOSEMU_H
-#define __BIOSEMU_H
-
-#include "x86emu.h"
-#include "pmapi.h"
-#include "pcilib.h"
-
-/*---------------------- Macros and type definitions ----------------------*/
-
-#pragma pack(1)
-
-/****************************************************************************
-REMARKS:
-Data structure used to describe the details specific to a particular VGA
-controller. This information is used to allow the VGA controller to be
-swapped on the fly within the BIOS emulator.
-
-HEADER:
-biosemu.h
-
-MEMBERS:
-pciInfo - PCI device information block for the controller
-BIOSImage - Pointer to a read/write copy of the BIOS image
-BIOSImageLen - Length of the BIOS image
-LowMem - Copy of key low memory areas
-****************************************************************************/
-typedef struct {
- PCIDeviceInfo *pciInfo;
- void *BIOSImage;
- ulong BIOSImageLen;
- uchar LowMem[1536];
- } BE_VGAInfo;
-
-/****************************************************************************
-REMARKS:
-Data structure used to describe the details for the BIOS emulator system
-environment as used by the X86 emulator library.
-
-HEADER:
-biosemu.h
-
-MEMBERS:
-vgaInfo - VGA BIOS information structure
-biosmem_base - Base of the BIOS image
-biosmem_limit - Limit of the BIOS image
-busmem_base - Base of the VGA bus memory
-****************************************************************************/
-typedef struct {
- BE_VGAInfo vgaInfo;
- ulong biosmem_base;
- ulong biosmem_limit;
- ulong busmem_base;
- } BE_sysEnv;
-
-/****************************************************************************
-REMARKS:
-Structure defining all the BIOS Emulator API functions as exported from
-the Binary Portable DLL.
-{secret}
-****************************************************************************/
-typedef struct {
- ulong dwSize;
- ibool (PMAPIP BE_init)(u32 debugFlags,int memSize,BE_VGAInfo *info);
- void (PMAPIP BE_setVGA)(BE_VGAInfo *info);
- void (PMAPIP BE_getVGA)(BE_VGAInfo *info);
- void * (PMAPIP BE_mapRealPointer)(uint r_seg,uint r_off);
- void * (PMAPIP BE_getVESABuf)(uint *len,uint *rseg,uint *roff);
- void (PMAPIP BE_callRealMode)(uint seg,uint off,RMREGS *regs,RMSREGS *sregs);
- int (PMAPIP BE_int86)(int intno,RMREGS *in,RMREGS *out);
- int (PMAPIP BE_int86x)(int intno,RMREGS *in,RMREGS *out,RMSREGS *sregs);
- void * reserved1;
- void (PMAPIP BE_exit)(void);
- } BE_exports;
-
-/****************************************************************************
-REMARKS:
-Function pointer type for the Binary Portable DLL initialisation entry point.
-{secret}
-****************************************************************************/
-typedef BE_exports * (PMAPIP BE_initLibrary_t)(PM_imports *PMImp);
-
-#pragma pack()
-
-/*---------------------------- Global variables ---------------------------*/
-
-#ifdef __cplusplus
-extern "C" { /* Use "C" linkage when in C++ mode */
-#endif
-
-/* {secret} Global BIOS emulator system environment */
-extern BE_sysEnv _BE_env;
-
-/*-------------------------- Function Prototypes --------------------------*/
-
-/* BIOS emulator library entry points */
-
-ibool PMAPI BE_init(u32 debugFlags,int memSize,BE_VGAInfo *info);
-void PMAPI BE_setVGA(BE_VGAInfo *info);
-void PMAPI BE_getVGA(BE_VGAInfo *info);
-void PMAPI BE_setDebugFlags(u32 debugFlags);
-void * PMAPI BE_mapRealPointer(uint r_seg,uint r_off);
-void * PMAPI BE_getVESABuf(uint *len,uint *rseg,uint *roff);
-void PMAPI BE_callRealMode(uint seg,uint off,RMREGS *regs,RMSREGS *sregs);
-int PMAPI BE_int86(int intno,RMREGS *in,RMREGS *out);
-int PMAPI BE_int86x(int intno,RMREGS *in,RMREGS *out,RMSREGS *sregs);
-void PMAPI BE_exit(void);
-
-#ifdef __cplusplus
-} /* End of "C" linkage for C++ */
-#endif
-
-#endif /* __BIOSEMU_H */
diff --git a/board/MAI/bios_emulator/scitech/include/event.h b/board/MAI/bios_emulator/scitech/include/event.h
deleted file mode 100644
index beeac87645..0000000000
--- a/board/MAI/bios_emulator/scitech/include/event.h
+++ /dev/null
@@ -1,696 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-*
-* Description: Header file for the SciTech cross platform event library
-*
-****************************************************************************/
-
-#ifndef __EVENT_H
-#define __EVENT_H
-
-#include "scitech.h"
-
-/*---------------------- Macros and type definitions ----------------------*/
-
-#pragma pack(1)
-
-/* 'C' calling conventions always */
-
-#define EVTAPI _ASMAPI
-#define EVTAPIP _ASMAPIP
-
-/* Event message masks for keyDown events */
-
-#define EVT_ASCIIMASK 0x00FF /* ASCII code of key pressed */
-#define EVT_SCANMASK 0xFF00 /* Scan code of key pressed */
-#define EVT_COUNTMASK 0x7FFF0000L /* Count for KEYREPEAT's */
-
-/* Macros to extract values from the message fields */
-
-#define EVT_asciiCode(m) ( (uchar) (m & EVT_ASCIIMASK) )
-#define EVT_scanCode(m) ( (uchar) ( (m & EVT_SCANMASK) >> 8 ) )
-#define EVT_repeatCount(m) ( (short) ( (m & EVT_COUNTMASK) >> 16 ) )
-
-/****************************************************************************
-REMARKS:
-Defines the set of ASCII codes reported by the event library functions
-in the message field. Use the EVT_asciiCode macro to extract the code
-from the event structure.
-
-HEADER:
-event.h
-****************************************************************************/
-typedef enum {
- ASCII_ctrlA = 0x01,
- ASCII_ctrlB = 0x02,
- ASCII_ctrlC = 0x03,
- ASCII_ctrlD = 0x04,
- ASCII_ctrlE = 0x05,
- ASCII_ctrlF = 0x06,
- ASCII_ctrlG = 0x07,
- ASCII_backspace = 0x08,
- ASCII_ctrlH = 0x08,
- ASCII_tab = 0x09,
- ASCII_ctrlI = 0x09,
- ASCII_ctrlJ = 0x0A,
- ASCII_ctrlK = 0x0B,
- ASCII_ctrlL = 0x0C,
- ASCII_enter = 0x0D,
- ASCII_ctrlM = 0x0D,
- ASCII_ctrlN = 0x0E,
- ASCII_ctrlO = 0x0F,
- ASCII_ctrlP = 0x10,
- ASCII_ctrlQ = 0x11,
- ASCII_ctrlR = 0x12,
- ASCII_ctrlS = 0x13,
- ASCII_ctrlT = 0x14,
- ASCII_ctrlU = 0x15,
- ASCII_ctrlV = 0x16,
- ASCII_ctrlW = 0x17,
- ASCII_ctrlX = 0x18,
- ASCII_ctrlY = 0x19,
- ASCII_ctrlZ = 0x1A,
- ASCII_esc = 0x1B,
- ASCII_space = 0x20,
- ASCII_exclamation = 0x21, /* ! */
- ASCII_quote = 0x22, /* " */
- ASCII_pound = 0x23, /* # */
- ASCII_dollar = 0x24, /* $ */
- ASCII_percent = 0x25, /* % */
- ASCII_ampersand = 0x26, /* & */
- ASCII_apostrophe = 0x27, /* ' */
- ASCII_leftBrace = 0x28, /* ( */
- ASCII_rightBrace = 0x29, /* ) */
- ASCII_times = 0x2A, /* * */
- ASCII_plus = 0x2B, /* + */
- ASCII_comma = 0x2C, /* , */
- ASCII_minus = 0x2D, /* - */
- ASCII_period = 0x2E, /* . */
- ASCII_divide = 0x2F, /* / */
- ASCII_0 = 0x30,
- ASCII_1 = 0x31,
- ASCII_2 = 0x32,
- ASCII_3 = 0x33,
- ASCII_4 = 0x34,
- ASCII_5 = 0x35,
- ASCII_6 = 0x36,
- ASCII_7 = 0x37,
- ASCII_8 = 0x38,
- ASCII_9 = 0x39,
- ASCII_colon = 0x3A, /* : */
- ASCII_semicolon = 0x3B, /* ; */
- ASCII_lessThan = 0x3C, /* < */
- ASCII_equals = 0x3D, /* = */
- ASCII_greaterThan = 0x3E, /* > */
- ASCII_question = 0x3F, /* ? */
- ASCII_at = 0x40, /* @ */
- ASCII_A = 0x41,
- ASCII_B = 0x42,
- ASCII_C = 0x43,
- ASCII_D = 0x44,
- ASCII_E = 0x45,
- ASCII_F = 0x46,
- ASCII_G = 0x47,
- ASCII_H = 0x48,
- ASCII_I = 0x49,
- ASCII_J = 0x4A,
- ASCII_K = 0x4B,
- ASCII_L = 0x4C,
- ASCII_M = 0x4D,
- ASCII_N = 0x4E,
- ASCII_O = 0x4F,
- ASCII_P = 0x50,
- ASCII_Q = 0x51,
- ASCII_R = 0x52,
- ASCII_S = 0x53,
- ASCII_T = 0x54,
- ASCII_U = 0x55,
- ASCII_V = 0x56,
- ASCII_W = 0x57,
- ASCII_X = 0x58,
- ASCII_Y = 0x59,
- ASCII_Z = 0x5A,
- ASCII_leftSquareBrace = 0x5B, /* [ */
- ASCII_backSlash = 0x5C, /* \ */
- ASCII_rightSquareBrace = 0x5D, /* ] */
- ASCII_caret = 0x5E, /* ^ */
- ASCII_underscore = 0x5F, /* _ */
- ASCII_leftApostrophe = 0x60, /* ` */
- ASCII_a = 0x61,
- ASCII_b = 0x62,
- ASCII_c = 0x63,
- ASCII_d = 0x64,
- ASCII_e = 0x65,
- ASCII_f = 0x66,
- ASCII_g = 0x67,
- ASCII_h = 0x68,
- ASCII_i = 0x69,
- ASCII_j = 0x6A,
- ASCII_k = 0x6B,
- ASCII_l = 0x6C,
- ASCII_m = 0x6D,
- ASCII_n = 0x6E,
- ASCII_o = 0x6F,
- ASCII_p = 0x70,
- ASCII_q = 0x71,
- ASCII_r = 0x72,
- ASCII_s = 0x73,
- ASCII_t = 0x74,
- ASCII_u = 0x75,
- ASCII_v = 0x76,
- ASCII_w = 0x77,
- ASCII_x = 0x78,
- ASCII_y = 0x79,
- ASCII_z = 0x7A,
- ASCII_leftCurlyBrace = 0x7B, /* { */
- ASCII_verticalBar = 0x7C, /* | */
- ASCII_rightCurlyBrace = 0x7D, /* } */
- ASCII_tilde = 0x7E /* ~ */
- } EVT_asciiCodesType;
-
-/****************************************************************************
-REMARKS:
-Defines the set of scan codes reported by the event library functions
-in the message field. Use the EVT_scanCode macro to extract the code
-from the event structure. Note that the scan codes reported will be the
-same across all keyboards (assuming the placement of keys on a 101 key US
-keyboard), but the translated ASCII values may be different depending on
-the country code pages in use.
-
-NOTE: Scan codes in the event library are not really hardware scan codes,
- but rather virtual scan codes as generated by a low level keyboard
- interface driver. All virtual codes begin with scan code 0x60 and
- range up from there.
-
-HEADER:
-event.h
-****************************************************************************/
-typedef enum {
- KB_padEnter = 0x60, /* Keypad keys */
- KB_padMinus = 0x4A,
- KB_padPlus = 0x4E,
- KB_padTimes = 0x37,
- KB_padDivide = 0x61,
- KB_padLeft = 0x62,
- KB_padRight = 0x63,
- KB_padUp = 0x64,
- KB_padDown = 0x65,
- KB_padInsert = 0x66,
- KB_padDelete = 0x67,
- KB_padHome = 0x68,
- KB_padEnd = 0x69,
- KB_padPageUp = 0x6A,
- KB_padPageDown = 0x6B,
- KB_padCenter = 0x4C,
- KB_F1 = 0x3B, /* Function keys */
- KB_F2 = 0x3C,
- KB_F3 = 0x3D,
- KB_F4 = 0x3E,
- KB_F5 = 0x3F,
- KB_F6 = 0x40,
- KB_F7 = 0x41,
- KB_F8 = 0x42,
- KB_F9 = 0x43,
- KB_F10 = 0x44,
- KB_F11 = 0x57,
- KB_F12 = 0x58,
- KB_left = 0x4B, /* Cursor control keys */
- KB_right = 0x4D,
- KB_up = 0x48,
- KB_down = 0x50,
- KB_insert = 0x52,
- KB_delete = 0x53,
- KB_home = 0x47,
- KB_end = 0x4F,
- KB_pageUp = 0x49,
- KB_pageDown = 0x51,
- KB_capsLock = 0x3A,
- KB_numLock = 0x45,
- KB_scrollLock = 0x46,
- KB_leftShift = 0x2A,
- KB_rightShift = 0x36,
- KB_leftCtrl = 0x1D,
- KB_rightCtrl = 0x6C,
- KB_leftAlt = 0x38,
- KB_rightAlt = 0x6D,
- KB_leftWindows = 0x5B,
- KB_rightWindows = 0x5C,
- KB_menu = 0x5D,
- KB_sysReq = 0x54,
- KB_esc = 0x01, /* Normal keyboard keys */
- KB_1 = 0x02,
- KB_2 = 0x03,
- KB_3 = 0x04,
- KB_4 = 0x05,
- KB_5 = 0x06,
- KB_6 = 0x07,
- KB_7 = 0x08,
- KB_8 = 0x09,
- KB_9 = 0x0A,
- KB_0 = 0x0B,
- KB_minus = 0x0C,
- KB_equals = 0x0D,
- KB_backSlash = 0x2B,
- KB_backspace = 0x0E,
- KB_tab = 0x0F,
- KB_Q = 0x10,
- KB_W = 0x11,
- KB_E = 0x12,
- KB_R = 0x13,
- KB_T = 0x14,
- KB_Y = 0x15,
- KB_U = 0x16,
- KB_I = 0x17,
- KB_O = 0x18,
- KB_P = 0x19,
- KB_leftSquareBrace = 0x1A,
- KB_rightSquareBrace = 0x1B,
- KB_enter = 0x1C,
- KB_A = 0x1E,
- KB_S = 0x1F,
- KB_D = 0x20,
- KB_F = 0x21,
- KB_G = 0x22,
- KB_H = 0x23,
- KB_J = 0x24,
- KB_K = 0x25,
- KB_L = 0x26,
- KB_semicolon = 0x27,
- KB_apostrophe = 0x28,
- KB_Z = 0x2C,
- KB_X = 0x2D,
- KB_C = 0x2E,
- KB_V = 0x2F,
- KB_B = 0x30,
- KB_N = 0x31,
- KB_M = 0x32,
- KB_comma = 0x33,
- KB_period = 0x34,
- KB_divide = 0x35,
- KB_space = 0x39,
- KB_tilde = 0x29
- } EVT_scanCodesType;
-
-/****************************************************************************
-REMARKS:
-Defines the mask for the joystick axes that are present
-
-HEADER:
-event.h
-
-MEMBERS:
-EVT_JOY_AXIS_X1 - Joystick 1, X axis is present
-EVT_JOY_AXIS_Y1 - Joystick 1, Y axis is present
-EVT_JOY_AXIS_X2 - Joystick 2, X axis is present
-EVT_JOY_AXIS_Y2 - Joystick 2, Y axis is present
-EVT_JOY_AXIS_ALL - Mask for all axes
-****************************************************************************/
-typedef enum {
- EVT_JOY_AXIS_X1 = 0x00000001,
- EVT_JOY_AXIS_Y1 = 0x00000002,
- EVT_JOY_AXIS_X2 = 0x00000004,
- EVT_JOY_AXIS_Y2 = 0x00000008,
- EVT_JOY_AXIS_ALL = 0x0000000F
- } EVT_eventJoyAxisType;
-
-/****************************************************************************
-REMARKS:
-Defines the event message masks for joystick events
-
-HEADER:
-event.h
-
-MEMBERS:
-EVT_JOY1_BUTTONA - Joystick 1, button A is down
-EVT_JOY1_BUTTONB - Joystick 1, button B is down
-EVT_JOY2_BUTTONA - Joystick 2, button A is down
-EVT_JOY2_BUTTONB - Joystick 2, button B is down
-****************************************************************************/
-typedef enum {
- EVT_JOY1_BUTTONA = 0x00000001,
- EVT_JOY1_BUTTONB = 0x00000002,
- EVT_JOY2_BUTTONA = 0x00000004,
- EVT_JOY2_BUTTONB = 0x00000008
- } EVT_eventJoyMaskType;
-
-/****************************************************************************
-REMARKS:
-Defines the event message masks for mouse events
-
-HEADER:
-event.h
-
-MEMBERS:
-EVT_LEFTBMASK - Left button is held down
-EVT_RIGHTBMASK - Right button is held down
-EVT_MIDDLEBMASK - Middle button is held down
-EVT_BOTHBMASK - Both left and right held down together
-EVT_ALLBMASK - All buttons pressed
-EVT_DBLCLICK - Set if mouse down event was a double click
-****************************************************************************/
-typedef enum {
- EVT_LEFTBMASK = 0x00000001,
- EVT_RIGHTBMASK = 0x00000002,
- EVT_MIDDLEBMASK = 0x00000004,
- EVT_BOTHBMASK = 0x00000007,
- EVT_ALLBMASK = 0x00000007,
- EVT_DBLCLICK = 0x00010000
- } EVT_eventMouseMaskType;
-
-/****************************************************************************
-REMARKS:
-Defines the event modifier masks. These are the masks used to extract
-the modifier information from the modifiers field of the event_t structure.
-Note that the values in the modifiers field represent the values of these
-modifier keys at the time the event occurred, not the time you decided
-to process the event.
-
-HEADER:
-event.h
-
-MEMBERS:
-EVT_LEFTBUT - Set if left mouse button was down
-EVT_RIGHTBUT - Set if right mouse button was down
-EVT_MIDDLEBUT - Set if the middle button was down
-EVT_RIGHTSHIFT - Set if right shift was down
-EVT_LEFTSHIFT - Set if left shift was down
-EVT_RIGHTCTRL - Set if right ctrl key was down
-EVT_RIGHTALT - Set if right alt key was down
-EVT_LEFTCTRL - Set if left ctrl key was down
-EVT_LEFTALT - Set if left alt key was down
-EVT_SHIFTKEY - Mask for any shift key down
-EVT_CTRLSTATE - Set if ctrl key was down
-EVT_ALTSTATE - Set if alt key was down
-EVT_CAPSLOCK - Caps lock is active
-EVT_NUMLOCK - Num lock is active
-EVT_SCROLLLOCK - Scroll lock is active
-****************************************************************************/
-typedef enum {
- EVT_LEFTBUT = 0x00000001,
- EVT_RIGHTBUT = 0x00000002,
- EVT_MIDDLEBUT = 0x00000004,
- EVT_RIGHTSHIFT = 0x00000008,
- EVT_LEFTSHIFT = 0x00000010,
- EVT_RIGHTCTRL = 0x00000020,
- EVT_RIGHTALT = 0x00000040,
- EVT_LEFTCTRL = 0x00000080,
- EVT_LEFTALT = 0x00000100,
- EVT_SHIFTKEY = 0x00000018,
- EVT_CTRLSTATE = 0x000000A0,
- EVT_ALTSTATE = 0x00000140,
- EVT_SCROLLLOCK = 0x00000200,
- EVT_NUMLOCK = 0x00000400,
- EVT_CAPSLOCK = 0x00000800
- } EVT_eventModMaskType;
-
-/****************************************************************************
-REMARKS:
-Defines the event codes returned in the event_t structures what field. Note
-that these are defined as a set of mutually exlusive bit fields, so you
-can test for multiple event types using the combined event masks defined
-in the EVT_eventMaskType enumeration.
-
-HEADER:
-event.h
-
-MEMBERS:
-EVT_NULLEVT - A null event
-EVT_KEYDOWN - Key down event
-EVT_KEYREPEAT - Key repeat event
-EVT_KEYUP - Key up event
-EVT_MOUSEDOWN - Mouse down event
-EVT_MOUSEAUTO - Mouse down autorepeat event
-EVT_MOUSEUP - Mouse up event
-EVT_MOUSEMOVE - Mouse movement event
-EVT_JOYCLICK - Joystick button state change event
-EVT_JOYMOVE - Joystick movement event
-EVT_USEREVT - First user event
-****************************************************************************/
-typedef enum {
- EVT_NULLEVT = 0x00000000,
- EVT_KEYDOWN = 0x00000001,
- EVT_KEYREPEAT = 0x00000002,
- EVT_KEYUP = 0x00000004,
- EVT_MOUSEDOWN = 0x00000008,
- EVT_MOUSEAUTO = 0x00000010,
- EVT_MOUSEUP = 0x00000020,
- EVT_MOUSEMOVE = 0x00000040,
- EVT_JOYCLICK = 0x00000080,
- EVT_JOYMOVE = 0x00000100,
- EVT_USEREVT = 0x00000200
- } EVT_eventType;
-
-/****************************************************************************
-REMARKS:
-Defines the event code masks you can use to test for multiple types of
-events, since the event codes are mutually exlusive bit fields.
-
-HEADER:
-event.h
-
-MEMBERS:
-EVT_KEYEVT - Mask for any key event
-EVT_MOUSEEVT - Mask for any mouse event
-EVT_MOUSECLICK - Mask for any mouse click event
-EVT_JOYEVT - Mask for any joystick event
-EVT_EVERYEVT - Mask for any event
-****************************************************************************/
-typedef enum {
- EVT_KEYEVT = (EVT_KEYDOWN | EVT_KEYREPEAT | EVT_KEYUP),
- EVT_MOUSEEVT = (EVT_MOUSEDOWN | EVT_MOUSEAUTO | EVT_MOUSEUP | EVT_MOUSEMOVE),
- EVT_MOUSECLICK = (EVT_MOUSEDOWN | EVT_MOUSEUP),
- EVT_JOYEVT = (EVT_JOYCLICK | EVT_JOYMOVE),
- EVT_EVERYEVT = 0x7FFFFFFF
- } EVT_eventMaskType;
-
-/****************************************************************************
-REMARKS:
-Structure describing the information contained in an event extracted from
-the event queue.
-
-HEADER:
-event.h
-
-MEMBERS:
-which - Window identifier for message for use by high level window manager
- code (i.e. MegaVision GUI or Windows API).
-what - Type of event that occurred. Will be one of the values defined by
- the EVT_eventType enumeration.
-when - Time that the event occurred in milliseconds since startup
-where_x - X coordinate of the mouse cursor location at the time of the event
- (in screen coordinates). For joystick events this represents
- the position of the first joystick X axis.
-where_y - Y coordinate of the mouse cursor location at the time of the event
- (in screen coordinates). For joystick events this represents
- the position of the first joystick Y axis.
-relative_x - Relative movement of the mouse cursor in the X direction (in
- units of mickeys, or 1/200th of an inch). For joystick events
- this represents the position of the second joystick X axis.
-relative_y - Relative movement of the mouse cursor in the Y direction (in
- units of mickeys, or 1/200th of an inch). For joystick events
- this represents the position of the second joystick Y axis.
-message - Event specific message for the event. For use events this can be
- any user specific information. For keyboard events this contains
- the ASCII code in bits 0-7, the keyboard scan code in bits 8-15 and
- the character repeat count in bits 16-30. You can use the
- EVT_asciiCode, EVT_scanCode and EVT_repeatCount macros to extract
- this information from the message field. For mouse events this
- contains information about which button was pressed, and will be a
- combination of the flags defined by the EVT_eventMouseMaskType
- enumeration. For joystick events, this conatins information
- about which buttons were pressed, and will be a combination of
- the flags defined by the EVT_eventJoyMaskType enumeration.
-modifiers - Contains additional information about the state of the keyboard
- shift modifiers (Ctrl, Alt and Shift keys) when the event
- occurred. For mouse events it will also contain the state of
- the mouse buttons. Will be a combination of the values defined
- by the EVT_eventModMaskType enumeration.
-next - Internal use; do not use.
-prev - Internal use; do not use.
-****************************************************************************/
-typedef struct {
- ulong which;
- ulong what;
- ulong when;
- int where_x;
- int where_y;
- int relative_x;
- int relative_y;
- ulong message;
- ulong modifiers;
- int next;
- int prev;
- } event_t;
-
-/****************************************************************************
-REMARKS:
-Structure describing an entry in the code page table. A table of translation
-codes for scan codes to ASCII codes is provided in this table to be used
-by the keyboard event libraries. On some OS'es the keyboard translation is
-handled by the OS, but for DOS and embedded systems you must register a
-different code page translation table if you want to support keyboards
-other than the US English keyboard (the default).
-
-NOTE: Entries in code page tables *must* be in ascending order for the
- scan codes as we do a binary search on the tables for the ASCII
- code equivalents.
-
-HEADER:
-event.h
-
-MEMBERS:
-scanCode - Scan code to translate (really the virtual scan code).
-asciiCode - ASCII code for this scan code.
-****************************************************************************/
-typedef struct {
- uchar scanCode;
- uchar asciiCode;
- } codepage_entry_t;
-
-/****************************************************************************
-REMARKS:
-Structure describing a complete code page translation table. The table
-contains translation tables for normal keys, shifted keys and ctrl keys.
-The Ctrl key always has precedence over the shift table, and the shift
-table is used when the shift key is down or the CAPSLOCK key is down.
-
-HEADER:
-event.h
-
-MEMBERS:
-name - Name of the code page table (ie: "US English")
-normal - Code page for translating normal keys
-normalLen - Length of normal translation table
-caps - Code page for translating keys when CAPSLOCK is down
-capsLen - Length of CAPSLOCK translation table
-shift - Code page for shifted keys (ie: shift key is held down)
-shiftLen - Length of shifted translation table
-shiftCaps - Code page for shifted keys when CAPSLOCK is down
-shiftCapsLen - Length of shifted CAPSLOCK translation table
-ctrl - Code page for ctrl'ed keys (ie: ctrl key is held down)
-ctrlLen - Length of ctrl'ed translation table
-numPad - Code page for NUMLOCK'ed keypad keys
-numPadLen - Length of NUMLOCK'ed translation table
-****************************************************************************/
-typedef struct {
- char name[20];
- codepage_entry_t *normal;
- int normalLen;
- codepage_entry_t *caps;
- int capsLen;
- codepage_entry_t *shift;
- int shiftLen;
- codepage_entry_t *shiftCaps;
- int shiftCapsLen;
- codepage_entry_t *ctrl;
- int ctrlLen;
- codepage_entry_t *numPad;
- int numPadLen;
- } codepage_t;
-
-/* {secret} */
-typedef ibool (EVTAPIP _EVT_userEventFilter)(event_t *evt);
-/* {secret} */
-typedef void (EVTAPIP _EVT_mouseMoveHandler)(int x,int y);
-/* {secret} */
-typedef void (EVTAPIP _EVT_heartBeatCallback)(void *params);
-
-/* Macro to find the size of a static array */
-
-#define EVT_ARR_SIZE(a) (sizeof(a)/sizeof((a)[0]))
-
-#pragma pack()
-
-/*--------------------------- Global variables ----------------------------*/
-
-#ifdef __cplusplus
-extern "C" { /* Use "C" linkage when in C++ mode */
-#endif
-
-/* Standard code page tables */
-
-extern codepage_t _CP_US_English;
-
-/*------------------------- Function Prototypes ---------------------------*/
-
-/* Public API functions for user applications */
-
-ibool EVTAPI EVT_getNext(event_t *evt,ulong mask);
-ibool EVTAPI EVT_peekNext(event_t *evt,ulong mask);
-ibool EVTAPI EVT_post(ulong which,ulong what,ulong message,ulong modifiers);
-void EVTAPI EVT_flush(ulong mask);
-void EVTAPI EVT_halt(event_t *evt,ulong mask);
-ibool EVTAPI EVT_isKeyDown(uchar scanCode);
-void EVTAPI EVT_setMousePos(int x,int y);
-void EVTAPI EVT_getMousePos(int *x,int *y);
-
-/* Function to enable/disable updating of keyboard LED status indicators */
-
-void EVTAPI EVT_allowLEDS(ibool enable);
-
-/* Function to install a custom keyboard code page. Default is US English */
-
-codepage_t *EVTAPI EVT_getCodePage(void);
-void EVTAPI EVT_setCodePage(codepage_t *page);
-
-/* Functions for fine grained joystick calibration */
-
-void EVTAPI EVT_pollJoystick(void);
-int EVTAPI EVT_joyIsPresent(void);
-void EVTAPI EVT_joySetUpperLeft(void);
-void EVTAPI EVT_joySetLowerRight(void);
-void EVTAPI EVT_joySetCenter(void);
-
-/* Install user supplied event filter callback */
-
-void EVTAPI EVT_setUserEventFilter(_EVT_userEventFilter filter);
-
-/* Install user supplied event heartbeat callback function */
-
-void EVTAPI EVT_setHeartBeatCallback(_EVT_heartBeatCallback callback,void *params);
-void EVTAPI EVT_getHeartBeatCallback(_EVT_heartBeatCallback *callback,void **params);
-
-/* Internal functions to initialise and kill the event manager. MGL
- * applications should never call these functions directly as the MGL
- * libraries do it for you.
- */
-
-/* {secret} */
-void EVTAPI EVT_init(_EVT_mouseMoveHandler mouseMove);
-/* {secret} */
-void EVTAPI EVT_setMouseRange(int xRes,int yRes);
-/* {secret} */
-void EVTAPI EVT_suspend(void);
-/* {secret} */
-void EVTAPI EVT_resume(void);
-/* {secret} */
-void EVTAPI EVT_exit(void);
-
-#ifdef __cplusplus
-} /* End of "C" linkage for C++ */
-#endif /* __cplusplus */
-
-#endif /* __EVENT_H */
diff --git a/board/MAI/bios_emulator/scitech/include/mtrr.h b/board/MAI/bios_emulator/scitech/include/mtrr.h
deleted file mode 100644
index b29812c928..0000000000
--- a/board/MAI/bios_emulator/scitech/include/mtrr.h
+++ /dev/null
@@ -1,72 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-*
-* Description: Include file defining the external ring 0 helper functions
-* needed by the MTRR module. These functions may be included
-* directly for native ring 0 device drivers, or they may
-* be calls down to a ring 0 helper device driver where
-* appropriate (or the entire MTRR module may be located in
-* the device driver if the device driver is 32-bit).
-*
-****************************************************************************/
-
-#ifndef __MTRR_H
-#define __MTRR_H
-
-#include "scitech.h"
-
-/*--------------------------- Function Prototypes -------------------------*/
-
-#ifdef __cplusplus
-extern "C" { /* Use "C" linkage when in C++ mode */
-#endif
-
-/* Internal functions (requires ring 0 access or helper functions!) */
-
-void MTRR_init(void);
-int MTRR_enableWriteCombine(ulong base,ulong size,uint type);
-
-/* External assembler helper functions */
-
-ibool _ASMAPI _MTRR_isRing0(void);
-ulong _ASMAPI _MTRR_disableInt(void);
-void _ASMAPI _MTRR_restoreInt(ulong flags);
-ulong _ASMAPI _MTRR_saveCR4(void);
-void _ASMAPI _MTRR_restoreCR4(ulong cr4Val);
-uchar _ASMAPI _MTRR_getCx86(uchar reg);
-void _ASMAPI _MTRR_setCx86(uchar reg,uchar data);
-#ifdef __16BIT__
-void _ASMAPI _MTRR_readMSR(ulong reg, ulong far *eax, ulong far *edx);
-#else
-void _ASMAPI _MTRR_readMSR(ulong reg, ulong *eax, ulong *edx);
-#endif
-void _ASMAPI _MTRR_writeMSR(ulong reg, ulong eax, ulong edx);
-
-#ifdef __cplusplus
-} /* End of "C" linkage for C++ */
-#endif
-
-#endif /* __MTRR_H */
diff --git a/board/MAI/bios_emulator/scitech/include/pcilib.h b/board/MAI/bios_emulator/scitech/include/pcilib.h
deleted file mode 100644
index 238f8ef83b..0000000000
--- a/board/MAI/bios_emulator/scitech/include/pcilib.h
+++ /dev/null
@@ -1,413 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-*
-* Description: Header file for interface routines to the PCI bus.
-*
-****************************************************************************/
-
-#ifndef __PCILIB_H
-#define __PCILIB_H
-
-#include "scitech.h"
-
-/*---------------------- Macros and type definitions ----------------------*/
-
-#pragma pack(1)
-
-/* Defines for PCIDeviceInfo.HeaderType */
-
-typedef enum {
- PCI_deviceType = 0x00,
- PCI_bridgeType = 0x01,
- PCI_cardBusBridgeType = 0x02,
- PCI_multiFunctionType = 0x80
- } PCIHeaderTypeFlags;
-
-/* Defines for PCIDeviceInfo.Command */
-
-typedef enum {
- PCI_enableIOSpace = 0x0001,
- PCI_enableMemorySpace = 0x0002,
- PCI_enableBusMaster = 0x0004,
- PCI_enableSpecialCylces = 0x0008,
- PCI_enableWriteAndInvalidate = 0x0010,
- PCI_enableVGACompatiblePalette = 0x0020,
- PCI_enableParity = 0x0040,
- PCI_enableWaitCycle = 0x0080,
- PCI_enableSerr = 0x0100,
- PCI_enableFastBackToBack = 0x0200
- } PCICommandFlags;
-
-/* Defines for PCIDeviceInfo.Status */
-
-typedef enum {
- PCI_statusCapabilitiesList = 0x0010,
- PCI_status66MhzCapable = 0x0020,
- PCI_statusUDFSupported = 0x0040,
- PCI_statusFastBackToBack = 0x0080,
- PCI_statusDataParityDetected = 0x0100,
- PCI_statusDevSel = 0x0600,
- PCI_statusSignaledTargetAbort = 0x0800,
- PCI_statusRecievedTargetAbort = 0x1000,
- PCI_statusRecievedMasterAbort = 0x2000,
- PCI_statusSignaledSystemError = 0x4000,
- PCI_statusDetectedParityError = 0x8000
- } PCIStatusFlags;
-
-/* PCI capability IDs */
-
-typedef enum {
- PCI_capsPowerManagement = 0x01,
- PCI_capsAGP = 0x02,
- PCI_capsMSI = 0x05
- } PCICapsType;
-
-/* PCI AGP rate definitions */
-
-typedef enum {
- PCI_AGPRate1X = 0x1,
- PCI_AGPRate2X = 0x2,
- PCI_AGPRate4X = 0x4
- } PCIAGPRateType;
-
-/* NOTE: We define all bitfield's as uint's, specifically so that the IBM
- * Visual Age C++ compiler does not complain. We need them to be
- * 32-bits wide, and this is the width of an unsigned integer, but
- * we can't use a ulong to make this explicit or we get errors.
- */
-
-/* Structure defining a PCI slot identifier */
-
-typedef union {
- struct {
- uint Zero:2;
- uint Register:6;
- uint Function:3;
- uint Device:5;
- uint Bus:8;
- uint Reserved:7;
- uint Enable:1;
- } p;
- ulong i;
- } PCIslot;
-
-/* Structure defining the regular (type 0) PCI configuration register
- * layout. We use this in a union below so we can describe all types of
- * PCI configuration spaces with a single structure.
- */
-
-typedef struct {
- ulong BaseAddress10;
- ulong BaseAddress14;
- ulong BaseAddress18;
- ulong BaseAddress1C;
- ulong BaseAddress20;
- ulong BaseAddress24;
- ulong CardbusCISPointer;
- ushort SubSystemVendorID;
- ushort SubSystemID;
- ulong ROMBaseAddress;
- uchar CapabilitiesPointer;
- uchar reserved1;
- uchar reserved2;
- uchar reserved3;
- ulong reserved4;
- uchar InterruptLine;
- uchar InterruptPin;
- uchar MinimumGrant;
- uchar MaximumLatency;
-
- /* These are not in the actual config space, but we enumerate them */
- ulong BaseAddress10Len;
- ulong BaseAddress14Len;
- ulong BaseAddress18Len;
- ulong BaseAddress1CLen;
- ulong BaseAddress20Len;
- ulong BaseAddress24Len;
- ulong ROMBaseAddressLen;
- } PCIType0Info;
-
-/* Structure defining PCI to PCI bridge (type 1) PCI configuration register
- * layout. We use this in a union below so we can describe all types of
- * PCI configuration spaces with a single structure.
- */
-
-typedef struct {
- ulong BaseAddress10;
- ulong BaseAddress14;
- uchar PrimaryBusNumber;
- uchar SecondayBusNumber;
- uchar SubordinateBusNumber;
- uchar SecondaryLatencyTimer;
- uchar IOBase;
- uchar IOLimit;
- ushort SecondaryStatus;
- ushort MemoryBase;
- ushort MemoryLimit;
- ushort PrefetchableMemoryBase;
- ushort PrefetchableMemoryLimit;
- ulong PrefetchableBaseHi;
- ulong PrefetchableLimitHi;
- ushort IOBaseHi;
- ushort IOLimitHi;
- uchar CapabilitiesPointer;
- uchar reserved1;
- uchar reserved2;
- uchar reserved3;
- ulong ROMBaseAddress;
- uchar InterruptLine;
- uchar InterruptPin;
- ushort BridgeControl;
- } PCIType1Info;
-
-/* PCI to CardBus bridge (type 2) configuration information */
-typedef struct {
- ulong SocketRegistersBaseAddress;
- uchar CapabilitiesPointer;
- uchar reserved1;
- ushort SecondaryStatus;
- uchar PrimaryBus;
- uchar SecondaryBus;
- uchar SubordinateBus;
- uchar SecondaryLatency;
- struct {
- ulong Base;
- ulong Limit;
- } Range[4];
- uchar InterruptLine;
- uchar InterruptPin;
- ushort BridgeControl;
- } PCIType2Info;
-
-/* Structure defining the PCI configuration space information for a
- * single PCI device on the PCI bus. We enumerate all this information
- * for all PCI devices on the bus.
- */
-
-typedef struct {
- ulong dwSize;
- PCIslot slot;
- ulong mech1;
- ushort VendorID;
- ushort DeviceID;
- ushort Command;
- ushort Status;
- uchar RevID;
- uchar Interface;
- uchar SubClass;
- uchar BaseClass;
- uchar CacheLineSize;
- uchar LatencyTimer;
- uchar HeaderType;
- uchar BIST;
- union {
- PCIType0Info type0;
- PCIType1Info type1;
- PCIType2Info type2;
- } u;
- } PCIDeviceInfo;
-
-/* PCI Capability header structure. All PCI capabilities have the
- * following header.
- *
- * capsID is used to identify the type of the structure as define above.
- *
- * next is the offset in PCI configuration space (0x40-0xFC) of the
- * next capability structure in the list, or 0x00 if there are no more
- * entries.
- */
-
-typedef struct {
- uchar capsID;
- uchar next;
- } PCICapsHeader;
-
-/* Structure defining the PCI AGP status register contents */
-
-typedef struct {
- uint rate:3;
- uint rsvd1:1;
- uint fastWrite:1;
- uint fourGB:1;
- uint rsvd2:3;
- uint sideBandAddressing:1;
- uint rsvd3:14;
- uint requestQueueDepthMaximum:8;
- } PCIAGPStatus;
-
-/* Structure defining the PCI AGP command register contents */
-
-typedef struct {
- uint rate:3;
- uint rsvd1:1;
- uint fastWriteEnable:1;
- uint fourGBEnable:1;
- uint rsvd2:2;
- uint AGPEnable:1;
- uint SBAEnable:1;
- uint rsvd3:14;
- uint requestQueueDepth:8;
- } PCIAGPCommand;
-
-/* AGP Capability structure */
-
-typedef struct {
- PCICapsHeader h;
- ushort majMin;
- PCIAGPStatus AGPStatus;
- PCIAGPCommand AGPCommand;
- } PCIAGPCapability;
-
-/* Structure for obtaining the PCI IRQ routing information */
-
-typedef struct {
- uchar bus;
- uchar device;
- uchar linkA;
- ushort mapA;
- uchar linkB;
- ushort mapB;
- uchar linkC;
- ushort mapC;
- uchar linkD;
- ushort mapD;
- uchar slot;
- uchar reserved;
- } PCIRouteInfo;
-
-typedef struct {
- ushort BufferSize;
- PCIRouteInfo *DataBuffer;
- } PCIRoutingOptionsBuffer;
-
-#define NUM_PCI_REG (sizeof(PCIDeviceInfo) / 4) - 10
-#define PCI_BRIDGE_CLASS 0x06
-#define PCI_HOST_BRIDGE_SUBCLASS 0x00
-#define PCI_EARLY_VGA_CLASS 0x00
-#define PCI_EARLY_VGA_SUBCLASS 0x01
-#define PCI_DISPLAY_CLASS 0x03
-#define PCI_DISPLAY_VGA_SUBCLASS 0x00
-#define PCI_DISPLAY_XGA_SUBCLASS 0x01
-#define PCI_DISPLAY_OTHER_SUBCLASS 0x80
-#define PCI_MM_CLASS 0x04
-#define PCI_AUDIO_SUBCLASS 0x01
-
-/* Macros to detect specific classes of devices */
-
-#define PCI_IS_3DLABS_NONVGA_CLASS(pci) \
- (((pci)->BaseClass == PCI_DISPLAY_CLASS && (pci)->SubClass == PCI_DISPLAY_OTHER_SUBCLASS) \
- && ((pci)->VendorID == 0x3D3D || (pci)->VendorID == 0x104C))
-
-#define PCI_IS_DISPLAY_CLASS(pci) \
- (((pci)->BaseClass == PCI_DISPLAY_CLASS && (pci)->SubClass == PCI_DISPLAY_VGA_SUBCLASS) \
- || ((pci)->BaseClass == PCI_DISPLAY_CLASS && (pci)->SubClass == PCI_DISPLAY_XGA_SUBCLASS) \
- || ((pci)->BaseClass == PCI_EARLY_VGA_CLASS && (pci)->SubClass == PCI_EARLY_VGA_SUBCLASS) \
- || PCI_IS_3DLABS_NONVGA_CLASS(pci))
-
-/* Function codes to pass to PCI_accessReg */
-
-#define PCI_READ_BYTE 0
-#define PCI_READ_WORD 1
-#define PCI_READ_DWORD 2
-#define PCI_WRITE_BYTE 3
-#define PCI_WRITE_WORD 4
-#define PCI_WRITE_DWORD 5
-
-/* Macros to read/write PCI registers. These assume a global PCI array
- * of device information.
- */
-
-#define PCI_readPCIRegB(index,device) \
- PCI_accessReg(index,0,0,&PCI[DeviceIndex[device]])
-
-#define PCI_readPCIRegW(index,device) \
- PCI_accessReg(index,0,1,&PCI[DeviceIndex[device]])
-
-#define PCI_readPCIRegL(index,device) \
- PCI_accessReg(index,0,2,&PCI[DeviceIndex[device]])
-
-#define PCI_writePCIRegB(index,value,device) \
- PCI_accessReg(index,value,3,&PCI[DeviceIndex[device]])
-
-#define PCI_writePCIRegW(index,value,device) \
- PCI_accessReg(index,value,4,&PCI[DeviceIndex[device]])
-
-#define PCI_writePCIRegL(index,value,device) \
- PCI_accessReg(index,value,5,&PCI[DeviceIndex[device]])
-
-#pragma pack()
-
-/*-------------------------- Function Prototypes --------------------------*/
-
-#ifdef __cplusplus
-extern "C" { /* Use "C" linkage when in C++ mode */
-#endif
-
-/* Function to determine the number of PCI devices in the system */
-
-int _ASMAPI PCI_getNumDevices(void);
-
-/* Function to enumerate all device on the PCI bus */
-
-int _ASMAPI PCI_enumerate(PCIDeviceInfo info[]);
-
-/* Function to access PCI configuration registers */
-
-ulong _ASMAPI PCI_accessReg(int index,ulong value,int func,PCIDeviceInfo *info);
-
-/* Function to get PCI IRQ routing options for a card */
-
-int _ASMAPI PCI_getIRQRoutingOptions(int numDevices,PCIRouteInfo *buffer);
-
-/* Function to re-route the PCI IRQ setting for a device */
-
-ibool _ASMAPI PCI_setHardwareIRQ(PCIDeviceInfo *info,uint intPin,uint IRQ);
-
-/* Function to generate a special cyle on the specified PCI bus */
-
-void _ASMAPI PCI_generateSpecialCyle(uint bus,ulong specialCycleData);
-
-/* Function to determine the size of a PCI base address register */
-
-ulong _ASMAPI PCI_findBARSize(int bar,PCIDeviceInfo *pci);
-
-/* Function to read a block of PCI configuration space registers */
-
-void _ASMAPI PCI_readRegBlock(PCIDeviceInfo *info,int index,void *dst,int count);
-
-/* Function to write a block of PCI configuration space registers */
-
-void _ASMAPI PCI_writeRegBlock(PCIDeviceInfo *info,int index,void *src,int count);
-
-/* Function to return the 32-bit PCI BIOS entry point */
-
-ulong _ASMAPI PCIBIOS_getEntry(void);
-
-#ifdef __cplusplus
-} /* End of "C" linkage for C++ */
-#endif
-
-#endif /* __PCILIB_H */
diff --git a/board/MAI/bios_emulator/scitech/include/pm_help.h b/board/MAI/bios_emulator/scitech/include/pm_help.h
deleted file mode 100644
index 536a2baac5..0000000000
--- a/board/MAI/bios_emulator/scitech/include/pm_help.h
+++ /dev/null
@@ -1,166 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Win32, OS/2
-*
-* Description: Include file for the SciTech Portability Manager 32-bit
-* helper VxD for Windows 9x for and the 16-bit ring 0
-* helper device driver for OS/2.
-*
-* This file documents all the public services used by the
-* SciTech Portability Manager library and SciTech Nucleus
-* loader library.
-*
-****************************************************************************/
-
-#ifndef __PMHELP_H
-#define __PMHELP_H
-
-/* Include version information */
-
-#include "sdd/sddver.h"
-#define PMHELP_Major SDD_RELEASE_MAJOR
-#define PMHELP_Minor SDD_RELEASE_MINOR
-#define PMHELP_VERSION ((PMHELP_Major << 8) | PMHELP_Minor)
-
-#ifdef __OS2__
-
-/****************************************************************************
-* Public OS/2 Support functions
-****************************************************************************/
-
-#include "scitech.h"
-#include "nucleus/graphics.h"
-
-/* Name of device driver */
-
-#define PMHELP_NAME (PSZ)"sddhelp$"
-
-/* Main IOCTL function to talk to device driver */
-
-#define PMHELP_IOCTL 0x0080
-
-/* Macro definition for defining IOCTL function control codes for the SDDHELP
- * device driver for OS/2. Similar to that used for the DOS/Win32 version.
- */
-
-#define PMHELP_CTL_CODE(name,value) \
- PMHELP_##name = value
-
-typedef enum {
- /* Version function used by all drivers */
- PMHELP_CTL_CODE(GETVER ,0x0001),
- PMHELP_CTL_CODE(MAPPHYS ,0x0002),
- PMHELP_CTL_CODE(ALLOCLOCKED ,0x0003),
- PMHELP_CTL_CODE(FREELOCKED ,0x0004),
- PMHELP_CTL_CODE(GETGDT32 ,0x0005),
- PMHELP_CTL_CODE(MALLOCSHARED ,0x0007),
- PMHELP_CTL_CODE(FREESHARED ,0x0008),
- PMHELP_CTL_CODE(MAPTOPROCESS ,0x0009),
- PMHELP_CTL_CODE(FREEPHYS ,0x000A),
- PMHELP_CTL_CODE(FLUSHTLB ,0x000B),
- PMHELP_CTL_CODE(SAVECR4 ,0x000C),
- PMHELP_CTL_CODE(RESTORECR4 ,0x000D),
- PMHELP_CTL_CODE(READMSR ,0x000E),
- PMHELP_CTL_CODE(WRITEMSR ,0x000F),
- PMHELP_CTL_CODE(GETPHYSICALADDR ,0x0010),
- PMHELP_CTL_CODE(GETPHYSICALADDRRANGE ,0x0011),
- PMHELP_CTL_CODE(LOCKPAGES ,0x0012),
- PMHELP_CTL_CODE(UNLOCKPAGES ,0x0013),
- PMHELP_CTL_CODE(GETSHAREDEXP ,0x0042),
- PMHELP_CTL_CODE(SETSHAREDEXP ,0x0043),
- PMHELP_CTL_CODE(GETSTACKSWITCHRTN ,0x0044),
- PMHELP_CTL_CODE(GETBUILDNO ,0x0050),
- } PMHELP_ctlCodes;
-
-#else
-
-/****************************************************************************
-* Public DOS/Windows Support functions
-****************************************************************************/
-
-#ifdef DEVICE_MAIN
-#include <vtoolsc.h>
-#define PMHELP_Init_Order (VDD_INIT_ORDER-1)
-#define RETURN_LONGS(n) *p->dioc_bytesret = (n) * sizeof(ulong)
-#endif /* DEVICE_MAIN */
-#include "scitech.h"
-#include "nucleus/graphics.h"
-
-/* We connect to the SDDHELP.VXD module if it is staticly loaded (as part
- * of SciTech Display Doctor), otherwise we dynamically load the PMHELP.VXD
- * public helper VxD.
- */
-
-#define PMHELP_DeviceID 0x0000
-#define SDDHELP_DeviceID 0x3DF8
-#define VXDLDR_DeviceID 0x0027
-#define SDDHELP_MODULE "SDDHELP"
-#define SDDHELP_NAME "SDDHELP.VXD"
-#define PMHELP_MODULE "PMHELP"
-#define PMHELP_NAME "PMHELP.VXD"
-#define PMHELP_DDBNAME "pmhelp "
-#define SDDHELP_MODULE_PATH "\\\\.\\" SDDHELP_MODULE
-#define PMHELP_MODULE_PATH "\\\\.\\" PMHELP_MODULE
-#define PMHELP_VXD_PATH "\\\\.\\" PMHELP_NAME
-
-/* Macro definition for defining IOCTL function control codes for the PMHELP
- * device drivers for Windows 9x and NT. This macro is basically derived from
- * the CTL_CODE macro in the Windows 2000 DDK, but we hard code it here to
- * avoid having to #include any of the Windows 2000 DDK header files. We also
- * define both a 16-bit and 32-bit version of the control code within the same
- * macro to simplify future additions.
- *
- * Essentially the Win32 macro would normally expand to the following:
- *
- * CTL_CODE(FILE_DEVICE_VIDEO,0x800+value,METHOD_BUFFERED,FILE_ANY_ACCESS)
- */
-
-#define PMHELP_CTL_CODE(name,value) \
- PMHELP_##name = value, \
- PMHELP_##name##32 = ((0x23 << 16) | (0 << 14) | ((0x800+value) << 2) | (0))
-
-typedef enum {
- /* Include all the control codes. We keep them in a separate header
- * file so we can include them in multiple places to make this
- * more versatile.
- */
- #include "pm_wctl.h"
- } PMHELP_ctlCodes;
-
-/* For real mode VxD calls, we put the function number into the high
- * order word of EAX, and a value of 0x4FFF in AX. This allows our
- * VxD handler which is set up to handle Int 10's to recognise a native
- * PMHELP API call from a real mode DOS program.
- */
-
-#ifdef REALMODE
-#define API_NUM(num) (((ulong)(num) << 16) | 0x4FFF)
-#else
-#define API_NUM(num) (num)
-#endif
-
-#endif /* !__OS2__ */
-
-#endif /* __PMHELP_H */
diff --git a/board/MAI/bios_emulator/scitech/include/pm_wctl.h b/board/MAI/bios_emulator/scitech/include/pm_wctl.h
deleted file mode 100644
index 20aa15e534..0000000000
--- a/board/MAI/bios_emulator/scitech/include/pm_wctl.h
+++ /dev/null
@@ -1,75 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Win32, OS/2
-*
-* Description: Header file to define all the control codes for the DOS
-* and Win32 device driver API's for calling from ring 3
-* into the ring 0 device drivers.
-*
-****************************************************************************/
-
-/* Version function used by all drivers */
-PMHELP_CTL_CODE(GETVER ,0x0000),
-
-/* Functions used by obsolete 16-bit DOS TSR */
-PMHELP_CTL_CODE(RDREGB ,0x0003),
-PMHELP_CTL_CODE(WRREGB ,0x0004),
-PMHELP_CTL_CODE(RDREGW ,0x0005),
-PMHELP_CTL_CODE(WRREGW ,0x0006),
-PMHELP_CTL_CODE(RDREGL ,0x0008),
-PMHELP_CTL_CODE(WRREGL ,0x0009),
-
-/* Functions used by obsolete WinDirect */
-PMHELP_CTL_CODE(MAPPHYS ,0x000F),
-PMHELP_CTL_CODE(GETVESABUF ,0x0013),
-
-/* Functions used by PM library */
-PMHELP_CTL_CODE(DPMIINT86 ,0x0014),
-PMHELP_CTL_CODE(INT86 ,0x0015),
-PMHELP_CTL_CODE(INT86X ,0x0016),
-PMHELP_CTL_CODE(CALLREALMODE ,0x0017),
-PMHELP_CTL_CODE(ALLOCLOCKED ,0x0018),
-PMHELP_CTL_CODE(FREELOCKED ,0x0019),
-PMHELP_CTL_CODE(ENABLELFBCOMB ,0x001A),
-PMHELP_CTL_CODE(GETPHYSICALADDR ,0x001B),
-PMHELP_CTL_CODE(MALLOCSHARED ,0x001D),
-PMHELP_CTL_CODE(FREESHARED ,0x001F),
-PMHELP_CTL_CODE(LOCKDATAPAGES ,0x0020),
-PMHELP_CTL_CODE(UNLOCKDATAPAGES ,0x0021),
-PMHELP_CTL_CODE(LOCKCODEPAGES ,0x0022),
-PMHELP_CTL_CODE(UNLOCKCODEPAGES ,0x0023),
-PMHELP_CTL_CODE(GETCALLGATE ,0x0024),
-PMHELP_CTL_CODE(SETCNTPATH ,0x0025),
-PMHELP_CTL_CODE(GETPDB ,0x0026),
-PMHELP_CTL_CODE(FLUSHTLB ,0x0027),
-PMHELP_CTL_CODE(GETPHYSICALADDRRANGE ,0x0028),
-PMHELP_CTL_CODE(ALLOCPAGE ,0x0029),
-PMHELP_CTL_CODE(FREEPAGE ,0x002A),
-PMHELP_CTL_CODE(ENABLERING3IOPL ,0x002B),
-PMHELP_CTL_CODE(DISABLERING3IOPL ,0x002C),
-PMHELP_CTL_CODE(GASETLOCALPATH ,0x002D),
-PMHELP_CTL_CODE(GAGETEXPORTS ,0x002E),
-PMHELP_CTL_CODE(GATHUNK ,0x002F),
-PMHELP_CTL_CODE(SETNUCLEUSPATH ,0x0030),
diff --git a/board/MAI/bios_emulator/scitech/include/pmapi.h b/board/MAI/bios_emulator/scitech/include/pmapi.h
deleted file mode 100644
index 7ddace7080..0000000000
--- a/board/MAI/bios_emulator/scitech/include/pmapi.h
+++ /dev/null
@@ -1,1148 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-*
-* Description: Header file for the OS Portability Manager Library, which
-* contains functions to implement OS specific services in a
-* generic, cross platform API. Porting the OS Portability
-* Manager library is the first step to porting any SciTech
-* products to a new platform.
-*
-****************************************************************************/
-
-#ifndef __PMAPI_H
-#define __PMAPI_H
-
-#include "scitech.h"
-#include "pcilib.h"
-#include "ztimerc.h"
-#if !defined(__WIN32_VXD__) && !defined(__OS2_VDD__) && !defined(__NT_DRIVER__)
-#include <stdio.h>
-#include <stdlib.h>
-#endif
-
-/*--------------------------- Macros and Typedefs -------------------------*/
-
-/* You will need to define one of the following before you compile this
- * library for it to work correctly with the DOS extender that you are
- * using when compiling for extended DOS:
- *
- * TNT - Phar Lap TNT DOS Extender
- * DOS4GW - Rational DOS/4GW, DOS/4GW Pro, Causeway and PMODE/W
- * DJGPP - DJGPP port of GNU C++
- *
- * If none is specified, we will automatically determine which operating
- * system is being targetted and the following will be defined (provided by
- * scitech.h header file):
- *
- * __MSDOS16__ - Default for 16 bit MSDOS mode
- * __MSDOS32__ - Default for 32 bit MSDOS
- * __WINDOWS16__ - Default for 16 bit Windows
- * __WINDOWS32__ - Default for 32 bit Windows
- *
- * One of the following will be defined automatically for you to select
- * which memory model is in effect:
- *
- * REALMODE - 16 bit real mode (large memory model)
- * PM286 - 16 protected mode (large memory model)
- * PM386 - 32 protected mode (flat memory model)
- */
-
-#if defined(__UNIX__) && !defined(_MAX_PATH)
-#define _MAX_PATH 256
-#endif
-
-#if defined(TNT) || defined(DOSX) || defined(X32VM) || defined(DPMI32) \
- || defined(DOS4GW) || defined(DJGPP) || defined(__WINDOWS32__) \
- || defined(__MSDOS32__) || defined(__UNIX__) || defined(__WIN32_VXD__) \
- || defined(__32BIT__) || defined(__SMX32__) || defined(__RTTARGET__)
-#define PM386
-#elif defined(DPMI16) || defined(__WINDOWS16__)
-#define PM286
-#else
-#define REALMODE
-#endif
-
-#pragma pack(1)
-
-/* Provide the typedefs for the PM_int386 functions, which issue native
- * interrupts in real or protected mode and can pass extended registers
- * around.
- */
-
-struct _PMDWORDREGS {
- ulong eax,ebx,ecx,edx,esi,edi,cflag;
- };
-
-struct _PMWORDREGS {
- ushort ax,ax_hi;
- ushort bx,bx_hi;
- ushort cx,cx_hi;
- ushort dx,dx_hi;
- ushort si,si_hi;
- ushort di,di_hi;
- ushort cflag,cflag_hi;
- };
-
-struct _PMBYTEREGS {
- uchar al, ah; ushort ax_hi;
- uchar bl, bh; ushort bx_hi;
- uchar cl, ch; ushort cx_hi;
- uchar dl, dh; ushort dx_hi;
- };
-
-typedef union {
- struct _PMDWORDREGS e;
- struct _PMWORDREGS x;
- struct _PMBYTEREGS h;
- } PMREGS;
-
-typedef struct {
- ushort es;
- ushort cs;
- ushort ss;
- ushort ds;
- ushort fs;
- ushort gs;
- } PMSREGS;
-
-/* Provide definitions for the real mode register structures passed to
- * the PM_int86() and PM_int86x() routines. Note that we provide our own
- * functions to do this for 16-bit code that calls the PM_int386 functions.
- */
-
-typedef PMREGS RMREGS;
-typedef PMSREGS RMSREGS;
-
-typedef struct {
- long edi;
- long esi;
- long ebp;
- long reserved;
- long ebx;
- long edx;
- long ecx;
- long eax;
- short flags;
- short es,ds,fs,gs,ip,cs,sp,ss;
- } DPMI_regs;
-
-#ifdef __MSDOS__
-/* Register structure passed to PM_VxDCall function */
-typedef struct {
- ulong eax;
- ulong ebx;
- ulong ecx;
- ulong edx;
- ulong esi;
- ulong edi;
- ushort ds,es;
- } VXD_regs;
-#endif
-
-#define PM_MAX_DRIVE 3
-#define PM_MAX_PATH 256
-#define PM_FILE_INVALID (void*)0xFFFFFFFF
-
-/* Structure for generic directory traversal and management. Also the same
- * values are passed to PM_setFileAttr to change the file attributes.
- */
-
-typedef struct {
- ulong dwSize;
- ulong attrib;
- ulong sizeLo;
- ulong sizeHi;
- char name[PM_MAX_PATH];
- } PM_findData;
-
-/* Macro to compute the byte offset of a field in a structure of type type */
-
-#define PM_FIELD_OFFSET(type,field) ((long)&(((type*)0)->field))
-
-/* Marcto to compute the address of the base of the structure given its type,
- * and an address of a field within the structure.
- */
-
-#define PM_CONTAINING_RECORD(address, type, field) \
- ((type*)( \
- (char*)(address) - \
- (char*)(&((type*)0)->field)))
-
-/* Flags stored in the PM_findData structure, and also values passed to
- * PM_setFileAttr to change the file attributes.
- */
-
-#define PM_FILE_NORMAL 0x00000000
-#define PM_FILE_READONLY 0x00000001
-#define PM_FILE_DIRECTORY 0x00000002
-#define PM_FILE_ARCHIVE 0x00000004
-#define PM_FILE_HIDDEN 0x00000008
-#define PM_FILE_SYSTEM 0x00000010
-
-/* Flags returned by the PM_splitpath function */
-
-#define PM_HAS_WILDCARDS 0x01
-#define PM_HAS_EXTENSION 0x02
-#define PM_HAS_FILENAME 0x04
-#define PM_HAS_DIRECTORY 0x08
-#define PM_HAS_DRIVE 0x10
-
-/* Structure passed to the PM_setFileTime functions */
-typedef struct {
- short sec; /* Seconds */
- short min; /* Minutes */
- short hour; /* Hour (0--23) */
- short day; /* Day of month (1--31) */
- short mon; /* Month (0--11) */
- short year; /* Year (calendar year minus 1900) */
- } PM_time;
-
-/* Define a macro for creating physical base addresses from segment:offset */
-
-#define MK_PHYS(s,o) (((ulong)(s) << 4) + (ulong)(o))
-
-/* Define the different types of modes supported. This is a global variable
- * that can be used to determine the type at runtime which will contain
- * one of these values.
- */
-
-typedef enum {
- PM_realMode,
- PM_286,
- PM_386
- } PM_mode_enum;
-
-/* Define types passed to PM_enableWriteCombine */
-
-#define PM_MTRR_UNCACHABLE 0
-#define PM_MTRR_WRCOMB 1
-#define PM_MTRR_WRTHROUGH 4
-#define PM_MTRR_WRPROT 5
-#define PM_MTRR_WRBACK 6
-#define PM_MTRR_MAX 6
-
-/* Error codes returned by PM_enableWriteCombine */
-
-#define PM_MTRR_ERR_OK 0
-#define PM_MTRR_NOT_SUPPORTED -1
-#define PM_MTRR_ERR_PARAMS -2
-#define PM_MTRR_ERR_NOT_4KB_ALIGNED -3
-#define PM_MTRR_ERR_BELOW_1MB -4
-#define PM_MTRR_ERR_NOT_ALIGNED -5
-#define PM_MTRR_ERR_OVERLAP -6
-#define PM_MTRR_ERR_TYPE_MISMATCH -7
-#define PM_MTRR_ERR_NONE_FREE -8
-#define PM_MTRR_ERR_NOWRCOMB -9
-#define PM_MTRR_ERR_NO_OS_SUPPORT -10
-
-/* Values passed to the PM_DMACProgram function */
-
-#define PM_DMA_READ_ONESHOT 0x44 /* One-shot DMA read */
-#define PM_DMA_WRITE_ONESHOT 0x48 /* One-shot DMA write */
-#define PM_DMA_READ_AUTOINIT 0x54 /* Auto-init DMA read */
-#define PM_DMA_WRITE_AUTOINIT 0x58 /* Auto-init DMA write */
-
-/* Flags passed to suspend application callback */
-
-#define PM_DEACTIVATE 1
-#define PM_REACTIVATE 2
-
-/* Return codes that the application can return from the suspend application
- * callback registered with the PM library. See the MGL documentation for
- * more details.
- */
-#define PM_SUSPEND_APP 0
-#define PM_NO_SUSPEND_APP 1
-
-/****************************************************************************
-REMARKS:
-This enumeration defines the type values passed to the PM_agpReservePhysical
-function, to define how the physical memory mapping should be handled.
-
-The PM_agpUncached type indicates that the memory should be allocated as
-uncached memory.
-
-The PM_agpWriteCombine type indicates that write combining should be enabled
-for physical memory mapping. This is used for framebuffer write combing and
-speeds up direct framebuffer writes to the memory.
-
-The PM_agpIntelDCACHE type indicates that memory should come from the Intel
-i81x Display Cache (or DCACHE) memory pool. This flag is specific to the
-Intel i810 and i815 controllers, and should not be passed for any other
-controller type.
-
-HEADER:
-pmapi.h
-
-MEMBERS:
-PM_agpUncached - Indicates that the memory should be uncached
-PM_agpWriteCombine - Indicates that the memory should be write combined
-PM_agpIntelDCACHE - Indicates that the memory should come from DCACHE pool
-****************************************************************************/
-typedef enum {
- PM_agpUncached,
- PM_agpWriteCombine,
- PM_agpIntelDCACHE
- } PM_agpMemoryType;
-
-/* Defines the size of an system memory page */
-
-#define PM_PAGE_SIZE 4096
-
-/* Type definition for a physical memory address */
-
-typedef unsigned long PM_physAddr;
-
-/* Define a bad physical address returned by map physical functions */
-
-#define PM_BAD_PHYS_ADDRESS 0xFFFFFFFF
-
-/* Type definition for the 12-byte lock handle for locking linear memory */
-
-typedef struct {
- ulong h[3];
- } PM_lockHandle;
-
-/* 'C' calling conventions always */
-
-#define PMAPI _ASMAPI
-#define PMAPIP _ASMAPIP
-
-/* Internal typedef to override DPMI_int86 handler */
-
-typedef ibool (PMAPIP DPMI_handler_t)(DPMI_regs *regs);
-void PMAPI DPMI_setInt10Handler(DPMI_handler_t handler);
-
-/* Type definitions for a window handle for console modes */
-
-#if defined(__DRIVER__) || defined(__WIN32_VXD__) || defined(__NT_DRIVER__)
-typedef void *PM_HWND; /* Pointer for portable drivers */
-typedef void *PM_MODULE; /* Module handle for portable drivers */
-#elif defined(__WINDOWS__)
-#ifdef DECLARE_HANDLE
-typedef HWND PM_HWND; /* Real window handle */
-typedef HINSTANCE PM_MODULE; /* Win32 DLL handle */
-#else
-typedef void *PM_HWND; /* Place holder if windows.h not included */
-typedef void *PM_MODULE; /* Place holder if windows.h not included */
-#endif
-#elif defined(__USE_X11__)
-typedef struct {
- Window *window;
- Display *display;
- } PM_HWND; /* X11 window handle */
-#elif defined(__OS2__)
-typedef void *PM_HWND;
-typedef void *PM_MODULE;
-#elif defined(__LINUX__)
-typedef int PM_HWND; /* Console id for fullscreen Linux */
-typedef void *PM_MODULE;
-#elif defined(__QNX__)
-typedef int PM_HWND; /* Console id for fullscreen QNX */
-typedef void *PM_MODULE;
-#elif defined(__RTTARGET__)
-typedef int PM_HWND; /* Placeholder for RTTarget-32 */
-typedef void *PM_MODULE;
-#elif defined(__REALDOS__)
-typedef int PM_HWND; /* Placeholder for fullscreen DOS */
-typedef void *PM_MODULE; /* Placeholder for fullscreen DOS */
-#elif defined(__SMX32__)
-typedef int PM_HWND; /* Placeholder for fullscreen SMX */
-typedef void *PM_MODULE;
-#elif defined(__SNAP__)
-typedef void *PM_HWND;
-typedef void *PM_MODULE;
-#else
-#error PM library not ported to this platform yet!
-#endif
-
-/* Type definition for code pointers */
-
-typedef void (*__codePtr)();
-
-/* Type definition for a C based interrupt handler */
-
-typedef void (PMAPIP PM_intHandler)(void);
-typedef ibool (PMAPIP PM_irqHandler)(void);
-
-/* Hardware IRQ handle used to save and restore the hardware IRQ */
-
-typedef void *PM_IRQHandle;
-
-/* Type definition for the fatal cleanup handler */
-
-typedef void (PMAPIP PM_fatalCleanupHandler)(void);
-
-/* Type defifinition for save state callback function */
-
-typedef int (PMAPIP PM_saveState_cb)(int flags);
-
-/* Type definintion for enum write combined callback function */
-
-typedef void (PMAPIP PM_enumWriteCombine_t)(ulong base,ulong length,uint type);
-
-/* Structure defining all the PM API functions as exported to
- * the binary portable DLL's.
- */
-
-typedef struct {
- ulong dwSize;
- int (PMAPIP PM_getModeType)(void);
- void * (PMAPIP PM_getBIOSPointer)(void);
- void * (PMAPIP PM_getA0000Pointer)(void);
- void * (PMAPIP PM_mapPhysicalAddr)(ulong base,ulong limit,ibool isCached);
- void * (PMAPIP PM_mallocShared)(long size);
- void * reserved1;
- void (PMAPIP PM_freeShared)(void *ptr);
- void * (PMAPIP PM_mapToProcess)(void *linear,ulong limit);
- void * (PMAPIP PM_mapRealPointer)(uint r_seg,uint r_off);
- void * (PMAPIP PM_allocRealSeg)(uint size,uint *r_seg,uint *r_off);
- void (PMAPIP PM_freeRealSeg)(void *mem);
- void * (PMAPIP PM_allocLockedMem)(uint size,ulong *physAddr,ibool contiguous,ibool below16Meg);
- void (PMAPIP PM_freeLockedMem)(void *p,uint size,ibool contiguous);
- void (PMAPIP PM_callRealMode)(uint seg,uint off, RMREGS *regs,RMSREGS *sregs);
- int (PMAPIP PM_int86)(int intno, RMREGS *in, RMREGS *out);
- int (PMAPIP PM_int86x)(int intno, RMREGS *in, RMREGS *out,RMSREGS *sregs);
- void (PMAPIP DPMI_int86)(int intno, DPMI_regs *regs);
- void (PMAPIP PM_availableMemory)(ulong *physical,ulong *total);
- void * (PMAPIP PM_getVESABuf)(uint *len,uint *rseg,uint *roff);
- long (PMAPIP PM_getOSType)(void);
- void (PMAPIP PM_fatalError)(const char *msg);
- void (PMAPIP PM_setBankA)(int bank);
- void (PMAPIP PM_setBankAB)(int bank);
- void (PMAPIP PM_setCRTStart)(int x,int y,int waitVRT);
- char * (PMAPIP PM_getCurrentPath)(char *path,int maxLen);
- const char * (PMAPIP PM_getVBEAFPath)(void);
- const char * (PMAPIP PM_getNucleusPath)(void);
- const char * (PMAPIP PM_getNucleusConfigPath)(void);
- const char * (PMAPIP PM_getUniqueID)(void);
- const char * (PMAPIP PM_getMachineName)(void);
- ibool (PMAPIP VF_available)(void);
- void * (PMAPIP VF_init)(ulong baseAddr,int bankSize,int codeLen,void *bankFunc);
- void (PMAPIP VF_exit)(void);
- PM_HWND (PMAPIP PM_openConsole)(PM_HWND hwndUser,int device,int xRes,int yRes,int bpp,ibool fullScreen);
- int (PMAPIP PM_getConsoleStateSize)(void);
- void (PMAPIP PM_saveConsoleState)(void *stateBuf,PM_HWND hwndConsole);
- void (PMAPIP PM_restoreConsoleState)(const void *stateBuf,PM_HWND hwndConsole);
- void (PMAPIP PM_closeConsole)(PM_HWND hwndConsole);
- void (PMAPIP PM_setOSCursorLocation)(int x,int y);
- void (PMAPIP PM_setOSScreenWidth)(int width,int height);
- int (PMAPIP PM_enableWriteCombine)(ulong base,ulong length,uint type);
- void (PMAPIP PM_backslash)(char *filename);
- int (PMAPIP PM_lockDataPages)(void *p,uint len,PM_lockHandle *lockHandle);
- int (PMAPIP PM_unlockDataPages)(void *p,uint len,PM_lockHandle *lockHandle);
- int (PMAPIP PM_lockCodePages)(__codePtr p,uint len,PM_lockHandle *lockHandle);
- int (PMAPIP PM_unlockCodePages)(__codePtr p,uint len,PM_lockHandle *lockHandle);
- ibool (PMAPIP PM_setRealTimeClockHandler)(PM_intHandler ih,int frequency);
- void (PMAPIP PM_setRealTimeClockFrequency)(int frequency);
- void (PMAPIP PM_restoreRealTimeClockHandler)(void);
- ibool (PMAPIP PM_doBIOSPOST)(ushort axVal,ulong BIOSPhysAddr,void *BIOSPtr,ulong BIOSLen);
- char (PMAPIP PM_getBootDrive)(void);
- void (PMAPIP PM_freePhysicalAddr)(void *ptr,ulong limit);
- uchar (PMAPIP PM_inpb)(int port);
- ushort (PMAPIP PM_inpw)(int port);
- ulong (PMAPIP PM_inpd)(int port);
- void (PMAPIP PM_outpb)(int port,uchar val);
- void (PMAPIP PM_outpw)(int port,ushort val);
- void (PMAPIP PM_outpd)(int port,ulong val);
- void * reserved2;
- void (PMAPIP PM_setSuspendAppCallback)(PM_saveState_cb saveState);
- ibool (PMAPIP PM_haveBIOSAccess)(void);
- int (PMAPIP PM_kbhit)(void);
- int (PMAPIP PM_getch)(void);
- ibool (PMAPIP PM_findBPD)(const char *dllname,char *bpdpath);
- ulong (PMAPIP PM_getPhysicalAddr)(void *p);
- void (PMAPIP PM_sleep)(ulong milliseconds);
- int (PMAPIP PM_getCOMPort)(int port);
- int (PMAPIP PM_getLPTPort)(int port);
- PM_MODULE (PMAPIP PM_loadLibrary)(const char *szDLLName);
- void * (PMAPIP PM_getProcAddress)(PM_MODULE hModule,const char *szProcName);
- void (PMAPIP PM_freeLibrary)(PM_MODULE hModule);
- int (PMAPIP PCI_enumerate)(PCIDeviceInfo info[]);
- ulong (PMAPIP PCI_accessReg)(int index,ulong value,int func,PCIDeviceInfo *info);
- ibool (PMAPIP PCI_setHardwareIRQ)(PCIDeviceInfo *info,uint intPin,uint IRQ);
- void (PMAPIP PCI_generateSpecialCyle)(uint bus,ulong specialCycleData);
- void * reserved3;
- ulong (PMAPIP PCIBIOS_getEntry)(void);
- uint (PMAPIP CPU_getProcessorType)(void);
- ibool (PMAPIP CPU_haveMMX)(void);
- ibool (PMAPIP CPU_have3DNow)(void);
- ibool (PMAPIP CPU_haveSSE)(void);
- ibool (PMAPIP CPU_haveRDTSC)(void);
- ulong (PMAPIP CPU_getProcessorSpeed)(ibool accurate);
- void (PMAPIP ZTimerInit)(void);
- void (PMAPIP LZTimerOn)(void);
- ulong (PMAPIP LZTimerLap)(void);
- void (PMAPIP LZTimerOff)(void);
- ulong (PMAPIP LZTimerCount)(void);
- void (PMAPIP LZTimerOnExt)(LZTimerObject *tm);
- ulong (PMAPIP LZTimerLapExt)(LZTimerObject *tm);
- void (PMAPIP LZTimerOffExt)(LZTimerObject *tm);
- ulong (PMAPIP LZTimerCountExt)(LZTimerObject *tm);
- void (PMAPIP ULZTimerOn)(void);
- ulong (PMAPIP ULZTimerLap)(void);
- void (PMAPIP ULZTimerOff)(void);
- ulong (PMAPIP ULZTimerCount)(void);
- ulong (PMAPIP ULZReadTime)(void);
- ulong (PMAPIP ULZElapsedTime)(ulong start,ulong finish);
- void (PMAPIP ULZTimerResolution)(ulong *resolution);
- void * (PMAPIP PM_findFirstFile)(const char *filename,PM_findData *findData);
- ibool (PMAPIP PM_findNextFile)(void *handle,PM_findData *findData);
- void (PMAPIP PM_findClose)(void *handle);
- void (PMAPIP PM_makepath)(char *p,const char *drive,const char *dir,const char *name,const char *ext);
- int (PMAPIP PM_splitpath)(const char *fn,char *drive,char *dir,char *name,char *ext);
- ibool (PMAPIP PM_driveValid)(char drive);
- void (PMAPIP PM_getdcwd)(int drive,char *dir,int len);
- void (PMAPIP PM_setFileAttr)(const char *filename,uint attrib);
- ibool (PMAPIP PM_mkdir)(const char *filename);
- ibool (PMAPIP PM_rmdir)(const char *filename);
- uint (PMAPIP PM_getFileAttr)(const char *filename);
- ibool (PMAPIP PM_getFileTime)(const char *filename,ibool gmtTime,PM_time *time);
- ibool (PMAPIP PM_setFileTime)(const char *filename,ibool gmtTime,PM_time *time);
- char * (PMAPIP CPU_getProcessorName)(void);
- int (PMAPIP PM_getVGAStateSize)(void);
- void (PMAPIP PM_saveVGAState)(void *stateBuf);
- void (PMAPIP PM_restoreVGAState)(const void *stateBuf);
- void (PMAPIP PM_vgaBlankDisplay)(void);
- void (PMAPIP PM_vgaUnblankDisplay)(void);
- void (PMAPIP PM_blockUntilTimeout)(ulong milliseconds);
- void (PMAPIP _PM_add64)(u32 a_low,s32 a_high,u32 b_low,s32 b_high,__i64 *result);
- void (PMAPIP _PM_sub64)(u32 a_low,s32 a_high,u32 b_low,s32 b_high,__i64 *result);
- void (PMAPIP _PM_mul64)(u32 a_low,s32 a_high,u32 b_low,s32 b_high,__i64 *result);
- void (PMAPIP _PM_div64)(u32 a_low,s32 a_high,u32 b_low,s32 b_high,__i64 *result);
- void (PMAPIP _PM_shr64)(u32 a_low,s32 a_high,s32 shift,__i64 *result);
- void (PMAPIP _PM_sar64)(u32 a_low,s32 a_high,s32 shift,__i64 *result);
- void (PMAPIP _PM_shl64)(u32 a_low,s32 a_high,s32 shift,__i64 *result);
- void (PMAPIP _PM_neg64)(u32 a_low,s32 a_high,__i64 *result);
- ulong (PMAPIP PCI_findBARSize)(int bar,PCIDeviceInfo *pci);
- void (PMAPIP PCI_readRegBlock)(PCIDeviceInfo *info,int index,void *dst,int count);
- void (PMAPIP PCI_writeRegBlock)(PCIDeviceInfo *info,int index,void *src,int count);
- void (PMAPIP PM_flushTLB)(void);
- void (PMAPIP PM_useLocalMalloc)(void * (*malloc)(size_t size),void * (*calloc)(size_t nelem,size_t size),void * (*realloc)(void *ptr,size_t size),void (*free)(void *p));
- void * (PMAPIP PM_malloc)(size_t size);
- void * (PMAPIP PM_calloc)(size_t nelem,size_t size);
- void * (PMAPIP PM_realloc)(void *ptr,size_t size);
- void (PMAPIP PM_free)(void *p);
- ibool (PMAPIP PM_getPhysicalAddrRange)(void *p,ulong length,ulong *physAddress);
- void * (PMAPIP PM_allocPage)(ibool locked);
- void (PMAPIP PM_freePage)(void *p);
- ulong (PMAPIP PM_agpInit)(void);
- void (PMAPIP PM_agpExit)(void);
- ibool (PMAPIP PM_agpReservePhysical)(ulong numPages,int type,void **physContext,PM_physAddr *physAddr);
- ibool (PMAPIP PM_agpReleasePhysical)(void *physContext);
- ibool (PMAPIP PM_agpCommitPhysical)(void *physContext,ulong numPages,ulong startOffset,PM_physAddr *physAddr);
- ibool (PMAPIP PM_agpFreePhysical)(void *physContext,ulong numPages,ulong startOffset);
- int (PMAPIP PCI_getNumDevices)(void);
- void (PMAPIP PM_setLocalBPDPath)(const char *path);
- void * (PMAPIP PM_loadDirectDraw)(int device);
- void (PMAPIP PM_unloadDirectDraw)(int device);
- PM_HWND (PMAPIP PM_getDirectDrawWindow)(void);
- void (PMAPIP PM_doSuspendApp)(void);
- } PM_imports;
-
-#pragma pack()
-
-/*---------------------------- Global variables ---------------------------*/
-
-#ifdef __cplusplus
-extern "C" { /* Use "C" linkage when in C++ mode */
-#endif
-
-#ifdef __WIN32_VXD__
-#define VESA_BUF_SIZE 1024
-extern uchar *_PM_rmBufAddr;
-#endif
-
-/* {secret} Pointer to global exports structure.
- * Should not be used by application programs.
- */
-extern PM_imports _VARAPI _PM_imports;
-
-/* {secret} */
-extern void * (*__PM_malloc)(size_t size);
-/* {secret} */
-extern void * (*__PM_calloc)(size_t nelem,size_t size);
-/* {secret} */
-extern void * (*__PM_realloc)(void *ptr,size_t size);
-/* {secret} */
-extern void (*__PM_free)(void *p);
-
-/*--------------------------- Function Prototypes -------------------------*/
-
-/* Routine to initialise the host side PM library. Note used from DLL's */
-
-void PMAPI PM_init(void);
-
-/* Routine to return either PM_realMode, PM_286 or PM_386 */
-
-int PMAPI PM_getModeType(void);
-
-/* Routine to return a selector to the BIOS data area at segment 0x40 */
-
-void * PMAPI PM_getBIOSPointer(void);
-
-/* Routine to return a linear pointer to the VGA frame buffer memory */
-
-void * PMAPI PM_getA0000Pointer(void);
-
-/* Routines to map/free physical memory into the current DS segment. In
- * some environments (32-bit DOS is one), after the mapping has been
- * allocated, it cannot be freed. Hence you should only allocate the
- * mapping once and cache the value for use by other parts of your
- * application. If the mapping cannot be createed, this function will
- * return a NULL pointer.
- *
- * This routine will also work for memory addresses below 1Mb, but the
- * mapped address cannot cross the 1Mb boundary.
- */
-
-void * PMAPI PM_mapPhysicalAddr(ulong base,ulong limit,ibool isCached);
-void PMAPI PM_freePhysicalAddr(void *ptr,ulong limit);
-
-/* Routine to determine the physical address of a linear address. It is
- * up to the caller to ensure the entire address range for a linear
- * block of memory is page aligned if that is required.
- */
-
-ulong PMAPI PM_getPhysicalAddr(void *p);
-ibool PMAPI PM_getPhysicalAddrRange(void *p,ulong length,ulong *physAddress);
-
-/* Routines for memory allocation. By default these functions use the regular
- * C runtime library malloc/free functions, but you can use the
- * PM_useLocalMalloc function to override the default memory allocator with
- * your own memory allocator. This will ensure that all memory allocation
- * used by SciTech products will use your overridden memory allocator
- * functions.
- *
- * Note that BPD files automatically map the C runtime library
- * malloc/calloc/realloc/free calls from inside the BPD to the PM library
- * versions by default.
- */
-
-void PMAPI PM_useLocalMalloc(void * (*malloc)(size_t size),void * (*calloc)(size_t nelem,size_t size),void * (*realloc)(void *ptr,size_t size),void (*free)(void *p));
-void * PMAPI PM_malloc(size_t size);
-void * PMAPI PM_calloc(size_t nelem,size_t size);
-void * PMAPI PM_realloc(void *ptr,size_t size);
-void PMAPI PM_free(void *p);
-
-/* Routine to allocate a memory block in the global shared region that
- * is common to all tasks and accessible from ring 0 code.
- */
-
-void * PMAPI PM_mallocShared(long size);
-
-/* Routine to free the allocated shared memory block */
-
-void PMAPI PM_freeShared(void *ptr);
-
-/* Attach a previously allocated linear mapping to a new process */
-
-void * PMAPI PM_mapToProcess(void *linear,ulong limit);
-
-/* Macros to extract byte, word and long values from a char pointer */
-
-#define PM_getByte(p) *((volatile uchar*)(p))
-#define PM_getWord(p) *((volatile ushort*)(p))
-#define PM_getLong(p) *((volatile ulong*)(p))
-#define PM_setByte(p,v) PM_getByte(p) = (v)
-#define PM_setWord(p,v) PM_getWord(p) = (v)
-#define PM_setLong(p,v) PM_getLong(p) = (v)
-
-/* Routine for accessing a low 1Mb memory block. You dont need to free this
- * pointer, but in 16 bit protected mode the selector allocated will be
- * re-used the next time this routine is called.
- */
-
-void * PMAPI PM_mapRealPointer(uint r_seg,uint r_off);
-
-/* Routine to allocate a block of conventional memory below the 1Mb
- * limit so that it can be accessed from real mode. Ensure that you free
- * the segment when you are done with it.
- *
- * This routine returns a selector and offset to the segment that has been
- * allocated, and also returns the real mode segment and offset which can
- * be passed to real mode routines. Will return 0 if memory could not be
- * allocated.
- *
- * Please note that with some DOS extenders, memory allocated with the
- * following function cannot be freed, hence it will be allocated for the
- * life of your program. Thus if you need to call a bunch of different
- * real-mode routines in your program, allocate a single large buffer at
- * program startup that can be re-used throughout the program execution.
- */
-
-void * PMAPI PM_allocRealSeg(uint size,uint *r_seg,uint *r_off);
-void PMAPI PM_freeRealSeg(void *mem);
-
-/* Routine to allocate a block of locked memory, and return both the
- * linear and physical addresses of the memory. You should always
- * allocate locked memory blocks in page sized chunks (ie: 4K on IA32).
- * If the memory is not contiguous, you will need to use the
- * PM_getPhysicalAddr function to get the physical address of linear
- * pages within the memory block (the returned physical address will be
- * for the first address in the memory block only).
- */
-
-void * PMAPI PM_allocLockedMem(uint size,ulong *physAddr,ibool contiguous,ibool below16Meg);
-void PMAPI PM_freeLockedMem(void *p,uint size,ibool contiguous);
-
-/* Routine to allocate and free paged sized blocks of shared memory.
- * Addressable from all processes, but not from a ring 0 context
- * under OS/2. Note that under OS/2 PM_mapSharedPages must be called
- * to map the memory blocks into the shared memory address space
- * of each connecting process.
- */
-
-void * PMAPI PM_allocPage(ibool locked);
-void PMAPI PM_freePage(void *p);
-#ifdef __OS2__
-void PMAPI PM_mapSharedPages(void);
-#endif
-
-/* Routine to return true if we have access to the BIOS on the host OS */
-
-ibool PMAPI PM_haveBIOSAccess(void);
-
-/* Routine to call a real mode assembly language procedure. Register
- * values are passed in and out in the 'regs' and 'sregs' structures. We
- * do not provide any method of copying data from the protected mode stack
- * to the real mode stack, so if you need to pass data to real mode, you will
- * need to write a real mode assembly language hook to recieve the values
- * in registers, and to pass the data through a real mode block allocated
- * with the PM_allocRealSeg() routine.
- */
-
-void PMAPI PM_callRealMode(uint seg,uint off, RMREGS *regs,RMSREGS *sregs);
-
-/* Routines to generate real mode interrupts using the same interface that
- * is used by int86() and int86x() in realmode. This routine is need to
- * call certain BIOS and DOS functions that are not supported by some
- * DOS extenders. No translation is done on any of the register values,
- * so they must be correctly set up and translated by the calling program.
- *
- * Normally the DOS extenders will allow you to use the normal int86()
- * function directly and will pass on unhandled calls to real mode to be
- * handled by the real mode handler. However calls to int86x() with real
- * mode segment values to be loaded will cause a GPF if used with the
- * standard int86x(), so you should use these routines if you know you
- * want to call a real mode handler.
- */
-
-int PMAPI PM_int86(int intno, RMREGS *in, RMREGS *out);
-int PMAPI PM_int86x(int intno, RMREGS *in, RMREGS *out,RMSREGS *sregs);
-
-/* Routine to generate a real mode interrupt. This is identical to the
- * above function, but takes a DPMI_regs structure for the registers
- * which has a lot more information. It is only available from 32-bit
- * protected mode.
- */
-
-void PMAPI DPMI_int86(int intno, DPMI_regs *regs);
-
-/* Function to return the amount of available physical and total memory.
- * The results of this function are *only* valid before you have made any
- * calls to malloc() and free(). If you need to keep track of exactly how
- * much memory is currently allocated, you need to call this function to
- * get the total amount of memory available and then keep track of
- * the available memory every time you call malloc() and free().
- */
-
-void PMAPI PM_availableMemory(ulong *physical,ulong *total);
-
-/* Return the address of a global VESA real mode transfer buffer for use
- * by applications.
- */
-
-void * PMAPI PM_getVESABuf(uint *len,uint *rseg,uint *roff);
-
-/* Handle fatal error conditions */
-
-void PMAPI PM_fatalError(const char *msg);
-
-/* Function to set a cleanup error handler called when PM_fatalError
- * is called. This allows us to the console back into a normal state
- * if we get a failure from deep inside a BPD file. This function is
- * not exported to BPD files, and is only used by code compiled for the
- * OS.
- */
-
-void PMAPI PM_setFatalErrorCleanup(PM_fatalCleanupHandler cleanup);
-
-/* Return the OS type flag as defined in <drvlib/os/os.h> */
-
-long PMAPI PM_getOSType(void);
-
-/* Functions to set a VBE bank via an Int 10h */
-
-void PMAPI PM_setBankA(int bank);
-void PMAPI PM_setBankAB(int bank);
-void PMAPI PM_setCRTStart(int x,int y,int waitVRT);
-
-/* Return the current working directory */
-
-char * PMAPI PM_getCurrentPath(char *path,int maxLen);
-
-/* Return paths to the VBE/AF and Nucleus directories */
-
-const char * PMAPI PM_getVBEAFPath(void);
-const char * PMAPI PM_getNucleusPath(void);
-const char * PMAPI PM_getNucleusConfigPath(void);
-
-/* Find the path to a binary portable DLL */
-
-void PMAPI PM_setLocalBPDPath(const char *path);
-ibool PMAPI PM_findBPD(const char *dllname,char *bpdpath);
-
-/* Returns the drive letter of the boot drive for DOS, OS/2 and Windows */
-
-char PMAPI PM_getBootDrive(void);
-
-/* Return a network unique machine identifier as a string */
-
-const char * PMAPI PM_getUniqueID(void);
-
-/* Return the network machine name as a string */
-
-const char * PMAPI PM_getMachineName(void);
-
-/* Functions to install and remove the virtual linear framebuffer
- * emulation code. For unsupported DOS extenders and when running under
- * a DPMI host like Windows or OS/2, this function will return a NULL.
- */
-
-ibool PMAPI VF_available(void);
-void * PMAPI VF_init(ulong baseAddr,int bankSize,int codeLen,void *bankFunc);
-void PMAPI VF_exit(void);
-
-/* Functions to wait for a keypress and read a key for command line
- * environments such as DOS, Win32 console and Unix.
- */
-
-int PMAPI PM_kbhit(void);
-int PMAPI PM_getch(void);
-
-/* Functions to create either a fullscreen or windowed console on the
- * desktop, and to allow the resolution of fullscreen consoles to be
- * changed on the fly without closing the console. For non-windowed
- * environments (such as a Linux or OS/2 fullscreen console), these
- * functions enable console graphics mode and restore console text mode.
- *
- * The suspend application callback is used to allow the application to
- * save the state of the fullscreen console mode to allow temporary
- * switching to another console or back to the regular GUI desktop. It
- * is also called to restore the fullscreen graphics state after the
- * fullscreen console regains the focus.
- *
- * The device parameter allows for the console to be opened on a different
- * display controllers (0 is always the primary controller).
- */
-
-PM_HWND PMAPI PM_openConsole(PM_HWND hwndUser,int device,int xRes,int yRes,int bpp,ibool fullScreen);
-int PMAPI PM_getConsoleStateSize(void);
-void PMAPI PM_saveConsoleState(void *stateBuf,PM_HWND hwndConsole);
-void PMAPI PM_setSuspendAppCallback(PM_saveState_cb saveState);
-void PMAPI PM_restoreConsoleState(const void *stateBuf,PM_HWND hwndConsole);
-void PMAPI PM_closeConsole(PM_HWND hwndConsole);
-
-/* Functions to modify OS console information */
-
-void PMAPI PM_setOSCursorLocation(int x,int y);
-void PMAPI PM_setOSScreenWidth(int width,int height);
-
-/* Function to emable Intel PPro/PII write combining */
-
-int PMAPI PM_enableWriteCombine(ulong base,ulong length,uint type);
-int PMAPI PM_enumWriteCombine(PM_enumWriteCombine_t callback);
-
-/* Function to add a path separator to the end of a filename (if not present) */
-
-void PMAPI PM_backslash(char *filename);
-
-/* Routines to lock and unlock regions of memory under a virtual memory
- * environment. These routines _must_ be used to lock all hardware
- * and mouse interrupt handlers installed, _AND_ any global data that
- * these handler manipulate, so that they will always be present in memory
- * to handle the incoming interrupts.
- *
- * Note that it is important to call the correct routine depending on
- * whether the area being locked is code or data, so that under 32 bit
- * PM we will get the selector value correct.
- */
-
-int PMAPI PM_lockDataPages(void *p,uint len,PM_lockHandle *lockHandle);
-int PMAPI PM_unlockDataPages(void *p,uint len,PM_lockHandle *lockHandle);
-int PMAPI PM_lockCodePages(__codePtr p,uint len,PM_lockHandle *lockHandle);
-int PMAPI PM_unlockCodePages(__codePtr p,uint len,PM_lockHandle *lockHandle);
-
-/* Routines to install and remove Real Time Clock interrupt handlers. The
- * frequency of the real time clock can be changed by calling
- * PM_setRealTimeClockFrequeny, and the value can be any power of 2 value
- * from 2Hz to 8192Hz.
- *
- * Note that you _must_ lock the memory containing the interrupt
- * handlers with the PM_lockPages() function otherwise you may encounter
- * problems in virtual memory environments.
- *
- * NOTE: User space versions of the PM library should fail these functions.
- */
-
-ibool PMAPI PM_setRealTimeClockHandler(PM_intHandler ih,int frequency);
-void PMAPI PM_setRealTimeClockFrequency(int frequency);
-void PMAPI PM_restoreRealTimeClockHandler(void);
-
-/* Routines to install and remove hardware interrupt handlers.
- *
- * Note that you _must_ lock the memory containing the interrupt
- * handlers with the PM_lockPages() function otherwise you may encounter
- * problems in virtual memory environments.
- *
- * NOTE: User space versions of the PM library should fail these functions.
- */
-
-PM_IRQHandle PMAPI PM_setIRQHandler(int IRQ,PM_irqHandler ih);
-void PMAPI PM_restoreIRQHandler(PM_IRQHandle irqHandle);
-
-/* Functions to program DMA using the legacy ISA DMA controller */
-
-void PMAPI PM_DMACEnable(int channel);
-void PMAPI PM_DMACDisable(int channel);
-void PMAPI PM_DMACProgram(int channel,int mode,ulong bufferPhys,int count);
-ulong PMAPI PM_DMACPosition(int channel);
-
-/* Function to post secondary graphics controllers using the BIOS */
-
-ibool PMAPI PM_doBIOSPOST(ushort axVal,ulong BIOSPhysAddr,void *mappedBIOS,ulong BIOSLen);
-
-/* Function to init the AGP functions and return the AGP aperture size in MB */
-
-ulong PMAPI PM_agpInit(void);
-void PMAPI PM_agpExit(void);
-
-/* Functions to reserve and release physical AGP memory ranges */
-
-ibool PMAPI PM_agpReservePhysical(ulong numPages,int type,void **physContext,PM_physAddr *physAddr);
-ibool PMAPI PM_agpReleasePhysical(void *physContext);
-
-/* Functions to commit and free physical AGP memory ranges */
-
-ibool PMAPI PM_agpCommitPhysical(void *physContext,ulong numPages,ulong startOffset,PM_physAddr *physAddr);
-ibool PMAPI PM_agpFreePhysical(void *physContext,ulong numPages,ulong startOffset);
-
-/* Functions to do I/O port manipulation directly from C code. These
- * functions are portable and will work on any processor architecture
- * to access I/O space registers on PCI devices.
- */
-
-uchar PMAPI PM_inpb(int port);
-ushort PMAPI PM_inpw(int port);
-ulong PMAPI PM_inpd(int port);
-void PMAPI PM_outpb(int port,uchar val);
-void PMAPI PM_outpw(int port,ushort val);
-void PMAPI PM_outpd(int port,ulong val);
-
-/* Functions to determine the I/O port locations for COM and LPT ports.
- * The functions are zero based, so for COM1 or LPT1 pass in a value of 0,
- * for COM2 or LPT2 pass in a value of 1 etc.
- */
-
-int PMAPI PM_getCOMPort(int port);
-int PMAPI PM_getLPTPort(int port);
-
-/* Internal functions that need prototypes */
-
-void PMAPI _PM_getRMvect(int intno, long *realisr);
-void PMAPI _PM_setRMvect(int intno, long realisr);
-void PMAPI _PM_freeMemoryMappings(void);
-
-/* Function to override the default debug log file location */
-
-void PMAPI PM_setDebugLog(const char *logFilePath);
-
-/* Function to put the process to sleep for the specified milliseconds */
-
-void PMAPI PM_sleep(ulong milliseconds);
-
-/* Function to block until 'milliseconds' have passed since last call */
-
-void PMAPI PM_blockUntilTimeout(ulong milliseconds);
-
-/* Functions for directory traversal and management */
-
-void * PMAPI PM_findFirstFile(const char *filename,PM_findData *findData);
-ibool PMAPI PM_findNextFile(void *handle,PM_findData *findData);
-void PMAPI PM_findClose(void *handle);
-void PMAPI PM_makepath(char *p,const char *drive,const char *dir,const char *name,const char *ext);
-int PMAPI PM_splitpath(const char *fn,char *drive,char *dir,char *name,char *ext);
-ibool PMAPI PM_driveValid(char drive);
-void PMAPI PM_getdcwd(int drive,char *dir,int len);
-uint PMAPI PM_getFileAttr(const char *filename);
-void PMAPI PM_setFileAttr(const char *filename,uint attrib);
-ibool PMAPI PM_getFileTime(const char *filename,ibool gmTime,PM_time *time);
-ibool PMAPI PM_setFileTime(const char *filename,ibool gmTime,PM_time *time);
-ibool PMAPI PM_mkdir(const char *filename);
-ibool PMAPI PM_rmdir(const char *filename);
-
-/* Functions to handle loading OS specific shared libraries */
-
-PM_MODULE PMAPI PM_loadLibrary(const char *szDLLName);
-void * PMAPI PM_getProcAddress(PM_MODULE hModule,const char *szProcName);
-void PMAPI PM_freeLibrary(PM_MODULE hModule);
-
-/* Functions and macros for 64-bit arithmetic */
-
-void PMAPI _PM_add64(u32 a_low,s32 a_high,u32 b_low,s32 b_high,__i64 *result);
-void PMAPI _PM_sub64(u32 a_low,s32 a_high,u32 b_low,s32 b_high,__i64 *result);
-void PMAPI _PM_mul64(u32 a_low,s32 a_high,u32 b_low,s32 b_high,__i64 *result);
-void PMAPI _PM_div64(u32 a_low,s32 a_high,u32 b_low,s32 b_high,__i64 *result);
-void PMAPI _PM_shr64(u32 a_low,s32 a_high,s32 shift,__i64 *result);
-void PMAPI _PM_sar64(u32 a_low,s32 a_high,s32 shift,__i64 *result);
-void PMAPI _PM_shl64(u32 a_low,s32 a_high,s32 shift,__i64 *result);
-void PMAPI _PM_neg64(u32 a_low,s32 a_high,__i64 *result);
-#ifdef __NATIVE_INT64__
-#define PM_add64(r,a,b) (r) = (a) + (b)
-#define PM_add64_32(r,a,b) (r) = (a) + (b)
-#define PM_sub64(r,a,b) (r) = (a) - (b)
-#define PM_sub64_32(r,a,b) (r) = (a) - (b)
-#define PM_mul64(r,a,b) (r) = (a) * (b)
-#define PM_mul64_32(r,a,b) (r) = (a) * (b)
-#define PM_div64(r,a,b) (r) = (a) / (b)
-#define PM_div64_32(r,a,b) (r) = (a) / (b)
-#define PM_shr64(r,a,s) (r) = (a) >> (s)
-#define PM_sar64(r,a,s) (r) = ((s64)(a)) >> (s)
-#define PM_shl64(r,a,s) (r) = (u64)(a) << (s)
-#define PM_neg64(r,a,s) (r) = -(a)
-#define PM_not64(r,a,s) (r) = ~(a)
-#define PM_eq64(a,b) (a) == (b)
-#define PM_gt64(a,b) (a) > (b)
-#define PM_lt64(a,b) (a) < (b)
-#define PM_geq64(a,b) (a) >= (b)
-#define PM_leq64(a,b) (a) <= (b)
-#define PM_64to32(a) (u32)(a)
-#define PM_64tos32(a) (s32)(a)
-#define PM_set64(a,b,c) (a) = ((u64)(b) << 32) + (c)
-#define PM_set64_32(a,b) (a) = (b)
-#else
-#define PM_add64(r,a,b) _PM_add64((a).low,(a).high,(b).low,(b).high,&(r))
-#define PM_add64_32(r,a,b) _PM_add64((a).low,(a).high,b,0,&(r))
-#define PM_sub64(r,a,b) _PM_sub64((a).low,(a).high,(b).low,(b).high,&(r))
-#define PM_sub64_32(r,a,b) _PM_sub64((a).low,(a).high,b,0,&(r))
-#define PM_mul64(r,a,b) _PM_mul64((a).low,(a).high,(b).low,(b).high,&(r))
-#define PM_mul64_32(r,a,b) _PM_mul64((a).low,(a).high,b,0,&(r))
-#define PM_div64(r,a,b) _PM_div64((a).low,(a).high,(b).low,(b).high,&(r))
-#define PM_div64_32(r,a,b) _PM_div64((a).low,(a).high,b,0,&(r))
-#define PM_shr64(r,a,s) _PM_shr64((a).low,(a).high,s,&(r))
-#define PM_sar64(r,a,s) _PM_sar64((a).low,(a).high,s,&(r))
-#define PM_shl64(r,a,s) _PM_shl64((a).low,(a).high,s,&(r))
-#define PM_neg64(r,a,s) _PM_neg64((a).low,(a).high,&(r))
-#define PM_not64(r,a,s) (r).low = ~(a).low, (r).high = ~(a).high
-#define PM_eq64(a,b) ((a).low == (b).low && (a).high == (b).high)
-#define PM_gt64(a,b) (((a).high > (b).high) || ((a).high == (b).high && (a).low > (b).low))
-#define PM_lt64(a,b) (((a).high < (b).high) || ((a).high == (b).high && (a).low < (b).low))
-#define PM_geq64(a,b) (PM_eq64(a,b) || PM_gt64(a,b))
-#define PM_leq64(a,b) (PM_eq64(a,b) || PM_lt64(a,b))
-#define PM_64to32(a) (u32)(a.low)
-#define PM_64tos32(a) ((a).high < 0) ? -(a).low : (a).low)
-#define PM_set64(a,b,c) (a).high = (b), (a).low = (c)
-#define PM_set64_32(a,b) (a).high = 0, (a).low = (b)
-#endif
-
-/* Function to enable IOPL access if required */
-
-int PMAPI PM_setIOPL(int iopl);
-
-/* Function to flush the TLB and CPU caches */
-
-void PMAPI PM_flushTLB(void);
-
-/* DOS specific fucntions */
-
-#ifdef __MSDOS__
-uint PMAPI PMHELP_getVersion(void);
-void PMAPI PM_VxDCall(VXD_regs *regs);
-#endif
-
-/* Functions to save and restore the VGA hardware state */
-
-int PMAPI PM_getVGAStateSize(void);
-void PMAPI PM_saveVGAState(void *stateBuf);
-void PMAPI PM_restoreVGAState(const void *stateBuf);
-void PMAPI PM_vgaBlankDisplay(void);
-void PMAPI PM_vgaUnblankDisplay(void);
-
-/* Functions to load and unload DirectDraw libraries. Only used on
- * Windows platforms.
- */
-
-void * PMAPI PM_loadDirectDraw(int device);
-void PMAPI PM_unloadDirectDraw(int device);
-PM_HWND PMAPI PM_getDirectDrawWindow(void);
-void PMAPI PM_doSuspendApp(void);
-
-/* Functions to install, start, stop and remove NT services. Valid only
- * for Win32 apps running on Windows NT.
- */
-
-#ifdef __WINDOWS32__
-ulong PMAPI PM_installService(const char *szDriverName,const char *szServiceName,const char *szLoadGroup,ulong dwServiceType);
-ulong PMAPI PM_startService(const char *szServiceName);
-ulong PMAPI PM_stopService(const char *szServiceName);
-ulong PMAPI PM_removeService(const char *szServiceName);
-#endif
-
-/* Routines to generate native interrupts (ie: protected mode interrupts
- * for protected mode apps) using an interface the same as that use by
- * int86() and int86x() in realmode. These routines are required because
- * many 32 bit compilers use different register structures and different
- * functions causing major portability headaches. Thus we provide our
- * own and solve it all in one fell swoop, and we also get a routine to
- * put stuff into 32 bit registers from real mode ;-)
- */
-
-void PMAPI PM_segread(PMSREGS *sregs);
-int PMAPI PM_int386(int intno, PMREGS *in, PMREGS *out);
-int PMAPI PM_int386x(int intno, PMREGS *in, PMREGS *out,PMSREGS *sregs);
-
-/* Call the X86 emulator or the real BIOS in our test harness */
-
-#if defined(TEST_HARNESS) && !defined(PMLIB)
-#define PM_mapRealPointer(r_seg,r_off) _PM_imports.PM_mapRealPointer(r_seg,r_off)
-#define PM_getVESABuf(len,rseg,roff) _PM_imports.PM_getVESABuf(len,rseg,roff)
-#define PM_callRealMode(seg,off,regs,sregs) _PM_imports.PM_callRealMode(seg,off,regs,sregs)
-#define PM_int86(intno,in,out) _PM_imports.PM_int86(intno,in,out)
-#define PM_int86x(intno,in,out,sregs) _PM_imports.PM_int86x(intno,in,out,sregs)
-#endif
-
-#ifdef __cplusplus
-} /* End of "C" linkage for C++ */
-#endif
-
-/* Include OS extensions for interrupt handling */
-
-#if defined(__REALDOS__) || defined(__SMX32__)
-#include "pmint.h"
-#endif
-
-#endif /* __PMAPI_H */
diff --git a/board/MAI/bios_emulator/scitech/include/pmimp.h b/board/MAI/bios_emulator/scitech/include/pmimp.h
deleted file mode 100644
index 817f5e6a21..0000000000
--- a/board/MAI/bios_emulator/scitech/include/pmimp.h
+++ /dev/null
@@ -1,193 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-*
-* Description: Header file declaring all the PM imports structure for the
-* current version of the PM library. Included in all code
-* that needs to pass the PM imports to BPD files.
-*
-****************************************************************************/
-
-PM_imports _VARAPI _PM_imports = {
- sizeof(PM_imports),
- PM_getModeType,
- PM_getBIOSPointer,
- PM_getA0000Pointer,
- PM_mapPhysicalAddr,
- PM_mallocShared,
- NULL,
- PM_freeShared,
- PM_mapToProcess,
- PM_mapRealPointer,
- PM_allocRealSeg,
- PM_freeRealSeg,
- PM_allocLockedMem,
- PM_freeLockedMem,
- PM_callRealMode,
- PM_int86,
- PM_int86x,
- DPMI_int86,
- PM_availableMemory,
- PM_getVESABuf,
- PM_getOSType,
- PM_fatalError,
- PM_setBankA,
- PM_setBankAB,
- PM_setCRTStart,
- PM_getCurrentPath,
- PM_getVBEAFPath,
- PM_getNucleusPath,
- PM_getNucleusConfigPath,
- PM_getUniqueID,
- PM_getMachineName,
- VF_available,
- VF_init,
- VF_exit,
- PM_openConsole,
- PM_getConsoleStateSize,
- PM_saveConsoleState,
- PM_restoreConsoleState,
- PM_closeConsole,
- PM_setOSCursorLocation,
- PM_setOSScreenWidth,
- PM_enableWriteCombine,
- PM_backslash,
- PM_lockDataPages,
- PM_unlockDataPages,
- PM_lockCodePages,
- PM_unlockCodePages,
- PM_setRealTimeClockHandler,
- PM_setRealTimeClockFrequency,
- PM_restoreRealTimeClockHandler,
- PM_doBIOSPOST,
- PM_getBootDrive,
- PM_freePhysicalAddr,
- PM_inpb,
- PM_inpw,
- PM_inpd,
- PM_outpb,
- PM_outpw,
- PM_outpd,
- NULL,
- PM_setSuspendAppCallback,
- PM_haveBIOSAccess,
- PM_kbhit,
- PM_getch,
- PM_findBPD,
- PM_getPhysicalAddr,
- PM_sleep,
- PM_getCOMPort,
- PM_getLPTPort,
- PM_loadLibrary,
- PM_getProcAddress,
- PM_freeLibrary,
- PCI_enumerate,
- PCI_accessReg,
- PCI_setHardwareIRQ,
- PCI_generateSpecialCyle,
- NULL,
- PCIBIOS_getEntry,
- CPU_getProcessorType,
- CPU_haveMMX,
- CPU_have3DNow,
- CPU_haveSSE,
- CPU_haveRDTSC,
- CPU_getProcessorSpeed,
- ZTimerInit,
- LZTimerOn,
- LZTimerLap,
- LZTimerOff,
- LZTimerCount,
- LZTimerOnExt,
- LZTimerLapExt,
- LZTimerOffExt,
- LZTimerCountExt,
- ULZTimerOn,
- ULZTimerLap,
- ULZTimerOff,
- ULZTimerCount,
- ULZReadTime,
- ULZElapsedTime,
- ULZTimerResolution,
- PM_findFirstFile,
- PM_findNextFile,
- PM_findClose,
- PM_makepath,
- PM_splitpath,
- PM_driveValid,
- PM_getdcwd,
- PM_setFileAttr,
- PM_mkdir,
- PM_rmdir,
- PM_getFileAttr,
- PM_getFileTime,
- PM_setFileTime,
- CPU_getProcessorName,
- PM_getVGAStateSize,
- PM_saveVGAState,
- PM_restoreVGAState,
- PM_vgaBlankDisplay,
- PM_vgaUnblankDisplay,
- PM_blockUntilTimeout,
- _PM_add64,
- _PM_sub64,
- _PM_mul64,
- _PM_div64,
- _PM_shr64,
- _PM_sar64,
- _PM_shl64,
- _PM_neg64,
- PCI_findBARSize,
- PCI_readRegBlock,
- PCI_writeRegBlock,
- PM_flushTLB,
- PM_useLocalMalloc,
- PM_malloc,
- PM_calloc,
- PM_realloc,
- PM_free,
- PM_getPhysicalAddrRange,
- PM_allocPage,
- PM_freePage,
- PM_agpInit,
- PM_agpExit,
- PM_agpReservePhysical,
- PM_agpReleasePhysical,
- PM_agpCommitPhysical,
- PM_agpFreePhysical,
- PCI_getNumDevices,
- PM_setLocalBPDPath,
-#ifdef __WINDOWS32__
- PM_loadDirectDraw,
- PM_unloadDirectDraw,
- PM_getDirectDrawWindow,
- PM_doSuspendApp,
-#else
- NULL,
- NULL,
- NULL,
- NULL,
-#endif
- };
diff --git a/board/MAI/bios_emulator/scitech/include/pmint.h b/board/MAI/bios_emulator/scitech/include/pmint.h
deleted file mode 100644
index 7d76dad50c..0000000000
--- a/board/MAI/bios_emulator/scitech/include/pmint.h
+++ /dev/null
@@ -1,211 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Real mode and 16/32 bit Protected Mode
-*
-* Description: Header file for the interrupt handling extensions to the OS
-* Portability Manager Library. These extensions includes
-* simplified interrupt handling, allowing all common interrupt
-* handlers to be hooked and handled directly with normal C
-* functions, both in 16 bit and 32 bit modes. Note however that
-* simplified handling does not mean slow performance! All low
-* level interrupt handling is done efficiently in assembler
-* for speed (well actually necessary to insulate the
-* application from the lack of far pointers in 32 bit PM). The
-* interrupt handlers currently supported are:
-*
-* Mouse (0x33 callback)
-* Timer Tick (0x8)
-* Keyboard (0x9 and 0x15)
-* Control C/Break (0x23/0x1B)
-* Critical Error (0x24)
-*
-****************************************************************************/
-
-#ifndef __PMINT_H
-#define __PMINT_H
-
-/*--------------------------- Macros and Typedefs -------------------------*/
-
-#ifdef __SMX32__
-/* PC interrupts (Ensure consistent with pme.inc) */
-#define PM_IRQ0 0x40
-#define PM_IRQ1 (PM_IRQ0+1)
-#define PM_IRQ6 (PM_IRQ0+6)
-#define PM_IRQ14 (PM_IRQ0+14)
-#endif
-
-/* Define the different types of interrupt handlers that we support */
-
-typedef uint (PMAPIP PM_criticalHandler)(uint axValue,uint diValue);
-typedef void (PMAPIP PM_breakHandler)(uint breakHit);
-typedef short (PMAPIP PM_key15Handler)(short scanCode);
-typedef void (PMAPIP PM_mouseHandler)(uint event, uint butstate,int x,int y,int mickeyX,int mickeyY);
-
-/* Create a type for representing far pointers in both 16 and 32 bit
- * protected mode.
- */
-
-#ifdef PM386
-typedef struct {
- long off;
- short sel;
- } PMFARPTR;
-#define PMNULL {0,0}
-#else
-typedef void *PMFARPTR;
-#define PMNULL NULL
-#endif
-
-/*--------------------------- Function Prototypes -------------------------*/
-
-#ifdef __cplusplus
-extern "C" { /* Use "C" linkage when in C++ mode */
-#endif
-
-/* Routine to load save default data segment selector value into a code
- * segment variable, and another to load the value into the DS register.
- */
-
-void PMAPI PM_loadDS(void);
-void PMAPI PM_saveDS(void);
-
-/* Routine to install a mouse interrupt handling routine. The
- * mouse handler routine is a normal C function, and the PM library
- * will take care of passing the correct parameters to the function,
- * and switching to a local stack.
- *
- * Note that you _must_ lock the memory containing the mouse interrupt
- * handler with the PM_lockPages() function otherwise you may encounter
- * problems in virtual memory environments.
- */
-
-int PMAPI PM_setMouseHandler(int mask,PM_mouseHandler mh);
-void PMAPI PM_restoreMouseHandler(void);
-
-/* Routine to reset the mouse driver, and re-install the current
- * mouse interrupt handler if one was currently installed (since the
- * mouse reset will automatically remove this handler.
- */
-
-void PMAPI PM_resetMouseDriver(int hardReset);
-
-/* Routine to reset the mouse driver, and re-install the current
- * mouse interrupt handler if one was currently installed (since the
- * mouse reset will automatically remove this handler.
- */
-
-void PMAPI PM_resetMouseDriver(int hardReset);
-
-/* Routines to install and remove timer interrupt handlers.
- *
- * Note that you _must_ lock the memory containing the interrupt
- * handlers with the PM_lockPages() function otherwise you may encounter
- * problems in virtual memory environments.
- */
-
-void PMAPI PM_setTimerHandler(PM_intHandler ih);
-void PMAPI PM_chainPrevTimer(void);
-void PMAPI PM_restoreTimerHandler(void);
-
-/* Routines to install and keyboard interrupt handlers.
- *
- * Note that you _must_ lock the memory containing the interrupt
- * handlers with the PM_lockPages() function otherwise you may encounter
- * problems in virtual memory environments.
- */
-
-void PMAPI PM_setKeyHandler(PM_intHandler ih);
-void PMAPI PM_chainPrevKey(void);
-void PMAPI PM_restoreKeyHandler(void);
-
-/* Routines to hook and unhook the alternate Int 15h keyboard intercept
- * callout routine. Your event handler will need to return the following:
- *
- * scanCode - Let the BIOS process scan code (chains to previous handler)
- * 0 - You have processed the scan code so flush from BIOS
- *
- * Note that this is not available under all DOS extenders, but does
- * work under real mode, DOS4GW and X32-VM. It does not work under the
- * PowerPack 32 bit DOS extenders. If you figure out how to do it let us know!
- */
-
-void PMAPI PM_setKey15Handler(PM_key15Handler ih);
-void PMAPI PM_restoreKey15Handler(void);
-
-/* Routines to install and remove the control c/break interrupt handlers.
- * Interrupt handling is performed by the PM/Pro library, and you can call
- * the supplied routines to test the status of the Ctrl-C and Ctrl-Break
- * flags. If you pass the value TRUE for 'clearFlag' to these routines,
- * the internal flags will be reset in order to catch another Ctrl-C or
- * Ctrl-Break interrupt.
- */
-
-void PMAPI PM_installBreakHandler(void);
-int PMAPI PM_ctrlCHit(int clearFlag);
-int PMAPI PM_ctrlBreakHit(int clearFlag);
-void PMAPI PM_restoreBreakHandler(void);
-
-/* Routine to install an alternate break handler that will call your
- * code directly. This is not available under all DOS extenders, but does
- * work under real mode, DOS4GW and X32-VM. It does not work under the
- * PowerPack 32 bit DOS extenders. If you figure out how to do it let us know!
- *
- * Note that you should either install one or the other, but not both!
- */
-
-void PMAPI PM_installAltBreakHandler(PM_breakHandler bh);
-
-/* Routines to install and remove the critical error handler. The interrupt
- * is handled by the PM/Pro library, and the operation will always be failed.
- * You can check the status of the critical error handler with the
- * appropriate function. If you pass the value TRUE for 'clearFlag', the
- * internal flag will be reset ready to catch another critical error.
- */
-
-void PMAPI PM_installCriticalHandler(void);
-int PMAPI PM_criticalError(int *axValue, int *diValue, int clearFlag);
-void PMAPI PM_restoreCriticalHandler(void);
-
-/* Routine to install an alternate critical handler that will call your
- * code directly. This is not available under all DOS extenders, but does
- * work under real mode, DOS4GW and X32-VM. It does not work under the
- * PowerPack 32 bit DOS extenders. If you figure out how to do it let us know!
- *
- * Note that you should either install one or the other, but not both!
- */
-
-void PMAPI PM_installAltCriticalHandler(PM_criticalHandler);
-
-/* Functions to manage protected mode only interrupt handlers */
-
-void PMAPI PM_getPMvect(int intno, PMFARPTR *isr);
-void PMAPI PM_setPMvect(int intno, PM_intHandler ih);
-void PMAPI PM_restorePMvect(int intno, PMFARPTR isr);
-
-#ifdef __cplusplus
-} /* End of "C" linkage for C++ */
-#endif
-
-#endif /* __PMINT_H */
diff --git a/board/MAI/bios_emulator/scitech/include/scitech.h b/board/MAI/bios_emulator/scitech/include/scitech.h
deleted file mode 100644
index 8d5eee9443..0000000000
--- a/board/MAI/bios_emulator/scitech/include/scitech.h
+++ /dev/null
@@ -1,712 +0,0 @@
-/****************************************************************************
-*
-* SciTech Multi-platform Graphics Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: any
-*
-* Description: General header file for operating system portable code.
-*
-****************************************************************************/
-
-#ifndef __SCITECH_H
-#define __SCITECH_H
-
-/* We have the following defines to identify the compilation environment:
- *
- * __16BIT__ Compiling for 16 bit code (any environment)
- * __32BIT__ Compiling for 32 bit code (any environment)
- * __MSDOS__ Compiling for MS-DOS (includes __WINDOWS16__, __WIN386__)
- * __REALDOS__ Compiling for MS-DOS (excludes __WINDOWS16__)
- * __MSDOS16__ Compiling for 16 bit MS-DOS
- * __MSDOS32__ Compiling for 32 bit MS-DOS
- * __WINDOWS__ Compiling for Windows
- * __WINDOWS16__ Compiling for 16 bit Windows (__MSDOS__ also defined)
- * __WINDOWS32__ Compiling for 32 bit Windows
- * __WIN32_VXD__ Compiling for a 32-bit C based VxD
- * __NT_DRIVER__ Compiling for a 32-bit C based NT device driver
- * __OS2__ Compiling for OS/2
- * __OS2_16__ Compiling for 16 bit OS/2
- * __OS2_32__ Compiling for 32 bit OS/2
- * __UNIX__ Compiling for Unix
- * __QNX__ Compiling for the QNX realtime OS (Unix compatible)
- * __LINUX__ Compiling for the Linux OS (Unix compatible)
- * __FREEBSD__ Compiling for the FreeBSD OS (Unix compatible)
- * __BEOS__ Compiling for the BeOS (Unix compatible)
- * __SMX32__ Compiling for the SMX 32-bit Real Time OS
- * __ENEA_OSE__ Compiling for the OSE embedded OS
- * __RTTARGET__ Compiling for the RTTarget 32-bit embedded OS
- * __MACOS__ Compiling for the MacOS platform (PowerPC)
- * __DRIVER__ Compiling for a 32-bit binary compatible driver
- * __CONSOLE__ Compiling for a fullscreen OS console mode
- * __SNAP__ Compiling as a Snap executeable or dynamic library
- *
- * __INTEL__ Compiling for Intel CPU's
- * __ALPHA__ Compiling for DEC Alpha CPU's
- * __MIPS__ Compiling for MIPS CPU's
- * __PPC__ Compiling for PowerPC CPU's
- * __MC68K__ Compiling for Motorola 680x0
- *
- * __BIG_ENDIAN__ Compiling for a big endian processor
- *
- */
-
-#ifdef __SC__
-#if __INTSIZE == 4
-#define __SC386__
-#endif
-#endif
-
-/* Determine some things that are compiler specific */
-
-#ifdef __GNUC__
-#ifdef __cplusplus
-/* G++ currently fucks this up! */
-#define __cdecl
-#define __stdcall
-#else
-#undef __cdecl
-#undef __stdcall
-#define __cdecl __attribute__ ((cdecl))
-#define __stdcall __attribute__ ((stdcall))
-#endif
-#define __FLAT__ /* GCC is always 32 bit flat model */
-#define __HAS_BOOL__ /* Latest GNU C++ has ibool type */
-#define __HAS_LONG_LONG__ /* GNU C supports long long type */
-#include <stdio.h> /* Bring in for definition of NULL */
-#endif
-
-#ifdef __BORLANDC__
-#if (__BORLANDC__ >= 0x500) || defined(CLASSLIB_DEFS_H)
-#define __HAS_BOOL__ /* Borland C++ 5.0 defines ibool type */
-#endif
-#if (__BORLANDC__ >= 0x502) && !defined(VTOOLSD) && !defined(__SMX32__)
-#define __HAS_INT64__ /* Borland C++ 5.02 supports __int64 type */
-#endif
-#endif
-
-#if defined(_MSC_VER) && !defined(__SC__) && !defined(VTOOLSD) && !defined(__SMX32__)
-#define __HAS_INT64__ /* Visual C++ supports __int64 type */
-#endif
-
-#if defined(__WATCOMC__) && (__WATCOMC__ >= 1100) && !defined(VTOOLSD) && !defined(__SMX32__)
-#define __HAS_INT64__ /* Watcom C++ 11.0 supports __int64 type */
-#endif
-
-/*---------------------------------------------------------------------------
- * Determine the compile time environment. This must be done for each
- * supported platform so that we can determine at compile time the target
- * environment, hopefully without requiring #define's from the user.
- *-------------------------------------------------------------------------*/
-
-/* 32-bit binary compatible driver. Compiled as Win32, but as OS neutral */
-#ifdef __DRIVER__
-#ifndef __32BIT__
-#define __32BIT__
-#endif
-#undef __WINDOWS__
-#undef _WIN32
-#undef __WIN32__
-#undef __NT__
-
-/* 32-bit Snap exe or dll. Compiled as Win32, but as OS neutral */
-#elif defined(__SNAP__)
-#ifndef __32BIT__
-#define __32BIT__
-#endif
-#undef __WINDOWS__
-#undef _WIN32
-#undef __WIN32__
-#undef __NT__
-
-/* 32-bit Windows VxD compile environment */
-#elif defined(__vtoolsd_h_) || defined(VTOOLSD)
-#include <vtoolsc.h>
-#define __WIN32_VXD__
-#ifndef __32BIT__
-#define __32BIT__
-#endif
-#define _MAX_PATH 256
-#undef __WINDOWS32__
-
-/* 32-bit Windows NT driver compile environment: TODO!! */
-#elif defined(__NT_DRIVER__)
-#include "ntdriver.h"
-#ifndef __32BIT__
-#define __32BIT__
-#endif
-#define _MAX_PATH 256
-#undef __WINDOWS32__
-
-/* 32-bit SMX compile environment */
-#elif defined(__SMX32__)
-#ifndef __MSDOS__
-#define __MSDOS__
-#endif
-#ifndef __32BIT__
-#define __32BIT__
-#endif
-#ifndef __CONSOLE__
-#define __CONSOLE__
-#endif
-
-/* 32-bit Enea OSE environment */
-#elif defined(__ENEA_OSE__)
-#ifndef __32BIT__
-#define __32BIT__
-#endif
-#ifndef __CONSOLE__
-#define __CONSOLE__
-#endif
-
-/* 32-bit RTTarget-32 environment */
-#elif defined(__RTTARGET__)
-#ifndef __32BIT__
-#define __32BIT__
-#endif
-#ifndef __CONSOLE__
-#define __CONSOLE__
-#endif
-
-/* 32-bit extended DOS compile environment */
-#elif defined(__MSDOS__) || defined(__MSDOS32__) || defined(__DOS__) || defined(__DPMI32__) || (defined(M_I86) && (!defined(__SC386__) && !defined(M_I386))) || defined(TNT)
-#ifndef __MSDOS__
-#define __MSDOS__
-#endif
-#if defined(__MSDOS32__) || defined(__386__) || defined(__FLAT__) || defined(__NT__) || defined(__SC386__)
-#ifndef __MSDOS32__
-#define __MSDOS32__
-#endif
-#ifndef __32BIT__
-#define __32BIT__
-#endif
-#ifndef __REALDOS__
-#define __REALDOS__
-#endif
-#ifndef __CONSOLE__
-#define __CONSOLE__
-#endif
-
-/* 16-bit Windows compile environment */
-#elif (defined(_Windows) || defined(_WINDOWS)) && !defined(__DPMI16__)
-#ifndef __16BIT__
-#define __16BIT__
-#endif
-#ifndef __WINDOWS16__
-#define __WINDOWS16__
-#endif
-#ifndef __WINDOWS__
-#define __WINDOWS__
-#endif
-#ifndef __MSDOS__
-#define __MSDOS__
-#endif
-
-/* 16-bit DOS compile environment */
-#else
-#ifndef __16BIT__
-#define __16BIT__
-#endif
-#ifndef __MSDOS16__
-#define __MSDOS16__
-#endif
-#ifndef __REALDOS__
-#define __REALDOS__
-#endif
-#ifndef __CONSOLE__
-#define __CONSOLE__
-#endif
-#endif
-
-/* 32-bit Windows compile environment */
-#elif defined(WIN32) || defined(_WIN32) || defined(__WIN32__) || defined(__NT__)
-#ifndef __32BIT__
-#define __32BIT__
-#endif
-#ifndef __WINDOWS32__
-#define __WINDOWS32__
-#endif
-#ifndef _WIN32
-#define _WIN32 /* Microsoft Win32 SDK headers use _WIN32 */
-#endif
-#ifndef WIN32
-#define WIN32 /* OpenGL headers use WIN32 */
-#endif
-#ifndef __WINDOWS__
-#define __WINDOWS__
-#endif
-
-/* 32-bit OS/2 VDD compile environment */
-/* We're assuming (for now) that CL386 must be used */
-#elif defined(MSDOS) && defined(M_I386)
-/* fixes necessary to compile with CL386 */
-#define __cdecl _cdecl
-typedef unsigned int size_t;
-
-#include <mvdm.h>
-
-/* This should probably be somewhere else... */
-/* Inline eligible functions (we have no CRT libs for CL386) */
-#pragma intrinsic (strcpy, strcmp, strlen, strcat)
-#pragma intrinsic (memcmp, memcpy, memset)
-
-#define __OS2_VDD__
-#ifndef __32BIT__
-#define __32BIT__
-#endif
-#define CCHMAXPATH 256
-#define _MAX_PATH 256
-#ifndef __OS2__
-#define __OS2__
-#endif
-#ifndef __OS2_32__
-#define __OS2_32__
-#endif
-
-/* 16-bit OS/2 compile environment */
-#elif defined(__OS2_16__)
-#ifndef __OS2__
-#define __OS2__
-#endif
-#ifndef __16BIT__
-#define __16BIT__
-#endif
-#ifndef __OS2_PM__
-#ifndef __CONSOLE__
-#define __CONSOLE__
-#endif
-#endif
-
-/* 32-bit OS/2 compile environment */
-#elif defined(__OS2__) || defined(__OS2_32__)
-#ifndef __OS2__
-#define __OS2__
-#endif
-#ifndef __OS2_32__
-#define __OS2_32__
-#endif
-#ifndef __32BIT__
-#define __32BIT__
-#endif
-#ifndef __OS2_PM__
-#ifndef __CONSOLE__
-#define __CONSOLE__
-#endif
-#endif
-
-/* 32-bit QNX compile environment */
-#elif defined(__QNX__)
-#ifndef __32BIT__
-#define __32BIT__
-#endif
-#ifndef __UNIX__
-#define __UNIX__
-#endif
-#ifdef __GNUC__
-#define stricmp strcasecmp
-#endif
-#if !defined(__PHOTON__) && !defined(__X11__)
-#ifndef __CONSOLE__
-#define __CONSOLE__
-#endif
-#endif
-
-/* 32-bit Linux compile environment */
-#elif defined(__LINUX__) || defined(linux)
-#ifndef __LINUX__
-#define __LINUX__
-#endif
-#ifndef __32BIT__
-#define __32BIT__
-#endif
-#ifndef __UNIX__
-#define __UNIX__
-#endif
-#ifdef __GNUC__
-#define stricmp strcasecmp
-#endif
-#ifndef __X11__
-#ifndef __CONSOLE__
-#define __CONSOLE__
-#endif
-#endif
-
-/* 32-bit FreeBSD compile environment */
-#elif defined(__FREEBSD__)
-#ifndef __FREEBSD__
-#define __FREEBSD__
-#endif
-#ifndef __32BIT__
-#define __32BIT__
-#endif
-#ifndef __UNIX__
-#define __UNIX__
-#endif
-#ifdef __GNUC__
-#define stricmp strcasecmp
-#endif
-#ifndef __X11__
-#ifndef __CONSOLE__
-#define __CONSOLE__
-#endif
-#endif
-
-/* 32-bit BeOS compile environment */
-#elif defined(__BEOS__)
-#ifndef __32BIT__
-#define __32BIT__
-#endif
-#ifndef __UNIX__
-#define __UNIX__
-#endif
-#ifdef __GNUC__
-#define stricmp strcasecmp
-#endif
-
-/* Unsupported OS! */
-#else
-#error This platform is not currently supported!
-#endif
-
-/* Determine the CPU type that we are compiling for */
-
-#if defined(__M_ALPHA) || defined(__ALPHA_) || defined(__ALPHA) || defined(__alpha)
-#ifndef __ALPHA__
-#define __ALPHA__
-#endif
-#elif defined(__M_PPC) || defined(__POWERC)
-#ifndef __PPC__
-#define __PPC__
-#endif
-#elif defined(__M_MRX000)
-#ifndef __MIPS__
-#define __MIPS__
-#endif
-#else
-#ifndef __INTEL__
-#define __INTEL__ /* Assume Intel if nothing found */
-#endif
-#endif
-
-/* We have the following defines to define the calling conventions for
- * publicly accesible functions:
- *
- * _PUBAPI - Compiler default calling conventions for all public 'C' functions
- * _ASMAPI - Calling conventions for all public assembler functions
- * _VARAPI - Modifiers for variables; Watcom C++ mangles C++ globals
- * _STDCALL - Win32 __stdcall where possible, __cdecl if not supported
- */
-
-#if defined(_MSC_VER) && defined(_WIN32) && !defined(__SC__)
-#define __PASCAL __stdcall
-#else
-#define __PASCAL __pascal
-#endif
-
-#if defined(NO_STDCALL)
-#define _STDCALL __cdecl
-#else
-#define _STDCALL __stdcall
-#endif
-
-#ifdef __WATCOMC__
-#if (__WATCOMC__ >= 1050)
-#define _VARAPI __cdecl
-#else
-#define _VARAPI
-#endif
-#else
-#define _VARAPI
-#endif
-
-#if defined(__IBMC__) || defined(__IBMCPP__)
-#define PTR_DECL_IN_FRONT
-#endif
-
-/* Define the calling conventions for all public functions. For simplicity
- * we define all public functions as __cdecl calling conventions, so that
- * they are the same across all compilers and runtime DLL's.
- */
-
-#define _PUBAPI __cdecl
-#define _ASMAPI __cdecl
-
-/* Determine the syntax for declaring a function pointer with a
- * calling conventions override. Most compilers require the calling
- * convention to be declared in front of the '*', but others require
- * it to be declared after the '*'. We handle both in here depending
- * on what the compiler requires.
- */
-
-#ifdef PTR_DECL_IN_FRONT
-#define _PUBAPIP * _PUBAPI
-#define _ASMAPIP * _ASMAPI
-#else
-#define _PUBAPIP _PUBAPI *
-#define _ASMAPIP _ASMAPI *
-#endif
-
-/* Useful macros */
-
-#define PRIVATE static
-#define PUBLIC
-
-/* This HAS to be 0L for 16-bit real mode code to work!!! */
-
-#ifndef NULL
-# define _NULL 0L
-# define NULL _NULL
-#endif
-
-#ifndef MAX
-# define MAX(a,b) ( ((a) > (b)) ? (a) : (b))
-#endif
-#ifndef MIN
-# define MIN(a,b) ( ((a) < (b)) ? (a) : (b))
-#endif
-#ifndef ABS
-# define ABS(a) ((a) >= 0 ? (a) : -(a))
-#endif
-#ifndef SIGN
-# define SIGN(a) ((a) > 0 ? 1 : -1)
-#endif
-
-/* General typedefs */
-
-#ifndef __GENDEFS
-#define __GENDEFS
-#if defined(__BEOS__)
-#include <SupportDefs.h>
-#else
-#ifdef __LINUX__
-#include <sys/types.h>
-#ifdef __STRICT_ANSI__
-typedef unsigned short ushort;
-typedef unsigned long ulong;
-typedef unsigned int uint;
-#endif
-#ifdef __KERNEL__
-#define __GENDEFS_2
-#endif
-#else
-#if !(defined(__QNXNTO__) && defined(GENERAL_STRUCT))
-typedef unsigned short ushort;
-typedef unsigned long ulong;
-#endif
-typedef unsigned int uint;
-#endif
-typedef unsigned char uchar;
-#endif
-typedef int ibool; /* Integer boolean type */
-#ifdef USE_BOOL /* Only for older code */
-#ifndef __cplusplus
-#define bool ibool /* Standard C */
-#else
-#ifndef __HAS_BOOL__
-#define bool ibool /* Older C++ compilers */
-#endif
-#endif /* __cplusplus */
-#endif /* USE_BOOL */
-#endif /* __GENDEFS */
-
-/* More general typedefs compatible with Linux kernel code */
-
-#ifndef __GENDEFS_2
-#define __GENDEFS_2
-typedef char s8;
-typedef unsigned char u8;
-typedef short s16;
-typedef unsigned short u16;
-#ifdef __16BIT__
-typedef long s32;
-typedef unsigned long u32;
-#else
-typedef int s32;
-typedef unsigned int u32;
-#endif
-typedef struct {
- u32 low;
- s32 high;
- } __i64;
-#ifdef __HAS_LONG_LONG__
-#define __NATIVE_INT64__
-typedef long long s64;
-typedef unsigned long long u64;
-#elif defined(__HAS_INT64__) && !defined(__16BIT__)
-#define __NATIVE_INT64__
-typedef __int64 s64;
-typedef unsigned __int64 u64;
-#else
-typedef __i64 s64;
-typedef __i64 u64;
-#endif
-#endif
-
-/* Boolean truth values */
-
-#undef false
-#undef true
-#undef NO
-#undef YES
-#undef FALSE
-#undef TRUE
-#define false 0
-#define true 1
-#define NO 0
-#define YES 1
-#define FALSE 0
-#define TRUE 1
-
-/* Inline debugger interrupts for Watcom C++ and Borland C++ */
-
-#ifdef __WATCOMC__
-void DebugInt(void);
-#pragma aux DebugInt = \
- "int 3";
-void DebugVxD(void);
-#pragma aux DebugVxD = \
- "int 1";
-#elif defined(__BORLANDC__)
-#define DebugInt() __emit__(0xCC)
-#define DebugVxD() {__emit__(0xCD); __emit__(0x01);}
-#elif defined(_MSC_VER)
-#define DebugInt() _asm int 0x3
-#define DebugVxD() _asm int 0x1
-#elif defined(__GNUC__)
-#define DebugInt() asm volatile ("int $0x3")
-#define DebugVxD() asm volatile ("int $0x1")
-#else
-void _ASMAPI DebugInt(void);
-void _ASMAPI DebugVxD(void);
-#endif
-
-/* Macros to break once and never break again */
-
-#define DebugIntOnce() \
-{ \
- static ibool firstTime = true; \
- if (firstTime) { \
- firstTime = false; \
- DebugInt(); \
- } \
-}
-
-#define DebugVxDOnce() \
-{ \
- static ibool firstTime = true; \
- if (firstTime) { \
- firstTime = false; \
- DebugVxD(); \
- } \
-}
-
-/* Macros for linux string compatibility functions */
-
-#ifdef __LINUX__
-#define stricmp strcasecmp
-#define strnicmp strncasecmp
-#endif
-
-/* Macros for NT driver string compatibility functions */
-
-#ifdef __NT_DRIVER__
-#define stricmp _stricmp
-#define strnicmp _strnicmp
-#endif
-
-/* Get rid of some helaciously annoying Visual C++ warnings! */
-
-#if defined(_MSC_VER) && !defined(__MWERKS__) && !defined(__SC__)
-#pragma warning(disable:4761) /* integral size mismatch in argument; conversion supplied */
-#pragma warning(disable:4244) /* conversion from 'unsigned short ' to 'unsigned char ', possible loss of data */
-#pragma warning(disable:4018) /* '<' : signed/unsigned mismatch */
-#pragma warning(disable:4305) /* 'initializing' : truncation from 'const double' to 'float' */
-#endif
-
-/*---------------------------------------------------------------------------
- * Set of debugging macros used by the libraries. If the debug flag is
- * set, they are turned on depending on the setting of the flag. User code
- * can override the default functions called when a check fails, and the
- * MGL does this so it can restore the system from graphics mode to display
- * an error message. These functions also log information to the
- * scitech.log file in the root directory of the hard drive when problems
- * show up.
- *
- * If you set the value of CHECKED to be 2, it will also enable code to
- * insert hard coded debugger interrupt into the source code at the line of
- * code where the check fail. This is useful if you run the code under a
- * debugger as it will break inside the debugger before exiting with a
- * failure condition.
- *
- * Also for code compiled to run under Windows, we also call the
- * OutputDebugString function to send the message to the system debugger
- * such as Soft-ICE or WDEB386. Hence if you get any non-fatal warnings you
- * will see those on the debugger terminal as well as in the log file.
- *-------------------------------------------------------------------------*/
-
-#ifdef __cplusplus
-extern "C" { /* Use "C" linkage when in C++ mode */
-#endif
-
-extern void (*_CHK_fail)(int fatal,const char *msg,const char *cond,const char *file,int line);
-void _CHK_defaultFail(int fatal,const char *msg,const char *cond,const char *file,int line);
-
-#ifdef CHECKED
-# define CHK(x) x
-#if CHECKED > 1
-# define CHECK(p) \
- ((p) ? (void)0 : DebugInt(), \
- _CHK_fail(1,"Check failed: '%s', file %s, line %d\n", \
- #p, __FILE__, __LINE__))
-# define WARN(p) \
- ((p) ? (void)0 : DebugInt(), \
- _CHK_fail(0,"Warning: '%s', file %s, line %d\n", \
- #p, __FILE__, __LINE__))
-#else
-# define CHECK(p) \
- ((p) ? (void)0 : \
- _CHK_fail(1,"Check failed: '%s', file %s, line %d\n", \
- #p, __FILE__, __LINE__))
-# define WARN(p) \
- ((p) ? (void)0 : \
- _CHK_fail(0,"Warning: '%s', file %s, line %d\n", \
- #p, __FILE__, __LINE__))
-#endif
-# define LOGFATAL(msg) \
- _CHK_fail(1,"Fatal error: '%s', file %s, line %d\n", \
- msg, __FILE__, __LINE__)
-# define LOGWARN(msg) \
- _CHK_fail(0,"Warning: '%s', file %s, line %d\n", \
- msg, __FILE__, __LINE__)
-#else
-# define CHK(x)
-# define CHECK(p) ((void)0)
-# define WARN(p) ((void)0)
-# define LOGFATAL(msg) ((void)0)
-# define LOGWARN(msg) ((void)0)
-#endif
-
-#ifdef __cplusplus
-} /* End of "C" linkage for C++ */
-#endif
-
-#endif /* __SCITECH_H */
diff --git a/board/MAI/bios_emulator/scitech/include/scitech.mac b/board/MAI/bios_emulator/scitech/include/scitech.mac
deleted file mode 100644
index 27a2fc06e8..0000000000
--- a/board/MAI/bios_emulator/scitech/include/scitech.mac
+++ /dev/null
@@ -1,1321 +0,0 @@
-;****************************************************************************
-;*
-;* ========================================================================
-;*
-;* The contents of this file are subject to the SciTech MGL Public
-;* License Version 1.0 (the "License"); you may not use this file
-;* except in compliance with the License. You may obtain a copy of
-;* the License at http://www.scitechsoft.com/mgl-license.txt
-;*
-;* Software distributed under the License is distributed on an
-;* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-;* implied. See the License for the specific language governing
-;* rights and limitations under the License.
-;*
-;* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-;*
-;* The Initial Developer of the Original Code is SciTech Software, Inc.
-;* All Rights Reserved.
-;*
-;* ========================================================================
-;*
-;* Language: NetWide Assembler (NASM) or Turbo Assembler (TASM)
-;* Environment: Any Intel Environment
-;*
-;* Description: Macros to provide memory model independant assembly language
-;* module for C programming. Supports the large and flat memory
-;* models.
-;*
-;* The defines that you should use when assembling modules that
-;* use this macro package are:
-;*
-;* __LARGE__ Assemble for 16-bit large model
-;* __FLAT__ Assemble for 32-bit FLAT memory model
-;* __NOU__ No underscore for all external C labels
-;* __NOU_VAR__ No underscore for global variables only
-;*
-;* The default settings are for 16-bit large memory model with
-;* leading underscores for symbol names.
-;*
-;* The main intent of the macro file is to enable programmers
-;* to write _one_ set of source that can be assembled to run
-;* in either 16 bit real and protected modes or 32 bit
-;* protected mode without the need to riddle the code with
-;* 'if flatmodel' style conditional assembly (it is still there
-;* but nicely hidden by a macro layer that enhances the
-;* readability and understandability of the resulting code).
-;*
-;****************************************************************************
-
-; Include the appropriate version in here depending on the assembler. NASM
-; appears to always try and parse code, even if it is in a non-compiling
-; block of a ifdef expression, and hence crashes if we include the TASM
-; macro package in the same header file. Hence we split the macros up into
-; two separate header files.
-
-ifdef __NASM_MAJOR__
-
-;============================================================================
-; Macro package when compiling with NASM.
-;============================================================================
-
-; Turn off underscores for globals if disabled for all externals
-
-%ifdef __NOU__
-%define __NOU_VAR__
-%endif
-
-; Define the __WINDOWS__ symbol if we are compiling for any Windows
-; environment
-
-%ifdef __WINDOWS16__
-%define __WINDOWS__ 1
-%endif
-%ifdef __WINDOWS32__
-%define __WINDOWS__ 1
-%define __WINDOWS32_386__ 1
-%endif
-
-; Macros for accessing 'generic' registers
-
-%ifdef __FLAT__
-%idefine _ax eax
-%idefine _bx ebx
-%idefine _cx ecx
-%idefine _dx edx
-%idefine _si esi
-%idefine _di edi
-%idefine _bp ebp
-%idefine _sp esp
-%idefine _es
-%idefine UCHAR BYTE ; Size of a character
-%idefine USHORT WORD ; Size of a short
-%idefine UINT DWORD ; Size of an integer
-%idefine ULONG DWORD ; Size of a long
-%idefine BOOL DWORD ; Size of a boolean
-%idefine DPTR DWORD ; Size of a data pointer
-%idefine FDPTR FWORD ; Size of a far data pointer
-%idefine NDPTR DWORD ; Size of a near data pointer
-%idefine CPTR DWORD ; Size of a code pointer
-%idefine FCPTR FWORD ; Size of a far code pointer
-%idefine NCPTR DWORD ; Size of a near code pointer
-%idefine FPTR NEAR ; Distance for function pointers
-%idefine DUINT dd ; Declare a integer variable
-%idefine intsize 4
-%idefine flatmodel 1
-%else
-%idefine _ax ax
-%idefine _bx bx
-%idefine _cx cx
-%idefine _dx dx
-%idefine _si si
-%idefine _di di
-%idefine _bp bp
-%idefine _sp sp
-%idefine _es es:
-%idefine UCHAR BYTE ; Size of a character
-%idefine USHORT WORD ; Size of a short
-%idefine UINT WORD ; Size of an integer
-%idefine ULONG DWORD ; Size of a long
-%idefine BOOL WORD ; Size of a boolean
-%idefine DPTR DWORD ; Size of a data pointer
-%idefine FDPTR DWORD ; Size of a far data pointer
-%idefine NDPTR WORD ; Size of a near data pointer
-%idefine CPTR DWORD ; Size of a code pointer
-%idefine FCPTR DWORD ; Size of a far code pointer
-%idefine NCPTR WORD ; Size of a near code pointer
-%idefine FPTR FAR ; Distance for function pointers
-%idefine DUINT dw ; Declare a integer variable
-%idefine intsize 2
-%endif
-%idefine invert ~
-%idefine offset
-%idefine use_nasm
-
-; Convert all jumps to near jumps, since NASM does not so this automatically
-
-%idefine jo jo near
-%idefine jno jno near
-%idefine jz jz near
-%idefine jnz jnz near
-%idefine je je near
-%idefine jne jne near
-%idefine jb jb near
-%idefine jbe jbe near
-%idefine ja ja near
-%idefine jae jae near
-%idefine jl jl near
-%idefine jle jle near
-%idefine jg jg near
-%idefine jge jge near
-%idefine jc jc near
-%idefine jnc jnc near
-%idefine js js near
-%idefine jns jns near
-
-%ifdef DOUBLE
-%idefine REAL QWORD
-%idefine DREAL dq
-%else
-%idefine REAL DWORD
-%idefine DREAL dd
-%endif
-
-; Boolean truth values (same as those in debug.h)
-
-%idefine False 0
-%idefine True 1
-%idefine No 0
-%idefine Yes 1
-%idefine Yes 1
-
-; Macro to be invoked at the start of all modules to set up segments for
-; later use. Does nothing for NASM.
-
-%imacro header 1
-%endmacro
-
-; Macro to begin a data segment
-
-%imacro begdataseg 1
-%ifdef __GNUC__
-segment .data public class=DATA use32 flat
-%else
-%ifdef flatmodel
-segment _DATA public align=4 class=DATA use32 flat
-%else
-segment _DATA public align=4 class=DATA use16
-%endif
-%endif
-%endmacro
-
-; Macro to end a data segment
-
-%imacro enddataseg 1
-%endmacro
-
-; Macro to begin a code segment
-
-%imacro begcodeseg 1
-%ifdef __PIC__
-%ifdef __LINUX__
- extern _GLOBAL_OFFSET_TABLE_
-%else
- extern __GLOBAL_OFFSET_TABLE_
-%endif
-%endif
-%ifdef __GNUC__
-segment .text public class=CODE use32 flat
-%else
-%ifdef flatmodel
-segment _TEXT public align=16 class=CODE use32 flat
-%else
-segment %1_TEXT public align=16 class=CODE use16
-%endif
-%endif
-%endmacro
-
-; Macro to begin a near code segment
-
-%imacro begcodeseg_near 0
-%ifdef __GNUC__
-segment .text public class=CODE use32 flat
-%else
-%ifdef flatmodel
-segment _TEXT public align=16 class=CODE use32 flat
-%else
-segment _TEXT public align=16 class=CODE use16
-%endif
-%endif
-%endmacro
-
-; Macro to end a code segment
-
-%imacro endcodeseg 1
-%endmacro
-
-; Macro to end a near code segment
-
-%imacro endcodeseg_near 0
-%endmacro
-
-; Macro for an extern C symbol. If the C compiler requires leading
-; underscores, then the underscores are added to the symbol names, otherwise
-; they are left off. The symbol name is referenced in the assembler code
-; using the non-underscored symbol name.
-
-%imacro cextern 2
-%ifdef __NOU_VAR__
-extern %1
-%else
-extern _%1
-%define %1 _%1
-%endif
-%endmacro
-
-%imacro cexternfunc 2
-%ifdef __NOU__
-extern %1
-%else
-extern _%1
-%define %1 _%1
-%endif
-%endmacro
-
-; Macro for a public C symbol. If the C compiler requires leading
-; underscores, then the underscores are added to the symbol names, otherwise
-; they are left off. The symbol name is referenced in the assembler code
-; using the non-underscored symbol name.
-
-%imacro cpublic 1
-%ifdef __NOU_VAR__
-global %1
-%1:
-%else
-global _%1
-_%1:
-%define %1 _%1
-%endif
-%endmacro
-
-; Macro for an global C symbol. If the C compiler requires leading
-; underscores, then the underscores are added to the symbol names, otherwise
-; they are left off. The symbol name is referenced in the assembler code
-; using the non-underscored symbol name.
-
-%imacro cglobal 1
-%ifdef __NOU_VAR__
-global %1
-%else
-global _%1
-%define %1 _%1
-%endif
-%endmacro
-
-; Macro for an global C function symbol. If the C compiler requires leading
-; underscores, then the underscores are added to the symbol names, otherwise
-; they are left off. The symbol name is referenced in the assembler code
-; using the non-underscored symbol name.
-
-%imacro cglobalfunc 1
-%ifdef __PIC__
-global %1:function
-%else
-%ifdef __NOU__
-global %1
-%else
-global _%1
-%define %1 _%1
-%endif
-%endif
-%endmacro
-
-; Macro to start a C callable function. This will be a far function for
-; 16-bit code, and a near function for 32-bit code.
-
-%imacro cprocstatic 1
-%push cproc
-%1:
-%ifdef flatmodel
-%stacksize flat
-%define ret retn
-%else
-%stacksize large
-%define ret retf
-%endif
-%assign %$localsize 0
-%endmacro
-
-%imacro cprocstart 1
-%push cproc
- cglobalfunc %1
-%1:
-%ifdef flatmodel
-%stacksize flat
-%define ret retn
-%else
-%stacksize large
-%define ret retf
-%endif
-%assign %$localsize 0
-%endmacro
-
-; This macro sets up a procedure to be exported from a 16 bit DLL. Since the
-; calling conventions are always _far _pascal for 16 bit DLL's, we actually
-; rename this routine with an extra underscore with 'C' calling conventions
-; and a small DLL stub will be provided by the high level code to call the
-; assembler routine.
-
-%imacro cprocstartdll16 1
-%ifdef __WINDOWS16__
-cprocstart _%1
-%else
-cprocstart %1
-%endif
-%endmacro
-
-; Macro to start a C callable near function.
-
-%imacro cprocnear 1
-%push cproc
- cglobalfunc %1
-%1:
-%define ret retn
-%ifdef flatmodel
-%stacksize flat
-%else
-%stacksize small
-%endif
-%assign %$localsize 0
-%endmacro
-
-; Macro to start a C callable far function.
-
-%imacro cprocfar 1
-%push cproc
- cglobalfunc %1
-%1:
-%define ret retf
-%ifdef flatmodel
-%stacksize flat
-%else
-%stacksize large
-%endif
-%assign %$localsize 0
-%endmacro
-
-; Macro to end a C function
-
-%imacro cprocend 0
-%pop
-%endmacro
-
-; Macros for entering and exiting C callable functions. Note that we must
-; always save and restore the SI and DI registers for C functions, and for
-; 32 bit C functions we also need to save and restore EBX and clear the
-; direction flag.
-
-%imacro enter_c 0
- push _bp
- mov _bp,_sp
-%ifnidn %$localsize,0
- sub _sp,%$localsize
-%endif
-%ifdef flatmodel
- push ebx
-%endif
- push _si
- push _di
-%endmacro
-
-%imacro leave_c 0
- pop _di
- pop _si
-%ifdef flatmodel
- pop ebx
- cld
-%endif
-%ifnidn %$localsize,0
- mov _sp,_bp
-%endif
- pop _bp
-%endmacro
-
-%imacro use_ebx 0
-%ifdef flatmodel
- push ebx
-%endif
-%endmacro
-
-%imacro unuse_ebx 0
-%ifdef flatmodel
- pop ebx
-%endif
-%endmacro
-
-; Macros for saving and restoring the value of DS,ES,FS,GS when it is to
-; be used in assembly routines. This evaluates to nothing in the flat memory
-; model, but is saves and restores DS in the large memory model.
-
-%imacro use_ds 0
-%ifndef flatmodel
- push ds
-%endif
-%endmacro
-
-%imacro unuse_ds 0
-%ifndef flatmodel
- pop ds
-%endif
-%endmacro
-
-%imacro use_es 0
-%ifndef flatmodel
- push es
-%endif
-%endmacro
-
-%imacro unuse_es 0
-%ifndef flatmodel
- pop es
-%endif
-%endmacro
-
-; Macros for loading the address of a data pointer into a segment and
-; index register pair. The %imacro explicitly loads DS or ES in the 16 bit
-; memory model, or it simply loads the offset into the register in the flat
-; memory model since DS and ES always point to all addressable memory. You
-; must use the correct _REG (ie: _BX) %imacros for documentation purposes.
-
-%imacro _lds 2
-%ifdef flatmodel
- mov %1,%2
-%else
- lds %1,%2
-%endif
-%endmacro
-
-%imacro _les 2
-%ifdef flatmodel
- mov %1,%2
-%else
- les %1,%2
-%endif
-%endmacro
-
-; Macros for adding and subtracting a value from registers. Two value are
-; provided, one for 16 bit modes and another for 32 bit modes (the extended
-; register is used in 32 bit modes).
-
-%imacro _add 3
-%ifdef flatmodel
- add e%1, %3
-%else
- add %1, %2
-%endif
-%endmacro
-
-%imacro _sub 3
-%ifdef flatmodel
- sub e%1, %3
-%else
- sub %1, %2
-%endif
-%endmacro
-
-; Macro to clear the high order word for the 32 bit extended registers.
-; This is used to convert an unsigned 16 bit value to an unsigned 32 bit
-; value, and will evaluate to nothing in 16 bit modes.
-
-%imacro clrhi 1
-%ifdef flatmodel
- movzx e%1,%1
-%endif
-%endmacro
-
-%imacro sgnhi 1
-%ifdef flatmodel
- movsx e%1,%1
-%endif
-%endmacro
-
-; Macro to load an extended register with an integer value in either mode
-
-%imacro loadint 2
-%ifdef flatmodel
- mov e%1,%2
-%else
- xor e%1,e%1
- mov %1,%2
-%endif
-%endmacro
-
-; Macros to load and store integer values with string instructions
-
-%imacro LODSINT 0
-%ifdef flatmodel
- lodsd
-%else
- lodsw
-%endif
-%endmacro
-
-%imacro STOSINT 0
-%ifdef flatmodel
- stosd
-%else
- stosw
-%endif
-%endmacro
-
-; Macros to provide resb, resw, resd compatibility with NASM
-
-%imacro dclb 1
-times %1 db 0
-%endmacro
-
-%imacro dclw 1
-times %1 dw 0
-%endmacro
-
-%imacro dcld 1
-times %1 dd 0
-%endmacro
-
-; Macro to get the addres of the GOT for Linux/FreeBSD shared
-; libraries into the EBX register.
-
-%imacro get_GOT 1
- call %%getgot
-%%getgot: pop %1
- add %1,_GLOBAL_OFFSET_TABLE_+$$-%%getgot wrt ..gotpc
-%endmacro
-
-; Macro to get the address of a *local* variable that is global to
-; a single module in a manner that will work correctly when compiled
-; into a Linux shared library. Note that this will *not* work for
-; variables that are defined as global to all modules. For that
-; use the LEA_G macro
-
-%macro LEA_L 2
-%ifdef __PIC__
- get_GOT %1
- lea %1,[%1+%2 wrt ..gotoff]
-%else
- lea %1,[%2]
-%endif
-%endmacro
-
-; Same macro as above but for global variables public to *all*
-; modules.
-
-%macro LEA_G 2
-%ifdef __PIC__
- get_GOT %1
- mov %1,[%1+%2 wrt ..got]
-%else
- lea %1,[%2]
-%endif
-%endmacro
-
-; macros to declare assembler function stubs for function structures
-
-%imacro BEGIN_STUBS_DEF 2
-begdataseg _STUBS
-%ifdef __NOU_VAR__
-extern %1
-%define STUBS_START %1
-%else
-extern _%1
-%define STUBS_START _%1
-%endif
-enddataseg _STUBS
-begcodeseg _STUBS
-%assign off %2
-%endmacro
-
-%imacro DECLARE_STUB 1
-%ifdef __PIC__
- global %1:function
-%1:
- get_GOT eax
- mov eax,[eax+STUBS_START wrt ..got]
- jmp [eax+off]
-%else
-%ifdef __NOU__
- global %1
-%1:
-%else
- global _%1
-_%1:
-%endif
- jmp [DWORD STUBS_START+off]
-%endif
-%assign off off+4
-%endmacro
-
-%imacro SKIP_STUB 1
-%assign off off+4
-%endmacro
-
-%imacro DECLARE_STDCALL 2
-%ifdef STDCALL_MANGLE
- global _%1@%2
-_%1@%2:
-%else
-%ifdef STDCALL_USCORE
- global _%1
-_%1:
-%else
- global %1
-%1:
-%endif
-%endif
- jmp [DWORD STUBS_START+off]
-%assign off off+4
-%endmacro
-
-%imacro END_STUBS_DEF 0
-endcodeseg _STUBS
-%endmacro
-
-; macros to declare assembler import stubs for binary loadable drivers
-
-%imacro BEGIN_IMPORTS_DEF 1
-BEGIN_STUBS_DEF %1,4
-%endmacro
-
-%imacro DECLARE_IMP 2
-DECLARE_STUB %1
-%endmacro
-
-%imacro SKIP_IMP 2
-SKIP_STUB %1
-%endmacro
-
-%imacro SKIP_IMP2 1
-DECLARE_STUB %1
-%endmacro
-
-%imacro SKIP_IMP3 1
-SKIP_STUB %1
-%endmacro
-
-%imacro END_IMPORTS_DEF 0
-END_STUBS_DEF
-%endmacro
-
-else ; __NASM_MAJOR__
-
-;============================================================================
-; Macro package when compiling with TASM.
-;============================================================================
-
-; Turn off underscores for globals if disabled for all externals
-
-ifdef __NOU__
-__NOU_VAR__ = 1
-endif
-
-; Define the __WINDOWS__ symbol if we are compiling for any Windows
-; environment
-
-ifdef __WINDOWS16__
-__WINDOWS__ = 1
-endif
-ifdef __WINDOWS32__
-__WINDOWS__ = 1
-__WINDOWS32_386__ = 1
-endif
-ifdef __WIN386__
-__WINDOWS__ = 1
-__WINDOWS32_386__ = 1
-endif
-ifdef __VXD__
-__WINDOWS__ = 1
-__WINDOWS32_386__ = 1
- MASM
- .386
- NO_SEGMENTS = 1
- include vmm.inc ; IGNORE DEPEND
- include vsegment.inc ; IGNORE DEPEND
- IDEAL
-endif
-
-; Macros for accessing 'generic' registers
-
-ifdef __FLAT__
- _ax EQU eax ; EAX is used for accumulator
- _bx EQU ebx ; EBX is used for accumulator
- _cx EQU ecx ; ECX is used for looping
- _dx EQU edx ; EDX is used for data register
- _si EQU esi ; ESI is the source index register
- _di EQU edi ; EDI is the destination index register
- _bp EQU ebp ; EBP is used for base pointer register
- _sp EQU esp ; ESP is used for stack pointer register
- _es EQU ; ES and DS are the same in 32 bit PM
- typedef UCHAR BYTE ; Size of a character
- typedef USHORT WORD ; Size of a short
- typedef UINT DWORD ; Size of an integer
- typedef ULONG DWORD ; Size of a long
- typedef BOOL DWORD ; Size of a boolean
- typedef DPTR DWORD ; Size of a data pointer
- typedef FDPTR FWORD ; Size of a far data pointer
- typedef NDPTR DWORD ; Size of a near data pointer
- typedef CPTR DWORD ; Size of a code pointer
- typedef FCPTR FWORD ; Size of a far code pointer
- typedef NCPTR DWORD ; Size of a near code pointer
- typedef DUINT DWORD ; Declare a integer variable
- FPTR EQU NEAR ; Distance for function pointers
- intsize = 4 ; Size of an integer
- flatmodel = 1 ; This is a flat memory model
- P386 ; Turn on 386 code generation
- MODEL FLAT ; Set up for 32 bit simplified FLAT model
-else
- _ax EQU ax ; AX is used for accumulator
- _bx EQU bx ; BX is used for accumulator
- _cx EQU cx ; CX is used for looping
- _dx EQU dx ; DX is used for data register
- _si EQU si ; SI is the source index register
- _di EQU di ; DI is the destination index register
- _bp EQU bp ; BP is used for base pointer register
- _sp EQU sp ; SP is used for stack pointer register
- _es EQU es: ; ES is used for segment override
- typedef UCHAR BYTE ; Size of a character
- typedef USHORT WORD ; Size of a short
- typedef UINT WORD ; Size of an integer
- typedef ULONG DWORD ; Size of a long
- typedef BOOL WORD ; Size of a boolean
- typedef DPTR DWORD ; Size of a data pointer
- typedef FDPTR DWORD ; Size of a far data pointer
- typedef NDPTR WORD ; Size of a near data pointer
- typedef CPTR DWORD ; Size of a code pointer
- typedef FCPTR DWORD ; Size of a far code pointer
- typedef NCPTR WORD ; Size of a near code pointer
- typedef DUINT WORD ; Declare a integer variable
- FPTR EQU FAR ; Distance for function pointers
- intsize = 2 ; Size of an integer
- P386 ; Turn on 386 code generation
-endif
- invert EQU not
-
-; Provide a typedef for real floating point numbers
-
-ifdef DOUBLE
-typedef REAL QWORD
-typedef DREAL QWORD
-else
-typedef REAL DWORD
-typedef DREAL DWORD
-endif
-
-; Macros to access the floating point stack registers to convert them
-; from NASM style to TASM style
-
-st0 EQU st(0)
-st1 EQU st(1)
-st2 EQU st(2)
-st3 EQU st(3)
-st4 EQU st(4)
-st5 EQU st(5)
-st6 EQU st(6)
-st7 EQU st(7)
-st8 EQU st(8)
-
-; Boolean truth values (same as those in debug.h)
-
-ifndef __VXD__
-False = 0
-True = 1
-No = 0
-Yes = 1
-Yes = 1
-endif
-
-; Macros for the _DATA data segment. This segment contains initialised data.
-
-MACRO begdataseg name
-ifdef __VXD__
- MASM
-VXD_LOCKED_DATA_SEG
- IDEAL
-else
-ifdef flatmodel
- DATASEG
-else
-SEGMENT _DATA DWORD PUBLIC USE16 'DATA'
-endif
-endif
-ENDM
-
-MACRO enddataseg name
-ifdef __VXD__
- MASM
-VXD_LOCKED_DATA_ENDS
- IDEAL
-else
-ifndef flatmodel
-ENDS _DATA
-endif
-endif
-ENDM
-
-; Macro for the main code segment.
-
-MACRO begcodeseg name
-ifdef __VXD__
- MASM
-VXD_LOCKED_CODE_SEG
- IDEAL
-else
-ifdef flatmodel
- CODESEG
- ASSUME CS:FLAT,DS:FLAT,SS:FLAT
-else
-SEGMENT &name&_TEXT PARA PUBLIC USE16 'CODE'
- ASSUME CS:&name&_TEXT,DS:_DATA
-endif
-endif
-ENDM
-
-; Macro for a near code segment
-
-MACRO begcodeseg_near
-ifdef flatmodel
- CODESEG
- ASSUME CS:FLAT,DS:FLAT,SS:FLAT
-else
-SEGMENT _TEXT PARA PUBLIC USE16 'CODE'
- ASSUME CS:_TEXT,DS:_DATA
-endif
-ENDM
-
-MACRO endcodeseg name
-ifdef __VXD__
- MASM
-VXD_LOCKED_CODE_ENDS
- IDEAL
-else
-ifndef flatmodel
-ENDS &name&_TEXT
-endif
-endif
-ENDM
-
-MACRO endcodeseg_near
-ifndef flatmodel
-ENDS _TEXT
-endif
-ENDM
-
-; Macro to be invoked at the start of all modules to set up segments for
-; later use.
-
-MACRO header name
-begdataseg name
-enddataseg name
-ENDM
-
-; Macro for an extern C symbol. If the C compiler requires leading
-; underscores, then the underscores are added to the symbol names, otherwise
-; they are left off. The symbol name is referenced in the assembler code
-; using the non-underscored symbol name.
-
-MACRO cextern name,size
-ifdef __NOU_VAR__
- EXTRN name:size
-else
- EXTRN _&name&:size
-name EQU _&name&
-endif
-ENDM
-
-MACRO cexternfunc name,size
-ifdef __NOU__
- EXTRN name:size
-else
- EXTRN _&name&:size
-name EQU _&name&
-endif
-ENDM
-
-MACRO stdexternfunc name,num_args,size
-ifdef STDCALL_MANGLE
- EXTRN _&name&@&num_args&:size
-name EQU _&name&@&num_args
-else
- EXTRN name:size
-endif
-ENDM
-
-; Macro for a public C symbol. If the C compiler requires leading
-; underscores, then the underscores are added to the symbol names, otherwise
-; they are left off. The symbol name is referenced in the assembler code
-; using the non-underscored symbol name.
-
-MACRO cpublic name
-ifdef __NOU_VAR__
-name:
- PUBLIC name
-else
-_&name&:
- PUBLIC _&name&
-name EQU _&name&
-endif
-ENDM
-
-; Macro for an global C symbol. If the C compiler requires leading
-; underscores, then the underscores are added to the symbol names, otherwise
-; they are left off. The symbol name is referenced in the assembler code
-; using the non-underscored symbol name.
-
-MACRO cglobal name
-ifdef __NOU_VAR__
- PUBLIC name
-else
- PUBLIC _&name&
-name EQU _&name&
-endif
-ENDM
-
-; Macro for an global C function symbol. If the C compiler requires leading
-; underscores, then the underscores are added to the symbol names, otherwise
-; they are left off. The symbol name is referenced in the assembler code
-; using the non-underscored symbol name.
-
-MACRO cglobalfunc name
-ifdef __NOU__
- PUBLIC name
-else
- PUBLIC _&name&
-name EQU _&name&
-endif
-ENDM
-
-; Macro to start a C callable function. This will be a far function for
-; 16-bit code, and a near function for 32-bit code.
-
-MACRO cprocstatic name ; Set up model independant private proc
-ifdef flatmodel
-PROC name NEAR
-else
-PROC name FAR
-endif
-LocalSize = 0
-ENDM
-
-MACRO cprocstart name ; Set up model independant proc
-ifdef flatmodel
-ifdef __NOU__
-PROC name NEAR
-else
-PROC _&name& NEAR
-endif
-else
-ifdef __NOU__
-PROC name FAR
-else
-PROC _&name& FAR
-endif
-endif
-LocalSize = 0
- cglobalfunc name
-ENDM
-
-MACRO cprocnear name ; Set up near proc
-ifdef __NOU__
-PROC name NEAR
-else
-PROC _&name& NEAR
-endif
-LocalSize = 0
- cglobalfunc name
-ENDM
-
-MACRO cprocfar name ; Set up far proc
-ifdef __NOU__
-PROC name FAR
-else
-PROC _&name& FAR
-endif
-LocalSize = 0
- cglobalfunc name
-ENDM
-
-MACRO cprocend ; End procedure macro
-ENDP
-ENDM
-
-; This macro sets up a procedure to be exported from a 16 bit DLL. Since the
-; calling conventions are always _far _pascal for 16 bit DLL's, we actually
-; rename this routine with an extra underscore with 'C' calling conventions
-; and a small DLL stub will be provided by the high level code to call the
-; assembler routine.
-
-MACRO cprocstartdll16 name
-ifdef __WINDOWS16__
-cprocstart _&name&
-else
-cprocstart name
-endif
-ENDM
-
-; Macros for entering and exiting C callable functions. Note that we must
-; always save and restore the SI and DI registers for C functions, and for
-; 32 bit C functions we also need to save and restore EBX and clear the
-; direction flag.
-
-MACRO save_c_regs
-ifdef flatmodel
- push ebx
-endif
- push _si
- push _di
-ENDM
-
-MACRO enter_c
- push _bp
- mov _bp,_sp
- IFDIFI <LocalSize>,<0>
- sub _sp,LocalSize
- ENDIF
- save_c_regs
-ENDM
-
-MACRO restore_c_regs
- pop _di
- pop _si
-ifdef flatmodel
- pop ebx
-endif
-ENDM
-
-MACRO leave_c
- restore_c_regs
- cld
- IFDIFI <LocalSize>,<0>
- mov _sp,_bp
- ENDIF
- pop _bp
-ENDM
-
-MACRO use_ebx
-ifdef flatmodel
- push ebx
-endif
-ENDM
-
-MACRO unuse_ebx
-ifdef flatmodel
- pop ebx
-endif
-ENDM
-
-; Macros for saving and restoring the value of DS,ES,FS,GS when it is to
-; be used in assembly routines. This evaluates to nothing in the flat memory
-; model, but is saves and restores DS in the large memory model.
-
-MACRO use_ds
-ifndef flatmodel
- push ds
-endif
-ENDM
-
-MACRO unuse_ds
-ifndef flatmodel
- pop ds
-endif
-ENDM
-
-MACRO use_es
-ifndef flatmodel
- push es
-endif
-ENDM
-
-MACRO unuse_es
-ifndef flatmodel
- pop es
-endif
-ENDM
-
-; Macros for loading the address of a data pointer into a segment and
-; index register pair. The macro explicitly loads DS or ES in the 16 bit
-; memory model, or it simply loads the offset into the register in the flat
-; memory model since DS and ES always point to all addressable memory. You
-; must use the correct _REG (ie: _BX) macros for documentation purposes.
-
-MACRO _lds reg, addr
-ifdef flatmodel
- mov reg,addr
-else
- lds reg,addr
-endif
-ENDM
-
-MACRO _les reg, addr
-ifdef flatmodel
- mov reg,addr
-else
- les reg,addr
-endif
-ENDM
-
-; Macros for adding and subtracting a value from registers. Two value are
-; provided, one for 16 bit modes and another for 32 bit modes (the extended
-; register is used in 32 bit modes).
-
-MACRO _add reg, val16, val32
-ifdef flatmodel
- add e&reg&, val32
-else
- add reg, val16
-endif
-ENDM
-
-MACRO _sub reg, val16, val32
-ifdef flatmodel
- sub e&reg&, val32
-else
- sub reg, val16
-endif
-ENDM
-
-; Macro to clear the high order word for the 32 bit extended registers.
-; This is used to convert an unsigned 16 bit value to an unsigned 32 bit
-; value, and will evaluate to nothing in 16 bit modes.
-
-MACRO clrhi reg
-ifdef flatmodel
- movzx e&reg&,reg
-endif
-ENDM
-
-MACRO sgnhi reg
-ifdef flatmodel
- movsx e&reg&,reg
-endif
-ENDM
-
-; Macro to load an extended register with an integer value in either mode
-
-MACRO loadint reg,val
-ifdef flatmodel
- mov e&reg&,val
-else
- xor e&reg&,e&reg&
- mov reg,val
-endif
-ENDM
-
-; Macros to load and store integer values with string instructions
-
-MACRO LODSINT
-ifdef flatmodel
- lodsd
-else
- lodsw
-endif
-ENDM
-
-MACRO STOSINT
-ifdef flatmodel
- stosd
-else
- stosw
-endif
-ENDM
-
-; Macros to provide resb, resw, resd compatibility with NASM
-
-MACRO dclb count
-db count dup (0)
-ENDM
-
-MACRO dclw count
-dw count dup (0)
-ENDM
-
-MACRO dcld count
-dd count dup (0)
-ENDM
-
-; Macros to provide resb, resw, resd compatibility with NASM
-
-MACRO resb count
-db count dup (?)
-ENDM
-
-MACRO resw count
-dw count dup (?)
-ENDM
-
-MACRO resd count
-dd count dup (?)
-ENDM
-
-; Macros to declare assembler stubs for function structures
-
-MACRO BEGIN_STUBS_DEF name, firstOffset
-begdataseg _STUBS
-ifdef __NOU_VAR__
- EXTRN name:DWORD
-STUBS_START = name
-else
- EXTRN _&name&:DWORD
-name EQU _&name&
-STUBS_START = _&name
-endif
-enddataseg _STUBS
-begcodeseg _STUBS
-off = firstOffset
-ENDM
-
-MACRO DECLARE_STUB name
-ifdef __NOU__
-name:
- PUBLIC name
-else
-_&name:
- PUBLIC _&name
-endif
- jmp [DWORD STUBS_START+off]
-off = off + 4
-ENDM
-
-MACRO SKIP_STUB name
-off = off + 4
-ENDM
-
-MACRO DECLARE_STDCALL name,num_args
-ifdef STDCALL_MANGLE
-_&name&@&num_args&:
- PUBLIC _&name&@&num_args&
-else
-name:
- PUBLIC name
-endif
- jmp [DWORD STUBS_START+off]
-off = off + 4
-ENDM
-
-MACRO END_STUBS_DEF
-endcodeseg _STUBS
-ENDM
-
-MACRO BEGIN_IMPORTS_DEF name
-BEGIN_STUBS_DEF name,4
-ENDM
-
-ifndef LOCAL_DECLARE_IMP
-MACRO DECLARE_IMP name, numArgs
-DECLARE_STUB name
-ENDM
-
-MACRO SKIP_IMP name
-SKIP_STUB name
-ENDM
-
-MACRO SKIP_IMP2 name, numArgs
-DECLARE_STUB name
-ENDM
-
-MACRO SKIP_IMP3 name
-SKIP_STUB name
-ENDM
-endif
-
-MACRO END_IMPORTS_DEF
-END_STUBS_DEF
-ENDM
-
-MACRO LEA_L reg,name
- lea reg,[name]
-ENDM
-
-MACRO LEA_G reg,name
- lea reg,[name]
-ENDM
-
-endif
-
diff --git a/board/MAI/bios_emulator/scitech/include/x86emu.h b/board/MAI/bios_emulator/scitech/include/x86emu.h
deleted file mode 100644
index 1d87d4e57f..0000000000
--- a/board/MAI/bios_emulator/scitech/include/x86emu.h
+++ /dev/null
@@ -1,194 +0,0 @@
-/****************************************************************************
-*
-* Realmode X86 Emulator Library
-*
-* Copyright (C) 1996-1999 SciTech Software, Inc.
-* Copyright (C) David Mosberger-Tang
-* Copyright (C) 1999 Egbert Eich
-*
-* ========================================================================
-*
-* Permission to use, copy, modify, distribute, and sell this software and
-* its documentation for any purpose is hereby granted without fee,
-* provided that the above copyright notice appear in all copies and that
-* both that copyright notice and this permission notice appear in
-* supporting documentation, and that the name of the authors not be used
-* in advertising or publicity pertaining to distribution of the software
-* without specific, written prior permission. The authors makes no
-* representations about the suitability of this software for any purpose.
-* It is provided "as is" without express or implied warranty.
-*
-* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
-* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
-* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
-* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
-* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
-* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
-* PERFORMANCE OF THIS SOFTWARE.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-* Developer: Kendall Bennett
-*
-* Description: Header file for public specific functions.
-* Any application linking against us should only
-* include this header
-*
-****************************************************************************/
-
-#ifndef __X86EMU_X86EMU_H
-#define __X86EMU_X86EMU_H
-
-#ifdef SCITECH
-#include "scitech.h"
-#define X86API _ASMAPI
-#define X86APIP _ASMAPIP
-typedef int X86EMU_pioAddr;
-#else
-#include "x86emu/types.h"
-#define X86API
-#define X86APIP *
-#endif
-#include "x86emu/regs.h"
-
-/*---------------------- Macros and type definitions ----------------------*/
-
-#pragma pack(1)
-
-/****************************************************************************
-REMARKS:
-Data structure containing ponters to programmed I/O functions used by the
-emulator. This is used so that the user program can hook all programmed
-I/O for the emulator to handled as necessary by the user program. By
-default the emulator contains simple functions that do not do access the
-hardware in any way. To allow the emualtor access the hardware, you will
-need to override the programmed I/O functions using the X86EMU_setupPioFuncs
-function.
-
-HEADER:
-x86emu.h
-
-MEMBERS:
-inb - Function to read a byte from an I/O port
-inw - Function to read a word from an I/O port
-inl - Function to read a dword from an I/O port
-outb - Function to write a byte to an I/O port
-outw - Function to write a word to an I/O port
-outl - Function to write a dword to an I/O port
-****************************************************************************/
-typedef struct {
- u8 (X86APIP inb)(X86EMU_pioAddr addr);
- u16 (X86APIP inw)(X86EMU_pioAddr addr);
- u32 (X86APIP inl)(X86EMU_pioAddr addr);
- void (X86APIP outb)(X86EMU_pioAddr addr, u8 val);
- void (X86APIP outw)(X86EMU_pioAddr addr, u16 val);
- void (X86APIP outl)(X86EMU_pioAddr addr, u32 val);
- } X86EMU_pioFuncs;
-
-/****************************************************************************
-REMARKS:
-Data structure containing ponters to memory access functions used by the
-emulator. This is used so that the user program can hook all memory
-access functions as necessary for the emulator. By default the emulator
-contains simple functions that only access the internal memory of the
-emulator. If you need specialised functions to handle access to different
-types of memory (ie: hardware framebuffer accesses and BIOS memory access
-etc), you will need to override this using the X86EMU_setupMemFuncs
-function.
-
-HEADER:
-x86emu.h
-
-MEMBERS:
-rdb - Function to read a byte from an address
-rdw - Function to read a word from an address
-rdl - Function to read a dword from an address
-wrb - Function to write a byte to an address
-wrw - Function to write a word to an address
-wrl - Function to write a dword to an address
-****************************************************************************/
-typedef struct {
- u8 (X86APIP rdb)(u32 addr);
- u16 (X86APIP rdw)(u32 addr);
- u32 (X86APIP rdl)(u32 addr);
- void (X86APIP wrb)(u32 addr, u8 val);
- void (X86APIP wrw)(u32 addr, u16 val);
- void (X86APIP wrl)(u32 addr, u32 val);
- } X86EMU_memFuncs;
-
-/****************************************************************************
- Here are the default memory read and write
- function in case they are needed as fallbacks.
-***************************************************************************/
-extern u8 X86API rdb(u32 addr);
-extern u16 X86API rdw(u32 addr);
-extern u32 X86API rdl(u32 addr);
-extern void X86API wrb(u32 addr, u8 val);
-extern void X86API wrw(u32 addr, u16 val);
-extern void X86API wrl(u32 addr, u32 val);
-
-#pragma pack()
-
-/*--------------------- type definitions -----------------------------------*/
-
-typedef void (X86APIP X86EMU_intrFuncs)(int num);
-extern X86EMU_intrFuncs _X86EMU_intrTab[256];
-
-/*-------------------------- Function Prototypes --------------------------*/
-
-#ifdef __cplusplus
-extern "C" { /* Use "C" linkage when in C++ mode */
-#endif
-
-void X86EMU_setupMemFuncs(X86EMU_memFuncs *funcs);
-void X86EMU_setupPioFuncs(X86EMU_pioFuncs *funcs);
-void X86EMU_setupIntrFuncs(X86EMU_intrFuncs funcs[]);
-void X86EMU_prepareForInt(int num);
-
-/* decode.c */
-
-void X86EMU_exec(void);
-void X86EMU_halt_sys(void);
-
-#ifdef DEBUG
-#define HALT_SYS() \
- printk("halt_sys: file %s, line %d\n", __FILE__, __LINE__), \
- X86EMU_halt_sys()
-#else
-#define HALT_SYS() X86EMU_halt_sys()
-#endif
-
-/* Debug options */
-
-#define DEBUG_DECODE_F 0x0001 /* print decoded instruction */
-#define DEBUG_TRACE_F 0x0002 /* dump regs before/after execution */
-#define DEBUG_STEP_F 0x0004
-#define DEBUG_DISASSEMBLE_F 0x0008
-#define DEBUG_BREAK_F 0x0010
-#define DEBUG_SVC_F 0x0020
-#define DEBUG_SAVE_CS_IP 0x0040
-#define DEBUG_FS_F 0x0080
-#define DEBUG_PROC_F 0x0100
-#define DEBUG_SYSINT_F 0x0200 /* bios system interrupts. */
-#define DEBUG_TRACECALL_F 0x0400
-#define DEBUG_INSTRUMENT_F 0x0800
-#define DEBUG_MEM_TRACE_F 0x1000
-#define DEBUG_IO_TRACE_F 0x2000
-#define DEBUG_TRACECALL_REGS_F 0x4000
-#define DEBUG_DECODE_NOPRINT_F 0x8000
-#define DEBUG_EXIT 0x10000
-#define DEBUG_SYS_F (DEBUG_SVC_F|DEBUG_FS_F|DEBUG_PROC_F)
-
-void X86EMU_trace_regs(void);
-void X86EMU_trace_xregs(void);
-void X86EMU_dump_memory(u16 seg, u16 off, u32 amt);
-int X86EMU_trace_on(void);
-int X86EMU_trace_off(void);
-
-#ifdef __cplusplus
-} /* End of "C" linkage for C++ */
-#endif
-
-#endif /* __X86EMU_X86EMU_H */
diff --git a/board/MAI/bios_emulator/scitech/include/x86emu/fpu_regs.h b/board/MAI/bios_emulator/scitech/include/x86emu/fpu_regs.h
deleted file mode 100644
index 777b03cd71..0000000000
--- a/board/MAI/bios_emulator/scitech/include/x86emu/fpu_regs.h
+++ /dev/null
@@ -1,115 +0,0 @@
-/****************************************************************************
-*
-* Realmode X86 Emulator Library
-*
-* Copyright (C) 1996-1999 SciTech Software, Inc.
-* Copyright (C) David Mosberger-Tang
-* Copyright (C) 1999 Egbert Eich
-*
-* ========================================================================
-*
-* Permission to use, copy, modify, distribute, and sell this software and
-* its documentation for any purpose is hereby granted without fee,
-* provided that the above copyright notice appear in all copies and that
-* both that copyright notice and this permission notice appear in
-* supporting documentation, and that the name of the authors not be used
-* in advertising or publicity pertaining to distribution of the software
-* without specific, written prior permission. The authors makes no
-* representations about the suitability of this software for any purpose.
-* It is provided "as is" without express or implied warranty.
-*
-* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
-* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
-* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
-* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
-* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
-* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
-* PERFORMANCE OF THIS SOFTWARE.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-* Developer: Kendall Bennett
-*
-* Description: Header file for FPU register definitions.
-*
-****************************************************************************/
-
-#ifndef __X86EMU_FPU_REGS_H
-#define __X86EMU_FPU_REGS_H
-
-#ifdef X86_FPU_SUPPORT
-
-#pragma pack(1)
-
-/* Basic 8087 register can hold any of the following values: */
-
-union x86_fpu_reg_u {
- s8 tenbytes[10];
- double dval;
- float fval;
- s16 sval;
- s32 lval;
- };
-
-struct x86_fpu_reg {
- union x86_fpu_reg_u reg;
- char tag;
- };
-
-/*
- * Since we are not going to worry about the problems of aliasing
- * registers, every time a register is modified, its result type is
- * set in the tag fields for that register. If some operation
- * attempts to access the type in a way inconsistent with its current
- * storage format, then we flag the operation. If common, we'll
- * attempt the conversion.
- */
-
-#define X86_FPU_VALID 0x80
-#define X86_FPU_REGTYP(r) ((r) & 0x7F)
-
-#define X86_FPU_WORD 0x0
-#define X86_FPU_SHORT 0x1
-#define X86_FPU_LONG 0x2
-#define X86_FPU_FLOAT 0x3
-#define X86_FPU_DOUBLE 0x4
-#define X86_FPU_LDBL 0x5
-#define X86_FPU_BSD 0x6
-
-#define X86_FPU_STKTOP 0
-
-struct x86_fpu_registers {
- struct x86_fpu_reg x86_fpu_stack[8];
- int x86_fpu_flags;
- int x86_fpu_config; /* rounding modes, etc. */
- short x86_fpu_tos, x86_fpu_bos;
- };
-
-#pragma pack()
-
-/*
- * There are two versions of the following macro.
- *
- * One version is for opcode D9, for which there are more than 32
- * instructions encoded in the second byte of the opcode.
- *
- * The other version, deals with all the other 7 i87 opcodes, for
- * which there are only 32 strings needed to describe the
- * instructions.
- */
-
-#endif /* X86_FPU_SUPPORT */
-
-#ifdef DEBUG
-# define DECODE_PRINTINSTR32(t,mod,rh,rl) \
- DECODE_PRINTF(t[(mod<<3)+(rh)]);
-# define DECODE_PRINTINSTR256(t,mod,rh,rl) \
- DECODE_PRINTF(t[(mod<<6)+(rh<<3)+(rl)]);
-#else
-# define DECODE_PRINTINSTR32(t,mod,rh,rl)
-# define DECODE_PRINTINSTR256(t,mod,rh,rl)
-#endif
-
-#endif /* __X86EMU_FPU_REGS_H */
diff --git a/board/MAI/bios_emulator/scitech/include/x86emu/regs.h b/board/MAI/bios_emulator/scitech/include/x86emu/regs.h
deleted file mode 100644
index a12017b00f..0000000000
--- a/board/MAI/bios_emulator/scitech/include/x86emu/regs.h
+++ /dev/null
@@ -1,331 +0,0 @@
-/****************************************************************************
-*
-* Realmode X86 Emulator Library
-*
-* Copyright (C) 1996-1999 SciTech Software, Inc.
-* Copyright (C) David Mosberger-Tang
-* Copyright (C) 1999 Egbert Eich
-*
-* ========================================================================
-*
-* Permission to use, copy, modify, distribute, and sell this software and
-* its documentation for any purpose is hereby granted without fee,
-* provided that the above copyright notice appear in all copies and that
-* both that copyright notice and this permission notice appear in
-* supporting documentation, and that the name of the authors not be used
-* in advertising or publicity pertaining to distribution of the software
-* without specific, written prior permission. The authors makes no
-* representations about the suitability of this software for any purpose.
-* It is provided "as is" without express or implied warranty.
-*
-* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
-* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
-* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
-* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
-* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
-* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
-* PERFORMANCE OF THIS SOFTWARE.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-* Developer: Kendall Bennett
-*
-* Description: Header file for x86 register definitions.
-*
-****************************************************************************/
-
-#ifndef __X86EMU_REGS_H
-#define __X86EMU_REGS_H
-
-/*---------------------- Macros and type definitions ----------------------*/
-
-#pragma pack(1)
-
-/*
- * General EAX, EBX, ECX, EDX type registers. Note that for
- * portability, and speed, the issue of byte swapping is not addressed
- * in the registers. All registers are stored in the default format
- * available on the host machine. The only critical issue is that the
- * registers should line up EXACTLY in the same manner as they do in
- * the 386. That is:
- *
- * EAX & 0xff === AL
- * EAX & 0xffff == AX
- *
- * etc. The result is that alot of the calculations can then be
- * done using the native instruction set fully.
- */
-
-#ifdef __BIG_ENDIAN__
-
-typedef struct {
- u32 e_reg;
- } I32_reg_t;
-
-typedef struct {
- u16 filler0, x_reg;
- } I16_reg_t;
-
-typedef struct {
- u8 filler0, filler1, h_reg, l_reg;
- } I8_reg_t;
-
-#else /* !__BIG_ENDIAN__ */
-
-typedef struct {
- u32 e_reg;
- } I32_reg_t;
-
-typedef struct {
- u16 x_reg;
- } I16_reg_t;
-
-typedef struct {
- u8 l_reg, h_reg;
- } I8_reg_t;
-
-#endif /* BIG_ENDIAN */
-
-typedef union {
- I32_reg_t I32_reg;
- I16_reg_t I16_reg;
- I8_reg_t I8_reg;
- } i386_general_register;
-
-struct i386_general_regs {
- i386_general_register A, B, C, D;
- };
-
-typedef struct i386_general_regs Gen_reg_t;
-
-struct i386_special_regs {
- i386_general_register SP, BP, SI, DI, IP;
- u32 FLAGS;
- };
-
-/*
- * Segment registers here represent the 16 bit quantities
- * CS, DS, ES, SS.
- */
-
-struct i386_segment_regs {
- u16 CS, DS, SS, ES, FS, GS;
- };
-
-/* 8 bit registers */
-#define R_AH gen.A.I8_reg.h_reg
-#define R_AL gen.A.I8_reg.l_reg
-#define R_BH gen.B.I8_reg.h_reg
-#define R_BL gen.B.I8_reg.l_reg
-#define R_CH gen.C.I8_reg.h_reg
-#define R_CL gen.C.I8_reg.l_reg
-#define R_DH gen.D.I8_reg.h_reg
-#define R_DL gen.D.I8_reg.l_reg
-
-/* 16 bit registers */
-#define R_AX gen.A.I16_reg.x_reg
-#define R_BX gen.B.I16_reg.x_reg
-#define R_CX gen.C.I16_reg.x_reg
-#define R_DX gen.D.I16_reg.x_reg
-
-/* 32 bit extended registers */
-#define R_EAX gen.A.I32_reg.e_reg
-#define R_EBX gen.B.I32_reg.e_reg
-#define R_ECX gen.C.I32_reg.e_reg
-#define R_EDX gen.D.I32_reg.e_reg
-
-/* special registers */
-#define R_SP spc.SP.I16_reg.x_reg
-#define R_BP spc.BP.I16_reg.x_reg
-#define R_SI spc.SI.I16_reg.x_reg
-#define R_DI spc.DI.I16_reg.x_reg
-#define R_IP spc.IP.I16_reg.x_reg
-#define R_FLG spc.FLAGS
-
-/* special registers */
-#define R_SP spc.SP.I16_reg.x_reg
-#define R_BP spc.BP.I16_reg.x_reg
-#define R_SI spc.SI.I16_reg.x_reg
-#define R_DI spc.DI.I16_reg.x_reg
-#define R_IP spc.IP.I16_reg.x_reg
-#define R_FLG spc.FLAGS
-
-/* special registers */
-#define R_ESP spc.SP.I32_reg.e_reg
-#define R_EBP spc.BP.I32_reg.e_reg
-#define R_ESI spc.SI.I32_reg.e_reg
-#define R_EDI spc.DI.I32_reg.e_reg
-#define R_EIP spc.IP.I32_reg.e_reg
-#define R_EFLG spc.FLAGS
-
-/* segment registers */
-#define R_CS seg.CS
-#define R_DS seg.DS
-#define R_SS seg.SS
-#define R_ES seg.ES
-#define R_FS seg.FS
-#define R_GS seg.GS
-
-/* flag conditions */
-#define FB_CF 0x0001 /* CARRY flag */
-#define FB_PF 0x0004 /* PARITY flag */
-#define FB_AF 0x0010 /* AUX flag */
-#define FB_ZF 0x0040 /* ZERO flag */
-#define FB_SF 0x0080 /* SIGN flag */
-#define FB_TF 0x0100 /* TRAP flag */
-#define FB_IF 0x0200 /* INTERRUPT ENABLE flag */
-#define FB_DF 0x0400 /* DIR flag */
-#define FB_OF 0x0800 /* OVERFLOW flag */
-
-/* 80286 and above always have bit#1 set */
-#define F_ALWAYS_ON (0x0002) /* flag bits always on */
-
-/*
- * Define a mask for only those flag bits we will ever pass back
- * (via PUSHF)
- */
-#define F_MSK (FB_CF|FB_PF|FB_AF|FB_ZF|FB_SF|FB_TF|FB_IF|FB_DF|FB_OF)
-
-/* following bits masked in to a 16bit quantity */
-
-#define F_CF 0x0001 /* CARRY flag */
-#define F_PF 0x0004 /* PARITY flag */
-#define F_AF 0x0010 /* AUX flag */
-#define F_ZF 0x0040 /* ZERO flag */
-#define F_SF 0x0080 /* SIGN flag */
-#define F_TF 0x0100 /* TRAP flag */
-#define F_IF 0x0200 /* INTERRUPT ENABLE flag */
-#define F_DF 0x0400 /* DIR flag */
-#define F_OF 0x0800 /* OVERFLOW flag */
-
-#define TOGGLE_FLAG(flag) (M.x86.R_FLG ^= (flag))
-#define SET_FLAG(flag) (M.x86.R_FLG |= (flag))
-#define CLEAR_FLAG(flag) (M.x86.R_FLG &= ~(flag))
-#define ACCESS_FLAG(flag) (M.x86.R_FLG & (flag))
-#define CLEARALL_FLAG(m) (M.x86.R_FLG = 0)
-
-#define CONDITIONAL_SET_FLAG(COND,FLAG) \
- if (COND) SET_FLAG(FLAG); else CLEAR_FLAG(FLAG)
-
-#define F_PF_CALC 0x010000 /* PARITY flag has been calced */
-#define F_ZF_CALC 0x020000 /* ZERO flag has been calced */
-#define F_SF_CALC 0x040000 /* SIGN flag has been calced */
-
-#define F_ALL_CALC 0xff0000 /* All have been calced */
-
-/*
- * Emulator machine state.
- * Segment usage control.
- */
-#define SYSMODE_SEG_DS_SS 0x00000001
-#define SYSMODE_SEGOVR_CS 0x00000002
-#define SYSMODE_SEGOVR_DS 0x00000004
-#define SYSMODE_SEGOVR_ES 0x00000008
-#define SYSMODE_SEGOVR_FS 0x00000010
-#define SYSMODE_SEGOVR_GS 0x00000020
-#define SYSMODE_SEGOVR_SS 0x00000040
-#define SYSMODE_PREFIX_REPE 0x00000080
-#define SYSMODE_PREFIX_REPNE 0x00000100
-#define SYSMODE_PREFIX_DATA 0x00000200
-#define SYSMODE_PREFIX_ADDR 0x00000400
-#define SYSMODE_INTR_PENDING 0x10000000
-#define SYSMODE_EXTRN_INTR 0x20000000
-#define SYSMODE_HALTED 0x40000000
-
-#define SYSMODE_SEGMASK (SYSMODE_SEG_DS_SS | \
- SYSMODE_SEGOVR_CS | \
- SYSMODE_SEGOVR_DS | \
- SYSMODE_SEGOVR_ES | \
- SYSMODE_SEGOVR_FS | \
- SYSMODE_SEGOVR_GS | \
- SYSMODE_SEGOVR_SS)
-#define SYSMODE_CLRMASK (SYSMODE_SEG_DS_SS | \
- SYSMODE_SEGOVR_CS | \
- SYSMODE_SEGOVR_DS | \
- SYSMODE_SEGOVR_ES | \
- SYSMODE_SEGOVR_FS | \
- SYSMODE_SEGOVR_GS | \
- SYSMODE_SEGOVR_SS | \
- SYSMODE_PREFIX_DATA | \
- SYSMODE_PREFIX_ADDR)
-
-#define INTR_SYNCH 0x1
-#define INTR_ASYNCH 0x2
-#define INTR_HALTED 0x4
-
-typedef struct {
- struct i386_general_regs gen;
- struct i386_special_regs spc;
- struct i386_segment_regs seg;
- /*
- * MODE contains information on:
- * REPE prefix 2 bits repe,repne
- * SEGMENT overrides 5 bits normal,DS,SS,CS,ES
- * Delayed flag set 3 bits (zero, signed, parity)
- * reserved 6 bits
- * interrupt # 8 bits instruction raised interrupt
- * BIOS video segregs 4 bits
- * Interrupt Pending 1 bits
- * Extern interrupt 1 bits
- * Halted 1 bits
- */
- long mode;
- u8 intno;
- volatile int intr; /* mask of pending interrupts */
- int debug;
-#ifdef DEBUG
- int check;
- u16 saved_ip;
- u16 saved_cs;
- int enc_pos;
- int enc_str_pos;
- char decode_buf[32]; /* encoded byte stream */
- char decoded_buf[256]; /* disassembled strings */
-#endif
- } X86EMU_regs;
-
-/****************************************************************************
-REMARKS:
-Structure maintaining the emulator machine state.
-
-MEMBERS:
-x86 - X86 registers
-mem_base - Base real mode memory for the emulator
-mem_size - Size of the real mode memory block for the emulator
-****************************************************************************/
-typedef struct {
- X86EMU_regs x86;
- unsigned long mem_base;
- unsigned long mem_size;
- void* private;
- } X86EMU_sysEnv;
-
-#pragma pack()
-
-/*----------------------------- Global Variables --------------------------*/
-
-#ifdef __cplusplus
-extern "C" { /* Use "C" linkage when in C++ mode */
-#endif
-
-/* Global emulator machine state.
- *
- * We keep it global to avoid pointer dereferences in the code for speed.
- */
-
-extern X86EMU_sysEnv _X86EMU_env;
-#define M _X86EMU_env
-
-/*-------------------------- Function Prototypes --------------------------*/
-
-/* Function to log information at runtime */
-
-/*void printk(const char *fmt, ...); */
-
-#ifdef __cplusplus
-} /* End of "C" linkage for C++ */
-#endif
-
-#endif /* __X86EMU_REGS_H */
diff --git a/board/MAI/bios_emulator/scitech/include/x86emu/types.h b/board/MAI/bios_emulator/scitech/include/x86emu/types.h
deleted file mode 100644
index 0a17c547ee..0000000000
--- a/board/MAI/bios_emulator/scitech/include/x86emu/types.h
+++ /dev/null
@@ -1,70 +0,0 @@
-/****************************************************************************
-*
-* Realmode X86 Emulator Library
-*
-* Copyright (C) 1996-1999 SciTech Software, Inc.
-* Copyright (C) David Mosberger-Tang
-* Copyright (C) 1999 Egbert Eich
-*
-* ========================================================================
-*
-* Permission to use, copy, modify, distribute, and sell this software and
-* its documentation for any purpose is hereby granted without fee,
-* provided that the above copyright notice appear in all copies and that
-* both that copyright notice and this permission notice appear in
-* supporting documentation, and that the name of the authors not be used
-* in advertising or publicity pertaining to distribution of the software
-* without specific, written prior permission. The authors makes no
-* representations about the suitability of this software for any purpose.
-* It is provided "as is" without express or implied warranty.
-*
-* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
-* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
-* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
-* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
-* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
-* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
-* PERFORMANCE OF THIS SOFTWARE.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-* Developer: Kendall Bennett
-*
-* Description: Header file for x86 emulator type definitions.
-*
-****************************************************************************/
-
-#ifndef __X86EMU_TYPES_H
-#define __X86EMU_TYPES_H
-
-#include <sys/types.h>
-
-/*---------------------- Macros and type definitions ----------------------*/
-
-/* Currently only for Linux/32bit */
-#if defined(__GNUC__) && !defined(NO_LONG_LONG)
-#define __HAS_LONG_LONG__
-#endif
-
-typedef unsigned char u8;
-typedef unsigned short u16;
-typedef unsigned int u32;
-#ifdef __HAS_LONG_LONG__
-typedef unsigned long long u64;
-#endif
-
-typedef char s8;
-typedef short s16;
-typedef long s32;
-#ifdef __HAS_LONG_LONG__
-typedef long long s64;
-#endif
-
-/*typedef unsigned int uint;*/
-typedef int sint;
-
-typedef u16 X86EMU_pioAddr;
-
-#endif /* __X86EMU_TYPES_H */
diff --git a/board/MAI/bios_emulator/scitech/lib/debug/linux/gcc/glibc.so/readme.txt b/board/MAI/bios_emulator/scitech/lib/debug/linux/gcc/glibc.so/readme.txt
deleted file mode 100644
index 0d87effa99..0000000000
--- a/board/MAI/bios_emulator/scitech/lib/debug/linux/gcc/glibc.so/readme.txt
+++ /dev/null
@@ -1 +0,0 @@
-This file is just to ensure that the directory is created.
diff --git a/board/MAI/bios_emulator/scitech/lib/debug/linux/gcc/glibc/readme.txt b/board/MAI/bios_emulator/scitech/lib/debug/linux/gcc/glibc/readme.txt
deleted file mode 100644
index 0d87effa99..0000000000
--- a/board/MAI/bios_emulator/scitech/lib/debug/linux/gcc/glibc/readme.txt
+++ /dev/null
@@ -1 +0,0 @@
-This file is just to ensure that the directory is created.
diff --git a/board/MAI/bios_emulator/scitech/lib/debug/linux/gcc/libc.so/readme.txt b/board/MAI/bios_emulator/scitech/lib/debug/linux/gcc/libc.so/readme.txt
deleted file mode 100644
index 0d87effa99..0000000000
--- a/board/MAI/bios_emulator/scitech/lib/debug/linux/gcc/libc.so/readme.txt
+++ /dev/null
@@ -1 +0,0 @@
-This file is just to ensure that the directory is created.
diff --git a/board/MAI/bios_emulator/scitech/lib/debug/linux/gcc/libc/readme.txt b/board/MAI/bios_emulator/scitech/lib/debug/linux/gcc/libc/readme.txt
deleted file mode 100644
index 0d87effa99..0000000000
--- a/board/MAI/bios_emulator/scitech/lib/debug/linux/gcc/libc/readme.txt
+++ /dev/null
@@ -1 +0,0 @@
-This file is just to ensure that the directory is created.
diff --git a/board/MAI/bios_emulator/scitech/lib/release/linux/gcc/glibc.so/readme.txt b/board/MAI/bios_emulator/scitech/lib/release/linux/gcc/glibc.so/readme.txt
deleted file mode 100644
index 0d87effa99..0000000000
--- a/board/MAI/bios_emulator/scitech/lib/release/linux/gcc/glibc.so/readme.txt
+++ /dev/null
@@ -1 +0,0 @@
-This file is just to ensure that the directory is created.
diff --git a/board/MAI/bios_emulator/scitech/lib/release/linux/gcc/glibc/readme.txt b/board/MAI/bios_emulator/scitech/lib/release/linux/gcc/glibc/readme.txt
deleted file mode 100644
index 0d87effa99..0000000000
--- a/board/MAI/bios_emulator/scitech/lib/release/linux/gcc/glibc/readme.txt
+++ /dev/null
@@ -1 +0,0 @@
-This file is just to ensure that the directory is created.
diff --git a/board/MAI/bios_emulator/scitech/lib/release/linux/gcc/libc.so/readme.txt b/board/MAI/bios_emulator/scitech/lib/release/linux/gcc/libc.so/readme.txt
deleted file mode 100644
index 0d87effa99..0000000000
--- a/board/MAI/bios_emulator/scitech/lib/release/linux/gcc/libc.so/readme.txt
+++ /dev/null
@@ -1 +0,0 @@
-This file is just to ensure that the directory is created.
diff --git a/board/MAI/bios_emulator/scitech/lib/release/linux/gcc/libc/readme.txt b/board/MAI/bios_emulator/scitech/lib/release/linux/gcc/libc/readme.txt
deleted file mode 100644
index 0d87effa99..0000000000
--- a/board/MAI/bios_emulator/scitech/lib/release/linux/gcc/libc/readme.txt
+++ /dev/null
@@ -1 +0,0 @@
-This file is just to ensure that the directory is created.
diff --git a/board/MAI/bios_emulator/scitech/makedefs/bc16.mk b/board/MAI/bios_emulator/scitech/makedefs/bc16.mk
deleted file mode 100644
index aa4fe76a40..0000000000
--- a/board/MAI/bios_emulator/scitech/makedefs/bc16.mk
+++ /dev/null
@@ -1,137 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Generic DMAKE startup makefile definitions file. Assumes
-# that the SCITECH environment variable has been set to point
-# to where all our stuff is installed. You should not need
-# to change anything in this file.
-#
-# Borland C++ 4.x 16 bit version. Supports 16 bit DOS,
-# DPMI16 DOS extender and 16 bit Windows development.
-#
-#############################################################################
-
-# Include standard startup script definitions
-.IMPORT: SCITECH
-.INCLUDE: "$(SCITECH)\makedefs\startup.mk"
-
-# Import enivornment variables that we use
-.IMPORT .IGNORE : USE_WIN16 USE_BC5 BC_LIBBASE USE_WIN95
-
-# Default commands for compiling, assembling linking and archiving
- CC := bcc
- CFLAGS := -ml -H=bcc.sym -i60 -d -dc -4 -f287
-.IF $(USE_TASM32)
- AS := tasm32
-.ELIF $(USE_TASMX)
- AS := tasmx
-.ELSE
- AS := tasm
-.ENDIF
- ASFLAGS := /t /mx /m /iINCLUDE /iINCLUDE /i$(SCITECH)\INCLUDE
- LD := bclink tlink.exe
- LDFLAGS := -c
- RC := brc
- RCFLAGS :=
-.IF $(USE_BC5)
-.IF $(USE_WIN95)
- WIN_VERSION := -V4.0
-.ENDIF
-.ENDIF
- LIBR := tlib
- LIBFLAGS := /C /P32
- ILIB := implib
- ILIBFLAGS := -c
-
-# Optionally turn on debugging information
-.IF $(DBG)
- CFLAGS += -v
- LDFLAGS += -v
- ASFLAGS += /zi
- LIBFLAGS += /P128
-.ELSE
- LDFLAGS += -x
- ASFLAGS += /q
-.END
-
-# Optionally turn on optimisations
-.IF $(OPT)
- CFLAGS += -O2 -k-
-.ELIF $(OPT_SIZE)
- CFLAGS += -O1 -k-
-.END
-
-# Optionally turn on direct i387 FPU instructions
-
-.IF $(FPU)
- CFLAGS += -DFPU387
- ASFLAGS += -DFPU387
-.END
-
-# Optionally compile a beta release version of a product
-.IF $(BETA)
- CFLAGS += -DBETA
- ASFLAGS += -DBETA
-.END
-
-# Optionally compile as Win16
-.IF $(USE_WIN16)
-.IF $(BUILD_DLL)
- CFLAGS += -WD -Fs- -DBUILD_DLL
- ASFLAGS += -DBUILD_DLL
-.ELSE
- CFLAGS += -W -Fs-
-.ENDIF
- DEF_LIBS := import.lib mathwl.lib cwl.lib
- DX_ASFLAGS += -D__WINDOWS16__
- LIB_OS = WIN16
-.ELSE
- USE_REALDOS := 1
- DEF_LIBS := mathl.lib fp87.lib cl.lib
- LIB_OS = DOS16
-.END
-
-# Place to look for PMODE library files
-
-.IF $(USE_DPMI16)
-PMLIB := dpmi16\pm.lib
-.ELSE
-PMLIB := pm.lib
-.END
-
-# Define the base directory for library files
-
-.IF $(CHECKED)
-LIB_BASE_DIR := $(SCITECH_LIB)\lib\debug
-CFLAGS += -DCHECKED=1
-.ELSE
-LIB_BASE_DIR := $(SCITECH_LIB)\lib\release
-.ENDIF
-
-# Define where to install library files
- LIB_BASE := $(LIB_BASE_DIR)\$(LIB_OS)\$(BC_LIBBASE)
- LIB_DEST := $(LIB_BASE)
-
-# Define which file contains our rules
-
- RULES_MAK := bc16.mk
diff --git a/board/MAI/bios_emulator/scitech/makedefs/bc3.mk b/board/MAI/bios_emulator/scitech/makedefs/bc3.mk
deleted file mode 100644
index 133d80edf7..0000000000
--- a/board/MAI/bios_emulator/scitech/makedefs/bc3.mk
+++ /dev/null
@@ -1,102 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Generic DMAKE startup makefile definitions file. Assumes
-# that the SCITECH environment variable has been set to point
-# to where all our stuff is installed. You should not need
-# to change anything in this file.
-#
-# Borland C++ 3.1 version. Supports 16 bit DOS development.
-#
-#############################################################################
-
-# Include standard startup script definitions
-.IMPORT: SCITECH
-.INCLUDE: "$(SCITECH)\makedefs\startup.mk"
-
-# Default commands for compiling, assembling linking and archiving
- CC := bcc
- CFLAGS := -ml -H=bcc.sym -i60 -d
-.IF $(USE_TASM32)
- AS := tasm32
-.ELIF $(USE_TASMX)
- AS := tasmx
-.ELSE
- AS := tasm
-.ENDIF
- ASFLAGS := /t /mx /m /iINCLUDE /i$(SCITECH)\INCLUDE
- LD := bclink tlink.exe
- LDFLAGS := -c
- LIB := tlib
- LIBFLAGS := /C
-
-# Optionally turn on debugging information
-.IF $(DBG)
- CFLAGS += -v
- LDFLAGS += -v
- ASFLAGS += /zi
- LIBFLAGS += /P128
-.ELSE
- LDFLAGS += -x
- ASFLAGS += /q
-.END
-
-# Optionally turn on optimisations
-.IF $(OPT)
- CFLAGS += -3 -O2
-.ELIF $(OPT_SIZE)
- CFLAGS += -3 -O1
-.END
-
-# Optionally turn on direct i387 FPU instructions
-
-.IF $(FPU)
- CFLAGS += -f287 -DFPU387
- ASFLAGS += -DFPU387
-.END
-
-# Optionally compile a beta release version of a product
-.IF $(BETA)
- CFLAGS += -DBETA
- ASFLAGS += -DBETA
-.END
- USE_REALDOS := 1
-
-# Define the default libraries to link with
- DEF_LIBS := mathl.lib cl.lib
-
-# Define the base directory for library files
-
-.IF $(CHECKED)
-LIB_BASE_DIR := $(SCITECH_LIB)\lib\debug
-CFLAGS += -DCHECKED=1
-.ELSE
-LIB_BASE_DIR := $(SCITECH_LIB)\lib\release
-.ENDIF
-
-# Define where to install library files
- LIB_DEST := $(LIB_BASE_DIR)\dos16\bc3
-
-# Define which file contains our rules
-
- RULES_MAK := bc3.mk
diff --git a/board/MAI/bios_emulator/scitech/makedefs/bc32.mk b/board/MAI/bios_emulator/scitech/makedefs/bc32.mk
deleted file mode 100644
index 246de1dfc5..0000000000
--- a/board/MAI/bios_emulator/scitech/makedefs/bc32.mk
+++ /dev/null
@@ -1,201 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Generic DMAKE startup makefile definitions file. Assumes
-# that the SCITECH environment variable has been set to point
-# to where all our stuff is installed. You should not need
-# to change anything in this file.
-#
-# Borland C++ 4.0 32 bit version. Supports Borland's DOS Power
-# Pack DPMI32 DOS extender, Phar Lap's TNT DOS Extender and
-# 32 bit Windows development.
-#
-#############################################################################
-
-# Include standard startup script definitions
-.IMPORT: SCITECH
-.INCLUDE: "$(SCITECH)\makedefs\startup.mk"
-
-# Import enivornment variables that we use
-.IMPORT .IGNORE : USE_SMX32 USE_TNT USE_WIN32 USE_BC5 USE_VXD BC_LIBBASE
-.IMPORT .IGNORE : VTOOLSD
-
-# We are compiling for a 32 bit envionment
- _32BIT_ := 1
-
-# Default commands for compiling, assembling linking and archiving
- CC := bcc32
-.IF $(USE_VXD)
- CFLAGS := -4 -i60 -d -w-stu
-.ELSE
- CFLAGS := -4 -H=bcc32.sym -i60 -d -w-stu
-.ENDIF
-.IF $(USE_NASM)
- AS := nasm
- ASFLAGS := -t -f obj -d__FLAT__ -iINCLUDE -i$(SCITECH)\INCLUDE
-.ELSE
-.IF $(USE_TASM32)
- AS := tasm32
-.ELIF $(USE_TASMX)
- AS := tasmx
-.ELSE
- AS := tasm
-.ENDIF
- ASFLAGS := /t /mx /m /w-res /w-mcp /D__FLAT__ /iINCLUDE /i$(SCITECH)\INCLUDE
-.ENDIF
- LD := bclink tlink32.exe
- LDFLAGS := -c
- RC := brc32
-.IF $(USE_BC5)
- WIN_VERSION := -V4.0
- RCFLAGS := -32
-.ELSE
- RCFLAGS := -w32
-.ENDIF
- LIB := tlib
- LIBFLAGS := /C
- ILIB := implib
- ILIBFLAGS := -c
- INTEL_X86 := 1
- NMSYM := $(SOFTICE_PATH)\nmsym.exe
- NMSYMFLAGS := /TRANSLATE:source,package,always /PROMPT /SOURCE:$(SCITECH)\src\pm;$(SCITECH)\src\pm\common;$(SCITECH)\src\pm\win32
-
-# Optionally turn on debugging information
-.IF $(DBG)
- CFLAGS += -v
- LDFLAGS += -v
- LIBFLAGS += /P256
-.IF $(USE_NASM)
- ASFLAGS += -F borland -g
-.ELSE
- ASFLAGS += /zi
-.ENDIF
-.ELSE
- LDFLAGS += -x
- LIBFLAGS += /P128
-.IF $(USE_NASM)
- ASFLAGS += -F null
-.ELSE
- ASFLAGS += /q
-.ENDIF
-.END
-
-# Optionally disable nagging warnings if MAX_WARN is not on
-.IF $(MAX_WARN)
-.ELSE
- CFLAGS += -w-aus -w-par -w-hid -w-pia
-.ENDIF
-
-# Optionally turn on optimisations (-5 -O2 breaks BC++ 4.0-4.5 sometimes)
-.IF $(OPT)
- CFLAGS += -5 -O2 -k-
-.ELIF $(OPT_SIZE)
- CFLAGS += -5 -O1 -k-
-.END
-
-# Optionally turn on direct i387 FPU instructions
-.IF $(FPU)
- CFLAGS += -DFPU387
- ASFLAGS += -dFPU387
-.END
-
-# Optionally compile a beta release version of a product
-.IF $(BETA)
- CFLAGS += -DBETA
- ASFLAGS += -dBETA
-.END
-
-# Optionally use Phar Lap's TNT DOS Extender, otherwise use the DOS Power Pack
-.IF $(USE_TNT)
- CFLAGS += -D__MSDOS__
- DX_CFLAGS += -DTNT
- DX_ASFLAGS += -dTNT
- LIB_OS = DOS32
- DEF_LIBS := import32.lib cw32.lib dosx32.lib tntapi.lib
-.ELIF $(USE_VXD)
- LDFLAGS += -n -P- -x
- CFLAGS += -RT- -x- -Oi -VC -I$(VTOOLSD)\INCLUDE -DIS_32 -DWANTVXDWRAPS -DVTOOLSD -DWIN40 -DWIN40_OR_LATER -DDEFSEG=1 -zC_LTEXT -zALCODE -zR_LDATA -zTLCODE
- DEF_LIBS := $(VTOOLSD)\lib\cfbc440d.lib $(VTOOLSD)\lib\wr0bc440.lib $(VTOOLSD)\lib\wr1bc440.lib $(VTOOLSD)\lib\wr2bc440.lib $(VTOOLSD)\lib\wr3bc440.lib $(VTOOLSD)\lib\rtbc440d.lib
- DX_ASFLAGS += -d__VXD__ -d__BORLANDC__=1 -I$(VTOOLSD)\INCLUDE -I$(VTOOLSD)\LIB\INCLUDE
- LIB_OS = VXD
-.ELIF $(USE_WIN32)
-.IF $(WIN32_GUI)
-.ELSE
- CFLAGS += -D__CONSOLE__
-.ENDIF
-.IF $(BUILD_DLL)
- CFLAGS += -WD -DBUILD_DLL
- ASFLAGS += -dBUILD_DLL
-.ELSE
- CFLAGS += -W -WM
-.ENDIF
-.IF $(USE_BC5)
-.ELSE
- CFLAGS += -D_WIN32
-.ENDIF
- DEF_LIBS := import32.lib cw32mt.lib
- DX_ASFLAGS += -d__WINDOWS32__
- LIB_OS = WIN32
-.ELIF $(USE_SMX32)
- CFLAGS += -D__SMX32__ -DPME32
- DX_CFLAGS +=
- DX_ASFLAGS += -d__SMX32__ -dDPMI32 -dPME32
- USE_REALDOS := 1
- LIB_OS = SMX32
- DEF_LIBS := cw32mt.lib
-.ELSE
- USE_DPMI32 := 1
- CFLAGS += -D__MSDOS__
- DX_CFLAGS += -WX -DDPMI32
- DX_ASFLAGS += -dDPMI32
- USE_REALDOS := 1
- LIB_OS = DOS32
- DEF_LIBS :=
-.END
-
-# Define the base directory for library files
-
-.IF $(CHECKED)
-LIB_BASE_DIR := $(SCITECH_LIB)\lib\debug
-CFLAGS += -DCHECKED=1
-.ELSE
-LIB_BASE_DIR := $(SCITECH_LIB)\lib\release
-.ENDIF
-
-# Define where to install library files
- LIB_BASE := $(LIB_BASE_DIR)\$(LIB_OS)\$(BC_LIBBASE)
- LIB_DEST := $(LIB_BASE)
-
-# Place to look for PMODE library files
-
-.IF $(USE_TNT)
-PMLIB := $(LIB_BASE)\tnt\pm.lib
-.ELIF $(USE_DPMI32)
-PMLIB := $(LIB_BASE)\dpmi32\pm.lib
-.ELSE
-PMLIB := $(LIB_BASE)\pm.lib
-.END
-
-# Define which file contains our rules
-
- RULES_MAK := bc32.mk
diff --git a/board/MAI/bios_emulator/scitech/makedefs/bcos2.mk b/board/MAI/bios_emulator/scitech/makedefs/bcos2.mk
deleted file mode 100644
index 23aeb7cde4..0000000000
--- a/board/MAI/bios_emulator/scitech/makedefs/bcos2.mk
+++ /dev/null
@@ -1,137 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Generic DMAKE startup makefile definitions file. Assumes
-# that the SCITECH environment variable has been set to point
-# to where all our stuff is installed. You should not need
-# to change anything in this file.
-#
-# Borland C++ 2.0 32-bit OS/2 version.
-#
-#############################################################################
-
-# Include standard startup script definitions
-.IMPORT: SCITECH
-.INCLUDE: "$(SCITECH)\makedefs\startup.mk"
-
-# Import enivornment variables that we use
-.IMPORT .IGNORE : USE_OS2GUI BC_LIBBASE
-
-# We are compiling for a 32 bit envionment
- _32BIT_ := 1
-
-# Default commands for compiling, assembling linking and archiving
- CC := bcc
- CFLAGS := -w- -4 -H=bcc32.sym -i60 -d
-.IF $(USE_NASM)
- AS := nasm
- ASFLAGS := -t -f obj -d__FLAT__ -iINCLUDE -i$(SCITECH)\INCLUDE
-.ELSE
- AS := tasm
- ASFLAGS := /t /mx /m /D__FLAT__ /D__OS2__ /iINCLUDE /i$(SCITECH)\INCLUDE
-.ENDIF
- LD := bclink tlink.exe
- LDFLAGS := -c
- RC := brcc
- RCFLAGS :=
- LIB := tlib
- LIBFLAGS := /C /P32
- ILIB := implib
- ILIBFLAGS := -c
-.IF $(USE_OS2GUI)
- CFLAGS += -D__OS2_PM__
-.ENDIF
-
-# Optionally turn on debugging information
-.IF $(DBG)
- CFLAGS += -v
- LDFLAGS += -v
- LIBFLAGS += /P128
-.IF $(USE_NASM)
- ASFLAGS += -F borland
-.ELSE
- ASFLAGS += /zi
-.ENDIF
-.ELSE
- LDFLAGS += -x
-.IF $(USE_NASM)
- ASFLAGS += -F null
-.ELSE
- ASFLAGS += /q
-.ENDIF
-.END
-
-# Optionally turn on optimisations
-.IF $(OPT)
- CFLAGS += -5 -O2 -k-
-.ELIF $(OPT_SIZE)
- CFLAGS += -5 -O1 -k-
-.END
-
-# Optionally turn on direct i387 FPU instructions
-.IF $(FPU)
- CFLAGS += -DFPU387
- ASFLAGS += -dFPU387
-.END
-
-# Optionally compile a beta release version of a product
-.IF $(BETA)
- CFLAGS += -DBETA
- ASFLAGS += -dBETA
-.END
-
-# Optionally use Phar Lap's TNT DOS Extender, otherwise use the DOS Power Pack
-.IF $(BUILD_DLL)
- CFLAGS += -sd -sm -DBUILD_DLL
- ASFLAGS += -dBUILD_DLL
-.ELSE
- CFLAGS += -sm
-.ENDIF
- DEF_LIBS := os2.lib c2mt.lib
- DX_ASFLAGS += -d__OS2__
- LIB_OS = os232
-
-# Define the base directory for library files
-
-.IF $(CHECKED)
-LIB_BASE_DIR := $(SCITECH_LIB)\lib\debug
-CFLAGS += -DCHECKED=1
-.ELSE
-LIB_BASE_DIR := $(SCITECH_LIB)\lib\release
-.ENDIF
-
-# Define where to install library files
- LIB_BASE := $(LIB_BASE_DIR)\$(LIB_OS)\$(BC_LIBBASE)
- LIB_DEST := $(LIB_BASE)
-
-# Place to look for PMODE library files
-
-.IF $(USE_OS2GUI)
-DEF_LIBS += pm_pm.lib
-.ELSE
-DEF_LIBS += pm.lib
-.ENDIF
-
-# Define which file contains our rules
-
- RULES_MAK := bcos2.mk
diff --git a/board/MAI/bios_emulator/scitech/makedefs/cl16.mk b/board/MAI/bios_emulator/scitech/makedefs/cl16.mk
deleted file mode 100644
index 0f29a1521e..0000000000
--- a/board/MAI/bios_emulator/scitech/makedefs/cl16.mk
+++ /dev/null
@@ -1,132 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Generic DMAKE startup makefile definitions file. Assumes
-# that the SCITECH environment variable has been set to point
-# to where all our stuff is installed. You should not need
-# to change anything in this file.
-#
-# Microsoft C 6.0 16 bit version. Supports 16 bit
-# OS/2 development.
-#
-#############################################################################
-
-# Include standard startup script definitions
-.IMPORT: SCITECH
-.INCLUDE: "$(SCITECH)\makedefs\startup.mk"
-
-# Import enivornment variables that we use
-.IMPORT .IGNORE : VC_LIBBASE
-.IMPORT .IGNORE : USE_MASM
-
-# Default commands for compiling, assembling linking and archiving
- CC := cl # C-compiler and flags
- CFLAGS := /w /Gs
- ASFLAGS := /t /mx /m /D__COMM__ /iINCLUDE /i$(SCITECH)\INCLUDE
-.IF $(USE_TASM32)
- AS := tasm32
-.ELIF $(USE_TASMX)
- AS := tasmx # Assembler and flags
-.ELIF $(USE_MASM)
- AS := masm # Assembler and flags
- ASFLAGS := /D__COMM__ /iINCLUDE /i$(SCITECH)\INCLUDE
-.ELSE
- AS := tasm # Assembler and flags
-.ENDIF
- LD := cl # Loader and flags
- LDFLAGS = $(CFLAGS)
- RC := rc # WIndows resource compiler
- RCFLAGS :=
- LIB := lib # Librarian
- LIBFLAGS := /NOI /NOE
- ILIB := implib # Import librarian
- ILIBFLAGS := /noignorecase
-
-# Optionally turn on debugging information
-.IF $(DBG)
- CFLAGS += /Zi # Turn on debugging for C compiler
- ASFLAGS += /zi # Turn on debugging for assembler
-.ELSE
- ASFLAGS += /q # Suppress object records not needed for linking
-.END
-
-# Optionally turn on optimisations
-.IF $(OPT)
- CFLAGS += /Ox
-.END
-
-# Optionally turn on direct i387 FPU instructions
-
-.IF $(FPU)
- CFLAGS += /FPi87 /DFPU387
- ASFLAGS += /DFPU387 /DFPU_REG_RTN
-.END
-
-# Optionally compile a beta release version of a product
-.IF $(BETA)
- CFLAGS += /DBETA
- ASFLAGS += /DBETA
-.END
-
-# Use a larger stack during linking if requested ???? How the fuck do you
-# specify linker options on the CL command line?????
-
-.IF $(STKSIZE)
-.ENDIF
-
-# Optionally compile for 16 bit Windows
-.IF $(USE_WIN16)
-.IF $(BUILD_DLL)
- CFLAGS += /GD /Alfw /DBUILD_DLL
- ASFLAGS += -DBUILD_DLL
-.ELSE
- CFLAGS += /GA /AL
-.ENDIF
- DX_ASFLAGS += -D__WINDOWS16__
- LIB_OS = WIN16
-.ELSE
- USE_REALDOS := 1
- CFLAGS += /AL
- LIB_OS = DOS16
-.END
-
-# Place to look for PMODE library files
-
-PMLIB := pm.lib
-
-# Define the base directory for library files
-
-.IF $(CHECKED)
-LIB_BASE_DIR := $(SCITECH_LIB)\lib\debug
-CFLAGS += -DCHECKED=1
-.ELSE
-LIB_BASE_DIR := $(SCITECH_LIB)\lib\release
-.ENDIF
-
-# Define where to install library files
- LIB_BASE := $(LIB_BASE_DIR)\$(LIB_OS)\$(VC_LIBBASE)
- LIB_DEST := $(LIB_BASE)
-
-# Define which file contains our rules
-
- RULES_MAK := cl16.mk
diff --git a/board/MAI/bios_emulator/scitech/makedefs/cl386.mk b/board/MAI/bios_emulator/scitech/makedefs/cl386.mk
deleted file mode 100644
index 52157f91f4..0000000000
--- a/board/MAI/bios_emulator/scitech/makedefs/cl386.mk
+++ /dev/null
@@ -1,120 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Generic DMAKE startup makefile definitions file. Assumes
-# that the SCITECH environment variable has been set to point
-# to where all our stuff is installed. You should not need
-# to change anything in this file.
-#
-# Microsoft 386 C 6.0 32 bit. Supports 32 bit
-# OS/2 development.
-#
-#############################################################################
-
-# Include standard startup script definitions
-.IMPORT: SCITECH
-.INCLUDE: "$(SCITECH)\makedefs\startup.mk"
-
-# Import enivornment variables that we use
-.IMPORT .IGNORE : CL_LIBBASE USE_VDD
-.IMPORT .IGNORE : USE_MASM
-
-# Default commands for compiling, assembling linking and archiving
- CC := cl386 # C-compiler and flags
- # NB: The -Zf flag is ABSOLUTELY NECESSARY to compile IBM's OS/2 headers.
- # It isn't documented anywhere but obviously adds support for 48-bit
- # far pointers (ie. _far is valid in 32-bit code). Great.
- CFLAGS := -G3s -Zf -D__386__
- ASFLAGS := /t /mx /m /oi /D__FLAT__ /DSTDCALL_MANGLE /D__NOU_VAR__ /iINCLUDE /i$(SCITECH)\INCLUDE
-.IF $(USE_TASM32)
- AS := tasm32
-.ELIF $(USE_TASMX)
- AS := tasmx # Assembler and flags
-.ELIF $(USE_MASM)
- AS := masm # Assembler and flags
- ASFLAGS := /t /mx /D__FLAT__ /DSTDCALL_MANGLE /D__NOU_VAR__ /iINCLUDE /i$(SCITECH)\INCLUDE
-.ELSE
- AS := tasm # Assembler and flags
-.ENDIF
- LD := link386 # Linker and flags
- LDFLAGS = $(CFLAGS)
- RC := rc # Windows resource compiler
- RCFLAGS :=
- LIB := lib # Librarian
- LIBFLAGS := /NOI /NOE
- ILIB := implib # Import librarian
- ILIBFLAGS := /noignorecase
-
-# Optionally turn on debugging information
-.IF $(DBG)
- CFLAGS += -Zi # Turn on debugging for C compiler
- ASFLAGS += /zi # Turn on debugging for assembler
-.ELSE
- ASFLAGS += /q # Suppress object records not needed for linking
-.END
-
-# Optionally turn on optimisations
-.IF $(OPT)
- CFLAGS += /Ox
-.END
-
-# Optionally turn on direct i387 FPU instructions
-
-.IF $(FPU)
- CFLAGS += /FPi87 /DFPU387
- ASFLAGS += /DFPU387 /DFPU_REG_RTN
-.END
-
-# Optionally compile a beta release version of a product
-.IF $(BETA)
- CFLAGS += /DBETA
- ASFLAGS += /DBETA
-.END
-
-# Use a larger stack during linking if requested ???? How the fuck do you
-# specify linker options on the CL command line?????
-
-.IF $(STKSIZE)
-.ENDIF
-
-# Place to look for PMODE library files
-
-PMLIB := pm.lib
-
-# Define the base directory for library files
-
-.IF $(CHECKED)
-LIB_BASE_DIR := $(SCITECH_LIB)\lib\debug
-CFLAGS += -DCHECKED=1
-.ELSE
-LIB_BASE_DIR := $(SCITECH_LIB)\lib\release
-.ENDIF
-
-# Define where to install library files
- LIB_OS = os232
- LIB_BASE := $(LIB_BASE_DIR)\$(LIB_OS)\$(CL_LIBBASE)
- LIB_DEST := $(LIB_BASE)
-
-# Define which file contains our rules
-
- RULES_MAK := cl386.mk
diff --git a/board/MAI/bios_emulator/scitech/makedefs/common.mk b/board/MAI/bios_emulator/scitech/makedefs/common.mk
deleted file mode 100644
index d337152e74..0000000000
--- a/board/MAI/bios_emulator/scitech/makedefs/common.mk
+++ /dev/null
@@ -1,180 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Common makefile targets used by all SciTech Software
-# makefiles. This file includes targets for cleaning the
-# current directory, and maintaining the source files with
-# RCS.
-#
-#############################################################################
-
-# Override global OpenGL includes when compiling against MGL version
-
-.IF $(USE_MGL_OPENGL)
-.IF $(UNIX_HOST)
-CFLAGS += -I$(SCITECH)/include/mglgl
-DEPEND_INC += $(SCITECH)/include/mglgl
-.ELSE
-CFLAGS += -I$(SCITECH)\include\mglgl
-DEPEND_INC += $(SCITECH)\include/mglgl
-.ENDIF
-.ENDIF
-
-# Define where to install all compiled DLL files
-
-.IF $(UNIX_HOST)
-.IF $(CHECKED)
-DLL_DEST := $(SCITECH_LIB)/redist/debug
-.ELSE
-DLL_DEST := $(SCITECH_LIB)/redist/release
-.ENDIF
-.ELSE
-.IF $(CHECKED)
-DLL_DEST := $(SCITECH_LIB)\redist\debug
-.ELSE
-DLL_DEST := $(SCITECH_LIB)\redist\release
-.ENDIF
-.ENDIF
-
-# Target to build the library and DLL file if specified
-
-.IF $(LIBFILE)
-
-lib: $(LIBFILE)
-
-.IF $(DLLFILE)
-
-# Build and install a DLL file, or simply build import library and install
-
-.IF $(BUILD_DLL)
-
-$(DLLFILE): $(OBJECTS)
-$(LIBFILE): $(DLLFILE)
-install: $(LIBFILE) $(DLLFILE)
- $(INSTALL) $(LIBFILE) $(LIB_DEST)$(LIB_EXTENDER)
- $(INSTALL) $(DLLFILE) $(DLL_DEST)
-.IF $(USE_SOFTICE)
- $(INSTALL) $(DLLFILE:s/.dll/.nms) $(DLL_DEST)
-.ENDIF
-.ELSE
-
-$(LIBFILE): $(DLL_DEST)\$(DLLFILE)
-install: $(LIBFILE)
- $(INSTALL) $(LIBFILE) $(LIB_DEST)$(LIB_EXTENDER)
-
-.ENDIF
-.ELSE
-
-.IF $(BUILD_DLL)
-
-# Build and install a Unix shared library
-
-$(LIBFILE): $(OBJECTS)
-install: $(LIBFILE)
- $(INSTALL) $(LIBFILE) $(LIB_DEST)$(LIB_EXTENDER)
- $(INSTALL) $(LIBFILE) $(DLL_DEST)/$(LIBFILE).$(VERSION)
-
-.ELSE
-
-# Build and install a normal library file
-
-.IF $(USE_DLL)
-.ELSE
-$(LIBFILE): $(OBJECTS)
-install: $(LIBFILE)
- $(INSTALL) $(LIBFILE) $(LIB_DEST)$(LIB_EXTENDER)
-.ENDIF
-.ENDIF
-.ENDIF
-.ENDIF
-
-# Build and install a VxD file, including debug information
-
-.IF $(VXDFILE)
-$(VXDFILE:s/.vxd/.dll): $(OBJECTS)
-$(VXDFILE): $(VXDFILE:s/.vxd/.dll)
-install: $(VXDFILE)
- $(INSTALL) $(VXDFILE) $(DLL_DEST)
-.IF $(DBG)
- $(INSTALL) $(VXDFILE:s/.vxd/.nms) $(DLL_DEST)
-.ENDIF
-.ENDIF
-
-# Clean up directory removing all files not needed to make the library.
-
-__CLEAN_FILES := *.obj *.o *.sym *.bak *.tdk *.swp *.map *.err *.csm *.lib *.aps *.nms *.sys
-__CLEAN_FILES += *.~* *.td *.tr *.tr? *.td? *.rws *.res *.exp *.ilk *.pdb *.pch *.a bcc32.*
-__CLEAN_FILES += $(LIBCLEAN)
-__CLEANEXE_FILES := $(__CLEAN_FILES) *$E *.drv *.rex *.dll *.vxd *.nms *.pel *.smf *.so.*
-
-.PHONY clean:
- @$(RM) -f -S $(mktmp $(__CLEAN_FILES:t"\n"))
-
-.PHONY cleanexe:
- @$(RM) -f -S $(mktmp $(__CLEANEXE_FILES:t"\n"))
-
-# Define the source directories to find common files
-
-.IF $(NO_SCITECH_COMMON)
-.ELSE
-.SOURCE: $(SCITECH)/src/common
-.ENDIF
-
-# Create the include file dependencies using the MKUTIL makedep program if
-# the list of dependent object files is defined
-
-.IF $(DEPEND_OBJ)
-depend:
- @$(RM) -f makefile.dep
-.IF $(DEPEND_SRC)
-.IF $(DEPEND_INC)
- @makedep -amakefile.dep -r -s -I@$(mktmp $(DEPEND_INC:s/\/\\)) -S@$(mktmp $(DEPEND_SRC:s/\/\\);$(SCITECH)/src/common) @$(mktmp $(DEPEND_OBJ:t"\n")\n)
-.ELSE
- @makedep -amakefile.dep -r -s -S@$(mktmp $(DEPEND_SRC:s/\/\\);$(SCITECH)/src/common) @$(mktmp $(DEPEND_OBJ:t"\n")\n)
-.ENDIF
-.ELSE
-.IF $(DEPEND_INC)
- @makedep -amakefile.dep -r -s -I@$(mktmp $(DEPEND_INC:s/\/\\)) -S@$(mktmp $(SCITECH)/src/common) @$(mktmp $(DEPEND_OBJ:t"\n")\n)
-.ELSE
- @makedep -amakefile.dep -r -s -S@$(mktmp $(SCITECH)/src/common) @$(mktmp $(DEPEND_OBJ:t"\n")\n)
-.ENDIF
-.ENDIF
- @$(ECHO) Object file dependency information generated.
-.ENDIF
-
-# Set up for compiling Snap executeables and dynamic link libraries
-
-.IF $(USE_SNAP)
-#CFLAGS += -I$(PRIVATE)\include\drvlib -I$(SCITECH)\include\drvlib -D__SNAP__
-CFLAGS += -D__SNAP__
-ASFLAGS += -d__SNAP__
-#EXELIBS += snap$L
-.ENDIF
-
-# Include rule definitions for the compiler
-
-.INCLUDE: "$(SCITECH)/makedefs/rules/$(RULES_MAK)"
-
-# Include file dependencies
-
-.INCLUDE .IGNORE: "makefile.dep"
diff --git a/board/MAI/bios_emulator/scitech/makedefs/emx.mk b/board/MAI/bios_emulator/scitech/makedefs/emx.mk
deleted file mode 100644
index f569790a3c..0000000000
--- a/board/MAI/bios_emulator/scitech/makedefs/emx.mk
+++ /dev/null
@@ -1,194 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Generic DMAKE startup makefile definitions file. Assumes
-# that the SCITECH environment variable has been set to point
-# to where all our stuff is installed. You should not need
-# to change anything in this file.
-#
-# OS/2 version for EMX/GNU C/C++.
-#
-#############################################################################
-
-# Include standard startup script definitions
-.IMPORT: SCITECH
-.INCLUDE: "$(SCITECH)\makedefs\startup.mk"
-
-# Disable warnings for macros redefined here that were given
-# on the command line.
-__.SILENT := $(.SILENT)
-.SILENT := yes
-
-# Import enivornment variables that we use common to all compilers
-.IMPORT .IGNORE : TEMP SHELL INCLUDE LIB SCITECH PRIVATE SCITECH_LIB
-.IMPORT .IGNORE : DBG OPT OPT_SIZE CRTDLL SHW BETA CHECKED NO_EXCEPT NO_RTTI
-.IMPORT .IGNORE : FULLSCREEN SHOW_ARGS
- TMPDIR := $(TEMP)
-
-# Standard file suffix definitions
- L := .lib # Libraries
- E := .exe # Executables
- O := .obj # Objects
- A := .asm # Assembler sources
- S := .s # GNU assembler sources
- P := .cpp # C++ sources
-
-# File prefix/suffix definitions. The following prefixes are defined, and are
-# used primarily to abstract between the Unix style libXX.a naming convention
-# and the DOS/Windows/OS2 naming convention of XX.lib.
- LP := # LP - Library file prefix (name of file on disk)
- LL := -l # Library link prefix (name of library on link command line)
- LE := # Library link suffix (extension of library on link command line)
-
-# Import enivornment variables that we use
-.IMPORT .IGNORE : EMX_LIBBASE USE_OS232 USE_OS2GUI
-
-# We are compiling for a 32 bit envionment
- _32BIT_ := 1
-
-# DMAKE uses this recipe to remove intermediate targets
-.REMOVE :; $(RM) -f $<
-
-# Turn warnings back to previous setting.
-.SILENT := $(__.SILENT)
-
-# We dont use TABS in our makefiles
-.NOTABS := yes
-
-# Default commands for compiling, assembling linking and archiving.
- CC := gcc
- CFLAGS := -Zmt -Zomf -Wall -I. -I$(INCLUDE)
- CXX := gcc -x c++ -fno-exceptions -fno-rtti
-.IF $(USE_NASM)
- AS := nasm
- ASFLAGS := -t -f obj -F null -d__FLAT__ -d__NOU__ -iINCLUDE -i$(SCITECH)\INCLUDE
-.ELSE
- AS := tasm # Assembler and flags
- ASFLAGS := /t /mx /m /oi /D__FLAT__ /D__NOU__ /iINCLUDE /i$(SCITECH)\INCLUDE
-.ENDIF
- LD := gcc
- LDXX := gcc -x c++
- LDFLAGS := -L. -Zomf -Zmt
- LIB := emxomfar
- LIBFLAGS := -p32 rcv
-
- YACC := bison -y
- LEX := flex
- SED := sed
-
-# Optionally turn off exceptions and RTTI for C++ code
-.IF $(NO_EXCEPT)
- CXX += -fno-exceptions
-.ENDIF
-.IF $(NO_RTTI)
- CXX += -fno-rtti
-.ENDIF
-
-# Optionally turn on debugging information
-.IF $(DBG)
- CFLAGS += -g
-.ELSE
-# Without -s, emx always runs LINK386 with the /DEBUG option
- CFLAGS += -s
- LDFLAGS += -s
-# NASM does not support debugging information yet
- ASFLAGS +=
-.ENDIF
-
-# Optionally turn on optimisations
-.IF $(OPT_MAX)
- CFLAGS += -O6
-.ELIF $(OPT)
- CFLAGS += -O3 -fomit-frame-pointer
-.ELIF $(OPT_SIZE)
- CFLAGS += -Os
-.ENDIF
-
-# Optionally turn on direct i387 FPU instructions
-.IF $(FPU)
- CFLAGS += -DFPU387
- ASFLAGS += -dFPU387
-.END
-
-# Optionally compile a beta release version of a product
-.IF $(BETA)
- CFLAGS += -DBETA
- ASFLAGS += -dBETA
-.ENDIF
-
-# Disable standard C runtime library
-.IF $(NO_RUNTIME)
-CFLAGS += -fno-builtin -nostdinc
-.ENDIF
-
-# Link against EMX DLLs (CRTDLL=1) or link with static C runtime libraries
-.IF $(CRTDLL)
- LDFLAGS += -Zcrtdll
-.ELSE
- CFLAGS += -Zsys
- LDFLAGS += -Zsys
-.ENDIF
-
-# Target environment dependant flags
- CFLAGS += -D__OS2_32__
- CFLAGS += -D__OS2__
- ASFLAGS += -d__OS2__
-
-# Define the base directory for library files
-
-.IF $(CHECKED)
-LIB_BASE_DIR := $(SCITECH_LIB)/lib/debug
-CFLAGS += -DCHECKED=1
-.ELSE
-LIB_BASE_DIR := $(SCITECH_LIB)/lib/release
-.ENDIF
-
-# Define where to install library files
- LIB_DEST := $(LIB_BASE_DIR)\OS232\$(EMX_LIBBASE)
- LDFLAGS += -L$(LIB_DEST)
-
-# Build 32-bit OS/2 apps
-.IF $(BUILD_DLL)
- CFLAGS += -Zdll -DBUILD_DLL
- LDFLAGS += -Zdll
- ASFLAGS += -dBUILD_DLL
-.ELSE
-.IF $(USE_OS2GUI)
- CFLAGS += -D__OS2_PM__
- LDFLAGS += -Zlinker /PMTYPE:PM
-.ELSE
-.IF $(FULLSCREEN)
- LDFLAGS += -Zlinker /PMTYPE:NOVIO
-.ELSE
- LDFLAGS += -Zlinker /PMTYPE:VIO
-.ENDIF
-.ENDIF
-.ENDIF
-
-# Place to look for PMODE library files
-
-PMLIB := -lpm
-
-# Define which file contains our rules
-
- RULES_MAK := emx.mk
diff --git a/board/MAI/bios_emulator/scitech/makedefs/gcc_beos.mk b/board/MAI/bios_emulator/scitech/makedefs/gcc_beos.mk
deleted file mode 100644
index 0d62fdf1a8..0000000000
--- a/board/MAI/bios_emulator/scitech/makedefs/gcc_beos.mk
+++ /dev/null
@@ -1,161 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Generic DMAKE startup makefile definitions file. Assumes
-# that the SCITECH environment variable has been set to point
-# to where all our stuff is installed. You should not need
-# to change anything in this file.
-#
-# BeOS version for GNU C/C++.
-#
-#############################################################################
-
-# Disable warnings for macros redefined here that were given
-# on the command line.
-__.SILENT := $(.SILENT)
-.SILENT := yes
-
-# Import enivornment variables that we use common to all compilers
-.IMPORT .IGNORE : TEMP SHELL INCLUDE LIB SCITECH PRIVATE SCITECH_LIB
-.IMPORT .IGNORE : DBG OPT OPT_SIZE SHW BETA CHECKED USE_X11 USE_LINUX
-.IMPORT .IGNORE : USE_EGCS USE_PGCC STATIC_LIBS LIBC
- TMPDIR := $(TEMP)
-
-# Standard file suffix definitions
-#
-# NOTE: BeOS does not require any extenion for executeable files, but you
-# can use an extension if you wish. We use the .x extension for building
-# executeable files so that we can use implicit rules to make the
-# makefiles simpler and more portable between systems. When you install
-# the files to a local bin directory, you will probably want to remove
-# the .x extension.
- L := .a # Libraries
- E := .x # Executables
- O := .o # Objects
- A := .asm # Assembler sources
- S := .s # GNU assembler sources
- P := .cpp # C++ sources
-
-# File prefix/suffix definitions. The following prefixes are defined, and are
-# used primarily to abstract between the Unix style libXX.a naming convention
-# and the DOS/Windows/OS2 naming convention of XX.lib.
- LP := lib # LP - Library file prefix (name of file on disk)
- LL := -l # Library link prefix (name of library on link command line)
- LE := # Library link suffix (extension of library on link command line)
-
-# We use the Unix shell at all times
- SHELLFLAGS := -c
-
-# Definition of $(MAKE) macro for recursive makes.
- MAKE = $(MAKECMD) $(MFLAGS)
-
-# Macro to install a library file
- INSTALL := cp
-
-# DMAKE uses this recipe to remove intermediate targets
-.REMOVE :; $(RM) -f $<
-
-# Turn warnings back to previous setting.
-.SILENT := $(__.SILENT)
-
-# We dont use TABS in our makefiles
-.NOTABS := yes
-
-# Define that we are compiling for BeOS
- USE_BEOS := 1
-
-# Default commands for compiling, assembling linking and archiving.
- CC := gcc
- CFLAGS := -Wall -I. -Iinclude $(INCLUDE)
- CXX := g++
- AS := nasm
- ASFLAGS := -f elf -d__FLAT__ -iinclude -i$(SCITECH)/include -d__NOU__
- LD := gcc
- LDFLAGS := -L.
- LIB := ar
- LIBFLAGS := rcs
-
-# Link to static libraries if requested
-.IF $(STATIC_LIBS)
- LDFLAGS += -static
-.ENDIF
-
-# Optionally turn on debugging information
-.IF $(DBG)
- CFLAGS += -g
-.ELSE
-# NASM does not support debugging information yet
- ASFLAGS +=
-.ENDIF
-
-# Optionally turn on optimisations
-.IF $(OPT_MAX)
- CFLAGS += -O6
-.ELIF $(OPT)
- CFLAGS += -O2
-.ELIF $(OPT_SIZE)
- CFLAGS += -O1
-.ENDIF
-
-# Optionally turn on direct i387 FPU instructions
-.IF $(FPU)
- CFLAGS += -DFPU387
- ASFLAGS += -dFPU387
-.END
-
-# Optionally compile a beta release version of a product
-.IF $(BETA)
- CFLAGS += -DBETA
- ASFLAGS += -dBETA
-.ENDIF
-
-# Disable standard C runtime library
-
-.IF $(NO_RUNTIME)
-CFLAGS += -fno-builtin -nostdinc
-.ENDIF
-
-# Target environment dependant flags
- CFLAGS += -D__BEOS__
- ASFLAGS += -d__BEOS__ -d__UNIX__
-
-# Define the base directory for library files
-
-.IF $(CHECKED)
-LIB_BASE_DIR := $(SCITECH_LIB)/lib/debug
-CFLAGS += -DCHECKED=1
-.ELSE
-LIB_BASE_DIR := $(SCITECH_LIB)/lib/release
-.ENDIF
-
-# Define where to install library files
-LIB_DEST := $(LIB_BASE_DIR)/beos/gcc
-LDFLAGS += -L$(LIB_DEST)
-
-# Place to look for PMODE library files
-
-PMLIB := -lpm
-
-# Define which file contains our rules
-
- RULES_MAK := gcc_beos.mk
diff --git a/board/MAI/bios_emulator/scitech/makedefs/gcc_dos.mk b/board/MAI/bios_emulator/scitech/makedefs/gcc_dos.mk
deleted file mode 100644
index 65589c83a3..0000000000
--- a/board/MAI/bios_emulator/scitech/makedefs/gcc_dos.mk
+++ /dev/null
@@ -1,112 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Generic DMAKE startup makefile definitions file. Assumes
-# that the SCITECH environment variable has been set to point
-# to where all our stuff is installed. You should not need
-# to change anything in this file.
-#
-# DJGPP V2 port of GNU C/C++ to DOS with DPMI only.
-#
-#############################################################################
-
-# Include standard startup script definitions
-.IMPORT: SCITECH
-.INCLUDE: "$(SCITECH)\makedefs\startup.mk"
-
-# Override some file suffix definitions
- L := .a # Libraries
- O := .o # Objects
-
-# Override the file prefix/suffix definitions for library naming.
- LP := lib # LP - Library file prefix (name of file on disk)
- LL := -l # Library link prefix (name of library on link command line)
- LE := # Library link suffix (extension of library on link command line)
-
-# Import enivornment variables that we use
-.IMPORT .IGNORE : DJ_LIBBASE
-
-# We are compiling for a 32 bit envionment
- _32BIT_ := 1
-
-# Default commands for compiling, assembling linking and archiving
- CC := gcc # C-compiler and flags
- CFLAGS := -Wall
- AS := nasm
- ASFLAGS := -t -f coff -F null -d__FLAT__ -d__GNUC__ -dSTDCALL_USCORE -iINCLUDE -i$(SCITECH)\INCLUDE
- LD := dj_ld # Loader and flags
- LDFLAGS :=
- LIB := ar # Librarian
- LIBFLAGS := rs
- USE_NASM := 1
- USE_GCC := 1
-
-# Optionally turn on debugging information
-.IF $(DBG)
- CFLAGS += -g # Turn on debugging for C compiler
-.END
-
-# Optionally turn on optimisations
-.IF $(OPT)
- CFLAGS += -O2
-.ELIF $(OPT_SIZE)
- CFLAGS += -O1
-.END
-
-# Optionally turn on direct i387 FPU instructions
-
-.IF $(FPU)
- CFLAGS += -DFPU387
- ASFLAGS += -dFPU387
-.END
-
-# Optionally compile a beta release version of a product
-.IF $(BETA)
- CFLAGS += -DBETA
- ASFLAGS += -dBETA
-.END
-
-# DOS extender dependant flags
- DX_CFLAGS +=
- DX_ASFLAGS += -dDJGPP
- USE_REALDOS := 1
-
-# Define the base directory for library files
-
-.IF $(CHECKED)
-LIB_BASE_DIR := $(SCITECH_LIB)\lib\debug
-CFLAGS += -DCHECKED=1
-.ELSE
-LIB_BASE_DIR := $(SCITECH_LIB)\lib\release
-.ENDIF
-
-# Define where to install library files
- LIB_DEST := $(LIB_BASE_DIR)\DOS32\$(DJ_LIBBASE)
-
-# Place to look for PMODE library files
-
-PMLIB := -lpm
-
-# Define which file contains our rules
-
- RULES_MAK := dj32.mk
diff --git a/board/MAI/bios_emulator/scitech/makedefs/gcc_freebsd.mk b/board/MAI/bios_emulator/scitech/makedefs/gcc_freebsd.mk
deleted file mode 100644
index 0cb4b8530b..0000000000
--- a/board/MAI/bios_emulator/scitech/makedefs/gcc_freebsd.mk
+++ /dev/null
@@ -1,174 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Generic DMAKE startup makefile definitions file. Assumes
-# that the SCITECH environment variable has been set to point
-# to where all our stuff is installed. You should not need
-# to change anything in this file.
-#
-# Linux version for GNU C/C++.
-#
-#############################################################################
-
-# Disable warnings for macros redefined here that were given
-# on the command line.
-__.SILENT := $(.SILENT)
-.SILENT := yes
-
-# Import enivornment variables that we use common to all compilers
-.IMPORT .IGNORE : TEMP SHELL INCLUDE LIB SCITECH PRIVATE SCITECH_LIB
-.IMPORT .IGNORE : DBG OPT OPT_SIZE SHW BETA CHECKED USE_X11 USE_FREEBSD
-.IMPORT .IGNORE : USE_EGCS USE_PGCC STATIC_LIBS
- TMPDIR := $(TEMP)
-
-# Standard file suffix definitions
-#
-# NOTE: Linux does not require any extenion for executeable files, but you
-# can use an extension if you wish. We use the .x extension for building
-# executeable files so that we can use implicit rules to make the
-# makefiles simpler and more portable between systems. When you install
-# the files to a local bin directory, you will probably want to remove
-# the .x extension.
- L := .a # Libraries
- E := .x # Executables
- O := .o # Objects
- A := .asm # Assembler sources
- S := .s # GNU assembler sources
- P := .cpp # C++ sources
-
-# File prefix/suffix definitions. The following prefixes are defined, and are
-# used primarily to abstract between the Unix style libXX.a naming convention
-# and the DOS/Windows/OS2 naming convention of XX.lib.
- LP := lib # LP - Library file prefix (name of file on disk)
- LL := -l # Library link prefix (name of library on link command line)
- LE := # Library link suffix (extension of library on link command line)
-
-# We use the Unix shell at all times
- SHELL := /bin/sh
- SHELLFLAGS := -c
-
-# Definition of $(MAKE) macro for recursive makes.
- MAKE = $(MAKECMD) $(MFLAGS)
-
-# Macro to install a library file
- INSTALL := cp
-
-# DMAKE uses this recipe to remove intermediate targets
-.REMOVE :; $(RM) -f $<
-
-# Turn warnings back to previous setting.
-.SILENT := $(__.SILENT)
-
-# We dont use TABS in our makefiles
-.NOTABS := yes
-
-# Define that we are compiling for FreeBSD
- USE_LINUX := 1
-
-# Default commands for compiling, assembling linking and archiving.
-.IF $(USE_EGCS)
- CC := egcs
-.ELIF $(USE_PGCC)
- CC := pgcc
-.ELSE
- CC := gcc
-.ENDIF
- CFLAGS := -Wall -I. -Iinclude $(INCLUDE)
- CXX := g++
- AS := nasm
-# TODO: On earlier versions of FreeBSD (<3.0) a.out is used instead of ELF
- ASFLAGS := -f elf -d__FLAT__ -iinclude -i$(SCITECH)/include -d__NOU__
- LD := g++
- LDFLAGS := -L.
- LIB := ar
- LIBFLAGS := rcs
-
-# Link to static libraries if requested
-.IF $(STATIC_LIBS)
- LDFLAGS += -static
-.ENDIF
-
-# Optionally turn on debugging information
-.IF $(DBG)
- CFLAGS += -g
-.ELSE
-# NASM does not support debugging information yet
- ASFLAGS +=
-.ENDIF
-
-# Optionally turn on optimisations
-.IF $(OPT_MAX)
- CFLAGS += -O6
-.ELIF $(OPT)
- CFLAGS += -O2
-.ELIF $(OPT_SIZE)
- CFLAGS += -O1
-.ENDIF
-
-# Optionally turn on direct i387 FPU instructions
-.IF $(FPU)
- CFLAGS += -DFPU387
- ASFLAGS += -dFPU387
-.END
-
-# Optionally compile a beta release version of a product
-.IF $(BETA)
- CFLAGS += -DBETA
- ASFLAGS += -dBETA
-.ENDIF
-
-# Disable standard C runtime library
-
-.IF $(NO_RUNTIME)
-CFLAGS += -fno-builtin -nostdinc
-.ENDIF
-
-# Compile flag for whether to build X11 or non-X11 lib
-.IF $(USE_X11)
- CFLAGS += -D__X11__
-.ENDIF
-
-# Target environment dependant flags
- CFLAGS += -D__FREEBSD__
- ASFLAGS += -d__FREEBSD__ -d__UNIX__
-
-# Define the base directory for library files
-
-.IF $(CHECKED)
-LIB_BASE_DIR := $(SCITECH_LIB)/lib/debug
-CFLAGS += -DCHECKED=1
-.ELSE
-LIB_BASE_DIR := $(SCITECH_LIB)/lib/release
-.ENDIF
-
-# Define where to install library files
- LIB_DEST := $(LIB_BASE_DIR)/freebsd/gcc
- LDFLAGS += -L$(LIB_DEST)
-
-# Place to look for PMODE library files
-
-PMLIB := -lpm
-
-# Define which file contains our rules
-
- RULES_MAK := gcc_freebsd.mk
diff --git a/board/MAI/bios_emulator/scitech/makedefs/gcc_linux.mk b/board/MAI/bios_emulator/scitech/makedefs/gcc_linux.mk
deleted file mode 100644
index 72c4cedfd4..0000000000
--- a/board/MAI/bios_emulator/scitech/makedefs/gcc_linux.mk
+++ /dev/null
@@ -1,180 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Generic DMAKE startup makefile definitions file. Assumes
-# that the SCITECH environment variable has been set to point
-# to where all our stuff is installed. You should not need
-# to change anything in this file.
-#
-# Linux version for GNU C/C++.
-#
-#############################################################################
-
-# Include standard startup script definitions
-.IMPORT: SCITECH
-.INCLUDE: "$(SCITECH)/makedefs/startup.mk"
-
-# Import enivornment variables that we use
-.IMPORT .IGNORE : GCC2_LIBBASE
-
-# Override some file suffix definitions
- L := .a # Libraries
- O := .o # Objects
-
-# Override the file prefix/suffix definitions for library naming.
- LP := lib # LP - Library file prefix (name of file on disk)
- LL := -l # Library link prefix (name of library on link command line)
- LE := # Library link suffix (extension of library on link command line)
-
-# We are compiling for a 32 bit envionment
- _32BIT_ := 1
-
-# Define that we are compiling for Linux
- USE_LINUX := 1
-
-# Default commands for compiling, assembling linking and archiving.
- CC := gcc
- CFLAGS := -Wall -I. -Iinclude -I$(SCITECH:s,\,/)/include -I$(PRIVATE:s,\,/)/include
- SHOW_CFLAGS := -c
- CXX := g++
- AS := nasm
- ASFLAGS := -t -f elf -d__FLAT__ -d__GNUC__ -iinclude -i$(SCITECH)/include -d__NOU__
- SHOW_ASFLAGS := -f elf
- LD := gcc
- LDXX := g++
- LDFLAGS := -L.
- LIB := ar
- LIBFLAGS := rcs
- YACC := bison -y
- LEX := flex
- SED := sed
-
-# Optionally turn on debugging information
-.IF $(DBG)
- CFLAGS += -g
- SHOW_CFLAGS += -g
-.ELSE
-# NASM does not support debugging information yet
- ASFLAGS +=
-.ENDIF
-
-# Optionally turn on optimisations
-.IF $(OPT_MAX)
- CFLAGS += -O6
- SHOW_CFLAGS += -O6
-.ELIF $(OPT)
- CFLAGS += -O2
- SHOW_CFLAGS += -O2
-.ELIF $(OPT_SIZE)
- CFLAGS += -O1
- SHOW_CFLAGS += -O1
-.ENDIF
-
-# Optionally turn on direct i387 FPU instructions
-.IF $(FPU)
- CFLAGS += -DFPU387
- ASFLAGS += -dFPU387
-.END
-
-# Optionally compile a beta release version of a product
-.IF $(BETA)
- CFLAGS += -DBETA
- SHOW_CFLAGS += -DBETA
- ASFLAGS += -dBETA
- SHOW_ASFLAGS += -dBETA
-.ENDIF
-
-# Disable standard C runtime library
-
-.IF $(NO_RUNTIME)
-CFLAGS += -fno-builtin -nostdinc
-.ENDIF
-
-# Compile flag for whether to build X11 or non-X11 lib
-.IF $(USE_X11)
- CFLAGS += -D__X11__
-.ENDIF
-
-# Target environment dependant flags
- CFLAGS += -D__LINUX__
- ASFLAGS += -d__LINUX__ -d__UNIX__
-
-# Define the base directory for library files
-
-.IF $(CHECKED)
-LIB_BASE_DIR := $(SCITECH_LIB)/lib/debug
-CFLAGS += -DCHECKED=1
-SHOW_CFLAGS += -DCHECKED=1
-.ELSE
-LIB_BASE_DIR := $(SCITECH_LIB)/lib/release
-.ENDIF
-
-# Define where to install library files
-.IF $(LIBC)
- LIB_DEST_SHARED := $(LIB_BASE_DIR)/linux/gcc/libc.so
- LIB_DEST_STATIC := $(LIB_BASE_DIR)/linux/gcc/libc
-.ELSE
- LIB_DEST_SHARED := $(LIB_BASE_DIR)/linux/gcc/glibc.so
- LIB_DEST_STATIC := $(LIB_BASE_DIR)/linux/gcc/glibc
-.ENDIF
-
-# Link to static libraries if requested
-.IF $(STATIC_LIBS_ALL)
- LDFLAGS += -static
- STATIC_LIBS := 1
-.ENDIF
-
-# Link to static libraries if requested
-.IF $(STATIC_LIBS)
- LDFLAGS += -L$(LIB_DEST_STATIC)
-.ELSE
- LDFLAGS += -L$(LIB_DEST_SHARED) -L$(LIB_DEST_STATIC)
-.ENDIF
-
-# Optionally enable some dynamic libraries to be built
-.IF $(BUILD_DLL)
-.IF $(VERSIONMAJ)
-.ELSE
- VERSIONMAJ := 5
- VERSIONMIN := 0
-.ENDIF
- VERSION := $(VERSIONMAJ).$(VERSIONMIN)
- LIB := gcc -shared
- LIBFLAGS :=
- L := .so
- CFLAGS += -fPIC
- SHOW_CFLAGS += -fPIC
- ASFLAGS += -D__PIC__
- SHOW_ASFLAGS += -D__PIC__
- LIB_DEST := $(LIB_DEST_SHARED)
-.ELSE
- LIB_DEST := $(LIB_DEST_STATIC)
-.ENDIF
-
-# Place to look for PMODE library files
-
-PMLIB := -lpm
-
-# Define which file contains our rules
-
- RULES_MAK := gcc_linux.mk
diff --git a/board/MAI/bios_emulator/scitech/makedefs/gcc_win32.mk b/board/MAI/bios_emulator/scitech/makedefs/gcc_win32.mk
deleted file mode 100644
index 21ccf97849..0000000000
--- a/board/MAI/bios_emulator/scitech/makedefs/gcc_win32.mk
+++ /dev/null
@@ -1,135 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Generic DMAKE startup makefile definitions file. Assumes
-# that the SCITECH environment variable has been set to point
-# to where all our stuff is installed. You should not need
-# to change anything in this file.
-#
-# Cygwin port of GNU C/C++ to Win32.
-#
-#############################################################################
-
-# Include standard startup script definitions
-.IMPORT: SCITECH
-.INCLUDE: "$(SCITECH)\makedefs\startup.mk"
-
-# Import enivornment variables that we use
-.IMPORT .IGNORE : GCC2_LIBBASE
-
-# Override some file suffix definitions
- L := .a # Libraries
- O := .o # Objects
-
-# Override the file prefix/suffix definitions for library naming.
- LP := lib # LP - Library file prefix (name of file on disk)
- LL := -l # Library link prefix (name of library on link command line)
- LE := # Library link suffix (extension of library on link command line)
-
-# We are compiling for a 32 bit envionment
- _32BIT_ := 1
-
-# Default commands for compiling, assembling linking and archiving
- CC := gcc # C-compiler and flags
- CFLAGS := -Wall -I. -Iinclude -I$(SCITECH:s,\,/)/include -I$(PRIVATE:s,\,/)/include
- SHOW_CFLAGS := -c
- CXX := g++
- AS := nasm
- ASFLAGS := -t -f coff -F null -d__FLAT__ -d__GNUC__ -dSTDCALL_USCORE -iINCLUDE -i$(SCITECH)\INCLUDE
- SHOW_ASFLAGS := -f coff
- LD := gcc # Loader and flags
- LDXX := g++
-.IF $(WIN32_GUI)
- LDFLAGS := -L. -mwindows -e _mainCRTStartup
-.ELSE
- LDFLAGS := -L.
-.ENDIF
- RC := windres
- RCFLAGS := -O coff
- LIB := ar # Librarian
- LIBFLAGS := rcs
- YACC := bison -y
- LEX := flex
- SED := sed
-
-# Optionally turn on debugging information
-.IF $(DBG)
- CFLAGS += -g
- SHOW_CFLAGS += -g
-.ELSE
-# NASM does not support debugging information yet
- ASFLAGS +=
-.ENDIF
-
-# Optionally turn on optimisations
-.IF $(OPT_MAX)
- CFLAGS += -O6
- SHOW_CFLAGS += -O6
-.ELIF $(OPT)
- CFLAGS += -O2
- SHOW_CFLAGS += -O2
-.ELIF $(OPT_SIZE)
- CFLAGS += -O1
- SHOW_CFLAGS += -O1
-.ENDIF
-
-# Optionally turn on direct i387 FPU instructions
-
-.IF $(FPU)
- CFLAGS += -DFPU387
- ASFLAGS += -dFPU387
-.END
-
-# Optionally compile a beta release version of a product
-.IF $(BETA)
- CFLAGS += -DBETA
- SHOW_CFLAGS += -DBETA
- ASFLAGS += -dBETA
- SHOW_ASFLAGS += -dBETA
-.ENDIF
-
-# DOS extender dependant flags
- DX_CFLAGS +=
- DX_ASFLAGS += -dGCC_WIN32
-
-# Define the base directory for library files
-
-.IF $(CHECKED)
-LIB_BASE_DIR := $(SCITECH_LIB)\lib\debug
-CFLAGS += -DCHECKED=1
-SHOW_CFLAGS += -DCHECKED=1
-.ELSE
-LIB_BASE_DIR := $(SCITECH_LIB)\lib\release
-.ENDIF
-
-# Define where to install library files
- LIB_DEST := $(LIB_BASE_DIR)\WIN32\$(GCC2_LIBBASE)
- LDFLAGS += -L$(LIB_DEST)
-
-# Place to look for PMODE library files
-
-PMLIB := -lpm
-
-# Define which file contains our rules
-
- RULES_MAK := gcc_win32.mk
diff --git a/board/MAI/bios_emulator/scitech/makedefs/hc32.mk b/board/MAI/bios_emulator/scitech/makedefs/hc32.mk
deleted file mode 100644
index f0b065a47c..0000000000
--- a/board/MAI/bios_emulator/scitech/makedefs/hc32.mk
+++ /dev/null
@@ -1,113 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Generic DMAKE startup makefile definitions file. Assumes
-# that the SCITECH environment variable has been set to point
-# to where all our stuff is installed. You should not need
-# to change anything in this file.
-#
-# Metaware High C/C++ 3.21 32 bit version. Supports Phar Lap's
-# TNT DOS Extender.
-#
-#############################################################################
-
-# Include standard startup script definitions
-.IMPORT: SCITECH
-.INCLUDE: "$(SCITECH)\makedefs\startup.mk"
-
-# We are compiling for a 32 bit envionment
- _32BIT_ := 1
-
-# Default commands for compiling, assembling linking and archiving
- CC := hc386 # C-compiler and flags
- CFLAGS :=
-.IF $(USE_TASM32)
- AS := tasm32
-.ELIF $(USE_TASMX)
- AS := tasmx # Assembler and flags
-.ELSE
- AS := tasm # Assembler and flags
-.ENDIF
- ASFLAGS := /t /mx /m /D__FLAT__ /iINCLUDE /i$(SCITECH)\INCLUDE
- LD := hc386
- LDFLAGS = $(CFLAGS)
- LIB := 386lib # TNT 386|lib Librarian
- LIBFLAGS := -TC
-
-# Optionally turn on debugging information
-.IF $(DBG)
- CFLAGS += -g # Turn on debugging for C compiler
- ASFLAGS += /zi # Turn on debugging for assembler
-.ELSE
- ASFLAGS += /q # Suppress object records not needed for linking
-.END
-
-# Optionally turn on optimisations
-.IF $(OPT)
- CFLAGS += -586 -O
-.ELIF $(OPT_SIZE)
- CFLAGS += -586 -O1
-.ELSE
- CFLAGS += -O0
-.END
-
-# Optionally turn on direct i387 FPU instructions
-
-.IF $(FPU)
- CFLAGS += -DFPU387
- ASFLAGS += -DFPU387
-.END
-
-# Optionally compile a beta release version of a product
-.IF $(BETA)
- CFLAGS += -DBETA
- ASFLAGS += -DBETA
-.END
-
-# DOS extender dependant flags
- USE_TNT := 1
- USE_REALDOS := 1
- DX_CFLAGS += -DTNT
- DX_ASFLAGS += -DTNT
- LDFLAGS += -LH:\TNT\LIB
-
-# Place to look for PMODE library files
-
-PMLIB := tnt\pm.lib
-
-# Define the base directory for library files
-
-.IF $(CHECKED)
-LIB_BASE_DIR := $(SCITECH_LIB)\lib\debug
-CFLAGS += -DCHECKED=1
-.ELSE
-LIB_BASE_DIR := $(SCITECH_LIB)\lib\release
-.ENDIF
-
-# Define where to install library files
- LIB_BASE := $(LIB_BASE_DIR)\DOS32\HC
- LIB_DEST := $(LIB_BASE)
-
-# Define which file contains our rules
-
- RULES_MAK := hc32.mk
diff --git a/board/MAI/bios_emulator/scitech/makedefs/qnx4.mk b/board/MAI/bios_emulator/scitech/makedefs/qnx4.mk
deleted file mode 100644
index f583af36f6..0000000000
--- a/board/MAI/bios_emulator/scitech/makedefs/qnx4.mk
+++ /dev/null
@@ -1,164 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Generic DMAKE startup makefile definitions file. Assumes
-# that the SCITECH environment variable has been set to point
-# to where all our stuff is installed. You should not need
-# to change anything in this file.
-#
-# QNX version for Watcom C.
-#
-#############################################################################
-
-# Disable warnings for macros redefined here that were given
-# on the command line.
-__.SILENT := $(.SILENT)
-.SILENT := yes
-
-# Import enivornment variables that we use common to all compilers
-.IMPORT .IGNORE : TEMP SHELL INCLUDE LIB SCITECH PRIVATE SCITECH_LIB
-.IMPORT .IGNORE : DBG OPT OPT_SIZE SHW BETA CHECKED USE_QNX USE_QNX4
-.IMPORT .IGNORE : USE_PHOTON USE_X11 USE_BIOS SHOW_ARGS MAX_WARN WC_LIBBASE
- TMPDIR := $(TEMP)
-
-# Standard file suffix definitions
-#
-# NOTE: Qnx does not require any extension for executeable files, but you
-# can use an extension if you wish. We use the .x extension for building
-# executeable files so that we can use implicit rules to make the
-# makefiles simpler and more portable between systems. When you install
-# the files to a local bin directory, you will probably want to remove
-# the .x extension.
- L := .a # Libraries
- E := .exe # Executables
- O := .o # Objects
- A := .asm # Assembler sources
- S := .s # GNU assembler sources
- P := .cpp # C++ sources
-
-# File prefix/suffix definitions. The following prefixes are defined, and are
-# used primarily to abstract between the Unix style libXX.a naming convention
-# and the DOS/Windows/OS2 naming convention of XX.lib.
- LP := lib # LP - Library file prefix (name of file on disk)
- LL := -l # Library link prefix (name of library on link command line)
- LE := # Library link suffix (extension of library on link command line)
-
-# We use the Unix shell at all times
- SHELL := /bin/sh
- SHELLFLAGS := -c
-
-# Definition of $(MAKE) macro for recursive makes.
- MAKE = $(MAKECMD) $(MFLAGS)
-
-# Macro to install a library file
- INSTALL := cp
-
-# DMAKE uses this recipe to remove intermediate targets
-.REMOVE :; $(RM) -f $<
-
-# Turn warnings back to previous setting.
-.SILENT := $(__.SILENT)
-
-# We dont use TABS in our makefiles
-.NOTABS := yes
-
-# Define that we are compiling for QNX
- USE_QNX := 1
-
-# Default commands for compiling, assembling linking and archiving.
- CC := wcc386
- CFLAGS := -I. -Iinclude $(INCLUDE)
- CXX := wpp386
- AS := nasm
- ASFLAGS := -t -f obj -d__FLAT__ -dSTDCALL_MANGLE -iinclude -i$(SCITECH)/include
- LD := cc
- LDFLAGS := -L.
- LIB := ar
- LIBFLAGS := rc
-
-# Set the compiler warning level
-.IF $(MAX_WARN)
- CFLAGS += -w4
-.ELSE
- CFLAGS += -w1
-.ENDIF
-
-# Optionally turn on debugging information
-.IF $(DBG)
- CFLAGS += -d2
- LDFLAGS += -g2
-.ELSE
-# NASM does not support debugging information yet
- ASFLAGS +=
-.ENDIF
-
-# Optionally turn on optimisations
-.IF $(OPT)
- CFLAGS += -onatx-5r-fp5
-.ELIF $(OPT_SIZE)
- CFLAGS += -onaslmr-5r-fp5
-.ELIF $(NOOPT)
- CFLAGS += -od-5r
-.END
-
-# Compile flag for whether to build photon or non-photon lib
-.IF $(USE_PHOTON)
- CFLAGS += -D__PHOTON__
-.ENDIF
-
-# Compile flag for whether to build X11 or non-X11 lib
-.IF $(USE_X11)
- CFLAGS += -D__X11__
-.ENDIF
-
-# Optionally compile a beta release version of a product
-.IF $(BETA)
- CFLAGS += -DBETA
- ASFLAGS += -dBETA
-.ENDIF
-
-# Target environment dependant flags
- CFLAGS += -D__QNX__ -D__UNIX__
- ASFLAGS += -d__QNX__ -d__UNIX__
-
-# Define the base directory for library files
-
-.IF $(CHECKED)
- LIB_BASE_DIR := $(SCITECH_LIB)/lib/debug
- CFLAGS += -DCHECKED=1
-.ELSE
- LIB_BASE_DIR := $(SCITECH_LIB)/lib/release
-.ENDIF
-
-# Define where to install library files
- LIB_BASE := $(LIB_BASE_DIR)/qnx4/$(WC_LIBBASE)
- LIB_DEST := $(LIB_BASE)
- LDFLAGS += -L$(LIB_DEST)
-
-# Place to look for PMODE library files
-
-PMLIB := -lpm
-
-# Define which file contains our rules
-
- RULES_MAK := qnx4.mk
diff --git a/board/MAI/bios_emulator/scitech/makedefs/qnxnto.mk b/board/MAI/bios_emulator/scitech/makedefs/qnxnto.mk
deleted file mode 100644
index 5168ed269b..0000000000
--- a/board/MAI/bios_emulator/scitech/makedefs/qnxnto.mk
+++ /dev/null
@@ -1,157 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Generic DMAKE startup makefile definitions file. Assumes
-# that the SCITECH environment variable has been set to point
-# to where all our stuff is installed. You should not need
-# to change anything in this file.
-#
-# QNX Neutrino version for GNU C/C++
-#
-#############################################################################
-
-# Disable warnings for macros redefined here that were given
-# on the command line.
-__.SILENT := $(.SILENT)
-.SILENT := yes
-
-# Import enivornment variables that we use common to all compilers
-.IMPORT .IGNORE : TEMP SHELL INCLUDE LIB SCITECH PRIVATE SCITECH_LIB
-.IMPORT .IGNORE : DBG OPT OPT_SIZE SHW BETA CHECKED USE_QNX USE_QNXNTO
-.IMPORT .IGNORE : USE_EGCS USE_PHOTON USE_X11 USE_BIOS
- TMPDIR := $(TEMP)
-
-# Standard file suffix definitions
-#
-# NOTE: Qnx does not require any extension for executeable files, but you
-# can use an extension if you wish. We use the .x extension for building
-# executeable files so that we can use implicit rules to make the
-# makefiles simpler and more portable between systems. When you install
-# the files to a local bin directory, you will probably want to remove
-# the .x extension.
- L := .a # Libraries
- E := .x # Executables
- O := .o # Objects
- A := .asm # Assembler sources
- S := .s # GNU assembler sources
- P := .cpp # C++ sources
-
-# File prefix/suffix definitions. The following prefixes are defined, and are
-# used primarily to abstract between the Unix style libXX.a naming convention
-# and the DOS/Windows/OS2 naming convention of XX.lib.
- LP := lib # LP - Library file prefix (name of file on disk)
- LL := -l # Library link prefix (name of library on link command line)
- LE := # Library link suffix (extension of library on link command line)
-
-# We use the Unix shell at all times
- SHELL := /bin/sh
- SHELLFLAGS := -c
-
-# Definition of $(MAKE) macro for recursive makes.
- MAKE = $(MAKECMD) $(MFLAGS)
-
-# Macro to install a library file
- INSTALL := cp
-
-# DMAKE uses this recipe to remove intermediate targets
-.REMOVE :; $(RM) -f $<
-
-# Turn warnings back to previous setting.
-.SILENT := $(__.SILENT)
-
-# We dont use TABS in our makefiles
-.NOTABS := yes
-
-# Define that we are compiling for QNX
- USE_QNX := 1
-
-# Default commands for compiling, assembling linking and archiving.
- CC := qcc
- CFLAGS := -Vgcc_ntox86 -I. -Iinclude $(INCLUDE)
- CPPFLAGS := -Vgcc_ntox86 -I. -Iinclude $(INCLUDE)
- CXX := QCC
- AS := nasm
- ASFLAGS := -t -f elf -d__FLAT__ -d__GNUC__ -dSTDCALL_MANGLE -iinclude -i$(SCITECH)/include -d__NOU__
- LD := qcc
- LDFLAGS := -Vgcc_ntox86 -L. -lm
- LIB := ar
- LIBFLAGS := rc
-
-# Optionally turn on debugging information
-.IF $(DBG)
- CFLAGS += -g2
- LDFLAGS += -g2
-.ELSE
-# NASM does not support debugging information yet
- ASFLAGS +=
-.ENDIF
-
-# Optionally turn on optimisations
-.IF $(OPT_MAX)
- CFLAGS += -Ot
-.ELIF $(OPT)
- CFLAGS += -O
-.ELIF $(OPT_SIZE)
- CFLAGS += -Os
-.ENDIF
-
-# Compile flag for whether to build photon or non-photon lib
-.IF $(USE_PHOTON)
- CFLAGS += -D__PHOTON__
-.ENDIF
-
-# Compile flag for whether to build X11 or non-X11 lib
-.IF $(USE_X11)
- CFLAGS += -D__X11__
-.ENDIF
-
-# Optionally compile a beta release version of a product
-.IF $(BETA)
- CFLAGS += -DBETA
- ASFLAGS += -dBETA
-.ENDIF
-
-# Target environment dependant flags
- CFLAGS += -D__QNX__ -D__UNIX__
- ASFLAGS += -d__QNX__ -d__UNIX__
-
-# Define the base directory for library files
-
-.IF $(CHECKED)
- LIB_BASE_DIR := $(SCITECH_LIB)/lib/debug
- CFLAGS += -DCHECKED=1
-.ELSE
- LIB_BASE_DIR := $(SCITECH_LIB)/lib/release
-.ENDIF
-
-# Define where to install library files
- LIB_DEST := $(LIB_BASE_DIR)/qnxnto
- LDFLAGS += -L$(LIB_DEST)
-
-# Place to look for PMODE library files
-
-PMLIB := -lpm
-
-# Define which file contains our rules
-
- RULES_MAK := qnxnto.mk
diff --git a/board/MAI/bios_emulator/scitech/makedefs/rules/bc16.mk b/board/MAI/bios_emulator/scitech/makedefs/rules/bc16.mk
deleted file mode 100644
index 67ae9101b1..0000000000
--- a/board/MAI/bios_emulator/scitech/makedefs/rules/bc16.mk
+++ /dev/null
@@ -1,69 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Rules makefile definitions, which define the rules used to
-# build targets. We include them here at the end of the
-# makefile so the generic project makefiles can override
-# certain things with macros (such as linking C++ programs
-# differently).
-#
-#############################################################################
-
-# Take out PMLIB if we don't need to link with it
-
-.IF $(NO_PMLIB)
-PMLIB :=
-.ENDIF
-
-# Implicit generation rules for making object files
-%$O: %.c ; $(CC) @$(mktmp $(CFLAGS:s/\/\\)) -c $<
-%$O: %$P ; $(CC) @$(mktmp $(CFLAGS:s/\/\\)) -c $<
-%$O: %$A ; $(AS) @$(mktmp $(ASFLAGS:s/\/\\)) $(<:s,/,\)
-
-# Implicit rule for building resource files
-%$R: %.rc ; $(RC) $(RCFLAGS) -r $<
-
-# Implicit rule for building a DLL using a response file
-%$D: ; $(LD) $(mktmp $(LDFLAGS) -C -Twd c0dl.obj+\n$(&:s/\/\\)\n$@\n$*.map\n$(DEF_LIBS) $(EXELIBS)\n$*.def)
-
-# Implicit rule for building a library file using response file
-.IF $(BUILD_DLL)
-%$L: ;
- @$(RM) $@
- $(ILIB) $(ILIBFLAGS) $@ $?
-.ELIF $(IMPORT_DLL)
-%$L: ;
- @$(RM) $@
- $(ILIB) $(ILIBFLAGS) $@ $?
-.ELSE
-%$L: ;
- @$(RM) $@
- $(LIBR) $(LIBFLAGS) $@ @$(mktmp +$(&:t" &\n+")\n)
-.ENDIF
-
-# Implicit rule for building an executable file using response file
-.IF $(USE_WIN16)
-%$E: ; $(LD) $(mktmp $(LDFLAGS) -C -Twe $(WIN_VERSION) c0wl.obj+\n$(&:s/\/\\)\n$@\n$*.map\n$(DEF_LIBS) $(EXELIBS)\n$*.def)
-.ELSE
-%$E: ; $(LD) $(mktmp $(LDFLAGS) -Tde c0l.obj+\n$(&:s/\/\\)\n$@\n$*.map\n$(PMLIB) $(DEF_LIBS) $(EXELIBS))
-.ENDIF
diff --git a/board/MAI/bios_emulator/scitech/makedefs/rules/bc3.mk b/board/MAI/bios_emulator/scitech/makedefs/rules/bc3.mk
deleted file mode 100644
index d4d071c0d8..0000000000
--- a/board/MAI/bios_emulator/scitech/makedefs/rules/bc3.mk
+++ /dev/null
@@ -1,43 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Rules makefile definitions, which define the rules used to
-# build targets. We include them here at the end of the
-# makefile so the generic project makefiles can override
-# certain things with macros (such as linking C++ programs
-# differently).
-#
-#############################################################################
-
-# Implicit generation rules for making object files
-%$O: %.c ; $(CC) @$(mktmp $(CFLAGS)) -c $<
-%$O: %$P ; $(CC) @$(mktmp $(CFLAGS)) -c $<
-%$O: %$A ; $(AS) @$(mktmp $(ASFLAGS)) $(<:s,/,\)
-
-# Implicit rule for building a library file using response file
-%$L: ;
- @$(RM) $@
- $(LIBR) $(LIBFLAGS) $@ @$(mktmp +$(&:t" &\n+")\n)
-
-# Implicit rule for building an executable file using response file
-%$E: ; $(LD) $(mktmp $(LDFLAGS) -Tde c0l.obj+\n$(&:s/\/\\)\n$@\n$*.map\n$(DEF_LIBS) $(EXELIBS))
diff --git a/board/MAI/bios_emulator/scitech/makedefs/rules/bc32.mk b/board/MAI/bios_emulator/scitech/makedefs/rules/bc32.mk
deleted file mode 100644
index e3ce25bded..0000000000
--- a/board/MAI/bios_emulator/scitech/makedefs/rules/bc32.mk
+++ /dev/null
@@ -1,151 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Rules makefile definitions, which define the rules used to
-# build targets. We include them here at the end of the
-# makefile so the generic project makefiles can override
-# certain things with macros (such as linking C++ programs
-# differently).
-#
-#############################################################################
-
-# Take out PMLIB if we don't need to link with it
-
-.IF $(NO_PMLIB)
-PMLIB :=
-.ENDIF
-
-.IF $(USE_VXD)
-
-# Implicit rule generation to build VxD's
-
-%$O: %.c ;
- $(CC) @$(mktmp $(CFLAGS:s/\/\\)) -c $(<:s,/,\)
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diff --git a/board/MAI/bios_emulator/scitech/makedefs/rules/bcos2.mk b/board/MAI/bios_emulator/scitech/makedefs/rules/bcos2.mk
deleted file mode 100644
index f473fecf49..0000000000
--- a/board/MAI/bios_emulator/scitech/makedefs/rules/bcos2.mk
+++ /dev/null
@@ -1,70 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Rules makefile definitions, which define the rules used to
-# build targets. We include them here at the end of the
-# makefile so the generic project makefiles can override
-# certain things with macros (such as linking C++ programs
-# differently).
-#
-#############################################################################
-
-# Implicit generation rules for making object files
-%$O: %.c ; $(CC) @$(mktmp $(CFLAGS:s/\/\\)) -c $(<:s,/,\)
-%$O: %$P ; $(CC) @$(mktmp $(CFLAGS:s/\/\\)) -c $(<:s,/,\)
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-%$O: %$A ; $(AS) @$(mktmp $(ASFLAGS:s/\/\\)) $(<:s,/,\)
-.ENDIF
-
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-%$R: %.rc ; $(RC) $(RCFLAGS) -r $<
-
-# Implicit rule for building a DLL using a response file
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- @$(RM) $@
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diff --git a/board/MAI/bios_emulator/scitech/makedefs/rules/cl16.mk b/board/MAI/bios_emulator/scitech/makedefs/rules/cl16.mk
deleted file mode 100644
index 6489a3ee43..0000000000
--- a/board/MAI/bios_emulator/scitech/makedefs/rules/cl16.mk
+++ /dev/null
@@ -1,67 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Rules makefile definitions, which define the rules used to
-# build targets. We include them here at the end of the
-# makefile so the generic project makefiles can override
-# certain things with macros (such as linking C++ programs
-# differently).
-#
-#############################################################################
-
-# Take out PMLIB if we don't need to link with it
-
-.IF $(NO_PMLIB)
-PMLIB :=
-.ENDIF
-
-# Implicit generation rules for making object files
-%$O: %.c ; $(CC) /nologo $(CFLAGS) /c $<
-%$O: %$P ; $(CC) /nologo $(CFLAGS) /c $<
-%$O: %$A ; $(AS) $(ASFLAGS) $< $* NUL NUL
-
-# Implicit rule for building resource files
-%$R: %.rc ; $(RC) $(RCFLAGS) -r $<
-
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-#%$D: ; $(LD) $(LDFLAGS) /Fe$@ $& $(EXELIBS)
-%$D: ; link @default.rsp
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-%$E: ; $(LD) @$(mktmp $(LDFLAGS) /Fe$@ $(&:s/\/\\) $(EXELIBS))
-.ELSE
-%$E: ; $(LD) @$(mktmp $(LDFLAGS) /Fe$@ $(&:s/\/\\) $(PMLIB) $(EXELIBS))
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diff --git a/board/MAI/bios_emulator/scitech/makedefs/rules/cl386.mk b/board/MAI/bios_emulator/scitech/makedefs/rules/cl386.mk
deleted file mode 100644
index f50b2749e4..0000000000
--- a/board/MAI/bios_emulator/scitech/makedefs/rules/cl386.mk
+++ /dev/null
@@ -1,69 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Rules makefile definitions, which define the rules used to
-# build targets. We include them here at the end of the
-# makefile so the generic project makefiles can override
-# certain things with macros (such as linking C++ programs
-# differently).
-#
-#############################################################################
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-# Take out PMLIB if we don't need to link with it
-
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-PMLIB :=
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-
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-%$O: %.c ; $(CC) -nologo $(CFLAGS) -c $<
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-%$R: %.rc ; $(RC) $(RCFLAGS) -r $<
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-#%$D: ; $(LD) $(LDFLAGS) /Fe$@ $& $(EXELIBS)
-%$D: ; link386 @default.rsp
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-%$E: ; $(LD) @$(mktmp $(LDFLAGS) /Fe$@ $(&:s/\/\\) $(EXELIBS))
-.ELSE
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-.ENDIF
diff --git a/board/MAI/bios_emulator/scitech/makedefs/rules/dj32.mk b/board/MAI/bios_emulator/scitech/makedefs/rules/dj32.mk
deleted file mode 100644
index 9f917bbdd9..0000000000
--- a/board/MAI/bios_emulator/scitech/makedefs/rules/dj32.mk
+++ /dev/null
@@ -1,47 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Rules makefile definitions, which define the rules used to
-# build targets. We include them here at the end of the
-# makefile so the generic project makefiles can override
-# certain things with macros (such as linking C++ programs
-# differently).
-#
-#############################################################################
-
-# Take out PMLIB if we don't need to link with it
-
-.IF $(NO_PMLIB)
-PMLIB :=
-.ENDIF
-
-# Implicit generation rules for making object files
-%$O: %.c ; $(CC) @$(mktmp $(CFLAGS:s/\/\\) -c) $(<:s,/,\)
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-%$O: %$A ; $(AS) @$(mktmp -o $@ $(ASFLAGS:s/\/\\)) $(<:s,/,\)
-
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-%$L: ; $(LIB) $(LIBFLAGS) $@ @$(mktmp $(&:s/\/\\)\n)
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diff --git a/board/MAI/bios_emulator/scitech/makedefs/rules/emx.mk b/board/MAI/bios_emulator/scitech/makedefs/rules/emx.mk
deleted file mode 100644
index 26d223ad41..0000000000
--- a/board/MAI/bios_emulator/scitech/makedefs/rules/emx.mk
+++ /dev/null
@@ -1,91 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Rules makefile definitions, which define the rules used to
-# build targets. We include them here at the end of the
-# makefile so the generic project makefiles can override
-# certain things with macros (such as linking C++ programs
-# differently).
-#
-# OS/2 version for EMX/GNU C/C++.
-#
-#############################################################################
-
-# Take out PMLIB if we don't need to link with it
-
-.IF $(NO_PMLIB)
-PMLIB :=
-.ENDIF
-
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-%$O: %.c ;
-.IF $(SHOW_ARGS)
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diff --git a/board/MAI/bios_emulator/scitech/makedefs/rules/gcc_beos.mk b/board/MAI/bios_emulator/scitech/makedefs/rules/gcc_beos.mk
deleted file mode 100644
index 681b698fc2..0000000000
--- a/board/MAI/bios_emulator/scitech/makedefs/rules/gcc_beos.mk
+++ /dev/null
@@ -1,47 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Rules makefile definitions, which define the rules used to
-# build targets. We include them here at the end of the
-# makefile so the generic project makefiles can override
-# certain things with macros (such as linking C++ programs
-# differently).
-#
-#############################################################################
-
-# Take out PMLIB if we don't need to link with it
-
-.IF $(NO_PMLIB)
-PMLIB :=
-.ENDIF
-
-# Implicit generation rules for making object files from source files
-%$O: %.c ; $(CC) $(CFLAGS) -c $<
-%$O: %$P ; $(CXX) $(CFLAGS) -c $<
-%$O: %$A ; $(AS) $(ASFLAGS) $<
-
-# Implicit rule for building a library file
-%$L: ; $(LIB) $(LIBFLAGS) $@ $&
-
-# Implicit rule for building an executable file
-%$E: ; $(LD) $(LDFLAGS) -o $@ $& $(EXELIBS) $(PMLIB)
diff --git a/board/MAI/bios_emulator/scitech/makedefs/rules/gcc_freebsd.mk b/board/MAI/bios_emulator/scitech/makedefs/rules/gcc_freebsd.mk
deleted file mode 100644
index 9b4d236216..0000000000
--- a/board/MAI/bios_emulator/scitech/makedefs/rules/gcc_freebsd.mk
+++ /dev/null
@@ -1,47 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Rules makefile definitions, which define the rules used to
-# build targets. We include them here at the end of the
-# makefile so the generic project makefiles can override
-# certain things with macros (such as linking C++ programs
-# differently).
-#
-#############################################################################
-
-# Take out PMLIB if we don't need to link with it
-
-.IF $(NO_PMLIB)
-PMLIB :=
-.ENDIF
-
-# Implicit generation rules for making object files from source files
-%$O: %.c ; $(CC) $(CFLAGS) -c $<
-%$O: %$P ; $(CXX) $(CFLAGS) -c $<
-%$O: %$A ; $(AS) -o $@ $(ASFLAGS) $<
-
-# Implicit rule for building a library file
-%$L: ; $(LIB) $(LIBFLAGS) $@ $&
-
-# Implicit rule for building an executable file
-%$E: ; $(LD) $(LDFLAGS) -o $@ $& $(EXELIBS) $(PMLIB) -lm
diff --git a/board/MAI/bios_emulator/scitech/makedefs/rules/gcc_linux.mk b/board/MAI/bios_emulator/scitech/makedefs/rules/gcc_linux.mk
deleted file mode 100644
index 5f91fe53f4..0000000000
--- a/board/MAI/bios_emulator/scitech/makedefs/rules/gcc_linux.mk
+++ /dev/null
@@ -1,93 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Rules makefile definitions, which define the rules used to
-# build targets. We include them here at the end of the
-# makefile so the generic project makefiles can override
-# certain things with macros (such as linking C++ programs
-# differently).
-#
-#############################################################################
-
-# Take out PMLIB if we don't need to link with it
-
-.IF $(NO_PMLIB)
-PMLIB :=
-.ENDIF
-
-.IF $(USE_CXX_LINKER)
-LD := $(LDXX)
-.ENDIF
-
-# Implicit generation rules for making object files from source files
-%$O: %.c ;
-.IF $(SHOW_ARGS)
- $(CC) -c $(CFLAGS) $<
-.ELSE
- @$(ECHO) $(CC) $(SHOW_CFLAGS) $<
- @$(CC) -c $(CFLAGS) $<
-.ENDIF
-
-%$O: %$P ;
-.IF $(SHOW_ARGS)
- $(CXX) -c $(CFLAGS) $<
-.ELSE
- @$(ECHO) $(CXX) $(SHOW_CFLAGS) $<
- @$(CXX) -c $(CFLAGS) $<
-.ENDIF
-
-%$O: %$A ;
-.IF $(SHOW_ARGS)
- $(AS) -o $@ $(ASFLAGS) $<
-.ELSE
- @$(ECHO) $(AS) $(SHOW_ASFLAGS) $<
- @$(AS) @$(mktmp -o $@ $(ASFLAGS)) $<
-.ENDIF
-
-# Implicit rule for building a library file
-.IF $(BUILD_DLL)
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-.IF $(SHOW_ARGS)
- $(LIB) $(LIBFLAGS) -Wl,-soname,$@.$(VERSIONMAJ) -o $@ $& $(LIBS)
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- @$(ECHO) $(LIB) $@
- @$(LIB) $(LIBFLAGS) -Wl,-soname,$@.$(VERSIONMAJ) -o $@ $& $(LIBS)
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-.ELSE
-%$L: ;
-.IF $(SHOW_ARGS)
- $(LIB) $(LIBFLAGS) $@ $&
-.ELSE
- @$(ECHO) $(LIB) $@
- @$(LIB) $(LIBFLAGS) $@ $&
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-.ENDIF
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-# Implicit rule for building an executable file
-%$E: ;
-.IF $(SHOW_ARGS)
- $(LD) $(LDFLAGS) -o $@ $& $(EXELIBS) $(PMLIB) -lm
-.ELSE
- @$(ECHO) ld $@
- @$(LD) $(LDFLAGS) -o $@ $& $(EXELIBS) $(PMLIB) -lm
-.ENDIF
diff --git a/board/MAI/bios_emulator/scitech/makedefs/rules/gcc_win32.mk b/board/MAI/bios_emulator/scitech/makedefs/rules/gcc_win32.mk
deleted file mode 100644
index 485d166ac4..0000000000
--- a/board/MAI/bios_emulator/scitech/makedefs/rules/gcc_win32.mk
+++ /dev/null
@@ -1,90 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Rules makefile definitions, which define the rules used to
-# build targets. We include them here at the end of the
-# makefile so the generic project makefiles can override
-# certain things with macros (such as linking C++ programs
-# differently).
-#
-#############################################################################
-
-# Take out PMLIB if we don't need to link with it
-
-.IF $(NO_PMLIB)
-PMLIB :=
-.ENDIF
-
-.IF $(USE_CXX_LINKER)
-LD := $(LDXX)
-.ENDIF
-
-# Implicit generation rules for making object files from source files
-%$O: %.c ;
-.IF $(SHOW_ARGS)
- $(CC) -c $(CFLAGS:s/\/\\) $(<:s,/,\)
-.ELSE
- @$(ECHO) $(CC) $(SHOW_CFLAGS:s/\/\\) $(<:s,/,\)
- @$(CC) -c $(CFLAGS:s/\/\\) $(<:s,/,\)
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-
-%$O: %$P ;
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- $(CXX) -c $(CFLAGS:s/\/\\) $(<:s,/,\)
-.ELSE
- @$(ECHO) $(CXX) $(SHOW_CFLAGS:s/\/\\) $(<:s,/,\)
- @$(CXX) -c $(CFLAGS:s/\/\\) $(<:s,/,\)
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-
-%$O: %$A ;
-.IF $(SHOW_ARGS)
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- @$(ECHO) $(AS) $(SHOW_ASFLAGS:s/\/\\) $(<:s,/,\)
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-
-# Implicit rule for building resource files
-%$R: %.rc ; $(RC) $< $(RCFLAGS) -o $@
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-# Implicit rule for building a DLL
-# TODO!
-#%$D: ; +rclink $(LD) $(RC) $@ $(mktmp $(LDFLAGS) /Fe$@ $(&:t"\n"s/\/\\) $(PMLIB) $(EXELIBS) $(DEF_LIBS) $(LDENDFLAGS))
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- @$(ECHO) ld $@
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diff --git a/board/MAI/bios_emulator/scitech/makedefs/rules/hc32.mk b/board/MAI/bios_emulator/scitech/makedefs/rules/hc32.mk
deleted file mode 100644
index 011e9ab3a4..0000000000
--- a/board/MAI/bios_emulator/scitech/makedefs/rules/hc32.mk
+++ /dev/null
@@ -1,51 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Rules makefile definitions, which define the rules used to
-# build targets. We include them here at the end of the
-# makefile so the generic project makefiles can override
-# certain things with macros (such as linking C++ programs
-# differently).
-#
-#############################################################################
-
-# Take out PMLIB if we don't need to link with it
-
-.IF $(NO_PMLIB)
-PMLIB :=
-.ENDIF
-
-# Implicit generation rules for making object files
-%$O: %.c ; $(CC) $(CFLAGS) -c $<
-%$O: %$P ; $(CC) $(CFLAGS) -c $<
-.IF $(USE_NASM)
-%$O: %$A ; $(AS) @$(mktmp -o $@ $(ASFLAGS:s/\/\\)) $(<:s,/,\)
-.ELSE
-%$O: %$A ; $(AS) @$(mktmp $(ASFLAGS:s/\/\\)) $(<:s,/,\)
-.ENDIF
-
-# Implicit rule for building a library file using response file
-%$L: ; $(LIB) $(LIBFLAGS) $@ @$(mktmp,$*.rsp -R $?)
-
-# Implicit rule for building an executable file using response file
-%$E: ; $(LD) $(LDFLAGS) -o $@ @$(mktmp $(&:s/\/\\) $(PMLIB) $(EXELIBS) -ldosx32.lib)
diff --git a/board/MAI/bios_emulator/scitech/makedefs/rules/qnx4.mk b/board/MAI/bios_emulator/scitech/makedefs/rules/qnx4.mk
deleted file mode 100644
index 55dc035500..0000000000
--- a/board/MAI/bios_emulator/scitech/makedefs/rules/qnx4.mk
+++ /dev/null
@@ -1,94 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Rules makefile definitions, which define the rules used to
-# build targets. We include them here at the end of the
-# makefile so the generic project makefiles can override
-# certain things with macros (such as linking C++ programs
-# differently).
-#
-#############################################################################
-
-# Take out PMLIB if we don't need to link with it
-
-.IF $(NO_PMLIB)
-PMLIB :=
-.ENDIF
-
-# Whether to link in real VBIOS library, or just the stub library
-
-.IF $(USE_BIOS)
-VBIOSLIB := -lvbios.lib
-.ELSE
-VBIOSLIB := -lvbstubs.lib
-.END
-
-# Require special privledges for Nucleus programs (requires root access)
-
-.IF $(USE_NUCLEUS)
-LDFLAGS += -T1
-.ENDIF
-
-# Implicit generation rules for making object files from source files
-%$O: %.c ;
-.IF $(SHOW_ARGS)
- $(CC) $(CFLAGS) $<
-.ELSE
- @echo $(CC) -c $<
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-
-%$O: %$P ;
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-
-%$O: %$A ;
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- @$(AS) -o $@ $(ASFLAGS) $<
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-
-# Implicit rule for building a library file
-%$L: ;
-.IF $(SHOW_ARGS)
- $(LIB) $(LIBFLAGS) -q $@ $&
-.ELSE
- @echo $(LIB) $@
- +@$(LIB) $(LIBFLAGS) -q $@ $& > /dev/null
-.ENDIF
-
-
-# Implicit rule for building an executable file
-%$E: ;
-.IF $(SHOW_ARGS)
- $(LD) $(LDFLAGS) -o $@ $& $(EXELIBS) $(PMLIB) $(VBIOSLIB)
-.ELSE
- @echo wlink $@
- +@$(LD) $(LDFLAGS) -o $@ $& $(EXELIBS) $(PMLIB) $(VBIOSLIB) > /dev/null
-.ENDIF
diff --git a/board/MAI/bios_emulator/scitech/makedefs/rules/qnxnto.mk b/board/MAI/bios_emulator/scitech/makedefs/rules/qnxnto.mk
deleted file mode 100644
index c43ad1f642..0000000000
--- a/board/MAI/bios_emulator/scitech/makedefs/rules/qnxnto.mk
+++ /dev/null
@@ -1,55 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Rules makefile definitions, which define the rules used to
-# build targets. We include them here at the end of the
-# makefile so the generic project makefiles can override
-# certain things with macros (such as linking C++ programs
-# differently).
-#
-#############################################################################
-
-# Take out PMLIB if we don't need to link with it
-
-.IF $(NO_PMLIB)
-PMLIB :=
-.ENDIF
-
-# Whether to link in real VBIOS library, or just the stub library
-
-.IF $(USE_BIOS)
-VBIOSLIB := -lvbios
-.ELSE
-VBIOSLIB := -lvbstubs
-.END
-
-# Implicit generation rules for making object files from source files
-%$O: %.c ; $(CC) $(CFLAGS) -c $<
-%$O: %$P ; $(CXX) $(CPPFLAGS) -c $<
-%$O: %$A ; $(AS) -o $@ $(ASFLAGS) $<
-
-# Implicit rule for building a library file
-%$L: ; $(LIB) $(LIBFLAGS) $@ $&
-
-# Implicit rule for building an executable file
-%$E: ; $(LD) $(LDFLAGS) -o $@ $& $(EXELIBS) $(PMLIB) $(VBIOSLIB)
diff --git a/board/MAI/bios_emulator/scitech/makedefs/rules/sc16.mk b/board/MAI/bios_emulator/scitech/makedefs/rules/sc16.mk
deleted file mode 100644
index b33bcd86a0..0000000000
--- a/board/MAI/bios_emulator/scitech/makedefs/rules/sc16.mk
+++ /dev/null
@@ -1,63 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Rules makefile definitions, which define the rules used to
-# build targets. We include them here at the end of the
-# makefile so the generic project makefiles can override
-# certain things with macros (such as linking C++ programs
-# differently).
-#
-#############################################################################
-
-# Take out PMLIB if we don't need to link with it
-
-.IF $(NO_PMLIB)
-PMLIB :=
-.ENDIF
-
-# Implicit generation rules for making object files
-%$O: %.c ; $(CC) $(CFLAGS) -c $<
-%$O: %$P ; $(CC) $(CFLAGS) -c $<
-%$O: %$A ; $(AS) @$(mktmp $(ASFLAGS)) $(<:s,/,\)
-
-# Implicit rule for building resource files
-%$R: %.rc ; $(RC) $(RCFLAGS) -r $<
-
-# Implicit rule for building a DLL using a response file
-%$D: ; $(LD) $(LDFLAGS) @$(mktmp $(&:s/\/\\) $(EXELIBS))
-
-# Implicit rule for building a library file using response file
-.IF $(BUILD_DLL)
-%$L: ; $(ILIB) $(ILIBFLAGS) $@ $?
-.ELIF $(IMPORT_DLL)
-%$L: ; $(ILIB) $(ILIBFLAGS) $@ $?
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-%$L: ; $(LIB) $(LIBFLAGS) $@ @$(mktmp -+$(?:t" &\n-+")\n)
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-%$E: ; $(LD) $(LDFLAGS) @$(mktmp $(&:s/\/\\) $(EXELIBS))
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-%$E: ; $(LD) $(LDFLAGS) @$(mktmp $(&:s/\/\\) $(PMLIB) $(EXELIBS))
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diff --git a/board/MAI/bios_emulator/scitech/makedefs/rules/sc32.mk b/board/MAI/bios_emulator/scitech/makedefs/rules/sc32.mk
deleted file mode 100644
index 2231906d66..0000000000
--- a/board/MAI/bios_emulator/scitech/makedefs/rules/sc32.mk
+++ /dev/null
@@ -1,69 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Rules makefile definitions, which define the rules used to
-# build targets. We include them here at the end of the
-# makefile so the generic project makefiles can override
-# certain things with macros (such as linking C++ programs
-# differently).
-#
-#############################################################################
-
-# Take out PMLIB if we don't need to link with it
-
-.IF $(NO_PMLIB)
-PMLIB :=
-.ENDIF
-
-# Implicit generation rules for making object files
-%$O: %.c ; $(CC) $(CFLAGS) -c $<
-%$O: %$P ; $(CC) $(CFLAGS) -c $<
-.IF $(USE_NASM)
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-%$O: %$A ; $(AS) @$(mktmp $(ASFLAGS:s/\/\\)) $(<:s,/,\)
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-
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-%$R: %.rc ; $(RC) $(RCFLAGS) -r $<
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-%$L: ; $(ILIB) $(ILIBFLAGS) $@ $?
-.ELIF $(IMPORT_DLL)
-%$L: ; $(ILIB) $(ILIBFLAGS) $@ $?
-.ELSE
-%$L: ; $(LIB) $(LIBFLAGS) $@ @$(mktmp -+$(?:t" &\n-+")\n)
-.ENDIF
-
-# Implicit rule for building an executable file using response file
-.IF $(USE_TNT)
-%$E: ; $(LD) $(LDFLAGS) @$(mktmp,$*.lnk $(&:s/\/\\) $(PMLIB) $(EXELIBS))
-.ELIF $(USE_WIN32)
-%$E: ; $(LD) $(LDFLAGS) @$(mktmp,$*.lnk $(&:s/\/\\) $(EXELIBS) kernel32.lib user32.lib gdi32.lib winmm.lib comdlg32.lib advapi32.lib)
-.ELSE
-%$E: ; $(LD) $(LDFLAGS) @$(mktmp,$*.lnk $(&:s/\/\\) $(PMLIB) $(EXELIBS))
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diff --git a/board/MAI/bios_emulator/scitech/makedefs/rules/va32.mk b/board/MAI/bios_emulator/scitech/makedefs/rules/va32.mk
deleted file mode 100644
index 1a20319cba..0000000000
--- a/board/MAI/bios_emulator/scitech/makedefs/rules/va32.mk
+++ /dev/null
@@ -1,82 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Rules makefile definitions, which define the rules used to
-# build targets. We include them here at the end of the
-# makefile so the generic project makefiles can override
-# certain things with macros (such as linking C++ programs
-# differently).
-#
-#############################################################################
-
-# Take out PMLIB if we don't need to link with it
-
-.IF $(NO_PMLIB)
-PMLIB :=
-.ENDIF
-
-# Implicit generation rules for making object files
-%$O: %.c ; $(CC) -c @$(mktmp $(CFLAGS:s/\/\\)) $(<:s,/,\)
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-.ELSE
-%$O: %$A ; $(AS) @$(mktmp $(ASFLAGS:s/\/\\)) $(<:s,/,\)
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-
-# Implicit rule for building resource files
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-# Implicit rule for building a library file using response file
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-.IF $(USE_OS2GUI)
-%$E: ;
- rclink $(LD) $(RC) $@ $(mktmp $(LDFLAGS) $(&:t"+\n":s/\/\\)\n$@\n$*.map\n$(EXELIBS) $(PMLIB)\n$*.def\n)
-.IF $(LXLITE)
- lxlite $@
-.ENDIF
-.ELSE
-%$E: ;
- rclink $(LD) $(RC) $@ $(mktmp $(LDFLAGS) $(&:t"+\n":s/\/\\)\n$@\n$*.map\n$(EXELIBS) $(PMLIB)\n\n)
-.IF $(LXLITE)
- lxlite $@
-.ENDIF
-.ENDIF
diff --git a/board/MAI/bios_emulator/scitech/makedefs/rules/va365.mk b/board/MAI/bios_emulator/scitech/makedefs/rules/va365.mk
deleted file mode 100644
index 2b4180146a..0000000000
--- a/board/MAI/bios_emulator/scitech/makedefs/rules/va365.mk
+++ /dev/null
@@ -1,79 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Rules makefile definitions, which define the rules used to
-# build targets. We include them here at the end of the
-# makefile so the generic project makefiles can override
-# certain things with macros (such as linking C++ programs
-# differently).
-#
-#############################################################################
-
-# Take out PMLIB if we don't need to link with it
-
-.IF $(NO_PMLIB)
-PMLIB :=
-.ENDIF
-
-# Implicit generation rules for making object files
-%$O: %.c ; $(CC) -c @$(mktmp $(CFLAGS:s/\/\\)) $(<:s,/,\)
-%$O: %$P ; $(CPP) -c @$(mktmp $(CFLAGS:s/\/\\)) $(<:s,/,\)
-.IF $(USE_NASM)
-%$O: %$A ; $(AS) @$(mktmp -o $@ $(ASFLAGS:s/\/\\)) $(<:s,/,\)
-.ELSE
-%$O: %$A ; $(AS) @$(mktmp $(ASFLAGS:s/\/\\)) $(<:s,/,\)
-.ENDIF
-
-# Implicit rule for building resource files
-%$R: %.rc ; $(RC) $(RCFLAGS) -r $<
-
-# Implicit rule for building a DLL using a response file
-.IF $(USE_OS2GUI)
-%$D: ; rclink $(LD) $(RC) $@ $(mktmp $(LDFLAGS) $(&:t"+\n":s/\/\\)\n$@\n$*.map\n$(EXELIBS) $(PMLIB)\n$*.def\n)
-.ELSE
-%$D: ; $(LD) /nofree /nol @$(mktmp $(LDFLAGS) $(&:t"+\n":s/\/\\)\n$@\n$*.map\n$(EXELIBS) $(PMLIB)\n$*.def\n)
-.ENDIF
-
-# Implicit rule for building a library file using response file
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-%$L: ; $(ILIB) $(ILIBFLAGS) /out:$@ $?
-.ELIF $(IMPORT_DLL)
-%$L: ; $(ILIB) $(ILIBFLAGS) /out:$@ $?
-.ELSE
-%$L: ; $(LIB) $(LIBFLAGS) /nowarn:86 /out:$@ @$(mktmp $(?:t"\n":s/\/\\))
-.ENDIF
-
-# Implicit rule for building an executable file using response file
-.IF $(USE_OS2GUI)
-%$E: ;
- rclink $(LD) $(RC) $@ $(mktmp $(LDFLAGS) $(&:t"+\n":s/\/\\)\n$@\n$*.map\n$(EXELIBS) $(PMLIB)\n$*.def\n)
-.IF $(LXLITE)
- lxlite $@
-.ENDIF
-.ELSE
-%$E: ;
- rclink $(LD) $(RC) $@ $(mktmp $(LDFLAGS) $(&:t"+\n":s/\/\\)\n$@\n$*.map\n$(EXELIBS) $(PMLIB)\n\n)
-.IF $(LXLITE)
- lxlite $@
-.ENDIF
-.ENDIF
diff --git a/board/MAI/bios_emulator/scitech/makedefs/rules/vc16.mk b/board/MAI/bios_emulator/scitech/makedefs/rules/vc16.mk
deleted file mode 100644
index 6ffc270c01..0000000000
--- a/board/MAI/bios_emulator/scitech/makedefs/rules/vc16.mk
+++ /dev/null
@@ -1,70 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Rules makefile definitions, which define the rules used to
-# build targets. We include them here at the end of the
-# makefile so the generic project makefiles can override
-# certain things with macros (such as linking C++ programs
-# differently).
-#
-#############################################################################
-
-# Take out PMLIB if we don't need to link with it
-
-.IF $(NO_PMLIB)
-PMLIB :=
-.ENDIF
-
-# Implicit generation rules for making object files
-%$O: %.c ; $(CC) /nologo $(CFLAGS) /c $<
-%$O: %$P ; $(CC) /nologo $(CFLAGS) /c $<
-%$O: %$A ; $(AS) @$(mktmp $(ASFLAGS)) $(<:s,/,\)
-
-# Implicit rule for building resource files
-%$R: %.rc ; $(RC) $(RCFLAGS) -r $<
-
-# Implicit rule for building a DLL using a response file
-%$D: ; rclink $(LD) $(RC) $@ $(mktmp $(LDFLAGS) -e$@\n$(&:t"\n":s/\/\\)\n$(EXELIBS))
-
-# Implicit rule for building a library file using response file
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-%$L: ;
- @$(RM) $@
- $(ILIB) $(ILIBFLAGS) $@ $?
-.ELIF $(IMPORT_DLL)
-%$L: ;
- @$(RM) $@
- $(ILIB) $(ILIBFLAGS) $@ $?
-.ELSE
-%$L: ;
- @$(RM) $@
- $(LIB) $@ /nologo $(LIBFLAGS) @$(mktmp +$(&:t" &\n+") &\n,\n)
-.ENDIF
-
-# Implicit rule for building an executable file using response file
-.IF $(USE_WIN16)
-%$E: ; rclink $(LD) $(RC) $@ $(mktmp $(LDFLAGS) /Fe$@ $(&:s/\/\\) $(EXELIBS))
-#%$E: ; $(LD) @$(mktmp $(LDFLAGS) /Fe$@ $(&:s/\/\\) $(EXELIBS))
-.ELSE
-%$E: ; $(LD) @$(mktmp $(LDFLAGS) /Fe$@ $(&:s/\/\\) $(PMLIB) $(EXELIBS))
-.ENDIF
diff --git a/board/MAI/bios_emulator/scitech/makedefs/rules/vc32.mk b/board/MAI/bios_emulator/scitech/makedefs/rules/vc32.mk
deleted file mode 100644
index 97f1a0c162..0000000000
--- a/board/MAI/bios_emulator/scitech/makedefs/rules/vc32.mk
+++ /dev/null
@@ -1,122 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Rules makefile definitions, which define the rules used to
-# build targets. We include them here at the end of the
-# makefile so the generic project makefiles can override
-# certain things with macros (such as linking C++ programs
-# differently).
-#
-#############################################################################
-
-# Turn on pre-compiled headers as neccessary
-.IF $(PRECOMP_HDR)
- CFLAGS += -YX"$(PRECOMP_HDR)"
-.ENDIF
-
-# Turn on runtime type information as necessary
-.IF $(USE_RTTI)
- CFLAGS += /GR
-.ENDIF
-
-# Turn on C++ exception handling as necessary
-.IF $(USE_CPPEXCEPT)
- CFLAGS += /GX
-.ENDIF
-
-# Take out PMLIB if we don't need to link with it
-
-.IF $(NO_PMLIB)
-PMLIB :=
-.ENDIF
-
-# Implicit generation rules for making object files
-%$O: %.c ; $(CC) /nologo @$(mktmp $(CFLAGS:s/\/\\)) /c $(<:s,/,\)
-%$O: %$P ; $(CC) /nologo @$(mktmp $(CFLAGS:s/\/\\)) /c $(<:s,/,\)
-.IF $(USE_NASM)
-%$O: %$A ; $(AS) @$(mktmp -o $@ $(ASFLAGS:s/\/\\)) $(<:s,/,\)
-.ELSE
-%$O: %$A ; $(AS) @$(mktmp $(ASFLAGS:s/\/\\)) $(<:s,/,\)
-.ENDIF
-
-# Implicit rule for building resource files
-%$R: %.rc ; $(RC) $(RCFLAGS) -r $<
-
-# Implicit rules for building NT device drivers
-
-%.sys: ;
- $(LD) /nologo @$(mktmp $(LDFLAGS) /Fe$@ $(&:t"\n"s/\/\\) $(PMLIB) $(EXELIBS) $(DEF_LIBS) $(LDENDFLAGS))
-.IF $(DBG)
-.IF $(USE_SOFTICE)
- $(NMSYM) $(NMSYMFLAGS);$(SI_SOURCE) $@
-.ENDIF
-.ENDIF
-
-# Implicit rule for building a DLL using a response file
-.IF $(IMPORT_DLL)
-.ELSE
-.IF $(NO_RUNTIME)
-%$D: ; $(LD) /nologo @$(mktmp $(LDFLAGS) /Fe$@ $(&:t"\n"s/\/\\) $(EXELIBS) $(DEF_LIBS) $(LDENDFLAGS))
-.ELSE
-%$D: ;
- makedef -v $*
- $(LD) /nologo @$(mktmp $(LDFLAGS) /Fe$@ $(&:t"\n"s/\/\\) $(PMLIB) $(EXELIBS) $(DEF_LIBS) $(LDENDFLAGS))
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- $(NMSYM) $(NMSYMFLAGS);$(SI_SOURCE) $@
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-.ENDIF
-.ENDIF
-.ENDIF
-
-# Implicit rule for building a library file using response file. Note that
-# we use a special .VCD file that contains the EXPORT definitions for the
-# Microsoft compiler, since the LIB utility automatically adds leading
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-%$L: ;
- @$(RM) $@
- $(LIB) $(LIBFLAGS) /out:$@ @$(mktmp $(&:t"\n")\n)
-.ENDIF
-
-# Implicit rule for building an executable file using response file
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-%$E: ;
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-%$E: ;
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-.IF $(DOSSTYLE)
- @markphar $@
-.ENDIF
-.ENDIF
diff --git a/board/MAI/bios_emulator/scitech/makedefs/rules/wc16.mk b/board/MAI/bios_emulator/scitech/makedefs/rules/wc16.mk
deleted file mode 100644
index d1ca9176ef..0000000000
--- a/board/MAI/bios_emulator/scitech/makedefs/rules/wc16.mk
+++ /dev/null
@@ -1,79 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Rules makefile definitions, which define the rules used to
-# build targets. We include them here at the end of the
-# makefile so the generic project makefiles can override
-# certain things with macros (such as linking C++ programs
-# differently).
-#
-#############################################################################
-
-# Take out PMLIB if we don't need to link with it
-
-.IF $(NO_PMLIB)
-PMLIB :=
-.ENDIF
-
-# Implicit generation rules for making object files
-%$O: %.c ; $(CC) @$(mktmp $(CFLAGS)) $<
-%$O: %$P ; $(CPP) @$(mktmp $(CFLAGS)) $<
-%$O: %$A ; $(AS) @$(mktmp $(ASFLAGS)) $(<:s,/,\)
-
-# Implicit rule for building resource files
-%$R: %.rc ; $(RC) $(RCFLAGS) -r $<
-
-# Implicit rule for building a library file using response file
-.IF $(BUILD_DLL)
-%$L: ;
- @$(RM) $@
- $(ILIB) $(ILIBFLAGS) $@ +$?
-.ELIF $(IMPORT_DLL)
-%$L: ;
- @$(RM) $@
- $(ILIB) $(ILIBFLAGS) $@ +$?
-.ELSE
-%$L: ;
- @$(RM) $@
- $(LIB) $(LIBFLAGS) $@ @$(mktmp,$*.rsp +$(&:t"\n+":s/\/\\)\n)
-.ENDIF
-
-# Implicit rule for building an executable file using response file
-.IF $(USE_WIN16)
-.IF $(BUILD_DLL)
-%$E: ;
- @trimlib $(mktmp $(LDFLAGS) OP quiet SYS windows_dll\nN $@\nF $(&:t",":s/\/\\)\nLIBR $(EXELIBS:t",")) $*.lnk
- rclink $(LD) $(RC) $@ $*.lnk
- @$(RM) -S $(mktmp $*.lnk)
-.ELSE
-%$E: ;
- @trimlib $(mktmp $(LDFLAGS) OP quiet SYS windows\nN $@\nF $(&:t",":s/\/\\)\nLIBR $(EXELIBS:t",")) $*.lnk
- rclink $(LD) $(RC) $@ $*.lnk
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-.ENDIF
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-%$E: ;
- @trimlib $(mktmp OP quiet\nN $@\nF $(&:t",":s/\/\\)\nLIBR $(PMLIB) $(EXELIBS:t",")) $*.lnk
- $(LD) $(LDFLAGS) @$*.lnk
- @$(RM) -S $(mktmp $*.lnk)
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diff --git a/board/MAI/bios_emulator/scitech/makedefs/rules/wc32.mk b/board/MAI/bios_emulator/scitech/makedefs/rules/wc32.mk
deleted file mode 100644
index 39b8819b2b..0000000000
--- a/board/MAI/bios_emulator/scitech/makedefs/rules/wc32.mk
+++ /dev/null
@@ -1,264 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Rules makefile definitions, which define the rules used to
-# build targets. We include them here at the end of the
-# makefile so the generic project makefiles can override
-# certain things with macros (such as linking C++ programs
-# differently).
-#
-#############################################################################
-
-# Take out PMLIB if we don't need to link with it
-
-.IF $(NO_PMLIB)
-PMLIB :=
-.ENDIF
-
-# Use a larger stack during linking if requested, or use a default stack
-# of 200k. The usual default stack provided by Watcom C++ is *way* to small
-# for real 32 bit code development. We also need a *huge* stack for OpenGL
-# software rendering also!
-.IF $(USE_QNX4)
- # Not necessary for QNX code.
-.ELSE
-.IF $(STKSIZE)
- LDFLAGS += OP STACK=$(STKSIZE)
-.ELSE
- LDFLAGS += OP STACK=204800
-.ENDIF
-.ENDIF
-
-# Turn on runtime type information as necessary
-.IF $(USE_RTTI)
- CPFLAGS += -xr
-.ENDIF
-
-# Optionally turn on pre-compiled headers
-.IF $(PRECOMP_HDR)
- CFLAGS += -fhq
-.ENDIF
-
-.IF $(USE_QNX)
-# Whether to link in real VBIOS library, or just the stub library
-.IF $(USE_BIOS)
-VBIOSLIB := vbios.lib,
-.ELSE
-VBIOSLIB := vbstubs.lib,
-.END
-# Require special privledges for Nucleus programs (requires root access)
-.IF $(USE_NUCLEUS)
-LDFLAGS += OP PRIV=1
-.ENDIF
-.ENDIF
-
-# Implicit generation rules for making object files
-.IF $(WC_LIBBASE) == WC10A
-%$O: %.c ; $(CC) $(CFLAGS) $(<:s,/,\)
-%$O: %$P ; $(CPP) $(CFLAGS) $(<:s,/,\)
-.ELSE
-%$O: %.c ; $(CC) @$(mktmp $(CFLAGS:s/\/\\)) $(<:s,/,\)
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-
-# Implit rule to compile .S assembler files. The first version
-# uses GAS directly and the second uses a pre-processor to
-# produce NASM code.
-
-.IF $(USE_GAS)
-.IF $(WC_LIBBASE) == WC11
-%$O: %$S ; $(GAS) -c @$(mktmp $(GAS_FLAGS:s/\/\\)) $(<:s,/,\)
-.ELSE
-# Black magic to build asm sources with Watcom 10.6 (requires sed)
-%$O: %$S ;
- $(GAS) -c @$(mktmp $(GAS_FLAGS:s/\/\\)) $(<:s,/,\)
- wdisasm \\ -a $(*:s,/,\).o > $(*:s,/,\).lst
- sed -e "s/\.text/_TEXT/; s/\.data/_DATA/; s/\.bss/_BSS/; s/\.386/\.586/; s/lar *ecx,cx/lar ecx,ecx/" $(*:s,/,\).lst > $(*:s,/,\).asm
- wasm \\ $(WFLAGS) -zq -fr=nul -fp3 -fo=$@ $(*:s,/,\).asm
- $(RM) -S $(mktmp $(*:s,/,\).o)
- $(RM) -S $(mktmp $(*:s,/,\).lst)
- $(RM) -S $(mktmp $(*:s,/,\).asm)
-.ENDIF
-.ELSE
-%$O: %$S ;
- @gcpp -DNASM_ASSEMBLER -D__WATCOMC__ -EP $(<:s,/,\) > $(*:s,/,\).asm
- nasm @$(mktmp -f obj -o $@) $(*:s,/,\).asm
- @$(RM) -S $(mktmp $(*:s,/,\).asm)
-.ENDIF
-
-# Special target to build dllstart.asm using Borland TASM
-dllstart.obj: dllstart.asm
- $(DLL_TASM) @$(mktmp /t /mx /m /D__FLAT__ /i$(SCITECH)\INCLUDE /q) $(PRIVATE)\src\common\dllstart.asm
-
-# Implicit rule for building resource files
-%$R: %.rc ; $(RC) $(RCFLAGS) -r $<
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-# Implicit rule for building a DLL using a response file
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- @$(RM) -S $(mktmp *.lnk)
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-.IF $(WIN32_GUI)
-%$E: ;
- @trimlib $(mktmp $(LDFLAGS) OP quiet SYS win95\nN $@\nF $(&:t",":s/\/\\)\nLIBR $(PMLIB)$(DEFLIBS)$(EXELIBS:t",")) $*.lnk
- rclink $(LD) $(RC) $@ $*.lnk
-.IF $(LEAVE_LINKFILE)
-.ELSE
- @$(RM) -S $(mktmp *.lnk)
-.ENDIF
-.ELSE
-%$E: ;
- @trimlib $(mktmp $(LDFLAGS) OP quiet SYS nt\nN $@\nF $(&:t",":s/\/\\)\nLIBR $(PMLIB)$(DEFLIBS)$(EXELIBS:t",")) $*.lnk
- rclink $(LD) $(RC) $@ $*.lnk
-.IF $(LEAVE_LINKFILE)
-.ELSE
- @$(RM) -S $(mktmp *.lnk)
-.ENDIF
-.ENDIF
-.ELIF $(USE_WIN386)
-%$E: ;
- @trimlib $(mktmp $(LDFLAGS) OP quiet SYS win386\nN $*.rex\nF $(&:t",":s/\/\\)\nLIBR $(PMLIB)$(EXELIBS:t",")) $*.lnk
- rclink $(LD) wbind $*.rex $*.lnk
-.IF $(LEAVE_LINKFILE)
-.ELSE
- @$(RM) -S $(mktmp *.lnk)
-.ENDIF
-.ELIF $(USE_TNT)
-%$E: ;
- @trimlib $(mktmp $(LDFLAGS) OP quiet\nN $@\nF $(&:t",":s/\/\\)\nLIBR dosx32.lib,tntapi.lib,$(PMLIB)$(EXELIBS:t",")) $*.lnk
- $(LD) @$*.lnk
-.IF $(LEAVE_LINKFILE)
-.ELSE
- @$(RM) -S $(mktmp *.lnk)
-.ENDIF
-.IF $(DOSSTYLE)
- @markphar $@
-.ENDIF
-.ELIF $(USE_QNX4)
-%$E: ;
- @trimlib $(mktmp $(LDFLAGS) OP quiet\nN $@\nF $(&:t",":s/\/\\)\nLIBR $(PMLIB)$(VBIOSLIB)$(EXELIBS:t",")) $*.lnk
- @+if exist $*.exe attrib -s $*.exe > NUL
- $(LD) @$*.lnk
- @attrib +s $*.exe
-.IF $(LEAVE_LINKFILE)
-.ELSE
- @$(RM) -S $(mktmp *.lnk)
-.ENDIF
-.ELSE
-%$E: ;
- @trimlib $(mktmp $(LDFLAGS) OP quiet\nN $@\nF $(&:t",":s/\/\\)\nLIBR $(PMLIB)$(EXELIBS:t",")) $*.lnk
- $(LD) @$*.lnk
-.IF $(LEAVE_LINKFILE)
-.ELSE
- @$(RM) -S $(mktmp *.lnk)
-.ENDIF
-.ENDIF
diff --git a/board/MAI/bios_emulator/scitech/makedefs/sc16.mk b/board/MAI/bios_emulator/scitech/makedefs/sc16.mk
deleted file mode 100644
index 099ad45527..0000000000
--- a/board/MAI/bios_emulator/scitech/makedefs/sc16.mk
+++ /dev/null
@@ -1,128 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Generic DMAKE startup makefile definitions file. Assumes
-# that the SCITECH environment variable has been set to point
-# to where all our stuff is installed. You should not need
-# to change anything in this file.
-#
-# Symantec C++ 6.x/7.x 16 bit version. Supports 16 bit DOS
-# and 16 bit Windows development.
-#
-#############################################################################
-
-# Include standard startup script definitions
-.IMPORT: SCITECH
-.INCLUDE: "$(SCITECH)\makedefs\startup.mk"
-
-# Import enivornment variables that we use
-.IMPORT .IGNORE : SC_LIBBASE
-
-# Default commands for compiling, assembling linking and archiving
- CC := sc # C-compiler and flags
- CFLAGS := -ml -Jm
-.IF $(USE_TASM32)
- AS := tasm32
-.ELIF $(USE_TASMX)
- AS := tasmx # Assembler and flags
-.ELSE
- AS := tasm # Assembler and flags
-.ENDIF
- ASFLAGS := /t /mx /m /D__COMM__ /iINCLUDE /i$(SCITECH)\INCLUDE
- LD := sc # Loader and flags
- LDFLAGS = $(CFLAGS)
- RC := rcc # WIndows resource compiler
- RCFLAGS := # Mark as Win32 compatible resources
- LIB := lib # Librarian
- LIBFLAGS := /N /B
- ILIB := implib # Import librarian
- ILIBFLAGS :=
-
-# Optionally turn on debugging information
-.IF $(DBG)
- CFLAGS += -g # Turn on debugging for C compiler
-.ELSE
- ASFLAGS += /q # Suppress object records not needed for linking
-.END
-
-# Optionally turn on optimisations
-.IF $(OPT)
- CFLAGS += -5 -o+all
-.ELIF $(OPT_SIZE)
- CFLAGS += -5 -o+space
-.END
-
-# Optionally turn on direct i387 FPU instructions
-
-.IF $(FPU)
- CFLAGS += -ff -DFPU387
- ASFLAGS += -DFPU387 -DFPU_REG_RTN
-.END
-
-# Optionally compile a beta release version of a product
-.IF $(BETA)
- CFLAGS += -DBETA
- ASFLAGS += -DBETA
-.END
-
-# User a larger stack if requested
-
-.IF $(STKSIZE)
- LDFLAGS += =$(STKSIZE)
-.ENDIF
-
-# Optionally compile for 16 bit Windows
-.IF $(USE_WIN16)
-.IF $(BUILD_DLL)
- CFLAGS += -WD -DBUILD_DLL
- ASFLAGS += -DBUILD_DLL
-.ELSE
- CFLAGS += -WA
-.ENDIF
- DX_ASFLAGS += -D__WINDOWS16__
- LIB_OS = WIN16
-.ELSE
- USE_REALDOS := 1
- LIB_OS = DOS16
-.END
-
-# Place to look for PMODE library files
-
-PMLIB := pm.lib
-
-# Define the base directory for library files
-
-.IF $(CHECKED)
-LIB_BASE_DIR := $(SCITECH_LIB)\lib\debug
-CFLAGS += -DCHECKED=1
-.ELSE
-LIB_BASE_DIR := $(SCITECH_LIB)\lib\release
-.ENDIF
-
-# Define where to install library files
- LIB_BASE := $(LIB_BASE_DIR)\$(LIB_OS)\$(SC_LIBBASE)
- LIB_DEST := $(LIB_BASE)
-
-# Define which file contains our rules
-
- RULES_MAK := sc16.mk
diff --git a/board/MAI/bios_emulator/scitech/makedefs/sc32.mk b/board/MAI/bios_emulator/scitech/makedefs/sc32.mk
deleted file mode 100644
index 9ca757088a..0000000000
--- a/board/MAI/bios_emulator/scitech/makedefs/sc32.mk
+++ /dev/null
@@ -1,178 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Generic DMAKE startup makefile definitions file. Assumes
-# that the SCITECH environment variable has been set to point
-# to where all our stuff is installed. You should not need
-# to change anything in this file.
-#
-# Symantec C++ 6.x/7.x 32 bit version. Supports the DOSX
-# extender, FlashTek X32 and Phar Lap's TNT DOS Extender
-# and 32 bit Windows development.
-#
-#############################################################################
-
-# Include standard startup script definitions
-.IMPORT: SCITECH
-.INCLUDE: "$(SCITECH)\makedefs\startup.mk"
-
-# Import enivornment variables that we use
-.IMPORT .IGNORE : USE_TNT USE_X32 USE_X32VM SC_LIBBASE
-
-# We are compiling for a 32 bit envionment
- _32BIT_ := 1
-
-# Default commands for compiling, assembling linking and archiving
- CC := sc # C-compiler and flags
- CFLAGS := -Jm
-.IF $(USE_TASM32)
- AS := tasm32
-.ELIF $(USE_TASMX)
- AS := tasmx # Assembler and flags
-.ELSE
- AS := tasm # Assembler and flags
-.ENDIF
-.IF $(USE_WIN32)
- ASFLAGS := /t /mx /m /D__FLAT__ /iINCLUDE /i$(SCITECH)\INCLUDE
-.ELSE
- ASFLAGS := /t /mx /m /DES_NOT_DS /D__COMM__ /i$(SCITECH)\INCLUDE
-.ENDIF
- LD := sc # Loader and flags
- LD_FLAGS =
- RC := rcc # WIndows resource compiler
- RCFLAGS := -32 # Mark as Win32 compatible resources
- LIB := lib # Librarian
- LIBFLAGS := /N /B
- ILIB := implib # Import librarian
- ILIBFLAGS :=
-
-# Optionally turn on debugging information
-.IF $(DBG)
- CFLAGS += -g # Turn on debugging for C compiler (FlashView)
-.IF $(USE_TNT)
- LDFLAGS += -fullsym # Turn on debugging for TNT 386link linker
-.END
-.IF $(USE_X32) or $(USE_X32VM)
- LDFLAGS += -L/map # Turn on debugging for FlashView debugger
-.END
-.ELSE
- ASFLAGS += /q # Suppress object records not needed for linking
-.END
-
-# Optionally turn on optimisations
-.IF $(OPT)
- CFLAGS += -5 -o+all
-.ELIF $(OPT_SIZE)
- CFLAGS += -5 -o+space
-.END
-
-# Optionally turn on direct i387 FPU instructions
-
-.IF $(FPU)
- CFLAGS += -ff -DFPU387
- ASFLAGS += -DFPU387 -DFPU_REG_RTN
-.END
-
-# Optionally compile a beta release version of a product
-.IF $(BETA)
- CFLAGS += -DBETA
- ASFLAGS += -DBETA
-.END
-
-# User a larger stack if requested
-
-.IF $(STKSIZE)
- LDFLAGS += =$(STKSIZE)
-.ENDIF
-
-.IF $(USE_TNT) # Use Phar Lap's TNT DOS Extender
- CFLAGS += -mp
- DX_CFLAGS += -DTNT
- ASFLAGS += /D__FLAT__
- DX_ASFLAGS += -DTNT
- LD := 386link
- LDFLAGS += @sc32.dos -exe $@
- LIB_OS = DOS32
-.ELIF $(USE_X32VM) # Use FlashTek X-32VM DOS extender
- CFLAGS += -mx
- DX_CFLAGS += -DX32VM
- ASFLAGS += /D__X386__
- DX_ASFLAGS += -DX32VM
- LD := sc
- LDFLAGS += $(CFLAGS) x32v.lib
- LIB_OS = DOS32
-.ELIF $(USE_X32) # Use FlashTek X-32 DOS extender
- CFLAGS += -mx
- DX_CFLAGS += -DX32VM
- ASFLAGS += /D__X386__
- DX_ASFLAGS += -DX32VM
- LD := sc
- LDFLAGS += $(CFLAGS) x32.lib
- LIB_OS = DOS32
-.ELIF $(USE_WIN32) # Build 32 bit Windows NT app
-.IF $(BUILD_DLL)
- CFLAGS += -WD -mn
- ASFLAGS += -DBUILD_DLL
-.ELSE
- CFLAGS += -WA -mn
-.ENDIF
- DX_ASFLAGS += -D__WINDOWS32__
- LIB_OS = WIN32
-.ELSE # Use default Symantec DOSX extender
- USE_DOSX := 1
- USE_REALDOS := 1
- CFLAGS += -mx
- DX_CFLAGS += -DDOSX
- ASFLAGS += /D__X386__
- DX_ASFLAGS += -DDOSX
- LD := sc
- LDFLAGS += $(CFLAGS)
- LIB_OS = DOS32
-.END
-
-# Place to look for PMODE library files
-
-.IF $(USE_TNT)
-PMLIB := tnt\pm.lib
-.ELIF $(USE_X32)
-PMLIB := x32\pm.lib
-.ELSE
-PMLIB := dosx\pm.lib
-.END
-
-# Define the base directory for library files
-
-.IF $(CHECKED)
-LIB_BASE_DIR := $(SCITECH_LIB)\lib\debug
-CFLAGS += -DCHECKED=1
-.ELSE
-LIB_BASE_DIR := $(SCITECH_LIB)\lib\release
-.ENDIF
-
-# Define where to install library files
- LIB_BASE := $(LIB_BASE_DIR)\$(LIB_OS)\$(SC_LIBBASE)
- LIB_DEST := $(LIB_BASE)
-
-# Define which file contains our rules
-
- RULES_MAK := sc32.mk
diff --git a/board/MAI/bios_emulator/scitech/makedefs/startup.mk b/board/MAI/bios_emulator/scitech/makedefs/startup.mk
deleted file mode 100644
index d8b2ba2b9b..0000000000
--- a/board/MAI/bios_emulator/scitech/makedefs/startup.mk
+++ /dev/null
@@ -1,161 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Generic DMAKE startup makefile definitions file. Assumes
-# that the SCITECH environment variable has been set to point
-# to where all our stuff is installed. You should not need
-# to change anything in this file.
-#
-# Common startup script that defines all variables common to
-# all startup scripts. These define the DMAKE runtime
-# environment and the values are dependant on the version of
-# DMAKE in use.
-#
-#############################################################################
-
-# Disable warnings for macros redefined here that were given
-# on the command line.
-__.SILENT := $(.SILENT)
-.SILENT := yes
-
-# Import enivornment variables that we use common to all compilers
-.IMPORT .IGNORE : TEMP SHELL COMSPEC INCLUDE LIB SCITECH PRIVATE SCITECH_LIB
-.IMPORT .IGNORE : DBG OPT OPT_SIZE SHW BETA USE_WIN32 FPU BUILD_DLL BUILD_FOR_DLL
-.IMPORT .IGNORE : IMPORT_DLL USE_TASMX WIN32_GUI USE_WIN16 USE_NASM CHECKED
-.IMPORT .IGNORE : OS2_SHELL SOFTICE_PATH MAX_WARN USE_SOFTICE USE_TASM32
-.IMPORT .IGNORE : DLL_START_TASM USE_SNAP USE_X11 USE_LINUX STATIC_LIBS LIBC
-.IMPORT .IGNORE : SHOW_ARGS BOOT_STRAP_DMAKE
- TMPDIR := $(TEMP)
-
-# Determine if the host machine is a Windows/DOS or Unix box
-.IF $(COMSPEC)
- WIN32_HOST := 1
-.ELSE
- USE_NASM := 1
- UNIX_HOST := 1
-.ENDIF
-
-# Setup to either user NASM or TASM as the assembler
-.IF $(USE_NASM)
-.ELSE
- USE_TASM := 1
-.ENDIF
-
-.IF $(UNIX_HOST)
-# Standard file suffix definitions
-#
-# NOTE: Linux/Unix does not require any extenion for executeable files, but you
-# can use an extension if you wish. We use the .exe extension for building
-# executeable files so that we can use implicit rules to make the
-# makefiles simpler and more portable between systems (exe also makes it
-# easier for cross-compile/debugging situations). When you install
-# the files to a local bin directory, you will probably want to remove
-# the .exe extension.
- L := .a # Libraries
- E := .exe # Executables for glibc
- O := .o # Objects
- A := .asm # Assembler sources
- S := .s # GNU assembler sources
- P := .cpp # C++ sources
-
-# File prefix/suffix definitions. The following prefixes are defined, and are
-# used primarily to abstract between the Unix style libXX.a naming convention
-# and the DOS/Windows/OS2 naming convention of XX.lib.
- LP := lib # LP - Library file prefix (name of file on disk)
- LL := -l # Library link prefix (name of library on link command line)
- LE := # Library link suffix (extension of library on link command line)
-
-# We use the Unix shell at all times
- SHELL := /bin/sh
- SHELLFLAGS := -c
-
-.ELSE
-# Standard file DOS/Win/OS2 suffix definitions
- L := .lib # Libraries
-.IF $(USE_SNAP)
- E := .sxe # Snap Executables
- D := .sll # Snap Dynamic Link Library file
-.ELSE
- E := .exe # Executables
- D := .dll # Dynamic Link Library file
-.ENDIF
- O := .obj # Objects
- A := .asm # Assembler sources
- P := .cpp # C++ sources
- R := .res # Compiled resource file
- S := .s # Assyntax.h style assembler
-
-# File prefix/suffix definitions. The following prefixes are defined, and are
-# used primarily to abstract between the Unix style libXX.a naming convention
-# and the DOS/Windows/OS2 naming convention of XX.lib.
- LP := # LP - Library file prefix (name of file on disk)
- LL := # Library link prefix (name of library on link command line)
- LE := .lib # Library link suffix (extension of library on link command line)
-
-# We use the DOS/Win/OS2 style shell at all times
- SHELL := $(COMSPEC)
- GROUPSHELL := $(SHELL)
- SHELLFLAGS := $(SWITCHAR)c
- GROUPFLAGS := $(SHELLFLAGS)
- SHELLMETAS := *"?<>
-.IF $(OS2_SHELL)
- GROUPSUFFIX := .cmd
-.ELSE
- GROUPSUFFIX := .bat
-.ENDIF
- DIRSEPSTR := \\
- DIVFILE = $(TMPFILE:s,/,\)
-
-.ENDIF
-
-# Standard Unix style shell commands. Since these do not exist on
-# regular DOS/Win/OS2 installations we use our own '' versions
-# instead. To boostrtap a new OS you may wish to use the regular
-# unix versions.
-
-.IF $(BOOT_STRAP_DMAKE)
- CP := cp
- MD := mkdir
- RM := rm
- ECHO := echo
-.ELSE
- CP := k_cp
- MD := k_md
- RM := k_rm
- ECHO := k_echo
-.ENDIF
-
-# Definition of $(MAKE) macro for recursive makes.
- MAKE = $(MAKECMD) $(MFLAGS)
-
-# Macro to install a library file
- INSTALL := $(CP)
-
-# DMAKE uses this recipe to remove intermediate targets
-.REMOVE :; $(RM) -f $<
-
-# Turn warnings back to previous setting.
-.SILENT := $(__.SILENT)
-
-# We dont use TABS in our makefiles
-.NOTABS := yes
diff --git a/board/MAI/bios_emulator/scitech/makedefs/va32.mk b/board/MAI/bios_emulator/scitech/makedefs/va32.mk
deleted file mode 100644
index fbca523922..0000000000
--- a/board/MAI/bios_emulator/scitech/makedefs/va32.mk
+++ /dev/null
@@ -1,163 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Generic DMAKE startup makefile definitions file. Assumes
-# that the SCITECH environment variable has been set to point
-# to where all our stuff is installed. You should not need
-# to change anything in this file.
-#
-# IBM VisualAge C++ 3.0 OS/2 32-bit version.
-#
-#############################################################################
-
-# Include standard startup script definitions
-.IMPORT: SCITECH
-.INCLUDE: "$(SCITECH)\makedefs\startup.mk"
-
-# Import enivornment variables that we use
-.IMPORT .IGNORE : VA_LIBBASE USE_OS232 USE_OS2GUI FULLSCREEN NOOPT MAX_WARN
-
-# We are compiling for a 32 bit envionment
- _32BIT_ := 1
-
-# Default commands for compiling, assembling linking and archiving
- CC := icc
- CPP := icc
- CFLAGS := /Q /G5 /Gl+ /Fi /Si /J- /Ss+ /Sp1 /Gm+ /I.
-.IF $(USE_NASM)
- AS := nasm
- ASFLAGS := -t -f obj -F null -d__FLAT__ -dSTDCALL_MANGLE -d__NOU_VAR__ -iINCLUDE -i$(SCITECH)\INCLUDE
-.ELSE
-.IF $(USE_TASM32)
- AS := tasm32
-.ELIF $(USE_TASMX)
- AS := tasmx
-.ELSE
- AS := tasm
-.ENDIF
- ASFLAGS := /t /mx /m /D__FLAT__ /DSTDCALL_MANGLE /D__NOU_VAR__ /iINCLUDE /i$(SCITECH)\INCLUDE
-.ENDIF
- LD := ilink
- LDFLAGS = /noi /exepack:2 /packcode /packdata /align:32 /map /noe
- RC := rc
- RCFLAGS := -n -x2
- LIB := ilib
- LIBFLAGS := /nologo
- ILIB := implib
- ILIBFLAGS := /nologo
- IPFC := ipfc
- IPFCFLAGS :=
- IBMCOBJ := 1
-
-# Set the compiler warning level
-.IF $(MAX_WARN)
- CFLAGS += /W3
-.ELSE
- CFLAGS += /W1
-.ENDIF
-
-# Optionally turn on debugging information
-.IF $(DBG)
- CFLAGS += /Ti
- LDFLAGS += /DE
-.ELSE
-.IF $(USE_TASM)
- ASFLAGS += /q
-.ENDIF
-.END
-
-# Optionally turn on optimisations
-.IF $(OPT)
- CFLAGS += /Gfi /O /Oi
-.ELIF $(OPT_SIZE)
- CFLAGS += /Gfi /O /Oc
-.ELIF $(NOOPT)
- CFLAGS += /O-
-.END
-
-# Optionally turn on direct i387 FPU instructions optimised for Pentium
-.IF $(FPU)
- CFLAGS += -DFPU387
- ASFLAGS += -dFPU387
-.END
-
-# Optionally compile a beta release version of a product
-.IF $(BETA)
- CFLAGS += -DBETA
- ASFLAGS += -dBETA
-.END
-
-# Build 32-bit OS/2 apps
-.IF $(BUILD_DLL)
- CFLAGS += /Ge- /DBUILD_DLL
- LDFLAGS += /DLL /NOE
- ASFLAGS += -dBUILD_DLL
-.ELSE
-.IF $(USE_OS2GUI)
- CFLAGS += -D__OS2_PM__
- LDFLAGS += /PMTYPE:PM
-.ELSE
-.IF $(FULLSCREEN)
- LDFLAGS += /PMTYPE:NOVIO
-.ELSE
- LDFLAGS += /PMTYPE:VIO
-.ENDIF
-.ENDIF
-.ENDIF
- DX_ASFLAGS += -d__OS2__
- LIB_OS = os232
-
-# Place to look for PMODE library files
-
-.IF $(USE_OS2GUI)
-.IF $(USE_SDDPMDLL)
-#Note: This is OK for now but might need to be changed if the GUI PM library
-# were really different
-PMLIB := sddpmlib.lib
-.ELSE
-PMLIB := pm_pm.lib
-.ENDIF
-.ELSE
-.IF $(USE_SDDPMDLL)
-PMLIB := sddpmlib.lib
-.ELSE
-PMLIB := pm.lib
-.ENDIF
-.ENDIF
-
-# Define the base directory for library files
-
-.IF $(CHECKED)
-LIB_BASE_DIR := $(SCITECH_LIB)\lib\debug
-CFLAGS += /DCHECKED=1
-.ELSE
-LIB_BASE_DIR := $(SCITECH_LIB)\lib\release
-.ENDIF
-
-# Define where to install library files
- LIB_BASE := $(LIB_BASE_DIR)\$(LIB_OS)\$(VA_LIBBASE)
- LIB_DEST := $(LIB_BASE)
-
-# Define which file contains our rules
-
- RULES_MAK := va32.mk
diff --git a/board/MAI/bios_emulator/scitech/makedefs/va365.mk b/board/MAI/bios_emulator/scitech/makedefs/va365.mk
deleted file mode 100644
index 3a2eccbbce..0000000000
--- a/board/MAI/bios_emulator/scitech/makedefs/va365.mk
+++ /dev/null
@@ -1,151 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Generic DMAKE startup makefile definitions file. Assumes
-# that the SCITECH environment variable has been set to point
-# to where all our stuff is installed. You should not need
-# to change anything in this file.
-#
-# IBM VisualAge C++ 3.65 OS/2 32-bit version.
-#
-#############################################################################
-
-# Include standard startup script definitions
-.IMPORT: SCITECH
-.INCLUDE: "$(SCITECH)\makedefs\startup.mk"
-
-# Import enivornment variables that we use
-.IMPORT .IGNORE : VA_LIBBASE USE_OS232 USE_OS2GUI FULLSCREEN NOOPT MAX_WARN
-
-# We are compiling for a 32 bit envionment
- _32BIT_ := 1
-
-# Default commands for compiling, assembling linking and archiving
- CC := icc
- CPP := icc
- CFLAGS := /Q /G5l /Fi /Si /J- /Ss+ /Sp1 /Gm+ /I.
-.IF $(USE_NASM)
- AS := nasm
- ASFLAGS := -t -f obj -F null -d__FLAT__ -dSTDCALL_MANGLE -d__NOU_VAR__ -iINCLUDE -i$(SCITECH)\INCLUDE
-.ELSE
-.IF $(USE_TASM32)
- AS := tasm32
-.ELIF $(USE_TASMX)
- AS := tasmx
-.ELSE
- AS := tasm
-.ENDIF
- ASFLAGS := /t /mx /m /D__FLAT__ /DSTDCALL_MANGLE /D__NOU_VAR__ /iINCLUDE /i$(SCITECH)\INCLUDE
-.ENDIF
- LD := ilink
- LDFLAGS = /noi /exepack /packcode /packdata /align:32 /map /noe
- RC := rc
- RCFLAGS := /nologo
- LIB := ilib
- LIBFLAGS := /nologo
- ILIB := implib
- ILIBFLAGS := /nologo
- IBMCOBJ := 1
-
-# Set the compiler warning level
-.IF $(MAX_WARN)
- CFLAGS += /W3
-.ELSE
- CFLAGS += /W1
-.ENDIF
-
-# Optionally turn on debugging information
-.IF $(DBG)
- CFLAGS += /Ti
- LDFLAGS += /DE
-.ELSE
-.IF $(USE_TASM)
- ASFLAGS += /q
-.ENDIF
-.END
-
-# Optionally turn on optimisations
-.IF $(OPT)
- CFLAGS += /Gfi /O /Oi
-.ELIF $(OPT_SIZE)
- CFLAGS += /Gfi /O /Oc
-.ELIF $(NOOPT)
- CFLAGS += /O-
-.END
-
-# Optionally turn on direct i387 FPU instructions optimised for Pentium
-.IF $(FPU)
- CFLAGS += -DFPU387
- ASFLAGS += -dFPU387
-.END
-
-# Optionally compile a beta release version of a product
-.IF $(BETA)
- CFLAGS += -DBETA
- ASFLAGS += -dBETA
-.END
-
-# Build 32-bit OS/2 apps
-.IF $(BUILD_DLL)
- CFLAGS += /Gme- /DBUILD_DLL
- LDFLAGS += /DLL /NOE
- ASFLAGS += -dBUILD_DLL
-.ELSE
-.IF $(USE_OS2GUI)
- CFLAGS += -D__OS2_PM__
- LDFLAGS += /PMTYPE:PM
-.ELSE
-.IF $(FULLSCREEN)
- LDFLAGS += /PMTYPE:NOVIO
-.ELSE
- LDFLAGS += /PMTYPE:VIO
-.ENDIF
-.ENDIF
-.ENDIF
- DX_ASFLAGS += -d__OS2__
- LIB_OS = os232
-
-# Place to look for PMODE library files
-
-.IF $(USE_OS2GUI)
-PMLIB := pm_pm.lib
-.ELSE
-PMLIB := pm.lib
-.ENDIF
-
-# Define the base directory for library files
-
-.IF $(CHECKED)
-LIB_BASE_DIR := $(SCITECH_LIB)\lib\debug
-CFLAGS += /DCHECKED=1
-.ELSE
-LIB_BASE_DIR := $(SCITECH_LIB)\lib\release
-.ENDIF
-
-# Define where to install library files
- LIB_BASE := $(LIB_BASE_DIR)\$(LIB_OS)\$(VA_LIBBASE)
- LIB_DEST := $(LIB_BASE)
-
-# Define which file contains our rules
-
- RULES_MAK := va365.mk
diff --git a/board/MAI/bios_emulator/scitech/makedefs/vc16.mk b/board/MAI/bios_emulator/scitech/makedefs/vc16.mk
deleted file mode 100644
index 913bf9c3e4..0000000000
--- a/board/MAI/bios_emulator/scitech/makedefs/vc16.mk
+++ /dev/null
@@ -1,128 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Generic DMAKE startup makefile definitions file. Assumes
-# that the SCITECH environment variable has been set to point
-# to where all our stuff is installed. You should not need
-# to change anything in this file.
-#
-# Microsoft Visual C++ 1.x 16 bit version. Supports 16 bit
-# DOS and Windows development.
-#
-#############################################################################
-
-# Include standard startup script definitions
-.IMPORT: SCITECH
-.INCLUDE: "$(SCITECH)\makedefs\startup.mk"
-
-# Import enivornment variables that we use
-.IMPORT .IGNORE : VC_LIBBASE
-
-# Default commands for compiling, assembling linking and archiving
- CC := cl # C-compiler and flags
- CFLAGS := /YX /w /G3 /Gs
-.IF $(USE_TASM32)
- AS := tasm32
-.ELIF $(USE_TASMX)
- AS := tasmx # Assembler and flags
-.ELSE
- AS := tasm # Assembler and flags
-.ENDIF
- ASFLAGS := /t /mx /m /D__COMM__ /iINCLUDE /i$(SCITECH)\INCLUDE
- LD := cl # Loader and flags
- LDFLAGS = $(CFLAGS)
- RC := rc # WIndows resource compiler
- RCFLAGS :=
- LIB := lib # Librarian
- LIBFLAGS := /NOI /NOE
- ILIB := implib # Import librarian
- ILIBFLAGS := /noignorecase
-
-# Optionally turn on debugging information
-.IF $(DBG)
- CFLAGS += /Yd /Zi # Turn on debugging for C compiler
- ASFLAGS += /zi # Turn on debugging for assembler
-.ELSE
- ASFLAGS += /q # Suppress object records not needed for linking
-.END
-
-# Optionally turn on optimisations
-.IF $(OPT)
- CFLAGS += /Ox
-.END
-
-# Optionally turn on direct i387 FPU instructions
-
-.IF $(FPU)
- CFLAGS += /FPi87 /DFPU387
- ASFLAGS += /DFPU387 /DFPU_REG_RTN
-.END
-
-# Optionally compile a beta release version of a product
-.IF $(BETA)
- CFLAGS += /DBETA
- ASFLAGS += /DBETA
-.END
-
-# Use a larger stack during linking if requested ???? How the fuck do you
-# specify linker options on the CL command line?????
-
-.IF $(STKSIZE)
-.ENDIF
-
-# Optionally compile for 16 bit Windows
-.IF $(USE_WIN16)
-.IF $(BUILD_DLL)
- CFLAGS += /GD /Alfw /DBUILD_DLL
- ASFLAGS += -DBUILD_DLL
-.ELSE
- CFLAGS += /GA /AL
-.ENDIF
- DX_ASFLAGS += -D__WINDOWS16__
- LIB_OS = WIN16
-.ELSE
- USE_REALDOS := 1
- CFLAGS += /AL
- LIB_OS = DOS16
-.END
-
-# Place to look for PMODE library files
-
-PMLIB := pm.lib
-
-# Define the base directory for library files
-
-.IF $(CHECKED)
-LIB_BASE_DIR := $(SCITECH_LIB)\lib\debug
-CFLAGS += -DCHECKED=1
-.ELSE
-LIB_BASE_DIR := $(SCITECH_LIB)\lib\release
-.ENDIF
-
-# Define where to install library files
- LIB_BASE := $(LIB_BASE_DIR)\$(LIB_OS)\$(VC_LIBBASE)
- LIB_DEST := $(LIB_BASE)
-
-# Define which file contains our rules
-
- RULES_MAK := vc16.mk
diff --git a/board/MAI/bios_emulator/scitech/makedefs/vc32.mk b/board/MAI/bios_emulator/scitech/makedefs/vc32.mk
deleted file mode 100644
index 11c9071fb8..0000000000
--- a/board/MAI/bios_emulator/scitech/makedefs/vc32.mk
+++ /dev/null
@@ -1,226 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Generic DMAKE startup makefile definitions file. Assumes
-# that the SCITECH environment variable has been set to point
-# to where all our stuff is installed. You should not need
-# to change anything in this file.
-#
-# Microsoft Visual C++ 2.x 32 bit version. Supports Phar Lap
-# TNT DOS Extender and 32 bit Windows development.
-#
-#############################################################################
-
-# Include standard startup script definitions
-.IMPORT: SCITECH
-.INCLUDE: "$(SCITECH)\makedefs\startup.mk"
-
-# Import enivornment variables that we use
-.IMPORT .IGNORE : TNT_PATH VC_LIBBASE DOSSTYLE USE_TNT USE_RTTARGET MSVCDIR
-.IMPORT .IGNORE : USE_VXD USE_NTDRV USE_W2KDRV NT_DDKROOT USE_RTTI USE_CPPEXCEPT
-
-# We are compiling for a 32 bit envionment
- _32BIT_ := 1
-
-# Default commands for compiling, assembling linking and archiving
- CC := cl # C-compiler and flags
- CFLAGS :=
-.IF $(USE_NASM)
- AS := nasm
- ASFLAGS := -t -f win32 -F null -d__FLAT__ -dSTDCALL_MANGLE -iINCLUDE -i$(SCITECH)\INCLUDE
-.ELSE
-.IF $(USE_TASM32)
- AS := tasm32
-.ELIF $(USE_TASMX)
- AS := tasmx # Assembler and flags
-.ELSE
- AS := tasm # Assembler and flags
-.ENDIF
- ASFLAGS := /t /mx /m /D__FLAT__ /DSTDCALL_MANGLE /iINCLUDE /i$(SCITECH)\INCLUDE
-.ENDIF
- LD := cl
-.IF $(USE_WIN32)
- LDFLAGS = $(CFLAGS)
-.IF $(USE_NTDRV)
- LDENDFLAGS = -link /INCREMENTAL:NO /DRIVER /SUBSYSTEM:NATIVE,4.00 /VERSION:4.00 /MACHINE:I386 /NODEFAULTLIB /DEBUGTYPE:CV /PDB:NONE /ALIGN:0x20 /BASE:0x10000 /ENTRY:DriverEntry@8
- #/MERGE:_page=page /MERGE:_text=.text /MERGE:.rdata=.text
-.ELIF $(WIN32_GUI)
- LDENDFLAGS = -link /INCREMENTAL:NO /DEF:$(@:b).def /SUBSYSTEM:WINDOWS /MACHINE:I386 /DEBUGTYPE:CV /PDB:NONE
-.ELSE
- LDENDFLAGS = -link /INCREMENTAL:NO /SUBSYSTEM:CONSOLE /MACHINE:I386 /DEBUGTYPE:CV /PDB:NONE
-.ENDIF
-.ELSE
- LDFLAGS = $(CFLAGS)
- LDENDFLAGS := -link -stub:$(TNT_PATH:s/\/\\)\\bin\\gotnt.exe /PDB:NONE
-.ENDIF
- RC := rc # Watcom resource compiler
- RCFLAGS := # Mark as Win32 compatible resources
- LIB := lib # Librarian
- LIBFLAGS :=
- ILIB := lib # Import librarian
- ILIBFLAGS := /MACHINE:IX86
- INTEL_X86 := 1
- NMSYM := $(SOFTICE_PATH)\nmsym.exe
-.IF $(USE_NTDRV)
- NMSYMFLAGS := /TRANSLATE:source,package,always /PROMPT /SOURCE:$(MSVCDIR)\crt\src\intel;$(SCITECH)\src\pm;$(SCITECH)\src\pm\common;$(SCITECH)\src\pm\ntdrv
-.ELSE
- NMSYMFLAGS := /TRANSLATE:source,package,always /PROMPT /SOURCE:$(SCITECH)\src\pm;$(SCITECH)\src\pm\common;$(SCITECH)\src\pm\win32
-.ENDIF
-
-# Set the compiler warning level
-.IF $(MAX_WARN)
- CFLAGS += -W3
-.ELSE
- CFLAGS += -W1
-.ENDIF
-
-# Optionally turn on debugging information
-.IF $(DBG)
- CFLAGS += /Yd /Zi # Turn on debugging for C compiler
-.IF $(USE_TASM)
- ASFLAGS += /zi # Turn on debugging for assembler
-.ENDIF
-.ELSE
-.IF $(USE_TASM)
- ASFLAGS += /q # Suppress object records not needed for linking
-.ENDIF
-.END
-
-# Optionally turn on optimisations
-.IF $(VC_LIBBASE) == vc5
-.IF $(OPT)
- CFLAGS += /G6 /O2 /Ox /Oi-
-.ELIF $(OPT_SIZE)
- CFLAGS += /G6 /O1
-.END
-.ELSE
-.IF $(OPT)
- CFLAGS += /G5 /O2 /Ox
-.ELIF $(OPT_SIZE)
- CFLAGS += /G5 /O1
-.END
-.ENDIF
-
-# Optionally turn on direct i387 FPU instructions
-
-.IF $(FPU)
- CFLAGS += /DFPU387
- ASFLAGS += -dFPU387
-.END
-
-# Optionally compile a beta release version of a product
-.IF $(BETA)
- CFLAGS += /DBETA
- ASFLAGS += -dBETA
-.END
-
-# Use a larger stack during linking if requested, or use a default stack
-# of 50k. The usual default stack provided by Visual C++ is *way* to small
-# for real 32 bit code development.
-
-.IF $(USE_WIN32)
- # Not necessary for Win32 code.
-.ELSE
-.IF $(STKSIZE)
- LDENDFLAGS += /STACK:$(STKSIZE)
-.ELSE
- LDENDFLAGS += /STACK:51200
-.ENDIF
-.ENDIF
-
-# DOS extender dependant flags
-.IF $(USE_NTDRV) # Build 32 bit Windows NT driver
- CFLAGS += /LD /Zl /Gy /Gz /GF /D__NT_DRIVER__ /D_X86_=1 /Di386=1
-.IF $(DBG)
- CFLAGS += /QIf
-.ENDIF
- ASFLAGS +=
- DEF_LIBS := int64.lib ntoskrnl.lib hal.lib
- DX_ASFLAGS += -d__NT_DRIVER__
-.IF $(USE_W2KDRV) # Build 32 bit Windows 2000 driver
- LIB_OS = W2KDRV
-.ELSE
- LIB_OS = NTDRV
-.ENDIF
-.ELIF $(USE_WIN32) # Build 32 bit Windows NT app
-.IF $(WIN32_GUI)
-.ELSE
- CFLAGS += -D__CONSOLE__
-.ENDIF
-.IF $(BUILD_DLL)
- CFLAGS += /MT /LD /DBUILD_DLL
- ASFLAGS += -dBUILD_DLL
-.IF $(NO_RUNTIME)
- LDENDFLAGS += /NODEFAULTLIB
- CFLAGS += /Zl
- DEF_LIBS :=
-.ELSE
- DEF_LIBS := kernel32.lib user32.lib gdi32.lib advapi32.lib shell32.lib winmm.lib comdlg32.lib comctl32.lib ole32.lib oleaut32.lib version.lib winspool.lib uuid.lib odbc32.lib odbccp32.lib wsock32.lib rpcrt4.lib
-.ENDIF
-.ELSE
- CFLAGS += /MT
- DEF_LIBS := kernel32.lib user32.lib gdi32.lib advapi32.lib shell32.lib winmm.lib comdlg32.lib comctl32.lib ole32.lib oleaut32.lib version.lib winspool.lib uuid.lib odbc32.lib odbccp32.lib wsock32.lib rpcrt4.lib
-.ENDIF
- DX_ASFLAGS += -d__WINDOWS32__
- LIB_OS = WIN32
-.ELIF $(USE_RTTARGET)
- CFLAGS += -D__RTTARGET__
- DX_CFLAGS +=
- DX_ASFLAGS += -d__RTTARGET__
- USE_REALDOS :=
- LIB_OS = RTT32
- DEF_LIBS := cw32mt.lib
-.ELSE
- USE_TNT := 1
- USE_REALDOS := 1
- CFLAGS += /MT /D__MSDOS32__
- DX_CFLAGS += -DTNT
- DX_ASFLAGS += -dTNT
- LIB_OS = DOS32
- DEF_LIBS := dosx32.lib tntapi.lib
-.ENDIF
-
-# Define the base directory for library files
-
-.IF $(CHECKED)
-LIB_BASE_DIR := $(SCITECH_LIB)\lib\debug
-CFLAGS += /DCHECKED=1
-.ELSE
-LIB_BASE_DIR := $(SCITECH_LIB)\lib\release
-.ENDIF
-
-# Define where to install library files
- LIB_BASE := $(LIB_BASE_DIR)\$(LIB_OS)\$(VC_LIBBASE)
- LIB_DEST := $(LIB_BASE)
-
-# Place to look for PMODE library files
-
-.IF $(USE_TNT)
-PMLIB := $(LIB_BASE:s/\/\\)\\tnt\\pm.lib
-.ELSE
-PMLIB := $(LIB_BASE:s/\/\\)\\pm.lib
-.ENDIF
-
-# Define which file contains our rules
-
- RULES_MAK := vc32.mk
diff --git a/board/MAI/bios_emulator/scitech/makedefs/wc16.mk b/board/MAI/bios_emulator/scitech/makedefs/wc16.mk
deleted file mode 100644
index e316f4c760..0000000000
--- a/board/MAI/bios_emulator/scitech/makedefs/wc16.mk
+++ /dev/null
@@ -1,141 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Generic DMAKE startup makefile definitions file. Assumes
-# that the SCITECH environment variable has been set to point
-# to where all our stuff is installed. You should not need
-# to change anything in this file.
-#
-# Watcom C++ 10.x 16 bit version. Supports 16-bit DOS,
-# 16-bit Windows development and 16-bit OS/2 development.
-#
-#############################################################################
-
-# Include standard startup script definitions
-.IMPORT: SCITECH
-.INCLUDE: "$(SCITECH)\makedefs\startup.mk"
-
-# Import enivornment variables that we use
-.IMPORT .IGNORE : WC_LIBBASE USE_WIN16 USE_OS216 USE_OS2GUI
-
-# Default commands for compiling, assembling linking and archiving
- CC := wcc # C-compiler and flags
- CPP := wpp # C++-compiler and flags
- CFLAGS := -ml-zq-j-w2-s-fh -fhq
-.IF $(USE_TASM32)
- AS := tasm32
-.ELIF $(USE_TASMX)
- AS := tasmx # Assembler and flags
-.ELSE
- AS := tasm # Assembler and flags
-.ENDIF
- AS := tasm # Assembler and flags
- ASFLAGS := /t /mx /m /D__LARGE__ /iINCLUDE /i$(SCITECH)\INCLUDE
- LD := wlink # Loader and flags
- LDFLAGS =
- RC := wrc # Watcom resource compiler
- RCFLAGS := /bt=windows
- LIB := wlib # Librarian
- LIBFLAGS := -q
- ILIB := wlib # Import librarian
- ILIBFLAGS := -c
-
-# Optionally turn on debugging information
-.IF $(DBG)
- CFLAGS += -d2 # Turn on debugging for C compiler
- LIBFLAGS += -p=128 # Larger page size for libraries with debug info!
- ASFLAGS += /zi # Turn on debugging for assembler
- LDFLAGS += D A # Turn on debugging for linker
-.ELSE
- ASFLAGS += /q # Suppress object records not needed for linking
-.END
-
-# Optionally turn on optimisations
-.IF $(OPT)
- CFLAGS += -onatx-5
-.ELIF $(OPT_SIZE)
- CFLAGS += -onaslmr-5
-.END
-
-# Optionally turn on direct i387 FPU instructions optimised for Pentium
-
-.IF $(FPU)
- CFLAGS += -fpi87-fp5-DFPU387
- ASFLAGS += -DFPU387
-.END
-
-# Optionally compile a beta release version of a product
-.IF $(BETA)
- CFLAGS += -DBETA
- ASFLAGS += -DBETA
-.END
-
-# Use a larger stack during linking if requested
-
-.IF $(STKSIZE)
- LDFLAGS += OP STACK=$(STKSIZE)
-.ENDIF
-
-.IF $(USE_OS216)
-.IF $(BUILD_DLL)
- CFLAGS += -bd-bt=os2-DBUILD_DLL
- ASFLAGS += -DBUILD_DLL
-.ELSE
- CFLAGS += -bt=os2
-.ENDIF
- DX_ASFLAGS += -D__OS216__
- LIB_OS = os216
-.ELIF $(USE_WIN16)
-.IF $(BUILD_DLL)
- CFLAGS += -bd-bt=windows-D_WINDOWS-DBUILD_DLL
- ASFLAGS += -DBUILD_DLL
-.ELSE
- CFLAGS += -bt=windows-D_WINDOWS
-.ENDIF
- DX_ASFLAGS += -D__WINDOWS16__
- LIB_OS = WIN16
-.ELSE
- USE_REALDOS := 1
- LIB_OS = DOS16
-.END
-
-# Place to look for PMODE library files
-
-PMLIB := pm.lib,
-
-# Define the base directory for library files
-
-.IF $(CHECKED)
-LIB_BASE_DIR := $(SCITECH_LIB)\lib\debug
-CFLAGS += -DCHECKED=1
-.ELSE
-LIB_BASE_DIR := $(SCITECH_LIB)\lib\release
-.ENDIF
-
-# Define where to install library files
- LIB_BASE := $(LIB_BASE_DIR)\$(LIB_OS)\$(WC_LIBBASE)
- LIB_DEST := $(LIB_BASE)
-
-# Define which file contains our rules
-
- RULES_MAK := wc16.mk
diff --git a/board/MAI/bios_emulator/scitech/makedefs/wc32.mk b/board/MAI/bios_emulator/scitech/makedefs/wc32.mk
deleted file mode 100644
index e5175ca9ea..0000000000
--- a/board/MAI/bios_emulator/scitech/makedefs/wc32.mk
+++ /dev/null
@@ -1,353 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Generic DMAKE startup makefile definitions file. Assumes
-# that the SCITECH environment variable has been set to point
-# to where all our stuff is installed. You should not need
-# to change anything in this file.
-#
-# Watcom C++ 10.x 32 bit version. Supports Rational's DOS4GW
-# DOS Extender, PMODE/W, Causeway, FlashTek's X32-VM,
-# Phar Lap's TNT DOS Extender, 32-bit Windows development and
-# 32-bit OS/2 development.
-#
-#############################################################################
-
-# Include standard startup script definitions
-.IMPORT: SCITECH
-.INCLUDE: "$(SCITECH)\makedefs\startup.mk"
-
-# Import enivornment variables that we use
-.IMPORT .IGNORE : USE_TNT USE_X32 USE_X32VM USE_PMODEW STKCALL USE_CAUSEWAY
-.IMPORT .IGNORE : USE_WIN386 USE_OS232 USE_OS2GUI WC_LIBBASE NOOPT DOSSTYLE
-.IMPORT .IGNORE : OS2_SHELL USE_CODEVIEW USE_DOS32A USE_QNX4 LEAVE_LINKFILE
-
-# We are compiling for a 32 bit envionment
- _32BIT_ := 1
-
-# Setup special environment for QNX 4 (Unix'ish)
-.IF $(USE_QNX4)
- USE_QNX := 1
- L := .a # Libraries
- LP := lib # LP - Library file prefix (name of file on disk)
- LL := lib # Library link prefix (name of library on link command line)
- LE := .a # Library link suffix (extension of library on link command line)
-.ENDIF
-
-# Default commands for compiling, assembling linking and archiving
- CC := wcc386
- CPP := wpp386
- CFLAGS := -zq-j-s-fpi87
-.IF $(USE_NASM)
- AS := nasm
- ASFLAGS := -t -f obj -d__FLAT__ -dSTDCALL_MANGLE -iINCLUDE -i$(SCITECH)\INCLUDE
-.ELSE
-.IF $(USE_TASM32)
- AS := tasm32
- DLL_TASM := tasm32
-.ELIF $(USE_TASMX)
- AS := tasmx
- DLL_TASM := tasmx
-.ELSE
- AS := tasm
- DLL_TASM := tasm
-.ENDIF
- ASFLAGS := /t /mx /m /w-res /w-mcp /D__FLAT__ /DSTDCALL_MANGLE /iINCLUDE /i$(SCITECH)\INCLUDE
- GAS := gcc
- GAS_FLAGS := -D__WATCOMC__ -D__SW_3S -D__SW_S -U__GNUC__ -UDJGPP -U__unix__ -Wall -I. -I$(SCITECH)\include -x assembler-with-cpp
-.ENDIF
- LD := wlink
- LDFLAGS =
-.IF $(USE_OS232)
- RC := rc
-.ELSE
- RC := wrc
-.ENDIF
-.IF $(USE_WIN32)
- RCFLAGS := -q /bt=nt
-.ELIF $(USE_OS232)
-.IF $(USE_OS2GUI)
- CFLAGS += -D__OS2_PM__
-.ENDIF
-.ELSE
- RCFLAGS := -q
-.ENDIF
- LIB := wlib
- LIBFLAGS := -q
- ILIB := wlib
- ILIBFLAGS := -c
- INTEL_X86 := 1
-
-# Set the compiler warning level
-.IF $(MAX_WARN)
- CFLAGS += -w4
-.ELSE
- CFLAGS += -w1
-.ENDIF
-
-# Optionally turn on debugging information (Codeview format)
-.IF $(DBG)
-.IF $(USE_WIN32)
-.IF $(USE_CODEVIEW)
- CFLAGS += -d2 -hc
- LDFLAGS += D CODEVIEW OPT CVPACK
-.ELSE
- CFLAGS += -d2
- LDFLAGS += D A
-.ENDIF
-.ELSE
- CFLAGS += -d2
- LDFLAGS += D A
-.ENDIF
- LIBFLAGS += -p=768
-.IF $(USE_NASM)
- ASFLAGS += -F borland -g
-.ELSE
-.IF $(USE_TASM32)
- ASFLAGS += /q # TASM32 fucks up Watcom C++ debug info
-.ELIF $(OS2_SHELL)
- ASFLAGS += /q # TASM for OS/2 fucks up Watcom C++ debug info
-.ELSE
- ASFLAGS += /zi
-.ENDIF
-.ENDIF
-.ELSE
-.IF $(USE_NASM)
- ASFLAGS += -F null
-.ELSE
- ASFLAGS += /q
-.ENDIF
-.END
-
-# Optionally turn on optimisations (with or without stack conventions)
-.IF $(STKCALL)
-.IF $(OPT)
- CFLAGS += -onatx-5s-fp5
-.ELIF $(OPT_SIZE)
- CFLAGS += -onaslmr-5s-fp5
-.ELIF $(NOOPT)
- CFLAGS += -od-5s
-.ELSE
- CFLAGS += -3s
-.END
-.ELSE
-.IF $(OPT)
- CFLAGS += -onatx-5r-fp5
-.ELIF $(OPT_SIZE)
- CFLAGS += -onaslmr-5r-fp5
-.ELIF $(NOOPT)
- CFLAGS += -od-5r
-.END
-.END
-
-# Optionally turn on direct i387 FPU instructions optimised for Pentium
-.IF $(FPU)
- CFLAGS += -DFPU387
- ASFLAGS += -dFPU387
-.END
-
-# Optionally compile a beta release version of a product
-.IF $(BETA)
- CFLAGS += -DBETA
- ASFLAGS += -dBETA
-.END
-
-.IF $(USE_TNT) # Use Phar Lap's TNT DOS Extender
- CFLAGS += -bt=nt -DTNT
- ASFLAGS += -dTNT
- LDFLAGS += SYS NT OP STUB=GOTNT.EXE
- LIB_OS = DOS32
-.ELIF $(USE_X32VM) # Use FlashTek X-32VM DOS extender
- CFLAGS += -bt=dos
- LDFLAGS += SYS X32RV
- DX_CFLAGS += -DX32VM
- DX_ASFLAGS += -dX32VM
- LIB_OS = DOS32
-.ELIF $(USE_X32) # Use FlashTek X-32 DOS extender
- CFLAGS += -bt=dos
- LDFLAGS += SYS X32R
- DX_CFLAGS += -DX32VM
- DX_ASFLAGS += -dX32VM
- LIB_OS = DOS32
-.ELIF $(USE_QNX4) # Build QNX 4 app
- CFLAGS += -bt=qnx386
- LDFLAGS += SYS QNX386FLAT OP CASEEXACT OP OFFSET=40k OP STACK=32k
- CFLAGS += -D__QNX__ -D__UNIX__
- ASFLAGS += -d__QNX__ -d__UNIX__
- LIB_OS = QNX4
-.ELIF $(USE_OS232)
-.IF $(BUILD_DLL)
- CFLAGS += -bm-bd-bt=os2-sg-DBUILD_DLL
- ASFLAGS += -dBUILD_DLL
-.ELSE
- CFLAGS += -bm-bt=os2-sg
-.ENDIF
- DX_ASFLAGS += -d__OS2__
- LIB_OS = os232
-.ELIF $(USE_SNAP) # Build 32 bit Snap app
-.IF $(BUILD_DLL)
- CFLAGS += -bm-bd-bt=nt-DBUILD_DLL
- ASFLAGS += -dBUILD_DLL
-.ELSE
- CFLAGS += -bm-bt=nt-D_WIN32
-.ENDIF
- LDFLAGS += OP nodefaultlibs
-.IF $(STKCALL)
- DEFLIBS := clib3s.lib,math3s.lib,noemu387.lib,
-.ELSE
- DEFLIBS := clib3r.lib,math3r.lib,noemu387.lib,
-.ENDIF
- LIB_OS = SNAP
-.ELIF $(USE_WIN32) # Build 32 bit Windows NT app
-.IF $(WIN32_GUI)
-.ELSE
- CFLAGS += -D__CONSOLE__
-.ENDIF
-.IF $(BUILD_DLL)
- CFLAGS += -bm-bd-bt=nt-sg-DBUILD_DLL -D_WIN32
- ASFLAGS += -dBUILD_DLL
-.ELSE
- CFLAGS += -bm-bt=nt-sg-D_WIN32
-.ENDIF
- DX_ASFLAGS += -d__WINDOWS32__
- LIB_OS = WIN32
- DEFLIBS := kernel32.lib,user32.lib,gdi32.lib,advapi32.lib,shell32.lib,winmm.lib,comdlg32.lib,comctl32.lib,ole32.lib,oleaut32.lib,version.lib,winspool.lib,uuid.lib,wsock32.lib,rpcrt4.lib,
-.ELIF $(USE_WIN386) # Build 32 bit Win386 extended app
-.IF $(BUILD_DLL)
- CFLAGS += -bd-bt=windows-DBUILD_DLL
- ASFLAGS += -dBUILD_DLL
-.ELSE
- CFLAGS += -bt=windows
-.ENDIF
- DX_ASFLAGS += -d__WIN386__
- LIB_OS = WIN386
-.ELIF $(USE_PMODEW) # PMODE/W
- CFLAGS += -bt=dos
- USE_DOS4GW := 1
- USE_REALDOS := 1
- LDFLAGS += SYS PMODEW
- DX_CFLAGS += -DDOS4GW
- DX_ASFLAGS += -dDOS4GW
- LIB_OS = DOS32
-.ELIF $(USE_CAUSEWAY) # Causeway
- CFLAGS += -bt=dos
- USE_DOS4GW := 1
- USE_REALDOS := 1
- LDFLAGS += SYS CAUSEWAY
- DX_CFLAGS += -DDOS4GW
- DX_ASFLAGS += -dDOS4GW
- LIB_OS = DOS32
-.ELIF $(USE_DOS32A) # DOS32/A
- CFLAGS += -bt=dos
- USE_DOS4GW := 1
- USE_REALDOS := 1
- LDFLAGS += SYS DOS32A
- DX_CFLAGS += -DDOS4GW
- DX_ASFLAGS += -dDOS4GW
- LIB_OS = DOS32
-.ELSE # Use DOS4GW
- CFLAGS += -bt=dos
- USE_DOS4GW := 1
- USE_REALDOS := 1
- LDFLAGS += SYS DOS4G
- DX_CFLAGS += -DDOS4GW
- DX_ASFLAGS += -dDOS4GW
- LIB_OS = DOS32
-.END
-
-# Disable linking to default C runtime library and PM library
-
-.IF $(NO_RUNTIME)
-LDFLAGS += OP nodefaultlibs
-DEFLIBS :=
-.ELSE
-
-# Place to look for PM library files
-
-.IF $(USE_SNAP) # Build 32 bit Snap app or dll
-PMLIB :=
-.ELIF $(USE_WIN32)
-.IF $(STKCALL)
-PMLIB := spm.lib,
-.ELSE
-PMLIB := pm.lib,
-.ENDIF
-.ELIF $(USE_OS232)
-.IF $(STKCALL)
-.IF $(USE_OS2GUI)
-PMLIB := spm_pm.lib,
-.ELSE
-PMLIB := spm.lib,
-.ENDIF
-.ELSE
-.IF $(USE_OS2GUI)
-PMLIB := pm_pm.lib,
-.ELSE
-PMLIB := pm.lib,
-.ENDIF
-.ENDIF
-.ELIF $(USE_QNX4)
-.IF $(STKCALL)
-PMLIB := libspm.a,
-.ELSE
-PMLIB := libpm.a,
-.ENDIF
-.ELIF $(USE_TNT)
-.IF $(STKCALL)
-PMLIB := tnt\spm.lib,
-.ELSE
-PMLIB := tnt\pm.lib,
-.ENDIF
-.ELIF $(USE_X32)
-.IF $(STKCALL)
-PMLIB := x32\spm.lib,
-.ELSE
-PMLIB := x32\pm.lib,
-.ENDIF
-.ELSE
-.IF $(STKCALL)
-PMLIB := dos4gw\spm.lib,
-.ELSE
-PMLIB := dos4gw\pm.lib,
-.ENDIF
-.ENDIF
-.ENDIF
-
-# Define the base directory for library files
-
-.IF $(CHECKED)
-LIB_BASE_DIR := $(SCITECH_LIB)\lib\debug
-CFLAGS += -DCHECKED=1
-.ELSE
-LIB_BASE_DIR := $(SCITECH_LIB)\lib\release
-.ENDIF
-
-# Define where to install library files
- LIB_BASE := $(LIB_BASE_DIR)\$(LIB_OS)\$(WC_LIBBASE)
- LIB_DEST := $(LIB_BASE)
-
- LDFLAGS += op map
-
-# Define which file contains our rules
-
- RULES_MAK := wc32.mk
diff --git a/board/MAI/bios_emulator/scitech/src/biosemu/besys.c b/board/MAI/bios_emulator/scitech/src/biosemu/besys.c
deleted file mode 100644
index 1512ce9bf9..0000000000
--- a/board/MAI/bios_emulator/scitech/src/biosemu/besys.c
+++ /dev/null
@@ -1,408 +0,0 @@
-/****************************************************************************
-*
-* BIOS emulator and interface
-* to Realmode X86 Emulator Library
-*
-* Copyright (C) 1996-1999 SciTech Software, Inc.
-*
-* ========================================================================
-*
-* Permission to use, copy, modify, distribute, and sell this software and
-* its documentation for any purpose is hereby granted without fee,
-* provided that the above copyright notice appear in all copies and that
-* both that copyright notice and this permission notice appear in
-* supporting documentation, and that the name of the authors not be used
-* in advertising or publicity pertaining to distribution of the software
-* without specific, written prior permission. The authors makes no
-* representations about the suitability of this software for any purpose.
-* It is provided "as is" without express or implied warranty.
-*
-* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
-* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
-* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
-* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
-* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
-* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
-* PERFORMANCE OF THIS SOFTWARE.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-* Developer: Kendall Bennett
-*
-* Description: This file includes BIOS emulator I/O and memory access
-* functions.
-*
-****************************************************************************/
-
-#include "biosemui.h"
-
-/*------------------------------- Macros ----------------------------------*/
-
-/* Macros to read and write values to x86 bus memory. Replace these as
- * necessary if you need to do something special to access memory over
- * the bus on a particular processor family.
- */
-
-#define readb(base,off) *((u8*)((u32)(base) + (off)))
-#define readw(base,off) *((u16*)((u32)(base) + (off)))
-#define readl(base,off) *((u32*)((u32)(base) + (off)))
-#define writeb(v,base,off) *((u8*)((u32)(base) + (off))) = (v)
-#define writew(v,base,off) *((u16*)((u32)(base) + (off))) = (v)
-#define writel(v,base,off) *((u32*)((u32)(base) + (off))) = (v)
-
-/*----------------------------- Implementation ----------------------------*/
-
-#ifdef DEBUG
-# define DEBUG_MEM() (M.x86.debug & DEBUG_MEM_TRACE_F)
-#else
-# define DEBUG_MEM()
-#endif
-
-/****************************************************************************
-PARAMETERS:
-addr - Emulator memory address to read
-
-RETURNS:
-Byte value read from emulator memory.
-
-REMARKS:
-Reads a byte value from the emulator memory. We have three distinct memory
-regions that are handled differently, which this function handles.
-****************************************************************************/
-u8 X86API BE_rdb(
- u32 addr)
-{
- u8 val = 0;
-
- if (addr >= 0xC0000 && addr <= _BE_env.biosmem_limit) {
- val = *(u8*)(_BE_env.biosmem_base + addr - 0xC0000);
- }
- else if (addr >= 0xA0000 && addr <= 0xFFFFF) {
- val = readb(_BE_env.busmem_base, addr - 0xA0000);
- }
- else if (addr > M.mem_size - 1) {
-DB( printk("mem_read: address %#lx out of range!\n", addr);)
- HALT_SYS();
- }
- else {
- val = *(u8*)(M.mem_base + addr);
- }
-DB( if (DEBUG_MEM())
- printk("%#08x 1 -> %#x\n", addr, val);)
- return val;
-}
-
-/****************************************************************************
-PARAMETERS:
-addr - Emulator memory address to read
-
-RETURNS:
-Word value read from emulator memory.
-
-REMARKS:
-Reads a word value from the emulator memory. We have three distinct memory
-regions that are handled differently, which this function handles.
-****************************************************************************/
-u16 X86API BE_rdw(
- u32 addr)
-{
- u16 val = 0;
-
- if (addr >= 0xC0000 && addr <= _BE_env.biosmem_limit) {
-#ifdef __BIG_ENDIAN__
- if (addr & 0x1) {
- addr -= 0xC0000;
- val = ( *(u8*)(_BE_env.biosmem_base + addr) |
- (*(u8*)(_BE_env.biosmem_base + addr + 1) << 8));
- }
- else
-#endif
- val = *(u16*)(_BE_env.biosmem_base + addr - 0xC0000);
- }
- else if (addr >= 0xA0000 && addr <= 0xFFFFF) {
-#ifdef __BIG_ENDIAN__
- if (addr & 0x1) {
- addr -= 0xA0000;
- val = ( readb(_BE_env.busmem_base, addr) |
- (readb(_BE_env.busmem_base, addr + 1) << 8));
- }
- else
-#endif
- val = readw(_BE_env.busmem_base, addr - 0xA0000);
- }
- else if (addr > M.mem_size - 2) {
-DB( printk("mem_read: address %#lx out of range!\n", addr);)
- HALT_SYS();
- }
- else {
-#ifdef __BIG_ENDIAN__
- if (addr & 0x1) {
- val = ( *(u8*)(M.mem_base + addr) |
- (*(u8*)(M.mem_base + addr + 1) << 8));
- }
- else
-#endif
- val = *(u16*)(M.mem_base + addr);
- }
-DB( if (DEBUG_MEM())
- printk("%#08x 2 -> %#x\n", addr, val);)
- return val;
-}
-
-/****************************************************************************
-PARAMETERS:
-addr - Emulator memory address to read
-
-RETURNS:
-Long value read from emulator memory.
-
-REMARKS:
-Reads a long value from the emulator memory. We have three distinct memory
-regions that are handled differently, which this function handles.
-****************************************************************************/
-u32 X86API BE_rdl(
- u32 addr)
-{
- u32 val = 0;
-
- if (addr >= 0xC0000 && addr <= _BE_env.biosmem_limit) {
-#ifdef __BIG_ENDIAN__
- if (addr & 0x3) {
- addr -= 0xC0000;
- val = ( *(u8*)(_BE_env.biosmem_base + addr + 0) |
- (*(u8*)(_BE_env.biosmem_base + addr + 1) << 8) |
- (*(u8*)(_BE_env.biosmem_base + addr + 2) << 16) |
- (*(u8*)(_BE_env.biosmem_base + addr + 3) << 24));
- }
- else
-#endif
- val = *(u32*)(_BE_env.biosmem_base + addr - 0xC0000);
- }
- else if (addr >= 0xA0000 && addr <= 0xFFFFF) {
-#ifdef __BIG_ENDIAN__
- if (addr & 0x3) {
- addr -= 0xA0000;
- val = ( readb(_BE_env.busmem_base, addr) |
- (readb(_BE_env.busmem_base, addr + 1) << 8) |
- (readb(_BE_env.busmem_base, addr + 2) << 16) |
- (readb(_BE_env.busmem_base, addr + 3) << 24));
- }
- else
-#endif
- val = readl(_BE_env.busmem_base, addr - 0xA0000);
- }
- else if (addr > M.mem_size - 4) {
-DB( printk("mem_read: address %#lx out of range!\n", addr);)
- HALT_SYS();
- }
- else {
-#ifdef __BIG_ENDIAN__
- if (addr & 0x3) {
- val = ( *(u8*)(M.mem_base + addr + 0) |
- (*(u8*)(M.mem_base + addr + 1) << 8) |
- (*(u8*)(M.mem_base + addr + 2) << 16) |
- (*(u8*)(M.mem_base + addr + 3) << 24));
- }
- else
-#endif
- val = *(u32*)(M.mem_base + addr);
- }
-DB( if (DEBUG_MEM())
- printk("%#08x 4 -> %#x\n", addr, val);)
- return val;
-}
-
-/****************************************************************************
-PARAMETERS:
-addr - Emulator memory address to read
-val - Value to store
-
-REMARKS:
-Writes a byte value to emulator memory. We have three distinct memory
-regions that are handled differently, which this function handles.
-****************************************************************************/
-void X86API BE_wrb(
- u32 addr,
- u8 val)
-{
-DB( if (DEBUG_MEM())
- printk("%#08x 1 <- %#x\n", addr, val);)
- if (addr >= 0xC0000 && addr <= _BE_env.biosmem_limit) {
- *(u8*)(_BE_env.biosmem_base + addr - 0xC0000) = val;
- }
- else if (addr >= 0xA0000 && addr <= 0xFFFFF) {
- writeb(val, _BE_env.busmem_base, addr - 0xA0000);
- }
- else if (addr > M.mem_size-1) {
-DB( printk("mem_write: address %#lx out of range!\n", addr);)
- HALT_SYS();
- }
- else {
- *(u8*)(M.mem_base + addr) = val;
- }
-}
-
-/****************************************************************************
-PARAMETERS:
-addr - Emulator memory address to read
-val - Value to store
-
-REMARKS:
-Writes a word value to emulator memory. We have three distinct memory
-regions that are handled differently, which this function handles.
-****************************************************************************/
-void X86API BE_wrw(
- u32 addr,
- u16 val)
-{
-DB( if (DEBUG_MEM())
- printk("%#08x 2 <- %#x\n", addr, val);)
- if (addr >= 0xC0000 && addr <= _BE_env.biosmem_limit) {
-#ifdef __BIG_ENDIAN__
- if (addr & 0x1) {
- addr -= 0xC0000;
- *(u8*)(_BE_env.biosmem_base + addr + 0) = (val >> 0) & 0xff;
- *(u8*)(_BE_env.biosmem_base + addr + 1) = (val >> 8) & 0xff;
- }
- else
-#endif
- *(u16*)(_BE_env.biosmem_base + addr - 0xC0000) = val;
- }
- else if (addr >= 0xA0000 && addr <= 0xFFFFF) {
-#ifdef __BIG_ENDIAN__
- if (addr & 0x1) {
- addr -= 0xA0000;
- writeb(val >> 0, _BE_env.busmem_base, addr);
- writeb(val >> 8, _BE_env.busmem_base, addr + 1);
- }
- else
-#endif
- writew(val, _BE_env.busmem_base, addr - 0xA0000);
- }
- else if (addr > M.mem_size-2) {
-DB( printk("mem_write: address %#lx out of range!\n", addr);)
- HALT_SYS();
- }
- else {
-#ifdef __BIG_ENDIAN__
- if (addr & 0x1) {
- *(u8*)(M.mem_base + addr + 0) = (val >> 0) & 0xff;
- *(u8*)(M.mem_base + addr + 1) = (val >> 8) & 0xff;
- }
- else
-#endif
- *(u16*)(M.mem_base + addr) = val;
- }
-}
-
-/****************************************************************************
-PARAMETERS:
-addr - Emulator memory address to read
-val - Value to store
-
-REMARKS:
-Writes a long value to emulator memory. We have three distinct memory
-regions that are handled differently, which this function handles.
-****************************************************************************/
-void X86API BE_wrl(
- u32 addr,
- u32 val)
-{
-DB( if (DEBUG_MEM())
- printk("%#08x 4 <- %#x\n", addr, val);)
- if (addr >= 0xC0000 && addr <= _BE_env.biosmem_limit) {
-#ifdef __BIG_ENDIAN__
- if (addr & 0x1) {
- addr -= 0xC0000;
- *(u8*)(M.mem_base + addr + 0) = (val >> 0) & 0xff;
- *(u8*)(M.mem_base + addr + 1) = (val >> 8) & 0xff;
- *(u8*)(M.mem_base + addr + 2) = (val >> 16) & 0xff;
- *(u8*)(M.mem_base + addr + 3) = (val >> 24) & 0xff;
- }
- else
-#endif
- *(u32*)(M.mem_base + addr - 0xC0000) = val;
- }
- else if (addr >= 0xA0000 && addr <= 0xFFFFF) {
-#ifdef __BIG_ENDIAN__
- if (addr & 0x3) {
- addr -= 0xA0000;
- writeb(val >> 0, _BE_env.busmem_base, addr);
- writeb(val >> 8, _BE_env.busmem_base, addr + 1);
- writeb(val >> 16, _BE_env.busmem_base, addr + 1);
- writeb(val >> 24, _BE_env.busmem_base, addr + 1);
- }
- else
-#endif
- writel(val, _BE_env.busmem_base, addr - 0xA0000);
- }
- else if (addr > M.mem_size-4) {
-DB( printk("mem_write: address %#lx out of range!\n", addr);)
- HALT_SYS();
- }
- else {
-#ifdef __BIG_ENDIAN__
- if (addr & 0x1) {
- *(u8*)(M.mem_base + addr + 0) = (val >> 0) & 0xff;
- *(u8*)(M.mem_base + addr + 1) = (val >> 8) & 0xff;
- *(u8*)(M.mem_base + addr + 2) = (val >> 16) & 0xff;
- *(u8*)(M.mem_base + addr + 3) = (val >> 24) & 0xff;
- }
- else
-#endif
- *(u32*)(M.mem_base + addr) = val;
- }
-}
-
-/* Debug functions to do ISA/PCI bus port I/O */
-
-#ifdef DEBUG
-#define DEBUG_IO() (M.x86.debug & DEBUG_IO_TRACE_F)
-
-u8 X86API BE_inb(int port)
-{
- u8 val = PM_inpb(port);
- if (DEBUG_IO())
- printk("%04X:%04X: inb.%04X -> %02X\n",M.x86.saved_cs, M.x86.saved_ip, (ushort)port, val);
- return val;
-}
-
-u16 X86API BE_inw(int port)
-{
- u16 val = PM_inpw(port);
- if (DEBUG_IO())
- printk("%04X:%04X: inw.%04X -> %04X\n",M.x86.saved_cs, M.x86.saved_ip, (ushort)port, val);
- return val;
-}
-
-u32 X86API BE_inl(int port)
-{
- u32 val = PM_inpd(port);
- if (DEBUG_IO())
- printk("%04X:%04X: inl.%04X -> %08X\n",M.x86.saved_cs, M.x86.saved_ip, (ushort)port, val);
- return val;
-}
-
-void X86API BE_outb(int port, u8 val)
-{
- if (DEBUG_IO())
- printk("%04X:%04X: outb.%04X <- %02X\n",M.x86.saved_cs, M.x86.saved_ip, (ushort)port, val);
- PM_outpb(port,val);
-}
-
-void X86API BE_outw(int port, u16 val)
-{
- if (DEBUG_IO())
- printk("%04X:%04X: outw.%04X <- %04X\n",M.x86.saved_cs, M.x86.saved_ip, (ushort)port, val);
- PM_outpw(port,val);
-}
-
-void X86API BE_outl(int port, u32 val)
-{
- if (DEBUG_IO())
- printk("%04X:%04X: outl.%04X <- %08X\n",M.x86.saved_cs, M.x86.saved_ip, (ushort)port, val);
- PM_outpd(port,val);
-}
-#endif
diff --git a/board/MAI/bios_emulator/scitech/src/biosemu/bios.c b/board/MAI/bios_emulator/scitech/src/biosemu/bios.c
deleted file mode 100644
index c0f4a4b18e..0000000000
--- a/board/MAI/bios_emulator/scitech/src/biosemu/bios.c
+++ /dev/null
@@ -1,250 +0,0 @@
-/****************************************************************************
-*
-* BIOS emulator and interface
-* to Realmode X86 Emulator Library
-*
-* Copyright (C) 1996-1999 SciTech Software, Inc.
-*
-* ========================================================================
-*
-* Permission to use, copy, modify, distribute, and sell this software and
-* its documentation for any purpose is hereby granted without fee,
-* provided that the above copyright notice appear in all copies and that
-* both that copyright notice and this permission notice appear in
-* supporting documentation, and that the name of the authors not be used
-* in advertising or publicity pertaining to distribution of the software
-* without specific, written prior permission. The authors makes no
-* representations about the suitability of this software for any purpose.
-* It is provided "as is" without express or implied warranty.
-*
-* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
-* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
-* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
-* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
-* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
-* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
-* PERFORMANCE OF THIS SOFTWARE.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-* Developer: Kendall Bennett
-*
-* Description: Module implementing the BIOS specific functions.
-*
-****************************************************************************/
-
-#include "biosemui.h"
-
-/*----------------------------- Implementation ----------------------------*/
-
-/****************************************************************************
-PARAMETERS:
-intno - Interrupt number being serviced
-
-REMARKS:
-Handler for undefined interrupts.
-****************************************************************************/
-static void X86API undefined_intr(
- int intno)
-{
- if (BE_rdw(intno * 4 + 2) == BIOS_SEG)
- printk("biosEmu: undefined interrupt %xh called!\n",intno);
- else
- X86EMU_prepareForInt(intno);
-}
-
-/****************************************************************************
-PARAMETERS:
-intno - Interrupt number being serviced
-
-REMARKS:
-This function handles the default system BIOS Int 10h (the default is stored
-in the Int 42h vector by the system BIOS at bootup). We only need to handle
-a small number of special functions used by the BIOS during POST time.
-****************************************************************************/
-static void X86API int42(
- int intno)
-{
- if (M.x86.R_AH == 0x12 && M.x86.R_BL == 0x32) {
- if (M.x86.R_AL == 0) {
- /* Enable CPU accesses to video memory */
- PM_outpb(0x3c2, PM_inpb(0x3cc) | (u8)0x02);
- return;
- }
- else if (M.x86.R_AL == 1) {
- /* Disable CPU accesses to video memory */
- PM_outpb(0x3c2, PM_inpb(0x3cc) & (u8)~0x02);
- return;
- }
-#ifdef DEBUG
- else {
- printk("biosEmu/bios.int42: unknown function AH=0x12, BL=0x32, AL=%#02x\n",M.x86.R_AL);
- }
-#endif
- }
-#ifdef DEBUG
- else {
- printk("biosEmu/bios.int42: unknown function AH=%#02x, AL=%#02x, BL=%#02x\n",M.x86.R_AH, M.x86.R_AL, M.x86.R_BL);
- }
-#endif
-}
-
-/****************************************************************************
-PARAMETERS:
-intno - Interrupt number being serviced
-
-REMARKS:
-This function handles the default system BIOS Int 10h. If the POST code
-has not yet re-vectored the Int 10h BIOS interrupt vector, we handle this
-by simply calling the int42 interrupt handler above. Very early in the
-BIOS POST process, the vector gets replaced and we simply let the real
-mode interrupt handler process the interrupt.
-****************************************************************************/
-static void X86API int10(
- int intno)
-{
- if (BE_rdw(intno * 4 + 2) == BIOS_SEG)
- int42(intno);
- else
- X86EMU_prepareForInt(intno);
-}
-
-/* Result codes returned by the PCI BIOS */
-
-#define SUCCESSFUL 0x00
-#define FUNC_NOT_SUPPORT 0x81
-#define BAD_VENDOR_ID 0x83
-#define DEVICE_NOT_FOUND 0x86
-#define BAD_REGISTER_NUMBER 0x87
-#define SET_FAILED 0x88
-#define BUFFER_TOO_SMALL 0x89
-
-/****************************************************************************
-PARAMETERS:
-intno - Interrupt number being serviced
-
-REMARKS:
-This function handles the default Int 1Ah interrupt handler for the real
-mode code, which provides support for the PCI BIOS functions. Since we only
-want to allow the real mode BIOS code *only* see the PCI config space for
-its own device, we only return information for the specific PCI config
-space that we have passed in to the init function. This solves problems
-when using the BIOS to warm boot a secondary adapter when there is an
-identical adapter before it on the bus (some BIOS'es get confused in this
-case).
-****************************************************************************/
-static void X86API int1A(
- unused)
-{
- u16 pciSlot;
-
- /* Fail if no PCI device information has been registered */
- if (!_BE_env.vgaInfo.pciInfo)
- return;
- pciSlot = (u16)(_BE_env.vgaInfo.pciInfo->slot.i >> 8);
- switch (M.x86.R_AX) {
- case 0xB101: /* PCI bios present? */
- M.x86.R_AL = 0x00; /* no config space/special cycle generation support */
- M.x86.R_EDX = 0x20494350; /* " ICP" */
- M.x86.R_BX = 0x0210; /* Version 2.10 */
- M.x86.R_CL = 0; /* Max bus number in system */
- CLEAR_FLAG(F_CF);
- break;
- case 0xB102: /* Find PCI device */
- M.x86.R_AH = DEVICE_NOT_FOUND;
- if (M.x86.R_DX == _BE_env.vgaInfo.pciInfo->VendorID &&
- M.x86.R_CX == _BE_env.vgaInfo.pciInfo->DeviceID &&
- M.x86.R_SI == 0) {
- M.x86.R_AH = SUCCESSFUL;
- M.x86.R_BX = pciSlot;
- }
- CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
- break;
- case 0xB103: /* Find PCI class code */
- M.x86.R_AH = DEVICE_NOT_FOUND;
- if (M.x86.R_CL == _BE_env.vgaInfo.pciInfo->Interface &&
- M.x86.R_CH == _BE_env.vgaInfo.pciInfo->SubClass &&
- (u8)(M.x86.R_ECX >> 16) == _BE_env.vgaInfo.pciInfo->BaseClass) {
- M.x86.R_AH = SUCCESSFUL;
- M.x86.R_BX = pciSlot;
- }
- CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
- break;
- case 0xB108: /* Read configuration byte */
- M.x86.R_AH = BAD_REGISTER_NUMBER;
- if (M.x86.R_BX == pciSlot) {
- M.x86.R_AH = SUCCESSFUL;
- M.x86.R_CL = (u8)PCI_accessReg(M.x86.R_DI,0,PCI_READ_BYTE,_BE_env.vgaInfo.pciInfo);
- }
- CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
- break;
- case 0xB109: /* Read configuration word */
- M.x86.R_AH = BAD_REGISTER_NUMBER;
- if (M.x86.R_BX == pciSlot) {
- M.x86.R_AH = SUCCESSFUL;
- M.x86.R_CX = (u16)PCI_accessReg(M.x86.R_DI,0,PCI_READ_WORD,_BE_env.vgaInfo.pciInfo);
- }
- CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
- break;
- case 0xB10A: /* Read configuration dword */
- M.x86.R_AH = BAD_REGISTER_NUMBER;
- if (M.x86.R_BX == pciSlot) {
- M.x86.R_AH = SUCCESSFUL;
- M.x86.R_ECX = (u32)PCI_accessReg(M.x86.R_DI,0,PCI_READ_DWORD,_BE_env.vgaInfo.pciInfo);
- }
- CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
- break;
- case 0xB10B: /* Write configuration byte */
- M.x86.R_AH = BAD_REGISTER_NUMBER;
- if (M.x86.R_BX == pciSlot) {
- M.x86.R_AH = SUCCESSFUL;
- PCI_accessReg(M.x86.R_DI,M.x86.R_CL,PCI_WRITE_BYTE,_BE_env.vgaInfo.pciInfo);
- }
- CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
- break;
- case 0xB10C: /* Write configuration word */
- M.x86.R_AH = BAD_REGISTER_NUMBER;
- if (M.x86.R_BX == pciSlot) {
- M.x86.R_AH = SUCCESSFUL;
- PCI_accessReg(M.x86.R_DI,M.x86.R_CX,PCI_WRITE_WORD,_BE_env.vgaInfo.pciInfo);
- }
- CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
- break;
- case 0xB10D: /* Write configuration dword */
- M.x86.R_AH = BAD_REGISTER_NUMBER;
- if (M.x86.R_BX == pciSlot) {
- M.x86.R_AH = SUCCESSFUL;
- PCI_accessReg(M.x86.R_DI,M.x86.R_ECX,PCI_WRITE_DWORD,_BE_env.vgaInfo.pciInfo);
- }
- CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
- break;
- default:
- printk("biosEmu/bios.int1a: unknown function AX=%#04x\n", M.x86.R_AX);
- }
-}
-
-/****************************************************************************
-REMARKS:
-This function initialises the BIOS emulation functions for the specific
-PCI display device. We insulate the real mode BIOS from any other devices
-on the bus, so that it will work correctly thinking that it is the only
-device present on the bus (ie: avoiding any adapters present in from of
-the device we are trying to control).
-****************************************************************************/
-void _BE_bios_init(
- u32 *intrTab)
-{
- int i;
- X86EMU_intrFuncs bios_intr_tab[256];
-
- for (i = 0; i < 256; ++i) {
- intrTab[i] = BIOS_SEG << 16;
- bios_intr_tab[i] = undefined_intr;
- }
- bios_intr_tab[0x10] = int10;
- bios_intr_tab[0x1A] = int1A;
- bios_intr_tab[0x42] = int42;
- X86EMU_setupIntrFuncs(bios_intr_tab);
-}
diff --git a/board/MAI/bios_emulator/scitech/src/biosemu/biosemu.c b/board/MAI/bios_emulator/scitech/src/biosemu/biosemu.c
deleted file mode 100644
index 0052709cc6..0000000000
--- a/board/MAI/bios_emulator/scitech/src/biosemu/biosemu.c
+++ /dev/null
@@ -1,445 +0,0 @@
-/****************************************************************************
-*
-* BIOS emulator and interface
-* to Realmode X86 Emulator Library
-*
-* Copyright (C) 1996-1999 SciTech Software, Inc.
-*
-* ========================================================================
-*
-* Permission to use, copy, modify, distribute, and sell this software and
-* its documentation for any purpose is hereby granted without fee,
-* provided that the above copyright notice appear in all copies and that
-* both that copyright notice and this permission notice appear in
-* supporting documentation, and that the name of the authors not be used
-* in advertising or publicity pertaining to distribution of the software
-* without specific, written prior permission. The authors makes no
-* representations about the suitability of this software for any purpose.
-* It is provided "as is" without express or implied warranty.
-*
-* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
-* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
-* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
-* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
-* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
-* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
-* PERFORMANCE OF THIS SOFTWARE.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-* Developer: Kendall Bennett
-*
-* Description: Module implementing the system specific functions. This
-* module is always compiled and linked in the OS depedent
-* libraries, and never in a binary portable driver.
-*
-****************************************************************************/
-
-#include "biosemui.h"
-#include <string.h>
-#include <stdlib.h>
-
-/*------------------------- Global Variables ------------------------------*/
-
-BE_sysEnv _BE_env;
-#ifdef __DRIVER__
-PM_imports _VARAPI _PM_imports;
-#endif
-static X86EMU_memFuncs _BE_mem = {
- BE_rdb,
- BE_rdw,
- BE_rdl,
- BE_wrb,
- BE_wrw,
- BE_wrl,
- };
-#ifdef DEBUG
-static X86EMU_pioFuncs _BE_pio = {
- BE_inb,
- BE_inw,
- BE_inl,
- BE_outb,
- BE_outw,
- BE_outl,
- };
-#else
-static X86EMU_pioFuncs _BE_pio = {
- (void*)PM_inpb,
- (void*)PM_inpw,
- (void*)PM_inpd,
- (void*)PM_outpb,
- (void*)PM_outpw,
- (void*)PM_outpd,
- };
-#endif
-
-/*-------------------------- Implementation -------------------------------*/
-
-#define OFF(addr) (u16)(((addr) >> 0) & 0xffff)
-#define SEG(addr) (u16)(((addr) >> 4) & 0xf000)
-
-/****************************************************************************
-PARAMETERS:
-debugFlags - Flags to enable debugging options (debug builds only)
-memSize - Amount of memory to allocate for real mode machine
-info - Pointer to default VGA device information
-
-REMARKS:
-This functions initialises the BElib, and uses the passed in
-BIOS image as the BIOS that is used and emulated at 0xC0000.
-****************************************************************************/
-ibool PMAPI BE_init(
- u32 debugFlags,
- int memSize,
- BE_VGAInfo *info)
-{
-#ifndef __DRIVER__
- PM_init();
-#endif
- memset(&M,0,sizeof(M));
- if (memSize < 20480)
- PM_fatalError("Emulator requires at least 20Kb of memory!\n");
- if ((M.mem_base = (unsigned long)malloc(memSize)) == NULL)
- PM_fatalError("Out of memory!");
- M.mem_size = memSize;
- _BE_env.busmem_base = (ulong)PM_mapPhysicalAddr(0xA0000,0x5FFFF,true);
- M.x86.debug = debugFlags;
- _BE_bios_init((u32*)info->LowMem);
- X86EMU_setupMemFuncs(&_BE_mem);
- X86EMU_setupPioFuncs(&_BE_pio);
- BE_setVGA(info);
- return true;
-}
-
-/****************************************************************************
-PARAMETERS:
-debugFlags - Flags to enable debugging options (debug builds only)
-
-REMARKS:
-This function allows the application to enable logging and debug flags
-on a function call basis, so we can specifically enable logging only
-for specific functions that are causing problems in debug mode.
-****************************************************************************/
-void PMAPI BE_setDebugFlags(
- u32 debugFlags)
-{
- M.x86.debug = debugFlags;
-}
-
-/****************************************************************************
-PARAMETERS:
-info - Pointer to VGA device information to make current
-
-REMARKS:
-This function sets the VGA BIOS functions in the emulator to point to the
-specific VGA BIOS in use. This includes swapping the BIOS interrupt
-vectors, BIOS image and BIOS data area to the new BIOS. This allows the
-real mode BIOS to be swapped without resetting the entire emulator.
-****************************************************************************/
-void PMAPI BE_setVGA(
- BE_VGAInfo *info)
-{
- _BE_env.vgaInfo.pciInfo = info->pciInfo;
- _BE_env.vgaInfo.BIOSImage = info->BIOSImage;
- if (info->BIOSImage) {
- _BE_env.biosmem_base = (ulong)info->BIOSImage;
- _BE_env.biosmem_limit = 0xC0000 + info->BIOSImageLen-1;
- }
- else {
- _BE_env.biosmem_base = _BE_env.busmem_base + 0x20000;
- _BE_env.biosmem_limit = 0xC7FFF;
- }
- if (*((u32*)info->LowMem) == 0)
- _BE_bios_init((u32*)info->LowMem);
- memcpy((u8*)M.mem_base,info->LowMem,sizeof(info->LowMem));
-}
-
-/****************************************************************************
-PARAMETERS:
-info - Pointer to VGA device information to retrieve current
-
-REMARKS:
-This function returns the VGA BIOS functions currently active in the
-emulator, so they can be restored at a later date.
-****************************************************************************/
-void PMAPI BE_getVGA(
- BE_VGAInfo *info)
-{
- info->pciInfo = _BE_env.vgaInfo.pciInfo;
- info->BIOSImage = _BE_env.vgaInfo.BIOSImage;
- memcpy(info->LowMem,(u8*)M.mem_base,sizeof(info->LowMem));
-}
-
-/****************************************************************************
-PARAMETERS:
-r_seg - Segment for pointer to convert
-r_off - Offset for pointer to convert
-
-REMARKS:
-This function maps a real mode pointer in the emulator memory to a protected
-mode pointer that can be used to directly access the memory.
-
-NOTE: The memory is *always* in little endian format, son on non-x86
- systems you will need to do endian translations to access this
- memory.
-****************************************************************************/
-void * PMAPI BE_mapRealPointer(
- uint r_seg,
- uint r_off)
-{
- u32 addr = ((u32)r_seg << 4) + r_off;
-
- if (addr >= 0xC0000 && addr <= _BE_env.biosmem_limit) {
- return (void*)(_BE_env.biosmem_base + addr - 0xC0000);
- }
- else if (addr >= 0xA0000 && addr <= 0xFFFFF) {
- return (void*)(_BE_env.busmem_base + addr - 0xA0000);
- }
- return (void*)(M.mem_base + addr);
-}
-
-/****************************************************************************
-PARAMETERS:
-len - Return the length of the VESA buffer
-rseg - Place to store VESA buffer segment
-roff - Place to store VESA buffer offset
-
-REMARKS:
-This function returns the address of the VESA transfer buffer in real
-mode emulator memory. The VESA transfer buffer is always 1024 bytes long,
-and located at 15Kb into the start of the real mode memory (16Kb is where
-we put the real mode code we execute for issuing interrupts).
-
-NOTE: The memory is *always* in little endian format, son on non-x86
- systems you will need to do endian translations to access this
- memory.
-****************************************************************************/
-void * PMAPI BE_getVESABuf(
- uint *len,
- uint *rseg,
- uint *roff)
-{
- *len = 1024;
- *rseg = SEG(0x03C00);
- *roff = OFF(0x03C00);
- return (void*)(M.mem_base + ((u32)*rseg << 4) + *roff);
-}
-
-/****************************************************************************
-REMARKS:
-Cleans up and exits the emulator.
-****************************************************************************/
-void PMAPI BE_exit(void)
-{
- free((void*)M.mem_base);
- PM_freePhysicalAddr((void*)_BE_env.busmem_base,0x5FFFF);
-}
-
-/****************************************************************************
-PARAMETERS:
-seg - Segment of code to call
-off - Offset of code to call
-regs - Real mode registers to load
-sregs - Real mode segment registers to load
-
-REMARKS:
-This functions calls a real mode far function at the specified address,
-and loads all the x86 registers from the passed in registers structure.
-On exit the registers returned from the call are returned in the same
-structures.
-****************************************************************************/
-void PMAPI BE_callRealMode(
- uint seg,
- uint off,
- RMREGS *regs,
- RMSREGS *sregs)
-{
- M.x86.R_EAX = regs->e.eax;
- M.x86.R_EBX = regs->e.ebx;
- M.x86.R_ECX = regs->e.ecx;
- M.x86.R_EDX = regs->e.edx;
- M.x86.R_ESI = regs->e.esi;
- M.x86.R_EDI = regs->e.edi;
- M.x86.R_DS = sregs->ds;
- M.x86.R_ES = sregs->es;
- M.x86.R_FS = sregs->fs;
- M.x86.R_GS = sregs->gs;
- M.x86.R_CS = (u16)seg;
- M.x86.R_IP = (u16)off;
- M.x86.R_SS = SEG(M.mem_size - 1);
- M.x86.R_SP = OFF(M.mem_size - 1);
- X86EMU_exec();
- regs->e.cflag = M.x86.R_EFLG & F_CF;
- regs->e.eax = M.x86.R_EAX;
- regs->e.ebx = M.x86.R_EBX;
- regs->e.ecx = M.x86.R_ECX;
- regs->e.edx = M.x86.R_EDX;
- regs->e.esi = M.x86.R_ESI;
- regs->e.edi = M.x86.R_EDI;
- sregs->ds = M.x86.R_DS;
- sregs->es = M.x86.R_ES;
- sregs->fs = M.x86.R_FS;
- sregs->gs = M.x86.R_GS;
-}
-
-/****************************************************************************
-PARAMETERS:
-intno - Interrupt number to execute
-in - Real mode registers to load
-out - Place to store resulting real mode registers
-
-REMARKS:
-This functions calls a real mode interrupt function at the specified address,
-and loads all the x86 registers from the passed in registers structure.
-On exit the registers returned from the call are returned in out stucture.
-****************************************************************************/
-int PMAPI BE_int86(
- int intno,
- RMREGS *in,
- RMREGS *out)
-{
- M.x86.R_EAX = in->e.eax;
- M.x86.R_EBX = in->e.ebx;
- M.x86.R_ECX = in->e.ecx;
- M.x86.R_EDX = in->e.edx;
- M.x86.R_ESI = in->e.esi;
- M.x86.R_EDI = in->e.edi;
- ((u8*)M.mem_base)[0x4000] = 0xCD;
- ((u8*)M.mem_base)[0x4001] = (u8)intno;
- ((u8*)M.mem_base)[0x4002] = 0xC3;
- M.x86.R_CS = SEG(0x04000);
- M.x86.R_IP = OFF(0x04000);
- M.x86.R_SS = SEG(M.mem_size - 1);
- M.x86.R_SP = OFF(M.mem_size - 1);
- X86EMU_exec();
- out->e.cflag = M.x86.R_EFLG & F_CF;
- out->e.eax = M.x86.R_EAX;
- out->e.ebx = M.x86.R_EBX;
- out->e.ecx = M.x86.R_ECX;
- out->e.edx = M.x86.R_EDX;
- out->e.esi = M.x86.R_ESI;
- out->e.edi = M.x86.R_EDI;
- return out->x.ax;
-}
-
-/****************************************************************************
-PARAMETERS:
-intno - Interrupt number to execute
-in - Real mode registers to load
-out - Place to store resulting real mode registers
-sregs - Real mode segment registers to load
-
-REMARKS:
-This functions calls a real mode interrupt function at the specified address,
-and loads all the x86 registers from the passed in registers structure.
-On exit the registers returned from the call are returned in out stucture.
-****************************************************************************/
-int PMAPI BE_int86x(
- int intno,
- RMREGS *in,
- RMREGS *out,
- RMSREGS *sregs)
-{
- M.x86.R_EAX = in->e.eax;
- M.x86.R_EBX = in->e.ebx;
- M.x86.R_ECX = in->e.ecx;
- M.x86.R_EDX = in->e.edx;
- M.x86.R_ESI = in->e.esi;
- M.x86.R_EDI = in->e.edi;
- M.x86.R_DS = sregs->ds;
- M.x86.R_ES = sregs->es;
- M.x86.R_FS = sregs->fs;
- M.x86.R_GS = sregs->gs;
- ((u8*)M.mem_base)[0x4000] = 0xCD;
- ((u8*)M.mem_base)[0x4001] = (u8)intno;
- ((u8*)M.mem_base)[0x4002] = 0xC3;
- M.x86.R_CS = SEG(0x04000);
- M.x86.R_IP = OFF(0x04000);
- M.x86.R_SS = SEG(M.mem_size - 1);
- M.x86.R_SP = OFF(M.mem_size - 1);
- X86EMU_exec();
- out->e.cflag = M.x86.R_EFLG & F_CF;
- out->e.eax = M.x86.R_EAX;
- out->e.ebx = M.x86.R_EBX;
- out->e.ecx = M.x86.R_ECX;
- out->e.edx = M.x86.R_EDX;
- out->e.esi = M.x86.R_ESI;
- out->e.edi = M.x86.R_EDI;
- sregs->ds = M.x86.R_DS;
- sregs->es = M.x86.R_ES;
- sregs->fs = M.x86.R_FS;
- sregs->gs = M.x86.R_GS;
- return out->x.ax;
-}
-
-#ifdef __DRIVER__
-
-/****************************************************************************
-REMARKS:
-Empty log function for binary portable DLL. The BPD is compiled without
-debug information, so very little is logged anyway so it is simpler this
-way.
-****************************************************************************/
-void printk(const char *msg, ...)
-{
-}
-
-/****************************************************************************
-REMARKS:
-Fatal error handler called when a non-imported function is called by the
-driver. We leave this to a runtime error so that older applications and
-shell drivers will work with newer bpd drivers provided no newer functions
-are required by the driver itself. If they are, the application or shell
-driver needs to be recompiled.
-****************************************************************************/
-static void _PM_fatalErrorHandler(void)
-{
- PM_fatalError("Unsupported PM_imports import function called! Please re-compile!\n");
-}
-
-/****************************************************************************
-PARAMETERS:
-beImp - BE library imports
-beImp - Generic emulator imports
-
-RETURNS:
-Pointer to exported function list
-
-REMARKS:
-This function initialises the BIOS emulator library and returns the list of
-loader library exported functions.
-{secret}
-****************************************************************************/
-BE_exports * _CEXPORT BE_initLibrary(
- PM_imports *pmImp)
-{
- static BE_exports _BE_exports = {
- sizeof(BE_exports),
- BE_init,
- BE_setVGA,
- BE_getVGA,
- BE_mapRealPointer,
- BE_getVESABuf,
- BE_callRealMode,
- BE_int86,
- BE_int86x,
- NULL,
- BE_exit,
- };
- int i,max;
- ulong *p;
-
- /* Initialize all default imports to point to fatal error handler */
- /* for upwards compatibility. */
- max = sizeof(_PM_imports)/sizeof(BE_initLibrary_t);
- for (i = 0,p = (ulong*)&_PM_imports; i < max; i++)
- *p++ = (ulong)_PM_fatalErrorHandler;
-
- /* Now copy all our imported functions */
- memcpy(&_PM_imports,pmImp,MIN(sizeof(_PM_imports),pmImp->dwSize));
- return &_BE_exports;
-}
-
-#endif /* __DRIVER__ */
diff --git a/board/MAI/bios_emulator/scitech/src/biosemu/biosemui.h b/board/MAI/bios_emulator/scitech/src/biosemu/biosemui.h
deleted file mode 100644
index 23edebc95c..0000000000
--- a/board/MAI/bios_emulator/scitech/src/biosemu/biosemui.h
+++ /dev/null
@@ -1,79 +0,0 @@
-/****************************************************************************
-*
-* BIOS emulator and interface
-* to Realmode X86 Emulator Library
-*
-* Copyright (C) 1996-1999 SciTech Software, Inc.
-*
-* ========================================================================
-*
-* Permission to use, copy, modify, distribute, and sell this software and
-* its documentation for any purpose is hereby granted without fee,
-* provided that the above copyright notice appear in all copies and that
-* both that copyright notice and this permission notice appear in
-* supporting documentation, and that the name of the authors not be used
-* in advertising or publicity pertaining to distribution of the software
-* without specific, written prior permission. The authors makes no
-* representations about the suitability of this software for any purpose.
-* It is provided "as is" without express or implied warranty.
-*
-* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
-* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
-* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
-* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
-* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
-* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
-* PERFORMANCE OF THIS SOFTWARE.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-* Developer: Kendall Bennett
-*
-* Description: Internal header file for the BIOS emulator library.
-*
-****************************************************************************/
-
-#ifndef __BIOSEMUI_H
-#define __BIOSEMUI_H
-
-#include <biosemu.h>
-
-/*---------------------- Macros and type definitions ----------------------*/
-
-#ifdef DEBUG
-#define DB(x) x
-#else
-#define DB(x)
-#endif
-
-#define BIOS_SEG 0xfff0
-
-#define M _X86EMU_env
-
-/*-------------------------- Function Prototypes --------------------------*/
-
-/* bios.c */
-
-void _BE_bios_init(u32 *intrTab);
-void _BE_setup_funcs(void);
-
-/* besys.c */
-
-u8 X86API BE_rdb(u32 addr);
-u16 X86API BE_rdw(u32 addr);
-u32 X86API BE_rdl(u32 addr);
-void X86API BE_wrb(u32 addr,u8 val);
-void X86API BE_wrw(u32 addr,u16 val);
-void X86API BE_wrl(u32 addr,u32 val);
-#ifdef DEBUG
-u8 X86API BE_inb(int port);
-u16 X86API BE_inw(int port);
-u32 X86API BE_inl(int port);
-void X86API BE_outb(int port, u8 val);
-void X86API BE_outw(int port, u16 val);
-void X86API BE_outl(int port, u32 val);
-#endif
-
-#endif /* __BIOSEMUI_H */
diff --git a/board/MAI/bios_emulator/scitech/src/biosemu/makefile b/board/MAI/bios_emulator/scitech/src/biosemu/makefile
deleted file mode 100644
index 80730b2997..0000000000
--- a/board/MAI/bios_emulator/scitech/src/biosemu/makefile
+++ /dev/null
@@ -1,99 +0,0 @@
-#############################################################################
-#
-# BIOS emulator and interface
-# to Realmode X86 Emulator Library
-#
-# Copyright (C) 1996-1999 SciTech Software, Inc.
-#
-# ========================================================================
-#
-# Permission to use, copy, modify, distribute, and sell this software and
-# its documentation for any purpose is hereby granted without fee,
-# provided that the above copyright notice appear in all copies and that
-# both that copyright notice and this permission notice appear in
-# supporting documentation, and that the name of the authors not be used
-# in advertising or publicity pertaining to distribution of the software
-# without specific, written prior permission. The authors makes no
-# representations about the suitability of this software for any purpose.
-# It is provided "as is" without express or implied warranty.
-#
-# THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
-# INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
-# EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
-# CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
-# USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
-# OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
-# PERFORMANCE OF THIS SOFTWARE.
-#
-# ========================================================================
-#
-# Descripton: Generic makefile for the x86emu library. Requires
-# the SciTech Software makefile definitions package to be
-# installed, which uses the DMAKE make program.
-#
-#############################################################################
-
-.IMPORT .IGNORE: DEBUG
-
-#----------------------------------------------------------------------------
-# Define the lists of object files
-#----------------------------------------------------------------------------
-
-DLL_OBJS = dllstart$O _pm_imp$O
-BIOS_OBJS = biosemu$O bios$O besys$O
-X86_OBJS = sys$O decode$O ops$O ops2$O prim_ops$O fpu$O debug$O
-CFLAGS += -DSCITECH -I$(SCITECH)\src\x86emu
-
-.IF $(BUILD_DLL)
-
-CFLAGS += -I$(PRIVATE)\include\drvlib -I$(SCITECH)\include\drvlib -D__DRIVER__
-ASFLAGS += -d__DRIVER__
-EXELIBS = drvlib$L
-
-.ELSE
-
-.IF $(DEBUG)
-CFLAGS += -DDEBUG
-.ENDIF
-OBJECTS = $(BIOS_OBJS) $(X86_OBJS)
-LIBCLEAN = *.dll *.lib *.a
-LIBFILE = $(LP)biosemu$L
-
-.ENDIF
-
-#----------------------------------------------------------------------------
-# Sample test programs
-#----------------------------------------------------------------------------
-
-all: $(LIBFILE) warmboot$E
-
-warmboot$E: warmboot$O $(LIBFILE)
-
-#----------------------------------------------------------------------------
-# Target to build the Binary Portable DLL target
-#----------------------------------------------------------------------------
-
-biosemu.dll: $(DLL_OBJS) $(BIOS_OBJS) $(X86_OBJS)
-
-#----------------------------------------------------------------------------
-# Target to build all Intel binary drivers
-#----------------------------------------------------------------------------
-
-.PHONY mkdrv:
- @build wc11-w32 biosemu.dll -u BUILD_DLL=1 NO_RUNTIME=1 OPT=1
- @$(CP) biosemu.dll $(PRIVATE)\nucleus\graphics\biosemu.bpd
- @dmake cleanexe
-
-.PHONY db:
- @build wc11-w32 biosemu.dll BUILD_DLL=1 NO_RUNTIME=1 OPT=1
- @$(CP) biosemu.dll $(PRIVATE)\nucleus\graphics\biosemu.bpd
-
-#----------------------------------------------------------------------------
-# Define the list of object files to create dependency information for
-#----------------------------------------------------------------------------
-
-DEPEND_OBJ = warmboot$O $(BIOS_OBJS) $(X86_OBJS) $(DLL_OBJS)
-DEPEND_SRC = $(SCITECH)/src/x86emu;$(PRIVATE)/src/common
-.SOURCE: $(SCITECH)/src/x86emu $(PRIVATE)/src/common
-
-.INCLUDE: "$(SCITECH)/makedefs/common.mk"
diff --git a/board/MAI/bios_emulator/scitech/src/biosemu/makefile.cross b/board/MAI/bios_emulator/scitech/src/biosemu/makefile.cross
deleted file mode 100644
index 9141003076..0000000000
--- a/board/MAI/bios_emulator/scitech/src/biosemu/makefile.cross
+++ /dev/null
@@ -1,10 +0,0 @@
-CC = ppc-elf32-gcc
-AR = ppc-elf32-ar
-
-CFLAGS = -D__DRIVER__ -I../../include -DDEBUG -I.
-
-BIOS_OBJS = biosemu.o bios.o besys.o
-X86_OBJS = sys.o decode.o ops.o prim_ops.o fpu.o debug.o
-
-libbios.a: $(BIOS_OBJS)
- $(AR) rcs libbios.a $(BIOS_OBJS) \ No newline at end of file
diff --git a/board/MAI/bios_emulator/scitech/src/biosemu/warmboot.c b/board/MAI/bios_emulator/scitech/src/biosemu/warmboot.c
deleted file mode 100644
index 98d5fb8a62..0000000000
--- a/board/MAI/bios_emulator/scitech/src/biosemu/warmboot.c
+++ /dev/null
@@ -1,569 +0,0 @@
-/****************************************************************************
-*
-* BIOS emulator and interface
-* to Realmode X86 Emulator Library
-*
-* Copyright (C) 1996-1999 SciTech Software, Inc.
-*
-* ========================================================================
-*
-* Permission to use, copy, modify, distribute, and sell this software and
-* its documentation for any purpose is hereby granted without fee,
-* provided that the above copyright notice appear in all copies and that
-* both that copyright notice and this permission notice appear in
-* supporting documentation, and that the name of the authors not be used
-* in advertising or publicity pertaining to distribution of the software
-* without specific, written prior permission. The authors makes no
-* representations about the suitability of this software for any purpose.
-* It is provided "as is" without express or implied warranty.
-*
-* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
-* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
-* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
-* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
-* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
-* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
-* PERFORMANCE OF THIS SOFTWARE.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-* Developer: Kendall Bennett
-*
-* Description: Module to implement warm booting of all PCI/AGP controllers
-* on the bus. We use the x86 real mode emulator to run the
-* BIOS on the primary and secondary controllers to bring
-* the cards up.
-*
-****************************************************************************/
-
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <stdarg.h>
-#include "biosemu.h"
-#ifndef _MAX_PATH
-#define _MAX_PATH 256
-#endif
-
-/*------------------------- Global Variables ------------------------------*/
-
-static PCIDeviceInfo PCI[MAX_PCI_DEVICES];
-static int NumPCI = -1;
-static int BridgeIndex[MAX_PCI_DEVICES] = {0};
-static int NumBridges;
-static PCIBridgeInfo *AGPBridge = NULL;
-static int DeviceIndex[MAX_PCI_DEVICES] = {0};
-static int NumDevices;
-static u32 debugFlags = 0;
-static BE_VGAInfo VGAInfo[MAX_PCI_DEVICES] = {{0}};
-static ibool useV86 = false;
-static ibool forcePost = false;
-
-/* Length of the BIOS image */
-
-#define MAX_BIOSLEN (64 * 1024L)
-#define FINAL_BIOSLEN (32 * 1024L)
-
-/* Macro to determine if the VGA is enabled and responding */
-
-#define VGA_NOT_ACTIVE() (forcePost || (PM_inpb(0x3CC) == 0xFF) || ((PM_inpb(0x3CC) & 0x2) == 0))
-
-#define ENABLE_DEVICE(device) \
- PCI_writePCIRegB(0x4,PCI[DeviceIndex[device]].Command | 0x7,device)
-
-#define DISABLE_DEVICE(device) \
- PCI_writePCIRegB(0x4,0,device)
-
-/* Macros to enable and disable AGP VGA resources */
-
-#define ENABLE_AGP_VGA() \
- PCI_accessReg(0x3E,AGPBridge->BridgeControl | 0x8,PCI_WRITE_WORD,(PCIDeviceInfo*)AGPBridge)
-
-#define DISABLE_AGP_VGA() \
- PCI_accessReg(0x3E,AGPBridge->BridgeControl & ~0x8,PCI_WRITE_WORD,(PCIDeviceInfo*)AGPBridge)
-
-#define RESTORE_AGP_VGA() \
- PCI_accessReg(0x3E,AGPBridge->BridgeControl,PCI_WRITE_WORD,(PCIDeviceInfo*)AGPBridge)
-
-/*-------------------------- Implementation -------------------------------*/
-
-/****************************************************************************
-RETURNS:
-The address to use to map the secondary BIOS (PCI/AGP devices)
-
-REMARKS:
-Searches all the PCI base address registers for the device looking for a
-memory mapping that is large enough to hold our ROM BIOS. We usually end up
-finding the framebuffer mapping (usually BAR 0x10), and we use this mapping
-to map the BIOS for the device into. We use a mapping that is already
-assigned to the device to ensure the memory range will be passed through
-by any PCI->PCI or AGP->PCI bridge that may be present.
-
-NOTE: Usually this function is only used for AGP devices, but it may be
- used for PCI devices that have already been POST'ed and the BIOS
- ROM base address has been zero'ed out.
-****************************************************************************/
-static ulong PCI_findBIOSAddr(
- int device)
-{
- ulong base,size;
- int bar;
-
- for (bar = 0x10; bar <= 0x14; bar++) {
- base = PCI_readPCIRegL(bar,device) & ~0xFF;
- if (!(base & 0x1)) {
- PCI_writePCIRegL(bar,0xFFFFFFFF,device);
- size = PCI_readPCIRegL(bar,device) & ~0xFF;
- size = ~size+1;
- PCI_writePCIRegL(bar,0,device);
- if (size >= MAX_BIOSLEN)
- return base;
- }
- }
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-Re-writes the PCI base address registers for the secondary PCI controller
-with the values from our initial PCI bus enumeration. This fixes up the
-values after we have POST'ed the secondary display controller BIOS, which
-may have incorrectly re-programmed the base registers the same as the
-primary display controller (the case for identical S3 cards).
-****************************************************************************/
-static void _PCI_fixupSecondaryBARs(void)
-{
- int i;
-
- for (i = 0; i < NumDevices; i++) {
- PCI_writePCIRegL(0x10,PCI[DeviceIndex[i]].BaseAddress10,i);
- PCI_writePCIRegL(0x14,PCI[DeviceIndex[i]].BaseAddress14,i);
- PCI_writePCIRegL(0x18,PCI[DeviceIndex[i]].BaseAddress18,i);
- PCI_writePCIRegL(0x1C,PCI[DeviceIndex[i]].BaseAddress1C,i);
- PCI_writePCIRegL(0x20,PCI[DeviceIndex[i]].BaseAddress20,i);
- PCI_writePCIRegL(0x24,PCI[DeviceIndex[i]].BaseAddress24,i);
- }
-}
-
-/****************************************************************************
-RETURNS:
-True if successfully initialised, false if not.
-
-REMARKS:
-This function executes the BIOS POST code on the controller. We assume that
-at this stage the controller has its I/O and memory space enabled and
-that all other controllers are in a disabled state.
-****************************************************************************/
-static void PCI_doBIOSPOST(
- int device,
- ulong BIOSPhysAddr,
- void *mappedBIOS,
- ulong BIOSLen)
-{
- RMREGS regs;
- RMSREGS sregs;
-
- /* Determine the value to store in AX for BIOS POST */
- regs.x.ax = (u16)(PCI[DeviceIndex[device]].slot.i >> 8);
- if (useV86) {
- /* Post the BIOS using the PM functions (ie: v86 mode on Linux) */
- if (!PM_doBIOSPOST(regs.x.ax,BIOSPhysAddr,mappedBIOS,BIOSLen)) {
- /* If the PM function fails, this probably means are we are on */
- /* DOS and can't re-map the real mode 0xC0000 region. In thise */
- /* case if the device is the primary, we can use the real */
- /* BIOS at 0xC0000 directly. */
- if (device == 0)
- PM_doBIOSPOST(regs.x.ax,0xC0000,mappedBIOS,BIOSLen);
- }
- }
- else {
- /* Setup the X86 emulator for the VGA BIOS */
- BE_setVGA(&VGAInfo[device]);
-
- /* Execute the BIOS POST code */
- BE_callRealMode(0xC000,0x0003,&regs,&sregs);
-
- /* Cleanup and exit */
- BE_getVGA(&VGAInfo[device]);
- }
-}
-
-/****************************************************************************
-RETURNS:
-True if successfully initialised, false if not.
-
-REMARKS:
-Loads and POST's the secondary controllers BIOS, directly from the BIOS
-image we can extract over the PCI bus.
-****************************************************************************/
-static ibool PCI_postControllers(void)
-{
- int device;
- ulong BIOSImageLen,mappedBIOSPhys;
- uchar *mappedBIOS,*copyOfBIOS;
- char filename[_MAX_PATH];
- FILE *f;
-
- /* Disable the primary display controller and AGP VGA pass-through */
- DISABLE_DEVICE(0);
- if (AGPBridge)
- DISABLE_AGP_VGA();
-
- /* Now POST all the secondary controllers */
- for (device = 0; device < NumDevices; device++) {
- /* Skip the device if it is not enabled (probably an ISA device) */
- if (DeviceIndex[device] == -1)
- continue;
-
- /* Enable secondary display controller. If the secondary controller */
- /* is on the AGP bus, then enable VGA resources for the AGP device. */
- ENABLE_DEVICE(device);
- if (AGPBridge && AGPBridge->SecondayBusNumber == PCI[DeviceIndex[device]].slot.p.Bus)
- ENABLE_AGP_VGA();
-
- /* Check if the controller has already been POST'ed */
- if (VGA_NOT_ACTIVE()) {
- /* Find a viable place to map the secondary PCI BIOS image and map it */
- printk("Device %d not enabled, so attempting warm boot it\n", device);
-
- /* For AGP devices (and PCI devices that do have the ROM base */
- /* address zero'ed out) we have to map the BIOS to a location */
- /* that is passed by the AGP bridge to the bus. Some AGP devices */
- /* have the ROM base address already set up for us, and some */
- /* do not (we map to one of the existing BAR locations in */
- /* this case). */
- mappedBIOS = NULL;
- if (PCI[DeviceIndex[device]].ROMBaseAddress != 0)
- mappedBIOSPhys = PCI[DeviceIndex[device]].ROMBaseAddress & ~0xF;
- else
- mappedBIOSPhys = PCI_findBIOSAddr(device);
- printk("Mapping BIOS image to 0x%08X\n", mappedBIOSPhys);
- mappedBIOS = PM_mapPhysicalAddr(mappedBIOSPhys,MAX_BIOSLEN-1,false);
- PCI_writePCIRegL(0x30,mappedBIOSPhys | 0x1,device);
- BIOSImageLen = mappedBIOS[2] * 512;
- if ((copyOfBIOS = malloc(BIOSImageLen)) == NULL)
- return false;
- memcpy(copyOfBIOS,mappedBIOS,BIOSImageLen);
- PM_freePhysicalAddr(mappedBIOS,MAX_BIOSLEN-1);
-
- /* Allocate memory to store copy of BIOS from secondary controllers */
- VGAInfo[device].pciInfo = &PCI[DeviceIndex[device]];
- VGAInfo[device].BIOSImage = copyOfBIOS;
- VGAInfo[device].BIOSImageLen = BIOSImageLen;
-
- /* Restore device mappings */
- PCI_writePCIRegL(0x30,PCI[DeviceIndex[device]].ROMBaseAddress,device);
- PCI_writePCIRegL(0x10,PCI[DeviceIndex[device]].BaseAddress10,device);
- PCI_writePCIRegL(0x14,PCI[DeviceIndex[device]].BaseAddress14,device);
-
- /* Now execute the BIOS POST for the device */
- if (copyOfBIOS[0] == 0x55 && copyOfBIOS[1] == 0xAA) {
- printk("Executing BIOS POST for controller.\n");
- PCI_doBIOSPOST(device,mappedBIOSPhys,copyOfBIOS,BIOSImageLen);
- }
-
- /* Reset the size of the BIOS image to the final size */
- VGAInfo[device].BIOSImageLen = FINAL_BIOSLEN;
-
- /* Save the BIOS and interrupt vector information to disk */
- sprintf(filename,"%s/bios.%02d",PM_getNucleusConfigPath(),device);
- if ((f = fopen(filename,"wb")) != NULL) {
- fwrite(copyOfBIOS,1,FINAL_BIOSLEN,f);
- fwrite(VGAInfo[device].LowMem,1,sizeof(VGAInfo[device].LowMem),f);
- fclose(f);
- }
- }
- else {
- /* Allocate memory to store copy of BIOS from secondary controllers */
- if ((copyOfBIOS = malloc(FINAL_BIOSLEN)) == NULL)
- return false;
- VGAInfo[device].pciInfo = &PCI[DeviceIndex[device]];
- VGAInfo[device].BIOSImage = copyOfBIOS;
- VGAInfo[device].BIOSImageLen = FINAL_BIOSLEN;
-
- /* Load the BIOS and interrupt vector information from disk */
- sprintf(filename,"%s/bios.%02d",PM_getNucleusConfigPath(),device);
- if ((f = fopen(filename,"rb")) != NULL) {
- fread(copyOfBIOS,1,FINAL_BIOSLEN,f);
- fread(VGAInfo[device].LowMem,1,sizeof(VGAInfo[device].LowMem),f);
- fclose(f);
- }
- }
-
- /* Fix up all the secondary PCI base address registers */
- /* (restores them all from the values we read previously) */
- _PCI_fixupSecondaryBARs();
-
- /* Disable the secondary controller and AGP VGA pass-through */
- DISABLE_DEVICE(device);
- if (AGPBridge)
- DISABLE_AGP_VGA();
- }
-
- /* Reenable primary display controller and reset AGP bridge control */
- if (AGPBridge)
- RESTORE_AGP_VGA();
- ENABLE_DEVICE(0);
-
- /* Free physical BIOS image mapping */
- PM_freePhysicalAddr(mappedBIOS,MAX_BIOSLEN-1);
-
- /* Restore the X86 emulator BIOS info to primary controller */
- if (!useV86)
- BE_setVGA(&VGAInfo[0]);
- return true;
-}
-
-/****************************************************************************
-REMARKS:
-Enumerates the PCI bus and dumps the PCI configuration information to the
-log file.
-****************************************************************************/
-static void EnumeratePCI(void)
-{
- int i,index;
- PCIBridgeInfo *info;
-
- printk("Displaying enumeration of PCI bus (%d devices, %d display devices)\n",
- NumPCI, NumDevices);
- for (index = 0; index < NumDevices; index++)
- printk(" Display device %d is PCI device %d\n",index,DeviceIndex[index]);
- printk("\n");
- printk("Bus Slot Fnc DeviceID SubSystem Rev Class IRQ Int Cmd\n");
- for (i = 0; i < NumPCI; i++) {
- printk("%2d %2d %2d %04X:%04X %04X:%04X %02X %02X:%02X %02X %02X %04X ",
- PCI[i].slot.p.Bus,
- PCI[i].slot.p.Device,
- PCI[i].slot.p.Function,
- PCI[i].VendorID,
- PCI[i].DeviceID,
- PCI[i].SubSystemVendorID,
- PCI[i].SubSystemID,
- PCI[i].RevID,
- PCI[i].BaseClass,
- PCI[i].SubClass,
- PCI[i].InterruptLine,
- PCI[i].InterruptPin,
- PCI[i].Command);
- for (index = 0; index < NumDevices; index++) {
- if (DeviceIndex[index] == i)
- break;
- }
- if (index < NumDevices)
- printk("<- %d\n", index);
- else
- printk("\n");
- }
- printk("\n");
- printk("DeviceID Stat Ifc Cch Lat Hdr BIST\n");
- for (i = 0; i < NumPCI; i++) {
- printk("%04X:%04X %04X %02X %02X %02X %02X %02X ",
- PCI[i].VendorID,
- PCI[i].DeviceID,
- PCI[i].Status,
- PCI[i].Interface,
- PCI[i].CacheLineSize,
- PCI[i].LatencyTimer,
- PCI[i].HeaderType,
- PCI[i].BIST);
- for (index = 0; index < NumDevices; index++) {
- if (DeviceIndex[index] == i)
- break;
- }
- if (index < NumDevices)
- printk("<- %d\n", index);
- else
- printk("\n");
- }
- printk("\n");
- printk("DeviceID Base10h Base14h Base18h Base1Ch Base20h Base24h ROMBase\n");
- for (i = 0; i < NumPCI; i++) {
- printk("%04X:%04X %08X %08X %08X %08X %08X %08X %08X ",
- PCI[i].VendorID,
- PCI[i].DeviceID,
- PCI[i].BaseAddress10,
- PCI[i].BaseAddress14,
- PCI[i].BaseAddress18,
- PCI[i].BaseAddress1C,
- PCI[i].BaseAddress20,
- PCI[i].BaseAddress24,
- PCI[i].ROMBaseAddress);
- for (index = 0; index < NumDevices; index++) {
- if (DeviceIndex[index] == i)
- break;
- }
- if (index < NumDevices)
- printk("<- %d\n", index);
- else
- printk("\n");
- }
- printk("\n");
- printk("DeviceID BAR10Len BAR14Len BAR18Len BAR1CLen BAR20Len BAR24Len ROMLen\n");
- for (i = 0; i < NumPCI; i++) {
- printk("%04X:%04X %08X %08X %08X %08X %08X %08X %08X ",
- PCI[i].VendorID,
- PCI[i].DeviceID,
- PCI[i].BaseAddress10Len,
- PCI[i].BaseAddress14Len,
- PCI[i].BaseAddress18Len,
- PCI[i].BaseAddress1CLen,
- PCI[i].BaseAddress20Len,
- PCI[i].BaseAddress24Len,
- PCI[i].ROMBaseAddressLen);
- for (index = 0; index < NumDevices; index++) {
- if (DeviceIndex[index] == i)
- break;
- }
- if (index < NumDevices)
- printk("<- %d\n", index);
- else
- printk("\n");
- }
- printk("\n");
- printk("Displaying enumeration of %d bridge devices\n",NumBridges);
- printk("\n");
- printk("DeviceID P# S# B# IOB IOL MemBase MemLimit PreBase PreLimit Ctrl\n");
- for (i = 0; i < NumBridges; i++) {
- info = (PCIBridgeInfo*)&PCI[BridgeIndex[i]];
- printk("%04X:%04X %02X %02X %02X %04X %04X %08X %08X %08X %08X %04X\n",
- info->VendorID,
- info->DeviceID,
- info->PrimaryBusNumber,
- info->SecondayBusNumber,
- info->SubordinateBusNumber,
- ((u16)info->IOBase << 8) & 0xF000,
- info->IOLimit ?
- ((u16)info->IOLimit << 8) | 0xFFF : 0,
- ((u32)info->MemoryBase << 16) & 0xFFF00000,
- info->MemoryLimit ?
- ((u32)info->MemoryLimit << 16) | 0xFFFFF : 0,
- ((u32)info->PrefetchableMemoryBase << 16) & 0xFFF00000,
- info->PrefetchableMemoryLimit ?
- ((u32)info->PrefetchableMemoryLimit << 16) | 0xFFFFF : 0,
- info->BridgeControl);
- }
- printk("\n");
-}
-
-/****************************************************************************
-RETURNS:
-Number of display devices found.
-
-REMARKS:
-This function enumerates the number of available display devices on the
-PCI bus, and returns the number found.
-****************************************************************************/
-static int PCI_enumerateDevices(void)
-{
- int i,j;
- PCIBridgeInfo *info;
-
- /* If this is the first time we have been called, enumerate all */
- /* devices on the PCI bus. */
- if (NumPCI == -1) {
- for (i = 0; i < MAX_PCI_DEVICES; i++)
- PCI[i].dwSize = sizeof(PCI[i]);
- if ((NumPCI = PCI_enumerate(PCI,MAX_PCI_DEVICES)) == 0)
- return -1;
-
- /* Build a list of all PCI bridge devices */
- for (i = 0,NumBridges = 0,BridgeIndex[0] = -1; i < NumPCI; i++) {
- if (PCI[i].BaseClass == PCI_BRIDGE_CLASS) {
- if (NumBridges < MAX_PCI_DEVICES)
- BridgeIndex[NumBridges++] = i;
- }
- }
-
- /* Now build a list of all display class devices */
- for (i = 0,NumDevices = 1,DeviceIndex[0] = -1; i < NumPCI; i++) {
- if (PCI_IS_DISPLAY_CLASS(&PCI[i])) {
- if ((PCI[i].Command & 0x3) == 0x3) {
- DeviceIndex[0] = i;
- }
- else {
- if (NumDevices < MAX_PCI_DEVICES)
- DeviceIndex[NumDevices++] = i;
- }
- if (PCI[i].slot.p.Bus != 0) {
- /* This device is on a different bus than the primary */
- /* PCI bus, so it is probably an AGP device. Find the */
- /* AGP bus device that controls that bus so we can */
- /* control it. */
- for (j = 0; j < NumBridges; j++) {
- info = (PCIBridgeInfo*)&PCI[BridgeIndex[j]];
- if (info->SecondayBusNumber == PCI[i].slot.p.Bus) {
- AGPBridge = info;
- break;
- }
- }
- }
- }
- }
-
- /* Enumerate all PCI and bridge devices to log file */
- EnumeratePCI();
- }
- return NumDevices;
-}
-
-FILE *logfile;
-
-void printk(const char *fmt, ...)
-{
- va_list argptr;
- va_start(argptr, fmt);
- vfprintf(logfile, fmt, argptr);
- fflush(logfile);
- va_end(argptr);
-}
-
-int main(int argc,char *argv[])
-{
- while (argc > 1) {
- if (stricmp(argv[1],"-usev86") == 0) {
- useV86 = true;
- }
- else if (stricmp(argv[1],"-force") == 0) {
- forcePost = true;
- }
-#ifdef DEBUG
- else if (stricmp(argv[1],"-decode") == 0) {
- debugFlags |= DEBUG_DECODE_F;
- }
- else if (stricmp(argv[1],"-iotrace") == 0) {
- debugFlags |= DEBUG_IO_TRACE_F;
- }
-#endif
- else {
- printf("Usage: warmboot [-usev86] [-force] [-decode] [-iotrace]\n");
- exit(-1);
- }
- argc--;
- argv++;
- }
- if ((logfile = fopen("warmboot.log","w")) == NULL)
- exit(1);
-
- PM_init();
- if (!useV86) {
- /* Initialise the x86 BIOS emulator */
- BE_init(false,debugFlags,65536,&VGAInfo[0]);
- }
-
- /* Enumerate all devices (which POST's them at the same time) */
- if (PCI_enumerateDevices() < 1) {
- printk("No PCI display devices found!\n");
- return -1;
- }
-
- /* Post all the display controller BIOS'es */
- PCI_postControllers();
-
- /* Cleanup and exit the emulator */
- if (!useV86)
- BE_exit();
- fclose(logfile);
- return 0;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/common/_aa_imp.asm b/board/MAI/bios_emulator/scitech/src/common/_aa_imp.asm
deleted file mode 100644
index 61a9024ab3..0000000000
--- a/board/MAI/bios_emulator/scitech/src/common/_aa_imp.asm
+++ /dev/null
@@ -1,51 +0,0 @@
-;****************************************************************************
-;*
-;* SciTech Nucleus Audio Architecture
-;*
-;* Copyright (C) 1991-1998 SciTech Software, Inc.
-;* All rights reserved.
-;*
-;* ======================================================================
-;* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-;* | |
-;* |This copyrighted computer code contains proprietary technology |
-;* |owned by SciTech Software, Inc., located at 505 Wall Street, |
-;* |Chico, CA 95928 USA (http://www.scitechsoft.com). |
-;* | |
-;* |The contents of this file are subject to the SciTech Nucleus |
-;* |License; you may *not* use this file or related software except in |
-;* |compliance with the License. You may obtain a copy of the License |
-;* |at http://www.scitechsoft.com/nucleus-license.txt |
-;* | |
-;* |Software distributed under the License is distributed on an |
-;* |"AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or |
-;* |implied. See the License for the specific language governing |
-;* |rights and limitations under the License. |
-;* | |
-;* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-;* ======================================================================
-;*
-;* Language: TASM 4.0 or NASM
-;* Environment: IBM PC 32 bit Protected Mode.
-;*
-;* Description: Module to implement the import stubs for all the Nucleus
-;* Audio API functions for Intel binary compatible drivers.
-;*
-;****************************************************************************
-
- IDEAL
-
-include "scitech.mac" ; Memory model macros
-
-BEGIN_IMPORTS_DEF _AA_exports
-SKIP_IMP AA_status ; Implemented in C code
-SKIP_IMP AA_errorMsg ; Implemented in C code
-SKIP_IMP AA_getDaysLeft ; Implemented in C code
-SKIP_IMP AA_registerLicense ; Implemented in C code
-SKIP_IMP AA_enumerateDevices ; Implemented in C code
-SKIP_IMP AA_loadDriver ; Implemented in C code
-DECLARE_IMP AA_unloadDriver
-DECLARE_IMP AA_saveOptions
-END_IMPORTS_DEF
-
- END
diff --git a/board/MAI/bios_emulator/scitech/src/common/_ga_imp.asm b/board/MAI/bios_emulator/scitech/src/common/_ga_imp.asm
deleted file mode 100644
index 5317600438..0000000000
--- a/board/MAI/bios_emulator/scitech/src/common/_ga_imp.asm
+++ /dev/null
@@ -1,136 +0,0 @@
-;****************************************************************************
-;*
-;* SciTech Nucleus Graphics Architecture
-;*
-;* Copyright (C) 1991-1998 SciTech Software, Inc.
-;* All rights reserved.
-;*
-;* ======================================================================
-;* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-;* | |
-;* |This copyrighted computer code contains proprietary technology |
-;* |owned by SciTech Software, Inc., located at 505 Wall Street, |
-;* |Chico, CA 95928 USA (http://www.scitechsoft.com). |
-;* | |
-;* |The contents of this file are subject to the SciTech Nucleus |
-;* |License; you may *not* use this file or related software except in |
-;* |compliance with the License. You may obtain a copy of the License |
-;* |at http://www.scitechsoft.com/nucleus-license.txt |
-;* | |
-;* |Software distributed under the License is distributed on an |
-;* |"AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or |
-;* |implied. See the License for the specific language governing |
-;* |rights and limitations under the License. |
-;* | |
-;* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-;* ======================================================================
-;*
-;* Language: TASM 4.0 or NASM
-;* Environment: IBM PC 32 bit Protected Mode.
-;*
-;* Description: Module to implement the import stubs for all the Nucleus
-;* Graphics API functions for Intel binary compatible drivers.
-;*
-;****************************************************************************
-
- IDEAL
-
-include "scitech.mac" ; Memory model macros
-
-BEGIN_IMPORTS_DEF __GA_exports
-SKIP_IMP GA_status,0 ; Implemented in C code
-SKIP_IMP GA_errorMsg,1 ; Implemented in C code
-SKIP_IMP GA_getDaysLeft,1 ; Implemented in C code
-SKIP_IMP GA_registerLicense,2 ; Implemented in C code
-SKIP_IMP GA_enumerateDevices,1 ; Implemented in C code
-SKIP_IMP GA_loadDriver,2 ; Implemented in C code
-DECLARE_IMP GA_setActiveDevice,1
-SKIP_IMP GA_reserved1,0 ; Implemented in C code
-DECLARE_IMP GA_unloadDriver,1
-DECLARE_IMP REF2D_loadDriver,6
-DECLARE_IMP REF2D_unloadDriver,2
-DECLARE_IMP GA_loadRef2d,5
-DECLARE_IMP GA_unloadRef2d,1
-DECLARE_IMP GA_softStereoInit,1
-DECLARE_IMP GA_softStereoOn,0
-DECLARE_IMP GA_softStereoScheduleFlip,2
-DECLARE_IMP GA_softStereoGetFlipStatus,0
-DECLARE_IMP GA_softStereoWaitTillFlipped,0
-DECLARE_IMP GA_softStereoOff,0
-DECLARE_IMP GA_softStereoExit,0
-DECLARE_IMP GA_saveModeProfile,2
-DECLARE_IMP GA_saveOptions,2
-DECLARE_IMP GA_saveCRTCTimings,1
-DECLARE_IMP GA_restoreCRTCTimings,1
-DECLARE_IMP DDC_init,1
-DECLARE_IMP DDC_readEDID,5
-DECLARE_IMP EDID_parse,3
-DECLARE_IMP MCS_begin,1
-DECLARE_IMP MCS_getCapabilitiesString,2
-DECLARE_IMP MCS_isControlSupported,1
-DECLARE_IMP MCS_enableControl,2
-DECLARE_IMP MCS_getControlMax,2
-DECLARE_IMP MCS_getControlValue,2
-DECLARE_IMP MCS_getControlValues,3
-DECLARE_IMP MCS_setControlValue,2
-DECLARE_IMP MCS_setControlValues,3
-DECLARE_IMP MCS_resetControl,1
-DECLARE_IMP MCS_saveCurrentSettings,0
-DECLARE_IMP MCS_getTimingReport,3
-DECLARE_IMP MCS_getSelfTestReport,3
-DECLARE_IMP MCS_end,0
-SKIP_IMP GA_loadInGUI,1 ; Implemented in C code
-DECLARE_IMP DDC_writeEDID,6
-DECLARE_IMP GA_useDoubleScan,1
-DECLARE_IMP GA_getMaxRefreshRate,4
-DECLARE_IMP GA_computeCRTCTimings,6
-DECLARE_IMP GA_addMode,5
-DECLARE_IMP GA_addRefresh,5
-DECLARE_IMP GA_delMode,5
-DECLARE_IMP N_getLogName,0
-SKIP_IMP2 N_log
-DECLARE_IMP MDBX_getErrCode,0
-DECLARE_IMP MDBX_getErrorMsg,0
-DECLARE_IMP MDBX_open,1
-DECLARE_IMP MDBX_close,0
-DECLARE_IMP MDBX_first,1
-DECLARE_IMP MDBX_last,1
-DECLARE_IMP MDBX_next,1
-DECLARE_IMP MDBX_prev,1
-DECLARE_IMP MDBX_insert,1
-DECLARE_IMP MDBX_update,1
-DECLARE_IMP MDBX_flush,0
-DECLARE_IMP MDBX_importINF,2
-SKIP_IMP GA_getGlobalOptions,2 ; Implemented in C code
-DECLARE_IMP GA_setGlobalOptions,1
-DECLARE_IMP GA_saveGlobalOptions,1
-DECLARE_IMP GA_getInternalName,1
-DECLARE_IMP GA_getNucleusConfigPath,0
-DECLARE_IMP GA_getFakePCIID,0
-SKIP_IMP GA_loadLibrary,3 ; Implemented in C code
-SKIP_IMP GA_isOEMVersion,1 ; Implemented in C code
-DECLARE_IMP GA_isLiteVersion,1
-DECLARE_IMP GA_getDisplaySerialNo,1
-DECLARE_IMP GA_getDisplayUserName,1
-SKIP_IMP GA_getCurrentDriver,1 ; Implemented in C code
-SKIP_IMP GA_getCurrentRef2d,1 ; Implemented in C code
-SKIP_IMP GA_getLicensedDevices,1 ; Implemented in C code
-DECLARE_IMP DDC_initExt,2
-DECLARE_IMP MCS_beginExt,2
-DECLARE_IMP GA_loadRegionMgr,3
-DECLARE_IMP GA_unloadRegionMgr,1
-DECLARE_IMP GA_getProcAddress,2
-DECLARE_IMP GA_enableVBEMode,5
-DECLARE_IMP GA_disableVBEMode,5
-DECLARE_IMP GA_loadModeProfile,2
-DECLARE_IMP GA_getCRTCTimings,4
-DECLARE_IMP GA_setCRTCTimings,4
-DECLARE_IMP GA_setDefaultRefresh,6
-DECLARE_IMP GA_saveMonitorInfo,2
-DECLARE_IMP GA_detectPnPMonitor,3
-SKIP_IMP3 GA_queryFunctions
-SKIP_IMP3 REF2D_queryFunctions
-END_IMPORTS_DEF
-
- END
-
diff --git a/board/MAI/bios_emulator/scitech/src/common/_gatimer.asm b/board/MAI/bios_emulator/scitech/src/common/_gatimer.asm
deleted file mode 100644
index 0194a62f98..0000000000
--- a/board/MAI/bios_emulator/scitech/src/common/_gatimer.asm
+++ /dev/null
@@ -1,248 +0,0 @@
-;****************************************************************************
-;*
-;* SciTech Nucleus Graphics Architecture
-;*
-;* Copyright (C) 1991-1998 SciTech Software, Inc.
-;* All rights reserved.
-;*
-;* ======================================================================
-;* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-;* | |
-;* |This copyrighted computer code contains proprietary technology |
-;* |owned by SciTech Software, Inc., located at 505 Wall Street, |
-;* |Chico, CA 95928 USA (http://www.scitechsoft.com). |
-;* | |
-;* |The contents of this file are subject to the SciTech Nucleus |
-;* |License; you may *not* use this file or related software except in |
-;* |compliance with the License. You may obtain a copy of the License |
-;* |at http://www.scitechsoft.com/nucleus-license.txt |
-;* | |
-;* |Software distributed under the License is distributed on an |
-;* |"AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or |
-;* |implied. See the License for the specific language governing |
-;* |rights and limitations under the License. |
-;* | |
-;* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-;* ======================================================================
-;*
-;* Language: 80386 Assembler, NASM or TASM
-;* Environment: IBM PC 32 bit Protected Mode.
-;*
-;* Description: Assembly support functions for the Nucleus library for
-;* the high resolution timing support functions provided by
-;* the Intel Pentium and compatible processors.
-;*
-;****************************************************************************
-
- IDEAL
-
-include "scitech.mac" ; Memory model macros
-
-header _gatimer
-
-begcodeseg _gatimer
-
-ifdef USE_NASM
-%macro mCPU_ID 0
-db 00Fh,0A2h
-%endmacro
-else
-MACRO mCPU_ID
-db 00Fh,0A2h
-ENDM
-endif
-
-ifdef USE_NASM
-%macro mRDTSC 0
-db 00Fh,031h
-%endmacro
-else
-MACRO mRDTSC
-db 00Fh,031h
-ENDM
-endif
-
-;----------------------------------------------------------------------------
-; bool _GA_haveCPUID(void)
-;----------------------------------------------------------------------------
-; Determines if we have support for the CPUID instruction.
-;----------------------------------------------------------------------------
-cprocstart _GA_haveCPUID
-
- enter_c
- pushfd ; Get original EFLAGS
- pop eax
- mov ecx, eax
- xor eax, 200000h ; Flip ID bit in EFLAGS
- push eax ; Save new EFLAGS value on stack
- popfd ; Replace current EFLAGS value
- pushfd ; Get new EFLAGS
- pop eax ; Store new EFLAGS in EAX
- xor eax, ecx ; Can not toggle ID bit,
- jnz @@1 ; Processor=80486
- mov eax,0 ; We dont have CPUID support
- jmp @@Done
-@@1: mov eax,1 ; We have CPUID support
-@@Done: leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; uint _GA_getCPUIDFeatures(void)
-;----------------------------------------------------------------------------
-; Determines the CPU type using the CPUID instruction.
-;----------------------------------------------------------------------------
-cprocstart _GA_getCPUIDFeatures
-
- enter_c
-
- xor eax, eax ; Set up for CPUID instruction
- mCPU_ID ; Get and save vendor ID
- cmp eax, 1 ; Make sure 1 is valid input for CPUID
- jl @@Fail ; We dont have the CPUID instruction
- xor eax, eax
- inc eax
- mCPU_ID ; Get family/model/stepping/features
- mov eax, edx
-@@Done: leave_c
- ret
-
-@@Fail: xor eax,eax
- jmp @@Done
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void _GA_readTimeStamp(GA_largeInteger *time)
-;----------------------------------------------------------------------------
-; Reads the time stamp counter and returns the 64-bit result.
-;----------------------------------------------------------------------------
-cprocstart _GA_readTimeStamp
-
- mRDTSC
- mov ecx,[esp+4] ; Access directly without stack frame
- mov [ecx],eax
- mov [ecx+4],edx
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; N_uint32 GA_TimerDifference(GA_largeInteger *a,GA_largeInteger *b)
-;----------------------------------------------------------------------------
-; Computes the difference between two 64-bit numbers (a-b)
-;----------------------------------------------------------------------------
-cprocstart GA_TimerDifference
-
- ARG a:DPTR, b:DPTR, t:DPTR
-
- enter_c
-
- mov ecx,[a]
- mov eax,[ecx] ; EAX := b.low
- mov ecx,[b]
- sub eax,[ecx]
- mov edx,eax ; EDX := low difference
- mov ecx,[a]
- mov eax,[ecx+4] ; ECX := b.high
- mov ecx,[b]
- sbb eax,[ecx+4] ; EAX := high difference
- mov eax,edx ; Return low part
-
- leave_c
- ret
-
-cprocend
-
-; Macro to delay briefly to ensure that enough time has elapsed between
-; successive I/O accesses so that the device being accessed can respond
-; to both accesses even on a very fast PC.
-
-ifdef USE_NASM
-%macro DELAY_TIMER 0
- jmp short $+2
- jmp short $+2
- jmp short $+2
-%endmacro
-else
-macro DELAY_TIMER
- jmp short $+2
- jmp short $+2
- jmp short $+2
-endm
-endif
-
-;----------------------------------------------------------------------------
-; void _OS_delay8253(N_uint32 microSeconds);
-;----------------------------------------------------------------------------
-; Delays for the specified number of microseconds, by directly programming
-; the 8253 timer chips.
-;----------------------------------------------------------------------------
-cprocstart _OS_delay8253
-
- ARG microSec:UINT
-
- enter_c
-
-; Start timer 2 counting
-
- mov _ax,[microSec] ; EAX := count in microseconds
- mov ecx,1196
- mul ecx
- mov ecx,1000
- div ecx
- mov ecx,eax ; ECX := count in timer ticks
- in al,61h
- or al,1
- out 61h,al
-
-; Set the timer 2 count to 0 again to start the timing interval.
-
- mov al,10110100b ; set up to load initial (timer 2)
- out 43h,al ; timer count
- DELAY_TIMER
- sub al,al
- out 42h,al ; load count lsb
- DELAY_TIMER
- out 42h,al ; load count msb
- xor di,di ; Allow max 64K loop iterations
-
-@@LoopStart:
- dec di ; This is a guard against the possibility that
- jz @@LoopEnd ; someone eg. stopped the timer behind our back.
- ; After 64K iterations we bail out no matter what
- ; (and hope it wasn't too soon)
- mov al,00000000b ; latch timer 0
- out 43h,al
- DELAY_TIMER
- in al,42h ; least significant byte
- DELAY_TIMER
- mov ah,al
- in al,42h ; most significant byte
- xchg ah,al
- neg ax ; Convert from countdown remaining
- ; to elapsed count
- cmp ax,cx ; Has delay expired?
- jb @@LoopStart ; No, so loop till done
-
-; Stop timer 2 from counting
-@@LoopEnd:
- in al,61H
- and al,0FEh
- out 61H,al
-
-; Some programs have a problem if we change the control port; better change it
-; to something they expect (mode 3 - square wave generator)...
- mov al,0B6h
- out 43h,al
-
- leave_c
- ret
-
-cprocend
-
-endcodeseg _gatimer
-
- END
-
diff --git a/board/MAI/bios_emulator/scitech/src/common/_pm_imp.asm b/board/MAI/bios_emulator/scitech/src/common/_pm_imp.asm
deleted file mode 100644
index d4b11790af..0000000000
--- a/board/MAI/bios_emulator/scitech/src/common/_pm_imp.asm
+++ /dev/null
@@ -1,195 +0,0 @@
-;****************************************************************************
-;*
-;* SciTech OS Portability Manager Library
-;*
-;* Copyright (C) 1991-1998 SciTech Software, Inc.
-;* All rights reserved.
-;*
-;* ======================================================================
-;* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-;* | |
-;* |This copyrighted computer code contains proprietary technology |
-;* |owned by SciTech Software, Inc., located at 505 Wall Street, |
-;* |Chico, CA 95928 USA (http://www.scitechsoft.com). |
-;* | |
-;* |The contents of this file are subject to the SciTech Nucleus |
-;* |License; you may *not* use this file or related software except in |
-;* |compliance with the License. You may obtain a copy of the License |
-;* |at http://www.scitechsoft.com/nucleus-license.txt |
-;* | |
-;* |Software distributed under the License is distributed on an |
-;* |"AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or |
-;* |implied. See the License for the specific language governing |
-;* |rights and limitations under the License. |
-;* | |
-;* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-;* ======================================================================
-;*
-;* Language: TASM 4.0 or NASM
-;* Environment: IBM PC 32 bit Protected Mode.
-;*
-;* Description: Module to implement the import stubs for all the PM
-;* API functions for Intel binary portable drivers.
-;*
-;****************************************************************************
-
- IDEAL
-
-include "scitech.mac" ; Memory model macros
-
-BEGIN_IMPORTS_DEF _PM_imports
-DECLARE_IMP PM_getModeType,0
-DECLARE_IMP PM_getBIOSPointer,0
-DECLARE_IMP PM_getA0000Pointer,0
-DECLARE_IMP PM_mapPhysicalAddr,0
-DECLARE_IMP PM_mallocShared,0
-SKIP_IMP _PM_reserved1,0
-DECLARE_IMP PM_freeShared,0
-DECLARE_IMP PM_mapToProcess,0
-DECLARE_IMP PM_mapRealPointer,0
-DECLARE_IMP PM_allocRealSeg,0
-DECLARE_IMP PM_freeRealSeg,0
-DECLARE_IMP PM_allocLockedMem,0
-DECLARE_IMP PM_freeLockedMem,0
-DECLARE_IMP PM_callRealMode,0
-DECLARE_IMP PM_int86,0
-DECLARE_IMP PM_int86x,0
-DECLARE_IMP DPMI_int86,0
-DECLARE_IMP PM_availableMemory,0
-DECLARE_IMP PM_getVESABuf,0
-DECLARE_IMP PM_getOSType,0
-DECLARE_IMP PM_fatalError,0
-DECLARE_IMP PM_setBankA,0
-DECLARE_IMP PM_setBankAB,0
-DECLARE_IMP PM_setCRTStart,0
-DECLARE_IMP PM_getCurrentPat,0
-DECLARE_IMP PM_getVBEAFPath,0
-DECLARE_IMP PM_getNucleusPath,0
-DECLARE_IMP PM_getNucleusConfigPath,0
-DECLARE_IMP PM_getUniqueID,0
-DECLARE_IMP PM_getMachineName,0
-DECLARE_IMP VF_available,0
-DECLARE_IMP VF_init,0
-DECLARE_IMP VF_exit,0
-DECLARE_IMP PM_openConsole,0
-DECLARE_IMP PM_getConsoleStateSize,0
-DECLARE_IMP PM_saveConsoleState,0
-DECLARE_IMP PM_restoreConsoleState,0
-DECLARE_IMP PM_closeConsole,0
-DECLARE_IMP PM_setOSCursorLocation,0
-DECLARE_IMP PM_setOSScreenWidth,0
-DECLARE_IMP PM_enableWriteCombine,0
-DECLARE_IMP PM_backslash,0
-DECLARE_IMP PM_lockDataPages,0
-DECLARE_IMP PM_unlockDataPages,0
-DECLARE_IMP PM_lockCodePages,0
-DECLARE_IMP PM_unlockCodePages,0
-DECLARE_IMP PM_setRealTimeClockHandler,0
-DECLARE_IMP PM_setRealTimeClockFrequency,0
-DECLARE_IMP PM_restoreRealTimeClockHandler,0
-DECLARE_IMP PM_doBIOSPOST,0
-DECLARE_IMP PM_getBootDrive,0
-DECLARE_IMP PM_freePhysicalAddr,0
-DECLARE_IMP PM_inpb,0
-DECLARE_IMP PM_inpw,0
-DECLARE_IMP PM_inpd,0
-DECLARE_IMP PM_outpb,0
-DECLARE_IMP PM_outpw,0
-DECLARE_IMP PM_outpd,0
-SKIP_IMP _PM_reserved2,0
-DECLARE_IMP PM_setSuspendAppCallback,0
-DECLARE_IMP PM_haveBIOSAccess,0
-DECLARE_IMP PM_kbhit,0
-DECLARE_IMP PM_getch,0
-DECLARE_IMP PM_findBPD,0
-DECLARE_IMP PM_getPhysicalAddr,0
-DECLARE_IMP PM_sleep,0
-DECLARE_IMP PM_getCOMPort,0
-DECLARE_IMP PM_getLPTPort,0
-DECLARE_IMP PM_loadLibrary,0
-DECLARE_IMP PM_getProcAddress,0
-DECLARE_IMP PM_freeLibrary,0
-DECLARE_IMP PCI_enumerate,0
-DECLARE_IMP PCI_accessReg,0
-DECLARE_IMP PCI_setHardwareIRQ,0
-DECLARE_IMP PCI_generateSpecialCyle,0
-SKIP_IMP _PM_reserved3,0
-DECLARE_IMP PCIBIOS_getEntry,0
-DECLARE_IMP CPU_getProcessorType,0
-DECLARE_IMP CPU_haveMMX,0
-DECLARE_IMP CPU_have3DNow,0
-DECLARE_IMP CPU_haveSSE,0
-DECLARE_IMP CPU_haveRDTSC,0
-DECLARE_IMP CPU_getProcessorSpeed,0
-DECLARE_IMP ZTimerInit,0
-DECLARE_IMP LZTimerOn,0
-DECLARE_IMP LZTimerLap,0
-DECLARE_IMP LZTimerOff,0
-DECLARE_IMP LZTimerCount,0
-DECLARE_IMP LZTimerOnExt,0
-DECLARE_IMP LZTimerLapExt,0
-DECLARE_IMP LZTimerOffExt,0
-DECLARE_IMP LZTimerCountExt,0
-DECLARE_IMP ULZTimerOn,0
-DECLARE_IMP ULZTimerLap,0
-DECLARE_IMP ULZTimerOff,0
-DECLARE_IMP ULZTimerCount,0
-DECLARE_IMP ULZReadTime,0
-DECLARE_IMP ULZElapsedTime,0
-DECLARE_IMP ULZTimerResolution,0
-DECLARE_IMP PM_findFirstFile,0
-DECLARE_IMP PM_findNextFile,0
-DECLARE_IMP PM_findClose,0
-DECLARE_IMP PM_makepath,0
-DECLARE_IMP PM_splitpath,0
-DECLARE_IMP PM_driveValid,0
-DECLARE_IMP PM_getdcwd,0
-DECLARE_IMP PM_setFileAttr,0
-DECLARE_IMP PM_mkdir,0
-DECLARE_IMP PM_rmdir,0
-DECLARE_IMP PM_getFileAttr,0
-DECLARE_IMP PM_getFileTime,0
-DECLARE_IMP PM_setFileTime,0
-DECLARE_IMP CPU_getProcessorName,0
-DECLARE_IMP PM_getVGAStateSize,0
-DECLARE_IMP PM_saveVGAState,0
-DECLARE_IMP PM_restoreVGAState,0
-DECLARE_IMP PM_vgaBlankDisplay,0
-DECLARE_IMP PM_vgaUnblankDisplay,0
-DECLARE_IMP PM_blockUntilTimeout,0
-DECLARE_IMP _PM_add64,0
-DECLARE_IMP _PM_sub64,0
-DECLARE_IMP _PM_mul64,0
-DECLARE_IMP _PM_div64,0
-DECLARE_IMP _PM_shr64,0
-DECLARE_IMP _PM_sar64,0
-DECLARE_IMP _PM_shl64,0
-DECLARE_IMP _PM_neg64,0
-DECLARE_IMP PCI_findBARSize,0
-DECLARE_IMP PCI_readRegBlock,0
-DECLARE_IMP PCI_writeRegBlock,0
-DECLARE_IMP PM_flushTLB,0
-DECLARE_IMP PM_useLocalMalloc,0
-DECLARE_IMP PM_malloc,0
-DECLARE_IMP PM_calloc,0
-DECLARE_IMP PM_realloc,0
-DECLARE_IMP PM_free,0
-DECLARE_IMP PM_getPhysicalAddrRange,0
-DECLARE_IMP PM_allocPage,0
-DECLARE_IMP PM_freePage,0
-DECLARE_IMP PM_agpInit,0
-DECLARE_IMP PM_agpExit,0
-DECLARE_IMP PM_agpReservePhysical,0
-DECLARE_IMP PM_agpReleasePhysical,0
-DECLARE_IMP PM_agpCommitPhysical,0
-DECLARE_IMP PM_agpFreePhysical,0
-DECLARE_IMP PCI_getNumDevices,0
-DECLARE_IMP PM_setLocalBPDPath,0
-DECLARE_IMP PM_loadDirectDraw,0
-DECLARE_IMP PM_unloadDirectDraw,0
-DECLARE_IMP PM_getDirectDrawWindow,0
-DECLARE_IMP PM_doSuspendApp,0
-END_IMPORTS_DEF
-
- END
-
diff --git a/board/MAI/bios_emulator/scitech/src/common/aabeos.c b/board/MAI/bios_emulator/scitech/src/common/aabeos.c
deleted file mode 100644
index ad5698a406..0000000000
--- a/board/MAI/bios_emulator/scitech/src/common/aabeos.c
+++ /dev/null
@@ -1,92 +0,0 @@
-/****************************************************************************
-*
-* SciTech Nucleus Graphics Architecture
-*
-* Copyright (C) 1991-1998 SciTech Software, Inc.
-* All rights reserved.
-*
-* ======================================================================
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* | |
-* |This copyrighted computer code contains proprietary technology |
-* |owned by SciTech Software, Inc., located at 505 Wall Street, |
-* |Chico, CA 95928 USA (http://www.scitechsoft.com). |
-* | |
-* |The contents of this file are subject to the SciTech Nucleus |
-* |License; you may *not* use this file or related software except in |
-* |compliance with the License. You may obtain a copy of the License |
-* |at http://www.scitechsoft.com/nucleus-license.txt |
-* | |
-* |Software distributed under the License is distributed on an |
-* |"AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or |
-* |implied. See the License for the specific language governing |
-* |rights and limitations under the License. |
-* | |
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* ======================================================================
-*
-* Language: ANSI C
-* Environment: Linux
-*
-* Description: OS specific Nucleus Graphics Architecture services for
-* the Linux operating system.
-*
-****************************************************************************/
-
-#include "nucleus/graphics.h"
-#include <sys/time.h>
-
-static ibool haveRDTSC;
-
-/*-------------------------- Implementation -------------------------------*/
-
-/****************************************************************************
-REMARKS:
-Nothing special for this OS.
-****************************************************************************/
-GA_sharedInfo * NAPI GA_getSharedInfo(
- int device)
-{
- (void)device;
- return NULL;
-}
-
-/****************************************************************************
-REMARKS:
-Nothing special for this OS.
-****************************************************************************/
-ibool NAPI GA_getSharedExports(
- GA_exports *gaExp)
-{
- (void)gaExp;
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-This function initialises the high precision timing functions for the
-Nucleus loader library.
-****************************************************************************/
-ibool NAPI GA_TimerInit(void)
-{
- if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0)
- haveRDTSC = true;
- return true;
-}
-
-/****************************************************************************
-REMARKS:
-This function reads the high resolution timer.
-****************************************************************************/
-void NAPI GA_TimerRead(
- GA_largeInteger *value)
-{
- if (haveRDTSC)
- _GA_readTimeStamp(value);
- else {
- struct timeval t;
- gettimeofday(&t, NULL);
- value->low = t.tv_sec*1000000 + t.tv_usec;
- value->high = 0;
- }
-}
diff --git a/board/MAI/bios_emulator/scitech/src/common/aados.c b/board/MAI/bios_emulator/scitech/src/common/aados.c
deleted file mode 100644
index 342d2f33a4..0000000000
--- a/board/MAI/bios_emulator/scitech/src/common/aados.c
+++ /dev/null
@@ -1,64 +0,0 @@
-/****************************************************************************
-*
-* SciTech Nucleus Graphics Architecture
-*
-* Copyright (C) 1991-1998 SciTech Software, Inc.
-* All rights reserved.
-*
-* ======================================================================
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* | |
-* |This copyrighted computer code contains proprietary technology |
-* |owned by SciTech Software, Inc., located at 505 Wall Street, |
-* |Chico, CA 95928 USA (http://www.scitechsoft.com). |
-* | |
-* |The contents of this file are subject to the SciTech Nucleus |
-* |License; you may *not* use this file or related software except in |
-* |compliance with the License. You may obtain a copy of the License |
-* |at http://www.scitechsoft.com/nucleus-license.txt |
-* | |
-* |Software distributed under the License is distributed on an |
-* |"AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or |
-* |implied. See the License for the specific language governing |
-* |rights and limitations under the License. |
-* | |
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* ======================================================================
-*
-* Language: ANSI C
-* Environment: MSDOS
-*
-* Description: OS specific Nucleus Graphics Architecture services for
-* the MSDOS operating system.
-*
-****************************************************************************/
-
-#include "pm_help.h"
-#include "pmapi.h"
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-
-/*-------------------------- Implementation -------------------------------*/
-
-/****************************************************************************
-REMARKS:
-This function initialises the high precision timing functions for the DOS
-Nucleus loader library.
-****************************************************************************/
-ibool NAPI GA_TimerInit(void)
-{
- if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0)
- return true;
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-This function reads the high resolution timer.
-****************************************************************************/
-void NAPI GA_TimerRead(
- GA_largeInteger *value)
-{
- _GA_readTimeStamp(value);
-}
diff --git a/board/MAI/bios_emulator/scitech/src/common/aalib.c b/board/MAI/bios_emulator/scitech/src/common/aalib.c
deleted file mode 100644
index 5003b22291..0000000000
--- a/board/MAI/bios_emulator/scitech/src/common/aalib.c
+++ /dev/null
@@ -1,225 +0,0 @@
-/****************************************************************************
-*
-* SciTech Nucleus Audio Architecture
-*
-* Copyright (C) 1991-1998 SciTech Software, Inc.
-* All rights reserved.
-*
-* ======================================================================
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* | |
-* |This copyrighted computer code contains proprietary technology |
-* |owned by SciTech Software, Inc., located at 505 Wall Street, |
-* |Chico, CA 95928 USA (http://www.scitechsoft.com). |
-* | |
-* |The contents of this file are subject to the SciTech Nucleus |
-* |License; you may *not* use this file or related software except in |
-* |compliance with the License. You may obtain a copy of the License |
-* |at http://www.scitechsoft.com/nucleus-license.txt |
-* | |
-* |Software distributed under the License is distributed on an |
-* |"AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or |
-* |implied. See the License for the specific language governing |
-* |rights and limitations under the License. |
-* | |
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* ======================================================================
-*
-* Language: ANSI C
-* Environment: Any 32-bit protected mode environment
-*
-* Description: C module for the Graphics Accelerator Driver API. Uses
-* the SciTech PM library for interfacing with DOS
-* extender specific functions.
-*
-****************************************************************************/
-
-#include "nucleus/audio.h"
-#ifdef __WIN32_VXD__
-#include "sdd/sddhelp.h"
-#else
-#include <stdio.h>
-#include <stdlib.h>
-#endif
-
-/*---------------------------- Global Variables ---------------------------*/
-
-#ifdef TEST_HARNESS
-extern PM_imports _VARAPI _PM_imports;
-#else
-AA_exports _VARAPI _AA_exports;
-static int loaded = false;
-static PE_MODULE *hModBPD = NULL;
-
-#ifdef __DRIVER__
-extern PM_imports _PM_imports;
-#else
-#include "pmimp.h"
-#endif
-
-static N_imports _N_imports = {
- sizeof(N_imports),
- _OS_delay,
- };
-
-#ifdef __DRIVER__
-extern AA_imports _AA_imports;
-#else
-static AA_imports _AA_imports = {
- sizeof(AA_imports),
- };
-#endif
-#endif
-
-/*----------------------------- Implementation ----------------------------*/
-
-#define DLL_NAME "audio.bpd"
-
-#ifndef TEST_HARNESS
-/****************************************************************************
-REMARKS:
-Fatal error handler for non-exported AA_exports.
-****************************************************************************/
-static void _AA_fatalErrorHandler(void)
-{
- PM_fatalError("Unsupported Nucleus export function called! Please upgrade your copy of Nucleus!\n");
-}
-
-/****************************************************************************
-REMARKS:
-Loads the Nucleus binary portable DLL into memory and initilises it.
-****************************************************************************/
-static ibool LoadDriver(void)
-{
- AA_initLibrary_t AA_initLibrary;
- AA_exports *aaExp;
- char filename[PM_MAX_PATH];
- char bpdpath[PM_MAX_PATH];
- int i,max;
- ulong *p;
-
- /* Check if we have already loaded the driver */
- if (loaded)
- return true;
- PM_init();
- _AA_exports.dwSize = sizeof(_AA_exports);
-
- /* Open the BPD file */
- if (!PM_findBPD(DLL_NAME,bpdpath))
- return false;
- strcpy(filename,bpdpath);
- strcat(filename,DLL_NAME);
- if ((hModBPD = PE_loadLibrary(filename,false)) == NULL)
- return false;
- if ((AA_initLibrary = (AA_initLibrary_t)PE_getProcAddress(hModBPD,"_AA_initLibrary")) == NULL)
- return false;
- bpdpath[strlen(bpdpath)-1] = 0;
- if (strcmp(bpdpath,PM_getNucleusPath()) == 0)
- strcpy(bpdpath,PM_getNucleusConfigPath());
- else {
- PM_backslash(bpdpath);
- strcat(bpdpath,"config");
- }
- if ((aaExp = AA_initLibrary(bpdpath,filename,&_PM_imports,&_N_imports,&_AA_imports)) == NULL)
- PM_fatalError("AA_initLibrary failed!\n");
-
- /* Initialize all default imports to point to fatal error handler
- * for upwards compatibility, and copy the exported functions.
- */
- max = sizeof(_AA_exports)/sizeof(AA_initLibrary_t);
- for (i = 0,p = (ulong*)&_AA_exports; i < max; i++)
- *p++ = (ulong)_AA_fatalErrorHandler;
- memcpy(&_AA_exports,aaExp,MIN(sizeof(_AA_exports),aaExp->dwSize));
- loaded = true;
- return true;
-}
-
-/* The following are stub entry points that the application calls to
- * initialise the Nucleus loader library, and we use this to load our
- * driver DLL from disk and initialise the library using it.
- */
-
-/* {secret} */
-int NAPI AA_status(void)
-{
- if (!loaded)
- return nDriverNotFound;
- return _AA_exports.AA_status();
-}
-
-/* {secret} */
-const char * NAPI AA_errorMsg(
- N_int32 status)
-{
- if (!loaded)
- return "Unable to load Nucleus device driver!";
- return _AA_exports.AA_errorMsg(status);
-}
-
-/* {secret} */
-int NAPI AA_getDaysLeft(void)
-{
- if (!LoadDriver())
- return -1;
- return _AA_exports.AA_getDaysLeft();
-}
-
-/* {secret} */
-int NAPI AA_registerLicense(uchar *license)
-{
- if (!LoadDriver())
- return 0;
- return _AA_exports.AA_registerLicense(license);
-}
-
-/* {secret} */
-int NAPI AA_enumerateDevices(void)
-{
- if (!LoadDriver())
- return 0;
- return _AA_exports.AA_enumerateDevices();
-}
-
-/* {secret} */
-AA_devCtx * NAPI AA_loadDriver(N_int32 deviceIndex)
-{
- if (!LoadDriver())
- return NULL;
- return _AA_exports.AA_loadDriver(deviceIndex);
-}
-#endif
-
-typedef struct {
- N_uint32 low;
- N_uint32 high;
- } AA_largeInteger;
-
-void NAPI _OS_delay8253(N_uint32 microSeconds);
-ibool NAPI _GA_haveCPUID(void);
-uint NAPI _GA_getCPUIDFeatures(void);
-void NAPI _GA_readTimeStamp(AA_largeInteger *time);
-#define CPU_HaveRDTSC 0x00000010
-
-/****************************************************************************
-REMARKS:
-This function delays for the specified number of microseconds
-****************************************************************************/
-void NAPI _OS_delay(
- N_uint32 microSeconds)
-{
- static ibool inited = false;
- LZTimerObject tm;
-
- if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) {
- if (!inited) {
- ZTimerInit();
- inited = true;
- }
- LZTimerOnExt(&tm);
- while (LZTimerLapExt(&tm) < microSeconds)
- ;
- LZTimerOnExt(&tm);
- }
- else
- _OS_delay8253(microSeconds);
-}
diff --git a/board/MAI/bios_emulator/scitech/src/common/aalinux.c b/board/MAI/bios_emulator/scitech/src/common/aalinux.c
deleted file mode 100644
index d3d468ed0f..0000000000
--- a/board/MAI/bios_emulator/scitech/src/common/aalinux.c
+++ /dev/null
@@ -1,94 +0,0 @@
-/****************************************************************************
-*
-* SciTech Nucleus Graphics Architecture
-*
-* Copyright (C) 1991-1998 SciTech Software, Inc.
-* All rights reserved.
-*
-* ======================================================================
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* | |
-* |This copyrighted computer code contains proprietary technology |
-* |owned by SciTech Software, Inc., located at 505 Wall Street, |
-* |Chico, CA 95928 USA (http://www.scitechsoft.com). |
-* | |
-* |The contents of this file are subject to the SciTech Nucleus |
-* |License; you may *not* use this file or related software except in |
-* |compliance with the License. You may obtain a copy of the License |
-* |at http://www.scitechsoft.com/nucleus-license.txt |
-* | |
-* |Software distributed under the License is distributed on an |
-* |"AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or |
-* |implied. See the License for the specific language governing |
-* |rights and limitations under the License. |
-* | |
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* ======================================================================
-*
-* Language: ANSI C
-* Environment: Linux
-*
-* Description: OS specific Nucleus Graphics Architecture services for
-* the Linux operating system.
-*
-****************************************************************************/
-
-#include "nucleus/graphics.h"
-#include <sys/time.h>
-
-/*---------------------------- Global Variables ---------------------------*/
-
-static ibool haveRDTSC;
-
-/*-------------------------- Implementation -------------------------------*/
-
-/****************************************************************************
-REMARKS:
-Nothing special for this OS.
-****************************************************************************/
-GA_sharedInfo * NAPI GA_getSharedInfo(
- int device)
-{
- (void)device;
- return NULL;
-}
-
-/****************************************************************************
-REMARKS:
-Nothing special for this OS.
-****************************************************************************/
-ibool NAPI GA_getSharedExports(
- GA_exports *gaExp)
-{
- (void)gaExp;
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-This function initialises the high precision timing functions for the
-Nucleus loader library.
-****************************************************************************/
-ibool NAPI GA_TimerInit(void)
-{
- if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0)
- haveRDTSC = true;
- return true;
-}
-
-/****************************************************************************
-REMARKS:
-This function reads the high resolution timer.
-****************************************************************************/
-void NAPI GA_TimerRead(
- GA_largeInteger *value)
-{
- if (haveRDTSC)
- _GA_readTimeStamp(value);
- else {
- struct timeval t;
- gettimeofday(&t, NULL);
- value->low = t.tv_sec*1000000 + t.tv_usec;
- value->high = 0;
- }
-}
diff --git a/board/MAI/bios_emulator/scitech/src/common/aaos2.c b/board/MAI/bios_emulator/scitech/src/common/aaos2.c
deleted file mode 100644
index 0ec8c9fcf1..0000000000
--- a/board/MAI/bios_emulator/scitech/src/common/aaos2.c
+++ /dev/null
@@ -1,124 +0,0 @@
-/****************************************************************************
-*
-* SciTech Nucleus Graphics Architecture
-*
-* Copyright (C) 1991-1998 SciTech Software, Inc.
-* All rights reserved.
-*
-* ======================================================================
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* | |
-* |This copyrighted computer code contains proprietary technology |
-* |owned by SciTech Software, Inc., located at 505 Wall Street, |
-* |Chico, CA 95928 USA (http://www.scitechsoft.com). |
-* | |
-* |The contents of this file are subject to the SciTech Nucleus |
-* |License; you may *not* use this file or related software except in |
-* |compliance with the License. You may obtain a copy of the License |
-* |at http://www.scitechsoft.com/nucleus-license.txt |
-* | |
-* |Software distributed under the License is distributed on an |
-* |"AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or |
-* |implied. See the License for the specific language governing |
-* |rights and limitations under the License. |
-* | |
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* ======================================================================
-*
-* Language: ANSI C
-* Environment: OS/2 32-bit
-*
-* Description: OS specific Nucleus Graphics Architecture services for
-* the OS/2 operating system environments.
-*
-****************************************************************************/
-
-#include "pm_help.h"
-#define INCL_DOSERRORS
-#define INCL_DOS
-#define INCL_SUB
-#define INCL_VIO
-#define INCL_KBD
-#include <os2.h>
-
-/*---------------------------- Global Variables ---------------------------*/
-
-static HFILE hSDDHelp;
-static ulong outLen; /* Must not cross 64Kb boundary! */
-static ulong result; /* Must not cross 64Kb boundary! */
-static ibool haveRDTSC;
-
-/*-------------------------- Implementation -------------------------------*/
-
-/****************************************************************************
-REMARKS:
-This function returns a pointer to the common graphics driver loaded in the
-helper VxD. The memory for the VxD is shared between all processes via
-the VxD, so that the VxD, 16-bit code and 32-bit code all see the same
-state when accessing the graphics binary portable driver.
-****************************************************************************/
-GA_sharedInfo * NAPI GA_getSharedInfo(
- int device)
-{
- /* Initialise the PM library and connect to our runtime DLL's */
- PM_init();
-
- /* Open our helper device driver */
- if (DosOpen(PMHELP_NAME,&hSDDHelp,&result,0,0,
- FILE_OPEN, OPEN_SHARE_DENYNONE | OPEN_ACCESS_READWRITE,
- NULL))
- PM_fatalError("Unable to open SDDHELP$ helper device driver!");
- outLen = sizeof(result);
- DosDevIOCtl(hSDDHelp,PMHELP_IOCTL,PMHELP_GETSHAREDINFO,
- NULL, 0, NULL,
- &result, outLen, &outLen);
- DosClose(hSDDHelp);
- if (result) {
- /* We have found the shared Nucleus packet. Because not all processes
- * map to SDDPMI.DLL, we need to ensure that we connect to this
- * DLL so that it gets mapped into our address space (that is
- * where the shared Nucleus packet is located). Simply doing a
- * DosLoadModule on it is enough for this.
- */
- HMODULE hModSDDPMI;
- char buf[80];
- DosLoadModule((PSZ)buf,sizeof(buf),(PSZ)"SDDPMI.DLL",&hModSDDPMI);
- }
- return (GA_sharedInfo*)result;
-}
-
-/****************************************************************************
-REMARKS:
-Nothing special for this OS.
-****************************************************************************/
-ibool NAPI GA_getSharedExports(
- GA_exports *gaExp)
-{
- (void)gaExp;
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-This function initialises the high precision timing functions for the
-Nucleus loader library.
-****************************************************************************/
-ibool NAPI GA_TimerInit(void)
-{
- if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0)
- haveRDTSC = true;
- return true;
-}
-
-/****************************************************************************
-REMARKS:
-This function reads the high resolution timer.
-****************************************************************************/
-void NAPI GA_TimerRead(
- GA_largeInteger *value)
-{
- if (haveRDTSC)
- _GA_readTimeStamp(value);
- else
- DosTmrQueryTime((QWORD*)value);
-}
diff --git a/board/MAI/bios_emulator/scitech/src/common/aaqnx.c b/board/MAI/bios_emulator/scitech/src/common/aaqnx.c
deleted file mode 100644
index 13531be99f..0000000000
--- a/board/MAI/bios_emulator/scitech/src/common/aaqnx.c
+++ /dev/null
@@ -1,95 +0,0 @@
-/****************************************************************************
-*
-* SciTech Nucleus Graphics Architecture
-*
-* Copyright (C) 1991-1998 SciTech Software, Inc.
-* All rights reserved.
-*
-* ======================================================================
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* | |
-* |This copyrighted computer code contains proprietary technology |
-* |owned by SciTech Software, Inc., located at 505 Wall Street, |
-* |Chico, CA 95928 USA (http://www.scitechsoft.com). |
-* | |
-* |The contents of this file are subject to the SciTech Nucleus |
-* |License; you may *not* use this file or related software except in |
-* |compliance with the License. You may obtain a copy of the License |
-* |at http://www.scitechsoft.com/nucleus-license.txt |
-* | |
-* |Software distributed under the License is distributed on an |
-* |"AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or |
-* |implied. See the License for the specific language governing |
-* |rights and limitations under the License. |
-* | |
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* ======================================================================
-*
-* Language: ANSI C
-* Environment: QNX
-*
-* Description: OS specific Nucleus Graphics Architecture services for
-* the QNX operating system.
-*
-****************************************************************************/
-
-#include "nucleus/graphics.h"
-#include <time.h>
-
-/*---------------------------- Global Variables ---------------------------*/
-
-static ibool haveRDTSC;
-
-/*-------------------------- Implementation -------------------------------*/
-
-/****************************************************************************
-REMARKS:
-Nothing special for this OS.
-****************************************************************************/
-GA_sharedInfo * NAPI GA_getSharedInfo(
- int device)
-{
- (void)device;
- return NULL;
-}
-
-/****************************************************************************
-REMARKS:
-Nothing special for this OS.
-****************************************************************************/
-ibool NAPI GA_getSharedExports(
- GA_exports *gaExp)
-{
- (void)gaExp;
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-This function initialises the high precision timing functions for the
-Nucleus loader library.
-****************************************************************************/
-ibool NAPI GA_TimerInit(void)
-{
- if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0)
- haveRDTSC = true;
- return true;
-}
-
-/****************************************************************************
-REMARKS:
-This function reads the high resolution timer.
-****************************************************************************/
-void NAPI GA_TimerRead(
- GA_largeInteger *value)
-{
- if (haveRDTSC)
- _GA_readTimeStamp(value);
- else {
- struct timespec ts;
-
- clock_gettime(CLOCK_REALTIME, &ts);
- value->low = (ts.tv_nsec / 1000 + ts.tv_sec * 1000000);
- value->high = 0;
- }
-}
diff --git a/board/MAI/bios_emulator/scitech/src/common/aartt.c b/board/MAI/bios_emulator/scitech/src/common/aartt.c
deleted file mode 100644
index 1a5a67a4e9..0000000000
--- a/board/MAI/bios_emulator/scitech/src/common/aartt.c
+++ /dev/null
@@ -1,89 +0,0 @@
-/****************************************************************************
-*
-* SciTech Nucleus Graphics Architecture
-*
-* Copyright (C) 1991-1998 SciTech Software, Inc.
-* All rights reserved.
-*
-* ======================================================================
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* | |
-* |This copyrighted computer code contains proprietary technology |
-* |owned by SciTech Software, Inc., located at 505 Wall Street, |
-* |Chico, CA 95928 USA (http://www.scitechsoft.com). |
-* | |
-* |The contents of this file are subject to the SciTech Nucleus |
-* |License; you may *not* use this file or related software except in |
-* |compliance with the License. You may obtain a copy of the License |
-* |at http://www.scitechsoft.com/nucleus-license.txt |
-* | |
-* |Software distributed under the License is distributed on an |
-* |"AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or |
-* |implied. See the License for the specific language governing |
-* |rights and limitations under the License. |
-* | |
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* ======================================================================
-*
-* Language: ANSI C
-* Environment: RTTarget-32
-*
-* Description: OS specific Nucleus Graphics Architecture services for
-* the RTTarget-32 operating system environments.
-*
-****************************************************************************/
-
-#include "nucleus/graphics.h"
-
-/*------------------------- Global Variables ------------------------------*/
-
-static ibool haveRDTSC;
-
-/*-------------------------- Implementation -------------------------------*/
-
-/****************************************************************************
-REMARKS:
-Nothing special for this OS.
-****************************************************************************/
-GA_sharedInfo * NAPI GA_getSharedInfo(
- int device)
-{
- (void)device;
- return NULL;
-}
-
-/****************************************************************************
-REMARKS:
-Nothing special for this OS.
-****************************************************************************/
-ibool NAPI GA_getSharedExports(
- GA_exports *gaExp)
-{
- (void)gaExp;
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-This function initialises the high precision timing functions for the
-Nucleus loader library.
-****************************************************************************/
-ibool NAPI GA_TimerInit(void)
-{
- if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) {
- haveRDTSC = true;
- return true;
- }
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-This function reads the high resolution timer.
-****************************************************************************/
-void NAPI GA_TimerRead(
- GA_largeInteger *value)
-{
- if (haveRDTSC)
- _GA_readTimeStamp(value);
-}
diff --git a/board/MAI/bios_emulator/scitech/src/common/aasmx.c b/board/MAI/bios_emulator/scitech/src/common/aasmx.c
deleted file mode 100644
index 163060f717..0000000000
--- a/board/MAI/bios_emulator/scitech/src/common/aasmx.c
+++ /dev/null
@@ -1,83 +0,0 @@
-/****************************************************************************
-*
-* SciTech Nucleus Graphics Architecture
-*
-* Copyright (C) 1991-1998 SciTech Software, Inc.
-* All rights reserved.
-*
-* ======================================================================
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* | |
-* |This copyrighted computer code contains proprietary technology |
-* |owned by SciTech Software, Inc., located at 505 Wall Street, |
-* |Chico, CA 95928 USA (http://www.scitechsoft.com). |
-* | |
-* |The contents of this file are subject to the SciTech Nucleus |
-* |License; you may *not* use this file or related software except in |
-* |compliance with the License. You may obtain a copy of the License |
-* |at http://www.scitechsoft.com/nucleus-license.txt |
-* | |
-* |Software distributed under the License is distributed on an |
-* |"AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or |
-* |implied. See the License for the specific language governing |
-* |rights and limitations under the License. |
-* | |
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* ======================================================================
-*
-* Language: ANSI C
-* Environment: smx32
-*
-* Description: OS specific Nucleus Graphics Architecture services for
-* the smx32 platform -- no vxD support.
-*
-****************************************************************************/
-
-#include "pmapi.h"
-#include "nucleus/graphics.h"
-
-/*-------------------------- Implementation -------------------------------*/
-
-/****************************************************************************
-REMARKS:
-Nothing special for this OS.
-****************************************************************************/
-GA_sharedInfo * NAPI GA_getSharedInfo(
- int device)
-{
- (void)device;
- return NULL;
-}
-
-/****************************************************************************
-REMARKS:
-Nothing special for this OS.
-****************************************************************************/
-ibool NAPI GA_getSharedExports(
- GA_exports *gaExp)
-{
- (void)gaExp;
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-This function initialises the high precision timing functions for the
-Nucleus loader library.
-****************************************************************************/
-ibool NAPI GA_TimerInit(void)
-{
- if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0)
- return true;
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-This function reads the high resolution timer.
-****************************************************************************/
-void NAPI GA_TimerRead(
- GA_largeInteger *value)
-{
- _GA_readTimeStamp(value);
-}
diff --git a/board/MAI/bios_emulator/scitech/src/common/aavxd.c b/board/MAI/bios_emulator/scitech/src/common/aavxd.c
deleted file mode 100644
index 221b02bd9b..0000000000
--- a/board/MAI/bios_emulator/scitech/src/common/aavxd.c
+++ /dev/null
@@ -1,90 +0,0 @@
-/****************************************************************************
-*
-* SciTech Nucleus Graphics Architecture
-*
-* Copyright (C) 1991-1998 SciTech Software, Inc.
-* All rights reserved.
-*
-* ======================================================================
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* | |
-* |This copyrighted computer code contains proprietary technology |
-* |owned by SciTech Software, Inc., located at 505 Wall Street, |
-* |Chico, CA 95928 USA (http://www.scitechsoft.com). |
-* | |
-* |The contents of this file are subject to the SciTech Nucleus |
-* |License; you may *not* use this file or related software except in |
-* |compliance with the License. You may obtain a copy of the License |
-* |at http://www.scitechsoft.com/nucleus-license.txt |
-* | |
-* |Software distributed under the License is distributed on an |
-* |"AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or |
-* |implied. See the License for the specific language governing |
-* |rights and limitations under the License. |
-* | |
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* ======================================================================
-*
-* Language: ANSI C
-* Environment: Win32 VxD
-*
-* Description: OS specific Nucleus Graphics Architecture services for
-* the Win32 VxD's.
-*
-****************************************************************************/
-
-#include "sdd/sddhelp.h"
-
-/*------------------------- Global Variables ------------------------------*/
-
-static ibool haveRDTSC;
-
-/*-------------------------- Implementation -------------------------------*/
-
-/****************************************************************************
-REMARKS:
-Return the internal shared info structure.
-****************************************************************************/
-GA_sharedInfo * NAPI GA_getSharedInfo(
- int device)
-{
- static GA_sharedInfo shared = {0,-1};
- return &shared;
-}
-
-/****************************************************************************
-REMARKS:
-Nothing special for this OS.
-****************************************************************************/
-ibool NAPI GA_getSharedExports(
- GA_exports *gaExp)
-{
- (void)gaExp;
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-This function initialises the high precision timing functions for the
-Nucleus loader library.
-****************************************************************************/
-ibool NAPI GA_TimerInit(void)
-{
- if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) {
- haveRDTSC = true;
- }
- return true;
-}
-
-/****************************************************************************
-REMARKS:
-This function reads the high resolution timer.
-****************************************************************************/
-void NAPI GA_TimerRead(
- GA_largeInteger *value)
-{
- if (haveRDTSC)
- _GA_readTimeStamp(value);
- else
- VTD_Get_Real_Time(&value->high,&value->low);
-}
diff --git a/board/MAI/bios_emulator/scitech/src/common/aawin32.c b/board/MAI/bios_emulator/scitech/src/common/aawin32.c
deleted file mode 100644
index 541df4ac58..0000000000
--- a/board/MAI/bios_emulator/scitech/src/common/aawin32.c
+++ /dev/null
@@ -1,264 +0,0 @@
-/****************************************************************************
-*
-* SciTech Nucleus Graphics Architecture
-*
-* Copyright (C) 1991-1998 SciTech Software, Inc.
-* All rights reserved.
-*
-* ======================================================================
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* | |
-* |This copyrighted computer code contains proprietary technology |
-* |owned by SciTech Software, Inc., located at 505 Wall Street, |
-* |Chico, CA 95928 USA (http://www.scitechsoft.com). |
-* | |
-* |The contents of this file are subject to the SciTech Nucleus |
-* |License; you may *not* use this file or related software except in |
-* |compliance with the License. You may obtain a copy of the License |
-* |at http://www.scitechsoft.com/nucleus-license.txt |
-* | |
-* |Software distributed under the License is distributed on an |
-* |"AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or |
-* |implied. See the License for the specific language governing |
-* |rights and limitations under the License. |
-* | |
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* ======================================================================
-*
-* Language: ANSI C
-* Environment: Win32
-*
-* Description: OS specific Nucleus Graphics Architecture services for
-* the Win32 operating system environments.
-*
-****************************************************************************/
-
-#include "pm_help.h"
-#include "pmapi.h"
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#define STRICT
-#define WIN32_LEAN_AND_MEAN
-#include <windows.h>
-
-/*------------------------- Global Variables ------------------------------*/
-
-#if GA_MAX_DEVICES > 4
-#error GA_MAX_DEVICES has changed!
-#endif
-
-static ibool haveRDTSC;
-static GA_largeInteger countFreq;
-static GA_loadDriver_t ORG_GA_loadDriver;
-extern HANDLE _PM_hDevice;
-
-/*-------------------------- Implementation -------------------------------*/
-
-/****************************************************************************
-DESCRIPTION:
-Get the current graphics driver imports from the VxD
-
-REMARKS:
-This function returns a pointer to the common graphics driver loaded in the
-helper VxD. The memory for the VxD is shared between all processes via
-the VxD, so that the VxD, 16-bit code and 32-bit code all see the same
-state when accessing the graphics binary portable driver.
-****************************************************************************/
-GA_sharedInfo * NAPI GA_getSharedInfo(
- int device)
-{
- DWORD inBuf[1]; /* Buffer to send data to VxD */
- DWORD outBuf[2]; /* Buffer to receive data from VxD */
- DWORD count; /* Count of bytes returned from VxD */
-
- PM_init();
- inBuf[0] = device;
- if (DeviceIoControl(_PM_hDevice, PMHELP_GETSHAREDINFO32, inBuf, sizeof(inBuf),
- outBuf, sizeof(outBuf), &count, NULL)) {
- return (GA_sharedInfo*)outBuf[0];
- }
- return NULL;
-}
-
-/****************************************************************************
-REMARKS:
-Nothing special for this OS.
-****************************************************************************/
-ibool NAPI GA_getSharedExports(
- GA_exports *gaExp)
-{
- (void)gaExp;
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-This function initialises the software stereo module by either calling
-the Nucleus libraries directly, or calling into the VxD if we are running
-on the shared Nucleus libraries loaded by the Windows VxD.
-****************************************************************************/
-static ibool NAPI _GA_softStereoInit(
- GA_devCtx *dc)
-{
- if (_PM_hDevice) {
- DWORD inBuf[1]; /* Buffer to send data to VxD */
- DWORD outBuf[1]; /* Buffer to receive data from VxD */
- DWORD count; /* Count of bytes returned from VxD */
-
- inBuf[0] = (ulong)dc;
- if (DeviceIoControl(_PM_hDevice, PMHELP_GASTEREOINIT32, inBuf, sizeof(inBuf),
- outBuf, sizeof(outBuf), &count, NULL)) {
- return outBuf[0];
- }
- }
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-This function turns on software stereo mode, either directly or via the VxD.
-****************************************************************************/
-static void NAPI _GA_softStereoOn(void)
-{
- if (_PM_hDevice) {
- DeviceIoControl(_PM_hDevice, PMHELP_GASTEREOON32, NULL, 0,
- NULL, 0, NULL, NULL);
- }
-}
-
-/****************************************************************************
-REMARKS:
-This function schedules a software stereo mode page flip, either directly
-or via the VxD.
-****************************************************************************/
-static void NAPI _GA_softStereoScheduleFlip(
- N_uint32 leftAddr,
- N_uint32 rightAddr)
-{
- if (_PM_hDevice) {
- DWORD inBuf[2]; /* Buffer to send data to VxD */
- DWORD count; /* Count of bytes returned from VxD */
-
- inBuf[0] = (ulong)leftAddr;
- inBuf[1] = (ulong)rightAddr;
- DeviceIoControl(_PM_hDevice, PMHELP_GASTEREOFLIP32, inBuf, sizeof(inBuf),
- NULL, 0, &count, NULL);
- }
-}
-
-/****************************************************************************
-REMARKS:
-This function turns off software stereo mode, either directly or via the VxD.
-****************************************************************************/
-static N_int32 NAPI _GA_softStereoGetFlipStatus(void)
-{
- if (_PM_hDevice) {
- DWORD outBuf[1]; /* Buffer to receive data from VxD */
- DWORD count; /* Count of bytes returned from VxD */
-
- if (DeviceIoControl(_PM_hDevice, PMHELP_GASTEREOFLIPSTATUS32, NULL, 0,
- outBuf, sizeof(outBuf), &count, NULL)) {
- return outBuf[0];
- }
- }
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-This function turns off software stereo mode, either directly or via the VxD.
-****************************************************************************/
-static void NAPI _GA_softStereoWaitTillFlipped(void)
-{
- while (!_GA_softStereoGetFlipStatus())
- ;
-}
-
-/****************************************************************************
-REMARKS:
-This function turns off software stereo mode, either directly or via the VxD.
-****************************************************************************/
-static void NAPI _GA_softStereoOff(void)
-{
- if (_PM_hDevice) {
- DeviceIoControl(_PM_hDevice, PMHELP_GASTEREOOFF32, NULL, 0,
- NULL, 0, NULL, NULL);
- }
-}
-
-/****************************************************************************
-REMARKS:
-This function disable the software stereo handler, either directly or via
-the VxD.
-****************************************************************************/
-static void NAPI _GA_softStereoExit(void)
-{
- if (_PM_hDevice) {
- DeviceIoControl(_PM_hDevice, PMHELP_GASTEREOEXIT32, NULL, 0,
- NULL, 0, NULL, NULL);
- }
-}
-
-/****************************************************************************
-REMARKS:
-We hook this function in here so that we can avoid the memory detect and
-other destructive sequences in the drivers if we are loading the driver
-from a Win32 application (our display drivers in contrast load them inside
-the VxD directly, but the control panel applets use this function).
-****************************************************************************/
-static GA_devCtx * NAPI _GA_loadDriver(
- N_int32 deviceIndex,
- N_int32 shared)
-{
- GA_devCtx *dc;
- DWORD inBuf[1];
- DWORD outBuf[1];
- N_int32 totalMemory = 0,oldIOPL;
-
- if (deviceIndex >= GA_MAX_DEVICES)
- PM_fatalError("DeviceIndex too large in GA_loadDriver!");
- PM_init();
- inBuf[0] = deviceIndex;
- if (DeviceIoControl(_PM_hDevice, PMHELP_GETMEMSIZE32,
- inBuf, sizeof(inBuf), outBuf, sizeof(outBuf), NULL, NULL))
- totalMemory = outBuf[0];
- if (totalMemory == 0)
- totalMemory = 8192;
- _GA_exports.GA_forceMemSize(totalMemory,shared);
- oldIOPL = PM_setIOPL(3);
- dc = ORG_GA_loadDriver(deviceIndex,shared);
- PM_setIOPL(oldIOPL);
- return dc;
-}
-
-/****************************************************************************
-REMARKS:
-This function initialises the high precision timing functions for the
-Nucleus loader library.
-****************************************************************************/
-ibool NAPI GA_TimerInit(void)
-{
- if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) {
- haveRDTSC = true;
- return true;
- }
- else if (QueryPerformanceFrequency((LARGE_INTEGER*)&countFreq)) {
- haveRDTSC = false;
- return true;
- }
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-This function reads the high resolution timer.
-****************************************************************************/
-void NAPI GA_TimerRead(
- GA_largeInteger *value)
-{
- if (haveRDTSC)
- _GA_readTimeStamp(value);
- else
- QueryPerformanceCounter((LARGE_INTEGER*)value);
-}
diff --git a/board/MAI/bios_emulator/scitech/src/common/agplib.c b/board/MAI/bios_emulator/scitech/src/common/agplib.c
deleted file mode 100644
index 476eedc873..0000000000
--- a/board/MAI/bios_emulator/scitech/src/common/agplib.c
+++ /dev/null
@@ -1,219 +0,0 @@
-/****************************************************************************
-*
-* SciTech Nucleus Graphics Architecture
-*
-* Copyright (C) 1991-1998 SciTech Software, Inc.
-* All rights reserved.
-*
-* ======================================================================
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* | |
-* |This copyrighted computer code contains proprietary technology |
-* |owned by SciTech Software, Inc., located at 505 Wall Street, |
-* |Chico, CA 95928 USA (http://www.scitechsoft.com). |
-* | |
-* |The contents of this file are subject to the SciTech Nucleus |
-* |License; you may *not* use this file or related software except in |
-* |compliance with the License. You may obtain a copy of the License |
-* |at http://www.scitechsoft.com/nucleus-license.txt |
-* | |
-* |Software distributed under the License is distributed on an |
-* |"AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or |
-* |implied. See the License for the specific language governing |
-* |rights and limitations under the License. |
-* | |
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* ======================================================================
-*
-* Language: ANSI C
-* Environment: Any 32-bit protected mode environment
-*
-* Description: C module for the Graphics Accelerator Driver API. Uses
-* the SciTech PM library for interfacing with DOS
-* extender specific functions.
-*
-****************************************************************************/
-
-#include "nucleus/graphics.h"
-#include "nucleus/agp.h"
-
-/*---------------------------- Global Variables ---------------------------*/
-
-#ifndef DEBUG_AGP_DRIVER
-static AGP_exports _AGP_exports;
-static int loaded = false;
-static PE_MODULE *hModBPD = NULL;
-
-static N_imports _N_imports = {
- sizeof(N_imports),
- _OS_delay,
- };
-
-static AGP_imports _AGP_imports = {
- sizeof(AGP_imports),
- };
-#endif
-
-#include "pmimp.h"
-
-/*----------------------------- Implementation ----------------------------*/
-
-#define DLL_NAME "agp.bpd"
-
-#ifndef DEBUG_AGP_DRIVER
-/****************************************************************************
-REMARKS:
-Fatal error handler for non-exported GA_exports.
-****************************************************************************/
-static void _AGP_fatalErrorHandler(void)
-{
- PM_fatalError("Unsupported AGP export function called! Please upgrade your copy of AGP!\n");
-}
-
-/****************************************************************************
-PARAMETERS:
-shared - True to load the driver into shared memory.
-
-REMARKS:
-Loads the Nucleus binary portable DLL into memory and initilises it.
-****************************************************************************/
-static ibool LoadDriver(void)
-{
- AGP_initLibrary_t AGP_initLibrary;
- AGP_exports *agpExp;
- char filename[PM_MAX_PATH];
- char bpdpath[PM_MAX_PATH];
- int i,max;
- ulong *p;
-
- /* Check if we have already loaded the driver */
- if (loaded)
- return true;
- PM_init();
-
- /* Open the BPD file */
- if (!PM_findBPD(DLL_NAME,bpdpath))
- return false;
- strcpy(filename,bpdpath);
- strcat(filename,DLL_NAME);
- if ((hModBPD = PE_loadLibrary(filename,false)) == NULL)
- return false;
- if ((AGP_initLibrary = (AGP_initLibrary_t)PE_getProcAddress(hModBPD,"_AGP_initLibrary")) == NULL)
- return false;
- bpdpath[strlen(bpdpath)-1] = 0;
- if (strcmp(bpdpath,PM_getNucleusPath()) == 0)
- strcpy(bpdpath,PM_getNucleusConfigPath());
- else {
- PM_backslash(bpdpath);
- strcat(bpdpath,"config");
- }
- if ((agpExp = AGP_initLibrary(bpdpath,filename,GA_getSystemPMImports(),&_N_imports,&_AGP_imports)) == NULL)
- PM_fatalError("AGP_initLibrary failed!\n");
- _AGP_exports.dwSize = sizeof(_AGP_exports);
- max = sizeof(_AGP_exports)/sizeof(AGP_initLibrary_t);
- for (i = 0,p = (ulong*)&_AGP_exports; i < max; i++)
- *p++ = (ulong)_AGP_fatalErrorHandler;
- memcpy(&_AGP_exports,agpExp,MIN(sizeof(_AGP_exports),agpExp->dwSize));
- loaded = true;
- return true;
-}
-
-/* The following are stub entry points that the application calls to
- * initialise the Nucleus loader library, and we use this to load our
- * driver DLL from disk and initialise the library using it.
- */
-
-/* {secret} */
-int NAPI AGP_status(void)
-{
- if (!loaded)
- return nDriverNotFound;
- return _AGP_exports.AGP_status();
-}
-
-/* {secret} */
-const char * NAPI AGP_errorMsg(
- N_int32 status)
-{
- if (!loaded)
- return "Unable to load Nucleus device driver!";
- return _AGP_exports.AGP_errorMsg(status);
-}
-
-/* {secret} */
-AGP_devCtx * NAPI AGP_loadDriver(N_int32 deviceIndex)
-{
- if (!LoadDriver())
- return NULL;
- return _AGP_exports.AGP_loadDriver(deviceIndex);
-}
-
-/* {secret} */
-void NAPI AGP_unloadDriver(
- AGP_devCtx *dc)
-{
- if (loaded)
- _AGP_exports.AGP_unloadDriver(dc);
-}
-
-/* {secret} */
-void NAPI AGP_getGlobalOptions(
- AGP_globalOptions *options)
-{
- if (LoadDriver())
- _AGP_exports.AGP_getGlobalOptions(options);
-}
-
-/* {secret} */
-void NAPI AGP_setGlobalOptions(
- AGP_globalOptions *options)
-{
- if (LoadDriver())
- _AGP_exports.AGP_setGlobalOptions(options);
-}
-
-/* {secret} */
-void NAPI AGP_saveGlobalOptions(
- AGP_globalOptions *options)
-{
- if (loaded)
- _AGP_exports.AGP_saveGlobalOptions(options);
-}
-#endif
-
-/* {secret} */
-void NAPI _OS_delay8253(N_uint32 microSeconds);
-
-/****************************************************************************
-REMARKS:
-This function delays for the specified number of microseconds
-****************************************************************************/
-void NAPI _OS_delay(
- N_uint32 microSeconds)
-{
- static ibool inited = false;
- static ibool haveRDTSC;
- LZTimerObject tm;
-
- if (!inited) {
-#ifndef __WIN32_VXD__
- /* This has been causing problems in VxD's for some reason, so for now */
- /* we avoid using it. */
- if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) {
- ZTimerInit();
- haveRDTSC = true;
- }
- else
-#endif
- haveRDTSC = false;
- inited = true;
- }
- if (haveRDTSC) {
- LZTimerOnExt(&tm);
- while (LZTimerLapExt(&tm) < microSeconds)
- ;
- LZTimerOnExt(&tm);
- }
- else
- _OS_delay8253(microSeconds);
-}
diff --git a/board/MAI/bios_emulator/scitech/src/common/center.c b/board/MAI/bios_emulator/scitech/src/common/center.c
deleted file mode 100644
index 68e17c2a94..0000000000
--- a/board/MAI/bios_emulator/scitech/src/common/center.c
+++ /dev/null
@@ -1,122 +0,0 @@
-/****************************************************************************
-*
-* Display Doctor Windows Interface Code
-*
-* ======================================================================
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* | |
-* |This copyrighted computer code is a proprietary trade secret of |
-* |SciTech Software, Inc., located at 505 Wall Street, Chico, CA 95928 |
-* |USA (www.scitechsoft.com). ANY UNAUTHORIZED POSSESSION, USE, |
-* |VIEWING, COPYING, MODIFICATION OR DISSEMINATION OF THIS CODE IS |
-* |STRICTLY PROHIBITED BY LAW. Unless you have current, express |
-* |written authorization from SciTech to possess or use this code, you |
-* |may be subject to civil and/or criminal penalties. |
-* | |
-* |If you received this code in error or you would like to report |
-* |improper use, please immediately contact SciTech Software, Inc. at |
-* |530-894-8400. |
-* | |
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* ======================================================================
-*
-* Language: C++ 3.0
-* Environment: Win16
-*
-* Description: Dialog driven configuration program for UniVBE and
-* WinDirect Professional products.
-*
-****************************************************************************/
-
-#include "center.h"
-
-/*------------------------------ Implementation ---------------------------*/
-
-void _EXPORT CenterWindow(HWND hWndCenter, HWND parent, BOOL repaint)
-/****************************************************************************
-*
-* Function: CenterWindow
-* Parameters: hWndCenter - Window to center
-* parent - Handle for parent window
-* repaint - true if window should be re-painted
-*
-* Description: Centers the specified window within the bounds of the
-* specified parent window. If the parent window is NULL, then
-* we center it using the Desktop window.
-*
-****************************************************************************/
-{
- HWND hWndParent = (parent ? parent : GetDesktopWindow());
- RECT RectParent;
- RECT RectCenter;
- int CenterX,CenterY,Height,Width;
-
- GetWindowRect(hWndParent, &RectParent);
- GetWindowRect(hWndCenter, &RectCenter);
-
- Width = (RectCenter.right - RectCenter.left);
- Height = (RectCenter.bottom - RectCenter.top);
- CenterX = ((RectParent.right - RectParent.left) - Width) / 2;
- CenterY = ((RectParent.bottom - RectParent.top) - Height) / 2;
-
- if ((CenterX < 0) || (CenterY < 0)) {
- /* The Center Window is smaller than the parent window. */
- if (hWndParent != GetDesktopWindow()) {
- /* If the parent window is not the desktop use the desktop size. */
- CenterX = (GetSystemMetrics(SM_CXSCREEN) - Width) / 2;
- CenterY = (GetSystemMetrics(SM_CYSCREEN) - Height) / 2;
- }
- CenterX = (CenterX < 0) ? 0: CenterX;
- CenterY = (CenterY < 0) ? 0: CenterY;
- }
- else {
- CenterX += RectParent.left;
- CenterY += RectParent.top;
- }
-
- /* Copy the values into RectCenter */
- RectCenter.left = CenterX;
- RectCenter.right = CenterX + Width;
- RectCenter.top = CenterY;
- RectCenter.bottom = CenterY + Height;
-
- /* Move the window to the new location */
- MoveWindow(hWndCenter, RectCenter.left, RectCenter.top,
- (RectCenter.right - RectCenter.left),
- (RectCenter.bottom - RectCenter.top), repaint);
-}
-
-void _EXPORT CenterLogo(HWND hWndLogo, HWND hWndParent, int CenterY)
-/****************************************************************************
-*
-* Function: CenterLogo
-* Parameters: hWndLogo - Window to center
-* hWndParent - Handle for parent window
-* CenterY - Top coordinate for logo
-*
-* Description: Centers the specified window within the bounds of the
-* specified parent window in the horizontal direction only.
-*
-****************************************************************************/
-{
- RECT RectParent;
- RECT RectCenter;
- int CenterX,Height,Width;
-
- GetWindowRect(hWndParent, &RectParent);
- GetWindowRect(hWndLogo, &RectCenter);
- Width = (RectCenter.right - RectCenter.left);
- Height = (RectCenter.bottom - RectCenter.top);
- CenterX = ((RectParent.right - RectParent.left) - Width) / 2;
-
- /* Copy the values into RectCenter */
- RectCenter.left = CenterX;
- RectCenter.right = CenterX + Width;
- RectCenter.top = CenterY;
- RectCenter.bottom = CenterY + Height;
-
- /* Move the window to the new location */
- MoveWindow(hWndLogo, RectCenter.left, RectCenter.top,
- (RectCenter.right - RectCenter.left),
- (RectCenter.bottom - RectCenter.top), false);
-}
diff --git a/board/MAI/bios_emulator/scitech/src/common/cmdline.c b/board/MAI/bios_emulator/scitech/src/common/cmdline.c
deleted file mode 100644
index 531e5e1312..0000000000
--- a/board/MAI/bios_emulator/scitech/src/common/cmdline.c
+++ /dev/null
@@ -1,428 +0,0 @@
-/****************************************************************************
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: any
-*
-* Description: This module contains code to parse the command line,
-* extracting options and parameters in standard System V
-* style.
-*
-****************************************************************************/
-
-#include <stdio.h>
-#include <string.h>
-#include <ctype.h>
-#include "cmdline.h"
-
-/*------------------------- Global variables ------------------------------*/
-
-int nextargv = 1; /* Index into argv array */
-char *nextchar = NULL; /* Pointer to next character */
-
-/*-------------------------- Implementation -------------------------------*/
-
-#define IS_SWITCH_CHAR(c) ((c) == '-')
-#define IS_NOT_SWITCH_CHAR(c) ((c) != '-')
-
-/****************************************************************************
-DESCRIPTION:
-Parse the command line for specific options
-
-HEADER:
-cmdline.h
-
-PARAMETERS:
-argc - Value passed to program through argc variable
-argv - Pointer to the argv array passed to the program
-format - A string representing the expected format of the command line
-argument - Pointer to optional argument on command line
-
-RETURNS:
-Character code representing the next option parsed from the command line by
-getcmdopt. Returns ALLDONE (-1) when there are no more parameters to be parsed
-on the command line, PARAMETER (-2) when the argument being parsed is a
-parameter and not an option switch and lastly INVALID (-3) if an error
-occured while parsing the command line.
-
-REMARKS:
-Function to parse the command line option switches in UNIX System V style.
-When getcmdopt is called, it returns the character code of the next valid
-option that is parsed from the command line as specified by the Format
-string. The format string should be in the following form:
-
- "abcd:e:f:"
-
-where a,b and c represent single switch style options and the character
-code returned by getcmdopt is the only value returned. Also d, e and f
-represent options that expect arguments immediately after them on the
-command line. The argument that follows the option on the command line is
-returned via a reference in the pointer argument. Thus a valid command line
-for this format string might be:
-
- myprogram -adlines -b -f format infile outfile
-
-where a and b will be returned as single character options with no argument,
-while d is returned with the argument lines and f is returned with the
-argument format.
-
-When getcmdopt returns with PARAMETER (we attempted to parse a paramter, not
-an option), the global variable NextArgv will hold an index in the argv
-array to the argument on the command line AFTER the options, ie in the
-above example the string 'infile'. If the parameter is successfully used,
-NextArgv should be incremented and getcmdopt can be called again to parse any
-more options. Thus you can also have options interspersed throught the
-command line. eg:
-
- myprogram -adlines infile -b outfile -f format
-
-can be made to be a valid form of the above command line.
-****************************************************************************/
-int getcmdopt(
- int argc,
- char **argv,
- char *format,
- char **argument)
-{
- char ch;
- char *formatchar;
-
- if (argc > nextargv) {
- if (nextchar == NULL) {
- nextchar = argv[nextargv]; /* Index next argument */
- if (nextchar == NULL) {
- nextargv++;
- return ALLDONE; /* No more options */
- }
- if (IS_NOT_SWITCH_CHAR(*nextchar)) {
- nextchar = NULL;
- return PARAMETER; /* We have a parameter */
- }
- nextchar++; /* Move past switch operator */
- if (IS_SWITCH_CHAR(*nextchar)) {
- nextchar = NULL;
- return INVALID; /* Ignore rest of line */
- }
- }
- if ((ch = *(nextchar++)) == 0) {
- nextchar = NULL;
- return INVALID; /* No options on line */
- }
-
- if (ch == ':' || (formatchar = strchr(format, ch)) == NULL)
- return INVALID;
-
- if (*(++formatchar) == ':') { /* Expect an argument after option */
- nextargv++;
- if (*nextchar == 0) {
- if (argc <= nextargv)
- return INVALID;
- nextchar = argv[nextargv++];
- }
- *argument = nextchar;
- nextchar = NULL;
- }
- else { /* We have a switch style option */
- if (*nextchar == 0) {
- nextargv++;
- nextchar = NULL;
- }
- *argument = NULL;
- }
- return ch; /* return the option specifier */
- }
- nextchar = NULL;
- nextargv++;
- return ALLDONE; /* no arguments on command line */
-}
-
-/****************************************************************************
-PARAMETERS:
-optarr - Description for the option we are parsing
-argument - String to parse
-
-RETURNS:
-INVALID on error, ALLDONE on success.
-
-REMARKS:
-Parses the argument string depending on the type of argument that is
-expected, filling in the argument for that option. Note that to parse a
-string, we simply return a pointer to argument.
-****************************************************************************/
-static int parse_option(
- Option *optarr,
- char *argument)
-{
- int num_read;
-
- switch ((int)(optarr->type)) {
- case OPT_INTEGER:
- num_read = sscanf(argument,"%d",(int*)optarr->arg);
- break;
- case OPT_HEX:
- num_read = sscanf(argument,"%x",(int*)optarr->arg);
- break;
- case OPT_OCTAL:
- num_read = sscanf(argument,"%o",(int*)optarr->arg);
- break;
- case OPT_UNSIGNED:
- num_read = sscanf(argument,"%u",(uint*)optarr->arg);
- break;
- case OPT_LINTEGER:
- num_read = sscanf(argument,"%ld",(long*)optarr->arg);
- break;
- case OPT_LHEX:
- num_read = sscanf(argument,"%lx",(long*)optarr->arg);
- break;
- case OPT_LOCTAL:
- num_read = sscanf(argument,"%lo",(long*)optarr->arg);
- break;
- case OPT_LUNSIGNED:
- num_read = sscanf(argument,"%lu",(ulong*)optarr->arg);
- break;
- case OPT_FLOAT:
- num_read = sscanf(argument,"%f",(float*)optarr->arg);
- break;
- case OPT_DOUBLE:
- num_read = sscanf(argument,"%lf",(double*)optarr->arg);
- break;
- case OPT_LDOUBLE:
- num_read = sscanf(argument,"%Lf",(long double*)optarr->arg);
- break;
- case OPT_STRING:
- num_read = 1; /* This always works */
- *((char**)optarr->arg) = argument;
- break;
- default:
- return INVALID;
- }
-
- if (num_read == 0)
- return INVALID;
- else
- return ALLDONE;
-}
-
-/****************************************************************************
-HEADER:
-cmdline.h
-
-PARAMETERS:
-argc - Number of arguments on command line
-argv - Array of command line arguments
-num_opt - Number of options in option array
-optarr - Array to specify how to parse the command line
-do_param - Routine to handle a command line parameter
-
-RETURNS:
-ALLDONE, INVALID or HELP
-
-REMARKS:
-Function to parse the command line according to a table of options. This
-routine calls getcmdopt above to parse each individual option and attempts
-to parse each option into a variable of the specified type. The routine
-can parse integers and long integers in either decimal, octal, hexadecimal
-notation, unsigned integers and unsigned longs, strings and option switches.
-Option switches are simply boolean variables that get turned on if the
-switch was parsed.
-
-Parameters are extracted from the command line by calling a user supplied
-routine do_param() to handle each parameter as it is encountered. The
-routine do_param() should accept a pointer to the parameter on the command
-line and an integer representing how many parameters have been encountered
-(ie: 1 if this is the first parameter, 10 if it is the 10th etc), and return
-ALLDONE upon successfully parsing it or INVALID if the parameter was invalid.
-
-We return either ALLDONE if all the options were successfully parsed,
-INVALID if an invalid option was encountered or HELP if any of -h, -H or
--? were present on the command line.
-****************************************************************************/
-int getargs(
- int argc,
- char *argv[],
- int num_opt,
- Option optarr[],
- int (*do_param)(
- char *param,
- int num))
-{
- int i,opt;
- char *argument;
- int param_num = 1;
- char cmdstr[MAXARG*2 + 4];
-
- /* Build the command string from the array of options */
-
- strcpy(cmdstr,"hH?");
- for (i = 0,opt = 3; i < num_opt; i++,opt++) {
- cmdstr[opt] = optarr[i].opt;
- if (optarr[i].type != OPT_SWITCH) {
- cmdstr[++opt] = ':';
- }
- }
- cmdstr[opt] = '\0';
-
- for (;;) {
- opt = getcmdopt(argc,argv,cmdstr,&argument);
- switch (opt) {
- case 'H':
- case 'h':
- case '?':
- return HELP;
- case ALLDONE:
- return ALLDONE;
- case INVALID:
- return INVALID;
- case PARAMETER:
- if (do_param == NULL)
- return INVALID;
- if (do_param(argv[nextargv],param_num) == INVALID)
- return INVALID;
- nextargv++;
- param_num++;
- break;
- default:
-
- /* Search for the option in the option array. We are
- * guaranteed to find it.
- */
-
- for (i = 0; i < num_opt; i++) {
- if (optarr[i].opt == opt)
- break;
- }
- if (optarr[i].type == OPT_SWITCH)
- *((ibool*)optarr[i].arg) = true;
- else {
- if (parse_option(&optarr[i],argument) == INVALID)
- return INVALID;
- }
- break;
- }
- }
-}
-
-/****************************************************************************
-HEADER:
-cmdline.h
-
-PARAMETERS:
-num_opt - Number of options in the table
-optarr - Table of option descriptions
-
-REMARKS:
-Prints the description of each option in a standard format to the standard
-output device. The description for each option is obtained from the table
-of options.
-****************************************************************************/
-void print_desc(
- int num_opt,
- Option optarr[])
-{
- int i;
-
- for (i = 0; i < num_opt; i++) {
- if (optarr[i].type == OPT_SWITCH)
- printf(" -%c %s\n",optarr[i].opt,optarr[i].desc);
- else
- printf(" -%c<arg> %s\n",optarr[i].opt,optarr[i].desc);
- }
-}
-
-/****************************************************************************
-HEADER:
-cmdline.h
-
-PARAMETERS:
-moduleName - Module name for program
-cmdLine - Command line to parse
-pargc - Pointer to 'argc' parameter
-pargv - Pointer to 'argv' parameter
-maxArgc - Maximum argv array index
-
-REMARKS:
-Parses a command line from a single string into the C style 'argc' and
-'argv' format. Most useful for Windows programs where the command line
-is passed in verbatim.
-****************************************************************************/
-int parse_commandline(
- char *moduleName,
- char *cmdLine,
- int *pargc,
- char *argv[],
- int maxArgv)
-{
- static char str[512];
- static char filename[260];
- char *prevWord = NULL;
- ibool inQuote = FALSE;
- ibool noStrip = FALSE;
- int argc;
-
- argc = 0;
- strcpy(filename,moduleName);
- argv[argc++] = filename;
- cmdLine = strncpy(str, cmdLine, sizeof(str)-1);
- while (*cmdLine) {
- switch (*cmdLine) {
- case '"' :
- if (prevWord != NULL) {
- if (inQuote) {
- if (!noStrip)
- *cmdLine = '\0';
- argv [argc++] = prevWord;
- prevWord = NULL;
- }
- else
- noStrip = TRUE;
- }
- inQuote = !inQuote;
- break;
- case ' ' :
- case '\t' :
- if (!inQuote) {
- if (prevWord != NULL) {
- *cmdLine = '\0';
- argv [argc++] = prevWord;
- prevWord = NULL;
- noStrip = FALSE;
- }
- }
- break;
- default :
- if (prevWord == NULL)
- prevWord = cmdLine;
- break;
- }
- if (argc >= maxArgv - 1)
- break;
- cmdLine++;
- }
-
- if ((prevWord != NULL || (inQuote && prevWord != NULL)) && argc < maxArgv - 1) {
- *cmdLine = '\0';
- argv [argc++] = prevWord;
- }
- argv[argc] = NULL;
-
- /* Return updated parameters */
- return (*pargc = argc);
-}
diff --git a/board/MAI/bios_emulator/scitech/src/common/gabeos.c b/board/MAI/bios_emulator/scitech/src/common/gabeos.c
deleted file mode 100644
index a934bd1cfc..0000000000
--- a/board/MAI/bios_emulator/scitech/src/common/gabeos.c
+++ /dev/null
@@ -1,146 +0,0 @@
-/****************************************************************************
-*
-* SciTech Nucleus Graphics Architecture
-*
-* Copyright (C) 1991-1998 SciTech Software, Inc.
-* All rights reserved.
-*
-* ======================================================================
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* | |
-* |This copyrighted computer code contains proprietary technology |
-* |owned by SciTech Software, Inc., located at 505 Wall Street, |
-* |Chico, CA 95928 USA (http://www.scitechsoft.com). |
-* | |
-* |The contents of this file are subject to the SciTech Nucleus |
-* |License; you may *not* use this file or related software except in |
-* |compliance with the License. You may obtain a copy of the License |
-* |at http://www.scitechsoft.com/nucleus-license.txt |
-* | |
-* |Software distributed under the License is distributed on an |
-* |"AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or |
-* |implied. See the License for the specific language governing |
-* |rights and limitations under the License. |
-* | |
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* ======================================================================
-*
-* Language: ANSI C
-* Environment: Linux
-*
-* Description: OS specific Nucleus Graphics Architecture services for
-* the Linux operating system.
-*
-****************************************************************************/
-
-#include "nucleus/graphics.h"
-#include <sys/time.h>
-
-static ibool haveRDTSC;
-
-/*-------------------------- Implementation -------------------------------*/
-
-/****************************************************************************
-PARAMETERS:
-path - Local path to the Nucleus driver files.
-
-REMARKS:
-This function is used by the application program to override the location
-of the Nucleus driver files that are loaded. Normally the loader code
-will look in the system Nucleus directories first, then in the 'drivers'
-directory relative to the current working directory, and finally relative
-to the MGL_ROOT environment variable.
-****************************************************************************/
-void NAPI GA_setLocalPath(
- const char *path)
-{
- PM_setLocalBPDPath(path);
-}
-
-/****************************************************************************
-RETURNS:
-Pointer to the system wide PM library imports, or the internal version if none
-
-REMARKS:
-In order to support deploying new Nucleus drivers that may require updated
-PM library functions, we check here to see if there is a system wide version
-of the PM functions available. If so we return those functions for use with
-the system wide Nucleus drivers, otherwise the compiled in version of the PM
-library is used with the application local version of Nucleus.
-****************************************************************************/
-PM_imports * NAPI GA_getSystemPMImports(void)
-{
- /* TODO: We may very well want to provide a system shared library */
- /* that eports the PM functions required by the Nucleus library */
- /* for BeOS here. That will eliminate fatal errors loading new */
- /* drivers on BeOS! */
- return &_PM_imports;
-}
-
-/****************************************************************************
-REMARKS:
-Nothing special for this OS.
-****************************************************************************/
-ibool NAPI GA_getSharedExports(
- GA_exports *gaExp,
- ibool shared)
-{
- (void)gaExp;
- (void)shared;
- return false;
-}
-
-#ifndef TEST_HARNESS
-/****************************************************************************
-REMARKS:
-Nothing special for this OS
-****************************************************************************/
-ibool NAPI GA_queryFunctions(
- GA_devCtx *dc,
- N_uint32 id,
- void _FAR_ *funcs)
-{
- return __GA_exports.GA_queryFunctions(dc,id,funcs);
-}
-
-/****************************************************************************
-REMARKS:
-Nothing special for this OS
-****************************************************************************/
-ibool NAPI REF2D_queryFunctions(
- REF2D_driver *ref2d,
- N_uint32 id,
- void _FAR_ *funcs)
-{
- return __GA_exports.REF2D_queryFunctions(ref2d,id,funcs);
-}
-#endif
-
-/****************************************************************************
-REMARKS:
-This function initialises the high precision timing functions for the
-Nucleus loader library.
-****************************************************************************/
-ibool NAPI GA_TimerInit(void)
-{
- if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0)
- haveRDTSC = true;
- return true;
-}
-
-/****************************************************************************
-REMARKS:
-This function reads the high resolution timer.
-****************************************************************************/
-void NAPI GA_TimerRead(
- GA_largeInteger *value)
-{
- if (haveRDTSC)
- _GA_readTimeStamp(value);
- else {
- struct timeval t;
- gettimeofday(&t, NULL);
- value->low = t.tv_sec*1000000 + t.tv_usec;
- value->high = 0;
- }
-}
diff --git a/board/MAI/bios_emulator/scitech/src/common/gados.c b/board/MAI/bios_emulator/scitech/src/common/gados.c
deleted file mode 100644
index d2be77694f..0000000000
--- a/board/MAI/bios_emulator/scitech/src/common/gados.c
+++ /dev/null
@@ -1,135 +0,0 @@
-/****************************************************************************
-*
-* SciTech Nucleus Graphics Architecture
-*
-* Copyright (C) 1991-1998 SciTech Software, Inc.
-* All rights reserved.
-*
-* ======================================================================
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* | |
-* |This copyrighted computer code contains proprietary technology |
-* |owned by SciTech Software, Inc., located at 505 Wall Street, |
-* |Chico, CA 95928 USA (http://www.scitechsoft.com). |
-* | |
-* |The contents of this file are subject to the SciTech Nucleus |
-* |License; you may *not* use this file or related software except in |
-* |compliance with the License. You may obtain a copy of the License |
-* |at http://www.scitechsoft.com/nucleus-license.txt |
-* | |
-* |Software distributed under the License is distributed on an |
-* |"AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or |
-* |implied. See the License for the specific language governing |
-* |rights and limitations under the License. |
-* | |
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* ======================================================================
-*
-* Language: ANSI C
-* Environment: MSDOS
-*
-* Description: OS specific Nucleus Graphics Architecture services for
-* the MSDOS operating system.
-*
-****************************************************************************/
-
-#include "pm_help.h"
-#include "pmapi.h"
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-
-/*-------------------------- Implementation -------------------------------*/
-
-/****************************************************************************
-PARAMETERS:
-path - Local path to the Nucleus driver files.
-
-REMARKS:
-This function is used by the application program to override the location
-of the Nucleus driver files that are loaded. Normally the loader code
-will look in the system Nucleus directories first, then in the 'drivers'
-directory relative to the current working directory, and finally relative
-to the MGL_ROOT environment variable.
-****************************************************************************/
-void NAPI GA_setLocalPath(
- const char *path)
-{
- PM_setLocalBPDPath(path);
-}
-
-/****************************************************************************
-RETURNS:
-Pointer to the system wide PM library imports, or the internal version if none
-
-REMARKS:
-Nothing to do here for DOS. Basically since DOS has no system wide shared
-library mechanism we are essentially screwed if the binary API changes.
-By default for 32-bit DOS apps the local Nucleus drivers should always be
-used in preference to the system wide Nucleus drivers.
-****************************************************************************/
-PM_imports * NAPI GA_getSystemPMImports(void)
-{
- return &_PM_imports;
-}
-
-/****************************************************************************
-REMARKS:
-Nothing special for this OS.
-****************************************************************************/
-ibool NAPI GA_getSharedExports(
- GA_exports *gaExp,
- ibool shared)
-{
- (void)gaExp;
- (void)shared;
- return false;
-}
-
-#if !defined(TEST_HARNESS) && !defined(VBETEST)
-/****************************************************************************
-REMARKS:
-Nothing special for this OS
-****************************************************************************/
-ibool NAPI GA_queryFunctions(
- GA_devCtx *dc,
- N_uint32 id,
- void _FAR_ *funcs)
-{
- return __GA_exports.GA_queryFunctions(dc,id,funcs);
-}
-
-/****************************************************************************
-REMARKS:
-Nothing special for this OS
-****************************************************************************/
-ibool NAPI REF2D_queryFunctions(
- REF2D_driver *ref2d,
- N_uint32 id,
- void _FAR_ *funcs)
-{
- return __GA_exports.REF2D_queryFunctions(ref2d,id,funcs);
-}
-#endif
-
-/****************************************************************************
-REMARKS:
-This function initialises the high precision timing functions for the DOS
-Nucleus loader library.
-****************************************************************************/
-ibool NAPI GA_TimerInit(void)
-{
- if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0)
- return true;
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-This function reads the high resolution timer.
-****************************************************************************/
-void NAPI GA_TimerRead(
- GA_largeInteger *value)
-{
- _GA_readTimeStamp(value);
-}
diff --git a/board/MAI/bios_emulator/scitech/src/common/galib.c b/board/MAI/bios_emulator/scitech/src/common/galib.c
deleted file mode 100644
index f2eacc3d24..0000000000
--- a/board/MAI/bios_emulator/scitech/src/common/galib.c
+++ /dev/null
@@ -1,268 +0,0 @@
-/****************************************************************************
-*
-* SciTech Nucleus Graphics Architecture
-*
-* Copyright (C) 1991-1998 SciTech Software, Inc.
-* All rights reserved.
-*
-* ======================================================================
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* | |
-* |This copyrighted computer code contains proprietary technology |
-* |owned by SciTech Software, Inc., located at 505 Wall Street, |
-* |Chico, CA 95928 USA (http://www.scitechsoft.com). |
-* | |
-* |The contents of this file are subject to the SciTech Nucleus |
-* |License; you may *not* use this file or related software except in |
-* |compliance with the License. You may obtain a copy of the License |
-* |at http://www.scitechsoft.com/nucleus-license.txt |
-* | |
-* |Software distributed under the License is distributed on an |
-* |"AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or |
-* |implied. See the License for the specific language governing |
-* |rights and limitations under the License. |
-* | |
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* ======================================================================
-*
-* Language: ANSI C
-* Environment: Any 32-bit protected mode environment
-*
-* Description: C module for the Graphics Accelerator Driver API. Uses
-* the SciTech PM library for interfacing with DOS
-* extender specific functions.
-*
-****************************************************************************/
-
-#include "nucleus/graphics.h"
-#if defined(__WIN32_VXD__) || defined(__NT_DRIVER__)
-#include "sdd/sddhelp.h"
-#else
-#include <stdio.h>
-#include <stdlib.h>
-#endif
-
-/*---------------------------- Global Variables ---------------------------*/
-
-#ifndef TEST_HARNESS
-GA_exports _VARAPI __GA_exports;
-static int loaded = false;
-static PE_MODULE *hModBPD = NULL;
-
-static N_imports _N_imports = {
- sizeof(N_imports),
- _OS_delay,
- };
-
-static GA_imports _GA_imports = {
- sizeof(GA_imports),
- GA_getSharedInfo,
- GA_TimerInit,
- GA_TimerRead,
- GA_TimerDifference,
- };
-#endif
-
-/*----------------------------- Implementation ----------------------------*/
-
-#define DLL_NAME "graphics.bpd"
-
-/****************************************************************************
-REMARKS:
-This function is no longer used but we must implement it and return NULL
-for compatibility with older binary drivers.
-****************************************************************************/
-GA_sharedInfo * NAPI GA_getSharedInfo(
- int device)
-{
- return NULL;
-}
-
-#ifndef TEST_HARNESS
-/****************************************************************************
-REMARKS:
-Fatal error handler for non-exported GA_exports.
-****************************************************************************/
-static void _GA_fatalErrorHandler(void)
-{
- PM_fatalError("Unsupported Nucleus export function called! Please upgrade your copy of Nucleus!\n");
-}
-
-/****************************************************************************
-PARAMETERS:
-shared - True to load the driver into shared memory.
-
-REMARKS:
-Loads the Nucleus binary portable DLL into memory and initilises it.
-****************************************************************************/
-static ibool LoadDriver(
- ibool shared)
-{
- GA_initLibrary_t GA_initLibrary;
- GA_exports *gaExp;
- char filename[PM_MAX_PATH];
- char bpdpath[PM_MAX_PATH];
- int i,max;
- ulong *p;
-
- /* Check if we have already loaded the driver */
- if (loaded)
- return true;
- PM_init();
-
- /* First try to see if we can find the system wide shared exports
- * if they are available. Under OS/2 this connects to our global
- * shared Nucleus loader in SDDPMI.DLL.
- */
- __GA_exports.dwSize = sizeof(__GA_exports);
- if (GA_getSharedExports(&__GA_exports,shared))
- return loaded = true;
-
- /* Open the BPD file */
- if (!PM_findBPD(DLL_NAME,bpdpath))
- return false;
- strcpy(filename,bpdpath);
- strcat(filename,DLL_NAME);
- if ((hModBPD = PE_loadLibrary(filename,shared)) == NULL)
- return false;
- if ((GA_initLibrary = (GA_initLibrary_t)PE_getProcAddress(hModBPD,"_GA_initLibrary")) == NULL)
- return false;
- bpdpath[strlen(bpdpath)-1] = 0;
- if (strcmp(bpdpath,PM_getNucleusPath()) == 0)
- strcpy(bpdpath,PM_getNucleusConfigPath());
- else {
- PM_backslash(bpdpath);
- strcat(bpdpath,"config");
- }
- if ((gaExp = GA_initLibrary(shared,bpdpath,filename,GA_getSystemPMImports(),&_N_imports,&_GA_imports)) == NULL)
- PM_fatalError("GA_initLibrary failed!\n");
-
- /* Initialize all default imports to point to fatal error handler
- * for upwards compatibility, and copy the exported functions.
- */
- max = sizeof(__GA_exports)/sizeof(GA_initLibrary_t);
- for (i = 0,p = (ulong*)&__GA_exports; i < max; i++)
- *p++ = (ulong)_GA_fatalErrorHandler;
- memcpy(&__GA_exports,gaExp,MIN(sizeof(__GA_exports),gaExp->dwSize));
- loaded = true;
- return true;
-}
-
-/* The following are stub entry points that the application calls to
- * initialise the Nucleus loader library, and we use this to load our
- * driver DLL from disk and initialise the library using it.
- */
-
-/* {secret} */
-int NAPI GA_status(void)
-{
- if (!loaded)
- return nDriverNotFound;
- return __GA_exports.GA_status();
-}
-
-/* {secret} */
-const char * NAPI GA_errorMsg(
- N_int32 status)
-{
- if (!loaded)
- return "Unable to load Nucleus device driver!";
- return __GA_exports.GA_errorMsg(status);
-}
-
-/* {secret} */
-int NAPI GA_getDaysLeft(N_int32 shared)
-{
- if (!LoadDriver(shared))
- return -1;
- return __GA_exports.GA_getDaysLeft(shared);
-}
-
-/* {secret} */
-int NAPI GA_registerLicense(uchar *license,N_int32 shared)
-{
- if (!LoadDriver(shared))
- return 0;
- return __GA_exports.GA_registerLicense(license,shared);
-}
-
-/* {secret} */
-ibool NAPI GA_loadInGUI(N_int32 shared)
-{
- if (!LoadDriver(shared))
- return false;
- return __GA_exports.GA_loadInGUI(shared);
-}
-
-/* {secret} */
-int NAPI GA_enumerateDevices(N_int32 shared)
-{
- if (!LoadDriver(shared))
- return 0;
- return __GA_exports.GA_enumerateDevices(shared);
-}
-
-/* {secret} */
-GA_devCtx * NAPI GA_loadDriver(N_int32 deviceIndex,N_int32 shared)
-{
- if (!LoadDriver(shared))
- return NULL;
- return __GA_exports.GA_loadDriver(deviceIndex,shared);
-}
-
-/* {secret} */
-void NAPI GA_getGlobalOptions(
- GA_globalOptions *options,
- ibool shared)
-{
- if (LoadDriver(shared))
- __GA_exports.GA_getGlobalOptions(options,shared);
-}
-
-/* {secret} */
-PE_MODULE * NAPI GA_loadLibrary(
- const char *szBPDName,
- ulong *size,
- ibool shared)
-{
- if (!LoadDriver(shared))
- return NULL;
- return __GA_exports.GA_loadLibrary(szBPDName,size,shared);
-}
-
-/* {secret} */
-GA_devCtx * NAPI GA_getCurrentDriver(
- N_int32 deviceIndex)
-{
- /* Bail for older drivers that didn't export this function! */
- if (!__GA_exports.GA_getCurrentDriver)
- return NULL;
- return __GA_exports.GA_getCurrentDriver(deviceIndex);
-}
-
-/* {secret} */
-REF2D_driver * NAPI GA_getCurrentRef2d(
- N_int32 deviceIndex)
-{
- /* Bail for older drivers that didn't export this function! */
- if (!__GA_exports.GA_getCurrentRef2d)
- return NULL;
- return __GA_exports.GA_getCurrentRef2d(deviceIndex);
-}
-
-/* {secret} */
-int NAPI GA_isOEMVersion(ibool shared)
-{
- if (!LoadDriver(shared))
- return 0;
- return __GA_exports.GA_isOEMVersion(shared);
-}
-
-/* {secret} */
-N_uint32 * NAPI GA_getLicensedDevices(ibool shared)
-{
- if (!LoadDriver(shared))
- return 0;
- return __GA_exports.GA_getLicensedDevices(shared);
-}
-#endif
diff --git a/board/MAI/bios_emulator/scitech/src/common/galinux.c b/board/MAI/bios_emulator/scitech/src/common/galinux.c
deleted file mode 100644
index 47e4e8581d..0000000000
--- a/board/MAI/bios_emulator/scitech/src/common/galinux.c
+++ /dev/null
@@ -1,148 +0,0 @@
-/****************************************************************************
-*
-* SciTech Nucleus Graphics Architecture
-*
-* Copyright (C) 1991-1998 SciTech Software, Inc.
-* All rights reserved.
-*
-* ======================================================================
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* | |
-* |This copyrighted computer code contains proprietary technology |
-* |owned by SciTech Software, Inc., located at 505 Wall Street, |
-* |Chico, CA 95928 USA (http://www.scitechsoft.com). |
-* | |
-* |The contents of this file are subject to the SciTech Nucleus |
-* |License; you may *not* use this file or related software except in |
-* |compliance with the License. You may obtain a copy of the License |
-* |at http://www.scitechsoft.com/nucleus-license.txt |
-* | |
-* |Software distributed under the License is distributed on an |
-* |"AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or |
-* |implied. See the License for the specific language governing |
-* |rights and limitations under the License. |
-* | |
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* ======================================================================
-*
-* Language: ANSI C
-* Environment: Linux
-*
-* Description: OS specific Nucleus Graphics Architecture services for
-* the Linux operating system.
-*
-****************************************************************************/
-
-#include "nucleus/graphics.h"
-#include <sys/time.h>
-
-/*---------------------------- Global Variables ---------------------------*/
-
-static ibool haveRDTSC;
-
-/*-------------------------- Implementation -------------------------------*/
-
-/****************************************************************************
-PARAMETERS:
-path - Local path to the Nucleus driver files.
-
-REMARKS:
-This function is used by the application program to override the location
-of the Nucleus driver files that are loaded. Normally the loader code
-will look in the system Nucleus directories first, then in the 'drivers'
-directory relative to the current working directory, and finally relative
-to the MGL_ROOT environment variable.
-****************************************************************************/
-void NAPI GA_setLocalPath(
- const char *path)
-{
- PM_setLocalBPDPath(path);
-}
-
-/****************************************************************************
-RETURNS:
-Pointer to the system wide PM library imports, or the internal version if none
-
-REMARKS:
-In order to support deploying new Nucleus drivers that may require updated
-PM library functions, we check here to see if there is a system wide version
-of the PM functions available. If so we return those functions for use with
-the system wide Nucleus drivers, otherwise the compiled in version of the PM
-library is used with the application local version of Nucleus.
-****************************************************************************/
-PM_imports * NAPI GA_getSystemPMImports(void)
-{
- /* TODO: We may very well want to provide a system shared library */
- /* that eports the PM functions required by the Nucleus library */
- /* for Linux here. That will eliminate fatal errors loading new */
- /* drivers on Linux! */
- return &_PM_imports;
-}
-
-/****************************************************************************
-REMARKS:
-Nothing special for this OS.
-****************************************************************************/
-ibool NAPI GA_getSharedExports(
- GA_exports *gaExp,
- ibool shared)
-{
- (void)gaExp;
- (void)shared;
- return false;
-}
-
-#ifndef TEST_HARNESS
-/****************************************************************************
-REMARKS:
-Nothing special for this OS
-****************************************************************************/
-ibool NAPI GA_queryFunctions(
- GA_devCtx *dc,
- N_uint32 id,
- void _FAR_ *funcs)
-{
- return __GA_exports.GA_queryFunctions(dc,id,funcs);
-}
-
-/****************************************************************************
-REMARKS:
-Nothing special for this OS
-****************************************************************************/
-ibool NAPI REF2D_queryFunctions(
- REF2D_driver *ref2d,
- N_uint32 id,
- void _FAR_ *funcs)
-{
- return __GA_exports.REF2D_queryFunctions(ref2d,id,funcs);
-}
-#endif
-
-/****************************************************************************
-REMARKS:
-This function initialises the high precision timing functions for the
-Nucleus loader library.
-****************************************************************************/
-ibool NAPI GA_TimerInit(void)
-{
- if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0)
- haveRDTSC = true;
- return true;
-}
-
-/****************************************************************************
-REMARKS:
-This function reads the high resolution timer.
-****************************************************************************/
-void NAPI GA_TimerRead(
- GA_largeInteger *value)
-{
- if (haveRDTSC)
- _GA_readTimeStamp(value);
- else {
- struct timeval t;
- gettimeofday(&t, NULL);
- value->low = t.tv_sec*1000000 + t.tv_usec;
- value->high = 0;
- }
-}
diff --git a/board/MAI/bios_emulator/scitech/src/common/gantdrv.c b/board/MAI/bios_emulator/scitech/src/common/gantdrv.c
deleted file mode 100644
index 050f73767c..0000000000
--- a/board/MAI/bios_emulator/scitech/src/common/gantdrv.c
+++ /dev/null
@@ -1,136 +0,0 @@
-/****************************************************************************
-*
-* SciTech Nucleus Graphics Architecture
-*
-* Copyright (C) 1991-1998 SciTech Software, Inc.
-* All rights reserved.
-*
-* ======================================================================
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* | |
-* |This copyrighted computer code contains proprietary technology |
-* |owned by SciTech Software, Inc., located at 505 Wall Street, |
-* |Chico, CA 95928 USA (http://www.scitechsoft.com). |
-* | |
-* |The contents of this file are subject to the SciTech Nucleus |
-* |License; you may *not* use this file or related software except in |
-* |compliance with the License. You may obtain a copy of the License |
-* |at http://www.scitechsoft.com/nucleus-license.txt |
-* | |
-* |Software distributed under the License is distributed on an |
-* |"AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or |
-* |implied. See the License for the specific language governing |
-* |rights and limitations under the License. |
-* | |
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* ======================================================================
-*
-* Language: ANSI C
-* Environment: NT device driver
-*
-* Description: OS specific Nucleus Graphics Architecture services for
-* the NT device drivers.
-*
-****************************************************************************/
-
-#include "sdd/sddhelp.h"
-
-/*------------------------- Global Variables ------------------------------*/
-
-static ibool haveRDTSC;
-
-/*-------------------------- Implementation -------------------------------*/
-
-/****************************************************************************
-PARAMETERS:
-path - Local path to the Nucleus driver files.
-
-REMARKS:
-This function is used by the application program to override the location
-of the Nucleus driver files that are loaded. Normally the loader code
-will look in the system Nucleus directories first, then in the 'drivers'
-directory relative to the current working directory, and finally relative
-to the MGL_ROOT environment variable.
-****************************************************************************/
-void NAPI GA_setLocalPath(
- const char *path)
-{
- PM_setLocalBPDPath(path);
-}
-
-/****************************************************************************
-RETURNS:
-Pointer to the system wide PM library imports, or the internal version if none
-
-REMARKS:
-Nothing special for this OS.
-****************************************************************************/
-PM_imports * NAPI GA_getSystemPMImports(void)
-{
- return &_PM_imports;
-}
-
-/****************************************************************************
-REMARKS:
-Nothing special for this OS.
-****************************************************************************/
-ibool NAPI GA_getSharedExports(
- GA_exports *gaExp,
- ibool shared)
-{
- (void)gaExp;
- (void)shared;
- return false;
-}
-
-#ifndef TEST_HARNESS
-/****************************************************************************
-REMARKS:
-Nothing special for this OS
-****************************************************************************/
-ibool NAPI GA_queryFunctions(
- GA_devCtx *dc,
- N_uint32 id,
- void _FAR_ *funcs)
-{
- return __GA_exports.GA_queryFunctions(dc,id,funcs);
-}
-
-/****************************************************************************
-REMARKS:
-Nothing special for this OS
-****************************************************************************/
-ibool NAPI REF2D_queryFunctions(
- REF2D_driver *ref2d,
- N_uint32 id,
- void _FAR_ *funcs)
-{
- return __GA_exports.REF2D_queryFunctions(ref2d,id,funcs);
-}
-#endif
-
-/****************************************************************************
-REMARKS:
-This function initialises the high precision timing functions for the
-Nucleus loader library.
-****************************************************************************/
-ibool NAPI GA_TimerInit(void)
-{
- if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) {
- haveRDTSC = true;
- }
- return true;
-}
-
-/****************************************************************************
-REMARKS:
-This function reads the high resolution timer.
-****************************************************************************/
-void NAPI GA_TimerRead(
- GA_largeInteger *value)
-{
- if (haveRDTSC)
- _GA_readTimeStamp(value);
- else
- KeQuerySystemTime((LARGE_INTEGER*)value);
-}
diff --git a/board/MAI/bios_emulator/scitech/src/common/gaos2.c b/board/MAI/bios_emulator/scitech/src/common/gaos2.c
deleted file mode 100644
index 26e6503e5f..0000000000
--- a/board/MAI/bios_emulator/scitech/src/common/gaos2.c
+++ /dev/null
@@ -1,248 +0,0 @@
-/****************************************************************************
-*
-* SciTech Nucleus Graphics Architecture
-*
-* Copyright (C) 1991-1998 SciTech Software, Inc.
-* All rights reserved.
-*
-* ======================================================================
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* | |
-* |This copyrighted computer code contains proprietary technology |
-* |owned by SciTech Software, Inc., located at 505 Wall Street, |
-* |Chico, CA 95928 USA (http://www.scitechsoft.com). |
-* | |
-* |The contents of this file are subject to the SciTech Nucleus |
-* |License; you may *not* use this file or related software except in |
-* |compliance with the License. You may obtain a copy of the License |
-* |at http://www.scitechsoft.com/nucleus-license.txt |
-* | |
-* |Software distributed under the License is distributed on an |
-* |"AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or |
-* |implied. See the License for the specific language governing |
-* |rights and limitations under the License. |
-* | |
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* ======================================================================
-*
-* Language: ANSI C
-* Environment: OS/2 32-bit
-*
-* Description: OS specific Nucleus Graphics Architecture services for
-* the OS/2 operating system environments.
-*
-****************************************************************************/
-
-#include "pm_help.h"
-#define INCL_DOSERRORS
-#define INCL_DOS
-#define INCL_SUB
-#define INCL_VIO
-#define INCL_KBD
-#include <os2.h>
-
-/*--------------------------- Global variables ----------------------------*/
-
-static ibool haveRDTSC = false;
-static ulong parms[3]; /* Must not cross 64Kb boundary! */
-static ulong result[4]; /* Must not cross 64Kb boundary! */
-
-/*-------------------------- Implementation -------------------------------*/
-
-/****************************************************************************
-PARAMETERS:
-func - Helper device driver function to call
-
-RETURNS:
-First return value from the device driver in parmsOut[0]
-
-REMARKS:
-Function to open our helper device driver, call it and close the file
-handle. Note that we have to open the device driver for every call because
-of two problems:
-
- 1. We cannot open a single file handle in a DLL that is shared amongst
- programs, since every process must have it's own open file handle.
-
- 2. For some reason there appears to be a limit of about 12 open file
- handles on a device driver in the system. Hence when we open more
- than about 12 file handles things start to go very strange.
-
-Hence we simply open the file handle every time that we need to call the
-device driver to work around these problems.
-****************************************************************************/
-static ulong CallSDDHelp(
- int func)
-{
- static ulong inLen; /* Must not cross 64Kb boundary! */
- static ulong outLen; /* Must not cross 64Kb boundary! */
- HFILE hSDDHelp;
-
- /* If this code in here fails, we are screwed! Many of our drivers
- * use this code and don't have a C library, so we simply assume we
- * can't fail here.
- */
- DosOpen(PMHELP_NAME,&hSDDHelp,&result[0],0,0,
- FILE_OPEN, OPEN_SHARE_DENYNONE | OPEN_ACCESS_READWRITE,
- NULL);
- DosDevIOCtl(hSDDHelp,PMHELP_IOCTL,func,
- &parms, inLen = sizeof(parms), &inLen,
- &result, outLen = sizeof(result), &outLen);
- DosClose(hSDDHelp);
- return result[0];
-}
-
-/****************************************************************************
-PARAMETERS:
-path - Local path to the Nucleus driver files.
-
-REMARKS:
-This function is used by the application program to override the location
-of the Nucleus driver files that are loaded. Normally the loader code
-will look in the system Nucleus directories first, then in the 'drivers'
-directory relative to the current working directory, and finally relative
-to the MGL_ROOT environment variable.
-****************************************************************************/
-void NAPI GA_setLocalPath(
- const char *path)
-{
- PM_setLocalBPDPath(path);
-}
-
-/****************************************************************************
-RETURNS:
-Pointer to the system wide PM library imports, or the internal version if none
-
-REMARKS:
-For OS/2 we don't need to do anything special because Nucleus is always
-loaded via the shared SDDPMI driver when SDD is loaded so we don't need
-a system wide PM library imports function.
-****************************************************************************/
-PM_imports * NAPI GA_getSystemPMImports(void)
-{
- return &_PM_imports;
-}
-
-/****************************************************************************
-PARAMETERS:
-gaExp - Place to store the exported functions
-shared - True if connecting to the shared, global Nucleus driver
-
-REMARKS:
-For OS/2 if SDD is loaded we *always* connect to the shared Nucleus functions
-contained within the SDDPMI driver. This allows the Nucleus functions contained
-within this driver to be utilised by all Nucleus apps in the system and
-maintains a consistent state between versions.
-****************************************************************************/
-ibool NAPI GA_getSharedExports(
- GA_exports *gaExp,
- ibool shared)
-{
- /* In test harness mode, we need to load a local copy of Nucleus */
-#if !defined (TEST_HARNESS) || defined (DEBUG_SDDPMI)
- HMODULE hModSDDPMI;
- char buf[80];
- GA_exports *exp;
-
- /* Initialise the PM library and connect to our runtime DLL's */
- PM_init();
- if (CallSDDHelp(PMHELP_GETSHAREDEXP) != 0) {
- /* We have found the shared Nucleus exports. Because not all processes
- * map to SDDPMI.DLL, we need to ensure that we connect to this
- * DLL so that it gets mapped into our address space (that is
- * where the shared Nucleus loader code is located). Simply doing a
- * DosLoadModule on it is enough for this.
- */
- DosLoadModule((PSZ)buf,sizeof(buf),(PSZ)"SDDPMI.DLL",&hModSDDPMI);
- exp = (GA_exports*)result[0];
- memcpy(gaExp,exp,MIN(gaExp->dwSize,exp->dwSize));
- return true;
- }
-#endif
- (void)shared;
- return false;
-}
-
-#ifndef TEST_HARNESS
-/****************************************************************************
-REMARKS:
-Nothing special for this OS
-****************************************************************************/
-ibool NAPI GA_queryFunctions(
- GA_devCtx *dc,
- N_uint32 id,
- void _FAR_ *funcs)
-{
- return __GA_exports.GA_queryFunctions(dc,id,funcs);
-}
-
-/****************************************************************************
-REMARKS:
-Nothing special for this OS
-****************************************************************************/
-ibool NAPI REF2D_queryFunctions(
- REF2D_driver *ref2d,
- N_uint32 id,
- void _FAR_ *funcs)
-{
- return __GA_exports.REF2D_queryFunctions(ref2d,id,funcs);
-}
-#endif
-
-/****************************************************************************
-REMARKS:
-This function initialises the high precision timing functions for the
-Nucleus loader library.
-****************************************************************************/
-ibool NAPI GA_TimerInit(void)
-{
- if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0)
- haveRDTSC = true;
- return true;
-}
-
-/****************************************************************************
-REMARKS:
-This function reads the high resolution timer.
-****************************************************************************/
-void NAPI GA_TimerRead(
- GA_largeInteger *value)
-{
- if (haveRDTSC)
- _GA_readTimeStamp(value);
- else
- DosTmrQueryTime((QWORD*)value);
-}
-
-/****************************************************************************
-REMARKS:
-On OS/2, we need special memory allocation functions if we build SDDPMI in
-test harness mode. But if we build GATest etc. in test mode, we want to use
-the normal C runtime functions, so route them back here.
-****************************************************************************/
-
-#if defined (TEST_HARNESS) && !defined (DEBUG_SDDPMI)
-
-/* Undefine these macros first or we'll recurse to hell! */
-#undef malloc
-#undef calloc
-#undef realloc
-#undef free
-
-void *SDDPMI_malloc(size_t size) {
- return malloc(size);
-}
-
-void *SDDPMI_calloc(size_t num, size_t size) {
- return calloc(num, size);
-}
-
-void SDDPMI_free(void *ptr) {
- free(ptr);
-}
-
-void *SDDPMI_realloc(void *ptr, size_t size) {
- return realloc(ptr, size);
-}
-
-#endif
diff --git a/board/MAI/bios_emulator/scitech/src/common/gaqnx.c b/board/MAI/bios_emulator/scitech/src/common/gaqnx.c
deleted file mode 100644
index 525d662869..0000000000
--- a/board/MAI/bios_emulator/scitech/src/common/gaqnx.c
+++ /dev/null
@@ -1,149 +0,0 @@
-/****************************************************************************
-*
-* SciTech Nucleus Graphics Architecture
-*
-* Copyright (C) 1991-1998 SciTech Software, Inc.
-* All rights reserved.
-*
-* ======================================================================
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* | |
-* |This copyrighted computer code contains proprietary technology |
-* |owned by SciTech Software, Inc., located at 505 Wall Street, |
-* |Chico, CA 95928 USA (http://www.scitechsoft.com). |
-* | |
-* |The contents of this file are subject to the SciTech Nucleus |
-* |License; you may *not* use this file or related software except in |
-* |compliance with the License. You may obtain a copy of the License |
-* |at http://www.scitechsoft.com/nucleus-license.txt |
-* | |
-* |Software distributed under the License is distributed on an |
-* |"AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or |
-* |implied. See the License for the specific language governing |
-* |rights and limitations under the License. |
-* | |
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* ======================================================================
-*
-* Language: ANSI C
-* Environment: QNX
-*
-* Description: OS specific Nucleus Graphics Architecture services for
-* the QNX operating system.
-*
-****************************************************************************/
-
-#include "nucleus/graphics.h"
-#include <time.h>
-
-/*---------------------------- Global Variables ---------------------------*/
-
-static ibool haveRDTSC;
-
-/*-------------------------- Implementation -------------------------------*/
-
-/****************************************************************************
-PARAMETERS:
-path - Local path to the Nucleus driver files.
-
-REMARKS:
-This function is used by the application program to override the location
-of the Nucleus driver files that are loaded. Normally the loader code
-will look in the system Nucleus directories first, then in the 'drivers'
-directory relative to the current working directory, and finally relative
-to the MGL_ROOT environment variable.
-****************************************************************************/
-void NAPI GA_setLocalPath(
- const char *path)
-{
- PM_setLocalBPDPath(path);
-}
-
-/****************************************************************************
-RETURNS:
-Pointer to the system wide PM library imports, or the internal version if none
-
-REMARKS:
-In order to support deploying new Nucleus drivers that may require updated
-PM library functions, we check here to see if there is a system wide version
-of the PM functions available. If so we return those functions for use with
-the system wide Nucleus drivers, otherwise the compiled in version of the PM
-library is used with the application local version of Nucleus.
-****************************************************************************/
-PM_imports * NAPI GA_getSystemPMImports(void)
-{
- /* TODO: We may very well want to provide a system shared library */
- /* that eports the PM functions required by the Nucleus library */
- /* for QNX here. That will eliminate fatal errors loading new */
- /* drivers on QNX! */
- return &_PM_imports;
-}
-
-/****************************************************************************
-REMARKS:
-Nothing special for this OS.
-****************************************************************************/
-ibool NAPI GA_getSharedExports(
- GA_exports *gaExp,
- ibool shared)
-{
- (void)gaExp;
- (void)shared;
- return false;
-}
-
-#ifndef TEST_HARNESS
-/****************************************************************************
-REMARKS:
-Nothing special for this OS
-****************************************************************************/
-ibool NAPI GA_queryFunctions(
- GA_devCtx *dc,
- N_uint32 id,
- void _FAR_ *funcs)
-{
- return __GA_exports.GA_queryFunctions(dc,id,funcs);
-}
-
-/****************************************************************************
-REMARKS:
-Nothing special for this OS
-****************************************************************************/
-ibool NAPI REF2D_queryFunctions(
- REF2D_driver *ref2d,
- N_uint32 id,
- void _FAR_ *funcs)
-{
- return __GA_exports.REF2D_queryFunctions(ref2d,id,funcs);
-}
-#endif
-
-/****************************************************************************
-REMARKS:
-This function initialises the high precision timing functions for the
-Nucleus loader library.
-****************************************************************************/
-ibool NAPI GA_TimerInit(void)
-{
- if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0)
- haveRDTSC = true;
- return true;
-}
-
-/****************************************************************************
-REMARKS:
-This function reads the high resolution timer.
-****************************************************************************/
-void NAPI GA_TimerRead(
- GA_largeInteger *value)
-{
- if (haveRDTSC)
- _GA_readTimeStamp(value);
- else {
- struct timespec ts;
-
- clock_gettime(CLOCK_REALTIME, &ts);
- value->low = (ts.tv_nsec / 1000 + ts.tv_sec * 1000000);
- value->high = 0;
- }
-}
diff --git a/board/MAI/bios_emulator/scitech/src/common/gartt.c b/board/MAI/bios_emulator/scitech/src/common/gartt.c
deleted file mode 100644
index 3a41f59c18..0000000000
--- a/board/MAI/bios_emulator/scitech/src/common/gartt.c
+++ /dev/null
@@ -1,139 +0,0 @@
-/****************************************************************************
-*
-* SciTech Nucleus Graphics Architecture
-*
-* Copyright (C) 1991-1998 SciTech Software, Inc.
-* All rights reserved.
-*
-* ======================================================================
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* | |
-* |This copyrighted computer code contains proprietary technology |
-* |owned by SciTech Software, Inc., located at 505 Wall Street, |
-* |Chico, CA 95928 USA (http://www.scitechsoft.com). |
-* | |
-* |The contents of this file are subject to the SciTech Nucleus |
-* |License; you may *not* use this file or related software except in |
-* |compliance with the License. You may obtain a copy of the License |
-* |at http://www.scitechsoft.com/nucleus-license.txt |
-* | |
-* |Software distributed under the License is distributed on an |
-* |"AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or |
-* |implied. See the License for the specific language governing |
-* |rights and limitations under the License. |
-* | |
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* ======================================================================
-*
-* Language: ANSI C
-* Environment: RTTarget-32
-*
-* Description: OS specific Nucleus Graphics Architecture services for
-* the RTTarget-32 operating system environments.
-*
-****************************************************************************/
-
-#include "nucleus/graphics.h"
-
-/*------------------------- Global Variables ------------------------------*/
-
-static ibool haveRDTSC;
-
-/*-------------------------- Implementation -------------------------------*/
-
-/****************************************************************************
-PARAMETERS:
-path - Local path to the Nucleus driver files.
-
-REMARKS:
-This function is used by the application program to override the location
-of the Nucleus driver files that are loaded. Normally the loader code
-will look in the system Nucleus directories first, then in the 'drivers'
-directory relative to the current working directory, and finally relative
-to the MGL_ROOT environment variable.
-****************************************************************************/
-void NAPI GA_setLocalPath(
- const char *path)
-{
- PM_setLocalBPDPath(path);
-}
-
-/****************************************************************************
-RETURNS:
-Pointer to the system wide PM library imports, or the internal version if none
-
-REMARKS:
-In order to support deploying new Nucleus drivers that may require updated
-PM library functions, we check here to see if there is a system wide version
-of the PM functions available. If so we return those functions for use with
-the system wide Nucleus drivers, otherwise the compiled in version of the PM
-library is used with the application local version of Nucleus.
-****************************************************************************/
-PM_imports * NAPI GA_getSystemPMImports(void)
-{
- return &_PM_imports;
-}
-
-/****************************************************************************
-REMARKS:
-Nothing special for this OS.
-****************************************************************************/
-ibool NAPI GA_getSharedExports(
- GA_exports *gaExp,
- ibool shared)
-{
- (void)gaExp;
- (void)shared;
- return false;
-}
-
-#ifndef TEST_HARNESS
-/****************************************************************************
-REMARKS:
-Nothing special for this OS
-****************************************************************************/
-ibool NAPI GA_queryFunctions(
- GA_devCtx *dc,
- N_uint32 id,
- void _FAR_ *funcs)
-{
- return __GA_exports.GA_queryFunctions(dc,id,funcs);
-}
-
-/****************************************************************************
-REMARKS:
-Nothing special for this OS
-****************************************************************************/
-ibool NAPI REF2D_queryFunctions(
- REF2D_driver *ref2d,
- N_uint32 id,
- void _FAR_ *funcs)
-{
- return __GA_exports.REF2D_queryFunctions(ref2d,id,funcs);
-}
-#endif
-
-/****************************************************************************
-REMARKS:
-This function initialises the high precision timing functions for the
-Nucleus loader library.
-****************************************************************************/
-ibool NAPI GA_TimerInit(void)
-{
- if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) {
- haveRDTSC = true;
- return true;
- }
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-This function reads the high resolution timer.
-****************************************************************************/
-void NAPI GA_TimerRead(
- GA_largeInteger *value)
-{
- if (haveRDTSC)
- _GA_readTimeStamp(value);
-}
diff --git a/board/MAI/bios_emulator/scitech/src/common/gasmx.c b/board/MAI/bios_emulator/scitech/src/common/gasmx.c
deleted file mode 100644
index ae31941f49..0000000000
--- a/board/MAI/bios_emulator/scitech/src/common/gasmx.c
+++ /dev/null
@@ -1,133 +0,0 @@
-/****************************************************************************
-*
-* SciTech Nucleus Graphics Architecture
-*
-* Copyright (C) 1991-1998 SciTech Software, Inc.
-* All rights reserved.
-*
-* ======================================================================
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* | |
-* |This copyrighted computer code contains proprietary technology |
-* |owned by SciTech Software, Inc., located at 505 Wall Street, |
-* |Chico, CA 95928 USA (http://www.scitechsoft.com). |
-* | |
-* |The contents of this file are subject to the SciTech Nucleus |
-* |License; you may *not* use this file or related software except in |
-* |compliance with the License. You may obtain a copy of the License |
-* |at http://www.scitechsoft.com/nucleus-license.txt |
-* | |
-* |Software distributed under the License is distributed on an |
-* |"AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or |
-* |implied. See the License for the specific language governing |
-* |rights and limitations under the License. |
-* | |
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* ======================================================================
-*
-* Language: ANSI C
-* Environment: smx32
-*
-* Description: OS specific Nucleus Graphics Architecture services for
-* the smx32 platform -- no vxD support.
-*
-****************************************************************************/
-
-#include "pmapi.h"
-#include "nucleus/graphics.h"
-
-/*-------------------------- Implementation -------------------------------*/
-
-/****************************************************************************
-PARAMETERS:
-path - Local path to the Nucleus driver files.
-
-REMARKS:
-This function is used by the application program to override the location
-of the Nucleus driver files that are loaded. Normally the loader code
-will look in the system Nucleus directories first, then in the 'drivers'
-directory relative to the current working directory, and finally relative
-to the MGL_ROOT environment variable.
-****************************************************************************/
-void NAPI GA_setLocalPath(
- const char *path)
-{
- PM_setLocalBPDPath(path);
-}
-
-/****************************************************************************
-RETURNS:
-Pointer to the system wide PM library imports, or the internal version if none
-
-REMARKS:
-In order to support deploying new Nucleus drivers that may require updated
-PM library functions, we check here to see if there is a system wide version
-of the PM functions available. If so we return those functions for use with
-the system wide Nucleus drivers, otherwise the compiled in version of the PM
-library is used with the application local version of Nucleus.
-****************************************************************************/
-PM_imports * NAPI GA_getSystemPMImports(void)
-{
- return &_PM_imports;
-}
-
-/****************************************************************************
-REMARKS:
-Nothing special for this OS.
-****************************************************************************/
-ibool NAPI GA_getSharedExports(
- GA_exports *gaExp,
- ibool shared)
-{
- (void)gaExp;
- (void)shared;
- return false;
-}
-
-#ifndef TEST_HARNESS
-/****************************************************************************
-REMARKS:
-Nothing special for this OS
-****************************************************************************/
-ibool NAPI GA_queryFunctions(
- GA_devCtx *dc,
- N_uint32 id,
- void _FAR_ *funcs)
-{
- return __GA_exports.GA_queryFunctions(dc,id,funcs);
-}
-
-/****************************************************************************
-REMARKS:
-Nothing special for this OS
-****************************************************************************/
-ibool NAPI REF2D_queryFunctions(
- REF2D_driver *ref2d,
- N_uint32 id,
- void _FAR_ *funcs)
-{
- return __GA_exports.REF2D_queryFunctions(ref2d,id,funcs);
-}
-#endif
-
-/****************************************************************************
-REMARKS:
-This function initialises the high precision timing functions for the
-Nucleus loader library.
-****************************************************************************/
-ibool NAPI GA_TimerInit(void)
-{
- if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0)
- return true;
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-This function reads the high resolution timer.
-****************************************************************************/
-void NAPI GA_TimerRead(
- GA_largeInteger *value)
-{
- _GA_readTimeStamp(value);
-}
diff --git a/board/MAI/bios_emulator/scitech/src/common/gavxd.c b/board/MAI/bios_emulator/scitech/src/common/gavxd.c
deleted file mode 100644
index fc8ba8d657..0000000000
--- a/board/MAI/bios_emulator/scitech/src/common/gavxd.c
+++ /dev/null
@@ -1,136 +0,0 @@
-/****************************************************************************
-*
-* SciTech Nucleus Graphics Architecture
-*
-* Copyright (C) 1991-1998 SciTech Software, Inc.
-* All rights reserved.
-*
-* ======================================================================
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* | |
-* |This copyrighted computer code contains proprietary technology |
-* |owned by SciTech Software, Inc., located at 505 Wall Street, |
-* |Chico, CA 95928 USA (http://www.scitechsoft.com). |
-* | |
-* |The contents of this file are subject to the SciTech Nucleus |
-* |License; you may *not* use this file or related software except in |
-* |compliance with the License. You may obtain a copy of the License |
-* |at http://www.scitechsoft.com/nucleus-license.txt |
-* | |
-* |Software distributed under the License is distributed on an |
-* |"AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or |
-* |implied. See the License for the specific language governing |
-* |rights and limitations under the License. |
-* | |
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* ======================================================================
-*
-* Language: ANSI C
-* Environment: Win32 VxD
-*
-* Description: OS specific Nucleus Graphics Architecture services for
-* the Win32 VxD's.
-*
-****************************************************************************/
-
-#include "sdd/sddhelp.h"
-
-/*------------------------- Global Variables ------------------------------*/
-
-static ibool haveRDTSC;
-
-/*-------------------------- Implementation -------------------------------*/
-
-/****************************************************************************
-PARAMETERS:
-path - Local path to the Nucleus driver files.
-
-REMARKS:
-This function is used by the application program to override the location
-of the Nucleus driver files that are loaded. Normally the loader code
-will look in the system Nucleus directories first, then in the 'drivers'
-directory relative to the current working directory, and finally relative
-to the MGL_ROOT environment variable.
-****************************************************************************/
-void NAPI GA_setLocalPath(
- const char *path)
-{
- PM_setLocalBPDPath(path);
-}
-
-/****************************************************************************
-RETURNS:
-Pointer to the system wide PM library imports, or the internal version if none
-
-REMARKS:
-Nothing special for this OS.
-****************************************************************************/
-PM_imports * NAPI GA_getSystemPMImports(void)
-{
- return &_PM_imports;
-}
-
-/****************************************************************************
-REMARKS:
-Nothing special for this OS.
-****************************************************************************/
-ibool NAPI GA_getSharedExports(
- GA_exports *gaExp,
- ibool shared)
-{
- (void)gaExp;
- (void)shared;
- return false;
-}
-
-#ifndef TEST_HARNESS
-/****************************************************************************
-REMARKS:
-Nothing special for this OS
-****************************************************************************/
-ibool NAPI GA_queryFunctions(
- GA_devCtx *dc,
- N_uint32 id,
- void _FAR_ *funcs)
-{
- return __GA_exports.GA_queryFunctions(dc,id,funcs);
-}
-
-/****************************************************************************
-REMARKS:
-Nothing special for this OS
-****************************************************************************/
-ibool NAPI REF2D_queryFunctions(
- REF2D_driver *ref2d,
- N_uint32 id,
- void _FAR_ *funcs)
-{
- return __GA_exports.REF2D_queryFunctions(ref2d,id,funcs);
-}
-#endif
-
-/****************************************************************************
-REMARKS:
-This function initialises the high precision timing functions for the
-Nucleus loader library.
-****************************************************************************/
-ibool NAPI GA_TimerInit(void)
-{
- if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) {
- haveRDTSC = true;
- }
- return true;
-}
-
-/****************************************************************************
-REMARKS:
-This function reads the high resolution timer.
-****************************************************************************/
-void NAPI GA_TimerRead(
- GA_largeInteger *value)
-{
- if (haveRDTSC)
- _GA_readTimeStamp(value);
- else
- VTD_Get_Real_Time(&value->high,&value->low);
-}
diff --git a/board/MAI/bios_emulator/scitech/src/common/gawin32.c b/board/MAI/bios_emulator/scitech/src/common/gawin32.c
deleted file mode 100644
index 69443344f4..0000000000
--- a/board/MAI/bios_emulator/scitech/src/common/gawin32.c
+++ /dev/null
@@ -1,255 +0,0 @@
-/****************************************************************************
-*
-* SciTech Nucleus Graphics Architecture
-*
-* Copyright (C) 1991-1998 SciTech Software, Inc.
-* All rights reserved.
-*
-* ======================================================================
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* | |
-* |This copyrighted computer code contains proprietary technology |
-* |owned by SciTech Software, Inc., located at 505 Wall Street, |
-* |Chico, CA 95928 USA (http://www.scitechsoft.com). |
-* | |
-* |The contents of this file are subject to the SciTech Nucleus |
-* |License; you may *not* use this file or related software except in |
-* |compliance with the License. You may obtain a copy of the License |
-* |at http://www.scitechsoft.com/nucleus-license.txt |
-* | |
-* |Software distributed under the License is distributed on an |
-* |"AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or |
-* |implied. See the License for the specific language governing |
-* |rights and limitations under the License. |
-* | |
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* ======================================================================
-*
-* Language: ANSI C
-* Environment: Win32
-*
-* Description: OS specific Nucleus Graphics Architecture services for
-* the Win32 operating system environments.
-*
-****************************************************************************/
-
-#include "pm_help.h"
-#include "pmapi.h"
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#define STRICT
-#define WIN32_LEAN_AND_MEAN
-#include <windows.h>
-
-/*------------------------- Global Variables ------------------------------*/
-
-#define DLL_NAME "nga_w32.dll"
-
-extern HANDLE _PM_hDevice;
-static HMODULE hModDLL = NULL;
-static ibool useRing0Driver = false;
-static ibool haveRDTSC;
-static GA_largeInteger countFreq;
-
-/*-------------------------- Implementation -------------------------------*/
-
-/****************************************************************************
-REMARKS:
-Loads the shared "nga_w32.dll" library from disk and connects to it. This
-library is *always* located in the same directory as the Nucleus
-graphics.bpd file.
-****************************************************************************/
-static ibool LoadSharedDLL(void)
-{
- char filename[PM_MAX_PATH];
- char bpdpath[PM_MAX_PATH];
-
- /* Check if we have already loaded the DLL */
- if (hModDLL)
- return true;
- PM_init();
-
- /* Open the DLL file */
- if (!PM_findBPD(DLL_NAME,bpdpath))
- return false;
- strcpy(filename,bpdpath);
- strcat(filename,DLL_NAME);
- if ((hModDLL = LoadLibrary(filename)) == NULL)
- return false;
- return true;
-}
-
-/****************************************************************************
-PARAMETERS:
-path - Local path to the Nucleus driver files.
-
-REMARKS:
-This function is used by the application program to override the location
-of the Nucleus driver files that are loaded. Normally the loader code
-will look in the system Nucleus directories first, then in the 'drivers'
-directory relative to the current working directory, and finally relative
-to the MGL_ROOT environment variable.
-
-Note that for Win32 we also call into the loaded PMHELP device driver
-as necessary to change the local Nucleus path for system wide Nucleus
-drivers.
-****************************************************************************/
-void NAPI GA_setLocalPath(
- const char *path)
-{
- DWORD inBuf[1];
- DWORD outBuf[1],outCnt;
-
- PM_setLocalBPDPath(path);
- if (_PM_hDevice != INVALID_HANDLE_VALUE) {
- inBuf[0] = (DWORD)path;
- DeviceIoControl(_PM_hDevice, PMHELP_GASETLOCALPATH32,
- inBuf, sizeof(inBuf), outBuf, sizeof(outBuf), &outCnt, NULL);
- }
-}
-
-/****************************************************************************
-RETURNS:
-Pointer to the system wide PM library imports, or the internal version if none
-
-REMARKS:
-In order to support deploying new Nucleus drivers that may require updated
-PM library functions, we check here to see if there is a system wide version
-of the PM functions available. If so we return those functions for use with
-the system wide Nucleus drivers, otherwise the compiled in version of the PM
-library is used with the application local version of Nucleus.
-****************************************************************************/
-PM_imports * NAPI GA_getSystemPMImports(void)
-{
- PM_imports * pmImp;
- PM_imports * (NAPIP _GA_getSystemPMImports)(void);
-
- if (LoadSharedDLL()) {
- /* Note that Visual C++ build DLL's with only a single underscore in front
- * of the exported name while Watcom C provides two of them. We check for
- * both to allow working with either compiled DLL.
- */
- if ((_GA_getSystemPMImports = (void*)GetProcAddress(hModDLL,"_GA_getSystemPMImports")) != NULL) {
- if ((_GA_getSystemPMImports = (void*)GetProcAddress(hModDLL,"__GA_getSystemPMImports")) != NULL) {
- pmImp = _GA_getSystemPMImports();
- memcpy(&_PM_imports,pmImp,MIN(_PM_imports.dwSize,pmImp->dwSize));
- return pmImp;
- }
- }
- }
- return &_PM_imports;
-}
-
-/****************************************************************************
-PARAMETERS:
-gaExp - Place to store the exported functions
-shared - True if connecting to the shared, global Nucleus driver
-
-REMARKS:
-For Win32 if we are connecting to the shared, global Nucleus driver (loaded
-at ring 0) then we need to load a special nga_w32.dll library which contains
-thunks to call down into the Ring 0 device driver as necessary. If we are
-connecting to the application local Nucleus drivers (ie: Nucleus on DirectDraw
-emulation layer) then we do nothing here.
-****************************************************************************/
-ibool NAPI GA_getSharedExports(
- GA_exports *gaExp,
- ibool shared)
-{
- GA_exports * exp;
- GA_exports * (NAPIP _GA_getSystemGAExports)(void);
-
- useRing0Driver = false;
- if (shared) {
- if (!LoadSharedDLL())
- PM_fatalError("Unable to load " DLL_NAME "!");
- if ((_GA_getSystemGAExports = (void*)GetProcAddress(hModDLL,"_GA_getSystemGAExports")) == NULL)
- if ((_GA_getSystemGAExports = (void*)GetProcAddress(hModDLL,"__GA_getSystemGAExports")) == NULL)
- PM_fatalError("Unable to load " DLL_NAME "!");
- exp = _GA_getSystemGAExports();
- memcpy(gaExp,exp,MIN(gaExp->dwSize,exp->dwSize));
- useRing0Driver = true;
- return true;
- }
- return false;
-}
-
-#ifndef TEST_HARNESS
-/****************************************************************************
-REMARKS:
-Nothing special for this OS
-****************************************************************************/
-ibool NAPI GA_queryFunctions(
- GA_devCtx *dc,
- N_uint32 id,
- void _FAR_ *funcs)
-{
- static ibool (NAPIP _GA_queryFunctions)(GA_devCtx *dc,N_uint32 id,void _FAR_ *funcs) = NULL;
-
- if (useRing0Driver) {
- /* Call the version in nga_w32.dll if it is loaded */
- if (!_GA_queryFunctions) {
- if ((_GA_queryFunctions = (void*)GetProcAddress(hModDLL,"_GA_queryFunctions")) == NULL)
- if ((_GA_queryFunctions = (void*)GetProcAddress(hModDLL,"__GA_queryFunctions")) == NULL)
- PM_fatalError("Unable to get exports from " DLL_NAME "!");
- }
- return _GA_queryFunctions(dc,id,funcs);
- }
- return __GA_exports.GA_queryFunctions(dc,id,funcs);
-}
-
-/****************************************************************************
-REMARKS:
-Nothing special for this OS
-****************************************************************************/
-ibool NAPI REF2D_queryFunctions(
- REF2D_driver *ref2d,
- N_uint32 id,
- void _FAR_ *funcs)
-{
- static ibool (NAPIP _REF2D_queryFunctions)(REF2D_driver *ref2d,N_uint32 id,void _FAR_ *funcs) = NULL;
-
- if (useRing0Driver) {
- /* Call the version in nga_w32.dll if it is loaded */
- if (!_REF2D_queryFunctions) {
- if ((_REF2D_queryFunctions = (void*)GetProcAddress(hModDLL,"_REF2D_queryFunctions")) == NULL)
- if ((_REF2D_queryFunctions = (void*)GetProcAddress(hModDLL,"__REF2D_queryFunctions")) == NULL)
- PM_fatalError("Unable to get exports from " DLL_NAME "!");
- }
- return _REF2D_queryFunctions(ref2d,id,funcs);
- }
- return __GA_exports.REF2D_queryFunctions(ref2d,id,funcs);
-}
-#endif
-
-/****************************************************************************
-REMARKS:
-This function initialises the high precision timing functions for the
-Nucleus loader library.
-****************************************************************************/
-ibool NAPI GA_TimerInit(void)
-{
- if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) {
- haveRDTSC = true;
- return true;
- }
- else if (QueryPerformanceFrequency((LARGE_INTEGER*)&countFreq)) {
- haveRDTSC = false;
- return true;
- }
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-This function reads the high resolution timer.
-****************************************************************************/
-void NAPI GA_TimerRead(
- GA_largeInteger *value)
-{
- if (haveRDTSC)
- _GA_readTimeStamp(value);
- else
- QueryPerformanceCounter((LARGE_INTEGER*)value);
-}
diff --git a/board/MAI/bios_emulator/scitech/src/common/gtfcalc.c b/board/MAI/bios_emulator/scitech/src/common/gtfcalc.c
deleted file mode 100644
index 1d547e9abb..0000000000
--- a/board/MAI/bios_emulator/scitech/src/common/gtfcalc.c
+++ /dev/null
@@ -1,436 +0,0 @@
-/****************************************************************************
-*
-* VESA Generalized Timing Formula (GTF)
-* Version 1.1
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Developed by: SciTech Software, Inc.
-*
-* Language: ANSI C
-* Environment: Any.
-*
-* Description: C module for generating GTF compatible timings given a set
-* of input requirements. Translated from the original GTF
-* 1.14 spreadsheet definition.
-*
-* Compile with #define TESTING to build a command line test
-* program.
-*
-* NOTE: The code in here has been written for clarity and
-* to follow the original GTF spec as closely as
-* possible.
-*
-****************************************************************************/
-
-#include "gtf.h"
-#ifndef __WIN32_VXD__
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <ctype.h>
-#include <math.h>
-#endif
-
-/*------------------------- Global Variables ------------------------------*/
-
-static GTF_constants GC = {
- 1.8, /* Margin size as percentage of display */
- 8, /* Character cell granularity */
- 1, /* Minimum front porch in lines/chars */
- 3, /* Width of V sync in lines */
- 8, /* Width of H sync as percent of total */
- 550, /* Minimum vertical sync + back porch (us) */
- 600, /* Blanking formula gradient */
- 40, /* Blanking formula offset */
- 128, /* Blanking formula scaling factor */
- 20, /* Blanking formula scaling factor weight */
- };
-
-/*-------------------------- Implementation -------------------------------*/
-
-#ifdef __WIN32_VXD__
-/* These functions are not supported in a VxD, so we stub them out so this
- * module will at least compile. Calling the functions in here will do
- * something wierd!
- */
-double sqrt(double x)
-{ return x; }
-
-double floor(double x)
-{ return x; }
-
-double pow(double x,double y)
-{ return x*y; }
-#endif
-
-static double round(double v)
-{
- return floor(v + 0.5);
-}
-
-static void GetInternalConstants(GTF_constants *c)
-/****************************************************************************
-*
-* Function: GetInternalConstants
-* Parameters: c - Place to store the internal constants
-*
-* Description: Calculates the rounded, internal set of GTF constants.
-* These constants are different to the real GTF constants
-* that can be set up for the monitor. The calculations to
-* get these real constants are defined in the 'Work Area'
-* after the constants are defined in the Excel spreadsheet.
-*
-****************************************************************************/
-{
- c->margin = GC.margin;
- c->cellGran = round(GC.cellGran);
- c->minPorch = round(GC.minPorch);
- c->vSyncRqd = round(GC.vSyncRqd);
- c->hSync = GC.hSync;
- c->minVSyncBP = GC.minVSyncBP;
- if (GC.k == 0)
- c->k = 0.001;
- else
- c->k = GC.k;
- c->m = (c->k / 256) * GC.m;
- c->c = (GC.c - GC.j) * (c->k / 256) + GC.j;
- c->j = GC.j;
-}
-
-void GTF_calcTimings(double hPixels,double vLines,double freq,
- int type,ibool wantMargins,ibool wantInterlace,GTF_timings *t)
-/****************************************************************************
-*
-* Function: GTF_calcTimings
-* Parameters: hPixels - X resolution
-* vLines - Y resolution
-* freq - Frequency (Hz, KHz or MHz depending on type)
-* type - 1 - vertical, 2 - horizontal, 3 - dot clock
-* margins - True if margins should be generated
-* interlace - True if interlaced timings to be generated
-* t - Place to store the resulting timings
-*
-* Description: Calculates a set of GTF timing parameters given a specified
-* resolution and vertical frequency. The horizontal frequency
-* and dot clock will be automatically generated by this
-* routines.
-*
-* For interlaced modes the CRTC parameters are calculated for
-* a single field, so will be half what would be used in
-* a non-interlaced mode.
-*
-****************************************************************************/
-{
- double interlace,vFieldRate,hPeriod;
- double topMarginLines,botMarginLines;
- double leftMarginPixels,rightMarginPixels;
- double hPeriodEst,vSyncBP,vBackPorch;
- double vTotalLines,vFieldRateEst;
- double hTotalPixels,hTotalActivePixels,hBlankPixels;
- double idealDutyCycle,hSyncWidth,hSyncBP,hBackPorch;
- double idealHPeriod;
- double vFreq,hFreq,dotClock;
- GTF_constants c;
-
- /* Get rounded GTF constants used for internal calculations */
- GetInternalConstants(&c);
-
- /* Move input parameters into appropriate variables */
- vFreq = hFreq = dotClock = freq;
-
- /* Round pixels to character cell granularity */
- hPixels = round(hPixels / c.cellGran) * c.cellGran;
-
- /* For interlaced mode halve the vertical parameters, and double
- * the required field refresh rate.
- */
- vFieldRate = vFreq;
- interlace = 0;
- if (wantInterlace)
- dotClock *= 2;
-
- /* Determine the lines for margins */
- if (wantMargins) {
- topMarginLines = round(c.margin / 100 * vLines);
- botMarginLines = round(c.margin / 100 * vLines);
- }
- else {
- topMarginLines = 0;
- botMarginLines = 0;
- }
-
- if (type != GTF_lockPF) {
- if (type == GTF_lockVF) {
- /* Estimate the horizontal period */
- hPeriodEst = ((1/vFieldRate) - (c.minVSyncBP/1000000)) /
- (vLines + (2*topMarginLines) + c.minPorch + interlace) * 1000000;
-
- /* Find the number of lines in vSync + back porch */
- vSyncBP = round(c.minVSyncBP / hPeriodEst);
- }
- else if (type == GTF_lockHF) {
- /* Find the number of lines in vSync + back porch */
- vSyncBP = round((c.minVSyncBP * hFreq) / 1000);
- }
-
- /* Find the number of lines in the V back porch alone */
- vBackPorch = vSyncBP - c.vSyncRqd;
-
- /* Find the total number of lines in the vertical period */
- vTotalLines = vLines + topMarginLines + botMarginLines + vSyncBP
- + interlace + c.minPorch;
-
- if (type == GTF_lockVF) {
- /* Estimate the vertical frequency */
- vFieldRateEst = 1000000 / (hPeriodEst * vTotalLines);
-
- /* Find the actual horizontal period */
- hPeriod = (hPeriodEst * vFieldRateEst) / vFieldRate;
-
- /* Find the actual vertical field frequency */
- vFieldRate = 1000000 / (hPeriod * vTotalLines);
- }
- else if (type == GTF_lockHF) {
- /* Find the actual vertical field frequency */
- vFieldRate = (hFreq / vTotalLines) * 1000;
- }
- }
-
- /* Find the number of pixels in the left and right margins */
- if (wantMargins) {
- leftMarginPixels = round(hPixels * c.margin) / (100 * c.cellGran);
- rightMarginPixels = round(hPixels * c.margin) / (100 * c.cellGran);
- }
- else {
- leftMarginPixels = 0;
- rightMarginPixels = 0;
- }
-
- /* Find the total number of active pixels in image + margins */
- hTotalActivePixels = hPixels + leftMarginPixels + rightMarginPixels;
-
- if (type == GTF_lockVF) {
- /* Find the ideal blanking duty cycle */
- idealDutyCycle = c.c - ((c.m * hPeriod) / 1000);
- }
- else if (type == GTF_lockHF) {
- /* Find the ideal blanking duty cycle */
- idealDutyCycle = c.c - (c.m / hFreq);
- }
- else if (type == GTF_lockPF) {
- /* Find ideal horizontal period from blanking duty cycle formula */
- idealHPeriod = (((c.c - 100) + (sqrt((pow(100-c.c,2)) +
- (0.4 * c.m * (hTotalActivePixels + rightMarginPixels +
- leftMarginPixels) / dotClock)))) / (2 * c.m)) * 1000;
-
- /* Find the ideal blanking duty cycle */
- idealDutyCycle = c.c - ((c.m * idealHPeriod) / 1000);
- }
-
- /* Find the number of pixels in blanking time */
- hBlankPixels = round((hTotalActivePixels * idealDutyCycle) /
- ((100 - idealDutyCycle) * c.cellGran)) * c.cellGran;
-
- /* Find the total number of pixels */
- hTotalPixels = hTotalActivePixels + hBlankPixels;
-
- /* Find the horizontal back porch */
- hBackPorch = round((hBlankPixels / 2) / c.cellGran) * c.cellGran;
-
- /* Find the horizontal sync width */
- hSyncWidth = round(((c.hSync/100) * hTotalPixels) / c.cellGran) * c.cellGran;
-
- /* Find the horizontal sync + back porch */
- hSyncBP = hBackPorch + hSyncWidth;
-
- if (type == GTF_lockPF) {
- /* Find the horizontal frequency */
- hFreq = (dotClock / hTotalPixels) * 1000;
-
- /* Find the number of lines in vSync + back porch */
- vSyncBP = round((c.minVSyncBP * hFreq) / 1000);
-
- /* Find the number of lines in the V back porch alone */
- vBackPorch = vSyncBP - c.vSyncRqd;
-
- /* Find the total number of lines in the vertical period */
- vTotalLines = vLines + topMarginLines + botMarginLines + vSyncBP
- + interlace + c.minPorch;
-
- /* Find the actual vertical field frequency */
- vFieldRate = (hFreq / vTotalLines) * 1000;
- }
- else {
- if (type == GTF_lockVF) {
- /* Find the horizontal frequency */
- hFreq = 1000 / hPeriod;
- }
- else if (type == GTF_lockHF) {
- /* Find the horizontal frequency */
- hPeriod = 1000 / hFreq;
- }
-
- /* Find the pixel clock frequency */
- dotClock = hTotalPixels / hPeriod;
- }
-
- /* Return the computed frequencies */
- t->vFreq = vFieldRate;
- t->hFreq = hFreq;
- t->dotClock = dotClock;
-
- /* Determine the vertical timing parameters */
- t->h.hTotal = (int)hTotalPixels;
- t->h.hDisp = (int)hTotalActivePixels;
- t->h.hSyncStart = t->h.hTotal - (int)hSyncBP;
- t->h.hSyncEnd = t->h.hTotal - (int)hBackPorch;
- t->h.hFrontPorch = t->h.hSyncStart - t->h.hDisp;
- t->h.hSyncWidth = (int)hSyncWidth;
- t->h.hBackPorch = (int)hBackPorch;
-
- /* Determine the vertical timing parameters */
- t->v.vTotal = (int)vTotalLines;
- t->v.vDisp = (int)vLines;
- t->v.vSyncStart = t->v.vTotal - (int)vSyncBP;
- t->v.vSyncEnd = t->v.vTotal - (int)vBackPorch;
- t->v.vFrontPorch = t->v.vSyncStart - t->v.vDisp;
- t->v.vSyncWidth = (int)c.vSyncRqd;
- t->v.vBackPorch = (int)vBackPorch;
- if (wantInterlace) {
- /* Halve the timings for interlaced modes */
- t->v.vTotal /= 2;
- t->v.vDisp /= 2;
- t->v.vSyncStart /= 2;
- t->v.vSyncEnd /= 2;
- t->v.vFrontPorch /= 2;
- t->v.vSyncWidth /= 2;
- t->v.vBackPorch /= 2;
- t->dotClock /= 2;
- }
-
- /* Mark as GTF timing using the sync polarities */
- t->interlace = (wantInterlace) ? 'I' : 'N';
- t->hSyncPol = '-';
- t->vSyncPol = '+';
-}
-
-void GTF_getConstants(GTF_constants *constants)
-{ *constants = GC; }
-
-void GTF_setConstants(GTF_constants *constants)
-{ GC = *constants; }
-
-#ifdef TESTING_GTF
-
-void main(int argc,char *argv[])
-{
- FILE *f;
- double xPixels,yPixels,freq;
- ibool interlace;
- GTF_timings t;
-
- if (argc != 5 && argc != 6) {
- printf("Usage: GTFCALC <xPixels> <yPixels> <freq> [[Hz] [KHz] [MHz]] [I]\n");
- printf("\n");
- printf("where <xPixels> is the horizontal resolution of the mode, <yPixels> is the\n");
- printf("vertical resolution of the mode. The <freq> value will be the frequency to\n");
- printf("drive the calculations, and will be either the vertical frequency (in Hz)\n");
- printf("the horizontal frequency (in KHz) or the dot clock (in MHz). To generate\n");
- printf("timings for an interlaced mode, add 'I' to the end of the command line.\n");
- printf("\n");
- printf("For example to generate timings for 640x480 at 60Hz vertical:\n");
- printf("\n");
- printf(" GTFCALC 640 480 60 Hz\n");
- printf("\n");
- printf("For example to generate timings for 640x480 at 31.5KHz horizontal:\n");
- printf("\n");
- printf(" GTFCALC 640 480 31.5 KHz\n");
- printf("\n");
- printf("For example to generate timings for 640x480 with a 25.175Mhz dot clock:\n");
- printf("\n");
- printf(" GTFCALC 640 480 25.175 MHz\n");
- printf("\n");
- printf("GTFCALC will print a summary of the results found, and dump the CRTC\n");
- printf("values to the UVCONFIG.CRT file in the format used by SciTech Display Doctor.\n");
- exit(1);
- }
-
- /* Get values from command line */
- xPixels = atof(argv[1]);
- yPixels = atof(argv[2]);
- freq = atof(argv[3]);
- interlace = ((argc == 6) && (argv[5][0] == 'I'));
-
- /* Compute the CRTC timings */
- if (toupper(argv[4][0]) == 'H')
- GTF_calcTimings(xPixels,yPixels,freq,GTF_lockVF,false,interlace,&t);
- else if (toupper(argv[4][0]) == 'K')
- GTF_calcTimings(xPixels,yPixels,freq,GTF_lockHF,false,interlace,&t);
- else if (toupper(argv[4][0]) == 'M')
- GTF_calcTimings(xPixels,yPixels,freq,GTF_lockPF,false,interlace,&t);
- else {
- printf("Unknown command line!\n");
- exit(1);
- }
-
- /* Dump summary info to standard output */
- printf("CRTC values for %.0fx%.0f @ %.2f %s\n", xPixels, yPixels, freq, argv[4]);
- printf("\n");
- printf(" hTotal = %-4d vTotal = %-4d\n",
- t.h.hTotal, t.v.vTotal);
- printf(" hDisp = %-4d vDisp = %-4d\n",
- t.h.hDisp, t.v.vDisp);
- printf(" hSyncStart = %-4d vSyncStart = %-4d\n",
- t.h.hSyncStart, t.v.vSyncStart);
- printf(" hSyncEnd = %-4d vSyncEnd = %-4d\n",
- t.h.hSyncEnd, t.v.vSyncEnd);
- printf(" hFrontPorch = %-4d vFrontPorch = %-4d\n",
- t.h.hFrontPorch, t.v.vFrontPorch);
- printf(" hSyncWidth = %-4d vSyncWidth = %-4d\n",
- t.h.hSyncWidth, t.v.vSyncWidth);
- printf(" hBackPorch = %-4d vBackPorch = %-4d\n",
- t.h.hBackPorch, t.v.vBackPorch);
- printf("\n");
- printf(" Interlaced = %s\n", (t.interlace == 'I') ? "Yes" : "No");
- printf(" H sync pol = %c\n", t.hSyncPol);
- printf(" V sync pol = %c\n", t.vSyncPol);
- printf("\n");
- printf(" Vert freq = %.2f Hz\n", t.vFreq);
- printf(" Horiz freq = %.2f KHz\n", t.hFreq);
- printf(" Dot Clock = %.2f Mhz\n", t.dotClock);
-
- /* Dump to file in format used by SciTech Display Doctor */
- if ((f = fopen("UVCONFIG.CRT","w")) != NULL) {
- fprintf(f, "[%.0f %.0f]\n", xPixels, yPixels);
- fprintf(f, "%d %d %d %d '%c' %s\n",
- t.h.hTotal, t.h.hDisp,
- t.h.hSyncStart, t.h.hSyncEnd,
- t.hSyncPol, (t.interlace == 'I') ? "I" : "NI");
- fprintf(f, "%d %d %d %d '%c'\n",
- t.v.vTotal, t.v.vDisp,
- t.v.vSyncStart, t.v.vSyncEnd,
- t.vSyncPol);
- fprintf(f, "%.2f\n", t.dotClock);
- fclose(f);
- }
-}
-
-#endif /* TESTING */
diff --git a/board/MAI/bios_emulator/scitech/src/common/libcimp.c b/board/MAI/bios_emulator/scitech/src/common/libcimp.c
deleted file mode 100644
index ab73ad578c..0000000000
--- a/board/MAI/bios_emulator/scitech/src/common/libcimp.c
+++ /dev/null
@@ -1,827 +0,0 @@
-/****************************************************************************
-*
-* SciTech MGL Graphics Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-*
-* Description: Module to implement a the OS specific side of the Binary
-* Portable DLL C runtime library. The functions in here
-* are imported into the Binary Portable DLL's to implement
-* OS specific services.
-*
-****************************************************************************/
-
-#include "pmapi.h"
-#if defined(__WIN32_VXD__) || defined(__NT_DRIVER__)
-#include "drvlib/peloader.h"
-#include "drvlib/attrib.h"
-#include "drvlib/libc/init.h"
-#define __BUILDING_PE_LOADER__
-#include "drvlib/libc/file.h"
-#if defined(__WIN32_VXD__)
-#include "vxdfile.h"
-#endif
-#else
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <malloc.h>
-#include <time.h>
-#include <signal.h>
-#include <fcntl.h>
-#if defined(__GNUC__) || defined(__UNIX__)
-#include <unistd.h>
-#include <sys/types.h>
-#include <sys/stat.h>
-#else
-#include <io.h>
-#endif
-#include "drvlib/attrib.h"
-#include "drvlib/libc/init.h"
-#define __BUILDING_PE_LOADER__
-#include "drvlib/libc/file.h"
-#if defined(__WINDOWS__) || defined(TNT) || defined(__RTTARGET__)
-#define WIN32_LEAN_AND_MEAN
-#define STRICT
-#include <windows.h>
-#endif
-#ifdef __MSDOS__
-#include <dos.h>
-#endif
-#ifdef __OS2__
-#define INCL_DOS
-#define INCL_DOSERRORS
-#define INCL_SUB
-#include <os2.h>
-#endif
-#endif
-
-/* No text or binary modes for Unix */
-
-#ifndef O_BINARY
-#define O_BINARY 0
-#define O_TEXT 0
-#endif
-
-/*--------------------------- Global variables ----------------------------*/
-
-#if defined(__WIN32_VXD__) || defined(__NT_DRIVER__)
-#define MAX_FILES 16
-static FILE *openHandles[MAX_FILES] = {NULL};
-#endif
-
-/* <stdlib.h> stub functions */
-void _CDECL stub_abort(void);
-int _CDECL stub_atexit(void (*)(void));
-void * _CDECL stub_calloc(size_t _nelem, size_t _size);
-void _CDECL stub_exit(int _status);
-void _CDECL stub_free(void *_ptr);
-char * _CDECL stub_getenv(const char *_name);
-void * _CDECL stub_malloc(size_t _size);
-void * _CDECL stub_realloc(void *_ptr, size_t _size);
-int _CDECL stub_system(const char *_s);
-int _CDECL stub_putenv(const char *_val);
-
-/* <libc/file.h> stub functions */
-int _CDECL stub_open(const char *_path, int _oflag, unsigned _mode);
-int _CDECL stub_access(const char *_path, int _amode);
-int _CDECL stub_close(int _fildes);
-off_t _CDECL stub_lseek(int _fildes, off_t _offset, int _whence);
-size_t _CDECL stub_read(int _fildes, void *_buf, size_t _nbyte);
-int _CDECL stub_unlink(const char *_path);
-size_t _CDECL stub_write(int _fildes, const void *_buf, size_t _nbyte);
-int _CDECL stub_isatty(int _fildes);
-
-/* <stdio.h> stub functions */
-int _CDECL stub_remove(const char *_filename);
-int _CDECL stub_rename(const char *_old, const char *_new);
-
-/* <time.h> stub functions */
-time_t _CDECL stub_time(time_t *_tod);
-
-/* <signal.h> stub functions */
-int _CDECL stub_raise(int);
-void * _CDECL stub_signal(int, void *);
-
-/* <drvlib/attrib.h> functions */
-#define stub_OS_setfileattr _OS_setfileattr
-#define stub_OS_getcurrentdate _OS_getcurrentdate
-
-LIBC_imports _VARAPI ___imports = {
- sizeof(LIBC_imports),
-
- /* <stdlib.h> exports */
- stub_abort,
- stub_atexit,
- stub_calloc,
- stub_exit,
- stub_free,
- stub_getenv,
- stub_malloc,
- stub_realloc,
- stub_system,
- stub_putenv,
-
- /* <libc/file.h> exports */
- stub_open,
- stub_access,
- stub_close,
- stub_lseek,
- stub_read,
- stub_unlink,
- stub_write,
- stub_isatty,
-
- /* <stdio.h> exports */
- stub_remove,
- stub_rename,
-
- /* <signal.h> functions */
- stub_raise,
- stub_signal,
-
- /* <time.h> exports */
- stub_time,
-
- /* <drvlib/attrib.h> exports */
- stub_OS_setfileattr,
- stub_OS_getcurrentdate,
- };
-
-/*---------------------- Stub function implementation ---------------------*/
-
-/* <stdlib.h> stub functions */
-void _CDECL stub_abort(void)
-{
-#if !defined( __WIN32_VXD__) && !defined(__NT_DRIVER__)
- abort();
-#endif
-}
-
-int _CDECL stub_atexit(void (*func)(void))
-{
-#if !defined( __WIN32_VXD__) && !defined(__NT_DRIVER__)
- return atexit((void(*)(void))func);
-#else
- return -1;
-#endif
-}
-
-void * _CDECL stub_calloc(size_t _nelem, size_t _size)
-{ return __PM_calloc(_nelem,_size); }
-
-void _CDECL stub_exit(int _status)
-{
-#if !defined( __WIN32_VXD__) && !defined(__NT_DRIVER__)
- exit(_status);
-#endif
-}
-
-void _CDECL stub_free(void *_ptr)
-{ __PM_free(_ptr); }
-
-char * _CDECL stub_getenv(const char *_name)
-{
-#if defined( __WIN32_VXD__) || defined(__NT_DRIVER__)
- return NULL;
-#else
- return getenv(_name);
-#endif
-}
-
-void * _CDECL stub_malloc(size_t _size)
-{ return __PM_malloc(_size); }
-
-void * _CDECL stub_realloc(void *_ptr, size_t _size)
-{ return __PM_realloc(_ptr,_size); }
-
-int _CDECL stub_system(const char *_s)
-{
-#if defined(__WINDOWS__) || defined(__WIN32_VXD__) || defined(__NT_DRIVER__) || defined(__SMX32__) || defined(__RTTARGET__)
- (void)_s;
- return -1;
-#else
- return system(_s);
-#endif
-}
-
-int _CDECL stub_putenv(const char *_val)
-{
-#if defined( __WIN32_VXD__) || defined(__NT_DRIVER__)
- return -1;
-#else
- return putenv((char*)_val);
-#endif
-}
-
-time_t _CDECL stub_time(time_t *_tod)
-{
-#if defined( __WIN32_VXD__) || defined(__NT_DRIVER__)
- return 0;
-#else
- return time(_tod);
-#endif
-}
-
-#if defined(__MSDOS__)
-
-#if defined(TNT) && defined(_MSC_VER)
-
-void _CDECL _OS_setfileattr(const char *filename,unsigned attrib)
-{ SetFileAttributes((LPSTR)filename, (DWORD)attrib); }
-
-#else
-
-void _CDECL _OS_setfileattr(const char *filename,unsigned attrib)
-{ _dos_setfileattr(filename,attrib); }
-
-#endif
-
-#elif defined(__WIN32_VXD__)
-
-#define USE_LOCAL_FILEIO
-#define USE_LOCAL_GETDATE
-
-/* <libc/file.h> stub functions */
-int _CDECL stub_open(const char *_path, int _oflag, unsigned _mode)
-{
- char mode[10];
- int i;
-
- /* Find an empty file handle to use */
- for (i = 3; i < MAX_FILES; i++) {
- if (!openHandles[i])
- break;
- }
- if (openHandles[i])
- return -1;
-
- /* Find the open flags to use */
- if (_oflag & ___O_TRUNC)
- strcpy(mode,"w");
- else if (_oflag & ___O_CREAT)
- strcpy(mode,"a");
- else
- strcpy(mode,"r");
- if (_oflag & ___O_BINARY)
- strcat(mode,"b");
- if (_oflag & ___O_TEXT)
- strcat(mode,"t");
-
- /* Open the file and store the file handle */
- if ((openHandles[i] = fopen(_path,mode)) == NULL)
- return -1;
- return i;
-}
-
-int _CDECL stub_access(const char *_path, int _amode)
-{ return -1; }
-
-int _CDECL stub_close(int _fildes)
-{
- if (_fildes >= 3 && openHandles[_fildes]) {
- fclose(openHandles[_fildes]);
- openHandles[_fildes] = NULL;
- }
- return 0;
-}
-
-off_t _CDECL stub_lseek(int _fildes, off_t _offset, int _whence)
-{
- if (_fildes >= 3) {
- fseek(openHandles[_fildes],_offset,_whence);
- return ftell(openHandles[_fildes]);
- }
- return 0;
-}
-
-size_t _CDECL stub_read(int _fildes, void *_buf, size_t _nbyte)
-{
- if (_fildes >= 3)
- return fread(_buf,1,_nbyte,openHandles[_fildes]);
- return 0;
-}
-
-int _CDECL stub_unlink(const char *_path)
-{
- WORD error;
-
- if (initComplete) {
- if (R0_DeleteFile((char*)_path,0,&error))
- return 0;
- return -1;
- }
- else
- return i_remove(_path);
-}
-
-size_t _CDECL stub_write(int _fildes, const void *_buf, size_t _nbyte)
-{
- if (_fildes >= 3)
- return fwrite(_buf,1,_nbyte,openHandles[_fildes]);
- return _nbyte;
-}
-
-int _CDECL stub_isatty(int _fildes)
-{ return 0; }
-
-/* <stdio.h> stub functions */
-int _CDECL stub_remove(const char *_filename)
-{ return stub_unlink(_filename); }
-
-int _CDECL stub_rename(const char *_old, const char *_new)
-{ return -1; }
-
-void _CDECL _OS_setfileattr(const char *filename,unsigned attrib)
-{
- WORD error;
- if (initComplete)
- R0_SetFileAttributes((char*)filename,attrib,&error);
-}
-
-/* Return the current date in days since 1/1/1980 */
-ulong _CDECL _OS_getcurrentdate(void)
-{
- DWORD date;
- VTD_Get_Date_And_Time(&date);
- return date;
-}
-
-#elif defined(__NT_DRIVER__)
-
-#define USE_LOCAL_FILEIO
-#define USE_LOCAL_GETDATE
-
-/* <libc/file.h> stub functions */
-int _CDECL stub_open(const char *_path, int _oflag, unsigned _mode)
-{
- char mode[10];
- int i;
-
- /* Find an empty file handle to use */
- for (i = 3; i < MAX_FILES; i++) {
- if (!openHandles[i])
- break;
- }
- if (openHandles[i])
- return -1;
-
- /* Find the open flags to use */
- if (_oflag & ___O_TRUNC)
- strcpy(mode,"w");
- else if (_oflag & ___O_CREAT)
- strcpy(mode,"a");
- else
- strcpy(mode,"r");
- if (_oflag & ___O_BINARY)
- strcat(mode,"b");
- if (_oflag & ___O_TEXT)
- strcat(mode,"t");
-
- /* Open the file and store the file handle */
- if ((openHandles[i] = fopen(_path,mode)) == NULL)
- return -1;
- return i;
-}
-
-int _CDECL stub_close(int _fildes)
-{
- if (_fildes >= 3 && openHandles[_fildes]) {
- fclose(openHandles[_fildes]);
- openHandles[_fildes] = NULL;
- }
- return 0;
-}
-
-off_t _CDECL stub_lseek(int _fildes, off_t _offset, int _whence)
-{
- if (_fildes >= 3) {
- fseek(openHandles[_fildes],_offset,_whence);
- return ftell(openHandles[_fildes]);
- }
- return 0;
-}
-
-size_t _CDECL stub_read(int _fildes, void *_buf, size_t _nbyte)
-{
- if (_fildes >= 3)
- return fread(_buf,1,_nbyte,openHandles[_fildes]);
- return 0;
-}
-
-size_t _CDECL stub_write(int _fildes, const void *_buf, size_t _nbyte)
-{
- if (_fildes >= 3)
- return fwrite(_buf,1,_nbyte,openHandles[_fildes]);
- return _nbyte;
-}
-
-int _CDECL stub_access(const char *_path, int _amode)
-{ return -1; }
-
-int _CDECL stub_isatty(int _fildes)
-{ return 0; }
-
-int _CDECL stub_unlink(const char *_path)
-{
- /* TODO: Implement this! */
- return -1;
-}
-
-/* <stdio.h> stub functions */
-int _CDECL stub_remove(const char *_filename)
-{ return stub_unlink(_filename); }
-
-int _CDECL stub_rename(const char *_old, const char *_new)
-{
- /* TODO: Implement this! */
- return -1;
-}
-
-void _CDECL _OS_setfileattr(const char *filename,unsigned attrib)
-{
- uint _attr = 0;
- if (attrib & __A_RDONLY)
- _attr |= FILE_ATTRIBUTE_READONLY;
- if (attrib & __A_HIDDEN)
- _attr |= FILE_ATTRIBUTE_HIDDEN;
- if (attrib & __A_SYSTEM)
- _attr |= FILE_ATTRIBUTE_SYSTEM;
- PM_setFileAttr(filename,_attr);
-}
-
-/* Return the current date in days since 1/1/1980 */
-ulong _CDECL _OS_getcurrentdate(void)
-{
- TIME_FIELDS tm;
- _int64 count,count_1_1_1980;
-
- tm.Year = 1980;
- tm.Month = 1;
- tm.Day = 1;
- tm.Hour = 0;
- tm.Minute = 0;
- tm.Second = 0;
- tm.Milliseconds = 0;
- tm.Weekday = 0;
- RtlTimeFieldsToTime(&tm,(PLARGE_INTEGER)&count_1_1_1980);
- KeQuerySystemTime((PLARGE_INTEGER)&count);
- return (ulong)( (count - count_1_1_1980) / ((_int64)24 * (_int64)3600 * (_int64)10000000) );
-}
-
-#elif defined(__WINDOWS32__) || defined(__RTTARGET__)
-
-void _CDECL _OS_setfileattr(const char *filename,unsigned attrib)
-{ SetFileAttributes((LPSTR)filename, (DWORD)attrib); }
-
-#elif defined(__OS2__)
-
-#define USE_LOCAL_FILEIO
-
-#ifndef W_OK
-#define W_OK 0x02
-#endif
-
-void _CDECL _OS_setfileattr(const char *filename,unsigned attrib)
-{
- FILESTATUS3 s;
- if (DosQueryPathInfo((PSZ)filename,FIL_STANDARD,(PVOID)&s,sizeof(s)))
- return;
- s.attrFile = attrib;
- DosSetPathInfo((PSZ)filename,FIL_STANDARD,(PVOID)&s,sizeof(s),0L);
-}
-
-/* <libc/file.h> stub functions */
-
-#define BUF_SIZE 4096
-
-/* Note: the implementation of the standard Unix-ish handle-based I/O isn't
- * complete - but that wasn't the intent either. Note also that we
- * don't presently support text file I/O, so all text files end
- * up in Unix format (and are not translated!).
- */
-int _CDECL stub_open(const char *_path, int _oflag, unsigned _mode)
-{
- HFILE handle;
- ULONG error, actiontaken, openflag, openmode;
- char path[PM_MAX_PATH];
-
- /* Determine open flags */
- if (_oflag & ___O_CREAT) {
- if (_oflag & ___O_EXCL)
- openflag = OPEN_ACTION_FAIL_IF_EXISTS | OPEN_ACTION_CREATE_IF_NEW;
- else if (_oflag & ___O_TRUNC)
- openflag = OPEN_ACTION_REPLACE_IF_EXISTS | OPEN_ACTION_CREATE_IF_NEW;
- else
- openflag = OPEN_ACTION_OPEN_IF_EXISTS | OPEN_ACTION_CREATE_IF_NEW;
- }
- else if (_oflag & ___O_TRUNC)
- openflag = OPEN_ACTION_REPLACE_IF_EXISTS;
- else
- openflag = OPEN_ACTION_OPEN_IF_EXISTS;
-
- /* Determine open mode flags */
- if (_oflag & ___O_RDONLY)
- openmode = OPEN_ACCESS_READONLY | OPEN_SHARE_DENYNONE;
- else if (_oflag & ___O_WRONLY)
- openmode = OPEN_ACCESS_WRITEONLY | OPEN_SHARE_DENYWRITE;
- else
- openmode = OPEN_ACCESS_READWRITE | OPEN_SHARE_DENYWRITE;
-
- /* Copy the path to a variable on the stack. We need to do this
- * for OS/2 as when the drivers are loaded into shared kernel
- * memory, we can't pass an address from that memory range to
- * this function.
- */
- strcpy(path,_path);
- if (DosOpen(path, &handle, &actiontaken, 0, FILE_NORMAL,
- openflag, openmode, NULL) != NO_ERROR)
- return -1;
-
- /* Handle append mode of operation */
- if (_oflag & ___O_APPEND) {
- if (DosSetFilePtr(handle, 0, FILE_END, &error) != NO_ERROR)
- return -1;
- }
- return handle;
-}
-
-int _CDECL stub_access(const char *_path, int _amode)
-{
- char path[PM_MAX_PATH];
- FILESTATUS fs;
-
- /* Copy the path to a variable on the stack. We need to do this
- * for OS/2 as when the drivers are loaded into shared kernel
- * memory, we can't pass an address from that memory range to
- * this function.
- */
- strcpy(path,_path);
- if (DosQueryPathInfo(path, FIL_STANDARD, &fs, sizeof(fs)) != NO_ERROR)
- return -1;
- if ((_amode & W_OK) && (fs.attrFile & FILE_READONLY))
- return -1;
- return 0;
-}
-
-int _CDECL stub_close(int _fildes)
-{
- if (DosClose(_fildes) != NO_ERROR)
- return -1;
- return 0;
-}
-
-off_t _CDECL stub_lseek(int _fildes, off_t _offset, int _whence)
-{
- ULONG cbActual, origin;
-
- switch (_whence) {
- case SEEK_CUR:
- origin = FILE_CURRENT;
- break;
- case SEEK_END:
- origin = FILE_END;
- break;
- default:
- origin = FILE_BEGIN;
- }
- if (DosSetFilePtr(_fildes, _offset, origin, &cbActual) != NO_ERROR)
- return -1;
- return cbActual;
-}
-
-size_t _CDECL stub_read(int _fildes, void *_buf, size_t _nbyte)
-{
- ULONG cbActual = 0,cbRead;
- uchar *p = _buf;
- uchar file_io_buf[BUF_SIZE];
-
- /* We need to perform the physical read in chunks into a
- * a temporary static buffer, since the buffer passed in may be
- * in kernel space and will cause DosRead to bail internally.
- */
- while (_nbyte > BUF_SIZE) {
- if (DosRead(_fildes, file_io_buf, BUF_SIZE, &cbRead) != NO_ERROR)
- return -1;
- cbActual += cbRead;
- memcpy(p,file_io_buf,BUF_SIZE);
- p += BUF_SIZE;
- _nbyte -= BUF_SIZE;
- }
- if (_nbyte) {
- if (DosRead(_fildes, file_io_buf, _nbyte, &cbRead) != NO_ERROR)
- return -1;
- cbActual += cbRead;
- memcpy(p,file_io_buf,_nbyte);
- }
- return cbActual;
-}
-
-size_t _CDECL stub_write(int _fildes, const void *_buf, size_t _nbyte)
-{
- ULONG cbActual = 0,cbWrite;
- uchar *p = (PVOID)_buf;
- uchar file_io_buf[BUF_SIZE];
-
- /* We need to perform the physical write in chunks from a
- * a temporary static buffer, since the buffer passed in may be
- * in kernel space and will cause DosWrite to bail internally.
- */
- while (_nbyte > BUF_SIZE) {
- memcpy(file_io_buf,p,BUF_SIZE);
- if (DosWrite(_fildes, file_io_buf, BUF_SIZE, &cbWrite) != NO_ERROR)
- return -1;
- cbActual += cbWrite;
- p += BUF_SIZE;
- _nbyte -= BUF_SIZE;
- }
- if (_nbyte) {
- memcpy(file_io_buf,p,_nbyte);
- if (DosWrite(_fildes, file_io_buf, _nbyte, &cbWrite) != NO_ERROR)
- return -1;
- cbActual += cbWrite;
- }
- return cbActual;
-}
-
-int _CDECL stub_unlink(const char *_path)
-{
- char path[PM_MAX_PATH];
-
- /* Copy the path to a variable on the stack. We need to do this
- * for OS/2 as when the drivers are loaded into shared kernel
- * memory, we can't pass an address from that memory range to
- * this function.
- */
- strcpy(path,_path);
- if (DosDelete(path) != NO_ERROR)
- return -1;
- return 0;
-}
-
-int _CDECL stub_isatty(int _fildes)
-{
- ULONG htype, flags;
-
- if (DosQueryHType(_fildes, &htype, &flags) != NO_ERROR)
- return 0;
- return ((htype & 0xFF) == HANDTYPE_DEVICE);
-}
-
-/* <stdio.h> stub functions */
-int _CDECL stub_remove(const char *_path)
-{
- char path[PM_MAX_PATH];
-
- /* Copy the path to a variable on the stack. We need to do this
- * for OS/2 as when the drivers are loaded into shared kernel
- * memory, we can't pass an address from that memory range to
- * this function.
- */
- strcpy(path,_path);
- if (DosDelete(path) != NO_ERROR)
- return -1;
- return 0;
-}
-
-int _CDECL stub_rename(const char *_old, const char *_new)
-{
- char old[PM_MAX_PATH];
- char new[PM_MAX_PATH];
-
- /* Copy the path to a variable on the stack. We need to do this
- * for OS/2 as when the drivers are loaded into shared kernel
- * memory, we can't pass an address from that memory range to
- * this function.
- */
- strcpy(old,_old);
- strcpy(new,_new);
- if (DosMove(old, new) != NO_ERROR)
- return -1;
- return 0;
-}
-
-#else
-
-void _CDECL _OS_setfileattr(const char *filename,unsigned attrib)
-{ /* Unable to set hidden, system attributes on Unix. */ }
-
-#endif
-
-#ifndef USE_LOCAL_FILEIO
-
-/* <libc/file.h> stub functions */
-int _CDECL stub_open(const char *_path, int _oflag, unsigned _mode)
-{
- int oflag_tab[] = {
- ___O_RDONLY, O_RDONLY,
- ___O_WRONLY, O_WRONLY,
- ___O_RDWR, O_RDWR,
- ___O_BINARY, O_BINARY,
- ___O_TEXT, O_TEXT,
- ___O_CREAT, O_CREAT,
- ___O_EXCL, O_EXCL,
- ___O_TRUNC, O_TRUNC,
- ___O_APPEND, O_APPEND,
- };
- int i,oflag = 0;
-
- /* Translate the oflag's to the OS dependent versions */
- for (i = 0; i < sizeof(oflag_tab) / sizeof(int); i += 2) {
- if (_oflag & oflag_tab[i])
- oflag |= oflag_tab[i+1];
- }
- return open(_path,oflag,_mode);
-}
-
-int _CDECL stub_access(const char *_path, int _amode)
-{ return access(_path,_amode); }
-
-int _CDECL stub_close(int _fildes)
-{ return close(_fildes); }
-
-off_t _CDECL stub_lseek(int _fildes, off_t _offset, int _whence)
-{ return lseek(_fildes,_offset,_whence); }
-
-size_t _CDECL stub_read(int _fildes, void *_buf, size_t _nbyte)
-{ return read(_fildes,_buf,_nbyte); }
-
-int _CDECL stub_unlink(const char *_path)
-{ return unlink(_path); }
-
-size_t _CDECL stub_write(int _fildes, const void *_buf, size_t _nbyte)
-{ return write(_fildes,_buf,_nbyte); }
-
-int _CDECL stub_isatty(int _fildes)
-{ return isatty(_fildes); }
-
-/* <stdio.h> stub functions */
-int _CDECL stub_remove(const char *_filename)
-{ return remove(_filename); }
-
-int _CDECL stub_rename(const char *_old, const char *_new)
-{ return rename(_old,_new); }
-
-#endif
-
-#ifndef USE_LOCAL_GETDATE
-
-/* Return the current date in days since 1/1/1980 */
-ulong _CDECL _OS_getcurrentdate(void)
-{
- struct tm refTime;
- refTime.tm_year = 80;
- refTime.tm_mon = 0;
- refTime.tm_mday = 1;
- refTime.tm_hour = 0;
- refTime.tm_min = 0;
- refTime.tm_sec = 0;
- refTime.tm_isdst = -1;
- return (time(NULL) - mktime(&refTime)) / (24 * 3600L);
-}
-
-#endif
-
-int _CDECL stub_raise(int sig)
-{
-#if defined(__WIN32_VXD__) || defined(__NT_DRIVER__) || defined(__SMX32__)
- return -1;
-#else
- return raise(sig);
-#endif
-}
-
-#ifdef __WINDOWS32__
-typedef void (*__code_ptr)(int);
-#else
-typedef void (*__code_ptr)();
-#endif
-
-void * _CDECL stub_signal(int sig, void *handler)
-{
-#if defined(__WIN32_VXD__) || defined(__NT_DRIVER__) || defined(__SMX32__)
- return NULL;
-#else
- return (void*)signal(sig,(__code_ptr)handler);
-#endif
-}
diff --git a/board/MAI/bios_emulator/scitech/src/common/makefile b/board/MAI/bios_emulator/scitech/src/common/makefile
deleted file mode 100644
index 5aac0381b3..0000000000
--- a/board/MAI/bios_emulator/scitech/src/common/makefile
+++ /dev/null
@@ -1,18 +0,0 @@
-#############################################################################
-#
-# Copyright (C) 1996 SciTech Software.
-# All rights reserved.
-#
-# Descripton: Makefile for UniVBE(tm), UniPOWER(tm), UVBELib(tm) and
-# DPMSLib library files. Requires Borland C++ 4.52 to build
-# some components.
-#
-# $Date: 2002/10/02 15:35:20 $ $Author: hfrieden $
-#
-#############################################################################
-
-CFLAGS += -DTESTING_GTF
-
-gtfcalc$E: gtfcalc$O
-
-.INCLUDE: "$(SCITECH)/makedefs/common.mk"
diff --git a/board/MAI/bios_emulator/scitech/src/common/peloader.c b/board/MAI/bios_emulator/scitech/src/common/peloader.c
deleted file mode 100644
index a134bb012f..0000000000
--- a/board/MAI/bios_emulator/scitech/src/common/peloader.c
+++ /dev/null
@@ -1,586 +0,0 @@
-/****************************************************************************
-*
-* SciTech MGL Graphics Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-*
-* Description: Module to implement a simple Portable Binary DLL loader
-* library. This library can be used to load PE DLL's under
-* any Intel based OS, provided the DLL's do not have any
-* imports in the import table.
-*
-* NOTE: This loader module expects the DLL's to be built with
-* Watcom C++ and may produce unexpected results with
-* DLL's linked by another compiler.
-*
-****************************************************************************/
-
-#include "drvlib/peloader.h"
-#include "pmapi.h"
-#include "drvlib/os/os.h"
-#include "drvlib/libc/init.h"
-#if (defined(__WINDOWS32__) || defined(__DRIVER__)) && defined(CHECKED)
-#define WIN32_LEAN_AND_MEAN
-#define STRICT
-#include <windows.h>
-#endif
-#include "drvlib/pe.h"
-
-/*--------------------------- Global variables ----------------------------*/
-
-static int result = PE_ok;
-
-/*------------------------- Implementation --------------------------------*/
-
-/****************************************************************************
-PARAMETERS:
-f - Handle to open file to read driver from
-startOffset - Offset to the start of the driver within the file
-
-RETURNS:
-Handle to loaded PE DLL, or NULL on failure.
-
-REMARKS:
-This function loads a Portable Binary DLL library from disk, relocates
-the code and returns a handle to the loaded library. This function is the
-same as the regular PE_loadLibrary except that it take a handle to an
-open file and an offset within that file for the DLL to load.
-****************************************************************************/
-static int PE_readHeader(
- FILE *f,
- long startOffset,
- FILE_HDR *filehdr,
- OPTIONAL_HDR *opthdr)
-{
- EXE_HDR exehdr;
- ulong offset,signature;
-
- /* Read the EXE header and check for valid header signature */
- result = PE_invalidDLLImage;
- fseek(f, startOffset, SEEK_SET);
- if (fread(&exehdr, 1, sizeof(exehdr), f) != sizeof(exehdr))
- return false;
- if (exehdr.signature != 0x5A4D)
- return false;
-
- /* Now seek to the start of the PE header defined at offset 0x3C
- * in the MS-DOS EXE header, and read the signature and check it.
- */
- fseek(f, startOffset+0x3C, SEEK_SET);
- if (fread(&offset, 1, sizeof(offset), f) != sizeof(offset))
- return false;
- fseek(f, startOffset+offset, SEEK_SET);
- if (fread(&signature, 1, sizeof(signature), f) != sizeof(signature))
- return false;
- if (signature != 0x00004550)
- return false;
-
- /* Now read the PE file header and check that it is correct */
- if (fread(filehdr, 1, sizeof(*filehdr), f) != sizeof(*filehdr))
- return false;
- if (filehdr->Machine != IMAGE_FILE_MACHINE_I386)
- return false;
- if (!(filehdr->Characteristics & IMAGE_FILE_32BIT_MACHINE))
- return false;
- if (!(filehdr->Characteristics & IMAGE_FILE_DLL))
- return false;
- if (fread(opthdr, 1, sizeof(*opthdr), f) != sizeof(*opthdr))
- return false;
- if (opthdr->Magic != 0x10B)
- return false;
-
- /* Success, so return true! */
- return true;
-}
-
-/****************************************************************************
-PARAMETERS:
-f - Handle to open file to read driver from
-startOffset - Offset to the start of the driver within the file
-
-RETURNS:
-Size of the DLL file on disk, or -1 on error
-
-REMARKS:
-This function scans the headers for a Portable Binary DLL to determine the
-length of the DLL file on disk.
-{secret}
-****************************************************************************/
-ulong PEAPI PE_getFileSize(
- FILE *f,
- ulong startOffset)
-{
- FILE_HDR filehdr;
- OPTIONAL_HDR opthdr;
- SECTION_HDR secthdr;
- ulong size;
- int i;
-
- /* Read the PE file headers from disk */
- if (!PE_readHeader(f,startOffset,&filehdr,&opthdr))
- return 0xFFFFFFFF;
-
- /* Scan all the section headers summing up the total size */
- size = opthdr.SizeOfHeaders;
- for (i = 0; i < filehdr.NumberOfSections; i++) {
- if (fread(&secthdr, 1, sizeof(secthdr), f) != sizeof(secthdr))
- return 0xFFFFFFFF;
- size += secthdr.SizeOfRawData;
- }
- return size;
-}
-
-/****************************************************************************
-DESCRIPTION:
-Loads a Portable Binary DLL into memory from an open file
-
-HEADER:
-peloader.h
-
-PARAMETERS:
-f - Handle to open file to read driver from
-startOffset - Offset to the start of the driver within the file
-size - Place to store the size of the driver loaded
-shared - True to load module into shared memory
-
-RETURNS:
-Handle to loaded PE DLL, or NULL on failure.
-
-REMARKS:
-This function loads a Portable Binary DLL library from disk, relocates
-the code and returns a handle to the loaded library. This function is the
-same as the regular PE_loadLibrary except that it take a handle to an
-open file and an offset within that file for the DLL to load.
-
-SEE ALSO:
-PE_loadLibrary, PE_getProcAddress, PE_freeLibrary
-****************************************************************************/
-PE_MODULE * PEAPI PE_loadLibraryExt(
- FILE *f,
- ulong startOffset,
- ulong *size,
- ibool shared)
-{
- FILE_HDR filehdr;
- OPTIONAL_HDR opthdr;
- SECTION_HDR secthdr;
- ulong offset,pageOffset;
- ulong text_off,text_addr,text_size;
- ulong data_off,data_addr,data_size,data_end;
- ulong export_off,export_addr,export_size,export_end;
- ulong reloc_off,reloc_size;
- ulong image_size;
- int i,delta,numFixups;
- ushort relocType,*fixup;
- PE_MODULE *hMod = NULL;
- void *reloc = NULL;
- BASE_RELOCATION *baseReloc;
- InitLibC_t InitLibC;
-
- /* Read the PE file headers from disk */
- if (!PE_readHeader(f,startOffset,&filehdr,&opthdr))
- return NULL;
-
- /* Scan all the section headers and find the necessary sections */
- text_off = data_off = reloc_off = export_off = 0;
- text_addr = text_size = 0;
- data_addr = data_size = data_end = 0;
- export_addr = export_size = export_end = 0;
- reloc_size = 0;
- for (i = 0; i < filehdr.NumberOfSections; i++) {
- if (fread(&secthdr, 1, sizeof(secthdr), f) != sizeof(secthdr))
- goto Error;
- if (strcmp(secthdr.Name, ".edata") == 0 || strcmp(secthdr.Name, ".rdata") == 0) {
- /* Exports section */
- export_off = secthdr.PointerToRawData;
- export_addr = secthdr.VirtualAddress;
- export_size = secthdr.SizeOfRawData;
- export_end = export_addr + export_size;
- }
- else if (strcmp(secthdr.Name, ".idata") == 0) {
- /* Imports section, ignore */
- }
- else if (strcmp(secthdr.Name, ".reloc") == 0) {
- /* Relocations section */
- reloc_off = secthdr.PointerToRawData;
- reloc_size = secthdr.SizeOfRawData;
- }
- else if (!text_off && secthdr.Characteristics & IMAGE_SCN_CNT_CODE) {
- /* Code section */
- text_off = secthdr.PointerToRawData;
- text_addr = secthdr.VirtualAddress;
- text_size = secthdr.SizeOfRawData;
- }
- else if (!data_off && secthdr.Characteristics & IMAGE_SCN_CNT_INITIALIZED_DATA) {
- /* Data section */
- data_off = secthdr.PointerToRawData;
- data_addr = secthdr.VirtualAddress;
- data_size = secthdr.SizeOfRawData;
- data_end = data_addr + data_size;
- }
- }
-
- /* Check to make sure that we have all the sections we need */
- if (!text_off || !data_off || !export_off || !reloc_off) {
- result = PE_invalidDLLImage;
- goto Error;
- }
-
- /* Find the size of the image to load allocate memory for it */
- image_size = MAX(export_end,data_end) - text_addr;
- *size = sizeof(PE_MODULE) + image_size + 4096;
- if (shared)
- hMod = PM_mallocShared(*size);
- else
- hMod = PM_malloc(*size);
- reloc = PM_malloc(reloc_size);
- if (!hMod || !reloc) {
- result = PE_outOfMemory;
- goto Error;
- }
-
- hMod->text = (uchar*)ROUND_4K((ulong)hMod + sizeof(PE_MODULE));
- hMod->data = (uchar*)((ulong)hMod->text + (data_addr - text_addr));
- hMod->export = (uchar*)((ulong)hMod->text + (export_addr - text_addr));
- hMod->textBase = text_addr;
- hMod->dataBase = data_addr;
- hMod->exportBase = export_addr;
- hMod->exportDir = opthdr.DataDirectory[0].RelVirtualAddress - export_addr;
- hMod->shared = shared;
-
- /* Now read the section images from disk */
- result = PE_invalidDLLImage;
- fseek(f, startOffset+text_off, SEEK_SET);
- if (fread(hMod->text, 1, text_size, f) != text_size)
- goto Error;
- fseek(f, startOffset+data_off, SEEK_SET);
- if (fread(hMod->data, 1, data_size, f) != data_size)
- goto Error;
- fseek(f, startOffset+export_off, SEEK_SET);
- if (fread(hMod->export, 1, export_size, f) != export_size)
- goto Error;
- fseek(f, startOffset+reloc_off, SEEK_SET);
- if (fread(reloc, 1, reloc_size, f) != reloc_size)
- goto Error;
-
- /* Now perform relocations on all sections in the image */
- delta = (ulong)hMod->text - opthdr.ImageBase - text_addr;
- baseReloc = (BASE_RELOCATION*)reloc;
- for (;;) {
- /* Check for termination condition */
- if (!baseReloc->PageRVA || !baseReloc->BlockSize)
- break;
-
- /* Do fixups */
- pageOffset = baseReloc->PageRVA - hMod->textBase;
- numFixups = (baseReloc->BlockSize - sizeof(BASE_RELOCATION)) / sizeof(ushort);
- fixup = (ushort*)(baseReloc + 1);
- for (i = 0; i < numFixups; i++) {
- relocType = *fixup >> 12;
- if (relocType) {
- offset = pageOffset + (*fixup & 0x0FFF);
- *(ulong*)(hMod->text + offset) += delta;
- }
- fixup++;
- }
-
- /* Move to next relocation block */
- baseReloc = (BASE_RELOCATION*)((ulong)baseReloc + baseReloc->BlockSize);
- }
-
- /* Initialise the C runtime library for the loaded DLL */
- result = PE_unableToInitLibC;
- if ((InitLibC = (InitLibC_t)PE_getProcAddress(hMod,"_InitLibC")) == NULL)
- goto Error;
- if (!InitLibC(&___imports,PM_getOSType()))
- goto Error;
-
- /* Clean up, close the file and return the loaded module handle */
- PM_free(reloc);
- result = PE_ok;
- return hMod;
-
-Error:
- if (shared)
- PM_freeShared(hMod);
- else
- PM_free(hMod);
- PM_free(reloc);
- return NULL;
-}
-
-/****************************************************************************
-DESCRIPTION:
-Loads a Portable Binary DLL into memory
-
-HEADER:
-peloader.h
-
-PARAMETERS:
-szDLLName - Name of the PE DLL library to load
-shared - True to load module into shared memory
-
-RETURNS:
-Handle to loaded PE DLL, or NULL on failure.
-
-REMARKS:
-This function loads a Portable Binary DLL library from disk, relocates
-the code and returns a handle to the loaded library. This function
-will only work on DLL's that do not have any imports, since we don't
-resolve import dependencies in this function.
-
-SEE ALSO:
-PE_getProcAddress, PE_freeLibrary
-****************************************************************************/
-PE_MODULE * PEAPI PE_loadLibrary(
- const char *szDLLName,
- ibool shared)
-{
- PE_MODULE *hMod;
-
-#if (defined(__WINDOWS32__) || defined(__DRIVER__)) && defined(CHECKED)
- if (!shared) {
- PM_MODULE hInst;
- InitLibC_t InitLibC;
-
- /* For Win32 if are building checked libraries for debugging, we use
- * the real Win32 DLL functions so that we can debug the resulting DLL
- * files with the Win32 debuggers. Note that we can't do this if
- * we need to load the files into a shared memory context.
- */
- if ((hInst = PM_loadLibrary(szDLLName)) == NULL) {
- result = PE_fileNotFound;
- return NULL;
- }
-
- /* Initialise the C runtime library for the loaded DLL */
- result = PE_unableToInitLibC;
- if ((InitLibC = (void*)PM_getProcAddress(hInst,"_InitLibC")) == NULL)
- return NULL;
- if (!InitLibC(&___imports,PM_getOSType()))
- return NULL;
-
- /* Allocate the PE_MODULE structure */
- if ((hMod = PM_malloc(sizeof(*hMod))) == NULL)
- return NULL;
- hMod->text = (void*)hInst;
- hMod->shared = -1;
-
- /* DLL loaded successfully so return module handle */
- result = PE_ok;
- return hMod;
- }
- else
-#endif
- {
- FILE *f;
- ulong size;
-
- /* Attempt to open the file on disk */
- if (shared < 0)
- shared = 0;
- if ((f = fopen(szDLLName,"rb")) == NULL) {
- result = PE_fileNotFound;
- return NULL;
- }
- hMod = PE_loadLibraryExt(f,0,&size,shared);
- fclose(f);
- return hMod;
- }
-}
-
-/****************************************************************************
-DESCRIPTION:
-Loads a Portable Binary DLL into memory
-
-HEADER:
-peloader.h
-
-PARAMETERS:
-szDLLName - Name of the PE DLL library to load
-shared - True to load module into shared memory
-
-RETURNS:
-Handle to loaded PE DLL, or NULL on failure.
-
-REMARKS:
-This function is the same as the regular PE_loadLibrary function, except
-that it looks for the drivers in the MGL_ROOT/drivers directory or a
-/drivers directory relative to the current directory.
-
-SEE ALSO:
-PE_loadLibraryMGL, PE_getProcAddress, PE_freeLibrary
-****************************************************************************/
-PE_MODULE * PEAPI PE_loadLibraryMGL(
- const char *szDLLName,
- ibool shared)
-{
-#if !defined(__WIN32_VXD__) && !defined(__NT_DRIVER__)
- PE_MODULE *hMod;
-#endif
- char path[256] = "";
-
- /* We look in the 'drivers' directory, optionally under the MGL_ROOT
- * environment variable directory.
- */
-#if !defined(__WIN32_VXD__) && !defined(__NT_DRIVER__)
- if (getenv("MGL_ROOT")) {
- strcpy(path,getenv("MGL_ROOT"));
- PM_backslash(path);
- }
- strcat(path,"drivers");
- PM_backslash(path);
- strcat(path,szDLLName);
- if ((hMod = PE_loadLibrary(path,shared)) != NULL)
- return hMod;
-#endif
- strcpy(path,"drivers");
- PM_backslash(path);
- strcat(path,szDLLName);
- return PE_loadLibrary(path,shared);
-}
-
-/****************************************************************************
-DESCRIPTION:
-Gets a function address from a Portable Binary DLL
-
-HEADER:
-peloader.h
-
-PARAMETERS:
-hModule - Handle to a loaded PE DLL library
-szProcName - Name of the function to get the address of
-
-RETURNS:
-Pointer to the function, or NULL on failure.
-
-REMARKS:
-This function searches for the named, exported function in a loaded PE
-DLL library, and returns the address of the function. If the function is
-not found in the library, this function return NULL.
-
-SEE ALSO:
-PE_loadLibrary, PE_freeLibrary
-****************************************************************************/
-void * PEAPI PE_getProcAddress(
- PE_MODULE *hModule,
- const char *szProcName)
-{
-#if (defined(__WINDOWS32__) || defined(__DRIVER__)) && defined(CHECKED)
- if (hModule->shared == -1)
- return (void*)PM_getProcAddress(hModule->text,szProcName);
- else
-#endif
- {
- uint i;
- EXPORT_DIRECTORY *exports;
- ulong funcOffset;
- ulong *AddressTable;
- ulong *NameTable;
- ushort *OrdinalTable;
- char *name;
-
- /* Find the address of the export tables from the export section */
- if (!hModule)
- return NULL;
- exports = (EXPORT_DIRECTORY*)(hModule->export + hModule->exportDir);
- AddressTable = (ulong*)(hModule->export + exports->AddressTableRVA - hModule->exportBase);
- NameTable = (ulong*)(hModule->export + exports->NameTableRVA - hModule->exportBase);
- OrdinalTable = (ushort*)(hModule->export + exports->OrdinalTableRVA - hModule->exportBase);
-
- /* Search the export name table to find the function name */
- for (i = 0; i < exports->NumberOfNamePointers; i++) {
- name = (char*)(hModule->export + NameTable[i] - hModule->exportBase);
- if (strcmp(name,szProcName) == 0)
- break;
- }
- if (i == exports->NumberOfNamePointers)
- return NULL;
- funcOffset = AddressTable[OrdinalTable[i]];
- if (!funcOffset)
- return NULL;
- return (void*)(hModule->text + funcOffset - hModule->textBase);
- }
-}
-
-/****************************************************************************
-DESCRIPTION:
-Frees a loaded Portable Binary DLL
-
-HEADER:
-peloader.h
-
-PARAMETERS:
-hModule - Handle to a loaded PE DLL library to free
-
-REMARKS:
-This function frees a loaded PE DLL library from memory.
-
-SEE ALSO:
-PE_getProcAddress, PE_loadLibrary
-****************************************************************************/
-void PEAPI PE_freeLibrary(
- PE_MODULE *hModule)
-{
- TerminateLibC_t TerminateLibC;
-
-#if (defined(__WINDOWS32__) || defined(__DRIVER__)) && defined(CHECKED)
- if (hModule->shared == -1) {
- /* Run the C runtime library exit code on module unload */
- if ((TerminateLibC = (TerminateLibC_t)PM_getProcAddress(hModule->text,"_TerminateLibC")) != NULL)
- TerminateLibC();
- PM_freeLibrary(hModule->text);
- PM_free(hModule);
- }
- else
-#endif
- {
- if (hModule) {
- /* Run the C runtime library exit code on module unload */
- if ((TerminateLibC = (TerminateLibC_t)PE_getProcAddress(hModule,"_TerminateLibC")) != NULL)
- TerminateLibC();
- if (hModule->shared)
- PM_freeShared(hModule);
- else
- PM_free(hModule);
- }
- }
-}
-
-/****************************************************************************
-DESCRIPTION:
-Returns the error code for the last operation
-
-HEADER:
-peloader.h
-
-RETURNS:
-Error code for the last operation.
-
-SEE ALSO:
-PE_getProcAddress, PE_loadLibrary
-****************************************************************************/
-int PEAPI PE_getError(void)
-{
- return result;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/common/vesavbe.c b/board/MAI/bios_emulator/scitech/src/common/vesavbe.c
deleted file mode 100644
index a669e5c292..0000000000
--- a/board/MAI/bios_emulator/scitech/src/common/vesavbe.c
+++ /dev/null
@@ -1,1214 +0,0 @@
-/****************************************************************************
-*
-* The SuperVGA Kit - UniVBE Software Development Kit
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: IBM PC Real Mode and 16/32 bit Protected Mode.
-*
-* Description: Module to implement a C callable interface to the standard
-* VESA VBE routines. You should rip out this module and use it
-* directly in your own applications, or you can use the
-* high level SDK functions.
-*
-* MUST be compiled in the LARGE or FLAT models.
-*
-****************************************************************************/
-
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include "vesavbe.h"
-#include "pmapi.h"
-#include "drvlib/os/os.h"
-
-/*---------------------------- Global Variables ---------------------------*/
-
-#define VBE_SUCCESS 0x004F
-#define MAX_LIN_PTRS 10
-
-static uint VESABuf_len = 1024;/* Length of the VESABuf buffer */
-static ibool haveRiva128; /* True if we have a Riva128 */
-static VBE_state defState = {0}; /* Default state buffer */
-static VBE_state *state = &defState; /* Pointer to current buffer */
-static int VBE_shared = 0;
-#ifndef REALMODE
-static char localBuf[512]; /* Global PM string translate buf */
-#define MAX_LOCAL_BUF &localBuf[511]
-#endif
-
-/*----------------------------- Implementation ----------------------------*/
-
-/* static function in WinDirect for passing 32-bit registers to BIOS */
-int PMAPI WD_int386(int intno, RMREGS *in, RMREGS *out);
-
-void VBEAPI VBE_init(void)
-/****************************************************************************
-*
-* Function: VBE_init
-*
-* Description: Initialises the VBE transfer buffer in real mode DC.memory.
-* This routine is called by the VESAVBE module every time
-* it needs to use the transfer buffer, so we simply allocate
-* it once and then return.
-*
-****************************************************************************/
-{
- if (!state->VESABuf_ptr) {
- /* Allocate a global buffer for communicating with the VESA VBE */
- if ((state->VESABuf_ptr = PM_getVESABuf(&VESABuf_len, &state->VESABuf_rseg, &state->VESABuf_roff)) == NULL)
- PM_fatalError("VESAVBE.C: Real mode memory allocation failed!");
- }
-}
-
-void * VBEAPI VBE_getRMBuf(uint *len,uint *rseg,uint *roff)
-/****************************************************************************
-*
-* Function: VBE_getRMBuf
-*
-* Description: This function returns the location and length of the real
-* mode memory buffer for calling real mode functions.
-*
-****************************************************************************/
-{
- *len = VESABuf_len;
- *rseg = state->VESABuf_rseg;
- *roff = state->VESABuf_roff;
- return state->VESABuf_ptr;
-}
-
-void VBEAPI VBE_setStateBuffer(VBE_state *s)
-/****************************************************************************
-*
-* Function: VBE_setStateBuffer
-*
-* Description: This functions sets the internal state buffer for the
-* VBE module to the passed in buffer. By default the internal
-* global buffer is used, but you must use separate buffers
-* for each device in a multi-controller environment.
-*
-****************************************************************************/
-{
- state = s;
-}
-
-void VBEAPI VBE_callESDI(RMREGS *regs, void *buffer, int size)
-/****************************************************************************
-*
-* Function: VBE_callESDI
-* Parameters: regs - Registers to load when calling VBE
-* buffer - Buffer to copy VBE info block to
-* size - Size of buffer to fill
-*
-* Description: Calls the VESA VBE and passes in a buffer for the VBE to
-* store information in, which is then copied into the users
-* buffer space. This works in protected mode as the buffer
-* passed to the VESA VBE is allocated in conventional
-* memory, and is then copied into the users memory block.
-*
-****************************************************************************/
-{
- RMSREGS sregs;
-
- if (!state->VESABuf_ptr)
- PM_fatalError("You *MUST* call VBE_init() before you can call the VESAVBE.C module!");
- sregs.es = (ushort)state->VESABuf_rseg;
- regs->x.di = (ushort)state->VESABuf_roff;
- memcpy(state->VESABuf_ptr, buffer, size);
- PM_int86x(0x10, regs, regs, &sregs);
- memcpy(buffer, state->VESABuf_ptr, size);
-}
-
-#ifndef REALMODE
-static char *VBE_copyStrToLocal(char *p,char *realPtr,char *max)
-/****************************************************************************
-*
-* Function: VBE_copyStrToLocal
-* Parameters: p - Flat model buffer to copy to
-* realPtr - Real mode pointer to copy
-* Returns: Pointer to the next byte after string
-*
-* Description: Copies the string from the real mode location pointed to
-* by 'realPtr' into the flat model buffer pointed to by
-* 'p'. We return a pointer to the next byte past the copied
-* string.
-*
-****************************************************************************/
-{
- uchar *v;
-
- v = PM_mapRealPointer((uint)((ulong)realPtr >> 16), (uint)((ulong)realPtr & 0xFFFF));
- while (*v != 0 && p < max)
- *p++ = *v++;
- *p++ = 0;
- return p;
-}
-
-static void VBE_copyShortToLocal(ushort *p,ushort *realPtr)
-/****************************************************************************
-*
-* Function: VBE_copyShortToLocal
-* Parameters: p - Flat model buffer to copy to
-* realPtr - Real mode pointer to copy
-*
-* Description: Copies the mode table from real mode memory to the flat
-* model buffer.
-*
-****************************************************************************/
-{
- ushort *v;
-
- v = PM_mapRealPointer((uint)((ulong)realPtr >> 16),(uint)((ulong)realPtr & 0xFFFF));
- while (*v != 0xFFFF)
- *p++ = *v++;
- *p = 0xFFFF;
-}
-#endif
-
-int VBEAPI VBE_detectEXT(VBE_vgaInfo *vgaInfo,ibool forceUniVBE)
-/****************************************************************************
-*
-* Function: VBE_detect
-* Parameters: vgaInfo - Place to store the VGA information block
-* Returns: VBE version number, or 0 if not detected.
-*
-* Description: Detects if a VESA VBE is out there and functioning
-* correctly. If we detect a VBE interface we return the
-* VGAInfoBlock returned by the VBE and the VBE version number.
-*
-****************************************************************************/
-{
- RMREGS regs;
-
- regs.x.ax = 0x4F00; /* Get SuperVGA information */
- if (forceUniVBE) {
- regs.x.bx = 0x1234;
- regs.x.cx = 0x4321;
- }
- else {
- regs.x.bx = 0;
- regs.x.cx = 0;
- }
- strncpy(vgaInfo->VESASignature,"VBE2",4);
- VBE_callESDI(&regs, vgaInfo, sizeof(*vgaInfo));
- if (regs.x.ax != VBE_SUCCESS)
- return 0;
- if (strncmp(vgaInfo->VESASignature,"VESA",4) != 0)
- return 0;
-
- /* Check for bogus BIOSes that return a VBE version number that is
- * not correct, and fix it up. We also check the OemVendorNamePtr for a
- * valid value, and if it is invalid then we also reset to VBE 1.2.
- */
- if (vgaInfo->VESAVersion >= 0x200 && vgaInfo->OemVendorNamePtr == 0)
- vgaInfo->VESAVersion = 0x102;
-#ifndef REALMODE
- /* Relocate all the indirect information (mode tables, OEM strings
- * etc) from the low 1Mb memory region into a static buffer in
- * our default data segment. We do this to insulate the application
- * from mapping the strings from real mode to protected mode.
- */
- {
- char *p,*p2;
- p2 = VBE_copyStrToLocal(localBuf,vgaInfo->OemStringPtr,MAX_LOCAL_BUF);
- vgaInfo->OemStringPtr = localBuf;
- if (vgaInfo->VESAVersion >= 0x200) {
- p = VBE_copyStrToLocal(p2,vgaInfo->OemVendorNamePtr,MAX_LOCAL_BUF);
- vgaInfo->OemVendorNamePtr = p2;
- p2 = VBE_copyStrToLocal(p,vgaInfo->OemProductNamePtr,MAX_LOCAL_BUF);
- vgaInfo->OemProductNamePtr = p;
- p = VBE_copyStrToLocal(p2,vgaInfo->OemProductRevPtr,MAX_LOCAL_BUF);
- vgaInfo->OemProductRevPtr = p2;
- VBE_copyShortToLocal((ushort*)p,vgaInfo->VideoModePtr);
- vgaInfo->VideoModePtr = (ushort*)p;
- }
- else {
- VBE_copyShortToLocal((ushort*)p2,vgaInfo->VideoModePtr);
- vgaInfo->VideoModePtr = (ushort*)p2;
- }
- }
-#endif
- state->VBEMemory = vgaInfo->TotalMemory * 64;
-
- /* Check for Riva128 based cards since they have broken triple buffering
- * and stereo support.
- */
- haveRiva128 = false;
- if (vgaInfo->VESAVersion >= 0x300 &&
- (strstr(vgaInfo->OemStringPtr,"NVidia") != NULL ||
- strstr(vgaInfo->OemStringPtr,"Riva") != NULL)) {
- haveRiva128 = true;
- }
-
- /* Check for Matrox G400 cards which claim to be VBE 3.0
- * compliant yet they don't implement the refresh rate control
- * functions.
- */
- if (vgaInfo->VESAVersion >= 0x300 && (strcmp(vgaInfo->OemProductNamePtr,"Matrox G400") == 0))
- vgaInfo->VESAVersion = 0x200;
- return (state->VBEVersion = vgaInfo->VESAVersion);
-}
-
-int VBEAPI VBE_detect(VBE_vgaInfo *vgaInfo)
-/****************************************************************************
-*
-* Function: VBE_detect
-* Parameters: vgaInfo - Place to store the VGA information block
-* Returns: VBE version number, or 0 if not detected.
-*
-* Description: Detects if a VESA VBE is out there and functioning
-* correctly. If we detect a VBE interface we return the
-* VGAInfoBlock returned by the VBE and the VBE version number.
-*
-****************************************************************************/
-{
- return VBE_detectEXT(vgaInfo,false);
-}
-
-ibool VBEAPI VBE_getModeInfo(int mode,VBE_modeInfo *modeInfo)
-/****************************************************************************
-*
-* Function: VBE_getModeInfo
-* Parameters: mode - VBE mode to get information for
-* modeInfo - Place to store VBE mode information
-* Returns: True on success, false if function failed.
-*
-* Description: Obtains information about a specific video mode from the
-* VBE. You should use this function to find the video mode
-* you wish to set, as the new VBE 2.0 mode numbers may be
-* completely arbitrary.
-*
-****************************************************************************/
-{
- RMREGS regs;
- int bits;
-
- regs.x.ax = 0x4F01; /* Get mode information */
- regs.x.cx = (ushort)mode;
- VBE_callESDI(&regs, modeInfo, sizeof(*modeInfo));
- if (regs.x.ax != VBE_SUCCESS)
- return false;
- if ((modeInfo->ModeAttributes & vbeMdAvailable) == 0)
- return false;
-
- /* Map out triple buffer and stereo flags for NVidia Riva128
- * chips.
- */
- if (haveRiva128) {
- modeInfo->ModeAttributes &= ~vbeMdTripleBuf;
- modeInfo->ModeAttributes &= ~vbeMdStereo;
- }
-
- /* Support old style RGB definitions for VBE 1.1 BIOSes */
- bits = modeInfo->BitsPerPixel;
- if (modeInfo->MemoryModel == vbeMemPK && bits > 8) {
- modeInfo->MemoryModel = vbeMemRGB;
- switch (bits) {
- case 15:
- modeInfo->RedMaskSize = 5;
- modeInfo->RedFieldPosition = 10;
- modeInfo->GreenMaskSize = 5;
- modeInfo->GreenFieldPosition = 5;
- modeInfo->BlueMaskSize = 5;
- modeInfo->BlueFieldPosition = 0;
- modeInfo->RsvdMaskSize = 1;
- modeInfo->RsvdFieldPosition = 15;
- break;
- case 16:
- modeInfo->RedMaskSize = 5;
- modeInfo->RedFieldPosition = 11;
- modeInfo->GreenMaskSize = 5;
- modeInfo->GreenFieldPosition = 5;
- modeInfo->BlueMaskSize = 5;
- modeInfo->BlueFieldPosition = 0;
- modeInfo->RsvdMaskSize = 0;
- modeInfo->RsvdFieldPosition = 0;
- break;
- case 24:
- modeInfo->RedMaskSize = 8;
- modeInfo->RedFieldPosition = 16;
- modeInfo->GreenMaskSize = 8;
- modeInfo->GreenFieldPosition = 8;
- modeInfo->BlueMaskSize = 8;
- modeInfo->BlueFieldPosition = 0;
- modeInfo->RsvdMaskSize = 0;
- modeInfo->RsvdFieldPosition = 0;
- break;
- }
- }
-
- /* Convert the 32k direct color modes of VBE 1.2+ BIOSes to
- * be recognised as 15 bits per pixel modes.
- */
- if (bits == 16 && modeInfo->RsvdMaskSize == 1)
- modeInfo->BitsPerPixel = 15;
-
- /* Fix up bogus BIOS'es that report incorrect reserved pixel masks
- * for 32K color modes. Quite a number of BIOS'es have this problem,
- * and this affects our OS/2 drivers in VBE fallback mode.
- */
- if (bits == 15 && (modeInfo->RsvdMaskSize != 1 || modeInfo->RsvdFieldPosition != 15)) {
- modeInfo->RsvdMaskSize = 1;
- modeInfo->RsvdFieldPosition = 15;
- }
- return true;
-}
-
-long VBEAPI VBE_getPageSize(VBE_modeInfo *mi)
-/****************************************************************************
-*
-* Function: VBE_getPageSize
-* Parameters: mi - Pointer to mode information block
-* Returns: Caculated page size in bytes rounded to correct boundary
-*
-* Description: Computes the page size in bytes for the specified mode
-* information block, rounded up to the appropriate boundary
-* (8k, 16k, 32k or 64k). Pages >= 64k in size are always
-* rounded to the nearest 64k boundary (so the start of a
-* page is always bank aligned).
-*
-****************************************************************************/
-{
- long size;
-
- size = (long)mi->BytesPerScanLine * (long)mi->YResolution;
- if (mi->BitsPerPixel == 4) {
- /* We have a 16 color video mode, so round up the page size to
- * 8k, 16k, 32k or 64k boundaries depending on how large it is.
- */
-
- size = (size + 0x1FFFL) & 0xFFFFE000L;
- if (size != 0x2000) {
- size = (size + 0x3FFFL) & 0xFFFFC000L;
- if (size != 0x4000) {
- size = (size + 0x7FFFL) & 0xFFFF8000L;
- if (size != 0x8000)
- size = (size + 0xFFFFL) & 0xFFFF0000L;
- }
- }
- }
- else size = (size + 0xFFFFL) & 0xFFFF0000L;
- return size;
-}
-
-ibool VBEAPI VBE_setVideoModeExt(int mode,VBE_CRTCInfo *crtc)
-/****************************************************************************
-*
-* Function: VBE_setVideoModeExt
-* Parameters: mode - SuperVGA video mode to set.
-* Returns: True if the mode was set, false if not.
-*
-* Description: Attempts to set the specified video mode. This version
-* includes support for the VBE/Core 3.0 refresh rate control
-* mechanism.
-*
-****************************************************************************/
-{
- RMREGS regs;
-
- if (state->VBEVersion < 0x200 && mode < 0x100) {
- /* Some VBE implementations barf terribly if you try to set non-VBE
- * video modes with the VBE set mode call. VBE 2.0 implementations
- * must be able to handle this.
- */
- regs.h.al = (ushort)mode;
- regs.h.ah = 0;
- PM_int86(0x10,&regs,&regs);
- }
- else {
- if (state->VBEVersion < 0x300 && (mode & vbeRefreshCtrl))
- return false;
- regs.x.ax = 0x4F02;
- regs.x.bx = (ushort)mode;
- if ((mode & vbeRefreshCtrl) && crtc)
- VBE_callESDI(&regs, crtc, sizeof(*crtc));
- else
- PM_int86(0x10,&regs,&regs);
- if (regs.x.ax != VBE_SUCCESS)
- return false;
- }
- return true;
-}
-
-ibool VBEAPI VBE_setVideoMode(int mode)
-/****************************************************************************
-*
-* Function: VBE_setVideoMode
-* Parameters: mode - SuperVGA video mode to set.
-* Returns: True if the mode was set, false if not.
-*
-* Description: Attempts to set the specified video mode.
-*
-****************************************************************************/
-{
- return VBE_setVideoModeExt(mode,NULL);
-}
-
-int VBEAPI VBE_getVideoMode(void)
-/****************************************************************************
-*
-* Function: VBE_getVideoMode
-* Returns: Current video mode
-*
-****************************************************************************/
-{
- RMREGS regs;
-
- regs.x.ax = 0x4F03;
- PM_int86(0x10,&regs,&regs);
- if (regs.x.ax != VBE_SUCCESS)
- return -1;
- return regs.x.bx;
-}
-
-ibool VBEAPI VBE_setBank(int window,int bank)
-/****************************************************************************
-*
-* Function: VBE_setBank
-* Parameters: window - Window to set
-* bank - Bank number to set window to
-* Returns: True on success, false on failure.
-*
-****************************************************************************/
-{
- RMREGS regs;
-
- regs.x.ax = 0x4F05;
- regs.h.bh = 0;
- regs.h.bl = window;
- regs.x.dx = bank;
- PM_int86(0x10,&regs,&regs);
- return regs.x.ax == VBE_SUCCESS;
-}
-
-int VBEAPI VBE_getBank(int window)
-/****************************************************************************
-*
-* Function: VBE_setBank
-* Parameters: window - Window to read
-* Returns: Bank number for the window (-1 on failure)
-*
-****************************************************************************/
-{
- RMREGS regs;
-
- regs.x.ax = 0x4F05;
- regs.h.bh = 1;
- regs.h.bl = window;
- PM_int86(0x10,&regs,&regs);
- if (regs.x.ax != VBE_SUCCESS)
- return -1;
- return regs.x.dx;
-}
-
-ibool VBEAPI VBE_setPixelsPerLine(int pixelsPerLine,int *newBytes,
- int *newPixels,int *maxScanlines)
-/****************************************************************************
-*
-* Function: VBE_setPixelsPerLine
-* Parameters: pixelsPerLine - Pixels per scanline
-* newBytes - Storage for bytes per line value set
-* newPixels - Storage for pixels per line value set
-* maxScanLines - Storage for maximum number of scanlines
-* Returns: True on success, false on failure
-*
-* Description: Sets the scanline length for the video mode to the specified
-* number of pixels per scanline. If you need more granularity
-* in TrueColor modes, use the VBE_setBytesPerLine routine
-* (only valid for VBE 2.0).
-*
-****************************************************************************/
-{
- RMREGS regs;
-
- regs.x.ax = 0x4F06;
- regs.h.bl = 0;
- regs.x.cx = pixelsPerLine;
- PM_int86(0x10,&regs,&regs);
- *newBytes = regs.x.bx;
- *newPixels = regs.x.cx;
- *maxScanlines = regs.x.dx;
- return regs.x.ax == VBE_SUCCESS;
-}
-
-ibool VBEAPI VBE_setBytesPerLine(int bytesPerLine,int *newBytes,
- int *newPixels,int *maxScanlines)
-/****************************************************************************
-*
-* Function: VBE_setBytesPerLine
-* Parameters: pixelsPerLine - Pixels per scanline
-* newBytes - Storage for bytes per line value set
-* newPixels - Storage for pixels per line value set
-* maxScanLines - Storage for maximum number of scanlines
-* Returns: True on success, false on failure
-*
-* Description: Sets the scanline length for the video mode to the specified
-* number of bytes per scanline (valid for VBE 2.0 only).
-*
-****************************************************************************/
-{
- RMREGS regs;
-
- regs.x.ax = 0x4F06;
- regs.h.bl = 2;
- regs.x.cx = bytesPerLine;
- PM_int86(0x10,&regs,&regs);
- *newBytes = regs.x.bx;
- *newPixels = regs.x.cx;
- *maxScanlines = regs.x.dx;
- return regs.x.ax == VBE_SUCCESS;
-}
-
-ibool VBEAPI VBE_getScanlineLength(int *bytesPerLine,int *pixelsPerLine,
- int *maxScanlines)
-/****************************************************************************
-*
-* Function: VBE_getScanlineLength
-* Parameters: bytesPerLine - Storage for bytes per scanline
-* pixelsPerLine - Storage for pixels per scanline
-* maxScanLines - Storage for maximum number of scanlines
-* Returns: True on success, false on failure
-*
-****************************************************************************/
-{
- RMREGS regs;
-
- regs.x.ax = 0x4F06;
- regs.h.bl = 1;
- PM_int86(0x10,&regs,&regs);
- *bytesPerLine = regs.x.bx;
- *pixelsPerLine = regs.x.cx;
- *maxScanlines = regs.x.dx;
- return regs.x.ax == VBE_SUCCESS;
-}
-
-ibool VBEAPI VBE_getMaxScanlineLength(int *maxBytes,int *maxPixels)
-/****************************************************************************
-*
-* Function: VBE_getMaxScanlineLength
-* Parameters: maxBytes - Maximum scanline width in bytes
-* maxPixels - Maximum scanline width in pixels
-* Returns: True if successful, false if function failed
-*
-****************************************************************************/
-{
- RMREGS regs;
-
- regs.x.ax = 0x4F06;
- regs.h.bl = 3;
- PM_int86(0x10,&regs,&regs);
- *maxBytes = regs.x.bx;
- *maxPixels = regs.x.cx;
- return regs.x.ax == VBE_SUCCESS;
-}
-
-ibool VBEAPI VBE_setDisplayStart(int x,int y,ibool waitVRT)
-/****************************************************************************
-*
-* Function: VBE_setDisplayStart
-* Parameters: x,y - Position of the first pixel to display
-* waitVRT - True to wait for retrace, false if not
-* Returns: True if function was successful.
-*
-* Description: Sets the new starting display position to implement
-* hardware scrolling.
-*
-****************************************************************************/
-{
- RMREGS regs;
-
- regs.x.ax = 0x4F07;
- if (waitVRT)
- regs.x.bx = 0x80;
- else regs.x.bx = 0x00;
- regs.x.cx = x;
- regs.x.dx = y;
- PM_int86(0x10,&regs,&regs);
- return regs.x.ax == VBE_SUCCESS;
-}
-
-ibool VBEAPI VBE_getDisplayStart(int *x,int *y)
-/****************************************************************************
-*
-* Function: VBE_getDisplayStart
-* Parameters: x,y - Place to store starting address value
-* Returns: True if function was successful.
-*
-****************************************************************************/
-{
- RMREGS regs;
-
- regs.x.ax = 0x4F07;
- regs.x.bx = 0x01;
- PM_int86(0x10,&regs,&regs);
- *x = regs.x.cx;
- *y = regs.x.dx;
- return regs.x.ax == VBE_SUCCESS;
-}
-
-ibool VBEAPI VBE_setDisplayStartAlt(ulong startAddr,ibool waitVRT)
-/****************************************************************************
-*
-* Function: VBE_setDisplayStartAlt
-* Parameters: startAddr - 32-bit starting address in display memory
-* waitVRT - True to wait for vertical retrace, false if not
-* Returns: True if function was successful, false if not supported.
-*
-* Description: Sets the new starting display position to the specified
-* 32-bit display start address. Note that this function is
-* different the the version above, since it takes a 32-bit
-* byte offset in video memory as the starting address which
-* gives the programmer maximum control over the stat address.
-*
-* NOTE: Requires VBE/Core 3.0
-*
-****************************************************************************/
-{
- RMREGS regs;
-
- if (state->VBEVersion >= 0x300) {
- regs.x.ax = 0x4F07;
- regs.x.bx = waitVRT ? 0x82 : 0x02;
- regs.e.ecx = startAddr;
- PM_int86(0x10,&regs,&regs);
- return regs.x.ax == VBE_SUCCESS;
- }
- return false;
-}
-
-int VBEAPI VBE_getDisplayStartStatus(void)
-/****************************************************************************
-*
-* Function: VBE_getDisplayStartStatus
-* Returns: 0 if last flip not occurred, 1 if already flipped
-* -1 if not supported
-*
-* Description: Returns the status of the previous display start request.
-* If this function is supported the programmer can implement
-* hardware triple buffering using this function.
-*
-* NOTE: Requires VBE/Core 3.0
-*
-****************************************************************************/
-{
- RMREGS regs;
-
- if (state->VBEVersion >= 0x300) {
- regs.x.ax = 0x4F07;
- regs.x.bx = 0x0004;
- PM_int86(0x10,&regs,&regs);
- if (regs.x.ax == VBE_SUCCESS)
- return (regs.x.cx != 0);
- }
- return -1;
-}
-
-ibool VBEAPI VBE_enableStereoMode(void)
-/****************************************************************************
-*
-* Function: VBE_enableStereoMode
-* Returns: True if stereo mode enabled, false if not supported.
-*
-* Description: Puts the system into hardware stereo mode for LC shutter
-* glasses, where the display swaps between two display start
-* addresses every vertical retrace.
-*
-* NOTE: Requires VBE/Core 3.0
-*
-****************************************************************************/
-{
- RMREGS regs;
-
- if (state->VBEVersion >= 0x300) {
- regs.x.ax = 0x4F07;
- regs.x.bx = 0x0005;
- PM_int86(0x10,&regs,&regs);
- return regs.x.ax == VBE_SUCCESS;
- }
- return false;
-}
-
-ibool VBEAPI VBE_disableStereoMode(void)
-/****************************************************************************
-*
-* Function: VBE_disableStereoMode
-* Returns: True if stereo mode disabled, false if not supported.
-*
-* Description: Puts the system back into normal, non-stereo display mode
-* after having stereo mode enabled.
-*
-* NOTE: Requires VBE/Core 3.0
-*
-****************************************************************************/
-{
- RMREGS regs;
-
- if (state->VBEVersion >= 0x300) {
- regs.x.ax = 0x4F07;
- regs.x.bx = 0x0006;
- PM_int86(0x10,&regs,&regs);
- return regs.x.ax == VBE_SUCCESS;
- }
- return false;
-}
-
-ibool VBEAPI VBE_setStereoDisplayStart(ulong leftAddr,ulong rightAddr,
- ibool waitVRT)
-/****************************************************************************
-*
-* Function: VBE_setStereoDisplayStart
-* Parameters: leftAddr - 32-bit start address for left image
-* rightAddr - 32-bit start address for right image
-* waitVRT - True to wait for vertical retrace, false if not
-* Returns: True if function was successful, false if not supported.
-*
-* Description: Sets the new starting display position to the specified
-* 32-bit display start address. Note that this function is
-* different the the version above, since it takes a 32-bit
-* byte offset in video memory as the starting address which
-* gives the programmer maximum control over the stat address.
-*
-* NOTE: Requires VBE/Core 3.0
-*
-****************************************************************************/
-{
- RMREGS regs;
-
- if (state->VBEVersion >= 0x300) {
- regs.x.ax = 0x4F07;
- regs.x.bx = waitVRT ? 0x83 : 0x03;
- regs.e.ecx = leftAddr;
- regs.e.edx = rightAddr;
- PM_int86(0x10,&regs,&regs);
- return regs.x.ax == VBE_SUCCESS;
- }
- return false;
-}
-
-ulong VBEAPI VBE_getClosestClock(ushort mode,ulong pixelClock)
-/****************************************************************************
-*
-* Function: VBE_getClosestClock
-* Parameters: mode - VBE mode to be used (include vbeLinearBuffer)
-* pixelClock - Desired pixel clock
-* Returns: Closest pixel clock to desired clock (-1 if not supported)
-*
-* Description: Calls the VBE/Core 3.0 interface to determine the closest
-* pixel clock to the requested value. The BIOS will always
-* search for a pixel clock that is no more than 1% below the
-* requested clock or somewhere higher than the clock. If the
-* clock is higher note that it may well be many Mhz higher
-* that requested and the application will have to check that
-* the returned value is suitable for it's needs. This function
-* returns the actual pixel clock that will be programmed by
-* the hardware.
-*
-* Note that if the pixel clock will be used with a linear
-* framebuffer mode, make sure you pass in the linear
-* framebuffer flag to this function.
-*
-* NOTE: Requires VBE/Core 3.0
-*
-****************************************************************************/
-{
- RMREGS regs;
-
- if (state->VBEVersion >= 0x300) {
- regs.x.ax = 0x4F0B;
- regs.h.bl = 0x00;
- regs.e.ecx = pixelClock;
- regs.x.dx = mode;
- PM_int86(0x10,&regs,&regs);
- if (regs.x.ax == VBE_SUCCESS)
- return regs.e.ecx;
- }
- return -1;
-}
-
-ibool VBEAPI VBE_setDACWidth(int width)
-/****************************************************************************
-*
-* Function: VBE_setDACWidth
-* Parameters: width - Width to set the DAC to
-* Returns: True on success, false on failure
-*
-****************************************************************************/
-{
- RMREGS regs;
-
- regs.x.ax = 0x4F08;
- regs.h.bl = 0x00;
- regs.h.bh = width;
- PM_int86(0x10,&regs,&regs);
- return regs.x.ax == VBE_SUCCESS;
-}
-
-int VBEAPI VBE_getDACWidth(void)
-/****************************************************************************
-*
-* Function: VBE_getDACWidth
-* Returns: Current width of the palette DAC
-*
-****************************************************************************/
-{
- RMREGS regs;
-
- regs.x.ax = 0x4F08;
- regs.h.bl = 0x01;
- PM_int86(0x10,&regs,&regs);
- if (regs.x.ax != VBE_SUCCESS)
- return -1;
- return regs.h.bh;
-}
-
-ibool VBEAPI VBE_setPalette(int start,int num,VBE_palette *pal,ibool waitVRT)
-/****************************************************************************
-*
-* Function: VBE_setPalette
-* Parameters: start - Starting palette index to program
-* num - Number of palette indexes to program
-* pal - Palette buffer containing values
-* waitVRT - Wait for vertical retrace flag
-* Returns: True on success, false on failure
-*
-* Description: Sets a block of palette registers by calling the VBE 2.0
-* BIOS. This function will fail on VBE 1.2 implementations.
-*
-****************************************************************************/
-{
- RMREGS regs;
-
- regs.x.ax = 0x4F09;
- regs.h.bl = waitVRT ? 0x80 : 0x00;
- regs.x.cx = num;
- regs.x.dx = start;
- VBE_callESDI(&regs, pal, sizeof(VBE_palette) * num);
- return regs.x.ax == VBE_SUCCESS;
-}
-
-void * VBEAPI VBE_getBankedPointer(VBE_modeInfo *modeInfo)
-/****************************************************************************
-*
-* Function: VBE_getBankedPointer
-* Parameters: modeInfo - Mode info block for video mode
-* Returns: Selector to the linear framebuffer (0 on failure)
-*
-* Description: Returns a near pointer to the VGA framebuffer area.
-*
-****************************************************************************/
-{
- /* We just map the pointer every time, since the pointer will always
- * be in real mode memory, so we wont actually be mapping any real
- * memory.
- *
- * NOTE: We cannot currently map a near pointer to the banked frame
- * buffer for Watcom Win386, so we create a 16:16 far pointer to
- * the video memory. All the assembler code will render to the
- * video memory by loading the selector rather than using a
- * near pointer.
- */
- ulong seg = (ushort)modeInfo->WinASegment;
- if (seg != 0) {
- if (seg == 0xA000)
- return (void*)PM_getA0000Pointer();
- else
- return (void*)PM_mapPhysicalAddr(seg << 4,0xFFFF,true);
- }
- return NULL;
-}
-
-#ifndef REALMODE
-
-void * VBEAPI VBE_getLinearPointer(VBE_modeInfo *modeInfo)
-/****************************************************************************
-*
-* Function: VBE_getLinearPointer
-* Parameters: modeInfo - Mode info block for video mode
-* Returns: Selector to the linear framebuffer (0 on failure)
-*
-* Description: Returns a near pointer to the linear framebuffer for the video
-* mode.
-*
-****************************************************************************/
-{
- static ulong physPtr[MAX_LIN_PTRS] = {0};
- static void *linPtr[MAX_LIN_PTRS] = {0};
- static int numPtrs = 0;
- int i;
-
- /* Search for an already mapped pointer */
- for (i = 0; i < numPtrs; i++) {
- if (physPtr[i] == modeInfo->PhysBasePtr)
- return linPtr[i];
- }
- if (numPtrs < MAX_LIN_PTRS) {
- physPtr[numPtrs] = modeInfo->PhysBasePtr;
- linPtr[numPtrs] = PM_mapPhysicalAddr(modeInfo->PhysBasePtr,(state->VBEMemory * 1024L)-1,true);
- return linPtr[numPtrs++];
- }
- return NULL;
-}
-
-static void InitPMCode(void)
-/****************************************************************************
-*
-* Function: InitPMCode - 32 bit protected mode version
-*
-* Description: Finds the address of and relocates the protected mode
-* code block from the VBE 2.0 into a local memory block. The
-* memory block is allocated with malloc() and must be freed
-* with VBE_freePMCode() after graphics processing is complete.
-*
-* Note that this buffer _must_ be recopied after each mode set,
-* as the routines will change depending on the underlying
-* video mode.
-*
-****************************************************************************/
-{
- RMREGS regs;
- RMSREGS sregs;
- uchar *code;
- int pmLen;
-
- if (!state->pmInfo && state->VBEVersion >= 0x200) {
- regs.x.ax = 0x4F0A;
- regs.x.bx = 0;
- PM_int86x(0x10,&regs,&regs,&sregs);
- if (regs.x.ax != VBE_SUCCESS)
- return;
- if (VBE_shared)
- state->pmInfo = PM_mallocShared(regs.x.cx);
- else
- state->pmInfo = PM_malloc(regs.x.cx);
- if (state->pmInfo == NULL)
- return;
- state->pmInfo32 = state->pmInfo;
- pmLen = regs.x.cx;
-
- /* Relocate the block into our local data segment */
- code = PM_mapRealPointer(sregs.es,regs.x.di);
- memcpy(state->pmInfo,code,pmLen);
-
- /* Now do a sanity check on the information we recieve to ensure
- * that is is correct. Some BIOS return totally bogus information
- * in here (Matrox is one)! Under DOS this works OK, but under OS/2
- * we are screwed.
- */
- if (state->pmInfo->setWindow >= pmLen ||
- state->pmInfo->setDisplayStart >= pmLen ||
- state->pmInfo->setPalette >= pmLen ||
- state->pmInfo->IOPrivInfo >= pmLen) {
- if (VBE_shared)
- PM_freeShared(state->pmInfo);
- else
- PM_free(state->pmInfo);
- state->pmInfo32 = state->pmInfo = NULL;
- return;
- }
-
- /* Read the IO priveledge info and determine if we need to
- * pass a selector to MMIO registers to the bank switch code.
- * Since we no longer support selector allocation, we no longer
- * support this mechanism so we disable the protected mode
- * interface in this case.
- */
- if (state->pmInfo->IOPrivInfo && !state->MMIOSel) {
- ushort *p = (ushort*)((uchar*)state->pmInfo + state->pmInfo->IOPrivInfo);
- while (*p != 0xFFFF)
- p++;
- p++;
- if (*p != 0xFFFF)
- VBE_freePMCode();
- }
- }
-}
-
-void * VBEAPI VBE_getSetBank(void)
-/****************************************************************************
-*
-* Function: VBE_getSetBank
-* Returns: Pointer to the 32 VBE 2.0 bit bank switching routine.
-*
-****************************************************************************/
-{
- if (state->VBEVersion >= 0x200) {
- InitPMCode();
- if (state->pmInfo)
- return (uchar*)state->pmInfo + state->pmInfo->setWindow;
- }
- return NULL;
-}
-
-void * VBEAPI VBE_getSetDisplayStart(void)
-/****************************************************************************
-*
-* Function: VBE_getSetDisplayStart
-* Returns: Pointer to the 32 VBE 2.0 bit CRT start address routine.
-*
-****************************************************************************/
-{
- if (state->VBEVersion >= 0x200) {
- InitPMCode();
- if (state->pmInfo)
- return (uchar*)state->pmInfo + state->pmInfo->setDisplayStart;
- }
- return NULL;
-}
-
-void * VBEAPI VBE_getSetPalette(void)
-/****************************************************************************
-*
-* Function: VBE_getSetPalette
-* Returns: Pointer to the 32 VBE 2.0 bit palette programming routine.
-*
-****************************************************************************/
-{
- if (state->VBEVersion >= 0x200) {
- InitPMCode();
- if (state->pmInfo)
- return (uchar*)state->pmInfo + state->pmInfo->setPalette;
- }
- return NULL;
-}
-
-void VBEAPI VBE_freePMCode(void)
-/****************************************************************************
-*
-* Function: VBE_freePMCode
-*
-* Description: This routine frees the protected mode code blocks that
-* we copied from the VBE 2.0 interface. This routine must
-* be after you have finished graphics processing to free up
-* the memory occupied by the routines. This is necessary
-* because the PM info memory block must be re-copied after
-* every video mode set from the VBE 2.0 implementation.
-*
-****************************************************************************/
-{
- if (state->pmInfo) {
- if (VBE_shared)
- PM_freeShared(state->pmInfo);
- else
- PM_free(state->pmInfo);
- state->pmInfo = NULL;
- state->pmInfo32 = NULL;
- }
-}
-
-void VBEAPI VBE_sharePMCode(void)
-/****************************************************************************
-*
-* Function: VBE_sharePMCode
-*
-* Description: Enables internal sharing of the PM code buffer for OS/2.
-*
-****************************************************************************/
-{
- VBE_shared = true;
-}
-
-/* Set of code stubs used to build the final bank switch code */
-
-#define VBE20_adjustOffset 7
-
-static uchar VBE20A_bankFunc32_Start[] = {
- 0x53,0x51, /* push ebx,ecx */
- 0x8B,0xD0, /* mov edx,eax */
- 0x33,0xDB, /* xor ebx,ebx */
- 0xB1,0x00, /* mov cl,0 */
- 0xD2,0xE2, /* shl dl,cl */
- };
-
-static uchar VBE20_bankFunc32_End[] = {
- 0x59,0x5B, /* pop ecx,ebx */
- };
-
-static uchar bankFunc32[100];
-
-#define copy(p,b,a) memcpy(b,a,sizeof(a)); (p) = (b) + sizeof(a)
-
-ibool VBEAPI VBE_getBankFunc32(int *codeLen,void **bankFunc,int dualBanks,
- int bankAdjust)
-/****************************************************************************
-*
-* Function: VBE_getBankFunc32
-* Parameters: codeLen - Place to store length of code
-* bankFunc - Place to store pointer to bank switch code
-* dualBanks - True if dual banks are in effect
-* bankAdjust - Bank shift adjustment factor
-* Returns: True on success, false if not compatible.
-*
-* Description: Creates a local 32 bit bank switch function from the
-* VBE 2.0 bank switch code that is compatible with the
-* virtual flat framebuffer devices (does not have a return
-* instruction at the end and takes the bank number in EAX
-* not EDX). Note that this 32 bit code cannot include int 10h
-* instructions, so we can only do this if we have VBE 2.0
-* or later.
-*
-* Note that we need to know the length of the 32 bit
-* bank switch function, which the standard VBE 2.0 spec
-* does not provide. In order to support this we have
-* extended the VBE 2.0 state->pmInfo structure in UniVBE 5.2 in a
-* way to support this, and we hope that this will become
-* a VBE 2.0 ammendment.
-*
-* Note also that we cannot run the linear framebuffer
-* emulation code with bank switching routines that require
-* a selector to the memory mapped registers passed in ES.
-*
-****************************************************************************/
-{
- int len;
- uchar *code;
- uchar *p;
-
- InitPMCode();
- if (state->VBEVersion >= 0x200 && state->pmInfo32 && !state->MMIOSel) {
- code = (uchar*)state->pmInfo32 + state->pmInfo32->setWindow;
- if (state->pmInfo32->extensionSig == VBE20_EXT_SIG)
- len = state->pmInfo32->setWindowLen-1;
- else {
- /* We are running on a system without the UniVBE 5.2 extension.
- * We do as best we can by scanning through the code for the
- * ret function to determine the length. This is not foolproof,
- * but is the best we can do.
- */
- p = code;
- while (*p != 0xC3)
- p++;
- len = p - code;
- }
- if ((len + sizeof(VBE20A_bankFunc32_Start) + sizeof(VBE20_bankFunc32_End)) > sizeof(bankFunc32))
- PM_fatalError("32-bit bank switch function too long!");
- copy(p,bankFunc32,VBE20A_bankFunc32_Start);
- memcpy(p,code,len);
- p += len;
- copy(p,p,VBE20_bankFunc32_End);
- *codeLen = p - bankFunc32;
- bankFunc32[VBE20_adjustOffset] = (uchar)bankAdjust;
- *bankFunc = bankFunc32;
- return true;
- }
- return false;
-}
-
-#endif
diff --git a/board/MAI/bios_emulator/scitech/src/pm/beos/cpuinfo.c b/board/MAI/bios_emulator/scitech/src/pm/beos/cpuinfo.c
deleted file mode 100644
index cb3afe20c1..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/beos/cpuinfo.c
+++ /dev/null
@@ -1,80 +0,0 @@
-/****************************************************************************
-*
-* Ultra Long Period Timer
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: *** TODO: ADD YOUR OS ENVIRONMENT NAME HERE ***
-*
-* Description: Module to implement OS specific services to measure the
-* CPU frequency.
-*
-****************************************************************************/
-
-#include <OS.h>
-
-/*----------------------------- Implementation ----------------------------*/
-
-/****************************************************************************
-REMARKS:
-Increase the thread priority to maximum, if possible.
-****************************************************************************/
-static int SetMaxThreadPriority(void)
-{
- thread_id thid = find_thread(NULL);
- thread_info tinfo;
- get_thread_info(thid, &tinfo);
- set_thread_priority(thid, B_REAL_TIME_PRIORITY);
- return tinfo.priority;
-}
-
-/****************************************************************************
-REMARKS:
-Restore the original thread priority.
-****************************************************************************/
-static void RestoreThreadPriority(
- int priority)
-{
- thread_id thid = find_thread(NULL);
- set_thread_priority(thid, priority);
-}
-
-/****************************************************************************
-REMARKS:
-Initialise the counter and return the frequency of the counter.
-****************************************************************************/
-static void GetCounterFrequency(
- CPU_largeInteger *freq)
-{
- /* TODO: Return the frequency of the counter in here. You should try to */
- /* normalise this value to be around 100,000 ticks per second. */
- freq->low = 1000000;
- freq->high = 0;
-}
-
-/****************************************************************************
-REMARKS:
-Read the counter and return the counter value.
-
-TODO: Implement this to read the counter. It should be done as a macro
- for accuracy.
-****************************************************************************/
-#define GetCounter(t) { *((bigtime_t*) t) = system_time(); }
diff --git a/board/MAI/bios_emulator/scitech/src/pm/beos/event.c b/board/MAI/bios_emulator/scitech/src/pm/beos/event.c
deleted file mode 100644
index 93c6c0a8fc..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/beos/event.c
+++ /dev/null
@@ -1,199 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: BeOS
-*
-* Description: BeOS implementation for the SciTech cross platform
-* event library.
-*
-****************************************************************************/
-
-/*---------------------------- Global Variables ---------------------------*/
-
-static ushort keyUpMsg[256] = {0};/* Table of key up messages */
-static int rangeX,rangeY; /* Range of mouse coordinates */
-
-/*---------------------------- Implementation -----------------------------*/
-
-/* These are not used under non-DOS systems */
-#define _EVT_disableInt() 1
-#define _EVT_restoreInt(flags)
-
-/****************************************************************************
-PARAMETERS:
-scanCode - Scan code to test
-
-REMARKS:
-This macro determines if a specified key is currently down at the
-time that the call is made.
-****************************************************************************/
-#define _EVT_isKeyDown(scanCode) (keyUpMsg[scanCode] != 0)
-
-/****************************************************************************
-REMARKS:
-This function is used to return the number of ticks since system
-startup in milliseconds. This should be the same value that is placed into
-the time stamp fields of events, and is used to implement auto mouse down
-events.
-****************************************************************************/
-ulong _EVT_getTicks(void)
-{
- /* TODO: Implement this for your OS! */
-}
-
-/****************************************************************************
-REMARKS:
-Pumps all messages in the application message queue into our event queue.
-****************************************************************************/
-static void _EVT_pumpMessages(void)
-{
- /* TODO: The purpose of this function is to read all keyboard and mouse */
- /* events from the OS specific event queue, translate them and post */
- /* them into the SciTech event queue. */
- /* */
- /* NOTE: There are a couple of important things that this function must */
- /* take care of: */
- /* */
- /* 1. Support for KEYDOWN, KEYREPEAT and KEYUP is required. */
- /* */
- /* 2. Support for reading hardware scan code as well as ASCII */
- /* translated values is required. Games use the scan codes rather */
- /* than ASCII values. Scan codes go into the high order byte of the */
- /* keyboard message field. */
- /* */
- /* 3. Support for at least reading mouse motion data (mickeys) from the */
- /* mouse is required. Using the mickey values, we can then translate */
- /* to mouse cursor coordinates scaled to the range of the current */
- /* graphics display mode. Mouse values are scaled based on the */
- /* global 'rangeX' and 'rangeY'. */
- /* */
- /* 4. Support for a timestamp for the events is required, which is */
- /* defined as the number of milliseconds since some event (usually */
- /* system startup). This is the timestamp when the event occurred */
- /* (ie: at interrupt time) not when it was stuff into the SciTech */
- /* event queue. */
- /* */
- /* 5. Support for mouse double click events. If the OS has a native */
- /* mechanism to determine this, it should be used. Otherwise the */
- /* time stamp information will be used by the generic event code */
- /* to generate double click events. */
-}
-
-/****************************************************************************
-REMARKS:
-This macro/function is used to converts the scan codes reported by the
-keyboard to our event libraries normalised format. We only have one scan
-code for the 'A' key, and use shift modifiers to determine if it is a
-Ctrl-F1, Alt-F1 etc. The raw scan codes from the keyboard work this way,
-but the OS gives us 'cooked' scan codes, we have to translate them back
-to the raw format.
-****************************************************************************/
-#define _EVT_maskKeyCode(evt)
-
-/****************************************************************************
-REMARKS:
-Safely abort the event module upon catching a fatal error.
-****************************************************************************/
-void _EVT_abort()
-{
- EVT_exit();
- PM_fatalError("Unhandled exception!");
-}
-
-/****************************************************************************
-PARAMETERS:
-mouseMove - Callback function to call wheneve the mouse needs to be moved
-
-REMARKS:
-Initiliase the event handling module. Here we install our mouse handling ISR
-to be called whenever any button's are pressed or released. We also build
-the free list of events in the event queue.
-
-We use handler number 2 of the mouse libraries interrupt handlers for our
-event handling routines.
-****************************************************************************/
-void EVTAPI EVT_init(
- _EVT_mouseMoveHandler mouseMove)
-{
- /* Initialise the event queue */
- _mouseMove = mouseMove;
- initEventQueue();
- memset(keyUpMsg,0,sizeof(keyUpMsg));
-
- /* TODO: Do any OS specific initialisation here */
-
- /* Catch program termination signals so we can clean up properly */
- signal(SIGABRT, _EVT_abort);
- signal(SIGFPE, _EVT_abort);
- signal(SIGINT, _EVT_abort);
-}
-
-/****************************************************************************
-REMARKS
-Changes the range of coordinates returned by the mouse functions to the
-specified range of values. This is used when changing between graphics
-modes set the range of mouse coordinates for the new display mode.
-****************************************************************************/
-void EVTAPI EVT_setMouseRange(
- int xRes,
- int yRes)
-{
- rangeX = xRes;
- rangeY = yRes;
-}
-
-/****************************************************************************
-REMARKS:
-Initiailises the internal event handling modules. The EVT_suspend function
-can be called to suspend event handling (such as when shelling out to DOS),
-and this function can be used to resume it again later.
-****************************************************************************/
-void EVT_resume(void)
-{
- /* Do nothing for non DOS systems */
-}
-
-/****************************************************************************
-REMARKS
-Suspends all of our event handling operations. This is also used to
-de-install the event handling code.
-****************************************************************************/
-void EVT_suspend(void)
-{
- /* Do nothing for non DOS systems */
-}
-
-/****************************************************************************
-REMARKS
-Exits the event module for program terminatation.
-****************************************************************************/
-void EVT_exit(void)
-{
- /* Restore signal handlers */
- signal(SIGABRT, SIG_DFL);
- signal(SIGFPE, SIG_DFL);
- signal(SIGINT, SIG_DFL);
-
- /* TODO: Do any OS specific cleanup in here */
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/beos/oshdr.h b/board/MAI/bios_emulator/scitech/src/pm/beos/oshdr.h
deleted file mode 100644
index 043d73ecd1..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/beos/oshdr.h
+++ /dev/null
@@ -1,32 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: BeOS
-*
-* Description: Include file to include all OS specific header files.
-*
-****************************************************************************/
-
-/* This is where you include OS specific headers for the event handling */
-/* library. */
diff --git a/board/MAI/bios_emulator/scitech/src/pm/beos/pm.c b/board/MAI/bios_emulator/scitech/src/pm/beos/pm.c
deleted file mode 100644
index 2dcb1b81fb..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/beos/pm.c
+++ /dev/null
@@ -1,539 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: BeOS
-*
-* Description: Implementation for the OS Portability Manager Library, which
-* contains functions to implement OS specific services in a
-* generic, cross platform API. Porting the OS Portability
-* Manager library is the first step to porting any SciTech
-* products to a new platform.
-*
-****************************************************************************/
-
-#include "pmapi.h"
-#include "drvlib/os/os.h"
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-
-/* TODO: Include any BeOS specific headers here! */
-
-/*--------------------------- Global variables ----------------------------*/
-
-static void (PMAPIP fatalErrorCleanup)(void) = NULL;
-
-/*----------------------------- Implementation ----------------------------*/
-
-void PMAPI PM_init(void)
-{
- /* TODO: Do any initialisation in here. This includes getting IOPL */
- /* access for the process calling PM_init. This will get called */
- /* more than once. */
-
- /* TODO: If you support the supplied MTRR register stuff (you need to */
- /* be at ring 0 for this!), you should initialise it in here. */
-
-/* MTRR_init(); */
-}
-
-long PMAPI PM_getOSType(void)
-{ return _OS_BEOS; }
-
-int PMAPI PM_getModeType(void)
-{ return PM_386; }
-
-void PMAPI PM_backslash(char *s)
-{
- uint pos = strlen(s);
- if (s[pos-1] != '/') {
- s[pos] = '/';
- s[pos+1] = '\0';
- }
-}
-
-void PMAPI PM_setFatalErrorCleanup(
- void (PMAPIP cleanup)(void))
-{
- fatalErrorCleanup = cleanup;
-}
-
-void PMAPI PM_fatalError(const char *msg)
-{
- /* TODO: If you are running in a GUI environment without a console, */
- /* this needs to be changed to bring up a fatal error message */
- /* box and terminate the program. */
- if (fatalErrorCleanup)
- fatalErrorCleanup();
- fprintf(stderr,"%s\n", msg);
- exit(1);
-}
-
-void * PMAPI PM_getVESABuf(uint *len,uint *rseg,uint *roff)
-{
- /* No BIOS access for the BeOS */
- return NULL;
-}
-
-int PMAPI PM_kbhit(void)
-{
- /* TODO: This function checks if a key is available to be read. This */
- /* should be implemented, but is mostly used by the test programs */
- /* these days. */
- return true;
-}
-
-int PMAPI PM_getch(void)
-{
- /* TODO: This returns the ASCII code of the key pressed. This */
- /* should be implemented, but is mostly used by the test programs */
- /* these days. */
- return 0xD;
-}
-
-int PMAPI PM_openConsole(void)
-{
- /* TODO: Opens up a fullscreen console for graphics output. If your */
- /* console does not have graphics/text modes, this can be left */
- /* empty. The main purpose of this is to disable console switching */
- /* when in graphics modes if you can switch away from fullscreen */
- /* consoles (if you want to allow switching, this can be done */
- /* elsewhere with a full save/restore state of the graphics mode). */
- return 0;
-}
-
-int PMAPI PM_getConsoleStateSize(void)
-{
- /* TODO: Returns the size of the console state buffer used to save the */
- /* state of the console before going into graphics mode. This is */
- /* used to restore the console back to normal when we are done. */
- return 1;
-}
-
-void PMAPI PM_saveConsoleState(void *stateBuf,int console_id)
-{
- /* TODO: Saves the state of the console into the state buffer. This is */
- /* used to restore the console back to normal when we are done. */
- /* We will always restore 80x25 text mode after being in graphics */
- /* mode, so if restoring text mode is all you need to do this can */
- /* be left empty. */
-}
-
-void PMAPI PM_restoreConsoleState(const void *stateBuf,int console_id)
-{
- /* TODO: Restore the state of the console from the state buffer. This is */
- /* used to restore the console back to normal when we are done. */
- /* We will always restore 80x25 text mode after being in graphics */
- /* mode, so if restoring text mode is all you need to do this can */
- /* be left empty. */
-}
-
-void PMAPI PM_closeConsole(int console_id)
-{
- /* TODO: Close the console when we are done, going back to text mode. */
-}
-
-void PM_setOSCursorLocation(int x,int y)
-{
- /* TODO: Set the OS console cursor location to the new value. This is */
- /* generally used for new OS ports (used mostly for DOS). */
-}
-
-void PM_setOSScreenWidth(int width,int height)
-{
- /* TODO: Set the OS console screen width. This is generally unused for */
- /* new OS ports. */
-}
-
-ibool PMAPI PM_setRealTimeClockHandler(PM_intHandler ih, int frequency)
-{
- /* TODO: Install a real time clock interrupt handler. Normally this */
- /* will not be supported from most OS'es in user land, so an */
- /* alternative mechanism is needed to enable software stereo. */
- /* Hence leave this unimplemented unless you have a high priority */
- /* mechanism to call the 32-bit callback when the real time clock */
- /* interrupt fires. */
- return false;
-}
-
-void PMAPI PM_setRealTimeClockFrequency(int frequency)
-{
- /* TODO: Set the real time clock interrupt frequency. Used for stereo */
- /* LC shutter glasses when doing software stereo. Usually sets */
- /* the frequency to around 2048 Hz. */
-}
-
-void PMAPI PM_restoreRealTimeClockHandler(void)
-{
- /* TODO: Restores the real time clock handler. */
-}
-
-char * PMAPI PM_getCurrentPath(
- char *path,
- int maxLen)
-{
- return getcwd(path,maxLen);
-}
-
-char PMAPI PM_getBootDrive(void)
-{ return '/'; }
-
-const char * PMAPI PM_getVBEAFPath(void)
-{ return PM_getNucleusConfigPath(); }
-
-const char * PMAPI PM_getNucleusPath(void)
-{
- char *env = getenv("NUCLEUS_PATH");
- return env ? env : "/usr/lib/nucleus";
-}
-
-const char * PMAPI PM_getNucleusConfigPath(void)
-{
- static char path[256];
- strcpy(path,PM_getNucleusPath());
- PM_backslash(path);
- strcat(path,"config");
- return path;
-}
-
-const char * PMAPI PM_getUniqueID(void)
-{
- /* TODO: Return a unique ID for the machine. If a unique ID is not */
- /* available, return the machine name. */
- static char buf[128];
- gethostname(buf, 128);
- return buf;
-}
-
-const char * PMAPI PM_getMachineName(void)
-{
- /* TODO: Return the network machine name for the machine. */
- static char buf[128];
- gethostname(buf, 128);
- return buf;
-}
-
-void * PMAPI PM_getBIOSPointer(void)
-{
- /* No BIOS access on the BeOS */
- return NULL;
-}
-
-void * PMAPI PM_getA0000Pointer(void)
-{
- static void *bankPtr;
- if (!bankPtr)
- bankPtr = PM_mapPhysicalAddr(0xA0000,0xFFFF,true);
- return bankPtr;
-}
-
-void * PMAPI PM_mapPhysicalAddr(ulong base,ulong limit,ibool isCached)
-{
- /* TODO: This function maps a physical memory address to a linear */
- /* address in the address space of the calling process. */
-
- /* NOTE: This function *must* be able to handle any phsyical base */
- /* address, and hence you will have to handle rounding of */
- /* the physical base address to a page boundary (ie: 4Kb on */
- /* x86 CPU's) to be able to properly map in the memory */
- /* region. */
-
- /* NOTE: If possible the isCached bit should be used to ensure that */
- /* the PCD (Page Cache Disable) and PWT (Page Write Through) */
- /* bits are set to disable caching for a memory mapping used */
- /* for MMIO register access. We also disable caching using */
- /* the MTRR registers for Pentium Pro and later chipsets so if */
- /* MTRR support is enabled for your OS then you can safely ignore */
- /* the isCached flag and always enable caching in the page */
- /* tables. */
- return NULL;
-}
-
-void PMAPI PM_freePhysicalAddr(void *ptr,ulong limit)
-{
- /* TODO: This function will free a physical memory mapping previously */
- /* allocated with PM_mapPhysicalAddr() if at all possible. If */
- /* you can't free physical memory mappings, simply do nothing. */
-}
-
-ulong PMAPI PM_getPhysicalAddr(void *p)
-{
- /* TODO: This function should find the physical address of a linear */
- /* address. */
- return 0xFFFFFFFFUL;
-}
-
-void PMAPI PM_sleep(ulong milliseconds)
-{
- /* TODO: Put the process to sleep for milliseconds */
-}
-
-int PMAPI PM_getCOMPort(int port)
-{
- /* TODO: Re-code this to determine real values using the Plug and Play */
- /* manager for the OS. */
- switch (port) {
- case 0: return 0x3F8;
- case 1: return 0x2F8;
- }
- return 0;
-}
-
-int PMAPI PM_getLPTPort(int port)
-{
- /* TODO: Re-code this to determine real values using the Plug and Play */
- /* manager for the OS. */
- switch (port) {
- case 0: return 0x3BC;
- case 1: return 0x378;
- case 2: return 0x278;
- }
- return 0;
-}
-
-void * PMAPI PM_mallocShared(long size)
-{
- /* TODO: This is used to allocate memory that is shared between process */
- /* that all access the common Nucleus drivers via a common display */
- /* driver DLL. If your OS does not support shared memory (or if */
- /* the display driver does not need to allocate shared memory */
- /* for each process address space), this should just call PM_malloc. */
- return PM_malloc(size);
-}
-
-void PMAPI PM_freeShared(void *ptr)
-{
- /* TODO: Free the shared memory block. This will be called in the context */
- /* of the original calling process that allocated the shared */
- /* memory with PM_mallocShared. Simply call free if you do not */
- /* need this. */
- PM_free(ptr);
-}
-
-void * PMAPI PM_mapToProcess(void *base,ulong limit)
-{
- /* TODO: This function is used to map a physical memory mapping */
- /* previously allocated with PM_mapPhysicalAddr into the */
- /* address space of the calling process. If the memory mapping */
- /* allocated by PM_mapPhysicalAddr is global to all processes, */
- /* simply return the pointer. */
- return base;
-}
-
-void * PMAPI PM_mapRealPointer(uint r_seg,uint r_off)
-{
- /* No BIOS access on the BeOS */
- return NULL;
-}
-
-void * PMAPI PM_allocRealSeg(uint size,uint *r_seg,uint *r_off)
-{
- /* No BIOS access on the BeOS */
- return NULL;
-}
-
-void PMAPI PM_freeRealSeg(void *mem)
-{
- /* No BIOS access on the BeOS */
-}
-
-void PMAPI DPMI_int86(int intno, DPMI_regs *regs)
-{
- /* No BIOS access on the BeOS */
-}
-
-int PMAPI PM_int86(int intno, RMREGS *in, RMREGS *out)
-{
- /* No BIOS access on the BeOS */
- return 0;
-}
-
-int PMAPI PM_int86x(int intno, RMREGS *in, RMREGS *out,
- RMSREGS *sregs)
-{
- /* No BIOS access on the BeOS */
- return 0;
-}
-
-void PMAPI PM_callRealMode(uint seg,uint off, RMREGS *in,
- RMSREGS *sregs)
-{
- /* No BIOS access on the BeOS */
-}
-
-void PMAPI PM_availableMemory(ulong *physical,ulong *total)
-{
- /* TODO: Report the amount of available memory, both the amount of */
- /* physical memory left and the amount of virtual memory left. */
- /* If the OS does not provide these services, report 0's. */
- *physical = *total = 0;
-}
-
-void * PMAPI PM_allocLockedMem(uint size,ulong *physAddr,ibool contiguous,ibool below16Meg)
-{
- /* TODO: Allocate a block of locked, physical memory of the specified */
- /* size. This is used for bus master operations. If this is not */
- /* supported by the OS, return NULL and bus mastering will not */
- /* be used. */
- return NULL;
-}
-
-void PMAPI PM_freeLockedMem(void *p,uint size,ibool contiguous)
-{
- /* TODO: Free a memory block allocated with PM_allocLockedMem. */
-}
-
-void PMAPI PM_setBankA(int bank)
-{
- /* No BIOS access on the BeOS */
-}
-
-void PMAPI PM_setBankAB(int bank)
-{
- /* No BIOS access on the BeOS */
-}
-
-void PMAPI PM_setCRTStart(int x,int y,int waitVRT)
-{
- /* No BIOS access on the BeOS */
-}
-
-ibool PMAPI PM_enableWriteCombine(ulong base,ulong length,uint type)
-{
- /* TODO: This function should enable Pentium Pro and Pentium II MTRR */
- /* write combining for the passed in physical memory base address */
- /* and length. Normally this is done via calls to an OS specific */
- /* device driver as this can only be done at ring 0. */
- /* */
- /* NOTE: This is a *very* important function to implement! If you do */
- /* not implement, graphics performance on the latest Intel chips */
- /* will be severly impaired. For sample code that can be used */
- /* directly in a ring 0 device driver, see the MSDOS implementation */
- /* which includes assembler code to do this directly (if the */
- /* program is running at ring 0). */
- return false;
-}
-
-ibool PMAPI PM_doBIOSPOST(ushort axVal,ulong BIOSPhysAddr,void *mappedBIOS)
-{
- /* TODO: This function is used to run the BIOS POST code on a secondary */
- /* controller to initialise it for use. This is not necessary */
- /* for multi-controller operation, but it will make it a lot */
- /* more convenicent for end users (otherwise they have to boot */
- /* the system once with the secondary controller as primary, and */
- /* then boot with both controllers installed). */
- /* */
- /* Even if you don't support full BIOS access, it would be */
- /* adviseable to be able to POST the secondary controllers in the */
- /* system using this function as a minimum requirement. Some */
- /* graphics hardware has registers that contain values that only */
- /* the BIOS knows about, which makes bring up a card from cold */
- /* reset difficult if the BIOS has not POST'ed it. */
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Function to find the first file matching a search criteria in a directory.
-****************************************************************************/
-ulong PMAPI PM_findFirstFile(
- const char *filename,
- PM_findData *findData)
-{
- (void)filename;
- (void)findData;
- return PM_FILE_INVALID;
-}
-
-/****************************************************************************
-REMARKS:
-Function to find the next file matching a search criteria in a directory.
-****************************************************************************/
-ibool PMAPI PM_findNextFile(
- ulong handle,
- PM_findData *findData)
-{
- (void)handle;
- (void)findData;
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Function to close the find process
-****************************************************************************/
-void PMAPI PM_findClose(
- ulong handle)
-{
- (void)handle;
-}
-
-/****************************************************************************
-REMARKS:
-Function to determine if a drive is a valid drive or not. Under Unix this
-function will return false for anything except a value of 3 (considered
-the root drive, and equivalent to C: for non-Unix systems). The drive
-numbering is:
-
- 1 - Drive A:
- 2 - Drive B:
- 3 - Drive C:
- etc
-
-****************************************************************************/
-ibool PMAPI PM_driveValid(
- char drive)
-{
- if (drive == 3)
- return true;
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Function to get the current working directory for the specififed drive.
-Under Unix this will always return the current working directory regardless
-of what the value of 'drive' is.
-****************************************************************************/
-void PMAPI PM_getdcwd(
- int drive,
- char *dir,
- int len)
-{
- (void)drive;
- getcwd(dir,len);
-}
-
-/****************************************************************************
-REMARKS:
-Function to change the file attributes for a specific file.
-****************************************************************************/
-void PMAPI PM_setFileAttr(
- const char *filename,
- uint attrib)
-{
- /* TODO: Set the file attributes for a file */
- (void)filename;
- (void)attrib;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/beos/vflat.c b/board/MAI/bios_emulator/scitech/src/pm/beos/vflat.c
deleted file mode 100644
index 579ef2c95c..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/beos/vflat.c
+++ /dev/null
@@ -1,49 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-*
-* Description: Dummy module; no virtual framebuffer for this OS
-*
-****************************************************************************/
-
-#include "pmapi.h"
-
-ibool PMAPI VF_available(void)
-{
- return false;
-}
-
-void * PMAPI VF_init(ulong baseAddr,int bankSize,int codeLen,void *bankFunc)
-{
- baseAddr = baseAddr;
- bankSize = bankSize;
- codeLen = codeLen;
- bankFunc = bankFunc;
- return NULL;
-}
-
-void PMAPI VF_exit(void)
-{
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/beos/ztimer.c b/board/MAI/bios_emulator/scitech/src/pm/beos/ztimer.c
deleted file mode 100644
index a528b73177..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/beos/ztimer.c
+++ /dev/null
@@ -1,111 +0,0 @@
-/****************************************************************************
-*
-* Ultra Long Period Timer
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: *** TODO: ADD YOUR OS ENVIRONMENT NAME HERE ***
-*
-* Description: OS specific implementation for the Zen Timer functions.
-*
-****************************************************************************/
-
-/*----------------------------- Implementation ----------------------------*/
-
-/****************************************************************************
-REMARKS:
-Initialise the Zen Timer module internals.
-****************************************************************************/
-void _ZTimerInit(void)
-{
- /* TODO: Do any specific internal initialisation in here */
-}
-
-/****************************************************************************
-REMARKS:
-Start the Zen Timer counting.
-****************************************************************************/
-static void _LZTimerOn(
- LZTimerObject *tm)
-{
- /* TODO: Start the Zen Timer counting. This should be a macro if */
- /* possible. */
-}
-
-/****************************************************************************
-REMARKS:
-Compute the lap time since the timer was started.
-****************************************************************************/
-static ulong _LZTimerLap(
- LZTimerObject *tm)
-{
- /* TODO: Compute the lap time between the current time and when the */
- /* timer was started. */
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-Stop the Zen Timer counting.
-****************************************************************************/
-static void _LZTimerOff(
- LZTimerObject *tm)
-{
- /* TODO: Stop the timer counting. Should be a macro if possible. */
-}
-
-/****************************************************************************
-REMARKS:
-Compute the elapsed time in microseconds between start and end timings.
-****************************************************************************/
-static ulong _LZTimerCount(
- LZTimerObject *tm)
-{
- /* TODO: Compute the elapsed time and return it. Always microseconds. */
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-Define the resolution of the long period timer as microseconds per timer tick.
-****************************************************************************/
-#define ULZTIMER_RESOLUTION 1
-
-/****************************************************************************
-REMARKS:
-Read the Long Period timer from the OS
-****************************************************************************/
-static ulong _ULZReadTime(void)
-{
- /* TODO: Read the long period timer from the OS. The resolution of this */
- /* timer should be around 1/20 of a second for timing long */
- /* periods if possible. */
-}
-
-/****************************************************************************
-REMARKS:
-Compute the elapsed time from the BIOS timer tick. Note that we check to see
-whether a midnight boundary has passed, and if so adjust the finish time to
-account for this. We cannot detect if more that one midnight boundary has
-passed, so if this happens we will be generating erronous results.
-****************************************************************************/
-ulong _ULZElapsedTime(ulong start,ulong finish)
-{ return finish - start; }
diff --git a/board/MAI/bios_emulator/scitech/src/pm/codepage/us_eng.c b/board/MAI/bios_emulator/scitech/src/pm/codepage/us_eng.c
deleted file mode 100644
index 9aa871423e..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/codepage/us_eng.c
+++ /dev/null
@@ -1,285 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-*
-* Description: Keyboard translation code pages for US English keyboards.
-*
-****************************************************************************/
-
-#include "event.h"
-
-/*--------------------------- Global variables ----------------------------*/
-
-/* This table is used for all normal key translations, and is the fallback
- * table if the key is not found in any of the other translation tables.
- * If the code is not found in this table, the ASCII code is set to 0 to
- * indicate that there is no ASCII code equivalent for this key.
- */
-static codepage_entry_t US_normal[] = {
- {0x01, 0x1B},
- {0x02, '1'},
- {0x03, '2'},
- {0x04, '3'},
- {0x05, '4'},
- {0x06, '5'},
- {0x07, '6'},
- {0x08, '7'},
- {0x09, '8'},
- {0x0A, '9'},
- {0x0B, '0'},
- {0x0C, '-'},
- {0x0D, '='},
- {0x0E, 0x08},
- {0x0F, 0x09},
- {0x10, 'q'},
- {0x11, 'w'},
- {0x12, 'e'},
- {0x13, 'r'},
- {0x14, 't'},
- {0x15, 'y'},
- {0x16, 'u'},
- {0x17, 'i'},
- {0x18, 'o'},
- {0x19, 'p'},
- {0x1A, '['},
- {0x1B, ']'},
- {0x1C, 0x0D},
- {0x1E, 'a'},
- {0x1F, 's'},
- {0x20, 'd'},
- {0x21, 'f'},
- {0x22, 'g'},
- {0x23, 'h'},
- {0x24, 'j'},
- {0x25, 'k'},
- {0x26, 'l'},
- {0x27, ';'},
- {0x28, '\''},
- {0x29, '`'},
- {0x2B, '\\'},
- {0x2C, 'z'},
- {0x2D, 'x'},
- {0x2E, 'c'},
- {0x2F, 'v'},
- {0x30, 'b'},
- {0x31, 'n'},
- {0x32, 'm'},
- {0x33, ','},
- {0x34, '.'},
- {0x35, '/'},
- {0x37, '*'}, /* Keypad */
- {0x39, ' '},
- {0x4A, '-'}, /* Keypad */
- {0x4E, '+'}, /* Keypad */
- {0x60, 0x0D}, /* Keypad */
- {0x61, '/'}, /* Keypad */
- };
-
-/* This table is used for when CAPSLOCK is active and the shift or ctrl
- * keys are not down. If the code is not found in this table, the normal
- * table above is then searched.
- */
-static codepage_entry_t US_caps[] = {
- {0x10, 'Q'},
- {0x11, 'W'},
- {0x12, 'E'},
- {0x13, 'R'},
- {0x14, 'T'},
- {0x15, 'Y'},
- {0x16, 'U'},
- {0x17, 'I'},
- {0x18, 'O'},
- {0x19, 'P'},
- {0x1E, 'A'},
- {0x1F, 'S'},
- {0x20, 'D'},
- {0x21, 'F'},
- {0x22, 'G'},
- {0x23, 'H'},
- {0x24, 'J'},
- {0x25, 'K'},
- {0x26, 'L'},
- {0x2C, 'Z'},
- {0x2D, 'X'},
- {0x2E, 'C'},
- {0x2F, 'V'},
- {0x30, 'B'},
- {0x31, 'N'},
- {0x32, 'M'},
- };
-
-/* This table is used for when shift key is down, but the ctrl key is not
- * down and CAPSLOCK is not active. If the code is not found in this table,
- * the normal table above is then searched.
- */
-static codepage_entry_t US_shift[] = {
- {0x02, '!'},
- {0x03, '@'},
- {0x04, '#'},
- {0x05, '$'},
- {0x06, '%'},
- {0x07, '^'},
- {0x08, '&'},
- {0x09, '*'},
- {0x0A, '('},
- {0x0B, ')'},
- {0x0C, '_'},
- {0x0D, '+'},
- {0x10, 'Q'},
- {0x11, 'W'},
- {0x12, 'E'},
- {0x13, 'R'},
- {0x14, 'T'},
- {0x15, 'Y'},
- {0x16, 'U'},
- {0x17, 'I'},
- {0x18, 'O'},
- {0x19, 'P'},
- {0x1A, '{'},
- {0x1B, '}'},
- {0x1E, 'A'},
- {0x1F, 'S'},
- {0x20, 'D'},
- {0x21, 'F'},
- {0x22, 'G'},
- {0x23, 'H'},
- {0x24, 'J'},
- {0x25, 'K'},
- {0x26, 'L'},
- {0x27, ':'},
- {0x28, '"'},
- {0x29, '~'},
- {0x2B, '|'},
- {0x2C, 'Z'},
- {0x2D, 'X'},
- {0x2E, 'C'},
- {0x2F, 'V'},
- {0x30, 'B'},
- {0x31, 'N'},
- {0x32, 'M'},
- {0x33, '<'},
- {0x34, '>'},
- {0x35, '?'},
- };
-
-/* This table is used for when CAPSLOCK is active and the shift key is
- * down, but the ctrl key is not. If the code is not found in this table,
- * the shift table above is then searched.
- */
-static codepage_entry_t US_shiftCaps[] = {
- {0x10, 'q'},
- {0x11, 'w'},
- {0x12, 'e'},
- {0x13, 'r'},
- {0x14, 't'},
- {0x15, 'y'},
- {0x16, 'u'},
- {0x17, 'i'},
- {0x18, 'o'},
- {0x19, 'p'},
- {0x1E, 'a'},
- {0x1F, 's'},
- {0x20, 'd'},
- {0x21, 'f'},
- {0x22, 'g'},
- {0x23, 'h'},
- {0x24, 'j'},
- {0x25, 'k'},
- {0x26, 'l'},
- {0x2C, 'z'},
- {0x2D, 'x'},
- {0x2E, 'c'},
- {0x2F, 'v'},
- {0x30, 'b'},
- {0x31, 'n'},
- {0x32, 'm'},
- };
-
-/* This table is used for all key translations when the ctrl key is down,
- * regardless of the state of the shift key and CAPSLOCK. If the code is
- * not found in this table, the ASCII code is set to 0 to indicate that
- * there is no ASCII code equivalent for this key.
- */
-static codepage_entry_t US_ctrl[] = {
- {0x01, 0x1B},
- {0x06, 0x1E},
- {0x0C, 0x1F},
- {0x0E, 0x7F},
- {0x10, 0x11},
- {0x11, 0x17},
- {0x12, 0x05},
- {0x13, 0x12},
- {0x14, 0x14},
- {0x15, 0x19},
- {0x16, 0x16},
- {0x17, 0x09},
- {0x18, 0x0F},
- {0x19, 0x10},
- {0x1A, 0x1B},
- {0x1B, 0x1D},
- {0x1C, 0x0A},
- {0x1E, 0x01},
- {0x1F, 0x13},
- {0x20, 0x04},
- {0x21, 0x06},
- {0x22, 0x07},
- {0x23, 0x08},
- {0x24, 0x0A},
- {0x25, 0x0B},
- {0x26, 0x0C},
- {0x2B, 0x1C},
- {0x2C, 0x1A},
- {0x2D, 0x18},
- {0x2E, 0x03},
- {0x2F, 0x16},
- {0x30, 0x02},
- {0x31, 0x0E},
- {0x32, 0x0D},
- {0x39, ' '},
- };
-
-static codepage_entry_t US_numPad[] = {
- {0x4C, '5'},
- {0x62, '4'},
- {0x63, '6'},
- {0x64, '8'},
- {0x65, '2'},
- {0x66, '0'},
- {0x67, '.'},
- {0x68, '7'},
- {0x69, '1'},
- {0x6A, '9'},
- {0x6B, '3'},
- };
-
-codepage_t _CP_US_English = {
- "US English",
- US_normal, EVT_ARR_SIZE(US_normal),
- US_caps, EVT_ARR_SIZE(US_caps),
- US_shift, EVT_ARR_SIZE(US_shift),
- US_shiftCaps, EVT_ARR_SIZE(US_shiftCaps),
- US_ctrl, EVT_ARR_SIZE(US_ctrl),
- US_numPad, EVT_ARR_SIZE(US_numPad),
- };
diff --git a/board/MAI/bios_emulator/scitech/src/pm/common.c b/board/MAI/bios_emulator/scitech/src/pm/common.c
deleted file mode 100644
index d5a8e8f1c7..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/common.c
+++ /dev/null
@@ -1,480 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-*
-* Description: Module containing code common to all platforms.
-*
-****************************************************************************/
-
-#include "pmapi.h"
-#include "drvlib/os/os.h"
-#if defined(__WIN32_VXD__) || defined(__OS2_VDD__) || defined(__NT_DRIVER__)
-#include "sdd/sddhelp.h"
-#else
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#endif
-
-/*---------------------------- Global variables ---------------------------*/
-
-/* {secret} */
-long _VARAPI ___drv_os_type = _OS_UNSUPPORTED;
-static char localBPDPath[PM_MAX_PATH] = "";
-
-/*----------------------------- Implementation ----------------------------*/
-
-/****************************************************************************
-PARAMETERS:
-path - Local path to the Nucleus BPD driver files.
-
-REMARKS:
-This function is used by the application program to override the location
-of the Nucleus driver files that are loaded. Normally the loader code
-will look in the system Nucleus directories first, then in the 'drivers'
-directory relative to the current working directory, and finally relative
-to the MGL_ROOT environment variable. By default the local BPD path is
-always set to the current directory if not initialised.
-****************************************************************************/
-void PMAPI PM_setLocalBPDPath(
- const char *path)
-{
- PM_init();
- strncpy(localBPDPath,path,sizeof(localBPDPath));
- localBPDPath[sizeof(localBPDPath)-1] = 0;
-}
-
-/****************************************************************************
-PARAMETERS:
-bpdpath - Place to store the actual path to the file
-cachedpath - Place to store the cached BPD driver path
-trypath - Path to try to find the BPD file in
-subpath - Optional sub path to append to trypath
-dllname - Name of the Binary Portable DLL to load
-
-RETURNS:
-True if found, false if not.
-
-REMARKS:
-Trys the specified path to see if the BPD file can be found or not. If so,
-the path used is returned in bpdpath and cachedpath.
-****************************************************************************/
-static ibool TryPath(
- char *bpdpath,
- char *cachedpath,
- const char *trypath,
- const char *subpath,
- const char *dllname)
-{
- char filename[256];
- FILE *f;
-
- strcpy(bpdpath, trypath);
- PM_backslash(bpdpath);
- strcat(bpdpath,subpath);
- PM_backslash(bpdpath);
- strcpy(filename,bpdpath);
- strcat(filename,dllname);
- if ((f = fopen(filename,"rb")) == NULL)
- return false;
- if (cachedpath)
- strcpy(cachedpath,bpdpath);
- fclose(f);
- return true;
-}
-
-/****************************************************************************
-RETURNS:
-True if local override enabled, false if not.
-
-REMARKS:
-Tests to see if the local override option is enabled, and if so it will
-look for the Nucleus drivers in the local application directories in
-preference to the Nucleus system directories.
-****************************************************************************/
-static ibool GetLocalOverride(void)
-{
- char filename[256];
- FILE *f;
- static ibool local_override = -1;
-
- if (local_override == -1) {
- local_override = false;
- strcpy(filename,PM_getNucleusPath());
- PM_backslash(filename);
- strcat(filename,"graphics.ini");
- if ((f = fopen(filename,"r")) != NULL) {
- while (!feof(f) && fgets(filename,sizeof(filename),f)) {
- if (strnicmp(filename,"uselocal",8) == 0) {
- local_override = ((*(filename+9) - '0') == 1);
- break;
- }
- }
- fclose(f);
- }
- }
- return local_override;
-}
-
-/****************************************************************************
-DESCRIPTION:
-Sets the location of the debug log file.
-
-HEADER:
-pmapi.h
-
-PARAMETERS:
-dllname - Name of the Binary Portable DLL to load
-bpdpath - Place to store the actual path to the file
-
-RETURNS:
-True if found, false if not.
-
-REMARKS:
-Finds the location of a specific Binary Portable DLL, by searching all
-the standard SciTech Nucleus driver locations.
-****************************************************************************/
-ibool PMAPI PM_findBPD(
- const char *dllname,
- char *bpdpath)
-{
- static char cachedpath[PM_MAX_PATH] = "";
-
- /* On the first call determine the path to the Nucleus drivers */
- if (cachedpath[0] == 0) {
- /* First try in the global system Nucleus driver path if
- * the local override setting is not enabled.
- */
- PM_init();
- if (!GetLocalOverride()) {
- if (TryPath(bpdpath,cachedpath,PM_getNucleusPath(),"",dllname))
- return true;
- }
-
- /* Next try in the local application directory if available */
- if (localBPDPath[0] != 0) {
- if (TryPath(bpdpath,cachedpath,localBPDPath,"",dllname))
- return true;
- }
- else {
-#if !defined(__WIN32_VXD__) && !defined(__NT_DRIVER__)
- char *mgl_root;
- if ((mgl_root = getenv("MGL_ROOT")) != NULL) {
- if (TryPath(bpdpath,cachedpath,mgl_root,"drivers",dllname))
- return true;
- }
-#endif
- PM_getCurrentPath(bpdpath,PM_MAX_PATH);
- if (TryPath(bpdpath,cachedpath,bpdpath,"drivers",dllname))
- return true;
- }
-
- /* Finally try in the global system path again so that we
- * will still find the drivers in the global system path if
- * the local override option is on, but the application does
- * not have any local override drivers.
- */
- if (TryPath(bpdpath,cachedpath,PM_getNucleusPath(),"",dllname))
- return true;
-
- /* Whoops, we can't find the BPD file! */
- return false;
- }
-
- /* Always try in the previously discovered path */
- return TryPath(bpdpath,NULL,cachedpath,"",dllname);
-}
-
-/****************************************************************************
-REMARKS:
-Copies a string into another, and returns dest + strlen(src).
-****************************************************************************/
-static char *_stpcpy(
- char *_dest,
- const char *_src)
-{
- if (!_dest || !_src)
- return 0;
- while ((*_dest++ = *_src++) != 0)
- ;
- return --_dest;
-}
-
-/****************************************************************************
-REMARKS:
-Copies a string into another, stopping at the maximum length. The string
-is properly terminated (unlike strncpy).
-****************************************************************************/
-static void safe_strncpy(
- char *dst,
- const char *src,
- unsigned maxlen)
-{
- if (dst) {
- if(strlen(src) >= maxlen) {
- strncpy(dst, src, maxlen);
- dst[maxlen] = 0;
- }
- else
- strcpy(dst, src);
- }
-}
-
-/****************************************************************************
-REMARKS:
-Determins if the dot separator is present in the string.
-****************************************************************************/
-static int findDot(
- char *p)
-{
- if (*(p-1) == '.')
- p--;
- switch (*--p) {
- case ':':
- if (*(p-2) != '\0')
- break;
- case '/':
- case '\\':
- case '\0':
- return true;
- }
- return false;
-}
-
-/****************************************************************************
-DESCRIPTION:
-Make a full pathname from split components.
-
-HEADER:
-pmapi.h
-
-PARAMETERS:
-path - Place to store full path
-drive - Drive component for path
-dir - Directory component for path
-name - Filename component for path
-ext - Extension component for path
-
-REMARKS:
-Function to make a full pathname from split components. Under Unix the
-drive component will usually be empty. If the drive, dir, name, or ext
-parameters are null or empty, they are not inserted in the path string.
-Otherwise, if the drive doesn't end with a colon, one is inserted in the
-path. If the dir doesn't end in a slash, one is inserted in the path.
-If the ext doesn't start with a dot, one is inserted in the path.
-
-The maximum sizes for the path string is given by the constant PM_MAX_PATH,
-which includes space for the null-terminator.
-
-SEE ALSO:
-PM_splitPath
-****************************************************************************/
-void PMAPI PM_makepath(
- char *path,
- const char *drive,
- const char *dir,
- const char *name,
- const char *ext)
-{
- if (drive && *drive) {
- *path++ = *drive;
- *path++ = ':';
- }
- if (dir && *dir) {
- path = _stpcpy(path,dir);
- if (*(path-1) != '\\' && *(path-1) != '/')
-#ifdef __UNIX__
- *path++ = '/';
-#else
- *path++ = '\\';
-#endif
- }
- if (name)
- path = _stpcpy(path,name);
- if (ext && *ext) {
- if (*ext != '.')
- *path++ = '.';
- path = _stpcpy(path,ext);
- }
- *path = 0;
-}
-
-/****************************************************************************
-DESCRIPTION:
-Split a full pathname into components.
-
-HEADER:
-pmapi.h
-
-PARAMETERS:
-path - Full path to split
-drive - Drive component for path
-dir - Directory component for path
-name - Filename component for path
-ext - Extension component for path
-
-RETURNS:
-Flags indicating what components were parsed.
-
-REMARKS:
-Function to split a full pathmame into separate components in the form
-
- X:\DIR\SUBDIR\NAME.EXT
-
-and splits path into its four components. It then stores those components
-in the strings pointed to by drive, dir, name and ext. (Each component is
-required but can be a NULL, which means the corresponding component will be
-parsed but not stored).
-
-The maximum sizes for these strings are given by the constants PM_MAX_DRIVE
-and PM_MAX_PATH. PM_MAX_DRIVE is always 4, and PM_MAX_PATH is usually at
-least 256 characters. Under Unix the dir, name and ext components may be
-up to the full path in length.
-
-SEE ALSO:
-PM_makePath
-****************************************************************************/
-int PMAPI PM_splitpath(
- const char *path,
- char *drive,
- char *dir,
- char *name,
- char *ext)
-{
- char *p;
- int temp,ret;
- char buf[PM_MAX_PATH+2];
-
- /* Set all string to default value zero */
- ret = 0;
- if (drive) *drive = 0;
- if (dir) *dir = 0;
- if (name) *name = 0;
- if (ext) *ext = 0;
-
- /* Copy filename into template up to PM_MAX_PATH characters */
- p = buf;
- if ((temp = strlen(path)) > PM_MAX_PATH)
- temp = PM_MAX_PATH;
- *p++ = 0;
- strncpy(p, path, temp);
- *(p += temp) = 0;
-
- /* Split the filename and fill corresponding nonzero pointers */
- temp = 0;
- for (;;) {
- switch (*--p) {
- case '.':
- if (!temp && (*(p+1) == '\0'))
- temp = findDot(p);
- if ((!temp) && ((ret & PM_HAS_EXTENSION) == 0)) {
- ret |= PM_HAS_EXTENSION;
- safe_strncpy(ext, p, PM_MAX_PATH - 1);
- *p = 0;
- }
- continue;
- case ':':
- if (p != &buf[2])
- continue;
- case '\0':
- if (temp) {
- if (*++p)
- ret |= PM_HAS_DIRECTORY;
- safe_strncpy(dir, p, PM_MAX_PATH - 1);
- *p-- = 0;
- break;
- }
- case '/':
- case '\\':
- if (!temp) {
- temp++;
- if (*++p)
- ret |= PM_HAS_FILENAME;
- safe_strncpy(name, p, PM_MAX_PATH - 1);
- *p-- = 0;
- if (*p == 0 || (*p == ':' && p == &buf[2]))
- break;
- }
- continue;
- case '*':
- case '?':
- if (!temp)
- ret |= PM_HAS_WILDCARDS;
- default:
- continue;
- }
- break;
- }
- if (*p == ':') {
- if (buf[1])
- ret |= PM_HAS_DRIVE;
- safe_strncpy(drive, &buf[1], PM_MAX_DRIVE - 1);
- }
- return ret;
-}
-
-/****************************************************************************
-DESCRIPTION:
-Block until a specific time has elapsed since the last call
-
-HEADER:
-pmapi.h
-
-PARAMETERS:
-milliseconds - Number of milliseconds for delay
-
-REMARKS:
-This function will block the calling thread or process until the specified
-number of milliseconds have passed since the /last/ call to this function.
-The first time this function is called, it will return immediately. On
-subsquent calls it will block until the specified time has elapsed, or it
-will return immediately if the time has already elapsed.
-
-This function is useful to provide constant time functionality in a
-program, such as a frame rate limiter for graphics applications etc.
-
-SEE ALSO:
-PM_sleep
-****************************************************************************/
-void PMAPI PM_blockUntilTimeout(
- ulong milliseconds)
-{
- ulong microseconds = milliseconds * 1000L,msDelay;
- static LZTimerObject tm;
- static ibool firstTime = true;
-
- if (firstTime) {
- firstTime = false;
- LZTimerOnExt(&tm);
- }
- else {
- if ((msDelay = (microseconds - LZTimerLapExt(&tm)) / 1000L) > 0)
- PM_sleep(msDelay);
- while (LZTimerLapExt(&tm) < microseconds)
- ;
- LZTimerOffExt(&tm);
- LZTimerOnExt(&tm);
- }
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/common/_cpuinfo.asm b/board/MAI/bios_emulator/scitech/src/pm/common/_cpuinfo.asm
deleted file mode 100644
index 60ebed713f..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/common/_cpuinfo.asm
+++ /dev/null
@@ -1,600 +0,0 @@
-;****************************************************************************
-;*
-;* SciTech OS Portability Manager Library
-;*
-;* ========================================================================
-;*
-;* The contents of this file are subject to the SciTech MGL Public
-;* License Version 1.0 (the "License"); you may not use this file
-;* except in compliance with the License. You may obtain a copy of
-;* the License at http://www.scitechsoft.com/mgl-license.txt
-;*
-;* Software distributed under the License is distributed on an
-;* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-;* implied. See the License for the specific language governing
-;* rights and limitations under the License.
-;*
-;* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-;*
-;* The Initial Developer of the Original Code is SciTech Software, Inc.
-;* All Rights Reserved.
-;*
-;* ========================================================================
-;*
-;* Language: NASM or TASM Assembler
-;* Environment: Intel 32 bit Protected Mode.
-;*
-;* Description: Code to determine the Intel processor type.
-;*
-;****************************************************************************
-
- IDEAL
-
-include "scitech.mac"
-
-header _cpuinfo
-
-begdataseg _cpuinfo ; Start of data segment
-
-cache_id db "01234567890123456"
-intel_id db "GenuineIntel" ; Intel vendor ID
-cyrix_id db "CyrixInstead" ; Cyrix vendor ID
-amd_id db "AuthenticAMD" ; AMD vendor ID
-idt_id db "CentaurHauls" ; IDT vendor ID
-
-CPU_IDT EQU 01000h ; Flag for IDT processors
-CPU_Cyrix EQU 02000h ; Flag for Cyrix processors
-CPU_AMD EQU 04000h ; Flag for AMD processors
-CPU_Intel EQU 08000h ; Flag for Intel processors
-
-enddataseg _cpuinfo
-
-begcodeseg _cpuinfo ; Start of code segment
-
-ifdef USE_NASM
-%macro mCPU_ID 0
-db 00Fh,0A2h
-%endmacro
-else
-MACRO mCPU_ID
-db 00Fh,0A2h
-ENDM
-endif
-
-ifdef USE_NASM
-%macro mRDTSC 0
-db 00Fh,031h
-%endmacro
-else
-MACRO mRDTSC
-db 00Fh,031h
-ENDM
-endif
-
-;----------------------------------------------------------------------------
-; bool _CPU_check80386(void)
-;----------------------------------------------------------------------------
-; Determines if we have an i386 processor.
-;----------------------------------------------------------------------------
-cprocstart _CPU_check80386
-
- enter_c
-
- xor edx,edx ; EDX = 0, not an 80386
- mov bx, sp
-ifdef USE_NASM
- and sp, ~3
-else
- and sp, not 3
-endif
- pushfd ; Push original EFLAGS
- pop eax ; Get original EFLAGS
- mov ecx, eax ; Save original EFLAGS
- xor eax, 40000h ; Flip AC bit in EFLAGS
- push eax ; Save new EFLAGS value on
- ; stack
- popfd ; Replace current EFLAGS value
- pushfd ; Get new EFLAGS
- pop eax ; Store new EFLAGS in EAX
- xor eax, ecx ; Can't toggle AC bit,
- ; processor=80386
- jnz @@Done ; Jump if not an 80386 processor
- inc edx ; We have an 80386
-
-@@Done: push ecx
- popfd
- mov sp, bx
- mov eax, edx
- leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; bool _CPU_check80486(void)
-;----------------------------------------------------------------------------
-; Determines if we have an i486 processor.
-;----------------------------------------------------------------------------
-cprocstart _CPU_check80486
-
- enter_c
-
-; Distinguish between the i486 and Pentium by the ability to set the ID flag
-; in the EFLAGS register. If the ID flag is set, then we can use the CPUID
-; instruction to determine the final version of the chip. Otherwise we
-; simply have an 80486.
-
-; Distinguish between the i486 and Pentium by the ability to set the ID flag
-; in the EFLAGS register. If the ID flag is set, then we can use the CPUID
-; instruction to determine the final version of the chip. Otherwise we
-; simply have an 80486.
-
- pushfd ; Get original EFLAGS
- pop eax
- mov ecx, eax
- xor eax, 200000h ; Flip ID bit in EFLAGS
- push eax ; Save new EFLAGS value on stack
- popfd ; Replace current EFLAGS value
- pushfd ; Get new EFLAGS
- pop eax ; Store new EFLAGS in EAX
- xor eax, ecx ; Can not toggle ID bit,
- jnz @@1 ; Processor=80486
- mov eax,1 ; We dont have a Pentium
- jmp @@Done
-@@1: mov eax,0 ; We have Pentium or later
-@@Done: leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; bool _CPU_checkClone(void)
-;----------------------------------------------------------------------------
-; Checks if the i386 or i486 processor is a clone or genuine Intel.
-;----------------------------------------------------------------------------
-cprocstart _CPU_checkClone
-
- enter_c
-
- mov ax,5555h ; Check to make sure this is a 32-bit processor
- xor dx,dx
- mov cx,2h
- div cx ; Perform Division
- clc
- jnz @@NoClone
- jmp @@Clone
-@@NoClone:
- stc
-@@Clone:
- pushfd
- pop eax ; Get the flags
- and eax,1
- xor eax,1 ; EAX=0 is probably Intel, EAX=1 is a Clone
-
- leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; bool _CPU_haveCPUID(void)
-;----------------------------------------------------------------------------
-; Determines if we have support for the CPUID instruction.
-;----------------------------------------------------------------------------
-cprocstart _CPU_haveCPUID
-
- enter_c
-
-ifdef flatmodel
- pushfd ; Get original EFLAGS
- pop eax
- mov ecx, eax
- xor eax, 200000h ; Flip ID bit in EFLAGS
- push eax ; Save new EFLAGS value on stack
- popfd ; Replace current EFLAGS value
- pushfd ; Get new EFLAGS
- pop eax ; Store new EFLAGS in EAX
- xor eax, ecx ; Can not toggle ID bit,
- jnz @@1 ; Processor=80486
- mov eax,0 ; We dont have CPUID support
- jmp @@Done
-@@1: mov eax,1 ; We have CPUID support
-else
- mov eax,0 ; CPUID requires 32-bit pmode
-endif
-@@Done: leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; uint _CPU_checkCPUID(void)
-;----------------------------------------------------------------------------
-; Determines the CPU type using the CPUID instruction.
-;----------------------------------------------------------------------------
-cprocstart _CPU_checkCPUID
-
- enter_c
-
- xor eax, eax ; Set up for CPUID instruction
- mCPU_ID ; Get and save vendor ID
- cmp eax, 1 ; Make sure 1 is valid input for CPUID
- jl @@Fail ; We dont have the CPUID instruction
- xor eax,eax ; Assume vendor is unknown
-
-; Check for GenuineIntel processors
-
- LEA_L esi,intel_id
- cmp [DWORD esi], ebx
- jne @@NotIntel
- cmp [DWORD esi+4], edx
- jne @@NotIntel
- cmp [DWORD esi+8], ecx
- jne @@NotIntel
- mov eax,CPU_Intel ; Flag that we have GenuineIntel
- jmp @@FoundVendor
-
-; Check for CyrixInstead processors
-
-@@NotIntel:
- LEA_L esi,cyrix_id
- cmp [DWORD esi], ebx
- jne @@NotCyrix
- cmp [DWORD esi+4], edx
- jne @@NotCyrix
- cmp [DWORD esi+8], ecx
- jne @@NotCyrix
- mov eax,CPU_Cyrix ; Flag that we have CyrixInstead
- jmp @@FoundVendor
-
-; Check for AuthenticAMD processors
-
-@@NotCyrix:
- LEA_L esi,amd_id
- cmp [DWORD esi], ebx
- jne @@NotAMD
- cmp [DWORD esi+4], edx
- jne @@NotAMD
- cmp [DWORD esi+8], ecx
- jne @@NotAMD
- mov eax,CPU_AMD ; Flag that we have AuthenticAMD
- jmp @@FoundVendor
-
-; Check for CentaurHauls processors
-
-@@NotAMD:
- LEA_L esi,idt_id
- cmp [DWORD esi], ebx
- jne @@NotIDT
- cmp [DWORD esi+4], edx
- jne @@NotIDT
- cmp [DWORD esi+8], ecx
- jne @@NotIDT
- mov eax,CPU_IDT ; Flag that we have AuthenticIDT
- jmp @@FoundVendor
-
-@@NotIDT:
-
-@@FoundVendor:
- push eax
- xor eax, eax
- inc eax
- mCPU_ID ; Get family/model/stepping/features
- and eax, 0F00h
- shr eax, 8 ; Isolate family
- and eax, 0Fh
- pop ecx
- or eax,ecx ; Combine in the clone flag
-@@Done: leave_c
- ret
-
-@@Fail: xor eax,eax
- jmp @@Done
-
-cprocend
-
-;----------------------------------------------------------------------------
-; uint _CPU_getCPUIDModel(void)
-;----------------------------------------------------------------------------
-; Determines the CPU type using the CPUID instruction.
-;----------------------------------------------------------------------------
-cprocstart _CPU_getCPUIDModel
-
- enter_c
-
- xor eax, eax ; Set up for CPUID instruction
- mCPU_ID ; Get and save vendor ID
- cmp eax, 1 ; Make sure 1 is valid input for CPUID
- jl @@Fail ; We dont have the CPUID instruction
- xor eax, eax
- inc eax
- mCPU_ID ; Get family/model/stepping/features
- and eax, 0F0h
- shr eax, 4 ; Isolate model
-@@Done: leave_c
- ret
-
-@@Fail: xor eax,eax
- jmp @@Done
-
-cprocend
-
-;----------------------------------------------------------------------------
-; uint _CPU_getCPUIDStepping(void)
-;----------------------------------------------------------------------------
-; Determines the CPU type using the CPUID instruction.
-;----------------------------------------------------------------------------
-cprocstart _CPU_getCPUIDStepping
-
- enter_c
-
- xor eax, eax ; Set up for CPUID instruction
- mCPU_ID ; Get and save vendor ID
- cmp eax, 1 ; Make sure 1 is valid input for CPUID
- jl @@Fail ; We dont have the CPUID instruction
- xor eax, eax
- inc eax
- mCPU_ID ; Get family/model/stepping/features
- and eax, 00Fh ; Isolate stepping
-@@Done: leave_c
- ret
-
-@@Fail: xor eax,eax
- jmp @@Done
-
-cprocend
-
-;----------------------------------------------------------------------------
-; uint _CPU_getCPUIDFeatures(void)
-;----------------------------------------------------------------------------
-; Determines the CPU type using the CPUID instruction.
-;----------------------------------------------------------------------------
-cprocstart _CPU_getCPUIDFeatures
-
- enter_c
-
- xor eax, eax ; Set up for CPUID instruction
- mCPU_ID ; Get and save vendor ID
- cmp eax, 1 ; Make sure 1 is valid input for CPUID
- jl @@Fail ; We dont have the CPUID instruction
- xor eax, eax
- inc eax
- mCPU_ID ; Get family/model/stepping/features
- mov eax, edx
-@@Done: leave_c
- ret
-
-@@Fail: xor eax,eax
- jmp @@Done
-
-cprocend
-
-;----------------------------------------------------------------------------
-; uint _CPU_getCacheSize(void)
-;----------------------------------------------------------------------------
-; Determines the CPU cache size for Intel processors
-;----------------------------------------------------------------------------
-cprocstart _CPU_getCacheSize
-
- enter_c
- xor eax, eax ; Set up for CPUID instruction
- mCPU_ID ; Get and save vendor ID
- cmp eax,2 ; Make sure 2 is valid input for CPUID
- jl @@Fail ; We dont have the CPUID instruction
- mov eax,2
- mCPU_ID ; Get cache descriptors
- LEA_L esi,cache_id ; Get address of cache ID (-fPIC aware)
- shr eax,8
- mov [esi+0],eax
- mov [esi+3],ebx
- mov [esi+7],ecx
- mov [esi+11],edx
- xor eax,eax
- LEA_L esi,cache_id ; Get address of cache ID (-fPIC aware)
- mov edi,15
-@@ScanLoop:
- cmp [BYTE esi],41h
- mov eax,128
- je @@Done
- cmp [BYTE esi],42h
- mov eax,256
- je @@Done
- cmp [BYTE esi],43h
- mov eax,512
- je @@Done
- cmp [BYTE esi],44h
- mov eax,1024
- je @@Done
- cmp [BYTE esi],45h
- mov eax,2048
- je @@Done
- inc esi
- dec edi
- jnz @@ScanLoop
-
-@@Done: leave_c
- ret
-
-@@Fail: xor eax,eax
- jmp @@Done
-
-cprocend
-
-;----------------------------------------------------------------------------
-; uint _CPU_have3DNow(void)
-;----------------------------------------------------------------------------
-; Determines the CPU type using the CPUID instruction.
-;----------------------------------------------------------------------------
-cprocstart _CPU_have3DNow
-
- enter_c
-
- mov eax,80000000h ; Query for extended functions
- mCPU_ID ; Get extended function limit
- cmp eax,80000001h
- jbe @@Fail ; Nope, we dont have function 800000001h
- mov eax,80000001h ; Setup extended function 800000001h
- mCPU_ID ; and get the information
- test edx,80000000h ; Bit 31 is set if 3DNow! present
- jz @@Fail ; Nope, we dont have 3DNow support
- mov eax,1 ; Yep, we have 3DNow! support!
-@@Done: leave_c
- ret
-
-@@Fail: xor eax,eax
- jmp @@Done
-
-cprocend
-
-;----------------------------------------------------------------------------
-; ulong _CPU_quickRDTSC(void)
-;----------------------------------------------------------------------------
-; Reads the time stamp counter and returns the low order 32-bits
-;----------------------------------------------------------------------------
-cprocstart _CPU_quickRDTSC
-
- mRDTSC
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void _CPU_runBSFLoop(ulong interations)
-;----------------------------------------------------------------------------
-; Runs a loop of BSF instructions for the specified number of iterations
-;----------------------------------------------------------------------------
-cprocstart _CPU_runBSFLoop
-
- ARG iterations:ULONG
-
- push _bp
- mov _bp,_sp
- push _bx
-
- mov edx,[iterations]
- mov eax,80000000h
- mov ebx,edx
-
- ALIGN 4
-
-@@loop: bsf ecx,eax
- dec ebx
- jnz @@loop
-
- pop _bx
- pop _bp
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void _CPU_readTimeStamp(CPU_largeInteger *time);
-;----------------------------------------------------------------------------
-; Reads the time stamp counter and returns the 64-bit result.
-;----------------------------------------------------------------------------
-cprocstart _CPU_readTimeStamp
-
- mRDTSC
- mov ecx,[esp+4] ; Access directly without stack frame
- mov [ecx],eax
- mov [ecx+4],edx
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; ulong _CPU_diffTime64(CPU_largeInteger *t1,CPU_largeInteger *t2,CPU_largeInteger *t)
-;----------------------------------------------------------------------------
-; Computes the difference between two 64-bit numbers.
-;----------------------------------------------------------------------------
-cprocstart _CPU_diffTime64
-
- ARG t1:DPTR, t2:DPTR, t:DPTR
-
- enter_c
-
- mov ecx,[t2]
- mov eax,[ecx] ; EAX := t2.low
- mov ecx,[t1]
- sub eax,[ecx]
- mov edx,eax ; EDX := low difference
- mov ecx,[t2]
- mov eax,[ecx+4] ; ECX := t2.high
- mov ecx,[t1]
- sbb eax,[ecx+4] ; EAX := high difference
-
- mov ebx,[t] ; Store the result
- mov [ebx],edx ; Store low part
- mov [ebx+4],eax ; Store high part
- mov eax,edx ; Return low part
-ifndef flatmodel
- shld edx,eax,16 ; Return in DX:AX
-endif
- leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; ulong _CPU_calcMicroSec(CPU_largeInteger *count,ulong freq);
-;----------------------------------------------------------------------------
-; Computes the value in microseconds for the elapsed time with maximum
-; precision. The formula we use is:
-;
-; us = (((diff * 0x100000) / freq) * 1000000) / 0x100000)
-;
-; The power of two multiple before the first divide allows us to scale the
-; 64-bit difference using simple shifts, and then the divide brings the
-; final result into the range to fit into a 32-bit integer.
-;----------------------------------------------------------------------------
-cprocstart _CPU_calcMicroSec
-
- ARG count:DPTR, freq:ULONG
-
- enter_c
-
- mov ecx,[count]
- mov eax,[ecx] ; EAX := low part
- mov edx,[ecx+4] ; EDX := high part
- shld edx,eax,20
- shl eax,20 ; diff * 0x100000
- div [DWORD freq] ; (diff * 0x100000) / freq
- mov ecx,1000000
- xor edx,edx
- mul ecx ; ((diff * 0x100000) / freq) * 1000000)
- shrd eax,edx,20 ; ((diff * 0x100000) / freq) * 1000000) / 0x100000
-ifndef flatmodel
- shld edx,eax,16 ; Return in DX:AX
-endif
- leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; ulong _CPU_mulDiv(ulong a,ulong b,ulong c);
-;----------------------------------------------------------------------------
-; Computes the following with 64-bit integer precision:
-;
-; result = (a * b) / c
-;
-;----------------------------------------------------------------------------
-cprocstart _CPU_mulDiv
-
- ARG a:ULONG, b:ULONG, c:ULONG
-
- enter_c
- mov eax,[a]
- imul [ULONG b]
- idiv [ULONG c]
-ifndef flatmodel
- shld edx,eax,16 ; Return in DX:AX
-endif
- leave_c
- ret
-
-cprocend
-
-endcodeseg _cpuinfo
-
- END
diff --git a/board/MAI/bios_emulator/scitech/src/pm/common/_dma.asm b/board/MAI/bios_emulator/scitech/src/pm/common/_dma.asm
deleted file mode 100644
index 2b6e1e8b56..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/common/_dma.asm
+++ /dev/null
@@ -1,246 +0,0 @@
-;****************************************************************************
-;*
-;* SciTech OS Portability Manager Library
-;*
-;* ========================================================================
-;*
-;* The contents of this file are subject to the SciTech MGL Public
-;* License Version 1.0 (the "License"); you may not use this file
-;* except in compliance with the License. You may obtain a copy of
-;* the License at http://www.scitechsoft.com/mgl-license.txt
-;*
-;* Software distributed under the License is distributed on an
-;* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-;* implied. See the License for the specific language governing
-;* rights and limitations under the License.
-;*
-;* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-;*
-;* The Initial Developer of the Original Code is SciTech Software, Inc.
-;* All Rights Reserved.
-;*
-;* ========================================================================
-;*
-;* Language: 80386 Assembler, TASM 4.0 or NASM
-;* Environment: 16/32 bit Ring 0 device driver
-;*
-;* Description: Assembler support routines for ISA DMA controller.
-;*
-;****************************************************************************
-
- IDEAL
-
-include "scitech.mac" ; Memory model macros
-
-header _dma ; Set up memory model
-
-begdataseg _dma ; Start of data segment
-
-cpublic _PM_DMADataStart
-
-; DMA register I/O addresses for channels 0-7 (except 4)
-
-DMAC_page db 087h,083h,081h,082h, -1,08Bh,089h,08Ah
-DMAC_addr db 000h,002h,004h,006h, -1,0C4h,0C8h,0CCh
-DMAC_cnt db 001h,003h,005h,007h, -1,0C6h,0CAh,0CEh
-DMAC_mask db 00Ah,00Ah,00Ah,00Ah, -1,0D4h,0D4h,0D4h
-DMAC_mode db 00Bh,00Bh,00Bh,00Bh, -1,0D6h,0D6h,0D6h
-DMAC_FF db 00Ch,00Ch,00Ch,00Ch, -1,0D8h,0D8h,0D8h
-
-cpublic _PM_DMADataEnd
-
-enddataseg _dma
-
-begcodeseg _dma ; Start of code segment
-
-ifdef flatmodel
-
-cpublic _PM_DMACodeStart
-
-;----------------------------------------------------------------------------
-; void PM_DMACDisable(int channel);
-;----------------------------------------------------------------------------
-; Masks DMA channel, inhibiting DMA transfers
-;----------------------------------------------------------------------------
-cprocstart PM_DMACDisable
-
- ARG channel:UINT
-
- push ebp
- mov ebp,esp
- mov ecx,[channel] ; ECX indexes DMAC register tables
- mov dh,0 ; DH = 0 for DMAC register port access
- mov al,cl
- and al,11b
- or al,100b ; AL = (channel & 3) | "set mask bit"
- mov dl,[DMAC_mask+ecx]
- out dx,al
- pop ebp
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void PM_DMACEnable(int channel);
-;----------------------------------------------------------------------------
-; Unmasks DMA channel, enabling DMA transfers
-;----------------------------------------------------------------------------
-cprocstart PM_DMACEnable
-
- ARG channel:UINT
-
- push ebp
- mov ebp,esp
- mov ecx,[channel] ; ECX indexes DMAC register tables
- mov dh,0 ; DH = 0 for DMAC register port access
- mov al,cl
- and al,11b ; AL = (channel & 3), "set mask bit"=0
- mov dl,[DMAC_mask+ecx]
- out dx,al
- pop ebp
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void PM_DMACProgram(int channel,int mode,ulong bufferPhys,int count);
-;----------------------------------------------------------------------------
-; Purpose: Program DMA controller to perform transfer from first 16MB
-; based on previously selected mode and channel. DMA transfer may be enabled
-; by subsequent call to PM_DMACEnable.
-;
-; Entry: channel - DMA channel in use (0-7)
-; mode - Selected DMAMODE type for transfer
-; buffer - 32-bit physical address of DMA buffer
-; count - DMA byte count (1-65536 bytes)
-;----------------------------------------------------------------------------
-cprocstart PM_DMACProgram
-
- ARG channel:UINT, mode:UINT, bufferPhys:ULONG, count:UINT
-
- enter_c
- pushfd
- cli ; Disable interrupts
-
-; Mask DMA channel to disable it
-
- mov ebx,[channel] ; EBX indexes DMAC register tables
- mov dh,0 ; DH = 0 for DMAC register port access
- mov al,bl
- and al,11b
- or al,100b ; AL = (channel & 3) | "set mask bit"
- mov dl,[DMAC_mask+ebx]
- out dx,al
-
-; Generate IOW to clear FF toggle state
-
- mov al,0
- mov dl,[DMAC_FF+ebx]
- out dx,al
-
-; Compute buffer address to program
-
- mov eax,[bufferPhys] ; AX := DMA address offset
- mov ecx,eax
- shr ecx,16 ; CL := bufferPhys >> 16 (DMA page)
- mov esi,[count] ; ESI = # of bytes to transfer
- cmp ebx,4 ; 16-bit channel?
- jb @@WriteDMAC ; No, program DMAC
- shr eax,1 ; Yes, convert address and count
- shr esi,1 ; to 16-bit, 128K/page format
-
-; Set the DMA address word (bits 0-15)
-
-@@WriteDMAC:
- mov dl,[DMAC_addr+ebx]
- out dx,al
- mov al,ah
- out dx,al
-
-; Set DMA transfer count
-
- mov eax,esi
- dec eax ; ESI = # of bytes to transfer - 1
- mov dl,[DMAC_cnt+ebx]
- out dx,al
- mov al,ah
- out dx,al
-
-; Set DMA page byte (bits 16-23)
-
- mov al,cl
- mov dl,[DMAC_page+ebx]
- out dx,al
-
-; Set the DMA channel mode
-
- mov al,bl
- and al,11b
- or al,[BYTE mode] ; EAX = (channel & 3) | mode
- mov dl,[DMAC_mode+ebx]
- out dx,al
-
- pop eax ; SMP safe interrupt state restore!
- test eax,200h
- jz @@1
- sti
-@@1: leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; ulong PMAPI PM_DMACPosition(int channel);
-;----------------------------------------------------------------------------
-; Returns the current position in a dma transfer. Interrupts should be
-; disabled before calling this function.
-;----------------------------------------------------------------------------
-cprocstart PM_DMACPosition
-
- ARG channel:UINT
-
- enter_c
- mov ecx,[channel] ; ECX indexes DMAC register tables
- mov dh,0 ; DH = 0 for DMAC register port access
-
-; Generate IOW to clear FF toggle state
-
- mov al,0
- mov dl,[DMAC_FF+ebx]
- out dx,al
- xor eax,eax
- xor ecx,ecx
-
-; Now read the current position for the channel
-
-@@ReadLoop:
- mov dl,[DMAC_cnt+ebx]
- out dx,al
- in al,dx
- mov cl,al
- in al,dx
- mov ch,al ; ECX := first count read
- in al,dx
- mov ah,al
- in al,dx
- xchg al,ah ; EAX := second count read
- sub ecx,eax
- cmp ecx,40h
- jg @@ReadLoop
- cmp ebx,4 ; 16-bit channel?
- jb @@Exit ; No, we are done
- shl eax,1 ; Yes, adjust to byte address
-
-@@Exit: leave_c
- ret
-
-cprocend
-
-
-cpublic _PM_DMACodeEnd
-
-endif
-
-endcodeseg _dma
-
- END ; End of module
diff --git a/board/MAI/bios_emulator/scitech/src/pm/common/_int64.asm b/board/MAI/bios_emulator/scitech/src/pm/common/_int64.asm
deleted file mode 100644
index fdec1b58d8..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/common/_int64.asm
+++ /dev/null
@@ -1,309 +0,0 @@
-;****************************************************************************
-;*
-;* SciTech OS Portability Manager Library
-;*
-;* ========================================================================
-;*
-;* The contents of this file are subject to the SciTech MGL Public
-;* License Version 1.0 (the "License"); you may not use this file
-;* except in compliance with the License. You may obtain a copy of
-;* the License at http://www.scitechsoft.com/mgl-license.txt
-;*
-;* Software distributed under the License is distributed on an
-;* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-;* implied. See the License for the specific language governing
-;* rights and limitations under the License.
-;*
-;* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-;*
-;* The Initial Developer of the Original Code is SciTech Software, Inc.
-;* All Rights Reserved.
-;*
-;* ========================================================================
-;*
-;* Language: NASM or TASM Assembler
-;* Environment: Intel 32 bit Protected Mode.
-;*
-;* Description: Code for 64-bit arhithmetic
-;*
-;****************************************************************************
-
- IDEAL
-
-include "scitech.mac"
-
-header _int64
-
-begcodeseg _int64 ; Start of code segment
-
-a_low EQU 04h ; Access a_low directly on stack
-a_high EQU 08h ; Access a_high directly on stack
-b_low EQU 0Ch ; Access b_low directly on stack
-shift EQU 0Ch ; Access shift directly on stack
-result_2 EQU 0Ch ; Access result directly on stack
-b_high EQU 10h ; Access b_high directly on stack
-result_3 EQU 10h ; Access result directly on stack
-result_4 EQU 14h ; Access result directly on stack
-
-;----------------------------------------------------------------------------
-; void _PM_add64(u32 a_low,u32 a_high,u32 b_low,u32 b_high,__u64 *result);
-;----------------------------------------------------------------------------
-; Adds two 64-bit numbers.
-;----------------------------------------------------------------------------
-cprocstart _PM_add64
-
- mov eax,[esp+a_low]
- add eax,[esp+b_low]
- mov edx,[esp+a_high]
- adc edx,[esp+b_high]
- mov ecx,[esp+result_4]
- mov [ecx],eax
- mov [ecx+4],edx
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void _PM_sub64(u32 a_low,u32 a_high,u32 b_low,u32 b_high,__u64 *result);
-;----------------------------------------------------------------------------
-; Subtracts two 64-bit numbers.
-;----------------------------------------------------------------------------
-cprocstart _PM_sub64
-
- mov eax,[esp+a_low]
- sub eax,[esp+b_low]
- mov edx,[esp+a_high]
- sbb edx,[esp+b_high]
- mov ecx,[esp+result_4]
- mov [ecx],eax
- mov [ecx+4],edx
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void _PM_mul64(u32 a_high,u32 a_low,u32 b_high,u32 b_low,__u64 *result);
-;----------------------------------------------------------------------------
-; Multiples two 64-bit numbers.
-;----------------------------------------------------------------------------
-cprocstart _PM_mul64
-
- mov eax,[esp+a_high]
- mov ecx,[esp+b_high]
- or ecx,eax
- mov ecx,[esp+b_low]
- jnz @@FullMultiply
- mov eax,[esp+a_low] ; EDX:EAX = b.low * a.low
- mul ecx
- mov ecx,[esp+result_4]
- mov [ecx],eax
- mov [ecx+4],edx
- ret
-
-@@FullMultiply:
- push ebx
- mul ecx ; EDX:EAX = a.high * b.low
- mov ebx,eax
- mov eax,[esp+a_low+4]
- mul [DWORD esp+b_high+4] ; EDX:EAX = b.high * a.low
- add ebx,eax
- mov eax,[esp+a_low+4]
- mul ecx ; EDX:EAX = a.low * b.low
- add edx,ebx
- pop ebx
- mov ecx,[esp+result_4]
- mov [ecx],eax
- mov [ecx+4],edx
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void _PM_div64(u32 a_low,u32 a_high,u32 b_low,u32 b_high,__u64 *result);
-;----------------------------------------------------------------------------
-; Divides two 64-bit numbers.
-;----------------------------------------------------------------------------
-cprocstart _PM_div64
-
- push edi
- push esi
- push ebx
- xor edi,edi
- mov eax,[esp+a_high+0Ch]
- or eax,eax
- jns @@ANotNeg
-
-; Dividend is negative, so negate it and save result for later
-
- inc edi
- mov edx,[esp+a_low+0Ch]
- neg eax
- neg edx
- sbb eax,0
- mov [esp+a_high+0Ch],eax
- mov [esp+a_low+0Ch],edx
-
-@@ANotNeg:
- mov eax,[esp+b_high+0Ch]
- or eax,eax
- jns @@BNotNeg
-
-; Divisor is negative, so negate it and save result for later
-
- inc edi
- mov edx,[esp+b_low+0Ch]
- neg eax
- neg edx
- sbb eax,0
- mov [esp+b_high+0Ch],eax
- mov [esp+b_low+0Ch],edx
-
-@@BNotNeg:
- or eax,eax
- jnz @@BHighNotZero
-
-; b.high is zero, so handle this faster
-
- mov ecx,[esp+b_low+0Ch]
- mov eax,[esp+a_high+0Ch]
- xor edx,edx
- div ecx
- mov ebx,eax
- mov eax,[esp+a_low+0Ch]
- div ecx
- mov edx,ebx
- jmp @@BHighZero
-
-@@BHighNotZero:
- mov ebx,eax
- mov ecx,[esp+b_low+0Ch]
- mov edx,[esp+a_high+0Ch]
- mov eax,[esp+a_low+0Ch]
-
-; Shift values right until b.high becomes zero
-
-@@ShiftLoop:
- shr ebx,1
- rcr ecx,1
- shr edx,1
- rcr eax,1
- or ebx,ebx
- jnz @@ShiftLoop
-
-; Now complete the divide process
-
- div ecx
- mov esi,eax
- mul [DWORD esp+b_high+0Ch]
- mov ecx,eax
- mov eax,[esp+b_low+0Ch]
- mul esi
- add edx,ecx
- jb @@8
- cmp edx,[esp+a_high+0Ch]
- ja @@8
- jb @@9
- cmp eax,[esp+a_low+0Ch]
- jbe @@9
-@@8: dec esi
-@@9: xor edx,edx
- mov eax,esi
-
-@@BHighZero:
- dec edi
- jnz @@Done
-
-; The result needs to be negated as either a or b was negative
-
- neg edx
- neg eax
- sbb edx,0
-
-@@Done: pop ebx
- pop esi
- pop edi
- mov ecx,[esp+result_4]
- mov [ecx],eax
- mov [ecx+4],edx
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; __i64 _PM_shr64(u32 a_low,s32 a_high,s32 shift,__u64 *result);
-;----------------------------------------------------------------------------
-; Shift a 64-bit number right
-;----------------------------------------------------------------------------
-cprocstart _PM_shr64
-
- mov eax,[esp+a_low]
- mov edx,[esp+a_high]
- mov cl,[esp+shift]
- shrd edx,eax,cl
- mov ecx,[esp+result_3]
- mov [ecx],eax
- mov [ecx+4],edx
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; __i64 _PM_sar64(u32 a_low,s32 a_high,s32 shift,__u64 *result);
-;----------------------------------------------------------------------------
-; Shift a 64-bit number right (signed)
-;----------------------------------------------------------------------------
-cprocstart _PM_sar64
-
- mov eax,[esp+a_low]
- mov edx,[esp+a_high]
- mov cl,[esp+shift]
- sar edx,cl
- rcr eax,cl
- mov ecx,[esp+result_3]
- mov [ecx],eax
- mov [ecx+4],edx
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; __i64 _PM_shl64(u32 a_low,s32 a_high,s32 shift,__u64 *result);
-;----------------------------------------------------------------------------
-; Shift a 64-bit number left
-;----------------------------------------------------------------------------
-cprocstart _PM_shl64
-
- mov eax,[esp+a_low]
- mov edx,[esp+a_high]
- mov cl,[esp+shift]
- shld edx,eax,cl
- mov ecx,[esp+result_3]
- mov [ecx],eax
- mov [ecx+4],edx
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; __i64 _PM_neg64(u32 a_low,s32 a_high,__u64 *result);
-;----------------------------------------------------------------------------
-; Shift a 64-bit number left
-;----------------------------------------------------------------------------
-cprocstart _PM_neg64
-
- mov eax,[esp+a_low]
- mov edx,[esp+a_high]
- neg eax
- neg edx
- sbb eax,0
- mov ecx,[esp+result_2]
- mov [ecx],eax
- mov [ecx+4],edx
- ret
-
-cprocend
-
-
-endcodeseg _int64
-
- END
diff --git a/board/MAI/bios_emulator/scitech/src/pm/common/_joy.asm b/board/MAI/bios_emulator/scitech/src/pm/common/_joy.asm
deleted file mode 100644
index 0ff1ecf55d..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/common/_joy.asm
+++ /dev/null
@@ -1,230 +0,0 @@
-;****************************************************************************
-;*
-;* SciTech OS Portability Manager Library
-;*
-;* ========================================================================
-;*
-;* The contents of this file are subject to the SciTech MGL Public
-;* License Version 1.0 (the "License"); you may not use this file
-;* except in compliance with the License. You may obtain a copy of
-;* the License at http://www.scitechsoft.com/mgl-license.txt
-;*
-;* Software distributed under the License is distributed on an
-;* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-;* implied. See the License for the specific language governing
-;* rights and limitations under the License.
-;*
-;* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-;*
-;* The Initial Developer of the Original Code is SciTech Software, Inc.
-;* All Rights Reserved.
-;*
-;* ========================================================================
-;*
-;* Language: 80386 Assembler
-;* Environment: Intel x86, any OS
-;*
-;* Description: Assembly language support routines for reading analogue
-;* joysticks.
-;*
-;****************************************************************************
-
- ideal
-
-include "scitech.mac" ; Memory model macros
-
-ifdef flatmodel
-
-header _joy ; Set up memory model
-
-begcodeseg _joy ; Start of code segment
-
-;----------------------------------------------------------------------------
-; initTimer
-;----------------------------------------------------------------------------
-; Sets up 8253 timer 2 (PC speaker) to start timing, but not produce output.
-;----------------------------------------------------------------------------
-cprocstatic initTimer
-
-; Start timer 2 counting
-
- in al,61h
- and al,0FDh ; Disable speaker output (just in case)
- or al,1
- out 61h,al
-
-; Set the timer 2 count to 0 again to start the timing interval.
-
- mov al,10110100b ; set up to load initial (timer 2)
- out 43h,al ; timer count
- sub al,al
- out 42h,al ; load count lsb
- out 42h,al ; load count msb
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; readTimer2
-;----------------------------------------------------------------------------
-; Reads the number of ticks from the 8253 timer chip using channel 2 (PC
-; speaker). This is non-destructive and does not screw up other libraries.
-;----------------------------------------------------------------------------
-cprocstatic readTimer
-
- xor al,al ; Latch timer 0 command
- out 43h,al ; Latch timer
- in al,42h ; least significant byte
- mov ah,al
- in al,42h ; most significant byte
- xchg ah,al
- and eax,0FFFFh
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; exitTimer
-;----------------------------------------------------------------------------
-; Stops the 8253 timer 2 (PC speaker) counting
-;----------------------------------------------------------------------------
-cprocstatic exitTimer
-
-; Stop timer 2 from counting
-
- push eax
- in al,61h
- and al,0FEh
- out 61h,al
-
-; Some programs have a problem if we change the control port; better change it
-; to something they expect (mode 3 - square wave generator)...
- mov al,0B6h
- out 43h,al
-
- pop eax
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; int _EVT_readJoyAxis(int jmask,int *axis);
-;----------------------------------------------------------------------------
-; Function to poll the joystick to read the current axis positions.
-;----------------------------------------------------------------------------
-cprocstart _EVT_readJoyAxis
-
- ARG jmask:UINT, axis:DPTR
-
- LOCAL firstTick:UINT, lastTick:UINT, totalTicks:UINT = LocalSize
-
- enter_c
-
- mov ebx,[jmask]
- mov edi,[axis]
- mov ecx,(1193180/100)
- and ebx,01111b ; Mask out supported axes
- mov dx,201h ; DX := joystick I/O port
- call initTimer ; Start timer 2 counting
- call readTimer ; Returns counter in EAX
- mov [lastTick],eax
-
-@@WaitStable:
- in al,dx
- and al,bl ; Wait for the axes in question to be
- jz @@Stable ; done reading...
- call readTimer ; Returns counter in EAX
- xchg eax,[lastTick]
- cmp eax,[lastTick]
- jb @@1
- sub eax,[lastTick]
-@@1: add [totalTicks],eax
- cmp [totalTicks],ecx ; Check for timeout
- jae @@Stable
- jmp @@WaitStable
-
-@@Stable:
- mov al,0FFh
- out dx,al ; Start joystick reading
- call initTimer ; Start timer 2 counting
- call readTimer ; Returns counter in EAX
- mov [firstTick],eax ; Store initial count
- mov [lastTick],eax
- mov [DWORD totalTicks],0
- cli
-
-@@PollLoop:
- in al,dx ; Read Joystick port
- not al
- and al,bl ; Mask off channels we don't want to read
- jnz @@AxisFlipped ; See if any of the channels flipped
- call readTimer ; Returns counter in EAX
- xchg eax,[lastTick]
- cmp eax,[lastTick]
- jb @@2
- sub eax,[lastTick]
-@@2: add [totalTicks],eax
- cmp [totalTicks],ecx ; Check for timeout
- jae @@TimedOut
- jmp @@PollLoop
-
-@@AxisFlipped:
- xor esi,esi
- mov ah,1
- test al,ah
- jnz @@StoreCount ; Joystick 1, X axis flipped
- add esi,4
- mov ah,2
- test al,ah
- jnz @@StoreCount ; Joystick 1, Y axis flipped
- add esi,4
- mov ah,4
- test al,ah
- jnz @@StoreCount ; Joystick 2, X axis flipped
- add esi,4 ; Joystick 2, Y axis flipped
- mov ah,8
-
-@@StoreCount:
- or bh,ah ; Indicate this axis is active
- xor bl,ah ; Unmark the channels that just tripped
- call readTimer ; Returns counter in EAX
- xchg eax,[lastTick]
- cmp eax,[lastTick]
- jb @@3
- sub eax,[lastTick]
-@@3: add [totalTicks],eax
- mov eax,[totalTicks]
- mov [edi+esi],eax ; Record the time this channel flipped
- cmp bl,0 ; If there are more channels to read,
- jne @@PollLoop ; keep looping
-
-@@TimedOut:
- sti
- call exitTimer ; Stop timer 2 counting
- movzx eax,bh ; Return the mask of working axes
- leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; int _EVT_readJoyButtons(void);
-;----------------------------------------------------------------------------
-; Function to poll the current joystick buttons
-;----------------------------------------------------------------------------
-cprocstart _EVT_readJoyButtons
-
- mov dx,0201h
- in al,dx
- shr al,4
- not al
- and eax,0Fh
- ret
-
-cprocend
-
-endcodeseg _joy
-
-endif
-
- END ; End of module
diff --git a/board/MAI/bios_emulator/scitech/src/pm/common/_mtrr.asm b/board/MAI/bios_emulator/scitech/src/pm/common/_mtrr.asm
deleted file mode 100644
index 1e0a6966ce..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/common/_mtrr.asm
+++ /dev/null
@@ -1,272 +0,0 @@
-;****************************************************************************
-;*
-;* SciTech OS Portability Manager Library
-;*
-;* ========================================================================
-;*
-;* The contents of this file are subject to the SciTech MGL Public
-;* License Version 1.0 (the "License"); you may not use this file
-;* except in compliance with the License. You may obtain a copy of
-;* the License at http://www.scitechsoft.com/mgl-license.txt
-;*
-;* Software distributed under the License is distributed on an
-;* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-;* implied. See the License for the specific language governing
-;* rights and limitations under the License.
-;*
-;* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-;*
-;* The Initial Developer of the Original Code is SciTech Software, Inc.
-;* All Rights Reserved.
-;*
-;* ========================================================================
-;*
-;* Language: 80386 Assembler, TASM 4.0 or NASM
-;* Environment: 16/32 bit Ring 0 device driver
-;*
-;* Description: Assembler support routines for the Memory Type Range Register
-;* (MTRR) module.
-;*
-;****************************************************************************
-
- IDEAL
-
-include "scitech.mac" ; Memory model macros
-
-header _mtrr ; Set up memory model
-
-begdataseg _mtrr
-
-ifdef DOS4GW
- cextern _PM_haveCauseWay,UINT
-endif
-
-enddataseg _mtrr
-
-begcodeseg _mtrr ; Start of code segment
-
-P586
-
-;----------------------------------------------------------------------------
-; ibool _MTRR_isRing0(void);
-;----------------------------------------------------------------------------
-; Checks to see if we are running at ring 0. This check is only relevant
-; for 32-bit DOS4GW and compatible programs. If we are not running under
-; DOS4GW, then we simply assume we are a ring 0 device driver.
-;----------------------------------------------------------------------------
-cprocnear _MTRR_isRing0
-
-; Are we running under CauseWay?
-
-ifdef DOS4GW
- enter_c
- mov ax,cs
- and eax,3
- xor eax,3
- jnz @@Exit
-
-; CauseWay runs the apps at ring 3, but implements support for specific
-; ring 0 instructions that we need to get stuff done under real DOS.
-
- mov eax,1
- cmp [UINT _PM_haveCauseWay],0
- jnz @@Exit
-@@Fail: xor eax,eax
-@@Exit: leave_c
- ret
-else
-ifdef __SMX32__
- mov eax,1 ; SMX is ring 0!
- ret
-else
-ifdef __VXD__
- mov eax,1 ; VxD is ring 0!
- ret
-else
-ifdef __NT_DRIVER__
- mov eax,1 ; NT/W2K is ring 0!
- ret
-else
-else
- xor eax,eax ; Assume ring 3 for 32-bit DOS
- ret
-endif
-endif
-endif
-endif
-
-cprocend
-
-;----------------------------------------------------------------------------
-; ulong _MTRR_disableInt(void);
-;----------------------------------------------------------------------------
-; Return processor interrupt status and disable interrupts.
-;----------------------------------------------------------------------------
-cprocstart _MTRR_disableInt
-
- pushfd ; Put flag word on stack
- cli ; Disable interrupts!
- pop eax ; deposit flag word in return register
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void _MTRR_restoreInt(ulong ps);
-;----------------------------------------------------------------------------
-; Restore processor interrupt status.
-;----------------------------------------------------------------------------
-cprocstart _MTRR_restoreInt
-
- ARG ps:ULONG
-
- push ebp
- mov ebp,esp ; Set up stack frame
- mov ecx,[ps]
- test ecx,200h ; SMP safe interrupt flag restore!
- jz @@1
- sti
-@@1: pop ebp
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; ulong _MTRR_saveCR4(void);
-;----------------------------------------------------------------------------
-; Save the value of CR4 and clear the Page Global Enable (bit 7). We also
-; disable and flush the caches.
-;----------------------------------------------------------------------------
-cprocstart _MTRR_saveCR4
-
- enter_c
-
-; Save value of CR4 and clear Page Global Enable (bit 7)
-
- mov ebx,cr4
- mov eax,ebx
- and al,7Fh
- mov cr4,eax
-
-; Disable and flush caches
-
- mov eax,cr0
- or eax,40000000h
- wbinvd
- mov cr0,eax
- wbinvd
-
-; Return value from CR4
-
- mov eax,ebx
- leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void _MTRR_restoreCR4(ulong cr4Val)
-;----------------------------------------------------------------------------
-; Save the value of CR4 and clear the Page Global Enable (bit 7). We also
-; disable and flush the caches.
-;----------------------------------------------------------------------------
-cprocstart _MTRR_restoreCR4
-
- ARG cr4Val:ULONG
-
- enter_c
-
-; Enable caches
-
- mov eax,cr0
- and eax,0BFFFFFFFh
- mov cr0,eax
- mov eax,[cr4Val]
- mov cr4,eax
- leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; uchar _MTRR_getCx86(uchar reg);
-;----------------------------------------------------------------------------
-; Read a Cyrix CPU indexed register
-;----------------------------------------------------------------------------
-cprocstart _MTRR_getCx86
-
- ARG reg:UCHAR
-
- enter_c
- mov al,[reg]
- out 22h,al
- in al,23h
- leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; uchar _MTRR_setCx86(uchar reg,uchar val);
-;----------------------------------------------------------------------------
-; Write a Cyrix CPU indexed register
-;----------------------------------------------------------------------------
-cprocstart _MTRR_setCx86
-
- ARG reg:UCHAR, val:UCHAR
-
- enter_c
- mov al,[reg]
- out 22h,al
- mov al,[val]
- out 23h,al
- leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void _MTRR_readMSR(uong reg, ulong FAR *eax, ulong FAR *edx);
-;----------------------------------------------------------------------------
-; Writes the specific Machine Status Register used on the newer Intel
-; Pentium Pro and Pentium II motherboards.
-;----------------------------------------------------------------------------
-cprocnear _MTRR_readMSR
-
- ARG reg:ULONG, v_eax:DPTR, v_edx:DPTR
-
- enter_c
- mov ecx,[reg]
- rdmsr
- mov ebx,[v_eax]
- mov [ebx],eax
- mov ebx,[v_edx]
- mov [ebx],edx
- leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void _MTRR_writeMSR(uong reg, ulong eax, ulong edx);
-;----------------------------------------------------------------------------
-; Writes the specific Machine Status Register used on the newer Intel
-; Pentium Pro and Pentium II motherboards.
-;----------------------------------------------------------------------------
-cprocnear _MTRR_writeMSR
-
- ARG reg:ULONG, v_eax:ULONG, v_edx:ULONG
-
- enter_c
- mov ecx,[reg]
- mov eax,[v_eax]
- mov edx,[v_edx]
- wrmsr
- leave_c
- ret
-
-cprocend
-
-endcodeseg _mtrr
-
- END ; End of module
diff --git a/board/MAI/bios_emulator/scitech/src/pm/common/_pcihelp.asm b/board/MAI/bios_emulator/scitech/src/pm/common/_pcihelp.asm
deleted file mode 100644
index 5b8dbcc73a..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/common/_pcihelp.asm
+++ /dev/null
@@ -1,358 +0,0 @@
-;****************************************************************************
-;*
-;* SciTech OS Portability Manager Library
-;*
-;* ========================================================================
-;*
-;* The contents of this file are subject to the SciTech MGL Public
-;* License Version 1.0 (the "License"); you may not use this file
-;* except in compliance with the License. You may obtain a copy of
-;* the License at http://www.scitechsoft.com/mgl-license.txt
-;*
-;* Software distributed under the License is distributed on an
-;* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-;* implied. See the License for the specific language governing
-;* rights and limitations under the License.
-;*
-;* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-;*
-;* The Initial Developer of the Original Code is SciTech Software, Inc.
-;* All Rights Reserved.
-;*
-;* ========================================================================
-;*
-;* Language: 80386 Assembler, TASM 4.0 or NASM
-;* Environment: Any
-;*
-;* Description: Helper assembler functions for PCI access module.
-;*
-;****************************************************************************
-
- IDEAL
-
-include "scitech.mac" ; Memory model macros
-
-header _pcilib
-
-begcodeseg _pcilib
-
-ifdef flatmodel
-
-;----------------------------------------------------------------------------
-; uchar _ASMAPI _BIOS32_service(
-; ulong service,
-; ulong func,
-; ulong *physBase,
-; ulong *length,
-; ulong *serviceOffset,
-; PCIBIOS_entry entry);
-;----------------------------------------------------------------------------
-; Call the BIOS32 services directory
-;----------------------------------------------------------------------------
-cprocstart _BIOS32_service
-
- ARG service:ULONG, func:ULONG, physBase:DPTR, len:DPTR, off:DPTR, entry:QWORD
-
- enter_c
- mov eax,[service]
- mov ebx,[func]
-ifdef USE_NASM
- call far dword [entry]
-else
- call [FWORD entry]
-endif
- mov esi,[physBase]
- mov [esi],ebx
- mov esi,[len]
- mov [esi],ecx
- mov esi,[off]
- mov [esi],edx
- leave_c
- ret
-
-cprocend
-
-endif
-
-;----------------------------------------------------------------------------
-; ushort _ASMAPI _PCIBIOS_isPresent(ulong i_eax,ulong *o_edx,ushort *oeax,
-; uchar *o_cl,PCIBIOS_entry entry)
-;----------------------------------------------------------------------------
-; Call the PCI BIOS to determine if it is present.
-;----------------------------------------------------------------------------
-cprocstart _PCIBIOS_isPresent
-
- ARG i_eax:ULONG, o_edx:DPTR, oeax:DPTR, o_cl:DPTR, entry:QWORD
-
- enter_c
- mov eax,[i_eax]
-ifdef flatmodel
-ifdef USE_NASM
- call far dword [entry]
-else
- call [FWORD entry]
-endif
-else
- int 1Ah
-endif
- _les _si,[o_edx]
- mov [_ES _si],edx
- _les _si,[oeax]
- mov [_ES _si],ax
- _les _si,[o_cl]
- mov [_ES _si],cl
- mov ax,bx
- leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; ulong _PCIBIOS_service(ulong r_eax,ulong r_ebx,ulong r_edi,ulong r_ecx,
-; PCIBIOS_entry entry)
-;----------------------------------------------------------------------------
-; Call the PCI BIOS services, either via the 32-bit protected mode entry
-; point or via the Int 1Ah 16-bit interrupt.
-;----------------------------------------------------------------------------
-cprocstart _PCIBIOS_service
-
- ARG r_eax:ULONG, r_ebx:ULONG, r_edi:ULONG, r_ecx:ULONG, entry:QWORD
-
- enter_c
- mov eax,[r_eax]
- mov ebx,[r_ebx]
- mov edi,[r_edi]
- mov ecx,[r_ecx]
-ifdef flatmodel
-ifdef USE_NASM
- call far dword [entry]
-else
- call [FWORD entry]
-endif
-else
- int 1Ah
-endif
- mov eax,ecx
-ifndef flatmodel
- shld edx,eax,16 ; Return result in DX:AX
-endif
- leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; int _PCIBIOS_getRouting(PCIRoutingOptionsBuffer *buf,PCIBIOS_entry entry);
-;----------------------------------------------------------------------------
-; Get the routing options for PCI devices
-;----------------------------------------------------------------------------
-cprocstart _PCIBIOS_getRouting
-
- ARG buf:DPTR, entry:QWORD
-
- enter_c
- mov eax,0B10Eh
- mov bx,0
- _les _di,[buf]
-ifdef flatmodel
-ifdef USE_NASM
- call far dword [entry]
-else
- call [FWORD entry]
-endif
-else
- int 1Ah
-endif
- movzx eax,ah
- leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; ibool _PCIBIOS_setIRQ(int busDev,int intPin,int IRQ,PCIBIOS_entry entry);
-;----------------------------------------------------------------------------
-; Change the IRQ routing for the PCI device
-;----------------------------------------------------------------------------
-cprocstart _PCIBIOS_setIRQ
-
- ARG busDev:UINT, intPin:UINT, IRQ:UINT, entry:QWORD
-
- enter_c
- mov eax,0B10Fh
- mov bx,[USHORT busDev]
- mov cl,[BYTE intPin]
- mov ch,[BYTE IRQ]
-ifdef flatmodel
-ifdef USE_NASM
- call far dword [entry]
-else
- call [FWORD entry]
-endif
-else
- int 1Ah
-endif
- mov eax,1
- jnc @@1
- xor eax,eax ; Function failed!
-@@1: leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; ulong _PCIBIOS_specialCycle(int bus,ulong data,PCIBIOS_entry entry);
-;----------------------------------------------------------------------------
-; Generate a special cycle via the PCI BIOS.
-;----------------------------------------------------------------------------
-cprocstart _PCIBIOS_specialCycle
-
- ARG bus:UINT, data:ULONG, entry:QWORD
-
- enter_c
- mov eax,0B106h
- mov bh,[BYTE bus]
- mov ecx,[data]
-ifdef flatmodel
-ifdef USE_NASM
- call far dword [entry]
-else
- call [FWORD entry]
-endif
-else
- int 1Ah
-endif
- leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; ushort _PCI_getCS(void)
-;----------------------------------------------------------------------------
-cprocstart _PCI_getCS
-
- mov ax,cs
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; int PM_inpb(int port)
-;----------------------------------------------------------------------------
-; Reads a byte from the specified port
-;----------------------------------------------------------------------------
-cprocstart PM_inpb
-
- ARG port:UINT
-
- push _bp
- mov _bp,_sp
- xor _ax,_ax
- mov _dx,[port]
- in al,dx
- pop _bp
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; int PM_inpw(int port)
-;----------------------------------------------------------------------------
-; Reads a word from the specified port
-;----------------------------------------------------------------------------
-cprocstart PM_inpw
-
- ARG port:UINT
-
- push _bp
- mov _bp,_sp
- xor _ax,_ax
- mov _dx,[port]
- in ax,dx
- pop _bp
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; ulong PM_inpd(int port)
-;----------------------------------------------------------------------------
-; Reads a word from the specified port
-;----------------------------------------------------------------------------
-cprocstart PM_inpd
-
- ARG port:UINT
-
- push _bp
- mov _bp,_sp
- mov _dx,[port]
- in eax,dx
-ifndef flatmodel
- shld edx,eax,16 ; DX:AX = result
-endif
- pop _bp
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void PM_outpb(int port,int value)
-;----------------------------------------------------------------------------
-; Write a byte to the specified port.
-;----------------------------------------------------------------------------
-cprocstart PM_outpb
-
- ARG port:UINT, value:UINT
-
- push _bp
- mov _bp,_sp
- mov _dx,[port]
- mov _ax,[value]
- out dx,al
- pop _bp
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void PM_outpw(int port,int value)
-;----------------------------------------------------------------------------
-; Write a word to the specified port.
-;----------------------------------------------------------------------------
-cprocstart PM_outpw
-
- ARG port:UINT, value:UINT
-
- push _bp
- mov _bp,_sp
- mov _dx,[port]
- mov _ax,[value]
- out dx,ax
- pop _bp
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void PM_outpd(int port,ulong value)
-;----------------------------------------------------------------------------
-; Write a word to the specified port.
-;----------------------------------------------------------------------------
-cprocstart PM_outpd
-
- ARG port:UINT, value:ULONG
-
- push _bp
- mov _bp,_sp
- mov _dx,[port]
- mov eax,[value]
- out dx,eax
- pop _bp
- ret
-
-cprocend
-
-endcodeseg _pcilib
-
- END
diff --git a/board/MAI/bios_emulator/scitech/src/pm/common/agp.c b/board/MAI/bios_emulator/scitech/src/pm/common/agp.c
deleted file mode 100644
index d53bc88e14..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/common/agp.c
+++ /dev/null
@@ -1,189 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: 32-bit Ring 0 device driver
-*
-* Description: Generic module to implement AGP support functions using the
-* SciTech Nucleus AGP support drivers. If the OS provides
-* native AGP support, this module should *NOT* be used. Instead
-* wrappers should be placed around the OS support functions
-* to implement this functionality.
-*
-****************************************************************************/
-
-#include "pmapi.h"
-#ifndef REALMODE
-#include "nucleus/agp.h"
-
-/*--------------------------- Global variables ----------------------------*/
-
-static AGP_devCtx *agp;
-static AGP_driverFuncs driver;
-
-/*----------------------------- Implementation ----------------------------*/
-
-/****************************************************************************
-RETURNS:
-Size of AGP aperture in MB on success, 0 on failure.
-
-REMARKS:
-This function initialises the AGP driver in the system and returns the
-size of the available AGP aperture in megabytes.
-****************************************************************************/
-ulong PMAPI PM_agpInit(void)
-{
- if ((agp = AGP_loadDriver(0)) == NULL)
- return 0;
- driver.dwSize = sizeof(driver);
- if (!agp->QueryFunctions(AGP_GET_DRIVERFUNCS,&driver))
- return 0;
- switch (driver.GetApertureSize()) {
- case agpSize4MB: return 4;
- case agpSize8MB: return 8;
- case agpSize16MB: return 16;
- case agpSize32MB: return 32;
- case agpSize64MB: return 64;
- case agpSize128MB: return 128;
- case agpSize256MB: return 256;
- case agpSize512MB: return 512;
- case agpSize1GB: return 1024;
- case agpSize2GB: return 2048;
- }
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-This function closes down the loaded AGP driver.
-****************************************************************************/
-void PMAPI PM_agpExit(void)
-{
- AGP_unloadDriver(agp);
-}
-
-/****************************************************************************
-PARAMETERS:
-numPages - Number of memory pages that should be reserved
-type - Type of memory to allocate
-physContext - Returns the physical context handle for the mapping
-physAddr - Returns the physical address for the mapping
-
-RETURNS:
-True on success, false on failure.
-
-REMARKS:
-This function reserves a range of physical memory addresses on the system
-bus which the AGP controller will respond to. If this function succeeds,
-the AGP controller can respond to the reserved physical address range on
-the bus. However you must first call AGP_commitPhysical to cause this memory
-to actually be committed for use before it can be accessed.
-****************************************************************************/
-ibool PMAPI PM_agpReservePhysical(
- ulong numPages,
- int type,
- void **physContext,
- PM_physAddr *physAddr)
-{
- switch (type) {
- case PM_agpUncached:
- type = agpUncached;
- break;
- case PM_agpWriteCombine:
- type = agpWriteCombine;
- break;
- case PM_agpIntelDCACHE:
- type = agpIntelDCACHE;
- break;
- default:
- return false;
- }
- return driver.ReservePhysical(numPages,type,physContext,physAddr) == nOK;
-}
-
-/****************************************************************************
-PARAMETERS:
-physContext - Physical AGP context to release
-
-RETURNS:
-True on success, false on failure.
-
-REMARKS:
-This function releases a range of physical memory addresses on the system
-bus which the AGP controller will respond to. All committed memory for
-the physical address range covered by the context will be released.
-****************************************************************************/
-ibool PMAPI PM_agpReleasePhysical(
- void *physContext)
-{
- return driver.ReleasePhysical(physContext) == nOK;
-}
-
-/****************************************************************************
-PARAMETERS:
-physContext - Physical AGP context to commit memory for
-numPages - Number of pages to be committed
-startOffset - Offset in pages into the reserved physical context
-physAddr - Returns the physical address of the committed memory
-
-RETURNS:
-True on success, false on failure.
-
-REMARKS:
-This function commits into the specified physical context that was previously
-reserved by a call to ReservePhysical. You can use the startOffset and
-numPages parameters to only commit portions of the reserved memory range at
-a time.
-****************************************************************************/
-ibool PMAPI PM_agpCommitPhysical(
- void *physContext,
- ulong numPages,
- ulong startOffset,
- PM_physAddr *physAddr)
-{
- return driver.CommitPhysical(physContext,numPages,startOffset,physAddr) == nOK;
-}
-
-/****************************************************************************
-PARAMETERS:
-physContext - Physical AGP context to free memory for
-numPages - Number of pages to be freed
-startOffset - Offset in pages into the reserved physical context
-
-RETURNS:
-True on success, false on failure.
-
-REMARKS:
-This function frees memory previously committed by the CommitPhysical
-function. Note that you can free a portion of a memory range that was
-previously committed if you wish.
-****************************************************************************/
-ibool PMAPI PM_agpFreePhysical(
- void *physContext,
- ulong numPages,
- ulong startOffset)
-{
- return driver.FreePhysical(physContext,numPages,startOffset) == nOK;
-}
-
-#endif /* !REALMODE */
diff --git a/board/MAI/bios_emulator/scitech/src/pm/common/keyboard.c b/board/MAI/bios_emulator/scitech/src/pm/common/keyboard.c
deleted file mode 100644
index 36867bdba7..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/common/keyboard.c
+++ /dev/null
@@ -1,449 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-*
-* Description: Direct keyboard event handling module. This module contains
-* code to process raw scan code information, convert it to
-* virtual scan codes and do code page translation to ASCII
-* for different international keyboard layouts.
-*
-****************************************************************************/
-
-/*---------------------------- Implementation -----------------------------*/
-
-/****************************************************************************
-PARAMETERS:
-scanCode - Keyboard scan code to translate
-table - Code page table to search
-count - Number of entries in the code page table
-
-REMARKS:
-This function translates the scan codes from keyboard scan codes to ASCII
-codes using a binary search on the code page table.
-****************************************************************************/
-static uchar translateScan(
- uchar scanCode,
- codepage_entry_t *table,
- int count)
-{
- codepage_entry_t *test;
- int n,pivot,val;
-
- for (n = count; n > 0; ) {
- pivot = n >> 1;
- test = table + pivot;
- val = scanCode - test->scanCode;
- if (val < 0)
- n = pivot;
- else if (val == 0)
- return test->asciiCode;
- else {
- table = test + 1;
- n -= pivot + 1;
- }
- }
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-This macro/function is used to converts the scan codes reported by the
-keyboard to our event libraries normalised format. We only have one scan
-code for the 'A' key, and use shift modifiers to determine if it is a
-Ctrl-F1, Alt-F1 etc. The raw scan codes from the keyboard work this way,
-but the OS gives us 'cooked' scan codes, we have to translate them back
-to the raw format.
-{secret}
-****************************************************************************/
-void _EVT_maskKeyCode(
- event_t *evt)
-{
- int ascii,scan = EVT_scanCode(evt->message);
-
- evt->message &= ~0xFF;
- if (evt->modifiers & EVT_NUMLOCK) {
- if ((ascii = translateScan(scan,EVT.codePage->numPad,EVT.codePage->numPadLen)) != 0) {
- evt->message |= ascii;
- return;
- }
- }
- if (evt->modifiers & EVT_CTRLSTATE) {
- evt->message |= translateScan(scan,EVT.codePage->ctrl,EVT.codePage->ctrlLen);
- return;
- }
- if (evt->modifiers & EVT_CAPSLOCK) {
- if (evt->modifiers & EVT_SHIFTKEY) {
- if ((ascii = translateScan(scan,EVT.codePage->shiftCaps,EVT.codePage->shiftCapsLen)) != 0) {
- evt->message |= ascii;
- return;
- }
- }
- else {
- if ((ascii = translateScan(scan,EVT.codePage->caps,EVT.codePage->capsLen)) != 0) {
- evt->message |= ascii;
- return;
- }
- }
- }
- if (evt->modifiers & EVT_SHIFTKEY) {
- if ((ascii = translateScan(scan,EVT.codePage->shift,EVT.codePage->shiftLen)) != 0) {
- evt->message |= ascii;
- return;
- }
- }
- evt->message |= translateScan(scan,EVT.codePage->normal,EVT.codePage->normalLen);
-}
-
-/****************************************************************************
-REMARKS:
-Returns true if the key with the specified scan code is being held down.
-****************************************************************************/
-static ibool _EVT_isKeyDown(
- uchar scanCode)
-{
- if (scanCode > 0x7F)
- return false;
- else
- return EVT.keyTable[scanCode] != 0;
-}
-
-/****************************************************************************
-PARAMETERS:
-what - Event code
-message - Event message (ASCII code and scan code)
-
-REMARKS:
-Adds a new keyboard event to the event queue. This routine is called from
-within the keyboard interrupt subroutine!
-
-NOTE: Interrupts are OFF when this routine is called by the keyboard ISR,
- and we leave them OFF the entire time.
-****************************************************************************/
-static void addKeyEvent(
- uint what,
- uint message)
-{
- event_t evt;
-
- if (EVT.count < EVENTQSIZE) {
- /* Save information in event record */
- evt.when = _EVT_getTicks();
- evt.what = what;
- evt.message = message | 0x10000UL;
- evt.where_x = 0;
- evt.where_y = 0;
- evt.relative_x = 0;
- evt.relative_y = 0;
- evt.modifiers = EVT.keyModifiers;
- if (evt.what == EVT_KEYREPEAT) {
- if (EVT.oldKey != -1)
- EVT.evtq[EVT.oldKey].message += 0x10000UL;
- else {
- EVT.oldKey = EVT.freeHead;
- addEvent(&evt); /* Add to tail of event queue */
- }
- }
- else {
-#ifdef __QNX__
- _EVT_maskKeyCode(&evt);
-#endif
- addEvent(&evt); /* Add to tail of event queue */
- }
- EVT.oldMove = -1;
- }
-}
-
-/****************************************************************************
-REMARKS:
-This function waits for the keyboard controller to set the ready-for-write
-bit.
-****************************************************************************/
-static int kbWaitForWriteReady(void)
-{
- int timeout = 8192;
- while ((timeout > 0) && (PM_inpb(0x64) & 0x02))
- timeout--;
- return (timeout > 0);
-}
-
-/****************************************************************************
-REMARKS:
-This function waits for the keyboard controller to set the ready-for-read
-bit.
-****************************************************************************/
-static int kbWaitForReadReady(void)
-{
- int timeout = 8192;
- while ((timeout > 0) && (!(PM_inpb(0x64) & 0x01)))
- timeout--;
- return (timeout > 0);
-}
-
-/****************************************************************************
-PARAMETERS:
-data - Data to send to the keyboard
-
-REMARKS:
-This function sends a data byte to the keyboard controller.
-****************************************************************************/
-static int kbSendData(
- uchar data)
-{
- int resends = 4;
- int timeout, temp;
-
- do {
- if (!kbWaitForWriteReady())
- return 0;
- PM_outpb(0x60,data);
- timeout = 8192;
- while (--timeout > 0) {
- if (!kbWaitForReadReady())
- return 0;
- temp = PM_inpb(0x60);
- if (temp == 0xFA)
- return 1;
- if (temp == 0xFE)
- break;
- }
- } while ((resends-- > 0) && (timeout > 0));
- return 0;
-}
-
-/****************************************************************************
-PARAMETERS:
-modifiers - Keyboard modifier flags
-
-REMARKS:
-This function re-programs the LED's on the keyboard to the values stored
-in the passed in modifier flags. If the 'allowLEDS' flag is false, this
-function does nothing.
-****************************************************************************/
-static void setLEDS(
- uint modifiers)
-{
- if (EVT.allowLEDS) {
- if (!kbSendData(0xED) || !kbSendData((modifiers>>9) & 7)) {
- kbSendData(0xF4);
- }
- }
-}
-
-/****************************************************************************
-REMARKS:
-Function to process raw scan codes read from the keyboard controller.
-
-NOTE: Interrupts are OFF when this routine is called by the keyboard ISR,
- and we leave them OFF the entire time.
-{secret}
-****************************************************************************/
-void processRawScanCode(
- int scan)
-{
- static int pauseLoop = 0;
- static int extended = 0;
- int what;
-
- if (pauseLoop) {
- /* Skip scan codes until the pause key sequence has been read */
- pauseLoop--;
- }
- else if (scan == 0xE0) {
- /* This signals the start of an extended scan code sequence */
- extended = 1;
- }
- else if (scan == 0xE1) {
- /* The Pause key sends a strange scan code sequence, which is:
- *
- * E1 1D 52 E1 9D D2
- *
- * However there is never any release code nor any auto-repeat for
- * this key. For this reason we simply ignore the key and skip the
- * next 5 scan codes read from the keyboard.
- */
- pauseLoop = 5;
- }
- else {
- /* Process the scan code normally (it may be an extended code
- * however!). Bit 7 means key was released, and bits 0-6 are the
- * scan code.
- */
- what = (scan & 0x80) ? EVT_KEYUP : EVT_KEYDOWN;
- scan &= 0x7F;
- if (extended) {
- extended = 0;
- if (scan == 0x2A || scan == 0x36) {
- /* Ignore these extended scan code sequences. These are
- * used by the keyboard controller to wrap around certain
- * key sequences for the keypad (and when NUMLOCK is down
- * internally).
- */
- return;
- }
-
- /* Convert extended codes for key sequences that we map to
- * virtual scan codes so the user can detect them in their
- * code.
- */
- switch (scan) {
- case KB_leftCtrl: scan = KB_rightCtrl; break;
- case KB_leftAlt: scan = KB_rightAlt; break;
- case KB_divide: scan = KB_padDivide; break;
- case KB_enter: scan = KB_padEnter; break;
- case KB_padTimes: scan = KB_sysReq; break;
- }
- }
- else {
- /* Convert regular scan codes for key sequences that we map to
- * virtual scan codes so the user can detect them in their
- * code.
- */
- switch (scan) {
- case KB_left: scan = KB_padLeft; break;
- case KB_right: scan = KB_padRight; break;
- case KB_up: scan = KB_padUp; break;
- case KB_down: scan = KB_padDown; break;
- case KB_insert: scan = KB_padInsert; break;
- case KB_delete: scan = KB_padDelete; break;
- case KB_home: scan = KB_padHome; break;
- case KB_end: scan = KB_padEnd; break;
- case KB_pageUp: scan = KB_padPageUp; break;
- case KB_pageDown: scan = KB_padPageDown; break;
- }
- }
-
- /* Determine if the key is an UP, DOWN or REPEAT and maintain the
- * up/down status of all keys in our global key array.
- */
- if (what == EVT_KEYDOWN) {
- if (EVT.keyTable[scan])
- what = EVT_KEYREPEAT;
- else
- EVT.keyTable[scan] = scan;
- }
- else {
- EVT.keyTable[scan] = 0;
- }
-
- /* Handle shift key modifiers */
- if (what != EVT_KEYREPEAT) {
- switch (scan) {
- case KB_capsLock:
- if (what == EVT_KEYDOWN)
- EVT.keyModifiers ^= EVT_CAPSLOCK;
- setLEDS(EVT.keyModifiers);
- break;
- case KB_numLock:
- if (what == EVT_KEYDOWN)
- EVT.keyModifiers ^= EVT_NUMLOCK;
- setLEDS(EVT.keyModifiers);
- break;
- case KB_scrollLock:
- if (what == EVT_KEYDOWN)
- EVT.keyModifiers ^= EVT_SCROLLLOCK;
- setLEDS(EVT.keyModifiers);
- break;
- case KB_leftShift:
- if (what == EVT_KEYUP)
- EVT.keyModifiers &= ~EVT_LEFTSHIFT;
- else
- EVT.keyModifiers |= EVT_LEFTSHIFT;
- break;
- case KB_rightShift:
- if (what == EVT_KEYUP)
- EVT.keyModifiers &= ~EVT_RIGHTSHIFT;
- else
- EVT.keyModifiers |= EVT_RIGHTSHIFT;
- break;
- case KB_leftCtrl:
- if (what == EVT_KEYUP)
- EVT.keyModifiers &= ~EVT_LEFTCTRL;
- else
- EVT.keyModifiers |= EVT_LEFTCTRL;
- break;
- case KB_rightCtrl:
- if (what == EVT_KEYUP)
- EVT.keyModifiers &= ~EVT_RIGHTCTRL;
- else
- EVT.keyModifiers |= EVT_RIGHTCTRL;
- break;
- case KB_leftAlt:
- if (what == EVT_KEYUP)
- EVT.keyModifiers &= ~EVT_LEFTALT;
- else
- EVT.keyModifiers |= EVT_LEFTALT;
- break;
- case KB_rightAlt:
- if (what == EVT_KEYUP)
- EVT.keyModifiers &= ~EVT_RIGHTALT;
- else
- EVT.keyModifiers |= EVT_RIGHTALT;
- break;
-#ifdef SUPPORT_CTRL_ALT_DEL
- case KB_delete:
- if ((EVT.keyModifiers & EVT_CTRLSTATE) && (EVT.keyModifiers & EVT_ALTSTATE))
- Reboot();
- break;
-#endif
- }
- }
-
- /* Add the untranslated key code to the event queue. All
- * translation to ASCII from the key codes occurs when the key
- * is extracted from the queue, saving time in the low level
- * interrupt handler.
- */
- addKeyEvent(what,scan << 8);
- }
-}
-
-/****************************************************************************
-DESCRIPTION:
-Enables/disables the update of the keyboard LED status indicators.
-
-HEADER:
-event.h
-
-PARAMETERS:
-enable - True to enable, false to disable
-
-REMARKS:
-Enables the update of the keyboard LED status indicators. Sometimes it may
-be convenient in the application to turn off the updating of the LED
-status indicators (such as if a game is using the CAPSLOCK key for some
-function). Passing in a value of FALSE to this function will turn off all
-the LEDS, and stop updating them when the internal status changes (note
-however that internally we still keep track of the toggle key status!).
-****************************************************************************/
-void EVTAPI EVT_allowLEDS(
- ibool enable)
-{
- EVT.allowLEDS = true;
- if (enable)
- setLEDS(EVT.keyModifiers);
- else
- setLEDS(0);
- EVT.allowLEDS = enable;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/common/malloc.c b/board/MAI/bios_emulator/scitech/src/pm/common/malloc.c
deleted file mode 100644
index 83ef22113c..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/common/malloc.c
+++ /dev/null
@@ -1,205 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-*
-* Description: Module for implementing the PM library overrideable memory
-* allocator functions.
-*
-****************************************************************************/
-
-#include "pmapi.h"
-
-/*--------------------------- Global variables ----------------------------*/
-
-void * (*__PM_malloc)(size_t size) = malloc;
-void * (*__PM_calloc)(size_t nelem,size_t size) = calloc;
-void * (*__PM_realloc)(void *ptr,size_t size) = realloc;
-void (*__PM_free)(void *p) = free;
-
-/*----------------------------- Implementation ----------------------------*/
-
-/****************************************************************************
-DESCRIPTION:
-Use local memory allocation routines.
-
-HEADER:
-pmapi.h
-
-PARAMETERS:
-malloc - Pointer to new malloc routine to use
-calloc - Pointer to new caalloc routine to use
-realloc - Pointer to new realloc routine to use
-free - Pointer to new free routine to use
-
-REMARKS:
-Tells the PM library to use a set of user specified memory allocation
-routines instead of using the normal malloc/calloc/realloc/free standard
-C library functions. This is useful if you wish to use a third party
-debugging malloc library or perhaps a set of faster memory allocation
-functions with the PM library, or any apps that use the PM library (such as
-the MGL). Once you have registered your memory allocation routines, all
-calls to PM_malloc, PM_calloc, PM_realloc and PM_free will be revectored to
-your local memory allocation routines.
-
-This is also useful if you need to keep track of just how much physical
-memory your program has been using. You can use the PM_availableMemory
-function to find out how much physical memory is available when the program
-starts, and then you can use your own local memory allocation routines to
-keep track of how much memory has been used and freed.
-
-NOTE: This function should be called right at the start of your application,
- before you initialise any other components or libraries.
-
-NOTE: Code compiled into Binary Portable DLL's and Drivers automatically
- end up calling these functions via the BPD C runtime library.
-
-SEE ALSO:
-PM_malloc, PM_calloc, PM_realloc, PM_free, PM_availableMemory
-****************************************************************************/
-void PMAPI PM_useLocalMalloc(
- void * (*malloc)(size_t size),
- void * (*calloc)(size_t nelem,size_t size),
- void * (*realloc)(void *ptr,size_t size),
- void (*free)(void *p))
-{
- __PM_malloc = malloc;
- __PM_calloc = calloc;
- __PM_realloc = realloc;
- __PM_free = free;
-}
-
-/****************************************************************************
-DESCRIPTION:
-Allocate a block of memory.
-
-HEADER:
-pmapi.h
-
-PARAMETERS:
-size - Size of block to allocate in bytes
-
-RETURNS:
-Pointer to allocated block, or NULL if out of memory.
-
-REMARKS:
-Allocates a block of memory of length size. If you have changed the memory
-allocation routines with the PM_useLocalMalloc function, then calls to this
-function will actually make calls to the local memory allocation routines
-that you have registered.
-
-SEE ALSO:
-PM_calloc, PM_realloc, PM_free, PM_useLocalMalloc
-****************************************************************************/
-void * PMAPI PM_malloc(
- size_t size)
-{
- return __PM_malloc(size);
-}
-
-/****************************************************************************
-DESCRIPTION:
-Allocate and clear a large memory block.
-
-HEADER:
-pmapi.h
-
-PARAMETERS:
-nelem - number of contiguous size-byte units to allocate
-size - size of unit in bytes
-
-RETURNS:
-Pointer to allocated memory if successful, NULL if out of memory.
-
-REMARKS:
-Allocates a block of memory of length (size * nelem), and clears the
-allocated area with zeros (0). If you have changed the memory allocation
-routines with the PM_useLocalMalloc function, then calls to this function
-will actually make calls to the local memory allocation routines that you
-have registered.
-
-SEE ALSO:
-PM_malloc, PM_realloc, PM_free, PM_useLocalMalloc
-****************************************************************************/
-void * PMAPI PM_calloc(
- size_t nelem,
- size_t size)
-{
- return __PM_calloc(nelem,size);
-}
-
-/****************************************************************************
-DESCRIPTION:
-Re-allocate a block of memory
-
-HEADER:
-pmapi.h
-
-PARAMETERS:
-ptr - Pointer to block to resize
-size - size of unit in bytes
-
-RETURNS:
-Pointer to allocated memory if successful, NULL if out of memory.
-
-REMARKS:
-This function reallocates a block of memory that has been previously been
-allocated to the new of size. The new size may be smaller or larger than
-the original block of memory. If you have changed the memory allocation
-routines with the PM_useLocalMalloc function, then calls to this function
-will actually make calls to the local memory allocation routines that you
-have registered.
-
-SEE ALSO:
-PM_malloc, PM_calloc, PM_free, PM_useLocalMalloc
-****************************************************************************/
-void * PMAPI PM_realloc(
- void *ptr,
- size_t size)
-{
- return __PM_realloc(ptr,size);
-}
-
-/****************************************************************************
-DESCRIPTION:
-Frees a block of memory.
-
-HEADER:
-pmapi.h
-
-PARAMETERS:
-p - Pointer to memory block to free
-
-REMARKS:
-Frees a block of memory previously allocated with either PM_malloc,
-PM_calloc or PM_realloc.
-
-SEE ALSO:
-PM_malloc, PM_calloc, PM_realloc, PM_useLocalMalloc
-****************************************************************************/
-void PMAPI PM_free(
- void *p)
-{
- __PM_free(p);
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/common/mtrr.c b/board/MAI/bios_emulator/scitech/src/pm/common/mtrr.c
deleted file mode 100644
index eed5f45c9e..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/common/mtrr.c
+++ /dev/null
@@ -1,867 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Heavily based on code copyright (C) Richard Gooch
-*
-* Language: ANSI C
-* Environment: 32-bit Ring 0 device driver
-*
-* Description: Generic Memory Type Range Register (MTRR) functions to
-* manipulate the MTRR registers on supported CPU's. This code
-* *must* run at ring 0, so you can't normally include this
-* code directly in normal applications (the except is DOS4GW
-* apps which run at ring 0 under real DOS). Thus this code
-* will normally be compiled into a ring 0 device driver for
-* the target operating system.
-*
-****************************************************************************/
-
-#include "pmapi.h"
-#include "ztimerc.h"
-#include "mtrr.h"
-
-#ifndef REALMODE
-
-/*--------------------------- Global variables ----------------------------*/
-
-/* Intel pre-defined MTRR registers */
-
-#define NUM_FIXED_RANGES 88
-#define INTEL_cap_MSR 0x0FE
-#define INTEL_defType_MSR 0x2FF
-#define INTEL_fix64K_00000_MSR 0x250
-#define INTEL_fix16K_80000_MSR 0x258
-#define INTEL_fix16K_A0000_MSR 0x259
-#define INTEL_fix4K_C0000_MSR 0x268
-#define INTEL_fix4K_C8000_MSR 0x269
-#define INTEL_fix4K_D0000_MSR 0x26A
-#define INTEL_fix4K_D8000_MSR 0x26B
-#define INTEL_fix4K_E0000_MSR 0x26C
-#define INTEL_fix4K_E8000_MSR 0x26D
-#define INTEL_fix4K_F0000_MSR 0x26E
-#define INTEL_fix4K_F8000_MSR 0x26F
-
-/* Macros to find the address of a paricular MSR register */
-
-#define INTEL_physBase_MSR(reg) (0x200 + 2 * (reg))
-#define INTEL_physMask_MSR(reg) (0x200 + 2 * (reg) + 1)
-
-/* Cyrix CPU configuration register indexes */
-#define CX86_CCR0 0xC0
-#define CX86_CCR1 0xC1
-#define CX86_CCR2 0xC2
-#define CX86_CCR3 0xC3
-#define CX86_CCR4 0xE8
-#define CX86_CCR5 0xE9
-#define CX86_CCR6 0xEA
-#define CX86_DIR0 0xFE
-#define CX86_DIR1 0xFF
-#define CX86_ARR_BASE 0xC4
-#define CX86_RCR_BASE 0xDC
-
-/* Structure to maintain machine state while updating MTRR registers */
-
-typedef struct {
- ulong flags;
- ulong defTypeLo;
- ulong defTypeHi;
- ulong cr4Val;
- ulong ccr3;
- } MTRRContext;
-
-static int numMTRR = -1;
-static int cpuFamily,cpuType,cpuStepping;
-static void (*getMTRR)(uint reg,ulong *base,ulong *size,int *type) = NULL;
-static void (*setMTRR)(uint reg,ulong base,ulong size,int type) = NULL;
-static int (*getFreeRegion)(ulong base,ulong size) = NULL;
-
-/*----------------------------- Implementation ----------------------------*/
-
-/****************************************************************************
-RETURNS:
-Returns non-zero if we have the write-combining memory type
-****************************************************************************/
-static int MTRR_haveWriteCombine(void)
-{
- ulong config,dummy;
-
- switch (cpuFamily) {
- case CPU_AMD:
- if (cpuType < CPU_AMDAthlon) {
- /* AMD K6-2 stepping 8 and later support the MTRR registers.
- * The earlier K6-2 steppings (300Mhz models) do not
- * support MTRR's.
- */
- if ((cpuType < CPU_AMDK6_2) || (cpuType == CPU_AMDK6_2 && cpuStepping < 8))
- return 0;
- return 1;
- }
- /* Fall through for AMD Athlon which uses P6 style MTRR's */
- case CPU_Intel:
- _MTRR_readMSR(INTEL_cap_MSR,&config,&dummy);
- return (config & (1 << 10));
- case CPU_Cyrix:
- /* Cyrix 6x86 and later support the MTRR registers */
- if (cpuType < CPU_Cyrix6x86)
- return 0;
- return 1;
- }
- return 0;
-}
-
-/****************************************************************************
-PARAMETERS:
-base - The starting physical base address of the region
-size - The size in bytes of the region
-
-RETURNS:
-The index of the region on success, else -1 on error.
-
-REMARKS:
-Generic function to find the location of a free MTRR register to be used
-for creating a new mapping.
-****************************************************************************/
-static int GENERIC_getFreeRegion(
- ulong base,
- ulong size)
-{
- int i,ltype;
- ulong lbase,lsize;
-
- for (i = 0; i < numMTRR; i++) {
- getMTRR(i,&lbase,&lsize,&ltype);
- if (lsize < 1)
- return i;
- }
- (void)base;
- (void)size;
- return -1;
-}
-
-/****************************************************************************
-PARAMETERS:
-base - The starting physical base address of the region
-size - The size in bytes of the region
-
-RETURNS:
-The index of the region on success, else -1 on error.
-
-REMARKS:
-Generic function to find the location of a free MTRR register to be used
-for creating a new mapping.
-****************************************************************************/
-static int AMDK6_getFreeRegion(
- ulong base,
- ulong size)
-{
- int i,ltype;
- ulong lbase,lsize;
-
- for (i = 0; i < numMTRR; i++) {
- getMTRR(i,&lbase,&lsize,&ltype);
- if (lsize < 1)
- return i;
- }
- (void)base;
- (void)size;
- return -1;
-}
-
-/****************************************************************************
-PARAMETERS:
-base - The starting physical base address of the region
-size - The size in bytes of the region
-
-RETURNS:
-The index of the region on success, else -1 on error.
-
-REMARKS:
-Cyrix specific function to find the location of a free MTRR register to be
-used for creating a new mapping.
-****************************************************************************/
-static int CYRIX_getFreeRegion(
- ulong base,
- ulong size)
-{
- int i,ltype;
- ulong lbase, lsize;
-
- if (size > 0x2000000UL) {
- /* If we are to set up a region >32M then look at ARR7 immediately */
- getMTRR(7,&lbase,&lsize,&ltype);
- if (lsize < 1)
- return 7;
- }
- else {
- /* Check ARR0-6 registers */
- for (i = 0; i < 7; i++) {
- getMTRR(i,&lbase,&lsize,&ltype);
- if (lsize < 1)
- return i;
- }
- /* Try ARR7 but its size must be at least 256K */
- getMTRR(7,&lbase,&lsize,&ltype);
- if ((lsize < 1) && (size >= 0x40000))
- return i;
- }
- (void)base;
- return -1;
-}
-
-/****************************************************************************
-PARAMETERS:
-c - Place to store the machine context across the call
-
-REMARKS:
-Puts the processor into a state where MTRRs can be safely updated
-****************************************************************************/
-static void MTRR_beginUpdate(
- MTRRContext *c)
-{
- c->flags = _MTRR_disableInt();
- if (cpuFamily != CPU_AMD || (cpuFamily == CPU_AMD && cpuType >= CPU_AMDAthlon)) {
- switch (cpuFamily) {
- case CPU_Intel:
- case CPU_AMD:
- /* Disable MTRRs, and set the default type to uncached */
- c->cr4Val = _MTRR_saveCR4();
- _MTRR_readMSR(INTEL_defType_MSR,&c->defTypeLo,&c->defTypeHi);
- _MTRR_writeMSR(INTEL_defType_MSR,c->defTypeLo & 0xF300UL,c->defTypeHi);
- break;
- case CPU_Cyrix:
- c->ccr3 = _MTRR_getCx86(CX86_CCR3);
- _MTRR_setCx86(CX86_CCR3, (uchar)((c->ccr3 & 0x0F) | 0x10));
- break;
- }
- }
-}
-
-/****************************************************************************
-PARAMETERS:
-c - Place to restore the machine context from
-
-REMARKS:
-Restores the processor after updating any of the registers
-****************************************************************************/
-static void MTRR_endUpdate(
- MTRRContext *c)
-{
- if (cpuFamily != CPU_AMD || (cpuFamily == CPU_AMD && cpuType >= CPU_AMDAthlon)) {
- PM_flushTLB();
- switch (cpuFamily) {
- case CPU_Intel:
- case CPU_AMD:
- _MTRR_writeMSR(INTEL_defType_MSR,c->defTypeLo,c->defTypeHi);
- _MTRR_restoreCR4(c->cr4Val);
- break;
- case CPU_Cyrix:
- _MTRR_setCx86(CX86_CCR3,(uchar)c->ccr3);
- break;
- }
- }
-
- /* Re-enable interrupts (if enabled previously) */
- _MTRR_restoreInt(c->flags);
-}
-
-/****************************************************************************
-PARAMETERS:
-reg - MTRR register to read
-base - Place to store the starting physical base address of the region
-size - Place to store the size in bytes of the region
-type - Place to store the type of the MTRR register
-
-REMARKS:
-Intel specific function to read the value of a specific MTRR register.
-****************************************************************************/
-static void INTEL_getMTRR(
- uint reg,
- ulong *base,
- ulong *size,
- int *type)
-{
- ulong hi,maskLo,baseLo;
-
- _MTRR_readMSR(INTEL_physMask_MSR(reg),&maskLo,&hi);
- if ((maskLo & 0x800) == 0) {
- /* MTRR is disabled, so it is free */
- *base = 0;
- *size = 0;
- *type = 0;
- return;
- }
- _MTRR_readMSR(INTEL_physBase_MSR(reg),&baseLo,&hi);
- maskLo = (maskLo & 0xFFFFF000UL);
- *size = ~(maskLo - 1);
- *base = (baseLo & 0xFFFFF000UL);
- *type = (baseLo & 0xFF);
-}
-
-/****************************************************************************
-PARAMETERS:
-reg - MTRR register to set
-base - The starting physical base address of the region
-size - The size in bytes of the region
-type - Type to place into the MTRR register
-
-REMARKS:
-Intel specific function to set the value of a specific MTRR register to
-the passed in base, size and type.
-****************************************************************************/
-static void INTEL_setMTRR(
- uint reg,
- ulong base,
- ulong size,
- int type)
-{
- MTRRContext c;
-
- MTRR_beginUpdate(&c);
- if (size == 0) {
- /* The invalid bit is kept in the mask, so we simply clear the
- * relevant mask register to disable a range.
- */
- _MTRR_writeMSR(INTEL_physMask_MSR(reg),0,0);
- }
- else {
- _MTRR_writeMSR(INTEL_physBase_MSR(reg),base | type,0);
- _MTRR_writeMSR(INTEL_physMask_MSR(reg),~(size - 1) | 0x800,0);
- }
- MTRR_endUpdate(&c);
-}
-
-/****************************************************************************
-REMARKS:
-Disabled banked write combing for Intel processors. We always disable this
-because it invariably causes problems with older hardware.
-****************************************************************************/
-static void INTEL_disableBankedWriteCombine(void)
-{
- MTRRContext c;
-
- MTRR_beginUpdate(&c);
- _MTRR_writeMSR(INTEL_fix16K_A0000_MSR,0,0);
- MTRR_endUpdate(&c);
-}
-
-/****************************************************************************
-PARAMETERS:
-reg - MTRR register to set
-base - The starting physical base address of the region
-size - The size in bytes of the region
-type - Type to place into the MTRR register
-
-REMARKS:
-Intel specific function to set the value of a specific MTRR register to
-the passed in base, size and type.
-****************************************************************************/
-static void AMD_getMTRR(
- uint reg,
- ulong *base,
- ulong *size,
- int *type)
-{
- ulong low,high;
-
- /* Upper dword is region 1, lower is region 0 */
- _MTRR_readMSR(0xC0000085, &low, &high);
- if (reg == 1)
- low = high;
-
- /* Find the base and type for the region */
- *base = low & 0xFFFE0000;
- *type = 0;
- if (low & 1)
- *type = PM_MTRR_UNCACHABLE;
- if (low & 2)
- *type = PM_MTRR_WRCOMB;
- if ((low & 3) == 0) {
- *size = 0;
- return;
- }
-
- /* This needs a little explaining. The size is stored as an
- * inverted mask of bits of 128K granularity 15 bits long offset
- * 2 bits
- *
- * So to get a size we do invert the mask and add 1 to the lowest
- * mask bit (4 as its 2 bits in). This gives us a size we then shift
- * to turn into 128K blocks
- *
- * eg 111 1111 1111 1100 is 512K
- *
- * invert 000 0000 0000 0011
- * +1 000 0000 0000 0100
- * *128K ...
- */
- low = (~low) & 0x0FFFC;
- *size = (low + 4) << 15;
-}
-
-/****************************************************************************
-PARAMETERS:
-reg - MTRR register to set
-base - The starting physical base address of the region
-size - The size in bytes of the region
-type - Type to place into the MTRR register
-
-REMARKS:
-Intel specific function to set the value of a specific MTRR register to
-the passed in base, size and type.
-****************************************************************************/
-static void AMD_setMTRR(
- uint reg,
- ulong base,
- ulong size,
- int type)
-{
- ulong low,high,newVal;
- MTRRContext c;
-
- MTRR_beginUpdate(&c);
- _MTRR_readMSR(0xC0000085, &low, &high);
- if (size == 0) {
- /* Clear register to disable */
- if (reg)
- high = 0;
- else
- low = 0;
- }
- else {
- /* Set the register to the base (already shifted for us), the
- * type (off by one) and an inverted bitmask of the size
- * The size is the only odd bit. We are fed say 512K
- * We invert this and we get 111 1111 1111 1011 but
- * if you subtract one and invert you get the desired
- * 111 1111 1111 1100 mask
- */
- newVal = (((~(size-1)) >> 15) & 0x0001FFFC) | base | (type+1);
- if (reg)
- high = newVal;
- else
- low = newVal;
- }
-
- /* The writeback rule is quite specific. See the manual. Its
- * disable local interrupts, write back the cache, set the MTRR
- */
- PM_flushTLB();
- _MTRR_writeMSR(0xC0000085, low, high);
- MTRR_endUpdate(&c);
-}
-
-/****************************************************************************
-PARAMETERS:
-reg - MTRR register to set
-base - The starting physical base address of the region
-size - The size in bytes of the region
-type - Type to place into the MTRR register
-
-REMARKS:
-Intel specific function to set the value of a specific MTRR register to
-the passed in base, size and type.
-****************************************************************************/
-static void CYRIX_getMTRR(
- uint reg,
- ulong *base,
- ulong *size,
- int *type)
-{
- MTRRContext c;
- uchar arr = CX86_ARR_BASE + reg*3;
- uchar rcr,shift;
-
- /* Save flags and disable interrupts */
- MTRR_beginUpdate(&c);
- ((uchar*)base)[3] = _MTRR_getCx86(arr);
- ((uchar*)base)[2] = _MTRR_getCx86((uchar)(arr+1));
- ((uchar*)base)[1] = _MTRR_getCx86((uchar)(arr+2));
- rcr = _MTRR_getCx86((uchar)(CX86_RCR_BASE + reg));
- MTRR_endUpdate(&c);
-
- /* Enable interrupts if it was enabled previously */
- shift = ((uchar*)base)[1] & 0x0f;
- *base &= 0xFFFFF000UL;
-
- /* Power of two, at least 4K on ARR0-ARR6, 256K on ARR7
- * Note: shift==0xF means 4G, this is unsupported.
- */
- if (shift)
- *size = (reg < 7 ? 0x800UL : 0x20000UL) << shift;
- else
- *size = 0;
-
- /* Bit 0 is Cache Enable on ARR7, Cache Disable on ARR0-ARR6 */
- if (reg < 7) {
- switch (rcr) {
- case 1: *type = PM_MTRR_UNCACHABLE; break;
- case 8: *type = PM_MTRR_WRBACK; break;
- case 9: *type = PM_MTRR_WRCOMB; break;
- case 24:
- default: *type = PM_MTRR_WRTHROUGH; break;
- }
- }
- else {
- switch (rcr) {
- case 0: *type = PM_MTRR_UNCACHABLE; break;
- case 8: *type = PM_MTRR_WRCOMB; break;
- case 9: *type = PM_MTRR_WRBACK; break;
- case 25:
- default: *type = PM_MTRR_WRTHROUGH; break;
- }
- }
-}
-
-/****************************************************************************
-PARAMETERS:
-reg - MTRR register to set
-base - The starting physical base address of the region
-size - The size in bytes of the region
-type - Type to place into the MTRR register
-
-REMARKS:
-Intel specific function to set the value of a specific MTRR register to
-the passed in base, size and type.
-****************************************************************************/
-static void CYRIX_setMTRR(
- uint reg,
- ulong base,
- ulong size,
- int type)
-{
- MTRRContext c;
- uchar arr = CX86_ARR_BASE + reg*3;
- uchar arr_type,arr_size;
-
- /* Count down from 32M (ARR0-ARR6) or from 2G (ARR7) */
- size >>= (reg < 7 ? 12 : 18);
- size &= 0x7FFF; /* Make sure arr_size <= 14 */
- for (arr_size = 0; size; arr_size++, size >>= 1)
- ;
- if (reg < 7) {
- switch (type) {
- case PM_MTRR_UNCACHABLE: arr_type = 1; break;
- case PM_MTRR_WRCOMB: arr_type = 9; break;
- case PM_MTRR_WRTHROUGH: arr_type = 24; break;
- default: arr_type = 8; break;
- }
- }
- else {
- switch (type) {
- case PM_MTRR_UNCACHABLE: arr_type = 0; break;
- case PM_MTRR_WRCOMB: arr_type = 8; break;
- case PM_MTRR_WRTHROUGH: arr_type = 25; break;
- default: arr_type = 9; break;
- }
- }
- MTRR_beginUpdate(&c);
- _MTRR_setCx86((uchar)arr, ((uchar*)&base)[3]);
- _MTRR_setCx86((uchar)(arr+1), ((uchar*)&base)[2]);
- _MTRR_setCx86((uchar)(arr+2), (uchar)((((uchar*)&base)[1]) | arr_size));
- _MTRR_setCx86((uchar)(CX86_RCR_BASE + reg), (uchar)arr_type);
- MTRR_endUpdate(&c);
-}
-
-/****************************************************************************
-REMARKS:
-On Cyrix 6x86(MX) and MII the ARR3 is special: it has connection
-with the SMM (System Management Mode) mode. So we need the following:
-Check whether SMI_LOCK (CCR3 bit 0) is set
- if it is set, ARR3 cannot be changed (it cannot be changed until the
- next processor reset)
- if it is reset, then we can change it, set all the needed bits:
- - disable access to SMM memory through ARR3 range (CCR1 bit 7 reset)
- - disable access to SMM memory (CCR1 bit 2 reset)
- - disable SMM mode (CCR1 bit 1 reset)
- - disable write protection of ARR3 (CCR6 bit 1 reset)
- - (maybe) disable ARR3
-Just to be sure, we enable ARR usage by the processor (CCR5 bit 5 set)
-****************************************************************************/
-static void CYRIX_initARR(void)
-{
- MTRRContext c;
- uchar ccr[7];
- int ccrc[7] = { 0, 0, 0, 0, 0, 0, 0 };
-
- /* Begin updating */
- MTRR_beginUpdate(&c);
-
- /* Save all CCRs locally */
- ccr[0] = _MTRR_getCx86(CX86_CCR0);
- ccr[1] = _MTRR_getCx86(CX86_CCR1);
- ccr[2] = _MTRR_getCx86(CX86_CCR2);
- ccr[3] = (uchar)c.ccr3;
- ccr[4] = _MTRR_getCx86(CX86_CCR4);
- ccr[5] = _MTRR_getCx86(CX86_CCR5);
- ccr[6] = _MTRR_getCx86(CX86_CCR6);
- if (ccr[3] & 1)
- ccrc[3] = 1;
- else {
- /* Disable SMM mode (bit 1), access to SMM memory (bit 2) and
- * access to SMM memory through ARR3 (bit 7).
- */
- if (ccr[6] & 0x02) {
- ccr[6] &= 0xFD;
- ccrc[6] = 1; /* Disable write protection of ARR3. */
- _MTRR_setCx86(CX86_CCR6,ccr[6]);
- }
- }
-
- /* If we changed CCR1 in memory, change it in the processor, too. */
- if (ccrc[1])
- _MTRR_setCx86(CX86_CCR1,ccr[1]);
-
- /* Enable ARR usage by the processor */
- if (!(ccr[5] & 0x20)) {
- ccr[5] |= 0x20;
- ccrc[5] = 1;
- _MTRR_setCx86(CX86_CCR5,ccr[5]);
- }
-
- /* We are finished updating */
- MTRR_endUpdate(&c);
-}
-
-/****************************************************************************
-REMARKS:
-Initialise the MTRR module, by detecting the processor type and determining
-if the processor supports the MTRR functionality.
-****************************************************************************/
-void MTRR_init(void)
-{
- int i,cpu,ltype;
- ulong eax,edx,lbase,lsize;
-
- /* Check that we have a compatible CPU */
- if (numMTRR == -1) {
- numMTRR = 0;
- if (!_MTRR_isRing0())
- return;
- cpu = CPU_getProcessorType();
- cpuFamily = cpu & CPU_familyMask;
- cpuType = cpu & CPU_mask;
- cpuStepping = (cpu & CPU_steppingMask) >> CPU_steppingShift;
- switch (cpuFamily) {
- case CPU_Intel:
- /* Intel Pentium Pro and later support the MTRR registers */
- if (cpuType < CPU_PentiumPro)
- return;
- _MTRR_readMSR(INTEL_cap_MSR,&eax,&edx);
- numMTRR = eax & 0xFF;
- getMTRR = INTEL_getMTRR;
- setMTRR = INTEL_setMTRR;
- getFreeRegion = GENERIC_getFreeRegion;
- INTEL_disableBankedWriteCombine();
- break;
- case CPU_AMD:
- /* AMD K6-2 and later support the MTRR registers */
- if ((cpuType < CPU_AMDK6_2) || (cpuType == CPU_AMDK6_2 && cpuStepping < 8))
- return;
- if (cpuType < CPU_AMDAthlon) {
- numMTRR = 2; /* AMD CPU's have 2 MTRR's */
- getMTRR = AMD_getMTRR;
- setMTRR = AMD_setMTRR;
- getFreeRegion = AMDK6_getFreeRegion;
-
- /* For some reason some IBM systems with K6-2 processors
- * have write combined enabled for the system BIOS
- * region from 0xE0000 to 0xFFFFFF. We need *both* MTRR's
- * for our own graphics drivers, so if we detect any
- * regions below the 1Meg boundary, we remove them
- * so we can use this MTRR register ourselves.
- */
- for (i = 0; i < numMTRR; i++) {
- getMTRR(i,&lbase,&lsize,&ltype);
- if (lbase < 0x100000)
- setMTRR(i,0,0,0);
- }
- }
- else {
- /* AMD Athlon uses P6 style MTRR's */
- _MTRR_readMSR(INTEL_cap_MSR,&eax,&edx);
- numMTRR = eax & 0xFF;
- getMTRR = INTEL_getMTRR;
- setMTRR = INTEL_setMTRR;
- getFreeRegion = GENERIC_getFreeRegion;
- INTEL_disableBankedWriteCombine();
- }
- break;
- case CPU_Cyrix:
- /* Cyrix 6x86 and later support the MTRR registers */
- if (cpuType < CPU_Cyrix6x86 || cpuType >= CPU_CyrixMediaGX)
- return;
- numMTRR = 8; /* Cyrix CPU's have 8 ARR's */
- getMTRR = CYRIX_getMTRR;
- setMTRR = CYRIX_setMTRR;
- getFreeRegion = CYRIX_getFreeRegion;
- CYRIX_initARR();
- break;
- default:
- return;
- }
- }
-}
-
-/****************************************************************************
-PARAMETERS:
-base - The starting physical base address of the region
-size - The size in bytes of the region
-type - Type to place into the MTRR register
-
-RETURNS:
-Error code describing the result.
-
-REMARKS:
-Function to enable write combining for the specified region of memory.
-****************************************************************************/
-int MTRR_enableWriteCombine(
- ulong base,
- ulong size,
- uint type)
-{
- int i;
- int ltype;
- ulong lbase,lsize,last;
-
- /* Check that we have a CPU that supports MTRR's and type is valid */
- if (numMTRR <= 0) {
- if (!_MTRR_isRing0())
- return PM_MTRR_ERR_NO_OS_SUPPORT;
- return PM_MTRR_NOT_SUPPORTED;
- }
- if (type >= PM_MTRR_MAX)
- return PM_MTRR_ERR_PARAMS;
-
- /* If the type is WC, check that this processor supports it */
- if (!MTRR_haveWriteCombine())
- return PM_MTRR_ERR_NOWRCOMB;
-
- /* Adjust the boundaries depending on the CPU type */
- switch (cpuFamily) {
- case CPU_AMD:
- if (cpuType < CPU_AMDAthlon) {
- /* Apply the K6 block alignment and size rules. In order:
- * o Uncached or gathering only
- * o 128K or bigger block
- * o Power of 2 block
- * o base suitably aligned to the power
- */
- if (type > PM_MTRR_WRCOMB && (size < (1 << 17) || (size & ~(size-1))-size || (base & (size-1))))
- return PM_MTRR_ERR_NOT_ALIGNED;
- break;
- }
- /* Fall through for AMD Athlon which uses P6 style MTRR's */
- case CPU_Intel:
- case CPU_Cyrix:
- if ((base & 0xFFF) || (size & 0xFFF)) {
- /* Base and size must be multiples of 4Kb */
- return PM_MTRR_ERR_NOT_4KB_ALIGNED;
- }
- if (base < 0x100000) {
- /* Base must be >= 1Mb */
- return PM_MTRR_ERR_BELOW_1MB;
- }
-
- /* Check upper bits of base and last are equal and lower bits
- * are 0 for base and 1 for last
- */
- last = base + size - 1;
- for (lbase = base; !(lbase & 1) && (last & 1); lbase = lbase >> 1, last = last >> 1)
- ;
- if (lbase != last) {
- /* Base is not aligned on the correct boundary */
- return PM_MTRR_ERR_NOT_ALIGNED;
- }
- break;
- default:
- return PM_MTRR_NOT_SUPPORTED;
- }
-
- /* Search for existing MTRR */
- for (i = 0; i < numMTRR; ++i) {
- getMTRR(i,&lbase,&lsize,&ltype);
- if (lbase == 0 && lsize == 0)
- continue;
- if (base > lbase + (lsize-1))
- continue;
- if ((base < lbase) && (base+size-1 < lbase))
- continue;
-
- /* Check that we don't overlap an existing region */
- if (type != PM_MTRR_UNCACHABLE) {
- if ((base < lbase) || (base+size-1 > lbase+lsize-1))
- return PM_MTRR_ERR_OVERLAP;
- }
- else if (base == lbase && size == lsize) {
- /* The region already exists so leave it alone */
- return PM_MTRR_ERR_OK;
- }
-
- /* New region is enclosed by an existing region, so only allow
- * a new type to be created if we are setting a region to be
- * uncacheable (such as MMIO registers within a framebuffer).
- */
- if (ltype != (int)type) {
- if (type == PM_MTRR_UNCACHABLE)
- continue;
- return PM_MTRR_ERR_TYPE_MISMATCH;
- }
- return PM_MTRR_ERR_OK;
- }
-
- /* Search for an empty MTRR */
- if ((i = getFreeRegion(base,size)) < 0)
- return PM_MTRR_ERR_NONE_FREE;
- setMTRR(i,base,size,type);
- return PM_MTRR_ERR_OK;
-}
-
-/****************************************************************************
-PARAMETERS:
-callback - Function to callback with write combine information
-
-REMARKS:
-Function to enumerate all write combine regions currently enabled for the
-processor.
-****************************************************************************/
-int PMAPI PM_enumWriteCombine(
- PM_enumWriteCombine_t callback)
-{
- int i,ltype;
- ulong lbase,lsize;
-
- /* Check that we have a CPU that supports MTRR's and type is valid */
- if (numMTRR <= 0) {
- if (!_MTRR_isRing0())
- return PM_MTRR_ERR_NO_OS_SUPPORT;
- return PM_MTRR_NOT_SUPPORTED;
- }
-
- /* Enumerate all existing MTRR's */
- for (i = 0; i < numMTRR; ++i) {
- getMTRR(i,&lbase,&lsize,&ltype);
- callback(lbase,lsize,ltype);
- }
- return PM_MTRR_ERR_OK;
-}
-#endif
diff --git a/board/MAI/bios_emulator/scitech/src/pm/common/pcilib.c b/board/MAI/bios_emulator/scitech/src/pm/common/pcilib.c
deleted file mode 100644
index 1d542fc5df..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/common/pcilib.c
+++ /dev/null
@@ -1,747 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-*
-* Description: Module for interfacing to the PCI bus and configuration
-* space registers.
-*
-****************************************************************************/
-
-#include "pmapi.h"
-#include "pcilib.h"
-#if !defined(__WIN32_VXD__) && !defined(__NT_DRIVER__)
-#include <string.h>
-#endif
-
-/*---------------------- Macros and type definitions ----------------------*/
-
-#pragma pack(1)
-
-/* Length of the memory mapping for the PCI BIOS */
-
-#define BIOS_LIMIT (128 * 1024L - 1)
-
-/* Macros for accessing the PCI BIOS functions from 32-bit protected mode */
-
-#define BIOS32_SIGNATURE (((ulong)'_' << 0) + ((ulong)'3' << 8) + ((ulong)'2' << 16) + ((ulong)'_' << 24))
-#define PCI_SIGNATURE (((ulong)'P' << 0) + ((ulong)'C' << 8) + ((ulong)'I' << 16) + ((ulong)' ' << 24))
-#define PCI_SERVICE (((ulong)'$' << 0) + ((ulong)'P' << 8) + ((ulong)'C' << 16) + ((ulong)'I' << 24))
-#define PCI_BIOS_PRESENT 0xB101
-#define FIND_PCI_DEVICE 0xB102
-#define FIND_PCI_CLASS 0xB103
-#define GENERATE_SPECIAL 0xB106
-#define READ_CONFIG_BYTE 0xB108
-#define READ_CONFIG_WORD 0xB109
-#define READ_CONFIG_DWORD 0xB10A
-#define WRITE_CONFIG_BYTE 0xB10B
-#define WRITE_CONFIG_WORD 0xB10C
-#define WRITE_CONFIG_DWORD 0xB10D
-#define GET_IRQ_ROUTING_OPT 0xB10E
-#define SET_PCI_IRQ 0xB10F
-
-/* This is the standard structure used to identify the entry point to the
- * BIOS32 Service Directory, as documented in PCI 2.1 BIOS Specicition.
- */
-
-typedef union {
- struct {
- ulong signature; /* _32_ */
- ulong entry; /* 32 bit physical address */
- uchar revision; /* Revision level, 0 */
- uchar length; /* Length in paragraphs should be 01 */
- uchar checksum; /* All bytes must add up to zero */
- uchar reserved[5]; /* Must be zero */
- } fields;
- char chars[16];
- } PCI_bios32;
-
-/* Structure for a far pointer to call the PCI BIOS services with */
-
-typedef struct {
- ulong address;
- ushort segment;
- } PCIBIOS_entry;
-
-/* Macros to copy a structure that includes dwSize members */
-
-#define COPY_STRUCTURE(d,s) memcpy(d,s,MIN((s)->dwSize,(d)->dwSize))
-
-#pragma pack()
-
-/*--------------------------- Global variables ----------------------------*/
-
-static uchar *BIOSImage = NULL; /* BIOS image mapping */
-static int PCIBIOSVersion = -1;/* PCI BIOS version */
-static PCIBIOS_entry PCIEntry; /* PCI services entry point */
-static ulong PCIPhysEntry = 0; /* Physical address */
-
-/*----------------------------- Implementation ----------------------------*/
-
-/* External assembler helper functions */
-
-uchar _ASMAPI _BIOS32_service(ulong service,ulong function,ulong *physBase,ulong *length,ulong *serviceOffset,PCIBIOS_entry entry);
-ushort _ASMAPI _PCIBIOS_isPresent(ulong i_eax,ulong *o_edx,ushort *o_ax,uchar *o_cl,PCIBIOS_entry entry);
-ulong _ASMAPI _PCIBIOS_service(ulong r_eax,ulong r_ebx,ulong r_edi,ulong r_ecx,PCIBIOS_entry entry);
-int _ASMAPI _PCIBIOS_getRouting(PCIRoutingOptionsBuffer *buf,PCIBIOS_entry entry);
-ibool _ASMAPI _PCIBIOS_setIRQ(int busDev,int intPin,int IRQ,PCIBIOS_entry entry);
-ulong _ASMAPI _PCIBIOS_specialCycle(int bus,ulong data,PCIBIOS_entry entry);
-ushort _ASMAPI _PCI_getCS(void);
-
-/****************************************************************************
-REMARKS:
-This functions returns the physical address of the PCI BIOS entry point.
-****************************************************************************/
-ulong _ASMAPI PCIBIOS_getEntry(void)
-{ return PCIPhysEntry; }
-
-/****************************************************************************
-PARAMETERS:
-hwType - Place to store the PCI hardware access mechanism flags
-lastBus - Place to store the index of the last PCI bus in the system
-
-RETURNS:
-Version number of the PCI BIOS found.
-
-REMARKS:
-This function determines if the PCI BIOS is present in the system, and if
-so returns the information returned by the PCI BIOS detect function.
-****************************************************************************/
-static int PCIBIOS_detect(
- uchar *hwType,
- uchar *lastBus)
-{
- ulong signature;
- ushort stat,version;
-
-#ifndef __16BIT__
- PCIBIOS_entry BIOSEntry = {0};
- uchar *BIOSEnd;
- PCI_bios32 *BIOSDir;
- ulong physBase,length,offset;
-
- /* Bail if we have already detected no BIOS is present */
- if (PCIBIOSVersion == 0)
- return 0;
-
- /* First scan the memory from 0xE0000 to 0xFFFFF looking for the
- * BIOS32 service directory, so we can determine if we can call it
- * from 32-bit protected mode.
- */
- if (PCIBIOSVersion == -1) {
- PCIBIOSVersion = 0;
- BIOSImage = PM_mapPhysicalAddr(0xE0000,BIOS_LIMIT,false);
- if (!BIOSImage)
- return 0;
- BIOSEnd = BIOSImage + 0x20000;
- for (BIOSDir = (PCI_bios32*)BIOSImage; BIOSDir < (PCI_bios32*)BIOSEnd; BIOSDir++) {
- uchar sum;
- int i,length;
-
- if (BIOSDir->fields.signature != BIOS32_SIGNATURE)
- continue;
- length = BIOSDir->fields.length * 16;
- if (!length)
- continue;
- for (sum = i = 0; i < length ; i++)
- sum += BIOSDir->chars[i];
- if (sum != 0)
- continue;
- BIOSEntry.address = (ulong)BIOSImage + (BIOSDir->fields.entry - 0xE0000);
- BIOSEntry.segment = _PCI_getCS();
- break;
- }
-
- /* If we found the BIOS32 directory, call it to get the address of the
- * PCI services.
- */
- if (BIOSEntry.address == 0)
- return 0;
- if (_BIOS32_service(PCI_SERVICE,0,&physBase,&length,&offset,BIOSEntry) != 0)
- return 0;
- PCIPhysEntry = physBase + offset;
- PCIEntry.address = (ulong)BIOSImage + (PCIPhysEntry - 0xE0000);
- PCIEntry.segment = _PCI_getCS();
- }
-#endif
- /* We found the BIOS entry, so now do the version check */
- version = _PCIBIOS_isPresent(PCI_BIOS_PRESENT,&signature,&stat,lastBus,PCIEntry);
- if (version > 0 && ((stat >> 8) == 0) && signature == PCI_SIGNATURE) {
- *hwType = stat & 0xFF;
- return PCIBIOSVersion = version;
- }
- return 0;
-}
-
-/****************************************************************************
-PARAMETERS:
-info - Array of PCIDeviceInfo structures to check against
-index - Index of the current device to check
-
-RETURNS:
-True if the device is a duplicate, false if not.
-
-REMARKS:
-This function goes through the list of all devices preceeding the newly
-found device in the info structure, and checks that the device is not a
-duplicate of a previous device. Some devices incorrectly enumerate
-themselves at different function addresses so we check here to exclude
-those cases.
-****************************************************************************/
-static ibool CheckDuplicate(
- PCIDeviceInfo *info,
- PCIDeviceInfo *prev)
-{
- /* Ignore devices with a vendor ID of 0 */
- if (info->VendorID == 0)
- return true;
-
- /* NOTE: We only check against the current device on
- * the bus to ensure that we do not exclude
- * multiple controllers of the same device ID.
- */
- if (info->slot.p.Bus == prev->slot.p.Bus &&
- info->slot.p.Device == prev->slot.p.Device &&
- info->DeviceID == prev->DeviceID)
- return true;
- return false;
-}
-
-/****************************************************************************
-PARAMETERS:
-info - Array of PCIDeviceInfo structures to fill in
-maxDevices - Maximum number of of devices to enumerate into array
-
-RETURNS:
-Number of PCI devices found and enumerated on the PCI bus, 0 if not PCI.
-
-REMARKS:
-Function to enumerate all available devices on the PCI bus into an array
-of configuration information blocks.
-****************************************************************************/
-static int PCI_enumerateMech1(
- PCIDeviceInfo info[])
-{
- int bus,device,function,i,numFound = 0;
- ulong *lp,tmp;
- PCIslot slot = {{0,0,0,0,0,0,1}};
- PCIDeviceInfo pci,prev = {0};
-
- /* Try PCI access mechanism 1 */
- PM_outpb(0xCFB,0x01);
- tmp = PM_inpd(0xCF8);
- PM_outpd(0xCF8,slot.i);
- if ((PM_inpd(0xCF8) == slot.i) && (PM_inpd(0xCFC) != 0xFFFFFFFFUL)) {
- /* PCI access mechanism 1 - the preferred mechanism */
- for (bus = 0; bus < 8; bus++) {
- slot.p.Bus = bus;
- for (device = 0; device < 32; device++) {
- slot.p.Device = device;
- for (function = 0; function < 8; function++) {
- slot.p.Function = function;
- slot.p.Register = 0;
- PM_outpd(0xCF8,slot.i);
- if (PM_inpd(0xCFC) != 0xFFFFFFFFUL) {
- memset(&pci,0,sizeof(pci));
- pci.dwSize = sizeof(pci);
- pci.mech1 = 1;
- pci.slot = slot;
- lp = (ulong*)&(pci.VendorID);
- for (i = 0; i < NUM_PCI_REG; i++, lp++) {
- slot.p.Register = i;
- PM_outpd(0xCF8,slot.i);
- *lp = PM_inpd(0xCFC);
- }
- if (!CheckDuplicate(&pci,&prev)) {
- if (info)
- COPY_STRUCTURE(&info[numFound],&pci);
- ++numFound;
- }
- prev = pci;
- }
- }
- }
- }
-
- /* Disable PCI config cycle on exit */
- PM_outpd(0xCF8,0);
- return numFound;
- }
- PM_outpd(0xCF8,tmp);
-
- /* No hardware access mechanism 1 found */
- return 0;
-}
-
-/****************************************************************************
-PARAMETERS:
-info - Array of PCIDeviceInfo structures to fill in
-maxDevices - Maximum number of of devices to enumerate into array
-
-RETURNS:
-Number of PCI devices found and enumerated on the PCI bus, 0 if not PCI.
-
-REMARKS:
-Function to enumerate all available devices on the PCI bus into an array
-of configuration information blocks.
-****************************************************************************/
-static int PCI_enumerateMech2(
- PCIDeviceInfo info[])
-{
- int bus,device,function,i,numFound = 0;
- ushort deviceIO;
- ulong *lp;
- PCIslot slot = {{0,0,0,0,0,0,1}};
- PCIDeviceInfo pci,prev = {0};
-
- /* Try PCI access mechanism 2 */
- PM_outpb(0xCFB,0x00);
- PM_outpb(0xCF8,0x00);
- PM_outpb(0xCFA,0x00);
- if (PM_inpb(0xCF8) == 0x00 && PM_inpb(0xCFB) == 0x00) {
- /* PCI access mechanism 2 - the older mechanism for legacy busses */
- for (bus = 0; bus < 2; bus++) {
- slot.p.Bus = bus;
- PM_outpb(0xCFA,(uchar)bus);
- for (device = 0; device < 16; device++) {
- slot.p.Device = device;
- deviceIO = 0xC000 + (device << 8);
- for (function = 0; function < 8; function++) {
- slot.p.Function = function;
- slot.p.Register = 0;
- PM_outpb(0xCF8,(uchar)((function << 1) | 0x10));
- if (PM_inpd(deviceIO) != 0xFFFFFFFFUL) {
- memset(&pci,0,sizeof(pci));
- pci.dwSize = sizeof(pci);
- pci.mech1 = 0;
- pci.slot = slot;
- lp = (ulong*)&(pci.VendorID);
- for (i = 0; i < NUM_PCI_REG; i++, lp++) {
- slot.p.Register = i;
- *lp = PM_inpd(deviceIO + (i << 2));
- }
- if (!CheckDuplicate(&pci,&prev)) {
- if (info)
- COPY_STRUCTURE(&info[numFound],&pci);
- ++numFound;
- }
- prev = pci;
- }
- }
- }
- }
-
- /* Disable PCI config cycle on exit */
- PM_outpb(0xCF8,0);
- return numFound;
- }
-
- /* No hardware access mechanism 2 found */
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-This functions reads a configuration dword via the PCI BIOS.
-****************************************************************************/
-static ulong PCIBIOS_readDWORD(
- int index,
- ulong slot)
-{
- return (ulong)_PCIBIOS_service(READ_CONFIG_DWORD,slot >> 8,index,0,PCIEntry);
-}
-
-/****************************************************************************
-PARAMETERS:
-info - Array of PCIDeviceInfo structures to fill in
-maxDevices - Maximum number of of devices to enumerate into array
-
-RETURNS:
-Number of PCI devices found and enumerated on the PCI bus, 0 if not PCI.
-
-REMARKS:
-Function to enumerate all available devices on the PCI bus into an array
-of configuration information blocks.
-****************************************************************************/
-static int PCI_enumerateBIOS(
- PCIDeviceInfo info[])
-{
- uchar hwType,lastBus;
- int bus,device,function,i,numFound = 0;
- ulong *lp;
- PCIslot slot = {{0,0,0,0,0,0,1}};
- PCIDeviceInfo pci,prev = {0};
-
- if (PCIBIOS_detect(&hwType,&lastBus)) {
- /* PCI BIOS access - the ultimate fallback */
- for (bus = 0; bus <= lastBus; bus++) {
- slot.p.Bus = bus;
- for (device = 0; device < 32; device++) {
- slot.p.Device = device;
- for (function = 0; function < 8; function++) {
- slot.p.Function = function;
- if (PCIBIOS_readDWORD(0,slot.i) != 0xFFFFFFFFUL) {
- memset(&pci,0,sizeof(pci));
- pci.dwSize = sizeof(pci);
- pci.mech1 = 2;
- pci.slot = slot;
- lp = (ulong*)&(pci.VendorID);
- for (i = 0; i < NUM_PCI_REG; i++, lp++)
- *lp = PCIBIOS_readDWORD(i << 2,slot.i);
- if (!CheckDuplicate(&pci,&prev)) {
- if (info)
- COPY_STRUCTURE(&info[numFound],&pci);
- ++numFound;
- }
- prev = pci;
- }
- }
- }
- }
- }
-
- /* Return number of devices found */
- return numFound;
-}
-
-/****************************************************************************
-PARAMETERS:
-info - Array of PCIDeviceInfo structures to fill in
-maxDevices - Maximum number of of devices to enumerate into array
-
-RETURNS:
-Number of PCI devices found and enumerated on the PCI bus, 0 if not PCI.
-
-REMARKS:
-Function to enumerate all available devices on the PCI bus into an array
-of configuration information blocks.
-****************************************************************************/
-int _ASMAPI PCI_enumerate(
- PCIDeviceInfo info[])
-{
- int numFound;
-
- /* First try via the direct access mechanisms which are faster if we
- * have them (nearly always). The BIOS is used as a fallback, and for
- * stuff we can't do directly.
- */
- if ((numFound = PCI_enumerateMech1(info)) == 0) {
- if ((numFound = PCI_enumerateMech2(info)) == 0) {
- if ((numFound = PCI_enumerateBIOS(info)) == 0)
- return 0;
- }
- }
- return numFound;
-}
-
-/****************************************************************************
-PARAMETERS:
-info - Array of PCIDeviceInfo structures to fill in
-maxDevices - Maximum number of of devices to enumerate into array
-
-RETURNS:
-Number of PCI devices found and enumerated on the PCI bus, 0 if not PCI.
-
-REMARKS:
-Function to enumerate all available devices on the PCI bus into an array
-of configuration information blocks.
-****************************************************************************/
-int _ASMAPI PCI_getNumDevices(void)
-{
- return PCI_enumerate(NULL);
-}
-
-/****************************************************************************
-PARAMETERS:
-bar - Base address to measure
-pci - PCI device to access
-
-RETURNS:
-Size of the PCI base address in bytes
-
-REMARKS:
-This function measures the size of the PCI base address register in bytes,
-by writing all F's to the register, and reading the value back. The size
-of the base address is determines by the bits that are hardwired to zero's.
-****************************************************************************/
-ulong _ASMAPI PCI_findBARSize(
- int bar,
- PCIDeviceInfo *pci)
-{
- ulong base,size = 0;
-
- base = PCI_accessReg(bar,0,PCI_READ_DWORD,pci);
- if (base && !(base & 0x1)) {
- /* For some strange reason some devices don't properly decode
- * their base address registers (Intel PCI/PCI bridges!), and
- * we read completely bogus values. We check for that here
- * and clear out those BAR's.
- *
- * We check for that here because at least the low 12 bits
- * of the address range must be zeros, since the page size
- * on IA32 processors is always 4Kb.
- */
- if ((base & 0xFFF) == 0) {
- PCI_accessReg(bar,0xFFFFFFFF,PCI_WRITE_DWORD,pci);
- size = PCI_accessReg(bar,0,PCI_READ_DWORD,pci) & ~0xFF;
- size = ~size+1;
- PCI_accessReg(bar,base,PCI_WRITE_DWORD,pci);
- }
- }
- pci->slot.p.Register = 0;
- return size;
-}
-
-/****************************************************************************
-PARAMETERS:
-index - DWORD index of the register to access
-value - Value to write to the register for write access
-func - Function to implement
-
-RETURNS:
-The value read from the register for read operations
-
-REMARKS:
-The function code are defined as follows
-
-code - function
-0 - Read BYTE
-1 - Read WORD
-2 - Read DWORD
-3 - Write BYTE
-4 - Write WORD
-5 - Write DWORD
-****************************************************************************/
-ulong _ASMAPI PCI_accessReg(
- int index,
- ulong value,
- int func,
- PCIDeviceInfo *info)
-{
- int iobase;
-
- if (info->mech1 == 2) {
- /* Use PCI BIOS access since we dont have direct hardware access */
- switch (func) {
- case PCI_READ_BYTE:
- return (uchar)_PCIBIOS_service(READ_CONFIG_BYTE,info->slot.i >> 8,index,0,PCIEntry);
- case PCI_READ_WORD:
- return (ushort)_PCIBIOS_service(READ_CONFIG_WORD,info->slot.i >> 8,index,0,PCIEntry);
- case PCI_READ_DWORD:
- return (ulong)_PCIBIOS_service(READ_CONFIG_DWORD,info->slot.i >> 8,index,0,PCIEntry);
- case PCI_WRITE_BYTE:
- _PCIBIOS_service(WRITE_CONFIG_BYTE,info->slot.i >> 8,index,value,PCIEntry);
- break;
- case PCI_WRITE_WORD:
- _PCIBIOS_service(WRITE_CONFIG_WORD,info->slot.i >> 8,index,value,PCIEntry);
- break;
- case PCI_WRITE_DWORD:
- _PCIBIOS_service(WRITE_CONFIG_DWORD,info->slot.i >> 8,index,value,PCIEntry);
- break;
- }
- }
- else {
- /* Use direct hardware access mechanisms */
- if (info->mech1) {
- /* PCI access mechanism 1 */
- iobase = 0xCFC + (index & 3);
- info->slot.p.Register = index >> 2;
- PM_outpd(0xCF8,info->slot.i);
- }
- else {
- /* PCI access mechanism 2 */
- PM_outpb(0xCF8,(uchar)((info->slot.p.Function << 1) | 0x10));
- PM_outpb(0xCFA,(uchar)info->slot.p.Bus);
- iobase = 0xC000 + (info->slot.p.Device << 8) + index;
- }
- switch (func) {
- case PCI_READ_BYTE:
- case PCI_READ_WORD:
- case PCI_READ_DWORD: value = PM_inpd(iobase); break;
- case PCI_WRITE_BYTE: PM_outpb(iobase,(uchar)value); break;
- case PCI_WRITE_WORD: PM_outpw(iobase,(ushort)value); break;
- case PCI_WRITE_DWORD: PM_outpd(iobase,(ulong)value); break;
- }
- PM_outpd(0xCF8,0);
- }
- return value;
-}
-
-/****************************************************************************
-PARAMETERS:
-numDevices - Number of devices to query info for
-
-RETURNS:
-0 on success, -1 on error, number of devices to enumerate if numDevices = 0
-
-REMARKS:
-This function reads the PCI routing information. If you pass a value of
-0 for numDevices, this function will return with the number of devices
-needed in the routing buffer that will be filled in by the BIOS.
-****************************************************************************/
-ibool _ASMAPI PCI_getIRQRoutingOptions(
- int numDevices,
- PCIRouteInfo *buffer)
-{
- PCIRoutingOptionsBuffer buf;
- int ret;
-
- if (PCIPhysEntry) {
- buf.BufferSize = numDevices * sizeof(PCIRouteInfo);
- buf.DataBuffer = buffer;
- if ((ret = _PCIBIOS_getRouting(&buf,PCIEntry)) == 0x89)
- return buf.BufferSize / sizeof(PCIRouteInfo);
- if (ret != 0)
- return -1;
- return 0;
- }
-
- /* We currently only support this via the PCI BIOS functions */
- return -1;
-}
-
-/****************************************************************************
-PARAMETERS:
-info - PCI device information for the specified device
-intPin - Value to store in the PCI InterruptPin register
-IRQ - New ISA IRQ to map the PCI interrupt to (0-15)
-
-RETURNS:
-True on success, or false if this function failed.
-
-REMARKS:
-This function changes the PCI IRQ routing for the specified device to the
-desired PCI interrupt and the desired ISA bus compatible IRQ. This function
-may not be supported by the PCI BIOS, in which case this function will
-fail.
-****************************************************************************/
-ibool _ASMAPI PCI_setHardwareIRQ(
- PCIDeviceInfo *info,
- uint intPin,
- uint IRQ)
-{
- if (PCIPhysEntry) {
- if (_PCIBIOS_setIRQ(info->slot.i >> 8,intPin,IRQ,PCIEntry)) {
- info->u.type0.InterruptPin = intPin;
- info->u.type0.InterruptLine = IRQ;
- return true;
- }
- return false;
- }
-
- /* We currently only support this via the PCI BIOS functions */
- return false;
-}
-
-/****************************************************************************
-PARAMETERS:
-bus - Bus number to generate the special cycle for
-specialCycleData - Data to send for the special cyle
-
-REMARKS:
-This function generates a special cycle on the specified bus using with
-the specified data.
-****************************************************************************/
-void _ASMAPI PCI_generateSpecialCyle(
- uint bus,
- ulong specialCycleData)
-{
- if (PCIPhysEntry)
- _PCIBIOS_specialCycle(bus,specialCycleData,PCIEntry);
- /* We currently only support this via the PCI BIOS functions */
-}
-
-/****************************************************************************
-PARAMETERS:
-info - PCI device information block for device to access
-index - Index of register to start reading from
-dst - Place to store the values read from configuration space
-count - Count of bytes to read from configuration space
-
-REMARKS:
-This function is used to read a block of PCI configuration space registers
-from the configuration space into the passed in data block. This function
-will properly handle reading non-DWORD aligned data from the configuration
-space correctly.
-****************************************************************************/
-void _ASMAPI PCI_readRegBlock(
- PCIDeviceInfo *info,
- int index,
- void *dst,
- int count)
-{
- uchar *pb;
- ulong *pd;
- int i;
- int startCount = (index & 3);
- int middleCount = (count - startCount) >> 2;
- int endCount = count - middleCount * 4 - startCount;
-
- for (i = 0,pb = dst; i < startCount; i++, index++) {
- *pb++ = (uchar)PCI_accessReg(index,0,PCI_READ_BYTE,info);
- }
- for (i = 0,pd = (ulong*)pb; i < middleCount; i++, index += 4) {
- *pd++ = (ulong)PCI_accessReg(index,0,PCI_READ_DWORD,info);
- }
- for (i = 0,pb = (uchar*)pd; i < endCount; i++, index++) {
- *pb++ = (uchar)PCI_accessReg(index,0,PCI_READ_BYTE,info);
- }
-}
-
-/****************************************************************************
-PARAMETERS:
-info - PCI device information block for device to access
-index - Index of register to start reading from
-dst - Place to store the values read from configuration space
-count - Count of bytes to read from configuration space
-
-REMARKS:
-This function is used to write a block of PCI configuration space registers
-to the configuration space from the passed in data block. This function
-will properly handle writing non-DWORD aligned data to the configuration
-space correctly.
-****************************************************************************/
-void _ASMAPI PCI_writeRegBlock(
- PCIDeviceInfo *info,
- int index,
- void *src,
- int count)
-{
- uchar *pb;
- ulong *pd;
- int i;
- int startCount = (index & 3);
- int middleCount = (count - startCount) >> 2;
- int endCount = count - middleCount * 4 - startCount;
-
- for (i = 0,pb = src; i < startCount; i++, index++) {
- PCI_accessReg(index,*pb++,PCI_WRITE_BYTE,info);
- }
- for (i = 0,pd = (ulong*)pb; i < middleCount; i++, index += 4) {
- PCI_accessReg(index,*pd++,PCI_WRITE_DWORD,info);
- }
- for (i = 0,pb = (uchar*)pd; i < endCount; i++, index++) {
- PCI_accessReg(index,*pb++,PCI_WRITE_BYTE,info);
- }
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/common/unixio.c b/board/MAI/bios_emulator/scitech/src/pm/common/unixio.c
deleted file mode 100644
index c3a66a7c14..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/common/unixio.c
+++ /dev/null
@@ -1,306 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-*
-* Description: Module containing Unix I/O functions.
-*
-****************************************************************************/
-
-#include "pmapi.h"
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <sys/stat.h>
-#include <unistd.h>
-#include <dirent.h>
-
-/*----------------------------- Implementation ----------------------------*/
-
-/* {secret} */
-typedef struct {
- DIR *d;
- char path[PM_MAX_PATH];
- char mask[PM_MAX_PATH];
- } PM_findHandle;
-
-/****************************************************************************
-REMARKS:
-Internal function to convert the find data to the generic interface.
-****************************************************************************/
-static void convertFindData(
- PM_findData *findData,
- struct dirent *blk,
- const char *path)
-{
- ulong dwSize = findData->dwSize;
- struct stat st;
- char filename[PM_MAX_PATH];
-
- memset(findData,0,findData->dwSize);
- findData->dwSize = dwSize;
- strcpy(filename,path);
- PM_backslash(filename);
- strcat(filename,blk->d_name);
- stat(filename,&st);
- if (!(st.st_mode & S_IWRITE))
- findData->attrib |= PM_FILE_READONLY;
- if (st.st_mode & S_IFDIR)
- findData->attrib |= PM_FILE_DIRECTORY;
- findData->sizeLo = st.st_size;
- findData->sizeHi = 0;
- strncpy(findData->name,blk->d_name,PM_MAX_PATH);
- findData->name[PM_MAX_PATH-1] = 0;
-}
-
-/****************************************************************************
-REMARKS:
-Determines if a file name matches the passed in pattern.
-****************************************************************************/
-static ibool filematch(
- char *pattern,
- char *dirpath,
- struct dirent *dire)
-{
- struct stat st;
- int i = 0,j = 0,lastchar = '\0';
- char fullpath[PM_MAX_PATH];
-
- strcpy(fullpath,dirpath);
- PM_backslash(fullpath);
- strcat(fullpath, dire->d_name);
- if (stat(fullpath, &st) != 0)
- return false;
- for (; i < (int)strlen(dire->d_name) && j < (int)strlen(pattern); i++, j++) {
- if (pattern[j] == '*' && lastchar != '\\') {
- if (pattern[j+1] == '\0')
- return true;
- while (dire->d_name[i++] != pattern[j+1]) {
- if (dire->d_name[i] == '\0')
- return false;
- }
- i -= 2;
- }
- else if (dire->d_name[i] != pattern[j] &&
- !(pattern[j] == '?' && lastchar != '\\'))
- return false;
- lastchar = pattern[i];
- }
- if (j == (int)strlen(pattern) && i == (int)strlen(dire->d_name))
- return true;
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Function to find the first file matching a search criteria in a directory.
-****************************************************************************/
-void * PMAPI PM_findFirstFile(
- const char *filename,
- PM_findData *findData)
-{
- PM_findHandle *d;
- struct dirent *dire;
- char name[PM_MAX_PATH];
- char ext[PM_MAX_PATH];
-
- if ((d = PM_malloc(sizeof(*d))) == NULL)
- return PM_FILE_INVALID;
- PM_splitpath(filename,NULL,d->path,name,ext);
- strcpy(d->mask,name);
- strcat(d->mask,ext);
- if (strlen(d->path) == 0)
- strcpy(d->path, ".");
- if (d->path[strlen(d->path)-1] == '/')
- d->path[strlen(d->path)-1] = 0;
- if ((d->d = opendir(d->path)) != NULL) {
- while ((dire = readdir(d->d)) != NULL) {
- if (filematch(d->mask,d->path,dire)) {
- convertFindData(findData,dire,d->path);
- return d;
- }
- }
- closedir(d->d);
- }
- PM_free(d);
- return PM_FILE_INVALID;
-}
-
-/****************************************************************************
-REMARKS:
-Function to find the next file matching a search criteria in a directory.
-****************************************************************************/
-ibool PMAPI PM_findNextFile(
- void *handle,
- PM_findData *findData)
-{
- PM_findHandle *d = handle;
- struct dirent *dire;
-
- while ((dire = readdir(d->d)) != NULL) {
- if (filematch(d->mask,d->path,dire)) {
- convertFindData(findData,dire,d->path);
- return true;
- }
- }
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Function to close the find process
-****************************************************************************/
-void PMAPI PM_findClose(
- void *handle)
-{
- PM_findHandle *d = handle;
-
- closedir(d->d);
- free(d);
-}
-
-/****************************************************************************
-REMARKS:
-Function to determine if a drive is a valid drive or not. Under Unix this
-function will return false for anything except a value of 3 (considered
-the root drive, and equivalent to C: for non-Unix systems). The drive
-numbering is:
-
- 1 - Drive A:
- 2 - Drive B:
- 3 - Drive C:
- etc
-
-****************************************************************************/
-ibool PMAPI PM_driveValid(
- char drive)
-{
- if (drive == 3)
- return true;
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Function to get the current working directory for the specififed drive.
-Under Unix this will always return the current working directory regardless
-of what the value of 'drive' is.
-****************************************************************************/
-void PMAPI PM_getdcwd(
- int drive,
- char *dir,
- int len)
-{
- (void)drive;
- getcwd(dir,len);
-}
-
-/****************************************************************************
-REMARKS:
-Function to change the file attributes for a specific file.
-****************************************************************************/
-void PMAPI PM_setFileAttr(
- const char *filename,
- uint attrib)
-{
- struct stat st;
- mode_t mode;
-
- stat(filename,&st);
- mode = st.st_mode;
- if (attrib & PM_FILE_READONLY)
- mode &= ~S_IWRITE;
- else
- mode |= S_IWRITE;
- chmod(filename,mode);
-}
-
-/****************************************************************************
-REMARKS:
-Function to get the file attributes for a specific file.
-****************************************************************************/
-uint PMAPI PM_getFileAttr(
- const char *filename)
-{
- struct stat st;
-
- stat(filename,&st);
- if (st.st_mode & S_IWRITE)
- return 0;
- return PM_FILE_READONLY;
-}
-
-/****************************************************************************
-REMARKS:
-Function to create a directory.
-****************************************************************************/
-ibool PMAPI PM_mkdir(
- const char *filename)
-{
- return mkdir(filename,0x1FF) == 0;
-}
-
-/****************************************************************************
-REMARKS:
-Function to remove a directory.
-****************************************************************************/
-ibool PMAPI PM_rmdir(
- const char *filename)
-{
- return rmdir(filename) == 0;
-}
-
-/****************************************************************************
-REMARKS:
-Function to get the file time and date for a specific file.
-****************************************************************************/
-ibool PMAPI PM_getFileTime(
- const char *filename,
- ibool gmTime,
- PM_time *time)
-{
- /* TODO: Implement this! */
- (void)filename;
- (void)gmTime;
- (void)time;
- PM_fatalError("PM_getFileTime not implemented yet!");
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Function to set the file time and date for a specific file.
-****************************************************************************/
-ibool PMAPI PM_setFileTime(
- const char *filename,
- ibool gmTime,
- PM_time *time)
-{
- /* TODO: Implement this! */
- (void)filename;
- (void)gmTime;
- (void)time;
- PM_fatalError("PM_setFileTime not implemented yet!");
- return false;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/common/vgastate.c b/board/MAI/bios_emulator/scitech/src/pm/common/vgastate.c
deleted file mode 100644
index 8056e9a33f..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/common/vgastate.c
+++ /dev/null
@@ -1,377 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Portions copyright (C) Josh Vanderhoof
-*
-* Language: ANSI C
-* Environment: Any
-*
-* Description: Functions to save and restore the VGA hardware state.
-*
-****************************************************************************/
-
-#include "pmapi.h"
-#if defined(__WIN32_VXD__) || defined(__NT_DRIVER__)
-#include "sdd/sddhelp.h"
-#else
-#include <string.h>
-#endif
-
-/*--------------------------- Global variables ----------------------------*/
-
-/* VGA index register ports */
-#define CRT_I 0x3D4 /* CRT Controller Index */
-#define ATT_IW 0x3C0 /* Attribute Controller Index & Data */
-#define GRA_I 0x3CE /* Graphics Controller Index */
-#define SEQ_I 0x3C4 /* Sequencer Index */
-
-/* VGA data register ports */
-#define CRT_D 0x3D5 /* CRT Controller Data Register */
-#define ATT_R 0x3C1 /* Attribute Controller Data Read Register */
-#define GRA_D 0x3CF /* Graphics Controller Data Register */
-#define SEQ_D 0x3C5 /* Sequencer Data Register */
-#define MIS_R 0x3CC /* Misc Output Read Register */
-#define MIS_W 0x3C2 /* Misc Output Write Register */
-#define IS1_R 0x3DA /* Input Status Register 1 */
-#define PEL_IW 0x3C8 /* PEL Write Index */
-#define PEL_IR 0x3C7 /* PEL Read Index */
-#define PEL_D 0x3C9 /* PEL Data Register */
-
-/* standard VGA indexes max counts */
-#define CRT_C 24 /* 24 CRT Controller Registers */
-#define ATT_C 21 /* 21 Attribute Controller Registers */
-#define GRA_C 9 /* 9 Graphics Controller Registers */
-#define SEQ_C 5 /* 5 Sequencer Registers */
-#define MIS_C 1 /* 1 Misc Output Register */
-#define PAL_C 768 /* 768 Palette Registers */
-#define FONT_C 8192 /* Total size of character generator RAM */
-
-/* VGA registers saving indexes */
-#define CRT 0 /* CRT Controller Registers start */
-#define ATT (CRT+CRT_C) /* Attribute Controller Registers start */
-#define GRA (ATT+ATT_C) /* Graphics Controller Registers start */
-#define SEQ (GRA+GRA_C) /* Sequencer Registers */
-#define MIS (SEQ+SEQ_C) /* General Registers */
-#define PAL (MIS+MIS_C) /* VGA Palette Registers */
-#define FONT (PAL+PAL_C) /* VGA font data */
-
-/* Macros for port I/O with arguments reversed */
-
-#define _port_out(v,p) PM_outpb(p,(uchar)(v))
-#define _port_in(p) PM_inpb(p)
-
-/*----------------------------- Implementation ----------------------------*/
-
-/****************************************************************************
-REMARKS:
-Returns the size of the VGA state buffer.
-****************************************************************************/
-int PMAPI PM_getVGAStateSize(void)
-{
- return CRT_C + ATT_C + GRA_C + SEQ_C + MIS_C + PAL_C + FONT_C;
-}
-
-/****************************************************************************
-REMARKS:
-Delay for a short period of time.
-****************************************************************************/
-static void vga_delay(void)
-{
- int i;
-
- /* For the loop here we program the POST register. The length of this
- * delay is dependant only on ISA bus speed, but it is enough for
- * what we need.
- */
- for (i = 0; i <= 10; i++)
- PM_outpb(0x80, 0);
-}
-
-/****************************************************************************
-PARAMETERS:
-port - I/O port to read value from
-index - Port index to read
-
-RETURNS:
-Byte read from 'port' register 'index'.
-****************************************************************************/
-static ushort vga_rdinx(
- ushort port,
- ushort index)
-{
- PM_outpb(port,(uchar)index);
- return PM_inpb(port+1);
-}
-
-/****************************************************************************
-PARAMETERS:
-port - I/O port to write to
-index - Port index to write
-value - Byte to write to port
-
-REMARKS:
-Writes a byte value to the 'port' register 'index'.
-****************************************************************************/
-static void vga_wrinx(
- ushort port,
- ushort index,
- ushort value)
-{
- PM_outpb(port,(uchar)index);
- PM_outpb(port+1,(uchar)value);
-}
-
-/****************************************************************************
-REMARKS:
-Save the color palette values
-****************************************************************************/
-static void vga_savepalette(
- uchar *pal)
-{
- int i;
-
- _port_out(0, PEL_IR);
- for (i = 0; i < 768; i++) {
- vga_delay();
- *pal++ = _port_in(PEL_D);
- }
-}
-
-/****************************************************************************
-REMARKS:
-Restore the color palette values
-****************************************************************************/
-static void vga_restorepalette(
- const uchar *pal)
-{
- int i;
-
- /* restore saved palette */
- _port_out(0, PEL_IW);
- for (i = 0; i < 768; i++) {
- vga_delay();
- _port_out(*pal++, PEL_D);
- }
-}
-
-/****************************************************************************
-REMARKS:
-Read the font data from the VGA character generator RAM
-****************************************************************************/
-static void vga_saveFont(
- uchar *data)
-{
- uchar *A0000Ptr = PM_getA0000Pointer();
- uchar save[7];
-
- /* Enable access to character generator RAM */
- save[0] = (uchar)vga_rdinx(SEQ_I,0x00);
- save[1] = (uchar)vga_rdinx(SEQ_I,0x02);
- save[2] = (uchar)vga_rdinx(SEQ_I,0x04);
- save[3] = (uchar)vga_rdinx(SEQ_I,0x00);
- save[4] = (uchar)vga_rdinx(GRA_I,0x04);
- save[5] = (uchar)vga_rdinx(GRA_I,0x05);
- save[6] = (uchar)vga_rdinx(GRA_I,0x06);
- vga_wrinx(SEQ_I,0x00,0x01);
- vga_wrinx(SEQ_I,0x02,0x04);
- vga_wrinx(SEQ_I,0x04,0x07);
- vga_wrinx(SEQ_I,0x00,0x03);
- vga_wrinx(GRA_I,0x04,0x02);
- vga_wrinx(GRA_I,0x05,0x00);
- vga_wrinx(GRA_I,0x06,0x00);
-
- /* Copy character generator RAM */
- memcpy(data,A0000Ptr,FONT_C);
-
- /* Restore VGA state */
- vga_wrinx(SEQ_I,0x00,save[0]);
- vga_wrinx(SEQ_I,0x02,save[1]);
- vga_wrinx(SEQ_I,0x04,save[2]);
- vga_wrinx(SEQ_I,0x00,save[3]);
- vga_wrinx(GRA_I,0x04,save[4]);
- vga_wrinx(GRA_I,0x05,save[5]);
- vga_wrinx(GRA_I,0x06,save[6]);
-}
-
-/****************************************************************************
-REMARKS:
-Downloads the font data to the VGA character generator RAM
-****************************************************************************/
-static void vga_restoreFont(
- const uchar *data)
-{
- uchar *A0000Ptr = PM_getA0000Pointer();
-
- /* Enable access to character generator RAM */
- vga_wrinx(SEQ_I,0x00,0x01);
- vga_wrinx(SEQ_I,0x02,0x04);
- vga_wrinx(SEQ_I,0x04,0x07);
- vga_wrinx(SEQ_I,0x00,0x03);
- vga_wrinx(GRA_I,0x04,0x02);
- vga_wrinx(GRA_I,0x05,0x00);
- vga_wrinx(GRA_I,0x06,0x00);
-
- /* Copy font back to character generator RAM */
- memcpy(A0000Ptr,data,FONT_C);
-}
-
-/****************************************************************************
-REMARKS:
-Save the state of all VGA compatible registers
-****************************************************************************/
-void PMAPI PM_saveVGAState(
- void *stateBuf)
-{
- uchar *regs = stateBuf;
- int i;
-
- /* Save state of VGA registers */
- for (i = 0; i < CRT_C; i++) {
- _port_out(i, CRT_I);
- regs[CRT + i] = _port_in(CRT_D);
- }
- for (i = 0; i < ATT_C; i++) {
- _port_in(IS1_R);
- vga_delay();
- _port_out(i, ATT_IW);
- vga_delay();
- regs[ATT + i] = _port_in(ATT_R);
- vga_delay();
- }
- for (i = 0; i < GRA_C; i++) {
- _port_out(i, GRA_I);
- regs[GRA + i] = _port_in(GRA_D);
- }
- for (i = 0; i < SEQ_C; i++) {
- _port_out(i, SEQ_I);
- regs[SEQ + i] = _port_in(SEQ_D);
- }
- regs[MIS] = _port_in(MIS_R);
-
- /* Save the VGA palette values */
- vga_savepalette(&regs[PAL]);
-
- /* Save the VGA character generator RAM */
- vga_saveFont(&regs[FONT]);
-
- /* Turn the VGA display back on */
- PM_vgaUnblankDisplay();
-}
-
-/****************************************************************************
-REMARKS:
-Retore the state of all VGA compatible registers
-****************************************************************************/
-void PMAPI PM_restoreVGAState(
- const void *stateBuf)
-{
- const uchar *regs = stateBuf;
- int i;
-
- /* Blank the display before we start the restore */
- PM_vgaBlankDisplay();
-
- /* Restore the VGA character generator RAM */
- vga_restoreFont(&regs[FONT]);
-
- /* Restore the VGA palette values */
- vga_restorepalette(&regs[PAL]);
-
- /* Restore the state of the VGA compatible registers */
- _port_out(regs[MIS], MIS_W);
-
- /* Delay to allow clock change to settle */
- for (i = 0; i < 10; i++)
- vga_delay();
-
- /* Synchronous reset on */
- _port_out(0x00,SEQ_I);
- _port_out(0x01,SEQ_D);
-
- /* Write seqeuencer registers */
- _port_out(1, SEQ_I);
- _port_out(regs[SEQ + 1] | 0x20, SEQ_D);
- for (i = 2; i < SEQ_C; i++) {
- _port_out(i, SEQ_I);
- _port_out(regs[SEQ + i], SEQ_D);
- }
-
- /* Synchronous reset off */
- _port_out(0x00,SEQ_I);
- _port_out(0x03,SEQ_D);
-
- /* Deprotect CRT registers 0-7 and write CRTC */
- _port_out(0x11, CRT_I);
- _port_out(_port_in(CRT_D) & 0x7F, CRT_D);
- for (i = 0; i < CRT_C; i++) {
- _port_out(i, CRT_I);
- _port_out(regs[CRT + i], CRT_D);
- }
- for (i = 0; i < GRA_C; i++) {
- _port_out(i, GRA_I);
- _port_out(regs[GRA + i], GRA_D);
- }
- for (i = 0; i < ATT_C; i++) {
- _port_in(IS1_R); /* reset flip-flop */
- vga_delay();
- _port_out(i, ATT_IW);
- vga_delay();
- _port_out(regs[ATT + i], ATT_IW);
- vga_delay();
- }
-
- /* Ensure the VGA screen is turned on */
- PM_vgaUnblankDisplay();
-}
-
-/****************************************************************************
-REMARKS:
-Disables the VGA display for screen output making it blank.
-****************************************************************************/
-void PMAPI PM_vgaBlankDisplay(void)
-{
- /* Turn screen off */
- _port_out(0x01, SEQ_I);
- _port_out(_port_in(SEQ_D) | 0x20, SEQ_D);
-
- /* Disable video output */
- _port_in(IS1_R);
- vga_delay();
- _port_out(0x00, ATT_IW);
-}
-
-/****************************************************************************
-REMARKS:
-Enables the VGA display for screen output.
-****************************************************************************/
-void PMAPI PM_vgaUnblankDisplay(void)
-{
- /* Turn screen back on */
- _port_out(0x01, SEQ_I);
- _port_out(_port_in(SEQ_D) & 0xDF, SEQ_D);
-
- /* Enable video output */
- _port_in(IS1_R);
- vga_delay();
- _port_out(0x20, ATT_IW);
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/cpuinfo.c b/board/MAI/bios_emulator/scitech/src/pm/cpuinfo.c
deleted file mode 100644
index ac62e81c10..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/cpuinfo.c
+++ /dev/null
@@ -1,808 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-*
-* Description: Main module to implement the Zen Timer support functions.
-*
-****************************************************************************/
-
-#include "ztimer.h"
-#include "pmapi.h"
-#include "oshdr.h"
-#if !defined(__WIN32_VXD__) && !defined(__OS2_VDD__) && !defined(__NT_DRIVER__)
-#include <stdio.h>
-#include <string.h>
-#endif
-
-/*----------------------------- Implementation ----------------------------*/
-
-/* External Intel assembler functions */
-#ifdef __INTEL__
-/* {secret} */
-ibool _ASMAPI _CPU_haveCPUID(void);
-/* {secret} */
-ibool _ASMAPI _CPU_check80386(void);
-/* {secret} */
-ibool _ASMAPI _CPU_check80486(void);
-/* {secret} */
-uint _ASMAPI _CPU_checkCPUID(void);
-/* {secret} */
-uint _ASMAPI _CPU_getCPUIDModel(void);
-/* {secret} */
-uint _ASMAPI _CPU_getCPUIDStepping(void);
-/* {secret} */
-uint _ASMAPI _CPU_getCPUIDFeatures(void);
-/* {secret} */
-uint _ASMAPI _CPU_getCacheSize(void);
-/* {secret} */
-uint _ASMAPI _CPU_have3DNow(void);
-/* {secret} */
-ibool _ASMAPI _CPU_checkClone(void);
-/* {secret} */
-void _ASMAPI _CPU_readTimeStamp(CPU_largeInteger *time);
-/* {secret} */
-void _ASMAPI _CPU_runBSFLoop(ulong iterations);
-/* {secret} */
-ulong _ASMAPI _CPU_mulDiv(ulong a,ulong b,ulong c);
-/* {secret} */
-void ZTimerQuickInit(void);
-#define CPU_HaveMMX 0x00800000
-#define CPU_HaveRDTSC 0x00000010
-#define CPU_HaveSSE 0x02000000
-#endif
-
-#if defined(__SMX32__)
-#include "smx/cpuinfo.c"
-#elif defined(__RTTARGET__)
-#include "rttarget/cpuinfo.c"
-#elif defined(__REALDOS__)
-#include "dos/cpuinfo.c"
-#elif defined(__NT_DRIVER__)
-#include "ntdrv/cpuinfo.c"
-#elif defined(__WIN32_VXD__)
-#include "vxd/cpuinfo.c"
-#elif defined(__WINDOWS32__)
-#include "win32/cpuinfo.c"
-#elif defined(__OS2_VDD__)
-#include "vdd/cpuinfo.c"
-#elif defined(__OS2__)
-#include "os2/cpuinfo.c"
-#elif defined(__LINUX__)
-#include "linux/cpuinfo.c"
-#elif defined(__QNX__)
-#include "qnx/cpuinfo.c"
-#elif defined(__BEOS__)
-#include "beos/cpuinfo.c"
-#else
-#error CPU library not ported to this platform yet!
-#endif
-
-/*------------------------ Public interface routines ----------------------*/
-
-/****************************************************************************
-REMARKS:
-Read an I/O port location.
-****************************************************************************/
-static uchar rdinx(
- int port,
- int index)
-{
- PM_outpb(port,(uchar)index);
- return PM_inpb(port+1);
-}
-
-/****************************************************************************
-REMARKS:
-Write an I/O port location.
-****************************************************************************/
-static void wrinx(
- ushort port,
- ushort index,
- ushort value)
-{
- PM_outpb(port,(uchar)index);
- PM_outpb(port+1,(uchar)value);
-}
-
-/****************************************************************************
-REMARKS:
-Enables the Cyrix CPUID instruction to properly detect MediaGX and 6x86
-processors.
-****************************************************************************/
-static void _CPU_enableCyrixCPUID(void)
-{
- uchar ccr3;
-
- PM_init();
- ccr3 = rdinx(0x22,0xC3);
- wrinx(0x22,0xC3,(uchar)(ccr3 | 0x10));
- wrinx(0x22,0xE8,(uchar)(rdinx(0x22,0xE8) | 0x80));
- wrinx(0x22,0xC3,ccr3);
-}
-
-/****************************************************************************
-DESCRIPTION:
-Returns the type of processor in the system.
-
-HEADER:
-ztimer.h
-
-RETURNS:
-Numerical identifier for the installed processor
-
-REMARKS:
-Returns the type of processor in the system. Note that if the CPU is an
-unknown Pentium family processor that we don't have an enumeration for,
-the return value will be greater than or equal to the value of CPU_UnkPentium
-(depending on the value returned by the CPUID instruction).
-
-SEE ALSO:
-CPU_getProcessorSpeed, CPU_haveMMX, CPU_getProcessorName
-****************************************************************************/
-uint ZAPI CPU_getProcessorType(void)
-{
-#if defined(__INTEL__)
- uint cpu,vendor,model,cacheSize;
- static ibool firstTime = true;
-
- if (_CPU_haveCPUID()) {
- cpu = _CPU_checkCPUID();
- vendor = cpu & ~CPU_mask;
- if (vendor == CPU_Intel) {
- /* Check for Intel processors */
- switch (cpu & CPU_mask) {
- case 4: cpu = CPU_i486; break;
- case 5: cpu = CPU_Pentium; break;
- case 6:
- if ((model = _CPU_getCPUIDModel()) == 1)
- cpu = CPU_PentiumPro;
- else if (model <= 6) {
- cacheSize = _CPU_getCacheSize();
- if ((model == 5 && cacheSize == 0) ||
- (model == 5 && cacheSize == 256) ||
- (model == 6 && cacheSize == 128))
- cpu = CPU_Celeron;
- else
- cpu = CPU_PentiumII;
- }
- else if (model >= 7) {
- /* Model 7 == Pentium III */
- /* Model 8 == Celeron/Pentium III Coppermine */
- cacheSize = _CPU_getCacheSize();
- if ((model == 8 && cacheSize == 128))
- cpu = CPU_Celeron;
- else
- cpu = CPU_PentiumIII;
- }
- break;
- default:
- cpu = CPU_UnkIntel;
- }
- }
- else if (vendor == CPU_Cyrix) {
- /* Check for Cyrix processors */
- switch (cpu & CPU_mask) {
- case 4:
- if ((model = _CPU_getCPUIDModel()) == 4)
- cpu = CPU_CyrixMediaGX;
- else
- cpu = CPU_UnkCyrix;
- break;
- case 5:
- if ((model = _CPU_getCPUIDModel()) == 2)
- cpu = CPU_Cyrix6x86;
- else if (model == 4)
- cpu = CPU_CyrixMediaGXm;
- else
- cpu = CPU_UnkCyrix;
- break;
- case 6:
- if ((model = _CPU_getCPUIDModel()) <= 1)
- cpu = CPU_Cyrix6x86MX;
- else
- cpu = CPU_UnkCyrix;
- break;
- default:
- cpu = CPU_UnkCyrix;
- }
- }
- else if (vendor == CPU_AMD) {
- /* Check for AMD processors */
- switch (cpu & CPU_mask) {
- case 4:
- if ((model = _CPU_getCPUIDModel()) == 0)
- cpu = CPU_AMDAm5x86;
- else
- cpu = CPU_AMDAm486;
- break;
- case 5:
- if ((model = _CPU_getCPUIDModel()) <= 3)
- cpu = CPU_AMDK5;
- else if (model <= 7)
- cpu = CPU_AMDK6;
- else if (model == 8)
- cpu = CPU_AMDK6_2;
- else if (model == 9)
- cpu = CPU_AMDK6_III;
- else if (model == 13) {
- if (_CPU_getCPUIDStepping() <= 3)
- cpu = CPU_AMDK6_IIIplus;
- else
- cpu = CPU_AMDK6_2plus;
- }
- else
- cpu = CPU_UnkAMD;
- break;
- case 6:
- if ((model = _CPU_getCPUIDModel()) == 3)
- cpu = CPU_AMDDuron;
- else
- cpu = CPU_AMDAthlon;
- break;
- default:
- cpu = CPU_UnkAMD;
- }
- }
- else if (vendor == CPU_IDT) {
- /* Check for IDT WinChip processors */
- switch (cpu & CPU_mask) {
- case 5:
- if ((model = _CPU_getCPUIDModel()) <= 4)
- cpu = CPU_WinChipC6;
- else if (model == 8)
- cpu = CPU_WinChip2;
- else
- cpu = CPU_UnkIDT;
- break;
- default:
- cpu = CPU_UnkIDT;
- }
- }
- else {
- /* Assume a Pentium compatible Intel clone */
- cpu = CPU_Pentium;
- }
- return cpu | vendor | (_CPU_getCPUIDStepping() << CPU_steppingShift);
- }
- else {
- if (_CPU_check80386())
- cpu = CPU_i386;
- else if (_CPU_check80486()) {
- /* If we get here we may have a Cyrix processor so we can try
- * enabling the CPUID instruction and trying again.
- */
- if (firstTime) {
- firstTime = false;
- _CPU_enableCyrixCPUID();
- return CPU_getProcessorType();
- }
- cpu = CPU_i486;
- }
- else
- cpu = CPU_Pentium;
- if (!_CPU_checkClone())
- return cpu | CPU_Intel;
- return cpu;
- }
-#elif defined(__ALPHA__)
- return CPU_Alpha;
-#elif defined(__MIPS__)
- return CPU_Mips;
-#elif defined(__PPC__)
- return CPU_PowerPC;
-#endif
-}
-
-/****************************************************************************
-DESCRIPTION:
-Returns true if the processor supports Intel MMX extensions.
-
-HEADER:
-ztimer.h
-
-RETURNS:
-True if MMX is available, false if not.
-
-REMARKS:
-This function determines if the processor supports the Intel MMX extended
-instruction set.
-
-SEE ALSO:
-CPU_getProcessorType, CPU_getProcessorSpeed, CPU_have3DNow, CPU_haveSSE,
-CPU_getProcessorName
-****************************************************************************/
-ibool ZAPI CPU_haveMMX(void)
-{
-#ifdef __INTEL__
- if (_CPU_haveCPUID())
- return (_CPU_getCPUIDFeatures() & CPU_HaveMMX) != 0;
- return false;
-#else
- return false;
-#endif
-}
-
-/****************************************************************************
-DESCRIPTION:
-Returns true if the processor supports AMD 3DNow! extensions.
-
-HEADER:
-ztimer.h
-
-RETURNS:
-True if 3DNow! is available, false if not.
-
-REMARKS:
-This function determines if the processor supports the AMD 3DNow! extended
-instruction set.
-
-SEE ALSO:
-CPU_getProcessorType, CPU_getProcessorSpeed, CPU_haveMMX, CPU_haveSSE,
-CPU_getProcessorName
-****************************************************************************/
-ibool ZAPI CPU_have3DNow(void)
-{
-#ifdef __INTEL__
- if (_CPU_haveCPUID())
- return _CPU_have3DNow();
- return false;
-#else
- return false;
-#endif
-}
-
-/****************************************************************************
-DESCRIPTION:
-Returns true if the processor supports Intel KNI extensions.
-
-HEADER:
-ztimer.h
-
-RETURNS:
-True if Intel KNI is available, false if not.
-
-REMARKS:
-This function determines if the processor supports the Intel KNI extended
-instruction set.
-
-SEE ALSO:
-CPU_getProcessorType, CPU_getProcessorSpeed, CPU_haveMMX, CPU_have3DNow,
-CPU_getProcessorName
-****************************************************************************/
-ibool ZAPI CPU_haveSSE(void)
-{
-#ifdef __INTEL__
- if (_CPU_haveCPUID())
- return (_CPU_getCPUIDFeatures() & CPU_HaveSSE) != 0;
- return false;
-#else
- return false;
-#endif
-}
-
-/****************************************************************************
-RETURNS:
-True if the RTSC instruction is available, false if not.
-
-REMARKS:
-This function determines if the processor supports the Intel RDTSC
-instruction, for high precision timing. If the processor is not an Intel or
-Intel clone CPU, this function will always return false.
-
-DESCRIPTION:
-Returns true if the processor supports RDTSC extensions.
-
-HEADER:
-ztimer.h
-
-RETURNS:
-True if RTSC is available, false if not.
-
-REMARKS:
-This function determines if the processor supports the RDTSC instruction
-for reading the processor time stamp counter.
-
-SEE ALSO:
-CPU_getProcessorType, CPU_getProcessorSpeed, CPU_haveMMX, CPU_have3DNow,
-CPU_getProcessorName
-****************************************************************************/
-ibool ZAPI CPU_haveRDTSC(void)
-{
-#ifdef __INTEL__
- if (_CPU_haveCPUID())
- return (_CPU_getCPUIDFeatures() & CPU_HaveRDTSC) != 0;
- return false;
-#else
- return false;
-#endif
-}
-
-#ifdef __INTEL__
-
-#define ITERATIONS 16000
-#define SAMPLINGS 2
-#define INNER_LOOPS 400
-
-/****************************************************************************
-REMARKS:
-If processor does not support time stamp reading, but is at least a 386 or
-above, utilize method of timing a loop of BSF instructions which take a
-known number of cycles to run on i386(tm), i486(tm), and Pentium(R)
-processors.
-****************************************************************************/
-static ulong GetBSFCpuSpeed(
- ulong cycles)
-{
- CPU_largeInteger t0,t1,count_freq;
- ulong ticks; /* Microseconds elapsed during test */
- ulong current; /* Variable to store time elapsed */
- int i,j,iPriority;
- ulong lowest = (ulong)-1;
-
- iPriority = SetMaxThreadPriority();
- GetCounterFrequency(&count_freq);
- for (i = 0; i < SAMPLINGS; i++) {
- GetCounter(&t0);
- for (j = 0; j < INNER_LOOPS; j++)
- _CPU_runBSFLoop(ITERATIONS);
- GetCounter(&t1);
- current = t1.low - t0.low;
- if (current < lowest)
- lowest = current;
- }
- RestoreThreadPriority(iPriority);
-
- /* Compute frequency */
- ticks = _CPU_mulDiv(lowest,1000000,count_freq.low);
- if ((ticks % count_freq.low) > (count_freq.low/2))
- ticks++; /* Round up if necessary */
- if (ticks == 0)
- return 0;
- return ((cycles*INNER_LOOPS)/ticks);
-}
-
-#define TOLERANCE 1
-
-/****************************************************************************
-REMARKS:
-On processors supporting the Read Time Stamp opcode, compare elapsed
-time on the High-Resolution Counter with elapsed cycles on the Time
-Stamp Register.
-
-The inner loop runs up to 20 times oruntil the average of the previous
-three calculated frequencies is within 1 MHz of each of the individual
-calculated frequencies. This resampling increases the accuracy of the
-results since outside factors could affect this calculation.
-****************************************************************************/
-static ulong GetRDTSCCpuSpeed(
- ibool accurate)
-{
- CPU_largeInteger t0,t1,s0,s1,count_freq;
- u64 stamp0, stamp1, ticks0, ticks1;
- u64 total_cycles, cycles, hz, freq;
- u64 total_ticks, ticks;
- int tries,iPriority;
- ulong maxCount;
-
- PM_set64_32(total_cycles,0);
- PM_set64_32(total_ticks,0);
- maxCount = accurate ? 600000 : 30000;
- iPriority = SetMaxThreadPriority();
- GetCounterFrequency(&count_freq);
- PM_set64(freq,count_freq.high,count_freq.low);
- for (tries = 0; tries < 3; tries++) {
- /* Loop until 100 ticks have passed since last read of hi-res
- * counter. This accounts for overhead later.
- */
- GetCounter(&t0);
- t1.low = t0.low;
- t1.high = t0.high;
- while ((t1.low - t0.low) < 100) {
- GetCounter(&t1);
- _CPU_readTimeStamp(&s0);
- }
-
- /* Loop until 30000 ticks have passed since last read of hi-res counter.
- * This allows for elapsed time for sampling. For a hi-res frequency
- * of 1MHz, this is about 0.03 of a second. The frequency reported
- * by the OS dependent code should be tuned to provide a good
- * sample period depending on the accuracy of the OS timers (ie:
- * if the accuracy is lower, lower the frequency to spend more time
- * in the inner loop to get better accuracy).
- */
- t0.low = t1.low;
- t0.high = t1.high;
- while ((t1.low - t0.low) < maxCount) {
- GetCounter(&t1);
- _CPU_readTimeStamp(&s1);
- }
-
- /* Find the difference during the timing loop */
- PM_set64(stamp0,s0.high,s0.low);
- PM_set64(stamp1,s1.high,s1.low);
- PM_set64(ticks0,t0.high,t0.low);
- PM_set64(ticks1,t1.high,t1.low);
- PM_sub64(cycles,stamp1,stamp0);
- PM_sub64(ticks,ticks1,ticks0);
-
- /* Sum up the results */
- PM_add64(total_ticks,total_ticks,ticks);
- PM_add64(total_cycles,total_cycles,cycles);
- }
- RestoreThreadPriority(iPriority);
-
- /* Compute frequency in Hz */
- PM_mul64(hz,total_cycles,freq);
- PM_div64(hz,hz,total_ticks);
- return PM_64to32(hz);
-}
-
-#endif /* __INTEL__ */
-
-/****************************************************************************
-DESCRIPTION:
-Returns the speed of the processor in MHz.
-
-HEADER:
-ztimer.h
-
-PARAMETERS:
-accurate - True of the speed should be measured accurately
-
-RETURNS:
-Processor speed in MHz.
-
-REMARKS:
-This function returns the speed of the CPU in MHz. Note that if the speed
-cannot be determined, this function will return 0.
-
-If the accurate parameter is set to true, this function will spend longer
-profiling the speed of the CPU, and will not round the CPU speed that is
-reported. This is important for highly accurate timing using the Pentium
-RDTSC instruction, but it does take a lot longer for the profiling to
-produce accurate results.
-
-SEE ALSO:
-CPU_getProcessorSpeedInHz, CPU_getProcessorType, CPU_haveMMX,
-CPU_getProcessorName
-****************************************************************************/
-ulong ZAPI CPU_getProcessorSpeed(
- ibool accurate)
-{
-#if defined(__INTEL__)
- /* Number of cycles needed to execute a single BSF instruction on i386+
- * processors.
- */
- ulong cpuSpeed;
- uint i;
- static ulong intel_cycles[] = {
- 115,47,43,
- };
- static ulong cyrix_cycles[] = {
- 38,38,52,52,
- };
- static ulong amd_cycles[] = {
- 49,
- };
- static ulong known_speeds[] = {
- 1000,950,900,850,800,750,700,650,600,550,500,450,433,400,350,
- 333,300,266,233,200,166,150,133,120,100,90,75,66,60,50,33,20,0,
- };
-
- if (CPU_haveRDTSC()) {
- cpuSpeed = (GetRDTSCCpuSpeed(accurate) + 500000) / 1000000;
- }
- else {
- int type = CPU_getProcessorType();
- int processor = type & CPU_mask;
- int vendor = type & CPU_familyMask;
- if (vendor == CPU_Intel)
- cpuSpeed = GetBSFCpuSpeed(ITERATIONS * intel_cycles[processor - CPU_i386]);
- else if (vendor == CPU_Cyrix)
- cpuSpeed = GetBSFCpuSpeed(ITERATIONS * cyrix_cycles[processor - CPU_Cyrix6x86]);
- else if (vendor == CPU_AMD)
- cpuSpeed = GetBSFCpuSpeed(ITERATIONS * amd_cycles[0]);
- else
- return 0;
- }
-
- /* Now normalise the results given known processors speeds, if the
- * speed we measure is within 2MHz of the expected values
- */
- if (!accurate) {
- for (i = 0; known_speeds[i] != 0; i++) {
- if (cpuSpeed >= (known_speeds[i]-3) && cpuSpeed <= (known_speeds[i]+3)) {
- return known_speeds[i];
- }
- }
- }
- return cpuSpeed;
-#else
- return 0;
-#endif
-}
-
-/****************************************************************************
-DESCRIPTION:
-Returns the speed of the processor in Hz.
-
-HEADER:
-ztimer.h
-
-RETURNS:
-Accurate processor speed in Hz.
-
-REMARKS:
-This function returns the accurate speed of the CPU in Hz. Note that if the
-speed cannot be determined, this function will return 0.
-
-This function is similar to the CPU_getProcessorSpeed function, except that
-it attempts to accurately measure the CPU speed in Hz. This is used
-internally in the Zen Timer libraries to provide accurate real world timing
-information. This is important for highly accurate timing using the Pentium
-RDTSC instruction, but it does take a lot longer for the profiling to
-produce accurate results.
-
-SEE ALSO:
-CPU_getProcessorSpeed, CPU_getProcessorType, CPU_haveMMX,
-CPU_getProcessorName
-****************************************************************************/
-ulong ZAPI CPU_getProcessorSpeedInHZ(
- ibool accurate)
-{
-#if defined(__INTEL__)
- if (CPU_haveRDTSC()) {
- return GetRDTSCCpuSpeed(accurate);
- }
- return CPU_getProcessorSpeed(false) * 1000000;
-#else
- return 0;
-#endif
-}
-
-/****************************************************************************
-DESCRIPTION:
-Returns a string defining the speed and name of the processor.
-
-HEADER:
-ztimer.h
-
-RETURNS:
-Processor name string.
-
-REMARKS:
-This function returns an English string describing the speed and name of the
-CPU.
-
-SEE ALSO:
-CPU_getProcessorType, CPU_haveMMX, CPU_getProcessorName
-****************************************************************************/
-char * ZAPI CPU_getProcessorName(void)
-{
-#if defined(__INTEL__)
- static int cpu,speed = -1;
- static char name[80];
-
- if (speed == -1) {
- cpu = CPU_getProcessorType();
- speed = CPU_getProcessorSpeed(false);
- }
- sprintf(name,"%d MHz ", speed);
- switch (cpu & CPU_mask) {
- case CPU_i386:
- strcat(name,"Intel i386 processor");
- break;
- case CPU_i486:
- strcat(name,"Intel i486 processor");
- break;
- case CPU_Pentium:
- strcat(name,"Intel Pentium processor");
- break;
- case CPU_PentiumPro:
- strcat(name,"Intel Pentium Pro processor");
- break;
- case CPU_PentiumII:
- strcat(name,"Intel Pentium II processor");
- break;
- case CPU_Celeron:
- strcat(name,"Intel Celeron processor");
- break;
- case CPU_PentiumIII:
- strcat(name,"Intel Pentium III processor");
- break;
- case CPU_UnkIntel:
- strcat(name,"Unknown Intel processor");
- break;
- case CPU_Cyrix6x86:
- strcat(name,"Cyrix 6x86 processor");
- break;
- case CPU_Cyrix6x86MX:
- strcat(name,"Cyrix 6x86MX processor");
- break;
- case CPU_CyrixMediaGX:
- strcat(name,"Cyrix MediaGX processor");
- break;
- case CPU_CyrixMediaGXm:
- strcat(name,"Cyrix MediaGXm processor");
- break;
- case CPU_UnkCyrix:
- strcat(name,"Unknown Cyrix processor");
- break;
- case CPU_AMDAm486:
- strcat(name,"AMD Am486 processor");
- break;
- case CPU_AMDAm5x86:
- strcat(name,"AMD Am5x86 processor");
- break;
- case CPU_AMDK5:
- strcat(name,"AMD K5 processor");
- break;
- case CPU_AMDK6:
- strcat(name,"AMD K6 processor");
- break;
- case CPU_AMDK6_2:
- strcat(name,"AMD K6-2 processor");
- break;
- case CPU_AMDK6_III:
- strcat(name,"AMD K6-III processor");
- break;
- case CPU_AMDK6_2plus:
- strcat(name,"AMD K6-2+ processor");
- break;
- case CPU_AMDK6_IIIplus:
- strcat(name,"AMD K6-III+ processor");
- break;
- case CPU_UnkAMD:
- strcat(name,"Unknown AMD processor");
- break;
- case CPU_AMDAthlon:
- strcat(name,"AMD Athlon processor");
- break;
- case CPU_AMDDuron:
- strcat(name,"AMD Duron processor");
- break;
- case CPU_WinChipC6:
- strcat(name,"IDT WinChip C6 processor");
- break;
- case CPU_WinChip2:
- strcat(name,"IDT WinChip 2 processor");
- break;
- case CPU_UnkIDT:
- strcat(name,"Unknown IDT processor");
- break;
- default:
- strcat(name,"Unknown processor");
- }
- if (CPU_haveMMX())
- strcat(name," with MMX(R)");
- if (CPU_have3DNow())
- strcat(name,", 3DNow!(R)");
- if (CPU_haveSSE())
- strcat(name,", SSE(R)");
- return name;
-#else
- return "Unknown";
-#endif
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/debug.c b/board/MAI/bios_emulator/scitech/src/pm/debug.c
deleted file mode 100644
index 751bf098fc..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/debug.c
+++ /dev/null
@@ -1,107 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-*
-* Description: Main module containing debug checking features.
-*
-****************************************************************************/
-
-#include "pmapi.h"
-#ifdef __WIN32_VXD__
-#include "vxdfile.h"
-#elif defined(__NT_DRIVER__)
-#include "ntdriver.h"
-#elif defined(__OS2_VDD__)
-#include "vddfile.h"
-#else
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#endif
-
-/*---------------------------- Global variables ---------------------------*/
-
-/* {secret} */
-void (*_CHK_fail)(int fatal,const char *msg,const char *cond,const char *file,int line) = _CHK_defaultFail;
-static char logFile[256] = "";
-
-/*----------------------------- Implementation ----------------------------*/
-
-#ifdef CHECKED
-void _CHK_defaultFail(
- int fatal,
- const char *msg,
- const char *cond,
- const char *file,
- int line)
-{
- FILE *f;
- char buf[256];
-
- if (logFile[0] == 0) {
- strcpy(logFile,PM_getNucleusPath());
- PM_backslash(logFile);
- strcat(logFile,"scitech.log");
- }
- if ((f = fopen(logFile,"a+")) != NULL) {
-#if defined(__WIN32_VXD__) || defined(__OS2_VDD__) || defined(__NT_DRIVER__)
- sprintf(buf,msg,cond,file,line);
- fwrite(buf,1,strlen(buf),f);
-#else
- fprintf(f,msg,cond,file,line);
-#endif
- fclose(f);
- }
- if (fatal) {
- sprintf(buf,"Check failed: check '%s' for details", logFile);
- PM_fatalError(buf);
- }
-}
-#endif
-
-/****************************************************************************
-DESCRIPTION:
-Sets the location of the debug log file.
-
-HEADER:
-pmapi.h
-
-PARAMETERS:
-logFilePath - Full file and path name to debug log file.
-
-REMARKS:
-Sets the name and location of the debug log file. The debug log file is
-created and written to when runtime checks, warnings and failure conditions
-are logged to disk when code is compiled in CHECKED mode. By default the
-log file is called 'scitech.log' and goes into the current SciTech Nucleus
-path for the application. You can use this function to set the filename
-and location of the debug log file to your own application specific
-directory.
-****************************************************************************/
-void PMAPI PM_setDebugLog(
- const char *logFilePath)
-{
- strcpy(logFile,logFilePath);
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/dos/_event.asm b/board/MAI/bios_emulator/scitech/src/pm/dos/_event.asm
deleted file mode 100644
index 36dcaab67b..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/dos/_event.asm
+++ /dev/null
@@ -1,194 +0,0 @@
-;****************************************************************************
-;*
-;* SciTech Multi-platform Graphics Library
-;*
-;* ========================================================================
-;*
-;* The contents of this file are subject to the SciTech MGL Public
-;* License Version 1.0 (the "License"); you may not use this file
-;* except in compliance with the License. You may obtain a copy of
-;* the License at http://www.scitechsoft.com/mgl-license.txt
-;*
-;* Software distributed under the License is distributed on an
-;* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-;* implied. See the License for the specific language governing
-;* rights and limitations under the License.
-;*
-;* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-;*
-;* The Initial Developer of the Original Code is SciTech Software, Inc.
-;* All Rights Reserved.
-;*
-;* ========================================================================
-;*
-;* Language: 80386 Assembler
-;* Environment: IBM PC (MS DOS)
-;*
-;* Description: Assembly language support routines for the event module.
-;*
-;****************************************************************************
-
- ideal
-
-include "scitech.mac" ; Memory model macros
-
-ifdef flatmodel
-
-header _event ; Set up memory model
-
-begdataseg _event
-
- cextern _EVT_biosPtr,DPTR
-
-ifdef USE_NASM
-%define KB_HEAD WORD esi+01Ah ; Keyboard buffer head in BIOS data area
-%define KB_TAIL WORD esi+01Ch ; Keyboard buffer tail in BIOS data area
-%define KB_START WORD esi+080h ; Start of keyboard buffer in BIOS data area
-%define KB_END WORD esi+082h ; End of keyboard buffer in BIOS data area
-else
-KB_HEAD EQU WORD esi+01Ah ; Keyboard buffer head in BIOS data area
-KB_TAIL EQU WORD esi+01Ch ; Keyboard buffer tail in BIOS data area
-KB_START EQU WORD esi+080h ; Start of keyboard buffer in BIOS data area
-KB_END EQU WORD esi+082h ; End of keyboard buffer in BIOS data area
-endif
-
-enddataseg _event
-
-begcodeseg _event ; Start of code segment
-
- cpublic _EVT_codeStart
-
-;----------------------------------------------------------------------------
-; int _EVT_getKeyCode(void)
-;----------------------------------------------------------------------------
-; Returns the key code for the next available key by extracting it from
-; the BIOS keyboard buffer.
-;----------------------------------------------------------------------------
-cprocstart _EVT_getKeyCode
-
- enter_c
-
- mov esi,[_EVT_biosPtr]
- xor ebx,ebx
- xor eax,eax
- mov bx,[KB_HEAD]
- cmp bx,[KB_TAIL]
- jz @@Done
- xor eax,eax
- mov ax,[esi+ebx] ; EAX := character from keyboard buffer
- inc _bx
- inc _bx
- cmp bx,[KB_END] ; Hit the end of the keyboard buffer?
- jl @@1
- mov bx,[KB_START]
-@@1: mov [KB_HEAD],bx ; Update keyboard buffer head pointer
-
-@@Done: leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void _EVT_pumpMessages(void)
-;----------------------------------------------------------------------------
-; This function would normally do nothing, however due to strange bugs
-; in the Windows 3.1 and OS/2 DOS boxes, we don't get any hardware keyboard
-; interrupts unless we periodically call the BIOS keyboard functions. Hence
-; this function gets called every time that we check for events, and works
-; around this problem (in essence it tells the DOS VDM to pump the
-; keyboard events to our program ;-).
-;
-; Note that this bug is not present under Win 9x DOS boxes.
-;----------------------------------------------------------------------------
-cprocstart _EVT_pumpMessages
-
- mov ah,11h ; Function - Check keyboard status
- int 16h ; Call BIOS
-
- mov ax, 0Bh ; Reset Move Mouse
- int 33h
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; int _EVT_disableInt(void);
-;----------------------------------------------------------------------------
-; Return processor interrupt status and disable interrupts.
-;----------------------------------------------------------------------------
-cprocstart _EVT_disableInt
-
- pushf ; Put flag word on stack
- cli ; Disable interrupts!
- pop eax ; deposit flag word in return register
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void _EVT_restoreInt(int ps);
-;----------------------------------------------------------------------------
-; Restore processor interrupt status.
-;----------------------------------------------------------------------------
-cprocstart _EVT_restoreInt
-
- ARG ps:UINT
-
- push ebp
- mov ebp,esp ; Set up stack frame
- push [DWORD ps]
- popf ; Restore processor status (and interrupts)
- pop ebp
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; int EVT_rdinx(int port,int index)
-;----------------------------------------------------------------------------
-; Reads an indexed register value from an I/O port.
-;----------------------------------------------------------------------------
-cprocstart EVT_rdinx
-
- ARG port:UINT, index:UINT
-
- push ebp
- mov ebp,esp
- mov edx,[port]
- mov al,[BYTE index]
- out dx,al
- inc dx
- in al,dx
- movzx eax,al
- pop ebp
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void EVT_wrinx(int port,int index,int value)
-;----------------------------------------------------------------------------
-; Writes an indexed register value to an I/O port.
-;----------------------------------------------------------------------------
-cprocstart EVT_wrinx
-
- ARG port:UINT, index:UINT, value:UINT
-
- push ebp
- mov ebp,esp
- mov edx,[port]
- mov al,[BYTE index]
- mov ah,[BYTE value]
- out dx,ax
- pop ebp
- ret
-
-cprocend
-
- cpublic _EVT_codeEnd
-
-endcodeseg _event
-
-endif
-
- END ; End of module
diff --git a/board/MAI/bios_emulator/scitech/src/pm/dos/_lztimer.asm b/board/MAI/bios_emulator/scitech/src/pm/dos/_lztimer.asm
deleted file mode 100644
index a4a9c7916e..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/dos/_lztimer.asm
+++ /dev/null
@@ -1,438 +0,0 @@
-;****************************************************************************
-;*
-;* SciTech OS Portability Manager Library
-;*
-;* ========================================================================
-;*
-;* The contents of this file are subject to the SciTech MGL Public
-;* License Version 1.0 (the "License"); you may not use this file
-;* except in compliance with the License. You may obtain a copy of
-;* the License at http://www.scitechsoft.com/mgl-license.txt
-;*
-;* Software distributed under the License is distributed on an
-;* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-;* implied. See the License for the specific language governing
-;* rights and limitations under the License.
-;*
-;* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-;*
-;* The Initial Developer of the Original Code is SciTech Software, Inc.
-;* All Rights Reserved.
-;*
-;* ========================================================================
-;*
-;* Language: NASM or TASM Assembler
-;* Environment: IBM PC (MS DOS)
-;*
-;* Description: Uses the 8253 timer and the BIOS time-of-day count to time
-;* the performance of code that takes less than an hour to
-;* execute.
-;*
-;* The routines in this package only works with interrupts
-;* enabled, and in fact will explicitly turn interrupts on
-;* in order to ensure we get accurate results from the timer.
-;*
-;* Externally 'C' callable routines:
-;*
-;* LZ_timerOn: Saves the BIOS time of day count and starts the
-;* long period Zen Timer.
-;*
-;* LZ_timerLap: Latches the current count, and keeps the timer running
-;*
-;* LZ_timerOff: Stops the long-period Zen Timer and saves the timer
-;* count and the BIOS time of day count.
-;*
-;* LZ_timerCount: Returns an unsigned long representing the timed count
-;* in microseconds. If more than an hour passed during
-;* the timing interval, LZ_timerCount will return the
-;* value 0xFFFFFFFF (an invalid count).
-;*
-;* Note: If either more than an hour passes between calls to LZ_timerOn
-;* and LZ_timerOff, an error is reported. For timing code that takes
-;* more than a few minutes to execute, use the low resolution
-;* Ultra Long Period Zen Timer code, which should be accurate
-;* enough for most purposes.
-;*
-;* Note: Each block of code being timed should ideally be run several
-;* times, with at least two similar readings required to
-;* establish a true measurement, in order to eliminate any
-;* variability caused by interrupts.
-;*
-;* Note: Interrupts must not be disabled for more than 54 ms at a
-;* stretch during the timing interval. Because interrupts are
-;* enabled, key, mice, and other devices that generate interrupts
-;* should not be used during the timing interval.
-;*
-;* Note: Any extra code running off the timer interrupt (such as
-;* some memory resident utilities) will increase the time
-;* measured by the Zen Timer.
-;*
-;* Note: These routines can introduce inaccuracies of up to a few
-;* tenths of a second into the system clock count for each
-;* code section being timed. Consequently, it's a good idea to
-;* reboot at the conclusion of timing sessions. (The
-;* battery-backed clock, if any, is not affected by the Zen
-;* timer.)
-;*
-;* All registers and all flags are preserved by all routines, except
-;* interrupts which are always turned on
-;*
-;****************************************************************************
-
- IDEAL
-
-include "scitech.mac"
-
-;****************************************************************************
-;
-; Equates used by long period Zen Timer
-;
-;****************************************************************************
-
-; Base address of 8253 timer chip
-
-BASE_8253 equ 40h
-
-; The address of the timer 0 count registers in the 8253
-
-TIMER_0_8253 equ BASE_8253 + 0
-
-; The address of the mode register in the 8253
-
-MODE_8253 equ BASE_8253 + 3
-
-; The address of the BIOS timer count variable in the BIOS data area.
-
-TIMER_COUNT equ 6Ch
-
-; Macro to delay briefly to ensure that enough time has elapsed between
-; successive I/O accesses so that the device being accessed can respond
-; to both accesses even on a very fast PC.
-
-ifdef USE_NASM
-%macro DELAY 0
- jmp short $+2
- jmp short $+2
- jmp short $+2
-%endmacro
-else
-macro DELAY
- jmp short $+2
- jmp short $+2
- jmp short $+2
-endm
-endif
-
-header _lztimer
-
-begdataseg _lztimer
-
- cextern _ZTimerBIOSPtr,DPTR
-
-StartBIOSCount dd 0 ; Starting BIOS count dword
-EndBIOSCount dd 0 ; Ending BIOS count dword
-EndTimedCount dw 0 ; Timer 0 count at the end of timing period
-
-enddataseg _lztimer
-
-begcodeseg _lztimer ; Start of code segment
-
-;----------------------------------------------------------------------------
-; void LZ_timerOn(void);
-;----------------------------------------------------------------------------
-; Starts the Long period Zen timer counting.
-;----------------------------------------------------------------------------
-cprocstart LZ_timerOn
-
-; Set the timer 0 of the 8253 to mode 2 (divide-by-N), to cause
-; linear counting rather than count-by-two counting. Also stops
-; timer 0 until the timer count is loaded, except on PS/2 computers.
-
- mov al,00110100b ; mode 2
- out MODE_8253,al
-
-; Set the timer count to 0, so we know we won't get another timer
-; interrupt right away. Note: this introduces an inaccuracy of up to 54 ms
-; in the system clock count each time it is executed.
-
- DELAY
- sub al,al
- out TIMER_0_8253,al ; lsb
- DELAY
- out TIMER_0_8253,al ; msb
-
-; Store the timing start BIOS count
-
- use_es
-ifdef flatmodel
- mov ebx,[_ZTimerBIOSPtr]
-else
- les bx,[_ZTimerBIOSPtr]
-endif
- cli ; No interrupts while we grab the count
- mov eax,[_ES _bx+TIMER_COUNT]
- sti
- mov [StartBIOSCount],eax
- unuse_es
-
-; Set the timer count to 0 again to start the timing interval.
-
- mov al,00110100b ; set up to load initial
- out MODE_8253,al ; timer count
- DELAY
- sub al,al
- out TIMER_0_8253,al ; load count lsb
- DELAY
- out TIMER_0_8253,al ; load count msb
-
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void LZ_timerOff(void);
-;----------------------------------------------------------------------------
-; Stops the long period Zen timer and saves count.
-;----------------------------------------------------------------------------
-cprocstart LZ_timerOff
-
-; Latch the timer count.
-
- mov al,00000000b ; latch timer 0
- out MODE_8253,al
- cli ; Stop the BIOS count
-
-; Read the BIOS count. (Since interrupts are disabled, the BIOS
-; count won't change).
-
- use_es
-ifdef flatmodel
- mov ebx,[_ZTimerBIOSPtr]
-else
- les bx,[_ZTimerBIOSPtr]
-endif
- mov eax,[_ES _bx+TIMER_COUNT]
- mov [EndBIOSCount],eax
- unuse_es
-
-; Read out the count we latched earlier.
-
- in al,TIMER_0_8253 ; least significant byte
- DELAY
- mov ah,al
- in al,TIMER_0_8253 ; most significant byte
- xchg ah,al
- neg ax ; Convert from countdown remaining
- ; to elapsed count
- mov [EndTimedCount],ax
- sti ; Let the BIOS count continue
-
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; unsigned long LZ_timerLap(void)
-;----------------------------------------------------------------------------
-; Latches the current count and converts it to a microsecond timing value,
-; but leaves the timer still running. We dont check for and overflow,
-; where the time has gone over an hour in this routine, since we want it
-; to execute as fast as possible.
-;----------------------------------------------------------------------------
-cprocstart LZ_timerLap
-
- push ebx ; Save EBX for 32 bit code
-
-; Latch the timer count.
-
- mov al,00000000b ; latch timer 0
- out MODE_8253,al
- cli ; Stop the BIOS count
-
-; Read the BIOS count. (Since interrupts are disabled, the BIOS
-; count wont change).
-
- use_es
-ifdef flatmodel
- mov ebx,[_ZTimerBIOSPtr]
-else
- les bx,[_ZTimerBIOSPtr]
-endif
- mov eax,[_ES _bx+TIMER_COUNT]
- mov [EndBIOSCount],eax
- unuse_es
-
-; Read out the count we latched earlier.
-
- in al,TIMER_0_8253 ; least significant byte
- DELAY
- mov ah,al
- in al,TIMER_0_8253 ; most significant byte
- xchg ah,al
- neg ax ; Convert from countdown remaining
- ; to elapsed count
- mov [EndTimedCount],ax
- sti ; Let the BIOS count continue
-
-; See if a midnight boundary has passed and adjust the finishing BIOS
-; count by the number of ticks in 24 hours. We wont be able to detect
-; more than 24 hours, but at least we can time across a midnight
-; boundary
-
- mov eax,[EndBIOSCount] ; Is end < start?
- cmp eax,[StartBIOSCount]
- jae @@CalcBIOSTime ; No, calculate the time taken
-
-; Adjust the finishing time by adding the number of ticks in 24 hours
-; (1573040).
-
- add [DWORD EndBIOSCount],1800B0h
-
-; Convert the BIOS time to microseconds
-
-@@CalcBIOSTime:
- mov ax,[WORD EndBIOSCount]
- sub ax,[WORD StartBIOSCount]
- mov dx,54925 ; Number of microseconds each
- ; BIOS count represents.
- mul dx
- mov bx,ax ; set aside BIOS count in
- mov cx,dx ; microseconds
-
-; Convert timer count to microseconds
-
- push _si
- mov ax,[EndTimedCount]
- mov si,8381
- mul si
- mov si,10000
- div si ; * 0.8381 = * 8381 / 10000
- pop _si
-
-; Add the timer and BIOS counts together to get an overall time in
-; microseconds.
-
- add ax,bx
- adc cx,0
-ifdef flatmodel
- shl ecx,16
- mov cx,ax
- mov eax,ecx ; EAX := timer count
-else
- mov dx,cx
-endif
- pop ebx ; Restore EBX for 32 bit code
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; unsigned long LZ_timerCount(void);
-;----------------------------------------------------------------------------
-; Returns an unsigned long representing the net time in microseconds.
-;
-; If an hour has passed while timing, we return 0xFFFFFFFF as the count
-; (which is not a possible count in itself).
-;----------------------------------------------------------------------------
-cprocstart LZ_timerCount
-
- push ebx ; Save EBX for 32 bit code
-
-; See if a midnight boundary has passed and adjust the finishing BIOS
-; count by the number of ticks in 24 hours. We wont be able to detect
-; more than 24 hours, but at least we can time across a midnight
-; boundary
-
- mov eax,[EndBIOSCount] ; Is end < start?
- cmp eax,[StartBIOSCount]
- jae @@CheckForHour ; No, check for hour passing
-
-; Adjust the finishing time by adding the number of ticks in 24 hours
-; (1573040).
-
- add [DWORD EndBIOSCount],1800B0h
-
-; See if more than an hour passed during timing. If so, notify the user.
-
-@@CheckForHour:
- mov ax,[WORD StartBIOSCount+2]
- cmp ax,[WORD EndBIOSCount+2]
- jz @@CalcBIOSTime ; Hour count didn't change, so
- ; everything is fine
-
- inc ax
- cmp ax,[WORD EndBIOSCount+2]
- jnz @@TestTooLong ; Two hour boundaries passed, so the
- ; results are no good
- mov ax,[WORD EndBIOSCount]
- cmp ax,[WORD StartBIOSCount]
- jb @@CalcBIOSTime ; a single hour boundary passed. That's
- ; OK, so long as the total time wasn't
- ; more than an hour.
-
-; Over an hour elapsed passed during timing, which renders
-; the results invalid. Notify the user. This misses the case where a
-; multiple of 24 hours has passed, but we'll rely on the perspicacity of
-; the user to detect that case :-).
-
-@@TestTooLong:
-ifdef flatmodel
- mov eax,0FFFFFFFFh
-else
- mov ax,0FFFFh
- mov dx,0FFFFh
-endif
- jmp short @@Done
-
-; Convert the BIOS time to microseconds
-
-@@CalcBIOSTime:
- mov ax,[WORD EndBIOSCount]
- sub ax,[WORD StartBIOSCount]
- mov dx,54925 ; Number of microseconds each
- ; BIOS count represents.
- mul dx
- mov bx,ax ; set aside BIOS count in
- mov cx,dx ; microseconds
-
-; Convert timer count to microseconds
-
- push _si
- mov ax,[EndTimedCount]
- mov si,8381
- mul si
- mov si,10000
- div si ; * 0.8381 = * 8381 / 10000
- pop _si
-
-; Add the timer and BIOS counts together to get an overall time in
-; microseconds.
-
- add ax,bx
- adc cx,0
-ifdef flatmodel
- shl ecx,16
- mov cx,ax
- mov eax,ecx ; EAX := timer count
-else
- mov dx,cx
-endif
-
-@@Done: pop ebx ; Restore EBX for 32 bit code
- ret
-
-cprocend
-
-cprocstart LZ_disable
- cli
- ret
-cprocend
-
-cprocstart LZ_enable
- sti
- ret
-cprocend
-
-endcodeseg _lztimer
-
- END
diff --git a/board/MAI/bios_emulator/scitech/src/pm/dos/_pm.asm b/board/MAI/bios_emulator/scitech/src/pm/dos/_pm.asm
deleted file mode 100644
index 42b5cf3692..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/dos/_pm.asm
+++ /dev/null
@@ -1,656 +0,0 @@
-;****************************************************************************
-;*
-;* SciTech OS Portability Manager Library
-;*
-;* ========================================================================
-;*
-;* The contents of this file are subject to the SciTech MGL Public
-;* License Version 1.0 (the "License"); you may not use this file
-;* except in compliance with the License. You may obtain a copy of
-;* the License at http://www.scitechsoft.com/mgl-license.txt
-;*
-;* Software distributed under the License is distributed on an
-;* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-;* implied. See the License for the specific language governing
-;* rights and limitations under the License.
-;*
-;* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-;*
-;* The Initial Developer of the Original Code is SciTech Software, Inc.
-;* All Rights Reserved.
-;*
-;* ========================================================================
-;*
-;* Language: 80386 Assembler, TASM 4.0 or NASM
-;* Environment: IBM PC Real mode and 16/32 bit protected mode
-;*
-;* Description: Low level assembly support for the PM library specific to
-;* MSDOS.
-;*
-;****************************************************************************
-
- IDEAL
-
-include "scitech.mac" ; Memory model macros
-
-header _pmdos ; Set up memory model
-
-begdataseg _pmdos
-
-ifndef flatmodel
-
-struc rmregs_s
-ax dw ?
-ax_high dw ?
-bx dw ?
-bx_high dw ?
-cx dw ?
-cx_high dw ?
-dx dw ?
-dx_high dw ?
-si dw ?
-si_high dw ?
-di dw ?
-di_high dw ?
-cflag dw ?
-cflag_high dw ?
-ends rmregs_s
-RMREGS = (rmregs_s PTR es:bx)
-
-struc rmsregs_s
-es dw ?
-cs dw ?
-ss dw ?
-ds dw ?
-ends rmsregs_s
-RMSREGS = (rmsregs_s PTR es:bx)
-
-endif ; !flatmodel
-
-ifdef flatmodel
- cextern _PM_savedDS,USHORT
- cextern _PM_VXD_off,UINT
- cextern _PM_VXD_sel,UINT
-ifdef DOS4GW
- cextern _PM_haveCauseWay,UINT
-endif
-endif
-intel_id db "GenuineIntel" ; Intel vendor ID
-
-PMHELP_GETPDB EQU 0026h
-PMHELP_FLUSHTLB EQU 0027h
-
-enddataseg _pmdos
-
-P586
-
-begcodeseg _pmdos ; Start of code segment
-
-ifndef flatmodel
-
-;----------------------------------------------------------------------------
-; void PM_callRealMode(unsigned s,unsigned o, RMREGS *regs,
-; RMSREGS *sregs)
-;----------------------------------------------------------------------------
-; Calls a real mode procedure, loading the appropriate registers values
-; from the passed in structures. Only the DS and ES register are loaded
-; from the SREGS structure.
-;----------------------------------------------------------------------------
-cprocstart PM_callRealMode
-
- ARG s:WORD, o:WORD, regs:DWORD, sregs:DWORD
-
- LOCAL addr:DWORD, bxVal:WORD, esVal:WORD, flags:WORD = LocalSize
-
- enter_c
- push ds
- push es
-
- mov ax,[o] ; Build the address to call in 'addr'
- mov [WORD addr],ax
- mov ax,[s]
- mov [WORD addr+2],ax
-
- les bx,[sregs]
- mov ax,[RMSREGS.ds]
- mov ds,ax ; DS := passed in value
- mov ax,[RMSREGS.es]
- mov [esVal],ax
- les bx,[regs]
- mov ax,[RMREGS.bx]
- mov [bxVal],ax
- mov ax,[RMREGS.ax] ; AX := passed in value
- mov cx,[RMREGS.cx] ; CX := passed in value
- mov dx,[RMREGS.dx] ; DX := passed in value
- mov si,[RMREGS.si] ; SI := passed in value
- mov di,[RMREGS.di] ; DI := passed in value
- push bp
- push [esVal]
- pop es ; ES := passed in value
- mov bx,[bxVal] ; BX := passed in value
-
- call [addr] ; Call the specified routine
-
- pushf ; Save flags for later
- pop [flags]
-
- pop bp
- push es
- pop [esVal]
- push bx
- pop [bxVal]
- les bx,[sregs]
- push ds
- pop [RMSREGS.ds] ; Save value of DS
- push [esVal]
- pop [RMSREGS.es] ; Save value of ES
- les bx,[regs]
- mov [RMREGS.ax],ax ; Save value of AX
- mov [RMREGS.cx],cx ; Save value of CX
- mov [RMREGS.dx],dx ; Save value of DX
- mov [RMREGS.si],si ; Save value of SI
- mov [RMREGS.di],di ; Save value of DI
- mov ax,[flags] ; Return flags
- and ax,1h ; Isolate carry flag
- mov [RMREGS.cflag],ax ; Save carry flag status
- mov ax,[bxVal]
- mov [RMREGS.bx],ax ; Save value of BX
-
- pop es
- pop ds
- leave_c
- ret
-
-cprocend
-
-endif
-
-;----------------------------------------------------------------------------
-; void PM_segread(PMSREGS *sregs)
-;----------------------------------------------------------------------------
-; Read the current value of all segment registers
-;----------------------------------------------------------------------------
-cprocstartdll16 PM_segread
-
- ARG sregs:DPTR
-
- enter_c
-
- mov ax,es
- _les _si,[sregs]
- mov [_ES _si],ax
- mov [_ES _si+2],cs
- mov [_ES _si+4],ss
- mov [_ES _si+6],ds
- mov [_ES _si+8],fs
- mov [_ES _si+10],gs
-
- leave_c
- ret
-
-cprocend
-
-; Create a table of the 256 different interrupt calls that we can jump
-; into
-
-ifdef USE_NASM
-
-%assign intno 0
-
-intTable:
-%rep 256
- db 0CDh
- db intno
-%assign intno intno + 1
- ret
- nop
-%endrep
-
-else
-
-intno = 0
-
-intTable:
- REPT 256
- db 0CDh
- db intno
-intno = intno + 1
- ret
- nop
- ENDM
-
-endif
-
-;----------------------------------------------------------------------------
-; _PM_genInt - Generate the appropriate interrupt
-;----------------------------------------------------------------------------
-cprocnear _PM_genInt
-
- push _ax ; Save _ax
- push _bx ; Save _bx
-ifdef flatmodel
- mov ebx,[UINT esp+12] ; EBX := interrupt number
-else
- mov bx,sp ; Make sure ESP is zeroed
- mov bx,[UINT ss:bx+6] ; BX := interrupt number
-endif
- mov _ax,offset intTable ; Point to interrupt generation table
- shl _bx,2 ; _BX := index into table
- add _ax,_bx ; _AX := pointer to interrupt code
-ifdef flatmodel
- xchg eax,[esp+4] ; Restore eax, and set for int
-else
- mov bx,sp
- xchg ax,[ss:bx+2] ; Restore ax, and set for int
-endif
- pop _bx ; restore _bx
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; int PM_int386x(int intno, PMREGS *in, PMREGS *out,PMSREGS *sregs)
-;----------------------------------------------------------------------------
-; Issues a software interrupt in protected mode. This routine has been
-; written to allow user programs to load CS and DS with different values
-; other than the default.
-;----------------------------------------------------------------------------
-cprocstartdll16 PM_int386x
-
- ARG intno:UINT, inptr:DPTR, outptr:DPTR, sregs:DPTR
-
- LOCAL flags:UINT, sv_ds:UINT, sv_esi:ULONG = LocalSize
-
- enter_c
- push ds
- push es ; Save segment registers
- push fs
- push gs
-
- _lds _si,[sregs] ; DS:_SI -> Load segment registers
- mov es,[_si]
- mov bx,[_si+6]
- mov [sv_ds],_bx ; Save value of user DS on stack
- mov fs,[_si+8]
- mov gs,[_si+10]
-
- _lds _si,[inptr] ; Load CPU registers
- mov eax,[_si]
- mov ebx,[_si+4]
- mov ecx,[_si+8]
- mov edx,[_si+12]
- mov edi,[_si+20]
- mov esi,[_si+16]
-
- push ds ; Save value of DS
- push _bp ; Some interrupts trash this!
- clc ; Generate the interrupt
- push [UINT intno]
- mov ds,[WORD sv_ds] ; Set value of user's DS selector
- call _PM_genInt
- pop _bp ; Pop intno from stack (flags unchanged)
- pop _bp ; Restore value of stack frame pointer
- pop ds ; Restore value of DS
-
- pushf ; Save flags for later
- pop [UINT flags]
- push esi ; Save ESI for later
- pop [DWORD sv_esi]
- push ds ; Save DS for later
- pop [UINT sv_ds]
-
- _lds _si,[outptr] ; Save CPU registers
- mov [_si],eax
- mov [_si+4],ebx
- mov [_si+8],ecx
- mov [_si+12],edx
- push [DWORD sv_esi]
- pop [DWORD _si+16]
- mov [_si+20],edi
-
- mov _bx,[flags] ; Return flags
- and ebx,1h ; Isolate carry flag
- mov [_si+24],ebx ; Save carry flag status
-
- _lds _si,[sregs] ; Save segment registers
- mov [_si],es
- mov _bx,[sv_ds]
- mov [_si+6],bx ; Get returned DS from stack
- mov [_si+8],fs
- mov [_si+10],gs
-
- pop gs ; Restore segment registers
- pop fs
- pop es
- pop ds
- leave_c
- ret
-
-cprocend
-
-ifndef flatmodel
-_PM_savedDS dw _DATA ; Saved value of DS
-endif
-
-;----------------------------------------------------------------------------
-; void PM_saveDS(void)
-;----------------------------------------------------------------------------
-; Save the value of DS into a section of the code segment, so that we can
-; quickly load this value at a later date in the PM_loadDS() routine from
-; inside interrupt handlers etc. The method to do this is different
-; depending on the DOS extender being used.
-;----------------------------------------------------------------------------
-cprocstartdll16 PM_saveDS
-
-ifdef flatmodel
- mov [_PM_savedDS],ds ; Store away in data segment
-endif
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void PM_loadDS(void)
-;----------------------------------------------------------------------------
-; Routine to load the DS register with the default value for the current
-; DOS extender. Only the DS register is loaded, not the ES register, so
-; if you wish to call C code, you will need to also load the ES register
-; in 32 bit protected mode.
-;----------------------------------------------------------------------------
-cprocstartdll16 PM_loadDS
-
- mov ds,[cs:_PM_savedDS] ; We can access the proper DS through CS
- ret
-
-cprocend
-
-ifdef flatmodel
-
-;----------------------------------------------------------------------------
-; ibool DPMI_allocateCallback(void (*pmcode)(), void *rmregs, long *RMCB)
-;----------------------------------------------------------------------------
-cprocstart _DPMI_allocateCallback
-
- ARG pmcode:CPTR, rmregs:DPTR, RMCB:DPTR
-
- enter_c
- push ds
- push es
-
- push cs
- pop ds
- mov esi,[pmcode] ; DS:ESI -> protected mode code to call
- mov edi,[rmregs] ; ES:EDI -> real mode register buffer
- mov ax,303h ; AX := allocate realmode callback function
- int 31h
- mov eax,0 ; Return failure!
- jc @@Fail
-
- mov eax,[RMCB]
- shl ecx,16
- mov cx,dx
- mov [es:eax],ecx ; Return real mode address
- mov eax,1 ; Return success!
-
-@@Fail: pop es
- pop ds
- leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void DPMI_freeCallback(long RMCB)
-;----------------------------------------------------------------------------
-cprocstart _DPMI_freeCallback
-
- ARG RMCB:ULONG
-
- enter_c
-
- mov cx,[WORD RMCB+2]
- mov dx,[WORD RMCB] ; CX:DX := real mode callback
- mov ax,304h
- int 31h
-
- leave_c
- ret
-
-cprocend
-
-endif
-
-; Macro to delay briefly to ensure that enough time has elapsed between
-; successive I/O accesses so that the device being accessed can respond
-; to both accesses even on a very fast PC.
-
-ifdef USE_NASM
-%macro DELAY 0
- jmp short $+2
- jmp short $+2
- jmp short $+2
-%endmacro
-%macro IODELAYN 1
-%rep %1
- DELAY
-%endrep
-%endmacro
-else
-macro DELAY
- jmp short $+2
- jmp short $+2
- jmp short $+2
-endm
-macro IODELAYN N
- rept N
- DELAY
- endm
-endm
-endif
-
-;----------------------------------------------------------------------------
-; uchar _PM_readCMOS(int index)
-;----------------------------------------------------------------------------
-; Read the value of a specific CMOS register. We do this with both
-; normal interrupts and NMI disabled.
-;----------------------------------------------------------------------------
-cprocstart _PM_readCMOS
-
- ARG index:UINT
-
- push _bp
- mov _bp,_sp
- pushfd
- mov al,[BYTE index]
- or al,80h ; Add disable NMI flag
- cli
- out 70h,al
- IODELAYN 5
- in al,71h
- mov ah,al
- xor al,al
- IODELAYN 5
- out 70h,al ; Re-enable NMI
- sti
- mov al,ah ; Return value in AL
- popfd
- pop _bp
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void _PM_writeCMOS(int index,uchar value)
-;----------------------------------------------------------------------------
-; Read the value of a specific CMOS register. We do this with both
-; normal interrupts and NMI disabled.
-;----------------------------------------------------------------------------
-cprocstart _PM_writeCMOS
-
- ARG index:UINT, value:UCHAR
-
- push _bp
- mov _bp,_sp
- pushfd
- mov al,[BYTE index]
- or al,80h ; Add disable NMI flag
- cli
- out 70h,al
- IODELAYN 5
- mov al,[value]
- out 71h,al
- xor al,al
- IODELAYN 5
- out 70h,al ; Re-enable NMI
- sti
- popfd
- pop _bp
- ret
-
-cprocend
-
-ifdef flatmodel
-
-;----------------------------------------------------------------------------
-; int _PM_pagingEnabled(void)
-;----------------------------------------------------------------------------
-; Returns 1 if paging is enabled, 0 if not or -1 if not at ring 0
-;----------------------------------------------------------------------------
-cprocstart _PM_pagingEnabled
-
- mov eax,-1
-ifdef DOS4GW
- mov cx,cs
- and ecx,3
- jz @@Ring0
- cmp [UINT _PM_haveCauseWay],0
- jnz @@Ring0
- jmp @@Exit
-
-@@Ring0:
- mov eax,cr0 ; Load CR0
- shr eax,31 ; Isolate paging enabled bit
-endif
-@@Exit: ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; _PM_getPDB - Return the Page Table Directory Base address
-;----------------------------------------------------------------------------
-cprocstart _PM_getPDB
-
-ifdef DOS4GW
- mov ax,cs
- and eax,3
- jz @@Ring0
- cmp [UINT _PM_haveCauseWay],0
- jnz @@Ring0
-endif
-
-; Call VxD if running at ring 3 in a DOS box
-
- cmp [WORD _PM_VXD_sel],0
- jz @@Fail
- mov eax,PMHELP_GETPDB
-ifdef USE_NASM
- call far dword [_PM_VXD_off]
-else
- call [FCPTR _PM_VXD_off]
-endif
- ret
-
-@@Ring0:
-ifdef DOS4GW
- mov eax,cr3
- and eax,0FFFFF000h
- ret
-endif
-@@Fail: xor eax,eax
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; PM_flushTLB - Flush the Translation Lookaside buffer
-;----------------------------------------------------------------------------
-cprocstart PM_flushTLB
-
- mov ax,cs
- and eax,3
- jz @@Ring0
-ifdef DOS4GW
- cmp [UINT _PM_haveCauseWay],0
- jnz @@Ring0
-endif
-
-; Call VxD if running at ring 3 in a DOS box
-
- cmp [WORD _PM_VXD_sel],0
- jz @@Fail
- mov eax,PMHELP_FLUSHTLB
-ifdef USE_NASM
- call far dword [_PM_VXD_off]
-else
- call [FCPTR _PM_VXD_off]
-endif
- ret
-
-@@Ring0:
-ifdef DOS4GW
- wbinvd ; Flush the CPU cache
- mov eax,cr3
- mov cr3,eax ; Flush the TLB
-endif
-@@Fail: ret
-
-cprocend
-
-endif
-
-;----------------------------------------------------------------------------
-; void _PM_VxDCall(VXD_regs far *r,uint off,uint sel);
-;----------------------------------------------------------------------------
-cprocstart _PM_VxDCall
-
- ARG r:DPTR, off:UINT, sel:UINT
-
- enter_c
-
-; Load all registers from the registers structure
-
- mov ebx,[r]
- mov eax,[ebx+0]
- mov ecx,[ebx+8]
- mov edx,[ebx+12]
- mov esi,[ebx+16]
- mov edi,[ebx+20]
- mov ebx,[ebx+4] ; Trashes BX structure pointer!
-
-; Call the VxD entry point (on stack)
-
-ifdef USE_NASM
- call far dword [off]
-else
- call [FCPTR off]
-endif
-
-; Save all registers back in the structure
-
- push ebx ; Push EBX onto stack for later
- mov ebx,[r]
- mov [ebx+0],eax
- mov [ebx+8],ecx
- mov [ebx+12],edx
- mov [ebx+16],esi
- mov [ebx+20],edi
- pop [DWORD ebx+4] ; Save value of EBX from stack
-
- leave_c
- ret
-
-cprocend
-
-endcodeseg _pmdos
-
- END ; End of module
diff --git a/board/MAI/bios_emulator/scitech/src/pm/dos/_pmdos.asm b/board/MAI/bios_emulator/scitech/src/pm/dos/_pmdos.asm
deleted file mode 100644
index 5c741f346c..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/dos/_pmdos.asm
+++ /dev/null
@@ -1,1105 +0,0 @@
-;****************************************************************************
-;*
-;* SciTech OS Portability Manager Library
-;*
-;* ========================================================================
-;*
-;* The contents of this file are subject to the SciTech MGL Public
-;* License Version 1.0 (the "License"); you may not use this file
-;* except in compliance with the License. You may obtain a copy of
-;* the License at http://www.scitechsoft.com/mgl-license.txt
-;*
-;* Software distributed under the License is distributed on an
-;* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-;* implied. See the License for the specific language governing
-;* rights and limitations under the License.
-;*
-;* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-;*
-;* The Initial Developer of the Original Code is SciTech Software, Inc.
-;* All Rights Reserved.
-;*
-;* ========================================================================
-;*
-;* Language: 80386 Assembler, TASM 4.0 or NASM
-;* Environment: IBM PC Real mode and 16/32 bit protected mode
-;*
-;* Description: Low level assembly support for the PM library specific to
-;* MSDOS interrupt handling.
-;*
-;****************************************************************************
-
- IDEAL
-
-include "scitech.mac" ; Memory model macros
-
-header _pmdos ; Set up memory model
-
-; Define the size of our local stacks. For real mode code they cant be
-; that big, but for 32 bit protected mode code we can make them nice and
-; large so that complex C functions can be used.
-
-ifdef flatmodel
-MOUSE_STACK EQU 4096
-TIMER_STACK EQU 4096
-KEY_STACK EQU 1024
-INT10_STACK EQU 1024
-IRQ_STACK EQU 1024
-else
-MOUSE_STACK EQU 1024
-TIMER_STACK EQU 512
-KEY_STACK EQU 256
-INT10_STACK EQU 256
-IRQ_STACK EQU 256
-endif
-
-ifdef USE_NASM
-
-; Macro to load DS and ES registers with correct value.
-
-%imacro LOAD_DS 0
-%ifdef flatmodel
- mov ds,[cs:_PM_savedDS]
- mov es,[cs:_PM_savedDS]
-%else
- push ax
- mov ax,_DATA
- mov ds,ax
- pop ax
-%endif
-%endmacro
-
-; Note that interrupts we disable interrupts during the following stack
-; %imacro for correct operation, but we do not enable them again. Normally
-; these %imacros are used within interrupt handlers so interrupts should
-; already be off. We turn them back on explicitly later if the user code
-; needs them to be back on.
-
-; Macro to switch to a new local stack.
-
-%imacro NEWSTK 1
- cli
- mov [seg_%1],ss
- mov [ptr_%1],_sp
- mov [TempSeg],ds
- mov ss,[TempSeg]
- mov _sp,offset %1
-%endmacro
-
-; %imacro to switch back to the old stack.
-
-%imacro RESTSTK 1
- cli
- mov ss,[seg_%1]
- mov _sp,[ptr_%1]
-%endmacro
-
-; %imacro to swap the current stack with the one saved away.
-
-%imacro SWAPSTK 1
- cli
- mov ax,ss
- xchg ax,[seg_%1]
- mov ss,ax
- xchg _sp,[ptr_%1]
-%endmacro
-
-else
-
-; Macro to load DS and ES registers with correct value.
-
-MACRO LOAD_DS
-ifdef flatmodel
- mov ds,[cs:_PM_savedDS]
- mov es,[cs:_PM_savedDS]
-else
- push ax
- mov ax,_DATA
- mov ds,ax
- pop ax
-endif
-ENDM
-
-; Note that interrupts we disable interrupts during the following stack
-; macro for correct operation, but we do not enable them again. Normally
-; these macros are used within interrupt handlers so interrupts should
-; already be off. We turn them back on explicitly later if the user code
-; needs them to be back on.
-
-; Macro to switch to a new local stack.
-
-MACRO NEWSTK stkname
- cli
- mov [seg_&stkname&],ss
- mov [ptr_&stkname&],_sp
- mov [TempSeg],ds
- mov ss,[TempSeg]
- mov _sp,offset stkname
-ENDM
-
-; Macro to switch back to the old stack.
-
-MACRO RESTSTK stkname
- cli
- mov ss,[seg_&stkname&]
- mov _sp,[ptr_&stkname&]
-ENDM
-
-; Macro to swap the current stack with the one saved away.
-
-MACRO SWAPSTK stkname
- cli
- mov ax,ss
- xchg ax,[seg_&stkname&]
- mov ss,ax
- xchg _sp,[ptr_&stkname&]
-ENDM
-
-endif
-
-begdataseg _pmdos
-
-ifdef flatmodel
- cextern _PM_savedDS,USHORT
-endif
- cextern _PM_critHandler,CPTR
- cextern _PM_breakHandler,CPTR
- cextern _PM_timerHandler,CPTR
- cextern _PM_rtcHandler,CPTR
- cextern _PM_keyHandler,CPTR
- cextern _PM_key15Handler,CPTR
- cextern _PM_mouseHandler,CPTR
- cextern _PM_int10Handler,CPTR
-
- cextern _PM_ctrlCPtr,DPTR
- cextern _PM_ctrlBPtr,DPTR
- cextern _PM_critPtr,DPTR
-
- cextern _PM_prevTimer,FCPTR
- cextern _PM_prevRTC,FCPTR
- cextern _PM_prevKey,FCPTR
- cextern _PM_prevKey15,FCPTR
- cextern _PM_prevBreak,FCPTR
- cextern _PM_prevCtrlC,FCPTR
- cextern _PM_prevCritical,FCPTR
- cextern _PM_prevRealTimer,ULONG
- cextern _PM_prevRealRTC,ULONG
- cextern _PM_prevRealKey,ULONG
- cextern _PM_prevRealKey15,ULONG
- cextern _PM_prevRealInt10,ULONG
-
-cpublic _PM_pmdosDataStart
-
-; Allocate space for all of the local stacks that we need. These stacks
-; are not very large, but should be large enough for most purposes
-; (generally you want to handle these interrupts quickly, simply storing
-; the information for later and then returning). If you need bigger
-; stacks then change the appropriate value in here.
-
- ALIGN 4
- dclb MOUSE_STACK ; Space for local stack (small)
-MsStack: ; Stack starts at end!
-ptr_MsStack DUINT 0 ; Place to store old stack offset
-seg_MsStack dw 0 ; Place to store old stack segment
-
- ALIGN 4
- dclb INT10_STACK ; Space for local stack (small)
-Int10Stack: ; Stack starts at end!
-ptr_Int10Stack DUINT 0 ; Place to store old stack offset
-seg_Int10Stack dw 0 ; Place to store old stack segment
-
- ALIGN 4
- dclb TIMER_STACK ; Space for local stack (small)
-TmStack: ; Stack starts at end!
-ptr_TmStack DUINT 0 ; Place to store old stack offset
-seg_TmStack dw 0 ; Place to store old stack segment
-
- ALIGN 4
- dclb TIMER_STACK ; Space for local stack (small)
-RtcStack: ; Stack starts at end!
-ptr_RtcStack DUINT 0 ; Place to store old stack offset
-seg_RtcStack dw 0 ; Place to store old stack segment
-RtcInside dw 0 ; Are we still handling current interrupt
-
- ALIGN 4
- dclb KEY_STACK ; Space for local stack (small)
-KyStack: ; Stack starts at end!
-ptr_KyStack DUINT 0 ; Place to store old stack offset
-seg_KyStack dw 0 ; Place to store old stack segment
-KyInside dw 0 ; Are we still handling current interrupt
-
- ALIGN 4
- dclb KEY_STACK ; Space for local stack (small)
-Ky15Stack: ; Stack starts at end!
-ptr_Ky15Stack DUINT 0 ; Place to store old stack offset
-seg_Ky15Stack dw 0 ; Place to store old stack segment
-
-TempSeg dw 0 ; Place to store stack segment
-
-cpublic _PM_pmdosDataEnd
-
-enddataseg _pmdos
-
-begcodeseg _pmdos ; Start of code segment
-
-cpublic _PM_pmdosCodeStart
-
-;----------------------------------------------------------------------------
-; PM_mouseISR - Mouse interrupt subroutine dispatcher
-;----------------------------------------------------------------------------
-; Interrupt subroutine called by the mouse driver upon interrupts, to
-; dispatch control to high level C based subroutines. Interrupts are on
-; when we call the user code.
-;
-; It is _extremely_ important to save the state of the extended registers
-; as these may well be trashed by the routines called from here and not
-; restored correctly by the mouse interface module.
-;
-; NOTE: This routine switches to a local stack before calling any C code,
-; and hence is _not_ re-entrant. For mouse handlers this is not a
-; problem, as the mouse driver arbitrates calls to the user mouse
-; handler for us.
-;
-; Entry: AX - Condition mask giving reason for call
-; BX - Mouse button state
-; CX - Horizontal cursor coordinate
-; DX - Vertical cursor coordinate
-; SI - Horizontal mickey value
-; DI - Vertical mickey value
-;
-;----------------------------------------------------------------------------
-ifdef DJGPP
-cprocstart _PM_mouseISR
-else
-cprocfar _PM_mouseISR
-endif
-
- push ds ; Save value of DS
- push es
- pushad ; Save _all_ extended registers
- cld ; Clear direction flag
-
- LOAD_DS ; Load DS register
- NEWSTK MsStack ; Switch to local stack
-
-; Call the installed high level C code routine
-
- clrhi dx ; Clear out high order values
- clrhi cx
- clrhi bx
- clrhi ax
- sgnhi si
- sgnhi di
-
- push _di
- push _si
- push _dx
- push _cx
- push _bx
- push _ax
- sti ; Enable interrupts
- call [CPTR _PM_mouseHandler]
- _add sp,12,24
-
- RESTSTK MsStack ; Restore previous stack
-
- popad ; Restore all extended registers
- pop es
- pop ds
- ret ; We are done!!
-
-cprocend
-
-;----------------------------------------------------------------------------
-; PM_timerISR - Timer interrupt subroutine dispatcher
-;----------------------------------------------------------------------------
-; Hardware interrupt handler for the timer interrupt, to dispatch control
-; to high level C based subroutines. We save the state of all registers
-; in this routine, and switch to a local stack. Interrupts are *off*
-; when we call the user code.
-;
-; NOTE: This routine switches to a local stack before calling any C code,
-; and hence is _not_ re-entrant. Make sure your C code executes as
-; quickly as possible, since a timer overrun will simply hang the
-; system.
-;----------------------------------------------------------------------------
-cprocfar _PM_timerISR
-
- push ds ; Save value of DS
- push es
- pushad ; Save _all_ extended registers
- cld ; Clear direction flag
-
- LOAD_DS ; Load DS register
-
- NEWSTK TmStack ; Switch to local stack
- call [CPTR _PM_timerHandler]
- RESTSTK TmStack ; Restore previous stack
-
- popad ; Restore all extended registers
- pop es
- pop ds
- iret ; Return from interrupt
-
-cprocend
-
-;----------------------------------------------------------------------------
-; PM_chainPrevTimer - Chain to previous timer interrupt and return
-;----------------------------------------------------------------------------
-; Chains to the previous timer interrupt routine and returns control
-; back to the high level interrupt handler.
-;----------------------------------------------------------------------------
-cprocstart PM_chainPrevTimer
-
-ifdef TNT
- push eax
- push ebx
- push ecx
- pushfd ; Push flags on stack to simulate interrupt
- mov ax,250Eh ; Call real mode procedure function
- mov ebx,[_PM_prevRealTimer]
- mov ecx,1 ; Copy real mode flags to real mode stack
- int 21h ; Call the real mode code
- popfd
- pop ecx
- pop ebx
- pop eax
- ret
-else
- SWAPSTK TmStack ; Swap back to previous stack
- pushf ; Save state of interrupt flag
- pushf ; Push flags on stack to simulate interrupt
-ifdef USE_NASM
- call far dword [_PM_prevTimer]
-else
- call [_PM_prevTimer]
-endif
- popf ; Restore state of interrupt flag
- SWAPSTK TmStack ; Swap back to C stack again
- ret
-endif
-
-cprocend
-
-; Macro to delay briefly to ensure that enough time has elapsed between
-; successive I/O accesses so that the device being accessed can respond
-; to both accesses even on a very fast PC.
-
-ifdef USE_NASM
-%macro DELAY 0
- jmp short $+2
- jmp short $+2
- jmp short $+2
-%endmacro
-%macro IODELAYN 1
-%rep %1
- DELAY
-%endrep
-%endmacro
-else
-macro DELAY
- jmp short $+2
- jmp short $+2
- jmp short $+2
-endm
-macro IODELAYN N
- rept N
- DELAY
- endm
-endm
-endif
-
-;----------------------------------------------------------------------------
-; PM_rtcISR - Real time clock interrupt subroutine dispatcher
-;----------------------------------------------------------------------------
-; Hardware interrupt handler for the timer interrupt, to dispatch control
-; to high level C based subroutines. We save the state of all registers
-; in this routine, and switch to a local stack. Interrupts are *off*
-; when we call the user code.
-;
-; NOTE: This routine switches to a local stack before calling any C code,
-; and hence is _not_ re-entrant. Make sure your C code executes as
-; quickly as possible, since a timer overrun will simply hang the
-; system.
-;----------------------------------------------------------------------------
-cprocfar _PM_rtcISR
-
- push ds ; Save value of DS
- push es
- pushad ; Save _all_ extended registers
- cld ; Clear direction flag
-
-; Clear priority interrupt controller and re-enable interrupts so we
-; dont lock things up for long.
-
- mov al,20h
- out 0A0h,al
- out 020h,al
-
-; Clear real-time clock timeout
-
- in al,70h ; Read CMOS index register
- push _ax ; and save for later
- IODELAYN 3
- mov al,0Ch
- out 70h,al
- IODELAYN 5
- in al,71h
-
-; Call the C interrupt handler function
-
- LOAD_DS ; Load DS register
- cmp [BYTE RtcInside],1 ; Check for mutual exclusion
- je @@Exit
- mov [BYTE RtcInside],1
- NEWSTK RtcStack ; Switch to local stack
- sti ; Re-enable interrupts
- call [CPTR _PM_rtcHandler]
- RESTSTK RtcStack ; Restore previous stack
- mov [BYTE RtcInside],0
-
-@@Exit: pop _ax
- out 70h,al ; Restore CMOS index register
- popad ; Restore all extended registers
- pop es
- pop ds
- iret ; Return from interrupt
-
-cprocend
-
-ifdef flatmodel
-;----------------------------------------------------------------------------
-; PM_irqISRTemplate - Hardware interrupt handler IRQ template
-;----------------------------------------------------------------------------
-; Hardware interrupt handler for any interrupt, to dispatch control
-; to high level C based subroutines. We save the state of all registers
-; in this routine, and switch to a local stack. Interrupts are *off*
-; when we call the user code.
-;
-; NOTE: This routine switches to a local stack before calling any C code,
-; and hence is _not_ re-entrant. Make sure your C code executes as
-; quickly as possible.
-;----------------------------------------------------------------------------
-cprocfar _PM_irqISRTemplate
-
- push ebx
- mov ebx,0 ; Relocation adjustment factor
- jmp __IRQEntry
-
-; Global variables stored in the IRQ thunk code segment
-
-_CHandler dd 0 ; Pointer to C interrupt handler
-_PrevIRQ dd 0 ; Previous IRQ handler
- dd 0
-_IRQ dd 0 ; IRQ we are hooked for
-ptr_IRQStack DUINT 0 ; Place to store old stack offset
-seg_IRQStack dw 0 ; Place to store old stack segment
-_Inside db 0 ; Mutual exclusion flag
- ALIGN 4
- dclb IRQ_STACK ; Space for local stack
-_IRQStack: ; Stack starts at end!
-
-; Check for and reject spurious IRQ 7 signals
-
-__IRQEntry:
- cmp [BYTE cs:ebx+_IRQ],7 ; Spurious IRQs occur only on IRQ 7
- jmp @@ValidIRQ
- push eax
- mov al,1011b ; OCW3: read ISR
- out 20h,al ; (Intel Peripheral Components, 1991,
- in al,20h ; p. 3-188)
- shl al,1 ; Set C = bit 7 (IRQ 7) of ISR register
- pop eax
- jc @@ValidIRQ
- iret ; Return from interrupt
-
-; Save all registers for duration of IRQ handler
-
-@@ValidIRQ:
- push ds ; Save value of DS
- push es
- pushad ; Save _all_ extended registers
- cld ; Clear direction flag
- LOAD_DS ; Load DS register
-
-; Send an EOI to the PIC
-
- mov al,20h ; Send EOI to PIC
- cmp [BYTE ebx+_IRQ],8 ; Clear PIC1 first if IRQ >= 8
- jb @@1
- out 0A0h,al
-@@1: out 20h,al
-
-; Check for mutual exclusion
-
- cmp [BYTE ebx+_Inside],1
- je @@ChainOldHandler
- mov [BYTE ebx+_Inside],1
-
-; Call the C interrupt handler function
-
- mov [ebx+seg_IRQStack],ss ; Switch to local stack
- mov [ebx+ptr_IRQStack],esp
- mov [TempSeg],ds
- mov ss,[TempSeg]
- lea esp,[ebx+_IRQStack]
- sti ; Re-enable interrupts
- push ebx
- call [DWORD ebx+_CHandler]
- pop ebx
- cli
- mov ss,[ebx+seg_IRQStack] ; Restore previous stack
- mov esp,[ebx+ptr_IRQStack]
- or eax,eax
- jz @@ChainOldHandler ; Chain if not handled for shared IRQ
-
-@@Exit: mov [BYTE ebx+_Inside],0
- popad ; Restore all extended registers
- pop es
- pop ds
- pop ebx
- iret ; Return from interrupt
-
-@@ChainOldHandler:
- cmp [DWORD ebx+_PrevIRQ],0
- jz @@Exit
- mov [BYTE ebx+_Inside],0
- mov eax,[DWORD ebx+_PrevIRQ]
- mov ebx,[DWORD ebx+_PrevIRQ+4]
- mov [DWORD _PrevIRQ],eax
- mov [DWORD _PrevIRQ+4],ebx
- popad ; Restore all extended registers
- pop es
- pop ds
- pop ebx
- jmp [cs:_PrevIRQ] ; Chain to previous IRQ handler
-
-cprocend
-cpublic _PM_irqISRTemplateEnd
-endif
-
-;----------------------------------------------------------------------------
-; PM_keyISR - keyboard interrupt subroutine dispatcher
-;----------------------------------------------------------------------------
-; Hardware interrupt handler for the keyboard interrupt, to dispatch control
-; to high level C based subroutines. We save the state of all registers
-; in this routine, and switch to a local stack. Interrupts are *off*
-; when we call the user code.
-;
-; NOTE: This routine switches to a local stack before calling any C code,
-; and hence is _not_ re-entrant. However we ensure within this routine
-; mutual exclusion to the keyboard handling routine.
-;----------------------------------------------------------------------------
-cprocfar _PM_keyISR
-
- push ds ; Save value of DS
- push es
- pushad ; Save _all_ extended registers
- cld ; Clear direction flag
-
- LOAD_DS ; Load DS register
-
- cmp [BYTE KyInside],1 ; Check for mutual exclusion
- je @@Reissued
-
- mov [BYTE KyInside],1
- NEWSTK KyStack ; Switch to local stack
- call [CPTR _PM_keyHandler] ; Call C code
- RESTSTK KyStack ; Restore previous stack
- mov [BYTE KyInside],0
-
-@@Exit: popad ; Restore all extended registers
- pop es
- pop ds
- iret ; Return from interrupt
-
-; When the BIOS keyboard handler needs to change the SHIFT status lights
-; on the keyboard, in the process of doing this the keyboard controller
-; re-issues another interrupt, while the current handler is still executing.
-; If we recieve another interrupt while still handling the current one,
-; then simply chain directly to the previous handler.
-;
-; Note that for most DOS extenders, the real mode interrupt handler that we
-; install takes care of this for us.
-
-@@Reissued:
-ifdef TNT
- push eax
- push ebx
- push ecx
- pushfd ; Push flags on stack to simulate interrupt
- mov ax,250Eh ; Call real mode procedure function
- mov ebx,[_PM_prevRealKey]
- mov ecx,1 ; Copy real mode flags to real mode stack
- int 21h ; Call the real mode code
- popfd
- pop ecx
- pop ebx
- pop eax
-else
- pushf
-ifdef USE_NASM
- call far dword [_PM_prevKey]
-else
- call [_PM_prevKey]
-endif
-endif
- jmp @@Exit
-
-cprocend
-
-;----------------------------------------------------------------------------
-; PM_chainPrevkey - Chain to previous key interrupt and return
-;----------------------------------------------------------------------------
-; Chains to the previous key interrupt routine and returns control
-; back to the high level interrupt handler.
-;----------------------------------------------------------------------------
-cprocstart PM_chainPrevKey
-
-ifdef TNT
- push eax
- push ebx
- push ecx
- pushfd ; Push flags on stack to simulate interrupt
- mov ax,250Eh ; Call real mode procedure function
- mov ebx,[_PM_prevRealKey]
- mov ecx,1 ; Copy real mode flags to real mode stack
- int 21h ; Call the real mode code
- popfd
- pop ecx
- pop ebx
- pop eax
- ret
-else
-
-; YIKES! For some strange reason, when execution returns from the
-; previous keyboard handler, interrupts are re-enabled!! Since we expect
-; interrupts to remain off during the duration of our handler, this can
-; cause havoc. However our stack macros always turn off interrupts, so they
-; will be off when we exit this routine. Obviously there is a tiny weeny
-; window when interrupts will be enabled, but there is nothing we can
-; do about this.
-
- SWAPSTK KyStack ; Swap back to previous stack
- pushf ; Push flags on stack to simulate interrupt
-ifdef USE_NASM
- call far dword [_PM_prevKey]
-else
- call [_PM_prevKey]
-endif
- SWAPSTK KyStack ; Swap back to C stack again
- ret
-endif
-
-cprocend
-
-;----------------------------------------------------------------------------
-; PM_key15ISR - Int 15h keyboard interrupt subroutine dispatcher
-;----------------------------------------------------------------------------
-; This routine gets called if we have been called to handle the Int 15h
-; keyboard interrupt callout from real mode.
-;
-; Entry: AX - Hardware scan code to process
-; Exit: AX - Hardware scan code to process (0 to ignore)
-;----------------------------------------------------------------------------
-cprocfar _PM_key15ISR
-
- push ds
- push es
- LOAD_DS
- cmp ah,4Fh
- jnz @@NotOurs ; Quit if not keyboard callout
-
- pushad
- cld ; Clear direction flag
- xor ah,ah ; AX := scan code
- NEWSTK Ky15Stack ; Switch to local stack
- push _ax
- call [CPTR _PM_key15Handler] ; Call C code
- _add sp,2,4
- RESTSTK Ky15Stack ; Restore previous stack
- test ax,ax
- jz @@1
- stc ; Set carry to process as normal
- jmp @@2
-@@1: clc ; Clear carry to ignore scan code
-@@2: popad
- jmp @@Exit ; We are done
-
-@@NotOurs:
-ifdef TNT
- push eax
- push ebx
- push ecx
- pushfd ; Push flags on stack to simulate interrupt
- mov ax,250Eh ; Call real mode procedure function
- mov ebx,[_PM_prevRealKey15]
- mov ecx,1 ; Copy real mode flags to real mode stack
- int 21h ; Call the real mode code
- popfd
- pop ecx
- pop ebx
- pop eax
-else
- pushf
-ifdef USE_NASM
- call far dword [_PM_prevKey15]
-else
- call [_PM_prevKey15]
-endif
-endif
-@@Exit: pop es
- pop ds
-ifdef flatmodel
- retf 4
-else
- retf 2
-endif
-
-cprocend
-
-;----------------------------------------------------------------------------
-; PM_breakISR - Control Break interrupt subroutine dispatcher
-;----------------------------------------------------------------------------
-; Hardware interrupt handler for the Ctrl-Break interrupt. We simply set
-; the Ctrl-Break flag to a 1 and leave (note that this is accessed through
-; a far pointer, as it may well be located in conventional memory).
-;----------------------------------------------------------------------------
-cprocfar _PM_breakISR
-
- sti
- push ds ; Save value of DS
- push es
- push _bx
-
- LOAD_DS ; Load DS register
-ifdef flatmodel
- mov ebx,[_PM_ctrlBPtr]
-else
- les bx,[_PM_ctrlBPtr]
-endif
- mov [UINT _ES _bx],1
-
-; Run alternate break handler code if installed
-
- cmp [CPTR _PM_breakHandler],0
- je @@Exit
-
- pushad
- mov _ax,1
- push _ax
- call [CPTR _PM_breakHandler] ; Call C code
- pop _ax
- popad
-
-@@Exit: pop _bx
- pop es
- pop ds
- iret ; Return from interrupt
-
-cprocend
-
-;----------------------------------------------------------------------------
-; int PM_ctrlBreakHit(int clearFlag)
-;----------------------------------------------------------------------------
-; Returns the current state of the Ctrl-Break flag and possibly clears it.
-;----------------------------------------------------------------------------
-cprocstart PM_ctrlBreakHit
-
- ARG clearFlag:UINT
-
- enter_c
- pushf ; Save interrupt status
- push es
-ifdef flatmodel
- mov ebx,[_PM_ctrlBPtr]
-else
- les bx,[_PM_ctrlBPtr]
-endif
- cli ; No interrupts thanks!
- mov _ax,[_ES _bx]
- test [BYTE clearFlag],1
- jz @@Done
- mov [UINT _ES _bx],0
-
-@@Done: pop es
- popf ; Restore interrupt status
- leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; PM_ctrlCISR - Control Break interrupt subroutine dispatcher
-;----------------------------------------------------------------------------
-; Hardware interrupt handler for the Ctrl-C interrupt. We simply set
-; the Ctrl-C flag to a 1 and leave (note that this is accessed through
-; a far pointer, as it may well be located in conventional memory).
-;----------------------------------------------------------------------------
-cprocfar _PM_ctrlCISR
-
- sti
- push ds ; Save value of DS
- push es
- push _bx
-
- LOAD_DS ; Load DS register
-ifdef flatmodel
- mov ebx,[_PM_ctrlCPtr]
-else
- les bx,[_PM_ctrlCPtr]
-endif
- mov [UINT _ES _bx],1
-
-; Run alternate break handler code if installed
-
- cmp [CPTR _PM_breakHandler],0
- je @@Exit
-
- pushad
- mov _ax,0
- push _ax
- call [CPTR _PM_breakHandler] ; Call C code
- pop _ax
- popad
-
-@@Exit: pop _bx
- pop es
- pop ds
- iret ; Return from interrupt
- iretd
-
-cprocend
-
-;----------------------------------------------------------------------------
-; int PM_ctrlCHit(int clearFlag)
-;----------------------------------------------------------------------------
-; Returns the current state of the Ctrl-C flag and possibly clears it.
-;----------------------------------------------------------------------------
-cprocstart PM_ctrlCHit
-
- ARG clearFlag:UINT
-
- enter_c
- pushf ; Save interrupt status
- push es
-ifdef flatmodel
- mov ebx,[_PM_ctrlCPtr]
-else
- les bx,[_PM_ctrlCPtr]
-endif
- cli ; No interrupts thanks!
- mov _ax,[_ES _bx]
- test [BYTE clearFlag],1
- jz @@Done
- mov [UINT _ES _bx],0
-
-@@Done:
- pop es
- popf ; Restore interrupt status
- leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; PM_criticalISR - Control Error handler interrupt subroutine dispatcher
-;----------------------------------------------------------------------------
-; Interrupt handler for the MSDOS Critical Error interrupt, to dispatch
-; control to high level C based subroutines. We save the state of all
-; registers in this routine, and switch to a local stack. We also pass
-; the values of the AX and DI registers to the as pointers, so that the
-; values can be modified before returning to MSDOS.
-;----------------------------------------------------------------------------
-cprocfar _PM_criticalISR
-
- sti
- push ds ; Save value of DS
- push es
- push _bx ; Save register values changed
- cld ; Clear direction flag
-
- LOAD_DS ; Load DS register
-ifdef flatmodel
- mov ebx,[_PM_critPtr]
-else
- les bx,[_PM_critPtr]
-endif
- mov [_ES _bx],ax
- mov [_ES _bx+2],di
-
-; Run alternate critical handler code if installed
-
- cmp [CPTR _PM_critHandler],0
- je @@NoAltHandler
-
- pushad
- push _di
- push _ax
- call [CPTR _PM_critHandler] ; Call C code
- _add sp,4,8
- popad
-
- pop _bx
- pop es
- pop ds
- iret ; Return from interrupt
-
-@@NoAltHandler:
- mov ax,3 ; Tell MSDOS to fail the operation
- pop _bx
- pop es
- pop ds
- iret ; Return from interrupt
-
-cprocend
-
-;----------------------------------------------------------------------------
-; int PM_criticalError(int *axVal,int *diVal,int clearFlag)
-;----------------------------------------------------------------------------
-; Returns the current state of the critical error flags, and the values that
-; MSDOS passed in the AX and DI registers to our handler.
-;----------------------------------------------------------------------------
-cprocstart PM_criticalError
-
- ARG axVal:DPTR, diVal:DPTR, clearFlag:UINT
-
- enter_c
- pushf ; Save interrupt status
- push es
-ifdef flatmodel
- mov ebx,[_PM_critPtr]
-else
- les bx,[_PM_critPtr]
-endif
- cli ; No interrupts thanks!
- xor _ax,_ax
- xor _di,_di
- mov ax,[_ES _bx]
- mov di,[_ES _bx+2]
- test [BYTE clearFlag],1
- jz @@NoClear
- mov [ULONG _ES _bx],0
-@@NoClear:
- _les _bx,[axVal]
- mov [_ES _bx],_ax
- _les _bx,[diVal]
- mov [_ES _bx],_di
- pop es
- popf ; Restore interrupt status
- leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void PM_setMouseHandler(int mask, PM_mouseHandler mh)
-;----------------------------------------------------------------------------
-cprocstart _PM_setMouseHandler
-
- ARG mouseMask:UINT
-
- enter_c
- push es
-
- mov ax,0Ch ; AX := Function 12 - install interrupt sub
- mov _cx,[mouseMask] ; CX := mouse mask
- mov _dx,offset _PM_mouseISR
- push cs
- pop es ; ES:_DX -> mouse handler
- int 33h ; Call mouse driver
-
- pop es
- leave_c
- ret
-
-cprocend
-
-ifdef flatmodel
-
-;----------------------------------------------------------------------------
-; void PM_mousePMCB(void)
-;----------------------------------------------------------------------------
-; Mouse realmode callback routine. Upon entry to this routine, we recieve
-; the following from the DPMI server:
-;
-; Entry: DS:_SI -> Real mode stack at time of call
-; ES:_DI -> Real mode register data structure
-; SS:_SP -> Locked protected mode stack to use
-;----------------------------------------------------------------------------
-cprocfar _PM_mousePMCB
-
- pushad
- mov eax,[es:_di+1Ch] ; Load register values from real mode
- mov ebx,[es:_di+10h]
- mov ecx,[es:_di+18h]
- mov edx,[es:_di+14h]
- mov esi,[es:_di+04h]
- mov edi,[es:_di]
- call _PM_mouseISR ; Call the mouse handler
- popad
-
- mov ax,[ds:_si]
- mov [es:_di+2Ah],ax ; Plug in return IP address
- mov ax,[ds:_si+2]
- mov [es:_di+2Ch],ax ; Plug in return CS value
- add [WORD es:_di+2Eh],4 ; Remove return address from stack
- iret ; Go back to real mode!
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void PM_int10PMCB(void)
-;----------------------------------------------------------------------------
-; int10 realmode callback routine. Upon entry to this routine, we recieve
-; the following from the DPMI server:
-;
-; Entry: DS:ESI -> Real mode stack at time of call
-; ES:EDI -> Real mode register data structure
-; SS:ESP -> Locked protected mode stack to use
-;----------------------------------------------------------------------------
-cprocfar _PM_int10PMCB
-
- pushad
- push ds
- push es
- push fs
-
- pushfd
- pop eax
- mov [es:edi+20h],ax ; Save return flag status
- mov ax,[ds:esi]
- mov [es:edi+2Ah],ax ; Plug in return IP address
- mov ax,[ds:esi+2]
- mov [es:edi+2Ch],ax ; Plug in return CS value
- add [WORD es:edi+2Eh],4 ; Remove return address from stack
-
-; Call the install int10 handler in protected mode. This function gets called
-; with DS set to the current data selector, and ES:EDI pointing the the
-; real mode DPMI register structure at the time of the interrupt. The
-; handle must be written in assembler to be able to extract the real mode
-; register values from the structure
-
- push es
- pop fs ; FS:EDI -> real mode registers
- LOAD_DS
- NEWSTK Int10Stack ; Switch to local stack
-
- call [_PM_int10Handler]
-
- RESTSTK Int10Stack ; Restore previous stack
- pop fs
- pop es
- pop ds
- popad
- iret ; Go back to real mode!
-
-cprocend
-
-endif
-
-cpublic _PM_pmdosCodeEnd
-
-endcodeseg _pmdos
-
- END ; End of module
diff --git a/board/MAI/bios_emulator/scitech/src/pm/dos/_vflat.asm b/board/MAI/bios_emulator/scitech/src/pm/dos/_vflat.asm
deleted file mode 100644
index 34985a9d8b..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/dos/_vflat.asm
+++ /dev/null
@@ -1,652 +0,0 @@
-;****************************************************************************
-;*
-;* SciTech OS Portability Manager Library
-;*
-;* ========================================================================
-;*
-;* The contents of this file are subject to the SciTech MGL Public
-;* License Version 1.0 (the "License"); you may not use this file
-;* except in compliance with the License. You may obtain a copy of
-;* the License at http://www.scitechsoft.com/mgl-license.txt
-;*
-;* Software distributed under the License is distributed on an
-;* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-;* implied. See the License for the specific language governing
-;* rights and limitations under the License.
-;*
-;* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-;*
-;* The Initial Developer of the Original Code is SciTech Software, Inc.
-;* All Rights Reserved.
-;*
-;* ========================================================================
-;*
-;* Based on original code Copyright 1994 Otto Chrons
-;*
-;* Language: 80386 Assembler, TASM 4.0 or later
-;* Environment: IBM PC 32 bit protected mode
-;*
-;* Description: Low level page fault handler for virtual linear framebuffers.
-;*
-;****************************************************************************
-
- IDEAL
- JUMPS
-
-include "scitech.mac" ; Memory model macros
-
-header _vflat ; Set up memory model
-
-VFLAT_START EQU 0F0000000h
-VFLAT_END EQU 0F03FFFFFh
-PAGE_PRESENT EQU 1
-PAGE_NOTPRESENT EQU 0
-PAGE_READ EQU 0
-PAGE_WRITE EQU 2
-
-ifdef DOS4GW
-
-;----------------------------------------------------------------------------
-; DOS4G/W flat linear framebuffer emulation.
-;----------------------------------------------------------------------------
-
-begdataseg _vflat
-
-; Near pointers to the page directory base and our page tables. All of
-; this memory is always located in the first Mb of DOS memory.
-
-PDBR dd 0 ; Page directory base register (CR3)
-accessPageAddr dd 0
-accessPageTable dd 0
-
-; CauseWay page directory & 1st page table linear addresses.
-
-CauseWayDIRLinear dd 0
-CauseWay1stLinear dd 0
-
-; Place to store a copy of the original Page Table Directory before we
-; intialised our virtual buffer code.
-
-pageDirectory: resd 1024 ; Saved page table directory
-
-ValidCS dw 0 ; Valid CS for page faults
-Ring0CS dw 0 ; Our ring 0 code selector
-LastPage dd 0 ; Last page we mapped in
-BankFuncBuf: resb 101 ; Place to store bank switch code
-BankFuncPtr dd offset BankFuncBuf
-
-INT14Gate:
-INT14Offset dd 0 ; eip of original vector
-INT14Selector dw 0 ; cs of original vector
-
- cextern _PM_savedDS,USHORT
- cextern VF_haveCauseWay,BOOL
-
-enddataseg _vflat
-
-begcodeseg _vflat ; Start of code segment
-
- cextern VF_malloc,FPTR
-
-;----------------------------------------------------------------------------
-; PF_handler64k - Page fault handler for 64k banks
-;----------------------------------------------------------------------------
-; The handler below is a 32 bit ring 0 page fault handler. It receives
-; control immediately after any page fault or after an IRQ6 (hardware
-; interrupt). This provides the fastest possible handling of page faults
-; since it jump directly here. If this is a page fault, the number
-; immediately on the stack will be an error code, at offset 4 will be
-; the eip of the faulting instruction, at offset 8 will be the cs of the
-; faulting instruction. If it is a hardware interrupt, it will not have
-; the error code and the eflags will be at offset 8.
-;----------------------------------------------------------------------------
-cprocfar PF_handler64k
-
-; Check if this is a processor exeception or a page fault
-
- push eax
- mov ax,[cs:ValidCS] ; Use CS override to access data
- cmp [ss:esp+12],ax ; Is this a page fault?
- jne @@ToOldHandler ; Nope, jump to the previous handler
-
-; Get address of page fault and check if within our handlers range
-
- mov eax,cr2 ; EBX has page fault linear address
- cmp eax,VFLAT_START ; Is the fault less than ours?
- jb @@ToOldHandler ; Yep, go to previous handler
- cmp eax,VFLAT_END ; Is the fault more than ours?
- jae @@ToOldHandler ; Yep, go to previous handler
-
-; This is our page fault, so we need to handle it
-
- pushad
- push ds
- push es
- mov ebx,eax ; EBX := page fault address
- and ebx,invert 0FFFFh ; Mask to 64k bank boundary
- mov ds,[cs:_PM_savedDS]; Load segment registers
- mov es,[cs:_PM_savedDS]
-
-; Map in the page table for our virtual framebuffer area for modification
-
- mov edi,[PDBR] ; EDI points to page directory
- mov edx,ebx ; EDX = linear address
- shr edx,22 ; EDX = offset to page directory
- mov edx,[edx*4+edi] ; EDX = physical page table address
- mov eax,edx
- mov edx,[accessPageTable]
- or eax,7
- mov [edx],eax
- mov eax,cr3
- mov cr3,eax ; Update page table cache
-
-; Mark all pages valid for the new page fault area
-
- mov esi,ebx ; ESI := linear address for page
- shr esi,10
- and esi,0FFFh ; Offset into page table
- add esi,[accessPageAddr]
-ifdef USE_NASM
-%assign off 0
-%rep 16
- or [DWORD esi+off],0000000001h ; Enable pages
-%assign off off+4
-%endrep
-else
-off = 0
-REPT 16
- or [DWORD esi+off],0000000001h ; Enable pages
-off = off+4
-ENDM
-endif
-
-; Mark all pages invalid for the previously mapped area
-
- xchg esi,[LastPage] ; Save last page for next page fault
- test esi,esi
- jz @@DoneMapping ; Dont update if first time round
-ifdef USE_NASM
-%assign off 0
-%rep 16
- or [DWORD esi+off],0FFFFFFFEh ; Disable pages
-%assign off off+4
-%endrep
-else
-off = 0
-REPT 16
- and [DWORD esi+off],0FFFFFFFEh ; Disable pages
-off = off+4
-ENDM
-endif
-
-@@DoneMapping:
- mov eax,cr3
- mov cr3,eax ; Flush the TLB
-
-; Now program the new SuperVGA starting bank address
-
- mov eax,ebx ; EAX := page fault address
- shr eax,16
- and eax,0FFh ; Mask to 0-255
- call [BankFuncPtr] ; Call the bank switch function
-
- pop es
- pop ds
- popad
- pop eax
- add esp,4 ; Pop the error code from stack
- iretd ; Return to faulting instruction
-
-@@ToOldHandler:
- pop eax
-ifdef USE_NASM
- jmp far dword [cs:INT14Gate]; Chain to previous handler
-else
- jmp [FWORD cs:INT14Gate]; Chain to previous handler
-endif
-
-cprocend
-
-;----------------------------------------------------------------------------
-; PF_handler4k - Page fault handler for 4k banks
-;----------------------------------------------------------------------------
-; The handler below is a 32 bit ring 0 page fault handler. It receives
-; control immediately after any page fault or after an IRQ6 (hardware
-; interrupt). This provides the fastest possible handling of page faults
-; since it jump directly here. If this is a page fault, the number
-; immediately on the stack will be an error code, at offset 4 will be
-; the eip of the faulting instruction, at offset 8 will be the cs of the
-; faulting instruction. If it is a hardware interrupt, it will not have
-; the error code and the eflags will be at offset 8.
-;----------------------------------------------------------------------------
-cprocfar PF_handler4k
-
-; Fill in when we have tested all the 64Kb code
-
-ifdef USE_NASM
- jmp far dword [cs:INT14Gate]; Chain to previous handler
-else
- jmp [FWORD cs:INT14Gate]; Chain to previous handler
-endif
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void InstallFaultHandler(void *baseAddr,int bankSize)
-;----------------------------------------------------------------------------
-; Installes the page fault handler directly int the interrupt descriptor
-; table for maximum performance. This of course requires ring 0 access,
-; but none of this stuff will run without ring 0!
-;----------------------------------------------------------------------------
-cprocstart InstallFaultHandler
-
- ARG baseAddr:ULONG, bankSize:UINT
-
- enter_c
-
- mov [DWORD LastPage],0 ; No pages have been mapped
- mov ax,cs
- mov [ValidCS],ax ; Save CS value for page faults
-
-; Put address of our page fault handler into the IDT directly
-
- sub esp,6 ; Allocate space on stack
-ifdef USE_NASM
- sidt [ss:esp] ; Store pointer to IDT
-else
- sidt [FWORD ss:esp] ; Store pointer to IDT
-endif
- pop ax ; add esp,2
- pop eax ; Absolute address of IDT
- add eax,14*8 ; Point to Int #14
-
-; Note that Interrupt gates do not have the high and low word of the
-; offset in adjacent words in memory, there are 4 bytes separating them.
-
- mov ecx,[eax] ; Get cs and low 16 bits of offset
- mov edx,[eax+6] ; Get high 16 bits of offset in dx
- shl edx,16
- mov dx,cx ; edx has offset
- mov [INT14Offset],edx ; Save offset
- shr ecx,16
- mov [INT14Selector],cx ; Save original cs
- mov [eax+2],cs ; Install new cs
- mov edx,offset PF_handler64k
- cmp [UINT bankSize],4
- jne @@1
- mov edx,offset PF_handler4k
-@@1: mov [eax],dx ; Install low word of offset
- shr edx,16
- mov [eax+6],dx ; Install high word of offset
-
- leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void RemoveFaultHandler(void)
-;----------------------------------------------------------------------------
-; Closes down the virtual framebuffer services and restores the previous
-; page fault handler.
-;----------------------------------------------------------------------------
-cprocstart RemoveFaultHandler
-
- enter_c
-
-; Remove page fault handler from IDT
-
- sub esp,6 ; Allocate space on stack
-ifdef USE_NASM
- sidt [ss:esp] ; Store pointer to IDT
-else
- sidt [FWORD ss:esp] ; Store pointer to IDT
-endif
-
- pop ax ; add esp,2
- pop eax ; Absolute address of IDT
- add eax,14*8 ; Point to Int #14
- mov cx,[INT14Selector]
- mov [eax+2],cx ; Restore original CS
- mov edx,[INT14Offset]
- mov [eax],dx ; Install low word of offset
- shr edx,16
- mov [eax+6],dx ; Install high word of offset
-
- leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void InstallBankFunc(int codeLen,void *bankFunc)
-;----------------------------------------------------------------------------
-; Installs the bank switch function by relocating it into our data segment
-; and making it into a callable function. We do it this way to make the
-; code identical to the way that the VflatD devices work under Windows.
-;----------------------------------------------------------------------------
-cprocstart InstallBankFunc
-
- ARG codeLen:UINT, bankFunc:DPTR
-
- enter_c
-
- mov esi,[bankFunc] ; Copy the code into buffer
- mov edi,offset BankFuncBuf
- mov ecx,[codeLen]
- rep movsb
- mov [BYTE edi],0C3h ; Terminate the function with a near ret
-
- leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; int InitPaging(void)
-;----------------------------------------------------------------------------
-; Initializes paging system. If paging is not enabled, builds a page table
-; directory and page tables for physical memory
-;
-; Exit: 0 - Successful
-; -1 - Couldn't initialize paging mechanism
-;----------------------------------------------------------------------------
-cprocstart InitPaging
-
- push ebx
- push ecx
- push edx
- push esi
- push edi
-
-; Are we running under CauseWay?
-
- mov ax,0FFF9h
- int 31h
- jc @@NotCauseway
- cmp ecx,"CAUS"
- jnz @@NotCauseway
- cmp edx,"EWAY"
- jnz @@NotCauseway
-
- mov [BOOL VF_haveCauseWay],1
- mov [CauseWayDIRLinear],esi
- mov [CauseWay1stLinear],edi
-
-; Check for DPMI
-
- mov ax,0ff00h
- push es
- int 31h
- pop es
- shr edi,2
- and edi,3
- cmp edi,2
- jz @@ErrExit ; Not supported under DPMI
-
- mov eax,[CauseWayDIRLinear]
- jmp @@CopyCR3
-
-@@NotCauseway:
- mov ax,cs
- test ax,3 ; Which ring are we running
- jnz @@ErrExit ; Needs zero ring to access
- ; page tables (CR3)
- mov eax,cr0 ; Load CR0
- test eax,80000000h ; Is paging enabled?
- jz @@ErrExit ; No, we must have paging!
-
- mov eax,cr3 ; Load directory address
- and eax,0FFFFF000h
-
-@@CopyCR3:
- mov [PDBR],eax ; Save it
- mov esi,eax
- mov edi,offset pageDirectory
- mov ecx,1024
- cld
- rep movsd ; Copy the original page table directory
- cmp [DWORD accessPageAddr],0; Check if we have allocated page
- jne @@HaveRealMem ; table already (we cant free it)
-
- mov eax,0100h ; DPMI DOS allocate
- mov ebx,8192/16
- int 31h ; Allocate 8192 bytes
- and eax,0FFFFh
- shl eax,4 ; EAX points to newly allocated memory
- add eax,4095
- and eax,0FFFFF000h ; Page align
- mov [accessPageAddr],eax
-
-@@HaveRealMem:
- mov eax,[accessPageAddr] ; EAX -> page table in 1st Mb
- shr eax,12
- and eax,3FFh ; Page table offset
- shl eax,2
- cmp [BOOL VF_haveCauseWay],0
- jz @@NotCW0
- mov ebx,[CauseWay1stLinear]
- jmp @@Put1st
-
-@@NotCW0:
- mov ebx,[PDBR]
- mov ebx,[ebx]
- and ebx,0FFFFF000h ; Page table for 1st megabyte
-
-@@Put1st:
- add eax,ebx
- mov [accessPageTable],eax
- sub eax,eax ; No error
- jmp @@Exit
-
-@@ErrExit:
- mov eax,-1
-
-@@Exit: pop edi
- pop esi
- pop edx
- pop ecx
- pop ebx
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void ClosePaging(void)
-;----------------------------------------------------------------------------
-; Closes the paging system
-;----------------------------------------------------------------------------
-cprocstart ClosePaging
-
- push eax
- push ecx
- push edx
- push esi
- push edi
-
- mov eax,[accessPageAddr]
- call AccessPage ; Restore AccessPage mapping
- mov edi,[PDBR]
- mov esi,offset pageDirectory
- mov ecx,1024
- cld
- rep movsd ; Restore the original page table directory
-
-@@Exit: pop edi
- pop esi
- pop edx
- pop ecx
- pop eax
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; long AccessPage(long phys)
-;----------------------------------------------------------------------------
-; Maps a known page to given physical memory
-; Entry: EAX - Physical memory
-; Exit: EAX - Linear memory address of mapped phys mem
-;----------------------------------------------------------------------------
-cprocstatic AccessPage
-
- push edx
- mov edx,[accessPageTable]
- or eax,7
- mov [edx],eax
- mov eax,cr3
- mov cr3,eax ; Update page table cache
- mov eax,[accessPageAddr]
- pop edx
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; long GetPhysicalAddress(long linear)
-;----------------------------------------------------------------------------
-; Returns the physical address of linear address
-; Entry: EAX - Linear address to convert
-; Exit: EAX - Physical address
-;----------------------------------------------------------------------------
-cprocstatic GetPhysicalAddress
-
- push ebx
- push edx
- mov edx,eax
- shr edx,22 ; EDX is the directory offset
- mov ebx,[PDBR]
- mov edx,[edx*4+ebx] ; Load page table address
- push eax
- mov eax,edx
- call AccessPage ; Access the page table
- mov edx,eax
- pop eax
- shr eax,12
- and eax,03FFh ; EAX offset into page table
- mov eax,[edx+eax*4] ; Load physical address
- and eax,0FFFFF000h
- pop edx
- pop ebx
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void CreatePageTable(long pageDEntry)
-;----------------------------------------------------------------------------
-; Creates a page table for specific address (4MB)
-; Entry: EAX - Page directory entry (top 10-bits of address)
-;----------------------------------------------------------------------------
-cprocstatic CreatePageTable
-
- push ebx
- push ecx
- push edx
- push edi
- mov ebx,eax ; Save address
- mov eax,8192
- push eax
- call VF_malloc ; Allocate page table directory
- add esp,4
- add eax,0FFFh
- and eax,0FFFFF000h ; Page align (4KB)
- mov edi,eax ; Save page table linear address
- sub eax,eax ; Fill with zero
- mov ecx,1024
- cld
- rep stosd ; Clear page table
- sub edi,4096
- mov eax,edi
- call GetPhysicalAddress
- mov edx,[PDBR]
- or eax,7 ; Present/write/user bit
- mov [edx+ebx*4],eax ; Save physical address into page directory
- mov eax,cr3
- mov cr3,eax ; Update page table cache
- pop edi
- pop edx
- pop ecx
- pop ebx
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void MapPhysical2Linear(ulong pAddr, ulong lAddr, int pages, int flags);
-;----------------------------------------------------------------------------
-; Maps physical memory into linear memory
-; Entry: pAddr - Physical address
-; lAddr - Linear address
-; pages - Number of 4K pages to map
-; flags - Page flags
-; bit 0 = present
-; bit 1 = Read(0)/Write(1)
-;----------------------------------------------------------------------------
-cprocstart MapPhysical2Linear
-
- ARG pAddr:ULONG, lAddr:ULONG, pages:UINT, pflags:UINT
-
- enter_c
-
- and [ULONG pAddr],0FFFFF000h; Page boundary
- and [ULONG lAddr],0FFFFF000h; Page boundary
- mov ecx,[pflags]
- and ecx,11b ; Just two bits
- or ecx,100b ; Supervisor bit
- mov [pflags],ecx
-
- mov edx,[lAddr]
- shr edx,22 ; EDX = Directory
- mov esi,[PDBR]
- mov edi,[pages] ; EDI page count
- mov ebx,[lAddr]
-
-@@CreateLoop:
- mov ecx,[esi+edx*4] ; Load page table address
- test ecx,1 ; Is it present?
- jnz @@TableOK
- mov eax,edx
- call CreatePageTable ; Create a page table
-@@TableOK:
- mov eax,ebx
- shr eax,12
- and eax,3FFh
- sub eax,1024
- neg eax ; EAX = page count in this table
- inc edx ; Next table
- mov ebx,0 ; Next time we'll map 1K pages
- sub edi,eax ; Subtract mapped pages from page count
- jns @@CreateLoop ; Create more tables if necessary
-
- mov ecx,[pages] ; ECX = Page count
- mov esi,[lAddr]
- shr esi,12 ; Offset part isn't needed
- mov edi,[pAddr]
-@@MappingLoop:
- mov eax,esi
- shr eax,10 ; EAX = offset to page directory
- mov ebx,[PDBR]
- mov eax,[eax*4+ebx] ; EAX = page table address
- call AccessPage
- mov ebx,esi
- and ebx,3FFh ; EBX = offset to page table
- mov edx,edi
- add edi,4096 ; Next physical address
- inc esi ; Next linear page
- or edx,[pflags] ; Update flags...
- mov [eax+ebx*4],edx ; Store page table entry
- loop @@MappingLoop
- mov eax,cr3
- mov cr3,eax ; Update page table cache
-
- leave_c
- ret
-
-cprocend
-
-endcodeseg _vflat
-
-endif
-
- END ; End of module
diff --git a/board/MAI/bios_emulator/scitech/src/pm/dos/cpuinfo.c b/board/MAI/bios_emulator/scitech/src/pm/dos/cpuinfo.c
deleted file mode 100644
index ee117c78e9..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/dos/cpuinfo.c
+++ /dev/null
@@ -1,72 +0,0 @@
-/****************************************************************************
-*
-* Ultra Long Period Timer
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: DOS
-*
-* Description: MSDOS specific code for the CPU detection module.
-*
-****************************************************************************/
-
-/*----------------------------- Implementation ----------------------------*/
-
-/* External timing function */
-
-void __ZTimerInit(void);
-
-/****************************************************************************
-REMARKS:
-Do nothing for DOS because we don't have thread priorities.
-****************************************************************************/
-#define SetMaxThreadPriority() 0
-
-/****************************************************************************
-REMARKS:
-Do nothing for DOS because we don't have thread priorities.
-****************************************************************************/
-#define RestoreThreadPriority(i) (void)(i)
-
-/****************************************************************************
-REMARKS:
-Initialise the counter and return the frequency of the counter.
-****************************************************************************/
-static void GetCounterFrequency(
- CPU_largeInteger *freq)
-{
- ulong resolution;
-
- __ZTimerInit();
- ULZTimerResolution(&resolution);
- freq->low = (ulong)(10000000000.0 / resolution);
- freq->high = 0;
-}
-
-/****************************************************************************
-REMARKS:
-Read the counter and return the counter value.
-****************************************************************************/
-#define GetCounter(t) \
-{ \
- (t)->low = ULZReadTime() * 10000L; \
- (t)->high = 0; \
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/dos/event.c b/board/MAI/bios_emulator/scitech/src/pm/dos/event.c
deleted file mode 100644
index a969d111b4..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/dos/event.c
+++ /dev/null
@@ -1,494 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: 32-bit DOS
-*
-* Description: 32-bit DOS implementation for the SciTech cross platform
-* event library.
-*
-****************************************************************************/
-
-/*--------------------------- Global variables ----------------------------*/
-
-ibool _VARAPI _EVT_useEvents = true; /* True to use event handling */
-ibool _VARAPI _EVT_installed = 0; /* Event handers installed? */
-uchar _VARAPI *_EVT_biosPtr = NULL; /* Pointer to the BIOS data area */
-static ibool haveMouse = false; /* True if we have a mouse */
-
-/*---------------------------- Implementation -----------------------------*/
-
-/* External assembler functions */
-
-void EVTAPI _EVT_pollJoystick(void);
-uint EVTAPI _EVT_disableInt(void);
-uint EVTAPI _EVT_restoreInt(uint flags);
-void EVTAPI _EVT_codeStart(void);
-void EVTAPI _EVT_codeEnd(void);
-void EVTAPI _EVT_cCodeStart(void);
-void EVTAPI _EVT_cCodeEnd(void);
-int EVTAPI _EVT_getKeyCode(void);
-void EVTAPI _EVT_pumpMessages(void);
-int EVTAPI EVT_rdinx(int port,int index);
-void EVTAPI EVT_wrinx(int port,int index,int value);
-
-#ifdef NO_KEYBOARD_INTERRUPT
-/****************************************************************************
-REMARKS:
-This function is used to pump all keyboard messages from the BIOS keyboard
-handler into our event queue. This can be used to avoid using the
-installable keyboard handler if this is causing problems.
-****************************************************************************/
-static void EVTAPI _EVT_pumpMessages(void)
-{
- RMREGS regs;
- uint key,ps;
-
- /* Since the keyboard ISR has not been installed if NO_IDE_BUG has
- * been defined, we first check for any pending keyboard events
- * here, and if there are some insert them into the event queue to
- * be picked up later - what a kludge.
- */
- while ((key = _EVT_getKeyCode()) != 0) {
- ps = _EVT_disableInt();
- addKeyEvent(EVT_KEYDOWN, key);
- _EVT_restoreInt(ps);
- }
-
- regs.x.ax = 0x0B; /* Reset Move Mouse */
- PM_int86(0x33,&regs,&regs);
-}
-#endif
-
-/****************************************************************************
-REMARKS:
-This function is used to return the number of ticks since system
-startup in milliseconds. This should be the same value that is placed into
-the time stamp fields of events, and is used to implement auto mouse down
-events.
-****************************************************************************/
-ulong _EVT_getTicks(void)
-{
- return (ulong)PM_getLong(_EVT_biosPtr+0x6C) * 55UL;
-}
-
-/****************************************************************************
-REMARKS:
-Reboots the machine from DOS (warm boot)
-****************************************************************************/
-static void Reboot(void)
-{
- PMREGS regs;
- PMSREGS sregs;
-
- ushort *rebootType = PM_mapRealPointer(0x40,0x72);
- *rebootType = 0x1234;
- PM_callRealMode(0xFFFF,0x0000,&regs,&sregs);
-}
-
-/****************************************************************************
-REMARKS:
-Include generic raw scancode keyboard module.
-****************************************************************************/
-#define SUPPORT_CTRL_ALT_DEL
-#include "common/keyboard.c"
-
-/****************************************************************************
-REMARKS:
-This function fools the DOS mouse driver into thinking that it is running
-in graphics mode, rather than text mode so we always get virtual coordinates
-correctly rather than character coordinates.
-****************************************************************************/
-int _EVT_foolMouse(void)
-{
- int oldmode = PM_getByte(_EVT_biosPtr+0x49);
- PM_setByte(_EVT_biosPtr+0x49,0x10);
- oldmode |= (EVT_rdinx(0x3C4,0x2) << 8);
- return oldmode;
-}
-
-/****************************************************************************
-REMARKS:
-This function unfools the DOS mouse driver after we have finished calling it.
-****************************************************************************/
-void _EVT_unfoolMouse(
- int oldmode)
-{
- PM_setByte(_EVT_biosPtr+0x49,oldmode);
-
- /* Some mouse drivers reset the plane mask register for VGA plane 4
- * modes, which screws up the display on some VGA compatible controllers
- * in SuperVGA modes. We reset the value back again in here to solve
- * the problem.
- */
- EVT_wrinx(0x3C4,0x2,oldmode >> 8);
-}
-
-/****************************************************************************
-REMARKS:
-Determines if we have a mouse attached and functioning.
-****************************************************************************/
-static ibool detectMouse(void)
-{
- RMREGS regs;
- RMSREGS sregs;
- uchar *p;
- ibool retval;
-
- regs.x.ax = 0x3533; /* Get interrupt vector 0x33 */
- PM_int86x(0x21,&regs,&regs,&sregs);
-
- /* Check that interrupt vector 0x33 is not a zero, and that the first
- * instruction in the interrupt vector is not an IRET instruction
- */
- p = PM_mapRealPointer(sregs.es, regs.x.bx);
- retval = ((sregs.es != 0) || (regs.x.bx != 0)) && (PM_getByte(p) != 207);
- return retval;
-}
-
-/****************************************************************************
-PARAMETERS:
-what - Event code
-message - Event message
-x,y - Mouse position at time of event
-but_stat - Mouse button status at time of event
-
-REMARKS:
-Adds a new mouse event to the event queue. This routine is called from within
-the mouse interrupt subroutine, so it must be efficient.
-
-NOTE: Interrupts MUST be OFF while this routine is called to ensure we have
- mutually exclusive access to our internal data structures for
- interrupt driven systems (like under DOS).
-****************************************************************************/
-static void addMouseEvent(
- uint what,
- uint message,
- int x,
- int y,
- int mickeyX,
- int mickeyY,
- uint but_stat)
-{
- event_t evt;
-
- if (EVT.count < EVENTQSIZE) {
- /* Save information in event record. */
- evt.when = _EVT_getTicks();
- evt.what = what;
- evt.message = message;
- evt.modifiers = but_stat;
- evt.where_x = x; /* Save mouse event position */
- evt.where_y = y;
- evt.relative_x = mickeyX;
- evt.relative_y = mickeyY;
- evt.modifiers |= EVT.keyModifiers;
- addEvent(&evt); /* Add to tail of event queue */
- }
-}
-
-/****************************************************************************
-PARAMETERS:
-mask - Event mask
-butstate - Button state
-x - Mouse x coordinate
-y - Mouse y coordinate
-
-REMARKS:
-Mouse event handling routine. This gets called when a mouse event occurs,
-and we call the addMouseEvent() routine to add the appropriate mouse event
-to the event queue.
-
-Note: Interrupts are ON when this routine is called by the mouse driver code.
-****************************************************************************/
-static void EVTAPI mouseISR(
- uint mask,
- uint butstate,
- int x,
- int y,
- int mickeyX,
- int mickeyY)
-{
- uint ps;
- uint buttonMask;
-
- if (mask & 1) {
- /* Save the current mouse coordinates */
- EVT.mx = x; EVT.my = y;
-
- /* If the last event was a movement event, then modify the last
- * event rather than post a new one, so that the queue will not
- * become saturated. Before we modify the data structures, we
- * MUST ensure that interrupts are off.
- */
- ps = _EVT_disableInt();
- if (EVT.oldMove != -1) {
- EVT.evtq[EVT.oldMove].where_x = x; /* Modify existing one */
- EVT.evtq[EVT.oldMove].where_y = y;
- EVT.evtq[EVT.oldMove].relative_x += mickeyX;
- EVT.evtq[EVT.oldMove].relative_y += mickeyY;
- }
- else {
- EVT.oldMove = EVT.freeHead; /* Save id of this move event */
- addMouseEvent(EVT_MOUSEMOVE,0,x,y,mickeyX,mickeyY,butstate);
- }
- _EVT_restoreInt(ps);
- }
- if (mask & 0x2A) {
- ps = _EVT_disableInt();
- buttonMask = 0;
- if (mask & 2) buttonMask |= EVT_LEFTBMASK;
- if (mask & 8) buttonMask |= EVT_RIGHTBMASK;
- if (mask & 32) buttonMask |= EVT_MIDDLEBMASK;
- addMouseEvent(EVT_MOUSEDOWN,buttonMask,x,y,0,0,butstate);
- EVT.oldMove = -1;
- _EVT_restoreInt(ps);
- }
- if (mask & 0x54) {
- ps = _EVT_disableInt();
- buttonMask = 0;
- if (mask & 2) buttonMask |= EVT_LEFTBMASK;
- if (mask & 8) buttonMask |= EVT_RIGHTBMASK;
- if (mask & 32) buttonMask |= EVT_MIDDLEBMASK;
- addMouseEvent(EVT_MOUSEUP,buttonMask,x,y,0,0,butstate);
- EVT.oldMove = -1;
- _EVT_restoreInt(ps);
- }
- EVT.oldKey = -1;
-}
-
-/****************************************************************************
-REMARKS:
-Keyboard interrupt handler function.
-
-NOTE: Interrupts are OFF when this routine is called by the keyboard ISR,
- and we leave them OFF the entire time.
-****************************************************************************/
-static void EVTAPI keyboardISR(void)
-{
- processRawScanCode(PM_inpb(0x60));
- PM_outpb(0x20,0x20);
-}
-
-/****************************************************************************
-REMARKS:
-Safely abort the event module upon catching a fatal error.
-****************************************************************************/
-void _EVT_abort()
-{
- EVT_exit();
- PM_fatalError("Unhandled exception!");
-}
-
-/****************************************************************************
-PARAMETERS:
-mouseMove - Callback function to call wheneve the mouse needs to be moved
-
-REMARKS:
-Initiliase the event handling module. Here we install our mouse handling ISR
-to be called whenever any button's are pressed or released. We also build
-the free list of events in the event queue.
-
-We use handler number 2 of the mouse libraries interrupt handlers for our
-event handling routines.
-****************************************************************************/
-void EVTAPI EVT_init(
- _EVT_mouseMoveHandler mouseMove)
-{
- int i;
-
- PM_init();
- EVT.mouseMove = mouseMove;
- _EVT_biosPtr = PM_getBIOSPointer();
- EVT_resume();
-
- /* Grab all characters pending in the keyboard buffer and stuff
- * them into our event buffer. This allows us to pick up any keypresses
- * while the program is initialising.
- */
- while ((i = _EVT_getKeyCode()) != 0)
- addKeyEvent(EVT_KEYDOWN,i);
-}
-
-/****************************************************************************
-REMARKS:
-Initiailises the internal event handling modules. The EVT_suspend function
-can be called to suspend event handling (such as when shelling out to DOS),
-and this function can be used to resume it again later.
-****************************************************************************/
-void EVTAPI EVT_resume(void)
-{
- static int locked = 0;
- int stat;
- uchar mods;
- PM_lockHandle lh; /* Unused in DOS */
-
- if (_EVT_useEvents) {
- /* Initialise the event queue and enable our interrupt handlers */
- initEventQueue();
-#ifndef NO_KEYBOARD_INTERRUPT
- PM_setKeyHandler(keyboardISR);
-#endif
-#ifndef NO_MOUSE_INTERRUPT
- if ((haveMouse = detectMouse()) != 0) {
- int oldmode = _EVT_foolMouse();
- PM_setMouseHandler(0xFFFF,mouseISR);
- _EVT_unfoolMouse(oldmode);
- }
-#endif
-
- /* Read the keyboard modifier flags from the BIOS to get the
- * correct initialisation state. The only state we care about is
- * the correct toggle state flags such as SCROLLLOCK, NUMLOCK and
- * CAPSLOCK.
- */
- EVT.keyModifiers = 0;
- mods = PM_getByte(_EVT_biosPtr+0x17);
- if (mods & 0x10)
- EVT.keyModifiers |= EVT_SCROLLLOCK;
- if (mods & 0x20)
- EVT.keyModifiers |= EVT_NUMLOCK;
- if (mods & 0x40)
- EVT.keyModifiers |= EVT_CAPSLOCK;
-
- /* Lock all of the code and data used by our protected mode interrupt
- * handling routines, so that it will continue to work correctly
- * under real mode.
- */
- if (!locked) {
- /* It is difficult to ensure that we lock our global data, so we
- * do this by taking the address of a variable locking all data
- * 2Kb on either side. This should properly cover the global data
- * used by the module (the other alternative is to declare the
- * variables in assembler, in which case we know it will be
- * correct).
- */
- stat = !PM_lockDataPages(&EVT,sizeof(EVT),&lh);
- stat |= !PM_lockDataPages(&_EVT_biosPtr,sizeof(_EVT_biosPtr),&lh);
- stat |= !PM_lockCodePages((__codePtr)_EVT_cCodeStart,(int)_EVT_cCodeEnd-(int)_EVT_cCodeStart,&lh);
- stat |= !PM_lockCodePages((__codePtr)_EVT_codeStart,(int)_EVT_codeEnd-(int)_EVT_codeStart,&lh);
- if (stat) {
- PM_fatalError("Page locking services failed - interrupt handling not safe!");
- exit(1);
- }
- locked = 1;
- }
-
- /* Catch program termination signals so we can clean up properly */
- signal(SIGABRT, _EVT_abort);
- signal(SIGFPE, _EVT_abort);
- signal(SIGINT, _EVT_abort);
- _EVT_installed = true;
- }
-}
-
-/****************************************************************************
-REMARKS
-Changes the range of coordinates returned by the mouse functions to the
-specified range of values. This is used when changing between graphics
-modes set the range of mouse coordinates for the new display mode.
-****************************************************************************/
-void EVTAPI EVT_setMouseRange(
- int xRes,
- int yRes)
-{
- RMREGS regs;
-
- if (haveMouse) {
- int oldmode = _EVT_foolMouse();
- PM_resetMouseDriver(1);
- regs.x.ax = 7; /* Mouse function 7 - Set horizontal min and max */
- regs.x.cx = 0;
- regs.x.dx = xRes;
- PM_int86(0x33,&regs,&regs);
- regs.x.ax = 8; /* Mouse function 8 - Set vertical min and max */
- regs.x.cx = 0;
- regs.x.dx = yRes;
- PM_int86(0x33,&regs,&regs);
- _EVT_unfoolMouse(oldmode);
- }
-}
-
-/****************************************************************************
-REMARKS
-Modifes the mouse coordinates as necessary if scaling to OS coordinates,
-and sets the OS mouse cursor position.
-****************************************************************************/
-void _EVT_setMousePos(
- int *x,
- int *y)
-{
- RMREGS regs;
-
- if (haveMouse) {
- int oldmode = _EVT_foolMouse();
- regs.x.ax = 4; /* Mouse function 4 - Set mouse position */
- regs.x.cx = *x; /* New horizontal coordinate */
- regs.x.dx = *y; /* New vertical coordinate */
- PM_int86(0x33,&regs,&regs);
- _EVT_unfoolMouse(oldmode);
- }
-}
-
-/****************************************************************************
-REMARKS
-Suspends all of our event handling operations. This is also used to
-de-install the event handling code.
-****************************************************************************/
-void EVTAPI EVT_suspend(void)
-{
- uchar mods;
-
- if (_EVT_installed) {
- /* Restore the interrupt handlers */
- PM_restoreKeyHandler();
- if (haveMouse)
- PM_restoreMouseHandler();
- signal(SIGABRT, SIG_DFL);
- signal(SIGFPE, SIG_DFL);
- signal(SIGINT, SIG_DFL);
-
- /* Set the keyboard modifier flags in the BIOS to our values */
- EVT_allowLEDS(true);
- mods = PM_getByte(_EVT_biosPtr+0x17) & ~0x70;
- if (EVT.keyModifiers & EVT_SCROLLLOCK)
- mods |= 0x10;
- if (EVT.keyModifiers & EVT_NUMLOCK)
- mods |= 0x20;
- if (EVT.keyModifiers & EVT_CAPSLOCK)
- mods |= 0x40;
- PM_setByte(_EVT_biosPtr+0x17,mods);
-
- /* Flag that we are no longer installed */
- _EVT_installed = false;
- }
-}
-
-/****************************************************************************
-REMARKS
-Exits the event module for program terminatation.
-****************************************************************************/
-void EVTAPI EVT_exit(void)
-{
- EVT_suspend();
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/dos/oshdr.h b/board/MAI/bios_emulator/scitech/src/pm/dos/oshdr.h
deleted file mode 100644
index 35e8e00f72..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/dos/oshdr.h
+++ /dev/null
@@ -1,29 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: 32-bit DOS
-*
-* Description: Include file to include all OS specific header files.
-*
-****************************************************************************/
diff --git a/board/MAI/bios_emulator/scitech/src/pm/dos/pm.c b/board/MAI/bios_emulator/scitech/src/pm/dos/pm.c
deleted file mode 100644
index 2ad9e34f91..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/dos/pm.c
+++ /dev/null
@@ -1,2243 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: 16/32 bit DOS
-*
-* Description: Implementation for the OS Portability Manager Library, which
-* contains functions to implement OS specific services in a
-* generic, cross platform API. Porting the OS Portability
-* Manager library is the first step to porting any SciTech
-* products to a new platform.
-*
-****************************************************************************/
-
-#include "pmapi.h"
-#include "drvlib/os/os.h"
-#include "ztimerc.h"
-#include "mtrr.h"
-#include "pm_help.h"
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <dos.h>
-#include <conio.h>
-#ifdef __GNUC__
-#include <unistd.h>
-#include <sys/nearptr.h>
-#include <sys/stat.h>
-#else
-#include <direct.h>
-#endif
-#ifdef __BORLANDC__
-#pragma warn -par
-#endif
-
-/*--------------------------- Global variables ----------------------------*/
-
-typedef struct {
- int oldMode;
- int old50Lines;
- } DOS_stateBuf;
-
-#define MAX_RM_BLOCKS 10
-
-static struct {
- void *p;
- uint tag;
- } rmBlocks[MAX_RM_BLOCKS];
-
-static uint VESABuf_len = 1024; /* Length of the VESABuf buffer */
-static void *VESABuf_ptr = NULL; /* Near pointer to VESABuf */
-static uint VESABuf_rseg; /* Real mode segment of VESABuf */
-static uint VESABuf_roff; /* Real mode offset of VESABuf */
-static void (PMAPIP fatalErrorCleanup)(void) = NULL;
-ushort _VARAPI _PM_savedDS = 0;
-#ifdef DOS4GW
-static ulong PDB = 0,*pPDB = NULL;
-#endif
-#ifndef REALMODE
-static char VXD_name[] = PMHELP_NAME;
-static char VXD_module[] = PMHELP_MODULE;
-static char VXD_DDBName[] = PMHELP_DDBNAME;
-static uint VXD_version = -1;
-static uint VXD_loadOff = 0;
-static uint VXD_loadSel = 0;
-uint _VARAPI _PM_VXD_off = 0;
-uint _VARAPI _PM_VXD_sel = 0;
-int _VARAPI _PM_haveCauseWay = -1;
-
-/* Memory mapping cache */
-
-#define MAX_MEMORY_MAPPINGS 100
-typedef struct {
- ulong physical;
- ulong linear;
- ulong limit;
- } mmapping;
-static mmapping maps[MAX_MEMORY_MAPPINGS] = {0};
-static int numMaps = 0;
-
-/* Page sized block cache */
-
-#define PAGES_PER_BLOCK 100
-#define FREELIST_NEXT(p) (*(void**)(p))
-typedef struct pageblock {
- struct pageblock *next;
- struct pageblock *prev;
- void *freeListStart;
- void *freeList;
- void *freeListEnd;
- int freeCount;
- } pageblock;
-static pageblock *pageBlocks = NULL;
-#endif
-
-/* Start of all page tables in CauseWay */
-
-#define CW_PAGE_TABLE_START (1024UL*4096UL*1023UL)
-
-/*----------------------------- Implementation ----------------------------*/
-
-/* External assembler functions */
-
-ulong _ASMAPI _PM_getPDB(void);
-int _ASMAPI _PM_pagingEnabled(void);
-void _ASMAPI _PM_VxDCall(VXD_regs *regs,uint off,uint sel);
-
-#ifndef REALMODE
-/****************************************************************************
-REMARKS:
-Exit function to unload the dynamically loaded VxD
-****************************************************************************/
-static void UnloadVxD(void)
-{
- PMSREGS sregs;
- VXD_regs r;
-
- r.eax = 2;
- r.ebx = 0;
- r.edx = (uint)VXD_module;
- PM_segread(&sregs);
-#ifdef __16BIT__
- r.ds = ((ulong)VXD_module) >> 16;
-#else
- r.ds = sregs.ds;
-#endif
- r.es = sregs.es;
- _PM_VxDCall(&r,VXD_loadOff,VXD_loadSel);
-}
-
-/****************************************************************************
-REMARKS:
-External function to call the PMHELP helper VxD.
-****************************************************************************/
-void PMAPI PM_VxDCall(
- VXD_regs *regs)
-{
- if (_PM_VXD_sel != 0 || _PM_VXD_off != 0)
- _PM_VxDCall(regs,_PM_VXD_off,_PM_VXD_sel);
-}
-
-/****************************************************************************
-RETURNS:
-BCD coded version number of the VxD, or 0 if not loaded (ie: 0x202 - 2.2)
-
-REMARKS:
-This function gets the version number for the VxD that we have connected to.
-****************************************************************************/
-uint PMAPI PMHELP_getVersion(void)
-{
- VXD_regs r;
-
- /* Call the helper VxD to determine the version number */
- if (_PM_VXD_sel != 0 || _PM_VXD_off != 0) {
- memset(&r,0,sizeof(r));
- r.eax = API_NUM(PMHELP_GETVER);
- _PM_VxDCall(&r,_PM_VXD_off,_PM_VXD_sel);
- return VXD_version = (uint)r.eax;
- }
- return VXD_version = 0;
-}
-
-/****************************************************************************
-DESCRIPTION:
-Connects to the helper VxD and returns the version number
-
-RETURNS:
-True if the VxD was found and loaded, false otherwise.
-
-REMARKS:
-This function connects to the VxD (loading it if it is dynamically loadable)
-and returns the version number of the VxD.
-****************************************************************************/
-static ibool PMHELP_connect(void)
-{
- PMREGS regs;
- PMSREGS sregs;
- VXD_regs r;
-
- /* Bail early if we have alread connected */
- if (VXD_version != -1)
- return VXD_version != 0;
-
- /* Get the static SDDHELP.VXD entry point if available */
- PM_segread(&sregs);
- regs.x.ax = 0x1684;
- regs.x.bx = SDDHELP_DeviceID;
- regs.x.di = 0;
- sregs.es = 0;
- PM_int386x(0x2F,&regs,&regs,&sregs);
- _PM_VXD_sel = sregs.es;
- _PM_VXD_off = regs.x.di;
- if (_PM_VXD_sel != 0 || _PM_VXD_off != 0) {
- if (PMHELP_getVersion() >= PMHELP_VERSION)
- return true;
- }
-
- /* If we get here, then either SDDHELP.VXD is not loaded, or it is an
- * earlier version. In this case try to dynamically load the PMHELP.VXD
- * helper VxD instead.
- */
- PM_segread(&sregs);
- regs.x.ax = 0x1684;
- regs.x.bx = VXDLDR_DeviceID;
- regs.x.di = 0;
- sregs.es = 0;
- PM_int386x(0x2F,&regs,&regs,&sregs);
- VXD_loadSel = sregs.es;
- VXD_loadOff = regs.x.di;
- if (VXD_loadSel == 0 && VXD_loadOff == 0)
- return VXD_version = 0;
- r.eax = 1;
- r.ebx = 0;
- r.edx = (uint)VXD_name;
- PM_segread(&sregs);
- r.ds = sregs.ds;
- r.es = sregs.es;
- _PM_VxDCall(&r,VXD_loadOff,VXD_loadSel);
- if (r.eax != 0)
- return VXD_version = 0;
-
- /* Get the dynamic VxD entry point so we can call it */
- atexit(UnloadVxD);
- PM_segread(&sregs);
- regs.x.ax = 0x1684;
- regs.x.bx = 0;
- regs.e.edi = (uint)VXD_DDBName;
- PM_int386x(0x2F,&regs,&regs,&sregs);
- _PM_VXD_sel = sregs.es;
- _PM_VXD_off = regs.x.di;
- if (_PM_VXD_sel == 0 && _PM_VXD_off == 0)
- return VXD_version = 0;
- if (PMHELP_getVersion() >= PMHELP_VERSION)
- return true;
- return VXD_version = 0;
-}
-#endif
-
-/****************************************************************************
-REMARKS:
-Initialise the PM library. First we try to connect to a static SDDHELP.VXD
-helper VxD, and check that it is a version we can use. If not we try to
-dynamically load the PMHELP.VXD helper VxD
-****************************************************************************/
-void PMAPI PM_init(void)
-{
-#ifndef REALMODE
- PMREGS regs;
-
- /* Check if we are running under CauseWay under real DOS */
- if (_PM_haveCauseWay == -1) {
- /* Check if we are running under DPMI in which case we will not be
- * able to use our special ring 0 CauseWay functions.
- */
- _PM_haveCauseWay = false;
- regs.x.ax = 0xFF00;
- PM_int386(0x31,&regs,&regs);
- if (regs.x.cflag || !(regs.e.edi & 8)) {
- /* We are not under DPMI, so now check if CauseWay is active */
- regs.x.ax = 0xFFF9;
- PM_int386(0x31,&regs,&regs);
- if (!regs.x.cflag && regs.e.ecx == 0x43415553 && regs.e.edx == 0x45574159)
- _PM_haveCauseWay = true;
- }
-
- /* Now connect to PMHELP.VXD and initialise MTRR module */
- if (!PMHELP_connect())
- MTRR_init();
- }
-#endif
-}
-
-/****************************************************************************
-PARAMETERS:
-base - The starting physical base address of the region
-size - The size in bytes of the region
-type - Type to place into the MTRR register
-
-RETURNS:
-Error code describing the result.
-
-REMARKS:
-Function to enable write combining for the specified region of memory.
-****************************************************************************/
-int PMAPI PM_enableWriteCombine(
- ulong base,
- ulong size,
- uint type)
-{
-#ifndef REALMODE
- VXD_regs regs;
-
- if (PMHELP_connect()) {
- memset(&regs,0,sizeof(regs));
- regs.eax = API_NUM(PMHELP_ENABLELFBCOMB);
- regs.ebx = base;
- regs.ecx = size;
- regs.edx = type;
- _PM_VxDCall(&regs,_PM_VXD_off,_PM_VXD_sel);
- return regs.eax;
- }
- return MTRR_enableWriteCombine(base,size,type);
-#else
- return PM_MTRR_NOT_SUPPORTED;
-#endif
-}
-
-ibool PMAPI PM_haveBIOSAccess(void)
-{ return true; }
-
-long PMAPI PM_getOSType(void)
-{ return _OS_DOS; }
-
-int PMAPI PM_getModeType(void)
-{
-#if defined(REALMODE)
- return PM_realMode;
-#elif defined(PM286)
- return PM_286;
-#elif defined(PM386)
- return PM_386;
-#endif
-}
-
-void PMAPI PM_backslash(char *s)
-{
- uint pos = strlen(s);
- if (s[pos-1] != '\\') {
- s[pos] = '\\';
- s[pos+1] = '\0';
- }
-}
-
-void PMAPI PM_setFatalErrorCleanup(
- void (PMAPIP cleanup)(void))
-{
- fatalErrorCleanup = cleanup;
-}
-
-void PMAPI PM_fatalError(const char *msg)
-{
- if (fatalErrorCleanup)
- fatalErrorCleanup();
- fprintf(stderr,"%s\n", msg);
- exit(1);
-}
-
-static void ExitVBEBuf(void)
-{
- if (VESABuf_ptr)
- PM_freeRealSeg(VESABuf_ptr);
- VESABuf_ptr = 0;
-}
-
-void * PMAPI PM_getVESABuf(uint *len,uint *rseg,uint *roff)
-{
- if (!VESABuf_ptr) {
- /* Allocate a global buffer for communicating with the VESA VBE */
- if ((VESABuf_ptr = PM_allocRealSeg(VESABuf_len, &VESABuf_rseg, &VESABuf_roff)) == NULL)
- return NULL;
- atexit(ExitVBEBuf);
- }
- *len = VESABuf_len;
- *rseg = VESABuf_rseg;
- *roff = VESABuf_roff;
- return VESABuf_ptr;
-}
-
-int PMAPI PM_int386(int intno, PMREGS *in, PMREGS *out)
-{
- PMSREGS sregs;
- PM_segread(&sregs);
- return PM_int386x(intno,in,out,&sregs);
-}
-
-/* Routines to set and get the real mode interrupt vectors, by making
- * direct real mode calls to DOS and bypassing the DOS extenders API.
- * This is the safest way to handle this, as some servers try to be
- * smart about changing real mode vectors.
- */
-
-void PMAPI _PM_getRMvect(int intno, long *realisr)
-{
- RMREGS regs;
- RMSREGS sregs;
-
- PM_saveDS();
- regs.h.ah = 0x35;
- regs.h.al = intno;
- PM_int86x(0x21, &regs, &regs, &sregs);
- *realisr = ((long)sregs.es << 16) | regs.x.bx;
-}
-
-void PMAPI _PM_setRMvect(int intno, long realisr)
-{
- RMREGS regs;
- RMSREGS sregs;
-
- PM_saveDS();
- regs.h.ah = 0x25;
- regs.h.al = intno;
- sregs.ds = (int)(realisr >> 16);
- regs.x.dx = (int)(realisr & 0xFFFF);
- PM_int86x(0x21, &regs, &regs, &sregs);
-}
-
-void PMAPI _PM_addRealModeBlock(void *mem,uint tag)
-{
- int i;
-
- for (i = 0; i < MAX_RM_BLOCKS; i++) {
- if (rmBlocks[i].p == NULL) {
- rmBlocks[i].p = mem;
- rmBlocks[i].tag = tag;
- return;
- }
- }
- PM_fatalError("To many real mode memory block allocations!");
-}
-
-uint PMAPI _PM_findRealModeBlock(void *mem)
-{
- int i;
-
- for (i = 0; i < MAX_RM_BLOCKS; i++) {
- if (rmBlocks[i].p == mem)
- return rmBlocks[i].tag;
- }
- PM_fatalError("Could not find prior real mode memory block allocation!");
- return 0;
-}
-
-char * PMAPI PM_getCurrentPath(
- char *path,
- int maxLen)
-{
- return getcwd(path,maxLen);
-}
-
-char PMAPI PM_getBootDrive(void)
-{ return 'C'; }
-
-const char * PMAPI PM_getVBEAFPath(void)
-{ return "c:\\"; }
-
-const char * PMAPI PM_getNucleusPath(void)
-{
- static char path[256];
- char *env;
-
- if ((env = getenv("NUCLEUS_PATH")) != NULL)
- return env;
- if ((env = getenv("WINBOOTDIR")) != NULL) {
- /* Running in a Windows 9x DOS box or DOS mode */
- strcpy(path,env);
- strcat(path,"\\system\\nucleus");
- return path;
- }
- if ((env = getenv("SystemRoot")) != NULL) {
- /* Running in an NT/2K DOS box */
- strcpy(path,env);
- strcat(path,"\\system32\\nucleus");
- return path;
- }
- return "c:\\nucleus";
-}
-
-const char * PMAPI PM_getNucleusConfigPath(void)
-{
- static char path[256];
- strcpy(path,PM_getNucleusPath());
- PM_backslash(path);
- strcat(path,"config");
- return path;
-}
-
-const char * PMAPI PM_getUniqueID(void)
-{ return "DOS"; }
-
-const char * PMAPI PM_getMachineName(void)
-{ return "DOS"; }
-
-int PMAPI PM_kbhit(void)
-{
- return kbhit();
-}
-
-int PMAPI PM_getch(void)
-{
- return getch();
-}
-
-PM_HWND PMAPI PM_openConsole(PM_HWND hwndUser,int device,int xRes,int yRes,int bpp,ibool fullScreen)
-{
- /* Not used for DOS */
- (void)hwndUser;
- (void)device;
- (void)xRes;
- (void)yRes;
- (void)bpp;
- (void)fullScreen;
- return 0;
-}
-
-int PMAPI PM_getConsoleStateSize(void)
-{
- return sizeof(DOS_stateBuf);
-}
-
-void PMAPI PM_saveConsoleState(void *stateBuf,PM_HWND hwndConsole)
-{
- RMREGS regs;
- DOS_stateBuf *sb = stateBuf;
-
- /* Save the old video mode state */
- regs.h.ah = 0x0F;
- PM_int86(0x10,&regs,&regs);
- sb->oldMode = regs.h.al & 0x7F;
- sb->old50Lines = false;
- if (sb->oldMode == 0x3) {
- regs.x.ax = 0x1130;
- regs.x.bx = 0;
- regs.x.dx = 0;
- PM_int86(0x10,&regs,&regs);
- sb->old50Lines = (regs.h.dl == 42 || regs.h.dl == 49);
- }
- (void)hwndConsole;
-}
-
-void PMAPI PM_setSuspendAppCallback(int (_ASMAPIP saveState)(int flags))
-{
- /* Not used for DOS */
- (void)saveState;
-}
-
-void PMAPI PM_restoreConsoleState(const void *stateBuf,PM_HWND hwndConsole)
-{
- RMREGS regs;
- const DOS_stateBuf *sb = stateBuf;
-
- /* Retore 50 line mode if set */
- if (sb->old50Lines) {
- regs.x.ax = 0x1112;
- regs.x.bx = 0;
- PM_int86(0x10,&regs,&regs);
- }
- (void)hwndConsole;
-}
-
-void PMAPI PM_closeConsole(PM_HWND hwndConsole)
-{
- /* Not used for DOS */
- (void)hwndConsole;
-}
-
-void PMAPI PM_setOSCursorLocation(int x,int y)
-{
- uchar *_biosPtr = PM_getBIOSPointer();
- PM_setByte(_biosPtr+0x50,x);
- PM_setByte(_biosPtr+0x51,y);
-}
-
-void PMAPI PM_setOSScreenWidth(int width,int height)
-{
- uchar *_biosPtr = PM_getBIOSPointer();
- PM_setWord(_biosPtr+0x4A,width);
- PM_setWord(_biosPtr+0x4C,width*2);
- PM_setByte(_biosPtr+0x84,height-1);
- if (height > 25) {
- PM_setWord(_biosPtr+0x60,0x0607);
- PM_setByte(_biosPtr+0x85,0x08);
- }
- else {
- PM_setWord(_biosPtr+0x60,0x0D0E);
- PM_setByte(_biosPtr+0x85,0x016);
- }
-}
-
-void * PMAPI PM_mallocShared(long size)
-{
- return PM_malloc(size);
-}
-
-void PMAPI PM_freeShared(void *ptr)
-{
- PM_free(ptr);
-}
-
-#define GetRMVect(intno,isr) *(isr) = ((ulong*)rmZeroPtr)[intno]
-#define SetRMVect(intno,isr) ((ulong*)rmZeroPtr)[intno] = (isr)
-
-ibool PMAPI PM_doBIOSPOST(
- ushort axVal,
- ulong BIOSPhysAddr,
- void *mappedBIOS,
- ulong BIOSLen)
-{
- static int firstTime = true;
- static uchar *rmZeroPtr;
- long Current10,Current6D,Current42;
- RMREGS regs;
- RMSREGS sregs;
-
- /* Create a zero memory mapping for us to use */
- if (firstTime) {
- rmZeroPtr = PM_mapPhysicalAddr(0,0x7FFF,true);
- firstTime = false;
- }
-
- /* Remap the secondary BIOS to 0xC0000 physical */
- if (BIOSPhysAddr != 0xC0000L || BIOSLen > 32768) {
- /* DOS cannot virtually remap the BIOS, so we can only work if all
- * the secondary controllers are identical, and we then use the
- * BIOS on the first controller for all the remaining controllers.
- *
- * For OS'es that do virtual memory, and remapping of 0xC0000
- * physical (perhaps a copy on write mapping) should be all that
- * is needed.
- */
- return false;
- }
-
- /* Save current handlers of int 10h and 6Dh */
- GetRMVect(0x10,&Current10);
- GetRMVect(0x6D,&Current6D);
-
- /* POST the secondary BIOS */
- GetRMVect(0x42,&Current42);
- SetRMVect(0x10,Current42); /* Restore int 10h to STD-BIOS */
- regs.x.ax = axVal;
- PM_callRealMode(0xC000,0x0003,&regs,&sregs);
-
- /* Restore current handlers */
- SetRMVect(0x10,Current10);
- SetRMVect(0x6D,Current6D);
-
- /* Second the primary BIOS mappin 1:1 for 0xC0000 physical */
- if (BIOSPhysAddr != 0xC0000L) {
- /* DOS does not support this */
- (void)mappedBIOS;
- }
- return true;
-}
-
-void PMAPI PM_sleep(ulong milliseconds)
-{
- ulong microseconds = milliseconds * 1000L;
- LZTimerObject tm;
-
- LZTimerOnExt(&tm);
- while (LZTimerLapExt(&tm) < microseconds)
- ;
- LZTimerOffExt(&tm);
-}
-
-int PMAPI PM_getCOMPort(int port)
-{
- switch (port) {
- case 0: return 0x3F8;
- case 1: return 0x2F8;
- }
- return 0;
-}
-
-int PMAPI PM_getLPTPort(int port)
-{
- switch (port) {
- case 0: return 0x3BC;
- case 1: return 0x378;
- case 2: return 0x278;
- }
- return 0;
-}
-
-PM_MODULE PMAPI PM_loadLibrary(
- const char *szDLLName)
-{
- (void)szDLLName;
- return NULL;
-}
-
-void * PMAPI PM_getProcAddress(
- PM_MODULE hModule,
- const char *szProcName)
-{
- (void)hModule;
- (void)szProcName;
- return NULL;
-}
-
-void PMAPI PM_freeLibrary(
- PM_MODULE hModule)
-{
- (void)hModule;
-}
-
-int PMAPI PM_setIOPL(
- int level)
-{
- return level;
-}
-
-/****************************************************************************
-REMARKS:
-Internal function to convert the find data to the generic interface.
-****************************************************************************/
-static void convertFindData(
- PM_findData *findData,
- struct find_t *blk)
-{
- ulong dwSize = findData->dwSize;
-
- memset(findData,0,findData->dwSize);
- findData->dwSize = dwSize;
- if (blk->attrib & _A_RDONLY)
- findData->attrib |= PM_FILE_READONLY;
- if (blk->attrib & _A_SUBDIR)
- findData->attrib |= PM_FILE_DIRECTORY;
- if (blk->attrib & _A_ARCH)
- findData->attrib |= PM_FILE_ARCHIVE;
- if (blk->attrib & _A_HIDDEN)
- findData->attrib |= PM_FILE_HIDDEN;
- if (blk->attrib & _A_SYSTEM)
- findData->attrib |= PM_FILE_SYSTEM;
- findData->sizeLo = blk->size;
- strncpy(findData->name,blk->name,PM_MAX_PATH);
- findData->name[PM_MAX_PATH-1] = 0;
-}
-
-#define FIND_MASK (_A_RDONLY | _A_ARCH | _A_SUBDIR | _A_HIDDEN | _A_SYSTEM)
-
-/****************************************************************************
-REMARKS:
-Function to find the first file matching a search criteria in a directory.
-****************************************************************************/
-void * PMAPI PM_findFirstFile(
- const char *filename,
- PM_findData *findData)
-{
- struct find_t *blk;
-
- if ((blk = PM_malloc(sizeof(*blk))) == NULL)
- return PM_FILE_INVALID;
- if (_dos_findfirst((char*)filename,FIND_MASK,blk) == 0) {
- convertFindData(findData,blk);
- return blk;
- }
- return PM_FILE_INVALID;
-}
-
-/****************************************************************************
-REMARKS:
-Function to find the next file matching a search criteria in a directory.
-****************************************************************************/
-ibool PMAPI PM_findNextFile(
- void *handle,
- PM_findData *findData)
-{
- struct find_t *blk = handle;
-
- if (_dos_findnext(blk) == 0) {
- convertFindData(findData,blk);
- return true;
- }
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Function to close the find process
-****************************************************************************/
-void PMAPI PM_findClose(
- void *handle)
-{
- PM_free(handle);
-}
-
-/****************************************************************************
-REMARKS:
-Function to determine if a drive is a valid drive or not. Under Unix this
-function will return false for anything except a value of 3 (considered
-the root drive, and equivalent to C: for non-Unix systems). The drive
-numbering is:
-
- 1 - Drive A:
- 2 - Drive B:
- 3 - Drive C:
- etc
-
-****************************************************************************/
-ibool PMAPI PM_driveValid(
- char drive)
-{
- RMREGS regs;
- regs.h.dl = (uchar)(drive - 'A' + 1);
- regs.h.ah = 0x36; /* Get disk information service */
- PM_int86(0x21,&regs,&regs);
- return regs.x.ax != 0xFFFF; /* AX = 0xFFFF if disk is invalid */
-}
-
-/****************************************************************************
-REMARKS:
-Function to get the current working directory for the specififed drive.
-Under Unix this will always return the current working directory regardless
-of what the value of 'drive' is.
-****************************************************************************/
-void PMAPI PM_getdcwd(
- int drive,
- char *dir,
- int len)
-{
- uint oldDrive,maxDrives;
- _dos_getdrive(&oldDrive);
- _dos_setdrive(drive,&maxDrives);
- getcwd(dir,len);
- _dos_setdrive(oldDrive,&maxDrives);
-}
-
-/****************************************************************************
-REMARKS:
-Function to change the file attributes for a specific file.
-****************************************************************************/
-void PMAPI PM_setFileAttr(
- const char *filename,
- uint attrib)
-{
-#if defined(TNT) && defined(_MSC_VER)
- DWORD attr = 0;
-
- if (attrib & PM_FILE_READONLY)
- attr |= FILE_ATTRIBUTE_READONLY;
- if (attrib & PM_FILE_ARCHIVE)
- attr |= FILE_ATTRIBUTE_ARCHIVE;
- if (attrib & PM_FILE_HIDDEN)
- attr |= FILE_ATTRIBUTE_HIDDEN;
- if (attrib & PM_FILE_SYSTEM)
- attr |= FILE_ATTRIBUTE_SYSTEM;
- SetFileAttributes((LPSTR)filename, attr);
-#else
- uint attr = 0;
-
- if (attrib & PM_FILE_READONLY)
- attr |= _A_RDONLY;
- if (attrib & PM_FILE_ARCHIVE)
- attr |= _A_ARCH;
- if (attrib & PM_FILE_HIDDEN)
- attr |= _A_HIDDEN;
- if (attrib & PM_FILE_SYSTEM)
- attr |= _A_SYSTEM;
- _dos_setfileattr(filename,attr);
-#endif
-}
-
-/****************************************************************************
-REMARKS:
-Function to create a directory.
-****************************************************************************/
-ibool PMAPI PM_mkdir(
- const char *filename)
-{
-#ifdef __GNUC__
- return mkdir(filename,S_IRUSR) == 0;
-#else
- return mkdir(filename) == 0;
-#endif
-}
-
-/****************************************************************************
-REMARKS:
-Function to remove a directory.
-****************************************************************************/
-ibool PMAPI PM_rmdir(
- const char *filename)
-{
- return rmdir(filename) == 0;
-}
-
-/*-------------------------------------------------------------------------*/
-/* Generic DPMI routines common to 16/32 bit code */
-/*-------------------------------------------------------------------------*/
-
-#ifndef REALMODE
-ulong PMAPI DPMI_mapPhysicalToLinear(ulong physAddr,ulong limit)
-{
- PMREGS r;
- int i;
- ulong baseAddr,baseOfs,roundedLimit;
-
- /* We can't map memory below 1Mb, but the linear address are already
- * mapped 1:1 for this memory anyway so we just return the base address.
- */
- if (physAddr < 0x100000L)
- return physAddr;
-
- /* Search table of existing mappings to see if we have already mapped
- * a region of memory that will serve this purpose. We do this because
- * DPMI 0.9 does not allow us to free physical memory mappings, and if
- * the mappings get re-used in the program we want to avoid allocating
- * more mappings than necessary.
- */
- for (i = 0; i < numMaps; i++) {
- if (maps[i].physical == physAddr && maps[i].limit == limit)
- return maps[i].linear;
- }
-
- /* Find a free slot in our physical memory mapping table */
- for (i = 0; i < numMaps; i++) {
- if (maps[i].limit == 0)
- break;
- }
- if (i == numMaps) {
- i = numMaps++;
- if (i == MAX_MEMORY_MAPPINGS)
- return NULL;
- }
-
- /* Round the physical address to a 4Kb boundary and the limit to a
- * 4Kb-1 boundary before passing the values to DPMI as some extenders
- * will fail the calls unless this is the case. If we round the
- * physical address, then we also add an extra offset into the address
- * that we return.
- */
- baseOfs = physAddr & 4095;
- baseAddr = physAddr & ~4095;
- roundedLimit = ((limit+baseOfs+1+4095) & ~4095)-1;
- r.x.ax = 0x800;
- r.x.bx = baseAddr >> 16;
- r.x.cx = baseAddr & 0xFFFF;
- r.x.si = roundedLimit >> 16;
- r.x.di = roundedLimit & 0xFFFF;
- PM_int386(0x31, &r, &r);
- if (r.x.cflag)
- return 0xFFFFFFFFUL;
- maps[i].physical = physAddr;
- maps[i].limit = limit;
- maps[i].linear = ((ulong)r.x.bx << 16) + r.x.cx + baseOfs;
- return maps[i].linear;
-}
-
-int PMAPI DPMI_setSelectorBase(ushort sel,ulong linAddr)
-{
- PMREGS r;
-
- r.x.ax = 7; /* DPMI set selector base address */
- r.x.bx = sel;
- r.x.cx = linAddr >> 16;
- r.x.dx = linAddr & 0xFFFF;
- PM_int386(0x31, &r, &r);
- if (r.x.cflag)
- return 0;
- return 1;
-}
-
-ulong PMAPI DPMI_getSelectorBase(ushort sel)
-{
- PMREGS r;
-
- r.x.ax = 6; /* DPMI get selector base address */
- r.x.bx = sel;
- PM_int386(0x31, &r, &r);
- return ((ulong)r.x.cx << 16) + r.x.dx;
-}
-
-int PMAPI DPMI_setSelectorLimit(ushort sel,ulong limit)
-{
- PMREGS r;
-
- r.x.ax = 8; /* DPMI set selector limit */
- r.x.bx = sel;
- r.x.cx = limit >> 16;
- r.x.dx = limit & 0xFFFF;
- PM_int386(0x31, &r, &r);
- if (r.x.cflag)
- return 0;
- return 1;
-}
-
-uint PMAPI DPMI_createSelector(ulong base,ulong limit)
-{
- uint sel;
- PMREGS r;
-
- /* Allocate 1 descriptor */
- r.x.ax = 0;
- r.x.cx = 1;
- PM_int386(0x31, &r, &r);
- if (r.x.cflag) return 0;
- sel = r.x.ax;
-
- /* Set the descriptor access rights (for a 32 bit page granular
- * segment).
- */
- if (limit >= 0x10000L) {
- r.x.ax = 9;
- r.x.bx = sel;
- r.x.cx = 0x40F3;
- PM_int386(0x31, &r, &r);
- }
-
- /* Map physical memory and create selector */
- if ((base = DPMI_mapPhysicalToLinear(base,limit)) == 0xFFFFFFFFUL)
- return 0;
- if (!DPMI_setSelectorBase(sel,base))
- return 0;
- if (!DPMI_setSelectorLimit(sel,limit))
- return 0;
- return sel;
-}
-
-void PMAPI DPMI_freeSelector(uint sel)
-{
- PMREGS r;
-
- r.x.ax = 1;
- r.x.bx = sel;
- PM_int386(0x31, &r, &r);
-}
-
-int PMAPI DPMI_lockLinearPages(ulong linear,ulong len)
-{
- PMREGS r;
-
- r.x.ax = 0x600; /* DPMI Lock Linear Region */
- r.x.bx = (linear >> 16); /* Linear address in BX:CX */
- r.x.cx = (linear & 0xFFFF);
- r.x.si = (len >> 16); /* Length in SI:DI */
- r.x.di = (len & 0xFFFF);
- PM_int386(0x31, &r, &r);
- return (!r.x.cflag);
-}
-
-int PMAPI DPMI_unlockLinearPages(ulong linear,ulong len)
-{
- PMREGS r;
-
- r.x.ax = 0x601; /* DPMI Unlock Linear Region */
- r.x.bx = (linear >> 16); /* Linear address in BX:CX */
- r.x.cx = (linear & 0xFFFF);
- r.x.si = (len >> 16); /* Length in SI:DI */
- r.x.di = (len & 0xFFFF);
- PM_int386(0x31, &r, &r);
- return (!r.x.cflag);
-}
-
-/****************************************************************************
-REMARKS:
-Adjust the page table caching bits directly. Requires ring 0 access and
-only works with DOS4GW and compatible extenders (CauseWay also works since
-it has direct support for the ring 0 instructions we need from ring 3). Will
-not work in a DOS box, but we call into the ring 0 helper VxD so we should
-never get here in a DOS box anyway (assuming the VxD is present). If we
-do get here and we are in windows, this code will be skipped.
-****************************************************************************/
-static void PM_adjustPageTables(
- ulong linear,
- ulong limit,
- ibool isCached)
-{
-#ifdef DOS4GW
- int startPDB,endPDB,iPDB,startPage,endPage,start,end,iPage;
- ulong andMask,orMask,pageTable,*pPageTable;
-
- andMask = ~0x18;
- orMask = (isCached) ? 0x00 : 0x18;
- if (_PM_pagingEnabled() == 1 && (PDB = _PM_getPDB()) != 0) {
- if (_PM_haveCauseWay) {
- /* CauseWay is a little different in the page table handling.
- * The code that we use for DOS4G/W does not appear to work
- * with CauseWay correctly as it does not appear to allow us
- * to map the page tables directly. Instead we can directly
- * access the page table entries in extended memory where
- * CauseWay always locates them (starting at 1024*4096*1023)
- */
- startPage = (linear >> 12);
- endPage = ((linear+limit) >> 12);
- pPageTable = (ulong*)CW_PAGE_TABLE_START;
- for (iPage = startPage; iPage <= endPage; iPage++)
- pPageTable[iPage] = (pPageTable[iPage] & andMask) | orMask;
- }
- else {
- pPDB = (ulong*)DPMI_mapPhysicalToLinear(PDB,0xFFF);
- if (pPDB) {
- startPDB = (linear >> 22) & 0x3FF;
- startPage = (linear >> 12) & 0x3FF;
- endPDB = ((linear+limit) >> 22) & 0x3FF;
- endPage = ((linear+limit) >> 12) & 0x3FF;
- for (iPDB = startPDB; iPDB <= endPDB; iPDB++) {
- pageTable = pPDB[iPDB] & ~0xFFF;
- pPageTable = (ulong*)DPMI_mapPhysicalToLinear(pageTable,0xFFF);
- start = (iPDB == startPDB) ? startPage : 0;
- end = (iPDB == endPDB) ? endPage : 0x3FF;
- for (iPage = start; iPage <= end; iPage++)
- pPageTable[iPage] = (pPageTable[iPage] & andMask) | orMask;
- }
- }
- }
- PM_flushTLB();
- }
-#endif
-}
-
-void * PMAPI DPMI_mapPhysicalAddr(ulong base,ulong limit,ibool isCached)
-{
- PMSREGS sregs;
- ulong linAddr;
- ulong DSBaseAddr;
-
- /* Get the base address for the default DS selector */
- PM_segread(&sregs);
- DSBaseAddr = DPMI_getSelectorBase(sregs.ds);
- if ((base < 0x100000) && (DSBaseAddr == 0)) {
- /* DS is zero based, so we can directly access the first 1Mb of
- * system memory (like under DOS4GW).
- */
- return (void*)base;
- }
-
- /* Map the memory to a linear address using DPMI function 0x800 */
- if ((linAddr = DPMI_mapPhysicalToLinear(base,limit)) == 0xFFFFFFFF) {
- if (base >= 0x100000)
- return NULL;
- /* If the linear address mapping fails but we are trying to
- * map an area in the first 1Mb of system memory, then we must
- * be running under a Windows or OS/2 DOS box. Under these
- * environments we can use the segment wrap around as a fallback
- * measure, as this does work properly.
- */
- linAddr = base;
- }
-
- /* Now expand the default DS selector to 4Gb so we can access it */
- if (!DPMI_setSelectorLimit(sregs.ds,0xFFFFFFFFUL))
- return NULL;
-
- /* Finally enable caching for the page tables that we just mapped in,
- * since DOS4GW and PMODE/W create the page table entries without
- * caching enabled which hurts the performance of the linear framebuffer
- * as it disables write combining on Pentium Pro and above processors.
- *
- * For those processors cache disabling is better handled through the
- * MTRR registers anyway (we can write combine a region but disable
- * caching) so that MMIO register regions do not screw up.
- */
- if (DSBaseAddr == 0)
- PM_adjustPageTables(linAddr,limit,isCached);
-
- /* Now return the base address of the memory into the default DS */
- return (void*)(linAddr - DSBaseAddr);
-}
-
-#if defined(PM386)
-
-/* Some DOS extender implementations do not directly support calling a
- * real mode procedure from protected mode. However we can simulate what
- * we need temporarily hooking the INT 6Ah vector with a small real mode
- * stub that will call our real mode code for us.
- */
-
-static uchar int6AHandler[] = {
- 0x00,0x00,0x00,0x00, /* __PMODE_callReal variable */
- 0xFB, /* sti */
- 0x2E,0xFF,0x1E,0x00,0x00, /* call [cs:__PMODE_callReal] */
- 0xCF, /* iretf */
- };
-static uchar *crPtr = NULL; /* Pointer to of int 6A handler */
-static uint crRSeg,crROff; /* Real mode seg:offset of handler */
-
-void PMAPI PM_callRealMode(uint seg,uint off, RMREGS *in,
- RMSREGS *sregs)
-{
- uchar *p;
- uint oldSeg,oldOff;
-
- if (!crPtr) {
- /* Allocate and copy the memory block only once */
- crPtr = PM_allocRealSeg(sizeof(int6AHandler), &crRSeg, &crROff);
- memcpy(crPtr,int6AHandler,sizeof(int6AHandler));
- }
- PM_setWord(crPtr,off); /* Plug in address to call */
- PM_setWord(crPtr+2,seg);
- p = PM_mapRealPointer(0,0x6A * 4);
- oldOff = PM_getWord(p); /* Save old handler address */
- oldSeg = PM_getWord(p+2);
- PM_setWord(p,crROff+4); /* Hook 6A handler */
- PM_setWord(p+2,crRSeg);
- PM_int86x(0x6A, in, in, sregs); /* Call real mode code */
- PM_setWord(p,oldOff); /* Restore old handler */
- PM_setWord(p+2,oldSeg);
-}
-
-#endif /* PM386 */
-
-#endif /* !REALMODE */
-
-/****************************************************************************
-REMARKS:
-Allocates a block of locked, physically contiguous memory. The memory
-may be required to be below the 16Meg boundary.
-****************************************************************************/
-void * PMAPI PM_allocLockedMem(
- uint size,
- ulong *physAddr,
- ibool contiguous,
- ibool below16Meg)
-{
- uchar *p,*roundedP;
- uint r_seg,r_off;
- uint roundedSize = (size + 4 + 0xFFF) & ~0xFFF;
- PM_lockHandle lh; /* Unused in DOS */
-#ifndef REALMODE
- VXD_regs regs;
-
- /* If we have connected to our helper VxD in a Windows DOS box, use the
- * helper VxD services to allocate the memory that we need.
- */
- if (VXD_version) {
- memset(&regs,0,sizeof(regs));
- regs.eax = API_NUM(PMHELP_ALLOCLOCKED);
- regs.ebx = size;
- regs.ecx = (ulong)physAddr;
- regs.edx = contiguous | (below16Meg << 8);
- _PM_VxDCall(&regs,_PM_VXD_off,_PM_VXD_sel);
- return (void*)regs.eax;
- }
-
- /* If the memory is not contiguous, we simply need to allocate it
- * using regular memory allocation services, and lock it down
- * in memory.
- *
- * For contiguous memory blocks, the only way to guarantee contiguous physical
- * memory addresses under DOS is to allocate the memory below the
- * 1Meg boundary as real mode memory.
- *
- * Note that we must page align the memory block, and we also must
- * keep track of the non-aligned pointer so we can properly free
- * it later. Hence we actually allocate 4 bytes more than the
- * size rounded up to the next 4K boundary.
- */
- if (!contiguous)
- p = PM_malloc(roundedSize);
- else
-#endif
- p = PM_allocRealSeg(roundedSize,&r_seg,&r_off);
- if (p == NULL)
- return NULL;
- roundedP = (void*)(((ulong)p + 0xFFF) & ~0xFFF);
- *((ulong*)(roundedP + size)) = (ulong)p;
- PM_lockDataPages(roundedP,size,&lh);
- if ((*physAddr = PM_getPhysicalAddr(roundedP)) == 0xFFFFFFFF) {
- PM_freeLockedMem(roundedP,size,contiguous);
- return NULL;
- }
-
- /* Disable caching for the memory since it is probably a DMA buffer */
-#ifndef REALMODE
- PM_adjustPageTables((ulong)roundedP,size-1,false);
-#endif
- return roundedP;
-}
-
-/****************************************************************************
-REMARKS:
-Free a block of locked memory.
-****************************************************************************/
-void PMAPI PM_freeLockedMem(void *p,uint size,ibool contiguous)
-{
-#ifndef REALMODE
- VXD_regs regs;
- PM_lockHandle lh; /* Unused in DOS */
-
- if (!p)
- return;
- if (VXD_version) {
- memset(&regs,0,sizeof(regs));
- regs.eax = API_NUM(PMHELP_FREELOCKED);
- regs.ebx = (ulong)p;
- regs.ecx = size;
- regs.edx = contiguous;
- _PM_VxDCall(&regs,_PM_VXD_off,_PM_VXD_sel);
- return;
- }
- PM_unlockDataPages(p,size,&lh);
- if (!contiguous)
- free(*((void**)((uchar*)p + size)));
- else
-#endif
- PM_freeRealSeg(*((void**)((char*)p + size)));
-}
-
-#ifndef REALMODE
-/****************************************************************************
-REMARKS:
-Allocates a new block of pages for the page block manager.
-****************************************************************************/
-static pageblock *PM_addNewPageBlock(void)
-{
- int i,size;
- pageblock *newBlock;
- char *p,*next;
-
- /* Allocate memory for the new page block, and add to head of list */
- size = PAGES_PER_BLOCK * PM_PAGE_SIZE + (PM_PAGE_SIZE-1) + sizeof(pageblock);
- if ((newBlock = PM_malloc(size)) == NULL)
- return NULL;
- newBlock->prev = NULL;
- newBlock->next = pageBlocks;
- if (pageBlocks)
- pageBlocks->prev = newBlock;
- pageBlocks = newBlock;
-
- /* Initialise the page aligned free list for the page block */
- newBlock->freeCount = PAGES_PER_BLOCK;
- newBlock->freeList = p = (char*)(((ulong)(newBlock + 1) + (PM_PAGE_SIZE-1)) & ~(PM_PAGE_SIZE-1));
- newBlock->freeListStart = newBlock->freeList;
- newBlock->freeListEnd = p + (PAGES_PER_BLOCK-1) * PM_PAGE_SIZE;
- for (i = 0; i < PAGES_PER_BLOCK; i++,p = next)
- FREELIST_NEXT(p) = next = p + PM_PAGE_SIZE;
- FREELIST_NEXT(p - PM_PAGE_SIZE) = NULL;
- return newBlock;
-}
-#endif
-
-/****************************************************************************
-REMARKS:
-Allocates a page aligned and page sized block of memory
-****************************************************************************/
-void * PMAPI PM_allocPage(
- ibool locked)
-{
-#ifndef REALMODE
- VXD_regs regs;
- pageblock *block;
- void *p;
- PM_lockHandle lh; /* Unused in DOS */
-
- /* Call the helper VxD for this service if we are running in a DOS box */
- if (VXD_version) {
- memset(&regs,0,sizeof(regs));
- regs.eax = API_NUM(PMHELP_ALLOCPAGE);
- regs.ebx = locked;
- _PM_VxDCall(&regs,_PM_VXD_off,_PM_VXD_sel);
- return (void*)regs.eax;
- }
-
- /* Scan the block list looking for any free blocks. Allocate a new
- * page block if no free blocks are found.
- */
- for (block = pageBlocks; block != NULL; block = block->next) {
- if (block->freeCount)
- break;
- }
- if (block == NULL && (block = PM_addNewPageBlock()) == NULL)
- return NULL;
- block->freeCount--;
- p = block->freeList;
- block->freeList = FREELIST_NEXT(p);
- if (locked)
- PM_lockDataPages(p,PM_PAGE_SIZE,&lh);
- return p;
-#else
- return NULL;
-#endif
-}
-
-/****************************************************************************
-REMARKS:
-Free a page aligned and page sized block of memory
-****************************************************************************/
-void PMAPI PM_freePage(
- void *p)
-{
-#ifndef REALMODE
- VXD_regs regs;
- pageblock *block;
-
- /* Call the helper VxD for this service if we are running in a DOS box */
- if (VXD_version) {
- memset(&regs,0,sizeof(regs));
- regs.eax = API_NUM(PMHELP_FREEPAGE);
- regs.ebx = (ulong)p;
- _PM_VxDCall(&regs,_PM_VXD_off,_PM_VXD_sel);
- return;
- }
-
- /* First find the page block that this page belongs to */
- for (block = pageBlocks; block != NULL; block = block->next) {
- if (p >= block->freeListStart && p <= block->freeListEnd)
- break;
- }
- CHECK(block != NULL);
-
- /* Now free the block by adding it to the free list */
- FREELIST_NEXT(p) = block->freeList;
- block->freeList = p;
- if (++block->freeCount == PAGES_PER_BLOCK) {
- /* If all pages in the page block are now free, free the entire
- * page block itself.
- */
- if (block == pageBlocks) {
- /* Delete from head */
- pageBlocks = block->next;
- if (block->next)
- block->next->prev = NULL;
- }
- else {
- /* Delete from middle of list */
- CHECK(block->prev != NULL);
- block->prev->next = block->next;
- if (block->next)
- block->next->prev = block->prev;
- }
- PM_free(block);
- }
-#else
- (void)p;
-#endif
-}
-
-/*-------------------------------------------------------------------------*/
-/* DOS Real Mode support. */
-/*-------------------------------------------------------------------------*/
-
-#ifdef REALMODE
-
-#ifndef MK_FP
-#define MK_FP(s,o) ( (void far *)( ((ulong)(s) << 16) + \
- (ulong)(o) ))
-#endif
-
-void * PMAPI PM_mapRealPointer(uint r_seg,uint r_off)
-{ return MK_FP(r_seg,r_off); }
-
-void * PMAPI PM_getBIOSPointer(void)
-{
- return MK_FP(0x40,0);
-}
-
-void * PMAPI PM_getA0000Pointer(void)
-{
- return MK_FP(0xA000,0);
-}
-
-void * PMAPI PM_mapPhysicalAddr(ulong base,ulong limit,ibool isCached)
-{
- uint sel = base >> 4;
- uint off = base & 0xF;
- limit = limit;
- return MK_FP(sel,off);
-}
-
-void PMAPI PM_freePhysicalAddr(void *ptr,ulong limit)
-{ ptr = ptr; }
-
-ulong PMAPI PM_getPhysicalAddr(void *p)
-{
- return ((((ulong)p >> 16) << 4) + (ushort)p);
-}
-
-ibool PMAPI PM_getPhysicalAddrRange(void *p,ulong length,ulong *physAddress)
-{ return false; }
-
-void * PMAPI PM_mapToProcess(void *base,ulong limit)
-{ return (void*)base; }
-
-void * PMAPI PM_allocRealSeg(uint size,uint *r_seg,uint *r_off)
-{
- /* Call malloc() to allocate the memory for us */
- void *p = PM_malloc(size);
- *r_seg = FP_SEG(p);
- *r_off = FP_OFF(p);
- return p;
-}
-
-void PMAPI PM_freeRealSeg(void *mem)
-{
- if (mem) PM_free(mem);
-}
-
-int PMAPI PM_int86(int intno, RMREGS *in, RMREGS *out)
-{
- return PM_int386(intno,in,out);
-}
-
-int PMAPI PM_int86x(int intno, RMREGS *in, RMREGS *out,
- RMSREGS *sregs)
-{
- return PM_int386x(intno,in,out,sregs);
-}
-
-void PMAPI PM_availableMemory(ulong *physical,ulong *total)
-{
- PMREGS regs;
-
- regs.h.ah = 0x48;
- regs.x.bx = 0xFFFF;
- PM_int86(0x21,&regs,&regs);
- *physical = *total = regs.x.bx * 16UL;
-}
-
-#endif
-
-/*-------------------------------------------------------------------------*/
-/* Phar Lap TNT DOS Extender support. */
-/*-------------------------------------------------------------------------*/
-
-#ifdef TNT
-
-#include <pldos32.h>
-#include <pharlap.h>
-#include <hw386.h>
-
-static uchar *zeroPtr = NULL;
-
-void * PMAPI PM_getBIOSPointer(void)
-{
- if (!zeroPtr)
- zeroPtr = PM_mapPhysicalAddr(0,0xFFFFF,true);
- return (void*)(zeroPtr + 0x400);
-}
-
-void * PMAPI PM_getA0000Pointer(void)
-{
- static void *bankPtr;
- if (!bankPtr)
- bankPtr = PM_mapPhysicalAddr(0xA0000,0xFFFF,true);
- return bankPtr;
-}
-
-void * PMAPI PM_mapPhysicalAddr(ulong base,ulong limit,ibool isCached)
-{
- CONFIG_INF config;
- ULONG offset;
- int err;
- ulong baseAddr,baseOfs,newLimit;
- VXD_regs regs;
-
- /* If we have connected to our helper VxD in a Windows DOS box, use
- * the helper VxD services to map memory instead of the DPMI services.
- * We do this because the helper VxD can properly disable caching
- * where necessary, which we can only do directly here if we are
- * running at ring 0 (ie: under real DOS).
- */
- if (VXD_version == -1)
- PM_init();
- if (VXD_version) {
- memset(&regs,0,sizeof(regs));
- regs.eax = API_NUM(PMHELP_MAPPHYS);
- regs.ebx = base;
- regs.ecx = limit;
- regs.edx = isCached;
- _PM_VxDCall(&regs,_PM_VXD_off,_PM_VXD_sel);
- return (void*)regs.eax;
- }
-
- /* Round the physical address to a 4Kb boundary and the limit to a
- * 4Kb-1 boundary before passing the values to TNT. If we round the
- * physical address, then we also add an extra offset into the address
- * that we return.
- */
- baseOfs = base & 4095;
- baseAddr = base & ~4095;
- newLimit = ((limit+baseOfs+1+4095) & ~4095)-1;
- _dx_config_inf(&config, (UCHAR*)&config);
- err = _dx_map_phys(config.c_ds_sel,baseAddr,(newLimit + 4095) / 4096,&offset);
- if (err == 130) {
- /* If the TNT function failed, we are running in a DPMI environment
- * and this function does not work. However we know how to handle
- * DPMI properly, so we use our generic DPMI functions to do
- * what the TNT runtime libraries can't.
- */
- return DPMI_mapPhysicalAddr(base,limit,isCached);
- }
- if (err == 0)
- return (void*)(offset + baseOfs);
- return NULL;
-}
-
-void PMAPI PM_freePhysicalAddr(void *ptr,ulong limit)
-{
-}
-
-ulong PMAPI PM_getPhysicalAddr(void *p)
-{ return 0xFFFFFFFFUL; }
-
-ibool PMAPI PM_getPhysicalAddrRange(void *p,ulong length,ulong *physAddress)
-{ return false; }
-
-void * PMAPI PM_mapToProcess(void *base,ulong limit)
-{ return (void*)base; }
-
-void * PMAPI PM_mapRealPointer(uint r_seg,uint r_off)
-{
- if (!zeroPtr)
- zeroPtr = PM_mapPhysicalAddr(0,0xFFFFF);
- return (void*)(zeroPtr + MK_PHYS(r_seg,r_off));
-}
-
-void * PMAPI PM_allocRealSeg(uint size,uint *r_seg,uint *r_off)
-{
- USHORT addr,t;
- void *p;
-
- if (_dx_real_alloc((size + 0xF) >> 4,&addr,&t) != 0)
- return 0;
- *r_seg = addr; /* Real mode segment address */
- *r_off = 0; /* Real mode segment offset */
- p = PM_mapRealPointer(*r_seg,*r_off);
- _PM_addRealModeBlock(p,addr);
- return p;
-}
-
-void PMAPI PM_freeRealSeg(void *mem)
-{
- if (mem) _dx_real_free(_PM_findRealModeBlock(mem));
-}
-
-#define INDPMI(reg) rmregs.reg = regs->reg
-#define OUTDPMI(reg) regs->reg = rmregs.reg
-
-void PMAPI DPMI_int86(int intno, DPMI_regs *regs)
-{
- SWI_REGS rmregs;
-
- memset(&rmregs, 0, sizeof(rmregs));
- INDPMI(eax); INDPMI(ebx); INDPMI(ecx); INDPMI(edx); INDPMI(esi); INDPMI(edi);
-
- _dx_real_int(intno,&rmregs);
-
- OUTDPMI(eax); OUTDPMI(ebx); OUTDPMI(ecx); OUTDPMI(edx); OUTDPMI(esi); OUTDPMI(edi);
- regs->flags = rmregs.flags;
-}
-
-#define IN(reg) rmregs.reg = in->e.reg
-#define OUT(reg) out->e.reg = rmregs.reg
-
-int PMAPI PM_int86(int intno, RMREGS *in, RMREGS *out)
-{
- SWI_REGS rmregs;
-
- memset(&rmregs, 0, sizeof(rmregs));
- IN(eax); IN(ebx); IN(ecx); IN(edx); IN(esi); IN(edi);
-
- _dx_real_int(intno,&rmregs);
-
- OUT(eax); OUT(ebx); OUT(ecx); OUT(edx); OUT(esi); OUT(edi);
- out->x.cflag = rmregs.flags & 0x1;
- return out->x.ax;
-}
-
-int PMAPI PM_int86x(int intno, RMREGS *in, RMREGS *out,
- RMSREGS *sregs)
-{
- SWI_REGS rmregs;
-
- memset(&rmregs, 0, sizeof(rmregs));
- IN(eax); IN(ebx); IN(ecx); IN(edx); IN(esi); IN(edi);
- rmregs.es = sregs->es;
- rmregs.ds = sregs->ds;
-
- _dx_real_int(intno,&rmregs);
-
- OUT(eax); OUT(ebx); OUT(ecx); OUT(edx); OUT(esi); OUT(edi);
- sregs->es = rmregs.es;
- sregs->cs = rmregs.cs;
- sregs->ss = rmregs.ss;
- sregs->ds = rmregs.ds;
- out->x.cflag = rmregs.flags & 0x1;
- return out->x.ax;
-}
-
-void PMAPI PM_availableMemory(ulong *physical,ulong *total)
-{
- PMREGS r;
- uint data[25];
-
- r.x.ax = 0x2520; /* Get free memory info */
- r.x.bx = 0;
- r.e.edx = (uint)data;
- PM_int386(0x21, &r, &r);
- *physical = data[21] * 4096;
- *total = data[23] * 4096;
-}
-
-#endif
-
-/*-------------------------------------------------------------------------*/
-/* Symantec C++ DOSX and FlashTek X-32/X-32VM support */
-/*-------------------------------------------------------------------------*/
-
-#if defined(DOSX) || defined(X32VM)
-
-#ifdef X32VM
-#include <x32.h>
-
-#define _x386_mk_protected_ptr(p) _x32_mk_protected_ptr((void*)p)
-#define _x386_free_protected_ptr(p) _x32_free_protected_ptr(p)
-#define _x386_zero_base_ptr _x32_zero_base_ptr
-#else
-extern void *_x386_zero_base_ptr;
-#endif
-
-void * PMAPI PM_mapRealPointer(uint r_seg,uint r_off)
-{
- return (void*)((ulong)_x386_zero_base_ptr + MK_PHYS(r_seg,r_off));
-}
-
-void * PMAPI PM_allocRealSeg(uint size,uint *r_seg,uint *r_off)
-{
- PMREGS r;
-
- r.h.ah = 0x48; /* DOS function 48h - allocate mem */
- r.x.bx = (size + 0xF) >> 4; /* Number of paragraphs to allocate */
- PM_int386(0x21, &r, &r); /* Call DOS extender */
- if (r.x.cflag)
- return 0; /* Could not allocate the memory */
- *r_seg = r.e.eax;
- *r_off = 0;
- return PM_mapRealPointer(*r_seg,*r_off);
-}
-
-void PMAPI PM_freeRealSeg(void *mem)
-{
- /* Cannot de-allocate this memory */
- mem = mem;
-}
-
-#pragma pack(1)
-
-typedef struct {
- ushort intno;
- ushort ds;
- ushort es;
- ushort fs;
- ushort gs;
- ulong eax;
- ulong edx;
- } _RMREGS;
-
-#pragma pack()
-
-#define IN(reg) regs.e.reg = in->e.reg
-#define OUT(reg) out->e.reg = regs.e.reg
-
-int PMAPI PM_int86(int intno, RMREGS *in, RMREGS *out)
-{
- _RMREGS rmregs;
- PMREGS regs;
- PMSREGS pmsregs;
-
- rmregs.intno = intno;
- rmregs.eax = in->e.eax;
- rmregs.edx = in->e.edx;
- IN(ebx); IN(ecx); IN(esi); IN(edi);
- regs.x.ax = 0x2511;
- regs.e.edx = (uint)(&rmregs);
- PM_segread(&pmsregs);
- PM_int386x(0x21,&regs,&regs,&pmsregs);
-
- OUT(eax); OUT(ebx); OUT(ecx); OUT(esi); OUT(edi);
- out->x.dx = rmregs.edx;
- out->x.cflag = regs.x.cflag;
- return out->x.ax;
-}
-
-int PMAPI PM_int86x(int intno, RMREGS *in, RMREGS *out, RMSREGS *sregs)
-{
- _RMREGS rmregs;
- PMREGS regs;
- PMSREGS pmsregs;
-
- rmregs.intno = intno;
- rmregs.eax = in->e.eax;
- rmregs.edx = in->e.edx;
- rmregs.es = sregs->es;
- rmregs.ds = sregs->ds;
- IN(ebx); IN(ecx); IN(esi); IN(edi);
- regs.x.ax = 0x2511;
- regs.e.edx = (uint)(&rmregs);
- PM_segread(&pmsregs);
- PM_int386x(0x21,&regs,&regs,&pmsregs);
-
- OUT(eax); OUT(ebx); OUT(ecx); OUT(esi); OUT(edi);
- sregs->es = rmregs.es;
- sregs->ds = rmregs.ds;
- out->x.dx = rmregs.edx;
- out->x.cflag = regs.x.cflag;
- return out->x.ax;
-}
-
-void * PMAPI PM_getBIOSPointer(void)
-{
- return (void*)((ulong)_x386_zero_base_ptr + 0x400);
-}
-
-void * PMAPI PM_getA0000Pointer(void)
-{
- return (void*)((ulong)_x386_zero_base_ptr + 0xA0000);
-}
-
-void * PMAPI PM_mapPhysicalAddr(ulong base,ulong limit,ibool isCached)
-{
- VXD_regs regs;
-
- /* If we have connected to our helper VxD in a Windows DOS box, use
- * the helper VxD services to map memory instead of the DPMI services.
- * We do this because the helper VxD can properly disable caching
- * where necessary, which we can only do directly here if we are
- * running at ring 0 (ie: under real DOS).
- */
- if (VXD_version == -1)
- PM_init();
- if (VXD_version) {
- memset(&regs,0,sizeof(regs));
- regs.eax = API_NUM(PMHELP_MAPPHYS);
- regs.ebx = base;
- regs.ecx = limit;
- regs.edx = isCached;
- _PM_VxDCall(&regs,_PM_VXD_off,_PM_VXD_sel);
- return (void*)regs.eax;
- }
-
- if (base > 0x100000)
- return _x386_map_physical_address((void*)base,limit);
- return (void*)((ulong)_x386_zero_base_ptr + base);
-}
-
-void PMAPI PM_freePhysicalAddr(void *ptr,ulong limit)
-{
- /* Mapping cannot be freed */
-}
-
-ulong PMAPI PM_getPhysicalAddr(void *p)
-{ return 0xFFFFFFFFUL; }
-
-ibool PMAPI PM_getPhysicalAddrRange(void *p,ulong length,ulong *physAddress)
-{ return false; }
-
-void * PMAPI PM_mapToProcess(void *base,ulong limit)
-{ return (void*)base; }
-
-ulong _cdecl _X32_getPhysMem(void);
-
-void PMAPI PM_availableMemory(ulong *physical,ulong *total)
-{
- PMREGS regs;
-
- /* Get total memory available, including virtual memory */
- regs.x.ax = 0x350B;
- PM_int386(0x21,&regs,&regs);
- *total = regs.e.eax;
-
- /* Get physical memory available */
- *physical = _X32_getPhysMem();
- if (*physical > *total)
- *physical = *total;
-}
-
-#endif
-
-/*-------------------------------------------------------------------------*/
-/* Borland's DPMI32, Watcom DOS4GW and DJGPP DPMI support routines */
-/*-------------------------------------------------------------------------*/
-
-#if defined(DPMI32) || defined(DOS4GW) || defined(DJGPP)
-
-void * PMAPI PM_getBIOSPointer(void)
-{
- return PM_mapPhysicalAddr(0x400,0xFFFF,true);
-}
-
-void * PMAPI PM_getA0000Pointer(void)
-{
- return PM_mapPhysicalAddr(0xA0000,0xFFFF,true);
-}
-
-void * PMAPI PM_mapPhysicalAddr(ulong base,ulong limit,ibool isCached)
-{
- VXD_regs regs;
-
-#ifdef DJGPP
- /* Enable near pointers for DJGPP V2 */
- __djgpp_nearptr_enable();
-#endif
- /* If we have connected to our helper VxD in a Windows DOS box, use
- * the helper VxD services to map memory instead of the DPMI services.
- * We do this because the helper VxD can properly disable caching
- * where necessary, which we can only do directly here if we are
- * running at ring 0 (ie: under real DOS).
- */
- if (VXD_version == -1)
- PM_init();
- if (VXD_version) {
- memset(&regs,0,sizeof(regs));
- regs.eax = API_NUM(PMHELP_MAPPHYS);
- regs.ebx = base;
- regs.ecx = limit;
- regs.edx = isCached;
- _PM_VxDCall(&regs,_PM_VXD_off,_PM_VXD_sel);
- return (void*)regs.eax;
- }
- return DPMI_mapPhysicalAddr(base,limit,isCached);
-}
-
-void PMAPI PM_freePhysicalAddr(void *ptr,ulong limit)
-{
- /* Mapping cannot be freed */
- (void)ptr;
- (void)limit;
-}
-
-ulong PMAPI PM_getPhysicalAddr(void *p)
-{
- ulong physAddr;
- if (!PM_getPhysicalAddrRange(p,1,&physAddr))
- return 0xFFFFFFFF;
- return physAddr | ((ulong)p & 0xFFF);
-}
-
-ibool PMAPI PM_getPhysicalAddrRange(
- void *p,
- ulong length,
- ulong *physAddress)
-{
- VXD_regs regs;
- ulong pte;
- PMSREGS sregs;
- ulong DSBaseAddr;
-
- /* If we have connected to our helper VxD in a Windows DOS box, use the
- * helper VxD services to find the physical address of an address.
- */
- if (VXD_version) {
- memset(&regs,0,sizeof(regs));
- regs.eax = API_NUM(PMHELP_GETPHYSICALADDRRANGE);
- regs.ebx = (ulong)p;
- regs.ecx = (ulong)length;
- regs.edx = (ulong)physAddress;
- _PM_VxDCall(&regs,_PM_VXD_off,_PM_VXD_sel);
- return regs.eax;
- }
-
- /* Find base address for default DS selector */
- PM_segread(&sregs);
- DSBaseAddr = DPMI_getSelectorBase(sregs.ds);
-
- /* Otherwise directly access the page tables to determine the
- * physical memory address. Note that we touch the memory before
- * calling, otherwise the memory may not be paged in correctly.
- */
- pte = *((ulong*)p);
-#ifdef DOS4GW
- if (_PM_pagingEnabled() == 0) {
- int count;
- ulong linAddr = (ulong)p;
-
- /* When paging is disabled physical=linear */
- for (count = (length+0xFFF) >> 12; count > 0; count--) {
- *physAddress++ = linAddr;
- linAddr += 4096;
- }
- return true;
- }
- else if ((PDB = _PM_getPDB()) != 0 && DSBaseAddr == 0) {
- int startPDB,endPDB,iPDB,startPage,endPage,start,end,iPage;
- ulong pageTable,*pPageTable,linAddr = (ulong)p;
- ulong limit = length-1;
-
- pPDB = (ulong*)DPMI_mapPhysicalToLinear(PDB,0xFFF);
- if (pPDB) {
- startPDB = (linAddr >> 22) & 0x3FFL;
- startPage = (linAddr >> 12) & 0x3FFL;
- endPDB = ((linAddr+limit) >> 22) & 0x3FFL;
- endPage = ((linAddr+limit) >> 12) & 0x3FFL;
- for (iPDB = startPDB; iPDB <= endPDB; iPDB++) {
- pageTable = pPDB[iPDB] & ~0xFFFL;
- pPageTable = (ulong*)DPMI_mapPhysicalToLinear(pageTable,0xFFF);
- start = (iPDB == startPDB) ? startPage : 0;
- end = (iPDB == endPDB) ? endPage : 0x3FFL;
- for (iPage = start; iPage <= end; iPage++)
- *physAddress++ = (pPageTable[iPage] & ~0xFFF);
- }
- return true;
- }
- }
-#endif
- return false;
-}
-
-void * PMAPI PM_mapToProcess(void *base,ulong limit)
-{
- (void)limit;
- return (void*)base;
-}
-
-void * PMAPI PM_mapRealPointer(uint r_seg,uint r_off)
-{
- static uchar *zeroPtr = NULL;
-
- if (!zeroPtr)
- zeroPtr = PM_mapPhysicalAddr(0,0xFFFFF,true);
- return (void*)(zeroPtr + MK_PHYS(r_seg,r_off));
-}
-
-void * PMAPI PM_allocRealSeg(uint size,uint *r_seg,uint *r_off)
-{
- PMREGS r;
- void *p;
-
- r.x.ax = 0x100; /* DPMI allocate DOS memory */
- r.x.bx = (size + 0xF) >> 4; /* number of paragraphs */
- PM_int386(0x31, &r, &r);
- if (r.x.cflag)
- return NULL; /* DPMI call failed */
- *r_seg = r.x.ax; /* Real mode segment */
- *r_off = 0;
- p = PM_mapRealPointer(*r_seg,*r_off);
- _PM_addRealModeBlock(p,r.x.dx);
- return p;
-}
-
-void PMAPI PM_freeRealSeg(void *mem)
-{
- PMREGS r;
-
- if (mem) {
- r.x.ax = 0x101; /* DPMI free DOS memory */
- r.x.dx = _PM_findRealModeBlock(mem);/* DX := selector from 0x100 */
- PM_int386(0x31, &r, &r);
- }
-}
-
-static DPMI_handler_t DPMI_int10 = NULL;
-
-void PMAPI DPMI_setInt10Handler(DPMI_handler_t handler)
-{
- DPMI_int10 = handler;
-}
-
-void PMAPI DPMI_int86(int intno, DPMI_regs *regs)
-{
- PMREGS r;
- PMSREGS sr;
-
- if (intno == 0x10 && DPMI_int10) {
- if (DPMI_int10(regs))
- return;
- }
- PM_segread(&sr);
- r.x.ax = 0x300; /* DPMI issue real interrupt */
- r.h.bl = intno;
- r.h.bh = 0;
- r.x.cx = 0;
- sr.es = sr.ds;
- r.e.edi = (uint)regs;
- PM_int386x(0x31, &r, &r, &sr); /* Issue the interrupt */
-}
-
-#define IN(reg) rmregs.reg = in->e.reg
-#define OUT(reg) out->e.reg = rmregs.reg
-
-int PMAPI PM_int86(int intno, RMREGS *in, RMREGS *out)
-{
- DPMI_regs rmregs;
-
- memset(&rmregs, 0, sizeof(rmregs));
- IN(eax); IN(ebx); IN(ecx); IN(edx); IN(esi); IN(edi);
-
- DPMI_int86(intno,&rmregs); /* DPMI issue real interrupt */
-
- OUT(eax); OUT(ebx); OUT(ecx); OUT(edx); OUT(esi); OUT(edi);
- out->x.cflag = rmregs.flags & 0x1;
- return out->x.ax;
-}
-
-int PMAPI PM_int86x(int intno, RMREGS *in, RMREGS *out,
- RMSREGS *sregs)
-{
- DPMI_regs rmregs;
-
- memset(&rmregs, 0, sizeof(rmregs));
- IN(eax); IN(ebx); IN(ecx); IN(edx); IN(esi); IN(edi);
- rmregs.es = sregs->es;
- rmregs.ds = sregs->ds;
-
- DPMI_int86(intno,&rmregs); /* DPMI issue real interrupt */
-
- OUT(eax); OUT(ebx); OUT(ecx); OUT(edx); OUT(esi); OUT(edi);
- sregs->es = rmregs.es;
- sregs->cs = rmregs.cs;
- sregs->ss = rmregs.ss;
- sregs->ds = rmregs.ds;
- out->x.cflag = rmregs.flags & 0x1;
- return out->x.ax;
-}
-
-#pragma pack(1)
-
-typedef struct {
- uint LargestBlockAvail;
- uint MaxUnlockedPage;
- uint LargestLockablePage;
- uint LinAddrSpace;
- uint NumFreePagesAvail;
- uint NumPhysicalPagesFree;
- uint TotalPhysicalPages;
- uint FreeLinAddrSpace;
- uint SizeOfPageFile;
- uint res[3];
- } MemInfo;
-
-#pragma pack()
-
-void PMAPI PM_availableMemory(ulong *physical,ulong *total)
-{
- PMREGS r;
- PMSREGS sr;
- MemInfo memInfo;
-
- PM_segread(&sr);
- r.x.ax = 0x500; /* DPMI get free memory info */
- sr.es = sr.ds;
- r.e.edi = (uint)&memInfo;
- PM_int386x(0x31, &r, &r, &sr); /* Issue the interrupt */
- *physical = memInfo.NumPhysicalPagesFree * 4096;
- *total = memInfo.LargestBlockAvail;
- if (*total < *physical)
- *physical = *total;
-}
-
-#endif
-
-#ifndef __16BIT__
-
-/****************************************************************************
-REMARKS:
-Call the VBE/Core software interrupt to change display banks.
-****************************************************************************/
-void PMAPI PM_setBankA(
- int bank)
-{
- DPMI_regs regs;
- memset(&regs, 0, sizeof(regs));
- regs.eax = 0x4F05;
- regs.ebx = 0x0000;
- regs.edx = bank;
- DPMI_int86(0x10,&regs);
-}
-
-/****************************************************************************
-REMARKS:
-Call the VBE/Core software interrupt to change display banks.
-****************************************************************************/
-void PMAPI PM_setBankAB(
- int bank)
-{
- DPMI_regs regs;
- memset(&regs, 0, sizeof(regs));
- regs.eax = 0x4F05;
- regs.ebx = 0x0000;
- regs.edx = bank;
- DPMI_int86(0x10,&regs);
- regs.eax = 0x4F05;
- regs.ebx = 0x0001;
- regs.edx = bank;
- DPMI_int86(0x10,&regs);
-}
-
-/****************************************************************************
-REMARKS:
-Call the VBE/Core software interrupt to change display start address.
-****************************************************************************/
-void PMAPI PM_setCRTStart(
- int x,
- int y,
- int waitVRT)
-{
- DPMI_regs regs;
- memset(&regs, 0, sizeof(regs));
- regs.eax = 0x4F07;
- regs.ebx = waitVRT;
- regs.ecx = x;
- regs.edx = y;
- DPMI_int86(0x10,&regs);
-}
-
-#endif
-
-/****************************************************************************
-REMARKS:
-Function to get the file attributes for a specific file.
-****************************************************************************/
-uint PMAPI PM_getFileAttr(
- const char *filename)
-{
- /* TODO: Implement this! */
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-Function to get the file time and date for a specific file.
-****************************************************************************/
-ibool PMAPI PM_getFileTime(
- const char *filename,
- ibool gmTime,
- PM_time *time)
-{
- /* TODO: Implement this! */
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Function to set the file time and date for a specific file.
-****************************************************************************/
-ibool PMAPI PM_setFileTime(
- const char *filename,
- ibool gmTime,
- PM_time *time)
-{
- /* TODO: Implement this! */
- return false;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/dos/pmdos.c b/board/MAI/bios_emulator/scitech/src/pm/dos/pmdos.c
deleted file mode 100644
index eecc2daede..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/dos/pmdos.c
+++ /dev/null
@@ -1,1637 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: 16/32 bit DOS
-*
-* Description: Implementation for the OS Portability Manager Library, which
-* contains functions to implement OS specific services in a
-* generic, cross platform API. Porting the OS Portability
-* Manager library is the first step to porting any SciTech
-* products to a new platform.
-*
-****************************************************************************/
-
-#include "pmapi.h"
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <dos.h>
-
-/*--------------------------- Global variables ----------------------------*/
-
-#ifndef REALMODE
-static int globalDataStart;
-#endif
-
-PM_criticalHandler _VARAPI _PM_critHandler = NULL;
-PM_breakHandler _VARAPI _PM_breakHandler = NULL;
-PM_intHandler _VARAPI _PM_timerHandler = NULL;
-PM_intHandler _VARAPI _PM_rtcHandler = NULL;
-PM_intHandler _VARAPI _PM_keyHandler = NULL;
-PM_key15Handler _VARAPI _PM_key15Handler = NULL;
-PM_mouseHandler _VARAPI _PM_mouseHandler = NULL;
-PM_intHandler _VARAPI _PM_int10Handler = NULL;
-int _VARAPI _PM_mouseMask;
-
-uchar * _VARAPI _PM_ctrlCPtr; /* Location of Ctrl-C flag */
-uchar * _VARAPI _PM_ctrlBPtr; /* Location of Ctrl-Break flag */
-uchar * _VARAPI _PM_critPtr; /* Location of Critical error Bf*/
-PMFARPTR _VARAPI _PM_prevTimer = PMNULL; /* Previous timer handler */
-PMFARPTR _VARAPI _PM_prevRTC = PMNULL; /* Previous RTC handler */
-PMFARPTR _VARAPI _PM_prevKey = PMNULL; /* Previous key handler */
-PMFARPTR _VARAPI _PM_prevKey15 = PMNULL; /* Previous key15 handler */
-PMFARPTR _VARAPI _PM_prevBreak = PMNULL; /* Previous break handler */
-PMFARPTR _VARAPI _PM_prevCtrlC = PMNULL; /* Previous CtrlC handler */
-PMFARPTR _VARAPI _PM_prevCritical = PMNULL; /* Previous critical handler */
-long _VARAPI _PM_prevRealTimer; /* Previous real mode timer */
-long _VARAPI _PM_prevRealRTC; /* Previous real mode RTC */
-long _VARAPI _PM_prevRealKey; /* Previous real mode key */
-long _VARAPI _PM_prevRealKey15; /* Previous real mode key15 */
-long _VARAPI _PM_prevRealInt10; /* Previous real mode int 10h */
-static uchar _PM_oldCMOSRegA; /* CMOS register A contents */
-static uchar _PM_oldCMOSRegB; /* CMOS register B contents */
-static uchar _PM_oldRTCPIC2; /* Mask value for RTC IRQ8 */
-
-/* Structure to maintain information about hardware interrupt handlers,
- * include a copy of the hardware IRQ assembler thunk (one for each
- * hooked interrupt handler).
- */
-
-typedef struct {
- uchar IRQ;
- uchar IRQVect;
- uchar prevPIC;
- uchar prevPIC2;
- PMFARPTR prevHandler;
- long prevRealhandler;
- uchar thunk[1];
- /* IRQ assembler thunk follows ... */
- } _PM_IRQHandle;
-
-/*----------------------------- Implementation ----------------------------*/
-
-/* Globals for locking interrupt handlers in _pmdos.asm */
-
-#ifndef REALMODE
-extern int _VARAPI _PM_pmdosDataStart;
-extern int _VARAPI _PM_pmdosDataEnd;
-extern int _VARAPI _PM_DMADataStart;
-extern int _VARAPI _PM_DMADataEnd;
-void _ASMAPI _PM_pmdosCodeStart(void);
-void _ASMAPI _PM_pmdosCodeEnd(void);
-void _ASMAPI _PM_DMACodeStart(void);
-void _ASMAPI _PM_DMACodeEnd(void);
-#endif
-
-/* Protected mode interrupt handlers, also called by PM callbacks below */
-
-void _ASMAPI _PM_timerISR(void);
-void _ASMAPI _PM_rtcISR(void);
-void _ASMAPI _PM_irqISRTemplate(void);
-void _ASMAPI _PM_irqISRTemplateEnd(void);
-void _ASMAPI _PM_keyISR(void);
-void _ASMAPI _PM_key15ISR(void);
-void _ASMAPI _PM_breakISR(void);
-void _ASMAPI _PM_ctrlCISR(void);
-void _ASMAPI _PM_criticalISR(void);
-void _ASMAPI _PM_mouseISR(void);
-void _ASMAPI _PM_int10PMCB(void);
-
-/* Protected mode DPMI callback handlers */
-
-void _ASMAPI _PM_mousePMCB(void);
-
-/* Routine to install a mouse handler function */
-
-void _ASMAPI _PM_setMouseHandler(int mask);
-
-/* Routine to allocate DPMI real mode callback routines */
-
-ibool _ASMAPI _DPMI_allocateCallback(void (_ASMAPI *pmcode)(),void *rmregs,long *RMCB);
-void _ASMAPI _DPMI_freeCallback(long RMCB);
-
-/* DPMI helper functions in PMLITE.C */
-
-ulong PMAPI DPMI_mapPhysicalToLinear(ulong physAddr,ulong limit);
-int PMAPI DPMI_setSelectorBase(ushort sel,ulong linAddr);
-ulong PMAPI DPMI_getSelectorBase(ushort sel);
-int PMAPI DPMI_setSelectorLimit(ushort sel,ulong limit);
-uint PMAPI DPMI_createSelector(ulong base,ulong limit);
-void PMAPI DPMI_freeSelector(uint sel);
-int PMAPI DPMI_lockLinearPages(ulong linear,ulong len);
-int PMAPI DPMI_unlockLinearPages(ulong linear,ulong len);
-
-/* Functions to read and write CMOS registers */
-
-uchar PMAPI _PM_readCMOS(int index);
-void PMAPI _PM_writeCMOS(int index,uchar value);
-
-/*-------------------------------------------------------------------------*/
-/* Generic routines common to all environments */
-/*-------------------------------------------------------------------------*/
-
-void PMAPI PM_resetMouseDriver(int hardReset)
-{
- RMREGS regs;
- PM_mouseHandler oldHandler = _PM_mouseHandler;
-
- PM_restoreMouseHandler();
- regs.x.ax = hardReset ? 0 : 33;
- PM_int86(0x33, &regs, &regs);
- if (oldHandler)
- PM_setMouseHandler(_PM_mouseMask, oldHandler);
-}
-
-void PMAPI PM_setRealTimeClockFrequency(int frequency)
-{
- static short convert[] = {
- 8192,
- 4096,
- 2048,
- 1024,
- 512,
- 256,
- 128,
- 64,
- 32,
- 16,
- 8,
- 4,
- 2,
- -1,
- };
- int i;
-
- /* First clear any pending RTC timeout if not cleared */
- _PM_readCMOS(0x0C);
- if (frequency == 0) {
- /* Disable RTC timout */
- _PM_writeCMOS(0x0A,_PM_oldCMOSRegA);
- _PM_writeCMOS(0x0B,_PM_oldCMOSRegB & 0x0F);
- }
- else {
- /* Convert frequency value to RTC clock indexes */
- for (i = 0; convert[i] != -1; i++) {
- if (convert[i] == frequency)
- break;
- }
-
- /* Set RTC timout value and enable timeout */
- _PM_writeCMOS(0x0A,0x20 | (i+3));
- _PM_writeCMOS(0x0B,(_PM_oldCMOSRegB & 0x0F) | 0x40);
- }
-}
-
-#ifndef REALMODE
-
-static void PMAPI lockPMHandlers(void)
-{
- static int locked = 0;
- int stat;
- PM_lockHandle lh; /* Unused in DOS */
-
- /* Lock all of the code and data used by our protected mode interrupt
- * handling routines, so that it will continue to work correctly
- * under real mode.
- */
- if (!locked) {
- PM_saveDS();
- stat = !PM_lockDataPages(&globalDataStart-2048,4096,&lh);
- stat |= !PM_lockDataPages(&_PM_pmdosDataStart,(int)&_PM_pmdosDataEnd - (int)&_PM_pmdosDataStart,&lh);
- stat |= !PM_lockCodePages((__codePtr)_PM_pmdosCodeStart,(int)_PM_pmdosCodeEnd-(int)_PM_pmdosCodeStart,&lh);
- stat |= !PM_lockDataPages(&_PM_DMADataStart,(int)&_PM_DMADataEnd - (int)&_PM_DMADataStart,&lh);
- stat |= !PM_lockCodePages((__codePtr)_PM_DMACodeStart,(int)_PM_DMACodeEnd-(int)_PM_DMACodeStart,&lh);
- if (stat) {
- printf("Page locking services failed - interrupt handling not safe!\n");
- exit(1);
- }
- locked = 1;
- }
-}
-
-#endif
-
-/*-------------------------------------------------------------------------*/
-/* DOS Real Mode support. */
-/*-------------------------------------------------------------------------*/
-
-#ifdef REALMODE
-
-#ifndef MK_FP
-#define MK_FP(s,o) ( (void far *)( ((ulong)(s) << 16) + \
- (ulong)(o) ))
-#endif
-
-int PMAPI PM_setMouseHandler(int mask, PM_mouseHandler mh)
-{
- PM_saveDS();
- _PM_mouseHandler = mh;
- _PM_setMouseHandler(_PM_mouseMask = mask);
- return 1;
-}
-
-void PMAPI PM_restoreMouseHandler(void)
-{
- union REGS regs;
-
- if (_PM_mouseHandler) {
- regs.x.ax = 33;
- int86(0x33, &regs, &regs);
- _PM_mouseHandler = NULL;
- }
-}
-
-void PMAPI PM_setTimerHandler(PM_intHandler th)
-{
- _PM_getRMvect(0x8, (long*)&_PM_prevTimer);
- _PM_timerHandler = th;
- _PM_setRMvect(0x8, (long)_PM_timerISR);
-}
-
-void PMAPI PM_restoreTimerHandler(void)
-{
- if (_PM_timerHandler) {
- _PM_setRMvect(0x8, (long)_PM_prevTimer);
- _PM_timerHandler = NULL;
- }
-}
-
-ibool PMAPI PM_setRealTimeClockHandler(PM_intHandler th,int frequency)
-{
- /* Save the old CMOS real time clock values */
- _PM_oldCMOSRegA = _PM_readCMOS(0x0A);
- _PM_oldCMOSRegB = _PM_readCMOS(0x0B);
-
- /* Set the real time clock interrupt handler */
- _PM_getRMvect(0x70, (long*)&_PM_prevRTC);
- _PM_rtcHandler = th;
- _PM_setRMvect(0x70, (long)_PM_rtcISR);
-
- /* Program the real time clock default frequency */
- PM_setRealTimeClockFrequency(frequency);
-
- /* Unmask IRQ8 in the PIC2 */
- _PM_oldRTCPIC2 = PM_inpb(0xA1);
- PM_outpb(0xA1,_PM_oldRTCPIC2 & 0xFE);
- return true;
-}
-
-void PMAPI PM_restoreRealTimeClockHandler(void)
-{
- if (_PM_rtcHandler) {
- /* Restore CMOS registers and mask RTC clock */
- _PM_writeCMOS(0x0A,_PM_oldCMOSRegA);
- _PM_writeCMOS(0x0B,_PM_oldCMOSRegB);
- PM_outpb(0xA1,(PM_inpb(0xA1) & 0xFE) | (_PM_oldRTCPIC2 & ~0xFE));
-
- /* Restore the interrupt vector */
- _PM_setRMvect(0x70, (long)_PM_prevRTC);
- _PM_rtcHandler = NULL;
- }
-}
-
-void PMAPI PM_setKeyHandler(PM_intHandler kh)
-{
- _PM_getRMvect(0x9, (long*)&_PM_prevKey);
- _PM_keyHandler = kh;
- _PM_setRMvect(0x9, (long)_PM_keyISR);
-}
-
-void PMAPI PM_restoreKeyHandler(void)
-{
- if (_PM_keyHandler) {
- _PM_setRMvect(0x9, (long)_PM_prevKey);
- _PM_keyHandler = NULL;
- }
-}
-
-void PMAPI PM_setKey15Handler(PM_key15Handler kh)
-{
- _PM_getRMvect(0x15, (long*)&_PM_prevKey15);
- _PM_key15Handler = kh;
- _PM_setRMvect(0x15, (long)_PM_key15ISR);
-}
-
-void PMAPI PM_restoreKey15Handler(void)
-{
- if (_PM_key15Handler) {
- _PM_setRMvect(0x15, (long)_PM_prevKey15);
- _PM_key15Handler = NULL;
- }
-}
-
-void PMAPI PM_installAltBreakHandler(PM_breakHandler bh)
-{
- static int ctrlCFlag,ctrlBFlag;
-
- _PM_ctrlCPtr = (uchar*)&ctrlCFlag;
- _PM_ctrlBPtr = (uchar*)&ctrlBFlag;
- _PM_getRMvect(0x1B, (long*)&_PM_prevBreak);
- _PM_getRMvect(0x23, (long*)&_PM_prevCtrlC);
- _PM_breakHandler = bh;
- _PM_setRMvect(0x1B, (long)_PM_breakISR);
- _PM_setRMvect(0x23, (long)_PM_ctrlCISR);
-}
-
-void PMAPI PM_installBreakHandler(void)
-{
- PM_installAltBreakHandler(NULL);
-}
-
-void PMAPI PM_restoreBreakHandler(void)
-{
- if (_PM_prevBreak) {
- _PM_setRMvect(0x1B, (long)_PM_prevBreak);
- _PM_setRMvect(0x23, (long)_PM_prevCtrlC);
- _PM_prevBreak = NULL;
- _PM_breakHandler = NULL;
- }
-}
-
-void PMAPI PM_installAltCriticalHandler(PM_criticalHandler ch)
-{
- static short critBuf[2];
-
- _PM_critPtr = (uchar*)critBuf;
- _PM_getRMvect(0x24, (long*)&_PM_prevCritical);
- _PM_critHandler = ch;
- _PM_setRMvect(0x24, (long)_PM_criticalISR);
-}
-
-void PMAPI PM_installCriticalHandler(void)
-{
- PM_installAltCriticalHandler(NULL);
-}
-
-void PMAPI PM_restoreCriticalHandler(void)
-{
- if (_PM_prevCritical) {
- _PM_setRMvect(0x24, (long)_PM_prevCritical);
- _PM_prevCritical = NULL;
- _PM_critHandler = NULL;
- }
-}
-
-int PMAPI PM_lockDataPages(void *p,uint len,PM_lockHandle *lh)
-{
- p = p; len = len; /* Do nothing for real mode */
- return 1;
-}
-
-int PMAPI PM_unlockDataPages(void *p,uint len,PM_lockHandle *lh)
-{
- p = p; len = len; /* Do nothing for real mode */
- return 1;
-}
-
-int PMAPI PM_lockCodePages(void (*p)(),uint len,PM_lockHandle *lh)
-{
- p = p; len = len; /* Do nothing for real mode */
- return 1;
-}
-
-int PMAPI PM_unlockCodePages(void (*p)(),uint len,PM_lockHandle *lh)
-{
- p = p; len = len; /* Do nothing for real mode */
- return 1;
-}
-
-void PMAPI PM_getPMvect(int intno, PMFARPTR *isr)
-{
- long t;
- _PM_getRMvect(intno,&t);
- *isr = (void*)t;
-}
-
-void PMAPI PM_setPMvect(int intno, PM_intHandler isr)
-{
- PM_saveDS();
- _PM_setRMvect(intno,(long)isr);
-}
-
-void PMAPI PM_restorePMvect(int intno, PMFARPTR isr)
-{
- _PM_setRMvect(intno,(long)isr);
-}
-
-#endif
-
-/*-------------------------------------------------------------------------*/
-/* Phar Lap TNT DOS Extender support. */
-/*-------------------------------------------------------------------------*/
-
-#ifdef TNT
-
-#include <pldos32.h>
-#include <pharlap.h>
-#include <hw386.h>
-
-static long prevRealBreak; /* Previous real mode break handler */
-static long prevRealCtrlC; /* Previous real mode CtrlC handler */
-static long prevRealCritical; /* Prev real mode critical handler */
-static uchar *mousePtr;
-
-/* The following real mode routine is used to call a 32 bit protected
- * mode FAR function from real mode. We use this for passing up control
- * from the real mode mouse callback to our protected mode code.
- */
-
-static UCHAR realHandler[] = { /* Real mode code generic handler */
- 0x00,0x00,0x00,0x00, /* __PM_callProtp */
- 0x00,0x00, /* __PM_protCS */
- 0x00,0x00,0x00,0x00, /* __PM_protHandler */
- 0x66,0x60, /* pushad */
- 0x1E, /* push ds */
- 0x6A,0x00, /* push 0 */
- 0x6A,0x00, /* push 0 */
- 0x2E,0xFF,0x36,0x04,0x00, /* push [cs:__PM_protCS] */
- 0x66,0x2E,0xFF,0x36,0x06,0x00, /* push [cs:__PM_protHandler] */
- 0x2E,0xFF,0x1E,0x00,0x00, /* call [cs:__PM_callProtp] */
- 0x83,0xC4,0x0A, /* add sp,10 */
- 0x1F, /* pop ds */
- 0x66,0x61, /* popad */
- 0xCB, /* retf */
- };
-
-/* The following functions installs the above realmode callback mechanism
- * in real mode memory for calling the protected mode routine.
- */
-
-uchar * installCallback(void (PMAPI *pmCB)(),uint *rseg, uint *roff)
-{
- CONFIG_INF config;
- REALPTR realBufAdr,callProtp;
- ULONG bufSize;
- FARPTR protBufAdr;
- uchar *p;
-
- /* Get address of real mode routine to call up to protected mode */
- _dx_rmlink_get(&callProtp, &realBufAdr, &bufSize, &protBufAdr);
- _dx_config_inf(&config, (UCHAR*)&config);
-
- /* Fill in the values in the real mode code segment so that it will
- * call the correct routine.
- */
- *((REALPTR*)&realHandler[0]) = callProtp;
- *((USHORT*)&realHandler[4]) = config.c_cs_sel;
- *((ULONG*)&realHandler[6]) = (ULONG)pmCB;
-
- /* Copy the real mode handler to real mode memory */
- if ((p = PM_allocRealSeg(sizeof(realHandler),rseg,roff)) == NULL)
- return NULL;
- memcpy(p,realHandler,sizeof(realHandler));
-
- /* Skip past global variabls in real mode code segment */
- *roff += 0x0A;
- return p;
-}
-
-int PMAPI PM_setMouseHandler(int mask, PM_mouseHandler mh)
-{
- RMREGS regs;
- RMSREGS sregs;
- uint rseg,roff;
-
- lockPMHandlers(); /* Ensure our handlers are locked */
-
- if ((mousePtr = installCallback(_PM_mouseISR, &rseg, &roff)) == NULL)
- return 0;
- _PM_mouseHandler = mh;
-
- /* Install the real mode mouse handler */
- sregs.es = rseg;
- regs.x.dx = roff;
- regs.x.cx = _PM_mouseMask = mask;
- regs.x.ax = 0xC;
- PM_int86x(0x33, &regs, &regs, &sregs);
- return 1;
-}
-
-void PMAPI PM_restoreMouseHandler(void)
-{
- RMREGS regs;
-
- if (_PM_mouseHandler) {
- regs.x.ax = 33;
- PM_int86(0x33, &regs, &regs);
- PM_freeRealSeg(mousePtr);
- _PM_mouseHandler = NULL;
- }
-}
-
-void PMAPI PM_getPMvect(int intno, PMFARPTR *isr)
-{
- FARPTR ph;
-
- _dx_pmiv_get(intno, &ph);
- isr->sel = FP_SEL(ph);
- isr->off = FP_OFF(ph);
-}
-
-void PMAPI PM_setPMvect(int intno, PM_intHandler isr)
-{
- CONFIG_INF config;
- FARPTR ph;
-
- PM_saveDS();
- _dx_config_inf(&config, (UCHAR*)&config);
- FP_SET(ph,(uint)isr,config.c_cs_sel);
- _dx_pmiv_set(intno,ph);
-}
-
-void PMAPI PM_restorePMvect(int intno, PMFARPTR isr)
-{
- FARPTR ph;
-
- FP_SET(ph,isr.off,isr.sel);
- _dx_pmiv_set(intno,ph);
-}
-
-static void getISR(int intno, PMFARPTR *pmisr, long *realisr)
-{
- PM_getPMvect(intno,pmisr);
- _PM_getRMvect(intno, realisr);
-}
-
-static void restoreISR(int intno, PMFARPTR pmisr, long realisr)
-{
- _PM_setRMvect(intno,realisr);
- PM_restorePMvect(intno,pmisr);
-}
-
-static void setISR(int intno, void (PMAPI *isr)())
-{
- CONFIG_INF config;
- FARPTR ph;
-
- lockPMHandlers(); /* Ensure our handlers are locked */
-
- _dx_config_inf(&config, (UCHAR*)&config);
- FP_SET(ph,(uint)isr,config.c_cs_sel);
- _dx_apmiv_set(intno,ph);
-}
-
-void PMAPI PM_setTimerHandler(PM_intHandler th)
-{
- getISR(0x8, &_PM_prevTimer, &_PM_prevRealTimer);
- _PM_timerHandler = th;
- setISR(0x8, _PM_timerISR);
-}
-
-void PMAPI PM_restoreTimerHandler(void)
-{
- if (_PM_timerHandler) {
- restoreISR(0x8, _PM_prevTimer, _PM_prevRealTimer);
- _PM_timerHandler = NULL;
- }
-}
-
-ibool PMAPI PM_setRealTimeClockHandler(PM_intHandler th,int frequency)
-{
- /* Save the old CMOS real time clock values */
- _PM_oldCMOSRegA = _PM_readCMOS(0x0A);
- _PM_oldCMOSRegB = _PM_readCMOS(0x0B);
-
- /* Set the real time clock interrupt handler */
- getISR(0x70, &_PM_prevRTC, &_PM_prevRealRTC);
- _PM_rtcHandler = th;
- setISR(0x70, _PM_rtcISR);
-
- /* Program the real time clock default frequency */
- PM_setRealTimeClockFrequency(frequency);
-
- /* Unmask IRQ8 in the PIC2 */
- _PM_oldRTCPIC2 = PM_inpb(0xA1);
- PM_outpb(0xA1,_PM_oldRTCPIC2 & 0xFE);
- return true;
-}
-
-void PMAPI PM_restoreRealTimeClockHandler(void)
-{
- if (_PM_rtcHandler) {
- /* Restore CMOS registers and mask RTC clock */
- _PM_writeCMOS(0x0A,_PM_oldCMOSRegA);
- _PM_writeCMOS(0x0B,_PM_oldCMOSRegB);
- PM_outpb(0xA1,(PM_inpb(0xA1) & 0xFE) | (_PM_oldRTCPIC2 & ~0xFE));
-
- /* Restore the interrupt vector */
- restoreISR(0x70, _PM_prevRTC, _PM_prevRealRTC);
- _PM_rtcHandler = NULL;
- }
-}
-
-void PMAPI PM_setKeyHandler(PM_intHandler kh)
-{
- getISR(0x9, &_PM_prevKey, &_PM_prevRealKey);
- _PM_keyHandler = kh;
- setISR(0x9, _PM_keyISR);
-}
-
-void PMAPI PM_restoreKeyHandler(void)
-{
- if (_PM_keyHandler) {
- restoreISR(0x9, _PM_prevKey, _PM_prevRealKey);
- _PM_keyHandler = NULL;
- }
-}
-
-void PMAPI PM_setKey15Handler(PM_key15Handler kh)
-{
- getISR(0x15, &_PM_prevKey15, &_PM_prevRealKey15);
- _PM_key15Handler = kh;
- setISR(0x15, _PM_key15ISR);
-}
-
-void PMAPI PM_restoreKey15Handler(void)
-{
- if (_PM_key15Handler) {
- restoreISR(0x15, _PM_prevKey15, _PM_prevRealKey15);
- _PM_key15Handler = NULL;
- }
-}
-
-void PMAPI PM_installAltBreakHandler(PM_breakHandler bh)
-{
- static int ctrlCFlag,ctrlBFlag;
-
- _PM_ctrlCPtr = (uchar*)&ctrlCFlag;
- _PM_ctrlBPtr = (uchar*)&ctrlBFlag;
- getISR(0x1B, &_PM_prevBreak, &prevRealBreak);
- getISR(0x23, &_PM_prevCtrlC, &prevRealCtrlC);
- _PM_breakHandler = bh;
- setISR(0x1B, _PM_breakISR);
- setISR(0x23, _PM_ctrlCISR);
-}
-
-void PMAPI PM_installBreakHandler(void)
-{
- PM_installAltBreakHandler(NULL);
-}
-
-void PMAPI PM_restoreBreakHandler(void)
-{
- if (_PM_prevBreak.sel) {
- restoreISR(0x1B, _PM_prevBreak, prevRealBreak);
- restoreISR(0x23, _PM_prevCtrlC, prevRealCtrlC);
- _PM_prevBreak.sel = 0;
- _PM_breakHandler = NULL;
- }
-}
-
-void PMAPI PM_installAltCriticalHandler(PM_criticalHandler ch)
-{
- static short critBuf[2];
-
- _PM_critPtr = (uchar*)critBuf;
- getISR(0x24, &_PM_prevCritical, &prevRealCritical);
- _PM_critHandler = ch;
- setISR(0x24, _PM_criticalISR);
-}
-
-void PMAPI PM_installCriticalHandler(void)
-{
- PM_installAltCriticalHandler(NULL);
-}
-
-void PMAPI PM_restoreCriticalHandler(void)
-{
- if (_PM_prevCritical.sel) {
- restoreISR(0x24, _PM_prevCritical, prevRealCritical);
- _PM_prevCritical.sel = 0;
- _PM_critHandler = NULL;
- }
-}
-
-int PMAPI PM_lockDataPages(void *p,uint len,PM_lockHandle *lh)
-{
- return (_dx_lock_pgsn(p,len) == 0);
-}
-
-int PMAPI PM_unlockDataPages(void *p,uint len,PM_lockHandle *lh)
-{
- return (_dx_ulock_pgsn(p,len) == 0);
-}
-
-int PMAPI PM_lockCodePages(void (*p)(),uint len,PM_lockHandle *lh)
-{
- CONFIG_INF config;
- FARPTR fp;
-
- _dx_config_inf(&config, (UCHAR*)&config);
- FP_SET(fp,p,config.c_cs_sel);
- return (_dx_lock_pgs(fp,len) == 0);
-}
-
-int PMAPI PM_unlockCodePages(void (*p)(),uint len,PM_lockHandle *lh)
-{
- CONFIG_INF config;
- FARPTR fp;
-
- _dx_config_inf(&config, (UCHAR*)&config);
- FP_SET(fp,p,config.c_cs_sel);
- return (_dx_ulock_pgs(fp,len) == 0);
-}
-
-#endif
-
-/*-------------------------------------------------------------------------*/
-/* Symantec C++ DOSX and FlashTek X-32/X-32VM support */
-/*-------------------------------------------------------------------------*/
-
-#if defined(DOSX) || defined(X32VM)
-
-#ifdef X32VM
-#include <x32.h>
-#endif
-
-static long prevRealBreak; /* Previous real mode break handler */
-static long prevRealCtrlC; /* Previous real mode CtrlC handler */
-static long prevRealCritical; /* Prev real mode critical handler */
-
-static uint mouseSel = 0,mouseOff;
-
-/* The following real mode routine is used to call a 32 bit protected
- * mode FAR function from real mode. We use this for passing up control
- * from the real mode mouse callback to our protected mode code.
- */
-
-static char realHandler[] = { /* Real mode code generic handler */
- 0x00,0x00,0x00,0x00, /* __PM_callProtp */
- 0x00,0x00, /* __PM_protCS */
- 0x00,0x00,0x00,0x00, /* __PM_protHandler */
- 0x1E, /* push ds */
- 0x6A,0x00, /* push 0 */
- 0x6A,0x00, /* push 0 */
- 0x2E,0xFF,0x36,0x04,0x00, /* push [cs:__PM_protCS] */
- 0x66,0x2E,0xFF,0x36,0x06,0x00, /* push [cs:__PM_protHandler] */
- 0x2E,0xFF,0x1E,0x00,0x00, /* call [cs:__PM_callProtp] */
- 0x83,0xC4,0x0A, /* add sp,10 */
- 0x1F, /* pop ds */
- 0xCB, /* retf */
- };
-
-/* The following functions installs the above realmode callback mechanism
- * in real mode memory for calling the protected mode routine.
- */
-
-int installCallback(void (PMAPI *pmCB)(),uint *psel, uint *poff,
- uint *rseg, uint *roff)
-{
- PMREGS regs;
- PMSREGS sregs;
-
- regs.x.ax = 0x250D;
- PM_segread(&sregs);
- PM_int386x(0x21,&regs,&regs,&sregs); /* Get RM callback address */
-
- /* Fill in the values in the real mode code segment so that it will
- * call the correct routine.
- */
- *((ulong*)&realHandler[0]) = regs.e.eax;
- *((ushort*)&realHandler[4]) = sregs.cs;
- *((ulong*)&realHandler[6]) = (ulong)pmCB;
-
- /* Copy the real mode handler to real mode memory (only allocate the
- * buffer once since we cant dealloate it with X32).
- */
- if (*psel == 0) {
- if (!PM_allocRealSeg(sizeof(realHandler),psel,poff,rseg,roff))
- return 0;
- }
- PM_memcpyfn(*psel,*poff,realHandler,sizeof(realHandler));
-
- /* Skip past global variables in real mode code segment */
- *roff += 0x0A;
- return 1;
-}
-
-int PMAPI PM_setMouseHandler(int mask, PM_mouseHandler mh)
-{
- RMREGS regs;
- RMSREGS sregs;
- uint rseg,roff;
-
- lockPMHandlers(); /* Ensure our handlers are locked */
-
- if (!installCallback(_PM_mouseISR, &mouseSel, &mouseOff, &rseg, &roff))
- return 0;
- _PM_mouseHandler = mh;
-
- /* Install the real mode mouse handler */
- sregs.es = rseg;
- regs.x.dx = roff;
- regs.x.cx = _PM_mouseMask = mask;
- regs.x.ax = 0xC;
- PM_int86x(0x33, &regs, &regs, &sregs);
- return 1;
-}
-
-void PMAPI PM_restoreMouseHandler(void)
-{
- RMREGS regs;
-
- if (_PM_mouseHandler) {
- regs.x.ax = 33;
- PM_int86(0x33, &regs, &regs);
- _PM_mouseHandler = NULL;
- }
-}
-
-void PMAPI PM_getPMvect(int intno, PMFARPTR *isr)
-{
- PMREGS regs;
- PMSREGS sregs;
-
- PM_segread(&sregs);
- regs.x.ax = 0x2502; /* Get PM interrupt vector */
- regs.x.cx = intno;
- PM_int386x(0x21, &regs, &regs, &sregs);
- isr->sel = sregs.es;
- isr->off = regs.e.ebx;
-}
-
-void PMAPI PM_setPMvect(int intno, PM_intHandler isr)
-{
- PMFARPTR pmisr;
- PMSREGS sregs;
-
- PM_saveDS();
- PM_segread(&sregs);
- pmisr.sel = sregs.cs;
- pmisr.off = (uint)isr;
- PM_restorePMvect(intno, pmisr);
-}
-
-void PMAPI PM_restorePMvect(int intno, PMFARPTR isr)
-{
- PMREGS regs;
- PMSREGS sregs;
-
- PM_segread(&sregs);
- regs.x.ax = 0x2505; /* Set PM interrupt vector */
- regs.x.cx = intno;
- sregs.ds = isr.sel;
- regs.e.edx = isr.off;
- PM_int386x(0x21, &regs, &regs, &sregs);
-}
-
-static void getISR(int intno, PMFARPTR *pmisr, long *realisr)
-{
- PM_getPMvect(intno,pmisr);
- _PM_getRMvect(intno,realisr);
-}
-
-static void restoreISR(int intno, PMFARPTR pmisr, long realisr)
-{
- PMREGS regs;
- PMSREGS sregs;
-
- PM_segread(&sregs);
- regs.x.ax = 0x2507; /* Set real and PM vectors */
- regs.x.cx = intno;
- sregs.ds = pmisr.sel;
- regs.e.edx = pmisr.off;
- regs.e.ebx = realisr;
- PM_int386x(0x21, &regs, &regs, &sregs);
-}
-
-static void setISR(int intno, void *isr)
-{
- PMREGS regs;
- PMSREGS sregs;
-
- lockPMHandlers(); /* Ensure our handlers are locked */
-
- PM_segread(&sregs);
- regs.x.ax = 0x2506; /* Hook real and protected vectors */
- regs.x.cx = intno;
- sregs.ds = sregs.cs;
- regs.e.edx = (uint)isr;
- PM_int386x(0x21, &regs, &regs, &sregs);
-}
-
-void PMAPI PM_setTimerHandler(PM_intHandler th)
-{
- getISR(0x8, &_PM_prevTimer, &_PM_prevRealTimer);
- _PM_timerHandler = th;
- setISR(0x8, _PM_timerISR);
-}
-
-void PMAPI PM_restoreTimerHandler(void)
-{
- if (_PM_timerHandler) {
- restoreISR(0x8, _PM_prevTimer, _PM_prevRealTimer);
- _PM_timerHandler = NULL;
- }
-}
-
-ibool PMAPI PM_setRealTimeClockHandler(PM_intHandler th,int frequency)
-{
- /* Save the old CMOS real time clock values */
- _PM_oldCMOSRegA = _PM_readCMOS(0x0A);
- _PM_oldCMOSRegB = _PM_readCMOS(0x0B);
-
- /* Set the real time clock interrupt handler */
- getISR(0x70, &_PM_prevRTC, &_PM_prevRealRTC);
- _PM_rtcHandler = th;
- setISR(0x70, _PM_rtcISR);
-
- /* Program the real time clock default frequency */
- PM_setRealTimeClockFrequency(frequency);
-
- /* Unmask IRQ8 in the PIC2 */
- _PM_oldRTCPIC2 = PM_inpb(0xA1);
- PM_outpb(0xA1,_PM_oldRTCPIC2 & 0xFE);
- return true;
-}
-
-void PMAPI PM_restoreRealTimeClockHandler(void)
-{
- if (_PM_rtcHandler) {
- /* Restore CMOS registers and mask RTC clock */
- _PM_writeCMOS(0x0A,_PM_oldCMOSRegA);
- _PM_writeCMOS(0x0B,_PM_oldCMOSRegB);
- PM_outpb(0xA1,(PM_inpb(0xA1) & 0xFE) | (_PM_oldRTCPIC2 & ~0xFE));
-
- /* Restore the interrupt vector */
- restoreISR(0x70, _PM_prevRTC, _PM_prevRealRTC);
- _PM_rtcHandler = NULL;
- }
-}
-
-void PMAPI PM_setKeyHandler(PM_intHandler kh)
-{
- getISR(0x9, &_PM_prevKey, &_PM_prevRealKey);
- _PM_keyHandler = kh;
- setISR(0x9, _PM_keyISR);
-}
-
-void PMAPI PM_restoreKeyHandler(void)
-{
- if (_PM_keyHandler) {
- restoreISR(0x9, _PM_prevKey, _PM_prevRealKey);
- _PM_keyHandler = NULL;
- }
-}
-
-void PMAPI PM_setKey15Handler(PM_key15Handler kh)
-{
- getISR(0x15, &_PM_prevKey15, &_PM_prevRealKey15);
- _PM_key15Handler = kh;
- setISR(0x15, _PM_key15ISR);
-}
-
-void PMAPI PM_restoreKey15Handler(void)
-{
- if (_PM_key15Handler) {
- restoreISR(0x15, _PM_prevKey15, _PM_prevRealKey15);
- _PM_key15Handler = NULL;
- }
-}
-
-void PMAPI PM_installAltBreakHandler(PM_breakHandler bh)
-{
- static int ctrlCFlag,ctrlBFlag;
-
- _PM_ctrlCPtr = (uchar*)&ctrlCFlag;
- _PM_ctrlBPtr = (uchar*)&ctrlBFlag;
- getISR(0x1B, &_PM_prevBreak, &prevRealBreak);
- getISR(0x23, &_PM_prevCtrlC, &prevRealCtrlC);
- _PM_breakHandler = bh;
- setISR(0x1B, _PM_breakISR);
- setISR(0x23, _PM_ctrlCISR);
-}
-
-void PMAPI PM_installBreakHandler(void)
-{
- PM_installAltBreakHandler(NULL);
-}
-
-void PMAPI PM_restoreBreakHandler(void)
-{
- if (_PM_prevBreak.sel) {
- restoreISR(0x1B, _PM_prevBreak, prevRealBreak);
- restoreISR(0x23, _PM_prevCtrlC, prevRealCtrlC);
- _PM_prevBreak.sel = 0;
- _PM_breakHandler = NULL;
- }
-}
-
-void PMAPI PM_installAltCriticalHandler(PM_criticalHandler ch)
-{
- static short critBuf[2];
-
- _PM_critPtr = (uchar*)critBuf;
- getISR(0x24, &_PM_prevCritical, &prevRealCritical);
- _PM_critHandler = ch;
- setISR(0x24, _PM_criticalISR);
-}
-
-void PMAPI PM_installCriticalHandler(void)
-{
- PM_installAltCriticalHandler(NULL);
-}
-
-void PMAPI PM_restoreCriticalHandler(void)
-{
- if (_PM_prevCritical.sel) {
- restoreISR(0x24, _PM_prevCritical, prevRealCritical);
- _PM_prevCritical.sel = 0;
- _PM_critHandler = NULL;
- }
-}
-
-int PMAPI PM_lockDataPages(void *p,uint len,PM_lockHandle *lh)
-{
- return (_x386_memlock(p,len) == 0);
-}
-
-int PMAPI PM_unlockDataPages(void *p,uint len,PM_lockHandle *lh)
-{
- return (_x386_memunlock(p,len) == 0);
-}
-
-int PMAPI PM_lockCodePages(void (*p)(),uint len,PM_lockHandle *lh)
-{
- return (_x386_memlock(p,len) == 0);
-}
-
-int PMAPI PM_unlockCodePages(void (*p)(),uint len,PM_lockHandle *lh)
-{
- return (_x386_memunlock(p,len) == 0);
-}
-
-#endif
-
-/*-------------------------------------------------------------------------*/
-/* Borland's DPMI32 DOS Power Pack Extender support. */
-/*-------------------------------------------------------------------------*/
-
-#ifdef DPMI32
-#define GENERIC_DPMI32 /* Use generic 32 bit DPMI routines */
-
-void PMAPI PM_getPMvect(int intno, PMFARPTR *isr)
-{
- PMREGS regs;
-
- regs.x.ax = 0x204;
- regs.h.bl = intno;
- PM_int386(0x31,&regs,&regs);
- isr->sel = regs.x.cx;
- isr->off = regs.e.edx;
-}
-
-void PMAPI PM_setPMvect(int intno, PM_intHandler isr)
-{
- PMSREGS sregs;
- PMREGS regs;
-
- PM_saveDS();
- regs.x.ax = 0x205; /* Set protected mode vector */
- regs.h.bl = intno;
- PM_segread(&sregs);
- regs.x.cx = sregs.cs;
- regs.e.edx = (uint)isr;
- PM_int386(0x31,&regs,&regs);
-}
-
-void PMAPI PM_restorePMvect(int intno, PMFARPTR isr)
-{
- PMREGS regs;
-
- regs.x.ax = 0x205;
- regs.h.bl = intno;
- regs.x.cx = isr.sel;
- regs.e.edx = isr.off;
- PM_int386(0x31,&regs,&regs);
-}
-#endif
-
-/*-------------------------------------------------------------------------*/
-/* Watcom C/C++ with Rational DOS/4GW support. */
-/*-------------------------------------------------------------------------*/
-
-#ifdef DOS4GW
-#define GENERIC_DPMI32 /* Use generic 32 bit DPMI routines */
-
-#define MOUSE_SUPPORTED /* DOS4GW directly supports mouse */
-
-/* We use the normal DOS services to save and restore interrupts handlers
- * for Watcom C++, because using the direct DPMI functions does not
- * appear to work properly. At least if we use the DPMI functions, we
- * dont get the auto-passup feature that we need to correctly trap
- * real and protected mode interrupts without installing Bi-model
- * interrupt handlers.
- */
-
-void PMAPI PM_getPMvect(int intno, PMFARPTR *isr)
-{
- PMREGS regs;
- PMSREGS sregs;
-
- PM_segread(&sregs);
- regs.h.ah = 0x35;
- regs.h.al = intno;
- PM_int386x(0x21,&regs,&regs,&sregs);
- isr->sel = sregs.es;
- isr->off = regs.e.ebx;
-}
-
-void PMAPI PM_setPMvect(int intno, PM_intHandler isr)
-{
- PMREGS regs;
- PMSREGS sregs;
-
- PM_saveDS();
- PM_segread(&sregs);
- regs.h.ah = 0x25;
- regs.h.al = intno;
- sregs.ds = sregs.cs;
- regs.e.edx = (uint)isr;
- PM_int386x(0x21,&regs,&regs,&sregs);
-}
-
-void PMAPI PM_restorePMvect(int intno, PMFARPTR isr)
-{
- PMREGS regs;
- PMSREGS sregs;
-
- PM_segread(&sregs);
- regs.h.ah = 0x25;
- regs.h.al = intno;
- sregs.ds = isr.sel;
- regs.e.edx = isr.off;
- PM_int386x(0x21,&regs,&regs,&sregs);
-}
-
-int PMAPI PM_setMouseHandler(int mask, PM_mouseHandler mh)
-{
- lockPMHandlers(); /* Ensure our handlers are locked */
-
- _PM_mouseHandler = mh;
- _PM_setMouseHandler(_PM_mouseMask = mask);
- return 1;
-}
-
-void PMAPI PM_restoreMouseHandler(void)
-{
- PMREGS regs;
-
- if (_PM_mouseHandler) {
- regs.x.ax = 33;
- PM_int386(0x33, &regs, &regs);
- _PM_mouseHandler = NULL;
- }
-}
-
-#endif
-
-/*-------------------------------------------------------------------------*/
-/* DJGPP port of GNU C++ support. */
-/*-------------------------------------------------------------------------*/
-
-#ifdef DJGPP
-#define GENERIC_DPMI32 /* Use generic 32 bit DPMI routines */
-
-void PMAPI PM_getPMvect(int intno, PMFARPTR *isr)
-{
- PMREGS regs;
-
- regs.x.ax = 0x204;
- regs.h.bl = intno;
- PM_int386(0x31,&regs,&regs);
- isr->sel = regs.x.cx;
- isr->off = regs.e.edx;
-}
-
-void PMAPI PM_setPMvect(int intno, PM_intHandler isr)
-{
- PMSREGS sregs;
- PMREGS regs;
-
- PM_saveDS();
- regs.x.ax = 0x205; /* Set protected mode vector */
- regs.h.bl = intno;
- PM_segread(&sregs);
- regs.x.cx = sregs.cs;
- regs.e.edx = (uint)isr;
- PM_int386(0x31,&regs,&regs);
-}
-
-void PMAPI PM_restorePMvect(int intno, PMFARPTR isr)
-{
- PMREGS regs;
-
- regs.x.ax = 0x205;
- regs.h.bl = intno;
- regs.x.cx = isr.sel;
- regs.e.edx = isr.off;
- PM_int386(0x31,&regs,&regs);
-}
-
-#endif
-
-/*-------------------------------------------------------------------------*/
-/* Generic 32 bit DPMI routines */
-/*-------------------------------------------------------------------------*/
-
-#if defined(GENERIC_DPMI32)
-
-static long prevRealBreak; /* Previous real mode break handler */
-static long prevRealCtrlC; /* Previous real mode CtrlC handler */
-static long prevRealCritical; /* Prev real mode critical handler */
-
-#ifndef MOUSE_SUPPORTED
-
-/* The following real mode routine is used to call a 32 bit protected
- * mode FAR function from real mode. We use this for passing up control
- * from the real mode mouse callback to our protected mode code.
- */
-
-static long mouseRMCB; /* Mouse real mode callback address */
-static uchar *mousePtr;
-static char mouseRegs[0x32]; /* Real mode regs for mouse callback */
-static uchar mouseHandler[] = {
- 0x00,0x00,0x00,0x00, /* _realRMCB */
- 0x2E,0xFF,0x1E,0x00,0x00, /* call [cs:_realRMCB] */
- 0xCB, /* retf */
- };
-
-int PMAPI PM_setMouseHandler(int mask, PM_mouseHandler mh)
-{
- RMREGS regs;
- RMSREGS sregs;
- uint rseg,roff;
-
- lockPMHandlers(); /* Ensure our handlers are locked */
-
- /* Copy the real mode handler to real mode memory */
- if ((mousePtr = PM_allocRealSeg(sizeof(mouseHandler),&rseg,&roff)) == NULL)
- return 0;
- memcpy(mousePtr,mouseHandler,sizeof(mouseHandler));
- if (!_DPMI_allocateCallback(_PM_mousePMCB, mouseRegs, &mouseRMCB))
- PM_fatalError("Unable to allocate real mode callback!\n");
- PM_setLong(mousePtr,mouseRMCB);
-
- /* Install the real mode mouse handler */
- _PM_mouseHandler = mh;
- sregs.es = rseg;
- regs.x.dx = roff+4;
- regs.x.cx = _PM_mouseMask = mask;
- regs.x.ax = 0xC;
- PM_int86x(0x33, &regs, &regs, &sregs);
- return 1;
-}
-
-void PMAPI PM_restoreMouseHandler(void)
-{
- RMREGS regs;
-
- if (_PM_mouseHandler) {
- regs.x.ax = 33;
- PM_int86(0x33, &regs, &regs);
- PM_freeRealSeg(mousePtr);
- _DPMI_freeCallback(mouseRMCB);
- _PM_mouseHandler = NULL;
- }
-}
-
-#endif
-
-static void getISR(int intno, PMFARPTR *pmisr, long *realisr)
-{
- PM_getPMvect(intno,pmisr);
- _PM_getRMvect(intno,realisr);
-}
-
-static void restoreISR(int intno, PMFARPTR pmisr, long realisr)
-{
- _PM_setRMvect(intno,realisr);
- PM_restorePMvect(intno,pmisr);
-}
-
-static void setISR(int intno, void (* PMAPI pmisr)())
-{
- lockPMHandlers(); /* Ensure our handlers are locked */
- PM_setPMvect(intno,pmisr);
-}
-
-void PMAPI PM_setTimerHandler(PM_intHandler th)
-{
- getISR(0x8, &_PM_prevTimer, &_PM_prevRealTimer);
- _PM_timerHandler = th;
- setISR(0x8, _PM_timerISR);
-}
-
-void PMAPI PM_restoreTimerHandler(void)
-{
- if (_PM_timerHandler) {
- restoreISR(0x8, _PM_prevTimer, _PM_prevRealTimer);
- _PM_timerHandler = NULL;
- }
-}
-
-ibool PMAPI PM_setRealTimeClockHandler(PM_intHandler th,int frequency)
-{
- /* Save the old CMOS real time clock values */
- _PM_oldCMOSRegA = _PM_readCMOS(0x0A);
- _PM_oldCMOSRegB = _PM_readCMOS(0x0B);
-
- /* Set the real time clock interrupt handler */
- getISR(0x70, &_PM_prevRTC, &_PM_prevRealRTC);
- _PM_rtcHandler = th;
- setISR(0x70, _PM_rtcISR);
-
- /* Program the real time clock default frequency */
- PM_setRealTimeClockFrequency(frequency);
-
- /* Unmask IRQ8 in the PIC2 */
- _PM_oldRTCPIC2 = PM_inpb(0xA1);
- PM_outpb(0xA1,_PM_oldRTCPIC2 & 0xFE);
- return true;
-}
-
-void PMAPI PM_restoreRealTimeClockHandler(void)
-{
- if (_PM_rtcHandler) {
- /* Restore CMOS registers and mask RTC clock */
- _PM_writeCMOS(0x0A,_PM_oldCMOSRegA);
- _PM_writeCMOS(0x0B,_PM_oldCMOSRegB);
- PM_outpb(0xA1,(PM_inpb(0xA1) & 0xFE) | (_PM_oldRTCPIC2 & ~0xFE));
-
- /* Restore the interrupt vector */
- restoreISR(0x70, _PM_prevRTC, _PM_prevRealRTC);
- _PM_rtcHandler = NULL;
- }
-}
-
-PM_IRQHandle PMAPI PM_setIRQHandler(
- int IRQ,
- PM_irqHandler ih)
-{
- int thunkSize,PICmask,chainPrevious;
- ulong offsetAdjust;
- _PM_IRQHandle *handle;
-
- thunkSize = (ulong)_PM_irqISRTemplateEnd - (ulong)_PM_irqISRTemplate;
- if ((handle = PM_malloc(sizeof(_PM_IRQHandle) + thunkSize)) == NULL)
- return NULL;
- handle->IRQ = IRQ;
- handle->prevPIC = PM_inpb(0x21);
- handle->prevPIC2 = PM_inpb(0xA1);
- if (IRQ < 8) {
- handle->IRQVect = (IRQ + 8);
- PICmask = (1 << IRQ);
- chainPrevious = ((handle->prevPIC & PICmask) == 0);
- }
- else {
- handle->IRQVect = (0x60 + IRQ + 8);
- PICmask = ((1 << IRQ) | 0x4);
- chainPrevious = ((handle->prevPIC2 & (PICmask >> 8)) == 0);
- }
-
- /* Copy and setup the assembler thunk */
- offsetAdjust = (ulong)handle->thunk - (ulong)_PM_irqISRTemplate;
- memcpy(handle->thunk,_PM_irqISRTemplate,thunkSize);
- *((ulong*)&handle->thunk[2]) = offsetAdjust;
- *((ulong*)&handle->thunk[11+0]) = (ulong)ih;
- if (chainPrevious) {
- *((ulong*)&handle->thunk[11+4]) = handle->prevHandler.off;
- *((ulong*)&handle->thunk[11+8]) = handle->prevHandler.sel;
- }
- else {
- *((ulong*)&handle->thunk[11+4]) = 0;
- *((ulong*)&handle->thunk[11+8]) = 0;
- }
- *((ulong*)&handle->thunk[11+12]) = IRQ;
-
- /* Set the real time clock interrupt handler */
- getISR(handle->IRQVect, &handle->prevHandler, &handle->prevRealhandler);
- setISR(handle->IRQVect, (PM_intHandler)handle->thunk);
-
- /* Unmask the IRQ in the PIC */
- PM_outpb(0xA1,handle->prevPIC2 & ~(PICmask >> 8));
- PM_outpb(0x21,handle->prevPIC & ~PICmask);
- return handle;
-}
-
-void PMAPI PM_restoreIRQHandler(
- PM_IRQHandle irqHandle)
-{
- int PICmask;
- _PM_IRQHandle *handle = irqHandle;
-
- /* Restore PIC mask for the interrupt */
- if (handle->IRQ < 8)
- PICmask = (1 << handle->IRQ);
- else
- PICmask = ((1 << handle->IRQ) | 0x4);
- PM_outpb(0xA1,(PM_inpb(0xA1) & ~(PICmask >> 8)) | (handle->prevPIC2 & (PICmask >> 8)));
- PM_outpb(0x21,(PM_inpb(0x21) & ~PICmask) | (handle->prevPIC & PICmask));
-
- /* Restore the interrupt vector */
- restoreISR(handle->IRQVect, handle->prevHandler, handle->prevRealhandler);
-
- /* Finally free the thunk */
- PM_free(handle);
-}
-
-void PMAPI PM_setKeyHandler(PM_intHandler kh)
-{
- getISR(0x9, &_PM_prevKey, &_PM_prevRealKey);
- _PM_keyHandler = kh;
- setISR(0x9, _PM_keyISR);
-}
-
-void PMAPI PM_restoreKeyHandler(void)
-{
- if (_PM_keyHandler) {
- restoreISR(0x9, _PM_prevKey, _PM_prevRealKey);
- _PM_keyHandler = NULL;
- }
-}
-
-void PMAPI PM_setKey15Handler(PM_key15Handler kh)
-{
- getISR(0x15, &_PM_prevKey15, &_PM_prevRealKey15);
- _PM_key15Handler = kh;
- setISR(0x15, _PM_key15ISR);
-}
-
-void PMAPI PM_restoreKey15Handler(void)
-{
- if (_PM_key15Handler) {
- restoreISR(0x15, _PM_prevKey15, _PM_prevRealKey15);
- _PM_key15Handler = NULL;
- }
-}
-
-/* Real mode Ctrl-C and Ctrl-Break handler. This handler simply sets a
- * flag in the real mode code segment and exit. We save the location
- * of this flag in real mode memory so that both the real mode and
- * protected mode code will be modifying the same flags.
- */
-
-#ifndef DOS4GW
-static uchar ctrlHandler[] = {
- 0x00,0x00,0x00,0x00, /* ctrlBFlag */
- 0x66,0x2E,0xC7,0x06,0x00,0x00,
- 0x01,0x00,0x00,0x00, /* mov [cs:ctrlBFlag],1 */
- 0xCF, /* iretf */
- };
-#endif
-
-void PMAPI PM_installAltBreakHandler(PM_breakHandler bh)
-{
-#ifndef DOS4GW
- uint rseg,roff;
-#else
- static int ctrlCFlag,ctrlBFlag;
-
- _PM_ctrlCPtr = (uchar*)&ctrlCFlag;
- _PM_ctrlBPtr = (uchar*)&ctrlBFlag;
-#endif
-
- getISR(0x1B, &_PM_prevBreak, &prevRealBreak);
- getISR(0x23, &_PM_prevCtrlC, &prevRealCtrlC);
- _PM_breakHandler = bh;
- setISR(0x1B, _PM_breakISR);
- setISR(0x23, _PM_ctrlCISR);
-
-#ifndef DOS4GW
- /* Hook the real mode vectors for these handlers, as these are not
- * normally reflected by the DPMI server up to protected mode
- */
- _PM_ctrlBPtr = PM_allocRealSeg(sizeof(ctrlHandler)*2, &rseg, &roff);
- memcpy(_PM_ctrlBPtr,ctrlHandler,sizeof(ctrlHandler));
- memcpy(_PM_ctrlBPtr+sizeof(ctrlHandler),ctrlHandler,sizeof(ctrlHandler));
- _PM_ctrlCPtr = _PM_ctrlBPtr + sizeof(ctrlHandler);
- _PM_setRMvect(0x1B,((long)rseg << 16) | (roff+4));
- _PM_setRMvect(0x23,((long)rseg << 16) | (roff+sizeof(ctrlHandler)+4));
-#endif
-}
-
-void PMAPI PM_installBreakHandler(void)
-{
- PM_installAltBreakHandler(NULL);
-}
-
-void PMAPI PM_restoreBreakHandler(void)
-{
- if (_PM_prevBreak.sel) {
- restoreISR(0x1B, _PM_prevBreak, prevRealBreak);
- restoreISR(0x23, _PM_prevCtrlC, prevRealCtrlC);
- _PM_prevBreak.sel = 0;
- _PM_breakHandler = NULL;
-#ifndef DOS4GW
- PM_freeRealSeg(_PM_ctrlBPtr);
-#endif
- }
-}
-
-/* Real mode Critical Error handler. This handler simply saves the AX and
- * DI values in the real mode code segment and exits. We save the location
- * of this flag in real mode memory so that both the real mode and
- * protected mode code will be modifying the same flags.
- */
-
-#ifndef DOS4GW
-static uchar criticalHandler[] = {
- 0x00,0x00, /* axCode */
- 0x00,0x00, /* diCode */
- 0x2E,0xA3,0x00,0x00, /* mov [cs:axCode],ax */
- 0x2E,0x89,0x3E,0x02,0x00, /* mov [cs:diCode],di */
- 0xB8,0x03,0x00, /* mov ax,3 */
- 0xCF, /* iretf */
- };
-#endif
-
-void PMAPI PM_installAltCriticalHandler(PM_criticalHandler ch)
-{
-#ifndef DOS4GW
- uint rseg,roff;
-#else
- static short critBuf[2];
-
- _PM_critPtr = (uchar*)critBuf;
-#endif
-
- getISR(0x24, &_PM_prevCritical, &prevRealCritical);
- _PM_critHandler = ch;
- setISR(0x24, _PM_criticalISR);
-
-#ifndef DOS4GW
- /* Hook the real mode vector, as this is not normally reflected by the
- * DPMI server up to protected mode.
- */
- _PM_critPtr = PM_allocRealSeg(sizeof(criticalHandler)*2, &rseg, &roff);
- memcpy(_PM_critPtr,criticalHandler,sizeof(criticalHandler));
- _PM_setRMvect(0x24,((long)rseg << 16) | (roff+4));
-#endif
-}
-
-void PMAPI PM_installCriticalHandler(void)
-{
- PM_installAltCriticalHandler(NULL);
-}
-
-void PMAPI PM_restoreCriticalHandler(void)
-{
- if (_PM_prevCritical.sel) {
- restoreISR(0x24, _PM_prevCritical, prevRealCritical);
- PM_freeRealSeg(_PM_critPtr);
- _PM_prevCritical.sel = 0;
- _PM_critHandler = NULL;
- }
-}
-
-int PMAPI PM_lockDataPages(void *p,uint len,PM_lockHandle *lh)
-{
- PMSREGS sregs;
- PM_segread(&sregs);
- return DPMI_lockLinearPages((uint)p + DPMI_getSelectorBase(sregs.ds),len);
-}
-
-int PMAPI PM_unlockDataPages(void *p,uint len,PM_lockHandle *lh)
-{
- PMSREGS sregs;
- PM_segread(&sregs);
- return DPMI_unlockLinearPages((uint)p + DPMI_getSelectorBase(sregs.ds),len);
-}
-
-int PMAPI PM_lockCodePages(void (*p)(),uint len,PM_lockHandle *lh)
-{
- PMSREGS sregs;
- PM_segread(&sregs);
- return DPMI_lockLinearPages((uint)p + DPMI_getSelectorBase(sregs.cs),len);
-}
-
-int PMAPI PM_unlockCodePages(void (*p)(),uint len,PM_lockHandle *lh)
-{
- PMSREGS sregs;
- PM_segread(&sregs);
- return DPMI_unlockLinearPages((uint)p + DPMI_getSelectorBase(sregs.cs),len);
-}
-
-#endif
diff --git a/board/MAI/bios_emulator/scitech/src/pm/dos/vflat.c b/board/MAI/bios_emulator/scitech/src/pm/dos/vflat.c
deleted file mode 100644
index c3e9b6c33f..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/dos/vflat.c
+++ /dev/null
@@ -1,251 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: 32-bit DOS
-*
-* Description: Main C module for the VFlat framebuffer routines. The page
-* fault handler is always installed to handle up to a 4Mb
-* framebuffer with a window size of 4Kb or 64Kb in size.
-*
-****************************************************************************/
-
-#include "pmapi.h"
-#include <stdlib.h>
-#include <dos.h>
-
-/*-------------------------------------------------------------------------*/
-/* DOS4G/W, PMODE/W and CauseWay support. */
-/*-------------------------------------------------------------------------*/
-
-#if defined(DOS4GW)
-
-#define VFLAT_START_ADDR 0xF0000000U
-#define VFLAT_END_ADDR 0xF03FFFFFU
-#define VFLAT_LIMIT (VFLAT_END_ADDR - VFLAT_START_ADDR)
-#define PAGE_PRESENT 1
-#define PAGE_NOTPRESENT 0
-#define PAGE_READ 0
-#define PAGE_WRITE 2
-
-PRIVATE ibool installed = false;
-PRIVATE ibool haveDPMI = false;
-PUBLIC ibool _ASMAPI VF_haveCauseWay = false;
-PUBLIC uchar * _ASMAPI VF_zeroPtr = NULL;
-
-/* Low level assembler code */
-
-int _ASMAPI InitPaging(void);
-void _ASMAPI ClosePaging(void);
-void _ASMAPI MapPhysical2Linear(ulong pAddr, ulong lAddr, int pages, int flags);
-void _ASMAPI InstallFaultHandler(ulong baseAddr,int bankSize);
-void _ASMAPI RemoveFaultHandler(void);
-void _ASMAPI InstallBankFunc(int codeLen,void *bankFunc);
-
-void * _ASMAPI VF_malloc(uint size)
-{ return PM_malloc(size); }
-
-void _ASMAPI VF_free(void *p)
-{ PM_free(p); }
-
-PRIVATE ibool CheckDPMI(void)
-/****************************************************************************
-*
-* Function: CheckDPMI
-* Returns: True if we are running under DPMI
-*
-****************************************************************************/
-{
- PMREGS regs;
-
- if (haveDPMI)
- return true;
-
- /* Check if we are running under DPMI in which case we will not be
- * able to install our page fault handlers. We can however use the
- * DVA.386 or VFLATD.386 virtual device drivers if they are present.
- */
- regs.x.ax = 0xFF00;
- PM_int386(0x31,&regs,&regs);
- if (!regs.x.cflag && (regs.e.edi & 8))
- return (haveDPMI = true);
- return false;
-}
-
-ibool PMAPI VF_available(void)
-/****************************************************************************
-*
-* Function: VF_available
-* Returns: True if virtual buffer is available, false if not.
-*
-****************************************************************************/
-{
- if (!VF_zeroPtr)
- VF_zeroPtr = PM_mapPhysicalAddr(0,0xFFFFFFFF,true);
- if (CheckDPMI())
- return false;
-
- /* Standard DOS4GW, PMODE/W and Causeway */
- if (InitPaging() == -1)
- return false;
- ClosePaging();
- return true;
-}
-
-void * PMAPI InitDPMI(ulong baseAddr,int bankSize,int codeLen,void *bankFunc)
-/****************************************************************************
-*
-* Function: InitDOS4GW
-* Parameters: baseAddr - Base address of framebuffer bank window
-* bankSize - Physical size of banks in Kb (4 or 64)
-* codeLen - Length of 32 bit bank switch function
-* bankFunc - Pointer to protected mode bank function
-* Returns: Near pointer to virtual framebuffer, or NULL on failure.
-*
-* Description: Installs the virtual linear framebuffer handling for
-* DPMI environments. This requires the DVA.386 or VFLATD.386
-* virtual device drivers to be installed and functioning.
-*
-****************************************************************************/
-{
- (void)baseAddr;
- (void)bankSize;
- (void)codeLen;
- (void)bankFunc;
- return NULL;
-}
-
-void * PMAPI InitDOS4GW(ulong baseAddr,int bankSize,int codeLen,void *bankFunc)
-/****************************************************************************
-*
-* Function: InitDOS4GW
-* Parameters: baseAddr - Base address of framebuffer bank window
-* bankSize - Physical size of banks in Kb (4 or 64)
-* codeLen - Length of 32 bit bank switch function
-* bankFunc - Pointer to protected mode bank function
-* Returns: Near pointer to virtual framebuffer, or NULL on failure.
-*
-* Description: Installs the virtual linear framebuffer handling for
-* the DOS4GW extender.
-*
-****************************************************************************/
-{
- int i;
-
- if (InitPaging() == -1)
- return NULL; /* Cannot do hardware paging! */
-
- /* Map 4MB of video memory into linear address space (read/write) */
- if (bankSize == 64) {
- for (i = 0; i < 64; i++) {
- MapPhysical2Linear(baseAddr,VFLAT_START_ADDR+(i<<16),16,
- PAGE_WRITE | PAGE_NOTPRESENT);
- }
- }
- else {
- for (i = 0; i < 1024; i++) {
- MapPhysical2Linear(baseAddr,VFLAT_START_ADDR+(i<<12),1,
- PAGE_WRITE | PAGE_NOTPRESENT);
- }
- }
-
- /* Install our page fault handler and banks switch function */
- InstallFaultHandler(baseAddr,bankSize);
- InstallBankFunc(codeLen,bankFunc);
- installed = true;
- return (void*)VFLAT_START_ADDR;
-}
-
-void * PMAPI VF_init(ulong baseAddr,int bankSize,int codeLen,void *bankFunc)
-/****************************************************************************
-*
-* Function: VF_init
-* Parameters: baseAddr - Base address of framebuffer bank window
-* bankSize - Physical size of banks in Kb (4 or 64)
-* codeLen - Length of 32 bit bank switch function
-* bankFunc - Pointer to protected mode bank function
-* Returns: Near pointer to virtual framebuffer, or NULL on failure.
-*
-* Description: Installs the virtual linear framebuffer handling.
-*
-****************************************************************************/
-{
- if (installed)
- return (void*)VFLAT_START_ADDR;
- if (codeLen > 100)
- return NULL; /* Bank function is too large! */
- if (!VF_zeroPtr)
- VF_zeroPtr = PM_mapPhysicalAddr(0,0xFFFFFFFF,true);
- if (CheckDPMI())
- return InitDPMI(baseAddr,bankSize,codeLen,bankFunc);
- return InitDOS4GW(baseAddr,bankSize,codeLen,bankFunc);
-}
-
-void PMAPI VF_exit(void)
-/****************************************************************************
-*
-* Function: VF_exit
-*
-* Description: Closes down the virtual framebuffer services and
-* restores the previous page fault handler.
-*
-****************************************************************************/
-{
- if (installed) {
- if (haveDPMI) {
- /* DPMI support */
- }
- else {
- /* Standard DOS4GW and PMODE/W support */
- RemoveFaultHandler();
- ClosePaging();
- }
- installed = false;
- }
-}
-
-/*-------------------------------------------------------------------------*/
-/* Support mapped out for other compilers. */
-/*-------------------------------------------------------------------------*/
-
-#else
-
-ibool PMAPI VF_available(void)
-{
- return false;
-}
-
-void * PMAPI VF_init(ulong baseAddr,int bankSize,int codeLen,void *bankFunc)
-{
- (void)baseAddr;
- (void)bankSize;
- (void)codeLen;
- (void)bankFunc;
- return NULL;
-}
-
-void PMAPI VF_exit(void)
-{
-}
-
-#endif
diff --git a/board/MAI/bios_emulator/scitech/src/pm/dos/ztimer.c b/board/MAI/bios_emulator/scitech/src/pm/dos/ztimer.c
deleted file mode 100644
index 53ab16cf40..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/dos/ztimer.c
+++ /dev/null
@@ -1,111 +0,0 @@
-/****************************************************************************
-*
-* Ultra Long Period Timer
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: MSDOS
-*
-* Description: OS specific implementation for the Zen Timer functions.
-*
-****************************************************************************/
-
-
-/*---------------------------- Global variables ---------------------------*/
-
-uchar * _VARAPI _ZTimerBIOSPtr;
-
-/*----------------------------- Implementation ----------------------------*/
-
-/* External assembler functions */
-
-void _ASMAPI LZ_timerOn(void);
-ulong _ASMAPI LZ_timerLap(void);
-void _ASMAPI LZ_timerOff(void);
-ulong _ASMAPI LZ_timerCount(void);
-void _ASMAPI LZ_disable(void);
-void _ASMAPI LZ_enable(void);
-
-/****************************************************************************
-REMARKS:
-Initialise the Zen Timer module internals.
-****************************************************************************/
-void __ZTimerInit(void)
-{
- _ZTimerBIOSPtr = PM_getBIOSPointer();
-}
-
-/****************************************************************************
-REMARKS:
-Call the assembler Zen Timer functions to do the timing.
-****************************************************************************/
-#define __LZTimerOn(tm) LZ_timerOn()
-
-/****************************************************************************
-REMARKS:
-Call the assembler Zen Timer functions to do the timing.
-****************************************************************************/
-#define __LZTimerLap(tm) LZ_timerLap()
-
-/****************************************************************************
-REMARKS:
-Call the assembler Zen Timer functions to do the timing.
-****************************************************************************/
-#define __LZTimerOff(tm) LZ_timerOff()
-
-/****************************************************************************
-REMARKS:
-Call the assembler Zen Timer functions to do the timing.
-****************************************************************************/
-#define __LZTimerCount(tm) LZ_timerCount()
-
-/****************************************************************************
-REMARKS:
-Define the resolution of the long period timer as microseconds per timer tick.
-****************************************************************************/
-#define ULZTIMER_RESOLUTION 54925
-
-/****************************************************************************
-REMARKS:
-Read the Long Period timer value from the BIOS timer tick.
-****************************************************************************/
-static ulong __ULZReadTime(void)
-{
- ulong ticks;
- LZ_disable(); /* Turn of interrupts */
- ticks = PM_getLong(_ZTimerBIOSPtr+0x6C);
- LZ_enable(); /* Turn on interrupts again */
- return ticks;
-}
-
-/****************************************************************************
-REMARKS:
-Compute the elapsed time from the BIOS timer tick. Note that we check to see
-whether a midnight boundary has passed, and if so adjust the finish time to
-account for this. We cannot detect if more that one midnight boundary has
-passed, so if this happens we will be generating erronous results.
-****************************************************************************/
-ulong __ULZElapsedTime(ulong start,ulong finish)
-{
- if (finish < start)
- finish += 1573040L; /* Number of ticks in 24 hours */
- return finish - start;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/event.c b/board/MAI/bios_emulator/scitech/src/pm/event.c
deleted file mode 100644
index b6f458654b..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/event.c
+++ /dev/null
@@ -1,1115 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-*
-* Description: Main implementation for the SciTech cross platform event
-* library. This module contains all the generic cross platform
-* code, and pulls in modules specific to each target OS
-* environment.
-*
-****************************************************************************/
-
-#include "event.h"
-#include "pmapi.h"
-#include <time.h>
-#include <signal.h>
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include "oshdr.h"
-
-/*--------------------------- Global variables ----------------------------*/
-
-#define EVENTQSIZE 100 /* Number of events in event queue */
-#define JOY_NUM_AXES 4 /* Number of joystick axes supported */
-
-static struct {
- int mx,my; /* Current mouse position */
- int head; /* Head of event queue */
- int tail; /* Tail of event queue */
- int freeHead; /* Head of free list */
- int count; /* No. of items currently in queue */
- event_t evtq[EVENTQSIZE]; /* The queue structure itself */
- int oldMove; /* Previous movement event */
- int oldKey; /* Previous key repeat event */
- int oldJoyMove; /* Previous joystick movement event */
- int joyMask; /* Mask of joystick axes present */
- int joyMin[JOY_NUM_AXES];
- int joyCenter[JOY_NUM_AXES];
- int joyMax[JOY_NUM_AXES];
- int joyPrev[JOY_NUM_AXES];
- int joyButState;
- ulong doubleClick;
- ulong autoRepeat;
- ulong autoDelay;
- ulong autoTicks;
- ulong doubleClickThresh;
- ulong firstAuto;
- int autoMouse_x;
- int autoMouse_y;
- event_t downMouse;
- ulong keyModifiers; /* Current keyboard modifiers */
- uchar keyTable[128]; /* Table of key up/down flags */
- ibool allowLEDS; /* True if LEDS should change */
- _EVT_userEventFilter userEventCallback;
- _EVT_mouseMoveHandler mouseMove;
- _EVT_heartBeatCallback heartBeat;
- void *heartBeatParams;
- codepage_t *codePage;
- } EVT;
-
-/*---------------------------- Implementation -----------------------------*/
-
-#if defined(__REALDOS__) || defined(__SMX32__)
-/* {secret} */
-void EVTAPI _EVT_cCodeStart(void) {}
-#endif
-
-/* External assembler functions */
-
-int EVTAPI _EVT_readJoyAxis(int mask,int *axis);
-int EVTAPI _EVT_readJoyButtons(void);
-
-/* Forward declaration */
-
-ulong _EVT_getTicks(void);
-
-/****************************************************************************
-PARAMETERS:
-evt - Event to add to the event queue
-
-REMARKS:
-Adds an event to the event queue by tacking it onto the tail of the event
-queue. This routine assumes that at least one spot is available on the
-freeList for the event to be inserted.
-
-NOTE: Interrupts MUST be OFF while this routine is called to ensure we have
- mutually exclusive access to our internal data structures for
- interrupt driven systems (like under DOS).
-****************************************************************************/
-static void addEvent(
- event_t *evt)
-{
- int evtID;
-
- /* Check for mouse double click events */
- if (evt->what & EVT_MOUSEEVT) {
- EVT.autoMouse_x = evt->where_x;
- EVT.autoMouse_y = evt->where_y;
- if ((evt->what & EVT_MOUSEDOWN) && !(evt->message & EVT_DBLCLICK)) {
- /* Determine if the last mouse event was a double click event */
- uint diff_x = ABS(evt->where_x - EVT.downMouse.where_x);
- uint diff_y = ABS(evt->where_y - EVT.downMouse.where_y);
- if ((evt->message == EVT.downMouse.message)
- && ((evt->when - EVT.downMouse.when) <= EVT.doubleClick)
- && (diff_x <= EVT.doubleClickThresh)
- && (diff_y <= EVT.doubleClickThresh)) {
- evt->message |= EVT_DBLCLICK;
- EVT.downMouse = *evt;
- EVT.downMouse.when = 0;
- }
- else
- EVT.downMouse = *evt;
- EVT.autoTicks = _EVT_getTicks();
- }
- else if (evt->what & EVT_MOUSEUP) {
- EVT.downMouse.what = EVT_NULLEVT;
- EVT.firstAuto = true;
- }
- }
-
- /* Call user supplied callback to modify the event if desired */
- if (EVT.userEventCallback) {
- if (!EVT.userEventCallback(evt))
- return;
- }
-
- /* Get spot to place the event from the free list */
- evtID = EVT.freeHead;
- EVT.freeHead = EVT.evtq[EVT.freeHead].next;
-
- /* Add to the EVT.tail of the event queue */
- evt->next = -1;
- evt->prev = EVT.tail;
- if (EVT.tail != -1)
- EVT.evtq[EVT.tail].next = evtID;
- else
- EVT.head = evtID;
- EVT.tail = evtID;
- EVT.evtq[evtID] = *evt;
- EVT.count++;
-}
-
-/****************************************************************************
-REMARKS:
-Internal function to initialise the event queue to the empty state.
-****************************************************************************/
-static void initEventQueue(void)
-{
- int i;
-
- /* Build free list, and initialize global data structures */
- for (i = 0; i < EVENTQSIZE; i++)
- EVT.evtq[i].next = i+1;
- EVT.evtq[EVENTQSIZE-1].next = -1; /* Terminate list */
- EVT.count = EVT.freeHead = 0;
- EVT.head = EVT.tail = -1;
- EVT.oldMove = -1;
- EVT.oldKey = -1;
- EVT.oldJoyMove = -1;
- EVT.joyButState = 0;
- EVT.mx = EVT.my = 0;
- EVT.keyModifiers = 0;
- EVT.allowLEDS = true;
-
- /* Set default values for mouse double click and mouse auto events */
- EVT.doubleClick = 440;
- EVT.autoRepeat = 55;
- EVT.autoDelay = 330;
- EVT.autoTicks = 0;
- EVT.doubleClickThresh = 5;
- EVT.firstAuto = true;
- EVT.autoMouse_x = EVT.autoMouse_y = 0;
- memset(&EVT.downMouse,0,sizeof(EVT.downMouse));
-
- /* Setup default pointers for event library */
- EVT.userEventCallback = NULL;
- EVT.codePage = &_CP_US_English;
-
- /* Initialise the joystick module and do basic calibration (which assumes
- * the joystick is centered.
- */
- EVT.joyMask = EVT_joyIsPresent();
-}
-
-#if defined(NEED_SCALE_JOY_AXIS) || !defined(USE_OS_JOYSTICK)
-/****************************************************************************
-REMARKS:
-This function scales a joystick axis value to normalised form.
-****************************************************************************/
-static int scaleJoyAxis(
- int raw,
- int axis)
-{
- int scaled,range;
-
- /* Make sure the joystick is calibrated properly */
- if (EVT.joyCenter[axis] - EVT.joyMin[axis] < 5)
- return raw;
- if (EVT.joyMax[axis] - EVT.joyCenter[axis] < 5)
- return raw;
-
- /* Now scale the coordinates to -128 to 127 */
- raw -= EVT.joyCenter[axis];
- if (raw < 0)
- range = EVT.joyCenter[axis]-EVT.joyMin[axis];
- else
- range = EVT.joyMax[axis]-EVT.joyCenter[axis];
- scaled = (raw * 128) / range;
- if (scaled < -128)
- scaled = -128;
- if (scaled > 127)
- scaled = 127;
- return scaled;
-}
-#endif
-
-#if defined(__SMX32__)
-#include "smx/event.c"
-#elif defined(__RTTARGET__)
-#include "rttarget/event.c"
-#elif defined(__REALDOS__)
-#include "dos/event.c"
-#elif defined(__WINDOWS32__)
-#include "win32/event.c"
-#elif defined(__OS2__)
-#if defined(__OS2_PM__)
-#include "os2pm/event.c"
-#else
-#include "os2/event.c"
-#endif
-#elif defined(__LINUX__)
-#if defined(__USE_X11__)
-#include "x11/event.c"
-#else
-#include "linux/event.c"
-#endif
-#elif defined(__QNX__)
-#if defined(__USE_PHOTON__)
-#include "photon/event.c"
-#elif defined(__USE_X11__)
-#include "x11/event.c"
-#else
-#include "qnx/event.c"
-#endif
-#elif defined(__BEOS__)
-#include "beos/event.c"
-#else
-#error Event library not ported to this platform yet!
-#endif
-
-/*------------------------ Public interface routines ----------------------*/
-
-/* If USE_OS_JOYSTICK is defined, the OS specific libraries will implement
- * the joystick code rather than using the generic OS portable version.
- */
-
-#ifndef USE_OS_JOYSTICK
-/****************************************************************************
-DESCRIPTION:
-Returns the mask indicating what joystick axes are attached.
-
-HEADER:
-event.h
-
-REMARKS:
-This function is used to detect the attached joysticks, and determine
-what axes are present and functioning. This function will re-detect any
-attached joysticks when it is called, so if the user forgot to attach
-the joystick when the application started, you can call this function to
-re-detect any newly attached joysticks.
-
-SEE ALSO:
-EVT_joySetLowerRight, EVT_joySetCenter, EVT_joyIsPresent
-****************************************************************************/
-int EVTAPI EVT_joyIsPresent(void)
-{
- int mask,i;
-
- memset(EVT.joyMin,0,sizeof(EVT.joyMin));
- memset(EVT.joyCenter,0,sizeof(EVT.joyCenter));
- memset(EVT.joyMax,0,sizeof(EVT.joyMax));
- memset(EVT.joyPrev,0,sizeof(EVT.joyPrev));
- EVT.joyButState = 0;
-#ifdef __LINUX__
- PM_init();
-#endif
- mask = _EVT_readJoyAxis(EVT_JOY_AXIS_ALL,EVT.joyCenter);
- if (mask) {
- for (i = 0; i < JOY_NUM_AXES; i++)
- EVT.joyMax[i] = EVT.joyCenter[i]*2;
- }
- return mask;
-}
-
-/****************************************************************************
-DESCRIPTION:
-Polls the joystick for position and button information.
-
-HEADER:
-event.h
-
-REMARKS:
-This routine is used to poll analogue joysticks for button and position
-information. It should be called once for each main loop of the user
-application, just before processing all pending events via EVT_getNext.
-All information polled from the joystick will be posted to the event
-queue for later retrieval.
-
-Note: Most analogue joysticks will provide readings that change even
- though the joystick has not moved. Hence if you call this routine
- you will likely get an EVT_JOYMOVE event every time through your
- event loop.
-
-SEE ALSO:
-EVT_getNext, EVT_peekNext, EVT_joySetUpperLeft, EVT_joySetLowerRight,
-EVT_joySetCenter, EVT_joyIsPresent
-****************************************************************************/
-void EVTAPI EVT_pollJoystick(void)
-{
- event_t evt;
- int i,axis[JOY_NUM_AXES],newButState,mask,moved,ps;
-
- if (EVT.joyMask) {
- /* Read joystick axes and post movement events if they have
- * changed since the last time we polled. Until the events are
- * actually flushed, we keep modifying the same joystick movement
- * event, so you won't get multiple movement event
- */
- mask = _EVT_readJoyAxis(EVT.joyMask,axis);
- newButState = _EVT_readJoyButtons();
- moved = false;
- for (i = 0; i < JOY_NUM_AXES; i++) {
- if (mask & (EVT_JOY_AXIS_X1 << i))
- axis[i] = scaleJoyAxis(axis[i],i);
- else
- axis[i] = EVT.joyPrev[i];
- if (axis[i] != EVT.joyPrev[i])
- moved = true;
- }
- if (moved) {
- memcpy(EVT.joyPrev,axis,sizeof(EVT.joyPrev));
- ps = _EVT_disableInt();
- if (EVT.oldJoyMove != -1) {
- /* Modify the existing joystick movement event */
- EVT.evtq[EVT.oldJoyMove].message = newButState;
- EVT.evtq[EVT.oldJoyMove].where_x = EVT.joyPrev[0];
- EVT.evtq[EVT.oldJoyMove].where_y = EVT.joyPrev[1];
- EVT.evtq[EVT.oldJoyMove].relative_x = EVT.joyPrev[2];
- EVT.evtq[EVT.oldJoyMove].relative_y = EVT.joyPrev[3];
- }
- else if (EVT.count < EVENTQSIZE) {
- /* Add a new joystick movement event */
- EVT.oldJoyMove = EVT.freeHead;
- memset(&evt,0,sizeof(evt));
- evt.what = EVT_JOYMOVE;
- evt.message = EVT.joyButState;
- evt.where_x = EVT.joyPrev[0];
- evt.where_y = EVT.joyPrev[1];
- evt.relative_x = EVT.joyPrev[2];
- evt.relative_y = EVT.joyPrev[3];
- addEvent(&evt);
- }
- _EVT_restoreInt(ps);
- }
-
- /* Read the joystick buttons, and post events to reflect the change
- * in state for the joystick buttons.
- */
- if (newButState != EVT.joyButState) {
- if (EVT.count < EVENTQSIZE) {
- /* Add a new joystick click event */
- ps = _EVT_disableInt();
- memset(&evt,0,sizeof(evt));
- evt.what = EVT_JOYCLICK;
- evt.message = newButState;
- EVT.evtq[EVT.oldJoyMove].where_x = EVT.joyPrev[0];
- EVT.evtq[EVT.oldJoyMove].where_y = EVT.joyPrev[1];
- EVT.evtq[EVT.oldJoyMove].relative_x = EVT.joyPrev[2];
- EVT.evtq[EVT.oldJoyMove].relative_y = EVT.joyPrev[3];
- addEvent(&evt);
- _EVT_restoreInt(ps);
- }
- EVT.joyButState = newButState;
- }
- }
-}
-
-/****************************************************************************
-DESCRIPTION:
-Calibrates the joystick upper left position
-
-HEADER:
-event.h
-
-REMARKS:
-This function can be used to zero in on better joystick calibration factors,
-which may work better than the default simplistic calibration (which assumes
-the joystick is centered when the event library is initialised).
-To use this function, ask the user to hold the stick in the upper left
-position and then have them press a key or button. and then call this
-function. This function will then read the joystick and update the
-calibration factors.
-
-Usually, assuming that the stick was centered when the event library was
-initialized, you really only need to call EVT_joySetLowerRight since the
-upper left position is usually always 0,0 on most joysticks. However, the
-safest procedure is to call all three calibration functions.
-
-SEE ALSO:
-EVT_joySetUpperLeft, EVT_joySetLowerRight, EVT_joyIsPresent
-****************************************************************************/
-void EVTAPI EVT_joySetUpperLeft(void)
-{
- _EVT_readJoyAxis(EVT_JOY_AXIS_ALL,EVT.joyMin);
-}
-
-/****************************************************************************
-DESCRIPTION:
-Calibrates the joystick lower right position
-
-HEADER:
-event.h
-
-REMARKS:
-This function can be used to zero in on better joystick calibration factors,
-which may work better than the default simplistic calibration (which assumes
-the joystick is centered when the event library is initialised).
-To use this function, ask the user to hold the stick in the lower right
-position and then have them press a key or button. and then call this
-function. This function will then read the joystick and update the
-calibration factors.
-
-Usually, assuming that the stick was centered when the event library was
-initialized, you really only need to call EVT_joySetLowerRight since the
-upper left position is usually always 0,0 on most joysticks. However, the
-safest procedure is to call all three calibration functions.
-
-SEE ALSO:
-EVT_joySetUpperLeft, EVT_joySetCenter, EVT_joyIsPresent
-****************************************************************************/
-void EVTAPI EVT_joySetLowerRight(void)
-{
- _EVT_readJoyAxis(EVT_JOY_AXIS_ALL,EVT.joyMax);
-}
-
-/****************************************************************************
-DESCRIPTION:
-Calibrates the joystick center position
-
-HEADER:
-event.h
-
-REMARKS:
-This function can be used to zero in on better joystick calibration factors,
-which may work better than the default simplistic calibration (which assumes
-the joystick is centered when the event library is initialised).
-To use this function, ask the user to hold the stick in the center
-position and then have them press a key or button. and then call this
-function. This function will then read the joystick and update the
-calibration factors.
-
-Usually, assuming that the stick was centered when the event library was
-initialized, you really only need to call EVT_joySetLowerRight since the
-upper left position is usually always 0,0 on most joysticks. However, the
-safest procedure is to call all three calibration functions.
-
-SEE ALSO:
-EVT_joySetUpperLeft, EVT_joySetLowerRight, EVT_joySetCenter
-****************************************************************************/
-void EVTAPI EVT_joySetCenter(void)
-{
- _EVT_readJoyAxis(EVT_JOY_AXIS_ALL,EVT.joyCenter);
-}
-#endif
-
-/****************************************************************************
-DESCRIPTION:
-Posts a user defined event to the event queue
-
-HEADER:
-event.h
-
-RETURNS:
-True if event was posted, false if event queue is full.
-
-PARAMETERS:
-what - Type code for message to post
-message - Event specific message to post
-modifiers - Event specific modifier flags to post
-
-REMARKS:
-This routine is used to post user defined events to the event queue.
-
-SEE ALSO:
-EVT_flush, EVT_getNext, EVT_peekNext, EVT_halt
-****************************************************************************/
-ibool EVTAPI EVT_post(
- ulong which,
- ulong what,
- ulong message,
- ulong modifiers)
-{
- event_t evt;
- uint ps;
-
- if (EVT.count < EVENTQSIZE) {
- /* Save information in event record */
- ps = _EVT_disableInt();
- evt.which = which;
- evt.when = _EVT_getTicks();
- evt.what = what;
- evt.message = message;
- evt.modifiers = modifiers;
- addEvent(&evt); /* Add to EVT.tail of event queue */
- _EVT_restoreInt(ps);
- return true;
- }
- else
- return false;
-}
-
-/****************************************************************************
-DESCRIPTION:
-Flushes all events of a specified type from the event queue.
-
-PARAMETERS:
-mask - Mask specifying the types of events that should be removed
-
-HEADER:
-event.h
-
-REMARKS:
-Flushes (removes) all pending events of the specified type from the event
-queue. You may combine the masks for different event types with a simple
-logical OR.
-
-SEE ALSO:
-EVT_getNext, EVT_halt, EVT_peekNext
-****************************************************************************/
-void EVTAPI EVT_flush(
- ulong mask)
-{
- event_t evt;
-
- do { /* Flush all events */
- EVT_getNext(&evt,mask);
- } while (evt.what != EVT_NULLEVT);
-}
-
-/****************************************************************************
-DESCRIPTION:
-Halts until and event of the specified type is recieved.
-
-HEADER:
-event.h
-
-PARAMETERS:
-evt - Pointer to
-mask - Mask specifying the types of events that should be removed
-
-REMARKS:
-This functions halts exceution until an event of the specified type is
-recieved into the event queue. It does not flush the event queue of events
-before performing the busy loop. However this function does throw away
-any events other than the ones you have requested via the event mask, to
-avoid the event queue filling up with unwanted events (like EVT_KEYUP or
-EVT_MOUSEMOVE events).
-
-SEE ALSO:
-EVT_getNext, EVT_flush, EVT_peekNext
-****************************************************************************/
-void EVTAPI EVT_halt(
- event_t *evt,
- ulong mask)
-{
- do { /* Wait for an event */
- if (mask & (EVT_JOYEVT))
- EVT_pollJoystick();
- EVT_getNext(evt,EVT_EVERYEVT);
- } while (!(evt->what & mask));
-}
-
-/****************************************************************************
-DESCRIPTION:
-Peeks at the next pending event in the event queue.
-
-HEADER:
-event.h
-
-RETURNS:
-True if an event is pending, false if not.
-
-PARAMETERS:
-evt - Pointer to structure to return the event info in
-mask - Mask specifying the types of events that should be removed
-
-REMARKS:
-Peeks at the next pending event of the specified type in the event queue. The
-mask parameter is used to specify the type of events to be peeked at, and
-can be any logical combination of any of the flags defined by the
-EVT_eventType enumeration.
-
-In contrast to EVT_getNext, the event is not removed from the event queue.
-You may combine the masks for different event types with a simple logical OR.
-
-SEE ALSO:
-EVT_flush, EVT_getNext, EVT_halt
-****************************************************************************/
-ibool EVTAPI EVT_peekNext(
- event_t *evt,
- ulong mask)
-{
- int evtID;
- uint ps;
-
- if (EVT.heartBeat)
- EVT.heartBeat(EVT.heartBeatParams);
- _EVT_pumpMessages(); /* Pump all messages into queue */
- EVT.mouseMove(EVT.mx,EVT.my); /* Move the mouse cursor */
- evt->what = EVT_NULLEVT; /* Default to null event */
- if (EVT.count) {
- /* It is possible that an event be posted while we are trying
- * to access the event queue. This would create problems since
- * we may end up with invalid data for our event queue pointers. To
- * alleviate this, all interrupts are suspended while we manipulate
- * our pointers.
- */
- ps = _EVT_disableInt(); /* disable interrupts */
- for (evtID = EVT.head; evtID != -1; evtID = EVT.evtq[evtID].next) {
- if (EVT.evtq[evtID].what & mask)
- break; /* Found an event */
- }
- if (evtID == -1) {
- _EVT_restoreInt(ps);
- return false; /* Event was not found */
- }
- *evt = EVT.evtq[evtID]; /* Return the event */
- _EVT_restoreInt(ps);
- if (evt->what & EVT_KEYEVT)
- _EVT_maskKeyCode(evt);
- }
- return evt->what != EVT_NULLEVT;
-}
-
-/****************************************************************************
-DESCRIPTION:
-Retrieves the next pending event from the event queue.
-
-PARAMETERS:
-evt - Pointer to structure to return the event info in
-mask - Mask specifying the types of events that should be removed
-
-HEADER:
-event.h
-
-RETURNS:
-True if an event was pending, false if not.
-
-REMARKS:
-Retrieves the next pending event from the event queue, and stores it in a
-event_t structure. The mask parameter is used to specify the type of events
-to be removed, and can be any logical combination of any of the flags defined
-by the EVT_eventType enumeration.
-
-The what field of the event contains the event code of the event that was
-extracted. All application specific events should begin with the EVT_USEREVT
-code and build from there. Since the event code is stored in an integer,
-there is a maximum of 32 different event codes that can be distinguished.
-You can store extra information about the event in the message field to
-distinguish between events of the same class (for instance the button used in
-a EVT_MOUSEDOWN event).
-
-If an event of the specified type was not in the event queue, the what field
-of the event will be set to NULLEVT, and the return value will return false.
-
-Note: You should /always/ use the EVT_EVERYEVT mask for extracting events
- from your main event loop handler. Using a mask for only a specific
- type of event for long periods of time will cause the event queue to
- fill up with events of the type you are ignoring, eventually causing
- the application to hang when the event queue becomes full.
-
-SEE ALSO:
-EVT_flush, EVT_halt, EVT_peekNext
-****************************************************************************/
-ibool EVTAPI EVT_getNext(
- event_t *evt,
- ulong mask)
-{
- int evtID,next,prev;
- uint ps;
-
- if (EVT.heartBeat)
- EVT.heartBeat(EVT.heartBeatParams);
- _EVT_pumpMessages(); /* Pump all messages into queue */
- EVT.mouseMove(EVT.mx,EVT.my); /* Move the mouse cursor */
- evt->what = EVT_NULLEVT; /* Default to null event */
- if (EVT.count) {
- /* It is possible that an event be posted while we are trying
- * to access the event queue. This would create problems since
- * we may end up with invalid data for our event queue pointers. To
- * alleviate this, all interrupts are suspended while we manipulate
- * our pointers.
- */
- ps = _EVT_disableInt(); /* disable interrupts */
- for (evtID = EVT.head; evtID != -1; evtID = EVT.evtq[evtID].next) {
- if (EVT.evtq[evtID].what & mask)
- break; /* Found an event */
- }
- if (evtID == -1) {
- _EVT_restoreInt(ps);
- return false; /* Event was not found */
- }
- next = EVT.evtq[evtID].next;
- prev = EVT.evtq[evtID].prev;
- if (prev != -1)
- EVT.evtq[prev].next = next;
- else
- EVT.head = next;
- if (next != -1)
- EVT.evtq[next].prev = prev;
- else
- EVT.tail = prev;
- *evt = EVT.evtq[evtID]; /* Return the event */
- EVT.evtq[evtID].next = EVT.freeHead; /* and return to free list */
- EVT.freeHead = evtID;
- EVT.count--;
- if (evt->what == EVT_MOUSEMOVE)
- EVT.oldMove = -1;
- if (evt->what == EVT_KEYREPEAT)
- EVT.oldKey = -1;
- if (evt->what == EVT_JOYMOVE)
- EVT.oldJoyMove = -1;
- _EVT_restoreInt(ps); /* enable interrupts */
- if (evt->what & EVT_KEYEVT)
- _EVT_maskKeyCode(evt);
- }
-
- /* If there is no event pending, check if we should generate an auto
- * mouse down event if the mouse is still currently down.
- */
- if (evt->what == EVT_NULLEVT && EVT.autoRepeat && (mask & EVT_MOUSEAUTO) && (EVT.downMouse.what & EVT_MOUSEDOWN)) {
- ulong ticks = _EVT_getTicks();
- if ((ticks - EVT.autoTicks) >= (EVT.autoRepeat + (EVT.firstAuto ? EVT.autoDelay : 0))) {
- evt->what = EVT_MOUSEAUTO;
- evt->message = EVT.downMouse.message;
- evt->modifiers = EVT.downMouse.modifiers;
- evt->where_x = EVT.autoMouse_x;
- evt->where_y = EVT.autoMouse_y;
- evt->relative_x = 0;
- evt->relative_y = 0;
- EVT.autoTicks = evt->when = ticks;
- EVT.firstAuto = false;
- }
- }
- return evt->what != EVT_NULLEVT;
-}
-
-/****************************************************************************
-DESCRIPTION:
-Installs a user supplied event filter callback for event handling.
-
-HEADER:
-event.h
-
-PARAMETERS:
-userEventFilter - Address of user supplied event filter callback
-
-REMARKS:
-This function allows the application programmer to install an event filter
-callback for event handling. Once you install your callback, the MGL
-event handling routines will call your callback with a pointer to the
-new event that will be placed into the event queue. Your callback can the
-modify the contents of the event before it is placed into the queue (for
-instance adding custom information or perhaps high precision timing
-information).
-
-If your callback returns FALSE, the event will be ignore and will not be
-posted to the event queue. You should always return true from your event
-callback unless you plan to use the events immediately that they are
-recieved.
-
-Note: Your event callback may be called in response to a hardware
- interrupt and will be executing in the context of the hardware
- interrupt handler under MSDOS (ie: keyboard interrupt or mouse
- interrupt). For this reason the code pages for the callback that
- you register must be locked in memory with the PM_lockCodePages
- function. You must also lock down any data pages that your function
- needs to reference as well.
-
-Note: You can also use this filter callback to process events at the
- time they are activated by the user (ie: when the user hits the
- key or moves the mouse), but make sure your code runs as fast as
- possible as it will be executing inside the context of an interrupt
- handler on some systems.
-
-SEE ALSO:
-EVT_getNext, EVT_peekNext
-****************************************************************************/
-void EVTAPI EVT_setUserEventFilter(
- _EVT_userEventFilter filter)
-{
- EVT.userEventCallback = filter;
-}
-
-/****************************************************************************
-DESCRIPTION:
-Installs a user supplied event heartbeat callback function.
-
-HEADER:
-event.h
-
-PARAMETERS:
-callback - Address of user supplied event heartbeat callback
-params - Parameters to pass to the event heartbeat function
-
-REMARKS:
-This function allows the application programmer to install an event heatbeat
-function that gets called every time that EVT_getNext or EVT_peekNext
-is called. This is primarily useful for simulating text mode cursors inside
-event handling code when running in graphics modes as opposed to hardware
-text modes.
-
-SEE ALSO:
-EVT_getNext, EVT_peekNext, EVT_getHeartBeatCallback
-****************************************************************************/
-void EVTAPI EVT_setHeartBeatCallback(
- _EVT_heartBeatCallback callback,
- void *params)
-{
- EVT.heartBeat = callback;
- EVT.heartBeatParams = params;
-}
-
-
-/****************************************************************************
-DESCRIPTION:
-Returns the current user supplied event heartbeat callback function.
-
-HEADER:
-event.h
-
-PARAMETERS:
-callback - Place to store the address of user supplied event heartbeat callback
-params - Place to store the parameters to pass to the event heartbeat function
-
-REMARKS:
-This function retrieves the current event heatbeat function that gets called
-every time that EVT_getNext or EVT_peekNext is called.
-
-SEE ALSO:
-EVT_getNext, EVT_peekNext, EVT_setHeartBeatCallback
-****************************************************************************/
-void EVTAPI EVT_getHeartBeatCallback(
- _EVT_heartBeatCallback *callback,
- void **params)
-{
- *callback = EVT.heartBeat;
- *params = EVT.heartBeatParams;
-}
-
-/****************************************************************************
-DESCRIPTION:
-Determines if a specified key is currently down.
-
-PARAMETERS:
-scanCode - Scan code to test
-
-RETURNS:
-True of the specified key is currently held down.
-
-HEADER:
-event.h
-
-REMARKS:
-This function determines if a specified key is currently down at the
-time that the call is made. You simply need to pass in the scan code of
-the key that you wish to test, and the MGL will tell you if it is currently
-down or not. The MGL does this by keeping track of the up and down state
-of all the keys.
-****************************************************************************/
-ibool EVTAPI EVT_isKeyDown(
- uchar scanCode)
-{
- return _EVT_isKeyDown(scanCode);
-}
-
-/****************************************************************************
-DESCRIPTION:
-Set the mouse position for the event module
-
-PARAMETERS:
-x - X coordinate to move the mouse cursor position to
-y - Y coordinate to move the mouse cursor position to
-
-HEADER:
-event.h
-
-REMARKS:
-This function moves the mouse cursor position for the event module to the
-specified location.
-
-SEE ALSO:
-EVT_getMousePos
-****************************************************************************/
-void EVTAPI EVT_setMousePos(
- int x,
- int y)
-{
- EVT.mx = x;
- EVT.my = y;
- _EVT_setMousePos(&EVT.mx,&EVT.my);
- EVT.mouseMove(EVT.mx,EVT.my);
-}
-
-/****************************************************************************
-DESCRIPTION:
-Returns the current mouse cursor location.
-
-HEADER:
-event.h
-
-PARAMETERS:
-x - Place to store value for mouse x coordinate (screen coordinates)
-y - Place to store value for mouse y coordinate (screen coordinates)
-
-REMARKS:
-Obtains the current mouse cursor position in screen coordinates. Normally the
-mouse cursor location is tracked using the mouse movement events that are
-posted to the event queue when the mouse moves, however this routine
-provides an alternative method of polling the mouse cursor location.
-
-SEE ALSO:
-EVT_setMousePos
-****************************************************************************/
-void EVTAPI EVT_getMousePos(
- int *x,
- int *y)
-{
- *x = EVT.mx;
- *y = EVT.my;
-}
-
-/****************************************************************************
-DESCRIPTION:
-Returns the currently active code page for translation of keyboard characters.
-
-HEADER:
-event.h
-
-RETURNS:
-Pointer to the currently active code page translation table.
-
-REMARKS:
-This function is returns a pointer to the currently active code page
-translation table. See EVT_setCodePage for more information.
-
-SEE ALSO:
-EVT_setCodePage
-****************************************************************************/
-codepage_t * EVTAPI EVT_getCodePage(void)
-{
- return EVT.codePage;
-}
-
-/****************************************************************************
-DESCRIPTION:
-Sets the currently active code page for translation of keyboard characters.
-
-HEADER:
-event.h
-
-PARAMETERS:
-page - New code page to make active
-
-REMARKS:
-This function is used to set a new code page translation table that is used
-to translate virtual scan code values to ASCII characters for different
-keyboard configurations. The default is usually US English, although if
-possible the PM library will auto-detect the correct code page translation
-for the target OS if OS services are available to determine what type of
-keyboard is currently attached.
-
-SEE ALSO:
-EVT_getCodePage
-****************************************************************************/
-void EVTAPI EVT_setCodePage(
- codepage_t *page)
-{
- EVT.codePage = page;
-}
-
-/* The following contains fake C prototypes and documentation for the
- * macro functions in the event.h header file. These exist soley so
- * that DocJet will correctly pull in the documentation for these functions.
- */
-#ifdef INCLUDE_DOC_FUNCTIONS
-
-/****************************************************************************
-DESCRIPTION:
-Macro to extract the ASCII code from a message.
-
-PARAMETERS:
-message - Message to extract ASCII code from
-
-RETURNS:
-ASCII code extracted from the message.
-
-HEADER:
-event.h
-
-REMARKS:
-Macro to extract the ASCII code from the message field of the event_t
-structure. You pass the message field to the macro as the parameter and
-the ASCII code is the result, for example:
-
- event_t EVT.myEvent;
- uchar code;
- code = EVT_asciiCode(EVT.myEvent.message);
-
-SEE ALSO:
-EVT_scanCode, EVT_repeatCount
-****************************************************************************/
-uchar EVT_asciiCode(
- ulong message);
-
-/****************************************************************************
-DESCRIPTION:
-Macro to extract the keyboard scan code from a message.
-
-HEADER:
-event.h
-
-PARAMETERS:
-message - Message to extract scan code from
-
-RETURNS:
-Keyboard scan code extracted from the message.
-
-REMARKS:
-Macro to extract the keyboard scan code from the message field of the event
-structure. You pass the message field to the macro as the parameter and
-the scan code is the result, for example:
-
- event_t EVT.myEvent;
- uchar code;
- code = EVT_scanCode(EVT.myEvent.message);
-
-NOTE: Scan codes in the event library are not really hardware scan codes,
- but rather virtual scan codes as generated by a low level keyboard
- interface driver. All virtual scan code values are defined by the
- EVT_scanCodesType enumeration, and will be identical across all
- supports OS'es and platforms.
-
-SEE ALSO:
-EVT_asciiCode, EVT_repeatCount
-****************************************************************************/
-uchar EVT_scanCode(
- ulong message);
-
-/****************************************************************************
-DESCRIPTION:
-Macro to extract the repeat count from a message.
-
-HEADER:
-event.h
-
-PARAMETERS:
-message - Message to extract repeat count from
-
-RETURNS:
-Repeat count extracted from the message.
-
-REMARKS:
-Macro to extract the repeat count from the message field of the event
-structure. The repeat count is the number of times that the key repeated
-before there was another keyboard event to be place in the queue, and
-allows the event handling code to avoid keyboard buffer overflow
-conditions when a single key is held down by the user. If you are processing
-a key repeat code, you will probably want to check this field to see how
-many key repeats you should process for this message.
-
-SEE ALSO:
-EVT_asciiCode, EVT_repeatCount
-****************************************************************************/
-short EVT_repeatCount(
- ulong message);
-
-#endif /* DOC FUNCTIONS */
-
-#if defined(__REALDOS__) || defined(__SMX32__)
-/* {secret} */
-void EVTAPI _EVT_cCodeEnd(void) {}
-#endif
diff --git a/board/MAI/bios_emulator/scitech/src/pm/linux/cpuinfo.c b/board/MAI/bios_emulator/scitech/src/pm/linux/cpuinfo.c
deleted file mode 100644
index e88d210954..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/linux/cpuinfo.c
+++ /dev/null
@@ -1,68 +0,0 @@
-/****************************************************************************
-*
-* Ultra Long Period Timer
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Linux
-*
-* Description: Linux specific code for the CPU detection module.
-*
-****************************************************************************/
-
-#include <ztimer.h>
-
-/*----------------------------- Implementation ----------------------------*/
-
-/****************************************************************************
-REMARKS:
-TODO: We should implement this for Linux!
-****************************************************************************/
-#define SetMaxThreadPriority() 0
-
-/****************************************************************************
-REMARKS:
-TODO: We should implement this for Linux!
-****************************************************************************/
-#define RestoreThreadPriority(i)
-
-/****************************************************************************
-REMARKS:
-Initialise the counter and return the frequency of the counter.
-****************************************************************************/
-static void GetCounterFrequency(
- CPU_largeInteger *freq)
-{
- freq->low = 1000000;
- freq->high = 0;
-}
-
-/****************************************************************************
-REMARKS:
-Read the counter and return the counter value.
-****************************************************************************/
-#define GetCounter(t) \
-{ \
- struct timeval tv; \
- gettimeofday(&tv,NULL); \
- (t)->low = tv.tv_sec*1000000 + tv.tv_usec; \
- (t)->high = 0; \
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/linux/event.c b/board/MAI/bios_emulator/scitech/src/pm/linux/event.c
deleted file mode 100644
index ce38732097..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/linux/event.c
+++ /dev/null
@@ -1,1360 +0,0 @@
-/****************************************************************************
-*
-* SciTech Multi-platform Graphics Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Linux
-*
-* Description: Linux fullscreen console implementation for the SciTech
-* cross platform event library.
-* Portions ripped straigth from the gpm source code for mouse
-* handling.
-*
-****************************************************************************/
-
-/*---------------------------- Global Variables ---------------------------*/
-
-extern int _PM_console_fd;
-static ushort keyUpMsg[256] = {0};
-static int _EVT_mouse_fd = 0;
-static int range_x, range_y;
-static int opt_baud = 1200, opt_sample = 100;
-#ifdef USE_OS_JOYSTICK
-static short *axis0 = NULL, *axis1 = NULL;
-static uchar *buts0 = NULL, *buts1 = NULL;
-static int joystick0_fd = 0, joystick1_fd = 0;
-static int js_version = 0;
-#endif
-
-/* This defines the supported mouse drivers */
-
-typedef enum {
- EVT_noMouse = -1,
- EVT_microsoft = 0,
- EVT_ps2,
- EVT_mousesystems,
- EVT_gpm,
- EVT_MMseries,
- EVT_logitech,
- EVT_busmouse,
- EVT_mouseman,
- EVT_intellimouse,
- EVT_intellimouse_ps2,
- } mouse_drivers_t;
-
-static mouse_drivers_t mouse_driver = EVT_noMouse;
-static char mouse_dev[20] = "/dev/mouse";
-
-typedef struct {
- char *name;
- int flags;
- void (*init)(void);
- uchar proto[4];
- int packet_len;
- int read;
- } mouse_info;
-
-#define STD_FLG (CREAD | CLOCAL | HUPCL)
-
-static void _EVT_mouse_init(void);
-static void _EVT_logitech_init(void);
-static void _EVT_pnpmouse_init(void);
-
-mouse_info mouse_infos[] = {
- {"Microsoft", CS7 | B1200 | STD_FLG, _EVT_mouse_init, {0x40, 0x40, 0x40, 0x00}, 3, 1},
- {"PS2", STD_FLG, NULL, {0xc0, 0x00, 0x00, 0x00}, 3, 1},
- {"MouseSystems", CS8 | CSTOPB | STD_FLG, _EVT_mouse_init, {0xf8, 0x80, 0x00, 0x00}, 5, 5},
- {"GPM", CS8 | CSTOPB | STD_FLG, NULL, {0xf8, 0x80, 0x00, 0x00}, 5, 5},
- {"MMSeries", CS8 | PARENB | PARODD | STD_FLG, _EVT_mouse_init, {0xe0, 0x80, 0x80, 0x00}, 3, 1},
- {"Logitech", CS8 | CSTOPB | STD_FLG, _EVT_logitech_init, {0xe0, 0x80, 0x80, 0x00}, 3, 3},
- {"BusMouse", STD_FLG, NULL, {0xf8, 0x80, 0x00, 0x00}, 3, 3},
- {"MouseMan", CS7 | STD_FLG, _EVT_mouse_init, {0x40, 0x40, 0x40, 0x00}, 3, 1},
- {"IntelliMouse", CS7 | STD_FLG, _EVT_pnpmouse_init, {0xc0, 0x40, 0xc0, 0x00}, 4, 1},
- {"IMPS2", CS7 | STD_FLG, NULL, {0xc0, 0x40, 0xc0, 0x00}, 4, 1}, /* ? */
- };
-
-#define NB_MICE (sizeof(mouse_infos)/sizeof(mouse_info))
-
-/* The name of the environment variables that are used to change the defaults above */
-
-#define ENV_MOUSEDRV "MGL_MOUSEDRV"
-#define ENV_MOUSEDEV "MGL_MOUSEDEV"
-#define ENV_MOUSESPD "MGL_MOUSESPD"
-#define ENV_JOYDEV0 "MGL_JOYDEV1"
-#define ENV_JOYDEV1 "MGL_JOYDEV2"
-
-/* Scancode mappings on Linux for special keys */
-
-typedef struct {
- int scan;
- int map;
- } keymap;
-
-/* TODO: Fix this and set it up so we can do a binary search! */
-
-keymap keymaps[] = {
- {96, KB_padEnter},
- {74, KB_padMinus},
- {78, KB_padPlus},
- {55, KB_padTimes},
- {98, KB_padDivide},
- {71, KB_padHome},
- {72, KB_padUp},
- {73, KB_padPageUp},
- {75, KB_padLeft},
- {76, KB_padCenter},
- {77, KB_padRight},
- {79, KB_padEnd},
- {80, KB_padDown},
- {81, KB_padPageDown},
- {82, KB_padInsert},
- {83, KB_padDelete},
- {105,KB_left},
- {108,KB_down},
- {106,KB_right},
- {103,KB_up},
- {110,KB_insert},
- {102,KB_home},
- {104,KB_pageUp},
- {111,KB_delete},
- {107,KB_end},
- {109,KB_pageDown},
- {125,KB_leftWindows},
- {126,KB_rightWindows},
- {127,KB_menu},
- {100,KB_rightAlt},
- {97,KB_rightCtrl},
- };
-
-/* And the keypad with num lock turned on (changes the ASCII code only) */
-
-keymap keypad[] = {
- {71, ASCII_7},
- {72, ASCII_8},
- {73, ASCII_9},
- {75, ASCII_4},
- {76, ASCII_5},
- {77, ASCII_6},
- {79, ASCII_1},
- {80, ASCII_2},
- {81, ASCII_3},
- {82, ASCII_0},
- {83, ASCII_period},
- };
-
-#define NB_KEYMAPS (sizeof(keymaps)/sizeof(keymaps[0]))
-#define NB_KEYPAD (sizeof(keypad)/sizeof(keypad[0]))
-
-typedef struct {
- int sample;
- char code[2];
- } sample_rate;
-
-sample_rate sampletab[]={
- { 0,"O"},
- { 15,"J"},
- { 27,"K"},
- { 42,"L"},
- { 60,"R"},
- { 85,"M"},
- {125,"Q"},
- {1E9,"N"},
- };
-
-/* Number of keycodes to read at a time from the console */
-
-#define KBDREADBUFFERSIZE 32
-
-/*---------------------------- Implementation -----------------------------*/
-
-/* These are not used under Linux */
-#define _EVT_disableInt() 1
-#define _EVT_restoreInt(flaps)
-
-/****************************************************************************
-PARAMETERS:
-scanCode - Scan code to test
-
-REMARKS:
-This macro determines if a specified key is currently down at the
-time that the call is made.
-****************************************************************************/
-#define _EVT_isKeyDown(scanCode) (keyUpMsg[scanCode] != 0)
-
-/****************************************************************************
-REMARKS:
-This function is used to return the number of ticks since system
-startup in milliseconds. This should be the same value that is placed into
-the time stamp fields of events, and is used to implement auto mouse down
-events.
-****************************************************************************/
-ulong _EVT_getTicks(void)
-{
- static uint starttime = 0;
- struct timeval t;
-
- gettimeofday(&t, NULL);
- if (starttime == 0)
- starttime = t.tv_sec * 1000 + (t.tv_usec/1000);
- return ((t.tv_sec * 1000 + (t.tv_usec/1000)) - starttime);
-}
-
-/****************************************************************************
-REMARKS:
-Small Unix function that checks for availability on a file using select()
-****************************************************************************/
-static ibool dataReady(
- int fd)
-{
- static struct timeval t = { 0L, 0L };
- fd_set fds;
-
- FD_ZERO(&fds);
- FD_SET(fd, &fds);
- return select(fd+1, &fds, NULL, NULL, &t) > 0;
-}
-
-/****************************************************************************
-REMARKS:
-Reads mouse data according to the selected mouse driver.
-****************************************************************************/
-static ibool readMouseData(
- int *buttons,
- int *dx,
- int *dy)
-{
- static uchar data[32],prev = 0;
- int cnt = 0,ret;
- mouse_info *drv;
-
- /* Read the first byte to check for the protocol */
- drv = &mouse_infos[mouse_driver];
- if (read(_EVT_mouse_fd, data, drv->read) != drv->read) {
- perror("read");
- return false;
- }
- if ((data[0] & drv->proto[0]) != drv->proto[1])
- return false;
-
- /* Load a whole protocol packet */
- cnt += drv->read;
- while (cnt < drv->packet_len) {
- ret = read(_EVT_mouse_fd, data+cnt, drv->read);
- if (ret == drv->read)
- cnt += ret;
- else {
- perror("read");
- return false;
- }
- }
- if ((data[1] & drv->proto[2]) != drv->proto[3])
- return false;
-
- /* Now decode the protocol packet */
- switch (mouse_driver) {
- case EVT_microsoft:
- if (data[0] == 0x40 && !(prev|data[1]|data[2]))
- *buttons = 2; /* Third button on MS compatible mouse */
- else
- *buttons= ((data[0] & 0x20) >> 3) | ((data[0] & 0x10) >> 4);
- prev = *buttons;
- *dx = (char)(((data[0] & 0x03) << 6) | (data[1] & 0x3F));
- *dy = (char)(((data[0] & 0x0C) << 4) | (data[2] & 0x3F));
- break;
- case EVT_ps2:
- *buttons = !!(data[0]&1) * 4 + !!(data[0]&2) * 1 + !!(data[0]&4) * 2;
- if (data[1] != 0)
- *dx = (data[0] & 0x10) ? data[1]-256 : data[1];
- else
- *dx = 0;
- if (data[2] != 0)
- *dy = -((data[0] & 0x20) ? data[2]-256 : data[2]);
- else
- *dy = 0;
- break;
- case EVT_mousesystems: case EVT_gpm:
- *buttons = (~data[0]) & 0x07;
- *dx = (char)(data[1]) + (char)(data[3]);
- *dy = -((char)(data[2]) + (char)(data[4]));
- break;
- case EVT_logitech:
- *buttons= data[0] & 0x07;
- *dx = (data[0] & 0x10) ? data[1] : - data[1];
- *dy = (data[0] & 0x08) ? - data[2] : data[2];
- break;
- case EVT_busmouse:
- *buttons= (~data[0]) & 0x07;
- *dx = (char)data[1];
- *dy = -(char)data[2];
- break;
- case EVT_MMseries:
- *buttons = data[0] & 0x07;
- *dx = (data[0] & 0x10) ? data[1] : - data[1];
- *dy = (data[0] & 0x08) ? - data[2] : data[2];
- break;
- case EVT_intellimouse:
- *buttons = ((data[0] & 0x20) >> 3) /* left */
- | ((data[3] & 0x10) >> 3) /* middle */
- | ((data[0] & 0x10) >> 4); /* right */
- *dx = (char)(((data[0] & 0x03) << 6) | (data[1] & 0x3F));
- *dy = (char)(((data[0] & 0x0C) << 4) | (data[2] & 0x3F));
- break;
- case EVT_intellimouse_ps2:
- *buttons = (data[0] & 0x04) >> 1 /* Middle */
- | (data[0] & 0x02) >> 1 /* Right */
- | (data[0] & 0x01) << 2; /* Left */
- *dx = (data[0] & 0x10) ? data[1]-256 : data[1];
- *dy = (data[0] & 0x20) ? -(data[2]-256) : -data[2];
- break;
- case EVT_mouseman: {
- static int getextra;
- static uchar prev=0;
- uchar b;
-
- /* The damned MouseMan has 3/4 bytes packets. The extra byte
- * is only there if the middle button is active.
- * I get the extra byte as a packet with magic numbers in it.
- * and then switch to 4-byte mode.
- */
- if (data[1] == 0xAA && data[2] == 0x55) {
- /* Got unexpected fourth byte */
- if ((b = (*data>>4)) > 0x3)
- return false; /* just a sanity check */
- *dx = *dy = 0;
- drv->packet_len=4;
- getextra=0;
- }
- else {
- /* Got 3/4, as expected */
- /* Motion is independent of packetlen... */
- *dx = (char)(((data[0] & 0x03) << 6) | (data[1] & 0x3F));
- *dy = (char)(((data[0] & 0x0C) << 4) | (data[2] & 0x3F));
- prev = ((data[0] & 0x20) >> 3) | ((data[0] & 0x10) >> 4);
- if (drv->packet_len==4)
- b = data[3]>>4;
- }
- if (drv->packet_len == 4) {
- if (b == 0) {
- drv->packet_len = 3;
- getextra = 1;
- }
- else {
- if (b & 0x2)
- prev |= 2;
- }
- }
- *buttons = prev;
-
- /* This "chord-middle" behaviour was reported by David A. van Leeuwen */
- if (((prev ^ *buttons) & 5) == 5)
- *buttons = *buttons ? 2 : 0;
- prev = *buttons;
- break;
- }
- case EVT_noMouse:
- return false;
- break;
- }
- return true;
-}
-
-/****************************************************************************
-REMARKS:
-Map a keypress via the key mapping table
-****************************************************************************/
-static int getKeyMapping(
- keymap *tab,
- int nb,
- int key)
-{
- int i;
-
- for(i = 0; i < nb; i++) {
- if (tab[i].scan == key)
- return tab[i].map;
- }
- return key;
-}
-
-#ifdef USE_OS_JOYSTICK
-
-static char js0_axes = 0, js0_buttons = 0;
-static char js1_axes = 0, js1_buttons = 0;
-static char joystick0_dev[20] = "/dev/js0";
-static char joystick1_dev[20] = "/dev/js1";
-
-/****************************************************************************
-REMARKS:
-Create a joystick event from the joystick data
-****************************************************************************/
-static void makeJoyEvent(
- event_t *evt)
-{
- evt->message = 0;
- if (buts0 && axis0) {
- if (buts0[0]) evt->message |= EVT_JOY1_BUTTONA;
- if (buts0[1]) evt->message |= EVT_JOY1_BUTTONB;
- evt->where_x = axis0[0];
- evt->where_y = axis0[1];
- }
- else
- evt->where_x = evt->where_y = 0;
- if (buts1 && axis1) {
- if (buts1[0]) evt->message |= EVT_JOY2_BUTTONA;
- if (buts1[1]) evt->message |= EVT_JOY2_BUTTONB;
- evt->where_x = axis1[0];
- evt->where_y = axis1[1];
- }
- else
- evt->where_x = evt->where_y = 0;
-}
-
-/****************************************************************************
-REMARKS:
-Read the joystick axis data
-****************************************************************************/
-int EVTAPI _EVT_readJoyAxis(
- int jmask,
- int *axis)
-{
- int mask = 0;
-
- if ((js_version & ~0xffff) == 0) {
- /* Old 0.x driver */
- struct JS_DATA_TYPE js;
- if (joystick0_fd && read(joystick0_fd, &js, JS_RETURN) == JS_RETURN) {
- if (jmask & EVT_JOY_AXIS_X1)
- axis[0] = js.x;
- if (jmask & EVT_JOY_AXIS_Y1)
- axis[1] = js.y;
- mask |= EVT_JOY_AXIS_X1|EVT_JOY_AXIS_Y1;
- }
- if (joystick1_fd && read(joystick1_fd, &js, JS_RETURN) == JS_RETURN) {
- if (jmask & EVT_JOY_AXIS_X2)
- axis[2] = js.x;
- if (jmask & EVT_JOY_AXIS_Y2)
- axis[3] = js.y;
- mask |= EVT_JOY_AXIS_X2|EVT_JOY_AXIS_Y2;
- }
- }
- else {
- if (axis0) {
- if (jmask & EVT_JOY_AXIS_X1)
- axis[0] = axis0[0];
- if (jmask & EVT_JOY_AXIS_Y1)
- axis[1] = axis0[1];
- mask |= EVT_JOY_AXIS_X1 | EVT_JOY_AXIS_Y1;
- }
- if (axis1) {
- if (jmask & EVT_JOY_AXIS_X2)
- axis[2] = axis1[0];
- if (jmask & EVT_JOY_AXIS_Y2)
- axis[3] = axis1[1];
- mask |= EVT_JOY_AXIS_X2 | EVT_JOY_AXIS_Y2;
- }
- }
- return mask;
-}
-
-/****************************************************************************
-REMARKS:
-Read the joystick button data
-****************************************************************************/
-int EVTAPI _EVT_readJoyButtons(void)
-{
- int buts = 0;
-
- if ((js_version & ~0xffff) == 0) {
- /* Old 0.x driver */
- struct JS_DATA_TYPE js;
- if (joystick0_fd && read(joystick0_fd, &js, JS_RETURN) == JS_RETURN)
- buts = js.buttons;
- if (joystick1_fd && read(joystick1_fd, &js, JS_RETURN) == JS_RETURN)
- buts |= js.buttons << 2;
- }
- else {
- if (buts0)
- buts |= EVT_JOY1_BUTTONA*buts0[0] + EVT_JOY1_BUTTONB*buts0[1];
- if (buts1)
- buts |= EVT_JOY2_BUTTONA*buts1[0] + EVT_JOY2_BUTTONB*buts1[1];
- }
- return buts;
-}
-
-/****************************************************************************
-DESCRIPTION:
-Returns the mask indicating what joystick axes are attached.
-
-HEADER:
-event.h
-
-REMARKS:
-This function is used to detect the attached joysticks, and determine
-what axes are present and functioning. This function will re-detect any
-attached joysticks when it is called, so if the user forgot to attach
-the joystick when the application started, you can call this function to
-re-detect any newly attached joysticks.
-
-SEE ALSO:
-EVT_joySetLowerRight, EVT_joySetCenter, EVT_joyIsPresent
-****************************************************************************/
-int EVTAPI EVT_joyIsPresent(void)
-{
- static int mask = 0;
- int i;
- char *tmp, name0[128], name1[128];
- static ibool inited = false;
-
- if (inited)
- return mask;
- memset(EVT.joyMin,0,sizeof(EVT.joyMin));
- memset(EVT.joyCenter,0,sizeof(EVT.joyCenter));
- memset(EVT.joyMax,0,sizeof(EVT.joyMax));
- memset(EVT.joyPrev,0,sizeof(EVT.joyPrev));
- EVT.joyButState = 0;
- if ((tmp = getenv(ENV_JOYDEV0)) != NULL)
- strcpy(joystick0_dev,tmp);
- if ((tmp = getenv(ENV_JOYDEV1)) != NULL)
- strcpy(joystick1_dev,tmp);
- if ((joystick0_fd = open(joystick0_dev, O_RDONLY)) < 0)
- joystick0_fd = 0;
- if ((joystick1_fd = open(joystick1_dev, O_RDONLY)) < 0)
- joystick1_fd = 0;
- if (!joystick0_fd && !joystick1_fd) /* No joysticks detected */
- return 0;
- inited = true;
- if (ioctl(joystick0_fd ? joystick0_fd : joystick1_fd, JSIOCGVERSION, &js_version) < 0)
- return 0;
-
- /* Initialise joystick 0 */
- if (joystick0_fd) {
- ioctl(joystick0_fd, JSIOCGNAME(sizeof(name0)), name0);
- if (js_version & ~0xffff) {
- struct js_event js;
-
- ioctl(joystick0_fd, JSIOCGAXES, &js0_axes);
- ioctl(joystick0_fd, JSIOCGBUTTONS, &js0_buttons);
- axis0 = PM_calloc((int)js0_axes, sizeof(short));
- buts0 = PM_malloc((int)js0_buttons);
- /* Read the initial events */
- while(dataReady(joystick0_fd)
- && read(joystick0_fd, &js, sizeof(struct js_event)) == sizeof(struct js_event)
- && (js.type & JS_EVENT_INIT)
- ) {
- if (js.type & JS_EVENT_BUTTON)
- buts0[js.number] = js.value;
- else if (js.type & JS_EVENT_AXIS)
- axis0[js.number] = scaleJoyAxis(js.value,js.number);
- }
- }
- else {
- js0_axes = 2;
- js0_buttons = 2;
- axis0 = PM_calloc((int)js0_axes, sizeof(short));
- buts0 = PM_malloc((int)js0_buttons);
- }
- }
-
- /* Initialise joystick 1 */
- if (joystick1_fd) {
- ioctl(joystick1_fd, JSIOCGNAME(sizeof(name1)), name1);
- if (js_version & ~0xffff) {
- struct js_event js;
-
- ioctl(joystick1_fd, JSIOCGAXES, &js1_axes);
- ioctl(joystick1_fd, JSIOCGBUTTONS, &js1_buttons);
- axis1 = PM_calloc((int)js1_axes, sizeof(short));
- buts1 = PM_malloc((int)js1_buttons);
- /* Read the initial events */
- while(dataReady(joystick1_fd)
- && read(joystick1_fd, &js, sizeof(struct js_event))==sizeof(struct js_event)
- && (js.type & JS_EVENT_INIT)
- ) {
- if (js.type & JS_EVENT_BUTTON)
- buts1[js.number] = js.value;
- else if (js.type & JS_EVENT_AXIS)
- axis1[js.number] = scaleJoyAxis(js.value,js.number<<2);
- }
- }
- else {
- js1_axes = 2;
- js1_buttons = 2;
- axis1 = PM_calloc((int)js1_axes, sizeof(short));
- buts1 = PM_malloc((int)js1_buttons);
- }
- }
-
-#ifdef CHECKED
- fprintf(stderr,"Using joystick driver version %d.%d.%d\n",
- js_version >> 16, (js_version >> 8) & 0xff, js_version & 0xff);
- if (joystick0_fd)
- fprintf(stderr,"Joystick 1 (%s): %s\n", joystick0_dev, name0);
- if (joystick1_fd)
- fprintf(stderr,"Joystick 2 (%s): %s\n", joystick1_dev, name1);
-#endif
- mask = _EVT_readJoyAxis(EVT_JOY_AXIS_ALL,EVT.joyCenter);
- if (mask) {
- for (i = 0; i < JOY_NUM_AXES; i++)
- EVT.joyMax[i] = EVT.joyCenter[i]*2;
- }
- return mask;
-}
-
-/****************************************************************************
-DESCRIPTION:
-Polls the joystick for position and button information.
-
-HEADER:
-event.h
-
-REMARKS:
-This routine is used to poll analogue joysticks for button and position
-information. It should be called once for each main loop of the user
-application, just before processing all pending events via EVT_getNext.
-All information polled from the joystick will be posted to the event
-queue for later retrieval.
-
-Note: Most analogue joysticks will provide readings that change even
- though the joystick has not moved. Hence if you call this routine
- you will likely get an EVT_JOYMOVE event every time through your
- event loop.
-
-SEE ALSO:
-EVT_getNext, EVT_peekNext, EVT_joySetUpperLeft, EVT_joySetLowerRight,
-EVT_joySetCenter, EVT_joyIsPresent
-****************************************************************************/
-void EVTAPI EVT_pollJoystick(void)
-{
- event_t evt;
- int i,axis[JOY_NUM_AXES],newButState,mask,moved,ps;
-
- if ((js_version & ~0xFFFF) == 0 && EVT.joyMask) {
- /* Read joystick axes and post movement events if they have
- * changed since the last time we polled. Until the events are
- * actually flushed, we keep modifying the same joystick movement
- * event, so you won't get multiple movement event
- */
- mask = _EVT_readJoyAxis(EVT.joyMask,axis);
- newButState = _EVT_readJoyButtons();
- moved = false;
- for (i = 0; i < JOY_NUM_AXES; i++) {
- if (mask & (EVT_JOY_AXIS_X1 << i))
- axis[i] = scaleJoyAxis(axis[i],i);
- else
- axis[i] = EVT.joyPrev[i];
- if (axis[i] != EVT.joyPrev[i])
- moved = true;
- }
- if (moved) {
- memcpy(EVT.joyPrev,axis,sizeof(EVT.joyPrev));
- ps = _EVT_disableInt();
- if (EVT.oldJoyMove != -1) {
- /* Modify the existing joystick movement event */
- EVT.evtq[EVT.oldJoyMove].message = newButState;
- EVT.evtq[EVT.oldJoyMove].where_x = EVT.joyPrev[0];
- EVT.evtq[EVT.oldJoyMove].where_y = EVT.joyPrev[1];
- EVT.evtq[EVT.oldJoyMove].relative_x = EVT.joyPrev[2];
- EVT.evtq[EVT.oldJoyMove].relative_y = EVT.joyPrev[3];
- }
- else if (EVT.count < EVENTQSIZE) {
- /* Add a new joystick movement event */
- EVT.oldJoyMove = EVT.freeHead;
- memset(&evt,0,sizeof(evt));
- evt.what = EVT_JOYMOVE;
- evt.message = EVT.joyButState;
- evt.where_x = EVT.joyPrev[0];
- evt.where_y = EVT.joyPrev[1];
- evt.relative_x = EVT.joyPrev[2];
- evt.relative_y = EVT.joyPrev[3];
- addEvent(&evt);
- }
- _EVT_restoreInt(ps);
- }
-
- /* Read the joystick buttons, and post events to reflect the change
- * in state for the joystick buttons.
- */
- if (newButState != EVT.joyButState) {
- if (EVT.count < EVENTQSIZE) {
- /* Add a new joystick movement event */
- ps = _EVT_disableInt();
- memset(&evt,0,sizeof(evt));
- evt.what = EVT_JOYCLICK;
- evt.message = newButState;
- EVT.evtq[EVT.oldJoyMove].where_x = EVT.joyPrev[0];
- EVT.evtq[EVT.oldJoyMove].where_y = EVT.joyPrev[1];
- EVT.evtq[EVT.oldJoyMove].relative_x = EVT.joyPrev[2];
- EVT.evtq[EVT.oldJoyMove].relative_y = EVT.joyPrev[3];
- addEvent(&evt);
- _EVT_restoreInt(ps);
- }
- EVT.joyButState = newButState;
- }
- }
-}
-
-/****************************************************************************
-DESCRIPTION:
-Calibrates the joystick upper left position
-
-HEADER:
-event.h
-
-REMARKS:
-This function can be used to zero in on better joystick calibration factors,
-which may work better than the default simplistic calibration (which assumes
-the joystick is centered when the event library is initialised).
-To use this function, ask the user to hold the stick in the upper left
-position and then have them press a key or button. and then call this
-function. This function will then read the joystick and update the
-calibration factors.
-
-Usually, assuming that the stick was centered when the event library was
-initialized, you really only need to call EVT_joySetLowerRight since the
-upper left position is usually always 0,0 on most joysticks. However, the
-safest procedure is to call all three calibration functions.
-
-SEE ALSO:
-EVT_joySetUpperLeft, EVT_joySetLowerRight, EVT_joyIsPresent
-****************************************************************************/
-void EVTAPI EVT_joySetUpperLeft(void)
-{
- _EVT_readJoyAxis(EVT_JOY_AXIS_ALL,EVT.joyMin);
-}
-
-/****************************************************************************
-DESCRIPTION:
-Calibrates the joystick lower right position
-
-HEADER:
-event.h
-
-REMARKS:
-This function can be used to zero in on better joystick calibration factors,
-which may work better than the default simplistic calibration (which assumes
-the joystick is centered when the event library is initialised).
-To use this function, ask the user to hold the stick in the lower right
-position and then have them press a key or button. and then call this
-function. This function will then read the joystick and update the
-calibration factors.
-
-Usually, assuming that the stick was centered when the event library was
-initialized, you really only need to call EVT_joySetLowerRight since the
-upper left position is usually always 0,0 on most joysticks. However, the
-safest procedure is to call all three calibration functions.
-
-SEE ALSO:
-EVT_joySetUpperLeft, EVT_joySetCenter, EVT_joyIsPresent
-****************************************************************************/
-void EVTAPI EVT_joySetLowerRight(void)
-{
- _EVT_readJoyAxis(EVT_JOY_AXIS_ALL,EVT.joyMax);
-}
-
-/****************************************************************************
-DESCRIPTION:
-Calibrates the joystick center position
-
-HEADER:
-event.h
-
-REMARKS:
-This function can be used to zero in on better joystick calibration factors,
-which may work better than the default simplistic calibration (which assumes
-the joystick is centered when the event library is initialised).
-To use this function, ask the user to hold the stick in the center
-position and then have them press a key or button. and then call this
-function. This function will then read the joystick and update the
-calibration factors.
-
-Usually, assuming that the stick was centered when the event library was
-initialized, you really only need to call EVT_joySetLowerRight since the
-upper left position is usually always 0,0 on most joysticks. However, the
-safest procedure is to call all three calibration functions.
-
-SEE ALSO:
-EVT_joySetUpperLeft, EVT_joySetLowerRight, EVT_joySetCenter
-****************************************************************************/
-void EVTAPI EVT_joySetCenter(void)
-{
- _EVT_readJoyAxis(EVT_JOY_AXIS_ALL,EVT.joyCenter);
-}
-#endif
-
-/****************************************************************************
-REMARKS:
-Pumps all messages in the message queue from Linux into our event queue.
-****************************************************************************/
-static void _EVT_pumpMessages(void)
-{
- event_t evt;
- int i,numkeys, c;
- ibool release;
- static struct kbentry ke;
- static char buf[KBDREADBUFFERSIZE];
- static ushort repeatKey[128] = {0};
-
- /* Poll keyboard events */
- while (dataReady(_PM_console_fd) && (numkeys = read(_PM_console_fd, buf, KBDREADBUFFERSIZE)) > 0) {
- for (i = 0; i < numkeys; i++) {
- c = buf[i];
- release = c & 0x80;
- c &= 0x7F;
-
- /* TODO: This is wrong! We need this to be the time stamp at */
- /* ** interrupt ** time!! One solution would be to */
- /* put the keyboard and mouse polling loops into */
- /* a separate thread that can block on I/O to the */
- /* necessay file descriptor. */
- evt.when = _EVT_getTicks();
-
- if (release) {
- /* Key released */
- evt.what = EVT_KEYUP;
- switch (c) {
- case KB_leftShift:
- _PM_modifiers &= ~EVT_LEFTSHIFT;
- break;
- case KB_rightShift:
- _PM_modifiers &= ~EVT_RIGHTSHIFT;
- break;
- case 29:
- _PM_modifiers &= ~(EVT_LEFTCTRL|EVT_CTRLSTATE);
- break;
- case 97: /* Control */
- _PM_modifiers &= ~EVT_CTRLSTATE;
- break;
- case 56:
- _PM_modifiers &= ~(EVT_LEFTALT|EVT_ALTSTATE);
- break;
- case 100:
- _PM_modifiers &= ~EVT_ALTSTATE;
- break;
- default:
- }
- evt.modifiers = _PM_modifiers;
- evt.message = keyUpMsg[c];
- if (EVT.count < EVENTQSIZE)
- addEvent(&evt);
- keyUpMsg[c] = 0;
- repeatKey[c] = 0;
- }
- else {
- /* Key pressed */
- evt.what = EVT_KEYDOWN;
- switch (c) {
- case KB_leftShift:
- _PM_modifiers |= EVT_LEFTSHIFT;
- break;
- case KB_rightShift:
- _PM_modifiers |= EVT_RIGHTSHIFT;
- break;
- case 29:
- _PM_modifiers |= EVT_LEFTCTRL|EVT_CTRLSTATE;
- break;
- case 97: /* Control */
- _PM_modifiers |= EVT_CTRLSTATE;
- break;
- case 56:
- _PM_modifiers |= EVT_LEFTALT|EVT_ALTSTATE;
- break;
- case 100:
- _PM_modifiers |= EVT_ALTSTATE;
- break;
- case KB_capsLock: /* Caps Lock */
- _PM_leds ^= LED_CAP;
- ioctl(_PM_console_fd, KDSETLED, _PM_leds);
- break;
- case KB_numLock: /* Num Lock */
- _PM_leds ^= LED_NUM;
- ioctl(_PM_console_fd, KDSETLED, _PM_leds);
- break;
- case KB_scrollLock: /* Scroll Lock */
- _PM_leds ^= LED_SCR;
- ioctl(_PM_console_fd, KDSETLED, _PM_leds);
- break;
- default:
- }
- evt.modifiers = _PM_modifiers;
- if (keyUpMsg[c]) {
- evt.what = EVT_KEYREPEAT;
- evt.message = keyUpMsg[c] | (repeatKey[c]++ << 16);
- }
- else {
- int asc;
-
- evt.message = getKeyMapping(keymaps, NB_KEYMAPS, c) << 8;
- ke.kb_index = c;
- ke.kb_table = 0;
- if ((_PM_modifiers & EVT_SHIFTKEY) || (_PM_leds & LED_CAP))
- ke.kb_table |= K_SHIFTTAB;
- if (_PM_modifiers & (EVT_LEFTALT | EVT_ALTSTATE))
- ke.kb_table |= K_ALTTAB;
- if (ioctl(_PM_console_fd, KDGKBENT, (unsigned long)&ke)<0)
- perror("ioctl(KDGKBENT)");
- if ((_PM_leds & LED_NUM) && (getKeyMapping(keypad, NB_KEYPAD, c)!=c)) {
- asc = getKeyMapping(keypad, NB_KEYPAD, c);
- }
- else {
- switch (c) {
- case 14:
- asc = ASCII_backspace;
- break;
- case 15:
- asc = ASCII_tab;
- break;
- case 28:
- case 96:
- asc = ASCII_enter;
- break;
- case 1:
- asc = ASCII_esc;
- default:
- asc = ke.kb_value & 0xFF;
- if (asc < 0x1B)
- asc = 0;
- break;
- }
- }
- if ((_PM_modifiers & (EVT_CTRLSTATE|EVT_LEFTCTRL)) && isalpha(asc))
- evt.message |= toupper(asc) - 'A' + 1;
- else
- evt.message |= asc;
- keyUpMsg[c] = evt.message;
- repeatKey[c]++;
- }
- if (EVT.count < EVENTQSIZE)
- addEvent(&evt);
- }
- }
- }
-
- /* Poll mouse events */
- if (_EVT_mouse_fd) {
- int dx, dy, buts;
- static int oldbuts;
-
- while (dataReady(_EVT_mouse_fd)) {
- if (readMouseData(&buts, &dx, &dy)) {
- EVT.mx += dx;
- EVT.my += dy;
- if (EVT.mx < 0) EVT.mx = 0;
- if (EVT.my < 0) EVT.my = 0;
- if (EVT.mx > range_x) EVT.mx = range_x;
- if (EVT.my > range_y) EVT.my = range_y;
- evt.where_x = EVT.mx;
- evt.where_y = EVT.my;
- evt.relative_x = dx;
- evt.relative_y = dy;
-
- /* TODO: This is wrong! We need this to be the time stamp at */
- /* ** interrupt ** time!! One solution would be to */
- /* put the keyboard and mouse polling loops into */
- /* a separate thread that can block on I/O to the */
- /* necessay file descriptor. */
- evt.when = _EVT_getTicks();
- evt.modifiers = _PM_modifiers;
- if (buts & 4)
- evt.modifiers |= EVT_LEFTBUT;
- if (buts & 1)
- evt.modifiers |= EVT_RIGHTBUT;
- if (buts & 2)
- evt.modifiers |= EVT_MIDDLEBUT;
-
- /* Left click events */
- if ((buts&4) != (oldbuts&4)) {
- if (buts&4)
- evt.what = EVT_MOUSEDOWN;
- else
- evt.what = EVT_MOUSEUP;
- evt.message = EVT_LEFTBMASK;
- EVT.oldMove = -1;
- if (EVT.count < EVENTQSIZE)
- addEvent(&evt);
- }
-
- /* Right click events */
- if ((buts&1) != (oldbuts&1)) {
- if (buts&1)
- evt.what = EVT_MOUSEDOWN;
- else
- evt.what = EVT_MOUSEUP;
- evt.message = EVT_RIGHTBMASK;
- EVT.oldMove = -1;
- if (EVT.count < EVENTQSIZE)
- addEvent(&evt);
- }
-
- /* Middle click events */
- if ((buts&2) != (oldbuts&2)) {
- if (buts&2)
- evt.what = EVT_MOUSEDOWN;
- else
- evt.what = EVT_MOUSEUP;
- evt.message = EVT_MIDDLEBMASK;
- EVT.oldMove = -1;
- if (EVT.count < EVENTQSIZE)
- addEvent(&evt);
- }
-
- /* Mouse movement event */
- if (dx || dy) {
- evt.what = EVT_MOUSEMOVE;
- evt.message = 0;
- if (EVT.oldMove != -1) {
- /* Modify existing movement event */
- EVT.evtq[EVT.oldMove].where_x = evt.where_x;
- EVT.evtq[EVT.oldMove].where_y = evt.where_y;
- }
- else {
- /* Save id of this movement event */
- EVT.oldMove = EVT.freeHead;
- if (EVT.count < EVENTQSIZE)
- addEvent(&evt);
- }
- }
- oldbuts = buts;
- }
- }
- }
-
-#ifdef USE_OS_JOYSTICK
- /* Poll joystick events using the 1.x joystick driver API in the 2.2 kernels */
- if (js_version & ~0xffff) {
- static struct js_event js;
-
- /* Read joystick axis 0 */
- evt.when = 0;
- evt.modifiers = _PM_modifiers;
- if (joystick0_fd && dataReady(joystick0_fd) &&
- read(joystick0_fd, &js, sizeof(js)) == sizeof(js)) {
- if (js.type & JS_EVENT_BUTTON) {
- if (js.number < 2) { /* Only 2 buttons for now :( */
- buts0[js.number] = js.value;
- evt.what = EVT_JOYCLICK;
- makeJoyEvent(&evt);
- if (EVT.count < EVENTQSIZE)
- addEvent(&evt);
- }
- }
- else if (js.type & JS_EVENT_AXIS) {
- axis0[js.number] = scaleJoyAxis(js.value,js.number);
- evt.what = EVT_JOYMOVE;
- if (EVT.oldJoyMove != -1) {
- makeJoyEvent(&EVT.evtq[EVT.oldJoyMove]);
- }
- else if (EVT.count < EVENTQSIZE) {
- EVT.oldJoyMove = EVT.freeHead;
- makeJoyEvent(&evt);
- addEvent(&evt);
- }
- }
- }
-
- /* Read joystick axis 1 */
- if (joystick1_fd && dataReady(joystick1_fd) &&
- read(joystick1_fd, &js, sizeof(js))==sizeof(js)) {
- if (js.type & JS_EVENT_BUTTON) {
- if (js.number < 2) { /* Only 2 buttons for now :( */
- buts1[js.number] = js.value;
- evt.what = EVT_JOYCLICK;
- makeJoyEvent(&evt);
- if (EVT.count < EVENTQSIZE)
- addEvent(&evt);
- }
- }
- else if (js.type & JS_EVENT_AXIS) {
- axis1[js.number] = scaleJoyAxis(js.value,js.number<<2);
- evt.what = EVT_JOYMOVE;
- if (EVT.oldJoyMove != -1) {
- makeJoyEvent(&EVT.evtq[EVT.oldJoyMove]);
- }
- else if (EVT.count < EVENTQSIZE) {
- EVT.oldJoyMove = EVT.freeHead;
- makeJoyEvent(&evt);
- addEvent(&evt);
- }
- }
- }
- }
-#endif
-}
-
-/****************************************************************************
-REMARKS:
-This macro/function is used to converts the scan codes reported by the
-keyboard to our event libraries normalised format. We only have one scan
-code for the 'A' key, and use shift _PM_modifiers to determine if it is a
-Ctrl-F1, Alt-F1 etc. The raw scan codes from the keyboard work this way,
-but the OS gives us 'cooked' scan codes, we have to translate them back
-to the raw format.
-****************************************************************************/
-#define _EVT_maskKeyCode(evt)
-
-/****************************************************************************
-REMARKS:
-Set the speed of the serial port
-****************************************************************************/
-static int setspeed(
- int fd,
- int old,
- int new,
- unsigned short flags)
-{
- struct termios tty;
- char *c;
-
- tcgetattr(fd, &tty);
- tty.c_iflag = IGNBRK | IGNPAR;
- tty.c_oflag = 0;
- tty.c_lflag = 0;
- tty.c_line = 0;
- tty.c_cc[VTIME] = 0;
- tty.c_cc[VMIN] = 1;
- switch (old) {
- case 9600: tty.c_cflag = flags | B9600; break;
- case 4800: tty.c_cflag = flags | B4800; break;
- case 2400: tty.c_cflag = flags | B2400; break;
- case 1200:
- default: tty.c_cflag = flags | B1200; break;
- }
- tcsetattr(fd, TCSAFLUSH, &tty);
- switch (new) {
- case 9600: c = "*q"; tty.c_cflag = flags | B9600; break;
- case 4800: c = "*p"; tty.c_cflag = flags | B4800; break;
- case 2400: c = "*o"; tty.c_cflag = flags | B2400; break;
- case 1200:
- default: c = "*n"; tty.c_cflag = flags | B1200; break;
- }
- write(fd, c, 2);
- usleep(100000);
- tcsetattr(fd, TCSAFLUSH, &tty);
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-Generic mouse driver init code
-****************************************************************************/
-static void _EVT_mouse_init(void)
-{
- int i;
-
- /* Change from any available speed to the chosen one */
- for (i = 9600; i >= 1200; i /= 2)
- setspeed(_EVT_mouse_fd, i, opt_baud, mouse_infos[mouse_driver].flags);
-}
-
-/****************************************************************************
-REMARKS:
-Logitech mouse driver init code
-****************************************************************************/
-static void _EVT_logitech_init(void)
-{
- int i;
- struct stat buf;
- int busmouse;
-
- /* is this a serial- or a bus- mouse? */
- if (fstat(_EVT_mouse_fd,&buf) == -1)
- perror("fstat");
- i = MAJOR(buf.st_rdev);
- if (stat("/dev/ttyS0",&buf) == -1)
- perror("stat");
- busmouse=(i != MAJOR(buf.st_rdev));
-
- /* Fix the howmany field, so that serial mice have 1, while busmice have 3 */
- mouse_infos[mouse_driver].read = busmouse ? 3 : 1;
-
- /* Change from any available speed to the chosen one */
- for (i = 9600; i >= 1200; i /= 2)
- setspeed(_EVT_mouse_fd, i, opt_baud, mouse_infos[mouse_driver].flags);
-
- /* This stuff is peculiar of logitech mice, also for the serial ones */
- write(_EVT_mouse_fd, "S", 1);
- setspeed(_EVT_mouse_fd, opt_baud, opt_baud,CS8 |PARENB |PARODD |CREAD |CLOCAL |HUPCL);
-
- /* Configure the sample rate */
- for (i = 0; opt_sample <= sampletab[i].sample; i++)
- ;
- write(_EVT_mouse_fd,sampletab[i].code,1);
-}
-
-/****************************************************************************
-REMARKS:
-Microsoft Intellimouse init code
-****************************************************************************/
-static void _EVT_pnpmouse_init(void)
-{
- struct termios tty;
-
- tcgetattr(_EVT_mouse_fd, &tty);
- tty.c_iflag = IGNBRK | IGNPAR;
- tty.c_oflag = 0;
- tty.c_lflag = 0;
- tty.c_line = 0;
- tty.c_cc[VTIME] = 0;
- tty.c_cc[VMIN] = 1;
- tty.c_cflag = mouse_infos[mouse_driver].flags | B1200;
- tcsetattr(_EVT_mouse_fd, TCSAFLUSH, &tty); /* set parameters */
-}
-
-/****************************************************************************
-PARAMETERS:
-mouseMove - Callback function to call wheneve the mouse needs to be moved
-
-REMARKS:
-Initiliase the event handling module. Here we install our mouse handling ISR
-to be called whenever any button's are pressed or released. We also build
-the free list of events in the event queue.
-
-We use handler number 2 of the mouse libraries interrupt handlers for our
-event handling routines.
-****************************************************************************/
-void EVTAPI EVT_init(
- _EVT_mouseMoveHandler mouseMove)
-{
- int i;
- char *tmp;
-
- /* Initialise the event queue */
- EVT.mouseMove = mouseMove;
- initEventQueue();
- for (i = 0; i < 256; i++)
- keyUpMsg[i] = 0;
-
- /* Keyboard initialization */
- if (_PM_console_fd == -1)
- PM_fatalError("You must first call PM_openConsole to use the EVT functions!");
- _PM_keyboard_rawmode();
- fcntl(_PM_console_fd,F_SETFL,fcntl(_PM_console_fd,F_GETFL) | O_NONBLOCK);
-
- /* Mouse initialization */
- if ((tmp = getenv(ENV_MOUSEDRV)) != NULL) {
- for (i = 0; i < NB_MICE; i++) {
- if (!strcasecmp(tmp, mouse_infos[i].name)) {
- mouse_driver = i;
- break;
- }
- }
- if (i == NB_MICE) {
- fprintf(stderr,"Unknown mouse driver: %s\n", tmp);
- mouse_driver = EVT_noMouse;
- _EVT_mouse_fd = 0;
- }
- }
- if (mouse_driver != EVT_noMouse) {
- if (mouse_driver == EVT_gpm)
- strcpy(mouse_dev,"/dev/gpmdata");
- if ((tmp = getenv(ENV_MOUSEDEV)) != NULL)
- strcpy(mouse_dev,tmp);
-#ifdef CHECKED
- fprintf(stderr,"Using the %s MGL mouse driver on %s.\n", mouse_infos[mouse_driver].name, mouse_dev);
-#endif
- if ((_EVT_mouse_fd = open(mouse_dev, O_RDWR)) < 0) {
- perror("open");
- fprintf(stderr, "Unable to open mouse device %s, dropping mouse support.\n", mouse_dev);
- sleep(1);
- mouse_driver = EVT_noMouse;
- _EVT_mouse_fd = 0;
- }
- else {
- char c;
-
- /* Init and flush the mouse pending input queue */
- if (mouse_infos[mouse_driver].init)
- mouse_infos[mouse_driver].init();
- while(dataReady(_EVT_mouse_fd) && read(_EVT_mouse_fd, &c, 1) == 1)
- ;
- }
- }
-}
-
-/****************************************************************************
-REMARKS
-Changes the range of coordinates returned by the mouse functions to the
-specified range of values. This is used when changing between graphics
-modes set the range of mouse coordinates for the new display mode.
-****************************************************************************/
-void EVTAPI EVT_setMouseRange(
- int xRes,
- int yRes)
-{
- range_x = xRes;
- range_y = yRes;
-}
-
-/****************************************************************************
-REMARKS
-Modifes the mouse coordinates as necessary if scaling to OS coordinates,
-and sets the OS mouse cursor position.
-****************************************************************************/
-#define _EVT_setMousePos(x,y)
-
-/****************************************************************************
-REMARKS:
-Initiailises the internal event handling modules. The EVT_suspend function
-can be called to suspend event handling (such as when shelling out to DOS),
-and this function can be used to resume it again later.
-****************************************************************************/
-void EVT_resume(void)
-{
- /* Do nothing for Linux */
-}
-
-/****************************************************************************
-REMARKS
-Suspends all of our event handling operations. This is also used to
-de-install the event handling code.
-****************************************************************************/
-void EVT_suspend(void)
-{
- /* Do nothing for Linux */
-}
-
-/****************************************************************************
-REMARKS
-Exits the event module for program terminatation.
-****************************************************************************/
-void EVT_exit(void)
-{
- /* Restore signal handlers */
- _PM_restore_kb_mode();
- if (_EVT_mouse_fd) {
- close(_EVT_mouse_fd);
- _EVT_mouse_fd = 0;
- }
-#ifdef USE_OS_JOYSTICK
- if (joystick0_fd) {
- close(joystick0_fd);
- free(axis0);
- free(buts0);
- joystick0_fd = 0;
- }
- if (joystick1_fd) {
- close(joystick1_fd);
- free(axis1);
- free(buts1);
- joystick1_fd = 0;
- }
-#endif
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/linux/event.svga b/board/MAI/bios_emulator/scitech/src/pm/linux/event.svga
deleted file mode 100644
index c0358a0f8a..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/linux/event.svga
+++ /dev/null
@@ -1,1058 +0,0 @@
-/****************************************************************************
-*
-* The SuperVGA Kit - UniVBE Software Development Kit
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: IBM PC (MS DOS)
-*
-* Description: Routines to provide a Linux event queue, which automatically
-* handles keyboard and mouse events for the Linux compatability
-* libraries. Based on the event handling code in the MGL.
-*
-****************************************************************************/
-
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <time.h>
-#include <ctype.h>
-#include <termios.h>
-#include <signal.h>
-#include <fcntl.h>
-#include <unistd.h>
-#include <errno.h>
-#include <sys/time.h>
-#include <sys/stat.h>
-#include <sys/types.h>
-#include <linux/keyboard.h>
-#include <linux/kd.h>
-#include <linux/vt.h>
-#include <gpm.h>
-#include "pm.h"
-#include "vesavbe.h"
-#include "wdirect.h"
-
-/*--------------------------- Global variables ----------------------------*/
-
-#define EVENTQSIZE 100 /* Number of events in event queue */
-
-static int head = -1; /* Head of event queue */
-static int tail = -1; /* Tail of event queue */
-static int freeHead = -1; /* Head of free list */
-static int count = 0; /* No. of items currently in queue */
-static WD_event evtq[EVENTQSIZE]; /* The queue structure itself */
-static int oldMove = -1; /* Previous movement event */
-static int oldKey = -1; /* Previous key repeat event */
-static int mx,my; /* Current mouse position */
-static int xRes,yRes; /* Screen resolution coordinates */
-static void *stateBuf; /* Pointer to console state buffer */
-static int conn; /* GPM file descriptor for mouse handling */
-static int tty_fd; /* File descriptor for /dev/console */
-extern int tty_vc; /* Virtual console ID, from the PM/Pro library */
-static ibool key_down[128]; /* State of all keyboard keys */
-static struct termios old_conf; /* Saved terminal configuration */
-static int oldkbmode; /* and previous keyboard mode */
-struct vt_mode oldvtmode; /* Old virtual terminal mode */
-static int old_flags; /* Old flags for fcntl */
-static ulong key_modifiers; /* Keyboard modifiers */
-static int forbid_vt_release=0;/* Flag to forbid release of VT */
-static int forbid_vt_acquire=0;/* Flag to forbid cature of VT */
-static int oldmode; /* Old SVGA mode saved for VT switch*/
-static int initmode; /* Initial text mode */
-static ibool installed = false; /* True if we are installed */
-static void (_ASMAPI *moveCursor)(int x,int y) = NULL;
-static int (_ASMAPI *suspendAppCallback)(int flags) = NULL;
-
-#if 0
-/* Keyboard Translation table from scancodes to ASCII */
-
-static uchar keyTable[128] =
-"\0\0331234567890-=\010"
-"\011qwertyuiop[]\015"
-"\0asdfghjkl;'`\0\\"
-"zxcvbnm,./\0*\0 \0"
-"\0\0\0\0\0\0\0\0\0\0\0\0" /* Function keys */
-"789-456+1230.\0\0\0\0\0" /* Keypad keys */
-"\0\0\0\0\0\0\0\015\0/";
-
-static uchar keyTableShifted[128] =
-"\0\033!@#$%^&*()_+\010"
-"\011QWERTYUIOP{}\015"
-"\0ASDFGHJKL:\"~\0|"
-"ZXCVBNM<>?\0*\0 \0"
-"\0\0\0\0\0\0\0\0\0\0\0\0" /* Function keys */
-"789-456+1230.\0\0\0\0\0" /* Keypad keys */
-"\0\0\0\0\0\0\0\015\0/";
-#endif
-
-/* Macros to keep track of the CAPS and NUM lock states */
-
-#define EVT_CAPSSTATE 0x0100
-#define EVT_NUMSTATE 0x0200
-
-/* Helper macros for dealing with timers */
-
-#define TICKS_TO_USEC(t) ((t)*65536.0/1.193180)
-#define USEC_TO_TICKS(u) ((u)*1.193180/65536.0)
-
-/* Number of keycodes to read at a time from the console */
-
-#define KBDREADBUFFERSIZE 32
-
-/*---------------------------- Implementation -----------------------------*/
-
-/****************************************************************************
-REMARKS:
-Returns the current time stamp in units of 18.2 ticks per second.
-****************************************************************************/
-static ulong getTimeStamp(void)
-{
- return (ulong)(clock() / (CLOCKS_PER_SEC / 18.2));
-}
-
-/****************************************************************************
-PARAMETERS:
-evt - Event to place onto event queue
-
-REMARKS:
-Adds an event to the event queue by tacking it onto the tail of the event
-queue. This routine assumes that at least one spot is available on the
-freeList for the event to be inserted.
-****************************************************************************/
-static void addEvent(
- WD_event *evt)
-{
- int evtID;
-
- /* Get spot to place the event from the free list */
- evtID = freeHead;
- freeHead = evtq[freeHead].next;
-
- /* Add to the tail of the event queue */
- evt->next = -1;
- evt->prev = tail;
- if (tail != -1)
- evtq[tail].next = evtID;
- else
- head = evtID;
- tail = evtID;
- evtq[evtID] = *evt;
- count++;
-}
-
-/****************************************************************************
-PARAMETERS:
-what - Event code
-message - Event message
-modifiers - keyboard modifiers
-x - Mouse X position at time of event
-y - Mouse Y position at time of event
-but_stat - Mouse button status at time of event
-
-REMARKS:
-Adds a new mouse event to the event queue. This routine is called from
-within the mouse interrupt subroutine, so it must be efficient.
-****************************************************************************/
-static void addMouseEvent(
- uint what,
- uint message,
- int x,
- int y,
- uint but_stat)
-{
- WD_event evt;
-
- if (count < EVENTQSIZE) {
- evt.what = what;
- evt.when = getTimeStamp();
- evt.message = message;
- evt.modifiers = but_stat | key_modifiers;
- evt.where_x = x;
- evt.where_y = y;
- fprintf(stderr, "(%d,%d), buttons %ld\n", x,y, evt.modifiers);
- addEvent(&evt); /* Add to tail of event queue */
- }
-}
-
-/****************************************************************************
-PARAMETERS:
-scancode - Raw keyboard scan code
-modifiers - Keyboard modifiers flags
-
-REMARKS:
-Converts the raw scan code into the appropriate ASCII code using the scan
-code and the keyboard modifier flags.
-****************************************************************************/
-static ulong getKeyMessage(
- uint scancode,
- ulong modifiers)
-{
- ushort code = scancode << 8;
- ushort ascii;
- struct kbentry ke;
-
- ke.kb_index = scancode;
-
- /* Find the basic ASCII code for the scan code */
- if (modifiers & EVT_CAPSSTATE) {
- if (modifiers & EVT_SHIFTKEY)
- ke.kb_table = K_NORMTAB;
- // ascii = tolower(keyTableShifted[scancode]);
- else
- ke.kb_table = K_SHIFTTAB;
- // ascii = toupper(keyTable[scancode]);
- }
- else {
- if (modifiers & EVT_SHIFTKEY)
- ke.kb_table = K_SHIFTTAB;
- // ascii = keyTableShifted[scancode];
- else
- ke.kb_table = K_NORMTAB;
- // ascii = keyTable[scancode];
- }
- if(modifiers & EVT_ALTSTATE)
- ke.kb_table |= K_ALTTAB;
-
- if (ioctl(tty_fd, KDGKBENT, (unsigned long)&ke)) {
- fprintf(stderr, "KDGKBENT at index %d in table %d: ",
- scancode, ke.kb_table);
- return 0;
- }
- ascii = ke.kb_value;
-
- /* Add ASCII code if key is not alt'ed or ctrl'ed */
- if (!(modifiers & (EVT_ALTSTATE | EVT_CTRLSTATE)))
- code |= ascii;
-
- return code;
-}
-
-/****************************************************************************
-PARAMETERS:
-what - Event code
-scancode - Raw scancode of keyboard event to add
-
-REMARKS:
-Adds a new keyboard event to the event queue. We only take KEYUP and
-KEYDOWN event codes, however if a key is already down we convert the KEYDOWN
-to a KEYREPEAT.
-****************************************************************************/
-static void addKeyEvent(
- uint what,
- uint scancode)
-{
- WD_event evt;
-
- if (count < EVENTQSIZE) {
- evt.what = what;
- evt.when = getTimeStamp();
- evt.message = getKeyMessage(scancode,key_modifiers) | 0x10000UL;
- evt.where_x = evt.where_y = 0;
- evt.modifiers = key_modifiers;
- if (evt.what == EVT_KEYUP)
- key_down[scancode] = false;
- else if (evt.what == EVT_KEYDOWN) {
- if (key_down[scancode]) {
- if (oldKey != -1) {
- evtq[oldKey].message += 0x10000UL;
- }
- else {
- evt.what = EVT_KEYREPEAT;
- oldKey = freeHead;
- addEvent(&evt);
- oldMove = -1;
- }
- return;
- }
- key_down[scancode] = true;
- }
-
- addEvent(&evt);
- oldMove = -1;
- }
-}
-
-/****************************************************************************
-PARAMETERS:
-sig - Signal being sent to this signal handler
-
-REMARKS:
-Signal handler for the timer. This routine takes care of periodically
-posting timer events to the event queue.
-****************************************************************************/
-void timerHandler(
- int sig)
-{
- WD_event evt;
-
- if (sig == SIGALRM) {
- if (count < EVENTQSIZE) {
- evt.when = getTimeStamp();
- evt.what = EVT_TIMERTICK;
- evt.message = 0;
- evt.where_x = evt.where_y = 0;
- evt.modifiers = 0;
- addEvent(&evt);
- oldMove = -1;
- oldKey = -1;
- }
- signal(SIGALRM, timerHandler);
- }
-}
-
-/****************************************************************************
-REMARKS:
-Restore the terminal to normal operation on exit
-****************************************************************************/
-static void restore_term(void)
-{
- RMREGS regs;
-
- if (installed) {
- /* Restore text mode and the state of the console */
- regs.x.ax = 0x3;
- PM_int86(0x10,&regs,&regs);
- PM_restoreConsoleState(stateBuf,tty_fd);
-
- /* Restore console to normal operation */
- ioctl(tty_fd, VT_SETMODE, &oldvtmode);
- ioctl(tty_fd, KDSKBMODE, oldkbmode);
- tcsetattr(tty_fd, TCSAFLUSH, &old_conf);
- fcntl(tty_fd,F_SETFL,old_flags &= ~O_NONBLOCK);
- PM_closeConsole(tty_fd);
-
- /* Close the mouse driver */
- close(conn);
-
- /* Flag that we are not no longer installed */
- installed = false;
- }
-}
-
-/****************************************************************************
-REMARKS:
-Signal handler to capture forced program termination conditions so that
-we can clean up properly.
-****************************************************************************/
-static void exitHandler(int sig)
-{
- exit(-1);
-}
-
-/****************************************************************************
-REMARKS:
-Sleep until the virtual terminal is active
-****************************************************************************/
-void wait_vt_active(void)
-{
- while (ioctl(tty_fd, VT_WAITACTIVE, tty_vc) < 0) {
- if ((errno != EAGAIN) && (errno != EINTR)) {
- perror("ioctl(VT_WAITACTIVE)");
- exit(1);
- }
- usleep(150000);
- }
-}
-
-/****************************************************************************
-REMARKS:
-Signal handler called when our virtual terminal has been released and we are
-losing the active focus.
-****************************************************************************/
-static void release_vt_signal(int n)
-{
- forbid_vt_acquire = 1;
- if (forbid_vt_release) {
- forbid_vt_acquire = 0;
- ioctl(tty_fd, VT_RELDISP, 0);
- return;
- }
-
- // TODO: Call the user supplied suspendAppCallback and restore text
- // mode (saving the existing mode so we can restore it).
- //
- // Also if the suspendAppCallback is NULL then we have to
- // ignore the switch request!
- if(suspendAppCallback){
- oldmode = VBE_getVideoMode();
- suspendAppCallback(true);
- VBE_setVideoMode(initmode);
- }
-
- ioctl(tty_fd, VT_RELDISP, 1);
- forbid_vt_acquire = 0;
- wait_vt_active();
-}
-
-/****************************************************************************
-REMARKS:
-Signal handler called when our virtual terminal has been re-aquired and we
-are now regaiing the active focus.
-****************************************************************************/
-static void acquire_vt_signal(int n)
-{
- forbid_vt_release = 1;
- if (forbid_vt_acquire) {
- forbid_vt_release = 0;
- return;
- }
-
- // TODO: Restore the old display mode, call the user suspendAppCallback
- // and and we will be back in graphics mode.
-
- if(suspendAppCallback){
- VBE_setVideoMode(oldmode);
- suspendAppCallback(false);
- }
-
- ioctl(tty_fd, VT_RELDISP, VT_ACKACQ);
- forbid_vt_release = 0;
-}
-
-/****************************************************************************
-REMARKS:
-Function to set the action for a specific signal to call our signal handler.
-****************************************************************************/
-static void set_sigaction(int sig,void (*handler)(int))
-{
- struct sigaction siga;
-
- siga.sa_handler = handler;
- siga.sa_flags = SA_RESTART;
- memset(&(siga.sa_mask), 0, sizeof(sigset_t));
- sigaction(sig, &siga, NULL);
-}
-
-/****************************************************************************
-REMARKS:
-Function to take over control of VT switching so that we can capture
-virtual terminal release and aquire signals, allowing us to properly
-support VT switching while in graphics modes.
-****************************************************************************/
-static void take_vt_control(void)
-{
- struct vt_mode vtmode;
-
- ioctl(tty_fd, VT_GETMODE, &vtmode);
- oldvtmode = vtmode;
- vtmode.mode = VT_PROCESS;
- vtmode.relsig = SIGUSR1;
- vtmode.acqsig = SIGUSR2;
- set_sigaction(SIGUSR1, release_vt_signal);
- set_sigaction(SIGUSR2, acquire_vt_signal);
- ioctl(tty_fd, VT_SETMODE, &oldvtmode);
-}
-
-/****************************************************************************
-REMARKS:
-Set the shift keyboard LED's based on the current keyboard modifiers flags.
-****************************************************************************/
-static void updateLEDStatus(void)
-{
- int state = 0;
- if (key_modifiers & EVT_CAPSSTATE)
- state |= LED_CAP;
- if (key_modifiers & EVT_NUMSTATE)
- state |= LED_NUM;
- ioctl(tty_fd,KDSETLED,state);
-}
-
-/****************************************************************************
-PARAMETERS:
-scancode - Raw scan code to handle
-
-REMARKS:
-Handles the shift key modifiers and keeps track of the shift key states
-so that we can return the correct ASCII codes for the keyboard.
-****************************************************************************/
-static void toggleModifiers(
- int scancode)
-{
- static int caps_down = 0,num_down = 0;
-
- if (scancode & 0x80) {
- /* Handle key-release function */
- scancode &= 0x7F;
- if (scancode == 0x2A || scancode == 0x36)
- key_modifiers &= ~EVT_SHIFTKEY;
- else if (scancode == 0x1D || scancode == 0x61)
- key_modifiers &= ~EVT_CTRLSTATE;
- else if (scancode == 0x38 || scancode == 0x64)
- key_modifiers &= ~EVT_ALTSTATE;
- else if (scancode == 0x3A)
- caps_down = false;
- else if (scancode == 0x45)
- num_down = false;
- }
- else {
- /* Handle key-down function */
- scancode &= 0x7F;
- if (scancode == 0x2A || scancode == 0x36)
- key_modifiers |= EVT_SHIFTKEY;
- else if (scancode == 0x1D || scancode == 0x61)
- key_modifiers |= EVT_CTRLSTATE;
- else if (scancode == 0x38 || scancode == 0x64)
- key_modifiers |= EVT_ALTSTATE;
- else if (scancode == 0x3A) {
- if (!caps_down) {
- key_modifiers ^= EVT_CAPSSTATE;
- updateLEDStatus();
- }
- caps_down = true;
- }
- else if (scancode == 0x45) {
- if (!num_down) {
- key_modifiers ^= EVT_NUMSTATE;
- updateLEDStatus();
- }
- num_down = true;
- }
- }
-}
-
-/***************************************************************************
-REMARKS:
-Returns the number of bits that have changed from 0 to 1
-(a negative value means the number of bits that have changed from 1 to 0)
- **************************************************************************/
-static int compareBits(short a, short b)
-{
- int ret = 0;
- if( (a&1) != (b&1) ) ret += (b&1) ? 1 : -1;
- if( (a&2) != (b&2) ) ret += (b&2) ? 1 : -1;
- if( (a&4) != (b&4) ) ret += (b&4) ? 1 : -1;
- return ret;
-}
-
-/***************************************************************************
-REMARKS:
-Turns off all keyboard state because we can't rely on them anymore as soon
-as we switch VT's
-***************************************************************************/
-static void keyboard_clearstate(void)
-{
- key_modifiers = 0;
- memset(key_down, 0, sizeof(key_down));
-}
-
-/****************************************************************************
-REMARKS:
-Pumps all events from the console event queue into the WinDirect event queue.
-****************************************************************************/
-static void pumpEvents(void)
-{
- static uchar buf[KBDREADBUFFERSIZE];
- static char data[5];
- static int old_buts, old_mx, old_my;
- static struct timeval t;
- fd_set fds;
- int numkeys,i;
- int dx, dy, buts;
-
- /* Read all pending keypresses from keyboard buffer and process */
- while ((numkeys = read(tty_fd, buf, KBDREADBUFFERSIZE)) > 0) {
- for (i = 0; i < numkeys; i++) {
- toggleModifiers(buf[i]);
- if (key_modifiers & EVT_ALTSTATE){
- int fkey = 0;
-
- // Do VT switching here for Alt+Fx keypresses
- switch(buf[i] & 0x7F){
- case 59 ... 68: /* F1 to F10 */
- fkey = (buf[i] & 0x7F) - 58;
- break;
- case 87: /* F11 */
- case 88: /* F12 */
- fkey = (buf[i] & 0x7F) - 76;
- break;
- }
- if(fkey){
- struct vt_stat vts;
- ioctl(tty_fd, VT_GETSTATE, &vts);
-
- if(fkey != vts.v_active){
- keyboard_clearstate();
- ioctl(tty_fd, VT_ACTIVATE, fkey);
- }
- }
- }
-
- if (buf[i] & 0x80)
- addKeyEvent(EVT_KEYUP,buf[i] & 0x7F);
- else
- addKeyEvent(EVT_KEYDOWN,buf[i] & 0x7F);
- }
-
- // TODO: If we want to handle VC switching we will need to do it
- // in here so that we can switch away from the VC and then
- // switch back to it later. Right now VC switching is disabled
- // and in order to enable it we need to save/restore the state
- // of the graphics screen (using the suspendAppCallback and
- // saving/restoring the state of the current display mode).
-
- }
-
- /* Read all pending mouse events and process them */
- if(conn > 0){
- FD_ZERO(&fds);
- FD_SET(conn, &fds);
- t.tv_sec = t.tv_usec = 0L;
- while (select(conn+1, &fds, NULL, NULL, &t) > 0) {
- if(read(conn, data, 5) == 5){
- buts = (~data[0]) & 0x07;
- dx = (char)(data[1]) + (char)(data[3]);
- dy = -((char)(data[2]) + (char)(data[4]));
-
- mx += dx; my += dy;
-
- if (dx || dy)
- addMouseEvent(EVT_MOUSEMOVE, 0, mx, my, buts);
-
- if (buts != old_buts){
- int c = compareBits(buts,old_buts);
- if(c>0)
- addMouseEvent(EVT_MOUSEDOWN, 0, mx, my, buts);
- else if(c<0)
- addMouseEvent(EVT_MOUSEUP, 0, mx, my, buts);
- }
- old_mx = mx; old_my = my;
- old_buts = buts;
- FD_SET(conn, &fds);
- t.tv_sec = t.tv_usec = 0L;
- }
- }
- }
-}
-
-/*------------------------ Public interface routines ----------------------*/
-
-/****************************************************************************
-PARAMETERS:
-which - Which code for event to post
-what - Event code for event to post
-message - Event message
-modifiers - Shift key/mouse button modifiers
-
-RETURNS:
-True if the event was posted, false if queue is full.
-
-REMARKS:
-Posts an event to the event queue. This routine can be used to post any type
-of event into the queue.
-****************************************************************************/
-ibool _WDAPI WD_postEvent(
- ulong which,
- uint what,
- ulong message,
- ulong modifiers)
-{
- WD_event evt;
-
- if (count < EVENTQSIZE) {
- /* Save information in event record */
- evt.which = which;
- evt.what = what;
- evt.when = getTimeStamp();
- evt.message = message;
- evt.modifiers = modifiers;
- addEvent(&evt); /* Add to tail of event queue */
- return true;
- }
- else
- return false;
-}
-
-/****************************************************************************
-PARAMETERS:
-mask - Event mask to use
-
-REMARKS:
-Flushes all the event specified in 'mask' from the event queue.
-****************************************************************************/
-void _WDAPI WD_flushEvent(
- uint mask)
-{
- WD_event evt;
-
- do { /* Flush all events */
- WD_getEvent(&evt,mask);
- } while (evt.what != EVT_NULLEVT);
-}
-
-/****************************************************************************
-PARAMETERS:
-evt - Place to store event
-mask - Event mask to use
-
-REMARKS:
-Halts program execution until a specified event occurs. The event is
-returned. All pending events not in the specified mask will be ignored and
-removed from the queue.
-****************************************************************************/
-void _WDAPI WD_haltEvent(
- WD_event *evt,
- uint mask)
-{
- do { /* Wait for an event */
- WD_getEvent(evt,EVT_EVERYEVT);
- } while (!(evt->what & mask));
-}
-
-/****************************************************************************
-PARAMETERS:
-evt - Place to store event
-mask - Event mask to use
-
-RETURNS:
-True if an event was pending.
-
-REMARKS:
-Retrieves the next pending event defined in 'mask' from the event queue.
-The event queue is adjusted to reflect the new state after the event has
-been removed.
-****************************************************************************/
-ibool _WDAPI WD_getEvent(
- WD_event *evt,
- uint mask)
-{
- int evtID,next,prev;
-
- pumpEvents();
- if (moveCursor)
- moveCursor(mx,my); /* Move the mouse cursor */
- evt->what = EVT_NULLEVT; /* Default to null event */
-
- if (count) {
- for (evtID = head; evtID != -1; evtID = evtq[evtID].next) {
- if (evtq[evtID].what & mask)
- break; /* Found an event */
- }
- if (evtID == -1)
- return false; /* Event was not found */
- next = evtq[evtID].next;
- prev = evtq[evtID].prev;
- if (prev != -1)
- evtq[prev].next = next;
- else
- head = next;
- if (next != -1)
- evtq[next].prev = prev;
- else
- tail = prev;
- *evt = evtq[evtID]; /* Return the event */
- evtq[evtID].next = freeHead; /* and return to free list */
- freeHead = evtID;
- count--;
- if (evt->what == EVT_MOUSEMOVE)
- oldMove = -1;
- if (evt->what == EVT_KEYREPEAT)
- oldKey = -1;
- }
- return evt->what != EVT_NULLEVT;
-}
-
-/****************************************************************************
-PARAMETERS:
-evt - Place to store event
-mask - Event mask to use
-
-RETURNS:
-True if an event is pending.
-
-REMARKS:
-Peeks at the next pending event defined in 'mask' in the event queue. The
-event is not removed from the event queue.
-****************************************************************************/
-ibool _WDAPI WD_peekEvent(
- WD_event *evt,
- uint mask)
-{
- int evtID;
-
- pumpEvents();
- if (moveCursor)
- moveCursor(mx,my); /* Move the mouse cursor */
- evt->what = EVT_NULLEVT; /* Default to null event */
-
- if (count) {
- for (evtID = head; evtID != -1; evtID = evtq[evtID].next) {
- if (evtq[evtID].what & mask)
- break; /* Found an event */
- }
- if (evtID == -1)
- return false; /* Event was not found */
-
- *evt = evtq[evtID]; /* Return the event */
- }
- return evt->what != EVT_NULLEVT;
-}
-
-/****************************************************************************
-PARAMETERS:
-hwndMain - Handle to main window
-_xRes - X resolution of graphics mode to be used
-_yRes - Y resolulion of graphics mode to be used
-
-RETURNS:
-Handle to the fullscreen event window if (we return hwndMain on Linux)
-
-REMARKS:
-Initiliase the event handling module. Here we install our mouse handling
-ISR to be called whenever any button's are pressed or released. We also
-build the free list of events in the event queue.
-****************************************************************************/
-WD_HWND _WDAPI WD_startFullScreen(
- WD_HWND hwndMain,
- int _xRes,
- int _yRes)
-{
- int i;
- struct termios conf;
- if (!installed) {
- Gpm_Connect gpm;
-
- /* Build free list, and initialise global data structures */
- for (i = 0; i < EVENTQSIZE; i++)
- evtq[i].next = i+1;
- evtq[EVENTQSIZE-1].next = -1; /* Terminate list */
- count = freeHead = 0;
- head = tail = -1;
- oldMove = -1;
- oldKey = -1;
- xRes = _xRes;
- yRes = _yRes;
-
- /* Open the console device and initialise it for raw mode */
- tty_fd = PM_openConsole();
-
- /* Wait until virtual terminal is active and take over control */
- wait_vt_active();
- take_vt_control();
-
- /* Initialise keyboard handling to raw mode */
- if (ioctl(tty_fd, KDGKBMODE, &oldkbmode)) {
- printf("WD_startFullScreen: cannot get keyboard mode.\n");
- exit(-1);
- }
- old_flags = fcntl(tty_fd,F_GETFL);
- fcntl(tty_fd,F_SETFL,old_flags |= O_NONBLOCK);
- tcgetattr(tty_fd, &conf);
- old_conf = conf;
- conf.c_lflag &= ~(ICANON | ECHO | ECHOE | ECHOK | ECHONL | NOFLSH | ISIG);
- conf.c_iflag &= ~(ISTRIP | IGNCR | ICRNL | INLCR | BRKINT | PARMRK | INPCK | IUCLC | IXON | IXOFF);
- conf.c_iflag |= (IGNBRK | IGNPAR);
- conf.c_cc[VMIN] = 1;
- conf.c_cc[VTIME] = 0;
- conf.c_cc[VSUSP] = 0;
- tcsetattr(tty_fd, TCSAFLUSH, &conf);
- ioctl(tty_fd, KDSKBMODE, K_MEDIUMRAW);
-
- /* Clear the keyboard state information */
- memset(key_down, 0, sizeof(key_down));
- ioctl(tty_fd,KDSETLED,key_modifiers = 0);
-
- /* Initialize the mouse connection
- The user *MUST* run gpm with the option -R for this to work (or have a MouseSystems mouse)
- */
- if(Gpm_Open(&gpm,0) > 0){ /* GPM available */
- if ((conn = open(GPM_NODE_FIFO,O_RDONLY|O_SYNC)) < 0)
- fprintf(stderr,"WD_startFullScreen: Can't open mouse connection.\n");
- }else{
- fprintf(stderr,"Warning: when not using gpm -R, only MouseSystems mice are currently supported.\n");
- if ((conn = open("/dev/mouse",O_RDONLY|O_SYNC)) < 0)
- fprintf(stderr,"WD_startFullScreen: Can't open /dev/mouse.\n");
- }
- Gpm_Close();
-
- /* TODO: Scale the mouse coordinates to the specific resolution */
-
- /* Save the state of the console */
- if ((stateBuf = malloc(PM_getConsoleStateSize())) == NULL) {
- printf("Out of memory!\n");
- exit(-1);
- }
- PM_saveConsoleState(stateBuf,tty_fd);
- initmode = VBE_getVideoMode();
-
- /* Initialize the signal handler for timer events */
- signal(SIGALRM, timerHandler);
-
- /* Capture termination signals so we can clean up properly */
- signal(SIGTERM, exitHandler);
- signal(SIGINT, exitHandler);
- signal(SIGQUIT, exitHandler);
- atexit(restore_term);
-
- /* Signal that we are installed */
- installed = true;
- }
- return hwndMain;
-}
-
-/****************************************************************************
-REMARKS:
-Lets the library know when fullscreen graphics mode has been initialized so
-that we can properly scale the mouse driver coordinates.
-****************************************************************************/
-void _WDAPI WD_inFullScreen(void)
-{
- /* Nothing to do in here */
-}
-
-/****************************************************************************
-REMARKS:
-Suspends all of our event handling operations. This is also used to
-de-install the event handling code.
-****************************************************************************/
-void _WDAPI WD_restoreGDI(void)
-{
- restore_term();
-}
-
-/****************************************************************************
-PARAMETERS:
-ticks - Number of ticks between timer tick messages
-
-RETURNS:
-Previous value for the timer tick event spacing.
-
-REMARKS:
-The event module will automatically generate periodic timer tick events for
-you, with 'ticks' between each event posting. If you set the value of
-'ticks' to 0, the timer tick events are turned off.
-****************************************************************************/
-int _WDAPI WD_setTimerTick(
- int ticks)
-{
- int old;
- struct itimerval tim;
- long ms = TICKS_TO_USEC(ticks);
-
- getitimer(ITIMER_REAL, &tim);
- old = USEC_TO_TICKS(tim.it_value.tv_sec*1000000.0 + tim.it_value.tv_usec);
- tim.it_interval.tv_sec = ms / 1000000;
- tim.it_interval.tv_usec = ms % 1000000;
- setitimer(ITIMER_REAL, &tim, NULL);
- return old;
-}
-
-/****************************************************************************
-PARAMETERS:
-saveState - Address of suspend app callback to register
-
-REMARKS:
-Registers a user application supplied suspend application callback so that
-we can properly handle virtual terminal switching.
-****************************************************************************/
-void _WDAPI WD_setSuspendAppCallback(
- int (_ASMAPI *saveState)(int flags))
-{
- suspendAppCallback = saveState;
-}
-
-/****************************************************************************
-PARAMETERS:
-x - New X coordinate to move the mouse cursor to
-y - New Y coordinate to move the mouse cursor to
-
-REMARKS:
-Moves to mouse cursor to the specified coordinate.
-****************************************************************************/
-void _WDAPI WD_setMousePos(
- int x,
- int y)
-{
- mx = x;
- my = y;
-}
-
-/****************************************************************************
-PARAMETERS:
-x - Place to store X coordinate of mouse cursor
-y - Place to store Y coordinate of mouse cursor
-
-REMARKS:
-Reads the current mouse cursor location int *screen* coordinates.
-****************************************************************************/
-void _WDAPI WD_getMousePos(
- int *x,
- int *y)
-{
- *x = mx;
- *y = my;
-}
-
-/****************************************************************************
-PARAMETERS:
-mcb - Address of mouse callback function
-
-REMARKS:
-Registers an application supplied mouse callback function that is called
-whenever the mouse cursor moves.
-****************************************************************************/
-void _WDAPI WD_setMouseCallback(
- void (_ASMAPI *mcb)(int x,int y))
-{
- moveCursor = mcb;
-}
-
-/****************************************************************************
-PARAMETERS:
-xRes - New X resolution of graphics mode
-yRes - New Y resolution of graphics mode
-
-REMARKS:
-This is called to inform the event handling code that the screen resolution
-has changed so that the mouse coordinates can be scaled appropriately.
-****************************************************************************/
-void _WDAPI WD_changeResolution(
- int xRes,
- int yRes)
-{
- // Gpm_FitValues(xRes, yRes); // ??
-}
-
-/****************************************************************************
-PARAMETERS:
-scancode - Scan code to check if a key is down
-
-REMARKS:
-Determines if a particular key is down based on the scan code for the key.
-****************************************************************************/
-ibool _WDAPI WD_isKeyDown(
- uchar scancode)
-{
- return key_down[scancode];
-}
-
-/****************************************************************************
-REMARKS:
-Determines if the application needs to run in safe mode. Not necessary for
-anything but broken Windows 95 display drivers so we return false for
-Linux.
-****************************************************************************/
-int _WDAPI WD_isSafeMode(void)
-{
- return false;
-}
-
-
diff --git a/board/MAI/bios_emulator/scitech/src/pm/linux/oshdr.h b/board/MAI/bios_emulator/scitech/src/pm/linux/oshdr.h
deleted file mode 100644
index eadedfb137..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/linux/oshdr.h
+++ /dev/null
@@ -1,60 +0,0 @@
-/****************************************************************************
-*
-* SciTech Multi-platform Graphics Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Linux
-*
-* Description: Include all the OS specific header files.
-*
-****************************************************************************/
-
-#include <fcntl.h>
-#include <sys/time.h>
-#include <sys/ioctl.h>
-#include <sys/stat.h>
-#include <time.h>
-#include <linux/keyboard.h>
-#include <linux/kd.h>
-#include <linux/vt.h>
-#include <linux/fs.h>
-#ifdef USE_OS_JOYSTICK
-#include <linux/joystick.h>
-#endif
-#include <termios.h>
-#include <signal.h>
-#include <unistd.h>
-#include <ctype.h>
-#include <stdlib.h>
-
-/* Internal global variables */
-
-extern int _PM_console_fd,_PM_leds,_PM_modifiers;
-
-/* Internal function prototypes */
-
-void _PM_restore_kb_mode(void);
-void _PM_keyboard_rawmode(void);
-
-/* Linux needs the generic joystick scaling code */
-
-#define NEED_SCALE_JOY_AXIS
diff --git a/board/MAI/bios_emulator/scitech/src/pm/linux/pm.c b/board/MAI/bios_emulator/scitech/src/pm/linux/pm.c
deleted file mode 100644
index c12a83500a..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/linux/pm.c
+++ /dev/null
@@ -1,1809 +0,0 @@
-;/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Portions copyright (C) Josh Vanderhoof
-*
-* Language: ANSI C
-* Environment: Linux
-*
-* Description: Implementation for the OS Portability Manager Library, which
-* contains functions to implement OS specific services in a
-* generic, cross platform API. Porting the OS Portability
-* Manager library is the first step to porting any SciTech
-* products to a new platform.
-*
-****************************************************************************/
-
-#include "pmapi.h"
-#include "drvlib/os/os.h"
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <sys/mman.h>
-#include <sys/kd.h>
-#include <sys/ioctl.h>
-#include <sys/stat.h>
-#include <sys/vt.h>
-#include <sys/wait.h>
-#include <sys/types.h>
-#include <sys/time.h>
-#include <unistd.h>
-#include <termios.h>
-#include <fcntl.h>
-#include <syscall.h>
-#include <signal.h>
-#include <time.h>
-#include <ctype.h>
-#include <errno.h>
-#include <asm/io.h>
-#include <asm/types.h>
-#ifdef ENABLE_MTRR
-#include <asm/mtrr.h>
-#endif
-#include <asm/vm86.h>
-#ifdef __GLIBC__
-#include <sys/perm.h>
-#endif
-
-/*--------------------------- Global variables ----------------------------*/
-
-#define REAL_MEM_BASE ((void *)0x10000)
-#define REAL_MEM_SIZE 0x10000
-#define REAL_MEM_BLOCKS 0x100
-#define DEFAULT_VM86_FLAGS (IF_MASK | IOPL_MASK)
-#define DEFAULT_STACK_SIZE 0x1000
-#define RETURN_TO_32_INT 255
-
-/* Quick and dirty fix for vm86() syscall from lrmi 0.6 */
-static int
-vm86(struct vm86_struct *vm)
- {
- int r;
-#ifdef __PIC__
- asm volatile (
- "pushl %%ebx\n\t"
- "movl %2, %%ebx\n\t"
- "int $0x80\n\t"
- "popl %%ebx"
- : "=a" (r)
- : "0" (113), "r" (vm));
-#else
- asm volatile (
- "int $0x80"
- : "=a" (r)
- : "0" (113), "b" (vm));
-#endif
- return r;
- }
-
-
-static struct {
- int ready;
- unsigned short ret_seg, ret_off;
- unsigned short stack_seg, stack_off;
- struct vm86_struct vm;
- } context = {0};
-
-struct mem_block {
- unsigned int size : 20;
- unsigned int free : 1;
- };
-
-static struct {
- int ready;
- int count;
- struct mem_block blocks[REAL_MEM_BLOCKS];
- } mem_info = {0};
-
-int _PM_console_fd = -1;
-int _PM_leds = 0,_PM_modifiers = 0;
-static ibool inited = false;
-static int tty_vc = 0;
-static int console_count = 0;
-static int startup_vc;
-static int fd_mem = 0;
-static ibool in_raw_mode = false;
-#ifdef ENABLE_MTRR
-static int mtrr_fd;
-#endif
-static uint VESABuf_len = 1024; /* Length of the VESABuf buffer */
-static void *VESABuf_ptr = NULL; /* Near pointer to VESABuf */
-static uint VESABuf_rseg; /* Real mode segment of VESABuf */
-static uint VESABuf_roff; /* Real mode offset of VESABuf */
-#ifdef TRACE_IO
-static ulong traceAddr;
-#endif
-
-static void (PMAPIP fatalErrorCleanup)(void) = NULL;
-
-/*----------------------------- Implementation ----------------------------*/
-
-#ifdef TRACE_IO
-extern void printk(char *msg,...);
-#endif
-
-static inline void port_out(int value, int port)
-{
-#ifdef TRACE_IO
- printk("%04X:%04X: outb.%04X <- %02X\n", traceAddr >> 16, traceAddr & 0xFFFF, (ushort)port, (uchar)value);
-#endif
- asm volatile ("outb %0,%1"
- ::"a" ((unsigned char) value), "d"((unsigned short) port));
-}
-
-static inline void port_outw(int value, int port)
-{
-#ifdef TRACE_IO
- printk("%04X:%04X: outw.%04X <- %04X\n", traceAddr >> 16,traceAddr & 0xFFFF, (ushort)port, (ushort)value);
-#endif
- asm volatile ("outw %0,%1"
- ::"a" ((unsigned short) value), "d"((unsigned short) port));
-}
-
-static inline void port_outl(int value, int port)
-{
-#ifdef TRACE_IO
- printk("%04X:%04X: outl.%04X <- %08X\n", traceAddr >> 16,traceAddr & 0xFFFF, (ushort)port, (ulong)value);
-#endif
- asm volatile ("outl %0,%1"
- ::"a" ((unsigned long) value), "d"((unsigned short) port));
-}
-
-static inline unsigned int port_in(int port)
-{
- unsigned char value;
- asm volatile ("inb %1,%0"
- :"=a" ((unsigned char)value)
- :"d"((unsigned short) port));
-#ifdef TRACE_IO
- printk("%04X:%04X: inb.%04X -> %02X\n", traceAddr >> 16,traceAddr & 0xFFFF, (ushort)port, (uchar)value);
-#endif
- return value;
-}
-
-static inline unsigned int port_inw(int port)
-{
- unsigned short value;
- asm volatile ("inw %1,%0"
- :"=a" ((unsigned short)value)
- :"d"((unsigned short) port));
-#ifdef TRACE_IO
- printk("%04X:%04X: inw.%04X -> %04X\n", traceAddr >> 16,traceAddr & 0xFFFF, (ushort)port, (ushort)value);
-#endif
- return value;
-}
-
-static inline unsigned int port_inl(int port)
-{
- unsigned long value;
- asm volatile ("inl %1,%0"
- :"=a" ((unsigned long)value)
- :"d"((unsigned short) port));
-#ifdef TRACE_IO
- printk("%04X:%04X: inl.%04X -> %08X\n", traceAddr >> 16,traceAddr & 0xFFFF, (ushort)port, (ulong)value);
-#endif
- return value;
-}
-
-static int real_mem_init(void)
-{
- void *m;
- int fd_zero;
-
- if (mem_info.ready)
- return 1;
-
- if ((fd_zero = open("/dev/zero", O_RDONLY)) == -1)
- PM_fatalError("You must have root privledges to run this program!");
- if ((m = mmap((void *)REAL_MEM_BASE, REAL_MEM_SIZE,
- PROT_READ | PROT_WRITE | PROT_EXEC,
- MAP_FIXED | MAP_PRIVATE, fd_zero, 0)) == (void *)-1) {
- close(fd_zero);
- PM_fatalError("You must have root privledges to run this program!");
- }
- mem_info.ready = 1;
- mem_info.count = 1;
- mem_info.blocks[0].size = REAL_MEM_SIZE;
- mem_info.blocks[0].free = 1;
- return 1;
-}
-
-static void insert_block(int i)
-{
- memmove(
- mem_info.blocks + i + 1,
- mem_info.blocks + i,
- (mem_info.count - i) * sizeof(struct mem_block));
- mem_info.count++;
-}
-
-static void delete_block(int i)
-{
- mem_info.count--;
-
- memmove(
- mem_info.blocks + i,
- mem_info.blocks + i + 1,
- (mem_info.count - i) * sizeof(struct mem_block));
-}
-
-static inline void set_bit(unsigned int bit, void *array)
-{
- unsigned char *a = array;
- a[bit / 8] |= (1 << (bit % 8));
-}
-
-static inline unsigned int get_int_seg(int i)
-{
- return *(unsigned short *)(i * 4 + 2);
-}
-
-static inline unsigned int get_int_off(int i)
-{
- return *(unsigned short *)(i * 4);
-}
-
-static inline void pushw(unsigned short i)
-{
- struct vm86_regs *r = &context.vm.regs;
- r->esp -= 2;
- *(unsigned short *)(((unsigned int)r->ss << 4) + r->esp) = i;
-}
-
-ibool PMAPI PM_haveBIOSAccess(void)
-{ return true; }
-
-void PMAPI PM_init(void)
-{
- void *m;
- uint r_seg,r_off;
-
- if (inited)
- return;
-
- /* Map the Interrupt Vectors (0x0 - 0x400) + BIOS data (0x400 - 0x502)
- * and the physical framebuffer and ROM images from (0xa0000 - 0x100000)
- */
- real_mem_init();
- if (!fd_mem && (fd_mem = open("/dev/mem", O_RDWR)) == -1) {
- PM_fatalError("You must have root privileges to run this program!");
- }
- if ((m = mmap((void *)0, 0x502,
- PROT_READ | PROT_WRITE | PROT_EXEC,
- MAP_FIXED | MAP_PRIVATE, fd_mem, 0)) == (void *)-1) {
- PM_fatalError("You must have root privileges to run this program!");
- }
- if ((m = mmap((void *)0xA0000, 0xC0000 - 0xA0000,
- PROT_READ | PROT_WRITE,
- MAP_FIXED | MAP_SHARED, fd_mem, 0xA0000)) == (void *)-1) {
- PM_fatalError("You must have root privileges to run this program!");
- }
- if ((m = mmap((void *)0xC0000, 0xD0000 - 0xC0000,
- PROT_READ | PROT_WRITE | PROT_EXEC,
- MAP_FIXED | MAP_PRIVATE, fd_mem, 0xC0000)) == (void *)-1) {
- PM_fatalError("You must have root privileges to run this program!");
- }
- if ((m = mmap((void *)0xD0000, 0x100000 - 0xD0000,
- PROT_READ | PROT_WRITE,
- MAP_FIXED | MAP_SHARED, fd_mem, 0xD0000)) == (void *)-1) {
- PM_fatalError("You must have root privileges to run this program!");
- }
- inited = 1;
-
- /* Allocate a stack */
- m = PM_allocRealSeg(DEFAULT_STACK_SIZE,&r_seg,&r_off);
- context.stack_seg = r_seg;
- context.stack_off = r_off+DEFAULT_STACK_SIZE;
-
- /* Allocate the return to 32 bit routine */
- m = PM_allocRealSeg(2,&r_seg,&r_off);
- context.ret_seg = r_seg;
- context.ret_off = r_off;
- ((uchar*)m)[0] = 0xCD; /* int opcode */
- ((uchar*)m)[1] = RETURN_TO_32_INT;
- memset(&context.vm, 0, sizeof(context.vm));
-
- /* Enable kernel emulation of all ints except RETURN_TO_32_INT */
- memset(&context.vm.int_revectored, 0, sizeof(context.vm.int_revectored));
- set_bit(RETURN_TO_32_INT, &context.vm.int_revectored);
- context.ready = 1;
-#ifdef ENABLE_MTRR
- mtrr_fd = open("/dev/cpu/mtrr", O_RDWR, 0);
- if (mtrr_fd < 0)
- mtrr_fd = open("/proc/mtrr", O_RDWR, 0);
-#endif
- /* Enable I/O permissions to directly access I/O ports. We break the
- * allocation into two parts, one for the ports from 0-0x3FF and
- * another for the remaining ports up to 0xFFFF. Standard Linux kernels
- * only allow the first 0x400 ports to be enabled, so to enable all
- * 65536 ports you need a patched kernel that will enable the full
- * 8Kb I/O permissions bitmap.
- */
-#ifndef TRACE_IO
- ioperm(0x0,0x400,1);
- ioperm(0x400,0x10000-0x400,1);
-#endif
- iopl(3);
-}
-
-long PMAPI PM_getOSType(void)
-{ return _OS_LINUX; }
-
-int PMAPI PM_getModeType(void)
-{ return PM_386; }
-
-void PMAPI PM_backslash(char *s)
-{
- uint pos = strlen(s);
- if (s[pos-1] != '/') {
- s[pos] = '/';
- s[pos+1] = '\0';
- }
-}
-
-void PMAPI PM_setFatalErrorCleanup(
- void (PMAPIP cleanup)(void))
-{
- fatalErrorCleanup = cleanup;
-}
-
-void PMAPI PM_fatalError(const char *msg)
-{
- if (fatalErrorCleanup)
- fatalErrorCleanup();
- fprintf(stderr,"%s\n", msg);
- fflush(stderr);
- exit(1);
-}
-
-static void ExitVBEBuf(void)
-{
- if (VESABuf_ptr)
- PM_freeRealSeg(VESABuf_ptr);
- VESABuf_ptr = 0;
-}
-
-void * PMAPI PM_getVESABuf(uint *len,uint *rseg,uint *roff)
-{
- if (!VESABuf_ptr) {
- /* Allocate a global buffer for communicating with the VESA VBE */
- if ((VESABuf_ptr = PM_allocRealSeg(VESABuf_len, &VESABuf_rseg, &VESABuf_roff)) == NULL)
- return NULL;
- atexit(ExitVBEBuf);
- }
- *len = VESABuf_len;
- *rseg = VESABuf_rseg;
- *roff = VESABuf_roff;
- return VESABuf_ptr;
-}
-
-/* New raw console based getch and kbhit functions */
-
-#define KB_CAPS LED_CAP /* 4 */
-#define KB_NUMLOCK LED_NUM /* 2 */
-#define KB_SCROLL LED_SCR /* 1 */
-#define KB_SHIFT 8
-#define KB_CONTROL 16
-#define KB_ALT 32
-
-/* Structure used to save the keyboard mode to disk. We save it to disk
- * so that we can properly restore the mode later if the program crashed.
- */
-
-typedef struct {
- struct termios termios;
- int kb_mode;
- int leds;
- int flags;
- int startup_vc;
- } keyboard_mode;
-
-/* Name of the file used to save keyboard mode information */
-
-#define KBMODE_DAT "kbmode.dat"
-
-/****************************************************************************
-REMARKS:
-Open the keyboard mode file on disk.
-****************************************************************************/
-static FILE *open_kb_mode(
- char *mode,
- char *path)
-{
- if (!PM_findBPD("graphics.bpd",path))
- return NULL;
- PM_backslash(path);
- strcat(path,KBMODE_DAT);
- return fopen(path,mode);
-}
-
-/****************************************************************************
-REMARKS:
-Restore the keyboard to normal mode
-****************************************************************************/
-void _PM_restore_kb_mode(void)
-{
- FILE *kbmode;
- keyboard_mode mode;
- char path[PM_MAX_PATH];
-
- if (_PM_console_fd != -1 && (kbmode = open_kb_mode("rb",path)) != NULL) {
- if (fread(&mode,1,sizeof(mode),kbmode) == sizeof(mode)) {
- if (mode.startup_vc > 0)
- ioctl(_PM_console_fd, VT_ACTIVATE, mode.startup_vc);
- ioctl(_PM_console_fd, KDSKBMODE, mode.kb_mode);
- ioctl(_PM_console_fd, KDSETLED, mode.leds);
- tcsetattr(_PM_console_fd, TCSAFLUSH, &mode.termios);
- fcntl(_PM_console_fd,F_SETFL,mode.flags);
- }
- fclose(kbmode);
- unlink(path);
- in_raw_mode = false;
- }
-}
-
-/****************************************************************************
-REMARKS:
-Safely abort the event module upon catching a fatal error.
-****************************************************************************/
-void _PM_abort(
- int signo)
-{
- char buf[80];
-
- sprintf(buf,"Terminating on signal %d",signo);
- _PM_restore_kb_mode();
- PM_fatalError(buf);
-}
-
-/****************************************************************************
-REMARKS:
-Put the keyboard into raw mode
-****************************************************************************/
-void _PM_keyboard_rawmode(void)
-{
- struct termios conf;
- FILE *kbmode;
- keyboard_mode mode;
- char path[PM_MAX_PATH];
- int i;
- static int sig_list[] = {
- SIGHUP,
- SIGINT,
- SIGQUIT,
- SIGILL,
- SIGTRAP,
- SIGABRT,
- SIGIOT,
- SIGBUS,
- SIGFPE,
- SIGKILL,
- SIGSEGV,
- SIGTERM,
- };
-
- if ((kbmode = open_kb_mode("rb",path)) == NULL) {
- if ((kbmode = open_kb_mode("wb",path)) == NULL)
- PM_fatalError("Unable to open kbmode.dat file for writing!");
- if (ioctl(_PM_console_fd, KDGKBMODE, &mode.kb_mode))
- perror("KDGKBMODE");
- ioctl(_PM_console_fd, KDGETLED, &mode.leds);
- _PM_leds = mode.leds & 0xF;
- _PM_modifiers = 0;
- tcgetattr(_PM_console_fd, &mode.termios);
- conf = mode.termios;
- conf.c_lflag &= ~(ICANON | ECHO | ISIG);
- conf.c_iflag &= ~(ISTRIP | IGNCR | ICRNL | INLCR | BRKINT | PARMRK | INPCK | IUCLC | IXON | IXOFF);
- conf.c_iflag |= (IGNBRK | IGNPAR);
- conf.c_cc[VMIN] = 1;
- conf.c_cc[VTIME] = 0;
- conf.c_cc[VSUSP] = 0;
- tcsetattr(_PM_console_fd, TCSAFLUSH, &conf);
- mode.flags = fcntl(_PM_console_fd,F_GETFL);
- if (ioctl(_PM_console_fd, KDSKBMODE, K_MEDIUMRAW))
- perror("KDSKBMODE");
- atexit(_PM_restore_kb_mode);
- for (i = 0; i < sizeof(sig_list)/sizeof(sig_list[0]); i++)
- signal(sig_list[i], _PM_abort);
- mode.startup_vc = startup_vc;
- if (fwrite(&mode,1,sizeof(mode),kbmode) != sizeof(mode))
- PM_fatalError("Error writing kbmode.dat!");
- fclose(kbmode);
- in_raw_mode = true;
- }
-}
-
-int PMAPI PM_kbhit(void)
-{
- fd_set s;
- struct timeval tv = { 0, 0 };
-
- if (console_count == 0)
- PM_fatalError("You *must* open a console before using PM_kbhit!");
- if (!in_raw_mode)
- _PM_keyboard_rawmode();
- FD_ZERO(&s);
- FD_SET(_PM_console_fd, &s);
- return select(_PM_console_fd+1, &s, NULL, NULL, &tv) > 0;
-}
-
-int PMAPI PM_getch(void)
-{
- static uchar c;
- int release;
- static struct kbentry ke;
-
- if (console_count == 0)
- PM_fatalError("You *must* open a console before using PM_getch!");
- if (!in_raw_mode)
- _PM_keyboard_rawmode();
- while (read(_PM_console_fd, &c, 1) > 0) {
- release = c & 0x80;
- c &= 0x7F;
- if (release) {
- switch(c){
- case 42: case 54: /* Shift */
- _PM_modifiers &= ~KB_SHIFT;
- break;
- case 29: case 97: /* Control */
- _PM_modifiers &= ~KB_CONTROL;
- break;
- case 56: case 100: /* Alt / AltGr */
- _PM_modifiers &= ~KB_ALT;
- break;
- }
- continue;
- }
- switch (c) {
- case 42: case 54: /* Shift */
- _PM_modifiers |= KB_SHIFT;
- break;
- case 29: case 97: /* Control */
- _PM_modifiers |= KB_CONTROL;
- break;
- case 56: case 100: /* Alt / AltGr */
- _PM_modifiers |= KB_ALT;
- break;
- case 58: /* Caps Lock */
- _PM_modifiers ^= KB_CAPS;
- ioctl(_PM_console_fd, KDSETLED, _PM_modifiers & 7);
- break;
- case 69: /* Num Lock */
- _PM_modifiers ^= KB_NUMLOCK;
- ioctl(_PM_console_fd, KDSETLED, _PM_modifiers & 7);
- break;
- case 70: /* Scroll Lock */
- _PM_modifiers ^= KB_SCROLL;
- ioctl(_PM_console_fd, KDSETLED, _PM_modifiers & 7);
- break;
- case 28:
- return 0x1C;
- default:
- ke.kb_index = c;
- ke.kb_table = 0;
- if ((_PM_modifiers & KB_SHIFT) || (_PM_modifiers & KB_CAPS))
- ke.kb_table |= K_SHIFTTAB;
- if (_PM_modifiers & KB_ALT)
- ke.kb_table |= K_ALTTAB;
- ioctl(_PM_console_fd, KDGKBENT, (ulong)&ke);
- c = ke.kb_value & 0xFF;
- return c;
- }
- }
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-Sleep until the virtual terminal is active
-****************************************************************************/
-static void wait_vt_active(
- int _PM_console_fd)
-{
- while (ioctl(_PM_console_fd, VT_WAITACTIVE, tty_vc) < 0) {
- if ((errno != EAGAIN) && (errno != EINTR)) {
- perror("ioctl(VT_WAITACTIVE)");
- exit(1);
- }
- usleep(150000);
- }
-}
-
-/****************************************************************************
-REMARKS:
-Checks the owner of the specified virtual console.
-****************************************************************************/
-static int check_owner(
- int vc)
-{
- struct stat sbuf;
- char fname[30];
-
- sprintf(fname, "/dev/tty%d", vc);
- if ((stat(fname, &sbuf) >= 0) && (getuid() == sbuf.st_uid))
- return 1;
- printf("You must be the owner of the current console to use this program.\n");
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-Checks if the console is currently in graphics mode, and if so we forcibly
-restore it back to text mode again. This handles the case when a Nucleus or
-MGL program crashes and leaves the console in graphics mode. Running the
-textmode utility (or any other Nucleus/MGL program) via a telnet session
-into the machine will restore it back to normal.
-****************************************************************************/
-static void restore_text_console(
- int console_id)
-{
- if (ioctl(console_id, KDSETMODE, KD_TEXT) < 0)
- LOGWARN("ioctl(KDSETMODE) failed");
- _PM_restore_kb_mode();
-}
-
-/****************************************************************************
-REMARKS:
-Opens up the console device for output by finding an appropriate virutal
-console that we can run on.
-****************************************************************************/
-PM_HWND PMAPI PM_openConsole(
- PM_HWND hwndUser,
- int device,
- int xRes,
- int yRes,
- int bpp,
- ibool fullScreen)
-{
- struct vt_mode vtm;
- struct vt_stat vts;
- struct stat sbuf;
- char fname[30];
-
- /* Check if we have already opened the console */
- if (console_count++)
- return _PM_console_fd;
-
- /* Now, it would be great if we could use /dev/tty and see what it is
- * connected to. Alas, we cannot find out reliably what VC /dev/tty is
- * bound to. Thus we parse stdin through stderr for a reliable VC.
- */
- startup_vc = 0;
- for (_PM_console_fd = 0; _PM_console_fd < 3; _PM_console_fd++) {
- if (fstat(_PM_console_fd, &sbuf) < 0)
- continue;
- if (ioctl(_PM_console_fd, VT_GETMODE, &vtm) < 0)
- continue;
- if ((sbuf.st_rdev & 0xFF00) != 0x400)
- continue;
- if (!(sbuf.st_rdev & 0xFF))
- continue;
- tty_vc = sbuf.st_rdev & 0xFF;
- restore_text_console(_PM_console_fd);
- return _PM_console_fd;
- }
- if ((_PM_console_fd = open("/dev/console", O_RDWR)) < 0) {
- printf("open_dev_console: can't open /dev/console \n");
- exit(1);
- }
- if (ioctl(_PM_console_fd, VT_OPENQRY, &tty_vc) < 0)
- goto Error;
- if (tty_vc <= 0)
- goto Error;
- sprintf(fname, "/dev/tty%d", tty_vc);
- close(_PM_console_fd);
-
- /* Change our control terminal */
- setsid();
-
- /* We must use RDWR to allow for output... */
- if (((_PM_console_fd = open(fname, O_RDWR)) >= 0) &&
- (ioctl(_PM_console_fd, VT_GETSTATE, &vts) >= 0)) {
- if (!check_owner(vts.v_active))
- goto Error;
- restore_text_console(_PM_console_fd);
-
- /* Success, redirect all stdios */
- fflush(stdin);
- fflush(stdout);
- fflush(stderr);
- close(0);
- close(1);
- close(2);
- dup(_PM_console_fd);
- dup(_PM_console_fd);
- dup(_PM_console_fd);
-
- /* clear screen and switch to it */
- fwrite("\e[H\e[J", 6, 1, stderr);
- fflush(stderr);
- if (tty_vc != vts.v_active) {
- startup_vc = vts.v_active;
- ioctl(_PM_console_fd, VT_ACTIVATE, tty_vc);
- wait_vt_active(_PM_console_fd);
- }
- }
- return _PM_console_fd;
-
-Error:
- if (_PM_console_fd > 2)
- close(_PM_console_fd);
- console_count = 0;
- PM_fatalError(
- "Not running in a graphics capable console,\n"
- "and unable to find one.\n");
- return -1;
-}
-
-#define FONT_C 0x10000 /* 64KB for font data */
-
-/****************************************************************************
-REMARKS:
-Returns the size of the console state buffer.
-****************************************************************************/
-int PMAPI PM_getConsoleStateSize(void)
-{
- if (!inited)
- PM_init();
- return PM_getVGAStateSize() + FONT_C*2;
-}
-
-/****************************************************************************
-REMARKS:
-Save the state of the Linux console.
-****************************************************************************/
-void PMAPI PM_saveConsoleState(void *stateBuf,int console_id)
-{
- uchar *regs = stateBuf;
-
- /* Save the current console font */
- if (ioctl(console_id,GIO_FONT,&regs[PM_getVGAStateSize()]) < 0)
- perror("ioctl(GIO_FONT)");
-
- /* Inform the Linux console that we are going into graphics mode */
- if (ioctl(console_id, KDSETMODE, KD_GRAPHICS) < 0)
- perror("ioctl(KDSETMODE)");
-
- /* Save state of VGA registers */
- PM_saveVGAState(stateBuf);
-}
-
-void PMAPI PM_setSuspendAppCallback(int (_ASMAPIP saveState)(int flags))
-{
- /* TODO: Implement support for allowing console switching! */
-}
-
-/****************************************************************************
-REMARKS:
-Restore the state of the Linux console.
-****************************************************************************/
-void PMAPI PM_restoreConsoleState(const void *stateBuf,PM_HWND console_id)
-{
- const uchar *regs = stateBuf;
-
- /* Restore the state of the VGA compatible registers */
- PM_restoreVGAState(stateBuf);
-
- /* Inform the Linux console that we are back from graphics modes */
- if (ioctl(console_id, KDSETMODE, KD_TEXT) < 0)
- LOGWARN("ioctl(KDSETMODE) failed");
-
- /* Restore the old console font */
- if (ioctl(console_id,PIO_FONT,&regs[PM_getVGAStateSize()]) < 0)
- LOGWARN("ioctl(KDSETMODE) failed");
-
- /* Coming back from graphics mode on Linux also restored the previous
- * text mode console contents, so we need to clear the screen to get
- * around this since the cursor does not get homed by our code.
- */
- fflush(stdout);
- fflush(stderr);
- printf("\033[H\033[J");
- fflush(stdout);
-}
-
-/****************************************************************************
-REMARKS:
-Close the Linux console and put it back to normal.
-****************************************************************************/
-void PMAPI PM_closeConsole(PM_HWND _PM_console_fd)
-{
- /* Restore console to normal operation */
- if (--console_count == 0) {
- /* Re-activate the original virtual console */
- if (startup_vc > 0)
- ioctl(_PM_console_fd, VT_ACTIVATE, startup_vc);
-
- /* Close the console file descriptor */
- if (_PM_console_fd > 2)
- close(_PM_console_fd);
- _PM_console_fd = -1;
- }
-}
-
-void PM_setOSCursorLocation(int x,int y)
-{
- /* Nothing to do in here */
-}
-
-/****************************************************************************
-REMARKS:
-Set the screen width and height for the Linux console.
-****************************************************************************/
-void PM_setOSScreenWidth(int width,int height)
-{
- struct winsize ws;
- struct vt_sizes vs;
-
- /* Resize the software terminal */
- ws.ws_col = width;
- ws.ws_row = height;
- ioctl(_PM_console_fd, TIOCSWINSZ, &ws);
-
- /* And the hardware */
- vs.v_rows = height;
- vs.v_cols = width;
- vs.v_scrollsize = 0;
- ioctl(_PM_console_fd, VT_RESIZE, &vs);
-}
-
-ibool PMAPI PM_setRealTimeClockHandler(PM_intHandler ih, int frequency)
-{
- /* TODO: Implement this for Linux */
- return false;
-}
-
-void PMAPI PM_setRealTimeClockFrequency(int frequency)
-{
- /* TODO: Implement this for Linux */
-}
-
-void PMAPI PM_restoreRealTimeClockHandler(void)
-{
- /* TODO: Implement this for Linux */
-}
-
-char * PMAPI PM_getCurrentPath(
- char *path,
- int maxLen)
-{
- return getcwd(path,maxLen);
-}
-
-char PMAPI PM_getBootDrive(void)
-{ return '/'; }
-
-const char * PMAPI PM_getVBEAFPath(void)
-{ return PM_getNucleusConfigPath(); }
-
-const char * PMAPI PM_getNucleusPath(void)
-{
- char *env = getenv("NUCLEUS_PATH");
- return env ? env : "/usr/lib/nucleus";
-}
-
-const char * PMAPI PM_getNucleusConfigPath(void)
-{
- static char path[256];
- strcpy(path,PM_getNucleusPath());
- PM_backslash(path);
- strcat(path,"config");
- return path;
-}
-
-const char * PMAPI PM_getUniqueID(void)
-{
- static char buf[128];
- gethostname(buf, 128);
- return buf;
-}
-
-const char * PMAPI PM_getMachineName(void)
-{
- static char buf[128];
- gethostname(buf, 128);
- return buf;
-}
-
-void * PMAPI PM_getBIOSPointer(void)
-{
- static uchar *zeroPtr = NULL;
- if (!zeroPtr)
- zeroPtr = PM_mapPhysicalAddr(0,0xFFFFF,true);
- return (void*)(zeroPtr + 0x400);
-}
-
-void * PMAPI PM_getA0000Pointer(void)
-{
- /* PM_init maps in the 0xA0000 framebuffer region 1:1 with our
- * address mapping, so we can return the address here.
- */
- if (!inited)
- PM_init();
- return (void*)(0xA0000);
-}
-
-void * PMAPI PM_mapPhysicalAddr(ulong base,ulong limit,ibool isCached)
-{
- uchar *p;
- ulong baseAddr,baseOfs;
-
- if (!inited)
- PM_init();
- if (base >= 0xA0000 && base < 0x100000)
- return (void*)base;
- if (!fd_mem && (fd_mem = open("/dev/mem", O_RDWR)) == -1)
- return NULL;
-
- /* Round the physical address to a 4Kb boundary and the limit to a
- * 4Kb-1 boundary before passing the values to mmap. If we round the
- * physical address, then we also add an extra offset into the address
- * that we return.
- */
- baseOfs = base & 4095;
- baseAddr = base & ~4095;
- limit = ((limit+baseOfs+1+4095) & ~4095)-1;
- if ((p = mmap(0, limit+1,
- PROT_READ | PROT_WRITE, MAP_SHARED,
- fd_mem, baseAddr)) == (void *)-1)
- return NULL;
- return (void*)(p+baseOfs);
-}
-
-void PMAPI PM_freePhysicalAddr(void *ptr,ulong limit)
-{
- if ((ulong)ptr >= 0x100000)
- munmap(ptr,limit+1);
-}
-
-ulong PMAPI PM_getPhysicalAddr(void *p)
-{
- /* TODO: This function should find the physical address of a linear */
- /* address. */
- return 0xFFFFFFFFUL;
-}
-
-ibool PMAPI PM_getPhysicalAddrRange(void *p,ulong length,ulong *physAddress)
-{
- /* TODO: This function should find a range of physical addresses */
- /* for a linear address. */
- return false;
-}
-
-void PMAPI PM_sleep(ulong milliseconds)
-{
- /* TODO: Put the process to sleep for milliseconds */
-}
-
-int PMAPI PM_getCOMPort(int port)
-{
- /* TODO: Re-code this to determine real values using the Plug and Play */
- /* manager for the OS. */
- switch (port) {
- case 0: return 0x3F8;
- case 1: return 0x2F8;
- }
- return 0;
-}
-
-int PMAPI PM_getLPTPort(int port)
-{
- /* TODO: Re-code this to determine real values using the Plug and Play */
- /* manager for the OS. */
- switch (port) {
- case 0: return 0x3BC;
- case 1: return 0x378;
- case 2: return 0x278;
- }
- return 0;
-}
-
-void * PMAPI PM_mallocShared(long size)
-{
- return PM_malloc(size);
-}
-
-void PMAPI PM_freeShared(void *ptr)
-{
- PM_free(ptr);
-}
-
-void * PMAPI PM_mapToProcess(void *base,ulong limit)
-{ return (void*)base; }
-
-void * PMAPI PM_mapRealPointer(uint r_seg,uint r_off)
-{
- /* PM_init maps in the 0xA0000-0x100000 region 1:1 with our
- * address mapping, as well as all memory blocks in a 1:1 address
- * mapping so we can simply return the physical address in here.
- */
- if (!inited)
- PM_init();
- return (void*)MK_PHYS(r_seg,r_off);
-}
-
-void * PMAPI PM_allocRealSeg(uint size,uint *r_seg,uint *r_off)
-{
- int i;
- char *r = (char *)REAL_MEM_BASE;
-
- if (!inited)
- PM_init();
- if (!mem_info.ready)
- return NULL;
- if (mem_info.count == REAL_MEM_BLOCKS)
- return NULL;
- size = (size + 15) & ~15;
- for (i = 0; i < mem_info.count; i++) {
- if (mem_info.blocks[i].free && size < mem_info.blocks[i].size) {
- insert_block(i);
- mem_info.blocks[i].size = size;
- mem_info.blocks[i].free = 0;
- mem_info.blocks[i + 1].size -= size;
- *r_seg = (uint)(r) >> 4;
- *r_off = (uint)(r) & 0xF;
- return (void *)r;
- }
- r += mem_info.blocks[i].size;
- }
- return NULL;
-}
-
-void PMAPI PM_freeRealSeg(void *mem)
-{
- int i;
- char *r = (char *)REAL_MEM_BASE;
-
- if (!mem_info.ready)
- return;
- i = 0;
- while (mem != (void *)r) {
- r += mem_info.blocks[i].size;
- i++;
- if (i == mem_info.count)
- return;
- }
- mem_info.blocks[i].free = 1;
- if (i + 1 < mem_info.count && mem_info.blocks[i + 1].free) {
- mem_info.blocks[i].size += mem_info.blocks[i + 1].size;
- delete_block(i + 1);
- }
- if (i - 1 >= 0 && mem_info.blocks[i - 1].free) {
- mem_info.blocks[i - 1].size += mem_info.blocks[i].size;
- delete_block(i);
- }
-}
-
-#define DIRECTION_FLAG (1 << 10)
-
-static void em_ins(int size)
-{
- unsigned int edx, edi;
-
- edx = context.vm.regs.edx & 0xffff;
- edi = context.vm.regs.edi & 0xffff;
- edi += (unsigned int)context.vm.regs.ds << 4;
- if (context.vm.regs.eflags & DIRECTION_FLAG) {
- if (size == 4)
- asm volatile ("std; insl; cld"
- : "=D" (edi) : "d" (edx), "0" (edi));
- else if (size == 2)
- asm volatile ("std; insw; cld"
- : "=D" (edi) : "d" (edx), "0" (edi));
- else
- asm volatile ("std; insb; cld"
- : "=D" (edi) : "d" (edx), "0" (edi));
- }
- else {
- if (size == 4)
- asm volatile ("cld; insl"
- : "=D" (edi) : "d" (edx), "0" (edi));
- else if (size == 2)
- asm volatile ("cld; insw"
- : "=D" (edi) : "d" (edx), "0" (edi));
- else
- asm volatile ("cld; insb"
- : "=D" (edi) : "d" (edx), "0" (edi));
- }
- edi -= (unsigned int)context.vm.regs.ds << 4;
- context.vm.regs.edi &= 0xffff0000;
- context.vm.regs.edi |= edi & 0xffff;
-}
-
-static void em_rep_ins(int size)
-{
- unsigned int ecx, edx, edi;
-
- ecx = context.vm.regs.ecx & 0xffff;
- edx = context.vm.regs.edx & 0xffff;
- edi = context.vm.regs.edi & 0xffff;
- edi += (unsigned int)context.vm.regs.ds << 4;
- if (context.vm.regs.eflags & DIRECTION_FLAG) {
- if (size == 4)
- asm volatile ("std; rep; insl; cld"
- : "=D" (edi), "=c" (ecx)
- : "d" (edx), "0" (edi), "1" (ecx));
- else if (size == 2)
- asm volatile ("std; rep; insw; cld"
- : "=D" (edi), "=c" (ecx)
- : "d" (edx), "0" (edi), "1" (ecx));
- else
- asm volatile ("std; rep; insb; cld"
- : "=D" (edi), "=c" (ecx)
- : "d" (edx), "0" (edi), "1" (ecx));
- }
- else {
- if (size == 4)
- asm volatile ("cld; rep; insl"
- : "=D" (edi), "=c" (ecx)
- : "d" (edx), "0" (edi), "1" (ecx));
- else if (size == 2)
- asm volatile ("cld; rep; insw"
- : "=D" (edi), "=c" (ecx)
- : "d" (edx), "0" (edi), "1" (ecx));
- else
- asm volatile ("cld; rep; insb"
- : "=D" (edi), "=c" (ecx)
- : "d" (edx), "0" (edi), "1" (ecx));
- }
-
- edi -= (unsigned int)context.vm.regs.ds << 4;
- context.vm.regs.edi &= 0xffff0000;
- context.vm.regs.edi |= edi & 0xffff;
- context.vm.regs.ecx &= 0xffff0000;
- context.vm.regs.ecx |= ecx & 0xffff;
-}
-
-static void em_outs(int size)
-{
- unsigned int edx, esi;
-
- edx = context.vm.regs.edx & 0xffff;
- esi = context.vm.regs.esi & 0xffff;
- esi += (unsigned int)context.vm.regs.ds << 4;
- if (context.vm.regs.eflags & DIRECTION_FLAG) {
- if (size == 4)
- asm volatile ("std; outsl; cld"
- : "=S" (esi) : "d" (edx), "0" (esi));
- else if (size == 2)
- asm volatile ("std; outsw; cld"
- : "=S" (esi) : "d" (edx), "0" (esi));
- else
- asm volatile ("std; outsb; cld"
- : "=S" (esi) : "d" (edx), "0" (esi));
- }
- else {
- if (size == 4)
- asm volatile ("cld; outsl"
- : "=S" (esi) : "d" (edx), "0" (esi));
- else if (size == 2)
- asm volatile ("cld; outsw"
- : "=S" (esi) : "d" (edx), "0" (esi));
- else
- asm volatile ("cld; outsb"
- : "=S" (esi) : "d" (edx), "0" (esi));
- }
-
- esi -= (unsigned int)context.vm.regs.ds << 4;
- context.vm.regs.esi &= 0xffff0000;
- context.vm.regs.esi |= esi & 0xffff;
-}
-
-static void em_rep_outs(int size)
-{
- unsigned int ecx, edx, esi;
-
- ecx = context.vm.regs.ecx & 0xffff;
- edx = context.vm.regs.edx & 0xffff;
- esi = context.vm.regs.esi & 0xffff;
- esi += (unsigned int)context.vm.regs.ds << 4;
- if (context.vm.regs.eflags & DIRECTION_FLAG) {
- if (size == 4)
- asm volatile ("std; rep; outsl; cld"
- : "=S" (esi), "=c" (ecx)
- : "d" (edx), "0" (esi), "1" (ecx));
- else if (size == 2)
- asm volatile ("std; rep; outsw; cld"
- : "=S" (esi), "=c" (ecx)
- : "d" (edx), "0" (esi), "1" (ecx));
- else
- asm volatile ("std; rep; outsb; cld"
- : "=S" (esi), "=c" (ecx)
- : "d" (edx), "0" (esi), "1" (ecx));
- }
- else {
- if (size == 4)
- asm volatile ("cld; rep; outsl"
- : "=S" (esi), "=c" (ecx)
- : "d" (edx), "0" (esi), "1" (ecx));
- else if (size == 2)
- asm volatile ("cld; rep; outsw"
- : "=S" (esi), "=c" (ecx)
- : "d" (edx), "0" (esi), "1" (ecx));
- else
- asm volatile ("cld; rep; outsb"
- : "=S" (esi), "=c" (ecx)
- : "d" (edx), "0" (esi), "1" (ecx));
- }
-
- esi -= (unsigned int)context.vm.regs.ds << 4;
- context.vm.regs.esi &= 0xffff0000;
- context.vm.regs.esi |= esi & 0xffff;
- context.vm.regs.ecx &= 0xffff0000;
- context.vm.regs.ecx |= ecx & 0xffff;
-}
-
-static int emulate(void)
-{
- unsigned char *insn;
- struct {
- unsigned int size : 1;
- unsigned int rep : 1;
- } prefix = { 0, 0 };
- int i = 0;
-
- insn = (unsigned char *)((unsigned int)context.vm.regs.cs << 4);
- insn += context.vm.regs.eip;
-
- while (1) {
-#ifdef TRACE_IO
- traceAddr = ((ulong)context.vm.regs.cs << 16) + context.vm.regs.eip + i;
-#endif
- if (insn[i] == 0x66) {
- prefix.size = 1 - prefix.size;
- i++;
- }
- else if (insn[i] == 0xf3) {
- prefix.rep = 1;
- i++;
- }
- else if (insn[i] == 0xf0 || insn[i] == 0xf2
- || insn[i] == 0x26 || insn[i] == 0x2e
- || insn[i] == 0x36 || insn[i] == 0x3e
- || insn[i] == 0x64 || insn[i] == 0x65
- || insn[i] == 0x67) {
- /* these prefixes are just ignored */
- i++;
- }
- else if (insn[i] == 0x6c) {
- if (prefix.rep)
- em_rep_ins(1);
- else
- em_ins(1);
- i++;
- break;
- }
- else if (insn[i] == 0x6d) {
- if (prefix.rep) {
- if (prefix.size)
- em_rep_ins(4);
- else
- em_rep_ins(2);
- }
- else {
- if (prefix.size)
- em_ins(4);
- else
- em_ins(2);
- }
- i++;
- break;
- }
- else if (insn[i] == 0x6e) {
- if (prefix.rep)
- em_rep_outs(1);
- else
- em_outs(1);
- i++;
- break;
- }
- else if (insn[i] == 0x6f) {
- if (prefix.rep) {
- if (prefix.size)
- em_rep_outs(4);
- else
- em_rep_outs(2);
- }
- else {
- if (prefix.size)
- em_outs(4);
- else
- em_outs(2);
- }
- i++;
- break;
- }
- else if (insn[i] == 0xec) {
- *((uchar*)&context.vm.regs.eax) = port_in(context.vm.regs.edx);
- i++;
- break;
- }
- else if (insn[i] == 0xed) {
- if (prefix.size)
- *((ulong*)&context.vm.regs.eax) = port_inl(context.vm.regs.edx);
- else
- *((ushort*)&context.vm.regs.eax) = port_inw(context.vm.regs.edx);
- i++;
- break;
- }
- else if (insn[i] == 0xee) {
- port_out(context.vm.regs.eax,context.vm.regs.edx);
- i++;
- break;
- }
- else if (insn[i] == 0xef) {
- if (prefix.size)
- port_outl(context.vm.regs.eax,context.vm.regs.edx);
- else
- port_outw(context.vm.regs.eax,context.vm.regs.edx);
- i++;
- break;
- }
- else
- return 0;
- }
-
- context.vm.regs.eip += i;
- return 1;
-}
-
-static void debug_info(int vret)
-{
- int i;
- unsigned char *p;
-
- fputs("vm86() failed\n", stderr);
- fprintf(stderr, "return = 0x%x\n", vret);
- fprintf(stderr, "eax = 0x%08lx\n", context.vm.regs.eax);
- fprintf(stderr, "ebx = 0x%08lx\n", context.vm.regs.ebx);
- fprintf(stderr, "ecx = 0x%08lx\n", context.vm.regs.ecx);
- fprintf(stderr, "edx = 0x%08lx\n", context.vm.regs.edx);
- fprintf(stderr, "esi = 0x%08lx\n", context.vm.regs.esi);
- fprintf(stderr, "edi = 0x%08lx\n", context.vm.regs.edi);
- fprintf(stderr, "ebp = 0x%08lx\n", context.vm.regs.ebp);
- fprintf(stderr, "eip = 0x%08lx\n", context.vm.regs.eip);
- fprintf(stderr, "cs = 0x%04x\n", context.vm.regs.cs);
- fprintf(stderr, "esp = 0x%08lx\n", context.vm.regs.esp);
- fprintf(stderr, "ss = 0x%04x\n", context.vm.regs.ss);
- fprintf(stderr, "ds = 0x%04x\n", context.vm.regs.ds);
- fprintf(stderr, "es = 0x%04x\n", context.vm.regs.es);
- fprintf(stderr, "fs = 0x%04x\n", context.vm.regs.fs);
- fprintf(stderr, "gs = 0x%04x\n", context.vm.regs.gs);
- fprintf(stderr, "eflags = 0x%08lx\n", context.vm.regs.eflags);
- fputs("cs:ip = [ ", stderr);
- p = (unsigned char *)((context.vm.regs.cs << 4) + (context.vm.regs.eip & 0xffff));
- for (i = 0; i < 16; ++i)
- fprintf(stderr, "%02x ", (unsigned int)p[i]);
- fputs("]\n", stderr);
- fflush(stderr);
-}
-
-static int run_vm86(void)
-{
- unsigned int vret;
-
- for (;;) {
- vret = vm86(&context.vm);
- if (VM86_TYPE(vret) == VM86_INTx) {
- unsigned int v = VM86_ARG(vret);
- if (v == RETURN_TO_32_INT)
- return 1;
- pushw(context.vm.regs.eflags);
- pushw(context.vm.regs.cs);
- pushw(context.vm.regs.eip);
- context.vm.regs.cs = get_int_seg(v);
- context.vm.regs.eip = get_int_off(v);
- context.vm.regs.eflags &= ~(VIF_MASK | TF_MASK);
- continue;
- }
- if (VM86_TYPE(vret) != VM86_UNKNOWN)
- break;
- if (!emulate())
- break;
- }
- debug_info(vret);
- return 0;
-}
-
-#define IND(ereg) context.vm.regs.ereg = regs->ereg
-#define OUTD(ereg) regs->ereg = context.vm.regs.ereg
-
-void PMAPI DPMI_int86(int intno, DPMI_regs *regs)
-{
- if (!inited)
- PM_init();
- memset(&context.vm.regs, 0, sizeof(context.vm.regs));
- IND(eax); IND(ebx); IND(ecx); IND(edx); IND(esi); IND(edi);
- context.vm.regs.eflags = DEFAULT_VM86_FLAGS;
- context.vm.regs.cs = get_int_seg(intno);
- context.vm.regs.eip = get_int_off(intno);
- context.vm.regs.ss = context.stack_seg;
- context.vm.regs.esp = context.stack_off;
- pushw(DEFAULT_VM86_FLAGS);
- pushw(context.ret_seg);
- pushw(context.ret_off);
- run_vm86();
- OUTD(eax); OUTD(ebx); OUTD(ecx); OUTD(edx); OUTD(esi); OUTD(edi);
- regs->flags = context.vm.regs.eflags;
-}
-
-#define IN(ereg) context.vm.regs.ereg = in->e.ereg
-#define OUT(ereg) out->e.ereg = context.vm.regs.ereg
-
-int PMAPI PM_int86(int intno, RMREGS *in, RMREGS *out)
-{
- if (!inited)
- PM_init();
- memset(&context.vm.regs, 0, sizeof(context.vm.regs));
- IN(eax); IN(ebx); IN(ecx); IN(edx); IN(esi); IN(edi);
- context.vm.regs.eflags = DEFAULT_VM86_FLAGS;
- context.vm.regs.cs = get_int_seg(intno);
- context.vm.regs.eip = get_int_off(intno);
- context.vm.regs.ss = context.stack_seg;
- context.vm.regs.esp = context.stack_off;
- pushw(DEFAULT_VM86_FLAGS);
- pushw(context.ret_seg);
- pushw(context.ret_off);
- run_vm86();
- OUT(eax); OUT(ebx); OUT(ecx); OUT(edx); OUT(esi); OUT(edi);
- out->x.cflag = context.vm.regs.eflags & 1;
- return out->x.ax;
-}
-
-int PMAPI PM_int86x(int intno, RMREGS *in, RMREGS *out,
- RMSREGS *sregs)
-{
- if (!inited)
- PM_init();
- if (intno == 0x21) {
- time_t today = time(NULL);
- struct tm *t;
- t = localtime(&today);
- out->x.cx = t->tm_year + 1900;
- out->h.dh = t->tm_mon + 1;
- out->h.dl = t->tm_mday;
- }
- else {
- unsigned int seg, off;
- seg = get_int_seg(intno);
- off = get_int_off(intno);
- memset(&context.vm.regs, 0, sizeof(context.vm.regs));
- IN(eax); IN(ebx); IN(ecx); IN(edx); IN(esi); IN(edi);
- context.vm.regs.eflags = DEFAULT_VM86_FLAGS;
- context.vm.regs.cs = seg;
- context.vm.regs.eip = off;
- context.vm.regs.es = sregs->es;
- context.vm.regs.ds = sregs->ds;
- context.vm.regs.fs = sregs->fs;
- context.vm.regs.gs = sregs->gs;
- context.vm.regs.ss = context.stack_seg;
- context.vm.regs.esp = context.stack_off;
- pushw(DEFAULT_VM86_FLAGS);
- pushw(context.ret_seg);
- pushw(context.ret_off);
- run_vm86();
- OUT(eax); OUT(ebx); OUT(ecx); OUT(edx); OUT(esi); OUT(edi);
- sregs->es = context.vm.regs.es;
- sregs->ds = context.vm.regs.ds;
- sregs->fs = context.vm.regs.fs;
- sregs->gs = context.vm.regs.gs;
- out->x.cflag = context.vm.regs.eflags & 1;
- }
- return out->e.eax;
-}
-
-#define OUTR(ereg) in->e.ereg = context.vm.regs.ereg
-
-void PMAPI PM_callRealMode(uint seg,uint off, RMREGS *in,
- RMSREGS *sregs)
-{
- if (!inited)
- PM_init();
- memset(&context.vm.regs, 0, sizeof(context.vm.regs));
- IN(eax); IN(ebx); IN(ecx); IN(edx); IN(esi); IN(edi);
- context.vm.regs.eflags = DEFAULT_VM86_FLAGS;
- context.vm.regs.cs = seg;
- context.vm.regs.eip = off;
- context.vm.regs.ss = context.stack_seg;
- context.vm.regs.esp = context.stack_off;
- context.vm.regs.es = sregs->es;
- context.vm.regs.ds = sregs->ds;
- context.vm.regs.fs = sregs->fs;
- context.vm.regs.gs = sregs->gs;
- pushw(DEFAULT_VM86_FLAGS);
- pushw(context.ret_seg);
- pushw(context.ret_off);
- run_vm86();
- OUTR(eax); OUTR(ebx); OUTR(ecx); OUTR(edx); OUTR(esi); OUTR(edi);
- sregs->es = context.vm.regs.es;
- sregs->ds = context.vm.regs.ds;
- sregs->fs = context.vm.regs.fs;
- sregs->gs = context.vm.regs.gs;
- in->x.cflag = context.vm.regs.eflags & 1;
-}
-
-void PMAPI PM_availableMemory(ulong *physical,ulong *total)
-{
- FILE *mem = fopen("/proc/meminfo","r");
- char buf[1024];
-
- fgets(buf,1024,mem);
- fgets(buf,1024,mem);
- sscanf(buf,"Mem: %*d %*d %ld", physical);
- fgets(buf,1024,mem);
- sscanf(buf,"Swap: %*d %*d %ld", total);
- fclose(mem);
- *total += *physical;
-}
-
-void * PMAPI PM_allocLockedMem(uint size,ulong *physAddr,ibool contiguous,ibool below16M)
-{
- /* TODO: Implement this for Linux */
- return NULL;
-}
-
-void PMAPI PM_freeLockedMem(void *p,uint size,ibool contiguous)
-{
- /* TODO: Implement this for Linux */
-}
-
-void * PMAPI PM_allocPage(
- ibool locked)
-{
- /* TODO: Implement this for Linux */
- return NULL;
-}
-
-void PMAPI PM_freePage(
- void *p)
-{
- /* TODO: Implement this for Linux */
-}
-
-void PMAPI PM_setBankA(int bank)
-{
- if (!inited)
- PM_init();
- memset(&context.vm.regs, 0, sizeof(context.vm.regs));
- context.vm.regs.eax = 0x4F05;
- context.vm.regs.ebx = 0x0000;
- context.vm.regs.edx = bank;
- context.vm.regs.eflags = DEFAULT_VM86_FLAGS;
- context.vm.regs.cs = get_int_seg(0x10);
- context.vm.regs.eip = get_int_off(0x10);
- context.vm.regs.ss = context.stack_seg;
- context.vm.regs.esp = context.stack_off;
- pushw(DEFAULT_VM86_FLAGS);
- pushw(context.ret_seg);
- pushw(context.ret_off);
- run_vm86();
-}
-
-void PMAPI PM_setBankAB(int bank)
-{
- if (!inited)
- PM_init();
- memset(&context.vm.regs, 0, sizeof(context.vm.regs));
- context.vm.regs.eax = 0x4F05;
- context.vm.regs.ebx = 0x0000;
- context.vm.regs.edx = bank;
- context.vm.regs.eflags = DEFAULT_VM86_FLAGS;
- context.vm.regs.cs = get_int_seg(0x10);
- context.vm.regs.eip = get_int_off(0x10);
- context.vm.regs.ss = context.stack_seg;
- context.vm.regs.esp = context.stack_off;
- pushw(DEFAULT_VM86_FLAGS);
- pushw(context.ret_seg);
- pushw(context.ret_off);
- run_vm86();
- context.vm.regs.eax = 0x4F05;
- context.vm.regs.ebx = 0x0001;
- context.vm.regs.edx = bank;
- context.vm.regs.eflags = DEFAULT_VM86_FLAGS;
- context.vm.regs.cs = get_int_seg(0x10);
- context.vm.regs.eip = get_int_off(0x10);
- context.vm.regs.ss = context.stack_seg;
- context.vm.regs.esp = context.stack_off;
- pushw(DEFAULT_VM86_FLAGS);
- pushw(context.ret_seg);
- pushw(context.ret_off);
- run_vm86();
-}
-
-void PMAPI PM_setCRTStart(int x,int y,int waitVRT)
-{
- if (!inited)
- PM_init();
- memset(&context.vm.regs, 0, sizeof(context.vm.regs));
- context.vm.regs.eax = 0x4F07;
- context.vm.regs.ebx = waitVRT;
- context.vm.regs.ecx = x;
- context.vm.regs.edx = y;
- context.vm.regs.eflags = DEFAULT_VM86_FLAGS;
- context.vm.regs.cs = get_int_seg(0x10);
- context.vm.regs.eip = get_int_off(0x10);
- context.vm.regs.ss = context.stack_seg;
- context.vm.regs.esp = context.stack_off;
- pushw(DEFAULT_VM86_FLAGS);
- pushw(context.ret_seg);
- pushw(context.ret_off);
- run_vm86();
-}
-
-int PMAPI PM_enableWriteCombine(ulong base,ulong length,uint type)
-{
-#ifdef ENABLE_MTRR
- struct mtrr_sentry sentry;
-
- if (mtrr_fd < 0)
- return PM_MTRR_ERR_NO_OS_SUPPORT;
- sentry.base = base;
- sentry.size = length;
- sentry.type = type;
- if (ioctl(mtrr_fd, MTRRIOC_ADD_ENTRY, &sentry) == -1) {
- /* TODO: Need to decode MTRR error codes!! */
- return PM_MTRR_NOT_SUPPORTED;
- }
- return PM_MTRR_ERR_OK;
-#else
- return PM_MTRR_ERR_NO_OS_SUPPORT;
-#endif
-}
-
-/****************************************************************************
-PARAMETERS:
-callback - Function to callback with write combine information
-
-REMARKS:
-Function to enumerate all write combine regions currently enabled for the
-processor.
-****************************************************************************/
-int PMAPI PM_enumWriteCombine(
- PM_enumWriteCombine_t callback)
-{
-#ifdef ENABLE_MTRR
- struct mtrr_gentry gentry;
-
- if (mtrr_fd < 0)
- return PM_MTRR_ERR_NO_OS_SUPPORT;
-
- for (gentry.regnum = 0; ioctl (mtrr_fd, MTRRIOC_GET_ENTRY, &gentry) == 0;
- ++gentry.regnum) {
- if (gentry.size > 0) {
- /* WARNING: This code assumes that the types in pmapi.h match the ones */
- /* in the Linux kernel (mtrr.h) */
- callback(gentry.base, gentry.size, gentry.type);
- }
- }
-
- return PM_MTRR_ERR_OK;
-#else
- return PM_MTRR_ERR_NO_OS_SUPPORT;
-#endif
-}
-
-ibool PMAPI PM_doBIOSPOST(
- ushort axVal,
- ulong BIOSPhysAddr,
- void *copyOfBIOS,
- ulong BIOSLen)
-{
- char *bios_ptr = (char*)0xC0000;
- char *old_bios;
- ulong Current10, Current6D, *rvec = 0;
- RMREGS regs;
- RMSREGS sregs;
-
- /* The BIOS is mapped to 0xC0000 with a private memory mapping enabled
- * which means we have a copy on write scheme. Hence we simply copy
- * the secondary BIOS image over the top of the old one.
- */
- if (!inited)
- PM_init();
- if ((old_bios = PM_malloc(BIOSLen)) == NULL)
- return false;
- if (BIOSPhysAddr != 0xC0000) {
- memcpy(old_bios,bios_ptr,BIOSLen);
- memcpy(bios_ptr,copyOfBIOS,BIOSLen);
- }
-
- /* The interrupt vectors should already be mmap()'ed from 0-0x400 in PM_init */
- Current10 = rvec[0x10];
- Current6D = rvec[0x6D];
-
- /* POST the secondary BIOS */
- rvec[0x10] = rvec[0x42]; /* Restore int 10h to STD-BIOS */
- regs.x.ax = axVal;
- PM_callRealMode(0xC000,0x0003,&regs,&sregs);
-
- /* Restore interrupt vectors */
- rvec[0x10] = Current10;
- rvec[0x6D] = Current6D;
-
- /* Restore original BIOS image */
- if (BIOSPhysAddr != 0xC0000)
- memcpy(bios_ptr,old_bios,BIOSLen);
- PM_free(old_bios);
- return true;
-}
-
-int PMAPI PM_lockDataPages(void *p,uint len,PM_lockHandle *lh)
-{
- p = p; len = len;
- return 1;
-}
-
-int PMAPI PM_unlockDataPages(void *p,uint len,PM_lockHandle *lh)
-{
- p = p; len = len;
- return 1;
-}
-
-int PMAPI PM_lockCodePages(void (*p)(),uint len,PM_lockHandle *lh)
-{
- p = p; len = len;
- return 1;
-}
-
-int PMAPI PM_unlockCodePages(void (*p)(),uint len,PM_lockHandle *lh)
-{
- p = p; len = len;
- return 1;
-}
-
-PM_MODULE PMAPI PM_loadLibrary(
- const char *szDLLName)
-{
- /* TODO: Implement this to load shared libraries! */
- (void)szDLLName;
- return NULL;
-}
-
-void * PMAPI PM_getProcAddress(
- PM_MODULE hModule,
- const char *szProcName)
-{
- /* TODO: Implement this! */
- (void)hModule;
- (void)szProcName;
- return NULL;
-}
-
-void PMAPI PM_freeLibrary(
- PM_MODULE hModule)
-{
- /* TODO: Implement this! */
- (void)hModule;
-}
-
-int PMAPI PM_setIOPL(
- int level)
-{
- /* TODO: Move the IOPL switching into this function!! */
- return level;
-}
-
-void PMAPI PM_flushTLB(void)
-{
- /* Do nothing on Linux. */
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/linux/vflat.c b/board/MAI/bios_emulator/scitech/src/pm/linux/vflat.c
deleted file mode 100644
index 579ef2c95c..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/linux/vflat.c
+++ /dev/null
@@ -1,49 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-*
-* Description: Dummy module; no virtual framebuffer for this OS
-*
-****************************************************************************/
-
-#include "pmapi.h"
-
-ibool PMAPI VF_available(void)
-{
- return false;
-}
-
-void * PMAPI VF_init(ulong baseAddr,int bankSize,int codeLen,void *bankFunc)
-{
- baseAddr = baseAddr;
- bankSize = bankSize;
- codeLen = codeLen;
- bankFunc = bankFunc;
- return NULL;
-}
-
-void PMAPI VF_exit(void)
-{
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/linux/ztimer.c b/board/MAI/bios_emulator/scitech/src/pm/linux/ztimer.c
deleted file mode 100644
index 1b9bae28a6..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/linux/ztimer.c
+++ /dev/null
@@ -1,95 +0,0 @@
-/****************************************************************************
-*
-* Ultra Long Period Timer
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Linux
-*
-* Description: Linux specific implementation for the Zen Timer functions.
-*
-****************************************************************************/
-
-#include <unistd.h>
-#include <sys/time.h>
-#include "pmapi.h"
-
-/*----------------------------- Implementation ----------------------------*/
-
-/****************************************************************************
-REMARKS:
-Initialise the Zen Timer module internals.
-****************************************************************************/
-void __ZTimerInit(void)
-{
-}
-
-/****************************************************************************
-REMARKS:
-Use the gettimeofday() function to get microsecond precision (probably less
-though)
-****************************************************************************/
-static inline ulong __ULZReadTime(void)
-{
- struct timeval t;
- gettimeofday(&t, NULL);
- return t.tv_sec*1000000 + t.tv_usec;
-}
-
-/****************************************************************************
-REMARKS:
-Start the Zen Timer counting.
-****************************************************************************/
-#define __LZTimerOn(tm) tm->start.low = __ULZReadTime()
-
-/****************************************************************************
-REMARKS:
-Compute the lap time since the timer was started.
-****************************************************************************/
-#define __LZTimerLap(tm) (__ULZReadTime() - tm->start.low)
-
-/****************************************************************************
-REMARKS:
-Call the assembler Zen Timer functions to do the timing.
-****************************************************************************/
-#define __LZTimerOff(tm) tm->end.low = __ULZReadTime()
-
-/****************************************************************************
-REMARKS:
-Call the assembler Zen Timer functions to do the timing.
-****************************************************************************/
-#define __LZTimerCount(tm) (tm->end.low - tm->start.low)
-
-/****************************************************************************
-REMARKS:
-Define the resolution of the long period timer as microseconds per timer tick.
-****************************************************************************/
-#define ULZTIMER_RESOLUTION 1
-
-/****************************************************************************
-REMARKS:
-Compute the elapsed time from the BIOS timer tick. Note that we check to see
-whether a midnight boundary has passed, and if so adjust the finish time to
-account for this. We cannot detect if more that one midnight boundary has
-passed, so if this happens we will be generating erronous results.
-****************************************************************************/
-ulong __ULZElapsedTime(ulong start,ulong finish)
-{ return finish - start; }
diff --git a/board/MAI/bios_emulator/scitech/src/pm/makefile b/board/MAI/bios_emulator/scitech/src/pm/makefile
deleted file mode 100644
index 265f0e36d0..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/makefile
+++ /dev/null
@@ -1,290 +0,0 @@
-#############################################################################
-#
-# Copyright (C) 1996 SciTech Software.
-# All rights reserved.
-#
-# Descripton: Generic makefile for the PM library. Builds the library
-# file and all test programs.
-#
-#############################################################################
-
-.IMPORT .IGNORE : DEBUG_AGP_DRIVER TEST_HARNESS DEBUG_SDDPMI
-
-#----------------------------------------------------------------------------
-# Add DOS extender dependant flags to command line
-#----------------------------------------------------------------------------
-
-CFLAGS += $(DX_CFLAGS)
-ASFLAGS += $(DX_ASFLAGS)
-NO_PMLIB := 1
-
-#----------------------------------------------------------------------------
-# Include definitions specific for the target system
-#----------------------------------------------------------------------------
-
-.IF $(USE_VXD)
-
-# Building for Win32 VxD (minimal PM library implementation)
-
-LIBNAME = pm
-OBJECTS = pm$O vflat$O ztimer$O cpuinfo$O mtrr$O fileio$O pcilib$O \
- agp$O malloc$O vgastate$O gavxd$O _pm$O _mtrr$O _cpuinfo$O \
- _int64$O _pcihelp$O
-DEPEND_SRC := vxd;common;codepage;tests
-.SOURCE: vxd common codepage tests
-
-.ELIF $(USE_NTDRV)
-
-# Building for NT device drivers (minimal PM library implementation)
-
-LIBNAME = pm
-OBJECTS = pm$O vflat$O ztimer$O cpuinfo$O mtrr$O mem$O irq$O int86$O \
- stdio$O stdlib$O pcilib$O agp$O malloc$O vgastate$O gantdrv$O \
- _pm$O _mtrr$O _cpuinfo$O _int64$O _pcihelp$O _irq$O
-DEPEND_SRC := ntdrv;common;codepage;tests
-.SOURCE: ntdrv common codepage tests
-
-.ELIF $(USE_WIN32)
-
-# Building for Win32
-
-CFLAGS += -DUSE_OS_JOYSTICK
-LIBNAME = pm
-OBJECTS = pm$O vflat$O event$O ddraw$O ztimer$O cpuinfo$O pcilib$O \
- agp$O malloc$O vgastate$O gawin32$O ntservc$O _joy$O _cpuinfo$O \
- _int64$O _pcihelp$O
-DEPEND_SRC := win32;common;codepage;tests
-.SOURCE: win32 common codepage tests
-
-.ELIF $(USE_OS232)
-
-# Building for OS/2
-
-.IF $(USE_OS2GUI)
-LIBNAME = pm_pm
-.ELSE
-LIBNAME = pm
-.ENDIF
-OBJECTS = pm$O vflat$O event$O ztimer$O cpuinfo$O mtrr$O pcilib$O \
- agp$O malloc$O vgastate$O gaos2$O _pmos2$O _joy$O _cpuinfo$O \
- _int64$O _pcihelp$O dossctl$O
-DEPEND_SRC := os2;common;codepage;tests
-.SOURCE: os2 common codepage tests
-
-.ELIF $(USE_QNX)
-
-# Building for QNX
-
-USE_BIOS := 1
-.IF $(USE_PHOTON)
-LIBNAME = pm_ph
-.ELIF $(USE_X11)
-LIBNAME = pm_x11
-.ELSE
-LIBNAME = pm
-.ENDIF
-OBJECTS = pm$O vflat$O event$O ztimer$O cpuinfo$O mtrr$O pcilib$O \
- agp$O malloc$O mtrrqnx$O unixio$O vgastate$O gaqnx$O _joy$O \
- _mtrrqnx$O _cpuinfo$O _int64$O _pcihelp$O
-DEPEND_SRC := qnx;common;codepage;tests
-.SOURCE: qnx common codepage tests
-
-# Indicate that this program uses Nucleus device drivers (so needs I/O access)
-USE_NUCLEUS := 1
-
-.ELIF $(USE_LINUX)
-
-# Building for Linux
-
-CFLAGS += -DENABLE_MTRR -DUSE_OS_JOYSTICK
-.IF $(USE_X11)
-LIBNAME = pm_x11
-.ELSE
-LIBNAME = pm
-.ENDIF
-OBJECTS = pm$O vflat$O event$O ztimer$O cpuinfo$O pcilib$O \
- agp$O malloc$O unixio$O vgastate$O galinux$O _cpuinfo$O \
- _int64$O _pcihelp$O
-DEPEND_SRC := linux;common;codepage;tests;x11
-.SOURCE: linux common codepage tests x11
-
-# Building a shared library
-.IF $(SOFILE)
-LIB := ld
-LIBFLAGS := -r -o
-CFLAGS += -fPIC
-.ENDIF
-
-.ELIF $(USE_BEOS)
-
-# Building for BeOS GUI
-
-LIBNAME = pm
-OBJECTS = pm$O vflat$O event$O ztimer$O cpuinfo$O pcilib$O \
- agp$O malloc$O vgastate$O gabeos$O _joy$O _cpuinfo$O \
- _int64$O _pcihelp$O
-DEPEND_SRC := beos;common;codepage;tests
-.SOURCE: beos common codepage tests
-
-.ELIF $(USE_SMX32)
-
-# Building for SMX
-
-LIBNAME = pm
-OBJECTS = pm$O pmsmx$O vflat$O event$O ztimer$O cpuinfo$O mtrr$O pcilib$O \
- agp$O malloc$O vgastate$O gasmx$O _pm$O _pmsmx$O _mtrr$O _event$O \
- _joy$O _cpuinfo$O _int64$O _pcihelp$O _lztimer$O
-DEPEND_SRC := smx;common;codepage;tests
-.SOURCE: smx common codepage tests
-
-.ELIF $(USE_RTTARGET)
-
-# Building for RTTarget-32
-
-LIBNAME = pm
-OBJECTS = pm$O vflat$O event$O ztimer$O cpuinfo$O mtrr$O pcilib$O \
- agp$O malloc$O vgastate$O gartt$O _mtrr$O _joy$O _cpuinfo$O \
- _int64$O _pcihelp$O
-DEPEND_SRC := rttarget;common;codepage;tests
-.SOURCE: rttarget common codepage tests
-
-.ELSE
-
-# Building for MSDOS
-
-LIBNAME = pm
-OBJECTS = pm$O pmdos$O vflat$O event$O ztimer$O cpuinfo$O mtrr$O \
- agp$O malloc$O pcilib$O vgastate$O gados$O \
- _pm$O _pmdos$O _mtrr$O _vflat$O _event$O _joy$O _pcihelp$O \
- _cpuinfo$O _int64$O _lztimer$O _dma$O
-DEPEND_SRC := dos;common;codepage;tests
-.SOURCE: dos common codepage tests
-
-.ENDIF
-
-# Object modules for keyboard code pages
-
-OBJECTS += us_eng$O
-
-# Common object modules
-
-OBJECTS += common$O
-.IF $(CHECKED)
-OBJECTS += debug$O
-.ENDIF
-
-# Nucleus loader library object modules. Note that when compiling a test harness
-# library we need to exclude the Nucleus loader library.
-
-.IF $(TEST_HARNESS)
-CFLAGS += -DTEST_HARNESS -DPMLIB
-LIBNAME = pm_test
-.ELSE
-OBJECTS += galib$O _ga_imp$O
-.ENDIF
-
-.IF $(DEBUG_SDDPMI)
-CFLAGS += -DDEBUG_SDDPMI
-.ENDIF
-
-# AGP library object modules
-
-.IF $(DEBUG_AGP_DRIVER)
-CFLAGS += -DDEBUG_AGP_DRIVER
-OBJECTS += agplib$O
-.ELSE
-OBJECTS += agplib$O peloader$O libcimp$O _gatimer$O
-.ENDIF
-
-#----------------------------------------------------------------------------
-# Name of library and generic object files required to build it
-#----------------------------------------------------------------------------
-
-.IF $(STKCALL)
-LIBFILE = s$(LP)$(LIBNAME)$L
-.ELSE
-LIBFILE = $(LP)$(LIBNAME)$L
-.ENDIF
-LIBCLEAN = *.lib *.a
-
-#----------------------------------------------------------------------------
-# Change destination for library file depending the extender being used. This
-# is only necessary for DOS extender since the file go into a subdirectory
-# in the normal library directory, one for each supported extender. Other
-# OS'es put the file into the regular library directory, since there is
-# only one per OS in this case.
-#----------------------------------------------------------------------------
-
-MK_PMODE = 1
-
-.IF $(TEST_HARNESS)
-LIB_DEST := $(LIB_BASE)
-.ELIF $(USE_TNT)
-LIB_DEST := $(LIB_BASE)\tnt
-.ELIF $(USE_DOS4GW)
-LIB_DEST := $(LIB_BASE)\dos4gw
-.ELIF $(USE_X32)
-LIB_DEST := $(LIB_BASE)\x32
-.ELIF $(USE_DPMI16)
-LIB_DEST := $(LIB_BASE)\dpmi16
-.ELIF $(USE_DPMI32)
-LIB_DEST := $(LIB_BASE)\dpmi32
-.ELIF $(USE_DOSX)
-LIB_DEST := $(LIB_BASE)\dosx
-.END
-
-#----------------------------------------------------------------------------
-# Names of all executable files built
-#----------------------------------------------------------------------------
-
-.IF $(USE_REALDOS)
-EXEFILES = memtest$E biosptr$E video$E isvesa$E callreal$E \
- mouse$E tick$E key$E key15$E brk$E altbrk$E \
- critical$E altcrit$E vftest$E rtc$E getch$E \
- cpu$E timerc$E timercpp$E showpci$E uswc$E block$E
-.ELSE
-EXEFILES = memtest$E video$E isvesa$E callreal$E vftest$E getch$E \
- cpu$E timerc$E timercpp$E showpci$E uswc$E block$E \
- save$E restore$E
-.ENDIF
-
-all: $(EXEFILES)
-
-$(EXEFILES): $(LIBFILE)
-
-memtest$E: memtest$O
-biosptr$E: biosptr$O
-video$E: video$O
-isvesa$E: isvesa$O
-mouse$E: mouse$O
-tick$E: tick$O
-key$E: key$O
-key15$E: key15$O
-brk$E: brk$O
-altbrk$E: altbrk$O
-critical$E: critical$O
-altcrit$E: altcrit$O
-callreal$E: callreal$O
-vftest$E: vftest$O
-rtc$E: rtc$O
-getch$E: getch$O
-cpu$E: cpu$O
-timerc$E: timerc$O
-timercpp$E: timercpp$O
-showpci$E: showpci$O
-uswc$E: uswc$O
-block$E: block$O
-save$E: save$O
-restore$E: restore$O
-test$E: test$O _test$O
-
-#----------------------------------------------------------------------------
-# Define the list of object files to create dependency information for
-#----------------------------------------------------------------------------
-
-DEPEND_OBJ := $(OBJECTS) memtest$O biosptr$O video$O isvesa$O mouse$O \
- tick$O key$O key$O brk$O altbrk$O critical$O altcrit$O \
- callreal$O vftest$O getch$O timercpp$O
-
-.INCLUDE: "$(SCITECH)/makedefs/common.mk"
-
diff --git a/board/MAI/bios_emulator/scitech/src/pm/ntdrv/_irq.asm b/board/MAI/bios_emulator/scitech/src/pm/ntdrv/_irq.asm
deleted file mode 100644
index 11824a0afc..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/ntdrv/_irq.asm
+++ /dev/null
@@ -1,288 +0,0 @@
-;****************************************************************************
-;*
-;* SciTech OS Portability Manager Library
-;*
-;* ========================================================================
-;*
-;* The contents of this file are subject to the SciTech MGL Public
-;* License Version 1.0 (the "License"); you may not use this file
-;* except in compliance with the License. You may obtain a copy of
-;* the License at http://www.scitechsoft.com/mgl-license.txt
-;*
-;* Software distributed under the License is distributed on an
-;* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-;* implied. See the License for the specific language governing
-;* rights and limitations under the License.
-;*
-;* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-;*
-;* The Initial Developer of the Original Code is SciTech Software, Inc.
-;* All Rights Reserved.
-;*
-;* ========================================================================
-;*
-;* Language: 80386 Assembler, TASM 4.0 or NASM
-;* Environment: 32-bit Windows NT device driver
-;*
-;* Description: Low level assembly support for the PM library specific to
-;* Windows NT device drivers.
-;*
-;****************************************************************************
-
- IDEAL
-
-include "scitech.mac" ; Memory model macros
-
-header _irq ; Set up memory model
-
-begdataseg _irq
-
- cextern _PM_rtcHandler,CPTR
- cextern _PM_prevRTC,FCPTR
-
-RtcInside dw 0 ; Are we still handling current interrupt
-sidtBuf df 0 ; Buffer for sidt instruction
-
-enddataseg _irq
-
-begcodeseg _irq ; Start of code segment
-
-cpublic _PM_irqCodeStart
-
-; Macro to delay briefly to ensure that enough time has elapsed between
-; successive I/O accesses so that the device being accessed can respond
-; to both accesses even on a very fast PC.
-
-ifdef USE_NASM
-%macro DELAY 0
- jmp short $+2
- jmp short $+2
- jmp short $+2
-%endmacro
-%macro IODELAYN 1
-%rep %1
- DELAY
-%endrep
-%endmacro
-else
-macro DELAY
- jmp short $+2
- jmp short $+2
- jmp short $+2
-endm
-macro IODELAYN N
- rept N
- DELAY
- endm
-endm
-endif
-
-;----------------------------------------------------------------------------
-; PM_rtcISR - Real time clock interrupt subroutine dispatcher
-;----------------------------------------------------------------------------
-; Hardware interrupt handler for the timer interrupt, to dispatch control
-; to high level C based subroutines. We save the state of all registers
-; in this routine, and switch to a local stack. Interrupts are *off*
-; when we call the user code.
-;
-; NOTE: This routine switches to a local stack before calling any C code,
-; and hence is _not_ re-entrant. Make sure your C code executes as
-; quickly as possible, since a timer overrun will simply hang the
-; system.
-;----------------------------------------------------------------------------
-cprocfar _PM_rtcISR
-
-;++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
-; If we enable interrupts and call into any C based interrupt handling code,
-; we need to setup a bunch of important information for the NT kernel. The
-; code below takes care of this housekeeping for us (see Undocumented NT for
-; details). If we don't do this housekeeping and interrupts are enabled,
-; the kernel will become very unstable and crash within 10 seconds or so.
-;++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
-
- pushad
- pushfd
- push fs
-
- mov ebx,00000030h
- mov fs,bx
- sub esp,50h
- mov ebp,esp
-
-; Setup the exception frame to NULL
-
- mov ebx,[DWORD cs:0FFDFF000h]
- mov [DWORD ds:0FFDFF000h], 0FFFFFFFFh
- mov [DWORD ebp],ebx
-
-; Save away the existing KSS ebp
-
- mov esi,[DWORD cs:0FFDFF124h]
- mov ebx,[DWORD esi+00000128h]
- mov [DWORD ebp+4h],ebx
- mov [DWORD esi+00000128h],ebp
-
-; Save away the kernel time and the thread mode (kernel/user)
-
- mov edi,[DWORD esi+00000137h]
- mov [DWORD ebp+8h],edi
-
-; Set the thread mode (kernel/user) based on the code selector
-
- mov ebx,[DWORD ebp+7Ch]
- and ebx,01
- mov [BYTE esi+00000137h],bl
-
-;++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
-; End of special interrupt Prolog code
-;++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
-
-; Clear priority interrupt controller and re-enable interrupts so we
-; dont lock things up for long.
-
- mov al,20h
- out 0A0h,al
- out 020h,al
-
-; Clear real-time clock timeout
-
- in al,70h ; Read CMOS index register
- push eax ; and save for later
- IODELAYN 3
- mov al,0Ch
- out 70h,al
- IODELAYN 5
- in al,71h
-
-; Call the C interrupt handler function
-
- cmp [BYTE RtcInside],1 ; Check for mutual exclusion
- je @@Exit
- mov [BYTE RtcInside],1
- sti ; Enable interrupts
- cld ; Clear direction flag for C code
- call [CPTR _PM_rtcHandler]
- cli ; Disable interrupts on exit!
- mov [BYTE RtcInside],0
-
-@@Exit: pop eax
- out 70h,al ; Restore CMOS index register
-
-;++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
-; Start of special epilog code to restore stuff on exit from handler
-;++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
-
-; Restore the KSS ebp
-
- mov esi,[DWORD cs:0FFDFF124h]
- mov ebx,[DWORD ebp+4]
- mov [DWORD esi+00000128h],ebx
-
-; Restore the exception frame
-
- mov ebx,[DWORD ebp]
- mov [DWORD fs:00000000],ebx
-
-; Restore the thread mode
-
- mov ebx,[DWORD ebp+8h]
- mov esi,[DWORD fs:00000124h]
- mov [BYTE esi+00000137h],bl
- add esp, 50h
- pop fs
- popfd
- popad
-
-; Return from interrupt
-
- iret
-
-cprocend
-
-cpublic _PM_irqCodeEnd
-
-;----------------------------------------------------------------------------
-; void _PM_getISR(int irq,PMFARPTR *handler);
-;----------------------------------------------------------------------------
-; Function to return the specific IRQ handler direct from the IDT.
-;----------------------------------------------------------------------------
-cprocstart _PM_getISR
-
- ARG idtEntry:UINT, handler:DPTR
-
- enter_c 0
- mov ecx,[handler] ; Get address of handler to fill in
- sidt [sidtBuf] ; Get IDTR register into sidtBuf
- mov eax,[DWORD sidtBuf+2] ; Get address of IDT into EAX
- mov ebx,[idtEntry]
- lea eax,[eax+ebx*8] ; Get entry in the IDT
- movzx edx,[WORD eax+6] ; Get high order 16-bits
- shl edx,16 ; Move into top 16-bits of address
- mov dx,[WORD eax] ; Get low order 16-bits
- mov [DWORD ecx],edx ; Store linear address of handler
- mov dx,[WORD eax+2] ; Get selector value
- mov [WORD ecx+4],dx ; Store selector value
- leave_c
- ret
-
-cprocend _PM_getISR
-
-;----------------------------------------------------------------------------
-; void _PM_setISR(int irq,void *handler);
-;----------------------------------------------------------------------------
-; Function to set the specific IRQ handler direct in the IDT.
-;----------------------------------------------------------------------------
-cprocstart _PM_setISR
-
- ARG irq:UINT, handler:CPTR
-
- enter_c 0
- mov ecx,[handler] ; Get address of new handler
- mov dx,cs ; Get selector for new handler
- sidt [sidtBuf] ; Get IDTR register into sidtBuf
- mov eax,[DWORD sidtBuf+2] ; Get address of IDT into EAX
- mov ebx,[idtEntry]
- lea eax,[eax+ebx*8] ; Get entry in the IDT
- cli
- mov [WORD eax+2],dx ; Store code segment selector
- mov [WORD eax],cx ; Store low order bits of handler
- shr ecx,16
- mov [WORD eax+6],cx ; Store high order bits of handler
- sti
- leave_c
- ret
-
-cprocend _PM_setISR
-
-;----------------------------------------------------------------------------
-; void _PM_restoreISR(int irq,PMFARPTR *handler);
-;----------------------------------------------------------------------------
-; Function to set the specific IRQ handler direct in the IDT.
-;----------------------------------------------------------------------------
-cprocstart _PM_restoreISR
-
- ARG irq:UINT, handler:CPTR
-
- enter_c 0
- mov ecx,[handler]
- mov dx,[WORD ecx+4] ; Get selector for old handler
- mov ecx,[DWORD ecx] ; Get address of old handler
- sidt [sidtBuf] ; Get IDTR register into sidtBuf
- mov eax,[DWORD sidtBuf+2] ; Get address of IDT into EAX
- mov ebx,[idtEntry]
- lea eax,[eax+ebx*8] ; Get entry in the IDT
- cli
- mov [WORD eax+2],dx ; Store code segment selector
- mov [WORD eax],cx ; Store low order bits of handler
- shr ecx,16
- mov [WORD eax+6],cx ; Store high order bits of handler
- sti
- leave_c
- ret
-
-cprocend _PM_restoreISR
-
-endcodeseg _irq
-
- END ; End of module
-
diff --git a/board/MAI/bios_emulator/scitech/src/pm/ntdrv/_pm.asm b/board/MAI/bios_emulator/scitech/src/pm/ntdrv/_pm.asm
deleted file mode 100644
index 6cb276d25e..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/ntdrv/_pm.asm
+++ /dev/null
@@ -1,281 +0,0 @@
-;****************************************************************************
-;*
-;* SciTech OS Portability Manager Library
-;*
-;* ========================================================================
-;*
-;* The contents of this file are subject to the SciTech MGL Public
-;* License Version 1.0 (the "License"); you may not use this file
-;* except in compliance with the License. You may obtain a copy of
-;* the License at http://www.scitechsoft.com/mgl-license.txt
-;*
-;* Software distributed under the License is distributed on an
-;* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-;* implied. See the License for the specific language governing
-;* rights and limitations under the License.
-;*
-;* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-;*
-;* The Initial Developer of the Original Code is SciTech Software, Inc.
-;* All Rights Reserved.
-;*
-;* ========================================================================
-;*
-;* Language: 80386 Assembler, TASM 4.0 or NASM
-;* Environment: 32-bit Windows NT device driver
-;*
-;* Description: Low level assembly support for the PM library specific to
-;* Windows NT device drivers.
-;*
-;****************************************************************************
-
- IDEAL
-
-include "scitech.mac" ; Memory model macros
-
-header _pm ; Set up memory model
-
-P586
-
-begdataseg
-
-; Watcom C++ externals required to link when compiling floating point
-; C code. They are not actually used in the code because we compile with
-; inline floating point instructions, however the compiler still generates
-; the references in the object modules.
-
-__8087 dd 0
- PUBLIC __8087
-__imthread:
-__fltused:
-_fltused_ dd 0
- PUBLIC __imthread
- PUBLIC _fltused_
- PUBLIC __fltused
-
-enddataseg
-
-begcodeseg _pm ; Start of code segment
-
-;----------------------------------------------------------------------------
-; void PM_segread(PMSREGS *sregs)
-;----------------------------------------------------------------------------
-; Read the current value of all segment registers
-;----------------------------------------------------------------------------
-cprocstart PM_segread
-
- ARG sregs:DPTR
-
- enter_c
-
- mov ax,es
- _les _si,[sregs]
- mov [_ES _si],ax
- mov [_ES _si+2],cs
- mov [_ES _si+4],ss
- mov [_ES _si+6],ds
- mov [_ES _si+8],fs
- mov [_ES _si+10],gs
-
- leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; int PM_int386x(int intno, PMREGS *in, PMREGS *out,PMSREGS *sregs)
-;----------------------------------------------------------------------------
-; Issues a software interrupt in protected mode. This routine has been
-; written to allow user programs to load CS and DS with different values
-; other than the default.
-;----------------------------------------------------------------------------
-cprocstart PM_int386x
-
-; Not used for NT device drivers
-
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void PM_setBankA(int bank)
-;----------------------------------------------------------------------------
-cprocstart PM_setBankA
-
-; Not used for NT device drivers
-
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void PM_setBankAB(int bank)
-;----------------------------------------------------------------------------
-cprocstart PM_setBankAB
-
-; Not used for NT device drivers
-
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void PM_setCRTStart(int x,int y,int waitVRT)
-;----------------------------------------------------------------------------
-cprocstart PM_setCRTStart
-
-; Not used for NT device drivers
-
- ret
-
-cprocend
-
-; Macro to delay briefly to ensure that enough time has elapsed between
-; successive I/O accesses so that the device being accessed can respond
-; to both accesses even on a very fast PC.
-
-ifdef USE_NASM
-%macro DELAY 0
- jmp short $+2
- jmp short $+2
- jmp short $+2
-%endmacro
-%macro IODELAYN 1
-%rep %1
- DELAY
-%endrep
-%endmacro
-else
-macro DELAY
- jmp short $+2
- jmp short $+2
- jmp short $+2
-endm
-macro IODELAYN N
- rept N
- DELAY
- endm
-endm
-endif
-
-;----------------------------------------------------------------------------
-; uchar _PM_readCMOS(int index)
-;----------------------------------------------------------------------------
-; Read the value of a specific CMOS register. We do this with both
-; normal interrupts and NMI disabled.
-;----------------------------------------------------------------------------
-cprocstart _PM_readCMOS
-
- ARG index:UINT
-
- push _bp
- mov _bp,_sp
- pushfd
- mov al,[BYTE index]
- or al,80h ; Add disable NMI flag
- cli
- out 70h,al
- IODELAYN 5
- in al,71h
- mov ah,al
- xor al,al
- IODELAYN 5
- out 70h,al ; Re-enable NMI
- mov al,ah ; Return value in AL
- popfd
- pop _bp
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void _PM_writeCMOS(int index,uchar value)
-;----------------------------------------------------------------------------
-; Read the value of a specific CMOS register. We do this with both
-; normal interrupts and NMI disabled.
-;----------------------------------------------------------------------------
-cprocstart _PM_writeCMOS
-
- ARG index:UINT, value:UCHAR
-
- push _bp
- mov _bp,_sp
- pushfd
- mov al,[BYTE index]
- or al,80h ; Add disable NMI flag
- cli
- out 70h,al
- IODELAYN 5
- mov al,[value]
- out 71h,al
- xor al,al
- IODELAYN 5
- out 70h,al ; Re-enable NMI
- popfd
- pop _bp
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; double _ftol(double f)
-;----------------------------------------------------------------------------
-; Calls to __ftol are generated by the Borland C++ compiler for code
-; that needs to convert a floating point type to an integral type.
-;
-; Input: floating point number on the top of the '87.
-;
-; Output: a (signed or unsigned) long in EAX
-; All other registers preserved.
-;-----------------------------------------------------------------------
-cprocstart _ftol
-
- LOCAL temp1:WORD, temp2:QWORD = LocalSize
-
- push ebp
- mov ebp,esp
- sub esp,LocalSize
-
- fstcw [temp1] ; save the control word
- fwait
- mov al,[BYTE temp1+1]
- or [BYTE temp1+1],0Ch ; set rounding control to chop
- fldcw [temp1]
- fistp [temp2] ; convert to 64-bit integer
- mov [BYTE temp1+1],al
- fldcw [temp1] ; restore the control word
- mov eax,[DWORD temp2] ; return LS 32 bits
- mov edx,[DWORD temp2+4] ; MS 32 bits
-
- mov esp,ebp
- pop ebp
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; _PM_getPDB - Return the Page Table Directory Base address
-;----------------------------------------------------------------------------
-cprocstart _PM_getPDB
-
- mov eax,cr3
- and eax,0FFFFF000h
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; Flush the Translation Lookaside buffer
-;----------------------------------------------------------------------------
-cprocstart PM_flushTLB
-
- wbinvd ; Flush the CPU cache
- mov eax,cr3
- mov cr3,eax ; Flush the TLB
- ret
-
-cprocend
-
-endcodeseg _pm
-
- END ; End of module
diff --git a/board/MAI/bios_emulator/scitech/src/pm/ntdrv/cpuinfo.c b/board/MAI/bios_emulator/scitech/src/pm/ntdrv/cpuinfo.c
deleted file mode 100644
index d15b07c290..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/ntdrv/cpuinfo.c
+++ /dev/null
@@ -1,64 +0,0 @@
-/****************************************************************************
-*
-* Ultra Long Period Timer
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: 32-bit Windows VxD
-*
-* Description: VxD specific code for the CPU detection module.
-*
-****************************************************************************/
-
-/*----------------------------- Implementation ----------------------------*/
-
-/****************************************************************************
-REMARKS:
-Do nothing for VxD's
-****************************************************************************/
-#define SetMaxThreadPriority() 0
-
-/****************************************************************************
-REMARKS:
-Do nothing for VxD's
-****************************************************************************/
-#define RestoreThreadPriority(i) (void)(i)
-
-/****************************************************************************
-REMARKS:
-Initialise the counter and return the frequency of the counter.
-****************************************************************************/
-static void GetCounterFrequency(
- CPU_largeInteger *freq)
-{
- KeQueryPerformanceCounter((LARGE_INTEGER*)freq);
-}
-
-/****************************************************************************
-REMARKS:
-Read the counter and return the counter value.
-****************************************************************************/
-#define GetCounter(t) \
-{ \
- LARGE_INTEGER lt = KeQueryPerformanceCounter(NULL); \
- (t)->low = lt.LowPart; \
- (t)->high = lt.HighPart; \
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/ntdrv/int86.c b/board/MAI/bios_emulator/scitech/src/pm/ntdrv/int86.c
deleted file mode 100644
index c82648b787..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/ntdrv/int86.c
+++ /dev/null
@@ -1,251 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: 32-bit Windows NT device drivers.
-*
-* Description: Implementation for the real mode software interrupt
-* handling functions.
-*
-****************************************************************************/
-
-#include "pmapi.h"
-#include "drvlib/os/os.h"
-#include "sdd/sddhelp.h"
-#include "mtrr.h"
-#include "oshdr.h"
-
-/*----------------------------- Implementation ----------------------------*/
-
-/****************************************************************************
-REMARKS:
-We do have limited BIOS access under Windows NT device drivers.
-****************************************************************************/
-ibool PMAPI PM_haveBIOSAccess(void)
-{
- /* Return false unless we have full buffer passing! */
- return false;
-}
-
-/****************************************************************************
-PARAMETERS:
-len - Place to store the length of the buffer
-rseg - Place to store the real mode segment of the buffer
-roff - Place to store the real mode offset of the buffer
-
-REMARKS:
-This function returns the address and length of the global VESA transfer
-buffer that is used for communicating with the VESA BIOS functions from
-Win16 and Win32 programs under Windows.
-****************************************************************************/
-void * PMAPI PM_getVESABuf(
- uint *len,
- uint *rseg,
- uint *roff)
-{
- /* No buffers supported under Windows NT (Windows XP has them however if */
- /* we ever decide to support this!) */
- return NULL;
-}
-
-/****************************************************************************
-REMARKS:
-Issue a protected mode software interrupt.
-****************************************************************************/
-int PMAPI PM_int386(
- int intno,
- PMREGS *in,
- PMREGS *out)
-{
- PMSREGS sregs;
- PM_segread(&sregs);
- return PM_int386x(intno,in,out,&sregs);
-}
-
-/****************************************************************************
-REMARKS:
-Map a real mode pointer to a protected mode pointer.
-****************************************************************************/
-void * PMAPI PM_mapRealPointer(
- uint r_seg,
- uint r_off)
-{
- /* Not used for Windows NT drivers! */
- return NULL;
-}
-
-/****************************************************************************
-REMARKS:
-Allocate a block of real mode memory
-****************************************************************************/
-void * PMAPI PM_allocRealSeg(
- uint size,
- uint *r_seg,
- uint *r_off)
-{
- /* Not supported in NT drivers */
- (void)size;
- (void)r_seg;
- (void)r_off;
- return NULL;
-}
-
-/****************************************************************************
-REMARKS:
-Free a block of real mode memory.
-****************************************************************************/
-void PMAPI PM_freeRealSeg(
- void *mem)
-{
- /* Not supported in NT drivers */
- (void)mem;
-}
-
-/****************************************************************************
-REMARKS:
-Issue a real mode interrupt (parameters in DPMI compatible structure)
-****************************************************************************/
-void PMAPI DPMI_int86(
- int intno,
- DPMI_regs *regs)
-{
- /* Not used in NT drivers */
-}
-
-/****************************************************************************
-REMARKS:
-Call a V86 real mode function with the specified register values
-loaded before the call. The call returns with a far ret.
-****************************************************************************/
-void PMAPI PM_callRealMode(
- uint seg,
- uint off,
- RMREGS *regs,
- RMSREGS *sregs)
-{
- /* TODO!! */
-#if 0
- CLIENT_STRUCT saveRegs;
-
- /* Bail if we do not have BIOS access (ie: the VxD was dynamically
- * loaded, and not statically loaded.
- */
- if (!_PM_haveBIOS)
- return;
-
- TRACE("SDDHELP: Entering PM_callRealMode()\n");
- Begin_Nest_V86_Exec();
- LoadV86Registers(&saveRegs,regs,sregs);
- Simulate_Far_Call(seg, off);
- Resume_Exec();
- ReadV86Registers(&saveRegs,regs,sregs);
- End_Nest_Exec();
- TRACE("SDDHELP: Exiting PM_callRealMode()\n");
-#endif
-}
-
-/****************************************************************************
-REMARKS:
-Issue a V86 real mode interrupt with the specified register values
-loaded before the interrupt.
-****************************************************************************/
-int PMAPI PM_int86(
- int intno,
- RMREGS *in,
- RMREGS *out)
-{
- /* TODO!! */
-#if 0
- RMSREGS sregs = {0};
- CLIENT_STRUCT saveRegs;
- ushort oldDisable;
-
- /* Disable pass-up to our VxD handler so we directly call BIOS */
- TRACE("SDDHELP: Entering PM_int86()\n");
- if (disableTSRFlag) {
- oldDisable = *disableTSRFlag;
- *disableTSRFlag = 0;
- }
- Begin_Nest_V86_Exec();
- LoadV86Registers(&saveRegs,in,&sregs);
- Exec_Int(intno);
- ReadV86Registers(&saveRegs,out,&sregs);
- End_Nest_Exec();
-
- /* Re-enable pass-up to our VxD handler if previously enabled */
- if (disableTSRFlag)
- *disableTSRFlag = oldDisable;
-
- TRACE("SDDHELP: Exiting PM_int86()\n");
-#else
- *out = *in;
-#endif
- return out->x.ax;
-}
-
-/****************************************************************************
-REMARKS:
-Issue a V86 real mode interrupt with the specified register values
-loaded before the interrupt.
-****************************************************************************/
-int PMAPI PM_int86x(
- int intno,
- RMREGS *in,
- RMREGS *out,
- RMSREGS *sregs)
-{
- /* TODO!! */
-#if 0
- CLIENT_STRUCT saveRegs;
- ushort oldDisable;
-
- /* Bail if we do not have BIOS access (ie: the VxD was dynamically
- * loaded, and not statically loaded.
- */
- if (!_PM_haveBIOS) {
- *out = *in;
- return out->x.ax;
- }
-
- /* Disable pass-up to our VxD handler so we directly call BIOS */
- TRACE("SDDHELP: Entering PM_int86x()\n");
- if (disableTSRFlag) {
- oldDisable = *disableTSRFlag;
- *disableTSRFlag = 0;
- }
- Begin_Nest_V86_Exec();
- LoadV86Registers(&saveRegs,in,sregs);
- Exec_Int(intno);
- ReadV86Registers(&saveRegs,out,sregs);
- End_Nest_Exec();
-
- /* Re-enable pass-up to our VxD handler if previously enabled */
- if (disableTSRFlag)
- *disableTSRFlag = oldDisable;
-
- TRACE("SDDHELP: Exiting PM_int86x()\n");
-#else
- *out = *in;
-#endif
- return out->x.ax;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/ntdrv/irq.c b/board/MAI/bios_emulator/scitech/src/pm/ntdrv/irq.c
deleted file mode 100644
index 9cd52047b7..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/ntdrv/irq.c
+++ /dev/null
@@ -1,142 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: 32-bit Windows NT device drivers.
-*
-* Description: Implementation for the NT driver IRQ management functions
-* for the PM library.
-*
-****************************************************************************/
-
-#include "pmapi.h"
-#include "pmint.h"
-#include "drvlib/os/os.h"
-#include "sdd/sddhelp.h"
-#include "mtrr.h"
-#include "oshdr.h"
-
-/*--------------------------- Global variables ----------------------------*/
-
-static int globalDataStart;
-static uchar _PM_oldCMOSRegA;
-static uchar _PM_oldCMOSRegB;
-static uchar _PM_oldRTCPIC2;
-static ulong RTC_idtEntry;
-PM_intHandler _PM_rtcHandler = NULL;
-PMFARPTR _VARAPI _PM_prevRTC = PMNULL;
-
-/*----------------------------- Implementation ----------------------------*/
-
-/* Functions to read and write CMOS registers */
-
-uchar _ASMAPI _PM_readCMOS(int index);
-void _ASMAPI _PM_writeCMOS(int index,uchar value);
-void _ASMAPI _PM_rtcISR(void);
-void _ASMAPI _PM_getISR(int irq,PMFARPTR *handler);
-void _ASMAPI _PM_setISR(int irq,void *handler);
-void _ASMAPI _PM_restoreISR(int irq,PMFARPTR *handler);
-void _ASMAPI _PM_irqCodeStart(void);
-void _ASMAPI _PM_irqCodeEnd(void);
-
-/****************************************************************************
-REMARKS:
-Set the real time clock frequency (for stereo modes).
-****************************************************************************/
-void PMAPI PM_setRealTimeClockFrequency(
- int frequency)
-{
- static short convert[] = {
- 8192,
- 4096,
- 2048,
- 1024,
- 512,
- 256,
- 128,
- 64,
- 32,
- 16,
- 8,
- 4,
- 2,
- -1,
- };
- int i;
-
- /* First clear any pending RTC timeout if not cleared */
- _PM_readCMOS(0x0C);
- if (frequency == 0) {
- /* Disable RTC timout */
- _PM_writeCMOS(0x0A,(uchar)_PM_oldCMOSRegA);
- _PM_writeCMOS(0x0B,(uchar)(_PM_oldCMOSRegB & 0x0F));
- }
- else {
- /* Convert frequency value to RTC clock indexes */
- for (i = 0; convert[i] != -1; i++) {
- if (convert[i] == frequency)
- break;
- }
-
- /* Set RTC timout value and enable timeout */
- _PM_writeCMOS(0x0A,(uchar)(0x20 | (i+3)));
- _PM_writeCMOS(0x0B,(uchar)((_PM_oldCMOSRegB & 0x0F) | 0x40));
- }
-}
-
-ibool PMAPI PM_setRealTimeClockHandler(PM_intHandler th,int frequency)
-{
- static ibool locked = false;
-
- /* Save the old CMOS real time clock values */
- _PM_oldCMOSRegA = _PM_readCMOS(0x0A);
- _PM_oldCMOSRegB = _PM_readCMOS(0x0B);
-
- /* Install the interrupt handler */
- RTC_idtEntry = 0x38;
- _PM_getISR(RTC_idtEntry, &_PM_prevRTC);
- _PM_rtcHandler = th;
- _PM_setISR(RTC_idtEntry, _PM_rtcISR);
-
- /* Program the real time clock default frequency */
- PM_setRealTimeClockFrequency(frequency);
-
- /* Unmask IRQ8 in the PIC2 */
- _PM_oldRTCPIC2 = PM_inpb(0xA1);
- PM_outpb(0xA1,(uchar)(_PM_oldRTCPIC2 & 0xFE));
- return true;
-}
-
-void PMAPI PM_restoreRealTimeClockHandler(void)
-{
- if (_PM_rtcHandler) {
- /* Restore CMOS registers and mask RTC clock */
- _PM_writeCMOS(0x0A,_PM_oldCMOSRegA);
- _PM_writeCMOS(0x0B,_PM_oldCMOSRegB);
- PM_outpb(0xA1,(uchar)((PM_inpb(0xA1) & 0xFE) | (_PM_oldRTCPIC2 & ~0xFE)));
-
- /* Restore the interrupt vector */
- _PM_restoreISR(RTC_idtEntry, &_PM_prevRTC);
- _PM_rtcHandler = NULL;
- }
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/ntdrv/mem.c b/board/MAI/bios_emulator/scitech/src/pm/ntdrv/mem.c
deleted file mode 100644
index 3128c6ae38..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/ntdrv/mem.c
+++ /dev/null
@@ -1,518 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: 32-bit Windows NT device drivers.
-*
-* Description: Implementation for the NT driver memory management functions
-* for the PM library.
-*
-****************************************************************************/
-
-#include "pmapi.h"
-#include "drvlib/os/os.h"
-#include "sdd/sddhelp.h"
-#include "mtrr.h"
-#include "oshdr.h"
-
-/*--------------------------- Global variables ----------------------------*/
-
-#define MAX_MEMORY_SHARED 100
-#define MAX_MEMORY_MAPPINGS 100
-#define MAX_MEMORY_LOCKED 100
-
-typedef struct {
- void *linear;
- ulong length;
- PMDL pMdl;
- } memshared;
-
-typedef struct {
- void *linear;
- void *mmIoMapped;
- ulong length;
- PMDL pMdl;
- } memlocked;
-
-typedef struct {
- ulong physical;
- ulong linear;
- ulong length;
- ibool isCached;
- } mmapping;
-
-static int numMappings = 0;
-static memshared shared[MAX_MEMORY_MAPPINGS] = {0};
-static mmapping maps[MAX_MEMORY_MAPPINGS];
-static memlocked locked[MAX_MEMORY_LOCKED];
-
-/*----------------------------- Implementation ----------------------------*/
-
-ulong PMAPI _PM_getPDB(void);
-
-/* Page table entry flags */
-
-#define PAGE_FLAGS_PRESENT 0x00000001
-#define PAGE_FLAGS_WRITEABLE 0x00000002
-#define PAGE_FLAGS_USER 0x00000004
-#define PAGE_FLAGS_WRITE_THROUGH 0x00000008
-#define PAGE_FLAGS_CACHE_DISABLE 0x00000010
-#define PAGE_FLAGS_ACCESSED 0x00000020
-#define PAGE_FLAGS_DIRTY 0x00000040
-#define PAGE_FLAGS_4MB 0x00000080
-
-/****************************************************************************
-PARAMETERS:
-base - Physical base address of the memory to maps in
-limit - Limit of physical memory to region to maps in
-
-RETURNS:
-Linear address of the newly mapped memory.
-
-REMARKS:
-Maps a physical memory range to a linear memory range.
-****************************************************************************/
-static ulong _PM_mapPhysicalToLinear(
- ulong base,
- ulong limit,
- ibool isCached)
-{
- ulong length = limit+1;
- PHYSICAL_ADDRESS paIoBase = {0};
-
- /* NT loves large Ints */
- paIoBase = RtlConvertUlongToLargeInteger( base );
-
- /* Map IO space into Kernel */
- if (isCached)
- return (ULONG)MmMapIoSpace(paIoBase, length, MmCached );
- else
- return (ULONG)MmMapIoSpace(paIoBase, length, MmNonCached );
-}
-
-/****************************************************************************
-REMARKS:
-Adjust the page table caching bits directly. Requires ring 0 access and
-only works with DOS4GW and compatible extenders (CauseWay also works since
-it has direct support for the ring 0 instructions we need from ring 3). Will
-not work in a DOS box, but we call into the ring 0 helper VxD so we should
-never get here in a DOS box anyway (assuming the VxD is present). If we
-do get here and we are in windows, this code will be skipped.
-****************************************************************************/
-static void _PM_adjustPageTables(
- ulong linear,
- ulong limit,
- ibool isGlobal,
- ibool isCached)
-{
- int startPDB,endPDB,iPDB,startPage,endPage,start,end,iPage;
- ulong pageTable,*pPDB,*pPageTable;
- ulong mask = 0xFFFFFFFF;
- ulong bits = 0x00000000;
-
- /* Enable user level access for page table entry */
- if (isGlobal) {
- mask &= ~PAGE_FLAGS_USER;
- bits |= PAGE_FLAGS_USER;
- }
-
- /* Disable PCD bit if page table entry should be uncached */
- if (!isCached) {
- mask &= ~(PAGE_FLAGS_CACHE_DISABLE | PAGE_FLAGS_WRITE_THROUGH);
- bits |= (PAGE_FLAGS_CACHE_DISABLE | PAGE_FLAGS_WRITE_THROUGH);
- }
-
- pPDB = (ulong*)_PM_mapPhysicalToLinear(_PM_getPDB(),0xFFF,true);
- if (pPDB) {
- startPDB = (linear >> 22) & 0x3FF;
- startPage = (linear >> 12) & 0x3FF;
- endPDB = ((linear+limit) >> 22) & 0x3FF;
- endPage = ((linear+limit) >> 12) & 0x3FF;
- for (iPDB = startPDB; iPDB <= endPDB; iPDB++) {
- /* Set the bits in the page directory entry - required as per */
- /* Pentium 4 manual. This also takes care of the 4MB page entries */
- pPDB[iPDB] = (pPDB[iPDB] & mask) | bits;
- if (!(pPDB[iPDB] & PAGE_FLAGS_4MB)) {
- /* If we are dealing with 4KB pages then we need to iterate */
- /* through each of the page table entries */
- pageTable = pPDB[iPDB] & ~0xFFF;
- pPageTable = (ulong*)_PM_mapPhysicalToLinear(pageTable,0xFFF,true);
- start = (iPDB == startPDB) ? startPage : 0;
- end = (iPDB == endPDB) ? endPage : 0x3FF;
- for (iPage = start; iPage <= end; iPage++) {
- pPageTable[iPage] = (pPageTable[iPage] & mask) | bits;
- }
- MmUnmapIoSpace(pPageTable,0xFFF);
- }
- }
- MmUnmapIoSpace(pPDB,0xFFF);
- PM_flushTLB();
- }
-}
-
-/****************************************************************************
-REMARKS:
-Allocate a block of shared memory. For NT we allocate shared memory
-as locked, global memory that is accessible from any memory context
-(including interrupt time context), which allows us to load our important
-data structure and code such that we can access it directly from a ring
-0 interrupt context.
-****************************************************************************/
-void * PMAPI PM_mallocShared(
- long size)
-{
- int i;
-
- /* First find a free slot in our shared memory table */
- for (i = 0; i < MAX_MEMORY_SHARED; i++) {
- if (shared[i].linear == 0)
- break;
- }
- if (i == MAX_MEMORY_SHARED)
- return NULL;
-
- /* Allocate the paged pool */
- shared[i].linear = ExAllocatePool(PagedPool, size);
-
- /* Create a list to manage this allocation */
- shared[i].pMdl = IoAllocateMdl(shared[i].linear,size,FALSE,FALSE,(PIRP) NULL);
-
- /* Lock this allocation in memory */
- MmProbeAndLockPages(shared[i].pMdl,KernelMode,IoModifyAccess);
-
- /* Modify bits to grant user access */
- _PM_adjustPageTables((ulong)shared[i].linear, size, true, true);
- return (void*)shared[i].linear;
-}
-
-/****************************************************************************
-REMARKS:
-Free a block of shared memory
-****************************************************************************/
-void PMAPI PM_freeShared(
- void *p)
-{
- int i;
-
- /* Find a shared memory block in our table and free it */
- for (i = 0; i < MAX_MEMORY_SHARED; i++) {
- if (shared[i].linear == p) {
- /* Unlock what we locked */
- MmUnlockPages(shared[i].pMdl);
-
- /* Free our MDL */
- IoFreeMdl(shared[i].pMdl);
-
- /* Free our mem */
- ExFreePool(shared[i].linear);
-
- /* Flag that is entry is available */
- shared[i].linear = 0;
- break;
- }
- }
-}
-
-/****************************************************************************
-REMARKS:
-Map a physical address to a linear address in the callers process.
-****************************************************************************/
-void * PMAPI PM_mapPhysicalAddr(
- ulong base,
- ulong limit,
- ibool isCached)
-{
- ulong linear,length = limit+1;
- int i;
-
- /* Search table of existing mappings to see if we have already mapped */
- /* a region of memory that will serve this purpose. */
- for (i = 0; i < numMappings; i++) {
- if (maps[i].physical == base && maps[i].length == length && maps[i].isCached == isCached) {
- _PM_adjustPageTables((ulong)maps[i].linear, maps[i].length, true, isCached);
- return (void*)maps[i].linear;
- }
- }
- if (numMappings == MAX_MEMORY_MAPPINGS)
- return NULL;
-
- /* We did not find any previously mapped memory region, so maps it in. */
- if ((linear = _PM_mapPhysicalToLinear(base,limit,isCached)) == 0xFFFFFFFF)
- return NULL;
- maps[numMappings].physical = base;
- maps[numMappings].length = length;
- maps[numMappings].linear = linear;
- maps[numMappings].isCached = isCached;
- numMappings++;
-
- /* Grant user access to this I/O space */
- _PM_adjustPageTables((ulong)linear, length, true, isCached);
- return (void*)linear;
-}
-
-/****************************************************************************
-REMARKS:
-Free a physical address mapping allocated by PM_mapPhysicalAddr.
-****************************************************************************/
-void PMAPI PM_freePhysicalAddr(
- void *ptr,
- ulong limit)
-{
- /* We don't free the memory mappings in here because we cache all */
- /* the memory mappings we create in the system for later use. */
-}
-
-/****************************************************************************
-REMARKS:
-Called when the device driver unloads to free all the page table mappings!
-****************************************************************************/
-void PMAPI _PM_freeMemoryMappings(void)
-{
- int i;
-
- for (i = 0; i < numMappings; i++)
- MmUnmapIoSpace((void *)maps[i].linear,maps[i].length);
-}
-
-/****************************************************************************
-REMARKS:
-Find the physical address of a linear memory address in current process.
-****************************************************************************/
-ulong PMAPI PM_getPhysicalAddr(
- void *p)
-{
- PHYSICAL_ADDRESS paOurAddress;
-
- paOurAddress = MmGetPhysicalAddress(p);
- return paOurAddress.LowPart;
-}
-
-/****************************************************************************
-REMARKS:
-Find the physical address of a linear memory address in current process.
-****************************************************************************/
-ibool PMAPI PM_getPhysicalAddrRange(
- void *p,
- ulong length,
- ulong *physAddress)
-{
- int i;
- ulong linear = (ulong)p & ~0xFFF;
-
- for (i = (length + 0xFFF) >> 12; i > 0; i--) {
- if ((*physAddress++ = PM_getPhysicalAddr((void*)linear)) == 0xFFFFFFFF)
- return false;
- linear += 4096;
- }
- return true;
-}
-
-/****************************************************************************
-REMARKS:
-Allocates a block of locked physical memory.
-****************************************************************************/
-void * PMAPI PM_allocLockedMem(
- uint size,
- ulong *physAddr,
- ibool contiguous,
- ibool below16M)
-{
- int i;
- PHYSICAL_ADDRESS paOurAddress;
-
- /* First find a free slot in our shared memory table */
- for (i = 0; i < MAX_MEMORY_LOCKED; i++) {
- if (locked[i].linear == 0)
- break;
- }
- if (i == MAX_MEMORY_LOCKED)
- return NULL;
-
- /* HighestAcceptableAddress - Specifies the highest valid physical address */
- /* the driver can use. For example, if a device can only reference physical */
- /* memory in the lower 16MB, this value would be set to 0x00000000FFFFFF. */
- paOurAddress.HighPart = 0;
- if (below16M)
- paOurAddress.LowPart = 0x00FFFFFF;
- else
- paOurAddress.LowPart = 0xFFFFFFFF;
-
- if (contiguous) {
- /* Allocate from the non-paged pool (unfortunately 4MB pages) */
- locked[i].linear = MmAllocateContiguousMemory(size, paOurAddress);
- if (!locked[i].linear)
- return NULL;
-
- /* Flag no MDL */
- locked[i].pMdl = NULL;
-
- /* Map the physical address for the memory so we can manage */
- /* the page tables in 4KB chunks mapped into user space. */
-
- /* TODO: Map this with the physical address to the linear addresss */
- locked[i].mmIoMapped = locked[i].linear;
-
- /* Modify bits to grant user access, flag not cached */
- _PM_adjustPageTables((ulong)locked[i].mmIoMapped, size, true, false);
- return (void*)locked[i].mmIoMapped;
- }
- else {
- /* Allocate from the paged pool */
- locked[i].linear = ExAllocatePool(PagedPool, size);
- if (!locked[i].linear)
- return NULL;
-
- /* Create a list to manage this allocation */
- locked[i].pMdl = IoAllocateMdl(locked[i].linear,size,FALSE,FALSE,(PIRP) NULL);
-
- /* Lock this allocation in memory */
- MmProbeAndLockPages(locked[i].pMdl,KernelMode,IoModifyAccess);
-
- /* Modify bits to grant user access, flag not cached */
- _PM_adjustPageTables((ulong)locked[i].linear, size, true, false);
- return (void*)locked[i].linear;
- }
-}
-
-/****************************************************************************
-REMARKS:
-Frees a block of locked physical memory.
-****************************************************************************/
-void PMAPI PM_freeLockedMem(
- void *p,
- uint size,
- ibool contiguous)
-{
- int i;
-
- /* Find a locked memory block in our table and free it */
- for (i = 0; i < MAX_MEMORY_LOCKED; i++) {
- if (locked[i].linear == p) {
- /* An Mdl indicates that we used the paged pool, and locked it, */
- /* so now we have to unlock, free the MDL, and free paged */
- if (locked[i].pMdl) {
- /* Unlock what we locked and free the Mdl */
- MmUnlockPages(locked[i].pMdl);
- IoFreeMdl(locked[i].pMdl);
- ExFreePool(locked[i].linear);
- }
- else {
- /* TODO: Free the mmIoMap mapping for the memory! */
-
- /* Free non-paged pool */
- MmFreeContiguousMemory(locked[i].linear);
- }
-
- /* Flag that is entry is available */
- locked[i].linear = 0;
- break;
- }
- }
-}
-
-/****************************************************************************
-REMARKS:
-Allocates a page aligned and page sized block of memory
-****************************************************************************/
-void * PMAPI PM_allocPage(
- ibool locked)
-{
- /* Allocate the memory from the non-paged pool if we want the memory */
- /* to be locked. */
- return ExAllocatePool(
- locked ? NonPagedPoolCacheAligned : PagedPoolCacheAligned,
- PAGE_SIZE);
-}
-
-/****************************************************************************
-REMARKS:
-Free a page aligned and page sized block of memory
-****************************************************************************/
-void PMAPI PM_freePage(
- void *p)
-{
- if (p) ExFreePool(p);
-}
-
-/****************************************************************************
-REMARKS:
-Lock linear memory so it won't be paged.
-****************************************************************************/
-int PMAPI PM_lockDataPages(
- void *p,
- uint len,
- PM_lockHandle *lh)
-{
- MDL *pMdl;
-
- /* Create a list to manage this allocation */
- if ((pMdl = IoAllocateMdl(p,len,FALSE,FALSE,(PIRP)NULL)) == NULL)
- return false;
-
- /* Lock this allocation in memory */
- MmProbeAndLockPages(pMdl,KernelMode,IoModifyAccess);
- *((PMDL*)(&lh->h)) = pMdl;
- return true;
-}
-
-/****************************************************************************
-REMARKS:
-Unlock linear memory so it won't be paged.
-****************************************************************************/
-int PMAPI PM_unlockDataPages(
- void *p,
- uint len,
- PM_lockHandle *lh)
-{
- if (p && lh) {
- /* Unlock what we locked */
- MDL *pMdl = *((PMDL*)(&lh->h));
- MmUnlockPages(pMdl);
- IoFreeMdl(pMdl);
- }
- return true;
-}
-
-/****************************************************************************
-REMARKS:
-Lock linear memory so it won't be paged.
-****************************************************************************/
-int PMAPI PM_lockCodePages(
- void (*p)(),
- uint len,
- PM_lockHandle *lh)
-{
- return PM_lockDataPages((void*)p,len,lh);
-}
-
-/****************************************************************************
-REMARKS:
-Unlock linear memory so it won't be paged.
-****************************************************************************/
-int PMAPI PM_unlockCodePages(
- void (*p)(),
- uint len,
- PM_lockHandle *lh)
-{
- return PM_unlockDataPages((void*)p,len,lh);
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/ntdrv/oshdr.h b/board/MAI/bios_emulator/scitech/src/pm/ntdrv/oshdr.h
deleted file mode 100644
index 65b7bae23c..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/ntdrv/oshdr.h
+++ /dev/null
@@ -1,45 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: 32-bit Windows NT drivers
-*
-* Description: Include file to include all OS specific header files.
-*
-****************************************************************************/
-
-#ifndef __NTDRV_OSHDR_H
-#define __NTDRV_OSHDR_H
-
-/*--------------------------- Macros and Typedefs -------------------------*/
-
-/*---------------------------- Global variables ---------------------------*/
-
-/*--------------------------- Function Prototypes -------------------------*/
-
-/* Internal unicode string handling functions */
-
-UNICODE_STRING * _PM_CStringToUnicodeString(const char *cstr);
-void _PM_FreeUnicodeString(UNICODE_STRING *uniStr);
-
-#endif /* __NTDRV_OSHDR_H */
diff --git a/board/MAI/bios_emulator/scitech/src/pm/ntdrv/pm.c b/board/MAI/bios_emulator/scitech/src/pm/ntdrv/pm.c
deleted file mode 100644
index c6606314c1..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/ntdrv/pm.c
+++ /dev/null
@@ -1,933 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: 32-bit Windows NT device drivers.
-*
-* Description: Implementation for the OS Portability Manager Library, which
-* contains functions to implement OS specific services in a
-* generic, cross platform API. Porting the OS Portability
-* Manager library is the first step to porting any SciTech
-* products to a new platform.
-*
-****************************************************************************/
-
-#include "pmapi.h"
-#include "drvlib/os/os.h"
-#include "sdd/sddhelp.h"
-#include "mtrr.h"
-#include "oshdr.h"
-
-/*--------------------------- Global variables ----------------------------*/
-
-char _PM_cntPath[PM_MAX_PATH] = "";
-char _PM_nucleusPath[PM_MAX_PATH] = "";
-static void (PMAPIP fatalErrorCleanup)(void) = NULL;
-
-static char *szNTWindowsKey = "\\REGISTRY\\Machine\\Software\\Microsoft\\Windows NT\\CurrentVersion";
-static char *szNTSystemRoot = "SystemRoot";
-static char *szMachineNameKey = "\\REGISTRY\\Machine\\System\\CurrentControlSet\\control\\ComputerName\\ComputerName";
-static char *szMachineNameKeyNT = "\\REGISTRY\\Machine\\System\\CurrentControlSet\\control\\ComputerName\\ActiveComputerName";
-static char *szMachineName = "ComputerName";
-
-/*----------------------------- Implementation ----------------------------*/
-
-/****************************************************************************
-REMARKS:
-Initialise the PM library.
-****************************************************************************/
-void PMAPI PM_init(void)
-{
- /* Initialiase the MTRR module */
- MTRR_init();
-}
-
-/****************************************************************************
-REMARKS:
-Return the operating system type identifier.
-****************************************************************************/
-long PMAPI PM_getOSType(void)
-{
- return _OS_WINNTDRV;
-}
-
-/****************************************************************************
-REMARKS:
-Return the runtime type identifier.
-****************************************************************************/
-int PMAPI PM_getModeType(void)
-{
- return PM_386;
-}
-
-/****************************************************************************
-REMARKS:
-Add a file directory separator to the end of the filename.
-****************************************************************************/
-void PMAPI PM_backslash(char *s)
-{
- uint pos = strlen(s);
- if (s[pos-1] != '\\') {
- s[pos] = '\\';
- s[pos+1] = '\0';
- }
-}
-
-/****************************************************************************
-REMARKS:
-Add a user defined PM_fatalError cleanup function.
-****************************************************************************/
-void PMAPI PM_setFatalErrorCleanup(
- void (PMAPIP cleanup)(void))
-{
- fatalErrorCleanup = cleanup;
-}
-
-/****************************************************************************
-REMARKS:
-Handle fatal errors internally in the driver.
-****************************************************************************/
-void PMAPI PM_fatalError(
- const char *msg)
-{
- ULONG BugCheckCode = 0;
- ULONG MoreBugCheckData[4] = {0};
- char *p;
- ULONG len;
-
- if (fatalErrorCleanup)
- fatalErrorCleanup();
-
-#ifdef DBG /* Send output to debugger, just return so as not to force a reboot */
-#pragma message("INFO: building for debug, PM_fatalError() re-routed")
- DBGMSG2("SDDHELP> PM_fatalError(): ERROR: %s\n", msg);
- return ;
-#endif
- /* KeBugCheckEx brings down the system in a controlled */
- /* manner when the caller discovers an unrecoverable */
- /* inconsistency that would corrupt the system if */
- /* the caller continued to run. */
- /* */
- /* hack - dump the first 20 chars in hex using the variables */
- /* provided - Each ULONG is equal to four characters... */
- for(len = 0; len < 20; len++)
- if (msg[len] == (char)0)
- break;
-
- /* This looks bad but it's quick and reliable... */
- p = (char *)&BugCheckCode;
- if(len > 0) p[3] = msg[0];
- if(len > 1) p[2] = msg[1];
- if(len > 2) p[1] = msg[2];
- if(len > 3) p[0] = msg[3];
-
- p = (char *)&MoreBugCheckData[0];
- if(len > 4) p[3] = msg[4];
- if(len > 5) p[2] = msg[5];
- if(len > 6) p[1] = msg[6];
- if(len > 7) p[0] = msg[7];
-
- p = (char *)&MoreBugCheckData[1];
- if(len > 8) p[3] = msg[8];
- if(len > 9) p[2] = msg[9];
- if(len > 10) p[1] = msg[10];
- if(len > 11) p[0] = msg[11];
-
- p = (char *)&MoreBugCheckData[2];
- if(len > 12) p[3] = msg[12];
- if(len > 13) p[2] = msg[13];
- if(len > 14) p[1] = msg[14];
- if(len > 15) p[0] = msg[15];
-
- p = (char *)&MoreBugCheckData[3];
- if(len > 16) p[3] = msg[16];
- if(len > 17) p[2] = msg[17];
- if(len > 18) p[1] = msg[18];
- if(len > 19) p[0] = msg[19];
-
- /* Halt the system! */
- KeBugCheckEx(BugCheckCode, MoreBugCheckData[0], MoreBugCheckData[1], MoreBugCheckData[2], MoreBugCheckData[3]);
-}
-
-/****************************************************************************
-REMARKS:
-Return the current operating system path or working directory.
-****************************************************************************/
-char * PMAPI PM_getCurrentPath(
- char *path,
- int maxLen)
-{
- strncpy(path,_PM_cntPath,maxLen);
- path[maxLen-1] = 0;
- return path;
-}
-
-/****************************************************************************
-PARAMETERS:
-szKey - Key to query (can contain version number formatting)
-szValue - Value to get information for
-value - Place to store the registry key data read
-size - Size of the string buffer to read into
-
-RETURNS:
-true if the key was found, false if not.
-****************************************************************************/
-static ibool REG_queryString(
- char *szKey,
- const char *szValue,
- char *value,
- DWORD size)
-{
- ibool status;
- NTSTATUS rval;
- ULONG length;
- HANDLE Handle;
- OBJECT_ATTRIBUTES keyAttributes;
- UNICODE_STRING *uniKey = NULL;
- UNICODE_STRING *uniValue = NULL;
- PKEY_VALUE_FULL_INFORMATION fullInfo = NULL;
- STRING stringdata;
- UNICODE_STRING unidata;
-
- /* Convert strings to UniCode */
- status = false;
- if ((uniKey = _PM_CStringToUnicodeString(szKey)) == NULL)
- goto Exit;
- if ((uniValue = _PM_CStringToUnicodeString(szValue)) == NULL)
- goto Exit;
-
- /* Open the key */
- InitializeObjectAttributes( &keyAttributes,
- uniKey,
- OBJ_CASE_INSENSITIVE,
- NULL,
- NULL );
- rval = ZwOpenKey( &Handle,
- KEY_ALL_ACCESS,
- &keyAttributes );
- if (!NT_SUCCESS(rval))
- goto Exit;
-
- /* Query the value */
- length = sizeof (KEY_VALUE_FULL_INFORMATION)
- + size * sizeof(WCHAR);
- if ((fullInfo = ExAllocatePool (PagedPool, length)) == NULL)
- goto Exit;
- RtlZeroMemory(fullInfo, length);
- rval = ZwQueryValueKey (Handle,
- uniValue,
- KeyValueFullInformation,
- fullInfo,
- length,
- &length);
- if (NT_SUCCESS (rval)) {
- /* Create the UniCode string so we can convert it */
- unidata.Buffer = (PWCHAR)(((PCHAR)fullInfo) + fullInfo->DataOffset);
- unidata.Length = (USHORT)fullInfo->DataLength;
- unidata.MaximumLength = (USHORT)fullInfo->DataLength + sizeof(WCHAR);
-
- /* Convert unicode univalue to ansi string. */
- rval = RtlUnicodeStringToAnsiString(&stringdata, &unidata, TRUE);
- if (NT_SUCCESS(rval)) {
- strcpy(value,stringdata.Buffer);
- status = true;
- }
- }
-
-Exit:
- if (fullInfo) ExFreePool(fullInfo);
- if (uniKey) _PM_FreeUnicodeString(uniKey);
- if (uniValue) _PM_FreeUnicodeString(uniValue);
- return status;
-}
-
-/****************************************************************************
-REMARKS:
-Return the drive letter for the boot drive.
-****************************************************************************/
-char PMAPI PM_getBootDrive(void)
-{
- char path[256];
- if (REG_queryString(szNTWindowsKey,szNTSystemRoot,path,sizeof(path)))
- return 'c';
- return path[0];
-}
-
-/****************************************************************************
-REMARKS:
-Return the path to the VBE/AF driver files.
-****************************************************************************/
-const char * PMAPI PM_getVBEAFPath(void)
-{
- return "c:\\";
-}
-
-/****************************************************************************
-REMARKS:
-Return the path to the Nucleus driver files.
-****************************************************************************/
-const char * PMAPI PM_getNucleusPath(void)
-{
- static char path[256];
-
- if (strlen(_PM_nucleusPath) > 0) {
- strcpy(path,_PM_nucleusPath);
- PM_backslash(path);
- return path;
- }
- if (!REG_queryString(szNTWindowsKey,szNTSystemRoot,path,sizeof(path)))
- strcpy(path,"c:\\winnt");
- PM_backslash(path);
- strcat(path,"system32\\nucleus");
- return path;
-}
-
-/****************************************************************************
-REMARKS:
-Return the path to the Nucleus configuration files.
-****************************************************************************/
-const char * PMAPI PM_getNucleusConfigPath(void)
-{
- static char path[256];
- strcpy(path,PM_getNucleusPath());
- PM_backslash(path);
- strcat(path,"config");
- return path;
-}
-
-/****************************************************************************
-REMARKS:
-Return a unique identifier for the machine if possible.
-****************************************************************************/
-const char * PMAPI PM_getUniqueID(void)
-{
- return PM_getMachineName();
-}
-
-/****************************************************************************
-REMARKS:
-Get the name of the machine on the network.
-****************************************************************************/
-const char * PMAPI PM_getMachineName(void)
-{
- static char name[256];
-
- if (REG_queryString(szMachineNameKey,szMachineName,name,sizeof(name)))
- return name;
- if (REG_queryString(szMachineNameKeyNT,szMachineName,name,sizeof(name)))
- return name;
- return "Unknown";
-}
-
-/****************************************************************************
-REMARKS:
-Check if a key has been pressed.
-****************************************************************************/
-int PMAPI PM_kbhit(void)
-{
- /* Not used in NT drivers */
- return true;
-}
-
-/****************************************************************************
-REMARKS:
-Wait for and return the next keypress.
-****************************************************************************/
-int PMAPI PM_getch(void)
-{
- /* Not used in NT drivers */
- return 0xD;
-}
-
-/****************************************************************************
-REMARKS:
-Open a console for output to the screen, creating the main event handling
-window if necessary.
-****************************************************************************/
-PM_HWND PMAPI PM_openConsole(
- PM_HWND hwndUser,
- int device,
- int xRes,
- int yRes,
- int bpp,
- ibool fullScreen)
-{
- /* Not used in NT drivers */
- (void)hwndUser;
- (void)device;
- (void)xRes;
- (void)yRes;
- (void)bpp;
- (void)fullScreen;
- return NULL;
-}
-
-/****************************************************************************
-REMARKS:
-Find the size of the console state buffer.
-****************************************************************************/
-int PMAPI PM_getConsoleStateSize(void)
-{
- /* Not used in NT drivers */
- return 1;
-}
-
-/****************************************************************************
-REMARKS:
-Save the state of the console.
-****************************************************************************/
-void PMAPI PM_saveConsoleState(
- void *stateBuf,
- PM_HWND hwndConsole)
-{
- /* Not used in NT drivers */
- (void)stateBuf;
- (void)hwndConsole;
-}
-
-/****************************************************************************
-REMARKS:
-Set the suspend application callback for the fullscreen console.
-****************************************************************************/
-void PMAPI PM_setSuspendAppCallback(
- PM_saveState_cb saveState)
-{
- /* Not used in NT drivers */
- (void)saveState;
-}
-
-/****************************************************************************
-REMARKS:
-Restore the console state.
-****************************************************************************/
-void PMAPI PM_restoreConsoleState(
- const void *stateBuf,
- PM_HWND hwndConsole)
-{
- /* Not used in NT drivers */
- (void)stateBuf;
- (void)hwndConsole;
-}
-
-/****************************************************************************
-REMARKS:
-Close the fullscreen console.
-****************************************************************************/
-void PMAPI PM_closeConsole(
- PM_HWND hwndConsole)
-{
- /* Not used in NT drivers */
- (void)hwndConsole;
-}
-
-/****************************************************************************
-REMARKS:
-Set the location of the OS console cursor.
-****************************************************************************/
-void PMAPI PM_setOSCursorLocation(
- int x,
- int y)
-{
- /* Nothing to do for Windows */
- (void)x;
- (void)y;
-}
-
-/****************************************************************************
-REMARKS:
-Set the width of the OS console.
-****************************************************************************/
-void PMAPI PM_setOSScreenWidth(
- int width,
- int height)
-{
- /* Nothing to do for Windows */
- (void)width;
- (void)height;
-}
-
-/****************************************************************************
-REMARKS:
-Maps a shared memory block into process address space. Does nothing since
-the memory blocks are already globally mapped into all processes.
-****************************************************************************/
-void * PMAPI PM_mapToProcess(
- void *base,
- ulong limit)
-{
- /* Not used anymore */
- (void)base;
- (void)limit;
- return NULL;
-}
-
-/****************************************************************************
-REMARKS:
-Execute the POST on the secondary BIOS for a controller.
-****************************************************************************/
-ibool PMAPI PM_doBIOSPOST(
- ushort axVal,
- ulong BIOSPhysAddr,
- void *mappedBIOS,
- ulong BIOSLen)
-{
- /* This may not be possible in NT and should be done by the OS anyway */
- (void)axVal;
- (void)BIOSPhysAddr;
- (void)mappedBIOS;
- (void)BIOSLen;
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Return a pointer to the real mode BIOS data area.
-****************************************************************************/
-void * PMAPI PM_getBIOSPointer(void)
-{
- /* Note that on NT this probably does not do what we expect! */
- return PM_mapPhysicalAddr(0x400, 0x1000, true);
-}
-
-/****************************************************************************
-REMARKS:
-Return a pointer to 0xA0000 physical VGA graphics framebuffer.
-****************************************************************************/
-void * PMAPI PM_getA0000Pointer(void)
-{
- return PM_mapPhysicalAddr(0xA0000,0xFFFF,false);
-}
-
-/****************************************************************************
-REMARKS:
-Sleep for the specified number of milliseconds.
-****************************************************************************/
-void PMAPI PM_sleep(
- ulong milliseconds)
-{
- /* We never use this in NT drivers */
- (void)milliseconds;
-}
-
-/****************************************************************************
-REMARKS:
-Return the base I/O port for the specified COM port.
-****************************************************************************/
-int PMAPI PM_getCOMPort(int port)
-{
- /* TODO: Re-code this to determine real values using the Plug and Play */
- /* manager for the OS. */
- switch (port) {
- case 0: return 0x3F8;
- case 1: return 0x2F8;
- case 2: return 0x3E8;
- case 3: return 0x2E8;
- }
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-Return the base I/O port for the specified LPT port.
-****************************************************************************/
-int PMAPI PM_getLPTPort(int port)
-{
- /* TODO: Re-code this to determine real values using the Plug and Play */
- /* manager for the OS. */
- switch (port) {
- case 0: return 0x3BC;
- case 1: return 0x378;
- case 2: return 0x278;
- }
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-Returns available memory. Not possible under Windows.
-****************************************************************************/
-void PMAPI PM_availableMemory(
- ulong *physical,
- ulong *total)
-{
- *physical = *total = 0;
-}
-
-/****************************************************************************
-REMARKS:
-OS specific shared libraries not supported inside a VxD
-****************************************************************************/
-PM_MODULE PMAPI PM_loadLibrary(
- const char *szDLLName)
-{
- /* Not used in NT drivers */
- (void)szDLLName;
- return NULL;
-}
-
-/****************************************************************************
-REMARKS:
-OS specific shared libraries not supported inside a VxD
-****************************************************************************/
-void * PMAPI PM_getProcAddress(
- PM_MODULE hModule,
- const char *szProcName)
-{
- /* Not used in NT drivers */
- (void)hModule;
- (void)szProcName;
- return NULL;
-}
-
-/****************************************************************************
-REMARKS:
-OS specific shared libraries not supported inside a VxD
-****************************************************************************/
-void PMAPI PM_freeLibrary(
- PM_MODULE hModule)
-{
- /* Not used in NT drivers */
- (void)hModule;
-}
-
-/****************************************************************************
-REMARKS:
-Function to find the first file matching a search criteria in a directory.
-****************************************************************************/
-void *PMAPI PM_findFirstFile(
- const char *filename,
- PM_findData *findData)
-{
- /* TODO: This function should start a directory enumeration search */
- /* given the filename (with wildcards). The data should be */
- /* converted and returned in the findData standard form. */
- (void)filename;
- (void)findData;
- return PM_FILE_INVALID;
-}
-
-/****************************************************************************
-REMARKS:
-Function to find the next file matching a search criteria in a directory.
-****************************************************************************/
-ibool PMAPI PM_findNextFile(
- void *handle,
- PM_findData *findData)
-{
- /* TODO: This function should find the next file in directory enumeration */
- /* search given the search criteria defined in the call to */
- /* PM_findFirstFile. The data should be converted and returned */
- /* in the findData standard form. */
- (void)handle;
- (void)findData;
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Function to close the find process
-****************************************************************************/
-void PMAPI PM_findClose(
- void *handle)
-{
- /* TODO: This function should close the find process. This may do */
- /* nothing for some OS'es. */
- (void)handle;
-}
-
-/****************************************************************************
-REMARKS:
-Function to determine if a drive is a valid drive or not. Under Unix this
-function will return false for anything except a value of 3 (considered
-the root drive, and equivalent to C: for non-Unix systems). The drive
-numbering is:
-
- 1 - Drive A:
- 2 - Drive B:
- 3 - Drive C:
- etc
-
-****************************************************************************/
-ibool PMAPI PM_driveValid(
- char drive)
-{
- /* Not supported in NT drivers */
- (void)drive;
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Function to get the current working directory for the specififed drive.
-Under Unix this will always return the current working directory regardless
-of what the value of 'drive' is.
-****************************************************************************/
-void PMAPI PM_getdcwd(
- int drive,
- char *dir,
- int len)
-{
- /* Not supported in NT drivers */
- (void)drive;
- (void)dir;
- (void)len;
-}
-
-/****************************************************************************
-PARAMETERS:
-base - The starting physical base address of the region
-size - The size in bytes of the region
-type - Type to place into the MTRR register
-
-RETURNS:
-Error code describing the result.
-
-REMARKS:
-Function to enable write combining for the specified region of memory.
-****************************************************************************/
-int PMAPI PM_enableWriteCombine(
- ulong base,
- ulong size,
- uint type)
-{
- return MTRR_enableWriteCombine(base,size,type);
-}
-
-/****************************************************************************
-REMARKS:
-Function to change the file attributes for a specific file.
-****************************************************************************/
-void PMAPI PM_setFileAttr(
- const char *filename,
- uint attrib)
-{
- NTSTATUS status;
- ACCESS_MASK DesiredAccess = GENERIC_READ | GENERIC_WRITE;
- OBJECT_ATTRIBUTES ObjectAttributes;
- ULONG ShareAccess = FILE_SHARE_READ;
- ULONG CreateDisposition = FILE_OPEN;
- HANDLE FileHandle = NULL;
- UNICODE_STRING *uniFile = NULL;
- IO_STATUS_BLOCK IoStatusBlock;
- FILE_BASIC_INFORMATION FileBasic;
- char kernelFilename[PM_MAX_PATH+5];
- ULONG FileAttributes = 0;
-
- /* Convert file attribute flags */
- if (attrib & PM_FILE_READONLY)
- FileAttributes |= FILE_ATTRIBUTE_READONLY;
- if (attrib & PM_FILE_ARCHIVE)
- FileAttributes |= FILE_ATTRIBUTE_ARCHIVE;
- if (attrib & PM_FILE_HIDDEN)
- FileAttributes |= FILE_ATTRIBUTE_HIDDEN;
- if (attrib & PM_FILE_SYSTEM)
- FileAttributes |= FILE_ATTRIBUTE_SYSTEM;
-
- /* Add prefix for addressing the file system. "\??\" is short for "\DosDevices\" */
- strcpy(kernelFilename, "\\??\\");
- strcat(kernelFilename, filename);
-
- /* Convert filename string to ansi string */
- if ((uniFile = _PM_CStringToUnicodeString(kernelFilename)) == NULL)
- goto Exit;
-
- /* Must open a file to query it's attributes */
- InitializeObjectAttributes (&ObjectAttributes,
- uniFile,
- OBJ_CASE_INSENSITIVE,
- NULL,
- NULL );
- status = ZwCreateFile( &FileHandle,
- DesiredAccess | SYNCHRONIZE,
- &ObjectAttributes,
- &IoStatusBlock,
- NULL, /*AllocationSize OPTIONAL, */
- FILE_ATTRIBUTE_NORMAL,
- ShareAccess,
- CreateDisposition,
- FILE_RANDOM_ACCESS, /*CreateOptions, */
- NULL, /*EaBuffer OPTIONAL, */
- 0 /*EaLength (required if EaBuffer) */
- );
- if (!NT_SUCCESS (status))
- goto Exit;
-
- /* Query timestamps */
- status = ZwQueryInformationFile(FileHandle,
- &IoStatusBlock,
- &FileBasic,
- sizeof(FILE_BASIC_INFORMATION),
- FileBasicInformation
- );
- if (!NT_SUCCESS (status))
- goto Exit;
-
- /* Change the four bits we change */
- FileBasic.FileAttributes &= ~(FILE_ATTRIBUTE_READONLY | FILE_ATTRIBUTE_ARCHIVE
- | FILE_ATTRIBUTE_HIDDEN | FILE_ATTRIBUTE_SYSTEM);
- FileBasic.FileAttributes |= FileAttributes;
-
- /* Set timestamps */
- ZwSetInformationFile( FileHandle,
- &IoStatusBlock,
- &FileBasic,
- sizeof(FILE_BASIC_INFORMATION),
- FileBasicInformation
- );
-
-Exit:
- if (FileHandle) ZwClose(FileHandle);
- if (uniFile) _PM_FreeUnicodeString(uniFile);
- return;
-}
-
-/****************************************************************************
-REMARKS:
-Function to get the file attributes for a specific file.
-****************************************************************************/
-uint PMAPI PM_getFileAttr(
- const char *filename)
-{
- NTSTATUS status;
- ACCESS_MASK DesiredAccess = GENERIC_READ | GENERIC_WRITE;
- OBJECT_ATTRIBUTES ObjectAttributes;
- ULONG ShareAccess = FILE_SHARE_READ;
- ULONG CreateDisposition = FILE_OPEN;
- HANDLE FileHandle = NULL;
- UNICODE_STRING *uniFile = NULL;
- IO_STATUS_BLOCK IoStatusBlock;
- FILE_BASIC_INFORMATION FileBasic;
- char kernelFilename[PM_MAX_PATH+5];
- ULONG FileAttributes = 0;
- uint retval = 0;
-
- /* Add prefix for addressing the file system. "\??\" is short for "\DosDevices\" */
- strcpy(kernelFilename, "\\??\\");
- strcat(kernelFilename, filename);
-
- /* Convert filename string to ansi string */
- if ((uniFile = _PM_CStringToUnicodeString(kernelFilename)) == NULL)
- goto Exit;
-
- /* Must open a file to query it's attributes */
- InitializeObjectAttributes (&ObjectAttributes,
- uniFile,
- OBJ_CASE_INSENSITIVE,
- NULL,
- NULL );
- status = ZwCreateFile( &FileHandle,
- DesiredAccess | SYNCHRONIZE,
- &ObjectAttributes,
- &IoStatusBlock,
- NULL, /*AllocationSize OPTIONAL, */
- FILE_ATTRIBUTE_NORMAL,
- ShareAccess,
- CreateDisposition,
- FILE_RANDOM_ACCESS, /*CreateOptions, */
- NULL, /*EaBuffer OPTIONAL, */
- 0 /*EaLength (required if EaBuffer) */
- );
- if (!NT_SUCCESS (status))
- goto Exit;
-
- /* Query timestamps */
- status = ZwQueryInformationFile(FileHandle,
- &IoStatusBlock,
- &FileBasic,
- sizeof(FILE_BASIC_INFORMATION),
- FileBasicInformation
- );
- if (!NT_SUCCESS (status))
- goto Exit;
-
- /* Translate the file attributes */
- if (FileBasic.FileAttributes & FILE_ATTRIBUTE_READONLY)
- retval |= PM_FILE_READONLY;
- if (FileBasic.FileAttributes & FILE_ATTRIBUTE_ARCHIVE)
- retval |= PM_FILE_ARCHIVE;
- if (FileBasic.FileAttributes & FILE_ATTRIBUTE_HIDDEN)
- retval |= PM_FILE_HIDDEN;
- if (FileBasic.FileAttributes & FILE_ATTRIBUTE_SYSTEM)
- retval |= PM_FILE_SYSTEM;
-
-Exit:
- if (FileHandle) ZwClose(FileHandle);
- if (uniFile) _PM_FreeUnicodeString(uniFile);
- return retval;
-}
-
-/****************************************************************************
-REMARKS:
-Function to create a directory.
-****************************************************************************/
-ibool PMAPI PM_mkdir(
- const char *filename)
-{
- /* Not supported in NT drivers */
- (void)filename;
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Function to remove a directory.
-****************************************************************************/
-ibool PMAPI PM_rmdir(
- const char *filename)
-{
- /* Not supported in NT drivers */
- (void)filename;
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Function to get the file time and date for a specific file.
-****************************************************************************/
-ibool PMAPI PM_getFileTime(
- const char *filename,
- ibool gmTime,
- PM_time *time)
-{
- /* Not supported in NT drivers */
- (void)filename;
- (void)gmTime;
- (void)time;
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Function to set the file time and date for a specific file.
-****************************************************************************/
-ibool PMAPI PM_setFileTime(
- const char *filename,
- ibool gmTime,
- PM_time *time)
-{
- /* Not supported in NT drivers */
- (void)filename;
- (void)gmTime;
- (void)time;
- return false;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/ntdrv/stdio.c b/board/MAI/bios_emulator/scitech/src/pm/ntdrv/stdio.c
deleted file mode 100644
index 658f1c80ab..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/ntdrv/stdio.c
+++ /dev/null
@@ -1,330 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: 32-bit Windows NT driver
-*
-* Description: C library compatible I/O functions for use within a Windows
-* NT driver.
-*
-****************************************************************************/
-
-#include "pmapi.h"
-#include "oshdr.h"
-
-/*------------------------ Main Code Implementation -----------------------*/
-
-/****************************************************************************
-REMARKS:
-NT driver implementation of the ANSI C fopen function.
-****************************************************************************/
-FILE * fopen(
- const char *filename,
- const char *mode)
-{
- ACCESS_MASK DesiredAccess; /* for ZwCreateFile... */
- OBJECT_ATTRIBUTES ObjectAttributes;
- ULONG ShareAccess;
- ULONG CreateDisposition;
- NTSTATUS status;
- HANDLE FileHandle;
- UNICODE_STRING *uniFile = NULL;
- PWCHAR bufFile = NULL;
- IO_STATUS_BLOCK IoStatusBlock;
- FILE_STANDARD_INFORMATION FileInformation;
- FILE_POSITION_INFORMATION FilePosition;
- char kernelFilename[PM_MAX_PATH+5];
- FILE *f;
-
- /* Add prefix for addressing the file system. "\??\" is short for "\DosDevices\" */
- strcpy(kernelFilename, "\\??\\");
- strcat(kernelFilename, filename);
- if ((f = PM_malloc(sizeof(FILE))) == NULL)
- goto Error;
- f->offset = 0;
- f->text = (mode[1] == 't' || mode[2] == 't');
- f->writemode = (mode[0] == 'w') || (mode[0] == 'a');
- if (mode[0] == 'r') {
- /* omode = OPEN_ACCESS_READONLY | OPEN_SHARE_COMPATIBLE; */
- /* action = ACTION_IFEXISTS_OPEN | ACTION_IFNOTEXISTS_FAIL; */
- DesiredAccess = GENERIC_READ;
- ShareAccess = FILE_SHARE_READ | FILE_SHARE_WRITE;
- CreateDisposition = FILE_OPEN;
- }
- else if (mode[0] == 'w') {
- /* omode = OPEN_ACCESS_WRITEONLY | OPEN_SHARE_COMPATIBLE; */
- /* action = ACTION_IFEXISTS_TRUNCATE | ACTION_IFNOTEXISTS_CREATE; */
- DesiredAccess = GENERIC_WRITE;
- ShareAccess = FILE_SHARE_READ | FILE_SHARE_WRITE;
- CreateDisposition = FILE_SUPERSEDE;
- }
- else {
- /* omode = OPEN_ACCESS_READWRITE | OPEN_SHARE_COMPATIBLE; */
- /* action = ACTION_IFEXISTS_OPEN | ACTION_IFNOTEXISTS_CREATE; */
- DesiredAccess = GENERIC_READ | GENERIC_WRITE;
- ShareAccess = FILE_SHARE_READ;
- CreateDisposition = FILE_OPEN_IF;
- }
-
- /* Convert filename string to ansi string and then to UniCode string */
- if ((uniFile = _PM_CStringToUnicodeString(kernelFilename)) == NULL)
- return NULL;
-
- /* Create the file */
- InitializeObjectAttributes (&ObjectAttributes,
- uniFile,
- OBJ_CASE_INSENSITIVE,
- NULL,
- NULL);
- status = ZwCreateFile( &FileHandle,
- DesiredAccess | SYNCHRONIZE,
- &ObjectAttributes,
- &IoStatusBlock,
- NULL, /* AllocationSize OPTIONAL, */
- FILE_ATTRIBUTE_NORMAL,
- ShareAccess,
- CreateDisposition,
- FILE_RANDOM_ACCESS, /* CreateOptions, */
- NULL, /* EaBuffer OPTIONAL, */
- 0 /* EaLength (required if EaBuffer) */
- );
- if (!NT_SUCCESS (status))
- goto Error;
- f->handle = (int)FileHandle;
-
- /* Determine size of the file */
- status = ZwQueryInformationFile( FileHandle,
- &IoStatusBlock,
- &FileInformation,
- sizeof(FILE_STANDARD_INFORMATION),
- FileStandardInformation
- );
- if (!NT_SUCCESS (status))
- goto Error;
- f->filesize = FileInformation.EndOfFile.LowPart;
-
- /* Move to the end of the file if we are appending */
- if (mode[0] == 'a') {
- FilePosition.CurrentByteOffset.HighPart = 0;
- FilePosition.CurrentByteOffset.LowPart = f->filesize;
- status = ZwSetInformationFile( FileHandle,
- &IoStatusBlock,
- &FilePosition,
- sizeof(FILE_POSITION_INFORMATION),
- FilePositionInformation
- );
- if (!NT_SUCCESS (status))
- goto Error;
- }
- return f;
-
-Error:
- if (f) PM_free(f);
- if (uniFile) _PM_FreeUnicodeString(uniFile);
- return NULL;
-}
-
-/****************************************************************************
-REMARKS:
-NT driver implementation of the ANSI C fread function.
-****************************************************************************/
-size_t fread(
- void *ptr,
- size_t size,
- size_t n,
- FILE *f)
-{
- NTSTATUS status;
- IO_STATUS_BLOCK IoStatusBlock;
- LARGE_INTEGER ByteOffset;
-
- /* Read any extra bytes from the file */
- ByteOffset.HighPart = 0;
- ByteOffset.LowPart = f->offset;
- status = ZwReadFile( (HANDLE)f->handle,
- NULL, /*IN HANDLE Event OPTIONAL, */
- NULL, /* IN PIO_APC_ROUTINE ApcRoutine OPTIONAL, */
- NULL, /* IN PVOID ApcContext OPTIONAL, */
- &IoStatusBlock,
- ptr, /* OUT PVOID Buffer, */
- size * n, /*IN ULONG Length, */
- &ByteOffset, /*OPTIONAL, */
- NULL /*IN PULONG Key OPTIONAL */
- );
- if (!NT_SUCCESS (status))
- return 0;
- f->offset += IoStatusBlock.Information;
- return IoStatusBlock.Information / size;
-}
-
-/****************************************************************************
-REMARKS:
-NT driver implementation of the ANSI C fwrite function.
-****************************************************************************/
-size_t fwrite(
- const void *ptr,
- size_t size,
- size_t n,
- FILE *f)
-{
- NTSTATUS status;
- IO_STATUS_BLOCK IoStatusBlock;
- LARGE_INTEGER ByteOffset;
-
- if (!f->writemode)
- return 0;
- ByteOffset.HighPart = 0;
- ByteOffset.LowPart = f->offset;
- status = ZwWriteFile( (HANDLE)f->handle,
- NULL, /*IN HANDLE Event OPTIONAL, */
- NULL, /* IN PIO_APC_ROUTINE ApcRoutine OPTIONAL, */
- NULL, /* IN PVOID ApcContext OPTIONAL, */
- &IoStatusBlock,
- (void*)ptr, /* OUT PVOID Buffer, */
- size * n, /*IN ULONG Length, */
- &ByteOffset, /*OPTIONAL, */
- NULL /*IN PULONG Key OPTIONAL */
- );
- if (!NT_SUCCESS (status))
- return 0;
- f->offset += IoStatusBlock.Information;
- if (f->offset > f->filesize)
- f->filesize = f->offset;
- return IoStatusBlock.Information / size;
-}
-
-/****************************************************************************
-REMARKS:
-NT driver implementation of the ANSI C fflush function.
-****************************************************************************/
-int fflush(
- FILE *f)
-{
- /* Nothing to do here as we are not doing buffered I/O */
- (void)f;
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-NT driver implementation of the ANSI C fseek function.
-****************************************************************************/
-int fseek(
- FILE *f,
- long int offset,
- int whence)
-{
- NTSTATUS status;
- FILE_POSITION_INFORMATION FilePosition;
- IO_STATUS_BLOCK IoStatusBlock;
-
- if (whence == 0)
- f->offset = offset;
- else if (whence == 1)
- f->offset += offset;
- else if (whence == 2)
- f->offset = f->filesize + offset;
- FilePosition.CurrentByteOffset.HighPart = 0;
- FilePosition.CurrentByteOffset.LowPart = f->offset;
- status = ZwSetInformationFile( (HANDLE)f->handle,
- &IoStatusBlock,
- &FilePosition,
- sizeof(FILE_POSITION_INFORMATION),
- FilePositionInformation
- );
- if (!NT_SUCCESS (status))
- return -1;
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-NT driver implementation of the ANSI C ftell function.
-****************************************************************************/
-long ftell(
- FILE *f)
-{
- return f->offset;
-}
-
-/****************************************************************************
-REMARKS:
-NT driver implementation of the ANSI C feof function.
-****************************************************************************/
-int feof(
- FILE *f)
-{
- return (f->offset == f->filesize);
-}
-
-/****************************************************************************
-REMARKS:
-NT driver implementation of the ANSI C fgets function.
-****************************************************************************/
-char *fgets(
- char *s,
- int n,
- FILE *f)
-{
- int len;
- char *cs;
-
- /* Read the entire buffer into memory (our functions are unbuffered!) */
- if ((len = fread(s,1,n,f)) == 0)
- return NULL;
-
- /* Search for '\n' or end of string */
- if (n > len)
- n = len;
- cs = s;
- while (--n > 0) {
- if (*cs == '\n')
- break;
- cs++;
- }
- *cs = '\0';
- return s;
-}
-
-/****************************************************************************
-REMARKS:
-NT driver implementation of the ANSI C fputs function.
-****************************************************************************/
-int fputs(
- const char *s,
- FILE *f)
-{
- return fwrite(s,1,strlen(s),f);
-}
-
-/****************************************************************************
-REMARKS:
-NT driver implementation of the ANSI C fclose function.
-****************************************************************************/
-int fclose(
- FILE *f)
-{
- ZwClose((HANDLE)f->handle);
- PM_free(f);
- return 0;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/ntdrv/stdlib.c b/board/MAI/bios_emulator/scitech/src/pm/ntdrv/stdlib.c
deleted file mode 100644
index bbf0cbf4a7..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/ntdrv/stdlib.c
+++ /dev/null
@@ -1,139 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: 32-bit Windows NT driver
-*
-* Description: C library compatible stdlib.h functions for use within a
-* Windows NT driver.
-*
-****************************************************************************/
-
-#include "pmapi.h"
-#include "oshdr.h"
-
-/*------------------------ Main Code Implementation -----------------------*/
-
-/****************************************************************************
-REMARKS:
-PM_malloc override function for Nucleus drivers loaded in NT drivers's.
-****************************************************************************/
-void * malloc(
- size_t size)
-{
- return PM_mallocShared(size);
-}
-
-/****************************************************************************
-REMARKS:
-calloc library function for Nucleus drivers loaded in NT drivers's.
-****************************************************************************/
-void * calloc(
- size_t nelem,
- size_t size)
-{
- void *p = PM_mallocShared(nelem * size);
- if (p)
- memset(p,0,nelem * size);
- return p;
-}
-
-/****************************************************************************
-REMARKS:
-PM_realloc override function for Nucleus drivers loaded in VxD's.
-****************************************************************************/
-void * realloc(
- void *ptr,
- size_t size)
-{
- void *p = PM_mallocShared(size);
- if (p) {
- memcpy(p,ptr,size);
- PM_freeShared(ptr);
- }
- return p;
-}
-
-/****************************************************************************
-REMARKS:
-PM_free override function for Nucleus drivers loaded in VxD's.
-****************************************************************************/
-void free(
- void *p)
-{
- PM_freeShared(p);
-}
-
-/****************************************************************************
-PARAMETERS:
-cstr - C style ANSI string to convert
-
-RETURNS:
-Pointer to the UniCode string structure or NULL on failure to allocate memory
-
-REMARKS:
-Converts a C style string to a UniCode string structure that can be passed
-directly to NT kernel functions.
-****************************************************************************/
-UNICODE_STRING *_PM_CStringToUnicodeString(
- const char *cstr)
-{
- int length;
- ANSI_STRING ansiStr;
- UNICODE_STRING *uniStr;
-
- /* Allocate memory for the string structure */
- if ((uniStr = ExAllocatePool(NonPagedPool, sizeof(UNICODE_STRING))) == NULL)
- return NULL;
-
- /* Allocate memory for the wide string itself */
- length = (strlen(cstr) * sizeof(WCHAR)) + sizeof(WCHAR);
- if ((uniStr->Buffer = ExAllocatePool(NonPagedPool, length)) == NULL) {
- ExFreePool(uniStr);
- return NULL;
- }
- RtlZeroMemory(uniStr->Buffer, length);
- uniStr->Length = 0;
- uniStr->MaximumLength = (USHORT)length;
-
- /* Convert filename string to ansi string and then to UniCode string */
- RtlInitAnsiString(&ansiStr, cstr);
- RtlAnsiStringToUnicodeString(uniStr, &ansiStr, FALSE);
- return uniStr;
-}
-
-/****************************************************************************
-PARAMETERS:
-uniStr - UniCode string structure to free
-
-REMARKS:
-Frees a string allocated by the above _PM_CStringToUnicodeString function.
-****************************************************************************/
-void _PM_FreeUnicodeString(
- UNICODE_STRING *uniStr)
-{
- if (uniStr) {
- ExFreePool(uniStr->Buffer);
- ExFreePool(uniStr);
- }
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/ntdrv/vflat.c b/board/MAI/bios_emulator/scitech/src/pm/ntdrv/vflat.c
deleted file mode 100644
index 901ce1cf03..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/ntdrv/vflat.c
+++ /dev/null
@@ -1,45 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-*
-* Description: Dummy module; no virtual framebuffer for this OS
-*
-****************************************************************************/
-
-#include "pmapi.h"
-
-ibool PMAPI VF_available(void)
-{
- return false;
-}
-
-void * PMAPI VF_init(ulong baseAddr,int bankSize,int codeLen,void *bankFunc)
-{
- return NULL;
-}
-
-void PMAPI VF_exit(void)
-{
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/ntdrv/ztimer.c b/board/MAI/bios_emulator/scitech/src/pm/ntdrv/ztimer.c
deleted file mode 100644
index f4c4bd41b2..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/ntdrv/ztimer.c
+++ /dev/null
@@ -1,123 +0,0 @@
-/****************************************************************************
-*
-* Ultra Long Period Timer
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: 32-bit Windows VxD
-*
-* Description: OS specific implementation for the Zen Timer functions.
-*
-****************************************************************************/
-
-/*---------------------------- Global variables ---------------------------*/
-
-static CPU_largeInteger countFreq;
-static ulong start,finish;
-
-/*----------------------------- Implementation ----------------------------*/
-
-/****************************************************************************
-REMARKS:
-Initialise the Zen Timer module internals.
-****************************************************************************/
-static void __ZTimerInit(void)
-{
- KeQueryPerformanceCounter((LARGE_INTEGER*)&countFreq);
-}
-
-/****************************************************************************
-REMARKS:
-Call the assembler Zen Timer functions to do the timing.
-****************************************************************************/
-static void __LZTimerOn(
- LZTimerObject *tm)
-{
- LARGE_INTEGER lt = KeQueryPerformanceCounter(NULL);
- tm->start.low = lt.LowPart;
- tm->start.high = lt.HighPart;
-}
-
-/****************************************************************************
-REMARKS:
-Call the assembler Zen Timer functions to do the timing.
-****************************************************************************/
-static ulong __LZTimerLap(
- LZTimerObject *tm)
-{
- LARGE_INTEGER tmLap = KeQueryPerformanceCounter(NULL);
- CPU_largeInteger tmCount;
-
- _CPU_diffTime64(&tm->start,(CPU_largeInteger*)&tmLap,&tmCount);
- return _CPU_calcMicroSec(&tmCount,countFreq.low);
-}
-
-/****************************************************************************
-REMARKS:
-Call the assembler Zen Timer functions to do the timing.
-****************************************************************************/
-static void __LZTimerOff(
- LZTimerObject *tm)
-{
- LARGE_INTEGER lt = KeQueryPerformanceCounter(NULL);
- tm->end.low = lt.LowPart;
- tm->end.high = lt.HighPart;
-}
-
-/****************************************************************************
-REMARKS:
-Call the assembler Zen Timer functions to do the timing.
-****************************************************************************/
-static ulong __LZTimerCount(
- LZTimerObject *tm)
-{
- CPU_largeInteger tmCount;
-
- _CPU_diffTime64(&tm->start,&tm->end,&tmCount);
- return _CPU_calcMicroSec(&tmCount,countFreq.low);
-}
-
-/****************************************************************************
-REMARKS:
-Define the resolution of the long period timer as microseconds per timer tick.
-****************************************************************************/
-#define ULZTIMER_RESOLUTION 1
-
-/****************************************************************************
-REMARKS:
-Read the Long Period timer value from the BIOS timer tick.
-****************************************************************************/
-static ulong __ULZReadTime(void)
-{
- LARGE_INTEGER count;
- KeQuerySystemTime(&count);
- return (ulong)(*((_int64*)&count) / 10);
-}
-
-/****************************************************************************
-REMARKS:
-Compute the elapsed time from the BIOS timer tick. Note that we check to see
-whether a midnight boundary has passed, and if so adjust the finish time to
-account for this. We cannot detect if more that one midnight boundary has
-passed, so if this happens we will be generating erronous results.
-****************************************************************************/
-ulong __ULZElapsedTime(ulong start,ulong finish)
-{ return finish - start; }
diff --git a/board/MAI/bios_emulator/scitech/src/pm/os2/_pmos2.asm b/board/MAI/bios_emulator/scitech/src/pm/os2/_pmos2.asm
deleted file mode 100644
index 761f0f42e1..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/os2/_pmos2.asm
+++ /dev/null
@@ -1,180 +0,0 @@
-;****************************************************************************
-;*
-;* SciTech OS Portability Manager Library
-;*
-;* ========================================================================
-;*
-;* The contents of this file are subject to the SciTech MGL Public
-;* License Version 1.0 (the "License"); you may not use this file
-;* except in compliance with the License. You may obtain a copy of
-;* the License at http://www.scitechsoft.com/mgl-license.txt
-;*
-;* Software distributed under the License is distributed on an
-;* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-;* implied. See the License for the specific language governing
-;* rights and limitations under the License.
-;*
-;* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-;*
-;* The Initial Developer of the Original Code is SciTech Software, Inc.
-;* All Rights Reserved.
-;*
-;* ========================================================================
-;*
-;* Language: 80386 Assembler, TASM 4.0 or NASM
-;* Environment: OS/2 32 bit protected mode
-;*
-;* Description: Low level assembly support for the PM library specific
-;* to OS/2
-;*
-;****************************************************************************
-
- IDEAL
-
-include "scitech.mac" ; Memory model macros
-
-header _pmos2 ; Set up memory model
-
-begdataseg _pmos2
-
- cglobal _PM_ioentry
- cglobal _PM_gdt
-_PM_ioentry dd 0 ; Offset to call gate
-_PM_gdt dw 0 ; Selector to call gate
-
-enddataseg _pmos2
-
-begcodeseg _pmos2 ; Start of code segment
-
-;----------------------------------------------------------------------------
-; int PM_setIOPL(int iopl)
-;----------------------------------------------------------------------------
-; Change the IOPL level for the 32-bit task. Returns the previous level
-; so it can be restored for the task correctly.
-;----------------------------------------------------------------------------
-cprocstart PM_setIOPL
-
- ARG iopl:UINT
-
- enter_c
- pushfd ; Save the old EFLAGS for later
- mov ecx,[iopl] ; ECX := IOPL level
- xor ebx,ebx ; Change IOPL level function code (0)
-ifdef USE_NASM
- call far dword [_PM_ioentry]
-else
- call [FWORD _PM_ioentry]
-endif
- pop eax
- and eax,0011000000000000b
- shr eax,12
- leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void _PM_setGDTSelLimit(ushort selector, ulong limit);
-;----------------------------------------------------------------------------
-; Change the GDT selector limit to given value. Used to change selector
-; limits to address the entire system address space.
-;----------------------------------------------------------------------------
-cprocstart _PM_setGDTSelLimit
-
- ARG selector:USHORT, limit:UINT
-
- enter_c
- sub esp,20 ; Make room for selector data on stack
- mov ecx,esp ; ECX := selector data structure
- mov bx,[selector] ; Fill out the data structure
- and bx,0FFF8h ; Kick out the LDT/GDT and DPL bits
- mov [WORD ecx],bx
- mov ebx,[limit]
- mov [DWORD ecx+4],ebx
- mov ebx,5 ; Set GDT selector limit function code
-ifdef USE_NASM
- call far dword [_PM_ioentry]
-else
- call [FWORD _PM_ioentry]
-endif
- add esp,20
- leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; uchar _MTRR_getCx86(uchar reg);
-;----------------------------------------------------------------------------
-; Read a Cyrix CPU indexed register
-;----------------------------------------------------------------------------
-cprocstart _MTRR_getCx86
-
- ARG reg:UCHAR
-
- enter_c
- mov al,[reg]
- out 22h,al
- in al,23h
- leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; uchar _MTRR_setCx86(uchar reg,uchar val);
-;----------------------------------------------------------------------------
-; Write a Cyrix CPU indexed register
-;----------------------------------------------------------------------------
-cprocstart _MTRR_setCx86
-
- ARG reg:UCHAR, val:UCHAR
-
- enter_c
- mov al,[reg]
- out 22h,al
- mov al,[val]
- out 23h,al
- leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; ulong _MTRR_disableInt(void);
-;----------------------------------------------------------------------------
-; Return processor interrupt status and disable interrupts.
-;----------------------------------------------------------------------------
-cprocstart _MTRR_disableInt
-
-; Do nothing!
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void _MTRR_restoreInt(ulong ps);
-;----------------------------------------------------------------------------
-; Restore processor interrupt status.
-;----------------------------------------------------------------------------
-cprocstart _MTRR_restoreInt
-
-; Do nothing!
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void DebugInt(void)
-;----------------------------------------------------------------------------
-cprocstart DebugInt
-
- int 3
- ret
-
-cprocend
-
-endcodeseg _pmos2
-
- END ; End of module
-
diff --git a/board/MAI/bios_emulator/scitech/src/pm/os2/cpuinfo.c b/board/MAI/bios_emulator/scitech/src/pm/os2/cpuinfo.c
deleted file mode 100644
index 7de400d067..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/os2/cpuinfo.c
+++ /dev/null
@@ -1,66 +0,0 @@
-/****************************************************************************
-*
-* Ultra Long Period Timer
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: OS/2
-*
-* Description: OS/2 specific code for the CPU detection module.
-*
-****************************************************************************/
-
-/*----------------------------- Implementation ----------------------------*/
-
-/****************************************************************************
-REMARKS:
-TODO: This should be implemented for OS/2!
-****************************************************************************/
-#define SetMaxThreadPriority() 0
-
-/****************************************************************************
-REMARKS:
-TODO: This should be implemented for OS/2!
-****************************************************************************/
-#define RestoreThreadPriority(i)
-
-/****************************************************************************
-REMARKS:
-Initialise the counter and return the frequency of the counter.
-****************************************************************************/
-static void GetCounterFrequency(
- CPU_largeInteger *freq)
-{
- freq->low = 100000;
- freq->high = 0;
-}
-
-/****************************************************************************
-REMARKS:
-Read the counter and return the counter value.
-****************************************************************************/
-#define GetCounter(t) \
-{ \
- ULONG count; \
- DosQuerySysInfo( QSV_MS_COUNT, QSV_MS_COUNT, &count, sizeof(ULONG) ); \
- (t)->low = count * 100; \
- (t)->high = 0; \
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/os2/event.c b/board/MAI/bios_emulator/scitech/src/pm/os2/event.c
deleted file mode 100644
index 91cc19b915..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/os2/event.c
+++ /dev/null
@@ -1,565 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: IBM PC (OS/2)
-*
-* Description: OS/2 implementation for the SciTech cross platform
-* event library.
-*
-****************************************************************************/
-
-/*---------------------------- Global Variables ---------------------------*/
-
-/* Define generous keyboard monitor circular buffer size to minimize
- * the danger of losing keystrokes
- */
-#define KEYBUFSIZE (EVENTQSIZE + 10)
-
-static int oldMouseState; /* Old mouse state */
-static ulong oldKeyMessage; /* Old keyboard state */
-static ushort keyUpMsg[256] = {0}; /* Table of key up messages */
-static int rangeX,rangeY; /* Range of mouse coordinates */
-HMOU _EVT_hMouse; /* Handle to the mouse driver */
-HMONITOR _EVT_hKbdMon; /* Handle to the keyboard driver */
-TID kbdMonTID = 0; /* Keyboard monitor thread ID */
-HEV hevStart; /* Start event semaphore handle */
-BOOL bMonRunning; /* Flag set if monitor thread OK */
-HMTX hmtxKeyBuf; /* Mutex protecting key buffer */
-KEYPACKET keyMonPkts[KEYBUFSIZE]; /* Array of monitor key packets */
-int kpHead = 0; /* Key packet buffer head */
-int kpTail = 0; /* Key packet buffer tail */
-
-/*---------------------------- Implementation -----------------------------*/
-
-/* These are not used under OS/2 */
-#define _EVT_disableInt() 1
-#define _EVT_restoreInt(flags)
-
-/****************************************************************************
-PARAMETERS:
-scanCode - Scan code to test
-
-REMARKS:
-This macro determines if a specified key is currently down at the
-time that the call is made.
-****************************************************************************/
-#define _EVT_isKeyDown(scanCode) (keyUpMsg[scanCode] != 0)
-
-/****************************************************************************
-REMARKS:
-This function is used to return the number of ticks since system
-startup in milliseconds. This should be the same value that is placed into
-the time stamp fields of events, and is used to implement auto mouse down
-events.
-****************************************************************************/
-ulong _EVT_getTicks(void)
-{
- ULONG count;
- DosQuerySysInfo( QSV_MS_COUNT, QSV_MS_COUNT, &count, sizeof(ULONG) );
- return count;
-}
-
-/****************************************************************************
-REMARKS:
-Converts a mickey movement value to a pixel adjustment value.
-****************************************************************************/
-static int MickeyToPixel(
- int mickey)
-{
- /* TODO: We can add some code in here to handle 'acceleration' for */
- /* the mouse cursor. For now just use the mickeys. */
- return mickey;
-}
-
-/* Some useful defines any typedefs used in the keyboard handling */
-#define KEY_RELEASE 0x40
-
-/****************************************************************************
-REMARKS:
-Pumps all messages in the message queue from OS/2 into our event queue.
-****************************************************************************/
-static void _EVT_pumpMessages(void)
-{
- KBDINFO keyInfo; /* Must not cross a 64K boundary */
- KBDKEYINFO key; /* Must not cross a 64K boundary */
- MOUQUEINFO mqueue; /* Must not cross a 64K boundary */
- MOUEVENTINFO mouse; /* Must not cross a 64K boundary */
- ushort mWait; /* Must not cross a 64K boundary */
- KEYPACKET kp; /* Must not cross a 64K boundary */
- event_t evt;
- int scan;
- ibool noInput = TRUE; /* Flag to determine if any input was available */
-
- /* First of all, check if we should do any session switch work */
- __PM_checkConsoleSwitch();
-
- /* Pump all keyboard messages from our circular buffer */
- for (;;) {
- /* Check that the monitor thread is still running */
- if (!bMonRunning)
- PM_fatalError("Keyboard monitor thread died!");
-
- /* Protect keypacket buffer with mutex */
- DosRequestMutexSem(hmtxKeyBuf, SEM_INDEFINITE_WAIT);
- if (kpHead == kpTail) {
- DosReleaseMutexSem(hmtxKeyBuf);
- break;
- }
-
- noInput = FALSE;
-
- /* Read packet from circular buffer and remove it */
- memcpy(&kp, &keyMonPkts[kpTail], sizeof(KEYPACKET));
- if (++kpTail == KEYBUFSIZE)
- kpTail = 0;
- DosReleaseMutexSem(hmtxKeyBuf);
-
- /* Compensate for the 0xE0 character */
- if (kp.XlatedScan && kp.XlatedChar == 0xE0)
- kp.XlatedChar = 0;
-
- /* Determine type of keyboard event */
- memset(&evt,0,sizeof(evt));
- if (kp.KbdDDFlagWord & KEY_RELEASE)
- evt.what = EVT_KEYUP;
- else
- evt.what = EVT_KEYDOWN;
-
- /* Convert keyboard codes */
- scan = kp.MonFlagWord >> 8;
- if (evt.what == EVT_KEYUP) {
- /* Get message for keyup code from table of cached down values */
- evt.message = keyUpMsg[scan];
- keyUpMsg[scan] = 0;
- oldKeyMessage = -1;
- }
- else {
- evt.message = ((ulong)scan << 8) | kp.XlatedChar;
- if (evt.message == keyUpMsg[scan]) {
- evt.what = EVT_KEYREPEAT;
- evt.message |= 0x10000;
- }
- oldKeyMessage = evt.message & 0x0FFFF;
- keyUpMsg[scan] = (ushort)evt.message;
- }
-
- /* Convert shift state modifiers */
- if (kp.u.ShiftState & 0x0001)
- evt.modifiers |= EVT_RIGHTSHIFT;
- if (kp.u.ShiftState & 0x0002)
- evt.modifiers |= EVT_LEFTSHIFT;
- if (kp.u.ShiftState & 0x0100)
- evt.modifiers |= EVT_LEFTCTRL;
- if (kp.u.ShiftState & 0x0200)
- evt.modifiers |= EVT_LEFTALT;
- if (kp.u.ShiftState & 0x0400)
- evt.modifiers |= EVT_RIGHTCTRL;
- if (kp.u.ShiftState & 0x0800)
- evt.modifiers |= EVT_RIGHTALT;
- EVT.oldMove = -1;
-
- /* Add time stamp and add the event to the queue */
- evt.when = key.time;
- if (EVT.count < EVENTQSIZE)
- addEvent(&evt);
- }
-
- /* Don't just flush because that terminally confuses the monitor */
- do {
- KbdCharIn(&key, IO_NOWAIT, 0);
- } while (key.fbStatus & KBDTRF_FINAL_CHAR_IN);
-
- /* Pump all mouse messages */
- KbdGetStatus(&keyInfo,0);
- /* Check return code - mouse may not be operational!! */
- if (MouGetNumQueEl(&mqueue,_EVT_hMouse) == NO_ERROR) {
- while (mqueue.cEvents) {
- while (mqueue.cEvents--) {
- memset(&evt,0,sizeof(evt));
- mWait = MOU_NOWAIT;
- MouReadEventQue(&mouse,&mWait,_EVT_hMouse);
-
- /* Update the mouse position. We get the mouse coordinates
- * in mickeys so we have to translate these into pixels and
- * move our mouse position. If we don't do this, OS/2 gives
- * us the coordinates in character positions since it still
- * thinks we are in text mode!
- */
- EVT.mx += MickeyToPixel(mouse.col);
- EVT.my += MickeyToPixel(mouse.row);
- if (EVT.mx < 0) EVT.mx = 0;
- if (EVT.my < 0) EVT.my = 0;
- if (EVT.mx > rangeX) EVT.mx = rangeX;
- if (EVT.my > rangeY) EVT.my = rangeY;
- evt.where_x = EVT.mx;
- evt.where_y = EVT.my;
- evt.relative_x = mouse.col;
- evt.relative_y = mouse.row;
- evt.when = key.time;
- if (mouse.fs & (MOUSE_BN1_DOWN | MOUSE_MOTION_WITH_BN1_DOWN))
- evt.modifiers |= EVT_LEFTBUT;
- if (mouse.fs & (MOUSE_BN2_DOWN | MOUSE_MOTION_WITH_BN2_DOWN))
- evt.modifiers |= EVT_RIGHTBUT;
- if (mouse.fs & (MOUSE_BN3_DOWN | MOUSE_MOTION_WITH_BN3_DOWN))
- evt.modifiers |= EVT_MIDDLEBUT;
- if (keyInfo.fsState & 0x0001)
- evt.modifiers |= EVT_RIGHTSHIFT;
- if (keyInfo.fsState & 0x0002)
- evt.modifiers |= EVT_LEFTSHIFT;
- if (keyInfo.fsState & 0x0100)
- evt.modifiers |= EVT_LEFTCTRL;
- if (keyInfo.fsState & 0x0200)
- evt.modifiers |= EVT_LEFTALT;
- if (keyInfo.fsState & 0x0400)
- evt.modifiers |= EVT_RIGHTCTRL;
- if (keyInfo.fsState & 0x0800)
- evt.modifiers |= EVT_RIGHTALT;
-
- /* Check for left mouse click events */
- /* 0x06 == (MOUSE_BN1_DOWN | MOUSE_MOTION_WITH_BN1_DOWN) */
- if (((mouse.fs & 0x0006) && !(oldMouseState & 0x0006))
- || (!(mouse.fs & 0x0006) && (oldMouseState & 0x0006))) {
- if (mouse.fs & 0x0006)
- evt.what = EVT_MOUSEDOWN;
- else
- evt.what = EVT_MOUSEUP;
- evt.message = EVT_LEFTBMASK;
- EVT.oldMove = -1;
- if (EVT.count < EVENTQSIZE)
- addEvent(&evt);
- }
-
- /* Check for right mouse click events */
- /* 0x0018 == (MOUSE_BN2_DOWN | MOUSE_MOTION_WITH_BN2_DOWN) */
- if (((mouse.fs & 0x0018) && !(oldMouseState & 0x0018))
- || (!(mouse.fs & 0x0018) && (oldMouseState & 0x0018))) {
- if (mouse.fs & 0x0018)
- evt.what = EVT_MOUSEDOWN;
- else
- evt.what = EVT_MOUSEUP;
- evt.message = EVT_RIGHTBMASK;
- EVT.oldMove = -1;
- if (EVT.count < EVENTQSIZE)
- addEvent(&evt);
- }
-
- /* Check for middle mouse click events */
- /* 0x0060 == (MOUSE_BN3_DOWN | MOUSE_MOTION_WITH_BN3_DOWN) */
- if (((mouse.fs & 0x0060) && !(oldMouseState & 0x0060))
- || (!(mouse.fs & 0x0060) && (oldMouseState & 0x0060))) {
- if (mouse.fs & 0x0060)
- evt.what = EVT_MOUSEDOWN;
- else
- evt.what = EVT_MOUSEUP;
- evt.message = EVT_MIDDLEBMASK;
- EVT.oldMove = -1;
- if (EVT.count < EVENTQSIZE)
- addEvent(&evt);
- }
-
- /* Check for mouse movement event */
- if (mouse.fs & 0x002B) {
- evt.what = EVT_MOUSEMOVE;
- if (EVT.oldMove != -1) {
- EVT.evtq[EVT.oldMove].where_x = evt.where_x;/* Modify existing one */
- EVT.evtq[EVT.oldMove].where_y = evt.where_y;
- }
- else {
- EVT.oldMove = EVT.freeHead; /* Save id of this move event */
- if (EVT.count < EVENTQSIZE)
- addEvent(&evt);
- }
- }
-
- /* Save current mouse state */
- oldMouseState = mouse.fs;
- }
- MouGetNumQueEl(&mqueue,_EVT_hMouse);
- }
- noInput = FALSE;
- }
-
- /* If there was no input available, give up the current timeslice
- * Note: DosSleep(0) will effectively do nothing if no other thread is ready. Hence
- * DosSleep(0) will still use 100% CPU _but_ should not interfere with other programs.
- */
- if (noInput)
- DosSleep(0);
-}
-
-/****************************************************************************
-REMARKS:
-This macro/function is used to converts the scan codes reported by the
-keyboard to our event libraries normalised format. We only have one scan
-code for the 'A' key, and use shift modifiers to determine if it is a
-Ctrl-F1, Alt-F1 etc. The raw scan codes from the keyboard work this way,
-but the OS gives us 'cooked' scan codes, we have to translate them back
-to the raw format.
-****************************************************************************/
-#define _EVT_maskKeyCode(evt)
-
-/****************************************************************************
-REMARKS:
-Keyboard monitor thread. Needed to catch both keyup and keydown events.
-****************************************************************************/
-static void _kbdMonThread(
- void *params)
-{
- APIRET rc;
- KEYPACKET kp;
- USHORT count = sizeof(KEYPACKET);
- MONBUF monInbuf;
- MONBUF monOutbuf;
- int kpNew;
-
- /* Raise thread priority for higher responsiveness */
- DosSetPriority(PRTYS_THREAD, PRTYC_TIMECRITICAL, 0, 0);
- monInbuf.cb = sizeof(monInbuf) - sizeof(monInbuf.cb);
- monOutbuf.cb = sizeof(monOutbuf) - sizeof(monOutbuf.cb);
- bMonRunning = FALSE;
-
- /* Register the buffers to be used for monitoring for current session */
- if (DosMonReg(_EVT_hKbdMon, &monInbuf, (ULONG*)&monOutbuf,MONITOR_END, -1)) {
- DosPostEventSem(hevStart); /* unblock the main thread */
- return;
- }
-
- /* Unblock the main thread and tell it we're OK*/
- bMonRunning = TRUE;
- DosPostEventSem(hevStart);
- while (bMonRunning) { /* Start an endless loop */
- /* Read data from keyboard driver */
- rc = DosMonRead((PBYTE)&monInbuf, IO_WAIT, (PBYTE)&kp, (PUSHORT)&count);
- if (rc) {
-#ifdef CHECKED
- if (bMonRunning)
- printf("Error in DosMonRead, rc = %ld\n", rc);
-#endif
- bMonRunning = FALSE;
- return;
- }
-
- /* Pass FLUSH packets immediately */
- if (kp.MonFlagWord & 4) {
-#ifdef CHECKED
- printf("Flush packet!\n");
-#endif
- DosMonWrite((PBYTE)&monOutbuf, (PBYTE)&kp, count);
- continue;
- }
-
- /*TODO: to be removed */
- /* Skip extended scancodes & some others */
- if (((kp.MonFlagWord >> 8) == 0xE0) || ((kp.KbdDDFlagWord & 0x0F) == 0x0F)) {
- DosMonWrite((PBYTE)&monOutbuf, (PBYTE)&kp, count);
- continue;
- }
-
-/* printf("RawScan = %X, XlatedScan = %X, fbStatus = %X, KbdDDFlags = %X\n", */
-/* kp.MonFlagWord >> 8, kp.XlatedScan, kp.u.ShiftState, kp.KbdDDFlagWord); */
-
- /* Protect access to buffer with mutex semaphore */
- rc = DosRequestMutexSem(hmtxKeyBuf, 1000);
- if (rc) {
-#ifdef CHECKED
- printf("Can't get access to mutex, rc = %ld\n", rc);
-#endif
- bMonRunning = FALSE;
- return;
- }
-
- /* Store packet in circular buffer, drop it if it's full */
- kpNew = kpHead + 1;
- if (kpNew == KEYBUFSIZE)
- kpNew = 0;
- if (kpNew != kpTail) {
- memcpy(&keyMonPkts[kpHead], &kp, sizeof(KEYPACKET));
- /* TODO: fix this! */
- /* Convert break to make code */
- keyMonPkts[kpHead].MonFlagWord &= 0x7FFF;
- kpHead = kpNew;
- }
- DosReleaseMutexSem(hmtxKeyBuf);
-
- /* Finally write the packet */
- rc = DosMonWrite((PBYTE)&monOutbuf, (PBYTE)&kp, count);
- if (rc) {
-#ifdef CHECKED
- if (bMonRunning)
- printf("Error in DosMonWrite, rc = %ld\n", rc);
-#endif
- bMonRunning = FALSE;
- return;
- }
- }
- (void)params;
-}
-
-/****************************************************************************
-REMARKS:
-Safely abort the event module upon catching a fatal error.
-****************************************************************************/
-void _EVT_abort(
- int signal)
-{
- EVT_exit();
- PM_fatalError("Unhandled exception!");
-}
-
-/****************************************************************************
-PARAMETERS:
-mouseMove - Callback function to call wheneve the mouse needs to be moved
-
-REMARKS:
-Initiliase the event handling module. Here we install our mouse handling ISR
-to be called whenever any button's are pressed or released. We also build
-the free list of events in the event queue.
-
-We use handler number 2 of the mouse libraries interrupt handlers for our
-event handling routines.
-****************************************************************************/
-void EVTAPI EVT_init(
- _EVT_mouseMoveHandler mouseMove)
-{
- ushort stat;
-
- /* Initialise the event queue */
- PM_init();
- EVT.mouseMove = mouseMove;
- initEventQueue();
- oldMouseState = 0;
- oldKeyMessage = 0;
- memset(keyUpMsg,0,sizeof(keyUpMsg));
-
- /* Open the mouse driver, and set it up to report events in mickeys */
- MouOpen(NULL,&_EVT_hMouse);
- stat = 0x7F;
- MouSetEventMask(&stat,_EVT_hMouse);
- stat = (MOU_NODRAW | MOU_MICKEYS) << 8;
- MouSetDevStatus(&stat,_EVT_hMouse);
-
- /* Open the keyboard monitor */
- if (DosMonOpen((PSZ)"KBD$", &_EVT_hKbdMon))
- PM_fatalError("Unable to open keyboard monitor!");
-
- /* Create event semaphore, the monitor will post it when it's initalized */
- if (DosCreateEventSem(NULL, &hevStart, 0, FALSE))
- PM_fatalError("Unable to create event semaphore!");
-
- /* Create mutex semaphore protecting the keypacket buffer */
- if (DosCreateMutexSem(NULL, &hmtxKeyBuf, 0, FALSE))
- PM_fatalError("Unable to create mutex semaphore!");
-
- /* Start keyboard monitor thread, use 32K stack */
- kbdMonTID = _beginthread(_kbdMonThread, NULL, 0x8000, NULL);
-
- /* Now block until the monitor thread is up and running */
- /* Give the thread one second */
- DosWaitEventSem(hevStart, 1000);
- if (!bMonRunning) { /* Check the thread is OK */
- DosMonClose(_EVT_hKbdMon);
- PM_fatalError("Keyboard monitor thread didn't initialize!");
- }
-
- /* Catch program termination signals so we can clean up properly */
- signal(SIGABRT, _EVT_abort);
- signal(SIGFPE, _EVT_abort);
- signal(SIGINT, _EVT_abort);
-}
-
-/****************************************************************************
-REMARKS
-Changes the range of coordinates returned by the mouse functions to the
-specified range of values. This is used when changing between graphics
-modes set the range of mouse coordinates for the new display mode.
-****************************************************************************/
-void EVTAPI EVT_setMouseRange(
- int xRes,
- int yRes)
-{
- rangeX = xRes;
- rangeY = yRes;
-}
-
-/****************************************************************************
-REMARKS
-Modifes the mouse coordinates as necessary if scaling to OS coordinates,
-and sets the OS mouse cursor position.
-****************************************************************************/
-#define _EVT_setMousePos(x,y)
-
-/****************************************************************************
-REMARKS:
-Initiailises the internal event handling modules. The EVT_suspend function
-can be called to suspend event handling (such as when shelling out to DOS),
-and this function can be used to resume it again later.
-****************************************************************************/
-void EVT_resume(void)
-{
- /* Do nothing for OS/2 */
-}
-
-/****************************************************************************
-REMARKS
-Suspends all of our event handling operations. This is also used to
-de-install the event handling code.
-****************************************************************************/
-void EVT_suspend(void)
-{
- /* Do nothing for OS/2 */
-}
-
-/****************************************************************************
-REMARKS
-Exits the event module for program terminatation.
-****************************************************************************/
-void EVT_exit(void)
-{
- APIRET rc;
-
- /* Restore signal handlers */
- signal(SIGABRT, SIG_DFL);
- signal(SIGFPE, SIG_DFL);
- signal(SIGINT, SIG_DFL);
-
- /* Close the mouse driver */
- MouClose(_EVT_hMouse);
-
- /* Stop the keyboard monitor thread and close the monitor */
- bMonRunning = FALSE;
- rc = DosKillThread(kbdMonTID);
-#ifdef CHECKED
- if (rc)
- printf("DosKillThread failed, rc = %ld\n", rc);
-#endif
- rc = DosMonClose(_EVT_hKbdMon);
-#ifdef CHECKED
- if (rc) {
- printf("DosMonClose failed, rc = %ld\n", rc);
- }
-#endif
- DosCloseEventSem(hevStart);
- DosCloseMutexSem(hmtxKeyBuf);
- KbdFlushBuffer(0);
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/os2/mon.h b/board/MAI/bios_emulator/scitech/src/pm/os2/mon.h
deleted file mode 100644
index 28d39fba4b..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/os2/mon.h
+++ /dev/null
@@ -1,165 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: 32-bit OS/2
-*
-* Description: Include file to include all OS/2 keyboard monitor stuff.
-*
-****************************************************************************/
-
-/* Monitors stuff */
-
-#define MONITOR_DEFAULT 0x0000
-#define MONITOR_BEGIN 1
-#define MONITOR_END 2
-
-typedef SHANDLE HMONITOR;
-typedef HMONITOR *PHMONITOR;
-
-typedef struct _KEYPACKET {
- USHORT MonFlagWord;
- UCHAR XlatedChar;
- UCHAR XlatedScan;
- UCHAR DBCSStatus;
- UCHAR DBCSShift;
-
- union
- {
- USHORT ShiftState;
- USHORT LayerIndex;
- } u;
-
- ULONG Milliseconds;
- USHORT KbdDDFlagWord;
-} KEYPACKET;
-
-typedef struct _MLNPACKET {
- USHORT MonFlagWord;
- USHORT IOCTL;
- USHORT CPId;
- USHORT CPIndex;
- ULONG Reserved;
- USHORT KbdDDFlagWord;
-} MLNPACKET;
-
-/* DBCSStatus */
-
-#define SF_SHIFTS 1 /* If set to 1, shift status returned without a character */
-#define SF_NOTCHAR 2 /* 0 - Scan code is a character */
- /* 1 - Scan code is not a character; */
- /* instead it is an extended key code from the keyboard. */
-#define SF_IMMEDIATE 32 /* If set to 1, immediate conversion requested */
-#define SF_TYPEMASK 192 /* Has the following values: */
- /* 00 - Undefined */
- /* 01 - Final character; interim character flag is turned off */
- /* 10 - Interim character */
- /* 11 - Final character; interim character flag is turned on. */
-/* MonFlagWord */
-
-#define MF_OPEN 1 /* open */
-#define MF_CLOSE 2 /* close */
-#define MF_FLUSH 4 /* is flush packet */
-
-/* KbdDDFlagWord */
-
-#define KF_NOTSQPACKET 1024 /* Don't put this packet in SQ buffer */
-#define KF_ACCENTEDKEY 512 /* Key was translated using previous accent. */
-#define KF_MULTIMAKE 256 /* Key was repeated make of a toggle key. */
-#define KF_SECONDARYKEY 128 /* Previous scan code was the E0 prefix code. */
-#define KF_KEYBREAK 64 /* This is the break of the key. */
-#define KF_KEYTYPEMASK 63 /* Isolates the Key Type field of DDFlags. */
-#define KF_UNDEFKEY 63 /* Key packet is undefined */
-#define KF_SYSREQKEY 23 /* This key packet is the SysReq key (4990) */
-#define KF_PRINTFLUSHKEY 22 /* This packet is Ct-Alt-PrtScr */
-#define KF_PSPRINTECHOKEY 21 /* This packet is Ctl-P */
-#define KF_PRINTECHOKEY 20 /* This packet is Ctl-PrtScr */
-#define KF_PRTSCRKEY 19 /* This packet is PrtScr */
-#define KF_PSBREAKKEY 18 /* This packet is Ctl-C */
-#define KF_BREAKKEY 17 /* This packet is Ctl-Break */
-#define KF_ACCENTKEY 16 /* This packet is an accent key */
-#define KF_XRORPNOT 13 /* This packet is a Read or Peek Notification Pct. */
-#define KF_MLNOTIFICATION 14 /* packet is a Multi-Layer NLS packet */
-#define KF_HOTKEYPACKET 12 /* This packet is the hot key. */
-#define KF_BADKEYCOMBO 11 /* Accent/char combo undefined, beep only. */
-#define KF_WAKEUPKEY 10 /* This packet is one following PAUSEKEY */
-#define KF_PSPAUSEKEY 9 /* This packet is Ctl-S */
-#define KF_PAUSEKEY 8 /* This packet is Ctl-Numlock or PAUSE */
-#define KF_SHIFTMASK 7 /* Key is a shift Key */
-#define KF_DUMPKEY 6 /* This packet is Ctl-Numlock-NumLock */
-#define KF_REBOOTKEY 5 /* This packet is Ctl-Alt-Del */
-#define KF_RESENDCODE 4 /* This packet is resend code from controller */
-#define KF_OVERRUNCODE 3 /* This packet is overrun code from controller */
-#define KF_SECPREFIXCODE 2 /* This packet is E0/E1 scan code */
-#define KF_ACKCODE 1 /* This packet is ack code from keyboard */
-
-
-typedef struct _MONBUF {
- USHORT cb;
- KEYPACKET Buffer;
- BYTE Reserved[20];
-} MONBUF;
-
-#define RS_SYSREG 32768 /* Bit 15 SysReq key down */
-#define RS_CAPSLOCK 16384 /* Bit 14 Caps Lock key down */
-#define RS_NUMLOCK 8192 /* Bit 13 NumLock key down */
-#define RS_SCROLLLOCK 4096 /* Bit 12 Scroll Lock key down */
-#define RS_RALT 2048 /* Bit 11 Right Alt key down */
-#define RS_RCONTROL 1024 /* Bit 10 Right Ctrl key down */
-#define RS_LALT 512 /* Bit 9 Left Alt key down */
-#define RS_LCONTROL 256 /* Bit 8 Left Ctrl key down */
-#define RS_INSERT 128 /* Bit 7 Insert on */
-#define RS_CAPS 64 /* Bit 6 Caps Lock on */
-#define RS_NUM 32 /* Bit 5 NumLock on */
-#define RS_SCROLL 16 /* Bit 4 Scroll Lock on */
-#define RS_ALT 8 /* Bit 3 Either Alt key down */
-#define RS_CONTROL 4 /* Bit 2 Either Ctrl key down */
-#define RS_LSHIFT 2 /* Bit 1 Left Shift key down */
-#define RS_RSHIFT 1 /* Bit 0 Right Shift key down */
-
-
-#define CS_RCONTROL 91 /* Right Control */
-#define CS_LSHIFT 42 /* Left Shift */
-#define CS_RSHIFT 54 /* Right Shift */
-#define CS_LALT 56 /* Left Alt */
-#define CS_RALT 94 /* Right Alt */
-
-
-/* DosMon* prototypes */
-#ifdef __EMX__
- #define APIRET16 USHORT
- #define APIENTRY16
-#else
- #define DosMonOpen DOS16MONOPEN
- #define DosMonClose DOS16MONCLOSE
- #define DosMonReg DOS16MONREG
- #define DosMonRead DOS16MONREAD
- #define DosMonWrite DOS16MONWRITE
- #define DosGetInfoSeg DOS16GETINFOSEG
-#endif
-
-APIRET16 APIENTRY16 DosMonOpen (PSZ pszDevName, PHMONITOR phmon);
-APIRET16 APIENTRY16 DosMonClose (HMONITOR hmon);
-APIRET16 APIENTRY16 DosMonReg (HMONITOR hmon, MONBUF *pbInBuf, /*MONBUF*/ULONG *pbOutBuf, USHORT fPosition, USHORT usIndex);
-APIRET16 APIENTRY16 DosMonRead (PBYTE pbInBuf, USHORT fWait, PBYTE pbDataBuf, PUSHORT pcbData);
-APIRET16 APIENTRY16 DosMonWrite (PBYTE pbOutBuf, PBYTE pbDataBuf, USHORT cbData);
diff --git a/board/MAI/bios_emulator/scitech/src/pm/os2/oshdr.h b/board/MAI/bios_emulator/scitech/src/pm/os2/oshdr.h
deleted file mode 100644
index e7aa1c6764..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/os2/oshdr.h
+++ /dev/null
@@ -1,41 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: 32-bit OS/2
-*
-* Description: Include file to include all OS specific header files.
-*
-****************************************************************************/
-
-#define INCL_DOSPROFILE
-#define INCL_DOSERRORS
-#define INCL_DOS
-#define INCL_SUB
-#define INCL_VIO
-#define INCL_KBD
-#include <os2.h>
-#include <process.h>
-#include "os2/mon.h"
-
-void __PM_checkConsoleSwitch(void);
diff --git a/board/MAI/bios_emulator/scitech/src/pm/os2/pm.c b/board/MAI/bios_emulator/scitech/src/pm/os2/pm.c
deleted file mode 100644
index 756eead1dd..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/os2/pm.c
+++ /dev/null
@@ -1,2008 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: 32-bit OS/2
-*
-* Description: Implementation for the OS Portability Manager Library, which
-* contains functions to implement OS specific services in a
-* generic, cross platform API. Porting the OS Portability
-* Manager library is the first step to porting any SciTech
-* products to a new platform.
-*
-****************************************************************************/
-
-#include "pmapi.h"
-#include "drvlib/os/os.h"
-#include "pm_help.h"
-#include "mtrr.h"
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <process.h>
-#ifndef __EMX__
-#include <direct.h>
-#endif
-#define INCL_DOSERRORS
-#define INCL_DOS
-#define INCL_SUB
-#define INCL_VIO
-#define INCL_KBD
-#include <os2.h>
-
-/* Semaphore for communication with our background daemon */
-#define SHAREDSEM ((PSZ)"\\SEM32\\SDD\\DAEMON")
-#define DAEMON_NAME "SDDDAEMN.EXE"
-
-/*--------------------------- Global variables ----------------------------*/
-
-/* Public structures used to communicate with VIDEOPMI for implementing
- * the ability to call the real mode BIOS functions.
- */
-
-typedef struct _VIDEOMODEINFO {
- ULONG miModeId;
- USHORT usType;
- USHORT usInt10ModeSet;
- USHORT usXResolution;
- USHORT usYResolution;
- ULONG ulBufferAddress;
- ULONG ulApertureSize;
- BYTE bBitsPerPixel;
- BYTE bBitPlanes;
- BYTE bXCharSize;
- BYTE bYCharSize;
- USHORT usBytesPerScanLine;
- USHORT usTextRows;
- ULONG ulPageLength;
- ULONG ulSaveSize;
- BYTE bVrtRefresh;
- BYTE bHrtRefresh;
- BYTE bVrtPolPos;
- BYTE bHrtPolPos;
- CHAR bRedMaskSize;
- CHAR bRedFieldPosition;
- CHAR bGreenMaskSize;
- CHAR bGreenFieldPosition;
- CHAR bBlueMaskSize;
- CHAR bBlueFieldPosition;
- CHAR bRsvdMaskSize;
- CHAR bRsvdFieldPosition;
- ULONG ulColors;
- ULONG ulReserved[3];
- } VIDEOMODEINFO, FAR *PVIDEOMODEINFO;
-
-typedef struct _ADAPTERINFO {
- ULONG ulAdapterID;
- CHAR szOEMString[128];
- CHAR szDACString[128];
- CHAR szRevision[128];
- ULONG ulTotalMemory;
- ULONG ulMMIOBaseAddress;
- ULONG ulPIOBaseAddress;
- BYTE bBusType;
- BYTE bEndian;
- USHORT usDeviceBusID;
- USHORT usVendorBusID;
- USHORT SlotID;
- } ADAPTERINFO, FAR *PADAPTERINFO;
-
-typedef struct _VIDEO_ADAPTER {
- void *hvideo;
- ADAPTERINFO Adapter;
- VIDEOMODEINFO ModeInfo;
- } VIDEO_ADAPTER, FAR *PVIDEO_ADAPTER;
-
-/* PMIREQUEST_SOFTWAREINT structures from OS/2 DDK */
-
-typedef struct {
- ULONG ulFlags; /* VDM initialization type */
-#define VDM_POSTLOAD 0x1 /* adapter just loaded, used internally for initialization */
-#define VDM_INITIALIZE 0x2 /* force initialization of a permanently open VDM, even if previously initialized */
-#define VDM_TERMINATE_POSTINITIALIZE 0x6 /*start VDM with initialization, but close it afterwards (includes VDM_INITIALIZE) */
-#define VDM_QUERY_CAPABILITY 0x10 /* query the current int 10 capability */
-#define VDM_FULL_VDM_CREATED 0x20 /* a full VDM is created */
-#define VDM_MINI_VDM_CREATED 0x40 /* a mini VDM is created */
-#define VDM_MINI_VDM_SUPPORTED 0x80 /* mini VDM support is available */
- PCHAR szName; /* VDM initialization program */
- PCHAR szArgs; /* VDM initialization arguments */
- }INITVDM;
-
-typedef struct {
- BYTE bBufferType;
-#define BUFFER_NONE 0
-#define INPUT_BUFFER 1
-#define OUTPUT_BUFFER 2
- BYTE bReserved;
- BYTE bSelCRF;
- BYTE bOffCRF;
- PVOID pAddress;
- ULONG ulSize;
- } BUFFER, *PBUFFER;
-
-typedef struct vcrf_s {
- ULONG reg_eax;
- ULONG reg_ebx;
- ULONG reg_ecx;
- ULONG reg_edx;
- ULONG reg_ebp;
- ULONG reg_esi;
- ULONG reg_edi;
- ULONG reg_ds;
- ULONG reg_es;
- ULONG reg_fs;
- ULONG reg_gs;
- ULONG reg_cs;
- ULONG reg_eip;
- ULONG reg_eflag;
- ULONG reg_ss;
- ULONG reg_esp;
- } VCRF;
-
-typedef struct {
- ULONG ulBIOSIntNo;
- VCRF aCRF;
- BUFFER pB[2];
- } INTCRF;
-
-#define PMIREQUEST_LOADPMIFILE 21
-#define PMIREQUEST_IDENTIFYADAPTER 22
-#define PMIREQUEST_SOFTWAREINT 23
-
-#ifdef PTR_DECL_IN_FRONT
-#define EXPENTRYP * EXPENTRY
-#else
-#define EXPENTRYP EXPENTRY *
-#endif
-
-/* Entry point to VIDEOPMI32Request. This may be overridden by external
- * code that has already loaded VIDEOPMI to avoid loading it twice.
- */
-
-APIRET (EXPENTRYP PM_VIDEOPMI32Request)(PVIDEO_ADAPTER, ULONG, PVOID, PVOID) = NULL;
-static ibool haveInt10 = -1; /* True if we have Int 10 support */
-static ibool useVPMI = true; /* False if VIDEOPMI unavailable */
-static VIDEO_ADAPTER Adapter; /* Video adapter for VIDEOPMI */
-static uchar RMBuf[1024]; /* Fake real mode transfer buffer */
-static uint VESABuf_len = 1024;/* Length of the VESABuf buffer */
-static void *VESABuf_ptr = NULL;/* Near pointer to VESABuf */
-static uint VESABuf_rseg; /* Real mode segment of VESABuf */
-static uint VESABuf_roff; /* Real mode offset of VESABuf */
-static uchar * lowMem = NULL;
-static ibool isSessionSwitching = false;
-static ulong parmsIn[4]; /* Must not cross 64Kb boundary! */
-static ulong parmsOut[4]; /* Must not cross 64Kb boundary! */
-extern ushort _PM_gdt;
-static void (PMAPIP fatalErrorCleanup)(void) = NULL;
-
-/* DosSysCtl prototype. It is not declared in the headers but it is in the
- * standard import libraries (DOSCALLS.876). Funny.
- */
-APIRET APIENTRY DosSysCtl(ULONG ulFunction, PVOID pvData);
-
-/* This is the stack size for the threads that track the session switch event */
-#define SESSION_SWITCH_STACK_SIZE 32768
-
-typedef struct {
- VIOMODEINFO vmi;
- USHORT CursorX;
- USHORT CursorY;
- UCHAR FrameBuffer[1];
- } CONSOLE_SAVE;
-
-typedef struct _SESWITCHREC {
- /* The following variable is volatile because of PM_SUSPEND_APP */
- volatile int Flags; /* -1 or PM_DEACTIVATE or PM_REACTIVATE */
- PM_saveState_cb Callback; /* Save/restore context callback */
- HMTX Mutex; /* Exclusive access mutex */
- HEV Event; /* Posted after callback is called */
- } SESWITCHREC;
-
-/* Page sized block cache */
-
-#define PAGES_PER_BLOCK 32
-#define PAGE_BLOCK_SIZE (PAGES_PER_BLOCK * PM_PAGE_SIZE + (PM_PAGE_SIZE-1) + sizeof(pageblock))
-#define FREELIST_NEXT(p) (*(void**)(p))
-typedef struct pageblock {
- struct pageblock *next;
- struct pageblock *prev;
- void *freeListStart;
- void *freeList;
- void *freeListEnd;
- int freeCount;
- PM_lockHandle lockHandle;
- } pageblock;
-
-static pageblock *pageBlocks = NULL;
-
-/*----------------------------- Implementation ----------------------------*/
-
-/****************************************************************************
-PARAMETERS:
-func - Helper device driver function to call
-
-RETURNS:
-First return value from the device driver in parmsOut[0]
-
-REMARKS:
-Function to open our helper device driver, call it and close the file
-handle. Note that we have to open the device driver for every call because
-of two problems:
-
- 1. We cannot open a single file handle in a DLL that is shared amongst
- programs, since every process must have it's own open file handle.
-
- 2. For some reason there appears to be a limit of about 12 open file
- handles on a device driver in the system. Hence when we open more
- than about 12 file handles things start to go very strange.
-
-Hence we simply open the file handle every time that we need to call the
-device driver to work around these problems.
-****************************************************************************/
-static ulong CallSDDHelp(
- int func)
-{
- static ulong inLen; /* Must not cross 64Kb boundary! */
- static ulong outLen; /* Must not cross 64Kb boundary! */
- HFILE hSDDHelp;
- ULONG rc;
- ulong result;
-
- if ((rc = DosOpen(PMHELP_NAME,&hSDDHelp,&result,0,0,
- FILE_OPEN, OPEN_SHARE_DENYNONE | OPEN_ACCESS_READWRITE,
- NULL)) != 0) {
- if (rc == 4) { /* Did we run out of file handles? */
- ULONG ulNewFHs;
- LONG lAddFHs = 5;
-
- if (DosSetRelMaxFH(&lAddFHs, &ulNewFHs) != 0)
- PM_fatalError("Failed to raise the file handles limit!");
- else {
- if ((rc = DosOpen(PMHELP_NAME,&hSDDHelp,&result,0,0,
- FILE_OPEN, OPEN_SHARE_DENYNONE | OPEN_ACCESS_READWRITE,
- NULL)) != 0) {
- PM_fatalError("Unable to open SDDHELP$ helper device driver! (#2)");
- }
- }
- }
- else
- PM_fatalError("Unable to open SDDHELP$ helper device driver!");
- }
- if (DosDevIOCtl(hSDDHelp,PMHELP_IOCTL,func,
- &parmsIn, inLen = sizeof(parmsIn), &inLen,
- &parmsOut, outLen = sizeof(parmsOut), &outLen) != 0)
- PM_fatalError("Failure calling SDDHELP$ helper device driver!");
- DosClose(hSDDHelp);
- return parmsOut[0];
-}
-
-/****************************************************************************
-REMARKS:
-Determine if we're running on a DBCS system.
-****************************************************************************/
-ibool __IsDBCSSystem(void)
-{
- CHAR achDBCSInfo[12];
- COUNTRYCODE ccStruct = {0, 0};
-
- memset(achDBCSInfo, 0, 12);
-
- /* Get the DBCS vector - if it's not empty, we're on DBCS */
- DosQueryDBCSEnv(sizeof(achDBCSInfo), &ccStruct, achDBCSInfo);
- if (achDBCSInfo[0] != 0)
- return true;
- else
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Determine if PMSHELL is running - if it isn't, we can't use certain calls
-****************************************************************************/
-ibool __isShellLoaded(void)
-{
- PVOID ptr;
-
- if (DosGetNamedSharedMem(&ptr, (PSZ)"\\SHAREMEM\\PMGLOBAL.MEM", PAG_READ) == NO_ERROR) {
- DosFreeMem(ptr);
- return true;
- }
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Initialise the PM library and connect to our helper device driver. If we
-cannot connect to our helper device driver, we bail out with an error
-message.
-****************************************************************************/
-void PMAPI PM_init(void)
-{
- if (!lowMem) {
- /* Obtain the 32->16 callgate from the device driver to enable IOPL */
- if ((_PM_gdt = CallSDDHelp(PMHELP_GETGDT32)) == 0)
- PM_fatalError("Unable to obtain call gate selector!");
-
- PM_setIOPL(3);
-
- /* Map the first Mb of physical memory into lowMem */
- if ((lowMem = PM_mapPhysicalAddr(0,0xFFFFF,true)) == NULL)
- PM_fatalError("Unable to map first Mb physical memory!");
-
- /* Initialise the MTRR interface functions */
- MTRR_init();
- }
-}
-
-/****************************************************************************
-REMARKS:
-Initialise the PM library for BIOS access via VIDEOPMI. This should work
-with any GRADD driver, including SDD/2.
-****************************************************************************/
-static ibool InitInt10(void)
-{
- HMODULE hModGENPMI,hModSDDPMI,hModVideoPMI;
- CHAR buf[80],path[_MAX_PATH];
- HEV hevDaemon = NULLHANDLE;
- RESULTCODES resCodes;
-
- if (haveInt10 == -1) {
- /* Connect to VIDEOPMI and get entry point. Note that we only
- * do this if GENPMI or SDDPMI are already loaded, since we need
- * a GRADD based driver for this to work.
- */
- PM_init();
- haveInt10 = false;
- if (DosQueryModuleHandle((PSZ)"GENPMI.DLL",&hModGENPMI) != 0)
- hModGENPMI = NULLHANDLE;
- if (DosQueryModuleHandle((PSZ)"SDDPMI.DLL",&hModSDDPMI) != 0)
- hModSDDPMI = NULLHANDLE;
- if (hModGENPMI || hModSDDPMI) {
- if (DosLoadModule((PSZ)buf,sizeof(buf),(PSZ)"VIDEOPMI.DLL",&hModVideoPMI) == 0) {
- if (DosQueryProcAddr(hModVideoPMI,0,(PSZ)"VIDEOPMI32Request",(void*)&PM_VIDEOPMI32Request) != 0)
- PM_fatalError("Unable to get VIDEOPMI32Request entry point!");
- strcpy(path,"X:\\OS2\\SVGADATA.PMI");
- path[0] = PM_getBootDrive();
- if (PM_VIDEOPMI32Request(&Adapter,PMIREQUEST_LOADPMIFILE,path,NULL) != 0) {
- DosFreeModule(hModVideoPMI);
- PM_VIDEOPMI32Request = NULL;
- haveInt10 = false;
- }
- else {
- /* Attempt to initialise the full VDM in the system. This will only
- * work if VPRPMI.SYS is loaded, but it provides support for passing
- * values in ES/DS/ESI/EDI between the BIOS which does not work with
- * kernel VDM's in fixpacks earlier than FP15. FP15 and later and
- * the new Warp 4.51 and Warp Server convenience packs should work
- * fine with the kernel mini-VDM.
- *
- * Also the full VDM is the only solution for really old kernels
- * (but GRADD won't run on them so this is superfluous ;-).
- */
- INITVDM InitVDM = {VDM_INITIALIZE,NULL,NULL};
- PM_VIDEOPMI32Request(&Adapter,PMIREQUEST_SOFTWAREINT,&InitVDM,NULL);
- haveInt10 = true;
- }
- }
- }
- else {
- /* A GRADD driver isn't loaded, hence we can't use VIDEOPMI. But we will try
- * to access the mini-VDM directly, first verifying that the support is
- * available in the kernel (it should be for kernels that support GRADD).
- * This may be needed in a command line boot or if non-GRADD driver is
- * used (Matrox or classic VGA).
- * Note: because of problems with mini-VDM support in the kernel, we have to
- * spawn a daemon process that will do the actual mini-VDM access for us.
- */
- /* Try to open shared semaphore to see if our daemon is already up */
- if (DosOpenEventSem(SHAREDSEM, &hevDaemon) == NO_ERROR) {
- if (DosWaitEventSem(hevDaemon, 1) == NO_ERROR) {
- /* If semaphore is posted, all is well */
- useVPMI = false;
- haveInt10 = true;
- }
- }
- else {
- /* Create shared event semaphore */
- if (DosCreateEventSem(SHAREDSEM, &hevDaemon, DC_SEM_SHARED, FALSE) == NO_ERROR) {
- PM_findBPD(DAEMON_NAME, path);
- strcat(path, DAEMON_NAME);
- if (DosExecPgm(buf, sizeof(buf), EXEC_BACKGROUND, (PSZ)DAEMON_NAME,
- NULL, &resCodes, (PSZ)path) == NO_ERROR) {
- /* The daemon was successfully spawned, now give it a sec to come up */
- if (DosWaitEventSem(hevDaemon, 2000) == NO_ERROR) {
- /* It's up! */
- useVPMI = false;
- haveInt10 = true;
- }
- }
- }
- }
- }
- }
- return haveInt10;
-}
-
-/****************************************************************************
-REMARKS:
-We "probably" have BIOS access under OS/2 but we have to verify/initialize it
-first.
-****************************************************************************/
-ibool PMAPI PM_haveBIOSAccess(void)
-{
- return InitInt10();
-}
-
-/****************************************************************************
-REMARKS:
-Return the operating system type identifier.
-****************************************************************************/
-long PMAPI PM_getOSType(void)
-{
- return _OS_OS2;
-}
-
-/****************************************************************************
-REMARKS:
-Return the runtime type identifier.
-****************************************************************************/
-int PMAPI PM_getModeType(void)
-{
- return PM_386;
-}
-
-/****************************************************************************
-REMARKS:
-Add a file directory separator to the end of the filename.
-****************************************************************************/
-void PMAPI PM_backslash(
- char *s)
-{
- uint pos = strlen(s);
- if (s[pos-1] != '\\') {
- s[pos] = '\\';
- s[pos+1] = '\0';
- }
-}
-
-/****************************************************************************
-REMARKS:
-Add a user defined PM_fatalError cleanup function.
-****************************************************************************/
-void PMAPI PM_setFatalErrorCleanup(
- void (PMAPIP cleanup)(void))
-{
- fatalErrorCleanup = cleanup;
-}
-
-/****************************************************************************
-REMARKS:
-Report a fatal error condition and halt the program.
-****************************************************************************/
-void PMAPI PM_fatalError(
- const char *msg)
-{
- /* Be prepare to be called recursively (failed to fail situation :-) */
- static int fatalErrorCount = 0;
- if (fatalErrorCount++ == 0) {
- if (fatalErrorCleanup)
- fatalErrorCleanup();
- }
- fprintf(stderr,"%s\n", msg);
- exit(1);
-}
-
-/****************************************************************************
-REMARKS:
-Allocate the real mode VESA transfer buffer for communicating with the BIOS.
-****************************************************************************/
-void * PMAPI PM_getVESABuf(
- uint *len,
- uint *rseg,
- uint *roff)
-{
- if (!VESABuf_ptr) {
- /* Allocate a global buffer for communicating with the VESA VBE */
- if ((VESABuf_ptr = PM_allocRealSeg(VESABuf_len, &VESABuf_rseg, &VESABuf_roff)) == NULL)
- return NULL;
- }
- *len = VESABuf_len;
- *rseg = VESABuf_rseg;
- *roff = VESABuf_roff;
- return VESABuf_ptr;
-}
-
-/****************************************************************************
-REMARKS:
-Check if a key has been pressed.
-****************************************************************************/
-int PMAPI PM_kbhit(void)
-{
- KBDKEYINFO key; /* Must not cross a 64K boundary */
-
- KbdPeek(&key, 0);
- return (key.fbStatus & KBDTRF_FINAL_CHAR_IN);
-}
-
-/****************************************************************************
-REMARKS:
-Wait for and return the next keypress.
-****************************************************************************/
-int PMAPI PM_getch(void)
-{
- KBDKEYINFO key; /* Must not cross a 64K boundary */
-
- KbdCharIn(&key,IO_WAIT,0);
- return key.chChar;
-}
-
-/****************************************************************************
-REMARKS:
-Open a fullscreen console for output to the screen. This requires that
-the application be a fullscreen VIO program.
-****************************************************************************/
-PM_HWND PMAPI PM_openConsole(
- PM_HWND hwndUser,
- int device,
- int xRes,
- int yRes,
- int bpp,
- ibool fullScreen)
-{
- (void)hwndUser;
- (void)device;
- (void)xRes;
- (void)yRes;
- (void)bpp;
- (void)fullScreen;
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-Find the size of the console state buffer.
-****************************************************************************/
-int PMAPI PM_getConsoleStateSize(void)
-{
- VIOMODEINFO vmi;
- vmi.cb = sizeof (VIOMODEINFO);
- VioGetMode (&vmi, (HVIO)0);
- return sizeof (CONSOLE_SAVE) - 1 + vmi.col * vmi.row * 2;
-}
-
-/****************************************************************************
-REMARKS:
-Save the state of the console.
-****************************************************************************/
-void PMAPI PM_saveConsoleState(
- void *stateBuf,
- PM_HWND hwndConsole)
-{
- USHORT fblen;
- CONSOLE_SAVE *cs = (CONSOLE_SAVE*)stateBuf;
- VIOMODEINFO vmi;
-
- /* The reason for the VIOMODEINFO juggling is 16-bit code. Because the user
- * allocates the state buffer, cd->vmi might be crossing the 64K boundary and
- * the 16-bit API would fail. If we create another copy on stack, the compiler
- * should ensure that the 64K boundary will not be crossed (it adjusts the stack
- * if it should cross).
- */
- vmi.cb = sizeof(VIOMODEINFO);
- VioGetMode(&vmi,(HVIO)0);
- memcpy(&cs->vmi, &vmi, sizeof(VIOMODEINFO));
- VioGetCurPos(&cs->CursorY, &cs->CursorX, (HVIO)0);
- fblen = cs->vmi.col * cs->vmi.row * 2;
- VioReadCellStr((PCH)cs->FrameBuffer, &fblen, 0, 0, (HVIO)0);
-}
-
-/* Global variable to communicate between threads */
-static SESWITCHREC SesSwitchRec = { -1 };
-
-/****************************************************************************
-REMARKS:
-Called by external routines at least once per frame to check whenever a
-session save/restore should be performed. Since we receive such notifications
-asyncronously, we can't perform all required operations at that time.
-****************************************************************************/
-void __PM_checkConsoleSwitch(void)
-{
- int Flags, Mode;
- PM_saveState_cb Callback;
-
- /* Quick optimized path for most common case */
- if (SesSwitchRec.Flags == -1)
- return;
-
-again:
- if (DosRequestMutexSem(SesSwitchRec.Mutex, 100))
- return;
- Flags = SesSwitchRec.Flags;
- Callback = SesSwitchRec.Callback;
- SesSwitchRec.Flags = -1;
- DosReleaseMutexSem(SesSwitchRec.Mutex);
-
- isSessionSwitching = true; /* Prevent VIO calls */
- Mode = Callback(Flags);
- isSessionSwitching = false;
- DosPostEventSem(SesSwitchRec.Event);
- if (Flags == PM_DEACTIVATE && Mode == PM_SUSPEND_APP)
- /* Suspend application until we switch back to our application */
- for (;;) {
- DosSleep (500);
- /* SesSwitchRec.Flags is volatile so optimizer
- * won't load it into a register
- */
- if (SesSwitchRec.Flags != -1)
- goto again;
- }
-}
-
-/****************************************************************************
-REMARKS:
-Waits until main thread processes the session switch event.
-****************************************************************************/
-static void _PM_SessionSwitchEvent(
- PM_saveState_cb saveState,
- int flags)
-{
- ULONG Count;
-
- if (DosRequestMutexSem(SesSwitchRec.Mutex, 10000))
- return;
-
- /* We're going to wait on that semaphore */
- DosResetEventSem(SesSwitchRec.Event, &Count);
- SesSwitchRec.Callback = saveState;
- SesSwitchRec.Flags = flags;
- DosReleaseMutexSem(SesSwitchRec.Mutex);
-
- /* Now wait until all required operations are complete */
- DosWaitEventSem (SesSwitchRec.Event, 10000);
-}
-
-/****************************************************************************
-REMARKS:
-This is the thread responsible for tracking switches back to our
-fullscreen session.
-****************************************************************************/
-static void _PM_ConsoleSwitch(
- PM_saveState_cb saveState)
-{
- USHORT NotifyType;
-
- for (;;) {
- if (VioModeWait(VMWR_POPUP, &NotifyType, 0) != 0)
- break;
- _PM_SessionSwitchEvent(saveState, PM_REACTIVATE);
- }
- VioModeUndo(UNDOI_RELEASEOWNER, UNDOK_ERRORCODE, (HVIO)0);
-}
-
-/****************************************************************************
-REMARKS:
-This is the thread responsible for tracking screen popups (usually fatal
-error handler uses them).
-****************************************************************************/
-static void _PM_ConsolePopup(
- PM_saveState_cb saveState)
-{
- USHORT NotifyType;
- for (;;) {
- if (VioSavRedrawWait(VSRWI_SAVEANDREDRAW, &NotifyType, 0) != 0)
- break;
- if (NotifyType == VSRWN_SAVE)
- _PM_SessionSwitchEvent(saveState, PM_DEACTIVATE);
- else if (NotifyType == VSRWN_REDRAW)
- _PM_SessionSwitchEvent(saveState, PM_REACTIVATE);
- }
- VioSavRedrawUndo(UNDOI_RELEASEOWNER, UNDOK_ERRORCODE, (HVIO)0);
-}
-
-/****************************************************************************
-REMARKS:
-Set the suspend application callback for the fullscreen console.
-****************************************************************************/
-void PMAPI PM_setSuspendAppCallback(
- PM_saveState_cb saveState)
-{
- /* If PM isn't loaded, this stuff will cause crashes! */
- if (__isShellLoaded()) {
- if (saveState) {
- /* Create the threads responsible for tracking console switches */
- SesSwitchRec.Flags = -1;
- DosCreateMutexSem(NULL, &SesSwitchRec.Mutex, 0, FALSE);
- DosCreateEventSem(NULL, &SesSwitchRec.Event, 0, FALSE);
- _beginthread ((void(*)(void*))_PM_ConsoleSwitch,NULL,SESSION_SWITCH_STACK_SIZE, (void*)saveState);
- _beginthread ((void(*)(void*))_PM_ConsolePopup,NULL,SESSION_SWITCH_STACK_SIZE, (void*)saveState);
- }
- else {
- /* Kill the threads responsible for tracking console switches */
- VioModeUndo(UNDOI_RELEASEOWNER, UNDOK_TERMINATE, (HVIO)0);
- VioSavRedrawUndo(UNDOI_RELEASEOWNER, UNDOK_TERMINATE, (HVIO)0);
- DosCloseEventSem(SesSwitchRec.Event);
- DosCloseMutexSem(SesSwitchRec.Mutex);
- }
- }
-}
-
-/****************************************************************************
-REMARKS:
-Restore the console state.
-****************************************************************************/
-void PMAPI PM_restoreConsoleState(
- const void *stateBuf,
- PM_HWND hwndConsole)
-{
- CONSOLE_SAVE *cs = (CONSOLE_SAVE *)stateBuf;
- VIOMODEINFO vmi;
-
- if (!cs)
- return;
-
- memcpy(&vmi, &cs->vmi, sizeof (VIOMODEINFO));
- VioSetMode(&vmi, (HVIO)0);
- VioSetCurPos(cs->CursorY, cs->CursorX, (HVIO)0);
- VioWrtCellStr((PCH)cs->FrameBuffer, cs->vmi.col * cs->vmi.row * 2,0, 0, (HVIO)0);
-}
-
-/****************************************************************************
-REMARKS:
-Close the fullscreen console.
-****************************************************************************/
-void PMAPI PM_closeConsole(
- PM_HWND hwndConsole)
-{
- /* Kill the threads responsible for tracking console switches */
- PM_setSuspendAppCallback(NULL);
- (void)hwndConsole;
-}
-
-/****************************************************************************
-REMARKS:
-Set the location of the OS console cursor.
-****************************************************************************/
-void PM_setOSCursorLocation(
- int x,
- int y)
-{
- /* If session switch is in progress, calling into VIO causes deadlocks! */
- /* Also this call to VIO screws up our console library on DBCS boxes... */
- if (!isSessionSwitching && !__IsDBCSSystem())
- VioSetCurPos(y,x,0);
-}
-
-/****************************************************************************
-REMARKS:
-Set the width of the OS console.
-****************************************************************************/
-void PM_setOSScreenWidth(
- int width,
- int height)
-{
- /* Nothing to do in here */
- (void)width;
- (void)height;
-}
-
-/****************************************************************************
-REMARKS:
-Set the real time clock handler (used for software stereo modes).
-****************************************************************************/
-ibool PMAPI PM_setRealTimeClockHandler(
- PM_intHandler ih,
- int frequency)
-{
- /* TODO: Implement this! */
- (void)ih;
- (void)frequency;
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Set the real time clock frequency (for stereo modes).
-****************************************************************************/
-void PMAPI PM_setRealTimeClockFrequency(
- int frequency)
-{
- /* TODO: Implement this! */
- (void)frequency;
-}
-
-/****************************************************************************
-REMARKS:
-Restore the original real time clock handler.
-****************************************************************************/
-void PMAPI PM_restoreRealTimeClockHandler(void)
-{
- /* TODO: Implement this! */
-}
-
-/****************************************************************************
-REMARKS:
-Return the current operating system path or working directory.
-****************************************************************************/
-char * PMAPI PM_getCurrentPath(
- char *path,
- int maxLen)
-{
- return getcwd(path,maxLen);
-}
-
-/****************************************************************************
-REMARKS:
-Return the drive letter for the boot drive.
-****************************************************************************/
-char PMAPI PM_getBootDrive(void)
-{
- ulong boot = 3;
- DosQuerySysInfo(QSV_BOOT_DRIVE,QSV_BOOT_DRIVE,&boot,sizeof(boot));
- return (char)('a' + boot - 1);
-}
-
-/****************************************************************************
-REMARKS:
-Return the path to the VBE/AF driver files.
-****************************************************************************/
-const char * PMAPI PM_getVBEAFPath(void)
-{
- static char path[CCHMAXPATH];
- strcpy(path,"x:\\");
- path[0] = PM_getBootDrive();
- return path;
-}
-
-/****************************************************************************
-REMARKS:
-Return the path to the Nucleus driver files.
-****************************************************************************/
-const char * PMAPI PM_getNucleusPath(void)
-{
- static char path[CCHMAXPATH];
- if (getenv("NUCLEUS_PATH") != NULL)
- return getenv("NUCLEUS_PATH");
- strcpy(path,"x:\\os2\\drivers");
- path[0] = PM_getBootDrive();
- PM_backslash(path);
- strcat(path,"nucleus");
- return path;
-}
-
-/****************************************************************************
-REMARKS:
-Return the path to the Nucleus configuration files.
-****************************************************************************/
-const char * PMAPI PM_getNucleusConfigPath(void)
-{
- static char path[CCHMAXPATH];
- strcpy(path,PM_getNucleusPath());
- PM_backslash(path);
- strcat(path,"config");
- return path;
-}
-
-/****************************************************************************
-REMARKS:
-Return a unique identifier for the machine if possible.
-****************************************************************************/
-const char * PMAPI PM_getUniqueID(void)
-{
- return PM_getMachineName();
-}
-
-/****************************************************************************
-REMARKS:
-Get the name of the machine on the network.
-****************************************************************************/
-const char * PMAPI PM_getMachineName(void)
-{
- static char name[40],*env;
-
- if ((env = getenv("HOSTNAME")) != NULL) {
- strncpy(name,env,sizeof(name));
- name[sizeof(name)-1] = 0;
- return name;
- }
- return "OS2";
-}
-
-/****************************************************************************
-REMARKS:
-Return a pointer to the real mode BIOS data area.
-****************************************************************************/
-void * PMAPI PM_getBIOSPointer(void)
-{
- PM_init();
- return lowMem + 0x400;
-}
-
-/****************************************************************************
-REMARKS:
-Return a pointer to 0xA0000 physical VGA graphics framebuffer.
-****************************************************************************/
-void * PMAPI PM_getA0000Pointer(void)
-{
- PM_init();
- return lowMem + 0xA0000;
-}
-
-/****************************************************************************
-REMARKS:
-Map a physical address to a linear address in the callers process.
-****************************************************************************/
-void * PMAPI PM_mapPhysicalAddr(
- ulong base,
- ulong limit,
- ibool isCached)
-{
- ulong baseAddr,baseOfs,linear;
-
- /* Round the physical address to a 4Kb boundary and the limit to a
- * 4Kb-1 boundary before passing the values to mmap. If we round the
- * physical address, then we also add an extra offset into the address
- * that we return.
- */
- baseOfs = base & 4095;
- baseAddr = base & ~4095;
- limit = ((limit+baseOfs+1+4095) & ~4095)-1;
- parmsIn[0] = baseAddr;
- parmsIn[1] = limit;
- parmsIn[2] = isCached;
- if ((linear = CallSDDHelp(PMHELP_MAPPHYS)) == 0)
- return NULL;
- return (void*)(linear + baseOfs);
-}
-
-/****************************************************************************
-REMARKS:
-Free a physical address mapping allocated by PM_mapPhysicalAddr.
-****************************************************************************/
-void PMAPI PM_freePhysicalAddr(
- void *ptr,
- ulong limit)
-{
- parmsIn[0] = (ulong)ptr;
- parmsIn[1] = limit;
- CallSDDHelp(PMHELP_FREEPHYS);
-}
-
-/****************************************************************************
-REMARKS:
-Find the physical address of a linear memory address in current process.
-****************************************************************************/
-ulong PMAPI PM_getPhysicalAddr(
- void *p)
-{
- parmsIn[0] = (ulong)p;
- return CallSDDHelp(PMHELP_GETPHYSICALADDR);
-}
-
-/****************************************************************************
-REMARKS:
-Find the physical address of a linear memory address in current process.
-****************************************************************************/
-ibool PMAPI PM_getPhysicalAddrRange(
- void *p,
- ulong length,
- ulong *physAddress)
-{
- parmsIn[0] = (ulong)p;
- parmsIn[1] = (ulong)length;
- parmsIn[2] = (ulong)physAddress;
- return CallSDDHelp(PMHELP_GETPHYSICALADDRRANGE);
-}
-
-/****************************************************************************
-REMARKS:
-Sleep for the specified number of milliseconds.
-****************************************************************************/
-void PMAPI PM_sleep(
- ulong milliseconds)
-{
- DosSleep(milliseconds);
-}
-
-/****************************************************************************
-REMARKS:
-Return the base I/O port for the specified COM port.
-****************************************************************************/
-int PMAPI PM_getCOMPort(
- int port)
-{
- switch (port) {
- case 0: return 0x3F8;
- case 1: return 0x2F8;
- }
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-Return the base I/O port for the specified LPT port.
-****************************************************************************/
-int PMAPI PM_getLPTPort(
- int port)
-{
- switch (port) {
- case 0: return 0x3BC;
- case 1: return 0x378;
- case 2: return 0x278;
- }
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-Allocate a block of shared memory. For Win9x we allocate shared memory
-as locked, global memory that is accessible from any memory context
-(including interrupt time context), which allows us to load our important
-data structure and code such that we can access it directly from a ring
-0 interrupt context.
-****************************************************************************/
-void * PMAPI PM_mallocShared(
- long size)
-{
- parmsIn[0] = size;
- return (void*)CallSDDHelp(PMHELP_MALLOCSHARED);
-}
-
-/****************************************************************************
-REMARKS:
-Free a block of shared memory.
-****************************************************************************/
-void PMAPI PM_freeShared(
- void *ptr)
-{
- parmsIn[0] = (ulong)ptr;
- CallSDDHelp(PMHELP_FREESHARED);
-}
-
-/****************************************************************************
-REMARKS:
-Map a linear memory address to the calling process address space. The
-address will have been allocated in another process using the
-PM_mapPhysicalAddr function.
-****************************************************************************/
-void * PMAPI PM_mapToProcess(
- void *base,
- ulong limit)
-{
- ulong baseAddr,baseOfs;
-
- /* Round the physical address to a 4Kb boundary and the limit to a
- * 4Kb-1 boundary before passing the values to mmap. If we round the
- * physical address, then we also add an extra offset into the address
- * that we return.
- */
- baseOfs = (ulong)base & 4095;
- baseAddr = (ulong)base & ~4095;
- limit = ((limit+baseOfs+1+4095) & ~4095)-1;
- parmsIn[0] = (ulong)baseAddr;
- parmsIn[1] = limit;
- return (void*)(CallSDDHelp(PMHELP_MAPTOPROCESS)+baseOfs);
-}
-
-/****************************************************************************
-REMARKS:
-Map a real mode pointer to a protected mode pointer.
-****************************************************************************/
-void * PMAPI PM_mapRealPointer(
- uint r_seg,
- uint r_off)
-{
- if (r_seg == 0xFFFF)
- return &RMBuf[r_off];
- return lowMem + MK_PHYS(r_seg,r_off);
-}
-
-/****************************************************************************
-REMARKS:
-Allocate a block of real mode memory
-****************************************************************************/
-void * PMAPI PM_allocRealSeg(
- uint size,
- uint *r_seg,
- uint *r_off)
-{
- if (size > sizeof(RMBuf))
- return NULL;
- *r_seg = 0xFFFF;
- *r_off = 0x0000;
- return &RMBuf;
-}
-
-/****************************************************************************
-REMARKS:
-Free a block of real mode memory.
-****************************************************************************/
-void PMAPI PM_freeRealSeg(
- void *mem)
-{
- /* Nothing to do in here */
- (void)mem;
-}
-
-#define INDPMI(reg) rmregs.aCRF.reg_##reg = regs->reg
-#define OUTDPMI(reg) regs->reg = rmregs.aCRF.reg_##reg
-
-#define REG_OFFSET(field) (((ULONG)&(((VCRF*)0)->field)) / sizeof(ULONG))
-
-/****************************************************************************
-REMARKS:
-Issue a real mode interrupt (parameters in DPMI compatible structure)
-****************************************************************************/
-void PMAPI DPMI_int86(
- int intno,
- DPMI_regs *regs)
-{
- INTCRF rmregs;
- ulong eax = 0;
-
- if (!InitInt10())
- return;
- memset(&rmregs, 0, sizeof(rmregs));
- rmregs.ulBIOSIntNo = intno;
- INDPMI(eax); INDPMI(ebx); INDPMI(ecx); INDPMI(edx); INDPMI(esi); INDPMI(edi);
- rmregs.aCRF.reg_ds = regs->ds;
- rmregs.aCRF.reg_es = regs->es;
- if (intno == 0x10) {
- eax = rmregs.aCRF.reg_eax;
- switch (eax & 0xFFFF) {
- case 0x4F00:
- /* We have to hack the way this function works, due to
- * some bugs in the IBM mini-VDM BIOS support. Specifically
- * we need to make the input buffer and output buffer the
- * 'same' buffer, and that ES:SI points to the output
- * buffer (ignored by the BIOS). The data will end up
- * being returned in the input buffer, except for the
- * first four bytes ('VESA') that will not be returned.
- */
- rmregs.pB[0].bBufferType = INPUT_BUFFER;
- rmregs.pB[0].bSelCRF = REG_OFFSET(reg_es);
- rmregs.pB[0].bOffCRF = REG_OFFSET(reg_edi);
- rmregs.pB[0].pAddress = RMBuf;
- rmregs.pB[0].ulSize = 4;
- rmregs.pB[1].bBufferType = OUTPUT_BUFFER;
- rmregs.pB[1].bSelCRF = REG_OFFSET(reg_es);
- rmregs.pB[1].bOffCRF = REG_OFFSET(reg_esi);
- rmregs.pB[1].pAddress = ((PBYTE)RMBuf)+4;
- rmregs.pB[1].ulSize = 512-4;
- break;
- case 0x4F01:
- rmregs.pB[0].bBufferType = OUTPUT_BUFFER;
- rmregs.pB[0].bSelCRF = REG_OFFSET(reg_es);
- rmregs.pB[0].bOffCRF = REG_OFFSET(reg_edi);
- rmregs.pB[0].pAddress = RMBuf;
- rmregs.pB[0].ulSize = 256;
- break;
- case 0x4F02:
- rmregs.pB[0].bBufferType = INPUT_BUFFER;
- rmregs.pB[0].bSelCRF = REG_OFFSET(reg_es);
- rmregs.pB[0].bOffCRF = REG_OFFSET(reg_edi);
- rmregs.pB[0].pAddress = RMBuf;
- rmregs.pB[0].ulSize = 256;
- break;
- case 0x4F09:
- rmregs.pB[0].bBufferType = INPUT_BUFFER;
- rmregs.pB[0].bSelCRF = REG_OFFSET(reg_es);
- rmregs.pB[0].bOffCRF = REG_OFFSET(reg_edi);
- rmregs.pB[0].pAddress = RMBuf;
- rmregs.pB[0].ulSize = 1024;
- break;
- case 0x4F0A:
- /* Due to bugs in the mini-VDM in OS/2, the 0x4F0A protected
- * mode interface functions will not work (we never get any
- * selectors returned), so we fail this function here. The
- * rest of the VBE/Core driver will work properly if this
- * function is failed, because the VBE 2.0 and 3.0 specs
- * allow for this.
- */
- regs->eax = 0x014F;
- return;
- }
- }
- if (useVPMI)
- PM_VIDEOPMI32Request(&Adapter,PMIREQUEST_SOFTWAREINT,NULL,&rmregs);
- else {
- DosSysCtl(6, &rmregs);
- }
-
- OUTDPMI(eax); OUTDPMI(ebx); OUTDPMI(ecx); OUTDPMI(edx); OUTDPMI(esi); OUTDPMI(edi);
- if (((regs->eax & 0xFFFF) == 0x004F) && ((eax & 0xFFFF) == 0x4F00)) {
- /* Hack to fix up the missing 'VESA' string for mini-VDM */
- memcpy(RMBuf,"VESA",4);
- }
- regs->ds = rmregs.aCRF.reg_ds;
- regs->es = rmregs.aCRF.reg_es;
- regs->flags = rmregs.aCRF.reg_eflag;
-}
-
-#define IN(reg) rmregs.reg = in->e.reg
-#define OUT(reg) out->e.reg = rmregs.reg
-
-/****************************************************************************
-REMARKS:
-Issue a real mode interrupt.
-****************************************************************************/
-int PMAPI PM_int86(
- int intno,
- RMREGS *in,
- RMREGS *out)
-{
- DPMI_regs rmregs;
-
- memset(&rmregs, 0, sizeof(rmregs));
- IN(eax); IN(ebx); IN(ecx); IN(edx); IN(esi); IN(edi);
- DPMI_int86(intno,&rmregs);
- OUT(eax); OUT(ebx); OUT(ecx); OUT(edx); OUT(esi); OUT(edi);
- out->x.cflag = rmregs.flags & 0x1;
- return out->x.ax;
-}
-
-/****************************************************************************
-REMARKS:
-Issue a real mode interrupt.
-****************************************************************************/
-int PMAPI PM_int86x(
- int intno,
- RMREGS *in,
- RMREGS *out,
- RMSREGS *sregs)
-{
- DPMI_regs rmregs;
-
- memset(&rmregs, 0, sizeof(rmregs));
- IN(eax); IN(ebx); IN(ecx); IN(edx); IN(esi); IN(edi);
- rmregs.es = sregs->es;
- rmregs.ds = sregs->ds;
- DPMI_int86(intno,&rmregs);
- OUT(eax); OUT(ebx); OUT(ecx); OUT(edx); OUT(esi); OUT(edi);
- sregs->es = rmregs.es;
- sregs->cs = rmregs.cs;
- sregs->ss = rmregs.ss;
- sregs->ds = rmregs.ds;
- out->x.cflag = rmregs.flags & 0x1;
- return out->x.ax;
-}
-
-/****************************************************************************
-REMARKS:
-Call a real mode far function.
-****************************************************************************/
-void PMAPI PM_callRealMode(
- uint seg,
- uint off,
- RMREGS *in,
- RMSREGS *sregs)
-{
- PM_fatalError("PM_callRealMode not supported on OS/2!");
-}
-
-/****************************************************************************
-REMARKS:
-Return the amount of available memory.
-****************************************************************************/
-void PMAPI PM_availableMemory(
- ulong *physical,
- ulong *total)
-{
- /* Unable to get reliable values from OS/2 for this */
- *physical = *total = 0;
-}
-
-/****************************************************************************
-REMARKS:
-Allocate a block of locked, physical memory for DMA operations.
-****************************************************************************/
-void * PMAPI PM_allocLockedMem(
- uint size,
- ulong *physAddr,
- ibool contiguous,
- ibool below16M)
-{
- parmsIn[0] = size;
- parmsIn[1] = contiguous;
- parmsIn[2] = below16M;
- CallSDDHelp(PMHELP_ALLOCLOCKED);
- *physAddr = parmsOut[1];
- return (void*)parmsOut[0];
-}
-
-/****************************************************************************
-REMARKS:
-Free a block of locked physical memory.
-****************************************************************************/
-void PMAPI PM_freeLockedMem(
- void *p,
- uint size,
- ibool contiguous)
-{
- parmsIn[0] = (ulong)p;
- CallSDDHelp(PMHELP_FREELOCKED);
-}
-
-/****************************************************************************
-REMARKS:
-Allocates a new block of pages for the page block manager.
-****************************************************************************/
-static pageblock *PM_addNewPageBlock(void)
-{
- int i;
- pageblock *newBlock;
- char *p,*next;
-
- /* Allocate memory for the new page block, and add to head of list */
- if (DosAllocSharedMem((void**)&newBlock,NULL,PAGE_BLOCK_SIZE,OBJ_GETTABLE | PAG_READ | PAG_WRITE | PAG_COMMIT))
- return NULL;
- if (!PM_lockDataPages(newBlock,PAGE_BLOCK_SIZE,&newBlock->lockHandle))
- return NULL;
- newBlock->prev = NULL;
- newBlock->next = pageBlocks;
- if (pageBlocks)
- pageBlocks->prev = newBlock;
- pageBlocks = newBlock;
-
- /* Initialise the page aligned free list for the page block */
- newBlock->freeCount = PAGES_PER_BLOCK;
- newBlock->freeList = p = (char*)(((ulong)(newBlock + 1) + (PM_PAGE_SIZE-1)) & ~(PM_PAGE_SIZE-1));
- newBlock->freeListStart = newBlock->freeList;
- newBlock->freeListEnd = p + (PAGES_PER_BLOCK-1) * PM_PAGE_SIZE;
- for (i = 0; i < PAGES_PER_BLOCK; i++,p = next)
- FREELIST_NEXT(p) = next = p + PM_PAGE_SIZE;
- FREELIST_NEXT(p - PM_PAGE_SIZE) = NULL;
- return newBlock;
-}
-
-/****************************************************************************
-REMARKS:
-Allocates a page aligned and page sized block of memory
-****************************************************************************/
-void * PMAPI PM_allocPage(
- ibool locked)
-{
- pageblock *block;
- void *p;
-
- /* Scan the block list looking for any free blocks. Allocate a new
- * page block if no free blocks are found.
- */
- for (block = pageBlocks; block != NULL; block = block->next) {
- if (block->freeCount)
- break;
- }
- if (block == NULL && (block = PM_addNewPageBlock()) == NULL)
- return NULL;
- block->freeCount--;
- p = block->freeList;
- block->freeList = FREELIST_NEXT(p);
- (void)locked;
- return p;
-}
-
-/****************************************************************************
-REMARKS:
-Free a page aligned and page sized block of memory
-****************************************************************************/
-void PMAPI PM_freePage(
- void *p)
-{
- pageblock *block;
-
- /* First find the page block that this page belongs to */
- for (block = pageBlocks; block != NULL; block = block->next) {
- if (p >= block->freeListStart && p <= block->freeListEnd)
- break;
- }
- CHECK(block != NULL);
-
- /* Now free the block by adding it to the free list */
- FREELIST_NEXT(p) = block->freeList;
- block->freeList = p;
- if (++block->freeCount == PAGES_PER_BLOCK) {
- /* If all pages in the page block are now free, free the entire
- * page block itself.
- */
- if (block == pageBlocks) {
- /* Delete from head */
- pageBlocks = block->next;
- if (block->next)
- block->next->prev = NULL;
- }
- else {
- /* Delete from middle of list */
- CHECK(block->prev != NULL);
- block->prev->next = block->next;
- if (block->next)
- block->next->prev = block->prev;
- }
-
- /* Unlock the memory and free it */
- PM_unlockDataPages(block,PAGE_BLOCK_SIZE,&block->lockHandle);
- DosFreeMem(block);
- }
-}
-
-/****************************************************************************
-REMARKS:
-Map in all the shared memory blocks for managing the memory pages above.
-****************************************************************************/
-void PMAPI PM_mapSharedPages(void)
-{
- pageblock *block;
-
- /* Map all the page blocks above into the shared memory for process */
- for (block = pageBlocks; block != NULL; block = block->next) {
- DosGetSharedMem(block, PAG_READ | PAG_WRITE);
- }
-}
-
-/****************************************************************************
-REMARKS:
-Lock linear memory so it won't be paged.
-****************************************************************************/
-int PMAPI PM_lockDataPages(
- void *p,
- uint len,
- PM_lockHandle *lockHandle)
-{
- parmsIn[0] = (ulong)p;
- parmsIn[1] = len;
- CallSDDHelp(PMHELP_LOCKPAGES);
- lockHandle->h[0] = parmsOut[1];
- lockHandle->h[1] = parmsOut[2];
- lockHandle->h[2] = parmsOut[3];
- return parmsOut[0];
-}
-
-/****************************************************************************
-REMARKS:
-Unlock linear memory so it won't be paged.
-****************************************************************************/
-int PMAPI PM_unlockDataPages(
- void *p,
- uint len,
- PM_lockHandle *lockHandle)
-{
- parmsIn[0] = lockHandle->h[0];
- parmsIn[1] = lockHandle->h[1];
- parmsIn[2] = lockHandle->h[2];
- return CallSDDHelp(PMHELP_UNLOCKPAGES);
-}
-
-/****************************************************************************
-REMARKS:
-Lock linear memory so it won't be paged.
-****************************************************************************/
-int PMAPI PM_lockCodePages(
- void (*p)(),
- uint len,
- PM_lockHandle *lockHandle)
-{
- parmsIn[0] = (ulong)p;
- parmsIn[1] = len;
- CallSDDHelp(PMHELP_LOCKPAGES);
- lockHandle->h[0] = parmsOut[1];
- lockHandle->h[1] = parmsOut[2];
- lockHandle->h[2] = parmsOut[3];
- return parmsOut[0];
-}
-
-/****************************************************************************
-REMARKS:
-Unlock linear memory so it won't be paged.
-****************************************************************************/
-int PMAPI PM_unlockCodePages(
- void (*p)(),
- uint len,
- PM_lockHandle *lockHandle)
-{
- parmsIn[0] = lockHandle->h[0];
- parmsIn[1] = lockHandle->h[1];
- parmsIn[2] = lockHandle->h[2];
- return CallSDDHelp(PMHELP_UNLOCKPAGES);
-}
-
-/****************************************************************************
-REMARKS:
-Call the VBE/Core software interrupt to change display banks.
-****************************************************************************/
-void PMAPI PM_setBankA(
- int bank)
-{
- INTCRF rmregs;
-
- if (!InitInt10())
- return;
- memset(&rmregs, 0, sizeof(rmregs));
- rmregs.ulBIOSIntNo = 0x10;
- rmregs.aCRF.reg_eax = 0x4F05;
- rmregs.aCRF.reg_ebx = 0x0000;
- rmregs.aCRF.reg_edx = bank;
- PM_VIDEOPMI32Request(&Adapter,PMIREQUEST_SOFTWAREINT,&rmregs,NULL);
-}
-
-/****************************************************************************
-REMARKS:
-Call the VBE/Core software interrupt to change display banks.
-****************************************************************************/
-void PMAPI PM_setBankAB(
- int bank)
-{
- INTCRF rmregs;
-
- if (!InitInt10())
- return;
- memset(&rmregs, 0, sizeof(rmregs));
- rmregs.ulBIOSIntNo = 0x10;
- rmregs.aCRF.reg_eax = 0x4F05;
- rmregs.aCRF.reg_ebx = 0x0000;
- rmregs.aCRF.reg_edx = bank;
- PM_VIDEOPMI32Request(&Adapter,PMIREQUEST_SOFTWAREINT,&rmregs,NULL);
- rmregs.ulBIOSIntNo = 0x10;
- rmregs.aCRF.reg_eax = 0x4F05;
- rmregs.aCRF.reg_ebx = 0x0001;
- rmregs.aCRF.reg_edx = bank;
- PM_VIDEOPMI32Request(&Adapter,PMIREQUEST_SOFTWAREINT,&rmregs,NULL);
-}
-
-/****************************************************************************
-REMARKS:
-Call the VBE/Core software interrupt to change display start address.
-****************************************************************************/
-void PMAPI PM_setCRTStart(
- int x,
- int y,
- int waitVRT)
-{
- INTCRF rmregs;
-
- if (!InitInt10())
- return;
- memset(&rmregs, 0, sizeof(rmregs));
- rmregs.ulBIOSIntNo = 0x10;
- rmregs.aCRF.reg_eax = 0x4F07;
- rmregs.aCRF.reg_ebx = waitVRT;
- rmregs.aCRF.reg_ecx = x;
- rmregs.aCRF.reg_edx = y;
- PM_VIDEOPMI32Request(&Adapter,PMIREQUEST_SOFTWAREINT,&rmregs,NULL);
-}
-
-/****************************************************************************
-REMARKS:
-Execute the POST on the secondary BIOS for a controller.
-****************************************************************************/
-ibool PMAPI PM_doBIOSPOST(
- ushort axVal,
- ulong BIOSPhysAddr,
- void *mappedBIOS,
- ulong BIOSLen)
-{
- (void)axVal;
- (void)BIOSPhysAddr;
- (void)mappedBIOS;
- (void)BIOSLen;
- return false;
-}
-
-/****************************************************************************
-PARAMETERS:
-base - The starting physical base address of the region
-size - The size in bytes of the region
-type - Type to place into the MTRR register
-
-RETURNS:
-Error code describing the result.
-
-REMARKS:
-Function to enable write combining for the specified region of memory.
-****************************************************************************/
-int PMAPI PM_enableWriteCombine(
- ulong base,
- ulong size,
- uint type)
-{
- return MTRR_enableWriteCombine(base,size,type);
-}
-
-/* TODO: Move the MTRR helper stuff into the call gate, or better yet */
-/* entirely into the ring 0 helper driver!! */
-
-/* MTRR helper functions. To make it easier to implement the MTRR support
- * under OS/2, we simply put our ring 0 helper functions into the
- * helper device driver rather than the entire MTRR module. This makes
- * it easier to maintain the MTRR support since we don't need to deal
- * with 16-bit ring 0 code in the MTRR library.
- */
-
-/****************************************************************************
-REMARKS:
-Flush the translation lookaside buffer.
-****************************************************************************/
-void PMAPI PM_flushTLB(void)
-{
- CallSDDHelp(PMHELP_FLUSHTLB);
-}
-
-/****************************************************************************
-REMARKS:
-Return true if ring 0 (or if we can call the helpers functions at ring 0)
-****************************************************************************/
-ibool _ASMAPI _MTRR_isRing0(void)
-{
- return true;
-}
-
-/****************************************************************************
-REMARKS:
-Read and return the value of the CR4 register
-****************************************************************************/
-ulong _ASMAPI _MTRR_saveCR4(void)
-{
- return CallSDDHelp(PMHELP_SAVECR4);
-}
-
-/****************************************************************************
-REMARKS:
-Restore the value of the CR4 register
-****************************************************************************/
-void _ASMAPI _MTRR_restoreCR4(ulong cr4Val)
-{
- parmsIn[0] = cr4Val;
- CallSDDHelp(PMHELP_RESTORECR4);
-}
-
-/****************************************************************************
-REMARKS:
-Read a machine status register for the CPU.
-****************************************************************************/
-void _ASMAPI _MTRR_readMSR(
- ulong reg,
- ulong *eax,
- ulong *edx)
-{
- parmsIn[0] = reg;
- CallSDDHelp(PMHELP_READMSR);
- *eax = parmsOut[0];
- *edx = parmsOut[1];
-}
-
-/****************************************************************************
-REMARKS:
-Write a machine status register for the CPU.
-****************************************************************************/
-void _ASMAPI _MTRR_writeMSR(
- ulong reg,
- ulong eax,
- ulong edx)
-{
- parmsIn[0] = reg;
- parmsIn[1] = eax;
- parmsIn[2] = edx;
- CallSDDHelp(PMHELP_WRITEMSR);
-}
-
-PM_MODULE PMAPI PM_loadLibrary(
- const char *szDLLName)
-{
- /* TODO: Implement this to load shared libraries! */
- (void)szDLLName;
- return NULL;
-}
-
-void * PMAPI PM_getProcAddress(
- PM_MODULE hModule,
- const char *szProcName)
-{
- /* TODO: Implement this! */
- (void)hModule;
- (void)szProcName;
- return NULL;
-}
-
-void PMAPI PM_freeLibrary(
- PM_MODULE hModule)
-{
- /* TODO: Implement this! */
- (void)hModule;
-}
-
-/****************************************************************************
-REMARKS:
-Internal function to convert the find data to the generic interface.
-****************************************************************************/
-static void convertFindData(
- PM_findData *findData,
- FILEFINDBUF3 *blk)
-{
- ulong dwSize = findData->dwSize;
-
- memset(findData,0,findData->dwSize);
- findData->dwSize = dwSize;
- if (blk->attrFile & FILE_READONLY)
- findData->attrib |= PM_FILE_READONLY;
- if (blk->attrFile & FILE_DIRECTORY)
- findData->attrib |= PM_FILE_DIRECTORY;
- if (blk->attrFile & FILE_ARCHIVED)
- findData->attrib |= PM_FILE_ARCHIVE;
- if (blk->attrFile & FILE_HIDDEN)
- findData->attrib |= PM_FILE_HIDDEN;
- if (blk->attrFile & FILE_SYSTEM)
- findData->attrib |= PM_FILE_SYSTEM;
- findData->sizeLo = blk->cbFile;
- findData->sizeHi = 0;
- strncpy(findData->name,blk->achName,PM_MAX_PATH);
- findData->name[PM_MAX_PATH-1] = 0;
-}
-
-#define FIND_MASK (FILE_ARCHIVED | FILE_DIRECTORY | FILE_SYSTEM | FILE_HIDDEN | FILE_READONLY)
-
-/****************************************************************************
-REMARKS:
-Function to find the first file matching a search criteria in a directory.
-****************************************************************************/
-void *PMAPI PM_findFirstFile(
- const char *filename,
- PM_findData *findData)
-{
- FILEFINDBUF3 blk;
- HDIR hdir = HDIR_CREATE;
- ulong count = 1;
-
- if (DosFindFirst((PSZ)filename,&hdir,FIND_MASK,&blk,sizeof(blk),&count,FIL_STANDARD) == NO_ERROR) {
- convertFindData(findData,&blk);
- return (void*)hdir;
- }
- return PM_FILE_INVALID;
-}
-
-/****************************************************************************
-REMARKS:
-Function to find the next file matching a search criteria in a directory.
-****************************************************************************/
-ibool PMAPI PM_findNextFile(
- void *handle,
- PM_findData *findData)
-{
- FILEFINDBUF3 blk;
- ulong count = 1;
-
- if (DosFindNext((HDIR)handle,&blk,sizeof(blk),&count) == NO_ERROR) {
- convertFindData(findData,&blk);
- return true;
- }
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Function to close the find process
-****************************************************************************/
-void PMAPI PM_findClose(
- void *handle)
-{
- DosFindClose((HDIR)handle);
-}
-
-/****************************************************************************
-REMARKS:
-Function to determine if a drive is a valid drive or not. Under Unix this
-function will return false for anything except a value of 3 (considered
-the root drive, and equivalent to C: for non-Unix systems). The drive
-numbering is:
-
- 0 - Current drive
- 1 - Drive A:
- 2 - Drive B:
- 3 - Drive C:
- etc
-
-****************************************************************************/
-ibool PMAPI PM_driveValid(
- char drive)
-{
- ulong cntDisk,cntDriveMap;
- ibool valid;
-
- DosQueryCurrentDisk(&cntDisk,&cntDriveMap);
- valid = (DosSetDefaultDisk(drive) == NO_ERROR);
- DosSetDefaultDisk(cntDisk);
- return valid;
-}
-
-/****************************************************************************
-REMARKS:
-Function to get the current working directory for the specififed drive.
-Under Unix this will always return the current working directory regardless
-of what the value of 'drive' is.
-****************************************************************************/
-void PMAPI PM_getdcwd(
- int drive,
- char *dir,
- int len)
-{
- ulong length = len;
-
- DosQueryCurrentDir(drive, (PSZ)dir, &length);
-}
-
-/****************************************************************************
-REMARKS:
-Function to change the file attributes for a specific file.
-****************************************************************************/
-void PMAPI PM_setFileAttr(
- const char *filename,
- uint attrib)
-{
- FILESTATUS3 s;
-
- if (DosQueryPathInfo((PSZ)filename,FIL_STANDARD,(PVOID)&s,sizeof(s)))
- return;
- s.attrFile = 0;
- if (attrib & PM_FILE_READONLY)
- s.attrFile |= FILE_READONLY;
- if (attrib & PM_FILE_ARCHIVE)
- s.attrFile |= FILE_ARCHIVED;
- if (attrib & PM_FILE_HIDDEN)
- s.attrFile |= FILE_HIDDEN;
- if (attrib & PM_FILE_SYSTEM)
- s.attrFile |= FILE_SYSTEM;
- DosSetPathInfo((PSZ)filename,FIL_STANDARD,(PVOID)&s,sizeof(s),0L);
-}
-
-/****************************************************************************
-REMARKS:
-Function to get the file attributes for a specific file.
-****************************************************************************/
-uint PMAPI PM_getFileAttr(
- const char *filename)
-{
- FILESTATUS3 fs3;
- uint retval = 0;
-
- if (DosQueryPathInfo((PSZ)filename, FIL_STANDARD, &fs3, sizeof(FILESTATUS3)))
- return 0;
- if (fs3.attrFile & FILE_READONLY)
- retval |= PM_FILE_READONLY;
- if (fs3.attrFile & FILE_ARCHIVED)
- retval |= PM_FILE_ARCHIVE;
- if (fs3.attrFile & FILE_HIDDEN)
- retval |= PM_FILE_HIDDEN;
- if (fs3.attrFile & FILE_SYSTEM)
- retval |= PM_FILE_SYSTEM;
- return retval;
-}
-
-/****************************************************************************
-REMARKS:
-Function to create a directory.
-****************************************************************************/
-ibool PMAPI PM_mkdir(
- const char *filename)
-{
- return DosCreateDir((PSZ)filename,NULL) == NO_ERROR;
-}
-
-/****************************************************************************
-REMARKS:
-Function to remove a directory.
-****************************************************************************/
-ibool PMAPI PM_rmdir(
- const char *filename)
-{
- return DosDeleteDir((PSZ)filename) == NO_ERROR;
-}
-
-/****************************************************************************
-REMARKS:
-Function to get the file time and date for a specific file.
-****************************************************************************/
-ibool PMAPI PM_getFileTime(
- const char *filename,
- ibool gmTime,
- PM_time *time)
-{
- FILESTATUS3 fs3;
- struct tm tc;
- struct tm *ret;
- time_t tt;
-
- if (DosQueryPathInfo((PSZ)filename, FIL_STANDARD, &fs3, sizeof(FILESTATUS3)))
- return false;
- if (gmTime) {
- tc.tm_year = fs3.fdateLastWrite.year + 80;
- tc.tm_mon = fs3.fdateLastWrite.month - 1;
- tc.tm_mday = fs3.fdateLastWrite.day;
- tc.tm_hour = fs3.ftimeLastWrite.hours;
- tc.tm_min = fs3.ftimeLastWrite.minutes;
- tc.tm_sec = fs3.ftimeLastWrite.twosecs * 2;
- if((tt = mktime(&tc)) == -1)
- return false;
- if(!(ret = gmtime(&tt)))
- return false;
- time->sec = ret->tm_sec;
- time->day = ret->tm_mday;
- time->mon = ret->tm_mon + 1;
- time->year = ret->tm_year - 80;
- time->min = ret->tm_min;
- time->hour = ret->tm_hour;
- }
- else {
- time->sec = fs3.ftimeLastWrite.twosecs * 2;
- time->day = fs3.fdateLastWrite.day;
- time->mon = fs3.fdateLastWrite.month;
- time->year = fs3.fdateLastWrite.year;
- time->min = fs3.ftimeLastWrite.minutes;
- time->hour = fs3.ftimeLastWrite.hours;
- }
- return true;
-}
-
-/****************************************************************************
-REMARKS:
-Function to set the file time and date for a specific file.
-****************************************************************************/
-ibool PMAPI PM_setFileTime(
- const char *filename,
- ibool gmTime,
- PM_time *time)
-{
- FILESTATUS3 fs3;
- struct tm tc;
- struct tm *ret;
- time_t tt;
-
- if (DosQueryPathInfo((PSZ)filename,FIL_STANDARD,(PVOID)&fs3,sizeof(fs3)))
- return false;
- if (gmTime) {
- tc.tm_year = time->year + 80;
- tc.tm_mon = time->mon - 1;
- tc.tm_mday = time->day;
- tc.tm_hour = time->hour;
- tc.tm_min = time->min;
- tc.tm_sec = time->sec;
- if((tt = mktime(&tc)) == -1)
- return false;
- ret = localtime(&tt);
- fs3.ftimeLastWrite.twosecs = ret->tm_sec / 2;
- fs3.fdateLastWrite.day = ret->tm_mday;
- fs3.fdateLastWrite.month = ret->tm_mon + 1;
- fs3.fdateLastWrite.year = ret->tm_year - 80;
- fs3.ftimeLastWrite.minutes = ret->tm_min;
- fs3.ftimeLastWrite.hours = ret->tm_hour;
- }
- else {
- fs3.ftimeLastWrite.twosecs = time->sec / 2;
- fs3.fdateLastWrite.day = time->day;
- fs3.fdateLastWrite.month = time->mon;
- fs3.fdateLastWrite.year = time->year;
- fs3.ftimeLastWrite.minutes = time->min;
- fs3.ftimeLastWrite.hours = time->hour;
- }
- memcpy(&fs3.fdateLastAccess, &fs3.fdateLastWrite, sizeof(FDATE));
- memcpy(&fs3.fdateCreation, &fs3.fdateLastWrite, sizeof(FDATE));
- memcpy(&fs3.ftimeLastAccess, &fs3.ftimeLastWrite, sizeof(FTIME));
- memcpy(&fs3.ftimeCreation, &fs3.ftimeLastWrite, sizeof(FTIME));
- DosSetPathInfo((PSZ)filename,FIL_STANDARD,(PVOID)&fs3,sizeof(FILESTATUS3),0L);
- return true;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/os2/vflat.c b/board/MAI/bios_emulator/scitech/src/pm/os2/vflat.c
deleted file mode 100644
index 579ef2c95c..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/os2/vflat.c
+++ /dev/null
@@ -1,49 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-*
-* Description: Dummy module; no virtual framebuffer for this OS
-*
-****************************************************************************/
-
-#include "pmapi.h"
-
-ibool PMAPI VF_available(void)
-{
- return false;
-}
-
-void * PMAPI VF_init(ulong baseAddr,int bankSize,int codeLen,void *bankFunc)
-{
- baseAddr = baseAddr;
- bankSize = bankSize;
- codeLen = codeLen;
- bankFunc = bankFunc;
- return NULL;
-}
-
-void PMAPI VF_exit(void)
-{
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/os2/ztimer.c b/board/MAI/bios_emulator/scitech/src/pm/os2/ztimer.c
deleted file mode 100644
index 30ffe4340b..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/os2/ztimer.c
+++ /dev/null
@@ -1,110 +0,0 @@
-/****************************************************************************
-*
-* Ultra Long Period Timer
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: OS/2
-*
-* Description: OS specific implementation for the Zen Timer functions.
-*
-****************************************************************************/
-
-/*---------------------------- Global variables ---------------------------*/
-
-static ulong frequency;
-
-/*----------------------------- Implementation ----------------------------*/
-
-/****************************************************************************
-REMARKS:
-Initialise the Zen Timer module internals.
-****************************************************************************/
-void __ZTimerInit(void)
-{
- DosTmrQueryFreq(&frequency);
-}
-
-/****************************************************************************
-REMARKS:
-Start the Zen Timer counting.
-****************************************************************************/
-#define __LZTimerOn(tm) DosTmrQueryTime((QWORD*)&tm->start)
-
-/****************************************************************************
-REMARKS:
-Compute the lap time since the timer was started.
-****************************************************************************/
-static ulong __LZTimerLap(
- LZTimerObject *tm)
-{
- CPU_largeInteger tmLap,tmCount;
-
- DosTmrQueryTime((QWORD*)&tmLap);
- _CPU_diffTime64(&tm->start,&tmLap,&tmCount);
- return _CPU_calcMicroSec(&tmCount,frequency);
-}
-
-/****************************************************************************
-REMARKS:
-Call the assembler Zen Timer functions to do the timing.
-****************************************************************************/
-#define __LZTimerOff(tm) DosTmrQueryTime((QWORD*)&tm->end)
-
-/****************************************************************************
-REMARKS:
-Call the assembler Zen Timer functions to do the timing.
-****************************************************************************/
-static ulong __LZTimerCount(
- LZTimerObject *tm)
-{
- CPU_largeInteger tmCount;
-
- _CPU_diffTime64(&tm->start,&tm->end,&tmCount);
- return _CPU_calcMicroSec(&tmCount,frequency);
-}
-
-/****************************************************************************
-REMARKS:
-Define the resolution of the long period timer as microseconds per timer tick.
-****************************************************************************/
-#define ULZTIMER_RESOLUTION 1000
-
-/****************************************************************************
-REMARKS:
-Read the Long Period timer value from the BIOS timer tick.
-****************************************************************************/
-static ulong __ULZReadTime(void)
-{
- ULONG count;
- DosQuerySysInfo( QSV_MS_COUNT, QSV_MS_COUNT, &count, sizeof(ULONG) );
- return count;
-}
-
-/****************************************************************************
-REMARKS:
-Compute the elapsed time from the BIOS timer tick. Note that we check to see
-whether a midnight boundary has passed, and if so adjust the finish time to
-account for this. We cannot detect if more that one midnight boundary has
-passed, so if this happens we will be generating erronous results.
-****************************************************************************/
-ulong __ULZElapsedTime(ulong start,ulong finish)
-{ return finish - start; }
diff --git a/board/MAI/bios_emulator/scitech/src/pm/os2pm/event.c b/board/MAI/bios_emulator/scitech/src/pm/os2pm/event.c
deleted file mode 100644
index 7af20a9568..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/os2pm/event.c
+++ /dev/null
@@ -1,170 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: IBM PC (OS/2)
-*
-* Description: OS/2 implementation for the SciTech cross platform
-* event library.
-*
-****************************************************************************/
-
-/*---------------------------- Global Variables ---------------------------*/
-
-static int oldMouseState; /* Old mouse state */
-static ulong oldKeyMessage; /* Old keyboard state */
-static ushort keyUpMsg[256] = {0};/* Table of key up messages */
-static int rangeX,rangeY; /* Range of mouse coordinates */
-HMOU _EVT_hMouse; /* Handle to the mouse driver */
-
-/*---------------------------- Implementation -----------------------------*/
-
-/* These are not used under OS/2 */
-#define _EVT_disableInt() 1
-#define _EVT_restoreInt(flags)
-
-/****************************************************************************
-PARAMETERS:
-scanCode - Scan code to test
-
-REMARKS:
-This macro determines if a specified key is currently down at the
-time that the call is made.
-****************************************************************************/
-#define _EVT_isKeyDown(scanCode) (keyUpMsg[scanCode] != 0)
-
-/****************************************************************************
-REMARKS:
-Pumps all messages in the message queue from OS/2 into our event queue.
-****************************************************************************/
-static void _EVT_pumpMessages(void)
-{
- /* TODO: Implement this for OS/2 Presentation Manager apps! */
-}
-
-/****************************************************************************
-REMARKS:
-This macro/function is used to converts the scan codes reported by the
-keyboard to our event libraries normalised format. We only have one scan
-code for the 'A' key, and use shift modifiers to determine if it is a
-Ctrl-F1, Alt-F1 etc. The raw scan codes from the keyboard work this way,
-but the OS gives us 'cooked' scan codes, we have to translate them back
-to the raw format.
-****************************************************************************/
-#define _EVT_maskKeyCode(evt)
-
-/****************************************************************************
-REMARKS:
-Safely abort the event module upon catching a fatal error.
-****************************************************************************/
-void _EVT_abort()
-{
- EVT_exit();
- PM_fatalError("Unhandled exception!");
-}
-
-/****************************************************************************
-PARAMETERS:
-mouseMove - Callback function to call wheneve the mouse needs to be moved
-
-REMARKS:
-Initiliase the event handling module. Here we install our mouse handling ISR
-to be called whenever any button's are pressed or released. We also build
-the free list of events in the event queue.
-
-We use handler number 2 of the mouse libraries interrupt handlers for our
-event handling routines.
-****************************************************************************/
-void EVTAPI EVT_init(
- _EVT_mouseMoveHandler mouseMove)
-{
- /* Initialise the event queue */
- EVT.mouseMove = mouseMove;
- initEventQueue();
- oldMouseState = 0;
- oldKeyMessage = 0;
- memset(keyUpMsg,0,sizeof(keyUpMsg));
-
- /* TODO: OS/2 PM specific initialisation code! */
-
- /* Catch program termination signals so we can clean up properly */
- signal(SIGABRT, _EVT_abort);
- signal(SIGFPE, _EVT_abort);
- signal(SIGINT, _EVT_abort);
-}
-
-/****************************************************************************
-REMARKS
-Changes the range of coordinates returned by the mouse functions to the
-specified range of values. This is used when changing between graphics
-modes set the range of mouse coordinates for the new display mode.
-****************************************************************************/
-void EVTAPI EVT_setMouseRange(
- int xRes,
- int yRes)
-{
- rangeX = xRes;
- rangeY = yRes;
-}
-
-/****************************************************************************
-REMARKS:
-Initiailises the internal event handling modules. The EVT_suspend function
-can be called to suspend event handling (such as when shelling out to DOS),
-and this function can be used to resume it again later.
-****************************************************************************/
-void EVT_resume(void)
-{
- /* Do nothing for OS/2 */
-}
-
-/****************************************************************************
-REMARKS
-Suspends all of our event handling operations. This is also used to
-de-install the event handling code.
-****************************************************************************/
-void EVT_suspend(void)
-{
- /* Do nothing for OS/2 */
-}
-
-/****************************************************************************
-REMARKS
-Exits the event module for program terminatation.
-****************************************************************************/
-void EVT_exit(void)
-{
- /* Restore signal handlers */
- signal(SIGABRT, SIG_DFL);
- signal(SIGFPE, SIG_DFL);
- signal(SIGINT, SIG_DFL);
-
- /* TODO: OS/2 PM specific exit code */
-}
-
-/****************************************************************************
-REMARKS
-Modifes the mouse coordinates as necessary if scaling to OS coordinates,
-and sets the OS mouse cursor position.
-****************************************************************************/
-#define _EVT_setMousePos(x,y)
diff --git a/board/MAI/bios_emulator/scitech/src/pm/os2pm/oshdr.h b/board/MAI/bios_emulator/scitech/src/pm/os2pm/oshdr.h
deleted file mode 100644
index 0b69f8222c..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/os2pm/oshdr.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: 32-bit OS/2
-*
-* Description: Include file to include all OS specific header files.
-*
-****************************************************************************/
-
-#define INCL_DOSERRORS
-#define INCL_DOS
-#define INCL_SUB
-#define INCL_VIO
-#define INCL_KBD
-#include <os2.h>
diff --git a/board/MAI/bios_emulator/scitech/src/pm/oshdr.h b/board/MAI/bios_emulator/scitech/src/pm/oshdr.h
deleted file mode 100644
index 404e5c93c5..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/oshdr.h
+++ /dev/null
@@ -1,70 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-*
-* Description: Header file to pull in OS specific headers for the target
-* OS environment.
-*
-****************************************************************************/
-
-#if defined(__SMX32__)
-#include "smx/oshdr.h"
-#elif defined(__RTTARGET__)
-#include "rttarget/oshdr.h"
-#elif defined(__REALDOS__)
-#include "dos/oshdr.h"
-#elif defined(__WIN32_VXD__)
-#include "vxd/oshdr.h"
-#elif defined(__NT_DRIVER__)
-#include "ntdrv/oshdr.h"
-#elif defined(__WINDOWS32__)
-#include "win32/oshdr.h"
-#elif defined(__OS2_VDD__)
-#include "vxd/oshdr.h"
-#elif defined(__OS2__)
-#if defined(__OS2_PM__)
-#include "os2pm/oshdr.h"
-#else
-#include "os2/oshdr.h"
-#endif
-#elif defined(__LINUX__)
-#if defined(__USE_X11__)
-#include "x11/oshdr.h"
-#else
-#include "linux/oshdr.h"
-#endif
-#elif defined(__QNX__)
-#if defined(__USE_PHOTON__)
-#include "photon/oshdr.h"
-#elif defined(__USE_X11__)
-#include "x11/oshdr.h"
-#else
-#include "qnx/oshdr.h"
-#endif
-#elif defined(__BEOS__)
-#include "beos/oshdr.h"
-#else
-#error PM library not ported to this platform yet!
-#endif
diff --git a/board/MAI/bios_emulator/scitech/src/pm/photon/event.c b/board/MAI/bios_emulator/scitech/src/pm/photon/event.c
deleted file mode 100644
index 581da16fdf..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/photon/event.c
+++ /dev/null
@@ -1,268 +0,0 @@
-/****************************************************************************
-*
-* SciTech Multi-platform Graphics Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: QNX Photon GUI
-*
-* Description: QNX fullscreen console implementation for the SciTech
-* cross platform event library.
-*
-****************************************************************************/
-
-/*--------------------------- Global variables ----------------------------*/
-
-static ushort keyUpMsg[256] = {0};/* Table of key up messages */
-
-/*---------------------------- Implementation -----------------------------*/
-
-/* These are not used under Linux */
-#define _EVT_disableInt() 1
-#define _EVT_restoreInt(flags)
-
-/****************************************************************************
-PARAMETERS:
-scanCode - Scan code to test
-
-REMARKS:
-This macro determines if a specified key is currently down at the
-time that the call is made.
-****************************************************************************/
-static ibool _EVT_isKeyDown(
- uchar scancode)
-{
- return (KeyState[(scancode & 0xf8) >> 3] & (1 << (scancode & 0x7)) ?
- true : false);
-}
-
-/****************************************************************************
-REMARKS:
-Retrieves all events from the mouse/keyboard event queue and stuffs them
-into the MGL event queue for further processing.
-****************************************************************************/
-static void _EVT_pumpMessages(void)
-{
- int pid;
- uint msg, but_stat, message;
- uchar evt[sizeof (PhEvent_t) + 1024];
- PhEvent_t *event = (void *)evt;
- PhKeyEvent_t *key;
- PhPointerEvent_t *mouse;
- static int extended;
- event_t _evt;
-
- while (count < EVENTQSIZE) {
- uint mods = 0, keyp = 0;
-
- pid = Creceive(0, &msg, sizeof (msg));
-
- if (pid == -1)
- return;
-
- if (PhEventRead(pid, event, sizeof (evt)) == Ph_EVENT_MSG) {
- memset(&evt, 0, sizeof (evt));
- if (event->type == Ph_EV_KEY) {
- key = PhGetData(event);
-
- if (key->key_flags & KEY_SCAN_VALID) {
- keyp = key->key_scan;
- if (key->key_flags & KEY_DOWN)
- KeyState[(keyp & 0xf800) >> 11]
- |= 1 << ((keyp & 0x700) >> 8);
- else
- KeyState[(keyp & 0xf800) >> 11]
- &= ~(1 << ((keyp & 0x700) >> 8));
- }
- if ((key->key_flags & KEY_SYM_VALID) || extended)
- keyp |= key->key_sym;
-
- /* No way to tell left from right... */
- if (key->key_mods & KEYMOD_SHIFT)
- mods = (EVT_LEFTSHIFT | EVT_RIGHTSHIFT);
- if (key->key_mods & KEYMOD_CTRL)
- mods |= (EVT_CTRLSTATE | EVT_LEFTCTRL);
- if (key->key_mods & KEYMOD_ALT)
- mods |= (EVT_ALTSTATE | EVT_LEFTALT);
-
- _evt.when = evt->timestamp;
- if (key->key_flags & KEY_REPEAT) {
- _evt.what = EVT_KEYREPEAT;
- _evt.message = 0x10000;
- }
- else if (key->key_flags & KEY_DOWN)
- _evt.what = EVT_KEYDOWN;
- else
- _evt.what = EVT_KEYUP;
- _evt.modifiers = mods;
- _evt.message |= keyp;
-
- addEvent(&_evt);
-
- switch(key->key_scan & 0xff00) {
- case 0xe000:
- extended = 1;
- break;
- case 0xe001:
- extended = 2;
- break;
- default:
- if (extended)
- extended--;
- }
- }
- else if (event->type & Ph_EV_PTR_ALL) {
- but_stat = message = 0;
- mouse = PhGetData(event);
-
- if (mouse->button_state & Ph_BUTTON_3)
- but_stat = EVT_LEFTBUT;
- if (mouse->buttons & Ph_BUTTON_3)
- message = EVT_LEFTBMASK;
-
- if (mouse->button_state & Ph_BUTTON_1)
- but_stat |= EVT_RIGHTBUT;
- if (mouse->buttons & Ph_BUTTON_1)
- message |= EVT_RIGHTBMASK;
-
- _evt.when = evt->timestamp;
- if (event->type & Ph_EV_PTR_MOTION) {
- _evt.what = EVT_MOUSEMOVE;
- _evt.where_x = mouse->pos.x;
- _evt.where_y = mouse->pos.y;
- _evt.modifiers = but_stat;
- addEvent(&_evt);
- }
- if (event->type & Ph_EV_BUT_PRESS)
- _evt.what = EVT_MOUSEDOWN;
- else
- _evt.what = EVT_MOUSEUP;
- _evt.where_x = mouse->pos.x;
- _evt.where_y = mouse->pos.y;
- _evt.modifiers = but_stat;
- _evt.message = message;
- addEvent(&_evt);
- }
- }
- else
- return;
- }
-}
-
-/****************************************************************************
-REMARKS:
-This macro/function is used to converts the scan codes reported by the
-keyboard to our event libraries normalised format. We only have one scan
-code for the 'A' key, and use shift modifiers to determine if it is a
-Ctrl-F1, Alt-F1 etc. The raw scan codes from the keyboard work this way,
-but the OS gives us 'cooked' scan codes, we have to translate them back
-to the raw format.
-****************************************************************************/
-#define _EVT_maskKeyCode(evt)
-
-/****************************************************************************
-REMARKS:
-Safely abort the event module upon catching a fatal error.
-****************************************************************************/
-void _EVT_abort(
- int signo)
-{
- char buf[80];
-
- EVT_exit();
- sprintf(buf,"Terminating on signal %d",signo);
- PM_fatalError(buf);
-}
-
-/****************************************************************************
-PARAMETERS:
-mouseMove - Callback function to call wheneve the mouse needs to be moved
-
-REMARKS:
-Initiliase the event handling module. Here we install our mouse handling ISR
-to be called whenever any button's are pressed or released. We also build
-the free list of events in the event queue.
-
-We use handler number 2 of the mouse libraries interrupt handlers for our
-event handling routines.
-****************************************************************************/
-void EVTAPI EVT_init(
- _EVT_mouseMoveHandler mouseMove)
-{
- int i;
-
- /* Initialise the event queue */
- _mouseMove = mouseMove;
- initEventQueue();
- memset((void *)KeyState, 0, sizeof (KeyState));
-
- /* Catch program termination signals so we can clean up properly */
- signal(SIGABRT, _EVT_abort);
- signal(SIGFPE, _EVT_abort);
- signal(SIGINT, _EVT_abort);
-}
-
-/****************************************************************************
-REMARKS
-Changes the range of coordinates returned by the mouse functions to the
-specified range of values. This is used when changing between graphics
-modes set the range of mouse coordinates for the new display mode.
-****************************************************************************/
-void EVTAPI EVT_setMouseRange(
- int xRes,
- int yRes)
-{
- /* TODO: Need to call Input to change the coordinates that it returns */
- /* for mouse events!! */
-}
-
-/****************************************************************************
-REMARKS:
-Initiailises the internal event handling modules. The EVT_suspend function
-can be called to suspend event handling (such as when shelling out to DOS),
-and this function can be used to resume it again later.
-****************************************************************************/
-void EVT_resume(void)
-{
- /* Do nothing for Photon */
-}
-
-/****************************************************************************
-REMARKS
-Suspends all of our event handling operations. This is also used to
-de-install the event handling code.
-****************************************************************************/
-void EVT_suspend(void)
-{
- /* Do nothing for Photon */
-}
-
-/****************************************************************************
-REMARKS
-Exits the event module for program terminatation.
-****************************************************************************/
-void EVT_exit(void)
-{
- /* Restore signal handlers */
- signal(SIGABRT, SIG_DFL);
- signal(SIGFPE, SIG_DFL);
- signal(SIGINT, SIG_DFL);
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/photon/oshdr.h b/board/MAI/bios_emulator/scitech/src/pm/photon/oshdr.h
deleted file mode 100644
index 3c72563de2..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/photon/oshdr.h
+++ /dev/null
@@ -1,38 +0,0 @@
-/****************************************************************************
-*
-* SciTech Multi-platform Graphics Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: QNX Photon GUI
-*
-* Description: Include file to include all OS specific header files.
-*
-****************************************************************************/
-
-#include <sys/mouse.h>
-#include <sys/keyboard.h>
-#include <sys/fd.h>
-#include <sys/stat.h>
-#include <conio.h>
-#include <process.h>
-#include <sys/kernel.h>
-#include <Ph.h>
diff --git a/board/MAI/bios_emulator/scitech/src/pm/pm.vpw b/board/MAI/bios_emulator/scitech/src/pm/pm.vpw
deleted file mode 100644
index 26e68a7a3a..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/pm.vpw
+++ /dev/null
@@ -1,43 +0,0 @@
-[Dependencies]
-[CurrentProject]
-curproj=pmlinux.vpj
-[ProjectFiles]
-pmcommon.vpj
-pmdos.vpj
-pmlinux.vpj
-pmqnx.vpj
-pmvxd.vpj
-pmwin32.vpj
-z_samples.vpj
-..\a-global includes.vpj
-[TreeExpansion]
-"..\a-global includes.vpj" 0
-pmcommon.vpj 0
-pmdos.vpj 0
-pmlinux.vpj 0
-pmqnx.vpj 0
-pmvxd.vpj 0
-pmwin32.vpj 0
-z_samples.vpj 1 1
-[State]
-SCREEN: 1280 1024 0 0 960 746 0 0 M 0 0 0 0 977 631
-CWD: C:\scitech\src\pm
-FILEHIST: 9
-C:\scitech\makedefs\gcc_win32.mk
-C:\scitech\bin\gcc2-w32.bat
-C:\scitech\bin\gcc2-c32.bat
-C:\scitech\bin\gcc2-linux.bat
-C:\scitech\makedefs\gcc_linux.mk
-C:\scitech\src\pm\linux\event.c
-C:\scitech\src\pm\linux\oshdr.h
-C:\scitech\src\pm\event.c
-C:\scitech\src\pm\pmlinux.vpj
-[ProjectDates]
-pmcommon.vpj=20010517164335290
-pmdos.vpj=20010517164335290
-pmlinux.vpj=20010620175829812
-pmqnx.vpj=20010517164335290
-pmvxd.vpj=20010517164335306
-pmwin32.vpj=20010517164335306
-z_samples.vpj=20010517164335306
-..\a-global includes.vpj=20010517164334978
diff --git a/board/MAI/bios_emulator/scitech/src/pm/pmcommon.vpj b/board/MAI/bios_emulator/scitech/src/pm/pmcommon.vpj
deleted file mode 100644
index 48b872d981..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/pmcommon.vpj
+++ /dev/null
@@ -1,45 +0,0 @@
-[COMPILER]
-version=5.0b
-MACRO=\n
-activeconfig=,wc10-d32
-FILTERNAME=Source Files\nInclude Files\nAssembler Files\nOther Files\n
-FILTERPATTERN=*.c;*.cpp;*.cxx;*.prg;*.pas;*.dpr;*.bas;*.java;*.sc;*.e;*.cob;*.html;*.rc\n*.h\n*.asm\n*.*\n
-FILTERASSOCIATEFILETYPES=0 0 0 0
-FILTERAPPCOMMAND=\n\n\n\n
-vcsproject=SCC:Perforce SCM://depot
-vcslocalpath=SCC:Perforce SCM:c:\
-compile=concur|capture|hide|:Compile:&Compile,
-make=concur|capture|hide|clear|saveall|:Build:&Build,
-rebuild=concur|capture|hide|clear|saveall|:Rebuild:&Rebuild,
-debug=concur|capture|hide|savenone|:Debug:&Debug,
-execute=hide|savenone|:Execute:E&xecute,
-user1=hide|:User 1:User 1,
-user2=hide|:User 2:User 2,
-workingdir=.
-includedirs=%(SCITECH)\include;%(PRIVATE)\include
-reffile=
-[FILES]
-common.c
-cpuinfo.c
-debug.c
-event.c
-makefile
-oshdr.h
-ztimer.c
-..\common\agplib.c
-codepage\us_eng.c
-common\_cpuinfo.asm
-common\_dma.asm
-common\_int64.asm
-common\_joy.asm
-common\_mtrr.asm
-common\_pcilib.asm
-common\agp.c
-common\keyboard.c
-common\malloc.c
-common\mtrr.c
-common\pcilib.c
-common\unixio.c
-common\vgastate.c
-[ASSOCIATION]
-[CONFIGURATIONS]
diff --git a/board/MAI/bios_emulator/scitech/src/pm/pmdos.vpj b/board/MAI/bios_emulator/scitech/src/pm/pmdos.vpj
deleted file mode 100644
index 1157513b30..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/pmdos.vpj
+++ /dev/null
@@ -1,41 +0,0 @@
-[SciTech]
-compiler=wc10-
-targetos=d32
-[COMPILER]
-version=5.0b
-MACRO=enable_current_compiler\n
-activeconfig=,TEST_HARNESS=1
-FILTERNAME=Source Files\nInclude Files\nAssembler Files\n
-FILTERPATTERN=*.c;*.cpp;*.cxx;*.prg;*.pas;*.dpr;*.bas;*.java;*.sc;*.e;*.cob;*.html;*.rc\n*.h\n*.asm\n
-FILTERASSOCIATEFILETYPES=0 0 0
-FILTERAPPCOMMAND=\n\n\n
-vcsproject=SCC:Perforce SCM://depot
-vcslocalpath=SCC:Perforce SCM:c:\
-compile=concur|capture|clear|:Compile:&Compile,dmake %n.obj -u %b
-make=concur|capture|clear|saveall|:Build:&Build,dmake install %b
-rebuild=concur|capture|clear|saveall|:Rebuild:&Rebuild,dmake cleanexe & dmake install -u %b
-debug=concur|capture|hide|savenone|:Debug:&Debug,
-execute=hide|savenone|nochangedir|:Execute:E&xecute,
-user1=hide|:User 1:User 1,
-user2=hide|:User 2:User 2,
-usertool_clean_directory=concur|capture|hide|savenone|nochangedir|:Clean Directory:C&lean Directory,dmake cleanexe
-workingdir=.
-includedirs=%(SCITECH)\include;%(PRIVATE)\include
-reffile=
-[FILES]
-dos\_event.asm
-dos\_lztimer.asm
-dos\_pm.asm
-dos\_pmdos.asm
-dos\_vflat.asm
-dos\cpuinfo.c
-dos\event.c
-dos\oshdr.h
-dos\pm.c
-dos\pmdos.c
-dos\vflat.c
-dos\ztimer.c
-[ASSOCIATION]
-[CONFIGURATIONS]
-config=,NORMAL_BUILD=1
-config=,TEST_HARNESS=1
diff --git a/board/MAI/bios_emulator/scitech/src/pm/pmlinux.vpj b/board/MAI/bios_emulator/scitech/src/pm/pmlinux.vpj
deleted file mode 100644
index 0bfbf8446a..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/pmlinux.vpj
+++ /dev/null
@@ -1,35 +0,0 @@
-[SciTech]
-compiler=gcc2-
-targetos=linux
-[COMPILER]
-version=5.0b
-MACRO=enable_current_compiler\n
-FILTERNAME=Source Files\nInclude Files\nAssembler Files\n
-FILTERPATTERN=*.c;*.cpp;*.cxx;*.prg;*.pas;*.dpr;*.bas;*.java;*.sc;*.e;*.cob;*.html;*.rc\n*.h\n*.asm\n
-FILTERASSOCIATEFILETYPES=0 0 0
-FILTERAPPCOMMAND=\n\n\n
-vcsproject=SCC:Perforce SCM://depot
-vcslocalpath=SCC:Perforce SCM:c:\
-activeconfig=,install BUILD_DLL=1
-compile=concur|capture|clear|:Compile:&Compile,dmake %n.o -u
-make=concur|capture|clear|saveall|:Build:&Build,dmake %b
-rebuild=concur|capture|clear|saveall|:Rebuild:&Rebuild,dmake cleanexe & dmake -u %b
-debug=concur|capture|hide|savenone|:Debug:&Debug,
-execute=hide|savenone|nochangedir|:Execute:E&xecute,
-user1=hide|:User 1:User 1,
-user2=hide|:User 2:User 2,
-usertool_clean_directory=concur|capture|hide|savenone|nochangedir|:Clean Directory:C&lean Directory,dmake cleanexe
-workingdir=.
-includedirs=%(SCITECH)\include;%(PRIVATE)\include
-reffile=
-[FILES]
-linux\cpuinfo.c
-linux\event.c
-linux\oshdr.h
-linux\pm.c
-linux\vflat.c
-linux\ztimer.c
-[ASSOCIATION]
-[CONFIGURATIONS]
-config=,install BUILD_DLL=1
-config=,install
diff --git a/board/MAI/bios_emulator/scitech/src/pm/pmntdrv.vpj b/board/MAI/bios_emulator/scitech/src/pm/pmntdrv.vpj
deleted file mode 100644
index 3ec35a76e4..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/pmntdrv.vpj
+++ /dev/null
@@ -1,39 +0,0 @@
-[SciTech]
-compiler=vc60-
-targetos=drvw2k
-[COMPILER]
-version=5.0b
-MACRO=enable_current_compiler\n
-activeconfig=,wc10-d32
-FILTERNAME=Source Files\nInclude Files\nAssembler Files\n
-FILTERPATTERN=*.c;*.cpp;*.cxx;*.prg;*.pas;*.dpr;*.bas;*.java;*.sc;*.e;*.cob;*.html;*.rc\n*.h\n*.asm\n
-FILTERASSOCIATEFILETYPES=0 0 0
-FILTERAPPCOMMAND=\n\n\n
-vcsproject=SCC:Perforce SCM://depot
-vcslocalpath=SCC:Perforce SCM:c:\
-compile=concur|capture|:Compile:&Compile,dmake %n.obj
-make=concur|capture|clear|saveall|:Build:&Build,dmake install
-rebuild=concur|capture|clear|saveall|:Rebuild:&Rebuild,dmake cleanexe & dmake install -u
-debug=concur|capture|hide|savenone|:Debug:&Debug,
-execute=hide|savenone|nochangedir|:Execute:E&xecute,
-user1=hide|:User 1:User 1,
-user2=hide|:User 2:User 2,
-usertool_clean_directory=concur|capture|hide|savenone|:Clean Directory:&Clean Directory,dmake cleanexe
-workingdir=.
-includedirs=%(SCITECH)\include;%(PRIVATE)\include
-reffile=
-[FILES]
-..\..\include\ntdriver.h
-ntdrv\_pm.asm
-ntdrv\cpuinfo.c
-ntdrv\int86.c
-ntdrv\irq.c
-ntdrv\mem.c
-ntdrv\oshdr.h
-ntdrv\pm.c
-ntdrv\stdio.c
-ntdrv\stdlib.c
-ntdrv\vflat.c
-ntdrv\ztimer.c
-[ASSOCIATION]
-[CONFIGURATIONS]
diff --git a/board/MAI/bios_emulator/scitech/src/pm/pmqnx.vpj b/board/MAI/bios_emulator/scitech/src/pm/pmqnx.vpj
deleted file mode 100644
index d54170252c..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/pmqnx.vpj
+++ /dev/null
@@ -1,35 +0,0 @@
-[SciTech]
-compiler=wc10-
-targetos=qnx
-[COMPILER]
-version=5.0b
-MACRO=enable_current_compiler\n
-activeconfig=,wc10-d32
-FILTERNAME=Source Files\nInclude Files\nAssembler Files\n
-FILTERPATTERN=*.c;*.cpp;*.cxx;*.prg;*.pas;*.dpr;*.bas;*.java;*.sc;*.e;*.cob;*.html;*.rc\n*.h\n*.asm\n
-FILTERASSOCIATEFILETYPES=0 0 0
-FILTERAPPCOMMAND=\n\n\n
-vcsproject=SCC:Perforce SCM://depot
-vcslocalpath=SCC:Perforce SCM:c:\
-compile=concur|capture|clear|:Compile:&Compile,dmake %n.obj
-make=concur|capture|clear|saveall|:Build:&Build,dmake install
-rebuild=concur|capture|clear|saveall|:Rebuild:&Rebuild,dmake cleanexe & dmake install -u
-debug=concur|capture|hide|savenone|:Debug:&Debug,
-execute=hide|savenone|nochangedir|:Execute:E&xecute,
-user1=hide|:User 1:User 1,
-user2=hide|:User 2:User 2,
-usertool_clean_directory=concur|capture|hide|savenone|nochangedir|:Clean Directory:C&lean Directory,dmake cleanexe
-workingdir=.
-includedirs=%(SCITECH)\include;%(PRIVATE)\include
-reffile=
-[FILES]
-qnx\_mtrrqnx.asm
-qnx\cpuinfo.c
-qnx\event.c
-qnx\mtrrqnx.c
-qnx\oshdr.h
-qnx\pm.c
-qnx\vflat.c
-qnx\ztimer.c
-[ASSOCIATION]
-[CONFIGURATIONS]
diff --git a/board/MAI/bios_emulator/scitech/src/pm/pmvxd.vpj b/board/MAI/bios_emulator/scitech/src/pm/pmvxd.vpj
deleted file mode 100644
index 1fcf911769..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/pmvxd.vpj
+++ /dev/null
@@ -1,34 +0,0 @@
-[SciTech]
-compiler=bc50-
-targetos=vxd
-[COMPILER]
-version=5.0b
-MACRO=enable_current_compiler\n
-activeconfig=,wc10-d32
-FILTERNAME=Source Files\nInclude Files\nAssembler Files\n
-FILTERPATTERN=*.c;*.cpp;*.cxx;*.prg;*.pas;*.dpr;*.bas;*.java;*.sc;*.e;*.cob;*.html;*.rc\n*.h\n*.asm\n
-FILTERASSOCIATEFILETYPES=0 0 0
-FILTERAPPCOMMAND=\n\n\n
-vcsproject=SCC:Perforce SCM://depot
-vcslocalpath=SCC:Perforce SCM:c:\
-compile=concur|capture|nochangedir|:Compile:&Compile,dmake %n.obj
-make=concur|capture|clear|saveall|nochangedir|:Build:&Build,dmake install
-rebuild=concur|capture|clear|saveall|nochangedir|:Rebuild:&Rebuild,dmake cleanexe & dmake install -u
-debug=concur|capture|hide|savenone|nochangedir|:Debug:&Debug,
-execute=hide|savenone|nochangedir|:Execute:E&xecute,
-user1=hide|:User 1:User 1,
-user2=hide|:User 2:User 2,
-usertool_clean_directory=concur|capture|hide|savenone|nochangedir|:Clean Directory:&Clean Directory,dmake cleanexe
-workingdir=.
-includedirs=%(SCITECH)\include;%(PRIVATE)\include
-reffile=
-[FILES]
-vxd\_pm.asm
-vxd\cpuinfo.c
-vxd\fileio.c
-vxd\oshdr.h
-vxd\pm.c
-vxd\vflat.c
-vxd\ztimer.c
-[ASSOCIATION]
-[CONFIGURATIONS]
diff --git a/board/MAI/bios_emulator/scitech/src/pm/pmwin32.vpj b/board/MAI/bios_emulator/scitech/src/pm/pmwin32.vpj
deleted file mode 100644
index ace682208c..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/pmwin32.vpj
+++ /dev/null
@@ -1,35 +0,0 @@
-[SciTech]
-compiler=vc60-
-targetos=c32
-[COMPILER]
-version=5.0b
-MACRO=enable_current_compiler\n
-activeconfig=,wc10-d32
-FILTERNAME=Source Files\nInclude Files\nAssembler Files\n
-FILTERPATTERN=*.c;*.cpp;*.cxx;*.prg;*.pas;*.dpr;*.bas;*.java;*.sc;*.e;*.cob;*.html;*.rc\n*.h\n*.asm\n
-FILTERASSOCIATEFILETYPES=0 0 0
-FILTERAPPCOMMAND=\n\n\n
-vcsproject=SCC:Perforce SCM://depot
-vcslocalpath=SCC:Perforce SCM:c:\
-compile=concur|capture|:Compile:&Compile,dmake %n.obj
-make=concur|capture|clear|saveall|:Build:&Build,dmake install
-rebuild=concur|capture|clear|saveall|:Rebuild:&Rebuild,dmake cleanexe & dmake install -u
-debug=concur|capture|hide|savenone|:Debug:&Debug,
-execute=hide|savenone|nochangedir|:Execute:E&xecute,
-user1=hide|:User 1:User 1,
-user2=hide|:User 2:User 2,
-usertool_clean_directory=concur|capture|savenone|:Clean Directory:&Clean Directory,dmake cleanexe
-workingdir=.
-includedirs=%(SCITECH)\include;%(PRIVATE)\include
-reffile=
-[FILES]
-win32\_pmwin32.asm
-win32\cpuinfo.c
-win32\ddraw.c
-win32\event.c
-win32\oshdr.h
-win32\pm.c
-win32\vflat.c
-win32\ztimer.c
-[ASSOCIATION]
-[CONFIGURATIONS]
diff --git a/board/MAI/bios_emulator/scitech/src/pm/qnx/_mtrrqnx.asm b/board/MAI/bios_emulator/scitech/src/pm/qnx/_mtrrqnx.asm
deleted file mode 100644
index 5a3fe105ec..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/qnx/_mtrrqnx.asm
+++ /dev/null
@@ -1,226 +0,0 @@
-;****************************************************************************
-;*
-;* SciTech OS Portability Manager Library
-;*
-;* ========================================================================
-;*
-;* The contents of this file are subject to the SciTech MGL Public
-;* License Version 1.0 (the "License"); you may not use this file
-;* except in compliance with the License. You may obtain a copy of
-;* the License at http://www.scitechsoft.com/mgl-license.txt
-;*
-;* Software distributed under the License is distributed on an
-;* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-;* implied. See the License for the specific language governing
-;* rights and limitations under the License.
-;*
-;* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-;*
-;* The Initial Developer of the Original Code is SciTech Software, Inc.
-;* All Rights Reserved.
-;*
-;* ========================================================================
-;*
-;* Language: NASM
-;* Environment: QNX
-;*
-;* Description: Assembler support routines for the Memory Type Range Register
-;* (MTRR) module for QNX.
-;*
-;****************************************************************************
-
- IDEAL
-
-include "scitech.mac" ; Memory model macros
-
-header _mtrrqnx ; Set up memory model
-
-begdataseg _mtrrqnx ; Start of code segment
-
-ifdef USE_NASM
-%define R0_FLUSH_TLB 0
-%define R0_SAVE_CR4 1
-%define R0_RESTORE_CR4 2
-%define R0_READ_MSR 3
-%define R0_WRITE_MSR 4
-else
-R0_FLUSH_TLB EQU 0
-R0_SAVE_CR4 EQU 1
-R0_RESTORE_CR4 EQU 2
-R0_READ_MSR EQU 3
-R0_WRITE_MSR EQU 4
-endif
-
-cpublic _PM_R0
-_PM_R0_service dd 0
-_PM_R0_reg dd 0
-_PM_R0_eax dd 0
-_PM_R0_edx dd 0
-
-enddataseg _mtrrqnx ; Start of code segment
-
-begcodeseg _mtrrqnx ; Start of code segment
-
-P586
-
-;----------------------------------------------------------------------------
-; ulong _MTRR_disableInt(void);
-;----------------------------------------------------------------------------
-; Return processor interrupt status and disable interrupts.
-;----------------------------------------------------------------------------
-cprocstart _MTRR_disableInt
-
- pushfd ; Put flag word on stack
-; cli ; Disable interrupts!
- pop eax ; deposit flag word in return register
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void _MTRR_restoreInt(ulong ps);
-;----------------------------------------------------------------------------
-; Restore processor interrupt status.
-;----------------------------------------------------------------------------
-cprocstart _MTRR_restoreInt
-
- ARG ps:ULONG
-
- push ebp
- mov ebp,esp ; Set up stack frame
- push [ULONG ps]
- popfd ; Restore processor status (and interrupts)
- pop ebp
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; uchar _MTRR_getCx86(uchar reg);
-;----------------------------------------------------------------------------
-; Read a Cyrix CPU indexed register
-;----------------------------------------------------------------------------
-cprocstart _MTRR_getCx86
-
- ARG reg:UCHAR
-
- enter_c
- mov al,[reg]
- out 22h,al
- in al,23h
- leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; uchar _MTRR_setCx86(uchar reg,uchar val);
-;----------------------------------------------------------------------------
-; Write a Cyrix CPU indexed register
-;----------------------------------------------------------------------------
-cprocstart _MTRR_setCx86
-
- ARG reg:UCHAR, val:UCHAR
-
- enter_c
- mov al,[reg]
- out 22h,al
- mov al,[val]
- out 23h,al
- leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; ulong _PM_ring0_isr(void);
-;----------------------------------------------------------------------------
-; Ring 0 clock interrupt handler that we use to execute the MTRR support
-; code.
-;----------------------------------------------------------------------------
-cprocnear _PM_ring0_isr
-
-;--------------------------------------------------------
-; void PM_flushTLB(void);
-;--------------------------------------------------------
- pushad
- cmp [DWORD _PM_R0_service],R0_FLUSH_TLB
- jne @@1
- wbinvd ; Flush the CPU cache
- mov eax,cr3
- mov cr3,eax ; Flush the TLB
- jmp @@Exit
-
-;--------------------------------------------------------
-; ulong _MTRR_saveCR4(void);
-;--------------------------------------------------------
-@@1: cmp [DWORD _PM_R0_service],R0_SAVE_CR4
- jne @@2
-
-; Save value of CR4 and clear Page Global Enable (bit 7)
-
- mov ebx,cr4
- mov eax,ebx
- and al,7Fh
- mov cr4,eax
-
-; Disable and flush caches
-
- mov eax,cr0
- or eax,40000000h
- wbinvd
- mov cr0,eax
- wbinvd
-
-; Return value from CR4
-
- mov [_PM_R0_reg],ebx
- jmp @@Exit
-
-;--------------------------------------------------------
-; void _MTRR_restoreCR4(ulong cr4Val)
-;--------------------------------------------------------
-@@2: cmp [DWORD _PM_R0_service],R0_RESTORE_CR4
- jne @@3
-
- mov eax,cr0
- and eax,0BFFFFFFFh
- mov cr0,eax
- mov eax,[_PM_R0_reg]
- mov cr4,eax
- jmp @@Exit
-
-;--------------------------------------------------------
-; void _MTRR_readMSR(int reg, ulong FAR *eax, ulong FAR *edx);
-;--------------------------------------------------------
-@@3: cmp [DWORD _PM_R0_service],R0_READ_MSR
- jne @@4
-
- mov ecx,[_PM_R0_reg]
- rdmsr
- mov [_PM_R0_eax],eax
- mov [_PM_R0_edx],edx
- jmp @@Exit
-
-;--------------------------------------------------------
-; void _MTRR_writeMSR(int reg, ulong eax, ulong edx);
-;--------------------------------------------------------
-@@4: cmp [DWORD _PM_R0_service],R0_WRITE_MSR
- jne @@Exit
-
- mov ecx,[_PM_R0_reg]
- mov eax,[_PM_R0_eax]
- mov edx,[_PM_R0_edx]
- wrmsr
- jmp @@Exit
-
-@@Exit: mov [DWORD _PM_R0_service],-1
- popad
- mov eax,0
- retf
-
-cprocend
-
-endcodeseg _mtrrqnx
-
- END ; End of module
diff --git a/board/MAI/bios_emulator/scitech/src/pm/qnx/cpuinfo.c b/board/MAI/bios_emulator/scitech/src/pm/qnx/cpuinfo.c
deleted file mode 100644
index a8782542b2..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/qnx/cpuinfo.c
+++ /dev/null
@@ -1,64 +0,0 @@
-/****************************************************************************
-*
-* Ultra Long Period Timer
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: QNX
-*
-* Description: QNX specific code for the CPU detection module.
-*
-****************************************************************************/
-
-/*----------------------------- Implementation ----------------------------*/
-
-/****************************************************************************
-REMARKS:
-TODO: We should implement this for QNX!
-****************************************************************************/
-#define SetMaxThreadPriority() 0
-
-/****************************************************************************
-REMARKS:
-TODO: We should implement this for QNX!
-****************************************************************************/
-#define RestoreThreadPriority(i)
-
-/****************************************************************************
-REMARKS:
-Initialise the counter and return the frequency of the counter.
-****************************************************************************/
-static void GetCounterFrequency(
- CPU_largeInteger *freq)
-{
- freq->low = CLOCKS_PER_SEC * 1000;
- freq->high = 0;
-}
-
-/****************************************************************************
-REMARKS:
-Read the counter and return the counter value.
-****************************************************************************/
-#define GetCounter(t) \
-{ \
- (t)->low = clock() * 1000; \
- (t)->high = 0; \
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/qnx/event.c b/board/MAI/bios_emulator/scitech/src/pm/qnx/event.c
deleted file mode 100644
index 45cd514454..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/qnx/event.c
+++ /dev/null
@@ -1,601 +0,0 @@
-/****************************************************************************
-*
-* SciTech Multi-platform Graphics Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: QNX
-*
-* Description: QNX fullscreen console implementation for the SciTech
-* cross platform event library.
-*
-****************************************************************************/
-
-#include <errno.h>
-#include <unistd.h>
-
-/*--------------------------- Global variables ----------------------------*/
-
-#ifndef __QNXNTO__
-static struct _mouse_ctrl *_PM_mouse_ctl;
-static int _PM_keyboard_fd = -1;
-/*static int _PM_modifiers, _PM_leds; */
-#else
-static int kbd_fd = -1, mouse_fd = -1;
-#endif
-static int kill_pid = 0;
-static ushort keyUpMsg[256] = {0};/* Table of key up messages */
-static int rangeX,rangeY; /* Range of mouse coordinates */
-
-#define TIME_TO_MSEC(__t) ((__t).tv_nsec / 1000000 + (__t).tv_sec * 1000)
-
-#define LED_NUM 1
-#define LED_CAP 2
-#define LED_SCR 4
-
-/* Scancode mappings on QNX for special keys */
-
-typedef struct {
- int scan;
- int map;
- } keymap;
-
-/* TODO: Fix this and set it up so we can do a binary search! */
-
-keymap keymaps[] = {
- {96, KB_padEnter},
- {74, KB_padMinus},
- {78, KB_padPlus},
- {55, KB_padTimes},
- {98, KB_padDivide},
- {71, KB_padHome},
- {72, KB_padUp},
- {73, KB_padPageUp},
- {75, KB_padLeft},
- {76, KB_padCenter},
- {77, KB_padRight},
- {79, KB_padEnd},
- {80, KB_padDown},
- {81, KB_padPageDown},
- {82, KB_padInsert},
- {83, KB_padDelete},
- {105,KB_left},
- {108,KB_down},
- {106,KB_right},
- {103,KB_up},
- {110,KB_insert},
- {102,KB_home},
- {104,KB_pageUp},
- {111,KB_delete},
- {107,KB_end},
- {109,KB_pageDown},
- {125,KB_leftWindows},
- {126,KB_rightWindows},
- {127,KB_menu},
- {100,KB_rightAlt},
- {97,KB_rightCtrl},
- };
-
-/* And the keypad with num lock turned on (changes the ASCII code only) */
-
-keymap keypad[] = {
- {71, ASCII_7},
- {72, ASCII_8},
- {73, ASCII_9},
- {75, ASCII_4},
- {76, ASCII_5},
- {77, ASCII_6},
- {79, ASCII_1},
- {80, ASCII_2},
- {81, ASCII_3},
- {82, ASCII_0},
- {83, ASCII_period},
- };
-
-#define NB_KEYMAPS (sizeof(keymaps)/sizeof(keymaps[0]))
-#define NB_KEYPAD (sizeof(keypad)/sizeof(keypad[0]))
-
-/*---------------------------- Implementation -----------------------------*/
-
-/****************************************************************************
-REMARKS:
-Include generic raw scancode keyboard module.
-****************************************************************************/
-#include "common/keyboard.c"
-
-/* These are not used under QNX */
-#define _EVT_disableInt() 1
-#define _EVT_restoreInt(flags)
-
-/****************************************************************************
-REMARKS:
-This function is used to return the number of ticks since system
-startup in milliseconds. This should be the same value that is placed into
-the time stamp fields of events, and is used to implement auto mouse down
-events.
-****************************************************************************/
-ulong _EVT_getTicks(void)
-{
- struct timespec t;
- clock_gettime(CLOCK_REALTIME,&t);
- return (t.tv_nsec / 1000000 + t.tv_sec * 1000);
-}
-
-/****************************************************************************
-REMARKS:
-Converts a mickey movement value to a pixel adjustment value.
-****************************************************************************/
-static int MickeyToPixel(
- int mickey)
-{
- /* TODO: We can add some code in here to handle 'acceleration' for */
- /* the mouse cursor. For now just use the mickeys. */
- return mickey;
-}
-
-#ifdef __QNXNTO__
-/****************************************************************************
-REMARKS:
-Retrieves all events from the mouse/keyboard event queue and stuffs them
-into the MGL event queue for further processing.
-****************************************************************************/
-static void _EVT_pumpMessages(void)
-{
- int rc1, rc2;
- struct _keyboard_packet key;
- struct _mouse_packet ms;
- static long old_buttons = 0;
- uint message = 0, but_stat = 0, mods = 0;
- event_t evt;
-
- while (EVT.count < EVENTQSIZE) {
- rc1 = read(kbd_fd, (void *)&key, sizeof(key));
- if (rc1 == -1) {
- if (errno == EAGAIN)
- rc1 = 0;
- else {
- perror("getEvents");
- PM_fatalError("Keyboard error");
- }
- }
- if (rc1 > 0) {
- memset(&evt, 0, sizeof(evt));
- if (key.data.modifiers & KEYMOD_SHIFT)
- mods |= EVT_LEFTSHIFT;
- if (key.data.modifiers & KEYMOD_CTRL)
- mods |= EVT_CTRLSTATE;
- if (key.data.modifiers & KEYMOD_ALT)
- mods |= EVT_ALTSTATE;
-
- /* Now store the keyboard event data */
- evt.when = TIME_TO_MSEC(key.time);
- if (key.data.flags & KEY_SCAN_VALID)
- evt.message |= (key.data.key_scan & 0x7F) << 8;
- if ((key.data.flags & KEY_SYM_VALID) &&
- (((key.data.key_sym & 0xff00) == 0xf000 &&
- (key.data.key_sym & 0xff) < 0x20) ||
- key.data.key_sym < 0x80))
- evt.message |= (key.data.key_sym & 0xFF);
- evt.modifiers = mods;
- if (key.data.flags & KEY_DOWN) {
- evt.what = EVT_KEYDOWN;
- keyUpMsg[evt.message >> 8] = (ushort)evt.message;
- }
- else if (key.data.flags & KEY_REPEAT) {
- evt.message |= 0x10000;
- evt.what = EVT_KEYREPEAT;
- }
- else {
- evt.what = EVT_KEYUP;
- evt.message = keyUpMsg[evt.message >> 8];
- if (evt.message == 0)
- continue;
- keyUpMsg[evt.message >> 8] = 0;
- }
-
- /* Now add the new event to the event queue */
- addEvent(&evt);
- }
- rc2 = read(mouse_fd, (void *)&ms, sizeof (ms));
- if (rc2 == -1) {
- if (errno == EAGAIN)
- rc2 = 0;
- else {
- perror("getEvents");
- PM_fatalError("Mouse error");
- }
- }
- if (rc2 > 0) {
- memset(&evt, 0, sizeof(evt));
- ms.hdr.buttons &=
- (_POINTER_BUTTON_LEFT | _POINTER_BUTTON_RIGHT);
- if (ms.hdr.buttons & _POINTER_BUTTON_LEFT)
- but_stat = EVT_LEFTBUT;
- if ((ms.hdr.buttons & _POINTER_BUTTON_LEFT) !=
- (old_buttons & _POINTER_BUTTON_LEFT))
- message = EVT_LEFTBMASK;
- if (ms.hdr.buttons & _POINTER_BUTTON_RIGHT)
- but_stat |= EVT_RIGHTBUT;
- if ((ms.hdr.buttons & _POINTER_BUTTON_RIGHT) !=
- (old_buttons & _POINTER_BUTTON_RIGHT))
- message |= EVT_RIGHTBMASK;
- if (ms.dx || ms.dy) {
- ms.dy = -ms.dy;
- EVT.mx += MickeyToPixel(ms.dx);
- EVT.my += MickeyToPixel(ms.dy);
- if (EVT.mx < 0) EVT.mx = 0;
- if (EVT.my < 0) EVT.my = 0;
- if (EVT.mx > rangeX) EVT.mx = rangeX;
- if (EVT.my > rangeY) EVT.my = rangeY;
- evt.what = EVT_MOUSEMOVE;
- evt.when = TIME_TO_MSEC(ms.hdr.time);
- evt.where_x = EVT.mx;
- evt.where_y = EVT.my;
- evt.relative_x = ms.dx;
- evt.relative_y = ms.dy;
- evt.modifiers = but_stat;
- addEvent(&evt);
- }
- evt.what = ms.hdr.buttons < old_buttons ?
- EVT_MOUSEUP : EVT_MOUSEDOWN;
- evt.when = TIME_TO_MSEC(ms.hdr.time);
- evt.where_x = EVT.mx;
- evt.where_y = EVT.my;
- evt.relative_x = ms.dx;
- evt.relative_y = ms.dy;
- evt.modifiers = but_stat;
- evt.message = message;
- if (ms.hdr.buttons != old_buttons) {
- addEvent(&evt);
- old_buttons = ms.hdr.buttons;
- }
- }
- if (rc1 + rc2 == 0)
- break;
- }
-}
-#else
-/****************************************************************************
-REMARKS:
-Retrieves all events from the mouse/keyboard event queue and stuffs them
-into the MGL event queue for further processing.
-****************************************************************************/
-static void _EVT_pumpMessages(void)
-{
- struct mouse_event ev;
- int rc;
- static long old_buttons = 0;
- uint message = 0, but_stat = 0;
- event_t evt;
- char buf[32];
- int numkeys, i;
-
- /* Poll keyboard events */
- while ((numkeys = read(_PM_keyboard_fd, buf, sizeof buf)) > 0) {
- for (i = 0; i < numkeys; i++) {
- processRawScanCode(buf[i]);
- }
- }
-
- if (_PM_mouse_ctl == NULL)
- return;
-
- /* Gobble pending mouse events */
- while (EVT.count < EVENTQSIZE) {
- rc = mouse_read(_PM_mouse_ctl, &ev, 1, 0, NULL);
- if (rc == -1) {
- perror("getEvents");
- PM_fatalError("Mouse error (Input terminated?)");
- }
- if (rc == 0)
- break;
-
- message = 0, but_stat = 0;
- memset(&evt, 0, sizeof(evt));
-
- ev.buttons &= (_MOUSE_LEFT | _MOUSE_RIGHT);
- if (ev.buttons & _MOUSE_LEFT)
- but_stat = EVT_LEFTBUT;
- if ((ev.buttons & _MOUSE_LEFT) != (old_buttons & _MOUSE_LEFT))
- message = EVT_LEFTBMASK;
- if (ev.buttons & _MOUSE_RIGHT)
- but_stat |= EVT_RIGHTBUT;
- if ((ev.buttons & _MOUSE_RIGHT) != (old_buttons & _MOUSE_RIGHT))
- message |= EVT_RIGHTBMASK;
- if (ev.dx || ev.dy) {
- ev.dy = -ev.dy;
- EVT.mx += MickeyToPixel(ev.dx);
- EVT.my += MickeyToPixel(ev.dy);
- if (EVT.mx < 0) EVT.mx = 0;
- if (EVT.my < 0) EVT.my = 0;
- if (EVT.mx > rangeX) EVT.mx = rangeX;
- if (EVT.my > rangeY) EVT.my = rangeY;
- evt.what = EVT_MOUSEMOVE;
- evt.when = ev.timestamp*100;
- evt.where_x = EVT.mx;
- evt.where_y = EVT.my;
- evt.relative_x = ev.dx;
- evt.relative_y = ev.dy;
- evt.modifiers = but_stat;
- addEvent(&evt);
- }
- evt.what = ev.buttons < old_buttons ? EVT_MOUSEUP : EVT_MOUSEDOWN;
- evt.when = ev.timestamp*100;
- evt.where_x = EVT.mx;
- evt.where_y = EVT.my;
- evt.relative_x = ev.dx;
- evt.relative_y = ev.dy;
- evt.modifiers = but_stat;
- evt.message = message;
- if (ev.buttons != old_buttons) {
- addEvent(&evt);
- old_buttons = ev.buttons;
- }
- }
-}
-#endif /* __QNXNTO__ */
-
-/****************************************************************************
-REMARKS:
-This macro/function is used to converts the scan codes reported by the
-keyboard to our event libraries normalised format. We only have one scan
-code for the 'A' key, and use shift modifiers to determine if it is a
-Ctrl-F1, Alt-F1 etc. The raw scan codes from the keyboard work this way,
-but the OS gives us 'cooked' scan codes, we have to translate them back
-to the raw format.
-****************************************************************************/
-#define _EVT_maskKeyCode(evt)
-
-/****************************************************************************
-REMARKS:
-Safely abort the event module upon catching a fatal error.
-****************************************************************************/
-void _EVT_abort(
- int signo)
-{
- char buf[80];
-
- EVT_exit();
- sprintf(buf,"Terminating on signal %d",signo);
- PM_fatalError(buf);
-}
-
-/****************************************************************************
-PARAMETERS:
-mouseMove - Callback function to call wheneve the mouse needs to be moved
-
-REMARKS:
-Initiliase the event handling module. Here we install our mouse handling ISR
-to be called whenever any button's are pressed or released. We also build
-the free list of events in the event queue.
-
-We use handler number 2 of the mouse libraries interrupt handlers for our
-event handling routines.
-****************************************************************************/
-void EVTAPI EVT_init(
- _EVT_mouseMoveHandler mouseMove)
-{
- int i;
- struct stat st;
- char *iarg[16];
-#ifdef __QNXNTO__
- char buf[128];
- FILE *p;
- int argno,len;
-#endif
-
-#ifdef __QNXNTO__
- ThreadCtl(_NTO_TCTL_IO, 0); /* So joystick code won't blow up */
-#endif
-
- /* Initialise the event queue */
- EVT.mouseMove = mouseMove;
- initEventQueue();
- memset(keyUpMsg,0,sizeof(keyUpMsg));
-
-#ifdef __QNXNTO__
- /*
- * User may already have input running with the right parameters.
- * Thus they could start input at boot time, using the output of
- * inputtrap, passing the the -r flag to make it run as a resource
- * manager.
- */
- if ((mouse_fd = open("/dev/mouse0", O_RDONLY | O_NONBLOCK)) < 0) {
- /* Run inputtrap to get the args for input */
- if ((p = popen("inputtrap", "r")) == NULL)
- PM_fatalError("Error running 'inputtrap'");
- fgets(buf, sizeof(buf), p);
- pclose(p);
-
- /* Build the argument list */
- len = strlen(buf);
- iarg[0] = buf;
- for (i = 0, argno = 0; i < len && argno < 15;) {
- if (argno == 1) {
- /*
- * Add flags to input's arg list.
- * '-r' means run as resource
- * manager, providing the /dev/mouse
- * and /dev/keyboard interfaces.
- * '-P' supresses the /dev/photon
- * mechanism.
- */
- iarg[argno++] = "-Pr";
- continue;
- }
- while (buf[i] == ' ')
- i++;
- if (buf[i] == '\0' || buf[i] == '\n')
- break;
- iarg[argno++] = &buf[i];
- while (buf[i] != ' '
- && buf[i] != '\0' && buf[i] != '\n')
- i++;
- buf[i++] = '\0';
- }
- iarg[argno] = NULL;
-
- if ((kill_pid = spawnvp(P_NOWAITO, iarg[0], iarg)) == -1) {
- perror("spawning input resmgr");
- PM_fatalError("Could not start input resmgr");
- }
- for (i = 0; i < 10; i++) {
- if (stat("/dev/mouse0", &st) == 0)
- break;
- sleep(1);
- }
- if ((mouse_fd = open("/dev/mouse0", O_RDONLY|O_NONBLOCK)) < 0) {
- perror("/dev/mouse0");
- PM_fatalError("Could not open /dev/mouse0");
- }
- }
- if ((kbd_fd = open("/dev/keyboard0", O_RDONLY|O_NONBLOCK)) < 0) {
- perror("/dev/keyboard0");
- PM_fatalError("Could not open /dev/keyboard0");
- }
-#else
- /* Connect to Input/Mouse for event handling */
- if (_PM_mouse_ctl == NULL) {
- _PM_mouse_ctl = mouse_open(0, "/dev/mouse", 0);
-
- /* "Mouse" is not running; attempt to start it */
- if (_PM_mouse_ctl == NULL) {
- iarg[0] = "mousetrap";
- iarg[1] = "start";
- iarg[2] = NULL;
- if ((kill_pid = spawnvp(P_NOWAITO, iarg[0], (void*)iarg)) == -1)
- perror("spawn (mousetrap)");
- else {
- for (i = 0; i < 10; i++) {
- if (stat("/dev/mouse", &st) == 0)
- break;
- sleep(1);
- }
- _PM_mouse_ctl = mouse_open(0, "/dev/mouse", 0);
- }
- }
- }
- if (_PM_keyboard_fd == -1)
- _PM_keyboard_fd = open("/dev/kbd", O_RDONLY|O_NONBLOCK);
-#endif
-
- /* Catch program termination signals so we can clean up properly */
- signal(SIGABRT, _EVT_abort);
- signal(SIGFPE, _EVT_abort);
- signal(SIGINT, _EVT_abort);
-}
-
-/****************************************************************************
-REMARKS
-Changes the range of coordinates returned by the mouse functions to the
-specified range of values. This is used when changing between graphics
-modes set the range of mouse coordinates for the new display mode.
-****************************************************************************/
-void EVTAPI EVT_setMouseRange(
- int xRes,
- int yRes)
-{
- rangeX = xRes;
- rangeY = yRes;
-}
-
-/****************************************************************************
-REMARKS
-Modifes the mouse coordinates as necessary if scaling to OS coordinates,
-and sets the OS mouse cursor position.
-****************************************************************************/
-#define _EVT_setMousePos(x,y)
-
-/****************************************************************************
-REMARKS:
-Initiailises the internal event handling modules. The EVT_suspend function
-can be called to suspend event handling (such as when shelling out to DOS),
-and this function can be used to resume it again later.
-****************************************************************************/
-void EVT_resume(void)
-{
- /* Do nothing for QNX */
-}
-
-/****************************************************************************
-REMARKS
-Suspends all of our event handling operations. This is also used to
-de-install the event handling code.
-****************************************************************************/
-void EVT_suspend(void)
-{
- /* Do nothing for QNX */
-}
-
-/****************************************************************************
-REMARKS
-Exits the event module for program terminatation.
-****************************************************************************/
-void EVT_exit(void)
-{
-#ifdef __QNXNTO__
- char c;
- int flags;
-
- if (kbd_fd != -1) {
- close(kbd_fd);
- kbd_fd = -1;
- }
- if (mouse_fd != -1) {
- close(mouse_fd);
- mouse_fd = -1;
- }
-#endif
-
- /* Restore signal handlers */
- signal(SIGABRT, SIG_DFL);
- signal(SIGFPE, SIG_DFL);
- signal(SIGINT, SIG_DFL);
-
-#ifndef __QNXNTO__
- /* Kill the Input/Mouse driver if we have spawned it */
- if (_PM_mouse_ctl != NULL) {
- struct _fd_entry fde;
- uint pid = 0;
-
- /* Find out the pid of the mouse driver */
- if (kill_pid > 0) {
- if (qnx_fd_query(0,
- 0, _PM_mouse_ctl->fd, &fde) != -1)
- pid = fde.pid;
- }
- mouse_close(_PM_mouse_ctl);
- _PM_mouse_ctl = NULL;
-
- if (pid > 0) {
- /* For some reasons the PID's are different under QNX4,
- * so we use the old mechanism to kill the mouse server.
- */
- kill(pid, SIGTERM);
- kill_pid = 0;
- }
- }
-#endif
- if (kill_pid > 0) {
- kill(kill_pid, SIGTERM);
- kill_pid = 0;
- }
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/qnx/mtrrqnx.c b/board/MAI/bios_emulator/scitech/src/pm/qnx/mtrrqnx.c
deleted file mode 100644
index f960c75714..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/qnx/mtrrqnx.c
+++ /dev/null
@@ -1,182 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: QNX
-*
-* Description: MTRR helper functions module. To make it easier to implement
-* the MTRR support under QNX, we simply put our ring 0 helper
-* functions into stubs that run them at ring 0 using whatever
-* mechanism is available.
-*
-****************************************************************************/
-
-#include "pmapi.h"
-#include <stdio.h>
-#include <sys/mman.h>
-#include <time.h>
-#ifdef __QNXNTO__
-#include <sys/neutrino.h>
-#include <sys/syspage.h>
-#else
-#include <i86.h>
-#include <sys/irqinfo.h>
-#endif
-
-/*--------------------------- Global variables ----------------------------*/
-
-#define R0_FLUSH_TLB 0
-#define R0_SAVE_CR4 1
-#define R0_RESTORE_CR4 2
-#define R0_READ_MSR 3
-#define R0_WRITE_MSR 4
-
-typedef struct {
- int service;
- int reg;
- ulong eax;
- ulong edx;
- } R0_data;
-
-extern volatile R0_data _PM_R0;
-
-/*----------------------------- Implementation ----------------------------*/
-
-#ifdef __QNXNTO__
-const struct sigevent * _ASMAPI _PM_ring0_isr(void *arg, int id);
-#else
-pid_t far _ASMAPI _PM_ring0_isr();
-#endif
-
-/****************************************************************************
-REMARKS:
-Return true if ring 0 (or if we can call the helpers functions at ring 0)
-****************************************************************************/
-ibool _ASMAPI _MTRR_isRing0(void)
-{
-#ifdef __QNXNTO__
- return false; /* Not implemented yet! */
-#else
- return true;
-#endif
-}
-
-/****************************************************************************
-REMARKS:
-Function to execute a service at ring 0. This is done using the clock
-interrupt handler since the code we attach to it will always run at ring 0.
-****************************************************************************/
-static void CallRing0(void)
-{
-#ifdef __QNXNTO__
- uint clock_intno = SYSPAGE_ENTRY(qtime)->intr;
-#else
- uint clock_intno = 0; /* clock irq */
-#endif
- int intrid;
-
-#ifdef __QNXNTO__
- mlock((void*)&_PM_R0, sizeof(_PM_R0));
- ThreadCtl(_NTO_TCTL_IO, 0);
-#endif
-#ifdef __QNXNTO__
- if ((intrid = InterruptAttach(_NTO_INTR_CLASS_EXTERNAL | clock_intno,
- _PM_ring0_isr, (void*)&_PM_R0, sizeof(_PM_R0), _NTO_INTR_FLAGS_END)) == -1) {
-#else
- if ((intrid = qnx_hint_attach(clock_intno, _PM_ring0_isr, FP_SEG(&_PM_R0))) == -1) {
-#endif
- perror("Attach");
- exit(-1);
- }
- while (_PM_R0.service != -1)
- ;
-#ifdef __QNXNTO__
- InterruptDetachId(intrid);
-#else
- qnx_hint_detach(intrid);
-#endif
-}
-
-/****************************************************************************
-REMARKS:
-Flush the translation lookaside buffer.
-****************************************************************************/
-void PMAPI PM_flushTLB(void)
-{
- _PM_R0.service = R0_FLUSH_TLB;
- CallRing0();
-}
-
-/****************************************************************************
-REMARKS:
-Read and return the value of the CR4 register
-****************************************************************************/
-ulong _ASMAPI _MTRR_saveCR4(void)
-{
- _PM_R0.service = R0_SAVE_CR4;
- CallRing0();
- return _PM_R0.reg;
-}
-
-/****************************************************************************
-REMARKS:
-Restore the value of the CR4 register
-****************************************************************************/
-void _ASMAPI _MTRR_restoreCR4(ulong cr4Val)
-{
- _PM_R0.service = R0_RESTORE_CR4;
- _PM_R0.reg = cr4Val;
- CallRing0();
-}
-
-/****************************************************************************
-REMARKS:
-Read a machine status register for the CPU.
-****************************************************************************/
-void _ASMAPI _MTRR_readMSR(
- int reg,
- ulong *eax,
- ulong *edx)
-{
- _PM_R0.service = R0_READ_MSR;
- _PM_R0.reg = reg;
- CallRing0();
- *eax = _PM_R0.eax;
- *edx = _PM_R0.edx;
-}
-
-/****************************************************************************
-REMARKS:
-Write a machine status register for the CPU.
-****************************************************************************/
-void _ASMAPI _MTRR_writeMSR(
- int reg,
- ulong eax,
- ulong edx)
-{
- _PM_R0.service = R0_WRITE_MSR;
- _PM_R0.reg = reg;
- _PM_R0.eax = eax;
- _PM_R0.edx = edx;
- CallRing0();
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/qnx/oshdr.h b/board/MAI/bios_emulator/scitech/src/pm/qnx/oshdr.h
deleted file mode 100644
index 0961193049..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/qnx/oshdr.h
+++ /dev/null
@@ -1,103 +0,0 @@
-/****************************************************************************
-*
-* SciTech Multi-platform Graphics Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: QNX
-*
-* Description: Include file to include all OS specific header files.
-*
-****************************************************************************/
-
-#include <sys/stat.h>
-#include <fcntl.h>
-#include <process.h>
-#include <time.h>
-#ifndef __QNXNTO__
-#include <sys/mouse.h>
-#include <sys/keyboard.h>
-#include <sys/fd.h>
-#include <conio.h>
-#else
-#include <sys/dcmd_input.h>
-
-/* Things 'borrowed' from photon/keycodes.h */
-
-/*
- * Keyboard modifiers
- */
-#define KEYMODBIT_SHIFT 0
-#define KEYMODBIT_CTRL 1
-#define KEYMODBIT_ALT 2
-#define KEYMODBIT_ALTGR 3
-#define KEYMODBIT_SHL3 4
-#define KEYMODBIT_MOD6 5
-#define KEYMODBIT_MOD7 6
-#define KEYMODBIT_MOD8 7
-
-#define KEYMODBIT_SHIFT_LOCK 8
-#define KEYMODBIT_CTRL_LOCK 9
-#define KEYMODBIT_ALT_LOCK 10
-#define KEYMODBIT_ALTGR_LOCK 11
-#define KEYMODBIT_SHL3_LOCK 12
-#define KEYMODBIT_MOD6_LOCK 13
-#define KEYMODBIT_MOD7_LOCK 14
-#define KEYMODBIT_MOD8_LOCK 15
-
-#define KEYMODBIT_CAPS_LOCK 16
-#define KEYMODBIT_NUM_LOCK 17
-#define KEYMODBIT_SCROLL_LOCK 18
-
-#define KEYMOD_SHIFT (1 << KEYMODBIT_SHIFT)
-#define KEYMOD_CTRL (1 << KEYMODBIT_CTRL)
-#define KEYMOD_ALT (1 << KEYMODBIT_ALT)
-#define KEYMOD_ALTGR (1 << KEYMODBIT_ALTGR)
-#define KEYMOD_SHL3 (1 << KEYMODBIT_SHL3)
-#define KEYMOD_MOD6 (1 << KEYMODBIT_MOD6)
-#define KEYMOD_MOD7 (1 << KEYMODBIT_MOD7)
-#define KEYMOD_MOD8 (1 << KEYMODBIT_MOD8)
-
-#define KEYMOD_SHIFT_LOCK (1 << KEYMODBIT_SHIFT_LOCK)
-#define KEYMOD_CTRL_LOCK (1 << KEYMODBIT_CTRL_LOCK)
-#define KEYMOD_ALT_LOCK (1 << KEYMODBIT_ALT_LOCK)
-#define KEYMOD_ALTGR_LOCK (1 << KEYMODBIT_ALTGR_LOCK)
-#define KEYMOD_SHL3_LOCK (1 << KEYMODBIT_SHL3_LOCK)
-#define KEYMOD_MOD6_LOCK (1 << KEYMODBIT_MOD6_LOCK)
-#define KEYMOD_MOD7_LOCK (1 << KEYMODBIT_MOD7_LOCK)
-#define KEYMOD_MOD8_LOCK (1 << KEYMODBIT_MOD8_LOCK)
-
-#define KEYMOD_CAPS_LOCK (1 << KEYMODBIT_CAPS_LOCK)
-#define KEYMOD_NUM_LOCK (1 << KEYMODBIT_NUM_LOCK)
-#define KEYMOD_SCROLL_LOCK (1 << KEYMODBIT_SCROLL_LOCK)
-
-/*
- * Keyboard flags
- */
-#define KEY_DOWN 0x00000001 /* Key was pressed down */
-#define KEY_REPEAT 0x00000002 /* Key was repeated */
-#define KEY_SCAN_VALID 0x00000020 /* Scancode is valid */
-#define KEY_SYM_VALID 0x00000040 /* Key symbol is valid */
-#define KEY_CAP_VALID 0x00000080 /* Key cap is valid */
-#define KEY_DEAD 0x40000000 /* Key symbol is a DEAD key */
-#define KEY_OEM_CAP 0x80000000 /* Key cap is an OEM scan code from keyboard */
-
-#endif /* __QNXNTO__ */
diff --git a/board/MAI/bios_emulator/scitech/src/pm/qnx/pm.c b/board/MAI/bios_emulator/scitech/src/pm/qnx/pm.c
deleted file mode 100644
index c993ee0837..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/qnx/pm.c
+++ /dev/null
@@ -1,891 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: QNX
-*
-* Description: Implementation for the OS Portability Manager Library, which
-* contains functions to implement OS specific services in a
-* generic, cross platform API. Porting the OS Portability
-* Manager library is the first step to porting any SciTech
-* products to a new platform.
-*
-****************************************************************************/
-
-#include "pmapi.h"
-#include "drvlib/os/os.h"
-#include "mtrr.h"
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <time.h>
-#include <unistd.h>
-#include <termios.h>
-#include <fcntl.h>
-#include <malloc.h>
-#include <sys/mman.h>
-#include "qnx/vbios.h"
-#ifndef __QNXNTO__
-#include <sys/seginfo.h>
-#include <sys/console.h>
-#include <conio.h>
-#include <i86.h>
-#else
-#include <sys/neutrino.h>
-#include <sys/dcmd_chr.h>
-#endif
-
-/*--------------------------- Global variables ----------------------------*/
-
-static uint VESABuf_len = 1024; /* Length of the VESABuf buffer */
-static void *VESABuf_ptr = NULL; /* Near pointer to VESABuf */
-static uint VESABuf_rseg; /* Real mode segment of VESABuf */
-static uint VESABuf_roff; /* Real mode offset of VESABuf */
-static VBIOSregs_t *VRegs = NULL; /* Pointer to VBIOS registers */
-static int raw_count = 0;
-static struct _console_ctrl *cc = NULL;
-static int console_count = 0;
-static int rmbuf_inuse = 0;
-
-static void (PMAPIP fatalErrorCleanup)(void) = NULL;
-
-/*----------------------------- Implementation ----------------------------*/
-
-void PMAPI PM_init(void)
-{
- char *force;
-
- if (VRegs == NULL) {
-#ifdef __QNXNTO__
- ThreadCtl(_NTO_TCTL_IO, 0); /* Get IO privilidge */
-#endif
- force = getenv("VBIOS_METHOD");
- VRegs = VBIOSinit(force ? atoi(force) : 0);
- }
-#ifndef __QNXNTO__
- MTRR_init();
-#endif
-}
-
-ibool PMAPI PM_haveBIOSAccess(void)
-{ return VRegs != NULL; }
-
-long PMAPI PM_getOSType(void)
-{ return _OS_QNX; }
-
-int PMAPI PM_getModeType(void)
-{ return PM_386; }
-
-void PMAPI PM_backslash(char *s)
-{
- uint pos = strlen(s);
- if (s[pos-1] != '/') {
- s[pos] = '/';
- s[pos+1] = '\0';
- }
-}
-
-void PMAPI PM_setFatalErrorCleanup(
- void (PMAPIP cleanup)(void))
-{
- fatalErrorCleanup = cleanup;
-}
-
-void PMAPI PM_fatalError(const char *msg)
-{
- if (fatalErrorCleanup)
- fatalErrorCleanup();
- fprintf(stderr,"%s\n", msg);
- exit(1);
-}
-
-static void ExitVBEBuf(void)
-{
- if (VESABuf_ptr)
- PM_freeRealSeg(VESABuf_ptr);
- VESABuf_ptr = 0;
-}
-
-void * PMAPI PM_getVESABuf(uint *len,uint *rseg,uint *roff)
-{
- if (!VESABuf_ptr) {
- /* Allocate a global buffer for communicating with the VESA VBE */
- if ((VESABuf_ptr = PM_allocRealSeg(VESABuf_len, &VESABuf_rseg, &VESABuf_roff)) == NULL)
- return NULL;
- atexit(ExitVBEBuf);
- }
- *len = VESABuf_len;
- *rseg = VESABuf_rseg;
- *roff = VESABuf_roff;
- return VESABuf_ptr;
-}
-
-static int term_raw(void)
-{
- struct termios termios_p;
-
- if (raw_count++ > 0)
- return 0;
-
- /* Go into "raw" input mode */
- if (tcgetattr(STDIN_FILENO, &termios_p))
- return -1;
-
- termios_p.c_cc[VMIN] = 1;
- termios_p.c_cc[VTIME] = 0;
- termios_p.c_lflag &= ~( ECHO|ICANON|ISIG|ECHOE|ECHOK|ECHONL);
- tcsetattr(STDIN_FILENO, TCSADRAIN, &termios_p);
- return 0;
-}
-
-static void term_restore(void)
-{
- struct termios termios_p;
-
- if (raw_count-- != 1)
- return;
-
- tcgetattr(STDIN_FILENO, &termios_p);
- termios_p.c_lflag |= (ECHO|ICANON|ISIG|ECHOE|ECHOK|ECHONL);
- termios_p.c_oflag |= (OPOST);
- tcsetattr(STDIN_FILENO, TCSADRAIN, &termios_p);
-}
-
-int PMAPI PM_kbhit(void)
-{
- int blocking, c;
-
- if (term_raw() == -1)
- return 0;
-
- /* Go into non blocking mode */
- blocking = fcntl(STDIN_FILENO, F_GETFL) | O_NONBLOCK;
- fcntl(STDIN_FILENO, F_SETFL, blocking);
- c = getc(stdin);
-
- /* restore blocking mode */
- fcntl(STDIN_FILENO, F_SETFL, blocking & ~O_NONBLOCK);
- term_restore();
- if (c != EOF) {
- ungetc(c, stdin);
- return c;
- }
- clearerr(stdin);
- return 0;
-}
-
-int PMAPI PM_getch(void)
-{
- int c;
-
- if (term_raw() == -1)
- return (0);
- c = getc(stdin);
-#if defined(__QNX__) && !defined(__QNXNTO__)
- if (c == 0xA)
- c = 0x0D;
- else if (c == 0x7F)
- c = 0x08;
-#endif
- term_restore();
- return c;
-}
-
-PM_HWND PMAPI PM_openConsole(
- PM_HWND hwndUser,
- int device,
- int xRes,
- int yRes,
- int bpp,
- ibool fullScreen)
-{
-#ifndef __QNXNTO__
- int fd;
-
- if (console_count++)
- return 0;
- if ((fd = open("/dev/con1", O_RDWR)) == -1)
- return -1;
- cc = console_open(fd, O_RDWR);
- close(fd);
- if (cc == NULL)
- return -1;
-#endif
- return 1;
-}
-
-int PMAPI PM_getConsoleStateSize(void)
-{
- return PM_getVGAStateSize() + sizeof(int) * 3;
-}
-
-void PMAPI PM_saveConsoleState(void *stateBuf,int console_id)
-{
-#ifdef __QNXNTO__
- int fd;
- int flags;
-
- if ((fd = open("/dev/con1", O_RDWR)) == -1)
- return;
- flags = _CONCTL_INVISIBLE_CHG | _CONCTL_INVISIBLE;
- devctl(fd, DCMD_CHR_SERCTL, &flags, sizeof flags, 0);
- close(fd);
-#else
- uchar *buf = &((uchar*)stateBuf)[PM_getVGAStateSize()];
-
- /* Save QNX 4 console state */
- console_read(cc, -1, 0, NULL, 0,
- (int *)buf+1, (int *)buf+2, NULL);
- *(int *)buf = console_ctrl(cc, -1,
- CONSOLE_NORESIZE | CONSOLE_NOSWITCH | CONSOLE_INVISIBLE,
- CONSOLE_NORESIZE | CONSOLE_NOSWITCH | CONSOLE_INVISIBLE);
-
- /* Save state of VGA registers */
- PM_saveVGAState(stateBuf);
-#endif
-}
-
-void PMAPI PM_setSuspendAppCallback(int (_ASMAPIP saveState)(int flags))
-{
- /* TODO: Implement support for console switching if possible */
-}
-
-void PMAPI PM_restoreConsoleState(const void *stateBuf,PM_HWND hwndConsole)
-{
-#ifdef __QNXNTO__
- int fd;
- int flags;
-
- if ((fd = open("/dev/con1", O_RDWR)) == -1)
- return;
- flags = _CONCTL_INVISIBLE_CHG;
- devctl(fd, DCMD_CHR_SERCTL, &flags, sizeof flags, 0);
- close(fd);
-#else
- uchar *buf = &((uchar*)stateBuf)[PM_getVGAStateSize()];
-
- /* Restore the state of the VGA compatible registers */
- PM_restoreVGAState(stateBuf);
-
- /* Restore QNX 4 console state */
- console_ctrl(cc, -1, *(int *)buf,
- CONSOLE_NORESIZE | CONSOLE_NOSWITCH | CONSOLE_INVISIBLE);
- console_write(cc, -1, 0, NULL, 0,
- (int *)buf+1, (int *)buf+2, NULL);
-#endif
-}
-
-void PMAPI PM_closeConsole(PM_HWND hwndConsole)
-{
-#ifndef __QNXNTO__
- if (--console_count == 0) {
- console_close(cc);
- cc = NULL;
- }
-#endif
-}
-
-void PM_setOSCursorLocation(int x,int y)
-{
- if (!cc)
- return;
-#ifndef __QNXNTO__
- console_write(cc, -1, 0, NULL, 0, &y, &x, NULL);
-#endif
-}
-
-void PM_setOSScreenWidth(int width,int height)
-{
-}
-
-ibool PMAPI PM_setRealTimeClockHandler(PM_intHandler ih, int frequency)
-{
- /* TODO: Implement this for QNX */
- return false;
-}
-
-void PMAPI PM_setRealTimeClockFrequency(int frequency)
-{
- /* TODO: Implement this for QNX */
-}
-
-void PMAPI PM_restoreRealTimeClockHandler(void)
-{
- /* TODO: Implement this for QNX */
-}
-
-char * PMAPI PM_getCurrentPath(
- char *path,
- int maxLen)
-{
- return getcwd(path,maxLen);
-}
-
-char PMAPI PM_getBootDrive(void)
-{ return '/'; }
-
-const char * PMAPI PM_getVBEAFPath(void)
-{ return PM_getNucleusConfigPath(); }
-
-const char * PMAPI PM_getNucleusPath(void)
-{
- char *env = getenv("NUCLEUS_PATH");
-#ifdef __QNXNTO__
-#ifdef __X86__
- return env ? env : "/nto/scitech/x86/bin";
-#elif defined (__PPC__)
- return env ? env : "/nto/scitech/ppcbe/bin";
-#elif defined (__MIPS__)
-#ifdef __BIGENDIAN__
- return env ? env : "/nto/scitech/mipsbe/bin";
-#else
- return env ? env : "/nto/scitech/mipsle/bin";
-#endif
-#elif defined (__SH__)
-#ifdef __BIGENDIAN__
- return env ? env : "/nto/scitech/shbe/bin";
-#else
- return env ? env : "/nto/scitech/shle/bin";
-#endif
-#elif defined (__ARM__)
- return env ? env : "/nto/scitech/armle/bin";
-#endif
-#else /* QNX 4 */
- return env ? env : "/qnx4/scitech/bin";
-#endif
-}
-
-const char * PMAPI PM_getNucleusConfigPath(void)
-{
- static char path[512];
- char *env;
-#ifdef __QNXNTO__
- char temp[64];
- gethostname(temp, sizeof (temp));
- temp[sizeof (temp) - 1] = '\0'; /* Paranoid */
- sprintf(path,"/etc/config/scitech/%s/config", temp);
-#else
- sprintf(path,"/etc/config/scitech/%d/config", getnid());
-#endif
- if ((env = getenv("NUCLEUS_PATH")) != NULL) {
- strcpy(path,env);
- PM_backslash(path);
- strcat(path,"config");
- }
- return path;
-}
-
-const char * PMAPI PM_getUniqueID(void)
-{
- static char buf[128];
-#ifdef __QNXNTO__
- gethostname(buf, sizeof (buf));
-#else
- sprintf(buf,"node%d", getnid());
-#endif
- return buf;
-}
-
-const char * PMAPI PM_getMachineName(void)
-{
- static char buf[128];
-#ifdef __QNXNTO__
- gethostname(buf, sizeof (buf));
-#else
- sprintf(buf,"node%d", getnid());
-#endif
- return buf;
-}
-
-void * PMAPI PM_getBIOSPointer(void)
-{
- return PM_mapRealPointer(0, 0x400);
-}
-
-void * PMAPI PM_getA0000Pointer(void)
-{
- static void *ptr = NULL;
- void *freeptr;
- unsigned offset, i, maplen;
-
- if (ptr != NULL)
- return ptr;
-
- /* Some trickery is required to get the linear address 64K aligned */
- for (i = 0; i < 5; i++) {
- ptr = PM_mapPhysicalAddr(0xA0000,0xFFFF,true);
- offset = 0x10000 - ((unsigned)ptr % 0x10000);
- if (!offset)
- break;
- munmap(ptr, 0x10000);
- maplen = 0x10000 + offset;
- freeptr = PM_mapPhysicalAddr(0xA0000-offset, maplen-1,true);
- ptr = (void *)(offset + (unsigned)freeptr);
- if (0x10000 - ((unsigned)ptr % 0x10000))
- break;
- munmap(freeptr, maplen);
- }
- if (i == 5) {
- printf("Could not get a 64K aligned linear address for A0000 region\n");
- exit(1);
- }
- return ptr;
-}
-
-void * PMAPI PM_mapPhysicalAddr(ulong base,ulong limit,ibool isCached)
-{
- uchar_t *p;
- unsigned o;
- unsigned prot = PROT_READ|PROT_WRITE|(isCached?0:PROT_NOCACHE);
-#ifdef __PAGESIZE
- int pagesize = __PAGESIZE;
-#else
- int pagesize = 4096;
-#endif
- int rounddown = base % pagesize;
-#ifndef __QNXNTO__
- static int __VidFD = -1;
-#endif
-
- if (rounddown) {
- if (base < rounddown)
- return NULL;
- base -= rounddown;
- limit += rounddown;
- }
-
-#ifndef __QNXNTO__
- if (__VidFD < 0) {
- if ((__VidFD = shm_open( "Physical", O_RDWR, 0777 )) == -1) {
- perror( "Cannot open Physical memory" );
- exit(1);
- }
- }
- o = base & 0xFFF;
- limit = (limit + o + 0xFFF) & ~0xFFF;
- if ((int)(p = mmap( 0, limit, prot, MAP_SHARED,
- __VidFD, base )) == -1 ) {
- return NULL;
- }
- p += o;
-#else
- if ((p = mmap(0, limit, prot, MAP_PHYS | MAP_SHARED,
- NOFD, base)) == MAP_FAILED) {
- return (void *)-1;
- }
-#endif
- return (p + rounddown);
-}
-
-void PMAPI PM_freePhysicalAddr(void *ptr,ulong limit)
-{
- munmap(ptr,limit+1);
-}
-
-ulong PMAPI PM_getPhysicalAddr(void *p)
-{
- /* TODO: This function should find the physical address of a linear */
- /* address. */
- return 0xFFFFFFFFUL;
-}
-
-ibool PMAPI PM_getPhysicalAddrRange(
- void *p,
- ulong length,
- ulong *physAddress)
-{
- /* TODO: Implement this! */
- return false;
-}
-
-void PMAPI PM_sleep(ulong milliseconds)
-{
- /* TODO: Put the process to sleep for milliseconds */
-}
-
-int PMAPI PM_getCOMPort(int port)
-{
- /* TODO: Re-code this to determine real values using the Plug and Play */
- /* manager for the OS. */
- switch (port) {
- case 0: return 0x3F8;
- case 1: return 0x2F8;
- }
- return 0;
-}
-
-int PMAPI PM_getLPTPort(int port)
-{
- /* TODO: Re-code this to determine real values using the Plug and Play */
- /* manager for the OS. */
- switch (port) {
- case 0: return 0x3BC;
- case 1: return 0x378;
- case 2: return 0x278;
- }
- return 0;
-}
-
-void * PMAPI PM_mallocShared(long size)
-{
- return PM_malloc(size);
-}
-
-void PMAPI PM_freeShared(void *ptr)
-{
- PM_free(ptr);
-}
-
-void * PMAPI PM_mapToProcess(void *base,ulong limit)
-{ return (void*)base; }
-
-void * PMAPI PM_mapRealPointer(uint r_seg,uint r_off)
-{
- void *p;
-
- PM_init();
-
- if ((p = VBIOSgetmemptr(r_seg, r_off, VRegs)) == (void *)-1)
- return NULL;
- return p;
-}
-
-void * PMAPI PM_allocRealSeg(uint size,uint *r_seg,uint *r_off)
-{
- if (size > 1024) {
- printf("PM_allocRealSeg: can't handle %d bytes\n", size);
- return 0;
- }
- if (rmbuf_inuse != 0) {
- printf("PM_allocRealSeg: transfer area already in use\n");
- return 0;
- }
- PM_init();
- rmbuf_inuse = 1;
- *r_seg = VBIOS_TransBufVSeg(VRegs);
- *r_off = VBIOS_TransBufVOff(VRegs);
- return (void*)VBIOS_TransBufPtr(VRegs);
-}
-
-void PMAPI PM_freeRealSeg(void *mem)
-{
- if (rmbuf_inuse == 0) {
- printf("PM_freeRealSeg: nothing was allocated\n");
- return;
- }
- rmbuf_inuse = 0;
-}
-
-void PMAPI DPMI_int86(int intno, DPMI_regs *regs)
-{
- PM_init();
- if (VRegs == NULL)
- return;
-
- VRegs->l.eax = regs->eax;
- VRegs->l.ebx = regs->ebx;
- VRegs->l.ecx = regs->ecx;
- VRegs->l.edx = regs->edx;
- VRegs->l.esi = regs->esi;
- VRegs->l.edi = regs->edi;
-
- VBIOSint(intno, VRegs, 1024);
-
- regs->eax = VRegs->l.eax;
- regs->ebx = VRegs->l.ebx;
- regs->ecx = VRegs->l.ecx;
- regs->edx = VRegs->l.edx;
- regs->esi = VRegs->l.esi;
- regs->edi = VRegs->l.edi;
- regs->flags = VRegs->w.flags & 0x1;
-}
-
-int PMAPI PM_int86(int intno, RMREGS *in, RMREGS *out)
-{
- PM_init();
- if (VRegs == NULL)
- return 0;
-
- VRegs->l.eax = in->e.eax;
- VRegs->l.ebx = in->e.ebx;
- VRegs->l.ecx = in->e.ecx;
- VRegs->l.edx = in->e.edx;
- VRegs->l.esi = in->e.esi;
- VRegs->l.edi = in->e.edi;
-
- VBIOSint(intno, VRegs, 1024);
-
- out->e.eax = VRegs->l.eax;
- out->e.ebx = VRegs->l.ebx;
- out->e.ecx = VRegs->l.ecx;
- out->e.edx = VRegs->l.edx;
- out->e.esi = VRegs->l.esi;
- out->e.edi = VRegs->l.edi;
- out->x.cflag = VRegs->w.flags & 0x1;
-
- return out->x.ax;
-}
-
-int PMAPI PM_int86x(int intno, RMREGS *in, RMREGS *out,
- RMSREGS *sregs)
-{
- PM_init();
- if (VRegs == NULL)
- return 0;
-
- if (intno == 0x21) {
- time_t today = time(NULL);
- struct tm *t;
- t = localtime(&today);
- out->x.cx = t->tm_year + 1900;
- out->h.dh = t->tm_mon + 1;
- out->h.dl = t->tm_mday;
- return 0;
- }
- else {
- VRegs->l.eax = in->e.eax;
- VRegs->l.ebx = in->e.ebx;
- VRegs->l.ecx = in->e.ecx;
- VRegs->l.edx = in->e.edx;
- VRegs->l.esi = in->e.esi;
- VRegs->l.edi = in->e.edi;
- VRegs->w.es = sregs->es;
- VRegs->w.ds = sregs->ds;
-
- VBIOSint(intno, VRegs, 1024);
-
- out->e.eax = VRegs->l.eax;
- out->e.ebx = VRegs->l.ebx;
- out->e.ecx = VRegs->l.ecx;
- out->e.edx = VRegs->l.edx;
- out->e.esi = VRegs->l.esi;
- out->e.edi = VRegs->l.edi;
- out->x.cflag = VRegs->w.flags & 0x1;
- sregs->es = VRegs->w.es;
- sregs->ds = VRegs->w.ds;
-
- return out->x.ax;
- }
-}
-
-void PMAPI PM_callRealMode(uint seg,uint off, RMREGS *in,
- RMSREGS *sregs)
-{
- PM_init();
- if (VRegs == NULL)
- return;
-
- VRegs->l.eax = in->e.eax;
- VRegs->l.ebx = in->e.ebx;
- VRegs->l.ecx = in->e.ecx;
- VRegs->l.edx = in->e.edx;
- VRegs->l.esi = in->e.esi;
- VRegs->l.edi = in->e.edi;
- VRegs->w.es = sregs->es;
- VRegs->w.ds = sregs->ds;
-
- VBIOScall(seg, off, VRegs, 1024);
-
- in->e.eax = VRegs->l.eax;
- in->e.ebx = VRegs->l.ebx;
- in->e.ecx = VRegs->l.ecx;
- in->e.edx = VRegs->l.edx;
- in->e.esi = VRegs->l.esi;
- in->e.edi = VRegs->l.edi;
- in->x.cflag = VRegs->w.flags & 0x1;
- sregs->es = VRegs->w.es;
- sregs->ds = VRegs->w.ds;
-}
-
-void PMAPI PM_availableMemory(ulong *physical,ulong *total)
-{
-#ifndef __QNXNTO__
- *physical = *total = _memavl();
-#endif
-}
-
-void * PMAPI PM_allocLockedMem(
- uint size,
- ulong *physAddr,
- ibool contiguous,
- ibool below16M)
-{
- /* TODO: Implement this on QNX */
- return NULL;
-}
-
-void PMAPI PM_freeLockedMem(
- void *p,
- uint size,
- ibool contiguous)
-{
- /* TODO: Implement this on QNX */
-}
-
-void * PMAPI PM_allocPage(
- ibool locked)
-{
- /* TODO: Implement this on QNX */
- return NULL;
-}
-
-void PMAPI PM_freePage(
- void *p)
-{
- /* TODO: Implement this on QNX */
-}
-
-void PMAPI PM_setBankA(int bank)
-{
- PM_init();
- if (VRegs == NULL)
- return;
-
- VRegs->l.eax = 0x4F05;
- VRegs->l.ebx = 0x0000;
- VRegs->l.edx = bank;
- VBIOSint(0x10, VRegs, 1024);
-}
-
-void PMAPI PM_setBankAB(int bank)
-{
- PM_init();
- if (VRegs == NULL)
- return;
-
- VRegs->l.eax = 0x4F05;
- VRegs->l.ebx = 0x0000;
- VRegs->l.edx = bank;
- VBIOSint(0x10, VRegs, 1024);
-
- VRegs->l.eax = 0x4F05;
- VRegs->l.ebx = 0x0001;
- VRegs->l.edx = bank;
- VBIOSint(0x10, VRegs, 1024);
-}
-
-void PMAPI PM_setCRTStart(int x,int y,int waitVRT)
-{
- PM_init();
- if (VRegs == NULL)
- return;
-
- VRegs->l.eax = 0x4F07;
- VRegs->l.ebx = waitVRT;
- VRegs->l.ecx = x;
- VRegs->l.edx = y;
- VBIOSint(0x10, VRegs, 1024);
-}
-
-ibool PMAPI PM_doBIOSPOST(
- ushort axVal,
- ulong BIOSPhysAddr,
- void *copyOfBIOS,
- ulong BIOSLen)
-{
- (void)axVal;
- (void)BIOSPhysAddr;
- (void)copyOfBIOS;
- (void)BIOSLen;
- return false;
-}
-
-int PMAPI PM_lockDataPages(void *p,uint len,PM_lockHandle *lh)
-{
- p = p; len = len;
- return 1;
-}
-
-int PMAPI PM_unlockDataPages(void *p,uint len,PM_lockHandle *lh)
-{
- p = p; len = len;
- return 1;
-}
-
-int PMAPI PM_lockCodePages(void (*p)(),uint len,PM_lockHandle *lh)
-{
- p = p; len = len;
- return 1;
-}
-
-int PMAPI PM_unlockCodePages(void (*p)(),uint len,PM_lockHandle *lh)
-{
- p = p; len = len;
- return 1;
-}
-
-PM_MODULE PMAPI PM_loadLibrary(
- const char *szDLLName)
-{
- /* TODO: Implement this to load shared libraries! */
- (void)szDLLName;
- return NULL;
-}
-
-void * PMAPI PM_getProcAddress(
- PM_MODULE hModule,
- const char *szProcName)
-{
- /* TODO: Implement this! */
- (void)hModule;
- (void)szProcName;
- return NULL;
-}
-
-void PMAPI PM_freeLibrary(
- PM_MODULE hModule)
-{
- /* TODO: Implement this! */
- (void)hModule;
-}
-
-int PMAPI PM_setIOPL(
- int level)
-{
- /* QNX handles IOPL selection at the program link level. */
- return level;
-}
-
-/****************************************************************************
-PARAMETERS:
-base - The starting physical base address of the region
-size - The size in bytes of the region
-type - Type to place into the MTRR register
-
-RETURNS:
-Error code describing the result.
-
-REMARKS:
-Function to enable write combining for the specified region of memory.
-****************************************************************************/
-int PMAPI PM_enableWriteCombine(
- ulong base,
- ulong size,
- uint type)
-{
-#ifndef __QNXNTO__
- return MTRR_enableWriteCombine(base,size,type);
-#else
- return PM_MTRR_NOT_SUPPORTED;
-#endif
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/qnx/vflat.c b/board/MAI/bios_emulator/scitech/src/pm/qnx/vflat.c
deleted file mode 100644
index 579ef2c95c..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/qnx/vflat.c
+++ /dev/null
@@ -1,49 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-*
-* Description: Dummy module; no virtual framebuffer for this OS
-*
-****************************************************************************/
-
-#include "pmapi.h"
-
-ibool PMAPI VF_available(void)
-{
- return false;
-}
-
-void * PMAPI VF_init(ulong baseAddr,int bankSize,int codeLen,void *bankFunc)
-{
- baseAddr = baseAddr;
- bankSize = bankSize;
- codeLen = codeLen;
- bankFunc = bankFunc;
- return NULL;
-}
-
-void PMAPI VF_exit(void)
-{
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/qnx/ztimer.c b/board/MAI/bios_emulator/scitech/src/pm/qnx/ztimer.c
deleted file mode 100644
index d2740971f9..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/qnx/ztimer.c
+++ /dev/null
@@ -1,91 +0,0 @@
-/****************************************************************************
-*
-* Ultra Long Period Timer
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: QNX
-*
-* Description: QNX specific implementation for the Zen Timer functions.
-*
-****************************************************************************/
-
-/*----------------------------- Implementation ----------------------------*/
-
-/****************************************************************************
-REMARKS:
-Initialise the Zen Timer module internals.
-****************************************************************************/
-void __ZTimerInit(void)
-{
-}
-
-/****************************************************************************
-REMARKS:
-Use the gettimeofday() function to get microsecond precision (probably less
-though)
-****************************************************************************/
-static ulong __ULZReadTime(void)
-{
- struct timespec ts;
- clock_gettime(CLOCK_REALTIME, &ts);
- return (ts.tv_nsec / 1000 + ts.tv_sec * 1000000);
-}
-
-/****************************************************************************
-REMARKS:
-Start the Zen Timer counting.
-****************************************************************************/
-#define __LZTimerOn(tm) tm->start.low = __ULZReadTime()
-
-/****************************************************************************
-REMARKS:
-Compute the lap time since the timer was started.
-****************************************************************************/
-#define __LZTimerLap(tm) (__ULZReadTime() - tm->start.low)
-
-/****************************************************************************
-REMARKS:
-Call the assembler Zen Timer functions to do the timing.
-****************************************************************************/
-#define __LZTimerOff(tm) tm->end.low = __ULZReadTime()
-
-/****************************************************************************
-REMARKS:
-Call the assembler Zen Timer functions to do the timing.
-****************************************************************************/
-#define __LZTimerCount(tm) (tm->end.low - tm->start.low)
-
-/****************************************************************************
-REMARKS:
-Define the resolution of the long period timer as microseconds per timer tick.
-****************************************************************************/
-#define ULZTIMER_RESOLUTION 1
-
-/****************************************************************************
-REMARKS:
-Compute the elapsed time from the BIOS timer tick. Note that we check to see
-whether a midnight boundary has passed, and if so adjust the finish time to
-account for this. We cannot detect if more that one midnight boundary has
-passed, so if this happens we will be generating erronous results.
-****************************************************************************/
-ulong __ULZElapsedTime(ulong start,ulong finish)
-{ return finish - start; }
diff --git a/board/MAI/bios_emulator/scitech/src/pm/rttarget/cpuinfo.c b/board/MAI/bios_emulator/scitech/src/pm/rttarget/cpuinfo.c
deleted file mode 100644
index 4f32c3e887..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/rttarget/cpuinfo.c
+++ /dev/null
@@ -1,94 +0,0 @@
-/****************************************************************************
-*
-* Ultra Long Period Timer
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: RTTarget-32
-*
-* Description: Module to implement OS specific services to measure the
-* CPU frequency.
-*
-****************************************************************************/
-
-/*---------------------------- Global variables ---------------------------*/
-
-static ibool havePerformanceCounter;
-
-/*----------------------------- Implementation ----------------------------*/
-
-/****************************************************************************
-REMARKS:
-Increase the thread priority to maximum, if possible.
-****************************************************************************/
-static int SetMaxThreadPriority(void)
-{
- int oldPriority;
- HANDLE hThread = GetCurrentThread();
-
- oldPriority = GetThreadPriority(hThread);
- if (oldPriority != THREAD_PRIORITY_ERROR_RETURN)
- SetThreadPriority(hThread, THREAD_PRIORITY_TIME_CRITICAL);
- return oldPriority;
-}
-
-/****************************************************************************
-REMARKS:
-Restore the original thread priority.
-****************************************************************************/
-static void RestoreThreadPriority(
- int oldPriority)
-{
- HANDLE hThread = GetCurrentThread();
-
- if (oldPriority != THREAD_PRIORITY_ERROR_RETURN)
- SetThreadPriority(hThread, oldPriority);
-}
-
-/****************************************************************************
-REMARKS:
-Initialise the counter and return the frequency of the counter.
-****************************************************************************/
-static void GetCounterFrequency(
- CPU_largeInteger *freq)
-{
- if (!QueryPerformanceFrequency((LARGE_INTEGER*)freq)) {
- havePerformanceCounter = false;
- freq->low = 100000;
- freq->high = 0;
- }
- else
- havePerformanceCounter = true;
-}
-
-/****************************************************************************
-REMARKS:
-Read the counter and return the counter value.
-****************************************************************************/
-#define GetCounter(t) \
-{ \
- if (havePerformanceCounter) \
- QueryPerformanceCounter((LARGE_INTEGER*)t); \
- else { \
- (t)->low = timeGetTime() * 100; \
- (t)->high = 0; \
- } \
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/rttarget/event.c b/board/MAI/bios_emulator/scitech/src/pm/rttarget/event.c
deleted file mode 100644
index 962a14a3c1..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/rttarget/event.c
+++ /dev/null
@@ -1,287 +0,0 @@
-/****************************************************************************
-*
-* SciTech Multi-platform Graphics Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: RTTarget-32
-*
-* Description: Win32 implementation for the SciTech cross platform
-* event library.
-*
-****************************************************************************/
-
-/*---------------------------- Global Variables ---------------------------*/
-
-static ushort keyUpMsg[256] = {0}; /* Table of key up messages */
-static int rangeX,rangeY; /* Range of mouse coordinates */
-
-/*---------------------------- Implementation -----------------------------*/
-
-/* These are not used under Win32 */
-#define _EVT_disableInt() 1
-#define _EVT_restoreInt(flags)
-
-/****************************************************************************
-PARAMETERS:
-scanCode - Scan code to test
-
-REMARKS:
-This macro determines if a specified key is currently down at the
-time that the call is made.
-****************************************************************************/
-#define _EVT_isKeyDown(scanCode) (keyUpMsg[scanCode] != 0)
-
-/****************************************************************************
-REMARKS:
-This function is used to return the number of ticks since system
-startup in milliseconds. This should be the same value that is placed into
-the time stamp fields of events, and is used to implement auto mouse down
-events.
-****************************************************************************/
-ulong _EVT_getTicks(void)
-{ return timeGetTime(); }
-
-/****************************************************************************
-REMARKS:
-Pumps all messages in the message queue from Win32 into our event queue.
-****************************************************************************/
-void _EVT_pumpMessages(void)
-{
- MSG msg;
- MSG charMsg;
- event_t evt;
-
- while (PeekMessage(&msg,NULL,0,0,PM_REMOVE)) {
- memset(&evt,0,sizeof(evt));
- switch (msg.message) {
- case WM_MOUSEMOVE:
- evt.what = EVT_MOUSEMOVE;
- break;
- case WM_LBUTTONDBLCLK:
- evt.what = EVT_MOUSEDOWN;
- evt.message = EVT_LEFTBMASK | EVT_DBLCLICK;
- break;
- case WM_LBUTTONDOWN:
- evt.what = EVT_MOUSEDOWN;
- evt.message = EVT_LEFTBMASK;
- break;
- case WM_LBUTTONUP:
- evt.what = EVT_MOUSEUP;
- evt.message = EVT_LEFTBMASK;
- break;
- case WM_RBUTTONDBLCLK:
- evt.what = EVT_MOUSEDOWN | EVT_DBLCLICK;
- evt.message = EVT_RIGHTBMASK;
- break;
- case WM_RBUTTONDOWN:
- evt.what = EVT_MOUSEDOWN;
- evt.message = EVT_RIGHTBMASK;
- break;
- case WM_RBUTTONUP:
- evt.what = EVT_MOUSEUP;
- evt.message = EVT_RIGHTBMASK;
- break;
- case WM_KEYDOWN:
- case WM_SYSKEYDOWN:
- if (HIWORD(msg.lParam) & KF_REPEAT) {
- evt.what = EVT_KEYREPEAT;
- }
- else {
- evt.what = EVT_KEYDOWN;
- }
- break;
- case WM_KEYUP:
- case WM_SYSKEYUP:
- evt.what = EVT_KEYUP;
- break;
- }
-
- /* Convert mouse event modifier flags */
- if (evt.what & EVT_MOUSEEVT) {
- evt.where_x = msg.pt.x;
- evt.where_y = msg.pt.y;
- if (evt.what == EVT_MOUSEMOVE) {
- if (oldMove != -1) {
- evtq[oldMove].where_x = evt.where_x;/* Modify existing one */
- evtq[oldMove].where_y = evt.where_y;
- evt.what = 0;
- }
- else {
- oldMove = freeHead; /* Save id of this move event */
- }
- }
- else
- oldMove = -1;
- if (msg.wParam & MK_LBUTTON)
- evt.modifiers |= EVT_LEFTBUT;
- if (msg.wParam & MK_RBUTTON)
- evt.modifiers |= EVT_RIGHTBUT;
- if (msg.wParam & MK_SHIFT)
- evt.modifiers |= EVT_SHIFTKEY;
- if (msg.wParam & MK_CONTROL)
- evt.modifiers |= EVT_CTRLSTATE;
- }
-
- /* Convert keyboard codes */
- TranslateMessage(&msg);
- if (evt.what & EVT_KEYEVT) {
- int scanCode = (msg.lParam >> 16) & 0xFF;
- if (evt.what == EVT_KEYUP) {
- /* Get message for keyup code from table of cached down values */
- evt.message = keyUpMsg[scanCode];
- keyUpMsg[scanCode] = 0;
- }
- else {
- if (PeekMessage(&charMsg,NULL,WM_CHAR,WM_CHAR,PM_REMOVE))
- evt.message = charMsg.wParam;
- if (PeekMessage(&charMsg,NULL,WM_SYSCHAR,WM_SYSCHAR,PM_REMOVE))
- evt.message = charMsg.wParam;
- evt.message |= ((msg.lParam >> 8) & 0xFF00);
- keyUpMsg[scanCode] = (ushort)evt.message;
- }
- if (evt.what == EVT_KEYREPEAT)
- evt.message |= (msg.lParam << 16);
- if (HIWORD(msg.lParam) & KF_ALTDOWN)
- evt.modifiers |= EVT_ALTSTATE;
- if (GetKeyState(VK_SHIFT) & 0x8000U)
- evt.modifiers |= EVT_SHIFTKEY;
- if (GetKeyState(VK_CONTROL) & 0x8000U)
- evt.modifiers |= EVT_CTRLSTATE;
- oldMove = -1;
- }
-
- if (evt.what != 0) {
- /* Add time stamp and add the event to the queue */
- evt.when = msg.time;
- if (count < EVENTQSIZE) {
- addEvent(&evt);
- }
- }
- DispatchMessage(&msg);
- }
-}
-
-/****************************************************************************
-REMARKS:
-This macro/function is used to converts the scan codes reported by the
-keyboard to our event libraries normalised format. We only have one scan
-code for the 'A' key, and use shift modifiers to determine if it is a
-Ctrl-F1, Alt-F1 etc. The raw scan codes from the keyboard work this way,
-but the OS gives us 'cooked' scan codes, we have to translate them back
-to the raw format.
-****************************************************************************/
-#define _EVT_maskKeyCode(evt)
-
-/****************************************************************************
-REMARKS:
-Safely abort the event module upon catching a fatal error.
-****************************************************************************/
-void _EVT_abort()
-{
- EVT_exit();
- PM_fatalError("Unhandled exception!");
-}
-
-/****************************************************************************
-PARAMETERS:
-mouseMove - Callback function to call wheneve the mouse needs to be moved
-
-REMARKS:
-Initiliase the event handling module. Here we install our mouse handling ISR
-to be called whenever any button's are pressed or released. We also build
-the free list of events in the event queue.
-
-We use handler number 2 of the mouse libraries interrupt handlers for our
-event handling routines.
-****************************************************************************/
-void EVTAPI EVT_init(
- _EVT_mouseMoveHandler mouseMove)
-{
- /* Initialise the event queue */
- _mouseMove = mouseMove;
- initEventQueue();
- memset(keyUpMsg,0,sizeof(keyUpMsg));
-
- /* Catch program termination signals so we can clean up properly */
- signal(SIGABRT, _EVT_abort);
- signal(SIGFPE, _EVT_abort);
- signal(SIGINT, _EVT_abort);
-}
-
-/****************************************************************************
-REMARKS
-Changes the range of coordinates returned by the mouse functions to the
-specified range of values. This is used when changing between graphics
-modes set the range of mouse coordinates for the new display mode.
-****************************************************************************/
-void EVTAPI EVT_setMouseRange(
- int xRes,
- int yRes)
-{
- rangeX = xRes;
- rangeY = yRes;
-}
-
-/****************************************************************************
-REMARKS
-Modifes the mouse coordinates as necessary if scaling to OS coordinates,
-and sets the OS mouse cursor position.
-****************************************************************************/
-void _EVT_setMousePos(
- int *x,
- int *y)
-{
- SetCursorPos(*x,*y);
-}
-
-/****************************************************************************
-REMARKS:
-Initiailises the internal event handling modules. The EVT_suspend function
-can be called to suspend event handling (such as when shelling out to DOS),
-and this function can be used to resume it again later.
-****************************************************************************/
-void EVT_resume(void)
-{
- /* Do nothing for Win32 */
-}
-
-/****************************************************************************
-REMARKS
-Suspends all of our event handling operations. This is also used to
-de-install the event handling code.
-****************************************************************************/
-void EVT_suspend(void)
-{
- /* Do nothing for Win32 */
-}
-
-/****************************************************************************
-REMARKS
-Exits the event module for program terminatation.
-****************************************************************************/
-void EVT_exit(void)
-{
- /* Restore signal handlers */
- signal(SIGABRT, SIG_DFL);
- signal(SIGFPE, SIG_DFL);
- signal(SIGINT, SIG_DFL);
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/rttarget/oshdr.h b/board/MAI/bios_emulator/scitech/src/pm/rttarget/oshdr.h
deleted file mode 100644
index 1352dadad6..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/rttarget/oshdr.h
+++ /dev/null
@@ -1,34 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: RTTarget-32
-*
-* Description: Include file to include all OS specific header files.
-*
-****************************************************************************/
-
-#define WIN32_LEAN_AND_MEAN
-#define STRICT
-#include <windows.h>
-#include <mmsystem.h>
diff --git a/board/MAI/bios_emulator/scitech/src/pm/rttarget/pm.c b/board/MAI/bios_emulator/scitech/src/pm/rttarget/pm.c
deleted file mode 100644
index 47d7ed6ab1..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/rttarget/pm.c
+++ /dev/null
@@ -1,701 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: RTTarget-32
-*
-* Description: Implementation for the OS Portability Manager Library, which
-* contains functions to implement OS specific services in a
-* generic, cross platform API. Porting the OS Portability
-* Manager library is the first step to porting any SciTech
-* products to a new platform.
-*
-****************************************************************************/
-
-#include "pmapi.h"
-#include "drvlib/os/os.h"
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#define WIN32_LEAN_AND_MEAN
-#define STRICT
-#include <windows.h>
-#include <mmsystem.h>
-#ifdef __BORLANDC__
-#pragma warn -par
-#endif
-
-/*--------------------------- Global variables ----------------------------*/
-
-static void (PMAPIP fatalErrorCleanup)(void) = NULL;
-
-/*----------------------------- Implementation ----------------------------*/
-
-void MTRR_init(void);
-
-/****************************************************************************
-REMARKS:
-Initialise the PM library.
-****************************************************************************/
-void PMAPI PM_init(void)
-{
- /* TODO: dO any special init code in here. */
- MTRR_init();
-}
-
-/****************************************************************************
-REMARKS:
-Return the operating system type identifier.
-****************************************************************************/
-long PMAPI PM_getOSType(void)
-{
- return _OS_RTTARGET;
-}
-
-/****************************************************************************
-REMARKS:
-Return the runtime type identifier.
-****************************************************************************/
-int PMAPI PM_getModeType(void)
-{
- return PM_386;
-}
-
-/****************************************************************************
-REMARKS:
-Add a file directory separator to the end of the filename.
-****************************************************************************/
-void PMAPI PM_backslash(
- char *s)
-{
- uint pos = strlen(s);
- if (s[pos-1] != '\\') {
- s[pos] = '\\';
- s[pos+1] = '\0';
- }
-}
-
-/****************************************************************************
-REMARKS:
-Add a user defined PM_fatalError cleanup function.
-****************************************************************************/
-void PMAPI PM_setFatalErrorCleanup(
- void (PMAPIP cleanup)(void))
-{
- fatalErrorCleanup = cleanup;
-}
-
-/****************************************************************************
-REMARKS:
-Report a fatal error condition and halt the program.
-****************************************************************************/
-void PMAPI PM_fatalError(
- const char *msg)
-{
- if (fatalErrorCleanup)
- fatalErrorCleanup();
- /* TODO: Display a fatal error message and exit! */
-/* MessageBox(NULL,msg,"Fatal Error!", MB_ICONEXCLAMATION); */
- exit(1);
-}
-
-/****************************************************************************
-REMARKS:
-Allocate the real mode VESA transfer buffer for communicating with the BIOS.
-****************************************************************************/
-void * PMAPI PM_getVESABuf(
- uint *len,
- uint *rseg,
- uint *roff)
-{
- /* No BIOS access for the RTTarget */
- return NULL;
-}
-
-/****************************************************************************
-REMARKS:
-Check if a key has been pressed.
-****************************************************************************/
-int PMAPI PM_kbhit(void)
-{
- /* TODO: Need to check if a key is waiting on the keyboard queue */
- return true;
-}
-
-/****************************************************************************
-REMARKS:
-Wait for and return the next keypress.
-****************************************************************************/
-int PMAPI PM_getch(void)
-{
- /* TODO: Need to obtain the next keypress, and block until one is hit */
- return 0xD;
-}
-
-/****************************************************************************
-REMARKS:
-Set the location of the OS console cursor.
-****************************************************************************/
-void PM_setOSCursorLocation(
- int x,
- int y)
-{
- /* Nothing to do for RTTarget-32 */
-}
-
-/****************************************************************************
-REMARKS:
-Set the width of the OS console.
-****************************************************************************/
-void PM_setOSScreenWidth(
- int width,
- int height)
-{
- /* Nothing to do for RTTarget-32 */
-}
-
-/****************************************************************************
-REMARKS:
-Set the real time clock handler (used for software stereo modes).
-****************************************************************************/
-ibool PMAPI PM_setRealTimeClockHandler(
- PM_intHandler ih,
- int frequency)
-{
- /* Not supported for RTTarget-32 */
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Set the real time clock frequency (for stereo modes).
-****************************************************************************/
-void PMAPI PM_setRealTimeClockFrequency(
- int frequency)
-{
- /* Not supported under RTTarget-32 */
-}
-
-/****************************************************************************
-REMARKS:
-Restore the original real time clock handler.
-****************************************************************************/
-void PMAPI PM_restoreRealTimeClockHandler(void)
-{
- /* Not supported under RTTarget-32 */
-}
-
-/****************************************************************************
-REMARKS:
-Return the current operating system path or working directory.
-****************************************************************************/
-char * PMAPI PM_getCurrentPath(
- char *path,
- int maxLen)
-{
- return getcwd(path,maxLen);
-}
-
-/****************************************************************************
-REMARKS:
-Return the drive letter for the boot drive.
-****************************************************************************/
-char PMAPI PM_getBootDrive(void)
-{
- return 'c';
-}
-
-/****************************************************************************
-REMARKS:
-Return the path to the VBE/AF driver files.
-****************************************************************************/
-const char * PMAPI PM_getVBEAFPath(void)
-{
- return "c:\\";
-}
-
-/****************************************************************************
-REMARKS:
-Return the path to the Nucleus driver files.
-****************************************************************************/
-const char * PMAPI PM_getNucleusPath(void)
-{
- /* TODO: Point this at the path when the Nucleus drivers will be found */
- return "c:\\nucleus";
-}
-
-/****************************************************************************
-REMARKS:
-Return the path to the Nucleus configuration files.
-****************************************************************************/
-const char * PMAPI PM_getNucleusConfigPath(void)
-{
- static char path[256];
- strcpy(path,PM_getNucleusPath());
- PM_backslash(path);
- strcat(path,"config");
- return path;
-}
-
-/****************************************************************************
-REMARKS:
-Return a unique identifier for the machine if possible.
-****************************************************************************/
-const char * PMAPI PM_getUniqueID(void)
-{
- return PM_getMachineName();
-}
-
-/****************************************************************************
-REMARKS:
-Get the name of the machine on the network.
-****************************************************************************/
-const char * PMAPI PM_getMachineName(void)
-{
- /* Not necessary for RTTarget-32 */
- return "Unknown";
-}
-
-/****************************************************************************
-REMARKS:
-Return a pointer to the real mode BIOS data area.
-****************************************************************************/
-void * PMAPI PM_getBIOSPointer(void)
-{
- /* Not used for RTTarget-32 */
- return NULL;
-}
-
-/****************************************************************************
-REMARKS:
-Return a pointer to 0xA0000 physical VGA graphics framebuffer.
-****************************************************************************/
-void * PMAPI PM_getA0000Pointer(void)
-{
- static void *bankPtr;
- if (!bankPtr)
- bankPtr = PM_mapPhysicalAddr(0xA0000,0xFFFF,true);
- return bankPtr;
-}
-
-/****************************************************************************
-REMARKS:
-Map a physical address to a linear address in the callers process.
-****************************************************************************/
-void * PMAPI PM_mapPhysicalAddr(
- ulong base,
- ulong limit,
- ibool isCached)
-{
- /* TODO: Map a physical memory address to a linear address */
- return NULL;
-}
-
-/****************************************************************************
-REMARKS:
-Free a physical address mapping allocated by PM_mapPhysicalAddr.
-****************************************************************************/
-void PMAPI PM_freePhysicalAddr(
- void *ptr,
- ulong limit)
-{
- /* TODO: Free the physical address mapping */
-}
-
-ulong PMAPI PM_getPhysicalAddr(void *p)
-{
- /* TODO: This function should find the physical address of a linear */
- /* address. */
- return 0xFFFFFFFFUL;
-}
-
-void PMAPI PM_sleep(ulong milliseconds)
-{
- Sleep(milliseconds);
-}
-
-int PMAPI PM_getCOMPort(int port)
-{
- /* TODO: Re-code this to determine real values using the Plug and Play */
- /* manager for the OS. */
- switch (port) {
- case 0: return 0x3F8;
- case 1: return 0x2F8;
- }
- return 0;
-}
-
-int PMAPI PM_getLPTPort(int port)
-{
- /* TODO: Re-code this to determine real values using the Plug and Play */
- /* manager for the OS. */
- switch (port) {
- case 0: return 0x3BC;
- case 1: return 0x378;
- case 2: return 0x278;
- }
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-Allocate a block of (unnamed) shared memory.
-****************************************************************************/
-void * PMAPI PM_mallocShared(
- long size)
-{
- return PM_malloc(size);
-}
-
-/****************************************************************************
-REMARKS:
-Free a block of shared memory.
-****************************************************************************/
-void PMAPI PM_freeShared(
- void *ptr)
-{
- PM_free(ptr);
-}
-
-/****************************************************************************
-REMARKS:
-Map a linear memory address to the calling process address space. The
-address will have been allocated in another process using the
-PM_mapPhysicalAddr function.
-****************************************************************************/
-void * PMAPI PM_mapToProcess(
- void *base,
- ulong limit)
-{
- return base;
-}
-
-/****************************************************************************
-REMARKS:
-Map a real mode pointer to a protected mode pointer.
-****************************************************************************/
-void * PMAPI PM_mapRealPointer(
- uint r_seg,
- uint r_off)
-{
- /* Not used for RTTarget-32 */
- return NULL;
-}
-
-/****************************************************************************
-REMARKS:
-Allocate a block of real mode memory
-****************************************************************************/
-void * PMAPI PM_allocRealSeg(
- uint size,
- uint *r_seg,
- uint *r_off)
-{
- /* Not used for RTTarget-32 */
- return NULL;
-}
-
-/****************************************************************************
-REMARKS:
-Free a block of real mode memory.
-****************************************************************************/
-void PMAPI PM_freeRealSeg(
- void *mem)
-{
- /* Not used for RTTarget-32 */
-}
-
-/****************************************************************************
-REMARKS:
-Issue a real mode interrupt (parameters in DPMI compatible structure)
-****************************************************************************/
-void PMAPI DPMI_int86(
- int intno,
- DPMI_regs *regs)
-{
- /* Not used for RTTarget-32 */
-}
-
-/****************************************************************************
-REMARKS:
-Issue a real mode interrupt.
-****************************************************************************/
-int PMAPI PM_int86(
- int intno,
- RMREGS *in,
- RMREGS *out)
-{
- /* Not used for RTTarget-32 */
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-Issue a real mode interrupt.
-****************************************************************************/
-int PMAPI PM_int86x(
- int intno,
- RMREGS *in,
- RMREGS *out,
- RMSREGS *sregs)
-{
- /* Not used for RTTarget-32 */
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-Call a real mode far function.
-****************************************************************************/
-void PMAPI PM_callRealMode(
- uint seg,
- uint off,
- RMREGS *in,
- RMSREGS *sregs)
-{
- /* Not used for RTTarget-32 */
-}
-
-/****************************************************************************
-REMARKS:
-Return the amount of available memory.
-****************************************************************************/
-void PMAPI PM_availableMemory(
- ulong *physical,
- ulong *total)
-{
- /* TODO: Figure out how to determine the available memory. Not entirely */
- /* critical so returning 0 is OK. */
- *physical = *total = 0;
-}
-
-/****************************************************************************
-REMARKS:
-Allocate a block of locked, physical memory for DMA operations.
-****************************************************************************/
-void * PMAPI PM_allocLockedMem(
- uint size,
- ulong *physAddr,
- ibool contiguous,
- ibool below16M)
-{
- /* TODO: Allocate a block of locked, phsyically contigous memory for DMA */
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-Free a block of locked physical memory.
-****************************************************************************/
-void PMAPI PM_freeLockedMem(
- void *p,
- uint size,
-
- ibool contiguous)
-{
- /* TODO: Free a locked memory buffer */
-}
-
-/****************************************************************************
-REMARKS:
-Call the VBE/Core software interrupt to change display banks.
-****************************************************************************/
-void PMAPI PM_setBankA(
- int bank)
-{
- /* Not used for RTTarget-32 */
-}
-
-/****************************************************************************
-REMARKS:
-Call the VBE/Core software interrupt to change display banks.
-****************************************************************************/
-void PMAPI PM_setBankAB(
- int bank)
-{
- /* Not used for RTTarget-32 */
-}
-
-/****************************************************************************
-REMARKS:
-Call the VBE/Core software interrupt to change display start address.
-****************************************************************************/
-void PMAPI PM_setCRTStart(
- int x,
- int y,
- int waitVRT)
-{
- /* Not used for RTTarget-32 */
-}
-
-/****************************************************************************
-REMARKS:
-Execute the POST on the secondary BIOS for a controller.
-****************************************************************************/
-ibool PMAPI PM_doBIOSPOST(
- ushort axVal,
- ulong BIOSPhysAddr,
- void *mappedBIOS)
-{
- /* Not used for RTTarget-32 */
- return false;
-}
-
-PM_MODULE PMAPI PM_loadLibrary(
- const char *szDLLName)
-{
- /* TODO: Implement this to load shared libraries! */
- (void)szDLLName;
- return NULL;
-}
-
-void * PMAPI PM_getProcAddress(
- PM_MODULE hModule,
- const char *szProcName)
-{
- /* TODO: Implement this! */
- (void)hModule;
- (void)szProcName;
- return NULL;
-}
-
-void PMAPI PM_freeLibrary(
- PM_MODULE hModule)
-{
- /* TODO: Implement this! */
- (void)hModule;
-}
-
-/****************************************************************************
-REMARKS:
-Function to find the first file matching a search criteria in a directory.
-****************************************************************************/
-ulong PMAPI PM_findFirstFile(
- const char *filename,
- PM_findData *findData)
-{
- /* TODO: This function should start a directory enumeration search */
- /* given the filename (with wildcards). The data should be */
- /* converted and returned in the findData standard form. */
- (void)filename;
- (void)findData;
- return PM_FILE_INVALID;
-}
-
-/****************************************************************************
-REMARKS:
-Function to find the next file matching a search criteria in a directory.
-****************************************************************************/
-ibool PMAPI PM_findNextFile(
- ulong handle,
- PM_findData *findData)
-{
- /* TODO: This function should find the next file in directory enumeration */
- /* search given the search criteria defined in the call to */
- /* PM_findFirstFile. The data should be converted and returned */
- /* in the findData standard form. */
- (void)handle;
- (void)findData;
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Function to close the find process
-****************************************************************************/
-void PMAPI PM_findClose(
- ulong handle)
-{
- /* TODO: This function should close the find process. This may do */
- /* nothing for some OS'es. */
- (void)handle;
-}
-
-/****************************************************************************
-REMARKS:
-Function to determine if a drive is a valid drive or not. Under Unix this
-function will return false for anything except a value of 3 (considered
-the root drive, and equivalent to C: for non-Unix systems). The drive
-numbering is:
-
- 1 - Drive A:
- 2 - Drive B:
- 3 - Drive C:
- etc
-
-****************************************************************************/
-ibool PMAPI PM_driveValid(
- char drive)
-{
- if (drive == 3)
- return true;
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Function to get the current working directory for the specififed drive.
-Under Unix this will always return the current working directory regardless
-of what the value of 'drive' is.
-****************************************************************************/
-void PMAPI PM_getdcwd(
- int drive,
- char *dir,
- int len)
-{
- (void)drive;
- getcwd(dir,len);
-}
-
-/****************************************************************************
-REMARKS:
-Function to change the file attributes for a specific file.
-****************************************************************************/
-void PMAPI PM_setFileAttr(
- const char *filename,
- uint attrib)
-{
- /* TODO: Set the file attributes for a file */
- (void)filename;
- (void)attrib;
-}
-
-/****************************************************************************
-REMARKS:
-Function to create a directory.
-****************************************************************************/
-ibool PMAPI PM_mkdir(
- const char *filename)
-{
- return mkdir(filename) == 0;
-}
-
-/****************************************************************************
-REMARKS:
-Function to remove a directory.
-****************************************************************************/
-ibool PMAPI PM_rmdir(
- const char *filename)
-{
- return rmdir(filename) == 0;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/rttarget/vflat.c b/board/MAI/bios_emulator/scitech/src/pm/rttarget/vflat.c
deleted file mode 100644
index dd9dfe6826..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/rttarget/vflat.c
+++ /dev/null
@@ -1,48 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: RTTarget-32
-*
-* Description: Dummy module; no virtual framebuffer for this OS
-*
-****************************************************************************/
-
-#include "pmapi.h"
-#ifdef __BORLANDC__
-#pragma warn -par
-#endif
-
-ibool PMAPI VF_available(void)
-{
- return false;
-}
-
-void * PMAPI VF_init(ulong baseAddr,int bankSize,int codeLen,void *bankFunc)
-{
- return NULL;
-}
-
-void PMAPI VF_exit(void)
-{
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/rttarget/ztimer.c b/board/MAI/bios_emulator/scitech/src/pm/rttarget/ztimer.c
deleted file mode 100644
index 80c184dff1..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/rttarget/ztimer.c
+++ /dev/null
@@ -1,136 +0,0 @@
-/****************************************************************************
-*
-* Ultra Long Period Timer
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: RTTarget-32
-*
-* Description: OS specific implementation for the Zen Timer functions.
-*
-****************************************************************************/
-
-/*---------------------------- Global variables ---------------------------*/
-
-static CPU_largeInteger countFreq;
-static ibool havePerformanceCounter;
-static ulong start,finish;
-
-/*----------------------------- Implementation ----------------------------*/
-
-/****************************************************************************
-REMARKS:
-Initialise the Zen Timer module internals.
-****************************************************************************/
-void __ZTimerInit(void)
-{
-#ifdef NO_ASSEMBLER
- havePerformanceCounter = false;
-#else
- havePerformanceCounter = QueryPerformanceFrequency((LARGE_INTEGER*)&countFreq);
-#endif
-}
-
-/****************************************************************************
-REMARKS:
-Start the Zen Timer counting.
-****************************************************************************/
-static void __LZTimerOn(
- LZTimerObject *tm)
-{
- if (havePerformanceCounter)
- QueryPerformanceCounter((LARGE_INTEGER*)&tm->start);
- else
- tm->start.low = timeGetTime();
-}
-
-/****************************************************************************
-REMARKS:
-Compute the lap time since the timer was started.
-****************************************************************************/
-static ulong __LZTimerLap(
- LZTimerObject *tm)
-{
- CPU_largeInteger tmLap,tmCount;
-
- if (havePerformanceCounter) {
- QueryPerformanceCounter((LARGE_INTEGER*)&tmLap);
- _CPU_diffTime64(&tm->start,&tmLap,&tmCount);
- return _CPU_calcMicroSec(&tmCount,countFreq.low);
- }
- else {
- tmLap.low = timeGetTime();
- return (tmLap.low - tm->start.low) * 1000L;
- }
-}
-
-/****************************************************************************
-REMARKS:
-Stop the Zen Timer counting.
-****************************************************************************/
-static void __LZTimerOff(
- LZTimerObject *tm)
-{
- if (havePerformanceCounter)
- QueryPerformanceCounter((LARGE_INTEGER*)&tm->end);
- else
- tm->end.low = timeGetTime();
-}
-
-/****************************************************************************
-REMARKS:
-Compute the elapsed time in microseconds between start and end timings.
-****************************************************************************/
-static ulong __LZTimerCount(
- LZTimerObject *tm)
-{
- CPU_largeInteger tmCount;
-
- if (havePerformanceCounter) {
- _CPU_diffTime64(&tm->start,&tm->end,&tmCount);
- return _CPU_calcMicroSec(&tmCount,countFreq.low);
- }
- else
- return (tm->end.low - tm->start.low) * 1000L;
-}
-
-/****************************************************************************
-REMARKS:
-Define the resolution of the long period timer as microseconds per timer tick.
-****************************************************************************/
-#define ULZTIMER_RESOLUTION 1000
-
-/****************************************************************************
-REMARKS:
-Read the Long Period timer from the OS
-****************************************************************************/
-static ulong __ULZReadTime(void)
-{ return timeGetTime(); }
-
-/****************************************************************************
-REMARKS:
-Compute the elapsed time from the BIOS timer tick. Note that we check to see
-whether a midnight boundary has passed, and if so adjust the finish time to
-account for this. We cannot detect if more that one midnight boundary has
-passed, so if this happens we will be generating erronous results.
-****************************************************************************/
-ulong __ULZElapsedTime(ulong start,ulong finish)
-{ return finish - start; }
diff --git a/board/MAI/bios_emulator/scitech/src/pm/smx/_event.asm b/board/MAI/bios_emulator/scitech/src/pm/smx/_event.asm
deleted file mode 100644
index da62b1f712..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/smx/_event.asm
+++ /dev/null
@@ -1,175 +0,0 @@
-;****************************************************************************
-;*
-;* SciTech Multi-platform Graphics Library
-;*
-;* ========================================================================
-;*
-;* The contents of this file are subject to the SciTech MGL Public
-;* License Version 1.0 (the "License"); you may not use this file
-;* except in compliance with the License. You may obtain a copy of
-;* the License at http://www.scitechsoft.com/mgl-license.txt
-;*
-;* Software distributed under the License is distributed on an
-;* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-;* implied. See the License for the specific language governing
-;* rights and limitations under the License.
-;*
-;* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-;*
-;* The Initial Developer of the Original Code is SciTech Software, Inc.
-;* All Rights Reserved.
-;*
-;* ========================================================================
-;*
-;* Language: 80386 Assembler
-;* Environment: IBM PC (MS DOS)
-;*
-;* Description: Assembly language support routines for the event module.
-;*
-;****************************************************************************
-
- ideal
-
-include "scitech.mac" ; Memory model macros
-
-ifdef flatmodel
-
-header _event ; Set up memory model
-
-begdataseg _event
-
- cextern _EVT_biosPtr,DPTR
-
- cpublic _EVT_dataStart
-
-ifdef USE_NASM
-%define KB_HEAD WORD esi+01Ah ; Keyboard buffer head in BIOS data area
-%define KB_TAIL WORD esi+01Ch ; Keyboard buffer tail in BIOS data area
-%define KB_START WORD esi+080h ; Start of keyboard buffer in BIOS data area
-%define KB_END WORD esi+082h ; End of keyboard buffer in BIOS data area
-else
-KB_HEAD EQU WORD esi+01Ah ; Keyboard buffer head in BIOS data area
-KB_TAIL EQU WORD esi+01Ch ; Keyboard buffer tail in BIOS data area
-KB_START EQU WORD esi+080h ; Start of keyboard buffer in BIOS data area
-KB_END EQU WORD esi+082h ; End of keyboard buffer in BIOS data area
-endif
-
- cpublic _EVT_dataEnd
-
-enddataseg _event
-
-begcodeseg _event ; Start of code segment
-
- cpublic _EVT_codeStart
-
-;----------------------------------------------------------------------------
-; int _EVT_getKeyCode(void)
-;----------------------------------------------------------------------------
-; Returns the key code for the next available key by extracting it from
-; the BIOS keyboard buffer.
-;----------------------------------------------------------------------------
-cprocstart _EVT_getKeyCode
-
- enter_c
-
- mov esi,[_EVT_biosPtr]
- xor ebx,ebx
- xor eax,eax
- mov bx,[KB_HEAD]
- cmp bx,[KB_TAIL]
- jz @@Done
- xor eax,eax
- mov ax,[esi+ebx] ; EAX := character from keyboard buffer
- inc _bx
- inc _bx
- cmp bx,[KB_END] ; Hit the end of the keyboard buffer?
- jl @@1
- mov bx,[KB_START]
-@@1: mov [KB_HEAD],bx ; Update keyboard buffer head pointer
-
-@@Done: leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; int _EVT_disableInt(void);
-;----------------------------------------------------------------------------
-; Return processor interrupt status and disable interrupts.
-;----------------------------------------------------------------------------
-cprocstart _EVT_disableInt
-
- pushf ; Put flag word on stack
- cli ; Disable interrupts!
- pop eax ; deposit flag word in return register
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void _EVT_restoreInt(int ps);
-;----------------------------------------------------------------------------
-; Restore processor interrupt status.
-;----------------------------------------------------------------------------
-cprocstart _EVT_restoreInt
-
- ARG ps:UINT
-
- push ebp
- mov ebp,esp ; Set up stack frame
- push [DWORD ps]
- popf ; Restore processor status (and interrupts)
- pop ebp
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; int EVT_rdinx(int port,int index)
-;----------------------------------------------------------------------------
-; Reads an indexed register value from an I/O port.
-;----------------------------------------------------------------------------
-cprocstart EVT_rdinx
-
- ARG port:UINT, index:UINT
-
- push ebp
- mov ebp,esp
- mov edx,[port]
- mov al,[BYTE index]
- out dx,al
- inc dx
- in al,dx
- movzx eax,al
- pop ebp
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void EVT_wrinx(int port,int index,int value)
-;----------------------------------------------------------------------------
-; Writes an indexed register value to an I/O port.
-;----------------------------------------------------------------------------
-cprocstart EVT_wrinx
-
- ARG port:UINT, index:UINT, value:UINT
-
- push ebp
- mov ebp,esp
- mov edx,[port]
- mov al,[BYTE index]
- mov ah,[BYTE value]
- out dx,ax
- pop ebp
- ret
-
-cprocend
-
- cpublic _EVT_codeEnd
-
-endcodeseg _event
-
-endif
-
- END ; End of module
diff --git a/board/MAI/bios_emulator/scitech/src/pm/smx/_lztimer.asm b/board/MAI/bios_emulator/scitech/src/pm/smx/_lztimer.asm
deleted file mode 100644
index 068eea65d2..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/smx/_lztimer.asm
+++ /dev/null
@@ -1,58 +0,0 @@
-;****************************************************************************
-;*
-;* SciTech OS Portability Manager Library
-;*
-;* ========================================================================
-;*
-;* The contents of this file are subject to the SciTech MGL Public
-;* License Version 1.0 (the "License"); you may not use this file
-;* except in compliance with the License. You may obtain a copy of
-;* the License at http://www.scitechsoft.com/mgl-license.txt
-;*
-;* Software distributed under the License is distributed on an
-;* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-;* implied. See the License for the specific language governing
-;* rights and limitations under the License.
-;*
-;* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-;*
-;* The Initial Developer of the Original Code is SciTech Software, Inc.
-;* All Rights Reserved.
-;*
-;* ========================================================================
-;*
-;* Language: NASM or TASM Assembler
-;* Environment: smx 32 bit intel CPU
-;*
-;* Description: SMX does not support 486's, so this module is not necessary.
-;*
-;* All registers and all flags are preserved by all routines, except
-;* interrupts which are always turned on
-;*
-;****************************************************************************
-
- IDEAL
-
-include "scitech.mac"
-
-header _lztimer
-
-begdataseg _lztimer
-
-enddataseg _lztimer
-
-begcodeseg _lztimer ; Start of code segment
-
-cprocstart LZ_disable
- cli
- ret
-cprocend
-
-cprocstart LZ_enable
- sti
- ret
-cprocend
-
-endcodeseg _lztimer
-
- END
diff --git a/board/MAI/bios_emulator/scitech/src/pm/smx/_pm.asm b/board/MAI/bios_emulator/scitech/src/pm/smx/_pm.asm
deleted file mode 100644
index 1c7cb21864..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/smx/_pm.asm
+++ /dev/null
@@ -1,448 +0,0 @@
-;****************************************************************************
-;*
-;* SciTech OS Portability Manager Library
-;*
-;* ========================================================================
-;*
-;* The contents of this file are subject to the SciTech MGL Public
-;* License Version 1.0 (the "License"); you may not use this file
-;* except in compliance with the License. You may obtain a copy of
-;* the License at http://www.scitechsoft.com/mgl-license.txt
-;*
-;* Software distributed under the License is distributed on an
-;* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-;* implied. See the License for the specific language governing
-;* rights and limitations under the License.
-;*
-;* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-;*
-;* The Initial Developer of the Original Code is SciTech Software, Inc.
-;* All Rights Reserved.
-;*
-;* ========================================================================
-;*
-;* Language: 80386 Assembler, TASM 4.0 or NASM
-;* Environment: 32-bit SMX embedded systems development
-;*
-;* Description: Low level assembly support for the PM library specific to
-;* SMX.
-;*
-;****************************************************************************
-
- IDEAL
-
-include "scitech.mac" ; Memory model macros
-
-header _pm ; Set up memory model
-
-begdataseg _pm
-
- cextern _PM_savedDS,USHORT
-
-intel_id db "GenuineIntel" ; Intel vendor ID
-
-enddataseg _pm
-
-begcodeseg _pm ; Start of code segment
-
-;----------------------------------------------------------------------------
-; void PM_segread(PMSREGS *sregs)
-;----------------------------------------------------------------------------
-; Read the current value of all segment registers
-;----------------------------------------------------------------------------
-cprocstartdll16 PM_segread
-
- ARG sregs:DPTR
-
- enter_c
-
- mov ax,es
- _les _si,[sregs]
- mov [_ES _si],ax
- mov [_ES _si+2],cs
- mov [_ES _si+4],ss
- mov [_ES _si+6],ds
- mov [_ES _si+8],fs
- mov [_ES _si+10],gs
-
- leave_c
- ret
-
-cprocend
-
-; Create a table of the 256 different interrupt calls that we can jump
-; into
-
-ifdef USE_NASM
-
-%assign intno 0
-
-intTable:
-%rep 256
- db 0CDh
- db intno
-%assign intno intno + 1
- ret
- nop
-%endrep
-
-else
-
-intno = 0
-
-intTable:
- REPT 256
- db 0CDh
- db intno
-intno = intno + 1
- ret
- nop
- ENDM
-
-endif
-
-;----------------------------------------------------------------------------
-; _PM_genInt - Generate the appropriate interrupt
-;----------------------------------------------------------------------------
-cprocnear _PM_genInt
-
- push _ax ; Save _ax
- push _bx ; Save _bx
- mov ebx,[UINT esp+12] ; EBX := interrupt number
- mov _ax,offset intTable ; Point to interrupt generation table
- shl _bx,2 ; _BX := index into table
- add _ax,_bx ; _AX := pointer to interrupt code
- xchg eax,[esp+4] ; Restore eax, and set for int
- pop _bx ; restore _bx
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; int PM_int386x(int intno, PMREGS *in, PMREGS *out,PMSREGS *sregs)
-;----------------------------------------------------------------------------
-; Issues a software interrupt in protected mode. This routine has been
-; written to allow user programs to load CS and DS with different values
-; other than the default.
-;----------------------------------------------------------------------------
-cprocstartdll16 PM_int386x
-
- ARG intno:UINT, inptr:DPTR, outptr:DPTR, sregs:DPTR
-
- LOCAL flags:UINT, sv_ds:UINT, sv_esi:ULONG = LocalSize
-
- enter_c
- push ds
- push es ; Save segment registers
- push fs
- push gs
-
- _lds _si,[sregs] ; DS:_SI -> Load segment registers
- mov es,[_si]
- mov bx,[_si+6]
- mov [sv_ds],_bx ; Save value of user DS on stack
- mov fs,[_si+8]
- mov gs,[_si+10]
-
- _lds _si,[inptr] ; Load CPU registers
- mov eax,[_si]
- mov ebx,[_si+4]
- mov ecx,[_si+8]
- mov edx,[_si+12]
- mov edi,[_si+20]
- mov esi,[_si+16]
-
- push ds ; Save value of DS
- push _bp ; Some interrupts trash this!
- clc ; Generate the interrupt
- push [UINT intno]
- mov ds,[WORD sv_ds] ; Set value of user's DS selector
- call _PM_genInt
- pop _bp ; Pop intno from stack (flags unchanged)
- pop _bp ; Restore value of stack frame pointer
- pop ds ; Restore value of DS
-
- pushf ; Save flags for later
- pop [UINT flags]
- push esi ; Save ESI for later
- pop [DWORD sv_esi]
- push ds ; Save DS for later
- pop [UINT sv_ds]
-
- _lds _si,[outptr] ; Save CPU registers
- mov [_si],eax
- mov [_si+4],ebx
- mov [_si+8],ecx
- mov [_si+12],edx
- push [DWORD sv_esi]
- pop [DWORD _si+16]
- mov [_si+20],edi
-
- mov _bx,[flags] ; Return flags
- and ebx,1h ; Isolate carry flag
- mov [_si+24],ebx ; Save carry flag status
-
- _lds _si,[sregs] ; Save segment registers
- mov [_si],es
- mov _bx,[sv_ds]
- mov [_si+6],bx ; Get returned DS from stack
- mov [_si+8],fs
- mov [_si+10],gs
-
- pop gs ; Restore segment registers
- pop fs
- pop es
- pop ds
- leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void PM_saveDS(void)
-;----------------------------------------------------------------------------
-; Save the value of DS into a section of the code segment, so that we can
-; quickly load this value at a later date in the PM_loadDS() routine from
-; inside interrupt handlers etc. The method to do this is different
-; depending on the DOS extender being used.
-;----------------------------------------------------------------------------
-cprocstartdll16 PM_saveDS
-
- mov [_PM_savedDS],ds ; Store away in data segment
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void PM_loadDS(void)
-;----------------------------------------------------------------------------
-; Routine to load the DS register with the default value for the current
-; DOS extender. Only the DS register is loaded, not the ES register, so
-; if you wish to call C code, you will need to also load the ES register
-; in 32 bit protected mode.
-;----------------------------------------------------------------------------
-cprocstartdll16 PM_loadDS
-
- mov ds,[cs:_PM_savedDS] ; We can access the proper DS through CS
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void PM_setBankA(int bank)
-;----------------------------------------------------------------------------
-cprocstart PM_setBankA
-
- ARG bank:UINT
-
- push ebp
- mov ebp,esp
- push ebx
- mov _bx,0
- mov _ax,4F05h
- mov _dx,[bank]
- int 10h
- pop ebx
- pop ebp
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void PM_setBankAB(int bank)
-;----------------------------------------------------------------------------
-cprocstart PM_setBankAB
-
- ARG bank:UINT
-
- push ebp
- mov ebp,esp
- push ebx
- mov _bx,0
- mov _ax,4F05h
- mov _dx,[bank]
- int 10h
- mov _bx,1
- mov _ax,4F05h
- mov _dx,[bank]
- int 10h
- pop ebx
- pop ebp
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void PM_setCRTStart(int x,int y,int waitVRT)
-;----------------------------------------------------------------------------
-cprocstart PM_setCRTStart
-
- ARG x:UINT, y:UINT, waitVRT:UINT
-
- push ebp
- mov ebp,esp
- push ebx
- mov _bx,[waitVRT]
- mov _cx,[x]
- mov _dx,[y]
- mov _ax,4F07h
- int 10h
- pop ebx
- pop ebp
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; int _PM_inp(int port)
-;----------------------------------------------------------------------------
-; Reads a byte from the specified port
-;----------------------------------------------------------------------------
-cprocstart _PM_inp
-
- ARG port:UINT
-
- push _bp
- mov _bp,_sp
- xor _ax,_ax
- mov _dx,[port]
- in al,dx
- pop _bp
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void _PM_outp(int port,int value)
-;----------------------------------------------------------------------------
-; Write a byte to the specified port.
-;----------------------------------------------------------------------------
-cprocstart _PM_outp
-
- ARG port:UINT, value:UINT
-
- push _bp
- mov _bp,_sp
- mov _dx,[port]
- mov _ax,[value]
- out dx,al
- pop _bp
- ret
-
-cprocend
-
-; Macro to delay briefly to ensure that enough time has elapsed between
-; successive I/O accesses so that the device being accessed can respond
-; to both accesses even on a very fast PC.
-
-ifdef USE_NASM
-%macro DELAY 0
- jmp short $+2
- jmp short $+2
- jmp short $+2
-%endmacro
-%macro IODELAYN 1
-%rep %1
- DELAY
-%endrep
-%endmacro
-else
-macro DELAY
- jmp short $+2
- jmp short $+2
- jmp short $+2
-endm
-macro IODELAYN N
- rept N
- DELAY
- endm
-endm
-endif
-
-;----------------------------------------------------------------------------
-; uchar _PM_readCMOS(int index)
-;----------------------------------------------------------------------------
-; Read the value of a specific CMOS register. We do this with both
-; normal interrupts and NMI disabled.
-;----------------------------------------------------------------------------
-cprocstart _PM_readCMOS
-
- ARG index:UINT
-
- push _bp
- mov _bp,_sp
- pushfd
- mov al,[BYTE index]
- or al,80h ; Add disable NMI flag
- cli
- out 70h,al
- IODELAYN 5
- in al,71h
- mov ah,al
- xor al,al
- IODELAYN 5
- out 70h,al ; Re-enable NMI
- sti
- mov al,ah ; Return value in AL
- popfd
- pop _bp
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void _PM_writeCMOS(int index,uchar value)
-;----------------------------------------------------------------------------
-; Read the value of a specific CMOS register. We do this with both
-; normal interrupts and NMI disabled.
-;----------------------------------------------------------------------------
-cprocstart _PM_writeCMOS
-
- ARG index:UINT, value:UCHAR
-
- push _bp
- mov _bp,_sp
- pushfd
- mov al,[BYTE index]
- or al,80h ; Add disable NMI flag
- cli
- out 70h,al
- IODELAYN 5
- mov al,[value]
- out 71h,al
- xor al,al
- IODELAYN 5
- out 70h,al ; Re-enable NMI
- sti
- popfd
- pop _bp
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; _PM_getPDB - Return the Page Table Directory Base address
-;----------------------------------------------------------------------------
-cprocstart _PM_getPDB
-
- mov eax,cr3
- and eax,0FFFFF000h
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; _PM_flushTLB - Flush the Translation Lookaside buffer
-;----------------------------------------------------------------------------
-cprocstart PM_flushTLB
-
- wbinvd ; Flush the CPU cache
- mov eax,cr3
- mov cr3,eax ; Flush the TLB
- ret
-
-cprocend
-
-endcodeseg _pm
-
- END ; End of module
diff --git a/board/MAI/bios_emulator/scitech/src/pm/smx/_pmsmx.asm b/board/MAI/bios_emulator/scitech/src/pm/smx/_pmsmx.asm
deleted file mode 100644
index 8352ce30c1..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/smx/_pmsmx.asm
+++ /dev/null
@@ -1,933 +0,0 @@
-;****************************************************************************
-;*
-;* SciTech OS Portability Manager Library
-;*
-;* ========================================================================
-;*
-;* The contents of this file are subject to the SciTech MGL Public
-;* License Version 1.0 (the "License"); you may not use this file
-;* except in compliance with the License. You may obtain a copy of
-;* the License at http://www.scitechsoft.com/mgl-license.txt
-;*
-;* Software distributed under the License is distributed on an
-;* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-;* implied. See the License for the specific language governing
-;* rights and limitations under the License.
-;*
-;* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-;*
-;* The Initial Developer of the Original Code is SciTech Software, Inc.
-;* All Rights Reserved.
-;*
-;* ========================================================================
-;*
-;* Language: 80386 Assembler, TASM 4.0 or NASM
-;* Environment: 32-bit SMX embedded systems development
-;*
-;* Description: Low level assembly support for the PM library specific to
-;* SMX interrupt handling.
-;*
-;****************************************************************************
-
- IDEAL
-
-include "scitech.mac" ; Memory model macros
-
-header _pmsmx ; Set up memory model
-
-; Define the size of our local stacks. For real mode code they cant be
-; that big, but for 32 bit protected mode code we can make them nice and
-; large so that complex C functions can be used.
-
-MOUSE_STACK EQU 4096
-TIMER_STACK EQU 4096
-KEY_STACK EQU 1024
-INT10_STACK EQU 1024
-
-ifdef USE_NASM
-
-; Macro to load DS and ES registers with correct value.
-
-%imacro LOAD_DS 0
- mov ds,[cs:_PM_savedDS]
- mov es,[cs:_PM_savedDS]
-%endmacro
-
-; Note that interrupts we disable interrupts during the following stack
-; %imacro for correct operation, but we do not enable them again. Normally
-; these %imacros are used within interrupt handlers so interrupts should
-; already be off. We turn them back on explicitly later if the user code
-; needs them to be back on.
-
-; Macro to switch to a new local stack.
-
-%imacro NEWSTK 1
- cli
- mov [seg_%1],ss
- mov [ptr_%1],_sp
- mov [TempSeg],ds
- mov ss,[TempSeg]
- mov _sp,offset %1
-%endmacro
-
-; %imacro to switch back to the old stack.
-
-%imacro RESTSTK 1
- cli
- mov ss,[seg_%1]
- mov _sp,[ptr_%1]
-%endmacro
-
-; %imacro to swap the current stack with the one saved away.
-
-%imacro SWAPSTK 1
- cli
- mov ax,ss
- xchg ax,[seg_%1]
- mov ss,ax
- xchg _sp,[ptr_%1]
-%endmacro
-
-else
-
-; Macro to load DS and ES registers with correct value.
-
-MACRO LOAD_DS
- mov ds,[cs:_PM_savedDS]
- mov es,[cs:_PM_savedDS]
-ENDM
-
-; Note that interrupts we disable interrupts during the following stack
-; macro for correct operation, but we do not enable them again. Normally
-; these macros are used within interrupt handlers so interrupts should
-; already be off. We turn them back on explicitly later if the user code
-; needs them to be back on.
-
-; Macro to switch to a new local stack.
-
-MACRO NEWSTK stkname
- cli
- mov [seg_&stkname&],ss
- mov [ptr_&stkname&],_sp
- mov [TempSeg],ds
- mov ss,[TempSeg]
- mov _sp,offset stkname
-ENDM
-
-; Macro to switch back to the old stack.
-
-MACRO RESTSTK stkname
- cli
- mov ss,[seg_&stkname&]
- mov _sp,[ptr_&stkname&]
-ENDM
-
-; Macro to swap the current stack with the one saved away.
-
-MACRO SWAPSTK stkname
- cli
- mov ax,ss
- xchg ax,[seg_&stkname&]
- mov ss,ax
- xchg _sp,[ptr_&stkname&]
-ENDM
-
-endif
-
-begdataseg _pmsmx
-
- cextern _PM_savedDS,USHORT
- cextern _PM_critHandler,CPTR
- cextern _PM_breakHandler,CPTR
- cextern _PM_timerHandler,CPTR
- cextern _PM_rtcHandler,CPTR
- cextern _PM_keyHandler,CPTR
- cextern _PM_key15Handler,CPTR
- cextern _PM_mouseHandler,CPTR
- cextern _PM_int10Handler,CPTR
-
- cextern _PM_ctrlCPtr,DPTR
- cextern _PM_ctrlBPtr,DPTR
- cextern _PM_critPtr,DPTR
-
- cextern _PM_prevTimer,FCPTR
- cextern _PM_prevRTC,FCPTR
- cextern _PM_prevKey,FCPTR
- cextern _PM_prevKey15,FCPTR
- cextern _PM_prevBreak,FCPTR
- cextern _PM_prevCtrlC,FCPTR
- cextern _PM_prevCritical,FCPTR
- cextern _PM_prevRealTimer,ULONG
- cextern _PM_prevRealRTC,ULONG
- cextern _PM_prevRealKey,ULONG
- cextern _PM_prevRealKey15,ULONG
- cextern _PM_prevRealInt10,ULONG
-
-cpublic _PM_pmsmxDataStart
-
-; Allocate space for all of the local stacks that we need. These stacks
-; are not very large, but should be large enough for most purposes
-; (generally you want to handle these interrupts quickly, simply storing
-; the information for later and then returning). If you need bigger
-; stacks then change the appropriate value in here.
-
- ALIGN 4
- dclb MOUSE_STACK ; Space for local stack (small)
-MsStack: ; Stack starts at end!
-ptr_MsStack DUINT 0 ; Place to store old stack offset
-seg_MsStack dw 0 ; Place to store old stack segment
-
- ALIGN 4
- dclb INT10_STACK ; Space for local stack (small)
-Int10Stack: ; Stack starts at end!
-ptr_Int10Stack DUINT 0 ; Place to store old stack offset
-seg_Int10Stack dw 0 ; Place to store old stack segment
-
- ALIGN 4
- dclb TIMER_STACK ; Space for local stack (small)
-TmStack: ; Stack starts at end!
-ptr_TmStack DUINT 0 ; Place to store old stack offset
-seg_TmStack dw 0 ; Place to store old stack segment
-
- ALIGN 4
- dclb TIMER_STACK ; Space for local stack (small)
-RtcStack: ; Stack starts at end!
-ptr_RtcStack DUINT 0 ; Place to store old stack offset
-seg_RtcStack dw 0 ; Place to store old stack segment
-RtcInside dw 0 ; Are we still handling current interrupt
-
- ALIGN 4
- dclb KEY_STACK ; Space for local stack (small)
-KyStack: ; Stack starts at end!
-ptr_KyStack DUINT 0 ; Place to store old stack offset
-seg_KyStack dw 0 ; Place to store old stack segment
-KyInside dw 0 ; Are we still handling current interrupt
-
- ALIGN 4
- dclb KEY_STACK ; Space for local stack (small)
-Ky15Stack: ; Stack starts at end!
-ptr_Ky15Stack DUINT 0 ; Place to store old stack offset
-seg_Ky15Stack dw 0 ; Place to store old stack segment
-
-TempSeg dw 0 ; Place to store stack segment
-
-cpublic _PM_pmsmxDataEnd
-
-enddataseg _pmsmx
-
-begcodeseg _pmsmx ; Start of code segment
-
-cpublic _PM_pmsmxCodeStart
-
-;----------------------------------------------------------------------------
-; PM_mouseISR - Mouse interrupt subroutine dispatcher
-;----------------------------------------------------------------------------
-; Interrupt subroutine called by the mouse driver upon interrupts, to
-; dispatch control to high level C based subroutines. Interrupts are on
-; when we call the user code.
-;
-; It is _extremely_ important to save the state of the extended registers
-; as these may well be trashed by the routines called from here and not
-; restored correctly by the mouse interface module.
-;
-; NOTE: This routine switches to a local stack before calling any C code,
-; and hence is _not_ re-entrant. For mouse handlers this is not a
-; problem, as the mouse driver arbitrates calls to the user mouse
-; handler for us.
-;
-; Entry: AX - Condition mask giving reason for call
-; BX - Mouse button state
-; CX - Horizontal cursor coordinate
-; DX - Vertical cursor coordinate
-; SI - Horizontal mickey value
-; DI - Vertical mickey value
-;
-;----------------------------------------------------------------------------
-cprocfar _PM_mouseISR
-
- push ds ; Save value of DS
- push es
- pushad ; Save _all_ extended registers
- cld ; Clear direction flag
-
- LOAD_DS ; Load DS register
- NEWSTK MsStack ; Switch to local stack
-
-; Call the installed high level C code routine
-
- clrhi dx ; Clear out high order values
- clrhi cx
- clrhi bx
- clrhi ax
- sgnhi si
- sgnhi di
-
- push _di
- push _si
- push _dx
- push _cx
- push _bx
- push _ax
- sti ; Enable interrupts
- call [CPTR _PM_mouseHandler]
- _add sp,12,24
-
- RESTSTK MsStack ; Restore previous stack
-
- popad ; Restore all extended registers
- pop es
- pop ds
- ret ; We are done!!
-
-cprocend
-
-;----------------------------------------------------------------------------
-; PM_timerISR - Timer interrupt subroutine dispatcher
-;----------------------------------------------------------------------------
-; Hardware interrupt handler for the timer interrupt, to dispatch control
-; to high level C based subroutines. We save the state of all registers
-; in this routine, and switch to a local stack. Interrupts are *off*
-; when we call the user code.
-;
-; NOTE: This routine switches to a local stack before calling any C code,
-; and hence is _not_ re-entrant. Make sure your C code executes as
-; quickly as possible, since a timer overrun will simply hang the
-; system.
-;----------------------------------------------------------------------------
-cprocfar _PM_timerISR
-
- push ds ; Save value of DS
- push es
- pushad ; Save _all_ extended registers
- cld ; Clear direction flag
-
- LOAD_DS ; Load DS register
-
- NEWSTK TmStack ; Switch to local stack
- call [CPTR _PM_timerHandler]
- RESTSTK TmStack ; Restore previous stack
-
- popad ; Restore all extended registers
- pop es
- pop ds
- iret ; Return from interrupt
-
-cprocend
-
-;----------------------------------------------------------------------------
-; PM_chainPrevTimer - Chain to previous timer interrupt and return
-;----------------------------------------------------------------------------
-; Chains to the previous timer interrupt routine and returns control
-; back to the high level interrupt handler.
-;----------------------------------------------------------------------------
-cprocstart PM_chainPrevTimer
-
-ifdef TNT
- push eax
- push ebx
- push ecx
- pushfd ; Push flags on stack to simulate interrupt
- mov ax,250Eh ; Call real mode procedure function
- mov ebx,[_PM_prevRealTimer]
- mov ecx,1 ; Copy real mode flags to real mode stack
- int 21h ; Call the real mode code
- popfd
- pop ecx
- pop ebx
- pop eax
- ret
-else
- SWAPSTK TmStack ; Swap back to previous stack
- pushf ; Save state of interrupt flag
- pushf ; Push flags on stack to simulate interrupt
-ifdef USE_NASM
- call far dword [_PM_prevTimer]
-else
- call [_PM_prevTimer]
-endif
- popf ; Restore state of interrupt flag
- SWAPSTK TmStack ; Swap back to C stack again
- ret
-endif
-
-cprocend
-
-; Macro to delay briefly to ensure that enough time has elapsed between
-; successive I/O accesses so that the device being accessed can respond
-; to both accesses even on a very fast PC.
-
-ifdef USE_NASM
-%macro DELAY 0
- jmp short $+2
- jmp short $+2
- jmp short $+2
-%endmacro
-%macro IODELAYN 1
-%rep %1
- DELAY
-%endrep
-%endmacro
-else
-macro DELAY
- jmp short $+2
- jmp short $+2
- jmp short $+2
-endm
-macro IODELAYN N
- rept N
- DELAY
- endm
-endm
-endif
-
-;----------------------------------------------------------------------------
-; PM_rtcISR - Real time clock interrupt subroutine dispatcher
-;----------------------------------------------------------------------------
-; Hardware interrupt handler for the timer interrupt, to dispatch control
-; to high level C based subroutines. We save the state of all registers
-; in this routine, and switch to a local stack. Interrupts are *off*
-; when we call the user code.
-;
-; NOTE: This routine switches to a local stack before calling any C code,
-; and hence is _not_ re-entrant. Make sure your C code executes as
-; quickly as possible, since a timer overrun will simply hang the
-; system.
-;----------------------------------------------------------------------------
-cprocfar _PM_rtcISR
-
- push ds ; Save value of DS
- push es
- pushad ; Save _all_ extended registers
- cld ; Clear direction flag
-
-; Clear priority interrupt controller and re-enable interrupts so we
-; dont lock things up for long.
-
- mov al,20h
- out 0A0h,al
- out 020h,al
-
-; Clear real-time clock timeout
-
- in al,70h ; Read CMOS index register
- push _ax ; and save for later
- IODELAYN 3
- mov al,0Ch
- out 70h,al
- IODELAYN 5
- in al,71h
-
-; Call the C interrupt handler function
-
- LOAD_DS ; Load DS register
- cmp [BYTE RtcInside],1 ; Check for mutual exclusion
- je @@Exit
- mov [BYTE RtcInside],1
- sti ; Re-enable interrupts
- NEWSTK RtcStack ; Switch to local stack
- call [CPTR _PM_rtcHandler]
- RESTSTK RtcStack ; Restore previous stack
- mov [BYTE RtcInside],0
-
-@@Exit: pop _ax
- out 70h,al ; Restore CMOS index register
- popad ; Restore all extended registers
- pop es
- pop ds
- iret ; Return from interrupt
-
-cprocend
-
-;----------------------------------------------------------------------------
-; PM_keyISR - keyboard interrupt subroutine dispatcher
-;----------------------------------------------------------------------------
-; Hardware interrupt handler for the keyboard interrupt, to dispatch control
-; to high level C based subroutines. We save the state of all registers
-; in this routine, and switch to a local stack. Interrupts are *off*
-; when we call the user code.
-;
-; NOTE: This routine switches to a local stack before calling any C code,
-; and hence is _not_ re-entrant. However we ensure within this routine
-; mutual exclusion to the keyboard handling routine.
-;----------------------------------------------------------------------------
-cprocfar _PM_keyISR
-
- push ds ; Save value of DS
- push es
- pushad ; Save _all_ extended registers
- cld ; Clear direction flag
-
- LOAD_DS ; Load DS register
-
- cmp [BYTE KyInside],1 ; Check for mutual exclusion
- je @@Reissued
-
- mov [BYTE KyInside],1
- NEWSTK KyStack ; Switch to local stack
- call [CPTR _PM_keyHandler] ; Call C code
- RESTSTK KyStack ; Restore previous stack
- mov [BYTE KyInside],0
-
-@@Exit: popad ; Restore all extended registers
- pop es
- pop ds
- iret ; Return from interrupt
-
-; When the BIOS keyboard handler needs to change the SHIFT status lights
-; on the keyboard, in the process of doing this the keyboard controller
-; re-issues another interrupt, while the current handler is still executing.
-; If we recieve another interrupt while still handling the current one,
-; then simply chain directly to the previous handler.
-;
-; Note that for most DOS extenders, the real mode interrupt handler that we
-; install takes care of this for us.
-
-@@Reissued:
-ifdef TNT
- push eax
- push ebx
- push ecx
- pushfd ; Push flags on stack to simulate interrupt
- mov ax,250Eh ; Call real mode procedure function
- mov ebx,[_PM_prevRealKey]
- mov ecx,1 ; Copy real mode flags to real mode stack
- int 21h ; Call the real mode code
- popfd
- pop ecx
- pop ebx
- pop eax
-else
- pushf
-ifdef USE_NASM
- call far dword [_PM_prevKey]
-else
- call [_PM_prevKey]
-endif
-endif
- jmp @@Exit
-
-cprocend
-
-;----------------------------------------------------------------------------
-; PM_chainPrevkey - Chain to previous key interrupt and return
-;----------------------------------------------------------------------------
-; Chains to the previous key interrupt routine and returns control
-; back to the high level interrupt handler.
-;----------------------------------------------------------------------------
-cprocstart PM_chainPrevKey
-
-ifdef TNT
- push eax
- push ebx
- push ecx
- pushfd ; Push flags on stack to simulate interrupt
- mov ax,250Eh ; Call real mode procedure function
- mov ebx,[_PM_prevRealKey]
- mov ecx,1 ; Copy real mode flags to real mode stack
- int 21h ; Call the real mode code
- popfd
- pop ecx
- pop ebx
- pop eax
- ret
-else
-
-; YIKES! For some strange reason, when execution returns from the
-; previous keyboard handler, interrupts are re-enabled!! Since we expect
-; interrupts to remain off during the duration of our handler, this can
-; cause havoc. However our stack macros always turn off interrupts, so they
-; will be off when we exit this routine. Obviously there is a tiny weeny
-; window when interrupts will be enabled, but there is nothing we can
-; do about this.
-
- SWAPSTK KyStack ; Swap back to previous stack
- pushf ; Push flags on stack to simulate interrupt
-ifdef USE_NASM
- call far dword [_PM_prevKey]
-else
- call [_PM_prevKey]
-endif
- SWAPSTK KyStack ; Swap back to C stack again
- ret
-endif
-
-cprocend
-
-;----------------------------------------------------------------------------
-; PM_key15ISR - Int 15h keyboard interrupt subroutine dispatcher
-;----------------------------------------------------------------------------
-; This routine gets called if we have been called to handle the Int 15h
-; keyboard interrupt callout from real mode.
-;
-; Entry: AX - Hardware scan code to process
-; Exit: AX - Hardware scan code to process (0 to ignore)
-;----------------------------------------------------------------------------
-cprocfar _PM_key15ISR
-
- push ds
- push es
- LOAD_DS
- cmp ah,4Fh
- jnz @@NotOurs ; Quit if not keyboard callout
-
- pushad
- cld ; Clear direction flag
- xor ah,ah ; AX := scan code
- NEWSTK Ky15Stack ; Switch to local stack
- push _ax
- call [CPTR _PM_key15Handler] ; Call C code
- _add sp,2,4
- RESTSTK Ky15Stack ; Restore previous stack
- test ax,ax
- jz @@1
- stc ; Set carry to process as normal
- jmp @@2
-@@1: clc ; Clear carry to ignore scan code
-@@2: popad
- jmp @@Exit ; We are done
-
-@@NotOurs:
-ifdef TNT
- push eax
- push ebx
- push ecx
- pushfd ; Push flags on stack to simulate interrupt
- mov ax,250Eh ; Call real mode procedure function
- mov ebx,[_PM_prevRealKey15]
- mov ecx,1 ; Copy real mode flags to real mode stack
- int 21h ; Call the real mode code
- popfd
- pop ecx
- pop ebx
- pop eax
-else
- pushf
-ifdef USE_NASM
- call far dword [_PM_prevKey15]
-else
- call [_PM_prevKey15]
-endif
-endif
-@@Exit: pop es
- pop ds
- retf 4
-
-cprocend
-
-;----------------------------------------------------------------------------
-; PM_breakISR - Control Break interrupt subroutine dispatcher
-;----------------------------------------------------------------------------
-; Hardware interrupt handler for the Ctrl-Break interrupt. We simply set
-; the Ctrl-Break flag to a 1 and leave (note that this is accessed through
-; a far pointer, as it may well be located in conventional memory).
-;----------------------------------------------------------------------------
-cprocfar _PM_breakISR
-
- sti
- push ds ; Save value of DS
- push es
- push _bx
-
- LOAD_DS ; Load DS register
- mov ebx,[_PM_ctrlBPtr]
- mov [UINT _ES _bx],1
-
-; Run alternate break handler code if installed
-
- cmp [CPTR _PM_breakHandler],0
- je @@Exit
-
- pushad
- mov _ax,1
- push _ax
- call [CPTR _PM_breakHandler] ; Call C code
- pop _ax
- popad
-
-@@Exit: pop _bx
- pop es
- pop ds
- iret ; Return from interrupt
-
-cprocend
-
-;----------------------------------------------------------------------------
-; int PM_ctrlBreakHit(int clearFlag)
-;----------------------------------------------------------------------------
-; Returns the current state of the Ctrl-Break flag and possibly clears it.
-;----------------------------------------------------------------------------
-cprocstart PM_ctrlBreakHit
-
- ARG clearFlag:UINT
-
- enter_c
- pushf ; Save interrupt status
- push es
- mov ebx,[_PM_ctrlBPtr]
- cli ; No interrupts thanks!
- mov _ax,[_ES _bx]
- test [BYTE clearFlag],1
- jz @@Done
- mov [UINT _ES _bx],0
-
-@@Done: pop es
- popf ; Restore interrupt status
- leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; PM_ctrlCISR - Control Break interrupt subroutine dispatcher
-;----------------------------------------------------------------------------
-; Hardware interrupt handler for the Ctrl-C interrupt. We simply set
-; the Ctrl-C flag to a 1 and leave (note that this is accessed through
-; a far pointer, as it may well be located in conventional memory).
-;----------------------------------------------------------------------------
-cprocfar _PM_ctrlCISR
-
- sti
- push ds ; Save value of DS
- push es
- push _bx
-
- LOAD_DS ; Load DS register
- mov ebx,[_PM_ctrlCPtr]
- mov [UINT _ES _bx],1
-
-; Run alternate break handler code if installed
-
- cmp [CPTR _PM_breakHandler],0
- je @@Exit
-
- pushad
- mov _ax,0
- push _ax
- call [CPTR _PM_breakHandler] ; Call C code
- pop _ax
- popad
-
-@@Exit: pop _bx
- pop es
- pop ds
- iret ; Return from interrupt
- iretd
-
-cprocend
-
-;----------------------------------------------------------------------------
-; int PM_ctrlCHit(int clearFlag)
-;----------------------------------------------------------------------------
-; Returns the current state of the Ctrl-C flag and possibly clears it.
-;----------------------------------------------------------------------------
-cprocstart PM_ctrlCHit
-
- ARG clearFlag:UINT
-
- enter_c
- pushf ; Save interrupt status
- push es
- mov ebx,[_PM_ctrlCPtr]
- cli ; No interrupts thanks!
- mov _ax,[_ES _bx]
- test [BYTE clearFlag],1
- jz @@Done
- mov [UINT _ES _bx],0
-
-@@Done:
- pop es
- popf ; Restore interrupt status
- leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; PM_criticalISR - Control Error handler interrupt subroutine dispatcher
-;----------------------------------------------------------------------------
-; Interrupt handler for the MSDOS Critical Error interrupt, to dispatch
-; control to high level C based subroutines. We save the state of all
-; registers in this routine, and switch to a local stack. We also pass
-; the values of the AX and DI registers to the as pointers, so that the
-; values can be modified before returning to MSDOS.
-;----------------------------------------------------------------------------
-cprocfar _PM_criticalISR
-
- sti
- push ds ; Save value of DS
- push es
- push _bx ; Save register values changed
- cld ; Clear direction flag
-
- LOAD_DS ; Load DS register
- mov ebx,[_PM_critPtr]
- mov [_ES _bx],ax
- mov [_ES _bx+2],di
-
-; Run alternate critical handler code if installed
-
- cmp [CPTR _PM_critHandler],0
- je @@NoAltHandler
-
- pushad
- push _di
- push _ax
- call [CPTR _PM_critHandler] ; Call C code
- _add sp,4,8
- popad
-
- pop _bx
- pop es
- pop ds
- iret ; Return from interrupt
-
-@@NoAltHandler:
- mov ax,3 ; Tell MSDOS to fail the operation
- pop _bx
- pop es
- pop ds
- iret ; Return from interrupt
-
-cprocend
-
-;----------------------------------------------------------------------------
-; int PM_criticalError(int *axVal,int *diVal,int clearFlag)
-;----------------------------------------------------------------------------
-; Returns the current state of the critical error flags, and the values that
-; MSDOS passed in the AX and DI registers to our handler.
-;----------------------------------------------------------------------------
-cprocstart PM_criticalError
-
- ARG axVal:DPTR, diVal:DPTR, clearFlag:UINT
-
- enter_c
- pushf ; Save interrupt status
- push es
- mov ebx,[_PM_critPtr]
- cli ; No interrupts thanks!
- xor _ax,_ax
- xor _di,_di
- mov ax,[_ES _bx]
- mov di,[_ES _bx+2]
- test [BYTE clearFlag],1
- jz @@NoClear
- mov [ULONG _ES _bx],0
-@@NoClear:
- _les _bx,[axVal]
- mov [_ES _bx],_ax
- _les _bx,[diVal]
- mov [_ES _bx],_di
- pop es
- popf ; Restore interrupt status
- leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void PM_setMouseHandler(int mask, PM_mouseHandler mh)
-;----------------------------------------------------------------------------
-cprocstart _PM_setMouseHandler
-
- ARG mouseMask:UINT
-
- enter_c
- push es
-
- mov ax,0Ch ; AX := Function 12 - install interrupt sub
- mov _cx,[mouseMask] ; CX := mouse mask
- mov _dx,offset _PM_mouseISR
- push cs
- pop es ; ES:_DX -> mouse handler
- int 33h ; Call mouse driver
-
- pop es
- leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void PM_mousePMCB(void)
-;----------------------------------------------------------------------------
-; Mouse realmode callback routine. Upon entry to this routine, we recieve
-; the following from the DPMI server:
-;
-; Entry: DS:_SI -> Real mode stack at time of call
-; ES:_DI -> Real mode register data structure
-; SS:_SP -> Locked protected mode stack to use
-;----------------------------------------------------------------------------
-cprocfar _PM_mousePMCB
-
- pushad
- mov eax,[es:_di+1Ch] ; Load register values from real mode
- mov ebx,[es:_di+10h]
- mov ecx,[es:_di+18h]
- mov edx,[es:_di+14h]
- mov esi,[es:_di+04h]
- mov edi,[es:_di]
- call _PM_mouseISR ; Call the mouse handler
- popad
-
- mov ax,[ds:_si]
- mov [es:_di+2Ah],ax ; Plug in return IP address
- mov ax,[ds:_si+2]
- mov [es:_di+2Ch],ax ; Plug in return CS value
- add [WORD es:_di+2Eh],4 ; Remove return address from stack
- iret ; Go back to real mode!
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void PM_int10PMCB(void)
-;----------------------------------------------------------------------------
-; int10 realmode callback routine. Upon entry to this routine, we recieve
-; the following from the DPMI server:
-;
-; Entry: DS:ESI -> Real mode stack at time of call
-; ES:EDI -> Real mode register data structure
-; SS:ESP -> Locked protected mode stack to use
-;----------------------------------------------------------------------------
-cprocfar _PM_int10PMCB
-
- pushad
- push ds
- push es
- push fs
-
- pushfd
- pop eax
- mov [es:edi+20h],ax ; Save return flag status
- mov ax,[ds:esi]
- mov [es:edi+2Ah],ax ; Plug in return IP address
- mov ax,[ds:esi+2]
- mov [es:edi+2Ch],ax ; Plug in return CS value
- add [WORD es:edi+2Eh],4 ; Remove return address from stack
-
-; Call the install int10 handler in protected mode. This function gets called
-; with DS set to the current data selector, and ES:EDI pointing the the
-; real mode DPMI register structure at the time of the interrupt. The
-; handle must be written in assembler to be able to extract the real mode
-; register values from the structure
-
- push es
- pop fs ; FS:EDI -> real mode registers
- LOAD_DS
- NEWSTK Int10Stack ; Switch to local stack
-
- call [_PM_int10Handler]
-
- RESTSTK Int10Stack ; Restore previous stack
- pop fs
- pop es
- pop ds
- popad
- iret ; Go back to real mode!
-
-cprocend
-
-cpublic _PM_pmsmxCodeEnd
-
-endcodeseg _pmsmx
-
- END ; End of module
diff --git a/board/MAI/bios_emulator/scitech/src/pm/smx/_vflat.asm b/board/MAI/bios_emulator/scitech/src/pm/smx/_vflat.asm
deleted file mode 100644
index 34985a9d8b..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/smx/_vflat.asm
+++ /dev/null
@@ -1,652 +0,0 @@
-;****************************************************************************
-;*
-;* SciTech OS Portability Manager Library
-;*
-;* ========================================================================
-;*
-;* The contents of this file are subject to the SciTech MGL Public
-;* License Version 1.0 (the "License"); you may not use this file
-;* except in compliance with the License. You may obtain a copy of
-;* the License at http://www.scitechsoft.com/mgl-license.txt
-;*
-;* Software distributed under the License is distributed on an
-;* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-;* implied. See the License for the specific language governing
-;* rights and limitations under the License.
-;*
-;* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-;*
-;* The Initial Developer of the Original Code is SciTech Software, Inc.
-;* All Rights Reserved.
-;*
-;* ========================================================================
-;*
-;* Based on original code Copyright 1994 Otto Chrons
-;*
-;* Language: 80386 Assembler, TASM 4.0 or later
-;* Environment: IBM PC 32 bit protected mode
-;*
-;* Description: Low level page fault handler for virtual linear framebuffers.
-;*
-;****************************************************************************
-
- IDEAL
- JUMPS
-
-include "scitech.mac" ; Memory model macros
-
-header _vflat ; Set up memory model
-
-VFLAT_START EQU 0F0000000h
-VFLAT_END EQU 0F03FFFFFh
-PAGE_PRESENT EQU 1
-PAGE_NOTPRESENT EQU 0
-PAGE_READ EQU 0
-PAGE_WRITE EQU 2
-
-ifdef DOS4GW
-
-;----------------------------------------------------------------------------
-; DOS4G/W flat linear framebuffer emulation.
-;----------------------------------------------------------------------------
-
-begdataseg _vflat
-
-; Near pointers to the page directory base and our page tables. All of
-; this memory is always located in the first Mb of DOS memory.
-
-PDBR dd 0 ; Page directory base register (CR3)
-accessPageAddr dd 0
-accessPageTable dd 0
-
-; CauseWay page directory & 1st page table linear addresses.
-
-CauseWayDIRLinear dd 0
-CauseWay1stLinear dd 0
-
-; Place to store a copy of the original Page Table Directory before we
-; intialised our virtual buffer code.
-
-pageDirectory: resd 1024 ; Saved page table directory
-
-ValidCS dw 0 ; Valid CS for page faults
-Ring0CS dw 0 ; Our ring 0 code selector
-LastPage dd 0 ; Last page we mapped in
-BankFuncBuf: resb 101 ; Place to store bank switch code
-BankFuncPtr dd offset BankFuncBuf
-
-INT14Gate:
-INT14Offset dd 0 ; eip of original vector
-INT14Selector dw 0 ; cs of original vector
-
- cextern _PM_savedDS,USHORT
- cextern VF_haveCauseWay,BOOL
-
-enddataseg _vflat
-
-begcodeseg _vflat ; Start of code segment
-
- cextern VF_malloc,FPTR
-
-;----------------------------------------------------------------------------
-; PF_handler64k - Page fault handler for 64k banks
-;----------------------------------------------------------------------------
-; The handler below is a 32 bit ring 0 page fault handler. It receives
-; control immediately after any page fault or after an IRQ6 (hardware
-; interrupt). This provides the fastest possible handling of page faults
-; since it jump directly here. If this is a page fault, the number
-; immediately on the stack will be an error code, at offset 4 will be
-; the eip of the faulting instruction, at offset 8 will be the cs of the
-; faulting instruction. If it is a hardware interrupt, it will not have
-; the error code and the eflags will be at offset 8.
-;----------------------------------------------------------------------------
-cprocfar PF_handler64k
-
-; Check if this is a processor exeception or a page fault
-
- push eax
- mov ax,[cs:ValidCS] ; Use CS override to access data
- cmp [ss:esp+12],ax ; Is this a page fault?
- jne @@ToOldHandler ; Nope, jump to the previous handler
-
-; Get address of page fault and check if within our handlers range
-
- mov eax,cr2 ; EBX has page fault linear address
- cmp eax,VFLAT_START ; Is the fault less than ours?
- jb @@ToOldHandler ; Yep, go to previous handler
- cmp eax,VFLAT_END ; Is the fault more than ours?
- jae @@ToOldHandler ; Yep, go to previous handler
-
-; This is our page fault, so we need to handle it
-
- pushad
- push ds
- push es
- mov ebx,eax ; EBX := page fault address
- and ebx,invert 0FFFFh ; Mask to 64k bank boundary
- mov ds,[cs:_PM_savedDS]; Load segment registers
- mov es,[cs:_PM_savedDS]
-
-; Map in the page table for our virtual framebuffer area for modification
-
- mov edi,[PDBR] ; EDI points to page directory
- mov edx,ebx ; EDX = linear address
- shr edx,22 ; EDX = offset to page directory
- mov edx,[edx*4+edi] ; EDX = physical page table address
- mov eax,edx
- mov edx,[accessPageTable]
- or eax,7
- mov [edx],eax
- mov eax,cr3
- mov cr3,eax ; Update page table cache
-
-; Mark all pages valid for the new page fault area
-
- mov esi,ebx ; ESI := linear address for page
- shr esi,10
- and esi,0FFFh ; Offset into page table
- add esi,[accessPageAddr]
-ifdef USE_NASM
-%assign off 0
-%rep 16
- or [DWORD esi+off],0000000001h ; Enable pages
-%assign off off+4
-%endrep
-else
-off = 0
-REPT 16
- or [DWORD esi+off],0000000001h ; Enable pages
-off = off+4
-ENDM
-endif
-
-; Mark all pages invalid for the previously mapped area
-
- xchg esi,[LastPage] ; Save last page for next page fault
- test esi,esi
- jz @@DoneMapping ; Dont update if first time round
-ifdef USE_NASM
-%assign off 0
-%rep 16
- or [DWORD esi+off],0FFFFFFFEh ; Disable pages
-%assign off off+4
-%endrep
-else
-off = 0
-REPT 16
- and [DWORD esi+off],0FFFFFFFEh ; Disable pages
-off = off+4
-ENDM
-endif
-
-@@DoneMapping:
- mov eax,cr3
- mov cr3,eax ; Flush the TLB
-
-; Now program the new SuperVGA starting bank address
-
- mov eax,ebx ; EAX := page fault address
- shr eax,16
- and eax,0FFh ; Mask to 0-255
- call [BankFuncPtr] ; Call the bank switch function
-
- pop es
- pop ds
- popad
- pop eax
- add esp,4 ; Pop the error code from stack
- iretd ; Return to faulting instruction
-
-@@ToOldHandler:
- pop eax
-ifdef USE_NASM
- jmp far dword [cs:INT14Gate]; Chain to previous handler
-else
- jmp [FWORD cs:INT14Gate]; Chain to previous handler
-endif
-
-cprocend
-
-;----------------------------------------------------------------------------
-; PF_handler4k - Page fault handler for 4k banks
-;----------------------------------------------------------------------------
-; The handler below is a 32 bit ring 0 page fault handler. It receives
-; control immediately after any page fault or after an IRQ6 (hardware
-; interrupt). This provides the fastest possible handling of page faults
-; since it jump directly here. If this is a page fault, the number
-; immediately on the stack will be an error code, at offset 4 will be
-; the eip of the faulting instruction, at offset 8 will be the cs of the
-; faulting instruction. If it is a hardware interrupt, it will not have
-; the error code and the eflags will be at offset 8.
-;----------------------------------------------------------------------------
-cprocfar PF_handler4k
-
-; Fill in when we have tested all the 64Kb code
-
-ifdef USE_NASM
- jmp far dword [cs:INT14Gate]; Chain to previous handler
-else
- jmp [FWORD cs:INT14Gate]; Chain to previous handler
-endif
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void InstallFaultHandler(void *baseAddr,int bankSize)
-;----------------------------------------------------------------------------
-; Installes the page fault handler directly int the interrupt descriptor
-; table for maximum performance. This of course requires ring 0 access,
-; but none of this stuff will run without ring 0!
-;----------------------------------------------------------------------------
-cprocstart InstallFaultHandler
-
- ARG baseAddr:ULONG, bankSize:UINT
-
- enter_c
-
- mov [DWORD LastPage],0 ; No pages have been mapped
- mov ax,cs
- mov [ValidCS],ax ; Save CS value for page faults
-
-; Put address of our page fault handler into the IDT directly
-
- sub esp,6 ; Allocate space on stack
-ifdef USE_NASM
- sidt [ss:esp] ; Store pointer to IDT
-else
- sidt [FWORD ss:esp] ; Store pointer to IDT
-endif
- pop ax ; add esp,2
- pop eax ; Absolute address of IDT
- add eax,14*8 ; Point to Int #14
-
-; Note that Interrupt gates do not have the high and low word of the
-; offset in adjacent words in memory, there are 4 bytes separating them.
-
- mov ecx,[eax] ; Get cs and low 16 bits of offset
- mov edx,[eax+6] ; Get high 16 bits of offset in dx
- shl edx,16
- mov dx,cx ; edx has offset
- mov [INT14Offset],edx ; Save offset
- shr ecx,16
- mov [INT14Selector],cx ; Save original cs
- mov [eax+2],cs ; Install new cs
- mov edx,offset PF_handler64k
- cmp [UINT bankSize],4
- jne @@1
- mov edx,offset PF_handler4k
-@@1: mov [eax],dx ; Install low word of offset
- shr edx,16
- mov [eax+6],dx ; Install high word of offset
-
- leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void RemoveFaultHandler(void)
-;----------------------------------------------------------------------------
-; Closes down the virtual framebuffer services and restores the previous
-; page fault handler.
-;----------------------------------------------------------------------------
-cprocstart RemoveFaultHandler
-
- enter_c
-
-; Remove page fault handler from IDT
-
- sub esp,6 ; Allocate space on stack
-ifdef USE_NASM
- sidt [ss:esp] ; Store pointer to IDT
-else
- sidt [FWORD ss:esp] ; Store pointer to IDT
-endif
-
- pop ax ; add esp,2
- pop eax ; Absolute address of IDT
- add eax,14*8 ; Point to Int #14
- mov cx,[INT14Selector]
- mov [eax+2],cx ; Restore original CS
- mov edx,[INT14Offset]
- mov [eax],dx ; Install low word of offset
- shr edx,16
- mov [eax+6],dx ; Install high word of offset
-
- leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void InstallBankFunc(int codeLen,void *bankFunc)
-;----------------------------------------------------------------------------
-; Installs the bank switch function by relocating it into our data segment
-; and making it into a callable function. We do it this way to make the
-; code identical to the way that the VflatD devices work under Windows.
-;----------------------------------------------------------------------------
-cprocstart InstallBankFunc
-
- ARG codeLen:UINT, bankFunc:DPTR
-
- enter_c
-
- mov esi,[bankFunc] ; Copy the code into buffer
- mov edi,offset BankFuncBuf
- mov ecx,[codeLen]
- rep movsb
- mov [BYTE edi],0C3h ; Terminate the function with a near ret
-
- leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; int InitPaging(void)
-;----------------------------------------------------------------------------
-; Initializes paging system. If paging is not enabled, builds a page table
-; directory and page tables for physical memory
-;
-; Exit: 0 - Successful
-; -1 - Couldn't initialize paging mechanism
-;----------------------------------------------------------------------------
-cprocstart InitPaging
-
- push ebx
- push ecx
- push edx
- push esi
- push edi
-
-; Are we running under CauseWay?
-
- mov ax,0FFF9h
- int 31h
- jc @@NotCauseway
- cmp ecx,"CAUS"
- jnz @@NotCauseway
- cmp edx,"EWAY"
- jnz @@NotCauseway
-
- mov [BOOL VF_haveCauseWay],1
- mov [CauseWayDIRLinear],esi
- mov [CauseWay1stLinear],edi
-
-; Check for DPMI
-
- mov ax,0ff00h
- push es
- int 31h
- pop es
- shr edi,2
- and edi,3
- cmp edi,2
- jz @@ErrExit ; Not supported under DPMI
-
- mov eax,[CauseWayDIRLinear]
- jmp @@CopyCR3
-
-@@NotCauseway:
- mov ax,cs
- test ax,3 ; Which ring are we running
- jnz @@ErrExit ; Needs zero ring to access
- ; page tables (CR3)
- mov eax,cr0 ; Load CR0
- test eax,80000000h ; Is paging enabled?
- jz @@ErrExit ; No, we must have paging!
-
- mov eax,cr3 ; Load directory address
- and eax,0FFFFF000h
-
-@@CopyCR3:
- mov [PDBR],eax ; Save it
- mov esi,eax
- mov edi,offset pageDirectory
- mov ecx,1024
- cld
- rep movsd ; Copy the original page table directory
- cmp [DWORD accessPageAddr],0; Check if we have allocated page
- jne @@HaveRealMem ; table already (we cant free it)
-
- mov eax,0100h ; DPMI DOS allocate
- mov ebx,8192/16
- int 31h ; Allocate 8192 bytes
- and eax,0FFFFh
- shl eax,4 ; EAX points to newly allocated memory
- add eax,4095
- and eax,0FFFFF000h ; Page align
- mov [accessPageAddr],eax
-
-@@HaveRealMem:
- mov eax,[accessPageAddr] ; EAX -> page table in 1st Mb
- shr eax,12
- and eax,3FFh ; Page table offset
- shl eax,2
- cmp [BOOL VF_haveCauseWay],0
- jz @@NotCW0
- mov ebx,[CauseWay1stLinear]
- jmp @@Put1st
-
-@@NotCW0:
- mov ebx,[PDBR]
- mov ebx,[ebx]
- and ebx,0FFFFF000h ; Page table for 1st megabyte
-
-@@Put1st:
- add eax,ebx
- mov [accessPageTable],eax
- sub eax,eax ; No error
- jmp @@Exit
-
-@@ErrExit:
- mov eax,-1
-
-@@Exit: pop edi
- pop esi
- pop edx
- pop ecx
- pop ebx
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void ClosePaging(void)
-;----------------------------------------------------------------------------
-; Closes the paging system
-;----------------------------------------------------------------------------
-cprocstart ClosePaging
-
- push eax
- push ecx
- push edx
- push esi
- push edi
-
- mov eax,[accessPageAddr]
- call AccessPage ; Restore AccessPage mapping
- mov edi,[PDBR]
- mov esi,offset pageDirectory
- mov ecx,1024
- cld
- rep movsd ; Restore the original page table directory
-
-@@Exit: pop edi
- pop esi
- pop edx
- pop ecx
- pop eax
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; long AccessPage(long phys)
-;----------------------------------------------------------------------------
-; Maps a known page to given physical memory
-; Entry: EAX - Physical memory
-; Exit: EAX - Linear memory address of mapped phys mem
-;----------------------------------------------------------------------------
-cprocstatic AccessPage
-
- push edx
- mov edx,[accessPageTable]
- or eax,7
- mov [edx],eax
- mov eax,cr3
- mov cr3,eax ; Update page table cache
- mov eax,[accessPageAddr]
- pop edx
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; long GetPhysicalAddress(long linear)
-;----------------------------------------------------------------------------
-; Returns the physical address of linear address
-; Entry: EAX - Linear address to convert
-; Exit: EAX - Physical address
-;----------------------------------------------------------------------------
-cprocstatic GetPhysicalAddress
-
- push ebx
- push edx
- mov edx,eax
- shr edx,22 ; EDX is the directory offset
- mov ebx,[PDBR]
- mov edx,[edx*4+ebx] ; Load page table address
- push eax
- mov eax,edx
- call AccessPage ; Access the page table
- mov edx,eax
- pop eax
- shr eax,12
- and eax,03FFh ; EAX offset into page table
- mov eax,[edx+eax*4] ; Load physical address
- and eax,0FFFFF000h
- pop edx
- pop ebx
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void CreatePageTable(long pageDEntry)
-;----------------------------------------------------------------------------
-; Creates a page table for specific address (4MB)
-; Entry: EAX - Page directory entry (top 10-bits of address)
-;----------------------------------------------------------------------------
-cprocstatic CreatePageTable
-
- push ebx
- push ecx
- push edx
- push edi
- mov ebx,eax ; Save address
- mov eax,8192
- push eax
- call VF_malloc ; Allocate page table directory
- add esp,4
- add eax,0FFFh
- and eax,0FFFFF000h ; Page align (4KB)
- mov edi,eax ; Save page table linear address
- sub eax,eax ; Fill with zero
- mov ecx,1024
- cld
- rep stosd ; Clear page table
- sub edi,4096
- mov eax,edi
- call GetPhysicalAddress
- mov edx,[PDBR]
- or eax,7 ; Present/write/user bit
- mov [edx+ebx*4],eax ; Save physical address into page directory
- mov eax,cr3
- mov cr3,eax ; Update page table cache
- pop edi
- pop edx
- pop ecx
- pop ebx
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void MapPhysical2Linear(ulong pAddr, ulong lAddr, int pages, int flags);
-;----------------------------------------------------------------------------
-; Maps physical memory into linear memory
-; Entry: pAddr - Physical address
-; lAddr - Linear address
-; pages - Number of 4K pages to map
-; flags - Page flags
-; bit 0 = present
-; bit 1 = Read(0)/Write(1)
-;----------------------------------------------------------------------------
-cprocstart MapPhysical2Linear
-
- ARG pAddr:ULONG, lAddr:ULONG, pages:UINT, pflags:UINT
-
- enter_c
-
- and [ULONG pAddr],0FFFFF000h; Page boundary
- and [ULONG lAddr],0FFFFF000h; Page boundary
- mov ecx,[pflags]
- and ecx,11b ; Just two bits
- or ecx,100b ; Supervisor bit
- mov [pflags],ecx
-
- mov edx,[lAddr]
- shr edx,22 ; EDX = Directory
- mov esi,[PDBR]
- mov edi,[pages] ; EDI page count
- mov ebx,[lAddr]
-
-@@CreateLoop:
- mov ecx,[esi+edx*4] ; Load page table address
- test ecx,1 ; Is it present?
- jnz @@TableOK
- mov eax,edx
- call CreatePageTable ; Create a page table
-@@TableOK:
- mov eax,ebx
- shr eax,12
- and eax,3FFh
- sub eax,1024
- neg eax ; EAX = page count in this table
- inc edx ; Next table
- mov ebx,0 ; Next time we'll map 1K pages
- sub edi,eax ; Subtract mapped pages from page count
- jns @@CreateLoop ; Create more tables if necessary
-
- mov ecx,[pages] ; ECX = Page count
- mov esi,[lAddr]
- shr esi,12 ; Offset part isn't needed
- mov edi,[pAddr]
-@@MappingLoop:
- mov eax,esi
- shr eax,10 ; EAX = offset to page directory
- mov ebx,[PDBR]
- mov eax,[eax*4+ebx] ; EAX = page table address
- call AccessPage
- mov ebx,esi
- and ebx,3FFh ; EBX = offset to page table
- mov edx,edi
- add edi,4096 ; Next physical address
- inc esi ; Next linear page
- or edx,[pflags] ; Update flags...
- mov [eax+ebx*4],edx ; Store page table entry
- loop @@MappingLoop
- mov eax,cr3
- mov cr3,eax ; Update page table cache
-
- leave_c
- ret
-
-cprocend
-
-endcodeseg _vflat
-
-endif
-
- END ; End of module
diff --git a/board/MAI/bios_emulator/scitech/src/pm/smx/cpuinfo.c b/board/MAI/bios_emulator/scitech/src/pm/smx/cpuinfo.c
deleted file mode 100644
index 5447e574ec..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/smx/cpuinfo.c
+++ /dev/null
@@ -1,72 +0,0 @@
-/****************************************************************************
-*
-* Ultra Long Period Timer
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: 32-bit SMX embedded systems development.
-*
-* Description: SMX specific code for the CPU detection module.
-*
-****************************************************************************/
-
-/*----------------------------- Implementation ----------------------------*/
-
-/* External timing function */
-
-void __ZTimerInit(void);
-
-/****************************************************************************
-REMARKS:
-Do nothing for DOS because we don't have thread priorities.
-****************************************************************************/
-#define SetMaxThreadPriority() 0
-
-/****************************************************************************
-REMARKS:
-Do nothing for DOS because we don't have thread priorities.
-****************************************************************************/
-#define RestoreThreadPriority(i) (void)(i)
-
-/****************************************************************************
-REMARKS:
-Initialise the counter and return the frequency of the counter.
-****************************************************************************/
-static void GetCounterFrequency(
- CPU_largeInteger *freq)
-{
- ulong resolution;
-
- __ZTimerInit();
- ULZTimerResolution(&resolution);
- freq->low = (ulong)(10000000000.0 / resolution);
- freq->high = 0;
-}
-
-/****************************************************************************
-REMARKS:
-Read the counter and return the counter value.
-****************************************************************************/
-#define GetCounter(t) \
-{ \
- (t)->low = ULZReadTime() * 10000L; \
- (t)->high = 0; \
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/smx/event.c b/board/MAI/bios_emulator/scitech/src/pm/smx/event.c
deleted file mode 100644
index 533c2615b1..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/smx/event.c
+++ /dev/null
@@ -1,368 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: 32-bit SMX embedded systems development
-*
-* Description: 32-bit SMX implementation for the SciTech cross platform
-* event library.
-*
-****************************************************************************/
-
-#include "smx/ps2mouse.h"
-
-/*--------------------------- Global variables ----------------------------*/
-
-ibool _VARAPI _EVT_useEvents = true; /* True to use event handling */
-ibool _VARAPI _EVT_installed = 0; /* Event handers installed? */
-uchar _VARAPI *_EVT_biosPtr = NULL; /* Pointer to the BIOS data area */
-static ibool haveMouse = false; /* True if we have a mouse */
-
-/*---------------------------- Implementation -----------------------------*/
-
-/* External assembler functions */
-
-void EVTAPI _EVT_pollJoystick(void);
-uint EVTAPI _EVT_disableInt(void);
-uint EVTAPI _EVT_restoreInt(uint flags);
-void EVTAPI _EVT_codeStart(void);
-void EVTAPI _EVT_codeEnd(void);
-void EVTAPI _EVT_cCodeStart(void);
-void EVTAPI _EVT_cCodeEnd(void);
-int EVTAPI _EVT_getKeyCode(void);
-int EVTAPI EVT_rdinx(int port,int index);
-void EVTAPI EVT_wrinx(int port,int index,int value);
-
-/****************************************************************************
-REMARKS:
-Do nothing for DOS, because we are fully interrupt driven.
-****************************************************************************/
-#define _EVT_pumpMessages()
-
-/****************************************************************************
-REMARKS:
-This function is used to return the number of ticks since system
-startup in milliseconds. This should be the same value that is placed into
-the time stamp fields of events, and is used to implement auto mouse down
-events.
-****************************************************************************/
-ulong _EVT_getTicks(void)
-{
- return (ulong)PM_getLong(_EVT_biosPtr+0x6C) * 55UL;
-}
-
-/****************************************************************************
-REMARKS:
-Include generic raw scancode keyboard module.
-****************************************************************************/
-#include "common/keyboard.c"
-
-/****************************************************************************
-REMARKS:
-Determines if we have a mouse attached and functioning.
-****************************************************************************/
-static ibool detectMouse(void)
-{
- return(ps2Query());
-}
-
-/****************************************************************************
-PARAMETERS:
-what - Event code
-message - Event message
-x,y - Mouse position at time of event
-but_stat - Mouse button status at time of event
-
-REMARKS:
-Adds a new mouse event to the event queue. This routine is called from within
-the mouse interrupt subroutine, so it must be efficient.
-
-NOTE: Interrupts MUST be OFF while this routine is called to ensure we have
- mutually exclusive access to our internal data structures for
- interrupt driven systems (like under DOS).
-****************************************************************************/
-static void addMouseEvent(
- uint what,
- uint message,
- int x,
- int y,
- int mickeyX,
- int mickeyY,
- uint but_stat)
-{
- event_t evt;
-
- if (EVT.count < EVENTQSIZE) {
- /* Save information in event record. */
- evt.when = _EVT_getTicks();
- evt.what = what;
- evt.message = message;
- evt.modifiers = but_stat;
- evt.where_x = x; /* Save mouse event position */
- evt.where_y = y;
- evt.relative_x = mickeyX;
- evt.relative_y = mickeyY;
- evt.modifiers |= EVT.keyModifiers;
- addEvent(&evt); /* Add to tail of event queue */
- }
-}
-
-/****************************************************************************
-PARAMETERS:
-mask - Event mask
-butstate - Button state
-x - Mouse x coordinate
-y - Mouse y coordinate
-
-REMARKS:
-Mouse event handling routine. This gets called when a mouse event occurs,
-and we call the addMouseEvent() routine to add the appropriate mouse event
-to the event queue.
-
-Note: Interrupts are ON when this routine is called by the mouse driver code.
-/*AM: NOTE: This function has not actually been ported from DOS yet and should not */
-/*AM: be installed until it is. */
-****************************************************************************/
-static void EVTAPI mouseISR(
- uint mask,
- uint butstate,
- int x,
- int y,
- int mickeyX,
- int mickeyY)
-{
- RMREGS regs;
- uint ps;
-
- if (mask & 1) {
- /* Save the current mouse coordinates */
- EVT.mx = x; EVT.my = y;
-
- /* If the last event was a movement event, then modify the last
- * event rather than post a new one, so that the queue will not
- * become saturated. Before we modify the data structures, we
- * MUST ensure that interrupts are off.
- */
- ps = _EVT_disableInt();
- if (EVT.oldMove != -1) {
- EVT.evtq[EVT.oldMove].where_x = x; /* Modify existing one */
- EVT.evtq[EVT.oldMove].where_y = y;
- EVT.evtq[EVT.oldMove].relative_x += mickeyX;
- EVT.evtq[EVT.oldMove].relative_y += mickeyY;
- }
- else {
- EVT.oldMove = EVT.freeHead; /* Save id of this move event */
- addMouseEvent(EVT_MOUSEMOVE,0,x,y,mickeyX,mickeyY,butstate);
- }
- _EVT_restoreInt(ps);
- }
- if (mask & 0x2A) {
- ps = _EVT_disableInt();
- addMouseEvent(EVT_MOUSEDOWN,mask >> 1,x,y,0,0,butstate);
- EVT.oldMove = -1;
- _EVT_restoreInt(ps);
- }
- if (mask & 0x54) {
- ps = _EVT_disableInt();
- addMouseEvent(EVT_MOUSEUP,mask >> 2,x,y,0,0,butstate);
- EVT.oldMove = -1;
- _EVT_restoreInt(ps);
- }
- EVT.oldKey = -1;
-}
-
-/****************************************************************************
-REMARKS:
-Keyboard interrupt handler function.
-
-NOTE: Interrupts are OFF when this routine is called by the keyboard ISR,
- and we leave them OFF the entire time. This has been modified to work
- in conjunction with smx keyboard handler.
-****************************************************************************/
-static void EVTAPI keyboardISR(void)
-{
- PM_chainPrevKey();
- processRawScanCode(PM_inpb(0x60));
- PM_outpb(0x20,0x20);
-}
-
-/****************************************************************************
-REMARKS:
-Safely abort the event module upon catching a fatal error.
-****************************************************************************/
-void _EVT_abort()
-{
- EVT_exit();
- PM_fatalError("Unhandled exception!");
-}
-
-/****************************************************************************
-PARAMETERS:
-mouseMove - Callback function to call wheneve the mouse needs to be moved
-
-REMARKS:
-Initiliase the event handling module. Here we install our mouse handling ISR
-to be called whenever any button's are pressed or released. We also build
-the free list of events in the event queue.
-
-We use handler number 2 of the mouse libraries interrupt handlers for our
-event handling routines.
-****************************************************************************/
-void EVTAPI EVT_init(
- _EVT_mouseMoveHandler mouseMove)
-{
- int i;
-
- EVT.mouseMove = mouseMove;
- _EVT_biosPtr = PM_getBIOSPointer();
- EVT_resume();
-}
-
-/****************************************************************************
-REMARKS:
-Initiailises the internal event handling modules. The EVT_suspend function
-can be called to suspend event handling (such as when shelling out to DOS),
-and this function can be used to resume it again later.
-****************************************************************************/
-void EVTAPI EVT_resume(void)
-{
- static int locked = 0;
- int stat;
- uchar mods;
- PM_lockHandle lh;
-
- if (_EVT_useEvents) {
- /* Initialise the event queue and enable our interrupt handlers */
- initEventQueue();
- PM_setKeyHandler(keyboardISR);
- if ((haveMouse = detectMouse()) != 0)
- PM_setMouseHandler(0xFFFF,mouseISR);
-
- /* Read the keyboard modifier flags from the BIOS to get the
- * correct initialisation state. The only state we care about is
- * the correct toggle state flags such as SCROLLLOCK, NUMLOCK and
- * CAPSLOCK.
- */
- EVT.keyModifiers = 0;
- mods = PM_getByte(_EVT_biosPtr+0x17);
- if (mods & 0x10)
- EVT.keyModifiers |= EVT_SCROLLLOCK;
- if (mods & 0x20)
- EVT.keyModifiers |= EVT_NUMLOCK;
- if (mods & 0x40)
- EVT.keyModifiers |= EVT_CAPSLOCK;
-
- /* Lock all of the code and data used by our protected mode interrupt
- * handling routines, so that it will continue to work correctly
- * under real mode.
- */
- if (!locked) {
- /* It is difficult to ensure that we lock our global data, so we
- * do this by taking the address of a variable locking all data
- * 2Kb on either side. This should properly cover the global data
- * used by the module (the other alternative is to declare the
- * variables in assembler, in which case we know it will be
- * correct).
- */
- stat = !PM_lockDataPages(&EVT,sizeof(EVT),&lh);
- stat |= !PM_lockDataPages(&_EVT_biosPtr,sizeof(_EVT_biosPtr),&lh);
- stat |= !PM_lockCodePages((__codePtr)_EVT_cCodeStart,(int)_EVT_cCodeEnd-(int)_EVT_cCodeStart,&lh);
- stat |= !PM_lockCodePages((__codePtr)_EVT_codeStart,(int)_EVT_codeEnd-(int)_EVT_codeStart,&lh);
- if (stat) {
- PM_fatalError("Page locking services failed - interrupt handling not safe!");
- exit(1);
- }
- locked = 1;
- }
-
- _EVT_installed = true;
- }
-}
-
-/****************************************************************************
-REMARKS
-Changes the range of coordinates returned by the mouse functions to the
-specified range of values. This is used when changing between graphics
-modes set the range of mouse coordinates for the new display mode.
-****************************************************************************/
-void EVTAPI EVT_setMouseRange(
- int xRes,
- int yRes)
-{
- if (haveMouse) {
- ps2MouseStop();
- ps2MouseStart( 0, xRes, 0, yRes, -1, -1, -1);
- }
-}
-
-/****************************************************************************
-REMARKS
-Modifes the mouse coordinates as necessary if scaling to OS coordinates,
-and sets the OS mouse cursor position.
-****************************************************************************/
-void _EVT_setMousePos(
- int *x,
- int *y)
-{
- if (haveMouse)
- ps2MouseMove(*x, *y);
-}
-
-/****************************************************************************
-REMARKS
-Suspends all of our event handling operations. This is also used to
-de-install the event handling code.
-****************************************************************************/
-void EVTAPI EVT_suspend(void)
-{
- uchar mods;
-
- if (_EVT_installed) {
- PM_restoreKeyHandler();
- if (haveMouse)
- PM_restoreMouseHandler();
-
- /* Set the keyboard modifier flags in the BIOS to our values */
- EVT_allowLEDS(true);
- mods = PM_getByte(_EVT_biosPtr+0x17) & ~0x70;
- if (EVT.keyModifiers & EVT_SCROLLLOCK)
- mods |= 0x10;
- if (EVT.keyModifiers & EVT_NUMLOCK)
- mods |= 0x20;
- if (EVT.keyModifiers & EVT_CAPSLOCK)
- mods |= 0x40;
- PM_setByte(_EVT_biosPtr+0x17,mods);
-
- /* Flag that we are no longer installed */
- _EVT_installed = false;
- }
-}
-
-/****************************************************************************
-REMARKS
-Exits the event module for program terminatation.
-****************************************************************************/
-void EVTAPI EVT_exit(void)
-{
- EVT_suspend();
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/smx/oshdr.h b/board/MAI/bios_emulator/scitech/src/pm/smx/oshdr.h
deleted file mode 100644
index 3ff8daa2a9..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/smx/oshdr.h
+++ /dev/null
@@ -1,29 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: 32-bit SMX embedded systems development.
-*
-* Description: Include file to include all OS specific header files.
-*
-****************************************************************************/
diff --git a/board/MAI/bios_emulator/scitech/src/pm/smx/pm.c b/board/MAI/bios_emulator/scitech/src/pm/smx/pm.c
deleted file mode 100644
index 99ee3d4be4..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/smx/pm.c
+++ /dev/null
@@ -1,1187 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: 32 bit SMX embedded systems development.
-*
-* Description: Implementation for the OS Portability Manager Library, which
-* contains functions to implement OS specific services in a
-* generic, cross platform API. Porting the OS Portability
-* Manager library is the first step to porting any SciTech
-* products to a new platform.
-*
-****************************************************************************/
-
-#include "pmapi.h"
-#include "drvlib/os/os.h"
-#include "ztimerc.h"
-#include "event.h"
-#include "mtrr.h"
-#include "pm_help.h"
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <dos.h>
-#include <conio.h>
-#ifdef __GNUC__
-#include <unistd.h>
-#include <sys/nearptr.h>
-#include <sys/stat.h>
-#else
-#include <direct.h>
-#endif
-#ifdef __BORLANDC__
-#pragma warn -par
-#endif
-
-/*--------------------------- Global variables ----------------------------*/
-
-typedef struct {
- int oldMode;
- int old50Lines;
- } DOS_stateBuf;
-
-#define MAX_RM_BLOCKS 10
-
-static struct {
- void *p;
- uint tag;
- } rmBlocks[MAX_RM_BLOCKS];
-
-static uint VESABuf_len = 1024; /* Length of the VESABuf buffer */
-static void *VESABuf_ptr = NULL; /* Near pointer to VESABuf */
-static uint VESABuf_rseg; /* Real mode segment of VESABuf */
-static uint VESABuf_roff; /* Real mode offset of VESABuf */
-static void (PMAPIP fatalErrorCleanup)(void) = NULL;
-ushort _VARAPI _PM_savedDS = 0;
-static ulong PDB = 0,*pPDB = NULL;
-static uint VXD_version = -1;
-
-/*----------------------------- Implementation ----------------------------*/
-
-ulong _ASMAPI _PM_getPDB(void);
-void _ASMAPI _PM_VxDCall(VXD_regs *regs,uint off,uint sel);
-
-/****************************************************************************
-REMARKS:
-External function to call the PMHELP helper VxD.
-****************************************************************************/
-void PMAPI PM_VxDCall(
- VXD_regs *regs)
-{
-}
-
-/****************************************************************************
-RETURNS:
-BCD coded version number of the VxD, or 0 if not loaded (ie: 0x202 - 2.2)
-
-REMARKS:
-This function gets the version number for the VxD that we have connected to.
-****************************************************************************/
-uint PMAPI PMHELP_getVersion(void)
-{
- return VXD_version = 0;
-}
-
-void PMAPI PM_init(void)
-{
-#ifndef REALMODE
- MTRR_init();
-#endif
-}
-
-/****************************************************************************
-PARAMETERS:
-base - The starting physical base address of the region
-size - The size in bytes of the region
-type - Type to place into the MTRR register
-
-RETURNS:
-Error code describing the result.
-
-REMARKS:
-Function to enable write combining for the specified region of memory.
-****************************************************************************/
-int PMAPI PM_enableWriteCombine(
- ulong base,
- ulong size,
- uint type)
-{
-#ifndef REALMODE
- return MTRR_enableWriteCombine(base,size,type);
-#else
- return PM_MTRR_NOT_SUPPORTED;
-#endif
-}
-
-ibool PMAPI PM_haveBIOSAccess(void)
-{ return false; }
-
-long PMAPI PM_getOSType(void)
-{ return _OS_SMX; }
-
-int PMAPI PM_getModeType(void)
-{ return PM_386; }
-
-void PMAPI PM_backslash(char *s)
-{
- uint pos = strlen(s);
- if (s[pos-1] != '\\') {
- s[pos] = '\\';
- s[pos+1] = '\0';
- }
-}
-
-void PMAPI PM_setFatalErrorCleanup(
- void (PMAPIP cleanup)(void))
-{
- fatalErrorCleanup = cleanup;
-}
-
-void MGLOutput(char *);
-
-void PMAPI PM_fatalError(const char *msg)
-{
- if (fatalErrorCleanup)
- fatalErrorCleanup();
- MGLOutput(msg);
-/* No support for fprintf() under smx currently! */
-/* fprintf(stderr,"%s\n", msg); */
- exit(1);
-}
-
-static void ExitVBEBuf(void)
-{
- if (VESABuf_ptr)
- PM_freeRealSeg(VESABuf_ptr);
- VESABuf_ptr = 0;
-}
-
-void * PMAPI PM_getVESABuf(uint *len,uint *rseg,uint *roff)
-{
- if (!VESABuf_ptr) {
- /* Allocate a global buffer for communicating with the VESA VBE */
- if ((VESABuf_ptr = PM_allocRealSeg(VESABuf_len, &VESABuf_rseg, &VESABuf_roff)) == NULL)
- return NULL;
- atexit(ExitVBEBuf);
- }
- *len = VESABuf_len;
- *rseg = VESABuf_rseg;
- *roff = VESABuf_roff;
- return VESABuf_ptr;
-}
-
-int PMAPI PM_int386(int intno, PMREGS *in, PMREGS *out)
-{
- PMSREGS sregs;
- PM_segread(&sregs);
- return PM_int386x(intno,in,out,&sregs);
-}
-
-/* Routines to set and get the real mode interrupt vectors, by making
- * direct real mode calls to DOS and bypassing the DOS extenders API.
- * This is the safest way to handle this, as some servers try to be
- * smart about changing real mode vectors.
- */
-
-void PMAPI _PM_getRMvect(int intno, long *realisr)
-{
- RMREGS regs;
- RMSREGS sregs;
-
- PM_saveDS();
- regs.h.ah = 0x35;
- regs.h.al = intno;
- PM_int86x(0x21, &regs, &regs, &sregs);
- *realisr = ((long)sregs.es << 16) | regs.x.bx;
-}
-
-void PMAPI _PM_setRMvect(int intno, long realisr)
-{
- RMREGS regs;
- RMSREGS sregs;
-
- PM_saveDS();
- regs.h.ah = 0x25;
- regs.h.al = intno;
- sregs.ds = (int)(realisr >> 16);
- regs.x.dx = (int)(realisr & 0xFFFF);
- PM_int86x(0x21, &regs, &regs, &sregs);
-}
-
-void PMAPI _PM_addRealModeBlock(void *mem,uint tag)
-{
- int i;
-
- for (i = 0; i < MAX_RM_BLOCKS; i++) {
- if (rmBlocks[i].p == NULL) {
- rmBlocks[i].p = mem;
- rmBlocks[i].tag = tag;
- return;
- }
- }
- PM_fatalError("To many real mode memory block allocations!");
-}
-
-uint PMAPI _PM_findRealModeBlock(void *mem)
-{
- int i;
-
- for (i = 0; i < MAX_RM_BLOCKS; i++) {
- if (rmBlocks[i].p == mem)
- return rmBlocks[i].tag;
- }
- PM_fatalError("Could not find prior real mode memory block allocation!");
- return 0;
-}
-
-char * PMAPI PM_getCurrentPath(
- char *path,
- int maxLen)
-{
- return getcwd(path,maxLen);
-}
-
-char PMAPI PM_getBootDrive(void)
-{ return 'C'; }
-
-const char * PMAPI PM_getVBEAFPath(void)
-{ return "c:\\"; }
-
-const char * PMAPI PM_getNucleusPath(void)
-{
- static char path[256];
- char *env;
-
- if ((env = getenv("NUCLEUS_PATH")) != NULL)
- return env;
- return "c:\\nucleus";
-}
-
-const char * PMAPI PM_getNucleusConfigPath(void)
-{
- static char path[256];
- strcpy(path,PM_getNucleusPath());
- PM_backslash(path);
- strcat(path,"config");
- return path;
-}
-
-const char * PMAPI PM_getUniqueID(void)
-{ return "SMX"; }
-
-const char * PMAPI PM_getMachineName(void)
-{ return "SMX"; }
-
-int PMAPI PM_kbhit(void)
-{
- int hit;
- event_t evt;
-
- hit = EVT_peekNext(&evt,EVT_KEYDOWN | EVT_KEYREPEAT);
- EVT_flush(~(EVT_KEYDOWN | EVT_KEYREPEAT));
- return hit;
-}
-
-int PMAPI PM_getch(void)
-{
- event_t evt;
-
- EVT_halt(&evt,EVT_KEYDOWN);
- return EVT_asciiCode(evt.message);
-}
-
-PM_HWND PMAPI PM_openConsole(PM_HWND hwndUser,int device,int xRes,int yRes,int bpp,ibool fullScreen)
-{
- /* Not used for SMX */
- (void)hwndUser;
- (void)device;
- (void)xRes;
- (void)yRes;
- (void)bpp;
- (void)fullScreen;
- return 0;
-}
-
-int PMAPI PM_getConsoleStateSize(void)
-{
- return sizeof(DOS_stateBuf);
-}
-
-void PMAPI PM_saveConsoleState(void *stateBuf,PM_HWND hwndConsole)
-{
- RMREGS regs;
- DOS_stateBuf *sb = stateBuf;
-
- /* Save the old video mode state */
- regs.h.ah = 0x0F;
- PM_int86(0x10,&regs,&regs);
- sb->oldMode = regs.h.al & 0x7F;
- sb->old50Lines = false;
- if (sb->oldMode == 0x3) {
- regs.x.ax = 0x1130;
- regs.x.bx = 0;
- regs.x.dx = 0;
- PM_int86(0x10,&regs,&regs);
- sb->old50Lines = (regs.h.dl == 42 || regs.h.dl == 49);
- }
- (void)hwndConsole;
-}
-
-void PMAPI PM_setSuspendAppCallback(int (_ASMAPIP saveState)(int flags))
-{
- /* Not used for SMX */
- (void)saveState;
-}
-
-void PMAPI PM_restoreConsoleState(const void *stateBuf,PM_HWND hwndConsole)
-{
- RMREGS regs;
- const DOS_stateBuf *sb = stateBuf;
-
- /* Retore 50 line mode if set */
- if (sb->old50Lines) {
- regs.x.ax = 0x1112;
- regs.x.bx = 0;
- PM_int86(0x10,&regs,&regs);
- }
- (void)hwndConsole;
-}
-
-void PMAPI PM_closeConsole(PM_HWND hwndConsole)
-{
- /* Not used for SMX */
- (void)hwndConsole;
-}
-
-void PMAPI PM_setOSCursorLocation(int x,int y)
-{
- uchar *_biosPtr = PM_getBIOSPointer();
- PM_setByte(_biosPtr+0x50,x);
- PM_setByte(_biosPtr+0x51,y);
-}
-
-void PMAPI PM_setOSScreenWidth(int width,int height)
-{
- uchar *_biosPtr = PM_getBIOSPointer();
- PM_setWord(_biosPtr+0x4A,width);
- PM_setWord(_biosPtr+0x4C,width*2);
- PM_setByte(_biosPtr+0x84,height-1);
- if (height > 25) {
- PM_setWord(_biosPtr+0x60,0x0607);
- PM_setByte(_biosPtr+0x85,0x08);
- }
- else {
- PM_setWord(_biosPtr+0x60,0x0D0E);
- PM_setByte(_biosPtr+0x85,0x016);
- }
-}
-
-void * PMAPI PM_mallocShared(long size)
-{
- return PM_malloc(size);
-}
-
-void PMAPI PM_freeShared(void *ptr)
-{
- PM_free(ptr);
-}
-
-#define GetRMVect(intno,isr) *(isr) = ((ulong*)rmZeroPtr)[intno]
-#define SetRMVect(intno,isr) ((ulong*)rmZeroPtr)[intno] = (isr)
-
-ibool PMAPI PM_doBIOSPOST(
- ushort axVal,
- ulong BIOSPhysAddr,
- void *mappedBIOS,
- ulong BIOSLen)
-{
- static int firstTime = true;
- static uchar *rmZeroPtr;
- long Current10,Current6D,Current42;
- RMREGS regs;
- RMSREGS sregs;
-
- /* Create a zero memory mapping for us to use */
- if (firstTime) {
- rmZeroPtr = PM_mapPhysicalAddr(0,0x7FFF,true);
- firstTime = false;
- }
-
- /* Remap the secondary BIOS to 0xC0000 physical */
- if (BIOSPhysAddr != 0xC0000L || BIOSLen > 32768) {
- /* SMX cannot virtually remap the BIOS, so we can only work if all
- * the secondary controllers are identical, and we then use the
- * BIOS on the first controller for all the remaining controllers.
- *
- * For OS'es that do virtual memory, and remapping of 0xC0000
- * physical (perhaps a copy on write mapping) should be all that
- * is needed.
- */
- return false;
- }
-
- /* Save current handlers of int 10h and 6Dh */
- GetRMVect(0x10,&Current10);
- GetRMVect(0x6D,&Current6D);
-
- /* POST the secondary BIOS */
- GetRMVect(0x42,&Current42);
- SetRMVect(0x10,Current42); /* Restore int 10h to STD-BIOS */
- regs.x.ax = axVal;
- PM_callRealMode(0xC000,0x0003,&regs,&sregs);
-
- /* Restore current handlers */
- SetRMVect(0x10,Current10);
- SetRMVect(0x6D,Current6D);
-
- /* Second the primary BIOS mappin 1:1 for 0xC0000 physical */
- if (BIOSPhysAddr != 0xC0000L) {
- /* SMX does not support this */
- (void)mappedBIOS;
- }
- return true;
-}
-
-void PMAPI PM_sleep(ulong milliseconds)
-{
- ulong microseconds = milliseconds * 1000L;
- LZTimerObject tm;
-
- LZTimerOnExt(&tm);
- while (LZTimerLapExt(&tm) < microseconds)
- ;
- LZTimerOffExt(&tm);
-}
-
-int PMAPI PM_getCOMPort(int port)
-{
- switch (port) {
- case 0: return 0x3F8;
- case 1: return 0x2F8;
- }
- return 0;
-}
-
-int PMAPI PM_getLPTPort(int port)
-{
- switch (port) {
- case 0: return 0x3BC;
- case 1: return 0x378;
- case 2: return 0x278;
- }
- return 0;
-}
-
-PM_MODULE PMAPI PM_loadLibrary(
- const char *szDLLName)
-{
- (void)szDLLName;
- return NULL;
-}
-
-void * PMAPI PM_getProcAddress(
- PM_MODULE hModule,
- const char *szProcName)
-{
- (void)hModule;
- (void)szProcName;
- return NULL;
-}
-
-void PMAPI PM_freeLibrary(
- PM_MODULE hModule)
-{
- (void)hModule;
-}
-
-int PMAPI PM_setIOPL(
- int level)
-{
- return level;
-}
-
-/****************************************************************************
-REMARKS:
-Internal function to convert the find data to the generic interface.
-****************************************************************************/
-static void convertFindData(
- PM_findData *findData,
- struct find_t *blk)
-{
- ulong dwSize = findData->dwSize;
-
- memset(findData,0,findData->dwSize);
- findData->dwSize = dwSize;
- if (blk->attrib & _A_RDONLY)
- findData->attrib |= PM_FILE_READONLY;
- if (blk->attrib & _A_SUBDIR)
- findData->attrib |= PM_FILE_DIRECTORY;
- if (blk->attrib & _A_ARCH)
- findData->attrib |= PM_FILE_ARCHIVE;
- if (blk->attrib & _A_HIDDEN)
- findData->attrib |= PM_FILE_HIDDEN;
- if (blk->attrib & _A_SYSTEM)
- findData->attrib |= PM_FILE_SYSTEM;
- findData->sizeLo = blk->size;
- strncpy(findData->name,blk->name,PM_MAX_PATH);
- findData->name[PM_MAX_PATH-1] = 0;
-}
-
-#define FIND_MASK (_A_RDONLY | _A_ARCH | _A_SUBDIR | _A_HIDDEN | _A_SYSTEM)
-
-/****************************************************************************
-REMARKS:
-Function to find the first file matching a search criteria in a directory.
-****************************************************************************/
-void * PMAPI PM_findFirstFile(
- const char *filename,
- PM_findData *findData)
-{
- struct find_t *blk;
-
- if ((blk = PM_malloc(sizeof(*blk))) == NULL)
- return PM_FILE_INVALID;
- if (_dos_findfirst((char*)filename,FIND_MASK,blk) == 0) {
- convertFindData(findData,blk);
- return blk;
- }
- return PM_FILE_INVALID;
-}
-
-/****************************************************************************
-REMARKS:
-Function to find the next file matching a search criteria in a directory.
-****************************************************************************/
-ibool PMAPI PM_findNextFile(
- void *handle,
- PM_findData *findData)
-{
- struct find_t *blk = handle;
-
- if (_dos_findnext(blk) == 0) {
- convertFindData(findData,blk);
- return true;
- }
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Function to close the find process
-****************************************************************************/
-void PMAPI PM_findClose(
- void *handle)
-{
- PM_free(handle);
-}
-
-/****************************************************************************
-REMARKS:
-Function to determine if a drive is a valid drive or not. Under Unix this
-function will return false for anything except a value of 3 (considered
-the root drive, and equivalent to C: for non-Unix systems). The drive
-numbering is:
-
- 1 - Drive A:
- 2 - Drive B:
- 3 - Drive C:
- etc
-
-****************************************************************************/
-ibool PMAPI PM_driveValid(
- char drive)
-{
- RMREGS regs;
- regs.h.dl = (uchar)(drive - 'A' + 1);
- regs.h.ah = 0x36; /* Get disk information service */
- PM_int86(0x21,&regs,&regs);
- return regs.x.ax != 0xFFFF; /* AX = 0xFFFF if disk is invalid */
-}
-
-/****************************************************************************
-REMARKS:
-Function to get the current working directory for the specififed drive.
-Under Unix this will always return the current working directory regardless
-of what the value of 'drive' is.
-****************************************************************************/
-void PMAPI PM_getdcwd(
- int drive,
- char *dir,
- int len)
-{
- uint oldDrive,maxDrives;
- _dos_getdrive(&oldDrive);
- _dos_setdrive(drive,&maxDrives);
- getcwd(dir,len);
- _dos_setdrive(oldDrive,&maxDrives);
-}
-
-/****************************************************************************
-REMARKS:
-Function to change the file attributes for a specific file.
-****************************************************************************/
-void PMAPI PM_setFileAttr(
- const char *filename,
- uint attrib)
-{
-#if defined(TNT) && defined(_MSC_VER)
- DWORD attr = 0;
-
- if (attrib & PM_FILE_READONLY)
- attr |= FILE_ATTRIBUTE_READONLY;
- if (attrib & PM_FILE_ARCHIVE)
- attr |= FILE_ATTRIBUTE_ARCHIVE;
- if (attrib & PM_FILE_HIDDEN)
- attr |= FILE_ATTRIBUTE_HIDDEN;
- if (attrib & PM_FILE_SYSTEM)
- attr |= FILE_ATTRIBUTE_SYSTEM;
- SetFileAttributes((LPSTR)filename, attr);
-#else
- uint attr = 0;
-
- if (attrib & PM_FILE_READONLY)
- attr |= _A_RDONLY;
- if (attrib & PM_FILE_ARCHIVE)
- attr |= _A_ARCH;
- if (attrib & PM_FILE_HIDDEN)
- attr |= _A_HIDDEN;
- if (attrib & PM_FILE_SYSTEM)
- attr |= _A_SYSTEM;
- _dos_setfileattr(filename,attr);
-#endif
-}
-
-/****************************************************************************
-REMARKS:
-Function to create a directory.
-****************************************************************************/
-ibool PMAPI PM_mkdir(
- const char *filename)
-{
-#ifdef __GNUC__
- return mkdir(filename,S_IRUSR) == 0;
-#else
-/*AM: return mkdir(filename) == 0; */
- return(false);
-#endif
-}
-
-/****************************************************************************
-REMARKS:
-Function to remove a directory.
-****************************************************************************/
-ibool PMAPI PM_rmdir(
- const char *filename)
-{
-/*AM: return rmdir(filename) == 0; */
- return(false);
-}
-
-/****************************************************************************
-REMARKS:
-Allocates a block of locked, physically contiguous memory. The memory
-may be required to be below the 16Meg boundary.
-****************************************************************************/
-void * PMAPI PM_allocLockedMem(
- uint size,
- ulong *physAddr,
- ibool contiguous,
- ibool below16M)
-{
- void *p;
- uint r_seg,r_off;
- PM_lockHandle lh;
-
- /* Under DOS the only way to know the physical memory address is to
- * allocate the memory below the 1Meg boundary as real mode memory.
- * We also allocate 4095 bytes more memory than we need, so we can
- * properly page align the start of the memory block for DMA operations.
- */
- if (size > 4096)
- return NULL;
- if ((p = PM_allocRealSeg((size + 0xFFF) & ~0xFFF,&r_seg,&r_off)) == NULL)
- return NULL;
- *physAddr = ((r_seg << 4) + r_off + 0xFFF) & ~0xFFF;
- PM_lockDataPages(p,size*2,&lh);
- return p;
-}
-
-void PMAPI PM_freeLockedMem(void *p,uint size,ibool contiguous)
-{
- (void)size;
- PM_freeRealSeg(p);
-}
-
-/*-------------------------------------------------------------------------*/
-/* Generic DPMI routines common to 16/32 bit code */
-/*-------------------------------------------------------------------------*/
-
-ulong PMAPI DPMI_mapPhysicalToLinear(ulong physAddr,ulong limit)
-{
- PMREGS r;
- ulong physOfs;
-
- if (physAddr < 0x100000L) {
- /* We can't map memory below 1Mb, but the linear address are already
- * mapped 1:1 for this memory anyway so we just return the base address.
- */
- return physAddr;
- }
-
- /* Round the physical address to a 4Kb boundary and the limit to a
- * 4Kb-1 boundary before passing the values to DPMI as some extenders
- * will fail the calls unless this is the case. If we round the
- * physical address, then we also add an extra offset into the address
- * that we return.
- */
- physOfs = physAddr & 4095;
- physAddr = physAddr & ~4095;
- limit = ((limit+physOfs+1+4095) & ~4095)-1;
-
- r.x.ax = 0x800; /* DPMI map physical to linear */
- r.x.bx = physAddr >> 16;
- r.x.cx = physAddr & 0xFFFF;
- r.x.si = limit >> 16;
- r.x.di = limit & 0xFFFF;
- PM_int386(0x31, &r, &r);
- if (r.x.cflag)
- return 0xFFFFFFFFUL;
- return ((ulong)r.x.bx << 16) + r.x.cx + physOfs;
-}
-
-int PMAPI DPMI_setSelectorBase(ushort sel,ulong linAddr)
-{
- PMREGS r;
-
- r.x.ax = 7; /* DPMI set selector base address */
- r.x.bx = sel;
- r.x.cx = linAddr >> 16;
- r.x.dx = linAddr & 0xFFFF;
- PM_int386(0x31, &r, &r);
- if (r.x.cflag)
- return 0;
- return 1;
-}
-
-ulong PMAPI DPMI_getSelectorBase(ushort sel)
-{
- PMREGS r;
-
- r.x.ax = 6; /* DPMI get selector base address */
- r.x.bx = sel;
- PM_int386(0x31, &r, &r);
- return ((ulong)r.x.cx << 16) + r.x.dx;
-}
-
-int PMAPI DPMI_setSelectorLimit(ushort sel,ulong limit)
-{
- PMREGS r;
-
- r.x.ax = 8; /* DPMI set selector limit */
- r.x.bx = sel;
- r.x.cx = limit >> 16;
- r.x.dx = limit & 0xFFFF;
- PM_int386(0x31, &r, &r);
- if (r.x.cflag)
- return 0;
- return 1;
-}
-
-uint PMAPI DPMI_createSelector(ulong base,ulong limit)
-{
- uint sel;
- PMREGS r;
-
- /* Allocate 1 descriptor */
- r.x.ax = 0;
- r.x.cx = 1;
- PM_int386(0x31, &r, &r);
- if (r.x.cflag) return 0;
- sel = r.x.ax;
-
- /* Set the descriptor access rights (for a 32 bit page granular
- * segment, ring 0).
- */
- r.x.ax = 9;
- r.x.bx = sel;
- r.x.cx = 0x4093;
- PM_int386(0x31, &r, &r);
-
- /* Map physical memory and create selector */
- if ((base = DPMI_mapPhysicalToLinear(base,limit)) == 0xFFFFFFFFUL)
- return 0;
- if (!DPMI_setSelectorBase(sel,base))
- return 0;
- if (!DPMI_setSelectorLimit(sel,limit))
- return 0;
- return sel;
-}
-
-void PMAPI DPMI_freeSelector(uint sel)
-{
- PMREGS r;
-
- r.x.ax = 1;
- r.x.bx = sel;
- PM_int386(0x31, &r, &r);
-}
-
-int PMAPI DPMI_lockLinearPages(ulong linear,ulong len)
-{
- PMREGS r;
-
- r.x.ax = 0x600; /* DPMI Lock Linear Region */
- r.x.bx = (linear >> 16); /* Linear address in BX:CX */
- r.x.cx = (linear & 0xFFFF);
- r.x.si = (len >> 16); /* Length in SI:DI */
- r.x.di = (len & 0xFFFF);
- PM_int386(0x31, &r, &r);
- return (!r.x.cflag);
-}
-
-int PMAPI DPMI_unlockLinearPages(ulong linear,ulong len)
-{
- PMREGS r;
-
- r.x.ax = 0x601; /* DPMI Unlock Linear Region */
- r.x.bx = (linear >> 16); /* Linear address in BX:CX */
- r.x.cx = (linear & 0xFFFF);
- r.x.si = (len >> 16); /* Length in SI:DI */
- r.x.di = (len & 0xFFFF);
- PM_int386(0x31, &r, &r);
- return (!r.x.cflag);
-}
-
-void * PMAPI DPMI_mapPhysicalAddr(ulong base,ulong limit,ibool isCached)
-{
- PMSREGS sregs;
- ulong linAddr;
- ulong DSBaseAddr;
-
- /* Get the base address for the default DS selector */
- PM_segread(&sregs);
- DSBaseAddr = DPMI_getSelectorBase(sregs.ds);
- if ((base < 0x100000) && (DSBaseAddr == 0)) {
- /* DS is zero based, so we can directly access the first 1Mb of
- * system memory (like under DOS4GW).
- */
- return (void*)base;
- }
-
- /* Map the memory to a linear address using DPMI function 0x800 */
- if ((linAddr = DPMI_mapPhysicalToLinear(base,limit)) == 0) {
- if (base >= 0x100000)
- return NULL;
- /* If the linear address mapping fails but we are trying to
- * map an area in the first 1Mb of system memory, then we must
- * be running under a Windows or OS/2 DOS box. Under these
- * environments we can use the segment wrap around as a fallback
- * measure, as this does work properly.
- */
- linAddr = base;
- }
-
- /* Now expand the default DS selector to 4Gb so we can access it */
- if (!DPMI_setSelectorLimit(sregs.ds,0xFFFFFFFFUL))
- return NULL;
-
- /* Finally enable caching for the page tables that we just mapped in,
- * since DOS4GW and PMODE/W create the page table entries without
- * caching enabled which hurts the performance of the linear framebuffer
- * as it disables write combining on Pentium Pro and above processors.
- *
- * For those processors cache disabling is better handled through the
- * MTRR registers anyway (we can write combine a region but disable
- * caching) so that MMIO register regions do not screw up.
- */
- if (isCached) {
- if ((PDB = _PM_getPDB()) != 0 && DSBaseAddr == 0) {
- int startPDB,endPDB,iPDB,startPage,endPage,start,end,iPage;
- ulong pageTable,*pPageTable;
- if (!pPDB) {
- if (PDB >= 0x100000)
- pPDB = (ulong*)DPMI_mapPhysicalToLinear(PDB,0xFFF);
- else
- pPDB = (ulong*)PDB;
- }
- if (pPDB) {
- startPDB = (linAddr >> 22) & 0x3FF;
- startPage = (linAddr >> 12) & 0x3FF;
- endPDB = ((linAddr+limit) >> 22) & 0x3FF;
- endPage = ((linAddr+limit) >> 12) & 0x3FF;
- for (iPDB = startPDB; iPDB <= endPDB; iPDB++) {
- pageTable = pPDB[iPDB] & ~0xFFF;
- if (pageTable >= 0x100000)
- pPageTable = (ulong*)DPMI_mapPhysicalToLinear(pageTable,0xFFF);
- else
- pPageTable = (ulong*)pageTable;
- start = (iPDB == startPDB) ? startPage : 0;
- end = (iPDB == endPDB) ? endPage : 0x3FF;
- for (iPage = start; iPage <= end; iPage++)
- pPageTable[iPage] &= ~0x18;
- }
- }
- }
- }
-
- /* Now return the base address of the memory into the default DS */
- return (void*)(linAddr - DSBaseAddr);
-}
-
-/* Some DOS extender implementations do not directly support calling a
- * real mode procedure from protected mode. However we can simulate what
- * we need temporarily hooking the INT 6Ah vector with a small real mode
- * stub that will call our real mode code for us.
- */
-
-static uchar int6AHandler[] = {
- 0x00,0x00,0x00,0x00, /* __PMODE_callReal variable */
- 0xFB, /* sti */
- 0x2E,0xFF,0x1E,0x00,0x00, /* call [cs:__PMODE_callReal] */
- 0xCF, /* iretf */
- };
-static uchar *crPtr = NULL; /* Pointer to of int 6A handler */
-static uint crRSeg,crROff; /* Real mode seg:offset of handler */
-
-void PMAPI PM_callRealMode(uint seg,uint off, RMREGS *in,
- RMSREGS *sregs)
-{
- uchar *p;
- uint oldSeg,oldOff;
-
- if (!crPtr) {
- /* Allocate and copy the memory block only once */
- crPtr = PM_allocRealSeg(sizeof(int6AHandler), &crRSeg, &crROff);
- memcpy(crPtr,int6AHandler,sizeof(int6AHandler));
- }
- PM_setWord(crPtr,off); /* Plug in address to call */
- PM_setWord(crPtr+2,seg);
- p = PM_mapRealPointer(0,0x6A * 4);
- oldOff = PM_getWord(p); /* Save old handler address */
- oldSeg = PM_getWord(p+2);
- PM_setWord(p,crROff+4); /* Hook 6A handler */
- PM_setWord(p+2,crRSeg);
- PM_int86x(0x6A, in, in, sregs); /* Call real mode code */
- PM_setWord(p,oldOff); /* Restore old handler */
- PM_setWord(p+2,oldSeg);
-}
-
-void * PMAPI PM_getBIOSPointer(void)
-{ return PM_mapPhysicalAddr(0x400,0xFFFF,true); }
-
-void * PMAPI PM_getA0000Pointer(void)
-{ return PM_mapPhysicalAddr(0xA0000,0xFFFF,true); }
-
-void * PMAPI PM_mapPhysicalAddr(ulong base,ulong limit,ibool isCached)
-{ return DPMI_mapPhysicalAddr(base,limit,isCached); }
-
-void PMAPI PM_freePhysicalAddr(void *ptr,ulong limit)
-{
- /* Mapping cannot be free */
-}
-
-ulong PMAPI PM_getPhysicalAddr(void *p)
-{
- /* TODO: This function should find the physical address of a linear */
- /* address. */
- (void)p;
- return 0xFFFFFFFFUL;
-}
-
-void * PMAPI PM_mapToProcess(void *base,ulong limit)
-{
- (void)limit;
- return (void*)base;
-}
-
-void * PMAPI PM_mapRealPointer(uint r_seg,uint r_off)
-{
- static uchar *zeroPtr = NULL;
-
- if (!zeroPtr)
- zeroPtr = PM_mapPhysicalAddr(0,0xFFFFF,true);
- return (void*)(zeroPtr + MK_PHYS(r_seg,r_off));
-}
-
-void * PMAPI PM_allocRealSeg(uint size,uint *r_seg,uint *r_off)
-{
- PMREGS r;
- void *p;
-
- r.x.ax = 0x100; /* DPMI allocate DOS memory */
- r.x.bx = (size + 0xF) >> 4; /* number of paragraphs */
- PM_int386(0x31, &r, &r);
- if (r.x.cflag)
- return NULL; /* DPMI call failed */
- *r_seg = r.x.ax; /* Real mode segment */
- *r_off = 0;
- p = PM_mapRealPointer(*r_seg,*r_off);
- _PM_addRealModeBlock(p,r.x.dx);
- return p;
-}
-
-void PMAPI PM_freeRealSeg(void *mem)
-{
- PMREGS r;
-
- r.x.ax = 0x101; /* DPMI free DOS memory */
- r.x.dx = _PM_findRealModeBlock(mem);/* DX := selector from 0x100 */
- PM_int386(0x31, &r, &r);
-}
-
-static DPMI_handler_t DPMI_int10 = NULL;
-
-void PMAPI DPMI_setInt10Handler(DPMI_handler_t handler)
-{
- DPMI_int10 = handler;
-}
-
-void PMAPI DPMI_int86(int intno, DPMI_regs *regs)
-{
- PMREGS r;
- PMSREGS sr;
-
- if (intno == 0x10 && DPMI_int10) {
- if (DPMI_int10(regs))
- return;
- }
- PM_segread(&sr);
- r.x.ax = 0x300; /* DPMI issue real interrupt */
- r.h.bl = intno;
- r.h.bh = 0;
- r.x.cx = 0;
- sr.es = sr.ds;
- r.e.edi = (uint)regs;
- PM_int386x(0x31, &r, &r, &sr); /* Issue the interrupt */
-}
-
-#define IN(reg) rmregs.reg = in->e.reg
-#define OUT(reg) out->e.reg = rmregs.reg
-
-int PMAPI PM_int86(int intno, RMREGS *in, RMREGS *out)
-{
- DPMI_regs rmregs;
-
- memset(&rmregs, 0, sizeof(rmregs));
- IN(eax); IN(ebx); IN(ecx); IN(edx); IN(esi); IN(edi);
-
-/* These real mode ints may cause crashes. */
-/*AM: DPMI_int86(intno,&rmregs); /###* DPMI issue real interrupt */
-
- OUT(eax); OUT(ebx); OUT(ecx); OUT(edx); OUT(esi); OUT(edi);
- out->x.cflag = rmregs.flags & 0x1;
- return out->x.ax;
-}
-
-int PMAPI PM_int86x(int intno, RMREGS *in, RMREGS *out,
- RMSREGS *sregs)
-{
- DPMI_regs rmregs;
-
- memset(&rmregs, 0, sizeof(rmregs));
- IN(eax); IN(ebx); IN(ecx); IN(edx); IN(esi); IN(edi);
- rmregs.es = sregs->es;
- rmregs.ds = sregs->ds;
-
-/*AM: DPMI_int86(intno,&rmregs); /###* DPMI issue real interrupt */
-
- OUT(eax); OUT(ebx); OUT(ecx); OUT(edx); OUT(esi); OUT(edi);
- sregs->es = rmregs.es;
- sregs->cs = rmregs.cs;
- sregs->ss = rmregs.ss;
- sregs->ds = rmregs.ds;
- out->x.cflag = rmregs.flags & 0x1;
- return out->x.ax;
-}
-
-#pragma pack(1)
-
-typedef struct {
- uint LargestBlockAvail;
- uint MaxUnlockedPage;
- uint LargestLockablePage;
- uint LinAddrSpace;
- uint NumFreePagesAvail;
- uint NumPhysicalPagesFree;
- uint TotalPhysicalPages;
- uint FreeLinAddrSpace;
- uint SizeOfPageFile;
- uint res[3];
- } MemInfo;
-
-#pragma pack()
-
-void PMAPI PM_availableMemory(ulong *physical,ulong *total)
-{
- PMREGS r;
- PMSREGS sr;
- MemInfo memInfo;
-
- PM_segread(&sr);
- r.x.ax = 0x500; /* DPMI get free memory info */
- sr.es = sr.ds;
- r.e.edi = (uint)&memInfo;
- PM_int386x(0x31, &r, &r, &sr); /* Issue the interrupt */
- *physical = memInfo.NumPhysicalPagesFree * 4096;
- *total = memInfo.LargestBlockAvail;
- if (*total < *physical)
- *physical = *total;
-}
-
-/****************************************************************************
-REMARKS:
-Function to get the file attributes for a specific file.
-****************************************************************************/
-uint PMAPI PM_getFileAttr(
- const char *filename)
-{
- /* TODO: Implement this! */
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-Function to get the file time and date for a specific file.
-****************************************************************************/
-ibool PMAPI PM_getFileTime(
- const char *filename,
- ibool gmTime,
- PM_time *time)
-{
- /* TODO: Implement this! */
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Function to set the file time and date for a specific file.
-****************************************************************************/
-ibool PMAPI PM_setFileTime(
- const char *filename,
- ibool gmTime,
- PM_time *time)
-{
- /* TODO: Implement this! */
- return false;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/smx/pmsmx.c b/board/MAI/bios_emulator/scitech/src/pm/smx/pmsmx.c
deleted file mode 100644
index 98e31bc638..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/smx/pmsmx.c
+++ /dev/null
@@ -1,471 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: 32-bit SMX embedded systems development
-*
-* Description: Implementation for the OS Portability Manager Library, which
-* contains functions to implement OS specific services in a
-* generic, cross platform API. Porting the OS Portability
-* Manager library is the first step to porting any SciTech
-* products to a new platform.
-*
-****************************************************************************/
-
-#include "pmapi.h"
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <dos.h>
-#include "smx/ps2mouse.h"
-
-/*--------------------------- Global variables ----------------------------*/
-
-static int globalDataStart;
-
-PM_criticalHandler _VARAPI _PM_critHandler = NULL;
-PM_breakHandler _VARAPI _PM_breakHandler = NULL;
-PM_intHandler _VARAPI _PM_timerHandler = NULL;
-PM_intHandler _VARAPI _PM_rtcHandler = NULL;
-PM_intHandler _VARAPI _PM_keyHandler = NULL;
-PM_key15Handler _VARAPI _PM_key15Handler = NULL;
-PM_mouseHandler _VARAPI _PM_mouseHandler = NULL;
-PM_intHandler _VARAPI _PM_int10Handler = NULL;
-int _VARAPI _PM_mouseMask;
-
-uchar * _VARAPI _PM_ctrlCPtr; /* Location of Ctrl-C flag */
-uchar * _VARAPI _PM_ctrlBPtr; /* Location of Ctrl-Break flag */
-uchar * _VARAPI _PM_critPtr; /* Location of Critical error Bf*/
-PMFARPTR _VARAPI _PM_prevTimer = PMNULL; /* Previous timer handler */
-PMFARPTR _VARAPI _PM_prevRTC = PMNULL; /* Previous RTC handler */
-PMFARPTR _VARAPI _PM_prevKey = PMNULL; /* Previous key handler */
-PMFARPTR _VARAPI _PM_prevKey15 = PMNULL; /* Previous key15 handler */
-PMFARPTR _VARAPI _PM_prevBreak = PMNULL; /* Previous break handler */
-PMFARPTR _VARAPI _PM_prevCtrlC = PMNULL; /* Previous CtrlC handler */
-PMFARPTR _VARAPI _PM_prevCritical = PMNULL; /* Previous critical handler */
-long _VARAPI _PM_prevRealTimer; /* Previous real mode timer */
-long _VARAPI _PM_prevRealRTC; /* Previous real mode RTC */
-long _VARAPI _PM_prevRealKey; /* Previous real mode key */
-long _VARAPI _PM_prevRealKey15; /* Previous real mode key15 */
-long _VARAPI _PM_prevRealInt10; /* Previous real mode int 10h */
-static uchar _PM_oldCMOSRegA; /* CMOS register A contents */
-static uchar _PM_oldCMOSRegB; /* CMOS register B contents */
-static uchar _PM_oldRTCPIC2; /* Mask value for RTC IRQ8 */
-
-/*----------------------------- Implementation ----------------------------*/
-
-/* Globals for locking interrupt handlers in _pmsmx.asm */
-
-extern int _ASMAPI _PM_pmsmxDataStart;
-extern int _ASMAPI _PM_pmsmxDataEnd;
-void _ASMAPI _PM_pmsmxCodeStart(void);
-void _ASMAPI _PM_pmsmxCodeEnd(void);
-
-/* Protected mode interrupt handlers, also called by PM callbacks below */
-
-void _ASMAPI _PM_timerISR(void);
-void _ASMAPI _PM_rtcISR(void);
-void _ASMAPI _PM_keyISR(void);
-void _ASMAPI _PM_key15ISR(void);
-void _ASMAPI _PM_breakISR(void);
-void _ASMAPI _PM_ctrlCISR(void);
-void _ASMAPI _PM_criticalISR(void);
-void _ASMAPI _PM_mouseISR(void);
-void _ASMAPI _PM_int10PMCB(void);
-
-/* Protected mode DPMI callback handlers */
-
-void _ASMAPI _PM_mousePMCB(void);
-
-/* Routine to install a mouse handler function */
-
-void _ASMAPI _PM_setMouseHandler(int mask);
-
-/* Routine to allocate DPMI real mode callback routines */
-
-void _ASMAPI _DPMI_allocateCallback(void (_ASMAPI *pmcode)(),void *rmregs,long *RMCB);
-void _ASMAPI _DPMI_freeCallback(long RMCB);
-
-/* DPMI helper functions in PMLITE.C */
-
-ulong PMAPI DPMI_mapPhysicalToLinear(ulong physAddr,ulong limit);
-int PMAPI DPMI_setSelectorBase(ushort sel,ulong linAddr);
-ulong PMAPI DPMI_getSelectorBase(ushort sel);
-int PMAPI DPMI_setSelectorLimit(ushort sel,ulong limit);
-uint PMAPI DPMI_createSelector(ulong base,ulong limit);
-void PMAPI DPMI_freeSelector(uint sel);
-int PMAPI DPMI_lockLinearPages(ulong linear,ulong len);
-int PMAPI DPMI_unlockLinearPages(ulong linear,ulong len);
-
-/* Functions to read and write CMOS registers */
-
-uchar PMAPI _PM_readCMOS(int index);
-void PMAPI _PM_writeCMOS(int index,uchar value);
-
-/*-------------------------------------------------------------------------*/
-/* Generic routines common to all environments */
-/*-------------------------------------------------------------------------*/
-
-void PMAPI PM_resetMouseDriver(int hardReset)
-{
- ps2MouseReset();
-}
-
-void PMAPI PM_setRealTimeClockFrequency(int frequency)
-{
- static short convert[] = {
- 8192,
- 4096,
- 2048,
- 1024,
- 512,
- 256,
- 128,
- 64,
- 32,
- 16,
- 8,
- 4,
- 2,
- -1,
- };
- int i;
-
- /* First clear any pending RTC timeout if not cleared */
- _PM_readCMOS(0x0C);
- if (frequency == 0) {
- /* Disable RTC timout */
- _PM_writeCMOS(0x0A,_PM_oldCMOSRegA);
- _PM_writeCMOS(0x0B,_PM_oldCMOSRegB & 0x0F);
- }
- else {
- /* Convert frequency value to RTC clock indexes */
- for (i = 0; convert[i] != -1; i++) {
- if (convert[i] == frequency)
- break;
- }
-
- /* Set RTC timout value and enable timeout */
- _PM_writeCMOS(0x0A,(_PM_oldCMOSRegA & 0xF0) | (i+3));
- _PM_writeCMOS(0x0B,(_PM_oldCMOSRegB & 0x0F) | 0x40);
- }
-}
-
-static void PMAPI lockPMHandlers(void)
-{
- static int locked = 0;
- int stat = 0;
- PM_lockHandle lh;
-
- /* Lock all of the code and data used by our protected mode interrupt
- * handling routines, so that it will continue to work correctly
- * under real mode.
- */
- if (!locked) {
- PM_saveDS();
- stat = !PM_lockDataPages(&globalDataStart-2048,4096,&lh);
- stat |= !PM_lockDataPages(&_PM_pmsmxDataStart,(int)&_PM_pmsmxDataEnd - (int)&_PM_pmsmxDataStart,&lh);
- stat |= !PM_lockCodePages((__codePtr)_PM_pmsmxCodeStart,(int)_PM_pmsmxCodeEnd-(int)_PM_pmsmxCodeStart,&lh);
- if (stat) {
- printf("Page locking services failed - interrupt handling not safe!\n");
- exit(1);
- }
- locked = 1;
- }
-}
-
-void PMAPI PM_getPMvect(int intno, PMFARPTR *isr)
-{
- PMREGS regs;
-
- regs.x.ax = 0x204;
- regs.h.bl = intno;
- PM_int386(0x31,&regs,&regs);
- isr->sel = regs.x.cx;
- isr->off = regs.e.edx;
-}
-
-void PMAPI PM_setPMvect(int intno, PM_intHandler isr)
-{
- PMSREGS sregs;
- PMREGS regs;
-
- PM_saveDS();
- regs.x.ax = 0x205; /* Set protected mode vector */
- regs.h.bl = intno;
- PM_segread(&sregs);
- regs.x.cx = sregs.cs;
- regs.e.edx = (uint)isr;
- PM_int386(0x31,&regs,&regs);
-}
-
-void PMAPI PM_restorePMvect(int intno, PMFARPTR isr)
-{
- PMREGS regs;
-
- regs.x.ax = 0x205;
- regs.h.bl = intno;
- regs.x.cx = isr.sel;
- regs.e.edx = isr.off;
- PM_int386(0x31,&regs,&regs);
-}
-
-static long prevRealBreak; /* Previous real mode break handler */
-static long prevRealCtrlC; /* Previous real mode CtrlC handler */
-static long prevRealCritical; /* Prev real mode critical handler */
-
-int PMAPI PM_setMouseHandler(int mask, PM_mouseHandler mh)
-{
- lockPMHandlers(); /* Ensure our handlers are locked */
-
- _PM_mouseHandler = mh;
- return 0;
-}
-
-void PMAPI PM_restoreMouseHandler(void)
-{
- if (_PM_mouseHandler)
- _PM_mouseHandler = NULL;
-}
-
-static void getISR(int intno, PMFARPTR *pmisr, long *realisr)
-{
- PM_getPMvect(intno,pmisr);
-}
-
-static void restoreISR(int intno, PMFARPTR pmisr, long realisr)
-{
- PM_restorePMvect(intno,pmisr);
-}
-
-static void setISR(int intno, void (* PMAPI pmisr)())
-{
- lockPMHandlers(); /* Ensure our handlers are locked */
- PM_setPMvect(intno,pmisr);
-}
-
-void PMAPI PM_setTimerHandler(PM_intHandler th)
-{
- getISR(PM_IRQ0, &_PM_prevTimer, &_PM_prevRealTimer);
- _PM_timerHandler = th;
- setISR(PM_IRQ0, _PM_timerISR);
-}
-
-void PMAPI PM_restoreTimerHandler(void)
-{
- if (_PM_timerHandler) {
- restoreISR(PM_IRQ0, _PM_prevTimer, _PM_prevRealTimer);
- _PM_timerHandler = NULL;
- }
-}
-
-ibool PMAPI PM_setRealTimeClockHandler(PM_intHandler th,int frequency)
-{
- /* Save the old CMOS real time clock values */
- _PM_oldCMOSRegA = _PM_readCMOS(0x0A);
- _PM_oldCMOSRegB = _PM_readCMOS(0x0B);
-
- /* Set the real time clock interrupt handler */
- getISR(0x70, &_PM_prevRTC, &_PM_prevRealRTC);
- _PM_rtcHandler = th;
- setISR(0x70, _PM_rtcISR);
-
- /* Program the real time clock default frequency */
- PM_setRealTimeClockFrequency(frequency);
-
- /* Unmask IRQ8 in the PIC2 */
- _PM_oldRTCPIC2 = PM_inpb(0xA1);
- PM_outpb(0xA1,_PM_oldRTCPIC2 & 0xFE);
- return true;
-}
-
-void PMAPI PM_restoreRealTimeClockHandler(void)
-{
- if (_PM_rtcHandler) {
- /* Restore CMOS registers and mask RTC clock */
- _PM_writeCMOS(0x0A,_PM_oldCMOSRegA);
- _PM_writeCMOS(0x0B,_PM_oldCMOSRegB);
- PM_outpb(0xA1,(PM_inpb(0xA1) & 0xFE) | (_PM_oldRTCPIC2 & ~0xFE));
-
- /* Restore the interrupt vector */
- restoreISR(0x70, _PM_prevRTC, _PM_prevRealRTC);
- _PM_rtcHandler = NULL;
- }
-}
-
-void PMAPI PM_setKeyHandler(PM_intHandler kh)
-{
- getISR(PM_IRQ1, &_PM_prevKey, &_PM_prevRealKey);
- _PM_keyHandler = kh;
- setISR(PM_IRQ1, _PM_keyISR);
-}
-
-void PMAPI PM_restoreKeyHandler(void)
-{
- if (_PM_keyHandler) {
- restoreISR(PM_IRQ1, _PM_prevKey, _PM_prevRealKey);
- _PM_keyHandler = NULL;
- }
-}
-
-void PMAPI PM_setKey15Handler(PM_key15Handler kh)
-{
- getISR(0x15, &_PM_prevKey15, &_PM_prevRealKey15);
- _PM_key15Handler = kh;
- setISR(0x15, _PM_key15ISR);
-}
-
-void PMAPI PM_restoreKey15Handler(void)
-{
- if (_PM_key15Handler) {
- restoreISR(0x15, _PM_prevKey15, _PM_prevRealKey15);
- _PM_key15Handler = NULL;
- }
-}
-
-/* Real mode Ctrl-C and Ctrl-Break handler. This handler simply sets a
- * flag in the real mode code segment and exit. We save the location
- * of this flag in real mode memory so that both the real mode and
- * protected mode code will be modifying the same flags.
- */
-
-static uchar ctrlHandler[] = {
- 0x00,0x00,0x00,0x00, /* ctrlBFlag */
- 0x66,0x2E,0xC7,0x06,0x00,0x00,
- 0x01,0x00,0x00,0x00, /* mov [cs:ctrlBFlag],1 */
- 0xCF, /* iretf */
- };
-
-void PMAPI PM_installAltBreakHandler(PM_breakHandler bh)
-{
- uint rseg,roff;
-
- getISR(0x1B, &_PM_prevBreak, &prevRealBreak);
- getISR(0x23, &_PM_prevCtrlC, &prevRealCtrlC);
- _PM_breakHandler = bh;
- setISR(0x1B, _PM_breakISR);
- setISR(0x23, _PM_ctrlCISR);
-
- /* Hook the real mode vectors for these handlers, as these are not
- * normally reflected by the DPMI server up to protected mode
- */
- _PM_ctrlBPtr = PM_allocRealSeg(sizeof(ctrlHandler)*2, &rseg, &roff);
- memcpy(_PM_ctrlBPtr,ctrlHandler,sizeof(ctrlHandler));
- memcpy(_PM_ctrlBPtr+sizeof(ctrlHandler),ctrlHandler,sizeof(ctrlHandler));
- _PM_ctrlCPtr = _PM_ctrlBPtr + sizeof(ctrlHandler);
- _PM_setRMvect(0x1B,((long)rseg << 16) | (roff+4));
- _PM_setRMvect(0x23,((long)rseg << 16) | (roff+sizeof(ctrlHandler)+4));
-}
-
-void PMAPI PM_installBreakHandler(void)
-{
- PM_installAltBreakHandler(NULL);
-}
-
-void PMAPI PM_restoreBreakHandler(void)
-{
- if (_PM_prevBreak.sel) {
- restoreISR(0x1B, _PM_prevBreak, prevRealBreak);
- restoreISR(0x23, _PM_prevCtrlC, prevRealCtrlC);
- _PM_prevBreak.sel = 0;
- _PM_breakHandler = NULL;
- PM_freeRealSeg(_PM_ctrlBPtr);
- }
-}
-
-/* Real mode Critical Error handler. This handler simply saves the AX and
- * DI values in the real mode code segment and exits. We save the location
- * of this flag in real mode memory so that both the real mode and
- * protected mode code will be modifying the same flags.
- */
-
-static uchar criticalHandler[] = {
- 0x00,0x00, /* axCode */
- 0x00,0x00, /* diCode */
- 0x2E,0xA3,0x00,0x00, /* mov [cs:axCode],ax */
- 0x2E,0x89,0x3E,0x02,0x00, /* mov [cs:diCode],di */
- 0xB8,0x03,0x00, /* mov ax,3 */
- 0xCF, /* iretf */
- };
-
-void PMAPI PM_installAltCriticalHandler(PM_criticalHandler ch)
-{
- uint rseg,roff;
-
- getISR(0x24, &_PM_prevCritical, &prevRealCritical);
- _PM_critHandler = ch;
- setISR(0x24, _PM_criticalISR);
-
- /* Hook the real mode vector, as this is not normally reflected by the
- * DPMI server up to protected mode.
- */
- _PM_critPtr = PM_allocRealSeg(sizeof(criticalHandler)*2, &rseg, &roff);
- memcpy(_PM_critPtr,criticalHandler,sizeof(criticalHandler));
- _PM_setRMvect(0x24,((long)rseg << 16) | (roff+4));
-}
-
-void PMAPI PM_installCriticalHandler(void)
-{
- PM_installAltCriticalHandler(NULL);
-}
-
-void PMAPI PM_restoreCriticalHandler(void)
-{
- if (_PM_prevCritical.sel) {
- restoreISR(0x24, _PM_prevCritical, prevRealCritical);
- PM_freeRealSeg(_PM_critPtr);
- _PM_prevCritical.sel = 0;
- _PM_critHandler = NULL;
- }
-}
-
-int PMAPI PM_lockDataPages(void *p,uint len,PM_lockHandle *lh)
-{
- PMSREGS sregs;
- PM_segread(&sregs);
- return DPMI_lockLinearPages((uint)p + DPMI_getSelectorBase(sregs.ds),len);
-}
-
-int PMAPI PM_unlockDataPages(void *p,uint len,PM_lockHandle *lh)
-{
- PMSREGS sregs;
- PM_segread(&sregs);
- return DPMI_unlockLinearPages((uint)p + DPMI_getSelectorBase(sregs.ds),len);
-}
-
-int PMAPI PM_lockCodePages(void (*p)(),uint len,PM_lockHandle *lh)
-{
- PMSREGS sregs;
- PM_segread(&sregs);
-/*AM: causes minor glitch with */
-/*AM: older versions pmEasy which don't allow DPMI 06 on */
-/*AM: Code selector 0x0C -- assume base is 0 which it should be. */
- return DPMI_lockLinearPages((uint)p,len);
-}
-
-int PMAPI PM_unlockCodePages(void (*p)(),uint len,PM_lockHandle *lh)
-{
- PMSREGS sregs;
- PM_segread(&sregs);
- return DPMI_unlockLinearPages((uint)p,len);
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/smx/vflat.c b/board/MAI/bios_emulator/scitech/src/pm/smx/vflat.c
deleted file mode 100644
index 579ef2c95c..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/smx/vflat.c
+++ /dev/null
@@ -1,49 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-*
-* Description: Dummy module; no virtual framebuffer for this OS
-*
-****************************************************************************/
-
-#include "pmapi.h"
-
-ibool PMAPI VF_available(void)
-{
- return false;
-}
-
-void * PMAPI VF_init(ulong baseAddr,int bankSize,int codeLen,void *bankFunc)
-{
- baseAddr = baseAddr;
- bankSize = bankSize;
- codeLen = codeLen;
- bankFunc = bankFunc;
- return NULL;
-}
-
-void PMAPI VF_exit(void)
-{
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/smx/ztimer.c b/board/MAI/bios_emulator/scitech/src/pm/smx/ztimer.c
deleted file mode 100644
index 794119282e..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/smx/ztimer.c
+++ /dev/null
@@ -1,115 +0,0 @@
-/****************************************************************************
-*
-* Ultra Long Period Timer
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: 32-bit SMX embedded systems development
-*
-* Description: OS specific implementation for the Zen Timer functions.
-* LZTimer not supported for smx (as needed for i486 processors), only
-* ULZTimer is supported at this time.
-*
-****************************************************************************/
-
-/*---------------------------- Global smx variables -----------------------*/
-
-extern ulong _cdecl etime; /* elapsed time */
-extern ulong _cdecl xticks_per_second(void);
-
-/*----------------------------- Implementation ----------------------------*/
-
-/* External assembler functions */
-
-void _ASMAPI LZ_disable(void);
-void _ASMAPI LZ_enable(void);
-
-
-/****************************************************************************
-REMARKS:
-Initialise the Zen Timer module internals.
-****************************************************************************/
-void __ZTimerInit(void)
-{
-}
-
-ulong reterr(void)
-{
- PM_fatalError("Zen Timer not supported for smx.");
- return(0);
-}
-
-/****************************************************************************
-REMARKS:
-Call the assembler Zen Timer functions to do the timing.
-****************************************************************************/
-#define __LZTimerOn(tm) PM_fatalError("Zen Timer not supported for smx.")
-
-/****************************************************************************
-REMARKS:
-Call the assembler Zen Timer functions to do the timing.
-****************************************************************************/
-#define __LZTimerLap(tm) reterr()
-
-/****************************************************************************
-REMARKS:
-Call the assembler Zen Timer functions to do the timing.
-****************************************************************************/
-#define __LZTimerOff(tm) PM_fatalError("Zen Timer not supported for smx.")
-
-/****************************************************************************
-REMARKS:
-Call the assembler Zen Timer functions to do the timing.
-****************************************************************************/
-#define __LZTimerCount(tm) reterr()
-
-/****************************************************************************
-REMARKS:
-Define the resolution of the long period timer as seconds per timer tick.
-****************************************************************************/
-#define ULZTIMER_RESOLUTION (ulong)(1000000/xticks_per_second())
-
-/****************************************************************************
-REMARKS:
-Read the Long Period timer value from the smx timer tick.
-****************************************************************************/
-static ulong __ULZReadTime(void)
-{
- ulong ticks;
- LZ_disable(); /* Turn of interrupts */
- ticks = etime;
- LZ_enable(); /* Turn on interrupts again */
- return ticks;
-}
-
-/****************************************************************************
-REMARKS:
-Compute the elapsed time from the BIOS timer tick. Note that we check to see
-whether a midnight boundary has passed, and if so adjust the finish time to
-account for this. We cannot detect if more that one midnight boundary has
-passed, so if this happens we will be generating erronous results.
-****************************************************************************/
-ulong __ULZElapsedTime(ulong start,ulong finish)
-{
- if (finish < start)
- finish += xticks_per_second() * 3600 *24; /* Number of ticks in 24 hours */
- return finish - start;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/stub/cpuinfo.c b/board/MAI/bios_emulator/scitech/src/pm/stub/cpuinfo.c
deleted file mode 100644
index 0615e90165..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/stub/cpuinfo.c
+++ /dev/null
@@ -1,79 +0,0 @@
-/****************************************************************************
-*
-* Ultra Long Period Timer
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: *** TODO: ADD YOUR OS ENVIRONMENT NAME HERE ***
-*
-* Description: Module to implement OS specific services to measure the
-* CPU frequency.
-*
-****************************************************************************/
-
-/*----------------------------- Implementation ----------------------------*/
-
-/****************************************************************************
-REMARKS:
-Increase the thread priority to maximum, if possible.
-****************************************************************************/
-static int SetMaxThreadPriority(void)
-{
- /* TODO: If you have thread priorities, increase it to maximum for the */
- /* thread for timing the CPU frequency. */
- return oldPriority;
-}
-
-/****************************************************************************
-REMARKS:
-Restore the original thread priority.
-****************************************************************************/
-static void RestoreThreadPriority(
- int priority)
-{
- /* TODO: Restore the original thread priority on exit. */
-}
-
-/****************************************************************************
-REMARKS:
-Initialise the counter and return the frequency of the counter.
-****************************************************************************/
-static void GetCounterFrequency(
- CPU_largeInteger *freq)
-{
- /* TODO: Return the frequency of the counter in here. You should try to */
- /* normalise this value to be around 100,000 ticks per second. */
- freq->low = 0;
- freq->high = 0;
-}
-
-/****************************************************************************
-REMARKS:
-Read the counter and return the counter value.
-
-TODO: Implement this to read the counter. It should be done as a macro
- for accuracy.
-****************************************************************************/
-#define GetCounter(t) \
-{ \
- (t)->low = 0; \
- (t)->high = 0; \
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/stub/event.c b/board/MAI/bios_emulator/scitech/src/pm/stub/event.c
deleted file mode 100644
index 204c492540..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/stub/event.c
+++ /dev/null
@@ -1,199 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: *** TODO: ADD YOUR OS ENVIRONMENT NAME HERE ***
-*
-* Description: **** implementation for the SciTech cross platform
-* event library.
-*
-****************************************************************************/
-
-/*---------------------------- Global Variables ---------------------------*/
-
-static ushort keyUpMsg[256] = {0};/* Table of key up messages */
-static int rangeX,rangeY; /* Range of mouse coordinates */
-
-/*---------------------------- Implementation -----------------------------*/
-
-/* These are not used under non-DOS systems */
-#define _EVT_disableInt() 1
-#define _EVT_restoreInt(flags)
-
-/****************************************************************************
-PARAMETERS:
-scanCode - Scan code to test
-
-REMARKS:
-This macro determines if a specified key is currently down at the
-time that the call is made.
-****************************************************************************/
-#define _EVT_isKeyDown(scanCode) (keyUpMsg[scanCode] != 0)
-
-/****************************************************************************
-REMARKS:
-This function is used to return the number of ticks since system
-startup in milliseconds. This should be the same value that is placed into
-the time stamp fields of events, and is used to implement auto mouse down
-events.
-****************************************************************************/
-ulong _EVT_getTicks(void)
-{
- /* TODO: Implement this for your OS! */
-}
-
-/****************************************************************************
-REMARKS:
-Pumps all messages in the application message queue into our event queue.
-****************************************************************************/
-static void _EVT_pumpMessages(void)
-{
- /* TODO: The purpose of this function is to read all keyboard and mouse */
- /* events from the OS specific event queue, translate them and post */
- /* them into the SciTech event queue. */
- /* */
- /* NOTE: There are a couple of important things that this function must */
- /* take care of: */
- /* */
- /* 1. Support for KEYDOWN, KEYREPEAT and KEYUP is required. */
- /* */
- /* 2. Support for reading hardware scan code as well as ASCII */
- /* translated values is required. Games use the scan codes rather */
- /* than ASCII values. Scan codes go into the high order byte of the */
- /* keyboard message field. */
- /* */
- /* 3. Support for at least reading mouse motion data (mickeys) from the */
- /* mouse is required. Using the mickey values, we can then translate */
- /* to mouse cursor coordinates scaled to the range of the current */
- /* graphics display mode. Mouse values are scaled based on the */
- /* global 'rangeX' and 'rangeY'. */
- /* */
- /* 4. Support for a timestamp for the events is required, which is */
- /* defined as the number of milliseconds since some event (usually */
- /* system startup). This is the timestamp when the event occurred */
- /* (ie: at interrupt time) not when it was stuff into the SciTech */
- /* event queue. */
- /* */
- /* 5. Support for mouse double click events. If the OS has a native */
- /* mechanism to determine this, it should be used. Otherwise the */
- /* time stamp information will be used by the generic event code */
- /* to generate double click events. */
-}
-
-/****************************************************************************
-REMARKS:
-This macro/function is used to converts the scan codes reported by the
-keyboard to our event libraries normalised format. We only have one scan
-code for the 'A' key, and use shift modifiers to determine if it is a
-Ctrl-F1, Alt-F1 etc. The raw scan codes from the keyboard work this way,
-but the OS gives us 'cooked' scan codes, we have to translate them back
-to the raw format.
-****************************************************************************/
-#define _EVT_maskKeyCode(evt)
-
-/****************************************************************************
-REMARKS:
-Safely abort the event module upon catching a fatal error.
-****************************************************************************/
-void _EVT_abort()
-{
- EVT_exit();
- PM_fatalError("Unhandled exception!");
-}
-
-/****************************************************************************
-PARAMETERS:
-mouseMove - Callback function to call wheneve the mouse needs to be moved
-
-REMARKS:
-Initiliase the event handling module. Here we install our mouse handling ISR
-to be called whenever any button's are pressed or released. We also build
-the free list of events in the event queue.
-
-We use handler number 2 of the mouse libraries interrupt handlers for our
-event handling routines.
-****************************************************************************/
-void EVTAPI EVT_init(
- _EVT_mouseMoveHandler mouseMove)
-{
- /* Initialise the event queue */
- _mouseMove = mouseMove;
- initEventQueue();
- memset(keyUpMsg,0,sizeof(keyUpMsg));
-
- /* TODO: Do any OS specific initialisation here */
-
- /* Catch program termination signals so we can clean up properly */
- signal(SIGABRT, _EVT_abort);
- signal(SIGFPE, _EVT_abort);
- signal(SIGINT, _EVT_abort);
-}
-
-/****************************************************************************
-REMARKS
-Changes the range of coordinates returned by the mouse functions to the
-specified range of values. This is used when changing between graphics
-modes set the range of mouse coordinates for the new display mode.
-****************************************************************************/
-void EVTAPI EVT_setMouseRange(
- int xRes,
- int yRes)
-{
- rangeX = xRes;
- rangeY = yRes;
-}
-
-/****************************************************************************
-REMARKS:
-Initiailises the internal event handling modules. The EVT_suspend function
-can be called to suspend event handling (such as when shelling out to DOS),
-and this function can be used to resume it again later.
-****************************************************************************/
-void EVT_resume(void)
-{
- /* Do nothing for non DOS systems */
-}
-
-/****************************************************************************
-REMARKS
-Suspends all of our event handling operations. This is also used to
-de-install the event handling code.
-****************************************************************************/
-void EVT_suspend(void)
-{
- /* Do nothing for non DOS systems */
-}
-
-/****************************************************************************
-REMARKS
-Exits the event module for program terminatation.
-****************************************************************************/
-void EVT_exit(void)
-{
- /* Restore signal handlers */
- signal(SIGABRT, SIG_DFL);
- signal(SIGFPE, SIG_DFL);
- signal(SIGINT, SIG_DFL);
-
- /* TODO: Do any OS specific cleanup in here */
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/stub/oshdr.h b/board/MAI/bios_emulator/scitech/src/pm/stub/oshdr.h
deleted file mode 100644
index 1395cbc3c4..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/stub/oshdr.h
+++ /dev/null
@@ -1,33 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: BeOS
-*
-* Description: Include file to include all OS specific header files.
-*
-****************************************************************************/
-
-/* TODO: This is where you include OS specific headers for the event handling */
-/* library. You may leave this empty if you have no OS specific headers */
-/* to include. */
diff --git a/board/MAI/bios_emulator/scitech/src/pm/stub/pm.c b/board/MAI/bios_emulator/scitech/src/pm/stub/pm.c
deleted file mode 100644
index 5f278c32df..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/stub/pm.c
+++ /dev/null
@@ -1,980 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: *** TODO: ADD YOUR OS ENVIRONMENT NAME HERE ***
-*
-* Description: Implementation for the OS Portability Manager Library, which
-* contains functions to implement OS specific services in a
-* generic, cross platform API. Porting the OS Portability
-* Manager library is the first step to porting any SciTech
-* products to a new platform.
-*
-****************************************************************************/
-
-#include "pmapi.h"
-#include "drvlib/os/os.h"
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-
-/* TODO: Include any OS specific headers here! */
-
-/*--------------------------- Global variables ----------------------------*/
-
-/* TODO: If you support access to the BIOS, the following VESABuf globals */
-/* keep track of a single VESA transfer buffer. If you don't support */
-/* access to the BIOS, remove these variables. */
-
-static uint VESABuf_len = 1024; /* Length of the VESABuf buffer */
-static void *VESABuf_ptr = NULL; /* Near pointer to VESABuf */
-static uint VESABuf_rseg; /* Real mode segment of VESABuf */
-static uint VESABuf_roff; /* Real mode offset of VESABuf */
-
-static void (PMAPIP fatalErrorCleanup)(void) = NULL;
-
-/*----------------------------- Implementation ----------------------------*/
-
-/****************************************************************************
-REMARKS:
-Initialise the PM library.
-****************************************************************************/
-void PMAPI PM_init(void)
-{
- /* TODO: Do any initialisation in here. This includes getting IOPL */
- /* access for the process calling PM_init. This will get called */
- /* more than once. */
-
- /* TODO: If you support the supplied MTRR register stuff (you need to */
- /* be at ring 0 for this!), you should initialise it in here. */
-
-/* MTRR_init(); */
-}
-
-/****************************************************************************
-REMARKS:
-Return the operating system type identifier.
-****************************************************************************/
-long PMAPI PM_getOSType(void)
-{
- /* TODO: Change this to return the define for your OS from drvlib/os.h */
- return _OS_MYOS;
-}
-
-/****************************************************************************
-REMARKS:
-Return the runtime type identifier (always PM_386 for protected mode)
-****************************************************************************/
-int PMAPI PM_getModeType(void)
-{ return PM_386; }
-
-/****************************************************************************
-REMARKS:
-Add a file directory separator to the end of the filename.
-****************************************************************************/
-void PMAPI PM_backslash(
- char *s)
-{
- uint pos = strlen(s);
- if (s[pos-1] != '/') {
- s[pos] = '/';
- s[pos+1] = '\0';
- }
-}
-
-/****************************************************************************
-REMARKS:
-Add a user defined PM_fatalError cleanup function.
-****************************************************************************/
-void PMAPI PM_setFatalErrorCleanup(
- void (PMAPIP cleanup)(void))
-{
- fatalErrorCleanup = cleanup;
-}
-
-/****************************************************************************
-REMARKS:
-Report a fatal error condition and halt the program.
-****************************************************************************/
-void PMAPI PM_fatalError(
- const char *msg)
-{
- /* TODO: If you are running in a GUI environment without a console, */
- /* this needs to be changed to bring up a fatal error message */
- /* box and terminate the program. */
- if (fatalErrorCleanup)
- fatalErrorCleanup();
- fprintf(stderr,"%s\n", msg);
- exit(1);
-}
-
-/****************************************************************************
-REMARKS:
-Exit handler to kill the VESA transfer buffer.
-****************************************************************************/
-static void ExitVBEBuf(void)
-{
- /* TODO: If you do not have BIOS access, remove this function. */
- if (VESABuf_ptr)
- PM_freeRealSeg(VESABuf_ptr);
- VESABuf_ptr = 0;
-}
-
-/****************************************************************************
-REMARKS:
-Allocate the real mode VESA transfer buffer for communicating with the BIOS.
-****************************************************************************/
-void * PMAPI PM_getVESABuf(
- uint *len,
- uint *rseg,
- uint *roff)
-{
- /* TODO: If you do not have BIOS access, simply delete the guts of */
- /* this function and return NULL. */
- if (!VESABuf_ptr) {
- /* Allocate a global buffer for communicating with the VESA VBE */
- if ((VESABuf_ptr = PM_allocRealSeg(VESABuf_len, &VESABuf_rseg, &VESABuf_roff)) == NULL)
- return NULL;
- atexit(ExitVBEBuf);
- }
- *len = VESABuf_len;
- *rseg = VESABuf_rseg;
- *roff = VESABuf_roff;
- return VESABuf_ptr;
-}
-
-/****************************************************************************
-REMARKS:
-Check if a key has been pressed.
-****************************************************************************/
-int PMAPI PM_kbhit(void)
-{
- /* TODO: This function checks if a key is available to be read. This */
- /* should be implemented, but is mostly used by the test programs */
- /* these days. */
- return true;
-}
-
-/****************************************************************************
-REMARKS:
-Wait for and return the next keypress.
-****************************************************************************/
-int PMAPI PM_getch(void)
-{
- /* TODO: This returns the ASCII code of the key pressed. This */
- /* should be implemented, but is mostly used by the test programs */
- /* these days. */
- return 0xD;
-}
-
-/****************************************************************************
-REMARKS:
-Open a fullscreen console mode for output.
-****************************************************************************/
-int PMAPI PM_openConsole(void)
-{
- /* TODO: Opens up a fullscreen console for graphics output. If your */
- /* console does not have graphics/text modes, this can be left */
- /* empty. The main purpose of this is to disable console switching */
- /* when in graphics modes if you can switch away from fullscreen */
- /* consoles (if you want to allow switching, this can be done */
- /* elsewhere with a full save/restore state of the graphics mode). */
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-Return the size of the state buffer used to save the console state.
-****************************************************************************/
-int PMAPI PM_getConsoleStateSize(void)
-{
- /* TODO: Returns the size of the console state buffer used to save the */
- /* state of the console before going into graphics mode. This is */
- /* used to restore the console back to normal when we are done. */
- return 1;
-}
-
-/****************************************************************************
-REMARKS:
-Save the state of the console into the state buffer.
-****************************************************************************/
-void PMAPI PM_saveConsoleState(
- void *stateBuf,
- int console_id)
-{
- /* TODO: Saves the state of the console into the state buffer. This is */
- /* used to restore the console back to normal when we are done. */
- /* We will always restore 80x25 text mode after being in graphics */
- /* mode, so if restoring text mode is all you need to do this can */
- /* be left empty. */
-}
-
-/****************************************************************************
-REMARKS:
-Restore the state of the console from the state buffer.
-****************************************************************************/
-void PMAPI PM_restoreConsoleState(
- const void *stateBuf,
- int console_id)
-{
- /* TODO: Restore the state of the console from the state buffer. This is */
- /* used to restore the console back to normal when we are done. */
- /* We will always restore 80x25 text mode after being in graphics */
- /* mode, so if restoring text mode is all you need to do this can */
- /* be left empty. */
-}
-
-/****************************************************************************
-REMARKS:
-Close the console and return to non-fullscreen console mode.
-****************************************************************************/
-void PMAPI PM_closeConsole(
- int console_id)
-{
- /* TODO: Close the console when we are done, going back to text mode. */
-}
-
-/****************************************************************************
-REMARKS:
-Set the location of the OS console cursor.
-****************************************************************************/
-void PM_setOSCursorLocation(
- int x,
- int y)
-{
- /* TODO: Set the OS console cursor location to the new value. This is */
- /* generally used for new OS ports (used mostly for DOS). */
-}
-
-/****************************************************************************
-REMARKS:
-Set the width of the OS console.
-****************************************************************************/
-void PM_setOSScreenWidth(
- int width,
- int height)
-{
- /* TODO: Set the OS console screen width. This is generally unused for */
- /* new OS ports. */
-}
-
-/****************************************************************************
-REMARKS:
-Set the real time clock handler (used for software stereo modes).
-****************************************************************************/
-ibool PMAPI PM_setRealTimeClockHandler(
- PM_intHandler ih,
- int frequency)
-{
- /* TODO: Install a real time clock interrupt handler. Normally this */
- /* will not be supported from most OS'es in user land, so an */
- /* alternative mechanism is needed to enable software stereo. */
- /* Hence leave this unimplemented unless you have a high priority */
- /* mechanism to call the 32-bit callback when the real time clock */
- /* interrupt fires. */
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Set the real time clock frequency (for stereo modes).
-****************************************************************************/
-void PMAPI PM_setRealTimeClockFrequency(
- int frequency)
-{
- /* TODO: Set the real time clock interrupt frequency. Used for stereo */
- /* LC shutter glasses when doing software stereo. Usually sets */
- /* the frequency to around 2048 Hz. */
-}
-
-/****************************************************************************
-REMARKS:
-Restore the original real time clock handler.
-****************************************************************************/
-void PMAPI PM_restoreRealTimeClockHandler(void)
-{
- /* TODO: Restores the real time clock handler. */
-}
-
-/****************************************************************************
-REMARKS:
-Return the current operating system path or working directory.
-****************************************************************************/
-char * PMAPI PM_getCurrentPath(
- char *path,
- int maxLen)
-{
- return getcwd(path,maxLen);
-}
-
-/****************************************************************************
-REMARKS:
-Return the drive letter for the boot drive.
-****************************************************************************/
-char PMAPI PM_getBootDrive(void)
-{
- /* TODO: Return the boot drive letter for the OS. Normally this is 'c' */
- /* for DOS based OS'es and '/' for Unices. */
- return '/';
-}
-
-/****************************************************************************
-REMARKS:
-Return the path to the VBE/AF driver files (legacy and not used).
-****************************************************************************/
-const char * PMAPI PM_getVBEAFPath(void)
-{
- return PM_getNucleusConfigPath();
-}
-
-/****************************************************************************
-REMARKS:
-Return the path to the Nucleus driver files.
-****************************************************************************/
-const char * PMAPI PM_getNucleusPath(void)
-{
- /* TODO: Change this to the default path to Nucleus driver files. The */
- /* following is the default for Unices. */
- char *env = getenv("NUCLEUS_PATH");
- return env ? env : "/usr/lib/nucleus";
-}
-
-/****************************************************************************
-REMARKS:
-Return the path to the Nucleus configuration files.
-****************************************************************************/
-const char * PMAPI PM_getNucleusConfigPath(void)
-{
- static char path[256];
- strcpy(path,PM_getNucleusPath());
- PM_backslash(path);
- strcat(path,"config");
- return path;
-}
-
-/****************************************************************************
-REMARKS:
-Return a unique identifier for the machine if possible.
-****************************************************************************/
-const char * PMAPI PM_getUniqueID(void)
-{
- /* TODO: Return a unique ID for the machine. If a unique ID is not */
- /* available, return the machine name. */
- static char buf[128];
- gethostname(buf, 128);
- return buf;
-}
-
-/****************************************************************************
-REMARKS:
-Get the name of the machine on the network.
-****************************************************************************/
-const char * PMAPI PM_getMachineName(void)
-{
- /* TODO: Return the network machine name for the machine. */
- static char buf[128];
- gethostname(buf, 128);
- return buf;
-}
-
-/****************************************************************************
-REMARKS:
-Return a pointer to the real mode BIOS data area.
-****************************************************************************/
-void * PMAPI PM_getBIOSPointer(void)
-{
- /* TODO: This returns a pointer to the real mode BIOS data area. If you */
- /* do not support BIOS access, you can simply return NULL here. */
- if (!zeroPtr)
- zeroPtr = PM_mapPhysicalAddr(0,0xFFFFF,true);
- return (void*)(zeroPtr + 0x400);
-}
-
-/****************************************************************************
-REMARKS:
-Return a pointer to 0xA0000 physical VGA graphics framebuffer.
-****************************************************************************/
-void * PMAPI PM_getA0000Pointer(void)
-{
- static void *bankPtr;
- if (!bankPtr)
- bankPtr = PM_mapPhysicalAddr(0xA0000,0xFFFF,true);
- return bankPtr;
-}
-
-/****************************************************************************
-REMARKS:
-Map a physical address to a linear address in the callers process.
-****************************************************************************/
-void * PMAPI PM_mapPhysicalAddr(
- ulong base,
- ulong limit,
- ibool isCached)
-{
- /* TODO: This function maps a physical memory address to a linear */
- /* address in the address space of the calling process. */
-
- /* NOTE: This function *must* be able to handle any phsyical base */
- /* address, and hence you will have to handle rounding of */
- /* the physical base address to a page boundary (ie: 4Kb on */
- /* x86 CPU's) to be able to properly map in the memory */
- /* region. */
-
- /* NOTE: If possible the isCached bit should be used to ensure that */
- /* the PCD (Page Cache Disable) and PWT (Page Write Through) */
- /* bits are set to disable caching for a memory mapping used */
- /* for MMIO register access. We also disable caching using */
- /* the MTRR registers for Pentium Pro and later chipsets so if */
- /* MTRR support is enabled for your OS then you can safely ignore */
- /* the isCached flag and always enable caching in the page */
- /* tables. */
- return NULL;
-}
-
-/****************************************************************************
-REMARKS:
-Free a physical address mapping allocated by PM_mapPhysicalAddr.
-****************************************************************************/
-void PMAPI PM_freePhysicalAddr(
- void *ptr,
- ulong limit)
-{
- /* TODO: This function will free a physical memory mapping previously */
- /* allocated with PM_mapPhysicalAddr() if at all possible. If */
- /* you can't free physical memory mappings, simply do nothing. */
-}
-
-/****************************************************************************
-REMARKS:
-Find the physical address of a linear memory address in current process.
-****************************************************************************/
-ulong PMAPI PM_getPhysicalAddr(void *p)
-{
- /* TODO: This function should find the physical address of a linear */
- /* address. */
- return 0xFFFFFFFFUL;
-}
-
-void PMAPI PM_sleep(ulong milliseconds)
-{
- /* TODO: Put the process to sleep for milliseconds */
-}
-
-int PMAPI PM_getCOMPort(int port)
-{
- /* TODO: Re-code this to determine real values using the Plug and Play */
- /* manager for the OS. */
- switch (port) {
- case 0: return 0x3F8;
- case 1: return 0x2F8;
- }
- return 0;
-}
-
-int PMAPI PM_getLPTPort(int port)
-{
- /* TODO: Re-code this to determine real values using the Plug and Play */
- /* manager for the OS. */
- switch (port) {
- case 0: return 0x3BC;
- case 1: return 0x378;
- case 2: return 0x278;
- }
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-Allocate a block of (unnamed) shared memory.
-****************************************************************************/
-void * PMAPI PM_mallocShared(
- long size)
-{
- /* TODO: This is used to allocate memory that is shared between process */
- /* that all access the common Nucleus drivers via a common display */
- /* driver DLL. If your OS does not support shared memory (or if */
- /* the display driver does not need to allocate shared memory */
- /* for each process address space), this should just call PM_malloc. */
- return PM_malloc(size);
-}
-
-/****************************************************************************
-REMARKS:
-Free a block of shared memory.
-****************************************************************************/
-void PMAPI PM_freeShared(
- void *ptr)
-{
- /* TODO: Free the shared memory block. This will be called in the context */
- /* of the original calling process that allocated the shared */
- /* memory with PM_mallocShared. Simply call PM_free if you do not */
- /* need this. */
- PM_free(ptr);
-}
-
-/****************************************************************************
-REMARKS:
-Map a linear memory address to the calling process address space. The
-address will have been allocated in another process using the
-PM_mapPhysicalAddr function.
-****************************************************************************/
-void * PMAPI PM_mapToProcess(
- void *base,
- ulong limit)
-{
- /* TODO: This function is used to map a physical memory mapping */
- /* previously allocated with PM_mapPhysicalAddr into the */
- /* address space of the calling process. If the memory mapping */
- /* allocated by PM_mapPhysicalAddr is global to all processes, */
- /* simply return the pointer. */
-
- /* NOTE: This function must also handle rounding to page boundaries, */
- /* since this function is used to map in shared memory buffers */
- /* allocated with PM_mapPhysicalAddr(). Hence if you aligned */
- /* the physical address above, then you also need to do it here. */
- return base;
-}
-
-/****************************************************************************
-REMARKS:
-Map a real mode pointer to a protected mode pointer.
-****************************************************************************/
-void * PMAPI PM_mapRealPointer(
- uint r_seg,
- uint r_off)
-{
- /* TODO: This function maps a real mode memory pointer into the */
- /* calling processes address space as a 32-bit near pointer. If */
- /* you do not support BIOS access, simply return NULL here. */
- if (!zeroPtr)
- zeroPtr = PM_mapPhysicalAddr(0,0xFFFFF);
- return (void*)(zeroPtr + MK_PHYS(r_seg,r_off));
-}
-
-/****************************************************************************
-REMARKS:
-Allocate a block of real mode memory
-****************************************************************************/
-void * PMAPI PM_allocRealSeg(
- uint size,
- uint *r_seg,
- uint *r_off)
-{
- /* TODO: This function allocates a block of real mode memory for the */
- /* calling process used to communicate with real mode BIOS */
- /* functions. If you do not support BIOS access, simply return */
- /* NULL here. */
- return NULL;
-}
-
-/****************************************************************************
-REMARKS:
-Free a block of real mode memory.
-****************************************************************************/
-void PMAPI PM_freeRealSeg(
- void *mem)
-{
- /* TODO: Frees a previously allocated real mode memory block. If you */
- /* do not support BIOS access, this function should be empty. */
-}
-
-/****************************************************************************
-REMARKS:
-Issue a real mode interrupt (parameters in DPMI compatible structure)
-****************************************************************************/
-void PMAPI DPMI_int86(
- int intno,
- DPMI_regs *regs)
-{
- /* TODO: This function calls the real mode BIOS using the passed in */
- /* register structure. If you do not support real mode BIOS */
- /* access, this function should be empty. */
-}
-
-/****************************************************************************
-REMARKS:
-Issue a real mode interrupt.
-****************************************************************************/
-int PMAPI PM_int86(
- int intno,
- RMREGS *in,
- RMREGS *out)
-{
- /* TODO: This function calls the real mode BIOS using the passed in */
- /* register structure. If you do not support real mode BIOS */
- /* access, this function should return 0. */
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-Issue a real mode interrupt.
-****************************************************************************/
-int PMAPI PM_int86x(
- int intno,
- RMREGS *in,
- RMREGS *out,
- RMSREGS *sregs)
-{
- /* TODO: This function calls the real mode BIOS using the passed in */
- /* register structure. If you do not support real mode BIOS */
- /* access, this function should return 0. */
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-Call a real mode far function.
-****************************************************************************/
-void PMAPI PM_callRealMode(
- uint seg,
- uint off,
- RMREGS *in,
- RMSREGS *sregs)
-{
- /* TODO: This function calls a real mode far function with a far call. */
- /* If you do not support BIOS access, this function should be */
- /* empty. */
-}
-
-/****************************************************************************
-REMARKS:
-Return the amount of available memory.
-****************************************************************************/
-void PMAPI PM_availableMemory(
- ulong *physical,
- ulong *total)
-{
- /* TODO: Report the amount of available memory, both the amount of */
- /* physical memory left and the amount of virtual memory left. */
- /* If the OS does not provide these services, report 0's. */
- *physical = *total = 0;
-}
-
-/****************************************************************************
-REMARKS:
-Allocate a block of locked, physical memory for DMA operations.
-****************************************************************************/
-void * PMAPI PM_allocLockedMem(
- uint size,
- ulong *physAddr,
- ibool contiguous,
- ibool below16M)
-{
- /* TODO: Allocate a block of locked, physical memory of the specified */
- /* size. This is used for bus master operations. If this is not */
- /* supported by the OS, return NULL and bus mastering will not */
- /* be used. */
- return NULL;
-}
-
-/****************************************************************************
-REMARKS:
-Free a block of locked physical memory.
-****************************************************************************/
-void PMAPI PM_freeLockedMem(
- void *p,
- uint size,
- ibool contiguous)
-{
- /* TODO: Free a memory block allocated with PM_allocLockedMem. */
-}
-
-/****************************************************************************
-REMARKS:
-Call the VBE/Core software interrupt to change display banks.
-****************************************************************************/
-void PMAPI PM_setBankA(
- int bank)
-{
- RMREGS regs;
-
- /* TODO: This does a bank switch function by calling the real mode */
- /* VESA BIOS. If you do not support BIOS access, this function should */
- /* be empty. */
- regs.x.ax = 0x4F05;
- regs.x.bx = 0x0000;
- regs.x.dx = bank;
- PM_int86(0x10,&regs,&regs);
-}
-
-/****************************************************************************
-REMARKS:
-Call the VBE/Core software interrupt to change display banks.
-****************************************************************************/
-void PMAPI PM_setBankAB(
- int bank)
-{
- RMREGS regs;
-
- /* TODO: This does a bank switch function by calling the real mode */
- /* VESA BIOS. If you do not support BIOS access, this function should */
- /* be empty. */
- regs.x.ax = 0x4F05;
- regs.x.bx = 0x0000;
- regs.x.dx = bank;
- PM_int86(0x10,&regs,&regs);
- regs.x.ax = 0x4F05;
- regs.x.bx = 0x0001;
- regs.x.dx = bank;
- PM_int86(0x10,&regs,&regs);
-}
-
-/****************************************************************************
-REMARKS:
-Call the VBE/Core software interrupt to change display start address.
-****************************************************************************/
-void PMAPI PM_setCRTStart(
- int x,
- int y,
- int waitVRT)
-{
- RMREGS regs;
-
- /* TODO: This changes the display start address by calling the real mode */
- /* VESA BIOS. If you do not support BIOS access, this function */
- /* should be empty. */
- regs.x.ax = 0x4F07;
- regs.x.bx = waitVRT;
- regs.x.cx = x;
- regs.x.dx = y;
- PM_int86(0x10,&regs,&regs);
-}
-
-/****************************************************************************
-REMARKS:
-Enable write combining for the memory region.
-****************************************************************************/
-ibool PMAPI PM_enableWriteCombine(
- ulong base,
- ulong length,
- uint type)
-{
- /* TODO: This function should enable Pentium Pro and Pentium II MTRR */
- /* write combining for the passed in physical memory base address */
- /* and length. Normally this is done via calls to an OS specific */
- /* device driver as this can only be done at ring 0. */
- /* */
- /* NOTE: This is a *very* important function to implement! If you do */
- /* not implement, graphics performance on the latest Intel chips */
- /* will be severly impaired. For sample code that can be used */
- /* directly in a ring 0 device driver, see the MSDOS implementation */
- /* which includes assembler code to do this directly (if the */
- /* program is running at ring 0). */
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Execute the POST on the secondary BIOS for a controller.
-****************************************************************************/
-ibool PMAPI PM_doBIOSPOST(
- ushort axVal,
- ulong BIOSPhysAddr,
- void *mappedBIOS)
-{
- /* TODO: This function is used to run the BIOS POST code on a secondary */
- /* controller to initialise it for use. This is not necessary */
- /* for multi-controller operation, but it will make it a lot */
- /* more convenicent for end users (otherwise they have to boot */
- /* the system once with the secondary controller as primary, and */
- /* then boot with both controllers installed). */
- /* */
- /* Even if you don't support full BIOS access, it would be */
- /* adviseable to be able to POST the secondary controllers in the */
- /* system using this function as a minimum requirement. Some */
- /* graphics hardware has registers that contain values that only */
- /* the BIOS knows about, which makes bring up a card from cold */
- /* reset difficult if the BIOS has not POST'ed it. */
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Load an OS specific shared library or DLL. If the OS does not support
-shared libraries, simply return NULL.
-****************************************************************************/
-PM_MODULE PMAPI PM_loadLibrary(
- const char *szDLLName)
-{
- /* TODO: This function should load a native shared library from disk */
- /* given the path to the library. */
- (void)szDLLName;
- return NULL;
-}
-
-/****************************************************************************
-REMARKS:
-Get the address of a named procedure from a shared library.
-****************************************************************************/
-void * PMAPI PM_getProcAddress(
- PM_MODULE hModule,
- const char *szProcName)
-{
- /* TODO: This function should return the address of a named procedure */
- /* from a native shared library. */
- (void)hModule;
- (void)szProcName;
- return NULL;
-}
-
-/****************************************************************************
-REMARKS:
-Unload a shared library.
-****************************************************************************/
-void PMAPI PM_freeLibrary(
- PM_MODULE hModule)
-{
- /* TODO: This function free a previously loaded native shared library. */
- (void)hModule;
-}
-
-/****************************************************************************
-REMARKS:
-Enable requested I/O privledge level (usually only to set to a value of
-3, and then restore it back again). If the OS is protected this function
-must be implemented in order to enable I/O port access for ring 3
-applications. The function should return the IOPL level active before
-the switch occurred so it can be properly restored.
-****************************************************************************/
-int PMAPI PM_setIOPL(
- int level)
-{
- /* TODO: This function should enable IOPL for the task (if IOPL is */
- /* not always enabled for the app through some other means). */
- return level;
-}
-
-/****************************************************************************
-REMARKS:
-Function to find the first file matching a search criteria in a directory.
-****************************************************************************/
-void *PMAPI PM_findFirstFile(
- const char *filename,
- PM_findData *findData)
-{
- /* TODO: This function should start a directory enumeration search */
- /* given the filename (with wildcards). The data should be */
- /* converted and returned in the findData standard form. */
- (void)filename;
- (void)findData;
- return PM_FILE_INVALID;
-}
-
-/****************************************************************************
-REMARKS:
-Function to find the next file matching a search criteria in a directory.
-****************************************************************************/
-ibool PMAPI PM_findNextFile(
- void *handle,
- PM_findData *findData)
-{
- /* TODO: This function should find the next file in directory enumeration */
- /* search given the search criteria defined in the call to */
- /* PM_findFirstFile. The data should be converted and returned */
- /* in the findData standard form. */
- (void)handle;
- (void)findData;
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Function to close the find process
-****************************************************************************/
-void PMAPI PM_findClose(
- void *handle)
-{
- /* TODO: This function should close the find process. This may do */
- /* nothing for some OS'es. */
- (void)handle;
-}
-
-/****************************************************************************
-REMARKS:
-Function to determine if a drive is a valid drive or not. Under Unix this
-function will return false for anything except a value of 3 (considered
-the root drive, and equivalent to C: for non-Unix systems). The drive
-numbering is:
-
- 1 - Drive A:
- 2 - Drive B:
- 3 - Drive C:
- etc
-
-****************************************************************************/
-ibool PMAPI PM_driveValid(
- char drive)
-{
- if (drive == 3)
- return true;
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Function to get the current working directory for the specififed drive.
-Under Unix this will always return the current working directory regardless
-of what the value of 'drive' is.
-****************************************************************************/
-void PMAPI PM_getdcwd(
- int drive,
- char *dir,
- int len)
-{
- (void)drive;
- getcwd(dir,len);
-}
-
-/****************************************************************************
-REMARKS:
-Function to change the file attributes for a specific file.
-****************************************************************************/
-void PMAPI PM_setFileAttr(
- const char *filename,
- uint attrib)
-{
- /* TODO: Set the file attributes for a file */
- (void)filename;
- (void)attrib;
-}
-
-/****************************************************************************
-REMARKS:
-Function to create a directory.
-****************************************************************************/
-ibool PMAPI PM_mkdir(
- const char *filename)
-{
- return mkdir(filename) == 0;
-}
-
-/****************************************************************************
-REMARKS:
-Function to remove a directory.
-****************************************************************************/
-ibool PMAPI PM_rmdir(
- const char *filename)
-{
- return rmdir(filename) == 0;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/stub/vflat.c b/board/MAI/bios_emulator/scitech/src/pm/stub/vflat.c
deleted file mode 100644
index 579ef2c95c..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/stub/vflat.c
+++ /dev/null
@@ -1,49 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-*
-* Description: Dummy module; no virtual framebuffer for this OS
-*
-****************************************************************************/
-
-#include "pmapi.h"
-
-ibool PMAPI VF_available(void)
-{
- return false;
-}
-
-void * PMAPI VF_init(ulong baseAddr,int bankSize,int codeLen,void *bankFunc)
-{
- baseAddr = baseAddr;
- bankSize = bankSize;
- codeLen = codeLen;
- bankFunc = bankFunc;
- return NULL;
-}
-
-void PMAPI VF_exit(void)
-{
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/stub/ztimer.c b/board/MAI/bios_emulator/scitech/src/pm/stub/ztimer.c
deleted file mode 100644
index 820e292390..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/stub/ztimer.c
+++ /dev/null
@@ -1,111 +0,0 @@
-/****************************************************************************
-*
-* Ultra Long Period Timer
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: *** TODO: ADD YOUR OS ENVIRONMENT NAME HERE ***
-*
-* Description: OS specific implementation for the Zen Timer functions.
-*
-****************************************************************************/
-
-/*----------------------------- Implementation ----------------------------*/
-
-/****************************************************************************
-REMARKS:
-Initialise the Zen Timer module internals.
-****************************************************************************/
-void __ZTimerInit(void)
-{
- /* TODO: Do any specific internal initialisation in here */
-}
-
-/****************************************************************************
-REMARKS:
-Start the Zen Timer counting.
-****************************************************************************/
-static void __LZTimerOn(
- LZTimerObject *tm)
-{
- /* TODO: Start the Zen Timer counting. This should be a macro if */
- /* possible. */
-}
-
-/****************************************************************************
-REMARKS:
-Compute the lap time since the timer was started.
-****************************************************************************/
-static ulong __LZTimerLap(
- LZTimerObject *tm)
-{
- /* TODO: Compute the lap time between the current time and when the */
- /* timer was started. */
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-Stop the Zen Timer counting.
-****************************************************************************/
-static void __LZTimerOff(
- LZTimerObject *tm)
-{
- /* TODO: Stop the timer counting. Should be a macro if possible. */
-}
-
-/****************************************************************************
-REMARKS:
-Compute the elapsed time in microseconds between start and end timings.
-****************************************************************************/
-static ulong __LZTimerCount(
- LZTimerObject *tm)
-{
- /* TODO: Compute the elapsed time and return it. Always microseconds. */
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-Define the resolution of the long period timer as microseconds per timer tick.
-****************************************************************************/
-#define ULZTIMER_RESOLUTION 1
-
-/****************************************************************************
-REMARKS:
-Read the Long Period timer from the OS
-****************************************************************************/
-static ulong __ULZReadTime(void)
-{
- /* TODO: Read the long period timer from the OS. The resolution of this */
- /* timer should be around 1/20 of a second for timing long */
- /* periods if possible. */
-}
-
-/****************************************************************************
-REMARKS:
-Compute the elapsed time from the BIOS timer tick. Note that we check to see
-whether a midnight boundary has passed, and if so adjust the finish time to
-account for this. We cannot detect if more that one midnight boundary has
-passed, so if this happens we will be generating erronous results.
-****************************************************************************/
-ulong __ULZElapsedTime(ulong start,ulong finish)
-{ return finish - start; }
diff --git a/board/MAI/bios_emulator/scitech/src/pm/tests/altbrk.c b/board/MAI/bios_emulator/scitech/src/pm/tests/altbrk.c
deleted file mode 100644
index ba90262745..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/tests/altbrk.c
+++ /dev/null
@@ -1,90 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-*
-* Language: ANSI C
-* Environment: any
-*
-* Description: Test program to check the ability to install a C based
-* control C/break interrupt handler. Note that this
-* alternate version does not work with all extenders.
-*
-* Functions tested: PM_installAltBreakHandler()
-* PM_restoreBreakHandler()
-*
-*
-****************************************************************************/
-
-#include <stdlib.h>
-#include <stdio.h>
-#include "pmapi.h"
-
-volatile int breakHit = false;
-volatile int ctrlCHit = false;
-
-#pragma off (check_stack) /* No stack checking under Watcom */
-
-void PMAPI breakHandler(uint bHit)
-{
- if (bHit)
- breakHit = true;
- else
- ctrlCHit = true;
-}
-
-int main(void)
-{
- printf("Program running in ");
- switch (PM_getModeType()) {
- case PM_realMode:
- printf("real mode.\n\n");
- break;
- case PM_286:
- printf("16 bit protected mode.\n\n");
- break;
- case PM_386:
- printf("32 bit protected mode.\n\n");
- break;
- }
-
- PM_installAltBreakHandler(breakHandler);
- printf("Control C/Break interrupt handler installed\n");
- while (1) {
- if (ctrlCHit) {
- printf("Code termimated with Ctrl-C.\n");
- break;
- }
- if (breakHit) {
- printf("Code termimated with Ctrl-Break.\n");
- break;
- }
- if (PM_kbhit() && PM_getch() == 0x1B) {
- printf("No break code detected!\n");
- break;
- }
- printf("Hit Ctrl-C or Ctrl-Break to exit!\n");
- }
-
- PM_restoreBreakHandler();
- return 0;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/tests/altcrit.c b/board/MAI/bios_emulator/scitech/src/pm/tests/altcrit.c
deleted file mode 100644
index e13730758e..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/tests/altcrit.c
+++ /dev/null
@@ -1,85 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-*
-* Language: ANSI C
-* Environment: any
-*
-* Description: Test program to check the ability to install a C based
-* critical error handler.
-*
-* Functions tested: PM_installCriticalHandler()
-* PM_criticalError()
-* PM_restoreCriticalHandler()
-*
-*
-****************************************************************************/
-
-#include <stdlib.h>
-#include <stdio.h>
-#include "pmapi.h"
-
-volatile uint criticalError = false;
-volatile uint axValue;
-volatile uint diValue;
-
-#pragma off (check_stack) /* No stack checking under Watcom */
-
-uint PMAPI criticalHandler(uint axVal,uint diVal)
-{
- criticalError = true;
- axValue = axVal;
- diValue = diVal;
- return 3; /* Tell MS-DOS to fail the operation */
-}
-
-int main(void)
-{
- FILE *f;
-
- printf("Program running in ");
- switch (PM_getModeType()) {
- case PM_realMode:
- printf("real mode.\n\n");
- break;
- case PM_286:
- printf("16 bit protected mode.\n\n");
- break;
- case PM_386:
- printf("32 bit protected mode.\n\n");
- break;
- }
-
- PM_installAltCriticalHandler(criticalHandler);
- printf("Critical Error handler installed - trying to read from A: drive...\n");
- f = fopen("a:\bog.bog","rb");
- if (f) fclose(f);
- if (criticalError) {
- printf("Critical error occured on INT 21h function %02X!\n",
- axValue >> 8);
- }
- else
- printf("Critical error was not caught!\n");
- PM_restoreCriticalHandler();
- return 0;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/tests/biosptr.c b/board/MAI/bios_emulator/scitech/src/pm/tests/biosptr.c
deleted file mode 100644
index 5fa3382483..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/tests/biosptr.c
+++ /dev/null
@@ -1,92 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: any
-*
-* Description: Test program to check the ability to manipulate the
-* BIOS data area from protected mode using the PM
-* library. Compile and link with the appropriate command
-* line for your DOS extender.
-*
-* Functions tested: PM_getBIOSSelector()
-* PM_getLong()
-* PM_getByte()
-* PM_getWord()
-*
-****************************************************************************/
-
-#include <stdlib.h>
-#include <stdio.h>
-#include "pmapi.h"
-
-/* Macros to obtain values from the BIOS data area */
-
-#define TICKS() PM_getLong(bios+0x6C)
-#define KB_STAT PM_getByte(bios+0x17)
-#define KB_HEAD PM_getWord(bios+0x1A)
-#define KB_TAIL PM_getWord(bios+0x1C)
-
-/* Macros for working with the keyboard buffer */
-
-#define KB_HIT() (KB_HEAD != KB_TAIL)
-#define CTRL() (KB_STAT & 4)
-#define SHIFT() (KB_STAT & 2)
-#define ESC 0x1B
-
-/* Selector for BIOS data area */
-
-uchar *bios;
-
-int main(void)
-{
- int c,done = 0;
-
- printf("Program running in ");
- switch (PM_getModeType()) {
- case PM_realMode:
- printf("real mode.\n\n");
- break;
- case PM_286:
- printf("16 bit protected mode.\n\n");
- break;
- case PM_386:
- printf("32 bit protected mode.\n\n");
- break;
- }
-
- bios = PM_getBIOSPointer();
- printf("Hit any key to test, Ctrl-Shift-Esc to quit\n");
- while (!done) {
- if (KB_HIT()) {
- c = PM_getch();
- if (c == 0) PM_getch();
- printf("TIME=%-8lX ST=%02X CHAR=%02X ", TICKS(), KB_STAT, c);
- printf("\n");
- if ((c == ESC) && SHIFT() && CTRL())/* Ctrl-Shift-Esc */
- break;
- }
- }
-
- return 0;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/tests/block.c b/board/MAI/bios_emulator/scitech/src/pm/tests/block.c
deleted file mode 100644
index 15d503c0de..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/tests/block.c
+++ /dev/null
@@ -1,69 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-*
-* Description: Test program for the PM_blockUntilTimeout function.
-*
-****************************************************************************/
-
-#include <stdio.h>
-#include "pmapi.h"
-
-#define DELAY_MSECS 1100
-#define LOOPS 5
-
-/*-------------------------- Implementation -------------------------------*/
-
-/* The following routine takes a long count in microseconds and outputs
- * a string representing the count in seconds. It could be modified to
- * return a pointer to a static string representing the count rather
- * than printing it out.
- */
-
-void ReportTime(ulong count)
-{
- ulong secs;
-
- secs = count / 1000000L;
- count = count - secs * 1000000L;
- printf("Time taken: %lu.%06lu seconds\n",secs,count);
-}
-
-int main(void)
-{
- int i;
-
- printf("Detecting processor information ...");
- fflush(stdout);
- printf("\n\n%s\n", CPU_getProcessorName());
- ZTimerInit();
- LZTimerOn();
- for (i = 0; i < LOOPS; i++) {
- PM_blockUntilTimeout(DELAY_MSECS);
- ReportTime(LZTimerLap());
- }
- LZTimerOff();
- return 0;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/tests/brk.c b/board/MAI/bios_emulator/scitech/src/pm/tests/brk.c
deleted file mode 100644
index 10b644656e..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/tests/brk.c
+++ /dev/null
@@ -1,78 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-*
-* Language: ANSI C
-* Environment: any
-*
-* Description: Test program to check the ability to install a C based
-* control C/break interrupt handler.
-*
-* Functions tested: PM_installBreakHandler()
-* PM_ctrlCHit()
-* PM_ctrlBreakHit()
-* PM_restoreBreakHandler()
-*
-*
-****************************************************************************/
-
-#include <stdlib.h>
-#include <stdio.h>
-#include "pmapi.h"
-
-int main(void)
-{
- printf("Program running in ");
- switch (PM_getModeType()) {
- case PM_realMode:
- printf("real mode.\n\n");
- break;
- case PM_286:
- printf("16 bit protected mode.\n\n");
- break;
- case PM_386:
- printf("32 bit protected mode.\n\n");
- break;
- }
-
- PM_installBreakHandler();
- printf("Control C/Break interrupt handler installed\n");
- while (1) {
- if (PM_ctrlCHit(1)) {
- printf("Code termimated with Ctrl-C.\n");
- break;
- }
- if (PM_ctrlBreakHit(1)) {
- printf("Code termimated with Ctrl-Break.\n");
- break;
- }
- if (PM_kbhit() && PM_getch() == 0x1B) {
- printf("No break code detected!\n");
- break;
- }
- printf("Hit Ctrl-C or Ctrl-Break to exit!\n");
- }
-
- PM_restoreBreakHandler();
- return 0;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/tests/callreal.c b/board/MAI/bios_emulator/scitech/src/pm/tests/callreal.c
deleted file mode 100644
index 4d37cab465..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/tests/callreal.c
+++ /dev/null
@@ -1,107 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: any
-*
-* Description: Test program to check the ability to call a real mode
-* procedure. We simply copy a terribly simple assembly
-* language routine into a real mode block that we allocate,
-* and then attempt to call the routine and verify that it
-* was successful.
-*
-* Functions tested: PM_allocRealSeg()
-* PM_freeRealSeg()
-* PM_callRealMode()
-*
-****************************************************************************/
-
-#include <stdlib.h>
-#include <stdio.h>
-#include <string.h>
-#include "pmapi.h"
-
-/* Block of real mode code we will eventually call */
-
-static unsigned char realModeCode[] = {
- 0x93, /* xchg ax,bx */
- 0x87, 0xCA, /* xchg cx,dx */
- 0xCB /* retf */
- };
-
-int main(void)
-{
- RMREGS regs;
- RMSREGS sregs;
- uchar *p;
- unsigned r_seg,r_off;
-
- printf("Program running in ");
- switch (PM_getModeType()) {
- case PM_realMode:
- printf("real mode.\n\n");
- break;
- case PM_286:
- printf("16 bit protected mode.\n\n");
- break;
- case PM_386:
- printf("32 bit protected mode.\n\n");
- break;
- }
-
- /* Allocate a the block of real mode memory */
- if ((p = PM_allocRealSeg(sizeof(realModeCode), &r_seg, &r_off)) == NULL) {
- printf("Unable to allocate real mode memory!\n");
- exit(1);
- }
-
- /* Copy the real mode code */
- memcpy(p,realModeCode,sizeof(realModeCode));
-
- /* Now call the real mode code */
- regs.x.ax = 1;
- regs.x.bx = 2;
- regs.x.cx = 3;
- regs.x.dx = 4;
- regs.x.si = 5;
- regs.x.di = 6;
- sregs.es = 7;
- sregs.ds = 8;
- PM_callRealMode(r_seg,r_off,&regs,&sregs);
- if (regs.x.ax != 2 || regs.x.bx != 1 || regs.x.cx != 4 || regs.x.dx != 3
- || regs.x.si != 5 || regs.x.di != 6 || sregs.es != 7
- || sregs.ds != 8) {
- printf("Real mode call failed!\n");
- printf("\n");
- printf("ax = %04X, bx = %04X, cx = %04X, dx = %04X\n",
- regs.x.ax,regs.x.bx,regs.x.cx,regs.x.dx);
- printf("si = %04X, di = %04X, es = %04X, ds = %04X\n",
- regs.x.si,regs.x.di,sregs.es,sregs.ds);
- }
- else
- printf("Real mode call succeeded!\n");
-
- /* Free the memory we allocated */
- PM_freeRealSeg(p);
- return 0;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/tests/checks.c b/board/MAI/bios_emulator/scitech/src/pm/tests/checks.c
deleted file mode 100644
index 5933ac9f73..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/tests/checks.c
+++ /dev/null
@@ -1,100 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-*
-* Description: Main module for building checked builds of products with
-* assertions and trace code.
-*
-****************************************************************************/
-
-#include "scitech.h"
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#ifdef __WINDOWS__
-#define WIN32_LEAN_AND_MEAN
-#define STRICT
-#include <windows.h>
-#endif
-
-#ifdef CHECKED
-
-/*---------------------------- Global variables ---------------------------*/
-
-#define LOGFILE "\\scitech.log"
-
-void (*_CHK_fail)(int fatal,const char *msg,const char *cond,const char *file,int line) = _CHK_defaultFail;
-
-/*---------------------------- Implementation -----------------------------*/
-
-/****************************************************************************
-DESCRIPTION:
-Handles fatal error and warning conditions for checked builds.
-
-HEADER:
-scitech.h
-
-REMARKS:
-This function is called whenever an inline check or warning fails in any
-of the SciTech runtime libraries. Warning conditions simply cause the
-condition to be logged to the log file and send to the system debugger
-under Window. Fatal error conditions do all of the above, and then
-terminate the program with a fatal error conditions.
-
-This handler may be overriden by the user code if necessary to replace it
-with a different handler (the MGL for instance overrides this and replaces
-it with a handler that does an MGL_exit() before terminating the application
-so that it will clean up correctly.
-****************************************************************************/
-void _CHK_defaultFail(
- int fatal,
- const char *msg,
- const char *cond,
- const char *file,
- int line)
-{
- char buf[256];
- FILE *log = fopen(LOGFILE, "at+");
-
- sprintf(buf,msg,cond,file,line);
- if (log) {
- fputs(buf,log);
- fflush(log);
- fclose(log);
-#ifdef __WINDOWS__
- OutputDebugStr(buf);
-#endif
- }
- if (fatal) {
-#ifdef __WINDOWS__
- MessageBox(NULL, buf,"Fatal Error!",MB_ICONEXCLAMATION);
-#else
- fputs(buf,stderr);
-#endif
- exit(-1);
- }
-}
-
-#endif /* CHECKED */
diff --git a/board/MAI/bios_emulator/scitech/src/pm/tests/cpu.c b/board/MAI/bios_emulator/scitech/src/pm/tests/cpu.c
deleted file mode 100644
index 30e5dd30df..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/tests/cpu.c
+++ /dev/null
@@ -1,46 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-*
-* Description: Test program for the CPU detection code.
-*
-****************************************************************************/
-
-#include "ztimer.h"
-#include "pmapi.h"
-#include <stdio.h>
-#include <stdlib.h>
-
-/*----------------------------- Implementation ----------------------------*/
-
-int main(void)
-{
- printf("Detecting processor information ...");
- fflush(stdout);
- printf("\n\n%s\n", CPU_getProcessorName());
- if (CPU_haveRDTSC())
- printf("\nProcessor supports Read Time Stamp Counter performance timer.\n");
- return 0;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/tests/critical.c b/board/MAI/bios_emulator/scitech/src/pm/tests/critical.c
deleted file mode 100644
index 60f1251a5d..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/tests/critical.c
+++ /dev/null
@@ -1,70 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-*
-* Language: ANSI C
-* Environment: any
-*
-* Description: Test program to check the ability to install a C based
-* critical error handler.
-*
-* Functions tested: PM_installAltCriticalHandler()
-* PM_restoreCriticalHandler()
-*
-*
-****************************************************************************/
-
-#include <stdlib.h>
-#include <stdio.h>
-#include "pmapi.h"
-
-int main(void)
-{
- FILE *f;
- int axcode,dicode;
-
- printf("Program running in ");
- switch (PM_getModeType()) {
- case PM_realMode:
- printf("real mode.\n\n");
- break;
- case PM_286:
- printf("16 bit protected mode.\n\n");
- break;
- case PM_386:
- printf("32 bit protected mode.\n\n");
- break;
- }
-
- PM_installCriticalHandler();
- printf("Critical Error handler installed - trying to read from A: drive...\n");
- f = fopen("a:\bog.bog","rb");
- if (f) fclose(f);
- if (PM_criticalError(&axcode,&dicode,1)) {
- printf("Critical error occured on INT 21h function %02X!\n",
- axcode >> 8);
- }
- else printf("Critical error was not caught!\n");
- PM_restoreCriticalHandler();
- return 0;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/tests/getch.c b/board/MAI/bios_emulator/scitech/src/pm/tests/getch.c
deleted file mode 100644
index 06c2180ceb..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/tests/getch.c
+++ /dev/null
@@ -1,501 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-*
-* Description: Test program to test out the cross platform event handling
-* library.
-*
-****************************************************************************/
-
-#include <stdlib.h>
-#include <stdio.h>
-#include <ctype.h>
-#include "pmapi.h"
-#include "event.h"
-
-/* Translation table for key codes */
-
-typedef struct {
- int code;
- char *name;
- } KeyEntry;
-
-KeyEntry ASCIICodes[] = {
- {ASCII_ctrlA ,"ASCII_ctrlA"},
- {ASCII_ctrlB ,"ASCII_ctrlB"},
- {ASCII_ctrlC ,"ASCII_ctrlC"},
- {ASCII_ctrlD ,"ASCII_ctrlD"},
- {ASCII_ctrlE ,"ASCII_ctrlE"},
- {ASCII_ctrlF ,"ASCII_ctrlF"},
- {ASCII_ctrlG ,"ASCII_ctrlG"},
- {ASCII_backspace ,"ASCII_backspace"},
- {ASCII_ctrlH ,"ASCII_ctrlH"},
- {ASCII_tab ,"ASCII_tab"},
- {ASCII_ctrlI ,"ASCII_ctrlI"},
- {ASCII_ctrlJ ,"ASCII_ctrlJ"},
- {ASCII_ctrlK ,"ASCII_ctrlK"},
- {ASCII_ctrlL ,"ASCII_ctrlL"},
- {ASCII_enter ,"ASCII_enter"},
- {ASCII_ctrlM ,"ASCII_ctrlM"},
- {ASCII_ctrlN ,"ASCII_ctrlN"},
- {ASCII_ctrlO ,"ASCII_ctrlO"},
- {ASCII_ctrlP ,"ASCII_ctrlP"},
- {ASCII_ctrlQ ,"ASCII_ctrlQ"},
- {ASCII_ctrlR ,"ASCII_ctrlR"},
- {ASCII_ctrlS ,"ASCII_ctrlS"},
- {ASCII_ctrlT ,"ASCII_ctrlT"},
- {ASCII_ctrlU ,"ASCII_ctrlU"},
- {ASCII_ctrlV ,"ASCII_ctrlV"},
- {ASCII_ctrlW ,"ASCII_ctrlW"},
- {ASCII_ctrlX ,"ASCII_ctrlX"},
- {ASCII_ctrlY ,"ASCII_ctrlY"},
- {ASCII_ctrlZ ,"ASCII_ctrlZ"},
- {ASCII_esc ,"ASCII_esc"},
- {ASCII_space ,"ASCII_space"},
- {ASCII_exclamation ,"ASCII_exclamation"},
- {ASCII_quote ,"ASCII_quote"},
- {ASCII_pound ,"ASCII_pound"},
- {ASCII_dollar ,"ASCII_dollar"},
- {ASCII_percent ,"ASCII_percent"},
- {ASCII_ampersand ,"ASCII_ampersand"},
- {ASCII_apostrophe ,"ASCII_apostrophe"},
- {ASCII_leftBrace ,"ASCII_leftBrace"},
- {ASCII_rightBrace ,"ASCII_rightBrace"},
- {ASCII_times ,"ASCII_times"},
- {ASCII_plus ,"ASCII_plus"},
- {ASCII_comma ,"ASCII_comma"},
- {ASCII_minus ,"ASCII_minus"},
- {ASCII_period ,"ASCII_period"},
- {ASCII_divide ,"ASCII_divide"},
- {ASCII_0 ,"ASCII_0"},
- {ASCII_1 ,"ASCII_1"},
- {ASCII_2 ,"ASCII_2"},
- {ASCII_3 ,"ASCII_3"},
- {ASCII_4 ,"ASCII_4"},
- {ASCII_5 ,"ASCII_5"},
- {ASCII_6 ,"ASCII_6"},
- {ASCII_7 ,"ASCII_7"},
- {ASCII_8 ,"ASCII_8"},
- {ASCII_9 ,"ASCII_9"},
- {ASCII_colon ,"ASCII_colon"},
- {ASCII_semicolon ,"ASCII_semicolon"},
- {ASCII_lessThan ,"ASCII_lessThan"},
- {ASCII_equals ,"ASCII_equals"},
- {ASCII_greaterThan ,"ASCII_greaterThan"},
- {ASCII_question ,"ASCII_question"},
- {ASCII_at ,"ASCII_at"},
- {ASCII_A ,"ASCII_A"},
- {ASCII_B ,"ASCII_B"},
- {ASCII_C ,"ASCII_C"},
- {ASCII_D ,"ASCII_D"},
- {ASCII_E ,"ASCII_E"},
- {ASCII_F ,"ASCII_F"},
- {ASCII_G ,"ASCII_G"},
- {ASCII_H ,"ASCII_H"},
- {ASCII_I ,"ASCII_I"},
- {ASCII_J ,"ASCII_J"},
- {ASCII_K ,"ASCII_K"},
- {ASCII_L ,"ASCII_L"},
- {ASCII_M ,"ASCII_M"},
- {ASCII_N ,"ASCII_N"},
- {ASCII_O ,"ASCII_O"},
- {ASCII_P ,"ASCII_P"},
- {ASCII_Q ,"ASCII_Q"},
- {ASCII_R ,"ASCII_R"},
- {ASCII_S ,"ASCII_S"},
- {ASCII_T ,"ASCII_T"},
- {ASCII_U ,"ASCII_U"},
- {ASCII_V ,"ASCII_V"},
- {ASCII_W ,"ASCII_W"},
- {ASCII_X ,"ASCII_X"},
- {ASCII_Y ,"ASCII_Y"},
- {ASCII_Z ,"ASCII_Z"},
- {ASCII_leftSquareBrace ,"ASCII_leftSquareBrace"},
- {ASCII_backSlash ,"ASCII_backSlash"},
- {ASCII_rightSquareBrace ,"ASCII_rightSquareBrace"},
- {ASCII_caret ,"ASCII_caret"},
- {ASCII_underscore ,"ASCII_underscore"},
- {ASCII_leftApostrophe ,"ASCII_leftApostrophe"},
- {ASCII_a ,"ASCII_a"},
- {ASCII_b ,"ASCII_b"},
- {ASCII_c ,"ASCII_c"},
- {ASCII_d ,"ASCII_d"},
- {ASCII_e ,"ASCII_e"},
- {ASCII_f ,"ASCII_f"},
- {ASCII_g ,"ASCII_g"},
- {ASCII_h ,"ASCII_h"},
- {ASCII_i ,"ASCII_i"},
- {ASCII_j ,"ASCII_j"},
- {ASCII_k ,"ASCII_k"},
- {ASCII_l ,"ASCII_l"},
- {ASCII_m ,"ASCII_m"},
- {ASCII_n ,"ASCII_n"},
- {ASCII_o ,"ASCII_o"},
- {ASCII_p ,"ASCII_p"},
- {ASCII_q ,"ASCII_q"},
- {ASCII_r ,"ASCII_r"},
- {ASCII_s ,"ASCII_s"},
- {ASCII_t ,"ASCII_t"},
- {ASCII_u ,"ASCII_u"},
- {ASCII_v ,"ASCII_v"},
- {ASCII_w ,"ASCII_w"},
- {ASCII_x ,"ASCII_x"},
- {ASCII_y ,"ASCII_y"},
- {ASCII_z ,"ASCII_z"},
- {ASCII_leftCurlyBrace ,"ASCII_leftCurlyBrace"},
- {ASCII_verticalBar ,"ASCII_verticalBar"},
- {ASCII_rightCurlyBrace ,"ASCII_rightCurlyBrace"},
- {ASCII_tilde ,"ASCII_tilde"},
- {0 ,"ASCII_unknown"},
- };
-
-KeyEntry ScanCodes[] = {
- {KB_padEnter ,"KB_padEnter"},
- {KB_padMinus ,"KB_padMinus"},
- {KB_padPlus ,"KB_padPlus"},
- {KB_padTimes ,"KB_padTimes"},
- {KB_padDivide ,"KB_padDivide"},
- {KB_padLeft ,"KB_padLeft"},
- {KB_padRight ,"KB_padRight"},
- {KB_padUp ,"KB_padUp"},
- {KB_padDown ,"KB_padDown"},
- {KB_padInsert ,"KB_padInsert"},
- {KB_padDelete ,"KB_padDelete"},
- {KB_padHome ,"KB_padHome"},
- {KB_padEnd ,"KB_padEnd"},
- {KB_padPageUp ,"KB_padPageUp"},
- {KB_padPageDown ,"KB_padPageDown"},
- {KB_padCenter ,"KB_padCenter"},
- {KB_F1 ,"KB_F1"},
- {KB_F2 ,"KB_F2"},
- {KB_F3 ,"KB_F3"},
- {KB_F4 ,"KB_F4"},
- {KB_F5 ,"KB_F5"},
- {KB_F6 ,"KB_F6"},
- {KB_F7 ,"KB_F7"},
- {KB_F8 ,"KB_F8"},
- {KB_F9 ,"KB_F9"},
- {KB_F10 ,"KB_F10"},
- {KB_F11 ,"KB_F11"},
- {KB_F12 ,"KB_F12"},
- {KB_left ,"KB_left"},
- {KB_right ,"KB_right"},
- {KB_up ,"KB_up"},
- {KB_down ,"KB_down"},
- {KB_insert ,"KB_insert"},
- {KB_delete ,"KB_delete"},
- {KB_home ,"KB_home"},
- {KB_end ,"KB_end"},
- {KB_pageUp ,"KB_pageUp"},
- {KB_pageDown ,"KB_pageDown"},
- {KB_capsLock ,"KB_capsLock"},
- {KB_numLock ,"KB_numLock"},
- {KB_scrollLock ,"KB_scrollLock"},
- {KB_leftShift ,"KB_leftShift"},
- {KB_rightShift ,"KB_rightShift"},
- {KB_leftCtrl ,"KB_leftCtrl"},
- {KB_rightCtrl ,"KB_rightCtrl"},
- {KB_leftAlt ,"KB_leftAlt"},
- {KB_rightAlt ,"KB_rightAlt"},
- {KB_leftWindows ,"KB_leftWindows"},
- {KB_rightWindows ,"KB_rightWindows"},
- {KB_menu ,"KB_menu"},
- {KB_sysReq ,"KB_sysReq"},
- {KB_esc ,"KB_esc"},
- {KB_1 ,"KB_1"},
- {KB_2 ,"KB_2"},
- {KB_3 ,"KB_3"},
- {KB_4 ,"KB_4"},
- {KB_5 ,"KB_5"},
- {KB_6 ,"KB_6"},
- {KB_7 ,"KB_7"},
- {KB_8 ,"KB_8"},
- {KB_9 ,"KB_9"},
- {KB_0 ,"KB_0"},
- {KB_minus ,"KB_minus"},
- {KB_equals ,"KB_equals"},
- {KB_backSlash ,"KB_backSlash"},
- {KB_backspace ,"KB_backspace"},
- {KB_tab ,"KB_tab"},
- {KB_Q ,"KB_Q"},
- {KB_W ,"KB_W"},
- {KB_E ,"KB_E"},
- {KB_R ,"KB_R"},
- {KB_T ,"KB_T"},
- {KB_Y ,"KB_Y"},
- {KB_U ,"KB_U"},
- {KB_I ,"KB_I"},
- {KB_O ,"KB_O"},
- {KB_P ,"KB_P"},
- {KB_leftSquareBrace ,"KB_leftSquareBrace"},
- {KB_rightSquareBrace ,"KB_rightSquareBrace"},
- {KB_enter ,"KB_enter"},
- {KB_A ,"KB_A"},
- {KB_S ,"KB_S"},
- {KB_D ,"KB_D"},
- {KB_F ,"KB_F"},
- {KB_G ,"KB_G"},
- {KB_H ,"KB_H"},
- {KB_J ,"KB_J"},
- {KB_K ,"KB_K"},
- {KB_L ,"KB_L"},
- {KB_semicolon ,"KB_semicolon"},
- {KB_apostrophe ,"KB_apostrophe"},
- {KB_Z ,"KB_Z"},
- {KB_X ,"KB_X"},
- {KB_C ,"KB_C"},
- {KB_V ,"KB_V"},
- {KB_B ,"KB_B"},
- {KB_N ,"KB_N"},
- {KB_M ,"KB_M"},
- {KB_comma ,"KB_comma"},
- {KB_period ,"KB_period"},
- {KB_divide ,"KB_divide"},
- {KB_space ,"KB_space"},
- {KB_tilde ,"KB_tilde"},
- {0 ,"KB_unknown"},
- };
-
-/****************************************************************************
-PARAMETERS:
-x - X coordinate of the mouse cursor position (screen coordinates)
-y - Y coordinate of the mouse cursor position (screen coordinates)
-
-REMARKS:
-This gets called periodically to move the mouse. It will get called when
-the mouse may not have actually moved, so check if it has before redrawing
-it.
-****************************************************************************/
-void EVTAPI moveMouse(
- int x,
- int y)
-{
-}
-
-/****************************************************************************
-PARAMETERS:
-code - Code to translate
-keys - Table of translation key values to look up
-
-REMARKS:
-Simple function to look up the printable name for the keyboard code.
-****************************************************************************/
-KeyEntry *FindKey(
- int code,
- KeyEntry *keys)
-{
- KeyEntry *key;
-
- for (key = keys; key->code != 0; key++) {
- if (key->code == code)
- break;
- }
- return key;
-}
-
-/****************************************************************************
-PARAMETERS:
-evt - Event to display modifiers for
-
-REMARKS:
-Function to display shift modifiers flags
-****************************************************************************/
-void DisplayModifiers(
- event_t *evt)
-{
- if (evt->modifiers & EVT_LEFTBUT)
- printf(", LBUT");
- if (evt->modifiers & EVT_RIGHTBUT)
- printf(", RBUT");
- if (evt->modifiers & EVT_MIDDLEBUT)
- printf(", MBUT");
- if (evt->modifiers & EVT_SHIFTKEY) {
- if (evt->modifiers & EVT_LEFTSHIFT)
- printf(", LSHIFT");
- if (evt->modifiers & EVT_RIGHTSHIFT)
- printf(", RSHIFT");
- }
- if (evt->modifiers & EVT_CTRLSTATE) {
- if (evt->modifiers & EVT_LEFTCTRL)
- printf(", LCTRL");
- if (evt->modifiers & EVT_RIGHTCTRL)
- printf(", RCTRL");
- }
- if (evt->modifiers & EVT_ALTSTATE) {
- if (evt->modifiers & EVT_LEFTALT)
- printf(", LALT");
- if (evt->modifiers & EVT_RIGHTALT)
- printf(", RALT");
- }
-}
-
-/****************************************************************************
-PARAMETERS:
-msg - Message to display for type of event
-evt - Event to display
-
-REMARKS:
-Function to display the status of the keyboard event to the screen.
-****************************************************************************/
-void DisplayKey(
- char *msg,
- event_t *evt)
-{
- KeyEntry *ascii,*scan;
- char ch = EVT_asciiCode(evt->message);
-
- ascii = FindKey(ch,ASCIICodes);
- scan = FindKey(EVT_scanCode(evt->message),ScanCodes);
- printf("%s: 0x%04X -> %s, %s, '%c'",
- msg, (int)evt->message & 0xFFFF, scan->name, ascii->name, isprint(ch) ? ch : ' ');
- DisplayModifiers(evt);
- printf("\n");
-}
-
-/****************************************************************************
-PARAMETERS:
-msg - Message to display for type of event
-evt - Event to display
-
-REMARKS:
-Function to display the status of the mouse event to the screen.
-****************************************************************************/
-void DisplayMouse(
- char *msg,
- event_t *evt)
-{
- printf("%s: ", msg);
- if (evt->message & EVT_LEFTBMASK)
- printf("LEFT ");
- if (evt->message & EVT_RIGHTBMASK)
- printf("RIGHT ");
- if (evt->message & EVT_MIDDLEBMASK)
- printf("MIDDLE ");
- printf("abs(%d,%d), rel(%d,%d)", evt->where_x, evt->where_y, evt->relative_x, evt->relative_y);
- DisplayModifiers(evt);
- if (evt->message & EVT_DBLCLICK)
- printf(", DBLCLICK");
- printf("\n");
-}
-
-/****************************************************************************
-PARAMETERS:
-msg - Message to display for type of event
-evt - Event to display
-
-REMARKS:
-Function to display the status of the joystick event to the screen.
-****************************************************************************/
-void DisplayJoy(
- char *msg,
- event_t *evt)
-{
- printf("%s: Joy1(%4d,%4d,%c%c), Joy2(%4d,%4d,%c%c)\n", msg,
- evt->where_x,evt->where_y,
- (evt->message & EVT_JOY1_BUTTONA) ? 'A' : 'a',
- (evt->message & EVT_JOY1_BUTTONB) ? 'B' : 'b',
- evt->relative_x,evt->relative_y,
- (evt->message & EVT_JOY2_BUTTONA) ? 'A' : 'a',
- (evt->message & EVT_JOY2_BUTTONB) ? 'B' : 'b');
-}
-
-/****************************************************************************
-REMARKS:
-Joystick calibration routine
-****************************************************************************/
-void CalibrateJoy(void)
-{
- event_t evt;
- if(EVT_joyIsPresent()){
- printf("Joystick Calibration\nMove the joystick to the upper left corner and press any button.\n");
- EVT_halt(&evt, EVT_JOYCLICK);
- EVT_halt(&evt, EVT_JOYCLICK);
- EVT_joySetUpperLeft();
- printf("Move the joystick to the lower right corner and press any button.\n");
- EVT_halt(&evt, EVT_JOYCLICK);
- EVT_halt(&evt, EVT_JOYCLICK);
- EVT_joySetLowerRight();
- printf("Move the joystick to center position and press any button.\n");
- EVT_halt(&evt, EVT_JOYCLICK);
- EVT_halt(&evt, EVT_JOYCLICK);
- EVT_joySetCenter();
- printf("Joystick calibrated\n");
- }
-}
-
-/****************************************************************************
-REMARKS:
-Main program entry point
-****************************************************************************/
-int main(void)
-{
- event_t evt;
- ibool done = false;
- PM_HWND hwndConsole;
-
- hwndConsole = PM_openConsole(0,0,0,0,0,true);
- EVT_init(&moveMouse);
- EVT_setMouseRange(1024,768);
- CalibrateJoy();
- do {
- EVT_pollJoystick();
- if (EVT_getNext(&evt,EVT_EVERYEVT)) {
- switch (evt.what) {
- case EVT_KEYDOWN:
- DisplayKey("EVT_KEYDOWN ", &evt);
- if (EVT_scanCode(evt.message) == KB_esc)
- done = true;
- break;
- case EVT_KEYREPEAT:
- DisplayKey("EVT_KEYREPEAT", &evt);
- break;
- case EVT_KEYUP:
- DisplayKey("EVT_KEYUP ", &evt);
- break;
- case EVT_MOUSEDOWN:
- DisplayMouse("EVT_MOUSEDOWN", &evt);
- break;
- case EVT_MOUSEAUTO:
- DisplayMouse("EVT_MOUSEAUTO", &evt);
- break;
- case EVT_MOUSEUP:
- DisplayMouse("EVT_MOUSEUP ", &evt);
- break;
- case EVT_MOUSEMOVE:
- DisplayMouse("EVT_MOUSEMOVE", &evt);
- break;
- case EVT_JOYCLICK:
- DisplayJoy("EVT_JOYCLICK ", &evt);
- break;
- case EVT_JOYMOVE:
- DisplayJoy("EVT_JOYMOVE ", &evt);
- break;
- }
- }
- } while (!done);
- EVT_exit();
- PM_closeConsole(hwndConsole);
- return 0;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/tests/isvesa.c b/board/MAI/bios_emulator/scitech/src/pm/tests/isvesa.c
deleted file mode 100644
index 67ad2456e8..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/tests/isvesa.c
+++ /dev/null
@@ -1,110 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: any
-*
-* Description: Test program to check the ability to allocate real mode
-* memory and to call real mode interrupt handlers such as
-* the VESA VBE BIOS from protected mode. Compile and link
-* with the appropriate command line for your DOS extender.
-*
-* Functions tested: PM_getVESABuf()
-* PM_mapRealPointer()
-* PM_int86x()
-*
-****************************************************************************/
-
-#include <stdlib.h>
-#include <stdio.h>
-#include <string.h>
-#include "pmapi.h"
-
-/* SuperVGA information block */
-
-#pragma pack(1)
-
-typedef struct {
- char VESASignature[4]; /* 'VESA' 4 byte signature */
- short VESAVersion; /* VBE version number */
- ulong OEMStringPtr; /* Far pointer to OEM string */
- ulong Capabilities; /* Capabilities of video card */
- ulong VideoModePtr; /* Far pointer to supported modes */
- short TotalMemory; /* Number of 64kb memory blocks */
- char reserved[236]; /* Pad to 256 byte block size */
- } VgaInfoBlock;
-
-#pragma pack()
-
-int main(void)
-{
- RMREGS regs;
- RMSREGS sregs;
- VgaInfoBlock vgaInfo;
- ushort *mode;
- uint vgLen;
- uchar *vgPtr;
- unsigned r_vgseg,r_vgoff;
-
- printf("Program running in ");
- switch (PM_getModeType()) {
- case PM_realMode:
- printf("real mode.\n\n");
- break;
- case PM_286:
- printf("16 bit protected mode.\n\n");
- break;
- case PM_386:
- printf("32 bit protected mode.\n\n");
- break;
- }
-
- /* Allocate a 256 byte block of real memory for communicating with
- * the VESA BIOS.
- */
- if ((vgPtr = PM_getVESABuf(&vgLen,&r_vgseg,&r_vgoff)) == NULL) {
- printf("Unable to allocate VESA memory buffer!\n");
- exit(1);
- }
-
- /* Call the VESA VBE to see if it is out there */
- regs.x.ax = 0x4F00;
- regs.x.di = r_vgoff;
- sregs.es = r_vgseg;
- memcpy(vgPtr,"VBE2",4);
- PM_int86x(0x10, &regs, &regs, &sregs);
- memcpy(&vgaInfo,vgPtr,sizeof(VgaInfoBlock));
- if (regs.x.ax == 0x4F && strncmp(vgaInfo.VESASignature,"VESA",4) == 0) {
- printf("VESA VBE version %d.%d BIOS detected\n\n",
- vgaInfo.VESAVersion >> 8, vgaInfo.VESAVersion & 0xF);
- printf("Available video modes:\n");
- mode = PM_mapRealPointer(vgaInfo.VideoModePtr >> 16, vgaInfo.VideoModePtr & 0xFFFF);
- while (*mode != 0xFFFF) {
- printf(" %04hXh (%08X)\n", *mode, (int)mode);
- mode++;
- }
- }
- else
- printf("VESA VBE not found\n");
- return 0;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/tests/key.c b/board/MAI/bios_emulator/scitech/src/pm/tests/key.c
deleted file mode 100644
index dba88853c2..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/tests/key.c
+++ /dev/null
@@ -1,92 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-*
-* Language: ANSI C
-* Environment: any
-*
-* Description: Test program to check the ability to install a C based
-* keyboard interrupt handler.
-*
-* Functions tested: PM_setKeyHandler()
-* PM_chainPrevKey()
-* PM_restoreKeyHandler()
-*
-*
-****************************************************************************/
-
-#include <stdlib.h>
-#include <stdio.h>
-#include "pmapi.h"
-
-volatile long count = 0;
-
-#pragma off (check_stack) /* No stack checking under Watcom */
-
-void PMAPI keyHandler(void)
-{
- count++;
- PM_chainPrevKey(); /* Chain to previous handler */
-}
-
-int main(void)
-{
- int ch;
- PM_lockHandle lh;
-
- printf("Program running in ");
- switch (PM_getModeType()) {
- case PM_realMode:
- printf("real mode.\n\n");
- break;
- case PM_286:
- printf("16 bit protected mode.\n\n");
- break;
- case PM_386:
- printf("32 bit protected mode.\n\n");
- break;
- }
-
- /* Install our timer handler and lock handler pages in memory. It is
- * difficult to get the size of a function in C, but we know our
- * function is well less than 100 bytes (and an entire 4k page will
- * need to be locked by the server anyway).
- */
- PM_lockCodePages((__codePtr)keyHandler,100,&lh);
- PM_lockDataPages((void*)&count,sizeof(count),&lh);
- PM_installBreakHandler(); /* We *DONT* want Ctrl-Breaks! */
- PM_setKeyHandler(keyHandler);
- printf("Keyboard interrupt handler installed - Type some characters and\n");
- printf("hit ESC to exit\n");
- while ((ch = PM_getch()) != 0x1B) {
- printf("%c", ch);
- fflush(stdout);
- }
-
- PM_restoreKeyHandler();
- PM_restoreBreakHandler();
- PM_unlockDataPages((void*)&count,sizeof(count),&lh);
- PM_unlockCodePages((__codePtr)keyHandler,100,&lh);
- printf("\n\nKeyboard handler was called %ld times\n", count);
- return 0;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/tests/key15.c b/board/MAI/bios_emulator/scitech/src/pm/tests/key15.c
deleted file mode 100644
index b0b94be9c2..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/tests/key15.c
+++ /dev/null
@@ -1,96 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-*
-* Language: ANSI C
-* Environment: any
-*
-* Description: Test program to check the ability to install a C based
-* keyboard Int 15h interrupt handler. This is an alternate
-* way to intercept scancodes from the keyboard by hooking
-* the Int 15h keyboard intercept callout.
-*
-* Functions tested: PM_setKey15Handler()
-* PM_restoreKey15Handler()
-*
-*
-****************************************************************************/
-
-#include <stdlib.h>
-#include <stdio.h>
-#include "pmapi.h"
-
-volatile long count = 0;
-volatile short lastScanCode = 0;
-
-#pragma off (check_stack) /* No stack checking under Watcom */
-
-short PMAPI keyHandler(short scanCode)
-{
- count++;
- lastScanCode = scanCode;
- return scanCode; /* Let BIOS process as normal */
-}
-
-int main(void)
-{
- int ch;
- PM_lockHandle lh;
-
- printf("Program running in ");
- switch (PM_getModeType()) {
- case PM_realMode:
- printf("real mode.\n\n");
- break;
- case PM_286:
- printf("16 bit protected mode.\n\n");
- break;
- case PM_386:
- printf("32 bit protected mode.\n\n");
- break;
- }
-
- /* Install our timer handler and lock handler pages in memory. It is
- * difficult to get the size of a function in C, but we know our
- * function is well less than 100 bytes (and an entire 4k page will
- * need to be locked by the server anyway).
- */
- PM_lockCodePages((__codePtr)keyHandler,100,&lh);
- PM_lockDataPages((void*)&count,sizeof(count),&lh);
- PM_installBreakHandler(); /* We *DONT* want Ctrl-Break's! */
- PM_setKey15Handler(keyHandler);
- printf("Keyboard interrupt handler installed - Type some characters and\n");
- printf("hit ESC to exit\n");
- while ((ch = PM_getch()) != 0x1B) {
- printf("%c", ch);
- fflush(stdout);
- }
-
- PM_restoreKey15Handler();
- PM_restoreBreakHandler();
- PM_unlockDataPages((void*)&count,sizeof(count),&lh);
- PM_unlockCodePages((__codePtr)keyHandler,100,&lh);
- printf("\n\nKeyboard handler was called %ld times\n", count);
- printf("Last scan code %04X\n", lastScanCode);
- return 0;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/tests/memtest.c b/board/MAI/bios_emulator/scitech/src/pm/tests/memtest.c
deleted file mode 100644
index a2c655b4a3..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/tests/memtest.c
+++ /dev/null
@@ -1,106 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-*
-* Language: ANSI C
-* Environment: any
-*
-* Description: Test program to determine just how much memory can be
-* allocated with the compiler in use. Compile and link
-* with the appropriate command line for your DOS extender.
-*
-* Functions tested: PM_malloc()
-* PM_availableMemory()
-*
-*
-****************************************************************************/
-
-#include <stdlib.h>
-#include <stdio.h>
-#include <string.h>
-#include <math.h>
-#include "pmapi.h"
-
-#ifdef __16BIT__
-#define MAXALLOC 64
-#else
-#define MAXALLOC 2000
-#endif
-
-int main(void)
-{
- int i;
- ulong allocs;
- ulong physical,total;
- char *p,*pa[MAXALLOC];
-
- printf("Program running in ");
- switch (PM_getModeType()) {
- case PM_realMode:
- printf("real mode.\n\n");
- break;
- case PM_286:
- printf("16 bit protected mode.\n\n");
- break;
- case PM_386:
- printf("32 bit protected mode.\n\n");
- break;
- }
-
- printf("Memory available at start:\n");
- PM_availableMemory(&physical,&total);
- printf(" Physical memory: %ld Kb\n", physical / 1024);
- printf(" Total (including virtual): %ld Kb\n", total / 1024);
- printf("\n");
- for (allocs = i = 0; i < MAXALLOC; i++) {
- if ((pa[i] = PM_malloc(10*1024)) != 0) { /* in 10k blocks */
- p = pa[allocs];
- memset(p, 0, 10*1024); /* touch every byte */
- *p = 'x'; /* do something, anything with */
- p[1023] = 'y'; /* the allocated memory */
- allocs++;
- printf("Allocated %lu bytes\r", 10*(allocs << 10));
- }
- else break;
- if (PM_kbhit() && (PM_getch() == 0x1B))
- break;
- }
-
- printf("\n\nAllocated total of %lu bytes\n", 10 * (allocs << 10));
-
- printf("\nMemory available at end:\n");
- PM_availableMemory(&physical,&total);
- printf(" Physical memory: %ld Kb\n", physical / 1024);
- printf(" Total (including virtual): %ld Kb\n", total / 1024);
-
- for (i = allocs-1; i >= 0; i--)
- PM_free(pa[i]);
-
- printf("\nMemory available after freeing all blocks (note that under protected mode\n");
- printf("this will most likely not be correct after freeing blocks):\n\n");
- PM_availableMemory(&physical,&total);
- printf(" Physical memory: %ld Kb\n", physical / 1024);
- printf(" Total (including virtual): %ld Kb\n", total / 1024);
-
- return 0;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/tests/mouse.c b/board/MAI/bios_emulator/scitech/src/pm/tests/mouse.c
deleted file mode 100644
index 2765a0d1cc..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/tests/mouse.c
+++ /dev/null
@@ -1,109 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-*
-* Language: ANSI C
-* Environment: any
-*
-* Description: Test program to check the ability to install an assembly
-* language mouse interrupt handler. We use assembly language
-* as it must be a far function and should swap to a local
-* 32 bit stack if it is going to call any C based code (which
-* we do in this example).
-*
-* Functions tested: PM_installMouseHandler()
-* PM_int86()
-*
-*
-****************************************************************************/
-
-#include <stdlib.h>
-#include <stdio.h>
-#include "pmapi.h"
-
-volatile long count = 0;
-
-#pragma off (check_stack) /* No stack checking under Watcom */
-
-void PMAPI mouseHandler(
- uint mask,
- uint butstate,
- int x,
- int y,
- int mickeyX,
- int mickeyY)
-{
- mask = mask; /* We dont use any of the parameters */
- butstate = butstate;
- x = x;
- y = y;
- mickeyX = mickeyX;
- mickeyY = mickeyY;
- count++;
-}
-
-int main(void)
-{
- RMREGS regs;
- PM_lockHandle lh;
-
- printf("Program running in ");
- switch (PM_getModeType()) {
- case PM_realMode:
- printf("real mode.\n\n");
- break;
- case PM_286:
- printf("16 bit protected mode.\n\n");
- break;
- case PM_386:
- printf("32 bit protected mode.\n\n");
- break;
- }
-
- regs.x.ax = 33; /* Mouse function 33 - Software reset */
- PM_int86(0x33,&regs,&regs);
- if (regs.x.bx == 0) {
- printf("No mouse installed.\n");
- exit(1);
- }
-
- /* Install our mouse handler and lock handler pages in memory. It is
- * difficult to get the size of a function in C, but we know our
- * function is well less than 100 bytes (and an entire 4k page will
- * need to be locked by the server anyway).
- */
- PM_lockCodePages((__codePtr)mouseHandler,100,&lh);
- PM_lockDataPages((void*)&count,sizeof(count),&lh);
- if (!PM_setMouseHandler(0xFFFF, mouseHandler)) {
- printf("Unable to install mouse handler!\n");
- exit(1);
- }
- printf("Mouse handler installed - Hit any key to exit\n");
- PM_getch();
-
- PM_restoreMouseHandler();
- PM_unlockDataPages((void*)&count,sizeof(count),&lh);
- PM_unlockCodePages((__codePtr)mouseHandler,100,&lh);
- printf("Mouse handler was called %ld times\n", count);
- return 0;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/tests/restore.c b/board/MAI/bios_emulator/scitech/src/pm/tests/restore.c
deleted file mode 100644
index e00be750e3..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/tests/restore.c
+++ /dev/null
@@ -1,81 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Linux/QNX
-*
-* Description: Program to restore the console state state from a previously
-* saved state if the program crashed while the console
-* was in graphics mode.
-*
-****************************************************************************/
-
-#include <stdlib.h>
-#include <stdio.h>
-#include "pmapi.h"
-
-void setVideoMode(int mode)
-{
- RMREGS r;
-
- r.x.ax = mode;
- PM_int86(0x10, &r, &r);
-}
-
-int main(void)
-{
- PM_HWND hwndConsole;
- ulong stateSize;
- void *stateBuf;
- FILE *f;
-
- /* Write the saved console state buffer to disk */
- if ((f = fopen("/etc/pmsave.dat","rb")) == NULL) {
- printf("Unable to open /etc/pmsave.dat for reading!\n");
- return -1;
- }
- fread(&stateSize,1,sizeof(stateSize),f);
- if (stateSize != PM_getConsoleStateSize()) {
- printf("Size mismatch in /etc/pmsave.dat!\n");
- return -1;
- }
- if ((stateBuf = PM_malloc(stateSize)) == NULL) {
- printf("Unable to allocate console state buffer!\n");
- return -1;
- }
- fread(stateBuf,1,stateSize,f);
- fclose(f);
-
- /* Open the console */
- hwndConsole = PM_openConsole(0,0,0,0,0,true);
-
- /* Forcibly set 80x25 text mode using the BIOS */
- setVideoMode(0x3);
-
- /* Restore the previous console state */
- PM_restoreConsoleState(stateBuf,0);
- PM_closeConsole(hwndConsole);
- PM_free(stateBuf);
- printf("Console state successfully restored from /etc/pmsave.dat\n");
- return 0;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/tests/rtc.c b/board/MAI/bios_emulator/scitech/src/pm/tests/rtc.c
deleted file mode 100644
index acef9226a8..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/tests/rtc.c
+++ /dev/null
@@ -1,92 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: any
-*
-* Description: Test program to check the ability to install a C based
-* Real Time Clock interrupt handler.
-*
-* Functions tested: PM_setRealTimeClockHandler()
-* PM_restoreRealTimeClockHandler()
-*
-****************************************************************************/
-
-#include <stdlib.h>
-#include <stdio.h>
-#include "pmapi.h"
-
-volatile long count = 0;
-
-#pragma off (check_stack) /* No stack checking under Watcom */
-
-void PMAPI RTCHandler(void)
-{
- count++;
-}
-
-int main(void)
-{
- long oldCount;
- PM_lockHandle lh;
-
- printf("Program running in ");
- switch (PM_getModeType()) {
- case PM_realMode:
- printf("real mode.\n\n");
- break;
- case PM_286:
- printf("16 bit protected mode.\n\n");
- break;
- case PM_386:
- printf("32 bit protected mode.\n\n");
- break;
- }
-
- /* Install our timer handler and lock handler pages in memory. It is
- * difficult to get the size of a function in C, but we know our
- * function is well less than 100 bytes (and an entire 4k page will
- * need to be locked by the server anyway).
- */
- PM_lockCodePages((__codePtr)RTCHandler,100,&lh);
- PM_lockDataPages((void*)&count,sizeof(count),&lh);
- PM_installBreakHandler(); /* We *DONT* want Ctrl-Breaks! */
- PM_setRealTimeClockHandler(RTCHandler,128);
- printf("RealTimeClock interrupt handler installed - Hit ESC to exit\n");
- oldCount = count;
- while (1) {
- if (PM_kbhit() && (PM_getch() == 0x1B))
- break;
- if (count != oldCount) {
- printf("Tick, Tock: %ld\n", count);
- oldCount = count;
- }
- }
-
- PM_restoreRealTimeClockHandler();
- PM_restoreBreakHandler();
- PM_unlockDataPages((void*)&count,sizeof(count),&lh);
- PM_unlockCodePages((__codePtr)RTCHandler,100,&lh);
- printf("RealTimeClock handler was called %ld times\n", count);
- return 0;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/tests/save.c b/board/MAI/bios_emulator/scitech/src/pm/tests/save.c
deleted file mode 100644
index f7324562f8..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/tests/save.c
+++ /dev/null
@@ -1,69 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Linux/QNX
-*
-* Description: Program to save the console state state so that it can
-* be later restored if the program crashed while the console
-* was in graphics mode.
-*
-****************************************************************************/
-
-#include <stdlib.h>
-#include <stdio.h>
-#include "pmapi.h"
-
-int main(void)
-{
- PM_HWND hwndConsole;
- ulong stateSize;
- void *stateBuf;
- FILE *f;
-
- /* Allocate a buffer to save console state and save the state */
- hwndConsole = PM_openConsole(0,0,0,0,0,true);
- stateSize = PM_getConsoleStateSize();
- if ((stateBuf = PM_malloc(stateSize)) == NULL) {
- PM_closeConsole(hwndConsole);
- printf("Unable to allocate console state buffer!\n");
- return -1;
- }
- PM_saveConsoleState(stateBuf,0);
-
- /* Restore the console state on exit */
- PM_restoreConsoleState(stateBuf,0);
- PM_closeConsole(hwndConsole);
-
- /* Write the saved console state buffer to disk */
- if ((f = fopen("/etc/pmsave.dat","wb")) == NULL)
- printf("Unable to open /etc/pmsave/dat for writing!\n");
- else {
- fwrite(&stateSize,1,sizeof(stateSize),f);
- fwrite(stateBuf,1,stateSize,f);
- fclose(f);
- printf("Console state successfully saved to /etc/pmsave.dat\n");
- }
- PM_free(stateBuf);
- return 0;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/tests/showpci.c b/board/MAI/bios_emulator/scitech/src/pm/tests/showpci.c
deleted file mode 100644
index be275e1a04..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/tests/showpci.c
+++ /dev/null
@@ -1,253 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: any
-*
-* Description: Test program to test the PCI library functions.
-*
-****************************************************************************/
-
-#include "pmapi.h"
-#include "pcilib.h"
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <stdarg.h>
-
-/*------------------------- Global Variables ------------------------------*/
-
-static int NumPCI = -1;
-static PCIDeviceInfo *PCI;
-static int *BridgeIndex;
-static int *DeviceIndex;
-static int NumBridges;
-static PCIDeviceInfo *AGPBridge = NULL;
-static int NumDevices;
-
-/*-------------------------- Implementation -------------------------------*/
-
-/****************************************************************************
-REMARKS:
-Enumerates the PCI bus and dumps the PCI configuration information to the
-log file.
-****************************************************************************/
-static void EnumeratePCI(void)
-{
- int i,index;
- PCIDeviceInfo *info;
-
- printf("Displaying enumeration of PCI bus (%d devices, %d display devices)\n",
- NumPCI, NumDevices);
- for (index = 0; index < NumDevices; index++)
- printf(" Display device %d is PCI device %d\n",index,DeviceIndex[index]);
- printf("\n");
- printf("Bus Slot Fnc DeviceID SubSystem Rev Class IRQ Int Cmd\n");
- for (i = 0; i < NumPCI; i++) {
- printf("%2d %2d %2d %04X:%04X %04X:%04X %02X %02X:%02X %02X %02X %04X ",
- PCI[i].slot.p.Bus,
- PCI[i].slot.p.Device,
- PCI[i].slot.p.Function,
- PCI[i].VendorID,
- PCI[i].DeviceID,
- PCI[i].u.type0.SubSystemVendorID,
- PCI[i].u.type0.SubSystemID,
- PCI[i].RevID,
- PCI[i].BaseClass,
- PCI[i].SubClass,
- PCI[i].u.type0.InterruptLine,
- PCI[i].u.type0.InterruptPin,
- PCI[i].Command);
- for (index = 0; index < NumDevices; index++) {
- if (DeviceIndex[index] == i)
- break;
- }
- if (index < NumDevices)
- printf("<- %d\n", index);
- else
- printf("\n");
- }
- printf("\n");
- printf("DeviceID Stat Ifc Cch Lat Hdr BIST\n");
- for (i = 0; i < NumPCI; i++) {
- printf("%04X:%04X %04X %02X %02X %02X %02X %02X ",
- PCI[i].VendorID,
- PCI[i].DeviceID,
- PCI[i].Status,
- PCI[i].Interface,
- PCI[i].CacheLineSize,
- PCI[i].LatencyTimer,
- PCI[i].HeaderType,
- PCI[i].BIST);
- for (index = 0; index < NumDevices; index++) {
- if (DeviceIndex[index] == i)
- break;
- }
- if (index < NumDevices)
- printf("<- %d\n", index);
- else
- printf("\n");
- }
- printf("\n");
- printf("DeviceID Base10h Base14h Base18h Base1Ch Base20h Base24h ROMBase\n");
- for (i = 0; i < NumPCI; i++) {
- printf("%04X:%04X %08lX %08lX %08lX %08lX %08lX %08lX %08lX ",
- PCI[i].VendorID,
- PCI[i].DeviceID,
- PCI[i].u.type0.BaseAddress10,
- PCI[i].u.type0.BaseAddress14,
- PCI[i].u.type0.BaseAddress18,
- PCI[i].u.type0.BaseAddress1C,
- PCI[i].u.type0.BaseAddress20,
- PCI[i].u.type0.BaseAddress24,
- PCI[i].u.type0.ROMBaseAddress);
- for (index = 0; index < NumDevices; index++) {
- if (DeviceIndex[index] == i)
- break;
- }
- if (index < NumDevices)
- printf("<- %d\n", index);
- else
- printf("\n");
- }
- printf("\n");
- printf("DeviceID BAR10Len BAR14Len BAR18Len BAR1CLen BAR20Len BAR24Len ROMLen\n");
- for (i = 0; i < NumPCI; i++) {
- printf("%04X:%04X %08lX %08lX %08lX %08lX %08lX %08lX %08lX ",
- PCI[i].VendorID,
- PCI[i].DeviceID,
- PCI[i].u.type0.BaseAddress10Len,
- PCI[i].u.type0.BaseAddress14Len,
- PCI[i].u.type0.BaseAddress18Len,
- PCI[i].u.type0.BaseAddress1CLen,
- PCI[i].u.type0.BaseAddress20Len,
- PCI[i].u.type0.BaseAddress24Len,
- PCI[i].u.type0.ROMBaseAddressLen);
- for (index = 0; index < NumDevices; index++) {
- if (DeviceIndex[index] == i)
- break;
- }
- if (index < NumDevices)
- printf("<- %d\n", index);
- else
- printf("\n");
- }
- printf("\n");
- printf("Displaying enumeration of %d bridge devices\n",NumBridges);
- printf("\n");
- printf("DeviceID P# S# B# IOB IOL MemBase MemLimit PreBase PreLimit Ctrl\n");
- for (i = 0; i < NumBridges; i++) {
- info = (PCIDeviceInfo*)&PCI[BridgeIndex[i]];
- printf("%04X:%04X %02X %02X %02X %04X %04X %08X %08X %08X %08X %04X\n",
- info->VendorID,
- info->DeviceID,
- info->u.type1.PrimaryBusNumber,
- info->u.type1.SecondayBusNumber,
- info->u.type1.SubordinateBusNumber,
- ((u16)info->u.type1.IOBase << 8) & 0xF000,
- info->u.type1.IOLimit ?
- ((u16)info->u.type1.IOLimit << 8) | 0xFFF : 0,
- ((u32)info->u.type1.MemoryBase << 16) & 0xFFF00000,
- info->u.type1.MemoryLimit ?
- ((u32)info->u.type1.MemoryLimit << 16) | 0xFFFFF : 0,
- ((u32)info->u.type1.PrefetchableMemoryBase << 16) & 0xFFF00000,
- info->u.type1.PrefetchableMemoryLimit ?
- ((u32)info->u.type1.PrefetchableMemoryLimit << 16) | 0xFFFFF : 0,
- info->u.type1.BridgeControl);
- }
- printf("\n");
-}
-
-/****************************************************************************
-RETURNS:
-Number of display devices found.
-
-REMARKS:
-This function enumerates the number of available display devices on the
-PCI bus, and returns the number found.
-****************************************************************************/
-static int PCI_enumerateDevices(void)
-{
- int i,j;
- PCIDeviceInfo *info;
-
- /* If this is the first time we have been called, enumerate all */
- /* devices on the PCI bus. */
- if (NumPCI == -1) {
- if ((NumPCI = PCI_getNumDevices()) == 0)
- return -1;
- PCI = malloc(NumPCI * sizeof(PCI[0]));
- BridgeIndex = malloc(NumPCI * sizeof(BridgeIndex[0]));
- DeviceIndex = malloc(NumPCI * sizeof(DeviceIndex[0]));
- if (!PCI || !BridgeIndex || !DeviceIndex)
- return -1;
- for (i = 0; i < NumPCI; i++)
- PCI[i].dwSize = sizeof(PCI[i]);
- if (PCI_enumerate(PCI) == 0)
- return -1;
-
- /* Build a list of all PCI bridge devices */
- for (i = 0,NumBridges = 0,BridgeIndex[0] = -1; i < NumPCI; i++) {
- if (PCI[i].BaseClass == PCI_BRIDGE_CLASS)
- BridgeIndex[NumBridges++] = i;
- }
-
- /* Now build a list of all display class devices */
- for (i = 0,NumDevices = 1,DeviceIndex[0] = -1; i < NumPCI; i++) {
- if (PCI_IS_DISPLAY_CLASS(&PCI[i])) {
- if ((PCI[i].Command & 0x3) == 0x3)
- DeviceIndex[0] = i;
- else
- DeviceIndex[NumDevices++] = i;
- if (PCI[i].slot.p.Bus != 0) {
- /* This device is on a different bus than the primary */
- /* PCI bus, so it is probably an AGP device. Find the */
- /* AGP bus device that controls that bus so we can */
- /* control it. */
- for (j = 0; j < NumBridges; j++) {
- info = (PCIDeviceInfo*)&PCI[BridgeIndex[j]];
- if (info->u.type1.SecondayBusNumber == PCI[i].slot.p.Bus) {
- AGPBridge = info;
- break;
- }
- }
- }
- }
- }
-
- /* Enumerate all PCI and bridge devices to standard output */
- EnumeratePCI();
- }
- return NumDevices;
-}
-
-int main(void)
-{
- /* Enumerate all PCI devices */
- PM_init();
- if (PCI_enumerateDevices() < 1) {
- printf("No PCI display devices found!\n");
- return -1;
- }
- return 0;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/tests/tick.c b/board/MAI/bios_emulator/scitech/src/pm/tests/tick.c
deleted file mode 100644
index 378725ebe6..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/tests/tick.c
+++ /dev/null
@@ -1,94 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: any
-*
-* Description: Test program to check the ability to install a C based
-* timer interrupt handler.
-*
-* Functions tested: PM_setTimerHandler()
-* PM_chainPrevTimer();
-* PM_restoreTimerHandler()
-*
-****************************************************************************/
-
-#include <stdlib.h>
-#include <stdio.h>
-#include "pmapi.h"
-
-volatile long count = 0;
-
-#pragma off (check_stack) /* No stack checking under Watcom */
-
-void PMAPI timerHandler(void)
-{
- PM_chainPrevTimer(); /* Chain to previous handler */
- count++;
-}
-
-int main(void)
-{
- long oldCount;
- PM_lockHandle lh;
-
- printf("Program running in ");
- switch (PM_getModeType()) {
- case PM_realMode:
- printf("real mode.\n\n");
- break;
- case PM_286:
- printf("16 bit protected mode.\n\n");
- break;
- case PM_386:
- printf("32 bit protected mode.\n\n");
- break;
- }
-
- /* Install our timer handler and lock handler pages in memory. It is
- * difficult to get the size of a function in C, but we know our
- * function is well less than 100 bytes (and an entire 4k page will
- * need to be locked by the server anyway).
- */
- PM_lockCodePages((__codePtr)timerHandler,100,&lh);
- PM_lockDataPages((void*)&count,sizeof(count),&lh);
- PM_installBreakHandler(); /* We *DONT* want Ctrl-Breaks! */
- PM_setTimerHandler(timerHandler);
- printf("Timer interrupt handler installed - Hit ESC to exit\n");
- oldCount = count;
- while (1) {
- if (PM_kbhit() && (PM_getch() == 0x1B))
- break;
- if (count != oldCount) {
- printf("Tick, Tock: %ld\n", count);
- oldCount = count;
- }
- }
-
- PM_restoreTimerHandler();
- PM_restoreBreakHandler();
- PM_unlockDataPages((void*)&count,sizeof(count),&lh);
- PM_unlockCodePages((__codePtr)timerHandler,100,&lh);
- printf("Timer handler was called %ld times\n", count);
- return 0;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/tests/timerc.c b/board/MAI/bios_emulator/scitech/src/pm/tests/timerc.c
deleted file mode 100644
index 7fa77b77b8..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/tests/timerc.c
+++ /dev/null
@@ -1,87 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-*
-* Description: Test program for the Zen Timer Library.
-*
-****************************************************************************/
-
-#include <stdio.h>
-#include "pmapi.h"
-#include "ztimer.h"
-
-#define DELAY_SECS 10
-
-/*-------------------------- Implementation -------------------------------*/
-
-/* The following routine takes a long count in microseconds and outputs
- * a string representing the count in seconds. It could be modified to
- * return a pointer to a static string representing the count rather
- * than printing it out.
- */
-
-void ReportTime(ulong count)
-{
- ulong secs;
-
- secs = count / 1000000L;
- count = count - secs * 1000000L;
- printf("Time taken: %lu.%06lu seconds\n",secs,count);
-}
-
-int i,j; /* NON register variables! */
-
-int main(void)
-{
-#ifdef LONG_TEST
- ulong start,finish;
-#endif
-
- printf("Processor type: %d %ld MHz\n", CPU_getProcessorType(), CPU_getProcessorSpeed(true));
-
- ZTimerInit();
-
- /* Test the long period Zen Timer (we don't check for overflow coz
- * it would take tooooo long!)
- */
-
- LZTimerOn();
- for (j = 0; j < 10; j++)
- for (i = 0; i < 20000; i++)
- i = i;
- LZTimerOff();
- ReportTime(LZTimerCount());
-
- /* Test the ultra long period Zen Timer */
-#ifdef LONG_TEST
- start = ULZReadTime();
- delay(DELAY_SECS * 1000);
- finish = ULZReadTime();
- printf("Delay of %d secs took %d 1/10ths of a second\n",
- DELAY_SECS,ULZElapsedTime(start,finish));
-#endif
-
- return 0;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/tests/timercpp.cpp b/board/MAI/bios_emulator/scitech/src/pm/tests/timercpp.cpp
deleted file mode 100644
index 1258a4bb10..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/tests/timercpp.cpp
+++ /dev/null
@@ -1,107 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: C++ 3.0
-* Environment: Any
-*
-* Description: Test program for the Zen Timer Library C++ interface.
-*
-****************************************************************************/
-
-#include <iostream.h>
-#include "pmapi.h"
-#include "ztimer.h"
-
-/*-------------------------- Implementation -------------------------------*/
-
-int i,j,k; /* NON register variables! */
-
-void dummy() {}
-
-int main(void)
-{
- LZTimer ltimer;
- ULZTimer ultimer;
-
- ZTimerInit();
-
- /* Test the long period Zen Timer (we don't check for overflow coz
- * it would take tooooo long!)
- */
-
- cout << endl;
- ultimer.restart();
- ltimer.start();
- for (j = 0; j < 10; j++)
- for (i = 0; i < 20000; i++)
- dummy();
- ltimer.stop();
- ultimer.stop();
- cout << "LCount: " << ltimer.count() << endl;
- cout << "Time: " << ltimer << " secs\n";
- cout << "ULCount: " << ultimer.count() << endl;
- cout << "ULTime: " << ultimer << " secs\n";
-
- cout << endl << "Timing ... \n";
- ultimer.restart();
- ltimer.restart();
- for (j = 0; j < 200; j++)
- for (i = 0; i < 20000; i++)
- dummy();
- ltimer.stop();
- ultimer.stop();
- cout << "LCount: " << ltimer.count() << endl;
- cout << "Time: " << ltimer << " secs\n";
- cout << "ULCount: " << ultimer.count() << endl;
- cout << "ULTime: " << ultimer << " secs\n";
-
- /* Test the lap function of the long period Zen Timer */
-
- cout << endl << "Timing ... \n";
- ultimer.restart();
- ltimer.restart();
- for (j = 0; j < 20; j++) {
- for (k = 0; k < 10; k++)
- for (i = 0; i < 20000; i++)
- dummy();
- cout << "lap: " << ltimer.lap() << endl;
- }
- ltimer.stop();
- ultimer.stop();
- cout << "LCount: " << ltimer.count() << endl;
- cout << "Time: " << ltimer << " secs\n";
- cout << "ULCount: " << ultimer.count() << endl;
- cout << "ULTime: " << ultimer << " secs\n";
-
-#ifdef LONG_TEST
- /* Test the ultra long period Zen Timer */
-
- ultimer.start();
- delay(DELAY_SECS * 1000);
- ultimer.stop();
- cout << "Delay of " << DELAY_SECS << " secs took " << ultimer.count()
- << " 1/10ths of a second\n";
- cout << "Time: " << ultimer << " secs\n";
-#endif
- return 0;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/tests/uswc.c b/board/MAI/bios_emulator/scitech/src/pm/tests/uswc.c
deleted file mode 100644
index f0c7bd6311..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/tests/uswc.c
+++ /dev/null
@@ -1,311 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: any
-*
-* Description: Simple test program to test the write combine functions.
-*
-* Note that this program should never be used in a production
-* environment, because write combining needs to be handled
-* with more intimate knowledge of the display hardware than
-* you can obtain by simply examining the PCI configuration
-* space.
-*
-****************************************************************************/
-
-#include "pmapi.h"
-#include "pcilib.h"
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <stdarg.h>
-
-/*------------------------- Global Variables ------------------------------*/
-
-static int NumPCI = -1;
-static PCIDeviceInfo *PCI;
-static int *BridgeIndex;
-static int *DeviceIndex;
-static int NumBridges;
-static PCIDeviceInfo *AGPBridge = NULL;
-static int NumDevices;
-
-/*-------------------------- Implementation -------------------------------*/
-
-/****************************************************************************
-RETURNS:
-Number of display devices found.
-
-REMARKS:
-This function enumerates the number of available display devices on the
-PCI bus, and returns the number found.
-****************************************************************************/
-static int PCI_enumerateDevices(void)
-{
- int i,j;
- PCIDeviceInfo *info;
-
- /* If this is the first time we have been called, enumerate all */
- /* devices on the PCI bus. */
- if (NumPCI == -1) {
- if ((NumPCI = PCI_getNumDevices()) == 0)
- return -1;
- PCI = malloc(NumPCI * sizeof(PCI[0]));
- BridgeIndex = malloc(NumPCI * sizeof(BridgeIndex[0]));
- DeviceIndex = malloc(NumPCI * sizeof(DeviceIndex[0]));
- if (!PCI || !BridgeIndex || !DeviceIndex)
- return -1;
- for (i = 0; i < NumPCI; i++)
- PCI[i].dwSize = sizeof(PCI[i]);
- if (PCI_enumerate(PCI) == 0)
- return -1;
-
- /* Build a list of all PCI bridge devices */
- for (i = 0,NumBridges = 0,BridgeIndex[0] = -1; i < NumPCI; i++) {
- if (PCI[i].BaseClass == PCI_BRIDGE_CLASS)
- BridgeIndex[NumBridges++] = i;
- }
-
- /* Now build a list of all display class devices */
- for (i = 0,NumDevices = 1,DeviceIndex[0] = -1; i < NumPCI; i++) {
- if (PCI_IS_DISPLAY_CLASS(&PCI[i])) {
- if ((PCI[i].Command & 0x3) == 0x3)
- DeviceIndex[0] = i;
- else
- DeviceIndex[NumDevices++] = i;
- if (PCI[i].slot.p.Bus != 0) {
- /* This device is on a different bus than the primary */
- /* PCI bus, so it is probably an AGP device. Find the */
- /* AGP bus device that controls that bus so we can */
- /* control it. */
- for (j = 0; j < NumBridges; j++) {
- info = (PCIDeviceInfo*)&PCI[BridgeIndex[j]];
- if (info->u.type1.SecondayBusNumber == PCI[i].slot.p.Bus) {
- AGPBridge = info;
- break;
- }
- }
- }
- }
- }
- }
- return NumDevices;
-}
-
-/****************************************************************************
-REMARKS:
-Enumerates useful information about attached display devices.
-****************************************************************************/
-static void ShowDisplayDevices(void)
-{
- int i,index;
-
- printf("Displaying enumeration of %d PCI display devices\n", NumDevices);
- printf("\n");
- printf("DeviceID SubSystem Base10h (length ) Base14h (length )\n");
- for (index = 0; index < NumDevices; index++) {
- i = DeviceIndex[index];
- printf("%04X:%04X %04X:%04X %08lX (%6ld KB) %08lX (%6ld KB)\n",
- PCI[i].VendorID,
- PCI[i].DeviceID,
- PCI[i].u.type0.SubSystemVendorID,
- PCI[i].u.type0.SubSystemID,
- PCI[i].u.type0.BaseAddress10,
- PCI[i].u.type0.BaseAddress10Len / 1024,
- PCI[i].u.type0.BaseAddress14,
- PCI[i].u.type0.BaseAddress14Len / 1024);
- }
- printf("\n");
-}
-
-/****************************************************************************
-REMARKS:
-Dumps the value for a write combine region to the display.
-****************************************************************************/
-static char *DecodeWCType(
- uint type)
-{
- static char *names[] = {
- "UNCACHABLE",
- "WRCOMB",
- "UNKNOWN",
- "UNKNOWN",
- "WRTHROUGH",
- "WRPROT",
- "WRBACK",
- };
- if (type <= PM_MTRR_MAX)
- return names[type];
- return "UNKNOWN";
-}
-
-/****************************************************************************
-REMARKS:
-Dumps the value for a write combine region to the display.
-****************************************************************************/
-static void PMAPI EnumWriteCombine(
- ulong base,
- ulong length,
- uint type)
-{
- printf("%08lX %-10ld %s\n", base, length / 1024, DecodeWCType(type));
-}
-
-/****************************************************************************
-PARAMETERS:
-err - Error to log
-
-REMARKS:
-Function to log an error message if the MTRR write combining attempt failed.
-****************************************************************************/
-static void LogMTRRError(
- int err)
-{
- if (err == PM_MTRR_ERR_OK)
- return;
- switch (err) {
- case PM_MTRR_NOT_SUPPORTED:
- printf("Failed: MTRR is not supported by host CPU\n");
- break;
- case PM_MTRR_ERR_PARAMS:
- printf("Failed: Invalid parameters passed to PM_enableWriteCombined!\n");
- break;
- case PM_MTRR_ERR_NOT_4KB_ALIGNED:
- printf("Failed: Address is not 4Kb aligned!\n");
- break;
- case PM_MTRR_ERR_BELOW_1MB:
- printf("Failed: Addresses below 1Mb cannot be write combined!\n");
- break;
- case PM_MTRR_ERR_NOT_ALIGNED:
- printf("Failed: Address is not correctly aligned for processor!\n");
- break;
- case PM_MTRR_ERR_OVERLAP:
- printf("Failed: Address overlaps an existing region!\n");
- break;
- case PM_MTRR_ERR_TYPE_MISMATCH:
- printf("Failed: Adress is contained with existing region, but type is different!\n");
- break;
- case PM_MTRR_ERR_NONE_FREE:
- printf("Failed: Out of MTRR registers!\n");
- break;
- case PM_MTRR_ERR_NOWRCOMB:
- printf("Failed: This processor does not support write combining!\n");
- break;
- case PM_MTRR_ERR_NO_OS_SUPPORT:
- printf("Failed: MTRR is not supported by host OS\n");
- break;
- default:
- printf("Failed: UNKNOWN ERROR!\n");
- break;
- }
- exit(-1);
-}
-
-/****************************************************************************
-REMARKS:
-Shows all write combine regions.
-****************************************************************************/
-static void ShowWriteCombine(void)
-{
- printf("Base Length(KB) Type\n");
- LogMTRRError(PM_enumWriteCombine(EnumWriteCombine));
- printf("\n");
-}
-
-/****************************************************************************
-REMARKS:
-Dumps the value for a write combine region to the display.
-****************************************************************************/
-static void EnableWriteCombine(void)
-{
- int i,index;
-
- for (index = 0; index < NumDevices; index++) {
- i = DeviceIndex[index];
- if (PCI[i].u.type0.BaseAddress10 & 0x8) {
- LogMTRRError(PM_enableWriteCombine(
- PCI[i].u.type0.BaseAddress10 & 0xFFFFFFF0,
- PCI[i].u.type0.BaseAddress10Len,
- PM_MTRR_WRCOMB));
- }
- if (PCI[i].u.type0.BaseAddress14 & 0x8) {
- LogMTRRError(PM_enableWriteCombine(
- PCI[i].u.type0.BaseAddress14 & 0xFFFFFFF0,
- PCI[i].u.type0.BaseAddress14Len,
- PM_MTRR_WRCOMB));
- }
- }
- printf("\n");
- ShowDisplayDevices();
- ShowWriteCombine();
-}
-
-/****************************************************************************
-REMARKS:
-Dumps the value for a write combine region to the display.
-****************************************************************************/
-static void DisableWriteCombine(void)
-{
- int i,index;
-
- for (index = 0; index < NumDevices; index++) {
- i = DeviceIndex[index];
- if (PCI[i].u.type0.BaseAddress10 & 0x8) {
- LogMTRRError(PM_enableWriteCombine(
- PCI[i].u.type0.BaseAddress10 & 0xFFFFFFF0,
- PCI[i].u.type0.BaseAddress10Len,
- PM_MTRR_UNCACHABLE));
- }
- if (PCI[i].u.type0.BaseAddress14 & 0x8) {
- LogMTRRError(PM_enableWriteCombine(
- PCI[i].u.type0.BaseAddress14 & 0xFFFFFFF0,
- PCI[i].u.type0.BaseAddress14Len,
- PM_MTRR_UNCACHABLE));
- }
- }
- printf("\n");
- ShowDisplayDevices();
- ShowWriteCombine();
-}
-
-int main(int argc,char *argv[])
-{
- PM_init();
- if (PCI_enumerateDevices() < 1) {
- printf("No PCI display devices found!\n");
- return -1;
- }
- if (argc < 2) {
- printf("usage: uswc [-show -on -off]\n\n");
- ShowDisplayDevices();
- return -1;
- }
- if (stricmp(argv[1],"-show") == 0)
- ShowWriteCombine();
- else if (stricmp(argv[1],"-on") == 0)
- EnableWriteCombine();
- else if (stricmp(argv[1],"-off") == 0)
- DisableWriteCombine();
- return 0;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/tests/vftest.c b/board/MAI/bios_emulator/scitech/src/pm/tests/vftest.c
deleted file mode 100644
index b7e3bb7846..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/tests/vftest.c
+++ /dev/null
@@ -1,78 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Filename: $Workfile$
-* Version: $Revision: 1.1 $
-*
-* Language: ANSI C
-* Environment: any
-*
-* Description: Test program to test the VFlat virtual framebuffer functions.
-*
-* Functions tested: VF_available()
-* VF_init()
-* VF_exit()
-*
-* $Date: 2002/10/02 15:35:21 $ $Author: hfrieden $
-*
-****************************************************************************/
-
-#include <stdlib.h>
-#include <stdio.h>
-#include "pmapi.h"
-
-uchar code[] = {
- 0xC3, /* ret */
- };
-
-int main(void)
-{
- void *vfBuffer;
-
- printf("Program running in ");
- switch (PM_getModeType()) {
- case PM_realMode:
- printf("real mode.\n\n");
- break;
- case PM_286:
- printf("16 bit protected mode.\n\n");
- break;
- case PM_386:
- printf("32 bit protected mode.\n\n");
- break;
- }
-
- if (!VF_available()) {
- printf("Virtual Linear Framebuffer not available.\n");
- exit(1);
- }
-
- vfBuffer = VF_init(0xA0000,64,sizeof(code),code);
- if (!vfBuffer) {
- printf("Failure to initialise Virtual Linear Framebuffer!\n");
- exit(1);
- }
- VF_exit();
- printf("Virtual Linear Framebuffer set up successfully!\n");
- return 0;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/tests/video.c b/board/MAI/bios_emulator/scitech/src/pm/tests/video.c
deleted file mode 100644
index 92adcddd49..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/tests/video.c
+++ /dev/null
@@ -1,199 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: any
-*
-* Description: Test program to check the ability to generate real mode
-* interrupts and to be able to obtain direct access to the
-* video memory from protected mode. Compile and link with
-* the appropriate command line for your DOS extender.
-*
-* Functions tested: PM_getBIOSSelector()
-* PM_mapPhysicalAddr()
-* PM_int86()
-*
-****************************************************************************/
-
-#include <stdlib.h>
-#include <stdio.h>
-#include "pmapi.h"
-
-uchar *bios; /* Pointer to BIOS data area */
-uchar *videoPtr; /* Pointer to VGA framebuffer */
-void *stateBuf; /* Console state save buffer */
-
-/* Routine to return the current video mode number */
-
-int getVideoMode(void)
-{
- return PM_getByte(bios+0x49);
-}
-
-/* Routine to set a specified video mode */
-
-void setVideoMode(int mode)
-{
- RMREGS r;
-
- r.x.ax = mode;
- PM_int86(0x10, &r, &r);
-}
-
-/* Routine to clear a rectangular region on the display by calling the
- * video BIOS.
- */
-
-void clearScreen(int startx, int starty, int endx, int endy, unsigned char attr)
-{
- RMREGS r;
-
- r.x.ax = 0x0600;
- r.h.bh = attr;
- r.h.cl = startx;
- r.h.ch = starty;
- r.h.dl = endx;
- r.h.dh = endy;
- PM_int86(0x10, &r, &r);
-}
-
-/* Routine to fill a rectangular region on the display using direct
- * video writes.
- */
-
-#define SCREEN(x,y) (videoPtr + ((y) * 160) + ((x) << 1))
-
-void fill(int startx, int starty, int endx, int endy, unsigned char c,
- unsigned char attr)
-{
- unsigned char *v;
- int x,y;
-
- for (y = starty; y <= endy; y++) {
- v = SCREEN(startx,y);
- for (x = startx; x <= endx; x++) {
- *v++ = c;
- *v++ = attr;
- }
- }
-}
-
-/* Routine to display a single character using direct video writes */
-
-void writeChar(int x, int y, unsigned char c, unsigned char attr)
-{
- unsigned char *v = SCREEN(x,y);
- *v++ = c;
- *v = attr;
-}
-
-/* Routine to draw a border around a rectangular area using direct video
- * writes.
- */
-
-static unsigned char border_chars[] = {
- 186, 205, 201, 187, 200, 188 /* double box chars */
- };
-
-void border(int startx, int starty, int endx, int endy, unsigned char attr)
-{
- unsigned char *v;
- unsigned char *b;
- int i;
-
- b = border_chars;
-
- for (i = starty+1; i < endy; i++) {
- writeChar(startx, i, *b, attr);
- writeChar(endx, i, *b, attr);
- }
- b++;
- for (i = startx+1, v = SCREEN(startx+1, starty); i < endx; i++) {
- *v++ = *b;
- *v++ = attr;
- }
- for (i = startx+1, v = SCREEN(startx+1, endy); i < endx; i++) {
- *v++ = *b;
- *v++ = attr;
- }
- b++;
- writeChar(startx, starty, *b++, attr);
- writeChar(endx, starty, *b++, attr);
- writeChar(startx, endy, *b++, attr);
- writeChar(endx, endy, *b++, attr);
-}
-
-int main(void)
-{
- int orgMode;
- PM_HWND hwndConsole;
-
- printf("Program running in ");
- switch (PM_getModeType()) {
- case PM_realMode:
- printf("real mode.\n\n");
- break;
- case PM_286:
- printf("16 bit protected mode.\n\n");
- break;
- case PM_386:
- printf("32 bit protected mode.\n\n");
- break;
- }
-
- hwndConsole = PM_openConsole(0,0,0,0,0,true);
- printf("Hit any key to start 80x25 text mode and perform some direct video output.\n");
- PM_getch();
-
- /* Allocate a buffer to save console state and save the state */
- if ((stateBuf = PM_malloc(PM_getConsoleStateSize())) == NULL) {
- printf("Unable to allocate console state buffer!\n");
- exit(1);
- }
- PM_saveConsoleState(stateBuf,0);
- bios = PM_getBIOSPointer();
- orgMode = getVideoMode();
- setVideoMode(0x3);
- if ((videoPtr = PM_mapPhysicalAddr(0xB8000,0xFFFF,true)) == NULL) {
- printf("Unable to obtain pointer to framebuffer!\n");
- exit(1);
- }
-
- /* Draw some text on the screen */
- fill(0, 0, 79, 24, 176, 0x1E);
- border(0, 0, 79, 24, 0x1F);
- PM_getch();
- clearScreen(0, 0, 79, 24, 0x7);
-
- /* Restore the console state on exit */
- PM_restoreConsoleState(stateBuf,0);
- PM_free(stateBuf);
- PM_closeConsole(hwndConsole);
-
- /* Display useful status information */
- printf("\n");
- printf("Original Video Mode = %02X\n", orgMode);
- printf("BIOS Pointer = %08X\n", (int)bios);
- printf("Video Memory = %08X\n", (int)videoPtr);
- return 0;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/vdd/cpuinfo.c b/board/MAI/bios_emulator/scitech/src/pm/vdd/cpuinfo.c
deleted file mode 100644
index 3460b72456..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/vdd/cpuinfo.c
+++ /dev/null
@@ -1,66 +0,0 @@
-/****************************************************************************
-*
-* Ultra Long Period Timer
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: 32-bit OS/2 VDD
-*
-* Description: VDD specific code for the CPU detection module.
-*
-****************************************************************************/
-
-/*----------------------------- Implementation ----------------------------*/
-
-/****************************************************************************
-REMARKS:
-Do nothing for VDD's
-****************************************************************************/
-#define SetMaxThreadPriority() 0
-
-/****************************************************************************
-REMARKS:
-Do nothing for VDD's
-****************************************************************************/
-#define RestoreThreadPriority(i) (void)(i)
-
-/****************************************************************************
-REMARKS:
-Initialise the counter and return the frequency of the counter.
-****************************************************************************/
-static void GetCounterFrequency(
- CPU_largeInteger *freq)
-{
- freq->low = 100000;
- freq->high = 0;
-}
-
-/****************************************************************************
-REMARKS:
-Read the counter and return the counter value.
-****************************************************************************/
-#define GetCounter(t) \
-{ \
- ULONG count; \
- count = VDHQuerySysValue(0, VDHGSV_MSECSBOOT); \
- (t)->low = count * 100; \
- (t)->high = 0; \
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/vdd/fileio.c b/board/MAI/bios_emulator/scitech/src/pm/vdd/fileio.c
deleted file mode 100644
index 93742de914..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/vdd/fileio.c
+++ /dev/null
@@ -1,359 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: 32-bit OS/2 VDD
-*
-* Description: C library compatible I/O functions for use within a VDD.
-*
-****************************************************************************/
-
-#include "pmapi.h"
-#include "vddfile.h"
-
-/*------------------------ Main Code Implementation -----------------------*/
-
-#define EOF -1
-
-/* NB: none of the file VDHs are available during the DOS session */
-/* initialzation context! */
-
-/* Macros for Open/Close APIs to allow using this module in both VDDs and */
-/* normal OS/2 applications. Unfortunately VDHRead/Write/Seek don't map to */
-/* their Dos* counterparts so cleanly. */
-#ifdef __OS2_VDD__
-#define _OS2Open VDHOpen
-#define _OS2Close VDHClose
-#else
-#define _OS2Open DosOpen
-#define _OS2Close DosClose
-#endif
-
-/****************************************************************************
-REMARKS:
-VDD implementation of the ANSI C fopen function.
-****************************************************************************/
-FILE * fopen(
- const char *filename,
- const char *mode)
-{
- FILE *f = PM_malloc(sizeof(FILE));
- long oldpos;
- ULONG rc, ulAction;
- ULONG omode, oflags;
-
- if (f != NULL) {
- f->offset = 0;
- f->text = (mode[1] == 't' || mode[2] == 't');
- f->writemode = (mode[0] == 'w') || (mode[0] == 'a');
- f->unputc = EOF;
- f->endp = f->buf + sizeof(f->buf);
- f->curp = f->startp = f->buf;
-
- if (mode[0] == 'r') {
- #ifdef __OS2_VDD__
- omode = VDHOPEN_ACCESS_READONLY | VDHOPEN_SHARE_DENYNONE;
- oflags = VDHOPEN_ACTION_OPEN_IF_EXISTS | VDHOPEN_ACTION_FAIL_IF_NEW;
- #else
- omode = OPEN_ACCESS_READONLY | OPEN_SHARE_DENYNONE;
- oflags = OPEN_ACTION_OPEN_IF_EXISTS | OPEN_ACTION_FAIL_IF_NEW;
- #endif
- }
- else if (mode[0] == 'w') {
- #ifdef __OS2_VDD__
- omode = VDHOPEN_ACCESS_WRITEONLY | VDHOPEN_SHARE_DENYWRITE;
- oflags = VDHOPEN_ACTION_REPLACE_IF_EXISTS | VDHOPEN_ACTION_CREATE_IF_NEW;
- #else
- omode = OPEN_ACCESS_WRITEONLY | OPEN_SHARE_DENYWRITE;
- oflags = OPEN_ACTION_REPLACE_IF_EXISTS | OPEN_ACTION_CREATE_IF_NEW;
- #endif
- }
- else {
- #ifdef __OS2_VDD__
- omode = VDHOPEN_ACCESS_READWRITE | VDHOPEN_SHARE_DENYWRITE;
- oflags = VDHOPEN_ACTION_OPEN_IF_EXISTS | VDHOPEN_ACTION_CREATE_IF_NEW;
- #else
- omode = OPEN_ACCESS_READWRITE | OPEN_SHARE_DENYWRITE;
- oflags = OPEN_ACTION_OPEN_IF_EXISTS | OPEN_ACTION_CREATE_IF_NEW;
- #endif
- }
- rc = _OS2Open((PSZ)filename, (PHFILE)&f->handle, &ulAction, 0, VDHOPEN_FILE_NORMAL, oflags, omode, NULL);
- if (rc != 0) {
- PM_free(f);
- return NULL;
- }
-
- #ifdef __OS2_VDD__
- f->filesize = VDHSeek((HFILE)f->handle, 0, VDHSK_END_OF_FILE);
- #else
- rc = DosSetFilePtr((HFILE)f->handle, 0, FILE_END, &f->filesize);
- #endif
-
- if (mode[0] == 'a')
- fseek(f,0,2);
- }
- return f;
-}
-
-/****************************************************************************
-REMARKS:
-VDD implementation of the ANSI C fread function. Note that unlike Windows VxDs,
-OS/2 VDDs are not limited to 64K reads or writes.
-****************************************************************************/
-size_t fread(
- void *ptr,
- size_t size,
- size_t n,
- FILE *f)
-{
- char *buf = ptr;
- int bytes,readbytes,totalbytes = 0;
-
- /* First copy any data already read into our buffer */
- if ((bytes = (f->curp - f->startp)) > 0) {
- memcpy(buf,f->curp,bytes);
- f->startp = f->curp = f->buf;
- buf += bytes;
- totalbytes += bytes;
- bytes = (size * n) - bytes;
- }
- else
- bytes = size * n;
- if (bytes) {
- #ifdef __OS2_VDD__
- readbytes = VDHRead((HFILE)f->handle, buf, bytes);
- #else
- DosRead((HFILE)f->handle, buf, bytes, &readbytes);
- #endif
- totalbytes += readbytes;
- f->offset += readbytes;
- }
- return totalbytes / size;
-}
-
-/****************************************************************************
-REMARKS:
-VDD implementation of the ANSI C fwrite function.
-****************************************************************************/
-size_t fwrite(
- void *ptr,
- size_t size,
- size_t n,
- FILE *f)
-{
- char *buf = ptr;
- int bytes,writtenbytes,totalbytes = 0;
-
- /* Flush anything already in the buffer */
- if (!f->writemode)
- return 0;
- fflush(f);
- bytes = size * n;
- #ifdef __OS2_VDD__
- writtenbytes = VDHWrite((HFILE)f->handle, buf, bytes);
- #else
- DosWrite((HFILE)f->handle, buf, bytes, &writtenbytes);
- #endif
- totalbytes += writtenbytes;
- f->offset += writtenbytes;
- if (f->offset > f->filesize)
- f->filesize = f->offset;
- return totalbytes / size;
-}
-
-/****************************************************************************
-REMARKS:
-VxD implementation of the ANSI C fflush function.
-****************************************************************************/
-int fflush(
- FILE *f)
-{
- ULONG bytes;
-
- /* First copy any data already written into our buffer */
- if (f->writemode && (bytes = (f->curp - f->startp)) > 0) {
- #ifdef __OS2_VDD__
- bytes = VDHWrite((HFILE)f->handle, f->startp, bytes);
- #else
- DosWrite((HFILE)f->handle, f->startp, bytes, &bytes);
- #endif
- f->offset += bytes;
- if (f->offset > f->filesize)
- f->filesize = f->offset;
- f->startp = f->curp = f->buf;
- }
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-VDD implementation of the ANSI C fseek function.
-****************************************************************************/
-int fseek(
- FILE *f,
- long int offset,
- int whence)
-{
- fflush(f);
-
- if (whence == 0)
- f->offset = offset;
- else if (whence == 1)
- f->offset += offset;
- else if (whence == 2)
- f->offset = f->filesize + offset;
-
- #ifdef __OS2_VDD__
- VDHSeek((HFILE)f->handle, f->offset, VDHSK_ABSOLUTE);
- #else
- DosSetFilePtr((HFILE)f->handle, f->offset, FILE_BEGIN, NULL);
- #endif
-
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-VDD implementation of the ANSI C ftell function.
-****************************************************************************/
-long ftell(
- FILE *f)
-{
- long offset;
-
- offset = (f->curp - f->startp);
- offset += f->offset;
- return offset;
-}
-
-/****************************************************************************
-REMARKS:
-VDD implementation of the ANSI C feof function.
-****************************************************************************/
-int feof(
- FILE *f)
-{
- return (f->offset == f->filesize);
-}
-
-/****************************************************************************
-REMARKS:
-Read a single character from the input file buffer, including translation
-of the character in text transation modes.
-****************************************************************************/
-static int __getc(
- FILE *f)
-{
- int c;
-
- if (f->unputc != EOF) {
- c = f->unputc;
- f->unputc = EOF;
- }
- else {
- if (f->startp == f->curp) {
- int bytes = fread(f->buf,1,sizeof(f->buf),f);
- if (bytes == 0)
- return EOF;
- f->curp = f->startp + bytes;
- }
- c = *f->startp++;
- if (f->text && c == '\r') {
- int nc = __getc(f);
- if (nc != '\n')
- f->unputc = nc;
- }
- }
- return c;
-}
-
-/****************************************************************************
-REMARKS:
-Write a single character from to input buffer, including translation of the
-character in text transation modes.
-****************************************************************************/
-static int __putc(int c,FILE *f)
-{
- int count = 1;
- if (f->text && c == '\n') {
- __putc('\r',f);
- count = 2;
- }
- if (f->curp == f->endp)
- fflush(f);
- *f->curp++ = c;
- return count;
-}
-
-/****************************************************************************
-REMARKS:
-VxD implementation of the ANSI C fgets function.
-****************************************************************************/
-char *fgets(
- char *s,
- int n,
- FILE *f)
-{
- int c = 0;
- char *cs;
-
- cs = s;
- while (--n > 0 && (c = __getc(f)) != EOF) {
- *cs++ = c;
- if (c == '\n')
- break;
- }
- if (c == EOF && cs == s)
- return NULL;
- *cs = '\0';
- return s;
-}
-
-/****************************************************************************
-REMARKS:
-VxD implementation of the ANSI C fputs function.
-****************************************************************************/
-int fputs(
- const char *s,
- FILE *f)
-{
- int r = 0;
- int c;
-
- while ((c = *s++) != 0)
- r = __putc(c, f);
- return r;
-}
-
-/****************************************************************************
-REMARKS:
-VxD implementation of the ANSI C fclose function.
-****************************************************************************/
-int fclose(
- FILE *f)
-{
- fflush(f);
- _OS2Close((HFILE)f->handle);
- PM_free(f);
- return 0;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/vdd/oshdr.h b/board/MAI/bios_emulator/scitech/src/pm/vdd/oshdr.h
deleted file mode 100644
index 03286bdc2e..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/vdd/oshdr.h
+++ /dev/null
@@ -1,29 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: 32-bit OS/2 VDD
-*
-* Description: Include file to include all OS specific header files.
-*
-****************************************************************************/
diff --git a/board/MAI/bios_emulator/scitech/src/pm/vdd/pm.c b/board/MAI/bios_emulator/scitech/src/pm/vdd/pm.c
deleted file mode 100644
index 6688babd0d..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/vdd/pm.c
+++ /dev/null
@@ -1,1050 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: 32-bit OS/2 VDD
-*
-* Description: Implementation for the OS Portability Manager Library, which
-* contains functions to implement OS specific services in a
-* generic, cross platform API. Porting the OS Portability
-* Manager library is the first step to porting any SciTech
-* products to a new platform.
-*
-****************************************************************************/
-
-#include "pmapi.h"
-#include "drvlib/os/os.h"
-#include "sdd/sddhelp.h"
-#include "mtrr.h"
-
-#define TRACE(a)
-
-/*--------------------------- Global variables ----------------------------*/
-
-#define MAX_MEMORY_SHARED 100
-#define MAX_MEMORY_MAPPINGS 100
-
-/* TODO: I think the global and linear members will be the same, but not sure yet. */
-typedef struct {
- void *linear;
- ulong global;
- ulong length;
- int npages;
- } memshared;
-
-typedef struct {
- ulong physical;
- ulong linear;
- ulong length;
- int npages;
- ibool isCached;
- } mmapping;
-
-static int numMappings = 0;
-static memshared shared[MAX_MEMORY_MAPPINGS] = {0};
-static mmapping maps[MAX_MEMORY_MAPPINGS];
-ibool _PM_haveBIOS = TRUE;
-char _PM_cntPath[PM_MAX_PATH] = ""; /* there just isn't any */
-uchar *_PM_rmBufAddr = NULL;
-ushort _VARAPI PM_savedDS = 0; /* why can't I use the underscore prefix? */
-
-HVDHSEM hevFarCallRet = NULL;
-HVDHSEM hevIRet = NULL;
-HHOOK hhookUserReturnHook = NULL;
-HHOOK hhookUserIRetHook = NULL;
-
-static void (PMAPIP fatalErrorCleanup)(void) = NULL;
-
-/*----------------------------- Implementation ----------------------------*/
-
-/* Functions to read and write CMOS registers */
-
-ulong PMAPI _PM_getPDB(void);
-uchar PMAPI _PM_readCMOS(int index);
-void PMAPI _PM_writeCMOS(int index,uchar value);
-
-VOID HOOKENTRY UserReturnHook(PVOID pRefData, PCRF pcrf);
-VOID HOOKENTRY UserIRetHook(PVOID pRefData, PCRF pcrf);
-
-void PMAPI PM_init(void)
-{
- MTRR_init();
-
- /* Initialize VDD-specific data */
- /* Note: PM_init must be (obviously) called in VDM task context! */
- VDHCreateSem(&hevFarCallRet, VDH_EVENTSEM);
- VDHCreateSem(&hevIRet, VDH_EVENTSEM);
- hhookUserReturnHook = VDHAllocHook(VDH_RETURN_HOOK, (PFNARM)UserReturnHook, 0);
- hhookUserIRetHook = VDHAllocHook(VDH_RETURN_HOOK, (PFNARM)UserIRetHook, 0);
-
- if ((hevIRet == NULL) || (hevFarCallRet == NULL) ||
- (hhookUserReturnHook == NULL) || (hhookUserIRetHook == NULL)) {
- /* something failed, we can't go on */
- /* TODO: take some action here! */
- }
-}
-
-/* Do some cleaning up */
-void PMAPI PM_exit(void)
-{
- /* Note: Hooks allocated during or after VDM creation are deallocated automatically */
- if (hevIRet != NULL)
- VDHDestroySem(hevIRet);
-
- if (hevFarCallRet != NULL)
- VDHDestroySem(hevFarCallRet);
-}
-
-ibool PMAPI PM_haveBIOSAccess(void)
-{ return _PM_haveBIOS; }
-
-long PMAPI PM_getOSType(void)
-{ return /*_OS_OS2VDD*/ _OS_OS2; } /*FIX!! */
-
-int PMAPI PM_getModeType(void)
-{ return PM_386; }
-
-void PMAPI PM_backslash(char *s)
-{
- uint pos = strlen(s);
- if (s[pos-1] != '\\') {
- s[pos] = '\\';
- s[pos+1] = '\0';
- }
-}
-
-void PMAPI PM_setFatalErrorCleanup(
- void (PMAPIP cleanup)(void))
-{
- fatalErrorCleanup = cleanup;
-}
-
-void PMAPI PM_fatalError(const char *msg)
-{
- if (fatalErrorCleanup)
- fatalErrorCleanup();
-/* Fatal_Error_Handler(msg,0); TODO: implement somehow! */
-}
-
-/****************************************************************************
-PARAMETERS:
-len - Place to store the length of the buffer
-rseg - Place to store the real mode segment of the buffer
-roff - Place to store the real mode offset of the buffer
-
-REMARKS:
-This function returns the address and length of the global VESA transfer
-buffer.
-****************************************************************************/
-void * PMAPI PM_getVESABuf(
- uint *len,
- uint *rseg,
- uint *roff)
-{
- if (_PM_rmBufAddr) {
- *len = 0; /*VESA_BUF_SIZE; */
- *rseg = (ulong)(_PM_rmBufAddr) >> 4;
- *roff = (ulong)(_PM_rmBufAddr) & 0xF;
- return _PM_rmBufAddr;
- }
- return NULL;
-}
-
-int PMAPI PM_int386(int intno, PMREGS *in, PMREGS *out)
-{
- /* Unused in VDDs */
- return 0;
-}
-
-char * PMAPI PM_getCurrentPath(char *path,int maxLen)
-{
- strncpy(path, _PM_cntPath, maxLen);
- path[maxLen - 1] = 0;
- return path;
-}
-
-char PMAPI PM_getBootDrive(void)
-{
- ulong boot = 3;
- boot = VDHQuerySysValue(0, VDHGSV_BOOTDRV);
- return (char)('a' + boot - 1);
-}
-
-const char * PMAPI PM_getVBEAFPath(void)
-{
- static char path[CCHMAXPATH];
- strcpy(path,"x:\\");
- path[0] = PM_getBootDrive();
- return path;
-}
-
-const char * PMAPI PM_getNucleusPath(void)
-{
- static char path[CCHMAXPATH];
- strcpy(path,"x:\\os2\\drivers");
- path[0] = PM_getBootDrive();
- PM_backslash(path);
- strcat(path,"nucleus");
- return path;
-}
-
-const char * PMAPI PM_getNucleusConfigPath(void)
-{
- static char path[256];
- strcpy(path,PM_getNucleusPath());
- PM_backslash(path);
- strcat(path,"config");
- return path;
-}
-
-const char * PMAPI PM_getUniqueID(void)
-{ return PM_getMachineName(); }
-
-const char * PMAPI PM_getMachineName(void)
-{
- return "Unknown";
-}
-
-int PMAPI PM_kbhit(void)
-{ return 1; }
-
-int PMAPI PM_getch(void)
-{ return 0; }
-
-PM_HWND PMAPI PM_openConsole(PM_HWND hwndUser,int device,int xRes,int yRes,int bpp,ibool fullScreen)
-{
- /* Unused in VDDs */
- return NULL;
-}
-
-int PMAPI PM_getConsoleStateSize(void)
-{
- /* Unused in VDDs */
- return 1;
-}
-
-void PMAPI PM_saveConsoleState(void *stateBuf,PM_HWND hwndConsole)
-{
- /* Unused in VDDs */
-}
-
-void PMAPI PM_setSuspendAppCallback(int (_ASMAPIP saveState)(int flags))
-{
- /* Unused in VDDs */
-}
-
-void PMAPI PM_restoreConsoleState(const void *stateBuf,PM_HWND hwndConsole)
-{
- /* Unused in VDDs */
-}
-
-void PMAPI PM_closeConsole(PM_HWND hwndConsole)
-{
- /* Unused in VDDs */
-}
-
-void PMAPI PM_setOSCursorLocation(int x,int y)
-{
- uchar *_biosPtr = PM_getBIOSPointer();
- PM_setByte(_biosPtr+0x50,x);
- PM_setByte(_biosPtr+0x51,y);
-}
-
-void PMAPI PM_setOSScreenWidth(int width,int height)
-{
- uchar *_biosPtr = PM_getBIOSPointer();
- PM_setByte(_biosPtr+0x4A,width);
- PM_setByte(_biosPtr+0x84,height-1);
-}
-
-/****************************************************************************
-REMARKS:
-Allocate a block of shared memory. For OS/2 VDD we allocate shared memory
-as locked, global memory that is accessible from any memory context
-(including interrupt time context), which allows us to load our important
-data structure and code such that we can access it directly from a ring
-0 interrupt context.
-****************************************************************************/
-void * PMAPI PM_mallocShared(long size)
-{
- ULONG nPages = (size + 0xFFF) >> 12;
- int i;
-
- /* First find a free slot in our shared memory table */
- for (i = 0; i < MAX_MEMORY_SHARED; i++) {
- if (shared[i].linear == 0)
- break;
- }
- if (i < MAX_MEMORY_SHARED) {
- shared[i].linear = VDHAllocPages(NULL, nPages, VDHAP_SYSTEM | VDHAP_FIXED);
- shared[i].npages = nPages;
- shared[i].global = (ULONG)shared[i].linear;
- return (void*)shared[i].global;
- }
- return NULL;
-}
-
-/****************************************************************************
-REMARKS:
-Free a block of shared memory
-****************************************************************************/
-void PMAPI PM_freeShared(void *p)
-{
- int i;
-
- /* Find a shared memory block in our table and free it */
- for (i = 0; i < MAX_MEMORY_SHARED; i++) {
- if (shared[i].global == (ulong)p) {
- VDHFreePages(shared[i].linear);
- shared[i].linear = 0;
- break;
- }
- }
-}
-
-void * PMAPI PM_mapToProcess(void *base,ulong limit)
-{ return (void*)base; }
-
-ibool PMAPI PM_doBIOSPOST(
- ushort axVal,
- ulong BIOSPhysAddr,
- void *mappedBIOS,
- ulong BIOSLen)
-{
- /* TODO: Figure out how to do this */
- return false;
-}
-
-void * PMAPI PM_getBIOSPointer(void)
-{ return (void*)0x400; }
-
-void * PMAPI PM_getA0000Pointer(void)
-{ return PM_mapPhysicalAddr(0xA0000,0xFFFF,true); }
-
-/****************************************************************************
-PARAMETERS:
-base - Physical base address of the memory to maps in
-limit - Limit of physical memory to region to maps in
-
-RETURNS:
-Linear address of the newly mapped memory.
-
-REMARKS:
-Maps a physical memory range to a linear memory range.
-****************************************************************************/
-ulong MapPhysicalToLinear(
- ulong base,
- ulong limit,
- int *npages)
-{
- ulong linear,length = limit+1;
- int i,ppage,flags;
-#if 0
- ppage = base >> 12;
- *npages = (length + (base & 0xFFF) + 4095) >> 12;
- flags = PR_FIXED | PR_STATIC;
- if (base == 0xA0000) {
- /* We require the linear address to be aligned to a 64Kb boundary
- * for mapping the banked framebuffer (so we can do efficient
- * carry checking for bank changes in the assembler code). The only
- * way to ensure this is to force the linear address to be aligned
- * to a 4Mb boundary.
- */
- flags |= PR_4MEG;
- }
- if ((linear = (ulong)PageReserve(PR_SYSTEM,*npages,flags)) == (ulong)-1)
- return 0;
- if (!PageCommitPhys(linear >> 12,*npages,ppage,PC_INCR | PC_USER | PC_WRITEABLE))
- return 0;
-#endif
- return linear + (base & 0xFFF);
-}
-
-/****************************************************************************
-PARAMETERS:
-base - Physical base address of the memory to map in
-limit - Limit of physical memory to region to map in
-isCached - True if the memory should be cached, false if not
-
-RETURNS:
-Linear address of the newly mapped memory.
-
-REMARKS:
-This function maps physical memory to linear memory, which can then be used
-to create a selector or used directly from 32-bit protected mode programs.
-This is better than DPMI 0x800, since it allows you to maps physical
-memory below 1Mb, which gets this memory out of the way of the Windows VxD's
-sticky paws.
-
-NOTE: If the memory is not expected to be cached, this function will
- directly re-program the PCD (Page Cache Disable) bit in the
- page tables. There does not appear to be a mechanism in the VMM
- to control this bit via the regular interface.
-****************************************************************************/
-void * PMAPI PM_mapPhysicalAddr(
- ulong base,
- ulong limit,
- ibool isCached)
-{
- ulong linear,length = limit+1;
- int i,npages;
- ulong PDB,*pPDB;
-
- /* Search table of existing mappings to see if we have already mapped
- * a region of memory that will serve this purpose.
- */
- for (i = 0; i < numMappings; i++) {
- if (maps[i].physical == base && maps[i].length == length && maps[i].isCached == isCached)
- return (void*)maps[i].linear;
- }
- if (numMappings == MAX_MEMORY_MAPPINGS)
- return NULL;
-
- /* We did not find any previously mapped memory region, so map it in.
- * Note that we do not use MapPhysToLinear, since this function appears
- * to have problems mapping memory in the 1Mb physical address space.
- * Hence we use PageReserve and PageCommitPhys.
- */
- if ((linear = MapPhysicalToLinear(base,limit,&npages)) == 0)
- return NULL;
- maps[numMappings].physical = base;
- maps[numMappings].length = length;
- maps[numMappings].linear = linear;
- maps[numMappings].npages = npages;
- maps[numMappings].isCached = isCached;
- numMappings++;
-
-#if 0
- /* Finally disable caching where necessary */
- if (!isCached && (PDB = _PM_getPDB()) != 0) {
- int startPDB,endPDB,iPDB,startPage,endPage,start,end,iPage;
- ulong pageTable,*pPageTable;
-
- if (PDB >= 0x100000)
- pPDB = (ulong*)MapPhysicalToLinear(PDB,0xFFF,&npages);
- else
- pPDB = (ulong*)PDB;
- if (pPDB) {
- startPDB = (linear >> 22) & 0x3FF;
- startPage = (linear >> 12) & 0x3FF;
- endPDB = ((linear+limit) >> 22) & 0x3FF;
- endPage = ((linear+limit) >> 12) & 0x3FF;
- for (iPDB = startPDB; iPDB <= endPDB; iPDB++) {
- pageTable = pPDB[iPDB] & ~0xFFF;
- if (pageTable >= 0x100000)
- pPageTable = (ulong*)MapPhysicalToLinear(pageTable,0xFFF,&npages);
- else
- pPageTable = (ulong*)pageTable;
- start = (iPDB == startPDB) ? startPage : 0;
- end = (iPDB == endPDB) ? endPage : 0x3FF;
- for (iPage = start; iPage <= end; iPage++)
- pPageTable[iPage] |= 0x10;
- PageFree((ulong)pPageTable,PR_STATIC);
- }
- PageFree((ulong)pPDB,PR_STATIC);
- }
- }
-#endif
- return (void*)linear;
-}
-
-void PMAPI PM_freePhysicalAddr(void *ptr,ulong limit)
-{
- /* We never free the mappings */
-}
-
-void PMAPI PM_sleep(ulong milliseconds)
-{
- /* We never sleep in a VDD */
-}
-
-int PMAPI PM_getCOMPort(int port)
-{
- /* TODO: Re-code this to determine real values using the Plug and Play */
- /* manager for the OS. */
- switch (port) {
- case 0: return 0x3F8;
- case 1: return 0x2F8;
- }
- return 0;
-}
-
-int PMAPI PM_getLPTPort(int port)
-{
- /* TODO: Re-code this to determine real values using the Plug and Play */
- /* manager for the OS. */
- switch (port) {
- case 0: return 0x3BC;
- case 1: return 0x378;
- case 2: return 0x278;
- }
- return 0;
-}
-
-ulong PMAPI PM_getPhysicalAddr(void *p)
-{
- /* TODO: This function should find the physical address of a linear */
- /* address. */
- return 0xFFFFFFFFUL;
-}
-
-void PMAPI _PM_freeMemoryMappings(void)
-{
- int i;
-/* for (i = 0; i < numMappings; i++) */
-/* PageFree(maps[i].linear,PR_STATIC); */
-}
-
-void * PMAPI PM_mapRealPointer(uint r_seg,uint r_off)
-{ return (void*)MK_PHYS(r_seg,r_off); }
-
-void * PMAPI PM_allocRealSeg(uint size,uint *r_seg,uint *r_off)
-{ return NULL; }
-
-void PMAPI PM_freeRealSeg(void *mem)
-{ }
-
-void PMAPI DPMI_int86(int intno, DPMI_regs *regs)
-{
- /* Unsed in VDDs */
-}
-
-/****************************************************************************
-REMARKS:
-Load the V86 registers in the client state, and save the original state
-before loading the registers.
-****************************************************************************/
-static void LoadV86Registers(
- PCRF saveRegs,
- RMREGS *in,
- RMSREGS *sregs)
-{
- PCRF pcrf; /* current client register frame */
-
- /* get pointer to registers */
- pcrf = (PCRF)VDHQuerySysValue(CURRENT_VDM, VDHLSV_PCRF);
-
- /* Note: We could do VDHPushRegs instead but this should be safer as it */
- /* doesn't rely on the VDM session having enough free stack space. */
- *saveRegs = *pcrf; /* save all registers */
-
- pcrf->crf_eax = in->e.eax; /* load new values */
- pcrf->crf_ebx = in->e.ebx;
- pcrf->crf_ecx = in->e.ecx;
- pcrf->crf_edx = in->e.edx;
- pcrf->crf_esi = in->e.esi;
- pcrf->crf_edi = in->e.edi;
- pcrf->crf_es = sregs->es;
- pcrf->crf_ds = sregs->ds;
-
-}
-
-/****************************************************************************
-REMARKS:
-Read the V86 registers from the client state and restore the original state.
-****************************************************************************/
-static void ReadV86Registers(
- PCRF saveRegs,
- RMREGS *out,
- RMSREGS *sregs)
-{
- PCRF pcrf; /* current client register frame */
-
- /* get pointer to registers */
- pcrf = (PCRF)VDHQuerySysValue(CURRENT_VDM, VDHLSV_PCRF);
-
- /* read new register values */
- out->e.eax = pcrf->crf_eax;
- out->e.ebx = pcrf->crf_ebx;
- out->e.ecx = pcrf->crf_ecx;
- out->e.edx = pcrf->crf_edx;
- out->e.esi = pcrf->crf_esi;
- out->e.edi = pcrf->crf_edi;
- sregs->es = pcrf->crf_es;
- sregs->ds = pcrf->crf_ds;
-
- /* restore original client registers */
- *pcrf = *saveRegs;
-}
-
-/****************************************************************************
-REMARKS: Used for far calls into V86 code
-****************************************************************************/
-VOID HOOKENTRY UserReturnHook(
- PVOID pRefData,
- PCRF pcrf )
-{
- VDHPostEventSem(hevFarCallRet);
-}
-
-/****************************************************************************
-REMARKS: Used for calling BIOS interrupts
-****************************************************************************/
-VOID HOOKENTRY UserIRetHook(
- PVOID pRefData,
- PCRF pcrf )
-{
- VDHPostEventSem(hevIRet);
-}
-
-/****************************************************************************
-REMARKS:
-Call a V86 real mode function with the specified register values
-loaded before the call. The call returns with a far ret.
-Must be called from within a DOS session context!
-****************************************************************************/
-void PMAPI PM_callRealMode(
- uint seg,
- uint off,
- RMREGS *regs,
- RMSREGS *sregs)
-{
- CRF saveRegs;
- FPFN fnAddress;
- ULONG rc;
-
- TRACE("SDDHELP: Entering PM_callRealMode()\n");
- LoadV86Registers(SSToDS(&saveRegs),regs,sregs);
-
- /* set up return hook for call */
- rc = VDHArmReturnHook(hhookUserReturnHook, VDHARH_CSEIP_HOOK);
-
- VDHResetEventSem(hevFarCallRet);
-
- /* the address is a 16:32 pointer */
- OFFSETOF32(fnAddress) = off;
- SEGMENTOF32(fnAddress) = seg;
- rc = VDHPushFarCall(fnAddress);
- VDHYield(0);
-
- /* wait until the V86 call returns - our return hook posts the semaphore */
- rc = VDHWaitEventSem(hevFarCallRet, SEM_INDEFINITE_WAIT);
-
- ReadV86Registers(SSToDS(&saveRegs),regs,sregs);
- TRACE("SDDHELP: Exiting PM_callRealMode()\n");
-}
-
-/****************************************************************************
-REMARKS:
-Issue a V86 real mode interrupt with the specified register values
-loaded before the interrupt.
-Must be called from within a DOS session context!
-****************************************************************************/
-int PMAPI PM_int86(
- int intno,
- RMREGS *in,
- RMREGS *out)
-{
- RMSREGS sregs = {0};
- CRF saveRegs;
- ushort oldDisable;
- ULONG rc;
-
- memset(SSToDS(&sregs), 0, sizeof(sregs));
-
-#if 0 /* do we need this?? */
- /* Disable pass-up to our VDD handler so we directly call BIOS */
- TRACE("SDDHELP: Entering PM_int86()\n");
- if (disableTSRFlag) {
- oldDisable = *disableTSRFlag;
- *disableTSRFlag = 0;
- }
-#endif
-
- LoadV86Registers(SSToDS(&saveRegs), in, SSToDS(&sregs));
-
- VDHResetEventSem(hevIRet);
- rc = VDHPushInt(intno);
-
- /* set up return hook for interrupt */
- rc = VDHArmReturnHook(hhookUserIRetHook, VDHARH_NORMAL_IRET);
-
- VDHYield(0);
-
- /* wait until the V86 IRETs - our return hook posts the semaphore */
- rc = VDHWaitEventSem(hevIRet, 5000); /*SEM_INDEFINITE_WAIT); */
-
- ReadV86Registers(SSToDS(&saveRegs), out, SSToDS(&sregs));
-
-#if 0
- /* Re-enable pass-up to our VDD handler if previously enabled */
- if (disableTSRFlag)
- *disableTSRFlag = oldDisable;
-#endif
-
- TRACE("SDDHELP: Exiting PM_int86()\n");
- return out->x.ax;
-
-}
-
-/****************************************************************************
-REMARKS:
-Issue a V86 real mode interrupt with the specified register values
-loaded before the interrupt.
-****************************************************************************/
-int PMAPI PM_int86x(
- int intno,
- RMREGS *in,
- RMREGS *out,
- RMSREGS *sregs)
-{
- CRF saveRegs;
- ushort oldDisable;
- ULONG rc;
-
-#if 0
- /* Disable pass-up to our VxD handler so we directly call BIOS */
- TRACE("SDDHELP: Entering PM_int86x()\n");
- if (disableTSRFlag) {
- oldDisable = *disableTSRFlag;
- *disableTSRFlag = 0;
- }
-#endif
- LoadV86Registers(SSToDS(&saveRegs), in, sregs);
-
- VDHResetEventSem(hevIRet);
- rc = VDHPushInt(intno);
-
- /* set up return hook for interrupt */
- rc = VDHArmReturnHook(hhookUserIRetHook, VDHARH_NORMAL_IRET);
-
- VDHYield(0);
-
- /* wait until the V86 IRETs - our return hook posts the semaphore */
- rc = VDHWaitEventSem(hevIRet, 5000); /*SEM_INDEFINITE_WAIT); */
-
- ReadV86Registers(SSToDS(&saveRegs), out, sregs);
-
-#if 0
- /* Re-enable pass-up to our VxD handler if previously enabled */
- if (disableTSRFlag)
- *disableTSRFlag = oldDisable;
-#endif
-
- TRACE("SDDHELP: Exiting PM_int86x()\n");
- return out->x.ax;
-}
-
-void PMAPI PM_availableMemory(ulong *physical,ulong *total)
-{ *physical = *total = 0; }
-
-/****************************************************************************
-REMARKS:
-Allocates a block of locked physical memory.
-****************************************************************************/
-void * PMAPI PM_allocLockedMem(
- uint size,
- ulong *physAddr,
- ibool contiguous,
- ibool below16M)
-{
- ULONG flags = VDHAP_SYSTEM;
- ULONG nPages = (size + 0xFFF) >> 12;
-
- flags |= (physAddr != NULL) ? VDHAP_PHYSICAL : VDHAP_FIXED;
-
- return VDHAllocPages(physAddr, nPages, VDHAP_SYSTEM | VDHAP_PHYSICAL);
-}
-
-/****************************************************************************
-REMARKS:
-Frees a block of locked physical memory.
-****************************************************************************/
-void PMAPI PM_freeLockedMem(
- void *p,
- uint size,
- ibool contiguous)
-{
- if (p)
- VDHFreePages((PVOID)p);
-}
-
-/****************************************************************************
-REMARKS:
-Lock linear memory so it won't be paged.
-****************************************************************************/
-int PMAPI PM_lockDataPages(void *p,uint len,PM_lockHandle *lh)
-{
- ULONG lockHandle;
-
- /* TODO: the lock handle is essential for the unlock operation!! */
- lockHandle = VDHLockMem(p, len, 0, (PVOID)VDHLM_NO_ADDR, NULL);
-
- if (lockHandle != NULL)
- return 0;
- else
- return 1;
-}
-
-/****************************************************************************
-REMARKS:
-Unlock linear memory so it won't be paged.
-****************************************************************************/
-int PMAPI PM_unlockDataPages(void *p,uint len,PM_lockHandle *lh)
-{
- /* TODO: implement - use a table of lock handles? */
- /* VDHUnlockPages(lockHandle); */
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-Lock linear memory so it won't be paged.
-****************************************************************************/
-int PMAPI PM_lockCodePages(void (*p)(),uint len,PM_lockHandle *lh)
-{
- return PM_lockDataPages((void*)p,len,lh);
-}
-
-/****************************************************************************
-REMARKS:
-Unlock linear memory so it won't be paged.
-****************************************************************************/
-int PMAPI PM_unlockCodePages(void (*p)(),uint len,PM_lockHandle *lh)
-{
- return PM_unlockDataPages((void*)p,len,lh);
-}
-
-/****************************************************************************
-REMARKS:
-OS specific shared libraries not supported inside a VDD
-****************************************************************************/
-PM_MODULE PMAPI PM_loadLibrary(
- const char *szDLLName)
-{
- (void)szDLLName;
- return NULL;
-}
-
-/****************************************************************************
-REMARKS:
-OS specific shared libraries not supported inside a VDD
-****************************************************************************/
-void * PMAPI PM_getProcAddress(
- PM_MODULE hModule,
- const char *szProcName)
-{
- (void)hModule;
- (void)szProcName;
- return NULL;
-}
-
-/****************************************************************************
-REMARKS:
-OS specific shared libraries not supported inside a VDD
-****************************************************************************/
-void PMAPI PM_freeLibrary(
- PM_MODULE hModule)
-{
- (void)hModule;
-}
-
-/****************************************************************************
-REMARKS:
-Function to find the first file matching a search criteria in a directory.
-****************************************************************************/
-void *PMAPI PM_findFirstFile(
- const char *filename,
- PM_findData *findData)
-{
- /* TODO: This function should start a directory enumeration search */
- /* given the filename (with wildcards). The data should be */
- /* converted and returned in the findData standard form. */
- (void)filename;
- (void)findData;
- return PM_FILE_INVALID;
-}
-
-/****************************************************************************
-REMARKS:
-Function to find the next file matching a search criteria in a directory.
-****************************************************************************/
-ibool PMAPI PM_findNextFile(
- void *handle,
- PM_findData *findData)
-{
- /* TODO: This function should find the next file in directory enumeration */
- /* search given the search criteria defined in the call to */
- /* PM_findFirstFile. The data should be converted and returned */
- /* in the findData standard form. */
- (void)handle;
- (void)findData;
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Function to close the find process
-****************************************************************************/
-void PMAPI PM_findClose(
- void *handle)
-{
- /* TODO: This function should close the find process. This may do */
- /* nothing for some OS'es. */
- (void)handle;
-}
-
-/****************************************************************************
-REMARKS:
-Function to determine if a drive is a valid drive or not. Under Unix this
-function will return false for anything except a value of 3 (considered
-the root drive, and equivalent to C: for non-Unix systems). The drive
-numbering is:
-
- 1 - Drive A:
- 2 - Drive B:
- 3 - Drive C:
- etc
-
-****************************************************************************/
-ibool PMAPI PM_driveValid(
- char drive)
-{
- /* Not applicable in a VDD */
- (void)drive;
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Function to get the current working directory for the specififed drive.
-Under Unix this will always return the current working directory regardless
-of what the value of 'drive' is.
-****************************************************************************/
-void PMAPI PM_getdcwd(
- int drive,
- char *dir,
- int len)
-{
- /* Not applicable in a VDD */
- (void)drive;
- (void)dir;
- (void)len;
-}
-
-/****************************************************************************
-PARAMETERS:
-base - The starting physical base address of the region
-size - The size in bytes of the region
-type - Type to place into the MTRR register
-
-RETURNS:
-Error code describing the result.
-
-REMARKS:
-Function to enable write combining for the specified region of memory.
-****************************************************************************/
-int PMAPI PM_enableWriteCombine(
- ulong base,
- ulong size,
- uint type)
-{
- return MTRR_enableWriteCombine(base,size,type);
-}
-
-/****************************************************************************
-REMARKS:
-Function to change the file attributes for a specific file.
-****************************************************************************/
-void PMAPI PM_setFileAttr(
- const char *filename,
- uint attrib)
-{
- /* TODO: Implement this ? */
- (void)filename;
- (void)attrib;
- PM_fatalError("PM_setFileAttr not implemented!");
-}
-
-/****************************************************************************
-REMARKS:
-Function to get the file attributes for a specific file.
-****************************************************************************/
-uint PMAPI PM_getFileAttr(
- const char *filename)
-{
- /* TODO: Implement this ? */
- (void)filename;
- PM_fatalError("PM_getFileAttr not implemented!");
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-Function to create a directory.
-****************************************************************************/
-ibool PMAPI PM_mkdir(
- const char *filename)
-{
- /* TODO: Implement this ? */
- (void)filename;
- PM_fatalError("PM_mkdir not implemented!");
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Function to remove a directory.
-****************************************************************************/
-ibool PMAPI PM_rmdir(
- const char *filename)
-{
- /* TODO: Implement this ? */
- (void)filename;
- PM_fatalError("PM_rmdir not implemented!");
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Function to get the file time and date for a specific file.
-****************************************************************************/
-ibool PMAPI PM_getFileTime(
- const char *filename,
- ibool gmTime,
- PM_time *time)
-{
- /* TODO: Implement this ? */
- (void)filename;
- (void)gmTime;
- (void)time;
- PM_fatalError("PM_getFileTime not implemented!");
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Function to set the file time and date for a specific file.
-****************************************************************************/
-ibool PMAPI PM_setFileTime(
- const char *filename,
- ibool gmTime,
- PM_time *time)
-{
- /* TODO: Implement this ? */
- (void)filename;
- (void)gmTime;
- (void)time;
- PM_fatalError("PM_setFileTime not implemented!");
- return false;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/vdd/vflat.c b/board/MAI/bios_emulator/scitech/src/pm/vdd/vflat.c
deleted file mode 100644
index 21639281a7..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/vdd/vflat.c
+++ /dev/null
@@ -1,45 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-*
-* Description: Dummy module; no virtual framebuffer for this OS
-*
-****************************************************************************/
-
-#include "pmapi.h"
-
-ibool PMAPI VF_available(void)
-{
- return false;
-}
-
-void * PMAPI VF_init(ulong baseAddr,int bankSize,int codeLen,void *bankFunc)
-{
- return NULL;
-}
-
-void PMAPI VF_exit(void)
-{
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/vdd/ztimer.c b/board/MAI/bios_emulator/scitech/src/pm/vdd/ztimer.c
deleted file mode 100644
index 631f6558ee..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/vdd/ztimer.c
+++ /dev/null
@@ -1,103 +0,0 @@
-/****************************************************************************
-*
-* Ultra Long Period Timer
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: 32-bit OS/2 VDD
-*
-* Description: OS specific implementation for the Zen Timer functions.
-*
-****************************************************************************/
-
-/*---------------------------- Global variables ---------------------------*/
-
-static ulong frequency = 1193180;
-
-/*----------------------------- Implementation ----------------------------*/
-
-/****************************************************************************
-REMARKS:
-Initialise the Zen Timer module internals.
-****************************************************************************/
-#define __ZTimerInit()
-
-/****************************************************************************
-REMARKS:
-Call the assembler Zen Timer functions to do the timing.
-****************************************************************************/
-#define __LZTimerOn(tm) VTD_Get_Real_Time(&tm->start.high,&tm->start.low)
-
-/****************************************************************************
-REMARKS:
-Call the assembler Zen Timer functions to do the timing.
-****************************************************************************/
-static ulong __LZTimerLap(
- LZTimerObject *tm)
-{
- CPU_largeInteger lap,count;
- VTD_Get_Real_Time(&lap.high,&lap.low);
- _CPU_diffTime64(&tm->start,&lap,&count);
- return _CPU_calcMicroSec(&count,frequency);
-}
-
-/****************************************************************************
-REMARKS:
-Call the assembler Zen Timer functions to do the timing.
-****************************************************************************/
-#define __LZTimerOff(tm) VTD_Get_Real_Time(&tm->end.high,&tm->end.low)
-
-/****************************************************************************
-REMARKS:
-Call the assembler Zen Timer functions to do the timing.
-****************************************************************************/
-static ulong __LZTimerCount(
- LZTimerObject *tm)
-{
- CPU_largeInteger tmCount;
- _CPU_diffTime64(&tm->start,&tm->end,&tmCount);
- return _CPU_calcMicroSec(&tmCount,frequency);
-}
-
-/****************************************************************************
-REMARKS:
-Define the resolution of the long period timer as microseconds per timer tick.
-****************************************************************************/
-#define ULZTIMER_RESOLUTION 1000
-
-/****************************************************************************
-REMARKS:
-Read the Long Period timer value from the BIOS timer tick.
-****************************************************************************/
-static ulong __ULZReadTime(void)
-{
- return VDHQuerySysValue(0, VDHGSV_MSECSBOOT);
-}
-
-/****************************************************************************
-REMARKS:
-Compute the elapsed time from the BIOS timer tick. Note that we check to see
-whether a midnight boundary has passed, and if so adjust the finish time to
-account for this. We cannot detect if more that one midnight boundary has
-passed, so if this happens we will be generating erronous results.
-****************************************************************************/
-ulong __ULZElapsedTime(ulong start,ulong finish)
-{ return finish - start; }
diff --git a/board/MAI/bios_emulator/scitech/src/pm/vxd/_pm.asm b/board/MAI/bios_emulator/scitech/src/pm/vxd/_pm.asm
deleted file mode 100644
index 64a7cecb2d..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/vxd/_pm.asm
+++ /dev/null
@@ -1,299 +0,0 @@
-;****************************************************************************
-;*
-;* SciTech OS Portability Manager Library
-;*
-;* ========================================================================
-;*
-;* The contents of this file are subject to the SciTech MGL Public
-;* License Version 1.0 (the "License"); you may not use this file
-;* except in compliance with the License. You may obtain a copy of
-;* the License at http://www.scitechsoft.com/mgl-license.txt
-;*
-;* Software distributed under the License is distributed on an
-;* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-;* implied. See the License for the specific language governing
-;* rights and limitations under the License.
-;*
-;* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-;*
-;* The Initial Developer of the Original Code is SciTech Software, Inc.
-;* All Rights Reserved.
-;*
-;* ========================================================================
-;*
-;* Language: 80386 Assembler, TASM 4.0 or NASM
-;* Environment: 32-bit Windows VxD
-;*
-;* Description: Low level assembly support for the PM library specific to
-;* Windows VxDs.
-;*
-;****************************************************************************
-
- IDEAL
-
-include "scitech.mac" ; Memory model macros
-
-header _pm ; Set up memory model
-
-begdataseg _pm
-
- cextern _PM_savedDS,USHORT
-
-enddataseg _pm
-
-P586
-
-begcodeseg _pm ; Start of code segment
-
-;----------------------------------------------------------------------------
-; void PM_segread(PMSREGS *sregs)
-;----------------------------------------------------------------------------
-; Read the current value of all segment registers
-;----------------------------------------------------------------------------
-cprocstart PM_segread
-
- ARG sregs:DPTR
-
- enter_c
-
- mov ax,es
- _les _si,[sregs]
- mov [_ES _si],ax
- mov [_ES _si+2],cs
- mov [_ES _si+4],ss
- mov [_ES _si+6],ds
- mov [_ES _si+8],fs
- mov [_ES _si+10],gs
-
- leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; int PM_int386x(int intno, PMREGS *in, PMREGS *out,PMSREGS *sregs)
-;----------------------------------------------------------------------------
-; Issues a software interrupt in protected mode. This routine has been
-; written to allow user programs to load CS and DS with different values
-; other than the default.
-;----------------------------------------------------------------------------
-cprocstart PM_int386x
-
-; Not used for VxDs
-
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void PM_saveDS(void)
-;----------------------------------------------------------------------------
-; Save the value of DS into a section of the code segment, so that we can
-; quickly load this value at a later date in the PM_loadDS() routine from
-; inside interrupt handlers etc. The method to do this is different
-; depending on the DOS extender being used.
-;----------------------------------------------------------------------------
-cprocstart PM_saveDS
-
- mov [_PM_savedDS],ds ; Store away in data segment
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void PM_loadDS(void)
-;----------------------------------------------------------------------------
-; Routine to load the DS register with the default value for the current
-; DOS extender. Only the DS register is loaded, not the ES register, so
-; if you wish to call C code, you will need to also load the ES register
-; in 32 bit protected mode.
-;----------------------------------------------------------------------------
-cprocstart PM_loadDS
-
- mov ds,[cs:_PM_savedDS] ; We can access the proper DS through CS
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void PM_setBankA(int bank)
-;----------------------------------------------------------------------------
-cprocstart PM_setBankA
-
-; Not used for VxDs
-
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void PM_setBankAB(int bank)
-;----------------------------------------------------------------------------
-cprocstart PM_setBankAB
-
-; Not used for VxDs
-
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void PM_setCRTStart(int x,int y,int waitVRT)
-;----------------------------------------------------------------------------
-cprocstart PM_setCRTStart
-
-; Not used for VxDs
-
- ret
-
-cprocend
-
-; Macro to delay briefly to ensure that enough time has elapsed between
-; successive I/O accesses so that the device being accessed can respond
-; to both accesses even on a very fast PC.
-
-ifdef USE_NASM
-%macro DELAY 0
- jmp short $+2
- jmp short $+2
- jmp short $+2
-%endmacro
-%macro IODELAYN 1
-%rep %1
- DELAY
-%endrep
-%endmacro
-else
-macro DELAY
- jmp short $+2
- jmp short $+2
- jmp short $+2
-endm
-macro IODELAYN N
- rept N
- DELAY
- endm
-endm
-endif
-
-;----------------------------------------------------------------------------
-; uchar _PM_readCMOS(int index)
-;----------------------------------------------------------------------------
-; Read the value of a specific CMOS register. We do this with both
-; normal interrupts and NMI disabled.
-;----------------------------------------------------------------------------
-cprocstart _PM_readCMOS
-
- ARG index:UINT
-
- push _bp
- mov _bp,_sp
- pushfd
- mov al,[BYTE index]
- or al,80h ; Add disable NMI flag
- cli
- out 70h,al
- IODELAYN 5
- in al,71h
- mov ah,al
- xor al,al
- IODELAYN 5
- out 70h,al ; Re-enable NMI
- mov al,ah ; Return value in AL
- popfd
- pop _bp
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void _PM_writeCMOS(int index,uchar value)
-;----------------------------------------------------------------------------
-; Read the value of a specific CMOS register. We do this with both
-; normal interrupts and NMI disabled.
-;----------------------------------------------------------------------------
-cprocstart _PM_writeCMOS
-
- ARG index:UINT, value:UCHAR
-
- push _bp
- mov _bp,_sp
- pushfd
- mov al,[BYTE index]
- or al,80h ; Add disable NMI flag
- cli
- out 70h,al
- IODELAYN 5
- mov al,[value]
- out 71h,al
- xor al,al
- IODELAYN 5
- out 70h,al ; Re-enable NMI
- popfd
- pop _bp
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; double _ftol(double f)
-;----------------------------------------------------------------------------
-; Calls to __ftol are generated by the Borland C++ compiler for code
-; that needs to convert a floating point type to an integral type.
-;
-; Input: floating point number on the top of the '87.
-;
-; Output: a (signed or unsigned) long in EAX
-; All other registers preserved.
-;-----------------------------------------------------------------------
-cprocstart _ftol
-
- LOCAL temp1:WORD, temp2:QWORD = LocalSize
-
- push ebp
- mov ebp,esp
- sub esp,LocalSize
-
- fstcw [temp1] ; save the control word
- fwait
- mov al,[BYTE temp1+1]
- or [BYTE temp1+1],0Ch ; set rounding control to chop
- fldcw [temp1]
- fistp [temp2] ; convert to 64-bit integer
- mov [BYTE temp1+1],al
- fldcw [temp1] ; restore the control word
- mov eax,[DWORD temp2] ; return LS 32 bits
- mov edx,[DWORD temp2+4] ; MS 32 bits
-
- mov esp,ebp
- pop ebp
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; _PM_getPDB - Return the Page Table Directory Base address
-;----------------------------------------------------------------------------
-cprocstart _PM_getPDB
-
- mov eax,cr3
- and eax,0FFFFF000h
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; Flush the Translation Lookaside buffer
-;----------------------------------------------------------------------------
-cprocstart PM_flushTLB
-
- wbinvd ; Flush the CPU cache
- mov eax,cr3
- mov cr3,eax ; Flush the TLB
- ret
-
-cprocend
-
-endcodeseg _pm
-
- END ; End of module
diff --git a/board/MAI/bios_emulator/scitech/src/pm/vxd/cpuinfo.c b/board/MAI/bios_emulator/scitech/src/pm/vxd/cpuinfo.c
deleted file mode 100644
index 3c7eaaeaac..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/vxd/cpuinfo.c
+++ /dev/null
@@ -1,66 +0,0 @@
-/****************************************************************************
-*
-* Ultra Long Period Timer
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: 32-bit Windows VxD
-*
-* Description: VxD specific code for the CPU detection module.
-*
-****************************************************************************/
-
-/*----------------------------- Implementation ----------------------------*/
-
-/****************************************************************************
-REMARKS:
-Do nothing for VxD's
-****************************************************************************/
-#define SetMaxThreadPriority() 0
-
-/****************************************************************************
-REMARKS:
-Do nothing for VxD's
-****************************************************************************/
-#define RestoreThreadPriority(i) (void)(i)
-
-/****************************************************************************
-REMARKS:
-Initialise the counter and return the frequency of the counter.
-****************************************************************************/
-static void GetCounterFrequency(
- CPU_largeInteger *freq)
-{
- freq->low = 1193180;
- freq->high = 0;
-}
-
-/****************************************************************************
-REMARKS:
-Read the counter and return the counter value.
-****************************************************************************/
-#define GetCounter(t) \
-{ \
- CPU_largeInteger count; \
- VTD_Get_Real_Time(&count.high,&count.low); \
- (t)->low = count.low; \
- (t)->high = count.high; \
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/vxd/fileio.c b/board/MAI/bios_emulator/scitech/src/pm/vxd/fileio.c
deleted file mode 100644
index 3c6ce99208..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/vxd/fileio.c
+++ /dev/null
@@ -1,304 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: 32-bit Windows VxD
-*
-* Description: C library compatible I/O functions for use within a VxD.
-*
-****************************************************************************/
-
-#include "pmapi.h"
-#include "vxdfile.h"
-
-/*------------------------ Main Code Implementation -----------------------*/
-
-#define EOF -1
-
-/****************************************************************************
-REMARKS:
-VxD implementation of the ANSI C fopen function.
-****************************************************************************/
-FILE * fopen(
- const char *filename,
- const char *mode)
-{
- FILE *f = PM_malloc(sizeof(FILE));
- long oldpos;
-
- if (f) {
- f->offset = 0;
- f->text = (mode[1] == 't' || mode[2] == 't');
- f->writemode = (mode[0] == 'w') || (mode[0] == 'a');
- if (initComplete) {
- WORD omode,error;
- BYTE action;
-
- if (mode[0] == 'r') {
- omode = OPEN_ACCESS_READONLY | OPEN_SHARE_COMPATIBLE;
- action = ACTION_IFEXISTS_OPEN | ACTION_IFNOTEXISTS_FAIL;
- }
- else if (mode[0] == 'w') {
- omode = OPEN_ACCESS_WRITEONLY | OPEN_SHARE_COMPATIBLE;
- action = ACTION_IFEXISTS_TRUNCATE | ACTION_IFNOTEXISTS_CREATE;
- }
- else {
- omode = OPEN_ACCESS_READWRITE | OPEN_SHARE_COMPATIBLE;
- action = ACTION_IFEXISTS_OPEN | ACTION_IFNOTEXISTS_CREATE;
- }
- f->handle = (int)R0_OpenCreateFile(false,(char*)filename,omode,ATTR_NORMAL,action,0,&error,&action);
- if (f->handle == 0) {
- PM_free(f);
- return NULL;
- }
- f->filesize = R0_GetFileSize((HANDLE)f->handle,&error);
- if (mode[0] == 'a')
- fseek(f,0,2);
- }
- else {
- int oflag,pmode;
-
- if (mode[0] == 'r') {
- pmode = _S_IREAD;
- oflag = _O_RDONLY;
- }
- else if (mode[0] == 'w') {
- pmode = _S_IWRITE;
- oflag = _O_WRONLY | _O_CREAT | _O_TRUNC;
- }
- else {
- pmode = _S_IWRITE;
- oflag = _O_RDWR | _O_CREAT | _O_APPEND;
- }
- if (f->text)
- oflag |= _O_TEXT;
- else
- oflag |= _O_BINARY;
- if ((f->handle = i_open(filename,oflag,pmode)) == -1) {
- PM_free(f);
- return NULL;
- }
- oldpos = i_lseek(f->handle,0,1);
- f->filesize = i_lseek(f->handle,0,2);
- i_lseek(f->handle,oldpos,0);
- }
- }
- return f;
-}
-
-/****************************************************************************
-REMARKS:
-VxD implementation of the ANSI C fread function. Note that the VxD file I/O
-functions are layered on DOS, so can only read up to 64K at a time. Since
-we are expected to handle much larger chunks than this, we handle larger
-blocks automatically in here.
-****************************************************************************/
-size_t fread(
- void *ptr,
- size_t size,
- size_t n,
- FILE *f)
-{
- char *buf = ptr;
- WORD error;
- int bytes = size * n;
- int readbytes,totalbytes = 0;
-
- while (bytes > 0x10000) {
- if (initComplete) {
- readbytes = R0_ReadFile(false,(HANDLE)f->handle,buf,0x8000,f->offset,&error);
- readbytes += R0_ReadFile(false,(HANDLE)f->handle,buf+0x8000,0x8000,f->offset+0x8000,&error);
- }
- else {
- readbytes = i_read(f->handle,buf,0x8000);
- readbytes += i_read(f->handle,buf+0x8000,0x8000);
- }
- totalbytes += readbytes;
- f->offset += readbytes;
- buf += 0x10000;
- bytes -= 0x10000;
- }
- if (bytes) {
- if (initComplete)
- readbytes = R0_ReadFile(false,(HANDLE)f->handle,buf,bytes,f->offset,&error);
- else
- readbytes = i_read(f->handle,buf,bytes);
- totalbytes += readbytes;
- f->offset += readbytes;
- }
- return totalbytes / size;
-}
-
-/****************************************************************************
-REMARKS:
-VxD implementation of the ANSI C fwrite function. Note that the VxD file I/O
-functions are layered on DOS, so can only read up to 64K at a time. Since
-we are expected to handle much larger chunks than this, we handle larger
-blocks automatically in here.
-****************************************************************************/
-size_t fwrite(
- const void *ptr,
- size_t size,
- size_t n,
- FILE *f)
-{
- const char *buf = ptr;
- WORD error;
- int bytes = size * n;
- int writtenbytes,totalbytes = 0;
-
- if (!f->writemode)
- return 0;
- while (bytes > 0x10000) {
- if (initComplete) {
- writtenbytes = R0_WriteFile(false,(HANDLE)f->handle,buf,0x8000,f->offset,&error);
- writtenbytes += R0_WriteFile(false,(HANDLE)f->handle,buf+0x8000,0x8000,f->offset+0x8000,&error);
- }
- else {
- writtenbytes = i_write(f->handle,buf,0x8000);
- writtenbytes += i_write(f->handle,buf+0x8000,0x8000);
- }
- totalbytes += writtenbytes;
- f->offset += writtenbytes;
- buf += 0x10000;
- bytes -= 0x10000;
- }
- if (initComplete)
- writtenbytes = R0_WriteFile(false,(HANDLE)f->handle,buf,bytes,f->offset,&error);
- else
- writtenbytes = i_write(f->handle,buf,bytes);
- totalbytes += writtenbytes;
- f->offset += writtenbytes;
- if (f->offset > f->filesize)
- f->filesize = f->offset;
- return totalbytes / size;
-}
-
-/****************************************************************************
-REMARKS:
-VxD implementation of the ANSI C fflush function.
-****************************************************************************/
-int fflush(
- FILE *f)
-{
- /* Nothing to do since we are not doing buffered file I/O */
- (void)f;
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-VxD implementation of the ANSI C fseek function.
-****************************************************************************/
-int fseek(
- FILE *f,
- long int offset,
- int whence)
-{
- if (whence == 0)
- f->offset = offset;
- else if (whence == 1)
- f->offset += offset;
- else if (whence == 2)
- f->offset = f->filesize + offset;
- if (!initComplete)
- i_lseek(f->handle,f->offset,0);
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-VxD implementation of the ANSI C ftell function.
-****************************************************************************/
-long ftell(
- FILE *f)
-{
- return f->offset;
-}
-
-/****************************************************************************
-REMARKS:
-VxD implementation of the ANSI C feof function.
-****************************************************************************/
-int feof(
- FILE *f)
-{
- return (f->offset == f->filesize);
-}
-
-/****************************************************************************
-REMARKS:
-NT driver implementation of the ANSI C fgets function.
-****************************************************************************/
-char *fgets(
- char *s,
- int n,
- FILE *f)
-{
- int len;
- char *cs;
-
- /* Read the entire buffer into memory (our functions are unbuffered!) */
- if ((len = fread(s,1,n,f)) == 0)
- return NULL;
-
- /* Search for '\n' or end of string */
- if (n > len)
- n = len;
- cs = s;
- while (--n > 0) {
- if (*cs == '\n')
- break;
- cs++;
- }
- *cs = '\0';
- return s;
-}
-
-/****************************************************************************
-REMARKS:
-NT driver implementation of the ANSI C fputs function.
-****************************************************************************/
-int fputs(
- const char *s,
- FILE *f)
-{
- return fwrite(s,1,strlen(s),f);
-}
-
-/****************************************************************************
-REMARKS:
-VxD implementation of the ANSI C fclose function.
-****************************************************************************/
-int fclose(
- FILE *f)
-{
- WORD error;
-
- if (initComplete)
- R0_CloseFile((HANDLE)f->handle,&error);
- else
- i_close(f->handle);
- PM_free(f);
- return 0;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/vxd/oshdr.h b/board/MAI/bios_emulator/scitech/src/pm/vxd/oshdr.h
deleted file mode 100644
index 7efc0f9f85..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/vxd/oshdr.h
+++ /dev/null
@@ -1,29 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: 32-bit Windows VxD
-*
-* Description: Include file to include all OS specific header files.
-*
-****************************************************************************/
diff --git a/board/MAI/bios_emulator/scitech/src/pm/vxd/pm.c b/board/MAI/bios_emulator/scitech/src/pm/vxd/pm.c
deleted file mode 100644
index 4cb7f19ed4..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/vxd/pm.c
+++ /dev/null
@@ -1,1359 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: 32-bit Windows VxD
-*
-* Description: Implementation for the OS Portability Manager Library, which
-* contains functions to implement OS specific services in a
-* generic, cross platform API. Porting the OS Portability
-* Manager library is the first step to porting any SciTech
-* products to a new platform.
-*
-****************************************************************************/
-
-#include "pmapi.h"
-#include "drvlib/os/os.h"
-#include "sdd/sddhelp.h"
-#include "mtrr.h"
-
-/*--------------------------- Global variables ----------------------------*/
-
-#define MAX_MEMORY_SHARED 100
-#define MAX_MEMORY_MAPPINGS 100
-
-typedef struct {
- void *linear;
- ulong global;
- ulong length;
- int npages;
- } memshared;
-
-typedef struct {
- ulong physical;
- ulong linear;
- ulong length;
- int npages;
- ibool isCached;
- } mmapping;
-
-static int numMappings = 0;
-static memshared shared[MAX_MEMORY_MAPPINGS] = {0};
-static mmapping maps[MAX_MEMORY_MAPPINGS];
-extern ibool _PM_haveBIOS;
-char _PM_cntPath[PM_MAX_PATH] = "";
-char _PM_nucleusPath[PM_MAX_PATH] = "";
-uchar *_PM_rmBufAddr = NULL;
-ushort _VARAPI _PM_savedDS = 0;
-static uchar _PM_oldCMOSRegA;
-static uchar _PM_oldCMOSRegB;
-PM_intHandler _PM_rtcHandler = NULL;
-IRQHANDLE RTCIRQHandle = 0;
-VPICD_HWInt_THUNK RTCInt_Thunk;
-
-static char *szWindowsKey = "Software\\Microsoft\\Windows\\CurrentVersion";
-static char *szSystemRoot = "SystemRoot";
-static char *szMachineNameKey = "System\\CurrentControlSet\\control\\ComputerName\\ComputerName";
-static char *szMachineName = "ComputerName";
-static void (PMAPIP fatalErrorCleanup)(void) = NULL;
-
-/*----------------------------- Implementation ----------------------------*/
-
-/* Functions to read and write CMOS registers */
-
-ulong PMAPI _PM_getPDB(void);
-uchar PMAPI _PM_readCMOS(int index);
-void PMAPI _PM_writeCMOS(int index,uchar value);
-
-/****************************************************************************
-REMARKS:
-PM_malloc override function for Nucleus drivers loaded in VxD's.
-****************************************************************************/
-void * VXD_malloc(
- size_t size)
-{
- return PM_mallocShared(size);
-}
-
-/****************************************************************************
-REMARKS:
-PM_calloc override function for Nucleus drivers loaded in VxD's.
-****************************************************************************/
-void * VXD_calloc(
- size_t nelem,
- size_t size)
-{
- void *p = PM_mallocShared(nelem * size);
- if (p)
- memset(p,0,nelem * size);
- return p;
-}
-
-/****************************************************************************
-REMARKS:
-PM_realloc override function for Nucleus drivers loaded in VxD's.
-****************************************************************************/
-void * VXD_realloc(
- void *ptr,
- size_t size)
-{
- void *p = PM_mallocShared(size);
- if (p) {
- memcpy(p,ptr,size);
- PM_freeShared(ptr);
- }
- return p;
-}
-
-/****************************************************************************
-REMARKS:
-PM_free override function for Nucleus drivers loaded in VxD's.
-****************************************************************************/
-void VXD_free(
- void *p)
-{
- PM_freeShared(p);
-}
-
-/****************************************************************************
-REMARKS:
-Initialise the PM library.
-****************************************************************************/
-void PMAPI PM_init(void)
-{
- /* Override the default memory allocators for all Nucleus drivers
- * loaded in SDDHELP/PMHELP. We do this so that we can ensure all memory
- * dynamically allocated by Nucleus drivers and internal C runtime
- * library functions are shared memory blocks that all processes
- * connecting to SDDHELP can see.
- */
- PM_useLocalMalloc(VXD_malloc,VXD_calloc,VXD_realloc,VXD_free);
-
- /* Initialiase the MTRR module */
- MTRR_init();
-}
-
-ibool PMAPI PM_haveBIOSAccess(void)
-{ return _PM_haveBIOS; }
-
-long PMAPI PM_getOSType(void)
-{ return _OS_WIN32VXD; }
-
-int PMAPI PM_getModeType(void)
-{ return PM_386; }
-
-void PMAPI PM_backslash(char *s)
-{
- uint pos = strlen(s);
- if (s[pos-1] != '\\') {
- s[pos] = '\\';
- s[pos+1] = '\0';
- }
-}
-
-void PMAPI PM_setFatalErrorCleanup(
- void (PMAPIP cleanup)(void))
-{
- fatalErrorCleanup = cleanup;
-}
-
-void PMAPI PM_fatalError(const char *msg)
-{
- if (fatalErrorCleanup)
- fatalErrorCleanup();
- Fatal_Error_Handler(msg,0);
-}
-
-/****************************************************************************
-PARAMETERS:
-len - Place to store the length of the buffer
-rseg - Place to store the real mode segment of the buffer
-roff - Place to store the real mode offset of the buffer
-
-REMARKS:
-This function returns the address and length of the global VESA transfer
-buffer that is used for communicating with the VESA BIOS functions from
-Win16 and Win32 programs under Windows.
-****************************************************************************/
-void * PMAPI PM_getVESABuf(
- uint *len,
- uint *rseg,
- uint *roff)
-{
- /* If the VxD is dynamically loaded we will not have a real mode
- * transfer buffer to return, so we fail the call.
- */
- if (_PM_rmBufAddr) {
- *len = VESA_BUF_SIZE;
- *rseg = (ulong)(_PM_rmBufAddr) >> 4;
- *roff = (ulong)(_PM_rmBufAddr) & 0xF;
- return _PM_rmBufAddr;
- }
- return NULL;
-}
-
-int PMAPI PM_int386(
- int intno,
- PMREGS *in,
- PMREGS *out)
-{
- /* Unused in VxDs */
- return 0;
-}
-
-void PMAPI _PM_getRMvect(
- int intno,
- long *realisr)
-{
- WORD seg;
- DWORD off;
-
- Get_V86_Int_Vector(intno,&seg,&off);
- *realisr = ((long)seg << 16) | (off & 0xFFFF);
-}
-
-void PMAPI _PM_setRMvect(
- int intno,
- long realisr)
-{
- Set_V86_Int_Vector(intno,realisr >> 16,realisr & 0xFFFF);
-}
-
-char * PMAPI PM_getCurrentPath(
- char *path,
- int maxLen)
-{
- strncpy(path,_PM_cntPath,maxLen);
- path[maxLen-1] = 0;
- return path;
-}
-
-char PMAPI PM_getBootDrive(void)
-{ return 'c'; }
-
-const char * PMAPI PM_getVBEAFPath(void)
-{ return "c:\\"; }
-
-/****************************************************************************
-PARAMETERS:
-szKey - Key to query (can contain version number formatting)
-szValue - Value to get information for
-value - Place to store the registry key data read
-size - Size of the string buffer to read into
-
-RETURNS:
-true if the key was found, false if not.
-****************************************************************************/
-static ibool REG_queryString(
- char *szKey,
- char *szValue,
- char *value,
- ulong size)
-{
- HKEY hKey;
- ulong type;
- ibool status = false;
-
- memset(value,0,sizeof(value));
- if (RegOpenKey(HKEY_LOCAL_MACHINE,szKey,&hKey) == ERROR_SUCCESS) {
- if (RegQueryValueEx(hKey,(PCHAR)szValue,(ulong*)NULL,(ulong*)&type,value,(ulong*)&size) == ERROR_SUCCESS)
- status = true;
- RegCloseKey(hKey);
- }
- return status;
-}
-
-const char * PMAPI PM_getNucleusPath(void)
-{
- static char path[256];
-
- if (strlen(_PM_nucleusPath) > 0) {
- strcpy(path,_PM_nucleusPath);
- PM_backslash(path);
- return path;
- }
- if (!REG_queryString(szWindowsKey,szSystemRoot,path,sizeof(path)))
- strcpy(path,"c:\\windows");
- PM_backslash(path);
- strcat(path,"system\\nucleus");
- return path;
-}
-
-const char * PMAPI PM_getNucleusConfigPath(void)
-{
- static char path[256];
- strcpy(path,PM_getNucleusPath());
- PM_backslash(path);
- strcat(path,"config");
- return path;
-}
-
-const char * PMAPI PM_getUniqueID(void)
-{ return PM_getMachineName(); }
-
-const char * PMAPI PM_getMachineName(void)
-{
- static char name[256];
- if (REG_queryString(szMachineNameKey,szMachineName,name,sizeof(name)))
- return name;
- return "Unknown";
-}
-
-int PMAPI PM_kbhit(void)
-{ return 1; }
-
-int PMAPI PM_getch(void)
-{ return 0; }
-
-PM_HWND PMAPI PM_openConsole(
- PM_HWND hwndUser,
- int device,
- int xRes,
- int yRes,
- int bpp,
- ibool fullScreen)
-{
- /* Unused in VxDs */
- return NULL;
-}
-
-int PMAPI PM_getConsoleStateSize(void)
-{
- /* Unused in VxDs */
- return 1;
-}
-
-void PMAPI PM_saveConsoleState(
- void *stateBuf,
- PM_HWND hwndConsole)
-{
- /* Unused in VxDs */
-}
-
-void PMAPI PM_setSuspendAppCallback(
- int (_ASMAPIP saveState)(
- int flags))
-{
- /* Unused in VxDs */
-}
-
-void PMAPI PM_restoreConsoleState(
- const void *stateBuf,
- PM_HWND hwndConsole)
-{
- /* Unused in VxDs */
-}
-
-void PMAPI PM_closeConsole(
- PM_HWND hwndConsole)
-{
- /* Unused in VxDs */
-}
-
-void PM_setOSCursorLocation(
- int x,
- int y)
-{
- uchar *_biosPtr = PM_getBIOSPointer();
- PM_setByte(_biosPtr+0x50,x);
- PM_setByte(_biosPtr+0x51,y);
-}
-
-void PM_setOSScreenWidth(
- int width,
- int height)
-{
- uchar *_biosPtr = PM_getBIOSPointer();
- PM_setByte(_biosPtr+0x4A,width);
- PM_setByte(_biosPtr+0x84,height-1);
-}
-
-/****************************************************************************
-REMARKS:
-Allocate a block of shared memory. For Win9x we allocate shared memory
-as locked, global memory that is accessible from any memory context
-(including interrupt time context), which allows us to load our important
-data structure and code such that we can access it directly from a ring
-0 interrupt context.
-****************************************************************************/
-void * PMAPI PM_mallocShared(
- long size)
-{
- MEMHANDLE hMem;
- DWORD pgNum,nPages = (size + 0xFFF) >> 12;
- int i;
-
- /* First find a free slot in our shared memory table */
- for (i = 0; i < MAX_MEMORY_SHARED; i++) {
- if (shared[i].linear == 0)
- break;
- }
- if (i < MAX_MEMORY_SHARED) {
- PageAllocate(nPages,PG_SYS,0,0,0,0,NULL,0,&hMem,&shared[i].linear);
- shared[i].npages = nPages;
- pgNum = (ulong)shared[i].linear >> 12;
- shared[i].global = LinPageLock(pgNum,nPages,PAGEMAPGLOBAL);
- return (void*)shared[i].global;
- }
- return NULL;
-}
-
-/****************************************************************************
-REMARKS:
-Free a block of shared memory
-****************************************************************************/
-void PMAPI PM_freeShared(void *p)
-{
- int i;
-
- /* Find a shared memory block in our table and free it */
- for (i = 0; i < MAX_MEMORY_SHARED; i++) {
- if (shared[i].global == (ulong)p) {
- LinPageUnLock(shared[i].global >> 12,shared[i].npages,PAGEMAPGLOBAL);
- PageFree((ulong)shared[i].linear,0);
- shared[i].linear = 0;
- break;
- }
- }
-}
-
-/****************************************************************************
-REMARKS:
-Maps a shared memory block into process address space. Does nothing since
-the memory blocks are already globally7 mapped into all processes.
-****************************************************************************/
-void * PMAPI PM_mapToProcess(
- void *base,
- ulong limit)
-{
- return (void*)base;
-}
-
-ibool PMAPI PM_doBIOSPOST(
- ushort axVal,
- ulong BIOSPhysAddr,
- void *mappedBIOS,
- ulong BIOSLen)
-{
- /* TODO: Figure out how to do this */
- return false;
-}
-
-void * PMAPI PM_getBIOSPointer(void)
-{ return (void*)0x400; }
-
-void * PMAPI PM_getA0000Pointer(void)
-{ return PM_mapPhysicalAddr(0xA0000,0xFFFF,true); }
-
-/****************************************************************************
-PARAMETERS:
-base - Physical base address of the memory to maps in
-limit - Limit of physical memory to region to maps in
-
-RETURNS:
-Linear address of the newly mapped memory.
-
-REMARKS:
-Maps a physical memory range to a linear memory range.
-****************************************************************************/
-ulong _PM_mapPhysicalToLinear(
- ulong base,
- ulong limit,
- int *npages)
-{
- ulong linear,length = limit+1;
- int i,ppage,flags;
-
- if (base < 0x100000) {
- /* Windows 9x is zero based for the first meg of memory */
- return base;
- }
- ppage = base >> 12;
- *npages = (length + (base & 0xFFF) + 4095) >> 12;
- flags = PR_FIXED | PR_STATIC;
- if (base == 0xA0000) {
- /* We require the linear address to be aligned to a 64Kb boundary
- * for mapping the banked framebuffer (so we can do efficient
- * carry checking for bank changes in the assembler code). The only
- * way to ensure this is to force the linear address to be aligned
- * to a 4Mb boundary.
- */
- flags |= PR_4MEG;
- }
- if ((linear = (ulong)PageReserve(PR_SYSTEM,*npages,flags)) == (ulong)-1)
- return 0xFFFFFFFF;
- if (!PageCommitPhys(linear >> 12,*npages,ppage,PC_INCR | PC_USER | PC_WRITEABLE))
- return 0xFFFFFFFF;
- return linear + (base & 0xFFF);
-}
-
-/* Page table flags */
-
-#define PAGE_FLAGS_PRESENT 0x00000001
-#define PAGE_FLAGS_WRITEABLE 0x00000002
-#define PAGE_FLAGS_USER 0x00000004
-#define PAGE_FLAGS_WRITE_THROUGH 0x00000008
-#define PAGE_FLAGS_CACHE_DISABLE 0x00000010
-#define PAGE_FLAGS_ACCESSED 0x00000020
-#define PAGE_FLAGS_DIRTY 0x00000040
-#define PAGE_FLAGS_4MB 0x00000080
-
-/****************************************************************************
-PARAMETERS:
-base - Physical base address of the memory to maps in
-limit - Limit of physical memory to region to maps in
-isCached - True if the memory should be cached, false if not
-
-RETURNS:
-Linear address of the newly mapped memory.
-
-REMARKS:
-This function maps physical memory to linear memory, which can then be used
-to create a selector or used directly from 32-bit protected mode programs.
-This is better than DPMI 0x800, since it allows you to maps physical
-memory below 1Mb, which gets this memory out of the way of the Windows VDD's
-sticky paws.
-
-NOTE: If the memory is not expected to be cached, this function will
- directly re-program the PCD (Page Cache Disable) bit in the
- page tables. There does not appear to be a mechanism in the VMM
- to control this bit via the regular interface.
-****************************************************************************/
-void * PMAPI PM_mapPhysicalAddr(
- ulong base,
- ulong limit,
- ibool isCached)
-{
- ulong linear,length = limit+1;
- int i,npages;
- ulong PDB,*pPDB;
-
- /* Search table of existing mappings to see if we have already mapped
- * a region of memory that will serve this purpose.
- */
- for (i = 0; i < numMappings; i++) {
- if (maps[i].physical == base && maps[i].length == length && maps[i].isCached == isCached)
- return (void*)maps[i].linear;
- }
- if (numMappings == MAX_MEMORY_MAPPINGS)
- return NULL;
-
- /* We did not find any previously mapped memory region, so maps it in.
- * Note that we do not use MapPhysToLinear, since this function appears
- * to have problems mapping memory in the 1Mb physical address space.
- * Hence we use PageReserve and PageCommitPhys.
- */
- if ((linear = _PM_mapPhysicalToLinear(base,limit,&npages)) == 0xFFFFFFFF)
- return NULL;
- maps[numMappings].physical = base;
- maps[numMappings].length = length;
- maps[numMappings].linear = linear;
- maps[numMappings].npages = npages;
- maps[numMappings].isCached = isCached;
- numMappings++;
-
- /* Finally disable caching where necessary */
- if (!isCached && (PDB = _PM_getPDB()) != 0) {
- int startPDB,endPDB,iPDB,startPage,endPage,start,end,iPage;
- ulong pageTable,*pPageTable;
- pPDB = (ulong*)_PM_mapPhysicalToLinear(PDB,0xFFF,&npages);
- if (pPDB) {
- startPDB = (linear >> 22) & 0x3FF;
- startPage = (linear >> 12) & 0x3FF;
- endPDB = ((linear+limit) >> 22) & 0x3FF;
- endPage = ((linear+limit) >> 12) & 0x3FF;
- for (iPDB = startPDB; iPDB <= endPDB; iPDB++) {
- /* Set the bits in the page directory entry - required as per */
- /* Pentium 4 manual. This also takes care of the 4MB page entries */
- pPDB[iPDB] = pPDB[iPDB] |= (PAGE_FLAGS_WRITE_THROUGH | PAGE_FLAGS_CACHE_DISABLE);
- if (!(pPDB[iPDB] & PAGE_FLAGS_4MB)) {
- /* If we are dealing with 4KB pages then we need to iterate */
- /* through each of the page table entries */
- pageTable = pPDB[iPDB] & ~0xFFF;
- pPageTable = (ulong*)_PM_mapPhysicalToLinear(pageTable,0xFFF,&npages);
- start = (iPDB == startPDB) ? startPage : 0;
- end = (iPDB == endPDB) ? endPage : 0x3FF;
- for (iPage = start; iPage <= end; iPage++)
- pPageTable[iPage] |= (PAGE_FLAGS_WRITE_THROUGH | PAGE_FLAGS_CACHE_DISABLE);
- PageFree((ulong)pPageTable,PR_STATIC);
- }
- }
- PageFree((ulong)pPDB,PR_STATIC);
- PM_flushTLB();
- }
- }
- return (void*)linear;
-}
-
-void PMAPI PM_freePhysicalAddr(
- void *ptr,
- ulong limit)
-{
- /* We never free the mappings */
-}
-
-void PMAPI PM_sleep(ulong milliseconds)
-{
- /* We never sleep in a VxD */
-}
-
-int PMAPI PM_getCOMPort(int port)
-{
- /* TODO: Re-code this to determine real values using the Plug and Play */
- /* manager for the OS. */
- switch (port) {
- case 0: return 0x3F8;
- case 1: return 0x2F8;
- case 2: return 0x3E8;
- case 3: return 0x2E8;
- }
- return 0;
-}
-
-int PMAPI PM_getLPTPort(int port)
-{
- /* TODO: Re-code this to determine real values using the Plug and Play */
- /* manager for the OS. */
- switch (port) {
- case 0: return 0x3BC;
- case 1: return 0x378;
- case 2: return 0x278;
- }
- return 0;
-}
-
-ulong PMAPI PM_getPhysicalAddr(
- void *p)
-{
- DWORD pte;
-
- /* Touch the memory before calling CopyPageTable. For some reason */
- /* we need to do this on Windows 9x, otherwise the memory may not */
- /* be paged in correctly. Of course if the passed in pointer is */
- /* invalid, this function will fault, but we shouldn't be passed bogus */
- /* pointers anyway ;-) */
- pte = *((ulong*)p);
-
- /* Return assembled address value only if VMM service succeeds */
- if (CopyPageTable(((DWORD)p) >> 12, 1, (PVOID*)&pte, 0))
- return (pte & ~0xFFF) | (((DWORD)p) & 0xFFF);
-
- /* Return failure to the caller! */
- return 0xFFFFFFFFUL;
-}
-
-ibool PMAPI PM_getPhysicalAddrRange(
- void *p,
- ulong length,
- ulong *physAddress)
-{
- int i;
- ulong linear = (ulong)p & ~0xFFF;
-
- for (i = (length + 0xFFF) >> 12; i > 0; i--) {
- if ((*physAddress++ = PM_getPhysicalAddr((void*)linear)) == 0xFFFFFFFF)
- return false;
- linear += 4096;
- }
- return true;
-}
-
-void PMAPI _PM_freeMemoryMappings(void)
-{
- int i;
- for (i = 0; i < numMappings; i++)
- PageFree(maps[i].linear,PR_STATIC);
-}
-
-void * PMAPI PM_mapRealPointer(
- uint r_seg,
- uint r_off)
-{
- return (void*)MK_PHYS(r_seg,r_off);
-}
-
-void * PMAPI PM_allocRealSeg(
- uint size,
- uint *r_seg,
- uint *r_off)
-{
- return NULL;
-}
-
-void PMAPI PM_freeRealSeg(
- void *mem)
-{
-}
-
-void PMAPI DPMI_int86(
- int intno,
- DPMI_regs *regs)
-{
- /* Unsed in VxD's */
-}
-
-/****************************************************************************
-REMARKS:
-Load the V86 registers in the client state, and save the original state
-before loading the registers.
-****************************************************************************/
-static void LoadV86Registers(
- CLIENT_STRUCT *saveRegs,
- RMREGS *in,
- RMSREGS *sregs)
-{
- CLIENT_STRUCT newRegs;
-
- Save_Client_State(saveRegs);
- newRegs = *saveRegs;
- newRegs.CRS.Client_EAX = in->e.eax;
- newRegs.CRS.Client_EBX = in->e.ebx;
- newRegs.CRS.Client_ECX = in->e.ecx;
- newRegs.CRS.Client_EDX = in->e.edx;
- newRegs.CRS.Client_ESI = in->e.esi;
- newRegs.CRS.Client_EDI = in->e.edi;
- newRegs.CRS.Client_ES = sregs->es;
- newRegs.CRS.Client_DS = sregs->ds;
- Restore_Client_State(&newRegs);
-}
-
-/****************************************************************************
-REMARKS:
-Read the V86 registers from the client state and restore the original state.
-****************************************************************************/
-static void ReadV86Registers(
- CLIENT_STRUCT *saveRegs,
- RMREGS *out,
- RMSREGS *sregs)
-{
- CLIENT_STRUCT newRegs;
-
- Save_Client_State(&newRegs);
- out->e.eax = newRegs.CRS.Client_EAX;
- out->e.ebx = newRegs.CRS.Client_EBX;
- out->e.ecx = newRegs.CRS.Client_ECX;
- out->e.edx = newRegs.CRS.Client_EDX;
- out->e.esi = newRegs.CRS.Client_ESI;
- out->e.edi = newRegs.CRS.Client_EDI;
- sregs->es = newRegs.CRS.Client_ES;
- sregs->ds = newRegs.CRS.Client_DS;
- Restore_Client_State(saveRegs);
-}
-
-/****************************************************************************
-REMARKS:
-Call a V86 real mode function with the specified register values
-loaded before the call. The call returns with a far ret.
-****************************************************************************/
-void PMAPI PM_callRealMode(
- uint seg,
- uint off,
- RMREGS *regs,
- RMSREGS *sregs)
-{
- CLIENT_STRUCT saveRegs;
-
- /* Bail if we do not have BIOS access (ie: the VxD was dynamically
- * loaded, and not statically loaded.
- */
- if (!_PM_haveBIOS)
- return;
-
- _TRACE("SDDHELP: Entering PM_callRealMode()\n");
- Begin_Nest_V86_Exec();
- LoadV86Registers(&saveRegs,regs,sregs);
- Simulate_Far_Call(seg, off);
- Resume_Exec();
- ReadV86Registers(&saveRegs,regs,sregs);
- End_Nest_Exec();
- _TRACE("SDDHELP: Exiting PM_callRealMode()\n");
-}
-
-/****************************************************************************
-REMARKS:
-Issue a V86 real mode interrupt with the specified register values
-loaded before the interrupt.
-****************************************************************************/
-int PMAPI PM_int86(
- int intno,
- RMREGS *in,
- RMREGS *out)
-{
- RMSREGS sregs = {0};
- CLIENT_STRUCT saveRegs;
- ushort oldDisable;
-
- /* Bail if we do not have BIOS access (ie: the VxD was dynamically
- * loaded, and not statically loaded.
- */
- if (!_PM_haveBIOS) {
- *out = *in;
- return out->x.ax;
- }
-
- /* Disable pass-up to our VxD handler so we directly call BIOS */
- _TRACE("SDDHELP: Entering PM_int86()\n");
- if (disableTSRFlag) {
- oldDisable = *disableTSRFlag;
- *disableTSRFlag = 0;
- }
- Begin_Nest_V86_Exec();
- LoadV86Registers(&saveRegs,in,&sregs);
- Exec_Int(intno);
- ReadV86Registers(&saveRegs,out,&sregs);
- End_Nest_Exec();
-
- /* Re-enable pass-up to our VxD handler if previously enabled */
- if (disableTSRFlag)
- *disableTSRFlag = oldDisable;
-
- _TRACE("SDDHELP: Exiting PM_int86()\n");
- return out->x.ax;
-}
-
-/****************************************************************************
-REMARKS:
-Issue a V86 real mode interrupt with the specified register values
-loaded before the interrupt.
-****************************************************************************/
-int PMAPI PM_int86x(
- int intno,
- RMREGS *in,
- RMREGS *out,
- RMSREGS *sregs)
-{
- CLIENT_STRUCT saveRegs;
- ushort oldDisable;
-
- /* Bail if we do not have BIOS access (ie: the VxD was dynamically
- * loaded, and not statically loaded.
- */
- if (!_PM_haveBIOS) {
- *out = *in;
- return out->x.ax;
- }
-
- /* Disable pass-up to our VxD handler so we directly call BIOS */
- _TRACE("SDDHELP: Entering PM_int86x()\n");
- if (disableTSRFlag) {
- oldDisable = *disableTSRFlag;
- *disableTSRFlag = 0;
- }
- Begin_Nest_V86_Exec();
- LoadV86Registers(&saveRegs,in,sregs);
- Exec_Int(intno);
- ReadV86Registers(&saveRegs,out,sregs);
- End_Nest_Exec();
-
- /* Re-enable pass-up to our VxD handler if previously enabled */
- if (disableTSRFlag)
- *disableTSRFlag = oldDisable;
-
- _TRACE("SDDHELP: Exiting PM_int86x()\n");
- return out->x.ax;
-}
-
-/****************************************************************************
-REMARKS:
-Returns available memory. Not possible under Windows.
-****************************************************************************/
-void PMAPI PM_availableMemory(
- ulong *physical,
- ulong *total)
-{
- *physical = *total = 0;
-}
-
-/****************************************************************************
-REMARKS:
-Allocates a block of locked physical memory.
-****************************************************************************/
-void * PMAPI PM_allocLockedMem(
- uint size,
- ulong *physAddr,
- ibool contiguous,
- ibool below16M)
-{
- MEMHANDLE hMem;
- DWORD nPages = (size + 0xFFF) >> 12;
- DWORD flags = PAGEFIXED | PAGEUSEALIGN | (contiguous ? PAGECONTIG : 0);
- DWORD maxPhys = below16M ? 0x00FFFFFF : 0xFFFFFFFF;
- void *p;
-
- /* TODO: This may need to be modified if the memory needs to be globally */
- /* accessible. Check how we implemented PM_mallocShared() as we */
- /* may need to do something similar in here. */
- PageAllocate(nPages,PG_SYS,0,0,0,maxPhys,physAddr,flags,&hMem,&p);
-
- /* TODO: We may need to modify the memory blocks to disable caching via */
- /* the page tables (PCD|PWT) since DMA memory blocks *cannot* be */
- /* cached! */
- return p;
-}
-
-/****************************************************************************
-REMARKS:
-Frees a block of locked physical memory.
-****************************************************************************/
-void PMAPI PM_freeLockedMem(
- void *p,
- uint size,
- ibool contiguous)
-{
- if (p)
- PageFree((ulong)p,0);
-}
-
-/****************************************************************************
-REMARKS:
-Allocates a page aligned and page sized block of memory
-****************************************************************************/
-void * PMAPI PM_allocPage(
- ibool locked)
-{
- MEMHANDLE hMem;
- void *p;
-
- /* TODO: This will need to be modified if the memory needs to be globally */
- /* accessible. Check how we implemented PM_mallocShared() as we */
- /* may need to do something similar in here. */
- PageAllocate(1,PG_SYS,0,0,0,0,0,PAGEFIXED,&hMem,&p);
- return p;
-}
-
-/****************************************************************************
-REMARKS:
-Free a page aligned and page sized block of memory
-****************************************************************************/
-void PMAPI PM_freePage(
- void *p)
-{
- if (p)
- PageFree((ulong)p,0);
-}
-
-/****************************************************************************
-REMARKS:
-Lock linear memory so it won't be paged.
-****************************************************************************/
-int PMAPI PM_lockDataPages(
- void *p,
- uint len,
- PM_lockHandle *lh)
-{
- DWORD pgNum = (ulong)p >> 12;
- DWORD nPages = (len + (ulong)p - (pgNum << 12) + 0xFFF) >> 12;
- return LinPageLock(pgNum,nPages,0);
-}
-
-/****************************************************************************
-REMARKS:
-Unlock linear memory so it won't be paged.
-****************************************************************************/
-int PMAPI PM_unlockDataPages(
- void *p,
- uint len,
- PM_lockHandle *lh)
-{
- DWORD pgNum = (ulong)p >> 12;
- DWORD nPages = (len + (ulong)p - (pgNum << 12) + 0xFFF) >> 12;
- return LinPageUnLock(pgNum,nPages,0);
-}
-
-/****************************************************************************
-REMARKS:
-Lock linear memory so it won't be paged.
-****************************************************************************/
-int PMAPI PM_lockCodePages(
- void (*p)(),
- uint len,
- PM_lockHandle *lh)
-{
- return PM_lockDataPages((void*)p,len,lh);
-}
-
-/****************************************************************************
-REMARKS:
-Unlock linear memory so it won't be paged.
-****************************************************************************/
-int PMAPI PM_unlockCodePages(
- void (*p)(),
- uint len,
- PM_lockHandle *lh)
-{
- return PM_unlockDataPages((void*)p,len,lh);
-}
-
-/****************************************************************************
-REMARKS:
-Set the real time clock frequency (for stereo modes).
-****************************************************************************/
-void PMAPI PM_setRealTimeClockFrequency(
- int frequency)
-{
- static short convert[] = {
- 8192,
- 4096,
- 2048,
- 1024,
- 512,
- 256,
- 128,
- 64,
- 32,
- 16,
- 8,
- 4,
- 2,
- -1,
- };
- int i;
-
- /* First clear any pending RTC timeout if not cleared */
- _PM_readCMOS(0x0C);
- if (frequency == 0) {
- /* Disable RTC timout */
- _PM_writeCMOS(0x0A,_PM_oldCMOSRegA);
- _PM_writeCMOS(0x0B,_PM_oldCMOSRegB & 0x0F);
- }
- else {
- /* Convert frequency value to RTC clock indexes */
- for (i = 0; convert[i] != -1; i++) {
- if (convert[i] == frequency)
- break;
- }
-
- /* Set RTC timout value and enable timeout */
- _PM_writeCMOS(0x0A,0x20 | (i+3));
- _PM_writeCMOS(0x0B,(_PM_oldCMOSRegB & 0x0F) | 0x40);
- }
-}
-
-/****************************************************************************
-REMARKS:
-Real time clock interrupt handler, which calls the user registered C code.
-****************************************************************************/
-static BOOL __stdcall RTCInt_Handler(
- VMHANDLE hVM,
- IRQHANDLE hIRQ)
-{
- static char inside = 0;
-
- /* Clear priority interrupt controller and re-enable interrupts so we
- * dont lock things up for long.
- */
- VPICD_Phys_EOI(hIRQ);
-
- /* Clear real-time clock timeout */
- _PM_readCMOS(0x0C);
-
- /* Now call the C based interrupt handler (but check for mutual
- * exclusion since we may still be servicing an old interrupt when a
- * new one comes along; if that happens we ignore the old one).
- */
- if (!inside) {
- inside = 1;
- enable();
- _PM_rtcHandler();
- inside = 0;
- }
- return TRUE;
-}
-
-/****************************************************************************
-REMARKS:
-Set the real time clock handler (used for software stereo modes).
-****************************************************************************/
-ibool PMAPI PM_setRealTimeClockHandler(
- PM_intHandler ih,
- int frequency)
-{
- struct VPICD_IRQ_Descriptor IRQdesc;
-
- /* Save the old CMOS real time clock values */
- _PM_oldCMOSRegA = _PM_readCMOS(0x0A);
- _PM_oldCMOSRegB = _PM_readCMOS(0x0B);
-
- /* Set the real time clock interrupt handler */
- CHECK(ih != NULL);
- _PM_rtcHandler = ih;
- IRQdesc.VID_IRQ_Number = 0x8;
- IRQdesc.VID_Options = 0;
- IRQdesc.VID_Hw_Int_Proc = (DWORD)VPICD_Thunk_HWInt(RTCInt_Handler, &RTCInt_Thunk);
- IRQdesc.VID_EOI_Proc = 0;
- IRQdesc.VID_Virt_Int_Proc = 0;
- IRQdesc.VID_Mask_Change_Proc= 0;
- IRQdesc.VID_IRET_Proc = 0;
- IRQdesc.VID_IRET_Time_Out = 500;
- if ((RTCIRQHandle = VPICD_Virtualize_IRQ(&IRQdesc)) == 0)
- return false;
-
- /* Program the real time clock default frequency */
- PM_setRealTimeClockFrequency(frequency);
-
- /* Unmask IRQ8 in the PIC */
- VPICD_Physically_Unmask(RTCIRQHandle);
- return true;
-}
-
-/****************************************************************************
-REMARKS:
-Restore the original real time clock handler.
-****************************************************************************/
-void PMAPI PM_restoreRealTimeClockHandler(void)
-{
- if (RTCIRQHandle) {
- /* Restore CMOS registers and mask RTC clock */
- _PM_writeCMOS(0x0A,_PM_oldCMOSRegA);
- _PM_writeCMOS(0x0B,_PM_oldCMOSRegB);
-
- /* Restore the interrupt vector */
- VPICD_Set_Auto_Masking(RTCIRQHandle);
- VPICD_Force_Default_Behavior(RTCIRQHandle);
- RTCIRQHandle = 0;
- }
-}
-
-/****************************************************************************
-REMARKS:
-OS specific shared libraries not supported inside a VxD
-****************************************************************************/
-PM_MODULE PMAPI PM_loadLibrary(
- const char *szDLLName)
-{
- (void)szDLLName;
- return NULL;
-}
-
-/****************************************************************************
-REMARKS:
-OS specific shared libraries not supported inside a VxD
-****************************************************************************/
-void * PMAPI PM_getProcAddress(
- PM_MODULE hModule,
- const char *szProcName)
-{
- (void)hModule;
- (void)szProcName;
- return NULL;
-}
-
-/****************************************************************************
-REMARKS:
-OS specific shared libraries not supported inside a VxD
-****************************************************************************/
-void PMAPI PM_freeLibrary(
- PM_MODULE hModule)
-{
- (void)hModule;
-}
-
-/****************************************************************************
-REMARKS:
-Function to find the first file matching a search criteria in a directory.
-****************************************************************************/
-void *PMAPI PM_findFirstFile(
- const char *filename,
- PM_findData *findData)
-{
- /* TODO: This function should start a directory enumeration search */
- /* given the filename (with wildcards). The data should be */
- /* converted and returned in the findData standard form. */
- (void)filename;
- (void)findData;
- return PM_FILE_INVALID;
-}
-
-/****************************************************************************
-REMARKS:
-Function to find the next file matching a search criteria in a directory.
-****************************************************************************/
-ibool PMAPI PM_findNextFile(
- void *handle,
- PM_findData *findData)
-{
- /* TODO: This function should find the next file in directory enumeration */
- /* search given the search criteria defined in the call to */
- /* PM_findFirstFile. The data should be converted and returned */
- /* in the findData standard form. */
- (void)handle;
- (void)findData;
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Function to close the find process
-****************************************************************************/
-void PMAPI PM_findClose(
- void *handle)
-{
- /* TODO: This function should close the find process. This may do */
- /* nothing for some OS'es. */
- (void)handle;
-}
-
-/****************************************************************************
-REMARKS:
-Function to determine if a drive is a valid drive or not. Under Unix this
-function will return false for anything except a value of 3 (considered
-the root drive, and equivalent to C: for non-Unix systems). The drive
-numbering is:
-
- 1 - Drive A:
- 2 - Drive B:
- 3 - Drive C:
- etc
-
-****************************************************************************/
-ibool PMAPI PM_driveValid(
- char drive)
-{
- /* Not supported in a VxD */
- (void)drive;
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Function to get the current working directory for the specififed drive.
-Under Unix this will always return the current working directory regardless
-of what the value of 'drive' is.
-****************************************************************************/
-void PMAPI PM_getdcwd(
- int drive,
- char *dir,
- int len)
-{
- /* Not supported in a VxD */
- (void)drive;
- (void)dir;
- (void)len;
-}
-
-/****************************************************************************
-PARAMETERS:
-base - The starting physical base address of the region
-size - The size in bytes of the region
-type - Type to place into the MTRR register
-
-RETURNS:
-Error code describing the result.
-
-REMARKS:
-Function to enable write combining for the specified region of memory.
-****************************************************************************/
-int PMAPI PM_enableWriteCombine(
- ulong base,
- ulong size,
- uint type)
-{
- return MTRR_enableWriteCombine(base,size,type);
-}
-
-/****************************************************************************
-REMARKS:
-Function to change the file attributes for a specific file.
-****************************************************************************/
-void PMAPI PM_setFileAttr(
- const char *filename,
- uint attrib)
-{
- /* TODO: Implement this */
- (void)filename;
- (void)attrib;
- PM_fatalError("PM_setFileAttr not implemented yet!");
-}
-
-/****************************************************************************
-REMARKS:
-Function to get the file attributes for a specific file.
-****************************************************************************/
-uint PMAPI PM_getFileAttr(
- const char *filename)
-{
- /* TODO: Implement this */
- (void)filename;
- PM_fatalError("PM_getFileAttr not implemented yet!");
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-Function to create a directory.
-****************************************************************************/
-ibool PMAPI PM_mkdir(
- const char *filename)
-{
- /* TODO: Implement this */
- (void)filename;
- PM_fatalError("PM_mkdir not implemented yet!");
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Function to remove a directory.
-****************************************************************************/
-ibool PMAPI PM_rmdir(
- const char *filename)
-{
- /* TODO: Implement this */
- (void)filename;
- PM_fatalError("PM_rmdir not implemented yet!");
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Function to get the file time and date for a specific file.
-****************************************************************************/
-ibool PMAPI PM_getFileTime(
- const char *filename,
- ibool gmTime,
- PM_time *time)
-{
- /* TODO: Implement this! */
- (void)filename;
- (void)gmTime;
- (void)time;
- PM_fatalError("PM_getFileTime not implemented yet!");
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Function to set the file time and date for a specific file.
-****************************************************************************/
-ibool PMAPI PM_setFileTime(
- const char *filename,
- ibool gmTime,
- PM_time *time)
-{
- /* TODO: Implement this! */
- (void)filename;
- (void)gmTime;
- (void)time;
- PM_fatalError("PM_setFileTime not implemented yet!");
- return false;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/vxd/vflat.c b/board/MAI/bios_emulator/scitech/src/pm/vxd/vflat.c
deleted file mode 100644
index 901ce1cf03..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/vxd/vflat.c
+++ /dev/null
@@ -1,45 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-*
-* Description: Dummy module; no virtual framebuffer for this OS
-*
-****************************************************************************/
-
-#include "pmapi.h"
-
-ibool PMAPI VF_available(void)
-{
- return false;
-}
-
-void * PMAPI VF_init(ulong baseAddr,int bankSize,int codeLen,void *bankFunc)
-{
- return NULL;
-}
-
-void PMAPI VF_exit(void)
-{
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/vxd/ztimer.c b/board/MAI/bios_emulator/scitech/src/pm/vxd/ztimer.c
deleted file mode 100644
index 76df48c38b..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/vxd/ztimer.c
+++ /dev/null
@@ -1,105 +0,0 @@
-/****************************************************************************
-*
-* Ultra Long Period Timer
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: 32-bit Windows VxD
-*
-* Description: OS specific implementation for the Zen Timer functions.
-*
-****************************************************************************/
-
-/*---------------------------- Global variables ---------------------------*/
-
-static ulong frequency = 1193180;
-
-/*----------------------------- Implementation ----------------------------*/
-
-/****************************************************************************
-REMARKS:
-Initialise the Zen Timer module internals.
-****************************************************************************/
-#define __ZTimerInit()
-
-/****************************************************************************
-REMARKS:
-Call the assembler Zen Timer functions to do the timing.
-****************************************************************************/
-#define __LZTimerOn(tm) VTD_Get_Real_Time(&tm->start.high,&tm->start.low)
-
-/****************************************************************************
-REMARKS:
-Call the assembler Zen Timer functions to do the timing.
-****************************************************************************/
-static ulong __LZTimerLap(
- LZTimerObject *tm)
-{
- CPU_largeInteger lap,count;
- VTD_Get_Real_Time(&lap.high,&lap.low);
- _CPU_diffTime64(&tm->start,&lap,&count);
- return _CPU_calcMicroSec(&count,frequency);
-}
-
-/****************************************************************************
-REMARKS:
-Call the assembler Zen Timer functions to do the timing.
-****************************************************************************/
-#define __LZTimerOff(tm) VTD_Get_Real_Time(&tm->end.high,&tm->end.low)
-
-/****************************************************************************
-REMARKS:
-Call the assembler Zen Timer functions to do the timing.
-****************************************************************************/
-static ulong __LZTimerCount(
- LZTimerObject *tm)
-{
- CPU_largeInteger tmCount;
- _CPU_diffTime64(&tm->start,&tm->end,&tmCount);
- return _CPU_calcMicroSec(&tmCount,frequency);
-}
-
-/****************************************************************************
-REMARKS:
-Define the resolution of the long period timer as microseconds per timer tick.
-****************************************************************************/
-#define ULZTIMER_RESOLUTION 1000
-
-/****************************************************************************
-REMARKS:
-Read the Long Period timer value from the BIOS timer tick.
-****************************************************************************/
-static ulong __ULZReadTime(void)
-{
- CPU_largeInteger count;
- VTD_Get_Real_Time(&count.high,&count.low);
- return (count.low * 1000.0 / frequency);
-}
-
-/****************************************************************************
-REMARKS:
-Compute the elapsed time from the BIOS timer tick. Note that we check to see
-whether a midnight boundary has passed, and if so adjust the finish time to
-account for this. We cannot detect if more that one midnight boundary has
-passed, so if this happens we will be generating erronous results.
-****************************************************************************/
-ulong __ULZElapsedTime(ulong start,ulong finish)
-{ return finish - start; }
diff --git a/board/MAI/bios_emulator/scitech/src/pm/win32/_pmwin32.asm b/board/MAI/bios_emulator/scitech/src/pm/win32/_pmwin32.asm
deleted file mode 100644
index 7c242b5724..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/win32/_pmwin32.asm
+++ /dev/null
@@ -1,78 +0,0 @@
-;****************************************************************************
-;*
-;* SciTech OS Portability Manager Library
-;*
-;* ========================================================================
-;*
-;* The contents of this file are subject to the SciTech MGL Public
-;* License Version 1.0 (the "License"); you may not use this file
-;* except in compliance with the License. You may obtain a copy of
-;* the License at http://www.scitechsoft.com/mgl-license.txt
-;*
-;* Software distributed under the License is distributed on an
-;* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-;* implied. See the License for the specific language governing
-;* rights and limitations under the License.
-;*
-;* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-;*
-;* The Initial Developer of the Original Code is SciTech Software, Inc.
-;* All Rights Reserved.
-;*
-;* ========================================================================
-;*
-;* Language: 80386 Assembler, TASM 4.0 or NASM
-;* Environment: Win32
-;*
-;* Description: Low level assembly support for the PM library specific
-;* to Windows.
-;*
-;****************************************************************************
-
- IDEAL
-
-include "scitech.mac" ; Memory model macros
-
-header _pmwin32 ; Set up memory model
-
-begdataseg _pmwin32
-
- cglobal _PM_ioentry
- cglobal _PM_gdt
-_PM_ioentry dd 0 ; Offset to call gate
-_PM_gdt dw 0 ; Selector to call gate
-
-enddataseg _pmwin32
-
-begcodeseg _pmwin32 ; Start of code segment
-
-;----------------------------------------------------------------------------
-; int PM_setIOPL(int iopl)
-;----------------------------------------------------------------------------
-; Change the IOPL level for the 32-bit task. Returns the previous level
-; so it can be restored for the task correctly.
-;----------------------------------------------------------------------------
-cprocstart _PM_setIOPLViaCallGate
-
- ARG iopl:UINT
-
- enter_c
- pushfd ; Save the old EFLAGS for later
- mov ecx,[iopl] ; ECX := IOPL level
- xor ebx,ebx ; Change IOPL level function code
-ifdef USE_NASM
- call far dword [_PM_ioentry]
-else
- call [FWORD _PM_ioentry]
-endif
- pop eax
- and eax,0011000000000000b
- shr eax,12
- leave_c
- ret
-
-cprocend
-
-endcodeseg _pmwin32
-
- END ; End of module
diff --git a/board/MAI/bios_emulator/scitech/src/pm/win32/cpuinfo.c b/board/MAI/bios_emulator/scitech/src/pm/win32/cpuinfo.c
deleted file mode 100644
index 7da9752051..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/win32/cpuinfo.c
+++ /dev/null
@@ -1,94 +0,0 @@
-/****************************************************************************
-*
-* Ultra Long Period Timer
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Win32
-*
-* Description: Module to implement OS specific services to measure the
-* CPU frequency.
-*
-****************************************************************************/
-
-/*---------------------------- Global variables ---------------------------*/
-
-static ibool havePerformanceCounter;
-
-/*----------------------------- Implementation ----------------------------*/
-
-/****************************************************************************
-REMARKS:
-Increase the thread priority to maximum, if possible.
-****************************************************************************/
-static int SetMaxThreadPriority(void)
-{
- int oldPriority;
- HANDLE hThread = GetCurrentThread();
-
- oldPriority = GetThreadPriority(hThread);
- if (oldPriority != THREAD_PRIORITY_ERROR_RETURN)
- SetThreadPriority(hThread, THREAD_PRIORITY_TIME_CRITICAL);
- return oldPriority;
-}
-
-/****************************************************************************
-REMARKS:
-Restore the original thread priority.
-****************************************************************************/
-static void RestoreThreadPriority(
- int oldPriority)
-{
- HANDLE hThread = GetCurrentThread();
-
- if (oldPriority != THREAD_PRIORITY_ERROR_RETURN)
- SetThreadPriority(hThread, oldPriority);
-}
-
-/****************************************************************************
-REMARKS:
-Initialise the counter and return the frequency of the counter.
-****************************************************************************/
-static void GetCounterFrequency(
- CPU_largeInteger *freq)
-{
- if (!QueryPerformanceFrequency((LARGE_INTEGER*)freq)) {
- havePerformanceCounter = false;
- freq->low = 100000;
- freq->high = 0;
- }
- else
- havePerformanceCounter = true;
-}
-
-/****************************************************************************
-REMARKS:
-Read the counter and return the counter value.
-****************************************************************************/
-#define GetCounter(t) \
-{ \
- if (havePerformanceCounter) \
- QueryPerformanceCounter((LARGE_INTEGER*)t); \
- else { \
- (t)->low = timeGetTime() * 100; \
- (t)->high = 0; \
- } \
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/win32/ddraw.c b/board/MAI/bios_emulator/scitech/src/pm/win32/ddraw.c
deleted file mode 100644
index d6c3f60e84..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/win32/ddraw.c
+++ /dev/null
@@ -1,582 +0,0 @@
-/****************************************************************************
-*
-* SciTech Multi-platform Graphics Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Win32
-*
-* Description: Win32 implementation for the SciTech cross platform
-* event library.
-*
-****************************************************************************/
-
-#include "event.h"
-#include "pmapi.h"
-#include "win32/oshdr.h"
-#include "nucleus/graphics.h"
-
-/*---------------------------- Global Variables ---------------------------*/
-
-/* Publicly accessible variables */
-
-int _PM_deskX,_PM_deskY;/* Desktop dimentions */
-HWND _PM_hwndConsole; /* Window handle for console */
-#ifdef __INTEL__
-uint _PM_cw_default; /* Default FPU control word */
-#endif
-
-/* Private internal variables */
-
-static HINSTANCE hInstApp = NULL;/* Application instance handle */
-static HWND hwndUser = NULL;/* User window handle */
-static HINSTANCE hInstDD = NULL; /* Handle to DirectDraw DLL */
-static LPDIRECTDRAW lpDD = NULL; /* DirectDraw object */
-static LONG oldWndStyle; /* Info about old user window */
-static LONG oldExWndStyle; /* Info about old user window */
-static int oldWinPosX; /* Old window position X coordinate */
-static int oldWinPosY; /* Old window pisition Y coordinate */
-static int oldWinSizeX; /* Old window size X */
-static int oldWinSizeY; /* Old window size Y */
-static WNDPROC oldWinProc = NULL;
-static PM_saveState_cb suspendApp = NULL;
-static ibool waitActive = false;
-static ibool isFullScreen = false;
-static ibool backInGDI = false;
-
-/* Internal strings */
-
-static char *szWinClassName = "SciTechDirectDrawWindow";
-static char *szAutoPlayKey = "Software\\Microsoft\\Windows\\CurrentVersion\\Policies\\Explorer";
-static char *szAutoPlayValue = "NoDriveTypeAutoRun";
-
-/* Dynalinks to DirectDraw functions */
-
-static HRESULT (WINAPI *pDirectDrawCreate)(GUID FAR *lpGUID, LPDIRECTDRAW FAR *lplpDD, IUnknown FAR *pUnkOuter);
-
-/*---------------------------- Implementation -----------------------------*/
-
-/****************************************************************************
-REMARKS:
-Temporarily disables AutoPlay operation while we are running in fullscreen
-graphics modes.
-****************************************************************************/
-static void DisableAutoPlay(void)
-{
- DWORD dwAutoPlay,dwSize = sizeof(dwAutoPlay);
- HKEY hKey;
-
- if (RegOpenKeyEx(HKEY_CURRENT_USER,szAutoPlayKey,0,KEY_EXECUTE | KEY_WRITE,&hKey) == ERROR_SUCCESS) {
- RegQueryValueEx(hKey,szAutoPlayValue,NULL,NULL,(void*)&dwAutoPlay,&dwSize);
- dwAutoPlay |= AUTOPLAY_DRIVE_CDROM;
- RegSetValueEx(hKey,szAutoPlayValue,0,REG_DWORD,(void*)&dwAutoPlay,dwSize);
- RegCloseKey(hKey);
- }
-}
-
-/****************************************************************************
-REMARKS:
-Re-enables AutoPlay operation when we return to regular GDI mode.
-****************************************************************************/
-static void RestoreAutoPlay(void)
-{
- DWORD dwAutoPlay,dwSize = sizeof(dwAutoPlay);
- HKEY hKey;
-
- if (RegOpenKeyEx(HKEY_CURRENT_USER,szAutoPlayKey,0,KEY_EXECUTE | KEY_WRITE,&hKey) == ERROR_SUCCESS) {
- RegQueryValueEx(hKey,szAutoPlayValue,NULL,NULL,(void*)&dwAutoPlay,&dwSize);
- dwAutoPlay &= ~AUTOPLAY_DRIVE_CDROM;
- RegSetValueEx(hKey,szAutoPlayValue,0,REG_DWORD,(void*)&dwAutoPlay,dwSize);
- RegCloseKey(hKey);
- }
-}
-
-/****************************************************************************
-REMARKS:
-Suspends the application by switching back to the GDI desktop, allowing
-normal application code to be processed, and then waiting for the
-application activate command to bring us back to fullscreen mode with our
-window minimised.
-****************************************************************************/
-static void LeaveFullScreen(void)
-{
- int retCode = PM_SUSPEND_APP;
-
- if (backInGDI)
- return;
- if (suspendApp)
- retCode = suspendApp(PM_DEACTIVATE);
- RestoreAutoPlay();
- backInGDI = true;
-
- /* Now process messages normally until we are re-activated */
- waitActive = true;
- if (retCode != PM_NO_SUSPEND_APP) {
- while (waitActive) {
- _EVT_pumpMessages();
- Sleep(200);
- }
- }
-}
-
-/****************************************************************************
-REMARKS:
-Reactivate all the surfaces for DirectDraw and set the system back up for
-fullscreen rendering.
-****************************************************************************/
-static void RestoreFullScreen(void)
-{
- static ibool firstTime = true;
-
- if (firstTime) {
- /* Clear the message queue while waiting for the surfaces to be
- * restored.
- */
- firstTime = false;
- while (1) {
- /* Continue looping until out application has been restored
- * and we have reset the display mode.
- */
- _EVT_pumpMessages();
- if (GetActiveWindow() == _PM_hwndConsole) {
- if (suspendApp)
- suspendApp(PM_REACTIVATE);
- DisableAutoPlay();
- backInGDI = false;
- waitActive = false;
- firstTime = true;
- return;
- }
- Sleep(200);
- }
- }
-}
-
-/****************************************************************************
-REMARKS:
-This function suspends the application by switching back to the GDI desktop,
-allowing normal application code to be processed and then waiting for the
-application activate command to bring us back to fullscreen mode with our
-window minimised.
-
-This version only gets called if we have not captured the screen switch in
-our activate message loops and will occur if the DirectDraw drivers lose a
-surface for some reason while rendering. This should not normally happen,
-but it is included just to be sure (it can happen on WinNT/2000 if the user
-hits the Ctrl-Alt-Del key combination). Note that this code will always
-spin loop, and we cannot disable the spin looping from this version (ie:
-if the user hits Ctrl-Alt-Del under WinNT/2000 the application main loop
-will cease to be executed until the user switches back to the application).
-****************************************************************************/
-void PMAPI PM_doSuspendApp(void)
-{
- static ibool firstTime = true;
-
- /* Call system DLL version if found */
- if (_PM_imports.PM_doSuspendApp != PM_doSuspendApp) {
- _PM_imports.PM_doSuspendApp();
- return;
- }
-
- if (firstTime) {
- if (suspendApp)
- suspendApp(PM_DEACTIVATE);
- RestoreAutoPlay();
- firstTime = false;
- backInGDI = true;
- }
- RestoreFullScreen();
- firstTime = true;
-}
-
-/****************************************************************************
-REMARKS:
-Main Window proc for the full screen DirectDraw Window that we create while
-running in full screen mode. Here we capture all mouse and keyboard events
-for the window and plug them into our event queue.
-****************************************************************************/
-static LONG CALLBACK PM_winProc(
- HWND hwnd,
- UINT msg,
- WPARAM wParam,
- LONG lParam)
-{
- switch (msg) {
- case WM_SYSCHAR:
- /* Stop Alt-Space from pausing our application */
- return 0;
- case WM_KEYDOWN:
- case WM_SYSKEYDOWN:
- if (HIWORD(lParam) & KF_REPEAT) {
- if (msg == WM_SYSKEYDOWN)
- return 0;
- break;
- }
- /* Fall through for keydown events */
- case WM_KEYUP:
- case WM_SYSKEYUP:
- if (msg == WM_SYSKEYDOWN || msg == WM_SYSKEYUP) {
- if ((HIWORD(lParam) & KF_ALTDOWN) && wParam == VK_RETURN)
- break;
- /* We ignore the remainder of the system keys to stop the
- * system menu from being activated from the keyboard and pausing
- * our app while fullscreen (ie: pressing the Alt key).
- */
- return 0;
- }
- break;
- case WM_SYSCOMMAND:
- switch (wParam & ~0x0F) {
- case SC_SCREENSAVE:
- case SC_MONITORPOWER:
- /* Ignore screensaver requests in fullscreen modes */
- return 0;
- }
- break;
- case WM_SIZE:
- if (waitActive && backInGDI && (wParam != SIZE_MINIMIZED)) {
- /* Start the re-activation process */
- PostMessage(hwnd,WM_DO_SUSPEND_APP,WM_PM_RESTORE_FULLSCREEN,0);
- }
- else if (!waitActive && isFullScreen && !backInGDI && (wParam == SIZE_MINIMIZED)) {
- /* Start the de-activation process */
- PostMessage(hwnd,WM_DO_SUSPEND_APP,WM_PM_LEAVE_FULLSCREEN,0);
- }
- break;
- case WM_DO_SUSPEND_APP:
- switch (wParam) {
- case WM_PM_RESTORE_FULLSCREEN:
- RestoreFullScreen();
- break;
- case WM_PM_LEAVE_FULLSCREEN:
- LeaveFullScreen();
- break;
- }
- return 0;
- }
- if (oldWinProc)
- return oldWinProc(hwnd,msg,wParam,lParam);
- return DefWindowProc(hwnd,msg,wParam,lParam);
-}
-
-/****************************************************************************
-PARAMETERS:
-hwnd - User window to convert
-width - Window of the fullscreen window
-height - Height of the fullscreen window
-
-RETURNS:
-Handle to converted fullscreen Window.
-
-REMARKS:
-This function takes the original user window handle and modifies the size,
-position and attributes for the window to convert it into a fullscreen
-window that we can use.
-****************************************************************************/
-static PM_HWND _PM_convertUserWindow(
- HWND hwnd,
- int width,
- int height)
-{
- RECT window;
-
- GetWindowRect(hwnd,&window);
- oldWinPosX = window.left;
- oldWinPosY = window.top;
- oldWinSizeX = window.right - window.left;
- oldWinSizeY = window.bottom - window.top;
- oldWndStyle = SetWindowLong(hwnd,GWL_STYLE,WS_POPUP | WS_SYSMENU);
- oldExWndStyle = SetWindowLong(hwnd,GWL_EXSTYLE,WS_EX_APPWINDOW);
- ShowWindow(hwnd,SW_SHOW);
- MoveWindow(hwnd,0,0,width,height,TRUE);
- SetWindowPos(hwnd,HWND_TOPMOST,0,0,0,0,SWP_NOMOVE | SWP_NOSIZE);
- oldWinProc = (WNDPROC)SetWindowLong(hwnd,GWL_WNDPROC, (LPARAM)PM_winProc);
- return hwnd;
-}
-
-/****************************************************************************
-PARAMETERS:
-hwnd - User window to restore
-
-REMARKS:
-This function restores the original attributes of the user window and put's
-it back into it's original state before it was converted to a fullscreen
-window.
-****************************************************************************/
-static void _PM_restoreUserWindow(
- HWND hwnd)
-{
- SetWindowLong(hwnd,GWL_WNDPROC, (LPARAM)oldWinProc);
- SetWindowLong(hwnd,GWL_EXSTYLE,oldExWndStyle);
- SetWindowLong(hwnd,GWL_STYLE,oldWndStyle);
- SetWindowPos(hwnd,HWND_NOTOPMOST,0,0,0,0,SWP_NOMOVE | SWP_NOSIZE);
- ShowWindow(hwnd,SW_SHOW);
- MoveWindow(hwnd,oldWinPosX,oldWinPosY,oldWinSizeX,oldWinSizeY,TRUE);
- oldWinProc = NULL;
-}
-
-/****************************************************************************
-PARAMETERS:
-device - Index of the device to load DirectDraw for (0 for primary)
-
-REMARKS:
-Attempts to dynamically load the DirectDraw DLL's and create the DirectDraw
-objects that we need.
-****************************************************************************/
-void * PMAPI PM_loadDirectDraw(
- int device)
-{
- HDC hdc;
- int bits;
-
- /* Call system DLL version if found */
- if (_PM_imports.PM_loadDirectDraw != PM_loadDirectDraw)
- return _PM_imports.PM_loadDirectDraw(device);
-
- /* TODO: Handle multi-monitor!! */
- if (device != 0)
- return NULL;
-
- /* Load the DirectDraw DLL if not presently loaded */
- GET_DEFAULT_CW();
- if (!hInstDD) {
- hdc = GetDC(NULL);
- bits = GetDeviceCaps(hdc,BITSPIXEL);
- ReleaseDC(NULL,hdc);
- if (bits < 8)
- return NULL;
- if ((hInstDD = LoadLibrary("ddraw.dll")) == NULL)
- return NULL;
- pDirectDrawCreate = (void*)GetProcAddress(hInstDD,"DirectDrawCreate");
- if (!pDirectDrawCreate)
- return NULL;
- }
-
- /* Create the DirectDraw object */
- if (!lpDD && pDirectDrawCreate(NULL, &lpDD, NULL) != DD_OK) {
- lpDD = NULL;
- return NULL;
- }
- RESET_DEFAULT_CW();
- return lpDD;
-}
-
-/****************************************************************************
-PARAMETERS:
-device - Index of the device to unload DirectDraw for (0 for primary)
-
-REMARKS:
-Frees any DirectDraw objects for the device. We never actually explicitly
-unload the ddraw.dll library, since unloading and reloading it is
-unnecessary since we only want to unload it when the application exits and
-that happens automatically.
-****************************************************************************/
-void PMAPI PM_unloadDirectDraw(
- int device)
-{
- /* Call system DLL version if found */
- if (_PM_imports.PM_unloadDirectDraw != PM_unloadDirectDraw) {
- _PM_imports.PM_unloadDirectDraw(device);
- return;
- }
- if (lpDD) {
- IDirectDraw_Release(lpDD);
- lpDD = NULL;
- }
- (void)device;
-}
-
-/****************************************************************************
-REMARKS:
-Open a console for output to the screen, creating the main event handling
-window if necessary.
-****************************************************************************/
-PM_HWND PMAPI PM_openConsole(
- PM_HWND hWndUser,
- int device,
- int xRes,
- int yRes,
- int bpp,
- ibool fullScreen)
-{
- WNDCLASS cls;
- static ibool classRegistered = false;
-
- /* Call system DLL version if found */
- GA_getSystemPMImports();
- if (_PM_imports.PM_openConsole != PM_openConsole) {
- if (fullScreen) {
- _PM_deskX = xRes;
- _PM_deskY = yRes;
- }
- return _PM_imports.PM_openConsole(hWndUser,device,xRes,yRes,bpp,fullScreen);
- }
-
- /* Create the fullscreen window if necessary */
- hwndUser = hWndUser;
- if (fullScreen) {
- if (!classRegistered) {
- /* Create a Window class for the fullscreen window in here, since
- * we need to register one that will do all our event handling for
- * us.
- */
- hInstApp = GetModuleHandle(NULL);
- cls.hCursor = LoadCursor(NULL,IDC_ARROW);
- cls.hIcon = LoadIcon(hInstApp,MAKEINTRESOURCE(1));
- cls.lpszMenuName = NULL;
- cls.lpszClassName = szWinClassName;
- cls.hbrBackground = GetStockObject(BLACK_BRUSH);
- cls.hInstance = hInstApp;
- cls.style = CS_DBLCLKS;
- cls.lpfnWndProc = PM_winProc;
- cls.cbWndExtra = 0;
- cls.cbClsExtra = 0;
- if (!RegisterClass(&cls))
- return NULL;
- classRegistered = true;
- }
- _PM_deskX = xRes;
- _PM_deskY = yRes;
- if (!hwndUser) {
- char windowTitle[80];
- if (LoadString(hInstApp,1,windowTitle,sizeof(windowTitle)) == 0)
- strcpy(windowTitle,"MGL Fullscreen Application");
- _PM_hwndConsole = CreateWindowEx(WS_EX_APPWINDOW,szWinClassName,
- windowTitle,WS_POPUP | WS_SYSMENU,0,0,xRes,yRes,
- NULL,NULL,hInstApp,NULL);
- }
- else {
- _PM_hwndConsole = _PM_convertUserWindow(hwndUser,xRes,yRes);
- }
- ShowCursor(false);
- isFullScreen = true;
- }
- else {
- _PM_hwndConsole = hwndUser;
- isFullScreen = false;
- }
- SetFocus(_PM_hwndConsole);
- SetForegroundWindow(_PM_hwndConsole);
- DisableAutoPlay();
- (void)bpp;
- return _PM_hwndConsole;
-}
-
-/****************************************************************************
-REMARKS:
-Find the size of the console state buffer.
-****************************************************************************/
-int PMAPI PM_getConsoleStateSize(void)
-{
- /* Call system DLL version if found */
- if (_PM_imports.PM_getConsoleStateSize != PM_getConsoleStateSize)
- return _PM_imports.PM_getConsoleStateSize();
-
- /* Not used in Windows */
- return 1;
-}
-
-/****************************************************************************
-REMARKS:
-Save the state of the console.
-****************************************************************************/
-void PMAPI PM_saveConsoleState(
- void *stateBuf,
- PM_HWND hwndConsole)
-{
- /* Call system DLL version if found */
- if (_PM_imports.PM_saveConsoleState != PM_saveConsoleState) {
- _PM_imports.PM_saveConsoleState(stateBuf,hwndConsole);
- return;
- }
-
- /* Not used in Windows */
- (void)stateBuf;
- (void)hwndConsole;
-}
-
-/****************************************************************************
-REMARKS:
-Set the suspend application callback for the fullscreen console.
-****************************************************************************/
-void PMAPI PM_setSuspendAppCallback(
- PM_saveState_cb saveState)
-{
- /* Call system DLL version if found */
- if (_PM_imports.PM_setSuspendAppCallback != PM_setSuspendAppCallback) {
- _PM_imports.PM_setSuspendAppCallback(saveState);
- return;
- }
- suspendApp = saveState;
-}
-
-/****************************************************************************
-REMARKS:
-Restore the console state.
-****************************************************************************/
-void PMAPI PM_restoreConsoleState(
- const void *stateBuf,
- PM_HWND hwndConsole)
-{
- /* Call system DLL version if found */
- if (_PM_imports.PM_restoreConsoleState != PM_restoreConsoleState) {
- _PM_imports.PM_restoreConsoleState(stateBuf,hwndConsole);
- return;
- }
-
- /* Not used in Windows */
- (void)stateBuf;
- (void)hwndConsole;
-}
-
-/****************************************************************************
-REMARKS:
-Close the fullscreen console.
-****************************************************************************/
-void PMAPI PM_closeConsole(
- PM_HWND hwndConsole)
-{
- /* Call system DLL version if found */
- if (_PM_imports.PM_closeConsole != PM_closeConsole) {
- _PM_imports.PM_closeConsole(hwndConsole);
- return;
- }
- ShowCursor(true);
- RestoreAutoPlay();
- if (hwndUser)
- _PM_restoreUserWindow(hwndConsole);
- else
- DestroyWindow(hwndConsole);
- hwndUser = NULL;
- _PM_hwndConsole = NULL;
-}
-
-/****************************************************************************
-REMARKS:
-Return the DirectDraw window handle used by the application.
-****************************************************************************/
-PM_HWND PMAPI PM_getDirectDrawWindow(void)
-{
- /* Call system DLL version if found */
- if (_PM_imports.PM_getDirectDrawWindow != PM_getDirectDrawWindow)
- return _PM_imports.PM_getDirectDrawWindow();
- return _PM_hwndConsole;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/win32/event.c b/board/MAI/bios_emulator/scitech/src/pm/win32/event.c
deleted file mode 100644
index 86448e32fa..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/win32/event.c
+++ /dev/null
@@ -1,459 +0,0 @@
-/****************************************************************************
-*
-* SciTech Multi-platform Graphics Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Win32
-*
-* Description: Win32 implementation for the SciTech cross platform
-* event library.
-*
-****************************************************************************/
-
-/*---------------------------- Global Variables ---------------------------*/
-
-static ushort keyUpMsg[256] = {0}; /* Table of key up messages */
-static int rangeX,rangeY; /* Range of mouse coordinates */
-
-/*---------------------------- Implementation -----------------------------*/
-
-/* These are not used under Win32 */
-#define _EVT_disableInt() 1
-#define _EVT_restoreInt(flags) (void)(flags)
-
-/****************************************************************************
-PARAMETERS:
-scanCode - Scan code to test
-
-REMARKS:
-This macro determines if a specified key is currently down at the
-time that the call is made.
-****************************************************************************/
-#define _EVT_isKeyDown(scanCode) (keyUpMsg[scanCode] != 0)
-
-/****************************************************************************
-REMARKS:
-This function is used to return the number of ticks since system
-startup in milliseconds. This should be the same value that is placed into
-the time stamp fields of events, and is used to implement auto mouse down
-events.
-****************************************************************************/
-ulong _EVT_getTicks(void)
-{ return timeGetTime(); }
-
-/****************************************************************************
-REMARKS:
-Pumps all messages in the message queue from Win32 into our event queue.
-****************************************************************************/
-void _EVT_pumpMessages(void)
-{
- MSG msg;
- MSG charMsg;
- event_t evt;
-
- /* TODO: Add support for DirectInput! We can't support relative mouse */
- /* movement motion counters without DirectInput ;-(. */
- while (PeekMessage(&msg,NULL,0,0,PM_REMOVE)) {
- memset(&evt,0,sizeof(evt));
- switch (msg.message) {
- case WM_MOUSEMOVE:
- evt.what = EVT_MOUSEMOVE;
- break;
- case WM_LBUTTONDBLCLK:
- evt.what = EVT_MOUSEDOWN;
- evt.message = EVT_LEFTBMASK | EVT_DBLCLICK;
- break;
- case WM_LBUTTONDOWN:
- evt.what = EVT_MOUSEDOWN;
- evt.message = EVT_LEFTBMASK;
- break;
- case WM_LBUTTONUP:
- evt.what = EVT_MOUSEUP;
- evt.message = EVT_LEFTBMASK;
- break;
- case WM_RBUTTONDBLCLK:
- evt.what = EVT_MOUSEDOWN | EVT_DBLCLICK;
- evt.message = EVT_RIGHTBMASK;
- break;
- case WM_RBUTTONDOWN:
- evt.what = EVT_MOUSEDOWN;
- evt.message = EVT_RIGHTBMASK;
- break;
- case WM_RBUTTONUP:
- evt.what = EVT_MOUSEUP;
- evt.message = EVT_RIGHTBMASK;
- break;
- case WM_MBUTTONDBLCLK:
- evt.what = EVT_MOUSEDOWN | EVT_DBLCLICK;
- evt.message = EVT_MIDDLEBMASK;
- break;
- case WM_MBUTTONDOWN:
- evt.what = EVT_MOUSEDOWN;
- evt.message = EVT_MIDDLEBMASK;
- break;
- case WM_MBUTTONUP:
- evt.what = EVT_MOUSEUP;
- evt.message = EVT_MIDDLEBMASK;
- break;
- case WM_KEYDOWN:
- case WM_SYSKEYDOWN:
- if (HIWORD(msg.lParam) & KF_REPEAT) {
- evt.what = EVT_KEYREPEAT;
- }
- else {
- evt.what = EVT_KEYDOWN;
- }
- break;
- case WM_KEYUP:
- case WM_SYSKEYUP:
- evt.what = EVT_KEYUP;
- break;
- }
-
- /* Convert mouse event modifier flags */
- if (evt.what & EVT_MOUSEEVT) {
- if (_PM_deskX) {
- evt.where_x = ((long)msg.pt.x * rangeX) / _PM_deskX;
- evt.where_y = ((long)msg.pt.y * rangeY) / _PM_deskY;
- }
- else {
- ScreenToClient(_PM_hwndConsole, &msg.pt);
- evt.where_x = msg.pt.x;
- evt.where_y = msg.pt.y;
- }
- if (evt.what == EVT_MOUSEMOVE) {
- /* Save the current mouse position */
- EVT.mx = evt.where_x;
- EVT.my = evt.where_y;
- if (EVT.oldMove != -1) {
- EVT.evtq[EVT.oldMove].where_x = evt.where_x;/* Modify existing one */
- EVT.evtq[EVT.oldMove].where_y = evt.where_y;
-/* EVT.evtq[EVT.oldMove].relative_x += mickeyX; // TODO! */
-/* EVT.evtq[EVT.oldMove].relative_y += mickeyY; // TODO! */
- evt.what = 0;
- }
- else {
- EVT.oldMove = EVT.freeHead; /* Save id of this move event */
-/* evt.relative_x = mickeyX; // TODO! */
-/* evt.relative_y = mickeyY; // TODO! */
- }
- }
- else
- EVT.oldMove = -1;
- if (msg.wParam & MK_LBUTTON)
- evt.modifiers |= EVT_LEFTBUT;
- if (msg.wParam & MK_RBUTTON)
- evt.modifiers |= EVT_RIGHTBUT;
- if (msg.wParam & MK_MBUTTON)
- evt.modifiers |= EVT_MIDDLEBUT;
- if (msg.wParam & MK_SHIFT)
- evt.modifiers |= EVT_SHIFTKEY;
- if (msg.wParam & MK_CONTROL)
- evt.modifiers |= EVT_CTRLSTATE;
- }
-
- /* Convert keyboard codes */
- TranslateMessage(&msg);
- if (evt.what & EVT_KEYEVT) {
- int scanCode = (msg.lParam >> 16) & 0xFF;
- if (evt.what == EVT_KEYUP) {
- /* Get message for keyup code from table of cached down values */
- evt.message = keyUpMsg[scanCode];
- keyUpMsg[scanCode] = 0;
- }
- else {
- if (PeekMessage(&charMsg,NULL,WM_CHAR,WM_CHAR,PM_REMOVE))
- evt.message = charMsg.wParam;
- if (PeekMessage(&charMsg,NULL,WM_SYSCHAR,WM_SYSCHAR,PM_REMOVE))
- evt.message = charMsg.wParam;
- evt.message |= ((msg.lParam >> 8) & 0xFF00);
- keyUpMsg[scanCode] = (ushort)evt.message;
- }
- if (evt.what == EVT_KEYREPEAT)
- evt.message |= (msg.lParam << 16);
- if (HIWORD(msg.lParam) & KF_ALTDOWN)
- evt.modifiers |= EVT_ALTSTATE;
- if (GetKeyState(VK_SHIFT) & 0x8000U)
- evt.modifiers |= EVT_SHIFTKEY;
- if (GetKeyState(VK_CONTROL) & 0x8000U)
- evt.modifiers |= EVT_CTRLSTATE;
- EVT.oldMove = -1;
- }
-
- if (evt.what != 0) {
- /* Add time stamp and add the event to the queue */
- evt.when = msg.time;
- if (EVT.count < EVENTQSIZE)
- addEvent(&evt);
- }
- DispatchMessage(&msg);
- }
-}
-
-/****************************************************************************
-REMARKS:
-This macro/function is used to converts the scan codes reported by the
-keyboard to our event libraries normalised format. We only have one scan
-code for the 'A' key, and use shift modifiers to determine if it is a
-Ctrl-F1, Alt-F1 etc. The raw scan codes from the keyboard work this way,
-but the OS gives us 'cooked' scan codes, we have to translate them back
-to the raw format.
-****************************************************************************/
-#define _EVT_maskKeyCode(evt)
-
-/****************************************************************************
-REMARKS:
-Safely abort the event module upon catching a fatal error.
-****************************************************************************/
-void _EVT_abort(
- int signal)
-{
- (void)signal;
- EVT_exit();
- PM_fatalError("Unhandled exception!");
-}
-
-/****************************************************************************
-PARAMETERS:
-mouseMove - Callback function to call wheneve the mouse needs to be moved
-
-REMARKS:
-Initiliase the event handling module. Here we install our mouse handling ISR
-to be called whenever any button's are pressed or released. We also build
-the free list of events in the event queue.
-
-We use handler number 2 of the mouse libraries interrupt handlers for our
-event handling routines.
-****************************************************************************/
-void EVTAPI EVT_init(
- _EVT_mouseMoveHandler mouseMove)
-{
- /* Initialise the event queue */
- EVT.mouseMove = mouseMove;
- initEventQueue();
- memset(keyUpMsg,0,sizeof(keyUpMsg));
-
- /* Catch program termination signals so we can clean up properly */
- signal(SIGABRT, _EVT_abort);
- signal(SIGFPE, _EVT_abort);
- signal(SIGINT, _EVT_abort);
-}
-
-/****************************************************************************
-REMARKS
-Changes the range of coordinates returned by the mouse functions to the
-specified range of values. This is used when changing between graphics
-modes set the range of mouse coordinates for the new display mode.
-****************************************************************************/
-void EVTAPI EVT_setMouseRange(
- int xRes,
- int yRes)
-{
- rangeX = xRes;
- rangeY = yRes;
-}
-
-/****************************************************************************
-REMARKS
-Modifes the mouse coordinates as necessary if scaling to OS coordinates,
-and sets the OS mouse cursor position.
-****************************************************************************/
-void _EVT_setMousePos(
- int *x,
- int *y)
-{
- /* Scale coordinates up to desktop coordinates first */
- int scaledX = (*x * _PM_deskX) / rangeX;
- int scaledY = (*y * _PM_deskY) / rangeY;
-
- /* Scale coordinates back to screen coordinates again */
- *x = (scaledX * rangeX) / _PM_deskX;
- *y = (scaledY * rangeY) / _PM_deskY;
- SetCursorPos(scaledX,scaledY);
-}
-
-/****************************************************************************
-REMARKS:
-Initiailises the internal event handling modules. The EVT_suspend function
-can be called to suspend event handling (such as when shelling out to DOS),
-and this function can be used to resume it again later.
-****************************************************************************/
-void EVT_resume(void)
-{
- /* Do nothing for Win32 */
-}
-
-/****************************************************************************
-REMARKS
-Suspends all of our event handling operations. This is also used to
-de-install the event handling code.
-****************************************************************************/
-void EVT_suspend(void)
-{
- /* Do nothing for Win32 */
-}
-
-/****************************************************************************
-REMARKS
-Exits the event module for program terminatation.
-****************************************************************************/
-void EVT_exit(void)
-{
- /* Restore signal handlers */
- signal(SIGABRT, SIG_DFL);
- signal(SIGFPE, SIG_DFL);
- signal(SIGINT, SIG_DFL);
-}
-
-/****************************************************************************
-DESCRIPTION:
-Returns the mask indicating what joystick axes are attached.
-
-HEADER:
-event.h
-
-REMARKS:
-This function is used to detect the attached joysticks, and determine
-what axes are present and functioning. This function will re-detect any
-attached joysticks when it is called, so if the user forgot to attach
-the joystick when the application started, you can call this function to
-re-detect any newly attached joysticks.
-
-SEE ALSO:
-EVT_joySetLowerRight, EVT_joySetCenter, EVT_joyIsPresent
-****************************************************************************/
-int EVTAPI EVT_joyIsPresent(void)
-{
- /* TODO: Implement joystick code based on DirectX! */
- return 0;
-}
-
-/****************************************************************************
-DESCRIPTION:
-Polls the joystick for position and button information.
-
-HEADER:
-event.h
-
-REMARKS:
-This routine is used to poll analogue joysticks for button and position
-information. It should be called once for each main loop of the user
-application, just before processing all pending events via EVT_getNext.
-All information polled from the joystick will be posted to the event
-queue for later retrieval.
-
-Note: Most analogue joysticks will provide readings that change even
- though the joystick has not moved. Hence if you call this routine
- you will likely get an EVT_JOYMOVE event every time through your
- event loop.
-
-SEE ALSO:
-EVT_getNext, EVT_peekNext, EVT_joySetUpperLeft, EVT_joySetLowerRight,
-EVT_joySetCenter, EVT_joyIsPresent
-****************************************************************************/
-void EVTAPI EVT_pollJoystick(void)
-{
-}
-
-/****************************************************************************
-DESCRIPTION:
-Calibrates the joystick upper left position
-
-HEADER:
-event.h
-
-REMARKS:
-This function can be used to zero in on better joystick calibration factors,
-which may work better than the default simplistic calibration (which assumes
-the joystick is centered when the event library is initialised).
-To use this function, ask the user to hold the stick in the upper left
-position and then have them press a key or button. and then call this
-function. This function will then read the joystick and update the
-calibration factors.
-
-Usually, assuming that the stick was centered when the event library was
-initialized, you really only need to call EVT_joySetLowerRight since the
-upper left position is usually always 0,0 on most joysticks. However, the
-safest procedure is to call all three calibration functions.
-
-SEE ALSO:
-EVT_joySetUpperLeft, EVT_joySetLowerRight, EVT_joyIsPresent
-****************************************************************************/
-void EVTAPI EVT_joySetUpperLeft(void)
-{
-}
-
-/****************************************************************************
-DESCRIPTION:
-Calibrates the joystick lower right position
-
-HEADER:
-event.h
-
-REMARKS:
-This function can be used to zero in on better joystick calibration factors,
-which may work better than the default simplistic calibration (which assumes
-the joystick is centered when the event library is initialised).
-To use this function, ask the user to hold the stick in the lower right
-position and then have them press a key or button. and then call this
-function. This function will then read the joystick and update the
-calibration factors.
-
-Usually, assuming that the stick was centered when the event library was
-initialized, you really only need to call EVT_joySetLowerRight since the
-upper left position is usually always 0,0 on most joysticks. However, the
-safest procedure is to call all three calibration functions.
-
-SEE ALSO:
-EVT_joySetUpperLeft, EVT_joySetCenter, EVT_joyIsPresent
-****************************************************************************/
-void EVTAPI EVT_joySetLowerRight(void)
-{
-}
-
-/****************************************************************************
-DESCRIPTION:
-Calibrates the joystick center position
-
-HEADER:
-event.h
-
-REMARKS:
-This function can be used to zero in on better joystick calibration factors,
-which may work better than the default simplistic calibration (which assumes
-the joystick is centered when the event library is initialised).
-To use this function, ask the user to hold the stick in the center
-position and then have them press a key or button. and then call this
-function. This function will then read the joystick and update the
-calibration factors.
-
-Usually, assuming that the stick was centered when the event library was
-initialized, you really only need to call EVT_joySetLowerRight since the
-upper left position is usually always 0,0 on most joysticks. However, the
-safest procedure is to call all three calibration functions.
-
-SEE ALSO:
-EVT_joySetUpperLeft, EVT_joySetLowerRight, EVT_joySetCenter
-****************************************************************************/
-void EVTAPI EVT_joySetCenter(void)
-{
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/win32/ntservc.c b/board/MAI/bios_emulator/scitech/src/pm/win32/ntservc.c
deleted file mode 100644
index 59d9aa0c7c..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/win32/ntservc.c
+++ /dev/null
@@ -1,258 +0,0 @@
-/****************************************************************************
-*
-* SciTech Display Doctor
-*
-* Copyright (C) 1991-2001 SciTech Software, Inc.
-* All rights reserved.
-*
-* ======================================================================
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* | |
-* |This copyrighted computer code is a proprietary trade secret of |
-* |SciTech Software, Inc., located at 505 Wall Street, Chico, CA 95928 |
-* |USA (www.scitechsoft.com). ANY UNAUTHORIZED POSSESSION, USE, |
-* |VIEWING, COPYING, MODIFICATION OR DISSEMINATION OF THIS CODE IS |
-* |STRICTLY PROHIBITED BY LAW. Unless you have current, express |
-* |written authorization from SciTech to possess or use this code, you |
-* |may be subject to civil and/or criminal penalties. |
-* | |
-* |If you received this code in error or you would like to report |
-* |improper use, please immediately contact SciTech Software, Inc. at |
-* |530-894-8400. |
-* | |
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* ======================================================================
-*
-* Language: ANSI C
-* Environment: Windows NT, Windows 2K or Windows XP.
-*
-* Description: Main module to do the installation of the SDD and GLDirect
-* device driver components under Windows NT/2K/XP.
-*
-****************************************************************************/
-
-#include "pmapi.h"
-#include "win32/oshdr.h"
-
-/*----------------------------- Implementation ----------------------------*/
-
-/****************************************************************************
-PARAMETERS:
-szDriverName - Actual name of the driver to install in the system
-szServiceName - Name of the service to create
-szLoadGroup - Load group for the driver (NULL for normal drivers)
-dwServiceType - Service type to create
-
-RETURNS:
-True on success, false on failure.
-
-REMARKS:
-This function does all the work to install the driver into the system.
-The driver is not however activated; for that you must use the Start_SddFilt
-function.
-****************************************************************************/
-ulong PMAPI PM_installService(
- const char *szDriverName,
- const char *szServiceName,
- const char *szLoadGroup,
- ulong dwServiceType)
-{
- SC_HANDLE scmHandle;
- SC_HANDLE driverHandle;
- char szDriverPath[MAX_PATH];
- HKEY key;
- char keyPath[MAX_PATH];
- ulong status;
-
- /* Obtain a handle to the service control manager requesting all access */
- if ((scmHandle = OpenSCManager(NULL, NULL, SC_MANAGER_ALL_ACCESS)) == NULL)
- return GetLastError();
-
- /* Find the path to the driver in system directory */
- GetSystemDirectory(szDriverPath, sizeof(szDriverPath));
- strcat(szDriverPath, "\\drivers\\");
- strcat(szDriverPath, szDriverName);
-
- /* Create the service with the Service Control Manager. */
- driverHandle = CreateService(scmHandle,
- szServiceName,
- szServiceName,
- SERVICE_ALL_ACCESS,
- dwServiceType,
- SERVICE_BOOT_START,
- SERVICE_ERROR_NORMAL,
- szDriverPath,
- szLoadGroup,
- NULL,
- NULL,
- NULL,
- NULL);
-
- /* Check to see if the driver could actually be installed. */
- if (!driverHandle) {
- status = GetLastError();
- CloseServiceHandle(scmHandle);
- return status;
- }
-
- /* Get a handle to the key for driver so that it can be altered in the */
- /* next step. */
- strcpy(keyPath, "SYSTEM\\CurrentControlSet\\Services\\");
- strcat(keyPath, szServiceName);
- if ((status = RegOpenKeyEx(HKEY_LOCAL_MACHINE,keyPath,0,KEY_ALL_ACCESS,&key)) != ERROR_SUCCESS) {
- /* A problem has occured. Delete the service so that it is not installed. */
- status = GetLastError();
- DeleteService(driverHandle);
- CloseServiceHandle(driverHandle);
- CloseServiceHandle(scmHandle);
- return status;
- }
-
- /* Delete the ImagePath value in the newly created key so that the */
- /* system looks for the driver in the normal location. */
- if ((status = RegDeleteValue(key, "ImagePath")) != ERROR_SUCCESS) {
- /* A problem has occurred. Delete the service so that it is not */
- /* installed and will not try to start. */
- RegCloseKey(key);
- DeleteService(driverHandle);
- CloseServiceHandle(driverHandle);
- CloseServiceHandle(scmHandle);
- return status;
- }
-
- /* Clean up and exit */
- RegCloseKey(key);
- CloseServiceHandle(driverHandle);
- CloseServiceHandle(scmHandle);
- return ERROR_SUCCESS;
-}
-
-/****************************************************************************
-PARAMETERS:
-szServiceName - Name of the service to start
-
-RETURNS:
-True on success, false on failure.
-
-REMARKS:
-This function is used to start the specified service and make it active.
-****************************************************************************/
-ulong PMAPI PM_startService(
- const char *szServiceName)
-{
- SC_HANDLE scmHandle;
- SC_HANDLE driverHandle;
- SERVICE_STATUS serviceStatus;
- ulong status;
-
- /* Obtain a handle to the service control manager requesting all access */
- if ((scmHandle = OpenSCManager(NULL, NULL, SC_MANAGER_ALL_ACCESS)) == NULL)
- return GetLastError();
-
- /* Open the service with the Service Control Manager. */
- if ((driverHandle = OpenService(scmHandle,szServiceName,SERVICE_ALL_ACCESS)) == NULL) {
- status = GetLastError();
- CloseServiceHandle(scmHandle);
- return status;
- }
-
- /* Start the service */
- if (!StartService(driverHandle,0,NULL)) {
- status = GetLastError();
- CloseServiceHandle(driverHandle);
- CloseServiceHandle(scmHandle);
- return status;
- }
-
- /* Query the service to make sure it is there */
- if (!QueryServiceStatus(driverHandle,&serviceStatus)) {
- status = GetLastError();
- CloseServiceHandle(driverHandle);
- CloseServiceHandle(scmHandle);
- return status;
- }
- CloseServiceHandle(driverHandle);
- CloseServiceHandle(scmHandle);
- return ERROR_SUCCESS;
-}
-
-/****************************************************************************
-PARAMETERS:
-szServiceName - Name of the service to stop
-
-RETURNS:
-True on success, false on failure.
-
-REMARKS:
-This function is used to stop the specified service and disable it.
-****************************************************************************/
-ulong PMAPI PM_stopService(
- const char *szServiceName)
-{
- SC_HANDLE scmHandle;
- SC_HANDLE driverHandle;
- SERVICE_STATUS serviceStatus;
- ulong status;
-
- /* Obtain a handle to the service control manager requesting all access */
- if ((scmHandle = OpenSCManager(NULL, NULL, SC_MANAGER_ALL_ACCESS)) == NULL)
- return GetLastError();
-
- /* Open the service with the Service Control Manager. */
- if ((driverHandle = OpenService(scmHandle,szServiceName,SERVICE_ALL_ACCESS)) == NULL) {
- status = GetLastError();
- CloseServiceHandle(scmHandle);
- return status;
- }
-
- /* Stop the service from running */
- if (!ControlService(driverHandle, SERVICE_CONTROL_STOP, &serviceStatus)) {
- status = GetLastError();
- CloseServiceHandle(driverHandle);
- CloseServiceHandle(scmHandle);
- return status;
- }
- CloseServiceHandle(driverHandle);
- CloseServiceHandle(scmHandle);
- return ERROR_SUCCESS;
-}
-
-/****************************************************************************
-PARAMETERS:
-szServiceName - Name of the service to remove
-
-RETURNS:
-True on success, false on failure.
-
-REMARKS:
-This function is used to remove a service completely from the system.
-****************************************************************************/
-ulong PMAPI PM_removeService(
- const char *szServiceName)
-{
- SC_HANDLE scmHandle;
- SC_HANDLE driverHandle;
- ulong status;
-
- /* Obtain a handle to the service control manager requesting all access */
- if ((scmHandle = OpenSCManager(NULL, NULL, SC_MANAGER_ALL_ACCESS)) == NULL)
- return GetLastError();
-
- /* Open the service with the Service Control Manager. */
- if ((driverHandle = OpenService(scmHandle,szServiceName,SERVICE_ALL_ACCESS)) == NULL) {
- status = GetLastError();
- CloseServiceHandle(scmHandle);
- return status;
- }
-
- /* Remove the service */
- if (!DeleteService(driverHandle)) {
- status = GetLastError();
- CloseServiceHandle(driverHandle);
- CloseServiceHandle(scmHandle);
- return status;
- }
- CloseServiceHandle(driverHandle);
- CloseServiceHandle(scmHandle);
- return ERROR_SUCCESS;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/win32/oshdr.h b/board/MAI/bios_emulator/scitech/src/pm/win32/oshdr.h
deleted file mode 100644
index 0c59e9006f..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/win32/oshdr.h
+++ /dev/null
@@ -1,79 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Win32
-*
-* Description: Include file to include all OS specific header files.
-*
-****************************************************************************/
-
-#define WIN32_LEAN_AND_MEAN
-#define STRICT
-#include <windows.h>
-#include <mmsystem.h>
-#include <float.h>
-#define NONAMELESSUNION
-#include "pm/ddraw.h"
-
-/* Macros to save and restore the default control word. Windows 9x has
- * some bugs in it such that calls to load any DLL's which load 16-bit
- * DLL's cause the floating point control word to get trashed. We fix
- * this by saving and restoring the control word across problematic
- * calls.
- */
-
-#if defined(__INTEL__)
-#define GET_DEFAULT_CW() \
-{ \
- if (_PM_cw_default == 0) \
- _PM_cw_default = _control87(0,0); \
-}
-#define RESET_DEFAULT_CW() \
- _control87(_PM_cw_default,0xFFFFFFFF)
-#else
-#define GET_DEFAULT_CW()
-#define RESET_DEFAULT_CW()
-#endif
-
-/* Custom window messages */
-
-#define WM_DO_SUSPEND_APP WM_USER
-#define WM_PM_LEAVE_FULLSCREEN 0
-#define WM_PM_RESTORE_FULLSCREEN 1
-
-/* Macro for disabling AutoPlay on a use system */
-
-#define AUTOPLAY_DRIVE_CDROM 0x20
-
-/*--------------------------- Global Variables ----------------------------*/
-
-#ifdef __INTEL__
-extern uint _PM_cw_default; /* Default FPU control word */
-#endif
-extern int _PM_deskX,_PM_deskY; /* Desktop dimensions */
-extern HWND _PM_hwndConsole; /* Window handle for console */
-
-/*-------------------------- Internal Functions ---------------------------*/
-
-void _EVT_pumpMessages(void);
diff --git a/board/MAI/bios_emulator/scitech/src/pm/win32/pm.c b/board/MAI/bios_emulator/scitech/src/pm/win32/pm.c
deleted file mode 100644
index 1ffdbccabc..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/win32/pm.c
+++ /dev/null
@@ -1,1459 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Win32
-*
-* Description: Implementation for the OS Portability Manager Library, which
-* contains functions to implement OS specific services in a
-* generic, cross platform API. Porting the OS Portability
-* Manager library is the first step to porting any SciTech
-* products to a new platform.
-*
-****************************************************************************/
-
-#define WIN32_LEAN_AND_MEAN
-#define STRICT
-#include <windows.h>
-#include <mmsystem.h>
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <direct.h>
-#include "pmapi.h"
-#include "drvlib/os/os.h"
-#include "pm_help.h"
-
-/*--------------------------- Global variables ----------------------------*/
-
-ibool _PM_haveWinNT; /* True if we are running on NT */
-static uint VESABuf_len = 1024; /* Length of the VESABuf buffer */
-static void *VESABuf_ptr = NULL;/* Near pointer to VESABuf */
-static uint VESABuf_rseg; /* Real mode segment of VESABuf */
-static uint VESABuf_roff; /* Real mode offset of VESABuf */
-HANDLE _PM_hDevice = NULL; /* Handle to Win32 VxD */
-static ibool inited = false; /* Flags if we are initialised */
-static void (PMAPIP fatalErrorCleanup)(void) = NULL;
-
-static char *szMachineNameKey = "System\\CurrentControlSet\\control\\ComputerName\\ComputerName";
-static char *szMachineNameKeyNT = "System\\CurrentControlSet\\control\\ComputerName\\ActiveComputerName";
-static char *szMachineName = "ComputerName";
-
-/*----------------------------- Implementation ----------------------------*/
-
-/* Macro to check for a valid, loaded version of PMHELP. We check this
- * on demand when we need these services rather than when PM_init() is
- * called because if we are running on DirectDraw we don't need PMHELP.VXD.
- */
-
-#define CHECK_FOR_PMHELP() \
-{ \
- if (_PM_hDevice == INVALID_HANDLE_VALUE) \
- if (_PM_haveWinNT) \
- PM_fatalError("Unable to connect to PMHELP.SYS or SDDHELP.SYS!"); \
- else \
- PM_fatalError("Unable to connect to PMHELP.VXD or SDDHELP.VXD!"); \
-}
-
-/****************************************************************************
-REMARKS:
-Initialise the PM library and connect to our helper device driver. If we
-cannot connect to our helper device driver, we bail out with an error
-message. Our Windows 9x VxD is dynamically loadable, so it can be loaded
-after the system has started.
-****************************************************************************/
-void PMAPI PM_init(void)
-{
- DWORD inBuf[1]; /* Buffer to receive data from VxD */
- DWORD outBuf[1]; /* Buffer to receive data from VxD */
- DWORD count; /* Count of bytes returned from VxD */
- char cntPath[PM_MAX_PATH];
- char *env;
-
- /* Create a file handle for the static VxD if possible, otherwise
- * dynamically load the PMHELP helper VxD. Note that if an old version
- * of SDD is loaded, we use the PMHELP VxD instead.
- */
- if (!inited) {
- /* Determine if we are running under Windows NT or not and
- * set the global OS type variable.
- */
- _PM_haveWinNT = false;
- if ((GetVersion() & 0x80000000UL) == 0)
- _PM_haveWinNT = true;
- ___drv_os_type = (_PM_haveWinNT) ? _OS_WINNT : _OS_WIN95;
-
- /* Now try to connect to SDDHELP.VXD or SDDHELP.SYS */
- _PM_hDevice = CreateFile(SDDHELP_MODULE_PATH, 0,0,0, CREATE_NEW, FILE_FLAG_DELETE_ON_CLOSE, 0);
- if (_PM_hDevice != INVALID_HANDLE_VALUE) {
- if (!DeviceIoControl(_PM_hDevice, PMHELP_GETVER32, NULL, 0,
- outBuf, sizeof(outBuf), &count, NULL) || outBuf[0] < PMHELP_VERSION) {
- /* Old version of SDDHELP loaded, so use PMHELP instead */
- CloseHandle(_PM_hDevice);
- _PM_hDevice = INVALID_HANDLE_VALUE;
- }
- }
- if (_PM_hDevice == INVALID_HANDLE_VALUE) {
- /* First try to see if there is a currently loaded PMHELP driver.
- * This is usually the case when we are running under Windows NT/2K.
- */
- _PM_hDevice = CreateFile(PMHELP_MODULE_PATH, 0,0,0, CREATE_NEW, FILE_FLAG_DELETE_ON_CLOSE, 0);
- if (_PM_hDevice == INVALID_HANDLE_VALUE) {
- /* The driver was not staticly loaded, so try creating a file handle
- * to a dynamic version of the VxD if possible. Note that on WinNT/2K we
- * cannot support dynamically loading the drivers.
- */
- _PM_hDevice = CreateFile(PMHELP_VXD_PATH, 0,0,0, CREATE_NEW, FILE_FLAG_DELETE_ON_CLOSE, 0);
- }
- }
- if (_PM_hDevice != INVALID_HANDLE_VALUE) {
- /* Call the driver to determine the version number */
- if (!DeviceIoControl(_PM_hDevice, PMHELP_GETVER32, inBuf, sizeof(inBuf),
- outBuf, sizeof(outBuf), &count, NULL) || outBuf[0] < PMHELP_VERSION) {
- if (_PM_haveWinNT)
- PM_fatalError("Older version of PMHELP.SYS found!");
- else
- PM_fatalError("Older version of PMHELP.VXD found!");
- }
-
- /* Now set the current path inside the VxD so it knows what the
- * current directory is for loading Nucleus drivers.
- */
- inBuf[0] = (ulong)PM_getCurrentPath(cntPath,sizeof(cntPath));
- if (!DeviceIoControl(_PM_hDevice, PMHELP_SETCNTPATH32, inBuf, sizeof(inBuf), outBuf, sizeof(outBuf), &count, NULL))
- PM_fatalError("Unable to set VxD current path!");
-
- /* Now pass down the NUCLEUS_PATH environment variable to the device
- * driver so it can use this value if it is found.
- */
- if ((env = getenv("NUCLEUS_PATH")) != NULL) {
- inBuf[0] = (ulong)env;
- if (!DeviceIoControl(_PM_hDevice, PMHELP_SETNUCLEUSPATH32, inBuf, sizeof(inBuf), outBuf, sizeof(outBuf), &count, NULL))
- PM_fatalError("Unable to set VxD Nucleus path!");
- }
-
- /* Enable IOPL for ring-3 code by default if driver is present */
- if (_PM_haveWinNT)
- PM_setIOPL(3);
- }
-
- /* Indicate that we have been initialised */
- inited = true;
- }
-}
-
-/****************************************************************************
-REMARKS:
-We do have BIOS access under Windows 9x, but not under Windows NT.
-****************************************************************************/
-int PMAPI PM_setIOPL(
- int iopl)
-{
- DWORD inBuf[1]; /* Buffer to receive data from VxD */
- DWORD outBuf[1]; /* Buffer to receive data from VxD */
- DWORD count; /* Count of bytes returned from VxD */
- static int cntIOPL = 0;
- int oldIOPL = cntIOPL;
-
- /* Enable I/O by adjusting the I/O permissions map on Windows NT */
- if (_PM_haveWinNT) {
- CHECK_FOR_PMHELP();
- if (iopl == 3)
- DeviceIoControl(_PM_hDevice, PMHELP_ENABLERING3IOPL, inBuf, sizeof(inBuf),outBuf, sizeof(outBuf), &count, NULL);
- else
- DeviceIoControl(_PM_hDevice, PMHELP_DISABLERING3IOPL, inBuf, sizeof(inBuf),outBuf, sizeof(outBuf), &count, NULL);
- cntIOPL = iopl;
- return oldIOPL;
- }
-
- /* We always have IOPL on Windows 9x */
- return 3;
-}
-
-/****************************************************************************
-REMARKS:
-We do have BIOS access under Windows 9x, but not under Windows NT.
-****************************************************************************/
-ibool PMAPI PM_haveBIOSAccess(void)
-{
- if (PM_getOSType() == _OS_WINNT)
- return false;
- else
- return _PM_hDevice != INVALID_HANDLE_VALUE;
-}
-
-/****************************************************************************
-REMARKS:
-Return the operating system type identifier.
-****************************************************************************/
-long PMAPI PM_getOSType(void)
-{
- if ((GetVersion() & 0x80000000UL) == 0)
- return ___drv_os_type = _OS_WINNT;
- else
- return ___drv_os_type = _OS_WIN95;
-}
-
-/****************************************************************************
-REMARKS:
-Return the runtime type identifier.
-****************************************************************************/
-int PMAPI PM_getModeType(void)
-{
- return PM_386;
-}
-
-/****************************************************************************
-REMARKS:
-Add a file directory separator to the end of the filename.
-****************************************************************************/
-void PMAPI PM_backslash(
- char *s)
-{
- uint pos = strlen(s);
- if (s[pos-1] != '\\') {
- s[pos] = '\\';
- s[pos+1] = '\0';
- }
-}
-
-/****************************************************************************
-REMARKS:
-Add a user defined PM_fatalError cleanup function.
-****************************************************************************/
-void PMAPI PM_setFatalErrorCleanup(
- void (PMAPIP cleanup)(void))
-{
- fatalErrorCleanup = cleanup;
-}
-
-/****************************************************************************
-REMARKS:
-Report a fatal error condition and halt the program.
-****************************************************************************/
-void PMAPI PM_fatalError(
- const char *msg)
-{
- if (fatalErrorCleanup)
- fatalErrorCleanup();
- MessageBox(NULL,msg,"Fatal Error!", MB_ICONEXCLAMATION);
- exit(1);
-}
-
-/****************************************************************************
-REMARKS:
-Allocate the real mode VESA transfer buffer for communicating with the BIOS.
-****************************************************************************/
-void * PMAPI PM_getVESABuf(
- uint *len,
- uint *rseg,
- uint *roff)
-{
- DWORD outBuf[4]; /* Buffer to receive data from VxD */
- DWORD count; /* Count of bytes returned from VxD */
-
- /* We require the helper VxD to be loaded staticly in order to support
- * the VESA transfer buffer. We do not support dynamically allocating
- * real mode memory buffers from Win32 programs (we need a 16-bit DLL
- * for this, and Windows 9x becomes very unstable if you free the
- * memory blocks out of order).
- */
- if (!inited)
- PM_init();
- if (!VESABuf_ptr) {
- CHECK_FOR_PMHELP();
- if (DeviceIoControl(_PM_hDevice, PMHELP_GETVESABUF32, NULL, 0,
- outBuf, sizeof(outBuf), &count, NULL)) {
- if (!outBuf[0])
- return NULL;
- VESABuf_ptr = (void*)outBuf[0];
- VESABuf_len = outBuf[1];
- VESABuf_rseg = outBuf[2];
- VESABuf_roff = outBuf[3];
- }
- }
- *len = VESABuf_len;
- *rseg = VESABuf_rseg;
- *roff = VESABuf_roff;
- return VESABuf_ptr;
-}
-
-/****************************************************************************
-REMARKS:
-Check if a key has been pressed.
-****************************************************************************/
-int PMAPI PM_kbhit(void)
-{
- /* Not used in Windows */
- return true;
-}
-
-/****************************************************************************
-REMARKS:
-Wait for and return the next keypress.
-****************************************************************************/
-int PMAPI PM_getch(void)
-{
- /* Not used in Windows */
- return 0xD;
-}
-
-/****************************************************************************
-REMARKS:
-Set the location of the OS console cursor.
-****************************************************************************/
-void PM_setOSCursorLocation(
- int x,
- int y)
-{
- /* Nothing to do for Windows */
- (void)x;
- (void)y;
-}
-
-/****************************************************************************
-REMARKS:
-Set the width of the OS console.
-****************************************************************************/
-void PM_setOSScreenWidth(
- int width,
- int height)
-{
- /* Nothing to do for Windows */
- (void)width;
- (void)height;
-}
-
-/****************************************************************************
-REMARKS:
-Set the real time clock handler (used for software stereo modes).
-****************************************************************************/
-ibool PMAPI PM_setRealTimeClockHandler(
- PM_intHandler ih,
- int frequency)
-{
- /* We do not support this from Win32 programs. Rather the VxD handles
- * this stuff it will take care of hooking the stereo flip functions at
- * the VxD level.
- */
- (void)ih;
- (void)frequency;
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Set the real time clock frequency (for stereo modes).
-****************************************************************************/
-void PMAPI PM_setRealTimeClockFrequency(
- int frequency)
-{
- /* Not supported under Win32 */
- (void)frequency;
-}
-
-/****************************************************************************
-REMARKS:
-Restore the original real time clock handler.
-****************************************************************************/
-void PMAPI PM_restoreRealTimeClockHandler(void)
-{
- /* Not supported under Win32 */
-}
-
-/****************************************************************************
-REMARKS:
-Return the current operating system path or working directory.
-****************************************************************************/
-char * PMAPI PM_getCurrentPath(
- char *path,
- int maxLen)
-{
- return getcwd(path,maxLen);
-}
-
-/****************************************************************************
-REMARKS:
-Query a string from the registry (extended version).
-****************************************************************************/
-static ibool REG_queryStringEx(
- HKEY hKey,
- const char *szValue,
- char *value,
- ulong size)
-{
- DWORD type;
-
- if (RegQueryValueEx(hKey,(PCHAR)szValue,(PDWORD)NULL,(PDWORD)&type,(LPBYTE)value,(PDWORD)&size) == ERROR_SUCCESS)
- return true;
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Query a string from the registry.
-****************************************************************************/
-static ibool REG_queryString(
- const char *szKey,
- const char *szValue,
- char *value,
- DWORD size)
-{
- HKEY hKey;
- ibool status = false;
-
- memset(value,0,sizeof(value));
- if (RegOpenKey(HKEY_LOCAL_MACHINE,szKey,&hKey) == ERROR_SUCCESS) {
- status = REG_queryStringEx(hKey,szValue,value,size);
- RegCloseKey(hKey);
- }
- return status;
-}
-
-/****************************************************************************
-REMARKS:
-Return the drive letter for the boot drive.
-****************************************************************************/
-char PMAPI PM_getBootDrive(void)
-{
- static char path[256];
- GetSystemDirectory(path,sizeof(path));
- return path[0];
-}
-
-/****************************************************************************
-REMARKS:
-Return the path to the VBE/AF driver files.
-****************************************************************************/
-const char * PMAPI PM_getVBEAFPath(void)
-{
- return "c:\\";
-}
-
-/****************************************************************************
-REMARKS:
-Return the path to the Nucleus driver files.
-****************************************************************************/
-const char * PMAPI PM_getNucleusPath(void)
-{
- static char path[256];
- char *env;
-
- if ((env = getenv("NUCLEUS_PATH")) != NULL)
- return env;
- GetSystemDirectory(path,sizeof(path));
- strcat(path,"\\nucleus");
- return path;
-}
-
-/****************************************************************************
-REMARKS:
-Return the path to the Nucleus configuration files.
-****************************************************************************/
-const char * PMAPI PM_getNucleusConfigPath(void)
-{
- static char path[256];
- strcpy(path,PM_getNucleusPath());
- PM_backslash(path);
- strcat(path,"config");
- return path;
-}
-
-/****************************************************************************
-REMARKS:
-Return a unique identifier for the machine if possible.
-****************************************************************************/
-const char * PMAPI PM_getUniqueID(void)
-{
- return PM_getMachineName();
-}
-
-/****************************************************************************
-REMARKS:
-Get the name of the machine on the network.
-****************************************************************************/
-const char * PMAPI PM_getMachineName(void)
-{
- static char name[256];
-
- if (REG_queryString(szMachineNameKey,szMachineName,name,sizeof(name)))
- return name;
- if (REG_queryString(szMachineNameKeyNT,szMachineName,name,sizeof(name)))
- return name;
- return "Unknown";
-}
-
-/****************************************************************************
-REMARKS:
-Return a pointer to the real mode BIOS data area.
-****************************************************************************/
-void * PMAPI PM_getBIOSPointer(void)
-{
- if (_PM_haveWinNT) {
- /* On Windows NT we have to map it physically directly */
- return PM_mapPhysicalAddr(0x400, 0x1000, true);
- }
- else {
- /* For Windows 9x we can access this memory directly */
- return (void*)0x400;
- }
-}
-
-/****************************************************************************
-REMARKS:
-Return a pointer to 0xA0000 physical VGA graphics framebuffer.
-****************************************************************************/
-void * PMAPI PM_getA0000Pointer(void)
-{
- if (_PM_haveWinNT) {
- /* On Windows NT we have to map it physically directly */
- return PM_mapPhysicalAddr(0xA0000, 0x0FFFF, false);
- }
- else {
- /* Always use the 0xA0000 linear address so that we will use
- * whatever page table mappings are set up for us (ie: for virtual
- * bank switching.
- */
- return (void*)0xA0000;
- }
-}
-
-/****************************************************************************
-REMARKS:
-Map a physical address to a linear address in the callers process.
-****************************************************************************/
-void * PMAPI PM_mapPhysicalAddr(
- ulong base,
- ulong limit,
- ibool isCached)
-{
- DWORD inBuf[3]; /* Buffer to send data to VxD */
- DWORD outBuf[1]; /* Buffer to receive data from VxD */
- DWORD count; /* Count of bytes returned from VxD */
-
- if (!inited)
- PM_init();
- inBuf[0] = base;
- inBuf[1] = limit;
- inBuf[2] = isCached;
- CHECK_FOR_PMHELP();
- if (DeviceIoControl(_PM_hDevice, PMHELP_MAPPHYS32, inBuf, sizeof(inBuf),
- outBuf, sizeof(outBuf), &count, NULL))
- return (void*)outBuf[0];
- return NULL;
-}
-
-/****************************************************************************
-REMARKS:
-Free a physical address mapping allocated by PM_mapPhysicalAddr.
-****************************************************************************/
-void PMAPI PM_freePhysicalAddr(
- void *ptr,
- ulong limit)
-{
- /* We never free the mappings under Win32 (the VxD tracks them and
- * reissues the same mappings until the system is rebooted).
- */
- (void)ptr;
- (void)limit;
-}
-
-/****************************************************************************
-REMARKS:
-Find the physical address of a linear memory address in current process.
-****************************************************************************/
-ulong PMAPI PM_getPhysicalAddr(
- void *p)
-{
- DWORD inBuf[1]; /* Buffer to send data to VxD */
- DWORD outBuf[1]; /* Buffer to receive data from VxD */
- DWORD count; /* Count of bytes returned from VxD */
-
- if (!inited)
- PM_init();
- inBuf[0] = (ulong)p;
- CHECK_FOR_PMHELP();
- if (DeviceIoControl(_PM_hDevice, PMHELP_GETPHYSICALADDR32, inBuf, sizeof(inBuf),
- outBuf, sizeof(outBuf), &count, NULL))
- return outBuf[0];
- return 0xFFFFFFFFUL;
-}
-
-/****************************************************************************
-REMARKS:
-Find the physical address of a linear memory address in current process.
-****************************************************************************/
-ibool PMAPI PM_getPhysicalAddrRange(
- void *p,
- ulong length,
- ulong *physAddress)
-{
- DWORD inBuf[3]; /* Buffer to send data to VxD */
- DWORD outBuf[1]; /* Buffer to receive data from VxD */
- DWORD count; /* Count of bytes returned from VxD */
-
- if (!inited)
- PM_init();
- inBuf[0] = (ulong)p;
- inBuf[1] = (ulong)length;
- inBuf[2] = (ulong)physAddress;
- CHECK_FOR_PMHELP();
- if (DeviceIoControl(_PM_hDevice, PMHELP_GETPHYSICALADDRRANGE32, inBuf, sizeof(inBuf),
- outBuf, sizeof(outBuf), &count, NULL))
- return outBuf[0];
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Sleep for the specified number of milliseconds.
-****************************************************************************/
-void PMAPI PM_sleep(
- ulong milliseconds)
-{
- Sleep(milliseconds);
-}
-
-/****************************************************************************
-REMARKS:
-Return the base I/O port for the specified COM port.
-****************************************************************************/
-int PMAPI PM_getCOMPort(int port)
-{
- /* TODO: Re-code this to determine real values using the Plug and Play */
- /* manager for the OS. */
- switch (port) {
- case 0: return 0x3F8;
- case 1: return 0x2F8;
- case 2: return 0x3E8;
- case 3: return 0x2E8;
- }
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-Return the base I/O port for the specified LPT port.
-****************************************************************************/
-int PMAPI PM_getLPTPort(int port)
-{
- /* TODO: Re-code this to determine real values using the Plug and Play */
- /* manager for the OS. */
- switch (port) {
- case 0: return 0x3BC;
- case 1: return 0x378;
- case 2: return 0x278;
- }
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-Allocate a block of shared memory. For Win9x we allocate shared memory
-as locked, global memory that is accessible from any memory context
-(including interrupt time context), which allows us to load our important
-data structure and code such that we can access it directly from a ring
-0 interrupt context.
-****************************************************************************/
-void * PMAPI PM_mallocShared(
- long size)
-{
- DWORD inBuf[1]; /* Buffer to send data to VxD */
- DWORD outBuf[1]; /* Buffer to receive data from VxD */
- DWORD count; /* Count of bytes returned from VxD */
-
- inBuf[0] = size;
- CHECK_FOR_PMHELP();
- if (DeviceIoControl(_PM_hDevice, PMHELP_MALLOCSHARED32, inBuf, sizeof(inBuf),
- outBuf, sizeof(outBuf), &count, NULL))
- return (void*)outBuf[0];
- return NULL;
-}
-
-/****************************************************************************
-REMARKS:
-Free a block of shared memory.
-****************************************************************************/
-void PMAPI PM_freeShared(
- void *ptr)
-{
- DWORD inBuf[1]; /* Buffer to send data to VxD */
-
- inBuf[0] = (ulong)ptr;
- CHECK_FOR_PMHELP();
- DeviceIoControl(_PM_hDevice, PMHELP_FREESHARED32, inBuf, sizeof(inBuf), NULL, 0, NULL, NULL);
-}
-
-/****************************************************************************
-REMARKS:
-Map a linear memory address to the calling process address space. The
-address will have been allocated in another process using the
-PM_mapPhysicalAddr function.
-****************************************************************************/
-void * PMAPI PM_mapToProcess(
- void *base,
- ulong limit)
-{
- (void)base;
- (void)limit;
- return base;
-}
-
-/****************************************************************************
-REMARKS:
-Map a real mode pointer to a protected mode pointer.
-****************************************************************************/
-void * PMAPI PM_mapRealPointer(
- uint r_seg,
- uint r_off)
-{
- return (void*)(MK_PHYS(r_seg,r_off));
-}
-
-/****************************************************************************
-REMARKS:
-Allocate a block of real mode memory
-****************************************************************************/
-void * PMAPI PM_allocRealSeg(
- uint size,
- uint *r_seg,
- uint *r_off)
-{
- /* We do not support dynamically allocating real mode memory buffers
- * from Win32 programs (we need a 16-bit DLL for this, and Windows
- * 9x becomes very unstable if you free the memory blocks out of order).
- */
- (void)size;
- (void)r_seg;
- (void)r_off;
- return NULL;
-}
-
-/****************************************************************************
-REMARKS:
-Free a block of real mode memory.
-****************************************************************************/
-void PMAPI PM_freeRealSeg(
- void *mem)
-{
- /* Not supported in Windows */
- (void)mem;
-}
-
-/****************************************************************************
-REMARKS:
-Issue a real mode interrupt (parameters in DPMI compatible structure)
-****************************************************************************/
-void PMAPI DPMI_int86(
- int intno,
- DPMI_regs *regs)
-{
- DWORD inBuf[2]; /* Buffer to send data to VxD */
- DWORD count; /* Count of bytes returned from VxD */
-
- if (!inited)
- PM_init();
- inBuf[0] = intno;
- inBuf[1] = (ulong)regs;
- CHECK_FOR_PMHELP();
- DeviceIoControl(_PM_hDevice, PMHELP_DPMIINT8632, inBuf, sizeof(inBuf),
- NULL, 0, &count, NULL);
-}
-
-/****************************************************************************
-REMARKS:
-Issue a real mode interrupt.
-****************************************************************************/
-int PMAPI PM_int86(
- int intno,
- RMREGS *in,
- RMREGS *out)
-{
- DWORD inBuf[3]; /* Buffer to send data to VxD */
- DWORD outBuf[1]; /* Buffer to receive data from VxD */
- DWORD count; /* Count of bytes returned from VxD */
-
- if (!inited)
- PM_init();
- inBuf[0] = intno;
- inBuf[1] = (ulong)in;
- inBuf[2] = (ulong)out;
- CHECK_FOR_PMHELP();
- if (DeviceIoControl(_PM_hDevice, PMHELP_INT8632, inBuf, sizeof(inBuf),
- outBuf, sizeof(outBuf), &count, NULL))
- return outBuf[0];
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-Issue a real mode interrupt.
-****************************************************************************/
-int PMAPI PM_int86x(
- int intno,
- RMREGS *in,
- RMREGS *out,
- RMSREGS *sregs)
-{
- DWORD inBuf[4]; /* Buffer to send data to VxD */
- DWORD outBuf[1]; /* Buffer to receive data from VxD */
- DWORD count; /* Count of bytes returned from VxD */
-
- if (!inited)
- PM_init();
- inBuf[0] = intno;
- inBuf[1] = (ulong)in;
- inBuf[2] = (ulong)out;
- inBuf[3] = (ulong)sregs;
- CHECK_FOR_PMHELP();
- if (DeviceIoControl(_PM_hDevice, PMHELP_INT86X32, inBuf, sizeof(inBuf),
- outBuf, sizeof(outBuf), &count, NULL))
- return outBuf[0];
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-Call a real mode far function.
-****************************************************************************/
-void PMAPI PM_callRealMode(
- uint seg,
- uint off,
- RMREGS *in,
- RMSREGS *sregs)
-{
- DWORD inBuf[4]; /* Buffer to send data to VxD */
- DWORD count; /* Count of bytes returned from VxD */
-
- if (!inited)
- PM_init();
- inBuf[0] = seg;
- inBuf[1] = off;
- inBuf[2] = (ulong)in;
- inBuf[3] = (ulong)sregs;
- CHECK_FOR_PMHELP();
- DeviceIoControl(_PM_hDevice, PMHELP_CALLREALMODE32, inBuf, sizeof(inBuf),
- NULL, 0, &count, NULL);
-}
-
-/****************************************************************************
-REMARKS:
-Return the amount of available memory.
-****************************************************************************/
-void PMAPI PM_availableMemory(
- ulong *physical,
- ulong *total)
-{
- /* We don't support this under Win32 at the moment */
- *physical = *total = 0;
-}
-
-/****************************************************************************
-REMARKS:
-Allocate a block of locked, physical memory for DMA operations.
-****************************************************************************/
-void * PMAPI PM_allocLockedMem(
- uint size,
- ulong *physAddr,
- ibool contiguous,
- ibool below16M)
-{
- DWORD inBuf[4]; /* Buffer to send data to VxD */
- DWORD outBuf[1]; /* Buffer to receive data from VxD */
- DWORD count; /* Count of bytes returned from VxD */
-
- if (!inited)
- PM_init();
- inBuf[0] = size;
- inBuf[1] = (ulong)physAddr;
- inBuf[2] = (ulong)contiguous;
- inBuf[3] = (ulong)below16M;
- CHECK_FOR_PMHELP();
- if (DeviceIoControl(_PM_hDevice, PMHELP_ALLOCLOCKED32, inBuf, sizeof(inBuf),
- outBuf, sizeof(outBuf), &count, NULL))
- return (void*)outBuf[0];
- return NULL;
-}
-
-/****************************************************************************
-REMARKS:
-Free a block of locked physical memory.
-****************************************************************************/
-void PMAPI PM_freeLockedMem(
- void *p,
- uint size,
- ibool contiguous)
-{
- DWORD inBuf[3]; /* Buffer to send data to VxD */
- DWORD count; /* Count of bytes returned from VxD */
-
- if (!inited)
- PM_init();
- inBuf[0] = (ulong)p;
- inBuf[1] = size;
- inBuf[2] = contiguous;
- CHECK_FOR_PMHELP();
- DeviceIoControl(_PM_hDevice, PMHELP_FREELOCKED32, inBuf, sizeof(inBuf),
- NULL, 0, &count, NULL);
-}
-
-/****************************************************************************
-REMARKS:
-Allocates a page aligned and page sized block of memory
-****************************************************************************/
-void * PMAPI PM_allocPage(
- ibool locked)
-{
- DWORD inBuf[2]; /* Buffer to send data to VxD */
- DWORD outBuf[1]; /* Buffer to receive data from VxD */
- DWORD count; /* Count of bytes returned from VxD */
-
- if (!inited)
- PM_init();
- inBuf[0] = locked;
- CHECK_FOR_PMHELP();
- if (DeviceIoControl(_PM_hDevice, PMHELP_ALLOCPAGE32, inBuf, sizeof(inBuf),
- outBuf, sizeof(outBuf), &count, NULL))
- return (void*)outBuf[0];
- return NULL;
-}
-
-/****************************************************************************
-REMARKS:
-Free a page aligned and page sized block of memory
-****************************************************************************/
-void PMAPI PM_freePage(
- void *p)
-{
- DWORD inBuf[1]; /* Buffer to send data to VxD */
- DWORD count; /* Count of bytes returned from VxD */
-
- if (!inited)
- PM_init();
- inBuf[0] = (ulong)p;
- CHECK_FOR_PMHELP();
- DeviceIoControl(_PM_hDevice, PMHELP_FREEPAGE32, inBuf, sizeof(inBuf),
- NULL, 0, &count, NULL);
-}
-
-/****************************************************************************
-REMARKS:
-Lock linear memory so it won't be paged.
-****************************************************************************/
-int PMAPI PM_lockDataPages(void *p,uint len,PM_lockHandle *lh)
-{
- DWORD inBuf[2]; /* Buffer to send data to VxD */
- DWORD outBuf[1]; /* Buffer to receive data from VxD */
- DWORD count; /* Count of bytes returned from VxD */
-
- inBuf[0] = (ulong)p;
- inBuf[1] = len;
- inBuf[2] = (ulong)lh;
- CHECK_FOR_PMHELP();
- if (DeviceIoControl(_PM_hDevice, PMHELP_LOCKDATAPAGES32, inBuf, sizeof(inBuf),
- outBuf, sizeof(outBuf), &count, NULL))
- return outBuf[0];
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-Unlock linear memory so it won't be paged.
-****************************************************************************/
-int PMAPI PM_unlockDataPages(void *p,uint len,PM_lockHandle *lh)
-{
- DWORD inBuf[2]; /* Buffer to send data to VxD */
- DWORD outBuf[1]; /* Buffer to receive data from VxD */
- DWORD count; /* Count of bytes returned from VxD */
-
- inBuf[0] = (ulong)p;
- inBuf[1] = len;
- inBuf[2] = (ulong)lh;
- CHECK_FOR_PMHELP();
- if (DeviceIoControl(_PM_hDevice, PMHELP_UNLOCKDATAPAGES32, inBuf, sizeof(inBuf),
- outBuf, sizeof(outBuf), &count, NULL))
- return outBuf[0];
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-Lock linear memory so it won't be paged.
-****************************************************************************/
-int PMAPI PM_lockCodePages(void (*p)(),uint len,PM_lockHandle *lh)
-{
- DWORD inBuf[2]; /* Buffer to send data to VxD */
- DWORD outBuf[1]; /* Buffer to receive data from VxD */
- DWORD count; /* Count of bytes returned from VxD */
-
- inBuf[0] = (ulong)p;
- inBuf[1] = len;
- inBuf[2] = (ulong)lh;
- CHECK_FOR_PMHELP();
- if (DeviceIoControl(_PM_hDevice, PMHELP_LOCKCODEPAGES32, inBuf, sizeof(inBuf),
- outBuf, sizeof(outBuf), &count, NULL))
- return outBuf[0];
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-Unlock linear memory so it won't be paged.
-****************************************************************************/
-int PMAPI PM_unlockCodePages(void (*p)(),uint len,PM_lockHandle *lh)
-{
- DWORD inBuf[2]; /* Buffer to send data to VxD */
- DWORD outBuf[1]; /* Buffer to receive data from VxD */
- DWORD count; /* Count of bytes returned from VxD */
-
- inBuf[0] = (ulong)p;
- inBuf[1] = len;
- inBuf[2] = (ulong)lh;
- CHECK_FOR_PMHELP();
- if (DeviceIoControl(_PM_hDevice, PMHELP_UNLOCKCODEPAGES32, inBuf, sizeof(inBuf),
- outBuf, sizeof(outBuf), &count, NULL))
- return outBuf[0];
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-Call the VBE/Core software interrupt to change display banks.
-****************************************************************************/
-void PMAPI PM_setBankA(
- int bank)
-{
- RMREGS regs;
- regs.x.ax = 0x4F05;
- regs.x.bx = 0x0000;
- regs.x.dx = bank;
- PM_int86(0x10,&regs,&regs);
-}
-
-/****************************************************************************
-REMARKS:
-Call the VBE/Core software interrupt to change display banks.
-****************************************************************************/
-void PMAPI PM_setBankAB(
- int bank)
-{
- RMREGS regs;
- regs.x.ax = 0x4F05;
- regs.x.bx = 0x0000;
- regs.x.dx = bank;
- PM_int86(0x10,&regs,&regs);
- regs.x.ax = 0x4F05;
- regs.x.bx = 0x0001;
- regs.x.dx = bank;
- PM_int86(0x10,&regs,&regs);
-}
-
-/****************************************************************************
-REMARKS:
-Call the VBE/Core software interrupt to change display start address.
-****************************************************************************/
-void PMAPI PM_setCRTStart(
- int x,
- int y,
- int waitVRT)
-{
- RMREGS regs;
- regs.x.ax = 0x4F07;
- regs.x.bx = waitVRT;
- regs.x.cx = x;
- regs.x.dx = y;
- PM_int86(0x10,&regs,&regs);
-}
-
-/****************************************************************************
-REMARKS:
-Enable write combining for the memory region.
-****************************************************************************/
-ibool PMAPI PM_enableWriteCombine(
- ulong base,
- ulong length,
- uint type)
-{
- DWORD inBuf[3]; /* Buffer to send data to VxD */
- DWORD outBuf[1]; /* Buffer to receive data from VxD */
- DWORD count; /* Count of bytes returned from VxD */
-
- if (!inited)
- PM_init();
- inBuf[0] = base;
- inBuf[1] = length;
- inBuf[2] = type;
- CHECK_FOR_PMHELP();
- if (DeviceIoControl(_PM_hDevice, PMHELP_ENABLELFBCOMB32, inBuf, sizeof(inBuf),
- outBuf, sizeof(outBuf), &count, NULL))
- return outBuf[0];
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Get the page directory base register value
-****************************************************************************/
-ulong PMAPI _PM_getPDB(void)
-{
- DWORD outBuf[1]; /* Buffer to receive data from VxD */
- DWORD count; /* Count of bytes returned from VxD */
-
- CHECK_FOR_PMHELP();
- if (DeviceIoControl(_PM_hDevice, PMHELP_GETPDB32, NULL, 0,
- outBuf, sizeof(outBuf), &count, NULL))
- return outBuf[0];
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-Flush the translation lookaside buffer.
-****************************************************************************/
-void PMAPI PM_flushTLB(void)
-{
- CHECK_FOR_PMHELP();
- DeviceIoControl(_PM_hDevice, PMHELP_FLUSHTLB32, NULL, 0, NULL, 0, NULL, NULL);
-}
-
-/****************************************************************************
-REMARKS:
-Execute the POST on the secondary BIOS for a controller.
-****************************************************************************/
-ibool PMAPI PM_doBIOSPOST(
- ushort axVal,
- ulong BIOSPhysAddr,
- void *mappedBIOS,
- ulong BIOSLen)
-{
- /* This is never done by Win32 programs, but rather done by the VxD
- * when the system boots.
- */
- (void)axVal;
- (void)BIOSPhysAddr;
- (void)mappedBIOS;
- (void)BIOSLen;
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Load an OS specific shared library or DLL. If the OS does not support
-shared libraries, simply return NULL.
-****************************************************************************/
-PM_MODULE PMAPI PM_loadLibrary(
- const char *szDLLName)
-{
- return (PM_MODULE)LoadLibrary(szDLLName);
-}
-
-/****************************************************************************
-REMARKS:
-Get the address of a named procedure from a shared library.
-****************************************************************************/
-void * PMAPI PM_getProcAddress(
- PM_MODULE hModule,
- const char *szProcName)
-{
- return (void*)GetProcAddress((HINSTANCE)hModule,szProcName);
-}
-
-/****************************************************************************
-REMARKS:
-Unload a shared library.
-****************************************************************************/
-void PMAPI PM_freeLibrary(
- PM_MODULE hModule)
-{
- FreeLibrary((HINSTANCE)hModule);
-}
-
-/****************************************************************************
-REMARKS:
-Internal function to convert the find data to the generic interface.
-****************************************************************************/
-static void convertFindData(
- PM_findData *findData,
- WIN32_FIND_DATA *blk)
-{
- ulong dwSize = findData->dwSize;
-
- memset(findData,0,findData->dwSize);
- findData->dwSize = dwSize;
- if (blk->dwFileAttributes & FILE_ATTRIBUTE_READONLY)
- findData->attrib |= PM_FILE_READONLY;
- if (blk->dwFileAttributes & FILE_ATTRIBUTE_DIRECTORY)
- findData->attrib |= PM_FILE_DIRECTORY;
- if (blk->dwFileAttributes & FILE_ATTRIBUTE_ARCHIVE)
- findData->attrib |= PM_FILE_ARCHIVE;
- if (blk->dwFileAttributes & FILE_ATTRIBUTE_HIDDEN)
- findData->attrib |= PM_FILE_HIDDEN;
- if (blk->dwFileAttributes & FILE_ATTRIBUTE_SYSTEM)
- findData->attrib |= PM_FILE_SYSTEM;
- findData->sizeLo = blk->nFileSizeLow;
- findData->sizeHi = blk->nFileSizeHigh;
- strncpy(findData->name,blk->cFileName,PM_MAX_PATH);
- findData->name[PM_MAX_PATH-1] = 0;
-}
-
-/****************************************************************************
-REMARKS:
-Function to find the first file matching a search criteria in a directory.
-****************************************************************************/
-void *PMAPI PM_findFirstFile(
- const char *filename,
- PM_findData *findData)
-{
- WIN32_FIND_DATA blk;
- HANDLE hfile;
-
- if ((hfile = FindFirstFile(filename,&blk)) != INVALID_HANDLE_VALUE) {
- convertFindData(findData,&blk);
- return (void*)hfile;
- }
- return PM_FILE_INVALID;
-}
-
-/****************************************************************************
-REMARKS:
-Function to find the next file matching a search criteria in a directory.
-****************************************************************************/
-ibool PMAPI PM_findNextFile(
- void *handle,
- PM_findData *findData)
-{
- WIN32_FIND_DATA blk;
-
- if (FindNextFile((HANDLE)handle,&blk)) {
- convertFindData(findData,&blk);
- return true;
- }
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Function to close the find process
-****************************************************************************/
-void PMAPI PM_findClose(
- void *handle)
-{
- FindClose((HANDLE)handle);
-}
-
-/****************************************************************************
-REMARKS:
-Function to determine if a drive is a valid drive or not. Under Unix this
-function will return false for anything except a value of 3 (considered
-the root drive, and equivalent to C: for non-Unix systems). The drive
-numbering is:
-
- 1 - Drive A:
- 2 - Drive B:
- 3 - Drive C:
- etc
-
-****************************************************************************/
-ibool PMAPI PM_driveValid(
- char drive)
-{
- char buf[5];
- int type;
-
- sprintf(buf,"%c:\\", drive);
- return ((type = GetDriveType(buf)) != 0 && type != 1);
-}
-
-/****************************************************************************
-REMARKS:
-Function to get the current working directory for the specififed drive.
-Under Unix this will always return the current working directory regardless
-of what the value of 'drive' is.
-****************************************************************************/
-void PMAPI PM_getdcwd(
- int drive,
- char *dir,
- int len)
-{
- /* NT stores the current directory for drive N in the magic environment */
- /* variable =N: so we simply look for that environment variable. */
- char envname[4];
-
- envname[0] = '=';
- envname[1] = drive - 1 + 'A';
- envname[2] = ':';
- envname[3] = '\0';
- if (GetEnvironmentVariable(envname,dir,len) == 0) {
- /* The current directory or the drive has not been set yet, so */
- /* simply set it to the root. */
- dir[0] = envname[1];
- dir[1] = ':';
- dir[2] = '\\';
- dir[3] = '\0';
- SetEnvironmentVariable(envname,dir);
- }
-}
-
-/****************************************************************************
-REMARKS:
-Function to change the file attributes for a specific file.
-****************************************************************************/
-void PMAPI PM_setFileAttr(
- const char *filename,
- uint attrib)
-{
- DWORD attr = 0;
-
- if (attrib & PM_FILE_READONLY)
- attr |= FILE_ATTRIBUTE_READONLY;
- if (attrib & PM_FILE_ARCHIVE)
- attr |= FILE_ATTRIBUTE_ARCHIVE;
- if (attrib & PM_FILE_HIDDEN)
- attr |= FILE_ATTRIBUTE_HIDDEN;
- if (attrib & PM_FILE_SYSTEM)
- attr |= FILE_ATTRIBUTE_SYSTEM;
- SetFileAttributes((LPSTR)filename, attr);
-}
-
-/****************************************************************************
-REMARKS:
-Function to get the file attributes for a specific file.
-****************************************************************************/
-uint PMAPI PM_getFileAttr(
- const char *filename)
-{
- DWORD attr = GetFileAttributes(filename);
- uint attrib = 0;
-
- if (attr & FILE_ATTRIBUTE_READONLY)
- attrib |= PM_FILE_READONLY;
- if (attr & FILE_ATTRIBUTE_ARCHIVE)
- attrib |= PM_FILE_ARCHIVE;
- if (attr & FILE_ATTRIBUTE_HIDDEN)
- attrib |= PM_FILE_HIDDEN;
- if (attr & FILE_ATTRIBUTE_SYSTEM)
- attrib |= PM_FILE_SYSTEM;
- return attrib;
-}
-
-/****************************************************************************
-REMARKS:
-Function to create a directory.
-****************************************************************************/
-ibool PMAPI PM_mkdir(
- const char *filename)
-{
- return CreateDirectory(filename,NULL);
-}
-
-/****************************************************************************
-REMARKS:
-Function to remove a directory.
-****************************************************************************/
-ibool PMAPI PM_rmdir(
- const char *filename)
-{
- return RemoveDirectory(filename);
-}
-
-/****************************************************************************
-REMARKS:
-Function to get the file time and date for a specific file.
-****************************************************************************/
-ibool PMAPI PM_getFileTime(
- const char *filename,
- ibool gmTime,
- PM_time *time)
-{
- HFILE f;
- OFSTRUCT of;
- FILETIME utcTime,localTime;
- SYSTEMTIME sysTime;
- ibool status = false;
-
- of.cBytes = sizeof(of);
- if ((f = OpenFile(filename,&of,OF_READ)) == HFILE_ERROR)
- return false;
- if (!GetFileTime((HANDLE)f,NULL,NULL,&utcTime))
- goto Exit;
- if (!gmTime) {
- if (!FileTimeToLocalFileTime(&utcTime,&localTime))
- goto Exit;
- }
- else
- localTime = utcTime;
- if (!FileTimeToSystemTime(&localTime,&sysTime))
- goto Exit;
- time->year = sysTime.wYear;
- time->mon = sysTime.wMonth-1;
- time->day = sysTime.wYear;
- time->hour = sysTime.wHour;
- time->min = sysTime.wMinute;
- time->sec = sysTime.wSecond;
- status = true;
-
-Exit:
- CloseHandle((HANDLE)f);
- return status;
-}
-
-/****************************************************************************
-REMARKS:
-Function to set the file time and date for a specific file.
-****************************************************************************/
-ibool PMAPI PM_setFileTime(
- const char *filename,
- ibool gmTime,
- PM_time *time)
-{
- HFILE f;
- OFSTRUCT of;
- FILETIME utcTime,localTime;
- SYSTEMTIME sysTime;
- ibool status = false;
-
- of.cBytes = sizeof(of);
- if ((f = OpenFile(filename,&of,OF_WRITE)) == HFILE_ERROR)
- return false;
- sysTime.wYear = time->year;
- sysTime.wMonth = time->mon+1;
- sysTime.wYear = time->day;
- sysTime.wHour = time->hour;
- sysTime.wMinute = time->min;
- sysTime.wSecond = time->sec;
- if (!SystemTimeToFileTime(&sysTime,&localTime))
- goto Exit;
- if (!gmTime) {
- if (!LocalFileTimeToFileTime(&localTime,&utcTime))
- goto Exit;
- }
- else
- utcTime = localTime;
- if (!SetFileTime((HANDLE)f,NULL,NULL,&utcTime))
- goto Exit;
- status = true;
-
-Exit:
- CloseHandle((HANDLE)f);
- return status;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/win32/vflat.c b/board/MAI/bios_emulator/scitech/src/pm/win32/vflat.c
deleted file mode 100644
index 70491cdb80..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/win32/vflat.c
+++ /dev/null
@@ -1,53 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-*
-* Description: Dummy module; no virtual framebuffer for this OS
-*
-****************************************************************************/
-
-#include "pmapi.h"
-
-ibool PMAPI VF_available(void)
-{
- return false;
-}
-
-void * PMAPI VF_init(
- ulong baseAddr,
- int bankSize,
- int codeLen,
- void *bankFunc)
-{
- (void)baseAddr;
- (void)bankSize;
- (void)codeLen;
- (void)bankFunc;
- return NULL;
-}
-
-void PMAPI VF_exit(void)
-{
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/win32/ztimer.c b/board/MAI/bios_emulator/scitech/src/pm/win32/ztimer.c
deleted file mode 100644
index 5a901a4422..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/win32/ztimer.c
+++ /dev/null
@@ -1,136 +0,0 @@
-/****************************************************************************
-*
-* Ultra Long Period Timer
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Win32
-*
-* Description: OS specific implementation for the Zen Timer functions.
-*
-****************************************************************************/
-
-/*---------------------------- Global variables ---------------------------*/
-
-static CPU_largeInteger countFreq;
-static ibool havePerformanceCounter;
-static ulong start,finish;
-
-/*----------------------------- Implementation ----------------------------*/
-
-/****************************************************************************
-REMARKS:
-Initialise the Zen Timer module internals.
-****************************************************************************/
-void __ZTimerInit(void)
-{
-#ifdef NO_ASSEMBLER
- havePerformanceCounter = false;
-#else
- havePerformanceCounter = QueryPerformanceFrequency((LARGE_INTEGER*)&countFreq);
-#endif
-}
-
-/****************************************************************************
-REMARKS:
-Start the Zen Timer counting.
-****************************************************************************/
-static void __LZTimerOn(
- LZTimerObject *tm)
-{
- if (havePerformanceCounter)
- QueryPerformanceCounter((LARGE_INTEGER*)&tm->start);
- else
- tm->start.low = timeGetTime();
-}
-
-/****************************************************************************
-REMARKS:
-Compute the lap time since the timer was started.
-****************************************************************************/
-static ulong __LZTimerLap(
- LZTimerObject *tm)
-{
- CPU_largeInteger tmLap,tmCount;
-
- if (havePerformanceCounter) {
- QueryPerformanceCounter((LARGE_INTEGER*)&tmLap);
- _CPU_diffTime64(&tm->start,&tmLap,&tmCount);
- return _CPU_calcMicroSec(&tmCount,countFreq.low);
- }
- else {
- tmLap.low = timeGetTime();
- return (tmLap.low - tm->start.low) * 1000L;
- }
-}
-
-/****************************************************************************
-REMARKS:
-Stop the Zen Timer counting.
-****************************************************************************/
-static void __LZTimerOff(
- LZTimerObject *tm)
-{
- if (havePerformanceCounter)
- QueryPerformanceCounter((LARGE_INTEGER*)&tm->end);
- else
- tm->end.low = timeGetTime();
-}
-
-/****************************************************************************
-REMARKS:
-Compute the elapsed time in microseconds between start and end timings.
-****************************************************************************/
-static ulong __LZTimerCount(
- LZTimerObject *tm)
-{
- CPU_largeInteger tmCount;
-
- if (havePerformanceCounter) {
- _CPU_diffTime64(&tm->start,&tm->end,&tmCount);
- return _CPU_calcMicroSec(&tmCount,countFreq.low);
- }
- else
- return (tm->end.low - tm->start.low) * 1000L;
-}
-
-/****************************************************************************
-REMARKS:
-Define the resolution of the long period timer as microseconds per timer tick.
-****************************************************************************/
-#define ULZTIMER_RESOLUTION 1000
-
-/****************************************************************************
-REMARKS:
-Read the Long Period timer from the OS
-****************************************************************************/
-static ulong __ULZReadTime(void)
-{ return timeGetTime(); }
-
-/****************************************************************************
-REMARKS:
-Compute the elapsed time from the BIOS timer tick. Note that we check to see
-whether a midnight boundary has passed, and if so adjust the finish time to
-account for this. We cannot detect if more that one midnight boundary has
-passed, so if this happens we will be generating erronous results.
-****************************************************************************/
-ulong __ULZElapsedTime(ulong start,ulong finish)
-{ return finish - start; }
diff --git a/board/MAI/bios_emulator/scitech/src/pm/x11/event.c b/board/MAI/bios_emulator/scitech/src/pm/x11/event.c
deleted file mode 100644
index b34bfac22f..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/x11/event.c
+++ /dev/null
@@ -1,307 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Unix / X11
-*
-* Description: X11 event queue implementation for the MGL.
-* This can be used both for windowed and fullscreen (DGA) modes.
-*
-****************************************************************************/
-
-/*---------------------------- Global Variables ---------------------------*/
-
-static ushort keyUpMsg[256] = {0};/* Table of key up messages */
-static int rangeX,rangeY; /* Range of mouse coordinates */
-
-static Display *_EVT_dpy;
-static Window _EVT_win;
-
-typedef struct {
- int keycode;
- int scancode;
-} xkeymap;
-
-xkeymap xkeymaps[] = {
- { 9, KB_esc},
- {24, KB_Q},
- {25, KB_W},
- {26, KB_E},
- {27, KB_R},
- {28, KB_T},
- {29, KB_Y},
- {30, KB_U},
- {31, KB_I},
- {32, KB_O},
- {33, KB_P},
-};
-
-/*---------------------------- Implementation -----------------------------*/
-
-/* These are not used under non-DOS systems */
-#define _EVT_disableInt() 1
-#define _EVT_restoreInt(flags)
-
-/****************************************************************************
-PARAMETERS:
-scanCode - Scan code to test
-
-REMARKS:
-This macro determines if a specified key is currently down at the
-time that the call is made.
-****************************************************************************/
-#define _EVT_isKeyDown(scanCode) (keyUpMsg[scanCode] != 0)
-
-/****************************************************************************
-REMARKS:
-This function is used to return the number of ticks since system
-startup in milliseconds. This should be the same value that is placed into
-the time stamp fields of events, and is used to implement auto mouse down
-events.
-****************************************************************************/
-ulong _EVT_getTicks(void)
-{
- static unsigned starttime = 0;
- struct timeval t;
-
- gettimeofday(&t, NULL);
- if (starttime == 0)
- starttime = t.tv_sec * 1000 + (t.tv_usec/1000);
- return ((t.tv_sec * 1000 + (t.tv_usec/1000)) - starttime);
-}
-
-static int getScancode(int keycode)
-{
- return keycode-8;
-}
-
-/****************************************************************************
-REMARKS:
-Pumps all messages in the application message queue into our event queue.
-****************************************************************************/
-#ifdef X11_CORE
-static void _EVT_pumpX11Messages(void)
-#else
-static void _EVT_pumpMessages(void)
-#endif
-{
- /* TODO: The purpose of this function is to read all keyboard and mouse */
- /* events from the OS specific event queue, translate them and post */
- /* them into the SciTech event queue. */
- event_t evt;
- XEvent ev;
- static int old_mx = 0, old_my = 0, buts = 0, c;
- char buf[2];
-
- while (XPending(_EVT_dpy) && XNextEvent(_EVT_dpy,&ev)) {
- evt.when = _MGL_getTicks();
-
- switch(ev.type){
- case KeyPress:
- c = getScancode(ev.xkey.keycode);
- evt.what = EVT_KEYDOWN;
- evt.message = c << 8;
- XLookupString(&ev.xkey, buf, 2, NULL, NULL);
- evt.message |= buf[0];
- break;
- case KeyRelease:
- c = getScancode(ev.xkey.keycode);
- evt.what = EVT_KEYUP;
- evt.message = keyUpMsg[c];
- if(count < EVENTQSIZE)
- addEvent(&evt);
- keyUpMsg[c] = 0;
- repeatKey[c] = 0;
- break;
- case ButtonPress:
- evt.what = EVT_MOUSEDOWN;
- if(ev.xbutton.button == 1){
- buts |= EVT_LEFTBUT;
- evt.message = EVT_LEFTBMASK;
- }else if(ev.xbutton.button == 2){
- buts |= EVT_MIDDLEBUT;
- evt.message = EVT_MIDDLEBMASK;
- }else if(ev.xbutton.button == 3){
- buts |= EVT_RIGHTBUT;
- evt.message = EVT_RIGHTBMASK;
- }
- evt.modifiers = modifiers | buts;
-
- break;
- case ButtonRelease:
- evt.what = EVT_MOUSEUP;
- if(ev.xbutton.button == 1){
- buts &= ~EVT_LEFTBUT;
- evt.message = EVT_LEFTBMASK;
- }else if(ev.xbutton.button == 2){
- buts &= ~EVT_MIDDLEBUT;
- evt.message = EVT_MIDDLEBMASK;
- }else if(ev.xbutton.button == 3){
- buts &= ~EVT_RIGHTBUT;
- evt.message = EVT_RIGHTBMASK;
- }
- evt.modifiers = modifiers | buts;
-
- break;
- case MotionNotify:
- evt.what = EVT_MOUSEMOVE;
- evt.where_x = ev.xmotion.x;
- evt.where_y = ev.xmotion.y;
- evt.relative_x = evt.where_x - old_mx;
- evt.relative_y = evt.where_y - old_my;
- old_mx = evt.where_x;
- old_my = evt.where_y;
- break;
- }
- if (count < EVENTQSIZE)
- addEvent(&evt);
- }
-
-}
-
-/****************************************************************************
-REMARKS:
-This macro/function is used to converts the scan codes reported by the
-keyboard to our event libraries normalised format. We only have one scan
-code for the 'A' key, and use shift modifiers to determine if it is a
-Ctrl-F1, Alt-F1 etc. The raw scan codes from the keyboard work this way,
-but the OS gives us 'cooked' scan codes, we have to translate them back
-to the raw format.
-****************************************************************************/
-#define _EVT_maskKeyCode(evt)
-
-/****************************************************************************
-REMARKS:
-Safely abort the event module upon catching a fatal error.
-****************************************************************************/
-void _EVT_abort()
-{
- EVT_exit();
- PM_fatalError("Unhandled exception!");
-}
-
-/****************************************************************************
-PARAMETERS:
-mouseMove - Callback function to call wheneve the mouse needs to be moved
-
-REMARKS:
-Initiliase the event handling module. Here we install our mouse handling ISR
-to be called whenever any button's are pressed or released. We also build
-the free list of events in the event queue.
-
-We use handler number 2 of the mouse libraries interrupt handlers for our
-event handling routines.
-****************************************************************************/
-#ifdef X11_CORE
-void EVTAPI EVT_initX11(
-#else
-void EVTAPI EVT_init(
-#endif
- _EVT_mouseMoveHandler mouseMove)
-{
- int result, i,j,k;
- XDeviceInfoPtr list,slist;
-
- /* Initialise the event queue */
- _mouseMove = mouseMove;
- initEventQueue();
- memset(keyUpMsg,0,sizeof(keyUpMsg));
-
-
- /* query server for input extensions */
- result =XQueryExtension(_EVT_dpy,"XInputExtension",&i,&j,&k);
- if(!result) {
- fprintf(stderr,"Your server doesn't support XInput Extensions\n");
- fprintf(stderr,"X11 Joystick disabled\n");
- }
- list = XListInputDevices(_EVT_dpy,&result);
- if (!list) {
- fprintf(stderr,"No extended input devices found !!\n");
- fprintf(stderr,"X11 Joystick disabled\n");
- }
-
-
- /* Catch program termination signals so we can clean up properly */
- signal(SIGABRT, _EVT_abort);
- signal(SIGFPE, _EVT_abort);
- signal(SIGINT, _EVT_abort);
-}
-
-/****************************************************************************
-REMARKS
-Changes the range of coordinates returned by the mouse functions to the
-specified range of values. This is used when changing between graphics
-modes set the range of mouse coordinates for the new display mode.
-****************************************************************************/
-void EVTAPI EVT_setMouseRange(
- int xRes,
- int yRes)
-{
- rangeX = xRes;
- rangeY = yRes;
-}
-
-/****************************************************************************
-REMARKS:
-Initiailises the internal event handling modules. The EVT_suspend function
-can be called to suspend event handling (such as when shelling out to DOS),
-and this function can be used to resume it again later.
-****************************************************************************/
-void EVT_resume(void)
-{
- /* Do nothing for non DOS systems */
-}
-
-/****************************************************************************
-REMARKS
-Suspends all of our event handling operations. This is also used to
-de-install the event handling code.
-****************************************************************************/
-void EVT_suspend(void)
-{
- /* Do nothing for non DOS systems */
-}
-
-/****************************************************************************
-REMARKS
-Exits the event module for program terminatation.
-****************************************************************************/
-void EVT_exit(void)
-{
- /* Restore signal handlers */
- signal(SIGABRT, SIG_DFL);
- signal(SIGFPE, SIG_DFL);
- signal(SIGINT, SIG_DFL);
-
- /* TODO: Do any OS specific cleanup in here */
-}
-
-/****************************************************************************
-REMARKS
-Sets the current X11 display
-****************************************************************************/
-void EVT_setX11Display(Display *dpy, Window win)
-{
- _EVT_dpy = dpy;
- _EVT_win = win;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/x11/oshdr.h b/board/MAI/bios_emulator/scitech/src/pm/x11/oshdr.h
deleted file mode 100644
index 45d7451be5..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/x11/oshdr.h
+++ /dev/null
@@ -1,38 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: BeOS
-*
-* Description: Include file to include all OS specific header files.
-*
-****************************************************************************/
-
-#include <X11/Xlib.h>
-#include <X11/keysym.h>
-#include <time.h>
-#include <signal.h>
-#ifdef USE_OS_JOYSTICK
-#include <X11/extensions/XI.h>
-#include <X11/extensions/XInput.h>
-#endif
diff --git a/board/MAI/bios_emulator/scitech/src/pm/z_samples.vpj b/board/MAI/bios_emulator/scitech/src/pm/z_samples.vpj
deleted file mode 100644
index 0c6c80f054..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/z_samples.vpj
+++ /dev/null
@@ -1,74 +0,0 @@
-[SciTech]
-compiler=wc10-
-targetos=d32
-[COMPILER]
-version=5.0b
-MACRO=enable_current_compiler\n
-activeconfig=,getch.exe
-FILTERNAME=Source Files\n
-FILTERPATTERN=*.c;*.cpp;*.cxx;*.prg;*.pas;*.dpr;*.bas;*.java;*.sc;*.e;*.cob;*.html;*.rc\n
-FILTERASSOCIATEFILETYPES=0
-FILTERAPPCOMMAND=\n
-vcsproject=SCC:Perforce SCM://depot
-vcslocalpath=SCC:Perforce SCM:c:\
-compile=concur|capture|:Compile:&Compile,dmake %n.obj
-make=concur|capture|clear|saveall|:Build:&Build,dmake %b
-rebuild=concur|capture|clear|saveall|:Rebuild:&Rebuild,dmake -u %b
-debug=concur|capture|savenone|nochangedir|:Debug:&Debug,wdn %b
-execute=hide|savenone|nochangedir|:Execute:E&xecute,
-user1=hide|nochangedir|:User 1:User 1,
-user2=hide|nochangedir|:User 2:User 2,
-usertool_build_all=concur|capture|clear|savenone|:Build All:Build All,dmake all
-usertool_rebuild_all=concur|capture|clear|savenone|:Rebuild All:Rebuild All,dmake -u all
-usertool_clean_directory=concur|capture|savenone|:Clean Directory:&Clean Directory,dmake cleanexe
-workingdir=.
-includedirs=%(SCITECH)\include;%(PRIVATE)\include
-reffile=
-[FILES]
-tests\altbrk.c
-tests\altcrit.c
-tests\biosptr.c
-tests\block.c
-tests\brk.c
-tests\callreal.c
-tests\checks.c
-tests\cpu.c
-tests\critical.c
-tests\getch.c
-tests\isvesa.c
-tests\key.c
-tests\key15.c
-tests\memtest.c
-tests\mouse.c
-tests\rtc.c
-tests\showpci.c
-tests\tick.c
-tests\timerc.c
-tests\timercpp.cpp
-tests\uswc.c
-tests\vftest.c
-tests\video.c
-[ASSOCIATION]
-[CONFIGURATIONS]
-config=,altbrk.exe
-config=,altcrit.exe
-config=,biosptr.exe
-config=,block.exe
-config=,brk.exe
-config=,callreal.exe
-config=,cpu.exe
-config=,critical.exe
-config=,getch.exe
-config=,isvesa.exe
-config=,key.exe
-config=,key15.exe
-config=,memtest.exe
-config=,mouse.exe
-config=,rtc.exe
-config=,showpci.exe
-config=,tick.exe
-config=,timerc.exe
-config=,timercpp.exe
-config=,uswc.exe
-config=,vftest.exe
-config=,video.exe
diff --git a/board/MAI/bios_emulator/scitech/src/pm/ztimer.c b/board/MAI/bios_emulator/scitech/src/pm/ztimer.c
deleted file mode 100644
index 5acf7b1f0c..0000000000
--- a/board/MAI/bios_emulator/scitech/src/pm/ztimer.c
+++ /dev/null
@@ -1,516 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-*
-* Description: Module to implement high precision timing on each OS.
-*
-****************************************************************************/
-
-#include "ztimer.h"
-#include "pmapi.h"
-#include "oshdr.h"
-
-/*---------------------------- Global variables ---------------------------*/
-
-static LZTimerObject LZTimer;
-static ulong start,finish;
-#ifdef __INTEL__
-static long cpuSpeed = -1;
-static ibool haveRDTSC = false;
-#endif
-
-/*----------------------------- Implementation ----------------------------*/
-
-/* External Intel assembler functions */
-#ifdef __INTEL__
-/* {secret} */
-void _ASMAPI _CPU_readTimeStamp(CPU_largeInteger *time);
-/* {secret} */
-ulong _ASMAPI _CPU_diffTime64(CPU_largeInteger *t1,CPU_largeInteger *t2,CPU_largeInteger *t);
-/* {secret} */
-ulong _ASMAPI _CPU_calcMicroSec(CPU_largeInteger *count,ulong freq);
-#endif
-
-#if defined(__SMX32__)
-#include "smx/ztimer.c"
-#elif defined(__RTTARGET__)
-#include "rttarget/ztimer.c"
-#elif defined(__REALDOS__)
-#include "dos/ztimer.c"
-#elif defined(__NT_DRIVER__)
-#include "ntdrv/ztimer.c"
-#elif defined(__WIN32_VXD__)
-#include "vxd/ztimer.c"
-#elif defined(__WINDOWS32__)
-#include "win32/ztimer.c"
-#elif defined(__OS2_VDD__)
-#include "vdd/ztimer.c"
-#elif defined(__OS2__)
-#include "os2/ztimer.c"
-#elif defined(__LINUX__)
-#include "linux/ztimer.c"
-#elif defined(__QNX__)
-#include "qnx/ztimer.c"
-#elif defined(__BEOS__)
-#include "beos/ztimer.c"
-#else
-#error Timer library not ported to this platform yet!
-#endif
-
-/*------------------------ Public interface routines ----------------------*/
-
-/****************************************************************************
-DESCRIPTION:
-Initializes the Zen Timer library (extended)
-
-PARAMETERS:
-accurate - True of the speed should be measured accurately
-
-HEADER:
-ztimer.h
-
-REMARKS:
-This function initializes the Zen Timer library, and /must/ be called before
-any of the remaining Zen Timer library functions are called. The accurate
-parameter is used to determine whether highly accurate timing should be
-used or not. If high accuracy is needed, more time is spent profiling the
-actual speed of the CPU so that we can obtain highly accurate timing
-results, but the time spent in the initialisation routine will be
-significantly longer (on the order of 5 seconds).
-****************************************************************************/
-void ZAPI ZTimerInitExt(
- ibool accurate)
-{
- if (cpuSpeed == -1) {
- __ZTimerInit();
-#ifdef __INTEL__
- cpuSpeed = CPU_getProcessorSpeedInHZ(accurate);
- haveRDTSC = CPU_haveRDTSC() && (cpuSpeed > 0);
-#endif
- }
-}
-
-/****************************************************************************
-DESCRIPTION:
-Initializes the Zen Timer library.
-
-HEADER:
-ztimer.h
-
-REMARKS:
-This function initializes the Zen Timer library, and /must/ be called before
-any of the remaining Zen Timer library functions are called.
-****************************************************************************/
-void ZAPI ZTimerInit(void)
-{
- ZTimerInitExt(false);
-}
-
-/****************************************************************************
-DESCRIPTION:
-Starts the Long Period Zen Timer counting.
-
-HEADER:
-ztimer.h
-
-PARAMETERS:
-tm - Timer object to start timing with
-
-REMARKS:
-Starts the Long Period Zen Timer counting. Once you have started the timer,
-you can stop it with LZTimerOff or you can latch the current count with
-LZTimerLap.
-
-The Long Period Zen Timer uses a number of different high precision timing
-mechanisms to obtain microsecond accurate timings results whenever possible.
-The following different techniques are used depending on the operating
-system, runtime environment and CPU on the target machine. If the target
-system has a Pentium CPU installed which supports the Read Time Stamp
-Counter instruction (RDTSC), the Zen Timer library will use this to
-obtain the maximum timing precision available.
-
-Under 32-bit Windows, if the Pentium RDTSC instruction is not available, we
-first try to use the Win32 QueryPerformanceCounter API, and if that is not
-available we fall back on the timeGetTime API which is always supported.
-
-Under 32-bit DOS, if the Pentium RDTSC instruction is not available, we
-then do all timing using the old style 8253 timer chip. The 8253 timer
-routines provide highly accurate timings results in pure DOS mode, however
-in a DOS box under Windows or other Operating Systems the virtualization
-of the timer can produce inaccurate results.
-
-Note: Because the Long Period Zen Timer stores the results in a 32-bit
- unsigned integer, you can only time periods of up to 2^32 microseconds,
- or about 1hr 20mins. For timing longer periods use the Ultra Long
- Period Zen Timer.
-
-SEE ALSO:
-LZTimerOff, LZTimerLap, LZTimerCount
-****************************************************************************/
-void ZAPI LZTimerOnExt(
- LZTimerObject *tm)
-{
-#ifdef __INTEL__
- if (haveRDTSC) {
- _CPU_readTimeStamp(&tm->start);
- }
- else
-#endif
- __LZTimerOn(tm);
-}
-
-/****************************************************************************
-DESCRIPTION:
-Returns the current count for the Long Period Zen Timer and keeps it
-running.
-
-HEADER:
-ztimer.h
-
-PARAMETERS:
-tm - Timer object to do lap timing with
-
-RETURNS:
-Count that has elapsed in microseconds.
-
-REMARKS:
-Returns the current count that has elapsed since the last call to
-LZTimerOn in microseconds. The time continues to run after this function is
-called so you can call this function repeatedly.
-
-SEE ALSO:
-LZTimerOn, LZTimerOff, LZTimerCount
-****************************************************************************/
-ulong ZAPI LZTimerLapExt(
- LZTimerObject *tm)
-{
-#ifdef __INTEL__
- CPU_largeInteger tmLap,tmCount;
-
- if (haveRDTSC) {
- _CPU_readTimeStamp(&tmLap);
- _CPU_diffTime64(&tm->start,&tmLap,&tmCount);
- return _CPU_calcMicroSec(&tmCount,cpuSpeed);
- }
- else
-#endif
- return __LZTimerLap(tm);
-}
-
-/****************************************************************************
-DESCRIPTION:
-Stops the Long Period Zen Timer counting.
-
-HEADER:
-ztimer.h
-
-PARAMETERS:
-tm - Timer object to stop timing with
-
-REMARKS:
-Stops the Long Period Zen Timer counting and latches the count. Once you
-have stopped the timer you can read the count with LZTimerCount. If you need
-highly accurate timing, you should use the on and off functions rather than
-the lap function since the lap function does not subtract the overhead of
-the function calls from the timed count.
-
-SEE ALSO:
-LZTimerOn, LZTimerLap, LZTimerCount
-****************************************************************************/
-void ZAPI LZTimerOffExt(
- LZTimerObject *tm)
-{
-#ifdef __INTEL__
- if (haveRDTSC) {
- _CPU_readTimeStamp(&tm->end);
- }
- else
-#endif
- __LZTimerOff(tm);
-}
-
-/****************************************************************************
-DESCRIPTION:
-Returns the current count for the Long Period Zen Timer.
-
-HEADER:
-ztimer.h
-
-PARAMETERS:
-tm - Timer object to compute the elapsed time with.
-
-RETURNS:
-Count that has elapsed in microseconds.
-
-REMARKS:
-Returns the current count that has elapsed between calls to
-LZTimerOn and LZTimerOff in microseconds.
-
-SEE ALSO:
-LZTimerOn, LZTimerOff, LZTimerLap
-****************************************************************************/
-ulong ZAPI LZTimerCountExt(
- LZTimerObject *tm)
-{
-#ifdef __INTEL__
- CPU_largeInteger tmCount;
-
- if (haveRDTSC) {
- _CPU_diffTime64(&tm->start,&tm->end,&tmCount);
- return _CPU_calcMicroSec(&tmCount,cpuSpeed);
- }
- else
-#endif
- return __LZTimerCount(tm);
-}
-
-/****************************************************************************
-DESCRIPTION:
-Starts the Long Period Zen Timer counting.
-
-HEADER:
-ztimer.h
-
-REMARKS:
-Obsolete function. You should use the LZTimerOnExt function instead
-which allows for multiple timers running at the same time.
-****************************************************************************/
-void ZAPI LZTimerOn(void)
-{ LZTimerOnExt(&LZTimer); }
-
-/****************************************************************************
-DESCRIPTION:
-Returns the current count for the Long Period Zen Timer and keeps it
-running.
-
-HEADER:
-ztimer.h
-
-RETURNS:
-Count that has elapsed in microseconds.
-
-REMARKS:
-Obsolete function. You should use the LZTimerLapExt function instead
-which allows for multiple timers running at the same time.
-****************************************************************************/
-ulong ZAPI LZTimerLap(void)
-{ return LZTimerLapExt(&LZTimer); }
-
-/****************************************************************************
-DESCRIPTION:
-Stops the Long Period Zen Timer counting.
-
-HEADER:
-ztimer.h
-
-REMARKS:
-Obsolete function. You should use the LZTimerOffExt function instead
-which allows for multiple timers running at the same time.
-****************************************************************************/
-void ZAPI LZTimerOff(void)
-{ LZTimerOffExt(&LZTimer); }
-
-/****************************************************************************
-DESCRIPTION:
-Returns the current count for the Long Period Zen Timer.
-
-HEADER:
-ztimer.h
-
-RETURNS:
-Count that has elapsed in microseconds.
-
-REMARKS:
-Obsolete function. You should use the LZTimerCountExt function instead
-which allows for multiple timers running at the same time.
-****************************************************************************/
-ulong ZAPI LZTimerCount(void)
-{ return LZTimerCountExt(&LZTimer); }
-
-/****************************************************************************
-DESCRIPTION:
-Starts the Ultra Long Period Zen Timer counting.
-
-HEADER:
-ztimer.h
-
-REMARKS:
-Starts the Ultra Long Period Zen Timer counting. Once you have started the
-timer, you can stop it with ULZTimerOff or you can latch the current count
-with ULZTimerLap.
-
-The Ultra Long Period Zen Timer uses the available operating system services
-to obtain accurate timings results with as much precision as the operating
-system provides, but with enough granularity to time longer periods of
-time than the Long Period Zen Timer. Note that the resolution of the timer
-ticks is not constant between different platforms, and you should use the
-ULZTimerResolution function to determine the number of seconds in a single
-tick of the timer, and use this to convert the timer counts to seconds.
-
-Under 32-bit Windows, we use the timeGetTime function which provides a
-resolution of 1 millisecond (0.001 of a second). Given that the timer
-count is returned as an unsigned 32-bit integer, this we can time intervals
-that are a maximum of 2^32 milliseconds in length (or about 1,200 hours or
-50 days!).
-
-Under 32-bit DOS, we use the system timer tick which runs at 18.2 times per
-second. Given that the timer count is returned as an unsigned 32-bit integer,
-this we can time intervals that are a maximum of 2^32 * (1/18.2) in length
-(or about 65,550 hours or 2731 days!).
-
-SEE ALSO:
-ULZTimerOff, ULZTimerLap, ULZTimerCount, ULZElapsedTime, ULZReadTime
-****************************************************************************/
-void ZAPI ULZTimerOn(void)
-{ start = __ULZReadTime(); }
-
-/****************************************************************************
-DESCRIPTION:
-Returns the current count for the Ultra Long Period Zen Timer and keeps it
-running.
-
-HEADER:
-ztimer.h
-
-RETURNS:
-Count that has elapsed in resolution counts.
-
-REMARKS:
-Returns the current count that has elapsed since the last call to
-ULZTimerOn in microseconds. The time continues to run after this function is
-called so you can call this function repeatedly.
-
-SEE ALSO:
-ULZTimerOn, ULZTimerOff, ULZTimerCount
-****************************************************************************/
-ulong ZAPI ULZTimerLap(void)
-{ return (__ULZReadTime() - start); }
-
-/****************************************************************************
-DESCRIPTION:
-Stops the Long Period Zen Timer counting.
-
-HEADER:
-ztimer.h
-
-REMARKS:
-Stops the Ultra Long Period Zen Timer counting and latches the count. Once
-you have stopped the timer you can read the count with ULZTimerCount.
-
-SEE ALSO:
-ULZTimerOn, ULZTimerLap, ULZTimerCount
-****************************************************************************/
-void ZAPI ULZTimerOff(void)
-{ finish = __ULZReadTime(); }
-
-/****************************************************************************
-DESCRIPTION:
-Returns the current count for the Ultra Long Period Zen Timer.
-
-HEADER:
-ztimer.h
-
-RETURNS:
-Count that has elapsed in resolution counts.
-
-REMARKS:
-Returns the current count that has elapsed between calls to
-ULZTimerOn and ULZTimerOff in resolution counts.
-
-SEE ALSO:
-ULZTimerOn, ULZTimerOff, ULZTimerLap, ULZTimerResolution
-****************************************************************************/
-ulong ZAPI ULZTimerCount(void)
-{ return (finish - start); }
-
-/****************************************************************************
-DESCRIPTION:
-Reads the current time from the Ultra Long Period Zen Timer.
-
-HEADER:
-ztimer.h
-
-RETURNS:
-Current timer value in resolution counts.
-
-REMARKS:
-Reads the current Ultra Long Period Zen Timer and returns it’s current
-count. You can use the ULZElapsedTime function to find the elapsed time
-between two timer count readings.
-
-SEE ALSO:
-ULZElapsedTime, ULZTimerResolution
-****************************************************************************/
-ulong ZAPI ULZReadTime(void)
-{ return __ULZReadTime(); }
-
-/****************************************************************************
-DESCRIPTION:
-Compute the elapsed time between two timer counts.
-
-HEADER:
-ztimer.h
-
-PARAMETERS:
-start - Starting time for elapsed count
-finish - Ending time for elapsed count
-
-RETURNS:
-Elapsed timer in resolution counts.
-
-REMARKS:
-Returns the elapsed time for the Ultra Long Period Zen Timer in units of the
-timers resolution (1/18th of a second under DOS). This function correctly
-computes the difference even if a midnight boundary has been crossed
-during the timing period.
-
-SEE ALSO:
-ULZReadTime, ULZTimerResolution
-****************************************************************************/
-ulong ZAPI ULZElapsedTime(
- ulong start,
- ulong finish)
-{ return __ULZElapsedTime(start,finish); }
-
-/****************************************************************************
-DESCRIPTION:
-Returns the resolution of the Ultra Long Period Zen Timer.
-
-HEADER:
-ztimer.h
-
-PARAMETERS:
-resolution - Place to store the timer in microseconds per timer count.
-
-REMARKS:
-Returns the resolution of the Ultra Long Period Zen Timer as a 32-bit
-integer value measured in microseconds per timer count.
-
-SEE ALSO:
-ULZReadTime, ULZElapsedTime, ULZTimerCount
-****************************************************************************/
-void ZAPI ULZTimerResolution(
- ulong *resolution)
-{ *resolution = ULZTIMER_RESOLUTION; }
diff --git a/board/MAI/bios_emulator/scitech/src/v86bios/AsmMacros.h b/board/MAI/bios_emulator/scitech/src/v86bios/AsmMacros.h
deleted file mode 100644
index 77c545aef4..0000000000
--- a/board/MAI/bios_emulator/scitech/src/v86bios/AsmMacros.h
+++ /dev/null
@@ -1,450 +0,0 @@
-/* $XConsortium: AsmMacros.h /main/13 1996/10/25 11:33:12 kaleb $ */
-/*
- * (c) Copyright 1993,1994 by David Wexelblat <dwex@xfree86.org>
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * DAVID WEXELBLAT BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
- * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- *
- * Except as contained in this notice, the name of David Wexelblat shall not be
- * used in advertising or otherwise to promote the sale, use or other dealings
- * in this Software without prior written authorization from David Wexelblat.
- *
- */
-/*
- * Copyright 1997
- * Digital Equipment Corporation. All rights reserved.
- * This software is furnished under license and may be used and copied only in
- * accordance with the following terms and conditions. Subject to these
- * conditions, you may download, copy, install, use, modify and distribute
- * this software in source and/or binary form. No title or ownership is
- * transferred hereby.
- *
- * 1) Any source code used, modified or distributed must reproduce and retain
- * this copyright notice and list of conditions as they appear in the source
- * file.
- *
- * 2) No right is granted to use any trade name, trademark, or logo of Digital
- * Equipment Corporation. Neither the "Digital Equipment Corporation" name
- * nor any trademark or logo of Digital Equipment Corporation may be used
- * to endorse or promote products derived from this software without the
- * prior written permission of Digital Equipment Corporation.
- *
- * 3) This software is provided "AS-IS" and any express or implied warranties,
- * including but not limited to, any implied warranties of merchantability,
- * fitness for a particular purpose, or non-infringement are disclaimed. In
- * no event shall DIGITAL be liable for any damages whatsoever, and in
- * particular, DIGITAL shall not be liable for special, indirect,
- * consequential, or incidental damages or damages for
- * lost profits, loss of revenue or loss of use, whether such damages arise
- * in contract,
- * negligence, tort, under statute, in equity, at law or otherwise, even if
- * advised of the possibility of such damage.
- *
- */
-
-/* $XFree86: xc/programs/Xserver/hw/xfree86/SuperProbe/AsmMacros.h,v 3.14 1999/09/25 14:36:58 dawes Exp $ */
-
-#if defined(__GNUC__)
-#if defined(linux) && (defined(__alpha__) || defined(__ia64__))
-#undef inb
-#define inb _inb
-#undef inw
-#define inw _inw
-#undef inl
-#define inl _inl
-#undef outb
-#define outb(p,v) _outb((v),(p))
-#undef outw
-#define outw(p,v) _outw((v),(p))
-#undef outl
-#define outl(p,v) _outl((v),(p))
-#else
-#if defined(__sparc__)
-#ifndef ASI_PL
-#define ASI_PL 0x88
-#endif
-
-static __inline__ void
-outb(port, val)
-unsigned long port;
-char val;
-{
- __asm__ __volatile__("stba %0, [%1] %2" : : "r" (val), "r" (port), "i" (ASI_PL));
-}
-
-static __inline__ void
-outw(port, val)
-unsigned long port;
-char val;
-{
- __asm__ __volatile__("stha %0, [%1] %2" : : "r" (val), "r" (port), "i" (ASI_PL));
-}
-
-static __inline__ void
-outl(port, val)
-unsigned long port;
-char val;
-{
- __asm__ __volatile__("sta %0, [%1] %2" : : "r" (val), "r" (port), "i" (ASI_PL));
-}
-
-static __inline__ unsigned int
-inb(port)
-unsigned long port;
-{
- unsigned char ret;
- __asm__ __volatile__("lduba [%1] %2, %0" : "=r" (ret) : "r" (port), "i" (ASI_PL));
- return ret;
-}
-
-static __inline__ unsigned int
-inw(port)
-unsigned long port;
-{
- unsigned char ret;
- __asm__ __volatile__("lduha [%1] %2, %0" : "=r" (ret) : "r" (port), "i" (ASI_PL));
- return ret;
-}
-
-static __inline__ unsigned int
-inl(port)
-unsigned long port;
-{
- unsigned char ret;
- __asm__ __volatile__("lda [%1] %2, %0" : "=r" (ret) : "r" (port), "i" (ASI_PL));
- return ret;
-}
-#else
-#ifdef __arm32__
-unsigned int IOPortBase; /* Memory mapped I/O port area */
-
-static __inline__ void
-outb(port, val)
- short port;
- char val;
-{
- if ((unsigned short)port >= 0x400) return;
-
- *(volatile unsigned char*)(((unsigned short)(port))+IOPortBase) = val;
-}
-
-static __inline__ void
-outw(port, val)
- short port;
- short val;
-{
- if ((unsigned short)port >= 0x400) return;
-
- *(volatile unsigned short*)(((unsigned short)(port))+IOPortBase) = val;
-}
-
-static __inline__ void
-outl(port, val)
- short port;
- int val;
-{
- if ((unsigned short)port >= 0x400) return;
-
- *(volatile unsigned long*)(((unsigned short)(port))+IOPortBase) = val;
-}
-
-static __inline__ unsigned int
-inb(port)
- short port;
-{
- if ((unsigned short)port >= 0x400) return((unsigned int)-1);
-
- return(*(volatile unsigned char*)(((unsigned short)(port))+IOPortBase));
-}
-
-static __inline__ unsigned int
-inw(port)
- short port;
-{
- if ((unsigned short)port >= 0x400) return((unsigned int)-1);
-
- return(*(volatile unsigned short*)(((unsigned short)(port))+IOPortBase));
-}
-
-static __inline__ unsigned int
-inl(port)
- short port;
-{
- if ((unsigned short)port >= 0x400) return((unsigned int)-1);
-
- return(*(volatile unsigned long*)(((unsigned short)(port))+IOPortBase));
-}
-#else /* __arm32__ */
-#if defined(Lynx) && defined(__powerpc__)
-extern unsigned char *ioBase;
-
-static volatile void
-eieio()
-{
- __asm__ __volatile__ ("eieio");
-}
-
-static void
-outb(port, value)
-short port;
-unsigned char value;
-{
- *(uchar *)(ioBase + port) = value; eieio();
-}
-
-static void
-outw(port, value)
-short port;
-unsigned short value;
-{
- *(unsigned short *)(ioBase + port) = value; eieio();
-}
-
-static void
-outl(port, value)
-short port;
-unsigned long value;
-{
- *(unsigned long *)(ioBase + port) = value; eieio();
-}
-
-static unsigned char
-inb(port)
-short port;
-{
- unsigned char val;
-
- val = *((unsigned char *)(ioBase + port)); eieio();
- return(val);
-}
-
-static unsigned short
-inw(port)
-short port;
-{
- unsigned short val;
-
- val = *((unsigned short *)(ioBase + port)); eieio();
- return(val);
-}
-
-static unsigned long
-inl(port)
-short port;
-{
- unsigned long val;
-
- val = *((unsigned long *)(ioBase + port)); eieio();
- return(val);
-}
-
-#else
-#if defined(__FreeBSD__) && defined(__alpha__)
-
-#include <sys/types.h>
-
-extern void outb(u_int32_t port, u_int8_t val);
-extern void outw(u_int32_t port, u_int16_t val);
-extern void outl(u_int32_t port, u_int32_t val);
-extern u_int8_t inb(u_int32_t port);
-extern u_int16_t inw(u_int32_t port);
-extern u_int32_t inl(u_int32_t port);
-
-#else
-#ifdef GCCUSESGAS
-static __inline__ void
-outb(port, val)
-short port;
-char val;
-{
- __asm__ __volatile__("outb %0,%1" : :"a" (val), "d" (port));
-}
-
-static __inline__ void
-outw(port, val)
-short port;
-short val;
-{
- __asm__ __volatile__("outw %0,%1" : :"a" (val), "d" (port));
-}
-
-static __inline__ void
-outl(port, val)
-short port;
-unsigned int val;
-{
- __asm__ __volatile__("outl %0,%1" : :"a" (val), "d" (port));
-}
-
-static __inline__ unsigned int
-inb(port)
-short port;
-{
- unsigned char ret;
- __asm__ __volatile__("inb %1,%0" :
- "=a" (ret) :
- "d" (port));
- return ret;
-}
-
-static __inline__ unsigned int
-inw(port)
-short port;
-{
- unsigned short ret;
- __asm__ __volatile__("inw %1,%0" :
- "=a" (ret) :
- "d" (port));
- return ret;
-}
-
-static __inline__ unsigned int
-inl(port)
-short port;
-{
- unsigned int ret;
- __asm__ __volatile__("inl %1,%0" :
- "=a" (ret) :
- "d" (port));
- return ret;
-}
-
-#else /* GCCUSESGAS */
-
-static __inline__ void
-outb(port, val)
- short port;
- char val;
-{
- __asm__ __volatile__("out%B0 (%1)" : :"a" (val), "d" (port));
-}
-
-static __inline__ void
-outw(port, val)
- short port;
- short val;
-{
- __asm__ __volatile__("out%W0 (%1)" : :"a" (val), "d" (port));
-}
-
-static __inline__ void
-outl(port, val)
- short port;
- unsigned int val;
-{
- __asm__ __volatile__("out%L0 (%1)" : :"a" (val), "d" (port));
-}
-
-static __inline__ unsigned int
-inb(port)
- short port;
-{
- unsigned int ret;
- __asm__ __volatile__("in%B0 (%1)" :
- "=a" (ret) :
- "d" (port));
- return ret;
-}
-
-static __inline__ unsigned int
-inw(port)
- short port;
-{
- unsigned int ret;
- __asm__ __volatile__("in%W0 (%1)" :
- "=a" (ret) :
- "d" (port));
- return ret;
-}
-
-static __inline__ unsigned int
-inl(port)
- short port;
-{
- unsigned int ret;
- __asm__ __volatile__("in%L0 (%1)" :
- "=a" (ret) :
- "d" (port));
- return ret;
-}
-
-#endif /* GCCUSESGAS */
-#endif /* Lynx && __powerpc__ */
-#endif /* arm32 */
-#endif /* linux && __sparc__ */
-#endif /* linux && __alpha__ */
-#endif /* __FreeBSD__ && __alpha__ */
-
-#if defined(linux) || defined(__arm32__) || (defined(Lynx) && defined(__powerpc__))
-
-#define intr_disable()
-#define intr_enable()
-
-#else
-
-static __inline__ void
-intr_disable()
-{
- __asm__ __volatile__("cli");
-}
-
-static __inline__ void
-intr_enable()
-{
- __asm__ __volatile__("sti");
-}
-
-#endif /* else !linux && !__arm32__ */
-
-#else /* __GNUC__ */
-
-#if defined(_MINIX) && defined(_ACK)
-
-/* inb, outb, inw and outw are defined in the library */
-/* ... but I've no idea if the same is true for inl & outl */
-
-u8_t inb(U16_t);
-void outb(U16_t, U8_t);
-u16_t inw(U16_t);
-void outw(U16_t, U16_t);
-u32_t inl(U16_t);
-void outl(U16_t, U32_t);
-
-#else /* not _MINIX and _ACK */
-
-# if defined(__STDC__) && (__STDC__ == 1)
-# ifndef NCR
-# define asm __asm
-# endif
-# endif
-# ifdef SVR4
-# include <sys/types.h>
-# ifndef __USLC__
-# define __USLC__
-# endif
-# endif
-#ifndef SCO325
-# include <sys/inline.h>
-#else
-# include "../common/scoasm.h"
-#endif
-#define intr_disable() asm("cli")
-#define intr_enable() asm("sti")
-
-#endif /* _MINIX and _ACK */
-#endif /* __GNUC__ */
diff --git a/board/MAI/bios_emulator/scitech/src/v86bios/README b/board/MAI/bios_emulator/scitech/src/v86bios/README
deleted file mode 100644
index cb65674b2d..0000000000
--- a/board/MAI/bios_emulator/scitech/src/v86bios/README
+++ /dev/null
@@ -1,32 +0,0 @@
-
-This is a preliminary version of a VGA softbooter for LINUX.
-
-It makes use of the of the vm86() call and is therefore only
-usable on ix86 systems.
-There are plans to port this program to use a x86 emulator
-like x86emu. Also it may be ported to other operating systems.
-
-So far it has been tested on a small number of cards. It might
-well be that it will fail on your card.
-
-If you need to make modifications to the programs to be able
-to boot your card please let the author know.
-
-So far there is no command line interface. All options need
-to be hardcoded. You can do this by editing debug.h. You can
-turn on a bunch of debug output. Other options allow you to
-boot the primary card (CONFIG_ACTIVE_DEVICE), save the bios
-to a file (SAVE_BIOS), and map the original system bios
-(MAP_SYS_BIOS).
-
-The author wants to thank
- Hans Lermen (dosemu)
- and
- Kendall Bennett (x86emu)
-for their support.
-
-Parts of the code - especially in v86.c and io.c - are based on code
-taken from dosemu. Parts of the code in int.c are based on code taken
-from x86emu
-
-Egbert Eich. <Egbert.Eich@Physik.TU-Darmstadt.DE>
diff --git a/board/MAI/bios_emulator/scitech/src/v86bios/awk.scr b/board/MAI/bios_emulator/scitech/src/v86bios/awk.scr
deleted file mode 100644
index 9d2a80d7d8..0000000000
--- a/board/MAI/bios_emulator/scitech/src/v86bios/awk.scr
+++ /dev/null
@@ -1,15 +0,0 @@
-/.*\(0x3da.*/||/.*\(0x3ba.*/ {
- if (v_3da != 1) print "_v_retrace_";
- v_3da = 1;
- next;
- }
-/.*\(0x42.*/||/.*\(0x43.*/ {
- if (v_4x != 1) print "_timer_";
- v_4x = 1;
- next;
-}
-{
- print;
- v_3da = 0;
- v_4x = 0;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/v86bios/cbios.c b/board/MAI/bios_emulator/scitech/src/v86bios/cbios.c
deleted file mode 100644
index 6b12dff4f9..0000000000
--- a/board/MAI/bios_emulator/scitech/src/v86bios/cbios.c
+++ /dev/null
@@ -1,415 +0,0 @@
-#include <unistd.h>
-#include <fcntl.h>
-#include <stdio.h>
-#include <sys/mman.h>
-#include <sys/types.h>
-#include <string.h>
-#include <stdlib.h>
-#include <signal.h>
-#include <sys/stat.h>
-#include <getopt.h>
-#if defined(__alpha__) || defined (__ia64__)
-#include <sys/io.h>
-#elif defined(HAVE_SYS_PERM)
-#include <sys/perm.h>
-#endif
-#include "debug.h"
-#include "v86bios.h"
-#include "pci.h"
-#include "AsmMacros.h"
-
-#define SIZE 0x100000
-#define VRAM_START 0xA0000
-#define VRAM_SIZE 0x1FFFF
-#define V_BIOS_SIZE 0x1FFFF
-#define BIOS_START 0x7C00 /* default BIOS entry */
-#define BIOS_MEM 0x600
-
-CARD8 code[] = { 0xcd, 0x10, 0xf4 };
-struct config Config;
-
-static int map(void);
-static void unmap(void);
-static void runBIOS(int argc, char **argv);
-static int map_vram(void);
-static void unmap_vram(void);
-static int copy_vbios(memType base);
-static int copy_sys_bios(void);
-static CARD32 setup_int_vect(void);
-static void update_bios_vars(void);
-static int chksum(CARD8 *start);
-static void setup_bios_regs(i86biosRegsPtr regs, int argc, char **argv);
-static void print_regs(i86biosRegsPtr regs);
-void dprint(unsigned long start, unsigned long size);
-
-void loadCodeToMem(unsigned char *ptr, CARD8 *code);
-
-static int vram_mapped = 0;
-static char* bios_var;
-
-
-int
-main(int argc,char **argv)
-{
- CARD32 vbios_base;
-
- Config.PrintPort = PRINT_PORT;
- Config.IoStatistics = IO_STATISTICS;
- Config.PrintIrq = PRINT_IRQ;
- Config.PrintPci = PRINT_PCI;
- Config.ShowAllDev = SHOW_ALL_DEV;
- Config.PrintIp = PRINT_IP;
- Config.SaveBios = SAVE_BIOS;
- Config.Trace = TRACE;
- Config.ConfigActiveOnly = CONFIG_ACTIVE_ONLY;
- Config.ConfigActiveDevice = CONFIG_ACTIVE_DEVICE;
- Config.MapSysBios = MAP_SYS_BIOS;
- Config.Resort = RESORT;
- Config.FixRom = FIX_ROM;
- Config.NoConsole = NO_CONSOLE;
- Config.Verbose = VERBOSE;
-
- if (!map())
- exit(1);
- if (!copy_sys_bios())
- exit(1);
- if (!(vbios_base = setup_int_vect()))
- exit(1);
- if (!map_vram())
- exit(1);
- if (!copy_vbios(vbios_base))
- exit(1);
-
- iopl(3);
- setup_io();
- runBIOS(argc,argv);
- update_bios_vars();
- unmap_vram();
- iopl(0);
- unmap();
- printf("done !\n");
- exit (1);
-}
-
-int
-map(void)
-{
- void* mem;
-
- mem = mmap(0, (size_t)SIZE,
- PROT_EXEC | PROT_READ | PROT_WRITE,
- MAP_FIXED | MAP_PRIVATE | MAP_ANON,
- -1, 0 );
- if (mem != 0) {
- perror("anonymous map");
- return (0);
- }
- memset(mem,0,SIZE);
-
- loadCodeToMem((unsigned char *) BIOS_START, code);
- return (1);
-}
-
-static int
-copy_sys_bios(void)
-{
-#define SYS_BIOS 0xF0000
- int mem_fd;
-
- if ((mem_fd = open(MEM_FILE,O_RDONLY))<0) {
- perror("opening memory");
- return (0);
- }
-
- if (lseek(mem_fd,(off_t) SYS_BIOS,SEEK_SET) != (off_t) SYS_BIOS)
- goto Error;
- if (read(mem_fd, (char *)SYS_BIOS, (size_t) 0xFFFF) != (size_t) 0xFFFF)
- goto Error;
-
- close(mem_fd);
- return (1);
-
-Error:
- perror("sys_bios");
- close(mem_fd);
- return (0);
-}
-
-static int
-map_vram(void)
-{
- int mem_fd;
-
-#ifdef __ia64__
- if ((mem_fd = open(MEM_FILE,O_RDWR | O_SYNC))<0)
-#else
- if ((mem_fd = open(MEM_FILE,O_RDWR))<0)
-#endif
- {
- perror("opening memory");
- return 0;
- }
-
-#ifndef __alpha__
- if (mmap((void *) VRAM_START, (size_t) VRAM_SIZE,
- PROT_EXEC | PROT_READ | PROT_WRITE, MAP_SHARED | MAP_FIXED,
- mem_fd, VRAM_START) == (void *) -1)
-#else
- if (!_bus_base()) sparse_shift = 7; /* Uh, oh, JENSEN... */
- if (!_bus_base_sparse()) sparse_shift = 0;
- if ((vram_map = mmap(0,(size_t) (VRAM_SIZE << sparse_shift),
- PROT_READ | PROT_WRITE,
- MAP_SHARED,
- mem_fd, (VRAM_START << sparse_shift)
- | _bus_base_sparse())) == (void *) -1)
-#endif
- {
- perror("mmap error in map_hardware_ram");
- close(mem_fd);
- return (0);
- }
- vram_mapped = 1;
- close(mem_fd);
- return (1);
-}
-
-static int
-copy_vbios(memType v_base)
-{
- int mem_fd;
- unsigned char *tmp;
- int size;
-
- if ((mem_fd = open(MEM_FILE,O_RDONLY))<0) {
- perror("opening memory");
- return (0);
- }
-
- if (lseek(mem_fd,(off_t) v_base, SEEK_SET) != (off_t) v_base) {
- fprintf(stderr,"Cannot lseek\n");
- goto Error;
- }
- tmp = (unsigned char *)malloc(3);
- if (read(mem_fd, (char *)tmp, (size_t) 3) != (size_t) 3) {
- fprintf(stderr,"Cannot read\n");
- goto Error;
- }
- if (lseek(mem_fd,(off_t) v_base,SEEK_SET) != (off_t) v_base)
- goto Error;
-
- if (*tmp != 0x55 || *(tmp+1) != 0xAA ) {
- fprintf(stderr,"No bios found at: 0x%lx\n",v_base);
- goto Error;
- }
-#ifdef DEBUG
- dprint((unsigned long)tmp,0x100);
-#endif
- size = *(tmp+2) * 512;
-
- if (read(mem_fd, (char *)v_base, (size_t) size) != (size_t) size) {
- fprintf(stderr,"Cannot read\n");
- goto Error;
- }
- free(tmp);
- close(mem_fd);
- if (!chksum((CARD8*)v_base))
- return (0);
-
- return (1);
-
-Error:
- perror("v_bios");
- close(mem_fd);
- return (0);
-}
-
-static void
-unmap(void)
-{
- munmap(0,SIZE);
-}
-
-static void
-unmap_vram(void)
-{
- if (!vram_mapped) return;
-
- munmap((void*)VRAM_START,VRAM_SIZE);
- vram_mapped = 0;
-}
-
-static void
-runBIOS(int argc, char ** argv)
-{
- i86biosRegs bRegs;
-#ifdef V86BIOS_DEBUG
- printf("starting BIOS\n");
-#endif
- setup_bios_regs(&bRegs, argc, argv);
- do_x86(BIOS_START,&bRegs);
- print_regs(&bRegs);
-#ifdef V86BIOS_DEBUG
- printf("done\n");
-#endif
-}
-
-static CARD32
-setup_int_vect(void)
-{
- int mem_fd;
- CARD32 vbase;
- void *map;
-
- if ((mem_fd = open(MEM_FILE,O_RDONLY))<0) {
- perror("opening memory");
- return (0);
- }
-
- if ((map = mmap((void *) 0, (size_t) 0x2000,
- PROT_EXEC | PROT_READ | PROT_WRITE, MAP_SHARED,
- mem_fd, 0)) == (void *)-1) {
- perror("mmap error in map_hardware_ram");
- close(mem_fd);
- return (0);
- }
-
- close(mem_fd);
- memcpy(0,map,BIOS_MEM);
- munmap(map,0x2000);
- /*
- * create a backup copy of the bios variables to write back the
- * modified values
- */
- bios_var = (char *)malloc(BIOS_MEM);
- memcpy(bios_var,0,BIOS_MEM);
-
- vbase = (*((CARD16*)(0x10 << 2) + 1)) << 4;
- fprintf(stderr,"vbase: 0x%x\n",vbase);
- return vbase;
-}
-
-static void
-update_bios_vars(void)
-{
- int mem_fd;
- void *map;
- memType i;
-
-#ifdef __ia64__
- if ((mem_fd = open(MEM_FILE,O_RDWR | O_SYNC))<0)
-#else
- if ((mem_fd = open(MEM_FILE,O_RDWR))<0)
-#endif
- {
- perror("opening memory");
- return;
- }
-
- if ((map = mmap((void *) 0, (size_t) 0x2000,
- PROT_EXEC | PROT_READ | PROT_WRITE, MAP_SHARED,
- mem_fd, 0)) == (void *)-1) {
- perror("mmap error in map_hardware_ram");
- close(mem_fd);
- return;
- }
-
- for (i = 0; i < BIOS_MEM; i++) {
- if (bios_var[i] != *(CARD8*)i)
- *((CARD8*)map + i) = *(CARD8*)i;
- }
-
- munmap(map,0x2000);
- close(mem_fd);
-}
-
-
-static void
-setup_bios_regs(i86biosRegsPtr regs, int argc, char **argv)
-{
- int c;
-
- regs->ax = 0;
- regs->bx = 0;
- regs->cx = 0;
- regs->dx = 0;
- regs->es = 0;
- regs->di = 0;
- opterr = 0;
- while ((c = getopt(argc,argv,"a:b:c:d:e:i:")) != EOF) {
- switch (c) {
- case 'a':
- regs->ax = strtol(optarg,NULL,0);
- break;
- case 'b':
- regs->bx = strtol(optarg,NULL,0);
- break;
- case 'c':
- regs->cx = strtol(optarg,NULL,0);
- break;
- case 'd':
- regs->dx = strtol(optarg,NULL,0);
- break;
- case 'e':
- regs->es = strtol(optarg,NULL,0);
- break;
- case 'i':
- regs->di = strtol(optarg,NULL,0);
- break;
- }
- }
-}
-
-
-static int
-chksum(CARD8 *start)
-{
- CARD16 size;
- CARD8 val = 0;
- int i;
-
- size = *(start+2) * 512;
- for (i = 0; i<size; i++)
- val += *(start + i);
-
- if (!val)
- return 1;
-
- fprintf(stderr,"BIOS cksum wrong!\n");
- return 0;
-}
-
-static void
-print_regs(i86biosRegsPtr regs)
-{
- printf("ax=%x bx=%x cx=%x dx=%x es=%x di=%x\n",(CARD16)regs->ax,
- (CARD16)regs->bx,(CARD16)regs->cx,(CARD16)regs->dx,
- (CARD16)regs->es,(CARD16)regs->di);
-}
-
-void
-loadCodeToMem(unsigned char *ptr, CARD8 code[])
-{
- int i;
- CARD8 val;
-
- for ( i=0;;i++) {
- val = code[i];
- *ptr++ = val;
- if (val == 0xf4) break;
- }
- return;
-}
-
-void
-dprint(unsigned long start, unsigned long size)
-{
- int i,j;
- char *c = (char *)start;
-
- for (j = 0; j < (size >> 4); j++) {
- printf ("\n0x%lx: ",(unsigned long)c);
- for (i = 0; i<16; i++)
- printf("%x ",(unsigned char) (*(c++)));
- }
- printf("\n");
-}
diff --git a/board/MAI/bios_emulator/scitech/src/v86bios/command.c b/board/MAI/bios_emulator/scitech/src/v86bios/command.c
deleted file mode 100644
index e2bce6df1b..0000000000
--- a/board/MAI/bios_emulator/scitech/src/v86bios/command.c
+++ /dev/null
@@ -1,38 +0,0 @@
-#include <stdio.h>
-#include <readline/readline.h>
-#include <readline/history.h>
-#include <malloc.h>
-
-#define PROMPT ">"
-
-
-void
-getline(char *buf,int *num,int max_num)
-{
- static int line_len = 0;
- static char *line = NULL;
- static char *line_pointer = NULL;
- static int len = 0;
- int tmp_len;
- char *buff;
-
- if (len <= 0) {
- buff = readline(PROMPT);
- add_history(buff);
-
- if ((tmp_len = strlen(buff)) > line_len) {
- free(line);
- line = malloc(tmp_len);
- line_len = tmp_len;
- }
- sprintf(line,"%s\n",buff);
- free(buff);
- line_pointer = line;
- len = strlen(line);
- }
-
- *num = max_num > len? len : max_num;
- strncpy(buf,line_pointer,*num);
- line_pointer = line_pointer + *num;
- len = len - *num;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/v86bios/console.c b/board/MAI/bios_emulator/scitech/src/v86bios/console.c
deleted file mode 100644
index 5e9c924b64..0000000000
--- a/board/MAI/bios_emulator/scitech/src/v86bios/console.c
+++ /dev/null
@@ -1,95 +0,0 @@
-/*
- * Copyright 1999 Egbert Eich
- *
- * Permission to use, copy, modify, distribute, and sell this software and its
- * documentation for any purpose is hereby granted without fee, provided that
- * the above copyright notice appear in all copies and that both that
- * copyright notice and this permission notice appear in supporting
- * documentation, and that the name of the authors not be used in
- * advertising or publicity pertaining to distribution of the software without
- * specific, written prior permission. The authors makes no representations
- * about the suitability of this software for any purpose. It is provided
- * "as is" without express or implied warranty.
- *
- * THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
- * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
- * EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
- * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
- * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
- * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
- * PERFORMANCE OF THIS SOFTWARE.
- */
-#include <sys/ioctl.h>
-#include <sys/vt.h>
-#include <sys/kd.h>
-#include <stdio.h>
-#include <fcntl.h>
-#include <unistd.h>
-#include "debug.h"
-#include "v86bios.h"
-
-console
-open_console(void)
-{
- int fd;
- int VTno;
- char VTname[11];
- console Con = {-1,-1};
- struct vt_stat vts;
-
- if (NO_CONSOLE)
- return Con;
-
- if ((fd = open("/dev/tty0",O_WRONLY,0)) < 0)
- return Con;
-
- if ((ioctl(fd, VT_OPENQRY, &VTno) < 0) || (VTno == -1)) {
- fprintf(stderr,"cannot get a vt\n");
- return Con;
- }
-
- close(fd);
- sprintf(VTname,"/dev/tty%i",VTno);
-
- if ((fd = open(VTname, O_RDWR|O_NDELAY, 0)) < 0) {
- fprintf(stderr,"cannot open console\n");
- return Con;
- }
-
- if (ioctl(fd, VT_GETSTATE, &vts) == 0)
- Con.vt = vts.v_active;
-
- if (ioctl(fd, VT_ACTIVATE, VTno) != 0) {
- fprintf(stderr,"cannot activate console\n");
- close(fd);
- return Con;
- }
- if (ioctl(fd, VT_WAITACTIVE, VTno) != 0) {
- fprintf(stderr,"wait for active console failed\n");
- close(fd);
- return Con;
- }
-#if 0
- if (ioctl(fd, KDSETMODE, KD_GRAPHICS) < 0) {
- close(fd);
- return Con;
- }
-#endif
- Con.fd = fd;
- return Con;
-}
-
-void
-close_console(console Con)
-{
- if (Con.fd == -1)
- return;
-
-#if 0
- ioctl(Con.fd, KDSETMODE, KD_TEXT);
-#endif
- if (Con.vt >=0)
- ioctl(Con.fd, VT_ACTIVATE, Con.vt);
-
- close(Con.fd);
-}
diff --git a/board/MAI/bios_emulator/scitech/src/v86bios/debug.h b/board/MAI/bios_emulator/scitech/src/v86bios/debug.h
deleted file mode 100644
index c5c906b622..0000000000
--- a/board/MAI/bios_emulator/scitech/src/v86bios/debug.h
+++ /dev/null
@@ -1,60 +0,0 @@
-/*
- * Copyright 1999 Egbert Eich
- *
- * Permission to use, copy, modify, distribute, and sell this software and its
- * documentation for any purpose is hereby granted without fee, provided that
- * the above copyright notice appear in all copies and that both that
- * copyright notice and this permission notice appear in supporting
- * documentation, and that the name of the authors not be used in
- * advertising or publicity pertaining to distribution of the software without
- * specific, written prior permission. The authors makes no representations
- * about the suitability of this software for any purpose. It is provided
- * "as is" without express or implied warranty.
- *
- * THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
- * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
- * EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
- * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
- * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
- * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
- * PERFORMANCE OF THIS SOFTWARE.
- */
-/*#define V86BIOS_DEBUG */
-
-/*
- * uncomment the following if needed
- * should be command line options
- */
-
-#define PRINT_PORT 0
-#define IO_STATISTICS 0
-#define PRINT_IRQ 0
-#define PRINT_PCI 1
-#define PRINT_IP 0 /* print IP address with PIO information */
-#define TRACE 0 /* turn on debugger in x86emu */
- /* requires x86emu compiled with -DDEBUG */
-
-/*
- * these should not be here.
- * Should be converted to command line options.
- */
-#define CONFIG_ACTIVE_ONLY 0
-#define CONFIG_ACTIVE_DEVICE 1
-#define SAVE_BIOS 0
-#define MAP_SYS_BIOS 1
-#define RESORT 1
-#define FIX_ROM 0
-#define NO_CONSOLE 0
-#define SHOW_ALL_DEV 0
-#define VERBOSE 0
-
-/*#define V_BIOS 0xe0000 */
-/*#define V_BIOS 0xe4000 */
-
-
-#if (PRINT_IO == 1) && (PRINT_PORT == 0)
-# define PRINT_IO 0
-#endif
-#if (IO_STATISTICS == 1) && (PRINT_PORT == 0)
-# define IO_STATISTICS 0
-#endif
diff --git a/board/MAI/bios_emulator/scitech/src/v86bios/happy_cards b/board/MAI/bios_emulator/scitech/src/v86bios/happy_cards
deleted file mode 100644
index 943d44ede4..0000000000
--- a/board/MAI/bios_emulator/scitech/src/v86bios/happy_cards
+++ /dev/null
@@ -1,76 +0,0 @@
-What I had to do to make cards happy:
-
-1. Tseng ET4000 W32P
-This card wants to call the original system BIOS video routines.
-It sets the int 0x42 vector to F000:F065, the entry point to the
-system bios video routines.
-CAVE: don't catch int 0x42 and use the vbios int 0x10 routines.
-At early stage during initialization they call int 0x42. This
-causes an infinite loop.
-
-2. ATi Mach64 Rage IIc AGP
-This card does similar things like the Tseng ET4000 W32P.
-However it doesn't have the problem with the ininite loop.
-
-3. Elsa Victory II-A16 AGP Banshee
-This card is very clever: It knows it is an AGP card. Therefore
-it knows it is behind a PCI-PCI bridge. It also knows that noone
-else is behind this bridge. Therefore it start reprogramming the
-bridge! For this it assumes the AGP bridge is on bus 1.
-
-4. Elsa Gloria Synergy 8 ViVo AGP PM2
-This card likes to see a complete interrupt vector table. If
-we fill this table with 0 the VBIOS detects this and quits
-initialization.
-
-5. Dimond Viper 330 AGP NVIDIA Riva 128.
-This card has a similar problem like the Elsa Gloria. It wants
-to read the system BIOS date at 0xffffd.
-
-6. Matrox Mystique PCI
-This card reads the IO port 0x62. If it doesn't like what it sees
-it loops forever. To keep the card happy put 0xfc into 0xffffe.
-This location holds the system model id. 0xfc means IBM-AT.
- One can make an interesting observation: this card likes to know
-with whom it has to share the system. Therefore it accesses PCI
-config space of all the other cards. It does this bypassing the
-PCI BIOS by reading the PCI access ports directly.
-
-7. Matrox G100 AGP
-This card has the same problem as the Mystique.
-
-Apperantly this works now. However not all combinations of cards are
-checked, yet.
-
-Further notes:
-the IO register 0x42-0x43 as well as 0x61-0x63 are of special interest
-for many graphic cards. They should be emulated.
-The so called "Industry Standard BIOS Entry Points" to int 0x42 (0xFF065)
-and to int 0x1a (0xFFE6E) should be filled with useful code. This code
-needs to return as if it was called as int.
-The subvendor ID PCI registers might cause problems. On some chipsets
-they are programmed in a non-obivous non-PCI conformant way.
-V_Bioses are seen to modify the following int:
-0x10 (default video), 0x1f(font table), 0x42(copy of default video),
-0x43 (??), 0x6d (copy of default video - same as 0x10?)
-
-TODO:
-Int 0x6d needs to be done.
-All interrupts where there is no default industry standard entry point
-should point to an unused location in the 0xF000 segmant (possibly
-0xF0000). This way they could be trapped. A trap handler for
-a. int 0x42 and int 0x1a needs to be implemented.
-The default "industry entry point" for video and PCI (0xFFE6E) should
-also be implemented. (any others?) They should either be routed to
-int 0x42(0x6d?) (video) and 0x1A (PCI) or some other interrupts to
-trap them. Mapping of system bios might not be a good idea. Maybe
-the system bios area should just be filled with "hlt" to trap any
-access there.
-Handling of timer IO registers 0x42, 0x43 and IO registers 0x61, 0x62.
-
-Find documentation:
-- on interrupt vector table
-- on industry standard entry points to the system bios
-- on IO registers 0x61 and 0x62
-
-
diff --git a/board/MAI/bios_emulator/scitech/src/v86bios/hexdump b/board/MAI/bios_emulator/scitech/src/v86bios/hexdump
deleted file mode 100644
index 4f359e5edd..0000000000
--- a/board/MAI/bios_emulator/scitech/src/v86bios/hexdump
+++ /dev/null
@@ -1,3 +0,0 @@
-"%06.6_ax " 16/1 "%02x "
-" " 16/1 "%_p"
-"\n"
diff --git a/board/MAI/bios_emulator/scitech/src/v86bios/int.c b/board/MAI/bios_emulator/scitech/src/v86bios/int.c
deleted file mode 100644
index 3504c6cc3c..0000000000
--- a/board/MAI/bios_emulator/scitech/src/v86bios/int.c
+++ /dev/null
@@ -1,238 +0,0 @@
-/*
- * Copyright 1999 Egbert Eich
- *
- * Permission to use, copy, modify, distribute, and sell this software and its
- * documentation for any purpose is hereby granted without fee, provided that
- * the above copyright notice appear in all copies and that both that
- * copyright notice and this permission notice appear in supporting
- * documentation, and that the name of the authors not be used in
- * advertising or publicity pertaining to distribution of the software without
- * specific, written prior permission. The authors makes no representations
- * about the suitability of this software for any purpose. It is provided
- * "as is" without express or implied warranty.
- *
- * THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
- * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
- * EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
- * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
- * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
- * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
- * PERFORMANCE OF THIS SOFTWARE.
- */
-#include "debug.h"
-#if defined(__alpha__) || defined (__ia64__)
-#include <sys/io.h>
-#endif
-
-#include "v86bios.h"
-#include "AsmMacros.h"
-#include "pci.h"
-
-static int int1A_handler(struct regs86 *regs);
-static int int42_handler(int num, struct regs86 *regs);
-
-int
-int_handler(int num, struct regs86 *regs)
-{
- switch (num) {
- case 0x10:
- case 0x42:
- return (int42_handler(num,regs));
- case 0x1A:
- return (int1A_handler(regs));
- default:
- return 0;
- }
- return 0;
-}
-
-static int
-int42_handler(int num,struct regs86 *regs)
-{
- unsigned char c;
- CARD32 val;
-
- i_printf("int 0x%x: ax:0x%lx bx:0x%lx cx:0x%lx dx:0x%lx\n",num,
- regs->eax,regs->ebx, regs->ecx, regs->edx);
-
- /*
- * video bios has modified these -
- * leave it to the video bios to do this
- */
-
- val = getIntVect(num);
- if (val != 0xF000F065)
- return 0;
-
- if ((regs->ebx & 0xff) == 0x32) {
- switch (regs->eax & 0xFFFF) {
- case 0x1200:
- i_printf("enabling video\n");
- c = inb(0x3cc);
- c |= 0x02;
- outb(0x3c2,c);
- return 1;
- case 0x1201:
- i_printf("disabling video\n");
- c = inb(0x3cc);
- c &= ~0x02;
- outb(0x3c2,c);
- return 1;
- default:
- }
- }
- if (num == 0x42)
- return 1;
- else
- return 0;
-}
-
-#define SUCCESSFUL 0x00
-#define DEVICE_NOT_FOUND 0x86
-#define BAD_REGISTER_NUMBER 0x87
-
-static int
-int1A_handler(struct regs86 *regs)
-{
- CARD32 Slot;
- PciStructPtr pPci;
-
- if (! CurrentPci) return 0; /* oops */
-
- i_printf("int 0x1a: ax=0x%lx bx=0x%lx cx=0x%lx dx=0x%lx di=0x%lx"
- " si=0x%lx\n", regs->eax,regs->ebx,regs->ecx,regs->edx,
- regs->edi,regs->esi);
- switch (regs->eax & 0xFFFF) {
- case 0xb101:
- regs->eax &= 0xFF00; /* no config space/special cycle support */
- regs->edx = 0x20494350; /* " ICP" */
- regs->ebx = 0x0210; /* Version 2.10 */
- regs->ecx &= 0xFF00;
- regs->ecx |= (pciMaxBus & 0xFF); /* Max bus number in system */
- regs->eflags &= ~((unsigned long)0x01); /* clear carry flag */
- i_printf("ax=0x%lx dx=0x%lx bx=0x%lx cx=0x%lx flags=0x%lx\n",
- regs->eax,regs->edx,regs->ebx,regs->ecx,regs->eflags);
- return 1;
- case 0xb102:
- if (((regs->edx & 0xFFFF) == CurrentPci->VendorID) &&
- ((regs->ecx & 0xFFFF) == CurrentPci->DeviceID) &&
- (regs->esi == 0)) {
- regs->eax = (regs->eax & 0x00FF) | (SUCCESSFUL << 8);
- regs->eflags &= ~((unsigned long)0x01); /* clear carry flag */
- regs->ebx = pciSlotBX(CurrentPci);
- }
- else if (Config.ShowAllDev &&
- (pPci = findPciDevice(regs->edx,regs->ecx,regs->esi)) != NULL) {
- regs->eax = (regs->eax & 0x00FF) | (SUCCESSFUL << 8);
- regs->eflags &= ~((unsigned long)0x01); /* clear carry flag */
- regs->ebx = pciSlotBX(pPci);
- } else {
- regs->eax = (regs->eax & 0x00FF) | (DEVICE_NOT_FOUND << 8);
- regs->eflags |= ((unsigned long)0x01); /* set carry flag */
- }
- i_printf("ax=0x%lx bx=0x%lx flags=0x%lx\n",
- regs->eax,regs->ebx,regs->eflags);
- return 1;
- case 0xb103:
- if (((regs->ecx & 0xFF) == CurrentPci->Interface) &&
- (((regs->ecx & 0xFF00) >> 8) == CurrentPci->SubClass) &&
- (((regs->ecx & 0xFFFF0000) >> 16) == CurrentPci->BaseClass) &&
- ((regs->esi & 0xff) == 0)) {
- regs->eax = (regs->eax & 0x00FF) | (SUCCESSFUL << 8);
- regs->ebx = pciSlotBX(CurrentPci);
- regs->eflags &= ~((unsigned long)0x01); /* clear carry flag */
- }
- else if (Config.ShowAllDev
- && (pPci = findPciClass(regs->ecx & 0xFF, (regs->ecx & 0xff00) >> 8,
- (regs->ecx & 0xffff0000) >> 16, regs->esi)) != NULL) {
- regs->eax = (regs->eax & 0x00FF) | (SUCCESSFUL << 8);
- regs->ebx = pciSlotBX(pPci);
- regs->eflags &= ~((unsigned long)0x01); /* clear carry flag */
- } else {
- regs->eax = (regs->eax & 0x00FF) | (DEVICE_NOT_FOUND << 8);
- regs->eflags |= ((unsigned long)0x01); /* set carry flag */
- }
- i_printf("ax=0x%lx flags=0x%lx\n",regs->eax,regs->eflags);
- return 1;
- case 0xb108:
- i_printf("Slot=0x%x\n",CurrentPci->Slot.l);
- if ((Slot = findPci(regs->ebx))) {
- regs->ecx &= 0xFFFFFF00;
- regs->ecx |= PciRead8(regs->edi,Slot);
- regs->eax = (regs->eax & 0x00FF) | (SUCCESSFUL << 8);
- regs->eflags &= ~((unsigned long)0x01); /* clear carry flag */
- } else {
- regs->eax = (regs->eax & 0x00FF) | (BAD_REGISTER_NUMBER << 8);
- regs->eflags |= ((unsigned long)0x01); /* set carry flag */
- }
- i_printf("ax=0x%lx cx=0x%lx flags=0x%lx\n",
- regs->eax,regs->ecx,regs->eflags);
- return 1;
- case 0xb109:
- i_printf("Slot=0x%x\n",CurrentPci->Slot.l);
- if ((Slot = findPci(regs->ebx))) {
- regs->ecx &= 0xFFFF0000;
- regs->ecx |= PciRead16(regs->edi,Slot);
- regs->eax = (regs->eax & 0x00FF) | (SUCCESSFUL << 8);
- regs->eflags &= ~((unsigned long)0x01); /* clear carry flag */
- } else {
- regs->eax = (regs->eax & 0x00FF) | (BAD_REGISTER_NUMBER << 8);
- regs->eflags |= ((unsigned long)0x01); /* set carry flag */
- }
- i_printf("ax=0x%lx cx=0x%lx flags=0x%lx\n",
- regs->eax,regs->ecx,regs->eflags);
- return 1;
- case 0xb10a:
- i_printf("Slot=0x%x\n",CurrentPci->Slot.l);
- if ((Slot = findPci(regs->ebx))) {
- regs->ecx &= 0;
- regs->ecx |= PciRead32(regs->edi,Slot);
- regs->eax = (regs->eax & 0x00FF) | (SUCCESSFUL << 8);
- regs->eflags &= ~((unsigned long)0x01); /* clear carry flag */
- } else {
- regs->eax = (regs->eax & 0x00FF) | (BAD_REGISTER_NUMBER << 8);
- regs->eflags |= ((unsigned long)0x01); /* set carry flag */
- }
- i_printf("ax=0x%lx cx=0x%lx flags=0x%lx\n",
- regs->eax,regs->ecx,regs->eflags);
- return 1;
- case 0xb10b:
- i_printf("Slot=0x%x\n",CurrentPci->Slot.l);
- if ((Slot = findPci(regs->ebx))) {
- PciWrite8(regs->edi,(CARD8)regs->ecx,Slot);
- regs->eax = (regs->eax & 0x00FF) | (SUCCESSFUL << 8);
- regs->eflags &= ~((unsigned long)0x01); /* clear carry flag */
- } else {
- regs->eax = (regs->eax & 0x00FF) | (BAD_REGISTER_NUMBER << 8);
- regs->eflags |= ((unsigned long)0x01); /* set carry flag */
- }
- i_printf("ax=0x%lx flags=0x%lx\n", regs->eax,regs->eflags);
- return 1;
- case 0xb10c:
- i_printf("Slot=0x%x\n",CurrentPci->Slot.l);
- if ((Slot = findPci(regs->ebx))) {
- PciWrite16(regs->edi,(CARD16)regs->ecx,Slot);
- regs->eax = (regs->eax & 0x00FF) | (SUCCESSFUL << 8);
- regs->eflags &= ~((unsigned long)0x01); /* clear carry flag */
- } else {
- regs->eax = (regs->eax & 0x00FF) | (BAD_REGISTER_NUMBER << 8);
- regs->eflags |= ((unsigned long)0x01); /* set carry flag */
- }
- i_printf("ax=0x%lx flags=0x%lx\n", regs->eax,regs->eflags);
- return 1;
- case 0xb10d:
- i_printf("Slot=0x%x\n",CurrentPci->Slot.l);
- if ((Slot = findPci(regs->ebx))) {
- PciWrite32(regs->edi,(CARD32)regs->ecx,Slot);
- regs->eax = (regs->eax & 0x00FF) | (SUCCESSFUL << 8);
- regs->eflags &= ~((unsigned long)0x01); /* clear carry flag */
- } else {
- regs->eax = (regs->eax & 0x00FF) | (BAD_REGISTER_NUMBER << 8);
- regs->eflags |= ((unsigned long)0x01); /* set carry flag */
- }
- i_printf("ax=0x%lx flags=0x%lx\n", regs->eax,regs->eflags);
- return 1;
- default:
- return 0;
- }
-}
diff --git a/board/MAI/bios_emulator/scitech/src/v86bios/io.c b/board/MAI/bios_emulator/scitech/src/v86bios/io.c
deleted file mode 100644
index f35b43e9b9..0000000000
--- a/board/MAI/bios_emulator/scitech/src/v86bios/io.c
+++ /dev/null
@@ -1,257 +0,0 @@
-/*
- * Copyright 1999 Egbert Eich
- *
- * Permission to use, copy, modify, distribute, and sell this software and its
- * documentation for any purpose is hereby granted without fee, provided that
- * the above copyright notice appear in all copies and that both that
- * copyright notice and this permission notice appear in supporting
- * documentation, and that the name of the authors not be used in
- * advertising or publicity pertaining to distribution of the software without
- * specific, written prior permission. The authors makes no representations
- * about the suitability of this software for any purpose. It is provided
- * "as is" without express or implied warranty.
- *
- * THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
- * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
- * EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
- * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
- * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
- * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
- * PERFORMANCE OF THIS SOFTWARE.
- */
-#include "debug.h"
-
-#include <stdio.h>
-#if defined(__alpha__) || defined (__ia64__)
-#include <sys/io.h>
-#endif
-#include "AsmMacros.h"
-#include "v86bios.h"
-#include "pci.h"
-
-int r_inb = 0, r_inw = 0, r_inl = 0, r_outb = 0, r_outw = 0, r_outl = 0;
-int in_b = 0, in_w = 0, in_l = 0, out_b = 0, out_w = 0, out_l = 0;
-
-
-int
-port_rep_inb(CARD16 port, CARD8 *base, int d_f, CARD32 count)
-{
- register int inc = d_f ? -1 : 1;
- CARD8 *dst = base;
-
- p_printf(" rep_insb(%#x) %d bytes at %p %s",
- port, count, base, d_f?"up":"down");
- if (Config.PrintIp)
- p_printf(" %x\n",getIP());
- else p_printf("\n");
-
- r_inb++;
- while (count--) {
- *dst = inb(port);
- dst += inc;
- }
- return (dst-base);
-}
-
-int
-port_rep_inw(CARD16 port, CARD16 *base, int d_f, CARD32 count)
-{
- register int inc = d_f ? -1 : 1;
- CARD16 *dst = base;
-
- p_printf(" rep_insw(%#x) %d bytes at %p %s",
- port, count, base, d_f?"up":"down");
- if (Config.PrintIp)
- p_printf(" %x\n",getIP());
- else p_printf("\n");
-
- r_inw++;
- while (count--) {
- *dst = inw(port);
- dst += inc;
- }
- return (dst-base);
-}
-
-int
-port_rep_inl(CARD16 port, CARD32 *base, int d_f, CARD32 count)
-{
- register int inc = d_f ? -1 : 1;
- CARD32 *dst = base;
-
- p_printf(" rep_insl(%#x) %d bytes at %p %s",
- port, count, base, d_f?"up":"down");
- if (Config.PrintIp)
- p_printf(" %x\n",getIP());
- else p_printf("\n");
-
- r_inl++;
- while (count--) {
- *dst = inl(port);
- dst += inc;
- }
- return (dst-base);
-}
-
-int
-port_rep_outb(CARD16 port, CARD8 *base, int d_f, CARD32 count)
-{
- register int inc = d_f ? -1 : 1;
- CARD8 *dst = base;
-
- p_printf(" rep_outb(%#x) %d bytes at %p %s",
- port, count, base, d_f?"up":"down");
- if (Config.PrintIp)
- p_printf(" %x\n",getIP());
- else p_printf("\n");
-
- r_outb++;
- while (count--) {
- outb(port,*dst);
- dst += inc;
- }
- return (dst-base);
-}
-
-int
-port_rep_outw(CARD16 port, CARD16 *base, int d_f, CARD32 count)
-{
- register int inc = d_f ? -1 : 1;
- CARD16 *dst = base;
-
- p_printf(" rep_outw(%#x) %d bytes at %p %s",
- port, count, base, d_f?"up":"down");
- if (Config.PrintIp)
- p_printf(" %x\n",getIP());
- else p_printf("\n");
-
- r_outw++;
- while (count--) {
- outw(port,*dst);
- dst += inc;
- }
- return (dst-base);
-}
-
-int
-port_rep_outl(CARD16 port, CARD32 *base, int d_f, CARD32 count)
-{
- register int inc = d_f ? -1 : 1;
- CARD32 *dst = base;
-
- p_printf(" rep_outl(%#x) %d bytes at %p %s",
- port, count, base, d_f?"up":"down");
- if (Config.PrintIp)
- p_printf(" %x\n",getIP());
- else p_printf("\n");
-
- r_outl++;
- while (count--) {
- outl(port,*dst);
- dst += inc;
- }
- return (dst-base);
-}
-
-CARD8
-p_inb(CARD16 port)
-{
- CARD8 val = 0;
- in_b++;
- val = inb(port);
- p_printf(" inb(%#x) = %2.2x",port,val);
- if (Config.PrintIp)
- p_printf(" %x\n",getIP());
- else p_printf("\n");
-
- return val;
-}
-
-CARD16
-p_inw(CARD16 port)
-{
- CARD16 val = 0;
- in_w++;
- val = inw(port);
- p_printf(" inw(%#x) = %4.4x",port,val);
- if (Config.PrintIp)
- p_printf(" %x\n",getIP());
- else p_printf("\n");
-
- return val;
-}
-
-CARD32
-p_inl(CARD16 port)
-{
- CARD32 val = 0;
- in_l++;
-#ifdef NEED_PCI_IO
- if (cfg1in(port,&val))
- return val;
- else
-#endif
- val = inl(port);
- p_printf(" inl(%#x) = %8.8x",port,val);
- if (Config.PrintIp)
- p_printf(" %x\n",getIP());
- else p_printf("\n");
-
- return val;
-}
-
-void
-p_outb(CARD16 port, CARD8 val)
-{
- out_b++;
- p_printf(" outb(%#x, %2.2x)",port,val);
- if (Config.PrintIp)
- p_printf(" %x\n",getIP());
- else p_printf("\n");
-
- outb(port,val);
-}
-
-void
-p_outw(CARD16 port, CARD16 val)
-{
- out_w++;
- p_printf(" outw(%#x, %4.4x)",port,val);
- if (Config.PrintIp)
- p_printf(" %x\n",getIP());
- else p_printf("\n");
-
- outw(port,val);
-}
-
-void
-p_outl(CARD16 port, CARD32 val)
-{
- out_l++;
- p_printf(" outl(%#x, %8.8x)",port,val);
- if (Config.PrintIp)
- p_printf(" %x\n",getIP());
- else p_printf("\n");
-
-#ifdef NEED_PCI_IO
- if (cfg1out(port,val))
- return;
-#endif
- outl(port,val);
-}
-
-void
-io_statistics(void)
-{
- p_printf("rep: inb: %i, inw: %i, inl: %i, outb: %i, outw: %i, outl: %i\n",
- r_inb,r_inw,r_inl,r_outb,r_outw,r_outl);
- p_printf("inb: %i, inw: %i, inl: %i, outb: %i, outw: %i, outl: %i\n",
- in_b,in_w,in_l,out_b,out_w,out_l);
-}
-
-void
-clear_stat(void)
-{
- r_inb = r_inw = r_inl = r_outb = r_outw = r_outl = 0;
- in_b = in_w = in_l = out_b = out_w = out_l = 0;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/v86bios/lex.l b/board/MAI/bios_emulator/scitech/src/v86bios/lex.l
deleted file mode 100644
index 3a3391c7b4..0000000000
--- a/board/MAI/bios_emulator/scitech/src/v86bios/lex.l
+++ /dev/null
@@ -1,79 +0,0 @@
-%{
-#include "parser.h"
-
-#include <string.h>
-#include <stdio.h>
-
- void getline(char *buf,int *num,int max_num);
-
-#define YY_INPUT(buf,result,max_size) {\
- getline(buf,&result,max_size);\
- }
-
- void
- yyerror (char *s)
- {
- printf ("%s\n", s);
- }
-
-%}
-
-DIGIT [0-9a-fA-F]
-
-%%
-
-"0x"?{DIGIT}+ { yylval = strtol(yytext,NULL,0); return TOK_NUM; }
-"ax" { return TOK_REG_AX; }
-"bx" { return TOK_REG_BX; }
-"cx" { return TOK_REG_CX; }
-"dx" { return TOK_REG_DX; }
-"di" { return TOK_REG_SI; }
-"si" { return TOK_REG_DI; }
-"ds" { return TOK_SEG_DS; }
-"es" { return TOK_SEG_ES; }
-":" { return TOK_SEP;}
-"$"{DIGIT}{1,2} { yylval = strtol(yytext+1,NULL,0); return TOK_VAR; }
-"$mem" { return TOK_VAR_MEM; }
-[ \t]+
-"#".*[\n] { return TOK_END; }
-"boot" { return TOK_COMMAND_BOOT; }
-"do" { return TOK_COMMAND_EXEC; }
-"\"".*"\"" { yylval = (unsigned long) yytext; return TOK_STRING; }
-"byte" { return TOK_BYTE; }
-"word" { return TOK_WORD; }
-"long" { return TOK_LONG; }
-"setmem" { return TOK_COMMAND_MEMSET; }
-"dumpmem" { return TOK_COMMAND_MEMDUMP; }
-"quit" { return TOK_COMMAND_QUIT; }
-"\n" { return TOK_END; }
-"select" { return TOK_SELECT; }
-"isa" { return TOK_ISA; }
-"pci" { return TOK_PCI; }
-"pport" { return TOK_PRINT_PORT; }
-"iostat" { return TOK_IOSTAT; }
-"pirq" { return TOK_PRINT_IRQ; }
-"ppci" { return TOK_PPCI; }
-"pip" { return TOK_PIP; }
-"trace" { return TOK_TRACE; }
-"on" { return TOK_ON; }
-"off" { return TOK_OFF; }
-"verbose" { return TOK_VERBOSE; }
-"log" { return TOK_LOG; }
-"print" { return TOK_STDOUT; }
-"clstat" { return TOK_CLSTAT; }
-"hlt" { return TOK_HLT; }
-"del" { return TOK_DEL; }
-"ioperm" { return TOK_IOPERM; }
-"lpci" { return TOK_DUMP_PCI; }
-"bootbios" { return TOK_BOOT_BIOS; }
-"?" { return '?'; }
-. { return TOK_ERROR; }
-
-%%
-
-
-
-
-
-
-
diff --git a/board/MAI/bios_emulator/scitech/src/v86bios/main.c b/board/MAI/bios_emulator/scitech/src/v86bios/main.c
deleted file mode 100644
index 15f91150f8..0000000000
--- a/board/MAI/bios_emulator/scitech/src/v86bios/main.c
+++ /dev/null
@@ -1,616 +0,0 @@
-/*
- * Copyright 1999 Egbert Eich
- *
- * Permission to use, copy, modify, distribute, and sell this software and its
- * documentation for any purpose is hereby granted without fee, provided that
- * the above copyright notice appear in all copies and that both that
- * copyright notice and this permission notice appear in supporting
- * documentation, and that the name of the authors not be used in
- * advertising or publicity pertaining to distribution of the software without
- * specific, written prior permission. The authors makes no representations
- * about the suitability of this software for any purpose. It is provided
- * "as is" without express or implied warranty.
- *
- * THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
- * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
- * EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
- * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
- * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
- * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
- * PERFORMANCE OF THIS SOFTWARE.
- */
-#define DELETE
-#include <unistd.h>
-#include <fcntl.h>
-#include <stdio.h>
-#include <sys/mman.h>
-#include <sys/types.h>
-#include <string.h>
-#include <stdlib.h>
-#include <signal.h>
-#include <sys/stat.h>
-#if defined(__alpha__) || defined (__ia64__)
-#include <sys/io.h>
-#elif defined(HAVE_SYS_PERM)
-#include <sys/perm.h>
-#endif
-#include "debug.h"
-#include "v86bios.h"
-#include "pci.h"
-#include "AsmMacros.h"
-
-#define SIZE 0x100000
-#define VRAM_START 0xA0000
-#define VRAM_SIZE 0x1FFFF
-#define V_BIOS_SIZE 0x1FFFF
-#define BIOS_START 0x7C00 /* default BIOS entry */
-
-/*CARD8 code[] = { 0xb8 , 0xf0 , 0xf0, 0xf4 }; */
-#define VB_X(x) (V_BIOS >> x) & 0xFF
-CARD8 code[] = { 0x9a, 0x03, 0x00, 0x00, VB_X(12), 0xf4 };
-/*CARD8 code[] = { 0x9a, 0x03, 0x00, 0x00, VB_X(12), 0xb8, 0x03, 0x00, */
-/*0xcd, 0x10, 0xf4 }; */
-/*CARD8 code[] = { 0xb8 , 0xf0 , 0xf0 ,0xf4 }; */
-
-static void sig_handler(int);
-static int map(void);
-static void unmap(void);
-static void bootBIOS(CARD16 ax);
-static int map_vram(void);
-static void unmap_vram(void);
-static int copy_vbios(void);
-static int copy_sys_bios(void);
-static void save_bios_to_file(void);
-static int setup_system_bios(void);
-static void setup_int_vect(void);
-static int chksum(CARD8 *start);
-static void setup_bios_regs(i86biosRegsPtr regs, CARD32 ax);
-
-void loadCodeToMem(unsigned char *ptr, CARD8 *code);
-void dprint(unsigned long start, unsigned long size);
-
-static int vram_mapped = 0;
-static CARD8 save_msr;
-static CARD8 save_pos102;
-static CARD8 save_vse;
-static CARD8 save_46e8;
-console Console;
-struct config Config;
-
-
-int
-main(void)
-{
- int Active_is_Pci = 0;
-#ifdef DELETE
- Config.PrintPort = PRINT_PORT;
- Config.IoStatistics = IO_STATISTICS;
- Config.PrintIrq = PRINT_IRQ;
- Config.PrintPci = PRINT_PCI;
- Config.ShowAllDev = SHOW_ALL_DEV;
- Config.PrintIp = PRINT_IP;
- Config.SaveBios = SAVE_BIOS;
- Config.Trace = TRACE;
- Config.ConfigActiveOnly = CONFIG_ACTIVE_ONLY;
- Config.ConfigActiveDevice = CONFIG_ACTIVE_DEVICE;
- Config.MapSysBios = MAP_SYS_BIOS;
- Config.Resort = RESORT;
- Config.FixRom = FIX_ROM;
- Config.NoConsole = NO_CONSOLE;
- Config.Verbose = VERBOSE;
-
- if (!map())
- exit(1);
-
- if (!setup_system_bios())
- exit(1);
-
- iopl(3);
- setup_io();
-
- scan_pci();
- if (!CurrentPci && !Config.ConfigActiveDevice && !Config.ConfigActiveOnly)
- exit (1);
-#endif
- Console = open_console();
-
- if (Config.ConfigActiveOnly) {
- CARD16 ax;
- int activePci = 0;
- int error = 0;
-
- while (CurrentPci) {
- if (CurrentPci->active) {
- activePci = 1;
- if (!(mapPciRom(NULL) && chksum((CARD8*)V_BIOS)))
- error = 1;
- break;
- }
- CurrentPci = CurrentPci->next;
- }
- ax = ((CARD16)(CurrentPci->bus) << 8)
- | (CurrentPci->dev << 3) | (CurrentPci->func & 0x7);
- P_printf("ax: 0x%x\n",ax);
- setup_int_vect();
- if (!error && (activePci || copy_vbios())) {
-
- if (Config.SaveBios) save_bios_to_file();
- if (map_vram()) {
- printf("initializing ISA\n");
- bootBIOS(0);
- }
- }
- unmap_vram();
- sleep(1);
- } else {
- /* disable primary card */
- save_msr = inb(0x3CC);
- save_vse = inb(0x3C3);
- save_46e8 = inb(0x46e8);
- save_pos102 = inb(0x102);
-
- signal(2,sig_handler);
- signal(11,sig_handler);
-
- outb(0x3C2,~(CARD8)0x03 & save_msr);
- outb(0x3C3,~(CARD8)0x01 & save_vse);
- outb(0x46e8, ~(CARD8)0x08 & save_46e8);
- outb(0x102, ~(CARD8)0x01 & save_pos102);
-
- pciVideoDisable();
-
- while (CurrentPci) {
- CARD16 ax;
-
- if (CurrentPci->active) {
- Active_is_Pci = 1;
- if (!Config.ConfigActiveDevice) {
- CurrentPci = CurrentPci->next;
- continue;
- }
- }
-
- EnableCurrent();
-
- if (CurrentPci->active) {
- outb(0x102, save_pos102);
- outb(0x46e8, save_46e8);
- outb(0x3C3, save_vse);
- outb(0x3C2, save_msr);
- }
-
- /* clear interrupt vectors */
- setup_int_vect();
-
- ax = ((CARD16)(CurrentPci->bus) << 8)
- | (CurrentPci->dev << 3) | (CurrentPci->func & 0x7);
- P_printf("ax: 0x%x\n",ax);
-
- if (!((mapPciRom(NULL) && chksum((CARD8*)V_BIOS))
- || (CurrentPci->active && copy_vbios()))) {
- CurrentPci = CurrentPci->next;
- continue;
- }
- if (!map_vram()) {
- CurrentPci = CurrentPci->next;
- continue;
- }
- if (Config.SaveBios) save_bios_to_file();
- printf("initializing PCI bus: %i dev: %i func: %i\n",CurrentPci->bus,
- CurrentPci->dev,CurrentPci->func);
- bootBIOS(ax);
- unmap_vram();
-
- CurrentPci = CurrentPci->next;
- }
-
- /* We have an ISA device - configure if requested */
- if (!Active_is_Pci && Config.ConfigActiveDevice) {
- pciVideoDisable();
-
- outb(0x102, save_pos102);
- outb(0x46e8, save_46e8);
- outb(0x3C3, save_vse);
- outb(0x3C2, save_msr);
-
- setup_int_vect();
- if (copy_vbios()) {
-
- if (Config.SaveBios) save_bios_to_file();
- if (map_vram()) {
- printf("initializing ISA\n");
- bootBIOS(0);
- }
- }
-
- unmap_vram();
- sleep(1);
- }
-
- pciVideoRestore();
-
- outb(0x102, save_pos102);
- outb(0x46e8, save_46e8);
- outb(0x3C3, save_vse);
- outb(0x3C2, save_msr);
- }
-
- close_console(Console);
-#ifdef DELETE
- iopl(0);
- unmap();
-
- printf("done !\n");
-#endif
- if (Config.IoStatistics)
- io_statistics();
-#ifdef DELETE
- exit(0);
-#endif
-}
-
-int
-map(void)
-{
- void* mem;
-
- mem = mmap(0, (size_t)SIZE,
- PROT_EXEC | PROT_READ | PROT_WRITE,
- MAP_FIXED | MAP_PRIVATE | MAP_ANON,
- -1, 0 );
- if (mem != 0) {
- perror("anonymous map");
- return (0);
- }
- memset(mem,0,SIZE);
-
- loadCodeToMem((unsigned char *) BIOS_START, code);
- return (1);
-}
-
-static void
-unmap(void)
-{
- munmap(0,SIZE);
-}
-
-static void
-bootBIOS(CARD16 ax)
-{
- i86biosRegs bRegs;
-#ifdef V86BIOS_DEBUG
- printf("starting BIOS\n");
-#endif
- setup_bios_regs(&bRegs, ax);
- do_x86(BIOS_START,&bRegs);
-#ifdef V86BIOS_DEBUG
- printf("done\n");
-#endif
-}
-
-static int
-map_vram(void)
-{
- int mem_fd;
-
-#ifdef __ia64__
- if ((mem_fd = open(MEM_FILE,O_RDWR | O_SYNC))<0)
-#else
- if ((mem_fd = open(MEM_FILE,O_RDWR))<0)
-#endif
- {
- perror("opening memory");
- return 0;
- }
-
-#ifndef __alpha__
- if (mmap((void *) VRAM_START, (size_t) VRAM_SIZE,
- PROT_EXEC | PROT_READ | PROT_WRITE, MAP_SHARED | MAP_FIXED,
- mem_fd, VRAM_START) == (void *) -1)
-#else
- if (!_bus_base()) sparse_shift = 7; /* Uh, oh, JENSEN... */
- if (!_bus_base_sparse()) sparse_shift = 0;
- if ((vram_map = mmap(0,(size_t) (VRAM_SIZE << sparse_shift),
- PROT_READ | PROT_WRITE,
- MAP_SHARED,
- mem_fd, (VRAM_START << sparse_shift)
- | _bus_base_sparse())) == (void *) -1)
-#endif
- {
- perror("mmap error in map_hardware_ram");
- close(mem_fd);
- return (0);
- }
- vram_mapped = 1;
- close(mem_fd);
- return (1);
-}
-
-static void
-unmap_vram(void)
-{
- if (!vram_mapped) return;
-
- munmap((void*)VRAM_START,VRAM_SIZE);
- vram_mapped = 0;
-}
-
-static int
-copy_vbios(void)
-{
- int mem_fd;
- unsigned char *tmp;
- int size;
-
- if ((mem_fd = open(MEM_FILE,O_RDONLY))<0) {
- perror("opening memory");
- return (0);
- }
-
- if (lseek(mem_fd,(off_t) V_BIOS, SEEK_SET) != (off_t) V_BIOS) {
- fprintf(stderr,"Cannot lseek\n");
- goto Error;
- }
- tmp = (unsigned char *)malloc(3);
- if (read(mem_fd, (char *)tmp, (size_t) 3) != (size_t) 3) {
- fprintf(stderr,"Cannot read\n");
- goto Error;
- }
- if (lseek(mem_fd,(off_t) V_BIOS,SEEK_SET) != (off_t) V_BIOS)
- goto Error;
-
- if (*tmp != 0x55 || *(tmp+1) != 0xAA ) {
-#ifdef DEBUG
- dprint((unsigned long)tmp,0x100);
-#endif
- fprintf(stderr,"No bios found at: 0x%x\n",V_BIOS);
- goto Error;
- }
- size = *(tmp+2) * 512;
-
- if (read(mem_fd, (char *)V_BIOS, (size_t) size) != (size_t) size) {
- fprintf(stderr,"Cannot read\n");
- goto Error;
- }
- free(tmp);
- close(mem_fd);
- if (!chksum((CARD8)V_BIOS))
- return (0);
-
- return (1);
-
-Error:
- perror("v_bios");
- close(mem_fd);
- return (0);
-}
-
-static int
-copy_sys_bios(void)
-{
-#define SYS_BIOS 0xF0000
- int mem_fd;
-
- if ((mem_fd = open(MEM_FILE,O_RDONLY))<0) {
- perror("opening memory");
- return (0);
- }
-
- if (lseek(mem_fd,(off_t) SYS_BIOS,SEEK_SET) != (off_t) SYS_BIOS)
- goto Error;
- if (read(mem_fd, (char *)SYS_BIOS, (size_t) 0xFFFF) != (size_t) 0xFFFF)
- goto Error;
-
- close(mem_fd);
- return (1);
-
-Error:
- perror("sys_bios");
- close(mem_fd);
- return (0);
-}
-
-void
-loadCodeToMem(unsigned char *ptr, CARD8 code[])
-{
- int i;
- CARD8 val;
-
- for ( i=0;;i++) {
- val = code[i];
- *ptr++ = val;
- if (val == 0xf4) break;
- }
- return;
-}
-
-void
-dprint(unsigned long start, unsigned long size)
-{
- int i,j;
- char *c = (char *)start;
-
- for (j = 0; j < (size >> 4); j++) {
- char *d = c;
- printf("\n0x%lx: ",(unsigned long)c);
- for (i = 0; i<16; i++)
- printf("%2.2x ",(unsigned char) (*(c++)));
- c = d;
- for (i = 0; i<16; i++) {
- printf("%c",((((CARD8)(*c)) > 32) && (((CARD8)(*c)) < 128)) ?
- (unsigned char) (*(c)): '.');
- c++;
- }
- }
- printf("\n");
-}
-
-static void
-save_bios_to_file(void)
-{
- static int num = 0;
- int size, count;
- char file_name[256];
- int fd;
-
- sprintf(file_name,"bios_%i.fil",num);
- if ((fd = open(file_name,O_WRONLY | O_CREAT | O_TRUNC,00644)) == -1)
- return;
- size = (*(unsigned char*)(V_BIOS + 2)) * 512;
-#ifdef V86BIOS_DEBUG
- dprint(V_BIOS,20);
-#endif
- if ((count = write(fd,(void *)(V_BIOS),size)) != size)
- fprintf(stderr,"only saved %i of %i bytes\n",size,count);
- num++;
-}
-
-static void
-sig_handler(int unused)
-{
- fflush(stdout);
- fflush(stderr);
-
- /* put system back in a save state */
- unmap_vram();
- pciVideoRestore();
- outb(0x102, save_pos102);
- outb(0x46e8, save_46e8);
- outb(0x3C3, save_vse);
- outb(0x3C2, save_msr);
-
- close_console(Console);
- iopl(0);
- unmap();
-
- exit(1);
-}
-
-/*
- * For initialization we just pass ax to the BIOS.
- * PCI BIOSes need this. All other register are set 0.
- */
-static void setup_bios_regs(i86biosRegsPtr regs, CARD32 ax)
-{
- regs->ax = ax;
- regs->bx = 0;
- regs->cx = 0;
- regs->dx = 0;
- regs->es = 0;
- regs->di = 0;
-}
-
-/*
- * here we are really paranoid about faking a "real"
- * BIOS. Most of this information was pulled from
- * dosem.
- */
-static void
-setup_int_vect(void)
-{
- const CARD16 cs = 0x0000;
- const CARD16 ip = 0x0;
- int i;
-
- /* let the int vects point to the SYS_BIOS seg */
- for (i=0; i<0x80; i++) {
- ((CARD16*)0)[i<<1] = ip;
- ((CARD16*)0)[(i<<1)+1] = cs;
- }
- /* video interrupts default location */
- ((CARD16*)0)[(0x42<<1)+1] = 0xf000;
- ((CARD16*)0)[0x42<<1] = 0xf065;
- ((CARD16*)0)[(0x10<<1)+1] = 0xf000;
- ((CARD16*)0)[0x10<<1] = 0xf065;
- /* video param table default location (int 1d) */
- ((CARD16*)0)[(0x1d<<1)+1] = 0xf000;
- ((CARD16*)0)[0x1d<<1] = 0xf0A4;
- /* font tables default location (int 1F) */
- ((CARD16*)0)[(0x1f<<1)+1] = 0xf000;
- ((CARD16*)0)[0x1f<<1] = 0xfa6e;
-
- /* int 11 default location */
- ((CARD16*)0)[(0x11<1)+1] = 0xf000;
- ((CARD16*)0)[0x11<<1] = 0xf84d;
- /* int 12 default location */
- ((CARD16*)0)[(0x12<<1)+1] = 0xf000;
- ((CARD16*)0)[0x12<<1] = 0xf841;
- /* int 15 default location */
- ((CARD16*)0)[(0x15<<1)+1] = 0xf000;
- ((CARD16*)0)[0x15<<1] = 0xf859;
- /* int 1A default location */
- ((CARD16*)0)[(0x1a<<1)+1] = 0xf000;
- ((CARD16*)0)[0x1a<<1] = 0xff6e;
- /* int 05 default location */
- ((CARD16*)0)[(0x05<<1)+1] = 0xf000;
- ((CARD16*)0)[0x05<<1] = 0xff54;
- /* int 08 default location */
- ((CARD16*)0)[(0x8<<1)+1] = 0xf000;
- ((CARD16*)0)[0x8<<1] = 0xfea5;
- /* int 13 default location (fdd) */
- ((CARD16*)0)[(0x13<<1)+1] = 0xf000;
- ((CARD16*)0)[0x13<<1] = 0xec59;
- /* int 0E default location */
- ((CARD16*)0)[(0xe<<1)+1] = 0xf000;
- ((CARD16*)0)[0xe<<1] = 0xef57;
- /* int 17 default location */
- ((CARD16*)0)[(0x17<<1)+1] = 0xf000;
- ((CARD16*)0)[0x17<<1] = 0xefd2;
- /* fdd table default location (int 1e) */
- ((CARD16*)0)[(0x1e<<1)+1] = 0xf000;
- ((CARD16*)0)[0x1e<<1] = 0xefc7;
-}
-
-static int
-setup_system_bios(void)
-{
- char *date = "06/01/99";
- char *eisa_ident = "PCI/ISA";
-
-#if MAP_SYS_BIOS
- if (!copy_sys_bios()) return 0;
- return 1;
-#endif
-/* memset((void *)0xF0000,0xf4,0xfff7); */
-
- /*
- * we trap the "industry standard entry points" to the BIOS
- * and all other locations by filling them with "hlt"
- * TODO: implement hlt-handler for these
- */
- memset((void *)0xF0000,0xf4,0x10000);
-
- /*
- * TODO: we should copy the fdd table (0xfec59-0xfec5b)
- * the video parameter table (0xf0ac-0xf0fb)
- * and the font tables (0xfa6e-0xfe6d)
- * from the original bios here
- */
-
- /* set bios date */
- strcpy((char *)0xFFFF5,date);
- /* set up eisa ident string */
- strcpy((char *)0xFFFD9,eisa_ident);
- /* write system model id for IBM-AT */
- ((char *)0)[0xFFFFE] = 0xfc;
-
- return 1;
-}
-
-static int
-chksum(CARD8 *start)
-{
- CARD16 size;
- CARD8 val = 0;
- int i;
-
- size = *(start+2) * 512;
- for (i = 0; i<size; i++)
- val += *(start + i);
-
- if (!val)
- return 1;
-
- fprintf(stderr,"BIOS cksum wrong!\n");
- return 0;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/v86bios/makefile.linux b/board/MAI/bios_emulator/scitech/src/v86bios/makefile.linux
deleted file mode 100644
index 5dfe306991..0000000000
--- a/board/MAI/bios_emulator/scitech/src/v86bios/makefile.linux
+++ /dev/null
@@ -1,59 +0,0 @@
-CFLAGS=-g -I/usr/include -I../../include/ -O0 -Wall
-CC=gcc
-
-.y.c:
- bison -d -o $@ $<
-.l.c:
- flex -o$@ $<
-
-SRCS = main.c io.c x86emu.c int.c pci.c
-OBJS = main.o io.o x86emu.o int.o pci.o
-
-all : vbios.vm86 v86bios.vm86 cbios.vm86 cbios.x86emu vbios.x86emu v86bios.x86emu
-#all : cbios.x86emu vbios.x86emu v86bios.x86emu
-
-parser.c : parser.y
-lex.c : lex.l
-cbios.o : cbios.c v86bios.h debug.h
-main.o : main.c v86bios.h pci.h debug.h
-io.o : v86bios.h AsmMacros.h debug.h
-mem.o : mem.c debug.h v86bios.h
-int.o : int.c v86bios.h debug.h
-pci.o : pci.c pci.h debug.h
-console.o : console.c v86bios.h debug.h
-v86.o : v86.c debug.h
-parser.o : parser.c
-lex.o : lex.c
-v86bios.o: v86bios.c v86bios.h pci.h debug.h
-logging.o: logging.c v86bios.h
-x86emu.o : x86emu.c v86bios.h debug.h
- $(CC) -c -DX86EMU $(CFLAGS) $*.c
-
-vbios.x86emu : main.o x86emu.o io.o int.o pci.o console.o mem.o logging.o
- gcc -Wl,-defsym -Wl,printk=lprintf -o vbios.x86emu main.o \
- x86emu.o io.o int.o pci.o console.o mem.o logging.o \
- -L../x86emu -lx86emud -lc
-vbios.vm86 : main.o v86.o io.o int.o pci.o console.o logging.o
- gcc -o vbios.vm86 main.o v86.o io.o int.o pci.o console.o \
- logging.o -lc
-cbios.x86emu : cbios.o x86emu.o io.o int.o pci.o console.o mem.o logging.o
- gcc -Wl,-defsym -Wl,printk=lprintf -o cbios.x86emu cbios.o \
- x86emu.o io.o int.o pci.o console.o mem.o logging.o \
- -L../x86emu -lx86emud -lc
-cbios.vm86 : cbios.o v86.o io.o int.o pci.o console.o logging.o
- gcc -o cbios.vm86 cbios.o v86.o io.o int.o pci.o console.o \
- logging.o -lc
-v86bios.vm86: command.o parser.o lex.o v86bios.o v86.o io.o int.o pci.o console.o logging.o
- gcc -o v86bios.vm86 command.o parser.o lex.o v86bios.o v86.o io.o \
- int.o pci.o console.o logging.o -L/usr/lib/curses -lfl \
- -lreadline -lc -lncurses /usr/lib/libc.a
-v86bios.x86emu: command.o parser.o lex.o v86bios.o x86emu.o io.o int.o pci.o console.o logging.o
- gcc -Wl,-defsym -Wl,printk=lprintf -o v86bios.x86emu \
- command.o parser.o lex.o v86bios.o x86emu.o io.o \
- int.o pci.o console.o logging.o -L/usr/lib/curses -lfl \
- -lreadline -lc -lncurses /usr/lib/libc.a -L../x86emu -lx86emud
-
-clean:
- rm -f *.o vbios.x86emu vbios.vm86 cbios.x86emu cbios.vm86 parser.c \
- lex.c parser.h v86bios.x86emu v86bios.vm86
-
diff --git a/board/MAI/bios_emulator/scitech/src/v86bios/mem.c b/board/MAI/bios_emulator/scitech/src/v86bios/mem.c
deleted file mode 100644
index 24c1aef8e5..0000000000
--- a/board/MAI/bios_emulator/scitech/src/v86bios/mem.c
+++ /dev/null
@@ -1,124 +0,0 @@
-/*
- * Copyright 1999 Egbert Eich
- *
- * Permission to use, copy, modify, distribute, and sell this software and its
- * documentation for any purpose is hereby granted without fee, provided that
- * the above copyright notice appear in all copies and that both that
- * copyright notice and this permission notice appear in supporting
- * documentation, and that the name of the authors not be used in
- * advertising or publicity pertaining to distribution of the software without
- * specific, written prior permission. The authors makes no representations
- * about the suitability of this software for any purpose. It is provided
- * "as is" without express or implied warranty.
- *
- * THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
- * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
- * EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
- * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
- * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
- * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
- * PERFORMANCE OF THIS SOFTWARE.
- */
-#include "debug.h"
-#include "v86bios.h"
-#include "x86emu.h"
-
-#ifdef __alpha__
-
-void* vram_map = 0;
-int sparse_shift = 5;
-
-#define mem_barrier() __asm__ __volatile__("mb" : : : "memory")
-
-#define vuip volatile unsigned int *
-
-CARD8
-mem_rb(CARD32 addr)
-{
- unsigned long result, shift;
-#if 1
- if (addr >= 0xA0000 && addr <= 0xBFFFF) {
- addr -= 0xA0000;
- shift = (addr & 0x3) * 8;
- result = *(vuip) ((unsigned long)vram_map + (addr << sparse_shift));
- result >>= shift;
- return 0xffUL & result;
- } else
-#endif
- return rdb(addr);
-}
-
-CARD16
-mem_rw(CARD32 addr)
-{
- unsigned long result, shift;
-#if 1
- if (addr >= 0xA0000 && addr <= 0xBFFFF) {
- addr -= 0xA0000;
- shift = (addr & 0x2) * 8;
- result = *(vuip)((unsigned long)vram_map+(addr<<sparse_shift)
- +(1<<(sparse_shift-2)));
- result >>= shift;
- return 0xffffUL & result;
- } else
-#endif
- return rdw(addr);
-}
-
-CARD32
-mem_rl(CARD32 addr)
-{
- unsigned long result;
-#if 1
- if (addr >= 0xA0000 && addr <= 0xBFFFF) {
- addr -= 0xA0000;
- result = *(vuip)((unsigned long)vram_map+(addr<<sparse_shift)+(3<<(sparse_shift-2)));
- return result;
- } else
-#endif
- return rdl(addr);
-}
-
-void
-mem_wb(CARD32 addr, CARD8 val)
-{
- unsigned int b = val & 0xffU;
-#if 1
- if (addr >= 0xA0000 && addr <= 0xBFFFF) {
- addr -= 0xA0000;
- *(vuip) ((unsigned long)vram_map + (addr << sparse_shift)) = b * 0x01010101;
- mem_barrier();
- } else
-#endif
- wrb(addr,val);
-}
-
-void
-mem_ww(CARD32 addr, CARD16 val)
-{
- unsigned int w = val & 0xffffU;
-#if 1
- if (addr >= 0xA0000 && addr <= 0xBFFFF) {
- addr -= 0xA0000;
- *(vuip)((unsigned long)vram_map+(addr<<sparse_shift)
- +(1<<(sparse_shift-2))) = w * 0x00010001;
- mem_barrier();
- } else
-#endif
- wrw(addr,val);
-}
-
-void
-mem_wl(CARD32 addr, CARD32 val)
-{
-#if 1
- if (addr >= 0xA0000 && addr <= 0xBFFFF) {
- addr -= 0xA0000;
- *(vuip)((unsigned long)vram_map+(addr<<sparse_shift)
- +(3<<(sparse_shift-2))) = val;
- mem_barrier();
- } else
-#endif
- wrl(addr,val);
-}
-#endif
diff --git a/board/MAI/bios_emulator/scitech/src/v86bios/parser.y b/board/MAI/bios_emulator/scitech/src/v86bios/parser.y
deleted file mode 100644
index 21c4023dcd..0000000000
--- a/board/MAI/bios_emulator/scitech/src/v86bios/parser.y
+++ /dev/null
@@ -1,498 +0,0 @@
-%{
-#include <malloc.h>
-#include <string.h>
-#include "v86bios.h"
-#include "pci.h"
-
-#define YYSTYPE unsigned long
-
-#define MAX_VAR 0x20
-
- CARD32 var[MAX_VAR];
- CARD32 var_mem;
-
-
-i86biosRegs regs = { 00 };
-
-enum mem_type { BYTE, WORD, LONG, STRING };
-union mem_val {
- CARD32 integer;
- char *ptr;
-} rec;
-
-struct mem {
- enum mem_type type;
- union mem_val val;
- struct mem *next;
-};
-
-
-struct device Device = {FALSE,NONE,{0}};
-
-extern void yyerror(char *s);
-extern int yylex( void );
-
-static void boot(void);
-static void dump_mem(CARD32 addr, int len);
-static void exec_int(int num);
-static void *add_to_list(enum mem_type type, union mem_val *rec, void *next);
-static void do_list(struct mem *list, memType addr);
-static char * normalize_string(char *ptr);
-%}
-
-%token TOK_NUM
-%token TOK_REG_AX
-%token TOK_REG_BX
-%token TOK_REG_CX
-%token TOK_REG_DX
-%token TOK_REG_DI
-%token TOK_REG_SI
-%token TOK_SEG_DS
-%token TOK_SEG_ES
-%token TOK_SEP
-%token TOK_VAR
-%token TOK_VAR_MEM
-%token TOK_COMMAND_BOOT
-%token TOK_COMMAND_EXEC
-%token TOK_SELECT
-%token TOK_STRING
-%token TOK_MODIFIER_BYTE
-%token TOK_MODIFIER_WORD
-%token TOK_MODIFIER_LONG
-%token TOK_MODIFIER_MEMSET
-%token TOK_COMMAND_MEMSET
-%token TOK_COMMAND_MEMDUMP
-%token TOK_COMMAND_QUIT
-%token TOK_ERROR
-%token TOK_END
-%token TOK_ISA
-%token TOK_PCI
-%token TOK_BYTE
-%token TOK_WORD
-%token TOK_LONG
-%token TOK_PRINT_PORT
-%token TOK_IOSTAT
-%token TOK_PRINT_IRQ
-%token TOK_PPCI
-%token TOK_PIP
-%token TOK_TRACE
-%token TOK_ON
-%token TOK_OFF
-%token TOK_VERBOSE
-%token TOK_LOG
-%token TOK_LOGOFF
-%token TOK_CLSTAT
-%token TOK_STDOUT
-%token TOK_HLT
-%token TOK_DEL
-%token TOK_IOPERM
-%token TOK_DUMP_PCI
-%token TOK_BOOT_BIOS
-%%
-input: | input line
-line: end | com_reg | com_var | com_select
- | com_boot | com_memset | com_memdump | com_quit
- | com_exec | hlp | config | verbose | logging | print | clstat
- | com_hlt | ioperm | list_pci | boot_bios
- | error end { printf("unknown command\n"); }
-;
-end: TOK_END
-;
-com_reg: reg_off val end { *(CARD16*)$1 = $2 & 0xffff; }
- | reg_seg TOK_SEP reg_off val end {
- *(CARD16*)$1 = ($4 & 0xf0000) >> 4;
- *(CARD16*)$3 = ($4 & 0x0ffff);
- }
- | reg_off '?' end { printf("0x%x\n",*(CARD16*)$1);}
- | reg_seg TOK_SEP reg_off '?' end
- { printf("0x%x:0x%x\n",*(CARD16*)$1,
- *(CARD16*)$3); }
-;
-register_read: reg_seg TOK_SEP reg_off { $$ = (((*(CARD16*)$1) << 4)
- | ((*(CARD16*)$3) & 0xffff));
- }
- | reg_off { $$ = ((*(CARD16*)$1) & 0xffff); }
-;
-reg_off: TOK_REG_AX { $$ = (unsigned long)&(regs.ax); }
- | TOK_REG_BX { $$ = (unsigned long)&(regs.bx); }
- | TOK_REG_CX { $$ = (unsigned long)&(regs.cx); }
- | TOK_REG_DX { $$ = (unsigned long)&(regs.dx); }
- | TOK_REG_DI { $$ = (unsigned long)&(regs.di); }
- | TOK_REG_SI { $$ = (unsigned long)&(regs.si); }
-;
-reg_seg: TOK_SEG_DS { $$ = (unsigned long)&(regs.ds); }
- | TOK_SEG_ES { $$ = (unsigned long)&(regs.es); }
-;
-com_var: TOK_VAR_MEM '?' end { printf("var mem: 0x%x\n",var_mem); }
- | TOK_VAR '?' end { if ($1 < MAX_VAR)
- printf("var[%i]: 0x%x\n",(int)$1,var[$1]);
- else
- printf("var index %i out of range\n",(int)$1); }
- | TOK_VAR_MEM val end { var_mem = $2; }
- | TOK_VAR val end { if ($1 <= MAX_VAR)
- var[$1] = $2;
- else
- printf("var index %i out of range\n",(int)$1); }
- | TOK_VAR error end { printf("$i val\n"); }
- | TOK_VAR_MEM error end { printf("$i val\n"); }
-;
-com_boot: TOK_COMMAND_BOOT end { boot(); }
- TOK_COMMAND_BOOT error end { boot(); }
-;
-com_select: TOK_SELECT TOK_ISA end { Device.booted = FALSE;
- Device.type = ISA;
- CurrentPci = NULL; }
- | TOK_SELECT TOK_PCI val TOK_SEP val TOK_SEP val end
- { Device.booted = FALSE;
- Device.type = PCI;
- Device.loc.pci.bus = $3;
- Device.loc.pci.dev = $5;
- Device.loc.pci.func = $7; }
- | TOK_SELECT '?' end
- { switch (Device.type) {
- case ISA:
- printf("isa\n");
- break;
- case PCI:
- printf("pci: %x:%x:%x\n",Device.loc.pci.bus,
- Device.loc.pci.dev,
- Device.loc.pci.func);
- break;
- default:
- printf("no device selected\n");
- break;
- }
- }
- | TOK_SELECT error end { printf("select ? | isa "
- "| pci:bus:dev:func\n"); }
-;
-com_quit: TOK_COMMAND_QUIT end { return 0; }
- | TOK_COMMAND_QUIT error end { logoff(); return 0; }
-;
-com_exec: TOK_COMMAND_EXEC end { exec_int(0x10); }
- | TOK_COMMAND_EXEC val end { exec_int($2); }
- | TOK_COMMAND_EXEC error end { exec_int(0x10); }
-;
-com_memdump: TOK_COMMAND_MEMDUMP val val end { dump_mem($2,$3); }
- | TOK_COMMAND_MEMDUMP error end { printf("memdump start len\n"); }
-
-
-;
-com_memset: TOK_COMMAND_MEMSET val list end { do_list((struct mem*)$3,$2);}
- | TOK_COMMAND_MEMSET error end { printf("setmem addr [byte val] "
- "[word val] [long val] "
- "[\"string\"]\n"); }
-;
-list: { $$ = 0; }
- | TOK_BYTE val list { rec.integer = $2;
- $$ = (unsigned long)add_to_list(BYTE,&rec,(void*)$3); }
- | TOK_WORD val list { rec.integer = $2;
- $$ = (unsigned long) add_to_list(WORD,&rec,(void*)$3); }
- | TOK_LONG val list { rec.integer = $2;
- $$ = (unsigned long) add_to_list(LONG,&rec,(void*)$3); }
- | TOK_STRING list { rec.ptr = (void*)$1;
- $$ = (unsigned long) add_to_list(STRING,&rec,(void*)$2); }
-;
-val: TOK_VAR { if ($1 > MAX_VAR) {
- printf("variable index out of range\n");
- $$=0;
- } else
- $$ = var[$1]; }
- | TOK_NUM { $$ = $1; }
- | register_read
-;
-bool: TOK_ON { $$ = 1; }
- | TOK_OFF { $$ = 0; }
-;
-config: TOK_PRINT_PORT bool end { Config.PrintPort = $2; }
- | TOK_PRINT_PORT '?' end { printf("print port %s\n",
- Config.PrintPort?"on":"off"); }
- | TOK_PRINT_PORT error end { printf("pport on | off | ?\n") }
- | TOK_PRINT_IRQ bool end { Config.PrintIrq = $2; }
- | TOK_PRINT_IRQ '?' end { printf("print irq %s\n",
- Config.PrintIrq?"on":"off"); }
- | TOK_PRINT_IRQ error end { printf("pirq on | off | ?\n") }
- | TOK_PPCI bool end { Config.PrintPci = $2; }
- | TOK_PPCI '?' end { printf("print PCI %s\n",
- Config.PrintPci?"on":"off"); }
- | TOK_PPCI error end { printf("ppci on | off | ?\n") }
- | TOK_PIP bool end { Config.PrintIp = $2; }
- | TOK_PIP '?' end { printf("printip %s\n",
- Config.PrintIp?"on":"off"); }
- | TOK_PIP error end { printf("pip on | off | ?\n") }
- | TOK_IOSTAT bool end { Config.IoStatistics = $2; }
- | TOK_IOSTAT '?' end { printf("io statistics %s\n",
- Config.IoStatistics?"on":"off"); }
- | TOK_IOSTAT error end { printf("iostat on | off | ?\n") }
- | TOK_TRACE bool end { Config.Trace = $2; }
- | TOK_TRACE '?' end { printf("trace %s\n",
- Config.Trace ?"on":"off"); }
- | TOK_TRACE error end { printf("trace on | off | ?\n") }
-;
-verbose: TOK_VERBOSE val end { Config.Verbose = $2; }
- | TOK_VERBOSE '?' end { printf("verbose: %i\n",
- Config.Verbose); }
- | TOK_VERBOSE error end { printf("verbose val | ?\n"); }
-;
-logging: TOK_LOG TOK_STRING end { logon(normalize_string((char*)$2)); }
- | TOK_LOG '?' end { if (logging) printf("logfile: %s\n",
- logfile);
- else printf("no logging\n?"); }
- | TOK_LOG TOK_OFF end { logoff(); }
- | TOK_LOG error end { printf("log \"<filename>\" | ? |"
- " off\n"); }
-;
-clstat: TOK_CLSTAT end { clear_stat(); }
- | TOK_CLSTAT error end { printf("clstat\n"); }
-;
-print: TOK_STDOUT bool end { nostdout = !$2; }
- | TOK_STDOUT '?' end { printf("print %s\n",nostdout ?
- "no":"yes"); }
- | TOK_STDOUT error end { printf("print on | off\n"); }
-;
-com_hlt: TOK_HLT val end { add_hlt($2); }
- | TOK_HLT TOK_DEL val end { del_hlt($3); }
- | TOK_HLT TOK_DEL end { del_hlt(21); }
- | TOK_HLT '?' end { list_hlt(); }
- | TOK_HLT error end { printf(
- "hlt val | del [val] | ?\n"); }
-;
-ioperm: TOK_IOPERM val val val end { int i,max;
- if ($2 >= 0) {
- max = $2 + $3 - 1;
- if (max > IOPERM_BITS)
- max = IOPERM_BITS;
- for (i = $2;i <= max; i++)
- ioperm_list[i]
- = $4>0 ? 1 : 0;
- }
- }
- | TOK_IOPERM '?' end { int i,start;
- for (i=0; i <= IOPERM_BITS; i++) {
- if (ioperm_list[i]) {
- start = i;
- for (; i <= IOPERM_BITS; i++)
- if (!ioperm_list[i]) {
- printf("ioperm on in "
- "0x%x+0x%x\n", start,i-start);
- break;
- }
- }
- }
- }
- | TOK_IOPERM error end { printf("ioperm start len val\n"); }
-;
-list_pci: TOK_DUMP_PCI end { list_pci(); }
- | TOK_DUMP_PCI error end { list_pci(); }
-;
-boot_bios: TOK_BOOT_BIOS '?' end { if (!BootBios) printf("No Boot BIOS\n");
- else printf("BootBIOS from: %i:%i:%i\n",
- BootBios->bus, BootBios->dev,
- BootBios->func); }
- | TOK_BOOT_BIOS error end { printf ("bootbios bus:dev:num\n"); }
-;
-hlp: '?' { printf("Command list:\n");
- printf(" select isa | pci bus:dev:func\n");
- printf(" boot\n");
- printf(" seg:reg val | reg val \n");
- printf(" $x val | $mem val\n");
- printf(" setmem addr list; addr := val\n");
- printf(" dumpmem addr len; addr,len := val\n");
- printf(" do [val]\n");
- printf(" quit\n");
- printf(" ?\n");
- printf(" seg := ds | es;"
- " reg := ax | bx | cx | dx | si \n");
- printf(" val := var | <hex-number> | seg:reg | seg\n");
- printf(" var := $x | $mem; x := 0..20\n");
- printf(" list := byte val | word val | long val "
- "| \"string\"\n");
- printf(" pport on | off | ?\n");
- printf(" ppci on | off | ?\n");
- printf(" pirq on | off | ?\n");
- printf(" pip on | off | ?\n");
- printf(" trace on | off | ?\n");
- printf(" iostat on | off | ?\n");
- printf(" verbose val\n");
- printf(" log \"<filename>\" | off | ?\n");
- printf(" print on | off\n");
- printf(" hlt val | del [val] | ?\n");
- printf(" clstat\n");
- printf(" lpci\n");
- printf ("bootbios ?\n");
-}
-;
-
-%%
-
-static void
-dump_mem(CARD32 addr, int len)
-{
- dprint(addr,len);
-}
-
-static void
-exec_int(int num)
-{
- if (num == 0x10) { /* video interrupt */
- if (Device.type == NONE) {
- CurrentPci = PciList;
- while (CurrentPci) {
- if (CurrentPci->active)
- break;
- CurrentPci = CurrentPci->next;
- }
- if (!CurrentPci)
- Device.type = ISA;
- else {
- Device.type = PCI;
- Device.loc.pci.dev = CurrentPci->dev;
- Device.loc.pci.bus = CurrentPci->bus;
- Device.loc.pci.func = CurrentPci->func;
- }
- }
- if (Device.type != ISA) {
- if (!Device.booted) {
- if (!CurrentPci || (Device.type == PCI
- && (!CurrentPci->active
- && (Device.loc.pci.dev != CurrentPci->dev
- || Device.loc.pci.bus != CurrentPci->bus
- || Device.loc.pci.func != CurrentPci->func)))) {
- printf("boot the device fist\n");
- return;
- }
- }
- } else
- CurrentPci = NULL;
- } else {
- Device.booted = FALSE; /* we need this for sanity! */
- }
-
- runINT(num,&regs);
-}
-
-static void
-boot(void)
-{
- if (Device.type == NONE) {
- printf("select a device fist\n");
- return;
- }
-
- call_boot(&Device);
-}
-
-static void *
-add_to_list(enum mem_type type, union mem_val *rec, void *next)
-{
- struct mem *mem_rec = (struct mem *) malloc(sizeof(mem_rec));
-
- mem_rec->type = type;
- mem_rec->next = next;
-
- switch (type) {
- case BYTE:
- case WORD:
- case LONG:
- mem_rec->val.integer = rec->integer;
- break;
- case STRING:
- mem_rec->val.ptr = normalize_string(rec->ptr);
- break;
- }
- return mem_rec;
-}
-
-static int
-validRange(int addr,int len)
-{
- int end = addr + len;
-
- if (addr < 0x1000 || end > 0xc0000)
- return 0;
- return 1;
-}
-
-static void
-do_list(struct mem *list, memType addr)
-{
- struct mem *prev;
- int len;
-
- while (list) {
- switch (list->type) {
- case BYTE:
- if (!validRange(addr,1)) goto error;
- *(CARD8*)addr = list->val.integer;
- addr =+ 1;
- break;
- case WORD:
- if (!validRange(addr,2)) goto error;
- *(CARD16*)addr = list->val.integer;
- addr =+ 2;
- break;
- case LONG:
- if (!validRange(addr,4)) goto error;
- *(CARD32*)addr = list->val.integer;
- addr =+ 4;
- break;
- case STRING:
- len = strlen((char*)list->val.ptr);
- if (!validRange(addr,len)) goto error;
- memcpy((CARD8*)addr,(void*)list->val.ptr,len);
- addr =+ len;
- free(list->val.ptr);
- break;
- }
- prev = list;
- list = list->next;
- free(prev);
- continue;
- error:
- printf("address out of range\n");
- while (list) {
- prev = list;
- list = list->next;
- free(prev);
- }
- break;
- }
-}
-
-static char *
-normalize_string(char *ptr)
-{
- int i = 0, j = 0, c = 0, esc= 0;
- int size;
- char *mem_ptr;
-
- size = strlen(ptr);
- mem_ptr = malloc(size);
- while (1) {
- switch (*(ptr + i)) {
- case '\\':
- if (esc) {
- *(mem_ptr + j++) = *(ptr + i);
- esc = 0;
- } else
- esc = 1;
- break;
- case '\"':
- if (esc) {
- *(mem_ptr + j++) = *(ptr + i);
- esc = 0;
- } else
- c++;
- break;
- default:
- *(mem_ptr + j++) = *(ptr + i);
- break;
- }
- if (c > 1) {
- *(mem_ptr + j) = '\0';
- break;
- }
- i++;
- }
- return mem_ptr;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/v86bios/pci.c b/board/MAI/bios_emulator/scitech/src/v86bios/pci.c
deleted file mode 100644
index b58a57195f..0000000000
--- a/board/MAI/bios_emulator/scitech/src/v86bios/pci.c
+++ /dev/null
@@ -1,902 +0,0 @@
-/*
- * Copyright 1999 Egbert Eich
- *
- * Permission to use, copy, modify, distribute, and sell this software and its
- * documentation for any purpose is hereby granted without fee, provided that
- * the above copyright notice appear in all copies and that both that
- * copyright notice and this permission notice appear in supporting
- * documentation, and that the name of the authors not be used in
- * advertising or publicity pertaining to distribution of the software without
- * specific, written prior permission. The authors makes no representations
- * about the suitability of this software for any purpose. It is provided
- * "as is" without express or implied warranty.
- *
- * THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
- * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
- * EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
- * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
- * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
- * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
- * PERFORMANCE OF THIS SOFTWARE.
- */
-#include "debug.h"
-#include <fcntl.h>
-#include <unistd.h>
-#include <malloc.h>
-#include <stdio.h>
-#include <sys/mman.h>
-#include <sys/types.h>
-#include <sys/stat.h>
-#include <string.h>
-#if defined (__alpha__) || defined (__ia64__)
-#include <sys/io.h>
-#endif
-#include "AsmMacros.h"
-
-#include "pci.h"
-
-/*
- * I'm rather simple mindend - therefore I do a poor man's
- * pci scan without all the fancy stuff that is done in
- * scanpci. However that's all we need.
- */
-
-PciStructPtr PciStruct = NULL;
-PciBusPtr PciBuses = NULL;
-PciStructPtr CurrentPci = NULL;
-PciStructPtr PciList = NULL;
-PciStructPtr BootBios = NULL;
-int pciMaxBus = 0;
-
-static CARD32 PciCfg1Addr;
-
-static void readConfigSpaceCfg1(CARD32 bus, CARD32 dev, CARD32 func,
- CARD32 *reg);
-static int checkSlotCfg1(CARD32 bus, CARD32 dev, CARD32 func);
-static int checkSlotCfg2(CARD32 bus, int dev);
-static void readConfigSpaceCfg2(CARD32 bus, int dev, CARD32 *reg);
-static CARD8 interpretConfigSpace(CARD32 *reg, int busidx,
- CARD8 dev, CARD8 func);
-static CARD32 findBIOSMap(PciStructPtr pciP, CARD32 *biosSize);
-static void restoreMem(PciStructPtr pciP);
-
-
-#ifdef __alpha__
-#define PCI_BUS_FROM_TAG(tag) (((tag) & 0x00ff0000) >> 16)
-#define PCI_DFN_FROM_TAG(tag) (((tag) & 0x0000ff00) >> 8)
-
-#include <asm/unistd.h>
-
-CARD32
-axpPciCfgRead(CARD32 tag)
-{
- int bus, dfn;
- CARD32 val = 0xffffffff;
-
- bus = PCI_BUS_FROM_TAG(tag);
- dfn = PCI_DFN_FROM_TAG(tag);
-
- syscall(__NR_pciconfig_read, bus, dfn, tag & 0xff, 4, &val);
- return(val);
-}
-
-void
-axpPciCfgWrite(CARD32 tag, CARD32 val)
-{
- int bus, dfn;
-
- bus = PCI_BUS_FROM_TAG(tag);
- dfn = PCI_DFN_FROM_TAG(tag);
-
- syscall(__NR_pciconfig_write, bus, dfn, tag & 0xff, 4, &val);
-}
-
-static CARD32 (*readPci)(CARD32 reg) = axpPciCfgRead;
-static void (*writePci)(CARD32 reg, CARD32 val) = axpPciCfgWrite;
-#else
-static CARD32 readPciCfg1(CARD32 reg);
-static void writePciCfg1(CARD32 reg, CARD32 val);
-static CARD32 readPciCfg2(CARD32 reg);
-static void writePciCfg2(CARD32 reg, CARD32 val);
-
-static CARD32 (*readPci)(CARD32 reg) = readPciCfg1;
-static void (*writePci)(CARD32 reg, CARD32 val) = writePciCfg1;
-#endif
-
-#if defined(__alpha__) || defined(__sparc__)
-#define PCI_EN 0x00000000
-#else
-#define PCI_EN 0x80000000
-#endif
-
-
-static int numbus;
-static int hostbridges = 1;
-static unsigned long pciMinMemReg = ~0;
-
-
-void
-scan_pci(void)
-{
- unsigned short configtype;
-
- CARD32 reg[64];
- int busidx;
- CARD8 cardnum;
- CARD8 func;
- int idx;
-
- int i;
- PciStructPtr pci1;
- PciBusPtr pci_b1,pci_b2;
-
-#if defined(__alpha__) || defined(__powerpc__) || defined(__sparc__) || defined(__ia64__)
- configtype = 1;
-#else
- CARD8 tmp1, tmp2;
- CARD32 tmp32_1, tmp32_2;
- outb(PCI_MODE2_ENABLE_REG, 0x00);
- outb(PCI_MODE2_FORWARD_REG, 0x00);
- tmp1 = inb(PCI_MODE2_ENABLE_REG);
- tmp2 = inb(PCI_MODE2_FORWARD_REG);
- if ((tmp1 == 0x00) && (tmp2 == 0x00)) {
- configtype = 2;
- readPci = readPciCfg2;
- writePci = writePciCfg2;
- P_printf("PCI says configuration type 2\n");
- } else {
- tmp32_1 = inl(PCI_MODE1_ADDRESS_REG);
- outl(PCI_MODE1_ADDRESS_REG, PCI_EN);
- tmp32_2 = inl(PCI_MODE1_ADDRESS_REG);
- outl(PCI_MODE1_ADDRESS_REG, tmp32_1);
- if (tmp32_2 == PCI_EN) {
- configtype = 1;
- P_printf("PCI says configuration type 1\n");
- } else {
- P_printf("No PCI !\n");
- return;
- }
- }
-#endif
-
- if (configtype == 1) {
- P_printf("PCI probing configuration type 1\n");
- busidx = 0;
- numbus = 1;
- idx = 0;
- do {
- P_printf("\nProbing for devices on PCI bus %d:\n", busidx);
- for (cardnum = 0; cardnum < MAX_DEV_PER_VENDOR_CFG1; cardnum++) {
- func = 0;
- do {
- /* loop over the different functions, if present */
- if (!checkSlotCfg1(busidx,cardnum,func))
- break;
- readConfigSpaceCfg1(busidx,cardnum,func,reg);
-
- func = interpretConfigSpace(reg,busidx,
- cardnum,func);
-
- if (idx++ > MAX_PCI_DEVICES)
- continue;
- } while (func < 8);
- }
- } while (++busidx < PCI_MAXBUS);
-#if defined(__alpha__) || defined(__powerpc__) || defined(__sparc__) || defined(__ia64__)
- /* don't use outl() ;-) */
-#else
- outl(PCI_MODE1_ADDRESS_REG, 0);
-#endif
- } else {
- int slot;
-
- P_printf("PCI probing configuration type 2\n");
- busidx = 0;
- numbus = 1;
- idx = 0;
- do {
- for (slot=0xc0; slot<0xd0; i++) {
- if (!checkSlotCfg2(busidx,slot))
- break;
- readConfigSpaceCfg2(busidx,slot,reg);
-
- interpretConfigSpace(reg,busidx,
- slot,0);
- if (idx++ > MAX_PCI_DEVICES)
- continue;
- }
- } while (++busidx < PCI_MAXBUS);
- }
-
-
- pciMaxBus = numbus - 1;
- P_printf("Number of buses in system: %i\n",pciMaxBus + 1);
- P_printf("Min PCI mem address: 0x%lx\n",pciMinMemReg);
-
- /* link buses */
- pci_b1 = PciBuses;
- while (pci_b1) {
- pci_b2 = PciBuses;
- pci_b1->pBus = NULL;
- while (pci_b2) {
- if (pci_b1->primary == pci_b2->secondary)
- pci_b1->pBus = pci_b2;
- pci_b2 = pci_b2->next;
- }
- pci_b1 = pci_b1->next;
- }
- pci1 = PciStruct;
- while (pci1) {
- pci_b2 = PciBuses;
- pci1->pBus = NULL;
- while (pci_b2) {
- if (pci1->bus == pci_b2->secondary)
- pci1->pBus = pci_b2;
- pci_b2 = pci_b2->next;
- }
- pci1 = pci1->next;
- }
- if (RESORT) {
- PciStructPtr tmp = PciStruct, tmp1;
- PciStruct = NULL;
- while (tmp) {
- tmp1 = tmp->next;
- tmp->next = PciStruct;
- PciStruct = tmp;
- tmp = tmp1;
- }
- }
- PciList = CurrentPci = PciStruct;
-}
-
-#ifndef __alpha__
-static CARD32
-readPciCfg1(CARD32 reg)
-{
- CARD32 val;
-
- outl(PCI_MODE1_ADDRESS_REG, reg);
- val = inl(PCI_MODE1_DATA_REG);
- outl(PCI_MODE1_ADDRESS_REG, 0);
- P_printf("reading: 0x%x from 0x%x\n",val,reg);
- return val;
-}
-
-static void
-writePciCfg1(CARD32 reg, CARD32 val)
-{
- P_printf("writing: 0x%x to 0x%x\n",val,reg);
- outl(PCI_MODE1_ADDRESS_REG, reg);
- outl(PCI_MODE1_DATA_REG,val);
- outl(PCI_MODE1_ADDRESS_REG, 0);
-}
-
-static CARD32
-readPciCfg2(CARD32 reg)
-{
- CARD32 val;
- CARD8 bus = (reg >> 16) & 0xff;
- CARD8 dev = (reg >> 11) & 0x1f;
- CARD8 num = reg & 0xff;
-
- outb(PCI_MODE2_ENABLE_REG, 0xF1);
- outb(PCI_MODE2_FORWARD_REG, bus);
- val = inl((dev << 8) + num);
- outb(PCI_MODE2_ENABLE_REG, 0x00);
- P_printf("reading: 0x%x from 0x%x\n",val,reg);
- return val;
-}
-
-static void
-writePciCfg2(CARD32 reg, CARD32 val)
-{
- CARD8 bus = (reg >> 16) & 0xff;
- CARD8 dev = (reg >> 11) & 0x1f;
- CARD8 num = reg & 0xff;
-
- P_printf("writing: 0x%x to 0x%x\n",val,reg);
- outb(PCI_MODE2_ENABLE_REG, 0xF1);
- outb(PCI_MODE2_FORWARD_REG, bus);
- outl((dev << 8) + num,val);
- outb(PCI_MODE2_ENABLE_REG, 0x00);
-}
-#endif
-
-void
-pciVideoDisable(void)
-{
- /* disable VGA routing on bridges */
- PciBusPtr pbp = PciBuses;
- PciStructPtr pcp = PciStruct;
-
- while (pbp) {
- writePci(pbp->Slot.l | 0x3c, pbp->bctl & ~(CARD32)(8<<16));
- pbp = pbp->next;
- }
- /* disable display devices */
- while (pcp) {
- writePci(pcp->Slot.l | 0x04, pcp->cmd_st & ~(CARD32)3);
- writePci(pcp->Slot.l | 0x30, pcp->RomBase & ~(CARD32)1);
- pcp = pcp->next;
- }
-}
-
-void
-pciVideoRestore(void)
-{
- /* disable VGA routing on bridges */
- PciBusPtr pbp = PciBuses;
- PciStructPtr pcp = PciStruct;
-
- while (pbp) {
- writePci(pbp->Slot.l | 0x3c, pbp->bctl);
- pbp = pbp->next;
- }
- /* disable display devices */
- while (pcp) {
- writePci(pcp->Slot.l | 0x04, pcp->cmd_st);
- writePci(pcp->Slot.l | 0x30, pcp->RomBase);
- pcp = pcp->next;
- }
-}
-
-void
-EnableCurrent()
-{
- PciBusPtr pbp;
- PciStructPtr pcp = CurrentPci;
-
- pciVideoDisable();
-
- pbp = pcp->pBus;
- while (pbp) { /* enable bridges */
- writePci(pbp->Slot.l | 0x3c, pbp->bctl | (CARD32)(8<<16));
- pbp = pbp->pBus;
- }
- writePci(pcp->Slot.l | 0x04, pcp->cmd_st | (CARD32)3);
- writePci(pcp->Slot.l | 0x30, pcp->RomBase | (CARD32)1);
-}
-
-CARD8
-PciRead8(int offset, CARD32 Slot)
-{
- int shift = offset & 0x3;
- offset = offset & 0xFC;
- return ((readPci(Slot | offset) >> (shift << 3)) & 0xff);
-}
-
-CARD16
-PciRead16(int offset, CARD32 Slot)
-{
- int shift = offset & 0x2;
- offset = offset & 0xFC;
- return ((readPci(Slot | offset) >> (shift << 3)) & 0xffff);
-}
-
-CARD32
-PciRead32(int offset, CARD32 Slot)
-{
- offset = offset & 0xFC;
- return (readPci(Slot | offset));
-}
-
-void
-PciWrite8(int offset, CARD8 byte, CARD32 Slot)
-{
- CARD32 val;
- int shift = offset & 0x3;
- offset = offset & 0xFC;
- val = readPci(Slot | offset);
- val &= ~(CARD32)(0xff << (shift << 3));
- val |= byte << (shift << 3);
- writePci(Slot | offset, val);
-}
-
-void
-PciWrite16(int offset, CARD16 word, CARD32 Slot)
-{
- CARD32 val;
- int shift = offset & 0x2;
- offset = offset & 0xFC;
- val = readPci(Slot | offset);
- val &= ~(CARD32)(0xffff << (shift << 3));
- val |= word << (shift << 3);
- writePci(Slot | offset, val);
-}
-
-void
-PciWrite32(int offset, CARD32 lg, CARD32 Slot)
-{
- offset = offset & 0xFC;
- writePci(Slot | offset, lg);
-}
-
-int
-mapPciRom(PciStructPtr pciP)
-{
- unsigned long RomBase = 0;
- int mem_fd;
- unsigned char *mem, *ptr;
- unsigned char *scratch = NULL;
- int length = 0;
- CARD32 biosSize = 0x1000000;
- CARD32 enablePci;
-
- if (!pciP)
- pciP = CurrentPci;
-
- if (FIX_ROM) {
- RomBase = findBIOSMap(pciP, &biosSize);
- if (!RomBase) {
- fprintf(stderr,"Cannot remap BIOS of %i:%i:%i "
- "- trying preset address\n",pciP->bus,pciP->dev,
- pciP->func);
- RomBase = pciP->RomBase & ~(CARD32)0xFF;
- }
- } else {
- RomBase = pciP->RomBase & ~(CARD32)0xFF;
- if (~RomBase + 1 < biosSize || !RomBase)
- RomBase = findBIOSMap(pciP, &biosSize);
- }
-
- P_printf("RomBase: 0x%lx\n",RomBase);
-
- if ((mem_fd = open(MEM_FILE,O_RDONLY))<0) {
- perror("opening memory");
- restoreMem(pciP);
- return (0);
- }
-
- PciWrite32(0x30,RomBase | 1,pciP->Slot.l);
-
-#ifdef __alpha__
- mem = ptr = (unsigned char *)mmap(0, biosSize, PROT_READ,
- MAP_SHARED, mem_fd, RomBase | _bus_base());
-#else
- mem = ptr = (unsigned char *)mmap(0, biosSize, PROT_READ,
- MAP_SHARED, mem_fd, RomBase);
-#endif
- if (pciP != CurrentPci) {
- enablePci = PciRead32(0x4,pciP->Slot.l);
- PciWrite32(0x4,enablePci | 0x2,pciP->Slot.l);
- }
-
-#ifdef PRINT_PCI
- dprint((unsigned long)ptr,0x30);
-#endif
- while ( *ptr == 0x55 && *(ptr+1) == 0xAA) {
- unsigned short data_off = *(ptr+0x18) | (*(ptr+0x19)<< 8);
- unsigned char *data = ptr + data_off;
- unsigned char type;
- int i;
-
- if (*data!='P' || *(data+1)!='C' || *(data+2)!='I' || *(data+3)!='R') {
- break;
- }
- type = *(data + 0x14);
- P_printf("data segment in BIOS: 0x%x, type: 0x%x ",data_off,type);
-
- if (type != 0) { /* not PC-AT image: find next one */
- unsigned int image_length;
- unsigned char indicator = *(data + 0x15);
- if (indicator & 0x80) /* last image */
- break;
- image_length = (*(data + 0x10)
- | (*(data + 0x11) << 8)) << 9;
- P_printf("data image length: 0x%x, ind: 0x%x\n",
- image_length,indicator);
- ptr = ptr + image_length;
- continue;
- }
- /* OK, we have a PC Image */
- length = (*(ptr + 2) << 9);
- P_printf("BIOS length: 0x%x\n",length);
- scratch = (unsigned char *)malloc(length);
- /* don't use memcpy() here: Reading from bus! */
- for (i=0;i<length;i++)
- *(scratch + i)=*(ptr + i);
- break;
- }
-
- if (pciP != CurrentPci)
- PciWrite32(0x4,enablePci,pciP->Slot.l);
-
- /* unmap/close/disable PCI bios mem */
- munmap(mem, biosSize);
- close(mem_fd);
- /* disable and restore mapping */
- writePci(pciP->Slot.l | 0x30, pciP->RomBase & ~(CARD32)1);
-
- if (scratch && length) {
- memcpy((unsigned char *)V_BIOS, scratch, length);
- free(scratch);
- }
-
- restoreMem(pciP);
- return length;
-}
-
-CARD32
-findPci(CARD16 slotBX)
-{
- CARD32 slot = slotBX << 8;
-
- if (slot == (CurrentPci->Slot.l & ~PCI_EN))
- return (CurrentPci->Slot.l | PCI_EN);
- else {
-#if !SHOW_ALL_DEV
- PciBusPtr pBus = CurrentPci->pBus;
- while (pBus) {
- /* fprintf(stderr,"slot: 0x%x bridge: 0x%x\n",slot, pBus->Slot.l); */
- if (slot == (pBus->Slot.l & ~PCI_EN))
- return pBus->Slot.l | PCI_EN;
- pBus = pBus->next;
- }
-#else
- PciStructPtr pPci = PciStruct;
- while (pPci) {
- /*fprintf(stderr,"slot: 0x%x bridge: 0x%x\n",slot, pPci->Slot.l); */
- if (slot == (pPci->Slot.l & ~PCI_EN))
- return pPci->Slot.l | PCI_EN;
- pPci = pPci->next;
- }
-#endif
- }
- return 0;
-}
-
-CARD16
-pciSlotBX(PciStructPtr pPci)
-{
- return (CARD16)((pPci->Slot.l >> 8) & 0xFFFF);
-}
-
-PciStructPtr
-findPciDevice(CARD16 vendorID, CARD16 deviceID, char n)
-{
- PciStructPtr pPci = CurrentPci;
- n++;
-
- while (pPci) {
- if ((pPci->VendorID == vendorID) && (pPci->DeviceID == deviceID)) {
- if (!(--n)) break;
- }
- pPci = pPci->next;
- }
- return pPci;
-}
-
-PciStructPtr
-findPciClass(CARD8 intf, CARD8 subClass, CARD16 class, char n)
-{
- PciStructPtr pPci = CurrentPci;
- n++;
-
- while (pPci) {
- if ((pPci->Interface == intf) && (pPci->SubClass == subClass)
- && (pPci->BaseClass == class)) {
- if (!(--n)) break;
- }
- pPci = pPci->next;
- }
- return pPci;
-}
-
-static void
-readConfigSpaceCfg1(CARD32 bus, CARD32 dev, CARD32 func, CARD32 *reg)
-{
- CARD32 config_cmd = PCI_EN | (bus<<16) |
- (dev<<11) | (func<<8);
- int i;
-
- for (i = 0; i<64;i+=4) {
-#ifdef __alpha__
- reg[i] = axpPciCfgRead(config_cmd | i);
-#else
- outl(PCI_MODE1_ADDRESS_REG, config_cmd | i);
- reg[i] = inl(PCI_MODE1_DATA_REG);
-#endif
-
-#ifdef V86BIOS_DEBUG
- P_printf("0x%lx\n",reg[i]);
-#endif
- }
-}
-
-static int
-checkSlotCfg1(CARD32 bus, CARD32 dev, CARD32 func)
-{
- CARD32 config_cmd = PCI_EN | (bus<<16) |
- (dev<<11) | (func<<8);
- CARD32 reg;
-#ifdef __alpha__
- reg = axpPciCfgRead(config_cmd);
-#else
- outl(PCI_MODE1_ADDRESS_REG, config_cmd);
- reg = inl(PCI_MODE1_DATA_REG);
-#endif
- if (reg != 0xFFFFFFFF)
- return 1;
- else
- return 0;
-}
-
-static int
-checkSlotCfg2(CARD32 bus, int dev)
-{
- CARD32 val;
-
- outb(PCI_MODE2_ENABLE_REG, 0xF1);
- outb(PCI_MODE2_FORWARD_REG, bus);
- val = inl(dev << 8);
- outb(PCI_MODE2_FORWARD_REG, 0x00);
- outb(PCI_MODE2_ENABLE_REG, 0x00);
- if (val == 0xFFFFFFFF)
- return 0;
- if (val == 0xF0F0F0F0)
- return 0;
- return 1;
-}
-
-static void
-readConfigSpaceCfg2(CARD32 bus, int dev, CARD32 *reg)
-{
- int i;
-
- outb(PCI_MODE2_ENABLE_REG, 0xF1);
- outb(PCI_MODE2_FORWARD_REG, bus);
- for (i = 0; i<64;i+=4) {
- reg[i] = inl((dev << 8) + i);
-#ifdef V86BIOS_DEBUG
- P_printf("0x%lx\n",reg[i]);
-#endif
- }
- outb(PCI_MODE2_ENABLE_REG, 0x00);
-}
-
-static CARD8
-interpretConfigSpace(CARD32 *reg, int busidx, CARD8 dev, CARD8 func)
-{
- CARD32 config_cmd;
- CARD16 vendor, device;
- CARD8 baseclass, subclass;
- CARD8 primary, secondary;
- CARD8 header, interface;
- int i;
-
- config_cmd = PCI_EN | busidx<<16 |
- (dev<<11) | (func<<8);
-
- for (i = 0x10; i < 0x28; i+=4) {
- if (IS_MEM32(reg[i]))
- if ((reg[i] & 0xFFFFFFF0) < pciMinMemReg)
- pciMinMemReg = (reg[i] & 0xFFFFFFF0);
-#ifdef __alpha__
- if (IS_MEM64(reg[i])) {
- unsigned long addr = reg[i] |
- (unsigned long)(reg[i+4]) << 32;
- if ((addr & ~0xfL) < pciMinMemReg)
- pciMinMemReg = (addr & ~0xfL);
- i+=4;
- }
-#endif
- }
- vendor = reg[0] & 0xFFFF;
- device = reg[0] >> 16;
- P_printf("bus: %i card: %i func %i reg0: 0x%x ", busidx,dev,func,reg[0]);
- baseclass = reg[8] >> 24;
- subclass = (reg[8] >> 16) & 0xFF;
- interface = (reg[8] >> 8) & 0xFF;
-
- header = (reg[0x0c] >> 16) & 0xff;
- P_printf("bc 0x%x, sub 0x%x, if 0x%x, hdr 0x%x\n",
- baseclass,subclass,interface,header);
- if (BRIDGE_CLASS(baseclass)) {
- if (BRIDGE_PCI_CLASS(subclass)) {
- PciBusPtr pbp = malloc(sizeof(PciBusRec));
- P_printf("Pci-Pci Bridge found; ");
- primary = reg[0x18] & 0xFF;
- secondary = (reg[0x18] >> 8) & 0xFF;
- P_printf("primary: 0x%x secondary: 0x%x\n",
- primary,secondary);
- pbp->bctl = reg[0x3c];
- pbp->primary = primary;
- pbp->secondary = secondary;
- pbp->Slot.l = config_cmd;
- pbp->next = PciBuses;
- PciBuses = pbp;
- numbus++;
- } else if (BRIDGE_HOST_CLASS(subclass)
- && (hostbridges++ > 1)) {
- numbus++;
- }
- } else if (VIDEO_CLASS(baseclass,subclass)) {
- PciStructPtr pcp = malloc(sizeof(PciStructRec));
- P_printf("Display adapter found\n");
- pcp->RomBase = reg[0x30];
- pcp->cmd_st = reg[4];
- pcp->active = (reg[4] & 0x03) == 3 ? 1 : 0;
- pcp->VendorID = vendor;
- pcp->DeviceID = device;
- pcp->Interface = interface;
- pcp->BaseClass = baseclass;
- pcp->SubClass = subclass;
- pcp->Slot.l = config_cmd;
- pcp->bus = busidx;
- pcp->dev = dev;
- pcp->func = func;
- pcp->next = PciStruct;
- PciStruct = pcp;
- }
- if ((func == 0)
- && ((header & PCI_MULTIFUNC_DEV) == 0))
- func = 8;
- else
- func++;
- return func;
-}
-
-static CARD32 remapMEM_val;
-static int remapMEM_num;
-
-static int /* map it on some other video device */
-remapMem(PciStructPtr pciP, int num, CARD32 size)
-{
- PciStructPtr pciPtr = PciStruct;
- int i;
- CARD32 org;
- CARD32 val;
- CARD32 size_n;
-
- org = PciRead32(num + 0x10,pciP->Slot.l);
-
- while (pciPtr) {
- for (i = 0; i < 20; i=i+4) {
-
- val = PciRead32(i + 0x10,pciPtr->Slot.l);
- /* don't map it on itself */
- if ((org & 0xfffffff0) == (val & 0xfffffff0))
- continue;
- if (val && !(val & 1))
- PciWrite32(i + 0x10,0xffffffff,pciPtr->Slot.l);
- else
- continue;
- size_n = PciRead32(i + 0x10,pciPtr->Slot.l);
- PciWrite32(i + 0x10,val,pciPtr->Slot.l);
- size_n = ~(CARD32)(size_n & 0xfffffff0) + 1;
-
- if (size_n >= size) {
- PciWrite32(num + 0x10,val,pciP->Slot.l);
- return 1;
- }
- }
- pciPtr = pciPtr->next;
- }
- /* last resort: try to go below lowest PCI mem address */
- val = ((pciMinMemReg & ~(CARD32)(size - 1)) - size);
- if (val > 0x7fffffff) {
- PciWrite32(num + 0x10,val, pciP->Slot.l);
- return 1;
- }
-
- return 0;
-}
-
-static void
-restoreMem(PciStructPtr pciP)
-{
- if (remapMEM_val == 0) return;
- PciWrite32(remapMEM_num + 0x10,remapMEM_val,pciP->Slot.l);
- return;
-}
-
-static CARD32
-findBIOSMap(PciStructPtr pciP, CARD32 *biosSize)
-{
- PciStructPtr pciPtr = PciStruct;
- int i;
- CARD32 val;
- CARD32 size;
-
- PciWrite32(0x30,0xffffffff,pciP->Slot.l);
- *biosSize = PciRead32(0x30,pciP->Slot.l);
- P_printf("bios size: 0x%x\n",*biosSize);
- PciWrite32(0x30,pciP->RomBase,pciP->Slot.l);
- *biosSize = ~(*biosSize & 0xFFFFFF00) + 1;
- P_printf("bios size masked: 0x%x\n",*biosSize);
- if (*biosSize > (1024 * 1024 * 16)) {
- *biosSize = 1024 * 1024 * 16;
- P_printf("fixing broken BIOS size: 0x%x\n",*biosSize);
- }
- while (pciPtr) {
- if (pciPtr->bus != pciP->bus) {
- pciPtr = pciPtr->next;
- continue;
- }
- for (i = 0; i < 20; i=i+4) {
-
- val = PciRead32(i + 0x10,pciPtr->Slot.l);
- if (!(val & 1))
-
- PciWrite32(i + 0x10,0xffffffff,pciPtr->Slot.l);
- else
- continue;
- size = PciRead32(i + 0x10,pciPtr->Slot.l);
- PciWrite32(i + 0x10,val,pciPtr->Slot.l);
- size = ~(CARD32)(size & 0xFFFFFFF0) + 1;
-#ifdef V86_BIOS_DEBUG
- P_printf("size: 0x%x\n",size);
-#endif
- if (size >= *biosSize) {
- if (pciP == pciPtr) { /* if same device remap ram*/
- if (!(remapMem(pciP,i,size)))
- continue;
- remapMEM_val = val;
- remapMEM_num = i;
- } else {
- remapMEM_val = 0;
- }
- return val & 0xFFFFFF00;
- }
- }
- pciPtr = pciPtr->next;
- }
- remapMEM_val = 0;
- /* very last resort */
- if (pciP->bus == 0 && (pciMinMemReg > *biosSize))
- return (pciMinMemReg - size) & ~(size - 1);
-
- return 0;
-}
-
-int
-cfg1out(CARD16 addr, CARD32 val)
-{
- if (addr == 0xCF8) {
- PciCfg1Addr = val;
- return 1;
- } else if (addr == 0xCFC) {
- writePci(PciCfg1Addr, val);
- return 1;
- }
- return 0;
-}
-
-int
-cfg1in(CARD16 addr, CARD32 *val)
-{
- if (addr == 0xCF8) {
- *val = PciCfg1Addr;
- return 1;
- } else if (addr == 0xCFC) {
- *val = readPci(PciCfg1Addr);
- return 1;
- }
- return 0;
-}
-
-void
-list_pci(void)
-{
- PciStructPtr pci = PciList;
-
- while (pci) {
- printf("[0x%x:0x%x:0x%x] vendor: 0x%4.4x dev: 0x%4.4x class: 0x%4.4x"
- " subclass: 0x%4.4x\n",pci->bus,pci->dev,pci->func,
- pci->VendorID,pci->DeviceID,pci->BaseClass,pci->SubClass);
- pci = pci->next;
- }
-}
-
-PciStructPtr
-findPciByIDs(int bus, int dev, int func)
-{
- PciStructPtr pciP = PciList;
-
- while (pciP) {
- if (pciP->bus == bus && pciP->dev == dev && pciP->func == func)
- return pciP;
- pciP = pciP->next;
- }
- return NULL;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/v86bios/pci.h b/board/MAI/bios_emulator/scitech/src/v86bios/pci.h
deleted file mode 100644
index 58ad52202e..0000000000
--- a/board/MAI/bios_emulator/scitech/src/v86bios/pci.h
+++ /dev/null
@@ -1,127 +0,0 @@
-/*
- * Copyright 1999 Egbert Eich
- *
- * Permission to use, copy, modify, distribute, and sell this software and its
- * documentation for any purpose is hereby granted without fee, provided that
- * the above copyright notice appear in all copies and that both that
- * copyright notice and this permission notice appear in supporting
- * documentation, and that the name of the authors not be used in
- * advertising or publicity pertaining to distribution of the software without
- * specific, written prior permission. The authors makes no representations
- * about the suitability of this software for any purpose. It is provided
- * "as is" without express or implied warranty.
- *
- * THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
- * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
- * EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
- * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
- * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
- * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
- * PERFORMANCE OF THIS SOFTWARE.
- */
-#include "v86bios.h"
-
-#ifndef V86_PCI_H
-#define V86_PCI_H
-
-typedef union {
- struct {
- unsigned int zero:2;
- unsigned int reg:6;
- unsigned int func:3;
- unsigned int dev:5;
- unsigned int bus:8;
- unsigned int reserved:7;
- unsigned int enable:1;
- } pci;
- CARD32 l;
-} PciSlot;
-
-typedef struct pciBusRec {
- CARD8 primary;
- CARD8 secondary;
- CARD32 bctl;
- PciSlot Slot;
- struct pciBusRec *next;
- struct pciBusRec *pBus;
-} PciBusRec, *PciBusPtr;
-
-typedef struct pciStructRec {
- CARD16 VendorID;
- CARD16 DeviceID;
- CARD8 Interface;
- CARD8 BaseClass;
- CARD8 SubClass;
- CARD32 RomBase;
- CARD32 bus;
- CARD8 dev;
- CARD8 func;
- CARD32 cmd_st;
- int active;
- PciSlot Slot;
- struct pciStructRec *next;
- PciBusPtr pBus;
-} PciStructRec , *PciStructPtr;
-
-
-extern PciStructPtr CurrentPci;
-extern PciStructPtr PciList;
-extern PciStructPtr BootBios;
-extern int pciMaxBus;
-
-extern CARD32 findPci(CARD16 slotBX);
-extern CARD16 pciSlotBX(PciStructPtr);
-PciStructPtr findPciDevice(CARD16 vendorID, CARD16 deviceID, char n);
-PciStructPtr findPciClass(CARD8 intf, CARD8 subClass, CARD16 class, char n);
-
-extern CARD8 PciRead8(int offset, CARD32 slot);
-extern CARD16 PciRead16(int offset, CARD32 slot);
-extern CARD32 PciRead32(int offset, CARD32 slot);
-
-extern void PciWrite8(int offset,CARD8 byte, CARD32 slot);
-extern void PciWrite16(int offset,CARD16 word, CARD32 slot);
-extern void PciWrite32(int offset,CARD32 lg, CARD32 slot);
-
-extern void scan_pci(void);
-extern void pciVideoDisable(void);
-extern void pciVideoRestore(void);
-extern void EnableCurrent(void);
-extern int mapPciRom(PciStructPtr pciP);
-extern int cfg1out(CARD16 addr, CARD32 val);
-extern int cfg1in(CARD16 addr, CARD32 *val);
-extern void list_pci(void);
-extern PciStructPtr findPciByIDs(int bus, int dev, int func);
-
-#define PCI_MODE2_ENABLE_REG 0xCF8
-#define PCI_MODE2_FORWARD_REG 0xCFA
-#define PCI_MODE1_ADDRESS_REG 0xCF8
-#define PCI_MODE1_DATA_REG 0xCFC
-#if defined(__alpha__) || defined(__sparc__)
-#define PCI_EN 0x00000000
-#else
-#define PCI_EN 0x80000000
-#endif
-#define MAX_DEV_PER_VENDOR_CFG1 32
-#define BRIDGE_CLASS(x) (x == 0x06)
-#define BRIDGE_PCI_CLASS(x) (x == 0x04)
-#define BRIDGE_HOST_CLASS(x) (x == 0x00)
-#define PCI_CLASS_PREHISTORIC 0x00
-#define PCI_SUBCLASS_PREHISTORIC_VGA 0x01
-#define PCI_CLASS_DISPLAY 0x03
-#define PCI_SUBCLASS_DISPLAY_VGA 0x00
-#define PCI_SUBCLASS_DISPLAY_XGA 0x01
-#define PCI_SUBCLASS_DISPLAY_MISC 0x80
-#define VIDEO_CLASS(b,s) \
- (((b) == PCI_CLASS_PREHISTORIC && (s) == PCI_SUBCLASS_PREHISTORIC_VGA) || \
- ((b) == PCI_CLASS_DISPLAY && (s) == PCI_SUBCLASS_DISPLAY_VGA) ||\
- ((b) == PCI_CLASS_DISPLAY && (s) == PCI_SUBCLASS_DISPLAY_XGA) ||\
- ((b) == PCI_CLASS_DISPLAY && (s) == PCI_SUBCLASS_DISPLAY_MISC))
-#define PCI_MULTIFUNC_DEV 0x80
-#define MAX_PCI_DEVICES 64
-#define PCI_MAXBUS 16
-#define PCI_IS_MEM 0x00000001
-#define MAX_PCI_ROM_SIZE (1024 * 1024 * 16)
-
-#define IS_MEM32(x) ((x & 0x7) == 0 && x != 0)
-#define IS_MEM64(x) ((x & 0x7) == 0x4)
-#endif
diff --git a/board/MAI/bios_emulator/scitech/src/v86bios/v86.c b/board/MAI/bios_emulator/scitech/src/v86bios/v86.c
deleted file mode 100644
index 4deed044cb..0000000000
--- a/board/MAI/bios_emulator/scitech/src/v86bios/v86.c
+++ /dev/null
@@ -1,562 +0,0 @@
-/*
- * Copyright 1999 Egbert Eich
- *
- * Permission to use, copy, modify, distribute, and sell this software and its
- * documentation for any purpose is hereby granted without fee, provided that
- * the above copyright notice appear in all copies and that both that
- * copyright notice and this permission notice appear in supporting
- * documentation, and that the name of the authors not be used in
- * advertising or publicity pertaining to distribution of the software without
- * specific, written prior permission. The authors makes no representations
- * about the suitability of this software for any purpose. It is provided
- * "as is" without express or implied warranty.
- *
- * THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
- * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
- * EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
- * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
- * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
- * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
- * PERFORMANCE OF THIS SOFTWARE.
- */
-
-#include "debug.h"
-#include <sys/vm86.h>
-#include <unistd.h>
-#include <errno.h>
-#include <asm/unistd.h>
-#include <stdio.h>
-#include <string.h>
-#include <signal.h>
-#include <setjmp.h>
-#include "v86bios.h"
-#include "AsmMacros.h"
-
-struct vm86_struct vm86s;
-
-static int vm86_GP_fault(void);
-static int vm86_do_int(int num);
-static void dump_code(void);
-static void dump_registers(void);
-static void stack_trace(void);
-static int vm86_rep(struct vm86_struct *ptr);
-
-#define CPU_REG(x) (vm86s.regs.##x)
-#define CPU_REG_LW(reg) (*((CARD16 *)&CPU_REG(reg)))
-#define CPU_REG_HW(reg) (*((CARD16 *)&CPU_REG(reg) + 1))
-#define CPU_REG_LB(reg) (*(CARD8 *)&CPU_REG(e##reg))
-#define SEG_ADR(type, seg, reg) type((CPU_REG_LW(seg) << 4) \
- + CPU_REG_LW(e##reg))
-#define DF (1 << 10)
-
-struct pio P;
-
-
-void
-setup_io(void)
-{
- if (!Config.PrintPort && !Config.IoStatistics) {
- P.inb = (CARD8(*)(CARD16))inb;
- P.inw = (CARD16(*)(CARD16))inw;
- P.inl = (CARD32(*)(CARD16))inl;
- P.outb = (void(*)(CARD16,CARD8))outb;
- P.outw = (void(*)(CARD16,CARD16))outw;
- P.outl = (void(*)(CARD16,CARD32))outl;
- } else {
- P.inb = p_inb;
- P.inw = p_inw;
- P.inl = p_inl;
- P.outb = p_outb;
- P.outw = p_outw;
- P.outl = p_outl;
- }
-}
-
-
-static void
-setup_vm86(unsigned long bios_start, i86biosRegsPtr regs)
-{
- CARD32 eip;
- CARD16 cs;
-
- vm86s.flags = VM86_SCREEN_BITMAP;
- vm86s.flags = 0;
- vm86s.screen_bitmap = 0;
- vm86s.cpu_type = CPU_586;
- memset(&vm86s.int_revectored, 0xff,sizeof(vm86s.int_revectored)) ;
- memset(&vm86s.int21_revectored, 0xff,sizeof(vm86s.int21_revectored)) ;
-
- eip = bios_start & 0xFFFF;
- cs = (bios_start & 0xFF0000) >> 4;
-
- CPU_REG(eax) = regs->ax;
- CPU_REG(ebx) = regs->bx;
- CPU_REG(ecx) = regs->cx;
- CPU_REG(edx) = regs->dx;
- CPU_REG(esi) = 0;
- CPU_REG(edi) = regs->di;
- CPU_REG(ebp) = 0;
- CPU_REG(eip) = eip;
- CPU_REG(cs) = cs;
- CPU_REG(esp) = 0x100;
- CPU_REG(ss) = 0x30; /* This is the standard pc bios stack */
- CPU_REG(es) = regs->es;
- CPU_REG(ds) = 0x40; /* standard pc ds */
- CPU_REG(fs) = 0;
- CPU_REG(gs) = 0;
- CPU_REG(eflags) |= (VIF_MASK | VIP_MASK);
-}
-
-void
-collect_bios_regs(i86biosRegsPtr regs)
-{
- regs->ax = CPU_REG(eax);
- regs->bx = CPU_REG(ebx);
- regs->cx = CPU_REG(ecx);
- regs->dx = CPU_REG(edx);
- regs->es = CPU_REG(es);
- regs->ds = CPU_REG(ds);
- regs->di = CPU_REG(edi);
- regs->si = CPU_REG(esi);
-}
-
-static int
-do_vm86(void)
-{
- int retval;
-
-#ifdef V86BIOS_DEBUG
- dump_registers();
-#endif
-/* retval = SYS_vm86old(&vm86s); */
-/* retval = syscall(SYS_vm86old,&vm86s); */
-
- retval = vm86_rep(&vm86s);
-
- switch (VM86_TYPE(retval)) {
- case VM86_UNKNOWN:
- if (!vm86_GP_fault()) return 0;
- break;
- case VM86_STI:
- fprintf(stderr,"vm86_sti :-((\n");
- stack_trace();
- dump_code();
- return 0;
- case VM86_INTx:
- if (!vm86_do_int(VM86_ARG(retval))) {
- fprintf(stderr,"\nUnknown vm86_int: %X\n\n",VM86_ARG(retval));
- dump_registers();
- return 0;
- }
- /* I'm not sure yet what to do if we can handle ints */
- break;
- case VM86_SIGNAL:
- fprintf(stderr,"received signal\n");
- return 0;
- default:
- fprintf(stderr,"unknown type(0x%x)=0x%x\n",
- VM86_ARG(retval),VM86_TYPE(retval));
- dump_registers();
- dump_code();
- stack_trace();
- return 0;
- }
-
- return 1;
-}
-
-static jmp_buf x86_esc;
-static void
-vmexit(int unused)
-{
- longjmp(x86_esc,1);
-}
-
-void
-do_x86(unsigned long bios_start, i86biosRegsPtr regs)
-{
- static void (*org_handler)(int);
-
- setup_vm86(bios_start, regs);
- if (setjmp(x86_esc) == 0) {
- org_handler = signal(2,vmexit);
- while(do_vm86()) {};
- signal(2,org_handler);
- collect_bios_regs(regs);
- } else {
- signal(2,org_handler);
- printf("interrupted at 0x%x\n",((CARD16)CPU_REG(cs)) << 4
- | (CARD16)CPU_REG(eip));
- }
-}
-
-/* get the linear address */
-#define LIN_PREF_SI ((pref_seg << 4) + CPU_REG_LW(esi))
-
-#define LWECX (prefix66 ^ prefix67 ? CPU_REG(ecx) : CPU_REG_LW(ecx))
-
-static int
-vm86_GP_fault(void)
-{
- unsigned char *csp, *lina;
- CARD32 org_eip;
- int pref_seg;
- int done,is_rep,prefix66,prefix67;
-
-
- csp = lina = SEG_ADR((unsigned char *), cs, ip);
-#ifdef V86BIOS_DEBUG
- printf("exception: \n");
- dump_code();
-#endif
-
- is_rep = 0;
- prefix66 = prefix67 = 0;
- pref_seg = -1;
-
- /* eat up prefixes */
- done = 0;
- do {
- switch (*(csp++)) {
- case 0x66: /* operand prefix */ prefix66=1; break;
- case 0x67: /* address prefix */ prefix67=1; break;
- case 0x2e: /* CS */ pref_seg=CPU_REG(cs); break;
- case 0x3e: /* DS */ pref_seg=CPU_REG(ds); break;
- case 0x26: /* ES */ pref_seg=CPU_REG(es); break;
- case 0x36: /* SS */ pref_seg=CPU_REG(ss); break;
- case 0x65: /* GS */ pref_seg=CPU_REG(gs); break;
- case 0x64: /* FS */ pref_seg=CPU_REG(fs); break;
- case 0xf2: /* repnz */
- case 0xf3: /* rep */ is_rep=1; break;
- default: done=1;
- }
- } while (!done);
- csp--; /* oops one too many */
- org_eip = CPU_REG(eip);
- CPU_REG_LW(eip) += (csp - lina);
-
- switch (*csp) {
-
- case 0x6c: /* insb */
- /* NOTE: ES can't be overwritten; prefixes 66,67 should use esi,edi,ecx
- * but is anyone using extended regs in real mode? */
- /* WARNING: no test for DI wrapping! */
- CPU_REG_LW(edi) += port_rep_inb(CPU_REG_LW(edx),
- SEG_ADR((CARD8 *),es,di),
- CPU_REG_LW(eflags)&DF,
- (is_rep? LWECX:1));
- if (is_rep) LWECX = 0;
- CPU_REG_LW(eip)++;
- break;
-
- case 0x6d: /* (rep) insw / insd */
- /* NOTE: ES can't be overwritten */
- /* WARNING: no test for _DI wrapping! */
- if (prefix66) {
- CPU_REG_LW(edi) += port_rep_inl(CPU_REG_LW(edx),
- SEG_ADR((CARD32 *),es,di),
- CPU_REG_LW(eflags)&DF,
- (is_rep? LWECX:1));
- }
- else {
- CPU_REG_LW(edi) += port_rep_inw(CPU_REG_LW(edx),
- SEG_ADR((CARD16 *),es,di),
- CPU_REG_LW(eflags)&DF,
- (is_rep? LWECX:1));
- }
- if (is_rep) LWECX = 0;
- CPU_REG_LW(eip)++;
- break;
-
- case 0x6e: /* (rep) outsb */
- if (pref_seg < 0) pref_seg = CPU_REG_LW(ds);
- /* WARNING: no test for _SI wrapping! */
- CPU_REG_LW(esi) += port_rep_outb(CPU_REG_LW(edx),(CARD8*)LIN_PREF_SI,
- CPU_REG_LW(eflags)&DF,
- (is_rep? LWECX:1));
- if (is_rep) LWECX = 0;
- CPU_REG_LW(eip)++;
- break;
-
- case 0x6f: /* (rep) outsw / outsd */
- if (pref_seg < 0) pref_seg = CPU_REG_LW(ds);
- /* WARNING: no test for _SI wrapping! */
- if (prefix66) {
- CPU_REG_LW(esi) += port_rep_outl(CPU_REG_LW(edx),
- (CARD32 *)LIN_PREF_SI,
- CPU_REG_LW(eflags)&DF,
- (is_rep? LWECX:1));
- }
- else {
- CPU_REG_LW(esi) += port_rep_outw(CPU_REG_LW(edx),
- (CARD16 *)LIN_PREF_SI,
- CPU_REG_LW(eflags)&DF,
- (is_rep? LWECX:1));
- }
- if (is_rep) LWECX = 0;
- CPU_REG_LW(eip)++;
- break;
-
- case 0xe5: /* inw xx, inl xx */
- if (prefix66) CPU_REG(eax) = P.inl((int) csp[1]);
- else CPU_REG_LW(eax) = P.inw((int) csp[1]);
- CPU_REG_LW(eip) += 2;
- break;
- case 0xe4: /* inb xx */
- CPU_REG_LW(eax) &= ~(CARD32)0xff;
- CPU_REG_LB(ax) |= P.inb((int) csp[1]);
- CPU_REG_LW(eip) += 2;
- break;
- case 0xed: /* inw dx, inl dx */
- if (prefix66) CPU_REG(eax) = P.inl(CPU_REG_LW(edx));
- else CPU_REG_LW(eax) = P.inw(CPU_REG_LW(edx));
- CPU_REG_LW(eip) += 1;
- break;
- case 0xec: /* inb dx */
- CPU_REG_LW(eax) &= ~(CARD32)0xff;
- CPU_REG_LB(ax) |= P.inb(CPU_REG_LW(edx));
- CPU_REG_LW(eip) += 1;
- break;
-
- case 0xe7: /* outw xx */
- if (prefix66) P.outl((int)csp[1], CPU_REG(eax));
- else P.outw((int)csp[1], CPU_REG_LW(eax));
- CPU_REG_LW(eip) += 2;
- break;
- case 0xe6: /* outb xx */
- P.outb((int) csp[1], CPU_REG_LB(ax));
- CPU_REG_LW(eip) += 2;
- break;
- case 0xef: /* outw dx */
- if (prefix66) P.outl(CPU_REG_LW(edx), CPU_REG(eax));
- else P.outw(CPU_REG_LW(edx), CPU_REG_LW(eax));
- CPU_REG_LW(eip) += 1;
- break;
- case 0xee: /* outb dx */
- P.outb(CPU_REG_LW(edx), CPU_REG_LB(ax));
- CPU_REG_LW(eip) += 1;
- break;
-
- case 0xf4:
-#ifdef V86BIOS_DEBUG
- printf("hlt at %p\n", lina);
-#endif
- return 0;
-
- case 0x0f:
- fprintf(stderr,"CPU 0x0f Trap at eip=0x%lx\n",CPU_REG(eip));
- goto op0ferr;
- break;
-
- case 0xf0: /* lock */
- default:
- fprintf(stderr,"unknown reason for exception\n");
- dump_registers();
- stack_trace();
- op0ferr:
- dump_code();
- fprintf(stderr,"cannot continue\n");
- return 0;
- } /* end of switch() */
- return 1;
-}
-
-static int
-vm86_do_int(int num)
-{
- int val;
- struct regs86 regs;
-
- i_printf("int 0x%x received: ax:0x%lx",num,CPU_REG(eax));
- if (Config.PrintIp)
- i_printf(" at: 0x%x\n",getIP());
- else
- i_printf("\n");
-
- /* try to run bios interrupt */
-
- /* if not installed fall back */
-#define COPY(x) regs.##x = CPU_REG(x)
-#define COPY_R(x) CPU_REG(x) = regs.##x
-
- COPY(eax);
- COPY(ebx);
- COPY(ecx);
- COPY(edx);
- COPY(esi);
- COPY(edi);
- COPY(ebp);
- COPY(eip);
- COPY(esp);
- COPY(cs);
- COPY(ss);
- COPY(ds);
- COPY(es);
- COPY(fs);
- COPY(gs);
- COPY(eflags);
-
- if (!(val = int_handler(num,&regs)))
- if (!(val = run_bios_int(num,&regs)))
- return val;
-
- COPY_R(eax);
- COPY_R(ebx);
- COPY_R(ecx);
- COPY_R(edx);
- COPY_R(esi);
- COPY_R(edi);
- COPY_R(ebp);
- COPY_R(eip);
- COPY_R(esp);
- COPY_R(cs);
- COPY_R(ss);
- COPY_R(ds);
- COPY_R(es);
- COPY_R(fs);
- COPY_R(gs);
- COPY_R(eflags);
-
- return val;
-#undef COPY
-#undef COPY_R
-}
-
-static void
-dump_code(void)
-{
- int i;
- unsigned char *lina = SEG_ADR((unsigned char *), cs, ip);
-
- fprintf(stderr,"code at 0x%8.8x: ",(CARD32)lina);
- for (i=0; i<0x10; i++)
- fprintf(stderr,"%2.2x ",*(lina + i));
- fprintf(stderr,"\n ");
- for (; i<0x20; i++)
- fprintf(stderr,"%2.2x ",*(lina + i));
- fprintf(stderr,"\n");
-}
-
-#define PRINT(x) fprintf(stderr,#x":%4.4x ",CPU_REG_LW(x))
-#define PRINT_FLAGS(x) fprintf(stderr,#x":%8.8x ",CPU_REG_LW(x))
-static void
-dump_registers(void)
-{
- PRINT(eip);
- PRINT(eax);
- PRINT(ebx);
- PRINT(ecx);
- PRINT(edx);
- PRINT(esi);
- PRINT(edi);
- PRINT(ebp);
- fprintf(stderr,"\n");
- PRINT(esp);
- PRINT(cs);
- PRINT(ss);
- PRINT(es);
- PRINT(ds);
- PRINT(fs);
- PRINT(gs);
- PRINT_FLAGS(eflags);
- fprintf(stderr,"\n");
-}
-
-static void
-stack_trace(void)
-{
- int i;
- unsigned char *stack = SEG_ADR((unsigned char *), ss, sp);
-
- fprintf(stderr,"stack at 0x%8.8lx:\n",(unsigned long)stack);
- for (i=0; i < 0x10; i++)
- fprintf(stderr,"%2.2x ",*(stack + i));
- fprintf(stderr,"\n");
-
-}
-
-static int
-vm86_rep(struct vm86_struct *ptr)
-{
-
- int __res;
-
- __asm__ __volatile__("int $0x80\n"
- :"=a" (__res):"a" ((int)113),
- "b" ((struct vm86_struct *)ptr));
-
- if ((__res) < 0) {
- errno = -__res;
- __res=-1;
- }
- else errno = 0;
- return __res;
-}
-
-#define pushw(base, ptr, val) \
-__asm__ __volatile__( \
- "decw %w0\n\t" \
- "movb %h2,(%1,%0)\n\t" \
- "decw %w0\n\t" \
- "movb %b2,(%1,%0)" \
- : "=r" (ptr) \
- : "r" (base), "q" (val), "0" (ptr))
-
-int
-run_bios_int(int num, struct regs86 *regs)
-{
- CARD16 *ssp;
- CARD32 sp;
- CARD32 eflags;
-
-#ifdef V86BIOS_DEBUG
- static int firsttime = 1;
-#endif
- /* check if bios vector is initialized */
- if (((CARD16*)0)[(num<<1)+1] == 0x0000) { /* SYS_BIOS_SEG ?*/
-#ifdef V86BIOS_DEBUG
- i_printf("card BIOS not loaded\n");
-#endif
- return 0;
- }
-
-#ifdef V86BIOS_DEBUG
- if (firsttime) {
- dprint(0,0x3D0);
- firsttime = 0;
- }
-#endif
-
- i_printf("calling card BIOS at: ");
- ssp = (CARD16*)(CPU_REG(ss)<<4);
- sp = (CARD32) CPU_REG_LW(esp);
-
- eflags = regs->eflags;
- eflags = ((eflags & VIF_MASK) != 0)
- ? (eflags | IF_MASK) : (eflags & ~(CARD32) IF_MASK);
- pushw(ssp, sp, eflags);
- pushw(ssp, sp, regs->cs);
- pushw(ssp, sp, (CARD16)regs->eip);
- regs->esp -= 6;
- regs->cs = ((CARD16 *) 0)[(num << 1) + 1];
- regs->eip = (regs->eip & 0xFFFF0000) | ((CARD16 *) 0)[num << 1];
- i_printf("0x%x:%lx\n",regs->cs,regs->eip);
-#ifdef V86BIOS_DEBUG
- dump_code();
-#endif
- regs->eflags = regs->eflags
- & ~(VIF_MASK | TF_MASK | IF_MASK | NT_MASK);
- return 1;
-}
-
-CARD32
-getIntVect(int num)
-{
- return ((CARD32*)0)[num];
-}
-
-CARD32
-getIP(void)
-{
- return (CPU_REG(cs) << 4) + CPU_REG(eip);
-}
diff --git a/board/MAI/bios_emulator/scitech/src/v86bios/v86bios.c b/board/MAI/bios_emulator/scitech/src/v86bios/v86bios.c
deleted file mode 100644
index 101c1f26e6..0000000000
--- a/board/MAI/bios_emulator/scitech/src/v86bios/v86bios.c
+++ /dev/null
@@ -1,933 +0,0 @@
-/*
- * Copyright 1999 Egbert Eich
- *
- * Permission to use, copy, modify, distribute, and sell this software and its
- * documentation for any purpose is hereby granted without fee, provided that
- * the above copyright notice appear in all copies and that both that
- * copyright notice and this permission notice appear in supporting
- * documentation, and that the name of the authors not be used in
- * advertising or publicity pertaining to distribution of the software without
- * specific, written prior permission. The authors makes no representations
- * about the suitability of this software for any purpose. It is provided
- * "as is" without express or implied warranty.
- *
- * THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
- * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
- * EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
- * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
- * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
- * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
- * PERFORMANCE OF THIS SOFTWARE.
- */
-#define DELETE
-#include <unistd.h>
-#include <fcntl.h>
-#include <stdio.h>
-#include <sys/mman.h>
-#include <sys/types.h>
-#include <string.h>
-#include <stdlib.h>
-#include <signal.h>
-#include <sys/stat.h>
-#include <readline/readline.h>
-#include <readline/history.h>
-#if defined(__alpha__) || defined (__ia64__)
-#include <sys/io.h>
-#elif defined(HAVE_SYS_PERM)
-#include <sys/perm.h>
-#endif
-#include "debug.h"
-#include "v86bios.h"
-#include "pci.h"
-#include "AsmMacros.h"
-
-#define SIZE 0x100000
-#define VRAM_START 0xA0000
-#define VRAM_SIZE 0x1FFFF
-#define V_BIOS_SIZE 0x1FFFF
-#define BIOS_START 0x7C00 /* default BIOS entry */
-#define BIOS_MEM 0x600
-
-/*CARD8 code[] = { 0xb8 , 0xf0 , 0xf0, 0xf4 }; */
-#define VB_X(x) (V_BIOS >> x) & 0xFF
-CARD8 code[] = { 6, 0x9a, 0x03, 0x00, 0x00, VB_X(12), 0xf4 };
-/*CARD8 code[] = { 0x9a, 0x03, 0x00, 0x00, VB_X(12), 0xb8, 0x03, 0x00, */
-/*0xcd, 0x10, 0xf4 }; */
-/*CARD8 code[] = { 0xb8 , 0xf0 , 0xf0 ,0xf4 }; */
-
-int ioperm_list[IOPERM_BITS] = {0,};
-
-static void sig_handler(int);
-static int map(void);
-static void unmap(void);
-static void bootBIOS(CARD16 ax);
-static int map_vram(void);
-static void unmap_vram(void);
-static int copy_vbios(memType v_base);
-static int copy_sys_bios(void);
-static void save_bios_to_file(void);
-static int setup_system_bios(void);
-static CARD32 setup_int_vect(void);
-#ifdef __ia32__
-static CARD32 setup_primary_int_vect(void);
-#endif
-static int chksum(CARD8 *start);
-static void setup_bios_regs(i86biosRegsPtr regs, CARD32 ax);
-static void print_regs(i86biosRegsPtr regs);
-static void print_usage(void);
-static void set_hlt(Bool set);
-static void set_ioperm(void);
-
-extern void yyparse();
-
-void loadCodeToMem(unsigned char *ptr, CARD8 *code);
-void dprint(unsigned long start, unsigned long size);
-
-static int vram_mapped = 0;
-static char* bios_var = NULL;
-static CARD8 save_msr;
-static CARD8 save_pos102;
-static CARD8 save_vse;
-static CARD8 save_46e8;
-static haltpoints hltp[20] = { {0, 0}, };
-
-console Console = {-1,-1};
-struct config Config;
-
-int main(int argc,char **argv)
-{
- int c;
-
- Config.PrintPort = PRINT_PORT;
- Config.IoStatistics = IO_STATISTICS;
- Config.PrintIrq = PRINT_IRQ;
- Config.PrintPci = PRINT_PCI;
- Config.ShowAllDev = SHOW_ALL_DEV;
- Config.PrintIp = PRINT_IP;
- Config.SaveBios = SAVE_BIOS;
- Config.Trace = TRACE;
- Config.ConfigActiveOnly = CONFIG_ACTIVE_ONLY; /* boot */
- Config.ConfigActiveDevice = CONFIG_ACTIVE_DEVICE; /* boot */
- Config.MapSysBios = MAP_SYS_BIOS;
- Config.Resort = RESORT; /* boot */
- Config.FixRom = FIX_ROM;
- Config.NoConsole = NO_CONSOLE;
- Config.BootOnly = FALSE;
- Config.Verbose = VERBOSE;
-
- opterr = 0;
- while ((c = getopt(argc,argv,"psicaPStAdbrfnv:?")) != EOF) {
- switch(c) {
- case 'p':
- Config.PrintPort = TRUE;
- break;
- case 's':
- Config.IoStatistics = TRUE;
- break;
- case 'i':
- Config.PrintIrq = TRUE;
- break;
- case 'c':
- Config.PrintPci = TRUE;
- break;
- case 'a':
- Config.ShowAllDev = TRUE;
- break;
- case 'P':
- Config.PrintIp = TRUE;
- break;
- case 'S':
- Config.SaveBios = TRUE;
- break;
- case 't':
- Config.Trace = TRUE;
- break;
- case 'A':
- Config.ConfigActiveOnly = TRUE;
- break;
- case 'd':
- Config.ConfigActiveDevice = TRUE;
- break;
- case 'b':
- Config.MapSysBios = TRUE;
- break;
- case 'r':
- Config.Resort = TRUE;
- break;
- case 'f':
- Config.FixRom = TRUE;
- break;
- case 'n':
- Config.NoConsole = TRUE;
- break;
- case 'v':
- Config.Verbose = strtol(optarg,NULL,0);
- break;
- case '?':
- print_usage();
- break;
- default:
- break;
- }
- }
-
-
- if (!map())
- exit(1);
-
- if (!setup_system_bios())
- exit(1);
-
- iopl(3);
-
- scan_pci();
-
- save_msr = inb(0x3CC);
- save_vse = inb(0x3C3);
- save_46e8 = inb(0x46e8);
- save_pos102 = inb(0x102);
-
- if (Config.BootOnly) {
-
- if (!CurrentPci && !Config.ConfigActiveDevice
- && !Config.ConfigActiveOnly) {
- iopl(0);
- unmap();
- exit (1);
- }
- call_boot(NULL);
- } else {
- using_history();
- yyparse();
- }
-
- unmap();
-
- pciVideoRestore();
-
- outb(0x102, save_pos102);
- outb(0x46e8, save_46e8);
- outb(0x3C3, save_vse);
- outb(0x3C2, save_msr);
-
- iopl(0);
-
- close_console(Console);
-
- exit(0);
-}
-
-
-void
-call_boot(struct device *dev)
-{
- int Active_is_Pci = 0;
- CARD32 vbios_base;
-
- CurrentPci = PciList;
- Console = open_console();
-
- set_ioperm();
-
-
- signal(2,sig_handler);
- signal(11,sig_handler);
-
- /* disable primary card */
- pciVideoRestore(); /* reset PCI state to see primary card */
- outb(0x3C2,~(CARD8)0x03 & save_msr);
- outb(0x3C3,~(CARD8)0x01 & save_vse);
- outb(0x46e8, ~(CARD8)0x08 & save_46e8);
- outb(0x102, ~(CARD8)0x01 & save_pos102);
-
- pciVideoDisable();
-
- while (CurrentPci) {
- CARD16 ax;
-
- if (CurrentPci->active) {
- Active_is_Pci = 1;
- if (!Config.ConfigActiveDevice && !dev) {
- CurrentPci = CurrentPci->next;
- continue;
- }
- } else if (Config.ConfigActiveOnly && !dev) {
- CurrentPci = CurrentPci->next;
- continue;
- }
- if (dev && ((dev->type != PCI)
- || (dev->type == PCI
- && (dev->loc.pci.dev != CurrentPci->dev
- || dev->loc.pci.bus != CurrentPci->bus
- || dev->loc.pci.func != CurrentPci->func)))) {
- CurrentPci = CurrentPci->next;
- continue;
- }
-
- EnableCurrent();
-
- if (CurrentPci->active) {
- outb(0x102, save_pos102);
- outb(0x46e8, save_46e8);
- outb(0x3C3, save_vse);
- outb(0x3C2, save_msr);
- }
-
- /* clear interrupt vectors */
-#ifdef __ia32__
- vbios_base = CurrentPci->active ? setup_primary_int_vect()
- : setup_int_vect();
-#else
- vbios_base = setup_int_vect();
-#endif
- ax = ((CARD16)(CurrentPci->bus) << 8)
- | (CurrentPci->dev << 3) | (CurrentPci->func & 0x7);
- if (Config.Verbose > 1) P_printf("ax: 0x%x\n",ax);
-
- BootBios = findPciByIDs(CurrentPci->bus,CurrentPci->dev,
- CurrentPci->func);
- if (!((mapPciRom(BootBios) && chksum((CARD8*)V_BIOS))
- || (CurrentPci->active && copy_vbios(vbios_base)))) {
- CurrentPci = CurrentPci->next;
- continue;
- }
- if (!map_vram()) {
- CurrentPci = CurrentPci->next;
- continue;
- }
- if (Config.SaveBios) save_bios_to_file();
- printf("initializing PCI bus: %i dev: %i func: %i\n",CurrentPci->bus,
- CurrentPci->dev,CurrentPci->func);
- bootBIOS(ax);
- unmap_vram();
-
- if (CurrentPci->active)
- close_console(Console);
-
- if (dev) return;
-
- CurrentPci = CurrentPci->next;
- }
-
- /* We have an ISA device - configure if requested */
- if (!Active_is_Pci /* no isa card in system! */
- && ((!dev && (Config.ConfigActiveDevice || Config.ConfigActiveOnly))
- || (dev && dev->type == ISA))) {
-
- pciVideoDisable();
-
- if (!dev || dev->type == ISA) {
- outb(0x102, save_pos102);
- outb(0x46e8, save_46e8);
- outb(0x3C3, save_vse);
- outb(0x3C2, save_msr);
-
-#ifdef __ia32__
- vbios_base = setup_primary_int_vect();
-#else
- vbios_base = setup_int_vect();
-#endif
- if (copy_vbios(vbios_base)) {
-
- if (Config.SaveBios) save_bios_to_file();
- if (map_vram()) {
- printf("initializing ISA bus\n");
- bootBIOS(0);
- }
- }
-
- unmap_vram();
- sleep(1);
- close_console(Console);
- }
- }
-
-
-}
-
-int
-map(void)
-{
- void* mem;
- mem = mmap(0, (size_t)SIZE,
- PROT_EXEC | PROT_READ | PROT_WRITE,
- MAP_FIXED | MAP_PRIVATE | MAP_ANON,
- -1, 0 );
- if (mem != 0) {
- perror("anonymous map");
- return (0);
- }
- memset(mem,0,SIZE);
-
- return (1);
-}
-
-static void
-unmap(void)
-{
- munmap(0,SIZE);
-}
-
-static void
-bootBIOS(CARD16 ax)
-{
- i86biosRegs bRegs;
-#ifdef V86BIOS_DEBUG
- printf("starting BIOS\n");
-#endif
- setup_io();
- setup_bios_regs(&bRegs, ax);
- loadCodeToMem((unsigned char *) BIOS_START, code);
- do_x86(BIOS_START,&bRegs);
-#ifdef V86BIOS_DEBUG
- printf("done\n");
-#endif
-}
-
-static int
-map_vram(void)
-{
- int mem_fd;
-
-#ifdef __ia64__
- if ((mem_fd = open(MEM_FILE,O_RDWR | O_SYNC))<0)
-#else
- if ((mem_fd = open(MEM_FILE,O_RDWR))<0)
-#endif
- {
- perror("opening memory");
- return 0;
- }
-
-#ifdef __alpha__
- if (!_bus_base()) sparse_shift = 7; /* Uh, oh, JENSEN... */
- if (!_bus_base_sparse()) sparse_shift = 0;
- if ((vram_map = mmap(0,(size_t) (VRAM_SIZE << sparse_shift),
- PROT_READ | PROT_WRITE,
- MAP_SHARED,
- mem_fd, (VRAM_START << sparse_shift)
- | _bus_base_sparse())) == (void *) -1)
-#else
- if (mmap((void *) VRAM_START, (size_t) VRAM_SIZE,
- PROT_EXEC | PROT_READ | PROT_WRITE, MAP_SHARED | MAP_FIXED,
- mem_fd, VRAM_START) == (void *) -1)
-#endif
- {
- perror("mmap error in map_hardware_ram (1)");
- close(mem_fd);
- return (0);
- }
- vram_mapped = 1;
- close(mem_fd);
- return (1);
-}
-
-static void
-unmap_vram(void)
-{
- if (!vram_mapped) return;
-
- munmap((void*)VRAM_START,VRAM_SIZE);
- vram_mapped = 0;
-}
-
-static int
-copy_vbios(memType v_base)
-{
- int mem_fd;
- unsigned char *tmp;
- int size;
-
- if ((mem_fd = open(MEM_FILE,O_RDONLY))<0) {
- perror("opening memory");
- return (0);
- }
-
- if (lseek(mem_fd,(off_t) v_base, SEEK_SET) != (off_t) v_base) {
- fprintf(stderr,"Cannot lseek\n");
- goto Error;
- }
- tmp = (unsigned char *)malloc(3);
- if (read(mem_fd, (char *)tmp, (size_t) 3) != (size_t) 3) {
- fprintf(stderr,"Cannot read\n");
- goto Error;
- }
- if (lseek(mem_fd,(off_t) v_base,SEEK_SET) != (off_t) v_base)
- goto Error;
-
- if (*tmp != 0x55 || *(tmp+1) != 0xAA ) {
- fprintf(stderr,"No bios found at: 0x%lx\n",v_base);
- goto Error;
- }
-#ifdef DEBUG
- dprint((unsigned long)tmp,0x100);
-#endif
- size = *(tmp+2) * 512;
-
- if (read(mem_fd, (char *)v_base, (size_t) size) != (size_t) size) {
- fprintf(stderr,"Cannot read\n");
- goto Error;
- }
- free(tmp);
- close(mem_fd);
- if (!chksum((CARD8*)v_base))
- return (0);
-
- return (1);
-
-Error:
- perror("v_bios");
- close(mem_fd);
- return (0);
-}
-
-static int
-copy_sys_bios(void)
-{
-#define SYS_BIOS 0xF0000
- int mem_fd;
-
- if ((mem_fd = open(MEM_FILE,O_RDONLY))<0) {
- perror("opening memory");
- return (0);
- }
-
- if (lseek(mem_fd,(off_t) SYS_BIOS,SEEK_SET) != (off_t) SYS_BIOS)
- goto Error;
- if (read(mem_fd, (char *)SYS_BIOS, (size_t) 0xFFFF) != (size_t) 0xFFFF)
- goto Error;
-
- close(mem_fd);
- return (1);
-
-Error:
- perror("sys_bios");
- close(mem_fd);
- return (0);
-}
-
-void
-loadCodeToMem(unsigned char *ptr, CARD8 code[])
-{
- int i;
- CARD8 val;
- int size = code[0];
-
- for ( i=1;i<=size;i++) {
- val = code[i];
- *ptr++ = val;
- }
- return;
-}
-
-void
-dprint(unsigned long start, unsigned long size)
-{
- int i,j;
- char *c = (char *)start;
-
- for (j = 0; j < (size >> 4); j++) {
- char *d = c;
- printf("\n0x%lx: ",(unsigned long)c);
- for (i = 0; i<16; i++)
- printf("%2.2x ",(unsigned char) (*(c++)));
- c = d;
- for (i = 0; i<16; i++) {
- printf("%c",((((CARD8)(*c)) > 32) && (((CARD8)(*c)) < 128)) ?
- (unsigned char) (*(c)): '.');
- c++;
- }
- }
- printf("\n");
-}
-
-static void
-save_bios_to_file(void)
-{
- static int num = 0;
- int size, count;
- char file_name[256];
- int fd;
-
- sprintf(file_name,"bios_%i.fil",num);
- if ((fd = open(file_name,O_WRONLY | O_CREAT | O_TRUNC,00644)) == -1)
- return;
- size = (*(unsigned char*)(V_BIOS + 2)) * 512;
-#ifdef V86BIOS_DEBUG
- dprint(V_BIOS,20);
-#endif
- if ((count = write(fd,(void *)(V_BIOS),size)) != size)
- fprintf(stderr,"only saved %i of %i bytes\n",size,count);
- num++;
-}
-
-static void
-sig_handler(int unused)
-{
- fflush(stdout);
- fflush(stderr);
-
- /* put system back in a save state */
- unmap_vram();
- pciVideoRestore();
- outb(0x102, save_pos102);
- outb(0x46e8, save_46e8);
- outb(0x3C3, save_vse);
- outb(0x3C2, save_msr);
-
- close_console(Console);
- iopl(0);
- unmap();
-
- exit(1);
-}
-
-/*
- * For initialization we just pass ax to the BIOS.
- * PCI BIOSes need this. All other register are set 0.
- */
-static void setup_bios_regs(i86biosRegsPtr regs, CARD32 ax)
-{
- regs->ax = ax;
- regs->bx = 0;
- regs->cx = 0;
- regs->dx = 0;
- regs->es = 0;
- regs->ds = 0x40; /* standard pc ds */
- regs->si = 0;
- regs->di = 0;
-}
-
-/*
- * here we are really paranoid about faking a "real"
- * BIOS. Most of this information was pulled from
- * dosem.
- */
-
-#ifdef __ia32__
-static CARD32
-setup_primary_int_vect(void)
-{
- int mem_fd;
- CARD32 vbase;
- void *map;
-
- if ((mem_fd = open(MEM_FILE,O_RDWR))<0)
- {
- perror("opening memory");
- return (0);
- }
-
- if ((map = mmap((void *) 0, (size_t) 0x2000,
- PROT_EXEC | PROT_READ | PROT_WRITE, MAP_SHARED,
- mem_fd, 0)) == (void *)-1) {
- perror("mmap error in map_hardware_ram (2)");
- close(mem_fd);
- return (0);
- }
-
- close(mem_fd);
- memcpy(0,map,BIOS_MEM);
- munmap(map,0x2000);
- /*
- * create a backup copy of the bios variables to write back the
- * modified values
- */
- if (!bios_var)
- bios_var = (char *)malloc(BIOS_MEM);
- memcpy(bios_var,0,BIOS_MEM);
-
- vbase = (*((CARD16*)(0x10 << 2) + 1)) << 4;
- if (Config.Verbose > 0) printf("vbase: 0x%x\n",vbase);
- return vbase;
-}
-#endif
-
-static CARD32
-setup_int_vect(void)
-{
- const CARD16 cs = 0x0;
- const CARD16 ip = 0x0;
- int i;
-
- /* let the int vects point to the SYS_BIOS seg */
- for (i=0; i<0x80; i++) {
- ((CARD16*)0)[i<<1] = ip;
- ((CARD16*)0)[(i<<1)+1] = cs;
- }
- /* video interrupts default location */
- ((CARD16*)0)[(0x42<<1)+1] = 0xf000;
- ((CARD16*)0)[0x42<<1] = 0xf065;
- ((CARD16*)0)[(0x10<<1)+1] = 0xf000;
- ((CARD16*)0)[0x10<<1] = 0xf065;
- /* video param table default location (int 1d) */
- ((CARD16*)0)[(0x1d<<1)+1] = 0xf000;
- ((CARD16*)0)[0x1d<<1] = 0xf0A4;
- /* font tables default location (int 1F) */
- ((CARD16*)0)[(0x1f<<1)+1] = 0xf000;
- ((CARD16*)0)[0x1f<<1] = 0xfa6e;
-
- /* int 11 default location */
- ((CARD16*)0)[(0x11<<1)+1] = 0xf000;
- ((CARD16*)0)[0x11<<1] = 0xf84d;
- /* int 12 default location */
- ((CARD16*)0)[(0x12<<1)+1] = 0xf000;
- ((CARD16*)0)[0x12<<1] = 0xf841;
- /* int 15 default location */
- ((CARD16*)0)[(0x15<<1)+1] = 0xf000;
- ((CARD16*)0)[0x15<<1] = 0xf859;
- /* int 1A default location */
- ((CARD16*)0)[(0x1a<<1)+1] = 0xf000;
- ((CARD16*)0)[0x1a<<1] = 0xff6e;
- /* int 05 default location */
- ((CARD16*)0)[(0x05<<1)+1] = 0xf000;
- ((CARD16*)0)[0x05<<1] = 0xff54;
- /* int 08 default location */
- ((CARD16*)0)[(0x8<<1)+1] = 0xf000;
- ((CARD16*)0)[0x8<<1] = 0xfea5;
- /* int 13 default location (fdd) */
- ((CARD16*)0)[(0x13<<1)+1] = 0xf000;
- ((CARD16*)0)[0x13<<1] = 0xec59;
- /* int 0E default location */
- ((CARD16*)0)[(0xe<<1)+1] = 0xf000;
- ((CARD16*)0)[0xe<<1] = 0xef57;
- /* int 17 default location */
- ((CARD16*)0)[(0x17<<1)+1] = 0xf000;
- ((CARD16*)0)[0x17<<1] = 0xefd2;
- /* fdd table default location (int 1e) */
- ((CARD16*)0)[(0x1e<<1)+1] = 0xf000;
- ((CARD16*)0)[0x1e<<1] = 0xefc7;
- return V_BIOS;
-}
-
-static int
-setup_system_bios(void)
-{
- char *date = "06/01/99";
- char *eisa_ident = "PCI/ISA";
-
- if (Config.MapSysBios) {
-
- if (!copy_sys_bios()) return 0;
- return 1;
-
- } else {
-
-/* memset((void *)0xF0000,0xf4,0xfff7); */
-
- /*
- * we trap the "industry standard entry points" to the BIOS
- * and all other locations by filling them with "hlt"
- * TODO: implement hlt-handler for these
- */
- memset((void *)0xF0000,0xf4,0x10000);
-
- /*
- * TODO: we should copy the fdd table (0xfec59-0xfec5b)
- * the video parameter table (0xf0ac-0xf0fb)
- * and the font tables (0xfa6e-0xfe6d)
- * from the original bios here
- */
-
- /* set bios date */
- strcpy((char *)0xFFFF5,date);
- /* set up eisa ident string */
- strcpy((char *)0xFFFD9,eisa_ident);
- /* write system model id for IBM-AT */
- ((char *)0)[0xFFFFE] = 0xfc;
-
- return 1;
- }
-
-}
-
-static void
-update_bios_vars(void)
-{
- int mem_fd;
- void *map;
- memType i;
-
-#ifdef __ia64__
- if ((mem_fd = open(MEM_FILE,O_RDWR | O_SYNC))<0)
-#else
- if ((mem_fd = open(MEM_FILE,O_RDWR))<0)
-#endif
- {
- perror("opening memory");
- return;
- }
-
- if ((map = mmap((void *) 0, (size_t) 0x2000,
- PROT_EXEC | PROT_READ | PROT_WRITE, MAP_SHARED,
- mem_fd, 0)) == (void *)-1) {
- perror("mmap error in map_hardware_ram (3)");
- close(mem_fd);
- return;
- }
-
- for (i = 0; i < BIOS_MEM; i++) {
- if (bios_var[i] != *(CARD8*)i)
- *((CARD8*)map + i) = *(CARD8*)i;
- }
-
- munmap(map,0x2000);
- close(mem_fd);
-}
-
-static int
-chksum(CARD8 *start)
-{
- CARD16 size;
- CARD8 val = 0;
- int i;
-
- size = *(start+2) * 512;
- for (i = 0; i<size; i++)
- val += *(start + i);
-
- if (!val)
- return 1;
-
- fprintf(stderr,"BIOS cksum wrong!\n");
- return 0;
-}
-
-void
-runINT(int num, i86biosRegsPtr Regs)
-{
- Bool isVideo = FALSE;
- CARD8 code_int[] = { 3, 0xcd, 0x00, 0xf4 };
-
- code_int[2] = (CARD8) num;
-
- if (num == 0x10)
- isVideo = TRUE;
-
- if (!setup_system_bios())
- return;
-
- if ((isVideo && (!CurrentPci || CurrentPci->active)) || !isVideo) {
- CARD32 vbios_base;
-
-#ifdef __ia32__
- if (!(vbios_base = setup_primary_int_vect()))
-#else
- if (!(vbios_base = setup_int_vect()))
-#endif
- return;
- if (!copy_vbios(vbios_base))
- return;
- }
-
- if (!map_vram())
- return;
-
-#ifdef V86BIOS_DEBUG
- printf("starting BIOS\n");
-#endif
- loadCodeToMem((unsigned char *) BIOS_START, code_int);
- setup_io();
- print_regs(Regs);
- set_ioperm();
- set_hlt(TRUE);
- do_x86(BIOS_START,Regs);
- set_hlt(FALSE);
- print_regs(Regs);
-
-#ifdef V86BIOS_DEBUG
- printf("done\n");
-#endif
-
- if ((isVideo && (!CurrentPci || CurrentPci->active)) || !isVideo)
- update_bios_vars();
-}
-
-static void
-print_regs(i86biosRegsPtr regs)
-{
- printf("ax=%x bx=%x cx=%x dx=%x ds=%x es=%x di=%x si=%x\n",
- (CARD16)regs->ax,(CARD16)regs->bx,(CARD16)regs->cx,(CARD16)regs->dx,
- (CARD16)regs->ds,(CARD16)regs->es,(CARD16)regs->di,
- (CARD16)regs->si);
-}
-
-static void
-print_usage(void)
-{
-}
-
-void
-add_hlt(unsigned long val)
-{
- int i;
-
- if (val < BIOS_MEM || (val > VRAM_START && val < (VRAM_START + VRAM_SIZE))
- || val >= SIZE) {
- printf("address out of range\n");
- return;
- }
-
- for (i=0; i<20; i++) {
- if (hltp[i].address == 0) {
- hltp[i].address = (void*)val;
- break;
- }
- }
- if (i == 20) printf("no more hltpoints available\n");
-}
-
-void
-del_hlt(int val)
-{
- if (val == 21) { /* delete all */
- int i;
- printf("clearing all hltpoints\n");
- for (i=0; i <20; i++)
- hltp[i].address = NULL;
- } else if (val >= 0 && val <20)
- hltp[val].address = NULL;
- else printf("hltpoint %i out of range: valid range 0-19\n",val);
-}
-
-void
-list_hlt()
-{
- int i;
- for (i=0; i<20; i++)
- if (hltp[i].address)
- printf("hltpoint[%i]: 0x%lx\n",i,(unsigned long)hltp[i].address);
-}
-
-static void
-set_hlt(Bool set)
-{
- int i;
- for (i=0; i<20; i++)
- if (hltp[i].address) {
- if (set) {
- hltp[i].orgval = *(CARD8*)hltp[i].address;
- *(CARD8*)hltp[i].address = 0xf4;
- } else
- *(CARD8*)hltp[i].address = hltp[i].orgval;
- }
-}
-
-static void
-set_ioperm(void)
-{
- int i, start;
-
- ioperm(0,IOPERM_BITS,0);
-
- for (i = 0; i < IOPERM_BITS;i++)
- if (ioperm_list[i]) {
- start = i;
- for (;i < IOPERM_BITS; i++) {
- if (!ioperm_list[i]) {
- ioperm(start,i - start, 1);
- break;
- }
- }
- }
-}
diff --git a/board/MAI/bios_emulator/scitech/src/v86bios/v86bios.h b/board/MAI/bios_emulator/scitech/src/v86bios/v86bios.h
deleted file mode 100644
index a8f3f8e649..0000000000
--- a/board/MAI/bios_emulator/scitech/src/v86bios/v86bios.h
+++ /dev/null
@@ -1,214 +0,0 @@
-/*
- * Copyright 1999 Egbert Eich
- *
- * Permission to use, copy, modify, distribute, and sell this software and its
- * documentation for any purpose is hereby granted without fee, provided that
- * the above copyright notice appear in all copies and that both that
- * copyright notice and this permission notice appear in supporting
- * documentation, and that the name of the authors not be used in
- * advertising or publicity pertaining to distribution of the software without
- * specific, written prior permission. The authors makes no representations
- * about the suitability of this software for any purpose. It is provided
- * "as is" without express or implied warranty.
- *
- * THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
- * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
- * EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
- * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
- * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
- * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
- * PERFORMANCE OF THIS SOFTWARE.
- */
-#ifndef V86_BIOS_H
-#define V86_BIOS_H
-
-#if defined (__i386__) || defined (__i486__) || defined (__i586__) || defined (__i686__) || defined (__k6__)
-# ifndef __ia32__
-# define __ia32__
-# endif
-#endif
-
-#include <stdio.h>
-
-#define p_printf(f,a...) do {if (Config.PrintPort) lprintf(f,##a);} \
- while(0)
-#define i_printf(f,a...) do {if (Config.PrintIrq) lprintf(f,##a);} \
- while(0)
-#define P_printf(f,a...) do {if (Config.PrintPci) lprintf(f,##a);} \
- while(0)
-
-typedef unsigned char CARD8;
-typedef unsigned short CARD16;
-typedef unsigned int CARD32;
-#if defined (__alpha__) || defined (__ia64__)
-typedef unsigned long memType;
-#else
-typedef unsigned int memType;
-#endif
-
-typedef int Bool;
-
-#define FALSE 0
-#define TRUE 1
-
-struct config {
- Bool PrintPort;
- Bool IoStatistics;
- Bool PrintIrq;
- Bool PrintPci;
- Bool ShowAllDev;
- Bool PrintIp;
- Bool SaveBios;
- Bool Trace;
- Bool ConfigActiveOnly;
- Bool ConfigActiveDevice;
- Bool MapSysBios;
- Bool Resort;
- Bool FixRom;
- Bool NoConsole;
- Bool BootOnly;
- int Verbose;
-};
-
-struct pio {
- CARD8 (*inb)(CARD16);
- CARD16 (*inw)(CARD16);
- CARD32 (*inl)(CARD16);
- void (*outb)(CARD16,CARD8);
- void (*outw)(CARD16,CARD16);
- void (*outl)(CARD16,CARD32);
-};
-
-struct regs86 {
- long ebx;
- long ecx;
- long edx;
- long esi;
- long edi;
- long ebp;
- long eax;
- long eip;
- long esp;
- unsigned short cs;
- unsigned short ss;
- unsigned short es;
- unsigned short ds;
- unsigned short fs;
- unsigned short gs;
- long eflags;
-};
-
-typedef struct {
- CARD32 ax;
- CARD32 bx;
- CARD32 cx;
- CARD32 dx;
- CARD32 cs;
- CARD32 es;
- CARD32 ds;
- CARD32 si;
- CARD32 di;
-} i86biosRegs, *i86biosRegsPtr;
-
-typedef struct {
- int fd;
- int vt;
-} console;
-
-typedef struct {
- void* address;
- CARD8 orgval;
-} haltpoints;
-
-enum dev_type { NONE, ISA, PCI };
-struct device {
- Bool booted;
- enum dev_type type;
- union {
- int none;
- struct pci {
- int bus;
- int dev;
- int func;
- } pci;
- } loc;
-};
-
-extern struct device Device;
-
-#ifdef __alpha__
-unsigned long _bus_base(void);
-extern void* vram_map;
-extern int sparse_shift;
-#endif
-
-extern struct pio P;
-extern struct config Config;
-#define IOPERM_BITS 1024
-extern int ioperm_list[IOPERM_BITS];
-
-extern void setup_io(void);
-extern void do_x86(unsigned long bios_start,i86biosRegsPtr regs);
-extern int run_bios_int(int num, struct regs86 *regs);
-extern CARD32 getIntVect(int num);
-CARD32 getIP(void);
-
-extern void call_boot(struct device *dev);
-extern void runINT(int num,i86biosRegsPtr Regs);
-extern void add_hlt(unsigned long addr);
-extern void del_hlt(int addr);
-extern void list_hlt();
-
-extern int port_rep_inb(CARD16 port, CARD8 *base, int d_f, CARD32 count);
-extern int port_rep_inw(CARD16 port, CARD16 *base, int d_f, CARD32 count);
-extern int port_rep_inl(CARD16 port, CARD32 *base, int d_f, CARD32 count);
-extern int port_rep_outb(CARD16 port, CARD8 *base, int d_f, CARD32 count);
-extern int port_rep_outw(CARD16 port, CARD16 *base, int d_f, CARD32 count);
-extern int port_rep_outl(CARD16 port, CARD32 *base, int d_f, CARD32 count);
-extern CARD8 p_inb(CARD16 port);
-extern CARD16 p_inw(CARD16 port);
-extern CARD32 p_inl(CARD16 port);
-extern void p_outb(CARD16 port, CARD8 val);
-extern void p_outw(CARD16 port, CARD16 val);
-extern void p_outl(CARD16 port, CARD32 val);
-#ifdef __alpha__
-extern CARD8 a_inb(CARD16 port);
-extern CARD16 a_inw(CARD16 port);
-extern void a_outb(CARD16 port, CARD8 val);
-extern void a_outw(CARD16 port, CARD16 val);
-#endif
-#ifdef __alpha__
-CARD8 mem_rb(CARD32 addr);
-CARD16 mem_rw(CARD32 addr);
-CARD32 mem_rl(CARD32 addr);
-void mem_wb(CARD32 addr, CARD8 val);
-void mem_ww(CARD32 addr, CARD16 val);
-void mem_wl(CARD32 addr, CARD32 val);
-#endif
-extern void io_statistics(void);
-extern void clear_stat(void);
-extern int int_handler(int num, struct regs86 *regs);
-
-extern console open_console(void);
-extern void close_console(console);
-
-extern void dprint(unsigned long start, unsigned long size);
-
-extern Bool logging;
-extern Bool nostdout;
-extern char* logfile;
-extern void logon(void* ptr);
-extern void logoff();
-extern void lprintf(const char *f, ...);
-
-#define MEM_FILE "/dev/mem"
-#define DEFAULT_V_BIOS 0xc0000
-#ifndef V_BIOS
-#define V_BIOS DEFAULT_V_BIOS
-#endif
-
-#ifdef __alpha__
-#define NEED_PCI_IO
-#endif
-
-#endif
diff --git a/board/MAI/bios_emulator/scitech/src/v86bios/working_cards b/board/MAI/bios_emulator/scitech/src/v86bios/working_cards
deleted file mode 100644
index 7753f2495d..0000000000
--- a/board/MAI/bios_emulator/scitech/src/v86bios/working_cards
+++ /dev/null
@@ -1,7 +0,0 @@
-David Monro: Trident TGUI 9440
- Virge/VX (Diamond Stealth 3D 3400)
- Riva TNT (Diamond Viper V550) no vbios?
-Jarno Paananen <jpaana@s2.org>: Guillemot Maxigamer Xentor 32
- (NVIDIA TNT2 Ultra)
- Creative Graphics Blaster Exxtreme
- (Permedia 2)
diff --git a/board/MAI/bios_emulator/scitech/src/v86bios/x86emu.c b/board/MAI/bios_emulator/scitech/src/v86bios/x86emu.c
deleted file mode 100644
index b5c99d7a7f..0000000000
--- a/board/MAI/bios_emulator/scitech/src/v86bios/x86emu.c
+++ /dev/null
@@ -1,316 +0,0 @@
-/*
- * Copyright 1999 Egbert Eich
- *
- * Permission to use, copy, modify, distribute, and sell this software and its
- * documentation for any purpose is hereby granted without fee, provided that
- * the above copyright notice appear in all copies and that both that
- * copyright notice and this permission notice appear in supporting
- * documentation, and that the name of the authors not be used in
- * advertising or publicity pertaining to distribution of the software without
- * specific, written prior permission. The authors makes no representations
- * about the suitability of this software for any purpose. It is provided
- * "as is" without express or implied warranty.
- *
- * THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
- * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
- * EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
- * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
- * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
- * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
- * PERFORMANCE OF THIS SOFTWARE.
- */
-#include "debug.h"
-
-#define IF_MASK 0x00000200
-#define VIF_MASK 0x00080000 /* virtual interrupt flag */
-#define VIP_MASK 0x00100000 /* virtual interrupt pending */
-
-#include </usr/include/unistd.h>
-#include <errno.h>
-#include <asm/unistd.h>
-/*#include <syscall-list.h> */
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <stdarg.h>
-#ifdef __alpha__
-#include <sys/io.h>
-#endif
-#include <signal.h>
-#include <setjmp.h>
-#include "AsmMacros.h"
-#include "v86bios.h"
-# define DEBUG
-#include "x86emu.h"
-#undef DEBUG
-
-#define M _X86EMU_env
-#define CPU_REG(reg) M.x86.R_##reg
-
-struct pio P;
-
-void
-setup_io(void)
-{
- if (!Config.PrintPort && !Config.IoStatistics) {
-
-#if defined (__i386__)
- P.inb = (u8(*)(u16))inb;
- P.inw = (u16(*)(u16))inw;
- P.outb = (void(*)(u16,u8))outb;
- P.outw = (void(*)(u16,u16))outw;
-#else
- P.inb = p_inb;
- P.inw = p_inw;
- P.outb = p_outb;
- P.outw = p_outw;
-#endif
-#if defined (__i386__) && ! defined(NEED_PCI_IO)
- P.inl = (u32(*)(u16))inl;
- P.outl = (void(*)(u16,u32))outl;
-#else
- P.inl = p_inl;
- P.outl = p_outl;
-#endif
- } else {
- P.inb = p_inb;
- P.inw = p_inw;
- P.inl = p_inl;
- P.outb = p_outb;
- P.outw = p_outw;
- P.outl = p_outl;
- }
-}
-
-void
-x86emu_do_int(int num)
-{
- struct regs86 regs;
-
- i_printf("int 0x%x received: ax:0x%x",num,CPU_REG(AX));
- if (Config.PrintIp)
- i_printf(" at: 0x%x\n",getIP());
- else
- i_printf("\n");
-
- /* try to run bios interrupt */
-
- /* if not installed fall back */
-#define COPY(x,y) regs.y = M.x86.x
-#define COPY_R(x,y) M.x86.x = regs.y
-
- COPY(R_EAX,eax);
- COPY(R_EBX,ebx);
- COPY(R_ECX,ecx);
- COPY(R_EDX,edx);
- COPY(R_ESI,esi);
- COPY(R_EDI,edi);
- COPY(R_EBP,ebp);
- COPY(R_EIP,eip);
- COPY(R_ESP,esp);
- COPY(R_CS,cs);
- COPY(R_SS,ss);
- COPY(R_DS,ds);
- COPY(R_ES,es);
- COPY(R_FS,fs);
- COPY(R_GS,gs);
- COPY(R_EFLG,eflags);
-
- if (!(int_handler(num,&regs))) {
- if (!run_bios_int(num,&regs))
- goto unknown_int;
- else
- return;
- }
-
- COPY_R(R_EAX,eax);
- COPY_R(R_EBX,ebx);
- COPY_R(R_ECX,ecx);
- COPY_R(R_EDX,edx);
- COPY_R(R_ESI,esi);
- COPY_R(R_EDI,edi);
- COPY_R(R_EBP,ebp);
- COPY_R(R_EIP,eip);
- COPY_R(R_ESP,esp);
- COPY_R(R_CS,cs);
- COPY_R(R_SS,ss);
- COPY_R(R_DS,ds);
- COPY_R(R_ES,es);
- COPY_R(R_FS,fs);
- COPY_R(R_GS,gs);
- COPY_R(R_EFLG,eflags);
- return;
-
- unknown_int:
- fprintf(stderr,"\nUnknown vm86_int: %X\n\n",num);
- X86EMU_halt_sys();
- return;
-
-#undef COPY
-#undef COPY_R
-}
-
-void
-setup_x86emu(unsigned long bios_start, i86biosRegsPtr regs)
-{
- int i;
- CARD32 eip;
- CARD16 cs;
- X86EMU_intrFuncs intFuncs[256];
-
- X86EMU_pioFuncs pioFuncs = {
- (u8(*)(u16))P.inb,
- (u16(*)(u16))P.inw,
- (u32(*)(u16))P.inl,
- (void(*)(u16,u8))P.outb,
- (void(*)(u16,u16))P.outw,
- (void(*)(u16,u32))P.outl
- };
-#ifdef __alpha__
- X86EMU_memFuncs memFuncs = {
- (u8(*)(u32))mem_rb,
- (u16(*)(u32))mem_rw,
- (u32(*)(u32))mem_rl,
- (void(*)(u32,u8))mem_wb,
- (void(*)(u32,u16))mem_ww,
- (void(*)(u32,u32))mem_wl
- };
-#endif
- M.mem_base = 0;
- M.mem_size = 1024*1024 + 1024;
- /* M.x86.debug = DEBUG_DISASSEMBLE_F | DEBUG_TRACE_F | DEBUG_DECODE_F; */
- /* M.x86.debug |= DEBUG_DECODE_F | DEBUG_TRACE_F; */
-/*
- * For single step tracing compile x86emu with option -DDEBUG
- */
- M.x86.debug = 0;
- if (Config.PrintIp)
- M.x86.debug = DEBUG_SAVE_CS_IP;
-
- if (Config.Trace)
- X86EMU_trace_on();
-
- X86EMU_setupPioFuncs(&pioFuncs);
-#ifdef __alpha__
- X86EMU_setupMemFuncs(&memFuncs);
-#endif
- for (i=0;i<256;i++)
- intFuncs[i] = x86emu_do_int;
- X86EMU_setupIntrFuncs(intFuncs);
-
- eip = bios_start & 0xFFFF;
- cs = (bios_start & 0xFF0000) >> 4;
-
- CPU_REG(EAX) = regs->ax;
- CPU_REG(EBX) = regs->bx;
- CPU_REG(ECX) = regs->cx;
- CPU_REG(EDX) = regs->dx;
- CPU_REG(ESI) = regs->si;
- CPU_REG(EDI) = regs->di;
- CPU_REG(EBP) = 0;
- CPU_REG(EIP) = eip;
- CPU_REG(CS) = cs;
- CPU_REG(SP) = 0x100;
- CPU_REG(SS) = 0x30; /* This is the standard pc bios stack */
- CPU_REG(ES) = regs->es;
- CPU_REG(DS) = regs->ds;
- CPU_REG(FS) = 0;
- CPU_REG(GS) = 0;
- CPU_REG(EFLG) |= (VIF_MASK | VIP_MASK | IF_MASK | 0x2);
-}
-
-void
-collect_bios_regs(i86biosRegsPtr regs)
-{
- regs->ax = CPU_REG(EAX);
- regs->bx = CPU_REG(EBX);
- regs->cx = CPU_REG(ECX);
- regs->dx = CPU_REG(EDX);
- regs->es = CPU_REG(ES);
- regs->ds = CPU_REG(DS);
- regs->di = CPU_REG(EDI);
- regs->si = CPU_REG(ESI);
-}
-
-static void
-do_x86emu(void)
-{
- X86EMU_exec();
-}
-
-static jmp_buf x86_esc;
-static void
-vmexit(int unused)
-{
- longjmp(x86_esc,1);
-}
-
-void
-do_x86(unsigned long bios_start, i86biosRegsPtr regs)
-{
- static void (*org_handler)(int);
-
- setup_x86emu(bios_start,regs);
- if (setjmp(x86_esc) == 0) {
- org_handler = signal(2,vmexit);
- do_x86emu();
- signal(2,org_handler);
- collect_bios_regs(regs);
- } else {
- signal(2,org_handler);
- printf("interrupted at 0x%x\n",((CARD16)CPU_REG(CS)) << 4
- | (CARD16)CPU_REG(EIP));
- }
-}
-
-int
-run_bios_int(int num, struct regs86 *regs)
-{
-#ifdef V86BIOS_DEBUG
- static int firsttime = 1;
-#endif
- /* check if bios vector is initialized */
- if (((CARD16*)0)[(num<<1)+1] == 0x0000) { /* SYS_BIOS_SEG ?*/
-#ifdef V86BIOS_DEBUG
- i_printf("card BIOS not loaded\n");
-#endif
- return 0;
- }
-
-#ifdef V86BIOS_DEBUG
- if (firsttime) {
- dprint(0,0x3D0);
- firsttime = 0;
- }
-#endif
-
- i_printf("calling card BIOS at: ");
- i_printf("0x%x:%x\n",((CARD16 *) 0)[(num << 1) + 1],
- (CARD32)((CARD16 *) 0)[num << 1]);
- X86EMU_prepareForInt(num);
-
- return 1;
-}
-
-CARD32
-getIntVect(int num)
-{
- return ((CARD32*)0)[num];
-}
-#if 0
-void
-printk(const char *fmt, ...)
-{
- va_list argptr;
- va_start(argptr, fmt);
- vfprintf(stdout, fmt, argptr);
- fflush(stdout);
- va_end(argptr);
-}
-#endif
-
-CARD32
-getIP(void)
-{
- return (M.x86.saved_cs << 4) + M.x86.saved_ip;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/x86emu/LICENSE b/board/MAI/bios_emulator/scitech/src/x86emu/LICENSE
deleted file mode 100644
index a3ede4a87d..0000000000
--- a/board/MAI/bios_emulator/scitech/src/x86emu/LICENSE
+++ /dev/null
@@ -1,17 +0,0 @@
- License information
- -------------------
-
-The x86emu library is under a BSD style license, comaptible
-with the XFree86 and X licenses used by XFree86. The
-original x86emu libraries were under the GNU General Public
-License. Due to license incompatibilities between the GPL
-and the XFree86 license, the original authors of the code
-decided to allow a license change. If you have submitted
-code to the original x86emu project, and you don't agree
-with the license change, please contact us and let you
-know. Your code will be removed to comply with your wishes.
-
-If you have any questions about this, please send email to
-x86emu@linuxlabs.com or KendallB@scitechsoft.com for
-clarification.
-
diff --git a/board/MAI/bios_emulator/scitech/src/x86emu/debug.c b/board/MAI/bios_emulator/scitech/src/x86emu/debug.c
deleted file mode 100644
index 235e6ac146..0000000000
--- a/board/MAI/bios_emulator/scitech/src/x86emu/debug.c
+++ /dev/null
@@ -1,443 +0,0 @@
-/****************************************************************************
-*
-* Realmode X86 Emulator Library
-*
-* Copyright (C) 1996-1999 SciTech Software, Inc.
-* Copyright (C) David Mosberger-Tang
-* Copyright (C) 1999 Egbert Eich
-*
-* ========================================================================
-*
-* Permission to use, copy, modify, distribute, and sell this software and
-* its documentation for any purpose is hereby granted without fee,
-* provided that the above copyright notice appear in all copies and that
-* both that copyright notice and this permission notice appear in
-* supporting documentation, and that the name of the authors not be used
-* in advertising or publicity pertaining to distribution of the software
-* without specific, written prior permission. The authors makes no
-* representations about the suitability of this software for any purpose.
-* It is provided "as is" without express or implied warranty.
-*
-* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
-* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
-* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
-* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
-* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
-* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
-* PERFORMANCE OF THIS SOFTWARE.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-* Developer: Kendall Bennett
-*
-* Description: This file contains the code to handle debugging of the
-* emulator.
-*
-****************************************************************************/
-
-#include "x86emu/x86emui.h"
-#include <stdarg.h>
-#include <stdlib.h>
-
-/*----------------------------- Implementation ----------------------------*/
-
-#ifdef DEBUG
-
-static void print_encoded_bytes (u16 s, u16 o);
-static void print_decoded_instruction (void);
-static int parse_line (char *s, int *ps, int *n);
-
-/* should look something like debug's output. */
-void X86EMU_trace_regs (void)
-{
- if (DEBUG_TRACE()) {
- x86emu_dump_regs();
- }
- if (DEBUG_DECODE() && ! DEBUG_DECODE_NOPRINT()) {
- printk("%04x:%04x ",M.x86.saved_cs, M.x86.saved_ip);
- print_encoded_bytes( M.x86.saved_cs, M.x86.saved_ip);
- print_decoded_instruction();
- }
-}
-
-void X86EMU_trace_xregs (void)
-{
- if (DEBUG_TRACE()) {
- x86emu_dump_xregs();
- }
-}
-
-void x86emu_just_disassemble (void)
-{
- /*
- * This routine called if the flag DEBUG_DISASSEMBLE is set kind
- * of a hack!
- */
- printk("%04x:%04x ",M.x86.saved_cs, M.x86.saved_ip);
- print_encoded_bytes( M.x86.saved_cs, M.x86.saved_ip);
- print_decoded_instruction();
-}
-
-static void disassemble_forward (u16 seg, u16 off, int n)
-{
- X86EMU_sysEnv tregs;
- int i;
- u8 op1;
- /*
- * hack, hack, hack. What we do is use the exact machinery set up
- * for execution, except that now there is an additional state
- * flag associated with the "execution", and we are using a copy
- * of the register struct. All the major opcodes, once fully
- * decoded, have the following two steps: TRACE_REGS(r,m);
- * SINGLE_STEP(r,m); which disappear if DEBUG is not defined to
- * the preprocessor. The TRACE_REGS macro expands to:
- *
- * if (debug&DEBUG_DISASSEMBLE)
- * {just_disassemble(); goto EndOfInstruction;}
- * if (debug&DEBUG_TRACE) trace_regs(r,m);
- *
- * ...... and at the last line of the routine.
- *
- * EndOfInstruction: end_instr();
- *
- * Up to the point where TRACE_REG is expanded, NO modifications
- * are done to any register EXCEPT the IP register, for fetch and
- * decoding purposes.
- *
- * This was done for an entirely different reason, but makes a
- * nice way to get the system to help debug codes.
- */
- tregs = M;
- tregs.x86.R_IP = off;
- tregs.x86.R_CS = seg;
-
- /* reset the decoding buffers */
- tregs.x86.enc_str_pos = 0;
- tregs.x86.enc_pos = 0;
-
- /* turn on the "disassemble only, no execute" flag */
- tregs.x86.debug |= DEBUG_DISASSEMBLE_F;
-
- /* DUMP NEXT n instructions to screen in straight_line fashion */
- /*
- * This looks like the regular instruction fetch stream, except
- * that when this occurs, each fetched opcode, upon seeing the
- * DEBUG_DISASSEMBLE flag set, exits immediately after decoding
- * the instruction. XXX --- CHECK THAT MEM IS NOT AFFECTED!!!
- * Note the use of a copy of the register structure...
- */
- for (i=0; i<n; i++) {
- op1 = (*sys_rdb)(((u32)M.x86.R_CS<<4) + (M.x86.R_IP++));
- (x86emu_optab[op1])(op1);
- }
- /* end major hack mode. */
-}
-
-void x86emu_check_ip_access (void)
-{
- /* NULL as of now */
-}
-
-void x86emu_check_sp_access (void)
-{
-}
-
-void x86emu_check_mem_access (u32 dummy)
-{
- /* check bounds, etc */
-}
-
-void x86emu_check_data_access (uint dummy1, uint dummy2)
-{
- /* check bounds, etc */
-}
-
-void x86emu_inc_decoded_inst_len (int x)
-{
- M.x86.enc_pos += x;
-}
-
-void x86emu_decode_printf (char *x)
-{
- sprintf(M.x86.decoded_buf+M.x86.enc_str_pos,"%s",x);
- M.x86.enc_str_pos += strlen(x);
-}
-
-void x86emu_decode_printf2 (char *x, int y)
-{
- char temp[100];
- sprintf(temp,x,y);
- sprintf(M.x86.decoded_buf+M.x86.enc_str_pos,"%s",temp);
- M.x86.enc_str_pos += strlen(temp);
-}
-
-void x86emu_end_instr (void)
-{
- M.x86.enc_str_pos = 0;
- M.x86.enc_pos = 0;
-}
-
-static void print_encoded_bytes (u16 s, u16 o)
-{
- int i;
- char buf1[64];
- for (i=0; i< M.x86.enc_pos; i++) {
- sprintf(buf1+2*i,"%02x", fetch_data_byte_abs(s,o+i));
- }
- printk("%-20s",buf1);
-}
-
-static void print_decoded_instruction (void)
-{
- printk("%s", M.x86.decoded_buf);
-}
-
-void x86emu_print_int_vect (u16 iv)
-{
- u16 seg,off;
-
- if (iv > 256) return;
- seg = fetch_data_word_abs(0,iv*4);
- off = fetch_data_word_abs(0,iv*4+2);
- printk("%04x:%04x ", seg, off);
-}
-
-void X86EMU_dump_memory (u16 seg, u16 off, u32 amt)
-{
- u32 start = off & 0xfffffff0;
- u32 end = (off+16) & 0xfffffff0;
- u32 i;
- u32 current;
-
- current = start;
- while (end <= off + amt) {
- printk("%04x:%04x ", seg, start);
- for (i=start; i< off; i++)
- printk(" ");
- for ( ; i< end; i++)
- printk("%02x ", fetch_data_byte_abs(seg,i));
- printk("\n");
- start = end;
- end = start + 16;
- }
-}
-
-void x86emu_single_step (void)
-{
- char s[1024];
- int ps[10];
- int ntok;
- int cmd;
- int done;
- int segment;
- int offset;
- static int breakpoint;
- static int noDecode = 1;
-
- char *p;
-
- if (DEBUG_BREAK()) {
- if (M.x86.saved_ip != breakpoint) {
- return;
- } else {
- M.x86.debug &= ~DEBUG_DECODE_NOPRINT_F;
- M.x86.debug |= DEBUG_TRACE_F;
- M.x86.debug &= ~DEBUG_BREAK_F;
- print_decoded_instruction ();
- X86EMU_trace_regs();
- }
- }
-
- done=0;
- offset = M.x86.saved_ip;
- while (!done) {
- printk("-");
- /*p = fgets(s, 1023, stdin); */
- cons_gets(s);
- cmd = parse_line(s, ps, &ntok);
- switch(cmd) {
- case 'u':
- disassemble_forward(M.x86.saved_cs,(u16)offset,10);
- break;
- case 'd':
- if (ntok == 2) {
- segment = M.x86.saved_cs;
- offset = ps[1];
- X86EMU_dump_memory(segment,(u16)offset,16);
- offset += 16;
- } else if (ntok == 3) {
- segment = ps[1];
- offset = ps[2];
- X86EMU_dump_memory(segment,(u16)offset,16);
- offset += 16;
- } else {
- segment = M.x86.saved_cs;
- X86EMU_dump_memory(segment,(u16)offset,16);
- offset += 16;
- }
- break;
- case 'c':
- M.x86.debug ^= DEBUG_TRACECALL_F;
- break;
- case 's':
- M.x86.debug ^= DEBUG_SVC_F | DEBUG_SYS_F | DEBUG_SYSINT_F;
- break;
- case 'r':
- X86EMU_trace_regs();
- break;
- case 'x':
- X86EMU_trace_xregs();
- break;
- case 'g':
- if (ntok == 2) {
- breakpoint = ps[1];
- printk("breakpoint set to 0x%X\n", breakpoint);
- if (noDecode) {
- M.x86.debug |= DEBUG_DECODE_NOPRINT_F;
- } else {
- M.x86.debug &= ~DEBUG_DECODE_NOPRINT_F;
- }
- M.x86.debug &= ~DEBUG_TRACE_F;
- M.x86.debug |= DEBUG_BREAK_F;
- done = 1;
- }
- break;
- case 'q':
- M.x86.debug |= DEBUG_EXIT;
- return;
- case 'P':
- noDecode = (noDecode)?0:1;
- printk("Toggled decoding to %s\n",(noDecode)?"FALSE":"TRUE");
- break;
- case 't':
- case 0:
- done = 1;
- break;
- }
- }
-}
-
-int X86EMU_trace_on(void)
-{
- return M.x86.debug |= DEBUG_STEP_F | DEBUG_DECODE_F | DEBUG_TRACE_F;
-}
-
-int X86EMU_trace_off(void)
-{
- return M.x86.debug &= ~(DEBUG_STEP_F | DEBUG_DECODE_F | DEBUG_TRACE_F);
-}
-
-static int parse_line (char *s, int *ps, int *n)
-{
- int cmd;
-
- *n = 0;
- while(*s == ' ' || *s == '\t') s++;
- ps[*n] = *s;
- switch (*s) {
- case '\n':
- *n += 1;
- return 0;
- default:
- cmd = *s;
- *n += 1;
- }
-
- while (1) {
- while (*s != ' ' && *s != '\t' && *s != '\n') s++;
-
- if (*s == '\n')
- return cmd;
-
- while(*s == ' ' || *s == '\t') s++;
-
- ps[*n]=atoi(s);
- /*sscanf(s,"%x",&ps[*n]); */
- *n += 1;
- }
-}
-
-#endif /* DEBUG */
-
-void x86emu_dump_stack(void)
-{
- int i;
- printk("Stack: ");
- for (i = 0; i<16; i++)
- {
- u8 x = fetch_data_byte_abs(M.x86.R_SS, M.x86.R_SP + i);
- printk("%02x ", (int)x);
- }
- printk("\n");
-}
-
-void x86emu_dump_regs (void)
-{
- printk("\tAX=%04x ", M.x86.R_AX );
- printk("BX=%04x ", M.x86.R_BX );
- printk("CX=%04x ", M.x86.R_CX );
- printk("DX=%04x ", M.x86.R_DX );
- printk("SP=%04x ", M.x86.R_SP );
- printk("BP=%04x ", M.x86.R_BP );
- printk("SI=%04x ", M.x86.R_SI );
- printk("DI=%04x\n", M.x86.R_DI );
- printk("\tDS=%04x ", M.x86.R_DS );
- printk("ES=%04x ", M.x86.R_ES );
- printk("SS=%04x ", M.x86.R_SS );
- printk("CS=%04x ", M.x86.R_CS );
- printk("IP=%04x ", M.x86.R_IP );
- if (ACCESS_FLAG(F_OF)) printk("OV "); /* CHECKED... */
- else printk("NV ");
- if (ACCESS_FLAG(F_DF)) printk("DN ");
- else printk("UP ");
- if (ACCESS_FLAG(F_IF)) printk("EI ");
- else printk("DI ");
- if (ACCESS_FLAG(F_SF)) printk("NG ");
- else printk("PL ");
- if (ACCESS_FLAG(F_ZF)) printk("ZR ");
- else printk("NZ ");
- if (ACCESS_FLAG(F_AF)) printk("AC ");
- else printk("NA ");
- if (ACCESS_FLAG(F_PF)) printk("PE ");
- else printk("PO ");
- if (ACCESS_FLAG(F_CF)) printk("CY ");
- else printk("NC ");
- printk("\n");
- /*x86emu_dump_stack(); */
-}
-
-void x86emu_dump_xregs (void)
-{
- printk("\tEAX=%08x ", M.x86.R_EAX );
- printk("EBX=%08x ", M.x86.R_EBX );
- printk("ECX=%08x ", M.x86.R_ECX );
- printk("EDX=%08x \n", M.x86.R_EDX );
- printk("\tESP=%08x ", M.x86.R_ESP );
- printk("EBP=%08x ", M.x86.R_EBP );
- printk("ESI=%08x ", M.x86.R_ESI );
- printk("EDI=%08x\n", M.x86.R_EDI );
- printk("\tDS=%04x ", M.x86.R_DS );
- printk("ES=%04x ", M.x86.R_ES );
- printk("SS=%04x ", M.x86.R_SS );
- printk("CS=%04x ", M.x86.R_CS );
- printk("EIP=%08x\n\t", M.x86.R_EIP );
- if (ACCESS_FLAG(F_OF)) printk("OV "); /* CHECKED... */
- else printk("NV ");
- if (ACCESS_FLAG(F_DF)) printk("DN ");
- else printk("UP ");
- if (ACCESS_FLAG(F_IF)) printk("EI ");
- else printk("DI ");
- if (ACCESS_FLAG(F_SF)) printk("NG ");
- else printk("PL ");
- if (ACCESS_FLAG(F_ZF)) printk("ZR ");
- else printk("NZ ");
- if (ACCESS_FLAG(F_AF)) printk("AC ");
- else printk("NA ");
- if (ACCESS_FLAG(F_PF)) printk("PE ");
- else printk("PO ");
- if (ACCESS_FLAG(F_CF)) printk("CY ");
- else printk("NC ");
- printk("\n");
-}
diff --git a/board/MAI/bios_emulator/scitech/src/x86emu/decode.c b/board/MAI/bios_emulator/scitech/src/x86emu/decode.c
deleted file mode 100644
index 832b1f5f2e..0000000000
--- a/board/MAI/bios_emulator/scitech/src/x86emu/decode.c
+++ /dev/null
@@ -1,970 +0,0 @@
-/****************************************************************************
-*
-* Realmode X86 Emulator Library
-*
-* Copyright (C) 1996-1999 SciTech Software, Inc.
-* Copyright (C) David Mosberger-Tang
-* Copyright (C) 1999 Egbert Eich
-*
-* ========================================================================
-*
-* Permission to use, copy, modify, distribute, and sell this software and
-* its documentation for any purpose is hereby granted without fee,
-* provided that the above copyright notice appear in all copies and that
-* both that copyright notice and this permission notice appear in
-* supporting documentation, and that the name of the authors not be used
-* in advertising or publicity pertaining to distribution of the software
-* without specific, written prior permission. The authors makes no
-* representations about the suitability of this software for any purpose.
-* It is provided "as is" without express or implied warranty.
-*
-* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
-* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
-* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
-* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
-* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
-* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
-* PERFORMANCE OF THIS SOFTWARE.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-* Developer: Kendall Bennett
-*
-* Description: This file includes subroutines which are related to
-* instruction decoding and accessess of immediate data via IP. etc.
-*
-****************************************************************************/
-
-#include "x86emu/x86emui.h"
-
-/*----------------------------- Implementation ----------------------------*/
-
-/****************************************************************************
-REMARKS:
-Handles any pending asychronous interrupts.
-****************************************************************************/
-static void x86emu_intr_handle(void)
-{
- u8 intno;
-
- if (M.x86.intr & INTR_SYNCH) {
- intno = M.x86.intno;
- if (_X86EMU_intrTab[intno]) {
- (*_X86EMU_intrTab[intno])(intno);
- } else {
- push_word((u16)M.x86.R_FLG);
- CLEAR_FLAG(F_IF);
- CLEAR_FLAG(F_TF);
- push_word(M.x86.R_CS);
- M.x86.R_CS = mem_access_word(intno * 4 + 2);
- push_word(M.x86.R_IP);
- M.x86.R_IP = mem_access_word(intno * 4);
- M.x86.intr = 0;
- }
- }
-}
-
-/****************************************************************************
-PARAMETERS:
-intrnum - Interrupt number to raise
-
-REMARKS:
-Raise the specified interrupt to be handled before the execution of the
-next instruction.
-****************************************************************************/
-void x86emu_intr_raise(
- u8 intrnum)
-{
- M.x86.intno = intrnum;
- M.x86.intr |= INTR_SYNCH;
-}
-
-/****************************************************************************
-REMARKS:
-Main execution loop for the emulator. We return from here when the system
-halts, which is normally caused by a stack fault when we return from the
-original real mode call.
-****************************************************************************/
-void X86EMU_exec(void)
-{
- u8 op1;
-
- M.x86.intr = 0;
- DB(x86emu_end_instr();)
-
- for (;;) {
- DB(if (CHECK_IP_FETCH()) x86emu_check_ip_access();)
- /* If debugging, save the IP and CS values. */
- SAVE_IP_CS(M.x86.R_CS, M.x86.R_IP);
- INC_DECODED_INST_LEN(1);
- if (M.x86.intr) {
- if (M.x86.intr & INTR_HALTED) {
- DB( printk("halted\n"); X86EMU_trace_regs();)
- return;
- }
- if (((M.x86.intr & INTR_SYNCH) && (M.x86.intno == 0 || M.x86.intno == 2)) ||
- !ACCESS_FLAG(F_IF)) {
- x86emu_intr_handle();
- }
- }
- op1 = (*sys_rdb)(((u32)M.x86.R_CS << 4) + (M.x86.R_IP++));
- (*x86emu_optab[op1])(op1);
- if (M.x86.debug & DEBUG_EXIT) {
- M.x86.debug &= ~DEBUG_EXIT;
- return;
- }
- }
-}
-
-/****************************************************************************
-REMARKS:
-Halts the system by setting the halted system flag.
-****************************************************************************/
-void X86EMU_halt_sys(void)
-{
- M.x86.intr |= INTR_HALTED;
-}
-
-/****************************************************************************
-PARAMETERS:
-mod - Mod value from decoded byte
-regh - Reg h value from decoded byte
-regl - Reg l value from decoded byte
-
-REMARKS:
-Raise the specified interrupt to be handled before the execution of the
-next instruction.
-
-NOTE: Do not inline this function, as (*sys_rdb) is already inline!
-****************************************************************************/
-void fetch_decode_modrm(
- int *mod,
- int *regh,
- int *regl)
-{
- int fetched;
-
-DB( if (CHECK_IP_FETCH())
- x86emu_check_ip_access();)
- fetched = (*sys_rdb)(((u32)M.x86.R_CS << 4) + (M.x86.R_IP++));
- INC_DECODED_INST_LEN(1);
- *mod = (fetched >> 6) & 0x03;
- *regh = (fetched >> 3) & 0x07;
- *regl = (fetched >> 0) & 0x07;
-}
-
-/****************************************************************************
-RETURNS:
-Immediate byte value read from instruction queue
-
-REMARKS:
-This function returns the immediate byte from the instruction queue, and
-moves the instruction pointer to the next value.
-
-NOTE: Do not inline this function, as (*sys_rdb) is already inline!
-****************************************************************************/
-u8 fetch_byte_imm(void)
-{
- u8 fetched;
-
-DB( if (CHECK_IP_FETCH())
- x86emu_check_ip_access();)
- fetched = (*sys_rdb)(((u32)M.x86.R_CS << 4) + (M.x86.R_IP++));
- INC_DECODED_INST_LEN(1);
- return fetched;
-}
-
-/****************************************************************************
-RETURNS:
-Immediate word value read from instruction queue
-
-REMARKS:
-This function returns the immediate byte from the instruction queue, and
-moves the instruction pointer to the next value.
-
-NOTE: Do not inline this function, as (*sys_rdw) is already inline!
-****************************************************************************/
-u16 fetch_word_imm(void)
-{
- u16 fetched;
-
-DB( if (CHECK_IP_FETCH())
- x86emu_check_ip_access();)
- fetched = (*sys_rdw)(((u32)M.x86.R_CS << 4) + (M.x86.R_IP));
- M.x86.R_IP += 2;
- INC_DECODED_INST_LEN(2);
- return fetched;
-}
-
-/****************************************************************************
-RETURNS:
-Immediate lone value read from instruction queue
-
-REMARKS:
-This function returns the immediate byte from the instruction queue, and
-moves the instruction pointer to the next value.
-
-NOTE: Do not inline this function, as (*sys_rdw) is already inline!
-****************************************************************************/
-u32 fetch_long_imm(void)
-{
- u32 fetched;
-
-DB( if (CHECK_IP_FETCH())
- x86emu_check_ip_access();)
- fetched = (*sys_rdl)(((u32)M.x86.R_CS << 4) + (M.x86.R_IP));
- M.x86.R_IP += 4;
- INC_DECODED_INST_LEN(4);
- return fetched;
-}
-
-/****************************************************************************
-RETURNS:
-Value of the default data segment
-
-REMARKS:
-Inline function that returns the default data segment for the current
-instruction.
-
-On the x86 processor, the default segment is not always DS if there is
-no segment override. Address modes such as -3[BP] or 10[BP+SI] all refer to
-addresses relative to SS (ie: on the stack). So, at the minimum, all
-decodings of addressing modes would have to set/clear a bit describing
-whether the access is relative to DS or SS. That is the function of the
-cpu-state-varible M.x86.mode. There are several potential states:
-
- repe prefix seen (handled elsewhere)
- repne prefix seen (ditto)
-
- cs segment override
- ds segment override
- es segment override
- fs segment override
- gs segment override
- ss segment override
-
- ds/ss select (in absense of override)
-
-Each of the above 7 items are handled with a bit in the mode field.
-****************************************************************************/
-_INLINE u32 get_data_segment(void)
-{
-#define GET_SEGMENT(segment)
- switch (M.x86.mode & SYSMODE_SEGMASK) {
- case 0: /* default case: use ds register */
- case SYSMODE_SEGOVR_DS:
- case SYSMODE_SEGOVR_DS | SYSMODE_SEG_DS_SS:
- return M.x86.R_DS;
- case SYSMODE_SEG_DS_SS: /* non-overridden, use ss register */
- return M.x86.R_SS;
- case SYSMODE_SEGOVR_CS:
- case SYSMODE_SEGOVR_CS | SYSMODE_SEG_DS_SS:
- return M.x86.R_CS;
- case SYSMODE_SEGOVR_ES:
- case SYSMODE_SEGOVR_ES | SYSMODE_SEG_DS_SS:
- return M.x86.R_ES;
- case SYSMODE_SEGOVR_FS:
- case SYSMODE_SEGOVR_FS | SYSMODE_SEG_DS_SS:
- return M.x86.R_FS;
- case SYSMODE_SEGOVR_GS:
- case SYSMODE_SEGOVR_GS | SYSMODE_SEG_DS_SS:
- return M.x86.R_GS;
- case SYSMODE_SEGOVR_SS:
- case SYSMODE_SEGOVR_SS | SYSMODE_SEG_DS_SS:
- return M.x86.R_SS;
- default:
-#ifdef DEBUG
- printk("error: should not happen: multiple overrides.\n");
-#endif
- HALT_SYS();
- return 0;
- }
-}
-
-/****************************************************************************
-PARAMETERS:
-offset - Offset to load data from
-
-RETURNS:
-Byte value read from the absolute memory location.
-
-NOTE: Do not inline this function as (*sys_rdX) is already inline!
-****************************************************************************/
-u8 fetch_data_byte(
- uint offset)
-{
-#ifdef DEBUG
- if (CHECK_DATA_ACCESS())
- x86emu_check_data_access((u16)get_data_segment(), offset);
-#endif
- return (*sys_rdb)((get_data_segment() << 4) + offset);
-}
-
-/****************************************************************************
-PARAMETERS:
-offset - Offset to load data from
-
-RETURNS:
-Word value read from the absolute memory location.
-
-NOTE: Do not inline this function as (*sys_rdX) is already inline!
-****************************************************************************/
-u16 fetch_data_word(
- uint offset)
-{
-#ifdef DEBUG
- if (CHECK_DATA_ACCESS())
- x86emu_check_data_access((u16)get_data_segment(), offset);
-#endif
- return (*sys_rdw)((get_data_segment() << 4) + offset);
-}
-
-/****************************************************************************
-PARAMETERS:
-offset - Offset to load data from
-
-RETURNS:
-Long value read from the absolute memory location.
-
-NOTE: Do not inline this function as (*sys_rdX) is already inline!
-****************************************************************************/
-u32 fetch_data_long(
- uint offset)
-{
-#ifdef DEBUG
- if (CHECK_DATA_ACCESS())
- x86emu_check_data_access((u16)get_data_segment(), offset);
-#endif
- return (*sys_rdl)((get_data_segment() << 4) + offset);
-}
-
-/****************************************************************************
-PARAMETERS:
-segment - Segment to load data from
-offset - Offset to load data from
-
-RETURNS:
-Byte value read from the absolute memory location.
-
-NOTE: Do not inline this function as (*sys_rdX) is already inline!
-****************************************************************************/
-u8 fetch_data_byte_abs(
- uint segment,
- uint offset)
-{
-#ifdef DEBUG
- if (CHECK_DATA_ACCESS())
- x86emu_check_data_access(segment, offset);
-#endif
- return (*sys_rdb)(((u32)segment << 4) + offset);
-}
-
-/****************************************************************************
-PARAMETERS:
-segment - Segment to load data from
-offset - Offset to load data from
-
-RETURNS:
-Word value read from the absolute memory location.
-
-NOTE: Do not inline this function as (*sys_rdX) is already inline!
-****************************************************************************/
-u16 fetch_data_word_abs(
- uint segment,
- uint offset)
-{
-#ifdef DEBUG
- if (CHECK_DATA_ACCESS())
- x86emu_check_data_access(segment, offset);
-#endif
- return (*sys_rdw)(((u32)segment << 4) + offset);
-}
-
-/****************************************************************************
-PARAMETERS:
-segment - Segment to load data from
-offset - Offset to load data from
-
-RETURNS:
-Long value read from the absolute memory location.
-
-NOTE: Do not inline this function as (*sys_rdX) is already inline!
-****************************************************************************/
-u32 fetch_data_long_abs(
- uint segment,
- uint offset)
-{
-#ifdef DEBUG
- if (CHECK_DATA_ACCESS())
- x86emu_check_data_access(segment, offset);
-#endif
- return (*sys_rdl)(((u32)segment << 4) + offset);
-}
-
-/****************************************************************************
-PARAMETERS:
-offset - Offset to store data at
-val - Value to store
-
-REMARKS:
-Writes a word value to an segmented memory location. The segment used is
-the current 'default' segment, which may have been overridden.
-
-NOTE: Do not inline this function as (*sys_wrX) is already inline!
-****************************************************************************/
-void store_data_byte(
- uint offset,
- u8 val)
-{
-#ifdef DEBUG
- if (CHECK_DATA_ACCESS())
- x86emu_check_data_access((u16)get_data_segment(), offset);
-#endif
- (*sys_wrb)((get_data_segment() << 4) + offset, val);
-}
-
-/****************************************************************************
-PARAMETERS:
-offset - Offset to store data at
-val - Value to store
-
-REMARKS:
-Writes a word value to an segmented memory location. The segment used is
-the current 'default' segment, which may have been overridden.
-
-NOTE: Do not inline this function as (*sys_wrX) is already inline!
-****************************************************************************/
-void store_data_word(
- uint offset,
- u16 val)
-{
-#ifdef DEBUG
- if (CHECK_DATA_ACCESS())
- x86emu_check_data_access((u16)get_data_segment(), offset);
-#endif
- (*sys_wrw)((get_data_segment() << 4) + offset, val);
-}
-
-/****************************************************************************
-PARAMETERS:
-offset - Offset to store data at
-val - Value to store
-
-REMARKS:
-Writes a long value to an segmented memory location. The segment used is
-the current 'default' segment, which may have been overridden.
-
-NOTE: Do not inline this function as (*sys_wrX) is already inline!
-****************************************************************************/
-void store_data_long(
- uint offset,
- u32 val)
-{
-#ifdef DEBUG
- if (CHECK_DATA_ACCESS())
- x86emu_check_data_access((u16)get_data_segment(), offset);
-#endif
- (*sys_wrl)((get_data_segment() << 4) + offset, val);
-}
-
-/****************************************************************************
-PARAMETERS:
-segment - Segment to store data at
-offset - Offset to store data at
-val - Value to store
-
-REMARKS:
-Writes a byte value to an absolute memory location.
-
-NOTE: Do not inline this function as (*sys_wrX) is already inline!
-****************************************************************************/
-void store_data_byte_abs(
- uint segment,
- uint offset,
- u8 val)
-{
-#ifdef DEBUG
- if (CHECK_DATA_ACCESS())
- x86emu_check_data_access(segment, offset);
-#endif
- (*sys_wrb)(((u32)segment << 4) + offset, val);
-}
-
-/****************************************************************************
-PARAMETERS:
-segment - Segment to store data at
-offset - Offset to store data at
-val - Value to store
-
-REMARKS:
-Writes a word value to an absolute memory location.
-
-NOTE: Do not inline this function as (*sys_wrX) is already inline!
-****************************************************************************/
-void store_data_word_abs(
- uint segment,
- uint offset,
- u16 val)
-{
-#ifdef DEBUG
- if (CHECK_DATA_ACCESS())
- x86emu_check_data_access(segment, offset);
-#endif
- (*sys_wrw)(((u32)segment << 4) + offset, val);
-}
-
-/****************************************************************************
-PARAMETERS:
-segment - Segment to store data at
-offset - Offset to store data at
-val - Value to store
-
-REMARKS:
-Writes a long value to an absolute memory location.
-
-NOTE: Do not inline this function as (*sys_wrX) is already inline!
-****************************************************************************/
-void store_data_long_abs(
- uint segment,
- uint offset,
- u32 val)
-{
-#ifdef DEBUG
- if (CHECK_DATA_ACCESS())
- x86emu_check_data_access(segment, offset);
-#endif
- (*sys_wrl)(((u32)segment << 4) + offset, val);
-}
-
-/****************************************************************************
-PARAMETERS:
-reg - Register to decode
-
-RETURNS:
-Pointer to the appropriate register
-
-REMARKS:
-Return a pointer to the register given by the R/RM field of the
-modrm byte, for byte operands. Also enables the decoding of instructions.
-****************************************************************************/
-u8* decode_rm_byte_register(
- int reg)
-{
- switch (reg) {
- case 0:
- DECODE_PRINTF("AL");
- return &M.x86.R_AL;
- case 1:
- DECODE_PRINTF("CL");
- return &M.x86.R_CL;
- case 2:
- DECODE_PRINTF("DL");
- return &M.x86.R_DL;
- case 3:
- DECODE_PRINTF("BL");
- return &M.x86.R_BL;
- case 4:
- DECODE_PRINTF("AH");
- return &M.x86.R_AH;
- case 5:
- DECODE_PRINTF("CH");
- return &M.x86.R_CH;
- case 6:
- DECODE_PRINTF("DH");
- return &M.x86.R_DH;
- case 7:
- DECODE_PRINTF("BH");
- return &M.x86.R_BH;
- }
- HALT_SYS();
- return NULL; /* NOT REACHED OR REACHED ON ERROR */
-}
-
-/****************************************************************************
-PARAMETERS:
-reg - Register to decode
-
-RETURNS:
-Pointer to the appropriate register
-
-REMARKS:
-Return a pointer to the register given by the R/RM field of the
-modrm byte, for word operands. Also enables the decoding of instructions.
-****************************************************************************/
-u16* decode_rm_word_register(
- int reg)
-{
- switch (reg) {
- case 0:
- DECODE_PRINTF("AX");
- return &M.x86.R_AX;
- case 1:
- DECODE_PRINTF("CX");
- return &M.x86.R_CX;
- case 2:
- DECODE_PRINTF("DX");
- return &M.x86.R_DX;
- case 3:
- DECODE_PRINTF("BX");
- return &M.x86.R_BX;
- case 4:
- DECODE_PRINTF("SP");
- return &M.x86.R_SP;
- case 5:
- DECODE_PRINTF("BP");
- return &M.x86.R_BP;
- case 6:
- DECODE_PRINTF("SI");
- return &M.x86.R_SI;
- case 7:
- DECODE_PRINTF("DI");
- return &M.x86.R_DI;
- }
- HALT_SYS();
- return NULL; /* NOTREACHED OR REACHED ON ERROR */
-}
-
-/****************************************************************************
-PARAMETERS:
-reg - Register to decode
-
-RETURNS:
-Pointer to the appropriate register
-
-REMARKS:
-Return a pointer to the register given by the R/RM field of the
-modrm byte, for dword operands. Also enables the decoding of instructions.
-****************************************************************************/
-u32* decode_rm_long_register(
- int reg)
-{
- switch (reg) {
- case 0:
- DECODE_PRINTF("EAX");
- return &M.x86.R_EAX;
- case 1:
- DECODE_PRINTF("ECX");
- return &M.x86.R_ECX;
- case 2:
- DECODE_PRINTF("EDX");
- return &M.x86.R_EDX;
- case 3:
- DECODE_PRINTF("EBX");
- return &M.x86.R_EBX;
- case 4:
- DECODE_PRINTF("ESP");
- return &M.x86.R_ESP;
- case 5:
- DECODE_PRINTF("EBP");
- return &M.x86.R_EBP;
- case 6:
- DECODE_PRINTF("ESI");
- return &M.x86.R_ESI;
- case 7:
- DECODE_PRINTF("EDI");
- return &M.x86.R_EDI;
- }
- HALT_SYS();
- return NULL; /* NOTREACHED OR REACHED ON ERROR */
-}
-
-/****************************************************************************
-PARAMETERS:
-reg - Register to decode
-
-RETURNS:
-Pointer to the appropriate register
-
-REMARKS:
-Return a pointer to the register given by the R/RM field of the
-modrm byte, for word operands, modified from above for the weirdo
-special case of segreg operands. Also enables the decoding of instructions.
-****************************************************************************/
-u16* decode_rm_seg_register(
- int reg)
-{
- switch (reg) {
- case 0:
- DECODE_PRINTF("ES");
- return &M.x86.R_ES;
- case 1:
- DECODE_PRINTF("CS");
- return &M.x86.R_CS;
- case 2:
- DECODE_PRINTF("SS");
- return &M.x86.R_SS;
- case 3:
- DECODE_PRINTF("DS");
- return &M.x86.R_DS;
- case 4:
- case 5:
- case 6:
- case 7:
- DECODE_PRINTF("ILLEGAL SEGREG");
- break;
- }
- HALT_SYS();
- return NULL; /* NOT REACHED OR REACHED ON ERROR */
-}
-
-/****************************************************************************
-PARAMETERS:
-rm - RM value to decode
-
-RETURNS:
-Offset in memory for the address decoding
-
-REMARKS:
-Return the offset given by mod=00 addressing. Also enables the
-decoding of instructions.
-
-NOTE: The code which specifies the corresponding segment (ds vs ss)
- below in the case of [BP+..]. The assumption here is that at the
- point that this subroutine is called, the bit corresponding to
- SYSMODE_SEG_DS_SS will be zero. After every instruction
- except the segment override instructions, this bit (as well
- as any bits indicating segment overrides) will be clear. So
- if a SS access is needed, set this bit. Otherwise, DS access
- occurs (unless any of the segment override bits are set).
-****************************************************************************/
-unsigned decode_rm00_address(
- int rm)
-{
- unsigned offset;
-
- if (M.x86.mode & SYSMODE_PREFIX_ADDR)
- {
- switch (rm) {
- case 0:
- DECODE_PRINTF("[EAX]");
- return M.x86.R_EAX;
- case 1:
- DECODE_PRINTF("[ECX]");
- return M.x86.R_ECX;
- case 2:
- DECODE_PRINTF("[EDX]");
-/* M.x86.mode |= SYSMODE_SEG_DS_SS; */
- return M.x86.R_EDX;
- case 3:
- DECODE_PRINTF("[EBX]");
-/* M.x86.mode |= SYSMODE_SEG_DS_SS; */
- return M.x86.R_EBX;
- case 4:
- printk("Unsupported SIB encoding\n");
- HALT_SYS();
- return 0;
- case 5:
- offset = fetch_long_imm();
- DECODE_PRINTF2("[%08x]", offset);
- return offset;
- case 6:
- DECODE_PRINTF("[ESI]");
- return M.x86.R_ESI;
- case 7:
- DECODE_PRINTF("[EDI]");
- return M.x86.R_EDI;
- }
- }
- else
- {
- switch (rm) {
- case 0:
- DECODE_PRINTF("[BX+SI]");
- return M.x86.R_BX + M.x86.R_SI;
- case 1:
- DECODE_PRINTF("[BX+DI]");
- return M.x86.R_BX + M.x86.R_DI;
- case 2:
- DECODE_PRINTF("[BP+SI]");
- M.x86.mode |= SYSMODE_SEG_DS_SS;
- return M.x86.R_BP + M.x86.R_SI;
- case 3:
- DECODE_PRINTF("[BP+DI]");
- M.x86.mode |= SYSMODE_SEG_DS_SS;
- return M.x86.R_BP + M.x86.R_DI;
- case 4:
- DECODE_PRINTF("[SI]");
- return M.x86.R_SI;
- case 5:
- DECODE_PRINTF("[DI]");
- return M.x86.R_DI;
- case 6:
- offset = fetch_word_imm();
- DECODE_PRINTF2("[%04x]", offset);
- return offset;
- case 7:
- DECODE_PRINTF("[BX]");
- return M.x86.R_BX;
- }
- }
- HALT_SYS();
- return 0;
-}
-
-/****************************************************************************
-PARAMETERS:
-rm - RM value to decode
-
-RETURNS:
-Offset in memory for the address decoding
-
-REMARKS:
-Return the offset given by mod=01 addressing. Also enables the
-decoding of instructions.
-****************************************************************************/
-unsigned decode_rm01_address(
- int rm)
-{
- int displacement = (s8)fetch_byte_imm();
- if (M.x86.mode & SYSMODE_PREFIX_ADDR)
- {
- switch (rm)
- {
- case 0:
- DECODE_PRINTF2("%d[EAX}", displacement);
- return M.x86.R_EAX + displacement;
- case 1:
- DECODE_PRINTF2("%d[ECX]", displacement);
- return M.x86.R_ECX + displacement;
- case 2:
- DECODE_PRINTF2("%d[EDX]", displacement);
- return M.x86.R_EDX + displacement;
- case 3:
- DECODE_PRINTF2("%d[EBX]", displacement);
- return M.x86.R_EBX + displacement;
- case 4:
- printk("Unsupported SIB addressing mode\n");
- HALT_SYS();
- return 0;
- case 5:
- DECODE_PRINTF2("%d[EBP]", displacement);
- return M.x86.R_EBP + displacement;
- case 6:
- DECODE_PRINTF2("%d[ESI]", displacement);
- return M.x86.R_ESI + displacement;
- case 7:
- DECODE_PRINTF2("%d[EDI]", displacement);
- return M.x86.R_EDI + displacement;
- }
- }
- else
- {
- switch (rm) {
- case 0:
- DECODE_PRINTF2("%d[BX+SI]", displacement);
- return M.x86.R_BX + M.x86.R_SI + displacement;
- case 1:
- DECODE_PRINTF2("%d[BX+DI]", displacement);
- return M.x86.R_BX + M.x86.R_DI + displacement;
- case 2:
- DECODE_PRINTF2("%d[BP+SI]", displacement);
- M.x86.mode |= SYSMODE_SEG_DS_SS;
- return M.x86.R_BP + M.x86.R_SI + displacement;
- case 3:
- DECODE_PRINTF2("%d[BP+DI]", displacement);
- M.x86.mode |= SYSMODE_SEG_DS_SS;
- return M.x86.R_BP + M.x86.R_DI + displacement;
- case 4:
- DECODE_PRINTF2("%d[SI]", displacement);
- return M.x86.R_SI + displacement;
- case 5:
- DECODE_PRINTF2("%d[DI]", displacement);
- return M.x86.R_DI + displacement;
- case 6:
- DECODE_PRINTF2("%d[BP]", displacement);
- M.x86.mode |= SYSMODE_SEG_DS_SS;
- return M.x86.R_BP + displacement;
- case 7:
- DECODE_PRINTF2("%d[BX]", displacement);
- return M.x86.R_BX + displacement;
- }
- HALT_SYS();
- }
- return 0; /* SHOULD NOT HAPPEN */
-}
-
-/****************************************************************************
-PARAMETERS:
-rm - RM value to decode
-
-RETURNS:
-Offset in memory for the address decoding
-
-REMARKS:
-Return the offset given by mod=10 addressing. Also enables the
-decoding of instructions.
-****************************************************************************/
-unsigned decode_rm10_address(
- int rm)
-{
- if (M.x86.mode & SYSMODE_PREFIX_ADDR)
- {
- int displacement = (s32)fetch_long_imm();
- switch (rm)
- {
- case 0:
- DECODE_PRINTF2("%d[EAX}", displacement);
- return M.x86.R_EAX + displacement;
- case 1:
- DECODE_PRINTF2("%d[ECX]", displacement);
- return M.x86.R_ECX + displacement;
- case 2:
- DECODE_PRINTF2("%d[EDX]", displacement);
- return M.x86.R_EDX + displacement;
- case 3:
- DECODE_PRINTF2("%d[EBX]", displacement);
- return M.x86.R_EBX + displacement;
- case 4:
- printk("Unsupported SIB addressing mode\n");
- HALT_SYS();
- return 0;
- case 5:
- DECODE_PRINTF2("%d[EBP]", displacement);
- return M.x86.R_EBP + displacement;
- case 6:
- DECODE_PRINTF2("%d[ESI]", displacement);
- return M.x86.R_ESI + displacement;
- case 7:
- DECODE_PRINTF2("%d[EDI]", displacement);
- return M.x86.R_EDI + displacement;
- }
- }
- else
- {
- int displacement = (s16)fetch_word_imm();
- switch (rm) {
- case 0:
- DECODE_PRINTF2("%d[BX+SI]", displacement);
- return (M.x86.R_BX + M.x86.R_SI + displacement) & 0xffff;
- case 1:
- DECODE_PRINTF2("%d[BX+DI]", displacement);
- return (M.x86.R_BX + M.x86.R_DI + displacement) & 0xffff;
- case 2:
- DECODE_PRINTF2("%d[BP+SI]", displacement);
- M.x86.mode |= SYSMODE_SEG_DS_SS;
- return (M.x86.R_BP + M.x86.R_SI + displacement) & 0xffff;
- case 3:
- DECODE_PRINTF2("%d[BP+DI]", displacement);
- M.x86.mode |= SYSMODE_SEG_DS_SS;
- return (M.x86.R_BP + M.x86.R_DI + displacement) & 0xffff;
- case 4:
- DECODE_PRINTF2("%d[SI]", displacement);
- return (M.x86.R_SI + displacement) & 0xffff;
- case 5:
- DECODE_PRINTF2("%d[DI]", displacement);
- return (M.x86.R_DI + displacement) & 0xffff;
- case 6:
- DECODE_PRINTF2("%d[BP]", displacement);
- M.x86.mode |= SYSMODE_SEG_DS_SS;
- return (M.x86.R_BP + displacement) & 0xffff;
- case 7:
- DECODE_PRINTF2("%d[BX]", displacement);
- return (M.x86.R_BX + displacement) & 0xffff;
- }
- }
- HALT_SYS();
- return 0;
- /*NOTREACHED */
-}
diff --git a/board/MAI/bios_emulator/scitech/src/x86emu/fpu.c b/board/MAI/bios_emulator/scitech/src/x86emu/fpu.c
deleted file mode 100644
index 7f7c345b34..0000000000
--- a/board/MAI/bios_emulator/scitech/src/x86emu/fpu.c
+++ /dev/null
@@ -1,945 +0,0 @@
-/****************************************************************************
-*
-* Realmode X86 Emulator Library
-*
-* Copyright (C) 1996-1999 SciTech Software, Inc.
-* Copyright (C) David Mosberger-Tang
-* Copyright (C) 1999 Egbert Eich
-*
-* ========================================================================
-*
-* Permission to use, copy, modify, distribute, and sell this software and
-* its documentation for any purpose is hereby granted without fee,
-* provided that the above copyright notice appear in all copies and that
-* both that copyright notice and this permission notice appear in
-* supporting documentation, and that the name of the authors not be used
-* in advertising or publicity pertaining to distribution of the software
-* without specific, written prior permission. The authors makes no
-* representations about the suitability of this software for any purpose.
-* It is provided "as is" without express or implied warranty.
-*
-* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
-* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
-* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
-* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
-* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
-* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
-* PERFORMANCE OF THIS SOFTWARE.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-* Developer: Kendall Bennett
-*
-* Description: This file contains the code to implement the decoding and
-* emulation of the FPU instructions.
-*
-****************************************************************************/
-
-#include "x86emu/x86emui.h"
-
-/*----------------------------- Implementation ----------------------------*/
-
-/* opcode=0xd8 */
-void x86emuOp_esc_coprocess_d8(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- DECODE_PRINTF("ESC D8\n");
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR_NO_TRACE();
-}
-
-#ifdef DEBUG
-
-static char *x86emu_fpu_op_d9_tab[] = {
- "FLD\tDWORD PTR ", "ESC_D9\t", "FST\tDWORD PTR ", "FSTP\tDWORD PTR ",
- "FLDENV\t", "FLDCW\t", "FSTENV\t", "FSTCW\t",
-
- "FLD\tDWORD PTR ", "ESC_D9\t", "FST\tDWORD PTR ", "FSTP\tDWORD PTR ",
- "FLDENV\t", "FLDCW\t", "FSTENV\t", "FSTCW\t",
-
- "FLD\tDWORD PTR ", "ESC_D9\t", "FST\tDWORD PTR ", "FSTP\tDWORD PTR ",
- "FLDENV\t", "FLDCW\t", "FSTENV\t", "FSTCW\t",
-};
-
-static char *x86emu_fpu_op_d9_tab1[] = {
- "FLD\t", "FLD\t", "FLD\t", "FLD\t",
- "FLD\t", "FLD\t", "FLD\t", "FLD\t",
-
- "FXCH\t", "FXCH\t", "FXCH\t", "FXCH\t",
- "FXCH\t", "FXCH\t", "FXCH\t", "FXCH\t",
-
- "FNOP", "ESC_D9", "ESC_D9", "ESC_D9",
- "ESC_D9", "ESC_D9", "ESC_D9", "ESC_D9",
-
- "FSTP\t", "FSTP\t", "FSTP\t", "FSTP\t",
- "FSTP\t", "FSTP\t", "FSTP\t", "FSTP\t",
-
- "FCHS", "FABS", "ESC_D9", "ESC_D9",
- "FTST", "FXAM", "ESC_D9", "ESC_D9",
-
- "FLD1", "FLDL2T", "FLDL2E", "FLDPI",
- "FLDLG2", "FLDLN2", "FLDZ", "ESC_D9",
-
- "F2XM1", "FYL2X", "FPTAN", "FPATAN",
- "FXTRACT", "ESC_D9", "FDECSTP", "FINCSTP",
-
- "FPREM", "FYL2XP1", "FSQRT", "ESC_D9",
- "FRNDINT", "FSCALE", "ESC_D9", "ESC_D9",
-};
-
-#endif /* DEBUG */
-
-/* opcode=0xd9 */
-void x86emuOp_esc_coprocess_d9(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint destoffset;
- u8 stkelem;
-
- START_OF_INSTR();
- FETCH_DECODE_MODRM(mod, rh, rl);
-#ifdef DEBUG
- if (mod != 3) {
- DECODE_PRINTINSTR32(x86emu_fpu_op_d9_tab, mod, rh, rl);
- } else {
- DECODE_PRINTF(x86emu_fpu_op_d9_tab1[(rh << 3) + rl]);
- }
-#endif
- switch (mod) {
- case 0:
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF("\n");
- break;
- case 1:
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF("\n");
- break;
- case 2:
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF("\n");
- break;
- case 3: /* register to register */
- stkelem = (u8)rl;
- if (rh < 4) {
- DECODE_PRINTF2("ST(%d)\n", stkelem);
- } else {
- DECODE_PRINTF("\n");
- }
- break;
- }
-#ifdef X86EMU_FPU_PRESENT
- /* execute */
- switch (mod) {
- case 3:
- switch (rh) {
- case 0:
- x86emu_fpu_R_fld(X86EMU_FPU_STKTOP, stkelem);
- break;
- case 1:
- x86emu_fpu_R_fxch(X86EMU_FPU_STKTOP, stkelem);
- break;
- case 2:
- switch (rl) {
- case 0:
- x86emu_fpu_R_nop();
- break;
- default:
- x86emu_fpu_illegal();
- break;
- }
- case 3:
- x86emu_fpu_R_fstp(X86EMU_FPU_STKTOP, stkelem);
- break;
- case 4:
- switch (rl) {
- case 0:
- x86emu_fpu_R_fchs(X86EMU_FPU_STKTOP);
- break;
- case 1:
- x86emu_fpu_R_fabs(X86EMU_FPU_STKTOP);
- break;
- case 4:
- x86emu_fpu_R_ftst(X86EMU_FPU_STKTOP);
- break;
- case 5:
- x86emu_fpu_R_fxam(X86EMU_FPU_STKTOP);
- break;
- default:
- /* 2,3,6,7 */
- x86emu_fpu_illegal();
- break;
- }
- break;
-
- case 5:
- switch (rl) {
- case 0:
- x86emu_fpu_R_fld1(X86EMU_FPU_STKTOP);
- break;
- case 1:
- x86emu_fpu_R_fldl2t(X86EMU_FPU_STKTOP);
- break;
- case 2:
- x86emu_fpu_R_fldl2e(X86EMU_FPU_STKTOP);
- break;
- case 3:
- x86emu_fpu_R_fldpi(X86EMU_FPU_STKTOP);
- break;
- case 4:
- x86emu_fpu_R_fldlg2(X86EMU_FPU_STKTOP);
- break;
- case 5:
- x86emu_fpu_R_fldln2(X86EMU_FPU_STKTOP);
- break;
- case 6:
- x86emu_fpu_R_fldz(X86EMU_FPU_STKTOP);
- break;
- default:
- /* 7 */
- x86emu_fpu_illegal();
- break;
- }
- break;
-
- case 6:
- switch (rl) {
- case 0:
- x86emu_fpu_R_f2xm1(X86EMU_FPU_STKTOP);
- break;
- case 1:
- x86emu_fpu_R_fyl2x(X86EMU_FPU_STKTOP);
- break;
- case 2:
- x86emu_fpu_R_fptan(X86EMU_FPU_STKTOP);
- break;
- case 3:
- x86emu_fpu_R_fpatan(X86EMU_FPU_STKTOP);
- break;
- case 4:
- x86emu_fpu_R_fxtract(X86EMU_FPU_STKTOP);
- break;
- case 5:
- x86emu_fpu_illegal();
- break;
- case 6:
- x86emu_fpu_R_decstp();
- break;
- case 7:
- x86emu_fpu_R_incstp();
- break;
- }
- break;
-
- case 7:
- switch (rl) {
- case 0:
- x86emu_fpu_R_fprem(X86EMU_FPU_STKTOP);
- break;
- case 1:
- x86emu_fpu_R_fyl2xp1(X86EMU_FPU_STKTOP);
- break;
- case 2:
- x86emu_fpu_R_fsqrt(X86EMU_FPU_STKTOP);
- break;
- case 3:
- x86emu_fpu_illegal();
- break;
- case 4:
- x86emu_fpu_R_frndint(X86EMU_FPU_STKTOP);
- break;
- case 5:
- x86emu_fpu_R_fscale(X86EMU_FPU_STKTOP);
- break;
- case 6:
- case 7:
- default:
- x86emu_fpu_illegal();
- break;
- }
- break;
-
- default:
- switch (rh) {
- case 0:
- x86emu_fpu_M_fld(X86EMU_FPU_FLOAT, destoffset);
- break;
- case 1:
- x86emu_fpu_illegal();
- break;
- case 2:
- x86emu_fpu_M_fst(X86EMU_FPU_FLOAT, destoffset);
- break;
- case 3:
- x86emu_fpu_M_fstp(X86EMU_FPU_FLOAT, destoffset);
- break;
- case 4:
- x86emu_fpu_M_fldenv(X86EMU_FPU_WORD, destoffset);
- break;
- case 5:
- x86emu_fpu_M_fldcw(X86EMU_FPU_WORD, destoffset);
- break;
- case 6:
- x86emu_fpu_M_fstenv(X86EMU_FPU_WORD, destoffset);
- break;
- case 7:
- x86emu_fpu_M_fstcw(X86EMU_FPU_WORD, destoffset);
- break;
- }
- }
- }
-#endif /* X86EMU_FPU_PRESENT */
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR_NO_TRACE();
-}
-
-#ifdef DEBUG
-
-char *x86emu_fpu_op_da_tab[] = {
- "FIADD\tDWORD PTR ", "FIMUL\tDWORD PTR ", "FICOM\tDWORD PTR ",
- "FICOMP\tDWORD PTR ",
- "FISUB\tDWORD PTR ", "FISUBR\tDWORD PTR ", "FIDIV\tDWORD PTR ",
- "FIDIVR\tDWORD PTR ",
-
- "FIADD\tDWORD PTR ", "FIMUL\tDWORD PTR ", "FICOM\tDWORD PTR ",
- "FICOMP\tDWORD PTR ",
- "FISUB\tDWORD PTR ", "FISUBR\tDWORD PTR ", "FIDIV\tDWORD PTR ",
- "FIDIVR\tDWORD PTR ",
-
- "FIADD\tDWORD PTR ", "FIMUL\tDWORD PTR ", "FICOM\tDWORD PTR ",
- "FICOMP\tDWORD PTR ",
- "FISUB\tDWORD PTR ", "FISUBR\tDWORD PTR ", "FIDIV\tDWORD PTR ",
- "FIDIVR\tDWORD PTR ",
-
- "ESC_DA ", "ESC_DA ", "ESC_DA ", "ESC_DA ",
- "ESC_DA ", "ESC_DA ", "ESC_DA ", "ESC_DA ",
-};
-
-#endif /* DEBUG */
-
-/* opcode=0xda */
-void x86emuOp_esc_coprocess_da(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint destoffset;
- u8 stkelem;
-
- START_OF_INSTR();
- FETCH_DECODE_MODRM(mod, rh, rl);
- DECODE_PRINTINSTR32(x86emu_fpu_op_da_tab, mod, rh, rl);
- switch (mod) {
- case 0:
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF("\n");
- break;
- case 1:
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF("\n");
- break;
- case 2:
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF("\n");
- break;
- case 3: /* register to register */
- stkelem = (u8)rl;
- DECODE_PRINTF2("\tST(%d),ST\n", stkelem);
- break;
- }
-#ifdef X86EMU_FPU_PRESENT
- switch (mod) {
- case 3:
- x86emu_fpu_illegal();
- break;
- default:
- switch (rh) {
- case 0:
- x86emu_fpu_M_iadd(X86EMU_FPU_SHORT, destoffset);
- break;
- case 1:
- x86emu_fpu_M_imul(X86EMU_FPU_SHORT, destoffset);
- break;
- case 2:
- x86emu_fpu_M_icom(X86EMU_FPU_SHORT, destoffset);
- break;
- case 3:
- x86emu_fpu_M_icomp(X86EMU_FPU_SHORT, destoffset);
- break;
- case 4:
- x86emu_fpu_M_isub(X86EMU_FPU_SHORT, destoffset);
- break;
- case 5:
- x86emu_fpu_M_isubr(X86EMU_FPU_SHORT, destoffset);
- break;
- case 6:
- x86emu_fpu_M_idiv(X86EMU_FPU_SHORT, destoffset);
- break;
- case 7:
- x86emu_fpu_M_idivr(X86EMU_FPU_SHORT, destoffset);
- break;
- }
- }
-#endif
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR_NO_TRACE();
-}
-
-#ifdef DEBUG
-
-char *x86emu_fpu_op_db_tab[] = {
- "FILD\tDWORD PTR ", "ESC_DB\t19", "FIST\tDWORD PTR ", "FISTP\tDWORD PTR ",
- "ESC_DB\t1C", "FLD\tTBYTE PTR ", "ESC_DB\t1E", "FSTP\tTBYTE PTR ",
-
- "FILD\tDWORD PTR ", "ESC_DB\t19", "FIST\tDWORD PTR ", "FISTP\tDWORD PTR ",
- "ESC_DB\t1C", "FLD\tTBYTE PTR ", "ESC_DB\t1E", "FSTP\tTBYTE PTR ",
-
- "FILD\tDWORD PTR ", "ESC_DB\t19", "FIST\tDWORD PTR ", "FISTP\tDWORD PTR ",
- "ESC_DB\t1C", "FLD\tTBYTE PTR ", "ESC_DB\t1E", "FSTP\tTBYTE PTR ",
-};
-
-#endif /* DEBUG */
-
-/* opcode=0xdb */
-void x86emuOp_esc_coprocess_db(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint destoffset;
-
- START_OF_INSTR();
- FETCH_DECODE_MODRM(mod, rh, rl);
-#ifdef DEBUG
- if (mod != 3) {
- DECODE_PRINTINSTR32(x86emu_fpu_op_db_tab, mod, rh, rl);
- } else if (rh == 4) { /* === 11 10 0 nnn */
- switch (rl) {
- case 0:
- DECODE_PRINTF("FENI\n");
- break;
- case 1:
- DECODE_PRINTF("FDISI\n");
- break;
- case 2:
- DECODE_PRINTF("FCLEX\n");
- break;
- case 3:
- DECODE_PRINTF("FINIT\n");
- break;
- }
- } else {
- DECODE_PRINTF2("ESC_DB %0x\n", (mod << 6) + (rh << 3) + (rl));
- }
-#endif /* DEBUG */
- switch (mod) {
- case 0:
- destoffset = decode_rm00_address(rl);
- break;
- case 1:
- destoffset = decode_rm01_address(rl);
- break;
- case 2:
- destoffset = decode_rm10_address(rl);
- break;
- case 3: /* register to register */
- break;
- }
-#ifdef X86EMU_FPU_PRESENT
- /* execute */
- switch (mod) {
- case 3:
- switch (rh) {
- case 4:
- switch (rl) {
- case 0:
- x86emu_fpu_R_feni();
- break;
- case 1:
- x86emu_fpu_R_fdisi();
- break;
- case 2:
- x86emu_fpu_R_fclex();
- break;
- case 3:
- x86emu_fpu_R_finit();
- break;
- default:
- x86emu_fpu_illegal();
- break;
- }
- break;
- default:
- x86emu_fpu_illegal();
- break;
- }
- break;
- default:
- switch (rh) {
- case 0:
- x86emu_fpu_M_fild(X86EMU_FPU_SHORT, destoffset);
- break;
- case 1:
- x86emu_fpu_illegal();
- break;
- case 2:
- x86emu_fpu_M_fist(X86EMU_FPU_SHORT, destoffset);
- break;
- case 3:
- x86emu_fpu_M_fistp(X86EMU_FPU_SHORT, destoffset);
- break;
- case 4:
- x86emu_fpu_illegal();
- break;
- case 5:
- x86emu_fpu_M_fld(X86EMU_FPU_LDBL, destoffset);
- break;
- case 6:
- x86emu_fpu_illegal();
- break;
- case 7:
- x86emu_fpu_M_fstp(X86EMU_FPU_LDBL, destoffset);
- break;
- }
- }
-#endif
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR_NO_TRACE();
-}
-
-#ifdef DEBUG
-char *x86emu_fpu_op_dc_tab[] = {
- "FADD\tQWORD PTR ", "FMUL\tQWORD PTR ", "FCOM\tQWORD PTR ",
- "FCOMP\tQWORD PTR ",
- "FSUB\tQWORD PTR ", "FSUBR\tQWORD PTR ", "FDIV\tQWORD PTR ",
- "FDIVR\tQWORD PTR ",
-
- "FADD\tQWORD PTR ", "FMUL\tQWORD PTR ", "FCOM\tQWORD PTR ",
- "FCOMP\tQWORD PTR ",
- "FSUB\tQWORD PTR ", "FSUBR\tQWORD PTR ", "FDIV\tQWORD PTR ",
- "FDIVR\tQWORD PTR ",
-
- "FADD\tQWORD PTR ", "FMUL\tQWORD PTR ", "FCOM\tQWORD PTR ",
- "FCOMP\tQWORD PTR ",
- "FSUB\tQWORD PTR ", "FSUBR\tQWORD PTR ", "FDIV\tQWORD PTR ",
- "FDIVR\tQWORD PTR ",
-
- "FADD\t", "FMUL\t", "FCOM\t", "FCOMP\t",
- "FSUBR\t", "FSUB\t", "FDIVR\t", "FDIV\t",
-};
-#endif /* DEBUG */
-
-/* opcode=0xdc */
-void x86emuOp_esc_coprocess_dc(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint destoffset;
- u8 stkelem;
-
- START_OF_INSTR();
- FETCH_DECODE_MODRM(mod, rh, rl);
- DECODE_PRINTINSTR32(x86emu_fpu_op_dc_tab, mod, rh, rl);
- switch (mod) {
- case 0:
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF("\n");
- break;
- case 1:
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF("\n");
- break;
- case 2:
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF("\n");
- break;
- case 3: /* register to register */
- stkelem = (u8)rl;
- DECODE_PRINTF2("\tST(%d),ST\n", stkelem);
- break;
- }
-#ifdef X86EMU_FPU_PRESENT
- /* execute */
- switch (mod) {
- case 3:
- switch (rh) {
- case 0:
- x86emu_fpu_R_fadd(stkelem, X86EMU_FPU_STKTOP);
- break;
- case 1:
- x86emu_fpu_R_fmul(stkelem, X86EMU_FPU_STKTOP);
- break;
- case 2:
- x86emu_fpu_R_fcom(stkelem, X86EMU_FPU_STKTOP);
- break;
- case 3:
- x86emu_fpu_R_fcomp(stkelem, X86EMU_FPU_STKTOP);
- break;
- case 4:
- x86emu_fpu_R_fsubr(stkelem, X86EMU_FPU_STKTOP);
- break;
- case 5:
- x86emu_fpu_R_fsub(stkelem, X86EMU_FPU_STKTOP);
- break;
- case 6:
- x86emu_fpu_R_fdivr(stkelem, X86EMU_FPU_STKTOP);
- break;
- case 7:
- x86emu_fpu_R_fdiv(stkelem, X86EMU_FPU_STKTOP);
- break;
- }
- break;
- default:
- switch (rh) {
- case 0:
- x86emu_fpu_M_fadd(X86EMU_FPU_DOUBLE, destoffset);
- break;
- case 1:
- x86emu_fpu_M_fmul(X86EMU_FPU_DOUBLE, destoffset);
- break;
- case 2:
- x86emu_fpu_M_fcom(X86EMU_FPU_DOUBLE, destoffset);
- break;
- case 3:
- x86emu_fpu_M_fcomp(X86EMU_FPU_DOUBLE, destoffset);
- break;
- case 4:
- x86emu_fpu_M_fsub(X86EMU_FPU_DOUBLE, destoffset);
- break;
- case 5:
- x86emu_fpu_M_fsubr(X86EMU_FPU_DOUBLE, destoffset);
- break;
- case 6:
- x86emu_fpu_M_fdiv(X86EMU_FPU_DOUBLE, destoffset);
- break;
- case 7:
- x86emu_fpu_M_fdivr(X86EMU_FPU_DOUBLE, destoffset);
- break;
- }
- }
-#endif
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR_NO_TRACE();
-}
-
-#ifdef DEBUG
-
-static char *x86emu_fpu_op_dd_tab[] = {
- "FLD\tQWORD PTR ", "ESC_DD\t29,", "FST\tQWORD PTR ", "FSTP\tQWORD PTR ",
- "FRSTOR\t", "ESC_DD\t2D,", "FSAVE\t", "FSTSW\t",
-
- "FLD\tQWORD PTR ", "ESC_DD\t29,", "FST\tQWORD PTR ", "FSTP\tQWORD PTR ",
- "FRSTOR\t", "ESC_DD\t2D,", "FSAVE\t", "FSTSW\t",
-
- "FLD\tQWORD PTR ", "ESC_DD\t29,", "FST\tQWORD PTR ", "FSTP\tQWORD PTR ",
- "FRSTOR\t", "ESC_DD\t2D,", "FSAVE\t", "FSTSW\t",
-
- "FFREE\t", "FXCH\t", "FST\t", "FSTP\t",
- "ESC_DD\t2C,", "ESC_DD\t2D,", "ESC_DD\t2E,", "ESC_DD\t2F,",
-};
-
-#endif /* DEBUG */
-
-/* opcode=0xdd */
-void x86emuOp_esc_coprocess_dd(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint destoffset;
- u8 stkelem;
-
- START_OF_INSTR();
- FETCH_DECODE_MODRM(mod, rh, rl);
- DECODE_PRINTINSTR32(x86emu_fpu_op_dd_tab, mod, rh, rl);
- switch (mod) {
- case 0:
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF("\n");
- break;
- case 1:
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF("\n");
- break;
- case 2:
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF("\n");
- break;
- case 3: /* register to register */
- stkelem = (u8)rl;
- DECODE_PRINTF2("\tST(%d),ST\n", stkelem);
- break;
- }
-#ifdef X86EMU_FPU_PRESENT
- switch (mod) {
- case 3:
- switch (rh) {
- case 0:
- x86emu_fpu_R_ffree(stkelem);
- break;
- case 1:
- x86emu_fpu_R_fxch(stkelem);
- break;
- case 2:
- x86emu_fpu_R_fst(stkelem); /* register version */
- break;
- case 3:
- x86emu_fpu_R_fstp(stkelem); /* register version */
- break;
- default:
- x86emu_fpu_illegal();
- break;
- }
- break;
- default:
- switch (rh) {
- case 0:
- x86emu_fpu_M_fld(X86EMU_FPU_DOUBLE, destoffset);
- break;
- case 1:
- x86emu_fpu_illegal();
- break;
- case 2:
- x86emu_fpu_M_fst(X86EMU_FPU_DOUBLE, destoffset);
- break;
- case 3:
- x86emu_fpu_M_fstp(X86EMU_FPU_DOUBLE, destoffset);
- break;
- case 4:
- x86emu_fpu_M_frstor(X86EMU_FPU_WORD, destoffset);
- break;
- case 5:
- x86emu_fpu_illegal();
- break;
- case 6:
- x86emu_fpu_M_fsave(X86EMU_FPU_WORD, destoffset);
- break;
- case 7:
- x86emu_fpu_M_fstsw(X86EMU_FPU_WORD, destoffset);
- break;
- }
- }
-#endif
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR_NO_TRACE();
-}
-
-#ifdef DEBUG
-
-static char *x86emu_fpu_op_de_tab[] =
-{
- "FIADD\tWORD PTR ", "FIMUL\tWORD PTR ", "FICOM\tWORD PTR ",
- "FICOMP\tWORD PTR ",
- "FISUB\tWORD PTR ", "FISUBR\tWORD PTR ", "FIDIV\tWORD PTR ",
- "FIDIVR\tWORD PTR ",
-
- "FIADD\tWORD PTR ", "FIMUL\tWORD PTR ", "FICOM\tWORD PTR ",
- "FICOMP\tWORD PTR ",
- "FISUB\tWORD PTR ", "FISUBR\tWORD PTR ", "FIDIV\tWORD PTR ",
- "FIDIVR\tWORD PTR ",
-
- "FIADD\tWORD PTR ", "FIMUL\tWORD PTR ", "FICOM\tWORD PTR ",
- "FICOMP\tWORD PTR ",
- "FISUB\tWORD PTR ", "FISUBR\tWORD PTR ", "FIDIV\tWORD PTR ",
- "FIDIVR\tWORD PTR ",
-
- "FADDP\t", "FMULP\t", "FCOMP\t", "FCOMPP\t",
- "FSUBRP\t", "FSUBP\t", "FDIVRP\t", "FDIVP\t",
-};
-
-#endif /* DEBUG */
-
-/* opcode=0xde */
-void x86emuOp_esc_coprocess_de(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint destoffset;
- u8 stkelem;
-
- START_OF_INSTR();
- FETCH_DECODE_MODRM(mod, rh, rl);
- DECODE_PRINTINSTR32(x86emu_fpu_op_de_tab, mod, rh, rl);
- switch (mod) {
- case 0:
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF("\n");
- break;
- case 1:
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF("\n");
- break;
- case 2:
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF("\n");
- break;
- case 3: /* register to register */
- stkelem = (u8)rl;
- DECODE_PRINTF2("\tST(%d),ST\n", stkelem);
- break;
- }
-#ifdef X86EMU_FPU_PRESENT
- switch (mod) {
- case 3:
- switch (rh) {
- case 0:
- x86emu_fpu_R_faddp(stkelem, X86EMU_FPU_STKTOP);
- break;
- case 1:
- x86emu_fpu_R_fmulp(stkelem, X86EMU_FPU_STKTOP);
- break;
- case 2:
- x86emu_fpu_R_fcomp(stkelem, X86EMU_FPU_STKTOP);
- break;
- case 3:
- if (stkelem == 1)
- x86emu_fpu_R_fcompp(stkelem, X86EMU_FPU_STKTOP);
- else
- x86emu_fpu_illegal();
- break;
- case 4:
- x86emu_fpu_R_fsubrp(stkelem, X86EMU_FPU_STKTOP);
- break;
- case 5:
- x86emu_fpu_R_fsubp(stkelem, X86EMU_FPU_STKTOP);
- break;
- case 6:
- x86emu_fpu_R_fdivrp(stkelem, X86EMU_FPU_STKTOP);
- break;
- case 7:
- x86emu_fpu_R_fdivp(stkelem, X86EMU_FPU_STKTOP);
- break;
- }
- break;
- default:
- switch (rh) {
- case 0:
- x86emu_fpu_M_fiadd(X86EMU_FPU_WORD, destoffset);
- break;
- case 1:
- x86emu_fpu_M_fimul(X86EMU_FPU_WORD, destoffset);
- break;
- case 2:
- x86emu_fpu_M_ficom(X86EMU_FPU_WORD, destoffset);
- break;
- case 3:
- x86emu_fpu_M_ficomp(X86EMU_FPU_WORD, destoffset);
- break;
- case 4:
- x86emu_fpu_M_fisub(X86EMU_FPU_WORD, destoffset);
- break;
- case 5:
- x86emu_fpu_M_fisubr(X86EMU_FPU_WORD, destoffset);
- break;
- case 6:
- x86emu_fpu_M_fidiv(X86EMU_FPU_WORD, destoffset);
- break;
- case 7:
- x86emu_fpu_M_fidivr(X86EMU_FPU_WORD, destoffset);
- break;
- }
- }
-#endif
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR_NO_TRACE();
-}
-
-#ifdef DEBUG
-
-static char *x86emu_fpu_op_df_tab[] = {
- /* mod == 00 */
- "FILD\tWORD PTR ", "ESC_DF\t39\n", "FIST\tWORD PTR ", "FISTP\tWORD PTR ",
- "FBLD\tTBYTE PTR ", "FILD\tQWORD PTR ", "FBSTP\tTBYTE PTR ",
- "FISTP\tQWORD PTR ",
-
- /* mod == 01 */
- "FILD\tWORD PTR ", "ESC_DF\t39 ", "FIST\tWORD PTR ", "FISTP\tWORD PTR ",
- "FBLD\tTBYTE PTR ", "FILD\tQWORD PTR ", "FBSTP\tTBYTE PTR ",
- "FISTP\tQWORD PTR ",
-
- /* mod == 10 */
- "FILD\tWORD PTR ", "ESC_DF\t39 ", "FIST\tWORD PTR ", "FISTP\tWORD PTR ",
- "FBLD\tTBYTE PTR ", "FILD\tQWORD PTR ", "FBSTP\tTBYTE PTR ",
- "FISTP\tQWORD PTR ",
-
- /* mod == 11 */
- "FFREE\t", "FXCH\t", "FST\t", "FSTP\t",
- "ESC_DF\t3C,", "ESC_DF\t3D,", "ESC_DF\t3E,", "ESC_DF\t3F,"
-};
-
-#endif /* DEBUG */
-
-/* opcode=0xdf */
-void x86emuOp_esc_coprocess_df(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint destoffset;
- u8 stkelem;
-
- START_OF_INSTR();
- FETCH_DECODE_MODRM(mod, rh, rl);
- DECODE_PRINTINSTR32(x86emu_fpu_op_df_tab, mod, rh, rl);
- switch (mod) {
- case 0:
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF("\n");
- break;
- case 1:
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF("\n");
- break;
- case 2:
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF("\n");
- break;
- case 3: /* register to register */
- stkelem = (u8)rl;
- DECODE_PRINTF2("\tST(%d)\n", stkelem);
- break;
- }
-#ifdef X86EMU_FPU_PRESENT
- switch (mod) {
- case 3:
- switch (rh) {
- case 0:
- x86emu_fpu_R_ffree(stkelem);
- break;
- case 1:
- x86emu_fpu_R_fxch(stkelem);
- break;
- case 2:
- x86emu_fpu_R_fst(stkelem); /* register version */
- break;
- case 3:
- x86emu_fpu_R_fstp(stkelem); /* register version */
- break;
- default:
- x86emu_fpu_illegal();
- break;
- }
- break;
- default:
- switch (rh) {
- case 0:
- x86emu_fpu_M_fild(X86EMU_FPU_WORD, destoffset);
- break;
- case 1:
- x86emu_fpu_illegal();
- break;
- case 2:
- x86emu_fpu_M_fist(X86EMU_FPU_WORD, destoffset);
- break;
- case 3:
- x86emu_fpu_M_fistp(X86EMU_FPU_WORD, destoffset);
- break;
- case 4:
- x86emu_fpu_M_fbld(X86EMU_FPU_BSD, destoffset);
- break;
- case 5:
- x86emu_fpu_M_fild(X86EMU_FPU_LONG, destoffset);
- break;
- case 6:
- x86emu_fpu_M_fbstp(X86EMU_FPU_BSD, destoffset);
- break;
- case 7:
- x86emu_fpu_M_fistp(X86EMU_FPU_LONG, destoffset);
- break;
- }
- }
-#endif
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR_NO_TRACE();
-}
diff --git a/board/MAI/bios_emulator/scitech/src/x86emu/makefile b/board/MAI/bios_emulator/scitech/src/x86emu/makefile
deleted file mode 100644
index 8ce2e9e848..0000000000
--- a/board/MAI/bios_emulator/scitech/src/x86emu/makefile
+++ /dev/null
@@ -1,63 +0,0 @@
-#############################################################################
-#
-# Realmode X86 Emulator Library
-#
-# Copyright (C) 1996-1999 SciTech Software, Inc.
-#
-# ========================================================================
-#
-# Permission to use, copy, modify, distribute, and sell this software and
-# its documentation for any purpose is hereby granted without fee,
-# provided that the above copyright notice appear in all copies and that
-# both that copyright notice and this permission notice appear in
-# supporting documentation, and that the name of the authors not be used
-# in advertising or publicity pertaining to distribution of the software
-# without specific, written prior permission. The authors makes no
-# representations about the suitability of this software for any purpose.
-# It is provided "as is" without express or implied warranty.
-#
-# THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
-# INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
-# EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
-# CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
-# USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
-# OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
-# PERFORMANCE OF THIS SOFTWARE.
-#
-# ========================================================================
-#
-# Descripton: Generic makefile for the x86emu library. Requires
-# the SciTech Software makefile definitions package to be
-# installed, which uses the DMAKE make program.
-#
-#############################################################################
-
-.IMPORT .IGNORE: DEBUG
-
-#----------------------------------------------------------------------------
-# Define the lists of object files
-#----------------------------------------------------------------------------
-
-OBJECTS = sys$O decode$O ops$O ops2$O prim_ops$O fpu$O debug$O
-CFLAGS += -DSCITECH
-.IF $(DEBUG)
-CFLAGS += -DDEBUG
-.ENDIF
-LIBCLEAN = *.dll *.lib *.a
-LIBFILE = $(LP)x86emu$L
-
-#----------------------------------------------------------------------------
-# Sample test programs
-#----------------------------------------------------------------------------
-
-all: $(LIBFILE)
-
-validate$E: validate$O $(LIBFILE)
-
-#----------------------------------------------------------------------------
-# Define the list of object files to create dependency information for
-#----------------------------------------------------------------------------
-
-DEPEND_OBJ = validate$O $(OBJECTS)
-
-.INCLUDE: "$(SCITECH)/makedefs/common.mk"
diff --git a/board/MAI/bios_emulator/scitech/src/x86emu/makefile.cross b/board/MAI/bios_emulator/scitech/src/x86emu/makefile.cross
deleted file mode 100644
index 0bce9a96e5..0000000000
--- a/board/MAI/bios_emulator/scitech/src/x86emu/makefile.cross
+++ /dev/null
@@ -1,82 +0,0 @@
-#############################################################################
-#
-# Realmode X86 Emulator Library
-#
-# Copyright (C) 1996-1999 SciTech Software, Inc.
-#
-# ========================================================================
-#
-# Permission to use, copy, modify, distribute, and sell this software and
-# its documentation for any purpose is hereby granted without fee,
-# provided that the above copyright notice appear in all copies and that
-# both that copyright notice and this permission notice appear in
-# supporting documentation, and that the name of the authors not be used
-# in advertising or publicity pertaining to distribution of the software
-# without specific, written prior permission. The authors makes no
-# representations about the suitability of this software for any purpose.
-# It is provided "as is" without express or implied warranty.
-#
-# THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
-# INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
-# EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
-# CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
-# USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
-# OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
-# PERFORMANCE OF THIS SOFTWARE.
-#
-# ========================================================================
-#
-# Descripton: Linux specific makefile for the x86emu library.
-#
-#############################################################################
-
-CC = $(CROSS_COMPILE)gcc
-AR = $(CROSS_COMPILE)ar
-
-TARGETLIB = libx86emu.a
-TARGETDEBUGLIB =libx86emud.a
-
-OBJS=\
-decode.o \
-fpu.o \
-ops.o \
-ops2.o \
-prim_ops.o \
-sys.o
-
-DEBUGOBJS=debug.d \
- decode.d \
- fpu.d \
- ops.d \
- ops2.d \
- prim_ops.d \
- sys.d
-
-.SUFFIXES: .d
-
-all: $(TARGETLIB) $(TARGETDEBUGLIB)
-
-$(TARGETLIB): $(OBJS)
- $(AR) rv $(TARGETLIB) $(OBJS)
-
-$(TARGETDEBUGLIB): $(DEBUGOBJS)
- $(AR) rv $(TARGETDEBUGLIB) $(DEBUGOBJS)
-
-INCS = -I. -Ix86emu -I../../include
-CFLAGS = -D__DRIVER__ -DFORCE_POST -D_CEXPORT= -DNO_LONG_LONG -Dprintk=printf -fsigned-char -fomit-frame-pointer -fPIC -ffixed-r14 -meabi
-CDEBUGFLAGS = -DDEBUG
-
-.c.o:
- $(CC) -g -O2 -Wall -c $(CFLAGS) $(INCS) $*.c
-
-.c.d:
- $(CC) -g -O2 -Wall -c -o$*.d $(CFLAGS) $(CDEBUGFLAGS) $(INCS) $*.c
-
-.cpp.o:
- $(CC) -c $(CFLAGS) $(INCS) $*.cpp
-
-clean:
- rm -f *.a *.o *.d
-
-validate: validate.o libx86emu.a
- $(CC) -o validate validate.o -lx86emu -L.
diff --git a/board/MAI/bios_emulator/scitech/src/x86emu/makefile.linux b/board/MAI/bios_emulator/scitech/src/x86emu/makefile.linux
deleted file mode 100644
index f74b88d4c8..0000000000
--- a/board/MAI/bios_emulator/scitech/src/x86emu/makefile.linux
+++ /dev/null
@@ -1,81 +0,0 @@
-#############################################################################
-#
-# Realmode X86 Emulator Library
-#
-# Copyright (C) 1996-1999 SciTech Software, Inc.
-#
-# ========================================================================
-#
-# Permission to use, copy, modify, distribute, and sell this software and
-# its documentation for any purpose is hereby granted without fee,
-# provided that the above copyright notice appear in all copies and that
-# both that copyright notice and this permission notice appear in
-# supporting documentation, and that the name of the authors not be used
-# in advertising or publicity pertaining to distribution of the software
-# without specific, written prior permission. The authors makes no
-# representations about the suitability of this software for any purpose.
-# It is provided "as is" without express or implied warranty.
-#
-# THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
-# INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
-# EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
-# CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
-# USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
-# OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
-# PERFORMANCE OF THIS SOFTWARE.
-#
-# ========================================================================
-#
-# Descripton: Linux specific makefile for the x86emu library.
-#
-#############################################################################
-
-TARGETLIB = libx86emu.a
-TARGETDEBUGLIB =libx86emud.a
-
-OBJS=\
-decode.o \
-fpu.o \
-ops.o \
-ops2.o \
-prim_ops.o \
-pregs.o \
-sys.o
-
-DEBUGOBJS=debug.d \
- decode.d \
- fpu.d \
- ops.d \
- ops2.d \
- prim_ops.d \
- pregs.d \
- sys.d
-
-.SUFFIXES: .d
-
-all: $(TARGETLIB) $(TARGETDEBUGLIB)
-
-$(TARGETLIB): $(OBJS)
- ar rv $(TARGETLIB) $(OBJS)
-
-$(TARGETDEBUGLIB): $(DEBUGOBJS)
- ar rv $(TARGETDEBUGLIB) $(DEBUGOBJS)
-
-INCS = -I. -Ix86emu -I../../include
-CFLAGS = -D__DRIVER__ -DFORCE_POST -D_CEXPORT= -DNO_LONG_LONG
-CDEBUGFLAGS = -DDEBUG
-
-.c.o:
- gcc -g -O -Wall -c $(CFLAGS) $(INCS) $*.c
-
-.c.d:
- gcc -g -O -Wall -c -o$*.d $(CFLAGS) $(CDEBUGFLAGS) $(INCS) $*.c
-
-.cpp.o:
- gcc -c $(CFLAGS) $(INCS) $*.cpp
-
-clean:
- rm -f *.a *.o *.d
-
-validate: validate.o libx86emu.a
- gcc -o validate validate.o -lx86emu -L.
diff --git a/board/MAI/bios_emulator/scitech/src/x86emu/makefile.uboot b/board/MAI/bios_emulator/scitech/src/x86emu/makefile.uboot
deleted file mode 100644
index af9ae1f589..0000000000
--- a/board/MAI/bios_emulator/scitech/src/x86emu/makefile.uboot
+++ /dev/null
@@ -1,80 +0,0 @@
-#############################################################################
-#
-# Realmode X86 Emulator Library
-#
-# Copyright (C) 1996-1999 SciTech Software, Inc.
-#
-# ========================================================================
-#
-# Permission to use, copy, modify, distribute, and sell this software and
-# its documentation for any purpose is hereby granted without fee,
-# provided that the above copyright notice appear in all copies and that
-# both that copyright notice and this permission notice appear in
-# supporting documentation, and that the name of the authors not be used
-# in advertising or publicity pertaining to distribution of the software
-# without specific, written prior permission. The authors makes no
-# representations about the suitability of this software for any purpose.
-# It is provided "as is" without express or implied warranty.
-#
-# THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
-# INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
-# EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
-# CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
-# USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
-# OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
-# PERFORMANCE OF THIS SOFTWARE.
-#
-# ========================================================================
-#
-# Descripton: Linux specific makefile for the x86emu library.
-#
-#############################################################################
-CC = $(CROSS_COMPILE)gcc
-AR = $(CROSS_COMPILE)ar
-TARGETLIB = libx86emu.a
-TARGETDEBUGLIB =libx86emud.a
-
-OBJS=\
-decode.o \
-fpu.o \
-ops.o \
-ops2.o \
-prim_ops.o \
-sys.o
-
-DEBUGOBJS=debug.d \
- decode.d \
- fpu.d \
- ops.d \
- ops2.d \
- prim_ops.d \
- sys.d
-
-.SUFFIXES: .d
-
-all: $(TARGETLIB) $(TARGETDEBUGLIB)
-
-$(TARGETLIB): $(OBJS)
- $(AR) rv $(TARGETLIB) $(OBJS)
-
-$(TARGETDEBUGLIB): $(DEBUGOBJS)
- $(AR) rv $(TARGETDEBUGLIB) $(DEBUGOBJS)
-
-INCS = -I. -Ix86emu -I../../include
-CFLAGS = -D__DRIVER__ -DFORCE_POST -D_CEXPORT= -DNO_LONG_LONG -Dprintk=printf -fsigned-char -fomit-frame-pointer -fPIC -ffixed-r14 -meabi
-CDEBUGFLAGS = -DDEBUG
-
-.c.o:
- $(CC) -g -O2 -Wall -c $(CFLAGS) $(INCS) $*.c
-
-.c.d:
- $(CC) -g -O2 -Wall -c -o$*.d $(CFLAGS) $(CDEBUGFLAGS) $(INCS) $*.c
-
-.cpp.o:
- $(CC) -c $(CFLAGS) $(INCS) $*.cpp
-
-clean:
- rm -f *.a *.o *.d
-
-validate: validate.o libx86emu.a
- $(CC) -o validate validate.o -lx86emu -L.
diff --git a/board/MAI/bios_emulator/scitech/src/x86emu/ops.c b/board/MAI/bios_emulator/scitech/src/x86emu/ops.c
deleted file mode 100644
index 2d4f93eee4..0000000000
--- a/board/MAI/bios_emulator/scitech/src/x86emu/ops.c
+++ /dev/null
@@ -1,11701 +0,0 @@
-/****************************************************************************
-*
-* Realmode X86 Emulator Library
-*
-* Copyright (C) 1996-1999 SciTech Software, Inc.
-* Copyright (C) David Mosberger-Tang
-* Copyright (C) 1999 Egbert Eich
-*
-* ========================================================================
-*
-* Permission to use, copy, modify, distribute, and sell this software and
-* its documentation for any purpose is hereby granted without fee,
-* provided that the above copyright notice appear in all copies and that
-* both that copyright notice and this permission notice appear in
-* supporting documentation, and that the name of the authors not be used
-* in advertising or publicity pertaining to distribution of the software
-* without specific, written prior permission. The authors makes no
-* representations about the suitability of this software for any purpose.
-* It is provided "as is" without express or implied warranty.
-*
-* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
-* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
-* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
-* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
-* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
-* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
-* PERFORMANCE OF THIS SOFTWARE.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-* Developer: Kendall Bennett
-*
-* Description: This file includes subroutines to implement the decoding
-* and emulation of all the x86 processor instructions.
-*
-* There are approximately 250 subroutines in here, which correspond
-* to the 256 byte-"opcodes" found on the 8086. The table which
-* dispatches this is found in the files optab.[ch].
-*
-* Each opcode proc has a comment preceeding it which gives it's table
-* address. Several opcodes are missing (undefined) in the table.
-*
-* Each proc includes information for decoding (DECODE_PRINTF and
-* DECODE_PRINTF2), debugging (TRACE_REGS, SINGLE_STEP), and misc
-* functions (START_OF_INSTR, END_OF_INSTR).
-*
-* Many of the procedures are *VERY* similar in coding. This has
-* allowed for a very large amount of code to be generated in a fairly
-* short amount of time (i.e. cut, paste, and modify). The result is
-* that much of the code below could have been folded into subroutines
-* for a large reduction in size of this file. The downside would be
-* that there would be a penalty in execution speed. The file could
-* also have been *MUCH* larger by inlining certain functions which
-* were called. This could have resulted even faster execution. The
-* prime directive I used to decide whether to inline the code or to
-* modularize it, was basically: 1) no unnecessary subroutine calls,
-* 2) no routines more than about 200 lines in size, and 3) modularize
-* any code that I might not get right the first time. The fetch_*
-* subroutines fall into the latter category. The The decode_* fall
-* into the second category. The coding of the "switch(mod){ .... }"
-* in many of the subroutines below falls into the first category.
-* Especially, the coding of {add,and,or,sub,...}_{byte,word}
-* subroutines are an especially glaring case of the third guideline.
-* Since so much of the code is cloned from other modules (compare
-* opcode #00 to opcode #01), making the basic operations subroutine
-* calls is especially important; otherwise mistakes in coding an
-* "add" would represent a nightmare in maintenance.
-*
-****************************************************************************/
-
-#include "x86emu/x86emui.h"
-
-/*----------------------------- Implementation ----------------------------*/
-
-/****************************************************************************
-PARAMETERS:
-op1 - Instruction op code
-
-REMARKS:
-Handles illegal opcodes.
-****************************************************************************/
-void x86emuOp_illegal_op(
- u8 op1)
-{
- START_OF_INSTR();
- DECODE_PRINTF("ILLEGAL X86 OPCODE\n");
- TRACE_REGS();
- printk("%04x:%04x: %02X ILLEGAL X86 OPCODE!\n",
- M.x86.R_CS, M.x86.R_IP-1,op1);
- HALT_SYS();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x00
-****************************************************************************/
-void x86emuOp_add_byte_RM_R(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint destoffset;
- u8 *destreg, *srcreg;
- u8 destval;
-
- START_OF_INSTR();
- DECODE_PRINTF("ADD\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_byte(destoffset);
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = add_byte(destval, *srcreg);
- store_data_byte(destoffset, destval);
- break;
- case 1:
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_byte(destoffset);
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = add_byte(destval, *srcreg);
- store_data_byte(destoffset, destval);
- break;
- case 2:
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_byte(destoffset);
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = add_byte(destval, *srcreg);
- store_data_byte(destoffset, destval);
- break;
- case 3: /* register to register */
- destreg = DECODE_RM_BYTE_REGISTER(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = add_byte(*destreg, *srcreg);
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x01
-****************************************************************************/
-void x86emuOp_add_word_RM_R(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint destoffset;
-
- START_OF_INSTR();
- DECODE_PRINTF("ADD\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *srcreg;
-
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_long(destoffset);
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = add_long(destval, *srcreg);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
- u16 *srcreg;
-
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_word(destoffset);
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = add_word(destval, *srcreg);
- store_data_word(destoffset, destval);
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *srcreg;
-
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_long(destoffset);
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = add_long(destval, *srcreg);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
- u16 *srcreg;
-
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_word(destoffset);
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = add_word(destval, *srcreg);
- store_data_word(destoffset, destval);
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *srcreg;
-
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_long(destoffset);
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = add_long(destval, *srcreg);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
- u16 *srcreg;
-
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_word(destoffset);
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = add_word(destval, *srcreg);
- store_data_word(destoffset, destval);
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg,*srcreg;
-
- destreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = add_long(*destreg, *srcreg);
- } else {
- u16 *destreg,*srcreg;
-
- destreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = add_word(*destreg, *srcreg);
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x02
-****************************************************************************/
-void x86emuOp_add_byte_R_RM(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- u8 *destreg, *srcreg;
- uint srcoffset;
- u8 srcval;
-
- START_OF_INSTR();
- DECODE_PRINTF("ADD\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- destreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = fetch_data_byte(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = add_byte(*destreg, srcval);
- break;
- case 1:
- destreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = fetch_data_byte(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = add_byte(*destreg, srcval);
- break;
- case 2:
- destreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = fetch_data_byte(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = add_byte(*destreg, srcval);
- break;
- case 3: /* register to register */
- destreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_BYTE_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = add_byte(*destreg, *srcreg);
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x03
-****************************************************************************/
-void x86emuOp_add_word_R_RM(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint srcoffset;
-
- START_OF_INSTR();
- DECODE_PRINTF("ADD\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = fetch_data_long(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = add_long(*destreg, srcval);
- } else {
- u16 *destreg;
- u16 srcval;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = fetch_data_word(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = add_word(*destreg, srcval);
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = fetch_data_long(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = add_long(*destreg, srcval);
- } else {
- u16 *destreg;
- u16 srcval;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = fetch_data_word(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = add_word(*destreg, srcval);
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = fetch_data_long(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = add_long(*destreg, srcval);
- } else {
- u16 *destreg;
- u16 srcval;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = fetch_data_word(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = add_word(*destreg, srcval);
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg,*srcreg;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = add_long(*destreg, *srcreg);
- } else {
- u16 *destreg,*srcreg;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = add_word(*destreg, *srcreg);
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x04
-****************************************************************************/
-void x86emuOp_add_byte_AL_IMM(u8 X86EMU_UNUSED(op1))
-{
- u8 srcval;
-
- START_OF_INSTR();
- DECODE_PRINTF("ADD\tAL,");
- srcval = fetch_byte_imm();
- DECODE_PRINTF2("%x\n", srcval);
- TRACE_AND_STEP();
- M.x86.R_AL = add_byte(M.x86.R_AL, srcval);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x05
-****************************************************************************/
-void x86emuOp_add_word_AX_IMM(u8 X86EMU_UNUSED(op1))
-{
- u32 srcval;
-
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("ADD\tEAX,");
- srcval = fetch_long_imm();
- } else {
- DECODE_PRINTF("ADD\tAX,");
- srcval = fetch_word_imm();
- }
- DECODE_PRINTF2("%x\n", srcval);
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_EAX = add_long(M.x86.R_EAX, srcval);
- } else {
- M.x86.R_AX = add_word(M.x86.R_AX, (u16)srcval);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x06
-****************************************************************************/
-void x86emuOp_push_ES(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- DECODE_PRINTF("PUSH\tES\n");
- TRACE_AND_STEP();
- push_word(M.x86.R_ES);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x07
-****************************************************************************/
-void x86emuOp_pop_ES(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- DECODE_PRINTF("POP\tES\n");
- TRACE_AND_STEP();
- M.x86.R_ES = pop_word();
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x08
-****************************************************************************/
-void x86emuOp_or_byte_RM_R(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- u8 *destreg, *srcreg;
- uint destoffset;
- u8 destval;
-
- START_OF_INSTR();
- DECODE_PRINTF("OR\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_byte(destoffset);
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = or_byte(destval, *srcreg);
- store_data_byte(destoffset, destval);
- break;
- case 1:
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_byte(destoffset);
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = or_byte(destval, *srcreg);
- store_data_byte(destoffset, destval);
- break;
- case 2:
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_byte(destoffset);
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = or_byte(destval, *srcreg);
- store_data_byte(destoffset, destval);
- break;
- case 3: /* register to register */
- destreg = DECODE_RM_BYTE_REGISTER(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = or_byte(*destreg, *srcreg);
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x09
-****************************************************************************/
-void x86emuOp_or_word_RM_R(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint destoffset;
-
- START_OF_INSTR();
- DECODE_PRINTF("OR\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *srcreg;
-
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_long(destoffset);
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = or_long(destval, *srcreg);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
- u16 *srcreg;
-
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_word(destoffset);
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = or_word(destval, *srcreg);
- store_data_word(destoffset, destval);
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *srcreg;
-
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_long(destoffset);
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = or_long(destval, *srcreg);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
- u16 *srcreg;
-
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_word(destoffset);
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = or_word(destval, *srcreg);
- store_data_word(destoffset, destval);
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *srcreg;
-
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_long(destoffset);
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = or_long(destval, *srcreg);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
- u16 *srcreg;
-
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_word(destoffset);
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = or_word(destval, *srcreg);
- store_data_word(destoffset, destval);
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg,*srcreg;
-
- destreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = or_long(*destreg, *srcreg);
- } else {
- u16 *destreg,*srcreg;
-
- destreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = or_word(*destreg, *srcreg);
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x0a
-****************************************************************************/
-void x86emuOp_or_byte_R_RM(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- u8 *destreg, *srcreg;
- uint srcoffset;
- u8 srcval;
-
- START_OF_INSTR();
- DECODE_PRINTF("OR\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- destreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = fetch_data_byte(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = or_byte(*destreg, srcval);
- break;
- case 1:
- destreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = fetch_data_byte(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = or_byte(*destreg, srcval);
- break;
- case 2:
- destreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = fetch_data_byte(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = or_byte(*destreg, srcval);
- break;
- case 3: /* register to register */
- destreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_BYTE_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = or_byte(*destreg, *srcreg);
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x0b
-****************************************************************************/
-void x86emuOp_or_word_R_RM(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint srcoffset;
-
- START_OF_INSTR();
- DECODE_PRINTF("OR\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = fetch_data_long(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = or_long(*destreg, srcval);
- } else {
- u16 *destreg;
- u16 srcval;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = fetch_data_word(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = or_word(*destreg, srcval);
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = fetch_data_long(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = or_long(*destreg, srcval);
- } else {
- u16 *destreg;
- u16 srcval;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = fetch_data_word(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = or_word(*destreg, srcval);
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = fetch_data_long(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = or_long(*destreg, srcval);
- } else {
- u16 *destreg;
- u16 srcval;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = fetch_data_word(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = or_word(*destreg, srcval);
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg,*srcreg;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = or_long(*destreg, *srcreg);
- } else {
- u16 *destreg,*srcreg;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = or_word(*destreg, *srcreg);
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x0c
-****************************************************************************/
-void x86emuOp_or_byte_AL_IMM(u8 X86EMU_UNUSED(op1))
-{
- u8 srcval;
-
- START_OF_INSTR();
- DECODE_PRINTF("OR\tAL,");
- srcval = fetch_byte_imm();
- DECODE_PRINTF2("%x\n", srcval);
- TRACE_AND_STEP();
- M.x86.R_AL = or_byte(M.x86.R_AL, srcval);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x0d
-****************************************************************************/
-void x86emuOp_or_word_AX_IMM(u8 X86EMU_UNUSED(op1))
-{
- u32 srcval;
-
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("OR\tEAX,");
- srcval = fetch_long_imm();
- } else {
- DECODE_PRINTF("OR\tAX,");
- srcval = fetch_word_imm();
- }
- DECODE_PRINTF2("%x\n", srcval);
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_EAX = or_long(M.x86.R_EAX, srcval);
- } else {
- M.x86.R_AX = or_word(M.x86.R_AX, (u16)srcval);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x0e
-****************************************************************************/
-void x86emuOp_push_CS(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- DECODE_PRINTF("PUSH\tCS\n");
- TRACE_AND_STEP();
- push_word(M.x86.R_CS);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x0f. Escape for two-byte opcode (286 or better)
-****************************************************************************/
-void x86emuOp_two_byte(u8 X86EMU_UNUSED(op1))
-{
- u8 op2 = (*sys_rdb)(((u32)M.x86.R_CS << 4) + (M.x86.R_IP++));
- INC_DECODED_INST_LEN(1);
- (*x86emu_optab2[op2])(op2);
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x10
-****************************************************************************/
-void x86emuOp_adc_byte_RM_R(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- u8 *destreg, *srcreg;
- uint destoffset;
- u8 destval;
-
- START_OF_INSTR();
- DECODE_PRINTF("ADC\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_byte(destoffset);
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = adc_byte(destval, *srcreg);
- store_data_byte(destoffset, destval);
- break;
- case 1:
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_byte(destoffset);
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = adc_byte(destval, *srcreg);
- store_data_byte(destoffset, destval);
- break;
- case 2:
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_byte(destoffset);
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = adc_byte(destval, *srcreg);
- store_data_byte(destoffset, destval);
- break;
- case 3: /* register to register */
- destreg = DECODE_RM_BYTE_REGISTER(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = adc_byte(*destreg, *srcreg);
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x11
-****************************************************************************/
-void x86emuOp_adc_word_RM_R(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint destoffset;
-
- START_OF_INSTR();
- DECODE_PRINTF("ADC\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *srcreg;
-
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_long(destoffset);
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = adc_long(destval, *srcreg);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
- u16 *srcreg;
-
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_word(destoffset);
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = adc_word(destval, *srcreg);
- store_data_word(destoffset, destval);
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *srcreg;
-
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_long(destoffset);
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = adc_long(destval, *srcreg);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
- u16 *srcreg;
-
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_word(destoffset);
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = adc_word(destval, *srcreg);
- store_data_word(destoffset, destval);
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *srcreg;
-
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_long(destoffset);
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = adc_long(destval, *srcreg);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
- u16 *srcreg;
-
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_word(destoffset);
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = adc_word(destval, *srcreg);
- store_data_word(destoffset, destval);
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg,*srcreg;
-
- destreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = adc_long(*destreg, *srcreg);
- } else {
- u16 *destreg,*srcreg;
-
- destreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = adc_word(*destreg, *srcreg);
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x12
-****************************************************************************/
-void x86emuOp_adc_byte_R_RM(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- u8 *destreg, *srcreg;
- uint srcoffset;
- u8 srcval;
-
- START_OF_INSTR();
- DECODE_PRINTF("ADC\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- destreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = fetch_data_byte(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = adc_byte(*destreg, srcval);
- break;
- case 1:
- destreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = fetch_data_byte(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = adc_byte(*destreg, srcval);
- break;
- case 2:
- destreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = fetch_data_byte(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = adc_byte(*destreg, srcval);
- break;
- case 3: /* register to register */
- destreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_BYTE_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = adc_byte(*destreg, *srcreg);
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x13
-****************************************************************************/
-void x86emuOp_adc_word_R_RM(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint srcoffset;
-
- START_OF_INSTR();
- DECODE_PRINTF("ADC\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = fetch_data_long(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = adc_long(*destreg, srcval);
- } else {
- u16 *destreg;
- u16 srcval;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = fetch_data_word(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = adc_word(*destreg, srcval);
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = fetch_data_long(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = adc_long(*destreg, srcval);
- } else {
- u16 *destreg;
- u16 srcval;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = fetch_data_word(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = adc_word(*destreg, srcval);
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = fetch_data_long(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = adc_long(*destreg, srcval);
- } else {
- u16 *destreg;
- u16 srcval;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = fetch_data_word(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = adc_word(*destreg, srcval);
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg,*srcreg;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = adc_long(*destreg, *srcreg);
- } else {
- u16 *destreg,*srcreg;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = adc_word(*destreg, *srcreg);
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x14
-****************************************************************************/
-void x86emuOp_adc_byte_AL_IMM(u8 X86EMU_UNUSED(op1))
-{
- u8 srcval;
-
- START_OF_INSTR();
- DECODE_PRINTF("ADC\tAL,");
- srcval = fetch_byte_imm();
- DECODE_PRINTF2("%x\n", srcval);
- TRACE_AND_STEP();
- M.x86.R_AL = adc_byte(M.x86.R_AL, srcval);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x15
-****************************************************************************/
-void x86emuOp_adc_word_AX_IMM(u8 X86EMU_UNUSED(op1))
-{
- u32 srcval;
-
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("ADC\tEAX,");
- srcval = fetch_long_imm();
- } else {
- DECODE_PRINTF("ADC\tAX,");
- srcval = fetch_word_imm();
- }
- DECODE_PRINTF2("%x\n", srcval);
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_EAX = adc_long(M.x86.R_EAX, srcval);
- } else {
- M.x86.R_AX = adc_word(M.x86.R_AX, (u16)srcval);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x16
-****************************************************************************/
-void x86emuOp_push_SS(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- DECODE_PRINTF("PUSH\tSS\n");
- TRACE_AND_STEP();
- push_word(M.x86.R_SS);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x17
-****************************************************************************/
-void x86emuOp_pop_SS(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- DECODE_PRINTF("POP\tSS\n");
- TRACE_AND_STEP();
- M.x86.R_SS = pop_word();
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x18
-****************************************************************************/
-void x86emuOp_sbb_byte_RM_R(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- u8 *destreg, *srcreg;
- uint destoffset;
- u8 destval;
-
- START_OF_INSTR();
- DECODE_PRINTF("SBB\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_byte(destoffset);
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = sbb_byte(destval, *srcreg);
- store_data_byte(destoffset, destval);
- break;
- case 1:
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_byte(destoffset);
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = sbb_byte(destval, *srcreg);
- store_data_byte(destoffset, destval);
- break;
- case 2:
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_byte(destoffset);
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = sbb_byte(destval, *srcreg);
- store_data_byte(destoffset, destval);
- break;
- case 3: /* register to register */
- destreg = DECODE_RM_BYTE_REGISTER(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = sbb_byte(*destreg, *srcreg);
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x19
-****************************************************************************/
-void x86emuOp_sbb_word_RM_R(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint destoffset;
-
- START_OF_INSTR();
- DECODE_PRINTF("SBB\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *srcreg;
-
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_long(destoffset);
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = sbb_long(destval, *srcreg);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
- u16 *srcreg;
-
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_word(destoffset);
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = sbb_word(destval, *srcreg);
- store_data_word(destoffset, destval);
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *srcreg;
-
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_long(destoffset);
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = sbb_long(destval, *srcreg);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
- u16 *srcreg;
-
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_word(destoffset);
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = sbb_word(destval, *srcreg);
- store_data_word(destoffset, destval);
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *srcreg;
-
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_long(destoffset);
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = sbb_long(destval, *srcreg);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
- u16 *srcreg;
-
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_word(destoffset);
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = sbb_word(destval, *srcreg);
- store_data_word(destoffset, destval);
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg,*srcreg;
-
- destreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = sbb_long(*destreg, *srcreg);
- } else {
- u16 *destreg,*srcreg;
-
- destreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = sbb_word(*destreg, *srcreg);
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x1a
-****************************************************************************/
-void x86emuOp_sbb_byte_R_RM(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- u8 *destreg, *srcreg;
- uint srcoffset;
- u8 srcval;
-
- START_OF_INSTR();
- DECODE_PRINTF("SBB\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- destreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = fetch_data_byte(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = sbb_byte(*destreg, srcval);
- break;
- case 1:
- destreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = fetch_data_byte(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = sbb_byte(*destreg, srcval);
- break;
- case 2:
- destreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = fetch_data_byte(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = sbb_byte(*destreg, srcval);
- break;
- case 3: /* register to register */
- destreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_BYTE_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = sbb_byte(*destreg, *srcreg);
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x1b
-****************************************************************************/
-void x86emuOp_sbb_word_R_RM(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint srcoffset;
-
- START_OF_INSTR();
- DECODE_PRINTF("SBB\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = fetch_data_long(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = sbb_long(*destreg, srcval);
- } else {
- u16 *destreg;
- u16 srcval;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = fetch_data_word(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = sbb_word(*destreg, srcval);
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = fetch_data_long(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = sbb_long(*destreg, srcval);
- } else {
- u16 *destreg;
- u16 srcval;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = fetch_data_word(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = sbb_word(*destreg, srcval);
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = fetch_data_long(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = sbb_long(*destreg, srcval);
- } else {
- u16 *destreg;
- u16 srcval;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = fetch_data_word(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = sbb_word(*destreg, srcval);
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg,*srcreg;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = sbb_long(*destreg, *srcreg);
- } else {
- u16 *destreg,*srcreg;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = sbb_word(*destreg, *srcreg);
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x1c
-****************************************************************************/
-void x86emuOp_sbb_byte_AL_IMM(u8 X86EMU_UNUSED(op1))
-{
- u8 srcval;
-
- START_OF_INSTR();
- DECODE_PRINTF("SBB\tAL,");
- srcval = fetch_byte_imm();
- DECODE_PRINTF2("%x\n", srcval);
- TRACE_AND_STEP();
- M.x86.R_AL = sbb_byte(M.x86.R_AL, srcval);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x1d
-****************************************************************************/
-void x86emuOp_sbb_word_AX_IMM(u8 X86EMU_UNUSED(op1))
-{
- u32 srcval;
-
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("SBB\tEAX,");
- srcval = fetch_long_imm();
- } else {
- DECODE_PRINTF("SBB\tAX,");
- srcval = fetch_word_imm();
- }
- DECODE_PRINTF2("%x\n", srcval);
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_EAX = sbb_long(M.x86.R_EAX, srcval);
- } else {
- M.x86.R_AX = sbb_word(M.x86.R_AX, (u16)srcval);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x1e
-****************************************************************************/
-void x86emuOp_push_DS(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- DECODE_PRINTF("PUSH\tDS\n");
- TRACE_AND_STEP();
- push_word(M.x86.R_DS);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x1f
-****************************************************************************/
-void x86emuOp_pop_DS(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- DECODE_PRINTF("POP\tDS\n");
- TRACE_AND_STEP();
- M.x86.R_DS = pop_word();
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x20
-****************************************************************************/
-void x86emuOp_and_byte_RM_R(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- u8 *destreg, *srcreg;
- uint destoffset;
- u8 destval;
-
- START_OF_INSTR();
- DECODE_PRINTF("AND\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
-
- switch (mod) {
- case 0:
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_byte(destoffset);
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = and_byte(destval, *srcreg);
- store_data_byte(destoffset, destval);
- break;
-
- case 1:
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_byte(destoffset);
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = and_byte(destval, *srcreg);
- store_data_byte(destoffset, destval);
- break;
-
- case 2:
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_byte(destoffset);
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = and_byte(destval, *srcreg);
- store_data_byte(destoffset, destval);
- break;
-
- case 3: /* register to register */
- destreg = DECODE_RM_BYTE_REGISTER(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = and_byte(*destreg, *srcreg);
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x21
-****************************************************************************/
-void x86emuOp_and_word_RM_R(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint destoffset;
-
- START_OF_INSTR();
- DECODE_PRINTF("AND\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *srcreg;
-
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_long(destoffset);
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = and_long(destval, *srcreg);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
- u16 *srcreg;
-
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_word(destoffset);
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = and_word(destval, *srcreg);
- store_data_word(destoffset, destval);
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *srcreg;
-
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_long(destoffset);
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = and_long(destval, *srcreg);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
- u16 *srcreg;
-
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_word(destoffset);
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = and_word(destval, *srcreg);
- store_data_word(destoffset, destval);
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *srcreg;
-
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_long(destoffset);
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = and_long(destval, *srcreg);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
- u16 *srcreg;
-
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_word(destoffset);
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = and_word(destval, *srcreg);
- store_data_word(destoffset, destval);
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg,*srcreg;
-
- destreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = and_long(*destreg, *srcreg);
- } else {
- u16 *destreg,*srcreg;
-
- destreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = and_word(*destreg, *srcreg);
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x22
-****************************************************************************/
-void x86emuOp_and_byte_R_RM(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- u8 *destreg, *srcreg;
- uint srcoffset;
- u8 srcval;
-
- START_OF_INSTR();
- DECODE_PRINTF("AND\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- destreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = fetch_data_byte(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = and_byte(*destreg, srcval);
- break;
- case 1:
- destreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = fetch_data_byte(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = and_byte(*destreg, srcval);
- break;
- case 2:
- destreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = fetch_data_byte(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = and_byte(*destreg, srcval);
- break;
- case 3: /* register to register */
- destreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_BYTE_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = and_byte(*destreg, *srcreg);
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x23
-****************************************************************************/
-void x86emuOp_and_word_R_RM(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint srcoffset;
-
- START_OF_INSTR();
- DECODE_PRINTF("AND\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = fetch_data_long(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = and_long(*destreg, srcval);
- } else {
- u16 *destreg;
- u16 srcval;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = fetch_data_word(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = and_word(*destreg, srcval);
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = fetch_data_long(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = and_long(*destreg, srcval);
- break;
- } else {
- u16 *destreg;
- u16 srcval;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = fetch_data_word(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = and_word(*destreg, srcval);
- break;
- }
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = fetch_data_long(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = and_long(*destreg, srcval);
- } else {
- u16 *destreg;
- u16 srcval;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = fetch_data_word(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = and_word(*destreg, srcval);
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg,*srcreg;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = and_long(*destreg, *srcreg);
- } else {
- u16 *destreg,*srcreg;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = and_word(*destreg, *srcreg);
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x24
-****************************************************************************/
-void x86emuOp_and_byte_AL_IMM(u8 X86EMU_UNUSED(op1))
-{
- u8 srcval;
-
- START_OF_INSTR();
- DECODE_PRINTF("AND\tAL,");
- srcval = fetch_byte_imm();
- DECODE_PRINTF2("%x\n", srcval);
- TRACE_AND_STEP();
- M.x86.R_AL = and_byte(M.x86.R_AL, srcval);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x25
-****************************************************************************/
-void x86emuOp_and_word_AX_IMM(u8 X86EMU_UNUSED(op1))
-{
- u32 srcval;
-
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("AND\tEAX,");
- srcval = fetch_long_imm();
- } else {
- DECODE_PRINTF("AND\tAX,");
- srcval = fetch_word_imm();
- }
- DECODE_PRINTF2("%x\n", srcval);
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_EAX = and_long(M.x86.R_EAX, srcval);
- } else {
- M.x86.R_AX = and_word(M.x86.R_AX, (u16)srcval);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x26
-****************************************************************************/
-void x86emuOp_segovr_ES(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- DECODE_PRINTF("ES:\n");
- TRACE_AND_STEP();
- M.x86.mode |= SYSMODE_SEGOVR_ES;
- /*
- * note the lack of DECODE_CLEAR_SEGOVR(r) since, here is one of 4
- * opcode subroutines we do not want to do this.
- */
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x27
-****************************************************************************/
-void x86emuOp_daa(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- DECODE_PRINTF("DAA\n");
- TRACE_AND_STEP();
- M.x86.R_AL = daa_byte(M.x86.R_AL);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x28
-****************************************************************************/
-void x86emuOp_sub_byte_RM_R(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- u8 *destreg, *srcreg;
- uint destoffset;
- u8 destval;
-
- START_OF_INSTR();
- DECODE_PRINTF("SUB\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_byte(destoffset);
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = sub_byte(destval, *srcreg);
- store_data_byte(destoffset, destval);
- break;
- case 1:
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_byte(destoffset);
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = sub_byte(destval, *srcreg);
- store_data_byte(destoffset, destval);
- break;
- case 2:
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_byte(destoffset);
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = sub_byte(destval, *srcreg);
- store_data_byte(destoffset, destval);
- break;
- case 3: /* register to register */
- destreg = DECODE_RM_BYTE_REGISTER(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = sub_byte(*destreg, *srcreg);
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x29
-****************************************************************************/
-void x86emuOp_sub_word_RM_R(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint destoffset;
-
- START_OF_INSTR();
- DECODE_PRINTF("SUB\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *srcreg;
-
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_long(destoffset);
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = sub_long(destval, *srcreg);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
- u16 *srcreg;
-
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_word(destoffset);
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = sub_word(destval, *srcreg);
- store_data_word(destoffset, destval);
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *srcreg;
-
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_long(destoffset);
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = sub_long(destval, *srcreg);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
- u16 *srcreg;
-
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_word(destoffset);
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = sub_word(destval, *srcreg);
- store_data_word(destoffset, destval);
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *srcreg;
-
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_long(destoffset);
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = sub_long(destval, *srcreg);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
- u16 *srcreg;
-
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_word(destoffset);
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = sub_word(destval, *srcreg);
- store_data_word(destoffset, destval);
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg,*srcreg;
-
- destreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = sub_long(*destreg, *srcreg);
- } else {
- u16 *destreg,*srcreg;
-
- destreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = sub_word(*destreg, *srcreg);
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x2a
-****************************************************************************/
-void x86emuOp_sub_byte_R_RM(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- u8 *destreg, *srcreg;
- uint srcoffset;
- u8 srcval;
-
- START_OF_INSTR();
- DECODE_PRINTF("SUB\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- destreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = fetch_data_byte(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = sub_byte(*destreg, srcval);
- break;
- case 1:
- destreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = fetch_data_byte(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = sub_byte(*destreg, srcval);
- break;
- case 2:
- destreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = fetch_data_byte(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = sub_byte(*destreg, srcval);
- break;
- case 3: /* register to register */
- destreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_BYTE_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = sub_byte(*destreg, *srcreg);
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x2b
-****************************************************************************/
-void x86emuOp_sub_word_R_RM(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint srcoffset;
-
- START_OF_INSTR();
- DECODE_PRINTF("SUB\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = fetch_data_long(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = sub_long(*destreg, srcval);
- } else {
- u16 *destreg;
- u16 srcval;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = fetch_data_word(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = sub_word(*destreg, srcval);
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = fetch_data_long(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = sub_long(*destreg, srcval);
- } else {
- u16 *destreg;
- u16 srcval;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = fetch_data_word(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = sub_word(*destreg, srcval);
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = fetch_data_long(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = sub_long(*destreg, srcval);
- } else {
- u16 *destreg;
- u16 srcval;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = fetch_data_word(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = sub_word(*destreg, srcval);
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg,*srcreg;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = sub_long(*destreg, *srcreg);
- } else {
- u16 *destreg,*srcreg;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = sub_word(*destreg, *srcreg);
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x2c
-****************************************************************************/
-void x86emuOp_sub_byte_AL_IMM(u8 X86EMU_UNUSED(op1))
-{
- u8 srcval;
-
- START_OF_INSTR();
- DECODE_PRINTF("SUB\tAL,");
- srcval = fetch_byte_imm();
- DECODE_PRINTF2("%x\n", srcval);
- TRACE_AND_STEP();
- M.x86.R_AL = sub_byte(M.x86.R_AL, srcval);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x2d
-****************************************************************************/
-void x86emuOp_sub_word_AX_IMM(u8 X86EMU_UNUSED(op1))
-{
- u32 srcval;
-
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("SUB\tEAX,");
- srcval = fetch_long_imm();
- } else {
- DECODE_PRINTF("SUB\tAX,");
- srcval = fetch_word_imm();
- }
- DECODE_PRINTF2("%x\n", srcval);
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_EAX = sub_long(M.x86.R_EAX, srcval);
- } else {
- M.x86.R_AX = sub_word(M.x86.R_AX, (u16)srcval);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x2e
-****************************************************************************/
-void x86emuOp_segovr_CS(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- DECODE_PRINTF("CS:\n");
- TRACE_AND_STEP();
- M.x86.mode |= SYSMODE_SEGOVR_CS;
- /* note no DECODE_CLEAR_SEGOVR here. */
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x2f
-****************************************************************************/
-void x86emuOp_das(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- DECODE_PRINTF("DAS\n");
- TRACE_AND_STEP();
- M.x86.R_AL = das_byte(M.x86.R_AL);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x30
-****************************************************************************/
-void x86emuOp_xor_byte_RM_R(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- u8 *destreg, *srcreg;
- uint destoffset;
- u8 destval;
-
- START_OF_INSTR();
- DECODE_PRINTF("XOR\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_byte(destoffset);
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = xor_byte(destval, *srcreg);
- store_data_byte(destoffset, destval);
- break;
- case 1:
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_byte(destoffset);
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = xor_byte(destval, *srcreg);
- store_data_byte(destoffset, destval);
- break;
- case 2:
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_byte(destoffset);
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = xor_byte(destval, *srcreg);
- store_data_byte(destoffset, destval);
- break;
- case 3: /* register to register */
- destreg = DECODE_RM_BYTE_REGISTER(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = xor_byte(*destreg, *srcreg);
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x31
-****************************************************************************/
-void x86emuOp_xor_word_RM_R(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint destoffset;
-
- START_OF_INSTR();
- DECODE_PRINTF("XOR\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *srcreg;
-
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_long(destoffset);
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = xor_long(destval, *srcreg);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
- u16 *srcreg;
-
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_word(destoffset);
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = xor_word(destval, *srcreg);
- store_data_word(destoffset, destval);
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *srcreg;
-
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_long(destoffset);
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = xor_long(destval, *srcreg);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
- u16 *srcreg;
-
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_word(destoffset);
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = xor_word(destval, *srcreg);
- store_data_word(destoffset, destval);
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *srcreg;
-
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_long(destoffset);
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = xor_long(destval, *srcreg);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
- u16 *srcreg;
-
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_word(destoffset);
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = xor_word(destval, *srcreg);
- store_data_word(destoffset, destval);
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg,*srcreg;
-
- destreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = xor_long(*destreg, *srcreg);
- } else {
- u16 *destreg,*srcreg;
-
- destreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = xor_word(*destreg, *srcreg);
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x32
-****************************************************************************/
-void x86emuOp_xor_byte_R_RM(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- u8 *destreg, *srcreg;
- uint srcoffset;
- u8 srcval;
-
- START_OF_INSTR();
- DECODE_PRINTF("XOR\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- destreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = fetch_data_byte(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = xor_byte(*destreg, srcval);
- break;
- case 1:
- destreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = fetch_data_byte(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = xor_byte(*destreg, srcval);
- break;
- case 2:
- destreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = fetch_data_byte(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = xor_byte(*destreg, srcval);
- break;
- case 3: /* register to register */
- destreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_BYTE_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = xor_byte(*destreg, *srcreg);
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x33
-****************************************************************************/
-void x86emuOp_xor_word_R_RM(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint srcoffset;
-
- START_OF_INSTR();
- DECODE_PRINTF("XOR\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = fetch_data_long(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = xor_long(*destreg, srcval);
- } else {
- u16 *destreg;
- u16 srcval;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = fetch_data_word(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = xor_word(*destreg, srcval);
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = fetch_data_long(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = xor_long(*destreg, srcval);
- } else {
- u16 *destreg;
- u16 srcval;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = fetch_data_word(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = xor_word(*destreg, srcval);
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = fetch_data_long(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = xor_long(*destreg, srcval);
- } else {
- u16 *destreg;
- u16 srcval;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = fetch_data_word(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = xor_word(*destreg, srcval);
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg,*srcreg;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = xor_long(*destreg, *srcreg);
- } else {
- u16 *destreg,*srcreg;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = xor_word(*destreg, *srcreg);
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x34
-****************************************************************************/
-void x86emuOp_xor_byte_AL_IMM(u8 X86EMU_UNUSED(op1))
-{
- u8 srcval;
-
- START_OF_INSTR();
- DECODE_PRINTF("XOR\tAL,");
- srcval = fetch_byte_imm();
- DECODE_PRINTF2("%x\n", srcval);
- TRACE_AND_STEP();
- M.x86.R_AL = xor_byte(M.x86.R_AL, srcval);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x35
-****************************************************************************/
-void x86emuOp_xor_word_AX_IMM(u8 X86EMU_UNUSED(op1))
-{
- u32 srcval;
-
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("XOR\tEAX,");
- srcval = fetch_long_imm();
- } else {
- DECODE_PRINTF("XOR\tAX,");
- srcval = fetch_word_imm();
- }
- DECODE_PRINTF2("%x\n", srcval);
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_EAX = xor_long(M.x86.R_EAX, srcval);
- } else {
- M.x86.R_AX = xor_word(M.x86.R_AX, (u16)srcval);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x36
-****************************************************************************/
-void x86emuOp_segovr_SS(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- DECODE_PRINTF("SS:\n");
- TRACE_AND_STEP();
- M.x86.mode |= SYSMODE_SEGOVR_SS;
- /* no DECODE_CLEAR_SEGOVR ! */
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x37
-****************************************************************************/
-void x86emuOp_aaa(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- DECODE_PRINTF("AAA\n");
- TRACE_AND_STEP();
- M.x86.R_AX = aaa_word(M.x86.R_AX);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x38
-****************************************************************************/
-void x86emuOp_cmp_byte_RM_R(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint destoffset;
- u8 *destreg, *srcreg;
- u8 destval;
-
- START_OF_INSTR();
- DECODE_PRINTF("CMP\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_byte(destoffset);
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- cmp_byte(destval, *srcreg);
- break;
- case 1:
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_byte(destoffset);
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- cmp_byte(destval, *srcreg);
- break;
- case 2:
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_byte(destoffset);
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- cmp_byte(destval, *srcreg);
- break;
- case 3: /* register to register */
- destreg = DECODE_RM_BYTE_REGISTER(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- cmp_byte(*destreg, *srcreg);
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x39
-****************************************************************************/
-void x86emuOp_cmp_word_RM_R(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint destoffset;
-
- START_OF_INSTR();
- DECODE_PRINTF("CMP\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *srcreg;
-
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_long(destoffset);
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- cmp_long(destval, *srcreg);
- } else {
- u16 destval;
- u16 *srcreg;
-
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_word(destoffset);
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- cmp_word(destval, *srcreg);
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *srcreg;
-
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_long(destoffset);
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- cmp_long(destval, *srcreg);
- } else {
- u16 destval;
- u16 *srcreg;
-
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_word(destoffset);
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- cmp_word(destval, *srcreg);
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *srcreg;
-
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_long(destoffset);
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- cmp_long(destval, *srcreg);
- } else {
- u16 destval;
- u16 *srcreg;
-
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_word(destoffset);
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- cmp_word(destval, *srcreg);
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg,*srcreg;
-
- destreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- cmp_long(*destreg, *srcreg);
- } else {
- u16 *destreg,*srcreg;
-
- destreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- cmp_word(*destreg, *srcreg);
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x3a
-****************************************************************************/
-void x86emuOp_cmp_byte_R_RM(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- u8 *destreg, *srcreg;
- uint srcoffset;
- u8 srcval;
-
- START_OF_INSTR();
- DECODE_PRINTF("CMP\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- destreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = fetch_data_byte(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- cmp_byte(*destreg, srcval);
- break;
- case 1:
- destreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = fetch_data_byte(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- cmp_byte(*destreg, srcval);
- break;
- case 2:
- destreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = fetch_data_byte(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- cmp_byte(*destreg, srcval);
- break;
- case 3: /* register to register */
- destreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_BYTE_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- cmp_byte(*destreg, *srcreg);
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x3b
-****************************************************************************/
-void x86emuOp_cmp_word_R_RM(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint srcoffset;
-
- START_OF_INSTR();
- DECODE_PRINTF("CMP\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = fetch_data_long(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- cmp_long(*destreg, srcval);
- } else {
- u16 *destreg;
- u16 srcval;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = fetch_data_word(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- cmp_word(*destreg, srcval);
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = fetch_data_long(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- cmp_long(*destreg, srcval);
- } else {
- u16 *destreg;
- u16 srcval;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = fetch_data_word(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- cmp_word(*destreg, srcval);
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = fetch_data_long(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- cmp_long(*destreg, srcval);
- } else {
- u16 *destreg;
- u16 srcval;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = fetch_data_word(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- cmp_word(*destreg, srcval);
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg,*srcreg;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- cmp_long(*destreg, *srcreg);
- } else {
- u16 *destreg,*srcreg;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- cmp_word(*destreg, *srcreg);
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x3c
-****************************************************************************/
-void x86emuOp_cmp_byte_AL_IMM(u8 X86EMU_UNUSED(op1))
-{
- u8 srcval;
-
- START_OF_INSTR();
- DECODE_PRINTF("CMP\tAL,");
- srcval = fetch_byte_imm();
- DECODE_PRINTF2("%x\n", srcval);
- TRACE_AND_STEP();
- cmp_byte(M.x86.R_AL, srcval);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x3d
-****************************************************************************/
-void x86emuOp_cmp_word_AX_IMM(u8 X86EMU_UNUSED(op1))
-{
- u32 srcval;
-
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("CMP\tEAX,");
- srcval = fetch_long_imm();
- } else {
- DECODE_PRINTF("CMP\tAX,");
- srcval = fetch_word_imm();
- }
- DECODE_PRINTF2("%x\n", srcval);
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- cmp_long(M.x86.R_EAX, srcval);
- } else {
- cmp_word(M.x86.R_AX, (u16)srcval);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x3e
-****************************************************************************/
-void x86emuOp_segovr_DS(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- DECODE_PRINTF("DS:\n");
- TRACE_AND_STEP();
- M.x86.mode |= SYSMODE_SEGOVR_DS;
- /* NO DECODE_CLEAR_SEGOVR! */
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x3f
-****************************************************************************/
-void x86emuOp_aas(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- DECODE_PRINTF("AAS\n");
- TRACE_AND_STEP();
- M.x86.R_AX = aas_word(M.x86.R_AX);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x40
-****************************************************************************/
-void x86emuOp_inc_AX(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("INC\tEAX\n");
- } else {
- DECODE_PRINTF("INC\tAX\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_EAX = inc_long(M.x86.R_EAX);
- } else {
- M.x86.R_AX = inc_word(M.x86.R_AX);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x41
-****************************************************************************/
-void x86emuOp_inc_CX(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("INC\tECX\n");
- } else {
- DECODE_PRINTF("INC\tCX\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_ECX = inc_long(M.x86.R_ECX);
- } else {
- M.x86.R_CX = inc_word(M.x86.R_CX);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x42
-****************************************************************************/
-void x86emuOp_inc_DX(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("INC\tEDX\n");
- } else {
- DECODE_PRINTF("INC\tDX\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_EDX = inc_long(M.x86.R_EDX);
- } else {
- M.x86.R_DX = inc_word(M.x86.R_DX);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x43
-****************************************************************************/
-void x86emuOp_inc_BX(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("INC\tEBX\n");
- } else {
- DECODE_PRINTF("INC\tBX\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_EBX = inc_long(M.x86.R_EBX);
- } else {
- M.x86.R_BX = inc_word(M.x86.R_BX);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x44
-****************************************************************************/
-void x86emuOp_inc_SP(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("INC\tESP\n");
- } else {
- DECODE_PRINTF("INC\tSP\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_ESP = inc_long(M.x86.R_ESP);
- } else {
- M.x86.R_SP = inc_word(M.x86.R_SP);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x45
-****************************************************************************/
-void x86emuOp_inc_BP(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("INC\tEBP\n");
- } else {
- DECODE_PRINTF("INC\tBP\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_EBP = inc_long(M.x86.R_EBP);
- } else {
- M.x86.R_BP = inc_word(M.x86.R_BP);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x46
-****************************************************************************/
-void x86emuOp_inc_SI(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("INC\tESI\n");
- } else {
- DECODE_PRINTF("INC\tSI\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_ESI = inc_long(M.x86.R_ESI);
- } else {
- M.x86.R_SI = inc_word(M.x86.R_SI);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x47
-****************************************************************************/
-void x86emuOp_inc_DI(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("INC\tEDI\n");
- } else {
- DECODE_PRINTF("INC\tDI\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_EDI = inc_long(M.x86.R_EDI);
- } else {
- M.x86.R_DI = inc_word(M.x86.R_DI);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x48
-****************************************************************************/
-void x86emuOp_dec_AX(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("DEC\tEAX\n");
- } else {
- DECODE_PRINTF("DEC\tAX\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_EAX = dec_long(M.x86.R_EAX);
- } else {
- M.x86.R_AX = dec_word(M.x86.R_AX);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x49
-****************************************************************************/
-void x86emuOp_dec_CX(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("DEC\tECX\n");
- } else {
- DECODE_PRINTF("DEC\tCX\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_ECX = dec_long(M.x86.R_ECX);
- } else {
- M.x86.R_CX = dec_word(M.x86.R_CX);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x4a
-****************************************************************************/
-void x86emuOp_dec_DX(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("DEC\tEDX\n");
- } else {
- DECODE_PRINTF("DEC\tDX\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_EDX = dec_long(M.x86.R_EDX);
- } else {
- M.x86.R_DX = dec_word(M.x86.R_DX);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x4b
-****************************************************************************/
-void x86emuOp_dec_BX(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("DEC\tEBX\n");
- } else {
- DECODE_PRINTF("DEC\tBX\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_EBX = dec_long(M.x86.R_EBX);
- } else {
- M.x86.R_BX = dec_word(M.x86.R_BX);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x4c
-****************************************************************************/
-void x86emuOp_dec_SP(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("DEC\tESP\n");
- } else {
- DECODE_PRINTF("DEC\tSP\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_ESP = dec_long(M.x86.R_ESP);
- } else {
- M.x86.R_SP = dec_word(M.x86.R_SP);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x4d
-****************************************************************************/
-void x86emuOp_dec_BP(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("DEC\tEBP\n");
- } else {
- DECODE_PRINTF("DEC\tBP\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_EBP = dec_long(M.x86.R_EBP);
- } else {
- M.x86.R_BP = dec_word(M.x86.R_BP);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x4e
-****************************************************************************/
-void x86emuOp_dec_SI(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("DEC\tESI\n");
- } else {
- DECODE_PRINTF("DEC\tSI\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_ESI = dec_long(M.x86.R_ESI);
- } else {
- M.x86.R_SI = dec_word(M.x86.R_SI);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x4f
-****************************************************************************/
-void x86emuOp_dec_DI(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("DEC\tEDI\n");
- } else {
- DECODE_PRINTF("DEC\tDI\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_EDI = dec_long(M.x86.R_EDI);
- } else {
- M.x86.R_DI = dec_word(M.x86.R_DI);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x50
-****************************************************************************/
-void x86emuOp_push_AX(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("PUSH\tEAX\n");
- } else {
- DECODE_PRINTF("PUSH\tAX\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- push_long(M.x86.R_EAX);
- } else {
- push_word(M.x86.R_AX);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x51
-****************************************************************************/
-void x86emuOp_push_CX(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("PUSH\tECX\n");
- } else {
- DECODE_PRINTF("PUSH\tCX\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- push_long(M.x86.R_ECX);
- } else {
- push_word(M.x86.R_CX);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x52
-****************************************************************************/
-void x86emuOp_push_DX(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("PUSH\tEDX\n");
- } else {
- DECODE_PRINTF("PUSH\tDX\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- push_long(M.x86.R_EDX);
- } else {
- push_word(M.x86.R_DX);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x53
-****************************************************************************/
-void x86emuOp_push_BX(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("PUSH\tEBX\n");
- } else {
- DECODE_PRINTF("PUSH\tBX\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- push_long(M.x86.R_EBX);
- } else {
- push_word(M.x86.R_BX);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x54
-****************************************************************************/
-void x86emuOp_push_SP(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("PUSH\tESP\n");
- } else {
- DECODE_PRINTF("PUSH\tSP\n");
- }
- TRACE_AND_STEP();
- /* Always push (E)SP, since we are emulating an i386 and above
- * processor. This is necessary as some BIOS'es use this to check
- * what type of processor is in the system.
- */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- push_long(M.x86.R_ESP);
- } else {
- push_word((u16)(M.x86.R_SP));
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x55
-****************************************************************************/
-void x86emuOp_push_BP(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("PUSH\tEBP\n");
- } else {
- DECODE_PRINTF("PUSH\tBP\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- push_long(M.x86.R_EBP);
- } else {
- push_word(M.x86.R_BP);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x56
-****************************************************************************/
-void x86emuOp_push_SI(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("PUSH\tESI\n");
- } else {
- DECODE_PRINTF("PUSH\tSI\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- push_long(M.x86.R_ESI);
- } else {
- push_word(M.x86.R_SI);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x57
-****************************************************************************/
-void x86emuOp_push_DI(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("PUSH\tEDI\n");
- } else {
- DECODE_PRINTF("PUSH\tDI\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- push_long(M.x86.R_EDI);
- } else {
- push_word(M.x86.R_DI);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x58
-****************************************************************************/
-void x86emuOp_pop_AX(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("POP\tEAX\n");
- } else {
- DECODE_PRINTF("POP\tAX\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_EAX = pop_long();
- } else {
- M.x86.R_AX = pop_word();
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x59
-****************************************************************************/
-void x86emuOp_pop_CX(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("POP\tECX\n");
- } else {
- DECODE_PRINTF("POP\tCX\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_ECX = pop_long();
- } else {
- M.x86.R_CX = pop_word();
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x5a
-****************************************************************************/
-void x86emuOp_pop_DX(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("POP\tEDX\n");
- } else {
- DECODE_PRINTF("POP\tDX\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_EDX = pop_long();
- } else {
- M.x86.R_DX = pop_word();
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x5b
-****************************************************************************/
-void x86emuOp_pop_BX(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("POP\tEBX\n");
- } else {
- DECODE_PRINTF("POP\tBX\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_EBX = pop_long();
- } else {
- M.x86.R_BX = pop_word();
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x5c
-****************************************************************************/
-void x86emuOp_pop_SP(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("POP\tESP\n");
- } else {
- DECODE_PRINTF("POP\tSP\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_ESP = pop_long();
- } else {
- M.x86.R_SP = pop_word();
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x5d
-****************************************************************************/
-void x86emuOp_pop_BP(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("POP\tEBP\n");
- } else {
- DECODE_PRINTF("POP\tBP\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_EBP = pop_long();
- } else {
- M.x86.R_BP = pop_word();
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x5e
-****************************************************************************/
-void x86emuOp_pop_SI(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("POP\tESI\n");
- } else {
- DECODE_PRINTF("POP\tSI\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_ESI = pop_long();
- } else {
- M.x86.R_SI = pop_word();
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x5f
-****************************************************************************/
-void x86emuOp_pop_DI(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("POP\tEDI\n");
- } else {
- DECODE_PRINTF("POP\tDI\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_EDI = pop_long();
- } else {
- M.x86.R_DI = pop_word();
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x60
-****************************************************************************/
-void x86emuOp_push_all(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("PUSHAD\n");
- } else {
- DECODE_PRINTF("PUSHA\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 old_sp = M.x86.R_ESP;
-
- push_long(M.x86.R_EAX);
- push_long(M.x86.R_ECX);
- push_long(M.x86.R_EDX);
- push_long(M.x86.R_EBX);
- push_long(old_sp);
- push_long(M.x86.R_EBP);
- push_long(M.x86.R_ESI);
- push_long(M.x86.R_EDI);
- } else {
- u16 old_sp = M.x86.R_SP;
-
- push_word(M.x86.R_AX);
- push_word(M.x86.R_CX);
- push_word(M.x86.R_DX);
- push_word(M.x86.R_BX);
- push_word(old_sp);
- push_word(M.x86.R_BP);
- push_word(M.x86.R_SI);
- push_word(M.x86.R_DI);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x61
-****************************************************************************/
-void x86emuOp_pop_all(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("POPAD\n");
- } else {
- DECODE_PRINTF("POPA\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_EDI = pop_long();
- M.x86.R_ESI = pop_long();
- M.x86.R_EBP = pop_long();
- M.x86.R_ESP += 4; /* skip ESP */
- M.x86.R_EBX = pop_long();
- M.x86.R_EDX = pop_long();
- M.x86.R_ECX = pop_long();
- M.x86.R_EAX = pop_long();
- } else {
- M.x86.R_DI = pop_word();
- M.x86.R_SI = pop_word();
- M.x86.R_BP = pop_word();
- M.x86.R_SP += 2; /* skip SP */
- M.x86.R_BX = pop_word();
- M.x86.R_DX = pop_word();
- M.x86.R_CX = pop_word();
- M.x86.R_AX = pop_word();
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/*opcode 0x62 ILLEGAL OP, calls x86emuOp_illegal_op() */
-/*opcode 0x63 ILLEGAL OP, calls x86emuOp_illegal_op() */
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x64
-****************************************************************************/
-void x86emuOp_segovr_FS(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- DECODE_PRINTF("FS:\n");
- TRACE_AND_STEP();
- M.x86.mode |= SYSMODE_SEGOVR_FS;
- /*
- * note the lack of DECODE_CLEAR_SEGOVR(r) since, here is one of 4
- * opcode subroutines we do not want to do this.
- */
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x65
-****************************************************************************/
-void x86emuOp_segovr_GS(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- DECODE_PRINTF("GS:\n");
- TRACE_AND_STEP();
- M.x86.mode |= SYSMODE_SEGOVR_GS;
- /*
- * note the lack of DECODE_CLEAR_SEGOVR(r) since, here is one of 4
- * opcode subroutines we do not want to do this.
- */
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x66 - prefix for 32-bit register
-****************************************************************************/
-void x86emuOp_prefix_data(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- DECODE_PRINTF("DATA:\n");
- TRACE_AND_STEP();
- M.x86.mode |= SYSMODE_PREFIX_DATA;
- /* note no DECODE_CLEAR_SEGOVR here. */
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x67 - prefix for 32-bit address
-****************************************************************************/
-void x86emuOp_prefix_addr(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- DECODE_PRINTF("ADDR:\n");
- TRACE_AND_STEP();
- M.x86.mode |= SYSMODE_PREFIX_ADDR;
- /* note no DECODE_CLEAR_SEGOVR here. */
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x68
-****************************************************************************/
-void x86emuOp_push_word_IMM(u8 X86EMU_UNUSED(op1))
-{
- u32 imm;
-
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- imm = fetch_long_imm();
- } else {
- imm = fetch_word_imm();
- }
- DECODE_PRINTF2("PUSH\t%x\n", imm);
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- push_long(imm);
- } else {
- push_word((u16)imm);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x69
-****************************************************************************/
-void x86emuOp_imul_word_IMM(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint srcoffset;
-
- START_OF_INSTR();
- DECODE_PRINTF("IMUL\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
- u32 res_lo,res_hi;
- s32 imm;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = fetch_data_long(srcoffset);
- imm = fetch_long_imm();
- DECODE_PRINTF2(",%d\n", (s32)imm);
- TRACE_AND_STEP();
- imul_long_direct(&res_lo,&res_hi,(s32)srcval,(s32)imm);
- if (res_hi != 0) {
- SET_FLAG(F_CF);
- SET_FLAG(F_OF);
- } else {
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_OF);
- }
- *destreg = (u32)res_lo;
- } else {
- u16 *destreg;
- u16 srcval;
- u32 res;
- s16 imm;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = fetch_data_word(srcoffset);
- imm = fetch_word_imm();
- DECODE_PRINTF2(",%d\n", (s32)imm);
- TRACE_AND_STEP();
- res = (s16)srcval * (s16)imm;
- if (res > 0xFFFF) {
- SET_FLAG(F_CF);
- SET_FLAG(F_OF);
- } else {
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_OF);
- }
- *destreg = (u16)res;
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
- u32 res_lo,res_hi;
- s32 imm;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = fetch_data_long(srcoffset);
- imm = fetch_long_imm();
- DECODE_PRINTF2(",%d\n", (s32)imm);
- TRACE_AND_STEP();
- imul_long_direct(&res_lo,&res_hi,(s32)srcval,(s32)imm);
- if (res_hi != 0) {
- SET_FLAG(F_CF);
- SET_FLAG(F_OF);
- } else {
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_OF);
- }
- *destreg = (u32)res_lo;
- } else {
- u16 *destreg;
- u16 srcval;
- u32 res;
- s16 imm;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = fetch_data_word(srcoffset);
- imm = fetch_word_imm();
- DECODE_PRINTF2(",%d\n", (s32)imm);
- TRACE_AND_STEP();
- res = (s16)srcval * (s16)imm;
- if (res > 0xFFFF) {
- SET_FLAG(F_CF);
- SET_FLAG(F_OF);
- } else {
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_OF);
- }
- *destreg = (u16)res;
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
- u32 res_lo,res_hi;
- s32 imm;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = fetch_data_long(srcoffset);
- imm = fetch_long_imm();
- DECODE_PRINTF2(",%d\n", (s32)imm);
- TRACE_AND_STEP();
- imul_long_direct(&res_lo,&res_hi,(s32)srcval,(s32)imm);
- if (res_hi != 0) {
- SET_FLAG(F_CF);
- SET_FLAG(F_OF);
- } else {
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_OF);
- }
- *destreg = (u32)res_lo;
- } else {
- u16 *destreg;
- u16 srcval;
- u32 res;
- s16 imm;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = fetch_data_word(srcoffset);
- imm = fetch_word_imm();
- DECODE_PRINTF2(",%d\n", (s32)imm);
- TRACE_AND_STEP();
- res = (s16)srcval * (s16)imm;
- if (res > 0xFFFF) {
- SET_FLAG(F_CF);
- SET_FLAG(F_OF);
- } else {
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_OF);
- }
- *destreg = (u16)res;
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg,*srcreg;
- u32 res_lo,res_hi;
- s32 imm;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_LONG_REGISTER(rl);
- imm = fetch_long_imm();
- DECODE_PRINTF2(",%d\n", (s32)imm);
- TRACE_AND_STEP();
- imul_long_direct(&res_lo,&res_hi,(s32)*srcreg,(s32)imm);
- if (res_hi != 0) {
- SET_FLAG(F_CF);
- SET_FLAG(F_OF);
- } else {
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_OF);
- }
- *destreg = (u32)res_lo;
- } else {
- u16 *destreg,*srcreg;
- u32 res;
- s16 imm;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_WORD_REGISTER(rl);
- imm = fetch_word_imm();
- DECODE_PRINTF2(",%d\n", (s32)imm);
- res = (s16)*srcreg * (s16)imm;
- if (res > 0xFFFF) {
- SET_FLAG(F_CF);
- SET_FLAG(F_OF);
- } else {
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_OF);
- }
- *destreg = (u16)res;
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x6a
-****************************************************************************/
-void x86emuOp_push_byte_IMM(u8 X86EMU_UNUSED(op1))
-{
- s16 imm;
-
- START_OF_INSTR();
- imm = (s8)fetch_byte_imm();
- DECODE_PRINTF2("PUSH\t%d\n", imm);
- TRACE_AND_STEP();
- push_word(imm);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x6b
-****************************************************************************/
-void x86emuOp_imul_byte_IMM(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint srcoffset;
- s8 imm;
-
- START_OF_INSTR();
- DECODE_PRINTF("IMUL\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
- u32 res_lo,res_hi;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = fetch_data_long(srcoffset);
- imm = fetch_byte_imm();
- DECODE_PRINTF2(",%d\n", (s32)imm);
- TRACE_AND_STEP();
- imul_long_direct(&res_lo,&res_hi,(s32)srcval,(s32)imm);
- if (res_hi != 0) {
- SET_FLAG(F_CF);
- SET_FLAG(F_OF);
- } else {
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_OF);
- }
- *destreg = (u32)res_lo;
- } else {
- u16 *destreg;
- u16 srcval;
- u32 res;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = fetch_data_word(srcoffset);
- imm = fetch_byte_imm();
- DECODE_PRINTF2(",%d\n", (s32)imm);
- TRACE_AND_STEP();
- res = (s16)srcval * (s16)imm;
- if (res > 0xFFFF) {
- SET_FLAG(F_CF);
- SET_FLAG(F_OF);
- } else {
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_OF);
- }
- *destreg = (u16)res;
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
- u32 res_lo,res_hi;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = fetch_data_long(srcoffset);
- imm = fetch_byte_imm();
- DECODE_PRINTF2(",%d\n", (s32)imm);
- TRACE_AND_STEP();
- imul_long_direct(&res_lo,&res_hi,(s32)srcval,(s32)imm);
- if (res_hi != 0) {
- SET_FLAG(F_CF);
- SET_FLAG(F_OF);
- } else {
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_OF);
- }
- *destreg = (u32)res_lo;
- } else {
- u16 *destreg;
- u16 srcval;
- u32 res;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = fetch_data_word(srcoffset);
- imm = fetch_byte_imm();
- DECODE_PRINTF2(",%d\n", (s32)imm);
- TRACE_AND_STEP();
- res = (s16)srcval * (s16)imm;
- if (res > 0xFFFF) {
- SET_FLAG(F_CF);
- SET_FLAG(F_OF);
- } else {
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_OF);
- }
- *destreg = (u16)res;
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
- u32 res_lo,res_hi;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = fetch_data_long(srcoffset);
- imm = fetch_byte_imm();
- DECODE_PRINTF2(",%d\n", (s32)imm);
- TRACE_AND_STEP();
- imul_long_direct(&res_lo,&res_hi,(s32)srcval,(s32)imm);
- if (res_hi != 0) {
- SET_FLAG(F_CF);
- SET_FLAG(F_OF);
- } else {
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_OF);
- }
- *destreg = (u32)res_lo;
- } else {
- u16 *destreg;
- u16 srcval;
- u32 res;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = fetch_data_word(srcoffset);
- imm = fetch_byte_imm();
- DECODE_PRINTF2(",%d\n", (s32)imm);
- TRACE_AND_STEP();
- res = (s16)srcval * (s16)imm;
- if (res > 0xFFFF) {
- SET_FLAG(F_CF);
- SET_FLAG(F_OF);
- } else {
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_OF);
- }
- *destreg = (u16)res;
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg,*srcreg;
- u32 res_lo,res_hi;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_LONG_REGISTER(rl);
- imm = fetch_byte_imm();
- DECODE_PRINTF2(",%d\n", (s32)imm);
- TRACE_AND_STEP();
- imul_long_direct(&res_lo,&res_hi,(s32)*srcreg,(s32)imm);
- if (res_hi != 0) {
- SET_FLAG(F_CF);
- SET_FLAG(F_OF);
- } else {
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_OF);
- }
- *destreg = (u32)res_lo;
- } else {
- u16 *destreg,*srcreg;
- u32 res;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_WORD_REGISTER(rl);
- imm = fetch_byte_imm();
- DECODE_PRINTF2(",%d\n", (s32)imm);
- res = (s16)*srcreg * (s16)imm;
- if (res > 0xFFFF) {
- SET_FLAG(F_CF);
- SET_FLAG(F_OF);
- } else {
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_OF);
- }
- *destreg = (u16)res;
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x6c
-****************************************************************************/
-void x86emuOp_ins_byte(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- DECODE_PRINTF("INSB\n");
- ins(1);
- TRACE_AND_STEP();
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x6d
-****************************************************************************/
-void x86emuOp_ins_word(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("INSD\n");
- ins(4);
- } else {
- DECODE_PRINTF("INSW\n");
- ins(2);
- }
- TRACE_AND_STEP();
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x6e
-****************************************************************************/
-void x86emuOp_outs_byte(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- DECODE_PRINTF("OUTSB\n");
- outs(1);
- TRACE_AND_STEP();
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x6f
-****************************************************************************/
-void x86emuOp_outs_word(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("OUTSD\n");
- outs(4);
- } else {
- DECODE_PRINTF("OUTSW\n");
- outs(2);
- }
- TRACE_AND_STEP();
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x70
-****************************************************************************/
-void x86emuOp_jump_near_O(u8 X86EMU_UNUSED(op1))
-{
- s8 offset;
- u16 target;
-
- /* jump to byte offset if overflow flag is set */
- START_OF_INSTR();
- DECODE_PRINTF("JO\t");
- offset = (s8)fetch_byte_imm();
- target = (u16)(M.x86.R_IP + (s16)offset);
- DECODE_PRINTF2("%x\n", target);
- TRACE_AND_STEP();
- if (ACCESS_FLAG(F_OF))
- M.x86.R_IP = target;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x71
-****************************************************************************/
-void x86emuOp_jump_near_NO(u8 X86EMU_UNUSED(op1))
-{
- s8 offset;
- u16 target;
-
- /* jump to byte offset if overflow is not set */
- START_OF_INSTR();
- DECODE_PRINTF("JNO\t");
- offset = (s8)fetch_byte_imm();
- target = (u16)(M.x86.R_IP + (s16)offset);
- DECODE_PRINTF2("%x\n", target);
- TRACE_AND_STEP();
- if (!ACCESS_FLAG(F_OF))
- M.x86.R_IP = target;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x72
-****************************************************************************/
-void x86emuOp_jump_near_B(u8 X86EMU_UNUSED(op1))
-{
- s8 offset;
- u16 target;
-
- /* jump to byte offset if carry flag is set. */
- START_OF_INSTR();
- DECODE_PRINTF("JB\t");
- offset = (s8)fetch_byte_imm();
- target = (u16)(M.x86.R_IP + (s16)offset);
- DECODE_PRINTF2("%x\n", target);
- TRACE_AND_STEP();
- if (ACCESS_FLAG(F_CF))
- M.x86.R_IP = target;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x73
-****************************************************************************/
-void x86emuOp_jump_near_NB(u8 X86EMU_UNUSED(op1))
-{
- s8 offset;
- u16 target;
-
- /* jump to byte offset if carry flag is clear. */
- START_OF_INSTR();
- DECODE_PRINTF("JNB\t");
- offset = (s8)fetch_byte_imm();
- target = (u16)(M.x86.R_IP + (s16)offset);
- DECODE_PRINTF2("%x\n", target);
- TRACE_AND_STEP();
- if (!ACCESS_FLAG(F_CF))
- M.x86.R_IP = target;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x74
-****************************************************************************/
-void x86emuOp_jump_near_Z(u8 X86EMU_UNUSED(op1))
-{
- s8 offset;
- u16 target;
-
- /* jump to byte offset if zero flag is set. */
- START_OF_INSTR();
- DECODE_PRINTF("JZ\t");
- offset = (s8)fetch_byte_imm();
- target = (u16)(M.x86.R_IP + (s16)offset);
- DECODE_PRINTF2("%x\n", target);
- TRACE_AND_STEP();
- if (ACCESS_FLAG(F_ZF))
- M.x86.R_IP = target;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x75
-****************************************************************************/
-void x86emuOp_jump_near_NZ(u8 X86EMU_UNUSED(op1))
-{
- s8 offset;
- u16 target;
-
- /* jump to byte offset if zero flag is clear. */
- START_OF_INSTR();
- DECODE_PRINTF("JNZ\t");
- offset = (s8)fetch_byte_imm();
- target = (u16)(M.x86.R_IP + (s16)offset);
- DECODE_PRINTF2("%x\n", target);
- TRACE_AND_STEP();
- if (!ACCESS_FLAG(F_ZF))
- M.x86.R_IP = target;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x76
-****************************************************************************/
-void x86emuOp_jump_near_BE(u8 X86EMU_UNUSED(op1))
-{
- s8 offset;
- u16 target;
-
- /* jump to byte offset if carry flag is set or if the zero
- flag is set. */
- START_OF_INSTR();
- DECODE_PRINTF("JBE\t");
- offset = (s8)fetch_byte_imm();
- target = (u16)(M.x86.R_IP + (s16)offset);
- DECODE_PRINTF2("%x\n", target);
- TRACE_AND_STEP();
- if (ACCESS_FLAG(F_CF) || ACCESS_FLAG(F_ZF))
- M.x86.R_IP = target;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x77
-****************************************************************************/
-void x86emuOp_jump_near_NBE(u8 X86EMU_UNUSED(op1))
-{
- s8 offset;
- u16 target;
-
- /* jump to byte offset if carry flag is clear and if the zero
- flag is clear */
- START_OF_INSTR();
- DECODE_PRINTF("JNBE\t");
- offset = (s8)fetch_byte_imm();
- target = (u16)(M.x86.R_IP + (s16)offset);
- DECODE_PRINTF2("%x\n", target);
- TRACE_AND_STEP();
- if (!(ACCESS_FLAG(F_CF) || ACCESS_FLAG(F_ZF)))
- M.x86.R_IP = target;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x78
-****************************************************************************/
-void x86emuOp_jump_near_S(u8 X86EMU_UNUSED(op1))
-{
- s8 offset;
- u16 target;
-
- /* jump to byte offset if sign flag is set */
- START_OF_INSTR();
- DECODE_PRINTF("JS\t");
- offset = (s8)fetch_byte_imm();
- target = (u16)(M.x86.R_IP + (s16)offset);
- DECODE_PRINTF2("%x\n", target);
- TRACE_AND_STEP();
- if (ACCESS_FLAG(F_SF))
- M.x86.R_IP = target;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x79
-****************************************************************************/
-void x86emuOp_jump_near_NS(u8 X86EMU_UNUSED(op1))
-{
- s8 offset;
- u16 target;
-
- /* jump to byte offset if sign flag is clear */
- START_OF_INSTR();
- DECODE_PRINTF("JNS\t");
- offset = (s8)fetch_byte_imm();
- target = (u16)(M.x86.R_IP + (s16)offset);
- DECODE_PRINTF2("%x\n", target);
- TRACE_AND_STEP();
- if (!ACCESS_FLAG(F_SF))
- M.x86.R_IP = target;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x7a
-****************************************************************************/
-void x86emuOp_jump_near_P(u8 X86EMU_UNUSED(op1))
-{
- s8 offset;
- u16 target;
-
- /* jump to byte offset if parity flag is set (even parity) */
- START_OF_INSTR();
- DECODE_PRINTF("JP\t");
- offset = (s8)fetch_byte_imm();
- target = (u16)(M.x86.R_IP + (s16)offset);
- DECODE_PRINTF2("%x\n", target);
- TRACE_AND_STEP();
- if (ACCESS_FLAG(F_PF))
- M.x86.R_IP = target;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x7b
-****************************************************************************/
-void x86emuOp_jump_near_NP(u8 X86EMU_UNUSED(op1))
-{
- s8 offset;
- u16 target;
-
- /* jump to byte offset if parity flag is clear (odd parity) */
- START_OF_INSTR();
- DECODE_PRINTF("JNP\t");
- offset = (s8)fetch_byte_imm();
- target = (u16)(M.x86.R_IP + (s16)offset);
- DECODE_PRINTF2("%x\n", target);
- TRACE_AND_STEP();
- if (!ACCESS_FLAG(F_PF))
- M.x86.R_IP = target;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x7c
-****************************************************************************/
-void x86emuOp_jump_near_L(u8 X86EMU_UNUSED(op1))
-{
- s8 offset;
- u16 target;
- int sf, of;
-
- /* jump to byte offset if sign flag not equal to overflow flag. */
- START_OF_INSTR();
- DECODE_PRINTF("JL\t");
- offset = (s8)fetch_byte_imm();
- target = (u16)(M.x86.R_IP + (s16)offset);
- DECODE_PRINTF2("%x\n", target);
- TRACE_AND_STEP();
- sf = ACCESS_FLAG(F_SF) != 0;
- of = ACCESS_FLAG(F_OF) != 0;
- if (sf ^ of)
- M.x86.R_IP = target;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x7d
-****************************************************************************/
-void x86emuOp_jump_near_NL(u8 X86EMU_UNUSED(op1))
-{
- s8 offset;
- u16 target;
- int sf, of;
-
- /* jump to byte offset if sign flag not equal to overflow flag. */
- START_OF_INSTR();
- DECODE_PRINTF("JNL\t");
- offset = (s8)fetch_byte_imm();
- target = (u16)(M.x86.R_IP + (s16)offset);
- DECODE_PRINTF2("%x\n", target);
- TRACE_AND_STEP();
- sf = ACCESS_FLAG(F_SF) != 0;
- of = ACCESS_FLAG(F_OF) != 0;
- /* note: inverse of above, but using == instead of xor. */
- if (sf == of)
- M.x86.R_IP = target;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x7e
-****************************************************************************/
-void x86emuOp_jump_near_LE(u8 X86EMU_UNUSED(op1))
-{
- s8 offset;
- u16 target;
- int sf, of;
-
- /* jump to byte offset if sign flag not equal to overflow flag
- or the zero flag is set */
- START_OF_INSTR();
- DECODE_PRINTF("JLE\t");
- offset = (s8)fetch_byte_imm();
- target = (u16)(M.x86.R_IP + (s16)offset);
- DECODE_PRINTF2("%x\n", target);
- TRACE_AND_STEP();
- sf = ACCESS_FLAG(F_SF) != 0;
- of = ACCESS_FLAG(F_OF) != 0;
- if ((sf ^ of) || ACCESS_FLAG(F_ZF))
- M.x86.R_IP = target;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x7f
-****************************************************************************/
-void x86emuOp_jump_near_NLE(u8 X86EMU_UNUSED(op1))
-{
- s8 offset;
- u16 target;
- int sf, of;
-
- /* jump to byte offset if sign flag equal to overflow flag.
- and the zero flag is clear */
- START_OF_INSTR();
- DECODE_PRINTF("JNLE\t");
- offset = (s8)fetch_byte_imm();
- target = (u16)(M.x86.R_IP + (s16)offset);
- DECODE_PRINTF2("%x\n", target);
- TRACE_AND_STEP();
- sf = ACCESS_FLAG(F_SF) != 0;
- of = ACCESS_FLAG(F_OF) != 0;
- if ((sf == of) && !ACCESS_FLAG(F_ZF))
- M.x86.R_IP = target;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-static u8 (*opc80_byte_operation[])(u8 d, u8 s) =
-{
- add_byte, /* 00 */
- or_byte, /* 01 */
- adc_byte, /* 02 */
- sbb_byte, /* 03 */
- and_byte, /* 04 */
- sub_byte, /* 05 */
- xor_byte, /* 06 */
- cmp_byte, /* 07 */
-};
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x80
-****************************************************************************/
-void x86emuOp_opc80_byte_RM_IMM(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- u8 *destreg;
- uint destoffset;
- u8 imm;
- u8 destval;
-
- /*
- * Weirdo special case instruction format. Part of the opcode
- * held below in "RH". Doubly nested case would result, except
- * that the decoded instruction
- */
- START_OF_INSTR();
- FETCH_DECODE_MODRM(mod, rh, rl);
-#ifdef DEBUG
- if (DEBUG_DECODE()) {
- /* XXX DECODE_PRINTF may be changed to something more
- general, so that it is important to leave the strings
- in the same format, even though the result is that the
- above test is done twice. */
-
- switch (rh) {
- case 0:
- DECODE_PRINTF("ADD\t");
- break;
- case 1:
- DECODE_PRINTF("OR\t");
- break;
- case 2:
- DECODE_PRINTF("ADC\t");
- break;
- case 3:
- DECODE_PRINTF("SBB\t");
- break;
- case 4:
- DECODE_PRINTF("AND\t");
- break;
- case 5:
- DECODE_PRINTF("SUB\t");
- break;
- case 6:
- DECODE_PRINTF("XOR\t");
- break;
- case 7:
- DECODE_PRINTF("CMP\t");
- break;
- }
- }
-#endif
- /* know operation, decode the mod byte to find the addressing
- mode. */
- switch (mod) {
- case 0:
- DECODE_PRINTF("BYTE PTR ");
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_byte(destoffset);
- imm = fetch_byte_imm();
- DECODE_PRINTF2("%x\n", imm);
- TRACE_AND_STEP();
- destval = (*opc80_byte_operation[rh]) (destval, imm);
- if (rh != 7)
- store_data_byte(destoffset, destval);
- break;
- case 1:
- DECODE_PRINTF("BYTE PTR ");
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_byte(destoffset);
- imm = fetch_byte_imm();
- DECODE_PRINTF2("%x\n", imm);
- TRACE_AND_STEP();
- destval = (*opc80_byte_operation[rh]) (destval, imm);
- if (rh != 7)
- store_data_byte(destoffset, destval);
- break;
- case 2:
- DECODE_PRINTF("BYTE PTR ");
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_byte(destoffset);
- imm = fetch_byte_imm();
- DECODE_PRINTF2("%x\n", imm);
- TRACE_AND_STEP();
- destval = (*opc80_byte_operation[rh]) (destval, imm);
- if (rh != 7)
- store_data_byte(destoffset, destval);
- break;
- case 3: /* register to register */
- destreg = DECODE_RM_BYTE_REGISTER(rl);
- DECODE_PRINTF(",");
- imm = fetch_byte_imm();
- DECODE_PRINTF2("%x\n", imm);
- TRACE_AND_STEP();
- destval = (*opc80_byte_operation[rh]) (*destreg, imm);
- if (rh != 7)
- *destreg = destval;
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-static u16 (*opc81_word_operation[])(u16 d, u16 s) =
-{
- add_word, /*00 */
- or_word, /*01 */
- adc_word, /*02 */
- sbb_word, /*03 */
- and_word, /*04 */
- sub_word, /*05 */
- xor_word, /*06 */
- cmp_word, /*07 */
-};
-
-static u32 (*opc81_long_operation[])(u32 d, u32 s) =
-{
- add_long, /*00 */
- or_long, /*01 */
- adc_long, /*02 */
- sbb_long, /*03 */
- and_long, /*04 */
- sub_long, /*05 */
- xor_long, /*06 */
- cmp_long, /*07 */
-};
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x81
-****************************************************************************/
-void x86emuOp_opc81_word_RM_IMM(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint destoffset;
-
- /*
- * Weirdo special case instruction format. Part of the opcode
- * held below in "RH". Doubly nested case would result, except
- * that the decoded instruction
- */
- START_OF_INSTR();
- FETCH_DECODE_MODRM(mod, rh, rl);
-#ifdef DEBUG
- if (DEBUG_DECODE()) {
- /* XXX DECODE_PRINTF may be changed to something more
- general, so that it is important to leave the strings
- in the same format, even though the result is that the
- above test is done twice. */
-
- switch (rh) {
- case 0:
- DECODE_PRINTF("ADD\t");
- break;
- case 1:
- DECODE_PRINTF("OR\t");
- break;
- case 2:
- DECODE_PRINTF("ADC\t");
- break;
- case 3:
- DECODE_PRINTF("SBB\t");
- break;
- case 4:
- DECODE_PRINTF("AND\t");
- break;
- case 5:
- DECODE_PRINTF("SUB\t");
- break;
- case 6:
- DECODE_PRINTF("XOR\t");
- break;
- case 7:
- DECODE_PRINTF("CMP\t");
- break;
- }
- }
-#endif
- /*
- * Know operation, decode the mod byte to find the addressing
- * mode.
- */
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval,imm;
-
- DECODE_PRINTF("DWORD PTR ");
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_long(destoffset);
- imm = fetch_long_imm();
- DECODE_PRINTF2("%x\n", imm);
- TRACE_AND_STEP();
- destval = (*opc81_long_operation[rh]) (destval, imm);
- if (rh != 7)
- store_data_long(destoffset, destval);
- } else {
- u16 destval,imm;
-
- DECODE_PRINTF("WORD PTR ");
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_word(destoffset);
- imm = fetch_word_imm();
- DECODE_PRINTF2("%x\n", imm);
- TRACE_AND_STEP();
- destval = (*opc81_word_operation[rh]) (destval, imm);
- if (rh != 7)
- store_data_word(destoffset, destval);
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval,imm;
-
- DECODE_PRINTF("DWORD PTR ");
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_long(destoffset);
- imm = fetch_long_imm();
- DECODE_PRINTF2("%x\n", imm);
- TRACE_AND_STEP();
- destval = (*opc81_long_operation[rh]) (destval, imm);
- if (rh != 7)
- store_data_long(destoffset, destval);
- } else {
- u16 destval,imm;
-
- DECODE_PRINTF("WORD PTR ");
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_word(destoffset);
- imm = fetch_word_imm();
- DECODE_PRINTF2("%x\n", imm);
- TRACE_AND_STEP();
- destval = (*opc81_word_operation[rh]) (destval, imm);
- if (rh != 7)
- store_data_word(destoffset, destval);
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval,imm;
-
- DECODE_PRINTF("DWORD PTR ");
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_long(destoffset);
- imm = fetch_long_imm();
- DECODE_PRINTF2("%x\n", imm);
- TRACE_AND_STEP();
- destval = (*opc81_long_operation[rh]) (destval, imm);
- if (rh != 7)
- store_data_long(destoffset, destval);
- } else {
- u16 destval,imm;
-
- DECODE_PRINTF("WORD PTR ");
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_word(destoffset);
- imm = fetch_word_imm();
- DECODE_PRINTF2("%x\n", imm);
- TRACE_AND_STEP();
- destval = (*opc81_word_operation[rh]) (destval, imm);
- if (rh != 7)
- store_data_word(destoffset, destval);
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 destval,imm;
-
- destreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF(",");
- imm = fetch_long_imm();
- DECODE_PRINTF2("%x\n", imm);
- TRACE_AND_STEP();
- destval = (*opc81_long_operation[rh]) (*destreg, imm);
- if (rh != 7)
- *destreg = destval;
- } else {
- u16 *destreg;
- u16 destval,imm;
-
- destreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF(",");
- imm = fetch_word_imm();
- DECODE_PRINTF2("%x\n", imm);
- TRACE_AND_STEP();
- destval = (*opc81_word_operation[rh]) (*destreg, imm);
- if (rh != 7)
- *destreg = destval;
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-static u8 (*opc82_byte_operation[])(u8 s, u8 d) =
-{
- add_byte, /*00 */
- or_byte, /*01 */ /*YYY UNUSED ???? */
- adc_byte, /*02 */
- sbb_byte, /*03 */
- and_byte, /*04 */ /*YYY UNUSED ???? */
- sub_byte, /*05 */
- xor_byte, /*06 */ /*YYY UNUSED ???? */
- cmp_byte, /*07 */
-};
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x82
-****************************************************************************/
-void x86emuOp_opc82_byte_RM_IMM(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- u8 *destreg;
- uint destoffset;
- u8 imm;
- u8 destval;
-
- /*
- * Weirdo special case instruction format. Part of the opcode
- * held below in "RH". Doubly nested case would result, except
- * that the decoded instruction Similar to opcode 81, except that
- * the immediate byte is sign extended to a word length.
- */
- START_OF_INSTR();
- FETCH_DECODE_MODRM(mod, rh, rl);
-#ifdef DEBUG
- if (DEBUG_DECODE()) {
- /* XXX DECODE_PRINTF may be changed to something more
- general, so that it is important to leave the strings
- in the same format, even though the result is that the
- above test is done twice. */
- switch (rh) {
- case 0:
- DECODE_PRINTF("ADD\t");
- break;
- case 1:
- DECODE_PRINTF("OR\t");
- break;
- case 2:
- DECODE_PRINTF("ADC\t");
- break;
- case 3:
- DECODE_PRINTF("SBB\t");
- break;
- case 4:
- DECODE_PRINTF("AND\t");
- break;
- case 5:
- DECODE_PRINTF("SUB\t");
- break;
- case 6:
- DECODE_PRINTF("XOR\t");
- break;
- case 7:
- DECODE_PRINTF("CMP\t");
- break;
- }
- }
-#endif
- /* know operation, decode the mod byte to find the addressing
- mode. */
- switch (mod) {
- case 0:
- DECODE_PRINTF("BYTE PTR ");
- destoffset = decode_rm00_address(rl);
- destval = fetch_data_byte(destoffset);
- imm = fetch_byte_imm();
- DECODE_PRINTF2(",%x\n", imm);
- TRACE_AND_STEP();
- destval = (*opc82_byte_operation[rh]) (destval, imm);
- if (rh != 7)
- store_data_byte(destoffset, destval);
- break;
- case 1:
- DECODE_PRINTF("BYTE PTR ");
- destoffset = decode_rm01_address(rl);
- destval = fetch_data_byte(destoffset);
- imm = fetch_byte_imm();
- DECODE_PRINTF2(",%x\n", imm);
- TRACE_AND_STEP();
- destval = (*opc82_byte_operation[rh]) (destval, imm);
- if (rh != 7)
- store_data_byte(destoffset, destval);
- break;
- case 2:
- DECODE_PRINTF("BYTE PTR ");
- destoffset = decode_rm10_address(rl);
- destval = fetch_data_byte(destoffset);
- imm = fetch_byte_imm();
- DECODE_PRINTF2(",%x\n", imm);
- TRACE_AND_STEP();
- destval = (*opc82_byte_operation[rh]) (destval, imm);
- if (rh != 7)
- store_data_byte(destoffset, destval);
- break;
- case 3: /* register to register */
- destreg = DECODE_RM_BYTE_REGISTER(rl);
- imm = fetch_byte_imm();
- DECODE_PRINTF2(",%x\n", imm);
- TRACE_AND_STEP();
- destval = (*opc82_byte_operation[rh]) (*destreg, imm);
- if (rh != 7)
- *destreg = destval;
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-static u16 (*opc83_word_operation[])(u16 s, u16 d) =
-{
- add_word, /*00 */
- or_word, /*01 */ /*YYY UNUSED ???? */
- adc_word, /*02 */
- sbb_word, /*03 */
- and_word, /*04 */ /*YYY UNUSED ???? */
- sub_word, /*05 */
- xor_word, /*06 */ /*YYY UNUSED ???? */
- cmp_word, /*07 */
-};
-
-static u32 (*opc83_long_operation[])(u32 s, u32 d) =
-{
- add_long, /*00 */
- or_long, /*01 */ /*YYY UNUSED ???? */
- adc_long, /*02 */
- sbb_long, /*03 */
- and_long, /*04 */ /*YYY UNUSED ???? */
- sub_long, /*05 */
- xor_long, /*06 */ /*YYY UNUSED ???? */
- cmp_long, /*07 */
-};
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x83
-****************************************************************************/
-void x86emuOp_opc83_word_RM_IMM(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint destoffset;
-
- /*
- * Weirdo special case instruction format. Part of the opcode
- * held below in "RH". Doubly nested case would result, except
- * that the decoded instruction Similar to opcode 81, except that
- * the immediate byte is sign extended to a word length.
- */
- START_OF_INSTR();
- FETCH_DECODE_MODRM(mod, rh, rl);
-#ifdef DEBUG
- if (DEBUG_DECODE()) {
- /* XXX DECODE_PRINTF may be changed to something more
- general, so that it is important to leave the strings
- in the same format, even though the result is that the
- above test is done twice. */
- switch (rh) {
- case 0:
- DECODE_PRINTF("ADD\t");
- break;
- case 1:
- DECODE_PRINTF("OR\t");
- break;
- case 2:
- DECODE_PRINTF("ADC\t");
- break;
- case 3:
- DECODE_PRINTF("SBB\t");
- break;
- case 4:
- DECODE_PRINTF("AND\t");
- break;
- case 5:
- DECODE_PRINTF("SUB\t");
- break;
- case 6:
- DECODE_PRINTF("XOR\t");
- break;
- case 7:
- DECODE_PRINTF("CMP\t");
- break;
- }
- }
-#endif
- /* know operation, decode the mod byte to find the addressing
- mode. */
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval,imm;
-
- DECODE_PRINTF("DWORD PTR ");
- destoffset = decode_rm00_address(rl);
- destval = fetch_data_long(destoffset);
- imm = (s8) fetch_byte_imm();
- DECODE_PRINTF2(",%x\n", imm);
- TRACE_AND_STEP();
- destval = (*opc83_long_operation[rh]) (destval, imm);
- if (rh != 7)
- store_data_long(destoffset, destval);
- } else {
- u16 destval,imm;
-
- DECODE_PRINTF("WORD PTR ");
- destoffset = decode_rm00_address(rl);
- destval = fetch_data_word(destoffset);
- imm = (s8) fetch_byte_imm();
- DECODE_PRINTF2(",%x\n", imm);
- TRACE_AND_STEP();
- destval = (*opc83_word_operation[rh]) (destval, imm);
- if (rh != 7)
- store_data_word(destoffset, destval);
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval,imm;
-
- DECODE_PRINTF("DWORD PTR ");
- destoffset = decode_rm01_address(rl);
- destval = fetch_data_long(destoffset);
- imm = (s8) fetch_byte_imm();
- DECODE_PRINTF2(",%x\n", imm);
- TRACE_AND_STEP();
- destval = (*opc83_long_operation[rh]) (destval, imm);
- if (rh != 7)
- store_data_long(destoffset, destval);
- } else {
- u16 destval,imm;
-
- DECODE_PRINTF("WORD PTR ");
- destoffset = decode_rm01_address(rl);
- destval = fetch_data_word(destoffset);
- imm = (s8) fetch_byte_imm();
- DECODE_PRINTF2(",%x\n", imm);
- TRACE_AND_STEP();
- destval = (*opc83_word_operation[rh]) (destval, imm);
- if (rh != 7)
- store_data_word(destoffset, destval);
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval,imm;
-
- DECODE_PRINTF("DWORD PTR ");
- destoffset = decode_rm10_address(rl);
- destval = fetch_data_long(destoffset);
- imm = (s8) fetch_byte_imm();
- DECODE_PRINTF2(",%x\n", imm);
- TRACE_AND_STEP();
- destval = (*opc83_long_operation[rh]) (destval, imm);
- if (rh != 7)
- store_data_long(destoffset, destval);
- } else {
- u16 destval,imm;
-
- DECODE_PRINTF("WORD PTR ");
- destoffset = decode_rm10_address(rl);
- destval = fetch_data_word(destoffset);
- imm = (s8) fetch_byte_imm();
- DECODE_PRINTF2(",%x\n", imm);
- TRACE_AND_STEP();
- destval = (*opc83_word_operation[rh]) (destval, imm);
- if (rh != 7)
- store_data_word(destoffset, destval);
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 destval,imm;
-
- destreg = DECODE_RM_LONG_REGISTER(rl);
- imm = (s8) fetch_byte_imm();
- DECODE_PRINTF2(",%x\n", imm);
- TRACE_AND_STEP();
- destval = (*opc83_long_operation[rh]) (*destreg, imm);
- if (rh != 7)
- *destreg = destval;
- } else {
- u16 *destreg;
- u16 destval,imm;
-
- destreg = DECODE_RM_WORD_REGISTER(rl);
- imm = (s8) fetch_byte_imm();
- DECODE_PRINTF2(",%x\n", imm);
- TRACE_AND_STEP();
- destval = (*opc83_word_operation[rh]) (*destreg, imm);
- if (rh != 7)
- *destreg = destval;
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x84
-****************************************************************************/
-void x86emuOp_test_byte_RM_R(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- u8 *destreg, *srcreg;
- uint destoffset;
- u8 destval;
-
- START_OF_INSTR();
- DECODE_PRINTF("TEST\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_byte(destoffset);
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- test_byte(destval, *srcreg);
- break;
- case 1:
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_byte(destoffset);
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- test_byte(destval, *srcreg);
- break;
- case 2:
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_byte(destoffset);
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- test_byte(destval, *srcreg);
- break;
- case 3: /* register to register */
- destreg = DECODE_RM_BYTE_REGISTER(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- test_byte(*destreg, *srcreg);
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x85
-****************************************************************************/
-void x86emuOp_test_word_RM_R(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint destoffset;
-
- START_OF_INSTR();
- DECODE_PRINTF("TEST\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *srcreg;
-
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_long(destoffset);
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- test_long(destval, *srcreg);
- } else {
- u16 destval;
- u16 *srcreg;
-
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_word(destoffset);
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- test_word(destval, *srcreg);
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *srcreg;
-
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_long(destoffset);
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- test_long(destval, *srcreg);
- } else {
- u16 destval;
- u16 *srcreg;
-
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_word(destoffset);
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- test_word(destval, *srcreg);
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *srcreg;
-
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_long(destoffset);
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- test_long(destval, *srcreg);
- } else {
- u16 destval;
- u16 *srcreg;
-
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_word(destoffset);
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- test_word(destval, *srcreg);
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg,*srcreg;
-
- destreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- test_long(*destreg, *srcreg);
- } else {
- u16 *destreg,*srcreg;
-
- destreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- test_word(*destreg, *srcreg);
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x86
-****************************************************************************/
-void x86emuOp_xchg_byte_RM_R(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- u8 *destreg, *srcreg;
- uint destoffset;
- u8 destval;
- u8 tmp;
-
- START_OF_INSTR();
- DECODE_PRINTF("XCHG\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_byte(destoffset);
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- tmp = *srcreg;
- *srcreg = destval;
- destval = tmp;
- store_data_byte(destoffset, destval);
- break;
- case 1:
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_byte(destoffset);
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- tmp = *srcreg;
- *srcreg = destval;
- destval = tmp;
- store_data_byte(destoffset, destval);
- break;
- case 2:
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_byte(destoffset);
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- tmp = *srcreg;
- *srcreg = destval;
- destval = tmp;
- store_data_byte(destoffset, destval);
- break;
- case 3: /* register to register */
- destreg = DECODE_RM_BYTE_REGISTER(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- tmp = *srcreg;
- *srcreg = *destreg;
- *destreg = tmp;
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x87
-****************************************************************************/
-void x86emuOp_xchg_word_RM_R(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint destoffset;
-
- START_OF_INSTR();
- DECODE_PRINTF("XCHG\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *srcreg;
- u32 destval,tmp;
-
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_long(destoffset);
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- tmp = *srcreg;
- *srcreg = destval;
- destval = tmp;
- store_data_long(destoffset, destval);
- } else {
- u16 *srcreg;
- u16 destval,tmp;
-
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_word(destoffset);
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- tmp = *srcreg;
- *srcreg = destval;
- destval = tmp;
- store_data_word(destoffset, destval);
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *srcreg;
- u32 destval,tmp;
-
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_long(destoffset);
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- tmp = *srcreg;
- *srcreg = destval;
- destval = tmp;
- store_data_long(destoffset, destval);
- } else {
- u16 *srcreg;
- u16 destval,tmp;
-
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_word(destoffset);
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- tmp = *srcreg;
- *srcreg = destval;
- destval = tmp;
- store_data_word(destoffset, destval);
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *srcreg;
- u32 destval,tmp;
-
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_long(destoffset);
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- tmp = *srcreg;
- *srcreg = destval;
- destval = tmp;
- store_data_long(destoffset, destval);
- } else {
- u16 *srcreg;
- u16 destval,tmp;
-
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_word(destoffset);
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- tmp = *srcreg;
- *srcreg = destval;
- destval = tmp;
- store_data_word(destoffset, destval);
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg,*srcreg;
- u32 tmp;
-
- destreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- tmp = *srcreg;
- *srcreg = *destreg;
- *destreg = tmp;
- } else {
- u16 *destreg,*srcreg;
- u16 tmp;
-
- destreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- tmp = *srcreg;
- *srcreg = *destreg;
- *destreg = tmp;
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x88
-****************************************************************************/
-void x86emuOp_mov_byte_RM_R(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- u8 *destreg, *srcreg;
- uint destoffset;
-
- START_OF_INSTR();
- DECODE_PRINTF("MOV\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- store_data_byte(destoffset, *srcreg);
- break;
- case 1:
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- store_data_byte(destoffset, *srcreg);
- break;
- case 2:
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- store_data_byte(destoffset, *srcreg);
- break;
- case 3: /* register to register */
- destreg = DECODE_RM_BYTE_REGISTER(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = *srcreg;
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x89
-****************************************************************************/
-void x86emuOp_mov_word_RM_R(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint destoffset;
-
- START_OF_INSTR();
- DECODE_PRINTF("MOV\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *srcreg;
-
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- store_data_long(destoffset, *srcreg);
- } else {
- u16 *srcreg;
-
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- store_data_word(destoffset, *srcreg);
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *srcreg;
-
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- store_data_long(destoffset, *srcreg);
- } else {
- u16 *srcreg;
-
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- store_data_word(destoffset, *srcreg);
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *srcreg;
-
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- store_data_long(destoffset, *srcreg);
- } else {
- u16 *srcreg;
-
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- store_data_word(destoffset, *srcreg);
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg,*srcreg;
-
- destreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = *srcreg;
- } else {
- u16 *destreg,*srcreg;
-
- destreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = *srcreg;
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x8a
-****************************************************************************/
-void x86emuOp_mov_byte_R_RM(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- u8 *destreg, *srcreg;
- uint srcoffset;
- u8 srcval;
-
- START_OF_INSTR();
- DECODE_PRINTF("MOV\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- destreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = fetch_data_byte(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = srcval;
- break;
- case 1:
- destreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = fetch_data_byte(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = srcval;
- break;
- case 2:
- destreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = fetch_data_byte(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = srcval;
- break;
- case 3: /* register to register */
- destreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_BYTE_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = *srcreg;
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x8b
-****************************************************************************/
-void x86emuOp_mov_word_R_RM(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint srcoffset;
-
- START_OF_INSTR();
- DECODE_PRINTF("MOV\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = fetch_data_long(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = srcval;
- } else {
- u16 *destreg;
- u16 srcval;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = fetch_data_word(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = srcval;
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = fetch_data_long(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = srcval;
- } else {
- u16 *destreg;
- u16 srcval;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = fetch_data_word(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = srcval;
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = fetch_data_long(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = srcval;
- } else {
- u16 *destreg;
- u16 srcval;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = fetch_data_word(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = srcval;
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg, *srcreg;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = *srcreg;
- } else {
- u16 *destreg, *srcreg;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = *srcreg;
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x8c
-****************************************************************************/
-void x86emuOp_mov_word_RM_SR(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- u16 *destreg, *srcreg;
- uint destoffset;
- u16 destval;
-
- START_OF_INSTR();
- DECODE_PRINTF("MOV\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- srcreg = decode_rm_seg_register(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = *srcreg;
- store_data_word(destoffset, destval);
- break;
- case 1:
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- srcreg = decode_rm_seg_register(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = *srcreg;
- store_data_word(destoffset, destval);
- break;
- case 2:
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- srcreg = decode_rm_seg_register(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = *srcreg;
- store_data_word(destoffset, destval);
- break;
- case 3: /* register to register */
- destreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF(",");
- srcreg = decode_rm_seg_register(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = *srcreg;
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x8d
-****************************************************************************/
-void x86emuOp_lea_word_R_M(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- u16 *srcreg;
- uint destoffset;
-
-/*
- * TODO: Need to handle address size prefix!
- *
- * lea eax,[eax+ebx*2] ??
- */
-
- START_OF_INSTR();
- DECODE_PRINTF("LEA\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *srcreg = (u16)destoffset;
- break;
- case 1:
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *srcreg = (u16)destoffset;
- break;
- case 2:
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *srcreg = (u16)destoffset;
- break;
- case 3: /* register to register */
- /* undefined. Do nothing. */
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x8e
-****************************************************************************/
-void x86emuOp_mov_word_SR_RM(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- u16 *destreg, *srcreg;
- uint srcoffset;
- u16 srcval;
-
- START_OF_INSTR();
- DECODE_PRINTF("MOV\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- destreg = decode_rm_seg_register(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = fetch_data_word(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = srcval;
- break;
- case 1:
- destreg = decode_rm_seg_register(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = fetch_data_word(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = srcval;
- break;
- case 2:
- destreg = decode_rm_seg_register(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = fetch_data_word(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = srcval;
- break;
- case 3: /* register to register */
- destreg = decode_rm_seg_register(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = *srcreg;
- break;
- }
- /*
- * Clean up, and reset all the R_xSP pointers to the correct
- * locations. This is about 3x too much overhead (doing all the
- * segreg ptrs when only one is needed, but this instruction
- * *cannot* be that common, and this isn't too much work anyway.
- */
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x8f
-****************************************************************************/
-void x86emuOp_pop_RM(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint destoffset;
-
- START_OF_INSTR();
- DECODE_PRINTF("POP\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- if (rh != 0) {
- DECODE_PRINTF("ILLEGAL DECODE OF OPCODE 8F\n");
- HALT_SYS();
- }
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = pop_long();
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
-
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = pop_word();
- store_data_word(destoffset, destval);
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = pop_long();
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
-
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = pop_word();
- store_data_word(destoffset, destval);
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = pop_long();
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
-
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = pop_word();
- store_data_word(destoffset, destval);
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
-
- destreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = pop_long();
- } else {
- u16 *destreg;
-
- destreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = pop_word();
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x90
-****************************************************************************/
-void x86emuOp_nop(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- DECODE_PRINTF("NOP\n");
- TRACE_AND_STEP();
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x91
-****************************************************************************/
-void x86emuOp_xchg_word_AX_CX(u8 X86EMU_UNUSED(op1))
-{
- u32 tmp;
-
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("XCHG\tEAX,ECX\n");
- } else {
- DECODE_PRINTF("XCHG\tAX,CX\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- tmp = M.x86.R_EAX;
- M.x86.R_EAX = M.x86.R_ECX;
- M.x86.R_ECX = tmp;
- } else {
- tmp = M.x86.R_AX;
- M.x86.R_AX = M.x86.R_CX;
- M.x86.R_CX = (u16)tmp;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x92
-****************************************************************************/
-void x86emuOp_xchg_word_AX_DX(u8 X86EMU_UNUSED(op1))
-{
- u32 tmp;
-
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("XCHG\tEAX,EDX\n");
- } else {
- DECODE_PRINTF("XCHG\tAX,DX\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- tmp = M.x86.R_EAX;
- M.x86.R_EAX = M.x86.R_EDX;
- M.x86.R_EDX = tmp;
- } else {
- tmp = M.x86.R_AX;
- M.x86.R_AX = M.x86.R_DX;
- M.x86.R_DX = (u16)tmp;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x93
-****************************************************************************/
-void x86emuOp_xchg_word_AX_BX(u8 X86EMU_UNUSED(op1))
-{
- u32 tmp;
-
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("XCHG\tEAX,EBX\n");
- } else {
- DECODE_PRINTF("XCHG\tAX,BX\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- tmp = M.x86.R_EAX;
- M.x86.R_EAX = M.x86.R_EBX;
- M.x86.R_EBX = tmp;
- } else {
- tmp = M.x86.R_AX;
- M.x86.R_AX = M.x86.R_BX;
- M.x86.R_BX = (u16)tmp;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x94
-****************************************************************************/
-void x86emuOp_xchg_word_AX_SP(u8 X86EMU_UNUSED(op1))
-{
- u32 tmp;
-
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("XCHG\tEAX,ESP\n");
- } else {
- DECODE_PRINTF("XCHG\tAX,SP\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- tmp = M.x86.R_EAX;
- M.x86.R_EAX = M.x86.R_ESP;
- M.x86.R_ESP = tmp;
- } else {
- tmp = M.x86.R_AX;
- M.x86.R_AX = M.x86.R_SP;
- M.x86.R_SP = (u16)tmp;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x95
-****************************************************************************/
-void x86emuOp_xchg_word_AX_BP(u8 X86EMU_UNUSED(op1))
-{
- u32 tmp;
-
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("XCHG\tEAX,EBP\n");
- } else {
- DECODE_PRINTF("XCHG\tAX,BP\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- tmp = M.x86.R_EAX;
- M.x86.R_EAX = M.x86.R_EBP;
- M.x86.R_EBP = tmp;
- } else {
- tmp = M.x86.R_AX;
- M.x86.R_AX = M.x86.R_BP;
- M.x86.R_BP = (u16)tmp;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x96
-****************************************************************************/
-void x86emuOp_xchg_word_AX_SI(u8 X86EMU_UNUSED(op1))
-{
- u32 tmp;
-
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("XCHG\tEAX,ESI\n");
- } else {
- DECODE_PRINTF("XCHG\tAX,SI\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- tmp = M.x86.R_EAX;
- M.x86.R_EAX = M.x86.R_ESI;
- M.x86.R_ESI = tmp;
- } else {
- tmp = M.x86.R_AX;
- M.x86.R_AX = M.x86.R_SI;
- M.x86.R_SI = (u16)tmp;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x97
-****************************************************************************/
-void x86emuOp_xchg_word_AX_DI(u8 X86EMU_UNUSED(op1))
-{
- u32 tmp;
-
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("XCHG\tEAX,EDI\n");
- } else {
- DECODE_PRINTF("XCHG\tAX,DI\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- tmp = M.x86.R_EAX;
- M.x86.R_EAX = M.x86.R_EDI;
- M.x86.R_EDI = tmp;
- } else {
- tmp = M.x86.R_AX;
- M.x86.R_AX = M.x86.R_DI;
- M.x86.R_DI = (u16)tmp;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x98
-****************************************************************************/
-void x86emuOp_cbw(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("CWDE\n");
- } else {
- DECODE_PRINTF("CBW\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- if (M.x86.R_AX & 0x8000) {
- M.x86.R_EAX |= 0xffff0000;
- } else {
- M.x86.R_EAX &= 0x0000ffff;
- }
- } else {
- if (M.x86.R_AL & 0x80) {
- M.x86.R_AH = 0xff;
- } else {
- M.x86.R_AH = 0x0;
- }
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x99
-****************************************************************************/
-void x86emuOp_cwd(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("CDQ\n");
- } else {
- DECODE_PRINTF("CWD\n");
- }
- DECODE_PRINTF("CWD\n");
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- if (M.x86.R_EAX & 0x80000000) {
- M.x86.R_EDX = 0xffffffff;
- } else {
- M.x86.R_EDX = 0x0;
- }
- } else {
- if (M.x86.R_AX & 0x8000) {
- M.x86.R_DX = 0xffff;
- } else {
- M.x86.R_DX = 0x0;
- }
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x9a
-****************************************************************************/
-void x86emuOp_call_far_IMM(u8 X86EMU_UNUSED(op1))
-{
- u16 farseg, faroff;
-
- START_OF_INSTR();
- DECODE_PRINTF("CALL\t");
- faroff = fetch_word_imm();
- farseg = fetch_word_imm();
- DECODE_PRINTF2("%04x:", farseg);
- DECODE_PRINTF2("%04x\n", faroff);
- CALL_TRACE(M.x86.saved_cs, M.x86.saved_ip, farseg, faroff, "FAR ");
-
- /* XXX
- *
- * Hooked interrupt vectors calling into our "BIOS" will cause
- * problems unless all intersegment stuff is checked for BIOS
- * access. Check needed here. For moment, let it alone.
- */
- TRACE_AND_STEP();
- push_word(M.x86.R_CS);
- M.x86.R_CS = farseg;
- push_word(M.x86.R_IP);
- M.x86.R_IP = faroff;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x9b
-****************************************************************************/
-void x86emuOp_wait(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- DECODE_PRINTF("WAIT");
- TRACE_AND_STEP();
- /* NADA. */
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x9c
-****************************************************************************/
-void x86emuOp_pushf_word(u8 X86EMU_UNUSED(op1))
-{
- u32 flags;
-
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("PUSHFD\n");
- } else {
- DECODE_PRINTF("PUSHF\n");
- }
- TRACE_AND_STEP();
-
- /* clear out *all* bits not representing flags, and turn on real bits */
- flags = (M.x86.R_EFLG & F_MSK) | F_ALWAYS_ON;
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- push_long(flags);
- } else {
- push_word((u16)flags);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x9d
-****************************************************************************/
-void x86emuOp_popf_word(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("POPFD\n");
- } else {
- DECODE_PRINTF("POPF\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_EFLG = pop_long();
- } else {
- M.x86.R_FLG = pop_word();
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x9e
-****************************************************************************/
-void x86emuOp_sahf(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- DECODE_PRINTF("SAHF\n");
- TRACE_AND_STEP();
- /* clear the lower bits of the flag register */
- M.x86.R_FLG &= 0xffffff00;
- /* or in the AH register into the flags register */
- M.x86.R_FLG |= M.x86.R_AH;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x9f
-****************************************************************************/
-void x86emuOp_lahf(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- DECODE_PRINTF("LAHF\n");
- TRACE_AND_STEP();
- M.x86.R_AH = (u8)(M.x86.R_FLG & 0xff);
- /*undocumented TC++ behavior??? Nope. It's documented, but
- you have too look real hard to notice it. */
- M.x86.R_AH |= 0x2;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xa0
-****************************************************************************/
-void x86emuOp_mov_AL_M_IMM(u8 X86EMU_UNUSED(op1))
-{
- u16 offset;
-
- START_OF_INSTR();
- DECODE_PRINTF("MOV\tAL,");
- offset = fetch_word_imm();
- DECODE_PRINTF2("[%04x]\n", offset);
- TRACE_AND_STEP();
- M.x86.R_AL = fetch_data_byte(offset);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xa1
-****************************************************************************/
-void x86emuOp_mov_AX_M_IMM(u8 X86EMU_UNUSED(op1))
-{
- u16 offset;
-
- START_OF_INSTR();
- offset = fetch_word_imm();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF2("MOV\tEAX,[%04x]\n", offset);
- } else {
- DECODE_PRINTF2("MOV\tAX,[%04x]\n", offset);
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_EAX = fetch_data_long(offset);
- } else {
- M.x86.R_AX = fetch_data_word(offset);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xa2
-****************************************************************************/
-void x86emuOp_mov_M_AL_IMM(u8 X86EMU_UNUSED(op1))
-{
- u16 offset;
-
- START_OF_INSTR();
- DECODE_PRINTF("MOV\t");
- offset = fetch_word_imm();
- DECODE_PRINTF2("[%04x],AL\n", offset);
- TRACE_AND_STEP();
- store_data_byte(offset, M.x86.R_AL);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xa3
-****************************************************************************/
-void x86emuOp_mov_M_AX_IMM(u8 X86EMU_UNUSED(op1))
-{
- u16 offset;
-
- START_OF_INSTR();
- offset = fetch_word_imm();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF2("MOV\t[%04x],EAX\n", offset);
- } else {
- DECODE_PRINTF2("MOV\t[%04x],AX\n", offset);
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- store_data_long(offset, M.x86.R_EAX);
- } else {
- store_data_word(offset, M.x86.R_AX);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xa4
-****************************************************************************/
-void x86emuOp_movs_byte(u8 X86EMU_UNUSED(op1))
-{
- u8 val;
- u32 count;
- int inc;
-
- START_OF_INSTR();
- DECODE_PRINTF("MOVS\tBYTE\n");
- if (ACCESS_FLAG(F_DF)) /* down */
- inc = -1;
- else
- inc = 1;
- TRACE_AND_STEP();
- count = 1;
- if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) {
- /* dont care whether REPE or REPNE */
- /* move them until CX is ZERO. */
- count = M.x86.R_CX;
- M.x86.R_CX = 0;
- M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE);
- }
- while (count--) {
- val = fetch_data_byte(M.x86.R_SI);
- store_data_byte_abs(M.x86.R_ES, M.x86.R_DI, val);
- M.x86.R_SI += inc;
- M.x86.R_DI += inc;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xa5
-****************************************************************************/
-void x86emuOp_movs_word(u8 X86EMU_UNUSED(op1))
-{
- u32 val;
- int inc;
- u32 count;
-
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("MOVS\tDWORD\n");
- if (ACCESS_FLAG(F_DF)) /* down */
- inc = -4;
- else
- inc = 4;
- } else {
- DECODE_PRINTF("MOVS\tWORD\n");
- if (ACCESS_FLAG(F_DF)) /* down */
- inc = -2;
- else
- inc = 2;
- }
- TRACE_AND_STEP();
- count = 1;
- if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) {
- /* dont care whether REPE or REPNE */
- /* move them until CX is ZERO. */
- count = M.x86.R_CX;
- M.x86.R_CX = 0;
- M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE);
- }
- while (count--) {
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- val = fetch_data_long(M.x86.R_SI);
- store_data_long_abs(M.x86.R_ES, M.x86.R_DI, val);
- } else {
- val = fetch_data_word(M.x86.R_SI);
- store_data_word_abs(M.x86.R_ES, M.x86.R_DI, (u16)val);
- }
- M.x86.R_SI += inc;
- M.x86.R_DI += inc;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xa6
-****************************************************************************/
-void x86emuOp_cmps_byte(u8 X86EMU_UNUSED(op1))
-{
- s8 val1, val2;
- int inc;
-
- START_OF_INSTR();
- DECODE_PRINTF("CMPS\tBYTE\n");
- TRACE_AND_STEP();
- if (ACCESS_FLAG(F_DF)) /* down */
- inc = -1;
- else
- inc = 1;
-
- if (M.x86.mode & SYSMODE_PREFIX_REPE) {
- /* REPE */
- /* move them until CX is ZERO. */
- while (M.x86.R_CX != 0) {
- val1 = fetch_data_byte(M.x86.R_SI);
- val2 = fetch_data_byte_abs(M.x86.R_ES, M.x86.R_DI);
- cmp_byte(val1, val2);
- M.x86.R_CX -= 1;
- M.x86.R_SI += inc;
- M.x86.R_DI += inc;
- if (ACCESS_FLAG(F_ZF) == 0)
- break;
- }
- M.x86.mode &= ~SYSMODE_PREFIX_REPE;
- } else if (M.x86.mode & SYSMODE_PREFIX_REPNE) {
- /* REPNE */
- /* move them until CX is ZERO. */
- while (M.x86.R_CX != 0) {
- val1 = fetch_data_byte(M.x86.R_SI);
- val2 = fetch_data_byte_abs(M.x86.R_ES, M.x86.R_DI);
- cmp_byte(val1, val2);
- M.x86.R_CX -= 1;
- M.x86.R_SI += inc;
- M.x86.R_DI += inc;
- if (ACCESS_FLAG(F_ZF))
- break; /* zero flag set means equal */
- }
- M.x86.mode &= ~SYSMODE_PREFIX_REPNE;
- } else {
- val1 = fetch_data_byte(M.x86.R_SI);
- val2 = fetch_data_byte_abs(M.x86.R_ES, M.x86.R_DI);
- cmp_byte(val1, val2);
- M.x86.R_SI += inc;
- M.x86.R_DI += inc;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xa7
-****************************************************************************/
-void x86emuOp_cmps_word(u8 X86EMU_UNUSED(op1))
-{
- u32 val1,val2;
- int inc;
-
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("CMPS\tDWORD\n");
- if (ACCESS_FLAG(F_DF)) /* down */
- inc = -4;
- else
- inc = 4;
- } else {
- DECODE_PRINTF("CMPS\tWORD\n");
- if (ACCESS_FLAG(F_DF)) /* down */
- inc = -2;
- else
- inc = 2;
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_REPE) {
- /* REPE */
- /* move them until CX is ZERO. */
- while (M.x86.R_CX != 0) {
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- val1 = fetch_data_long(M.x86.R_SI);
- val2 = fetch_data_long_abs(M.x86.R_ES, M.x86.R_DI);
- cmp_long(val1, val2);
- } else {
- val1 = fetch_data_word(M.x86.R_SI);
- val2 = fetch_data_word_abs(M.x86.R_ES, M.x86.R_DI);
- cmp_word((u16)val1, (u16)val2);
- }
- M.x86.R_CX -= 1;
- M.x86.R_SI += inc;
- M.x86.R_DI += inc;
- if (ACCESS_FLAG(F_ZF) == 0)
- break;
- }
- M.x86.mode &= ~SYSMODE_PREFIX_REPE;
- } else if (M.x86.mode & SYSMODE_PREFIX_REPNE) {
- /* REPNE */
- /* move them until CX is ZERO. */
- while (M.x86.R_CX != 0) {
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- val1 = fetch_data_long(M.x86.R_SI);
- val2 = fetch_data_long_abs(M.x86.R_ES, M.x86.R_DI);
- cmp_long(val1, val2);
- } else {
- val1 = fetch_data_word(M.x86.R_SI);
- val2 = fetch_data_word_abs(M.x86.R_ES, M.x86.R_DI);
- cmp_word((u16)val1, (u16)val2);
- }
- M.x86.R_CX -= 1;
- M.x86.R_SI += inc;
- M.x86.R_DI += inc;
- if (ACCESS_FLAG(F_ZF))
- break; /* zero flag set means equal */
- }
- M.x86.mode &= ~SYSMODE_PREFIX_REPNE;
- } else {
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- val1 = fetch_data_long(M.x86.R_SI);
- val2 = fetch_data_long_abs(M.x86.R_ES, M.x86.R_DI);
- cmp_long(val1, val2);
- } else {
- val1 = fetch_data_word(M.x86.R_SI);
- val2 = fetch_data_word_abs(M.x86.R_ES, M.x86.R_DI);
- cmp_word((u16)val1, (u16)val2);
- }
- M.x86.R_SI += inc;
- M.x86.R_DI += inc;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xa8
-****************************************************************************/
-void x86emuOp_test_AL_IMM(u8 X86EMU_UNUSED(op1))
-{
- int imm;
-
- START_OF_INSTR();
- DECODE_PRINTF("TEST\tAL,");
- imm = fetch_byte_imm();
- DECODE_PRINTF2("%04x\n", imm);
- TRACE_AND_STEP();
- test_byte(M.x86.R_AL, (u8)imm);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xa9
-****************************************************************************/
-void x86emuOp_test_AX_IMM(u8 X86EMU_UNUSED(op1))
-{
- u32 srcval;
-
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("TEST\tEAX,");
- srcval = fetch_long_imm();
- } else {
- DECODE_PRINTF("TEST\tAX,");
- srcval = fetch_word_imm();
- }
- DECODE_PRINTF2("%x\n", srcval);
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- test_long(M.x86.R_EAX, srcval);
- } else {
- test_word(M.x86.R_AX, (u16)srcval);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xaa
-****************************************************************************/
-void x86emuOp_stos_byte(u8 X86EMU_UNUSED(op1))
-{
- int inc;
-
- START_OF_INSTR();
- DECODE_PRINTF("STOS\tBYTE\n");
- if (ACCESS_FLAG(F_DF)) /* down */
- inc = -1;
- else
- inc = 1;
- TRACE_AND_STEP();
- if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) {
- /* dont care whether REPE or REPNE */
- /* move them until CX is ZERO. */
- while (M.x86.R_CX != 0) {
- store_data_byte_abs(M.x86.R_ES, M.x86.R_DI, M.x86.R_AL);
- M.x86.R_CX -= 1;
- M.x86.R_DI += inc;
- }
- M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE);
- } else {
- store_data_byte_abs(M.x86.R_ES, M.x86.R_DI, M.x86.R_AL);
- M.x86.R_DI += inc;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xab
-****************************************************************************/
-void x86emuOp_stos_word(u8 X86EMU_UNUSED(op1))
-{
- int inc;
- u32 count;
-
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("STOS\tDWORD\n");
- if (ACCESS_FLAG(F_DF)) /* down */
- inc = -4;
- else
- inc = 4;
- } else {
- DECODE_PRINTF("STOS\tWORD\n");
- if (ACCESS_FLAG(F_DF)) /* down */
- inc = -2;
- else
- inc = 2;
- }
- TRACE_AND_STEP();
- count = 1;
- if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) {
- /* dont care whether REPE or REPNE */
- /* move them until CX is ZERO. */
- count = M.x86.R_CX;
- M.x86.R_CX = 0;
- M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE);
- }
- while (count--) {
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- store_data_long_abs(M.x86.R_ES, M.x86.R_DI, M.x86.R_EAX);
- } else {
- store_data_word_abs(M.x86.R_ES, M.x86.R_DI, M.x86.R_AX);
- }
- M.x86.R_DI += inc;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xac
-****************************************************************************/
-void x86emuOp_lods_byte(u8 X86EMU_UNUSED(op1))
-{
- int inc;
-
- START_OF_INSTR();
- DECODE_PRINTF("LODS\tBYTE\n");
- TRACE_AND_STEP();
- if (ACCESS_FLAG(F_DF)) /* down */
- inc = -1;
- else
- inc = 1;
- if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) {
- /* dont care whether REPE or REPNE */
- /* move them until CX is ZERO. */
- while (M.x86.R_CX != 0) {
- M.x86.R_AL = fetch_data_byte(M.x86.R_SI);
- M.x86.R_CX -= 1;
- M.x86.R_SI += inc;
- }
- M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE);
- } else {
- M.x86.R_AL = fetch_data_byte(M.x86.R_SI);
- M.x86.R_SI += inc;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xad
-****************************************************************************/
-void x86emuOp_lods_word(u8 X86EMU_UNUSED(op1))
-{
- int inc;
- u32 count;
-
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("LODS\tDWORD\n");
- if (ACCESS_FLAG(F_DF)) /* down */
- inc = -4;
- else
- inc = 4;
- } else {
- DECODE_PRINTF("LODS\tWORD\n");
- if (ACCESS_FLAG(F_DF)) /* down */
- inc = -2;
- else
- inc = 2;
- }
- TRACE_AND_STEP();
- count = 1;
- if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) {
- /* dont care whether REPE or REPNE */
- /* move them until CX is ZERO. */
- count = M.x86.R_CX;
- M.x86.R_CX = 0;
- M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE);
- }
- while (count--) {
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_EAX = fetch_data_long(M.x86.R_SI);
- } else {
- M.x86.R_AX = fetch_data_word(M.x86.R_SI);
- }
- M.x86.R_SI += inc;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xae
-****************************************************************************/
-void x86emuOp_scas_byte(u8 X86EMU_UNUSED(op1))
-{
- s8 val2;
- int inc;
-
- START_OF_INSTR();
- DECODE_PRINTF("SCAS\tBYTE\n");
- TRACE_AND_STEP();
- if (ACCESS_FLAG(F_DF)) /* down */
- inc = -1;
- else
- inc = 1;
- if (M.x86.mode & SYSMODE_PREFIX_REPE) {
- /* REPE */
- /* move them until CX is ZERO. */
- while (M.x86.R_CX != 0) {
- val2 = fetch_data_byte_abs(M.x86.R_ES, M.x86.R_DI);
- cmp_byte(M.x86.R_AL, val2);
- M.x86.R_CX -= 1;
- M.x86.R_DI += inc;
- if (ACCESS_FLAG(F_ZF) == 0)
- break;
- }
- M.x86.mode &= ~SYSMODE_PREFIX_REPE;
- } else if (M.x86.mode & SYSMODE_PREFIX_REPNE) {
- /* REPNE */
- /* move them until CX is ZERO. */
- while (M.x86.R_CX != 0) {
- val2 = fetch_data_byte_abs(M.x86.R_ES, M.x86.R_DI);
- cmp_byte(M.x86.R_AL, val2);
- M.x86.R_CX -= 1;
- M.x86.R_DI += inc;
- if (ACCESS_FLAG(F_ZF))
- break; /* zero flag set means equal */
- }
- M.x86.mode &= ~SYSMODE_PREFIX_REPNE;
- } else {
- val2 = fetch_data_byte_abs(M.x86.R_ES, M.x86.R_DI);
- cmp_byte(M.x86.R_AL, val2);
- M.x86.R_DI += inc;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xaf
-****************************************************************************/
-void x86emuOp_scas_word(u8 X86EMU_UNUSED(op1))
-{
- int inc;
- u32 val;
-
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("SCAS\tDWORD\n");
- if (ACCESS_FLAG(F_DF)) /* down */
- inc = -4;
- else
- inc = 4;
- } else {
- DECODE_PRINTF("SCAS\tWORD\n");
- if (ACCESS_FLAG(F_DF)) /* down */
- inc = -2;
- else
- inc = 2;
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_REPE) {
- /* REPE */
- /* move them until CX is ZERO. */
- while (M.x86.R_CX != 0) {
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- val = fetch_data_long_abs(M.x86.R_ES, M.x86.R_DI);
- cmp_long(M.x86.R_EAX, val);
- } else {
- val = fetch_data_word_abs(M.x86.R_ES, M.x86.R_DI);
- cmp_word(M.x86.R_AX, (u16)val);
- }
- M.x86.R_CX -= 1;
- M.x86.R_DI += inc;
- if (ACCESS_FLAG(F_ZF) == 0)
- break;
- }
- M.x86.mode &= ~SYSMODE_PREFIX_REPE;
- } else if (M.x86.mode & SYSMODE_PREFIX_REPNE) {
- /* REPNE */
- /* move them until CX is ZERO. */
- while (M.x86.R_CX != 0) {
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- val = fetch_data_long_abs(M.x86.R_ES, M.x86.R_DI);
- cmp_long(M.x86.R_EAX, val);
- } else {
- val = fetch_data_word_abs(M.x86.R_ES, M.x86.R_DI);
- cmp_word(M.x86.R_AX, (u16)val);
- }
- M.x86.R_CX -= 1;
- M.x86.R_DI += inc;
- if (ACCESS_FLAG(F_ZF))
- break; /* zero flag set means equal */
- }
- M.x86.mode &= ~SYSMODE_PREFIX_REPNE;
- } else {
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- val = fetch_data_long_abs(M.x86.R_ES, M.x86.R_DI);
- cmp_long(M.x86.R_EAX, val);
- } else {
- val = fetch_data_word_abs(M.x86.R_ES, M.x86.R_DI);
- cmp_word(M.x86.R_AX, (u16)val);
- }
- M.x86.R_DI += inc;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xb0
-****************************************************************************/
-void x86emuOp_mov_byte_AL_IMM(u8 X86EMU_UNUSED(op1))
-{
- u8 imm;
-
- START_OF_INSTR();
- DECODE_PRINTF("MOV\tAL,");
- imm = fetch_byte_imm();
- DECODE_PRINTF2("%x\n", imm);
- TRACE_AND_STEP();
- M.x86.R_AL = imm;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xb1
-****************************************************************************/
-void x86emuOp_mov_byte_CL_IMM(u8 X86EMU_UNUSED(op1))
-{
- u8 imm;
-
- START_OF_INSTR();
- DECODE_PRINTF("MOV\tCL,");
- imm = fetch_byte_imm();
- DECODE_PRINTF2("%x\n", imm);
- TRACE_AND_STEP();
- M.x86.R_CL = imm;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xb2
-****************************************************************************/
-void x86emuOp_mov_byte_DL_IMM(u8 X86EMU_UNUSED(op1))
-{
- u8 imm;
-
- START_OF_INSTR();
- DECODE_PRINTF("MOV\tDL,");
- imm = fetch_byte_imm();
- DECODE_PRINTF2("%x\n", imm);
- TRACE_AND_STEP();
- M.x86.R_DL = imm;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xb3
-****************************************************************************/
-void x86emuOp_mov_byte_BL_IMM(u8 X86EMU_UNUSED(op1))
-{
- u8 imm;
-
- START_OF_INSTR();
- DECODE_PRINTF("MOV\tBL,");
- imm = fetch_byte_imm();
- DECODE_PRINTF2("%x\n", imm);
- TRACE_AND_STEP();
- M.x86.R_BL = imm;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xb4
-****************************************************************************/
-void x86emuOp_mov_byte_AH_IMM(u8 X86EMU_UNUSED(op1))
-{
- u8 imm;
-
- START_OF_INSTR();
- DECODE_PRINTF("MOV\tAH,");
- imm = fetch_byte_imm();
- DECODE_PRINTF2("%x\n", imm);
- TRACE_AND_STEP();
- M.x86.R_AH = imm;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xb5
-****************************************************************************/
-void x86emuOp_mov_byte_CH_IMM(u8 X86EMU_UNUSED(op1))
-{
- u8 imm;
-
- START_OF_INSTR();
- DECODE_PRINTF("MOV\tCH,");
- imm = fetch_byte_imm();
- DECODE_PRINTF2("%x\n", imm);
- TRACE_AND_STEP();
- M.x86.R_CH = imm;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xb6
-****************************************************************************/
-void x86emuOp_mov_byte_DH_IMM(u8 X86EMU_UNUSED(op1))
-{
- u8 imm;
-
- START_OF_INSTR();
- DECODE_PRINTF("MOV\tDH,");
- imm = fetch_byte_imm();
- DECODE_PRINTF2("%x\n", imm);
- TRACE_AND_STEP();
- M.x86.R_DH = imm;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xb7
-****************************************************************************/
-void x86emuOp_mov_byte_BH_IMM(u8 X86EMU_UNUSED(op1))
-{
- u8 imm;
-
- START_OF_INSTR();
- DECODE_PRINTF("MOV\tBH,");
- imm = fetch_byte_imm();
- DECODE_PRINTF2("%x\n", imm);
- TRACE_AND_STEP();
- M.x86.R_BH = imm;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xb8
-****************************************************************************/
-void x86emuOp_mov_word_AX_IMM(u8 X86EMU_UNUSED(op1))
-{
- u32 srcval;
-
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("MOV\tEAX,");
- srcval = fetch_long_imm();
- } else {
- DECODE_PRINTF("MOV\tAX,");
- srcval = fetch_word_imm();
- }
- DECODE_PRINTF2("%x\n", srcval);
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_EAX = srcval;
- } else {
- M.x86.R_AX = (u16)srcval;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xb9
-****************************************************************************/
-void x86emuOp_mov_word_CX_IMM(u8 X86EMU_UNUSED(op1))
-{
- u32 srcval;
-
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("MOV\tECX,");
- srcval = fetch_long_imm();
- } else {
- DECODE_PRINTF("MOV\tCX,");
- srcval = fetch_word_imm();
- }
- DECODE_PRINTF2("%x\n", srcval);
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_ECX = srcval;
- } else {
- M.x86.R_CX = (u16)srcval;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xba
-****************************************************************************/
-void x86emuOp_mov_word_DX_IMM(u8 X86EMU_UNUSED(op1))
-{
- u32 srcval;
-
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("MOV\tEDX,");
- srcval = fetch_long_imm();
- } else {
- DECODE_PRINTF("MOV\tDX,");
- srcval = fetch_word_imm();
- }
- DECODE_PRINTF2("%x\n", srcval);
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_EDX = srcval;
- } else {
- M.x86.R_DX = (u16)srcval;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xbb
-****************************************************************************/
-void x86emuOp_mov_word_BX_IMM(u8 X86EMU_UNUSED(op1))
-{
- u32 srcval;
-
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("MOV\tEBX,");
- srcval = fetch_long_imm();
- } else {
- DECODE_PRINTF("MOV\tBX,");
- srcval = fetch_word_imm();
- }
- DECODE_PRINTF2("%x\n", srcval);
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_EBX = srcval;
- } else {
- M.x86.R_BX = (u16)srcval;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xbc
-****************************************************************************/
-void x86emuOp_mov_word_SP_IMM(u8 X86EMU_UNUSED(op1))
-{
- u32 srcval;
-
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("MOV\tESP,");
- srcval = fetch_long_imm();
- } else {
- DECODE_PRINTF("MOV\tSP,");
- srcval = fetch_word_imm();
- }
- DECODE_PRINTF2("%x\n", srcval);
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_ESP = srcval;
- } else {
- M.x86.R_SP = (u16)srcval;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xbd
-****************************************************************************/
-void x86emuOp_mov_word_BP_IMM(u8 X86EMU_UNUSED(op1))
-{
- u32 srcval;
-
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("MOV\tEBP,");
- srcval = fetch_long_imm();
- } else {
- DECODE_PRINTF("MOV\tBP,");
- srcval = fetch_word_imm();
- }
- DECODE_PRINTF2("%x\n", srcval);
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_EBP = srcval;
- } else {
- M.x86.R_BP = (u16)srcval;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xbe
-****************************************************************************/
-void x86emuOp_mov_word_SI_IMM(u8 X86EMU_UNUSED(op1))
-{
- u32 srcval;
-
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("MOV\tESI,");
- srcval = fetch_long_imm();
- } else {
- DECODE_PRINTF("MOV\tSI,");
- srcval = fetch_word_imm();
- }
- DECODE_PRINTF2("%x\n", srcval);
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_ESI = srcval;
- } else {
- M.x86.R_SI = (u16)srcval;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xbf
-****************************************************************************/
-void x86emuOp_mov_word_DI_IMM(u8 X86EMU_UNUSED(op1))
-{
- u32 srcval;
-
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("MOV\tEDI,");
- srcval = fetch_long_imm();
- } else {
- DECODE_PRINTF("MOV\tDI,");
- srcval = fetch_word_imm();
- }
- DECODE_PRINTF2("%x\n", srcval);
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_EDI = srcval;
- } else {
- M.x86.R_DI = (u16)srcval;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/* used by opcodes c0, d0, and d2. */
-static u8(*opcD0_byte_operation[])(u8 d, u8 s) =
-{
- rol_byte,
- ror_byte,
- rcl_byte,
- rcr_byte,
- shl_byte,
- shr_byte,
- shl_byte, /* sal_byte === shl_byte by definition */
- sar_byte,
-};
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xc0
-****************************************************************************/
-void x86emuOp_opcC0_byte_RM_MEM(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- u8 *destreg;
- uint destoffset;
- u8 destval;
- u8 amt;
-
- /*
- * Yet another weirdo special case instruction format. Part of
- * the opcode held below in "RH". Doubly nested case would
- * result, except that the decoded instruction
- */
- START_OF_INSTR();
- FETCH_DECODE_MODRM(mod, rh, rl);
-#ifdef DEBUG
- if (DEBUG_DECODE()) {
- /* XXX DECODE_PRINTF may be changed to something more
- general, so that it is important to leave the strings
- in the same format, even though the result is that the
- above test is done twice. */
-
- switch (rh) {
- case 0:
- DECODE_PRINTF("ROL\t");
- break;
- case 1:
- DECODE_PRINTF("ROR\t");
- break;
- case 2:
- DECODE_PRINTF("RCL\t");
- break;
- case 3:
- DECODE_PRINTF("RCR\t");
- break;
- case 4:
- DECODE_PRINTF("SHL\t");
- break;
- case 5:
- DECODE_PRINTF("SHR\t");
- break;
- case 6:
- DECODE_PRINTF("SAL\t");
- break;
- case 7:
- DECODE_PRINTF("SAR\t");
- break;
- }
- }
-#endif
- /* know operation, decode the mod byte to find the addressing
- mode. */
- switch (mod) {
- case 0:
- DECODE_PRINTF("BYTE PTR ");
- destoffset = decode_rm00_address(rl);
- amt = fetch_byte_imm();
- DECODE_PRINTF2(",%x\n", amt);
- destval = fetch_data_byte(destoffset);
- TRACE_AND_STEP();
- destval = (*opcD0_byte_operation[rh]) (destval, amt);
- store_data_byte(destoffset, destval);
- break;
- case 1:
- DECODE_PRINTF("BYTE PTR ");
- destoffset = decode_rm01_address(rl);
- amt = fetch_byte_imm();
- DECODE_PRINTF2(",%x\n", amt);
- destval = fetch_data_byte(destoffset);
- TRACE_AND_STEP();
- destval = (*opcD0_byte_operation[rh]) (destval, amt);
- store_data_byte(destoffset, destval);
- break;
- case 2:
- DECODE_PRINTF("BYTE PTR ");
- destoffset = decode_rm10_address(rl);
- amt = fetch_byte_imm();
- DECODE_PRINTF2(",%x\n", amt);
- destval = fetch_data_byte(destoffset);
- TRACE_AND_STEP();
- destval = (*opcD0_byte_operation[rh]) (destval, amt);
- store_data_byte(destoffset, destval);
- break;
- case 3: /* register to register */
- destreg = DECODE_RM_BYTE_REGISTER(rl);
- amt = fetch_byte_imm();
- DECODE_PRINTF2(",%x\n", amt);
- TRACE_AND_STEP();
- destval = (*opcD0_byte_operation[rh]) (*destreg, amt);
- *destreg = destval;
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/* used by opcodes c1, d1, and d3. */
-static u16(*opcD1_word_operation[])(u16 s, u8 d) =
-{
- rol_word,
- ror_word,
- rcl_word,
- rcr_word,
- shl_word,
- shr_word,
- shl_word, /* sal_byte === shl_byte by definition */
- sar_word,
-};
-
-/* used by opcodes c1, d1, and d3. */
-static u32 (*opcD1_long_operation[])(u32 s, u8 d) =
-{
- rol_long,
- ror_long,
- rcl_long,
- rcr_long,
- shl_long,
- shr_long,
- shl_long, /* sal_byte === shl_byte by definition */
- sar_long,
-};
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xc1
-****************************************************************************/
-void x86emuOp_opcC1_word_RM_MEM(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint destoffset;
- u8 amt;
-
- /*
- * Yet another weirdo special case instruction format. Part of
- * the opcode held below in "RH". Doubly nested case would
- * result, except that the decoded instruction
- */
- START_OF_INSTR();
- FETCH_DECODE_MODRM(mod, rh, rl);
-#ifdef DEBUG
- if (DEBUG_DECODE()) {
- /* XXX DECODE_PRINTF may be changed to something more
- general, so that it is important to leave the strings
- in the same format, even though the result is that the
- above test is done twice. */
-
- switch (rh) {
- case 0:
- DECODE_PRINTF("ROL\t");
- break;
- case 1:
- DECODE_PRINTF("ROR\t");
- break;
- case 2:
- DECODE_PRINTF("RCL\t");
- break;
- case 3:
- DECODE_PRINTF("RCR\t");
- break;
- case 4:
- DECODE_PRINTF("SHL\t");
- break;
- case 5:
- DECODE_PRINTF("SHR\t");
- break;
- case 6:
- DECODE_PRINTF("SAL\t");
- break;
- case 7:
- DECODE_PRINTF("SAR\t");
- break;
- }
- }
-#endif
- /* know operation, decode the mod byte to find the addressing
- mode. */
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- DECODE_PRINTF("DWORD PTR ");
- destoffset = decode_rm00_address(rl);
- amt = fetch_byte_imm();
- DECODE_PRINTF2(",%x\n", amt);
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- destval = (*opcD1_long_operation[rh]) (destval, amt);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
-
- DECODE_PRINTF("WORD PTR ");
- destoffset = decode_rm00_address(rl);
- amt = fetch_byte_imm();
- DECODE_PRINTF2(",%x\n", amt);
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- destval = (*opcD1_word_operation[rh]) (destval, amt);
- store_data_word(destoffset, destval);
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- DECODE_PRINTF("DWORD PTR ");
- destoffset = decode_rm01_address(rl);
- amt = fetch_byte_imm();
- DECODE_PRINTF2(",%x\n", amt);
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- destval = (*opcD1_long_operation[rh]) (destval, amt);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
-
- DECODE_PRINTF("WORD PTR ");
- destoffset = decode_rm01_address(rl);
- amt = fetch_byte_imm();
- DECODE_PRINTF2(",%x\n", amt);
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- destval = (*opcD1_word_operation[rh]) (destval, amt);
- store_data_word(destoffset, destval);
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- DECODE_PRINTF("DWORD PTR ");
- destoffset = decode_rm10_address(rl);
- amt = fetch_byte_imm();
- DECODE_PRINTF2(",%x\n", amt);
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- destval = (*opcD1_long_operation[rh]) (destval, amt);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
-
- DECODE_PRINTF("WORD PTR ");
- destoffset = decode_rm10_address(rl);
- amt = fetch_byte_imm();
- DECODE_PRINTF2(",%x\n", amt);
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- destval = (*opcD1_word_operation[rh]) (destval, amt);
- store_data_word(destoffset, destval);
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
-
- destreg = DECODE_RM_LONG_REGISTER(rl);
- amt = fetch_byte_imm();
- DECODE_PRINTF2(",%x\n", amt);
- TRACE_AND_STEP();
- *destreg = (*opcD1_long_operation[rh]) (*destreg, amt);
- } else {
- u16 *destreg;
-
- destreg = DECODE_RM_WORD_REGISTER(rl);
- amt = fetch_byte_imm();
- DECODE_PRINTF2(",%x\n", amt);
- TRACE_AND_STEP();
- *destreg = (*opcD1_word_operation[rh]) (*destreg, amt);
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xc2
-****************************************************************************/
-void x86emuOp_ret_near_IMM(u8 X86EMU_UNUSED(op1))
-{
- u16 imm;
-
- START_OF_INSTR();
- DECODE_PRINTF("RET\t");
- imm = fetch_word_imm();
- DECODE_PRINTF2("%x\n", imm);
- RETURN_TRACE("RET",M.x86.saved_cs,M.x86.saved_ip);
- TRACE_AND_STEP();
- M.x86.R_IP = pop_word();
- M.x86.R_SP += imm;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xc3
-****************************************************************************/
-void x86emuOp_ret_near(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- DECODE_PRINTF("RET\n");
- RETURN_TRACE("RET",M.x86.saved_cs,M.x86.saved_ip);
- TRACE_AND_STEP();
- M.x86.R_IP = pop_word();
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xc4
-****************************************************************************/
-void x86emuOp_les_R_IMM(u8 X86EMU_UNUSED(op1))
-{
- int mod, rh, rl;
- u16 *dstreg;
- uint srcoffset;
-
- START_OF_INSTR();
- DECODE_PRINTF("LES\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- dstreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *dstreg = fetch_data_word(srcoffset);
- M.x86.R_ES = fetch_data_word(srcoffset + 2);
- break;
- case 1:
- dstreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *dstreg = fetch_data_word(srcoffset);
- M.x86.R_ES = fetch_data_word(srcoffset + 2);
- break;
- case 2:
- dstreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *dstreg = fetch_data_word(srcoffset);
- M.x86.R_ES = fetch_data_word(srcoffset + 2);
- break;
- case 3: /* register to register */
- /* UNDEFINED! */
- TRACE_AND_STEP();
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xc5
-****************************************************************************/
-void x86emuOp_lds_R_IMM(u8 X86EMU_UNUSED(op1))
-{
- int mod, rh, rl;
- u16 *dstreg;
- uint srcoffset;
-
- START_OF_INSTR();
- DECODE_PRINTF("LDS\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- dstreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *dstreg = fetch_data_word(srcoffset);
- M.x86.R_DS = fetch_data_word(srcoffset + 2);
- break;
- case 1:
- dstreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *dstreg = fetch_data_word(srcoffset);
- M.x86.R_DS = fetch_data_word(srcoffset + 2);
- break;
- case 2:
- dstreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *dstreg = fetch_data_word(srcoffset);
- M.x86.R_DS = fetch_data_word(srcoffset + 2);
- break;
- case 3: /* register to register */
- /* UNDEFINED! */
- TRACE_AND_STEP();
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xc6
-****************************************************************************/
-void x86emuOp_mov_byte_RM_IMM(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- u8 *destreg;
- uint destoffset;
- u8 imm;
-
- START_OF_INSTR();
- DECODE_PRINTF("MOV\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- if (rh != 0) {
- DECODE_PRINTF("ILLEGAL DECODE OF OPCODE c6\n");
- HALT_SYS();
- }
- switch (mod) {
- case 0:
- DECODE_PRINTF("BYTE PTR ");
- destoffset = decode_rm00_address(rl);
- imm = fetch_byte_imm();
- DECODE_PRINTF2(",%2x\n", imm);
- TRACE_AND_STEP();
- store_data_byte(destoffset, imm);
- break;
- case 1:
- DECODE_PRINTF("BYTE PTR ");
- destoffset = decode_rm01_address(rl);
- imm = fetch_byte_imm();
- DECODE_PRINTF2(",%2x\n", imm);
- TRACE_AND_STEP();
- store_data_byte(destoffset, imm);
- break;
- case 2:
- DECODE_PRINTF("BYTE PTR ");
- destoffset = decode_rm10_address(rl);
- imm = fetch_byte_imm();
- DECODE_PRINTF2(",%2x\n", imm);
- TRACE_AND_STEP();
- store_data_byte(destoffset, imm);
- break;
- case 3: /* register to register */
- destreg = DECODE_RM_BYTE_REGISTER(rl);
- imm = fetch_byte_imm();
- DECODE_PRINTF2(",%2x\n", imm);
- TRACE_AND_STEP();
- *destreg = imm;
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xc7
-****************************************************************************/
-void x86emuOp_mov_word_RM_IMM(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint destoffset;
-
- START_OF_INSTR();
- DECODE_PRINTF("MOV\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- if (rh != 0) {
- DECODE_PRINTF("ILLEGAL DECODE OF OPCODE 8F\n");
- HALT_SYS();
- }
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 imm;
-
- DECODE_PRINTF("DWORD PTR ");
- destoffset = decode_rm00_address(rl);
- imm = fetch_long_imm();
- DECODE_PRINTF2(",%x\n", imm);
- TRACE_AND_STEP();
- store_data_long(destoffset, imm);
- } else {
- u16 imm;
-
- DECODE_PRINTF("WORD PTR ");
- destoffset = decode_rm00_address(rl);
- imm = fetch_word_imm();
- DECODE_PRINTF2(",%x\n", imm);
- TRACE_AND_STEP();
- store_data_word(destoffset, imm);
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 imm;
-
- DECODE_PRINTF("DWORD PTR ");
- destoffset = decode_rm01_address(rl);
- imm = fetch_long_imm();
- DECODE_PRINTF2(",%x\n", imm);
- TRACE_AND_STEP();
- store_data_long(destoffset, imm);
- } else {
- u16 imm;
-
- DECODE_PRINTF("WORD PTR ");
- destoffset = decode_rm01_address(rl);
- imm = fetch_word_imm();
- DECODE_PRINTF2(",%x\n", imm);
- TRACE_AND_STEP();
- store_data_word(destoffset, imm);
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 imm;
-
- DECODE_PRINTF("DWORD PTR ");
- destoffset = decode_rm10_address(rl);
- imm = fetch_long_imm();
- DECODE_PRINTF2(",%x\n", imm);
- TRACE_AND_STEP();
- store_data_long(destoffset, imm);
- } else {
- u16 imm;
-
- DECODE_PRINTF("WORD PTR ");
- destoffset = decode_rm10_address(rl);
- imm = fetch_word_imm();
- DECODE_PRINTF2(",%x\n", imm);
- TRACE_AND_STEP();
- store_data_word(destoffset, imm);
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 imm;
-
- destreg = DECODE_RM_LONG_REGISTER(rl);
- imm = fetch_long_imm();
- DECODE_PRINTF2(",%x\n", imm);
- TRACE_AND_STEP();
- *destreg = imm;
- } else {
- u16 *destreg;
- u16 imm;
-
- destreg = DECODE_RM_WORD_REGISTER(rl);
- imm = fetch_word_imm();
- DECODE_PRINTF2(",%x\n", imm);
- TRACE_AND_STEP();
- *destreg = imm;
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xc8
-****************************************************************************/
-void x86emuOp_enter(u8 X86EMU_UNUSED(op1))
-{
- u16 local,frame_pointer;
- u8 nesting;
- int i;
-
- START_OF_INSTR();
- local = fetch_word_imm();
- nesting = fetch_byte_imm();
- DECODE_PRINTF2("ENTER %x\n", local);
- DECODE_PRINTF2(",%x\n", nesting);
- TRACE_AND_STEP();
- push_word(M.x86.R_BP);
- frame_pointer = M.x86.R_SP;
- if (nesting > 0) {
- for (i = 1; i < nesting; i++) {
- M.x86.R_BP -= 2;
- push_word(fetch_data_word_abs(M.x86.R_SS, M.x86.R_BP));
- }
- push_word(frame_pointer);
- }
- M.x86.R_BP = frame_pointer;
- M.x86.R_SP = (u16)(M.x86.R_SP - local);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xc9
-****************************************************************************/
-void x86emuOp_leave(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- DECODE_PRINTF("LEAVE\n");
- TRACE_AND_STEP();
- M.x86.R_SP = M.x86.R_BP;
- M.x86.R_BP = pop_word();
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xca
-****************************************************************************/
-void x86emuOp_ret_far_IMM(u8 X86EMU_UNUSED(op1))
-{
- u16 imm;
-
- START_OF_INSTR();
- DECODE_PRINTF("RETF\t");
- imm = fetch_word_imm();
- DECODE_PRINTF2("%x\n", imm);
- RETURN_TRACE("RETF",M.x86.saved_cs,M.x86.saved_ip);
- TRACE_AND_STEP();
- M.x86.R_IP = pop_word();
- M.x86.R_CS = pop_word();
- M.x86.R_SP += imm;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xcb
-****************************************************************************/
-void x86emuOp_ret_far(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- DECODE_PRINTF("RETF\n");
- RETURN_TRACE("RETF",M.x86.saved_cs,M.x86.saved_ip);
- TRACE_AND_STEP();
- M.x86.R_IP = pop_word();
- M.x86.R_CS = pop_word();
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xcc
-****************************************************************************/
-void x86emuOp_int3(u8 X86EMU_UNUSED(op1))
-{
- u16 tmp;
-
- START_OF_INSTR();
- DECODE_PRINTF("INT 3\n");
- tmp = (u16) mem_access_word(3 * 4 + 2);
- /* access the segment register */
- TRACE_AND_STEP();
- if (_X86EMU_intrTab[3]) {
- (*_X86EMU_intrTab[3])(3);
- } else {
- push_word((u16)M.x86.R_FLG);
- CLEAR_FLAG(F_IF);
- CLEAR_FLAG(F_TF);
- push_word(M.x86.R_CS);
- M.x86.R_CS = mem_access_word(3 * 4 + 2);
- push_word(M.x86.R_IP);
- M.x86.R_IP = mem_access_word(3 * 4);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xcd
-****************************************************************************/
-void x86emuOp_int_IMM(u8 X86EMU_UNUSED(op1))
-{
- u16 tmp;
- u8 intnum;
-
- START_OF_INSTR();
- DECODE_PRINTF("INT\t");
- intnum = fetch_byte_imm();
- DECODE_PRINTF2("%x\n", intnum);
- tmp = mem_access_word(intnum * 4 + 2);
- TRACE_AND_STEP();
- if (_X86EMU_intrTab[intnum]) {
- (*_X86EMU_intrTab[intnum])(intnum);
- } else {
- push_word((u16)M.x86.R_FLG);
- CLEAR_FLAG(F_IF);
- CLEAR_FLAG(F_TF);
- push_word(M.x86.R_CS);
- M.x86.R_CS = mem_access_word(intnum * 4 + 2);
- push_word(M.x86.R_IP);
- M.x86.R_IP = mem_access_word(intnum * 4);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xce
-****************************************************************************/
-void x86emuOp_into(u8 X86EMU_UNUSED(op1))
-{
- u16 tmp;
-
- START_OF_INSTR();
- DECODE_PRINTF("INTO\n");
- TRACE_AND_STEP();
- if (ACCESS_FLAG(F_OF)) {
- tmp = mem_access_word(4 * 4 + 2);
- if (_X86EMU_intrTab[4]) {
- (*_X86EMU_intrTab[4])(4);
- } else {
- push_word((u16)M.x86.R_FLG);
- CLEAR_FLAG(F_IF);
- CLEAR_FLAG(F_TF);
- push_word(M.x86.R_CS);
- M.x86.R_CS = mem_access_word(4 * 4 + 2);
- push_word(M.x86.R_IP);
- M.x86.R_IP = mem_access_word(4 * 4);
- }
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xcf
-****************************************************************************/
-void x86emuOp_iret(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- DECODE_PRINTF("IRET\n");
-
- TRACE_AND_STEP();
-
- M.x86.R_IP = pop_word();
- M.x86.R_CS = pop_word();
- M.x86.R_FLG = pop_word();
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xd0
-****************************************************************************/
-void x86emuOp_opcD0_byte_RM_1(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- u8 *destreg;
- uint destoffset;
- u8 destval;
-
- /*
- * Yet another weirdo special case instruction format. Part of
- * the opcode held below in "RH". Doubly nested case would
- * result, except that the decoded instruction
- */
- START_OF_INSTR();
- FETCH_DECODE_MODRM(mod, rh, rl);
-#ifdef DEBUG
- if (DEBUG_DECODE()) {
- /* XXX DECODE_PRINTF may be changed to something more
- general, so that it is important to leave the strings
- in the same format, even though the result is that the
- above test is done twice. */
- switch (rh) {
- case 0:
- DECODE_PRINTF("ROL\t");
- break;
- case 1:
- DECODE_PRINTF("ROR\t");
- break;
- case 2:
- DECODE_PRINTF("RCL\t");
- break;
- case 3:
- DECODE_PRINTF("RCR\t");
- break;
- case 4:
- DECODE_PRINTF("SHL\t");
- break;
- case 5:
- DECODE_PRINTF("SHR\t");
- break;
- case 6:
- DECODE_PRINTF("SAL\t");
- break;
- case 7:
- DECODE_PRINTF("SAR\t");
- break;
- }
- }
-#endif
- /* know operation, decode the mod byte to find the addressing
- mode. */
- switch (mod) {
- case 0:
- DECODE_PRINTF("BYTE PTR ");
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",1\n");
- destval = fetch_data_byte(destoffset);
- TRACE_AND_STEP();
- destval = (*opcD0_byte_operation[rh]) (destval, 1);
- store_data_byte(destoffset, destval);
- break;
- case 1:
- DECODE_PRINTF("BYTE PTR ");
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",1\n");
- destval = fetch_data_byte(destoffset);
- TRACE_AND_STEP();
- destval = (*opcD0_byte_operation[rh]) (destval, 1);
- store_data_byte(destoffset, destval);
- break;
- case 2:
- DECODE_PRINTF("BYTE PTR ");
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",1\n");
- destval = fetch_data_byte(destoffset);
- TRACE_AND_STEP();
- destval = (*opcD0_byte_operation[rh]) (destval, 1);
- store_data_byte(destoffset, destval);
- break;
- case 3: /* register to register */
- destreg = DECODE_RM_BYTE_REGISTER(rl);
- DECODE_PRINTF(",1\n");
- TRACE_AND_STEP();
- destval = (*opcD0_byte_operation[rh]) (*destreg, 1);
- *destreg = destval;
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xd1
-****************************************************************************/
-void x86emuOp_opcD1_word_RM_1(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint destoffset;
-
- /*
- * Yet another weirdo special case instruction format. Part of
- * the opcode held below in "RH". Doubly nested case would
- * result, except that the decoded instruction
- */
- START_OF_INSTR();
- FETCH_DECODE_MODRM(mod, rh, rl);
-#ifdef DEBUG
- if (DEBUG_DECODE()) {
- /* XXX DECODE_PRINTF may be changed to something more
- general, so that it is important to leave the strings
- in the same format, even though the result is that the
- above test is done twice. */
- switch (rh) {
- case 0:
- DECODE_PRINTF("ROL\t");
- break;
- case 1:
- DECODE_PRINTF("ROR\t");
- break;
- case 2:
- DECODE_PRINTF("RCL\t");
- break;
- case 3:
- DECODE_PRINTF("RCR\t");
- break;
- case 4:
- DECODE_PRINTF("SHL\t");
- break;
- case 5:
- DECODE_PRINTF("SHR\t");
- break;
- case 6:
- DECODE_PRINTF("SAL\t");
- break;
- case 7:
- DECODE_PRINTF("SAR\t");
- break;
- }
- }
-#endif
- /* know operation, decode the mod byte to find the addressing
- mode. */
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- DECODE_PRINTF("DWORD PTR ");
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",1\n");
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- destval = (*opcD1_long_operation[rh]) (destval, 1);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
-
- DECODE_PRINTF("WORD PTR ");
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",1\n");
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- destval = (*opcD1_word_operation[rh]) (destval, 1);
- store_data_word(destoffset, destval);
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- DECODE_PRINTF("DWORD PTR ");
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",1\n");
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- destval = (*opcD1_long_operation[rh]) (destval, 1);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
-
- DECODE_PRINTF("WORD PTR ");
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",1\n");
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- destval = (*opcD1_word_operation[rh]) (destval, 1);
- store_data_word(destoffset, destval);
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- DECODE_PRINTF("DWORD PTR ");
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",1\n");
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- destval = (*opcD1_long_operation[rh]) (destval, 1);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
-
- DECODE_PRINTF("BYTE PTR ");
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",1\n");
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- destval = (*opcD1_word_operation[rh]) (destval, 1);
- store_data_word(destoffset, destval);
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *destreg;
-
- destreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF(",1\n");
- TRACE_AND_STEP();
- destval = (*opcD1_long_operation[rh]) (*destreg, 1);
- *destreg = destval;
- } else {
- u16 destval;
- u16 *destreg;
-
- destreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF(",1\n");
- TRACE_AND_STEP();
- destval = (*opcD1_word_operation[rh]) (*destreg, 1);
- *destreg = destval;
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xd2
-****************************************************************************/
-void x86emuOp_opcD2_byte_RM_CL(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- u8 *destreg;
- uint destoffset;
- u8 destval;
- u8 amt;
-
- /*
- * Yet another weirdo special case instruction format. Part of
- * the opcode held below in "RH". Doubly nested case would
- * result, except that the decoded instruction
- */
- START_OF_INSTR();
- FETCH_DECODE_MODRM(mod, rh, rl);
-#ifdef DEBUG
- if (DEBUG_DECODE()) {
- /* XXX DECODE_PRINTF may be changed to something more
- general, so that it is important to leave the strings
- in the same format, even though the result is that the
- above test is done twice. */
- switch (rh) {
- case 0:
- DECODE_PRINTF("ROL\t");
- break;
- case 1:
- DECODE_PRINTF("ROR\t");
- break;
- case 2:
- DECODE_PRINTF("RCL\t");
- break;
- case 3:
- DECODE_PRINTF("RCR\t");
- break;
- case 4:
- DECODE_PRINTF("SHL\t");
- break;
- case 5:
- DECODE_PRINTF("SHR\t");
- break;
- case 6:
- DECODE_PRINTF("SAL\t");
- break;
- case 7:
- DECODE_PRINTF("SAR\t");
- break;
- }
- }
-#endif
- /* know operation, decode the mod byte to find the addressing
- mode. */
- amt = M.x86.R_CL;
- switch (mod) {
- case 0:
- DECODE_PRINTF("BYTE PTR ");
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",CL\n");
- destval = fetch_data_byte(destoffset);
- TRACE_AND_STEP();
- destval = (*opcD0_byte_operation[rh]) (destval, amt);
- store_data_byte(destoffset, destval);
- break;
- case 1:
- DECODE_PRINTF("BYTE PTR ");
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",CL\n");
- destval = fetch_data_byte(destoffset);
- TRACE_AND_STEP();
- destval = (*opcD0_byte_operation[rh]) (destval, amt);
- store_data_byte(destoffset, destval);
- break;
- case 2:
- DECODE_PRINTF("BYTE PTR ");
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",CL\n");
- destval = fetch_data_byte(destoffset);
- TRACE_AND_STEP();
- destval = (*opcD0_byte_operation[rh]) (destval, amt);
- store_data_byte(destoffset, destval);
- break;
- case 3: /* register to register */
- destreg = DECODE_RM_BYTE_REGISTER(rl);
- DECODE_PRINTF(",CL\n");
- TRACE_AND_STEP();
- destval = (*opcD0_byte_operation[rh]) (*destreg, amt);
- *destreg = destval;
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xd3
-****************************************************************************/
-void x86emuOp_opcD3_word_RM_CL(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint destoffset;
- u8 amt;
-
- /*
- * Yet another weirdo special case instruction format. Part of
- * the opcode held below in "RH". Doubly nested case would
- * result, except that the decoded instruction
- */
- START_OF_INSTR();
- FETCH_DECODE_MODRM(mod, rh, rl);
-#ifdef DEBUG
- if (DEBUG_DECODE()) {
- /* XXX DECODE_PRINTF may be changed to something more
- general, so that it is important to leave the strings
- in the same format, even though the result is that the
- above test is done twice. */
- switch (rh) {
- case 0:
- DECODE_PRINTF("ROL\t");
- break;
- case 1:
- DECODE_PRINTF("ROR\t");
- break;
- case 2:
- DECODE_PRINTF("RCL\t");
- break;
- case 3:
- DECODE_PRINTF("RCR\t");
- break;
- case 4:
- DECODE_PRINTF("SHL\t");
- break;
- case 5:
- DECODE_PRINTF("SHR\t");
- break;
- case 6:
- DECODE_PRINTF("SAL\t");
- break;
- case 7:
- DECODE_PRINTF("SAR\t");
- break;
- }
- }
-#endif
- /* know operation, decode the mod byte to find the addressing
- mode. */
- amt = M.x86.R_CL;
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- DECODE_PRINTF("DWORD PTR ");
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",CL\n");
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- destval = (*opcD1_long_operation[rh]) (destval, amt);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
-
- DECODE_PRINTF("WORD PTR ");
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",CL\n");
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- destval = (*opcD1_word_operation[rh]) (destval, amt);
- store_data_word(destoffset, destval);
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- DECODE_PRINTF("DWORD PTR ");
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",CL\n");
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- destval = (*opcD1_long_operation[rh]) (destval, amt);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
-
- DECODE_PRINTF("WORD PTR ");
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",CL\n");
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- destval = (*opcD1_word_operation[rh]) (destval, amt);
- store_data_word(destoffset, destval);
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- DECODE_PRINTF("DWORD PTR ");
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",CL\n");
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- destval = (*opcD1_long_operation[rh]) (destval, amt);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
-
- DECODE_PRINTF("WORD PTR ");
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",CL\n");
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- destval = (*opcD1_word_operation[rh]) (destval, amt);
- store_data_word(destoffset, destval);
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
-
- destreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF(",CL\n");
- TRACE_AND_STEP();
- *destreg = (*opcD1_long_operation[rh]) (*destreg, amt);
- } else {
- u16 *destreg;
-
- destreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF(",CL\n");
- TRACE_AND_STEP();
- *destreg = (*opcD1_word_operation[rh]) (*destreg, amt);
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xd4
-****************************************************************************/
-void x86emuOp_aam(u8 X86EMU_UNUSED(op1))
-{
- u8 a;
-
- START_OF_INSTR();
- DECODE_PRINTF("AAM\n");
- a = fetch_byte_imm(); /* this is a stupid encoding. */
- if (a != 10) {
- DECODE_PRINTF("ERROR DECODING AAM\n");
- TRACE_REGS();
- HALT_SYS();
- }
- TRACE_AND_STEP();
- /* note the type change here --- returning AL and AH in AX. */
- M.x86.R_AX = aam_word(M.x86.R_AL);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xd5
-****************************************************************************/
-void x86emuOp_aad(u8 X86EMU_UNUSED(op1))
-{
- u8 a;
-
- START_OF_INSTR();
- DECODE_PRINTF("AAD\n");
- a = fetch_byte_imm();
- TRACE_AND_STEP();
- M.x86.R_AX = aad_word(M.x86.R_AX);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/* opcode 0xd6 ILLEGAL OPCODE */
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xd7
-****************************************************************************/
-void x86emuOp_xlat(u8 X86EMU_UNUSED(op1))
-{
- u16 addr;
-
- START_OF_INSTR();
- DECODE_PRINTF("XLAT\n");
- TRACE_AND_STEP();
- addr = (u16)(M.x86.R_BX + (u8)M.x86.R_AL);
- M.x86.R_AL = fetch_data_byte(addr);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/* instuctions D8 .. DF are in i87_ops.c */
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xe0
-****************************************************************************/
-void x86emuOp_loopne(u8 X86EMU_UNUSED(op1))
-{
- s16 ip;
-
- START_OF_INSTR();
- DECODE_PRINTF("LOOPNE\t");
- ip = (s8) fetch_byte_imm();
- ip += (s16) M.x86.R_IP;
- DECODE_PRINTF2("%04x\n", ip);
- TRACE_AND_STEP();
- M.x86.R_CX -= 1;
- if (M.x86.R_CX != 0 && !ACCESS_FLAG(F_ZF)) /* CX != 0 and !ZF */
- M.x86.R_IP = ip;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xe1
-****************************************************************************/
-void x86emuOp_loope(u8 X86EMU_UNUSED(op1))
-{
- s16 ip;
-
- START_OF_INSTR();
- DECODE_PRINTF("LOOPE\t");
- ip = (s8) fetch_byte_imm();
- ip += (s16) M.x86.R_IP;
- DECODE_PRINTF2("%04x\n", ip);
- TRACE_AND_STEP();
- M.x86.R_CX -= 1;
- if (M.x86.R_CX != 0 && ACCESS_FLAG(F_ZF)) /* CX != 0 and ZF */
- M.x86.R_IP = ip;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xe2
-****************************************************************************/
-void x86emuOp_loop(u8 X86EMU_UNUSED(op1))
-{
- s16 ip;
-
- START_OF_INSTR();
- DECODE_PRINTF("LOOP\t");
- ip = (s8) fetch_byte_imm();
- ip += (s16) M.x86.R_IP;
- DECODE_PRINTF2("%04x\n", ip);
- TRACE_AND_STEP();
- M.x86.R_CX -= 1;
- if (M.x86.R_CX != 0)
- M.x86.R_IP = ip;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xe3
-****************************************************************************/
-void x86emuOp_jcxz(u8 X86EMU_UNUSED(op1))
-{
- u16 target;
- s8 offset;
-
- /* jump to byte offset if overflow flag is set */
- START_OF_INSTR();
- DECODE_PRINTF("JCXZ\t");
- offset = (s8)fetch_byte_imm();
- target = (u16)(M.x86.R_IP + offset);
- DECODE_PRINTF2("%x\n", target);
- TRACE_AND_STEP();
- if (M.x86.R_CX == 0)
- M.x86.R_IP = target;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xe4
-****************************************************************************/
-void x86emuOp_in_byte_AL_IMM(u8 X86EMU_UNUSED(op1))
-{
- u8 port;
-
- START_OF_INSTR();
- DECODE_PRINTF("IN\t");
- port = (u8) fetch_byte_imm();
- DECODE_PRINTF2("%x,AL\n", port);
- TRACE_AND_STEP();
- M.x86.R_AL = (*sys_inb)(port);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xe5
-****************************************************************************/
-void x86emuOp_in_word_AX_IMM(u8 X86EMU_UNUSED(op1))
-{
- u8 port;
-
- START_OF_INSTR();
- DECODE_PRINTF("IN\t");
- port = (u8) fetch_byte_imm();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF2("EAX,%x\n", port);
- } else {
- DECODE_PRINTF2("AX,%x\n", port);
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_EAX = (*sys_inl)(port);
- } else {
- M.x86.R_AX = (*sys_inw)(port);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xe6
-****************************************************************************/
-void x86emuOp_out_byte_IMM_AL(u8 X86EMU_UNUSED(op1))
-{
- u8 port;
-
- START_OF_INSTR();
- DECODE_PRINTF("OUT\t");
- port = (u8) fetch_byte_imm();
- DECODE_PRINTF2("%x,AL\n", port);
- TRACE_AND_STEP();
- (*sys_outb)(port, M.x86.R_AL);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xe7
-****************************************************************************/
-void x86emuOp_out_word_IMM_AX(u8 X86EMU_UNUSED(op1))
-{
- u8 port;
-
- START_OF_INSTR();
- DECODE_PRINTF("OUT\t");
- port = (u8) fetch_byte_imm();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF2("%x,EAX\n", port);
- } else {
- DECODE_PRINTF2("%x,AX\n", port);
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- (*sys_outl)(port, M.x86.R_EAX);
- } else {
- (*sys_outw)(port, M.x86.R_AX);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xe8
-****************************************************************************/
-void x86emuOp_call_near_IMM(u8 X86EMU_UNUSED(op1))
-{
- s16 ip;
-
- START_OF_INSTR();
- DECODE_PRINTF("CALL\t");
- ip = (s16) fetch_word_imm();
- ip += (s16) M.x86.R_IP; /* CHECK SIGN */
- DECODE_PRINTF2("%04x\n", ip);
- CALL_TRACE(M.x86.saved_cs, M.x86.saved_ip, M.x86.R_CS, ip, "");
- TRACE_AND_STEP();
- push_word(M.x86.R_IP);
- M.x86.R_IP = ip;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xe9
-****************************************************************************/
-void x86emuOp_jump_near_IMM(u8 X86EMU_UNUSED(op1))
-{
- int ip;
-
- START_OF_INSTR();
- DECODE_PRINTF("JMP\t");
- ip = (s16)fetch_word_imm();
- ip += (s16)M.x86.R_IP;
- DECODE_PRINTF2("%04x\n", ip);
- TRACE_AND_STEP();
- M.x86.R_IP = (u16)ip;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xea
-****************************************************************************/
-void x86emuOp_jump_far_IMM(u8 X86EMU_UNUSED(op1))
-{
- u16 cs, ip;
-
- START_OF_INSTR();
- DECODE_PRINTF("JMP\tFAR ");
- ip = fetch_word_imm();
- cs = fetch_word_imm();
- DECODE_PRINTF2("%04x:", cs);
- DECODE_PRINTF2("%04x\n", ip);
- TRACE_AND_STEP();
- M.x86.R_IP = ip;
- M.x86.R_CS = cs;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xeb
-****************************************************************************/
-void x86emuOp_jump_byte_IMM(u8 X86EMU_UNUSED(op1))
-{
- u16 target;
- s8 offset;
-
- START_OF_INSTR();
- DECODE_PRINTF("JMP\t");
- offset = (s8)fetch_byte_imm();
- target = (u16)(M.x86.R_IP + offset);
- DECODE_PRINTF2("%x\n", target);
- TRACE_AND_STEP();
- M.x86.R_IP = target;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xec
-****************************************************************************/
-void x86emuOp_in_byte_AL_DX(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- DECODE_PRINTF("IN\tAL,DX\n");
- TRACE_AND_STEP();
- M.x86.R_AL = (*sys_inb)(M.x86.R_DX);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xed
-****************************************************************************/
-void x86emuOp_in_word_AX_DX(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("IN\tEAX,DX\n");
- } else {
- DECODE_PRINTF("IN\tAX,DX\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_EAX = (*sys_inl)(M.x86.R_DX);
- } else {
- M.x86.R_AX = (*sys_inw)(M.x86.R_DX);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xee
-****************************************************************************/
-void x86emuOp_out_byte_DX_AL(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- DECODE_PRINTF("OUT\tDX,AL\n");
- TRACE_AND_STEP();
- (*sys_outb)(M.x86.R_DX, M.x86.R_AL);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xef
-****************************************************************************/
-void x86emuOp_out_word_DX_AX(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("OUT\tDX,EAX\n");
- } else {
- DECODE_PRINTF("OUT\tDX,AX\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- (*sys_outl)(M.x86.R_DX, M.x86.R_EAX);
- } else {
- (*sys_outw)(M.x86.R_DX, M.x86.R_AX);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xf0
-****************************************************************************/
-void x86emuOp_lock(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- DECODE_PRINTF("LOCK:\n");
- TRACE_AND_STEP();
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/*opcode 0xf1 ILLEGAL OPERATION */
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xf2
-****************************************************************************/
-void x86emuOp_repne(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- DECODE_PRINTF("REPNE\n");
- TRACE_AND_STEP();
- M.x86.mode |= SYSMODE_PREFIX_REPNE;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xf3
-****************************************************************************/
-void x86emuOp_repe(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- DECODE_PRINTF("REPE\n");
- TRACE_AND_STEP();
- M.x86.mode |= SYSMODE_PREFIX_REPE;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xf4
-****************************************************************************/
-void x86emuOp_halt(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- DECODE_PRINTF("HALT\n");
- TRACE_AND_STEP();
- HALT_SYS();
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xf5
-****************************************************************************/
-void x86emuOp_cmc(u8 X86EMU_UNUSED(op1))
-{
- /* complement the carry flag. */
- START_OF_INSTR();
- DECODE_PRINTF("CMC\n");
- TRACE_AND_STEP();
- TOGGLE_FLAG(F_CF);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xf6
-****************************************************************************/
-void x86emuOp_opcF6_byte_RM(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- u8 *destreg;
- uint destoffset;
- u8 destval, srcval;
-
- /* long, drawn out code follows. Double switch for a total
- of 32 cases. */
- START_OF_INSTR();
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0: /* mod=00 */
- switch (rh) {
- case 0: /* test byte imm */
- DECODE_PRINTF("TEST\tBYTE PTR ");
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- srcval = fetch_byte_imm();
- DECODE_PRINTF2("%02x\n", srcval);
- destval = fetch_data_byte(destoffset);
- TRACE_AND_STEP();
- test_byte(destval, srcval);
- break;
- case 1:
- DECODE_PRINTF("ILLEGAL OP MOD=00 RH=01 OP=F6\n");
- HALT_SYS();
- break;
- case 2:
- DECODE_PRINTF("NOT\tBYTE PTR ");
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_byte(destoffset);
- TRACE_AND_STEP();
- destval = not_byte(destval);
- store_data_byte(destoffset, destval);
- break;
- case 3:
- DECODE_PRINTF("NEG\tBYTE PTR ");
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_byte(destoffset);
- TRACE_AND_STEP();
- destval = neg_byte(destval);
- store_data_byte(destoffset, destval);
- break;
- case 4:
- DECODE_PRINTF("MUL\tBYTE PTR ");
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_byte(destoffset);
- TRACE_AND_STEP();
- mul_byte(destval);
- break;
- case 5:
- DECODE_PRINTF("IMUL\tBYTE PTR ");
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_byte(destoffset);
- TRACE_AND_STEP();
- imul_byte(destval);
- break;
- case 6:
- DECODE_PRINTF("DIV\tBYTE PTR ");
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_byte(destoffset);
- TRACE_AND_STEP();
- div_byte(destval);
- break;
- case 7:
- DECODE_PRINTF("IDIV\tBYTE PTR ");
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_byte(destoffset);
- TRACE_AND_STEP();
- idiv_byte(destval);
- break;
- }
- break; /* end mod==00 */
- case 1: /* mod=01 */
- switch (rh) {
- case 0: /* test byte imm */
- DECODE_PRINTF("TEST\tBYTE PTR ");
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- srcval = fetch_byte_imm();
- DECODE_PRINTF2("%02x\n", srcval);
- destval = fetch_data_byte(destoffset);
- TRACE_AND_STEP();
- test_byte(destval, srcval);
- break;
- case 1:
- DECODE_PRINTF("ILLEGAL OP MOD=01 RH=01 OP=F6\n");
- HALT_SYS();
- break;
- case 2:
- DECODE_PRINTF("NOT\tBYTE PTR ");
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_byte(destoffset);
- TRACE_AND_STEP();
- destval = not_byte(destval);
- store_data_byte(destoffset, destval);
- break;
- case 3:
- DECODE_PRINTF("NEG\tBYTE PTR ");
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_byte(destoffset);
- TRACE_AND_STEP();
- destval = neg_byte(destval);
- store_data_byte(destoffset, destval);
- break;
- case 4:
- DECODE_PRINTF("MUL\tBYTE PTR ");
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_byte(destoffset);
- TRACE_AND_STEP();
- mul_byte(destval);
- break;
- case 5:
- DECODE_PRINTF("IMUL\tBYTE PTR ");
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_byte(destoffset);
- TRACE_AND_STEP();
- imul_byte(destval);
- break;
- case 6:
- DECODE_PRINTF("DIV\tBYTE PTR ");
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_byte(destoffset);
- TRACE_AND_STEP();
- div_byte(destval);
- break;
- case 7:
- DECODE_PRINTF("IDIV\tBYTE PTR ");
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_byte(destoffset);
- TRACE_AND_STEP();
- idiv_byte(destval);
- break;
- }
- break; /* end mod==01 */
- case 2: /* mod=10 */
- switch (rh) {
- case 0: /* test byte imm */
- DECODE_PRINTF("TEST\tBYTE PTR ");
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- srcval = fetch_byte_imm();
- DECODE_PRINTF2("%02x\n", srcval);
- destval = fetch_data_byte(destoffset);
- TRACE_AND_STEP();
- test_byte(destval, srcval);
- break;
- case 1:
- DECODE_PRINTF("ILLEGAL OP MOD=10 RH=01 OP=F6\n");
- HALT_SYS();
- break;
- case 2:
- DECODE_PRINTF("NOT\tBYTE PTR ");
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_byte(destoffset);
- TRACE_AND_STEP();
- destval = not_byte(destval);
- store_data_byte(destoffset, destval);
- break;
- case 3:
- DECODE_PRINTF("NEG\tBYTE PTR ");
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_byte(destoffset);
- TRACE_AND_STEP();
- destval = neg_byte(destval);
- store_data_byte(destoffset, destval);
- break;
- case 4:
- DECODE_PRINTF("MUL\tBYTE PTR ");
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_byte(destoffset);
- TRACE_AND_STEP();
- mul_byte(destval);
- break;
- case 5:
- DECODE_PRINTF("IMUL\tBYTE PTR ");
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_byte(destoffset);
- TRACE_AND_STEP();
- imul_byte(destval);
- break;
- case 6:
- DECODE_PRINTF("DIV\tBYTE PTR ");
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_byte(destoffset);
- TRACE_AND_STEP();
- div_byte(destval);
- break;
- case 7:
- DECODE_PRINTF("IDIV\tBYTE PTR ");
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_byte(destoffset);
- TRACE_AND_STEP();
- idiv_byte(destval);
- break;
- }
- break; /* end mod==10 */
- case 3: /* mod=11 */
- switch (rh) {
- case 0: /* test byte imm */
- DECODE_PRINTF("TEST\t");
- destreg = DECODE_RM_BYTE_REGISTER(rl);
- DECODE_PRINTF(",");
- srcval = fetch_byte_imm();
- DECODE_PRINTF2("%02x\n", srcval);
- TRACE_AND_STEP();
- test_byte(*destreg, srcval);
- break;
- case 1:
- DECODE_PRINTF("ILLEGAL OP MOD=00 RH=01 OP=F6\n");
- HALT_SYS();
- break;
- case 2:
- DECODE_PRINTF("NOT\t");
- destreg = DECODE_RM_BYTE_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = not_byte(*destreg);
- break;
- case 3:
- DECODE_PRINTF("NEG\t");
- destreg = DECODE_RM_BYTE_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = neg_byte(*destreg);
- break;
- case 4:
- DECODE_PRINTF("MUL\t");
- destreg = DECODE_RM_BYTE_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- mul_byte(*destreg); /*!!! */
- break;
- case 5:
- DECODE_PRINTF("IMUL\t");
- destreg = DECODE_RM_BYTE_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- imul_byte(*destreg);
- break;
- case 6:
- DECODE_PRINTF("DIV\t");
- destreg = DECODE_RM_BYTE_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- div_byte(*destreg);
- break;
- case 7:
- DECODE_PRINTF("IDIV\t");
- destreg = DECODE_RM_BYTE_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- idiv_byte(*destreg);
- break;
- }
- break; /* end mod==11 */
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xf7
-****************************************************************************/
-void x86emuOp_opcF7_word_RM(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint destoffset;
-
- /* long, drawn out code follows. Double switch for a total
- of 32 cases. */
- START_OF_INSTR();
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0: /* mod=00 */
- switch (rh) {
- case 0: /* test word imm */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval,srcval;
-
- DECODE_PRINTF("TEST\tDWORD PTR ");
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- srcval = fetch_long_imm();
- DECODE_PRINTF2("%x\n", srcval);
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- test_long(destval, srcval);
- } else {
- u16 destval,srcval;
-
- DECODE_PRINTF("TEST\tWORD PTR ");
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- srcval = fetch_word_imm();
- DECODE_PRINTF2("%x\n", srcval);
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- test_word(destval, srcval);
- }
- break;
- case 1:
- DECODE_PRINTF("ILLEGAL OP MOD=00 RH=01 OP=F7\n");
- HALT_SYS();
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- DECODE_PRINTF("NOT\tDWORD PTR ");
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- destval = not_long(destval);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
-
- DECODE_PRINTF("NOT\tWORD PTR ");
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- destval = not_word(destval);
- store_data_word(destoffset, destval);
- }
- break;
- case 3:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- DECODE_PRINTF("NEG\tDWORD PTR ");
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- destval = neg_long(destval);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
-
- DECODE_PRINTF("NEG\tWORD PTR ");
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- destval = neg_word(destval);
- store_data_word(destoffset, destval);
- }
- break;
- case 4:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- DECODE_PRINTF("MUL\tDWORD PTR ");
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- mul_long(destval);
- } else {
- u16 destval;
-
- DECODE_PRINTF("MUL\tWORD PTR ");
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- mul_word(destval);
- }
- break;
- case 5:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- DECODE_PRINTF("IMUL\tDWORD PTR ");
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- imul_long(destval);
- } else {
- u16 destval;
-
- DECODE_PRINTF("IMUL\tWORD PTR ");
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- imul_word(destval);
- }
- break;
- case 6:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- DECODE_PRINTF("DIV\tDWORD PTR ");
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- div_long(destval);
- } else {
- u16 destval;
-
- DECODE_PRINTF("DIV\tWORD PTR ");
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- div_word(destval);
- }
- break;
- case 7:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- DECODE_PRINTF("IDIV\tDWORD PTR ");
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- idiv_long(destval);
- } else {
- u16 destval;
-
- DECODE_PRINTF("IDIV\tWORD PTR ");
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- idiv_word(destval);
- }
- break;
- }
- break; /* end mod==00 */
- case 1: /* mod=01 */
- switch (rh) {
- case 0: /* test word imm */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval,srcval;
-
- DECODE_PRINTF("TEST\tDWORD PTR ");
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- srcval = fetch_long_imm();
- DECODE_PRINTF2("%x\n", srcval);
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- test_long(destval, srcval);
- } else {
- u16 destval,srcval;
-
- DECODE_PRINTF("TEST\tWORD PTR ");
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- srcval = fetch_word_imm();
- DECODE_PRINTF2("%x\n", srcval);
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- test_word(destval, srcval);
- }
- break;
- case 1:
- DECODE_PRINTF("ILLEGAL OP MOD=01 RH=01 OP=F6\n");
- HALT_SYS();
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- DECODE_PRINTF("NOT\tDWORD PTR ");
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- destval = not_long(destval);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
-
- DECODE_PRINTF("NOT\tWORD PTR ");
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- destval = not_word(destval);
- store_data_word(destoffset, destval);
- }
- break;
- case 3:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- DECODE_PRINTF("NEG\tDWORD PTR ");
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- destval = neg_long(destval);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
-
- DECODE_PRINTF("NEG\tWORD PTR ");
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- destval = neg_word(destval);
- store_data_word(destoffset, destval);
- }
- break;
- case 4:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- DECODE_PRINTF("MUL\tDWORD PTR ");
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- mul_long(destval);
- } else {
- u16 destval;
-
- DECODE_PRINTF("MUL\tWORD PTR ");
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- mul_word(destval);
- }
- break;
- case 5:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- DECODE_PRINTF("IMUL\tDWORD PTR ");
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- imul_long(destval);
- } else {
- u16 destval;
-
- DECODE_PRINTF("IMUL\tWORD PTR ");
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- imul_word(destval);
- }
- break;
- case 6:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- DECODE_PRINTF("DIV\tDWORD PTR ");
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- div_long(destval);
- } else {
- u16 destval;
-
- DECODE_PRINTF("DIV\tWORD PTR ");
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- div_word(destval);
- }
- break;
- case 7:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- DECODE_PRINTF("IDIV\tDWORD PTR ");
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- idiv_long(destval);
- } else {
- u16 destval;
-
- DECODE_PRINTF("IDIV\tWORD PTR ");
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- idiv_word(destval);
- }
- break;
- }
- break; /* end mod==01 */
- case 2: /* mod=10 */
- switch (rh) {
- case 0: /* test word imm */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval,srcval;
-
- DECODE_PRINTF("TEST\tDWORD PTR ");
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- srcval = fetch_long_imm();
- DECODE_PRINTF2("%x\n", srcval);
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- test_long(destval, srcval);
- } else {
- u16 destval,srcval;
-
- DECODE_PRINTF("TEST\tWORD PTR ");
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- srcval = fetch_word_imm();
- DECODE_PRINTF2("%x\n", srcval);
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- test_word(destval, srcval);
- }
- break;
- case 1:
- DECODE_PRINTF("ILLEGAL OP MOD=10 RH=01 OP=F6\n");
- HALT_SYS();
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- DECODE_PRINTF("NOT\tDWORD PTR ");
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- destval = not_long(destval);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
-
- DECODE_PRINTF("NOT\tWORD PTR ");
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- destval = not_word(destval);
- store_data_word(destoffset, destval);
- }
- break;
- case 3:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- DECODE_PRINTF("NEG\tDWORD PTR ");
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- destval = neg_long(destval);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
-
- DECODE_PRINTF("NEG\tWORD PTR ");
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- destval = neg_word(destval);
- store_data_word(destoffset, destval);
- }
- break;
- case 4:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- DECODE_PRINTF("MUL\tDWORD PTR ");
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- mul_long(destval);
- } else {
- u16 destval;
-
- DECODE_PRINTF("MUL\tWORD PTR ");
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- mul_word(destval);
- }
- break;
- case 5:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- DECODE_PRINTF("IMUL\tDWORD PTR ");
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- imul_long(destval);
- } else {
- u16 destval;
-
- DECODE_PRINTF("IMUL\tWORD PTR ");
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- imul_word(destval);
- }
- break;
- case 6:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- DECODE_PRINTF("DIV\tDWORD PTR ");
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- div_long(destval);
- } else {
- u16 destval;
-
- DECODE_PRINTF("DIV\tWORD PTR ");
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- div_word(destval);
- }
- break;
- case 7:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- DECODE_PRINTF("IDIV\tDWORD PTR ");
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- idiv_long(destval);
- } else {
- u16 destval;
-
- DECODE_PRINTF("IDIV\tWORD PTR ");
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- idiv_word(destval);
- }
- break;
- }
- break; /* end mod==10 */
- case 3: /* mod=11 */
- switch (rh) {
- case 0: /* test word imm */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
-
- DECODE_PRINTF("TEST\t");
- destreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF(",");
- srcval = fetch_long_imm();
- DECODE_PRINTF2("%x\n", srcval);
- TRACE_AND_STEP();
- test_long(*destreg, srcval);
- } else {
- u16 *destreg;
- u16 srcval;
-
- DECODE_PRINTF("TEST\t");
- destreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF(",");
- srcval = fetch_word_imm();
- DECODE_PRINTF2("%x\n", srcval);
- TRACE_AND_STEP();
- test_word(*destreg, srcval);
- }
- break;
- case 1:
- DECODE_PRINTF("ILLEGAL OP MOD=00 RH=01 OP=F6\n");
- HALT_SYS();
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
-
- DECODE_PRINTF("NOT\t");
- destreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = not_long(*destreg);
- } else {
- u16 *destreg;
-
- DECODE_PRINTF("NOT\t");
- destreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = not_word(*destreg);
- }
- break;
- case 3:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
-
- DECODE_PRINTF("NEG\t");
- destreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = neg_long(*destreg);
- } else {
- u16 *destreg;
-
- DECODE_PRINTF("NEG\t");
- destreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = neg_word(*destreg);
- }
- break;
- case 4:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
-
- DECODE_PRINTF("MUL\t");
- destreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- mul_long(*destreg); /*!!! */
- } else {
- u16 *destreg;
-
- DECODE_PRINTF("MUL\t");
- destreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- mul_word(*destreg); /*!!! */
- }
- break;
- case 5:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
-
- DECODE_PRINTF("IMUL\t");
- destreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- imul_long(*destreg);
- } else {
- u16 *destreg;
-
- DECODE_PRINTF("IMUL\t");
- destreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- imul_word(*destreg);
- }
- break;
- case 6:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
-
- DECODE_PRINTF("DIV\t");
- destreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- div_long(*destreg);
- } else {
- u16 *destreg;
-
- DECODE_PRINTF("DIV\t");
- destreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- div_word(*destreg);
- }
- break;
- case 7:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
-
- DECODE_PRINTF("IDIV\t");
- destreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- idiv_long(*destreg);
- } else {
- u16 *destreg;
-
- DECODE_PRINTF("IDIV\t");
- destreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- idiv_word(*destreg);
- }
- break;
- }
- break; /* end mod==11 */
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xf8
-****************************************************************************/
-void x86emuOp_clc(u8 X86EMU_UNUSED(op1))
-{
- /* clear the carry flag. */
- START_OF_INSTR();
- DECODE_PRINTF("CLC\n");
- TRACE_AND_STEP();
- CLEAR_FLAG(F_CF);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xf9
-****************************************************************************/
-void x86emuOp_stc(u8 X86EMU_UNUSED(op1))
-{
- /* set the carry flag. */
- START_OF_INSTR();
- DECODE_PRINTF("STC\n");
- TRACE_AND_STEP();
- SET_FLAG(F_CF);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xfa
-****************************************************************************/
-void x86emuOp_cli(u8 X86EMU_UNUSED(op1))
-{
- /* clear interrupts. */
- START_OF_INSTR();
- DECODE_PRINTF("CLI\n");
- TRACE_AND_STEP();
- CLEAR_FLAG(F_IF);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xfb
-****************************************************************************/
-void x86emuOp_sti(u8 X86EMU_UNUSED(op1))
-{
- /* enable interrupts. */
- START_OF_INSTR();
- DECODE_PRINTF("STI\n");
- TRACE_AND_STEP();
- SET_FLAG(F_IF);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xfc
-****************************************************************************/
-void x86emuOp_cld(u8 X86EMU_UNUSED(op1))
-{
- /* clear interrupts. */
- START_OF_INSTR();
- DECODE_PRINTF("CLD\n");
- TRACE_AND_STEP();
- CLEAR_FLAG(F_DF);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xfd
-****************************************************************************/
-void x86emuOp_std(u8 X86EMU_UNUSED(op1))
-{
- /* clear interrupts. */
- START_OF_INSTR();
- DECODE_PRINTF("STD\n");
- TRACE_AND_STEP();
- SET_FLAG(F_DF);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xfe
-****************************************************************************/
-void x86emuOp_opcFE_byte_RM(u8 X86EMU_UNUSED(op1))
-{
- int mod, rh, rl;
- u8 destval;
- uint destoffset;
- u8 *destreg;
-
- /* Yet another special case instruction. */
- START_OF_INSTR();
- FETCH_DECODE_MODRM(mod, rh, rl);
-#ifdef DEBUG
- if (DEBUG_DECODE()) {
- /* XXX DECODE_PRINTF may be changed to something more
- general, so that it is important to leave the strings
- in the same format, even though the result is that the
- above test is done twice. */
-
- switch (rh) {
- case 0:
- DECODE_PRINTF("INC\t");
- break;
- case 1:
- DECODE_PRINTF("DEC\t");
- break;
- case 2:
- case 3:
- case 4:
- case 5:
- case 6:
- case 7:
- DECODE_PRINTF2("ILLEGAL OP MAJOR OP 0xFE MINOR OP %x \n", mod);
- HALT_SYS();
- break;
- }
- }
-#endif
- switch (mod) {
- case 0:
- DECODE_PRINTF("BYTE PTR ");
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF("\n");
- switch (rh) {
- case 0: /* inc word ptr ... */
- destval = fetch_data_byte(destoffset);
- TRACE_AND_STEP();
- destval = inc_byte(destval);
- store_data_byte(destoffset, destval);
- break;
- case 1: /* dec word ptr ... */
- destval = fetch_data_byte(destoffset);
- TRACE_AND_STEP();
- destval = dec_byte(destval);
- store_data_byte(destoffset, destval);
- break;
- }
- break;
- case 1:
- DECODE_PRINTF("BYTE PTR ");
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF("\n");
- switch (rh) {
- case 0:
- destval = fetch_data_byte(destoffset);
- TRACE_AND_STEP();
- destval = inc_byte(destval);
- store_data_byte(destoffset, destval);
- break;
- case 1:
- destval = fetch_data_byte(destoffset);
- TRACE_AND_STEP();
- destval = dec_byte(destval);
- store_data_byte(destoffset, destval);
- break;
- }
- break;
- case 2:
- DECODE_PRINTF("BYTE PTR ");
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF("\n");
- switch (rh) {
- case 0:
- destval = fetch_data_byte(destoffset);
- TRACE_AND_STEP();
- destval = inc_byte(destval);
- store_data_byte(destoffset, destval);
- break;
- case 1:
- destval = fetch_data_byte(destoffset);
- TRACE_AND_STEP();
- destval = dec_byte(destval);
- store_data_byte(destoffset, destval);
- break;
- }
- break;
- case 3:
- destreg = DECODE_RM_BYTE_REGISTER(rl);
- DECODE_PRINTF("\n");
- switch (rh) {
- case 0:
- TRACE_AND_STEP();
- *destreg = inc_byte(*destreg);
- break;
- case 1:
- TRACE_AND_STEP();
- *destreg = dec_byte(*destreg);
- break;
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xff
-****************************************************************************/
-void x86emuOp_opcFF_word_RM(u8 X86EMU_UNUSED(op1))
-{
- int mod, rh, rl;
- uint destoffset = 0;
- u16 *destreg;
- u16 destval,destval2;
-
- /* Yet another special case instruction. */
- START_OF_INSTR();
- FETCH_DECODE_MODRM(mod, rh, rl);
-#ifdef DEBUG
- if (DEBUG_DECODE()) {
- /* XXX DECODE_PRINTF may be changed to something more
- general, so that it is important to leave the strings
- in the same format, even though the result is that the
- above test is done twice. */
-
- switch (rh) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("INC\tDWORD PTR ");
- } else {
- DECODE_PRINTF("INC\tWORD PTR ");
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("DEC\tDWORD PTR ");
- } else {
- DECODE_PRINTF("DEC\tWORD PTR ");
- }
- break;
- case 2:
- DECODE_PRINTF("CALL\t ");
- break;
- case 3:
- DECODE_PRINTF("CALL\tFAR ");
- break;
- case 4:
- DECODE_PRINTF("JMP\t");
- break;
- case 5:
- DECODE_PRINTF("JMP\tFAR ");
- break;
- case 6:
- DECODE_PRINTF("PUSH\t");
- break;
- case 7:
- DECODE_PRINTF("ILLEGAL DECODING OF OPCODE FF\t");
- HALT_SYS();
- break;
- }
- }
-#endif
- switch (mod) {
- case 0:
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF("\n");
- switch (rh) {
- case 0: /* inc word ptr ... */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- destval = inc_long(destval);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
-
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- destval = inc_word(destval);
- store_data_word(destoffset, destval);
- }
- break;
- case 1: /* dec word ptr ... */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- destval = dec_long(destval);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
-
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- destval = dec_word(destval);
- store_data_word(destoffset, destval);
- }
- break;
- case 2: /* call word ptr ... */
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- push_word(M.x86.R_IP);
- M.x86.R_IP = destval;
- break;
- case 3: /* call far ptr ... */
- destval = fetch_data_word(destoffset);
- destval2 = fetch_data_word(destoffset + 2);
- TRACE_AND_STEP();
- push_word(M.x86.R_CS);
- M.x86.R_CS = destval2;
- push_word(M.x86.R_IP);
- M.x86.R_IP = destval;
- break;
- case 4: /* jmp word ptr ... */
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- M.x86.R_IP = destval;
- break;
- case 5: /* jmp far ptr ... */
- destval = fetch_data_word(destoffset);
- destval2 = fetch_data_word(destoffset + 2);
- TRACE_AND_STEP();
- M.x86.R_IP = destval;
- M.x86.R_CS = destval2;
- break;
- case 6: /* push word ptr ... */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- push_long(destval);
- } else {
- u16 destval;
-
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- push_word(destval);
- }
- break;
- }
- break;
- case 1:
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF("\n");
- switch (rh) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- destval = inc_long(destval);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
-
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- destval = inc_word(destval);
- store_data_word(destoffset, destval);
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- destval = dec_long(destval);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
-
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- destval = dec_word(destval);
- store_data_word(destoffset, destval);
- }
- break;
- case 2: /* call word ptr ... */
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- push_word(M.x86.R_IP);
- M.x86.R_IP = destval;
- break;
- case 3: /* call far ptr ... */
- destval = fetch_data_word(destoffset);
- destval2 = fetch_data_word(destoffset + 2);
- TRACE_AND_STEP();
- push_word(M.x86.R_CS);
- M.x86.R_CS = destval2;
- push_word(M.x86.R_IP);
- M.x86.R_IP = destval;
- break;
- case 4: /* jmp word ptr ... */
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- M.x86.R_IP = destval;
- break;
- case 5: /* jmp far ptr ... */
- destval = fetch_data_word(destoffset);
- destval2 = fetch_data_word(destoffset + 2);
- TRACE_AND_STEP();
- M.x86.R_IP = destval;
- M.x86.R_CS = destval2;
- break;
- case 6: /* push word ptr ... */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- push_long(destval);
- } else {
- u16 destval;
-
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- push_word(destval);
- }
- break;
- }
- break;
- case 2:
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF("\n");
- switch (rh) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- destval = inc_long(destval);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
-
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- destval = inc_word(destval);
- store_data_word(destoffset, destval);
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- destval = dec_long(destval);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
-
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- destval = dec_word(destval);
- store_data_word(destoffset, destval);
- }
- break;
- case 2: /* call word ptr ... */
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- push_word(M.x86.R_IP);
- M.x86.R_IP = destval;
- break;
- case 3: /* call far ptr ... */
- destval = fetch_data_word(destoffset);
- destval2 = fetch_data_word(destoffset + 2);
- TRACE_AND_STEP();
- push_word(M.x86.R_CS);
- M.x86.R_CS = destval2;
- push_word(M.x86.R_IP);
- M.x86.R_IP = destval;
- break;
- case 4: /* jmp word ptr ... */
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- M.x86.R_IP = destval;
- break;
- case 5: /* jmp far ptr ... */
- destval = fetch_data_word(destoffset);
- destval2 = fetch_data_word(destoffset + 2);
- TRACE_AND_STEP();
- M.x86.R_IP = destval;
- M.x86.R_CS = destval2;
- break;
- case 6: /* push word ptr ... */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- push_long(destval);
- } else {
- u16 destval;
-
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- push_word(destval);
- }
- break;
- }
- break;
- case 3:
- switch (rh) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
-
- destreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = inc_long(*destreg);
- } else {
- u16 *destreg;
-
- destreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = inc_word(*destreg);
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
-
- destreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = dec_long(*destreg);
- } else {
- u16 *destreg;
-
- destreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = dec_word(*destreg);
- }
- break;
- case 2: /* call word ptr ... */
- destreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- push_word(M.x86.R_IP);
- M.x86.R_IP = *destreg;
- break;
- case 3: /* jmp far ptr ... */
- DECODE_PRINTF("OPERATION UNDEFINED 0XFF \n");
- TRACE_AND_STEP();
- HALT_SYS();
- break;
-
- case 4: /* jmp ... */
- destreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- M.x86.R_IP = (u16) (*destreg);
- break;
- case 5: /* jmp far ptr ... */
- DECODE_PRINTF("OPERATION UNDEFINED 0XFF \n");
- TRACE_AND_STEP();
- HALT_SYS();
- break;
- case 6:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
-
- destreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- push_long(*destreg);
- } else {
- u16 *destreg;
-
- destreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- push_word(*destreg);
- }
- break;
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/***************************************************************************
- * Single byte operation code table:
- **************************************************************************/
-void (*x86emu_optab[256])(u8) =
-{
-/* 0x00 */ x86emuOp_add_byte_RM_R,
-/* 0x01 */ x86emuOp_add_word_RM_R,
-/* 0x02 */ x86emuOp_add_byte_R_RM,
-/* 0x03 */ x86emuOp_add_word_R_RM,
-/* 0x04 */ x86emuOp_add_byte_AL_IMM,
-/* 0x05 */ x86emuOp_add_word_AX_IMM,
-/* 0x06 */ x86emuOp_push_ES,
-/* 0x07 */ x86emuOp_pop_ES,
-
-/* 0x08 */ x86emuOp_or_byte_RM_R,
-/* 0x09 */ x86emuOp_or_word_RM_R,
-/* 0x0a */ x86emuOp_or_byte_R_RM,
-/* 0x0b */ x86emuOp_or_word_R_RM,
-/* 0x0c */ x86emuOp_or_byte_AL_IMM,
-/* 0x0d */ x86emuOp_or_word_AX_IMM,
-/* 0x0e */ x86emuOp_push_CS,
-/* 0x0f */ x86emuOp_two_byte,
-
-/* 0x10 */ x86emuOp_adc_byte_RM_R,
-/* 0x11 */ x86emuOp_adc_word_RM_R,
-/* 0x12 */ x86emuOp_adc_byte_R_RM,
-/* 0x13 */ x86emuOp_adc_word_R_RM,
-/* 0x14 */ x86emuOp_adc_byte_AL_IMM,
-/* 0x15 */ x86emuOp_adc_word_AX_IMM,
-/* 0x16 */ x86emuOp_push_SS,
-/* 0x17 */ x86emuOp_pop_SS,
-
-/* 0x18 */ x86emuOp_sbb_byte_RM_R,
-/* 0x19 */ x86emuOp_sbb_word_RM_R,
-/* 0x1a */ x86emuOp_sbb_byte_R_RM,
-/* 0x1b */ x86emuOp_sbb_word_R_RM,
-/* 0x1c */ x86emuOp_sbb_byte_AL_IMM,
-/* 0x1d */ x86emuOp_sbb_word_AX_IMM,
-/* 0x1e */ x86emuOp_push_DS,
-/* 0x1f */ x86emuOp_pop_DS,
-
-/* 0x20 */ x86emuOp_and_byte_RM_R,
-/* 0x21 */ x86emuOp_and_word_RM_R,
-/* 0x22 */ x86emuOp_and_byte_R_RM,
-/* 0x23 */ x86emuOp_and_word_R_RM,
-/* 0x24 */ x86emuOp_and_byte_AL_IMM,
-/* 0x25 */ x86emuOp_and_word_AX_IMM,
-/* 0x26 */ x86emuOp_segovr_ES,
-/* 0x27 */ x86emuOp_daa,
-
-/* 0x28 */ x86emuOp_sub_byte_RM_R,
-/* 0x29 */ x86emuOp_sub_word_RM_R,
-/* 0x2a */ x86emuOp_sub_byte_R_RM,
-/* 0x2b */ x86emuOp_sub_word_R_RM,
-/* 0x2c */ x86emuOp_sub_byte_AL_IMM,
-/* 0x2d */ x86emuOp_sub_word_AX_IMM,
-/* 0x2e */ x86emuOp_segovr_CS,
-/* 0x2f */ x86emuOp_das,
-
-/* 0x30 */ x86emuOp_xor_byte_RM_R,
-/* 0x31 */ x86emuOp_xor_word_RM_R,
-/* 0x32 */ x86emuOp_xor_byte_R_RM,
-/* 0x33 */ x86emuOp_xor_word_R_RM,
-/* 0x34 */ x86emuOp_xor_byte_AL_IMM,
-/* 0x35 */ x86emuOp_xor_word_AX_IMM,
-/* 0x36 */ x86emuOp_segovr_SS,
-/* 0x37 */ x86emuOp_aaa,
-
-/* 0x38 */ x86emuOp_cmp_byte_RM_R,
-/* 0x39 */ x86emuOp_cmp_word_RM_R,
-/* 0x3a */ x86emuOp_cmp_byte_R_RM,
-/* 0x3b */ x86emuOp_cmp_word_R_RM,
-/* 0x3c */ x86emuOp_cmp_byte_AL_IMM,
-/* 0x3d */ x86emuOp_cmp_word_AX_IMM,
-/* 0x3e */ x86emuOp_segovr_DS,
-/* 0x3f */ x86emuOp_aas,
-
-/* 0x40 */ x86emuOp_inc_AX,
-/* 0x41 */ x86emuOp_inc_CX,
-/* 0x42 */ x86emuOp_inc_DX,
-/* 0x43 */ x86emuOp_inc_BX,
-/* 0x44 */ x86emuOp_inc_SP,
-/* 0x45 */ x86emuOp_inc_BP,
-/* 0x46 */ x86emuOp_inc_SI,
-/* 0x47 */ x86emuOp_inc_DI,
-
-/* 0x48 */ x86emuOp_dec_AX,
-/* 0x49 */ x86emuOp_dec_CX,
-/* 0x4a */ x86emuOp_dec_DX,
-/* 0x4b */ x86emuOp_dec_BX,
-/* 0x4c */ x86emuOp_dec_SP,
-/* 0x4d */ x86emuOp_dec_BP,
-/* 0x4e */ x86emuOp_dec_SI,
-/* 0x4f */ x86emuOp_dec_DI,
-
-/* 0x50 */ x86emuOp_push_AX,
-/* 0x51 */ x86emuOp_push_CX,
-/* 0x52 */ x86emuOp_push_DX,
-/* 0x53 */ x86emuOp_push_BX,
-/* 0x54 */ x86emuOp_push_SP,
-/* 0x55 */ x86emuOp_push_BP,
-/* 0x56 */ x86emuOp_push_SI,
-/* 0x57 */ x86emuOp_push_DI,
-
-/* 0x58 */ x86emuOp_pop_AX,
-/* 0x59 */ x86emuOp_pop_CX,
-/* 0x5a */ x86emuOp_pop_DX,
-/* 0x5b */ x86emuOp_pop_BX,
-/* 0x5c */ x86emuOp_pop_SP,
-/* 0x5d */ x86emuOp_pop_BP,
-/* 0x5e */ x86emuOp_pop_SI,
-/* 0x5f */ x86emuOp_pop_DI,
-
-/* 0x60 */ x86emuOp_push_all,
-/* 0x61 */ x86emuOp_pop_all,
-/* 0x62 */ x86emuOp_illegal_op, /* bound */
-/* 0x63 */ x86emuOp_illegal_op, /* arpl */
-/* 0x64 */ x86emuOp_segovr_FS,
-/* 0x65 */ x86emuOp_segovr_GS,
-/* 0x66 */ x86emuOp_prefix_data,
-/* 0x67 */ x86emuOp_prefix_addr,
-
-/* 0x68 */ x86emuOp_push_word_IMM,
-/* 0x69 */ x86emuOp_imul_word_IMM,
-/* 0x6a */ x86emuOp_push_byte_IMM,
-/* 0x6b */ x86emuOp_imul_byte_IMM,
-/* 0x6c */ x86emuOp_ins_byte,
-/* 0x6d */ x86emuOp_ins_word,
-/* 0x6e */ x86emuOp_outs_byte,
-/* 0x6f */ x86emuOp_outs_word,
-
-/* 0x70 */ x86emuOp_jump_near_O,
-/* 0x71 */ x86emuOp_jump_near_NO,
-/* 0x72 */ x86emuOp_jump_near_B,
-/* 0x73 */ x86emuOp_jump_near_NB,
-/* 0x74 */ x86emuOp_jump_near_Z,
-/* 0x75 */ x86emuOp_jump_near_NZ,
-/* 0x76 */ x86emuOp_jump_near_BE,
-/* 0x77 */ x86emuOp_jump_near_NBE,
-
-/* 0x78 */ x86emuOp_jump_near_S,
-/* 0x79 */ x86emuOp_jump_near_NS,
-/* 0x7a */ x86emuOp_jump_near_P,
-/* 0x7b */ x86emuOp_jump_near_NP,
-/* 0x7c */ x86emuOp_jump_near_L,
-/* 0x7d */ x86emuOp_jump_near_NL,
-/* 0x7e */ x86emuOp_jump_near_LE,
-/* 0x7f */ x86emuOp_jump_near_NLE,
-
-/* 0x80 */ x86emuOp_opc80_byte_RM_IMM,
-/* 0x81 */ x86emuOp_opc81_word_RM_IMM,
-/* 0x82 */ x86emuOp_opc82_byte_RM_IMM,
-/* 0x83 */ x86emuOp_opc83_word_RM_IMM,
-/* 0x84 */ x86emuOp_test_byte_RM_R,
-/* 0x85 */ x86emuOp_test_word_RM_R,
-/* 0x86 */ x86emuOp_xchg_byte_RM_R,
-/* 0x87 */ x86emuOp_xchg_word_RM_R,
-
-/* 0x88 */ x86emuOp_mov_byte_RM_R,
-/* 0x89 */ x86emuOp_mov_word_RM_R,
-/* 0x8a */ x86emuOp_mov_byte_R_RM,
-/* 0x8b */ x86emuOp_mov_word_R_RM,
-/* 0x8c */ x86emuOp_mov_word_RM_SR,
-/* 0x8d */ x86emuOp_lea_word_R_M,
-/* 0x8e */ x86emuOp_mov_word_SR_RM,
-/* 0x8f */ x86emuOp_pop_RM,
-
-/* 0x90 */ x86emuOp_nop,
-/* 0x91 */ x86emuOp_xchg_word_AX_CX,
-/* 0x92 */ x86emuOp_xchg_word_AX_DX,
-/* 0x93 */ x86emuOp_xchg_word_AX_BX,
-/* 0x94 */ x86emuOp_xchg_word_AX_SP,
-/* 0x95 */ x86emuOp_xchg_word_AX_BP,
-/* 0x96 */ x86emuOp_xchg_word_AX_SI,
-/* 0x97 */ x86emuOp_xchg_word_AX_DI,
-
-/* 0x98 */ x86emuOp_cbw,
-/* 0x99 */ x86emuOp_cwd,
-/* 0x9a */ x86emuOp_call_far_IMM,
-/* 0x9b */ x86emuOp_wait,
-/* 0x9c */ x86emuOp_pushf_word,
-/* 0x9d */ x86emuOp_popf_word,
-/* 0x9e */ x86emuOp_sahf,
-/* 0x9f */ x86emuOp_lahf,
-
-/* 0xa0 */ x86emuOp_mov_AL_M_IMM,
-/* 0xa1 */ x86emuOp_mov_AX_M_IMM,
-/* 0xa2 */ x86emuOp_mov_M_AL_IMM,
-/* 0xa3 */ x86emuOp_mov_M_AX_IMM,
-/* 0xa4 */ x86emuOp_movs_byte,
-/* 0xa5 */ x86emuOp_movs_word,
-/* 0xa6 */ x86emuOp_cmps_byte,
-/* 0xa7 */ x86emuOp_cmps_word,
-/* 0xa8 */ x86emuOp_test_AL_IMM,
-/* 0xa9 */ x86emuOp_test_AX_IMM,
-/* 0xaa */ x86emuOp_stos_byte,
-/* 0xab */ x86emuOp_stos_word,
-/* 0xac */ x86emuOp_lods_byte,
-/* 0xad */ x86emuOp_lods_word,
-/* 0xac */ x86emuOp_scas_byte,
-/* 0xad */ x86emuOp_scas_word,
-
-
-/* 0xb0 */ x86emuOp_mov_byte_AL_IMM,
-/* 0xb1 */ x86emuOp_mov_byte_CL_IMM,
-/* 0xb2 */ x86emuOp_mov_byte_DL_IMM,
-/* 0xb3 */ x86emuOp_mov_byte_BL_IMM,
-/* 0xb4 */ x86emuOp_mov_byte_AH_IMM,
-/* 0xb5 */ x86emuOp_mov_byte_CH_IMM,
-/* 0xb6 */ x86emuOp_mov_byte_DH_IMM,
-/* 0xb7 */ x86emuOp_mov_byte_BH_IMM,
-
-/* 0xb8 */ x86emuOp_mov_word_AX_IMM,
-/* 0xb9 */ x86emuOp_mov_word_CX_IMM,
-/* 0xba */ x86emuOp_mov_word_DX_IMM,
-/* 0xbb */ x86emuOp_mov_word_BX_IMM,
-/* 0xbc */ x86emuOp_mov_word_SP_IMM,
-/* 0xbd */ x86emuOp_mov_word_BP_IMM,
-/* 0xbe */ x86emuOp_mov_word_SI_IMM,
-/* 0xbf */ x86emuOp_mov_word_DI_IMM,
-
-/* 0xc0 */ x86emuOp_opcC0_byte_RM_MEM,
-/* 0xc1 */ x86emuOp_opcC1_word_RM_MEM,
-/* 0xc2 */ x86emuOp_ret_near_IMM,
-/* 0xc3 */ x86emuOp_ret_near,
-/* 0xc4 */ x86emuOp_les_R_IMM,
-/* 0xc5 */ x86emuOp_lds_R_IMM,
-/* 0xc6 */ x86emuOp_mov_byte_RM_IMM,
-/* 0xc7 */ x86emuOp_mov_word_RM_IMM,
-/* 0xc8 */ x86emuOp_enter,
-/* 0xc9 */ x86emuOp_leave,
-/* 0xca */ x86emuOp_ret_far_IMM,
-/* 0xcb */ x86emuOp_ret_far,
-/* 0xcc */ x86emuOp_int3,
-/* 0xcd */ x86emuOp_int_IMM,
-/* 0xce */ x86emuOp_into,
-/* 0xcf */ x86emuOp_iret,
-
-/* 0xd0 */ x86emuOp_opcD0_byte_RM_1,
-/* 0xd1 */ x86emuOp_opcD1_word_RM_1,
-/* 0xd2 */ x86emuOp_opcD2_byte_RM_CL,
-/* 0xd3 */ x86emuOp_opcD3_word_RM_CL,
-/* 0xd4 */ x86emuOp_aam,
-/* 0xd5 */ x86emuOp_aad,
-/* 0xd6 */ x86emuOp_illegal_op, /* Undocumented SETALC instruction */
-/* 0xd7 */ x86emuOp_xlat,
-/* 0xd8 */ x86emuOp_esc_coprocess_d8,
-/* 0xd9 */ x86emuOp_esc_coprocess_d9,
-/* 0xda */ x86emuOp_esc_coprocess_da,
-/* 0xdb */ x86emuOp_esc_coprocess_db,
-/* 0xdc */ x86emuOp_esc_coprocess_dc,
-/* 0xdd */ x86emuOp_esc_coprocess_dd,
-/* 0xde */ x86emuOp_esc_coprocess_de,
-/* 0xdf */ x86emuOp_esc_coprocess_df,
-
-/* 0xe0 */ x86emuOp_loopne,
-/* 0xe1 */ x86emuOp_loope,
-/* 0xe2 */ x86emuOp_loop,
-/* 0xe3 */ x86emuOp_jcxz,
-/* 0xe4 */ x86emuOp_in_byte_AL_IMM,
-/* 0xe5 */ x86emuOp_in_word_AX_IMM,
-/* 0xe6 */ x86emuOp_out_byte_IMM_AL,
-/* 0xe7 */ x86emuOp_out_word_IMM_AX,
-
-/* 0xe8 */ x86emuOp_call_near_IMM,
-/* 0xe9 */ x86emuOp_jump_near_IMM,
-/* 0xea */ x86emuOp_jump_far_IMM,
-/* 0xeb */ x86emuOp_jump_byte_IMM,
-/* 0xec */ x86emuOp_in_byte_AL_DX,
-/* 0xed */ x86emuOp_in_word_AX_DX,
-/* 0xee */ x86emuOp_out_byte_DX_AL,
-/* 0xef */ x86emuOp_out_word_DX_AX,
-
-/* 0xf0 */ x86emuOp_lock,
-/* 0xf1 */ x86emuOp_illegal_op,
-/* 0xf2 */ x86emuOp_repne,
-/* 0xf3 */ x86emuOp_repe,
-/* 0xf4 */ x86emuOp_halt,
-/* 0xf5 */ x86emuOp_cmc,
-/* 0xf6 */ x86emuOp_opcF6_byte_RM,
-/* 0xf7 */ x86emuOp_opcF7_word_RM,
-
-/* 0xf8 */ x86emuOp_clc,
-/* 0xf9 */ x86emuOp_stc,
-/* 0xfa */ x86emuOp_cli,
-/* 0xfb */ x86emuOp_sti,
-/* 0xfc */ x86emuOp_cld,
-/* 0xfd */ x86emuOp_std,
-/* 0xfe */ x86emuOp_opcFE_byte_RM,
-/* 0xff */ x86emuOp_opcFF_word_RM,
-};
-
-void tables_relocate(unsigned int offset)
-{
- int i;
- for (i=0; i<8; i++)
- {
- opc80_byte_operation[i] -= offset;
- opc81_word_operation[i] -= offset;
- opc81_long_operation[i] -= offset;
-
- opc82_byte_operation[i] -= offset;
- opc83_word_operation[i] -= offset;
- opc83_long_operation[i] -= offset;
-
- opcD0_byte_operation[i] -= offset;
- opcD1_word_operation[i] -= offset;
- opcD1_long_operation[i] -= offset;
- }
-}
diff --git a/board/MAI/bios_emulator/scitech/src/x86emu/ops2.c b/board/MAI/bios_emulator/scitech/src/x86emu/ops2.c
deleted file mode 100644
index d381307fae..0000000000
--- a/board/MAI/bios_emulator/scitech/src/x86emu/ops2.c
+++ /dev/null
@@ -1,2800 +0,0 @@
-/****************************************************************************
-*
-* Realmode X86 Emulator Library
-*
-* Copyright (C) 1996-1999 SciTech Software, Inc.
-* Copyright (C) David Mosberger-Tang
-* Copyright (C) 1999 Egbert Eich
-*
-* ========================================================================
-*
-* Permission to use, copy, modify, distribute, and sell this software and
-* its documentation for any purpose is hereby granted without fee,
-* provided that the above copyright notice appear in all copies and that
-* both that copyright notice and this permission notice appear in
-* supporting documentation, and that the name of the authors not be used
-* in advertising or publicity pertaining to distribution of the software
-* without specific, written prior permission. The authors makes no
-* representations about the suitability of this software for any purpose.
-* It is provided "as is" without express or implied warranty.
-*
-* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
-* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
-* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
-* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
-* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
-* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
-* PERFORMANCE OF THIS SOFTWARE.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-* Developer: Kendall Bennett
-*
-* Description: This file includes subroutines to implement the decoding
-* and emulation of all the x86 extended two-byte processor
-* instructions.
-*
-****************************************************************************/
-
-#include "x86emu/x86emui.h"
-
-/*----------------------------- Implementation ----------------------------*/
-
-/****************************************************************************
-PARAMETERS:
-op1 - Instruction op code
-
-REMARKS:
-Handles illegal opcodes.
-****************************************************************************/
-void x86emuOp2_illegal_op(
- u8 op2)
-{
- START_OF_INSTR();
- DECODE_PRINTF("ILLEGAL EXTENDED X86 OPCODE\n");
- TRACE_REGS();
- printk("%04x:%04x: %02X ILLEGAL EXTENDED X86 OPCODE!\n",
- M.x86.R_CS, M.x86.R_IP-2,op2);
- HALT_SYS();
- END_OF_INSTR();
-}
-
-#define xorl(a,b) ((a) && !(b)) || (!(a) && (b))
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x0f,0x80-0x8F
-****************************************************************************/
-void x86emuOp2_long_jump(u8 op2)
-{
- s32 target;
- char *name = 0;
- int cond = 0;
-
- /* conditional jump to word offset. */
- START_OF_INSTR();
- switch (op2) {
- case 0x80:
- name = "JO\t";
- cond = ACCESS_FLAG(F_OF);
- break;
- case 0x81:
- name = "JNO\t";
- cond = !ACCESS_FLAG(F_OF);
- break;
- case 0x82:
- name = "JB\t";
- cond = ACCESS_FLAG(F_CF);
- break;
- case 0x83:
- name = "JNB\t";
- cond = !ACCESS_FLAG(F_CF);
- break;
- case 0x84:
- name = "JZ\t";
- cond = ACCESS_FLAG(F_ZF);
- break;
- case 0x85:
- name = "JNZ\t";
- cond = !ACCESS_FLAG(F_ZF);
- break;
- case 0x86:
- name = "JBE\t";
- cond = ACCESS_FLAG(F_CF) || ACCESS_FLAG(F_ZF);
- break;
- case 0x87:
- name = "JNBE\t";
- cond = !(ACCESS_FLAG(F_CF) || ACCESS_FLAG(F_ZF));
- break;
- case 0x88:
- name = "JS\t";
- cond = ACCESS_FLAG(F_SF);
- break;
- case 0x89:
- name = "JNS\t";
- cond = !ACCESS_FLAG(F_SF);
- break;
- case 0x8a:
- name = "JP\t";
- cond = ACCESS_FLAG(F_PF);
- break;
- case 0x8b:
- name = "JNP\t";
- cond = !ACCESS_FLAG(F_PF);
- break;
- case 0x8c:
- name = "JL\t";
- cond = xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF));
- break;
- case 0x8d:
- name = "JNL\t";
- cond = xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF));
- break;
- case 0x8e:
- name = "JLE\t";
- cond = (xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)) ||
- ACCESS_FLAG(F_ZF));
- break;
- case 0x8f:
- name = "JNLE\t";
- cond = !(xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)) ||
- ACCESS_FLAG(F_ZF));
- break;
- }
- DECODE_PRINTF(name);
- target = (s16) fetch_word_imm();
- target += (s16) M.x86.R_IP;
- DECODE_PRINTF2("%04x\n", target);
- TRACE_AND_STEP();
- if (cond)
- M.x86.R_IP = (u16)target;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x0f,0x90-0x9F
-****************************************************************************/
-void x86emuOp2_set_byte(u8 op2)
-{
- int mod, rl, rh;
- uint destoffset;
- u8 *destreg;
- char *name = 0;
- int cond = 0;
-
- START_OF_INSTR();
- switch (op2) {
- case 0x90:
- name = "SETO\t";
- cond = ACCESS_FLAG(F_OF);
- break;
- case 0x91:
- name = "SETNO\t";
- cond = !ACCESS_FLAG(F_OF);
- break;
- case 0x92:
- name = "SETB\t";
- cond = ACCESS_FLAG(F_CF);
- break;
- case 0x93:
- name = "SETNB\t";
- cond = !ACCESS_FLAG(F_CF);
- break;
- case 0x94:
- name = "SETZ\t";
- cond = ACCESS_FLAG(F_ZF);
- break;
- case 0x95:
- name = "SETNZ\t";
- cond = !ACCESS_FLAG(F_ZF);
- break;
- case 0x96:
- name = "SETBE\t";
- cond = ACCESS_FLAG(F_CF) || ACCESS_FLAG(F_ZF);
- break;
- case 0x97:
- name = "SETNBE\t";
- cond = !(ACCESS_FLAG(F_CF) || ACCESS_FLAG(F_ZF));
- break;
- case 0x98:
- name = "SETS\t";
- cond = ACCESS_FLAG(F_SF);
- break;
- case 0x99:
- name = "SETNS\t";
- cond = !ACCESS_FLAG(F_SF);
- break;
- case 0x9a:
- name = "SETP\t";
- cond = ACCESS_FLAG(F_PF);
- break;
- case 0x9b:
- name = "SETNP\t";
- cond = !ACCESS_FLAG(F_PF);
- break;
- case 0x9c:
- name = "SETL\t";
- cond = xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF));
- break;
- case 0x9d:
- name = "SETNL\t";
- cond = xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF));
- break;
- case 0x9e:
- name = "SETLE\t";
- cond = (xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)) ||
- ACCESS_FLAG(F_ZF));
- break;
- case 0x9f:
- name = "SETNLE\t";
- cond = !(xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)) ||
- ACCESS_FLAG(F_ZF));
- break;
- }
- DECODE_PRINTF(name);
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- destoffset = decode_rm00_address(rl);
- TRACE_AND_STEP();
- store_data_byte(destoffset, cond ? 0x01 : 0x00);
- break;
- case 1:
- destoffset = decode_rm01_address(rl);
- TRACE_AND_STEP();
- store_data_byte(destoffset, cond ? 0x01 : 0x00);
- break;
- case 2:
- destoffset = decode_rm10_address(rl);
- TRACE_AND_STEP();
- store_data_byte(destoffset, cond ? 0x01 : 0x00);
- break;
- case 3: /* register to register */
- destreg = DECODE_RM_BYTE_REGISTER(rl);
- TRACE_AND_STEP();
- *destreg = cond ? 0x01 : 0x00;
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x0f,0xa0
-****************************************************************************/
-void x86emuOp2_push_FS(u8 X86EMU_UNUSED(op2))
-{
- START_OF_INSTR();
- DECODE_PRINTF("PUSH\tFS\n");
- TRACE_AND_STEP();
- push_word(M.x86.R_FS);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x0f,0xa1
-****************************************************************************/
-void x86emuOp2_pop_FS(u8 X86EMU_UNUSED(op2))
-{
- START_OF_INSTR();
- DECODE_PRINTF("POP\tFS\n");
- TRACE_AND_STEP();
- M.x86.R_FS = pop_word();
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x0f,0xa3
-****************************************************************************/
-void x86emuOp2_bt_R(u8 X86EMU_UNUSED(op2))
-{
- int mod, rl, rh;
- uint srcoffset;
- int bit,disp;
-
- START_OF_INSTR();
- DECODE_PRINTF("BT\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 srcval;
- u32 *shiftreg;
-
- srcoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0x1F;
- disp = (s16)*shiftreg >> 5;
- srcval = fetch_data_long(srcoffset+disp);
- CONDITIONAL_SET_FLAG(srcval & (0x1 << bit),F_CF);
- } else {
- u16 srcval;
- u16 *shiftreg;
-
- srcoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0xF;
- disp = (s16)*shiftreg >> 4;
- srcval = fetch_data_word(srcoffset+disp);
- CONDITIONAL_SET_FLAG(srcval & (0x1 << bit),F_CF);
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 srcval;
- u32 *shiftreg;
-
- srcoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0x1F;
- disp = (s16)*shiftreg >> 5;
- srcval = fetch_data_long(srcoffset+disp);
- CONDITIONAL_SET_FLAG(srcval & (0x1 << bit),F_CF);
- } else {
- u16 srcval;
- u16 *shiftreg;
-
- srcoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0xF;
- disp = (s16)*shiftreg >> 4;
- srcval = fetch_data_word(srcoffset+disp);
- CONDITIONAL_SET_FLAG(srcval & (0x1 << bit),F_CF);
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 srcval;
- u32 *shiftreg;
-
- srcoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0x1F;
- disp = (s16)*shiftreg >> 5;
- srcval = fetch_data_long(srcoffset+disp);
- CONDITIONAL_SET_FLAG(srcval & (0x1 << bit),F_CF);
- } else {
- u16 srcval;
- u16 *shiftreg;
-
- srcoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0xF;
- disp = (s16)*shiftreg >> 4;
- srcval = fetch_data_word(srcoffset+disp);
- CONDITIONAL_SET_FLAG(srcval & (0x1 << bit),F_CF);
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *srcreg,*shiftreg;
-
- srcreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0x1F;
- CONDITIONAL_SET_FLAG(*srcreg & (0x1 << bit),F_CF);
- } else {
- u16 *srcreg,*shiftreg;
-
- srcreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0xF;
- CONDITIONAL_SET_FLAG(*srcreg & (0x1 << bit),F_CF);
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x0f,0xa4
-****************************************************************************/
-void x86emuOp2_shld_IMM(u8 X86EMU_UNUSED(op2))
-{
- int mod, rl, rh;
- uint destoffset;
- u8 shift;
-
- START_OF_INSTR();
- DECODE_PRINTF("SHLD\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *shiftreg;
-
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- shift = fetch_byte_imm();
- DECODE_PRINTF2("%d\n", shift);
- TRACE_AND_STEP();
- destval = fetch_data_long(destoffset);
- destval = shld_long(destval,*shiftreg,shift);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
- u16 *shiftreg;
-
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- shift = fetch_byte_imm();
- DECODE_PRINTF2("%d\n", shift);
- TRACE_AND_STEP();
- destval = fetch_data_word(destoffset);
- destval = shld_word(destval,*shiftreg,shift);
- store_data_word(destoffset, destval);
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *shiftreg;
-
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- shift = fetch_byte_imm();
- DECODE_PRINTF2("%d\n", shift);
- TRACE_AND_STEP();
- destval = fetch_data_long(destoffset);
- destval = shld_long(destval,*shiftreg,shift);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
- u16 *shiftreg;
-
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- shift = fetch_byte_imm();
- DECODE_PRINTF2("%d\n", shift);
- TRACE_AND_STEP();
- destval = fetch_data_word(destoffset);
- destval = shld_word(destval,*shiftreg,shift);
- store_data_word(destoffset, destval);
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *shiftreg;
-
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- shift = fetch_byte_imm();
- DECODE_PRINTF2("%d\n", shift);
- TRACE_AND_STEP();
- destval = fetch_data_long(destoffset);
- destval = shld_long(destval,*shiftreg,shift);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
- u16 *shiftreg;
-
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- shift = fetch_byte_imm();
- DECODE_PRINTF2("%d\n", shift);
- TRACE_AND_STEP();
- destval = fetch_data_word(destoffset);
- destval = shld_word(destval,*shiftreg,shift);
- store_data_word(destoffset, destval);
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg,*shiftreg;
-
- destreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- shift = fetch_byte_imm();
- DECODE_PRINTF2("%d\n", shift);
- TRACE_AND_STEP();
- *destreg = shld_long(*destreg,*shiftreg,shift);
- } else {
- u16 *destreg,*shiftreg;
-
- destreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- shift = fetch_byte_imm();
- DECODE_PRINTF2("%d\n", shift);
- TRACE_AND_STEP();
- *destreg = shld_word(*destreg,*shiftreg,shift);
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x0f,0xa5
-****************************************************************************/
-void x86emuOp2_shld_CL(u8 X86EMU_UNUSED(op2))
-{
- int mod, rl, rh;
- uint destoffset;
-
- START_OF_INSTR();
- DECODE_PRINTF("SHLD\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *shiftreg;
-
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",CL\n");
- TRACE_AND_STEP();
- destval = fetch_data_long(destoffset);
- destval = shld_long(destval,*shiftreg,M.x86.R_CL);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
- u16 *shiftreg;
-
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",CL\n");
- TRACE_AND_STEP();
- destval = fetch_data_word(destoffset);
- destval = shld_word(destval,*shiftreg,M.x86.R_CL);
- store_data_word(destoffset, destval);
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *shiftreg;
-
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",CL\n");
- TRACE_AND_STEP();
- destval = fetch_data_long(destoffset);
- destval = shld_long(destval,*shiftreg,M.x86.R_CL);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
- u16 *shiftreg;
-
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",CL\n");
- TRACE_AND_STEP();
- destval = fetch_data_word(destoffset);
- destval = shld_word(destval,*shiftreg,M.x86.R_CL);
- store_data_word(destoffset, destval);
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *shiftreg;
-
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",CL\n");
- TRACE_AND_STEP();
- destval = fetch_data_long(destoffset);
- destval = shld_long(destval,*shiftreg,M.x86.R_CL);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
- u16 *shiftreg;
-
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",CL\n");
- TRACE_AND_STEP();
- destval = fetch_data_word(destoffset);
- destval = shld_word(destval,*shiftreg,M.x86.R_CL);
- store_data_word(destoffset, destval);
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg,*shiftreg;
-
- destreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",CL\n");
- TRACE_AND_STEP();
- *destreg = shld_long(*destreg,*shiftreg,M.x86.R_CL);
- } else {
- u16 *destreg,*shiftreg;
-
- destreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",CL\n");
- TRACE_AND_STEP();
- *destreg = shld_word(*destreg,*shiftreg,M.x86.R_CL);
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x0f,0xa8
-****************************************************************************/
-void x86emuOp2_push_GS(u8 X86EMU_UNUSED(op2))
-{
- START_OF_INSTR();
- DECODE_PRINTF("PUSH\tGS\n");
- TRACE_AND_STEP();
- push_word(M.x86.R_GS);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x0f,0xa9
-****************************************************************************/
-void x86emuOp2_pop_GS(u8 X86EMU_UNUSED(op2))
-{
- START_OF_INSTR();
- DECODE_PRINTF("POP\tGS\n");
- TRACE_AND_STEP();
- M.x86.R_GS = pop_word();
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x0f,0xaa
-****************************************************************************/
-void x86emuOp2_bts_R(u8 X86EMU_UNUSED(op2))
-{
- int mod, rl, rh;
- uint srcoffset;
- int bit,disp;
-
- START_OF_INSTR();
- DECODE_PRINTF("BTS\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 srcval,mask;
- u32 *shiftreg;
-
- srcoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0x1F;
- disp = (s16)*shiftreg >> 5;
- srcval = fetch_data_long(srcoffset+disp);
- mask = (0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- store_data_long(srcoffset+disp, srcval | mask);
- } else {
- u16 srcval,mask;
- u16 *shiftreg;
-
- srcoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0xF;
- disp = (s16)*shiftreg >> 4;
- srcval = fetch_data_word(srcoffset+disp);
- mask = (u16)(0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- store_data_word(srcoffset+disp, srcval | mask);
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 srcval,mask;
- u32 *shiftreg;
-
- srcoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0x1F;
- disp = (s16)*shiftreg >> 5;
- srcval = fetch_data_long(srcoffset+disp);
- mask = (0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- store_data_long(srcoffset+disp, srcval | mask);
- } else {
- u16 srcval,mask;
- u16 *shiftreg;
-
- srcoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0xF;
- disp = (s16)*shiftreg >> 4;
- srcval = fetch_data_word(srcoffset+disp);
- mask = (u16)(0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- store_data_word(srcoffset+disp, srcval | mask);
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 srcval,mask;
- u32 *shiftreg;
-
- srcoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0x1F;
- disp = (s16)*shiftreg >> 5;
- srcval = fetch_data_long(srcoffset+disp);
- mask = (0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- store_data_long(srcoffset+disp, srcval | mask);
- } else {
- u16 srcval,mask;
- u16 *shiftreg;
-
- srcoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0xF;
- disp = (s16)*shiftreg >> 4;
- srcval = fetch_data_word(srcoffset+disp);
- mask = (u16)(0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- store_data_word(srcoffset+disp, srcval | mask);
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *srcreg,*shiftreg;
- u32 mask;
-
- srcreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0x1F;
- mask = (0x1 << bit);
- CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
- *srcreg |= mask;
- } else {
- u16 *srcreg,*shiftreg;
- u16 mask;
-
- srcreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0xF;
- mask = (u16)(0x1 << bit);
- CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
- *srcreg |= mask;
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x0f,0xac
-****************************************************************************/
-void x86emuOp2_shrd_IMM(u8 X86EMU_UNUSED(op2))
-{
- int mod, rl, rh;
- uint destoffset;
- u8 shift;
-
- START_OF_INSTR();
- DECODE_PRINTF("SHLD\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *shiftreg;
-
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- shift = fetch_byte_imm();
- DECODE_PRINTF2("%d\n", shift);
- TRACE_AND_STEP();
- destval = fetch_data_long(destoffset);
- destval = shrd_long(destval,*shiftreg,shift);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
- u16 *shiftreg;
-
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- shift = fetch_byte_imm();
- DECODE_PRINTF2("%d\n", shift);
- TRACE_AND_STEP();
- destval = fetch_data_word(destoffset);
- destval = shrd_word(destval,*shiftreg,shift);
- store_data_word(destoffset, destval);
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *shiftreg;
-
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- shift = fetch_byte_imm();
- DECODE_PRINTF2("%d\n", shift);
- TRACE_AND_STEP();
- destval = fetch_data_long(destoffset);
- destval = shrd_long(destval,*shiftreg,shift);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
- u16 *shiftreg;
-
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- shift = fetch_byte_imm();
- DECODE_PRINTF2("%d\n", shift);
- TRACE_AND_STEP();
- destval = fetch_data_word(destoffset);
- destval = shrd_word(destval,*shiftreg,shift);
- store_data_word(destoffset, destval);
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *shiftreg;
-
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- shift = fetch_byte_imm();
- DECODE_PRINTF2("%d\n", shift);
- TRACE_AND_STEP();
- destval = fetch_data_long(destoffset);
- destval = shrd_long(destval,*shiftreg,shift);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
- u16 *shiftreg;
-
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- shift = fetch_byte_imm();
- DECODE_PRINTF2("%d\n", shift);
- TRACE_AND_STEP();
- destval = fetch_data_word(destoffset);
- destval = shrd_word(destval,*shiftreg,shift);
- store_data_word(destoffset, destval);
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg,*shiftreg;
-
- destreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- shift = fetch_byte_imm();
- DECODE_PRINTF2("%d\n", shift);
- TRACE_AND_STEP();
- *destreg = shrd_long(*destreg,*shiftreg,shift);
- } else {
- u16 *destreg,*shiftreg;
-
- destreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- shift = fetch_byte_imm();
- DECODE_PRINTF2("%d\n", shift);
- TRACE_AND_STEP();
- *destreg = shrd_word(*destreg,*shiftreg,shift);
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x0f,0xad
-****************************************************************************/
-void x86emuOp2_shrd_CL(u8 X86EMU_UNUSED(op2))
-{
- int mod, rl, rh;
- uint destoffset;
-
- START_OF_INSTR();
- DECODE_PRINTF("SHLD\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *shiftreg;
-
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",CL\n");
- TRACE_AND_STEP();
- destval = fetch_data_long(destoffset);
- destval = shrd_long(destval,*shiftreg,M.x86.R_CL);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
- u16 *shiftreg;
-
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",CL\n");
- TRACE_AND_STEP();
- destval = fetch_data_word(destoffset);
- destval = shrd_word(destval,*shiftreg,M.x86.R_CL);
- store_data_word(destoffset, destval);
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *shiftreg;
-
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",CL\n");
- TRACE_AND_STEP();
- destval = fetch_data_long(destoffset);
- destval = shrd_long(destval,*shiftreg,M.x86.R_CL);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
- u16 *shiftreg;
-
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",CL\n");
- TRACE_AND_STEP();
- destval = fetch_data_word(destoffset);
- destval = shrd_word(destval,*shiftreg,M.x86.R_CL);
- store_data_word(destoffset, destval);
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *shiftreg;
-
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",CL\n");
- TRACE_AND_STEP();
- destval = fetch_data_long(destoffset);
- destval = shrd_long(destval,*shiftreg,M.x86.R_CL);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
- u16 *shiftreg;
-
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",CL\n");
- TRACE_AND_STEP();
- destval = fetch_data_word(destoffset);
- destval = shrd_word(destval,*shiftreg,M.x86.R_CL);
- store_data_word(destoffset, destval);
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg,*shiftreg;
-
- destreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",CL\n");
- TRACE_AND_STEP();
- *destreg = shrd_long(*destreg,*shiftreg,M.x86.R_CL);
- } else {
- u16 *destreg,*shiftreg;
-
- destreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",CL\n");
- TRACE_AND_STEP();
- *destreg = shrd_word(*destreg,*shiftreg,M.x86.R_CL);
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x0f,0xaf
-****************************************************************************/
-void x86emuOp2_imul_R_RM(u8 X86EMU_UNUSED(op2))
-{
- int mod, rl, rh;
- uint srcoffset;
-
- START_OF_INSTR();
- DECODE_PRINTF("IMUL\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
- u32 res_lo,res_hi;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = fetch_data_long(srcoffset);
- TRACE_AND_STEP();
- imul_long_direct(&res_lo,&res_hi,(s32)*destreg,(s32)srcval);
- if (res_hi != 0) {
- SET_FLAG(F_CF);
- SET_FLAG(F_OF);
- } else {
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_OF);
- }
- *destreg = (u32)res_lo;
- } else {
- u16 *destreg;
- u16 srcval;
- u32 res;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = fetch_data_word(srcoffset);
- TRACE_AND_STEP();
- res = (s16)*destreg * (s16)srcval;
- if (res > 0xFFFF) {
- SET_FLAG(F_CF);
- SET_FLAG(F_OF);
- } else {
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_OF);
- }
- *destreg = (u16)res;
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
- u32 res_lo,res_hi;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = fetch_data_long(srcoffset);
- TRACE_AND_STEP();
- imul_long_direct(&res_lo,&res_hi,(s32)*destreg,(s32)srcval);
- if (res_hi != 0) {
- SET_FLAG(F_CF);
- SET_FLAG(F_OF);
- } else {
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_OF);
- }
- *destreg = (u32)res_lo;
- } else {
- u16 *destreg;
- u16 srcval;
- u32 res;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = fetch_data_word(srcoffset);
- TRACE_AND_STEP();
- res = (s16)*destreg * (s16)srcval;
- if (res > 0xFFFF) {
- SET_FLAG(F_CF);
- SET_FLAG(F_OF);
- } else {
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_OF);
- }
- *destreg = (u16)res;
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
- u32 res_lo,res_hi;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = fetch_data_long(srcoffset);
- TRACE_AND_STEP();
- imul_long_direct(&res_lo,&res_hi,(s32)*destreg,(s32)srcval);
- if (res_hi != 0) {
- SET_FLAG(F_CF);
- SET_FLAG(F_OF);
- } else {
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_OF);
- }
- *destreg = (u32)res_lo;
- } else {
- u16 *destreg;
- u16 srcval;
- u32 res;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = fetch_data_word(srcoffset);
- TRACE_AND_STEP();
- res = (s16)*destreg * (s16)srcval;
- if (res > 0xFFFF) {
- SET_FLAG(F_CF);
- SET_FLAG(F_OF);
- } else {
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_OF);
- }
- *destreg = (u16)res;
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg,*srcreg;
- u32 res_lo,res_hi;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_LONG_REGISTER(rl);
- TRACE_AND_STEP();
- imul_long_direct(&res_lo,&res_hi,(s32)*destreg,(s32)*srcreg);
- if (res_hi != 0) {
- SET_FLAG(F_CF);
- SET_FLAG(F_OF);
- } else {
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_OF);
- }
- *destreg = (u32)res_lo;
- } else {
- u16 *destreg,*srcreg;
- u32 res;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_WORD_REGISTER(rl);
- res = (s16)*destreg * (s16)*srcreg;
- if (res > 0xFFFF) {
- SET_FLAG(F_CF);
- SET_FLAG(F_OF);
- } else {
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_OF);
- }
- *destreg = (u16)res;
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x0f,0xb2
-****************************************************************************/
-void x86emuOp2_lss_R_IMM(u8 X86EMU_UNUSED(op2))
-{
- int mod, rh, rl;
- u16 *dstreg;
- uint srcoffset;
-
- START_OF_INSTR();
- DECODE_PRINTF("LSS\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- dstreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *dstreg = fetch_data_word(srcoffset);
- M.x86.R_SS = fetch_data_word(srcoffset + 2);
- break;
- case 1:
- dstreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *dstreg = fetch_data_word(srcoffset);
- M.x86.R_SS = fetch_data_word(srcoffset + 2);
- break;
- case 2:
- dstreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *dstreg = fetch_data_word(srcoffset);
- M.x86.R_SS = fetch_data_word(srcoffset + 2);
- break;
- case 3: /* register to register */
- /* UNDEFINED! */
- TRACE_AND_STEP();
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x0f,0xb3
-****************************************************************************/
-void x86emuOp2_btr_R(u8 X86EMU_UNUSED(op2))
-{
- int mod, rl, rh;
- uint srcoffset;
- int bit,disp;
-
- START_OF_INSTR();
- DECODE_PRINTF("BTR\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 srcval,mask;
- u32 *shiftreg;
-
- srcoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0x1F;
- disp = (s16)*shiftreg >> 5;
- srcval = fetch_data_long(srcoffset+disp);
- mask = (0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- store_data_long(srcoffset+disp, srcval & ~mask);
- } else {
- u16 srcval,mask;
- u16 *shiftreg;
-
- srcoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0xF;
- disp = (s16)*shiftreg >> 4;
- srcval = fetch_data_word(srcoffset+disp);
- mask = (u16)(0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- store_data_word(srcoffset+disp, (u16)(srcval & ~mask));
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 srcval,mask;
- u32 *shiftreg;
-
- srcoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0x1F;
- disp = (s16)*shiftreg >> 5;
- srcval = fetch_data_long(srcoffset+disp);
- mask = (0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- store_data_long(srcoffset+disp, srcval & ~mask);
- } else {
- u16 srcval,mask;
- u16 *shiftreg;
-
- srcoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0xF;
- disp = (s16)*shiftreg >> 4;
- srcval = fetch_data_word(srcoffset+disp);
- mask = (u16)(0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- store_data_word(srcoffset+disp, (u16)(srcval & ~mask));
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 srcval,mask;
- u32 *shiftreg;
-
- srcoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0x1F;
- disp = (s16)*shiftreg >> 5;
- srcval = fetch_data_long(srcoffset+disp);
- mask = (0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- store_data_long(srcoffset+disp, srcval & ~mask);
- } else {
- u16 srcval,mask;
- u16 *shiftreg;
-
- srcoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0xF;
- disp = (s16)*shiftreg >> 4;
- srcval = fetch_data_word(srcoffset+disp);
- mask = (u16)(0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- store_data_word(srcoffset+disp, (u16)(srcval & ~mask));
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *srcreg,*shiftreg;
- u32 mask;
-
- srcreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0x1F;
- mask = (0x1 << bit);
- CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
- *srcreg &= ~mask;
- } else {
- u16 *srcreg,*shiftreg;
- u16 mask;
-
- srcreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0xF;
- mask = (u16)(0x1 << bit);
- CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
- *srcreg &= ~mask;
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x0f,0xb4
-****************************************************************************/
-void x86emuOp2_lfs_R_IMM(u8 X86EMU_UNUSED(op2))
-{
- int mod, rh, rl;
- u16 *dstreg;
- uint srcoffset;
-
- START_OF_INSTR();
- DECODE_PRINTF("LFS\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- dstreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *dstreg = fetch_data_word(srcoffset);
- M.x86.R_FS = fetch_data_word(srcoffset + 2);
- break;
- case 1:
- dstreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *dstreg = fetch_data_word(srcoffset);
- M.x86.R_FS = fetch_data_word(srcoffset + 2);
- break;
- case 2:
- dstreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *dstreg = fetch_data_word(srcoffset);
- M.x86.R_FS = fetch_data_word(srcoffset + 2);
- break;
- case 3: /* register to register */
- /* UNDEFINED! */
- TRACE_AND_STEP();
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x0f,0xb5
-****************************************************************************/
-void x86emuOp2_lgs_R_IMM(u8 X86EMU_UNUSED(op2))
-{
- int mod, rh, rl;
- u16 *dstreg;
- uint srcoffset;
-
- START_OF_INSTR();
- DECODE_PRINTF("LGS\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- dstreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *dstreg = fetch_data_word(srcoffset);
- M.x86.R_GS = fetch_data_word(srcoffset + 2);
- break;
- case 1:
- dstreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *dstreg = fetch_data_word(srcoffset);
- M.x86.R_GS = fetch_data_word(srcoffset + 2);
- break;
- case 2:
- dstreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *dstreg = fetch_data_word(srcoffset);
- M.x86.R_GS = fetch_data_word(srcoffset + 2);
- break;
- case 3: /* register to register */
- /* UNDEFINED! */
- TRACE_AND_STEP();
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x0f,0xb6
-****************************************************************************/
-void x86emuOp2_movzx_byte_R_RM(u8 X86EMU_UNUSED(op2))
-{
- int mod, rl, rh;
- uint srcoffset;
-
- START_OF_INSTR();
- DECODE_PRINTF("MOVZX\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = fetch_data_byte(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = srcval;
- } else {
- u16 *destreg;
- u16 srcval;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = fetch_data_byte(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = srcval;
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = fetch_data_byte(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = srcval;
- } else {
- u16 *destreg;
- u16 srcval;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = fetch_data_byte(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = srcval;
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = fetch_data_byte(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = srcval;
- } else {
- u16 *destreg;
- u16 srcval;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = fetch_data_byte(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = srcval;
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u8 *srcreg;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_BYTE_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = *srcreg;
- } else {
- u16 *destreg;
- u8 *srcreg;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_BYTE_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = *srcreg;
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x0f,0xb7
-****************************************************************************/
-void x86emuOp2_movzx_word_R_RM(u8 X86EMU_UNUSED(op2))
-{
- int mod, rl, rh;
- uint srcoffset;
- u32 *destreg;
- u32 srcval;
- u16 *srcreg;
-
- START_OF_INSTR();
- DECODE_PRINTF("MOVZX\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = fetch_data_word(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = srcval;
- break;
- case 1:
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = fetch_data_word(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = srcval;
- break;
- case 2:
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = fetch_data_word(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = srcval;
- break;
- case 3: /* register to register */
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = *srcreg;
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x0f,0xba
-****************************************************************************/
-void x86emuOp2_btX_I(u8 X86EMU_UNUSED(op2))
-{
- int mod, rl, rh;
- uint srcoffset;
- int bit;
-
- START_OF_INSTR();
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (rh) {
- case 3:
- DECODE_PRINTF("BT\t");
- break;
- case 4:
- DECODE_PRINTF("BTS\t");
- break;
- case 5:
- DECODE_PRINTF("BTR\t");
- break;
- case 6:
- DECODE_PRINTF("BTC\t");
- break;
- default:
- DECODE_PRINTF("ILLEGAL EXTENDED X86 OPCODE\n");
- TRACE_REGS();
- printk("%04x:%04x: %02X%02X ILLEGAL EXTENDED X86 OPCODE EXTENSION!\n",
- M.x86.R_CS, M.x86.R_IP-3,op2, (mod<<6)|(rh<<3)|rl);
- HALT_SYS();
- }
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 srcval, mask;
- u8 shift;
-
- srcoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- shift = fetch_byte_imm();
- TRACE_AND_STEP();
- bit = shift & 0x1F;
- srcval = fetch_data_long(srcoffset);
- mask = (0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- switch (rh) {
- case 4:
- store_data_long(srcoffset, srcval | mask);
- break;
- case 5:
- store_data_long(srcoffset, srcval & ~mask);
- break;
- case 6:
- store_data_long(srcoffset, srcval ^ mask);
- break;
- default:
- break;
- }
- } else {
- u16 srcval, mask;
- u8 shift;
-
- srcoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- shift = fetch_byte_imm();
- TRACE_AND_STEP();
- bit = shift & 0xF;
- srcval = fetch_data_word(srcoffset);
- mask = (0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- switch (rh) {
- case 4:
- store_data_word(srcoffset, srcval | mask);
- break;
- case 5:
- store_data_word(srcoffset, srcval & ~mask);
- break;
- case 6:
- store_data_word(srcoffset, srcval ^ mask);
- break;
- default:
- break;
- }
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 srcval, mask;
- u8 shift;
-
- srcoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- shift = fetch_byte_imm();
- TRACE_AND_STEP();
- bit = shift & 0x1F;
- srcval = fetch_data_long(srcoffset);
- mask = (0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- switch (rh) {
- case 4:
- store_data_long(srcoffset, srcval | mask);
- break;
- case 5:
- store_data_long(srcoffset, srcval & ~mask);
- break;
- case 6:
- store_data_long(srcoffset, srcval ^ mask);
- break;
- default:
- break;
- }
- } else {
- u16 srcval, mask;
- u8 shift;
-
- srcoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- shift = fetch_byte_imm();
- TRACE_AND_STEP();
- bit = shift & 0xF;
- srcval = fetch_data_word(srcoffset);
- mask = (0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- switch (rh) {
- case 4:
- store_data_word(srcoffset, srcval | mask);
- break;
- case 5:
- store_data_word(srcoffset, srcval & ~mask);
- break;
- case 6:
- store_data_word(srcoffset, srcval ^ mask);
- break;
- default:
- break;
- }
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 srcval, mask;
- u8 shift;
-
- srcoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- shift = fetch_byte_imm();
- TRACE_AND_STEP();
- bit = shift & 0x1F;
- srcval = fetch_data_long(srcoffset);
- mask = (0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- switch (rh) {
- case 4:
- store_data_long(srcoffset, srcval | mask);
- break;
- case 5:
- store_data_long(srcoffset, srcval & ~mask);
- break;
- case 6:
- store_data_long(srcoffset, srcval ^ mask);
- break;
- default:
- break;
- }
- } else {
- u16 srcval, mask;
- u8 shift;
-
- srcoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- shift = fetch_byte_imm();
- TRACE_AND_STEP();
- bit = shift & 0xF;
- srcval = fetch_data_word(srcoffset);
- mask = (0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- switch (rh) {
- case 4:
- store_data_word(srcoffset, srcval | mask);
- break;
- case 5:
- store_data_word(srcoffset, srcval & ~mask);
- break;
- case 6:
- store_data_word(srcoffset, srcval ^ mask);
- break;
- default:
- break;
- }
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *srcreg;
- u32 mask;
- u8 shift;
-
- srcreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF(",");
- shift = fetch_byte_imm();
- TRACE_AND_STEP();
- bit = shift & 0x1F;
- mask = (0x1 << bit);
- CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
- switch (rh) {
- case 4:
- *srcreg |= mask;
- break;
- case 5:
- *srcreg &= ~mask;
- break;
- case 6:
- *srcreg ^= mask;
- break;
- default:
- break;
- }
- } else {
- u16 *srcreg;
- u16 mask;
- u8 shift;
-
- srcreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF(",");
- shift = fetch_byte_imm();
- TRACE_AND_STEP();
- bit = shift & 0xF;
- mask = (0x1 << bit);
- CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
- switch (rh) {
- case 4:
- *srcreg |= mask;
- break;
- case 5:
- *srcreg &= ~mask;
- break;
- case 6:
- *srcreg ^= mask;
- break;
- default:
- break;
- }
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x0f,0xbb
-****************************************************************************/
-void x86emuOp2_btc_R(u8 X86EMU_UNUSED(op2))
-{
- int mod, rl, rh;
- uint srcoffset;
- int bit,disp;
-
- START_OF_INSTR();
- DECODE_PRINTF("BTC\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 srcval,mask;
- u32 *shiftreg;
-
- srcoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0x1F;
- disp = (s16)*shiftreg >> 5;
- srcval = fetch_data_long(srcoffset+disp);
- mask = (0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- store_data_long(srcoffset+disp, srcval ^ mask);
- } else {
- u16 srcval,mask;
- u16 *shiftreg;
-
- srcoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0xF;
- disp = (s16)*shiftreg >> 4;
- srcval = fetch_data_word(srcoffset+disp);
- mask = (u16)(0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- store_data_word(srcoffset+disp, (u16)(srcval ^ mask));
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 srcval,mask;
- u32 *shiftreg;
-
- srcoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0x1F;
- disp = (s16)*shiftreg >> 5;
- srcval = fetch_data_long(srcoffset+disp);
- mask = (0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- store_data_long(srcoffset+disp, srcval ^ mask);
- } else {
- u16 srcval,mask;
- u16 *shiftreg;
-
- srcoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0xF;
- disp = (s16)*shiftreg >> 4;
- srcval = fetch_data_word(srcoffset+disp);
- mask = (u16)(0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- store_data_word(srcoffset+disp, (u16)(srcval ^ mask));
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 srcval,mask;
- u32 *shiftreg;
-
- srcoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0x1F;
- disp = (s16)*shiftreg >> 5;
- srcval = fetch_data_long(srcoffset+disp);
- mask = (0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- store_data_long(srcoffset+disp, srcval ^ mask);
- } else {
- u16 srcval,mask;
- u16 *shiftreg;
-
- srcoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0xF;
- disp = (s16)*shiftreg >> 4;
- srcval = fetch_data_word(srcoffset+disp);
- mask = (u16)(0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- store_data_word(srcoffset+disp, (u16)(srcval ^ mask));
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *srcreg,*shiftreg;
- u32 mask;
-
- srcreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0x1F;
- mask = (0x1 << bit);
- CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
- *srcreg ^= mask;
- } else {
- u16 *srcreg,*shiftreg;
- u16 mask;
-
- srcreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0xF;
- mask = (u16)(0x1 << bit);
- CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
- *srcreg ^= mask;
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x0f,0xbc
-****************************************************************************/
-void x86emuOp2_bsf(u8 X86EMU_UNUSED(op2))
-{
- int mod, rl, rh;
- uint srcoffset;
-
- START_OF_INSTR();
- DECODE_PRINTF("BSF\n");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch(mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 srcval, *dstreg;
-
- srcoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- dstreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
- srcval = fetch_data_long(srcoffset);
- CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
- for(*dstreg = 0; *dstreg < 32; (*dstreg)++)
- if ((srcval >> *dstreg) & 1) break;
- } else {
- u16 srcval, *dstreg;
-
- srcoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- dstreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- srcval = fetch_data_word(srcoffset);
- CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
- for(*dstreg = 0; *dstreg < 16; (*dstreg)++)
- if ((srcval >> *dstreg) & 1) break;
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 srcval, *dstreg;
-
- srcoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- dstreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
- srcval = fetch_data_long(srcoffset);
- CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
- for(*dstreg = 0; *dstreg < 32; (*dstreg)++)
- if ((srcval >> *dstreg) & 1) break;
- } else {
- u16 srcval, *dstreg;
-
- srcoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- dstreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- srcval = fetch_data_word(srcoffset);
- CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
- for(*dstreg = 0; *dstreg < 16; (*dstreg)++)
- if ((srcval >> *dstreg) & 1) break;
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 srcval, *dstreg;
-
- srcoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- dstreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
- srcval = fetch_data_long(srcoffset);
- CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
- for(*dstreg = 0; *dstreg < 32; (*dstreg)++)
- if ((srcval >> *dstreg) & 1) break;
- } else {
- u16 srcval, *dstreg;
-
- srcoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- dstreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- srcval = fetch_data_word(srcoffset);
- CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
- for(*dstreg = 0; *dstreg < 16; (*dstreg)++)
- if ((srcval >> *dstreg) & 1) break;
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *srcreg, *dstreg;
-
- srcreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF(",");
- dstreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
- CONDITIONAL_SET_FLAG(*srcreg == 0, F_ZF);
- for(*dstreg = 0; *dstreg < 32; (*dstreg)++)
- if ((*srcreg >> *dstreg) & 1) break;
- } else {
- u16 *srcreg, *dstreg;
-
- srcreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF(",");
- dstreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- CONDITIONAL_SET_FLAG(*srcreg == 0, F_ZF);
- for(*dstreg = 0; *dstreg < 16; (*dstreg)++)
- if ((*srcreg >> *dstreg) & 1) break;
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x0f,0xbd
-****************************************************************************/
-void x86emuOp2_bsr(u8 X86EMU_UNUSED(op2))
-{
- int mod, rl, rh;
- uint srcoffset;
-
- START_OF_INSTR();
- DECODE_PRINTF("BSF\n");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch(mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 srcval, *dstreg;
-
- srcoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- dstreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
- srcval = fetch_data_long(srcoffset);
- CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
- for(*dstreg = 31; *dstreg > 0; (*dstreg)--)
- if ((srcval >> *dstreg) & 1) break;
- } else {
- u16 srcval, *dstreg;
-
- srcoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- dstreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- srcval = fetch_data_word(srcoffset);
- CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
- for(*dstreg = 15; *dstreg > 0; (*dstreg)--)
- if ((srcval >> *dstreg) & 1) break;
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 srcval, *dstreg;
-
- srcoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- dstreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
- srcval = fetch_data_long(srcoffset);
- CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
- for(*dstreg = 31; *dstreg > 0; (*dstreg)--)
- if ((srcval >> *dstreg) & 1) break;
- } else {
- u16 srcval, *dstreg;
-
- srcoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- dstreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- srcval = fetch_data_word(srcoffset);
- CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
- for(*dstreg = 15; *dstreg > 0; (*dstreg)--)
- if ((srcval >> *dstreg) & 1) break;
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 srcval, *dstreg;
-
- srcoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- dstreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
- srcval = fetch_data_long(srcoffset);
- CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
- for(*dstreg = 31; *dstreg > 0; (*dstreg)--)
- if ((srcval >> *dstreg) & 1) break;
- } else {
- u16 srcval, *dstreg;
-
- srcoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- dstreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- srcval = fetch_data_word(srcoffset);
- CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
- for(*dstreg = 15; *dstreg > 0; (*dstreg)--)
- if ((srcval >> *dstreg) & 1) break;
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *srcreg, *dstreg;
-
- srcreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF(",");
- dstreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
- CONDITIONAL_SET_FLAG(*srcreg == 0, F_ZF);
- for(*dstreg = 31; *dstreg > 0; (*dstreg)--)
- if ((*srcreg >> *dstreg) & 1) break;
- } else {
- u16 *srcreg, *dstreg;
-
- srcreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF(",");
- dstreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- CONDITIONAL_SET_FLAG(*srcreg == 0, F_ZF);
- for(*dstreg = 15; *dstreg > 0; (*dstreg)--)
- if ((*srcreg >> *dstreg) & 1) break;
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x0f,0xbe
-****************************************************************************/
-void x86emuOp2_movsx_byte_R_RM(u8 X86EMU_UNUSED(op2))
-{
- int mod, rl, rh;
- uint srcoffset;
-
- START_OF_INSTR();
- DECODE_PRINTF("MOVSX\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = (s32)((s8)fetch_data_byte(srcoffset));
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = srcval;
- } else {
- u16 *destreg;
- u16 srcval;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = (s16)((s8)fetch_data_byte(srcoffset));
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = srcval;
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = (s32)((s8)fetch_data_byte(srcoffset));
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = srcval;
- } else {
- u16 *destreg;
- u16 srcval;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = (s16)((s8)fetch_data_byte(srcoffset));
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = srcval;
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = (s32)((s8)fetch_data_byte(srcoffset));
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = srcval;
- } else {
- u16 *destreg;
- u16 srcval;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = (s16)((s8)fetch_data_byte(srcoffset));
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = srcval;
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u8 *srcreg;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_BYTE_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = (s32)((s8)*srcreg);
- } else {
- u16 *destreg;
- u8 *srcreg;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_BYTE_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = (s16)((s8)*srcreg);
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x0f,0xbf
-****************************************************************************/
-void x86emuOp2_movsx_word_R_RM(u8 X86EMU_UNUSED(op2))
-{
- int mod, rl, rh;
- uint srcoffset;
- u32 *destreg;
- u32 srcval;
- u16 *srcreg;
-
- START_OF_INSTR();
- DECODE_PRINTF("MOVSX\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = (s32)((s16)fetch_data_word(srcoffset));
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = srcval;
- break;
- case 1:
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = (s32)((s16)fetch_data_word(srcoffset));
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = srcval;
- break;
- case 2:
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = (s32)((s16)fetch_data_word(srcoffset));
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = srcval;
- break;
- case 3: /* register to register */
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = (s32)((s16)*srcreg);
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/***************************************************************************
- * Double byte operation code table:
- **************************************************************************/
-void (*x86emu_optab2[256])(u8) =
-{
-/* 0x00 */ x86emuOp2_illegal_op, /* Group F (ring 0 PM) */
-/* 0x01 */ x86emuOp2_illegal_op, /* Group G (ring 0 PM) */
-/* 0x02 */ x86emuOp2_illegal_op, /* lar (ring 0 PM) */
-/* 0x03 */ x86emuOp2_illegal_op, /* lsl (ring 0 PM) */
-/* 0x04 */ x86emuOp2_illegal_op,
-/* 0x05 */ x86emuOp2_illegal_op, /* loadall (undocumented) */
-/* 0x06 */ x86emuOp2_illegal_op, /* clts (ring 0 PM) */
-/* 0x07 */ x86emuOp2_illegal_op, /* loadall (undocumented) */
-/* 0x08 */ x86emuOp2_illegal_op, /* invd (ring 0 PM) */
-/* 0x09 */ x86emuOp2_illegal_op, /* wbinvd (ring 0 PM) */
-/* 0x0a */ x86emuOp2_illegal_op,
-/* 0x0b */ x86emuOp2_illegal_op,
-/* 0x0c */ x86emuOp2_illegal_op,
-/* 0x0d */ x86emuOp2_illegal_op,
-/* 0x0e */ x86emuOp2_illegal_op,
-/* 0x0f */ x86emuOp2_illegal_op,
-
-/* 0x10 */ x86emuOp2_illegal_op,
-/* 0x11 */ x86emuOp2_illegal_op,
-/* 0x12 */ x86emuOp2_illegal_op,
-/* 0x13 */ x86emuOp2_illegal_op,
-/* 0x14 */ x86emuOp2_illegal_op,
-/* 0x15 */ x86emuOp2_illegal_op,
-/* 0x16 */ x86emuOp2_illegal_op,
-/* 0x17 */ x86emuOp2_illegal_op,
-/* 0x18 */ x86emuOp2_illegal_op,
-/* 0x19 */ x86emuOp2_illegal_op,
-/* 0x1a */ x86emuOp2_illegal_op,
-/* 0x1b */ x86emuOp2_illegal_op,
-/* 0x1c */ x86emuOp2_illegal_op,
-/* 0x1d */ x86emuOp2_illegal_op,
-/* 0x1e */ x86emuOp2_illegal_op,
-/* 0x1f */ x86emuOp2_illegal_op,
-
-/* 0x20 */ x86emuOp2_illegal_op, /* mov reg32,creg (ring 0 PM) */
-/* 0x21 */ x86emuOp2_illegal_op, /* mov reg32,dreg (ring 0 PM) */
-/* 0x22 */ x86emuOp2_illegal_op, /* mov creg,reg32 (ring 0 PM) */
-/* 0x23 */ x86emuOp2_illegal_op, /* mov dreg,reg32 (ring 0 PM) */
-/* 0x24 */ x86emuOp2_illegal_op, /* mov reg32,treg (ring 0 PM) */
-/* 0x25 */ x86emuOp2_illegal_op,
-/* 0x26 */ x86emuOp2_illegal_op, /* mov treg,reg32 (ring 0 PM) */
-/* 0x27 */ x86emuOp2_illegal_op,
-/* 0x28 */ x86emuOp2_illegal_op,
-/* 0x29 */ x86emuOp2_illegal_op,
-/* 0x2a */ x86emuOp2_illegal_op,
-/* 0x2b */ x86emuOp2_illegal_op,
-/* 0x2c */ x86emuOp2_illegal_op,
-/* 0x2d */ x86emuOp2_illegal_op,
-/* 0x2e */ x86emuOp2_illegal_op,
-/* 0x2f */ x86emuOp2_illegal_op,
-
-/* 0x30 */ x86emuOp2_illegal_op,
-/* 0x31 */ x86emuOp2_illegal_op,
-/* 0x32 */ x86emuOp2_illegal_op,
-/* 0x33 */ x86emuOp2_illegal_op,
-/* 0x34 */ x86emuOp2_illegal_op,
-/* 0x35 */ x86emuOp2_illegal_op,
-/* 0x36 */ x86emuOp2_illegal_op,
-/* 0x37 */ x86emuOp2_illegal_op,
-/* 0x38 */ x86emuOp2_illegal_op,
-/* 0x39 */ x86emuOp2_illegal_op,
-/* 0x3a */ x86emuOp2_illegal_op,
-/* 0x3b */ x86emuOp2_illegal_op,
-/* 0x3c */ x86emuOp2_illegal_op,
-/* 0x3d */ x86emuOp2_illegal_op,
-/* 0x3e */ x86emuOp2_illegal_op,
-/* 0x3f */ x86emuOp2_illegal_op,
-
-/* 0x40 */ x86emuOp2_illegal_op,
-/* 0x41 */ x86emuOp2_illegal_op,
-/* 0x42 */ x86emuOp2_illegal_op,
-/* 0x43 */ x86emuOp2_illegal_op,
-/* 0x44 */ x86emuOp2_illegal_op,
-/* 0x45 */ x86emuOp2_illegal_op,
-/* 0x46 */ x86emuOp2_illegal_op,
-/* 0x47 */ x86emuOp2_illegal_op,
-/* 0x48 */ x86emuOp2_illegal_op,
-/* 0x49 */ x86emuOp2_illegal_op,
-/* 0x4a */ x86emuOp2_illegal_op,
-/* 0x4b */ x86emuOp2_illegal_op,
-/* 0x4c */ x86emuOp2_illegal_op,
-/* 0x4d */ x86emuOp2_illegal_op,
-/* 0x4e */ x86emuOp2_illegal_op,
-/* 0x4f */ x86emuOp2_illegal_op,
-
-/* 0x50 */ x86emuOp2_illegal_op,
-/* 0x51 */ x86emuOp2_illegal_op,
-/* 0x52 */ x86emuOp2_illegal_op,
-/* 0x53 */ x86emuOp2_illegal_op,
-/* 0x54 */ x86emuOp2_illegal_op,
-/* 0x55 */ x86emuOp2_illegal_op,
-/* 0x56 */ x86emuOp2_illegal_op,
-/* 0x57 */ x86emuOp2_illegal_op,
-/* 0x58 */ x86emuOp2_illegal_op,
-/* 0x59 */ x86emuOp2_illegal_op,
-/* 0x5a */ x86emuOp2_illegal_op,
-/* 0x5b */ x86emuOp2_illegal_op,
-/* 0x5c */ x86emuOp2_illegal_op,
-/* 0x5d */ x86emuOp2_illegal_op,
-/* 0x5e */ x86emuOp2_illegal_op,
-/* 0x5f */ x86emuOp2_illegal_op,
-
-/* 0x60 */ x86emuOp2_illegal_op,
-/* 0x61 */ x86emuOp2_illegal_op,
-/* 0x62 */ x86emuOp2_illegal_op,
-/* 0x63 */ x86emuOp2_illegal_op,
-/* 0x64 */ x86emuOp2_illegal_op,
-/* 0x65 */ x86emuOp2_illegal_op,
-/* 0x66 */ x86emuOp2_illegal_op,
-/* 0x67 */ x86emuOp2_illegal_op,
-/* 0x68 */ x86emuOp2_illegal_op,
-/* 0x69 */ x86emuOp2_illegal_op,
-/* 0x6a */ x86emuOp2_illegal_op,
-/* 0x6b */ x86emuOp2_illegal_op,
-/* 0x6c */ x86emuOp2_illegal_op,
-/* 0x6d */ x86emuOp2_illegal_op,
-/* 0x6e */ x86emuOp2_illegal_op,
-/* 0x6f */ x86emuOp2_illegal_op,
-
-/* 0x70 */ x86emuOp2_illegal_op,
-/* 0x71 */ x86emuOp2_illegal_op,
-/* 0x72 */ x86emuOp2_illegal_op,
-/* 0x73 */ x86emuOp2_illegal_op,
-/* 0x74 */ x86emuOp2_illegal_op,
-/* 0x75 */ x86emuOp2_illegal_op,
-/* 0x76 */ x86emuOp2_illegal_op,
-/* 0x77 */ x86emuOp2_illegal_op,
-/* 0x78 */ x86emuOp2_illegal_op,
-/* 0x79 */ x86emuOp2_illegal_op,
-/* 0x7a */ x86emuOp2_illegal_op,
-/* 0x7b */ x86emuOp2_illegal_op,
-/* 0x7c */ x86emuOp2_illegal_op,
-/* 0x7d */ x86emuOp2_illegal_op,
-/* 0x7e */ x86emuOp2_illegal_op,
-/* 0x7f */ x86emuOp2_illegal_op,
-
-/* 0x80 */ x86emuOp2_long_jump,
-/* 0x81 */ x86emuOp2_long_jump,
-/* 0x82 */ x86emuOp2_long_jump,
-/* 0x83 */ x86emuOp2_long_jump,
-/* 0x84 */ x86emuOp2_long_jump,
-/* 0x85 */ x86emuOp2_long_jump,
-/* 0x86 */ x86emuOp2_long_jump,
-/* 0x87 */ x86emuOp2_long_jump,
-/* 0x88 */ x86emuOp2_long_jump,
-/* 0x89 */ x86emuOp2_long_jump,
-/* 0x8a */ x86emuOp2_long_jump,
-/* 0x8b */ x86emuOp2_long_jump,
-/* 0x8c */ x86emuOp2_long_jump,
-/* 0x8d */ x86emuOp2_long_jump,
-/* 0x8e */ x86emuOp2_long_jump,
-/* 0x8f */ x86emuOp2_long_jump,
-
-/* 0x90 */ x86emuOp2_set_byte,
-/* 0x91 */ x86emuOp2_set_byte,
-/* 0x92 */ x86emuOp2_set_byte,
-/* 0x93 */ x86emuOp2_set_byte,
-/* 0x94 */ x86emuOp2_set_byte,
-/* 0x95 */ x86emuOp2_set_byte,
-/* 0x96 */ x86emuOp2_set_byte,
-/* 0x97 */ x86emuOp2_set_byte,
-/* 0x98 */ x86emuOp2_set_byte,
-/* 0x99 */ x86emuOp2_set_byte,
-/* 0x9a */ x86emuOp2_set_byte,
-/* 0x9b */ x86emuOp2_set_byte,
-/* 0x9c */ x86emuOp2_set_byte,
-/* 0x9d */ x86emuOp2_set_byte,
-/* 0x9e */ x86emuOp2_set_byte,
-/* 0x9f */ x86emuOp2_set_byte,
-
-/* 0xa0 */ x86emuOp2_push_FS,
-/* 0xa1 */ x86emuOp2_pop_FS,
-/* 0xa2 */ x86emuOp2_illegal_op,
-/* 0xa3 */ x86emuOp2_bt_R,
-/* 0xa4 */ x86emuOp2_shld_IMM,
-/* 0xa5 */ x86emuOp2_shld_CL,
-/* 0xa6 */ x86emuOp2_illegal_op,
-/* 0xa7 */ x86emuOp2_illegal_op,
-/* 0xa8 */ x86emuOp2_push_GS,
-/* 0xa9 */ x86emuOp2_pop_GS,
-/* 0xaa */ x86emuOp2_illegal_op,
-/* 0xab */ x86emuOp2_bt_R,
-/* 0xac */ x86emuOp2_shrd_IMM,
-/* 0xad */ x86emuOp2_shrd_CL,
-/* 0xae */ x86emuOp2_illegal_op,
-/* 0xaf */ x86emuOp2_imul_R_RM,
-
-/* 0xb0 */ x86emuOp2_illegal_op, /* TODO: cmpxchg */
-/* 0xb1 */ x86emuOp2_illegal_op, /* TODO: cmpxchg */
-/* 0xb2 */ x86emuOp2_lss_R_IMM,
-/* 0xb3 */ x86emuOp2_btr_R,
-/* 0xb4 */ x86emuOp2_lfs_R_IMM,
-/* 0xb5 */ x86emuOp2_lgs_R_IMM,
-/* 0xb6 */ x86emuOp2_movzx_byte_R_RM,
-/* 0xb7 */ x86emuOp2_movzx_word_R_RM,
-/* 0xb8 */ x86emuOp2_illegal_op,
-/* 0xb9 */ x86emuOp2_illegal_op,
-/* 0xba */ x86emuOp2_btX_I,
-/* 0xbb */ x86emuOp2_btc_R,
-/* 0xbc */ x86emuOp2_bsf,
-/* 0xbd */ x86emuOp2_bsr,
-/* 0xbe */ x86emuOp2_movsx_byte_R_RM,
-/* 0xbf */ x86emuOp2_movsx_word_R_RM,
-
-/* 0xc0 */ x86emuOp2_illegal_op, /* TODO: xadd */
-/* 0xc1 */ x86emuOp2_illegal_op, /* TODO: xadd */
-/* 0xc2 */ x86emuOp2_illegal_op,
-/* 0xc3 */ x86emuOp2_illegal_op,
-/* 0xc4 */ x86emuOp2_illegal_op,
-/* 0xc5 */ x86emuOp2_illegal_op,
-/* 0xc6 */ x86emuOp2_illegal_op,
-/* 0xc7 */ x86emuOp2_illegal_op,
-/* 0xc8 */ x86emuOp2_illegal_op, /* TODO: bswap */
-/* 0xc9 */ x86emuOp2_illegal_op, /* TODO: bswap */
-/* 0xca */ x86emuOp2_illegal_op, /* TODO: bswap */
-/* 0xcb */ x86emuOp2_illegal_op, /* TODO: bswap */
-/* 0xcc */ x86emuOp2_illegal_op, /* TODO: bswap */
-/* 0xcd */ x86emuOp2_illegal_op, /* TODO: bswap */
-/* 0xce */ x86emuOp2_illegal_op, /* TODO: bswap */
-/* 0xcf */ x86emuOp2_illegal_op, /* TODO: bswap */
-
-/* 0xd0 */ x86emuOp2_illegal_op,
-/* 0xd1 */ x86emuOp2_illegal_op,
-/* 0xd2 */ x86emuOp2_illegal_op,
-/* 0xd3 */ x86emuOp2_illegal_op,
-/* 0xd4 */ x86emuOp2_illegal_op,
-/* 0xd5 */ x86emuOp2_illegal_op,
-/* 0xd6 */ x86emuOp2_illegal_op,
-/* 0xd7 */ x86emuOp2_illegal_op,
-/* 0xd8 */ x86emuOp2_illegal_op,
-/* 0xd9 */ x86emuOp2_illegal_op,
-/* 0xda */ x86emuOp2_illegal_op,
-/* 0xdb */ x86emuOp2_illegal_op,
-/* 0xdc */ x86emuOp2_illegal_op,
-/* 0xdd */ x86emuOp2_illegal_op,
-/* 0xde */ x86emuOp2_illegal_op,
-/* 0xdf */ x86emuOp2_illegal_op,
-
-/* 0xe0 */ x86emuOp2_illegal_op,
-/* 0xe1 */ x86emuOp2_illegal_op,
-/* 0xe2 */ x86emuOp2_illegal_op,
-/* 0xe3 */ x86emuOp2_illegal_op,
-/* 0xe4 */ x86emuOp2_illegal_op,
-/* 0xe5 */ x86emuOp2_illegal_op,
-/* 0xe6 */ x86emuOp2_illegal_op,
-/* 0xe7 */ x86emuOp2_illegal_op,
-/* 0xe8 */ x86emuOp2_illegal_op,
-/* 0xe9 */ x86emuOp2_illegal_op,
-/* 0xea */ x86emuOp2_illegal_op,
-/* 0xeb */ x86emuOp2_illegal_op,
-/* 0xec */ x86emuOp2_illegal_op,
-/* 0xed */ x86emuOp2_illegal_op,
-/* 0xee */ x86emuOp2_illegal_op,
-/* 0xef */ x86emuOp2_illegal_op,
-
-/* 0xf0 */ x86emuOp2_illegal_op,
-/* 0xf1 */ x86emuOp2_illegal_op,
-/* 0xf2 */ x86emuOp2_illegal_op,
-/* 0xf3 */ x86emuOp2_illegal_op,
-/* 0xf4 */ x86emuOp2_illegal_op,
-/* 0xf5 */ x86emuOp2_illegal_op,
-/* 0xf6 */ x86emuOp2_illegal_op,
-/* 0xf7 */ x86emuOp2_illegal_op,
-/* 0xf8 */ x86emuOp2_illegal_op,
-/* 0xf9 */ x86emuOp2_illegal_op,
-/* 0xfa */ x86emuOp2_illegal_op,
-/* 0xfb */ x86emuOp2_illegal_op,
-/* 0xfc */ x86emuOp2_illegal_op,
-/* 0xfd */ x86emuOp2_illegal_op,
-/* 0xfe */ x86emuOp2_illegal_op,
-/* 0xff */ x86emuOp2_illegal_op,
-};
diff --git a/board/MAI/bios_emulator/scitech/src/x86emu/prim_ops.c b/board/MAI/bios_emulator/scitech/src/x86emu/prim_ops.c
deleted file mode 100644
index 72b1bf2879..0000000000
--- a/board/MAI/bios_emulator/scitech/src/x86emu/prim_ops.c
+++ /dev/null
@@ -1,2914 +0,0 @@
-/****************************************************************************
-*
-* Realmode X86 Emulator Library
-*
-* Copyright (C) 1996-1999 SciTech Software, Inc.
-* Copyright (C) David Mosberger-Tang
-* Copyright (C) 1999 Egbert Eich
-*
-* ========================================================================
-*
-* Permission to use, copy, modify, distribute, and sell this software and
-* its documentation for any purpose is hereby granted without fee,
-* provided that the above copyright notice appear in all copies and that
-* both that copyright notice and this permission notice appear in
-* supporting documentation, and that the name of the authors not be used
-* in advertising or publicity pertaining to distribution of the software
-* without specific, written prior permission. The authors makes no
-* representations about the suitability of this software for any purpose.
-* It is provided "as is" without express or implied warranty.
-*
-* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
-* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
-* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
-* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
-* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
-* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
-* PERFORMANCE OF THIS SOFTWARE.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-* Developer: Kendall Bennett
-*
-* Description: This file contains the code to implement the primitive
-* machine operations used by the emulation code in ops.c
-*
-* Carry Chain Calculation
-*
-* This represents a somewhat expensive calculation which is
-* apparently required to emulate the setting of the OF and AF flag.
-* The latter is not so important, but the former is. The overflow
-* flag is the XOR of the top two bits of the carry chain for an
-* addition (similar for subtraction). Since we do not want to
-* simulate the addition in a bitwise manner, we try to calculate the
-* carry chain given the two operands and the result.
-*
-* So, given the following table, which represents the addition of two
-* bits, we can derive a formula for the carry chain.
-*
-* a b cin r cout
-* 0 0 0 0 0
-* 0 0 1 1 0
-* 0 1 0 1 0
-* 0 1 1 0 1
-* 1 0 0 1 0
-* 1 0 1 0 1
-* 1 1 0 0 1
-* 1 1 1 1 1
-*
-* Construction of table for cout:
-*
-* ab
-* r \ 00 01 11 10
-* |------------------
-* 0 | 0 1 1 1
-* 1 | 0 0 1 0
-*
-* By inspection, one gets: cc = ab + r'(a + b)
-*
-* That represents alot of operations, but NO CHOICE....
-*
-* Borrow Chain Calculation.
-*
-* The following table represents the subtraction of two bits, from
-* which we can derive a formula for the borrow chain.
-*
-* a b bin r bout
-* 0 0 0 0 0
-* 0 0 1 1 1
-* 0 1 0 1 1
-* 0 1 1 0 1
-* 1 0 0 1 0
-* 1 0 1 0 0
-* 1 1 0 0 0
-* 1 1 1 1 1
-*
-* Construction of table for cout:
-*
-* ab
-* r \ 00 01 11 10
-* |------------------
-* 0 | 0 1 0 0
-* 1 | 1 1 1 0
-*
-* By inspection, one gets: bc = a'b + r(a' + b)
-*
-****************************************************************************/
-
-#define PRIM_OPS_NO_REDEFINE_ASM
-#include "x86emu/x86emui.h"
-
-/*------------------------- Global Variables ------------------------------*/
-
-#ifndef __HAVE_INLINE_ASSEMBLER__
-
-static u32 x86emu_parity_tab[8] =
-{
- 0x96696996,
- 0x69969669,
- 0x69969669,
- 0x96696996,
- 0x69969669,
- 0x96696996,
- 0x96696996,
- 0x69969669,
-};
-
-#endif
-
-#define PARITY(x) (((x86emu_parity_tab[(x) / 32] >> ((x) % 32)) & 1) == 0)
-#define XOR2(x) (((x) ^ ((x)>>1)) & 0x1)
-
-/*----------------------------- Implementation ----------------------------*/
-
-#ifndef __HAVE_INLINE_ASSEMBLER__
-
-/****************************************************************************
-REMARKS:
-Implements the AAA instruction and side effects.
-****************************************************************************/
-u16 aaa_word(u16 d)
-{
- u16 res;
- if ((d & 0xf) > 0x9 || ACCESS_FLAG(F_AF)) {
- d += 0x6;
- d += 0x100;
- SET_FLAG(F_AF);
- SET_FLAG(F_CF);
- } else {
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_AF);
- }
- res = (u16)(d & 0xFF0F);
- CLEAR_FLAG(F_SF);
- CONDITIONAL_SET_FLAG(res == 0, F_ZF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
- return res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the AAA instruction and side effects.
-****************************************************************************/
-u16 aas_word(u16 d)
-{
- u16 res;
- if ((d & 0xf) > 0x9 || ACCESS_FLAG(F_AF)) {
- d -= 0x6;
- d -= 0x100;
- SET_FLAG(F_AF);
- SET_FLAG(F_CF);
- } else {
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_AF);
- }
- res = (u16)(d & 0xFF0F);
- CLEAR_FLAG(F_SF);
- CONDITIONAL_SET_FLAG(res == 0, F_ZF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
- return res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the AAD instruction and side effects.
-****************************************************************************/
-u16 aad_word(u16 d)
-{
- u16 l;
- u8 hb, lb;
-
- hb = (u8)((d >> 8) & 0xff);
- lb = (u8)((d & 0xff));
- l = (u16)((lb + 10 * hb) & 0xFF);
-
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_AF);
- CLEAR_FLAG(F_OF);
- CONDITIONAL_SET_FLAG(l & 0x80, F_SF);
- CONDITIONAL_SET_FLAG(l == 0, F_ZF);
- CONDITIONAL_SET_FLAG(PARITY(l & 0xff), F_PF);
- return l;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the AAM instruction and side effects.
-****************************************************************************/
-u16 aam_word(u8 d)
-{
- u16 h, l;
-
- h = (u16)(d / 10);
- l = (u16)(d % 10);
- l |= (u16)(h << 8);
-
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_AF);
- CLEAR_FLAG(F_OF);
- CONDITIONAL_SET_FLAG(l & 0x80, F_SF);
- CONDITIONAL_SET_FLAG(l == 0, F_ZF);
- CONDITIONAL_SET_FLAG(PARITY(l & 0xff), F_PF);
- return l;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the ADC instruction and side effects.
-****************************************************************************/
-u8 adc_byte(u8 d, u8 s)
-{
- register u32 res; /* all operands in native machine order */
- register u32 cc;
-
- if (ACCESS_FLAG(F_CF))
- res = 1 + d + s;
- else
- res = d + s;
-
- CONDITIONAL_SET_FLAG(res & 0x100, F_CF);
- CONDITIONAL_SET_FLAG((res & 0xff) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(res & 0x80, F_SF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
-
- /* calculate the carry chain SEE NOTE AT TOP. */
- cc = (s & d) | ((~res) & (s | d));
- CONDITIONAL_SET_FLAG(XOR2(cc >> 6), F_OF);
- CONDITIONAL_SET_FLAG(cc & 0x8, F_AF);
- return (u8)res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the ADC instruction and side effects.
-****************************************************************************/
-u16 adc_word(u16 d, u16 s)
-{
- register u32 res; /* all operands in native machine order */
- register u32 cc;
-
- if (ACCESS_FLAG(F_CF))
- res = 1 + d + s;
- else
- res = d + s;
-
- CONDITIONAL_SET_FLAG(res & 0x10000, F_CF);
- CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
-
- /* calculate the carry chain SEE NOTE AT TOP. */
- cc = (s & d) | ((~res) & (s | d));
- CONDITIONAL_SET_FLAG(XOR2(cc >> 14), F_OF);
- CONDITIONAL_SET_FLAG(cc & 0x8, F_AF);
- return (u16)res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the ADC instruction and side effects.
-****************************************************************************/
-u32 adc_long(u32 d, u32 s)
-{
- register u32 lo; /* all operands in native machine order */
- register u32 hi;
- register u32 res;
- register u32 cc;
-
- if (ACCESS_FLAG(F_CF)) {
- lo = 1 + (d & 0xFFFF) + (s & 0xFFFF);
- res = 1 + d + s;
- }
- else {
- lo = (d & 0xFFFF) + (s & 0xFFFF);
- res = d + s;
- }
- hi = (lo >> 16) + (d >> 16) + (s >> 16);
-
- CONDITIONAL_SET_FLAG(hi & 0x10000, F_CF);
- CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
-
- /* calculate the carry chain SEE NOTE AT TOP. */
- cc = (s & d) | ((~res) & (s | d));
- CONDITIONAL_SET_FLAG(XOR2(cc >> 30), F_OF);
- CONDITIONAL_SET_FLAG(cc & 0x8, F_AF);
- return res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the ADD instruction and side effects.
-****************************************************************************/
-u8 add_byte(u8 d, u8 s)
-{
- register u32 res; /* all operands in native machine order */
- register u32 cc;
-
- res = d + s;
- CONDITIONAL_SET_FLAG(res & 0x100, F_CF);
- CONDITIONAL_SET_FLAG((res & 0xff) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(res & 0x80, F_SF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
-
- /* calculate the carry chain SEE NOTE AT TOP. */
- cc = (s & d) | ((~res) & (s | d));
- CONDITIONAL_SET_FLAG(XOR2(cc >> 6), F_OF);
- CONDITIONAL_SET_FLAG(cc & 0x8, F_AF);
- return (u8)res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the ADD instruction and side effects.
-****************************************************************************/
-u16 add_word(u16 d, u16 s)
-{
- register u32 res; /* all operands in native machine order */
- register u32 cc;
-
- res = d + s;
- CONDITIONAL_SET_FLAG(res & 0x10000, F_CF);
- CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
-
- /* calculate the carry chain SEE NOTE AT TOP. */
- cc = (s & d) | ((~res) & (s | d));
- CONDITIONAL_SET_FLAG(XOR2(cc >> 14), F_OF);
- CONDITIONAL_SET_FLAG(cc & 0x8, F_AF);
- return (u16)res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the ADD instruction and side effects.
-****************************************************************************/
-u32 add_long(u32 d, u32 s)
-{
- register u32 lo; /* all operands in native machine order */
- register u32 hi;
- register u32 res;
- register u32 cc;
-
- lo = (d & 0xFFFF) + (s & 0xFFFF);
- res = d + s;
- hi = (lo >> 16) + (d >> 16) + (s >> 16);
-
- CONDITIONAL_SET_FLAG(hi & 0x10000, F_CF);
- CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
-
- /* calculate the carry chain SEE NOTE AT TOP. */
- cc = (s & d) | ((~res) & (s | d));
- CONDITIONAL_SET_FLAG(XOR2(cc >> 30), F_OF);
- CONDITIONAL_SET_FLAG(cc & 0x8, F_AF);
-
- return res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the AND instruction and side effects.
-****************************************************************************/
-u8 and_byte(u8 d, u8 s)
-{
- register u8 res; /* all operands in native machine order */
-
- res = d & s;
-
- /* set the flags */
- CLEAR_FLAG(F_OF);
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_AF);
- CONDITIONAL_SET_FLAG(res & 0x80, F_SF);
- CONDITIONAL_SET_FLAG(res == 0, F_ZF);
- CONDITIONAL_SET_FLAG(PARITY(res), F_PF);
- return res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the AND instruction and side effects.
-****************************************************************************/
-u16 and_word(u16 d, u16 s)
-{
- register u16 res; /* all operands in native machine order */
-
- res = d & s;
-
- /* set the flags */
- CLEAR_FLAG(F_OF);
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_AF);
- CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);
- CONDITIONAL_SET_FLAG(res == 0, F_ZF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
- return res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the AND instruction and side effects.
-****************************************************************************/
-u32 and_long(u32 d, u32 s)
-{
- register u32 res; /* all operands in native machine order */
-
- res = d & s;
-
- /* set the flags */
- CLEAR_FLAG(F_OF);
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_AF);
- CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
- CONDITIONAL_SET_FLAG(res == 0, F_ZF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
- return res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the CMP instruction and side effects.
-****************************************************************************/
-u8 cmp_byte(u8 d, u8 s)
-{
- register u32 res; /* all operands in native machine order */
- register u32 bc;
-
- res = d - s;
- CLEAR_FLAG(F_CF);
- CONDITIONAL_SET_FLAG(res & 0x80, F_SF);
- CONDITIONAL_SET_FLAG((res & 0xff) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
-
- /* calculate the borrow chain. See note at top */
- bc = (res & (~d | s)) | (~d & s);
- CONDITIONAL_SET_FLAG(bc & 0x80, F_CF);
- CONDITIONAL_SET_FLAG(XOR2(bc >> 6), F_OF);
- CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);
- return d;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the CMP instruction and side effects.
-****************************************************************************/
-u16 cmp_word(u16 d, u16 s)
-{
- register u32 res; /* all operands in native machine order */
- register u32 bc;
-
- res = d - s;
- CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);
- CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
-
- /* calculate the borrow chain. See note at top */
- bc = (res & (~d | s)) | (~d & s);
- CONDITIONAL_SET_FLAG(bc & 0x8000, F_CF);
- CONDITIONAL_SET_FLAG(XOR2(bc >> 14), F_OF);
- CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);
- return d;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the CMP instruction and side effects.
-****************************************************************************/
-u32 cmp_long(u32 d, u32 s)
-{
- register u32 res; /* all operands in native machine order */
- register u32 bc;
-
- res = d - s;
- CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
- CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
-
- /* calculate the borrow chain. See note at top */
- bc = (res & (~d | s)) | (~d & s);
- CONDITIONAL_SET_FLAG(bc & 0x80000000, F_CF);
- CONDITIONAL_SET_FLAG(XOR2(bc >> 30), F_OF);
- CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);
- return d;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the DAA instruction and side effects.
-****************************************************************************/
-u8 daa_byte(u8 d)
-{
- u32 res = d;
- if ((d & 0xf) > 9 || ACCESS_FLAG(F_AF)) {
- res += 6;
- SET_FLAG(F_AF);
- }
- if (res > 0x9F || ACCESS_FLAG(F_CF)) {
- res += 0x60;
- SET_FLAG(F_CF);
- }
- CONDITIONAL_SET_FLAG(res & 0x80, F_SF);
- CONDITIONAL_SET_FLAG((res & 0xFF) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
- return (u8)res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the DAS instruction and side effects.
-****************************************************************************/
-u8 das_byte(u8 d)
-{
- if ((d & 0xf) > 9 || ACCESS_FLAG(F_AF)) {
- d -= 6;
- SET_FLAG(F_AF);
- }
- if (d > 0x9F || ACCESS_FLAG(F_CF)) {
- d -= 0x60;
- SET_FLAG(F_CF);
- }
- CONDITIONAL_SET_FLAG(d & 0x80, F_SF);
- CONDITIONAL_SET_FLAG(d == 0, F_ZF);
- CONDITIONAL_SET_FLAG(PARITY(d & 0xff), F_PF);
- return d;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the DEC instruction and side effects.
-****************************************************************************/
-u8 dec_byte(u8 d)
-{
- register u32 res; /* all operands in native machine order */
- register u32 bc;
-
- res = d - 1;
- CONDITIONAL_SET_FLAG(res & 0x80, F_SF);
- CONDITIONAL_SET_FLAG((res & 0xff) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
-
- /* calculate the borrow chain. See note at top */
- /* based on sub_byte, uses s==1. */
- bc = (res & (~d | 1)) | (~d & 1);
- /* carry flag unchanged */
- CONDITIONAL_SET_FLAG(XOR2(bc >> 6), F_OF);
- CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);
- return (u8)res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the DEC instruction and side effects.
-****************************************************************************/
-u16 dec_word(u16 d)
-{
- register u32 res; /* all operands in native machine order */
- register u32 bc;
-
- res = d - 1;
- CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);
- CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
-
- /* calculate the borrow chain. See note at top */
- /* based on the sub_byte routine, with s==1 */
- bc = (res & (~d | 1)) | (~d & 1);
- /* carry flag unchanged */
- CONDITIONAL_SET_FLAG(XOR2(bc >> 14), F_OF);
- CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);
- return (u16)res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the DEC instruction and side effects.
-****************************************************************************/
-u32 dec_long(u32 d)
-{
- register u32 res; /* all operands in native machine order */
- register u32 bc;
-
- res = d - 1;
-
- CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
- CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
-
- /* calculate the borrow chain. See note at top */
- bc = (res & (~d | 1)) | (~d & 1);
- /* carry flag unchanged */
- CONDITIONAL_SET_FLAG(XOR2(bc >> 30), F_OF);
- CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);
- return res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the INC instruction and side effects.
-****************************************************************************/
-u8 inc_byte(u8 d)
-{
- register u32 res; /* all operands in native machine order */
- register u32 cc;
-
- res = d + 1;
- CONDITIONAL_SET_FLAG((res & 0xff) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(res & 0x80, F_SF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
-
- /* calculate the carry chain SEE NOTE AT TOP. */
- cc = ((1 & d) | (~res)) & (1 | d);
- CONDITIONAL_SET_FLAG(XOR2(cc >> 6), F_OF);
- CONDITIONAL_SET_FLAG(cc & 0x8, F_AF);
- return (u8)res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the INC instruction and side effects.
-****************************************************************************/
-u16 inc_word(u16 d)
-{
- register u32 res; /* all operands in native machine order */
- register u32 cc;
-
- res = d + 1;
- CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
-
- /* calculate the carry chain SEE NOTE AT TOP. */
- cc = (1 & d) | ((~res) & (1 | d));
- CONDITIONAL_SET_FLAG(XOR2(cc >> 14), F_OF);
- CONDITIONAL_SET_FLAG(cc & 0x8, F_AF);
- return (u16)res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the INC instruction and side effects.
-****************************************************************************/
-u32 inc_long(u32 d)
-{
- register u32 res; /* all operands in native machine order */
- register u32 cc;
-
- res = d + 1;
- CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
-
- /* calculate the carry chain SEE NOTE AT TOP. */
- cc = (1 & d) | ((~res) & (1 | d));
- CONDITIONAL_SET_FLAG(XOR2(cc >> 30), F_OF);
- CONDITIONAL_SET_FLAG(cc & 0x8, F_AF);
- return res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the OR instruction and side effects.
-****************************************************************************/
-u8 or_byte(u8 d, u8 s)
-{
- register u8 res; /* all operands in native machine order */
-
- res = d | s;
- CLEAR_FLAG(F_OF);
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_AF);
- CONDITIONAL_SET_FLAG(res & 0x80, F_SF);
- CONDITIONAL_SET_FLAG(res == 0, F_ZF);
- CONDITIONAL_SET_FLAG(PARITY(res), F_PF);
- return res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the OR instruction and side effects.
-****************************************************************************/
-u16 or_word(u16 d, u16 s)
-{
- register u16 res; /* all operands in native machine order */
-
- res = d | s;
- /* set the carry flag to be bit 8 */
- CLEAR_FLAG(F_OF);
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_AF);
- CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);
- CONDITIONAL_SET_FLAG(res == 0, F_ZF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
- return res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the OR instruction and side effects.
-****************************************************************************/
-u32 or_long(u32 d, u32 s)
-{
- register u32 res; /* all operands in native machine order */
-
- res = d | s;
-
- /* set the carry flag to be bit 8 */
- CLEAR_FLAG(F_OF);
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_AF);
- CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
- CONDITIONAL_SET_FLAG(res == 0, F_ZF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
- return res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the OR instruction and side effects.
-****************************************************************************/
-u8 neg_byte(u8 s)
-{
- register u8 res;
- register u8 bc;
-
- CONDITIONAL_SET_FLAG(s != 0, F_CF);
- res = (u8)-s;
- CONDITIONAL_SET_FLAG((res & 0xff) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(res & 0x80, F_SF);
- CONDITIONAL_SET_FLAG(PARITY(res), F_PF);
- /* calculate the borrow chain --- modified such that d=0.
- substitutiing d=0 into bc= res&(~d|s)|(~d&s);
- (the one used for sub) and simplifying, since ~d=0xff...,
- ~d|s == 0xffff..., and res&0xfff... == res. Similarly
- ~d&s == s. So the simplified result is: */
- bc = res | s;
- CONDITIONAL_SET_FLAG(XOR2(bc >> 6), F_OF);
- CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);
- return res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the OR instruction and side effects.
-****************************************************************************/
-u16 neg_word(u16 s)
-{
- register u16 res;
- register u16 bc;
-
- CONDITIONAL_SET_FLAG(s != 0, F_CF);
- res = (u16)-s;
- CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
-
- /* calculate the borrow chain --- modified such that d=0.
- substitutiing d=0 into bc= res&(~d|s)|(~d&s);
- (the one used for sub) and simplifying, since ~d=0xff...,
- ~d|s == 0xffff..., and res&0xfff... == res. Similarly
- ~d&s == s. So the simplified result is: */
- bc = res | s;
- CONDITIONAL_SET_FLAG(XOR2(bc >> 14), F_OF);
- CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);
- return res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the OR instruction and side effects.
-****************************************************************************/
-u32 neg_long(u32 s)
-{
- register u32 res;
- register u32 bc;
-
- CONDITIONAL_SET_FLAG(s != 0, F_CF);
- res = (u32)-s;
- CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
-
- /* calculate the borrow chain --- modified such that d=0.
- substitutiing d=0 into bc= res&(~d|s)|(~d&s);
- (the one used for sub) and simplifying, since ~d=0xff...,
- ~d|s == 0xffff..., and res&0xfff... == res. Similarly
- ~d&s == s. So the simplified result is: */
- bc = res | s;
- CONDITIONAL_SET_FLAG(XOR2(bc >> 30), F_OF);
- CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);
- return res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the NOT instruction and side effects.
-****************************************************************************/
-u8 not_byte(u8 s)
-{
- return ~s;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the NOT instruction and side effects.
-****************************************************************************/
-u16 not_word(u16 s)
-{
- return ~s;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the NOT instruction and side effects.
-****************************************************************************/
-u32 not_long(u32 s)
-{
- return ~s;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the RCL instruction and side effects.
-****************************************************************************/
-u8 rcl_byte(u8 d, u8 s)
-{
- register unsigned int res, cnt, mask, cf;
-
- /* s is the rotate distance. It varies from 0 - 8. */
- /* have
-
- CF B_7 B_6 B_5 B_4 B_3 B_2 B_1 B_0
-
- want to rotate through the carry by "s" bits. We could
- loop, but that's inefficient. So the width is 9,
- and we split into three parts:
-
- The new carry flag (was B_n)
- the stuff in B_n-1 .. B_0
- the stuff in B_7 .. B_n+1
-
- The new rotate is done mod 9, and given this,
- for a rotation of n bits (mod 9) the new carry flag is
- then located n bits from the MSB. The low part is
- then shifted up cnt bits, and the high part is or'd
- in. Using CAPS for new values, and lowercase for the
- original values, this can be expressed as:
-
- IF n > 0
- 1) CF <- b_(8-n)
- 2) B_(7) .. B_(n) <- b_(8-(n+1)) .. b_0
- 3) B_(n-1) <- cf
- 4) B_(n-2) .. B_0 <- b_7 .. b_(8-(n-1))
- */
- res = d;
- if ((cnt = s % 9) != 0) {
- /* extract the new CARRY FLAG. */
- /* CF <- b_(8-n) */
- cf = (d >> (8 - cnt)) & 0x1;
-
- /* get the low stuff which rotated
- into the range B_7 .. B_cnt */
- /* B_(7) .. B_(n) <- b_(8-(n+1)) .. b_0 */
- /* note that the right hand side done by the mask */
- res = (d << cnt) & 0xff;
-
- /* now the high stuff which rotated around
- into the positions B_cnt-2 .. B_0 */
- /* B_(n-2) .. B_0 <- b_7 .. b_(8-(n-1)) */
- /* shift it downward, 7-(n-2) = 9-n positions.
- and mask off the result before or'ing in.
- */
- mask = (1 << (cnt - 1)) - 1;
- res |= (d >> (9 - cnt)) & mask;
-
- /* if the carry flag was set, or it in. */
- if (ACCESS_FLAG(F_CF)) { /* carry flag is set */
- /* B_(n-1) <- cf */
- res |= 1 << (cnt - 1);
- }
- /* set the new carry flag, based on the variable "cf" */
- CONDITIONAL_SET_FLAG(cf, F_CF);
- /* OVERFLOW is set *IFF* cnt==1, then it is the
- xor of CF and the most significant bit. Blecck. */
- /* parenthesized this expression since it appears to
- be causing OF to be misset */
- CONDITIONAL_SET_FLAG(cnt == 1 && XOR2(cf + ((res >> 6) & 0x2)),
- F_OF);
-
- }
- return (u8)res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the RCL instruction and side effects.
-****************************************************************************/
-u16 rcl_word(u16 d, u8 s)
-{
- register unsigned int res, cnt, mask, cf;
-
- res = d;
- if ((cnt = s % 17) != 0) {
- cf = (d >> (16 - cnt)) & 0x1;
- res = (d << cnt) & 0xffff;
- mask = (1 << (cnt - 1)) - 1;
- res |= (d >> (17 - cnt)) & mask;
- if (ACCESS_FLAG(F_CF)) {
- res |= 1 << (cnt - 1);
- }
- CONDITIONAL_SET_FLAG(cf, F_CF);
- CONDITIONAL_SET_FLAG(cnt == 1 && XOR2(cf + ((res >> 14) & 0x2)),
- F_OF);
- }
- return (u16)res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the RCL instruction and side effects.
-****************************************************************************/
-u32 rcl_long(u32 d, u8 s)
-{
- register u32 res, cnt, mask, cf;
-
- res = d;
- if ((cnt = s % 33) != 0) {
- cf = (d >> (32 - cnt)) & 0x1;
- res = (d << cnt) & 0xffffffff;
- mask = (1 << (cnt - 1)) - 1;
- res |= (d >> (33 - cnt)) & mask;
- if (ACCESS_FLAG(F_CF)) { /* carry flag is set */
- res |= 1 << (cnt - 1);
- }
- CONDITIONAL_SET_FLAG(cf, F_CF);
- CONDITIONAL_SET_FLAG(cnt == 1 && XOR2(cf + ((res >> 30) & 0x2)),
- F_OF);
- }
- return res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the RCR instruction and side effects.
-****************************************************************************/
-u8 rcr_byte(u8 d, u8 s)
-{
- u32 res, cnt;
- u32 mask, cf, ocf = 0;
-
- /* rotate right through carry */
- /*
- s is the rotate distance. It varies from 0 - 8.
- d is the byte object rotated.
-
- have
-
- CF B_7 B_6 B_5 B_4 B_3 B_2 B_1 B_0
-
- The new rotate is done mod 9, and given this,
- for a rotation of n bits (mod 9) the new carry flag is
- then located n bits from the LSB. The low part is
- then shifted up cnt bits, and the high part is or'd
- in. Using CAPS for new values, and lowercase for the
- original values, this can be expressed as:
-
- IF n > 0
- 1) CF <- b_(n-1)
- 2) B_(8-(n+1)) .. B_(0) <- b_(7) .. b_(n)
- 3) B_(8-n) <- cf
- 4) B_(7) .. B_(8-(n-1)) <- b_(n-2) .. b_(0)
- */
- res = d;
- if ((cnt = s % 9) != 0) {
- /* extract the new CARRY FLAG. */
- /* CF <- b_(n-1) */
- if (cnt == 1) {
- cf = d & 0x1;
- /* note hackery here. Access_flag(..) evaluates to either
- 0 if flag not set
- non-zero if flag is set.
- doing access_flag(..) != 0 casts that into either
- 0..1 in any representation of the flags register
- (i.e. packed bit array or unpacked.)
- */
- ocf = ACCESS_FLAG(F_CF) != 0;
- } else
- cf = (d >> (cnt - 1)) & 0x1;
-
- /* B_(8-(n+1)) .. B_(0) <- b_(7) .. b_n */
- /* note that the right hand side done by the mask
- This is effectively done by shifting the
- object to the right. The result must be masked,
- in case the object came in and was treated
- as a negative number. Needed??? */
-
- mask = (1 << (8 - cnt)) - 1;
- res = (d >> cnt) & mask;
-
- /* now the high stuff which rotated around
- into the positions B_cnt-2 .. B_0 */
- /* B_(7) .. B_(8-(n-1)) <- b_(n-2) .. b_(0) */
- /* shift it downward, 7-(n-2) = 9-n positions.
- and mask off the result before or'ing in.
- */
- res |= (d << (9 - cnt));
-
- /* if the carry flag was set, or it in. */
- if (ACCESS_FLAG(F_CF)) { /* carry flag is set */
- /* B_(8-n) <- cf */
- res |= 1 << (8 - cnt);
- }
- /* set the new carry flag, based on the variable "cf" */
- CONDITIONAL_SET_FLAG(cf, F_CF);
- /* OVERFLOW is set *IFF* cnt==1, then it is the
- xor of CF and the most significant bit. Blecck. */
- /* parenthesized... */
- if (cnt == 1) {
- CONDITIONAL_SET_FLAG(XOR2(ocf + ((d >> 6) & 0x2)),
- F_OF);
- }
- }
- return (u8)res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the RCR instruction and side effects.
-****************************************************************************/
-u16 rcr_word(u16 d, u8 s)
-{
- u32 res, cnt;
- u32 mask, cf, ocf = 0;
-
- /* rotate right through carry */
- res = d;
- if ((cnt = s % 17) != 0) {
- if (cnt == 1) {
- cf = d & 0x1;
- ocf = ACCESS_FLAG(F_CF) != 0;
- } else
- cf = (d >> (cnt - 1)) & 0x1;
- mask = (1 << (16 - cnt)) - 1;
- res = (d >> cnt) & mask;
- res |= (d << (17 - cnt));
- if (ACCESS_FLAG(F_CF)) {
- res |= 1 << (16 - cnt);
- }
- CONDITIONAL_SET_FLAG(cf, F_CF);
- if (cnt == 1) {
- CONDITIONAL_SET_FLAG(XOR2(ocf + ((d >> 14) & 0x2)),
- F_OF);
- }
- }
- return (u16)res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the RCR instruction and side effects.
-****************************************************************************/
-u32 rcr_long(u32 d, u8 s)
-{
- u32 res, cnt;
- u32 mask, cf, ocf = 0;
-
- /* rotate right through carry */
- res = d;
- if ((cnt = s % 33) != 0) {
- if (cnt == 1) {
- cf = d & 0x1;
- ocf = ACCESS_FLAG(F_CF) != 0;
- } else
- cf = (d >> (cnt - 1)) & 0x1;
- mask = (1 << (32 - cnt)) - 1;
- res = (d >> cnt) & mask;
- if (cnt != 1)
- res |= (d << (33 - cnt));
- if (ACCESS_FLAG(F_CF)) { /* carry flag is set */
- res |= 1 << (32 - cnt);
- }
- CONDITIONAL_SET_FLAG(cf, F_CF);
- if (cnt == 1) {
- CONDITIONAL_SET_FLAG(XOR2(ocf + ((d >> 30) & 0x2)),
- F_OF);
- }
- }
- return res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the ROL instruction and side effects.
-****************************************************************************/
-u8 rol_byte(u8 d, u8 s)
-{
- register unsigned int res, cnt, mask;
-
- /* rotate left */
- /*
- s is the rotate distance. It varies from 0 - 8.
- d is the byte object rotated.
-
- have
-
- CF B_7 ... B_0
-
- The new rotate is done mod 8.
- Much simpler than the "rcl" or "rcr" operations.
-
- IF n > 0
- 1) B_(7) .. B_(n) <- b_(8-(n+1)) .. b_(0)
- 2) B_(n-1) .. B_(0) <- b_(7) .. b_(8-n)
- */
- res = d;
- if ((cnt = s % 8) != 0) {
- /* B_(7) .. B_(n) <- b_(8-(n+1)) .. b_(0) */
- res = (d << cnt);
-
- /* B_(n-1) .. B_(0) <- b_(7) .. b_(8-n) */
- mask = (1 << cnt) - 1;
- res |= (d >> (8 - cnt)) & mask;
-
- /* set the new carry flag, Note that it is the low order
- bit of the result!!! */
- CONDITIONAL_SET_FLAG(res & 0x1, F_CF);
- /* OVERFLOW is set *IFF* s==1, then it is the
- xor of CF and the most significant bit. Blecck. */
- CONDITIONAL_SET_FLAG(s == 1 &&
- XOR2((res & 0x1) + ((res >> 6) & 0x2)),
- F_OF);
- } if (s != 0) {
- /* set the new carry flag, Note that it is the low order
- bit of the result!!! */
- CONDITIONAL_SET_FLAG(res & 0x1, F_CF);
- }
- return (u8)res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the ROL instruction and side effects.
-****************************************************************************/
-u16 rol_word(u16 d, u8 s)
-{
- register unsigned int res, cnt, mask;
-
- res = d;
- if ((cnt = s % 16) != 0) {
- res = (d << cnt);
- mask = (1 << cnt) - 1;
- res |= (d >> (16 - cnt)) & mask;
- CONDITIONAL_SET_FLAG(res & 0x1, F_CF);
- CONDITIONAL_SET_FLAG(s == 1 &&
- XOR2((res & 0x1) + ((res >> 14) & 0x2)),
- F_OF);
- } if (s != 0) {
- /* set the new carry flag, Note that it is the low order
- bit of the result!!! */
- CONDITIONAL_SET_FLAG(res & 0x1, F_CF);
- }
- return (u16)res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the ROL instruction and side effects.
-****************************************************************************/
-u32 rol_long(u32 d, u8 s)
-{
- register u32 res, cnt, mask;
-
- res = d;
- if ((cnt = s % 32) != 0) {
- res = (d << cnt);
- mask = (1 << cnt) - 1;
- res |= (d >> (32 - cnt)) & mask;
- CONDITIONAL_SET_FLAG(res & 0x1, F_CF);
- CONDITIONAL_SET_FLAG(s == 1 &&
- XOR2((res & 0x1) + ((res >> 30) & 0x2)),
- F_OF);
- } if (s != 0) {
- /* set the new carry flag, Note that it is the low order
- bit of the result!!! */
- CONDITIONAL_SET_FLAG(res & 0x1, F_CF);
- }
- return res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the ROR instruction and side effects.
-****************************************************************************/
-u8 ror_byte(u8 d, u8 s)
-{
- register unsigned int res, cnt, mask;
-
- /* rotate right */
- /*
- s is the rotate distance. It varies from 0 - 8.
- d is the byte object rotated.
-
- have
-
- B_7 ... B_0
-
- The rotate is done mod 8.
-
- IF n > 0
- 1) B_(8-(n+1)) .. B_(0) <- b_(7) .. b_(n)
- 2) B_(7) .. B_(8-n) <- b_(n-1) .. b_(0)
- */
- res = d;
- if ((cnt = s % 8) != 0) { /* not a typo, do nada if cnt==0 */
- /* B_(7) .. B_(8-n) <- b_(n-1) .. b_(0) */
- res = (d << (8 - cnt));
-
- /* B_(8-(n+1)) .. B_(0) <- b_(7) .. b_(n) */
- mask = (1 << (8 - cnt)) - 1;
- res |= (d >> (cnt)) & mask;
-
- /* set the new carry flag, Note that it is the low order
- bit of the result!!! */
- CONDITIONAL_SET_FLAG(res & 0x80, F_CF);
- /* OVERFLOW is set *IFF* s==1, then it is the
- xor of the two most significant bits. Blecck. */
- CONDITIONAL_SET_FLAG(s == 1 && XOR2(res >> 6), F_OF);
- } else if (s != 0) {
- /* set the new carry flag, Note that it is the low order
- bit of the result!!! */
- CONDITIONAL_SET_FLAG(res & 0x80, F_CF);
- }
- return (u8)res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the ROR instruction and side effects.
-****************************************************************************/
-u16 ror_word(u16 d, u8 s)
-{
- register unsigned int res, cnt, mask;
-
- res = d;
- if ((cnt = s % 16) != 0) {
- res = (d << (16 - cnt));
- mask = (1 << (16 - cnt)) - 1;
- res |= (d >> (cnt)) & mask;
- CONDITIONAL_SET_FLAG(res & 0x8000, F_CF);
- CONDITIONAL_SET_FLAG(s == 1 && XOR2(res >> 14), F_OF);
- } else if (s != 0) {
- /* set the new carry flag, Note that it is the low order
- bit of the result!!! */
- CONDITIONAL_SET_FLAG(res & 0x8000, F_CF);
- }
- return (u16)res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the ROR instruction and side effects.
-****************************************************************************/
-u32 ror_long(u32 d, u8 s)
-{
- register u32 res, cnt, mask;
-
- res = d;
- if ((cnt = s % 32) != 0) {
- res = (d << (32 - cnt));
- mask = (1 << (32 - cnt)) - 1;
- res |= (d >> (cnt)) & mask;
- CONDITIONAL_SET_FLAG(res & 0x80000000, F_CF);
- CONDITIONAL_SET_FLAG(s == 1 && XOR2(res >> 30), F_OF);
- } else if (s != 0) {
- /* set the new carry flag, Note that it is the low order
- bit of the result!!! */
- CONDITIONAL_SET_FLAG(res & 0x80000000, F_CF);
- }
- return res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the SHL instruction and side effects.
-****************************************************************************/
-u8 shl_byte(u8 d, u8 s)
-{
- unsigned int cnt, res, cf;
-
- if (s < 8) {
- cnt = s % 8;
-
- /* last bit shifted out goes into carry flag */
- if (cnt > 0) {
- res = d << cnt;
- cf = d & (1 << (8 - cnt));
- CONDITIONAL_SET_FLAG(cf, F_CF);
- CONDITIONAL_SET_FLAG((res & 0xff) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(res & 0x80, F_SF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
- } else {
- res = (u8) d;
- }
-
- if (cnt == 1) {
- /* Needs simplification. */
- CONDITIONAL_SET_FLAG(
- (((res & 0x80) == 0x80) ^
- (ACCESS_FLAG(F_CF) != 0)),
- /* was (M.x86.R_FLG&F_CF)==F_CF)), */
- F_OF);
- } else {
- CLEAR_FLAG(F_OF);
- }
- } else {
- res = 0;
- CONDITIONAL_SET_FLAG((d << (s-1)) & 0x80, F_CF);
- CLEAR_FLAG(F_OF);
- CLEAR_FLAG(F_SF);
- SET_FLAG(F_PF);
- SET_FLAG(F_ZF);
- }
- return (u8)res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the SHL instruction and side effects.
-****************************************************************************/
-u16 shl_word(u16 d, u8 s)
-{
- unsigned int cnt, res, cf;
-
- if (s < 16) {
- cnt = s % 16;
- if (cnt > 0) {
- res = d << cnt;
- cf = d & (1 << (16 - cnt));
- CONDITIONAL_SET_FLAG(cf, F_CF);
- CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
- } else {
- res = (u16) d;
- }
-
- if (cnt == 1) {
- CONDITIONAL_SET_FLAG(
- (((res & 0x8000) == 0x8000) ^
- (ACCESS_FLAG(F_CF) != 0)),
- F_OF);
- } else {
- CLEAR_FLAG(F_OF);
- }
- } else {
- res = 0;
- CONDITIONAL_SET_FLAG((d << (s-1)) & 0x8000, F_CF);
- CLEAR_FLAG(F_OF);
- CLEAR_FLAG(F_SF);
- SET_FLAG(F_PF);
- SET_FLAG(F_ZF);
- }
- return (u16)res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the SHL instruction and side effects.
-****************************************************************************/
-u32 shl_long(u32 d, u8 s)
-{
- unsigned int cnt, res, cf;
-
- if (s < 32) {
- cnt = s % 32;
- if (cnt > 0) {
- res = d << cnt;
- cf = d & (1 << (32 - cnt));
- CONDITIONAL_SET_FLAG(cf, F_CF);
- CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
- } else {
- res = d;
- }
- if (cnt == 1) {
- CONDITIONAL_SET_FLAG((((res & 0x80000000) == 0x80000000) ^
- (ACCESS_FLAG(F_CF) != 0)), F_OF);
- } else {
- CLEAR_FLAG(F_OF);
- }
- } else {
- res = 0;
- CONDITIONAL_SET_FLAG((d << (s-1)) & 0x80000000, F_CF);
- CLEAR_FLAG(F_OF);
- CLEAR_FLAG(F_SF);
- SET_FLAG(F_PF);
- SET_FLAG(F_ZF);
- }
- return res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the SHR instruction and side effects.
-****************************************************************************/
-u8 shr_byte(u8 d, u8 s)
-{
- unsigned int cnt, res, cf;
-
- if (s < 8) {
- cnt = s % 8;
- if (cnt > 0) {
- cf = d & (1 << (cnt - 1));
- res = d >> cnt;
- CONDITIONAL_SET_FLAG(cf, F_CF);
- CONDITIONAL_SET_FLAG((res & 0xff) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(res & 0x80, F_SF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
- } else {
- res = (u8) d;
- }
-
- if (cnt == 1) {
- CONDITIONAL_SET_FLAG(XOR2(res >> 6), F_OF);
- } else {
- CLEAR_FLAG(F_OF);
- }
- } else {
- res = 0;
- CONDITIONAL_SET_FLAG((d >> (s-1)) & 0x1, F_CF);
- CLEAR_FLAG(F_OF);
- CLEAR_FLAG(F_SF);
- SET_FLAG(F_PF);
- SET_FLAG(F_ZF);
- }
- return (u8)res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the SHR instruction and side effects.
-****************************************************************************/
-u16 shr_word(u16 d, u8 s)
-{
- unsigned int cnt, res, cf;
-
- if (s < 16) {
- cnt = s % 16;
- if (cnt > 0) {
- cf = d & (1 << (cnt - 1));
- res = d >> cnt;
- CONDITIONAL_SET_FLAG(cf, F_CF);
- CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
- } else {
- res = d;
- }
-
- if (cnt == 1) {
- CONDITIONAL_SET_FLAG(XOR2(res >> 14), F_OF);
- } else {
- CLEAR_FLAG(F_OF);
- }
- } else {
- res = 0;
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_OF);
- SET_FLAG(F_ZF);
- CLEAR_FLAG(F_SF);
- CLEAR_FLAG(F_PF);
- }
- return (u16)res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the SHR instruction and side effects.
-****************************************************************************/
-u32 shr_long(u32 d, u8 s)
-{
- unsigned int cnt, res, cf;
-
- if (s < 32) {
- cnt = s % 32;
- if (cnt > 0) {
- cf = d & (1 << (cnt - 1));
- res = d >> cnt;
- CONDITIONAL_SET_FLAG(cf, F_CF);
- CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
- } else {
- res = d;
- }
- if (cnt == 1) {
- CONDITIONAL_SET_FLAG(XOR2(res >> 30), F_OF);
- } else {
- CLEAR_FLAG(F_OF);
- }
- } else {
- res = 0;
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_OF);
- SET_FLAG(F_ZF);
- CLEAR_FLAG(F_SF);
- CLEAR_FLAG(F_PF);
- }
- return res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the SAR instruction and side effects.
-****************************************************************************/
-u8 sar_byte(u8 d, u8 s)
-{
- unsigned int cnt, res, cf, mask, sf;
-
- res = d;
- sf = d & 0x80;
- cnt = s % 8;
- if (cnt > 0 && cnt < 8) {
- mask = (1 << (8 - cnt)) - 1;
- cf = d & (1 << (cnt - 1));
- res = (d >> cnt) & mask;
- CONDITIONAL_SET_FLAG(cf, F_CF);
- if (sf) {
- res |= ~mask;
- }
- CONDITIONAL_SET_FLAG((res & 0xff) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
- CONDITIONAL_SET_FLAG(res & 0x80, F_SF);
- } else if (cnt >= 8) {
- if (sf) {
- res = 0xff;
- SET_FLAG(F_CF);
- CLEAR_FLAG(F_ZF);
- SET_FLAG(F_SF);
- SET_FLAG(F_PF);
- } else {
- res = 0;
- CLEAR_FLAG(F_CF);
- SET_FLAG(F_ZF);
- CLEAR_FLAG(F_SF);
- CLEAR_FLAG(F_PF);
- }
- }
- return (u8)res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the SAR instruction and side effects.
-****************************************************************************/
-u16 sar_word(u16 d, u8 s)
-{
- unsigned int cnt, res, cf, mask, sf;
-
- sf = d & 0x8000;
- cnt = s % 16;
- res = d;
- if (cnt > 0 && cnt < 16) {
- mask = (1 << (16 - cnt)) - 1;
- cf = d & (1 << (cnt - 1));
- res = (d >> cnt) & mask;
- CONDITIONAL_SET_FLAG(cf, F_CF);
- if (sf) {
- res |= ~mask;
- }
- CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
- } else if (cnt >= 16) {
- if (sf) {
- res = 0xffff;
- SET_FLAG(F_CF);
- CLEAR_FLAG(F_ZF);
- SET_FLAG(F_SF);
- SET_FLAG(F_PF);
- } else {
- res = 0;
- CLEAR_FLAG(F_CF);
- SET_FLAG(F_ZF);
- CLEAR_FLAG(F_SF);
- CLEAR_FLAG(F_PF);
- }
- }
- return (u16)res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the SAR instruction and side effects.
-****************************************************************************/
-u32 sar_long(u32 d, u8 s)
-{
- u32 cnt, res, cf, mask, sf;
-
- sf = d & 0x80000000;
- cnt = s % 32;
- res = d;
- if (cnt > 0 && cnt < 32) {
- mask = (1 << (32 - cnt)) - 1;
- cf = d & (1 << (cnt - 1));
- res = (d >> cnt) & mask;
- CONDITIONAL_SET_FLAG(cf, F_CF);
- if (sf) {
- res |= ~mask;
- }
- CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
- } else if (cnt >= 32) {
- if (sf) {
- res = 0xffffffff;
- SET_FLAG(F_CF);
- CLEAR_FLAG(F_ZF);
- SET_FLAG(F_SF);
- SET_FLAG(F_PF);
- } else {
- res = 0;
- CLEAR_FLAG(F_CF);
- SET_FLAG(F_ZF);
- CLEAR_FLAG(F_SF);
- CLEAR_FLAG(F_PF);
- }
- }
- return res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the SHLD instruction and side effects.
-****************************************************************************/
-u16 shld_word (u16 d, u16 fill, u8 s)
-{
- unsigned int cnt, res, cf;
-
- if (s < 16) {
- cnt = s % 16;
- if (cnt > 0) {
- res = (d << cnt) | (fill >> (16-cnt));
- cf = d & (1 << (16 - cnt));
- CONDITIONAL_SET_FLAG(cf, F_CF);
- CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
- } else {
- res = d;
- }
- if (cnt == 1) {
- CONDITIONAL_SET_FLAG((((res & 0x8000) == 0x8000) ^
- (ACCESS_FLAG(F_CF) != 0)), F_OF);
- } else {
- CLEAR_FLAG(F_OF);
- }
- } else {
- res = 0;
- CONDITIONAL_SET_FLAG((d << (s-1)) & 0x8000, F_CF);
- CLEAR_FLAG(F_OF);
- CLEAR_FLAG(F_SF);
- SET_FLAG(F_PF);
- SET_FLAG(F_ZF);
- }
- return (u16)res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the SHLD instruction and side effects.
-****************************************************************************/
-u32 shld_long (u32 d, u32 fill, u8 s)
-{
- unsigned int cnt, res, cf;
-
- if (s < 32) {
- cnt = s % 32;
- if (cnt > 0) {
- res = (d << cnt) | (fill >> (32-cnt));
- cf = d & (1 << (32 - cnt));
- CONDITIONAL_SET_FLAG(cf, F_CF);
- CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
- } else {
- res = d;
- }
- if (cnt == 1) {
- CONDITIONAL_SET_FLAG((((res & 0x80000000) == 0x80000000) ^
- (ACCESS_FLAG(F_CF) != 0)), F_OF);
- } else {
- CLEAR_FLAG(F_OF);
- }
- } else {
- res = 0;
- CONDITIONAL_SET_FLAG((d << (s-1)) & 0x80000000, F_CF);
- CLEAR_FLAG(F_OF);
- CLEAR_FLAG(F_SF);
- SET_FLAG(F_PF);
- SET_FLAG(F_ZF);
- }
- return res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the SHRD instruction and side effects.
-****************************************************************************/
-u16 shrd_word (u16 d, u16 fill, u8 s)
-{
- unsigned int cnt, res, cf;
-
- if (s < 16) {
- cnt = s % 16;
- if (cnt > 0) {
- cf = d & (1 << (cnt - 1));
- res = (d >> cnt) | (fill << (16 - cnt));
- CONDITIONAL_SET_FLAG(cf, F_CF);
- CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
- } else {
- res = d;
- }
-
- if (cnt == 1) {
- CONDITIONAL_SET_FLAG(XOR2(res >> 14), F_OF);
- } else {
- CLEAR_FLAG(F_OF);
- }
- } else {
- res = 0;
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_OF);
- SET_FLAG(F_ZF);
- CLEAR_FLAG(F_SF);
- CLEAR_FLAG(F_PF);
- }
- return (u16)res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the SHRD instruction and side effects.
-****************************************************************************/
-u32 shrd_long (u32 d, u32 fill, u8 s)
-{
- unsigned int cnt, res, cf;
-
- if (s < 32) {
- cnt = s % 32;
- if (cnt > 0) {
- cf = d & (1 << (cnt - 1));
- res = (d >> cnt) | (fill << (32 - cnt));
- CONDITIONAL_SET_FLAG(cf, F_CF);
- CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
- } else {
- res = d;
- }
- if (cnt == 1) {
- CONDITIONAL_SET_FLAG(XOR2(res >> 30), F_OF);
- } else {
- CLEAR_FLAG(F_OF);
- }
- } else {
- res = 0;
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_OF);
- SET_FLAG(F_ZF);
- CLEAR_FLAG(F_SF);
- CLEAR_FLAG(F_PF);
- }
- return res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the SBB instruction and side effects.
-****************************************************************************/
-u8 sbb_byte(u8 d, u8 s)
-{
- register u32 res; /* all operands in native machine order */
- register u32 bc;
-
- if (ACCESS_FLAG(F_CF))
- res = d - s - 1;
- else
- res = d - s;
- CONDITIONAL_SET_FLAG(res & 0x80, F_SF);
- CONDITIONAL_SET_FLAG((res & 0xff) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
-
- /* calculate the borrow chain. See note at top */
- bc = (res & (~d | s)) | (~d & s);
- CONDITIONAL_SET_FLAG(bc & 0x80, F_CF);
- CONDITIONAL_SET_FLAG(XOR2(bc >> 6), F_OF);
- CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);
- return (u8)res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the SBB instruction and side effects.
-****************************************************************************/
-u16 sbb_word(u16 d, u16 s)
-{
- register u32 res; /* all operands in native machine order */
- register u32 bc;
-
- if (ACCESS_FLAG(F_CF))
- res = d - s - 1;
- else
- res = d - s;
- CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);
- CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
-
- /* calculate the borrow chain. See note at top */
- bc = (res & (~d | s)) | (~d & s);
- CONDITIONAL_SET_FLAG(bc & 0x8000, F_CF);
- CONDITIONAL_SET_FLAG(XOR2(bc >> 14), F_OF);
- CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);
- return (u16)res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the SBB instruction and side effects.
-****************************************************************************/
-u32 sbb_long(u32 d, u32 s)
-{
- register u32 res; /* all operands in native machine order */
- register u32 bc;
-
- if (ACCESS_FLAG(F_CF))
- res = d - s - 1;
- else
- res = d - s;
- CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
- CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
-
- /* calculate the borrow chain. See note at top */
- bc = (res & (~d | s)) | (~d & s);
- CONDITIONAL_SET_FLAG(bc & 0x80000000, F_CF);
- CONDITIONAL_SET_FLAG(XOR2(bc >> 30), F_OF);
- CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);
- return res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the SUB instruction and side effects.
-****************************************************************************/
-u8 sub_byte(u8 d, u8 s)
-{
- register u32 res; /* all operands in native machine order */
- register u32 bc;
-
- res = d - s;
- CONDITIONAL_SET_FLAG(res & 0x80, F_SF);
- CONDITIONAL_SET_FLAG((res & 0xff) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
-
- /* calculate the borrow chain. See note at top */
- bc = (res & (~d | s)) | (~d & s);
- CONDITIONAL_SET_FLAG(bc & 0x80, F_CF);
- CONDITIONAL_SET_FLAG(XOR2(bc >> 6), F_OF);
- CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);
- return (u8)res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the SUB instruction and side effects.
-****************************************************************************/
-u16 sub_word(u16 d, u16 s)
-{
- register u32 res; /* all operands in native machine order */
- register u32 bc;
-
- res = d - s;
- CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);
- CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
-
- /* calculate the borrow chain. See note at top */
- bc = (res & (~d | s)) | (~d & s);
- CONDITIONAL_SET_FLAG(bc & 0x8000, F_CF);
- CONDITIONAL_SET_FLAG(XOR2(bc >> 14), F_OF);
- CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);
- return (u16)res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the SUB instruction and side effects.
-****************************************************************************/
-u32 sub_long(u32 d, u32 s)
-{
- register u32 res; /* all operands in native machine order */
- register u32 bc;
-
- res = d - s;
- CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
- CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
-
- /* calculate the borrow chain. See note at top */
- bc = (res & (~d | s)) | (~d & s);
- CONDITIONAL_SET_FLAG(bc & 0x80000000, F_CF);
- CONDITIONAL_SET_FLAG(XOR2(bc >> 30), F_OF);
- CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);
- return res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the TEST instruction and side effects.
-****************************************************************************/
-void test_byte(u8 d, u8 s)
-{
- register u32 res; /* all operands in native machine order */
-
- res = d & s;
-
- CLEAR_FLAG(F_OF);
- CONDITIONAL_SET_FLAG(res & 0x80, F_SF);
- CONDITIONAL_SET_FLAG(res == 0, F_ZF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
- /* AF == dont care */
- CLEAR_FLAG(F_CF);
-}
-
-/****************************************************************************
-REMARKS:
-Implements the TEST instruction and side effects.
-****************************************************************************/
-void test_word(u16 d, u16 s)
-{
- register u32 res; /* all operands in native machine order */
-
- res = d & s;
-
- CLEAR_FLAG(F_OF);
- CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);
- CONDITIONAL_SET_FLAG(res == 0, F_ZF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
- /* AF == dont care */
- CLEAR_FLAG(F_CF);
-}
-
-/****************************************************************************
-REMARKS:
-Implements the TEST instruction and side effects.
-****************************************************************************/
-void test_long(u32 d, u32 s)
-{
- register u32 res; /* all operands in native machine order */
-
- res = d & s;
-
- CLEAR_FLAG(F_OF);
- CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
- CONDITIONAL_SET_FLAG(res == 0, F_ZF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
- /* AF == dont care */
- CLEAR_FLAG(F_CF);
-}
-
-/****************************************************************************
-REMARKS:
-Implements the XOR instruction and side effects.
-****************************************************************************/
-u8 xor_byte(u8 d, u8 s)
-{
- register u8 res; /* all operands in native machine order */
-
- res = d ^ s;
- CLEAR_FLAG(F_OF);
- CONDITIONAL_SET_FLAG(res & 0x80, F_SF);
- CONDITIONAL_SET_FLAG(res == 0, F_ZF);
- CONDITIONAL_SET_FLAG(PARITY(res), F_PF);
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_AF);
- return res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the XOR instruction and side effects.
-****************************************************************************/
-u16 xor_word(u16 d, u16 s)
-{
- register u16 res; /* all operands in native machine order */
-
- res = d ^ s;
- CLEAR_FLAG(F_OF);
- CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);
- CONDITIONAL_SET_FLAG(res == 0, F_ZF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_AF);
- return res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the XOR instruction and side effects.
-****************************************************************************/
-u32 xor_long(u32 d, u32 s)
-{
- register u32 res; /* all operands in native machine order */
-
- res = d ^ s;
- CLEAR_FLAG(F_OF);
- CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
- CONDITIONAL_SET_FLAG(res == 0, F_ZF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_AF);
- return res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the IMUL instruction and side effects.
-****************************************************************************/
-void imul_byte(u8 s)
-{
- s16 res = (s16)((s8)M.x86.R_AL * (s8)s);
-
- M.x86.R_AX = res;
- if (((M.x86.R_AL & 0x80) == 0 && M.x86.R_AH == 0x00) ||
- ((M.x86.R_AL & 0x80) != 0 && M.x86.R_AH == 0xFF)) {
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_OF);
- } else {
- SET_FLAG(F_CF);
- SET_FLAG(F_OF);
- }
-}
-
-/****************************************************************************
-REMARKS:
-Implements the IMUL instruction and side effects.
-****************************************************************************/
-void imul_word(u16 s)
-{
- s32 res = (s16)M.x86.R_AX * (s16)s;
-
- M.x86.R_AX = (u16)res;
- M.x86.R_DX = (u16)(res >> 16);
- if (((M.x86.R_AX & 0x8000) == 0 && M.x86.R_DX == 0x00) ||
- ((M.x86.R_AX & 0x8000) != 0 && M.x86.R_DX == 0xFF)) {
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_OF);
- } else {
- SET_FLAG(F_CF);
- SET_FLAG(F_OF);
- }
-}
-
-/****************************************************************************
-REMARKS:
-Implements the IMUL instruction and side effects.
-****************************************************************************/
-void imul_long_direct(u32 *res_lo, u32* res_hi,u32 d, u32 s)
-{
-#ifdef __HAS_LONG_LONG__
- s64 res = (s32)d * (s32)s;
-
- *res_lo = (u32)res;
- *res_hi = (u32)(res >> 32);
-#else
- u32 d_lo,d_hi,d_sign;
- u32 s_lo,s_hi,s_sign;
- u32 rlo_lo,rlo_hi,rhi_lo;
-
- if ((d_sign = d & 0x80000000) != 0)
- d = -d;
- d_lo = d & 0xFFFF;
- d_hi = d >> 16;
- if ((s_sign = s & 0x80000000) != 0)
- s = -s;
- s_lo = s & 0xFFFF;
- s_hi = s >> 16;
- rlo_lo = d_lo * s_lo;
- rlo_hi = (d_hi * s_lo + d_lo * s_hi) + (rlo_lo >> 16);
- rhi_lo = d_hi * s_hi + (rlo_hi >> 16);
- *res_lo = (rlo_hi << 16) | (rlo_lo & 0xFFFF);
- *res_hi = rhi_lo;
- if (d_sign != s_sign) {
- d = ~*res_lo;
- s = (((d & 0xFFFF) + 1) >> 16) + (d >> 16);
- *res_lo = ~*res_lo+1;
- *res_hi = ~*res_hi+(s >> 16);
- }
-#endif
-}
-
-/****************************************************************************
-REMARKS:
-Implements the IMUL instruction and side effects.
-****************************************************************************/
-void imul_long(u32 s)
-{
- imul_long_direct(&M.x86.R_EAX,&M.x86.R_EDX,M.x86.R_EAX,s);
- if (((M.x86.R_EAX & 0x80000000) == 0 && M.x86.R_EDX == 0x00) ||
- ((M.x86.R_EAX & 0x80000000) != 0 && M.x86.R_EDX == 0xFF)) {
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_OF);
- } else {
- SET_FLAG(F_CF);
- SET_FLAG(F_OF);
- }
-}
-
-/****************************************************************************
-REMARKS:
-Implements the MUL instruction and side effects.
-****************************************************************************/
-void mul_byte(u8 s)
-{
- u16 res = (u16)(M.x86.R_AL * s);
-
- M.x86.R_AX = res;
- if (M.x86.R_AH == 0) {
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_OF);
- } else {
- SET_FLAG(F_CF);
- SET_FLAG(F_OF);
- }
-}
-
-/****************************************************************************
-REMARKS:
-Implements the MUL instruction and side effects.
-****************************************************************************/
-void mul_word(u16 s)
-{
- u32 res = M.x86.R_AX * s;
-
- M.x86.R_AX = (u16)res;
- M.x86.R_DX = (u16)(res >> 16);
- if (M.x86.R_DX == 0) {
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_OF);
- } else {
- SET_FLAG(F_CF);
- SET_FLAG(F_OF);
- }
-}
-
-/****************************************************************************
-REMARKS:
-Implements the MUL instruction and side effects.
-****************************************************************************/
-void mul_long(u32 s)
-{
-#ifdef __HAS_LONG_LONG__
- u64 res = (u32)M.x86.R_EAX * (u32)s;
-
- M.x86.R_EAX = (u32)res;
- M.x86.R_EDX = (u32)(res >> 32);
-#else
- u32 a,a_lo,a_hi;
- u32 s_lo,s_hi;
- u32 rlo_lo,rlo_hi,rhi_lo;
-
- a = M.x86.R_EAX;
- a_lo = a & 0xFFFF;
- a_hi = a >> 16;
- s_lo = s & 0xFFFF;
- s_hi = s >> 16;
- rlo_lo = a_lo * s_lo;
- rlo_hi = (a_hi * s_lo + a_lo * s_hi) + (rlo_lo >> 16);
- rhi_lo = a_hi * s_hi + (rlo_hi >> 16);
- M.x86.R_EAX = (rlo_hi << 16) | (rlo_lo & 0xFFFF);
- M.x86.R_EDX = rhi_lo;
-#endif
-
- if (M.x86.R_EDX == 0) {
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_OF);
- } else {
- SET_FLAG(F_CF);
- SET_FLAG(F_OF);
- }
-}
-
-/****************************************************************************
-REMARKS:
-Implements the IDIV instruction and side effects.
-****************************************************************************/
-void idiv_byte(u8 s)
-{
- s32 dvd, div, mod;
-
- dvd = (s16)M.x86.R_AX;
- if (s == 0) {
- x86emu_intr_raise(0);
- return;
- }
- div = dvd / (s8)s;
- mod = dvd % (s8)s;
- if (abs(div) > 0x7f) {
- x86emu_intr_raise(0);
- return;
- }
- M.x86.R_AL = (s8) div;
- M.x86.R_AH = (s8) mod;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the IDIV instruction and side effects.
-****************************************************************************/
-void idiv_word(u16 s)
-{
- s32 dvd, div, mod;
-
- dvd = (((s32)M.x86.R_DX) << 16) | M.x86.R_AX;
- if (s == 0) {
- x86emu_intr_raise(0);
- return;
- }
- div = dvd / (s16)s;
- mod = dvd % (s16)s;
- if (abs(div) > 0x7fff) {
- x86emu_intr_raise(0);
- return;
- }
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_SF);
- CONDITIONAL_SET_FLAG(div == 0, F_ZF);
- CONDITIONAL_SET_FLAG(PARITY(mod & 0xff), F_PF);
-
- M.x86.R_AX = (u16)div;
- M.x86.R_DX = (u16)mod;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the IDIV instruction and side effects.
-****************************************************************************/
-void idiv_long(u32 s)
-{
-#ifdef __HAS_LONG_LONG__
- s64 dvd, div, mod;
-
- dvd = (((s64)M.x86.R_EDX) << 32) | M.x86.R_EAX;
- if (s == 0) {
- x86emu_intr_raise(0);
- return;
- }
- div = dvd / (s32)s;
- mod = dvd % (s32)s;
- if (abs(div) > 0x7fffffff) {
- x86emu_intr_raise(0);
- return;
- }
-#else
- s32 div = 0, mod;
- s32 h_dvd = M.x86.R_EDX;
- u32 l_dvd = M.x86.R_EAX;
- u32 abs_s = s & 0x7FFFFFFF;
- u32 abs_h_dvd = h_dvd & 0x7FFFFFFF;
- u32 h_s = abs_s >> 1;
- u32 l_s = abs_s << 31;
- int counter = 31;
- int carry;
-
- if (s == 0) {
- x86emu_intr_raise(0);
- return;
- }
- do {
- div <<= 1;
- carry = (l_dvd >= l_s) ? 0 : 1;
-
- if (abs_h_dvd < (h_s + carry)) {
- h_s >>= 1;
- l_s = abs_s << (--counter);
- continue;
- } else {
- abs_h_dvd -= (h_s + carry);
- l_dvd = carry ? ((0xFFFFFFFF - l_s) + l_dvd + 1)
- : (l_dvd - l_s);
- h_s >>= 1;
- l_s = abs_s << (--counter);
- div |= 1;
- continue;
- }
-
- } while (counter > -1);
- /* overflow */
- if (abs_h_dvd || (l_dvd > abs_s)) {
- x86emu_intr_raise(0);
- return;
- }
- /* sign */
- div |= ((h_dvd & 0x10000000) ^ (s & 0x10000000));
- mod = l_dvd;
-
-#endif
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_AF);
- CLEAR_FLAG(F_SF);
- SET_FLAG(F_ZF);
- CONDITIONAL_SET_FLAG(PARITY(mod & 0xff), F_PF);
-
- M.x86.R_EAX = (u32)div;
- M.x86.R_EDX = (u32)mod;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the DIV instruction and side effects.
-****************************************************************************/
-void div_byte(u8 s)
-{
- u32 dvd, div, mod;
-
- dvd = M.x86.R_AX;
- if (s == 0) {
- x86emu_intr_raise(0);
- return;
- }
- div = dvd / (u8)s;
- mod = dvd % (u8)s;
- if (abs(div) > 0xff) {
- x86emu_intr_raise(0);
- return;
- }
- M.x86.R_AL = (u8)div;
- M.x86.R_AH = (u8)mod;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the DIV instruction and side effects.
-****************************************************************************/
-void div_word(u16 s)
-{
- u32 dvd, div, mod;
-
- dvd = (((u32)M.x86.R_DX) << 16) | M.x86.R_AX;
- if (s == 0) {
- x86emu_intr_raise(0);
- return;
- }
- div = dvd / (u16)s;
- mod = dvd % (u16)s;
- if (abs(div) > 0xffff) {
- x86emu_intr_raise(0);
- return;
- }
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_SF);
- CONDITIONAL_SET_FLAG(div == 0, F_ZF);
- CONDITIONAL_SET_FLAG(PARITY(mod & 0xff), F_PF);
-
- M.x86.R_AX = (u16)div;
- M.x86.R_DX = (u16)mod;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the DIV instruction and side effects.
-****************************************************************************/
-void div_long(u32 s)
-{
-#ifdef __HAS_LONG_LONG__
- u64 dvd, div, mod;
-
- dvd = (((u64)M.x86.R_EDX) << 32) | M.x86.R_EAX;
- if (s == 0) {
- x86emu_intr_raise(0);
- return;
- }
- div = dvd / (u32)s;
- mod = dvd % (u32)s;
- if (abs(div) > 0xffffffff) {
- x86emu_intr_raise(0);
- return;
- }
-#else
- s32 div = 0, mod;
- s32 h_dvd = M.x86.R_EDX;
- u32 l_dvd = M.x86.R_EAX;
-
- u32 h_s = s;
- u32 l_s = 0;
- int counter = 32;
- int carry;
-
- if (s == 0) {
- x86emu_intr_raise(0);
- return;
- }
- do {
- div <<= 1;
- carry = (l_dvd >= l_s) ? 0 : 1;
-
- if (h_dvd < (h_s + carry)) {
- h_s >>= 1;
- l_s = s << (--counter);
- continue;
- } else {
- h_dvd -= (h_s + carry);
- l_dvd = carry ? ((0xFFFFFFFF - l_s) + l_dvd + 1)
- : (l_dvd - l_s);
- h_s >>= 1;
- l_s = s << (--counter);
- div |= 1;
- continue;
- }
-
- } while (counter > -1);
- /* overflow */
- if (h_dvd || (l_dvd > s)) {
- x86emu_intr_raise(0);
- return;
- }
- mod = l_dvd;
-#endif
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_AF);
- CLEAR_FLAG(F_SF);
- SET_FLAG(F_ZF);
- CONDITIONAL_SET_FLAG(PARITY(mod & 0xff), F_PF);
-
- M.x86.R_EAX = (u32)div;
- M.x86.R_EDX = (u32)mod;
-}
-
-#endif /* __HAVE_INLINE_ASSEMBLER__ */
-
-/****************************************************************************
-REMARKS:
-Implements the IN string instruction and side effects.
-****************************************************************************/
-void ins(int size)
-{
- int inc = size;
-
- if (ACCESS_FLAG(F_DF)) {
- inc = -size;
- }
- if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) {
- /* dont care whether REPE or REPNE */
- /* in until CX is ZERO. */
- u32 count = ((M.x86.mode & SYSMODE_PREFIX_DATA) ?
- M.x86.R_ECX : M.x86.R_CX);
- switch (size) {
- case 1:
- while (count--) {
- store_data_byte_abs(M.x86.R_ES, M.x86.R_DI,
- (*sys_inb)(M.x86.R_DX));
- M.x86.R_DI += inc;
- }
- break;
-
- case 2:
- while (count--) {
- store_data_word_abs(M.x86.R_ES, M.x86.R_DI,
- (*sys_inw)(M.x86.R_DX));
- M.x86.R_DI += inc;
- }
- break;
- case 4:
- while (count--) {
- store_data_long_abs(M.x86.R_ES, M.x86.R_DI,
- (*sys_inl)(M.x86.R_DX));
- M.x86.R_DI += inc;
- break;
- }
- }
- M.x86.R_CX = 0;
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_ECX = 0;
- }
- M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE);
- } else {
- switch (size) {
- case 1:
- store_data_byte_abs(M.x86.R_ES, M.x86.R_DI,
- (*sys_inb)(M.x86.R_DX));
- break;
- case 2:
- store_data_word_abs(M.x86.R_ES, M.x86.R_DI,
- (*sys_inw)(M.x86.R_DX));
- break;
- case 4:
- store_data_long_abs(M.x86.R_ES, M.x86.R_DI,
- (*sys_inl)(M.x86.R_DX));
- break;
- }
- M.x86.R_DI += inc;
- }
-}
-
-/****************************************************************************
-REMARKS:
-Implements the OUT string instruction and side effects.
-****************************************************************************/
-void outs(int size)
-{
- int inc = size;
-
- if (ACCESS_FLAG(F_DF)) {
- inc = -size;
- }
- if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) {
- /* dont care whether REPE or REPNE */
- /* out until CX is ZERO. */
- u32 count = ((M.x86.mode & SYSMODE_PREFIX_DATA) ?
- M.x86.R_ECX : M.x86.R_CX);
- switch (size) {
- case 1:
- while (count--) {
- (*sys_outb)(M.x86.R_DX,
- fetch_data_byte_abs(M.x86.R_ES, M.x86.R_SI));
- M.x86.R_SI += inc;
- }
- break;
-
- case 2:
- while (count--) {
- (*sys_outw)(M.x86.R_DX,
- fetch_data_word_abs(M.x86.R_ES, M.x86.R_SI));
- M.x86.R_SI += inc;
- }
- break;
- case 4:
- while (count--) {
- (*sys_outl)(M.x86.R_DX,
- fetch_data_long_abs(M.x86.R_ES, M.x86.R_SI));
- M.x86.R_SI += inc;
- break;
- }
- }
- M.x86.R_CX = 0;
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_ECX = 0;
- }
- M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE);
- } else {
- switch (size) {
- case 1:
- (*sys_outb)(M.x86.R_DX,
- fetch_data_byte_abs(M.x86.R_ES, M.x86.R_SI));
- break;
- case 2:
- (*sys_outw)(M.x86.R_DX,
- fetch_data_word_abs(M.x86.R_ES, M.x86.R_SI));
- break;
- case 4:
- (*sys_outl)(M.x86.R_DX,
- fetch_data_long_abs(M.x86.R_ES, M.x86.R_SI));
- break;
- }
- M.x86.R_SI += inc;
- }
-}
-
-/****************************************************************************
-PARAMETERS:
-addr - Address to fetch word from
-
-REMARKS:
-Fetches a word from emulator memory using an absolute address.
-****************************************************************************/
-u16 mem_access_word(int addr)
-{
-DB( if (CHECK_MEM_ACCESS())
- x86emu_check_mem_access(addr);)
- return (*sys_rdw)(addr);
-}
-
-/****************************************************************************
-REMARKS:
-Pushes a word onto the stack.
-
-NOTE: Do not inline this, as (*sys_wrX) is already inline!
-****************************************************************************/
-void push_word(u16 w)
-{
-DB( if (CHECK_SP_ACCESS())
- x86emu_check_sp_access();)
- M.x86.R_SP -= 2;
- (*sys_wrw)(((u32)M.x86.R_SS << 4) + M.x86.R_SP, w);
-}
-
-/****************************************************************************
-REMARKS:
-Pushes a long onto the stack.
-
-NOTE: Do not inline this, as (*sys_wrX) is already inline!
-****************************************************************************/
-void push_long(u32 w)
-{
-DB( if (CHECK_SP_ACCESS())
- x86emu_check_sp_access();)
- M.x86.R_SP -= 4;
- (*sys_wrl)(((u32)M.x86.R_SS << 4) + M.x86.R_SP, w);
-}
-
-/****************************************************************************
-REMARKS:
-Pops a word from the stack.
-
-NOTE: Do not inline this, as (*sys_rdX) is already inline!
-****************************************************************************/
-u16 pop_word(void)
-{
- register u16 res;
-
-DB( if (CHECK_SP_ACCESS())
- x86emu_check_sp_access();)
- res = (*sys_rdw)(((u32)M.x86.R_SS << 4) + M.x86.R_SP);
- M.x86.R_SP += 2;
- return res;
-}
-
-/****************************************************************************
-REMARKS:
-Pops a long from the stack.
-
-NOTE: Do not inline this, as (*sys_rdX) is already inline!
-****************************************************************************/
-u32 pop_long(void)
-{
- register u32 res;
-
-DB( if (CHECK_SP_ACCESS())
- x86emu_check_sp_access();)
- res = (*sys_rdl)(((u32)M.x86.R_SS << 4) + M.x86.R_SP);
- M.x86.R_SP += 4;
- return res;
-}
-
-#ifdef __HAVE_INLINE_ASSEMBLER__
-
-u16 aaa_word (u16 d)
-{ return aaa_word_asm(&M.x86.R_EFLG,d); }
-
-u16 aas_word (u16 d)
-{ return aas_word_asm(&M.x86.R_EFLG,d); }
-
-u16 aad_word (u16 d)
-{ return aad_word_asm(&M.x86.R_EFLG,d); }
-
-u16 aam_word (u8 d)
-{ return aam_word_asm(&M.x86.R_EFLG,d); }
-
-u8 adc_byte (u8 d, u8 s)
-{ return adc_byte_asm(&M.x86.R_EFLG,d,s); }
-
-u16 adc_word (u16 d, u16 s)
-{ return adc_word_asm(&M.x86.R_EFLG,d,s); }
-
-u32 adc_long (u32 d, u32 s)
-{ return adc_long_asm(&M.x86.R_EFLG,d,s); }
-
-u8 add_byte (u8 d, u8 s)
-{ return add_byte_asm(&M.x86.R_EFLG,d,s); }
-
-u16 add_word (u16 d, u16 s)
-{ return add_word_asm(&M.x86.R_EFLG,d,s); }
-
-u32 add_long (u32 d, u32 s)
-{ return add_long_asm(&M.x86.R_EFLG,d,s); }
-
-u8 and_byte (u8 d, u8 s)
-{ return and_byte_asm(&M.x86.R_EFLG,d,s); }
-
-u16 and_word (u16 d, u16 s)
-{ return and_word_asm(&M.x86.R_EFLG,d,s); }
-
-u32 and_long (u32 d, u32 s)
-{ return and_long_asm(&M.x86.R_EFLG,d,s); }
-
-u8 cmp_byte (u8 d, u8 s)
-{ return cmp_byte_asm(&M.x86.R_EFLG,d,s); }
-
-u16 cmp_word (u16 d, u16 s)
-{ return cmp_word_asm(&M.x86.R_EFLG,d,s); }
-
-u32 cmp_long (u32 d, u32 s)
-{ return cmp_long_asm(&M.x86.R_EFLG,d,s); }
-
-u8 daa_byte (u8 d)
-{ return daa_byte_asm(&M.x86.R_EFLG,d); }
-
-u8 das_byte (u8 d)
-{ return das_byte_asm(&M.x86.R_EFLG,d); }
-
-u8 dec_byte (u8 d)
-{ return dec_byte_asm(&M.x86.R_EFLG,d); }
-
-u16 dec_word (u16 d)
-{ return dec_word_asm(&M.x86.R_EFLG,d); }
-
-u32 dec_long (u32 d)
-{ return dec_long_asm(&M.x86.R_EFLG,d); }
-
-u8 inc_byte (u8 d)
-{ return inc_byte_asm(&M.x86.R_EFLG,d); }
-
-u16 inc_word (u16 d)
-{ return inc_word_asm(&M.x86.R_EFLG,d); }
-
-u32 inc_long (u32 d)
-{ return inc_long_asm(&M.x86.R_EFLG,d); }
-
-u8 or_byte (u8 d, u8 s)
-{ return or_byte_asm(&M.x86.R_EFLG,d,s); }
-
-u16 or_word (u16 d, u16 s)
-{ return or_word_asm(&M.x86.R_EFLG,d,s); }
-
-u32 or_long (u32 d, u32 s)
-{ return or_long_asm(&M.x86.R_EFLG,d,s); }
-
-u8 neg_byte (u8 s)
-{ return neg_byte_asm(&M.x86.R_EFLG,s); }
-
-u16 neg_word (u16 s)
-{ return neg_word_asm(&M.x86.R_EFLG,s); }
-
-u32 neg_long (u32 s)
-{ return neg_long_asm(&M.x86.R_EFLG,s); }
-
-u8 not_byte (u8 s)
-{ return not_byte_asm(&M.x86.R_EFLG,s); }
-
-u16 not_word (u16 s)
-{ return not_word_asm(&M.x86.R_EFLG,s); }
-
-u32 not_long (u32 s)
-{ return not_long_asm(&M.x86.R_EFLG,s); }
-
-u8 rcl_byte (u8 d, u8 s)
-{ return rcl_byte_asm(&M.x86.R_EFLG,d,s); }
-
-u16 rcl_word (u16 d, u8 s)
-{ return rcl_word_asm(&M.x86.R_EFLG,d,s); }
-
-u32 rcl_long (u32 d, u8 s)
-{ return rcl_long_asm(&M.x86.R_EFLG,d,s); }
-
-u8 rcr_byte (u8 d, u8 s)
-{ return rcr_byte_asm(&M.x86.R_EFLG,d,s); }
-
-u16 rcr_word (u16 d, u8 s)
-{ return rcr_word_asm(&M.x86.R_EFLG,d,s); }
-
-u32 rcr_long (u32 d, u8 s)
-{ return rcr_long_asm(&M.x86.R_EFLG,d,s); }
-
-u8 rol_byte (u8 d, u8 s)
-{ return rol_byte_asm(&M.x86.R_EFLG,d,s); }
-
-u16 rol_word (u16 d, u8 s)
-{ return rol_word_asm(&M.x86.R_EFLG,d,s); }
-
-u32 rol_long (u32 d, u8 s)
-{ return rol_long_asm(&M.x86.R_EFLG,d,s); }
-
-u8 ror_byte (u8 d, u8 s)
-{ return ror_byte_asm(&M.x86.R_EFLG,d,s); }
-
-u16 ror_word (u16 d, u8 s)
-{ return ror_word_asm(&M.x86.R_EFLG,d,s); }
-
-u32 ror_long (u32 d, u8 s)
-{ return ror_long_asm(&M.x86.R_EFLG,d,s); }
-
-u8 shl_byte (u8 d, u8 s)
-{ return shl_byte_asm(&M.x86.R_EFLG,d,s); }
-
-u16 shl_word (u16 d, u8 s)
-{ return shl_word_asm(&M.x86.R_EFLG,d,s); }
-
-u32 shl_long (u32 d, u8 s)
-{ return shl_long_asm(&M.x86.R_EFLG,d,s); }
-
-u8 shr_byte (u8 d, u8 s)
-{ return shr_byte_asm(&M.x86.R_EFLG,d,s); }
-
-u16 shr_word (u16 d, u8 s)
-{ return shr_word_asm(&M.x86.R_EFLG,d,s); }
-
-u32 shr_long (u32 d, u8 s)
-{ return shr_long_asm(&M.x86.R_EFLG,d,s); }
-
-u8 sar_byte (u8 d, u8 s)
-{ return sar_byte_asm(&M.x86.R_EFLG,d,s); }
-
-u16 sar_word (u16 d, u8 s)
-{ return sar_word_asm(&M.x86.R_EFLG,d,s); }
-
-u32 sar_long (u32 d, u8 s)
-{ return sar_long_asm(&M.x86.R_EFLG,d,s); }
-
-u16 shld_word (u16 d, u16 fill, u8 s)
-{ return shld_word_asm(&M.x86.R_EFLG,d,fill,s); }
-
-u32 shld_long (u32 d, u32 fill, u8 s)
-{ return shld_long_asm(&M.x86.R_EFLG,d,fill,s); }
-
-u16 shrd_word (u16 d, u16 fill, u8 s)
-{ return shrd_word_asm(&M.x86.R_EFLG,d,fill,s); }
-
-u32 shrd_long (u32 d, u32 fill, u8 s)
-{ return shrd_long_asm(&M.x86.R_EFLG,d,fill,s); }
-
-u8 sbb_byte (u8 d, u8 s)
-{ return sbb_byte_asm(&M.x86.R_EFLG,d,s); }
-
-u16 sbb_word (u16 d, u16 s)
-{ return sbb_word_asm(&M.x86.R_EFLG,d,s); }
-
-u32 sbb_long (u32 d, u32 s)
-{ return sbb_long_asm(&M.x86.R_EFLG,d,s); }
-
-u8 sub_byte (u8 d, u8 s)
-{ return sub_byte_asm(&M.x86.R_EFLG,d,s); }
-
-u16 sub_word (u16 d, u16 s)
-{ return sub_word_asm(&M.x86.R_EFLG,d,s); }
-
-u32 sub_long (u32 d, u32 s)
-{ return sub_long_asm(&M.x86.R_EFLG,d,s); }
-
-void test_byte (u8 d, u8 s)
-{ test_byte_asm(&M.x86.R_EFLG,d,s); }
-
-void test_word (u16 d, u16 s)
-{ test_word_asm(&M.x86.R_EFLG,d,s); }
-
-void test_long (u32 d, u32 s)
-{ test_long_asm(&M.x86.R_EFLG,d,s); }
-
-u8 xor_byte (u8 d, u8 s)
-{ return xor_byte_asm(&M.x86.R_EFLG,d,s); }
-
-u16 xor_word (u16 d, u16 s)
-{ return xor_word_asm(&M.x86.R_EFLG,d,s); }
-
-u32 xor_long (u32 d, u32 s)
-{ return xor_long_asm(&M.x86.R_EFLG,d,s); }
-
-void imul_byte (u8 s)
-{ imul_byte_asm(&M.x86.R_EFLG,&M.x86.R_AX,M.x86.R_AL,s); }
-
-void imul_word (u16 s)
-{ imul_word_asm(&M.x86.R_EFLG,&M.x86.R_AX,&M.x86.R_DX,M.x86.R_AX,s); }
-
-void imul_long (u32 s)
-{ imul_long_asm(&M.x86.R_EFLG,&M.x86.R_EAX,&M.x86.R_EDX,M.x86.R_EAX,s); }
-
-void imul_long_direct(u32 *res_lo, u32* res_hi,u32 d, u32 s)
-{ imul_long_asm(&M.x86.R_EFLG,res_lo,res_hi,d,s); }
-
-void mul_byte (u8 s)
-{ mul_byte_asm(&M.x86.R_EFLG,&M.x86.R_AX,M.x86.R_AL,s); }
-
-void mul_word (u16 s)
-{ mul_word_asm(&M.x86.R_EFLG,&M.x86.R_AX,&M.x86.R_DX,M.x86.R_AX,s); }
-
-void mul_long (u32 s)
-{ mul_long_asm(&M.x86.R_EFLG,&M.x86.R_EAX,&M.x86.R_EDX,M.x86.R_EAX,s); }
-
-void idiv_byte (u8 s)
-{ idiv_byte_asm(&M.x86.R_EFLG,&M.x86.R_AL,&M.x86.R_AH,M.x86.R_AX,s); }
-
-void idiv_word (u16 s)
-{ idiv_word_asm(&M.x86.R_EFLG,&M.x86.R_AX,&M.x86.R_DX,M.x86.R_AX,M.x86.R_DX,s); }
-
-void idiv_long (u32 s)
-{ idiv_long_asm(&M.x86.R_EFLG,&M.x86.R_EAX,&M.x86.R_EDX,M.x86.R_EAX,M.x86.R_EDX,s); }
-
-void div_byte (u8 s)
-{ div_byte_asm(&M.x86.R_EFLG,&M.x86.R_AL,&M.x86.R_AH,M.x86.R_AX,s); }
-
-void div_word (u16 s)
-{ div_word_asm(&M.x86.R_EFLG,&M.x86.R_AX,&M.x86.R_DX,M.x86.R_AX,M.x86.R_DX,s); }
-
-void div_long (u32 s)
-{ div_long_asm(&M.x86.R_EFLG,&M.x86.R_EAX,&M.x86.R_EDX,M.x86.R_EAX,M.x86.R_EDX,s); }
-
-#endif
diff --git a/board/MAI/bios_emulator/scitech/src/x86emu/sys.c b/board/MAI/bios_emulator/scitech/src/x86emu/sys.c
deleted file mode 100644
index afe58f8647..0000000000
--- a/board/MAI/bios_emulator/scitech/src/x86emu/sys.c
+++ /dev/null
@@ -1,658 +0,0 @@
-/****************************************************************************
-*
-* Realmode X86 Emulator Library
-*
-* Copyright (C) 1996-1999 SciTech Software, Inc.
-* Copyright (C) David Mosberger-Tang
-* Copyright (C) 1999 Egbert Eich
-*
-* ========================================================================
-*
-* Permission to use, copy, modify, distribute, and sell this software and
-* its documentation for any purpose is hereby granted without fee,
-* provided that the above copyright notice appear in all copies and that
-* both that copyright notice and this permission notice appear in
-* supporting documentation, and that the name of the authors not be used
-* in advertising or publicity pertaining to distribution of the software
-* without specific, written prior permission. The authors makes no
-* representations about the suitability of this software for any purpose.
-* It is provided "as is" without express or implied warranty.
-*
-* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
-* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
-* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
-* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
-* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
-* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
-* PERFORMANCE OF THIS SOFTWARE.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-* Developer: Kendall Bennett
-*
-* Description: This file includes subroutines which are related to
-* programmed I/O and memory access. Included in this module
-* are default functions with limited usefulness. For real
-* uses these functions will most likely be overriden by the
-* user library.
-*
-****************************************************************************/
-
-#include "x86emu.h"
-#include "x86emu/regs.h"
-#include "x86emu/debug.h"
-#include "x86emu/prim_ops.h"
-#include <string.h>
-
-/*------------------------- Global Variables ------------------------------*/
-
-X86EMU_sysEnv _X86EMU_env; /* Global emulator machine state */
-X86EMU_intrFuncs _X86EMU_intrTab[256];
-
-/*----------------------------- Implementation ----------------------------*/
-#ifdef __alpha__
-/* to cope with broken egcs-1.1.2 :-(((( */
-
-/*
- * inline functions to do unaligned accesses
- * from linux/include/asm-alpha/unaligned.h
- */
-
-/*
- * EGCS 1.1 knows about arbitrary unaligned loads. Define some
- * packed structures to talk about such things with.
- */
-
-#if __GNUC__ > 2 || __GNUC_MINOR__ >= 91
-struct __una_u64 { unsigned long x __attribute__((packed)); };
-struct __una_u32 { unsigned int x __attribute__((packed)); };
-struct __una_u16 { unsigned short x __attribute__((packed)); };
-#endif
-
-static __inline__ unsigned long ldq_u(unsigned long * r11)
-{
-#if __GNUC__ > 2 || __GNUC_MINOR__ >= 91
- const struct __una_u64 *ptr = (const struct __una_u64 *) r11;
- return ptr->x;
-#else
- unsigned long r1,r2;
- __asm__("ldq_u %0,%3\n\t"
- "ldq_u %1,%4\n\t"
- "extql %0,%2,%0\n\t"
- "extqh %1,%2,%1"
- :"=&r" (r1), "=&r" (r2)
- :"r" (r11),
- "m" (*r11),
- "m" (*(const unsigned long *)(7+(char *) r11)));
- return r1 | r2;
-#endif
-}
-
-static __inline__ unsigned long ldl_u(unsigned int * r11)
-{
-#if __GNUC__ > 2 || __GNUC_MINOR__ >= 91
- const struct __una_u32 *ptr = (const struct __una_u32 *) r11;
- return ptr->x;
-#else
- unsigned long r1,r2;
- __asm__("ldq_u %0,%3\n\t"
- "ldq_u %1,%4\n\t"
- "extll %0,%2,%0\n\t"
- "extlh %1,%2,%1"
- :"=&r" (r1), "=&r" (r2)
- :"r" (r11),
- "m" (*r11),
- "m" (*(const unsigned long *)(3+(char *) r11)));
- return r1 | r2;
-#endif
-}
-
-static __inline__ unsigned long ldw_u(unsigned short * r11)
-{
-#if __GNUC__ > 2 || __GNUC_MINOR__ >= 91
- const struct __una_u16 *ptr = (const struct __una_u16 *) r11;
- return ptr->x;
-#else
- unsigned long r1,r2;
- __asm__("ldq_u %0,%3\n\t"
- "ldq_u %1,%4\n\t"
- "extwl %0,%2,%0\n\t"
- "extwh %1,%2,%1"
- :"=&r" (r1), "=&r" (r2)
- :"r" (r11),
- "m" (*r11),
- "m" (*(const unsigned long *)(1+(char *) r11)));
- return r1 | r2;
-#endif
-}
-
-/*
- * Elemental unaligned stores
- */
-
-static __inline__ void stq_u(unsigned long r5, unsigned long * r11)
-{
-#if __GNUC__ > 2 || __GNUC_MINOR__ >= 91
- struct __una_u64 *ptr = (struct __una_u64 *) r11;
- ptr->x = r5;
-#else
- unsigned long r1,r2,r3,r4;
-
- __asm__("ldq_u %3,%1\n\t"
- "ldq_u %2,%0\n\t"
- "insqh %6,%7,%5\n\t"
- "insql %6,%7,%4\n\t"
- "mskqh %3,%7,%3\n\t"
- "mskql %2,%7,%2\n\t"
- "bis %3,%5,%3\n\t"
- "bis %2,%4,%2\n\t"
- "stq_u %3,%1\n\t"
- "stq_u %2,%0"
- :"=m" (*r11),
- "=m" (*(unsigned long *)(7+(char *) r11)),
- "=&r" (r1), "=&r" (r2), "=&r" (r3), "=&r" (r4)
- :"r" (r5), "r" (r11));
-#endif
-}
-
-static __inline__ void stl_u(unsigned long r5, unsigned int * r11)
-{
-#if __GNUC__ > 2 || __GNUC_MINOR__ >= 91
- struct __una_u32 *ptr = (struct __una_u32 *) r11;
- ptr->x = r5;
-#else
- unsigned long r1,r2,r3,r4;
-
- __asm__("ldq_u %3,%1\n\t"
- "ldq_u %2,%0\n\t"
- "inslh %6,%7,%5\n\t"
- "insll %6,%7,%4\n\t"
- "msklh %3,%7,%3\n\t"
- "mskll %2,%7,%2\n\t"
- "bis %3,%5,%3\n\t"
- "bis %2,%4,%2\n\t"
- "stq_u %3,%1\n\t"
- "stq_u %2,%0"
- :"=m" (*r11),
- "=m" (*(unsigned long *)(3+(char *) r11)),
- "=&r" (r1), "=&r" (r2), "=&r" (r3), "=&r" (r4)
- :"r" (r5), "r" (r11));
-#endif
-}
-
-static __inline__ void stw_u(unsigned long r5, unsigned short * r11)
-{
-#if __GNUC__ > 2 || __GNUC_MINOR__ >= 91
- struct __una_u16 *ptr = (struct __una_u16 *) r11;
- ptr->x = r5;
-#else
- unsigned long r1,r2,r3,r4;
-
- __asm__("ldq_u %3,%1\n\t"
- "ldq_u %2,%0\n\t"
- "inswh %6,%7,%5\n\t"
- "inswl %6,%7,%4\n\t"
- "mskwh %3,%7,%3\n\t"
- "mskwl %2,%7,%2\n\t"
- "bis %3,%5,%3\n\t"
- "bis %2,%4,%2\n\t"
- "stq_u %3,%1\n\t"
- "stq_u %2,%0"
- :"=m" (*r11),
- "=m" (*(unsigned long *)(1+(char *) r11)),
- "=&r" (r1), "=&r" (r2), "=&r" (r3), "=&r" (r4)
- :"r" (r5), "r" (r11));
-#endif
-}
-
-#elif defined (__ia64__)
-/*
- * EGCS 1.1 knows about arbitrary unaligned loads. Define some
- * packed structures to talk about such things with.
- */
-struct __una_u64 { unsigned long x __attribute__((packed)); };
-struct __una_u32 { unsigned int x __attribute__((packed)); };
-struct __una_u16 { unsigned short x __attribute__((packed)); };
-
-static __inline__ unsigned long
-__uldq (const unsigned long * r11)
-{
- const struct __una_u64 *ptr = (const struct __una_u64 *) r11;
- return ptr->x;
-}
-
-static __inline__ unsigned long
-uldl (const unsigned int * r11)
-{
- const struct __una_u32 *ptr = (const struct __una_u32 *) r11;
- return ptr->x;
-}
-
-static __inline__ unsigned long
-uldw (const unsigned short * r11)
-{
- const struct __una_u16 *ptr = (const struct __una_u16 *) r11;
- return ptr->x;
-}
-
-static __inline__ void
-ustq (unsigned long r5, unsigned long * r11)
-{
- struct __una_u64 *ptr = (struct __una_u64 *) r11;
- ptr->x = r5;
-}
-
-static __inline__ void
-ustl (unsigned long r5, unsigned int * r11)
-{
- struct __una_u32 *ptr = (struct __una_u32 *) r11;
- ptr->x = r5;
-}
-
-static __inline__ void
-ustw (unsigned long r5, unsigned short * r11)
-{
- struct __una_u16 *ptr = (struct __una_u16 *) r11;
- ptr->x = r5;
-}
-
-#endif
-
-/****************************************************************************
-PARAMETERS:
-addr - Emulator memory address to read
-
-RETURNS:
-Byte value read from emulator memory.
-
-REMARKS:
-Reads a byte value from the emulator memory.
-****************************************************************************/
-u8 X86API rdb(
- u32 addr)
-{
- u8 val;
-
- if (addr > M.mem_size - 1) {
- DB(printk("mem_read: address %#lx out of range!\n", addr);)
- HALT_SYS();
- }
- val = *(u8*)(M.mem_base + addr);
-DB( if (DEBUG_MEM_TRACE())
- printk("%#08x 1 -> %#x\n", addr, val);)
- return val;
-}
-
-/****************************************************************************
-PARAMETERS:
-addr - Emulator memory address to read
-
-RETURNS:
-Word value read from emulator memory.
-
-REMARKS:
-Reads a word value from the emulator memory.
-****************************************************************************/
-u16 X86API rdw(
- u32 addr)
-{
- u16 val = 0;
-
- if (addr > M.mem_size - 2) {
- DB(printk("mem_read: address %#lx out of range!\n", addr);)
- HALT_SYS();
- }
-#ifdef __BIG_ENDIAN__
- if (addr & 0x1) {
- val = (*(u8*)(M.mem_base + addr) |
- (*(u8*)(M.mem_base + addr + 1) << 8));
- }
- else
-#endif
-#ifdef __alpha__
- val = ldw_u((u16*)(M.mem_base + addr));
-#elif defined (__ia64__)
- val = uldw((u16*)(M.mem_base + addr));
-#else
- val = *(u16*)(M.mem_base + addr);
-#endif
- DB( if (DEBUG_MEM_TRACE())
- printk("%#08x 2 -> %#x\n", addr, val);)
- return val;
-}
-
-/****************************************************************************
-PARAMETERS:
-addr - Emulator memory address to read
-
-RETURNS:
-Long value read from emulator memory.
-REMARKS:
-Reads a long value from the emulator memory.
-****************************************************************************/
-u32 X86API rdl(
- u32 addr)
-{
- u32 val = 0;
-
- if (addr > M.mem_size - 4) {
- DB(printk("mem_read: address %#lx out of range!\n", addr);)
- HALT_SYS();
- }
-#ifdef __BIG_ENDIAN__
- if (addr & 0x3) {
- val = (*(u8*)(M.mem_base + addr + 0) |
- (*(u8*)(M.mem_base + addr + 1) << 8) |
- (*(u8*)(M.mem_base + addr + 2) << 16) |
- (*(u8*)(M.mem_base + addr + 3) << 24));
- }
- else
-#endif
-#ifdef __alpha__
- val = ldl_u((u32*)(M.mem_base + addr));
-#elif defined (__ia64__)
- val = uldl((u32*)(M.mem_base + addr));
-#else
- val = *(u32*)(M.mem_base + addr);
-#endif
-DB( if (DEBUG_MEM_TRACE())
- printk("%#08x 4 -> %#x\n", addr, val);)
- return val;
-}
-
-/****************************************************************************
-PARAMETERS:
-addr - Emulator memory address to read
-val - Value to store
-
-REMARKS:
-Writes a byte value to emulator memory.
-****************************************************************************/
-void X86API wrb(
- u32 addr,
- u8 val)
-{
-DB( if (DEBUG_MEM_TRACE())
- printk("%#08x 1 <- %#x\n", addr, val);)
- if (addr > M.mem_size - 1) {
- DB(printk("mem_write: address %#lx out of range!\n", addr);)
- HALT_SYS();
- }
- *(u8*)(M.mem_base + addr) = val;
-}
-
-/****************************************************************************
-PARAMETERS:
-addr - Emulator memory address to read
-val - Value to store
-
-REMARKS:
-Writes a word value to emulator memory.
-****************************************************************************/
-void X86API wrw(
- u32 addr,
- u16 val)
-{
-DB( if (DEBUG_MEM_TRACE())
- printk("%#08x 2 <- %#x\n", addr, val);)
- if (addr > M.mem_size - 2) {
- DB(printk("mem_write: address %#lx out of range!\n", addr);)
- HALT_SYS();
- }
-#ifdef __BIG_ENDIAN__
- if (addr & 0x1) {
- *(u8*)(M.mem_base + addr + 0) = (val >> 0) & 0xff;
- *(u8*)(M.mem_base + addr + 1) = (val >> 8) & 0xff;
- }
- else
-#endif
-#ifdef __alpha__
- stw_u(val,(u16*)(M.mem_base + addr));
-#elif defined (__ia64__)
- ustw(val,(u16*)(M.mem_base + addr));
-#else
- *(u16*)(M.mem_base + addr) = val;
-#endif
-}
-
-/****************************************************************************
-PARAMETERS:
-addr - Emulator memory address to read
-val - Value to store
-
-REMARKS:
-Writes a long value to emulator memory.
-****************************************************************************/
-void X86API wrl(
- u32 addr,
- u32 val)
-{
-DB( if (DEBUG_MEM_TRACE())
- printk("%#08x 4 <- %#x\n", addr, val);)
- if (addr > M.mem_size - 4) {
- DB(printk("mem_write: address %#lx out of range!\n", addr);)
- HALT_SYS();
- }
-#ifdef __BIG_ENDIAN__
- if (addr & 0x1) {
- *(u8*)(M.mem_base + addr + 0) = (val >> 0) & 0xff;
- *(u8*)(M.mem_base + addr + 1) = (val >> 8) & 0xff;
- *(u8*)(M.mem_base + addr + 2) = (val >> 16) & 0xff;
- *(u8*)(M.mem_base + addr + 3) = (val >> 24) & 0xff;
- }
- else
-#endif
-#ifdef __alpha__
- stl_u(val,(u32*)(M.mem_base + addr));
-#elif defined (__ia64__)
- ustl(val,(u32*)(M.mem_base + addr));
-#else
- *(u32*)(M.mem_base + addr) = val;
-#endif
-}
-
-/****************************************************************************
-PARAMETERS:
-addr - PIO address to read
-RETURN:
-0
-REMARKS:
-Default PIO byte read function. Doesn't perform real inb.
-****************************************************************************/
-static u8 X86API p_inb(
- X86EMU_pioAddr addr)
-{
-DB( if (DEBUG_IO_TRACE())
- printk("inb %#04x \n", addr);)
- return 0;
-}
-
-/****************************************************************************
-PARAMETERS:
-addr - PIO address to read
-RETURN:
-0
-REMARKS:
-Default PIO word read function. Doesn't perform real inw.
-****************************************************************************/
-static u16 X86API p_inw(
- X86EMU_pioAddr addr)
-{
-DB( if (DEBUG_IO_TRACE())
- printk("inw %#04x \n", addr);)
- return 0;
-}
-
-/****************************************************************************
-PARAMETERS:
-addr - PIO address to read
-RETURN:
-0
-REMARKS:
-Default PIO long read function. Doesn't perform real inl.
-****************************************************************************/
-static u32 X86API p_inl(
- X86EMU_pioAddr addr)
-{
-DB( if (DEBUG_IO_TRACE())
- printk("inl %#04x \n", addr);)
- return 0;
-}
-
-/****************************************************************************
-PARAMETERS:
-addr - PIO address to write
-val - Value to store
-REMARKS:
-Default PIO byte write function. Doesn't perform real outb.
-****************************************************************************/
-static void X86API p_outb(
- X86EMU_pioAddr addr,
- u8 val)
-{
-DB( if (DEBUG_IO_TRACE())
- printk("outb %#02x -> %#04x \n", val, addr);)
- return;
-}
-
-/****************************************************************************
-PARAMETERS:
-addr - PIO address to write
-val - Value to store
-REMARKS:
-Default PIO word write function. Doesn't perform real outw.
-****************************************************************************/
-static void X86API p_outw(
- X86EMU_pioAddr addr,
- u16 val)
-{
-DB( if (DEBUG_IO_TRACE())
- printk("outw %#04x -> %#04x \n", val, addr);)
- return;
-}
-
-/****************************************************************************
-PARAMETERS:
-addr - PIO address to write
-val - Value to store
-REMARKS:
-Default PIO ;ong write function. Doesn't perform real outl.
-****************************************************************************/
-static void X86API p_outl(
- X86EMU_pioAddr addr,
- u32 val)
-{
-DB( if (DEBUG_IO_TRACE())
- printk("outl %#08x -> %#04x \n", val, addr);)
- return;
-}
-
-/*------------------------- Global Variables ------------------------------*/
-
-u8 (X86APIP sys_rdb)(u32 addr) = rdb;
-u16 (X86APIP sys_rdw)(u32 addr) = rdw;
-u32 (X86APIP sys_rdl)(u32 addr) = rdl;
-void (X86APIP sys_wrb)(u32 addr,u8 val) = wrb;
-void (X86APIP sys_wrw)(u32 addr,u16 val) = wrw;
-void (X86APIP sys_wrl)(u32 addr,u32 val) = wrl;
-u8 (X86APIP sys_inb)(X86EMU_pioAddr addr) = p_inb;
-u16 (X86APIP sys_inw)(X86EMU_pioAddr addr) = p_inw;
-u32 (X86APIP sys_inl)(X86EMU_pioAddr addr) = p_inl;
-void (X86APIP sys_outb)(X86EMU_pioAddr addr, u8 val) = p_outb;
-void (X86APIP sys_outw)(X86EMU_pioAddr addr, u16 val) = p_outw;
-void (X86APIP sys_outl)(X86EMU_pioAddr addr, u32 val) = p_outl;
-
-/*----------------------------- Setup -------------------------------------*/
-
-/****************************************************************************
-PARAMETERS:
-funcs - New memory function pointers to make active
-
-REMARKS:
-This function is used to set the pointers to functions which access
-memory space, allowing the user application to override these functions
-and hook them out as necessary for their application.
-****************************************************************************/
-void X86EMU_setupMemFuncs(
- X86EMU_memFuncs *funcs)
-{
- sys_rdb = funcs->rdb;
- sys_rdw = funcs->rdw;
- sys_rdl = funcs->rdl;
- sys_wrb = funcs->wrb;
- sys_wrw = funcs->wrw;
- sys_wrl = funcs->wrl;
-}
-
-/****************************************************************************
-PARAMETERS:
-funcs - New programmed I/O function pointers to make active
-
-REMARKS:
-This function is used to set the pointers to functions which access
-I/O space, allowing the user application to override these functions
-and hook them out as necessary for their application.
-****************************************************************************/
-void X86EMU_setupPioFuncs(
- X86EMU_pioFuncs *funcs)
-{
- sys_inb = funcs->inb;
- sys_inw = funcs->inw;
- sys_inl = funcs->inl;
- sys_outb = funcs->outb;
- sys_outw = funcs->outw;
- sys_outl = funcs->outl;
-}
-
-/****************************************************************************
-PARAMETERS:
-funcs - New interrupt vector table to make active
-
-REMARKS:
-This function is used to set the pointers to functions which handle
-interrupt processing in the emulator, allowing the user application to
-hook interrupts as necessary for their application. Any interrupts that
-are not hooked by the user application, and reflected and handled internally
-in the emulator via the interrupt vector table. This allows the application
-to get control when the code being emulated executes specific software
-interrupts.
-****************************************************************************/
-void X86EMU_setupIntrFuncs(
- X86EMU_intrFuncs funcs[])
-{
- int i;
-
- for (i=0; i < 256; i++)
- _X86EMU_intrTab[i] = NULL;
- if (funcs) {
- for (i = 0; i < 256; i++)
- _X86EMU_intrTab[i] = funcs[i];
- }
-}
-
-/****************************************************************************
-PARAMETERS:
-int - New software interrupt to prepare for
-
-REMARKS:
-This function is used to set up the emulator state to exceute a software
-interrupt. This can be used by the user application code to allow an
-interrupt to be hooked, examined and then reflected back to the emulator
-so that the code in the emulator will continue processing the software
-interrupt as per normal. This essentially allows system code to actively
-hook and handle certain software interrupts as necessary.
-****************************************************************************/
-void X86EMU_prepareForInt(
- int num)
-{
- push_word((u16)M.x86.R_FLG);
- CLEAR_FLAG(F_IF);
- CLEAR_FLAG(F_TF);
- push_word(M.x86.R_CS);
- M.x86.R_CS = mem_access_word(num * 4 + 2);
- push_word(M.x86.R_IP);
- M.x86.R_IP = mem_access_word(num * 4);
- M.x86.intr = 0;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/x86emu/validate.c b/board/MAI/bios_emulator/scitech/src/x86emu/validate.c
deleted file mode 100644
index c951301f96..0000000000
--- a/board/MAI/bios_emulator/scitech/src/x86emu/validate.c
+++ /dev/null
@@ -1,765 +0,0 @@
-/****************************************************************************
-*
-* Realmode X86 Emulator Library
-*
-* Copyright (C) 1996-1999 SciTech Software, Inc.
-* Copyright (C) David Mosberger-Tang
-* Copyright (C) 1999 Egbert Eich
-*
-* ========================================================================
-*
-* Permission to use, copy, modify, distribute, and sell this software and
-* its documentation for any purpose is hereby granted without fee,
-* provided that the above copyright notice appear in all copies and that
-* both that copyright notice and this permission notice appear in
-* supporting documentation, and that the name of the authors not be used
-* in advertising or publicity pertaining to distribution of the software
-* without specific, written prior permission. The authors makes no
-* representations about the suitability of this software for any purpose.
-* It is provided "as is" without express or implied warranty.
-*
-* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
-* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
-* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
-* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
-* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
-* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
-* PERFORMANCE OF THIS SOFTWARE.
-*
-* ========================================================================
-*
-* Language: Watcom C 10.6 or later
-* Environment: 32-bit DOS
-* Developer: Kendall Bennett
-*
-* Description: Program to validate the x86 emulator library for
-* correctness. We run the emulator primitive operations
-* functions against the real x86 CPU, and compare the result
-* and flags to ensure correctness.
-*
-* We use inline assembler to compile and build this program.
-*
-****************************************************************************/
-
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <stdarg.h>
-#include "x86emu.h"
-#include "x86emu/prim_asm.h"
-
-/*-------------------------- Implementation -------------------------------*/
-
-#define true 1
-#define false 0
-
-#define ALL_FLAGS (F_CF | F_PF | F_AF | F_ZF | F_SF | F_OF)
-
-#define VAL_START_BINARY(parm_type,res_type,dmax,smax,dincr,sincr) \
-{ \
- parm_type d,s; \
- res_type r,r_asm; \
- ulong flags,inflags; \
- int f,failed = false; \
- char buf1[80],buf2[80]; \
- for (d = 0; d < dmax; d += dincr) { \
- for (s = 0; s < smax; s += sincr) { \
- M.x86.R_EFLG = inflags = flags = def_flags; \
- for (f = 0; f < 2; f++) {
-
-#define VAL_TEST_BINARY(name) \
- r_asm = name##_asm(&flags,d,s); \
- r = name(d,s); \
- if (r != r_asm || M.x86.R_EFLG != flags) \
- failed = true; \
- if (failed || trace) {
-
-#define VAL_TEST_BINARY_VOID(name) \
- name##_asm(&flags,d,s); \
- name(d,s); \
- r = r_asm = 0; \
- if (M.x86.R_EFLG != flags) \
- failed = true; \
- if (failed || trace) {
-
-#define VAL_FAIL_BYTE_BYTE_BINARY(name) \
- if (failed) \
- printk("fail\n"); \
- printk("0x%02X = %-15s(0x%02X,0x%02X), flags = %s -> %s\n", \
- r, #name, d, s, print_flags(buf1,inflags), print_flags(buf2,M.x86.R_EFLG)); \
- printk("0x%02X = %-15s(0x%02X,0x%02X), flags = %s -> %s\n", \
- r_asm, #name"_asm", d, s, print_flags(buf1,inflags), print_flags(buf2,flags));
-
-#define VAL_FAIL_WORD_WORD_BINARY(name) \
- if (failed) \
- printk("fail\n"); \
- printk("0x%04X = %-15s(0x%04X,0x%04X), flags = %s -> %s\n", \
- r, #name, d, s, print_flags(buf1,inflags), print_flags(buf2,M.x86.R_EFLG)); \
- printk("0x%04X = %-15s(0x%04X,0x%04X), flags = %s -> %s\n", \
- r_asm, #name"_asm", d, s, print_flags(buf1,inflags), print_flags(buf2,flags));
-
-#define VAL_FAIL_LONG_LONG_BINARY(name) \
- if (failed) \
- printk("fail\n"); \
- printk("0x%08X = %-15s(0x%08X,0x%08X), flags = %s -> %s\n", \
- r, #name, d, s, print_flags(buf1,inflags), print_flags(buf2,M.x86.R_EFLG)); \
- printk("0x%08X = %-15s(0x%08X,0x%08X), flags = %s -> %s\n", \
- r_asm, #name"_asm", d, s, print_flags(buf1,inflags), print_flags(buf2,flags));
-
-#define VAL_END_BINARY() \
- } \
- M.x86.R_EFLG = inflags = flags = def_flags | (ALL_FLAGS & ~F_OF); \
- if (failed) \
- break; \
- } \
- if (failed) \
- break; \
- } \
- if (failed) \
- break; \
- } \
- if (!failed) \
- printk("passed\n"); \
-}
-
-#define VAL_BYTE_BYTE_BINARY(name) \
- printk("Validating %s ... ", #name); \
- VAL_START_BINARY(u8,u8,0xFF,0xFF,1,1) \
- VAL_TEST_BINARY(name) \
- VAL_FAIL_BYTE_BYTE_BINARY(name) \
- VAL_END_BINARY()
-
-#define VAL_WORD_WORD_BINARY(name) \
- printk("Validating %s ... ", #name); \
- VAL_START_BINARY(u16,u16,0xFF00,0xFF00,0x100,0x100) \
- VAL_TEST_BINARY(name) \
- VAL_FAIL_WORD_WORD_BINARY(name) \
- VAL_END_BINARY()
-
-#define VAL_LONG_LONG_BINARY(name) \
- printk("Validating %s ... ", #name); \
- VAL_START_BINARY(u32,u32,0xFF000000,0xFF000000,0x1000000,0x1000000) \
- VAL_TEST_BINARY(name) \
- VAL_FAIL_LONG_LONG_BINARY(name) \
- VAL_END_BINARY()
-
-#define VAL_VOID_BYTE_BINARY(name) \
- printk("Validating %s ... ", #name); \
- VAL_START_BINARY(u8,u8,0xFF,0xFF,1,1) \
- VAL_TEST_BINARY_VOID(name) \
- VAL_FAIL_BYTE_BYTE_BINARY(name) \
- VAL_END_BINARY()
-
-#define VAL_VOID_WORD_BINARY(name) \
- printk("Validating %s ... ", #name); \
- VAL_START_BINARY(u16,u16,0xFF00,0xFF00,0x100,0x100) \
- VAL_TEST_BINARY_VOID(name) \
- VAL_FAIL_WORD_WORD_BINARY(name) \
- VAL_END_BINARY()
-
-#define VAL_VOID_LONG_BINARY(name) \
- printk("Validating %s ... ", #name); \
- VAL_START_BINARY(u32,u32,0xFF000000,0xFF000000,0x1000000,0x1000000) \
- VAL_TEST_BINARY_VOID(name) \
- VAL_FAIL_LONG_LONG_BINARY(name) \
- VAL_END_BINARY()
-
-#define VAL_BYTE_ROTATE(name) \
- printk("Validating %s ... ", #name); \
- VAL_START_BINARY(u8,u8,0xFF,8,1,1) \
- VAL_TEST_BINARY(name) \
- VAL_FAIL_BYTE_BYTE_BINARY(name) \
- VAL_END_BINARY()
-
-#define VAL_WORD_ROTATE(name) \
- printk("Validating %s ... ", #name); \
- VAL_START_BINARY(u16,u16,0xFF00,16,0x100,1) \
- VAL_TEST_BINARY(name) \
- VAL_FAIL_WORD_WORD_BINARY(name) \
- VAL_END_BINARY()
-
-#define VAL_LONG_ROTATE(name) \
- printk("Validating %s ... ", #name); \
- VAL_START_BINARY(u32,u32,0xFF000000,32,0x1000000,1) \
- VAL_TEST_BINARY(name) \
- VAL_FAIL_LONG_LONG_BINARY(name) \
- VAL_END_BINARY()
-
-#define VAL_START_TERNARY(parm_type,res_type,dmax,smax,dincr,sincr,maxshift)\
-{ \
- parm_type d,s; \
- res_type r,r_asm; \
- u8 shift; \
- u32 flags,inflags; \
- int f,failed = false; \
- char buf1[80],buf2[80]; \
- for (d = 0; d < dmax; d += dincr) { \
- for (s = 0; s < smax; s += sincr) { \
- for (shift = 0; shift < maxshift; shift += 1) { \
- M.x86.R_EFLG = inflags = flags = def_flags; \
- for (f = 0; f < 2; f++) {
-
-#define VAL_TEST_TERNARY(name) \
- r_asm = name##_asm(&flags,d,s,shift); \
- r = name(d,s,shift); \
- if (r != r_asm || M.x86.R_EFLG != flags) \
- failed = true; \
- if (failed || trace) {
-
-#define VAL_FAIL_WORD_WORD_TERNARY(name) \
- if (failed) \
- printk("fail\n"); \
- printk("0x%04X = %-15s(0x%04X,0x%04X,%d), flags = %s -> %s\n", \
- r, #name, d, s, shift, print_flags(buf1,inflags), print_flags(buf2,M.x86.R_EFLG)); \
- printk("0x%04X = %-15s(0x%04X,0x%04X,%d), flags = %s -> %s\n", \
- r_asm, #name"_asm", d, s, shift, print_flags(buf1,inflags), print_flags(buf2,flags));
-
-#define VAL_FAIL_LONG_LONG_TERNARY(name) \
- if (failed) \
- printk("fail\n"); \
- printk("0x%08X = %-15s(0x%08X,0x%08X,%d), flags = %s -> %s\n", \
- r, #name, d, s, shift, print_flags(buf1,inflags), print_flags(buf2,M.x86.R_EFLG)); \
- printk("0x%08X = %-15s(0x%08X,0x%08X,%d), flags = %s -> %s\n", \
- r_asm, #name"_asm", d, s, shift, print_flags(buf1,inflags), print_flags(buf2,flags));
-
-#define VAL_END_TERNARY() \
- } \
- M.x86.R_EFLG = inflags = flags = def_flags | (ALL_FLAGS & ~F_OF); \
- if (failed) \
- break; \
- } \
- if (failed) \
- break; \
- } \
- if (failed) \
- break; \
- } \
- if (failed) \
- break; \
- } \
- if (!failed) \
- printk("passed\n"); \
-}
-
-#define VAL_WORD_ROTATE_DBL(name) \
- printk("Validating %s ... ", #name); \
- VAL_START_TERNARY(u16,u16,0xFF00,0xFF00,0x100,0x100,16) \
- VAL_TEST_TERNARY(name) \
- VAL_FAIL_WORD_WORD_TERNARY(name) \
- VAL_END_TERNARY()
-
-#define VAL_LONG_ROTATE_DBL(name) \
- printk("Validating %s ... ", #name); \
- VAL_START_TERNARY(u32,u32,0xFF000000,0xFF000000,0x1000000,0x1000000,32) \
- VAL_TEST_TERNARY(name) \
- VAL_FAIL_LONG_LONG_TERNARY(name) \
- VAL_END_TERNARY()
-
-#define VAL_START_UNARY(parm_type,max,incr) \
-{ \
- parm_type d,r,r_asm; \
- u32 flags,inflags; \
- int f,failed = false; \
- char buf1[80],buf2[80]; \
- for (d = 0; d < max; d += incr) { \
- M.x86.R_EFLG = inflags = flags = def_flags; \
- for (f = 0; f < 2; f++) {
-
-#define VAL_TEST_UNARY(name) \
- r_asm = name##_asm(&flags,d); \
- r = name(d); \
- if (r != r_asm || M.x86.R_EFLG != flags) { \
- failed = true;
-
-#define VAL_FAIL_BYTE_UNARY(name) \
- printk("fail\n"); \
- printk("0x%02X = %-15s(0x%02X), flags = %s -> %s\n", \
- r, #name, d, print_flags(buf1,inflags), print_flags(buf2,M.x86.R_EFLG)); \
- printk("0x%02X = %-15s(0x%02X), flags = %s -> %s\n", \
- r_asm, #name"_asm", d, print_flags(buf1,inflags), print_flags(buf2,flags));
-
-#define VAL_FAIL_WORD_UNARY(name) \
- printk("fail\n"); \
- printk("0x%04X = %-15s(0x%04X), flags = %s -> %s\n", \
- r, #name, d, print_flags(buf1,inflags), print_flags(buf2,M.x86.R_EFLG)); \
- printk("0x%04X = %-15s(0x%04X), flags = %s -> %s\n", \
- r_asm, #name"_asm", d, print_flags(buf1,inflags), print_flags(buf2,flags));
-
-#define VAL_FAIL_LONG_UNARY(name) \
- printk("fail\n"); \
- printk("0x%08X = %-15s(0x%08X), flags = %s -> %s\n", \
- r, #name, d, print_flags(buf1,inflags), print_flags(buf2,M.x86.R_EFLG)); \
- printk("0x%08X = %-15s(0x%08X), flags = %s -> %s\n", \
- r_asm, #name"_asm", d, print_flags(buf1,inflags), print_flags(buf2,flags));
-
-#define VAL_END_UNARY() \
- } \
- M.x86.R_EFLG = inflags = flags = def_flags | ALL_FLAGS; \
- if (failed) \
- break; \
- } \
- if (failed) \
- break; \
- } \
- if (!failed) \
- printk("passed\n"); \
-}
-
-#define VAL_BYTE_UNARY(name) \
- printk("Validating %s ... ", #name); \
- VAL_START_UNARY(u8,0xFF,0x1) \
- VAL_TEST_UNARY(name) \
- VAL_FAIL_BYTE_UNARY(name) \
- VAL_END_UNARY()
-
-#define VAL_WORD_UNARY(name) \
- printk("Validating %s ... ", #name); \
- VAL_START_UNARY(u16,0xFF00,0x100) \
- VAL_TEST_UNARY(name) \
- VAL_FAIL_WORD_UNARY(name) \
- VAL_END_UNARY()
-
-#define VAL_WORD_BYTE_UNARY(name) \
- printk("Validating %s ... ", #name); \
- VAL_START_UNARY(u16,0xFF,0x1) \
- VAL_TEST_UNARY(name) \
- VAL_FAIL_WORD_UNARY(name) \
- VAL_END_UNARY()
-
-#define VAL_LONG_UNARY(name) \
- printk("Validating %s ... ", #name); \
- VAL_START_UNARY(u32,0xFF000000,0x1000000) \
- VAL_TEST_UNARY(name) \
- VAL_FAIL_LONG_UNARY(name) \
- VAL_END_UNARY()
-
-#define VAL_BYTE_MUL(name) \
- printk("Validating %s ... ", #name); \
-{ \
- u8 d,s; \
- u16 r,r_asm; \
- u32 flags,inflags; \
- int f,failed = false; \
- char buf1[80],buf2[80]; \
- for (d = 0; d < 0xFF; d += 1) { \
- for (s = 0; s < 0xFF; s += 1) { \
- M.x86.R_EFLG = inflags = flags = def_flags; \
- for (f = 0; f < 2; f++) { \
- name##_asm(&flags,&r_asm,d,s); \
- M.x86.R_AL = d; \
- name(s); \
- r = M.x86.R_AX; \
- if (r != r_asm || M.x86.R_EFLG != flags) \
- failed = true; \
- if (failed || trace) { \
- if (failed) \
- printk("fail\n"); \
- printk("0x%04X = %-15s(0x%02X,0x%02X), flags = %s -> %s\n", \
- r, #name, d, s, print_flags(buf1,inflags), print_flags(buf2,M.x86.R_EFLG)); \
- printk("0x%04X = %-15s(0x%02X,0x%02X), flags = %s -> %s\n", \
- r_asm, #name"_asm", d, s, print_flags(buf1,inflags), print_flags(buf2,flags)); \
- } \
- M.x86.R_EFLG = inflags = flags = def_flags | (ALL_FLAGS & ~F_OF); \
- if (failed) \
- break; \
- } \
- if (failed) \
- break; \
- } \
- if (failed) \
- break; \
- } \
- if (!failed) \
- printk("passed\n"); \
-}
-
-#define VAL_WORD_MUL(name) \
- printk("Validating %s ... ", #name); \
-{ \
- u16 d,s; \
- u16 r_lo,r_asm_lo; \
- u16 r_hi,r_asm_hi; \
- u32 flags,inflags; \
- int f,failed = false; \
- char buf1[80],buf2[80]; \
- for (d = 0; d < 0xFF00; d += 0x100) { \
- for (s = 0; s < 0xFF00; s += 0x100) { \
- M.x86.R_EFLG = inflags = flags = def_flags; \
- for (f = 0; f < 2; f++) { \
- name##_asm(&flags,&r_asm_lo,&r_asm_hi,d,s); \
- M.x86.R_AX = d; \
- name(s); \
- r_lo = M.x86.R_AX; \
- r_hi = M.x86.R_DX; \
- if (r_lo != r_asm_lo || r_hi != r_asm_hi || M.x86.R_EFLG != flags)\
- failed = true; \
- if (failed || trace) { \
- if (failed) \
- printk("fail\n"); \
- printk("0x%04X:0x%04X = %-15s(0x%04X,0x%04X), flags = %s -> %s\n", \
- r_hi,r_lo, #name, d, s, print_flags(buf1,inflags), print_flags(buf2,M.x86.R_EFLG)); \
- printk("0x%04X:0x%04X = %-15s(0x%04X,0x%04X), flags = %s -> %s\n", \
- r_asm_hi,r_asm_lo, #name"_asm", d, s, print_flags(buf1,inflags), print_flags(buf2,flags)); \
- } \
- M.x86.R_EFLG = inflags = flags = def_flags | (ALL_FLAGS & ~F_OF); \
- if (failed) \
- break; \
- } \
- if (failed) \
- break; \
- } \
- if (failed) \
- break; \
- } \
- if (!failed) \
- printk("passed\n"); \
-}
-
-#define VAL_LONG_MUL(name) \
- printk("Validating %s ... ", #name); \
-{ \
- u32 d,s; \
- u32 r_lo,r_asm_lo; \
- u32 r_hi,r_asm_hi; \
- u32 flags,inflags; \
- int f,failed = false; \
- char buf1[80],buf2[80]; \
- for (d = 0; d < 0xFF000000; d += 0x1000000) { \
- for (s = 0; s < 0xFF000000; s += 0x1000000) { \
- M.x86.R_EFLG = inflags = flags = def_flags; \
- for (f = 0; f < 2; f++) { \
- name##_asm(&flags,&r_asm_lo,&r_asm_hi,d,s); \
- M.x86.R_EAX = d; \
- name(s); \
- r_lo = M.x86.R_EAX; \
- r_hi = M.x86.R_EDX; \
- if (r_lo != r_asm_lo || r_hi != r_asm_hi || M.x86.R_EFLG != flags)\
- failed = true; \
- if (failed || trace) { \
- if (failed) \
- printk("fail\n"); \
- printk("0x%08X:0x%08X = %-15s(0x%08X,0x%08X), flags = %s -> %s\n", \
- r_hi,r_lo, #name, d, s, print_flags(buf1,inflags), print_flags(buf2,M.x86.R_EFLG)); \
- printk("0x%08X:0x%08X = %-15s(0x%08X,0x%08X), flags = %s -> %s\n", \
- r_asm_hi,r_asm_lo, #name"_asm", d, s, print_flags(buf1,inflags), print_flags(buf2,flags)); \
- } \
- M.x86.R_EFLG = inflags = flags = def_flags | (ALL_FLAGS & ~F_OF); \
- if (failed) \
- break; \
- } \
- if (failed) \
- break; \
- } \
- if (failed) \
- break; \
- } \
- if (!failed) \
- printk("passed\n"); \
-}
-
-#define VAL_BYTE_DIV(name) \
- printk("Validating %s ... ", #name); \
-{ \
- u16 d,s; \
- u8 r_quot,r_rem,r_asm_quot,r_asm_rem; \
- u32 flags,inflags; \
- int f,failed = false; \
- char buf1[80],buf2[80]; \
- for (d = 0; d < 0xFF00; d += 0x100) { \
- for (s = 1; s < 0xFF; s += 1) { \
- M.x86.R_EFLG = inflags = flags = def_flags; \
- for (f = 0; f < 2; f++) { \
- M.x86.intr = 0; \
- M.x86.R_AX = d; \
- name(s); \
- r_quot = M.x86.R_AL; \
- r_rem = M.x86.R_AH; \
- if (M.x86.intr & INTR_SYNCH) \
- continue; \
- name##_asm(&flags,&r_asm_quot,&r_asm_rem,d,s); \
- if (r_quot != r_asm_quot || r_rem != r_asm_rem || M.x86.R_EFLG != flags) \
- failed = true; \
- if (failed || trace) { \
- if (failed) \
- printk("fail\n"); \
- printk("0x%02X:0x%02X = %-15s(0x%04X,0x%02X), flags = %s -> %s\n", \
- r_quot, r_rem, #name, d, s, print_flags(buf1,inflags), print_flags(buf2,M.x86.R_EFLG)); \
- printk("0x%02X:0x%02X = %-15s(0x%04X,0x%02X), flags = %s -> %s\n", \
- r_asm_quot, r_asm_rem, #name"_asm", d, s, print_flags(buf1,inflags), print_flags(buf2,flags)); \
- } \
- M.x86.R_EFLG = inflags = flags = def_flags | (ALL_FLAGS & ~F_OF); \
- if (failed) \
- break; \
- } \
- if (failed) \
- break; \
- } \
- if (failed) \
- break; \
- } \
- if (!failed) \
- printk("passed\n"); \
-}
-
-#define VAL_WORD_DIV(name) \
- printk("Validating %s ... ", #name); \
-{ \
- u32 d,s; \
- u16 r_quot,r_rem,r_asm_quot,r_asm_rem; \
- u32 flags,inflags; \
- int f,failed = false; \
- char buf1[80],buf2[80]; \
- for (d = 0; d < 0xFF000000; d += 0x1000000) { \
- for (s = 0x100; s < 0xFF00; s += 0x100) { \
- M.x86.R_EFLG = inflags = flags = def_flags; \
- for (f = 0; f < 2; f++) { \
- M.x86.intr = 0; \
- M.x86.R_AX = d & 0xFFFF; \
- M.x86.R_DX = d >> 16; \
- name(s); \
- r_quot = M.x86.R_AX; \
- r_rem = M.x86.R_DX; \
- if (M.x86.intr & INTR_SYNCH) \
- continue; \
- name##_asm(&flags,&r_asm_quot,&r_asm_rem,d & 0xFFFF,d >> 16,s);\
- if (r_quot != r_asm_quot || r_rem != r_asm_rem || M.x86.R_EFLG != flags) \
- failed = true; \
- if (failed || trace) { \
- if (failed) \
- printk("fail\n"); \
- printk("0x%04X:0x%04X = %-15s(0x%08X,0x%04X), flags = %s -> %s\n", \
- r_quot, r_rem, #name, d, s, print_flags(buf1,inflags), print_flags(buf2,M.x86.R_EFLG)); \
- printk("0x%04X:0x%04X = %-15s(0x%08X,0x%04X), flags = %s -> %s\n", \
- r_asm_quot, r_asm_rem, #name"_asm", d, s, print_flags(buf1,inflags), print_flags(buf2,flags)); \
- } \
- M.x86.R_EFLG = inflags = flags = def_flags | (ALL_FLAGS & ~F_OF); \
- if (failed) \
- break; \
- } \
- if (failed) \
- break; \
- } \
- if (failed) \
- break; \
- } \
- if (!failed) \
- printk("passed\n"); \
-}
-
-#define VAL_LONG_DIV(name) \
- printk("Validating %s ... ", #name); \
-{ \
- u32 d,s; \
- u32 r_quot,r_rem,r_asm_quot,r_asm_rem; \
- u32 flags,inflags; \
- int f,failed = false; \
- char buf1[80],buf2[80]; \
- for (d = 0; d < 0xFF000000; d += 0x1000000) { \
- for (s = 0x100; s < 0xFF00; s += 0x100) { \
- M.x86.R_EFLG = inflags = flags = def_flags; \
- for (f = 0; f < 2; f++) { \
- M.x86.intr = 0; \
- M.x86.R_EAX = d; \
- M.x86.R_EDX = 0; \
- name(s); \
- r_quot = M.x86.R_EAX; \
- r_rem = M.x86.R_EDX; \
- if (M.x86.intr & INTR_SYNCH) \
- continue; \
- name##_asm(&flags,&r_asm_quot,&r_asm_rem,d,0,s); \
- if (r_quot != r_asm_quot || r_rem != r_asm_rem || M.x86.R_EFLG != flags) \
- failed = true; \
- if (failed || trace) { \
- if (failed) \
- printk("fail\n"); \
- printk("0x%08X:0x%08X = %-15s(0x%08X:0x%08X,0x%08X), flags = %s -> %s\n", \
- r_quot, r_rem, #name, 0, d, s, print_flags(buf1,inflags), print_flags(buf2,M.x86.R_EFLG)); \
- printk("0x%08X:0x%08X = %-15s(0x%08X:0x%08X,0x%08X), flags = %s -> %s\n", \
- r_asm_quot, r_asm_rem, #name"_asm", 0, d, s, print_flags(buf1,inflags), print_flags(buf2,flags)); \
- } \
- M.x86.R_EFLG = inflags = flags = def_flags | (ALL_FLAGS & ~F_OF); \
- if (failed) \
- break; \
- } \
- if (failed) \
- break; \
- } \
- if (failed) \
- break; \
- } \
- if (!failed) \
- printk("passed\n"); \
-}
-
-void printk(const char *fmt, ...)
-{
- va_list argptr;
- va_start(argptr, fmt);
- vfprintf(stdout, fmt, argptr);
- fflush(stdout);
- va_end(argptr);
-}
-
-char * print_flags(char *buf,ulong flags)
-{
- char *separator = "";
-
- buf[0] = 0;
- if (flags & F_CF) {
- strcat(buf,separator);
- strcat(buf,"CF");
- separator = ",";
- }
- if (flags & F_PF) {
- strcat(buf,separator);
- strcat(buf,"PF");
- separator = ",";
- }
- if (flags & F_AF) {
- strcat(buf,separator);
- strcat(buf,"AF");
- separator = ",";
- }
- if (flags & F_ZF) {
- strcat(buf,separator);
- strcat(buf,"ZF");
- separator = ",";
- }
- if (flags & F_SF) {
- strcat(buf,separator);
- strcat(buf,"SF");
- separator = ",";
- }
- if (flags & F_OF) {
- strcat(buf,separator);
- strcat(buf,"OF");
- separator = ",";
- }
- if (separator[0] == 0)
- strcpy(buf,"None");
- return buf;
-}
-
-int main(int argc)
-{
- ulong def_flags;
- int trace = false;
-
- if (argc > 1)
- trace = true;
- memset(&M, 0, sizeof(M));
- def_flags = get_flags_asm() & ~ALL_FLAGS;
-
- VAL_WORD_UNARY(aaa_word);
- VAL_WORD_UNARY(aas_word);
-
- VAL_WORD_UNARY(aad_word);
- VAL_WORD_UNARY(aam_word);
-
- VAL_BYTE_BYTE_BINARY(adc_byte);
- VAL_WORD_WORD_BINARY(adc_word);
- VAL_LONG_LONG_BINARY(adc_long);
-
- VAL_BYTE_BYTE_BINARY(add_byte);
- VAL_WORD_WORD_BINARY(add_word);
- VAL_LONG_LONG_BINARY(add_long);
-
- VAL_BYTE_BYTE_BINARY(and_byte);
- VAL_WORD_WORD_BINARY(and_word);
- VAL_LONG_LONG_BINARY(and_long);
-
- VAL_BYTE_BYTE_BINARY(cmp_byte);
- VAL_WORD_WORD_BINARY(cmp_word);
- VAL_LONG_LONG_BINARY(cmp_long);
-
- VAL_BYTE_UNARY(daa_byte);
- VAL_BYTE_UNARY(das_byte); /* Fails for 0x9A (out of range anyway) */
-
- VAL_BYTE_UNARY(dec_byte);
- VAL_WORD_UNARY(dec_word);
- VAL_LONG_UNARY(dec_long);
-
- VAL_BYTE_UNARY(inc_byte);
- VAL_WORD_UNARY(inc_word);
- VAL_LONG_UNARY(inc_long);
-
- VAL_BYTE_BYTE_BINARY(or_byte);
- VAL_WORD_WORD_BINARY(or_word);
- VAL_LONG_LONG_BINARY(or_long);
-
- VAL_BYTE_UNARY(neg_byte);
- VAL_WORD_UNARY(neg_word);
- VAL_LONG_UNARY(neg_long);
-
- VAL_BYTE_UNARY(not_byte);
- VAL_WORD_UNARY(not_word);
- VAL_LONG_UNARY(not_long);
-
- VAL_BYTE_ROTATE(rcl_byte);
- VAL_WORD_ROTATE(rcl_word);
- VAL_LONG_ROTATE(rcl_long);
-
- VAL_BYTE_ROTATE(rcr_byte);
- VAL_WORD_ROTATE(rcr_word);
- VAL_LONG_ROTATE(rcr_long);
-
- VAL_BYTE_ROTATE(rol_byte);
- VAL_WORD_ROTATE(rol_word);
- VAL_LONG_ROTATE(rol_long);
-
- VAL_BYTE_ROTATE(ror_byte);
- VAL_WORD_ROTATE(ror_word);
- VAL_LONG_ROTATE(ror_long);
-
- VAL_BYTE_ROTATE(shl_byte);
- VAL_WORD_ROTATE(shl_word);
- VAL_LONG_ROTATE(shl_long);
-
- VAL_BYTE_ROTATE(shr_byte);
- VAL_WORD_ROTATE(shr_word);
- VAL_LONG_ROTATE(shr_long);
-
- VAL_BYTE_ROTATE(sar_byte);
- VAL_WORD_ROTATE(sar_word);
- VAL_LONG_ROTATE(sar_long);
-
- VAL_WORD_ROTATE_DBL(shld_word);
- VAL_LONG_ROTATE_DBL(shld_long);
-
- VAL_WORD_ROTATE_DBL(shrd_word);
- VAL_LONG_ROTATE_DBL(shrd_long);
-
- VAL_BYTE_BYTE_BINARY(sbb_byte);
- VAL_WORD_WORD_BINARY(sbb_word);
- VAL_LONG_LONG_BINARY(sbb_long);
-
- VAL_BYTE_BYTE_BINARY(sub_byte);
- VAL_WORD_WORD_BINARY(sub_word);
- VAL_LONG_LONG_BINARY(sub_long);
-
- VAL_BYTE_BYTE_BINARY(xor_byte);
- VAL_WORD_WORD_BINARY(xor_word);
- VAL_LONG_LONG_BINARY(xor_long);
-
- VAL_VOID_BYTE_BINARY(test_byte);
- VAL_VOID_WORD_BINARY(test_word);
- VAL_VOID_LONG_BINARY(test_long);
-
- VAL_BYTE_MUL(imul_byte);
- VAL_WORD_MUL(imul_word);
- VAL_LONG_MUL(imul_long);
-
- VAL_BYTE_MUL(mul_byte);
- VAL_WORD_MUL(mul_word);
- VAL_LONG_MUL(mul_long);
-
- VAL_BYTE_DIV(idiv_byte);
- VAL_WORD_DIV(idiv_word);
- VAL_LONG_DIV(idiv_long);
-
- VAL_BYTE_DIV(div_byte);
- VAL_WORD_DIV(div_word);
- VAL_LONG_DIV(div_long);
-
- return 0;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/x86emu/x86emu/debug.h b/board/MAI/bios_emulator/scitech/src/x86emu/x86emu/debug.h
deleted file mode 100644
index 9a4a096c65..0000000000
--- a/board/MAI/bios_emulator/scitech/src/x86emu/x86emu/debug.h
+++ /dev/null
@@ -1,210 +0,0 @@
-/****************************************************************************
-*
-* Realmode X86 Emulator Library
-*
-* Copyright (C) 1996-1999 SciTech Software, Inc.
-* Copyright (C) David Mosberger-Tang
-* Copyright (C) 1999 Egbert Eich
-*
-* ========================================================================
-*
-* Permission to use, copy, modify, distribute, and sell this software and
-* its documentation for any purpose is hereby granted without fee,
-* provided that the above copyright notice appear in all copies and that
-* both that copyright notice and this permission notice appear in
-* supporting documentation, and that the name of the authors not be used
-* in advertising or publicity pertaining to distribution of the software
-* without specific, written prior permission. The authors makes no
-* representations about the suitability of this software for any purpose.
-* It is provided "as is" without express or implied warranty.
-*
-* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
-* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
-* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
-* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
-* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
-* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
-* PERFORMANCE OF THIS SOFTWARE.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-* Developer: Kendall Bennett
-*
-* Description: Header file for debug definitions.
-*
-****************************************************************************/
-
-#ifndef __X86EMU_DEBUG_H
-#define __X86EMU_DEBUG_H
-
-/*---------------------- Macros and type definitions ----------------------*/
-
-/* checks to be enabled for "runtime" */
-
-#define CHECK_IP_FETCH_F 0x1
-#define CHECK_SP_ACCESS_F 0x2
-#define CHECK_MEM_ACCESS_F 0x4 /*using regular linear pointer */
-#define CHECK_DATA_ACCESS_F 0x8 /*using segment:offset*/
-
-#ifdef DEBUG
-# define CHECK_IP_FETCH() (M.x86.check & CHECK_IP_FETCH_F)
-# define CHECK_SP_ACCESS() (M.x86.check & CHECK_SP_ACCESS_F)
-# define CHECK_MEM_ACCESS() (M.x86.check & CHECK_MEM_ACCESS_F)
-# define CHECK_DATA_ACCESS() (M.x86.check & CHECK_DATA_ACCESS_F)
-#else
-# define CHECK_IP_FETCH()
-# define CHECK_SP_ACCESS()
-# define CHECK_MEM_ACCESS()
-# define CHECK_DATA_ACCESS()
-#endif
-
-#ifdef DEBUG
-# define DEBUG_INSTRUMENT() (M.x86.debug & DEBUG_INSTRUMENT_F)
-# define DEBUG_DECODE() (M.x86.debug & DEBUG_DECODE_F)
-# define DEBUG_TRACE() (M.x86.debug & DEBUG_TRACE_F)
-# define DEBUG_STEP() (M.x86.debug & DEBUG_STEP_F)
-# define DEBUG_DISASSEMBLE() (M.x86.debug & DEBUG_DISASSEMBLE_F)
-# define DEBUG_BREAK() (M.x86.debug & DEBUG_BREAK_F)
-# define DEBUG_SVC() (M.x86.debug & DEBUG_SVC_F)
-# define DEBUG_SAVE_IP_CS() (M.x86.debug & DEBUG_SAVE_CS_IP)
-
-# define DEBUG_FS() (M.x86.debug & DEBUG_FS_F)
-# define DEBUG_PROC() (M.x86.debug & DEBUG_PROC_F)
-# define DEBUG_SYSINT() (M.x86.debug & DEBUG_SYSINT_F)
-# define DEBUG_TRACECALL() (M.x86.debug & DEBUG_TRACECALL_F)
-# define DEBUG_TRACECALLREGS() (M.x86.debug & DEBUG_TRACECALL_REGS_F)
-# define DEBUG_SYS() (M.x86.debug & DEBUG_SYS_F)
-# define DEBUG_MEM_TRACE() (M.x86.debug & DEBUG_MEM_TRACE_F)
-# define DEBUG_IO_TRACE() (M.x86.debug & DEBUG_IO_TRACE_F)
-# define DEBUG_DECODE_NOPRINT() (M.x86.debug & DEBUG_DECODE_NOPRINT_F)
-#else
-# define DEBUG_INSTRUMENT() 0
-# define DEBUG_DECODE() 0
-# define DEBUG_TRACE() 0
-# define DEBUG_STEP() 0
-# define DEBUG_DISASSEMBLE() 0
-# define DEBUG_BREAK() 0
-# define DEBUG_SVC() 0
-# define DEBUG_SAVE_IP_CS() 0
-# define DEBUG_FS() 0
-# define DEBUG_PROC() 0
-# define DEBUG_SYSINT() 0
-# define DEBUG_TRACECALL() 0
-# define DEBUG_TRACECALLREGS() 0
-# define DEBUG_SYS() 0
-# define DEBUG_MEM_TRACE() 0
-# define DEBUG_IO_TRACE() 0
-# define DEBUG_DECODE_NOPRINT() 0
-#endif
-
-#ifdef DEBUG
-
-# define DECODE_PRINTF(x) if (DEBUG_DECODE()) \
- x86emu_decode_printf(x)
-# define DECODE_PRINTF2(x,y) if (DEBUG_DECODE()) \
- x86emu_decode_printf2(x,y)
-
-/*
- * The following allow us to look at the bytes of an instruction. The
- * first INCR_INSTRN_LEN, is called everytime bytes are consumed in
- * the decoding process. The SAVE_IP_CS is called initially when the
- * major opcode of the instruction is accessed.
- */
-#define INC_DECODED_INST_LEN(x) \
- if (DEBUG_DECODE()) \
- x86emu_inc_decoded_inst_len(x)
-
-#define SAVE_IP_CS(x,y) \
- if (DEBUG_DECODE() | DEBUG_TRACECALL() | DEBUG_BREAK() \
- | DEBUG_IO_TRACE() | DEBUG_SAVE_IP_CS()) { \
- M.x86.saved_cs = x; \
- M.x86.saved_ip = y; \
- }
-#else
-# define INC_DECODED_INST_LEN(x)
-# define DECODE_PRINTF(x)
-# define DECODE_PRINTF2(x,y)
-# define SAVE_IP_CS(x,y)
-#endif
-
-#ifdef DEBUG
-#define TRACE_REGS() \
- if (DEBUG_DISASSEMBLE()) { \
- x86emu_just_disassemble(); \
- goto EndOfTheInstructionProcedure; \
- } \
- if (DEBUG_TRACE() || DEBUG_DECODE()) X86EMU_trace_regs()
-#else
-# define TRACE_REGS()
-#endif
-
-#ifdef DEBUG
-# define SINGLE_STEP() if (DEBUG_STEP()) x86emu_single_step()
-#else
-# define SINGLE_STEP()
-#endif
-
-#define TRACE_AND_STEP() \
- TRACE_REGS(); \
- SINGLE_STEP()
-
-#ifdef DEBUG
-# define START_OF_INSTR()
-# define END_OF_INSTR() EndOfTheInstructionProcedure: x86emu_end_instr();
-# define END_OF_INSTR_NO_TRACE() x86emu_end_instr();
-#else
-# define START_OF_INSTR()
-# define END_OF_INSTR()
-# define END_OF_INSTR_NO_TRACE()
-#endif
-
-#ifdef DEBUG
-# define CALL_TRACE(u,v,w,x,s) \
- if (DEBUG_TRACECALLREGS()) \
- x86emu_dump_regs(); \
- if (DEBUG_TRACECALL()) \
- printk("%04x:%04x: CALL %s%04x:%04x\n", u , v, s, w, x);
-# define RETURN_TRACE(n,u,v) \
- if (DEBUG_TRACECALLREGS()) \
- x86emu_dump_regs(); \
- if (DEBUG_TRACECALL()) \
- printk("%04x:%04x: %s\n",u,v,n);
-#else
-# define CALL_TRACE(u,v,w,x,s)
-# define RETURN_TRACE(n,u,v)
-#endif
-
-#ifdef DEBUG
-#define DB(x) x
-#else
-#define DB(x)
-#endif
-
-/*-------------------------- Function Prototypes --------------------------*/
-
-#ifdef __cplusplus
-extern "C" { /* Use "C" linkage when in C++ mode */
-#endif
-
-extern void x86emu_inc_decoded_inst_len (int x);
-extern void x86emu_decode_printf (char *x);
-extern void x86emu_decode_printf2 (char *x, int y);
-extern void x86emu_just_disassemble (void);
-extern void x86emu_single_step (void);
-extern void x86emu_end_instr (void);
-extern void x86emu_dump_regs (void);
-extern void x86emu_dump_xregs (void);
-extern void x86emu_print_int_vect (u16 iv);
-extern void x86emu_instrument_instruction (void);
-extern void x86emu_check_ip_access (void);
-extern void x86emu_check_sp_access (void);
-extern void x86emu_check_mem_access (u32 p);
-extern void x86emu_check_data_access (uint s, uint o);
-
-#ifdef __cplusplus
-} /* End of "C" linkage for C++ */
-#endif
-
-#endif /* __X86EMU_DEBUG_H */
diff --git a/board/MAI/bios_emulator/scitech/src/x86emu/x86emu/decode.h b/board/MAI/bios_emulator/scitech/src/x86emu/x86emu/decode.h
deleted file mode 100644
index 321a345399..0000000000
--- a/board/MAI/bios_emulator/scitech/src/x86emu/x86emu/decode.h
+++ /dev/null
@@ -1,87 +0,0 @@
-/****************************************************************************
-*
-* Realmode X86 Emulator Library
-*
-* Copyright (C) 1996-1999 SciTech Software, Inc.
-* Copyright (C) David Mosberger-Tang
-* Copyright (C) 1999 Egbert Eich
-*
-* ========================================================================
-*
-* Permission to use, copy, modify, distribute, and sell this software and
-* its documentation for any purpose is hereby granted without fee,
-* provided that the above copyright notice appear in all copies and that
-* both that copyright notice and this permission notice appear in
-* supporting documentation, and that the name of the authors not be used
-* in advertising or publicity pertaining to distribution of the software
-* without specific, written prior permission. The authors makes no
-* representations about the suitability of this software for any purpose.
-* It is provided "as is" without express or implied warranty.
-*
-* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
-* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
-* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
-* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
-* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
-* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
-* PERFORMANCE OF THIS SOFTWARE.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-* Developer: Kendall Bennett
-*
-* Description: Header file for instruction decoding logic.
-*
-****************************************************************************/
-
-#ifndef __X86EMU_DECODE_H
-#define __X86EMU_DECODE_H
-
-/*---------------------- Macros and type definitions ----------------------*/
-
-/* Instruction Decoding Stuff */
-
-#define FETCH_DECODE_MODRM(mod,rh,rl) fetch_decode_modrm(&mod,&rh,&rl)
-#define DECODE_RM_BYTE_REGISTER(r) decode_rm_byte_register(r)
-#define DECODE_RM_WORD_REGISTER(r) decode_rm_word_register(r)
-#define DECODE_RM_LONG_REGISTER(r) decode_rm_long_register(r)
-#define DECODE_CLEAR_SEGOVR() M.x86.mode &= ~SYSMODE_CLRMASK
-
-/*-------------------------- Function Prototypes --------------------------*/
-
-#ifdef __cplusplus
-extern "C" { /* Use "C" linkage when in C++ mode */
-#endif
-
-void x86emu_intr_raise (u8 type);
-void fetch_decode_modrm (int *mod,int *regh,int *regl);
-u8 fetch_byte_imm (void);
-u16 fetch_word_imm (void);
-u32 fetch_long_imm (void);
-u8 fetch_data_byte (uint offset);
-u8 fetch_data_byte_abs (uint segment, uint offset);
-u16 fetch_data_word (uint offset);
-u16 fetch_data_word_abs (uint segment, uint offset);
-u32 fetch_data_long (uint offset);
-u32 fetch_data_long_abs (uint segment, uint offset);
-void store_data_byte (uint offset, u8 val);
-void store_data_byte_abs (uint segment, uint offset, u8 val);
-void store_data_word (uint offset, u16 val);
-void store_data_word_abs (uint segment, uint offset, u16 val);
-void store_data_long (uint offset, u32 val);
-void store_data_long_abs (uint segment, uint offset, u32 val);
-u8* decode_rm_byte_register(int reg);
-u16* decode_rm_word_register(int reg);
-u32* decode_rm_long_register(int reg);
-u16* decode_rm_seg_register(int reg);
-unsigned decode_rm00_address(int rm);
-unsigned decode_rm01_address(int rm);
-unsigned decode_rm10_address(int rm);
-
-#ifdef __cplusplus
-} /* End of "C" linkage for C++ */
-#endif
-
-#endif /* __X86EMU_DECODE_H */
diff --git a/board/MAI/bios_emulator/scitech/src/x86emu/x86emu/fpu.h b/board/MAI/bios_emulator/scitech/src/x86emu/x86emu/fpu.h
deleted file mode 100644
index 5fb271463b..0000000000
--- a/board/MAI/bios_emulator/scitech/src/x86emu/x86emu/fpu.h
+++ /dev/null
@@ -1,61 +0,0 @@
-/****************************************************************************
-*
-* Realmode X86 Emulator Library
-*
-* Copyright (C) 1996-1999 SciTech Software, Inc.
-* Copyright (C) David Mosberger-Tang
-* Copyright (C) 1999 Egbert Eich
-*
-* ========================================================================
-*
-* Permission to use, copy, modify, distribute, and sell this software and
-* its documentation for any purpose is hereby granted without fee,
-* provided that the above copyright notice appear in all copies and that
-* both that copyright notice and this permission notice appear in
-* supporting documentation, and that the name of the authors not be used
-* in advertising or publicity pertaining to distribution of the software
-* without specific, written prior permission. The authors makes no
-* representations about the suitability of this software for any purpose.
-* It is provided "as is" without express or implied warranty.
-*
-* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
-* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
-* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
-* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
-* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
-* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
-* PERFORMANCE OF THIS SOFTWARE.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-* Developer: Kendall Bennett
-*
-* Description: Header file for FPU instruction decoding.
-*
-****************************************************************************/
-
-#ifndef __X86EMU_FPU_H
-#define __X86EMU_FPU_H
-
-#ifdef __cplusplus
-extern "C" { /* Use "C" linkage when in C++ mode */
-#endif
-
-/* these have to be defined, whether 8087 support compiled in or not. */
-
-extern void x86emuOp_esc_coprocess_d8 (u8 op1);
-extern void x86emuOp_esc_coprocess_d9 (u8 op1);
-extern void x86emuOp_esc_coprocess_da (u8 op1);
-extern void x86emuOp_esc_coprocess_db (u8 op1);
-extern void x86emuOp_esc_coprocess_dc (u8 op1);
-extern void x86emuOp_esc_coprocess_dd (u8 op1);
-extern void x86emuOp_esc_coprocess_de (u8 op1);
-extern void x86emuOp_esc_coprocess_df (u8 op1);
-
-#ifdef __cplusplus
-} /* End of "C" linkage for C++ */
-#endif
-
-#endif /* __X86EMU_FPU_H */
diff --git a/board/MAI/bios_emulator/scitech/src/x86emu/x86emu/ops.h b/board/MAI/bios_emulator/scitech/src/x86emu/x86emu/ops.h
deleted file mode 100644
index 65ea676543..0000000000
--- a/board/MAI/bios_emulator/scitech/src/x86emu/x86emu/ops.h
+++ /dev/null
@@ -1,45 +0,0 @@
-/****************************************************************************
-*
-* Realmode X86 Emulator Library
-*
-* Copyright (C) 1996-1999 SciTech Software, Inc.
-* Copyright (C) David Mosberger-Tang
-* Copyright (C) 1999 Egbert Eich
-*
-* ========================================================================
-*
-* Permission to use, copy, modify, distribute, and sell this software and
-* its documentation for any purpose is hereby granted without fee,
-* provided that the above copyright notice appear in all copies and that
-* both that copyright notice and this permission notice appear in
-* supporting documentation, and that the name of the authors not be used
-* in advertising or publicity pertaining to distribution of the software
-* without specific, written prior permission. The authors makes no
-* representations about the suitability of this software for any purpose.
-* It is provided "as is" without express or implied warranty.
-*
-* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
-* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
-* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
-* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
-* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
-* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
-* PERFORMANCE OF THIS SOFTWARE.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-* Developer: Kendall Bennett
-*
-* Description: Header file for operand decoding functions.
-*
-****************************************************************************/
-
-#ifndef __X86EMU_OPS_H
-#define __X86EMU_OPS_H
-
-extern void (*x86emu_optab[0x100])(u8 op1);
-extern void (*x86emu_optab2[0x100])(u8 op2);
-
-#endif /* __X86EMU_OPS_H */
diff --git a/board/MAI/bios_emulator/scitech/src/x86emu/x86emu/prim_asm.h b/board/MAI/bios_emulator/scitech/src/x86emu/x86emu/prim_asm.h
deleted file mode 100644
index e023cf88da..0000000000
--- a/board/MAI/bios_emulator/scitech/src/x86emu/x86emu/prim_asm.h
+++ /dev/null
@@ -1,970 +0,0 @@
-/****************************************************************************
-*
-* Realmode X86 Emulator Library
-*
-* Copyright (C) 1996-1999 SciTech Software, Inc.
-* Copyright (C) David Mosberger-Tang
-* Copyright (C) 1999 Egbert Eich
-*
-* ========================================================================
-*
-* Permission to use, copy, modify, distribute, and sell this software and
-* its documentation for any purpose is hereby granted without fee,
-* provided that the above copyright notice appear in all copies and that
-* both that copyright notice and this permission notice appear in
-* supporting documentation, and that the name of the authors not be used
-* in advertising or publicity pertaining to distribution of the software
-* without specific, written prior permission. The authors makes no
-* representations about the suitability of this software for any purpose.
-* It is provided "as is" without express or implied warranty.
-*
-* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
-* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
-* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
-* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
-* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
-* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
-* PERFORMANCE OF THIS SOFTWARE.
-*
-* ========================================================================
-*
-* Language: Watcom C++ 10.6 or later
-* Environment: Any
-* Developer: Kendall Bennett
-*
-* Description: Inline assembler versions of the primitive operand
-* functions for faster performance. At the moment this is
-* x86 inline assembler, but these functions could be replaced
-* with native inline assembler for each supported processor
-* platform.
-*
-****************************************************************************/
-
-#ifndef __X86EMU_PRIM_ASM_H
-#define __X86EMU_PRIM_ASM_H
-
-#ifdef __WATCOMC__
-
-#ifndef VALIDATE
-#define __HAVE_INLINE_ASSEMBLER__
-#endif
-
-u32 get_flags_asm(void);
-#pragma aux get_flags_asm = \
- "pushf" \
- "pop eax" \
- value [eax] \
- modify exact [eax];
-
-u16 aaa_word_asm(u32 *flags,u16 d);
-#pragma aux aaa_word_asm = \
- "push [edi]" \
- "popf" \
- "aaa" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [ax] \
- value [ax] \
- modify exact [ax];
-
-u16 aas_word_asm(u32 *flags,u16 d);
-#pragma aux aas_word_asm = \
- "push [edi]" \
- "popf" \
- "aas" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [ax] \
- value [ax] \
- modify exact [ax];
-
-u16 aad_word_asm(u32 *flags,u16 d);
-#pragma aux aad_word_asm = \
- "push [edi]" \
- "popf" \
- "aad" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [ax] \
- value [ax] \
- modify exact [ax];
-
-u16 aam_word_asm(u32 *flags,u8 d);
-#pragma aux aam_word_asm = \
- "push [edi]" \
- "popf" \
- "aam" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [al] \
- value [ax] \
- modify exact [ax];
-
-u8 adc_byte_asm(u32 *flags,u8 d, u8 s);
-#pragma aux adc_byte_asm = \
- "push [edi]" \
- "popf" \
- "adc al,bl" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [al] [bl] \
- value [al] \
- modify exact [al bl];
-
-u16 adc_word_asm(u32 *flags,u16 d, u16 s);
-#pragma aux adc_word_asm = \
- "push [edi]" \
- "popf" \
- "adc ax,bx" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [ax] [bx] \
- value [ax] \
- modify exact [ax bx];
-
-u32 adc_long_asm(u32 *flags,u32 d, u32 s);
-#pragma aux adc_long_asm = \
- "push [edi]" \
- "popf" \
- "adc eax,ebx" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [eax] [ebx] \
- value [eax] \
- modify exact [eax ebx];
-
-u8 add_byte_asm(u32 *flags,u8 d, u8 s);
-#pragma aux add_byte_asm = \
- "push [edi]" \
- "popf" \
- "add al,bl" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [al] [bl] \
- value [al] \
- modify exact [al bl];
-
-u16 add_word_asm(u32 *flags,u16 d, u16 s);
-#pragma aux add_word_asm = \
- "push [edi]" \
- "popf" \
- "add ax,bx" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [ax] [bx] \
- value [ax] \
- modify exact [ax bx];
-
-u32 add_long_asm(u32 *flags,u32 d, u32 s);
-#pragma aux add_long_asm = \
- "push [edi]" \
- "popf" \
- "add eax,ebx" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [eax] [ebx] \
- value [eax] \
- modify exact [eax ebx];
-
-u8 and_byte_asm(u32 *flags,u8 d, u8 s);
-#pragma aux and_byte_asm = \
- "push [edi]" \
- "popf" \
- "and al,bl" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [al] [bl] \
- value [al] \
- modify exact [al bl];
-
-u16 and_word_asm(u32 *flags,u16 d, u16 s);
-#pragma aux and_word_asm = \
- "push [edi]" \
- "popf" \
- "and ax,bx" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [ax] [bx] \
- value [ax] \
- modify exact [ax bx];
-
-u32 and_long_asm(u32 *flags,u32 d, u32 s);
-#pragma aux and_long_asm = \
- "push [edi]" \
- "popf" \
- "and eax,ebx" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [eax] [ebx] \
- value [eax] \
- modify exact [eax ebx];
-
-u8 cmp_byte_asm(u32 *flags,u8 d, u8 s);
-#pragma aux cmp_byte_asm = \
- "push [edi]" \
- "popf" \
- "cmp al,bl" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [al] [bl] \
- value [al] \
- modify exact [al bl];
-
-u16 cmp_word_asm(u32 *flags,u16 d, u16 s);
-#pragma aux cmp_word_asm = \
- "push [edi]" \
- "popf" \
- "cmp ax,bx" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [ax] [bx] \
- value [ax] \
- modify exact [ax bx];
-
-u32 cmp_long_asm(u32 *flags,u32 d, u32 s);
-#pragma aux cmp_long_asm = \
- "push [edi]" \
- "popf" \
- "cmp eax,ebx" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [eax] [ebx] \
- value [eax] \
- modify exact [eax ebx];
-
-u8 daa_byte_asm(u32 *flags,u8 d);
-#pragma aux daa_byte_asm = \
- "push [edi]" \
- "popf" \
- "daa" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [al] \
- value [al] \
- modify exact [al];
-
-u8 das_byte_asm(u32 *flags,u8 d);
-#pragma aux das_byte_asm = \
- "push [edi]" \
- "popf" \
- "das" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [al] \
- value [al] \
- modify exact [al];
-
-u8 dec_byte_asm(u32 *flags,u8 d);
-#pragma aux dec_byte_asm = \
- "push [edi]" \
- "popf" \
- "dec al" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [al] \
- value [al] \
- modify exact [al];
-
-u16 dec_word_asm(u32 *flags,u16 d);
-#pragma aux dec_word_asm = \
- "push [edi]" \
- "popf" \
- "dec ax" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [ax] \
- value [ax] \
- modify exact [ax];
-
-u32 dec_long_asm(u32 *flags,u32 d);
-#pragma aux dec_long_asm = \
- "push [edi]" \
- "popf" \
- "dec eax" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [eax] \
- value [eax] \
- modify exact [eax];
-
-u8 inc_byte_asm(u32 *flags,u8 d);
-#pragma aux inc_byte_asm = \
- "push [edi]" \
- "popf" \
- "inc al" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [al] \
- value [al] \
- modify exact [al];
-
-u16 inc_word_asm(u32 *flags,u16 d);
-#pragma aux inc_word_asm = \
- "push [edi]" \
- "popf" \
- "inc ax" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [ax] \
- value [ax] \
- modify exact [ax];
-
-u32 inc_long_asm(u32 *flags,u32 d);
-#pragma aux inc_long_asm = \
- "push [edi]" \
- "popf" \
- "inc eax" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [eax] \
- value [eax] \
- modify exact [eax];
-
-u8 or_byte_asm(u32 *flags,u8 d, u8 s);
-#pragma aux or_byte_asm = \
- "push [edi]" \
- "popf" \
- "or al,bl" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [al] [bl] \
- value [al] \
- modify exact [al bl];
-
-u16 or_word_asm(u32 *flags,u16 d, u16 s);
-#pragma aux or_word_asm = \
- "push [edi]" \
- "popf" \
- "or ax,bx" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [ax] [bx] \
- value [ax] \
- modify exact [ax bx];
-
-u32 or_long_asm(u32 *flags,u32 d, u32 s);
-#pragma aux or_long_asm = \
- "push [edi]" \
- "popf" \
- "or eax,ebx" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [eax] [ebx] \
- value [eax] \
- modify exact [eax ebx];
-
-u8 neg_byte_asm(u32 *flags,u8 d);
-#pragma aux neg_byte_asm = \
- "push [edi]" \
- "popf" \
- "neg al" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [al] \
- value [al] \
- modify exact [al];
-
-u16 neg_word_asm(u32 *flags,u16 d);
-#pragma aux neg_word_asm = \
- "push [edi]" \
- "popf" \
- "neg ax" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [ax] \
- value [ax] \
- modify exact [ax];
-
-u32 neg_long_asm(u32 *flags,u32 d);
-#pragma aux neg_long_asm = \
- "push [edi]" \
- "popf" \
- "neg eax" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [eax] \
- value [eax] \
- modify exact [eax];
-
-u8 not_byte_asm(u32 *flags,u8 d);
-#pragma aux not_byte_asm = \
- "push [edi]" \
- "popf" \
- "not al" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [al] \
- value [al] \
- modify exact [al];
-
-u16 not_word_asm(u32 *flags,u16 d);
-#pragma aux not_word_asm = \
- "push [edi]" \
- "popf" \
- "not ax" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [ax] \
- value [ax] \
- modify exact [ax];
-
-u32 not_long_asm(u32 *flags,u32 d);
-#pragma aux not_long_asm = \
- "push [edi]" \
- "popf" \
- "not eax" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [eax] \
- value [eax] \
- modify exact [eax];
-
-u8 rcl_byte_asm(u32 *flags,u8 d, u8 s);
-#pragma aux rcl_byte_asm = \
- "push [edi]" \
- "popf" \
- "rcl al,cl" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [al] [cl] \
- value [al] \
- modify exact [al cl];
-
-u16 rcl_word_asm(u32 *flags,u16 d, u8 s);
-#pragma aux rcl_word_asm = \
- "push [edi]" \
- "popf" \
- "rcl ax,cl" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [ax] [cl] \
- value [ax] \
- modify exact [ax cl];
-
-u32 rcl_long_asm(u32 *flags,u32 d, u8 s);
-#pragma aux rcl_long_asm = \
- "push [edi]" \
- "popf" \
- "rcl eax,cl" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [eax] [cl] \
- value [eax] \
- modify exact [eax cl];
-
-u8 rcr_byte_asm(u32 *flags,u8 d, u8 s);
-#pragma aux rcr_byte_asm = \
- "push [edi]" \
- "popf" \
- "rcr al,cl" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [al] [cl] \
- value [al] \
- modify exact [al cl];
-
-u16 rcr_word_asm(u32 *flags,u16 d, u8 s);
-#pragma aux rcr_word_asm = \
- "push [edi]" \
- "popf" \
- "rcr ax,cl" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [ax] [cl] \
- value [ax] \
- modify exact [ax cl];
-
-u32 rcr_long_asm(u32 *flags,u32 d, u8 s);
-#pragma aux rcr_long_asm = \
- "push [edi]" \
- "popf" \
- "rcr eax,cl" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [eax] [cl] \
- value [eax] \
- modify exact [eax cl];
-
-u8 rol_byte_asm(u32 *flags,u8 d, u8 s);
-#pragma aux rol_byte_asm = \
- "push [edi]" \
- "popf" \
- "rol al,cl" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [al] [cl] \
- value [al] \
- modify exact [al cl];
-
-u16 rol_word_asm(u32 *flags,u16 d, u8 s);
-#pragma aux rol_word_asm = \
- "push [edi]" \
- "popf" \
- "rol ax,cl" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [ax] [cl] \
- value [ax] \
- modify exact [ax cl];
-
-u32 rol_long_asm(u32 *flags,u32 d, u8 s);
-#pragma aux rol_long_asm = \
- "push [edi]" \
- "popf" \
- "rol eax,cl" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [eax] [cl] \
- value [eax] \
- modify exact [eax cl];
-
-u8 ror_byte_asm(u32 *flags,u8 d, u8 s);
-#pragma aux ror_byte_asm = \
- "push [edi]" \
- "popf" \
- "ror al,cl" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [al] [cl] \
- value [al] \
- modify exact [al cl];
-
-u16 ror_word_asm(u32 *flags,u16 d, u8 s);
-#pragma aux ror_word_asm = \
- "push [edi]" \
- "popf" \
- "ror ax,cl" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [ax] [cl] \
- value [ax] \
- modify exact [ax cl];
-
-u32 ror_long_asm(u32 *flags,u32 d, u8 s);
-#pragma aux ror_long_asm = \
- "push [edi]" \
- "popf" \
- "ror eax,cl" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [eax] [cl] \
- value [eax] \
- modify exact [eax cl];
-
-u8 shl_byte_asm(u32 *flags,u8 d, u8 s);
-#pragma aux shl_byte_asm = \
- "push [edi]" \
- "popf" \
- "shl al,cl" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [al] [cl] \
- value [al] \
- modify exact [al cl];
-
-u16 shl_word_asm(u32 *flags,u16 d, u8 s);
-#pragma aux shl_word_asm = \
- "push [edi]" \
- "popf" \
- "shl ax,cl" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [ax] [cl] \
- value [ax] \
- modify exact [ax cl];
-
-u32 shl_long_asm(u32 *flags,u32 d, u8 s);
-#pragma aux shl_long_asm = \
- "push [edi]" \
- "popf" \
- "shl eax,cl" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [eax] [cl] \
- value [eax] \
- modify exact [eax cl];
-
-u8 shr_byte_asm(u32 *flags,u8 d, u8 s);
-#pragma aux shr_byte_asm = \
- "push [edi]" \
- "popf" \
- "shr al,cl" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [al] [cl] \
- value [al] \
- modify exact [al cl];
-
-u16 shr_word_asm(u32 *flags,u16 d, u8 s);
-#pragma aux shr_word_asm = \
- "push [edi]" \
- "popf" \
- "shr ax,cl" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [ax] [cl] \
- value [ax] \
- modify exact [ax cl];
-
-u32 shr_long_asm(u32 *flags,u32 d, u8 s);
-#pragma aux shr_long_asm = \
- "push [edi]" \
- "popf" \
- "shr eax,cl" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [eax] [cl] \
- value [eax] \
- modify exact [eax cl];
-
-u8 sar_byte_asm(u32 *flags,u8 d, u8 s);
-#pragma aux sar_byte_asm = \
- "push [edi]" \
- "popf" \
- "sar al,cl" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [al] [cl] \
- value [al] \
- modify exact [al cl];
-
-u16 sar_word_asm(u32 *flags,u16 d, u8 s);
-#pragma aux sar_word_asm = \
- "push [edi]" \
- "popf" \
- "sar ax,cl" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [ax] [cl] \
- value [ax] \
- modify exact [ax cl];
-
-u32 sar_long_asm(u32 *flags,u32 d, u8 s);
-#pragma aux sar_long_asm = \
- "push [edi]" \
- "popf" \
- "sar eax,cl" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [eax] [cl] \
- value [eax] \
- modify exact [eax cl];
-
-u16 shld_word_asm(u32 *flags,u16 d, u16 fill, u8 s);
-#pragma aux shld_word_asm = \
- "push [edi]" \
- "popf" \
- "shld ax,dx,cl" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [ax] [dx] [cl] \
- value [ax] \
- modify exact [ax dx cl];
-
-u32 shld_long_asm(u32 *flags,u32 d, u32 fill, u8 s);
-#pragma aux shld_long_asm = \
- "push [edi]" \
- "popf" \
- "shld eax,edx,cl" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [eax] [edx] [cl] \
- value [eax] \
- modify exact [eax edx cl];
-
-u16 shrd_word_asm(u32 *flags,u16 d, u16 fill, u8 s);
-#pragma aux shrd_word_asm = \
- "push [edi]" \
- "popf" \
- "shrd ax,dx,cl" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [ax] [dx] [cl] \
- value [ax] \
- modify exact [ax dx cl];
-
-u32 shrd_long_asm(u32 *flags,u32 d, u32 fill, u8 s);
-#pragma aux shrd_long_asm = \
- "push [edi]" \
- "popf" \
- "shrd eax,edx,cl" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [eax] [edx] [cl] \
- value [eax] \
- modify exact [eax edx cl];
-
-u8 sbb_byte_asm(u32 *flags,u8 d, u8 s);
-#pragma aux sbb_byte_asm = \
- "push [edi]" \
- "popf" \
- "sbb al,bl" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [al] [bl] \
- value [al] \
- modify exact [al bl];
-
-u16 sbb_word_asm(u32 *flags,u16 d, u16 s);
-#pragma aux sbb_word_asm = \
- "push [edi]" \
- "popf" \
- "sbb ax,bx" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [ax] [bx] \
- value [ax] \
- modify exact [ax bx];
-
-u32 sbb_long_asm(u32 *flags,u32 d, u32 s);
-#pragma aux sbb_long_asm = \
- "push [edi]" \
- "popf" \
- "sbb eax,ebx" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [eax] [ebx] \
- value [eax] \
- modify exact [eax ebx];
-
-u8 sub_byte_asm(u32 *flags,u8 d, u8 s);
-#pragma aux sub_byte_asm = \
- "push [edi]" \
- "popf" \
- "sub al,bl" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [al] [bl] \
- value [al] \
- modify exact [al bl];
-
-u16 sub_word_asm(u32 *flags,u16 d, u16 s);
-#pragma aux sub_word_asm = \
- "push [edi]" \
- "popf" \
- "sub ax,bx" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [ax] [bx] \
- value [ax] \
- modify exact [ax bx];
-
-u32 sub_long_asm(u32 *flags,u32 d, u32 s);
-#pragma aux sub_long_asm = \
- "push [edi]" \
- "popf" \
- "sub eax,ebx" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [eax] [ebx] \
- value [eax] \
- modify exact [eax ebx];
-
-void test_byte_asm(u32 *flags,u8 d, u8 s);
-#pragma aux test_byte_asm = \
- "push [edi]" \
- "popf" \
- "test al,bl" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [al] [bl] \
- modify exact [al bl];
-
-void test_word_asm(u32 *flags,u16 d, u16 s);
-#pragma aux test_word_asm = \
- "push [edi]" \
- "popf" \
- "test ax,bx" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [ax] [bx] \
- modify exact [ax bx];
-
-void test_long_asm(u32 *flags,u32 d, u32 s);
-#pragma aux test_long_asm = \
- "push [edi]" \
- "popf" \
- "test eax,ebx" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [eax] [ebx] \
- modify exact [eax ebx];
-
-u8 xor_byte_asm(u32 *flags,u8 d, u8 s);
-#pragma aux xor_byte_asm = \
- "push [edi]" \
- "popf" \
- "xor al,bl" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [al] [bl] \
- value [al] \
- modify exact [al bl];
-
-u16 xor_word_asm(u32 *flags,u16 d, u16 s);
-#pragma aux xor_word_asm = \
- "push [edi]" \
- "popf" \
- "xor ax,bx" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [ax] [bx] \
- value [ax] \
- modify exact [ax bx];
-
-u32 xor_long_asm(u32 *flags,u32 d, u32 s);
-#pragma aux xor_long_asm = \
- "push [edi]" \
- "popf" \
- "xor eax,ebx" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [eax] [ebx] \
- value [eax] \
- modify exact [eax ebx];
-
-void imul_byte_asm(u32 *flags,u16 *ax,u8 d,u8 s);
-#pragma aux imul_byte_asm = \
- "push [edi]" \
- "popf" \
- "imul bl" \
- "pushf" \
- "pop [edi]" \
- "mov [esi],ax" \
- parm [edi] [esi] [al] [bl] \
- modify exact [esi ax bl];
-
-void imul_word_asm(u32 *flags,u16 *ax,u16 *dx,u16 d,u16 s);
-#pragma aux imul_word_asm = \
- "push [edi]" \
- "popf" \
- "imul bx" \
- "pushf" \
- "pop [edi]" \
- "mov [esi],ax" \
- "mov [ecx],dx" \
- parm [edi] [esi] [ecx] [ax] [bx]\
- modify exact [esi edi ax bx dx];
-
-void imul_long_asm(u32 *flags,u32 *eax,u32 *edx,u32 d,u32 s);
-#pragma aux imul_long_asm = \
- "push [edi]" \
- "popf" \
- "imul ebx" \
- "pushf" \
- "pop [edi]" \
- "mov [esi],eax" \
- "mov [ecx],edx" \
- parm [edi] [esi] [ecx] [eax] [ebx] \
- modify exact [esi edi eax ebx edx];
-
-void mul_byte_asm(u32 *flags,u16 *ax,u8 d,u8 s);
-#pragma aux mul_byte_asm = \
- "push [edi]" \
- "popf" \
- "mul bl" \
- "pushf" \
- "pop [edi]" \
- "mov [esi],ax" \
- parm [edi] [esi] [al] [bl] \
- modify exact [esi ax bl];
-
-void mul_word_asm(u32 *flags,u16 *ax,u16 *dx,u16 d,u16 s);
-#pragma aux mul_word_asm = \
- "push [edi]" \
- "popf" \
- "mul bx" \
- "pushf" \
- "pop [edi]" \
- "mov [esi],ax" \
- "mov [ecx],dx" \
- parm [edi] [esi] [ecx] [ax] [bx]\
- modify exact [esi edi ax bx dx];
-
-void mul_long_asm(u32 *flags,u32 *eax,u32 *edx,u32 d,u32 s);
-#pragma aux mul_long_asm = \
- "push [edi]" \
- "popf" \
- "mul ebx" \
- "pushf" \
- "pop [edi]" \
- "mov [esi],eax" \
- "mov [ecx],edx" \
- parm [edi] [esi] [ecx] [eax] [ebx] \
- modify exact [esi edi eax ebx edx];
-
-void idiv_byte_asm(u32 *flags,u8 *al,u8 *ah,u16 d,u8 s);
-#pragma aux idiv_byte_asm = \
- "push [edi]" \
- "popf" \
- "idiv bl" \
- "pushf" \
- "pop [edi]" \
- "mov [esi],al" \
- "mov [ecx],ah" \
- parm [edi] [esi] [ecx] [ax] [bl]\
- modify exact [esi edi ax bl];
-
-void idiv_word_asm(u32 *flags,u16 *ax,u16 *dx,u16 dlo,u16 dhi,u16 s);
-#pragma aux idiv_word_asm = \
- "push [edi]" \
- "popf" \
- "idiv bx" \
- "pushf" \
- "pop [edi]" \
- "mov [esi],ax" \
- "mov [ecx],dx" \
- parm [edi] [esi] [ecx] [ax] [dx] [bx]\
- modify exact [esi edi ax dx bx];
-
-void idiv_long_asm(u32 *flags,u32 *eax,u32 *edx,u32 dlo,u32 dhi,u32 s);
-#pragma aux idiv_long_asm = \
- "push [edi]" \
- "popf" \
- "idiv ebx" \
- "pushf" \
- "pop [edi]" \
- "mov [esi],eax" \
- "mov [ecx],edx" \
- parm [edi] [esi] [ecx] [eax] [edx] [ebx]\
- modify exact [esi edi eax edx ebx];
-
-void div_byte_asm(u32 *flags,u8 *al,u8 *ah,u16 d,u8 s);
-#pragma aux div_byte_asm = \
- "push [edi]" \
- "popf" \
- "div bl" \
- "pushf" \
- "pop [edi]" \
- "mov [esi],al" \
- "mov [ecx],ah" \
- parm [edi] [esi] [ecx] [ax] [bl]\
- modify exact [esi edi ax bl];
-
-void div_word_asm(u32 *flags,u16 *ax,u16 *dx,u16 dlo,u16 dhi,u16 s);
-#pragma aux div_word_asm = \
- "push [edi]" \
- "popf" \
- "div bx" \
- "pushf" \
- "pop [edi]" \
- "mov [esi],ax" \
- "mov [ecx],dx" \
- parm [edi] [esi] [ecx] [ax] [dx] [bx]\
- modify exact [esi edi ax dx bx];
-
-void div_long_asm(u32 *flags,u32 *eax,u32 *edx,u32 dlo,u32 dhi,u32 s);
-#pragma aux div_long_asm = \
- "push [edi]" \
- "popf" \
- "div ebx" \
- "pushf" \
- "pop [edi]" \
- "mov [esi],eax" \
- "mov [ecx],edx" \
- parm [edi] [esi] [ecx] [eax] [edx] [ebx]\
- modify exact [esi edi eax edx ebx];
-
-#endif
-
-#endif /* __X86EMU_PRIM_ASM_H */
diff --git a/board/MAI/bios_emulator/scitech/src/x86emu/x86emu/prim_ops.h b/board/MAI/bios_emulator/scitech/src/x86emu/x86emu/prim_ops.h
deleted file mode 100644
index 1633fe1fae..0000000000
--- a/board/MAI/bios_emulator/scitech/src/x86emu/x86emu/prim_ops.h
+++ /dev/null
@@ -1,231 +0,0 @@
-/****************************************************************************
-*
-* Realmode X86 Emulator Library
-*
-* Copyright (C) 1996-1999 SciTech Software, Inc.
-* Copyright (C) David Mosberger-Tang
-* Copyright (C) 1999 Egbert Eich
-*
-* ========================================================================
-*
-* Permission to use, copy, modify, distribute, and sell this software and
-* its documentation for any purpose is hereby granted without fee,
-* provided that the above copyright notice appear in all copies and that
-* both that copyright notice and this permission notice appear in
-* supporting documentation, and that the name of the authors not be used
-* in advertising or publicity pertaining to distribution of the software
-* without specific, written prior permission. The authors makes no
-* representations about the suitability of this software for any purpose.
-* It is provided "as is" without express or implied warranty.
-*
-* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
-* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
-* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
-* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
-* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
-* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
-* PERFORMANCE OF THIS SOFTWARE.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-* Developer: Kendall Bennett
-*
-* Description: Header file for primitive operation functions.
-*
-****************************************************************************/
-
-#ifndef __X86EMU_PRIM_OPS_H
-#define __X86EMU_PRIM_OPS_H
-
-#include "x86emu/prim_asm.h"
-
-#ifdef __cplusplus
-extern "C" { /* Use "C" linkage when in C++ mode */
-#endif
-
-u16 aaa_word (u16 d);
-u16 aas_word (u16 d);
-u16 aad_word (u16 d);
-u16 aam_word (u8 d);
-u8 adc_byte (u8 d, u8 s);
-u16 adc_word (u16 d, u16 s);
-u32 adc_long (u32 d, u32 s);
-u8 add_byte (u8 d, u8 s);
-u16 add_word (u16 d, u16 s);
-u32 add_long (u32 d, u32 s);
-u8 and_byte (u8 d, u8 s);
-u16 and_word (u16 d, u16 s);
-u32 and_long (u32 d, u32 s);
-u8 cmp_byte (u8 d, u8 s);
-u16 cmp_word (u16 d, u16 s);
-u32 cmp_long (u32 d, u32 s);
-u8 daa_byte (u8 d);
-u8 das_byte (u8 d);
-u8 dec_byte (u8 d);
-u16 dec_word (u16 d);
-u32 dec_long (u32 d);
-u8 inc_byte (u8 d);
-u16 inc_word (u16 d);
-u32 inc_long (u32 d);
-u8 or_byte (u8 d, u8 s);
-u16 or_word (u16 d, u16 s);
-u32 or_long (u32 d, u32 s);
-u8 neg_byte (u8 s);
-u16 neg_word (u16 s);
-u32 neg_long (u32 s);
-u8 not_byte (u8 s);
-u16 not_word (u16 s);
-u32 not_long (u32 s);
-u8 rcl_byte (u8 d, u8 s);
-u16 rcl_word (u16 d, u8 s);
-u32 rcl_long (u32 d, u8 s);
-u8 rcr_byte (u8 d, u8 s);
-u16 rcr_word (u16 d, u8 s);
-u32 rcr_long (u32 d, u8 s);
-u8 rol_byte (u8 d, u8 s);
-u16 rol_word (u16 d, u8 s);
-u32 rol_long (u32 d, u8 s);
-u8 ror_byte (u8 d, u8 s);
-u16 ror_word (u16 d, u8 s);
-u32 ror_long (u32 d, u8 s);
-u8 shl_byte (u8 d, u8 s);
-u16 shl_word (u16 d, u8 s);
-u32 shl_long (u32 d, u8 s);
-u8 shr_byte (u8 d, u8 s);
-u16 shr_word (u16 d, u8 s);
-u32 shr_long (u32 d, u8 s);
-u8 sar_byte (u8 d, u8 s);
-u16 sar_word (u16 d, u8 s);
-u32 sar_long (u32 d, u8 s);
-u16 shld_word (u16 d, u16 fill, u8 s);
-u32 shld_long (u32 d, u32 fill, u8 s);
-u16 shrd_word (u16 d, u16 fill, u8 s);
-u32 shrd_long (u32 d, u32 fill, u8 s);
-u8 sbb_byte (u8 d, u8 s);
-u16 sbb_word (u16 d, u16 s);
-u32 sbb_long (u32 d, u32 s);
-u8 sub_byte (u8 d, u8 s);
-u16 sub_word (u16 d, u16 s);
-u32 sub_long (u32 d, u32 s);
-void test_byte (u8 d, u8 s);
-void test_word (u16 d, u16 s);
-void test_long (u32 d, u32 s);
-u8 xor_byte (u8 d, u8 s);
-u16 xor_word (u16 d, u16 s);
-u32 xor_long (u32 d, u32 s);
-void imul_byte (u8 s);
-void imul_word (u16 s);
-void imul_long (u32 s);
-void imul_long_direct(u32 *res_lo, u32* res_hi,u32 d, u32 s);
-void mul_byte (u8 s);
-void mul_word (u16 s);
-void mul_long (u32 s);
-void idiv_byte (u8 s);
-void idiv_word (u16 s);
-void idiv_long (u32 s);
-void div_byte (u8 s);
-void div_word (u16 s);
-void div_long (u32 s);
-void ins (int size);
-void outs (int size);
-u16 mem_access_word (int addr);
-void push_word (u16 w);
-void push_long (u32 w);
-u16 pop_word (void);
-u32 pop_long (void);
-
-#if defined(__HAVE_INLINE_ASSEMBLER__) && !defined(PRIM_OPS_NO_REDEFINE_ASM)
-
-#define aaa_word(d) aaa_word_asm(&M.x86.R_EFLG,d)
-#define aas_word(d) aas_word_asm(&M.x86.R_EFLG,d)
-#define aad_word(d) aad_word_asm(&M.x86.R_EFLG,d)
-#define aam_word(d) aam_word_asm(&M.x86.R_EFLG,d)
-#define adc_byte(d,s) adc_byte_asm(&M.x86.R_EFLG,d,s)
-#define adc_word(d,s) adc_word_asm(&M.x86.R_EFLG,d,s)
-#define adc_long(d,s) adc_long_asm(&M.x86.R_EFLG,d,s)
-#define add_byte(d,s) add_byte_asm(&M.x86.R_EFLG,d,s)
-#define add_word(d,s) add_word_asm(&M.x86.R_EFLG,d,s)
-#define add_long(d,s) add_long_asm(&M.x86.R_EFLG,d,s)
-#define and_byte(d,s) and_byte_asm(&M.x86.R_EFLG,d,s)
-#define and_word(d,s) and_word_asm(&M.x86.R_EFLG,d,s)
-#define and_long(d,s) and_long_asm(&M.x86.R_EFLG,d,s)
-#define cmp_byte(d,s) cmp_byte_asm(&M.x86.R_EFLG,d,s)
-#define cmp_word(d,s) cmp_word_asm(&M.x86.R_EFLG,d,s)
-#define cmp_long(d,s) cmp_long_asm(&M.x86.R_EFLG,d,s)
-#define daa_byte(d) daa_byte_asm(&M.x86.R_EFLG,d)
-#define das_byte(d) das_byte_asm(&M.x86.R_EFLG,d)
-#define dec_byte(d) dec_byte_asm(&M.x86.R_EFLG,d)
-#define dec_word(d) dec_word_asm(&M.x86.R_EFLG,d)
-#define dec_long(d) dec_long_asm(&M.x86.R_EFLG,d)
-#define inc_byte(d) inc_byte_asm(&M.x86.R_EFLG,d)
-#define inc_word(d) inc_word_asm(&M.x86.R_EFLG,d)
-#define inc_long(d) inc_long_asm(&M.x86.R_EFLG,d)
-#define or_byte(d,s) or_byte_asm(&M.x86.R_EFLG,d,s)
-#define or_word(d,s) or_word_asm(&M.x86.R_EFLG,d,s)
-#define or_long(d,s) or_long_asm(&M.x86.R_EFLG,d,s)
-#define neg_byte(s) neg_byte_asm(&M.x86.R_EFLG,s)
-#define neg_word(s) neg_word_asm(&M.x86.R_EFLG,s)
-#define neg_long(s) neg_long_asm(&M.x86.R_EFLG,s)
-#define not_byte(s) not_byte_asm(&M.x86.R_EFLG,s)
-#define not_word(s) not_word_asm(&M.x86.R_EFLG,s)
-#define not_long(s) not_long_asm(&M.x86.R_EFLG,s)
-#define rcl_byte(d,s) rcl_byte_asm(&M.x86.R_EFLG,d,s)
-#define rcl_word(d,s) rcl_word_asm(&M.x86.R_EFLG,d,s)
-#define rcl_long(d,s) rcl_long_asm(&M.x86.R_EFLG,d,s)
-#define rcr_byte(d,s) rcr_byte_asm(&M.x86.R_EFLG,d,s)
-#define rcr_word(d,s) rcr_word_asm(&M.x86.R_EFLG,d,s)
-#define rcr_long(d,s) rcr_long_asm(&M.x86.R_EFLG,d,s)
-#define rol_byte(d,s) rol_byte_asm(&M.x86.R_EFLG,d,s)
-#define rol_word(d,s) rol_word_asm(&M.x86.R_EFLG,d,s)
-#define rol_long(d,s) rol_long_asm(&M.x86.R_EFLG,d,s)
-#define ror_byte(d,s) ror_byte_asm(&M.x86.R_EFLG,d,s)
-#define ror_word(d,s) ror_word_asm(&M.x86.R_EFLG,d,s)
-#define ror_long(d,s) ror_long_asm(&M.x86.R_EFLG,d,s)
-#define shl_byte(d,s) shl_byte_asm(&M.x86.R_EFLG,d,s)
-#define shl_word(d,s) shl_word_asm(&M.x86.R_EFLG,d,s)
-#define shl_long(d,s) shl_long_asm(&M.x86.R_EFLG,d,s)
-#define shr_byte(d,s) shr_byte_asm(&M.x86.R_EFLG,d,s)
-#define shr_word(d,s) shr_word_asm(&M.x86.R_EFLG,d,s)
-#define shr_long(d,s) shr_long_asm(&M.x86.R_EFLG,d,s)
-#define sar_byte(d,s) sar_byte_asm(&M.x86.R_EFLG,d,s)
-#define sar_word(d,s) sar_word_asm(&M.x86.R_EFLG,d,s)
-#define sar_long(d,s) sar_long_asm(&M.x86.R_EFLG,d,s)
-#define shld_word(d,fill,s) shld_word_asm(&M.x86.R_EFLG,d,fill,s)
-#define shld_long(d,fill,s) shld_long_asm(&M.x86.R_EFLG,d,fill,s)
-#define shrd_word(d,fill,s) shrd_word_asm(&M.x86.R_EFLG,d,fill,s)
-#define shrd_long(d,fill,s) shrd_long_asm(&M.x86.R_EFLG,d,fill,s)
-#define sbb_byte(d,s) sbb_byte_asm(&M.x86.R_EFLG,d,s)
-#define sbb_word(d,s) sbb_word_asm(&M.x86.R_EFLG,d,s)
-#define sbb_long(d,s) sbb_long_asm(&M.x86.R_EFLG,d,s)
-#define sub_byte(d,s) sub_byte_asm(&M.x86.R_EFLG,d,s)
-#define sub_word(d,s) sub_word_asm(&M.x86.R_EFLG,d,s)
-#define sub_long(d,s) sub_long_asm(&M.x86.R_EFLG,d,s)
-#define test_byte(d,s) test_byte_asm(&M.x86.R_EFLG,d,s)
-#define test_word(d,s) test_word_asm(&M.x86.R_EFLG,d,s)
-#define test_long(d,s) test_long_asm(&M.x86.R_EFLG,d,s)
-#define xor_byte(d,s) xor_byte_asm(&M.x86.R_EFLG,d,s)
-#define xor_word(d,s) xor_word_asm(&M.x86.R_EFLG,d,s)
-#define xor_long(d,s) xor_long_asm(&M.x86.R_EFLG,d,s)
-#define imul_byte(s) imul_byte_asm(&M.x86.R_EFLG,&M.x86.R_AX,M.x86.R_AL,s)
-#define imul_word(s) imul_word_asm(&M.x86.R_EFLG,&M.x86.R_AX,&M.x86.R_DX,M.x86.R_AX,s)
-#define imul_long(s) imul_long_asm(&M.x86.R_EFLG,&M.x86.R_EAX,&M.x86.R_EDX,M.x86.R_EAX,s)
-#define imul_long_direct(res_lo,res_hi,d,s) imul_long_asm(&M.x86.R_EFLG,res_lo,res_hi,d,s)
-#define mul_byte(s) mul_byte_asm(&M.x86.R_EFLG,&M.x86.R_AX,M.x86.R_AL,s)
-#define mul_word(s) mul_word_asm(&M.x86.R_EFLG,&M.x86.R_AX,&M.x86.R_DX,M.x86.R_AX,s)
-#define mul_long(s) mul_long_asm(&M.x86.R_EFLG,&M.x86.R_EAX,&M.x86.R_EDX,M.x86.R_EAX,s)
-#define idiv_byte(s) idiv_byte_asm(&M.x86.R_EFLG,&M.x86.R_AL,&M.x86.R_AH,M.x86.R_AX,s)
-#define idiv_word(s) idiv_word_asm(&M.x86.R_EFLG,&M.x86.R_AX,&M.x86.R_DX,M.x86.R_AX,M.x86.R_DX,s)
-#define idiv_long(s) idiv_long_asm(&M.x86.R_EFLG,&M.x86.R_EAX,&M.x86.R_EDX,M.x86.R_EAX,M.x86.R_EDX,s)
-#define div_byte(s) div_byte_asm(&M.x86.R_EFLG,&M.x86.R_AL,&M.x86.R_AH,M.x86.R_AX,s)
-#define div_word(s) div_word_asm(&M.x86.R_EFLG,&M.x86.R_AX,&M.x86.R_DX,M.x86.R_AX,M.x86.R_DX,s)
-#define div_long(s) div_long_asm(&M.x86.R_EFLG,&M.x86.R_EAX,&M.x86.R_EDX,M.x86.R_EAX,M.x86.R_EDX,s)
-
-#endif
-
-#ifdef __cplusplus
-} /* End of "C" linkage for C++ */
-#endif
-
-#endif /* __X86EMU_PRIM_OPS_H */
diff --git a/board/MAI/bios_emulator/scitech/src/x86emu/x86emu/x86emui.h b/board/MAI/bios_emulator/scitech/src/x86emu/x86emu/x86emui.h
deleted file mode 100644
index bff49039e0..0000000000
--- a/board/MAI/bios_emulator/scitech/src/x86emu/x86emu/x86emui.h
+++ /dev/null
@@ -1,98 +0,0 @@
-/****************************************************************************
-*
-* Realmode X86 Emulator Library
-*
-* Copyright (C) 1996-1999 SciTech Software, Inc.
-* Copyright (C) David Mosberger-Tang
-* Copyright (C) 1999 Egbert Eich
-*
-* ========================================================================
-*
-* Permission to use, copy, modify, distribute, and sell this software and
-* its documentation for any purpose is hereby granted without fee,
-* provided that the above copyright notice appear in all copies and that
-* both that copyright notice and this permission notice appear in
-* supporting documentation, and that the name of the authors not be used
-* in advertising or publicity pertaining to distribution of the software
-* without specific, written prior permission. The authors makes no
-* representations about the suitability of this software for any purpose.
-* It is provided "as is" without express or implied warranty.
-*
-* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
-* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
-* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
-* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
-* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
-* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
-* PERFORMANCE OF THIS SOFTWARE.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-* Developer: Kendall Bennett
-*
-* Description: Header file for system specific functions. These functions
-* are always compiled and linked in the OS depedent libraries,
-* and never in a binary portable driver.
-*
-****************************************************************************/
-
-#ifndef __X86EMU_X86EMUI_H
-#define __X86EMU_X86EMUI_H
-
-/* If we are compiling in C++ mode, we can compile some functions as
- * inline to increase performance (however the code size increases quite
- * dramatically in this case).
- */
-
-#if defined(__cplusplus) && !defined(_NO_INLINE)
-#define _INLINE inline
-#else
-#define _INLINE static
-#endif
-
-/* Get rid of unused parameters in C++ compilation mode */
-
-#ifdef __cplusplus
-#define X86EMU_UNUSED(v)
-#else
-#define X86EMU_UNUSED(v) v
-#endif
-
-#include "x86emu.h"
-#include "x86emu/regs.h"
-#include "x86emu/debug.h"
-#include "x86emu/decode.h"
-#include "x86emu/ops.h"
-#include "x86emu/prim_ops.h"
-#include "x86emu/fpu.h"
-#include "x86emu/fpu_regs.h"
-#include <stdio.h>
-#include <string.h>
-
-/*--------------------------- Inline Functions ----------------------------*/
-
-#ifdef __cplusplus
-extern "C" { /* Use "C" linkage when in C++ mode */
-#endif
-
-extern u8 (X86APIP sys_rdb)(u32 addr);
-extern u16 (X86APIP sys_rdw)(u32 addr);
-extern u32 (X86APIP sys_rdl)(u32 addr);
-extern void (X86APIP sys_wrb)(u32 addr,u8 val);
-extern void (X86APIP sys_wrw)(u32 addr,u16 val);
-extern void (X86APIP sys_wrl)(u32 addr,u32 val);
-
-extern u8 (X86APIP sys_inb)(X86EMU_pioAddr addr);
-extern u16 (X86APIP sys_inw)(X86EMU_pioAddr addr);
-extern u32 (X86APIP sys_inl)(X86EMU_pioAddr addr);
-extern void (X86APIP sys_outb)(X86EMU_pioAddr addr,u8 val);
-extern void (X86APIP sys_outw)(X86EMU_pioAddr addr,u16 val);
-extern void (X86APIP sys_outl)(X86EMU_pioAddr addr,u32 val);
-
-#ifdef __cplusplus
-} /* End of "C" linkage for C++ */
-#endif
-
-#endif /* __X86EMU_X86EMUI_H */
diff --git a/board/MAI/bios_emulator/x86interface.c b/board/MAI/bios_emulator/x86interface.c
deleted file mode 100644
index 909cb3cf94..0000000000
--- a/board/MAI/bios_emulator/x86interface.c
+++ /dev/null
@@ -1,814 +0,0 @@
-#include "x86emu.h"
-#include "glue.h"
-
-
-/*
- * This isn't nice, but there are a lot of incompatibilities in the U-Boot and scitech include
- * files that this is the only really workable solution.
- * Might be cleaned out later.
- */
-
-#ifdef DEBUG
-#undef DEBUG
-#endif
-
-#undef IO_LOGGING
-#undef MEM_LOGGING
-
-#ifdef IO_LOGGING
-#define LOGIO(port, format, args...) if (dolog(port)) _printf(format , ## args)
-#else
-#define LOGIO(port, format, args...)
-#endif
-
-#ifdef MEM_LOGGIN
-#define LOGMEM(format, args...) _printf(format , ## args)
-#else
-#define LOGMEM(format, args...)
-#endif
-
-#ifdef DEBUG
-#define PRINTF(format, args...) _printf(format , ## args)
-#else
-#define PRINTF(format, argc...)
-#endif
-
-typedef unsigned char UBYTE;
-typedef unsigned short UWORD;
-typedef unsigned long ULONG;
-
-typedef char BYTE;
-typedef short WORT;
-typedef long LONG;
-
-#define EMULATOR_MEM_SIZE (1024*1024)
-#define EMULATOR_BIOS_OFFSET 0xC0000
-#define EMULATOR_STRAP_OFFSET 0x30000
-#define EMULATOR_STACK_OFFSET 0x20000
-#define EMULATOR_LOGO_OFFSET 0x40000 /* If you change this, change the strap code, too */
-#define VIDEO_BASE (void *)0xFD0B8000
-
-extern char *getenv(char *);
-extern int tstc(void);
-extern int getc(void);
-extern unsigned char video_get_attr(void);
-
-int atoi(char *string)
-{
- int res = 0;
- while (*string>='0' && *string <='9')
- {
- res *= 10;
- res += *string-'0';
- string++;
- }
-
- return res;
-}
-
-void cons_gets(char *buffer)
-{
- int i = 0;
- char c = 0;
-
- buffer[0] = 0;
- if (getenv("x86_runthru")) return; /*FIXME: */
- while (c != 0x0D && c != 0x0A)
- {
- while (!tstc());
- c = getc();
- if (c>=32 && c < 127)
- {
- buffer[i] = c;
- i++;
- buffer[i] = 0;
- putc(c);
- }
- else
- {
- if (c == 0x08)
- {
- if (i>0) i--;
- buffer[i] = 0;
- }
- }
- }
- buffer[i] = '\n';
- buffer[i+1] = 0;
-}
-
-char *bios_date = "08/14/02";
-UBYTE model = 0xFC;
-UBYTE submodel = 0x00;
-
-static inline UBYTE read_byte(volatile UBYTE* from)
-{
- int x;
- asm volatile ("lbz %0,%1\n eieio" : "=r" (x) : "m" (*from));
- return (UBYTE)x;
-}
-
-static inline void write_byte(volatile UBYTE *to, int x)
-{
- asm volatile ("stb %1,%0\n eieio" : "=m" (*to) : "r" (x));
-}
-
-static inline UWORD read_word_little(volatile UWORD *from)
-{
- int x;
- asm volatile ("lhbrx %0,0,%1\n eieio" : "=r" (x) : "r" (from), "m" (*from));
- return (UWORD)x;
-}
-
-static inline UWORD read_word_big(volatile UWORD *from)
-{
- int x;
- asm volatile ("lhz %0,%1\n eieio" : "=r" (x) : "m" (*from));
- return (UWORD)x;
-}
-
-static inline void write_word_little(volatile UWORD *to, int x)
-{
- asm volatile ("sthbrx %1,0,%2\n eieio" : "=m" (*to) : "r" (x), "r" (to));
-}
-
-static inline void write_word_big(volatile UWORD *to, int x)
-{
- asm volatile ("sth %1,%0\n eieio" : "=m" (*to) : "r" (x));
-}
-
-static inline ULONG read_long_little(volatile ULONG *from)
-{
- unsigned long x;
- asm volatile ("lwbrx %0,0,%1\n eieio" : "=r" (x) : "r" (from), "m"(*from));
- return (ULONG)x;
-}
-
-static inline ULONG read_long_big(volatile ULONG *from)
-{
- unsigned long x;
- asm volatile ("lwz %0,%1\n eieio" : "=r" (x) : "m" (*from));
- return (ULONG)x;
-}
-
-static inline void write_long_little(volatile ULONG *to, ULONG x)
-{
- asm volatile ("stwbrx %1,0,%2\n eieio" : "=m" (*to) : "r" (x), "r" (to));
-}
-
-static inline void write_long_big(volatile ULONG *to, ULONG x)
-{
- asm volatile ("stw %1,%0\n eieio" : "=m" (*to) : "r" (x));
-}
-
-static int log_init = 0;
-static int log_do = 0;
-static int log_low = 0;
-
-int dolog(int port)
-{
- if (log_init && log_do)
- {
- if (log_low && port > 0x400) return 0;
- return 1;
- }
-
- if (!log_init)
- {
- log_init = 1;
- log_do = (getenv("x86_logio") != (char *)0);
- log_low = (getenv("x86_loglow") != (char *)0);
- if (log_do)
- {
- if (log_low && port > 0x400) return 0;
- return 1;
- }
- }
- return 0;
-}
-
-/* Converts an emulator address to a physical address. */
-/* Handles all special cases (bios date, model etc), and might need work */
-u32 memaddr(u32 addr)
-{
-/* if (addr >= 0xF0000 && addr < 0xFFFFF) printf("WARNING: Segment F access (0x%x)\n", addr); */
-/* printf("MemAddr=%p\n", addr); */
- if (addr >= 0xA0000 && addr < 0xC0000)
- return 0xFD000000 + addr;
- else if (addr >= 0xFFFF5 && addr < 0xFFFFE)
- {
- return (u32)bios_date+addr-0xFFFF5;
- }
- else if (addr == 0xFFFFE)
- return (u32)&model;
- else if (addr == 0xFFFFF)
- return (u32)&submodel;
- else if (addr >= 0x80000000)
- {
- /*printf("Warning: High memory access at 0x%x\n", addr); */
- return addr;
- }
- else
- return (u32)M.mem_base+addr;
-}
-
-u8 A1_rdb(u32 addr)
-{
- u8 a = read_byte((UBYTE *)memaddr(addr));
- LOGMEM("rdb: %x -> %x\n", addr, a);
- return a;
-}
-
-u16 A1_rdw(u32 addr)
-{
- u16 a = read_word_little((UWORD *)memaddr(addr));
- LOGMEM("rdw: %x -> %x\n", addr, a);
- return a;
-}
-
-u32 A1_rdl(u32 addr)
-{
- u32 a = read_long_little((ULONG *)memaddr(addr));
- LOGMEM("rdl: %x -> %x\n", addr, a);
- return a;
-}
-
-void A1_wrb(u32 addr, u8 val)
-{
- LOGMEM("wrb: %x <- %x\n", addr, val);
- write_byte((UBYTE *)memaddr(addr), val);
-}
-
-void A1_wrw(u32 addr, u16 val)
-{
- LOGMEM("wrw: %x <- %x\n", addr, val);
- write_word_little((UWORD *)memaddr(addr), val);
-}
-
-void A1_wrl(u32 addr, u32 val)
-{
- LOGMEM("wrl: %x <- %x\n", addr, val);
- write_long_little((ULONG *)memaddr(addr), val);
-}
-
-X86EMU_memFuncs _A1_mem =
-{
- A1_rdb,
- A1_rdw,
- A1_rdl,
- A1_wrb,
- A1_wrw,
- A1_wrl,
-};
-
-#define ARTICIAS_PCI_CFGADDR 0xfec00cf8
-#define ARTICIAS_PCI_CFGDATA 0xfee00cfc
-#define IOBASE 0xFE000000
-
-#define in_byte(from) read_byte( (UBYTE *)port_to_mem(from))
-#define in_word(from) read_word_little((UWORD *)port_to_mem(from))
-#define in_long(from) read_long_little((ULONG *)port_to_mem(from))
-#define out_byte(to, val) write_byte((UBYTE *)port_to_mem(to), val)
-#define out_word(to, val) write_word_little((UWORD *)port_to_mem(to), val)
-#define out_long(to, val) write_long_little((ULONG *)port_to_mem(to), val)
-
-u32 port_to_mem(int port)
-{
- if (port >= 0xCFC && port <= 0xCFF) return 0xFEE00000+port;
- else if (port >= 0xCF8 && port <= 0xCFB) return 0xFEC00000+port;
- else return IOBASE + port;
-}
-
-u8 A1_inb(int port)
-{
- u8 a;
- /*if (port == 0x3BA) return 0; */
- a = in_byte(port);
- LOGIO(port, "inb: %Xh -> %d (%Xh)\n", port, a, a);
- return a;
-}
-
-u16 A1_inw(int port)
-{
- u16 a = in_word(port);
- LOGIO(port, "inw: %Xh -> %d (%Xh)\n", port, a, a);
- return a;
-}
-
-u32 A1_inl(int port)
-{
- u32 a = in_long(port);
- LOGIO(port, "inl: %Xh -> %d (%Xh)\n", port, a, a);
- return a;
-}
-
-void A1_outb(int port, u8 val)
-{
- LOGIO(port, "outb: %Xh <- %d (%Xh)\n", port, val, val);
-/* if (port == 0xCF8) port = 0xCFB;
- else if (port == 0xCF9) port = 0xCFA;
- else if (port == 0xCFA) port = 0xCF9;
- else if (port == 0xCFB) port = 0xCF8;*/
- out_byte(port, val);
-}
-
-void A1_outw(int port, u16 val)
-{
- LOGIO(port, "outw: %Xh <- %d (%Xh)\n", port, val, val);
- out_word(port, val);
-}
-
-void A1_outl(int port, u32 val)
-{
- LOGIO(port, "outl: %Xh <- %d (%Xh)\n", port, val, val);
- out_long(port, val);
-}
-
-X86EMU_pioFuncs _A1_pio =
-{
- A1_inb,
- A1_inw,
- A1_inl,
- A1_outb,
- A1_outw,
- A1_outl,
-};
-
-static int reloced_ops = 0;
-
-void reloc_ops(void *reloc_addr)
-{
- extern void (*x86emu_optab[256])(u8);
- extern void (*x86emu_optab2[256])(u8);
- extern void tables_relocate(unsigned int offset);
- int i;
- unsigned long delta;
- if (reloced_ops == 1) return;
- reloced_ops = 1;
-
- delta = TEXT_BASE - (unsigned long)reloc_addr;
-
- for (i=0; i<256; i++)
- {
- x86emu_optab[i] -= delta;
- x86emu_optab2[i] -= delta;
- }
-
- _A1_mem.rdb = A1_rdb;
- _A1_mem.rdw = A1_rdw;
- _A1_mem.rdl = A1_rdl;
- _A1_mem.wrb = A1_wrb;
- _A1_mem.wrw = A1_wrw;
- _A1_mem.wrl = A1_wrl;
-
- _A1_pio.inb = A1_inb;
- _A1_pio.inw = A1_inw;
- _A1_pio.inl = A1_inl;
- _A1_pio.outb = A1_outb;
- _A1_pio.outw = A1_outw;
- _A1_pio.outl = A1_outl;
-
- tables_relocate(delta);
-
-}
-
-
-#define ANY_KEY(text) \
- printf(text); \
- while (!tstc());
-
-
-unsigned char more_strap[] = {
- 0xb4, 0x0, 0xb0, 0x2, 0xcd, 0x10,
-};
-#define MORE_STRAP_BYTES 6 /* Additional bytes of strap code */
-
-
-unsigned char *done_msg="VGA Initialized\0";
-
-int execute_bios(pci_dev_t gr_dev, void *reloc_addr)
-{
- extern void bios_init(void);
- extern void remove_init_data(void);
- extern int video_rows(void);
- extern int video_cols(void);
- extern int video_size(int, int);
- u8 *strap;
- unsigned char *logo;
- u8 cfg;
- int i;
- char c;
- char *s;
-#ifdef EASTEREGG
- int easteregg_active = 0;
-#endif
- char *pal_reset;
- u8 *fb;
- unsigned char *msg;
- unsigned char current_attr;
-
- PRINTF("Trying to remove init data\n");
- remove_init_data();
- PRINTF("Removed init data from cache, now in RAM\n");
-
- reloc_ops(reloc_addr);
- PRINTF("Attempting to run emulator on %02x:%02x:%02x\n",
- PCI_BUS(gr_dev), PCI_DEV(gr_dev), PCI_FUNC(gr_dev));
-
- /* Enable compatibility hole for emulator access to frame buffer */
- PRINTF("Enabling compatibility hole\n");
- enable_compatibility_hole();
-
- /* Allocate memory */
- /* FIXME: We shouldn't use this much memory really. */
- memset(&M, 0, sizeof(X86EMU_sysEnv));
- M.mem_base = malloc(EMULATOR_MEM_SIZE);
- M.mem_size = EMULATOR_MEM_SIZE;
-
- if (!M.mem_base)
- {
- PRINTF("Unable to allocate one megabyte for emulator\n");
- return 0;
- }
-
- if (attempt_map_rom(gr_dev, M.mem_base + EMULATOR_BIOS_OFFSET) == 0)
- {
- PRINTF("Error mapping rom. Emulation terminated\n");
- return 0;
- }
-
-#if 1 /*def DEBUG*/
- s = getenv("x86_ask_start");
- if (s)
- {
- printf("Press 'q' to skip initialization, 'd' for dry init\n'i' for i/o session");
- while (!tstc());
- c = getc();
- if (c == 'q') return 0;
- if (c == 'd')
- {
- extern void bios_set_mode(int mode);
- bios_set_mode(0x03);
- return 0;
- }
- if (c == 'i') do_inout();
- }
-
-
-#endif
-
-#ifdef EASTEREGG
-/* if (tstc())
- {
- if (getc() == 'c')
- {
- easteregg_active = 1;
- }
- }
-*/
- if (getenv("easteregg"))
- {
- easteregg_active = 1;
- }
-
- if (easteregg_active)
- {
- /* Yay! */
- setenv("x86_mode", "1");
- setenv("vga_fg_color", "11");
- setenv("vga_bg_color", "1");
- easteregg_active = 1;
- }
-#endif
-
- strap = (u8*)M.mem_base + EMULATOR_STRAP_OFFSET;
-
- {
- char *m = getenv("x86_mode");
- if (m)
- {
- more_strap[3] = atoi(m);
- if (more_strap[3] == 1) video_size(40, 25);
- else video_size(80, 25);
- }
- }
-
- /*
- * Poke the strap routine. This might need a bit of extending
- * if there is a mode switch involved, i.e. we want to int10
- * afterwards to set a different graphics mode, or alternatively
- * there might be a different start address requirement if the
- * ROM doesn't have an x86 image in its first image.
- */
-
- PRINTF("Poking strap...\n");
-
- /* FAR CALL c000:0003 */
- *strap++ = 0x9A; *strap++ = 0x03; *strap++ = 0x00;
- *strap++ = 0x00; *strap++ = 0xC0;
-
-#if 1
- /* insert additional strap code */
- for (i=0; i < MORE_STRAP_BYTES; i++)
- {
- *strap++ = more_strap[i];
- }
-#endif
- /* HALT */
- *strap++ = 0xF4;
-
- PRINTF("Setting up logo data\n");
- logo = (unsigned char *)M.mem_base + EMULATOR_LOGO_OFFSET;
- for (i=0; i<16; i++)
- {
- *logo++ = 0xFF;
- }
-
- /*
- * Setup the init parameters.
- * Per PCI specs, AH must contain the bus and AL
- * must contain the devfn, encoded as (dev<<3)|fn
- */
-
- /* Execution starts here */
- M.x86.R_CS = SEG(EMULATOR_STRAP_OFFSET);
- M.x86.R_IP = OFF(EMULATOR_STRAP_OFFSET);
-
- /* Stack at top of ram */
- M.x86.R_SS = SEG(EMULATOR_STACK_OFFSET);
- M.x86.R_SP = OFF(EMULATOR_STACK_OFFSET);
-
- /* Input parameters */
- M.x86.R_AH = PCI_BUS(gr_dev);
- M.x86.R_AL = (PCI_DEV(gr_dev)<<3) | PCI_FUNC(gr_dev);
-
- /* Set the I/O and memory access functions */
- X86EMU_setupMemFuncs(&_A1_mem);
- X86EMU_setupPioFuncs(&_A1_pio);
-
- /* Enable timer 2 */
- cfg = in_byte(0x61); /* Get Misc control */
- cfg |= 0x01; /* Enable timer 2 */
- out_byte(0x61, cfg); /* output again */
-
- /* Set up the timers */
- out_byte(0x43, 0x54);
- out_byte(0x41, 0x18);
-
- out_byte(0x43, 0x36);
- out_byte(0x40, 0x00);
- out_byte(0x40, 0x00);
-
- out_byte(0x43, 0xb6);
- out_byte(0x42, 0x31);
- out_byte(0x42, 0x13);
-
- /* Init the "BIOS". */
- bios_init();
-
- /* Video Card Reset */
- out_byte(0x3D8, 0);
- out_byte(0x3B8, 1);
- (void)in_byte(0x3BA);
- (void)in_byte(0x3DA);
- out_byte(0x3C0, 0);
- out_byte(0x61, 0xFC);
-
-#ifdef DEBUG
- s = _getenv("x86_singlestep");
- if (s && strcmp(s, "on")==0)
- {
- PRINTF("Enabling single stepping for debug\n");
- X86EMU_trace_on();
- }
-#endif
-
- /* Ready set go... */
- PRINTF("Running emulator\n");
- X86EMU_exec();
- PRINTF("Done running emulator\n");
-
-/* FIXME: Remove me */
- pal_reset = getenv("x86_palette_reset");
- if (pal_reset && strcmp(pal_reset, "on") == 0)
- {
- PRINTF("Palette reset\n");
- /*(void)in_byte(0x3da); */
- /*out_byte(0x3c0, 0); */
-
- out_byte(0x3C8, 0);
- out_byte(0x3C9, 0);
- out_byte(0x3C9, 0);
- out_byte(0x3C9, 0);
- for (i=0; i<254; i++)
- {
- out_byte(0x3C9, 63);
- out_byte(0x3C9, 63);
- out_byte(0x3C9, 63);
- }
-
- out_byte(0x3c0, 0x20);
- }
-/* FIXME: remove me */
-#ifdef EASTEREGG
- if (easteregg_active)
- {
- extern void video_easteregg(void);
- video_easteregg();
- }
-#endif
-/*
- current_attr = video_get_attr();
- fb = (u8 *)VIDEO_BASE;
- for (i=0; i<video_rows()*video_cols()*2; i+=2)
- {
- *(fb+i) = ' ';
- *(fb+i+1) = current_attr;
- }
-
- fb = (u8 *)VIDEO_BASE + (video_rows())-1*(video_cols()*2);
- for (i=0; i<video_cols(); i++)
- {
- *(fb + 2*i) = 32;
- *(fb + 2*i + 1) = 0x17;
- }
-
- msg = done_msg;
- while (*msg)
- {
- *fb = *msg;
- fb += 2;
- msg ++;
- }
-*/
-#ifdef DEBUG
- if (getenv("x86_do_inout")) do_inout();
-#endif
-
-/*FIXME: dcache_disable(); */
- return 1;
-}
-
-/* Clean up the x86 mess */
-void shutdown_bios(void)
-{
-/* disable_compatibility_hole(); */
- /* Free the memory associated */
- free(M.mem_base);
-
-}
-
-int to_int(char *buffer)
-{
- int base = 0;
- int res = 0;
-
- if (*buffer == '$')
- {
- base = 16;
- buffer++;
- }
- else base = 10;
-
- for (;;)
- {
- switch(*buffer)
- {
- case '0' ... '9':
- res *= base;
- res += *buffer - '0';
- break;
- case 'A':
- case 'a':
- res *= base;
- res += 10;
- break;
- case 'B':
- case 'b':
- res *= base;
- res += 11;
- break;
- case 'C':
- case 'c':
- res *= base;
- res += 12;
- break;
- case 'D':
- case 'd':
- res *= base;
- res += 13;
- break;
- case 'E':
- case 'e':
- res *= base;
- res += 14;
- break;
- case 'F':
- case 'f':
- res *= base;
- res += 15;
- break;
- default:
- return res;
- }
- buffer++;
- }
- return res;
-}
-
-void one_arg(char *buffer, int *a)
-{
- while (*buffer && *buffer != '\n')
- {
- if (*buffer == ' ') buffer++;
- else break;
- }
-
- *a = to_int(buffer);
-}
-
-void two_args(char *buffer, int *a, int *b)
-{
- while (*buffer && *buffer != '\n')
- {
- if (*buffer == ' ') buffer++;
- else break;
- }
-
- *a = to_int(buffer);
-
- while (*buffer && *buffer != '\n')
- {
- if (*buffer != ' ') buffer++;
- else break;
- }
-
- while (*buffer && *buffer != '\n')
- {
- if (*buffer == ' ') buffer++;
- else break;
- }
-
- *b = to_int(buffer);
-}
-
-void do_inout(void)
-{
- char buffer[256];
- char *arg1, *arg2;
- int a,b;
-
- printf("In/Out Session\nUse 'i[bwl]' for in, 'o[bwl]' for out and 'q' to quit\n");
-
- do
- {
- cons_gets(buffer);
- printf("\n");
-
- *arg1 = buffer;
- while (*arg1 != ' ' ) arg1++;
- while (*arg1 == ' ') arg1++;
-
- if (buffer[0] == 'i')
- {
- one_arg(buffer+2, &a);
- switch (buffer[1])
- {
- case 'b':
- printf("in_byte(%xh) = %xh\n", a, A1_inb(a));
- break;
- case 'w':
- printf("in_word(%xh) = %xh\n", a, A1_inw(a));
- break;
- case 'l':
- printf("in_dword(%xh) = %xh\n", a, A1_inl(a));
- break;
- default:
- printf("Invalid length '%c'\n", buffer[1]);
- break;
- }
- }
- else if (buffer[0] == 'o')
- {
- two_args(buffer+2, &a, &b);
- switch (buffer[1])
- {
- case 'b':
- printf("out_byte(%d, %d)\n", a, b);
- A1_outb(a,b);
- break;
- case 'w':
- printf("out_word(%d, %d)\n", a, b);
- A1_outw(a, b);
- break;
- case 'l':
- printf("out_long(%d, %d)\n", a, b);
- A1_outl(a, b);
- break;
- default:
- printf("Invalid length '%c'\n", buffer[1]);
- break;
- }
- } else if (buffer[0] == 'q') return;
- } while (1);
-}
diff --git a/board/MAI/menu/cmd_menu.c b/board/MAI/menu/cmd_menu.c
deleted file mode 100644
index a515bd8f2f..0000000000
--- a/board/MAI/menu/cmd_menu.c
+++ /dev/null
@@ -1,16 +0,0 @@
-#include <common.h>
-#include <command.h>
-
-int do_menu( cmd_tbl_t *cmdtp, /*bd_t *bd,*/ int flag, int argc, char *argv[] )
-{
-/* printf("<NOT YET IMPLEMENTED>\n"); */
- return 0;
-}
-
-#if defined(CONFIG_AMIGAONEG3SE) && (CONFIG_COMMANDS & CFG_CMD_BSP)
-U_BOOT_CMD(
- menu, 1, 1, do_menu,
- "menu - display BIOS setup menu\n",
- ""
-);
-#endif
diff --git a/board/MAI/menu/menu.c b/board/MAI/menu/menu.c
deleted file mode 100644
index c0c63a89dd..0000000000
--- a/board/MAI/menu/menu.c
+++ /dev/null
@@ -1,66 +0,0 @@
-#include "menu.h"
-
-#define SINGLE_BOX 0
-#define DOUBLE_BOX 1
-
-void video_draw_box(int style, int attr, char *title, int separate, int x, int y, int w, int h);
-void video_draw_text(int x, int y, int attr, char *text);
-void video_save_rect(int x, int y, int w, int h, void *save_area, int clearchar, int clearattr);
-void video_restore_rect(int x, int y, int w, int h, void *save_area);
-int video_rows(void);
-int video_cols(void);
-
-#define MAX_MENU_OPTIONS 200
-
-typedef struct
-{
- int used; /* flag if this entry is used */
- int entry_x; /* Character column of the menu entry */
- int entry_y; /* Character line of the entry */
- int option_x; /* Character colum of the option (entry is same) */
-} option_data_t;
-
-option_data_t odata[MAX_MENU_OPTIONS];
-
-int normal_attr = 0x0F;
-int select_attr = 0x2F;
-int disabled_attr = 0x07;
-
-menu_t *root_menu;
-
-int menu_init (menu_t *root)
-{
- char *s;
- int i;
-
- s = getenv("menu_normal");
- if (s) normal_attr = atoi(s);
-
- s = getenv("menu_select");
- if (s) select_attr = atoi(s);
-
- s = getenv("menu_disabled");
- if (s) disabled_attr = atoi(s);
-
- for (i=0; i<MAX_MENU_OPTIONS; i++) odata[i].used = 0;
-
- root_menu = root;
-}
-
-option_data_t *menu_alloc_odata(void)
-{
- int i;
- for (int i=0; i<MAX_MENU_OPTIONS; i++)
- {
- if (odata[i].used == 0) return &odata[i];
- }
- return NULL;
-}
-
-void menu_free_odata(option_data_t *odata)
-{
- odata->used = 0;
-}
-
-void menu_layout (menu_t *menu)
-{
diff --git a/board/MAI/menu/menu.h b/board/MAI/menu/menu.h
deleted file mode 100644
index 8aebb7de53..0000000000
--- a/board/MAI/menu/menu.h
+++ /dev/null
@@ -1,174 +0,0 @@
-#ifndef MENU_H
-#define MENU_H
-
-/* A single menu */
-typedef void (*menu_finish_callback)(struct menu_s *menu);
-
-typedef struct menu_s
-{
- char *name; /* Menu name */
- int num_options; /* Number of options in this menu */
- int flags; /* Various flags - see below */
- int option_align; /* Aligns options to a field width of this much characters if != 0 */
-
- struct menu_option_s **options; /* Pointer to this menu's options */
- menu_finish_callback callback; /* Called when the menu closes */
-} menu_t;
-
-/*
- * type: Type of the option (see below)
- * name: Name to display for this option
- * help: Optional help string
- * id : optional id number
- * sys : pointer for system-specific data, init to NULL and don't touch
- */
-
-#define OPTION_PREAMBLE \
- int type; \
- char *name; \
- char *help; \
- int id; \
- void *sys; \
-
-
-/*
- * Menu option types.
- * There are a number of different layouts for menu options depending
- * on their types. Currently there are the following possibilities:
- *
- * Submenu:
- * This entry links to a new menu.
- *
- * Boolean:
- * A simple on/off toggle entry. Booleans can be either yes/no, 0/1 or on/off.
- * Optionally, this entry can enable/disable a set of other options. An example would
- * be to enable/disable on-board USB, and if enabled give access to further options like
- * irq settings, base address etc.
- *
- * Text:
- * A single line/limited number of characters text entry box. Text can be restricted
- * to a certain charset (digits/hex digits/all/custom). Result is also available as an
- * int if numeric.
- *
- * Selection:
- * One-of-many type of selection entry. User may choose on of a set of strings, which
- * maps to a specific value for the variable.
- *
- * Routine:
- * Selecting this calls an entry-specific routine. This can be used for saving contents etc.
- *
- * Custom:
- * Display and behaviour of this entry is defined by a set of callbacks.
- */
-
-#define MENU_SUBMENU_TYPE 0
-typedef struct menu_submenu_s
-{
- OPTION_PREAMBLE
-
- menu_t * submenu; /* Pointer to the submenu */
-} menu_submenu_t;
-
-#define MENU_BOOLEAN_TYPE 1
-typedef struct menu_boolean_s
-{
- OPTION_PREAMBLE
-
- char *variable; /* Name of the variable to getenv()/setenv() */
- int subtype; /* Subtype (on/off, 0/1, yes/no, enable/disable), see below */
- int mutex; /* Bit mask of options to enable/disable. Bit 0 is the option
- immediately following this one, bit 1 is the next one etc.
- bit 7 = 0 means to disable when this option is off,
- bit 7 = 1 means to disable when this option is on.
- An option is disabled when the type field's upper bit is set */
-} menu_boolean_t;
-
-/* BOOLEAN Menu flags */
-#define MENU_BOOLEAN_ONOFF 0x01
-#define MENU_BOOLEAN_01 0x02
-#define MENU_BOOLEAN_YESNO 0x03
-#define MENU_BOOLEAN_ENDIS 0x04
-#define MENU_BOOLEAN_TYPE_MASK 0x07
-
-
-#define MENU_TEXT_TYPE 2
-typedef struct menu_text_s
-{
- OPTION_PREAMBLE
-
- char *variable; /* Name of the variable to getenv()/setenv() */
- int maxchars; /* Max number of characters */
- char *charset; /* Optional charset to use */
- int flags; /* Flags - see below */
-} menu_text_t;
-
-/* TEXT entry menu flags */
-#define MENU_TEXT_NUMERIC 0x01
-#define MENU_TEXT_HEXADECIMAL 0x02
-#define MENU_TEXT_FREE 0x03
-#define MENU_TEXT_TYPE_MASK 0x07
-
-
-#define MENU_SELECTION_TYPE 3
-typedef struct menu_select_option_s
-{
- char *map_from; /* Map this variable contents ... */
- char *map_to; /* ... to this menu text and vice versa */
-} menu_select_option_t;
-
-typedef struct menu_select_s
-{
- OPTION_PREAMBLE
-
- int num_options; /* Number of mappings */
- menu_select_option_t **options;
- /* Option list array */
-} menu_select_t;
-
-
-#define MENU_ROUTINE_TYPE 4
-typedef void (*menu_routine_callback)(struct menu_routine_s *);
-
-typedef struct menu_routine_s
-{
- OPTION_PREAMBLE
- menu_routine_callback callback;
- /* routine to be called */
- void *user_data; /* User data, don't care for system */
-} menu_routine_t;
-
-
-#define MENU_CUSTOM_TYPE 5
-typedef void (*menu_custom_draw)(struct menu_custom_s *);
-typedef void (*menu_custom_key)(struct menu_custom_s *, int);
-
-typedef struct menu_custom_s
-{
- OPTION_PREAMBLE
- menu_custom_draw drawfunc;
- menu_custom_key keyfunc;
- void *user_data;
-} menu_custom_t;
-
-/*
- * The menu option superstructure
- */
-typedef struct menu_option_s
-{
- union
- {
- menu_submenu_t m_sub_menu;
- menu_boolean_t m_boolean;
- menu_text_t m_text;
- menu_select_t m_select;
- menu_routine_t m_routine;
- };
-} menu_option_t;
-
-/* Init the menu system. Returns <0 on error */
-int menu_init(menu_t *root);
-
-/* Execute a single menu. Returns <0 on error */
-int menu_do(menu_t *menu);
-
-#endif
diff --git a/board/Marvell/common/bootseq.txt b/board/Marvell/common/bootseq.txt
deleted file mode 100644
index 391d49a119..0000000000
--- a/board/Marvell/common/bootseq.txt
+++ /dev/null
@@ -1,94 +0,0 @@
-(cpu/mpc7xxx/start.S)
-
-start:
- b boot_cold
-
-start_warm:
- b boot_warm
-
-
-boot_cold:
-boot_warm:
- clear bats
- init l2 (if enabled)
- init altivec (if enabled)
- invalidate l2 (if enabled)
- setup bats (from defines in config_EVB)
- enable_addr_trans: (if MMU enabled)
- enable MSR_IR and MSR_DR
- jump to in_flash
-
-in_flash:
- enable l1 dcache
- gal_low_init: (board/evb64260/sdram_init.S)
- config SDRAM (CFG, TIMING, DECODE)
- init scratch regs (810 + 814)
-
- detect DIMM0 (bank 0 only)
- config SDRAM_PARA0 to 256/512Mbit
- bl sdram_op_mode
- detect bank0 width
- write scratch reg 810
- config SDRAM_PARA0 with results
- config SDRAM_PARA1 with results
-
- detect DIMM1 (bank 2 only)
- config SDRAM_PARA2 to 256/512Mbit
- detect bank2 width
- write scratch reg 814
- config SDRAM_PARA2 with results
- config SDRAM_PARA3 with results
-
- setup device bus timings/width
- setup boot device timings/width
-
- setup CPU_CONF (0x0)
- setup cpu master control register 0x160
- setup PCI0 TIMEOUT
- setup PCI1 TIMEOUT
- setup PCI0 BAR
- setup PCI1 BAR
-
- setup MPP control 0-3
- setup GPP level control
- setup Serial ports multiplex
-
- setup stack pointer (r1)
- setup GOT
- call cpu_init_f
- debug leds
- board_init_f: (common/board.c)
- board_early_init_f:
- remap gt regs?
- map PCI mem/io
- map device space
- clear out interupts
- init_timebase
- env_init
- serial_init
- console_init_f
- display_options
- initdram: (board/evb64260/evb64260.c)
- detect memory
- for each bank:
- dram_size()
- setup PCI slave memory mappings
- setup SCS
- setup monitor
- alloc board info struct
- init bd struct
- relocate_code: (cpu/mpc7xxx/start.S)
- copy,got,clearbss
- board_init_r(bd, dest_addr) (common/board.c)
- setup bd function pointers
- trap_init
- flash_init: (board/evb64260/flash.c)
- setup bd flash info
- cpu_init_r: (cpu/mpc7xxx/cpu_init.c)
- nothing
- mem_malloc_init
- malloc_bin_reloc
- spi_init (r or f)??? (CFG_ENV_IS_IN_EEPROM)
- env_relocated
- misc_init_r(bd): (board/evb64260/evb64260.c)
- mpsc_init2
diff --git a/board/Marvell/common/ecctest.c b/board/Marvell/common/ecctest.c
deleted file mode 100644
index e22b1136a2..0000000000
--- a/board/Marvell/common/ecctest.c
+++ /dev/null
@@ -1,131 +0,0 @@
-/*
- * (C) Copyright 2001
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifdef ECC_TEST
-static inline void ecc_off (void)
-{
- *(volatile int *) (INTERNAL_REG_BASE_ADDR + 0x4b4) &= ~0x00200000;
-}
-
-static inline void ecc_on (void)
-{
- *(volatile int *) (INTERNAL_REG_BASE_ADDR + 0x4b4) |= 0x00200000;
-}
-
-static int putshex (const char *buf, int len)
-{
- int i;
-
- for (i = 0; i < len; i++) {
- printf ("%02x", buf[i]);
- }
- return 0;
-}
-
-static int char_memcpy (void *d, const void *s, int len)
-{
- int i;
- char *cd = d;
- const char *cs = s;
-
- for (i = 0; i < len; i++) {
- *(cd++) = *(cs++);
- }
- return 0;
-}
-
-static int memory_test (char *buf)
-{
- const char src[][16] = {
- {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
- {0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
- 0x01, 0x01, 0x01, 0x01, 0x01, 0x01},
- {0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02,
- 0x02, 0x02, 0x02, 0x02, 0x02, 0x02},
- {0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04,
- 0x04, 0x04, 0x04, 0x04, 0x04, 0x04},
- {0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08,
- 0x08, 0x08, 0x08, 0x08, 0x08, 0x08},
- {0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10,
- 0x10, 0x10, 0x10, 0x10, 0x10, 0x10},
- {0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
- 0x20, 0x20, 0x20, 0x20, 0x20, 0x20},
- {0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40,
- 0x40, 0x40, 0x40, 0x40, 0x40, 0x40},
- {0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80,
- 0x80, 0x80, 0x80, 0x80, 0x80, 0x80},
- {0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55,
- 0x55, 0x55, 0x55, 0x55, 0x55, 0x55},
- {0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
- 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa},
- {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}
- };
- const int foo[] = { 0 };
- int i, j, a;
-
- printf ("\ntest @ %d %p\n", foo[0], buf);
- for (i = 0; i < 12; i++) {
- for (a = 0; a < 8; a++) {
- const char *s = src[i] + a;
- int align = (unsigned) (s) & 0x7;
-
- /* ecc_off(); */
- memcpy (buf, s, 8);
- /* ecc_on(); */
- putshex (s, 8);
- if (memcmp (buf, s, 8)) {
- putc ('\n');
- putshex (buf, 8);
- printf (" [FAIL] (%p) align=%d\n", s, align);
- for (j = 0; j < 8; j++) {
- s[j] == buf[j] ? puts (" ") :
- printf ("%02x",
- (s[j]) ^ (buf[j]));
- }
- putc ('\n');
- } else {
- printf (" [PASS] (%p) align=%d\n", s, align);
- }
- /* ecc_off(); */
- char_memcpy (buf, s, 8);
- /* ecc_on(); */
- putshex (s, 8);
- if (memcmp (buf, s, 8)) {
- putc ('\n');
- putshex (buf, 8);
- printf (" [FAIL] (%p) align=%d\n", s, align);
- for (j = 0; j < 8; j++) {
- s[j] == buf[j] ? puts (" ") :
- printf ("%02x",
- (s[j]) ^ (buf[j]));
- }
- putc ('\n');
- } else {
- printf (" [PASS] (%p) align=%d\n", s, align);
- }
- }
- }
-
- return 0;
-}
-#endif
diff --git a/board/Marvell/common/flash.c b/board/Marvell/common/flash.c
deleted file mode 100644
index a8add85672..0000000000
--- a/board/Marvell/common/flash.c
+++ /dev/null
@@ -1,1072 +0,0 @@
-/*
- * (C) Copyright 2001
- * Josh Huber <huber@mclx.com>, Mission Critical Linux, Inc.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * flash.c - flash support for the 512k, 8bit boot flash
- and the 8MB 32bit extra flash on the DB64360
- * most of this file was based on the existing U-Boot
- * flash drivers.
- *
- * written or collected and sometimes rewritten by
- * Ingo Assmus <ingo.assmus@keymile.com>
- *
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-#include "../include/mv_gen_reg.h"
-#include "../include/memory.h"
-#include "intel_flash.h"
-
-#define FLASH_ROM 0xFFFD /* unknown flash type */
-#define FLASH_RAM 0xFFFE /* unknown flash type */
-#define FLASH_MAN_UNKNOWN 0xFFFF0000
-
-/* #define DEBUG */
-
-/* Intel flash commands */
-int flash_erase_intel (flash_info_t * info, int s_first, int s_last);
-int write_word_intel (bank_addr_t addr, bank_word_t value);
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (int portwidth, vu_long * addr,
- flash_info_t * info);
-static int write_word (flash_info_t * info, ulong dest, ulong data);
-static void flash_get_offsets (ulong base, flash_info_t * info);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- unsigned int i;
- unsigned long size_b0 = 0, size_b1 = 0;
- unsigned long base, flash_size;
-
- /* Init: no FLASHes known */
- for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* the boot flash */
- base = CFG_FLASH_BASE;
- size_b0 =
- flash_get_size (CFG_BOOT_FLASH_WIDTH, (vu_long *) base,
- &flash_info[0]);
-
- printf ("[%ldkB@%lx] ", size_b0 / 1024, base);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH at %08lx: Size = 0x%08lx = %ld MB\n", base, size_b0, size_b0 << 20);
- }
-
- base = memoryGetDeviceBaseAddress (CFG_EXTRA_FLASH_DEVICE);
-/* base = memoryGetDeviceBaseAddress(DEV_CS3_BASE_ADDR);*/
- for (i = 1; i < CFG_MAX_FLASH_BANKS; i++) {
- unsigned long size =
- flash_get_size (CFG_EXTRA_FLASH_WIDTH,
- (vu_long *) base, &flash_info[i]);
-
- printf ("[%ldMB@%lx] ", size >> 20, base);
-
- if (flash_info[i].flash_id == FLASH_UNKNOWN) {
- if (i == 1) {
- printf ("## Unknown FLASH at %08lx: Size = 0x%08lx = %ld MB\n", base, size_b1, size_b1 << 20);
- }
- break;
- }
- size_b1 += size;
- base += size;
- }
-
- flash_size = size_b0 + size_b1;
- return flash_size;
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_get_offsets (ulong base, flash_info_t * info)
-{
- int i;
- int sector_size;
-
- if (!info->sector_count)
- return;
-
- /* set up sector start address table */
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM040:
- case FLASH_28F128J3A:
- case FLASH_28F640J3A:
- case FLASH_RAM:
- /* this chip has uniformly spaced sectors */
- sector_size = info->size / info->sector_count;
- for (i = 0; i < info->sector_count; i++)
- info->start[i] = base + (i * sector_size);
- break;
- default:
- if (info->flash_id & FLASH_BTYPE) {
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00008000;
- info->start[2] = base + 0x0000C000;
- info->start[3] = base + 0x00010000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] =
- base + (i * 0x00020000) - 0x00060000;
- }
- } else {
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- info->start[i--] = base + info->size - 0x00008000;
- info->start[i--] = base + info->size - 0x0000C000;
- info->start[i--] = base + info->size - 0x00010000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00020000;
- }
- }
- }
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t * info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_STM:
- printf ("STM ");
- break;
- case FLASH_MAN_AMD:
- printf ("AMD ");
- break;
- case FLASH_MAN_FUJ:
- printf ("FUJITSU ");
- break;
- case FLASH_MAN_INTEL:
- printf ("INTEL ");
- break;
- default:
- printf ("Unknown Vendor ");
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM040:
- printf ("AM29LV040B (4 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM400B:
- printf ("AM29LV400B (4 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM400T:
- printf ("AM29LV400T (4 Mbit, top boot sector)\n");
- break;
- case FLASH_AM800B:
- printf ("AM29LV800B (8 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM800T:
- printf ("AM29LV800T (8 Mbit, top boot sector)\n");
- break;
- case FLASH_AM160B:
- printf ("AM29LV160B (16 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM160T:
- printf ("AM29LV160T (16 Mbit, top boot sector)\n");
- break;
- case FLASH_AM320B:
- printf ("AM29LV320B (32 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM320T:
- printf ("AM29LV320T (32 Mbit, top boot sector)\n");
- break;
- case FLASH_28F640J3A:
- printf ("28F640J3A (64 Mbit)\n");
- break;
- case FLASH_28F128J3A:
- printf ("28F128J3A (128 Mbit)\n");
- break;
- case FLASH_ROM:
- printf ("ROM\n");
- break;
- case FLASH_RAM:
- printf ("RAM\n");
- break;
- default:
- printf ("Unknown Chip Type\n");
- break;
- }
-
- if ((info->size >> 20) > 0) {
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
- } else {
- printf (" Size: %ld kB in %d Sectors\n",
- info->size >> 10, info->sector_count);
- }
-
- printf (" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i], info->protect[i] ? " (RO)" : " ");
- }
- printf ("\n");
- return;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-
-static inline void flash_cmd (int width, volatile unsigned char *addr,
- int offset, unsigned char cmd)
-{
- /* supports 1x8, 1x16, and 2x16 */
- /* 2x8 and 4x8 are not supported */
- if (width == 4) {
- /* assuming chips are in 16 bit mode */
- /* 2x16 */
- unsigned long cmd32 = (cmd << 16) | cmd;
-
- *(volatile unsigned long *) (addr + offset * 2) = cmd32;
- } else {
- /* 1x16 or 1x8 */
- *(volatile unsigned char *) (addr + offset) = cmd;
- }
-}
-
-static ulong
-flash_get_size (int portwidth, vu_long * addr, flash_info_t * info)
-{
- short i;
- volatile unsigned char *caddr = (unsigned char *) addr;
- volatile unsigned short *saddr = (unsigned short *) addr;
- volatile unsigned long *laddr = (unsigned long *) addr;
- char old[2], save;
- ulong id = 0, manu = 0, base = (ulong) addr;
-
-#ifdef DEBUG
- printf ("%s: enter\n", __FUNCTION__);
-#endif
- info->portwidth = portwidth;
-
- save = *caddr;
-
- flash_cmd (portwidth, caddr, 0, 0xf0);
- flash_cmd (portwidth, caddr, 0, 0xf0);
-
- udelay (10);
-
- old[0] = caddr[0];
- old[1] = caddr[1];
-
-
- if (old[0] != 0xf0) {
- flash_cmd (portwidth, caddr, 0, 0xf0);
- flash_cmd (portwidth, caddr, 0, 0xf0);
-
- udelay (10);
-
- if (*caddr == 0xf0) {
- /* this area is ROM */
- *caddr = save;
- info->flash_id = FLASH_ROM + FLASH_MAN_UNKNOWN;
- info->sector_count = 8;
- info->size = 0x80000;
- flash_get_offsets (base, info);
- return info->size;
- }
- } else {
- *caddr = 0;
-
- udelay (10);
-
- if (*caddr == 0) {
- /* this area is RAM */
- *caddr = save;
- info->flash_id = FLASH_RAM + FLASH_MAN_UNKNOWN;
- info->sector_count = 8;
- info->size = 0x80000;
- flash_get_offsets (base, info);
- return info->size;
- }
- flash_cmd (portwidth, caddr, 0, 0xf0);
-
- udelay (10);
- }
-
- /* Write auto select command: read Manufacturer ID */
- flash_cmd (portwidth, caddr, 0x555, 0xAA);
- flash_cmd (portwidth, caddr, 0x2AA, 0x55);
- flash_cmd (portwidth, caddr, 0x555, 0x90);
-
- udelay (10);
-
- if ((caddr[0] == old[0]) && (caddr[1] == old[1])) {
-
- /* this area is ROM */
- info->flash_id = FLASH_ROM + FLASH_MAN_UNKNOWN;
- info->sector_count = 8;
- info->size = 0x80000;
- flash_get_offsets (base, info);
- return info->size;
-#ifdef DEBUG
- } else {
- printf ("%px%d: %02x:%02x -> %02x:%02x\n",
- caddr, portwidth, old[0], old[1], caddr[0], caddr[1]);
-#endif
- }
-
- switch (portwidth) {
- case 1:
- manu = caddr[0];
- manu |= manu << 16;
- id = caddr[1];
- break;
- case 2:
- manu = saddr[0];
- manu |= manu << 16;
- id = saddr[1];
- id |= id << 16;
- break;
- case 4:
- manu = laddr[0];
- id = laddr[1];
- break;
- }
-
-#ifdef DEBUG
- flash_cmd (portwidth, caddr, 0, 0xf0);
-
- printf ("\n%08lx:%08lx:%08lx\n", base, manu, id);
- printf ("%08lx %08lx %08lx %08lx\n",
- laddr[0], laddr[1], laddr[2], laddr[3]);
-#endif
-
- switch (manu) {
- case STM_MANUFACT:
- info->flash_id = FLASH_MAN_STM;
- break;
- case AMD_MANUFACT:
- info->flash_id = FLASH_MAN_AMD;
- break;
- case FUJ_MANUFACT:
- info->flash_id = FLASH_MAN_FUJ;
- break;
- case INTEL_MANUFACT:
- info->flash_id = FLASH_MAN_INTEL;
- break;
- default:
- flash_cmd (portwidth, caddr, 0, 0xf0);
-
- printf ("Unknown Mfr [%08lx]:%08lx\n", manu, id);
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- return (0); /* no or unknown flash */
- }
-
- switch (id) {
- case AMD_ID_LV400T:
- info->flash_id += FLASH_AM400T;
- info->sector_count = 11;
- info->size = 0x00100000;
- info->chipwidth = 1;
- break; /* => 1 MB */
-
- case AMD_ID_LV400B:
- info->flash_id += FLASH_AM400B;
- info->sector_count = 11;
- info->size = 0x00100000;
- info->chipwidth = 1;
- break; /* => 1 MB */
-
- case AMD_ID_LV800T:
- info->flash_id += FLASH_AM800T;
- info->sector_count = 19;
- info->size = 0x00200000;
- info->chipwidth = 1;
- break; /* => 2 MB */
-
- case AMD_ID_LV800B:
- info->flash_id += FLASH_AM800B;
- info->sector_count = 19;
- info->size = 0x00200000;
- info->chipwidth = 1;
- break; /* => 2 MB */
-
- case AMD_ID_LV160T:
- info->flash_id += FLASH_AM160T;
- info->sector_count = 35;
- info->size = 0x00400000;
- info->chipwidth = 1;
- break; /* => 4 MB */
-
- case AMD_ID_LV160B:
- info->flash_id += FLASH_AM160B;
- info->sector_count = 35;
- info->size = 0x00400000;
- info->chipwidth = 1;
- break; /* => 4 MB */
-#if 0 /* enable when device IDs are available */
- case AMD_ID_LV320T:
- info->flash_id += FLASH_AM320T;
- info->sector_count = 67;
- info->size = 0x00800000;
- break; /* => 8 MB */
-
- case AMD_ID_LV320B:
- info->flash_id += FLASH_AM320B;
- info->sector_count = 67;
- info->size = 0x00800000;
- break; /* => 8 MB */
-#endif
- case AMD_ID_LV040B:
- info->flash_id += FLASH_AM040;
- info->sector_count = 8;
- info->size = 0x80000;
- info->chipwidth = 1;
- break; /* => 512 kB */
-
- case INTEL_ID_28F640J3A:
- info->flash_id += FLASH_28F640J3A;
- info->sector_count = 64;
- info->size = 128 * 1024 * 64; /* 128kbytes x 64 blocks */
- info->chipwidth = 2;
- if (portwidth == 4)
- info->size *= 2; /* 2x16 */
- break;
-
- case INTEL_ID_28F128J3A:
- info->flash_id += FLASH_28F128J3A;
- info->sector_count = 128;
- info->size = 128 * 1024 * 128; /* 128kbytes x 128 blocks */
- info->chipwidth = 2;
- if (portwidth == 4)
- info->size *= 2; /* 2x16 */
- break;
-
- default:
- flash_cmd (portwidth, caddr, 0, 0xf0);
-
- printf ("Unknown id %lx:[%lx]\n", manu, id);
- info->flash_id = FLASH_UNKNOWN;
- info->chipwidth = 1;
- return (0); /* => no or unknown flash */
-
- }
-
- flash_get_offsets (base, info);
-
-
- /* check for protected sectors */
- for (i = 0; i < info->sector_count; i++) {
- /* read sector protection at sector address, (A7 .. A0)=0x02 */
- /* D0 = 1 if protected */
- caddr = (volatile unsigned char *) (info->start[i]);
- saddr = (volatile unsigned short *) (info->start[i]);
- laddr = (volatile unsigned long *) (info->start[i]);
- if (portwidth == 1)
- info->protect[i] = caddr[2] & 1;
- else if (portwidth == 2)
- info->protect[i] = saddr[2] & 1;
- else
- info->protect[i] = laddr[2] & 1;
- }
-
- /*
- * Prevent writes to uninitialized FLASH.
- */
- if (info->flash_id != FLASH_UNKNOWN) {
- caddr = (volatile unsigned char *) info->start[0];
-
- flash_cmd (portwidth, caddr, 0, 0xF0); /* reset bank */
- }
-
- return (info->size);
-}
-
-int flash_erase (flash_info_t * info, int s_first, int s_last)
-{
- volatile unsigned char *addr = (uchar *) (info->start[0]);
- int flag, prot, sect, l_sect;
- ulong start, now, last;
-
-/* modified to support 2x16 Intel flash */
-/* Note that the code will not exit on a flash erasure error or timeout */
-/* but will print and error message and continue processing sectors */
-/* until they are all erased. */
-/* 10-16-2002 P. Marchese */
- ulong mask;
- int timeout;
-
- if (info->portwidth == 4)
-/* {
- printf ("- Warning: erasing of 32Bit (2*16Bit i.e. 2*28F640J3A) not supported yet !!!! \n");
- return 1;
- }*/
- {
- /* make sure it's Intel flash */
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
- /* yup! it's an Intel flash */
- /* is it 16-bits wide? */
- if (info->chipwidth == 2) {
- /* yup! it's 16-bits wide */
- /* are there any sectors to process? */
- if ((s_first < 0) || (s_first > s_last)) {
- printf ("Error: There are no sectors to erase\n");
- printf ("Either sector %d is less than zero\n", s_first);
- printf ("or sector %d is greater than sector %d\n", s_first, s_last);
- return 1;
- }
- /* check for protected sectors */
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect)
- if (info->protect[sect])
- prot++;
- /* if variable "prot" is nonzero, there are protected sectors */
- if (prot)
- printf ("- Warning: %d protected sectors will not be erased!\n", prot);
- /* reset the flash */
- flash_cmd (info->portwidth, addr, 0,
- CHIP_CMD_RST);
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
- /* Clear the status register */
- flash_cmd (info->portwidth, addr, 0,
- CHIP_CMD_CLR_STAT);
- flash_cmd (info->portwidth, addr, 0,
- CHIP_CMD_RST);
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect <= s_last; sect++) {
- /* is the sector unprotected? */
- if (info->protect[sect] == 0) { /* not protected */
- /* issue the single block erase command, 0x20 */
- flash_cmd (info->portwidth,
- (volatile unsigned
- char *) info->
- start[sect], 0,
- CHIP_CMD_ERASE1);
- /* issue the erase confirm command, 0xD0 */
- flash_cmd (info->portwidth,
- (volatile unsigned
- char *) info->
- start[sect], 0,
- CHIP_CMD_ERASE2);
- l_sect = sect;
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts ();
- /* poll for erasure completion */
- /* put flash into read status mode by writing 0x70 to it */
- flash_cmd (info->portwidth,
- addr, 0,
- CHIP_CMD_RD_STAT);
- /* setup the status register mask */
- mask = CHIP_STAT_RDY |
- (CHIP_STAT_RDY << 16);
- /* init. the timeout counter */
- start = get_timer (0);
- /* keep looping while the flash is not ready */
- /* exit the loop by timing out or the flash */
- /* becomes ready again */
- timeout = 0;
- while ((*
- (volatile unsigned
- long *) info->
- start[sect] & mask) !=
- mask) {
- /* has the timeout limit been reached? */
- if (get_timer (start)
- >
- CFG_FLASH_ERASE_TOUT)
- {
- /* timeout limit reached */
- printf ("Time out limit reached erasing sector at address %08lx\n", info->start[sect]);
- printf ("Continuing with next sector\n");
- timeout = 1;
- goto timed_out_error;
- }
- /* put flash into read status mode by writing 0x70 to it */
- flash_cmd (info->
- portwidth,
- addr, 0,
- CHIP_CMD_RD_STAT);
- }
- /* did we timeout? */
- timed_out_error:if (timeout == 0)
- {
- /* didn't timeout, so check the status register */
- /* create the status mask to check for errors */
- mask = CHIP_STAT_ECLBS;
- mask = mask | (mask <<
- 16);
- /* put flash into read status mode by writing 0x70 to it */
- flash_cmd (info->
- portwidth,
- addr, 0,
- CHIP_CMD_RD_STAT);
- /* are there any errors? */
- if ((*
- (volatile
- unsigned long *)
- info->
- start[sect] &
- mask) != 0) {
- /* We got an erasure error */
- printf ("Flash erasure error at address 0x%08lx\n", info->start[sect]);
- printf ("Continuing with next sector\n");
- /* reset the flash */
- flash_cmd
- (info->
- portwidth,
- addr,
- 0,
- CHIP_CMD_RST);
- }
- }
- /* erasure completed without errors */
- /* reset the flash */
- flash_cmd (info->portwidth,
- addr, 0,
- CHIP_CMD_RST);
- } /* end if not protected */
- } /* end for loop */
- printf ("Flash erasure done\n");
- return 0;
- } else {
- /* The Intel flash is not 16-bit wide */
- /* print and error message and return */
- /* NOTE: you can add routines here to handle other size flash */
- printf ("Error: Intel flash device is only %d-bits wide\n", info->chipwidth * 8);
- printf ("The erasure code only handles Intel 16-bit wide flash memory\n");
- return 1;
- }
- } else {
- /* Not Intel flash so return an error as a write timeout */
- /* NOTE: if it's another type flash, stick its routine here */
- printf ("Error: The flash device is not Intel type\n");
- printf ("The erasure code only supports Intel flash in a 32-bit port width\n");
- return 1;
- }
- }
-
- /* end 32-bit wide flash code */
- if ((info->flash_id & FLASH_TYPEMASK) == FLASH_ROM)
- return 1; /* Rom can not be erased */
- if ((info->flash_id & FLASH_TYPEMASK) == FLASH_RAM) { /* RAM just copy 0s to RAM */
- for (sect = s_first; sect <= s_last; sect++) {
- int sector_size = info->size / info->sector_count;
-
- addr = (uchar *) (info->start[sect]);
- memset ((void *) addr, 0, sector_size);
- }
- return 0;
- }
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) { /* Intel works spezial */
- return flash_erase_intel (info,
- (unsigned short) s_first,
- (unsigned short) s_last);
- }
-#if 0
- if ((info->flash_id == FLASH_UNKNOWN) || /* Flash is unknown to PPCBoot */
- (info->flash_id > FLASH_AMD_COMP)) {
- printf ("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- return 1;
- }
-#endif
-
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n", prot);
- } else {
- printf ("\n");
- }
-
- l_sect = -1;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
-
- flash_cmd (info->portwidth, addr, 0x555, 0xAA); /* start erase routine */
- flash_cmd (info->portwidth, addr, 0x2AA, 0x55);
- flash_cmd (info->portwidth, addr, 0x555, 0x80);
- flash_cmd (info->portwidth, addr, 0x555, 0xAA);
- flash_cmd (info->portwidth, addr, 0x2AA, 0x55);
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr = (uchar *) (info->start[sect]);
- flash_cmd (info->portwidth, addr, 0, 0x30);
- l_sect = sect;
- }
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts ();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- /*
- * We wait for the last triggered sector
- */
- if (l_sect < 0)
- goto DONE;
-
- start = get_timer (0);
- last = start;
- addr = (volatile unsigned char *) (info->start[l_sect]);
- /* broken for 2x16: TODO */
- while ((addr[0] & 0x80) != 0x80) {
- if ((now = get_timer (start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- return 1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- }
-
- DONE:
- /* reset to read mode */
- addr = (volatile unsigned char *) info->start[0];
- flash_cmd (info->portwidth, addr, 0, 0xf0);
- flash_cmd (info->portwidth, addr, 0, 0xf0);
-
- printf (" done\n");
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-/* broken for 2x16: TODO */
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int i, l, rc;
-
-/* Commented out since the below code should work for 32-bit(2x 16 flash) */
-/* 10-16-2002 P. Marchese */
-/* if(info->portwidth==4) return 1; */
-/* if(info->portwidth==4) {
- printf ("- Warning: writting of 32Bit (2*16Bit i.e. 2*28F640J3A) not supported yet !!!! \n");
- return 1;
- }*/
-
- if ((info->flash_id & FLASH_TYPEMASK) == FLASH_ROM)
- return 0;
- if ((info->flash_id & FLASH_TYPEMASK) == FLASH_RAM) {
- memcpy ((void *) addr, src, cnt);
- return 0;
- }
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i = 0, cp = wp; i < l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
- for (; i < 4 && cnt > 0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt == 0 && i < 4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
-
- if ((rc = write_word (info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = 0;
- for (i = 0; i < 4; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_word (info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i = 0, cp = wp; i < 4 && cnt > 0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i < 4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
-
- return (write_word (info, wp, data));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-/* broken for 2x16: TODO */
-static int write_word (flash_info_t * info, ulong dest, ulong data)
-{
- volatile unsigned char *addr = (uchar *) (info->start[0]);
- ulong start;
- int flag, i;
- ulong mask;
-
-/* modified so that it handles 32-bit(2x16 Intel flash programming */
-/* 10-16-2002 P. Marchese */
-
- if (info->portwidth == 4)
-/* {
- printf ("- Warning: writting of 32Bit (2*16Bit i.e. 2*28F640J3A) not supported yet !!!! \n");
- return 1;
- }*/
- {
- /* make sure it's Intel flash */
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
- /* yup! it's an Intel flash */
- /* is it 16-bits wide? */
- if (info->chipwidth == 2) {
- /* yup! it's 16-bits wide */
- /* so we know how to program it */
- /* reset the flash */
- flash_cmd (info->portwidth, addr, 0,
- CHIP_CMD_RST);
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
- /* Clear the status register */
- flash_cmd (info->portwidth, addr, 0,
- CHIP_CMD_CLR_STAT);
- flash_cmd (info->portwidth, addr, 0,
- CHIP_CMD_RST);
- /* 1st cycle of word/byte program */
- /* write 0x40 to the location to program */
- flash_cmd (info->portwidth, (uchar *) dest, 0,
- CHIP_CMD_PROG);
- /* 2nd cycle of word/byte program */
- /* write the data to the destination address */
- *(ulong *) dest = data;
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts ();
- /* setup the status register mask */
- mask = CHIP_STAT_RDY | (CHIP_STAT_RDY << 16);
- /* put flash into read status mode by writing 0x70 to it */
- flash_cmd (info->portwidth, addr, 0,
- CHIP_CMD_RD_STAT);
- /* init. the timeout counter */
- start = get_timer (0);
- /* keep looping while the flash is not ready */
- /* exit the loop by timing out or the flash */
- /* becomes ready again */
-/* 11-13-2002 Paul Marchese */
-/* modified while loop conditional statement */
-/* because we were always timing out. */
-/* there is a type mismatch, "addr[0]" */
-/* returns a byte but "mask" is a 32-bit value */
- while ((*(volatile unsigned long *) info->
- start[0] & mask) != mask)
-/* original code */
-/* while (addr[0] & mask) != mask) */
- {
- /* has the timeout limit been reached? */
- if (get_timer (start) >
- CFG_FLASH_WRITE_TOUT) {
- /* timeout limit reached */
- printf ("Time out limit reached programming address %08lx with data %08lx\n", dest, data);
- /* reset the flash */
- flash_cmd (info->portwidth,
- addr, 0,
- CHIP_CMD_RST);
- return (1);
- }
- /* put flash into read status mode by writing 0x70 to it */
- flash_cmd (info->portwidth, addr, 0,
- CHIP_CMD_RD_STAT);
- }
- /* flash is ready, so check the status */
- /* create the status mask to check for errors */
- mask = CHIP_STAT_DPS | CHIP_STAT_VPPS |
- CHIP_STAT_PSLBS;
- mask = mask | (mask << 16);
- /* put flash into read status mode by writing 0x70 to it */
- flash_cmd (info->portwidth, addr, 0,
- CHIP_CMD_RD_STAT);
- /* are there any errors? */
- if ((addr[0] & mask) != 0) {
- /* We got a one of the following errors: */
- /* Voltage range, Device protect, or programming */
- /* return the error as a device timeout */
- /* put flash into read status mode by writing 0x70 to it */
- flash_cmd (info->portwidth, addr, 0,
- CHIP_CMD_RD_STAT);
- printf ("Flash programming error at address 0x%08lx\n", dest);
- printf ("Flash status register contains 0x%08lx\n", (unsigned long) addr[0]);
- /* reset the flash */
- flash_cmd (info->portwidth, addr, 0,
- CHIP_CMD_RST);
- return 1;
- }
- /* write completed without errors */
- /* reset the flash */
- flash_cmd (info->portwidth, addr, 0,
- CHIP_CMD_RST);
- return 0;
- } else {
- /* it's not 16-bits wide, so return an error as a write timeout */
- /* NOTE: you can add routines here to handle other size flash */
- printf ("Error: Intel flash device is only %d-bits wide\n", info->chipwidth * 8);
- printf ("The write code only handles Intel 16-bit wide flash memory\n");
- return 1;
- }
- } else {
- /* not Intel flash so return an error as a write timeout */
- /* NOTE: if it's another type flash, stick its routine here */
- printf ("Error: The flash device is not Intel type\n");
- printf ("The code only supports Intel flash in a 32-bit port width\n");
- return 1;
- }
- }
-
- /* end of 32-bit flash code */
- if ((info->flash_id & FLASH_TYPEMASK) == FLASH_ROM)
- return 1;
- if ((info->flash_id & FLASH_TYPEMASK) == FLASH_RAM) {
- *(unsigned long *) dest = data;
- return 0;
- }
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
- unsigned short low = data & 0xffff;
- unsigned short hi = (data >> 16) & 0xffff;
- int ret = write_word_intel ((bank_addr_t) dest, hi);
-
- if (!ret)
- ret = write_word_intel ((bank_addr_t) (dest + 2),
- low);
-
- return ret;
- }
-
- /* Check if Flash is (sufficiently) erased */
- if ((*((vu_long *) dest) & data) != data) {
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
-
- /* first, perform an unlock bypass command to speed up flash writes */
- addr[0x555] = 0xAA;
- addr[0x2AA] = 0x55;
- addr[0x555] = 0x20;
-
- /* write each byte out */
- for (i = 0; i < 4; i++) {
- char *data_ch = (char *) &data;
-
- addr[0] = 0xA0;
- *(((char *) dest) + i) = data_ch[i];
- udelay (10); /* XXX */
- }
-
- /* we're done, now do an unlock bypass reset */
- addr[0] = 0x90;
- addr[0] = 0x00;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts ();
-
- /* data polling for D7 */
- start = get_timer (0);
- while ((*((vu_long *) dest) & 0x00800080) != (data & 0x00800080)) {
- if (get_timer (start) > CFG_FLASH_WRITE_TOUT) {
- return (1);
- }
- }
- return (0);
-}
diff --git a/board/Marvell/common/i2c.c b/board/Marvell/common/i2c.c
deleted file mode 100644
index 32b2b30a4a..0000000000
--- a/board/Marvell/common/i2c.c
+++ /dev/null
@@ -1,532 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- * Hacked for the DB64360 board by Ingo.Assmus@keymile.com
- * extra improvments by Brain Waite
- */
-#include <common.h>
-#include <mpc8xx.h>
-#include <malloc.h>
-#include "../include/mv_gen_reg.h"
-#include "../include/core.h"
-
-#define MAX_I2C_RETRYS 10
-#define I2C_DELAY 1000 /* Should be at least the # of MHz of Tclk */
-#undef DEBUG_I2C
-/*#define DEBUG_I2C*/
-
-#ifdef DEBUG_I2C
-#define DP(x) x
-#else
-#define DP(x)
-#endif
-
-/* Assuming that there is only one master on the bus (us) */
-
-static void i2c_init (int speed, int slaveaddr)
-{
- unsigned int n, m, freq, margin, power;
- unsigned int actualN = 0, actualM = 0;
- unsigned int control, status;
- unsigned int minMargin = 0xffffffff;
- unsigned int tclk = CFG_TCLK;
- unsigned int i2cFreq = speed; /* 100000 max. Fast mode not supported */
-
- DP (puts ("i2c_init\n"));
-/* gtI2cMasterInit */
- for (n = 0; n < 8; n++) {
- for (m = 0; m < 16; m++) {
- power = 2 << n; /* power = 2^(n+1) */
- freq = tclk / (10 * (m + 1) * power);
- if (i2cFreq > freq)
- margin = i2cFreq - freq;
- else
- margin = freq - i2cFreq;
- if (margin < minMargin) {
- minMargin = margin;
- actualN = n;
- actualM = m;
- }
- }
- }
-
- DP (puts ("setup i2c bus\n"));
-
- /* Setup bus */
-/* gtI2cReset */
- GT_REG_WRITE (I2C_SOFT_RESET, 0);
-
- DP (puts ("udelay...\n"));
-
- udelay (I2C_DELAY);
-
- DP (puts ("set baudrate\n"));
-
- GT_REG_WRITE (I2C_STATUS_BAUDE_RATE, (actualM << 3) | actualN);
- GT_REG_WRITE (I2C_CONTROL, (0x1 << 2) | (0x1 << 6));
-
- udelay (I2C_DELAY * 10);
-
- DP (puts ("read control, baudrate\n"));
-
- GT_REG_READ (I2C_STATUS_BAUDE_RATE, &status);
- GT_REG_READ (I2C_CONTROL, &control);
-}
-
-static uchar i2c_start (void)
-{ /* DB64360 checked -> ok */
- unsigned int control, status;
- int count = 0;
-
- DP (puts ("i2c_start\n"));
-
- /* Set the start bit */
-
-/* gtI2cGenerateStartBit() */
-
- GT_REG_READ (I2C_CONTROL, &control);
- control |= (0x1 << 5); /* generate the I2C_START_BIT */
- GT_REG_WRITE (I2C_CONTROL, control);
-
- GT_REG_READ (I2C_STATUS_BAUDE_RATE, &status);
-
- count = 0;
- while ((status & 0xff) != 0x08) {
- udelay (I2C_DELAY);
- if (count > 20) {
- GT_REG_WRITE (I2C_CONTROL, (0x1 << 4)); /*stop */
- return (status);
- }
- GT_REG_READ (I2C_STATUS_BAUDE_RATE, &status);
- count++;
- }
-
- return (0);
-}
-
-static uchar i2c_select_device (uchar dev_addr, uchar read, int ten_bit)
-{
- unsigned int status, data, bits = 7;
- int count = 0;
-
- DP (puts ("i2c_select_device\n"));
-
- /* Output slave address */
-
- if (ten_bit) {
- bits = 10;
- }
-
- data = (dev_addr << 1);
- /* set the read bit */
- data |= read;
- GT_REG_WRITE (I2C_DATA, data);
- /* assert the address */
- RESET_REG_BITS (I2C_CONTROL, BIT3);
-
- udelay (I2C_DELAY);
-
- GT_REG_READ (I2C_STATUS_BAUDE_RATE, &status);
- count = 0;
- while (((status & 0xff) != 0x40) && ((status & 0xff) != 0x18)) {
- udelay (I2C_DELAY);
- if (count > 20) {
- GT_REG_WRITE (I2C_CONTROL, (0x1 << 4)); /*stop */
- return (status);
- }
- GT_REG_READ (I2C_STATUS_BAUDE_RATE, &status);
- count++;
- }
-
- if (bits == 10) {
- printf ("10 bit I2C addressing not yet implemented\n");
- return (0xff);
- }
-
- return (0);
-}
-
-static uchar i2c_get_data (uchar * return_data, int len)
-{
-
- unsigned int data, status = 0;
- int count = 0;
-
- DP (puts ("i2c_get_data\n"));
-
- while (len) {
-
- /* Get and return the data */
-
- RESET_REG_BITS (I2C_CONTROL, (0x1 << 3));
-
- udelay (I2C_DELAY * 5);
-
- GT_REG_READ (I2C_STATUS_BAUDE_RATE, &status);
- count++;
- while ((status & 0xff) != 0x50) {
- udelay (I2C_DELAY);
- if (count > 2) {
- GT_REG_WRITE (I2C_CONTROL, (0x1 << 4)); /*stop */
- return 0;
- }
- GT_REG_READ (I2C_STATUS_BAUDE_RATE, &status);
- count++;
- }
- GT_REG_READ (I2C_DATA, &data);
- len--;
- *return_data = (uchar) data;
- return_data++;
- }
- RESET_REG_BITS (I2C_CONTROL, BIT2 | BIT3);
- while ((status & 0xff) != 0x58) {
- udelay (I2C_DELAY);
- if (count > 200) {
- GT_REG_WRITE (I2C_CONTROL, (0x1 << 4)); /*stop */
- return (status);
- }
- GT_REG_READ (I2C_STATUS_BAUDE_RATE, &status);
- count++;
- }
- GT_REG_WRITE (I2C_CONTROL, (0x1 << 4)); /* stop */
-
- return (0);
-}
-
-static uchar i2c_write_data (unsigned int *data, int len)
-{
- unsigned int status;
- int count = 0;
- unsigned int temp;
- unsigned int *temp_ptr = data;
-
- DP (puts ("i2c_write_data\n"));
-
- while (len) {
- temp = (unsigned int) (*temp_ptr);
- GT_REG_WRITE (I2C_DATA, temp);
- RESET_REG_BITS (I2C_CONTROL, (0x1 << 3));
-
- udelay (I2C_DELAY);
-
- GT_REG_READ (I2C_STATUS_BAUDE_RATE, &status);
- count++;
- while ((status & 0xff) != 0x28) {
- udelay (I2C_DELAY);
- if (count > 20) {
- GT_REG_WRITE (I2C_CONTROL, (0x1 << 4)); /*stop */
- return (status);
- }
- GT_REG_READ (I2C_STATUS_BAUDE_RATE, &status);
- count++;
- }
- len--;
- temp_ptr++;
- }
-/* 11-14-2002 Paul Marchese */
-/* Can't have the write issuing a stop command */
-/* it's wrong to have a stop bit in read stream or write stream */
-/* since we don't know if it's really the end of the command */
-/* or whether we have just send the device address + offset */
-/* we will push issuing the stop command off to the original */
-/* calling function */
- /* set the interrupt bit in the control register */
- GT_REG_WRITE (I2C_CONTROL, (0x1 << 3));
- udelay (I2C_DELAY * 10);
- return (0);
-}
-
-/* 11-14-2002 Paul Marchese */
-/* created this function to get the i2c_write() */
-/* function working properly. */
-/* function to write bytes out on the i2c bus */
-/* this is identical to the function i2c_write_data() */
-/* except that it requires a buffer that is an */
-/* unsigned character array. You can't use */
-/* i2c_write_data() to send an array of unsigned characters */
-/* since the byte of interest ends up on the wrong end of the bus */
-/* aah, the joys of big endian versus little endian! */
-/* */
-/* returns 0 = success */
-/* anything other than zero is failure */
-static uchar i2c_write_byte (unsigned char *data, int len)
-{
- unsigned int status;
- int count = 0;
- unsigned int temp;
- unsigned char *temp_ptr = data;
-
- DP (puts ("i2c_write_byte\n"));
-
- while (len) {
- /* Set and assert the data */
- temp = *temp_ptr;
- GT_REG_WRITE (I2C_DATA, temp);
- RESET_REG_BITS (I2C_CONTROL, (0x1 << 3));
-
- udelay (I2C_DELAY);
-
- GT_REG_READ (I2C_STATUS_BAUDE_RATE, &status);
- count++;
- while ((status & 0xff) != 0x28) {
- udelay (I2C_DELAY);
- if (count > 20) {
- GT_REG_WRITE (I2C_CONTROL, (0x1 << 4)); /*stop */
- return (status);
- }
- GT_REG_READ (I2C_STATUS_BAUDE_RATE, &status);
- count++;
- }
- len--;
- temp_ptr++;
- }
-/* Can't have the write issuing a stop command */
-/* it's wrong to have a stop bit in read stream or write stream */
-/* since we don't know if it's really the end of the command */
-/* or whether we have just send the device address + offset */
-/* we will push issuing the stop command off to the original */
-/* calling function */
-/* GT_REG_WRITE(I2C_CONTROL, (0x1 << 3) | (0x1 << 4));
- GT_REG_WRITE(I2C_CONTROL, (0x1 << 4)); */
- /* set the interrupt bit in the control register */
- GT_REG_WRITE (I2C_CONTROL, (0x1 << 3));
- udelay (I2C_DELAY * 10);
-
- return (0);
-}
-
-static uchar
-i2c_set_dev_offset (uchar dev_addr, unsigned int offset, int ten_bit,
- int alen)
-{
- uchar status;
- unsigned int table[2];
-
-/* initialize the table of address offset bytes */
-/* utilized for 2 byte address offsets */
-/* NOTE: the order is high byte first! */
- table[1] = offset & 0xff; /* low byte */
- table[0] = offset / 0x100; /* high byte */
-
- DP (puts ("i2c_set_dev_offset\n"));
-
- status = i2c_select_device (dev_addr, 0, ten_bit);
- if (status) {
-#ifdef DEBUG_I2C
- printf ("Failed to select device setting offset: 0x%02x\n",
- status);
-#endif
- return status;
- }
-/* check the address offset length */
- if (alen == 0)
- /* no address offset */
- return (0);
- else if (alen == 1) {
- /* 1 byte address offset */
- status = i2c_write_data (&offset, 1);
- if (status) {
-#ifdef DEBUG_I2C
- printf ("Failed to write data: 0x%02x\n", status);
-#endif
- return status;
- }
- } else if (alen == 2) {
- /* 2 bytes address offset */
- status = i2c_write_data (table, 2);
- if (status) {
-#ifdef DEBUG_I2C
- printf ("Failed to write data: 0x%02x\n", status);
-#endif
- return status;
- }
- } else {
- /* address offset unknown or not supported */
- printf ("Address length offset %d is not supported\n", alen);
- return 1;
- }
- return 0; /* sucessful completion */
-}
-
-uchar
-i2c_read (uchar dev_addr, unsigned int offset, int alen, uchar * data,
- int len)
-{
- uchar status = 0;
- unsigned int i2cFreq = CFG_I2C_SPEED;
-
- DP (puts ("i2c_read\n"));
-
- i2c_init (i2cFreq, 0); /* set the i2c frequency */
-
- status = i2c_start ();
-
- if (status) {
-#ifdef DEBUG_I2C
- printf ("Transaction start failed: 0x%02x\n", status);
-#endif
- return status;
- }
-
- status = i2c_set_dev_offset (dev_addr, offset, 0, alen); /* send the slave address + offset */
- if (status) {
-#ifdef DEBUG_I2C
- printf ("Failed to set slave address & offset: 0x%02x\n",
- status);
-#endif
- return status;
- }
-
- i2c_init (i2cFreq, 0); /* set the i2c frequency again */
-
- status = i2c_start ();
- if (status) {
-#ifdef DEBUG_I2C
- printf ("Transaction restart failed: 0x%02x\n", status);
-#endif
- return status;
- }
-
- status = i2c_select_device (dev_addr, 1, 0); /* send the slave address */
- if (status) {
-#ifdef DEBUG_I2C
- printf ("Address not acknowledged: 0x%02x\n", status);
-#endif
- return status;
- }
-
- status = i2c_get_data (data, len);
- if (status) {
-#ifdef DEBUG_I2C
- printf ("Data not recieved: 0x%02x\n", status);
-#endif
- return status;
- }
-
- return 0;
-}
-
-/* 11-14-2002 Paul Marchese */
-/* Function to set the I2C stop bit */
-void i2c_stop (void)
-{
- GT_REG_WRITE (I2C_CONTROL, (0x1 << 4));
-}
-
-/* 11-14-2002 Paul Marchese */
-/* I2C write function */
-/* dev_addr = device address */
-/* offset = address offset */
-/* alen = length in bytes of the address offset */
-/* data = pointer to buffer to read data into */
-/* len = # of bytes to read */
-/* */
-/* returns 0 = succesful */
-/* anything but zero is failure */
-uchar
-i2c_write (uchar dev_addr, unsigned int offset, int alen, uchar * data,
- int len)
-{
- uchar status = 0;
- unsigned int i2cFreq = CFG_I2C_SPEED;
-
- DP (puts ("i2c_write\n"));
-
- i2c_init (i2cFreq, 0); /* set the i2c frequency */
-
- status = i2c_start (); /* send a start bit */
-
- if (status) {
-#ifdef DEBUG_I2C
- printf ("Transaction start failed: 0x%02x\n", status);
-#endif
- return status;
- }
-
- status = i2c_set_dev_offset (dev_addr, offset, 0, alen); /* send the slave address + offset */
- if (status) {
-#ifdef DEBUG_I2C
- printf ("Failed to set slave address & offset: 0x%02x\n",
- status);
-#endif
- return status;
- }
-
-
- status = i2c_write_byte (data, len); /* write the data */
- if (status) {
-#ifdef DEBUG_I2C
- printf ("Data not written: 0x%02x\n", status);
-#endif
- return status;
- }
- /* issue a stop bit */
- i2c_stop ();
- return 0;
-}
-
-/* 11-14-2002 Paul Marchese */
-/* function to determine if an I2C device is present */
-/* chip = device address of chip to check for */
-/* */
-/* returns 0 = sucessful, the device exists */
-/* anything other than zero is failure, no device */
-int i2c_probe (uchar chip)
-{
-
- /* We are just looking for an <ACK> back. */
- /* To see if the device/chip is there */
-
-#ifdef DEBUG_I2C
- unsigned int i2c_status;
-#endif
- uchar status = 0;
- unsigned int i2cFreq = CFG_I2C_SPEED;
-
- DP (puts ("i2c_probe\n"));
-
- i2c_init (i2cFreq, 0); /* set the i2c frequency */
-
- status = i2c_start (); /* send a start bit */
-
- if (status) {
-#ifdef DEBUG_I2C
- printf ("Transaction start failed: 0x%02x\n", status);
-#endif
- return (int) status;
- }
-
- status = i2c_set_dev_offset (chip, 0, 0, 0); /* send the slave address + no offset */
- if (status) {
-#ifdef DEBUG_I2C
- printf ("Failed to set slave address: 0x%02x\n", status);
-#endif
- return (int) status;
- }
-#ifdef DEBUG_I2C
- GT_REG_READ (I2C_STATUS_BAUDE_RATE, &i2c_status);
- printf ("address %#x returned %#x\n", chip, i2c_status);
-#endif
- /* issue a stop bit */
- i2c_stop ();
- return 0; /* successful completion */
-}
diff --git a/board/Marvell/common/i2c.h b/board/Marvell/common/i2c.h
deleted file mode 100644
index b669ff0031..0000000000
--- a/board/Marvell/common/i2c.h
+++ /dev/null
@@ -1,32 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- * Hacked for the DB64360 board by Ingo.Assmus@keymile.com
- */
-
-#ifndef __I2C_H__
-#define __I2C_H__
-
-/* function declarations */
-uchar i2c_read(uchar, unsigned int, int, uchar*, int);
-
-#endif
diff --git a/board/Marvell/common/intel_flash.c b/board/Marvell/common/intel_flash.c
deleted file mode 100644
index d26f883ad3..0000000000
--- a/board/Marvell/common/intel_flash.c
+++ /dev/null
@@ -1,269 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- * Hacked for the marvell db64360 eval board by
- * Ingo Assmus <ingo.assmus@keymile.com>
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-#include "../include/mv_gen_reg.h"
-#include "../include/memory.h"
-#include "intel_flash.h"
-
-
-/*-----------------------------------------------------------------------
- * Protection Flags:
- */
-#define FLAG_PROTECT_SET 0x01
-#define FLAG_PROTECT_CLEAR 0x02
-
-static void bank_reset (flash_info_t * info, int sect)
-{
- bank_addr_t addrw, eaddrw;
-
- addrw = (bank_addr_t) info->start[sect];
- eaddrw = BANK_ADDR_NEXT_WORD (addrw);
-
- while (addrw < eaddrw) {
-#ifdef FLASH_DEBUG
- printf (" writing reset cmd to addr 0x%08lx\n",
- (unsigned long) addrw);
-#endif
- *addrw = BANK_CMD_RST;
- addrw++;
- }
-}
-
-static void bank_erase_init (flash_info_t * info, int sect)
-{
- bank_addr_t addrw, saddrw, eaddrw;
- int flag;
-
-#ifdef FLASH_DEBUG
- printf ("0x%08x BANK_CMD_PROG\n", BANK_CMD_PROG);
- printf ("0x%08x BANK_CMD_ERASE1\n", BANK_CMD_ERASE1);
- printf ("0x%08x BANK_CMD_ERASE2\n", BANK_CMD_ERASE2);
- printf ("0x%08x BANK_CMD_CLR_STAT\n", BANK_CMD_CLR_STAT);
- printf ("0x%08x BANK_CMD_RST\n", BANK_CMD_RST);
- printf ("0x%08x BANK_STAT_RDY\n", BANK_STAT_RDY);
- printf ("0x%08x BANK_STAT_ERR\n", BANK_STAT_ERR);
-#endif
-
- saddrw = (bank_addr_t) info->start[sect];
- eaddrw = BANK_ADDR_NEXT_WORD (saddrw);
-
-#ifdef FLASH_DEBUG
- printf ("erasing sector %d, start addr = 0x%08lx "
- "(bank next word addr = 0x%08lx)\n", sect,
- (unsigned long) saddrw, (unsigned long) eaddrw);
-#endif
-
- /* Disable intrs which might cause a timeout here */
- flag = disable_interrupts ();
-
- for (addrw = saddrw; addrw < eaddrw; addrw++) {
-#ifdef FLASH_DEBUG
- printf (" writing erase cmd to addr 0x%08lx\n",
- (unsigned long) addrw);
-#endif
- *addrw = BANK_CMD_ERASE1;
- *addrw = BANK_CMD_ERASE2;
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts ();
-}
-
-static int bank_erase_poll (flash_info_t * info, int sect)
-{
- bank_addr_t addrw, saddrw, eaddrw;
- int sectdone, haderr;
-
- saddrw = (bank_addr_t) info->start[sect];
- eaddrw = BANK_ADDR_NEXT_WORD (saddrw);
-
- sectdone = 1;
- haderr = 0;
-
- for (addrw = saddrw; addrw < eaddrw; addrw++) {
- bank_word_t stat = *addrw;
-
-#ifdef FLASH_DEBUG
- printf (" checking status at addr "
- "0x%08x [0x%08x]\n", (unsigned long) addrw, stat);
-#endif
- if ((stat & BANK_STAT_RDY) != BANK_STAT_RDY)
- sectdone = 0;
- else if ((stat & BANK_STAT_ERR) != 0) {
- printf (" failed on sector %d "
- "(stat = 0x%08x) at "
- "address 0x%p\n", sect, stat, addrw);
- *addrw = BANK_CMD_CLR_STAT;
- haderr = 1;
- }
- }
-
- if (haderr)
- return (-1);
- else
- return (sectdone);
-}
-
-int write_word_intel (bank_addr_t addr, bank_word_t value)
-{
- bank_word_t stat;
- ulong start;
- int flag, retval;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
-
- *addr = BANK_CMD_PROG;
-
- *addr = value;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts ();
-
- retval = 0;
-
- /* data polling for D7 */
- start = get_timer (0);
- do {
- if (get_timer (start) > CFG_FLASH_WRITE_TOUT) {
- retval = 1;
- goto done;
- }
- stat = *addr;
- } while ((stat & BANK_STAT_RDY) != BANK_STAT_RDY);
-
- if ((stat & BANK_STAT_ERR) != 0) {
- printf ("flash program failed (stat = 0x%08lx) "
- "at address 0x%08lx\n", (ulong) stat, (ulong) addr);
- *addr = BANK_CMD_CLR_STAT;
- retval = 3;
- }
-
- done:
- /* reset to read mode */
- *addr = BANK_CMD_RST;
-
- return (retval);
-}
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase_intel (flash_info_t * info, int s_first, int s_last)
-{
- int prot, sect, haderr;
- ulong start, now, last;
-
-#ifdef FLASH_DEBUG
- printf ("\nflash_erase: erase %d sectors (%d to %d incl.) from\n"
- " Bank # %d: ", s_last - s_first + 1, s_first, s_last,
- (info - flash_info) + 1);
- flash_print_info (info);
-#endif
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sector%s will not be erased!\n", prot, (prot > 1 ? "s" : ""));
- }
-
- start = get_timer (0);
- last = 0;
- haderr = 0;
-
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- ulong estart;
- int sectdone;
-
- bank_erase_init (info, sect);
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- estart = get_timer (start);
-
- do {
- now = get_timer (start);
-
- if (now - estart > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout (sect %d)\n", sect);
- haderr = 1;
- break;
- }
-#ifndef FLASH_DEBUG
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
-#endif
-
- sectdone = bank_erase_poll (info, sect);
-
- if (sectdone < 0) {
- haderr = 1;
- break;
- }
-
- } while (!sectdone);
-
- if (haderr)
- break;
- }
- }
-
- if (haderr > 0)
- printf (" failed\n");
- else
- printf (" done\n");
-
- /* reset to read mode */
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- bank_reset (info, sect);
- }
- }
- return haderr;
-}
diff --git a/board/Marvell/common/intel_flash.h b/board/Marvell/common/intel_flash.h
deleted file mode 100644
index 666a4cdcad..0000000000
--- a/board/Marvell/common/intel_flash.h
+++ /dev/null
@@ -1,186 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- * Hacked for the marvell db64360 eval board by
- * Ingo Assmus <ingo.assmus@keymile.com>
- */
-
-/*************** DEFINES for Intel StrataFlash FLASH chip ********************/
-
-/*
- * acceptable chips types are:
- *
- * 28F320J5, 28F640J5, 28F320J3A, 28F640J3A and 28F128J3A
- */
-
-/* register addresses, valid only following an CHIP_CMD_RD_ID command */
-#define CHIP_ADDR_REG_MAN 0x000000 /* manufacturer's id */
-#define CHIP_ADDR_REG_DEV 0x000001 /* device id */
-#define CHIP_ADDR_REG_CFGM 0x000003 /* master lock config */
-#define CHIP_ADDR_REG_CFG(b) (((b)<<16)|2) /* lock config for block b */
-
-/* Commands */
-#define CHIP_CMD_RST 0xFF /* reset flash */
-#define CHIP_CMD_RD_ID 0x90 /* read the id and lock bits */
-#define CHIP_CMD_RD_QUERY 0x98 /* read device capabilities */
-#define CHIP_CMD_RD_STAT 0x70 /* read the status register */
-#define CHIP_CMD_CLR_STAT 0x50 /* clear the staus register */
-#define CHIP_CMD_WR_BUF 0xE8 /* clear the staus register */
-#define CHIP_CMD_PROG 0x40 /* program word command */
-#define CHIP_CMD_ERASE1 0x20 /* 1st word for block erase */
-#define CHIP_CMD_ERASE2 0xD0 /* 2nd word for block erase */
-#define CHIP_CMD_ERASE_SUSP 0xB0 /* suspend block erase */
-#define CHIP_CMD_LOCK 0x60 /* 1st word for all lock cmds */
-#define CHIP_CMD_SET_LOCK_BLK 0x01 /* 2nd wrd set block lock bit */
-#define CHIP_CMD_SET_LOCK_MSTR 0xF1 /* 2nd wrd set master lck bit */
-#define CHIP_CMD_CLR_LOCK_BLK 0xD0 /* 2nd wrd clear blk lck bit */
-
-/* status register bits */
-#define CHIP_STAT_DPS 0x02 /* Device Protect Status */
-#define CHIP_STAT_VPPS 0x08 /* VPP Status */
-#define CHIP_STAT_PSLBS 0x10 /* Program+Set Lock Bit Stat */
-#define CHIP_STAT_ECLBS 0x20 /* Erase+Clr Lock Bit Stat */
-#define CHIP_STAT_ESS 0x40 /* Erase Suspend Status */
-#define CHIP_STAT_RDY 0x80 /* WSM Mach Status, 1=rdy */
-
-#define CHIP_STAT_ERR (CHIP_STAT_VPPS | CHIP_STAT_DPS | \
- CHIP_STAT_ECLBS | CHIP_STAT_PSLBS)
-
-/* ID and Lock Configuration */
-#define CHIP_RD_ID_LOCK 0x01 /* Bit 0 of each byte */
-#define CHIP_RD_ID_MAN 0x89 /* Manufacturer code = 0x89 */
-#define CHIP_RD_ID_DEV CFG_FLASH_ID
-
-/* dimensions */
-#define CHIP_WIDTH 2 /* chips are in 16 bit mode */
-#define CHIP_WSHIFT 1 /* (log2 of CHIP_WIDTH) */
-#define CHIP_NBLOCKS 128
-#define CHIP_BLKSZ (128 * 1024) /* of 128Kbytes each */
-#define CHIP_SIZE (CHIP_BLKSZ * CHIP_NBLOCKS)
-
-/********************** DEFINES for Hymod Flash ******************************/
-
-/*
- * The hymod board has 2 x 28F320J5 chips running in
- * 16 bit mode, for a 32 bit wide bank.
- */
-
-typedef unsigned short bank_word_t; /* 8/16/32/64bit unsigned int */
-typedef volatile bank_word_t *bank_addr_t;
-typedef unsigned long bank_size_t; /* want this big - >= 32 bit */
-
-#define BANK_CHIP_WIDTH 1 /* each bank is 1 chip wide */
-#define BANK_CHIP_WSHIFT 0 /* (log2 of BANK_CHIP_WIDTH) */
-
-#define BANK_WIDTH (CHIP_WIDTH * BANK_CHIP_WIDTH)
-#define BANK_WSHIFT (CHIP_WSHIFT + BANK_CHIP_WSHIFT)
-#define BANK_NBLOCKS CHIP_NBLOCKS
-#define BANK_BLKSZ (CHIP_BLKSZ * BANK_CHIP_WIDTH)
-#define BANK_SIZE (CHIP_SIZE * BANK_CHIP_WIDTH)
-
-#define MAX_BANKS 1 /* only one bank possible */
-
-/* align bank addresses and sizes to bank word boundaries */
-#define BANK_ADDR_WORD_ALIGN(a) ((bank_addr_t)((bank_size_t)(a) \
- & ~(BANK_WIDTH - 1)))
-#define BANK_SIZE_WORD_ALIGN(s) ((bank_size_t)BANK_ADDR_WORD_ALIGN( \
- (bank_size_t)(s) + (BANK_WIDTH - 1)))
-
-/* align bank addresses and sizes to bank block boundaries */
-#define BANK_ADDR_BLK_ALIGN(a) ((bank_addr_t)((bank_size_t)(a) \
- & ~(BANK_BLKSZ - 1)))
-#define BANK_SIZE_BLK_ALIGN(s) ((bank_size_t)BANK_ADDR_BLK_ALIGN( \
- (bank_size_t)(s) + (BANK_BLKSZ - 1)))
-
-/* align bank addresses and sizes to bank boundaries */
-#define BANK_ADDR_BANK_ALIGN(a) ((bank_addr_t)((bank_size_t)(a) \
- & ~(BANK_SIZE - 1)))
-#define BANK_SIZE_BANK_ALIGN(s) ((bank_size_t)BANK_ADDR_BANK_ALIGN( \
- (bank_size_t)(s) + (BANK_SIZE - 1)))
-
-/* add an offset to a bank address */
-#define BANK_ADDR_OFFSET(a, o) (bank_addr_t)((bank_size_t)(a) + \
- (bank_size_t)(o))
-
-/* get base address of bank b, given flash base address a */
-#define BANK_ADDR_BASE(a, b) BANK_ADDR_OFFSET(BANK_ADDR_BANK_ALIGN(a), \
- (bank_size_t)(b) * BANK_SIZE)
-
-/* adjust a bank address to start of next word, block or bank */
-#define BANK_ADDR_NEXT_WORD(a) BANK_ADDR_OFFSET(BANK_ADDR_WORD_ALIGN(a), \
- BANK_WIDTH)
-#define BANK_ADDR_NEXT_BLK(a) BANK_ADDR_OFFSET(BANK_ADDR_BLK_ALIGN(a), \
- BANK_BLKSZ)
-#define BANK_ADDR_NEXT_BANK(a) BANK_ADDR_OFFSET(BANK_ADDR_BANK_ALIGN(a), \
- BANK_SIZE)
-
-/* get bank address of chip register r given a bank base address a */
-#define BANK_ADDR_REG(a, r) BANK_ADDR_OFFSET(BANK_ADDR_BANK_ALIGN(a), \
- ((bank_size_t)(r) << BANK_WSHIFT))
-
-/* make a bank address for each chip register address */
-
-#define BANK_ADDR_REG_MAN(a) BANK_ADDR_REG((a), CHIP_ADDR_REG_MAN)
-#define BANK_ADDR_REG_DEV(a) BANK_ADDR_REG((a), CHIP_ADDR_REG_DEV)
-#define BANK_ADDR_REG_CFGM(a) BANK_ADDR_REG((a), CHIP_ADDR_REG_CFGM)
-#define BANK_ADDR_REG_CFG(b,a) BANK_ADDR_REG((a), CHIP_ADDR_REG_CFG(b))
-
-/*
- * replicate a chip cmd/stat/rd value into each byte position within a word
- * so that multiple chips are accessed in a single word i/o operation
- *
- * this must be as wide as the bank_word_t type, and take into account the
- * chip width and bank layout
- */
-
-#define BANK_FILL_WORD(o) ((bank_word_t)(o))
-
-/* make a bank word value for each chip cmd/stat/rd value */
-
-/* Commands */
-#define BANK_CMD_RST BANK_FILL_WORD(CHIP_CMD_RST)
-#define BANK_CMD_RD_ID BANK_FILL_WORD(CHIP_CMD_RD_ID)
-#define BANK_CMD_RD_STAT BANK_FILL_WORD(CHIP_CMD_RD_STAT)
-#define BANK_CMD_CLR_STAT BANK_FILL_WORD(CHIP_CMD_CLR_STAT)
-#define BANK_CMD_ERASE1 BANK_FILL_WORD(CHIP_CMD_ERASE1)
-#define BANK_CMD_ERASE2 BANK_FILL_WORD(CHIP_CMD_ERASE2)
-#define BANK_CMD_PROG BANK_FILL_WORD(CHIP_CMD_PROG)
-#define BANK_CMD_LOCK BANK_FILL_WORD(CHIP_CMD_LOCK)
-#define BANK_CMD_SET_LOCK_BLK BANK_FILL_WORD(CHIP_CMD_SET_LOCK_BLK)
-#define BANK_CMD_SET_LOCK_MSTR BANK_FILL_WORD(CHIP_CMD_SET_LOCK_MSTR)
-#define BANK_CMD_CLR_LOCK_BLK BANK_FILL_WORD(CHIP_CMD_CLR_LOCK_BLK)
-
-/* status register bits */
-#define BANK_STAT_DPS BANK_FILL_WORD(CHIP_STAT_DPS)
-#define BANK_STAT_PSS BANK_FILL_WORD(CHIP_STAT_PSS)
-#define BANK_STAT_VPPS BANK_FILL_WORD(CHIP_STAT_VPPS)
-#define BANK_STAT_PSLBS BANK_FILL_WORD(CHIP_STAT_PSLBS)
-#define BANK_STAT_ECLBS BANK_FILL_WORD(CHIP_STAT_ECLBS)
-#define BANK_STAT_ESS BANK_FILL_WORD(CHIP_STAT_ESS)
-#define BANK_STAT_RDY BANK_FILL_WORD(CHIP_STAT_RDY)
-
-#define BANK_STAT_ERR BANK_FILL_WORD(CHIP_STAT_ERR)
-
-/* ID and Lock Configuration */
-#define BANK_RD_ID_LOCK BANK_FILL_WORD(CHIP_RD_ID_LOCK)
-#define BANK_RD_ID_MAN BANK_FILL_WORD(CHIP_RD_ID_MAN)
-#define BANK_RD_ID_DEV BANK_FILL_WORD(CHIP_RD_ID_DEV)
diff --git a/board/Marvell/common/memory.c b/board/Marvell/common/memory.c
deleted file mode 100644
index 45353af41e..0000000000
--- a/board/Marvell/common/memory.c
+++ /dev/null
@@ -1,1390 +0,0 @@
-/*
- * Copyright - Galileo technology.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- *
- * written or collected and sometimes rewritten by
- * Ingo Assmus <ingo.assmus@keymile.com>
- *
- */
-
-
-#include <common.h>
-#include "../include/core.h"
-#include "../include/memory.h"
-
-/*******************************************************************************
-* memoryGetBankBaseAddress - Returns the base address of a memory bank.
-* DESCRIPTION:
-* This function returns the base address of one of the SDRAM’s memory
-* banks. There are 4 memory banks and each one represents one DIMM side.
-* INPUT:
-* MEMORY_BANK bank - Selects one of the four banks as defined in Memory.h.
-* OUTPUT:
-* None.
-* RETURN:
-* 32 bit Memory bank base address.
-*******************************************************************************/
-static unsigned long memoryGetBankRegOffset (MEMORY_BANK bank)
-{
- switch (bank) {
- case BANK0:
- return SCS_0_LOW_DECODE_ADDRESS;
- case BANK1:
- return SCS_1_LOW_DECODE_ADDRESS;
- case BANK2:
- return SCS_2_LOW_DECODE_ADDRESS;
- case BANK3:
- return SCS_3_LOW_DECODE_ADDRESS;
-
- }
- return SCS_0_LOW_DECODE_ADDRESS; /* default value */
-}
-
-unsigned int memoryGetBankBaseAddress (MEMORY_BANK bank)
-{
- unsigned int base;
- unsigned int regOffset = memoryGetBankRegOffset (bank);
-
- GT_REG_READ (regOffset, &base);
- base = base << 16; /* MV6436x */
- return base;
-}
-
-/*******************************************************************************
-* memoryGetDeviceBaseAddress - Returns the base address of a device.
-* DESCRIPTION:
-* This function returns the base address of a device on the system. There
-* are 5 possible devices (0 - 4 and one boot device) as defined in
-* gtMemory.h. Each of the device parameters is maped to one of the CS
-* (Devices chip selects) base address register.
-* INPUT:
-* device - Selects one of the five devices as defined in Memory.h.
-* OUTPUT:
-* None.
-* RETURN:
-* 32 bit Device base address.
-*
-*******************************************************************************/
-static unsigned int memoryGetDeviceRegOffset (DEVICE device)
-{
- switch (device) {
- case DEVICE0:
- return CS_0_LOW_DECODE_ADDRESS;
- case DEVICE1:
- return CS_1_LOW_DECODE_ADDRESS;
- case DEVICE2:
- return CS_2_LOW_DECODE_ADDRESS;
- case DEVICE3:
- return CS_3_LOW_DECODE_ADDRESS;
- case BOOT_DEVICE:
- return BOOTCS_LOW_DECODE_ADDRESS;
- }
- return CS_0_LOW_DECODE_ADDRESS; /* default value */
-}
-
-unsigned int memoryGetDeviceBaseAddress (DEVICE device)
-{
- unsigned int regBase;
- unsigned int regOffset = memoryGetDeviceRegOffset (device);
-
- GT_REG_READ (regOffset, &regBase);
-
- regBase = regBase << 16; /* MV6436x */
- return regBase;
-}
-
-/*******************************************************************************
-* MemoryGetPciBaseAddr - Returns the base address of a PCI window.
-* DESCRIPTION:
-* This function returns the base address of a PCI window. There are 5
-* possible PCI windows (memory 0 - 3 and one for I/O) for each PCI
-* interface as defined in gtMemory.h, used by the CPU's address decoding
-* mechanism.
-* New in MV6436x
-* INPUT:
-* pciWindow - Selects one of the PCI windows as defined in Memory.h.
-* OUTPUT:
-* None.
-* RETURN:
-* 32 bit PCI window base address.
-*******************************************************************************/
-unsigned int MemoryGetPciBaseAddr (PCI_MEM_WINDOW pciWindow)
-{
- unsigned int baseAddrReg, base;
-
- switch (pciWindow) {
- case PCI_0_IO:
- baseAddrReg = PCI_0I_O_LOW_DECODE_ADDRESS; /*PCI_0_IO_BASE_ADDR; */
- break;
- case PCI_0_MEM0:
- baseAddrReg = PCI_0MEMORY0_LOW_DECODE_ADDRESS; /*PCI_0_MEMORY0_BASE_ADDR; */
- break;
- case PCI_0_MEM1:
- baseAddrReg = PCI_0MEMORY1_LOW_DECODE_ADDRESS; /*PCI_0_MEMORY1_BASE_ADDR; */
- break;
- case PCI_0_MEM2:
- baseAddrReg = PCI_0MEMORY2_LOW_DECODE_ADDRESS; /*PCI_0_MEMORY2_BASE_ADDR; */
- break;
- case PCI_0_MEM3:
- baseAddrReg = PCI_0MEMORY3_LOW_DECODE_ADDRESS; /*PCI_0_MEMORY3_BASE_ADDR; */
- break;
-#ifdef INCLUDE_PCI_1
- case PCI_1_IO:
- baseAddrReg = PCI_1I_O_LOW_DECODE_ADDRESS; /*PCI_1_IO_BASE_ADDR; */
- break;
- case PCI_1_MEM0:
- baseAddrReg = PCI_1MEMORY0_LOW_DECODE_ADDRESS; /*PCI_1_MEMORY0_BASE_ADDR; */
- break;
- case PCI_1_MEM1:
- baseAddrReg = PCI_1MEMORY1_LOW_DECODE_ADDRESS; /*PCI_1_MEMORY1_BASE_ADDR; */
- break;
- case PCI_1_MEM2:
- baseAddrReg = PCI_1MEMORY2_LOW_DECODE_ADDRESS; /*PCI_1_MEMORY2_BASE_ADDR; */
- break;
- case PCI_1_MEM3:
- baseAddrReg = PCI_1MEMORY3_LOW_DECODE_ADDRESS; /*PCI_1_MEMORY3_BASE_ADDR; */
- break;
-#endif /* INCLUDE_PCI_1 */
- default:
- return 0xffffffff;
- }
- GT_REG_READ (baseAddrReg, &base);
- return (base << 16);
-}
-
-/*******************************************************************************
-* memoryGetBankSize - Returns the size of a memory bank.
-* DESCRIPTION:
-* This function returns the size of memory bank as described in
-* 'gtMemoryGetBankBaseAddress' function.
-* INPUT:
-* bank - Selects one of the four banks as defined in Memory.h.
-* OUTPUT:
-* None.
-* RETURN:
-* 32 bit size memory bank size or 0 for a closed or non populated bank.
-*
-*******************************************************************************/
-unsigned int memoryGetBankSize (MEMORY_BANK bank)
-{
- unsigned int sizeReg, size;
- MEMORY_WINDOW window;
-
- switch (bank) {
- case BANK0:
- sizeReg = SCS_0_HIGH_DECODE_ADDRESS; /* CS_0_SIZE; */
- window = CS_0_WINDOW;
- break;
- case BANK1:
- sizeReg = SCS_1_HIGH_DECODE_ADDRESS; /* CS_1_SIZE; */
- window = CS_1_WINDOW;
- break;
- case BANK2:
- sizeReg = SCS_2_HIGH_DECODE_ADDRESS; /* CS_2_SIZE; */
- window = CS_2_WINDOW;
- break;
- case BANK3:
- sizeReg = SCS_3_HIGH_DECODE_ADDRESS; /* CS_3_SIZE; */
- window = CS_3_WINDOW;
- break;
- default:
- return 0;
- break;
- }
- /* If the window is closed, a size of 0 is returned */
- if (MemoryGetMemWindowStatus (window) != MEM_WINDOW_ENABLED)
- return 0;
- GT_REG_READ (sizeReg, &size);
- size = ((size << 16) | 0xffff) + 1;
- return size;
-}
-
-/*******************************************************************************
-* memoryGetDeviceSize - Returns the size of a device memory space.
-* DESCRIPTION:
-* This function returns the memory space size of a given device.
-* INPUT:
-* device - Selects one of the five devices as defined in Memory.h.
-* OUTPUT:
-* None.
-* RETURN:
-* 32 bit size of a device memory space.
-*******************************************************************************/
-unsigned int memoryGetDeviceSize (DEVICE device)
-{
- unsigned int sizeReg, size;
- MEMORY_WINDOW window;
-
- switch (device) {
- case DEVICE0:
- sizeReg = CS_0_HIGH_DECODE_ADDRESS; /*DEV_CS0_SIZE; */
- window = DEVCS_0_WINDOW;
- break;
- case DEVICE1:
- sizeReg = CS_1_HIGH_DECODE_ADDRESS; /*DEV_CS1_SIZE; */
- window = DEVCS_1_WINDOW;
- break;
- case DEVICE2:
- sizeReg = CS_2_HIGH_DECODE_ADDRESS; /*DEV_CS2_SIZE; */
- window = DEVCS_2_WINDOW;
- break;
- case DEVICE3:
- sizeReg = CS_3_HIGH_DECODE_ADDRESS; /*DEV_CS3_SIZE; */
- window = DEVCS_3_WINDOW;
- break;
- case BOOT_DEVICE:
- sizeReg = BOOTCS_HIGH_DECODE_ADDRESS; /*BOOTCS_SIZE; */
- window = BOOT_CS_WINDOW;
- break;
- default:
- return 0;
- break;
- }
- /* If the window is closed, a size of 0 is returned */
- if (MemoryGetMemWindowStatus (window) != MEM_WINDOW_ENABLED)
- return 0;
- GT_REG_READ (sizeReg, &size);
- size = ((size << 16) | 0xffff) + 1;
- return size;
-}
-
-/*******************************************************************************
-* MemoryGetPciWindowSize - Returns the size of a PCI memory window.
-* DESCRIPTION:
-* This function returns the size of a PCI window.
-* INPUT:
-* pciWindow - Selects one of the PCI memory windows as defined in
-* Memory.h.
-* OUTPUT:
-* None.
-* RETURN:
-* 32 bit size of a PCI memory window.
-*******************************************************************************/
-unsigned int MemoryGetPciWindowSize (PCI_MEM_WINDOW pciWindow)
-{
- unsigned int sizeReg, size;
-
- switch (pciWindow) {
- case PCI_0_IO:
- sizeReg = PCI_0I_O_HIGH_DECODE_ADDRESS; /*PCI_0_IO_SIZE; */
- break;
- case PCI_0_MEM0:
- sizeReg = PCI_0MEMORY0_HIGH_DECODE_ADDRESS; /*PCI_0_MEMORY0_SIZE; */
- break;
- case PCI_0_MEM1:
- sizeReg = PCI_0MEMORY1_HIGH_DECODE_ADDRESS; /*PCI_0_MEMORY1_SIZE; */
- break;
- case PCI_0_MEM2:
- sizeReg = PCI_0MEMORY2_HIGH_DECODE_ADDRESS; /*PCI_0_MEMORY2_SIZE; */
- break;
- case PCI_0_MEM3:
- sizeReg = PCI_0MEMORY3_HIGH_DECODE_ADDRESS; /*PCI_0_MEMORY3_SIZE; */
- break;
-#ifdef INCLUDE_PCI_1
- case PCI_1_IO:
- sizeReg = PCI_1I_O_HIGH_DECODE_ADDRESS; /*PCI_1_IO_SIZE; */
- break;
- case PCI_1_MEM0:
- sizeReg = PCI_1MEMORY0_HIGH_DECODE_ADDRESS; /*PCI_1_MEMORY0_SIZE; */
- break;
- case PCI_1_MEM1:
- sizeReg = PCI_1MEMORY1_HIGH_DECODE_ADDRESS; /*PCI_1_MEMORY1_SIZE; */
- break;
- case PCI_1_MEM2:
- sizeReg = PCI_1MEMORY2_HIGH_DECODE_ADDRESS; /*PCI_1_MEMORY2_SIZE; */
- break;
- case PCI_1_MEM3:
- sizeReg = PCI_1MEMORY3_HIGH_DECODE_ADDRESS; /*PCI_1_MEMORY3_SIZE; */
- break;
-#endif /* INCLUDE_PCI_1 */
- default:
- return 0x0;
- }
- /* If the memory window is disabled, retrun size = 0 */
- if (MemoryGetMemWindowStatus (PCI_0_IO_WINDOW << pciWindow)
- == MEM_WINDOW_DISABLED)
- return 0;
- GT_REG_READ (sizeReg, &size);
- size = ((size << 16) | 0xffff) + 1;
- return size;
-}
-
-/*******************************************************************************
-* memoryGetDeviceWidth - Returns the width of a given device.
-* DESCRIPTION:
-* The MV's device interface supports up to 32 Bit wide devices. A device
-* can have a 1, 2, 4 or 8 Bytes data width. This function returns the
-* width of a device as defined by the user or the operating system.
-* INPUT:
-* device - Selects one of the five devices as defined in Memory.h.
-* OUTPUT:
-* None.
-* RETURN:
-* Device width in Bytes (1,2,4 or 8), 0 if error had occurred.
-*******************************************************************************/
-unsigned int memoryGetDeviceWidth (DEVICE device)
-{
- unsigned int width;
- unsigned int regValue;
-
- GT_REG_READ (DEVICE_BANK0PARAMETERS + device * 4, &regValue);
- width = (regValue & (BIT20 | BIT21)) >> 20;
- return (BIT0 << width);
-}
-
-/*******************************************************************************
-* memoryMapBank - Set new base address and size for one of the memory
-* banks.
-*
-* DESCRIPTION:
-* The CPU interface address decoding map consists of 21 address windows
-* for the different devices (e.g. CS[3:0] ,PCI0 Mem 0/1/2/3...). Each
-* window can have a minimum of 1Mbytes of address space, and up to 4Gbyte
-* space. Each address window is defined by two registers - base and size.
-* The CPU address is compared with the values in the various CPU windows
-* until a match is found and the address is than targeted to that window.
-* This function sets new base and size for one the memory banks
-* (CS0 - CS3). It is the programmer`s responsibility to make sure that
-* there are no conflicts with other memory spaces. When two memory spaces
-* overlap, the MV’s behavior is not defined .If a bank needs to be closed,
-* set the ’bankLength’ parameter size to 0x0.
-*
-* INPUT:
-* bank - One of the memory banks (CS0-CS3) as defined in gtMemory.h.
-* bankBase - The memory bank base address.
-* bankLength - The memory bank size. This function will decrement the
-* 'bankLength' parameter by one and then check if the size is
-* valid. A valid size must be programed from LSB to MSB as
-* sequence of ‘1’s followed by sequence of ‘0’s.
-* To close a memory window simply set the size to 0.
-* NOTE!!!
-* The size must be in 64Kbyte granularity.
-* The base address must be aligned to the size.
-* OUTPUT:
-* None.
-* RETURN:
-* False for invalid size, true otherwise.
-*
-* CAUTION: PCI_functions must be implemented later To_do !!!!!!!!!!!!!!!!!
-*
-*******************************************************************************/
-
-bool memoryMapBank (MEMORY_BANK bank, unsigned int bankBase,
- unsigned int bankLength)
-{
- unsigned int newBase, newSize, baseReg, sizeReg, temp, rShift;
-
-/* PCI_INTERNAL_BAR pciBAR; */
-
- switch (bank) {
- case BANK0:
- baseReg = SCS_0_LOW_DECODE_ADDRESS; /*CS_0_BASE_ADDR; */
- sizeReg = SCS_0_HIGH_DECODE_ADDRESS; /*CS_0_SIZE; */
-/* pciBAR = PCI_CS0_BAR; */
- break;
- case BANK1:
- baseReg = SCS_1_LOW_DECODE_ADDRESS; /*CS_1_BASE_ADDR; */
- sizeReg = SCS_1_HIGH_DECODE_ADDRESS; /*CS_1_SIZE; */
- /* pciBAR = SCS_0_HIGH_DECODE_ADDRESS; */ /*PCI_CS1_BAR; */
- break;
- case BANK2:
- baseReg = SCS_2_LOW_DECODE_ADDRESS; /*CS_2_BASE_ADDR; */
- sizeReg = SCS_2_HIGH_DECODE_ADDRESS; /*CS_2_SIZE; */
-/* pciBAR = PCI_CS2_BAR;*/
- break;
- case BANK3:
- baseReg = SCS_3_LOW_DECODE_ADDRESS; /*CS_3_BASE_ADDR; */
- sizeReg = SCS_3_HIGH_DECODE_ADDRESS; /*CS_3_SIZE; */
-/* pciBAR = PCI_CS3_BAR; */
- break;
- default:
- return false;
- }
- /* If the size is 0, the window will be disabled */
- if (bankLength == 0) {
- MemoryDisableWindow (CS_0_WINDOW << bank);
- /* Disable the BAR from the PCI slave side */
-/* gtPci0DisableInternalBAR(pciBAR); */
-/* gtPci1DisableInternalBAR(pciBAR); */
- return true;
- }
- /* The base address must be aligned to the size */
- if ((bankBase % bankLength) != 0) {
- return false;
- }
- if (bankLength >= MINIMUM_MEM_BANK_SIZE) {
- newBase = bankBase >> 16;
- newSize = bankLength >> 16;
- /* Checking that the size is a sequence of '1' followed by a
- sequence of '0' starting from LSB to MSB. */
- temp = newSize - 1;
- for (rShift = 0; rShift < 16; rShift++) {
- temp = temp >> rShift;
- if ((temp & 0x1) == 0) { /* Either we got to the last '1' */
- /* or the size is not valid */
- if (temp > 0x0)
- return false;
- else
- break;
- }
- }
-#ifdef DEBUG
- {
- unsigned int oldBase, oldSize;
-
- GT_REG_READ (baseReg, &oldBase);
- GT_REG_READ (sizeReg + 8, &oldSize);
-
- printf ("b%d Base:%x Size:%x -> Base:%x Size:%x\n",
- bank, oldBase, oldSize, newBase, newSize);
- }
-#endif
- /* writing the new values */
- GT_REG_WRITE (baseReg, newBase);
- GT_REG_WRITE (sizeReg, newSize - 1);
- /* Enable back the window */
- MemoryEnableWindow (CS_0_WINDOW << bank);
- /* Enable the BAR from the PCI slave side */
-/* gtPci0EnableInternalBAR(pciBAR); */
-/* gtPci1EnableInternalBAR(pciBAR); */
- return true;
- }
- return false;
-}
-
-
-/*******************************************************************************
-* memoryMapDeviceSpace - Set new base address and size for one of the device
-* windows.
-*
-* DESCRIPTION:
-* The CPU interface address decoding map consists of 21 address windows
-* for the different devices (e.g. CS[3:0] ,PCI0 Mem 0/1/2/3...). Each
-* window can have a minimum of 1Mbytes of address space, and up to 4Gbyte
-* space. Each address window is defined by two registers - base and size.
-* The CPU address is compared with the values in the various CPU windows
-* until a match is found and the address is than targeted to that window.
-* This function sets new base and size for one the device windows
-* (DEV_CS0 - DEV_CS3). It is the programmer`s responsibility to make sure
-* that there are no conflicts with other memory spaces. When two memory
-* spaces overlap, the MV’s behavior is not defined .If a device window
-* needs to be closed, set the 'deviceLength' parameter size to 0x0.
-*
-* INPUT:
-* device - One of the device windows (DEV_CS0-DEV_CS3) as
-* defined in gtMemory.h.
-* deviceBase - The device window base address.
-* deviceLength - The device window size. This function will decrement
-* the 'deviceLength' parameter by one and then
-* check if the size is valid. A valid size must be
-* programed from LSB to MSB as sequence of ‘1’s
-* followed by sequence of ‘0’s.
-* To close a memory window simply set the size to 0.
-*
-* NOTE!!!
-* The size must be in 64Kbyte granularity.
-* The base address must be aligned to the size.
-*
-* OUTPUT:
-* None.
-*
-* RETURN:
-* False for invalid size, true otherwise.
-*
-* CAUTION: PCI_functions must be implemented later To_do !!!!!!!!!!!!!!!!!
-*
-*******************************************************************************/
-
-bool memoryMapDeviceSpace (DEVICE device, unsigned int deviceBase,
- unsigned int deviceLength)
-{
- unsigned int newBase, newSize, baseReg, sizeReg, temp, rShift;
-
-/* PCI_INTERNAL_BAR pciBAR;*/
-
- switch (device) {
- case DEVICE0:
- baseReg = CS_0_LOW_DECODE_ADDRESS; /*DEV_CS0_BASE_ADDR; */
- sizeReg = CS_0_HIGH_DECODE_ADDRESS; /*DEV_CS0_SIZE; */
-/* pciBAR = PCI_DEV_CS0_BAR; */
- break;
- case DEVICE1:
- baseReg = CS_1_LOW_DECODE_ADDRESS; /*DEV_CS1_BASE_ADDR; */
- sizeReg = CS_1_HIGH_DECODE_ADDRESS; /*DEV_CS1_SIZE; */
-/* pciBAR = PCI_DEV_CS1_BAR; */
- break;
- case DEVICE2:
- baseReg = CS_2_LOW_DECODE_ADDRESS; /*DEV_CS2_BASE_ADDR; */
- sizeReg = CS_2_HIGH_DECODE_ADDRESS; /*DEV_CS2_SIZE; */
-/* pciBAR = PCI_DEV_CS2_BAR; */
- break;
- case DEVICE3:
- baseReg = CS_3_LOW_DECODE_ADDRESS; /*DEV_CS3_BASE_ADDR; */
- sizeReg = CS_3_HIGH_DECODE_ADDRESS; /*DEV_CS3_SIZE; */
-/* pciBAR = PCI_DEV_CS3_BAR; */
- break;
- case BOOT_DEVICE:
- baseReg = BOOTCS_LOW_DECODE_ADDRESS; /*BOOTCS_BASE_ADDR; */
- sizeReg = BOOTCS_HIGH_DECODE_ADDRESS; /*BOOTCS_SIZE; */
-/* pciBAR = PCI_BOOT_CS_BAR; */
- break;
- default:
- return false;
- }
- if (deviceLength == 0) {
- MemoryDisableWindow (DEVCS_0_WINDOW << device);
- /* Disable the BAR from the PCI slave side */
-/* gtPci0DisableInternalBAR(pciBAR); */
-/* gtPci1DisableInternalBAR(pciBAR); */
- return true;
- }
- /* The base address must be aligned to the size */
- if ((deviceBase % deviceLength) != 0) {
- return false;
- }
- if (deviceLength >= MINIMUM_DEVICE_WINDOW_SIZE) {
- newBase = deviceBase >> 16;
- newSize = deviceLength >> 16;
- /* Checking that the size is a sequence of '1' followed by a
- sequence of '0' starting from LSB to MSB. */
- temp = newSize - 1;
- for (rShift = 0; rShift < 16; rShift++) {
- temp = temp >> rShift;
- if ((temp & 0x1) == 0) { /* Either we got to the last '1' */
- /* or the size is not valid */
- if (temp > 0x0)
- return false;
- else
- break;
- }
- }
- /* writing the new values */
- GT_REG_WRITE (baseReg, newBase);
- GT_REG_WRITE (sizeReg, newSize - 1);
- MemoryEnableWindow (DEVCS_0_WINDOW << device);
- /* Enable the BAR from the PCI slave side */
-/* gtPci0EnableInternalBAR(pciBAR); */
-/* gtPci1EnableInternalBAR(pciBAR); */
- return true;
- }
- return false;
-}
-
-/*******************************************************************************
-* MemorySetPciWindow - Set new base address and size for one of the PCI
-* windows.
-*
-* DESCRIPTION:
-* The CPU interface address decoding map consists of 21 address windows
-* for the different devices (e.g. CS[3:0] ,PCI0 Mem 0/1/2/3...). Each
-* window can have a minimum of 1Mbytes of address space, and up to 4Gbyte
-* space. Each address window is defined by two registers - base and size.
-* The CPU address is compared with the values in the various CPU windows
-* until a match is found and the address is than targeted to that window.
-* This function sets new base and size for one the PCI windows
-* (PCI memory0/1/2..). It is the programmer`s responsibility to make sure
-* that there are no conflicts with other memory spaces. When two memory
-* spaces overlap, the MV’s behavior is not defined .If a PCI window
-* needs to be closed, set the 'pciWindowSize' parameter size to 0x0.
-*
-* INPUT:
-* pciWindow - One of the PCI windows as defined in gtMemory.h.
-* pciWindowBase - The PCI window base address.
-* pciWindowSize - The PCI window size. This function will decrement the
-* 'pciWindowSize' parameter by one and then check if the
-* size is valid. A valid size must be programed from LSB
-* to MSB as sequence of ‘1’s followed by sequence of ‘0’s.
-* To close a memory window simply set the size to 0.
-*
-* NOTE!!!
-* The size must be in 64Kbyte granularity.
-* The base address must be aligned to the size.
-*
-* OUTPUT:
-* None.
-*
-* RETURN:
-* False for invalid size, true otherwise.
-*
-*******************************************************************************/
-bool memorySetPciWindow (PCI_MEM_WINDOW pciWindow, unsigned int pciWindowBase,
- unsigned int pciWindowSize)
-{
- unsigned int currentLow, baseAddrReg, sizeReg, temp, rShift;
-
- switch (pciWindow) {
- case PCI_0_IO:
- baseAddrReg = PCI_1I_O_LOW_DECODE_ADDRESS; /*PCI_0_IO_BASE_ADDR; */
- sizeReg = PCI_0I_O_HIGH_DECODE_ADDRESS; /*PCI_0_IO_SIZE; */
- break;
- case PCI_0_MEM0:
- baseAddrReg = PCI_0MEMORY0_LOW_DECODE_ADDRESS; /*PCI_0_MEMORY0_BASE_ADDR; */
- sizeReg = PCI_0MEMORY0_HIGH_DECODE_ADDRESS; /*PCI_0_MEMORY0_SIZE; */
- break;
- case PCI_0_MEM1:
- baseAddrReg = PCI_0MEMORY1_LOW_DECODE_ADDRESS; /*PCI_0_MEMORY1_BASE_ADDR; */
- sizeReg = PCI_0MEMORY1_HIGH_DECODE_ADDRESS; /*PCI_0_MEMORY1_SIZE; */
- break;
- case PCI_0_MEM2:
- baseAddrReg = PCI_0MEMORY2_LOW_DECODE_ADDRESS; /*PCI_0_MEMORY2_BASE_ADDR; */
- sizeReg = PCI_0MEMORY2_HIGH_DECODE_ADDRESS; /*PCI_0_MEMORY2_SIZE; */
- break;
- case PCI_0_MEM3:
- baseAddrReg = PCI_0MEMORY3_LOW_DECODE_ADDRESS; /*PCI_0_MEMORY3_BASE_ADDR; */
- sizeReg = PCI_0MEMORY3_HIGH_DECODE_ADDRESS; /*PCI_0_MEMORY3_SIZE; */
- break;
-#ifdef INCLUDE_PCI_1
- case PCI_1_IO:
- baseAddrReg = PCI_1I_O_LOW_DECODE_ADDRESS; /*PCI_1_IO_BASE_ADDR; */
- sizeReg = PCI_1I_O_HIGH_DECODE_ADDRESS; /*PCI_1_IO_SIZE; */
- break;
- case PCI_1_MEM0:
- baseAddrReg = PCI_1MEMORY0_LOW_DECODE_ADDRESS; /*PCI_1_MEMORY0_BASE_ADDR; */
- sizeReg = PCI_1MEMORY0_HIGH_DECODE_ADDRESS; /*PCI_1_MEMORY0_SIZE; */
- break;
- case PCI_1_MEM1:
- baseAddrReg = PCI_1MEMORY1_LOW_DECODE_ADDRESS; /*PCI_1_MEMORY1_BASE_ADDR; */
- sizeReg = PCI_1MEMORY1_HIGH_DECODE_ADDRESS; /*PCI_1_MEMORY1_SIZE; */
- break;
- case PCI_1_MEM2:
- baseAddrReg = PCI_1MEMORY2_LOW_DECODE_ADDRESS; /*PCI_1_MEMORY2_BASE_ADDR; */
- sizeReg = PCI_1MEMORY2_HIGH_DECODE_ADDRESS; /*PCI_1_MEMORY2_SIZE; */
- break;
- case PCI_1_MEM3:
- baseAddrReg = PCI_1MEMORY3_LOW_DECODE_ADDRESS; /*PCI_1_MEMORY3_BASE_ADDR; */
- sizeReg = PCI_1MEMORY3_HIGH_DECODE_ADDRESS; /*PCI_1_MEMORY3_SIZE; */
- break;
-#endif /* INCLUDE_PCI_1 */
- default:
- return false;
- }
- if (pciWindowSize == 0) {
- MemoryDisableWindow (PCI_0_IO_WINDOW << pciWindow);
- return true;
- }
- /* The base address must be aligned to the size */
- if ((pciWindowBase % pciWindowSize) != 0) {
- return false;
- }
- if (pciWindowSize >= MINIMUM_PCI_WINDOW_SIZE) {
- pciWindowBase >>= 16;
- pciWindowSize >>= 16;
- /* Checking that the size is a sequence of '1' followed by a
- sequence of '0' starting from LSB to MSB. */
- temp = pciWindowSize - 1;
- for (rShift = 0; rShift < 16; rShift++) {
- temp = temp >> rShift;
- if ((temp & 0x1) == 0) { /* Either we got to the last '1' */
- /* or the size is not valid */
- if (temp > 0x0)
- return false;
- else
- break;
- }
- }
- GT_REG_WRITE (sizeReg, pciWindowSize - 1);
- GT_REG_READ (baseAddrReg, &currentLow);
- pciWindowBase =
- (pciWindowBase & 0xfffff) | (currentLow & 0xfff00000);
- GT_REG_WRITE (baseAddrReg, pciWindowBase);
- MemoryEnableWindow (PCI_0_IO_WINDOW << pciWindow);
- return true;
- }
- return false;
-}
-
-/*******************************************************************************
-* memoryMapInternalRegistersSpace - Sets new base address for the internal
-* registers memory space.
-*
-* DESCRIPTION:
-* This function set new base address for the internal register’s memory
-* space (the size is fixed and cannot be modified). The function does not
-* handle overlapping with other memory spaces, it is the programer's
-* responsibility to ensure that overlapping does not occur.
-* When two memory spaces overlap, the MV’s behavior is not defined.
-*
-* INPUT:
-* internalRegBase - new base address for the internal register’s memory
-* space.
-*
-* OUTPUT:
-* None.
-*
-* RETURN:
-* true on success, false on failure
-*
-*******************************************************************************/
-/********************************************************************
-* memoryMapInternalRegistersSpace - Sets new base address for the internals
-* registers.
-*
-* INPUTS: unsigned int internalRegBase - The new base address.
-* RETURNS: true on success, false on failure
-*********************************************************************/
-bool memoryMapInternalRegistersSpace (unsigned int internalRegBase)
-{
- unsigned int currentValue;
- unsigned int internalValue = internalRegBase;
-
- internalRegBase = (internalRegBase >> 16);
- GT_REG_READ (INTERNAL_SPACE_DECODE, &currentValue);
- internalRegBase = (currentValue & 0xff000000) | internalRegBase;
- GT_REG_WRITE (INTERNAL_SPACE_DECODE, internalRegBase);
- /* initializing also the global variable 'internalRegBaseAddr' */
-/* gtInternalRegBaseAddr = internalValue; */
- INTERNAL_REG_BASE_ADDR = internalValue;
- return true;
-}
-
-/*******************************************************************************
-* memoryGetInternalRegistersSpace - Returns the internal registers Base
-* address.
-*
-* DESCRIPTION:
-* This function returns the base address of the internal register’s
-* memory space .
-*
-* INPUT:
-* None.
-*
-* OUTPUT:
-* None.
-*
-* RETURN:
-* 32 bit base address of the internal register’s memory space.
-*
-*******************************************************************************/
-unsigned int memoryGetInternalRegistersSpace (void)
-{
- unsigned int currentValue = 0;
-
- GT_REG_READ (INTERNAL_SPACE_DECODE, &currentValue);
- return ((currentValue & 0x000fffff) << 16);
-}
-
-/*******************************************************************************
-* gtMemoryGetInternalSramBaseAddr - Returns the integrated SRAM base address.
-*
-* DESCRIPTION:
-* The Atlantis incorporate integrated 2Mbit SRAM for general use. This
-* funcnion return the SRAM's base address.
-* INPUT:
-* None.
-* OUTPUT:
-* None.
-* RETURN:
-* 32 bit SRAM's base address.
-*
-*******************************************************************************/
-unsigned int memoryGetInternalSramBaseAddr (void)
-{
- return ((GTREGREAD (INTEGRATED_SRAM_BASE_ADDR) & 0xfffff) << 16);
-}
-
-/*******************************************************************************
-* gtMemorySetInternalSramBaseAddr - Set the integrated SRAM base address.
-*
-* DESCRIPTION:
-* The Atlantis incorporate integrated 2Mbit SRAM for general use. This
-* function sets a new base address to the SRAM .
-* INPUT:
-* sramBaseAddress - The SRAM's base address.
-* OUTPUT:
-* None.
-* RETURN:
-* None.
-*
-*******************************************************************************/
-void gtMemorySetInternalSramBaseAddr (unsigned int sramBaseAddress)
-{
- GT_REG_WRITE (INTEGRATED_SRAM_BASE_ADDR, sramBaseAddress >> 16);
-}
-
-/*******************************************************************************
-* memorySetProtectRegion - Set protection mode for one of the 8 regions.
-*
-* DESCRIPTION:
-* The CPU interface supports configurable access protection. This includes
-* up to eight address ranges defined to a different protection type :
-* whether the address range is cacheable or not, whether it is writable or
-* not , and whether it is accessible or not. A Low and High registers
-* define each window while the minimum address range of each window is
-* 1Mbyte. An address driven by the CPU, in addition to the address
-* decoding and remapping process, is compared against the eight Access
-* Protection Low/High registers , if an address matches one of the windows
-* , the MV device checks the transaction type against the protection bits
-* defined in CPU Access Protection register, to determine if the access is
-* allowed. This function set a protection mode to one of the 8 possible
-* regions.
-* NOTE:
-* The CPU address windows are restricted to a size of 2 power n and the
-* start address must be aligned to the window size. For example, if using
-* a 16 MB window, the start address bits [23:0] must be 0.The MV's
-* internal registers space is not protected, even if the access protection
-* windows contain this space.
-*
-* INPUT:
-* region - selects which region to be configured. The values defined in
-* gtMemory.h:
-*
-* - MEM_REGION0
-* - MEM_REGION1
-* - etc.
-*
-* memAccess - Allows or forbids access (read or write ) to the region. The
-* values defined in gtMemory.h:
-*
-* - MEM_ACCESS_ALLOWED
-* - MEM_ACCESS_FORBIDEN
-*
-* memWrite - CPU write protection to the region. The values defined in
-* gtMemory.h:
-*
-* - MEM_WRITE_ALLOWED
-* - MEM_WRITE_FORBIDEN
-*
-* cacheProtection - Defines whether caching the region is allowed or not.
-* The values defined in gtMemory.h:
-*
-* - MEM_CACHE_ALLOWED
-* - MEM_CACHE_FORBIDEN
-*
-* baseAddress - the region's base Address.
-* regionSize - The region's size. This function will decrement the
-* 'regionSize' parameter by one and then check if the size
-* is valid. A valid size must be programed from LSB to MSB
-* as sequence of ‘1’s followed by sequence of ‘0’s.
-* To close a memory window simply set the size to 0.
-*
-* NOTE!!!
-* The size must be in 64Kbyte granularity.
-* The base address must be aligned to the size.
-*
-* OUTPUT:
-* None.
-*
-* RETURN:
-* False for invalid size, true otherwise.
-*
-*******************************************************************************/
-bool memorySetProtectRegion (MEMORY_PROTECT_WINDOW window,
- MEMORY_ACCESS memAccess,
- MEMORY_ACCESS_WRITE memWrite,
- MEMORY_CACHE_PROTECT cacheProtection,
- unsigned int baseAddress, unsigned int size)
-{
- unsigned int dataForReg, temp, rShift;
-
- if (size == 0) {
- GT_REG_WRITE ((CPU_PROTECT_WINDOW_0_SIZE + 0x10 * window),
- 0x0);
- return true;
- }
- /* The base address must be aligned to the size. */
- if (baseAddress % size != 0) {
- return false;
- }
- if (size >= MINIMUM_ACCESS_WIN_SIZE) {
- baseAddress = ((baseAddress >> 16) & 0xfffff);
- dataForReg = baseAddress | ((memAccess << 20) & BIT20) |
- ((memWrite << 21) & BIT21) | ((cacheProtection << 22)
- & BIT22) | BIT31;
- GT_REG_WRITE (CPU_PROTECT_WINDOW_0_BASE_ADDR + 0x10 * window,
- dataForReg);
- size >>= 16;
- /* Checking that the size is a sequence of '1' followed by a
- sequence of '0' starting from LSB to MSB. */
- temp = size - 1;
- for (rShift = 0; rShift < 16; rShift++) {
- temp = temp >> rShift;
- if ((temp & 0x1) == 0) { /* Either we got to the last '1' */
- /* or the size is not valid */
- if (temp > 0x0)
- return false;
- else
- break;
- }
- }
- GT_REG_WRITE ((CPU_PROTECT_WINDOW_0_SIZE + 0x10 * window),
- size - 1);
- return true;
- }
- return false;
-}
-
-/*******************************************************************************
-* gtMemoryDisableProtectRegion - Disable a protected window.
-*
-* DESCRIPTION:
-* This function disable a protected window set by
-* 'gtMemorySetProtectRegion' function.
-*
-* INPUT:
-* window - one of the 4 windows ( defined in gtMemory.h ).
-*
-* OUTPUT:
-* None.
-*
-* RETURN:
-* None.
-*
-*******************************************************************************/
-void memoryDisableProtectRegion (MEMORY_PROTECT_WINDOW window)
-{
- RESET_REG_BITS (((CPU_PROTECT_WINDOW_0_BASE_ADDR) + (0x10 * window)),
- BIT31);
-}
-
-/*******************************************************************************
-* memorySetPciRemapValue - Set a remap value to a PCI memory space target.
-*
-* DESCRIPTION:
-* In addition to the address decoding mechanism, the CPU has an address
-* remapping mechanism to be used by every PCI decoding window. Each PCI
-* window can be remaped to a desired address target according to the remap
-* value within the remap register. The address remapping is useful when a
-* CPU address range must be reallocated to a different location on the
-* PCI bus. Also, it enables CPU access to a PCI agent located above the
-* 4Gbyte space. On system boot, each of the PCI memory spaces is maped to
-* a defualt value (see CPU interface section in the MV spec for the
-* default values). The remap mechanism does not always produce the desired
-* address on the PCI bus because of the remap mechanism way of working
-* (to fully understand why, please see the 'Address Remapping' section in
-* the MV's spec). Therefor, this function sets a desired remap value to
-* one of the PCI memory windows and return the effective address that
-* should be used when exiting the PCI memory window. You should ALWAYS use
-* the returned value by this function when remapping a PCI window and
-* exiting it. If for example the base address of PCI0 memory 0 is
-* 0x90000000, the size is 0x03ffffff and the remap value is 0x11000000,
-* the function will return the value of 0x91000000 that MUST
-* be used to exit this memory window in order to achive the deisred
-* remapping.
-*
-* INPUT:
-* memoryWindow - One of the PCI memory windows as defined in Memory.h
-* remapValueLow - The low remap value.
-* remapValueHigh - The high remap value.
-* OUTPUT:
-* None.
-*
-* RETURN:
-* The effective base address to exit the PCI, or 0xffffffff if one of the
-* parameters is erroneous or the effective base address is higher the top
-* decode value.
-*
-*******************************************************************************/
-unsigned int memorySetPciRemapValue (PCI_MEM_WINDOW memoryWindow,
- unsigned int remapValueHigh,
- unsigned int remapValueLow)
-{
- unsigned int pciMemWindowBaseAddrReg = 0, baseAddrValue = 0;
- unsigned int pciMemWindowSizeReg = 0, windowSizeValue = 0;
- unsigned int effectiveBaseAddress, remapRegLow, remapRegHigh;
-
- /* Initializing the base and size variables of the PCI
- memory windows */
- switch (memoryWindow) {
- case PCI_0_IO:
- pciMemWindowBaseAddrReg = PCI_0_IO_BASE_ADDR;
- pciMemWindowSizeReg = PCI_0_IO_SIZE;
- remapRegLow = PCI_0_IO_ADDR_REMAP;
- remapRegHigh = PCI_0_IO_ADDR_REMAP;
- break;
- case PCI_0_MEM0:
- pciMemWindowBaseAddrReg = PCI_0_MEMORY0_BASE_ADDR;
- pciMemWindowSizeReg = PCI_0_MEMORY0_SIZE;
- remapRegLow = PCI_0_MEMORY0_LOW_ADDR_REMAP;
- remapRegHigh = PCI_0_MEMORY0_HIGH_ADDR_REMAP;
- break;
- case PCI_0_MEM1:
- pciMemWindowBaseAddrReg = PCI_0_MEMORY1_BASE_ADDR;
- pciMemWindowSizeReg = PCI_0_MEMORY1_SIZE;
- remapRegLow = PCI_0_MEMORY1_LOW_ADDR_REMAP;
- remapRegHigh = PCI_0_MEMORY1_HIGH_ADDR_REMAP;
- break;
- case PCI_0_MEM2:
- pciMemWindowBaseAddrReg = PCI_0_MEMORY2_BASE_ADDR;
- pciMemWindowSizeReg = PCI_0_MEMORY2_SIZE;
- remapRegLow = PCI_0_MEMORY2_LOW_ADDR_REMAP;
- remapRegHigh = PCI_0_MEMORY2_HIGH_ADDR_REMAP;
- break;
- case PCI_0_MEM3:
- pciMemWindowBaseAddrReg = PCI_0_MEMORY3_BASE_ADDR;
- pciMemWindowSizeReg = PCI_0_MEMORY3_SIZE;
- remapRegLow = PCI_0_MEMORY3_LOW_ADDR_REMAP;
- remapRegHigh = PCI_0_MEMORY3_HIGH_ADDR_REMAP;
- break;
-#ifdef INCLUDE_PCI_1
- case PCI_1_IO:
- pciMemWindowBaseAddrReg = PCI_1_IO_BASE_ADDR;
- pciMemWindowSizeReg = PCI_1_IO_SIZE;
- remapRegLow = PCI_1_IO_ADDR_REMAP;
- remapRegHigh = PCI_1_IO_ADDR_REMAP;
- break;
- case PCI_1_MEM0:
- pciMemWindowBaseAddrReg = PCI_1_MEMORY0_BASE_ADDR;
- pciMemWindowSizeReg = PCI_1_MEMORY0_SIZE;
- remapRegLow = PCI_1_MEMORY0_LOW_ADDR_REMAP;
- remapRegHigh = PCI_1_MEMORY0_HIGH_ADDR_REMAP;
- break;
- case PCI_1_MEM1:
- pciMemWindowBaseAddrReg = PCI_1_MEMORY1_BASE_ADDR;
- pciMemWindowSizeReg = PCI_1_MEMORY1_SIZE;
- remapRegLow = PCI_1_MEMORY1_LOW_ADDR_REMAP;
- remapRegHigh = PCI_1_MEMORY1_HIGH_ADDR_REMAP;
- break;
- case PCI_1_MEM2:
- pciMemWindowBaseAddrReg = PCI_1_MEMORY1_BASE_ADDR;
- pciMemWindowSizeReg = PCI_1_MEMORY1_SIZE;
- remapRegLow = PCI_1_MEMORY1_LOW_ADDR_REMAP;
- remapRegHigh = PCI_1_MEMORY1_HIGH_ADDR_REMAP;
- break;
- case PCI_1_MEM3:
- pciMemWindowBaseAddrReg = PCI_1_MEMORY3_BASE_ADDR;
- pciMemWindowSizeReg = PCI_1_MEMORY3_SIZE;
- remapRegLow = PCI_1_MEMORY3_LOW_ADDR_REMAP;
- remapRegHigh = PCI_1_MEMORY3_HIGH_ADDR_REMAP;
- break;
-#endif /* INCLUDE_PCI_1 */
- default:
- /* Retrun an invalid effective base address */
- return 0xffffffff;
- }
- /* Writing the remap value to the remap regisers */
- GT_REG_WRITE (remapRegHigh, remapValueHigh);
- GT_REG_WRITE (remapRegLow, remapValueLow >> 16);
- /* Reading the values from the base address and size registers */
- baseAddrValue = GTREGREAD (pciMemWindowBaseAddrReg) & 0xfffff;
- windowSizeValue = GTREGREAD (pciMemWindowSizeReg) & 0xffff;
- /* Start calculating the effective Base Address */
- effectiveBaseAddress = baseAddrValue << 16;
- /* The effective base address will be combined from the chopped (if any)
- remap value (according to the size value and remap mechanism) and the
- window's base address */
- effectiveBaseAddress |=
- (((windowSizeValue << 16) | 0xffff) & remapValueLow);
- /* If the effectiveBaseAddress exceed the window boundaries return an
- invalid value. */
- if (effectiveBaseAddress >
- ((baseAddrValue << 16) + ((windowSizeValue << 16) | 0xffff)))
- return 0xffffffff;
- return effectiveBaseAddress;
-}
-
-/********************************************************************
-* memorySetRegionSnoopMode - This function modifys one of the 4 regions which
-* supports Cache Coherency.
-*
-*
-* Inputs: SNOOP_REGION region - One of the four regions.
-* SNOOP_TYPE snoopType - There is four optional Types:
-* 1. No Snoop.
-* 2. Snoop to WT region.
-* 3. Snoop to WB region.
-* 4. Snoop & Invalidate to WB region.
-* unsigned int baseAddress - Base Address of this region.
-* unsigned int topAddress - Top Address of this region.
-* Returns: false if one of the parameters is wrong and true else
-*********************************************************************/
-/* evb6260 code */
-#if 0
-bool memorySetRegionSnoopMode(MEMORY_SNOOP_REGION region,
- MEMORY_SNOOP_TYPE snoopType,
- unsigned int baseAddress,
- unsigned int regionLength)
-{
- unsigned int snoopXbaseAddress;
- unsigned int snoopXtopAddress;
- unsigned int data;
- unsigned int snoopHigh = baseAddress + regionLength;
-
- if( (region > MEM_SNOOP_REGION3) || (snoopType > MEM_SNOOP_WB) )
- return false;
- snoopXbaseAddress = SNOOP_BASE_ADDRESS_0 + 0x10 * region;
- snoopXtopAddress = SNOOP_TOP_ADDRESS_0 + 0x10 * region;
- if(regionLength == 0) /* closing the region */
- {
- GT_REG_WRITE(snoopXbaseAddress,0x0000ffff);
- GT_REG_WRITE(snoopXtopAddress,0);
- return true;
- }
- baseAddress = baseAddress & 0xffff0000;
- data = (baseAddress >> 16) | snoopType << 16;
- GT_REG_WRITE(snoopXbaseAddress,data);
- snoopHigh = (snoopHigh & 0xfff00000) >> 20;
- GT_REG_WRITE(snoopXtopAddress,snoopHigh - 1);
- return true;
-}
-#endif
-
-/********************************************************************
-* memoryRemapAddress - This fubction used for address remapping.
-*
-*
-* Inputs: regOffset: remap register
-* remapValue :
-* Returns: false if one of the parameters is erroneous,true otherwise.
-*
-* Not needed function To_do !!!!
-*********************************************************************/
-bool memoryRemapAddress (unsigned int remapReg, unsigned int remapValue)
-{
- unsigned int valueForReg;
-
- valueForReg = (remapValue & 0xfff00000) >> 20;
- GT_REG_WRITE (remapReg, valueForReg);
- return true;
-}
-
-/*******************************************************************************
-* memoryGetDeviceParam - Extract the device parameters from the device bank
-* parameters register.
-*
-* DESCRIPTION:
-* To allow interfacing with very slow devices and fast synchronous SRAMs,
-* each device can be programed to different timing parameters. Each bank
-* has its own parameters register. Bank width can be programmed to 8, 16,
-* or 32-bits. Bank timing parameters can be programmed to support
-* different device types (e.g. Sync Burst SRAM, Flash , ROM, I/O
-* Controllers). The MV allows you to set timing parameters and width for
-* each device through parameters register .
-* This function extracts the parameters described from the Device Bank
-* parameters register and fills the given 'deviceParam' (defined in
-* gtMemory.h) structure with the read data.
-*
-* INPUT:
-* deviceParam - pointer to a structure DEVICE_PARAM (defined in
-* Memory.h).For details about each structure field please
-* see the device timing parameter section in the MV
-* datasheet.
-* deviceNum - Select on of the five device banks (defined in
-* Memory.h) :
-*
-* - DEVICE0
-* - DEVICE1
-* - DEVICE2
-* - etc.
-*
-* OUTPUT:
-* None.
-*
-* RETURN:
-* false if one of the parameters is erroneous,true otherwise.
-*
-*******************************************************************************/
-/********************************************************************
-* memoryGetDeviceParam - This function used for getting device parameters from
-* DEVICE BANK PARAMETERS REGISTER
-*
-*
-* Inputs: - deviceParam: STRUCT with paramiters for DEVICE BANK
-* PARAMETERS REGISTER
-* - deviceNum : number of device
-* Returns: false if one of the parameters is erroneous,true otherwise.
-*********************************************************************/
-
-bool memoryGetDeviceParam (DEVICE_PARAM * deviceParam, DEVICE deviceNum)
-{
- unsigned int valueOfReg;
- unsigned int calcData;
-
- if (deviceNum > 4)
- return false;
- GT_REG_READ (DEVICE_BANK0PARAMETERS + 4 * deviceNum, &valueOfReg);
- calcData = (0x7 & valueOfReg) + ((BIT22 & valueOfReg) >> 19);
- deviceParam->turnOff = calcData; /* Turn Off */
-
- calcData = ((0x78 & valueOfReg) >> 3) + ((BIT23 & valueOfReg) >> 19);
- deviceParam->acc2First = calcData; /* Access To First */
-
- calcData = ((0x780 & valueOfReg) >> 7) + ((BIT24 & valueOfReg) >> 20);
- deviceParam->acc2Next = calcData; /* Access To Next */
-
- calcData =
- ((0x3800 & valueOfReg) >> 11) + ((BIT25 & valueOfReg) >> 22);
- deviceParam->ale2Wr = calcData; /* Ale To Write */
-
- calcData = ((0x1c000 & valueOfReg) >> 14) +
- ((BIT26 & valueOfReg) >> 23);
- deviceParam->wrLow = calcData; /* Write Active */
-
- calcData = ((0xe0000 & valueOfReg) >> 17) +
- ((BIT27 & valueOfReg) >> 24);
- deviceParam->wrHigh = calcData; /* Write High */
-
- calcData = ((0x300000 & valueOfReg) >> 20);
- deviceParam->deviceWidth = (BIT0 << calcData); /* In bytes */
- calcData = ((0x30000000 & valueOfReg) >> 28);
- deviceParam->badrSkew = calcData; /* Cycles gap between BAdr
- toggle to read data sample. */
- calcData = ((0x40000000 & valueOfReg) >> 30);
- deviceParam->DPEn = calcData; /* Data Parity enable */
- return true;
-}
-
-/*******************************************************************************
-* memorySetDeviceParam - Set new parameters for a device.
-*
-*
-* DESCRIPTION:
-* To allow interfacing with very slow devices and fast synchronous SRAMs,
-* each device can be programed to different timing parameters. Each bank
-* has its own parameters register. Bank width can be programmed to 8, 16,
-* or 32-bits. Bank timing parameters can be programmed to support
-* different device types (e.g. Sync Burst SRAM, Flash , ROM, I/O
-* Controllers). The MV allows you to set timing parameters and width for
-* each device through parameters register. This function set new
-* parameters to a device Bank from the delivered structure 'deviceParam'
-* (defined in gtMemory.h). The structure must be initialized with data
-* prior to the use of these function.
-*
-* INPUT:
-* deviceParam - pointer to a structure DEVICE_PARAM (defined in
-* Memory.h).For details about each structure field please
-* see the device timing parameter section in the MV
-* datasheet.
-* deviceNum - Select on of the five device banks (defined in
-* Memory.h) :
-*
-* - DEVICE0
-* - DEVICE1
-* - DEVICE2
-* - etc.
-*
-* OUTPUT:
-* None.
-*
-* RETURN:
-* false if one of the parameters is erroneous,true otherwise.
-*
-*******************************************************************************/
-/********************************************************************
-* memorySetDeviceParam - This function used for setting device parameters to
-* DEVICE BANK PARAMETERS REGISTER
-*
-*
-* Inputs: - deviceParam: STRUCT for store paramiters from DEVICE BANK
-* PARAMETERS REGISTER
-* - deviceNum : number of device
-* Returns: false if one of the parameters is erroneous,true otherwise.
-*********************************************************************/
-bool memorySetDeviceParam (DEVICE_PARAM * deviceParam, DEVICE deviceNum)
-{
- unsigned int valueForReg;
-
- if ((deviceParam->turnOff > 0x7) || (deviceParam->acc2First > 0xf) ||
- (deviceParam->acc2Next > 0xf) || (deviceParam->ale2Wr > 0x7) ||
- (deviceParam->wrLow > 0x7) || (deviceParam->wrHigh > 0x7) ||
- (deviceParam->badrSkew > 0x2) || (deviceParam->DPEn > 0x1)) {
- return false;
- }
- valueForReg = (((deviceParam->turnOff) & 0x7) |
- (((deviceParam->turnOff) & 0x8) << 19) |
- (((deviceParam->acc2First) & 0xf) << 3) |
- (((deviceParam->acc2First) & 0x10) << 19) |
- (((deviceParam->acc2Next) & 0xf) << 7) |
- (((deviceParam->acc2Next) & 0x10) << 20) |
- (((deviceParam->ale2Wr) & 0x7) << 11) |
- (((deviceParam->ale2Wr) & 0xf) << 22) |
- (((deviceParam->wrLow) & 0x7) << 14) |
- (((deviceParam->wrLow) & 0xf) << 23) |
- (((deviceParam->wrHigh) & 0x7) << 17) |
- (((deviceParam->wrHigh) & 0xf) << 24) |
- (((deviceParam->badrSkew) & 0x3) << 28) |
- (((deviceParam->DPEn) & 0x1) << 30));
-
- /* insert the device width: */
- switch (deviceParam->deviceWidth) {
- case 1:
- valueForReg = valueForReg | _8BIT;
- break;
- case 2:
- valueForReg = valueForReg | _16BIT;
- break;
- case 4:
- valueForReg = valueForReg | _32BIT;
- break;
- default:
- valueForReg = valueForReg | _8BIT;
- break;
- }
- GT_REG_WRITE (DEVICE_BANK0PARAMETERS + 4 * deviceNum, valueForReg);
- return true;
-}
-
-/*******************************************************************************
-* MemoryDisableWindow - Disable a memory space by the disable bit.
-* DESCRIPTION:
-* This function disables one of the 21 availiable windows dedicated for
-* the CPU decoding mechanism. Its possible to combine several windows with
-* the OR command.
-* INPUT:
-* window - One or more of the memory windows (defined in gtMemory.h).
-* OUTPUT:
-* None.
-* RETURN:
-* None.
-*******************************************************************************/
-void MemoryDisableWindow (MEMORY_WINDOW window)
-{
- SET_REG_BITS (BASE_ADDR_ENABLE, window);
-}
-
-/*******************************************************************************
-* MemoryEnableWindow - Enable a memory space that was disabled by
-* 'MemoryDisableWindow'.
-* DESCRIPTION:
-* This function enables one of the 21 availiable windows dedicated for the
-* CPU decoding mechanism. Its possible to combine several windows with the
-* OR command.
-* INPUT:
-* window - One or more of the memory windows (defined in gtMemory.h).
-* OUTPUT:
-* None.
-* RETURN:
-* None.
-*******************************************************************************/
-void MemoryEnableWindow (MEMORY_WINDOW window)
-{
- RESET_REG_BITS (BASE_ADDR_ENABLE, window);
-}
-
-/*******************************************************************************
-* MemoryGetMemWindowStatus - This function check whether the memory window is
-* disabled or not.
-* DESCRIPTION:
-* This function checks if the given memory window is closed .
-* INPUT:
-* window - One or more of the memory windows (defined in gtMemory.h).
-* OUTPUT:
-* None.
-* RETURN:
-* True for a closed window, false otherwise .
-*******************************************************************************/
-MEMORY_WINDOW_STATUS MemoryGetMemWindowStatus (MEMORY_WINDOW window)
-{
- if (GTREGREAD (BASE_ADDR_ENABLE) & window)
- return MEM_WINDOW_DISABLED;
- return MEM_WINDOW_ENABLED;
-}
diff --git a/board/Marvell/common/misc.S b/board/Marvell/common/misc.S
deleted file mode 100644
index 41c3a9508e..0000000000
--- a/board/Marvell/common/misc.S
+++ /dev/null
@@ -1,235 +0,0 @@
-#include <config.h>
-#include <74xx_7xx.h>
-#include "version.h"
-
-#include <ppc_asm.tmpl>
-#include <ppc_defs.h>
-
-#include <asm/cache.h>
-#include <asm/mmu.h>
-
-#include "../include/mv_gen_reg.h"
-
-#ifdef CONFIG_ECC
- /* Galileo specific asm code for initializing ECC */
- .globl board_relocate_rom
-board_relocate_rom:
- mflr r7
- /* update the location of the GT registers */
- lis r11, CFG_GT_REGS@h
- /* if we're using ECC, we must use the DMA engine to copy ourselves */
- bl start_idma_transfer_0
- bl wait_for_idma_0
- bl stop_idma_engine_0
-
- mtlr r7
- blr
-
- .globl board_init_ecc
-board_init_ecc:
- mflr r7
- /* NOTE: r10 still contains the location we've been relocated to
- * which happens to be TOP_OF_RAM - CFG_MONITOR_LEN */
-
- /* now that we're running from ram, init the rest of main memory
- * for ECC use */
- lis r8, CFG_MONITOR_LEN@h
- ori r8, r8, CFG_MONITOR_LEN@l
-
- divw r3, r10, r8
-
- /* set up the counter, and init the starting address */
- mtctr r3
- li r12, 0
-
- /* bytes per transfer */
- mr r5, r8
-about_to_init_ecc:
-1: mr r3, r12
- mr r4, r12
- bl start_idma_transfer_0
- bl wait_for_idma_0
- bl stop_idma_engine_0
- add r12, r12, r8
- bdnz 1b
-
- mtlr r7
- blr
-
- /* r3: dest addr
- * r4: source addr
- * r5: byte count
- * r11: gt regbase
- * trashes: r6, r5
- */
-start_idma_transfer_0:
- /* set the byte count, including the OWN bit */
- mr r6, r11
- ori r6, r6, CHANNEL0_DMA_BYTE_COUNT
- stwbrx r5, 0, (r6)
-
- /* set the source address */
- mr r6, r11
- ori r6, r6, CHANNEL0_DMA_SOURCE_ADDRESS
- stwbrx r4, 0, (r6)
-
- /* set the dest address */
- mr r6, r11
- ori r6, r6, CHANNEL0_DMA_DESTINATION_ADDRESS
- stwbrx r3, 0, (r6)
-
- /* set the next record pointer */
- li r5, 0
- mr r6, r11
- ori r6, r6, CHANNEL0NEXT_RECORD_POINTER
- stwbrx r5, 0, (r6)
-
- /* set the low control register */
- /* bit 9 is NON chained mode, bit 31 is new style descriptors.
- bit 12 is channel enable */
- ori r5, r5, (1 << 12) | (1 << 12) | (1 << 11)
- /* 15 shifted by 16 (oris) == bit 31 */
- oris r5, r5, (1 << 15)
- mr r6, r11
- ori r6, r6, CHANNEL0CONTROL
- stwbrx r5, 0, (r6)
-
- blr
-
- /* this waits for the bytecount to return to zero, indicating
- * that the trasfer is complete */
-wait_for_idma_0:
- mr r5, r11
- lis r6, 0xff
- ori r6, r6, 0xffff
- ori r5, r5, CHANNEL0_DMA_BYTE_COUNT
-1: lwbrx r4, 0, (r5)
- and. r4, r4, r6
- bne 1b
-
- blr
-
- /* this turns off channel 0 of the idma engine */
-stop_idma_engine_0:
- /* shut off the DMA engine */
- li r5, 0
- mr r6, r11
- ori r6, r6, CHANNEL0CONTROL
- stwbrx r5, 0, (r6)
-
- blr
-#endif
-
-#ifdef CFG_BOARD_ASM_INIT
- /* NOTE: trashes r3-r7 */
- .globl board_asm_init
-board_asm_init:
- /* just move the GT registers to where they belong */
- lis r3, CFG_DFL_GT_REGS@h
- ori r3, r3, CFG_DFL_GT_REGS@l
- lis r4, CFG_GT_REGS@h
- ori r4, r4, CFG_GT_REGS@l
- li r5, INTERNAL_SPACE_DECODE
-
- /* test to see if we've already moved */
- lwbrx r6, r5, r4
- andi. r6, r6, 0xffff
- /* check loading of R7 is: 0x0F80 should: 0xf800: DONE */
-/* rlwinm r7, r4, 8, 16, 31
- rlwinm r7, r4, 12, 16, 31 */ /* original */
- rlwinm r7, r4, 16, 16, 31
- /* -----------------------------------------------------*/
- cmp cr0, r7, r6
- beqlr
-
- /* nope, have to move the registers */
- lwbrx r6, r5, r3
- andis. r6, r6, 0xffff
- or r6, r6, r7
- stwbrx r6, r5, r3
-
- /* now, poll for the change */
-1: lwbrx r7, r5, r4
- cmp cr0, r7, r6
- bne 1b
-
- /* done! */
- blr
-#endif
-
-/* For use of the debug LEDs */
- .global led_on0_relocated
-led_on0_relocated:
- xor r21, r21, r21
- xor r18, r18, r18
- lis r18, 0xFC80
- ori r18, r18, 0x8000
- stw r21, 0x0(r18)
-/* stw r18, 0x0(r18) */
- sync
- blr
-
- .global led_off0_relocated
-led_off0_relocated:
- xor r21, r21, r21
- xor r18, r18, r18
- lis r18, 0xFC81
- ori r18, r18, 0x4000
- stw r21, 0x0(r18)
-/* stw r18, 0x0(r18) */
- sync
- blr
-
- .global led_on0
-led_on0:
- xor r18, r18, r18
- lis r18, 0x1c80
- ori r18, r18, 0x8000
- stw r18, 0x0(r18)
- sync
- blr
-
- .global led_off0
-led_off0:
- xor r18, r18, r18
- lis r18, 0x1c81
- ori r18, r18, 0x4000
- stw r18, 0x0(r18)
- sync
- blr
-
- .global led_on1
-led_on1:
- xor r18, r18, r18
- lis r18, 0x1c80
- ori r18, r18, 0xc000
- stw r18, 0x0(r18)
- sync
- blr
-
- .global led_off1
-led_off1:
- xor r18, r18, r18
- lis r18, 0x1c81
- ori r18, r18, 0x8000
- stw r18, 0x0(r18)
- sync
- blr
-
- .global led_on2
-led_on2:
- xor r18, r18, r18
- lis r18, 0x1c81
- ori r18, r18, 0x0000
- stw r18, 0x0(r18)
- sync
- blr
-
- .global led_off2
-led_off2:
- xor r18, r18, r18
- lis r18, 0x1c81
- ori r18, r18, 0xc000
- stw r18, 0x0(r18)
- sync
- blr
diff --git a/board/Marvell/common/ns16550.c b/board/Marvell/common/ns16550.c
deleted file mode 100644
index 475445b788..0000000000
--- a/board/Marvell/common/ns16550.c
+++ /dev/null
@@ -1,66 +0,0 @@
-/*
- * COM1 NS16550 support
- * originally from linux source (arch/ppc/boot/ns16550.c)
- * modified to use CFG_ISA_MEM and new defines
- *
- * further modified by Josh Huber <huber@mclx.com> to support
- * the DUART on the Galileo Eval board. (db64360)
- */
-
-#include <config.h>
-#include "ns16550.h"
-
-#ifdef ZUMA_NTL
-/* no 16550 device */
-#else
-const NS16550_t COM_PORTS[] = { (NS16550_t) (CFG_DUART_IO + 0),
- (NS16550_t) (CFG_DUART_IO + 0x20)
-};
-
-volatile struct NS16550 *NS16550_init (int chan, int baud_divisor)
-{
- volatile struct NS16550 *com_port;
-
- com_port = (struct NS16550 *) COM_PORTS[chan];
- com_port->ier = 0x00;
- com_port->lcr = LCR_BKSE; /* Access baud rate */
- com_port->dll = baud_divisor & 0xff; /* 9600 baud */
- com_port->dlm = (baud_divisor >> 8) & 0xff;
- com_port->lcr = LCR_8N1; /* 8 data, 1 stop, no parity */
- com_port->mcr = MCR_DTR | MCR_RTS; /* RTS/DTR */
-
- /* Clear & enable FIFOs */
- com_port->fcr = FCR_FIFO_EN | FCR_RXSR | FCR_TXSR;
- return (com_port);
-}
-
-void NS16550_reinit (volatile struct NS16550 *com_port, int baud_divisor)
-{
- com_port->ier = 0x00;
- com_port->lcr = LCR_BKSE; /* Access baud rate */
- com_port->dll = baud_divisor & 0xff; /* 9600 baud */
- com_port->dlm = (baud_divisor >> 8) & 0xff;
- com_port->lcr = LCR_8N1; /* 8 data, 1 stop, no parity */
- com_port->mcr = MCR_DTR | MCR_RTS; /* RTS/DTR */
-
- /* Clear & enable FIFOs */
- com_port->fcr = FCR_FIFO_EN | FCR_RXSR | FCR_TXSR;
-}
-
-void NS16550_putc (volatile struct NS16550 *com_port, unsigned char c)
-{
- while ((com_port->lsr & LSR_THRE) == 0);
- com_port->thr = c;
-}
-
-unsigned char NS16550_getc (volatile struct NS16550 *com_port)
-{
- while ((com_port->lsr & LSR_DR) == 0);
- return (com_port->rbr);
-}
-
-int NS16550_tstc (volatile struct NS16550 *com_port)
-{
- return ((com_port->lsr & LSR_DR) != 0);
-}
-#endif
diff --git a/board/Marvell/common/ns16550.h b/board/Marvell/common/ns16550.h
deleted file mode 100644
index f2ed2abc9e..0000000000
--- a/board/Marvell/common/ns16550.h
+++ /dev/null
@@ -1,102 +0,0 @@
-/*
- * NS16550 Serial Port
- * originally from linux source (arch/ppc/boot/ns16550.h)
- * modified slightly to
- * have addresses as offsets from CFG_ISA_BASE
- * added a few more definitions
- * added prototypes for ns16550.c
- * reduced no of com ports to 2
- * modifications (c) Rob Taylor, Flying Pig Systems. 2000.
- *
- * further modified to support the DUART in the Galileo eval board
- * modifications (c) Josh Huber <huber@mclx.com>, Mission Critical Linux, Inc.
- */
-
-#ifndef __NS16550_H__
-#define __NS16550_H__
-
-/* the padding is necessary because on the galileo board the UART is
- wired in with the 3 address lines shifted over by 2 bits */
-struct NS16550
-{
- unsigned char rbr; /* 0 = 0-3*/
- int pad1:24;
-
- unsigned char ier; /* 1 = 4-7*/
- int pad2:24;
-
- unsigned char fcr; /* 2 = 8-b*/
- int pad3:24;
-
- unsigned char lcr; /* 3 = c-f*/
- int pad4:24;
-
- unsigned char mcr; /* 4 = 10-13*/
- int pad5:24;
-
- unsigned char lsr; /* 5 = 14-17*/
- int pad6:24;
-
- unsigned char msr; /* 6 =18-1b*/
- int pad7:24;
-
- unsigned char scr; /* 7 =1c-1f*/
- int pad8:24;
-} __attribute__ ((packed));
-
-/* aliases */
-#define thr rbr
-#define iir fcr
-#define dll rbr
-#define dlm ier
-
-#define FCR_FIFO_EN 0x01 /*fifo enable*/
-#define FCR_RXSR 0x02 /*reciever soft reset*/
-#define FCR_TXSR 0x04 /*transmitter soft reset*/
-
-
-#define MCR_DTR 0x01
-#define MCR_RTS 0x02
-#define MCR_DMA_EN 0x04
-#define MCR_TX_DFR 0x08
-
-
-#define LCR_WLS_MSK 0x03 /* character length slect mask*/
-#define LCR_WLS_5 0x00 /* 5 bit character length */
-#define LCR_WLS_6 0x01 /* 6 bit character length */
-#define LCR_WLS_7 0x02 /* 7 bit character length */
-#define LCR_WLS_8 0x03 /* 8 bit character length */
-#define LCR_STB 0x04 /* Number of stop Bits, off = 1, on = 1.5 or 2) */
-#define LCR_PEN 0x08 /* Parity eneble*/
-#define LCR_EPS 0x10 /* Even Parity Select*/
-#define LCR_STKP 0x20 /* Stick Parity*/
-#define LCR_SBRK 0x40 /* Set Break*/
-#define LCR_BKSE 0x80 /* Bank select enable*/
-
-#define LSR_DR 0x01 /* Data ready */
-#define LSR_OE 0x02 /* Overrun */
-#define LSR_PE 0x04 /* Parity error */
-#define LSR_FE 0x08 /* Framing error */
-#define LSR_BI 0x10 /* Break */
-#define LSR_THRE 0x20 /* Xmit holding register empty */
-#define LSR_TEMT 0x40 /* Xmitter empty */
-#define LSR_ERR 0x80 /* Error */
-
-/* useful defaults for LCR*/
-#define LCR_8N1 0x03
-
-
-#define COM1 0x03F8
-#define COM2 0x02F8
-
-volatile struct NS16550 * NS16550_init(int chan, int baud_divisor);
-void NS16550_putc(volatile struct NS16550 *com_port, unsigned char c);
-unsigned char NS16550_getc(volatile struct NS16550 *com_port);
-int NS16550_tstc(volatile struct NS16550 *com_port);
-void NS16550_reinit(volatile struct NS16550 *com_port, int baud_divisor);
-
-typedef struct NS16550 *NS16550_t;
-
-extern const NS16550_t COM_PORTS[];
-
-#endif
diff --git a/board/Marvell/common/ppc_error_no.h b/board/Marvell/common/ppc_error_no.h
deleted file mode 100644
index 53687c86bb..0000000000
--- a/board/Marvell/common/ppc_error_no.h
+++ /dev/null
@@ -1,164 +0,0 @@
-/*
- * (C) Copyright 2003
- * Ingo Assmus <ingo.assmus@keymile.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * BK Id: SCCS/s.errno.h 1.9 06/05/01 21:45:21 paulus
- */
-#ifndef _MV_PPC_ERRNO_H
-#define _MV_PPC_ERRNO_H
-
-#define EPERM 1 /* Operation not permitted */
-#define ENOENT 2 /* No such file or directory */
-#define ESRCH 3 /* No such process */
-#define EINTR 4 /* Interrupted system call */
-#define EIO 5 /* I/O error */
-#define ENXIO 6 /* No such device or address */
-#define E2BIG 7 /* Arg list too long */
-#define ENOEXEC 8 /* Exec format error */
-#define EBADF 9 /* Bad file number */
-#define ECHILD 10 /* No child processes */
-#define EAGAIN 11 /* Try again */
-#define ENOMEM 12 /* Out of memory */
-#define EACCES 13 /* Permission denied */
-#define EFAULT 14 /* Bad address */
-#define ENOTBLK 15 /* Block device required */
-#define EBUSY 16 /* Device or resource busy */
-#define EEXIST 17 /* File exists */
-#define EXDEV 18 /* Cross-device link */
-#define ENODEV 19 /* No such device */
-#define ENOTDIR 20 /* Not a directory */
-#define EISDIR 21 /* Is a directory */
-#define EINVAL 22 /* Invalid argument */
-#define ENFILE 23 /* File table overflow */
-#define EMFILE 24 /* Too many open files */
-#define ENOTTY 25 /* Not a typewriter */
-#define ETXTBSY 26 /* Text file busy */
-#define EFBIG 27 /* File too large */
-#define ENOSPC 28 /* No space left on device */
-#define ESPIPE 29 /* Illegal seek */
-#define EROFS 30 /* Read-only file system */
-#define EMLINK 31 /* Too many links */
-#define EPIPE 32 /* Broken pipe */
-#define EDOM 33 /* Math argument out of domain of func */
-#define ERANGE 34 /* Math result not representable */
-#define EDEADLK 35 /* Resource deadlock would occur */
-#define ENAMETOOLONG 36 /* File name too long */
-#define ENOLCK 37 /* No record locks available */
-#define ENOSYS 38 /* Function not implemented */
-#define ENOTEMPTY 39 /* Directory not empty */
-#define ELOOP 40 /* Too many symbolic links encountered */
-#define EWOULDBLOCK EAGAIN /* Operation would block */
-#define ENOMSG 42 /* No message of desired type */
-#define EIDRM 43 /* Identifier removed */
-#define ECHRNG 44 /* Channel number out of range */
-#define EL2NSYNC 45 /* Level 2 not synchronized */
-#define EL3HLT 46 /* Level 3 halted */
-#define EL3RST 47 /* Level 3 reset */
-#define ELNRNG 48 /* Link number out of range */
-#define EUNATCH 49 /* Protocol driver not attached */
-#define ENOCSI 50 /* No CSI structure available */
-#define EL2HLT 51 /* Level 2 halted */
-#define EBADE 52 /* Invalid exchange */
-#define EBADR 53 /* Invalid request descriptor */
-#define EXFULL 54 /* Exchange full */
-#define ENOANO 55 /* No anode */
-#define EBADRQC 56 /* Invalid request code */
-#define EBADSLT 57 /* Invalid slot */
-#define EDEADLOCK 58 /* File locking deadlock error */
-#define EBFONT 59 /* Bad font file format */
-#define ENOSTR 60 /* Device not a stream */
-#define ENODATA 61 /* No data available */
-#define ETIME 62 /* Timer expired */
-#define ENOSR 63 /* Out of streams resources */
-#define ENONET 64 /* Machine is not on the network */
-#define ENOPKG 65 /* Package not installed */
-#define EREMOTE 66 /* Object is remote */
-#define ENOLINK 67 /* Link has been severed */
-#define EADV 68 /* Advertise error */
-#define ESRMNT 69 /* Srmount error */
-#define ECOMM 70 /* Communication error on send */
-#define EPROTO 71 /* Protocol error */
-#define EMULTIHOP 72 /* Multihop attempted */
-#define EDOTDOT 73 /* RFS specific error */
-#define EBADMSG 74 /* Not a data message */
-#define EOVERFLOW 75 /* Value too large for defined data type */
-#define ENOTUNIQ 76 /* Name not unique on network */
-#define EBADFD 77 /* File descriptor in bad state */
-#define EREMCHG 78 /* Remote address changed */
-#define ELIBACC 79 /* Can not access a needed shared library */
-#define ELIBBAD 80 /* Accessing a corrupted shared library */
-#define ELIBSCN 81 /* .lib section in a.out corrupted */
-#define ELIBMAX 82 /* Attempting to link in too many shared libraries */
-#define ELIBEXEC 83 /* Cannot exec a shared library directly */
-#define EILSEQ 84 /* Illegal byte sequence */
-#define ERESTART 85 /* Interrupted system call should be restarted */
-#define ESTRPIPE 86 /* Streams pipe error */
-#define EUSERS 87 /* Too many users */
-#define ENOTSOCK 88 /* Socket operation on non-socket */
-#define EDESTADDRREQ 89 /* Destination address required */
-#define EMSGSIZE 90 /* Message too long */
-#define EPROTOTYPE 91 /* Protocol wrong type for socket */
-#define ENOPROTOOPT 92 /* Protocol not available */
-#define EPROTONOSUPPORT 93 /* Protocol not supported */
-#define ESOCKTNOSUPPORT 94 /* Socket type not supported */
-#define EOPNOTSUPP 95 /* Operation not supported on transport endpoint */
-#define EPFNOSUPPORT 96 /* Protocol family not supported */
-#define EAFNOSUPPORT 97 /* Address family not supported by protocol */
-#define EADDRINUSE 98 /* Address already in use */
-#define EADDRNOTAVAIL 99 /* Cannot assign requested address */
-#define ENETDOWN 100 /* Network is down */
-#define ENETUNREACH 101 /* Network is unreachable */
-#define ENETRESET 102 /* Network dropped connection because of reset */
-#define ECONNABORTED 103 /* Software caused connection abort */
-#define ECONNRESET 104 /* Connection reset by peer */
-#define ENOBUFS 105 /* No buffer space available */
-#define EISCONN 106 /* Transport endpoint is already connected */
-#define ENOTCONN 107 /* Transport endpoint is not connected */
-#define ESHUTDOWN 108 /* Cannot send after transport endpoint shutdown */
-#define ETOOMANYREFS 109 /* Too many references: cannot splice */
-#define ETIMEDOUT 110 /* Connection timed out */
-#define ECONNREFUSED 111 /* Connection refused */
-#define EHOSTDOWN 112 /* Host is down */
-#define EHOSTUNREACH 113 /* No route to host */
-#define EALREADY 114 /* Operation already in progress */
-#define EINPROGRESS 115 /* Operation now in progress */
-#define ESTALE 116 /* Stale NFS file handle */
-#define EUCLEAN 117 /* Structure needs cleaning */
-#define ENOTNAM 118 /* Not a XENIX named type file */
-#define ENAVAIL 119 /* No XENIX semaphores available */
-#define EISNAM 120 /* Is a named type file */
-#define EREMOTEIO 121 /* Remote I/O error */
-#define EDQUOT 122 /* Quota exceeded */
-
-#define ENOMEDIUM 123 /* No medium found */
-#define EMEDIUMTYPE 124 /* Wrong medium type */
-
-/* Should never be seen by user programs */
-#define ERESTARTSYS 512
-#define ERESTARTNOINTR 513
-#define ERESTARTNOHAND 514 /* restart if no handler.. */
-#define ENOIOCTLCMD 515 /* No ioctl command */
-
-#define _LAST_ERRNO 515
-
-#endif
diff --git a/board/Marvell/common/serial.c b/board/Marvell/common/serial.c
deleted file mode 100644
index 9d0d2138e2..0000000000
--- a/board/Marvell/common/serial.c
+++ /dev/null
@@ -1,178 +0,0 @@
-/*
- * (C) Copyright 2001
- * Josh Huber <huber@mclx.com>, Mission Critical Linux, Inc.
- *
- * modified for marvell db64360 eval board by
- * Ingo Assmus <ingo.assmus@keymile.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * serial.c - serial support for the gal ev board
- */
-
-/* supports both the 16650 duart and the MPSC */
-
-#include <common.h>
-#include <command.h>
-#include "../include/memory.h"
-#include "serial.h"
-
-#ifdef CONFIG_DB64360
-#include "../db64360/mpsc.h"
-#endif
-
-#ifdef CONFIG_DB64460
-#include "../db64460/mpsc.h"
-#endif
-
-#include "ns16550.h"
-
-#ifdef CONFIG_MPSC
-
-
-int serial_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
-#if (defined CFG_INIT_CHAN1) || (defined CFG_INIT_CHAN2)
- int clock_divisor = 230400 / gd->baudrate;
-#endif
-
- mpsc_init (gd->baudrate);
-
- /* init the DUART chans so that KGDB in the kernel can use them */
-#ifdef CFG_INIT_CHAN1
- NS16550_reinit (COM_PORTS[0], clock_divisor);
-#endif
-#ifdef CFG_INIT_CHAN2
- NS16550_reinit (COM_PORTS[1], clock_divisor);
-#endif
- return (0);
-}
-
-void serial_putc (const char c)
-{
- if (c == '\n')
- mpsc_putchar ('\r');
-
- mpsc_putchar (c);
-}
-
-int serial_getc (void)
-{
- return mpsc_getchar ();
-}
-
-int serial_tstc (void)
-{
- return mpsc_test_char ();
-}
-
-void serial_setbrg (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- galbrg_set_baudrate (CONFIG_MPSC_PORT, gd->baudrate);
-}
-
-#else /* ! CONFIG_MPSC */
-
-int serial_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- int clock_divisor = 230400 / gd->baudrate;
-
-#ifdef CFG_INIT_CHAN1
- (void) NS16550_init (0, clock_divisor);
-#endif
-#ifdef CFG_INIT_CHAN2
- (void) NS16550_init (1, clock_divisor);
-#endif
- return (0);
-}
-
-void serial_putc (const char c)
-{
- if (c == '\n')
- NS16550_putc (COM_PORTS[CFG_DUART_CHAN], '\r');
-
- NS16550_putc (COM_PORTS[CFG_DUART_CHAN], c);
-}
-
-int serial_getc (void)
-{
- return NS16550_getc (COM_PORTS[CFG_DUART_CHAN]);
-}
-
-int serial_tstc (void)
-{
- return NS16550_tstc (COM_PORTS[CFG_DUART_CHAN]);
-}
-
-void serial_setbrg (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- int clock_divisor = 230400 / gd->baudrate;
-
-#ifdef CFG_INIT_CHAN1
- NS16550_reinit (COM_PORTS[0], clock_divisor);
-#endif
-#ifdef CFG_INIT_CHAN2
- NS16550_reinit (COM_PORTS[1], clock_divisor);
-#endif
-}
-
-#endif /* CONFIG_MPSC */
-
-void serial_puts (const char *s)
-{
- while (*s) {
- serial_putc (*s++);
- }
-}
-
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
-void kgdb_serial_init (void)
-{
-}
-
-void putDebugChar (int c)
-{
- serial_putc (c);
-}
-
-void putDebugStr (const char *str)
-{
- serial_puts (str);
-}
-
-int getDebugChar (void)
-{
- return serial_getc ();
-}
-
-void kgdb_interruptible (int yes)
-{
- return;
-}
-#endif /* CFG_CMD_KGDB */
diff --git a/board/Marvell/common/serial.h b/board/Marvell/common/serial.h
deleted file mode 100644
index c7fc8c162d..0000000000
--- a/board/Marvell/common/serial.h
+++ /dev/null
@@ -1,89 +0,0 @@
-/*
- * (C) Copyright 2001
- * Josh Huber <huber@mclx.com>, Mission Critical Linux, Inc.
- *
- * modified for marvell db64360 eval board by
- * Ingo Assmus <ingo.assmus@keymile.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/* serial.h - mostly useful for DUART serial_init in serial.c */
-
-#ifndef __SERIAL_H__
-#define __SERIAL_H__
-
-#if 0
-
-#define B230400 1
-#define B115200 2
-#define B57600 4
-#define B38400 82
-#define B19200 163
-#define B9600 24
-#define B4800 651
-#define B2400 1302
-#define B1200 2604
-#define B600 5208
-#define B300 10417
-#define B150 20833
-#define B110 28409
-#define BDEFAULT B115200
-
- /* this stuff is important to initialize
- the DUART channels */
-
-#define Scale 0x01L /* distance between port addresses */
-#define COM1 0x000003f8 /* Keyboard */
-#define COM2 0x000002f8 /* Host */
-
-
-/* Port Definitions relative to base COM port addresses */
-#define DataIn (0x00*Scale) /* data input port */
-#define DataOut (0x00*Scale) /* data output port */
-#define BaudLsb (0x00*Scale) /* baud rate divisor least significant byte */
-#define BaudMsb (0x01*Scale) /* baud rate divisor most significant byte */
-#define Ier (0x01*Scale) /* interrupt enable register */
-#define Iir (0x02*Scale) /* interrupt identification register */
-#define Lcr (0x03*Scale) /* line control register */
-#define Mcr (0x04*Scale) /* modem control register */
-#define Lsr (0x05*Scale) /* line status register */
-#define Msr (0x06*Scale) /* modem status register */
-
-/* Bit Definitions for above ports */
-#define LcrDlab 0x80 /* b7: enable baud rate divisor registers */
-#define LcrDflt 0x03 /* b6-0: no parity, 1 stop, 8 data */
-
-#define McrRts 0x02 /* b1: request to send (I am ready to xmit) */
-#define McrDtr 0x01 /* b0: data terminal ready (I am alive ready to rcv) */
-#define McrDflt (McrRts|McrDtr)
-
-#define LsrTxD 0x6000 /* b5: transmit holding register empty (i.e. xmit OK!)*/
- /* b6: transmitter empty */
-#define LsrRxD 0x0100 /* b0: received data ready (i.e. got a byte!) */
-
-#define MsrRi 0x0040 /* b6: ring indicator (other guy is ready to rcv) */
-#define MsrDsr 0x0020 /* b5: data set ready (other guy is alive ready to rcv */
-#define MsrCts 0x0010 /* b4: clear to send (other guy is ready to rcv) */
-
-#define IerRda 0xf /* b0: Enable received data available interrupt */
-
-#endif
-
-#endif /* __SERIAL_H__ */
diff --git a/board/Marvell/db64360/64360.h b/board/Marvell/db64360/64360.h
deleted file mode 100644
index a65e23be4e..0000000000
--- a/board/Marvell/db64360/64360.h
+++ /dev/null
@@ -1,52 +0,0 @@
-/*
- * (C) Copyright 2003
- * Ingo Assmus <ingo.assmus@keymile.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * main board support/init for the Galileo Eval board DB64360.
- */
-
-#ifndef __64360_H__
-#define __64360_H__
-
-/* CPU Configuration bits */
-#define CPU_CONF_ADDR_MISS_EN (1 << 8)
-#define CPU_CONF_SINGLE_CPU (1 << 11)
-#define CPU_CONF_ENDIANESS (1 << 12)
-#define CPU_CONF_PIPELINE (1 << 13)
-#define CPU_CONF_STOP_RETRY (1 << 17)
-#define CPU_CONF_MULTI_DECODE (1 << 18)
-#define CPU_CONF_DP_VALID (1 << 19)
-#define CPU_CONF_PERR_PROP (1 << 22)
-#define CPU_CONF_AACK_DELAY_2 (1 << 25)
-#define CPU_CONF_AP_VALID (1 << 26)
-#define CPU_CONF_REMAP_WR_DIS (1 << 27)
-
-/* CPU Master Control bits */
-#define CPU_MAST_CTL_ARB_EN (1 << 8)
-#define CPU_MAST_CTL_MASK_BR_1 (1 << 9)
-#define CPU_MAST_CTL_M_WR_TRIG (1 << 10)
-#define CPU_MAST_CTL_M_RD_TRIG (1 << 11)
-#define CPU_MAST_CTL_CLEAN_BLK (1 << 12)
-#define CPU_MAST_CTL_FLUSH_BLK (1 << 13)
-
-#endif /* __64360_H__ */
diff --git a/board/Marvell/db64360/Makefile b/board/Marvell/db64360/Makefile
deleted file mode 100644
index 768ccddbbf..0000000000
--- a/board/Marvell/db64360/Makefile
+++ /dev/null
@@ -1,44 +0,0 @@
-#
-# (C) Copyright 2001
-# Josh Huber <huber@mclx.com>, Mission Critical Linux, Inc.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-SOBJS = ../common/misc.o
-
-OBJS = $(BOARD).o ../common/flash.o ../common/serial.o ../common/memory.o pci.o \
- mv_eth.o ../common/ns16550.o mpsc.o ../common/i2c.o \
- sdram_init.o ../common/intel_flash.o
-
-$(LIB): .depend $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS) $(SOBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/Marvell/db64360/config.mk b/board/Marvell/db64360/config.mk
deleted file mode 100644
index 0e42b48e17..0000000000
--- a/board/Marvell/db64360/config.mk
+++ /dev/null
@@ -1,28 +0,0 @@
-#
-# (C) Copyright 2001
-# Josh Huber <huber@mclx.com>, Mission Critical Linux, Inc.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# EVB64360 boards
-#
-
-TEXT_BASE = 0xfff00000
diff --git a/board/Marvell/db64360/db64360.c b/board/Marvell/db64360/db64360.c
deleted file mode 100644
index a2ab2d7818..0000000000
--- a/board/Marvell/db64360/db64360.c
+++ /dev/null
@@ -1,936 +0,0 @@
-/*
- * (C) Copyright 2001
- * Josh Huber <huber@mclx.com>, Mission Critical Linux, Inc.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- * modifications for the DB64360 eval board based by Ingo.Assmus@keymile.com
- */
-
-/*
- * db64360.c - main board support/init for the Galileo Eval board.
- */
-
-#include <common.h>
-#include <74xx_7xx.h>
-#include "../include/memory.h"
-#include "../include/pci.h"
-#include "../include/mv_gen_reg.h"
-#include <net.h>
-
-#include "eth.h"
-#include "mpsc.h"
-#include "i2c.h"
-#include "64360.h"
-#include "mv_regs.h"
-
-#undef DEBUG
-/*#define DEBUG */
-
-#define MAP_PCI
-
-#ifdef DEBUG
-#define DP(x) x
-#else
-#define DP(x)
-#endif
-
-extern void flush_data_cache (void);
-extern void invalidate_l1_instruction_cache (void);
-
-/* ------------------------------------------------------------------------- */
-
-/* this is the current GT register space location */
-/* it starts at CFG_DFL_GT_REGS but moves later to CFG_GT_REGS */
-
-/* Unfortunately, we cant change it while we are in flash, so we initialize it
- * to the "final" value. This means that any debug_led calls before
- * board_early_init_f wont work right (like in cpu_init_f).
- * See also my_remap_gt_regs below. (NTL)
- */
-
-void board_prebootm_init (void);
-unsigned int INTERNAL_REG_BASE_ADDR = CFG_GT_REGS;
-int display_mem_map (void);
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * This is a version of the GT register space remapping function that
- * doesn't touch globals (meaning, it's ok to run from flash.)
- *
- * Unfortunately, this has the side effect that a writable
- * INTERNAL_REG_BASE_ADDR is impossible. Oh well.
- */
-
-void my_remap_gt_regs (u32 cur_loc, u32 new_loc)
-{
- u32 temp;
-
- /* check and see if it's already moved */
-
-/* original ppcboot 1.1.6 source
-
- temp = in_le32((u32 *)(new_loc + INTERNAL_SPACE_DECODE));
- if ((temp & 0xffff) == new_loc >> 20)
- return;
-
- temp = (in_le32((u32 *)(cur_loc + INTERNAL_SPACE_DECODE)) &
- 0xffff0000) | (new_loc >> 20);
-
- out_le32((u32 *)(cur_loc + INTERNAL_SPACE_DECODE), temp);
-
- while (GTREGREAD(INTERNAL_SPACE_DECODE) != temp);
-original ppcboot 1.1.6 source end */
-
- temp = in_le32 ((u32 *) (new_loc + INTERNAL_SPACE_DECODE));
- if ((temp & 0xffff) == new_loc >> 16)
- return;
-
- temp = (in_le32 ((u32 *) (cur_loc + INTERNAL_SPACE_DECODE)) &
- 0xffff0000) | (new_loc >> 16);
-
- out_le32 ((u32 *) (cur_loc + INTERNAL_SPACE_DECODE), temp);
-
- while (GTREGREAD (INTERNAL_SPACE_DECODE) != temp);
-}
-
-#ifdef CONFIG_PCI
-
-static void gt_pci_config (void)
-{
- unsigned int stat;
- unsigned int val = 0x00fff864; /* DINK32: BusNum 23:16, DevNum 15:11, FuncNum 10:8, RegNum 7:2 */
-
- /* In PCIX mode devices provide their own bus and device numbers. We query the Discovery II's
- * config registers by writing ones to the bus and device.
- * We then update the Virtual register with the correct value for the bus and device.
- */
- if ((GTREGREAD (PCI_0_MODE) & (BIT4 | BIT5)) != 0) { /*if PCI-X */
- GT_REG_WRITE (PCI_0_CONFIG_ADDR, BIT31 | val);
-
- GT_REG_READ (PCI_0_CONFIG_DATA_VIRTUAL_REG, &stat);
-
- GT_REG_WRITE (PCI_0_CONFIG_ADDR, BIT31 | val);
- GT_REG_WRITE (PCI_0_CONFIG_DATA_VIRTUAL_REG,
- (stat & 0xffff0000) | CFG_PCI_IDSEL);
-
- }
- if ((GTREGREAD (PCI_1_MODE) & (BIT4 | BIT5)) != 0) { /*if PCI-X */
- GT_REG_WRITE (PCI_1_CONFIG_ADDR, BIT31 | val);
- GT_REG_READ (PCI_1_CONFIG_DATA_VIRTUAL_REG, &stat);
-
- GT_REG_WRITE (PCI_1_CONFIG_ADDR, BIT31 | val);
- GT_REG_WRITE (PCI_1_CONFIG_DATA_VIRTUAL_REG,
- (stat & 0xffff0000) | CFG_PCI_IDSEL);
- }
-
- /* Enable master */
- PCI_MASTER_ENABLE (0, SELF);
- PCI_MASTER_ENABLE (1, SELF);
-
- /* Enable PCI0/1 Mem0 and IO 0 disable all others */
- GT_REG_READ (BASE_ADDR_ENABLE, &stat);
- stat |= (1 << 11) | (1 << 12) | (1 << 13) | (1 << 16) | (1 << 17) | (1
- <<
- 18);
- stat &= ~((1 << 9) | (1 << 10) | (1 << 14) | (1 << 15));
- GT_REG_WRITE (BASE_ADDR_ENABLE, stat);
-
- /* ronen- add write to pci remap registers for 64460.
- in 64360 when writing to pci base go and overide remap automaticaly,
- in 64460 it doesn't */
- GT_REG_WRITE (PCI_0_IO_BASE_ADDR, CFG_PCI0_IO_BASE >> 16);
- GT_REG_WRITE (PCI_0I_O_ADDRESS_REMAP, CFG_PCI0_IO_BASE >> 16);
- GT_REG_WRITE (PCI_0_IO_SIZE, (CFG_PCI0_IO_SIZE - 1) >> 16);
-
- GT_REG_WRITE (PCI_0_MEMORY0_BASE_ADDR, CFG_PCI0_MEM_BASE >> 16);
- GT_REG_WRITE (PCI_0MEMORY0_ADDRESS_REMAP, CFG_PCI0_MEM_BASE >> 16);
- GT_REG_WRITE (PCI_0_MEMORY0_SIZE, (CFG_PCI0_MEM_SIZE - 1) >> 16);
-
- GT_REG_WRITE (PCI_1_IO_BASE_ADDR, CFG_PCI1_IO_BASE >> 16);
- GT_REG_WRITE (PCI_1I_O_ADDRESS_REMAP, CFG_PCI1_IO_BASE >> 16);
- GT_REG_WRITE (PCI_1_IO_SIZE, (CFG_PCI1_IO_SIZE - 1) >> 16);
-
- GT_REG_WRITE (PCI_1_MEMORY0_BASE_ADDR, CFG_PCI1_MEM_BASE >> 16);
- GT_REG_WRITE (PCI_1MEMORY0_ADDRESS_REMAP, CFG_PCI1_MEM_BASE >> 16);
- GT_REG_WRITE (PCI_1_MEMORY0_SIZE, (CFG_PCI1_MEM_SIZE - 1) >> 16);
-
- /* PCI interface settings */
- /* Timeout set to retry forever */
- GT_REG_WRITE (PCI_0TIMEOUT_RETRY, 0x0);
- GT_REG_WRITE (PCI_1TIMEOUT_RETRY, 0x0);
-
- /* ronen - enable only CS0 and Internal reg!! */
- GT_REG_WRITE (PCI_0BASE_ADDRESS_REGISTERS_ENABLE, 0xfffffdfe);
- GT_REG_WRITE (PCI_1BASE_ADDRESS_REGISTERS_ENABLE, 0xfffffdfe);
-
-/*ronen update the pci internal registers base address.*/
-#ifdef MAP_PCI
- for (stat = 0; stat <= PCI_HOST1; stat++)
- pciWriteConfigReg (stat,
- PCI_INTERNAL_REGISTERS_MEMORY_MAPPED_BASE_ADDRESS,
- SELF, CFG_GT_REGS);
-#endif
-
-}
-#endif
-
-/* Setup CPU interface paramaters */
-static void gt_cpu_config (void)
-{
- cpu_t cpu = get_cpu_type ();
- ulong tmp;
-
- /* cpu configuration register */
- tmp = GTREGREAD (CPU_CONFIGURATION);
-
- /* set the SINGLE_CPU bit see MV64360 P.399 */
-#ifndef CFG_GT_DUAL_CPU /* SINGLE_CPU seems to cause JTAG problems */
- tmp |= CPU_CONF_SINGLE_CPU;
-#endif
-
- tmp &= ~CPU_CONF_AACK_DELAY_2;
-
- tmp |= CPU_CONF_DP_VALID;
- tmp |= CPU_CONF_AP_VALID;
-
- tmp |= CPU_CONF_PIPELINE;
-
- GT_REG_WRITE (CPU_CONFIGURATION, tmp); /* Marvell (VXWorks) writes 0x20220FF */
-
- /* CPU master control register */
- tmp = GTREGREAD (CPU_MASTER_CONTROL);
-
- tmp |= CPU_MAST_CTL_ARB_EN;
-
- if ((cpu == CPU_7400) ||
- (cpu == CPU_7410) || (cpu == CPU_7455) || (cpu == CPU_7450)) {
-
- tmp |= CPU_MAST_CTL_CLEAN_BLK;
- tmp |= CPU_MAST_CTL_FLUSH_BLK;
-
- } else {
- /* cleanblock must be cleared for CPUs
- * that do not support this command (603e, 750)
- * see Res#1 */
- tmp &= ~CPU_MAST_CTL_CLEAN_BLK;
- tmp &= ~CPU_MAST_CTL_FLUSH_BLK;
- }
- GT_REG_WRITE (CPU_MASTER_CONTROL, tmp);
-}
-
-/*
- * board_early_init_f.
- *
- * set up gal. device mappings, etc.
- */
-int board_early_init_f (void)
-{
- uchar sram_boot = 0;
-
- /*
- * set up the GT the way the kernel wants it
- * the call to move the GT register space will obviously
- * fail if it has already been done, but we're going to assume
- * that if it's not at the power-on location, it's where we put
- * it last time. (huber)
- */
-
- my_remap_gt_regs (CFG_DFL_GT_REGS, CFG_GT_REGS);
-
- /* No PCI in first release of Port To_do: enable it. */
-#ifdef CONFIG_PCI
- gt_pci_config ();
-#endif
- /* mask all external interrupt sources */
- GT_REG_WRITE (CPU_INTERRUPT_MASK_REGISTER_LOW, 0);
- GT_REG_WRITE (CPU_INTERRUPT_MASK_REGISTER_HIGH, 0);
- /* new in MV6436x */
- GT_REG_WRITE (CPU_INTERRUPT_1_MASK_REGISTER_LOW, 0);
- GT_REG_WRITE (CPU_INTERRUPT_1_MASK_REGISTER_HIGH, 0);
- /* --------------------- */
- GT_REG_WRITE (PCI_0INTERRUPT_CAUSE_MASK_REGISTER_LOW, 0);
- GT_REG_WRITE (PCI_0INTERRUPT_CAUSE_MASK_REGISTER_HIGH, 0);
- GT_REG_WRITE (PCI_1INTERRUPT_CAUSE_MASK_REGISTER_LOW, 0);
- GT_REG_WRITE (PCI_1INTERRUPT_CAUSE_MASK_REGISTER_HIGH, 0);
- /* does not exist in MV6436x
- GT_REG_WRITE(CPU_INT_0_MASK, 0);
- GT_REG_WRITE(CPU_INT_1_MASK, 0);
- GT_REG_WRITE(CPU_INT_2_MASK, 0);
- GT_REG_WRITE(CPU_INT_3_MASK, 0);
- --------------------- */
-
-
- /* ----- DEVICE BUS SETTINGS ------ */
-
- /*
- * EVB
- * 0 - SRAM ????
- * 1 - RTC ????
- * 2 - UART ????
- * 3 - Flash checked 32Bit Intel Strata
- * boot - BootCS checked 8Bit 29LV040B
- *
- * Zuma
- * 0 - Flash
- * boot - BootCS
- */
-
- /*
- * the dual 7450 module requires burst access to the boot
- * device, so the serial rom copies the boot device to the
- * on-board sram on the eval board, and updates the correct
- * registers to boot from the sram. (device0)
- */
- if (memoryGetDeviceBaseAddress (DEVICE0) == CFG_DFL_BOOTCS_BASE)
- sram_boot = 1;
- if (!sram_boot)
- memoryMapDeviceSpace (DEVICE0, CFG_DEV0_SPACE, CFG_DEV0_SIZE);
-
- memoryMapDeviceSpace (DEVICE1, CFG_DEV1_SPACE, CFG_DEV1_SIZE);
- memoryMapDeviceSpace (DEVICE2, CFG_DEV2_SPACE, CFG_DEV2_SIZE);
- memoryMapDeviceSpace (DEVICE3, CFG_DEV3_SPACE, CFG_DEV3_SIZE);
-
-
- /* configure device timing */
-#ifdef CFG_DEV0_PAR /* set port parameters for SRAM device module access */
- if (!sram_boot)
- GT_REG_WRITE (DEVICE_BANK0PARAMETERS, CFG_DEV0_PAR);
-#endif
-
-#ifdef CFG_DEV1_PAR /* set port parameters for RTC device module access */
- GT_REG_WRITE (DEVICE_BANK1PARAMETERS, CFG_DEV1_PAR);
-#endif
-#ifdef CFG_DEV2_PAR /* set port parameters for DUART device module access */
- GT_REG_WRITE (DEVICE_BANK2PARAMETERS, CFG_DEV2_PAR);
-#endif
-
-#ifdef CFG_32BIT_BOOT_PAR /* set port parameters for Flash device module access */
- /* detect if we are booting from the 32 bit flash */
- if (GTREGREAD (DEVICE_BOOT_BANK_PARAMETERS) & (0x3 << 20)) {
- /* 32 bit boot flash */
- GT_REG_WRITE (DEVICE_BANK3PARAMETERS, CFG_8BIT_BOOT_PAR);
- GT_REG_WRITE (DEVICE_BOOT_BANK_PARAMETERS,
- CFG_32BIT_BOOT_PAR);
- } else {
- /* 8 bit boot flash */
- GT_REG_WRITE (DEVICE_BANK3PARAMETERS, CFG_32BIT_BOOT_PAR);
- GT_REG_WRITE (DEVICE_BOOT_BANK_PARAMETERS, CFG_8BIT_BOOT_PAR);
- }
-#else
- /* 8 bit boot flash only */
-/* GT_REG_WRITE(DEVICE_BOOT_BANK_PARAMETERS, CFG_8BIT_BOOT_PAR);*/
-#endif
-
-
- gt_cpu_config ();
-
- /* MPP setup */
- GT_REG_WRITE (MPP_CONTROL0, CFG_MPP_CONTROL_0);
- GT_REG_WRITE (MPP_CONTROL1, CFG_MPP_CONTROL_1);
- GT_REG_WRITE (MPP_CONTROL2, CFG_MPP_CONTROL_2);
- GT_REG_WRITE (MPP_CONTROL3, CFG_MPP_CONTROL_3);
-
- GT_REG_WRITE (GPP_LEVEL_CONTROL, CFG_GPP_LEVEL_CONTROL);
- DEBUG_LED0_ON ();
- DEBUG_LED1_ON ();
- DEBUG_LED2_ON ();
-
- return 0;
-}
-
-/* various things to do after relocation */
-
-int misc_init_r ()
-{
- icache_enable ();
-#ifdef CFG_L2
- l2cache_enable ();
-#endif
-#ifdef CONFIG_MPSC
-
- mpsc_sdma_init ();
- mpsc_init2 ();
-#endif
-
-#if 0
- /* disable the dcache and MMU */
- dcache_lock ();
-#endif
- return 0;
-}
-
-void after_reloc (ulong dest_addr, gd_t * gd)
-{
- /* check to see if we booted from the sram. If so, move things
- * back to the way they should be. (we're running from main
- * memory at this point now */
- if (memoryGetDeviceBaseAddress (DEVICE0) == CFG_DFL_BOOTCS_BASE) {
- memoryMapDeviceSpace (DEVICE0, CFG_DEV0_SPACE, CFG_DEV0_SIZE);
- memoryMapDeviceSpace (BOOT_DEVICE, CFG_DFL_BOOTCS_BASE, _8M);
- }
- display_mem_map ();
- /* now, jump to the main ppcboot board init code */
- board_init_r (gd, dest_addr);
- /* NOTREACHED */
-}
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Check Board Identity:
- *
- * right now, assume borad type. (there is just one...after all)
- */
-
-int checkboard (void)
-{
- int l_type = 0;
-
- printf ("BOARD: %s\n", CFG_BOARD_NAME);
- return (l_type);
-}
-
-/* utility functions */
-void debug_led (int led, int mode)
-{
- volatile int *addr = 0;
- int dummy;
-
- if (mode == 1) {
- switch (led) {
- case 0:
- addr = (int *) ((unsigned int) CFG_DEV1_SPACE |
- 0x08000);
- break;
-
- case 1:
- addr = (int *) ((unsigned int) CFG_DEV1_SPACE |
- 0x0c000);
- break;
-
- case 2:
- addr = (int *) ((unsigned int) CFG_DEV1_SPACE |
- 0x10000);
- break;
- }
- } else if (mode == 0) {
- switch (led) {
- case 0:
- addr = (int *) ((unsigned int) CFG_DEV1_SPACE |
- 0x14000);
- break;
-
- case 1:
- addr = (int *) ((unsigned int) CFG_DEV1_SPACE |
- 0x18000);
- break;
-
- case 2:
- addr = (int *) ((unsigned int) CFG_DEV1_SPACE |
- 0x1c000);
- break;
- }
- }
-
- dummy = *addr;
-}
-
-int display_mem_map (void)
-{
- int i, j;
- unsigned int base, size, width;
-
- /* SDRAM */
- printf ("SD (DDR) RAM\n");
- for (i = 0; i <= BANK3; i++) {
- base = memoryGetBankBaseAddress (i);
- size = memoryGetBankSize (i);
- if (size != 0) {
- printf ("BANK%d: base - 0x%08x\tsize - %dM bytes\n",
- i, base, size >> 20);
- }
- }
-
- /* CPU's PCI windows */
- for (i = 0; i <= PCI_HOST1; i++) {
- printf ("\nCPU's PCI %d windows\n", i);
- base = pciGetSpaceBase (i, PCI_IO);
- size = pciGetSpaceSize (i, PCI_IO);
- printf (" IO: base - 0x%08x\tsize - %dM bytes\n", base,
- size >> 20);
- for (j = 0;
- j <=
- PCI_REGION0
- /*ronen currently only first PCI MEM is used 3 */ ;
- j++) {
- base = pciGetSpaceBase (i, j);
- size = pciGetSpaceSize (i, j);
- printf ("MEMORY %d: base - 0x%08x\tsize - %dM bytes\n", j, base, size >> 20);
- }
- }
-
- /* Devices */
- printf ("\nDEVICES\n");
- for (i = 0; i <= DEVICE3; i++) {
- base = memoryGetDeviceBaseAddress (i);
- size = memoryGetDeviceSize (i);
- width = memoryGetDeviceWidth (i) * 8;
- printf ("DEV %d: base - 0x%08x size - %dM bytes\twidth - %d bits", i, base, size >> 20, width);
- if (i == 0)
- printf ("\t- EXT SRAM (actual - 1M)\n");
- else if (i == 1)
- printf ("\t- RTC\n");
- else if (i == 2)
- printf ("\t- UART\n");
- else
- printf ("\t- LARGE FLASH\n");
- }
-
- /* Bootrom */
- base = memoryGetDeviceBaseAddress (BOOT_DEVICE); /* Boot */
- size = memoryGetDeviceSize (BOOT_DEVICE);
- width = memoryGetDeviceWidth (BOOT_DEVICE) * 8;
- printf (" BOOT: base - 0x%08x size - %dM bytes\twidth - %d bits\n",
- base, size >> 20, width);
- return (0);
-}
-
-/* DRAM check routines copied from gw8260 */
-
-#if defined (CFG_DRAM_TEST)
-
-/*********************************************************************/
-/* NAME: move64() - moves a double word (64-bit) */
-/* */
-/* DESCRIPTION: */
-/* this function performs a double word move from the data at */
-/* the source pointer to the location at the destination pointer. */
-/* */
-/* INPUTS: */
-/* unsigned long long *src - pointer to data to move */
-/* */
-/* OUTPUTS: */
-/* unsigned long long *dest - pointer to locate to move data */
-/* */
-/* RETURNS: */
-/* None */
-/* */
-/* RESTRICTIONS/LIMITATIONS: */
-/* May cloober fr0. */
-/* */
-/*********************************************************************/
-static void move64 (unsigned long long *src, unsigned long long *dest)
-{
- asm ("lfd 0, 0(3)\n\t" /* fpr0 = *scr */
- "stfd 0, 0(4)" /* *dest = fpr0 */
- : : : "fr0"); /* Clobbers fr0 */
- return;
-}
-
-
-#if defined (CFG_DRAM_TEST_DATA)
-
-unsigned long long pattern[] = {
- 0xaaaaaaaaaaaaaaaaULL,
- 0xccccccccccccccccULL,
- 0xf0f0f0f0f0f0f0f0ULL,
- 0xff00ff00ff00ff00ULL,
- 0xffff0000ffff0000ULL,
- 0xffffffff00000000ULL,
- 0x00000000ffffffffULL,
- 0x0000ffff0000ffffULL,
- 0x00ff00ff00ff00ffULL,
- 0x0f0f0f0f0f0f0f0fULL,
- 0x3333333333333333ULL,
- 0x5555555555555555ULL,
-};
-
-/*********************************************************************/
-/* NAME: mem_test_data() - test data lines for shorts and opens */
-/* */
-/* DESCRIPTION: */
-/* Tests data lines for shorts and opens by forcing adjacent data */
-/* to opposite states. Because the data lines could be routed in */
-/* an arbitrary manner the must ensure test patterns ensure that */
-/* every case is tested. By using the following series of binary */
-/* patterns every combination of adjacent bits is test regardless */
-/* of routing. */
-/* */
-/* ...101010101010101010101010 */
-/* ...110011001100110011001100 */
-/* ...111100001111000011110000 */
-/* ...111111110000000011111111 */
-/* */
-/* Carrying this out, gives us six hex patterns as follows: */
-/* */
-/* 0xaaaaaaaaaaaaaaaa */
-/* 0xcccccccccccccccc */
-/* 0xf0f0f0f0f0f0f0f0 */
-/* 0xff00ff00ff00ff00 */
-/* 0xffff0000ffff0000 */
-/* 0xffffffff00000000 */
-/* */
-/* The number test patterns will always be given by: */
-/* */
-/* log(base 2)(number data bits) = log2 (64) = 6 */
-/* */
-/* To test for short and opens to other signals on our boards. we */
-/* simply */
-/* test with the 1's complemnt of the paterns as well. */
-/* */
-/* OUTPUTS: */
-/* Displays failing test pattern */
-/* */
-/* RETURNS: */
-/* 0 - Passed test */
-/* 1 - Failed test */
-/* */
-/* RESTRICTIONS/LIMITATIONS: */
-/* Assumes only one one SDRAM bank */
-/* */
-/*********************************************************************/
-int mem_test_data (void)
-{
- unsigned long long *pmem = (unsigned long long *) CFG_MEMTEST_START;
- unsigned long long temp64 = 0;
- int num_patterns = sizeof (pattern) / sizeof (pattern[0]);
- int i;
- unsigned int hi, lo;
-
- for (i = 0; i < num_patterns; i++) {
- move64 (&(pattern[i]), pmem);
- move64 (pmem, &temp64);
-
- /* hi = (temp64>>32) & 0xffffffff; */
- /* lo = temp64 & 0xffffffff; */
- /* printf("\ntemp64 = 0x%08x%08x", hi, lo); */
-
- hi = (pattern[i] >> 32) & 0xffffffff;
- lo = pattern[i] & 0xffffffff;
- /* printf("\npattern[%d] = 0x%08x%08x", i, hi, lo); */
-
- if (temp64 != pattern[i]) {
- printf ("\n Data Test Failed, pattern 0x%08x%08x",
- hi, lo);
- return 1;
- }
- }
-
- return 0;
-}
-#endif /* CFG_DRAM_TEST_DATA */
-
-#if defined (CFG_DRAM_TEST_ADDRESS)
-/*********************************************************************/
-/* NAME: mem_test_address() - test address lines */
-/* */
-/* DESCRIPTION: */
-/* This function performs a test to verify that each word im */
-/* memory is uniquly addressable. The test sequence is as follows: */
-/* */
-/* 1) write the address of each word to each word. */
-/* 2) verify that each location equals its address */
-/* */
-/* OUTPUTS: */
-/* Displays failing test pattern and address */
-/* */
-/* RETURNS: */
-/* 0 - Passed test */
-/* 1 - Failed test */
-/* */
-/* RESTRICTIONS/LIMITATIONS: */
-/* */
-/* */
-/*********************************************************************/
-int mem_test_address (void)
-{
- volatile unsigned int *pmem =
- (volatile unsigned int *) CFG_MEMTEST_START;
- const unsigned int size = (CFG_MEMTEST_END - CFG_MEMTEST_START) / 4;
- unsigned int i;
-
- /* write address to each location */
- for (i = 0; i < size; i++) {
- pmem[i] = i;
- }
-
- /* verify each loaction */
- for (i = 0; i < size; i++) {
- if (pmem[i] != i) {
- printf ("\n Address Test Failed at 0x%x", i);
- return 1;
- }
- }
- return 0;
-}
-#endif /* CFG_DRAM_TEST_ADDRESS */
-
-#if defined (CFG_DRAM_TEST_WALK)
-/*********************************************************************/
-/* NAME: mem_march() - memory march */
-/* */
-/* DESCRIPTION: */
-/* Marches up through memory. At each location verifies rmask if */
-/* read = 1. At each location write wmask if write = 1. Displays */
-/* failing address and pattern. */
-/* */
-/* INPUTS: */
-/* volatile unsigned long long * base - start address of test */
-/* unsigned int size - number of dwords(64-bit) to test */
-/* unsigned long long rmask - read verify mask */
-/* unsigned long long wmask - wrtie verify mask */
-/* short read - verifies rmask if read = 1 */
-/* short write - writes wmask if write = 1 */
-/* */
-/* OUTPUTS: */
-/* Displays failing test pattern and address */
-/* */
-/* RETURNS: */
-/* 0 - Passed test */
-/* 1 - Failed test */
-/* */
-/* RESTRICTIONS/LIMITATIONS: */
-/* */
-/* */
-/*********************************************************************/
-int mem_march (volatile unsigned long long *base,
- unsigned int size,
- unsigned long long rmask,
- unsigned long long wmask, short read, short write)
-{
- unsigned int i;
- unsigned long long temp = 0;
- unsigned int hitemp, lotemp, himask, lomask;
-
- for (i = 0; i < size; i++) {
- if (read != 0) {
- /* temp = base[i]; */
- move64 ((unsigned long long *) &(base[i]), &temp);
- if (rmask != temp) {
- hitemp = (temp >> 32) & 0xffffffff;
- lotemp = temp & 0xffffffff;
- himask = (rmask >> 32) & 0xffffffff;
- lomask = rmask & 0xffffffff;
-
- printf ("\n Walking one's test failed: address = 0x%08x," "\n\texpected 0x%08x%08x, found 0x%08x%08x", i << 3, himask, lomask, hitemp, lotemp);
- return 1;
- }
- }
- if (write != 0) {
- /* base[i] = wmask; */
- move64 (&wmask, (unsigned long long *) &(base[i]));
- }
- }
- return 0;
-}
-#endif /* CFG_DRAM_TEST_WALK */
-
-/*********************************************************************/
-/* NAME: mem_test_walk() - a simple walking ones test */
-/* */
-/* DESCRIPTION: */
-/* Performs a walking ones through entire physical memory. The */
-/* test uses as series of memory marches, mem_march(), to verify */
-/* and write the test patterns to memory. The test sequence is as */
-/* follows: */
-/* 1) march writing 0000...0001 */
-/* 2) march verifying 0000...0001 , writing 0000...0010 */
-/* 3) repeat step 2 shifting masks left 1 bit each time unitl */
-/* the write mask equals 1000...0000 */
-/* 4) march verifying 1000...0000 */
-/* The test fails if any of the memory marches return a failure. */
-/* */
-/* OUTPUTS: */
-/* Displays which pass on the memory test is executing */
-/* */
-/* RETURNS: */
-/* 0 - Passed test */
-/* 1 - Failed test */
-/* */
-/* RESTRICTIONS/LIMITATIONS: */
-/* */
-/* */
-/*********************************************************************/
-int mem_test_walk (void)
-{
- unsigned long long mask;
- volatile unsigned long long *pmem =
- (volatile unsigned long long *) CFG_MEMTEST_START;
- const unsigned long size = (CFG_MEMTEST_END - CFG_MEMTEST_START) / 8;
-
- unsigned int i;
-
- mask = 0x01;
-
- printf ("Initial Pass");
- mem_march (pmem, size, 0x0, 0x1, 0, 1);
-
- printf ("\b\b\b\b\b\b\b\b\b\b\b\b");
- printf (" ");
- printf (" ");
- printf ("\b\b\b\b\b\b\b\b\b\b\b\b");
-
- for (i = 0; i < 63; i++) {
- printf ("Pass %2d", i + 2);
- if (mem_march (pmem, size, mask, mask << 1, 1, 1) != 0) {
- /*printf("mask: 0x%x, pass: %d, ", mask, i); */
- return 1;
- }
- mask = mask << 1;
- printf ("\b\b\b\b\b\b\b");
- }
-
- printf ("Last Pass");
- if (mem_march (pmem, size, 0, mask, 0, 1) != 0) {
- /* printf("mask: 0x%x", mask); */
- return 1;
- }
- printf ("\b\b\b\b\b\b\b\b\b");
- printf (" ");
- printf ("\b\b\b\b\b\b\b\b\b");
-
- return 0;
-}
-
-/*********************************************************************/
-/* NAME: testdram() - calls any enabled memory tests */
-/* */
-/* DESCRIPTION: */
-/* Runs memory tests if the environment test variables are set to */
-/* 'y'. */
-/* */
-/* INPUTS: */
-/* testdramdata - If set to 'y', data test is run. */
-/* testdramaddress - If set to 'y', address test is run. */
-/* testdramwalk - If set to 'y', walking ones test is run */
-/* */
-/* OUTPUTS: */
-/* None */
-/* */
-/* RETURNS: */
-/* 0 - Passed test */
-/* 1 - Failed test */
-/* */
-/* RESTRICTIONS/LIMITATIONS: */
-/* */
-/* */
-/*********************************************************************/
-int testdram (void)
-{
- char *s;
- int rundata, runaddress, runwalk;
-
- s = getenv ("testdramdata");
- rundata = (s && (*s == 'y')) ? 1 : 0;
- s = getenv ("testdramaddress");
- runaddress = (s && (*s == 'y')) ? 1 : 0;
- s = getenv ("testdramwalk");
- runwalk = (s && (*s == 'y')) ? 1 : 0;
-
-/* rundata = 1; */
-/* runaddress = 0; */
-/* runwalk = 0; */
-
- if ((rundata == 1) || (runaddress == 1) || (runwalk == 1)) {
- printf ("Testing RAM from 0x%08x to 0x%08x ... (don't panic... that will take a moment !!!!)\n", CFG_MEMTEST_START, CFG_MEMTEST_END);
- }
-#ifdef CFG_DRAM_TEST_DATA
- if (rundata == 1) {
- printf ("Test DATA ... ");
- if (mem_test_data () == 1) {
- printf ("failed \n");
- return 1;
- } else
- printf ("ok \n");
- }
-#endif
-#ifdef CFG_DRAM_TEST_ADDRESS
- if (runaddress == 1) {
- printf ("Test ADDRESS ... ");
- if (mem_test_address () == 1) {
- printf ("failed \n");
- return 1;
- } else
- printf ("ok \n");
- }
-#endif
-#ifdef CFG_DRAM_TEST_WALK
- if (runwalk == 1) {
- printf ("Test WALKING ONEs ... ");
- if (mem_test_walk () == 1) {
- printf ("failed \n");
- return 1;
- } else
- printf ("ok \n");
- }
-#endif
- if ((rundata == 1) || (runaddress == 1) || (runwalk == 1)) {
- printf ("passed\n");
- }
- return 0;
-
-}
-#endif /* CFG_DRAM_TEST */
-
-/* ronen - the below functions are used by the bootm function */
-/* - we map the base register to fbe00000 (same mapping as in the LSP) */
-/* - we turn off the RX gig dmas - to prevent the dma from overunning */
-/* the kernel data areas. */
-/* - we diable and invalidate the icache and dcache. */
-void my_remap_gt_regs_bootm (u32 cur_loc, u32 new_loc)
-{
- u32 temp;
-
- temp = in_le32 ((u32 *) (new_loc + INTERNAL_SPACE_DECODE));
- if ((temp & 0xffff) == new_loc >> 16)
- return;
-
- temp = (in_le32 ((u32 *) (cur_loc + INTERNAL_SPACE_DECODE)) &
- 0xffff0000) | (new_loc >> 16);
-
- out_le32 ((u32 *) (cur_loc + INTERNAL_SPACE_DECODE), temp);
-
- while ((WORD_SWAP (*((volatile unsigned int *) (NONE_CACHEABLE |
- new_loc |
- (INTERNAL_SPACE_DECODE)))))
- != temp);
-
-}
-
-void board_prebootm_init ()
-{
-
-/* change window size of PCI1 IO in order tp prevent overlaping with REG BASE. */
- GT_REG_WRITE (PCI_1_IO_SIZE, (_64K - 1) >> 16);
-
-/* Stop GigE Rx DMA engines */
- GT_REG_WRITE (MV64360_ETH_RECEIVE_QUEUE_COMMAND_REG (0), 0x0000ff00);
- GT_REG_WRITE (MV64360_ETH_RECEIVE_QUEUE_COMMAND_REG (1), 0x0000ff00);
-/* MV_REG_WRITE (MV64360_ETH_RECEIVE_QUEUE_COMMAND_REG(2), 0x0000ff00); */
-
-/* Relocate MV64360 internal regs */
- my_remap_gt_regs_bootm (CFG_GT_REGS, BRIDGE_REG_BASE_BOOTM);
-
- icache_disable ();
- invalidate_l1_instruction_cache ();
- flush_data_cache ();
- dcache_disable ();
-}
diff --git a/board/Marvell/db64360/eth.h b/board/Marvell/db64360/eth.h
deleted file mode 100644
index aab32d2a5a..0000000000
--- a/board/Marvell/db64360/eth.h
+++ /dev/null
@@ -1,43 +0,0 @@
-/*
- * (C) Copyright 2001
- * Josh Huber <huber@mclx.com>, Mission Critical Linux, Inc.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * eth.h - header file for the polled mode GT ethernet driver
- */
-
-#ifndef __EVB64360_ETH_H__
-#define __EVB64360_ETH_H__
-
-#include <asm/types.h>
-#include <asm/io.h>
-#include <asm/byteorder.h>
-#include <common.h>
-
-
-int db64360_eth0_poll(void);
-int db64360_eth0_transmit(unsigned int s, volatile char *p);
-void db64360_eth0_disable(void);
-bool network_start(bd_t *bis);
-
-
-#endif /* __EVB64360_ETH_H__ */
diff --git a/board/Marvell/db64360/mpsc.c b/board/Marvell/db64360/mpsc.c
deleted file mode 100644
index ccb3adc66c..0000000000
--- a/board/Marvell/db64360/mpsc.c
+++ /dev/null
@@ -1,1019 +0,0 @@
-/*
- * (C) Copyright 2001
- * John Clemens <clemens@mclx.com>, Mission Critical Linux, Inc.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*************************************************************************
- * changes for Marvell DB64360 eval board 2003 by Ingo Assmus <ingo.assmus@keymile.com>
- *
- ************************************************************************/
-
-/*
- * mpsc.c - driver for console over the MPSC.
- */
-
-
-#include <common.h>
-#include <config.h>
-#include <asm/cache.h>
-
-#include <malloc.h>
-#include "mpsc.h"
-
-#include "mv_regs.h"
-
-#include "../include/memory.h"
-
-/* Define this if you wish to use the MPSC as a register based UART.
- * This will force the serial port to not use the SDMA engine at all.
- */
-#undef CONFIG_MPSC_DEBUG_PORT
-
-
-int (*mpsc_putchar) (char ch) = mpsc_putchar_early;
-char (*mpsc_getchar) (void) = mpsc_getchar_debug;
-int (*mpsc_test_char) (void) = mpsc_test_char_debug;
-
-
-static volatile unsigned int *rx_desc_base = NULL;
-static unsigned int rx_desc_index = 0;
-static volatile unsigned int *tx_desc_base = NULL;
-static unsigned int tx_desc_index = 0;
-
-/* local function declarations */
-static int galmpsc_connect (int channel, int connect);
-static int galmpsc_route_rx_clock (int channel, int brg);
-static int galmpsc_route_tx_clock (int channel, int brg);
-static int galmpsc_write_config_regs (int mpsc, int mode);
-static int galmpsc_config_channel_regs (int mpsc);
-static int galmpsc_set_char_length (int mpsc, int value);
-static int galmpsc_set_stop_bit_length (int mpsc, int value);
-static int galmpsc_set_parity (int mpsc, int value);
-static int galmpsc_enter_hunt (int mpsc);
-static int galmpsc_set_brkcnt (int mpsc, int value);
-static int galmpsc_set_tcschar (int mpsc, int value);
-static int galmpsc_set_snoop (int mpsc, int value);
-static int galmpsc_shutdown (int mpsc);
-
-static int galsdma_set_RFT (int channel);
-static int galsdma_set_SFM (int channel);
-static int galsdma_set_rxle (int channel);
-static int galsdma_set_txle (int channel);
-static int galsdma_set_burstsize (int channel, unsigned int value);
-static int galsdma_set_RC (int channel, unsigned int value);
-
-static int galbrg_set_CDV (int channel, int value);
-static int galbrg_enable (int channel);
-static int galbrg_disable (int channel);
-static int galbrg_set_clksrc (int channel, int value);
-static int galbrg_set_CUV (int channel, int value);
-
-static void galsdma_enable_rx (void);
-static int galsdma_set_mem_space (unsigned int memSpace,
- unsigned int memSpaceTarget,
- unsigned int memSpaceAttr,
- unsigned int baseAddress,
- unsigned int size);
-
-
-#define SOFTWARE_CACHE_MANAGEMENT
-
-#ifdef SOFTWARE_CACHE_MANAGEMENT
-#define FLUSH_DCACHE(a,b) if(dcache_status()){clean_dcache_range((u32)(a),(u32)(b));}
-#define FLUSH_AND_INVALIDATE_DCACHE(a,b) if(dcache_status()){flush_dcache_range((u32)(a),(u32)(b));}
-#define INVALIDATE_DCACHE(a,b) if(dcache_status()){invalidate_dcache_range((u32)(a),(u32)(b));}
-#else
-#define FLUSH_DCACHE(a,b)
-#define FLUSH_AND_INVALIDATE_DCACHE(a,b)
-#define INVALIDATE_DCACHE(a,b)
-#endif
-
-#ifdef CONFIG_MPSC_DEBUG_PORT
-static void mpsc_debug_init (void)
-{
-
- volatile unsigned int temp;
-
- /* Clear the CFR (CHR4) */
- /* Write random 'Z' bit (bit 29) of CHR4 to enable debug uart *UNDOCUMENTED FEATURE* */
- temp = GTREGREAD (GALMPSC_CHANNELREG_4 + (CHANNEL * GALMPSC_indent: Standard input:229: Warning:old style assignment ambiguity in "=&". Assuming "= &"
-
-REG_GAP));
- temp &= 0xffffff00;
- temp |= BIT29;
- GT_REG_WRITE (GALMPSC_CHANNELREG_4 + (CHANNEL * GALMPSC_REG_GAP),
- temp);
-
- /* Set the Valid bit 'V' (bit 12) and int generation bit 'INT' (bit 15) */
- temp = GTREGREAD (GALMPSC_CHANNELREG_5 + (CHANNEL * GALMPSC_REG_GAP));
- temp |= (BIT12 | BIT15);
- GT_REG_WRITE (GALMPSC_CHANNELREG_5 + (CHANNEL * GALMPSC_REG_GAP),
- temp);
-
- /* Set int mask */
- temp = GTREGREAD (GALMPSC_0_INT_MASK);
- temp |= BIT6;
- GT_REG_WRITE (GALMPSC_0_INT_MASK, temp);
-}
-#endif
-
-char mpsc_getchar_debug (void)
-{
- volatile int temp;
- volatile unsigned int cause;
-
- cause = GTREGREAD (GALMPSC_0_INT_CAUSE);
- while ((cause & BIT6) == 0) {
- cause = GTREGREAD (GALMPSC_0_INT_CAUSE);
- }
-
- temp = GTREGREAD (GALMPSC_CHANNELREG_10 +
- (CHANNEL * GALMPSC_REG_GAP));
- /* By writing 1's to the set bits, the register is cleared */
- GT_REG_WRITE (GALMPSC_CHANNELREG_10 + (CHANNEL * GALMPSC_REG_GAP),
- temp);
- GT_REG_WRITE (GALMPSC_0_INT_CAUSE, cause & ~BIT6);
- return (temp >> 16) & 0xff;
-}
-
-/* special function for running out of flash. doesn't modify any
- * global variables [josh] */
-int mpsc_putchar_early (char ch)
-{
- DECLARE_GLOBAL_DATA_PTR;
- int mpsc = CHANNEL;
- int temp =
- GTREGREAD (GALMPSC_CHANNELREG_2 + (mpsc * GALMPSC_REG_GAP));
- galmpsc_set_tcschar (mpsc, ch);
- GT_REG_WRITE (GALMPSC_CHANNELREG_2 + (mpsc * GALMPSC_REG_GAP),
- temp | 0x200);
-
-#define MAGIC_FACTOR (10*1000000)
-
- udelay (MAGIC_FACTOR / gd->baudrate);
- return 0;
-}
-
-/* This is used after relocation, see serial.c and mpsc_init2 */
-static int mpsc_putchar_sdma (char ch)
-{
- volatile unsigned int *p;
- unsigned int temp;
-
-
- /* align the descriptor */
- p = tx_desc_base;
- memset ((void *) p, 0, 8 * sizeof (unsigned int));
-
- /* fill one 64 bit buffer */
- /* word swap, pad with 0 */
- p[4] = 0; /* x */
- p[5] = (unsigned int) ch; /* x */
-
- /* CHANGED completely according to GT64260A dox - NTL */
- p[0] = 0x00010001; /* 0 */
- p[1] = DESC_OWNER_BIT | DESC_FIRST | DESC_LAST; /* 4 */
- p[2] = 0; /* 8 */
- p[3] = (unsigned int) &p[4]; /* c */
-
-#if 0
- p[9] = DESC_FIRST | DESC_LAST;
- p[10] = (unsigned int) &p[0];
- p[11] = (unsigned int) &p[12];
-#endif
-
- FLUSH_DCACHE (&p[0], &p[8]);
-
- GT_REG_WRITE (GALSDMA_0_CUR_TX_PTR + (CHANNEL * GALSDMA_REG_DIFF),
- (unsigned int) &p[0]);
- GT_REG_WRITE (GALSDMA_0_FIR_TX_PTR + (CHANNEL * GALSDMA_REG_DIFF),
- (unsigned int) &p[0]);
-
- temp = GTREGREAD (GALSDMA_0_COM_REG + (CHANNEL * GALSDMA_REG_DIFF));
- temp |= (TX_DEMAND | TX_STOP);
- GT_REG_WRITE (GALSDMA_0_COM_REG + (CHANNEL * GALSDMA_REG_DIFF), temp);
-
- INVALIDATE_DCACHE (&p[1], &p[2]);
-
- while (p[1] & DESC_OWNER_BIT) {
- udelay (100);
- INVALIDATE_DCACHE (&p[1], &p[2]);
- }
- return 0;
-}
-
-char mpsc_getchar_sdma (void)
-{
- static unsigned int done = 0;
- volatile char ch;
- unsigned int len = 0, idx = 0, temp;
-
- volatile unsigned int *p;
-
-
- do {
- p = &rx_desc_base[rx_desc_index * 8];
-
- INVALIDATE_DCACHE (&p[0], &p[1]);
- /* Wait for character */
- while (p[1] & DESC_OWNER_BIT) {
- udelay (100);
- INVALIDATE_DCACHE (&p[0], &p[1]);
- }
-
- /* Handle error case */
- if (p[1] & (1 << 15)) {
- printf ("oops, error: %08x\n", p[1]);
-
- temp = GTREGREAD (GALMPSC_CHANNELREG_2 +
- (CHANNEL * GALMPSC_REG_GAP));
- temp |= (1 << 23);
- GT_REG_WRITE (GALMPSC_CHANNELREG_2 +
- (CHANNEL * GALMPSC_REG_GAP), temp);
-
- /* Can't poll on abort bit, so we just wait. */
- udelay (100);
-
- galsdma_enable_rx ();
- }
-
- /* Number of bytes left in this descriptor */
- len = p[0] & 0xffff;
-
- if (len) {
- /* Where to look */
- idx = 5;
- if (done > 3)
- idx = 4;
- if (done > 7)
- idx = 7;
- if (done > 11)
- idx = 6;
-
- INVALIDATE_DCACHE (&p[idx], &p[idx + 1]);
- ch = p[idx] & 0xff;
- done++;
- }
-
- if (done < len) {
- /* this descriptor has more bytes still
- * shift down the char we just read, and leave the
- * buffer in place for the next time around
- */
- p[idx] = p[idx] >> 8;
- FLUSH_DCACHE (&p[idx], &p[idx + 1]);
- }
-
- if (done == len) {
- /* nothing left in this descriptor.
- * go to next one
- */
- p[1] = DESC_OWNER_BIT | DESC_FIRST | DESC_LAST;
- p[0] = 0x00100000;
- FLUSH_DCACHE (&p[0], &p[1]);
- /* Next descriptor */
- rx_desc_index = (rx_desc_index + 1) % RX_DESC;
- done = 0;
- }
- } while (len == 0); /* galileo bug.. len might be zero */
-
- return ch;
-}
-
-
-int mpsc_test_char_debug (void)
-{
- if ((GTREGREAD (GALMPSC_0_INT_CAUSE) & BIT6) == 0)
- return 0;
- else {
- return 1;
- }
-}
-
-
-int mpsc_test_char_sdma (void)
-{
- volatile unsigned int *p = &rx_desc_base[rx_desc_index * 8];
-
- INVALIDATE_DCACHE (&p[1], &p[2]);
-
- if (p[1] & DESC_OWNER_BIT)
- return 0;
- else
- return 1;
-}
-
-int mpsc_init (int baud)
-{
- /* BRG CONFIG */
- galbrg_set_baudrate (CHANNEL, baud);
- galbrg_set_clksrc (CHANNEL, 8); /* set source=Tclk */
- galbrg_set_CUV (CHANNEL, 0); /* set up CountUpValue */
- galbrg_enable (CHANNEL); /* Enable BRG */
-
- /* Set up clock routing */
- galmpsc_connect (CHANNEL, GALMPSC_CONNECT); /* connect it */
-
- galmpsc_route_rx_clock (CHANNEL, CHANNEL); /* chosse BRG0 for Rx */
- galmpsc_route_tx_clock (CHANNEL, CHANNEL); /* chose BRG0 for Tx */
-
- /* reset MPSC state */
- galmpsc_shutdown (CHANNEL);
-
- /* SDMA CONFIG */
- galsdma_set_burstsize (CHANNEL, L1_CACHE_BYTES / 8); /* in 64 bit words (8 bytes) */
- galsdma_set_txle (CHANNEL);
- galsdma_set_rxle (CHANNEL);
- galsdma_set_RC (CHANNEL, 0xf);
- galsdma_set_SFM (CHANNEL);
- galsdma_set_RFT (CHANNEL);
-
- /* MPSC CONFIG */
- galmpsc_write_config_regs (CHANNEL, GALMPSC_UART);
- galmpsc_config_channel_regs (CHANNEL);
- galmpsc_set_char_length (CHANNEL, GALMPSC_CHAR_LENGTH_8); /* 8 */
- galmpsc_set_parity (CHANNEL, GALMPSC_PARITY_NONE); /* N */
- galmpsc_set_stop_bit_length (CHANNEL, GALMPSC_STOP_BITS_1); /* 1 */
-
-#ifdef CONFIG_MPSC_DEBUG_PORT
- mpsc_debug_init ();
-#endif
-
- /* COMM_MPSC CONFIG */
-#ifdef SOFTWARE_CACHE_MANAGEMENT
- galmpsc_set_snoop (CHANNEL, 0); /* disable snoop */
-#else
- galmpsc_set_snoop (CHANNEL, 1); /* enable snoop */
-#endif
-
- return 0;
-}
-
-
-void mpsc_sdma_init (void)
-{
-/* Setup SDMA channel0 SDMA_CONFIG_REG*/
- GT_REG_WRITE (SDMA_CONFIG_REG (0), 0x000020ff);
-
-/* Enable MPSC-Window0 for DRAM Bank0 */
- if (galsdma_set_mem_space (MV64360_CUNIT_BASE_ADDR_WIN_0_BIT,
- MV64360_SDMA_DRAM_CS_0_TARGET,
- 0,
- memoryGetBankBaseAddress
- (CS_0_LOW_DECODE_ADDRESS),
- memoryGetBankSize (BANK0)) != true)
- printf ("%s: SDMA_Window0 memory setup failed !!! \n",
- __FUNCTION__);
-
-
-/* Disable MPSC-Window1 */
- if (galsdma_set_mem_space (MV64360_CUNIT_BASE_ADDR_WIN_1_BIT,
- MV64360_SDMA_DRAM_CS_0_TARGET,
- 0,
- memoryGetBankBaseAddress
- (CS_1_LOW_DECODE_ADDRESS),
- memoryGetBankSize (BANK3)) != true)
- printf ("%s: SDMA_Window1 memory setup failed !!! \n",
- __FUNCTION__);
-
-
-/* Disable MPSC-Window2 */
- if (galsdma_set_mem_space (MV64360_CUNIT_BASE_ADDR_WIN_2_BIT,
- MV64360_SDMA_DRAM_CS_0_TARGET,
- 0,
- memoryGetBankBaseAddress
- (CS_2_LOW_DECODE_ADDRESS),
- memoryGetBankSize (BANK3)) != true)
- printf ("%s: SDMA_Window2 memory setup failed !!! \n",
- __FUNCTION__);
-
-
-/* Disable MPSC-Window3 */
- if (galsdma_set_mem_space (MV64360_CUNIT_BASE_ADDR_WIN_3_BIT,
- MV64360_SDMA_DRAM_CS_0_TARGET,
- 0,
- memoryGetBankBaseAddress
- (CS_3_LOW_DECODE_ADDRESS),
- memoryGetBankSize (BANK3)) != true)
- printf ("%s: SDMA_Window3 memory setup failed !!! \n",
- __FUNCTION__);
-
-/* Setup MPSC0 access mode Window0 full access */
- GT_SET_REG_BITS (MPSC0_ACCESS_PROTECTION_REG,
- (MV64360_SDMA_WIN_ACCESS_FULL <<
- (MV64360_CUNIT_BASE_ADDR_WIN_0_BIT * 2)));
-
-/* Setup MPSC1 access mode Window1 full access */
- GT_SET_REG_BITS (MPSC1_ACCESS_PROTECTION_REG,
- (MV64360_SDMA_WIN_ACCESS_FULL <<
- (MV64360_CUNIT_BASE_ADDR_WIN_0_BIT * 2)));
-
-/* Setup MPSC internal address space base address */
- GT_REG_WRITE (CUNIT_INTERNAL_SPACE_BASE_ADDR_REG, CFG_GT_REGS);
-
-/* no high address remap*/
- GT_REG_WRITE (CUNIT_HIGH_ADDR_REMAP_REG0, 0x00);
- GT_REG_WRITE (CUNIT_HIGH_ADDR_REMAP_REG1, 0x00);
-
-/* clear interrupt cause register for MPSC (fault register)*/
- GT_REG_WRITE (CUNIT_INTERRUPT_CAUSE_REG, 0x00);
-}
-
-
-void mpsc_init2 (void)
-{
- int i;
-
-#ifndef CONFIG_MPSC_DEBUG_PORT
- mpsc_putchar = mpsc_putchar_sdma;
- mpsc_getchar = mpsc_getchar_sdma;
- mpsc_test_char = mpsc_test_char_sdma;
-#endif
- /* RX descriptors */
- rx_desc_base = (unsigned int *) malloc (((RX_DESC + 1) * 8) *
- sizeof (unsigned int));
-
- /* align descriptors */
- rx_desc_base = (unsigned int *)
- (((unsigned int) rx_desc_base + 32) & 0xFFFFFFF0);
-
- rx_desc_index = 0;
-
- memset ((void *) rx_desc_base, 0,
- (RX_DESC * 8) * sizeof (unsigned int));
-
- for (i = 0; i < RX_DESC; i++) {
- rx_desc_base[i * 8 + 3] = (unsigned int) &rx_desc_base[i * 8 + 4]; /* Buffer */
- rx_desc_base[i * 8 + 2] = (unsigned int) &rx_desc_base[(i + 1) * 8]; /* Next descriptor */
- rx_desc_base[i * 8 + 1] = DESC_OWNER_BIT | DESC_FIRST | DESC_LAST; /* Command & control */
- rx_desc_base[i * 8] = 0x00100000;
- }
- rx_desc_base[(i - 1) * 8 + 2] = (unsigned int) &rx_desc_base[0];
-
- FLUSH_DCACHE (&rx_desc_base[0], &rx_desc_base[RX_DESC * 8]);
- GT_REG_WRITE (GALSDMA_0_CUR_RX_PTR + (CHANNEL * GALSDMA_REG_DIFF),
- (unsigned int) &rx_desc_base[0]);
-
- /* TX descriptors */
- tx_desc_base = (unsigned int *) malloc (((TX_DESC + 1) * 8) *
- sizeof (unsigned int));
-
- /* align descriptors */
- tx_desc_base = (unsigned int *)
- (((unsigned int) tx_desc_base + 32) & 0xFFFFFFF0);
-
- tx_desc_index = -1;
-
- memset ((void *) tx_desc_base, 0,
- (TX_DESC * 8) * sizeof (unsigned int));
-
- for (i = 0; i < TX_DESC; i++) {
- tx_desc_base[i * 8 + 5] = (unsigned int) 0x23232323;
- tx_desc_base[i * 8 + 4] = (unsigned int) 0x23232323;
- tx_desc_base[i * 8 + 3] =
- (unsigned int) &tx_desc_base[i * 8 + 4];
- tx_desc_base[i * 8 + 2] =
- (unsigned int) &tx_desc_base[(i + 1) * 8];
- tx_desc_base[i * 8 + 1] =
- DESC_OWNER_BIT | DESC_FIRST | DESC_LAST;
-
- /* set sbytecnt and shadow byte cnt to 1 */
- tx_desc_base[i * 8] = 0x00010001;
- }
- tx_desc_base[(i - 1) * 8 + 2] = (unsigned int) &tx_desc_base[0];
-
- FLUSH_DCACHE (&tx_desc_base[0], &tx_desc_base[TX_DESC * 8]);
-
- udelay (100);
-
- galsdma_enable_rx ();
-
- return;
-}
-
-int galbrg_set_baudrate (int channel, int rate)
-{
- DECLARE_GLOBAL_DATA_PTR;
- int clock;
-
- galbrg_disable (channel); /*ok */
-
-#ifdef ZUMA_NTL
- /* from tclk */
- clock = (CFG_TCLK / (16 * rate)) - 1;
-#else
- clock = (CFG_TCLK / (16 * rate)) - 1;
-#endif
-
- galbrg_set_CDV (channel, clock); /* set timer Reg. for BRG */
-
- galbrg_enable (channel);
-
- gd->baudrate = rate;
-
- return 0;
-}
-
-/* ------------------------------------------------------------------ */
-
-/* Below are all the private functions that no one else needs */
-
-static int galbrg_set_CDV (int channel, int value)
-{
- unsigned int temp;
-
- temp = GTREGREAD (GALBRG_0_CONFREG + (channel * GALBRG_REG_GAP));
- temp &= 0xFFFF0000;
- temp |= (value & 0x0000FFFF);
- GT_REG_WRITE (GALBRG_0_CONFREG + (channel * GALBRG_REG_GAP), temp);
-
- return 0;
-}
-
-static int galbrg_enable (int channel)
-{
- unsigned int temp;
-
- temp = GTREGREAD (GALBRG_0_CONFREG + (channel * GALBRG_REG_GAP));
- temp |= 0x00010000;
- GT_REG_WRITE (GALBRG_0_CONFREG + (channel * GALBRG_REG_GAP), temp);
-
- return 0;
-}
-
-static int galbrg_disable (int channel)
-{
- unsigned int temp;
-
- temp = GTREGREAD (GALBRG_0_CONFREG + (channel * GALBRG_REG_GAP));
- temp &= 0xFFFEFFFF;
- GT_REG_WRITE (GALBRG_0_CONFREG + (channel * GALBRG_REG_GAP), temp);
-
- return 0;
-}
-
-static int galbrg_set_clksrc (int channel, int value)
-{
- unsigned int temp;
-
- temp = GTREGREAD (GALBRG_0_CONFREG + (channel * GALBRG_REG_GAP));
- temp &= 0xFFC3FFFF; /* Bit 18 - 21 (MV 64260 18-22) */
- temp |= (value << 18);
- GT_REG_WRITE (GALBRG_0_CONFREG + (channel * GALBRG_REG_GAP), temp);
- return 0;
-}
-
-static int galbrg_set_CUV (int channel, int value)
-{
- /* set CountUpValue */
- GT_REG_WRITE (GALBRG_0_BTREG + (channel * GALBRG_REG_GAP), value);
-
- return 0;
-}
-
-#if 0
-static int galbrg_reset (int channel)
-{
- unsigned int temp;
-
- temp = GTREGREAD (GALBRG_0_CONFREG + (channel * GALBRG_REG_GAP));
- temp |= 0x20000;
- GT_REG_WRITE (GALBRG_0_CONFREG + (channel * GALBRG_REG_GAP), temp);
-
- return 0;
-}
-#endif
-
-static int galsdma_set_RFT (int channel)
-{
- unsigned int temp;
-
- temp = GTREGREAD (GALSDMA_0_CONF_REG + (channel * GALSDMA_REG_DIFF));
- temp |= 0x00000001;
- GT_REG_WRITE (GALSDMA_0_CONF_REG + (channel * GALSDMA_REG_DIFF),
- temp);
-
- return 0;
-}
-
-static int galsdma_set_SFM (int channel)
-{
- unsigned int temp;
-
- temp = GTREGREAD (GALSDMA_0_CONF_REG + (channel * GALSDMA_REG_DIFF));
- temp |= 0x00000002;
- GT_REG_WRITE (GALSDMA_0_CONF_REG + (channel * GALSDMA_REG_DIFF),
- temp);
-
- return 0;
-}
-
-static int galsdma_set_rxle (int channel)
-{
- unsigned int temp;
-
- temp = GTREGREAD (GALSDMA_0_CONF_REG + (channel * GALSDMA_REG_DIFF));
- temp |= 0x00000040;
- GT_REG_WRITE (GALSDMA_0_CONF_REG + (channel * GALSDMA_REG_DIFF),
- temp);
-
- return 0;
-}
-
-static int galsdma_set_txle (int channel)
-{
- unsigned int temp;
-
- temp = GTREGREAD (GALSDMA_0_CONF_REG + (channel * GALSDMA_REG_DIFF));
- temp |= 0x00000080;
- GT_REG_WRITE (GALSDMA_0_CONF_REG + (channel * GALSDMA_REG_DIFF),
- temp);
-
- return 0;
-}
-
-static int galsdma_set_RC (int channel, unsigned int value)
-{
- unsigned int temp;
-
- temp = GTREGREAD (GALSDMA_0_CONF_REG + (channel * GALSDMA_REG_DIFF));
- temp &= ~0x0000003c;
- temp |= (value << 2);
- GT_REG_WRITE (GALSDMA_0_CONF_REG + (channel * GALSDMA_REG_DIFF),
- temp);
-
- return 0;
-}
-
-static int galsdma_set_burstsize (int channel, unsigned int value)
-{
- unsigned int temp;
-
- temp = GTREGREAD (GALSDMA_0_CONF_REG + (channel * GALSDMA_REG_DIFF));
- temp &= 0xFFFFCFFF;
- switch (value) {
- case 8:
- GT_REG_WRITE (GALSDMA_0_CONF_REG +
- (channel * GALSDMA_REG_DIFF),
- (temp | (0x3 << 12)));
- break;
-
- case 4:
- GT_REG_WRITE (GALSDMA_0_CONF_REG +
- (channel * GALSDMA_REG_DIFF),
- (temp | (0x2 << 12)));
- break;
-
- case 2:
- GT_REG_WRITE (GALSDMA_0_CONF_REG +
- (channel * GALSDMA_REG_DIFF),
- (temp | (0x1 << 12)));
- break;
-
- case 1:
- GT_REG_WRITE (GALSDMA_0_CONF_REG +
- (channel * GALSDMA_REG_DIFF),
- (temp | (0x0 << 12)));
- break;
-
- default:
- return -1;
- break;
- }
-
- return 0;
-}
-
-static int galmpsc_connect (int channel, int connect)
-{
- unsigned int temp;
-
- temp = GTREGREAD (GALMPSC_ROUTING_REGISTER);
-
- if ((channel == 0) && connect)
- temp &= ~0x00000007;
- else if ((channel == 1) && connect)
- temp &= ~(0x00000007 << 6);
- else if ((channel == 0) && !connect)
- temp |= 0x00000007;
- else
- temp |= (0x00000007 << 6);
-
- /* Just in case... */
- temp &= 0x3fffffff;
-
- GT_REG_WRITE (GALMPSC_ROUTING_REGISTER, temp);
-
- return 0;
-}
-
-static int galmpsc_route_rx_clock (int channel, int brg)
-{
- unsigned int temp;
-
- temp = GTREGREAD (GALMPSC_RxC_ROUTE);
-
- if (channel == 0) {
- temp &= ~0x0000000F;
- temp |= brg;
- } else {
- temp &= ~0x00000F00;
- temp |= (brg << 8);
- }
-
- GT_REG_WRITE (GALMPSC_RxC_ROUTE, temp);
-
- return 0;
-}
-
-static int galmpsc_route_tx_clock (int channel, int brg)
-{
- unsigned int temp;
-
- temp = GTREGREAD (GALMPSC_TxC_ROUTE);
-
- if (channel == 0) {
- temp &= ~0x0000000F;
- temp |= brg;
- } else {
- temp &= ~0x00000F00;
- temp |= (brg << 8);
- }
-
- GT_REG_WRITE (GALMPSC_TxC_ROUTE, temp);
-
- return 0;
-}
-
-static int galmpsc_write_config_regs (int mpsc, int mode)
-{
- if (mode == GALMPSC_UART) {
- /* Main config reg Low (Null modem, Enable Tx/Rx, UART mode) */
- GT_REG_WRITE (GALMPSC_MCONF_LOW + (mpsc * GALMPSC_REG_GAP),
- 0x000004c4);
-
- /* Main config reg High (32x Rx/Tx clock mode, width=8bits */
- GT_REG_WRITE (GALMPSC_MCONF_HIGH + (mpsc * GALMPSC_REG_GAP),
- 0x024003f8);
- /* 22 2222 1111 */
- /* 54 3210 9876 */
- /* 0000 0010 0000 0000 */
- /* 1 */
- /* 098 7654 3210 */
- /* 0000 0011 1111 1000 */
- } else
- return -1;
-
- return 0;
-}
-
-static int galmpsc_config_channel_regs (int mpsc)
-{
- GT_REG_WRITE (GALMPSC_CHANNELREG_1 + (mpsc * GALMPSC_REG_GAP), 0);
- GT_REG_WRITE (GALMPSC_CHANNELREG_2 + (mpsc * GALMPSC_REG_GAP), 0);
- GT_REG_WRITE (GALMPSC_CHANNELREG_3 + (mpsc * GALMPSC_REG_GAP), 1);
- GT_REG_WRITE (GALMPSC_CHANNELREG_4 + (mpsc * GALMPSC_REG_GAP), 0);
- GT_REG_WRITE (GALMPSC_CHANNELREG_5 + (mpsc * GALMPSC_REG_GAP), 0);
- GT_REG_WRITE (GALMPSC_CHANNELREG_6 + (mpsc * GALMPSC_REG_GAP), 0);
- GT_REG_WRITE (GALMPSC_CHANNELREG_7 + (mpsc * GALMPSC_REG_GAP), 0);
- GT_REG_WRITE (GALMPSC_CHANNELREG_8 + (mpsc * GALMPSC_REG_GAP), 0);
- GT_REG_WRITE (GALMPSC_CHANNELREG_9 + (mpsc * GALMPSC_REG_GAP), 0);
- GT_REG_WRITE (GALMPSC_CHANNELREG_10 + (mpsc * GALMPSC_REG_GAP), 0);
-
- galmpsc_set_brkcnt (mpsc, 0x3);
- galmpsc_set_tcschar (mpsc, 0xab);
-
- return 0;
-}
-
-static int galmpsc_set_brkcnt (int mpsc, int value)
-{
- unsigned int temp;
-
- temp = GTREGREAD (GALMPSC_CHANNELREG_1 + (mpsc * GALMPSC_REG_GAP));
- temp &= 0x0000FFFF;
- temp |= (value << 16);
- GT_REG_WRITE (GALMPSC_CHANNELREG_1 + (mpsc * GALMPSC_REG_GAP), temp);
-
- return 0;
-}
-
-static int galmpsc_set_tcschar (int mpsc, int value)
-{
- unsigned int temp;
-
- temp = GTREGREAD (GALMPSC_CHANNELREG_1 + (mpsc * GALMPSC_REG_GAP));
- temp &= 0xFFFF0000;
- temp |= value;
- GT_REG_WRITE (GALMPSC_CHANNELREG_1 + (mpsc * GALMPSC_REG_GAP), temp);
-
- return 0;
-}
-
-static int galmpsc_set_char_length (int mpsc, int value)
-{
- unsigned int temp;
-
- temp = GTREGREAD (GALMPSC_PROTOCONF_REG + (mpsc * GALMPSC_REG_GAP));
- temp &= 0xFFFFCFFF;
- temp |= (value << 12);
- GT_REG_WRITE (GALMPSC_PROTOCONF_REG + (mpsc * GALMPSC_REG_GAP), temp);
-
- return 0;
-}
-
-static int galmpsc_set_stop_bit_length (int mpsc, int value)
-{
- unsigned int temp;
-
- temp = GTREGREAD (GALMPSC_PROTOCONF_REG + (mpsc * GALMPSC_REG_GAP));
- temp &= 0xFFFFBFFF;
- temp |= (value << 14);
- GT_REG_WRITE (GALMPSC_PROTOCONF_REG + (mpsc * GALMPSC_REG_GAP), temp);
-
- return 0;
-}
-
-static int galmpsc_set_parity (int mpsc, int value)
-{
- unsigned int temp;
-
- temp = GTREGREAD (GALMPSC_CHANNELREG_2 + (mpsc * GALMPSC_REG_GAP));
- if (value != -1) {
- temp &= 0xFFF3FFF3;
- temp |= ((value << 18) | (value << 2));
- temp |= ((value << 17) | (value << 1));
- } else {
- temp &= 0xFFF1FFF1;
- }
-
- GT_REG_WRITE (GALMPSC_CHANNELREG_2 + (mpsc * GALMPSC_REG_GAP), temp);
-
- return 0;
-}
-
-static int galmpsc_enter_hunt (int mpsc)
-{
- int temp;
-
- temp = GTREGREAD (GALMPSC_CHANNELREG_2 + (mpsc * GALMPSC_REG_GAP));
- temp |= 0x80000000;
- GT_REG_WRITE (GALMPSC_CHANNELREG_2 + (mpsc * GALMPSC_REG_GAP), temp);
-
- while (GTREGREAD (GALMPSC_CHANNELREG_2 + (mpsc * GALMPSC_REG_GAP)) &
- MPSC_ENTER_HUNT) {
- udelay (1);
- }
- return 0;
-}
-
-
-static int galmpsc_shutdown (int mpsc)
-{
- unsigned int temp;
-
- /* cause RX abort (clears RX) */
- temp = GTREGREAD (GALMPSC_CHANNELREG_2 + (mpsc * GALMPSC_REG_GAP));
- temp |= MPSC_RX_ABORT | MPSC_TX_ABORT;
- temp &= ~MPSC_ENTER_HUNT;
- GT_REG_WRITE (GALMPSC_CHANNELREG_2 + (mpsc * GALMPSC_REG_GAP), temp);
-
- GT_REG_WRITE (GALSDMA_0_COM_REG, 0);
- GT_REG_WRITE (GALSDMA_0_COM_REG, SDMA_TX_ABORT | SDMA_RX_ABORT);
-
- /* shut down the MPSC */
- GT_REG_WRITE (GALMPSC_MCONF_LOW, 0);
- GT_REG_WRITE (GALMPSC_MCONF_HIGH, 0);
- GT_REG_WRITE (GALMPSC_PROTOCONF_REG + (mpsc * GALMPSC_REG_GAP), 0);
-
- udelay (100);
-
- /* shut down the sdma engines. */
- /* reset config to default */
- GT_REG_WRITE (GALSDMA_0_CONF_REG, 0x000000fc);
-
- udelay (100);
-
- /* clear the SDMA current and first TX and RX pointers */
- GT_REG_WRITE (GALSDMA_0_CUR_RX_PTR, 0);
- GT_REG_WRITE (GALSDMA_0_CUR_TX_PTR, 0);
- GT_REG_WRITE (GALSDMA_0_FIR_TX_PTR, 0);
-
- udelay (100);
-
- return 0;
-}
-
-static void galsdma_enable_rx (void)
-{
- int temp;
-
- /* Enable RX processing */
- temp = GTREGREAD (GALSDMA_0_COM_REG + (CHANNEL * GALSDMA_REG_DIFF));
- temp |= RX_ENABLE;
- GT_REG_WRITE (GALSDMA_0_COM_REG + (CHANNEL * GALSDMA_REG_DIFF), temp);
-
- galmpsc_enter_hunt (CHANNEL);
-}
-
-static int galmpsc_set_snoop (int mpsc, int value)
-{
- int reg =
- mpsc ? MPSC_1_ADDRESS_CONTROL_LOW :
- MPSC_0_ADDRESS_CONTROL_LOW;
- int temp = GTREGREAD (reg);
-
- if (value)
- temp |= (1 << 6) | (1 << 14) | (1 << 22) | (1 << 30);
- else
- temp &= ~((1 << 6) | (1 << 14) | (1 << 22) | (1 << 30));
- GT_REG_WRITE (reg, temp);
- return 0;
-}
-
-/*******************************************************************************
-* galsdma_set_mem_space - Set MV64360 IDMA memory decoding map.
-*
-* DESCRIPTION:
-* the MV64360 SDMA has its own address decoding map that is de-coupled
-* from the CPU interface address decoding windows. The SDMA channels
-* share four address windows. Each region can be individually configured
-* by this function by associating it to a target interface and setting
-* base and size values.
-*
-* NOTE!!!
-* The size must be in 64Kbyte granularity.
-* The base address must be aligned to the size.
-* The size must be a series of 1s followed by a series of zeros
-*
-* OUTPUT:
-* None.
-*
-* RETURN:
-* True for success, false otherwise.
-*
-*******************************************************************************/
-
-static int galsdma_set_mem_space (unsigned int memSpace,
- unsigned int memSpaceTarget,
- unsigned int memSpaceAttr,
- unsigned int baseAddress, unsigned int size)
-{
- unsigned int temp;
-
- if (size == 0) {
- GT_RESET_REG_BITS (MV64360_CUNIT_BASE_ADDR_ENABLE_REG,
- 1 << memSpace);
- return true;
- }
-
- /* The base address must be aligned to the size. */
- if (baseAddress % size != 0) {
- return false;
- }
- if (size < 0x10000) {
- return false;
- }
-
- /* Align size and base to 64K */
- baseAddress &= 0xffff0000;
- size &= 0xffff0000;
- temp = size >> 16;
-
- /* Checking that the size is a sequence of '1' followed by a
- sequence of '0' starting from LSB to MSB. */
- while ((temp > 0) && (temp & 0x1)) {
- temp = temp >> 1;
- }
-
- if (temp != 0) {
- GT_REG_WRITE (MV64360_CUNIT_BASE_ADDR_REG0 + memSpace * 8,
- (baseAddress | memSpaceTarget | memSpaceAttr));
- GT_REG_WRITE ((MV64360_CUNIT_SIZE0 + memSpace * 8),
- (size - 1) & 0xffff0000);
- GT_RESET_REG_BITS (MV64360_CUNIT_BASE_ADDR_ENABLE_REG,
- 1 << memSpace);
- } else {
- /* An invalid size was specified */
- return false;
- }
- return true;
-}
diff --git a/board/Marvell/db64360/mpsc.h b/board/Marvell/db64360/mpsc.h
deleted file mode 100644
index f95f8c0f47..0000000000
--- a/board/Marvell/db64360/mpsc.h
+++ /dev/null
@@ -1,156 +0,0 @@
-/*
- * (C) Copyright 2001
- * John Clemens <clemens@mclx.com>, Mission Critical Linux, Inc.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*************************************************************************
- * changes for Marvell DB64360 eval board 2003 by Ingo Assmus <ingo.assmus@keymile.com>
- *
- ************************************************************************/
-
-
-/*
- * mpsc.h - header file for MPSC in uart mode (console driver)
- */
-
-#ifndef __MPSC_H__
-#define __MPSC_H__
-
-/* include actual Galileo defines */
-#include "../include/mv_gen_reg.h"
-
-/* driver related defines */
-
-int mpsc_init(int baud);
-void mpsc_sdma_init(void);
-void mpsc_init2(void);
-int galbrg_set_baudrate(int channel, int rate);
-
-int mpsc_putchar_early(char ch);
-char mpsc_getchar_debug(void);
-int mpsc_test_char_debug(void);
-
-int mpsc_test_char_sdma(void);
-
-extern int (*mpsc_putchar)(char ch);
-extern char (*mpsc_getchar)(void);
-extern int (*mpsc_test_char)(void);
-
-#define CHANNEL CONFIG_MPSC_PORT
-
-#define TX_DESC 5
-#define RX_DESC 20
-
-#define DESC_FIRST 0x00010000
-#define DESC_LAST 0x00020000
-#define DESC_OWNER_BIT 0x80000000
-
-#define TX_DEMAND 0x00800000
-#define TX_STOP 0x00010000
-#define RX_ENABLE 0x00000080
-
-#define SDMA_RX_ABORT (1 << 15)
-#define SDMA_TX_ABORT (1 << 31)
-#define MPSC_TX_ABORT (1 << 7)
-#define MPSC_RX_ABORT (1 << 23)
-#define MPSC_ENTER_HUNT (1 << 31)
-
-/* MPSC defines */
-
-#define GALMPSC_CONNECT 0x1
-#define GALMPSC_DISCONNECT 0x0
-
-#define GALMPSC_UART 0x1
-
-#define GALMPSC_STOP_BITS_1 0x0
-#define GALMPSC_STOP_BITS_2 0x1
-#define GALMPSC_CHAR_LENGTH_8 0x3
-#define GALMPSC_CHAR_LENGTH_7 0x2
-
-#define GALMPSC_PARITY_ODD 0x0
-#define GALMPSC_PARITY_EVEN 0x2
-#define GALMPSC_PARITY_MARK 0x3
-#define GALMPSC_PARITY_SPACE 0x1
-#define GALMPSC_PARITY_NONE -1
-
-#define GALMPSC_SERIAL_MULTIPLEX SERIAL_PORT_MULTIPLEX /* 0xf010 */
-#define GALMPSC_ROUTING_REGISTER MAIN_ROUTING_REGISTER /* 0xb400 */
-#define GALMPSC_RxC_ROUTE RECEIVE_CLOCK_ROUTING_REGISTER /* 0xb404 */
-#define GALMPSC_TxC_ROUTE TRANSMIT_CLOCK_ROUTING_REGISTER /* 0xb408 */
-#define GALMPSC_MCONF_LOW MPSC0_MAIN_CONFIGURATION_LOW /* 0x8000 */
-#define GALMPSC_MCONF_HIGH MPSC0_MAIN_CONFIGURATION_HIGH /* 0x8004 */
-#define GALMPSC_PROTOCONF_REG MPSC0_PROTOCOL_CONFIGURATION /* 0x8008 */
-
-#define GALMPSC_REG_GAP 0x1000
-
-#define GALMPSC_MCONF_CHREG_BASE CHANNEL0_REGISTER1 /* 0x800c */
-#define GALMPSC_CHANNELREG_1 CHANNEL0_REGISTER1 /* 0x800c */
-#define GALMPSC_CHANNELREG_2 CHANNEL0_REGISTER2 /* 0x8010 */
-#define GALMPSC_CHANNELREG_3 CHANNEL0_REGISTER3 /* 0x8014 */
-#define GALMPSC_CHANNELREG_4 CHANNEL0_REGISTER4 /* 0x8018 */
-#define GALMPSC_CHANNELREG_5 CHANNEL0_REGISTER5 /* 0x801c */
-#define GALMPSC_CHANNELREG_6 CHANNEL0_REGISTER6 /* 0x8020 */
-#define GALMPSC_CHANNELREG_7 CHANNEL0_REGISTER7 /* 0x8024 */
-#define GALMPSC_CHANNELREG_8 CHANNEL0_REGISTER8 /* 0x8028 */
-#define GALMPSC_CHANNELREG_9 CHANNEL0_REGISTER9 /* 0x802c */
-#define GALMPSC_CHANNELREG_10 CHANNEL0_REGISTER10 /* 0x8030 */
-#define GALMPSC_CHANNELREG_11 CHANNEL0_REGISTER11 /* 0x8034 */
-
-#define GALSDMA_COMMAND_FIRST (1 << 16)
-#define GALSDMA_COMMAND_LAST (1 << 17)
-#define GALSDMA_COMMAND_ENABLEINT (1 << 23)
-#define GALSDMA_COMMAND_AUTO (1 << 30)
-#define GALSDMA_COMMAND_OWNER (1 << 31)
-
-#define GALSDMA_RX 0
-#define GALSDMA_TX 1
-
-/* CHANNEL2 should be CHANNEL1, according to documentation,
- * but to work with the current GTREGS file...
- */
-#define GALSDMA_0_CONF_REG CHANNEL0_CONFIGURATION_REGISTER /* 0x4000 */
-#define GALSDMA_1_CONF_REG CHANNEL2_CONFIGURATION_REGISTER /* 0x6000 */
-#define GALSDMA_0_COM_REG CHANNEL0_COMMAND_REGISTER /* 0x4008 */
-#define GALSDMA_1_COM_REG CHANNEL2_COMMAND_REGISTER /* 0x6008 */
-#define GALSDMA_0_CUR_RX_PTR CHANNEL0_CURRENT_RX_DESCRIPTOR_POINTER /* 0x4810 */
-#define GALSDMA_0_CUR_TX_PTR CHANNEL0_CURRENT_TX_DESCRIPTOR_POINTER /* 0x4c10 */
-#define GALSDMA_0_FIR_TX_PTR CHANNEL0_FIRST_TX_DESCRIPTOR_POINTER /* 0x4c14 */
-#define GALSDMA_1_CUR_RX_PTR CHANNEL2_CURRENT_RX_DESCRIPTOR_POINTER /* 0x6810 */
-#define GALSDMA_1_CUR_TX_PTR CHANNEL2_CURRENT_TX_DESCRIPTOR_POINTER /* 0x6c10 */
-#define GALSDMA_1_FIR_TX_PTR CHANNEL2_FIRST_TX_DESCRIPTOR_POINTER /* 0x6c14 */
-#define GALSDMA_REG_DIFF 0x2000
-
-/* WRONG in gt64260R.h */
-#define GALSDMA_INT_CAUSE 0xb800 /* SDMA_CAUSE */
-#define GALSDMA_INT_MASK 0xb880 /* SDMA_MASK */
-#define GALMPSC_0_INT_CAUSE 0xb804
-#define GALMPSC_0_INT_MASK 0xb884
-
-#define GALSDMA_MODE_UART 0
-#define GALSDMA_MODE_BISYNC 1
-#define GALSDMA_MODE_HDLC 2
-#define GALSDMA_MODE_TRANSPARENT 3
-
-#define GALBRG_0_CONFREG BRG0_CONFIGURATION_REGISTER /* 0xb200 */
-#define GALBRG_REG_GAP 0x0008
-#define GALBRG_0_BTREG BRG0_BAUDE_TUNING_REGISTER /* 0xb204 */
-
-#endif /* __MPSC_H__ */
diff --git a/board/Marvell/db64360/mv_eth.c b/board/Marvell/db64360/mv_eth.c
deleted file mode 100644
index 3c5dee73b7..0000000000
--- a/board/Marvell/db64360/mv_eth.c
+++ /dev/null
@@ -1,3183 +0,0 @@
-/*
- * (C) Copyright 2003
- * Ingo Assmus <ingo.assmus@keymile.com>
- *
- * based on - Driver for MV64360X ethernet ports
- * Copyright (C) 2002 rabeeh@galileo.co.il
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * mv_eth.c - header file for the polled mode GT ethernet driver
- */
-#include <common.h>
-#include <net.h>
-#include <malloc.h>
-
-#include "mv_eth.h"
-
-/* enable Debug outputs */
-
-#undef DEBUG_MV_ETH
-
-#ifdef DEBUG_MV_ETH
-#define DEBUG
-#define DP(x) x
-#else
-#define DP(x)
-#endif
-
-#undef MV64360_CHECKSUM_OFFLOAD
-/*************************************************************************
-**************************************************************************
-**************************************************************************
-* The first part is the high level driver of the gigE ethernet ports. *
-**************************************************************************
-**************************************************************************
-*************************************************************************/
-
-/* Definition for configuring driver */
-/* #define UPDATE_STATS_BY_SOFTWARE */
-#undef MV64360_RX_QUEUE_FILL_ON_TASK
-
-
-/* Constants */
-#define MAGIC_ETH_RUNNING 8031971
-#define MV64360_INTERNAL_SRAM_SIZE _256K
-#define EXTRA_BYTES 32
-#define WRAP ETH_HLEN + 2 + 4 + 16
-#define BUFFER_MTU dev->mtu + WRAP
-#define INT_CAUSE_UNMASK_ALL 0x0007ffff
-#define INT_CAUSE_UNMASK_ALL_EXT 0x0011ffff
-#ifdef MV64360_RX_FILL_ON_TASK
-#define INT_CAUSE_MASK_ALL 0x00000000
-#define INT_CAUSE_CHECK_BITS INT_CAUSE_UNMASK_ALL
-#define INT_CAUSE_CHECK_BITS_EXT INT_CAUSE_UNMASK_ALL_EXT
-#endif
-
-/* Read/Write to/from MV64360 internal registers */
-#define MV_REG_READ(offset) my_le32_to_cpu(* (volatile unsigned int *) (INTERNAL_REG_BASE_ADDR + offset))
-#define MV_REG_WRITE(offset,data) *(volatile unsigned int *) (INTERNAL_REG_BASE_ADDR + offset) = my_cpu_to_le32 (data)
-#define MV_SET_REG_BITS(regOffset,bits) ((*((volatile unsigned int*)((INTERNAL_REG_BASE_ADDR) + (regOffset)))) |= ((unsigned int)my_cpu_to_le32(bits)))
-#define MV_RESET_REG_BITS(regOffset,bits) ((*((volatile unsigned int*)((INTERNAL_REG_BASE_ADDR) + (regOffset)))) &= ~((unsigned int)my_cpu_to_le32(bits)))
-
-/* Static function declarations */
-static int mv64360_eth_real_open (struct eth_device *eth);
-static int mv64360_eth_real_stop (struct eth_device *eth);
-static struct net_device_stats *mv64360_eth_get_stats (struct eth_device
- *dev);
-static void eth_port_init_mac_tables (ETH_PORT eth_port_num);
-static void mv64360_eth_update_stat (struct eth_device *dev);
-bool db64360_eth_start (struct eth_device *eth);
-unsigned int eth_read_mib_counter (ETH_PORT eth_port_num,
- unsigned int mib_offset);
-int mv64360_eth_receive (struct eth_device *dev);
-
-int mv64360_eth_xmit (struct eth_device *, volatile void *packet, int length);
-
-#ifndef UPDATE_STATS_BY_SOFTWARE
-static void mv64360_eth_print_stat (struct eth_device *dev);
-#endif
-/* Processes a received packet */
-extern void NetReceive (volatile uchar *, int);
-
-extern unsigned int INTERNAL_REG_BASE_ADDR;
-
-/*************************************************
- *Helper functions - used inside the driver only *
- *************************************************/
-#ifdef DEBUG_MV_ETH
-void print_globals (struct eth_device *dev)
-{
- printf ("Ethernet PRINT_Globals-Debug function\n");
- printf ("Base Address for ETH_PORT_INFO: %08x\n",
- (unsigned int) dev->priv);
- printf ("Base Address for mv64360_eth_priv: %08x\n",
- (unsigned int) &(((ETH_PORT_INFO *) dev->priv)->
- port_private));
-
- printf ("GT Internal Base Address: %08x\n",
- INTERNAL_REG_BASE_ADDR);
- printf ("Base Address for TX-DESCs: %08x Number of allocated Buffers %d\n", (unsigned int) ((ETH_PORT_INFO *) dev->priv)->p_tx_desc_area_base[0], MV64360_TX_QUEUE_SIZE);
- printf ("Base Address for RX-DESCs: %08x Number of allocated Buffers %d\n", (unsigned int) ((ETH_PORT_INFO *) dev->priv)->p_rx_desc_area_base[0], MV64360_RX_QUEUE_SIZE);
- printf ("Base Address for RX-Buffer: %08x allocated Bytes %d\n",
- (unsigned int) ((ETH_PORT_INFO *) dev->priv)->
- p_rx_buffer_base[0],
- (MV64360_RX_QUEUE_SIZE * MV64360_RX_BUFFER_SIZE) + 32);
- printf ("Base Address for TX-Buffer: %08x allocated Bytes %d\n",
- (unsigned int) ((ETH_PORT_INFO *) dev->priv)->
- p_tx_buffer_base[0],
- (MV64360_TX_QUEUE_SIZE * MV64360_TX_BUFFER_SIZE) + 32);
-}
-#endif
-
-#define my_cpu_to_le32(x) my_le32_to_cpu((x))
-
-unsigned long my_le32_to_cpu (unsigned long x)
-{
- return (((x & 0x000000ffU) << 24) |
- ((x & 0x0000ff00U) << 8) |
- ((x & 0x00ff0000U) >> 8) | ((x & 0xff000000U) >> 24));
-}
-
-
-/**********************************************************************
- * mv64360_eth_print_phy_status
- *
- * Prints gigabit ethenret phy status
- *
- * Input : pointer to ethernet interface network device structure
- * Output : N/A
- **********************************************************************/
-
-static void mv64360_eth_print_phy_status (struct eth_device *dev)
-{
- struct mv64360_eth_priv *port_private;
- unsigned int port_num;
- ETH_PORT_INFO *ethernet_private = (ETH_PORT_INFO *) dev->priv;
- unsigned int port_status, phy_reg_data;
-
- port_private =
- (struct mv64360_eth_priv *) ethernet_private->port_private;
- port_num = port_private->port_num;
-
- /* Check Link status on phy */
- eth_port_read_smi_reg (port_num, 1, &phy_reg_data);
- if (!(phy_reg_data & 0x20)) {
- printf ("Ethernet port changed link status to DOWN\n");
- } else {
- port_status =
- MV_REG_READ (MV64360_ETH_PORT_STATUS_REG (port_num));
- printf ("Ethernet status port %d: Link up", port_num);
- printf (", %s",
- (port_status & BIT2) ? "Full Duplex" : "Half Duplex");
- if (port_status & BIT4)
- printf (", Speed 1 Gbps");
- else
- printf (", %s",
- (port_status & BIT5) ? "Speed 100 Mbps" :
- "Speed 10 Mbps");
- printf ("\n");
- }
-}
-
-/**********************************************************************
- * u-boot entry functions for mv64360_eth
- *
- **********************************************************************/
-int db64360_eth_probe (struct eth_device *dev)
-{
- return ((int) db64360_eth_start (dev));
-}
-
-int db64360_eth_poll (struct eth_device *dev)
-{
- return mv64360_eth_receive (dev);
-}
-
-int db64360_eth_transmit (struct eth_device *dev, volatile void *packet,
- int length)
-{
- mv64360_eth_xmit (dev, packet, length);
- return 0;
-}
-
-void db64360_eth_disable (struct eth_device *dev)
-{
- mv64360_eth_stop (dev);
-}
-
-
-void mv6436x_eth_initialize (bd_t * bis)
-{
- struct eth_device *dev;
- ETH_PORT_INFO *ethernet_private;
- struct mv64360_eth_priv *port_private;
- int devnum, x, temp;
- char *s, *e, buf[64];
-
- for (devnum = 0; devnum < MV_ETH_DEVS; devnum++) {
- dev = calloc (sizeof (*dev), 1);
- if (!dev) {
- printf ("%s: mv_enet%d allocation failure, %s\n",
- __FUNCTION__, devnum, "eth_device structure");
- return;
- }
-
- /* must be less than NAMESIZE (16) */
- sprintf (dev->name, "mv_enet%d", devnum);
-
-#ifdef DEBUG
- printf ("Initializing %s\n", dev->name);
-#endif
-
- /* Extract the MAC address from the environment */
- switch (devnum) {
- case 0:
- s = "ethaddr";
- break;
-
- case 1:
- s = "eth1addr";
- break;
-
- case 2:
- s = "eth2addr";
- break;
-
- default: /* this should never happen */
- printf ("%s: Invalid device number %d\n",
- __FUNCTION__, devnum);
- return;
- }
-
- temp = getenv_r (s, buf, sizeof (buf));
- s = (temp > 0) ? buf : NULL;
-
-#ifdef DEBUG
- printf ("Setting MAC %d to %s\n", devnum, s);
-#endif
- for (x = 0; x < 6; ++x) {
- dev->enetaddr[x] = s ? simple_strtoul (s, &e, 16) : 0;
- if (s)
- s = (*e) ? e + 1 : e;
- }
- /* ronen - set the MAC addr in the HW */
- eth_port_uc_addr_set (devnum, dev->enetaddr, 0);
-
- dev->init = (void *) db64360_eth_probe;
- dev->halt = (void *) ethernet_phy_reset;
- dev->send = (void *) db64360_eth_transmit;
- dev->recv = (void *) db64360_eth_poll;
-
- ethernet_private = calloc (sizeof (*ethernet_private), 1);
- dev->priv = (void *) ethernet_private;
-
- if (!ethernet_private) {
- printf ("%s: %s allocation failure, %s\n",
- __FUNCTION__, dev->name,
- "Private Device Structure");
- free (dev);
- return;
- }
- /* start with an zeroed ETH_PORT_INFO */
- memset (ethernet_private, 0, sizeof (ETH_PORT_INFO));
- memcpy (ethernet_private->port_mac_addr, dev->enetaddr, 6);
-
- /* set pointer to memory for stats data structure etc... */
- port_private = calloc (sizeof (*ethernet_private), 1);
- ethernet_private->port_private = (void *)port_private;
- if (!port_private) {
- printf ("%s: %s allocation failure, %s\n",
- __FUNCTION__, dev->name,
- "Port Private Device Structure");
-
- free (ethernet_private);
- free (dev);
- return;
- }
-
- port_private->stats =
- calloc (sizeof (struct net_device_stats), 1);
- if (!port_private->stats) {
- printf ("%s: %s allocation failure, %s\n",
- __FUNCTION__, dev->name,
- "Net stat Structure");
-
- free (port_private);
- free (ethernet_private);
- free (dev);
- return;
- }
- memset (ethernet_private->port_private, 0,
- sizeof (struct mv64360_eth_priv));
- switch (devnum) {
- case 0:
- ethernet_private->port_num = ETH_0;
- break;
- case 1:
- ethernet_private->port_num = ETH_1;
- break;
- case 2:
- ethernet_private->port_num = ETH_2;
- break;
- default:
- printf ("Invalid device number %d\n", devnum);
- break;
- };
-
- port_private->port_num = devnum;
- /*
- * Read MIB counter on the GT in order to reset them,
- * then zero all the stats fields in memory
- */
- mv64360_eth_update_stat (dev);
- memset (port_private->stats, 0,
- sizeof (struct net_device_stats));
- /* Extract the MAC address from the environment */
- switch (devnum) {
- case 0:
- s = "ethaddr";
- break;
-
- case 1:
- s = "eth1addr";
- break;
-
- case 2:
- s = "eth2addr";
- break;
-
- default: /* this should never happen */
- printf ("%s: Invalid device number %d\n",
- __FUNCTION__, devnum);
- return;
- }
-
- temp = getenv_r (s, buf, sizeof (buf));
- s = (temp > 0) ? buf : NULL;
-
-#ifdef DEBUG
- printf ("Setting MAC %d to %s\n", devnum, s);
-#endif
- for (x = 0; x < 6; ++x) {
- dev->enetaddr[x] = s ? simple_strtoul (s, &e, 16) : 0;
- if (s)
- s = (*e) ? e + 1 : e;
- }
-
- DP (printf ("Allocating descriptor and buffer rings\n"));
-
- ethernet_private->p_rx_desc_area_base[0] =
- (ETH_RX_DESC *) memalign (16,
- RX_DESC_ALIGNED_SIZE *
- MV64360_RX_QUEUE_SIZE + 1);
- ethernet_private->p_tx_desc_area_base[0] =
- (ETH_TX_DESC *) memalign (16,
- TX_DESC_ALIGNED_SIZE *
- MV64360_TX_QUEUE_SIZE + 1);
-
- ethernet_private->p_rx_buffer_base[0] =
- (char *) memalign (16,
- MV64360_RX_QUEUE_SIZE *
- MV64360_TX_BUFFER_SIZE + 1);
- ethernet_private->p_tx_buffer_base[0] =
- (char *) memalign (16,
- MV64360_RX_QUEUE_SIZE *
- MV64360_TX_BUFFER_SIZE + 1);
-
-#ifdef DEBUG_MV_ETH
- /* DEBUG OUTPUT prints adresses of globals */
- print_globals (dev);
-#endif
- eth_register (dev);
-
- }
- DP (printf ("%s: exit\n", __FUNCTION__));
-
-}
-
-/**********************************************************************
- * mv64360_eth_open
- *
- * This function is called when openning the network device. The function
- * should initialize all the hardware, initialize cyclic Rx/Tx
- * descriptors chain and buffers and allocate an IRQ to the network
- * device.
- *
- * Input : a pointer to the network device structure
- * / / ronen - changed the output to match net/eth.c needs
- * Output : nonzero of success , zero if fails.
- * under construction
- **********************************************************************/
-
-int mv64360_eth_open (struct eth_device *dev)
-{
- return (mv64360_eth_real_open (dev));
-}
-
-/* Helper function for mv64360_eth_open */
-static int mv64360_eth_real_open (struct eth_device *dev)
-{
-
- unsigned int queue;
- ETH_PORT_INFO *ethernet_private;
- struct mv64360_eth_priv *port_private;
- unsigned int port_num;
- u32 port_status, phy_reg_data;
-
- ethernet_private = (ETH_PORT_INFO *) dev->priv;
- /* ronen - when we update the MAC env params we only update dev->enetaddr
- see ./net/eth.c eth_set_enetaddr() */
- memcpy (ethernet_private->port_mac_addr, dev->enetaddr, 6);
-
- port_private =
- (struct mv64360_eth_priv *) ethernet_private->port_private;
- port_num = port_private->port_num;
-
- /* Stop RX Queues */
- MV_REG_WRITE (MV64360_ETH_RECEIVE_QUEUE_COMMAND_REG (port_num),
- 0x0000ff00);
-
- /* Clear the ethernet port interrupts */
- MV_REG_WRITE (MV64360_ETH_INTERRUPT_CAUSE_REG (port_num), 0);
- MV_REG_WRITE (MV64360_ETH_INTERRUPT_CAUSE_EXTEND_REG (port_num), 0);
-
- /* Unmask RX buffer and TX end interrupt */
- MV_REG_WRITE (MV64360_ETH_INTERRUPT_MASK_REG (port_num),
- INT_CAUSE_UNMASK_ALL);
-
- /* Unmask phy and link status changes interrupts */
- MV_REG_WRITE (MV64360_ETH_INTERRUPT_EXTEND_MASK_REG (port_num),
- INT_CAUSE_UNMASK_ALL_EXT);
-
- /* Set phy address of the port */
- ethernet_private->port_phy_addr = 0x8 + port_num;
-
- /* Activate the DMA channels etc */
- eth_port_init (ethernet_private);
-
-
- /* "Allocate" setup TX rings */
-
- for (queue = 0; queue < MV64360_TX_QUEUE_NUM; queue++) {
- unsigned int size;
-
- port_private->tx_ring_size[queue] = MV64360_TX_QUEUE_SIZE;
- size = (port_private->tx_ring_size[queue] * TX_DESC_ALIGNED_SIZE); /*size = no of DESCs times DESC-size */
- ethernet_private->tx_desc_area_size[queue] = size;
-
- /* first clear desc area completely */
- memset ((void *) ethernet_private->p_tx_desc_area_base[queue],
- 0, ethernet_private->tx_desc_area_size[queue]);
-
- /* initialize tx desc ring with low level driver */
- if (ether_init_tx_desc_ring
- (ethernet_private, ETH_Q0,
- port_private->tx_ring_size[queue],
- MV64360_TX_BUFFER_SIZE /* Each Buffer is 1600 Byte */ ,
- (unsigned int) ethernet_private->
- p_tx_desc_area_base[queue],
- (unsigned int) ethernet_private->
- p_tx_buffer_base[queue]) == false)
- printf ("### Error initializing TX Ring\n");
- }
-
- /* "Allocate" setup RX rings */
- for (queue = 0; queue < MV64360_RX_QUEUE_NUM; queue++) {
- unsigned int size;
-
- /* Meantime RX Ring are fixed - but must be configurable by user */
- port_private->rx_ring_size[queue] = MV64360_RX_QUEUE_SIZE;
- size = (port_private->rx_ring_size[queue] *
- RX_DESC_ALIGNED_SIZE);
- ethernet_private->rx_desc_area_size[queue] = size;
-
- /* first clear desc area completely */
- memset ((void *) ethernet_private->p_rx_desc_area_base[queue],
- 0, ethernet_private->rx_desc_area_size[queue]);
- if ((ether_init_rx_desc_ring
- (ethernet_private, ETH_Q0,
- port_private->rx_ring_size[queue],
- MV64360_RX_BUFFER_SIZE /* Each Buffer is 1600 Byte */ ,
- (unsigned int) ethernet_private->
- p_rx_desc_area_base[queue],
- (unsigned int) ethernet_private->
- p_rx_buffer_base[queue])) == false)
- printf ("### Error initializing RX Ring\n");
- }
-
- eth_port_start (ethernet_private);
-
- /* Set maximum receive buffer to 9700 bytes */
- MV_REG_WRITE (MV64360_ETH_PORT_SERIAL_CONTROL_REG (port_num),
- (0x5 << 17) |
- (MV_REG_READ
- (MV64360_ETH_PORT_SERIAL_CONTROL_REG (port_num))
- & 0xfff1ffff));
-
- /*
- * Set ethernet MTU for leaky bucket mechanism to 0 - this will
- * disable the leaky bucket mechanism .
- */
-
- MV_REG_WRITE (MV64360_ETH_MAXIMUM_TRANSMIT_UNIT (port_num), 0);
- port_status = MV_REG_READ (MV64360_ETH_PORT_STATUS_REG (port_num));
-
- /* Check Link status on phy */
- eth_port_read_smi_reg (port_num, 1, &phy_reg_data);
- if (!(phy_reg_data & 0x20)) {
- /* Reset PHY */
- if ((ethernet_phy_reset (port_num)) != true) {
- printf ("$$ Warnning: No link on port %d \n",
- port_num);
- return 0;
- } else {
- eth_port_read_smi_reg (port_num, 1, &phy_reg_data);
- if (!(phy_reg_data & 0x20)) {
- printf ("### Error: Phy is not active\n");
- return 0;
- }
- }
- } else {
- mv64360_eth_print_phy_status (dev);
- }
- port_private->eth_running = MAGIC_ETH_RUNNING;
- return 1;
-}
-
-
-static int mv64360_eth_free_tx_rings (struct eth_device *dev)
-{
- unsigned int queue;
- ETH_PORT_INFO *ethernet_private;
- struct mv64360_eth_priv *port_private;
- unsigned int port_num;
- volatile ETH_TX_DESC *p_tx_curr_desc;
-
- ethernet_private = (ETH_PORT_INFO *) dev->priv;
- port_private =
- (struct mv64360_eth_priv *) ethernet_private->port_private;
- port_num = port_private->port_num;
-
- /* Stop Tx Queues */
- MV_REG_WRITE (MV64360_ETH_TRANSMIT_QUEUE_COMMAND_REG (port_num),
- 0x0000ff00);
-
- /* Free TX rings */
- DP (printf ("Clearing previously allocated TX queues... "));
- for (queue = 0; queue < MV64360_TX_QUEUE_NUM; queue++) {
- /* Free on TX rings */
- for (p_tx_curr_desc =
- ethernet_private->p_tx_desc_area_base[queue];
- ((unsigned int) p_tx_curr_desc <= (unsigned int)
- ethernet_private->p_tx_desc_area_base[queue] +
- ethernet_private->tx_desc_area_size[queue]);
- p_tx_curr_desc =
- (ETH_TX_DESC *) ((unsigned int) p_tx_curr_desc +
- TX_DESC_ALIGNED_SIZE)) {
- /* this is inside for loop */
- if (p_tx_curr_desc->return_info != 0) {
- p_tx_curr_desc->return_info = 0;
- DP (printf ("freed\n"));
- }
- }
- DP (printf ("Done\n"));
- }
- return 0;
-}
-
-static int mv64360_eth_free_rx_rings (struct eth_device *dev)
-{
- unsigned int queue;
- ETH_PORT_INFO *ethernet_private;
- struct mv64360_eth_priv *port_private;
- unsigned int port_num;
- volatile ETH_RX_DESC *p_rx_curr_desc;
-
- ethernet_private = (ETH_PORT_INFO *) dev->priv;
- port_private =
- (struct mv64360_eth_priv *) ethernet_private->port_private;
- port_num = port_private->port_num;
-
-
- /* Stop RX Queues */
- MV_REG_WRITE (MV64360_ETH_RECEIVE_QUEUE_COMMAND_REG (port_num),
- 0x0000ff00);
-
- /* Free RX rings */
- DP (printf ("Clearing previously allocated RX queues... "));
- for (queue = 0; queue < MV64360_RX_QUEUE_NUM; queue++) {
- /* Free preallocated skb's on RX rings */
- for (p_rx_curr_desc =
- ethernet_private->p_rx_desc_area_base[queue];
- (((unsigned int) p_rx_curr_desc <
- ((unsigned int) ethernet_private->
- p_rx_desc_area_base[queue] +
- ethernet_private->rx_desc_area_size[queue])));
- p_rx_curr_desc =
- (ETH_RX_DESC *) ((unsigned int) p_rx_curr_desc +
- RX_DESC_ALIGNED_SIZE)) {
- if (p_rx_curr_desc->return_info != 0) {
- p_rx_curr_desc->return_info = 0;
- DP (printf ("freed\n"));
- }
- }
- DP (printf ("Done\n"));
- }
- return 0;
-}
-
-/**********************************************************************
- * mv64360_eth_stop
- *
- * This function is used when closing the network device.
- * It updates the hardware,
- * release all memory that holds buffers and descriptors and release the IRQ.
- * Input : a pointer to the device structure
- * Output : zero if success , nonzero if fails
- *********************************************************************/
-
-int mv64360_eth_stop (struct eth_device *dev)
-{
- ETH_PORT_INFO *ethernet_private;
- struct mv64360_eth_priv *port_private;
- unsigned int port_num;
-
- ethernet_private = (ETH_PORT_INFO *) dev->priv;
- port_private =
- (struct mv64360_eth_priv *) ethernet_private->port_private;
- port_num = port_private->port_num;
-
- /* Disable all gigE address decoder */
- MV_REG_WRITE (MV64360_ETH_BASE_ADDR_ENABLE_REG, 0x3f);
- DP (printf ("%s Ethernet stop called ... \n", __FUNCTION__));
- mv64360_eth_real_stop (dev);
-
- return 0;
-};
-
-/* Helper function for mv64360_eth_stop */
-
-static int mv64360_eth_real_stop (struct eth_device *dev)
-{
- ETH_PORT_INFO *ethernet_private;
- struct mv64360_eth_priv *port_private;
- unsigned int port_num;
-
- ethernet_private = (ETH_PORT_INFO *) dev->priv;
- port_private =
- (struct mv64360_eth_priv *) ethernet_private->port_private;
- port_num = port_private->port_num;
-
-
- mv64360_eth_free_tx_rings (dev);
- mv64360_eth_free_rx_rings (dev);
-
- eth_port_reset (ethernet_private->port_num);
- /* Disable ethernet port interrupts */
- MV_REG_WRITE (MV64360_ETH_INTERRUPT_CAUSE_REG (port_num), 0);
- MV_REG_WRITE (MV64360_ETH_INTERRUPT_CAUSE_EXTEND_REG (port_num), 0);
- /* Mask RX buffer and TX end interrupt */
- MV_REG_WRITE (MV64360_ETH_INTERRUPT_MASK_REG (port_num), 0);
- /* Mask phy and link status changes interrupts */
- MV_REG_WRITE (MV64360_ETH_INTERRUPT_EXTEND_MASK_REG (port_num), 0);
- MV_RESET_REG_BITS (MV64360_CPU_INTERRUPT0_MASK_HIGH,
- BIT0 << port_num);
- /* Print Network statistics */
-#ifndef UPDATE_STATS_BY_SOFTWARE
- /*
- * Print statistics (only if ethernet is running),
- * then zero all the stats fields in memory
- */
- if (port_private->eth_running == MAGIC_ETH_RUNNING) {
- port_private->eth_running = 0;
- mv64360_eth_print_stat (dev);
- }
- memset (port_private->stats, 0, sizeof (struct net_device_stats));
-#endif
- DP (printf ("\nEthernet stopped ... \n"));
- return 0;
-}
-
-
-/**********************************************************************
- * mv64360_eth_start_xmit
- *
- * This function is queues a packet in the Tx descriptor for
- * required port.
- *
- * Input : skb - a pointer to socket buffer
- * dev - a pointer to the required port
- *
- * Output : zero upon success
- **********************************************************************/
-
-int mv64360_eth_xmit (struct eth_device *dev, volatile void *dataPtr,
- int dataSize)
-{
- ETH_PORT_INFO *ethernet_private;
- struct mv64360_eth_priv *port_private;
- unsigned int port_num;
- PKT_INFO pkt_info;
- ETH_FUNC_RET_STATUS status;
- struct net_device_stats *stats;
- ETH_FUNC_RET_STATUS release_result;
-
- ethernet_private = (ETH_PORT_INFO *) dev->priv;
- port_private =
- (struct mv64360_eth_priv *) ethernet_private->port_private;
- port_num = port_private->port_num;
-
- stats = port_private->stats;
-
- /* Update packet info data structure */
- pkt_info.cmd_sts = ETH_TX_FIRST_DESC | ETH_TX_LAST_DESC; /* DMA owned, first last */
- pkt_info.byte_cnt = dataSize;
- pkt_info.buf_ptr = (unsigned int) dataPtr;
-
- status = eth_port_send (ethernet_private, ETH_Q0, &pkt_info);
- if ((status == ETH_ERROR) || (status == ETH_QUEUE_FULL)) {
- printf ("Error on transmitting packet ..");
- if (status == ETH_QUEUE_FULL)
- printf ("ETH Queue is full. \n");
- if (status == ETH_QUEUE_LAST_RESOURCE)
- printf ("ETH Queue: using last available resource. \n");
- goto error;
- }
-
- /* Update statistics and start of transmittion time */
- stats->tx_bytes += dataSize;
- stats->tx_packets++;
-
- /* Check if packet(s) is(are) transmitted correctly (release everything) */
- do {
- release_result =
- eth_tx_return_desc (ethernet_private, ETH_Q0,
- &pkt_info);
- switch (release_result) {
- case ETH_OK:
- DP (printf ("descriptor released\n"));
- if (pkt_info.cmd_sts & BIT0) {
- printf ("Error in TX\n");
- stats->tx_errors++;
-
- }
- break;
- case ETH_RETRY:
- DP (printf ("transmission still in process\n"));
- break;
-
- case ETH_ERROR:
- printf ("routine can not access Tx desc ring\n");
- break;
-
- case ETH_END_OF_JOB:
- DP (printf ("the routine has nothing to release\n"));
- break;
- default: /* should not happen */
- break;
- }
- } while (release_result == ETH_OK);
-
-
- return 0; /* success */
- error:
- return 1; /* Failed - higher layers will free the skb */
-}
-
-/**********************************************************************
- * mv64360_eth_receive
- *
- * This function is forward packets that are received from the port's
- * queues toward kernel core or FastRoute them to another interface.
- *
- * Input : dev - a pointer to the required interface
- * max - maximum number to receive (0 means unlimted)
- *
- * Output : number of served packets
- **********************************************************************/
-
-int mv64360_eth_receive (struct eth_device *dev)
-{
- ETH_PORT_INFO *ethernet_private;
- struct mv64360_eth_priv *port_private;
- unsigned int port_num;
- PKT_INFO pkt_info;
- struct net_device_stats *stats;
-
-
- ethernet_private = (ETH_PORT_INFO *) dev->priv;
- port_private =
- (struct mv64360_eth_priv *) ethernet_private->port_private;
- port_num = port_private->port_num;
- stats = port_private->stats;
-
- while ((eth_port_receive (ethernet_private, ETH_Q0, &pkt_info) ==
- ETH_OK)) {
-
-#ifdef DEBUG_MV_ETH
- if (pkt_info.byte_cnt != 0) {
- printf ("%s: Received %d byte Packet @ 0x%x\n",
- __FUNCTION__, pkt_info.byte_cnt,
- pkt_info.buf_ptr);
- }
-#endif
- /* Update statistics. Note byte count includes 4 byte CRC count */
- stats->rx_packets++;
- stats->rx_bytes += pkt_info.byte_cnt;
-
- /*
- * In case received a packet without first / last bits on OR the error
- * summary bit is on, the packets needs to be dropeed.
- */
- if (((pkt_info.
- cmd_sts & (ETH_RX_FIRST_DESC | ETH_RX_LAST_DESC)) !=
- (ETH_RX_FIRST_DESC | ETH_RX_LAST_DESC))
- || (pkt_info.cmd_sts & ETH_ERROR_SUMMARY)) {
- stats->rx_dropped++;
-
- printf ("Received packet spread on multiple descriptors\n");
-
- /* Is this caused by an error ? */
- if (pkt_info.cmd_sts & ETH_ERROR_SUMMARY) {
- stats->rx_errors++;
- }
-
- /* free these descriptors again without forwarding them to the higher layers */
- pkt_info.buf_ptr &= ~0x7; /* realign buffer again */
- pkt_info.byte_cnt = 0x0000; /* Reset Byte count */
-
- if (eth_rx_return_buff
- (ethernet_private, ETH_Q0, &pkt_info) != ETH_OK) {
- printf ("Error while returning the RX Desc to Ring\n");
- } else {
- DP (printf ("RX Desc returned to Ring\n"));
- }
- /* /free these descriptors again */
- } else {
-
-/* !!! call higher layer processing */
-#ifdef DEBUG_MV_ETH
- printf ("\nNow send it to upper layer protocols (NetReceive) ...\n");
-#endif
- /* let the upper layer handle the packet */
- NetReceive ((uchar *) pkt_info.buf_ptr,
- (int) pkt_info.byte_cnt);
-
-/* **************************************************************** */
-/* free descriptor */
- pkt_info.buf_ptr &= ~0x7; /* realign buffer again */
- pkt_info.byte_cnt = 0x0000; /* Reset Byte count */
- DP (printf
- ("RX: pkt_info.buf_ptr = %x\n",
- pkt_info.buf_ptr));
- if (eth_rx_return_buff
- (ethernet_private, ETH_Q0, &pkt_info) != ETH_OK) {
- printf ("Error while returning the RX Desc to Ring\n");
- } else {
- DP (printf ("RX Desc returned to Ring\n"));
- }
-
-/* **************************************************************** */
-
- }
- }
- mv64360_eth_get_stats (dev); /* update statistics */
- return 1;
-}
-
-/**********************************************************************
- * mv64360_eth_get_stats
- *
- * Returns a pointer to the interface statistics.
- *
- * Input : dev - a pointer to the required interface
- *
- * Output : a pointer to the interface's statistics
- **********************************************************************/
-
-static struct net_device_stats *mv64360_eth_get_stats (struct eth_device *dev)
-{
- ETH_PORT_INFO *ethernet_private;
- struct mv64360_eth_priv *port_private;
- unsigned int port_num;
-
- ethernet_private = (ETH_PORT_INFO *) dev->priv;
- port_private =
- (struct mv64360_eth_priv *) ethernet_private->port_private;
- port_num = port_private->port_num;
-
- mv64360_eth_update_stat (dev);
-
- return port_private->stats;
-}
-
-
-/**********************************************************************
- * mv64360_eth_update_stat
- *
- * Update the statistics structure in the private data structure
- *
- * Input : pointer to ethernet interface network device structure
- * Output : N/A
- **********************************************************************/
-
-static void mv64360_eth_update_stat (struct eth_device *dev)
-{
- ETH_PORT_INFO *ethernet_private;
- struct mv64360_eth_priv *port_private;
- struct net_device_stats *stats;
- unsigned int port_num;
- volatile unsigned int dummy;
-
- ethernet_private = (ETH_PORT_INFO *) dev->priv;
- port_private =
- (struct mv64360_eth_priv *) ethernet_private->port_private;
- port_num = port_private->port_num;
- stats = port_private->stats;
-
- /* These are false updates */
- stats->rx_packets += (unsigned long)
- eth_read_mib_counter (ethernet_private->port_num,
- ETH_MIB_GOOD_FRAMES_RECEIVED);
- stats->tx_packets += (unsigned long)
- eth_read_mib_counter (ethernet_private->port_num,
- ETH_MIB_GOOD_FRAMES_SENT);
- stats->rx_bytes += (unsigned long)
- eth_read_mib_counter (ethernet_private->port_num,
- ETH_MIB_GOOD_OCTETS_RECEIVED_LOW);
- /*
- * Ideally this should be as follows -
- *
- * stats->rx_bytes += stats->rx_bytes +
- * ((unsigned long) ethReadMibCounter (ethernet_private->port_num ,
- * ETH_MIB_GOOD_OCTETS_RECEIVED_HIGH) << 32);
- *
- * But the unsigned long in PowerPC and MIPS are 32bit. So the next read
- * is just a dummy read for proper work of the GigE port
- */
- dummy = eth_read_mib_counter (ethernet_private->port_num,
- ETH_MIB_GOOD_OCTETS_RECEIVED_HIGH);
- stats->tx_bytes += (unsigned long)
- eth_read_mib_counter (ethernet_private->port_num,
- ETH_MIB_GOOD_OCTETS_SENT_LOW);
- dummy = eth_read_mib_counter (ethernet_private->port_num,
- ETH_MIB_GOOD_OCTETS_SENT_HIGH);
- stats->rx_errors += (unsigned long)
- eth_read_mib_counter (ethernet_private->port_num,
- ETH_MIB_MAC_RECEIVE_ERROR);
-
- /* Rx dropped is for received packet with CRC error */
- stats->rx_dropped +=
- (unsigned long) eth_read_mib_counter (ethernet_private->
- port_num,
- ETH_MIB_BAD_CRC_EVENT);
- stats->multicast += (unsigned long)
- eth_read_mib_counter (ethernet_private->port_num,
- ETH_MIB_MULTICAST_FRAMES_RECEIVED);
- stats->collisions +=
- (unsigned long) eth_read_mib_counter (ethernet_private->
- port_num,
- ETH_MIB_COLLISION) +
- (unsigned long) eth_read_mib_counter (ethernet_private->
- port_num,
- ETH_MIB_LATE_COLLISION);
- /* detailed rx errors */
- stats->rx_length_errors +=
- (unsigned long) eth_read_mib_counter (ethernet_private->
- port_num,
- ETH_MIB_UNDERSIZE_RECEIVED)
- +
- (unsigned long) eth_read_mib_counter (ethernet_private->
- port_num,
- ETH_MIB_OVERSIZE_RECEIVED);
- /* detailed tx errors */
-}
-
-#ifndef UPDATE_STATS_BY_SOFTWARE
-/**********************************************************************
- * mv64360_eth_print_stat
- *
- * Update the statistics structure in the private data structure
- *
- * Input : pointer to ethernet interface network device structure
- * Output : N/A
- **********************************************************************/
-
-static void mv64360_eth_print_stat (struct eth_device *dev)
-{
- ETH_PORT_INFO *ethernet_private;
- struct mv64360_eth_priv *port_private;
- struct net_device_stats *stats;
- unsigned int port_num;
-
- ethernet_private = (ETH_PORT_INFO *) dev->priv;
- port_private =
- (struct mv64360_eth_priv *) ethernet_private->port_private;
- port_num = port_private->port_num;
- stats = port_private->stats;
-
- /* These are false updates */
- printf ("\n### Network statistics: ###\n");
- printf ("--------------------------\n");
- printf (" Packets received: %ld\n", stats->rx_packets);
- printf (" Packets send: %ld\n", stats->tx_packets);
- printf (" Received bytes: %ld\n", stats->rx_bytes);
- printf (" Send bytes: %ld\n", stats->tx_bytes);
- if (stats->rx_errors != 0)
- printf (" Rx Errors: %ld\n",
- stats->rx_errors);
- if (stats->rx_dropped != 0)
- printf (" Rx dropped (CRC Errors): %ld\n",
- stats->rx_dropped);
- if (stats->multicast != 0)
- printf (" Rx mulicast frames: %ld\n",
- stats->multicast);
- if (stats->collisions != 0)
- printf (" No. of collisions: %ld\n",
- stats->collisions);
- if (stats->rx_length_errors != 0)
- printf (" Rx length errors: %ld\n",
- stats->rx_length_errors);
-}
-#endif
-
-/**************************************************************************
- *network_start - Network Kick Off Routine UBoot
- *Inputs :
- *Outputs :
- **************************************************************************/
-
-bool db64360_eth_start (struct eth_device *dev)
-{
- return (mv64360_eth_open (dev)); /* calls real open */
-}
-
-/*************************************************************************
-**************************************************************************
-**************************************************************************
-* The second part is the low level driver of the gigE ethernet ports. *
-**************************************************************************
-**************************************************************************
-*************************************************************************/
-/*
- * based on Linux code
- * arch/ppc/galileo/EVB64360/mv64360_eth.c - Driver for MV64360X ethernet ports
- * Copyright (C) 2002 rabeeh@galileo.co.il
-
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version 2
- * of the License, or (at your option) any later version.
-
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
-
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
- *
- */
-
-/********************************************************************************
- * Marvell's Gigabit Ethernet controller low level driver
- *
- * DESCRIPTION:
- * This file introduce low level API to Marvell's Gigabit Ethernet
- * controller. This Gigabit Ethernet Controller driver API controls
- * 1) Operations (i.e. port init, start, reset etc').
- * 2) Data flow (i.e. port send, receive etc').
- * Each Gigabit Ethernet port is controlled via ETH_PORT_INFO
- * struct.
- * This struct includes user configuration information as well as
- * driver internal data needed for its operations.
- *
- * Supported Features:
- * - This low level driver is OS independent. Allocating memory for
- * the descriptor rings and buffers are not within the scope of
- * this driver.
- * - The user is free from Rx/Tx queue managing.
- * - This low level driver introduce functionality API that enable
- * the to operate Marvell's Gigabit Ethernet Controller in a
- * convenient way.
- * - Simple Gigabit Ethernet port operation API.
- * - Simple Gigabit Ethernet port data flow API.
- * - Data flow and operation API support per queue functionality.
- * - Support cached descriptors for better performance.
- * - Enable access to all four DRAM banks and internal SRAM memory
- * spaces.
- * - PHY access and control API.
- * - Port control register configuration API.
- * - Full control over Unicast and Multicast MAC configurations.
- *
- * Operation flow:
- *
- * Initialization phase
- * This phase complete the initialization of the ETH_PORT_INFO
- * struct.
- * User information regarding port configuration has to be set
- * prior to calling the port initialization routine. For example,
- * the user has to assign the port_phy_addr field which is board
- * depended parameter.
- * In this phase any port Tx/Rx activity is halted, MIB counters
- * are cleared, PHY address is set according to user parameter and
- * access to DRAM and internal SRAM memory spaces.
- *
- * Driver ring initialization
- * Allocating memory for the descriptor rings and buffers is not
- * within the scope of this driver. Thus, the user is required to
- * allocate memory for the descriptors ring and buffers. Those
- * memory parameters are used by the Rx and Tx ring initialization
- * routines in order to curve the descriptor linked list in a form
- * of a ring.
- * Note: Pay special attention to alignment issues when using
- * cached descriptors/buffers. In this phase the driver store
- * information in the ETH_PORT_INFO struct regarding each queue
- * ring.
- *
- * Driver start
- * This phase prepares the Ethernet port for Rx and Tx activity.
- * It uses the information stored in the ETH_PORT_INFO struct to
- * initialize the various port registers.
- *
- * Data flow:
- * All packet references to/from the driver are done using PKT_INFO
- * struct.
- * This struct is a unified struct used with Rx and Tx operations.
- * This way the user is not required to be familiar with neither
- * Tx nor Rx descriptors structures.
- * The driver's descriptors rings are management by indexes.
- * Those indexes controls the ring resources and used to indicate
- * a SW resource error:
- * 'current'
- * This index points to the current available resource for use. For
- * example in Rx process this index will point to the descriptor
- * that will be passed to the user upon calling the receive routine.
- * In Tx process, this index will point to the descriptor
- * that will be assigned with the user packet info and transmitted.
- * 'used'
- * This index points to the descriptor that need to restore its
- * resources. For example in Rx process, using the Rx buffer return
- * API will attach the buffer returned in packet info to the
- * descriptor pointed by 'used'. In Tx process, using the Tx
- * descriptor return will merely return the user packet info with
- * the command status of the transmitted buffer pointed by the
- * 'used' index. Nevertheless, it is essential to use this routine
- * to update the 'used' index.
- * 'first'
- * This index supports Tx Scatter-Gather. It points to the first
- * descriptor of a packet assembled of multiple buffers. For example
- * when in middle of Such packet we have a Tx resource error the
- * 'curr' index get the value of 'first' to indicate that the ring
- * returned to its state before trying to transmit this packet.
- *
- * Receive operation:
- * The eth_port_receive API set the packet information struct,
- * passed by the caller, with received information from the
- * 'current' SDMA descriptor.
- * It is the user responsibility to return this resource back
- * to the Rx descriptor ring to enable the reuse of this source.
- * Return Rx resource is done using the eth_rx_return_buff API.
- *
- * Transmit operation:
- * The eth_port_send API supports Scatter-Gather which enables to
- * send a packet spanned over multiple buffers. This means that
- * for each packet info structure given by the user and put into
- * the Tx descriptors ring, will be transmitted only if the 'LAST'
- * bit will be set in the packet info command status field. This
- * API also consider restriction regarding buffer alignments and
- * sizes.
- * The user must return a Tx resource after ensuring the buffer
- * has been transmitted to enable the Tx ring indexes to update.
- *
- * BOARD LAYOUT
- * This device is on-board. No jumper diagram is necessary.
- *
- * EXTERNAL INTERFACE
- *
- * Prior to calling the initialization routine eth_port_init() the user
- * must set the following fields under ETH_PORT_INFO struct:
- * port_num User Ethernet port number.
- * port_phy_addr User PHY address of Ethernet port.
- * port_mac_addr[6] User defined port MAC address.
- * port_config User port configuration value.
- * port_config_extend User port config extend value.
- * port_sdma_config User port SDMA config value.
- * port_serial_control User port serial control value.
- * *port_virt_to_phys () User function to cast virtual addr to CPU bus addr.
- * *port_private User scratch pad for user specific data structures.
- *
- * This driver introduce a set of default values:
- * PORT_CONFIG_VALUE Default port configuration value
- * PORT_CONFIG_EXTEND_VALUE Default port extend configuration value
- * PORT_SDMA_CONFIG_VALUE Default sdma control value
- * PORT_SERIAL_CONTROL_VALUE Default port serial control value
- *
- * This driver data flow is done using the PKT_INFO struct which is
- * a unified struct for Rx and Tx operations:
- * byte_cnt Tx/Rx descriptor buffer byte count.
- * l4i_chk CPU provided TCP Checksum. For Tx operation only.
- * cmd_sts Tx/Rx descriptor command status.
- * buf_ptr Tx/Rx descriptor buffer pointer.
- * return_info Tx/Rx user resource return information.
- *
- *
- * EXTERNAL SUPPORT REQUIREMENTS
- *
- * This driver requires the following external support:
- *
- * D_CACHE_FLUSH_LINE (address, address offset)
- *
- * This macro applies assembly code to flush and invalidate cache
- * line.
- * address - address base.
- * address offset - address offset
- *
- *
- * CPU_PIPE_FLUSH
- *
- * This macro applies assembly code to flush the CPU pipeline.
- *
- *******************************************************************************/
-/* includes */
-
-/* defines */
-/* SDMA command macros */
-#define ETH_ENABLE_TX_QUEUE(tx_queue, eth_port) \
- MV_REG_WRITE(MV64360_ETH_TRANSMIT_QUEUE_COMMAND_REG(eth_port), (1 << tx_queue))
-
-#define ETH_DISABLE_TX_QUEUE(tx_queue, eth_port) \
- MV_REG_WRITE(MV64360_ETH_TRANSMIT_QUEUE_COMMAND_REG(eth_port),\
- (1 << (8 + tx_queue)))
-
-#define ETH_ENABLE_RX_QUEUE(rx_queue, eth_port) \
-MV_REG_WRITE(MV64360_ETH_RECEIVE_QUEUE_COMMAND_REG(eth_port), (1 << rx_queue))
-
-#define ETH_DISABLE_RX_QUEUE(rx_queue, eth_port) \
-MV_REG_WRITE(MV64360_ETH_RECEIVE_QUEUE_COMMAND_REG(eth_port), (1 << (8 + rx_queue)))
-
-#define CURR_RFD_GET(p_curr_desc, queue) \
- ((p_curr_desc) = p_eth_port_ctrl->p_rx_curr_desc_q[queue])
-
-#define CURR_RFD_SET(p_curr_desc, queue) \
- (p_eth_port_ctrl->p_rx_curr_desc_q[queue] = (p_curr_desc))
-
-#define USED_RFD_GET(p_used_desc, queue) \
- ((p_used_desc) = p_eth_port_ctrl->p_rx_used_desc_q[queue])
-
-#define USED_RFD_SET(p_used_desc, queue)\
-(p_eth_port_ctrl->p_rx_used_desc_q[queue] = (p_used_desc))
-
-
-#define CURR_TFD_GET(p_curr_desc, queue) \
- ((p_curr_desc) = p_eth_port_ctrl->p_tx_curr_desc_q[queue])
-
-#define CURR_TFD_SET(p_curr_desc, queue) \
- (p_eth_port_ctrl->p_tx_curr_desc_q[queue] = (p_curr_desc))
-
-#define USED_TFD_GET(p_used_desc, queue) \
- ((p_used_desc) = p_eth_port_ctrl->p_tx_used_desc_q[queue])
-
-#define USED_TFD_SET(p_used_desc, queue) \
- (p_eth_port_ctrl->p_tx_used_desc_q[queue] = (p_used_desc))
-
-#define FIRST_TFD_GET(p_first_desc, queue) \
- ((p_first_desc) = p_eth_port_ctrl->p_tx_first_desc_q[queue])
-
-#define FIRST_TFD_SET(p_first_desc, queue) \
- (p_eth_port_ctrl->p_tx_first_desc_q[queue] = (p_first_desc))
-
-
-/* Macros that save access to desc in order to find next desc pointer */
-#define RX_NEXT_DESC_PTR(p_rx_desc, queue) (ETH_RX_DESC*)(((((unsigned int)p_rx_desc - (unsigned int)p_eth_port_ctrl->p_rx_desc_area_base[queue]) + RX_DESC_ALIGNED_SIZE) % p_eth_port_ctrl->rx_desc_area_size[queue]) + (unsigned int)p_eth_port_ctrl->p_rx_desc_area_base[queue])
-
-#define TX_NEXT_DESC_PTR(p_tx_desc, queue) (ETH_TX_DESC*)(((((unsigned int)p_tx_desc - (unsigned int)p_eth_port_ctrl->p_tx_desc_area_base[queue]) + TX_DESC_ALIGNED_SIZE) % p_eth_port_ctrl->tx_desc_area_size[queue]) + (unsigned int)p_eth_port_ctrl->p_tx_desc_area_base[queue])
-
-#define LINK_UP_TIMEOUT 100000
-#define PHY_BUSY_TIMEOUT 10000000
-
-/* locals */
-
-/* PHY routines */
-static void ethernet_phy_set (ETH_PORT eth_port_num, int phy_addr);
-static int ethernet_phy_get (ETH_PORT eth_port_num);
-
-/* Ethernet Port routines */
-static void eth_set_access_control (ETH_PORT eth_port_num,
- ETH_WIN_PARAM * param);
-static bool eth_port_uc_addr (ETH_PORT eth_port_num, unsigned char uc_nibble,
- ETH_QUEUE queue, int option);
-#if 0 /* FIXME */
-static bool eth_port_smc_addr (ETH_PORT eth_port_num,
- unsigned char mc_byte,
- ETH_QUEUE queue, int option);
-static bool eth_port_omc_addr (ETH_PORT eth_port_num,
- unsigned char crc8,
- ETH_QUEUE queue, int option);
-#endif
-
-static void eth_b_copy (unsigned int src_addr, unsigned int dst_addr,
- int byte_count);
-
-void eth_dbg (ETH_PORT_INFO * p_eth_port_ctrl);
-
-
-typedef enum _memory_bank { BANK0, BANK1, BANK2, BANK3 } MEMORY_BANK;
-u32 mv_get_dram_bank_base_addr (MEMORY_BANK bank)
-{
- u32 result = 0;
- u32 enable = MV_REG_READ (MV64360_BASE_ADDR_ENABLE);
-
- if (enable & (1 << bank))
- return 0;
- if (bank == BANK0)
- result = MV_REG_READ (MV64360_CS_0_BASE_ADDR);
- if (bank == BANK1)
- result = MV_REG_READ (MV64360_CS_1_BASE_ADDR);
- if (bank == BANK2)
- result = MV_REG_READ (MV64360_CS_2_BASE_ADDR);
- if (bank == BANK3)
- result = MV_REG_READ (MV64360_CS_3_BASE_ADDR);
- result &= 0x0000ffff;
- result = result << 16;
- return result;
-}
-
-u32 mv_get_dram_bank_size (MEMORY_BANK bank)
-{
- u32 result = 0;
- u32 enable = MV_REG_READ (MV64360_BASE_ADDR_ENABLE);
-
- if (enable & (1 << bank))
- return 0;
- if (bank == BANK0)
- result = MV_REG_READ (MV64360_CS_0_SIZE);
- if (bank == BANK1)
- result = MV_REG_READ (MV64360_CS_1_SIZE);
- if (bank == BANK2)
- result = MV_REG_READ (MV64360_CS_2_SIZE);
- if (bank == BANK3)
- result = MV_REG_READ (MV64360_CS_3_SIZE);
- result += 1;
- result &= 0x0000ffff;
- result = result << 16;
- return result;
-}
-
-u32 mv_get_internal_sram_base (void)
-{
- u32 result;
-
- result = MV_REG_READ (MV64360_INTEGRATED_SRAM_BASE_ADDR);
- result &= 0x0000ffff;
- result = result << 16;
- return result;
-}
-
-/*******************************************************************************
-* eth_port_init - Initialize the Ethernet port driver
-*
-* DESCRIPTION:
-* This function prepares the ethernet port to start its activity:
-* 1) Completes the ethernet port driver struct initialization toward port
-* start routine.
-* 2) Resets the device to a quiescent state in case of warm reboot.
-* 3) Enable SDMA access to all four DRAM banks as well as internal SRAM.
-* 4) Clean MAC tables. The reset status of those tables is unknown.
-* 5) Set PHY address.
-* Note: Call this routine prior to eth_port_start routine and after setting
-* user values in the user fields of Ethernet port control struct (i.e.
-* port_phy_addr).
-*
-* INPUT:
-* ETH_PORT_INFO *p_eth_port_ctrl Ethernet port control struct
-*
-* OUTPUT:
-* See description.
-*
-* RETURN:
-* None.
-*
-*******************************************************************************/
-static void eth_port_init (ETH_PORT_INFO * p_eth_port_ctrl)
-{
- int queue;
- ETH_WIN_PARAM win_param;
-
- p_eth_port_ctrl->port_config = PORT_CONFIG_VALUE;
- p_eth_port_ctrl->port_config_extend = PORT_CONFIG_EXTEND_VALUE;
- p_eth_port_ctrl->port_sdma_config = PORT_SDMA_CONFIG_VALUE;
- p_eth_port_ctrl->port_serial_control = PORT_SERIAL_CONTROL_VALUE;
-
- p_eth_port_ctrl->port_rx_queue_command = 0;
- p_eth_port_ctrl->port_tx_queue_command = 0;
-
- /* Zero out SW structs */
- for (queue = 0; queue < MAX_RX_QUEUE_NUM; queue++) {
- CURR_RFD_SET ((ETH_RX_DESC *) 0x00000000, queue);
- USED_RFD_SET ((ETH_RX_DESC *) 0x00000000, queue);
- p_eth_port_ctrl->rx_resource_err[queue] = false;
- }
-
- for (queue = 0; queue < MAX_TX_QUEUE_NUM; queue++) {
- CURR_TFD_SET ((ETH_TX_DESC *) 0x00000000, queue);
- USED_TFD_SET ((ETH_TX_DESC *) 0x00000000, queue);
- FIRST_TFD_SET ((ETH_TX_DESC *) 0x00000000, queue);
- p_eth_port_ctrl->tx_resource_err[queue] = false;
- }
-
- eth_port_reset (p_eth_port_ctrl->port_num);
-
- /* Set access parameters for DRAM bank 0 */
- win_param.win = ETH_WIN0; /* Use Ethernet window 0 */
- win_param.target = ETH_TARGET_DRAM; /* Window target - DDR */
- win_param.attributes = EBAR_ATTR_DRAM_CS0; /* Enable DRAM bank */
-#ifndef CONFIG_NOT_COHERENT_CACHE
- win_param.attributes |= EBAR_ATTR_DRAM_CACHE_COHERENCY_WB;
-#endif
- win_param.high_addr = 0;
- /* Get bank base */
- win_param.base_addr = mv_get_dram_bank_base_addr (BANK0);
- win_param.size = mv_get_dram_bank_size (BANK0); /* Get bank size */
- if (win_param.size == 0)
- win_param.enable = 0;
- else
- win_param.enable = 1; /* Enable the access */
- win_param.access_ctrl = EWIN_ACCESS_FULL; /* Enable full access */
-
- /* Set the access control for address window (EPAPR) READ & WRITE */
- eth_set_access_control (p_eth_port_ctrl->port_num, &win_param);
-
- /* Set access parameters for DRAM bank 1 */
- win_param.win = ETH_WIN1; /* Use Ethernet window 1 */
- win_param.target = ETH_TARGET_DRAM; /* Window target - DDR */
- win_param.attributes = EBAR_ATTR_DRAM_CS1; /* Enable DRAM bank */
-#ifndef CONFIG_NOT_COHERENT_CACHE
- win_param.attributes |= EBAR_ATTR_DRAM_CACHE_COHERENCY_WB;
-#endif
- win_param.high_addr = 0;
- /* Get bank base */
- win_param.base_addr = mv_get_dram_bank_base_addr (BANK1);
- win_param.size = mv_get_dram_bank_size (BANK1); /* Get bank size */
- if (win_param.size == 0)
- win_param.enable = 0;
- else
- win_param.enable = 1; /* Enable the access */
- win_param.access_ctrl = EWIN_ACCESS_FULL; /* Enable full access */
-
- /* Set the access control for address window (EPAPR) READ & WRITE */
- eth_set_access_control (p_eth_port_ctrl->port_num, &win_param);
-
- /* Set access parameters for DRAM bank 2 */
- win_param.win = ETH_WIN2; /* Use Ethernet window 2 */
- win_param.target = ETH_TARGET_DRAM; /* Window target - DDR */
- win_param.attributes = EBAR_ATTR_DRAM_CS2; /* Enable DRAM bank */
-#ifndef CONFIG_NOT_COHERENT_CACHE
- win_param.attributes |= EBAR_ATTR_DRAM_CACHE_COHERENCY_WB;
-#endif
- win_param.high_addr = 0;
- /* Get bank base */
- win_param.base_addr = mv_get_dram_bank_base_addr (BANK2);
- win_param.size = mv_get_dram_bank_size (BANK2); /* Get bank size */
- if (win_param.size == 0)
- win_param.enable = 0;
- else
- win_param.enable = 1; /* Enable the access */
- win_param.access_ctrl = EWIN_ACCESS_FULL; /* Enable full access */
-
- /* Set the access control for address window (EPAPR) READ & WRITE */
- eth_set_access_control (p_eth_port_ctrl->port_num, &win_param);
-
- /* Set access parameters for DRAM bank 3 */
- win_param.win = ETH_WIN3; /* Use Ethernet window 3 */
- win_param.target = ETH_TARGET_DRAM; /* Window target - DDR */
- win_param.attributes = EBAR_ATTR_DRAM_CS3; /* Enable DRAM bank */
-#ifndef CONFIG_NOT_COHERENT_CACHE
- win_param.attributes |= EBAR_ATTR_DRAM_CACHE_COHERENCY_WB;
-#endif
- win_param.high_addr = 0;
- /* Get bank base */
- win_param.base_addr = mv_get_dram_bank_base_addr (BANK3);
- win_param.size = mv_get_dram_bank_size (BANK3); /* Get bank size */
- if (win_param.size == 0)
- win_param.enable = 0;
- else
- win_param.enable = 1; /* Enable the access */
- win_param.access_ctrl = EWIN_ACCESS_FULL; /* Enable full access */
-
- /* Set the access control for address window (EPAPR) READ & WRITE */
- eth_set_access_control (p_eth_port_ctrl->port_num, &win_param);
-
- /* Set access parameters for Internal SRAM */
- win_param.win = ETH_WIN4; /* Use Ethernet window 0 */
- win_param.target = EBAR_TARGET_CBS; /* Target - Internal SRAM */
- win_param.attributes = EBAR_ATTR_CBS_SRAM | EBAR_ATTR_CBS_SRAM_BLOCK0;
- win_param.high_addr = 0;
- win_param.base_addr = mv_get_internal_sram_base (); /* Get base addr */
- win_param.size = MV64360_INTERNAL_SRAM_SIZE; /* Get bank size */
- win_param.enable = 1; /* Enable the access */
- win_param.access_ctrl = EWIN_ACCESS_FULL; /* Enable full access */
-
- /* Set the access control for address window (EPAPR) READ & WRITE */
- eth_set_access_control (p_eth_port_ctrl->port_num, &win_param);
-
- eth_port_init_mac_tables (p_eth_port_ctrl->port_num);
-
- ethernet_phy_set (p_eth_port_ctrl->port_num,
- p_eth_port_ctrl->port_phy_addr);
-
- return;
-
-}
-
-/*******************************************************************************
-* eth_port_start - Start the Ethernet port activity.
-*
-* DESCRIPTION:
-* This routine prepares the Ethernet port for Rx and Tx activity:
-* 1. Initialize Tx and Rx Current Descriptor Pointer for each queue that
-* has been initialized a descriptor's ring (using ether_init_tx_desc_ring
-* for Tx and ether_init_rx_desc_ring for Rx)
-* 2. Initialize and enable the Ethernet configuration port by writing to
-* the port's configuration and command registers.
-* 3. Initialize and enable the SDMA by writing to the SDMA's
-* configuration and command registers.
-* After completing these steps, the ethernet port SDMA can starts to
-* perform Rx and Tx activities.
-*
-* Note: Each Rx and Tx queue descriptor's list must be initialized prior
-* to calling this function (use ether_init_tx_desc_ring for Tx queues and
-* ether_init_rx_desc_ring for Rx queues).
-*
-* INPUT:
-* ETH_PORT_INFO *p_eth_port_ctrl Ethernet port control struct
-*
-* OUTPUT:
-* Ethernet port is ready to receive and transmit.
-*
-* RETURN:
-* false if the port PHY is not up.
-* true otherwise.
-*
-*******************************************************************************/
-static bool eth_port_start (ETH_PORT_INFO * p_eth_port_ctrl)
-{
- int queue;
- volatile ETH_TX_DESC *p_tx_curr_desc;
- volatile ETH_RX_DESC *p_rx_curr_desc;
- unsigned int phy_reg_data;
- ETH_PORT eth_port_num = p_eth_port_ctrl->port_num;
-
-
- /* Assignment of Tx CTRP of given queue */
- for (queue = 0; queue < MAX_TX_QUEUE_NUM; queue++) {
- CURR_TFD_GET (p_tx_curr_desc, queue);
- MV_REG_WRITE ((MV64360_ETH_TX_CURRENT_QUEUE_DESC_PTR_0
- (eth_port_num)
- + (4 * queue)),
- ((unsigned int) p_tx_curr_desc));
-
- }
-
- /* Assignment of Rx CRDP of given queue */
- for (queue = 0; queue < MAX_RX_QUEUE_NUM; queue++) {
- CURR_RFD_GET (p_rx_curr_desc, queue);
- MV_REG_WRITE ((MV64360_ETH_RX_CURRENT_QUEUE_DESC_PTR_0
- (eth_port_num)
- + (4 * queue)),
- ((unsigned int) p_rx_curr_desc));
-
- if (p_rx_curr_desc != NULL)
- /* Add the assigned Ethernet address to the port's address table */
- eth_port_uc_addr_set (p_eth_port_ctrl->port_num,
- p_eth_port_ctrl->port_mac_addr,
- queue);
- }
-
- /* Assign port configuration and command. */
- MV_REG_WRITE (MV64360_ETH_PORT_CONFIG_REG (eth_port_num),
- p_eth_port_ctrl->port_config);
-
- MV_REG_WRITE (MV64360_ETH_PORT_CONFIG_EXTEND_REG (eth_port_num),
- p_eth_port_ctrl->port_config_extend);
-
- MV_REG_WRITE (MV64360_ETH_PORT_SERIAL_CONTROL_REG (eth_port_num),
- p_eth_port_ctrl->port_serial_control);
-
- MV_SET_REG_BITS (MV64360_ETH_PORT_SERIAL_CONTROL_REG (eth_port_num),
- ETH_SERIAL_PORT_ENABLE);
-
- /* Assign port SDMA configuration */
- MV_REG_WRITE (MV64360_ETH_SDMA_CONFIG_REG (eth_port_num),
- p_eth_port_ctrl->port_sdma_config);
-
- MV_REG_WRITE (MV64360_ETH_TX_QUEUE_0_TOKEN_BUCKET_COUNT
- (eth_port_num), 0x3fffffff);
- MV_REG_WRITE (MV64360_ETH_TX_QUEUE_0_TOKEN_BUCKET_CONFIG
- (eth_port_num), 0x03fffcff);
- /* Turn off the port/queue bandwidth limitation */
- MV_REG_WRITE (MV64360_ETH_MAXIMUM_TRANSMIT_UNIT (eth_port_num), 0x0);
-
- /* Enable port Rx. */
- MV_REG_WRITE (MV64360_ETH_RECEIVE_QUEUE_COMMAND_REG (eth_port_num),
- p_eth_port_ctrl->port_rx_queue_command);
-
- /* Check if link is up */
- eth_port_read_smi_reg (eth_port_num, 1, &phy_reg_data);
-
- if (!(phy_reg_data & 0x20))
- return false;
-
- return true;
-}
-
-/*******************************************************************************
-* eth_port_uc_addr_set - This function Set the port Unicast address.
-*
-* DESCRIPTION:
-* This function Set the port Ethernet MAC address.
-*
-* INPUT:
-* ETH_PORT eth_port_num Port number.
-* char * p_addr Address to be set
-* ETH_QUEUE queue Rx queue number for this MAC address.
-*
-* OUTPUT:
-* Set MAC address low and high registers. also calls eth_port_uc_addr()
-* To set the unicast table with the proper information.
-*
-* RETURN:
-* N/A.
-*
-*******************************************************************************/
-static void eth_port_uc_addr_set (ETH_PORT eth_port_num,
- unsigned char *p_addr, ETH_QUEUE queue)
-{
- unsigned int mac_h;
- unsigned int mac_l;
-
- mac_l = (p_addr[4] << 8) | (p_addr[5]);
- mac_h = (p_addr[0] << 24) | (p_addr[1] << 16) |
- (p_addr[2] << 8) | (p_addr[3] << 0);
-
- MV_REG_WRITE (MV64360_ETH_MAC_ADDR_LOW (eth_port_num), mac_l);
- MV_REG_WRITE (MV64360_ETH_MAC_ADDR_HIGH (eth_port_num), mac_h);
-
- /* Accept frames of this address */
- eth_port_uc_addr (eth_port_num, p_addr[5], queue, ACCEPT_MAC_ADDR);
-
- return;
-}
-
-/*******************************************************************************
-* eth_port_uc_addr - This function Set the port unicast address table
-*
-* DESCRIPTION:
-* This function locates the proper entry in the Unicast table for the
-* specified MAC nibble and sets its properties according to function
-* parameters.
-*
-* INPUT:
-* ETH_PORT eth_port_num Port number.
-* unsigned char uc_nibble Unicast MAC Address last nibble.
-* ETH_QUEUE queue Rx queue number for this MAC address.
-* int option 0 = Add, 1 = remove address.
-*
-* OUTPUT:
-* This function add/removes MAC addresses from the port unicast address
-* table.
-*
-* RETURN:
-* true is output succeeded.
-* false if option parameter is invalid.
-*
-*******************************************************************************/
-static bool eth_port_uc_addr (ETH_PORT eth_port_num,
- unsigned char uc_nibble,
- ETH_QUEUE queue, int option)
-{
- unsigned int unicast_reg;
- unsigned int tbl_offset;
- unsigned int reg_offset;
-
- /* Locate the Unicast table entry */
- uc_nibble = (0xf & uc_nibble);
- tbl_offset = (uc_nibble / 4) * 4; /* Register offset from unicast table base */
- reg_offset = uc_nibble % 4; /* Entry offset within the above register */
-
- switch (option) {
- case REJECT_MAC_ADDR:
- /* Clear accepts frame bit at specified unicast DA table entry */
- unicast_reg =
- MV_REG_READ ((MV64360_ETH_DA_FILTER_UNICAST_TABLE_BASE
- (eth_port_num)
- + tbl_offset));
-
- unicast_reg &= (0x0E << (8 * reg_offset));
-
- MV_REG_WRITE ((MV64360_ETH_DA_FILTER_UNICAST_TABLE_BASE
- (eth_port_num)
- + tbl_offset), unicast_reg);
- break;
-
- case ACCEPT_MAC_ADDR:
- /* Set accepts frame bit at unicast DA filter table entry */
- unicast_reg =
- MV_REG_READ ((MV64360_ETH_DA_FILTER_UNICAST_TABLE_BASE
- (eth_port_num)
- + tbl_offset));
-
- unicast_reg |= ((0x01 | queue) << (8 * reg_offset));
-
- MV_REG_WRITE ((MV64360_ETH_DA_FILTER_UNICAST_TABLE_BASE
- (eth_port_num)
- + tbl_offset), unicast_reg);
-
- break;
-
- default:
- return false;
- }
- return true;
-}
-
-#if 0 /* FIXME */
-/*******************************************************************************
-* eth_port_mc_addr - Multicast address settings.
-*
-* DESCRIPTION:
-* This API controls the MV device MAC multicast support.
-* The MV device supports multicast using two tables:
-* 1) Special Multicast Table for MAC addresses of the form
-* 0x01-00-5E-00-00-XX (where XX is between 0x00 and 0x_fF).
-* The MAC DA[7:0] bits are used as a pointer to the Special Multicast
-* Table entries in the DA-Filter table.
-* In this case, the function calls eth_port_smc_addr() routine to set the
-* Special Multicast Table.
-* 2) Other Multicast Table for multicast of another type. A CRC-8bit
-* is used as an index to the Other Multicast Table entries in the
-* DA-Filter table.
-* In this case, the function calculates the CRC-8bit value and calls
-* eth_port_omc_addr() routine to set the Other Multicast Table.
-* INPUT:
-* ETH_PORT eth_port_num Port number.
-* unsigned char *p_addr Unicast MAC Address.
-* ETH_QUEUE queue Rx queue number for this MAC address.
-* int option 0 = Add, 1 = remove address.
-*
-* OUTPUT:
-* See description.
-*
-* RETURN:
-* true is output succeeded.
-* false if add_address_table_entry( ) failed.
-*
-*******************************************************************************/
-static void eth_port_mc_addr (ETH_PORT eth_port_num,
- unsigned char *p_addr,
- ETH_QUEUE queue, int option)
-{
- unsigned int mac_h;
- unsigned int mac_l;
- unsigned char crc_result = 0;
- int mac_array[48];
- int crc[8];
- int i;
-
-
- if ((p_addr[0] == 0x01) &&
- (p_addr[1] == 0x00) &&
- (p_addr[2] == 0x5E) && (p_addr[3] == 0x00) && (p_addr[4] == 0x00))
-
- eth_port_smc_addr (eth_port_num, p_addr[5], queue, option);
- else {
- /* Calculate CRC-8 out of the given address */
- mac_h = (p_addr[0] << 8) | (p_addr[1]);
- mac_l = (p_addr[2] << 24) | (p_addr[3] << 16) |
- (p_addr[4] << 8) | (p_addr[5] << 0);
-
- for (i = 0; i < 32; i++)
- mac_array[i] = (mac_l >> i) & 0x1;
- for (i = 32; i < 48; i++)
- mac_array[i] = (mac_h >> (i - 32)) & 0x1;
-
-
- crc[0] = mac_array[45] ^ mac_array[43] ^ mac_array[40] ^
- mac_array[39] ^ mac_array[35] ^ mac_array[34] ^
- mac_array[31] ^ mac_array[30] ^ mac_array[28] ^
- mac_array[23] ^ mac_array[21] ^ mac_array[19] ^
- mac_array[18] ^ mac_array[16] ^ mac_array[14] ^
- mac_array[12] ^ mac_array[8] ^ mac_array[7] ^
- mac_array[6] ^ mac_array[0];
-
- crc[1] = mac_array[46] ^ mac_array[45] ^ mac_array[44] ^
- mac_array[43] ^ mac_array[41] ^ mac_array[39] ^
- mac_array[36] ^ mac_array[34] ^ mac_array[32] ^
- mac_array[30] ^ mac_array[29] ^ mac_array[28] ^
- mac_array[24] ^ mac_array[23] ^ mac_array[22] ^
- mac_array[21] ^ mac_array[20] ^ mac_array[18] ^
- mac_array[17] ^ mac_array[16] ^ mac_array[15] ^
- mac_array[14] ^ mac_array[13] ^ mac_array[12] ^
- mac_array[9] ^ mac_array[6] ^ mac_array[1] ^
- mac_array[0];
-
- crc[2] = mac_array[47] ^ mac_array[46] ^ mac_array[44] ^
- mac_array[43] ^ mac_array[42] ^ mac_array[39] ^
- mac_array[37] ^ mac_array[34] ^ mac_array[33] ^
- mac_array[29] ^ mac_array[28] ^ mac_array[25] ^
- mac_array[24] ^ mac_array[22] ^ mac_array[17] ^
- mac_array[15] ^ mac_array[13] ^ mac_array[12] ^
- mac_array[10] ^ mac_array[8] ^ mac_array[6] ^
- mac_array[2] ^ mac_array[1] ^ mac_array[0];
-
- crc[3] = mac_array[47] ^ mac_array[45] ^ mac_array[44] ^
- mac_array[43] ^ mac_array[40] ^ mac_array[38] ^
- mac_array[35] ^ mac_array[34] ^ mac_array[30] ^
- mac_array[29] ^ mac_array[26] ^ mac_array[25] ^
- mac_array[23] ^ mac_array[18] ^ mac_array[16] ^
- mac_array[14] ^ mac_array[13] ^ mac_array[11] ^
- mac_array[9] ^ mac_array[7] ^ mac_array[3] ^
- mac_array[2] ^ mac_array[1];
-
- crc[4] = mac_array[46] ^ mac_array[45] ^ mac_array[44] ^
- mac_array[41] ^ mac_array[39] ^ mac_array[36] ^
- mac_array[35] ^ mac_array[31] ^ mac_array[30] ^
- mac_array[27] ^ mac_array[26] ^ mac_array[24] ^
- mac_array[19] ^ mac_array[17] ^ mac_array[15] ^
- mac_array[14] ^ mac_array[12] ^ mac_array[10] ^
- mac_array[8] ^ mac_array[4] ^ mac_array[3] ^
- mac_array[2];
-
- crc[5] = mac_array[47] ^ mac_array[46] ^ mac_array[45] ^
- mac_array[42] ^ mac_array[40] ^ mac_array[37] ^
- mac_array[36] ^ mac_array[32] ^ mac_array[31] ^
- mac_array[28] ^ mac_array[27] ^ mac_array[25] ^
- mac_array[20] ^ mac_array[18] ^ mac_array[16] ^
- mac_array[15] ^ mac_array[13] ^ mac_array[11] ^
- mac_array[9] ^ mac_array[5] ^ mac_array[4] ^
- mac_array[3];
-
- crc[6] = mac_array[47] ^ mac_array[46] ^ mac_array[43] ^
- mac_array[41] ^ mac_array[38] ^ mac_array[37] ^
- mac_array[33] ^ mac_array[32] ^ mac_array[29] ^
- mac_array[28] ^ mac_array[26] ^ mac_array[21] ^
- mac_array[19] ^ mac_array[17] ^ mac_array[16] ^
- mac_array[14] ^ mac_array[12] ^ mac_array[10] ^
- mac_array[6] ^ mac_array[5] ^ mac_array[4];
-
- crc[7] = mac_array[47] ^ mac_array[44] ^ mac_array[42] ^
- mac_array[39] ^ mac_array[38] ^ mac_array[34] ^
- mac_array[33] ^ mac_array[30] ^ mac_array[29] ^
- mac_array[27] ^ mac_array[22] ^ mac_array[20] ^
- mac_array[18] ^ mac_array[17] ^ mac_array[15] ^
- mac_array[13] ^ mac_array[11] ^ mac_array[7] ^
- mac_array[6] ^ mac_array[5];
-
- for (i = 0; i < 8; i++)
- crc_result = crc_result | (crc[i] << i);
-
- eth_port_omc_addr (eth_port_num, crc_result, queue, option);
- }
- return;
-}
-
-/*******************************************************************************
-* eth_port_smc_addr - Special Multicast address settings.
-*
-* DESCRIPTION:
-* This routine controls the MV device special MAC multicast support.
-* The Special Multicast Table for MAC addresses supports MAC of the form
-* 0x01-00-5E-00-00-XX (where XX is between 0x00 and 0x_fF).
-* The MAC DA[7:0] bits are used as a pointer to the Special Multicast
-* Table entries in the DA-Filter table.
-* This function set the Special Multicast Table appropriate entry
-* according to the argument given.
-*
-* INPUT:
-* ETH_PORT eth_port_num Port number.
-* unsigned char mc_byte Multicast addr last byte (MAC DA[7:0] bits).
-* ETH_QUEUE queue Rx queue number for this MAC address.
-* int option 0 = Add, 1 = remove address.
-*
-* OUTPUT:
-* See description.
-*
-* RETURN:
-* true is output succeeded.
-* false if option parameter is invalid.
-*
-*******************************************************************************/
-static bool eth_port_smc_addr (ETH_PORT eth_port_num,
- unsigned char mc_byte,
- ETH_QUEUE queue, int option)
-{
- unsigned int smc_table_reg;
- unsigned int tbl_offset;
- unsigned int reg_offset;
-
- /* Locate the SMC table entry */
- tbl_offset = (mc_byte / 4) * 4; /* Register offset from SMC table base */
- reg_offset = mc_byte % 4; /* Entry offset within the above register */
- queue &= 0x7;
-
- switch (option) {
- case REJECT_MAC_ADDR:
- /* Clear accepts frame bit at specified Special DA table entry */
- smc_table_reg =
- MV_REG_READ ((MV64360_ETH_DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE (eth_port_num) + tbl_offset));
- smc_table_reg &= (0x0E << (8 * reg_offset));
-
- MV_REG_WRITE ((MV64360_ETH_DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE (eth_port_num) + tbl_offset), smc_table_reg);
- break;
-
- case ACCEPT_MAC_ADDR:
- /* Set accepts frame bit at specified Special DA table entry */
- smc_table_reg =
- MV_REG_READ ((MV64360_ETH_DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE (eth_port_num) + tbl_offset));
- smc_table_reg |= ((0x01 | queue) << (8 * reg_offset));
-
- MV_REG_WRITE ((MV64360_ETH_DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE (eth_port_num) + tbl_offset), smc_table_reg);
- break;
-
- default:
- return false;
- }
- return true;
-}
-
-/*******************************************************************************
-* eth_port_omc_addr - Multicast address settings.
-*
-* DESCRIPTION:
-* This routine controls the MV device Other MAC multicast support.
-* The Other Multicast Table is used for multicast of another type.
-* A CRC-8bit is used as an index to the Other Multicast Table entries
-* in the DA-Filter table.
-* The function gets the CRC-8bit value from the calling routine and
-* set the Other Multicast Table appropriate entry according to the
-* CRC-8 argument given.
-*
-* INPUT:
-* ETH_PORT eth_port_num Port number.
-* unsigned char crc8 A CRC-8bit (Polynomial: x^8+x^2+x^1+1).
-* ETH_QUEUE queue Rx queue number for this MAC address.
-* int option 0 = Add, 1 = remove address.
-*
-* OUTPUT:
-* See description.
-*
-* RETURN:
-* true is output succeeded.
-* false if option parameter is invalid.
-*
-*******************************************************************************/
-static bool eth_port_omc_addr (ETH_PORT eth_port_num,
- unsigned char crc8,
- ETH_QUEUE queue, int option)
-{
- unsigned int omc_table_reg;
- unsigned int tbl_offset;
- unsigned int reg_offset;
-
- /* Locate the OMC table entry */
- tbl_offset = (crc8 / 4) * 4; /* Register offset from OMC table base */
- reg_offset = crc8 % 4; /* Entry offset within the above register */
- queue &= 0x7;
-
- switch (option) {
- case REJECT_MAC_ADDR:
- /* Clear accepts frame bit at specified Other DA table entry */
- omc_table_reg =
- MV_REG_READ ((MV64360_ETH_DA_FILTER_OTHER_MULTICAST_TABLE_BASE (eth_port_num) + tbl_offset));
- omc_table_reg &= (0x0E << (8 * reg_offset));
-
- MV_REG_WRITE ((MV64360_ETH_DA_FILTER_OTHER_MULTICAST_TABLE_BASE (eth_port_num) + tbl_offset), omc_table_reg);
- break;
-
- case ACCEPT_MAC_ADDR:
- /* Set accepts frame bit at specified Other DA table entry */
- omc_table_reg =
- MV_REG_READ ((MV64360_ETH_DA_FILTER_OTHER_MULTICAST_TABLE_BASE (eth_port_num) + tbl_offset));
- omc_table_reg |= ((0x01 | queue) << (8 * reg_offset));
-
- MV_REG_WRITE ((MV64360_ETH_DA_FILTER_OTHER_MULTICAST_TABLE_BASE (eth_port_num) + tbl_offset), omc_table_reg);
- break;
-
- default:
- return false;
- }
- return true;
-}
-#endif
-
-/*******************************************************************************
-* eth_port_init_mac_tables - Clear all entrance in the UC, SMC and OMC tables
-*
-* DESCRIPTION:
-* Go through all the DA filter tables (Unicast, Special Multicast & Other
-* Multicast) and set each entry to 0.
-*
-* INPUT:
-* ETH_PORT eth_port_num Ethernet Port number. See ETH_PORT enum.
-*
-* OUTPUT:
-* Multicast and Unicast packets are rejected.
-*
-* RETURN:
-* None.
-*
-*******************************************************************************/
-static void eth_port_init_mac_tables (ETH_PORT eth_port_num)
-{
- int table_index;
-
- /* Clear DA filter unicast table (Ex_dFUT) */
- for (table_index = 0; table_index <= 0xC; table_index += 4)
- MV_REG_WRITE ((MV64360_ETH_DA_FILTER_UNICAST_TABLE_BASE
- (eth_port_num) + table_index), 0);
-
- for (table_index = 0; table_index <= 0xFC; table_index += 4) {
- /* Clear DA filter special multicast table (Ex_dFSMT) */
- MV_REG_WRITE ((MV64360_ETH_DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE (eth_port_num) + table_index), 0);
- /* Clear DA filter other multicast table (Ex_dFOMT) */
- MV_REG_WRITE ((MV64360_ETH_DA_FILTER_OTHER_MULTICAST_TABLE_BASE (eth_port_num) + table_index), 0);
- }
-}
-
-/*******************************************************************************
-* eth_clear_mib_counters - Clear all MIB counters
-*
-* DESCRIPTION:
-* This function clears all MIB counters of a specific ethernet port.
-* A read from the MIB counter will reset the counter.
-*
-* INPUT:
-* ETH_PORT eth_port_num Ethernet Port number. See ETH_PORT enum.
-*
-* OUTPUT:
-* After reading all MIB counters, the counters resets.
-*
-* RETURN:
-* MIB counter value.
-*
-*******************************************************************************/
-static void eth_clear_mib_counters (ETH_PORT eth_port_num)
-{
- int i;
- unsigned int dummy;
-
- /* Perform dummy reads from MIB counters */
- for (i = ETH_MIB_GOOD_OCTETS_RECEIVED_LOW; i < ETH_MIB_LATE_COLLISION;
- i += 4)
- dummy = MV_REG_READ ((MV64360_ETH_MIB_COUNTERS_BASE
- (eth_port_num) + i));
-
- return;
-}
-
-/*******************************************************************************
-* eth_read_mib_counter - Read a MIB counter
-*
-* DESCRIPTION:
-* This function reads a MIB counter of a specific ethernet port.
-* NOTE - If read from ETH_MIB_GOOD_OCTETS_RECEIVED_LOW, then the
-* following read must be from ETH_MIB_GOOD_OCTETS_RECEIVED_HIGH
-* register. The same applies for ETH_MIB_GOOD_OCTETS_SENT_LOW and
-* ETH_MIB_GOOD_OCTETS_SENT_HIGH
-*
-* INPUT:
-* ETH_PORT eth_port_num Ethernet Port number. See ETH_PORT enum.
-* unsigned int mib_offset MIB counter offset (use ETH_MIB_... macros).
-*
-* OUTPUT:
-* After reading the MIB counter, the counter resets.
-*
-* RETURN:
-* MIB counter value.
-*
-*******************************************************************************/
-unsigned int eth_read_mib_counter (ETH_PORT eth_port_num,
- unsigned int mib_offset)
-{
- return (MV_REG_READ (MV64360_ETH_MIB_COUNTERS_BASE (eth_port_num)
- + mib_offset));
-}
-
-/*******************************************************************************
-* ethernet_phy_set - Set the ethernet port PHY address.
-*
-* DESCRIPTION:
-* This routine set the ethernet port PHY address according to given
-* parameter.
-*
-* INPUT:
-* ETH_PORT eth_port_num Ethernet Port number. See ETH_PORT enum.
-*
-* OUTPUT:
-* Set PHY Address Register with given PHY address parameter.
-*
-* RETURN:
-* None.
-*
-*******************************************************************************/
-static void ethernet_phy_set (ETH_PORT eth_port_num, int phy_addr)
-{
- unsigned int reg_data;
-
- reg_data = MV_REG_READ (MV64360_ETH_PHY_ADDR_REG);
-
- reg_data &= ~(0x1F << (5 * eth_port_num));
- reg_data |= (phy_addr << (5 * eth_port_num));
-
- MV_REG_WRITE (MV64360_ETH_PHY_ADDR_REG, reg_data);
-
- return;
-}
-
-/*******************************************************************************
- * ethernet_phy_get - Get the ethernet port PHY address.
- *
- * DESCRIPTION:
- * This routine returns the given ethernet port PHY address.
- *
- * INPUT:
- * ETH_PORT eth_port_num Ethernet Port number. See ETH_PORT enum.
- *
- * OUTPUT:
- * None.
- *
- * RETURN:
- * PHY address.
- *
- *******************************************************************************/
-static int ethernet_phy_get (ETH_PORT eth_port_num)
-{
- unsigned int reg_data;
-
- reg_data = MV_REG_READ (MV64360_ETH_PHY_ADDR_REG);
-
- return ((reg_data >> (5 * eth_port_num)) & 0x1f);
-}
-
-/*******************************************************************************
- * ethernet_phy_reset - Reset Ethernet port PHY.
- *
- * DESCRIPTION:
- * This routine utilize the SMI interface to reset the ethernet port PHY.
- * The routine waits until the link is up again or link up is timeout.
- *
- * INPUT:
- * ETH_PORT eth_port_num Ethernet Port number. See ETH_PORT enum.
- *
- * OUTPUT:
- * The ethernet port PHY renew its link.
- *
- * RETURN:
- * None.
- *
-*******************************************************************************/
-static bool ethernet_phy_reset (ETH_PORT eth_port_num)
-{
- unsigned int time_out = 50;
- unsigned int phy_reg_data;
-
- /* Reset the PHY */
- eth_port_read_smi_reg (eth_port_num, 0, &phy_reg_data);
- phy_reg_data |= 0x8000; /* Set bit 15 to reset the PHY */
- eth_port_write_smi_reg (eth_port_num, 0, phy_reg_data);
-
- /* Poll on the PHY LINK */
- do {
- eth_port_read_smi_reg (eth_port_num, 1, &phy_reg_data);
-
- if (time_out-- == 0)
- return false;
- }
- while (!(phy_reg_data & 0x20));
-
- return true;
-}
-
-/*******************************************************************************
- * eth_port_reset - Reset Ethernet port
- *
- * DESCRIPTION:
- * This routine resets the chip by aborting any SDMA engine activity and
- * clearing the MIB counters. The Receiver and the Transmit unit are in
- * idle state after this command is performed and the port is disabled.
- *
- * INPUT:
- * ETH_PORT eth_port_num Ethernet Port number. See ETH_PORT enum.
- *
- * OUTPUT:
- * Channel activity is halted.
- *
- * RETURN:
- * None.
- *
- *******************************************************************************/
-static void eth_port_reset (ETH_PORT eth_port_num)
-{
- unsigned int reg_data;
-
- /* Stop Tx port activity. Check port Tx activity. */
- reg_data =
- MV_REG_READ (MV64360_ETH_TRANSMIT_QUEUE_COMMAND_REG
- (eth_port_num));
-
- if (reg_data & 0xFF) {
- /* Issue stop command for active channels only */
- MV_REG_WRITE (MV64360_ETH_TRANSMIT_QUEUE_COMMAND_REG
- (eth_port_num), (reg_data << 8));
-
- /* Wait for all Tx activity to terminate. */
- do {
- /* Check port cause register that all Tx queues are stopped */
- reg_data =
- MV_REG_READ
- (MV64360_ETH_TRANSMIT_QUEUE_COMMAND_REG
- (eth_port_num));
- }
- while (reg_data & 0xFF);
- }
-
- /* Stop Rx port activity. Check port Rx activity. */
- reg_data =
- MV_REG_READ (MV64360_ETH_RECEIVE_QUEUE_COMMAND_REG
- (eth_port_num));
-
- if (reg_data & 0xFF) {
- /* Issue stop command for active channels only */
- MV_REG_WRITE (MV64360_ETH_RECEIVE_QUEUE_COMMAND_REG
- (eth_port_num), (reg_data << 8));
-
- /* Wait for all Rx activity to terminate. */
- do {
- /* Check port cause register that all Rx queues are stopped */
- reg_data =
- MV_REG_READ
- (MV64360_ETH_RECEIVE_QUEUE_COMMAND_REG
- (eth_port_num));
- }
- while (reg_data & 0xFF);
- }
-
-
- /* Clear all MIB counters */
- eth_clear_mib_counters (eth_port_num);
-
- /* Reset the Enable bit in the Configuration Register */
- reg_data =
- MV_REG_READ (MV64360_ETH_PORT_SERIAL_CONTROL_REG
- (eth_port_num));
- reg_data &= ~ETH_SERIAL_PORT_ENABLE;
- MV_REG_WRITE (MV64360_ETH_PORT_SERIAL_CONTROL_REG (eth_port_num),
- reg_data);
-
- return;
-}
-
-#if 0 /* Not needed here */
-/*******************************************************************************
- * ethernet_set_config_reg - Set specified bits in configuration register.
- *
- * DESCRIPTION:
- * This function sets specified bits in the given ethernet
- * configuration register.
- *
- * INPUT:
- * ETH_PORT eth_port_num Ethernet Port number. See ETH_PORT enum.
- * unsigned int value 32 bit value.
- *
- * OUTPUT:
- * The set bits in the value parameter are set in the configuration
- * register.
- *
- * RETURN:
- * None.
- *
- *******************************************************************************/
-static void ethernet_set_config_reg (ETH_PORT eth_port_num,
- unsigned int value)
-{
- unsigned int eth_config_reg;
-
- eth_config_reg =
- MV_REG_READ (MV64360_ETH_PORT_CONFIG_REG (eth_port_num));
- eth_config_reg |= value;
- MV_REG_WRITE (MV64360_ETH_PORT_CONFIG_REG (eth_port_num),
- eth_config_reg);
-
- return;
-}
-#endif
-
-#if 0 /* FIXME */
-/*******************************************************************************
- * ethernet_reset_config_reg - Reset specified bits in configuration register.
- *
- * DESCRIPTION:
- * This function resets specified bits in the given Ethernet
- * configuration register.
- *
- * INPUT:
- * ETH_PORT eth_port_num Ethernet Port number. See ETH_PORT enum.
- * unsigned int value 32 bit value.
- *
- * OUTPUT:
- * The set bits in the value parameter are reset in the configuration
- * register.
- *
- * RETURN:
- * None.
- *
- *******************************************************************************/
-static void ethernet_reset_config_reg (ETH_PORT eth_port_num,
- unsigned int value)
-{
- unsigned int eth_config_reg;
-
- eth_config_reg = MV_REG_READ (MV64360_ETH_PORT_CONFIG_EXTEND_REG
- (eth_port_num));
- eth_config_reg &= ~value;
- MV_REG_WRITE (MV64360_ETH_PORT_CONFIG_EXTEND_REG (eth_port_num),
- eth_config_reg);
-
- return;
-}
-#endif
-
-#if 0 /* Not needed here */
-/*******************************************************************************
- * ethernet_get_config_reg - Get the port configuration register
- *
- * DESCRIPTION:
- * This function returns the configuration register value of the given
- * ethernet port.
- *
- * INPUT:
- * ETH_PORT eth_port_num Ethernet Port number. See ETH_PORT enum.
- *
- * OUTPUT:
- * None.
- *
- * RETURN:
- * Port configuration register value.
- *
- *******************************************************************************/
-static unsigned int ethernet_get_config_reg (ETH_PORT eth_port_num)
-{
- unsigned int eth_config_reg;
-
- eth_config_reg = MV_REG_READ (MV64360_ETH_PORT_CONFIG_EXTEND_REG
- (eth_port_num));
- return eth_config_reg;
-}
-
-#endif
-
-/*******************************************************************************
- * eth_port_read_smi_reg - Read PHY registers
- *
- * DESCRIPTION:
- * This routine utilize the SMI interface to interact with the PHY in
- * order to perform PHY register read.
- *
- * INPUT:
- * ETH_PORT eth_port_num Ethernet Port number. See ETH_PORT enum.
- * unsigned int phy_reg PHY register address offset.
- * unsigned int *value Register value buffer.
- *
- * OUTPUT:
- * Write the value of a specified PHY register into given buffer.
- *
- * RETURN:
- * false if the PHY is busy or read data is not in valid state.
- * true otherwise.
- *
- *******************************************************************************/
-static bool eth_port_read_smi_reg (ETH_PORT eth_port_num,
- unsigned int phy_reg, unsigned int *value)
-{
- unsigned int reg_value;
- unsigned int time_out = PHY_BUSY_TIMEOUT;
- int phy_addr;
-
- phy_addr = ethernet_phy_get (eth_port_num);
-/* printf(" Phy-Port %d has addess %d \n",eth_port_num, phy_addr );*/
-
- /* first check that it is not busy */
- do {
- reg_value = MV_REG_READ (MV64360_ETH_SMI_REG);
- if (time_out-- == 0) {
- return false;
- }
- }
- while (reg_value & ETH_SMI_BUSY);
-
- /* not busy */
-
- MV_REG_WRITE (MV64360_ETH_SMI_REG,
- (phy_addr << 16) | (phy_reg << 21) |
- ETH_SMI_OPCODE_READ);
-
- time_out = PHY_BUSY_TIMEOUT; /* initialize the time out var again */
-
- do {
- reg_value = MV_REG_READ (MV64360_ETH_SMI_REG);
- if (time_out-- == 0) {
- return false;
- }
- }
- while ((reg_value & ETH_SMI_READ_VALID) != ETH_SMI_READ_VALID); /* Bit set equ operation done */
-
- /* Wait for the data to update in the SMI register */
-#define PHY_UPDATE_TIMEOUT 10000
- for (time_out = 0; time_out < PHY_UPDATE_TIMEOUT; time_out++);
-
- reg_value = MV_REG_READ (MV64360_ETH_SMI_REG);
-
- *value = reg_value & 0xffff;
-
- return true;
-}
-
-/*******************************************************************************
- * eth_port_write_smi_reg - Write to PHY registers
- *
- * DESCRIPTION:
- * This routine utilize the SMI interface to interact with the PHY in
- * order to perform writes to PHY registers.
- *
- * INPUT:
- * ETH_PORT eth_port_num Ethernet Port number. See ETH_PORT enum.
- * unsigned int phy_reg PHY register address offset.
- * unsigned int value Register value.
- *
- * OUTPUT:
- * Write the given value to the specified PHY register.
- *
- * RETURN:
- * false if the PHY is busy.
- * true otherwise.
- *
- *******************************************************************************/
-static bool eth_port_write_smi_reg (ETH_PORT eth_port_num,
- unsigned int phy_reg, unsigned int value)
-{
- unsigned int reg_value;
- unsigned int time_out = PHY_BUSY_TIMEOUT;
- int phy_addr;
-
- phy_addr = ethernet_phy_get (eth_port_num);
-
- /* first check that it is not busy */
- do {
- reg_value = MV_REG_READ (MV64360_ETH_SMI_REG);
- if (time_out-- == 0) {
- return false;
- }
- }
- while (reg_value & ETH_SMI_BUSY);
-
- /* not busy */
- MV_REG_WRITE (MV64360_ETH_SMI_REG,
- (phy_addr << 16) | (phy_reg << 21) |
- ETH_SMI_OPCODE_WRITE | (value & 0xffff));
- return true;
-}
-
-/*******************************************************************************
- * eth_set_access_control - Config address decode parameters for Ethernet unit
- *
- * DESCRIPTION:
- * This function configures the address decode parameters for the Gigabit
- * Ethernet Controller according the given parameters struct.
- *
- * INPUT:
- * ETH_PORT eth_port_num Ethernet Port number. See ETH_PORT enum.
- * ETH_WIN_PARAM *param Address decode parameter struct.
- *
- * OUTPUT:
- * An access window is opened using the given access parameters.
- *
- * RETURN:
- * None.
- *
- *******************************************************************************/
-static void eth_set_access_control (ETH_PORT eth_port_num,
- ETH_WIN_PARAM * param)
-{
- unsigned int access_prot_reg;
-
- /* Set access control register */
- access_prot_reg = MV_REG_READ (MV64360_ETH_ACCESS_PROTECTION_REG
- (eth_port_num));
- access_prot_reg &= (~(3 << (param->win * 2))); /* clear window permission */
- access_prot_reg |= (param->access_ctrl << (param->win * 2));
- MV_REG_WRITE (MV64360_ETH_ACCESS_PROTECTION_REG (eth_port_num),
- access_prot_reg);
-
- /* Set window Size reg (SR) */
- MV_REG_WRITE ((MV64360_ETH_SIZE_REG_0 +
- (ETH_SIZE_REG_GAP * param->win)),
- (((param->size / 0x10000) - 1) << 16));
-
- /* Set window Base address reg (BA) */
- MV_REG_WRITE ((MV64360_ETH_BAR_0 + (ETH_BAR_GAP * param->win)),
- (param->target | param->attributes | param->base_addr));
- /* High address remap reg (HARR) */
- if (param->win < 4)
- MV_REG_WRITE ((MV64360_ETH_HIGH_ADDR_REMAP_REG_0 +
- (ETH_HIGH_ADDR_REMAP_REG_GAP * param->win)),
- param->high_addr);
-
- /* Base address enable reg (BARER) */
- if (param->enable == 1)
- MV_RESET_REG_BITS (MV64360_ETH_BASE_ADDR_ENABLE_REG,
- (1 << param->win));
- else
- MV_SET_REG_BITS (MV64360_ETH_BASE_ADDR_ENABLE_REG,
- (1 << param->win));
-}
-
-/*******************************************************************************
- * ether_init_rx_desc_ring - Curve a Rx chain desc list and buffer in memory.
- *
- * DESCRIPTION:
- * This function prepares a Rx chained list of descriptors and packet
- * buffers in a form of a ring. The routine must be called after port
- * initialization routine and before port start routine.
- * The Ethernet SDMA engine uses CPU bus addresses to access the various
- * devices in the system (i.e. DRAM). This function uses the ethernet
- * struct 'virtual to physical' routine (set by the user) to set the ring
- * with physical addresses.
- *
- * INPUT:
- * ETH_PORT_INFO *p_eth_port_ctrl Ethernet Port Control srtuct.
- * ETH_QUEUE rx_queue Number of Rx queue.
- * int rx_desc_num Number of Rx descriptors
- * int rx_buff_size Size of Rx buffer
- * unsigned int rx_desc_base_addr Rx descriptors memory area base addr.
- * unsigned int rx_buff_base_addr Rx buffer memory area base addr.
- *
- * OUTPUT:
- * The routine updates the Ethernet port control struct with information
- * regarding the Rx descriptors and buffers.
- *
- * RETURN:
- * false if the given descriptors memory area is not aligned according to
- * Ethernet SDMA specifications.
- * true otherwise.
- *
- *******************************************************************************/
-static bool ether_init_rx_desc_ring (ETH_PORT_INFO * p_eth_port_ctrl,
- ETH_QUEUE rx_queue,
- int rx_desc_num,
- int rx_buff_size,
- unsigned int rx_desc_base_addr,
- unsigned int rx_buff_base_addr)
-{
- ETH_RX_DESC *p_rx_desc;
- ETH_RX_DESC *p_rx_prev_desc; /* pointer to link with the last descriptor */
- unsigned int buffer_addr;
- int ix; /* a counter */
-
-
- p_rx_desc = (ETH_RX_DESC *) rx_desc_base_addr;
- p_rx_prev_desc = p_rx_desc;
- buffer_addr = rx_buff_base_addr;
-
- /* Rx desc Must be 4LW aligned (i.e. Descriptor_Address[3:0]=0000). */
- if (rx_buff_base_addr & 0xF)
- return false;
-
- /* Rx buffers are limited to 64K bytes and Minimum size is 8 bytes */
- if ((rx_buff_size < 8) || (rx_buff_size > RX_BUFFER_MAX_SIZE))
- return false;
-
- /* Rx buffers must be 64-bit aligned. */
- if ((rx_buff_base_addr + rx_buff_size) & 0x7)
- return false;
-
- /* initialize the Rx descriptors ring */
- for (ix = 0; ix < rx_desc_num; ix++) {
- p_rx_desc->buf_size = rx_buff_size;
- p_rx_desc->byte_cnt = 0x0000;
- p_rx_desc->cmd_sts =
- ETH_BUFFER_OWNED_BY_DMA | ETH_RX_ENABLE_INTERRUPT;
- p_rx_desc->next_desc_ptr =
- ((unsigned int) p_rx_desc) + RX_DESC_ALIGNED_SIZE;
- p_rx_desc->buf_ptr = buffer_addr;
- p_rx_desc->return_info = 0x00000000;
- D_CACHE_FLUSH_LINE (p_rx_desc, 0);
- buffer_addr += rx_buff_size;
- p_rx_prev_desc = p_rx_desc;
- p_rx_desc = (ETH_RX_DESC *)
- ((unsigned int) p_rx_desc + RX_DESC_ALIGNED_SIZE);
- }
-
- /* Closing Rx descriptors ring */
- p_rx_prev_desc->next_desc_ptr = (rx_desc_base_addr);
- D_CACHE_FLUSH_LINE (p_rx_prev_desc, 0);
-
- /* Save Rx desc pointer to driver struct. */
- CURR_RFD_SET ((ETH_RX_DESC *) rx_desc_base_addr, rx_queue);
- USED_RFD_SET ((ETH_RX_DESC *) rx_desc_base_addr, rx_queue);
-
- p_eth_port_ctrl->p_rx_desc_area_base[rx_queue] =
- (ETH_RX_DESC *) rx_desc_base_addr;
- p_eth_port_ctrl->rx_desc_area_size[rx_queue] =
- rx_desc_num * RX_DESC_ALIGNED_SIZE;
-
- p_eth_port_ctrl->port_rx_queue_command |= (1 << rx_queue);
-
- return true;
-}
-
-/*******************************************************************************
- * ether_init_tx_desc_ring - Curve a Tx chain desc list and buffer in memory.
- *
- * DESCRIPTION:
- * This function prepares a Tx chained list of descriptors and packet
- * buffers in a form of a ring. The routine must be called after port
- * initialization routine and before port start routine.
- * The Ethernet SDMA engine uses CPU bus addresses to access the various
- * devices in the system (i.e. DRAM). This function uses the ethernet
- * struct 'virtual to physical' routine (set by the user) to set the ring
- * with physical addresses.
- *
- * INPUT:
- * ETH_PORT_INFO *p_eth_port_ctrl Ethernet Port Control srtuct.
- * ETH_QUEUE tx_queue Number of Tx queue.
- * int tx_desc_num Number of Tx descriptors
- * int tx_buff_size Size of Tx buffer
- * unsigned int tx_desc_base_addr Tx descriptors memory area base addr.
- * unsigned int tx_buff_base_addr Tx buffer memory area base addr.
- *
- * OUTPUT:
- * The routine updates the Ethernet port control struct with information
- * regarding the Tx descriptors and buffers.
- *
- * RETURN:
- * false if the given descriptors memory area is not aligned according to
- * Ethernet SDMA specifications.
- * true otherwise.
- *
- *******************************************************************************/
-static bool ether_init_tx_desc_ring (ETH_PORT_INFO * p_eth_port_ctrl,
- ETH_QUEUE tx_queue,
- int tx_desc_num,
- int tx_buff_size,
- unsigned int tx_desc_base_addr,
- unsigned int tx_buff_base_addr)
-{
-
- ETH_TX_DESC *p_tx_desc;
- ETH_TX_DESC *p_tx_prev_desc;
- unsigned int buffer_addr;
- int ix; /* a counter */
-
-
- /* save the first desc pointer to link with the last descriptor */
- p_tx_desc = (ETH_TX_DESC *) tx_desc_base_addr;
- p_tx_prev_desc = p_tx_desc;
- buffer_addr = tx_buff_base_addr;
-
- /* Tx desc Must be 4LW aligned (i.e. Descriptor_Address[3:0]=0000). */
- if (tx_buff_base_addr & 0xF)
- return false;
-
- /* Tx buffers are limited to 64K bytes and Minimum size is 8 bytes */
- if ((tx_buff_size > TX_BUFFER_MAX_SIZE)
- || (tx_buff_size < TX_BUFFER_MIN_SIZE))
- return false;
-
- /* Initialize the Tx descriptors ring */
- for (ix = 0; ix < tx_desc_num; ix++) {
- p_tx_desc->byte_cnt = 0x0000;
- p_tx_desc->l4i_chk = 0x0000;
- p_tx_desc->cmd_sts = 0x00000000;
- p_tx_desc->next_desc_ptr =
- ((unsigned int) p_tx_desc) + TX_DESC_ALIGNED_SIZE;
-
- p_tx_desc->buf_ptr = buffer_addr;
- p_tx_desc->return_info = 0x00000000;
- D_CACHE_FLUSH_LINE (p_tx_desc, 0);
- buffer_addr += tx_buff_size;
- p_tx_prev_desc = p_tx_desc;
- p_tx_desc = (ETH_TX_DESC *)
- ((unsigned int) p_tx_desc + TX_DESC_ALIGNED_SIZE);
-
- }
- /* Closing Tx descriptors ring */
- p_tx_prev_desc->next_desc_ptr = tx_desc_base_addr;
- D_CACHE_FLUSH_LINE (p_tx_prev_desc, 0);
- /* Set Tx desc pointer in driver struct. */
- CURR_TFD_SET ((ETH_TX_DESC *) tx_desc_base_addr, tx_queue);
- USED_TFD_SET ((ETH_TX_DESC *) tx_desc_base_addr, tx_queue);
-
- /* Init Tx ring base and size parameters */
- p_eth_port_ctrl->p_tx_desc_area_base[tx_queue] =
- (ETH_TX_DESC *) tx_desc_base_addr;
- p_eth_port_ctrl->tx_desc_area_size[tx_queue] =
- (tx_desc_num * TX_DESC_ALIGNED_SIZE);
-
- /* Add the queue to the list of Tx queues of this port */
- p_eth_port_ctrl->port_tx_queue_command |= (1 << tx_queue);
-
- return true;
-}
-
-/*******************************************************************************
- * eth_port_send - Send an Ethernet packet
- *
- * DESCRIPTION:
- * This routine send a given packet described by p_pktinfo parameter. It
- * supports transmitting of a packet spaned over multiple buffers. The
- * routine updates 'curr' and 'first' indexes according to the packet
- * segment passed to the routine. In case the packet segment is first,
- * the 'first' index is update. In any case, the 'curr' index is updated.
- * If the routine get into Tx resource error it assigns 'curr' index as
- * 'first'. This way the function can abort Tx process of multiple
- * descriptors per packet.
- *
- * INPUT:
- * ETH_PORT_INFO *p_eth_port_ctrl Ethernet Port Control srtuct.
- * ETH_QUEUE tx_queue Number of Tx queue.
- * PKT_INFO *p_pkt_info User packet buffer.
- *
- * OUTPUT:
- * Tx ring 'curr' and 'first' indexes are updated.
- *
- * RETURN:
- * ETH_QUEUE_FULL in case of Tx resource error.
- * ETH_ERROR in case the routine can not access Tx desc ring.
- * ETH_QUEUE_LAST_RESOURCE if the routine uses the last Tx resource.
- * ETH_OK otherwise.
- *
- *******************************************************************************/
-static ETH_FUNC_RET_STATUS eth_port_send (ETH_PORT_INFO * p_eth_port_ctrl,
- ETH_QUEUE tx_queue,
- PKT_INFO * p_pkt_info)
-{
- volatile ETH_TX_DESC *p_tx_desc_first;
- volatile ETH_TX_DESC *p_tx_desc_curr;
- volatile ETH_TX_DESC *p_tx_next_desc_curr;
- volatile ETH_TX_DESC *p_tx_desc_used;
- unsigned int command_status;
-
- /* Do not process Tx ring in case of Tx ring resource error */
- if (p_eth_port_ctrl->tx_resource_err[tx_queue] == true)
- return ETH_QUEUE_FULL;
-
- /* Get the Tx Desc ring indexes */
- CURR_TFD_GET (p_tx_desc_curr, tx_queue);
- USED_TFD_GET (p_tx_desc_used, tx_queue);
-
- if (p_tx_desc_curr == NULL)
- return ETH_ERROR;
-
- /* The following parameters are used to save readings from memory */
- p_tx_next_desc_curr = TX_NEXT_DESC_PTR (p_tx_desc_curr, tx_queue);
- command_status = p_pkt_info->cmd_sts | ETH_ZERO_PADDING | ETH_GEN_CRC;
-
- if (command_status & (ETH_TX_FIRST_DESC)) {
- /* Update first desc */
- FIRST_TFD_SET (p_tx_desc_curr, tx_queue);
- p_tx_desc_first = p_tx_desc_curr;
- } else {
- FIRST_TFD_GET (p_tx_desc_first, tx_queue);
- command_status |= ETH_BUFFER_OWNED_BY_DMA;
- }
-
- /* Buffers with a payload smaller than 8 bytes must be aligned to 64-bit */
- /* boundary. We use the memory allocated for Tx descriptor. This memory */
- /* located in TX_BUF_OFFSET_IN_DESC offset within the Tx descriptor. */
- if (p_pkt_info->byte_cnt <= 8) {
- printf ("You have failed in the < 8 bytes errata - fixme\n"); /* RABEEH - TBD */
- return ETH_ERROR;
-
- p_tx_desc_curr->buf_ptr =
- (unsigned int) p_tx_desc_curr + TX_BUF_OFFSET_IN_DESC;
- eth_b_copy (p_pkt_info->buf_ptr, p_tx_desc_curr->buf_ptr,
- p_pkt_info->byte_cnt);
- } else
- p_tx_desc_curr->buf_ptr = p_pkt_info->buf_ptr;
-
- p_tx_desc_curr->byte_cnt = p_pkt_info->byte_cnt;
- p_tx_desc_curr->return_info = p_pkt_info->return_info;
-
- if (p_pkt_info->cmd_sts & (ETH_TX_LAST_DESC)) {
- /* Set last desc with DMA ownership and interrupt enable. */
- p_tx_desc_curr->cmd_sts = command_status |
- ETH_BUFFER_OWNED_BY_DMA | ETH_TX_ENABLE_INTERRUPT;
-
- if (p_tx_desc_curr != p_tx_desc_first)
- p_tx_desc_first->cmd_sts |= ETH_BUFFER_OWNED_BY_DMA;
-
- /* Flush CPU pipe */
-
- D_CACHE_FLUSH_LINE ((unsigned int) p_tx_desc_curr, 0);
- D_CACHE_FLUSH_LINE ((unsigned int) p_tx_desc_first, 0);
- CPU_PIPE_FLUSH;
-
- /* Apply send command */
- ETH_ENABLE_TX_QUEUE (tx_queue, p_eth_port_ctrl->port_num);
-
- /* Finish Tx packet. Update first desc in case of Tx resource error */
- p_tx_desc_first = p_tx_next_desc_curr;
- FIRST_TFD_SET (p_tx_desc_first, tx_queue);
-
- } else {
- p_tx_desc_curr->cmd_sts = command_status;
- D_CACHE_FLUSH_LINE ((unsigned int) p_tx_desc_curr, 0);
- }
-
- /* Check for ring index overlap in the Tx desc ring */
- if (p_tx_next_desc_curr == p_tx_desc_used) {
- /* Update the current descriptor */
- CURR_TFD_SET (p_tx_desc_first, tx_queue);
-
- p_eth_port_ctrl->tx_resource_err[tx_queue] = true;
- return ETH_QUEUE_LAST_RESOURCE;
- } else {
- /* Update the current descriptor */
- CURR_TFD_SET (p_tx_next_desc_curr, tx_queue);
- return ETH_OK;
- }
-}
-
-/*******************************************************************************
- * eth_tx_return_desc - Free all used Tx descriptors
- *
- * DESCRIPTION:
- * This routine returns the transmitted packet information to the caller.
- * It uses the 'first' index to support Tx desc return in case a transmit
- * of a packet spanned over multiple buffer still in process.
- * In case the Tx queue was in "resource error" condition, where there are
- * no available Tx resources, the function resets the resource error flag.
- *
- * INPUT:
- * ETH_PORT_INFO *p_eth_port_ctrl Ethernet Port Control srtuct.
- * ETH_QUEUE tx_queue Number of Tx queue.
- * PKT_INFO *p_pkt_info User packet buffer.
- *
- * OUTPUT:
- * Tx ring 'first' and 'used' indexes are updated.
- *
- * RETURN:
- * ETH_ERROR in case the routine can not access Tx desc ring.
- * ETH_RETRY in case there is transmission in process.
- * ETH_END_OF_JOB if the routine has nothing to release.
- * ETH_OK otherwise.
- *
- *******************************************************************************/
-static ETH_FUNC_RET_STATUS eth_tx_return_desc (ETH_PORT_INFO *
- p_eth_port_ctrl,
- ETH_QUEUE tx_queue,
- PKT_INFO * p_pkt_info)
-{
- volatile ETH_TX_DESC *p_tx_desc_used = NULL;
- volatile ETH_TX_DESC *p_tx_desc_first = NULL;
- unsigned int command_status;
-
-
- /* Get the Tx Desc ring indexes */
- USED_TFD_GET (p_tx_desc_used, tx_queue);
- FIRST_TFD_GET (p_tx_desc_first, tx_queue);
-
-
- /* Sanity check */
- if (p_tx_desc_used == NULL)
- return ETH_ERROR;
-
- command_status = p_tx_desc_used->cmd_sts;
-
- /* Still transmitting... */
- if (command_status & (ETH_BUFFER_OWNED_BY_DMA)) {
- D_CACHE_FLUSH_LINE ((unsigned int) p_tx_desc_used, 0);
- return ETH_RETRY;
- }
-
- /* Stop release. About to overlap the current available Tx descriptor */
- if ((p_tx_desc_used == p_tx_desc_first) &&
- (p_eth_port_ctrl->tx_resource_err[tx_queue] == false)) {
- D_CACHE_FLUSH_LINE ((unsigned int) p_tx_desc_used, 0);
- return ETH_END_OF_JOB;
- }
-
- /* Pass the packet information to the caller */
- p_pkt_info->cmd_sts = command_status;
- p_pkt_info->return_info = p_tx_desc_used->return_info;
- p_tx_desc_used->return_info = 0;
-
- /* Update the next descriptor to release. */
- USED_TFD_SET (TX_NEXT_DESC_PTR (p_tx_desc_used, tx_queue), tx_queue);
-
- /* Any Tx return cancels the Tx resource error status */
- if (p_eth_port_ctrl->tx_resource_err[tx_queue] == true)
- p_eth_port_ctrl->tx_resource_err[tx_queue] = false;
-
- D_CACHE_FLUSH_LINE ((unsigned int) p_tx_desc_used, 0);
-
- return ETH_OK;
-
-}
-
-/*******************************************************************************
- * eth_port_receive - Get received information from Rx ring.
- *
- * DESCRIPTION:
- * This routine returns the received data to the caller. There is no
- * data copying during routine operation. All information is returned
- * using pointer to packet information struct passed from the caller.
- * If the routine exhausts Rx ring resources then the resource error flag
- * is set.
- *
- * INPUT:
- * ETH_PORT_INFO *p_eth_port_ctrl Ethernet Port Control srtuct.
- * ETH_QUEUE rx_queue Number of Rx queue.
- * PKT_INFO *p_pkt_info User packet buffer.
- *
- * OUTPUT:
- * Rx ring current and used indexes are updated.
- *
- * RETURN:
- * ETH_ERROR in case the routine can not access Rx desc ring.
- * ETH_QUEUE_FULL if Rx ring resources are exhausted.
- * ETH_END_OF_JOB if there is no received data.
- * ETH_OK otherwise.
- *
- *******************************************************************************/
-static ETH_FUNC_RET_STATUS eth_port_receive (ETH_PORT_INFO * p_eth_port_ctrl,
- ETH_QUEUE rx_queue,
- PKT_INFO * p_pkt_info)
-{
- volatile ETH_RX_DESC *p_rx_curr_desc;
- volatile ETH_RX_DESC *p_rx_next_curr_desc;
- volatile ETH_RX_DESC *p_rx_used_desc;
- unsigned int command_status;
-
- /* Do not process Rx ring in case of Rx ring resource error */
- if (p_eth_port_ctrl->rx_resource_err[rx_queue] == true) {
- printf ("\nRx Queue is full ...\n");
- return ETH_QUEUE_FULL;
- }
-
- /* Get the Rx Desc ring 'curr and 'used' indexes */
- CURR_RFD_GET (p_rx_curr_desc, rx_queue);
- USED_RFD_GET (p_rx_used_desc, rx_queue);
-
- /* Sanity check */
- if (p_rx_curr_desc == NULL)
- return ETH_ERROR;
-
- /* The following parameters are used to save readings from memory */
- p_rx_next_curr_desc = RX_NEXT_DESC_PTR (p_rx_curr_desc, rx_queue);
- command_status = p_rx_curr_desc->cmd_sts;
-
- /* Nothing to receive... */
- if (command_status & (ETH_BUFFER_OWNED_BY_DMA)) {
-/* DP(printf("Rx: command_status: %08x\n", command_status)); */
- D_CACHE_FLUSH_LINE ((unsigned int) p_rx_curr_desc, 0);
-/* DP(printf("\nETH_END_OF_JOB ...\n"));*/
- return ETH_END_OF_JOB;
- }
-
- p_pkt_info->byte_cnt = (p_rx_curr_desc->byte_cnt) - RX_BUF_OFFSET;
- p_pkt_info->cmd_sts = command_status;
- p_pkt_info->buf_ptr = (p_rx_curr_desc->buf_ptr) + RX_BUF_OFFSET;
- p_pkt_info->return_info = p_rx_curr_desc->return_info;
- p_pkt_info->l4i_chk = p_rx_curr_desc->buf_size; /* IP fragment indicator */
-
- /* Clean the return info field to indicate that the packet has been */
- /* moved to the upper layers */
- p_rx_curr_desc->return_info = 0;
-
- /* Update 'curr' in data structure */
- CURR_RFD_SET (p_rx_next_curr_desc, rx_queue);
-
- /* Rx descriptors resource exhausted. Set the Rx ring resource error flag */
- if (p_rx_next_curr_desc == p_rx_used_desc)
- p_eth_port_ctrl->rx_resource_err[rx_queue] = true;
-
- D_CACHE_FLUSH_LINE ((unsigned int) p_rx_curr_desc, 0);
- CPU_PIPE_FLUSH;
- return ETH_OK;
-}
-
-/*******************************************************************************
- * eth_rx_return_buff - Returns a Rx buffer back to the Rx ring.
- *
- * DESCRIPTION:
- * This routine returns a Rx buffer back to the Rx ring. It retrieves the
- * next 'used' descriptor and attached the returned buffer to it.
- * In case the Rx ring was in "resource error" condition, where there are
- * no available Rx resources, the function resets the resource error flag.
- *
- * INPUT:
- * ETH_PORT_INFO *p_eth_port_ctrl Ethernet Port Control srtuct.
- * ETH_QUEUE rx_queue Number of Rx queue.
- * PKT_INFO *p_pkt_info Information on the returned buffer.
- *
- * OUTPUT:
- * New available Rx resource in Rx descriptor ring.
- *
- * RETURN:
- * ETH_ERROR in case the routine can not access Rx desc ring.
- * ETH_OK otherwise.
- *
- *******************************************************************************/
-static ETH_FUNC_RET_STATUS eth_rx_return_buff (ETH_PORT_INFO *
- p_eth_port_ctrl,
- ETH_QUEUE rx_queue,
- PKT_INFO * p_pkt_info)
-{
- volatile ETH_RX_DESC *p_used_rx_desc; /* Where to return Rx resource */
-
- /* Get 'used' Rx descriptor */
- USED_RFD_GET (p_used_rx_desc, rx_queue);
-
- /* Sanity check */
- if (p_used_rx_desc == NULL)
- return ETH_ERROR;
-
- p_used_rx_desc->buf_ptr = p_pkt_info->buf_ptr;
- p_used_rx_desc->return_info = p_pkt_info->return_info;
- p_used_rx_desc->byte_cnt = p_pkt_info->byte_cnt;
- p_used_rx_desc->buf_size = MV64360_RX_BUFFER_SIZE; /* Reset Buffer size */
-
- /* Flush the write pipe */
- CPU_PIPE_FLUSH;
-
- /* Return the descriptor to DMA ownership */
- p_used_rx_desc->cmd_sts =
- ETH_BUFFER_OWNED_BY_DMA | ETH_RX_ENABLE_INTERRUPT;
-
- /* Flush descriptor and CPU pipe */
- D_CACHE_FLUSH_LINE ((unsigned int) p_used_rx_desc, 0);
- CPU_PIPE_FLUSH;
-
- /* Move the used descriptor pointer to the next descriptor */
- USED_RFD_SET (RX_NEXT_DESC_PTR (p_used_rx_desc, rx_queue), rx_queue);
-
- /* Any Rx return cancels the Rx resource error status */
- if (p_eth_port_ctrl->rx_resource_err[rx_queue] == true)
- p_eth_port_ctrl->rx_resource_err[rx_queue] = false;
-
- return ETH_OK;
-}
-
-/*******************************************************************************
- * eth_port_set_rx_coal - Sets coalescing interrupt mechanism on RX path
- *
- * DESCRIPTION:
- * This routine sets the RX coalescing interrupt mechanism parameter.
- * This parameter is a timeout counter, that counts in 64 t_clk
- * chunks ; that when timeout event occurs a maskable interrupt
- * occurs.
- * The parameter is calculated using the tClk of the MV-643xx chip
- * , and the required delay of the interrupt in usec.
- *
- * INPUT:
- * ETH_PORT eth_port_num Ethernet port number
- * unsigned int t_clk t_clk of the MV-643xx chip in HZ units
- * unsigned int delay Delay in usec
- *
- * OUTPUT:
- * Interrupt coalescing mechanism value is set in MV-643xx chip.
- *
- * RETURN:
- * The interrupt coalescing value set in the gigE port.
- *
- *******************************************************************************/
-#if 0 /* FIXME */
-static unsigned int eth_port_set_rx_coal (ETH_PORT eth_port_num,
- unsigned int t_clk,
- unsigned int delay)
-{
- unsigned int coal;
-
- coal = ((t_clk / 1000000) * delay) / 64;
- /* Set RX Coalescing mechanism */
- MV_REG_WRITE (MV64360_ETH_SDMA_CONFIG_REG (eth_port_num),
- ((coal & 0x3fff) << 8) |
- (MV_REG_READ
- (MV64360_ETH_SDMA_CONFIG_REG (eth_port_num))
- & 0xffc000ff));
- return coal;
-}
-
-#endif
-/*******************************************************************************
- * eth_port_set_tx_coal - Sets coalescing interrupt mechanism on TX path
- *
- * DESCRIPTION:
- * This routine sets the TX coalescing interrupt mechanism parameter.
- * This parameter is a timeout counter, that counts in 64 t_clk
- * chunks ; that when timeout event occurs a maskable interrupt
- * occurs.
- * The parameter is calculated using the t_cLK frequency of the
- * MV-643xx chip and the required delay in the interrupt in uSec
- *
- * INPUT:
- * ETH_PORT eth_port_num Ethernet port number
- * unsigned int t_clk t_clk of the MV-643xx chip in HZ units
- * unsigned int delay Delay in uSeconds
- *
- * OUTPUT:
- * Interrupt coalescing mechanism value is set in MV-643xx chip.
- *
- * RETURN:
- * The interrupt coalescing value set in the gigE port.
- *
- *******************************************************************************/
-#if 0 /* FIXME */
-static unsigned int eth_port_set_tx_coal (ETH_PORT eth_port_num,
- unsigned int t_clk,
- unsigned int delay)
-{
- unsigned int coal;
-
- coal = ((t_clk / 1000000) * delay) / 64;
- /* Set TX Coalescing mechanism */
- MV_REG_WRITE (MV64360_ETH_TX_FIFO_URGENT_THRESHOLD_REG (eth_port_num),
- coal << 4);
- return coal;
-}
-#endif
-
-/*******************************************************************************
- * eth_b_copy - Copy bytes from source to destination
- *
- * DESCRIPTION:
- * This function supports the eight bytes limitation on Tx buffer size.
- * The routine will zero eight bytes starting from the destination address
- * followed by copying bytes from the source address to the destination.
- *
- * INPUT:
- * unsigned int src_addr 32 bit source address.
- * unsigned int dst_addr 32 bit destination address.
- * int byte_count Number of bytes to copy.
- *
- * OUTPUT:
- * See description.
- *
- * RETURN:
- * None.
- *
- *******************************************************************************/
-static void eth_b_copy (unsigned int src_addr, unsigned int dst_addr,
- int byte_count)
-{
- /* Zero the dst_addr area */
- *(unsigned int *) dst_addr = 0x0;
-
- while (byte_count != 0) {
- *(char *) dst_addr = *(char *) src_addr;
- dst_addr++;
- src_addr++;
- byte_count--;
- }
-}
diff --git a/board/Marvell/db64360/mv_eth.h b/board/Marvell/db64360/mv_eth.h
deleted file mode 100644
index 943d30b34a..0000000000
--- a/board/Marvell/db64360/mv_eth.h
+++ /dev/null
@@ -1,844 +0,0 @@
-/*
- * (C) Copyright 2003
- * Ingo Assmus <ingo.assmus@keymile.com>
- *
- * based on - Driver for MV64360X ethernet ports
- * Copyright (C) 2002 rabeeh@galileo.co.il
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * mv_eth.h - header file for the polled mode GT ethernet driver
- */
-
-#ifndef __DB64360_ETH_H__
-#define __DB64360_ETH_H__
-
-#include <asm/types.h>
-#include <asm/io.h>
-#include <asm/byteorder.h>
-#include <common.h>
-#include <net.h>
-#include "mv_regs.h"
-#include "../common/ppc_error_no.h"
-
-
-/*************************************************************************
-**************************************************************************
-**************************************************************************
-* The first part is the high level driver of the gigE ethernet ports. *
-**************************************************************************
-**************************************************************************
-*************************************************************************/
-#ifndef TRUE
-#define TRUE 1
-#endif
-#ifndef FALSE
-#define FALSE 0
-#endif
-
-/* In case not using SG on Tx, define MAX_SKB_FRAGS as 0 */
-#ifndef MAX_SKB_FRAGS
-#define MAX_SKB_FRAGS 0
-#endif
-
-/* Port attributes */
-/*#define MAX_RX_QUEUE_NUM 8*/
-/*#define MAX_TX_QUEUE_NUM 8*/
-#define MAX_RX_QUEUE_NUM 1
-#define MAX_TX_QUEUE_NUM 1
-
-
-/* Use one TX queue and one RX queue */
-#define MV64360_TX_QUEUE_NUM 1
-#define MV64360_RX_QUEUE_NUM 1
-
-/*
- * Number of RX / TX descriptors on RX / TX rings.
- * Note that allocating RX descriptors is done by allocating the RX
- * ring AND a preallocated RX buffers (skb's) for each descriptor.
- * The TX descriptors only allocates the TX descriptors ring,
- * with no pre allocated TX buffers (skb's are allocated by higher layers.
- */
-
-/* Default TX ring size is 10 descriptors */
-#ifdef CONFIG_MV64360_ETH_TXQUEUE_SIZE
-#define MV64360_TX_QUEUE_SIZE CONFIG_MV64360_ETH_TXQUEUE_SIZE
-#else
-#define MV64360_TX_QUEUE_SIZE 4
-#endif
-
-/* Default RX ring size is 4 descriptors */
-#ifdef CONFIG_MV64360_ETH_RXQUEUE_SIZE
-#define MV64360_RX_QUEUE_SIZE CONFIG_MV64360_ETH_RXQUEUE_SIZE
-#else
-#define MV64360_RX_QUEUE_SIZE 4
-#endif
-
-#ifdef CONFIG_RX_BUFFER_SIZE
-#define MV64360_RX_BUFFER_SIZE CONFIG_RX_BUFFER_SIZE
-#else
-#define MV64360_RX_BUFFER_SIZE 1600
-#endif
-
-#ifdef CONFIG_TX_BUFFER_SIZE
-#define MV64360_TX_BUFFER_SIZE CONFIG_TX_BUFFER_SIZE
-#else
-#define MV64360_TX_BUFFER_SIZE 1600
-#endif
-
-
-/*
- * Network device statistics. Akin to the 2.0 ether stats but
- * with byte counters.
- */
-
-struct net_device_stats
-{
- unsigned long rx_packets; /* total packets received */
- unsigned long tx_packets; /* total packets transmitted */
- unsigned long rx_bytes; /* total bytes received */
- unsigned long tx_bytes; /* total bytes transmitted */
- unsigned long rx_errors; /* bad packets received */
- unsigned long tx_errors; /* packet transmit problems */
- unsigned long rx_dropped; /* no space in linux buffers */
- unsigned long tx_dropped; /* no space available in linux */
- unsigned long multicast; /* multicast packets received */
- unsigned long collisions;
-
- /* detailed rx_errors: */
- unsigned long rx_length_errors;
- unsigned long rx_over_errors; /* receiver ring buff overflow */
- unsigned long rx_crc_errors; /* recved pkt with crc error */
- unsigned long rx_frame_errors; /* recv'd frame alignment error */
- unsigned long rx_fifo_errors; /* recv'r fifo overrun */
- unsigned long rx_missed_errors; /* receiver missed packet */
-
- /* detailed tx_errors */
- unsigned long tx_aborted_errors;
- unsigned long tx_carrier_errors;
- unsigned long tx_fifo_errors;
- unsigned long tx_heartbeat_errors;
- unsigned long tx_window_errors;
-
- /* for cslip etc */
- unsigned long rx_compressed;
- unsigned long tx_compressed;
-};
-
-
-/* Private data structure used for ethernet device */
-struct mv64360_eth_priv {
- unsigned int port_num;
- struct net_device_stats *stats;
-
-/* to buffer area aligned */
- char * p_eth_tx_buffer[MV64360_TX_QUEUE_SIZE+1]; /*pointers to alligned tx buffs in memory space */
- char * p_eth_rx_buffer[MV64360_RX_QUEUE_SIZE+1]; /*pointers to allinged rx buffs in memory space */
-
- /* Size of Tx Ring per queue */
- unsigned int tx_ring_size [MAX_TX_QUEUE_NUM];
-
-
- /* Size of Rx Ring per queue */
- unsigned int rx_ring_size [MAX_RX_QUEUE_NUM];
-
- /* Magic Number for Ethernet running */
- unsigned int eth_running;
-
-};
-
-
-int mv64360_eth_init (struct eth_device *dev);
-int mv64360_eth_stop (struct eth_device *dev);
-int mv64360_eth_start_xmit (struct eth_device*, volatile void* packet, int length);
-/* return db64360_eth0_poll(); */
-
-int mv64360_eth_open (struct eth_device *dev);
-
-
-/*************************************************************************
-**************************************************************************
-**************************************************************************
-* The second part is the low level driver of the gigE ethernet ports. *
-**************************************************************************
-**************************************************************************
-*************************************************************************/
-
-
-/********************************************************************************
- * Header File for : MV-643xx network interface header
- *
- * DESCRIPTION:
- * This header file contains macros typedefs and function declaration for
- * the Marvell Gig Bit Ethernet Controller.
- *
- * DEPENDENCIES:
- * None.
- *
- *******************************************************************************/
-
-
-#ifdef CONFIG_SPECIAL_CONSISTENT_MEMORY
-#ifdef CONFIG_MV64360_SRAM_CACHEABLE
-/* In case SRAM is cacheable but not cache coherent */
-#define D_CACHE_FLUSH_LINE(addr, offset) \
-{ \
- __asm__ __volatile__ ("dcbf %0,%1" : : "r" (addr), "r" (offset)); \
-}
-#else
-/* In case SRAM is cache coherent or non-cacheable */
-#define D_CACHE_FLUSH_LINE(addr, offset) ;
-#endif
-#else
-#ifdef CONFIG_NOT_COHERENT_CACHE
-/* In case of descriptors on DDR but not cache coherent */
-#define D_CACHE_FLUSH_LINE(addr, offset) \
-{ \
- __asm__ __volatile__ ("dcbf %0,%1" : : "r" (addr), "r" (offset)); \
-}
-#else
-/* In case of descriptors on DDR and cache coherent */
-#define D_CACHE_FLUSH_LINE(addr, offset) ;
-#endif /* CONFIG_NOT_COHERENT_CACHE */
-#endif /* CONFIG_SPECIAL_CONSISTENT_MEMORY */
-
-
-#define CPU_PIPE_FLUSH \
-{ \
- __asm__ __volatile__ ("eieio"); \
-}
-
-
-/* defines */
-
-/* Default port configuration value */
-#define PORT_CONFIG_VALUE \
- ETH_UNICAST_NORMAL_MODE | \
- ETH_DEFAULT_RX_QUEUE_0 | \
- ETH_DEFAULT_RX_ARP_QUEUE_0 | \
- ETH_RECEIVE_BC_IF_NOT_IP_OR_ARP | \
- ETH_RECEIVE_BC_IF_IP | \
- ETH_RECEIVE_BC_IF_ARP | \
- ETH_CAPTURE_TCP_FRAMES_DIS | \
- ETH_CAPTURE_UDP_FRAMES_DIS | \
- ETH_DEFAULT_RX_TCP_QUEUE_0 | \
- ETH_DEFAULT_RX_UDP_QUEUE_0 | \
- ETH_DEFAULT_RX_BPDU_QUEUE_0
-
-/* Default port extend configuration value */
-#define PORT_CONFIG_EXTEND_VALUE \
- ETH_SPAN_BPDU_PACKETS_AS_NORMAL | \
- ETH_PARTITION_DISABLE
-
-
-/* Default sdma control value */
-#ifdef CONFIG_NOT_COHERENT_CACHE
-#define PORT_SDMA_CONFIG_VALUE \
- ETH_RX_BURST_SIZE_16_64BIT | \
- GT_ETH_IPG_INT_RX(0) | \
- ETH_TX_BURST_SIZE_16_64BIT;
-#else
-#define PORT_SDMA_CONFIG_VALUE \
- ETH_RX_BURST_SIZE_4_64BIT | \
- GT_ETH_IPG_INT_RX(0) | \
- ETH_TX_BURST_SIZE_4_64BIT;
-#endif
-
-#define GT_ETH_IPG_INT_RX(value) \
- ((value & 0x3fff) << 8)
-
-/* Default port serial control value */
-#define PORT_SERIAL_CONTROL_VALUE \
- ETH_FORCE_LINK_PASS | \
- ETH_ENABLE_AUTO_NEG_FOR_DUPLX | \
- ETH_DISABLE_AUTO_NEG_FOR_FLOW_CTRL | \
- ETH_ADV_SYMMETRIC_FLOW_CTRL | \
- ETH_FORCE_FC_MODE_NO_PAUSE_DIS_TX | \
- ETH_FORCE_BP_MODE_NO_JAM | \
- BIT9 | \
- ETH_DO_NOT_FORCE_LINK_FAIL | \
- ETH_RETRANSMIT_16_ETTEMPTS | \
- ETH_ENABLE_AUTO_NEG_SPEED_GMII | \
- ETH_DTE_ADV_0 | \
- ETH_DISABLE_AUTO_NEG_BYPASS | \
- ETH_AUTO_NEG_NO_CHANGE | \
- ETH_MAX_RX_PACKET_1552BYTE | \
- ETH_CLR_EXT_LOOPBACK | \
- ETH_SET_FULL_DUPLEX_MODE | \
- ETH_ENABLE_FLOW_CTRL_TX_RX_IN_FULL_DUPLEX;
-
-#define RX_BUFFER_MAX_SIZE 0xFFFF
-#define TX_BUFFER_MAX_SIZE 0xFFFF /* Buffer are limited to 64k */
-
-#define RX_BUFFER_MIN_SIZE 0x8
-#define TX_BUFFER_MIN_SIZE 0x8
-
-/* Tx WRR confoguration macros */
-#define PORT_MAX_TRAN_UNIT 0x24 /* MTU register (default) 9KByte */
-#define PORT_MAX_TOKEN_BUCKET_SIZE 0x_fFFF /* PMTBS register (default) */
-#define PORT_TOKEN_RATE 1023 /* PTTBRC register (default) */
-
-/* MAC accepet/reject macros */
-#define ACCEPT_MAC_ADDR 0
-#define REJECT_MAC_ADDR 1
-
-/* Size of a Tx/Rx descriptor used in chain list data structure */
-#define RX_DESC_ALIGNED_SIZE 0x20
-#define TX_DESC_ALIGNED_SIZE 0x20
-
-/* An offest in Tx descriptors to store data for buffers less than 8 Bytes */
-#define TX_BUF_OFFSET_IN_DESC 0x18
-/* Buffer offset from buffer pointer */
-#define RX_BUF_OFFSET 0x2
-
-/* Gap define */
-#define ETH_BAR_GAP 0x8
-#define ETH_SIZE_REG_GAP 0x8
-#define ETH_HIGH_ADDR_REMAP_REG_GAP 0x4
-#define ETH_PORT_ACCESS_CTRL_GAP 0x4
-
-/* Gigabit Ethernet Unit Global Registers */
-
-/* MIB Counters register definitions */
-#define ETH_MIB_GOOD_OCTETS_RECEIVED_LOW 0x0
-#define ETH_MIB_GOOD_OCTETS_RECEIVED_HIGH 0x4
-#define ETH_MIB_BAD_OCTETS_RECEIVED 0x8
-#define ETH_MIB_INTERNAL_MAC_TRANSMIT_ERR 0xc
-#define ETH_MIB_GOOD_FRAMES_RECEIVED 0x10
-#define ETH_MIB_BAD_FRAMES_RECEIVED 0x14
-#define ETH_MIB_BROADCAST_FRAMES_RECEIVED 0x18
-#define ETH_MIB_MULTICAST_FRAMES_RECEIVED 0x1c
-#define ETH_MIB_FRAMES_64_OCTETS 0x20
-#define ETH_MIB_FRAMES_65_TO_127_OCTETS 0x24
-#define ETH_MIB_FRAMES_128_TO_255_OCTETS 0x28
-#define ETH_MIB_FRAMES_256_TO_511_OCTETS 0x2c
-#define ETH_MIB_FRAMES_512_TO_1023_OCTETS 0x30
-#define ETH_MIB_FRAMES_1024_TO_MAX_OCTETS 0x34
-#define ETH_MIB_GOOD_OCTETS_SENT_LOW 0x38
-#define ETH_MIB_GOOD_OCTETS_SENT_HIGH 0x3c
-#define ETH_MIB_GOOD_FRAMES_SENT 0x40
-#define ETH_MIB_EXCESSIVE_COLLISION 0x44
-#define ETH_MIB_MULTICAST_FRAMES_SENT 0x48
-#define ETH_MIB_BROADCAST_FRAMES_SENT 0x4c
-#define ETH_MIB_UNREC_MAC_CONTROL_RECEIVED 0x50
-#define ETH_MIB_FC_SENT 0x54
-#define ETH_MIB_GOOD_FC_RECEIVED 0x58
-#define ETH_MIB_BAD_FC_RECEIVED 0x5c
-#define ETH_MIB_UNDERSIZE_RECEIVED 0x60
-#define ETH_MIB_FRAGMENTS_RECEIVED 0x64
-#define ETH_MIB_OVERSIZE_RECEIVED 0x68
-#define ETH_MIB_JABBER_RECEIVED 0x6c
-#define ETH_MIB_MAC_RECEIVE_ERROR 0x70
-#define ETH_MIB_BAD_CRC_EVENT 0x74
-#define ETH_MIB_COLLISION 0x78
-#define ETH_MIB_LATE_COLLISION 0x7c
-
-/* Port serial status reg (PSR) */
-#define ETH_INTERFACE_GMII_MII 0
-#define ETH_INTERFACE_PCM BIT0
-#define ETH_LINK_IS_DOWN 0
-#define ETH_LINK_IS_UP BIT1
-#define ETH_PORT_AT_HALF_DUPLEX 0
-#define ETH_PORT_AT_FULL_DUPLEX BIT2
-#define ETH_RX_FLOW_CTRL_DISABLED 0
-#define ETH_RX_FLOW_CTRL_ENBALED BIT3
-#define ETH_GMII_SPEED_100_10 0
-#define ETH_GMII_SPEED_1000 BIT4
-#define ETH_MII_SPEED_10 0
-#define ETH_MII_SPEED_100 BIT5
-#define ETH_NO_TX 0
-#define ETH_TX_IN_PROGRESS BIT7
-#define ETH_BYPASS_NO_ACTIVE 0
-#define ETH_BYPASS_ACTIVE BIT8
-#define ETH_PORT_NOT_AT_PARTITION_STATE 0
-#define ETH_PORT_AT_PARTITION_STATE BIT9
-#define ETH_PORT_TX_FIFO_NOT_EMPTY 0
-#define ETH_PORT_TX_FIFO_EMPTY BIT10
-
-
-/* These macros describes the Port configuration reg (Px_cR) bits */
-#define ETH_UNICAST_NORMAL_MODE 0
-#define ETH_UNICAST_PROMISCUOUS_MODE BIT0
-#define ETH_DEFAULT_RX_QUEUE_0 0
-#define ETH_DEFAULT_RX_QUEUE_1 BIT1
-#define ETH_DEFAULT_RX_QUEUE_2 BIT2
-#define ETH_DEFAULT_RX_QUEUE_3 (BIT2 | BIT1)
-#define ETH_DEFAULT_RX_QUEUE_4 BIT3
-#define ETH_DEFAULT_RX_QUEUE_5 (BIT3 | BIT1)
-#define ETH_DEFAULT_RX_QUEUE_6 (BIT3 | BIT2)
-#define ETH_DEFAULT_RX_QUEUE_7 (BIT3 | BIT2 | BIT1)
-#define ETH_DEFAULT_RX_ARP_QUEUE_0 0
-#define ETH_DEFAULT_RX_ARP_QUEUE_1 BIT4
-#define ETH_DEFAULT_RX_ARP_QUEUE_2 BIT5
-#define ETH_DEFAULT_RX_ARP_QUEUE_3 (BIT5 | BIT4)
-#define ETH_DEFAULT_RX_ARP_QUEUE_4 BIT6
-#define ETH_DEFAULT_RX_ARP_QUEUE_5 (BIT6 | BIT4)
-#define ETH_DEFAULT_RX_ARP_QUEUE_6 (BIT6 | BIT5)
-#define ETH_DEFAULT_RX_ARP_QUEUE_7 (BIT6 | BIT5 | BIT4)
-#define ETH_RECEIVE_BC_IF_NOT_IP_OR_ARP 0
-#define ETH_REJECT_BC_IF_NOT_IP_OR_ARP BIT7
-#define ETH_RECEIVE_BC_IF_IP 0
-#define ETH_REJECT_BC_IF_IP BIT8
-#define ETH_RECEIVE_BC_IF_ARP 0
-#define ETH_REJECT_BC_IF_ARP BIT9
-#define ETH_TX_AM_NO_UPDATE_ERROR_SUMMARY BIT12
-#define ETH_CAPTURE_TCP_FRAMES_DIS 0
-#define ETH_CAPTURE_TCP_FRAMES_EN BIT14
-#define ETH_CAPTURE_UDP_FRAMES_DIS 0
-#define ETH_CAPTURE_UDP_FRAMES_EN BIT15
-#define ETH_DEFAULT_RX_TCP_QUEUE_0 0
-#define ETH_DEFAULT_RX_TCP_QUEUE_1 BIT16
-#define ETH_DEFAULT_RX_TCP_QUEUE_2 BIT17
-#define ETH_DEFAULT_RX_TCP_QUEUE_3 (BIT17 | BIT16)
-#define ETH_DEFAULT_RX_TCP_QUEUE_4 BIT18
-#define ETH_DEFAULT_RX_TCP_QUEUE_5 (BIT18 | BIT16)
-#define ETH_DEFAULT_RX_TCP_QUEUE_6 (BIT18 | BIT17)
-#define ETH_DEFAULT_RX_TCP_QUEUE_7 (BIT18 | BIT17 | BIT16)
-#define ETH_DEFAULT_RX_UDP_QUEUE_0 0
-#define ETH_DEFAULT_RX_UDP_QUEUE_1 BIT19
-#define ETH_DEFAULT_RX_UDP_QUEUE_2 BIT20
-#define ETH_DEFAULT_RX_UDP_QUEUE_3 (BIT20 | BIT19)
-#define ETH_DEFAULT_RX_UDP_QUEUE_4 (BIT21
-#define ETH_DEFAULT_RX_UDP_QUEUE_5 (BIT21 | BIT19)
-#define ETH_DEFAULT_RX_UDP_QUEUE_6 (BIT21 | BIT20)
-#define ETH_DEFAULT_RX_UDP_QUEUE_7 (BIT21 | BIT20 | BIT19)
-#define ETH_DEFAULT_RX_BPDU_QUEUE_0 0
-#define ETH_DEFAULT_RX_BPDU_QUEUE_1 BIT22
-#define ETH_DEFAULT_RX_BPDU_QUEUE_2 BIT23
-#define ETH_DEFAULT_RX_BPDU_QUEUE_3 (BIT23 | BIT22)
-#define ETH_DEFAULT_RX_BPDU_QUEUE_4 BIT24
-#define ETH_DEFAULT_RX_BPDU_QUEUE_5 (BIT24 | BIT22)
-#define ETH_DEFAULT_RX_BPDU_QUEUE_6 (BIT24 | BIT23)
-#define ETH_DEFAULT_RX_BPDU_QUEUE_7 (BIT24 | BIT23 | BIT22)
-
-
-/* These macros describes the Port configuration extend reg (Px_cXR) bits*/
-#define ETH_CLASSIFY_EN BIT0
-#define ETH_SPAN_BPDU_PACKETS_AS_NORMAL 0
-#define ETH_SPAN_BPDU_PACKETS_TO_RX_QUEUE_7 BIT1
-#define ETH_PARTITION_DISABLE 0
-#define ETH_PARTITION_ENABLE BIT2
-
-
-/* Tx/Rx queue command reg (RQCR/TQCR)*/
-#define ETH_QUEUE_0_ENABLE BIT0
-#define ETH_QUEUE_1_ENABLE BIT1
-#define ETH_QUEUE_2_ENABLE BIT2
-#define ETH_QUEUE_3_ENABLE BIT3
-#define ETH_QUEUE_4_ENABLE BIT4
-#define ETH_QUEUE_5_ENABLE BIT5
-#define ETH_QUEUE_6_ENABLE BIT6
-#define ETH_QUEUE_7_ENABLE BIT7
-#define ETH_QUEUE_0_DISABLE BIT8
-#define ETH_QUEUE_1_DISABLE BIT9
-#define ETH_QUEUE_2_DISABLE BIT10
-#define ETH_QUEUE_3_DISABLE BIT11
-#define ETH_QUEUE_4_DISABLE BIT12
-#define ETH_QUEUE_5_DISABLE BIT13
-#define ETH_QUEUE_6_DISABLE BIT14
-#define ETH_QUEUE_7_DISABLE BIT15
-
-
-/* These macros describes the Port Sdma configuration reg (SDCR) bits */
-#define ETH_RIFB BIT0
-#define ETH_RX_BURST_SIZE_1_64BIT 0
-#define ETH_RX_BURST_SIZE_2_64BIT BIT1
-#define ETH_RX_BURST_SIZE_4_64BIT BIT2
-#define ETH_RX_BURST_SIZE_8_64BIT (BIT2 | BIT1)
-#define ETH_RX_BURST_SIZE_16_64BIT BIT3
-#define ETH_BLM_RX_NO_SWAP BIT4
-#define ETH_BLM_RX_BYTE_SWAP 0
-#define ETH_BLM_TX_NO_SWAP BIT5
-#define ETH_BLM_TX_BYTE_SWAP 0
-#define ETH_DESCRIPTORS_BYTE_SWAP BIT6
-#define ETH_DESCRIPTORS_NO_SWAP 0
-#define ETH_TX_BURST_SIZE_1_64BIT 0
-#define ETH_TX_BURST_SIZE_2_64BIT BIT22
-#define ETH_TX_BURST_SIZE_4_64BIT BIT23
-#define ETH_TX_BURST_SIZE_8_64BIT (BIT23 | BIT22)
-#define ETH_TX_BURST_SIZE_16_64BIT BIT24
-
-
-/* These macros describes the Port serial control reg (PSCR) bits */
-#define ETH_SERIAL_PORT_DISABLE 0
-#define ETH_SERIAL_PORT_ENABLE BIT0
-#define ETH_FORCE_LINK_PASS BIT1
-#define ETH_DO_NOT_FORCE_LINK_PASS 0
-#define ETH_ENABLE_AUTO_NEG_FOR_DUPLX 0
-#define ETH_DISABLE_AUTO_NEG_FOR_DUPLX BIT2
-#define ETH_ENABLE_AUTO_NEG_FOR_FLOW_CTRL 0
-#define ETH_DISABLE_AUTO_NEG_FOR_FLOW_CTRL BIT3
-#define ETH_ADV_NO_FLOW_CTRL 0
-#define ETH_ADV_SYMMETRIC_FLOW_CTRL BIT4
-#define ETH_FORCE_FC_MODE_NO_PAUSE_DIS_TX 0
-#define ETH_FORCE_FC_MODE_TX_PAUSE_DIS BIT5
-#define ETH_FORCE_BP_MODE_NO_JAM 0
-#define ETH_FORCE_BP_MODE_JAM_TX BIT7
-#define ETH_FORCE_BP_MODE_JAM_TX_ON_RX_ERR BIT8
-#define ETH_FORCE_LINK_FAIL 0
-#define ETH_DO_NOT_FORCE_LINK_FAIL BIT10
-#define ETH_RETRANSMIT_16_ETTEMPTS 0
-#define ETH_RETRANSMIT_FOREVER BIT11
-#define ETH_DISABLE_AUTO_NEG_SPEED_GMII BIT13
-#define ETH_ENABLE_AUTO_NEG_SPEED_GMII 0
-#define ETH_DTE_ADV_0 0
-#define ETH_DTE_ADV_1 BIT14
-#define ETH_DISABLE_AUTO_NEG_BYPASS 0
-#define ETH_ENABLE_AUTO_NEG_BYPASS BIT15
-#define ETH_AUTO_NEG_NO_CHANGE 0
-#define ETH_RESTART_AUTO_NEG BIT16
-#define ETH_MAX_RX_PACKET_1518BYTE 0
-#define ETH_MAX_RX_PACKET_1522BYTE BIT17
-#define ETH_MAX_RX_PACKET_1552BYTE BIT18
-#define ETH_MAX_RX_PACKET_9022BYTE (BIT18 | BIT17)
-#define ETH_MAX_RX_PACKET_9192BYTE BIT19
-#define ETH_MAX_RX_PACKET_9700BYTE (BIT19 | BIT17)
-#define ETH_SET_EXT_LOOPBACK BIT20
-#define ETH_CLR_EXT_LOOPBACK 0
-#define ETH_SET_FULL_DUPLEX_MODE BIT21
-#define ETH_SET_HALF_DUPLEX_MODE 0
-#define ETH_ENABLE_FLOW_CTRL_TX_RX_IN_FULL_DUPLEX BIT22
-#define ETH_DISABLE_FLOW_CTRL_TX_RX_IN_FULL_DUPLEX 0
-#define ETH_SET_GMII_SPEED_TO_10_100 0
-#define ETH_SET_GMII_SPEED_TO_1000 BIT23
-#define ETH_SET_MII_SPEED_TO_10 0
-#define ETH_SET_MII_SPEED_TO_100 BIT24
-
-
-/* SMI reg */
-#define ETH_SMI_BUSY BIT28 /* 0 - Write, 1 - Read */
-#define ETH_SMI_READ_VALID BIT27 /* 0 - Write, 1 - Read */
-#define ETH_SMI_OPCODE_WRITE 0 /* Completion of Read operation */
-#define ETH_SMI_OPCODE_READ BIT26 /* Operation is in progress */
-
-/* SDMA command status fields macros */
-
-/* Tx & Rx descriptors status */
-#define ETH_ERROR_SUMMARY (BIT0)
-
-/* Tx & Rx descriptors command */
-#define ETH_BUFFER_OWNED_BY_DMA (BIT31)
-
-/* Tx descriptors status */
-#define ETH_LC_ERROR (0 )
-#define ETH_UR_ERROR (BIT1 )
-#define ETH_RL_ERROR (BIT2 )
-#define ETH_LLC_SNAP_FORMAT (BIT9 )
-
-/* Rx descriptors status */
-#define ETH_CRC_ERROR (0 )
-#define ETH_OVERRUN_ERROR (BIT1 )
-#define ETH_MAX_FRAME_LENGTH_ERROR (BIT2 )
-#define ETH_RESOURCE_ERROR ((BIT2 | BIT1))
-#define ETH_VLAN_TAGGED (BIT19)
-#define ETH_BPDU_FRAME (BIT20)
-#define ETH_TCP_FRAME_OVER_IP_V_4 (0 )
-#define ETH_UDP_FRAME_OVER_IP_V_4 (BIT21)
-#define ETH_OTHER_FRAME_TYPE (BIT22)
-#define ETH_LAYER_2_IS_ETH_V_2 (BIT23)
-#define ETH_FRAME_TYPE_IP_V_4 (BIT24)
-#define ETH_FRAME_HEADER_OK (BIT25)
-#define ETH_RX_LAST_DESC (BIT26)
-#define ETH_RX_FIRST_DESC (BIT27)
-#define ETH_UNKNOWN_DESTINATION_ADDR (BIT28)
-#define ETH_RX_ENABLE_INTERRUPT (BIT29)
-#define ETH_LAYER_4_CHECKSUM_OK (BIT30)
-
-/* Rx descriptors byte count */
-#define ETH_FRAME_FRAGMENTED (BIT2)
-
-/* Tx descriptors command */
-#define ETH_LAYER_4_CHECKSUM_FIRST_DESC (BIT10)
-#define ETH_FRAME_SET_TO_VLAN (BIT15)
-#define ETH_TCP_FRAME (0 )
-#define ETH_UDP_FRAME (BIT16)
-#define ETH_GEN_TCP_UDP_CHECKSUM (BIT17)
-#define ETH_GEN_IP_V_4_CHECKSUM (BIT18)
-#define ETH_ZERO_PADDING (BIT19)
-#define ETH_TX_LAST_DESC (BIT20)
-#define ETH_TX_FIRST_DESC (BIT21)
-#define ETH_GEN_CRC (BIT22)
-#define ETH_TX_ENABLE_INTERRUPT (BIT23)
-#define ETH_AUTO_MODE (BIT30)
-
-/* Address decode parameters */
-/* Ethernet Base Address Register bits */
-#define EBAR_TARGET_DRAM 0x00000000
-#define EBAR_TARGET_DEVICE 0x00000001
-#define EBAR_TARGET_CBS 0x00000002
-#define EBAR_TARGET_PCI0 0x00000003
-#define EBAR_TARGET_PCI1 0x00000004
-#define EBAR_TARGET_CUNIT 0x00000005
-#define EBAR_TARGET_AUNIT 0x00000006
-#define EBAR_TARGET_GUNIT 0x00000007
-
-/* Window attributes */
-#define EBAR_ATTR_DRAM_CS0 0x00000E00
-#define EBAR_ATTR_DRAM_CS1 0x00000D00
-#define EBAR_ATTR_DRAM_CS2 0x00000B00
-#define EBAR_ATTR_DRAM_CS3 0x00000700
-
-/* DRAM Target interface */
-#define EBAR_ATTR_DRAM_NO_CACHE_COHERENCY 0x00000000
-#define EBAR_ATTR_DRAM_CACHE_COHERENCY_WT 0x00001000
-#define EBAR_ATTR_DRAM_CACHE_COHERENCY_WB 0x00002000
-
-/* Device Bus Target interface */
-#define EBAR_ATTR_DEVICE_DEVCS0 0x00001E00
-#define EBAR_ATTR_DEVICE_DEVCS1 0x00001D00
-#define EBAR_ATTR_DEVICE_DEVCS2 0x00001B00
-#define EBAR_ATTR_DEVICE_DEVCS3 0x00001700
-#define EBAR_ATTR_DEVICE_BOOTCS3 0x00000F00
-
-/* PCI Target interface */
-#define EBAR_ATTR_PCI_BYTE_SWAP 0x00000000
-#define EBAR_ATTR_PCI_NO_SWAP 0x00000100
-#define EBAR_ATTR_PCI_BYTE_WORD_SWAP 0x00000200
-#define EBAR_ATTR_PCI_WORD_SWAP 0x00000300
-#define EBAR_ATTR_PCI_NO_SNOOP_NOT_ASSERT 0x00000000
-#define EBAR_ATTR_PCI_NO_SNOOP_ASSERT 0x00000400
-#define EBAR_ATTR_PCI_IO_SPACE 0x00000000
-#define EBAR_ATTR_PCI_MEMORY_SPACE 0x00000800
-#define EBAR_ATTR_PCI_REQ64_FORCE 0x00000000
-#define EBAR_ATTR_PCI_REQ64_SIZE 0x00001000
-
-/* CPU 60x bus or internal SRAM interface */
-#define EBAR_ATTR_CBS_SRAM_BLOCK0 0x00000000
-#define EBAR_ATTR_CBS_SRAM_BLOCK1 0x00000100
-#define EBAR_ATTR_CBS_SRAM 0x00000000
-#define EBAR_ATTR_CBS_CPU_BUS 0x00000800
-
-/* Window access control */
-#define EWIN_ACCESS_NOT_ALLOWED 0
-#define EWIN_ACCESS_READ_ONLY BIT0
-#define EWIN_ACCESS_FULL (BIT1 | BIT0)
-#define EWIN0_ACCESS_MASK 0x0003
-#define EWIN1_ACCESS_MASK 0x000C
-#define EWIN2_ACCESS_MASK 0x0030
-#define EWIN3_ACCESS_MASK 0x00C0
-
-/* typedefs */
-
-typedef enum _eth_port
-{
- ETH_0 = 0,
- ETH_1 = 1,
- ETH_2 = 2
-}ETH_PORT;
-
-typedef enum _eth_func_ret_status
-{
- ETH_OK, /* Returned as expected. */
- ETH_ERROR, /* Fundamental error. */
- ETH_RETRY, /* Could not process request. Try later. */
- ETH_END_OF_JOB, /* Ring has nothing to process. */
- ETH_QUEUE_FULL, /* Ring resource error. */
- ETH_QUEUE_LAST_RESOURCE /* Ring resources about to exhaust. */
-}ETH_FUNC_RET_STATUS;
-
-typedef enum _eth_queue
-{
- ETH_Q0 = 0,
- ETH_Q1 = 1,
- ETH_Q2 = 2,
- ETH_Q3 = 3,
- ETH_Q4 = 4,
- ETH_Q5 = 5,
- ETH_Q6 = 6,
- ETH_Q7 = 7
-} ETH_QUEUE;
-
-typedef enum _addr_win
-{
- ETH_WIN0,
- ETH_WIN1,
- ETH_WIN2,
- ETH_WIN3,
- ETH_WIN4,
- ETH_WIN5
-} ETH_ADDR_WIN;
-
-typedef enum _eth_target
-{
- ETH_TARGET_DRAM ,
- ETH_TARGET_DEVICE,
- ETH_TARGET_CBS ,
- ETH_TARGET_PCI0 ,
- ETH_TARGET_PCI1
-}ETH_TARGET;
-
-typedef struct _eth_rx_desc
-{
- unsigned short byte_cnt ; /* Descriptor buffer byte count */
- unsigned short buf_size ; /* Buffer size */
- unsigned int cmd_sts ; /* Descriptor command status */
- unsigned int next_desc_ptr; /* Next descriptor pointer */
- unsigned int buf_ptr ; /* Descriptor buffer pointer */
- unsigned int return_info ; /* User resource return information */
-} ETH_RX_DESC;
-
-
-typedef struct _eth_tx_desc
-{
- unsigned short byte_cnt ; /* Descriptor buffer byte count */
- unsigned short l4i_chk ; /* CPU provided TCP Checksum */
- unsigned int cmd_sts ; /* Descriptor command status */
- unsigned int next_desc_ptr; /* Next descriptor pointer */
- unsigned int buf_ptr ; /* Descriptor buffer pointer */
- unsigned int return_info ; /* User resource return information */
-} ETH_TX_DESC;
-
-/* Unified struct for Rx and Tx operations. The user is not required to */
-/* be familier with neither Tx nor Rx descriptors. */
-typedef struct _pkt_info
-{
- unsigned short byte_cnt ; /* Descriptor buffer byte count */
- unsigned short l4i_chk ; /* Tx CPU provided TCP Checksum */
- unsigned int cmd_sts ; /* Descriptor command status */
- unsigned int buf_ptr ; /* Descriptor buffer pointer */
- unsigned int return_info ; /* User resource return information */
-} PKT_INFO;
-
-
-typedef struct _eth_win_param
-{
- ETH_ADDR_WIN win; /* Window number. See ETH_ADDR_WIN enum */
- ETH_TARGET target; /* System targets. See ETH_TARGET enum */
- unsigned short attributes; /* BAR attributes. See above macros. */
- unsigned int base_addr; /* Window base address in unsigned int form */
- unsigned int high_addr; /* Window high address in unsigned int form */
- unsigned int size; /* Size in MBytes. Must be % 64Kbyte. */
- bool enable; /* Enable/disable access to the window. */
- unsigned short access_ctrl; /* Access ctrl register. see above macros */
-} ETH_WIN_PARAM;
-
-
-/* Ethernet port specific infomation */
-
-typedef struct _eth_port_ctrl
-{
- ETH_PORT port_num; /* User Ethernet port number */
- int port_phy_addr; /* User phy address of Ethrnet port */
- unsigned char port_mac_addr[6]; /* User defined port MAC address. */
- unsigned int port_config; /* User port configuration value */
- unsigned int port_config_extend; /* User port config extend value */
- unsigned int port_sdma_config; /* User port SDMA config value */
- unsigned int port_serial_control; /* User port serial control value */
- unsigned int port_tx_queue_command; /* Port active Tx queues summary */
- unsigned int port_rx_queue_command; /* Port active Rx queues summary */
-
- /* User function to cast virtual address to CPU bus address */
- unsigned int (*port_virt_to_phys)(unsigned int addr);
- /* User scratch pad for user specific data structures */
- void *port_private;
-
- bool rx_resource_err[MAX_RX_QUEUE_NUM]; /* Rx ring resource error flag */
- bool tx_resource_err[MAX_TX_QUEUE_NUM]; /* Tx ring resource error flag */
-
- /* Tx/Rx rings managment indexes fields. For driver use */
-
- /* Next available Rx resource */
- volatile ETH_RX_DESC *p_rx_curr_desc_q[MAX_RX_QUEUE_NUM];
- /* Returning Rx resource */
- volatile ETH_RX_DESC *p_rx_used_desc_q[MAX_RX_QUEUE_NUM];
-
- /* Next available Tx resource */
- volatile ETH_TX_DESC *p_tx_curr_desc_q[MAX_TX_QUEUE_NUM];
- /* Returning Tx resource */
- volatile ETH_TX_DESC *p_tx_used_desc_q[MAX_TX_QUEUE_NUM];
- /* An extra Tx index to support transmit of multiple buffers per packet */
- volatile ETH_TX_DESC *p_tx_first_desc_q[MAX_TX_QUEUE_NUM];
-
- /* Tx/Rx rings size and base variables fields. For driver use */
-
- volatile ETH_RX_DESC *p_rx_desc_area_base[MAX_RX_QUEUE_NUM];
- unsigned int rx_desc_area_size[MAX_RX_QUEUE_NUM];
- char *p_rx_buffer_base[MAX_RX_QUEUE_NUM];
-
- volatile ETH_TX_DESC *p_tx_desc_area_base[MAX_TX_QUEUE_NUM];
- unsigned int tx_desc_area_size[MAX_TX_QUEUE_NUM];
- char *p_tx_buffer_base[MAX_TX_QUEUE_NUM];
-
-} ETH_PORT_INFO;
-
-
-/* ethernet.h API list */
-
-/* Port operation control routines */
-static void eth_port_init (ETH_PORT_INFO *p_eth_port_ctrl);
-static void eth_port_reset(ETH_PORT eth_port_num);
-static bool eth_port_start(ETH_PORT_INFO *p_eth_port_ctrl);
-
-
-/* Port MAC address routines */
-static void eth_port_uc_addr_set (ETH_PORT eth_port_num,
- unsigned char *p_addr,
- ETH_QUEUE queue);
-#if 0 /* FIXME */
-static void eth_port_mc_addr (ETH_PORT eth_port_num,
- unsigned char *p_addr,
- ETH_QUEUE queue,
- int option);
-#endif
-
-/* PHY and MIB routines */
-static bool ethernet_phy_reset(ETH_PORT eth_port_num);
-
-static bool eth_port_write_smi_reg(ETH_PORT eth_port_num,
- unsigned int phy_reg,
- unsigned int value);
-
-static bool eth_port_read_smi_reg(ETH_PORT eth_port_num,
- unsigned int phy_reg,
- unsigned int* value);
-
-static void eth_clear_mib_counters(ETH_PORT eth_port_num);
-
-/* Port data flow control routines */
-static ETH_FUNC_RET_STATUS eth_port_send (ETH_PORT_INFO *p_eth_port_ctrl,
- ETH_QUEUE tx_queue,
- PKT_INFO *p_pkt_info);
-static ETH_FUNC_RET_STATUS eth_tx_return_desc(ETH_PORT_INFO *p_eth_port_ctrl,
- ETH_QUEUE tx_queue,
- PKT_INFO *p_pkt_info);
-static ETH_FUNC_RET_STATUS eth_port_receive (ETH_PORT_INFO *p_eth_port_ctrl,
- ETH_QUEUE rx_queue,
- PKT_INFO *p_pkt_info);
-static ETH_FUNC_RET_STATUS eth_rx_return_buff(ETH_PORT_INFO *p_eth_port_ctrl,
- ETH_QUEUE rx_queue,
- PKT_INFO *p_pkt_info);
-
-
-static bool ether_init_tx_desc_ring(ETH_PORT_INFO *p_eth_port_ctrl,
- ETH_QUEUE tx_queue,
- int tx_desc_num,
- int tx_buff_size,
- unsigned int tx_desc_base_addr,
- unsigned int tx_buff_base_addr);
-
-static bool ether_init_rx_desc_ring(ETH_PORT_INFO *p_eth_port_ctrl,
- ETH_QUEUE rx_queue,
- int rx_desc_num,
- int rx_buff_size,
- unsigned int rx_desc_base_addr,
- unsigned int rx_buff_base_addr);
-
-#endif /* MV64360_ETH_ */
diff --git a/board/Marvell/db64360/mv_regs.h b/board/Marvell/db64360/mv_regs.h
deleted file mode 100644
index 0d6370b52c..0000000000
--- a/board/Marvell/db64360/mv_regs.h
+++ /dev/null
@@ -1,1124 +0,0 @@
-/*
- * (C) Copyright 2003
- * Ingo Assmus <ingo.assmus@keymile.com>
- *
- * based on - Driver for MV64360X ethernet ports
- * Copyright (C) 2002 rabeeh@galileo.co.il
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/********************************************************************************
-* gt64360r.h - GT-64360 Internal registers definition file.
-*
-* DESCRIPTION:
-* None.
-*
-* DEPENDENCIES:
-* None.
-*
-*******************************************************************************/
-
-#ifndef __INCmv_regsh
-#define __INCmv_regsh
-
-#define MV64360
-
-/* Supported by the Atlantis */
-#define MV64360_INCLUDE_PCI_1
-#define MV64360_INCLUDE_PCI_0_ARBITER
-#define MV64360_INCLUDE_PCI_1_ARBITER
-#define MV64360_INCLUDE_SNOOP_SUPPORT
-#define MV64360_INCLUDE_P2P
-#define MV64360_INCLUDE_ETH_PORT_2
-#define MV64360_INCLUDE_CPU_MAPPING
-#define MV64360_INCLUDE_MPSC
-
-/* Not supported features */
-#undef INCLUDE_CNTMR_4_7
-#undef INCLUDE_DMA_4_7
-
-/****************************************/
-/* Processor Address Space */
-/****************************************/
-
-/* DDR SDRAM BAR and size registers */
-
-#define MV64360_CS_0_BASE_ADDR 0x008
-#define MV64360_CS_0_SIZE 0x010
-#define MV64360_CS_1_BASE_ADDR 0x208
-#define MV64360_CS_1_SIZE 0x210
-#define MV64360_CS_2_BASE_ADDR 0x018
-#define MV64360_CS_2_SIZE 0x020
-#define MV64360_CS_3_BASE_ADDR 0x218
-#define MV64360_CS_3_SIZE 0x220
-
-/* Devices BAR and size registers */
-
-#define MV64360_DEV_CS0_BASE_ADDR 0x028
-#define MV64360_DEV_CS0_SIZE 0x030
-#define MV64360_DEV_CS1_BASE_ADDR 0x228
-#define MV64360_DEV_CS1_SIZE 0x230
-#define MV64360_DEV_CS2_BASE_ADDR 0x248
-#define MV64360_DEV_CS2_SIZE 0x250
-#define MV64360_DEV_CS3_BASE_ADDR 0x038
-#define MV64360_DEV_CS3_SIZE 0x040
-#define MV64360_BOOTCS_BASE_ADDR 0x238
-#define MV64360_BOOTCS_SIZE 0x240
-
-/* PCI 0 BAR and size registers */
-
-#define MV64360_PCI_0_IO_BASE_ADDR 0x048
-#define MV64360_PCI_0_IO_SIZE 0x050
-#define MV64360_PCI_0_MEMORY0_BASE_ADDR 0x058
-#define MV64360_PCI_0_MEMORY0_SIZE 0x060
-#define MV64360_PCI_0_MEMORY1_BASE_ADDR 0x080
-#define MV64360_PCI_0_MEMORY1_SIZE 0x088
-#define MV64360_PCI_0_MEMORY2_BASE_ADDR 0x258
-#define MV64360_PCI_0_MEMORY2_SIZE 0x260
-#define MV64360_PCI_0_MEMORY3_BASE_ADDR 0x280
-#define MV64360_PCI_0_MEMORY3_SIZE 0x288
-
-/* PCI 1 BAR and size registers */
-#define MV64360_PCI_1_IO_BASE_ADDR 0x090
-#define MV64360_PCI_1_IO_SIZE 0x098
-#define MV64360_PCI_1_MEMORY0_BASE_ADDR 0x0a0
-#define MV64360_PCI_1_MEMORY0_SIZE 0x0a8
-#define MV64360_PCI_1_MEMORY1_BASE_ADDR 0x0b0
-#define MV64360_PCI_1_MEMORY1_SIZE 0x0b8
-#define MV64360_PCI_1_MEMORY2_BASE_ADDR 0x2a0
-#define MV64360_PCI_1_MEMORY2_SIZE 0x2a8
-#define MV64360_PCI_1_MEMORY3_BASE_ADDR 0x2b0
-#define MV64360_PCI_1_MEMORY3_SIZE 0x2b8
-
-/* SRAM base address */
-#define MV64360_INTEGRATED_SRAM_BASE_ADDR 0x268
-
-/* internal registers space base address */
-#define MV64360_INTERNAL_SPACE_BASE_ADDR 0x068
-
-/* Enables the CS , DEV_CS , PCI 0 and PCI 1
- windows above */
-#define MV64360_BASE_ADDR_ENABLE 0x278
-
-/****************************************/
-/* PCI remap registers */
-/****************************************/
- /* PCI 0 */
-#define MV64360_PCI_0_IO_ADDR_REMAP 0x0f0
-#define MV64360_PCI_0_MEMORY0_LOW_ADDR_REMAP 0x0f8
-#define MV64360_PCI_0_MEMORY0_HIGH_ADDR_REMAP 0x320
-#define MV64360_PCI_0_MEMORY1_LOW_ADDR_REMAP 0x100
-#define MV64360_PCI_0_MEMORY1_HIGH_ADDR_REMAP 0x328
-#define MV64360_PCI_0_MEMORY2_LOW_ADDR_REMAP 0x2f8
-#define MV64360_PCI_0_MEMORY2_HIGH_ADDR_REMAP 0x330
-#define MV64360_PCI_0_MEMORY3_LOW_ADDR_REMAP 0x300
-#define MV64360_PCI_0_MEMORY3_HIGH_ADDR_REMAP 0x338
- /* PCI 1 */
-#define MV64360_PCI_1_IO_ADDR_REMAP 0x108
-#define MV64360_PCI_1_MEMORY0_LOW_ADDR_REMAP 0x110
-#define MV64360_PCI_1_MEMORY0_HIGH_ADDR_REMAP 0x340
-#define MV64360_PCI_1_MEMORY1_LOW_ADDR_REMAP 0x118
-#define MV64360_PCI_1_MEMORY1_HIGH_ADDR_REMAP 0x348
-#define MV64360_PCI_1_MEMORY2_LOW_ADDR_REMAP 0x310
-#define MV64360_PCI_1_MEMORY2_HIGH_ADDR_REMAP 0x350
-#define MV64360_PCI_1_MEMORY3_LOW_ADDR_REMAP 0x318
-#define MV64360_PCI_1_MEMORY3_HIGH_ADDR_REMAP 0x358
-
-#define MV64360_CPU_PCI_0_HEADERS_RETARGET_CONTROL 0x3b0
-#define MV64360_CPU_PCI_0_HEADERS_RETARGET_BASE 0x3b8
-#define MV64360_CPU_PCI_1_HEADERS_RETARGET_CONTROL 0x3c0
-#define MV64360_CPU_PCI_1_HEADERS_RETARGET_BASE 0x3c8
-#define MV64360_CPU_GE_HEADERS_RETARGET_CONTROL 0x3d0
-#define MV64360_CPU_GE_HEADERS_RETARGET_BASE 0x3d8
-#define MV64360_CPU_IDMA_HEADERS_RETARGET_CONTROL 0x3e0
-#define MV64360_CPU_IDMA_HEADERS_RETARGET_BASE 0x3e8
-
-/****************************************/
-/* CPU Control Registers */
-/****************************************/
-
-#define MV64360_CPU_CONFIG 0x000
-#define MV64360_CPU_MODE 0x120
-#define MV64360_CPU_MASTER_CONTROL 0x160
-#define MV64360_CPU_CROSS_BAR_CONTROL_LOW 0x150
-#define MV64360_CPU_CROSS_BAR_CONTROL_HIGH 0x158
-#define MV64360_CPU_CROSS_BAR_TIMEOUT 0x168
-
-/****************************************/
-/* SMP RegisterS */
-/****************************************/
-
-#define MV64360_SMP_WHO_AM_I 0x200
-#define MV64360_SMP_CPU0_DOORBELL 0x214
-#define MV64360_SMP_CPU0_DOORBELL_CLEAR 0x21C
-#define MV64360_SMP_CPU1_DOORBELL 0x224
-#define MV64360_SMP_CPU1_DOORBELL_CLEAR 0x22C
-#define MV64360_SMP_CPU0_DOORBELL_MASK 0x234
-#define MV64360_SMP_CPU1_DOORBELL_MASK 0x23C
-#define MV64360_SMP_SEMAPHOR0 0x244
-#define MV64360_SMP_SEMAPHOR1 0x24c
-#define MV64360_SMP_SEMAPHOR2 0x254
-#define MV64360_SMP_SEMAPHOR3 0x25c
-#define MV64360_SMP_SEMAPHOR4 0x264
-#define MV64360_SMP_SEMAPHOR5 0x26c
-#define MV64360_SMP_SEMAPHOR6 0x274
-#define MV64360_SMP_SEMAPHOR7 0x27c
-
-/****************************************/
-/* CPU Sync Barrier Register */
-/****************************************/
-
-#define MV64360_CPU_0_SYNC_BARRIER_TRIGGER 0x0c0
-#define MV64360_CPU_0_SYNC_BARRIER_VIRTUAL 0x0c8
-#define MV64360_CPU_1_SYNC_BARRIER_TRIGGER 0x0d0
-#define MV64360_CPU_1_SYNC_BARRIER_VIRTUAL 0x0d8
-
-/****************************************/
-/* CPU Access Protect */
-/****************************************/
-
-#define MV64360_CPU_PROTECT_WINDOW_0_BASE_ADDR 0x180
-#define MV64360_CPU_PROTECT_WINDOW_0_SIZE 0x188
-#define MV64360_CPU_PROTECT_WINDOW_1_BASE_ADDR 0x190
-#define MV64360_CPU_PROTECT_WINDOW_1_SIZE 0x198
-#define MV64360_CPU_PROTECT_WINDOW_2_BASE_ADDR 0x1a0
-#define MV64360_CPU_PROTECT_WINDOW_2_SIZE 0x1a8
-#define MV64360_CPU_PROTECT_WINDOW_3_BASE_ADDR 0x1b0
-#define MV64360_CPU_PROTECT_WINDOW_3_SIZE 0x1b8
-
-
-/****************************************/
-/* CPU Error Report */
-/****************************************/
-
-#define MV64360_CPU_ERROR_ADDR_LOW 0x070
-#define MV64360_CPU_ERROR_ADDR_HIGH 0x078
-#define MV64360_CPU_ERROR_DATA_LOW 0x128
-#define MV64360_CPU_ERROR_DATA_HIGH 0x130
-#define MV64360_CPU_ERROR_PARITY 0x138
-#define MV64360_CPU_ERROR_CAUSE 0x140
-#define MV64360_CPU_ERROR_MASK 0x148
-
-/****************************************/
-/* CPU Interface Debug Registers */
-/****************************************/
-
-#define MV64360_PUNIT_SLAVE_DEBUG_LOW 0x360
-#define MV64360_PUNIT_SLAVE_DEBUG_HIGH 0x368
-#define MV64360_PUNIT_MASTER_DEBUG_LOW 0x370
-#define MV64360_PUNIT_MASTER_DEBUG_HIGH 0x378
-#define MV64360_PUNIT_MMASK 0x3e4
-
-/****************************************/
-/* Integrated SRAM Registers */
-/****************************************/
-
-#define MV64360_SRAM_CONFIG 0x380
-#define MV64360_SRAM_TEST_MODE 0X3F4
-#define MV64360_SRAM_ERROR_CAUSE 0x388
-#define MV64360_SRAM_ERROR_ADDR 0x390
-#define MV64360_SRAM_ERROR_ADDR_HIGH 0X3F8
-#define MV64360_SRAM_ERROR_DATA_LOW 0x398
-#define MV64360_SRAM_ERROR_DATA_HIGH 0x3a0
-#define MV64360_SRAM_ERROR_DATA_PARITY 0x3a8
-
-/****************************************/
-/* SDRAM Configuration */
-/****************************************/
-
-#define MV64360_SDRAM_CONFIG 0x1400
-#define MV64360_D_UNIT_CONTROL_LOW 0x1404
-#define MV64360_D_UNIT_CONTROL_HIGH 0x1424
-#define MV64360_SDRAM_TIMING_CONTROL_LOW 0x1408
-#define MV64360_SDRAM_TIMING_CONTROL_HIGH 0x140c
-#define MV64360_SDRAM_ADDR_CONTROL 0x1410
-#define MV64360_SDRAM_OPEN_PAGES_CONTROL 0x1414
-#define MV64360_SDRAM_OPERATION 0x1418
-#define MV64360_SDRAM_MODE 0x141c
-#define MV64360_EXTENDED_DRAM_MODE 0x1420
-#define MV64360_SDRAM_CROSS_BAR_CONTROL_LOW 0x1430
-#define MV64360_SDRAM_CROSS_BAR_CONTROL_HIGH 0x1434
-#define MV64360_SDRAM_CROSS_BAR_TIMEOUT 0x1438
-#define MV64360_SDRAM_ADDR_CTRL_PADS_CALIBRATION 0x14c0
-#define MV64360_SDRAM_DATA_PADS_CALIBRATION 0x14c4
-
-/****************************************/
-/* SDRAM Error Report */
-/****************************************/
-
-#define MV64360_SDRAM_ERROR_DATA_LOW 0x1444
-#define MV64360_SDRAM_ERROR_DATA_HIGH 0x1440
-#define MV64360_SDRAM_ERROR_ADDR 0x1450
-#define MV64360_SDRAM_RECEIVED_ECC 0x1448
-#define MV64360_SDRAM_CALCULATED_ECC 0x144c
-#define MV64360_SDRAM_ECC_CONTROL 0x1454
-#define MV64360_SDRAM_ECC_ERROR_COUNTER 0x1458
-
-/******************************************/
-/* Controlled Delay Line (CDL) Registers */
-/******************************************/
-
-#define MV64360_DFCDL_CONFIG0 0x1480
-#define MV64360_DFCDL_CONFIG1 0x1484
-#define MV64360_DLL_WRITE 0x1488
-#define MV64360_DLL_READ 0x148c
-#define MV64360_SRAM_ADDR 0x1490
-#define MV64360_SRAM_DATA0 0x1494
-#define MV64360_SRAM_DATA1 0x1498
-#define MV64360_SRAM_DATA2 0x149c
-#define MV64360_DFCL_PROBE 0x14a0
-
-/******************************************/
-/* Debug Registers */
-/******************************************/
-
-#define MV64360_DUNIT_DEBUG_LOW 0x1460
-#define MV64360_DUNIT_DEBUG_HIGH 0x1464
-#define MV64360_DUNIT_MMASK 0X1b40
-
-/****************************************/
-/* Device Parameters */
-/****************************************/
-
-#define MV64360_DEVICE_BANK0_PARAMETERS 0x45c
-#define MV64360_DEVICE_BANK1_PARAMETERS 0x460
-#define MV64360_DEVICE_BANK2_PARAMETERS 0x464
-#define MV64360_DEVICE_BANK3_PARAMETERS 0x468
-#define MV64360_DEVICE_BOOT_BANK_PARAMETERS 0x46c
-#define MV64360_DEVICE_INTERFACE_CONTROL 0x4c0
-#define MV64360_DEVICE_INTERFACE_CROSS_BAR_CONTROL_LOW 0x4c8
-#define MV64360_DEVICE_INTERFACE_CROSS_BAR_CONTROL_HIGH 0x4cc
-#define MV64360_DEVICE_INTERFACE_CROSS_BAR_TIMEOUT 0x4c4
-
-/****************************************/
-/* Device interrupt registers */
-/****************************************/
-
-#define MV64360_DEVICE_INTERRUPT_CAUSE 0x4d0
-#define MV64360_DEVICE_INTERRUPT_MASK 0x4d4
-#define MV64360_DEVICE_ERROR_ADDR 0x4d8
-#define MV64360_DEVICE_ERROR_DATA 0x4dc
-#define MV64360_DEVICE_ERROR_PARITY 0x4e0
-
-/****************************************/
-/* Device debug registers */
-/****************************************/
-
-#define MV64360_DEVICE_DEBUG_LOW 0x4e4
-#define MV64360_DEVICE_DEBUG_HIGH 0x4e8
-#define MV64360_RUNIT_MMASK 0x4f0
-
-/****************************************/
-/* PCI Slave Address Decoding registers */
-/****************************************/
-
-#define MV64360_PCI_0_CS_0_BANK_SIZE 0xc08
-#define MV64360_PCI_1_CS_0_BANK_SIZE 0xc88
-#define MV64360_PCI_0_CS_1_BANK_SIZE 0xd08
-#define MV64360_PCI_1_CS_1_BANK_SIZE 0xd88
-#define MV64360_PCI_0_CS_2_BANK_SIZE 0xc0c
-#define MV64360_PCI_1_CS_2_BANK_SIZE 0xc8c
-#define MV64360_PCI_0_CS_3_BANK_SIZE 0xd0c
-#define MV64360_PCI_1_CS_3_BANK_SIZE 0xd8c
-#define MV64360_PCI_0_DEVCS_0_BANK_SIZE 0xc10
-#define MV64360_PCI_1_DEVCS_0_BANK_SIZE 0xc90
-#define MV64360_PCI_0_DEVCS_1_BANK_SIZE 0xd10
-#define MV64360_PCI_1_DEVCS_1_BANK_SIZE 0xd90
-#define MV64360_PCI_0_DEVCS_2_BANK_SIZE 0xd18
-#define MV64360_PCI_1_DEVCS_2_BANK_SIZE 0xd98
-#define MV64360_PCI_0_DEVCS_3_BANK_SIZE 0xc14
-#define MV64360_PCI_1_DEVCS_3_BANK_SIZE 0xc94
-#define MV64360_PCI_0_DEVCS_BOOT_BANK_SIZE 0xd14
-#define MV64360_PCI_1_DEVCS_BOOT_BANK_SIZE 0xd94
-#define MV64360_PCI_0_P2P_MEM0_BAR_SIZE 0xd1c
-#define MV64360_PCI_1_P2P_MEM0_BAR_SIZE 0xd9c
-#define MV64360_PCI_0_P2P_MEM1_BAR_SIZE 0xd20
-#define MV64360_PCI_1_P2P_MEM1_BAR_SIZE 0xda0
-#define MV64360_PCI_0_P2P_I_O_BAR_SIZE 0xd24
-#define MV64360_PCI_1_P2P_I_O_BAR_SIZE 0xda4
-#define MV64360_PCI_0_CPU_BAR_SIZE 0xd28
-#define MV64360_PCI_1_CPU_BAR_SIZE 0xda8
-#define MV64360_PCI_0_INTERNAL_SRAM_BAR_SIZE 0xe00
-#define MV64360_PCI_1_INTERNAL_SRAM_BAR_SIZE 0xe80
-#define MV64360_PCI_0_EXPANSION_ROM_BAR_SIZE 0xd2c
-#define MV64360_PCI_1_EXPANSION_ROM_BAR_SIZE 0xd9c
-#define MV64360_PCI_0_BASE_ADDR_REG_ENABLE 0xc3c
-#define MV64360_PCI_1_BASE_ADDR_REG_ENABLE 0xcbc
-#define MV64360_PCI_0_CS_0_BASE_ADDR_REMAP 0xc48
-#define MV64360_PCI_1_CS_0_BASE_ADDR_REMAP 0xcc8
-#define MV64360_PCI_0_CS_1_BASE_ADDR_REMAP 0xd48
-#define MV64360_PCI_1_CS_1_BASE_ADDR_REMAP 0xdc8
-#define MV64360_PCI_0_CS_2_BASE_ADDR_REMAP 0xc4c
-#define MV64360_PCI_1_CS_2_BASE_ADDR_REMAP 0xccc
-#define MV64360_PCI_0_CS_3_BASE_ADDR_REMAP 0xd4c
-#define MV64360_PCI_1_CS_3_BASE_ADDR_REMAP 0xdcc
-#define MV64360_PCI_0_CS_0_BASE_HIGH_ADDR_REMAP 0xF04
-#define MV64360_PCI_1_CS_0_BASE_HIGH_ADDR_REMAP 0xF84
-#define MV64360_PCI_0_CS_1_BASE_HIGH_ADDR_REMAP 0xF08
-#define MV64360_PCI_1_CS_1_BASE_HIGH_ADDR_REMAP 0xF88
-#define MV64360_PCI_0_CS_2_BASE_HIGH_ADDR_REMAP 0xF0C
-#define MV64360_PCI_1_CS_2_BASE_HIGH_ADDR_REMAP 0xF8C
-#define MV64360_PCI_0_CS_3_BASE_HIGH_ADDR_REMAP 0xF10
-#define MV64360_PCI_1_CS_3_BASE_HIGH_ADDR_REMAP 0xF90
-#define MV64360_PCI_0_DEVCS_0_BASE_ADDR_REMAP 0xc50
-#define MV64360_PCI_1_DEVCS_0_BASE_ADDR_REMAP 0xcd0
-#define MV64360_PCI_0_DEVCS_1_BASE_ADDR_REMAP 0xd50
-#define MV64360_PCI_1_DEVCS_1_BASE_ADDR_REMAP 0xdd0
-#define MV64360_PCI_0_DEVCS_2_BASE_ADDR_REMAP 0xd58
-#define MV64360_PCI_1_DEVCS_2_BASE_ADDR_REMAP 0xdd8
-#define MV64360_PCI_0_DEVCS_3_BASE_ADDR_REMAP 0xc54
-#define MV64360_PCI_1_DEVCS_3_BASE_ADDR_REMAP 0xcd4
-#define MV64360_PCI_0_DEVCS_BOOTCS_BASE_ADDR_REMAP 0xd54
-#define MV64360_PCI_1_DEVCS_BOOTCS_BASE_ADDR_REMAP 0xdd4
-#define MV64360_PCI_0_P2P_MEM0_BASE_ADDR_REMAP_LOW 0xd5c
-#define MV64360_PCI_1_P2P_MEM0_BASE_ADDR_REMAP_LOW 0xddc
-#define MV64360_PCI_0_P2P_MEM0_BASE_ADDR_REMAP_HIGH 0xd60
-#define MV64360_PCI_1_P2P_MEM0_BASE_ADDR_REMAP_HIGH 0xde0
-#define MV64360_PCI_0_P2P_MEM1_BASE_ADDR_REMAP_LOW 0xd64
-#define MV64360_PCI_1_P2P_MEM1_BASE_ADDR_REMAP_LOW 0xde4
-#define MV64360_PCI_0_P2P_MEM1_BASE_ADDR_REMAP_HIGH 0xd68
-#define MV64360_PCI_1_P2P_MEM1_BASE_ADDR_REMAP_HIGH 0xde8
-#define MV64360_PCI_0_P2P_I_O_BASE_ADDR_REMAP 0xd6c
-#define MV64360_PCI_1_P2P_I_O_BASE_ADDR_REMAP 0xdec
-#define MV64360_PCI_0_CPU_BASE_ADDR_REMAP_LOW 0xd70
-#define MV64360_PCI_1_CPU_BASE_ADDR_REMAP_LOW 0xdf0
-#define MV64360_PCI_0_CPU_BASE_ADDR_REMAP_HIGH 0xd74
-#define MV64360_PCI_1_CPU_BASE_ADDR_REMAP_HIGH 0xdf4
-#define MV64360_PCI_0_INTEGRATED_SRAM_BASE_ADDR_REMAP 0xf00
-#define MV64360_PCI_1_INTEGRATED_SRAM_BASE_ADDR_REMAP 0xf80
-#define MV64360_PCI_0_EXPANSION_ROM_BASE_ADDR_REMAP 0xf38
-#define MV64360_PCI_1_EXPANSION_ROM_BASE_ADDR_REMAP 0xfb8
-#define MV64360_PCI_0_ADDR_DECODE_CONTROL 0xd3c
-#define MV64360_PCI_1_ADDR_DECODE_CONTROL 0xdbc
-#define MV64360_PCI_0_HEADERS_RETARGET_CONTROL 0xF40
-#define MV64360_PCI_1_HEADERS_RETARGET_CONTROL 0xFc0
-#define MV64360_PCI_0_HEADERS_RETARGET_BASE 0xF44
-#define MV64360_PCI_1_HEADERS_RETARGET_BASE 0xFc4
-#define MV64360_PCI_0_HEADERS_RETARGET_HIGH 0xF48
-#define MV64360_PCI_1_HEADERS_RETARGET_HIGH 0xFc8
-
-/***********************************/
-/* PCI Control Register Map */
-/***********************************/
-
-#define MV64360_PCI_0_DLL_STATUS_AND_COMMAND 0x1d20
-#define MV64360_PCI_1_DLL_STATUS_AND_COMMAND 0x1da0
-#define MV64360_PCI_0_MPP_PADS_DRIVE_CONTROL 0x1d1C
-#define MV64360_PCI_1_MPP_PADS_DRIVE_CONTROL 0x1d9C
-#define MV64360_PCI_0_COMMAND 0xc00
-#define MV64360_PCI_1_COMMAND 0xc80
-#define MV64360_PCI_0_MODE 0xd00
-#define MV64360_PCI_1_MODE 0xd80
-#define MV64360_PCI_0_RETRY 0xc04
-#define MV64360_PCI_1_RETRY 0xc84
-#define MV64360_PCI_0_READ_BUFFER_DISCARD_TIMER 0xd04
-#define MV64360_PCI_1_READ_BUFFER_DISCARD_TIMER 0xd84
-#define MV64360_PCI_0_MSI_TRIGGER_TIMER 0xc38
-#define MV64360_PCI_1_MSI_TRIGGER_TIMER 0xcb8
-#define MV64360_PCI_0_ARBITER_CONTROL 0x1d00
-#define MV64360_PCI_1_ARBITER_CONTROL 0x1d80
-#define MV64360_PCI_0_CROSS_BAR_CONTROL_LOW 0x1d08
-#define MV64360_PCI_1_CROSS_BAR_CONTROL_LOW 0x1d88
-#define MV64360_PCI_0_CROSS_BAR_CONTROL_HIGH 0x1d0c
-#define MV64360_PCI_1_CROSS_BAR_CONTROL_HIGH 0x1d8c
-#define MV64360_PCI_0_CROSS_BAR_TIMEOUT 0x1d04
-#define MV64360_PCI_1_CROSS_BAR_TIMEOUT 0x1d84
-#define MV64360_PCI_0_SYNC_BARRIER_TRIGGER_REG 0x1D18
-#define MV64360_PCI_1_SYNC_BARRIER_TRIGGER_REG 0x1D98
-#define MV64360_PCI_0_SYNC_BARRIER_VIRTUAL_REG 0x1d10
-#define MV64360_PCI_1_SYNC_BARRIER_VIRTUAL_REG 0x1d90
-#define MV64360_PCI_0_P2P_CONFIG 0x1d14
-#define MV64360_PCI_1_P2P_CONFIG 0x1d94
-
-#define MV64360_PCI_0_ACCESS_CONTROL_BASE_0_LOW 0x1e00
-#define MV64360_PCI_0_ACCESS_CONTROL_BASE_0_HIGH 0x1e04
-#define MV64360_PCI_0_ACCESS_CONTROL_SIZE_0 0x1e08
-#define MV64360_PCI_0_ACCESS_CONTROL_BASE_1_LOW 0x1e10
-#define MV64360_PCI_0_ACCESS_CONTROL_BASE_1_HIGH 0x1e14
-#define MV64360_PCI_0_ACCESS_CONTROL_SIZE_1 0x1e18
-#define MV64360_PCI_0_ACCESS_CONTROL_BASE_2_LOW 0x1e20
-#define MV64360_PCI_0_ACCESS_CONTROL_BASE_2_HIGH 0x1e24
-#define MV64360_PCI_0_ACCESS_CONTROL_SIZE_2 0x1e28
-#define MV64360_PCI_0_ACCESS_CONTROL_BASE_3_LOW 0x1e30
-#define MV64360_PCI_0_ACCESS_CONTROL_BASE_3_HIGH 0x1e34
-#define MV64360_PCI_0_ACCESS_CONTROL_SIZE_3 0x1e38
-#define MV64360_PCI_0_ACCESS_CONTROL_BASE_4_LOW 0x1e40
-#define MV64360_PCI_0_ACCESS_CONTROL_BASE_4_HIGH 0x1e44
-#define MV64360_PCI_0_ACCESS_CONTROL_SIZE_4 0x1e48
-#define MV64360_PCI_0_ACCESS_CONTROL_BASE_5_LOW 0x1e50
-#define MV64360_PCI_0_ACCESS_CONTROL_BASE_5_HIGH 0x1e54
-#define MV64360_PCI_0_ACCESS_CONTROL_SIZE_5 0x1e58
-
-#define MV64360_PCI_1_ACCESS_CONTROL_BASE_0_LOW 0x1e80
-#define MV64360_PCI_1_ACCESS_CONTROL_BASE_0_HIGH 0x1e84
-#define MV64360_PCI_1_ACCESS_CONTROL_SIZE_0 0x1e88
-#define MV64360_PCI_1_ACCESS_CONTROL_BASE_1_LOW 0x1e90
-#define MV64360_PCI_1_ACCESS_CONTROL_BASE_1_HIGH 0x1e94
-#define MV64360_PCI_1_ACCESS_CONTROL_SIZE_1 0x1e98
-#define MV64360_PCI_1_ACCESS_CONTROL_BASE_2_LOW 0x1ea0
-#define MV64360_PCI_1_ACCESS_CONTROL_BASE_2_HIGH 0x1ea4
-#define MV64360_PCI_1_ACCESS_CONTROL_SIZE_2 0x1ea8
-#define MV64360_PCI_1_ACCESS_CONTROL_BASE_3_LOW 0x1eb0
-#define MV64360_PCI_1_ACCESS_CONTROL_BASE_3_HIGH 0x1eb4
-#define MV64360_PCI_1_ACCESS_CONTROL_SIZE_3 0x1eb8
-#define MV64360_PCI_1_ACCESS_CONTROL_BASE_4_LOW 0x1ec0
-#define MV64360_PCI_1_ACCESS_CONTROL_BASE_4_HIGH 0x1ec4
-#define MV64360_PCI_1_ACCESS_CONTROL_SIZE_4 0x1ec8
-#define MV64360_PCI_1_ACCESS_CONTROL_BASE_5_LOW 0x1ed0
-#define MV64360_PCI_1_ACCESS_CONTROL_BASE_5_HIGH 0x1ed4
-#define MV64360_PCI_1_ACCESS_CONTROL_SIZE_5 0x1ed8
-
-/****************************************/
-/* PCI Configuration Access Registers */
-/****************************************/
-
-#define MV64360_PCI_0_CONFIG_ADDR 0xcf8
-#define MV64360_PCI_0_CONFIG_DATA_VIRTUAL_REG 0xcfc
-#define MV64360_PCI_1_CONFIG_ADDR 0xc78
-#define MV64360_PCI_1_CONFIG_DATA_VIRTUAL_REG 0xc7c
-#define MV64360_PCI_0_INTERRUPT_ACKNOWLEDGE_VIRTUAL_REG 0xc34
-#define MV64360_PCI_1_INTERRUPT_ACKNOWLEDGE_VIRTUAL_REG 0xcb4
-
-/****************************************/
-/* PCI Error Report Registers */
-/****************************************/
-
-#define MV64360_PCI_0_SERR_MASK 0xc28
-#define MV64360_PCI_1_SERR_MASK 0xca8
-#define MV64360_PCI_0_ERROR_ADDR_LOW 0x1d40
-#define MV64360_PCI_1_ERROR_ADDR_LOW 0x1dc0
-#define MV64360_PCI_0_ERROR_ADDR_HIGH 0x1d44
-#define MV64360_PCI_1_ERROR_ADDR_HIGH 0x1dc4
-#define MV64360_PCI_0_ERROR_ATTRIBUTE 0x1d48
-#define MV64360_PCI_1_ERROR_ATTRIBUTE 0x1dc8
-#define MV64360_PCI_0_ERROR_COMMAND 0x1d50
-#define MV64360_PCI_1_ERROR_COMMAND 0x1dd0
-#define MV64360_PCI_0_ERROR_CAUSE 0x1d58
-#define MV64360_PCI_1_ERROR_CAUSE 0x1dd8
-#define MV64360_PCI_0_ERROR_MASK 0x1d5c
-#define MV64360_PCI_1_ERROR_MASK 0x1ddc
-
-/****************************************/
-/* PCI Debug Registers */
-/****************************************/
-
-#define MV64360_PCI_0_MMASK 0X1D24
-#define MV64360_PCI_1_MMASK 0X1DA4
-
-/*********************************************/
-/* PCI Configuration, Function 0, Registers */
-/*********************************************/
-
-#define MV64360_PCI_DEVICE_AND_VENDOR_ID 0x000
-#define MV64360_PCI_STATUS_AND_COMMAND 0x004
-#define MV64360_PCI_CLASS_CODE_AND_REVISION_ID 0x008
-#define MV64360_PCI_BIST_HEADER_TYPE_LATENCY_TIMER_CACHE_LINE 0x00C
-
-#define MV64360_PCI_SCS_0_BASE_ADDR_LOW 0x010
-#define MV64360_PCI_SCS_0_BASE_ADDR_HIGH 0x014
-#define MV64360_PCI_SCS_1_BASE_ADDR_LOW 0x018
-#define MV64360_PCI_SCS_1_BASE_ADDR_HIGH 0x01C
-#define MV64360_PCI_INTERNAL_REG_MEM_MAPPED_BASE_ADDR_LOW 0x020
-#define MV64360_PCI_INTERNAL_REG_MEM_MAPPED_BASE_ADDR_HIGH 0x024
-#define MV64360_PCI_SUBSYSTEM_ID_AND_SUBSYSTEM_VENDOR_ID 0x02c
-#define MV64360_PCI_EXPANSION_ROM_BASE_ADDR_REG 0x030
-#define MV64360_PCI_CAPABILTY_LIST_POINTER 0x034
-#define MV64360_PCI_INTERRUPT_PIN_AND_LINE 0x03C
- /* capability list */
-#define MV64360_PCI_POWER_MANAGEMENT_CAPABILITY 0x040
-#define MV64360_PCI_POWER_MANAGEMENT_STATUS_AND_CONTROL 0x044
-#define MV64360_PCI_VPD_ADDR 0x048
-#define MV64360_PCI_VPD_DATA 0x04c
-#define MV64360_PCI_MSI_MESSAGE_CONTROL 0x050
-#define MV64360_PCI_MSI_MESSAGE_ADDR 0x054
-#define MV64360_PCI_MSI_MESSAGE_UPPER_ADDR 0x058
-#define MV64360_PCI_MSI_MESSAGE_DATA 0x05c
-#define MV64360_PCI_X_COMMAND 0x060
-#define MV64360_PCI_X_STATUS 0x064
-#define MV64360_PCI_COMPACT_PCI_HOT_SWAP 0x068
-
-/***********************************************/
-/* PCI Configuration, Function 1, Registers */
-/***********************************************/
-
-#define MV64360_PCI_SCS_2_BASE_ADDR_LOW 0x110
-#define MV64360_PCI_SCS_2_BASE_ADDR_HIGH 0x114
-#define MV64360_PCI_SCS_3_BASE_ADDR_LOW 0x118
-#define MV64360_PCI_SCS_3_BASE_ADDR_HIGH 0x11c
-#define MV64360_PCI_INTERNAL_SRAM_BASE_ADDR_LOW 0x120
-#define MV64360_PCI_INTERNAL_SRAM_BASE_ADDR_HIGH 0x124
-
-/***********************************************/
-/* PCI Configuration, Function 2, Registers */
-/***********************************************/
-
-#define MV64360_PCI_DEVCS_0_BASE_ADDR_LOW 0x210
-#define MV64360_PCI_DEVCS_0_BASE_ADDR_HIGH 0x214
-#define MV64360_PCI_DEVCS_1_BASE_ADDR_LOW 0x218
-#define MV64360_PCI_DEVCS_1_BASE_ADDR_HIGH 0x21c
-#define MV64360_PCI_DEVCS_2_BASE_ADDR_LOW 0x220
-#define MV64360_PCI_DEVCS_2_BASE_ADDR_HIGH 0x224
-
-/***********************************************/
-/* PCI Configuration, Function 3, Registers */
-/***********************************************/
-
-#define MV64360_PCI_DEVCS_3_BASE_ADDR_LOW 0x310
-#define MV64360_PCI_DEVCS_3_BASE_ADDR_HIGH 0x314
-#define MV64360_PCI_BOOT_CS_BASE_ADDR_LOW 0x318
-#define MV64360_PCI_BOOT_CS_BASE_ADDR_HIGH 0x31c
-#define MV64360_PCI_CPU_BASE_ADDR_LOW 0x220
-#define MV64360_PCI_CPU_BASE_ADDR_HIGH 0x224
-
-/***********************************************/
-/* PCI Configuration, Function 4, Registers */
-/***********************************************/
-
-#define MV64360_PCI_P2P_MEM0_BASE_ADDR_LOW 0x410
-#define MV64360_PCI_P2P_MEM0_BASE_ADDR_HIGH 0x414
-#define MV64360_PCI_P2P_MEM1_BASE_ADDR_LOW 0x418
-#define MV64360_PCI_P2P_MEM1_BASE_ADDR_HIGH 0x41c
-#define MV64360_PCI_P2P_I_O_BASE_ADDR 0x420
-#define MV64360_PCI_INTERNAL_REGS_I_O_MAPPED_BASE_ADDR 0x424
-
-/****************************************/
-/* Messaging Unit Registers (I20) */
-/****************************************/
-
-#define MV64360_I2O_INBOUND_MESSAGE_REG0_PCI_0_SIDE 0x010
-#define MV64360_I2O_INBOUND_MESSAGE_REG1_PCI_0_SIDE 0x014
-#define MV64360_I2O_OUTBOUND_MESSAGE_REG0_PCI_0_SIDE 0x018
-#define MV64360_I2O_OUTBOUND_MESSAGE_REG1_PCI_0_SIDE 0x01C
-#define MV64360_I2O_INBOUND_DOORBELL_REG_PCI_0_SIDE 0x020
-#define MV64360_I2O_INBOUND_INTERRUPT_CAUSE_REG_PCI_0_SIDE 0x024
-#define MV64360_I2O_INBOUND_INTERRUPT_MASK_REG_PCI_0_SIDE 0x028
-#define MV64360_I2O_OUTBOUND_DOORBELL_REG_PCI_0_SIDE 0x02C
-#define MV64360_I2O_OUTBOUND_INTERRUPT_CAUSE_REG_PCI_0_SIDE 0x030
-#define MV64360_I2O_OUTBOUND_INTERRUPT_MASK_REG_PCI_0_SIDE 0x034
-#define MV64360_I2O_INBOUND_QUEUE_PORT_VIRTUAL_REG_PCI_0_SIDE 0x040
-#define MV64360_I2O_OUTBOUND_QUEUE_PORT_VIRTUAL_REG_PCI_0_SIDE 0x044
-#define MV64360_I2O_QUEUE_CONTROL_REG_PCI_0_SIDE 0x050
-#define MV64360_I2O_QUEUE_BASE_ADDR_REG_PCI_0_SIDE 0x054
-#define MV64360_I2O_INBOUND_FREE_HEAD_POINTER_REG_PCI_0_SIDE 0x060
-#define MV64360_I2O_INBOUND_FREE_TAIL_POINTER_REG_PCI_0_SIDE 0x064
-#define MV64360_I2O_INBOUND_POST_HEAD_POINTER_REG_PCI_0_SIDE 0x068
-#define MV64360_I2O_INBOUND_POST_TAIL_POINTER_REG_PCI_0_SIDE 0x06C
-#define MV64360_I2O_OUTBOUND_FREE_HEAD_POINTER_REG_PCI_0_SIDE 0x070
-#define MV64360_I2O_OUTBOUND_FREE_TAIL_POINTER_REG_PCI_0_SIDE 0x074
-#define MV64360_I2O_OUTBOUND_POST_HEAD_POINTER_REG_PCI_0_SIDE 0x0F8
-#define MV64360_I2O_OUTBOUND_POST_TAIL_POINTER_REG_PCI_0_SIDE 0x0FC
-
-#define MV64360_I2O_INBOUND_MESSAGE_REG0_PCI_1_SIDE 0x090
-#define MV64360_I2O_INBOUND_MESSAGE_REG1_PCI_1_SIDE 0x094
-#define MV64360_I2O_OUTBOUND_MESSAGE_REG0_PCI_1_SIDE 0x098
-#define MV64360_I2O_OUTBOUND_MESSAGE_REG1_PCI_1_SIDE 0x09C
-#define MV64360_I2O_INBOUND_DOORBELL_REG_PCI_1_SIDE 0x0A0
-#define MV64360_I2O_INBOUND_INTERRUPT_CAUSE_REG_PCI_1_SIDE 0x0A4
-#define MV64360_I2O_INBOUND_INTERRUPT_MASK_REG_PCI_1_SIDE 0x0A8
-#define MV64360_I2O_OUTBOUND_DOORBELL_REG_PCI_1_SIDE 0x0AC
-#define MV64360_I2O_OUTBOUND_INTERRUPT_CAUSE_REG_PCI_1_SIDE 0x0B0
-#define MV64360_I2O_OUTBOUND_INTERRUPT_MASK_REG_PCI_1_SIDE 0x0B4
-#define MV64360_I2O_INBOUND_QUEUE_PORT_VIRTUAL_REG_PCI_1_SIDE 0x0C0
-#define MV64360_I2O_OUTBOUND_QUEUE_PORT_VIRTUAL_REG_PCI_1_SIDE 0x0C4
-#define MV64360_I2O_QUEUE_CONTROL_REG_PCI_1_SIDE 0x0D0
-#define MV64360_I2O_QUEUE_BASE_ADDR_REG_PCI_1_SIDE 0x0D4
-#define MV64360_I2O_INBOUND_FREE_HEAD_POINTER_REG_PCI_1_SIDE 0x0E0
-#define MV64360_I2O_INBOUND_FREE_TAIL_POINTER_REG_PCI_1_SIDE 0x0E4
-#define MV64360_I2O_INBOUND_POST_HEAD_POINTER_REG_PCI_1_SIDE 0x0E8
-#define MV64360_I2O_INBOUND_POST_TAIL_POINTER_REG_PCI_1_SIDE 0x0EC
-#define MV64360_I2O_OUTBOUND_FREE_HEAD_POINTER_REG_PCI_1_SIDE 0x0F0
-#define MV64360_I2O_OUTBOUND_FREE_TAIL_POINTER_REG_PCI_1_SIDE 0x0F4
-#define MV64360_I2O_OUTBOUND_POST_HEAD_POINTER_REG_PCI_1_SIDE 0x078
-#define MV64360_I2O_OUTBOUND_POST_TAIL_POINTER_REG_PCI_1_SIDE 0x07C
-
-#define MV64360_I2O_INBOUND_MESSAGE_REG0_CPU0_SIDE 0x1C10
-#define MV64360_I2O_INBOUND_MESSAGE_REG1_CPU0_SIDE 0x1C14
-#define MV64360_I2O_OUTBOUND_MESSAGE_REG0_CPU0_SIDE 0x1C18
-#define MV64360_I2O_OUTBOUND_MESSAGE_REG1_CPU0_SIDE 0x1C1C
-#define MV64360_I2O_INBOUND_DOORBELL_REG_CPU0_SIDE 0x1C20
-#define MV64360_I2O_INBOUND_INTERRUPT_CAUSE_REG_CPU0_SIDE 0x1C24
-#define MV64360_I2O_INBOUND_INTERRUPT_MASK_REG_CPU0_SIDE 0x1C28
-#define MV64360_I2O_OUTBOUND_DOORBELL_REG_CPU0_SIDE 0x1C2C
-#define MV64360_I2O_OUTBOUND_INTERRUPT_CAUSE_REG_CPU0_SIDE 0x1C30
-#define MV64360_I2O_OUTBOUND_INTERRUPT_MASK_REG_CPU0_SIDE 0x1C34
-#define MV64360_I2O_INBOUND_QUEUE_PORT_VIRTUAL_REG_CPU0_SIDE 0x1C40
-#define MV64360_I2O_OUTBOUND_QUEUE_PORT_VIRTUAL_REG_CPU0_SIDE 0x1C44
-#define MV64360_I2O_QUEUE_CONTROL_REG_CPU0_SIDE 0x1C50
-#define MV64360_I2O_QUEUE_BASE_ADDR_REG_CPU0_SIDE 0x1C54
-#define MV64360_I2O_INBOUND_FREE_HEAD_POINTER_REG_CPU0_SIDE 0x1C60
-#define MV64360_I2O_INBOUND_FREE_TAIL_POINTER_REG_CPU0_SIDE 0x1C64
-#define MV64360_I2O_INBOUND_POST_HEAD_POINTER_REG_CPU0_SIDE 0x1C68
-#define MV64360_I2O_INBOUND_POST_TAIL_POINTER_REG_CPU0_SIDE 0x1C6C
-#define MV64360_I2O_OUTBOUND_FREE_HEAD_POINTER_REG_CPU0_SIDE 0x1C70
-#define MV64360_I2O_OUTBOUND_FREE_TAIL_POINTER_REG_CPU0_SIDE 0x1C74
-#define MV64360_I2O_OUTBOUND_POST_HEAD_POINTER_REG_CPU0_SIDE 0x1CF8
-#define MV64360_I2O_OUTBOUND_POST_TAIL_POINTER_REG_CPU0_SIDE 0x1CFC
-#define MV64360_I2O_INBOUND_MESSAGE_REG0_CPU1_SIDE 0x1C90
-#define MV64360_I2O_INBOUND_MESSAGE_REG1_CPU1_SIDE 0x1C94
-#define MV64360_I2O_OUTBOUND_MESSAGE_REG0_CPU1_SIDE 0x1C98
-#define MV64360_I2O_OUTBOUND_MESSAGE_REG1_CPU1_SIDE 0x1C9C
-#define MV64360_I2O_INBOUND_DOORBELL_REG_CPU1_SIDE 0x1CA0
-#define MV64360_I2O_INBOUND_INTERRUPT_CAUSE_REG_CPU1_SIDE 0x1CA4
-#define MV64360_I2O_INBOUND_INTERRUPT_MASK_REG_CPU1_SIDE 0x1CA8
-#define MV64360_I2O_OUTBOUND_DOORBELL_REG_CPU1_SIDE 0x1CAC
-#define MV64360_I2O_OUTBOUND_INTERRUPT_CAUSE_REG_CPU1_SIDE 0x1CB0
-#define MV64360_I2O_OUTBOUND_INTERRUPT_MASK_REG_CPU1_SIDE 0x1CB4
-#define MV64360_I2O_INBOUND_QUEUE_PORT_VIRTUAL_REG_CPU1_SIDE 0x1CC0
-#define MV64360_I2O_OUTBOUND_QUEUE_PORT_VIRTUAL_REG_CPU1_SIDE 0x1CC4
-#define MV64360_I2O_QUEUE_CONTROL_REG_CPU1_SIDE 0x1CD0
-#define MV64360_I2O_QUEUE_BASE_ADDR_REG_CPU1_SIDE 0x1CD4
-#define MV64360_I2O_INBOUND_FREE_HEAD_POINTER_REG_CPU1_SIDE 0x1CE0
-#define MV64360_I2O_INBOUND_FREE_TAIL_POINTER_REG_CPU1_SIDE 0x1CE4
-#define MV64360_I2O_INBOUND_POST_HEAD_POINTER_REG_CPU1_SIDE 0x1CE8
-#define MV64360_I2O_INBOUND_POST_TAIL_POINTER_REG_CPU1_SIDE 0x1CEC
-#define MV64360_I2O_OUTBOUND_FREE_HEAD_POINTER_REG_CPU1_SIDE 0x1CF0
-#define MV64360_I2O_OUTBOUND_FREE_TAIL_POINTER_REG_CPU1_SIDE 0x1CF4
-#define MV64360_I2O_OUTBOUND_POST_HEAD_POINTER_REG_CPU1_SIDE 0x1C78
-#define MV64360_I2O_OUTBOUND_POST_TAIL_POINTER_REG_CPU1_SIDE 0x1C7C
-
-/****************************************/
-/* Ethernet Unit Registers */
-/****************************************/
-
-#define MV64360_ETH_PHY_ADDR_REG 0x2000
-#define MV64360_ETH_SMI_REG 0x2004
-#define MV64360_ETH_UNIT_DEFAULT_ADDR_REG 0x2008
-#define MV64360_ETH_UNIT_DEFAULTID_REG 0x200c
-#define MV64360_ETH_UNIT_INTERRUPT_CAUSE_REG 0x2080
-#define MV64360_ETH_UNIT_INTERRUPT_MASK_REG 0x2084
-#define MV64360_ETH_UNIT_INTERNAL_USE_REG 0x24fc
-#define MV64360_ETH_UNIT_ERROR_ADDR_REG 0x2094
-#define MV64360_ETH_BAR_0 0x2200
-#define MV64360_ETH_BAR_1 0x2208
-#define MV64360_ETH_BAR_2 0x2210
-#define MV64360_ETH_BAR_3 0x2218
-#define MV64360_ETH_BAR_4 0x2220
-#define MV64360_ETH_BAR_5 0x2228
-#define MV64360_ETH_SIZE_REG_0 0x2204
-#define MV64360_ETH_SIZE_REG_1 0x220c
-#define MV64360_ETH_SIZE_REG_2 0x2214
-#define MV64360_ETH_SIZE_REG_3 0x221c
-#define MV64360_ETH_SIZE_REG_4 0x2224
-#define MV64360_ETH_SIZE_REG_5 0x222c
-#define MV64360_ETH_HEADERS_RETARGET_BASE_REG 0x2230
-#define MV64360_ETH_HEADERS_RETARGET_CONTROL_REG 0x2234
-#define MV64360_ETH_HIGH_ADDR_REMAP_REG_0 0x2280
-#define MV64360_ETH_HIGH_ADDR_REMAP_REG_1 0x2284
-#define MV64360_ETH_HIGH_ADDR_REMAP_REG_2 0x2288
-#define MV64360_ETH_HIGH_ADDR_REMAP_REG_3 0x228c
-#define MV64360_ETH_BASE_ADDR_ENABLE_REG 0x2290
-#define MV64360_ETH_ACCESS_PROTECTION_REG(port) (0x2294 + (port<<2))
-#define MV64360_ETH_MIB_COUNTERS_BASE(port) (0x3000 + (port<<7))
-#define MV64360_ETH_PORT_CONFIG_REG(port) (0x2400 + (port<<10))
-#define MV64360_ETH_PORT_CONFIG_EXTEND_REG(port) (0x2404 + (port<<10))
-#define MV64360_ETH_MII_SERIAL_PARAMETRS_REG(port) (0x2408 + (port<<10))
-#define MV64360_ETH_GMII_SERIAL_PARAMETRS_REG(port) (0x240c + (port<<10))
-#define MV64360_ETH_VLAN_ETHERTYPE_REG(port) (0x2410 + (port<<10))
-#define MV64360_ETH_MAC_ADDR_LOW(port) (0x2414 + (port<<10))
-#define MV64360_ETH_MAC_ADDR_HIGH(port) (0x2418 + (port<<10))
-#define MV64360_ETH_SDMA_CONFIG_REG(port) (0x241c + (port<<10))
-#define MV64360_ETH_DSCP_0(port) (0x2420 + (port<<10))
-#define MV64360_ETH_DSCP_1(port) (0x2424 + (port<<10))
-#define MV64360_ETH_DSCP_2(port) (0x2428 + (port<<10))
-#define MV64360_ETH_DSCP_3(port) (0x242c + (port<<10))
-#define MV64360_ETH_DSCP_4(port) (0x2430 + (port<<10))
-#define MV64360_ETH_DSCP_5(port) (0x2434 + (port<<10))
-#define MV64360_ETH_DSCP_6(port) (0x2438 + (port<<10))
-#define MV64360_ETH_PORT_SERIAL_CONTROL_REG(port) (0x243c + (port<<10))
-#define MV64360_ETH_VLAN_PRIORITY_TAG_TO_PRIORITY(port) (0x2440 + (port<<10))
-#define MV64360_ETH_PORT_STATUS_REG(port) (0x2444 + (port<<10))
-#define MV64360_ETH_TRANSMIT_QUEUE_COMMAND_REG(port) (0x2448 + (port<<10))
-#define MV64360_ETH_TX_QUEUE_FIXED_PRIORITY(port) (0x244c + (port<<10))
-#define MV64360_ETH_PORT_TX_TOKEN_BUCKET_RATE_CONFIG(port) (0x2450 + (port<<10))
-#define MV64360_ETH_MAXIMUM_TRANSMIT_UNIT(port) (0x2458 + (port<<10))
-#define MV64360_ETH_PORT_MAXIMUM_TOKEN_BUCKET_SIZE(port) (0x245c + (port<<10))
-#define MV64360_ETH_INTERRUPT_CAUSE_REG(port) (0x2460 + (port<<10))
-#define MV64360_ETH_INTERRUPT_CAUSE_EXTEND_REG(port) (0x2464 + (port<<10))
-#define MV64360_ETH_INTERRUPT_MASK_REG(port) (0x2468 + (port<<10))
-#define MV64360_ETH_INTERRUPT_EXTEND_MASK_REG(port) (0x246c + (port<<10))
-#define MV64360_ETH_RX_FIFO_URGENT_THRESHOLD_REG(port) (0x2470 + (port<<10))
-#define MV64360_ETH_TX_FIFO_URGENT_THRESHOLD_REG(port) (0x2474 + (port<<10))
-#define MV64360_ETH_RX_MINIMAL_FRAME_SIZE_REG(port) (0x247c + (port<<10))
-#define MV64360_ETH_RX_DISCARDED_FRAMES_COUNTER(port) (0x2484 + (port<<10)
-#define MV64360_ETH_PORT_DEBUG_0_REG(port) (0x248c + (port<<10))
-#define MV64360_ETH_PORT_DEBUG_1_REG(port) (0x2490 + (port<<10))
-#define MV64360_ETH_PORT_INTERNAL_ADDR_ERROR_REG(port) (0x2494 + (port<<10))
-#define MV64360_ETH_INTERNAL_USE_REG(port) (0x24fc + (port<<10))
-#define MV64360_ETH_RECEIVE_QUEUE_COMMAND_REG(port) (0x2680 + (port<<10))
-#define MV64360_ETH_CURRENT_SERVED_TX_DESC_PTR(port) (0x2684 + (port<<10))
-#define MV64360_ETH_RX_CURRENT_QUEUE_DESC_PTR_0(port) (0x260c + (port<<10))
-#define MV64360_ETH_RX_CURRENT_QUEUE_DESC_PTR_1(port) (0x261c + (port<<10))
-#define MV64360_ETH_RX_CURRENT_QUEUE_DESC_PTR_2(port) (0x262c + (port<<10))
-#define MV64360_ETH_RX_CURRENT_QUEUE_DESC_PTR_3(port) (0x263c + (port<<10))
-#define MV64360_ETH_RX_CURRENT_QUEUE_DESC_PTR_4(port) (0x264c + (port<<10))
-#define MV64360_ETH_RX_CURRENT_QUEUE_DESC_PTR_5(port) (0x265c + (port<<10))
-#define MV64360_ETH_RX_CURRENT_QUEUE_DESC_PTR_6(port) (0x266c + (port<<10))
-#define MV64360_ETH_RX_CURRENT_QUEUE_DESC_PTR_7(port) (0x267c + (port<<10))
-#define MV64360_ETH_TX_CURRENT_QUEUE_DESC_PTR_0(port) (0x26c0 + (port<<10))
-#define MV64360_ETH_TX_CURRENT_QUEUE_DESC_PTR_1(port) (0x26c4 + (port<<10))
-#define MV64360_ETH_TX_CURRENT_QUEUE_DESC_PTR_2(port) (0x26c8 + (port<<10))
-#define MV64360_ETH_TX_CURRENT_QUEUE_DESC_PTR_3(port) (0x26cc + (port<<10))
-#define MV64360_ETH_TX_CURRENT_QUEUE_DESC_PTR_4(port) (0x26d0 + (port<<10))
-#define MV64360_ETH_TX_CURRENT_QUEUE_DESC_PTR_5(port) (0x26d4 + (port<<10))
-#define MV64360_ETH_TX_CURRENT_QUEUE_DESC_PTR_6(port) (0x26d8 + (port<<10))
-#define MV64360_ETH_TX_CURRENT_QUEUE_DESC_PTR_7(port) (0x26dc + (port<<10))
-#define MV64360_ETH_TX_QUEUE_0_TOKEN_BUCKET_COUNT(port) (0x2700 + (port<<10))
-#define MV64360_ETH_TX_QUEUE_1_TOKEN_BUCKET_COUNT(port) (0x2710 + (port<<10))
-#define MV64360_ETH_TX_QUEUE_2_TOKEN_BUCKET_COUNT(port) (0x2720 + (port<<10))
-#define MV64360_ETH_TX_QUEUE_3_TOKEN_BUCKET_COUNT(port) (0x2730 + (port<<10))
-#define MV64360_ETH_TX_QUEUE_4_TOKEN_BUCKET_COUNT(port) (0x2740 + (port<<10))
-#define MV64360_ETH_TX_QUEUE_5_TOKEN_BUCKET_COUNT(port) (0x2750 + (port<<10))
-#define MV64360_ETH_TX_QUEUE_6_TOKEN_BUCKET_COUNT(port) (0x2760 + (port<<10))
-#define MV64360_ETH_TX_QUEUE_7_TOKEN_BUCKET_COUNT(port) (0x2770 + (port<<10))
-#define MV64360_ETH_TX_QUEUE_0_TOKEN_BUCKET_CONFIG(port) (0x2704 + (port<<10))
-#define MV64360_ETH_TX_QUEUE_1_TOKEN_BUCKET_CONFIG(port) (0x2714 + (port<<10))
-#define MV64360_ETH_TX_QUEUE_2_TOKEN_BUCKET_CONFIG(port) (0x2724 + (port<<10))
-#define MV64360_ETH_TX_QUEUE_3_TOKEN_BUCKET_CONFIG(port) (0x2734 + (port<<10))
-#define MV64360_ETH_TX_QUEUE_4_TOKEN_BUCKET_CONFIG(port) (0x2744 + (port<<10))
-#define MV64360_ETH_TX_QUEUE_5_TOKEN_BUCKET_CONFIG(port) (0x2754 + (port<<10))
-#define MV64360_ETH_TX_QUEUE_6_TOKEN_BUCKET_CONFIG(port) (0x2764 + (port<<10))
-#define MV64360_ETH_TX_QUEUE_7_TOKEN_BUCKET_CONFIG(port) (0x2774 + (port<<10))
-#define MV64360_ETH_TX_QUEUE_0_ARBITER_CONFIG(port) (0x2708 + (port<<10))
-#define MV64360_ETH_TX_QUEUE_1_ARBITER_CONFIG(port) (0x2718 + (port<<10))
-#define MV64360_ETH_TX_QUEUE_2_ARBITER_CONFIG(port) (0x2728 + (port<<10))
-#define MV64360_ETH_TX_QUEUE_3_ARBITER_CONFIG(port) (0x2738 + (port<<10))
-#define MV64360_ETH_TX_QUEUE_4_ARBITER_CONFIG(port) (0x2748 + (port<<10))
-#define MV64360_ETH_TX_QUEUE_5_ARBITER_CONFIG(port) (0x2758 + (port<<10))
-#define MV64360_ETH_TX_QUEUE_6_ARBITER_CONFIG(port) (0x2768 + (port<<10))
-#define MV64360_ETH_TX_QUEUE_7_ARBITER_CONFIG(port) (0x2778 + (port<<10))
-#define MV64360_ETH_PORT_TX_TOKEN_BUCKET_COUNT(port) (0x2780 + (port<<10))
-#define MV64360_ETH_DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE(port) (0x3400 + (port<<10))
-#define MV64360_ETH_DA_FILTER_OTHER_MULTICAST_TABLE_BASE(port) (0x3500 + (port<<10))
-#define MV64360_ETH_DA_FILTER_UNICAST_TABLE_BASE(port) (0x3600 + (port<<10))
-
-/*******************************************/
-/* CUNIT Registers */
-/*******************************************/
-
- /* Address Decoding Register Map */
-
-#define MV64360_CUNIT_BASE_ADDR_REG0 0xf200
-#define MV64360_CUNIT_BASE_ADDR_REG1 0xf208
-#define MV64360_CUNIT_BASE_ADDR_REG2 0xf210
-#define MV64360_CUNIT_BASE_ADDR_REG3 0xf218
-#define MV64360_CUNIT_SIZE0 0xf204
-#define MV64360_CUNIT_SIZE1 0xf20c
-#define MV64360_CUNIT_SIZE2 0xf214
-#define MV64360_CUNIT_SIZE3 0xf21c
-#define MV64360_CUNIT_HIGH_ADDR_REMAP_REG0 0xf240
-#define MV64360_CUNIT_HIGH_ADDR_REMAP_REG1 0xf244
-#define MV64360_CUNIT_BASE_ADDR_ENABLE_REG 0xf250
-#define MV64360_MPSC0_ACCESS_PROTECTION_REG 0xf254
-#define MV64360_MPSC1_ACCESS_PROTECTION_REG 0xf258
-#define MV64360_CUNIT_INTERNAL_SPACE_BASE_ADDR_REG 0xf25C
-
- /* Error Report Registers */
-
-#define MV64360_CUNIT_INTERRUPT_CAUSE_REG 0xf310
-#define MV64360_CUNIT_INTERRUPT_MASK_REG 0xf314
-#define MV64360_CUNIT_ERROR_ADDR 0xf318
-
- /* Cunit Control Registers */
-
-#define MV64360_CUNIT_ARBITER_CONTROL_REG 0xf300
-#define MV64360_CUNIT_CONFIG_REG 0xb40c
-#define MV64360_CUNIT_CRROSBAR_TIMEOUT_REG 0xf304
-
- /* Cunit Debug Registers */
-
-#define MV64360_CUNIT_DEBUG_LOW 0xf340
-#define MV64360_CUNIT_DEBUG_HIGH 0xf344
-#define MV64360_CUNIT_MMASK 0xf380
-
- /* Cunit Base Address Enable Window Bits*/
-#define MV64360_CUNIT_BASE_ADDR_WIN_0_BIT 0x0
-#define MV64360_CUNIT_BASE_ADDR_WIN_1_BIT 0x1
-#define MV64360_CUNIT_BASE_ADDR_WIN_2_BIT 0x2
-#define MV64360_CUNIT_BASE_ADDR_WIN_3_BIT 0x3
-
- /* MPSCs Clocks Routing Registers */
-
-#define MV64360_MPSC_ROUTING_REG 0xb400
-#define MV64360_MPSC_RX_CLOCK_ROUTING_REG 0xb404
-#define MV64360_MPSC_TX_CLOCK_ROUTING_REG 0xb408
-
- /* MPSCs Interrupts Registers */
-
-#define MV64360_MPSC_CAUSE_REG(port) (0xb804 + (port<<3))
-#define MV64360_MPSC_MASK_REG(port) (0xb884 + (port<<3))
-
-#define MV64360_MPSC_MAIN_CONFIG_LOW(port) (0x8000 + (port<<12))
-#define MV64360_MPSC_MAIN_CONFIG_HIGH(port) (0x8004 + (port<<12))
-#define MV64360_MPSC_PROTOCOL_CONFIG(port) (0x8008 + (port<<12))
-#define MV64360_MPSC_CHANNEL_REG1(port) (0x800c + (port<<12))
-#define MV64360_MPSC_CHANNEL_REG2(port) (0x8010 + (port<<12))
-#define MV64360_MPSC_CHANNEL_REG3(port) (0x8014 + (port<<12))
-#define MV64360_MPSC_CHANNEL_REG4(port) (0x8018 + (port<<12))
-#define MV64360_MPSC_CHANNEL_REG5(port) (0x801c + (port<<12))
-#define MV64360_MPSC_CHANNEL_REG6(port) (0x8020 + (port<<12))
-#define MV64360_MPSC_CHANNEL_REG7(port) (0x8024 + (port<<12))
-#define MV64360_MPSC_CHANNEL_REG8(port) (0x8028 + (port<<12))
-#define MV64360_MPSC_CHANNEL_REG9(port) (0x802c + (port<<12))
-#define MV64360_MPSC_CHANNEL_REG10(port) (0x8030 + (port<<12))
-
- /* MPSC0 Registers */
-
-
-/***************************************/
-/* SDMA Registers */
-/***************************************/
-
-#define MV64360_SDMA_CONFIG_REG(channel) (0x4000 + (channel<<13))
-#define MV64360_SDMA_COMMAND_REG(channel) (0x4008 + (channel<<13))
-#define MV64360_SDMA_CURRENT_RX_DESCRIPTOR_POINTER(channel) (0x4810 + (channel<<13))
-#define MV64360_SDMA_CURRENT_TX_DESCRIPTOR_POINTER(channel) (0x4c10 + (channel<<13))
-#define MV64360_SDMA_FIRST_TX_DESCRIPTOR_POINTER(channel) (0x4c14 + (channel<<13))
-
-#define MV64360_SDMA_CAUSE_REG 0xb800
-#define MV64360_SDMA_MASK_REG 0xb880
-
-
-/****************************************/
-/* SDMA Address Space Targets */
-/****************************************/
-
-#define MV64360_SDMA_DRAM_CS_0_TARGET 0x0e00
-#define MV64360_SDMA_DRAM_CS_1_TARGET 0x0d00
-#define MV64360_SDMA_DRAM_CS_2_TARGET 0x0b00
-#define MV64360_SDMA_DRAM_CS_3_TARGET 0x0700
-
-#define MV64360_SDMA_DEV_CS_0_TARGET 0x1e01
-#define MV64360_SDMA_DEV_CS_1_TARGET 0x1d01
-#define MV64360_SDMA_DEV_CS_2_TARGET 0x1b01
-#define MV64360_SDMA_DEV_CS_3_TARGET 0x1701
-
-#define MV64360_SDMA_BOOT_CS_TARGET 0x0f00
-
-#define MV64360_SDMA_SRAM_TARGET 0x0003
-#define MV64360_SDMA_60X_BUS_TARGET 0x4003
-
-#define MV64360_PCI_0_TARGET 0x0003
-#define MV64360_PCI_1_TARGET 0x0004
-
-
-/* Devices BAR and size registers */
-
-#define MV64360_DEV_CS0_BASE_ADDR 0x028
-#define MV64360_DEV_CS0_SIZE 0x030
-#define MV64360_DEV_CS1_BASE_ADDR 0x228
-#define MV64360_DEV_CS1_SIZE 0x230
-#define MV64360_DEV_CS2_BASE_ADDR 0x248
-#define MV64360_DEV_CS2_SIZE 0x250
-#define MV64360_DEV_CS3_BASE_ADDR 0x038
-#define MV64360_DEV_CS3_SIZE 0x040
-#define MV64360_BOOTCS_BASE_ADDR 0x238
-#define MV64360_BOOTCS_SIZE 0x240
-
-/* SDMA Window access protection */
-#define MV64360_SDMA_WIN_ACCESS_NOT_ALLOWED 0
-#define MV64360_SDMA_WIN_ACCESS_READ_ONLY 1
-#define MV64360_SDMA_WIN_ACCESS_FULL 2
-
-/* BRG Interrupts */
-
-#define MV64360_BRG_CONFIG_REG(brg) (0xb200 + (brg<<3))
-#define MV64360_BRG_BAUDE_TUNING_REG(brg) (0xb204 + (brg<<3))
-#define MV64360_BRG_CAUSE_REG 0xb834
-#define MV64360_BRG_MASK_REG 0xb8b4
-
-/****************************************/
-/* DMA Channel Control */
-/****************************************/
-
-#define MV64360_DMA_CHANNEL0_CONTROL 0x840
-#define MV64360_DMA_CHANNEL0_CONTROL_HIGH 0x880
-#define MV64360_DMA_CHANNEL1_CONTROL 0x844
-#define MV64360_DMA_CHANNEL1_CONTROL_HIGH 0x884
-#define MV64360_DMA_CHANNEL2_CONTROL 0x848
-#define MV64360_DMA_CHANNEL2_CONTROL_HIGH 0x888
-#define MV64360_DMA_CHANNEL3_CONTROL 0x84C
-#define MV64360_DMA_CHANNEL3_CONTROL_HIGH 0x88C
-
-
-/****************************************/
-/* IDMA Registers */
-/****************************************/
-
-#define MV64360_DMA_CHANNEL0_BYTE_COUNT 0x800
-#define MV64360_DMA_CHANNEL1_BYTE_COUNT 0x804
-#define MV64360_DMA_CHANNEL2_BYTE_COUNT 0x808
-#define MV64360_DMA_CHANNEL3_BYTE_COUNT 0x80C
-#define MV64360_DMA_CHANNEL0_SOURCE_ADDR 0x810
-#define MV64360_DMA_CHANNEL1_SOURCE_ADDR 0x814
-#define MV64360_DMA_CHANNEL2_SOURCE_ADDR 0x818
-#define MV64360_DMA_CHANNEL3_SOURCE_ADDR 0x81c
-#define MV64360_DMA_CHANNEL0_DESTINATION_ADDR 0x820
-#define MV64360_DMA_CHANNEL1_DESTINATION_ADDR 0x824
-#define MV64360_DMA_CHANNEL2_DESTINATION_ADDR 0x828
-#define MV64360_DMA_CHANNEL3_DESTINATION_ADDR 0x82C
-#define MV64360_DMA_CHANNEL0_NEXT_DESCRIPTOR_POINTER 0x830
-#define MV64360_DMA_CHANNEL1_NEXT_DESCRIPTOR_POINTER 0x834
-#define MV64360_DMA_CHANNEL2_NEXT_DESCRIPTOR_POINTER 0x838
-#define MV64360_DMA_CHANNEL3_NEXT_DESCRIPTOR_POINTER 0x83C
-#define MV64360_DMA_CHANNEL0_CURRENT_DESCRIPTOR_POINTER 0x870
-#define MV64360_DMA_CHANNEL1_CURRENT_DESCRIPTOR_POINTER 0x874
-#define MV64360_DMA_CHANNEL2_CURRENT_DESCRIPTOR_POINTER 0x878
-#define MV64360_DMA_CHANNEL3_CURRENT_DESCRIPTOR_POINTER 0x87C
-
- /* IDMA Address Decoding Base Address Registers */
-
-#define MV64360_DMA_BASE_ADDR_REG0 0xa00
-#define MV64360_DMA_BASE_ADDR_REG1 0xa08
-#define MV64360_DMA_BASE_ADDR_REG2 0xa10
-#define MV64360_DMA_BASE_ADDR_REG3 0xa18
-#define MV64360_DMA_BASE_ADDR_REG4 0xa20
-#define MV64360_DMA_BASE_ADDR_REG5 0xa28
-#define MV64360_DMA_BASE_ADDR_REG6 0xa30
-#define MV64360_DMA_BASE_ADDR_REG7 0xa38
-
- /* IDMA Address Decoding Size Address Register */
-
-#define MV64360_DMA_SIZE_REG0 0xa04
-#define MV64360_DMA_SIZE_REG1 0xa0c
-#define MV64360_DMA_SIZE_REG2 0xa14
-#define MV64360_DMA_SIZE_REG3 0xa1c
-#define MV64360_DMA_SIZE_REG4 0xa24
-#define MV64360_DMA_SIZE_REG5 0xa2c
-#define MV64360_DMA_SIZE_REG6 0xa34
-#define MV64360_DMA_SIZE_REG7 0xa3C
-
- /* IDMA Address Decoding High Address Remap and Access
- Protection Registers */
-
-#define MV64360_DMA_HIGH_ADDR_REMAP_REG0 0xa60
-#define MV64360_DMA_HIGH_ADDR_REMAP_REG1 0xa64
-#define MV64360_DMA_HIGH_ADDR_REMAP_REG2 0xa68
-#define MV64360_DMA_HIGH_ADDR_REMAP_REG3 0xa6C
-#define MV64360_DMA_BASE_ADDR_ENABLE_REG 0xa80
-#define MV64360_DMA_CHANNEL0_ACCESS_PROTECTION_REG 0xa70
-#define MV64360_DMA_CHANNEL1_ACCESS_PROTECTION_REG 0xa74
-#define MV64360_DMA_CHANNEL2_ACCESS_PROTECTION_REG 0xa78
-#define MV64360_DMA_CHANNEL3_ACCESS_PROTECTION_REG 0xa7c
-#define MV64360_DMA_ARBITER_CONTROL 0x860
-#define MV64360_DMA_CROSS_BAR_TIMEOUT 0x8d0
-
- /* IDMA Headers Retarget Registers */
-
-#define MV64360_DMA_HEADERS_RETARGET_CONTROL 0xa84
-#define MV64360_DMA_HEADERS_RETARGET_BASE 0xa88
-
- /* IDMA Interrupt Register */
-
-#define MV64360_DMA_INTERRUPT_CAUSE_REG 0x8c0
-#define MV64360_DMA_INTERRUPT_CAUSE_MASK 0x8c4
-#define MV64360_DMA_ERROR_ADDR 0x8c8
-#define MV64360_DMA_ERROR_SELECT 0x8cc
-
- /* IDMA Debug Register ( for internal use ) */
-
-#define MV64360_DMA_DEBUG_LOW 0x8e0
-#define MV64360_DMA_DEBUG_HIGH 0x8e4
-#define MV64360_DMA_SPARE 0xA8C
-
-/****************************************/
-/* Timer_Counter */
-/****************************************/
-
-#define MV64360_TIMER_COUNTER0 0x850
-#define MV64360_TIMER_COUNTER1 0x854
-#define MV64360_TIMER_COUNTER2 0x858
-#define MV64360_TIMER_COUNTER3 0x85C
-#define MV64360_TIMER_COUNTER_0_3_CONTROL 0x864
-#define MV64360_TIMER_COUNTER_0_3_INTERRUPT_CAUSE 0x868
-#define MV64360_TIMER_COUNTER_0_3_INTERRUPT_MASK 0x86c
-
-/****************************************/
-/* Watchdog registers */
-/****************************************/
-
-#define MV64360_WATCHDOG_CONFIG_REG 0xb410
-#define MV64360_WATCHDOG_VALUE_REG 0xb414
-
-/****************************************/
-/* I2C Registers */
-/****************************************/
-
-#define MV64360_I2C_SLAVE_ADDR 0xc000
-#define MV64360_I2C_EXTENDED_SLAVE_ADDR 0xc010
-#define MV64360_I2C_DATA 0xc004
-#define MV64360_I2C_CONTROL 0xc008
-#define MV64360_I2C_STATUS_BAUDE_RATE 0xc00C
-#define MV64360_I2C_SOFT_RESET 0xc01c
-
-/****************************************/
-/* GPP Interface Registers */
-/****************************************/
-
-#define MV64360_GPP_IO_CONTROL 0xf100
-#define MV64360_GPP_LEVEL_CONTROL 0xf110
-#define MV64360_GPP_VALUE 0xf104
-#define MV64360_GPP_INTERRUPT_CAUSE 0xf108
-#define MV64360_GPP_INTERRUPT_MASK0 0xf10c
-#define MV64360_GPP_INTERRUPT_MASK1 0xf114
-#define MV64360_GPP_VALUE_SET 0xf118
-#define MV64360_GPP_VALUE_CLEAR 0xf11c
-
-/****************************************/
-/* Interrupt Controller Registers */
-/****************************************/
-
-/****************************************/
-/* Interrupts */
-/****************************************/
-
-#define MV64360_MAIN_INTERRUPT_CAUSE_LOW 0x004
-#define MV64360_MAIN_INTERRUPT_CAUSE_HIGH 0x00c
-#define MV64360_CPU_INTERRUPT0_MASK_LOW 0x014
-#define MV64360_CPU_INTERRUPT0_MASK_HIGH 0x01c
-#define MV64360_CPU_INTERRUPT0_SELECT_CAUSE 0x024
-#define MV64360_CPU_INTERRUPT1_MASK_LOW 0x034
-#define MV64360_CPU_INTERRUPT1_MASK_HIGH 0x03c
-#define MV64360_CPU_INTERRUPT1_SELECT_CAUSE 0x044
-#define MV64360_INTERRUPT0_MASK_0_LOW 0x054
-#define MV64360_INTERRUPT0_MASK_0_HIGH 0x05c
-#define MV64360_INTERRUPT0_SELECT_CAUSE 0x064
-#define MV64360_INTERRUPT1_MASK_0_LOW 0x074
-#define MV64360_INTERRUPT1_MASK_0_HIGH 0x07c
-#define MV64360_INTERRUPT1_SELECT_CAUSE 0x084
-
-/****************************************/
-/* MPP Interface Registers */
-/****************************************/
-
-#define MV64360_MPP_CONTROL0 0xf000
-#define MV64360_MPP_CONTROL1 0xf004
-#define MV64360_MPP_CONTROL2 0xf008
-#define MV64360_MPP_CONTROL3 0xf00c
-
-/****************************************/
-/* Serial Initialization registers */
-/****************************************/
-
-#define MV64360_SERIAL_INIT_LAST_DATA 0xf324
-#define MV64360_SERIAL_INIT_CONTROL 0xf328
-#define MV64360_SERIAL_INIT_STATUS 0xf32c
-
-
-#endif /* __INCgt64360rh */
diff --git a/board/Marvell/db64360/pci.c b/board/Marvell/db64360/pci.c
deleted file mode 100644
index 5637284124..0000000000
--- a/board/Marvell/db64360/pci.c
+++ /dev/null
@@ -1,940 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- */
-/* PCI.c - PCI functions */
-
-
-#include <common.h>
-#include <pci.h>
-
-#include "../include/pci.h"
-
-#undef DEBUG
-#undef IDE_SET_NATIVE_MODE
-static unsigned int local_buses[] = { 0, 0 };
-
-static const unsigned char pci_irq_swizzle[2][PCI_MAX_DEVICES] = {
- {0, 0, 0, 0, 0, 0, 0, 27, 27, [9 ... PCI_MAX_DEVICES - 1] = 0 },
- {0, 0, 0, 0, 0, 0, 0, 29, 29, [9 ... PCI_MAX_DEVICES - 1] = 0 },
-};
-
-
-#ifdef DEBUG
-static const unsigned int pci_bus_list[] = { PCI_0_MODE, PCI_1_MODE };
-static void gt_pci_bus_mode_display (PCI_HOST host)
-{
- unsigned int mode;
-
-
- mode = (GTREGREAD (pci_bus_list[host]) & (BIT4 | BIT5)) >> 4;
- switch (mode) {
- case 0:
- printf ("PCI %d bus mode: Conventional PCI\n", host);
- break;
- case 1:
- printf ("PCI %d bus mode: 66 Mhz PCIX\n", host);
- break;
- case 2:
- printf ("PCI %d bus mode: 100 Mhz PCIX\n", host);
- break;
- case 3:
- printf ("PCI %d bus mode: 133 Mhz PCIX\n", host);
- break;
- default:
- printf ("Unknown BUS %d\n", mode);
- }
-}
-#endif
-
-static const unsigned int pci_p2p_configuration_reg[] = {
- PCI_0P2P_CONFIGURATION, PCI_1P2P_CONFIGURATION
-};
-
-static const unsigned int pci_configuration_address[] = {
- PCI_0CONFIGURATION_ADDRESS, PCI_1CONFIGURATION_ADDRESS
-};
-
-static const unsigned int pci_configuration_data[] = {
- PCI_0CONFIGURATION_DATA_VIRTUAL_REGISTER,
- PCI_1CONFIGURATION_DATA_VIRTUAL_REGISTER
-};
-
-static const unsigned int pci_error_cause_reg[] = {
- PCI_0ERROR_CAUSE, PCI_1ERROR_CAUSE
-};
-
-static const unsigned int pci_arbiter_control[] = {
- PCI_0ARBITER_CONTROL, PCI_1ARBITER_CONTROL
-};
-
-static const unsigned int pci_address_space_en[] = {
- PCI_0_BASE_ADDR_REG_ENABLE, PCI_1_BASE_ADDR_REG_ENABLE
-};
-
-static const unsigned int pci_snoop_control_base_0_low[] = {
- PCI_0SNOOP_CONTROL_BASE_0_LOW, PCI_1SNOOP_CONTROL_BASE_0_LOW
-};
-static const unsigned int pci_snoop_control_top_0[] = {
- PCI_0SNOOP_CONTROL_TOP_0, PCI_1SNOOP_CONTROL_TOP_0
-};
-
-static const unsigned int pci_access_control_base_0_low[] = {
- PCI_0ACCESS_CONTROL_BASE_0_LOW, PCI_1ACCESS_CONTROL_BASE_0_LOW
-};
-static const unsigned int pci_access_control_top_0[] = {
- PCI_0ACCESS_CONTROL_TOP_0, PCI_1ACCESS_CONTROL_TOP_0
-};
-
-static const unsigned int pci_scs_bank_size[2][4] = {
- {PCI_0SCS_0_BANK_SIZE, PCI_0SCS_1_BANK_SIZE,
- PCI_0SCS_2_BANK_SIZE, PCI_0SCS_3_BANK_SIZE},
- {PCI_1SCS_0_BANK_SIZE, PCI_1SCS_1_BANK_SIZE,
- PCI_1SCS_2_BANK_SIZE, PCI_1SCS_3_BANK_SIZE}
-};
-
-static const unsigned int pci_p2p_configuration[] = {
- PCI_0P2P_CONFIGURATION, PCI_1P2P_CONFIGURATION
-};
-
-
-/********************************************************************
-* pciWriteConfigReg - Write to a PCI configuration register
-* - Make sure the GT is configured as a master before writing
-* to another device on the PCI.
-* - The function takes care of Big/Little endian conversion.
-*
-*
-* Inputs: unsigned int regOffset: The register offset as it apears in the GT spec
-* (or any other PCI device spec)
-* pciDevNum: The device number needs to be addressed.
-*
-* Configuration Address 0xCF8:
-*
-* 31 30 24 23 16 15 11 10 8 7 2 0 <=bit Number
-* |congif|Reserved| Bus |Device|Function|Register|00|
-* |Enable| |Number|Number| Number | Number | | <=field Name
-*
-*********************************************************************/
-void pciWriteConfigReg (PCI_HOST host, unsigned int regOffset,
- unsigned int pciDevNum, unsigned int data)
-{
- volatile unsigned int DataForAddrReg;
- unsigned int functionNum;
- unsigned int busNum = 0;
- unsigned int addr;
-
- if (pciDevNum > 32) /* illegal device Number */
- return;
- if (pciDevNum == SELF) { /* configure our configuration space. */
- pciDevNum =
- (GTREGREAD (pci_p2p_configuration_reg[host]) >> 24) &
- 0x1f;
- busNum = GTREGREAD (pci_p2p_configuration_reg[host]) &
- 0xff0000;
- }
- functionNum = regOffset & 0x00000700;
- pciDevNum = pciDevNum << 11;
- regOffset = regOffset & 0xfc;
- DataForAddrReg =
- (regOffset | pciDevNum | functionNum | busNum) | BIT31;
- GT_REG_WRITE (pci_configuration_address[host], DataForAddrReg);
- GT_REG_READ (pci_configuration_address[host], &addr);
- if (addr != DataForAddrReg)
- return;
- GT_REG_WRITE (pci_configuration_data[host], data);
-}
-
-/********************************************************************
-* pciReadConfigReg - Read from a PCI0 configuration register
-* - Make sure the GT is configured as a master before reading
-* from another device on the PCI.
-* - The function takes care of Big/Little endian conversion.
-* INPUTS: regOffset: The register offset as it apears in the GT spec (or PCI
-* spec)
-* pciDevNum: The device number needs to be addressed.
-* RETURNS: data , if the data == 0xffffffff check the master abort bit in the
-* cause register to make sure the data is valid
-*
-* Configuration Address 0xCF8:
-*
-* 31 30 24 23 16 15 11 10 8 7 2 0 <=bit Number
-* |congif|Reserved| Bus |Device|Function|Register|00|
-* |Enable| |Number|Number| Number | Number | | <=field Name
-*
-*********************************************************************/
-unsigned int pciReadConfigReg (PCI_HOST host, unsigned int regOffset,
- unsigned int pciDevNum)
-{
- volatile unsigned int DataForAddrReg;
- unsigned int data;
- unsigned int functionNum;
- unsigned int busNum = 0;
-
- if (pciDevNum > 32) /* illegal device Number */
- return 0xffffffff;
- if (pciDevNum == SELF) { /* configure our configuration space. */
- pciDevNum =
- (GTREGREAD (pci_p2p_configuration_reg[host]) >> 24) &
- 0x1f;
- busNum = GTREGREAD (pci_p2p_configuration_reg[host]) &
- 0xff0000;
- }
- functionNum = regOffset & 0x00000700;
- pciDevNum = pciDevNum << 11;
- regOffset = regOffset & 0xfc;
- DataForAddrReg =
- (regOffset | pciDevNum | functionNum | busNum) | BIT31;
- GT_REG_WRITE (pci_configuration_address[host], DataForAddrReg);
- GT_REG_READ (pci_configuration_address[host], &data);
- if (data != DataForAddrReg)
- return 0xffffffff;
- GT_REG_READ (pci_configuration_data[host], &data);
- return data;
-}
-
-/********************************************************************
-* pciOverBridgeWriteConfigReg - Write to a PCI configuration register where
-* the agent is placed on another Bus. For more
-* information read P2P in the PCI spec.
-*
-* Inputs: unsigned int regOffset - The register offset as it apears in the
-* GT spec (or any other PCI device spec).
-* unsigned int pciDevNum - The device number needs to be addressed.
-* unsigned int busNum - On which bus does the Target agent connect
-* to.
-* unsigned int data - data to be written.
-*
-* Configuration Address 0xCF8:
-*
-* 31 30 24 23 16 15 11 10 8 7 2 0 <=bit Number
-* |congif|Reserved| Bus |Device|Function|Register|01|
-* |Enable| |Number|Number| Number | Number | | <=field Name
-*
-* The configuration Address is configure as type-I (bits[1:0] = '01') due to
-* PCI spec referring to P2P.
-*
-*********************************************************************/
-void pciOverBridgeWriteConfigReg (PCI_HOST host,
- unsigned int regOffset,
- unsigned int pciDevNum,
- unsigned int busNum, unsigned int data)
-{
- unsigned int DataForReg;
- unsigned int functionNum;
-
- functionNum = regOffset & 0x00000700;
- pciDevNum = pciDevNum << 11;
- regOffset = regOffset & 0xff;
- busNum = busNum << 16;
- if (pciDevNum == SELF) { /* This board */
- DataForReg = (regOffset | pciDevNum | functionNum) | BIT0;
- } else {
- DataForReg = (regOffset | pciDevNum | functionNum | busNum) |
- BIT31 | BIT0;
- }
- GT_REG_WRITE (pci_configuration_address[host], DataForReg);
- GT_REG_WRITE (pci_configuration_data[host], data);
-}
-
-
-/********************************************************************
-* pciOverBridgeReadConfigReg - Read from a PCIn configuration register where
-* the agent target locate on another PCI bus.
-* - Make sure the GT is configured as a master
-* before reading from another device on the PCI.
-* - The function takes care of Big/Little endian
-* conversion.
-* INPUTS: regOffset: The register offset as it apears in the GT spec (or PCI
-* spec). (configuration register offset.)
-* pciDevNum: The device number needs to be addressed.
-* busNum: the Bus number where the agent is place.
-* RETURNS: data , if the data == 0xffffffff check the master abort bit in the
-* cause register to make sure the data is valid
-*
-* Configuration Address 0xCF8:
-*
-* 31 30 24 23 16 15 11 10 8 7 2 0 <=bit Number
-* |congif|Reserved| Bus |Device|Function|Register|01|
-* |Enable| |Number|Number| Number | Number | | <=field Name
-*
-*********************************************************************/
-unsigned int pciOverBridgeReadConfigReg (PCI_HOST host,
- unsigned int regOffset,
- unsigned int pciDevNum,
- unsigned int busNum)
-{
- unsigned int DataForReg;
- unsigned int data;
- unsigned int functionNum;
-
- functionNum = regOffset & 0x00000700;
- pciDevNum = pciDevNum << 11;
- regOffset = regOffset & 0xff;
- busNum = busNum << 16;
- if (pciDevNum == SELF) { /* This board */
- DataForReg = (regOffset | pciDevNum | functionNum) | BIT31;
- } else { /* agent on another bus */
-
- DataForReg = (regOffset | pciDevNum | functionNum | busNum) |
- BIT0 | BIT31;
- }
- GT_REG_WRITE (pci_configuration_address[host], DataForReg);
- GT_REG_READ (pci_configuration_data[host], &data);
- return data;
-}
-
-
-/********************************************************************
-* pciGetRegOffset - Gets the register offset for this region config.
-*
-* INPUT: Bus, Region - The bus and region we ask for its base address.
-* OUTPUT: N/A
-* RETURNS: PCI register base address
-*********************************************************************/
-static unsigned int pciGetRegOffset (PCI_HOST host, PCI_REGION region)
-{
- switch (host) {
- case PCI_HOST0:
- switch (region) {
- case PCI_IO:
- return PCI_0I_O_LOW_DECODE_ADDRESS;
- case PCI_REGION0:
- return PCI_0MEMORY0_LOW_DECODE_ADDRESS;
- case PCI_REGION1:
- return PCI_0MEMORY1_LOW_DECODE_ADDRESS;
- case PCI_REGION2:
- return PCI_0MEMORY2_LOW_DECODE_ADDRESS;
- case PCI_REGION3:
- return PCI_0MEMORY3_LOW_DECODE_ADDRESS;
- }
- case PCI_HOST1:
- switch (region) {
- case PCI_IO:
- return PCI_1I_O_LOW_DECODE_ADDRESS;
- case PCI_REGION0:
- return PCI_1MEMORY0_LOW_DECODE_ADDRESS;
- case PCI_REGION1:
- return PCI_1MEMORY1_LOW_DECODE_ADDRESS;
- case PCI_REGION2:
- return PCI_1MEMORY2_LOW_DECODE_ADDRESS;
- case PCI_REGION3:
- return PCI_1MEMORY3_LOW_DECODE_ADDRESS;
- }
- }
- return PCI_0MEMORY0_LOW_DECODE_ADDRESS;
-}
-
-static unsigned int pciGetRemapOffset (PCI_HOST host, PCI_REGION region)
-{
- switch (host) {
- case PCI_HOST0:
- switch (region) {
- case PCI_IO:
- return PCI_0I_O_ADDRESS_REMAP;
- case PCI_REGION0:
- return PCI_0MEMORY0_ADDRESS_REMAP;
- case PCI_REGION1:
- return PCI_0MEMORY1_ADDRESS_REMAP;
- case PCI_REGION2:
- return PCI_0MEMORY2_ADDRESS_REMAP;
- case PCI_REGION3:
- return PCI_0MEMORY3_ADDRESS_REMAP;
- }
- case PCI_HOST1:
- switch (region) {
- case PCI_IO:
- return PCI_1I_O_ADDRESS_REMAP;
- case PCI_REGION0:
- return PCI_1MEMORY0_ADDRESS_REMAP;
- case PCI_REGION1:
- return PCI_1MEMORY1_ADDRESS_REMAP;
- case PCI_REGION2:
- return PCI_1MEMORY2_ADDRESS_REMAP;
- case PCI_REGION3:
- return PCI_1MEMORY3_ADDRESS_REMAP;
- }
- }
- return PCI_0MEMORY0_ADDRESS_REMAP;
-}
-
-/********************************************************************
-* pciGetBaseAddress - Gets the base address of a PCI.
-* - If the PCI size is 0 then this base address has no meaning!!!
-*
-*
-* INPUT: Bus, Region - The bus and region we ask for its base address.
-* OUTPUT: N/A
-* RETURNS: PCI base address.
-*********************************************************************/
-unsigned int pciGetBaseAddress (PCI_HOST host, PCI_REGION region)
-{
- unsigned int regBase;
- unsigned int regEnd;
- unsigned int regOffset = pciGetRegOffset (host, region);
-
- GT_REG_READ (regOffset, &regBase);
- GT_REG_READ (regOffset + 8, &regEnd);
-
- if (regEnd <= regBase)
- return 0xffffffff; /* ERROR !!! */
-
- regBase = regBase << 16;
- return regBase;
-}
-
-bool pciMapSpace (PCI_HOST host, PCI_REGION region, unsigned int remapBase,
- unsigned int bankBase, unsigned int bankLength)
-{
- unsigned int low = 0xfff;
- unsigned int high = 0x0;
- unsigned int regOffset = pciGetRegOffset (host, region);
- unsigned int remapOffset = pciGetRemapOffset (host, region);
-
- if (bankLength != 0) {
- low = (bankBase >> 16) & 0xffff;
- high = ((bankBase + bankLength) >> 16) - 1;
- }
-
- GT_REG_WRITE (regOffset, low | (1 << 24)); /* no swapping */
- GT_REG_WRITE (regOffset + 8, high);
-
- if (bankLength != 0) { /* must do AFTER writing maps */
- GT_REG_WRITE (remapOffset, remapBase >> 16); /* sorry, 32 bits only.
- dont support upper 32
- in this driver */
- }
- return true;
-}
-
-unsigned int pciGetSpaceBase (PCI_HOST host, PCI_REGION region)
-{
- unsigned int low;
- unsigned int regOffset = pciGetRegOffset (host, region);
-
- GT_REG_READ (regOffset, &low);
- return (low & 0xffff) << 16;
-}
-
-unsigned int pciGetSpaceSize (PCI_HOST host, PCI_REGION region)
-{
- unsigned int low, high;
- unsigned int regOffset = pciGetRegOffset (host, region);
-
- GT_REG_READ (regOffset, &low);
- GT_REG_READ (regOffset + 8, &high);
- return ((high & 0xffff) + 1) << 16;
-}
-
-
-/* ronen - 7/Dec/03*/
-/********************************************************************
-* gtPciDisable/EnableInternalBAR - This function enable/disable PCI BARS.
-* Inputs: one of the PCI BAR
-*********************************************************************/
-void gtPciEnableInternalBAR (PCI_HOST host, PCI_INTERNAL_BAR pciBAR)
-{
- RESET_REG_BITS (pci_address_space_en[host], BIT0 << pciBAR);
-}
-
-void gtPciDisableInternalBAR (PCI_HOST host, PCI_INTERNAL_BAR pciBAR)
-{
- SET_REG_BITS (pci_address_space_en[host], BIT0 << pciBAR);
-}
-
-/********************************************************************
-* pciMapMemoryBank - Maps PCI_host memory bank "bank" for the slave.
-*
-* Inputs: base and size of PCI SCS
-*********************************************************************/
-void pciMapMemoryBank (PCI_HOST host, MEMORY_BANK bank,
- unsigned int pciDramBase, unsigned int pciDramSize)
-{
- /*ronen different function for 3rd bank. */
- unsigned int offset = (bank < 2) ? bank * 8 : 0x100 + (bank - 2) * 8;
-
- pciDramBase = pciDramBase & 0xfffff000;
- pciDramBase = pciDramBase | (pciReadConfigReg (host,
- PCI_SCS_0_BASE_ADDRESS
- + offset,
- SELF) & 0x00000fff);
- pciWriteConfigReg (host, PCI_SCS_0_BASE_ADDRESS + offset, SELF,
- pciDramBase);
- if (pciDramSize == 0)
- pciDramSize++;
- GT_REG_WRITE (pci_scs_bank_size[host][bank], pciDramSize - 1);
- gtPciEnableInternalBAR (host, bank);
-}
-
-/********************************************************************
-* pciSetRegionFeatures - This function modifys one of the 8 regions with
-* feature bits given as an input.
-* - Be advised to check the spec before modifying them.
-* Inputs: PCI_PROTECT_REGION region - one of the eight regions.
-* unsigned int features - See file: pci.h there are defintion for those
-* region features.
-* unsigned int baseAddress - The region base Address.
-* unsigned int topAddress - The region top Address.
-* Returns: false if one of the parameters is erroneous true otherwise.
-*********************************************************************/
-bool pciSetRegionFeatures (PCI_HOST host, PCI_ACCESS_REGIONS region,
- unsigned int features, unsigned int baseAddress,
- unsigned int regionLength)
-{
- unsigned int accessLow;
- unsigned int accessHigh;
- unsigned int accessTop = baseAddress + regionLength;
-
- if (regionLength == 0) { /* close the region. */
- pciDisableAccessRegion (host, region);
- return true;
- }
- /* base Address is store is bits [11:0] */
- accessLow = (baseAddress & 0xfff00000) >> 20;
- /* All the features are update according to the defines in pci.h (to be on
- the safe side we disable bits: [11:0] */
- accessLow = accessLow | (features & 0xfffff000);
- /* write to the Low Access Region register */
- GT_REG_WRITE (pci_access_control_base_0_low[host] + 0x10 * region,
- accessLow);
-
- accessHigh = (accessTop & 0xfff00000) >> 20;
-
- /* write to the High Access Region register */
- GT_REG_WRITE (pci_access_control_top_0[host] + 0x10 * region,
- accessHigh - 1);
- return true;
-}
-
-/********************************************************************
-* pciDisableAccessRegion - Disable The given Region by writing MAX size
-* to its low Address and MIN size to its high Address.
-*
-* Inputs: PCI_ACCESS_REGIONS region - The region we to be Disabled.
-* Returns: N/A.
-*********************************************************************/
-void pciDisableAccessRegion (PCI_HOST host, PCI_ACCESS_REGIONS region)
-{
- /* writing back the registers default values. */
- GT_REG_WRITE (pci_access_control_base_0_low[host] + 0x10 * region,
- 0x01001fff);
- GT_REG_WRITE (pci_access_control_top_0[host] + 0x10 * region, 0);
-}
-
-/********************************************************************
-* pciArbiterEnable - Enables PCI-0`s Arbitration mechanism.
-*
-* Inputs: N/A
-* Returns: true.
-*********************************************************************/
-bool pciArbiterEnable (PCI_HOST host)
-{
- unsigned int regData;
-
- GT_REG_READ (pci_arbiter_control[host], &regData);
- GT_REG_WRITE (pci_arbiter_control[host], regData | BIT31);
- return true;
-}
-
-/********************************************************************
-* pciArbiterDisable - Disable PCI-0`s Arbitration mechanism.
-*
-* Inputs: N/A
-* Returns: true
-*********************************************************************/
-bool pciArbiterDisable (PCI_HOST host)
-{
- unsigned int regData;
-
- GT_REG_READ (pci_arbiter_control[host], &regData);
- GT_REG_WRITE (pci_arbiter_control[host], regData & 0x7fffffff);
- return true;
-}
-
-/********************************************************************
-* pciSetArbiterAgentsPriority - Priority setup for the PCI agents (Hi or Low)
-*
-* Inputs: PCI_AGENT_PRIO internalAgent - priotity for internal agent.
-* PCI_AGENT_PRIO externalAgent0 - priotity for external#0 agent.
-* PCI_AGENT_PRIO externalAgent1 - priotity for external#1 agent.
-* PCI_AGENT_PRIO externalAgent2 - priotity for external#2 agent.
-* PCI_AGENT_PRIO externalAgent3 - priotity for external#3 agent.
-* PCI_AGENT_PRIO externalAgent4 - priotity for external#4 agent.
-* PCI_AGENT_PRIO externalAgent5 - priotity for external#5 agent.
-* Returns: true
-*********************************************************************/
-bool pciSetArbiterAgentsPriority (PCI_HOST host, PCI_AGENT_PRIO internalAgent,
- PCI_AGENT_PRIO externalAgent0,
- PCI_AGENT_PRIO externalAgent1,
- PCI_AGENT_PRIO externalAgent2,
- PCI_AGENT_PRIO externalAgent3,
- PCI_AGENT_PRIO externalAgent4,
- PCI_AGENT_PRIO externalAgent5)
-{
- unsigned int regData;
- unsigned int writeData;
-
- GT_REG_READ (pci_arbiter_control[host], &regData);
- writeData = (internalAgent << 7) + (externalAgent0 << 8) +
- (externalAgent1 << 9) + (externalAgent2 << 10) +
- (externalAgent3 << 11) + (externalAgent4 << 12) +
- (externalAgent5 << 13);
- regData = (regData & 0xffffc07f) | writeData;
- GT_REG_WRITE (pci_arbiter_control[host], regData & regData);
- return true;
-}
-
-/********************************************************************
-* pciParkingDisable - Park on last option disable, with this function you can
-* disable the park on last mechanism for each agent.
-* disabling this option for all agents results parking
-* on the internal master.
-*
-* Inputs: PCI_AGENT_PARK internalAgent - parking Disable for internal agent.
-* PCI_AGENT_PARK externalAgent0 - parking Disable for external#0 agent.
-* PCI_AGENT_PARK externalAgent1 - parking Disable for external#1 agent.
-* PCI_AGENT_PARK externalAgent2 - parking Disable for external#2 agent.
-* PCI_AGENT_PARK externalAgent3 - parking Disable for external#3 agent.
-* PCI_AGENT_PARK externalAgent4 - parking Disable for external#4 agent.
-* PCI_AGENT_PARK externalAgent5 - parking Disable for external#5 agent.
-* Returns: true
-*********************************************************************/
-bool pciParkingDisable (PCI_HOST host, PCI_AGENT_PARK internalAgent,
- PCI_AGENT_PARK externalAgent0,
- PCI_AGENT_PARK externalAgent1,
- PCI_AGENT_PARK externalAgent2,
- PCI_AGENT_PARK externalAgent3,
- PCI_AGENT_PARK externalAgent4,
- PCI_AGENT_PARK externalAgent5)
-{
- unsigned int regData;
- unsigned int writeData;
-
- GT_REG_READ (pci_arbiter_control[host], &regData);
- writeData = (internalAgent << 14) + (externalAgent0 << 15) +
- (externalAgent1 << 16) + (externalAgent2 << 17) +
- (externalAgent3 << 18) + (externalAgent4 << 19) +
- (externalAgent5 << 20);
- regData = (regData & ~(0x7f << 14)) | writeData;
- GT_REG_WRITE (pci_arbiter_control[host], regData);
- return true;
-}
-
-/********************************************************************
-* pciEnableBrokenAgentDetection - A master is said to be broken if it fails to
-* respond to grant assertion within a window specified in
-* the input value: 'brokenValue'.
-*
-* Inputs: unsigned char brokenValue - A value which limits the Master to hold the
-* grant without asserting frame.
-* Returns: Error for illegal broken value otherwise true.
-*********************************************************************/
-bool pciEnableBrokenAgentDetection (PCI_HOST host, unsigned char brokenValue)
-{
- unsigned int data;
- unsigned int regData;
-
- if (brokenValue > 0xf)
- return false; /* brokenValue must be 4 bit */
- data = brokenValue << 3;
- GT_REG_READ (pci_arbiter_control[host], &regData);
- regData = (regData & 0xffffff87) | data;
- GT_REG_WRITE (pci_arbiter_control[host], regData | BIT1);
- return true;
-}
-
-/********************************************************************
-* pciDisableBrokenAgentDetection - This function disable the Broken agent
-* Detection mechanism.
-* NOTE: This operation may cause a dead lock on the
-* pci0 arbitration.
-*
-* Inputs: N/A
-* Returns: true.
-*********************************************************************/
-bool pciDisableBrokenAgentDetection (PCI_HOST host)
-{
- unsigned int regData;
-
- GT_REG_READ (pci_arbiter_control[host], &regData);
- regData = regData & 0xfffffffd;
- GT_REG_WRITE (pci_arbiter_control[host], regData);
- return true;
-}
-
-/********************************************************************
-* pciP2PConfig - This function set the PCI_n P2P configurate.
-* For more information on the P2P read PCI spec.
-*
-* Inputs: unsigned int SecondBusLow - Secondery PCI interface Bus Range Lower
-* Boundry.
-* unsigned int SecondBusHigh - Secondry PCI interface Bus Range upper
-* Boundry.
-* unsigned int busNum - The CPI bus number to which the PCI interface
-* is connected.
-* unsigned int devNum - The PCI interface's device number.
-*
-* Returns: true.
-*********************************************************************/
-bool pciP2PConfig (PCI_HOST host, unsigned int SecondBusLow,
- unsigned int SecondBusHigh,
- unsigned int busNum, unsigned int devNum)
-{
- unsigned int regData;
-
- regData = (SecondBusLow & 0xff) | ((SecondBusHigh & 0xff) << 8) |
- ((busNum & 0xff) << 16) | ((devNum & 0x1f) << 24);
- GT_REG_WRITE (pci_p2p_configuration[host], regData);
- return true;
-}
-
-/********************************************************************
-* pciSetRegionSnoopMode - This function modifys one of the 4 regions which
-* supports Cache Coherency in the PCI_n interface.
-* Inputs: region - One of the four regions.
-* snoopType - There is four optional Types:
-* 1. No Snoop.
-* 2. Snoop to WT region.
-* 3. Snoop to WB region.
-* 4. Snoop & Invalidate to WB region.
-* baseAddress - Base Address of this region.
-* regionLength - Region length.
-* Returns: false if one of the parameters is wrong otherwise return true.
-*********************************************************************/
-bool pciSetRegionSnoopMode (PCI_HOST host, PCI_SNOOP_REGION region,
- PCI_SNOOP_TYPE snoopType,
- unsigned int baseAddress,
- unsigned int regionLength)
-{
- unsigned int snoopXbaseAddress;
- unsigned int snoopXtopAddress;
- unsigned int data;
- unsigned int snoopHigh = baseAddress + regionLength;
-
- if ((region > PCI_SNOOP_REGION3) || (snoopType > PCI_SNOOP_WB))
- return false;
- snoopXbaseAddress =
- pci_snoop_control_base_0_low[host] + 0x10 * region;
- snoopXtopAddress = pci_snoop_control_top_0[host] + 0x10 * region;
- if (regionLength == 0) { /* closing the region */
- GT_REG_WRITE (snoopXbaseAddress, 0x0000ffff);
- GT_REG_WRITE (snoopXtopAddress, 0);
- return true;
- }
- baseAddress = baseAddress & 0xfff00000; /* Granularity of 1MByte */
- data = (baseAddress >> 20) | snoopType << 12;
- GT_REG_WRITE (snoopXbaseAddress, data);
- snoopHigh = (snoopHigh & 0xfff00000) >> 20;
- GT_REG_WRITE (snoopXtopAddress, snoopHigh - 1);
- return true;
-}
-
-static int gt_read_config_dword (struct pci_controller *hose,
- pci_dev_t dev, int offset, u32 * value)
-{
- int bus = PCI_BUS (dev);
-
- if ((bus == local_buses[0]) || (bus == local_buses[1])) {
- *value = pciReadConfigReg ((PCI_HOST) hose->cfg_addr, offset,
- PCI_DEV (dev));
- } else {
- *value = pciOverBridgeReadConfigReg ((PCI_HOST) hose->
- cfg_addr, offset,
- PCI_DEV (dev), bus);
- }
-
- return 0;
-}
-
-static int gt_write_config_dword (struct pci_controller *hose,
- pci_dev_t dev, int offset, u32 value)
-{
- int bus = PCI_BUS (dev);
-
- if ((bus == local_buses[0]) || (bus == local_buses[1])) {
- pciWriteConfigReg ((PCI_HOST) hose->cfg_addr, offset,
- PCI_DEV (dev), value);
- } else {
- pciOverBridgeWriteConfigReg ((PCI_HOST) hose->cfg_addr,
- offset, PCI_DEV (dev), bus,
- value);
- }
- return 0;
-}
-
-
-static void gt_setup_ide (struct pci_controller *hose,
- pci_dev_t dev, struct pci_config_table *entry)
-{
- static const int ide_bar[] = { 8, 4, 8, 4, 0, 0 };
- u32 bar_response, bar_value;
- int bar;
-
- for (bar = 0; bar < 6; bar++) {
- /*ronen different function for 3rd bank. */
- unsigned int offset =
- (bar < 2) ? bar * 8 : 0x100 + (bar - 2) * 8;
-
- pci_write_config_dword (dev, PCI_BASE_ADDRESS_0 + offset,
- 0x0);
- pci_read_config_dword (dev, PCI_BASE_ADDRESS_0 + offset,
- &bar_response);
-
- pciauto_region_allocate (bar_response &
- PCI_BASE_ADDRESS_SPACE_IO ? hose->
- pci_io : hose->pci_mem, ide_bar[bar],
- &bar_value);
-
- pci_write_config_dword (dev, PCI_BASE_ADDRESS_0 + bar * 4,
- bar_value);
- }
-}
-
-
-/* TODO BJW: Change this for DB64360. This was pulled from the EV64260 */
-/* and is curently not called *. */
-#if 0
-static void gt_fixup_irq (struct pci_controller *hose, pci_dev_t dev)
-{
- unsigned char pin, irq;
-
- pci_read_config_byte (dev, PCI_INTERRUPT_PIN, &pin);
-
- if (pin == 1) { /* only allow INT A */
- irq = pci_irq_swizzle[(PCI_HOST) hose->
- cfg_addr][PCI_DEV (dev)];
- if (irq)
- pci_write_config_byte (dev, PCI_INTERRUPT_LINE, irq);
- }
-}
-#endif
-
-struct pci_config_table gt_config_table[] = {
- {PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_STORAGE_IDE,
- PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, gt_setup_ide},
-
- {}
-};
-
-struct pci_controller pci0_hose = {
-/* fixup_irq: gt_fixup_irq, */
- config_table:gt_config_table,
-};
-
-struct pci_controller pci1_hose = {
-/* fixup_irq: gt_fixup_irq, */
- config_table:gt_config_table,
-};
-
-void pci_init_board (void)
-{
- unsigned int command;
-
-#ifdef DEBUG
- gt_pci_bus_mode_display (PCI_HOST0);
-#endif
-
- pci0_hose.first_busno = 0;
- pci0_hose.last_busno = 0xff;
- local_buses[0] = pci0_hose.first_busno;
-
- /* PCI memory space */
- pci_set_region (pci0_hose.regions + 0,
- CFG_PCI0_0_MEM_SPACE,
- CFG_PCI0_0_MEM_SPACE,
- CFG_PCI0_MEM_SIZE, PCI_REGION_MEM);
-
- /* PCI I/O space */
- pci_set_region (pci0_hose.regions + 1,
- CFG_PCI0_IO_SPACE_PCI,
- CFG_PCI0_IO_SPACE, CFG_PCI0_IO_SIZE, PCI_REGION_IO);
-
- pci_set_ops (&pci0_hose,
- pci_hose_read_config_byte_via_dword,
- pci_hose_read_config_word_via_dword,
- gt_read_config_dword,
- pci_hose_write_config_byte_via_dword,
- pci_hose_write_config_word_via_dword,
- gt_write_config_dword);
- pci0_hose.region_count = 2;
-
- pci0_hose.cfg_addr = (unsigned int *) PCI_HOST0;
-
- pci_register_hose (&pci0_hose);
- pciArbiterEnable (PCI_HOST0);
- pciParkingDisable (PCI_HOST0, 1, 1, 1, 1, 1, 1, 1);
- command = pciReadConfigReg (PCI_HOST0, PCI_COMMAND, SELF);
- command |= PCI_COMMAND_MASTER;
- pciWriteConfigReg (PCI_HOST0, PCI_COMMAND, SELF, command);
- command = pciReadConfigReg (PCI_HOST0, PCI_COMMAND, SELF);
- command |= PCI_COMMAND_MEMORY;
- pciWriteConfigReg (PCI_HOST0, PCI_COMMAND, SELF, command);
-
- pci0_hose.last_busno = pci_hose_scan (&pci0_hose);
-
-#ifdef DEBUG
- gt_pci_bus_mode_display (PCI_HOST1);
-#endif
- pci1_hose.first_busno = pci0_hose.last_busno + 1;
- pci1_hose.last_busno = 0xff;
- pci1_hose.current_busno = pci1_hose.first_busno;
- local_buses[1] = pci1_hose.first_busno;
-
- /* PCI memory space */
- pci_set_region (pci1_hose.regions + 0,
- CFG_PCI1_0_MEM_SPACE,
- CFG_PCI1_0_MEM_SPACE,
- CFG_PCI1_MEM_SIZE, PCI_REGION_MEM);
-
- /* PCI I/O space */
- pci_set_region (pci1_hose.regions + 1,
- CFG_PCI1_IO_SPACE_PCI,
- CFG_PCI1_IO_SPACE, CFG_PCI1_IO_SIZE, PCI_REGION_IO);
-
- pci_set_ops (&pci1_hose,
- pci_hose_read_config_byte_via_dword,
- pci_hose_read_config_word_via_dword,
- gt_read_config_dword,
- pci_hose_write_config_byte_via_dword,
- pci_hose_write_config_word_via_dword,
- gt_write_config_dword);
-
- pci1_hose.region_count = 2;
-
- pci1_hose.cfg_addr = (unsigned int *) PCI_HOST1;
-
- pci_register_hose (&pci1_hose);
-
- pciArbiterEnable (PCI_HOST1);
- pciParkingDisable (PCI_HOST1, 1, 1, 1, 1, 1, 1, 1);
-
- command = pciReadConfigReg (PCI_HOST1, PCI_COMMAND, SELF);
- command |= PCI_COMMAND_MASTER;
- pciWriteConfigReg (PCI_HOST1, PCI_COMMAND, SELF, command);
-
- pci1_hose.last_busno = pci_hose_scan (&pci1_hose);
-
- command = pciReadConfigReg (PCI_HOST1, PCI_COMMAND, SELF);
- command |= PCI_COMMAND_MEMORY;
- pciWriteConfigReg (PCI_HOST1, PCI_COMMAND, SELF, command);
-
-}
diff --git a/board/Marvell/db64360/sdram_init.c b/board/Marvell/db64360/sdram_init.c
deleted file mode 100644
index d2635f88eb..0000000000
--- a/board/Marvell/db64360/sdram_init.c
+++ /dev/null
@@ -1,1984 +0,0 @@
-/*
- * (C) Copyright 2001
- * Josh Huber <huber@mclx.com>, Mission Critical Linux, Inc.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*************************************************************************
- * adaption for the Marvell DB64360 Board
- * Ingo Assmus (ingo.assmus@keymile.com)
- ************************************************************************/
-
-
-/* sdram_init.c - automatic memory sizing */
-
-#include <common.h>
-#include <74xx_7xx.h>
-#include "../include/memory.h"
-#include "../include/pci.h"
-#include "../include/mv_gen_reg.h"
-#include <net.h>
-
-#include "eth.h"
-#include "mpsc.h"
-#include "../common/i2c.h"
-#include "64360.h"
-#include "mv_regs.h"
-
-#undef DEBUG
-#define MAP_PCI
-
-#ifdef DEBUG
-#define DP(x) x
-#else
-#define DP(x)
-#endif
-
-int set_dfcdlInit (void); /* setup delay line of Mv64360 */
-int mvDmaIsChannelActive (int);
-int mvDmaSetMemorySpace (ulong, ulong, ulong, ulong, ulong);
-int mvDmaTransfer (int, ulong, ulong, ulong, ulong);
-
-/* ------------------------------------------------------------------------- */
-
-int
-memory_map_bank (unsigned int bankNo,
- unsigned int bankBase, unsigned int bankLength)
-{
-#ifdef MAP_PCI
- PCI_HOST host;
-#endif
-
-
-#ifdef DEBUG
- if (bankLength > 0) {
- printf ("mapping bank %d at %08x - %08x\n",
- bankNo, bankBase, bankBase + bankLength - 1);
- } else {
- printf ("unmapping bank %d\n", bankNo);
- }
-#endif
-
- memoryMapBank (bankNo, bankBase, bankLength);
-
-#ifdef MAP_PCI
- for (host = PCI_HOST0; host <= PCI_HOST1; host++) {
- const int features =
- PREFETCH_ENABLE |
- DELAYED_READ_ENABLE |
- AGGRESSIVE_PREFETCH |
- READ_LINE_AGGRESSIVE_PREFETCH |
- READ_MULTI_AGGRESSIVE_PREFETCH |
- MAX_BURST_4 | PCI_NO_SWAP;
-
- pciMapMemoryBank (host, bankNo, bankBase, bankLength);
-
- pciSetRegionSnoopMode (host, bankNo, PCI_SNOOP_WB, bankBase,
- bankLength);
-
- pciSetRegionFeatures (host, bankNo, features, bankBase,
- bankLength);
- }
-#endif
- return 0;
-}
-
-#define GB (1 << 30)
-
-/* much of this code is based on (or is) the code in the pip405 port */
-/* thanks go to the authors of said port - Josh */
-
-/* structure to store the relevant information about an sdram bank */
-typedef struct sdram_info {
- uchar drb_size;
- uchar registered, ecc;
- uchar tpar;
- uchar tras_clocks;
- uchar burst_len;
- uchar banks, slot;
-} sdram_info_t;
-
-/* Typedefs for 'gtAuxilGetDIMMinfo' function */
-
-typedef enum _memoryType { SDRAM, DDR } MEMORY_TYPE;
-
-typedef enum _voltageInterface { TTL_5V_TOLERANT, LVTTL, HSTL_1_5V,
- SSTL_3_3V, SSTL_2_5V, VOLTAGE_UNKNOWN,
-} VOLTAGE_INTERFACE;
-
-typedef enum _max_CL_supported_DDR { DDR_CL_1 = 1, DDR_CL_1_5 = 2, DDR_CL_2 =
- 4, DDR_CL_2_5 = 8, DDR_CL_3 = 16, DDR_CL_3_5 =
- 32, DDR_CL_FAULT } MAX_CL_SUPPORTED_DDR;
-typedef enum _max_CL_supported_SD { SD_CL_1 =
- 1, SD_CL_2, SD_CL_3, SD_CL_4, SD_CL_5, SD_CL_6, SD_CL_7,
- SD_FAULT } MAX_CL_SUPPORTED_SD;
-
-
-/* SDRAM/DDR information struct */
-typedef struct _gtMemoryDimmInfo {
- MEMORY_TYPE memoryType;
- unsigned int numOfRowAddresses;
- unsigned int numOfColAddresses;
- unsigned int numOfModuleBanks;
- unsigned int dataWidth;
- VOLTAGE_INTERFACE voltageInterface;
- unsigned int errorCheckType; /* ECC , PARITY.. */
- unsigned int sdramWidth; /* 4,8,16 or 32 */ ;
- unsigned int errorCheckDataWidth; /* 0 - no, 1 - Yes */
- unsigned int minClkDelay;
- unsigned int burstLengthSupported;
- unsigned int numOfBanksOnEachDevice;
- unsigned int suportedCasLatencies;
- unsigned int RefreshInterval;
- unsigned int maxCASlatencySupported_LoP; /* LoP left of point (measured in ns) */
- unsigned int maxCASlatencySupported_RoP; /* RoP right of point (measured in ns) */
- MAX_CL_SUPPORTED_DDR maxClSupported_DDR;
- MAX_CL_SUPPORTED_SD maxClSupported_SD;
- unsigned int moduleBankDensity;
- /* module attributes (true for yes) */
- bool bufferedAddrAndControlInputs;
- bool registeredAddrAndControlInputs;
- bool onCardPLL;
- bool bufferedDQMBinputs;
- bool registeredDQMBinputs;
- bool differentialClockInput;
- bool redundantRowAddressing;
-
- /* module general attributes */
- bool suportedAutoPreCharge;
- bool suportedPreChargeAll;
- bool suportedEarlyRasPreCharge;
- bool suportedWrite1ReadBurst;
- bool suported5PercentLowVCC;
- bool suported5PercentUpperVCC;
- /* module timing parameters */
- unsigned int minRasToCasDelay;
- unsigned int minRowActiveRowActiveDelay;
- unsigned int minRasPulseWidth;
- unsigned int minRowPrechargeTime; /* measured in ns */
-
- int addrAndCommandHoldTime; /* LoP left of point (measured in ns) */
- int addrAndCommandSetupTime; /* (measured in ns/100) */
- int dataInputSetupTime; /* LoP left of point (measured in ns) */
- int dataInputHoldTime; /* LoP left of point (measured in ns) */
-/* tAC times for highest 2nd and 3rd highest CAS Latency values */
- unsigned int clockToDataOut_LoP; /* LoP left of point (measured in ns) */
- unsigned int clockToDataOut_RoP; /* RoP right of point (measured in ns) */
- unsigned int clockToDataOutMinus1_LoP; /* LoP left of point (measured in ns) */
- unsigned int clockToDataOutMinus1_RoP; /* RoP right of point (measured in ns) */
- unsigned int clockToDataOutMinus2_LoP; /* LoP left of point (measured in ns) */
- unsigned int clockToDataOutMinus2_RoP; /* RoP right of point (measured in ns) */
-
- unsigned int minimumCycleTimeAtMaxCasLatancy_LoP; /* LoP left of point (measured in ns) */
- unsigned int minimumCycleTimeAtMaxCasLatancy_RoP; /* RoP right of point (measured in ns) */
-
- unsigned int minimumCycleTimeAtMaxCasLatancyMinus1_LoP; /* LoP left of point (measured in ns) */
- unsigned int minimumCycleTimeAtMaxCasLatancyMinus1_RoP; /* RoP right of point (measured in ns) */
-
- unsigned int minimumCycleTimeAtMaxCasLatancyMinus2_LoP; /* LoP left of point (measured in ns) */
- unsigned int minimumCycleTimeAtMaxCasLatancyMinus2_RoP; /* RoP right of point (measured in ns) */
-
- /* Parameters calculated from
- the extracted DIMM information */
- unsigned int size;
- unsigned int deviceDensity; /* 16,64,128,256 or 512 Mbit */
- unsigned int numberOfDevices;
- uchar drb_size; /* DRAM size in n*64Mbit */
- uchar slot; /* Slot Number this module is inserted in */
- uchar spd_raw_data[128]; /* Content of SPD-EEPROM copied 1:1 */
-#ifdef DEBUG
- uchar manufactura[8]; /* Content of SPD-EEPROM Byte 64-71 */
- uchar modul_id[18]; /* Content of SPD-EEPROM Byte 73-90 */
- uchar vendor_data[27]; /* Content of SPD-EEPROM Byte 99-125 */
- unsigned long modul_serial_no; /* Content of SPD-EEPROM Byte 95-98 */
- unsigned int manufac_date; /* Content of SPD-EEPROM Byte 93-94 */
- unsigned int modul_revision; /* Content of SPD-EEPROM Byte 91-92 */
- uchar manufac_place; /* Content of SPD-EEPROM Byte 72 */
-
-#endif
-} AUX_MEM_DIMM_INFO;
-
-
-/*
- * translate ns.ns/10 coding of SPD timing values
- * into 10 ps unit values
- */
-static inline unsigned short NS10to10PS (unsigned char spd_byte)
-{
- unsigned short ns, ns10;
-
- /* isolate upper nibble */
- ns = (spd_byte >> 4) & 0x0F;
- /* isolate lower nibble */
- ns10 = (spd_byte & 0x0F);
-
- return (ns * 100 + ns10 * 10);
-}
-
-/*
- * translate ns coding of SPD timing values
- * into 10 ps unit values
- */
-static inline unsigned short NSto10PS (unsigned char spd_byte)
-{
- return (spd_byte * 100);
-}
-
-/* This code reads the SPD chip on the sdram and populates
- * the array which is passed in with the relevant information */
-/* static int check_dimm(uchar slot, AUX_MEM_DIMM_INFO *info) */
-static int check_dimm (uchar slot, AUX_MEM_DIMM_INFO * dimmInfo)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- unsigned long spd_checksum;
-
-#ifdef ZUMA_NTL
- /* zero all the values */
- memset (info, 0, sizeof (*info));
-
-/*
- if (!slot) {
- info->slot = 0;
- info->banks = 1;
- info->registered = 0;
- info->drb_size = 16;*/ /* 16 - 256MBit, 32 - 512MBit */
-/* info->tpar = 3;
- info->tras_clocks = 5;
- info->burst_len = 4;
-*/
-#ifdef CONFIG_MV64360_ECC
- /* check for ECC/parity [0 = none, 1 = parity, 2 = ecc] */
- dimmInfo->errorCheckType = 2;
-/* info->ecc = 2;*/
-#endif
-}
-
-return 0;
-
-#else
- uchar addr = slot == 0 ? DIMM0_I2C_ADDR : DIMM1_I2C_ADDR;
- int ret;
- unsigned int i, j, density = 1, devicesForErrCheck = 0;
-
-#ifdef DEBUG
- unsigned int k;
-#endif
- unsigned int rightOfPoint = 0, leftOfPoint = 0, mult, div, time_tmp;
- int sign = 1, shift, maskLeftOfPoint, maskRightOfPoint;
- uchar supp_cal, cal_val;
- ulong memclk, tmemclk;
- ulong tmp;
- uchar trp_clocks = 0, trcd_clocks, tras_clocks, trrd_clocks;
- uchar data[128];
-
- memclk = gd->bus_clk;
- tmemclk = 1000000000 / (memclk / 100); /* in 10 ps units */
-
- DP (puts ("before i2c read\n"));
-
- ret = i2c_read (addr, 0, 1, data, 128);
-
- DP (puts ("after i2c read\n"));
-
- /* zero all the values */
- memset (dimmInfo, 0, sizeof (*dimmInfo));
-
- /* copy the SPD content 1:1 into the dimmInfo structure */
- for (i = 0; i <= 127; i++) {
- dimmInfo->spd_raw_data[i] = data[i];
- }
-
- if (ret) {
- DP (printf ("No DIMM in slot %d [err = %x]\n", slot, ret));
- return 0;
- } else
- dimmInfo->slot = slot; /* start to fill up dimminfo for this "slot" */
-
-#ifdef CFG_DISPLAY_DIMM_SPD_CONTENT
-
- for (i = 0; i <= 127; i++) {
- printf ("SPD-EEPROM Byte %3d = %3x (%3d)\n", i, data[i],
- data[i]);
- }
-
-#endif
-#ifdef DEBUG
-/* find Manufactura of Dimm Module */
- for (i = 0; i < sizeof (dimmInfo->manufactura); i++) {
- dimmInfo->manufactura[i] = data[64 + i];
- }
- printf ("\nThis RAM-Module is produced by: %s\n",
- dimmInfo->manufactura);
-
-/* find Manul-ID of Dimm Module */
- for (i = 0; i < sizeof (dimmInfo->modul_id); i++) {
- dimmInfo->modul_id[i] = data[73 + i];
- }
- printf ("The Module-ID of this RAM-Module is: %s\n",
- dimmInfo->modul_id);
-
-/* find Vendor-Data of Dimm Module */
- for (i = 0; i < sizeof (dimmInfo->vendor_data); i++) {
- dimmInfo->vendor_data[i] = data[99 + i];
- }
- printf ("Vendor Data of this RAM-Module is: %s\n",
- dimmInfo->vendor_data);
-
-/* find modul_serial_no of Dimm Module */
- dimmInfo->modul_serial_no = (*((unsigned long *) (&data[95])));
- printf ("Serial No. of this RAM-Module is: %ld (%lx)\n",
- dimmInfo->modul_serial_no, dimmInfo->modul_serial_no);
-
-/* find Manufac-Data of Dimm Module */
- dimmInfo->manufac_date = (*((unsigned int *) (&data[93])));
- printf ("Manufactoring Date of this RAM-Module is: %d.%d\n", data[93], data[94]); /*dimmInfo->manufac_date */
-
-/* find modul_revision of Dimm Module */
- dimmInfo->modul_revision = (*((unsigned int *) (&data[91])));
- printf ("Module Revision of this RAM-Module is: %d.%d\n", data[91], data[92]); /* dimmInfo->modul_revision */
-
-/* find manufac_place of Dimm Module */
- dimmInfo->manufac_place = (*((unsigned char *) (&data[72])));
- printf ("manufac_place of this RAM-Module is: %d\n",
- dimmInfo->manufac_place);
-
-#endif
-
-/*------------------------------------------------------------------------------------------------------------------------------*/
-/* calculate SPD checksum */
-/*------------------------------------------------------------------------------------------------------------------------------*/
- spd_checksum = 0;
-
- for (i = 0; i <= 62; i++) {
- spd_checksum += data[i];
- }
-
- if ((spd_checksum & 0xff) != data[63]) {
- printf ("### Error in SPD Checksum !!! Is_value: %2x should value %2x\n", (unsigned int) (spd_checksum & 0xff), data[63]);
- hang ();
- }
-
- else
- printf ("SPD Checksum ok!\n");
-
-
-/*------------------------------------------------------------------------------------------------------------------------------*/
- for (i = 2; i <= 35; i++) {
- switch (i) {
- case 2: /* Memory type (DDR / SDRAM) */
- dimmInfo->memoryType = (data[i] == 0x7) ? DDR : SDRAM;
-#ifdef DEBUG
- if (dimmInfo->memoryType == 0)
- DP (printf
- ("Dram_type in slot %d is: SDRAM\n",
- dimmInfo->slot));
- if (dimmInfo->memoryType == 1)
- DP (printf
- ("Dram_type in slot %d is: DDRAM\n",
- dimmInfo->slot));
-#endif
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 3: /* Number Of Row Addresses */
- dimmInfo->numOfRowAddresses = data[i];
- DP (printf
- ("Module Number of row addresses: %d\n",
- dimmInfo->numOfRowAddresses));
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 4: /* Number Of Column Addresses */
- dimmInfo->numOfColAddresses = data[i];
- DP (printf
- ("Module Number of col addresses: %d\n",
- dimmInfo->numOfColAddresses));
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 5: /* Number Of Module Banks */
- dimmInfo->numOfModuleBanks = data[i];
- DP (printf
- ("Number of Banks on Mod. : %d\n",
- dimmInfo->numOfModuleBanks));
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 6: /* Data Width */
- dimmInfo->dataWidth = data[i];
- DP (printf
- ("Module Data Width: %d\n",
- dimmInfo->dataWidth));
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 8: /* Voltage Interface */
- switch (data[i]) {
- case 0x0:
- dimmInfo->voltageInterface = TTL_5V_TOLERANT;
- DP (printf
- ("Module is TTL_5V_TOLERANT\n"));
- break;
- case 0x1:
- dimmInfo->voltageInterface = LVTTL;
- DP (printf
- ("Module is LVTTL\n"));
- break;
- case 0x2:
- dimmInfo->voltageInterface = HSTL_1_5V;
- DP (printf
- ("Module is TTL_5V_TOLERANT\n"));
- break;
- case 0x3:
- dimmInfo->voltageInterface = SSTL_3_3V;
- DP (printf
- ("Module is HSTL_1_5V\n"));
- break;
- case 0x4:
- dimmInfo->voltageInterface = SSTL_2_5V;
- DP (printf
- ("Module is SSTL_2_5V\n"));
- break;
- default:
- dimmInfo->voltageInterface = VOLTAGE_UNKNOWN;
- DP (printf
- ("Module is VOLTAGE_UNKNOWN\n"));
- break;
- }
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 9: /* Minimum Cycle Time At Max CasLatancy */
- shift = (dimmInfo->memoryType == DDR) ? 4 : 2;
- mult = (dimmInfo->memoryType == DDR) ? 10 : 25;
- maskLeftOfPoint =
- (dimmInfo->memoryType == DDR) ? 0xf0 : 0xfc;
- maskRightOfPoint =
- (dimmInfo->memoryType == DDR) ? 0xf : 0x03;
- leftOfPoint = (data[i] & maskLeftOfPoint) >> shift;
- rightOfPoint = (data[i] & maskRightOfPoint) * mult;
- dimmInfo->minimumCycleTimeAtMaxCasLatancy_LoP =
- leftOfPoint;
- dimmInfo->minimumCycleTimeAtMaxCasLatancy_RoP =
- rightOfPoint;
- DP (printf
- ("Minimum Cycle Time At Max CasLatancy: %d.%d [ns]\n",
- leftOfPoint, rightOfPoint));
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 10: /* Clock To Data Out */
- div = (dimmInfo->memoryType == DDR) ? 100 : 10;
- time_tmp =
- (((data[i] & 0xf0) >> 4) * 10) +
- ((data[i] & 0x0f));
- leftOfPoint = time_tmp / div;
- rightOfPoint = time_tmp % div;
- dimmInfo->clockToDataOut_LoP = leftOfPoint;
- dimmInfo->clockToDataOut_RoP = rightOfPoint;
- DP (printf ("Clock To Data Out: %d.%2d [ns]\n", leftOfPoint, rightOfPoint)); /*dimmInfo->clockToDataOut */
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
-/*#ifdef CONFIG_ECC */
- case 11: /* Error Check Type */
- dimmInfo->errorCheckType = data[i];
- DP (printf
- ("Error Check Type (0=NONE): %d\n",
- dimmInfo->errorCheckType));
- break;
-/* #endif */
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 12: /* Refresh Interval */
- dimmInfo->RefreshInterval = data[i];
- DP (printf
- ("RefreshInterval (80= Self refresh Normal, 15.625us) : %x\n",
- dimmInfo->RefreshInterval));
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 13: /* Sdram Width */
- dimmInfo->sdramWidth = data[i];
- DP (printf
- ("Sdram Width: %d\n",
- dimmInfo->sdramWidth));
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 14: /* Error Check Data Width */
- dimmInfo->errorCheckDataWidth = data[i];
- DP (printf
- ("Error Check Data Width: %d\n",
- dimmInfo->errorCheckDataWidth));
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 15: /* Minimum Clock Delay */
- dimmInfo->minClkDelay = data[i];
- DP (printf
- ("Minimum Clock Delay: %d\n",
- dimmInfo->minClkDelay));
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 16: /* Burst Length Supported */
- /******-******-******-*******
- * bit3 | bit2 | bit1 | bit0 *
- *******-******-******-*******
- burst length = * 8 | 4 | 2 | 1 *
- *****************************
-
- If for example bit0 and bit2 are set, the burst
- length supported are 1 and 4. */
-
- dimmInfo->burstLengthSupported = data[i];
-#ifdef DEBUG
- DP (printf
- ("Burst Length Supported: "));
- if (dimmInfo->burstLengthSupported & 0x01)
- DP (printf ("1, "));
- if (dimmInfo->burstLengthSupported & 0x02)
- DP (printf ("2, "));
- if (dimmInfo->burstLengthSupported & 0x04)
- DP (printf ("4, "));
- if (dimmInfo->burstLengthSupported & 0x08)
- DP (printf ("8, "));
- DP (printf (" Bit \n"));
-#endif
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 17: /* Number Of Banks On Each Device */
- dimmInfo->numOfBanksOnEachDevice = data[i];
- DP (printf
- ("Number Of Banks On Each Chip: %d\n",
- dimmInfo->numOfBanksOnEachDevice));
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 18: /* Suported Cas Latencies */
-
- /* DDR:
- *******-******-******-******-******-******-******-*******
- * bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 *
- *******-******-******-******-******-******-******-*******
- CAS = * TBD | TBD | 3.5 | 3 | 2.5 | 2 | 1.5 | 1 *
- *********************************************************
- SDRAM:
- *******-******-******-******-******-******-******-*******
- * bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 *
- *******-******-******-******-******-******-******-*******
- CAS = * TBD | 7 | 6 | 5 | 4 | 3 | 2 | 1 *
- ********************************************************/
- dimmInfo->suportedCasLatencies = data[i];
-#ifdef DEBUG
- DP (printf
- ("Suported Cas Latencies: (CL) "));
- if (dimmInfo->memoryType == 0) { /* SDRAM */
- for (k = 0; k <= 7; k++) {
- if (dimmInfo->
- suportedCasLatencies & (1 << k))
- DP (printf
- ("%d, ",
- k + 1));
- }
-
- } else { /* DDR-RAM */
-
- if (dimmInfo->suportedCasLatencies & 1)
- DP (printf ("1, "));
- if (dimmInfo->suportedCasLatencies & 2)
- DP (printf ("1.5, "));
- if (dimmInfo->suportedCasLatencies & 4)
- DP (printf ("2, "));
- if (dimmInfo->suportedCasLatencies & 8)
- DP (printf ("2.5, "));
- if (dimmInfo->suportedCasLatencies & 16)
- DP (printf ("3, "));
- if (dimmInfo->suportedCasLatencies & 32)
- DP (printf ("3.5, "));
-
- }
- DP (printf ("\n"));
-#endif
- /* Calculating MAX CAS latency */
- for (j = 7; j > 0; j--) {
- if (((dimmInfo->
- suportedCasLatencies >> j) & 0x1) ==
- 1) {
- switch (dimmInfo->memoryType) {
- case DDR:
- /* CAS latency 1, 1.5, 2, 2.5, 3, 3.5 */
- switch (j) {
- case 7:
- DP (printf
- ("Max. Cas Latencies (DDR): ERROR !!!\n"));
- dimmInfo->
- maxClSupported_DDR
- =
- DDR_CL_FAULT;
- hang ();
- break;
- case 6:
- DP (printf
- ("Max. Cas Latencies (DDR): ERROR !!!\n"));
- dimmInfo->
- maxClSupported_DDR
- =
- DDR_CL_FAULT;
- hang ();
- break;
- case 5:
- DP (printf
- ("Max. Cas Latencies (DDR): 3.5 clk's\n"));
- dimmInfo->
- maxClSupported_DDR
- = DDR_CL_3_5;
- break;
- case 4:
- DP (printf
- ("Max. Cas Latencies (DDR): 3 clk's \n"));
- dimmInfo->
- maxClSupported_DDR
- = DDR_CL_3;
- break;
- case 3:
- DP (printf
- ("Max. Cas Latencies (DDR): 2.5 clk's \n"));
- dimmInfo->
- maxClSupported_DDR
- = DDR_CL_2_5;
- break;
- case 2:
- DP (printf
- ("Max. Cas Latencies (DDR): 2 clk's \n"));
- dimmInfo->
- maxClSupported_DDR
- = DDR_CL_2;
- break;
- case 1:
- DP (printf
- ("Max. Cas Latencies (DDR): 1.5 clk's \n"));
- dimmInfo->
- maxClSupported_DDR
- = DDR_CL_1_5;
- break;
- }
-
- /* ronen - in case we have a DIMM with minimumCycleTimeAtMaxCasLatancy
- lower then our SDRAM cycle count, we won't be able to support this CAL
- and we will have to use lower CAL. (minus - means from 3.0 to 2.5) */
- if ((dimmInfo->
- minimumCycleTimeAtMaxCasLatancy_LoP
- <
- CFG_DDR_SDRAM_CYCLE_COUNT_LOP)
- ||
- ((dimmInfo->
- minimumCycleTimeAtMaxCasLatancy_LoP
- ==
- CFG_DDR_SDRAM_CYCLE_COUNT_LOP)
- && (dimmInfo->
- minimumCycleTimeAtMaxCasLatancy_RoP
- <
- CFG_DDR_SDRAM_CYCLE_COUNT_ROP)))
- {
- dimmInfo->
- maxClSupported_DDR
- =
- dimmInfo->
- maxClSupported_DDR
- >> 1;
- DP (printf
- ("*** Change actual Cas Latencies cause of minimumCycleTime n"));
- }
- /* ronen - checkif the Dimm frequency compared to the Sysclock. */
- if ((dimmInfo->
- minimumCycleTimeAtMaxCasLatancy_LoP
- >
- CFG_DDR_SDRAM_CYCLE_COUNT_LOP)
- ||
- ((dimmInfo->
- minimumCycleTimeAtMaxCasLatancy_LoP
- ==
- CFG_DDR_SDRAM_CYCLE_COUNT_LOP)
- && (dimmInfo->
- minimumCycleTimeAtMaxCasLatancy_RoP
- >
- CFG_DDR_SDRAM_CYCLE_COUNT_ROP)))
- {
- printf ("*********************************************************\n");
- printf ("*** sysClock is higher than SDRAM's allowed frequency ***\n");
- printf ("*********************************************************\n");
- hang ();
- }
-
- dimmInfo->
- maxCASlatencySupported_LoP
- =
- 1 +
- (int) (5 * j / 10);
- if (((5 * j) % 10) != 0)
- dimmInfo->
- maxCASlatencySupported_RoP
- = 5;
- else
- dimmInfo->
- maxCASlatencySupported_RoP
- = 0;
- DP (printf
- ("Max. Cas Latencies (DDR LoP.RoP Notation): %d.%d \n",
- dimmInfo->
- maxCASlatencySupported_LoP,
- dimmInfo->
- maxCASlatencySupported_RoP));
- break;
- case SDRAM:
- /* CAS latency 1, 2, 3, 4, 5, 6, 7 */
- dimmInfo->maxClSupported_SD = j; /* Cas Latency DDR-RAM Coded */
- DP (printf
- ("Max. Cas Latencies (SD): %d\n",
- dimmInfo->
- maxClSupported_SD));
- dimmInfo->
- maxCASlatencySupported_LoP
- = j;
- dimmInfo->
- maxCASlatencySupported_RoP
- = 0;
- DP (printf
- ("Max. Cas Latencies (DDR LoP.RoP Notation): %d.%d \n",
- dimmInfo->
- maxCASlatencySupported_LoP,
- dimmInfo->
- maxCASlatencySupported_RoP));
- break;
- }
- break;
- }
- }
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 21: /* Buffered Address And Control Inputs */
- DP (printf ("\nModul Attributes (SPD Byte 21): \n"));
- dimmInfo->bufferedAddrAndControlInputs =
- data[i] & BIT0;
- dimmInfo->registeredAddrAndControlInputs =
- (data[i] & BIT1) >> 1;
- dimmInfo->onCardPLL = (data[i] & BIT2) >> 2;
- dimmInfo->bufferedDQMBinputs = (data[i] & BIT3) >> 3;
- dimmInfo->registeredDQMBinputs =
- (data[i] & BIT4) >> 4;
- dimmInfo->differentialClockInput =
- (data[i] & BIT5) >> 5;
- dimmInfo->redundantRowAddressing =
- (data[i] & BIT6) >> 6;
-#ifdef DEBUG
- if (dimmInfo->bufferedAddrAndControlInputs == 1)
- DP (printf
- (" - Buffered Address/Control Input: Yes \n"));
- else
- DP (printf
- (" - Buffered Address/Control Input: No \n"));
-
- if (dimmInfo->registeredAddrAndControlInputs == 1)
- DP (printf
- (" - Registered Address/Control Input: Yes \n"));
- else
- DP (printf
- (" - Registered Address/Control Input: No \n"));
-
- if (dimmInfo->onCardPLL == 1)
- DP (printf
- (" - On-Card PLL (clock): Yes \n"));
- else
- DP (printf
- (" - On-Card PLL (clock): No \n"));
-
- if (dimmInfo->bufferedDQMBinputs == 1)
- DP (printf
- (" - Bufferd DQMB Inputs: Yes \n"));
- else
- DP (printf
- (" - Bufferd DQMB Inputs: No \n"));
-
- if (dimmInfo->registeredDQMBinputs == 1)
- DP (printf
- (" - Registered DQMB Inputs: Yes \n"));
- else
- DP (printf
- (" - Registered DQMB Inputs: No \n"));
-
- if (dimmInfo->differentialClockInput == 1)
- DP (printf
- (" - Differential Clock Input: Yes \n"));
- else
- DP (printf
- (" - Differential Clock Input: No \n"));
-
- if (dimmInfo->redundantRowAddressing == 1)
- DP (printf
- (" - redundant Row Addressing: Yes \n"));
- else
- DP (printf
- (" - redundant Row Addressing: No \n"));
-
-#endif
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 22: /* Suported AutoPreCharge */
- DP (printf ("\nModul Attributes (SPD Byte 22): \n"));
- dimmInfo->suportedEarlyRasPreCharge = data[i] & BIT0;
- dimmInfo->suportedAutoPreCharge =
- (data[i] & BIT1) >> 1;
- dimmInfo->suportedPreChargeAll =
- (data[i] & BIT2) >> 2;
- dimmInfo->suportedWrite1ReadBurst =
- (data[i] & BIT3) >> 3;
- dimmInfo->suported5PercentLowVCC =
- (data[i] & BIT4) >> 4;
- dimmInfo->suported5PercentUpperVCC =
- (data[i] & BIT5) >> 5;
-#ifdef DEBUG
- if (dimmInfo->suportedEarlyRasPreCharge == 1)
- DP (printf
- (" - Early Ras Precharge: Yes \n"));
- else
- DP (printf
- (" - Early Ras Precharge: No \n"));
-
- if (dimmInfo->suportedAutoPreCharge == 1)
- DP (printf
- (" - AutoPreCharge: Yes \n"));
- else
- DP (printf
- (" - AutoPreCharge: No \n"));
-
- if (dimmInfo->suportedPreChargeAll == 1)
- DP (printf
- (" - Precharge All: Yes \n"));
- else
- DP (printf
- (" - Precharge All: No \n"));
-
- if (dimmInfo->suportedWrite1ReadBurst == 1)
- DP (printf
- (" - Write 1/ReadBurst: Yes \n"));
- else
- DP (printf
- (" - Write 1/ReadBurst: No \n"));
-
- if (dimmInfo->suported5PercentLowVCC == 1)
- DP (printf
- (" - lower VCC tolerance: 5 Percent \n"));
- else
- DP (printf
- (" - lower VCC tolerance: 10 Percent \n"));
-
- if (dimmInfo->suported5PercentUpperVCC == 1)
- DP (printf
- (" - upper VCC tolerance: 5 Percent \n"));
- else
- DP (printf
- (" - upper VCC tolerance: 10 Percent \n"));
-
-#endif
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 23: /* Minimum Cycle Time At Maximum Cas Latancy Minus 1 (2nd highest CL) */
- shift = (dimmInfo->memoryType == DDR) ? 4 : 2;
- mult = (dimmInfo->memoryType == DDR) ? 10 : 25;
- maskLeftOfPoint =
- (dimmInfo->memoryType == DDR) ? 0xf0 : 0xfc;
- maskRightOfPoint =
- (dimmInfo->memoryType == DDR) ? 0xf : 0x03;
- leftOfPoint = (data[i] & maskLeftOfPoint) >> shift;
- rightOfPoint = (data[i] & maskRightOfPoint) * mult;
- dimmInfo->minimumCycleTimeAtMaxCasLatancyMinus1_LoP =
- leftOfPoint;
- dimmInfo->minimumCycleTimeAtMaxCasLatancyMinus1_RoP =
- rightOfPoint;
- DP (printf ("Minimum Cycle Time At 2nd highest CasLatancy (0 = Not supported): %d.%d [ns]\n", leftOfPoint, rightOfPoint)); /*dimmInfo->minimumCycleTimeAtMaxCasLatancy */
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 24: /* Clock To Data Out 2nd highest Cas Latency Value */
- div = (dimmInfo->memoryType == DDR) ? 100 : 10;
- time_tmp =
- (((data[i] & 0xf0) >> 4) * 10) +
- ((data[i] & 0x0f));
- leftOfPoint = time_tmp / div;
- rightOfPoint = time_tmp % div;
- dimmInfo->clockToDataOutMinus1_LoP = leftOfPoint;
- dimmInfo->clockToDataOutMinus1_RoP = rightOfPoint;
- DP (printf
- ("Clock To Data Out (2nd CL value): %d.%2d [ns]\n",
- leftOfPoint, rightOfPoint));
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 25: /* Minimum Cycle Time At Maximum Cas Latancy Minus 2 (3rd highest CL) */
- shift = (dimmInfo->memoryType == DDR) ? 4 : 2;
- mult = (dimmInfo->memoryType == DDR) ? 10 : 25;
- maskLeftOfPoint =
- (dimmInfo->memoryType == DDR) ? 0xf0 : 0xfc;
- maskRightOfPoint =
- (dimmInfo->memoryType == DDR) ? 0xf : 0x03;
- leftOfPoint = (data[i] & maskLeftOfPoint) >> shift;
- rightOfPoint = (data[i] & maskRightOfPoint) * mult;
- dimmInfo->minimumCycleTimeAtMaxCasLatancyMinus2_LoP =
- leftOfPoint;
- dimmInfo->minimumCycleTimeAtMaxCasLatancyMinus2_RoP =
- rightOfPoint;
- DP (printf ("Minimum Cycle Time At 3rd highest CasLatancy (0 = Not supported): %d.%d [ns]\n", leftOfPoint, rightOfPoint)); /*dimmInfo->minimumCycleTimeAtMaxCasLatancy */
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 26: /* Clock To Data Out 3rd highest Cas Latency Value */
- div = (dimmInfo->memoryType == DDR) ? 100 : 10;
- time_tmp =
- (((data[i] & 0xf0) >> 4) * 10) +
- ((data[i] & 0x0f));
- leftOfPoint = time_tmp / div;
- rightOfPoint = time_tmp % div;
- dimmInfo->clockToDataOutMinus2_LoP = leftOfPoint;
- dimmInfo->clockToDataOutMinus2_RoP = rightOfPoint;
- DP (printf
- ("Clock To Data Out (3rd CL value): %d.%2d [ns]\n",
- leftOfPoint, rightOfPoint));
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 27: /* Minimum Row Precharge Time */
- shift = (dimmInfo->memoryType == DDR) ? 2 : 0;
- maskLeftOfPoint =
- (dimmInfo->memoryType == DDR) ? 0xfc : 0xff;
- maskRightOfPoint =
- (dimmInfo->memoryType == DDR) ? 0x03 : 0x00;
- leftOfPoint = ((data[i] & maskLeftOfPoint) >> shift);
- rightOfPoint = (data[i] & maskRightOfPoint) * 25;
-
- dimmInfo->minRowPrechargeTime = ((leftOfPoint * 100) + rightOfPoint); /* measured in n times 10ps Intervals */
- trp_clocks =
- (dimmInfo->minRowPrechargeTime +
- (tmemclk - 1)) / tmemclk;
- DP (printf
- ("*** 1 clock cycle = %ld 10ps intervalls = %ld.%ld ns****\n",
- tmemclk, tmemclk / 100, tmemclk % 100));
- DP (printf
- ("Minimum Row Precharge Time [ns]: %d.%2d = in Clk cycles %d\n",
- leftOfPoint, rightOfPoint, trp_clocks));
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 28: /* Minimum Row Active to Row Active Time */
- shift = (dimmInfo->memoryType == DDR) ? 2 : 0;
- maskLeftOfPoint =
- (dimmInfo->memoryType == DDR) ? 0xfc : 0xff;
- maskRightOfPoint =
- (dimmInfo->memoryType == DDR) ? 0x03 : 0x00;
- leftOfPoint = ((data[i] & maskLeftOfPoint) >> shift);
- rightOfPoint = (data[i] & maskRightOfPoint) * 25;
-
- dimmInfo->minRowActiveRowActiveDelay = ((leftOfPoint * 100) + rightOfPoint); /* measured in 100ns Intervals */
- trrd_clocks =
- (dimmInfo->minRowActiveRowActiveDelay +
- (tmemclk - 1)) / tmemclk;
- DP (printf
- ("Minimum Row Active -To- Row Active Delay [ns]: %d.%2d = in Clk cycles %d\n",
- leftOfPoint, rightOfPoint, trp_clocks));
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 29: /* Minimum Ras-To-Cas Delay */
- shift = (dimmInfo->memoryType == DDR) ? 2 : 0;
- maskLeftOfPoint =
- (dimmInfo->memoryType == DDR) ? 0xfc : 0xff;
- maskRightOfPoint =
- (dimmInfo->memoryType == DDR) ? 0x03 : 0x00;
- leftOfPoint = ((data[i] & maskLeftOfPoint) >> shift);
- rightOfPoint = (data[i] & maskRightOfPoint) * 25;
-
- dimmInfo->minRowActiveRowActiveDelay = ((leftOfPoint * 100) + rightOfPoint); /* measured in 100ns Intervals */
- trcd_clocks =
- (dimmInfo->minRowActiveRowActiveDelay +
- (tmemclk - 1)) / tmemclk;
- DP (printf
- ("Minimum Ras-To-Cas Delay [ns]: %d.%2d = in Clk cycles %d\n",
- leftOfPoint, rightOfPoint, trp_clocks));
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 30: /* Minimum Ras Pulse Width */
- dimmInfo->minRasPulseWidth = data[i];
- tras_clocks =
- (NSto10PS (data[i]) +
- (tmemclk - 1)) / tmemclk;
- DP (printf
- ("Minimum Ras Pulse Width [ns]: %d = in Clk cycles %d\n",
- dimmInfo->minRasPulseWidth, tras_clocks));
-
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 31: /* Module Bank Density */
- dimmInfo->moduleBankDensity = data[i];
- DP (printf
- ("Module Bank Density: %d\n",
- dimmInfo->moduleBankDensity));
-#ifdef DEBUG
- DP (printf
- ("*** Offered Densities (more than 1 = Multisize-Module): "));
- {
- if (dimmInfo->moduleBankDensity & 1)
- DP (printf ("4MB, "));
- if (dimmInfo->moduleBankDensity & 2)
- DP (printf ("8MB, "));
- if (dimmInfo->moduleBankDensity & 4)
- DP (printf ("16MB, "));
- if (dimmInfo->moduleBankDensity & 8)
- DP (printf ("32MB, "));
- if (dimmInfo->moduleBankDensity & 16)
- DP (printf ("64MB, "));
- if (dimmInfo->moduleBankDensity & 32)
- DP (printf ("128MB, "));
- if ((dimmInfo->moduleBankDensity & 64)
- || (dimmInfo->moduleBankDensity & 128)) {
- DP (printf ("ERROR, "));
- hang ();
- }
- }
- DP (printf ("\n"));
-#endif
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 32: /* Address And Command Setup Time (measured in ns/1000) */
- sign = 1;
- switch (dimmInfo->memoryType) {
- case DDR:
- time_tmp =
- (((data[i] & 0xf0) >> 4) * 10) +
- ((data[i] & 0x0f));
- leftOfPoint = time_tmp / 100;
- rightOfPoint = time_tmp % 100;
- break;
- case SDRAM:
- leftOfPoint = (data[i] & 0xf0) >> 4;
- if (leftOfPoint > 7) {
- leftOfPoint = data[i] & 0x70 >> 4;
- sign = -1;
- }
- rightOfPoint = (data[i] & 0x0f);
- break;
- }
- dimmInfo->addrAndCommandSetupTime =
- (leftOfPoint * 100 + rightOfPoint) * sign;
- DP (printf
- ("Address And Command Setup Time [ns]: %d.%d\n",
- sign * leftOfPoint, rightOfPoint));
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 33: /* Address And Command Hold Time */
- sign = 1;
- switch (dimmInfo->memoryType) {
- case DDR:
- time_tmp =
- (((data[i] & 0xf0) >> 4) * 10) +
- ((data[i] & 0x0f));
- leftOfPoint = time_tmp / 100;
- rightOfPoint = time_tmp % 100;
- break;
- case SDRAM:
- leftOfPoint = (data[i] & 0xf0) >> 4;
- if (leftOfPoint > 7) {
- leftOfPoint = data[i] & 0x70 >> 4;
- sign = -1;
- }
- rightOfPoint = (data[i] & 0x0f);
- break;
- }
- dimmInfo->addrAndCommandHoldTime =
- (leftOfPoint * 100 + rightOfPoint) * sign;
- DP (printf
- ("Address And Command Hold Time [ns]: %d.%d\n",
- sign * leftOfPoint, rightOfPoint));
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 34: /* Data Input Setup Time */
- sign = 1;
- switch (dimmInfo->memoryType) {
- case DDR:
- time_tmp =
- (((data[i] & 0xf0) >> 4) * 10) +
- ((data[i] & 0x0f));
- leftOfPoint = time_tmp / 100;
- rightOfPoint = time_tmp % 100;
- break;
- case SDRAM:
- leftOfPoint = (data[i] & 0xf0) >> 4;
- if (leftOfPoint > 7) {
- leftOfPoint = data[i] & 0x70 >> 4;
- sign = -1;
- }
- rightOfPoint = (data[i] & 0x0f);
- break;
- }
- dimmInfo->dataInputSetupTime =
- (leftOfPoint * 100 + rightOfPoint) * sign;
- DP (printf
- ("Data Input Setup Time [ns]: %d.%d\n",
- sign * leftOfPoint, rightOfPoint));
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 35: /* Data Input Hold Time */
- sign = 1;
- switch (dimmInfo->memoryType) {
- case DDR:
- time_tmp =
- (((data[i] & 0xf0) >> 4) * 10) +
- ((data[i] & 0x0f));
- leftOfPoint = time_tmp / 100;
- rightOfPoint = time_tmp % 100;
- break;
- case SDRAM:
- leftOfPoint = (data[i] & 0xf0) >> 4;
- if (leftOfPoint > 7) {
- leftOfPoint = data[i] & 0x70 >> 4;
- sign = -1;
- }
- rightOfPoint = (data[i] & 0x0f);
- break;
- }
- dimmInfo->dataInputHoldTime =
- (leftOfPoint * 100 + rightOfPoint) * sign;
- DP (printf
- ("Data Input Hold Time [ns]: %d.%d\n\n",
- sign * leftOfPoint, rightOfPoint));
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
- }
- }
- /* calculating the sdram density */
- for (i = 0;
- i < dimmInfo->numOfRowAddresses + dimmInfo->numOfColAddresses;
- i++) {
- density = density * 2;
- }
- dimmInfo->deviceDensity = density * dimmInfo->numOfBanksOnEachDevice *
- dimmInfo->sdramWidth;
- dimmInfo->numberOfDevices =
- (dimmInfo->dataWidth / dimmInfo->sdramWidth) *
- dimmInfo->numOfModuleBanks;
- devicesForErrCheck =
- (dimmInfo->dataWidth - 64) / dimmInfo->sdramWidth;
- if ((dimmInfo->errorCheckType == 0x1)
- || (dimmInfo->errorCheckType == 0x2)
- || (dimmInfo->errorCheckType == 0x3)) {
- dimmInfo->size =
- (dimmInfo->deviceDensity / 8) *
- (dimmInfo->numberOfDevices -
- /* ronen on the 1G dimm we get wrong value. (was devicesForErrCheck) */
- dimmInfo->numberOfDevices / 8);
- } else {
- dimmInfo->size =
- (dimmInfo->deviceDensity / 8) *
- dimmInfo->numberOfDevices;
- }
-
- /* compute the module DRB size */
- tmp = (1 <<
- (dimmInfo->numOfRowAddresses + dimmInfo->numOfColAddresses));
- tmp *= dimmInfo->numOfModuleBanks;
- tmp *= dimmInfo->sdramWidth;
- tmp = tmp >> 24; /* div by 0x4000000 (64M) */
- dimmInfo->drb_size = (uchar) tmp;
- DP (printf ("Module DRB size (n*64Mbit): %d\n", dimmInfo->drb_size));
-
- /* try a CAS latency of 3 first... */
-
- /* bit 1 is CL2, bit 2 is CL3 */
- supp_cal = (dimmInfo->suportedCasLatencies & 0x6) >> 1;
-
- cal_val = 0;
- if (supp_cal & 3) {
- if (NS10to10PS (data[9]) <= tmemclk)
- cal_val = 3;
- }
-
- /* then 2... */
- if (supp_cal & 2) {
- if (NS10to10PS (data[23]) <= tmemclk)
- cal_val = 2;
- }
-
- DP (printf ("cal_val = %d\n", cal_val));
-
- /* bummer, did't work... */
- if (cal_val == 0) {
- DP (printf ("Couldn't find a good CAS latency\n"));
- hang ();
- return 0;
- }
-
- return true;
-
-#endif
-}
-
-/* sets up the GT properly with information passed in */
-int setup_sdram (AUX_MEM_DIMM_INFO * info)
-{
- ulong tmp, check;
- ulong tmp_sdram_mode = 0; /* 0x141c */
- ulong tmp_dunit_control_low = 0; /* 0x1404 */
- int i;
-
- /* added 8/21/2003 P. Marchese */
- unsigned int sdram_config_reg;
-
- /* added 10/10/2003 P. Marchese */
- ulong sdram_chip_size;
-
- /* sanity checking */
- if (!info->numOfModuleBanks) {
- printf ("setup_sdram called with 0 banks\n");
- return 1;
- }
-
- /* delay line */
- set_dfcdlInit (); /* may be its not needed */
- DP (printf ("Delay line set done\n"));
-
- /* set SDRAM mode NOP */ /* To_do check it */
- GT_REG_WRITE (SDRAM_OPERATION, 0x5);
- while (GTREGREAD (SDRAM_OPERATION) != 0) {
- DP (printf
- ("\n*** SDRAM_OPERATION 1418: Module still busy ... please wait... ***\n"));
- }
-
- /* SDRAM configuration */
-/* added 8/21/2003 P. Marchese */
-/* code allows usage of registered DIMMS */
-
- /* figure out the memory refresh internal */
- switch (info->RefreshInterval) {
- case 0x0:
- case 0x80: /* refresh period is 15.625 usec */
- sdram_config_reg =
- (unsigned int) (((float) 15.625 * (float) CFG_BUS_HZ)
- / (float) 1000000.0);
- break;
- case 0x1:
- case 0x81: /* refresh period is 3.9 usec */
- sdram_config_reg =
- (unsigned int) (((float) 3.9 * (float) CFG_BUS_HZ) /
- (float) 1000000.0);
- break;
- case 0x2:
- case 0x82: /* refresh period is 7.8 usec */
- sdram_config_reg =
- (unsigned int) (((float) 7.8 * (float) CFG_BUS_HZ) /
- (float) 1000000.0);
- break;
- case 0x3:
- case 0x83: /* refresh period is 31.3 usec */
- sdram_config_reg =
- (unsigned int) (((float) 31.3 * (float) CFG_BUS_HZ) /
- (float) 1000000.0);
- break;
- case 0x4:
- case 0x84: /* refresh period is 62.5 usec */
- sdram_config_reg =
- (unsigned int) (((float) 62.5 * (float) CFG_BUS_HZ) /
- (float) 1000000.0);
- break;
- case 0x5:
- case 0x85: /* refresh period is 125 usec */
- sdram_config_reg =
- (unsigned int) (((float) 125 * (float) CFG_BUS_HZ) /
- (float) 1000000.0);
- break;
- default: /* refresh period undefined */
- printf ("DRAM refresh period is unknown!\n");
- printf ("Aborting DRAM setup with an error\n");
- hang ();
- break;
- }
- DP (printf ("calculated refresh interval %0x\n", sdram_config_reg));
-
- /* make sure the refresh value is only 14 bits */
- if (sdram_config_reg > 0x1fff)
- sdram_config_reg = 0x1fff;
- DP (printf ("adjusted refresh interval %0x\n", sdram_config_reg));
-
- /* we want physical bank interleaving and */
- /* virtual bank interleaving enabled so do nothing */
- /* since these bits need to be zero to enable the interleaving */
-
- /* registered DRAM ? */
- if (info->registeredAddrAndControlInputs == 1) {
- /* it's registered DRAM, so set the reg. DRAM bit */
- sdram_config_reg = sdram_config_reg | BIT17;
- DP (printf ("Enabling registered DRAM bit\n"));
- }
- /* turn on DRAM ECC? */
-#ifdef CONFIG_MV64360_ECC
- if (info->errorCheckType == 0x2) {
- /* DRAM has ECC, so turn it on */
- sdram_config_reg = sdram_config_reg | BIT18;
- DP (printf ("Enabling ECC\n"));
- }
-#endif
- /* set the data DQS pin configuration */
- switch (info->sdramWidth) {
- case 0x4: /* memory is x4 */
- sdram_config_reg = sdram_config_reg | BIT20 | BIT21;
- DP (printf ("Data DQS pins set for 16 pins\n"));
- break;
- case 0x8: /* memory is x8 or x16 */
- case 0x10:
- sdram_config_reg = sdram_config_reg | BIT21;
- DP (printf ("Data DQS pins set for 8 pins\n"));
- break;
- case 0x20: /* memory is x32 */
- /* both bits are cleared for x32 so nothing to do */
- DP (printf ("Data DQS pins set for 2 pins\n"));
- break;
- default: /* memory width unsupported */
- printf ("DRAM chip width is unknown!\n");
- printf ("Aborting DRAM setup with an error\n");
- hang ();
- break;
- }
-
- /* perform read buffer assignments */
- /* we are going to use the Power-up defaults */
- /* bit 26 = CPU = buffer 1 */
- /* bit 27 = PCI bus #0 = buffer 0 */
- /* bit 28 = PCI bus #1 = buffer 0 */
- /* bit 29 = MPSC = buffer 0 */
- /* bit 30 = IDMA = buffer 0 */
- /* bit 31 = Gigabit = buffer 0 */
- sdram_config_reg = sdram_config_reg | BIT26;
- /* sdram_config_reg = sdram_config_reg | 0x58000000; */
- /* sdram_config_reg = sdram_config_reg & 0xffffff00; */
-
- /* write the value into the SDRAM configuration register */
- GT_REG_WRITE (SDRAM_CONFIG, sdram_config_reg);
- DP (printf
- ("OOOOOOOOO sdram_conf 0x1400: %08x\n",
- GTREGREAD (SDRAM_CONFIG)));
-
- /* SDRAM open pages control keep open as much as I can */
- GT_REG_WRITE (SDRAM_OPEN_PAGES_CONTROL, 0x0);
- DP (printf
- ("sdram_open_pages_controll 0x1414: %08x\n",
- GTREGREAD (SDRAM_OPEN_PAGES_CONTROL)));
-
- /* SDRAM D_UNIT_CONTROL_LOW 0x1404 */
- tmp = (GTREGREAD (D_UNIT_CONTROL_LOW) & 0x01); /* Clock Domain Sync from power on reset */
- if (tmp == 0)
- DP (printf ("Core Signals are sync (by HW-Setting)!!!\n"));
- else
- DP (printf
- ("Core Signals syncs. are bypassed (by HW-Setting)!!!\n"));
-
- /* SDRAM set CAS Latency according to SPD information */
- switch (info->memoryType) {
- case SDRAM:
- printf ("### SD-RAM not supported !!!\n");
- printf ("Aborting!!!\n");
- hang ();
- /* ToDo fill SD-RAM if needed !!!!! */
- break;
- /* Calculate the settings for SDRAM mode and Dunit control low registers */
- /* Values set according to technical bulletin TB-92 rev. c */
- case DDR:
- DP (printf ("### SET-CL for DDR-RAM\n"));
- switch (info->maxClSupported_DDR) {
- case DDR_CL_3:
- tmp_sdram_mode = 0x32; /* CL=3 Burstlength = 4 */
- if (tmp == 1) { /* clocks sync */
- if (info->registeredAddrAndControlInputs == 1) /* registerd DDR SDRAM? */
- tmp_dunit_control_low = 0x05110051;
- else
- tmp_dunit_control_low = 0x24110051;
- DP (printf
- ("Max. CL is 3 CLKs 0x141c= %08lx, 0x1404 = %08lx\n",
- tmp_sdram_mode, tmp_dunit_control_low));
- } else { /* clk sync. bypassed */
-
- if (info->registeredAddrAndControlInputs == 1) /* registerd DDR SDRAM? */
- tmp_dunit_control_low = 0x2C1107F2;
- else
- tmp_dunit_control_low = 0x3C1107d2;
- DP (printf
- ("Max. CL is 3 CLKs 0x141c= %08lx, 0x1404 = %08lx\n",
- tmp_sdram_mode, tmp_dunit_control_low));
- }
- break;
- case DDR_CL_2_5:
- tmp_sdram_mode = 0x62; /* CL=2.5 Burstlength = 4 */
- if (tmp == 1) { /* clocks sync */
- if (info->registeredAddrAndControlInputs == 1) /* registerd DDR SDRAM? */
- tmp_dunit_control_low = 0x25110051;
- else
- tmp_dunit_control_low = 0x24110051;
- DP (printf
- ("Max. CL is 2.5 CLKs 0x141c= %08lx, 0x1404 = %08lx\n",
- tmp_sdram_mode, tmp_dunit_control_low));
- } else { /* clk sync. bypassed */
-
- if (info->registeredAddrAndControlInputs == 1) { /* registerd DDR SDRAM? */
- printf ("CL = 2.5, Clock Unsync'ed, Dunit Control Low register setting undefined\n");
- printf ("Aborting!!!\n");
- hang ();
- } else
- tmp_dunit_control_low = 0x1B1107d2;
- DP (printf
- ("Max. CL is 2.5 CLKs 0x141c= %08lx, 0x1404 = %08lx\n",
- tmp_sdram_mode, tmp_dunit_control_low));
- }
- break;
- case DDR_CL_2:
- tmp_sdram_mode = 0x22; /* CL=2 Burstlength = 4 */
- if (tmp == 1) { /* clocks sync */
- if (info->registeredAddrAndControlInputs == 1) /* registerd DDR SDRAM? */
- tmp_dunit_control_low = 0x04110051;
- else
- tmp_dunit_control_low = 0x03110051;
- DP (printf
- ("Max. CL is 2 CLKs 0x141c= %08lx, 0x1404 = %08lx\n",
- tmp_sdram_mode, tmp_dunit_control_low));
- } else { /* clk sync. bypassed */
-
- if (info->registeredAddrAndControlInputs == 1) { /* registerd DDR SDRAM? */
- printf ("CL = 2, Clock Unsync'ed, Dunit Control Low register setting undefined\n");
- printf ("Aborting!!!\n");
- hang ();
- } else
- tmp_dunit_control_low = 0x3B1107d2;
- DP (printf
- ("Max. CL is 2 CLKs 0x141c= %08lx, 0x1404 = %08lx\n",
- tmp_sdram_mode, tmp_dunit_control_low));
- }
- break;
- case DDR_CL_1_5:
- tmp_sdram_mode = 0x52; /* CL=1.5 Burstlength = 4 */
- if (tmp == 1) { /* clocks sync */
- if (info->registeredAddrAndControlInputs == 1) /* registerd DDR SDRAM? */
- tmp_dunit_control_low = 0x24110051;
- else
- tmp_dunit_control_low = 0x23110051;
- DP (printf
- ("Max. CL is 1.5 CLKs 0x141c= %08lx, 0x1404 = %08lx\n",
- tmp_sdram_mode, tmp_dunit_control_low));
- } else { /* clk sync. bypassed */
-
- if (info->registeredAddrAndControlInputs == 1) { /* registerd DDR SDRAM? */
- printf ("CL = 1.5, Clock Unsync'ed, Dunit Control Low register setting undefined\n");
- printf ("Aborting!!!\n");
- hang ();
- } else
- tmp_dunit_control_low = 0x1A1107d2;
- DP (printf
- ("Max. CL is 1.5 CLKs 0x141c= %08lx, 0x1404 = %08lx\n",
- tmp_sdram_mode, tmp_dunit_control_low));
- }
- break;
-
- default:
- printf ("Max. CL is out of range %d\n",
- info->maxClSupported_DDR);
- hang ();
- break;
- } /* end DDR switch */
- break;
- } /* end CL switch */
-
- /* Write results of CL detection procedure */
- /* set SDRAM mode reg. 0x141c */
- GT_REG_WRITE (SDRAM_MODE, tmp_sdram_mode);
-
- /* set SDRAM mode SetCommand 0x1418 */
- GT_REG_WRITE (SDRAM_OPERATION, 0x3);
- while (GTREGREAD (SDRAM_OPERATION) != 0) {
- DP (printf
- ("\n*** SDRAM_OPERATION 0x1418 after SDRAM_MODE: Module still busy ... please wait... ***\n"));
- }
-
- /* SDRAM D_UNIT_CONTROL_LOW 0x1404 */
- GT_REG_WRITE (D_UNIT_CONTROL_LOW, tmp_dunit_control_low);
-
- /* set SDRAM mode SetCommand 0x1418 */
- GT_REG_WRITE (SDRAM_OPERATION, 0x3);
- while (GTREGREAD (SDRAM_OPERATION) != 0) {
- DP (printf
- ("\n*** SDRAM_OPERATION 1418 after D_UNIT_CONTROL_LOW: Module still busy ... please wait... ***\n"));
- }
-
-/*------------------------------------------------------------------------------ */
-
- /* bank parameters */
- /* SDRAM address decode register 0x1410 */
- /* program this with the default value */
- tmp = 0x02; /* power-up default address select decoding value */
-
- DP (printf ("drb_size (n*64Mbit): %d\n", info->drb_size));
-/* figure out the DRAM chip size */
- sdram_chip_size =
- (1 << (info->numOfRowAddresses + info->numOfColAddresses));
- sdram_chip_size *= info->sdramWidth;
- sdram_chip_size *= 4;
- DP (printf ("computed sdram chip size is %#lx\n", sdram_chip_size));
- /* divide sdram chip size by 64 Mbits */
- sdram_chip_size = sdram_chip_size / 0x4000000;
- switch (sdram_chip_size) {
- case 1: /* 64 Mbit */
- case 2: /* 128 Mbit */
- DP (printf ("RAM-Device_size 64Mbit or 128Mbit)\n"));
- tmp |= (0x00 << 4);
- break;
- case 4: /* 256 Mbit */
- case 8: /* 512 Mbit */
- DP (printf ("RAM-Device_size 256Mbit or 512Mbit)\n"));
- tmp |= (0x01 << 4);
- break;
- case 16: /* 1 Gbit */
- case 32: /* 2 Gbit */
- DP (printf ("RAM-Device_size 1Gbit or 2Gbit)\n"));
- tmp |= (0x02 << 4);
- break;
- default:
- printf ("Error in dram size calculation\n");
- printf ("RAM-Device_size is unsupported\n");
- hang ();
- }
-
- /* SDRAM address control */
- GT_REG_WRITE (SDRAM_ADDR_CONTROL, tmp);
- DP (printf
- ("setting up sdram address control (0x1410) with: %08lx \n",
- tmp));
-
-/* ------------------------------------------------------------------------------ */
-/* same settings for registerd & non-registerd DDR SDRAM */
- DP (printf
- ("setting up sdram_timing_control_low (0x1408) with: %08x \n",
- 0x11511220));
- GT_REG_WRITE (SDRAM_TIMING_CONTROL_LOW, 0x11511220);
-
-
-/* ------------------------------------------------------------------------------ */
-
- /* SDRAM configuration */
- tmp = GTREGREAD (SDRAM_CONFIG);
-
- if (info->registeredAddrAndControlInputs
- || info->registeredDQMBinputs) {
- tmp |= (1 << 17);
- DP (printf
- ("SPD says: registered Addr. and Cont.: %d; registered DQMBinputs: %d\n",
- info->registeredAddrAndControlInputs,
- info->registeredDQMBinputs));
- }
-
- /* Use buffer 1 to return read data to the CPU
- * Page 426 MV64360 */
- tmp |= (1 << 26);
- DP (printf
- ("Before Buffer assignment - sdram_conf (0x1400): %08x\n",
- GTREGREAD (SDRAM_CONFIG)));
- DP (printf
- ("After Buffer assignment - sdram_conf (0x1400): %08x\n",
- GTREGREAD (SDRAM_CONFIG)));
-
- /* SDRAM timing To_do: */
-/* ------------------------------------------------------------------------------ */
-
- DP (printf
- ("setting up sdram_timing_control_high (0x140c) with: %08x \n",
- 0x9));
- GT_REG_WRITE (SDRAM_TIMING_CONTROL_HIGH, 0x9);
-
- DP (printf
- ("setting up sdram address pads control (0x14c0) with: %08x \n",
- 0x7d5014a));
- GT_REG_WRITE (SDRAM_ADDR_CTRL_PADS_CALIBRATION, 0x7d5014a);
-
- DP (printf
- indent: Standard input:1450: Warning:old style assignment ambiguity in "=*". Assuming "= *"
-
-indent: Standard input:1451: Warning:old style assignment ambiguity in "=*". Assuming "= *"
-
- ("setting up sdram data pads control (0x14c4) with: %08x \n",
- 0x7d5014a));
- GT_REG_WRITE (SDRAM_DATA_PADS_CALIBRATION, 0x7d5014a);
-
-/* ------------------------------------------------------------------------------ */
-
- /* set the SDRAM configuration for each bank */
-
-/* for (i = info->slot * 2; i < ((info->slot * 2) + info->banks); i++) */
- {
- i = info->slot;
- DP (printf
- ("\n*** Running a MRS cycle for bank %d ***\n", i));
-
- /* map the bank */
- memory_map_bank (i, 0, GB / 4);
-
- /* set SDRAM mode */ /* To_do check it */
- GT_REG_WRITE (SDRAM_OPERATION, 0x3);
- check = GTREGREAD (SDRAM_OPERATION);
- DP (printf
- ("\n*** SDRAM_OPERATION 1418 (0 = Normal Operation) = %08lx ***\n",
- check));
-
-
- /* switch back to normal operation mode */
- GT_REG_WRITE (SDRAM_OPERATION, 0);
- check = GTREGREAD (SDRAM_OPERATION);
- DP (printf
- ("\n*** SDRAM_OPERATION 1418 (0 = Normal Operation) = %08lx ***\n",
- check));
-
- /* unmap the bank */
- memory_map_bank (i, 0, 0);
- }
-
- return 0;
-
-}
-
-/*
- * Check memory range for valid RAM. A simple memory test determines
- * the actually available RAM size between addresses `base' and
- * `base + maxsize'. Some (not all) hardware errors are detected:
- * - short between address lines
- * - short between data lines
- */
-long int dram_size (long int *base, long int maxsize)
-{
- volatile long int *addr, *b = base;
- long int cnt, val, save1, save2;
-
-#define STARTVAL (1<<20) /* start test at 1M */
- for (cnt = STARTVAL / sizeof (long); cnt < maxsize / sizeof (long);
- cnt <<= 1) {
- addr = base + cnt; /* pointer arith! */
-
- save1 = *addr; /* save contents of addr */
- save2 = *b; /* save contents of base */
-
- *addr = cnt; /* write cnt to addr */
- *b = 0; /* put null at base */
-
- /* check at base address */
- if ((*b) != 0) {
- *addr = save1; /* restore *addr */
- *b = save2; /* restore *b */
- return (0);
- }
- val = *addr; /* read *addr */
- val = *addr; /* read *addr */
-
- *addr = save1;
- *b = save2;
-
- if (val != cnt) {
- DP (printf
- ("Found %08x at Address %08x (failure)\n",
- (unsigned int) val, (unsigned int) addr));
- /* fix boundary condition.. STARTVAL means zero */
- if (cnt == STARTVAL / sizeof (long))
- cnt = 0;
- return (cnt * sizeof (long));
- }
- }
- return maxsize;
-}
-
-/* ------------------------------------------------------------------------- */
-
-/* ppcboot interface function to SDRAM init - this is where all the
- * controlling logic happens */
-long int initdram (int board_type)
-{
- int s0 = 0, s1 = 0;
- int checkbank[4] = {[0 ... 3] = 0 };
- ulong realsize, total, check;
- AUX_MEM_DIMM_INFO dimmInfo1;
- AUX_MEM_DIMM_INFO dimmInfo2;
- int nhr, bank_no;
- ulong dest, memSpaceAttr;
-
- /* first, use the SPD to get info about the SDRAM/ DDRRAM */
-
- /* check the NHR bit and skip mem init if it's already done */
- nhr = get_hid0 () & (1 << 16);
-
- if (nhr) {
- printf ("Skipping SD- DDRRAM setup due to NHR bit being set\n");
- } else {
- /* DIMM0 */
- s0 = check_dimm (0, &dimmInfo1);
-
- /* DIMM1 */
- s1 = check_dimm (1, &dimmInfo2);
-
- memory_map_bank (0, 0, 0);
- memory_map_bank (1, 0, 0);
- memory_map_bank (2, 0, 0);
- memory_map_bank (3, 0, 0);
-
- /* ronen check correct set of DIMMS */
- if (dimmInfo1.numOfModuleBanks && dimmInfo2.numOfModuleBanks) {
- if (dimmInfo1.errorCheckType !=
- dimmInfo2.errorCheckType)
- printf ("***WARNNING***!!!! different ECC support of the DIMMS\n");
- if (dimmInfo1.maxClSupported_DDR !=
- dimmInfo2.maxClSupported_DDR)
- printf ("***WARNNING***!!!! different CAL setting of the DIMMS\n");
- if (dimmInfo1.registeredAddrAndControlInputs !=
- dimmInfo2.registeredAddrAndControlInputs)
- printf ("***WARNNING***!!!! different Registration setting of the DIMMS\n");
- }
-
- if (dimmInfo1.numOfModuleBanks && setup_sdram (&dimmInfo1)) {
- printf ("Setup for DIMM1 failed.\n");
- }
-
- if (dimmInfo2.numOfModuleBanks && setup_sdram (&dimmInfo2)) {
- printf ("Setup for DIMM2 failed.\n");
- }
-
- /* set the NHR bit */
- set_hid0 (get_hid0 () | (1 << 16));
- }
- /* next, size the SDRAM banks */
-
- realsize = total = 0;
- check = GB / 4;
- if (dimmInfo1.numOfModuleBanks > 0) {
- checkbank[0] = 1;
- }
- if (dimmInfo1.numOfModuleBanks > 1) {
- checkbank[1] = 1;
- }
- if (dimmInfo1.numOfModuleBanks > 2)
- printf ("Error, SPD claims DIMM1 has >2 banks\n");
-
- printf ("-- DIMM1 has %d banks\n", dimmInfo1.numOfModuleBanks);
-
- if (dimmInfo2.numOfModuleBanks > 0) {
- checkbank[2] = 1;
- }
- if (dimmInfo2.numOfModuleBanks > 1) {
- checkbank[3] = 1;
- }
- if (dimmInfo2.numOfModuleBanks > 2)
- printf ("Error, SPD claims DIMM2 has >2 banks\n");
-
- printf ("-- DIMM2 has %d banks\n", dimmInfo2.numOfModuleBanks);
-
- for (bank_no = 0; bank_no < CFG_DRAM_BANKS; bank_no++) {
- /* skip over banks that are not populated */
- if (!checkbank[bank_no])
- continue;
-
- /* ronen - realsize = dram_size((long int *)total, check); */
- if (bank_no == 0 || bank_no == 1) {
- if (checkbank[1] == 1)
- realsize = dimmInfo1.size / 2;
- else
- realsize = dimmInfo1.size;
- }
- if (bank_no == 2 || bank_no == 3) {
- if (checkbank[3] == 1)
- realsize = dimmInfo2.size / 2;
- else
- realsize = dimmInfo2.size;
- }
- memory_map_bank (bank_no, total, realsize);
-
- /* ronen - initialize the DRAM for ECC */
-#ifdef CONFIG_MV64360_ECC
- if ((dimmInfo1.errorCheckType != 0) &&
- ((dimmInfo2.errorCheckType != 0)
- || (dimmInfo2.numOfModuleBanks == 0))) {
- printf ("ECC Initialization of Bank %d:", bank_no);
- memSpaceAttr = ((~(BIT0 << bank_no)) & 0xf) << 8;
- mvDmaSetMemorySpace (0, 0, memSpaceAttr, total,
- realsize);
- for (dest = total; dest < total + realsize;
- dest += _8M) {
- mvDmaTransfer (0, total, dest, _8M,
- BIT8 /*DMA_DTL_128BYTES */ |
- BIT3 /*DMA_HOLD_SOURCE_ADDR */
- |
- BIT11
- /*DMA_BLOCK_TRANSFER_MODE */ );
- while (mvDmaIsChannelActive (0));
- }
- printf (" PASS\n");
- }
-#endif
-
- total += realsize;
- }
-
- /* ronen- add DRAM conf prints */
- switch ((GTREGREAD (0x141c) >> 4) & 0x7) {
- case 0x2:
- printf ("CAS Latency = 2");
- break;
- case 0x3:
- printf ("CAS Latency = 3");
- break;
- case 0x5:
- printf ("CAS Latency = 1.5");
- break;
- case 0x6:
- printf ("CAS Latency = 2.5");
- break;
- }
- printf (" tRP = %d tRAS = %d tRCD=%d\n",
- ((GTREGREAD (0x1408) >> 8) & 0xf) + 1,
- ((GTREGREAD (0x1408) >> 20) & 0xf) + 1,
- ((GTREGREAD (0x1408) >> 4) & 0xf) + 1);
-
-/* Setup Ethernet DMA Adress window to DRAM Area */
- if (total > _256M)
- printf ("*** ONLY the first 256MB DRAM memory are used out of the ");
- else
- printf ("Total SDRAM memory is ");
- /* (cause all the 4 BATS are taken) */
- return (total);
-}
-
-
-/* ronen- add Idma functions for usage of the ecc dram init. */
-/*******************************************************************************
-* mvDmaIsChannelActive - Checks if a engine is busy.
-********************************************************************************/
-int mvDmaIsChannelActive (int engine)
-{
- ulong data;
-
- data = GTREGREAD (MV64360_DMA_CHANNEL0_CONTROL + 4 * engine);
- if (data & BIT14 /*activity status */ ) {
- return 1;
- }
- return 0;
-}
-
-/*******************************************************************************
-* mvDmaSetMemorySpace - Set a DMA memory window for the DMA's address decoding
-* map.
-*******************************************************************************/
-int mvDmaSetMemorySpace (ulong memSpace,
- ulong memSpaceTarget,
- ulong memSpaceAttr, ulong baseAddress, ulong size)
-{
- ulong temp;
-
- /* The base address must be aligned to the size. */
- if (baseAddress % size != 0) {
- return 0;
- }
- if (size >= 0x10000 /*64K */ ) {
- size &= 0xffff0000;
- baseAddress = (baseAddress & 0xffff0000);
- /* Set the new attributes */
- GT_REG_WRITE (MV64360_DMA_BASE_ADDR_REG0 + memSpace * 8,
- (baseAddress | memSpaceTarget | memSpaceAttr));
- GT_REG_WRITE ((MV64360_DMA_SIZE_REG0 + memSpace * 8),
- (size - 1) & 0xffff0000);
- temp = GTREGREAD (MV64360_DMA_BASE_ADDR_ENABLE_REG);
- GT_REG_WRITE (DMA_BASE_ADDR_ENABLE_REG,
- (temp & ~(BIT0 << memSpace)));
- return 1;
- }
- return 0;
-}
-
-
-/*******************************************************************************
-* mvDmaTransfer - Transfer data from sourceAddr to destAddr on one of the 4
-* DMA channels.
-********************************************************************************/
-int mvDmaTransfer (int engine, ulong sourceAddr,
- ulong destAddr, ulong numOfBytes, ulong command)
-{
- ulong engOffReg = 0; /* Engine Offset Register */
-
- if (numOfBytes > 0xffff) {
- command = command | BIT31 /*DMA_16M_DESCRIPTOR_MODE */ ;
- }
- command = command | ((command >> 6) & 0x7);
- engOffReg = engine * 4;
- GT_REG_WRITE (MV64360_DMA_CHANNEL0_BYTE_COUNT + engOffReg,
- numOfBytes);
- GT_REG_WRITE (MV64360_DMA_CHANNEL0_SOURCE_ADDR + engOffReg,
- sourceAddr);
- GT_REG_WRITE (MV64360_DMA_CHANNEL0_DESTINATION_ADDR + engOffReg,
- destAddr);
- command =
- command | BIT12 /*DMA_CHANNEL_ENABLE */ | BIT9
- /*DMA_NON_CHAIN_MODE */ ;
- /* Activate DMA engine By writting to mvDmaControlRegister */
- GT_REG_WRITE (MV64360_DMA_CHANNEL0_CONTROL + engOffReg, command);
- return 1;
-}
-
-/****************************************************************************************
- * SDRAM INIT *
- * This procedure detect all Sdram types: 64, 128, 256, 512 Mbit, 1Gbit and 2Gb *
- * This procedure fits only the Atlantis *
- * *
- ***************************************************************************************/
-
-
-/****************************************************************************************
- * DFCDL initialize MV643xx Design Considerations *
- * *
- ***************************************************************************************/
-int set_dfcdlInit (void)
-{
- int i;
- unsigned int dfcdl_word = 0x391; /* 0x14f; ronen new dfcdl */
-
- for (i = 0; i < 64; i++) {
- GT_REG_WRITE (SRAM_DATA0, dfcdl_word);
-/* dfcdl_word += 0x41; - ronen new dfcdl */
- }
- GT_REG_WRITE (DFCDL_CONFIG0, 0x00300000); /* enable dynamic delay line updating */
-
- return (0);
-}
diff --git a/board/Marvell/db64360/u-boot.lds b/board/Marvell/db64360/u-boot.lds
deleted file mode 100644
index d89eb6cff2..0000000000
--- a/board/Marvell/db64360/u-boot.lds
+++ /dev/null
@@ -1,138 +0,0 @@
-/*
- * (C) Copyright 2001
- * Josh Huber <huber@mclx.com>, Mission Critical Linux, Inc.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * u-boot.lds - linker script for U-Boot on the Galileo Eval Board.
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/74xx_7xx/start.o (.text)
-
-/* store the environment in a seperate sector in the boot flash */
-/* . = env_offset; */
-/* common/environment.o(.text) */
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/Marvell/db64460/64460.h b/board/Marvell/db64460/64460.h
deleted file mode 100644
index 8bb0ebfd21..0000000000
--- a/board/Marvell/db64460/64460.h
+++ /dev/null
@@ -1,52 +0,0 @@
-/*
- * (C) Copyright 2003
- * Ingo Assmus <ingo.assmus@keymile.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * main board support/init for the Galileo Eval board DB64460.
- */
-
-#ifndef __64460_H__
-#define __64460_H__
-
-/* CPU Configuration bits */
-#define CPU_CONF_ADDR_MISS_EN (1 << 8)
-#define CPU_CONF_SINGLE_CPU (1 << 11)
-#define CPU_CONF_ENDIANESS (1 << 12)
-#define CPU_CONF_PIPELINE (1 << 13)
-#define CPU_CONF_STOP_RETRY (1 << 17)
-#define CPU_CONF_MULTI_DECODE (1 << 18)
-#define CPU_CONF_DP_VALID (1 << 19)
-#define CPU_CONF_PERR_PROP (1 << 22)
-#define CPU_CONF_AACK_DELAY_2 (1 << 25)
-#define CPU_CONF_AP_VALID (1 << 26)
-#define CPU_CONF_REMAP_WR_DIS (1 << 27)
-
-/* CPU Master Control bits */
-#define CPU_MAST_CTL_ARB_EN (1 << 8)
-#define CPU_MAST_CTL_MASK_BR_1 (1 << 9)
-#define CPU_MAST_CTL_M_WR_TRIG (1 << 10)
-#define CPU_MAST_CTL_M_RD_TRIG (1 << 11)
-#define CPU_MAST_CTL_CLEAN_BLK (1 << 12)
-#define CPU_MAST_CTL_FLUSH_BLK (1 << 13)
-
-#endif /* __64460_H__ */
diff --git a/board/Marvell/db64460/Makefile b/board/Marvell/db64460/Makefile
deleted file mode 100644
index 768ccddbbf..0000000000
--- a/board/Marvell/db64460/Makefile
+++ /dev/null
@@ -1,44 +0,0 @@
-#
-# (C) Copyright 2001
-# Josh Huber <huber@mclx.com>, Mission Critical Linux, Inc.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-SOBJS = ../common/misc.o
-
-OBJS = $(BOARD).o ../common/flash.o ../common/serial.o ../common/memory.o pci.o \
- mv_eth.o ../common/ns16550.o mpsc.o ../common/i2c.o \
- sdram_init.o ../common/intel_flash.o
-
-$(LIB): .depend $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS) $(SOBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/Marvell/db64460/config.mk b/board/Marvell/db64460/config.mk
deleted file mode 100644
index 5a434d9bca..0000000000
--- a/board/Marvell/db64460/config.mk
+++ /dev/null
@@ -1,28 +0,0 @@
-#
-# (C) Copyright 2001
-# Josh Huber <huber@mclx.com>, Mission Critical Linux, Inc.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# EVB64460 boards
-#
-
-TEXT_BASE = 0xfff00000
diff --git a/board/Marvell/db64460/db64460.c b/board/Marvell/db64460/db64460.c
deleted file mode 100644
index a4abf8d1fa..0000000000
--- a/board/Marvell/db64460/db64460.c
+++ /dev/null
@@ -1,936 +0,0 @@
-/*
- * (C) Copyright 2001
- * Josh Huber <huber@mclx.com>, Mission Critical Linux, Inc.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- * modifications for the DB64460 eval board based by Ingo.Assmus@keymile.com
- */
-
-/*
- * db64460.c - main board support/init for the Galileo Eval board.
- */
-
-#include <common.h>
-#include <74xx_7xx.h>
-#include "../include/memory.h"
-#include "../include/pci.h"
-#include "../include/mv_gen_reg.h"
-#include <net.h>
-
-#include "eth.h"
-#include "mpsc.h"
-#include "i2c.h"
-#include "64460.h"
-#include "mv_regs.h"
-
-#undef DEBUG
-/*#define DEBUG */
-
-#define MAP_PCI
-
-#ifdef DEBUG
-#define DP(x) x
-#else
-#define DP(x)
-#endif
-
-extern void flush_data_cache (void);
-extern void invalidate_l1_instruction_cache (void);
-
-/* ------------------------------------------------------------------------- */
-
-/* this is the current GT register space location */
-/* it starts at CFG_DFL_GT_REGS but moves later to CFG_GT_REGS */
-
-/* Unfortunately, we cant change it while we are in flash, so we initialize it
- * to the "final" value. This means that any debug_led calls before
- * board_early_init_f wont work right (like in cpu_init_f).
- * See also my_remap_gt_regs below. (NTL)
- */
-
-void board_prebootm_init (void);
-unsigned int INTERNAL_REG_BASE_ADDR = CFG_GT_REGS;
-int display_mem_map (void);
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * This is a version of the GT register space remapping function that
- * doesn't touch globals (meaning, it's ok to run from flash.)
- *
- * Unfortunately, this has the side effect that a writable
- * INTERNAL_REG_BASE_ADDR is impossible. Oh well.
- */
-
-void my_remap_gt_regs (u32 cur_loc, u32 new_loc)
-{
- u32 temp;
-
- /* check and see if it's already moved */
-
-/* original ppcboot 1.1.6 source
-
- temp = in_le32((u32 *)(new_loc + INTERNAL_SPACE_DECODE));
- if ((temp & 0xffff) == new_loc >> 20)
- return;
-
- temp = (in_le32((u32 *)(cur_loc + INTERNAL_SPACE_DECODE)) &
- 0xffff0000) | (new_loc >> 20);
-
- out_le32((u32 *)(cur_loc + INTERNAL_SPACE_DECODE), temp);
-
- while (GTREGREAD(INTERNAL_SPACE_DECODE) != temp);
-original ppcboot 1.1.6 source end */
-
- temp = in_le32 ((u32 *) (new_loc + INTERNAL_SPACE_DECODE));
- if ((temp & 0xffff) == new_loc >> 16)
- return;
-
- temp = (in_le32 ((u32 *) (cur_loc + INTERNAL_SPACE_DECODE)) &
- 0xffff0000) | (new_loc >> 16);
-
- out_le32 ((u32 *) (cur_loc + INTERNAL_SPACE_DECODE), temp);
-
- while (GTREGREAD (INTERNAL_SPACE_DECODE) != temp);
-}
-
-#ifdef CONFIG_PCI
-
-static void gt_pci_config (void)
-{
- unsigned int stat;
- unsigned int val = 0x00fff864; /* DINK32: BusNum 23:16, DevNum 15:11, FuncNum 10:8, RegNum 7:2 */
-
- /* In PCIX mode devices provide their own bus and device numbers. We query the Discovery II's
- * config registers by writing ones to the bus and device.
- * We then update the Virtual register with the correct value for the bus and device.
- */
- if ((GTREGREAD (PCI_0_MODE) & (BIT4 | BIT5)) != 0) { /*if PCI-X */
- GT_REG_WRITE (PCI_0_CONFIG_ADDR, BIT31 | val);
-
- GT_REG_READ (PCI_0_CONFIG_DATA_VIRTUAL_REG, &stat);
-
- GT_REG_WRITE (PCI_0_CONFIG_ADDR, BIT31 | val);
- GT_REG_WRITE (PCI_0_CONFIG_DATA_VIRTUAL_REG,
- (stat & 0xffff0000) | CFG_PCI_IDSEL);
-
- }
- if ((GTREGREAD (PCI_1_MODE) & (BIT4 | BIT5)) != 0) { /*if PCI-X */
- GT_REG_WRITE (PCI_1_CONFIG_ADDR, BIT31 | val);
- GT_REG_READ (PCI_1_CONFIG_DATA_VIRTUAL_REG, &stat);
-
- GT_REG_WRITE (PCI_1_CONFIG_ADDR, BIT31 | val);
- GT_REG_WRITE (PCI_1_CONFIG_DATA_VIRTUAL_REG,
- (stat & 0xffff0000) | CFG_PCI_IDSEL);
- }
-
- /* Enable master */
- PCI_MASTER_ENABLE (0, SELF);
- PCI_MASTER_ENABLE (1, SELF);
-
- /* Enable PCI0/1 Mem0 and IO 0 disable all others */
- GT_REG_READ (BASE_ADDR_ENABLE, &stat);
- stat |= (1 << 11) | (1 << 12) | (1 << 13) | (1 << 16) | (1 << 17) | (1
- <<
- 18);
- stat &= ~((1 << 9) | (1 << 10) | (1 << 14) | (1 << 15));
- GT_REG_WRITE (BASE_ADDR_ENABLE, stat);
-
- /* ronen- add write to pci remap registers for 64460.
- in 64360 when writing to pci base go and overide remap automaticaly,
- in 64460 it doesn't */
- GT_REG_WRITE (PCI_0_IO_BASE_ADDR, CFG_PCI0_IO_BASE >> 16);
- GT_REG_WRITE (PCI_0I_O_ADDRESS_REMAP, CFG_PCI0_IO_BASE >> 16);
- GT_REG_WRITE (PCI_0_IO_SIZE, (CFG_PCI0_IO_SIZE - 1) >> 16);
-
- GT_REG_WRITE (PCI_0_MEMORY0_BASE_ADDR, CFG_PCI0_MEM_BASE >> 16);
- GT_REG_WRITE (PCI_0MEMORY0_ADDRESS_REMAP, CFG_PCI0_MEM_BASE >> 16);
- GT_REG_WRITE (PCI_0_MEMORY0_SIZE, (CFG_PCI0_MEM_SIZE - 1) >> 16);
-
- GT_REG_WRITE (PCI_1_IO_BASE_ADDR, CFG_PCI1_IO_BASE >> 16);
- GT_REG_WRITE (PCI_1I_O_ADDRESS_REMAP, CFG_PCI1_IO_BASE >> 16);
- GT_REG_WRITE (PCI_1_IO_SIZE, (CFG_PCI1_IO_SIZE - 1) >> 16);
-
- GT_REG_WRITE (PCI_1_MEMORY0_BASE_ADDR, CFG_PCI1_MEM_BASE >> 16);
- GT_REG_WRITE (PCI_1MEMORY0_ADDRESS_REMAP, CFG_PCI1_MEM_BASE >> 16);
- GT_REG_WRITE (PCI_1_MEMORY0_SIZE, (CFG_PCI1_MEM_SIZE - 1) >> 16);
-
- /* PCI interface settings */
- /* Timeout set to retry forever */
- GT_REG_WRITE (PCI_0TIMEOUT_RETRY, 0x0);
- GT_REG_WRITE (PCI_1TIMEOUT_RETRY, 0x0);
-
- /* ronen - enable only CS0 and Internal reg!! */
- GT_REG_WRITE (PCI_0BASE_ADDRESS_REGISTERS_ENABLE, 0xfffffdfe);
- GT_REG_WRITE (PCI_1BASE_ADDRESS_REGISTERS_ENABLE, 0xfffffdfe);
-
-/*ronen update the pci internal registers base address.*/
-#ifdef MAP_PCI
- for (stat = 0; stat <= PCI_HOST1; stat++)
- pciWriteConfigReg (stat,
- PCI_INTERNAL_REGISTERS_MEMORY_MAPPED_BASE_ADDRESS,
- SELF, CFG_GT_REGS);
-#endif
-
-}
-#endif
-
-/* Setup CPU interface paramaters */
-static void gt_cpu_config (void)
-{
- cpu_t cpu = get_cpu_type ();
- ulong tmp;
-
- /* cpu configuration register */
- tmp = GTREGREAD (CPU_CONFIGURATION);
-
- /* set the SINGLE_CPU bit see MV64460 P.399 */
-#ifndef CFG_GT_DUAL_CPU /* SINGLE_CPU seems to cause JTAG problems */
- tmp |= CPU_CONF_SINGLE_CPU;
-#endif
-
- tmp &= ~CPU_CONF_AACK_DELAY_2;
-
- tmp |= CPU_CONF_DP_VALID;
- tmp |= CPU_CONF_AP_VALID;
-
- tmp |= CPU_CONF_PIPELINE;
-
- GT_REG_WRITE (CPU_CONFIGURATION, tmp); /* Marvell (VXWorks) writes 0x20220FF */
-
- /* CPU master control register */
- tmp = GTREGREAD (CPU_MASTER_CONTROL);
-
- tmp |= CPU_MAST_CTL_ARB_EN;
-
- if ((cpu == CPU_7400) ||
- (cpu == CPU_7410) || (cpu == CPU_7455) || (cpu == CPU_7450)) {
-
- tmp |= CPU_MAST_CTL_CLEAN_BLK;
- tmp |= CPU_MAST_CTL_FLUSH_BLK;
-
- } else {
- /* cleanblock must be cleared for CPUs
- * that do not support this command (603e, 750)
- * see Res#1 */
- tmp &= ~CPU_MAST_CTL_CLEAN_BLK;
- tmp &= ~CPU_MAST_CTL_FLUSH_BLK;
- }
- GT_REG_WRITE (CPU_MASTER_CONTROL, tmp);
-}
-
-/*
- * board_early_init_f.
- *
- * set up gal. device mappings, etc.
- */
-int board_early_init_f (void)
-{
- uchar sram_boot = 0;
-
- /*
- * set up the GT the way the kernel wants it
- * the call to move the GT register space will obviously
- * fail if it has already been done, but we're going to assume
- * that if it's not at the power-on location, it's where we put
- * it last time. (huber)
- */
-
- my_remap_gt_regs (CFG_DFL_GT_REGS, CFG_GT_REGS);
-
- /* No PCI in first release of Port To_do: enable it. */
-#ifdef CONFIG_PCI
- gt_pci_config ();
-#endif
- /* mask all external interrupt sources */
- GT_REG_WRITE (CPU_INTERRUPT_MASK_REGISTER_LOW, 0);
- GT_REG_WRITE (CPU_INTERRUPT_MASK_REGISTER_HIGH, 0);
- /* new in MV6446x */
- GT_REG_WRITE (CPU_INTERRUPT_1_MASK_REGISTER_LOW, 0);
- GT_REG_WRITE (CPU_INTERRUPT_1_MASK_REGISTER_HIGH, 0);
- /* --------------------- */
- GT_REG_WRITE (PCI_0INTERRUPT_CAUSE_MASK_REGISTER_LOW, 0);
- GT_REG_WRITE (PCI_0INTERRUPT_CAUSE_MASK_REGISTER_HIGH, 0);
- GT_REG_WRITE (PCI_1INTERRUPT_CAUSE_MASK_REGISTER_LOW, 0);
- GT_REG_WRITE (PCI_1INTERRUPT_CAUSE_MASK_REGISTER_HIGH, 0);
- /* does not exist in MV6446x
- GT_REG_WRITE(CPU_INT_0_MASK, 0);
- GT_REG_WRITE(CPU_INT_1_MASK, 0);
- GT_REG_WRITE(CPU_INT_2_MASK, 0);
- GT_REG_WRITE(CPU_INT_3_MASK, 0);
- --------------------- */
-
-
- /* ----- DEVICE BUS SETTINGS ------ */
-
- /*
- * EVB
- * 0 - SRAM ????
- * 1 - RTC ????
- * 2 - UART ????
- * 3 - Flash checked 32Bit Intel Strata
- * boot - BootCS checked 8Bit 29LV040B
- *
- * Zuma
- * 0 - Flash
- * boot - BootCS
- */
-
- /*
- * the dual 7450 module requires burst access to the boot
- * device, so the serial rom copies the boot device to the
- * on-board sram on the eval board, and updates the correct
- * registers to boot from the sram. (device0)
- */
- if (memoryGetDeviceBaseAddress (DEVICE0) == CFG_DFL_BOOTCS_BASE)
- sram_boot = 1;
- if (!sram_boot)
- memoryMapDeviceSpace (DEVICE0, CFG_DEV0_SPACE, CFG_DEV0_SIZE);
-
- memoryMapDeviceSpace (DEVICE1, CFG_DEV1_SPACE, CFG_DEV1_SIZE);
- memoryMapDeviceSpace (DEVICE2, CFG_DEV2_SPACE, CFG_DEV2_SIZE);
- memoryMapDeviceSpace (DEVICE3, CFG_DEV3_SPACE, CFG_DEV3_SIZE);
-
-
- /* configure device timing */
-#ifdef CFG_DEV0_PAR /* set port parameters for SRAM device module access */
- if (!sram_boot)
- GT_REG_WRITE (DEVICE_BANK0PARAMETERS, CFG_DEV0_PAR);
-#endif
-
-#ifdef CFG_DEV1_PAR /* set port parameters for RTC device module access */
- GT_REG_WRITE (DEVICE_BANK1PARAMETERS, CFG_DEV1_PAR);
-#endif
-#ifdef CFG_DEV2_PAR /* set port parameters for DUART device module access */
- GT_REG_WRITE (DEVICE_BANK2PARAMETERS, CFG_DEV2_PAR);
-#endif
-
-#ifdef CFG_32BIT_BOOT_PAR /* set port parameters for Flash device module access */
- /* detect if we are booting from the 32 bit flash */
- if (GTREGREAD (DEVICE_BOOT_BANK_PARAMETERS) & (0x3 << 20)) {
- /* 32 bit boot flash */
- GT_REG_WRITE (DEVICE_BANK3PARAMETERS, CFG_8BIT_BOOT_PAR);
- GT_REG_WRITE (DEVICE_BOOT_BANK_PARAMETERS,
- CFG_32BIT_BOOT_PAR);
- } else {
- /* 8 bit boot flash */
- GT_REG_WRITE (DEVICE_BANK3PARAMETERS, CFG_32BIT_BOOT_PAR);
- GT_REG_WRITE (DEVICE_BOOT_BANK_PARAMETERS, CFG_8BIT_BOOT_PAR);
- }
-#else
- /* 8 bit boot flash only */
-/* GT_REG_WRITE(DEVICE_BOOT_BANK_PARAMETERS, CFG_8BIT_BOOT_PAR);*/
-#endif
-
-
- gt_cpu_config ();
-
- /* MPP setup */
- GT_REG_WRITE (MPP_CONTROL0, CFG_MPP_CONTROL_0);
- GT_REG_WRITE (MPP_CONTROL1, CFG_MPP_CONTROL_1);
- GT_REG_WRITE (MPP_CONTROL2, CFG_MPP_CONTROL_2);
- GT_REG_WRITE (MPP_CONTROL3, CFG_MPP_CONTROL_3);
-
- GT_REG_WRITE (GPP_LEVEL_CONTROL, CFG_GPP_LEVEL_CONTROL);
- DEBUG_LED0_ON ();
- DEBUG_LED1_ON ();
- DEBUG_LED2_ON ();
-
- return 0;
-}
-
-/* various things to do after relocation */
-
-int misc_init_r ()
-{
- icache_enable ();
-#ifdef CFG_L2
- l2cache_enable ();
-#endif
-#ifdef CONFIG_MPSC
-
- mpsc_sdma_init ();
- mpsc_init2 ();
-#endif
-
-#if 0
- /* disable the dcache and MMU */
- dcache_lock ();
-#endif
- return 0;
-}
-
-void after_reloc (ulong dest_addr, gd_t * gd)
-{
- /* check to see if we booted from the sram. If so, move things
- * back to the way they should be. (we're running from main
- * memory at this point now */
- if (memoryGetDeviceBaseAddress (DEVICE0) == CFG_DFL_BOOTCS_BASE) {
- memoryMapDeviceSpace (DEVICE0, CFG_DEV0_SPACE, CFG_DEV0_SIZE);
- memoryMapDeviceSpace (BOOT_DEVICE, CFG_DFL_BOOTCS_BASE, _8M);
- }
- display_mem_map ();
- /* now, jump to the main ppcboot board init code */
- board_init_r (gd, dest_addr);
- /* NOTREACHED */
-}
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Check Board Identity:
- *
- * right now, assume borad type. (there is just one...after all)
- */
-
-int checkboard (void)
-{
- int l_type = 0;
-
- printf ("BOARD: %s\n", CFG_BOARD_NAME);
- return (l_type);
-}
-
-/* utility functions */
-void debug_led (int led, int mode)
-{
- volatile int *addr = 0;
- int dummy;
-
- if (mode == 1) {
- switch (led) {
- case 0:
- addr = (int *) ((unsigned int) CFG_DEV1_SPACE |
- 0x08000);
- break;
-
- case 1:
- addr = (int *) ((unsigned int) CFG_DEV1_SPACE |
- 0x0c000);
- break;
-
- case 2:
- addr = (int *) ((unsigned int) CFG_DEV1_SPACE |
- 0x10000);
- break;
- }
- } else if (mode == 0) {
- switch (led) {
- case 0:
- addr = (int *) ((unsigned int) CFG_DEV1_SPACE |
- 0x14000);
- break;
-
- case 1:
- addr = (int *) ((unsigned int) CFG_DEV1_SPACE |
- 0x18000);
- break;
-
- case 2:
- addr = (int *) ((unsigned int) CFG_DEV1_SPACE |
- 0x1c000);
- break;
- }
- }
-
- dummy = *addr;
-}
-
-int display_mem_map (void)
-{
- int i, j;
- unsigned int base, size, width;
-
- /* SDRAM */
- printf ("SD (DDR) RAM\n");
- for (i = 0; i <= BANK3; i++) {
- base = memoryGetBankBaseAddress (i);
- size = memoryGetBankSize (i);
- if (size != 0) {
- printf ("BANK%d: base - 0x%08x\tsize - %dM bytes\n",
- i, base, size >> 20);
- }
- }
-
- /* CPU's PCI windows */
- for (i = 0; i <= PCI_HOST1; i++) {
- printf ("\nCPU's PCI %d windows\n", i);
- base = pciGetSpaceBase (i, PCI_IO);
- size = pciGetSpaceSize (i, PCI_IO);
- printf (" IO: base - 0x%08x\tsize - %dM bytes\n", base,
- size >> 20);
- for (j = 0;
- j <=
- PCI_REGION0
- /*ronen currently only first PCI MEM is used 3 */ ;
- j++) {
- base = pciGetSpaceBase (i, j);
- size = pciGetSpaceSize (i, j);
- printf ("MEMORY %d: base - 0x%08x\tsize - %dM bytes\n", j, base, size >> 20);
- }
- }
-
- /* Devices */
- printf ("\nDEVICES\n");
- for (i = 0; i <= DEVICE3; i++) {
- base = memoryGetDeviceBaseAddress (i);
- size = memoryGetDeviceSize (i);
- width = memoryGetDeviceWidth (i) * 8;
- printf ("DEV %d: base - 0x%08x size - %dM bytes\twidth - %d bits", i, base, size >> 20, width);
- if (i == 0)
- printf ("\t- EXT SRAM (actual - 1M)\n");
- else if (i == 1)
- printf ("\t- RTC\n");
- else if (i == 2)
- printf ("\t- UART\n");
- else
- printf ("\t- LARGE FLASH\n");
- }
-
- /* Bootrom */
- base = memoryGetDeviceBaseAddress (BOOT_DEVICE); /* Boot */
- size = memoryGetDeviceSize (BOOT_DEVICE);
- width = memoryGetDeviceWidth (BOOT_DEVICE) * 8;
- printf (" BOOT: base - 0x%08x size - %dM bytes\twidth - %d bits\n",
- base, size >> 20, width);
- return (0);
-}
-
-/* DRAM check routines copied from gw8260 */
-
-#if defined (CFG_DRAM_TEST)
-
-/*********************************************************************/
-/* NAME: move64() - moves a double word (64-bit) */
-/* */
-/* DESCRIPTION: */
-/* this function performs a double word move from the data at */
-/* the source pointer to the location at the destination pointer. */
-/* */
-/* INPUTS: */
-/* unsigned long long *src - pointer to data to move */
-/* */
-/* OUTPUTS: */
-/* unsigned long long *dest - pointer to locate to move data */
-/* */
-/* RETURNS: */
-/* None */
-/* */
-/* RESTRICTIONS/LIMITATIONS: */
-/* May cloober fr0. */
-/* */
-/*********************************************************************/
-static void move64 (unsigned long long *src, unsigned long long *dest)
-{
- asm ("lfd 0, 0(3)\n\t" /* fpr0 = *scr */
- "stfd 0, 0(4)" /* *dest = fpr0 */
- : : : "fr0"); /* Clobbers fr0 */
- return;
-}
-
-
-#if defined (CFG_DRAM_TEST_DATA)
-
-unsigned long long pattern[] = {
- 0xaaaaaaaaaaaaaaaaULL,
- 0xccccccccccccccccULL,
- 0xf0f0f0f0f0f0f0f0ULL,
- 0xff00ff00ff00ff00ULL,
- 0xffff0000ffff0000ULL,
- 0xffffffff00000000ULL,
- 0x00000000ffffffffULL,
- 0x0000ffff0000ffffULL,
- 0x00ff00ff00ff00ffULL,
- 0x0f0f0f0f0f0f0f0fULL,
- 0x3333333333333333ULL,
- 0x5555555555555555ULL,
-};
-
-/*********************************************************************/
-/* NAME: mem_test_data() - test data lines for shorts and opens */
-/* */
-/* DESCRIPTION: */
-/* Tests data lines for shorts and opens by forcing adjacent data */
-/* to opposite states. Because the data lines could be routed in */
-/* an arbitrary manner the must ensure test patterns ensure that */
-/* every case is tested. By using the following series of binary */
-/* patterns every combination of adjacent bits is test regardless */
-/* of routing. */
-/* */
-/* ...101010101010101010101010 */
-/* ...110011001100110011001100 */
-/* ...111100001111000011110000 */
-/* ...111111110000000011111111 */
-/* */
-/* Carrying this out, gives us six hex patterns as follows: */
-/* */
-/* 0xaaaaaaaaaaaaaaaa */
-/* 0xcccccccccccccccc */
-/* 0xf0f0f0f0f0f0f0f0 */
-/* 0xff00ff00ff00ff00 */
-/* 0xffff0000ffff0000 */
-/* 0xffffffff00000000 */
-/* */
-/* The number test patterns will always be given by: */
-/* */
-/* log(base 2)(number data bits) = log2 (64) = 6 */
-/* */
-/* To test for short and opens to other signals on our boards. we */
-/* simply */
-/* test with the 1's complemnt of the paterns as well. */
-/* */
-/* OUTPUTS: */
-/* Displays failing test pattern */
-/* */
-/* RETURNS: */
-/* 0 - Passed test */
-/* 1 - Failed test */
-/* */
-/* RESTRICTIONS/LIMITATIONS: */
-/* Assumes only one one SDRAM bank */
-/* */
-/*********************************************************************/
-int mem_test_data (void)
-{
- unsigned long long *pmem = (unsigned long long *) CFG_MEMTEST_START;
- unsigned long long temp64 = 0;
- int num_patterns = sizeof (pattern) / sizeof (pattern[0]);
- int i;
- unsigned int hi, lo;
-
- for (i = 0; i < num_patterns; i++) {
- move64 (&(pattern[i]), pmem);
- move64 (pmem, &temp64);
-
- /* hi = (temp64>>32) & 0xffffffff; */
- /* lo = temp64 & 0xffffffff; */
- /* printf("\ntemp64 = 0x%08x%08x", hi, lo); */
-
- hi = (pattern[i] >> 32) & 0xffffffff;
- lo = pattern[i] & 0xffffffff;
- /* printf("\npattern[%d] = 0x%08x%08x", i, hi, lo); */
-
- if (temp64 != pattern[i]) {
- printf ("\n Data Test Failed, pattern 0x%08x%08x",
- hi, lo);
- return 1;
- }
- }
-
- return 0;
-}
-#endif /* CFG_DRAM_TEST_DATA */
-
-#if defined (CFG_DRAM_TEST_ADDRESS)
-/*********************************************************************/
-/* NAME: mem_test_address() - test address lines */
-/* */
-/* DESCRIPTION: */
-/* This function performs a test to verify that each word im */
-/* memory is uniquly addressable. The test sequence is as follows: */
-/* */
-/* 1) write the address of each word to each word. */
-/* 2) verify that each location equals its address */
-/* */
-/* OUTPUTS: */
-/* Displays failing test pattern and address */
-/* */
-/* RETURNS: */
-/* 0 - Passed test */
-/* 1 - Failed test */
-/* */
-/* RESTRICTIONS/LIMITATIONS: */
-/* */
-/* */
-/*********************************************************************/
-int mem_test_address (void)
-{
- volatile unsigned int *pmem =
- (volatile unsigned int *) CFG_MEMTEST_START;
- const unsigned int size = (CFG_MEMTEST_END - CFG_MEMTEST_START) / 4;
- unsigned int i;
-
- /* write address to each location */
- for (i = 0; i < size; i++) {
- pmem[i] = i;
- }
-
- /* verify each loaction */
- for (i = 0; i < size; i++) {
- if (pmem[i] != i) {
- printf ("\n Address Test Failed at 0x%x", i);
- return 1;
- }
- }
- return 0;
-}
-#endif /* CFG_DRAM_TEST_ADDRESS */
-
-#if defined (CFG_DRAM_TEST_WALK)
-/*********************************************************************/
-/* NAME: mem_march() - memory march */
-/* */
-/* DESCRIPTION: */
-/* Marches up through memory. At each location verifies rmask if */
-/* read = 1. At each location write wmask if write = 1. Displays */
-/* failing address and pattern. */
-/* */
-/* INPUTS: */
-/* volatile unsigned long long * base - start address of test */
-/* unsigned int size - number of dwords(64-bit) to test */
-/* unsigned long long rmask - read verify mask */
-/* unsigned long long wmask - wrtie verify mask */
-/* short read - verifies rmask if read = 1 */
-/* short write - writes wmask if write = 1 */
-/* */
-/* OUTPUTS: */
-/* Displays failing test pattern and address */
-/* */
-/* RETURNS: */
-/* 0 - Passed test */
-/* 1 - Failed test */
-/* */
-/* RESTRICTIONS/LIMITATIONS: */
-/* */
-/* */
-/*********************************************************************/
-int mem_march (volatile unsigned long long *base,
- unsigned int size,
- unsigned long long rmask,
- unsigned long long wmask, short read, short write)
-{
- unsigned int i;
- unsigned long long temp = 0;
- unsigned int hitemp, lotemp, himask, lomask;
-
- for (i = 0; i < size; i++) {
- if (read != 0) {
- /* temp = base[i]; */
- move64 ((unsigned long long *) &(base[i]), &temp);
- if (rmask != temp) {
- hitemp = (temp >> 32) & 0xffffffff;
- lotemp = temp & 0xffffffff;
- himask = (rmask >> 32) & 0xffffffff;
- lomask = rmask & 0xffffffff;
-
- printf ("\n Walking one's test failed: address = 0x%08x," "\n\texpected 0x%08x%08x, found 0x%08x%08x", i << 3, himask, lomask, hitemp, lotemp);
- return 1;
- }
- }
- if (write != 0) {
- /* base[i] = wmask; */
- move64 (&wmask, (unsigned long long *) &(base[i]));
- }
- }
- return 0;
-}
-#endif /* CFG_DRAM_TEST_WALK */
-
-/*********************************************************************/
-/* NAME: mem_test_walk() - a simple walking ones test */
-/* */
-/* DESCRIPTION: */
-/* Performs a walking ones through entire physical memory. The */
-/* test uses as series of memory marches, mem_march(), to verify */
-/* and write the test patterns to memory. The test sequence is as */
-/* follows: */
-/* 1) march writing 0000...0001 */
-/* 2) march verifying 0000...0001 , writing 0000...0010 */
-/* 3) repeat step 2 shifting masks left 1 bit each time unitl */
-/* the write mask equals 1000...0000 */
-/* 4) march verifying 1000...0000 */
-/* The test fails if any of the memory marches return a failure. */
-/* */
-/* OUTPUTS: */
-/* Displays which pass on the memory test is executing */
-/* */
-/* RETURNS: */
-/* 0 - Passed test */
-/* 1 - Failed test */
-/* */
-/* RESTRICTIONS/LIMITATIONS: */
-/* */
-/* */
-/*********************************************************************/
-int mem_test_walk (void)
-{
- unsigned long long mask;
- volatile unsigned long long *pmem =
- (volatile unsigned long long *) CFG_MEMTEST_START;
- const unsigned long size = (CFG_MEMTEST_END - CFG_MEMTEST_START) / 8;
-
- unsigned int i;
-
- mask = 0x01;
-
- printf ("Initial Pass");
- mem_march (pmem, size, 0x0, 0x1, 0, 1);
-
- printf ("\b\b\b\b\b\b\b\b\b\b\b\b");
- printf (" ");
- printf (" ");
- printf ("\b\b\b\b\b\b\b\b\b\b\b\b");
-
- for (i = 0; i < 63; i++) {
- printf ("Pass %2d", i + 2);
- if (mem_march (pmem, size, mask, mask << 1, 1, 1) != 0) {
- /*printf("mask: 0x%x, pass: %d, ", mask, i); */
- return 1;
- }
- mask = mask << 1;
- printf ("\b\b\b\b\b\b\b");
- }
-
- printf ("Last Pass");
- if (mem_march (pmem, size, 0, mask, 0, 1) != 0) {
- /* printf("mask: 0x%x", mask); */
- return 1;
- }
- printf ("\b\b\b\b\b\b\b\b\b");
- printf (" ");
- printf ("\b\b\b\b\b\b\b\b\b");
-
- return 0;
-}
-
-/*********************************************************************/
-/* NAME: testdram() - calls any enabled memory tests */
-/* */
-/* DESCRIPTION: */
-/* Runs memory tests if the environment test variables are set to */
-/* 'y'. */
-/* */
-/* INPUTS: */
-/* testdramdata - If set to 'y', data test is run. */
-/* testdramaddress - If set to 'y', address test is run. */
-/* testdramwalk - If set to 'y', walking ones test is run */
-/* */
-/* OUTPUTS: */
-/* None */
-/* */
-/* RETURNS: */
-/* 0 - Passed test */
-/* 1 - Failed test */
-/* */
-/* RESTRICTIONS/LIMITATIONS: */
-/* */
-/* */
-/*********************************************************************/
-int testdram (void)
-{
- char *s;
- int rundata, runaddress, runwalk;
-
- s = getenv ("testdramdata");
- rundata = (s && (*s == 'y')) ? 1 : 0;
- s = getenv ("testdramaddress");
- runaddress = (s && (*s == 'y')) ? 1 : 0;
- s = getenv ("testdramwalk");
- runwalk = (s && (*s == 'y')) ? 1 : 0;
-
-/* rundata = 1; */
-/* runaddress = 0; */
-/* runwalk = 0; */
-
- if ((rundata == 1) || (runaddress == 1) || (runwalk == 1)) {
- printf ("Testing RAM from 0x%08x to 0x%08x ... (don't panic... that will take a moment !!!!)\n", CFG_MEMTEST_START, CFG_MEMTEST_END);
- }
-#ifdef CFG_DRAM_TEST_DATA
- if (rundata == 1) {
- printf ("Test DATA ... ");
- if (mem_test_data () == 1) {
- printf ("failed \n");
- return 1;
- } else
- printf ("ok \n");
- }
-#endif
-#ifdef CFG_DRAM_TEST_ADDRESS
- if (runaddress == 1) {
- printf ("Test ADDRESS ... ");
- if (mem_test_address () == 1) {
- printf ("failed \n");
- return 1;
- } else
- printf ("ok \n");
- }
-#endif
-#ifdef CFG_DRAM_TEST_WALK
- if (runwalk == 1) {
- printf ("Test WALKING ONEs ... ");
- if (mem_test_walk () == 1) {
- printf ("failed \n");
- return 1;
- } else
- printf ("ok \n");
- }
-#endif
- if ((rundata == 1) || (runaddress == 1) || (runwalk == 1)) {
- printf ("passed\n");
- }
- return 0;
-
-}
-#endif /* CFG_DRAM_TEST */
-
-/* ronen - the below functions are used by the bootm function */
-/* - we map the base register to fbe00000 (same mapping as in the LSP) */
-/* - we turn off the RX gig dmas - to prevent the dma from overunning */
-/* the kernel data areas. */
-/* - we diable and invalidate the icache and dcache. */
-void my_remap_gt_regs_bootm (u32 cur_loc, u32 new_loc)
-{
- u32 temp;
-
- temp = in_le32 ((u32 *) (new_loc + INTERNAL_SPACE_DECODE));
- if ((temp & 0xffff) == new_loc >> 16)
- return;
-
- temp = (in_le32 ((u32 *) (cur_loc + INTERNAL_SPACE_DECODE)) &
- 0xffff0000) | (new_loc >> 16);
-
- out_le32 ((u32 *) (cur_loc + INTERNAL_SPACE_DECODE), temp);
-
- while ((WORD_SWAP (*((volatile unsigned int *) (NONE_CACHEABLE |
- new_loc |
- (INTERNAL_SPACE_DECODE)))))
- != temp);
-
-}
-
-void board_prebootm_init ()
-{
-
-/* change window size of PCI1 IO in order tp prevent overlaping with REG BASE. */
- GT_REG_WRITE (PCI_1_IO_SIZE, (_64K - 1) >> 16);
-
-/* Stop GigE Rx DMA engines */
- GT_REG_WRITE (MV64460_ETH_RECEIVE_QUEUE_COMMAND_REG (0), 0x0000ff00);
- GT_REG_WRITE (MV64460_ETH_RECEIVE_QUEUE_COMMAND_REG (1), 0x0000ff00);
- GT_REG_WRITE (MV64460_ETH_RECEIVE_QUEUE_COMMAND_REG (2), 0x0000ff00);
-
-/* Relocate MV64460 internal regs */
- my_remap_gt_regs_bootm (CFG_GT_REGS, BRIDGE_REG_BASE_BOOTM);
-
- icache_disable ();
- invalidate_l1_instruction_cache ();
- flush_data_cache ();
- dcache_disable ();
-}
diff --git a/board/Marvell/db64460/eth.h b/board/Marvell/db64460/eth.h
deleted file mode 100644
index 6c3b2e0ba0..0000000000
--- a/board/Marvell/db64460/eth.h
+++ /dev/null
@@ -1,41 +0,0 @@
-/*
- * (C) Copyright 2001
- * Josh Huber <huber@mclx.com>, Mission Critical Linux, Inc.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * eth.h - header file for the polled mode GT ethernet driver
- */
-
-#ifndef __EVB64460_ETH_H__
-#define __EVB64460_ETH_H__
-
-#include <asm/types.h>
-#include <asm/io.h>
-#include <asm/byteorder.h>
-#include <common.h>
-
-int db64460_eth0_poll(void);
-int db64460_eth0_transmit(unsigned int s, volatile char *p);
-void db64460_eth0_disable(void);
-bool network_start(bd_t *bis);
-
-#endif /* __EVB64460_ETH_H__ */
diff --git a/board/Marvell/db64460/mpsc.c b/board/Marvell/db64460/mpsc.c
deleted file mode 100644
index 33fbc49162..0000000000
--- a/board/Marvell/db64460/mpsc.c
+++ /dev/null
@@ -1,1019 +0,0 @@
-/*
- * (C) Copyright 2001
- * John Clemens <clemens@mclx.com>, Mission Critical Linux, Inc.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*************************************************************************
- * changes for Marvell DB64460 eval board 2003 by Ingo Assmus <ingo.assmus@keymile.com>
- *
- ************************************************************************/
-
-/*
- * mpsc.c - driver for console over the MPSC.
- */
-
-
-#include <common.h>
-#include <config.h>
-#include <asm/cache.h>
-
-#include <malloc.h>
-#include "mpsc.h"
-
-#include "mv_regs.h"
-
-#include "../include/memory.h"
-
-/* Define this if you wish to use the MPSC as a register based UART.
- * This will force the serial port to not use the SDMA engine at all.
- */
-#undef CONFIG_MPSC_DEBUG_PORT
-
-
-int (*mpsc_putchar) (char ch) = mpsc_putchar_early;
-char (*mpsc_getchar) (void) = mpsc_getchar_debug;
-int (*mpsc_test_char) (void) = mpsc_test_char_debug;
-
-
-static volatile unsigned int *rx_desc_base = NULL;
-static unsigned int rx_desc_index = 0;
-static volatile unsigned int *tx_desc_base = NULL;
-static unsigned int tx_desc_index = 0;
-
-/* local function declarations */
-static int galmpsc_connect (int channel, int connect);
-static int galmpsc_route_rx_clock (int channel, int brg);
-static int galmpsc_route_tx_clock (int channel, int brg);
-static int galmpsc_write_config_regs (int mpsc, int mode);
-static int galmpsc_config_channel_regs (int mpsc);
-static int galmpsc_set_char_length (int mpsc, int value);
-static int galmpsc_set_stop_bit_length (int mpsc, int value);
-static int galmpsc_set_parity (int mpsc, int value);
-static int galmpsc_enter_hunt (int mpsc);
-static int galmpsc_set_brkcnt (int mpsc, int value);
-static int galmpsc_set_tcschar (int mpsc, int value);
-static int galmpsc_set_snoop (int mpsc, int value);
-static int galmpsc_shutdown (int mpsc);
-
-static int galsdma_set_RFT (int channel);
-static int galsdma_set_SFM (int channel);
-static int galsdma_set_rxle (int channel);
-static int galsdma_set_txle (int channel);
-static int galsdma_set_burstsize (int channel, unsigned int value);
-static int galsdma_set_RC (int channel, unsigned int value);
-
-static int galbrg_set_CDV (int channel, int value);
-static int galbrg_enable (int channel);
-static int galbrg_disable (int channel);
-static int galbrg_set_clksrc (int channel, int value);
-static int galbrg_set_CUV (int channel, int value);
-
-static void galsdma_enable_rx (void);
-static int galsdma_set_mem_space (unsigned int memSpace,
- unsigned int memSpaceTarget,
- unsigned int memSpaceAttr,
- unsigned int baseAddress,
- unsigned int size);
-
-
-#define SOFTWARE_CACHE_MANAGEMENT
-
-#ifdef SOFTWARE_CACHE_MANAGEMENT
-#define FLUSH_DCACHE(a,b) if(dcache_status()){clean_dcache_range((u32)(a),(u32)(b));}
-#define FLUSH_AND_INVALIDATE_DCACHE(a,b) if(dcache_status()){flush_dcache_range((u32)(a),(u32)(b));}
-#define INVALIDATE_DCACHE(a,b) if(dcache_status()){invalidate_dcache_range((u32)(a),(u32)(b));}
-#else
-#define FLUSH_DCACHE(a,b)
-#define FLUSH_AND_INVALIDATE_DCACHE(a,b)
-#define INVALIDATE_DCACHE(a,b)
-#endif
-
-#ifdef CONFIG_MPSC_DEBUG_PORT
-static void mpsc_debug_init (void)
-{
-
- volatile unsigned int temp;
-
- /* Clear the CFR (CHR4) */
- /* Write random 'Z' bit (bit 29) of CHR4 to enable debug uart *UNDOCUMENTED FEATURE* */
- temp = GTREGREAD (GALMPSC_CHANNELREG_4 + (CHANNEL * GALMPSC_indent: Standard input:229: Warning:old style assignment ambiguity in "=&". Assuming "= &"
-
-REG_GAP));
- temp &= 0xffffff00;
- temp |= BIT29;
- GT_REG_WRITE (GALMPSC_CHANNELREG_4 + (CHANNEL * GALMPSC_REG_GAP),
- temp);
-
- /* Set the Valid bit 'V' (bit 12) and int generation bit 'INT' (bit 15) */
- temp = GTREGREAD (GALMPSC_CHANNELREG_5 + (CHANNEL * GALMPSC_REG_GAP));
- temp |= (BIT12 | BIT15);
- GT_REG_WRITE (GALMPSC_CHANNELREG_5 + (CHANNEL * GALMPSC_REG_GAP),
- temp);
-
- /* Set int mask */
- temp = GTREGREAD (GALMPSC_0_INT_MASK);
- temp |= BIT6;
- GT_REG_WRITE (GALMPSC_0_INT_MASK, temp);
-}
-#endif
-
-char mpsc_getchar_debug (void)
-{
- volatile int temp;
- volatile unsigned int cause;
-
- cause = GTREGREAD (GALMPSC_0_INT_CAUSE);
- while ((cause & BIT6) == 0) {
- cause = GTREGREAD (GALMPSC_0_INT_CAUSE);
- }
-
- temp = GTREGREAD (GALMPSC_CHANNELREG_10 +
- (CHANNEL * GALMPSC_REG_GAP));
- /* By writing 1's to the set bits, the register is cleared */
- GT_REG_WRITE (GALMPSC_CHANNELREG_10 + (CHANNEL * GALMPSC_REG_GAP),
- temp);
- GT_REG_WRITE (GALMPSC_0_INT_CAUSE, cause & ~BIT6);
- return (temp >> 16) & 0xff;
-}
-
-/* special function for running out of flash. doesn't modify any
- * global variables [josh] */
-int mpsc_putchar_early (char ch)
-{
- DECLARE_GLOBAL_DATA_PTR;
- int mpsc = CHANNEL;
- int temp =
- GTREGREAD (GALMPSC_CHANNELREG_2 + (mpsc * GALMPSC_REG_GAP));
- galmpsc_set_tcschar (mpsc, ch);
- GT_REG_WRITE (GALMPSC_CHANNELREG_2 + (mpsc * GALMPSC_REG_GAP),
- temp | 0x200);
-
-#define MAGIC_FACTOR (10*1000000)
-
- udelay (MAGIC_FACTOR / gd->baudrate);
- return 0;
-}
-
-/* This is used after relocation, see serial.c and mpsc_init2 */
-static int mpsc_putchar_sdma (char ch)
-{
- volatile unsigned int *p;
- unsigned int temp;
-
-
- /* align the descriptor */
- p = tx_desc_base;
- memset ((void *) p, 0, 8 * sizeof (unsigned int));
-
- /* fill one 64 bit buffer */
- /* word swap, pad with 0 */
- p[4] = 0; /* x */
- p[5] = (unsigned int) ch; /* x */
-
- /* CHANGED completely according to GT64260A dox - NTL */
- p[0] = 0x00010001; /* 0 */
- p[1] = DESC_OWNER_BIT | DESC_FIRST | DESC_LAST; /* 4 */
- p[2] = 0; /* 8 */
- p[3] = (unsigned int) &p[4]; /* c */
-
-#if 0
- p[9] = DESC_FIRST | DESC_LAST;
- p[10] = (unsigned int) &p[0];
- p[11] = (unsigned int) &p[12];
-#endif
-
- FLUSH_DCACHE (&p[0], &p[8]);
-
- GT_REG_WRITE (GALSDMA_0_CUR_TX_PTR + (CHANNEL * GALSDMA_REG_DIFF),
- (unsigned int) &p[0]);
- GT_REG_WRITE (GALSDMA_0_FIR_TX_PTR + (CHANNEL * GALSDMA_REG_DIFF),
- (unsigned int) &p[0]);
-
- temp = GTREGREAD (GALSDMA_0_COM_REG + (CHANNEL * GALSDMA_REG_DIFF));
- temp |= (TX_DEMAND | TX_STOP);
- GT_REG_WRITE (GALSDMA_0_COM_REG + (CHANNEL * GALSDMA_REG_DIFF), temp);
-
- INVALIDATE_DCACHE (&p[1], &p[2]);
-
- while (p[1] & DESC_OWNER_BIT) {
- udelay (100);
- INVALIDATE_DCACHE (&p[1], &p[2]);
- }
- return 0;
-}
-
-char mpsc_getchar_sdma (void)
-{
- static unsigned int done = 0;
- volatile char ch;
- unsigned int len = 0, idx = 0, temp;
-
- volatile unsigned int *p;
-
-
- do {
- p = &rx_desc_base[rx_desc_index * 8];
-
- INVALIDATE_DCACHE (&p[0], &p[1]);
- /* Wait for character */
- while (p[1] & DESC_OWNER_BIT) {
- udelay (100);
- INVALIDATE_DCACHE (&p[0], &p[1]);
- }
-
- /* Handle error case */
- if (p[1] & (1 << 15)) {
- printf ("oops, error: %08x\n", p[1]);
-
- temp = GTREGREAD (GALMPSC_CHANNELREG_2 +
- (CHANNEL * GALMPSC_REG_GAP));
- temp |= (1 << 23);
- GT_REG_WRITE (GALMPSC_CHANNELREG_2 +
- (CHANNEL * GALMPSC_REG_GAP), temp);
-
- /* Can't poll on abort bit, so we just wait. */
- udelay (100);
-
- galsdma_enable_rx ();
- }
-
- /* Number of bytes left in this descriptor */
- len = p[0] & 0xffff;
-
- if (len) {
- /* Where to look */
- idx = 5;
- if (done > 3)
- idx = 4;
- if (done > 7)
- idx = 7;
- if (done > 11)
- idx = 6;
-
- INVALIDATE_DCACHE (&p[idx], &p[idx + 1]);
- ch = p[idx] & 0xff;
- done++;
- }
-
- if (done < len) {
- /* this descriptor has more bytes still
- * shift down the char we just read, and leave the
- * buffer in place for the next time around
- */
- p[idx] = p[idx] >> 8;
- FLUSH_DCACHE (&p[idx], &p[idx + 1]);
- }
-
- if (done == len) {
- /* nothing left in this descriptor.
- * go to next one
- */
- p[1] = DESC_OWNER_BIT | DESC_FIRST | DESC_LAST;
- p[0] = 0x00100000;
- FLUSH_DCACHE (&p[0], &p[1]);
- /* Next descriptor */
- rx_desc_index = (rx_desc_index + 1) % RX_DESC;
- done = 0;
- }
- } while (len == 0); /* galileo bug.. len might be zero */
-
- return ch;
-}
-
-
-int mpsc_test_char_debug (void)
-{
- if ((GTREGREAD (GALMPSC_0_INT_CAUSE) & BIT6) == 0)
- return 0;
- else {
- return 1;
- }
-}
-
-
-int mpsc_test_char_sdma (void)
-{
- volatile unsigned int *p = &rx_desc_base[rx_desc_index * 8];
-
- INVALIDATE_DCACHE (&p[1], &p[2]);
-
- if (p[1] & DESC_OWNER_BIT)
- return 0;
- else
- return 1;
-}
-
-int mpsc_init (int baud)
-{
- /* BRG CONFIG */
- galbrg_set_baudrate (CHANNEL, baud);
- galbrg_set_clksrc (CHANNEL, 8); /* set source=Tclk */
- galbrg_set_CUV (CHANNEL, 0); /* set up CountUpValue */
- galbrg_enable (CHANNEL); /* Enable BRG */
-
- /* Set up clock routing */
- galmpsc_connect (CHANNEL, GALMPSC_CONNECT); /* connect it */
-
- galmpsc_route_rx_clock (CHANNEL, CHANNEL); /* chosse BRG0 for Rx */
- galmpsc_route_tx_clock (CHANNEL, CHANNEL); /* chose BRG0 for Tx */
-
- /* reset MPSC state */
- galmpsc_shutdown (CHANNEL);
-
- /* SDMA CONFIG */
- galsdma_set_burstsize (CHANNEL, L1_CACHE_BYTES / 8); /* in 64 bit words (8 bytes) */
- galsdma_set_txle (CHANNEL);
- galsdma_set_rxle (CHANNEL);
- galsdma_set_RC (CHANNEL, 0xf);
- galsdma_set_SFM (CHANNEL);
- galsdma_set_RFT (CHANNEL);
-
- /* MPSC CONFIG */
- galmpsc_write_config_regs (CHANNEL, GALMPSC_UART);
- galmpsc_config_channel_regs (CHANNEL);
- galmpsc_set_char_length (CHANNEL, GALMPSC_CHAR_LENGTH_8); /* 8 */
- galmpsc_set_parity (CHANNEL, GALMPSC_PARITY_NONE); /* N */
- galmpsc_set_stop_bit_length (CHANNEL, GALMPSC_STOP_BITS_1); /* 1 */
-
-#ifdef CONFIG_MPSC_DEBUG_PORT
- mpsc_debug_init ();
-#endif
-
- /* COMM_MPSC CONFIG */
-#ifdef SOFTWARE_CACHE_MANAGEMENT
- galmpsc_set_snoop (CHANNEL, 0); /* disable snoop */
-#else
- galmpsc_set_snoop (CHANNEL, 1); /* enable snoop */
-#endif
-
- return 0;
-}
-
-
-void mpsc_sdma_init (void)
-{
-/* Setup SDMA channel0 SDMA_CONFIG_REG*/
- GT_REG_WRITE (SDMA_CONFIG_REG (0), 0x000020ff);
-
-/* Enable MPSC-Window0 for DRAM Bank0 */
- if (galsdma_set_mem_space (MV64460_CUNIT_BASE_ADDR_WIN_0_BIT,
- MV64460_SDMA_DRAM_CS_0_TARGET,
- 0,
- memoryGetBankBaseAddress
- (CS_0_LOW_DECODE_ADDRESS),
- memoryGetBankSize (BANK0)) != true)
- printf ("%s: SDMA_Window0 memory setup failed !!! \n",
- __FUNCTION__);
-
-
-/* Disable MPSC-Window1 */
- if (galsdma_set_mem_space (MV64460_CUNIT_BASE_ADDR_WIN_1_BIT,
- MV64460_SDMA_DRAM_CS_0_TARGET,
- 0,
- memoryGetBankBaseAddress
- (CS_1_LOW_DECODE_ADDRESS),
- memoryGetBankSize (BANK3)) != true)
- printf ("%s: SDMA_Window1 memory setup failed !!! \n",
- __FUNCTION__);
-
-
-/* Disable MPSC-Window2 */
- if (galsdma_set_mem_space (MV64460_CUNIT_BASE_ADDR_WIN_2_BIT,
- MV64460_SDMA_DRAM_CS_0_TARGET,
- 0,
- memoryGetBankBaseAddress
- (CS_2_LOW_DECODE_ADDRESS),
- memoryGetBankSize (BANK3)) != true)
- printf ("%s: SDMA_Window2 memory setup failed !!! \n",
- __FUNCTION__);
-
-
-/* Disable MPSC-Window3 */
- if (galsdma_set_mem_space (MV64460_CUNIT_BASE_ADDR_WIN_3_BIT,
- MV64460_SDMA_DRAM_CS_0_TARGET,
- 0,
- memoryGetBankBaseAddress
- (CS_3_LOW_DECODE_ADDRESS),
- memoryGetBankSize (BANK3)) != true)
- printf ("%s: SDMA_Window3 memory setup failed !!! \n",
- __FUNCTION__);
-
-/* Setup MPSC0 access mode Window0 full access */
- GT_SET_REG_BITS (MPSC0_ACCESS_PROTECTION_REG,
- (MV64460_SDMA_WIN_ACCESS_FULL <<
- (MV64460_CUNIT_BASE_ADDR_WIN_0_BIT * 2)));
-
-/* Setup MPSC1 access mode Window1 full access */
- GT_SET_REG_BITS (MPSC1_ACCESS_PROTECTION_REG,
- (MV64460_SDMA_WIN_ACCESS_FULL <<
- (MV64460_CUNIT_BASE_ADDR_WIN_0_BIT * 2)));
-
-/* Setup MPSC internal address space base address */
- GT_REG_WRITE (CUNIT_INTERNAL_SPACE_BASE_ADDR_REG, CFG_GT_REGS);
-
-/* no high address remap*/
- GT_REG_WRITE (CUNIT_HIGH_ADDR_REMAP_REG0, 0x00);
- GT_REG_WRITE (CUNIT_HIGH_ADDR_REMAP_REG1, 0x00);
-
-/* clear interrupt cause register for MPSC (fault register)*/
- GT_REG_WRITE (CUNIT_INTERRUPT_CAUSE_REG, 0x00);
-}
-
-
-void mpsc_init2 (void)
-{
- int i;
-
-#ifndef CONFIG_MPSC_DEBUG_PORT
- mpsc_putchar = mpsc_putchar_sdma;
- mpsc_getchar = mpsc_getchar_sdma;
- mpsc_test_char = mpsc_test_char_sdma;
-#endif
- /* RX descriptors */
- rx_desc_base = (unsigned int *) malloc (((RX_DESC + 1) * 8) *
- sizeof (unsigned int));
-
- /* align descriptors */
- rx_desc_base = (unsigned int *)
- (((unsigned int) rx_desc_base + 32) & 0xFFFFFFF0);
-
- rx_desc_index = 0;
-
- memset ((void *) rx_desc_base, 0,
- (RX_DESC * 8) * sizeof (unsigned int));
-
- for (i = 0; i < RX_DESC; i++) {
- rx_desc_base[i * 8 + 3] = (unsigned int) &rx_desc_base[i * 8 + 4]; /* Buffer */
- rx_desc_base[i * 8 + 2] = (unsigned int) &rx_desc_base[(i + 1) * 8]; /* Next descriptor */
- rx_desc_base[i * 8 + 1] = DESC_OWNER_BIT | DESC_FIRST | DESC_LAST; /* Command & control */
- rx_desc_base[i * 8] = 0x00100000;
- }
- rx_desc_base[(i - 1) * 8 + 2] = (unsigned int) &rx_desc_base[0];
-
- FLUSH_DCACHE (&rx_desc_base[0], &rx_desc_base[RX_DESC * 8]);
- GT_REG_WRITE (GALSDMA_0_CUR_RX_PTR + (CHANNEL * GALSDMA_REG_DIFF),
- (unsigned int) &rx_desc_base[0]);
-
- /* TX descriptors */
- tx_desc_base = (unsigned int *) malloc (((TX_DESC + 1) * 8) *
- sizeof (unsigned int));
-
- /* align descriptors */
- tx_desc_base = (unsigned int *)
- (((unsigned int) tx_desc_base + 32) & 0xFFFFFFF0);
-
- tx_desc_index = -1;
-
- memset ((void *) tx_desc_base, 0,
- (TX_DESC * 8) * sizeof (unsigned int));
-
- for (i = 0; i < TX_DESC; i++) {
- tx_desc_base[i * 8 + 5] = (unsigned int) 0x23232323;
- tx_desc_base[i * 8 + 4] = (unsigned int) 0x23232323;
- tx_desc_base[i * 8 + 3] =
- (unsigned int) &tx_desc_base[i * 8 + 4];
- tx_desc_base[i * 8 + 2] =
- (unsigned int) &tx_desc_base[(i + 1) * 8];
- tx_desc_base[i * 8 + 1] =
- DESC_OWNER_BIT | DESC_FIRST | DESC_LAST;
-
- /* set sbytecnt and shadow byte cnt to 1 */
- tx_desc_base[i * 8] = 0x00010001;
- }
- tx_desc_base[(i - 1) * 8 + 2] = (unsigned int) &tx_desc_base[0];
-
- FLUSH_DCACHE (&tx_desc_base[0], &tx_desc_base[TX_DESC * 8]);
-
- udelay (100);
-
- galsdma_enable_rx ();
-
- return;
-}
-
-int galbrg_set_baudrate (int channel, int rate)
-{
- DECLARE_GLOBAL_DATA_PTR;
- int clock;
-
- galbrg_disable (channel); /*ok */
-
-#ifdef ZUMA_NTL
- /* from tclk */
- clock = (CFG_TCLK / (16 * rate)) - 1;
-#else
- clock = (CFG_TCLK / (16 * rate)) - 1;
-#endif
-
- galbrg_set_CDV (channel, clock); /* set timer Reg. for BRG */
-
- galbrg_enable (channel);
-
- gd->baudrate = rate;
-
- return 0;
-}
-
-/* ------------------------------------------------------------------ */
-
-/* Below are all the private functions that no one else needs */
-
-static int galbrg_set_CDV (int channel, int value)
-{
- unsigned int temp;
-
- temp = GTREGREAD (GALBRG_0_CONFREG + (channel * GALBRG_REG_GAP));
- temp &= 0xFFFF0000;
- temp |= (value & 0x0000FFFF);
- GT_REG_WRITE (GALBRG_0_CONFREG + (channel * GALBRG_REG_GAP), temp);
-
- return 0;
-}
-
-static int galbrg_enable (int channel)
-{
- unsigned int temp;
-
- temp = GTREGREAD (GALBRG_0_CONFREG + (channel * GALBRG_REG_GAP));
- temp |= 0x00010000;
- GT_REG_WRITE (GALBRG_0_CONFREG + (channel * GALBRG_REG_GAP), temp);
-
- return 0;
-}
-
-static int galbrg_disable (int channel)
-{
- unsigned int temp;
-
- temp = GTREGREAD (GALBRG_0_CONFREG + (channel * GALBRG_REG_GAP));
- temp &= 0xFFFEFFFF;
- GT_REG_WRITE (GALBRG_0_CONFREG + (channel * GALBRG_REG_GAP), temp);
-
- return 0;
-}
-
-static int galbrg_set_clksrc (int channel, int value)
-{
- unsigned int temp;
-
- temp = GTREGREAD (GALBRG_0_CONFREG + (channel * GALBRG_REG_GAP));
- temp &= 0xFFC3FFFF; /* Bit 18 - 21 (MV 64260 18-22) */
- temp |= (value << 18);
- GT_REG_WRITE (GALBRG_0_CONFREG + (channel * GALBRG_REG_GAP), temp);
- return 0;
-}
-
-static int galbrg_set_CUV (int channel, int value)
-{
- /* set CountUpValue */
- GT_REG_WRITE (GALBRG_0_BTREG + (channel * GALBRG_REG_GAP), value);
-
- return 0;
-}
-
-#if 0
-static int galbrg_reset (int channel)
-{
- unsigned int temp;
-
- temp = GTREGREAD (GALBRG_0_CONFREG + (channel * GALBRG_REG_GAP));
- temp |= 0x20000;
- GT_REG_WRITE (GALBRG_0_CONFREG + (channel * GALBRG_REG_GAP), temp);
-
- return 0;
-}
-#endif
-
-static int galsdma_set_RFT (int channel)
-{
- unsigned int temp;
-
- temp = GTREGREAD (GALSDMA_0_CONF_REG + (channel * GALSDMA_REG_DIFF));
- temp |= 0x00000001;
- GT_REG_WRITE (GALSDMA_0_CONF_REG + (channel * GALSDMA_REG_DIFF),
- temp);
-
- return 0;
-}
-
-static int galsdma_set_SFM (int channel)
-{
- unsigned int temp;
-
- temp = GTREGREAD (GALSDMA_0_CONF_REG + (channel * GALSDMA_REG_DIFF));
- temp |= 0x00000002;
- GT_REG_WRITE (GALSDMA_0_CONF_REG + (channel * GALSDMA_REG_DIFF),
- temp);
-
- return 0;
-}
-
-static int galsdma_set_rxle (int channel)
-{
- unsigned int temp;
-
- temp = GTREGREAD (GALSDMA_0_CONF_REG + (channel * GALSDMA_REG_DIFF));
- temp |= 0x00000040;
- GT_REG_WRITE (GALSDMA_0_CONF_REG + (channel * GALSDMA_REG_DIFF),
- temp);
-
- return 0;
-}
-
-static int galsdma_set_txle (int channel)
-{
- unsigned int temp;
-
- temp = GTREGREAD (GALSDMA_0_CONF_REG + (channel * GALSDMA_REG_DIFF));
- temp |= 0x00000080;
- GT_REG_WRITE (GALSDMA_0_CONF_REG + (channel * GALSDMA_REG_DIFF),
- temp);
-
- return 0;
-}
-
-static int galsdma_set_RC (int channel, unsigned int value)
-{
- unsigned int temp;
-
- temp = GTREGREAD (GALSDMA_0_CONF_REG + (channel * GALSDMA_REG_DIFF));
- temp &= ~0x0000003c;
- temp |= (value << 2);
- GT_REG_WRITE (GALSDMA_0_CONF_REG + (channel * GALSDMA_REG_DIFF),
- temp);
-
- return 0;
-}
-
-static int galsdma_set_burstsize (int channel, unsigned int value)
-{
- unsigned int temp;
-
- temp = GTREGREAD (GALSDMA_0_CONF_REG + (channel * GALSDMA_REG_DIFF));
- temp &= 0xFFFFCFFF;
- switch (value) {
- case 8:
- GT_REG_WRITE (GALSDMA_0_CONF_REG +
- (channel * GALSDMA_REG_DIFF),
- (temp | (0x3 << 12)));
- break;
-
- case 4:
- GT_REG_WRITE (GALSDMA_0_CONF_REG +
- (channel * GALSDMA_REG_DIFF),
- (temp | (0x2 << 12)));
- break;
-
- case 2:
- GT_REG_WRITE (GALSDMA_0_CONF_REG +
- (channel * GALSDMA_REG_DIFF),
- (temp | (0x1 << 12)));
- break;
-
- case 1:
- GT_REG_WRITE (GALSDMA_0_CONF_REG +
- (channel * GALSDMA_REG_DIFF),
- (temp | (0x0 << 12)));
- break;
-
- default:
- return -1;
- break;
- }
-
- return 0;
-}
-
-static int galmpsc_connect (int channel, int connect)
-{
- unsigned int temp;
-
- temp = GTREGREAD (GALMPSC_ROUTING_REGISTER);
-
- if ((channel == 0) && connect)
- temp &= ~0x00000007;
- else if ((channel == 1) && connect)
- temp &= ~(0x00000007 << 6);
- else if ((channel == 0) && !connect)
- temp |= 0x00000007;
- else
- temp |= (0x00000007 << 6);
-
- /* Just in case... */
- temp &= 0x3fffffff;
-
- GT_REG_WRITE (GALMPSC_ROUTING_REGISTER, temp);
-
- return 0;
-}
-
-static int galmpsc_route_rx_clock (int channel, int brg)
-{
- unsigned int temp;
-
- temp = GTREGREAD (GALMPSC_RxC_ROUTE);
-
- if (channel == 0) {
- temp &= ~0x0000000F;
- temp |= brg;
- } else {
- temp &= ~0x00000F00;
- temp |= (brg << 8);
- }
-
- GT_REG_WRITE (GALMPSC_RxC_ROUTE, temp);
-
- return 0;
-}
-
-static int galmpsc_route_tx_clock (int channel, int brg)
-{
- unsigned int temp;
-
- temp = GTREGREAD (GALMPSC_TxC_ROUTE);
-
- if (channel == 0) {
- temp &= ~0x0000000F;
- temp |= brg;
- } else {
- temp &= ~0x00000F00;
- temp |= (brg << 8);
- }
-
- GT_REG_WRITE (GALMPSC_TxC_ROUTE, temp);
-
- return 0;
-}
-
-static int galmpsc_write_config_regs (int mpsc, int mode)
-{
- if (mode == GALMPSC_UART) {
- /* Main config reg Low (Null modem, Enable Tx/Rx, UART mode) */
- GT_REG_WRITE (GALMPSC_MCONF_LOW + (mpsc * GALMPSC_REG_GAP),
- 0x000004c4);
-
- /* Main config reg High (32x Rx/Tx clock mode, width=8bits */
- GT_REG_WRITE (GALMPSC_MCONF_HIGH + (mpsc * GALMPSC_REG_GAP),
- 0x024003f8);
- /* 22 2222 1111 */
- /* 54 3210 9876 */
- /* 0000 0010 0000 0000 */
- /* 1 */
- /* 098 7654 3210 */
- /* 0000 0011 1111 1000 */
- } else
- return -1;
-
- return 0;
-}
-
-static int galmpsc_config_channel_regs (int mpsc)
-{
- GT_REG_WRITE (GALMPSC_CHANNELREG_1 + (mpsc * GALMPSC_REG_GAP), 0);
- GT_REG_WRITE (GALMPSC_CHANNELREG_2 + (mpsc * GALMPSC_REG_GAP), 0);
- GT_REG_WRITE (GALMPSC_CHANNELREG_3 + (mpsc * GALMPSC_REG_GAP), 1);
- GT_REG_WRITE (GALMPSC_CHANNELREG_4 + (mpsc * GALMPSC_REG_GAP), 0);
- GT_REG_WRITE (GALMPSC_CHANNELREG_5 + (mpsc * GALMPSC_REG_GAP), 0);
- GT_REG_WRITE (GALMPSC_CHANNELREG_6 + (mpsc * GALMPSC_REG_GAP), 0);
- GT_REG_WRITE (GALMPSC_CHANNELREG_7 + (mpsc * GALMPSC_REG_GAP), 0);
- GT_REG_WRITE (GALMPSC_CHANNELREG_8 + (mpsc * GALMPSC_REG_GAP), 0);
- GT_REG_WRITE (GALMPSC_CHANNELREG_9 + (mpsc * GALMPSC_REG_GAP), 0);
- GT_REG_WRITE (GALMPSC_CHANNELREG_10 + (mpsc * GALMPSC_REG_GAP), 0);
-
- galmpsc_set_brkcnt (mpsc, 0x3);
- galmpsc_set_tcschar (mpsc, 0xab);
-
- return 0;
-}
-
-static int galmpsc_set_brkcnt (int mpsc, int value)
-{
- unsigned int temp;
-
- temp = GTREGREAD (GALMPSC_CHANNELREG_1 + (mpsc * GALMPSC_REG_GAP));
- temp &= 0x0000FFFF;
- temp |= (value << 16);
- GT_REG_WRITE (GALMPSC_CHANNELREG_1 + (mpsc * GALMPSC_REG_GAP), temp);
-
- return 0;
-}
-
-static int galmpsc_set_tcschar (int mpsc, int value)
-{
- unsigned int temp;
-
- temp = GTREGREAD (GALMPSC_CHANNELREG_1 + (mpsc * GALMPSC_REG_GAP));
- temp &= 0xFFFF0000;
- temp |= value;
- GT_REG_WRITE (GALMPSC_CHANNELREG_1 + (mpsc * GALMPSC_REG_GAP), temp);
-
- return 0;
-}
-
-static int galmpsc_set_char_length (int mpsc, int value)
-{
- unsigned int temp;
-
- temp = GTREGREAD (GALMPSC_PROTOCONF_REG + (mpsc * GALMPSC_REG_GAP));
- temp &= 0xFFFFCFFF;
- temp |= (value << 12);
- GT_REG_WRITE (GALMPSC_PROTOCONF_REG + (mpsc * GALMPSC_REG_GAP), temp);
-
- return 0;
-}
-
-static int galmpsc_set_stop_bit_length (int mpsc, int value)
-{
- unsigned int temp;
-
- temp = GTREGREAD (GALMPSC_PROTOCONF_REG + (mpsc * GALMPSC_REG_GAP));
- temp &= 0xFFFFBFFF;
- temp |= (value << 14);
- GT_REG_WRITE (GALMPSC_PROTOCONF_REG + (mpsc * GALMPSC_REG_GAP), temp);
-
- return 0;
-}
-
-static int galmpsc_set_parity (int mpsc, int value)
-{
- unsigned int temp;
-
- temp = GTREGREAD (GALMPSC_CHANNELREG_2 + (mpsc * GALMPSC_REG_GAP));
- if (value != -1) {
- temp &= 0xFFF3FFF3;
- temp |= ((value << 18) | (value << 2));
- temp |= ((value << 17) | (value << 1));
- } else {
- temp &= 0xFFF1FFF1;
- }
-
- GT_REG_WRITE (GALMPSC_CHANNELREG_2 + (mpsc * GALMPSC_REG_GAP), temp);
-
- return 0;
-}
-
-static int galmpsc_enter_hunt (int mpsc)
-{
- int temp;
-
- temp = GTREGREAD (GALMPSC_CHANNELREG_2 + (mpsc * GALMPSC_REG_GAP));
- temp |= 0x80000000;
- GT_REG_WRITE (GALMPSC_CHANNELREG_2 + (mpsc * GALMPSC_REG_GAP), temp);
-
- while (GTREGREAD (GALMPSC_CHANNELREG_2 + (mpsc * GALMPSC_REG_GAP)) &
- MPSC_ENTER_HUNT) {
- udelay (1);
- }
- return 0;
-}
-
-
-static int galmpsc_shutdown (int mpsc)
-{
- unsigned int temp;
-
- /* cause RX abort (clears RX) */
- temp = GTREGREAD (GALMPSC_CHANNELREG_2 + (mpsc * GALMPSC_REG_GAP));
- temp |= MPSC_RX_ABORT | MPSC_TX_ABORT;
- temp &= ~MPSC_ENTER_HUNT;
- GT_REG_WRITE (GALMPSC_CHANNELREG_2 + (mpsc * GALMPSC_REG_GAP), temp);
-
- GT_REG_WRITE (GALSDMA_0_COM_REG, 0);
- GT_REG_WRITE (GALSDMA_0_COM_REG, SDMA_TX_ABORT | SDMA_RX_ABORT);
-
- /* shut down the MPSC */
- GT_REG_WRITE (GALMPSC_MCONF_LOW, 0);
- GT_REG_WRITE (GALMPSC_MCONF_HIGH, 0);
- GT_REG_WRITE (GALMPSC_PROTOCONF_REG + (mpsc * GALMPSC_REG_GAP), 0);
-
- udelay (100);
-
- /* shut down the sdma engines. */
- /* reset config to default */
- GT_REG_WRITE (GALSDMA_0_CONF_REG, 0x000000fc);
-
- udelay (100);
-
- /* clear the SDMA current and first TX and RX pointers */
- GT_REG_WRITE (GALSDMA_0_CUR_RX_PTR, 0);
- GT_REG_WRITE (GALSDMA_0_CUR_TX_PTR, 0);
- GT_REG_WRITE (GALSDMA_0_FIR_TX_PTR, 0);
-
- udelay (100);
-
- return 0;
-}
-
-static void galsdma_enable_rx (void)
-{
- int temp;
-
- /* Enable RX processing */
- temp = GTREGREAD (GALSDMA_0_COM_REG + (CHANNEL * GALSDMA_REG_DIFF));
- temp |= RX_ENABLE;
- GT_REG_WRITE (GALSDMA_0_COM_REG + (CHANNEL * GALSDMA_REG_DIFF), temp);
-
- galmpsc_enter_hunt (CHANNEL);
-}
-
-static int galmpsc_set_snoop (int mpsc, int value)
-{
- int reg =
- mpsc ? MPSC_1_ADDRESS_CONTROL_LOW :
- MPSC_0_ADDRESS_CONTROL_LOW;
- int temp = GTREGREAD (reg);
-
- if (value)
- temp |= (1 << 6) | (1 << 14) | (1 << 22) | (1 << 30);
- else
- temp &= ~((1 << 6) | (1 << 14) | (1 << 22) | (1 << 30));
- GT_REG_WRITE (reg, temp);
- return 0;
-}
-
-/*******************************************************************************
-* galsdma_set_mem_space - Set MV64460 IDMA memory decoding map.
-*
-* DESCRIPTION:
-* the MV64460 SDMA has its own address decoding map that is de-coupled
-* from the CPU interface address decoding windows. The SDMA channels
-* share four address windows. Each region can be individually configured
-* by this function by associating it to a target interface and setting
-* base and size values.
-*
-* NOTE!!!
-* The size must be in 64Kbyte granularity.
-* The base address must be aligned to the size.
-* The size must be a series of 1s followed by a series of zeros
-*
-* OUTPUT:
-* None.
-*
-* RETURN:
-* True for success, false otherwise.
-*
-*******************************************************************************/
-
-static int galsdma_set_mem_space (unsigned int memSpace,
- unsigned int memSpaceTarget,
- unsigned int memSpaceAttr,
- unsigned int baseAddress, unsigned int size)
-{
- unsigned int temp;
-
- if (size == 0) {
- GT_RESET_REG_BITS (MV64460_CUNIT_BASE_ADDR_ENABLE_REG,
- 1 << memSpace);
- return true;
- }
-
- /* The base address must be aligned to the size. */
- if (baseAddress % size != 0) {
- return false;
- }
- if (size < 0x10000) {
- return false;
- }
-
- /* Align size and base to 64K */
- baseAddress &= 0xffff0000;
- size &= 0xffff0000;
- temp = size >> 16;
-
- /* Checking that the size is a sequence of '1' followed by a
- sequence of '0' starting from LSB to MSB. */
- while ((temp > 0) && (temp & 0x1)) {
- temp = temp >> 1;
- }
-
- if (temp != 0) {
- GT_REG_WRITE (MV64460_CUNIT_BASE_ADDR_REG0 + memSpace * 8,
- (baseAddress | memSpaceTarget | memSpaceAttr));
- GT_REG_WRITE ((MV64460_CUNIT_SIZE0 + memSpace * 8),
- (size - 1) & 0xffff0000);
- GT_RESET_REG_BITS (MV64460_CUNIT_BASE_ADDR_ENABLE_REG,
- 1 << memSpace);
- } else {
- /* An invalid size was specified */
- return false;
- }
- return true;
-}
diff --git a/board/Marvell/db64460/mpsc.h b/board/Marvell/db64460/mpsc.h
deleted file mode 100644
index 3cc0c0f7a5..0000000000
--- a/board/Marvell/db64460/mpsc.h
+++ /dev/null
@@ -1,156 +0,0 @@
-/*
- * (C) Copyright 2001
- * John Clemens <clemens@mclx.com>, Mission Critical Linux, Inc.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*************************************************************************
- * changes for Marvell DB64460 eval board 2003 by Ingo Assmus <ingo.assmus@keymile.com>
- *
- ************************************************************************/
-
-
-/*
- * mpsc.h - header file for MPSC in uart mode (console driver)
- */
-
-#ifndef __MPSC_H__
-#define __MPSC_H__
-
-/* include actual Galileo defines */
-#include "../include/mv_gen_reg.h"
-
-/* driver related defines */
-
-int mpsc_init(int baud);
-void mpsc_sdma_init(void);
-void mpsc_init2(void);
-int galbrg_set_baudrate(int channel, int rate);
-
-int mpsc_putchar_early(char ch);
-char mpsc_getchar_debug(void);
-int mpsc_test_char_debug(void);
-
-int mpsc_test_char_sdma(void);
-
-extern int (*mpsc_putchar)(char ch);
-extern char (*mpsc_getchar)(void);
-extern int (*mpsc_test_char)(void);
-
-#define CHANNEL CONFIG_MPSC_PORT
-
-#define TX_DESC 5
-#define RX_DESC 20
-
-#define DESC_FIRST 0x00010000
-#define DESC_LAST 0x00020000
-#define DESC_OWNER_BIT 0x80000000
-
-#define TX_DEMAND 0x00800000
-#define TX_STOP 0x00010000
-#define RX_ENABLE 0x00000080
-
-#define SDMA_RX_ABORT (1 << 15)
-#define SDMA_TX_ABORT (1 << 31)
-#define MPSC_TX_ABORT (1 << 7)
-#define MPSC_RX_ABORT (1 << 23)
-#define MPSC_ENTER_HUNT (1 << 31)
-
-/* MPSC defines */
-
-#define GALMPSC_CONNECT 0x1
-#define GALMPSC_DISCONNECT 0x0
-
-#define GALMPSC_UART 0x1
-
-#define GALMPSC_STOP_BITS_1 0x0
-#define GALMPSC_STOP_BITS_2 0x1
-#define GALMPSC_CHAR_LENGTH_8 0x3
-#define GALMPSC_CHAR_LENGTH_7 0x2
-
-#define GALMPSC_PARITY_ODD 0x0
-#define GALMPSC_PARITY_EVEN 0x2
-#define GALMPSC_PARITY_MARK 0x3
-#define GALMPSC_PARITY_SPACE 0x1
-#define GALMPSC_PARITY_NONE -1
-
-#define GALMPSC_SERIAL_MULTIPLEX SERIAL_PORT_MULTIPLEX /* 0xf010 */
-#define GALMPSC_ROUTING_REGISTER MAIN_ROUTING_REGISTER /* 0xb400 */
-#define GALMPSC_RxC_ROUTE RECEIVE_CLOCK_ROUTING_REGISTER /* 0xb404 */
-#define GALMPSC_TxC_ROUTE TRANSMIT_CLOCK_ROUTING_REGISTER /* 0xb408 */
-#define GALMPSC_MCONF_LOW MPSC0_MAIN_CONFIGURATION_LOW /* 0x8000 */
-#define GALMPSC_MCONF_HIGH MPSC0_MAIN_CONFIGURATION_HIGH /* 0x8004 */
-#define GALMPSC_PROTOCONF_REG MPSC0_PROTOCOL_CONFIGURATION /* 0x8008 */
-
-#define GALMPSC_REG_GAP 0x1000
-
-#define GALMPSC_MCONF_CHREG_BASE CHANNEL0_REGISTER1 /* 0x800c */
-#define GALMPSC_CHANNELREG_1 CHANNEL0_REGISTER1 /* 0x800c */
-#define GALMPSC_CHANNELREG_2 CHANNEL0_REGISTER2 /* 0x8010 */
-#define GALMPSC_CHANNELREG_3 CHANNEL0_REGISTER3 /* 0x8014 */
-#define GALMPSC_CHANNELREG_4 CHANNEL0_REGISTER4 /* 0x8018 */
-#define GALMPSC_CHANNELREG_5 CHANNEL0_REGISTER5 /* 0x801c */
-#define GALMPSC_CHANNELREG_6 CHANNEL0_REGISTER6 /* 0x8020 */
-#define GALMPSC_CHANNELREG_7 CHANNEL0_REGISTER7 /* 0x8024 */
-#define GALMPSC_CHANNELREG_8 CHANNEL0_REGISTER8 /* 0x8028 */
-#define GALMPSC_CHANNELREG_9 CHANNEL0_REGISTER9 /* 0x802c */
-#define GALMPSC_CHANNELREG_10 CHANNEL0_REGISTER10 /* 0x8030 */
-#define GALMPSC_CHANNELREG_11 CHANNEL0_REGISTER11 /* 0x8034 */
-
-#define GALSDMA_COMMAND_FIRST (1 << 16)
-#define GALSDMA_COMMAND_LAST (1 << 17)
-#define GALSDMA_COMMAND_ENABLEINT (1 << 23)
-#define GALSDMA_COMMAND_AUTO (1 << 30)
-#define GALSDMA_COMMAND_OWNER (1 << 31)
-
-#define GALSDMA_RX 0
-#define GALSDMA_TX 1
-
-/* CHANNEL2 should be CHANNEL1, according to documentation,
- * but to work with the current GTREGS file...
- */
-#define GALSDMA_0_CONF_REG CHANNEL0_CONFIGURATION_REGISTER /* 0x4000 */
-#define GALSDMA_1_CONF_REG CHANNEL2_CONFIGURATION_REGISTER /* 0x6000 */
-#define GALSDMA_0_COM_REG CHANNEL0_COMMAND_REGISTER /* 0x4008 */
-#define GALSDMA_1_COM_REG CHANNEL2_COMMAND_REGISTER /* 0x6008 */
-#define GALSDMA_0_CUR_RX_PTR CHANNEL0_CURRENT_RX_DESCRIPTOR_POINTER /* 0x4810 */
-#define GALSDMA_0_CUR_TX_PTR CHANNEL0_CURRENT_TX_DESCRIPTOR_POINTER /* 0x4c10 */
-#define GALSDMA_0_FIR_TX_PTR CHANNEL0_FIRST_TX_DESCRIPTOR_POINTER /* 0x4c14 */
-#define GALSDMA_1_CUR_RX_PTR CHANNEL2_CURRENT_RX_DESCRIPTOR_POINTER /* 0x6810 */
-#define GALSDMA_1_CUR_TX_PTR CHANNEL2_CURRENT_TX_DESCRIPTOR_POINTER /* 0x6c10 */
-#define GALSDMA_1_FIR_TX_PTR CHANNEL2_FIRST_TX_DESCRIPTOR_POINTER /* 0x6c14 */
-#define GALSDMA_REG_DIFF 0x2000
-
-/* WRONG in gt64260R.h */
-#define GALSDMA_INT_CAUSE 0xb800 /* SDMA_CAUSE */
-#define GALSDMA_INT_MASK 0xb880 /* SDMA_MASK */
-#define GALMPSC_0_INT_CAUSE 0xb804
-#define GALMPSC_0_INT_MASK 0xb884
-
-#define GALSDMA_MODE_UART 0
-#define GALSDMA_MODE_BISYNC 1
-#define GALSDMA_MODE_HDLC 2
-#define GALSDMA_MODE_TRANSPARENT 3
-
-#define GALBRG_0_CONFREG BRG0_CONFIGURATION_REGISTER /* 0xb200 */
-#define GALBRG_REG_GAP 0x0008
-#define GALBRG_0_BTREG BRG0_BAUDE_TUNING_REGISTER /* 0xb204 */
-
-#endif /* __MPSC_H__ */
diff --git a/board/Marvell/db64460/mv_eth.c b/board/Marvell/db64460/mv_eth.c
deleted file mode 100644
index ec5d581065..0000000000
--- a/board/Marvell/db64460/mv_eth.c
+++ /dev/null
@@ -1,3182 +0,0 @@
-/*
- * (C) Copyright 2003
- * Ingo Assmus <ingo.assmus@keymile.com>
- *
- * based on - Driver for MV64460X ethernet ports
- * Copyright (C) 2002 rabeeh@galileo.co.il
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * mv_eth.c - header file for the polled mode GT ethernet driver
- */
-#include <common.h>
-#include <net.h>
-#include <malloc.h>
-
-#include "mv_eth.h"
-
-/* enable Debug outputs */
-
-#undef DEBUG_MV_ETH
-
-#ifdef DEBUG_MV_ETH
-#define DEBUG
-#define DP(x) x
-#else
-#define DP(x)
-#endif
-
-#undef MV64460_CHECKSUM_OFFLOAD
-/*************************************************************************
-**************************************************************************
-**************************************************************************
-* The first part is the high level driver of the gigE ethernet ports. *
-**************************************************************************
-**************************************************************************
-*************************************************************************/
-
-/* Definition for configuring driver */
-/* #define UPDATE_STATS_BY_SOFTWARE */
-#undef MV64460_RX_QUEUE_FILL_ON_TASK
-
-
-/* Constants */
-#define MAGIC_ETH_RUNNING 8031971
-#define MV64460_INTERNAL_SRAM_SIZE _256K
-#define EXTRA_BYTES 32
-#define WRAP ETH_HLEN + 2 + 4 + 16
-#define BUFFER_MTU dev->mtu + WRAP
-#define INT_CAUSE_UNMASK_ALL 0x0007ffff
-#define INT_CAUSE_UNMASK_ALL_EXT 0x0011ffff
-#ifdef MV64460_RX_FILL_ON_TASK
-#define INT_CAUSE_MASK_ALL 0x00000000
-#define INT_CAUSE_CHECK_BITS INT_CAUSE_UNMASK_ALL
-#define INT_CAUSE_CHECK_BITS_EXT INT_CAUSE_UNMASK_ALL_EXT
-#endif
-
-/* Read/Write to/from MV64460 internal registers */
-#define MV_REG_READ(offset) my_le32_to_cpu(* (volatile unsigned int *) (INTERNAL_REG_BASE_ADDR + offset))
-#define MV_REG_WRITE(offset,data) *(volatile unsigned int *) (INTERNAL_REG_BASE_ADDR + offset) = my_cpu_to_le32 (data)
-#define MV_SET_REG_BITS(regOffset,bits) ((*((volatile unsigned int*)((INTERNAL_REG_BASE_ADDR) + (regOffset)))) |= ((unsigned int)my_cpu_to_le32(bits)))
-#define MV_RESET_REG_BITS(regOffset,bits) ((*((volatile unsigned int*)((INTERNAL_REG_BASE_ADDR) + (regOffset)))) &= ~((unsigned int)my_cpu_to_le32(bits)))
-
-/* Static function declarations */
-static int mv64460_eth_real_open (struct eth_device *eth);
-static int mv64460_eth_real_stop (struct eth_device *eth);
-static struct net_device_stats *mv64460_eth_get_stats (struct eth_device
- *dev);
-static void eth_port_init_mac_tables (ETH_PORT eth_port_num);
-static void mv64460_eth_update_stat (struct eth_device *dev);
-bool db64460_eth_start (struct eth_device *eth);
-unsigned int eth_read_mib_counter (ETH_PORT eth_port_num,
- unsigned int mib_offset);
-int mv64460_eth_receive (struct eth_device *dev);
-
-int mv64460_eth_xmit (struct eth_device *, volatile void *packet, int length);
-
-#ifndef UPDATE_STATS_BY_SOFTWARE
-static void mv64460_eth_print_stat (struct eth_device *dev);
-#endif
-/* Processes a received packet */
-extern void NetReceive (volatile uchar *, int);
-
-extern unsigned int INTERNAL_REG_BASE_ADDR;
-
-/*************************************************
- *Helper functions - used inside the driver only *
- *************************************************/
-#ifdef DEBUG_MV_ETH
-void print_globals (struct eth_device *dev)
-{
- printf ("Ethernet PRINT_Globals-Debug function\n");
- printf ("Base Address for ETH_PORT_INFO: %08x\n",
- (unsigned int) dev->priv);
- printf ("Base Address for mv64460_eth_priv: %08x\n",
- (unsigned int) &(((ETH_PORT_INFO *) dev->priv)->
- port_private));
-
- printf ("GT Internal Base Address: %08x\n",
- INTERNAL_REG_BASE_ADDR);
- printf ("Base Address for TX-DESCs: %08x Number of allocated Buffers %d\n", (unsigned int) ((ETH_PORT_INFO *) dev->priv)->p_tx_desc_area_base[0], MV64460_TX_QUEUE_SIZE);
- printf ("Base Address for RX-DESCs: %08x Number of allocated Buffers %d\n", (unsigned int) ((ETH_PORT_INFO *) dev->priv)->p_rx_desc_area_base[0], MV64460_RX_QUEUE_SIZE);
- printf ("Base Address for RX-Buffer: %08x allocated Bytes %d\n",
- (unsigned int) ((ETH_PORT_INFO *) dev->priv)->
- p_rx_buffer_base[0],
- (MV64460_RX_QUEUE_SIZE * MV64460_RX_BUFFER_SIZE) + 32);
- printf ("Base Address for TX-Buffer: %08x allocated Bytes %d\n",
- (unsigned int) ((ETH_PORT_INFO *) dev->priv)->
- p_tx_buffer_base[0],
- (MV64460_TX_QUEUE_SIZE * MV64460_TX_BUFFER_SIZE) + 32);
-}
-#endif
-
-#define my_cpu_to_le32(x) my_le32_to_cpu((x))
-
-unsigned long my_le32_to_cpu (unsigned long x)
-{
- return (((x & 0x000000ffU) << 24) |
- ((x & 0x0000ff00U) << 8) |
- ((x & 0x00ff0000U) >> 8) | ((x & 0xff000000U) >> 24));
-}
-
-
-/**********************************************************************
- * mv64460_eth_print_phy_status
- *
- * Prints gigabit ethenret phy status
- *
- * Input : pointer to ethernet interface network device structure
- * Output : N/A
- **********************************************************************/
-
-static void mv64460_eth_print_phy_status (struct eth_device *dev)
-{
- struct mv64460_eth_priv *port_private;
- unsigned int port_num;
- ETH_PORT_INFO *ethernet_private = (ETH_PORT_INFO *) dev->priv;
- unsigned int port_status, phy_reg_data;
-
- port_private =
- (struct mv64460_eth_priv *) ethernet_private->port_private;
- port_num = port_private->port_num;
-
- /* Check Link status on phy */
- eth_port_read_smi_reg (port_num, 1, &phy_reg_data);
- if (!(phy_reg_data & 0x20)) {
- printf ("Ethernet port changed link status to DOWN\n");
- } else {
- port_status =
- MV_REG_READ (MV64460_ETH_PORT_STATUS_REG (port_num));
- printf ("Ethernet status port %d: Link up", port_num);
- printf (", %s",
- (port_status & BIT2) ? "Full Duplex" : "Half Duplex");
- if (port_status & BIT4)
- printf (", Speed 1 Gbps");
- else
- printf (", %s",
- (port_status & BIT5) ? "Speed 100 Mbps" :
- "Speed 10 Mbps");
- printf ("\n");
- }
-}
-
-/**********************************************************************
- * u-boot entry functions for mv64460_eth
- *
- **********************************************************************/
-int db64460_eth_probe (struct eth_device *dev)
-{
- return ((int) db64460_eth_start (dev));
-}
-
-int db64460_eth_poll (struct eth_device *dev)
-{
- return mv64460_eth_receive (dev);
-}
-
-int db64460_eth_transmit (struct eth_device *dev, volatile void *packet,
- int length)
-{
- mv64460_eth_xmit (dev, packet, length);
- return 0;
-}
-
-void db64460_eth_disable (struct eth_device *dev)
-{
- mv64460_eth_stop (dev);
-}
-
-
-void mv6446x_eth_initialize (bd_t * bis)
-{
- struct eth_device *dev;
- ETH_PORT_INFO *ethernet_private;
- struct mv64460_eth_priv *port_private;
- int devnum, x, temp;
- char *s, *e, buf[64];
-
- for (devnum = 0; devnum < MV_ETH_DEVS; devnum++) {
- dev = calloc (sizeof (*dev), 1);
- if (!dev) {
- printf ("%s: mv_enet%d allocation failure, %s\n",
- __FUNCTION__, devnum, "eth_device structure");
- return;
- }
-
- /* must be less than NAMESIZE (16) */
- sprintf (dev->name, "mv_enet%d", devnum);
-
-#ifdef DEBUG
- printf ("Initializing %s\n", dev->name);
-#endif
-
- /* Extract the MAC address from the environment */
- switch (devnum) {
- case 0:
- s = "ethaddr";
- break;
-
- case 1:
- s = "eth1addr";
- break;
-
- case 2:
- s = "eth2addr";
- break;
-
- default: /* this should never happen */
- printf ("%s: Invalid device number %d\n",
- __FUNCTION__, devnum);
- return;
- }
-
- temp = getenv_r (s, buf, sizeof (buf));
- s = (temp > 0) ? buf : NULL;
-
-#ifdef DEBUG
- printf ("Setting MAC %d to %s\n", devnum, s);
-#endif
- for (x = 0; x < 6; ++x) {
- dev->enetaddr[x] = s ? simple_strtoul (s, &e, 16) : 0;
- if (s)
- s = (*e) ? e + 1 : e;
- }
- /* ronen - set the MAC addr in the HW */
- eth_port_uc_addr_set (devnum, dev->enetaddr, 0);
-
- dev->init = (void *) db64460_eth_probe;
- dev->halt = (void *) ethernet_phy_reset;
- dev->send = (void *) db64460_eth_transmit;
- dev->recv = (void *) db64460_eth_poll;
-
- ethernet_private = calloc (sizeof (*ethernet_private), 1);
- dev->priv = (void *)ethernet_private;
- if (!ethernet_private) {
- printf ("%s: %s allocation failure, %s\n",
- __FUNCTION__, dev->name,
- "Private Device Structure");
- free (dev);
- return;
- }
- /* start with an zeroed ETH_PORT_INFO */
- memset (ethernet_private, 0, sizeof (ETH_PORT_INFO));
- memcpy (ethernet_private->port_mac_addr, dev->enetaddr, 6);
-
- /* set pointer to memory for stats data structure etc... */
- port_private = calloc (sizeof (*ethernet_private), 1);
- ethernet_private->port_private = (void *)port_private;
- if (!port_private) {
- printf ("%s: %s allocation failure, %s\n",
- __FUNCTION__, dev->name,
- "Port Private Device Structure");
-
- free (ethernet_private);
- free (dev);
- return;
- }
-
- port_private->stats =
- calloc (sizeof (struct net_device_stats), 1);
- if (!port_private->stats) {
- printf ("%s: %s allocation failure, %s\n",
- __FUNCTION__, dev->name,
- "Net stat Structure");
-
- free (port_private);
- free (ethernet_private);
- free (dev);
- return;
- }
- memset (ethernet_private->port_private, 0,
- sizeof (struct mv64460_eth_priv));
- switch (devnum) {
- case 0:
- ethernet_private->port_num = ETH_0;
- break;
- case 1:
- ethernet_private->port_num = ETH_1;
- break;
- case 2:
- ethernet_private->port_num = ETH_2;
- break;
- default:
- printf ("Invalid device number %d\n", devnum);
- break;
- };
-
- port_private->port_num = devnum;
- /*
- * Read MIB counter on the GT in order to reset them,
- * then zero all the stats fields in memory
- */
- mv64460_eth_update_stat (dev);
- memset (port_private->stats, 0,
- sizeof (struct net_device_stats));
- /* Extract the MAC address from the environment */
- switch (devnum) {
- case 0:
- s = "ethaddr";
- break;
-
- case 1:
- s = "eth1addr";
- break;
-
- case 2:
- s = "eth2addr";
- break;
-
- default: /* this should never happen */
- printf ("%s: Invalid device number %d\n",
- __FUNCTION__, devnum);
- return;
- }
-
- temp = getenv_r (s, buf, sizeof (buf));
- s = (temp > 0) ? buf : NULL;
-
-#ifdef DEBUG
- printf ("Setting MAC %d to %s\n", devnum, s);
-#endif
- for (x = 0; x < 6; ++x) {
- dev->enetaddr[x] = s ? simple_strtoul (s, &e, 16) : 0;
- if (s)
- s = (*e) ? e + 1 : e;
- }
-
- DP (printf ("Allocating descriptor and buffer rings\n"));
-
- ethernet_private->p_rx_desc_area_base[0] =
- (ETH_RX_DESC *) memalign (16,
- RX_DESC_ALIGNED_SIZE *
- MV64460_RX_QUEUE_SIZE + 1);
- ethernet_private->p_tx_desc_area_base[0] =
- (ETH_TX_DESC *) memalign (16,
- TX_DESC_ALIGNED_SIZE *
- MV64460_TX_QUEUE_SIZE + 1);
-
- ethernet_private->p_rx_buffer_base[0] =
- (char *) memalign (16,
- MV64460_RX_QUEUE_SIZE *
- MV64460_TX_BUFFER_SIZE + 1);
- ethernet_private->p_tx_buffer_base[0] =
- (char *) memalign (16,
- MV64460_RX_QUEUE_SIZE *
- MV64460_TX_BUFFER_SIZE + 1);
-
-#ifdef DEBUG_MV_ETH
- /* DEBUG OUTPUT prints adresses of globals */
- print_globals (dev);
-#endif
- eth_register (dev);
-
- }
- DP (printf ("%s: exit\n", __FUNCTION__));
-
-}
-
-/**********************************************************************
- * mv64460_eth_open
- *
- * This function is called when openning the network device. The function
- * should initialize all the hardware, initialize cyclic Rx/Tx
- * descriptors chain and buffers and allocate an IRQ to the network
- * device.
- *
- * Input : a pointer to the network device structure
- * / / ronen - changed the output to match net/eth.c needs
- * Output : nonzero of success , zero if fails.
- * under construction
- **********************************************************************/
-
-int mv64460_eth_open (struct eth_device *dev)
-{
- return (mv64460_eth_real_open (dev));
-}
-
-/* Helper function for mv64460_eth_open */
-static int mv64460_eth_real_open (struct eth_device *dev)
-{
-
- unsigned int queue;
- ETH_PORT_INFO *ethernet_private;
- struct mv64460_eth_priv *port_private;
- unsigned int port_num;
- u32 port_status, phy_reg_data;
-
- ethernet_private = (ETH_PORT_INFO *) dev->priv;
- /* ronen - when we update the MAC env params we only update dev->enetaddr
- see ./net/eth.c eth_set_enetaddr() */
- memcpy (ethernet_private->port_mac_addr, dev->enetaddr, 6);
-
- port_private =
- (struct mv64460_eth_priv *) ethernet_private->port_private;
- port_num = port_private->port_num;
-
- /* Stop RX Queues */
- MV_REG_WRITE (MV64460_ETH_RECEIVE_QUEUE_COMMAND_REG (port_num),
- 0x0000ff00);
-
- /* Clear the ethernet port interrupts */
- MV_REG_WRITE (MV64460_ETH_INTERRUPT_CAUSE_REG (port_num), 0);
- MV_REG_WRITE (MV64460_ETH_INTERRUPT_CAUSE_EXTEND_REG (port_num), 0);
-
- /* Unmask RX buffer and TX end interrupt */
- MV_REG_WRITE (MV64460_ETH_INTERRUPT_MASK_REG (port_num),
- INT_CAUSE_UNMASK_ALL);
-
- /* Unmask phy and link status changes interrupts */
- MV_REG_WRITE (MV64460_ETH_INTERRUPT_EXTEND_MASK_REG (port_num),
- INT_CAUSE_UNMASK_ALL_EXT);
-
- /* Set phy address of the port */
- ethernet_private->port_phy_addr = 0x8 + port_num;
-
- /* Activate the DMA channels etc */
- eth_port_init (ethernet_private);
-
-
- /* "Allocate" setup TX rings */
-
- for (queue = 0; queue < MV64460_TX_QUEUE_NUM; queue++) {
- unsigned int size;
-
- port_private->tx_ring_size[queue] = MV64460_TX_QUEUE_SIZE;
- size = (port_private->tx_ring_size[queue] * TX_DESC_ALIGNED_SIZE); /*size = no of DESCs times DESC-size */
- ethernet_private->tx_desc_area_size[queue] = size;
-
- /* first clear desc area completely */
- memset ((void *) ethernet_private->p_tx_desc_area_base[queue],
- 0, ethernet_private->tx_desc_area_size[queue]);
-
- /* initialize tx desc ring with low level driver */
- if (ether_init_tx_desc_ring
- (ethernet_private, ETH_Q0,
- port_private->tx_ring_size[queue],
- MV64460_TX_BUFFER_SIZE /* Each Buffer is 1600 Byte */ ,
- (unsigned int) ethernet_private->
- p_tx_desc_area_base[queue],
- (unsigned int) ethernet_private->
- p_tx_buffer_base[queue]) == false)
- printf ("### Error initializing TX Ring\n");
- }
-
- /* "Allocate" setup RX rings */
- for (queue = 0; queue < MV64460_RX_QUEUE_NUM; queue++) {
- unsigned int size;
-
- /* Meantime RX Ring are fixed - but must be configurable by user */
- port_private->rx_ring_size[queue] = MV64460_RX_QUEUE_SIZE;
- size = (port_private->rx_ring_size[queue] *
- RX_DESC_ALIGNED_SIZE);
- ethernet_private->rx_desc_area_size[queue] = size;
-
- /* first clear desc area completely */
- memset ((void *) ethernet_private->p_rx_desc_area_base[queue],
- 0, ethernet_private->rx_desc_area_size[queue]);
- if ((ether_init_rx_desc_ring
- (ethernet_private, ETH_Q0,
- port_private->rx_ring_size[queue],
- MV64460_RX_BUFFER_SIZE /* Each Buffer is 1600 Byte */ ,
- (unsigned int) ethernet_private->
- p_rx_desc_area_base[queue],
- (unsigned int) ethernet_private->
- p_rx_buffer_base[queue])) == false)
- printf ("### Error initializing RX Ring\n");
- }
-
- eth_port_start (ethernet_private);
-
- /* Set maximum receive buffer to 9700 bytes */
- MV_REG_WRITE (MV64460_ETH_PORT_SERIAL_CONTROL_REG (port_num),
- (0x5 << 17) |
- (MV_REG_READ
- (MV64460_ETH_PORT_SERIAL_CONTROL_REG (port_num))
- & 0xfff1ffff));
-
- /*
- * Set ethernet MTU for leaky bucket mechanism to 0 - this will
- * disable the leaky bucket mechanism .
- */
-
- MV_REG_WRITE (MV64460_ETH_MAXIMUM_TRANSMIT_UNIT (port_num), 0);
- port_status = MV_REG_READ (MV64460_ETH_PORT_STATUS_REG (port_num));
-
- /* Check Link status on phy */
- eth_port_read_smi_reg (port_num, 1, &phy_reg_data);
- if (!(phy_reg_data & 0x20)) {
- /* Reset PHY */
- if ((ethernet_phy_reset (port_num)) != true) {
- printf ("$$ Warnning: No link on port %d \n",
- port_num);
- return 0;
- } else {
- eth_port_read_smi_reg (port_num, 1, &phy_reg_data);
- if (!(phy_reg_data & 0x20)) {
- printf ("### Error: Phy is not active\n");
- return 0;
- }
- }
- } else {
- mv64460_eth_print_phy_status (dev);
- }
- port_private->eth_running = MAGIC_ETH_RUNNING;
- return 1;
-}
-
-
-static int mv64460_eth_free_tx_rings (struct eth_device *dev)
-{
- unsigned int queue;
- ETH_PORT_INFO *ethernet_private;
- struct mv64460_eth_priv *port_private;
- unsigned int port_num;
- volatile ETH_TX_DESC *p_tx_curr_desc;
-
- ethernet_private = (ETH_PORT_INFO *) dev->priv;
- port_private =
- (struct mv64460_eth_priv *) ethernet_private->port_private;
- port_num = port_private->port_num;
-
- /* Stop Tx Queues */
- MV_REG_WRITE (MV64460_ETH_TRANSMIT_QUEUE_COMMAND_REG (port_num),
- 0x0000ff00);
-
- /* Free TX rings */
- DP (printf ("Clearing previously allocated TX queues... "));
- for (queue = 0; queue < MV64460_TX_QUEUE_NUM; queue++) {
- /* Free on TX rings */
- for (p_tx_curr_desc =
- ethernet_private->p_tx_desc_area_base[queue];
- ((unsigned int) p_tx_curr_desc <= (unsigned int)
- ethernet_private->p_tx_desc_area_base[queue] +
- ethernet_private->tx_desc_area_size[queue]);
- p_tx_curr_desc =
- (ETH_TX_DESC *) ((unsigned int) p_tx_curr_desc +
- TX_DESC_ALIGNED_SIZE)) {
- /* this is inside for loop */
- if (p_tx_curr_desc->return_info != 0) {
- p_tx_curr_desc->return_info = 0;
- DP (printf ("freed\n"));
- }
- }
- DP (printf ("Done\n"));
- }
- return 0;
-}
-
-static int mv64460_eth_free_rx_rings (struct eth_device *dev)
-{
- unsigned int queue;
- ETH_PORT_INFO *ethernet_private;
- struct mv64460_eth_priv *port_private;
- unsigned int port_num;
- volatile ETH_RX_DESC *p_rx_curr_desc;
-
- ethernet_private = (ETH_PORT_INFO *) dev->priv;
- port_private =
- (struct mv64460_eth_priv *) ethernet_private->port_private;
- port_num = port_private->port_num;
-
-
- /* Stop RX Queues */
- MV_REG_WRITE (MV64460_ETH_RECEIVE_QUEUE_COMMAND_REG (port_num),
- 0x0000ff00);
-
- /* Free RX rings */
- DP (printf ("Clearing previously allocated RX queues... "));
- for (queue = 0; queue < MV64460_RX_QUEUE_NUM; queue++) {
- /* Free preallocated skb's on RX rings */
- for (p_rx_curr_desc =
- ethernet_private->p_rx_desc_area_base[queue];
- (((unsigned int) p_rx_curr_desc <
- ((unsigned int) ethernet_private->
- p_rx_desc_area_base[queue] +
- ethernet_private->rx_desc_area_size[queue])));
- p_rx_curr_desc =
- (ETH_RX_DESC *) ((unsigned int) p_rx_curr_desc +
- RX_DESC_ALIGNED_SIZE)) {
- if (p_rx_curr_desc->return_info != 0) {
- p_rx_curr_desc->return_info = 0;
- DP (printf ("freed\n"));
- }
- }
- DP (printf ("Done\n"));
- }
- return 0;
-}
-
-/**********************************************************************
- * mv64460_eth_stop
- *
- * This function is used when closing the network device.
- * It updates the hardware,
- * release all memory that holds buffers and descriptors and release the IRQ.
- * Input : a pointer to the device structure
- * Output : zero if success , nonzero if fails
- *********************************************************************/
-
-int mv64460_eth_stop (struct eth_device *dev)
-{
- ETH_PORT_INFO *ethernet_private;
- struct mv64460_eth_priv *port_private;
- unsigned int port_num;
-
- ethernet_private = (ETH_PORT_INFO *) dev->priv;
- port_private =
- (struct mv64460_eth_priv *) ethernet_private->port_private;
- port_num = port_private->port_num;
-
- /* Disable all gigE address decoder */
- MV_REG_WRITE (MV64460_ETH_BASE_ADDR_ENABLE_REG, 0x3f);
- DP (printf ("%s Ethernet stop called ... \n", __FUNCTION__));
- mv64460_eth_real_stop (dev);
-
- return 0;
-};
-
-/* Helper function for mv64460_eth_stop */
-
-static int mv64460_eth_real_stop (struct eth_device *dev)
-{
- ETH_PORT_INFO *ethernet_private;
- struct mv64460_eth_priv *port_private;
- unsigned int port_num;
-
- ethernet_private = (ETH_PORT_INFO *) dev->priv;
- port_private =
- (struct mv64460_eth_priv *) ethernet_private->port_private;
- port_num = port_private->port_num;
-
-
- mv64460_eth_free_tx_rings (dev);
- mv64460_eth_free_rx_rings (dev);
-
- eth_port_reset (ethernet_private->port_num);
- /* Disable ethernet port interrupts */
- MV_REG_WRITE (MV64460_ETH_INTERRUPT_CAUSE_REG (port_num), 0);
- MV_REG_WRITE (MV64460_ETH_INTERRUPT_CAUSE_EXTEND_REG (port_num), 0);
- /* Mask RX buffer and TX end interrupt */
- MV_REG_WRITE (MV64460_ETH_INTERRUPT_MASK_REG (port_num), 0);
- /* Mask phy and link status changes interrupts */
- MV_REG_WRITE (MV64460_ETH_INTERRUPT_EXTEND_MASK_REG (port_num), 0);
- MV_RESET_REG_BITS (MV64460_CPU_INTERRUPT0_MASK_HIGH,
- BIT0 << port_num);
- /* Print Network statistics */
-#ifndef UPDATE_STATS_BY_SOFTWARE
- /*
- * Print statistics (only if ethernet is running),
- * then zero all the stats fields in memory
- */
- if (port_private->eth_running == MAGIC_ETH_RUNNING) {
- port_private->eth_running = 0;
- mv64460_eth_print_stat (dev);
- }
- memset (port_private->stats, 0, sizeof (struct net_device_stats));
-#endif
- DP (printf ("\nEthernet stopped ... \n"));
- return 0;
-}
-
-
-/**********************************************************************
- * mv64460_eth_start_xmit
- *
- * This function is queues a packet in the Tx descriptor for
- * required port.
- *
- * Input : skb - a pointer to socket buffer
- * dev - a pointer to the required port
- *
- * Output : zero upon success
- **********************************************************************/
-
-int mv64460_eth_xmit (struct eth_device *dev, volatile void *dataPtr,
- int dataSize)
-{
- ETH_PORT_INFO *ethernet_private;
- struct mv64460_eth_priv *port_private;
- unsigned int port_num;
- PKT_INFO pkt_info;
- ETH_FUNC_RET_STATUS status;
- struct net_device_stats *stats;
- ETH_FUNC_RET_STATUS release_result;
-
- ethernet_private = (ETH_PORT_INFO *) dev->priv;
- port_private =
- (struct mv64460_eth_priv *) ethernet_private->port_private;
- port_num = port_private->port_num;
-
- stats = port_private->stats;
-
- /* Update packet info data structure */
- pkt_info.cmd_sts = ETH_TX_FIRST_DESC | ETH_TX_LAST_DESC; /* DMA owned, first last */
- pkt_info.byte_cnt = dataSize;
- pkt_info.buf_ptr = (unsigned int) dataPtr;
-
- status = eth_port_send (ethernet_private, ETH_Q0, &pkt_info);
- if ((status == ETH_ERROR) || (status == ETH_QUEUE_FULL)) {
- printf ("Error on transmitting packet ..");
- if (status == ETH_QUEUE_FULL)
- printf ("ETH Queue is full. \n");
- if (status == ETH_QUEUE_LAST_RESOURCE)
- printf ("ETH Queue: using last available resource. \n");
- goto error;
- }
-
- /* Update statistics and start of transmittion time */
- stats->tx_bytes += dataSize;
- stats->tx_packets++;
-
- /* Check if packet(s) is(are) transmitted correctly (release everything) */
- do {
- release_result =
- eth_tx_return_desc (ethernet_private, ETH_Q0,
- &pkt_info);
- switch (release_result) {
- case ETH_OK:
- DP (printf ("descriptor released\n"));
- if (pkt_info.cmd_sts & BIT0) {
- printf ("Error in TX\n");
- stats->tx_errors++;
-
- }
- break;
- case ETH_RETRY:
- DP (printf ("transmission still in process\n"));
- break;
-
- case ETH_ERROR:
- printf ("routine can not access Tx desc ring\n");
- break;
-
- case ETH_END_OF_JOB:
- DP (printf ("the routine has nothing to release\n"));
- break;
- default: /* should not happen */
- break;
- }
- } while (release_result == ETH_OK);
-
-
- return 0; /* success */
- error:
- return 1; /* Failed - higher layers will free the skb */
-}
-
-/**********************************************************************
- * mv64460_eth_receive
- *
- * This function is forward packets that are received from the port's
- * queues toward kernel core or FastRoute them to another interface.
- *
- * Input : dev - a pointer to the required interface
- * max - maximum number to receive (0 means unlimted)
- *
- * Output : number of served packets
- **********************************************************************/
-
-int mv64460_eth_receive (struct eth_device *dev)
-{
- ETH_PORT_INFO *ethernet_private;
- struct mv64460_eth_priv *port_private;
- unsigned int port_num;
- PKT_INFO pkt_info;
- struct net_device_stats *stats;
-
-
- ethernet_private = (ETH_PORT_INFO *) dev->priv;
- port_private =
- (struct mv64460_eth_priv *) ethernet_private->port_private;
- port_num = port_private->port_num;
- stats = port_private->stats;
-
- while ((eth_port_receive (ethernet_private, ETH_Q0, &pkt_info) ==
- ETH_OK)) {
-
-#ifdef DEBUG_MV_ETH
- if (pkt_info.byte_cnt != 0) {
- printf ("%s: Received %d byte Packet @ 0x%x\n",
- __FUNCTION__, pkt_info.byte_cnt,
- pkt_info.buf_ptr);
- }
-#endif
- /* Update statistics. Note byte count includes 4 byte CRC count */
- stats->rx_packets++;
- stats->rx_bytes += pkt_info.byte_cnt;
-
- /*
- * In case received a packet without first / last bits on OR the error
- * summary bit is on, the packets needs to be dropeed.
- */
- if (((pkt_info.
- cmd_sts & (ETH_RX_FIRST_DESC | ETH_RX_LAST_DESC)) !=
- (ETH_RX_FIRST_DESC | ETH_RX_LAST_DESC))
- || (pkt_info.cmd_sts & ETH_ERROR_SUMMARY)) {
- stats->rx_dropped++;
-
- printf ("Received packet spread on multiple descriptors\n");
-
- /* Is this caused by an error ? */
- if (pkt_info.cmd_sts & ETH_ERROR_SUMMARY) {
- stats->rx_errors++;
- }
-
- /* free these descriptors again without forwarding them to the higher layers */
- pkt_info.buf_ptr &= ~0x7; /* realign buffer again */
- pkt_info.byte_cnt = 0x0000; /* Reset Byte count */
-
- if (eth_rx_return_buff
- (ethernet_private, ETH_Q0, &pkt_info) != ETH_OK) {
- printf ("Error while returning the RX Desc to Ring\n");
- } else {
- DP (printf ("RX Desc returned to Ring\n"));
- }
- /* /free these descriptors again */
- } else {
-
-/* !!! call higher layer processing */
-#ifdef DEBUG_MV_ETH
- printf ("\nNow send it to upper layer protocols (NetReceive) ...\n");
-#endif
- /* let the upper layer handle the packet */
- NetReceive ((uchar *) pkt_info.buf_ptr,
- (int) pkt_info.byte_cnt);
-
-/* **************************************************************** */
-/* free descriptor */
- pkt_info.buf_ptr &= ~0x7; /* realign buffer again */
- pkt_info.byte_cnt = 0x0000; /* Reset Byte count */
- DP (printf
- ("RX: pkt_info.buf_ptr = %x\n",
- pkt_info.buf_ptr));
- if (eth_rx_return_buff
- (ethernet_private, ETH_Q0, &pkt_info) != ETH_OK) {
- printf ("Error while returning the RX Desc to Ring\n");
- } else {
- DP (printf ("RX Desc returned to Ring\n"));
- }
-
-/* **************************************************************** */
-
- }
- }
- mv64460_eth_get_stats (dev); /* update statistics */
- return 1;
-}
-
-/**********************************************************************
- * mv64460_eth_get_stats
- *
- * Returns a pointer to the interface statistics.
- *
- * Input : dev - a pointer to the required interface
- *
- * Output : a pointer to the interface's statistics
- **********************************************************************/
-
-static struct net_device_stats *mv64460_eth_get_stats (struct eth_device *dev)
-{
- ETH_PORT_INFO *ethernet_private;
- struct mv64460_eth_priv *port_private;
- unsigned int port_num;
-
- ethernet_private = (ETH_PORT_INFO *) dev->priv;
- port_private =
- (struct mv64460_eth_priv *) ethernet_private->port_private;
- port_num = port_private->port_num;
-
- mv64460_eth_update_stat (dev);
-
- return port_private->stats;
-}
-
-
-/**********************************************************************
- * mv64460_eth_update_stat
- *
- * Update the statistics structure in the private data structure
- *
- * Input : pointer to ethernet interface network device structure
- * Output : N/A
- **********************************************************************/
-
-static void mv64460_eth_update_stat (struct eth_device *dev)
-{
- ETH_PORT_INFO *ethernet_private;
- struct mv64460_eth_priv *port_private;
- struct net_device_stats *stats;
- unsigned int port_num;
- volatile unsigned int dummy;
-
- ethernet_private = (ETH_PORT_INFO *) dev->priv;
- port_private =
- (struct mv64460_eth_priv *) ethernet_private->port_private;
- port_num = port_private->port_num;
- stats = port_private->stats;
-
- /* These are false updates */
- stats->rx_packets += (unsigned long)
- eth_read_mib_counter (ethernet_private->port_num,
- ETH_MIB_GOOD_FRAMES_RECEIVED);
- stats->tx_packets += (unsigned long)
- eth_read_mib_counter (ethernet_private->port_num,
- ETH_MIB_GOOD_FRAMES_SENT);
- stats->rx_bytes += (unsigned long)
- eth_read_mib_counter (ethernet_private->port_num,
- ETH_MIB_GOOD_OCTETS_RECEIVED_LOW);
- /*
- * Ideally this should be as follows -
- *
- * stats->rx_bytes += stats->rx_bytes +
- * ((unsigned long) ethReadMibCounter (ethernet_private->port_num ,
- * ETH_MIB_GOOD_OCTETS_RECEIVED_HIGH) << 32);
- *
- * But the unsigned long in PowerPC and MIPS are 32bit. So the next read
- * is just a dummy read for proper work of the GigE port
- */
- dummy = eth_read_mib_counter (ethernet_private->port_num,
- ETH_MIB_GOOD_OCTETS_RECEIVED_HIGH);
- stats->tx_bytes += (unsigned long)
- eth_read_mib_counter (ethernet_private->port_num,
- ETH_MIB_GOOD_OCTETS_SENT_LOW);
- dummy = eth_read_mib_counter (ethernet_private->port_num,
- ETH_MIB_GOOD_OCTETS_SENT_HIGH);
- stats->rx_errors += (unsigned long)
- eth_read_mib_counter (ethernet_private->port_num,
- ETH_MIB_MAC_RECEIVE_ERROR);
-
- /* Rx dropped is for received packet with CRC error */
- stats->rx_dropped +=
- (unsigned long) eth_read_mib_counter (ethernet_private->
- port_num,
- ETH_MIB_BAD_CRC_EVENT);
- stats->multicast += (unsigned long)
- eth_read_mib_counter (ethernet_private->port_num,
- ETH_MIB_MULTICAST_FRAMES_RECEIVED);
- stats->collisions +=
- (unsigned long) eth_read_mib_counter (ethernet_private->
- port_num,
- ETH_MIB_COLLISION) +
- (unsigned long) eth_read_mib_counter (ethernet_private->
- port_num,
- ETH_MIB_LATE_COLLISION);
- /* detailed rx errors */
- stats->rx_length_errors +=
- (unsigned long) eth_read_mib_counter (ethernet_private->
- port_num,
- ETH_MIB_UNDERSIZE_RECEIVED)
- +
- (unsigned long) eth_read_mib_counter (ethernet_private->
- port_num,
- ETH_MIB_OVERSIZE_RECEIVED);
- /* detailed tx errors */
-}
-
-#ifndef UPDATE_STATS_BY_SOFTWARE
-/**********************************************************************
- * mv64460_eth_print_stat
- *
- * Update the statistics structure in the private data structure
- *
- * Input : pointer to ethernet interface network device structure
- * Output : N/A
- **********************************************************************/
-
-static void mv64460_eth_print_stat (struct eth_device *dev)
-{
- ETH_PORT_INFO *ethernet_private;
- struct mv64460_eth_priv *port_private;
- struct net_device_stats *stats;
- unsigned int port_num;
-
- ethernet_private = (ETH_PORT_INFO *) dev->priv;
- port_private =
- (struct mv64460_eth_priv *) ethernet_private->port_private;
- port_num = port_private->port_num;
- stats = port_private->stats;
-
- /* These are false updates */
- printf ("\n### Network statistics: ###\n");
- printf ("--------------------------\n");
- printf (" Packets received: %ld\n", stats->rx_packets);
- printf (" Packets send: %ld\n", stats->tx_packets);
- printf (" Received bytes: %ld\n", stats->rx_bytes);
- printf (" Send bytes: %ld\n", stats->tx_bytes);
- if (stats->rx_errors != 0)
- printf (" Rx Errors: %ld\n",
- stats->rx_errors);
- if (stats->rx_dropped != 0)
- printf (" Rx dropped (CRC Errors): %ld\n",
- stats->rx_dropped);
- if (stats->multicast != 0)
- printf (" Rx mulicast frames: %ld\n",
- stats->multicast);
- if (stats->collisions != 0)
- printf (" No. of collisions: %ld\n",
- stats->collisions);
- if (stats->rx_length_errors != 0)
- printf (" Rx length errors: %ld\n",
- stats->rx_length_errors);
-}
-#endif
-
-/**************************************************************************
- *network_start - Network Kick Off Routine UBoot
- *Inputs :
- *Outputs :
- **************************************************************************/
-
-bool db64460_eth_start (struct eth_device *dev)
-{
- return (mv64460_eth_open (dev)); /* calls real open */
-}
-
-/*************************************************************************
-**************************************************************************
-**************************************************************************
-* The second part is the low level driver of the gigE ethernet ports. *
-**************************************************************************
-**************************************************************************
-*************************************************************************/
-/*
- * based on Linux code
- * arch/ppc/galileo/EVB64460/mv64460_eth.c - Driver for MV64460X ethernet ports
- * Copyright (C) 2002 rabeeh@galileo.co.il
-
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version 2
- * of the License, or (at your option) any later version.
-
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
-
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
- *
- */
-
-/********************************************************************************
- * Marvell's Gigabit Ethernet controller low level driver
- *
- * DESCRIPTION:
- * This file introduce low level API to Marvell's Gigabit Ethernet
- * controller. This Gigabit Ethernet Controller driver API controls
- * 1) Operations (i.e. port init, start, reset etc').
- * 2) Data flow (i.e. port send, receive etc').
- * Each Gigabit Ethernet port is controlled via ETH_PORT_INFO
- * struct.
- * This struct includes user configuration information as well as
- * driver internal data needed for its operations.
- *
- * Supported Features:
- * - This low level driver is OS independent. Allocating memory for
- * the descriptor rings and buffers are not within the scope of
- * this driver.
- * - The user is free from Rx/Tx queue managing.
- * - This low level driver introduce functionality API that enable
- * the to operate Marvell's Gigabit Ethernet Controller in a
- * convenient way.
- * - Simple Gigabit Ethernet port operation API.
- * - Simple Gigabit Ethernet port data flow API.
- * - Data flow and operation API support per queue functionality.
- * - Support cached descriptors for better performance.
- * - Enable access to all four DRAM banks and internal SRAM memory
- * spaces.
- * - PHY access and control API.
- * - Port control register configuration API.
- * - Full control over Unicast and Multicast MAC configurations.
- *
- * Operation flow:
- *
- * Initialization phase
- * This phase complete the initialization of the ETH_PORT_INFO
- * struct.
- * User information regarding port configuration has to be set
- * prior to calling the port initialization routine. For example,
- * the user has to assign the port_phy_addr field which is board
- * depended parameter.
- * In this phase any port Tx/Rx activity is halted, MIB counters
- * are cleared, PHY address is set according to user parameter and
- * access to DRAM and internal SRAM memory spaces.
- *
- * Driver ring initialization
- * Allocating memory for the descriptor rings and buffers is not
- * within the scope of this driver. Thus, the user is required to
- * allocate memory for the descriptors ring and buffers. Those
- * memory parameters are used by the Rx and Tx ring initialization
- * routines in order to curve the descriptor linked list in a form
- * of a ring.
- * Note: Pay special attention to alignment issues when using
- * cached descriptors/buffers. In this phase the driver store
- * information in the ETH_PORT_INFO struct regarding each queue
- * ring.
- *
- * Driver start
- * This phase prepares the Ethernet port for Rx and Tx activity.
- * It uses the information stored in the ETH_PORT_INFO struct to
- * initialize the various port registers.
- *
- * Data flow:
- * All packet references to/from the driver are done using PKT_INFO
- * struct.
- * This struct is a unified struct used with Rx and Tx operations.
- * This way the user is not required to be familiar with neither
- * Tx nor Rx descriptors structures.
- * The driver's descriptors rings are management by indexes.
- * Those indexes controls the ring resources and used to indicate
- * a SW resource error:
- * 'current'
- * This index points to the current available resource for use. For
- * example in Rx process this index will point to the descriptor
- * that will be passed to the user upon calling the receive routine.
- * In Tx process, this index will point to the descriptor
- * that will be assigned with the user packet info and transmitted.
- * 'used'
- * This index points to the descriptor that need to restore its
- * resources. For example in Rx process, using the Rx buffer return
- * API will attach the buffer returned in packet info to the
- * descriptor pointed by 'used'. In Tx process, using the Tx
- * descriptor return will merely return the user packet info with
- * the command status of the transmitted buffer pointed by the
- * 'used' index. Nevertheless, it is essential to use this routine
- * to update the 'used' index.
- * 'first'
- * This index supports Tx Scatter-Gather. It points to the first
- * descriptor of a packet assembled of multiple buffers. For example
- * when in middle of Such packet we have a Tx resource error the
- * 'curr' index get the value of 'first' to indicate that the ring
- * returned to its state before trying to transmit this packet.
- *
- * Receive operation:
- * The eth_port_receive API set the packet information struct,
- * passed by the caller, with received information from the
- * 'current' SDMA descriptor.
- * It is the user responsibility to return this resource back
- * to the Rx descriptor ring to enable the reuse of this source.
- * Return Rx resource is done using the eth_rx_return_buff API.
- *
- * Transmit operation:
- * The eth_port_send API supports Scatter-Gather which enables to
- * send a packet spanned over multiple buffers. This means that
- * for each packet info structure given by the user and put into
- * the Tx descriptors ring, will be transmitted only if the 'LAST'
- * bit will be set in the packet info command status field. This
- * API also consider restriction regarding buffer alignments and
- * sizes.
- * The user must return a Tx resource after ensuring the buffer
- * has been transmitted to enable the Tx ring indexes to update.
- *
- * BOARD LAYOUT
- * This device is on-board. No jumper diagram is necessary.
- *
- * EXTERNAL INTERFACE
- *
- * Prior to calling the initialization routine eth_port_init() the user
- * must set the following fields under ETH_PORT_INFO struct:
- * port_num User Ethernet port number.
- * port_phy_addr User PHY address of Ethernet port.
- * port_mac_addr[6] User defined port MAC address.
- * port_config User port configuration value.
- * port_config_extend User port config extend value.
- * port_sdma_config User port SDMA config value.
- * port_serial_control User port serial control value.
- * *port_virt_to_phys () User function to cast virtual addr to CPU bus addr.
- * *port_private User scratch pad for user specific data structures.
- *
- * This driver introduce a set of default values:
- * PORT_CONFIG_VALUE Default port configuration value
- * PORT_CONFIG_EXTEND_VALUE Default port extend configuration value
- * PORT_SDMA_CONFIG_VALUE Default sdma control value
- * PORT_SERIAL_CONTROL_VALUE Default port serial control value
- *
- * This driver data flow is done using the PKT_INFO struct which is
- * a unified struct for Rx and Tx operations:
- * byte_cnt Tx/Rx descriptor buffer byte count.
- * l4i_chk CPU provided TCP Checksum. For Tx operation only.
- * cmd_sts Tx/Rx descriptor command status.
- * buf_ptr Tx/Rx descriptor buffer pointer.
- * return_info Tx/Rx user resource return information.
- *
- *
- * EXTERNAL SUPPORT REQUIREMENTS
- *
- * This driver requires the following external support:
- *
- * D_CACHE_FLUSH_LINE (address, address offset)
- *
- * This macro applies assembly code to flush and invalidate cache
- * line.
- * address - address base.
- * address offset - address offset
- *
- *
- * CPU_PIPE_FLUSH
- *
- * This macro applies assembly code to flush the CPU pipeline.
- *
- *******************************************************************************/
-/* includes */
-
-/* defines */
-/* SDMA command macros */
-#define ETH_ENABLE_TX_QUEUE(tx_queue, eth_port) \
- MV_REG_WRITE(MV64460_ETH_TRANSMIT_QUEUE_COMMAND_REG(eth_port), (1 << tx_queue))
-
-#define ETH_DISABLE_TX_QUEUE(tx_queue, eth_port) \
- MV_REG_WRITE(MV64460_ETH_TRANSMIT_QUEUE_COMMAND_REG(eth_port),\
- (1 << (8 + tx_queue)))
-
-#define ETH_ENABLE_RX_QUEUE(rx_queue, eth_port) \
-MV_REG_WRITE(MV64460_ETH_RECEIVE_QUEUE_COMMAND_REG(eth_port), (1 << rx_queue))
-
-#define ETH_DISABLE_RX_QUEUE(rx_queue, eth_port) \
-MV_REG_WRITE(MV64460_ETH_RECEIVE_QUEUE_COMMAND_REG(eth_port), (1 << (8 + rx_queue)))
-
-#define CURR_RFD_GET(p_curr_desc, queue) \
- ((p_curr_desc) = p_eth_port_ctrl->p_rx_curr_desc_q[queue])
-
-#define CURR_RFD_SET(p_curr_desc, queue) \
- (p_eth_port_ctrl->p_rx_curr_desc_q[queue] = (p_curr_desc))
-
-#define USED_RFD_GET(p_used_desc, queue) \
- ((p_used_desc) = p_eth_port_ctrl->p_rx_used_desc_q[queue])
-
-#define USED_RFD_SET(p_used_desc, queue)\
-(p_eth_port_ctrl->p_rx_used_desc_q[queue] = (p_used_desc))
-
-
-#define CURR_TFD_GET(p_curr_desc, queue) \
- ((p_curr_desc) = p_eth_port_ctrl->p_tx_curr_desc_q[queue])
-
-#define CURR_TFD_SET(p_curr_desc, queue) \
- (p_eth_port_ctrl->p_tx_curr_desc_q[queue] = (p_curr_desc))
-
-#define USED_TFD_GET(p_used_desc, queue) \
- ((p_used_desc) = p_eth_port_ctrl->p_tx_used_desc_q[queue])
-
-#define USED_TFD_SET(p_used_desc, queue) \
- (p_eth_port_ctrl->p_tx_used_desc_q[queue] = (p_used_desc))
-
-#define FIRST_TFD_GET(p_first_desc, queue) \
- ((p_first_desc) = p_eth_port_ctrl->p_tx_first_desc_q[queue])
-
-#define FIRST_TFD_SET(p_first_desc, queue) \
- (p_eth_port_ctrl->p_tx_first_desc_q[queue] = (p_first_desc))
-
-
-/* Macros that save access to desc in order to find next desc pointer */
-#define RX_NEXT_DESC_PTR(p_rx_desc, queue) (ETH_RX_DESC*)(((((unsigned int)p_rx_desc - (unsigned int)p_eth_port_ctrl->p_rx_desc_area_base[queue]) + RX_DESC_ALIGNED_SIZE) % p_eth_port_ctrl->rx_desc_area_size[queue]) + (unsigned int)p_eth_port_ctrl->p_rx_desc_area_base[queue])
-
-#define TX_NEXT_DESC_PTR(p_tx_desc, queue) (ETH_TX_DESC*)(((((unsigned int)p_tx_desc - (unsigned int)p_eth_port_ctrl->p_tx_desc_area_base[queue]) + TX_DESC_ALIGNED_SIZE) % p_eth_port_ctrl->tx_desc_area_size[queue]) + (unsigned int)p_eth_port_ctrl->p_tx_desc_area_base[queue])
-
-#define LINK_UP_TIMEOUT 100000
-#define PHY_BUSY_TIMEOUT 10000000
-
-/* locals */
-
-/* PHY routines */
-static void ethernet_phy_set (ETH_PORT eth_port_num, int phy_addr);
-static int ethernet_phy_get (ETH_PORT eth_port_num);
-
-/* Ethernet Port routines */
-static void eth_set_access_control (ETH_PORT eth_port_num,
- ETH_WIN_PARAM * param);
-static bool eth_port_uc_addr (ETH_PORT eth_port_num, unsigned char uc_nibble,
- ETH_QUEUE queue, int option);
-#if 0 /* FIXME */
-static bool eth_port_smc_addr (ETH_PORT eth_port_num,
- unsigned char mc_byte,
- ETH_QUEUE queue, int option);
-static bool eth_port_omc_addr (ETH_PORT eth_port_num,
- unsigned char crc8,
- ETH_QUEUE queue, int option);
-#endif
-
-static void eth_b_copy (unsigned int src_addr, unsigned int dst_addr,
- int byte_count);
-
-void eth_dbg (ETH_PORT_INFO * p_eth_port_ctrl);
-
-
-typedef enum _memory_bank { BANK0, BANK1, BANK2, BANK3 } MEMORY_BANK;
-u32 mv_get_dram_bank_base_addr (MEMORY_BANK bank)
-{
- u32 result = 0;
- u32 enable = MV_REG_READ (MV64460_BASE_ADDR_ENABLE);
-
- if (enable & (1 << bank))
- return 0;
- if (bank == BANK0)
- result = MV_REG_READ (MV64460_CS_0_BASE_ADDR);
- if (bank == BANK1)
- result = MV_REG_READ (MV64460_CS_1_BASE_ADDR);
- if (bank == BANK2)
- result = MV_REG_READ (MV64460_CS_2_BASE_ADDR);
- if (bank == BANK3)
- result = MV_REG_READ (MV64460_CS_3_BASE_ADDR);
- result &= 0x0000ffff;
- result = result << 16;
- return result;
-}
-
-u32 mv_get_dram_bank_size (MEMORY_BANK bank)
-{
- u32 result = 0;
- u32 enable = MV_REG_READ (MV64460_BASE_ADDR_ENABLE);
-
- if (enable & (1 << bank))
- return 0;
- if (bank == BANK0)
- result = MV_REG_READ (MV64460_CS_0_SIZE);
- if (bank == BANK1)
- result = MV_REG_READ (MV64460_CS_1_SIZE);
- if (bank == BANK2)
- result = MV_REG_READ (MV64460_CS_2_SIZE);
- if (bank == BANK3)
- result = MV_REG_READ (MV64460_CS_3_SIZE);
- result += 1;
- result &= 0x0000ffff;
- result = result << 16;
- return result;
-}
-
-u32 mv_get_internal_sram_base (void)
-{
- u32 result;
-
- result = MV_REG_READ (MV64460_INTEGRATED_SRAM_BASE_ADDR);
- result &= 0x0000ffff;
- result = result << 16;
- return result;
-}
-
-/*******************************************************************************
-* eth_port_init - Initialize the Ethernet port driver
-*
-* DESCRIPTION:
-* This function prepares the ethernet port to start its activity:
-* 1) Completes the ethernet port driver struct initialization toward port
-* start routine.
-* 2) Resets the device to a quiescent state in case of warm reboot.
-* 3) Enable SDMA access to all four DRAM banks as well as internal SRAM.
-* 4) Clean MAC tables. The reset status of those tables is unknown.
-* 5) Set PHY address.
-* Note: Call this routine prior to eth_port_start routine and after setting
-* user values in the user fields of Ethernet port control struct (i.e.
-* port_phy_addr).
-*
-* INPUT:
-* ETH_PORT_INFO *p_eth_port_ctrl Ethernet port control struct
-*
-* OUTPUT:
-* See description.
-*
-* RETURN:
-* None.
-*
-*******************************************************************************/
-static void eth_port_init (ETH_PORT_INFO * p_eth_port_ctrl)
-{
- int queue;
- ETH_WIN_PARAM win_param;
-
- p_eth_port_ctrl->port_config = PORT_CONFIG_VALUE;
- p_eth_port_ctrl->port_config_extend = PORT_CONFIG_EXTEND_VALUE;
- p_eth_port_ctrl->port_sdma_config = PORT_SDMA_CONFIG_VALUE;
- p_eth_port_ctrl->port_serial_control = PORT_SERIAL_CONTROL_VALUE;
-
- p_eth_port_ctrl->port_rx_queue_command = 0;
- p_eth_port_ctrl->port_tx_queue_command = 0;
-
- /* Zero out SW structs */
- for (queue = 0; queue < MAX_RX_QUEUE_NUM; queue++) {
- CURR_RFD_SET ((ETH_RX_DESC *) 0x00000000, queue);
- USED_RFD_SET ((ETH_RX_DESC *) 0x00000000, queue);
- p_eth_port_ctrl->rx_resource_err[queue] = false;
- }
-
- for (queue = 0; queue < MAX_TX_QUEUE_NUM; queue++) {
- CURR_TFD_SET ((ETH_TX_DESC *) 0x00000000, queue);
- USED_TFD_SET ((ETH_TX_DESC *) 0x00000000, queue);
- FIRST_TFD_SET ((ETH_TX_DESC *) 0x00000000, queue);
- p_eth_port_ctrl->tx_resource_err[queue] = false;
- }
-
- eth_port_reset (p_eth_port_ctrl->port_num);
-
- /* Set access parameters for DRAM bank 0 */
- win_param.win = ETH_WIN0; /* Use Ethernet window 0 */
- win_param.target = ETH_TARGET_DRAM; /* Window target - DDR */
- win_param.attributes = EBAR_ATTR_DRAM_CS0; /* Enable DRAM bank */
-#ifndef CONFIG_NOT_COHERENT_CACHE
- win_param.attributes |= EBAR_ATTR_DRAM_CACHE_COHERENCY_WB;
-#endif
- win_param.high_addr = 0;
- /* Get bank base */
- win_param.base_addr = mv_get_dram_bank_base_addr (BANK0);
- win_param.size = mv_get_dram_bank_size (BANK0); /* Get bank size */
- if (win_param.size == 0)
- win_param.enable = 0;
- else
- win_param.enable = 1; /* Enable the access */
- win_param.access_ctrl = EWIN_ACCESS_FULL; /* Enable full access */
-
- /* Set the access control for address window (EPAPR) READ & WRITE */
- eth_set_access_control (p_eth_port_ctrl->port_num, &win_param);
-
- /* Set access parameters for DRAM bank 1 */
- win_param.win = ETH_WIN1; /* Use Ethernet window 1 */
- win_param.target = ETH_TARGET_DRAM; /* Window target - DDR */
- win_param.attributes = EBAR_ATTR_DRAM_CS1; /* Enable DRAM bank */
-#ifndef CONFIG_NOT_COHERENT_CACHE
- win_param.attributes |= EBAR_ATTR_DRAM_CACHE_COHERENCY_WB;
-#endif
- win_param.high_addr = 0;
- /* Get bank base */
- win_param.base_addr = mv_get_dram_bank_base_addr (BANK1);
- win_param.size = mv_get_dram_bank_size (BANK1); /* Get bank size */
- if (win_param.size == 0)
- win_param.enable = 0;
- else
- win_param.enable = 1; /* Enable the access */
- win_param.access_ctrl = EWIN_ACCESS_FULL; /* Enable full access */
-
- /* Set the access control for address window (EPAPR) READ & WRITE */
- eth_set_access_control (p_eth_port_ctrl->port_num, &win_param);
-
- /* Set access parameters for DRAM bank 2 */
- win_param.win = ETH_WIN2; /* Use Ethernet window 2 */
- win_param.target = ETH_TARGET_DRAM; /* Window target - DDR */
- win_param.attributes = EBAR_ATTR_DRAM_CS2; /* Enable DRAM bank */
-#ifndef CONFIG_NOT_COHERENT_CACHE
- win_param.attributes |= EBAR_ATTR_DRAM_CACHE_COHERENCY_WB;
-#endif
- win_param.high_addr = 0;
- /* Get bank base */
- win_param.base_addr = mv_get_dram_bank_base_addr (BANK2);
- win_param.size = mv_get_dram_bank_size (BANK2); /* Get bank size */
- if (win_param.size == 0)
- win_param.enable = 0;
- else
- win_param.enable = 1; /* Enable the access */
- win_param.access_ctrl = EWIN_ACCESS_FULL; /* Enable full access */
-
- /* Set the access control for address window (EPAPR) READ & WRITE */
- eth_set_access_control (p_eth_port_ctrl->port_num, &win_param);
-
- /* Set access parameters for DRAM bank 3 */
- win_param.win = ETH_WIN3; /* Use Ethernet window 3 */
- win_param.target = ETH_TARGET_DRAM; /* Window target - DDR */
- win_param.attributes = EBAR_ATTR_DRAM_CS3; /* Enable DRAM bank */
-#ifndef CONFIG_NOT_COHERENT_CACHE
- win_param.attributes |= EBAR_ATTR_DRAM_CACHE_COHERENCY_WB;
-#endif
- win_param.high_addr = 0;
- /* Get bank base */
- win_param.base_addr = mv_get_dram_bank_base_addr (BANK3);
- win_param.size = mv_get_dram_bank_size (BANK3); /* Get bank size */
- if (win_param.size == 0)
- win_param.enable = 0;
- else
- win_param.enable = 1; /* Enable the access */
- win_param.access_ctrl = EWIN_ACCESS_FULL; /* Enable full access */
-
- /* Set the access control for address window (EPAPR) READ & WRITE */
- eth_set_access_control (p_eth_port_ctrl->port_num, &win_param);
-
- /* Set access parameters for Internal SRAM */
- win_param.win = ETH_WIN4; /* Use Ethernet window 0 */
- win_param.target = EBAR_TARGET_CBS; /* Target - Internal SRAM */
- win_param.attributes = EBAR_ATTR_CBS_SRAM | EBAR_ATTR_CBS_SRAM_BLOCK0;
- win_param.high_addr = 0;
- win_param.base_addr = mv_get_internal_sram_base (); /* Get base addr */
- win_param.size = MV64460_INTERNAL_SRAM_SIZE; /* Get bank size */
- win_param.enable = 1; /* Enable the access */
- win_param.access_ctrl = EWIN_ACCESS_FULL; /* Enable full access */
-
- /* Set the access control for address window (EPAPR) READ & WRITE */
- eth_set_access_control (p_eth_port_ctrl->port_num, &win_param);
-
- eth_port_init_mac_tables (p_eth_port_ctrl->port_num);
-
- ethernet_phy_set (p_eth_port_ctrl->port_num,
- p_eth_port_ctrl->port_phy_addr);
-
- return;
-
-}
-
-/*******************************************************************************
-* eth_port_start - Start the Ethernet port activity.
-*
-* DESCRIPTION:
-* This routine prepares the Ethernet port for Rx and Tx activity:
-* 1. Initialize Tx and Rx Current Descriptor Pointer for each queue that
-* has been initialized a descriptor's ring (using ether_init_tx_desc_ring
-* for Tx and ether_init_rx_desc_ring for Rx)
-* 2. Initialize and enable the Ethernet configuration port by writing to
-* the port's configuration and command registers.
-* 3. Initialize and enable the SDMA by writing to the SDMA's
-* configuration and command registers.
-* After completing these steps, the ethernet port SDMA can starts to
-* perform Rx and Tx activities.
-*
-* Note: Each Rx and Tx queue descriptor's list must be initialized prior
-* to calling this function (use ether_init_tx_desc_ring for Tx queues and
-* ether_init_rx_desc_ring for Rx queues).
-*
-* INPUT:
-* ETH_PORT_INFO *p_eth_port_ctrl Ethernet port control struct
-*
-* OUTPUT:
-* Ethernet port is ready to receive and transmit.
-*
-* RETURN:
-* false if the port PHY is not up.
-* true otherwise.
-*
-*******************************************************************************/
-static bool eth_port_start (ETH_PORT_INFO * p_eth_port_ctrl)
-{
- int queue;
- volatile ETH_TX_DESC *p_tx_curr_desc;
- volatile ETH_RX_DESC *p_rx_curr_desc;
- unsigned int phy_reg_data;
- ETH_PORT eth_port_num = p_eth_port_ctrl->port_num;
-
-
- /* Assignment of Tx CTRP of given queue */
- for (queue = 0; queue < MAX_TX_QUEUE_NUM; queue++) {
- CURR_TFD_GET (p_tx_curr_desc, queue);
- MV_REG_WRITE ((MV64460_ETH_TX_CURRENT_QUEUE_DESC_PTR_0
- (eth_port_num)
- + (4 * queue)),
- ((unsigned int) p_tx_curr_desc));
-
- }
-
- /* Assignment of Rx CRDP of given queue */
- for (queue = 0; queue < MAX_RX_QUEUE_NUM; queue++) {
- CURR_RFD_GET (p_rx_curr_desc, queue);
- MV_REG_WRITE ((MV64460_ETH_RX_CURRENT_QUEUE_DESC_PTR_0
- (eth_port_num)
- + (4 * queue)),
- ((unsigned int) p_rx_curr_desc));
-
- if (p_rx_curr_desc != NULL)
- /* Add the assigned Ethernet address to the port's address table */
- eth_port_uc_addr_set (p_eth_port_ctrl->port_num,
- p_eth_port_ctrl->port_mac_addr,
- queue);
- }
-
- /* Assign port configuration and command. */
- MV_REG_WRITE (MV64460_ETH_PORT_CONFIG_REG (eth_port_num),
- p_eth_port_ctrl->port_config);
-
- MV_REG_WRITE (MV64460_ETH_PORT_CONFIG_EXTEND_REG (eth_port_num),
- p_eth_port_ctrl->port_config_extend);
-
- MV_REG_WRITE (MV64460_ETH_PORT_SERIAL_CONTROL_REG (eth_port_num),
- p_eth_port_ctrl->port_serial_control);
-
- MV_SET_REG_BITS (MV64460_ETH_PORT_SERIAL_CONTROL_REG (eth_port_num),
- ETH_SERIAL_PORT_ENABLE);
-
- /* Assign port SDMA configuration */
- MV_REG_WRITE (MV64460_ETH_SDMA_CONFIG_REG (eth_port_num),
- p_eth_port_ctrl->port_sdma_config);
-
- MV_REG_WRITE (MV64460_ETH_TX_QUEUE_0_TOKEN_BUCKET_COUNT
- (eth_port_num), 0x3fffffff);
- MV_REG_WRITE (MV64460_ETH_TX_QUEUE_0_TOKEN_BUCKET_CONFIG
- (eth_port_num), 0x03fffcff);
- /* Turn off the port/queue bandwidth limitation */
- MV_REG_WRITE (MV64460_ETH_MAXIMUM_TRANSMIT_UNIT (eth_port_num), 0x0);
-
- /* Enable port Rx. */
- MV_REG_WRITE (MV64460_ETH_RECEIVE_QUEUE_COMMAND_REG (eth_port_num),
- p_eth_port_ctrl->port_rx_queue_command);
-
- /* Check if link is up */
- eth_port_read_smi_reg (eth_port_num, 1, &phy_reg_data);
-
- if (!(phy_reg_data & 0x20))
- return false;
-
- return true;
-}
-
-/*******************************************************************************
-* eth_port_uc_addr_set - This function Set the port Unicast address.
-*
-* DESCRIPTION:
-* This function Set the port Ethernet MAC address.
-*
-* INPUT:
-* ETH_PORT eth_port_num Port number.
-* char * p_addr Address to be set
-* ETH_QUEUE queue Rx queue number for this MAC address.
-*
-* OUTPUT:
-* Set MAC address low and high registers. also calls eth_port_uc_addr()
-* To set the unicast table with the proper information.
-*
-* RETURN:
-* N/A.
-*
-*******************************************************************************/
-static void eth_port_uc_addr_set (ETH_PORT eth_port_num,
- unsigned char *p_addr, ETH_QUEUE queue)
-{
- unsigned int mac_h;
- unsigned int mac_l;
-
- mac_l = (p_addr[4] << 8) | (p_addr[5]);
- mac_h = (p_addr[0] << 24) | (p_addr[1] << 16) |
- (p_addr[2] << 8) | (p_addr[3] << 0);
-
- MV_REG_WRITE (MV64460_ETH_MAC_ADDR_LOW (eth_port_num), mac_l);
- MV_REG_WRITE (MV64460_ETH_MAC_ADDR_HIGH (eth_port_num), mac_h);
-
- /* Accept frames of this address */
- eth_port_uc_addr (eth_port_num, p_addr[5], queue, ACCEPT_MAC_ADDR);
-
- return;
-}
-
-/*******************************************************************************
-* eth_port_uc_addr - This function Set the port unicast address table
-*
-* DESCRIPTION:
-* This function locates the proper entry in the Unicast table for the
-* specified MAC nibble and sets its properties according to function
-* parameters.
-*
-* INPUT:
-* ETH_PORT eth_port_num Port number.
-* unsigned char uc_nibble Unicast MAC Address last nibble.
-* ETH_QUEUE queue Rx queue number for this MAC address.
-* int option 0 = Add, 1 = remove address.
-*
-* OUTPUT:
-* This function add/removes MAC addresses from the port unicast address
-* table.
-*
-* RETURN:
-* true is output succeeded.
-* false if option parameter is invalid.
-*
-*******************************************************************************/
-static bool eth_port_uc_addr (ETH_PORT eth_port_num,
- unsigned char uc_nibble,
- ETH_QUEUE queue, int option)
-{
- unsigned int unicast_reg;
- unsigned int tbl_offset;
- unsigned int reg_offset;
-
- /* Locate the Unicast table entry */
- uc_nibble = (0xf & uc_nibble);
- tbl_offset = (uc_nibble / 4) * 4; /* Register offset from unicast table base */
- reg_offset = uc_nibble % 4; /* Entry offset within the above register */
-
- switch (option) {
- case REJECT_MAC_ADDR:
- /* Clear accepts frame bit at specified unicast DA table entry */
- unicast_reg =
- MV_REG_READ ((MV64460_ETH_DA_FILTER_UNICAST_TABLE_BASE
- (eth_port_num)
- + tbl_offset));
-
- unicast_reg &= (0x0E << (8 * reg_offset));
-
- MV_REG_WRITE ((MV64460_ETH_DA_FILTER_UNICAST_TABLE_BASE
- (eth_port_num)
- + tbl_offset), unicast_reg);
- break;
-
- case ACCEPT_MAC_ADDR:
- /* Set accepts frame bit at unicast DA filter table entry */
- unicast_reg =
- MV_REG_READ ((MV64460_ETH_DA_FILTER_UNICAST_TABLE_BASE
- (eth_port_num)
- + tbl_offset));
-
- unicast_reg |= ((0x01 | queue) << (8 * reg_offset));
-
- MV_REG_WRITE ((MV64460_ETH_DA_FILTER_UNICAST_TABLE_BASE
- (eth_port_num)
- + tbl_offset), unicast_reg);
-
- break;
-
- default:
- return false;
- }
- return true;
-}
-
-#if 0 /* FIXME */
-/*******************************************************************************
-* eth_port_mc_addr - Multicast address settings.
-*
-* DESCRIPTION:
-* This API controls the MV device MAC multicast support.
-* The MV device supports multicast using two tables:
-* 1) Special Multicast Table for MAC addresses of the form
-* 0x01-00-5E-00-00-XX (where XX is between 0x00 and 0x_fF).
-* The MAC DA[7:0] bits are used as a pointer to the Special Multicast
-* Table entries in the DA-Filter table.
-* In this case, the function calls eth_port_smc_addr() routine to set the
-* Special Multicast Table.
-* 2) Other Multicast Table for multicast of another type. A CRC-8bit
-* is used as an index to the Other Multicast Table entries in the
-* DA-Filter table.
-* In this case, the function calculates the CRC-8bit value and calls
-* eth_port_omc_addr() routine to set the Other Multicast Table.
-* INPUT:
-* ETH_PORT eth_port_num Port number.
-* unsigned char *p_addr Unicast MAC Address.
-* ETH_QUEUE queue Rx queue number for this MAC address.
-* int option 0 = Add, 1 = remove address.
-*
-* OUTPUT:
-* See description.
-*
-* RETURN:
-* true is output succeeded.
-* false if add_address_table_entry( ) failed.
-*
-*******************************************************************************/
-static void eth_port_mc_addr (ETH_PORT eth_port_num,
- unsigned char *p_addr,
- ETH_QUEUE queue, int option)
-{
- unsigned int mac_h;
- unsigned int mac_l;
- unsigned char crc_result = 0;
- int mac_array[48];
- int crc[8];
- int i;
-
-
- if ((p_addr[0] == 0x01) &&
- (p_addr[1] == 0x00) &&
- (p_addr[2] == 0x5E) && (p_addr[3] == 0x00) && (p_addr[4] == 0x00))
-
- eth_port_smc_addr (eth_port_num, p_addr[5], queue, option);
- else {
- /* Calculate CRC-8 out of the given address */
- mac_h = (p_addr[0] << 8) | (p_addr[1]);
- mac_l = (p_addr[2] << 24) | (p_addr[3] << 16) |
- (p_addr[4] << 8) | (p_addr[5] << 0);
-
- for (i = 0; i < 32; i++)
- mac_array[i] = (mac_l >> i) & 0x1;
- for (i = 32; i < 48; i++)
- mac_array[i] = (mac_h >> (i - 32)) & 0x1;
-
-
- crc[0] = mac_array[45] ^ mac_array[43] ^ mac_array[40] ^
- mac_array[39] ^ mac_array[35] ^ mac_array[34] ^
- mac_array[31] ^ mac_array[30] ^ mac_array[28] ^
- mac_array[23] ^ mac_array[21] ^ mac_array[19] ^
- mac_array[18] ^ mac_array[16] ^ mac_array[14] ^
- mac_array[12] ^ mac_array[8] ^ mac_array[7] ^
- mac_array[6] ^ mac_array[0];
-
- crc[1] = mac_array[46] ^ mac_array[45] ^ mac_array[44] ^
- mac_array[43] ^ mac_array[41] ^ mac_array[39] ^
- mac_array[36] ^ mac_array[34] ^ mac_array[32] ^
- mac_array[30] ^ mac_array[29] ^ mac_array[28] ^
- mac_array[24] ^ mac_array[23] ^ mac_array[22] ^
- mac_array[21] ^ mac_array[20] ^ mac_array[18] ^
- mac_array[17] ^ mac_array[16] ^ mac_array[15] ^
- mac_array[14] ^ mac_array[13] ^ mac_array[12] ^
- mac_array[9] ^ mac_array[6] ^ mac_array[1] ^
- mac_array[0];
-
- crc[2] = mac_array[47] ^ mac_array[46] ^ mac_array[44] ^
- mac_array[43] ^ mac_array[42] ^ mac_array[39] ^
- mac_array[37] ^ mac_array[34] ^ mac_array[33] ^
- mac_array[29] ^ mac_array[28] ^ mac_array[25] ^
- mac_array[24] ^ mac_array[22] ^ mac_array[17] ^
- mac_array[15] ^ mac_array[13] ^ mac_array[12] ^
- mac_array[10] ^ mac_array[8] ^ mac_array[6] ^
- mac_array[2] ^ mac_array[1] ^ mac_array[0];
-
- crc[3] = mac_array[47] ^ mac_array[45] ^ mac_array[44] ^
- mac_array[43] ^ mac_array[40] ^ mac_array[38] ^
- mac_array[35] ^ mac_array[34] ^ mac_array[30] ^
- mac_array[29] ^ mac_array[26] ^ mac_array[25] ^
- mac_array[23] ^ mac_array[18] ^ mac_array[16] ^
- mac_array[14] ^ mac_array[13] ^ mac_array[11] ^
- mac_array[9] ^ mac_array[7] ^ mac_array[3] ^
- mac_array[2] ^ mac_array[1];
-
- crc[4] = mac_array[46] ^ mac_array[45] ^ mac_array[44] ^
- mac_array[41] ^ mac_array[39] ^ mac_array[36] ^
- mac_array[35] ^ mac_array[31] ^ mac_array[30] ^
- mac_array[27] ^ mac_array[26] ^ mac_array[24] ^
- mac_array[19] ^ mac_array[17] ^ mac_array[15] ^
- mac_array[14] ^ mac_array[12] ^ mac_array[10] ^
- mac_array[8] ^ mac_array[4] ^ mac_array[3] ^
- mac_array[2];
-
- crc[5] = mac_array[47] ^ mac_array[46] ^ mac_array[45] ^
- mac_array[42] ^ mac_array[40] ^ mac_array[37] ^
- mac_array[36] ^ mac_array[32] ^ mac_array[31] ^
- mac_array[28] ^ mac_array[27] ^ mac_array[25] ^
- mac_array[20] ^ mac_array[18] ^ mac_array[16] ^
- mac_array[15] ^ mac_array[13] ^ mac_array[11] ^
- mac_array[9] ^ mac_array[5] ^ mac_array[4] ^
- mac_array[3];
-
- crc[6] = mac_array[47] ^ mac_array[46] ^ mac_array[43] ^
- mac_array[41] ^ mac_array[38] ^ mac_array[37] ^
- mac_array[33] ^ mac_array[32] ^ mac_array[29] ^
- mac_array[28] ^ mac_array[26] ^ mac_array[21] ^
- mac_array[19] ^ mac_array[17] ^ mac_array[16] ^
- mac_array[14] ^ mac_array[12] ^ mac_array[10] ^
- mac_array[6] ^ mac_array[5] ^ mac_array[4];
-
- crc[7] = mac_array[47] ^ mac_array[44] ^ mac_array[42] ^
- mac_array[39] ^ mac_array[38] ^ mac_array[34] ^
- mac_array[33] ^ mac_array[30] ^ mac_array[29] ^
- mac_array[27] ^ mac_array[22] ^ mac_array[20] ^
- mac_array[18] ^ mac_array[17] ^ mac_array[15] ^
- mac_array[13] ^ mac_array[11] ^ mac_array[7] ^
- mac_array[6] ^ mac_array[5];
-
- for (i = 0; i < 8; i++)
- crc_result = crc_result | (crc[i] << i);
-
- eth_port_omc_addr (eth_port_num, crc_result, queue, option);
- }
- return;
-}
-
-/*******************************************************************************
-* eth_port_smc_addr - Special Multicast address settings.
-*
-* DESCRIPTION:
-* This routine controls the MV device special MAC multicast support.
-* The Special Multicast Table for MAC addresses supports MAC of the form
-* 0x01-00-5E-00-00-XX (where XX is between 0x00 and 0x_fF).
-* The MAC DA[7:0] bits are used as a pointer to the Special Multicast
-* Table entries in the DA-Filter table.
-* This function set the Special Multicast Table appropriate entry
-* according to the argument given.
-*
-* INPUT:
-* ETH_PORT eth_port_num Port number.
-* unsigned char mc_byte Multicast addr last byte (MAC DA[7:0] bits).
-* ETH_QUEUE queue Rx queue number for this MAC address.
-* int option 0 = Add, 1 = remove address.
-*
-* OUTPUT:
-* See description.
-*
-* RETURN:
-* true is output succeeded.
-* false if option parameter is invalid.
-*
-*******************************************************************************/
-static bool eth_port_smc_addr (ETH_PORT eth_port_num,
- unsigned char mc_byte,
- ETH_QUEUE queue, int option)
-{
- unsigned int smc_table_reg;
- unsigned int tbl_offset;
- unsigned int reg_offset;
-
- /* Locate the SMC table entry */
- tbl_offset = (mc_byte / 4) * 4; /* Register offset from SMC table base */
- reg_offset = mc_byte % 4; /* Entry offset within the above register */
- queue &= 0x7;
-
- switch (option) {
- case REJECT_MAC_ADDR:
- /* Clear accepts frame bit at specified Special DA table entry */
- smc_table_reg =
- MV_REG_READ ((MV64460_ETH_DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE (eth_port_num) + tbl_offset));
- smc_table_reg &= (0x0E << (8 * reg_offset));
-
- MV_REG_WRITE ((MV64460_ETH_DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE (eth_port_num) + tbl_offset), smc_table_reg);
- break;
-
- case ACCEPT_MAC_ADDR:
- /* Set accepts frame bit at specified Special DA table entry */
- smc_table_reg =
- MV_REG_READ ((MV64460_ETH_DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE (eth_port_num) + tbl_offset));
- smc_table_reg |= ((0x01 | queue) << (8 * reg_offset));
-
- MV_REG_WRITE ((MV64460_ETH_DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE (eth_port_num) + tbl_offset), smc_table_reg);
- break;
-
- default:
- return false;
- }
- return true;
-}
-
-/*******************************************************************************
-* eth_port_omc_addr - Multicast address settings.
-*
-* DESCRIPTION:
-* This routine controls the MV device Other MAC multicast support.
-* The Other Multicast Table is used for multicast of another type.
-* A CRC-8bit is used as an index to the Other Multicast Table entries
-* in the DA-Filter table.
-* The function gets the CRC-8bit value from the calling routine and
-* set the Other Multicast Table appropriate entry according to the
-* CRC-8 argument given.
-*
-* INPUT:
-* ETH_PORT eth_port_num Port number.
-* unsigned char crc8 A CRC-8bit (Polynomial: x^8+x^2+x^1+1).
-* ETH_QUEUE queue Rx queue number for this MAC address.
-* int option 0 = Add, 1 = remove address.
-*
-* OUTPUT:
-* See description.
-*
-* RETURN:
-* true is output succeeded.
-* false if option parameter is invalid.
-*
-*******************************************************************************/
-static bool eth_port_omc_addr (ETH_PORT eth_port_num,
- unsigned char crc8,
- ETH_QUEUE queue, int option)
-{
- unsigned int omc_table_reg;
- unsigned int tbl_offset;
- unsigned int reg_offset;
-
- /* Locate the OMC table entry */
- tbl_offset = (crc8 / 4) * 4; /* Register offset from OMC table base */
- reg_offset = crc8 % 4; /* Entry offset within the above register */
- queue &= 0x7;
-
- switch (option) {
- case REJECT_MAC_ADDR:
- /* Clear accepts frame bit at specified Other DA table entry */
- omc_table_reg =
- MV_REG_READ ((MV64460_ETH_DA_FILTER_OTHER_MULTICAST_TABLE_BASE (eth_port_num) + tbl_offset));
- omc_table_reg &= (0x0E << (8 * reg_offset));
-
- MV_REG_WRITE ((MV64460_ETH_DA_FILTER_OTHER_MULTICAST_TABLE_BASE (eth_port_num) + tbl_offset), omc_table_reg);
- break;
-
- case ACCEPT_MAC_ADDR:
- /* Set accepts frame bit at specified Other DA table entry */
- omc_table_reg =
- MV_REG_READ ((MV64460_ETH_DA_FILTER_OTHER_MULTICAST_TABLE_BASE (eth_port_num) + tbl_offset));
- omc_table_reg |= ((0x01 | queue) << (8 * reg_offset));
-
- MV_REG_WRITE ((MV64460_ETH_DA_FILTER_OTHER_MULTICAST_TABLE_BASE (eth_port_num) + tbl_offset), omc_table_reg);
- break;
-
- default:
- return false;
- }
- return true;
-}
-#endif
-
-/*******************************************************************************
-* eth_port_init_mac_tables - Clear all entrance in the UC, SMC and OMC tables
-*
-* DESCRIPTION:
-* Go through all the DA filter tables (Unicast, Special Multicast & Other
-* Multicast) and set each entry to 0.
-*
-* INPUT:
-* ETH_PORT eth_port_num Ethernet Port number. See ETH_PORT enum.
-*
-* OUTPUT:
-* Multicast and Unicast packets are rejected.
-*
-* RETURN:
-* None.
-*
-*******************************************************************************/
-static void eth_port_init_mac_tables (ETH_PORT eth_port_num)
-{
- int table_index;
-
- /* Clear DA filter unicast table (Ex_dFUT) */
- for (table_index = 0; table_index <= 0xC; table_index += 4)
- MV_REG_WRITE ((MV64460_ETH_DA_FILTER_UNICAST_TABLE_BASE
- (eth_port_num) + table_index), 0);
-
- for (table_index = 0; table_index <= 0xFC; table_index += 4) {
- /* Clear DA filter special multicast table (Ex_dFSMT) */
- MV_REG_WRITE ((MV64460_ETH_DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE (eth_port_num) + table_index), 0);
- /* Clear DA filter other multicast table (Ex_dFOMT) */
- MV_REG_WRITE ((MV64460_ETH_DA_FILTER_OTHER_MULTICAST_TABLE_BASE (eth_port_num) + table_index), 0);
- }
-}
-
-/*******************************************************************************
-* eth_clear_mib_counters - Clear all MIB counters
-*
-* DESCRIPTION:
-* This function clears all MIB counters of a specific ethernet port.
-* A read from the MIB counter will reset the counter.
-*
-* INPUT:
-* ETH_PORT eth_port_num Ethernet Port number. See ETH_PORT enum.
-*
-* OUTPUT:
-* After reading all MIB counters, the counters resets.
-*
-* RETURN:
-* MIB counter value.
-*
-*******************************************************************************/
-static void eth_clear_mib_counters (ETH_PORT eth_port_num)
-{
- int i;
- unsigned int dummy;
-
- /* Perform dummy reads from MIB counters */
- for (i = ETH_MIB_GOOD_OCTETS_RECEIVED_LOW; i < ETH_MIB_LATE_COLLISION;
- i += 4)
- dummy = MV_REG_READ ((MV64460_ETH_MIB_COUNTERS_BASE
- (eth_port_num) + i));
-
- return;
-}
-
-/*******************************************************************************
-* eth_read_mib_counter - Read a MIB counter
-*
-* DESCRIPTION:
-* This function reads a MIB counter of a specific ethernet port.
-* NOTE - If read from ETH_MIB_GOOD_OCTETS_RECEIVED_LOW, then the
-* following read must be from ETH_MIB_GOOD_OCTETS_RECEIVED_HIGH
-* register. The same applies for ETH_MIB_GOOD_OCTETS_SENT_LOW and
-* ETH_MIB_GOOD_OCTETS_SENT_HIGH
-*
-* INPUT:
-* ETH_PORT eth_port_num Ethernet Port number. See ETH_PORT enum.
-* unsigned int mib_offset MIB counter offset (use ETH_MIB_... macros).
-*
-* OUTPUT:
-* After reading the MIB counter, the counter resets.
-*
-* RETURN:
-* MIB counter value.
-*
-*******************************************************************************/
-unsigned int eth_read_mib_counter (ETH_PORT eth_port_num,
- unsigned int mib_offset)
-{
- return (MV_REG_READ (MV64460_ETH_MIB_COUNTERS_BASE (eth_port_num)
- + mib_offset));
-}
-
-/*******************************************************************************
-* ethernet_phy_set - Set the ethernet port PHY address.
-*
-* DESCRIPTION:
-* This routine set the ethernet port PHY address according to given
-* parameter.
-*
-* INPUT:
-* ETH_PORT eth_port_num Ethernet Port number. See ETH_PORT enum.
-*
-* OUTPUT:
-* Set PHY Address Register with given PHY address parameter.
-*
-* RETURN:
-* None.
-*
-*******************************************************************************/
-static void ethernet_phy_set (ETH_PORT eth_port_num, int phy_addr)
-{
- unsigned int reg_data;
-
- reg_data = MV_REG_READ (MV64460_ETH_PHY_ADDR_REG);
-
- reg_data &= ~(0x1F << (5 * eth_port_num));
- reg_data |= (phy_addr << (5 * eth_port_num));
-
- MV_REG_WRITE (MV64460_ETH_PHY_ADDR_REG, reg_data);
-
- return;
-}
-
-/*******************************************************************************
- * ethernet_phy_get - Get the ethernet port PHY address.
- *
- * DESCRIPTION:
- * This routine returns the given ethernet port PHY address.
- *
- * INPUT:
- * ETH_PORT eth_port_num Ethernet Port number. See ETH_PORT enum.
- *
- * OUTPUT:
- * None.
- *
- * RETURN:
- * PHY address.
- *
- *******************************************************************************/
-static int ethernet_phy_get (ETH_PORT eth_port_num)
-{
- unsigned int reg_data;
-
- reg_data = MV_REG_READ (MV64460_ETH_PHY_ADDR_REG);
-
- return ((reg_data >> (5 * eth_port_num)) & 0x1f);
-}
-
-/*******************************************************************************
- * ethernet_phy_reset - Reset Ethernet port PHY.
- *
- * DESCRIPTION:
- * This routine utilize the SMI interface to reset the ethernet port PHY.
- * The routine waits until the link is up again or link up is timeout.
- *
- * INPUT:
- * ETH_PORT eth_port_num Ethernet Port number. See ETH_PORT enum.
- *
- * OUTPUT:
- * The ethernet port PHY renew its link.
- *
- * RETURN:
- * None.
- *
-*******************************************************************************/
-static bool ethernet_phy_reset (ETH_PORT eth_port_num)
-{
- unsigned int time_out = 50;
- unsigned int phy_reg_data;
-
- /* Reset the PHY */
- eth_port_read_smi_reg (eth_port_num, 0, &phy_reg_data);
- phy_reg_data |= 0x8000; /* Set bit 15 to reset the PHY */
- eth_port_write_smi_reg (eth_port_num, 0, phy_reg_data);
-
- /* Poll on the PHY LINK */
- do {
- eth_port_read_smi_reg (eth_port_num, 1, &phy_reg_data);
-
- if (time_out-- == 0)
- return false;
- }
- while (!(phy_reg_data & 0x20));
-
- return true;
-}
-
-/*******************************************************************************
- * eth_port_reset - Reset Ethernet port
- *
- * DESCRIPTION:
- * This routine resets the chip by aborting any SDMA engine activity and
- * clearing the MIB counters. The Receiver and the Transmit unit are in
- * idle state after this command is performed and the port is disabled.
- *
- * INPUT:
- * ETH_PORT eth_port_num Ethernet Port number. See ETH_PORT enum.
- *
- * OUTPUT:
- * Channel activity is halted.
- *
- * RETURN:
- * None.
- *
- *******************************************************************************/
-static void eth_port_reset (ETH_PORT eth_port_num)
-{
- unsigned int reg_data;
-
- /* Stop Tx port activity. Check port Tx activity. */
- reg_data =
- MV_REG_READ (MV64460_ETH_TRANSMIT_QUEUE_COMMAND_REG
- (eth_port_num));
-
- if (reg_data & 0xFF) {
- /* Issue stop command for active channels only */
- MV_REG_WRITE (MV64460_ETH_TRANSMIT_QUEUE_COMMAND_REG
- (eth_port_num), (reg_data << 8));
-
- /* Wait for all Tx activity to terminate. */
- do {
- /* Check port cause register that all Tx queues are stopped */
- reg_data =
- MV_REG_READ
- (MV64460_ETH_TRANSMIT_QUEUE_COMMAND_REG
- (eth_port_num));
- }
- while (reg_data & 0xFF);
- }
-
- /* Stop Rx port activity. Check port Rx activity. */
- reg_data =
- MV_REG_READ (MV64460_ETH_RECEIVE_QUEUE_COMMAND_REG
- (eth_port_num));
-
- if (reg_data & 0xFF) {
- /* Issue stop command for active channels only */
- MV_REG_WRITE (MV64460_ETH_RECEIVE_QUEUE_COMMAND_REG
- (eth_port_num), (reg_data << 8));
-
- /* Wait for all Rx activity to terminate. */
- do {
- /* Check port cause register that all Rx queues are stopped */
- reg_data =
- MV_REG_READ
- (MV64460_ETH_RECEIVE_QUEUE_COMMAND_REG
- (eth_port_num));
- }
- while (reg_data & 0xFF);
- }
-
-
- /* Clear all MIB counters */
- eth_clear_mib_counters (eth_port_num);
-
- /* Reset the Enable bit in the Configuration Register */
- reg_data =
- MV_REG_READ (MV64460_ETH_PORT_SERIAL_CONTROL_REG
- (eth_port_num));
- reg_data &= ~ETH_SERIAL_PORT_ENABLE;
- MV_REG_WRITE (MV64460_ETH_PORT_SERIAL_CONTROL_REG (eth_port_num),
- reg_data);
-
- return;
-}
-
-#if 0 /* Not needed here */
-/*******************************************************************************
- * ethernet_set_config_reg - Set specified bits in configuration register.
- *
- * DESCRIPTION:
- * This function sets specified bits in the given ethernet
- * configuration register.
- *
- * INPUT:
- * ETH_PORT eth_port_num Ethernet Port number. See ETH_PORT enum.
- * unsigned int value 32 bit value.
- *
- * OUTPUT:
- * The set bits in the value parameter are set in the configuration
- * register.
- *
- * RETURN:
- * None.
- *
- *******************************************************************************/
-static void ethernet_set_config_reg (ETH_PORT eth_port_num,
- unsigned int value)
-{
- unsigned int eth_config_reg;
-
- eth_config_reg =
- MV_REG_READ (MV64460_ETH_PORT_CONFIG_REG (eth_port_num));
- eth_config_reg |= value;
- MV_REG_WRITE (MV64460_ETH_PORT_CONFIG_REG (eth_port_num),
- eth_config_reg);
-
- return;
-}
-#endif
-
-#if 0 /* FIXME */
-/*******************************************************************************
- * ethernet_reset_config_reg - Reset specified bits in configuration register.
- *
- * DESCRIPTION:
- * This function resets specified bits in the given Ethernet
- * configuration register.
- *
- * INPUT:
- * ETH_PORT eth_port_num Ethernet Port number. See ETH_PORT enum.
- * unsigned int value 32 bit value.
- *
- * OUTPUT:
- * The set bits in the value parameter are reset in the configuration
- * register.
- *
- * RETURN:
- * None.
- *
- *******************************************************************************/
-static void ethernet_reset_config_reg (ETH_PORT eth_port_num,
- unsigned int value)
-{
- unsigned int eth_config_reg;
-
- eth_config_reg = MV_REG_READ (MV64460_ETH_PORT_CONFIG_EXTEND_REG
- (eth_port_num));
- eth_config_reg &= ~value;
- MV_REG_WRITE (MV64460_ETH_PORT_CONFIG_EXTEND_REG (eth_port_num),
- eth_config_reg);
-
- return;
-}
-#endif
-
-#if 0 /* Not needed here */
-/*******************************************************************************
- * ethernet_get_config_reg - Get the port configuration register
- *
- * DESCRIPTION:
- * This function returns the configuration register value of the given
- * ethernet port.
- *
- * INPUT:
- * ETH_PORT eth_port_num Ethernet Port number. See ETH_PORT enum.
- *
- * OUTPUT:
- * None.
- *
- * RETURN:
- * Port configuration register value.
- *
- *******************************************************************************/
-static unsigned int ethernet_get_config_reg (ETH_PORT eth_port_num)
-{
- unsigned int eth_config_reg;
-
- eth_config_reg = MV_REG_READ (MV64460_ETH_PORT_CONFIG_EXTEND_REG
- (eth_port_num));
- return eth_config_reg;
-}
-
-#endif
-
-/*******************************************************************************
- * eth_port_read_smi_reg - Read PHY registers
- *
- * DESCRIPTION:
- * This routine utilize the SMI interface to interact with the PHY in
- * order to perform PHY register read.
- *
- * INPUT:
- * ETH_PORT eth_port_num Ethernet Port number. See ETH_PORT enum.
- * unsigned int phy_reg PHY register address offset.
- * unsigned int *value Register value buffer.
- *
- * OUTPUT:
- * Write the value of a specified PHY register into given buffer.
- *
- * RETURN:
- * false if the PHY is busy or read data is not in valid state.
- * true otherwise.
- *
- *******************************************************************************/
-static bool eth_port_read_smi_reg (ETH_PORT eth_port_num,
- unsigned int phy_reg, unsigned int *value)
-{
- unsigned int reg_value;
- unsigned int time_out = PHY_BUSY_TIMEOUT;
- int phy_addr;
-
- phy_addr = ethernet_phy_get (eth_port_num);
-/* printf(" Phy-Port %d has addess %d \n",eth_port_num, phy_addr );*/
-
- /* first check that it is not busy */
- do {
- reg_value = MV_REG_READ (MV64460_ETH_SMI_REG);
- if (time_out-- == 0) {
- return false;
- }
- }
- while (reg_value & ETH_SMI_BUSY);
-
- /* not busy */
-
- MV_REG_WRITE (MV64460_ETH_SMI_REG,
- (phy_addr << 16) | (phy_reg << 21) |
- ETH_SMI_OPCODE_READ);
-
- time_out = PHY_BUSY_TIMEOUT; /* initialize the time out var again */
-
- do {
- reg_value = MV_REG_READ (MV64460_ETH_SMI_REG);
- if (time_out-- == 0) {
- return false;
- }
- }
- while ((reg_value & ETH_SMI_READ_VALID) != ETH_SMI_READ_VALID); /* Bit set equ operation done */
-
- /* Wait for the data to update in the SMI register */
-#define PHY_UPDATE_TIMEOUT 10000
- for (time_out = 0; time_out < PHY_UPDATE_TIMEOUT; time_out++);
-
- reg_value = MV_REG_READ (MV64460_ETH_SMI_REG);
-
- *value = reg_value & 0xffff;
-
- return true;
-}
-
-/*******************************************************************************
- * eth_port_write_smi_reg - Write to PHY registers
- *
- * DESCRIPTION:
- * This routine utilize the SMI interface to interact with the PHY in
- * order to perform writes to PHY registers.
- *
- * INPUT:
- * ETH_PORT eth_port_num Ethernet Port number. See ETH_PORT enum.
- * unsigned int phy_reg PHY register address offset.
- * unsigned int value Register value.
- *
- * OUTPUT:
- * Write the given value to the specified PHY register.
- *
- * RETURN:
- * false if the PHY is busy.
- * true otherwise.
- *
- *******************************************************************************/
-static bool eth_port_write_smi_reg (ETH_PORT eth_port_num,
- unsigned int phy_reg, unsigned int value)
-{
- unsigned int reg_value;
- unsigned int time_out = PHY_BUSY_TIMEOUT;
- int phy_addr;
-
- phy_addr = ethernet_phy_get (eth_port_num);
-
- /* first check that it is not busy */
- do {
- reg_value = MV_REG_READ (MV64460_ETH_SMI_REG);
- if (time_out-- == 0) {
- return false;
- }
- }
- while (reg_value & ETH_SMI_BUSY);
-
- /* not busy */
- MV_REG_WRITE (MV64460_ETH_SMI_REG,
- (phy_addr << 16) | (phy_reg << 21) |
- ETH_SMI_OPCODE_WRITE | (value & 0xffff));
- return true;
-}
-
-/*******************************************************************************
- * eth_set_access_control - Config address decode parameters for Ethernet unit
- *
- * DESCRIPTION:
- * This function configures the address decode parameters for the Gigabit
- * Ethernet Controller according the given parameters struct.
- *
- * INPUT:
- * ETH_PORT eth_port_num Ethernet Port number. See ETH_PORT enum.
- * ETH_WIN_PARAM *param Address decode parameter struct.
- *
- * OUTPUT:
- * An access window is opened using the given access parameters.
- *
- * RETURN:
- * None.
- *
- *******************************************************************************/
-static void eth_set_access_control (ETH_PORT eth_port_num,
- ETH_WIN_PARAM * param)
-{
- unsigned int access_prot_reg;
-
- /* Set access control register */
- access_prot_reg = MV_REG_READ (MV64460_ETH_ACCESS_PROTECTION_REG
- (eth_port_num));
- access_prot_reg &= (~(3 << (param->win * 2))); /* clear window permission */
- access_prot_reg |= (param->access_ctrl << (param->win * 2));
- MV_REG_WRITE (MV64460_ETH_ACCESS_PROTECTION_REG (eth_port_num),
- access_prot_reg);
-
- /* Set window Size reg (SR) */
- MV_REG_WRITE ((MV64460_ETH_SIZE_REG_0 +
- (ETH_SIZE_REG_GAP * param->win)),
- (((param->size / 0x10000) - 1) << 16));
-
- /* Set window Base address reg (BA) */
- MV_REG_WRITE ((MV64460_ETH_BAR_0 + (ETH_BAR_GAP * param->win)),
- (param->target | param->attributes | param->base_addr));
- /* High address remap reg (HARR) */
- if (param->win < 4)
- MV_REG_WRITE ((MV64460_ETH_HIGH_ADDR_REMAP_REG_0 +
- (ETH_HIGH_ADDR_REMAP_REG_GAP * param->win)),
- param->high_addr);
-
- /* Base address enable reg (BARER) */
- if (param->enable == 1)
- MV_RESET_REG_BITS (MV64460_ETH_BASE_ADDR_ENABLE_REG,
- (1 << param->win));
- else
- MV_SET_REG_BITS (MV64460_ETH_BASE_ADDR_ENABLE_REG,
- (1 << param->win));
-}
-
-/*******************************************************************************
- * ether_init_rx_desc_ring - Curve a Rx chain desc list and buffer in memory.
- *
- * DESCRIPTION:
- * This function prepares a Rx chained list of descriptors and packet
- * buffers in a form of a ring. The routine must be called after port
- * initialization routine and before port start routine.
- * The Ethernet SDMA engine uses CPU bus addresses to access the various
- * devices in the system (i.e. DRAM). This function uses the ethernet
- * struct 'virtual to physical' routine (set by the user) to set the ring
- * with physical addresses.
- *
- * INPUT:
- * ETH_PORT_INFO *p_eth_port_ctrl Ethernet Port Control srtuct.
- * ETH_QUEUE rx_queue Number of Rx queue.
- * int rx_desc_num Number of Rx descriptors
- * int rx_buff_size Size of Rx buffer
- * unsigned int rx_desc_base_addr Rx descriptors memory area base addr.
- * unsigned int rx_buff_base_addr Rx buffer memory area base addr.
- *
- * OUTPUT:
- * The routine updates the Ethernet port control struct with information
- * regarding the Rx descriptors and buffers.
- *
- * RETURN:
- * false if the given descriptors memory area is not aligned according to
- * Ethernet SDMA specifications.
- * true otherwise.
- *
- *******************************************************************************/
-static bool ether_init_rx_desc_ring (ETH_PORT_INFO * p_eth_port_ctrl,
- ETH_QUEUE rx_queue,
- int rx_desc_num,
- int rx_buff_size,
- unsigned int rx_desc_base_addr,
- unsigned int rx_buff_base_addr)
-{
- ETH_RX_DESC *p_rx_desc;
- ETH_RX_DESC *p_rx_prev_desc; /* pointer to link with the last descriptor */
- unsigned int buffer_addr;
- int ix; /* a counter */
-
-
- p_rx_desc = (ETH_RX_DESC *) rx_desc_base_addr;
- p_rx_prev_desc = p_rx_desc;
- buffer_addr = rx_buff_base_addr;
-
- /* Rx desc Must be 4LW aligned (i.e. Descriptor_Address[3:0]=0000). */
- if (rx_buff_base_addr & 0xF)
- return false;
-
- /* Rx buffers are limited to 64K bytes and Minimum size is 8 bytes */
- if ((rx_buff_size < 8) || (rx_buff_size > RX_BUFFER_MAX_SIZE))
- return false;
-
- /* Rx buffers must be 64-bit aligned. */
- if ((rx_buff_base_addr + rx_buff_size) & 0x7)
- return false;
-
- /* initialize the Rx descriptors ring */
- for (ix = 0; ix < rx_desc_num; ix++) {
- p_rx_desc->buf_size = rx_buff_size;
- p_rx_desc->byte_cnt = 0x0000;
- p_rx_desc->cmd_sts =
- ETH_BUFFER_OWNED_BY_DMA | ETH_RX_ENABLE_INTERRUPT;
- p_rx_desc->next_desc_ptr =
- ((unsigned int) p_rx_desc) + RX_DESC_ALIGNED_SIZE;
- p_rx_desc->buf_ptr = buffer_addr;
- p_rx_desc->return_info = 0x00000000;
- D_CACHE_FLUSH_LINE (p_rx_desc, 0);
- buffer_addr += rx_buff_size;
- p_rx_prev_desc = p_rx_desc;
- p_rx_desc = (ETH_RX_DESC *)
- ((unsigned int) p_rx_desc + RX_DESC_ALIGNED_SIZE);
- }
-
- /* Closing Rx descriptors ring */
- p_rx_prev_desc->next_desc_ptr = (rx_desc_base_addr);
- D_CACHE_FLUSH_LINE (p_rx_prev_desc, 0);
-
- /* Save Rx desc pointer to driver struct. */
- CURR_RFD_SET ((ETH_RX_DESC *) rx_desc_base_addr, rx_queue);
- USED_RFD_SET ((ETH_RX_DESC *) rx_desc_base_addr, rx_queue);
-
- p_eth_port_ctrl->p_rx_desc_area_base[rx_queue] =
- (ETH_RX_DESC *) rx_desc_base_addr;
- p_eth_port_ctrl->rx_desc_area_size[rx_queue] =
- rx_desc_num * RX_DESC_ALIGNED_SIZE;
-
- p_eth_port_ctrl->port_rx_queue_command |= (1 << rx_queue);
-
- return true;
-}
-
-/*******************************************************************************
- * ether_init_tx_desc_ring - Curve a Tx chain desc list and buffer in memory.
- *
- * DESCRIPTION:
- * This function prepares a Tx chained list of descriptors and packet
- * buffers in a form of a ring. The routine must be called after port
- * initialization routine and before port start routine.
- * The Ethernet SDMA engine uses CPU bus addresses to access the various
- * devices in the system (i.e. DRAM). This function uses the ethernet
- * struct 'virtual to physical' routine (set by the user) to set the ring
- * with physical addresses.
- *
- * INPUT:
- * ETH_PORT_INFO *p_eth_port_ctrl Ethernet Port Control srtuct.
- * ETH_QUEUE tx_queue Number of Tx queue.
- * int tx_desc_num Number of Tx descriptors
- * int tx_buff_size Size of Tx buffer
- * unsigned int tx_desc_base_addr Tx descriptors memory area base addr.
- * unsigned int tx_buff_base_addr Tx buffer memory area base addr.
- *
- * OUTPUT:
- * The routine updates the Ethernet port control struct with information
- * regarding the Tx descriptors and buffers.
- *
- * RETURN:
- * false if the given descriptors memory area is not aligned according to
- * Ethernet SDMA specifications.
- * true otherwise.
- *
- *******************************************************************************/
-static bool ether_init_tx_desc_ring (ETH_PORT_INFO * p_eth_port_ctrl,
- ETH_QUEUE tx_queue,
- int tx_desc_num,
- int tx_buff_size,
- unsigned int tx_desc_base_addr,
- unsigned int tx_buff_base_addr)
-{
-
- ETH_TX_DESC *p_tx_desc;
- ETH_TX_DESC *p_tx_prev_desc;
- unsigned int buffer_addr;
- int ix; /* a counter */
-
-
- /* save the first desc pointer to link with the last descriptor */
- p_tx_desc = (ETH_TX_DESC *) tx_desc_base_addr;
- p_tx_prev_desc = p_tx_desc;
- buffer_addr = tx_buff_base_addr;
-
- /* Tx desc Must be 4LW aligned (i.e. Descriptor_Address[3:0]=0000). */
- if (tx_buff_base_addr & 0xF)
- return false;
-
- /* Tx buffers are limited to 64K bytes and Minimum size is 8 bytes */
- if ((tx_buff_size > TX_BUFFER_MAX_SIZE)
- || (tx_buff_size < TX_BUFFER_MIN_SIZE))
- return false;
-
- /* Initialize the Tx descriptors ring */
- for (ix = 0; ix < tx_desc_num; ix++) {
- p_tx_desc->byte_cnt = 0x0000;
- p_tx_desc->l4i_chk = 0x0000;
- p_tx_desc->cmd_sts = 0x00000000;
- p_tx_desc->next_desc_ptr =
- ((unsigned int) p_tx_desc) + TX_DESC_ALIGNED_SIZE;
-
- p_tx_desc->buf_ptr = buffer_addr;
- p_tx_desc->return_info = 0x00000000;
- D_CACHE_FLUSH_LINE (p_tx_desc, 0);
- buffer_addr += tx_buff_size;
- p_tx_prev_desc = p_tx_desc;
- p_tx_desc = (ETH_TX_DESC *)
- ((unsigned int) p_tx_desc + TX_DESC_ALIGNED_SIZE);
-
- }
- /* Closing Tx descriptors ring */
- p_tx_prev_desc->next_desc_ptr = tx_desc_base_addr;
- D_CACHE_FLUSH_LINE (p_tx_prev_desc, 0);
- /* Set Tx desc pointer in driver struct. */
- CURR_TFD_SET ((ETH_TX_DESC *) tx_desc_base_addr, tx_queue);
- USED_TFD_SET ((ETH_TX_DESC *) tx_desc_base_addr, tx_queue);
-
- /* Init Tx ring base and size parameters */
- p_eth_port_ctrl->p_tx_desc_area_base[tx_queue] =
- (ETH_TX_DESC *) tx_desc_base_addr;
- p_eth_port_ctrl->tx_desc_area_size[tx_queue] =
- (tx_desc_num * TX_DESC_ALIGNED_SIZE);
-
- /* Add the queue to the list of Tx queues of this port */
- p_eth_port_ctrl->port_tx_queue_command |= (1 << tx_queue);
-
- return true;
-}
-
-/*******************************************************************************
- * eth_port_send - Send an Ethernet packet
- *
- * DESCRIPTION:
- * This routine send a given packet described by p_pktinfo parameter. It
- * supports transmitting of a packet spaned over multiple buffers. The
- * routine updates 'curr' and 'first' indexes according to the packet
- * segment passed to the routine. In case the packet segment is first,
- * the 'first' index is update. In any case, the 'curr' index is updated.
- * If the routine get into Tx resource error it assigns 'curr' index as
- * 'first'. This way the function can abort Tx process of multiple
- * descriptors per packet.
- *
- * INPUT:
- * ETH_PORT_INFO *p_eth_port_ctrl Ethernet Port Control srtuct.
- * ETH_QUEUE tx_queue Number of Tx queue.
- * PKT_INFO *p_pkt_info User packet buffer.
- *
- * OUTPUT:
- * Tx ring 'curr' and 'first' indexes are updated.
- *
- * RETURN:
- * ETH_QUEUE_FULL in case of Tx resource error.
- * ETH_ERROR in case the routine can not access Tx desc ring.
- * ETH_QUEUE_LAST_RESOURCE if the routine uses the last Tx resource.
- * ETH_OK otherwise.
- *
- *******************************************************************************/
-static ETH_FUNC_RET_STATUS eth_port_send (ETH_PORT_INFO * p_eth_port_ctrl,
- ETH_QUEUE tx_queue,
- PKT_INFO * p_pkt_info)
-{
- volatile ETH_TX_DESC *p_tx_desc_first;
- volatile ETH_TX_DESC *p_tx_desc_curr;
- volatile ETH_TX_DESC *p_tx_next_desc_curr;
- volatile ETH_TX_DESC *p_tx_desc_used;
- unsigned int command_status;
-
- /* Do not process Tx ring in case of Tx ring resource error */
- if (p_eth_port_ctrl->tx_resource_err[tx_queue] == true)
- return ETH_QUEUE_FULL;
-
- /* Get the Tx Desc ring indexes */
- CURR_TFD_GET (p_tx_desc_curr, tx_queue);
- USED_TFD_GET (p_tx_desc_used, tx_queue);
-
- if (p_tx_desc_curr == NULL)
- return ETH_ERROR;
-
- /* The following parameters are used to save readings from memory */
- p_tx_next_desc_curr = TX_NEXT_DESC_PTR (p_tx_desc_curr, tx_queue);
- command_status = p_pkt_info->cmd_sts | ETH_ZERO_PADDING | ETH_GEN_CRC;
-
- if (command_status & (ETH_TX_FIRST_DESC)) {
- /* Update first desc */
- FIRST_TFD_SET (p_tx_desc_curr, tx_queue);
- p_tx_desc_first = p_tx_desc_curr;
- } else {
- FIRST_TFD_GET (p_tx_desc_first, tx_queue);
- command_status |= ETH_BUFFER_OWNED_BY_DMA;
- }
-
- /* Buffers with a payload smaller than 8 bytes must be aligned to 64-bit */
- /* boundary. We use the memory allocated for Tx descriptor. This memory */
- /* located in TX_BUF_OFFSET_IN_DESC offset within the Tx descriptor. */
- if (p_pkt_info->byte_cnt <= 8) {
- printf ("You have failed in the < 8 bytes errata - fixme\n"); /* RABEEH - TBD */
- return ETH_ERROR;
-
- p_tx_desc_curr->buf_ptr =
- (unsigned int) p_tx_desc_curr + TX_BUF_OFFSET_IN_DESC;
- eth_b_copy (p_pkt_info->buf_ptr, p_tx_desc_curr->buf_ptr,
- p_pkt_info->byte_cnt);
- } else
- p_tx_desc_curr->buf_ptr = p_pkt_info->buf_ptr;
-
- p_tx_desc_curr->byte_cnt = p_pkt_info->byte_cnt;
- p_tx_desc_curr->return_info = p_pkt_info->return_info;
-
- if (p_pkt_info->cmd_sts & (ETH_TX_LAST_DESC)) {
- /* Set last desc with DMA ownership and interrupt enable. */
- p_tx_desc_curr->cmd_sts = command_status |
- ETH_BUFFER_OWNED_BY_DMA | ETH_TX_ENABLE_INTERRUPT;
-
- if (p_tx_desc_curr != p_tx_desc_first)
- p_tx_desc_first->cmd_sts |= ETH_BUFFER_OWNED_BY_DMA;
-
- /* Flush CPU pipe */
-
- D_CACHE_FLUSH_LINE ((unsigned int) p_tx_desc_curr, 0);
- D_CACHE_FLUSH_LINE ((unsigned int) p_tx_desc_first, 0);
- CPU_PIPE_FLUSH;
-
- /* Apply send command */
- ETH_ENABLE_TX_QUEUE (tx_queue, p_eth_port_ctrl->port_num);
-
- /* Finish Tx packet. Update first desc in case of Tx resource error */
- p_tx_desc_first = p_tx_next_desc_curr;
- FIRST_TFD_SET (p_tx_desc_first, tx_queue);
-
- } else {
- p_tx_desc_curr->cmd_sts = command_status;
- D_CACHE_FLUSH_LINE ((unsigned int) p_tx_desc_curr, 0);
- }
-
- /* Check for ring index overlap in the Tx desc ring */
- if (p_tx_next_desc_curr == p_tx_desc_used) {
- /* Update the current descriptor */
- CURR_TFD_SET (p_tx_desc_first, tx_queue);
-
- p_eth_port_ctrl->tx_resource_err[tx_queue] = true;
- return ETH_QUEUE_LAST_RESOURCE;
- } else {
- /* Update the current descriptor */
- CURR_TFD_SET (p_tx_next_desc_curr, tx_queue);
- return ETH_OK;
- }
-}
-
-/*******************************************************************************
- * eth_tx_return_desc - Free all used Tx descriptors
- *
- * DESCRIPTION:
- * This routine returns the transmitted packet information to the caller.
- * It uses the 'first' index to support Tx desc return in case a transmit
- * of a packet spanned over multiple buffer still in process.
- * In case the Tx queue was in "resource error" condition, where there are
- * no available Tx resources, the function resets the resource error flag.
- *
- * INPUT:
- * ETH_PORT_INFO *p_eth_port_ctrl Ethernet Port Control srtuct.
- * ETH_QUEUE tx_queue Number of Tx queue.
- * PKT_INFO *p_pkt_info User packet buffer.
- *
- * OUTPUT:
- * Tx ring 'first' and 'used' indexes are updated.
- *
- * RETURN:
- * ETH_ERROR in case the routine can not access Tx desc ring.
- * ETH_RETRY in case there is transmission in process.
- * ETH_END_OF_JOB if the routine has nothing to release.
- * ETH_OK otherwise.
- *
- *******************************************************************************/
-static ETH_FUNC_RET_STATUS eth_tx_return_desc (ETH_PORT_INFO *
- p_eth_port_ctrl,
- ETH_QUEUE tx_queue,
- PKT_INFO * p_pkt_info)
-{
- volatile ETH_TX_DESC *p_tx_desc_used = NULL;
- volatile ETH_TX_DESC *p_tx_desc_first = NULL;
- unsigned int command_status;
-
-
- /* Get the Tx Desc ring indexes */
- USED_TFD_GET (p_tx_desc_used, tx_queue);
- FIRST_TFD_GET (p_tx_desc_first, tx_queue);
-
-
- /* Sanity check */
- if (p_tx_desc_used == NULL)
- return ETH_ERROR;
-
- command_status = p_tx_desc_used->cmd_sts;
-
- /* Still transmitting... */
- if (command_status & (ETH_BUFFER_OWNED_BY_DMA)) {
- D_CACHE_FLUSH_LINE ((unsigned int) p_tx_desc_used, 0);
- return ETH_RETRY;
- }
-
- /* Stop release. About to overlap the current available Tx descriptor */
- if ((p_tx_desc_used == p_tx_desc_first) &&
- (p_eth_port_ctrl->tx_resource_err[tx_queue] == false)) {
- D_CACHE_FLUSH_LINE ((unsigned int) p_tx_desc_used, 0);
- return ETH_END_OF_JOB;
- }
-
- /* Pass the packet information to the caller */
- p_pkt_info->cmd_sts = command_status;
- p_pkt_info->return_info = p_tx_desc_used->return_info;
- p_tx_desc_used->return_info = 0;
-
- /* Update the next descriptor to release. */
- USED_TFD_SET (TX_NEXT_DESC_PTR (p_tx_desc_used, tx_queue), tx_queue);
-
- /* Any Tx return cancels the Tx resource error status */
- if (p_eth_port_ctrl->tx_resource_err[tx_queue] == true)
- p_eth_port_ctrl->tx_resource_err[tx_queue] = false;
-
- D_CACHE_FLUSH_LINE ((unsigned int) p_tx_desc_used, 0);
-
- return ETH_OK;
-
-}
-
-/*******************************************************************************
- * eth_port_receive - Get received information from Rx ring.
- *
- * DESCRIPTION:
- * This routine returns the received data to the caller. There is no
- * data copying during routine operation. All information is returned
- * using pointer to packet information struct passed from the caller.
- * If the routine exhausts Rx ring resources then the resource error flag
- * is set.
- *
- * INPUT:
- * ETH_PORT_INFO *p_eth_port_ctrl Ethernet Port Control srtuct.
- * ETH_QUEUE rx_queue Number of Rx queue.
- * PKT_INFO *p_pkt_info User packet buffer.
- *
- * OUTPUT:
- * Rx ring current and used indexes are updated.
- *
- * RETURN:
- * ETH_ERROR in case the routine can not access Rx desc ring.
- * ETH_QUEUE_FULL if Rx ring resources are exhausted.
- * ETH_END_OF_JOB if there is no received data.
- * ETH_OK otherwise.
- *
- *******************************************************************************/
-static ETH_FUNC_RET_STATUS eth_port_receive (ETH_PORT_INFO * p_eth_port_ctrl,
- ETH_QUEUE rx_queue,
- PKT_INFO * p_pkt_info)
-{
- volatile ETH_RX_DESC *p_rx_curr_desc;
- volatile ETH_RX_DESC *p_rx_next_curr_desc;
- volatile ETH_RX_DESC *p_rx_used_desc;
- unsigned int command_status;
-
- /* Do not process Rx ring in case of Rx ring resource error */
- if (p_eth_port_ctrl->rx_resource_err[rx_queue] == true) {
- printf ("\nRx Queue is full ...\n");
- return ETH_QUEUE_FULL;
- }
-
- /* Get the Rx Desc ring 'curr and 'used' indexes */
- CURR_RFD_GET (p_rx_curr_desc, rx_queue);
- USED_RFD_GET (p_rx_used_desc, rx_queue);
-
- /* Sanity check */
- if (p_rx_curr_desc == NULL)
- return ETH_ERROR;
-
- /* The following parameters are used to save readings from memory */
- p_rx_next_curr_desc = RX_NEXT_DESC_PTR (p_rx_curr_desc, rx_queue);
- command_status = p_rx_curr_desc->cmd_sts;
-
- /* Nothing to receive... */
- if (command_status & (ETH_BUFFER_OWNED_BY_DMA)) {
-/* DP(printf("Rx: command_status: %08x\n", command_status)); */
- D_CACHE_FLUSH_LINE ((unsigned int) p_rx_curr_desc, 0);
-/* DP(printf("\nETH_END_OF_JOB ...\n"));*/
- return ETH_END_OF_JOB;
- }
-
- p_pkt_info->byte_cnt = (p_rx_curr_desc->byte_cnt) - RX_BUF_OFFSET;
- p_pkt_info->cmd_sts = command_status;
- p_pkt_info->buf_ptr = (p_rx_curr_desc->buf_ptr) + RX_BUF_OFFSET;
- p_pkt_info->return_info = p_rx_curr_desc->return_info;
- p_pkt_info->l4i_chk = p_rx_curr_desc->buf_size; /* IP fragment indicator */
-
- /* Clean the return info field to indicate that the packet has been */
- /* moved to the upper layers */
- p_rx_curr_desc->return_info = 0;
-
- /* Update 'curr' in data structure */
- CURR_RFD_SET (p_rx_next_curr_desc, rx_queue);
-
- /* Rx descriptors resource exhausted. Set the Rx ring resource error flag */
- if (p_rx_next_curr_desc == p_rx_used_desc)
- p_eth_port_ctrl->rx_resource_err[rx_queue] = true;
-
- D_CACHE_FLUSH_LINE ((unsigned int) p_rx_curr_desc, 0);
- CPU_PIPE_FLUSH;
- return ETH_OK;
-}
-
-/*******************************************************************************
- * eth_rx_return_buff - Returns a Rx buffer back to the Rx ring.
- *
- * DESCRIPTION:
- * This routine returns a Rx buffer back to the Rx ring. It retrieves the
- * next 'used' descriptor and attached the returned buffer to it.
- * In case the Rx ring was in "resource error" condition, where there are
- * no available Rx resources, the function resets the resource error flag.
- *
- * INPUT:
- * ETH_PORT_INFO *p_eth_port_ctrl Ethernet Port Control srtuct.
- * ETH_QUEUE rx_queue Number of Rx queue.
- * PKT_INFO *p_pkt_info Information on the returned buffer.
- *
- * OUTPUT:
- * New available Rx resource in Rx descriptor ring.
- *
- * RETURN:
- * ETH_ERROR in case the routine can not access Rx desc ring.
- * ETH_OK otherwise.
- *
- *******************************************************************************/
-static ETH_FUNC_RET_STATUS eth_rx_return_buff (ETH_PORT_INFO *
- p_eth_port_ctrl,
- ETH_QUEUE rx_queue,
- PKT_INFO * p_pkt_info)
-{
- volatile ETH_RX_DESC *p_used_rx_desc; /* Where to return Rx resource */
-
- /* Get 'used' Rx descriptor */
- USED_RFD_GET (p_used_rx_desc, rx_queue);
-
- /* Sanity check */
- if (p_used_rx_desc == NULL)
- return ETH_ERROR;
-
- p_used_rx_desc->buf_ptr = p_pkt_info->buf_ptr;
- p_used_rx_desc->return_info = p_pkt_info->return_info;
- p_used_rx_desc->byte_cnt = p_pkt_info->byte_cnt;
- p_used_rx_desc->buf_size = MV64460_RX_BUFFER_SIZE; /* Reset Buffer size */
-
- /* Flush the write pipe */
- CPU_PIPE_FLUSH;
-
- /* Return the descriptor to DMA ownership */
- p_used_rx_desc->cmd_sts =
- ETH_BUFFER_OWNED_BY_DMA | ETH_RX_ENABLE_INTERRUPT;
-
- /* Flush descriptor and CPU pipe */
- D_CACHE_FLUSH_LINE ((unsigned int) p_used_rx_desc, 0);
- CPU_PIPE_FLUSH;
-
- /* Move the used descriptor pointer to the next descriptor */
- USED_RFD_SET (RX_NEXT_DESC_PTR (p_used_rx_desc, rx_queue), rx_queue);
-
- /* Any Rx return cancels the Rx resource error status */
- if (p_eth_port_ctrl->rx_resource_err[rx_queue] == true)
- p_eth_port_ctrl->rx_resource_err[rx_queue] = false;
-
- return ETH_OK;
-}
-
-/*******************************************************************************
- * eth_port_set_rx_coal - Sets coalescing interrupt mechanism on RX path
- *
- * DESCRIPTION:
- * This routine sets the RX coalescing interrupt mechanism parameter.
- * This parameter is a timeout counter, that counts in 64 t_clk
- * chunks ; that when timeout event occurs a maskable interrupt
- * occurs.
- * The parameter is calculated using the tClk of the MV-643xx chip
- * , and the required delay of the interrupt in usec.
- *
- * INPUT:
- * ETH_PORT eth_port_num Ethernet port number
- * unsigned int t_clk t_clk of the MV-643xx chip in HZ units
- * unsigned int delay Delay in usec
- *
- * OUTPUT:
- * Interrupt coalescing mechanism value is set in MV-643xx chip.
- *
- * RETURN:
- * The interrupt coalescing value set in the gigE port.
- *
- *******************************************************************************/
-#if 0 /* FIXME */
-static unsigned int eth_port_set_rx_coal (ETH_PORT eth_port_num,
- unsigned int t_clk,
- unsigned int delay)
-{
- unsigned int coal;
-
- coal = ((t_clk / 1000000) * delay) / 64;
- /* Set RX Coalescing mechanism */
- MV_REG_WRITE (MV64460_ETH_SDMA_CONFIG_REG (eth_port_num),
- ((coal & 0x3fff) << 8) |
- (MV_REG_READ
- (MV64460_ETH_SDMA_CONFIG_REG (eth_port_num))
- & 0xffc000ff));
- return coal;
-}
-
-#endif
-/*******************************************************************************
- * eth_port_set_tx_coal - Sets coalescing interrupt mechanism on TX path
- *
- * DESCRIPTION:
- * This routine sets the TX coalescing interrupt mechanism parameter.
- * This parameter is a timeout counter, that counts in 64 t_clk
- * chunks ; that when timeout event occurs a maskable interrupt
- * occurs.
- * The parameter is calculated using the t_cLK frequency of the
- * MV-643xx chip and the required delay in the interrupt in uSec
- *
- * INPUT:
- * ETH_PORT eth_port_num Ethernet port number
- * unsigned int t_clk t_clk of the MV-643xx chip in HZ units
- * unsigned int delay Delay in uSeconds
- *
- * OUTPUT:
- * Interrupt coalescing mechanism value is set in MV-643xx chip.
- *
- * RETURN:
- * The interrupt coalescing value set in the gigE port.
- *
- *******************************************************************************/
-#if 0 /* FIXME */
-static unsigned int eth_port_set_tx_coal (ETH_PORT eth_port_num,
- unsigned int t_clk,
- unsigned int delay)
-{
- unsigned int coal;
-
- coal = ((t_clk / 1000000) * delay) / 64;
- /* Set TX Coalescing mechanism */
- MV_REG_WRITE (MV64460_ETH_TX_FIFO_URGENT_THRESHOLD_REG (eth_port_num),
- coal << 4);
- return coal;
-}
-#endif
-
-/*******************************************************************************
- * eth_b_copy - Copy bytes from source to destination
- *
- * DESCRIPTION:
- * This function supports the eight bytes limitation on Tx buffer size.
- * The routine will zero eight bytes starting from the destination address
- * followed by copying bytes from the source address to the destination.
- *
- * INPUT:
- * unsigned int src_addr 32 bit source address.
- * unsigned int dst_addr 32 bit destination address.
- * int byte_count Number of bytes to copy.
- *
- * OUTPUT:
- * See description.
- *
- * RETURN:
- * None.
- *
- *******************************************************************************/
-static void eth_b_copy (unsigned int src_addr, unsigned int dst_addr,
- int byte_count)
-{
- /* Zero the dst_addr area */
- *(unsigned int *) dst_addr = 0x0;
-
- while (byte_count != 0) {
- *(char *) dst_addr = *(char *) src_addr;
- dst_addr++;
- src_addr++;
- byte_count--;
- }
-}
diff --git a/board/Marvell/db64460/mv_eth.h b/board/Marvell/db64460/mv_eth.h
deleted file mode 100644
index b4e498b509..0000000000
--- a/board/Marvell/db64460/mv_eth.h
+++ /dev/null
@@ -1,840 +0,0 @@
-/*
- * (C) Copyright 2003
- * Ingo Assmus <ingo.assmus@keymile.com>
- *
- * based on - Driver for MV64460X ethernet ports
- * Copyright (C) 2002 rabeeh@galileo.co.il
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * mv_eth.h - header file for the polled mode GT ethernet driver
- */
-
-#ifndef __DB64460_ETH_H__
-#define __DB64460_ETH_H__
-
-#include <asm/types.h>
-#include <asm/io.h>
-#include <asm/byteorder.h>
-#include <common.h>
-#include <net.h>
-#include "mv_regs.h"
-#include "../common/ppc_error_no.h"
-
-
-/*************************************************************************
-**************************************************************************
-**************************************************************************
-* The first part is the high level driver of the gigE ethernet ports. *
-**************************************************************************
-**************************************************************************
-*************************************************************************/
-#ifndef TRUE
-#define TRUE 1
-#endif
-#ifndef FALSE
-#define FALSE 0
-#endif
-
-/* In case not using SG on Tx, define MAX_SKB_FRAGS as 0 */
-#ifndef MAX_SKB_FRAGS
-#define MAX_SKB_FRAGS 0
-#endif
-
-/* Port attributes */
-/*#define MAX_RX_QUEUE_NUM 8*/
-/*#define MAX_TX_QUEUE_NUM 8*/
-#define MAX_RX_QUEUE_NUM 1
-#define MAX_TX_QUEUE_NUM 1
-
-
-/* Use one TX queue and one RX queue */
-#define MV64460_TX_QUEUE_NUM 1
-#define MV64460_RX_QUEUE_NUM 1
-
-/*
- * Number of RX / TX descriptors on RX / TX rings.
- * Note that allocating RX descriptors is done by allocating the RX
- * ring AND a preallocated RX buffers (skb's) for each descriptor.
- * The TX descriptors only allocates the TX descriptors ring,
- * with no pre allocated TX buffers (skb's are allocated by higher layers.
- */
-
-/* Default TX ring size is 10 descriptors */
-#ifdef CONFIG_MV64460_ETH_TXQUEUE_SIZE
-#define MV64460_TX_QUEUE_SIZE CONFIG_MV64460_ETH_TXQUEUE_SIZE
-#else
-#define MV64460_TX_QUEUE_SIZE 4
-#endif
-
-/* Default RX ring size is 4 descriptors */
-#ifdef CONFIG_MV64460_ETH_RXQUEUE_SIZE
-#define MV64460_RX_QUEUE_SIZE CONFIG_MV64460_ETH_RXQUEUE_SIZE
-#else
-#define MV64460_RX_QUEUE_SIZE 4
-#endif
-
-#ifdef CONFIG_RX_BUFFER_SIZE
-#define MV64460_RX_BUFFER_SIZE CONFIG_RX_BUFFER_SIZE
-#else
-#define MV64460_RX_BUFFER_SIZE 1600
-#endif
-
-#ifdef CONFIG_TX_BUFFER_SIZE
-#define MV64460_TX_BUFFER_SIZE CONFIG_TX_BUFFER_SIZE
-#else
-#define MV64460_TX_BUFFER_SIZE 1600
-#endif
-
-/*
- * Network device statistics. Akin to the 2.0 ether stats but
- * with byte counters.
- */
-
-struct net_device_stats
-{
- unsigned long rx_packets; /* total packets received */
- unsigned long tx_packets; /* total packets transmitted */
- unsigned long rx_bytes; /* total bytes received */
- unsigned long tx_bytes; /* total bytes transmitted */
- unsigned long rx_errors; /* bad packets received */
- unsigned long tx_errors; /* packet transmit problems */
- unsigned long rx_dropped; /* no space in linux buffers */
- unsigned long tx_dropped; /* no space available in linux */
- unsigned long multicast; /* multicast packets received */
- unsigned long collisions;
-
- /* detailed rx_errors: */
- unsigned long rx_length_errors;
- unsigned long rx_over_errors; /* receiver ring buff overflow */
- unsigned long rx_crc_errors; /* recved pkt with crc error */
- unsigned long rx_frame_errors; /* recv'd frame alignment error */
- unsigned long rx_fifo_errors; /* recv'r fifo overrun */
- unsigned long rx_missed_errors; /* receiver missed packet */
-
- /* detailed tx_errors */
- unsigned long tx_aborted_errors;
- unsigned long tx_carrier_errors;
- unsigned long tx_fifo_errors;
- unsigned long tx_heartbeat_errors;
- unsigned long tx_window_errors;
-
- /* for cslip etc */
- unsigned long rx_compressed;
- unsigned long tx_compressed;
-};
-
-
-/* Private data structure used for ethernet device */
-struct mv64460_eth_priv {
- unsigned int port_num;
- struct net_device_stats *stats;
-
-/* to buffer area aligned */
- char * p_eth_tx_buffer[MV64460_TX_QUEUE_SIZE+1]; /*pointers to alligned tx buffs in memory space */
- char * p_eth_rx_buffer[MV64460_RX_QUEUE_SIZE+1]; /*pointers to allinged rx buffs in memory space */
-
- /* Size of Tx Ring per queue */
- unsigned int tx_ring_size [MAX_TX_QUEUE_NUM];
-
-
- /* Size of Rx Ring per queue */
- unsigned int rx_ring_size [MAX_RX_QUEUE_NUM];
-
- /* Magic Number for Ethernet running */
- unsigned int eth_running;
-
-};
-
-int mv64460_eth_init (struct eth_device *dev);
-int mv64460_eth_stop (struct eth_device *dev);
-int mv64460_eth_start_xmit (struct eth_device*, volatile void* packet, int length);
-/* return db64460_eth0_poll(); */
-
-int mv64460_eth_open (struct eth_device *dev);
-
-
-/*************************************************************************
-**************************************************************************
-**************************************************************************
-* The second part is the low level driver of the gigE ethernet ports. *
-**************************************************************************
-**************************************************************************
-*************************************************************************/
-
-
-/********************************************************************************
- * Header File for : MV-643xx network interface header
- *
- * DESCRIPTION:
- * This header file contains macros typedefs and function declaration for
- * the Marvell Gig Bit Ethernet Controller.
- *
- * DEPENDENCIES:
- * None.
- *
- *******************************************************************************/
-
-
-#ifdef CONFIG_SPECIAL_CONSISTENT_MEMORY
-#ifdef CONFIG_MV64460_SRAM_CACHEABLE
-/* In case SRAM is cacheable but not cache coherent */
-#define D_CACHE_FLUSH_LINE(addr, offset) \
-{ \
- __asm__ __volatile__ ("dcbf %0,%1" : : "r" (addr), "r" (offset)); \
-}
-#else
-/* In case SRAM is cache coherent or non-cacheable */
-#define D_CACHE_FLUSH_LINE(addr, offset) ;
-#endif
-#else
-#ifdef CONFIG_NOT_COHERENT_CACHE
-/* In case of descriptors on DDR but not cache coherent */
-#define D_CACHE_FLUSH_LINE(addr, offset) \
-{ \
- __asm__ __volatile__ ("dcbf %0,%1" : : "r" (addr), "r" (offset)); \
-}
-#else
-/* In case of descriptors on DDR and cache coherent */
-#define D_CACHE_FLUSH_LINE(addr, offset) ;
-#endif /* CONFIG_NOT_COHERENT_CACHE */
-#endif /* CONFIG_SPECIAL_CONSISTENT_MEMORY */
-
-
-#define CPU_PIPE_FLUSH \
-{ \
- __asm__ __volatile__ ("eieio"); \
-}
-
-
-/* defines */
-
-/* Default port configuration value */
-#define PORT_CONFIG_VALUE \
- ETH_UNICAST_NORMAL_MODE | \
- ETH_DEFAULT_RX_QUEUE_0 | \
- ETH_DEFAULT_RX_ARP_QUEUE_0 | \
- ETH_RECEIVE_BC_IF_NOT_IP_OR_ARP | \
- ETH_RECEIVE_BC_IF_IP | \
- ETH_RECEIVE_BC_IF_ARP | \
- ETH_CAPTURE_TCP_FRAMES_DIS | \
- ETH_CAPTURE_UDP_FRAMES_DIS | \
- ETH_DEFAULT_RX_TCP_QUEUE_0 | \
- ETH_DEFAULT_RX_UDP_QUEUE_0 | \
- ETH_DEFAULT_RX_BPDU_QUEUE_0
-
-/* Default port extend configuration value */
-#define PORT_CONFIG_EXTEND_VALUE \
- ETH_SPAN_BPDU_PACKETS_AS_NORMAL | \
- ETH_PARTITION_DISABLE
-
-
-/* Default sdma control value */
-#ifdef CONFIG_NOT_COHERENT_CACHE
-#define PORT_SDMA_CONFIG_VALUE \
- ETH_RX_BURST_SIZE_16_64BIT | \
- GT_ETH_IPG_INT_RX(0) | \
- ETH_TX_BURST_SIZE_16_64BIT;
-#else
-#define PORT_SDMA_CONFIG_VALUE \
- ETH_RX_BURST_SIZE_4_64BIT | \
- GT_ETH_IPG_INT_RX(0) | \
- ETH_TX_BURST_SIZE_4_64BIT;
-#endif
-
-#define GT_ETH_IPG_INT_RX(value) \
- ((value & 0x3fff) << 8)
-
-/* Default port serial control value */
-#define PORT_SERIAL_CONTROL_VALUE \
- ETH_FORCE_LINK_PASS | \
- ETH_ENABLE_AUTO_NEG_FOR_DUPLX | \
- ETH_DISABLE_AUTO_NEG_FOR_FLOW_CTRL | \
- ETH_ADV_SYMMETRIC_FLOW_CTRL | \
- ETH_FORCE_FC_MODE_NO_PAUSE_DIS_TX | \
- ETH_FORCE_BP_MODE_NO_JAM | \
- BIT9 | \
- ETH_DO_NOT_FORCE_LINK_FAIL | \
- ETH_RETRANSMIT_16_ETTEMPTS | \
- ETH_ENABLE_AUTO_NEG_SPEED_GMII | \
- ETH_DTE_ADV_0 | \
- ETH_DISABLE_AUTO_NEG_BYPASS | \
- ETH_AUTO_NEG_NO_CHANGE | \
- ETH_MAX_RX_PACKET_1552BYTE | \
- ETH_CLR_EXT_LOOPBACK | \
- ETH_SET_FULL_DUPLEX_MODE | \
- ETH_ENABLE_FLOW_CTRL_TX_RX_IN_FULL_DUPLEX;
-
-#define RX_BUFFER_MAX_SIZE 0xFFFF
-#define TX_BUFFER_MAX_SIZE 0xFFFF /* Buffer are limited to 64k */
-
-#define RX_BUFFER_MIN_SIZE 0x8
-#define TX_BUFFER_MIN_SIZE 0x8
-
-/* Tx WRR confoguration macros */
-#define PORT_MAX_TRAN_UNIT 0x24 /* MTU register (default) 9KByte */
-#define PORT_MAX_TOKEN_BUCKET_SIZE 0x_fFFF /* PMTBS register (default) */
-#define PORT_TOKEN_RATE 1023 /* PTTBRC register (default) */
-
-/* MAC accepet/reject macros */
-#define ACCEPT_MAC_ADDR 0
-#define REJECT_MAC_ADDR 1
-
-/* Size of a Tx/Rx descriptor used in chain list data structure */
-#define RX_DESC_ALIGNED_SIZE 0x20
-#define TX_DESC_ALIGNED_SIZE 0x20
-
-/* An offest in Tx descriptors to store data for buffers less than 8 Bytes */
-#define TX_BUF_OFFSET_IN_DESC 0x18
-/* Buffer offset from buffer pointer */
-#define RX_BUF_OFFSET 0x2
-
-/* Gap define */
-#define ETH_BAR_GAP 0x8
-#define ETH_SIZE_REG_GAP 0x8
-#define ETH_HIGH_ADDR_REMAP_REG_GAP 0x4
-#define ETH_PORT_ACCESS_CTRL_GAP 0x4
-
-/* Gigabit Ethernet Unit Global Registers */
-
-/* MIB Counters register definitions */
-#define ETH_MIB_GOOD_OCTETS_RECEIVED_LOW 0x0
-#define ETH_MIB_GOOD_OCTETS_RECEIVED_HIGH 0x4
-#define ETH_MIB_BAD_OCTETS_RECEIVED 0x8
-#define ETH_MIB_INTERNAL_MAC_TRANSMIT_ERR 0xc
-#define ETH_MIB_GOOD_FRAMES_RECEIVED 0x10
-#define ETH_MIB_BAD_FRAMES_RECEIVED 0x14
-#define ETH_MIB_BROADCAST_FRAMES_RECEIVED 0x18
-#define ETH_MIB_MULTICAST_FRAMES_RECEIVED 0x1c
-#define ETH_MIB_FRAMES_64_OCTETS 0x20
-#define ETH_MIB_FRAMES_65_TO_127_OCTETS 0x24
-#define ETH_MIB_FRAMES_128_TO_255_OCTETS 0x28
-#define ETH_MIB_FRAMES_256_TO_511_OCTETS 0x2c
-#define ETH_MIB_FRAMES_512_TO_1023_OCTETS 0x30
-#define ETH_MIB_FRAMES_1024_TO_MAX_OCTETS 0x34
-#define ETH_MIB_GOOD_OCTETS_SENT_LOW 0x38
-#define ETH_MIB_GOOD_OCTETS_SENT_HIGH 0x3c
-#define ETH_MIB_GOOD_FRAMES_SENT 0x40
-#define ETH_MIB_EXCESSIVE_COLLISION 0x44
-#define ETH_MIB_MULTICAST_FRAMES_SENT 0x48
-#define ETH_MIB_BROADCAST_FRAMES_SENT 0x4c
-#define ETH_MIB_UNREC_MAC_CONTROL_RECEIVED 0x50
-#define ETH_MIB_FC_SENT 0x54
-#define ETH_MIB_GOOD_FC_RECEIVED 0x58
-#define ETH_MIB_BAD_FC_RECEIVED 0x5c
-#define ETH_MIB_UNDERSIZE_RECEIVED 0x60
-#define ETH_MIB_FRAGMENTS_RECEIVED 0x64
-#define ETH_MIB_OVERSIZE_RECEIVED 0x68
-#define ETH_MIB_JABBER_RECEIVED 0x6c
-#define ETH_MIB_MAC_RECEIVE_ERROR 0x70
-#define ETH_MIB_BAD_CRC_EVENT 0x74
-#define ETH_MIB_COLLISION 0x78
-#define ETH_MIB_LATE_COLLISION 0x7c
-
-/* Port serial status reg (PSR) */
-#define ETH_INTERFACE_GMII_MII 0
-#define ETH_INTERFACE_PCM BIT0
-#define ETH_LINK_IS_DOWN 0
-#define ETH_LINK_IS_UP BIT1
-#define ETH_PORT_AT_HALF_DUPLEX 0
-#define ETH_PORT_AT_FULL_DUPLEX BIT2
-#define ETH_RX_FLOW_CTRL_DISABLED 0
-#define ETH_RX_FLOW_CTRL_ENBALED BIT3
-#define ETH_GMII_SPEED_100_10 0
-#define ETH_GMII_SPEED_1000 BIT4
-#define ETH_MII_SPEED_10 0
-#define ETH_MII_SPEED_100 BIT5
-#define ETH_NO_TX 0
-#define ETH_TX_IN_PROGRESS BIT7
-#define ETH_BYPASS_NO_ACTIVE 0
-#define ETH_BYPASS_ACTIVE BIT8
-#define ETH_PORT_NOT_AT_PARTITION_STATE 0
-#define ETH_PORT_AT_PARTITION_STATE BIT9
-#define ETH_PORT_TX_FIFO_NOT_EMPTY 0
-#define ETH_PORT_TX_FIFO_EMPTY BIT10
-
-
-/* These macros describes the Port configuration reg (Px_cR) bits */
-#define ETH_UNICAST_NORMAL_MODE 0
-#define ETH_UNICAST_PROMISCUOUS_MODE BIT0
-#define ETH_DEFAULT_RX_QUEUE_0 0
-#define ETH_DEFAULT_RX_QUEUE_1 BIT1
-#define ETH_DEFAULT_RX_QUEUE_2 BIT2
-#define ETH_DEFAULT_RX_QUEUE_3 (BIT2 | BIT1)
-#define ETH_DEFAULT_RX_QUEUE_4 BIT3
-#define ETH_DEFAULT_RX_QUEUE_5 (BIT3 | BIT1)
-#define ETH_DEFAULT_RX_QUEUE_6 (BIT3 | BIT2)
-#define ETH_DEFAULT_RX_QUEUE_7 (BIT3 | BIT2 | BIT1)
-#define ETH_DEFAULT_RX_ARP_QUEUE_0 0
-#define ETH_DEFAULT_RX_ARP_QUEUE_1 BIT4
-#define ETH_DEFAULT_RX_ARP_QUEUE_2 BIT5
-#define ETH_DEFAULT_RX_ARP_QUEUE_3 (BIT5 | BIT4)
-#define ETH_DEFAULT_RX_ARP_QUEUE_4 BIT6
-#define ETH_DEFAULT_RX_ARP_QUEUE_5 (BIT6 | BIT4)
-#define ETH_DEFAULT_RX_ARP_QUEUE_6 (BIT6 | BIT5)
-#define ETH_DEFAULT_RX_ARP_QUEUE_7 (BIT6 | BIT5 | BIT4)
-#define ETH_RECEIVE_BC_IF_NOT_IP_OR_ARP 0
-#define ETH_REJECT_BC_IF_NOT_IP_OR_ARP BIT7
-#define ETH_RECEIVE_BC_IF_IP 0
-#define ETH_REJECT_BC_IF_IP BIT8
-#define ETH_RECEIVE_BC_IF_ARP 0
-#define ETH_REJECT_BC_IF_ARP BIT9
-#define ETH_TX_AM_NO_UPDATE_ERROR_SUMMARY BIT12
-#define ETH_CAPTURE_TCP_FRAMES_DIS 0
-#define ETH_CAPTURE_TCP_FRAMES_EN BIT14
-#define ETH_CAPTURE_UDP_FRAMES_DIS 0
-#define ETH_CAPTURE_UDP_FRAMES_EN BIT15
-#define ETH_DEFAULT_RX_TCP_QUEUE_0 0
-#define ETH_DEFAULT_RX_TCP_QUEUE_1 BIT16
-#define ETH_DEFAULT_RX_TCP_QUEUE_2 BIT17
-#define ETH_DEFAULT_RX_TCP_QUEUE_3 (BIT17 | BIT16)
-#define ETH_DEFAULT_RX_TCP_QUEUE_4 BIT18
-#define ETH_DEFAULT_RX_TCP_QUEUE_5 (BIT18 | BIT16)
-#define ETH_DEFAULT_RX_TCP_QUEUE_6 (BIT18 | BIT17)
-#define ETH_DEFAULT_RX_TCP_QUEUE_7 (BIT18 | BIT17 | BIT16)
-#define ETH_DEFAULT_RX_UDP_QUEUE_0 0
-#define ETH_DEFAULT_RX_UDP_QUEUE_1 BIT19
-#define ETH_DEFAULT_RX_UDP_QUEUE_2 BIT20
-#define ETH_DEFAULT_RX_UDP_QUEUE_3 (BIT20 | BIT19)
-#define ETH_DEFAULT_RX_UDP_QUEUE_4 (BIT21
-#define ETH_DEFAULT_RX_UDP_QUEUE_5 (BIT21 | BIT19)
-#define ETH_DEFAULT_RX_UDP_QUEUE_6 (BIT21 | BIT20)
-#define ETH_DEFAULT_RX_UDP_QUEUE_7 (BIT21 | BIT20 | BIT19)
-#define ETH_DEFAULT_RX_BPDU_QUEUE_0 0
-#define ETH_DEFAULT_RX_BPDU_QUEUE_1 BIT22
-#define ETH_DEFAULT_RX_BPDU_QUEUE_2 BIT23
-#define ETH_DEFAULT_RX_BPDU_QUEUE_3 (BIT23 | BIT22)
-#define ETH_DEFAULT_RX_BPDU_QUEUE_4 BIT24
-#define ETH_DEFAULT_RX_BPDU_QUEUE_5 (BIT24 | BIT22)
-#define ETH_DEFAULT_RX_BPDU_QUEUE_6 (BIT24 | BIT23)
-#define ETH_DEFAULT_RX_BPDU_QUEUE_7 (BIT24 | BIT23 | BIT22)
-
-
-/* These macros describes the Port configuration extend reg (Px_cXR) bits*/
-#define ETH_CLASSIFY_EN BIT0
-#define ETH_SPAN_BPDU_PACKETS_AS_NORMAL 0
-#define ETH_SPAN_BPDU_PACKETS_TO_RX_QUEUE_7 BIT1
-#define ETH_PARTITION_DISABLE 0
-#define ETH_PARTITION_ENABLE BIT2
-
-
-/* Tx/Rx queue command reg (RQCR/TQCR)*/
-#define ETH_QUEUE_0_ENABLE BIT0
-#define ETH_QUEUE_1_ENABLE BIT1
-#define ETH_QUEUE_2_ENABLE BIT2
-#define ETH_QUEUE_3_ENABLE BIT3
-#define ETH_QUEUE_4_ENABLE BIT4
-#define ETH_QUEUE_5_ENABLE BIT5
-#define ETH_QUEUE_6_ENABLE BIT6
-#define ETH_QUEUE_7_ENABLE BIT7
-#define ETH_QUEUE_0_DISABLE BIT8
-#define ETH_QUEUE_1_DISABLE BIT9
-#define ETH_QUEUE_2_DISABLE BIT10
-#define ETH_QUEUE_3_DISABLE BIT11
-#define ETH_QUEUE_4_DISABLE BIT12
-#define ETH_QUEUE_5_DISABLE BIT13
-#define ETH_QUEUE_6_DISABLE BIT14
-#define ETH_QUEUE_7_DISABLE BIT15
-
-/* These macros describes the Port Sdma configuration reg (SDCR) bits */
-#define ETH_RIFB BIT0
-#define ETH_RX_BURST_SIZE_1_64BIT 0
-#define ETH_RX_BURST_SIZE_2_64BIT BIT1
-#define ETH_RX_BURST_SIZE_4_64BIT BIT2
-#define ETH_RX_BURST_SIZE_8_64BIT (BIT2 | BIT1)
-#define ETH_RX_BURST_SIZE_16_64BIT BIT3
-#define ETH_BLM_RX_NO_SWAP BIT4
-#define ETH_BLM_RX_BYTE_SWAP 0
-#define ETH_BLM_TX_NO_SWAP BIT5
-#define ETH_BLM_TX_BYTE_SWAP 0
-#define ETH_DESCRIPTORS_BYTE_SWAP BIT6
-#define ETH_DESCRIPTORS_NO_SWAP 0
-#define ETH_TX_BURST_SIZE_1_64BIT 0
-#define ETH_TX_BURST_SIZE_2_64BIT BIT22
-#define ETH_TX_BURST_SIZE_4_64BIT BIT23
-#define ETH_TX_BURST_SIZE_8_64BIT (BIT23 | BIT22)
-#define ETH_TX_BURST_SIZE_16_64BIT BIT24
-
-/* These macros describes the Port serial control reg (PSCR) bits */
-#define ETH_SERIAL_PORT_DISABLE 0
-#define ETH_SERIAL_PORT_ENABLE BIT0
-#define ETH_FORCE_LINK_PASS BIT1
-#define ETH_DO_NOT_FORCE_LINK_PASS 0
-#define ETH_ENABLE_AUTO_NEG_FOR_DUPLX 0
-#define ETH_DISABLE_AUTO_NEG_FOR_DUPLX BIT2
-#define ETH_ENABLE_AUTO_NEG_FOR_FLOW_CTRL 0
-#define ETH_DISABLE_AUTO_NEG_FOR_FLOW_CTRL BIT3
-#define ETH_ADV_NO_FLOW_CTRL 0
-#define ETH_ADV_SYMMETRIC_FLOW_CTRL BIT4
-#define ETH_FORCE_FC_MODE_NO_PAUSE_DIS_TX 0
-#define ETH_FORCE_FC_MODE_TX_PAUSE_DIS BIT5
-#define ETH_FORCE_BP_MODE_NO_JAM 0
-#define ETH_FORCE_BP_MODE_JAM_TX BIT7
-#define ETH_FORCE_BP_MODE_JAM_TX_ON_RX_ERR BIT8
-#define ETH_FORCE_LINK_FAIL 0
-#define ETH_DO_NOT_FORCE_LINK_FAIL BIT10
-#define ETH_RETRANSMIT_16_ETTEMPTS 0
-#define ETH_RETRANSMIT_FOREVER BIT11
-#define ETH_DISABLE_AUTO_NEG_SPEED_GMII BIT13
-#define ETH_ENABLE_AUTO_NEG_SPEED_GMII 0
-#define ETH_DTE_ADV_0 0
-#define ETH_DTE_ADV_1 BIT14
-#define ETH_DISABLE_AUTO_NEG_BYPASS 0
-#define ETH_ENABLE_AUTO_NEG_BYPASS BIT15
-#define ETH_AUTO_NEG_NO_CHANGE 0
-#define ETH_RESTART_AUTO_NEG BIT16
-#define ETH_MAX_RX_PACKET_1518BYTE 0
-#define ETH_MAX_RX_PACKET_1522BYTE BIT17
-#define ETH_MAX_RX_PACKET_1552BYTE BIT18
-#define ETH_MAX_RX_PACKET_9022BYTE (BIT18 | BIT17)
-#define ETH_MAX_RX_PACKET_9192BYTE BIT19
-#define ETH_MAX_RX_PACKET_9700BYTE (BIT19 | BIT17)
-#define ETH_SET_EXT_LOOPBACK BIT20
-#define ETH_CLR_EXT_LOOPBACK 0
-#define ETH_SET_FULL_DUPLEX_MODE BIT21
-#define ETH_SET_HALF_DUPLEX_MODE 0
-#define ETH_ENABLE_FLOW_CTRL_TX_RX_IN_FULL_DUPLEX BIT22
-#define ETH_DISABLE_FLOW_CTRL_TX_RX_IN_FULL_DUPLEX 0
-#define ETH_SET_GMII_SPEED_TO_10_100 0
-#define ETH_SET_GMII_SPEED_TO_1000 BIT23
-#define ETH_SET_MII_SPEED_TO_10 0
-#define ETH_SET_MII_SPEED_TO_100 BIT24
-
-
-/* SMI reg */
-#define ETH_SMI_BUSY BIT28 /* 0 - Write, 1 - Read */
-#define ETH_SMI_READ_VALID BIT27 /* 0 - Write, 1 - Read */
-#define ETH_SMI_OPCODE_WRITE 0 /* Completion of Read operation */
-#define ETH_SMI_OPCODE_READ BIT26 /* Operation is in progress */
-
-/* SDMA command status fields macros */
-
-/* Tx & Rx descriptors status */
-#define ETH_ERROR_SUMMARY (BIT0)
-
-/* Tx & Rx descriptors command */
-#define ETH_BUFFER_OWNED_BY_DMA (BIT31)
-
-/* Tx descriptors status */
-#define ETH_LC_ERROR (0 )
-#define ETH_UR_ERROR (BIT1 )
-#define ETH_RL_ERROR (BIT2 )
-#define ETH_LLC_SNAP_FORMAT (BIT9 )
-
-/* Rx descriptors status */
-#define ETH_CRC_ERROR (0 )
-#define ETH_OVERRUN_ERROR (BIT1 )
-#define ETH_MAX_FRAME_LENGTH_ERROR (BIT2 )
-#define ETH_RESOURCE_ERROR ((BIT2 | BIT1))
-#define ETH_VLAN_TAGGED (BIT19)
-#define ETH_BPDU_FRAME (BIT20)
-#define ETH_TCP_FRAME_OVER_IP_V_4 (0 )
-#define ETH_UDP_FRAME_OVER_IP_V_4 (BIT21)
-#define ETH_OTHER_FRAME_TYPE (BIT22)
-#define ETH_LAYER_2_IS_ETH_V_2 (BIT23)
-#define ETH_FRAME_TYPE_IP_V_4 (BIT24)
-#define ETH_FRAME_HEADER_OK (BIT25)
-#define ETH_RX_LAST_DESC (BIT26)
-#define ETH_RX_FIRST_DESC (BIT27)
-#define ETH_UNKNOWN_DESTINATION_ADDR (BIT28)
-#define ETH_RX_ENABLE_INTERRUPT (BIT29)
-#define ETH_LAYER_4_CHECKSUM_OK (BIT30)
-
-/* Rx descriptors byte count */
-#define ETH_FRAME_FRAGMENTED (BIT2)
-
-/* Tx descriptors command */
-#define ETH_LAYER_4_CHECKSUM_FIRST_DESC (BIT10)
-#define ETH_FRAME_SET_TO_VLAN (BIT15)
-#define ETH_TCP_FRAME (0 )
-#define ETH_UDP_FRAME (BIT16)
-#define ETH_GEN_TCP_UDP_CHECKSUM (BIT17)
-#define ETH_GEN_IP_V_4_CHECKSUM (BIT18)
-#define ETH_ZERO_PADDING (BIT19)
-#define ETH_TX_LAST_DESC (BIT20)
-#define ETH_TX_FIRST_DESC (BIT21)
-#define ETH_GEN_CRC (BIT22)
-#define ETH_TX_ENABLE_INTERRUPT (BIT23)
-#define ETH_AUTO_MODE (BIT30)
-
-/* Address decode parameters */
-/* Ethernet Base Address Register bits */
-#define EBAR_TARGET_DRAM 0x00000000
-#define EBAR_TARGET_DEVICE 0x00000001
-#define EBAR_TARGET_CBS 0x00000002
-#define EBAR_TARGET_PCI0 0x00000003
-#define EBAR_TARGET_PCI1 0x00000004
-#define EBAR_TARGET_CUNIT 0x00000005
-#define EBAR_TARGET_AUNIT 0x00000006
-#define EBAR_TARGET_GUNIT 0x00000007
-
-/* Window attributes */
-#define EBAR_ATTR_DRAM_CS0 0x00000E00
-#define EBAR_ATTR_DRAM_CS1 0x00000D00
-#define EBAR_ATTR_DRAM_CS2 0x00000B00
-#define EBAR_ATTR_DRAM_CS3 0x00000700
-
-/* DRAM Target interface */
-#define EBAR_ATTR_DRAM_NO_CACHE_COHERENCY 0x00000000
-#define EBAR_ATTR_DRAM_CACHE_COHERENCY_WT 0x00001000
-#define EBAR_ATTR_DRAM_CACHE_COHERENCY_WB 0x00002000
-
-/* Device Bus Target interface */
-#define EBAR_ATTR_DEVICE_DEVCS0 0x00001E00
-#define EBAR_ATTR_DEVICE_DEVCS1 0x00001D00
-#define EBAR_ATTR_DEVICE_DEVCS2 0x00001B00
-#define EBAR_ATTR_DEVICE_DEVCS3 0x00001700
-#define EBAR_ATTR_DEVICE_BOOTCS3 0x00000F00
-
-/* PCI Target interface */
-#define EBAR_ATTR_PCI_BYTE_SWAP 0x00000000
-#define EBAR_ATTR_PCI_NO_SWAP 0x00000100
-#define EBAR_ATTR_PCI_BYTE_WORD_SWAP 0x00000200
-#define EBAR_ATTR_PCI_WORD_SWAP 0x00000300
-#define EBAR_ATTR_PCI_NO_SNOOP_NOT_ASSERT 0x00000000
-#define EBAR_ATTR_PCI_NO_SNOOP_ASSERT 0x00000400
-#define EBAR_ATTR_PCI_IO_SPACE 0x00000000
-#define EBAR_ATTR_PCI_MEMORY_SPACE 0x00000800
-#define EBAR_ATTR_PCI_REQ64_FORCE 0x00000000
-#define EBAR_ATTR_PCI_REQ64_SIZE 0x00001000
-
-/* CPU 60x bus or internal SRAM interface */
-#define EBAR_ATTR_CBS_SRAM_BLOCK0 0x00000000
-#define EBAR_ATTR_CBS_SRAM_BLOCK1 0x00000100
-#define EBAR_ATTR_CBS_SRAM 0x00000000
-#define EBAR_ATTR_CBS_CPU_BUS 0x00000800
-
-/* Window access control */
-#define EWIN_ACCESS_NOT_ALLOWED 0
-#define EWIN_ACCESS_READ_ONLY BIT0
-#define EWIN_ACCESS_FULL (BIT1 | BIT0)
-#define EWIN0_ACCESS_MASK 0x0003
-#define EWIN1_ACCESS_MASK 0x000C
-#define EWIN2_ACCESS_MASK 0x0030
-#define EWIN3_ACCESS_MASK 0x00C0
-
-/* typedefs */
-
-typedef enum _eth_port
-{
- ETH_0 = 0,
- ETH_1 = 1,
- ETH_2 = 2
-}ETH_PORT;
-
-typedef enum _eth_func_ret_status
-{
- ETH_OK, /* Returned as expected. */
- ETH_ERROR, /* Fundamental error. */
- ETH_RETRY, /* Could not process request. Try later. */
- ETH_END_OF_JOB, /* Ring has nothing to process. */
- ETH_QUEUE_FULL, /* Ring resource error. */
- ETH_QUEUE_LAST_RESOURCE /* Ring resources about to exhaust. */
-}ETH_FUNC_RET_STATUS;
-
-typedef enum _eth_queue
-{
- ETH_Q0 = 0,
- ETH_Q1 = 1,
- ETH_Q2 = 2,
- ETH_Q3 = 3,
- ETH_Q4 = 4,
- ETH_Q5 = 5,
- ETH_Q6 = 6,
- ETH_Q7 = 7
-} ETH_QUEUE;
-
-typedef enum _addr_win
-{
- ETH_WIN0,
- ETH_WIN1,
- ETH_WIN2,
- ETH_WIN3,
- ETH_WIN4,
- ETH_WIN5
-} ETH_ADDR_WIN;
-
-typedef enum _eth_target
-{
- ETH_TARGET_DRAM ,
- ETH_TARGET_DEVICE,
- ETH_TARGET_CBS ,
- ETH_TARGET_PCI0 ,
- ETH_TARGET_PCI1
-}ETH_TARGET;
-
-typedef struct _eth_rx_desc
-{
- unsigned short byte_cnt ; /* Descriptor buffer byte count */
- unsigned short buf_size ; /* Buffer size */
- unsigned int cmd_sts ; /* Descriptor command status */
- unsigned int next_desc_ptr; /* Next descriptor pointer */
- unsigned int buf_ptr ; /* Descriptor buffer pointer */
- unsigned int return_info ; /* User resource return information */
-} ETH_RX_DESC;
-
-
-typedef struct _eth_tx_desc
-{
- unsigned short byte_cnt ; /* Descriptor buffer byte count */
- unsigned short l4i_chk ; /* CPU provided TCP Checksum */
- unsigned int cmd_sts ; /* Descriptor command status */
- unsigned int next_desc_ptr; /* Next descriptor pointer */
- unsigned int buf_ptr ; /* Descriptor buffer pointer */
- unsigned int return_info ; /* User resource return information */
-} ETH_TX_DESC;
-
-/* Unified struct for Rx and Tx operations. The user is not required to */
-/* be familier with neither Tx nor Rx descriptors. */
-typedef struct _pkt_info
-{
- unsigned short byte_cnt ; /* Descriptor buffer byte count */
- unsigned short l4i_chk ; /* Tx CPU provided TCP Checksum */
- unsigned int cmd_sts ; /* Descriptor command status */
- unsigned int buf_ptr ; /* Descriptor buffer pointer */
- unsigned int return_info ; /* User resource return information */
-} PKT_INFO;
-
-
-typedef struct _eth_win_param
-{
- ETH_ADDR_WIN win; /* Window number. See ETH_ADDR_WIN enum */
- ETH_TARGET target; /* System targets. See ETH_TARGET enum */
- unsigned short attributes; /* BAR attributes. See above macros. */
- unsigned int base_addr; /* Window base address in unsigned int form */
- unsigned int high_addr; /* Window high address in unsigned int form */
- unsigned int size; /* Size in MBytes. Must be % 64Kbyte. */
- bool enable; /* Enable/disable access to the window. */
- unsigned short access_ctrl; /* Access ctrl register. see above macros */
-} ETH_WIN_PARAM;
-
-
-/* Ethernet port specific infomation */
-
-typedef struct _eth_port_ctrl
-{
- ETH_PORT port_num; /* User Ethernet port number */
- int port_phy_addr; /* User phy address of Ethrnet port */
- unsigned char port_mac_addr[6]; /* User defined port MAC address. */
- unsigned int port_config; /* User port configuration value */
- unsigned int port_config_extend; /* User port config extend value */
- unsigned int port_sdma_config; /* User port SDMA config value */
- unsigned int port_serial_control; /* User port serial control value */
- unsigned int port_tx_queue_command; /* Port active Tx queues summary */
- unsigned int port_rx_queue_command; /* Port active Rx queues summary */
-
- /* User function to cast virtual address to CPU bus address */
- unsigned int (*port_virt_to_phys)(unsigned int addr);
- /* User scratch pad for user specific data structures */
- void *port_private;
-
- bool rx_resource_err[MAX_RX_QUEUE_NUM]; /* Rx ring resource error flag */
- bool tx_resource_err[MAX_TX_QUEUE_NUM]; /* Tx ring resource error flag */
-
- /* Tx/Rx rings managment indexes fields. For driver use */
-
- /* Next available Rx resource */
- volatile ETH_RX_DESC *p_rx_curr_desc_q[MAX_RX_QUEUE_NUM];
- /* Returning Rx resource */
- volatile ETH_RX_DESC *p_rx_used_desc_q[MAX_RX_QUEUE_NUM];
-
- /* Next available Tx resource */
- volatile ETH_TX_DESC *p_tx_curr_desc_q[MAX_TX_QUEUE_NUM];
- /* Returning Tx resource */
- volatile ETH_TX_DESC *p_tx_used_desc_q[MAX_TX_QUEUE_NUM];
- /* An extra Tx index to support transmit of multiple buffers per packet */
- volatile ETH_TX_DESC *p_tx_first_desc_q[MAX_TX_QUEUE_NUM];
-
- /* Tx/Rx rings size and base variables fields. For driver use */
-
- volatile ETH_RX_DESC *p_rx_desc_area_base[MAX_RX_QUEUE_NUM];
- unsigned int rx_desc_area_size[MAX_RX_QUEUE_NUM];
- char *p_rx_buffer_base[MAX_RX_QUEUE_NUM];
-
- volatile ETH_TX_DESC *p_tx_desc_area_base[MAX_TX_QUEUE_NUM];
- unsigned int tx_desc_area_size[MAX_TX_QUEUE_NUM];
- char *p_tx_buffer_base[MAX_TX_QUEUE_NUM];
-
-} ETH_PORT_INFO;
-
-
-/* ethernet.h API list */
-
-/* Port operation control routines */
-static void eth_port_init (ETH_PORT_INFO *p_eth_port_ctrl);
-static void eth_port_reset(ETH_PORT eth_port_num);
-static bool eth_port_start(ETH_PORT_INFO *p_eth_port_ctrl);
-
-
-/* Port MAC address routines */
-static void eth_port_uc_addr_set (ETH_PORT eth_port_num,
- unsigned char *p_addr,
- ETH_QUEUE queue);
-#if 0 /* FIXME */
-static void eth_port_mc_addr (ETH_PORT eth_port_num,
- unsigned char *p_addr,
- ETH_QUEUE queue,
- int option);
-#endif
-
-/* PHY and MIB routines */
-static bool ethernet_phy_reset(ETH_PORT eth_port_num);
-
-static bool eth_port_write_smi_reg(ETH_PORT eth_port_num,
- unsigned int phy_reg,
- unsigned int value);
-
-static bool eth_port_read_smi_reg(ETH_PORT eth_port_num,
- unsigned int phy_reg,
- unsigned int* value);
-
-static void eth_clear_mib_counters(ETH_PORT eth_port_num);
-
-/* Port data flow control routines */
-static ETH_FUNC_RET_STATUS eth_port_send (ETH_PORT_INFO *p_eth_port_ctrl,
- ETH_QUEUE tx_queue,
- PKT_INFO *p_pkt_info);
-static ETH_FUNC_RET_STATUS eth_tx_return_desc(ETH_PORT_INFO *p_eth_port_ctrl,
- ETH_QUEUE tx_queue,
- PKT_INFO *p_pkt_info);
-static ETH_FUNC_RET_STATUS eth_port_receive (ETH_PORT_INFO *p_eth_port_ctrl,
- ETH_QUEUE rx_queue,
- PKT_INFO *p_pkt_info);
-static ETH_FUNC_RET_STATUS eth_rx_return_buff(ETH_PORT_INFO *p_eth_port_ctrl,
- ETH_QUEUE rx_queue,
- PKT_INFO *p_pkt_info);
-
-
-static bool ether_init_tx_desc_ring(ETH_PORT_INFO *p_eth_port_ctrl,
- ETH_QUEUE tx_queue,
- int tx_desc_num,
- int tx_buff_size,
- unsigned int tx_desc_base_addr,
- unsigned int tx_buff_base_addr);
-
-static bool ether_init_rx_desc_ring(ETH_PORT_INFO *p_eth_port_ctrl,
- ETH_QUEUE rx_queue,
- int rx_desc_num,
- int rx_buff_size,
- unsigned int rx_desc_base_addr,
- unsigned int rx_buff_base_addr);
-
-#endif /* MV64460_ETH_ */
diff --git a/board/Marvell/db64460/mv_regs.h b/board/Marvell/db64460/mv_regs.h
deleted file mode 100644
index fb50bb6a08..0000000000
--- a/board/Marvell/db64460/mv_regs.h
+++ /dev/null
@@ -1,1124 +0,0 @@
-/*
- * (C) Copyright 2003
- * Ingo Assmus <ingo.assmus@keymile.com>
- *
- * based on - Driver for MV64460X ethernet ports
- * Copyright (C) 2002 rabeeh@galileo.co.il
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/********************************************************************************
-* gt64460r.h - GT-64460 Internal registers definition file.
-*
-* DESCRIPTION:
-* None.
-*
-* DEPENDENCIES:
-* None.
-*
-*******************************************************************************/
-
-#ifndef __INCmv_regsh
-#define __INCmv_regsh
-
-#define MV64460
-
-/* Supported by the Atlantis */
-#define MV64460_INCLUDE_PCI_1
-#define MV64460_INCLUDE_PCI_0_ARBITER
-#define MV64460_INCLUDE_PCI_1_ARBITER
-#define MV64460_INCLUDE_SNOOP_SUPPORT
-#define MV64460_INCLUDE_P2P
-#define MV64460_INCLUDE_ETH_PORT_2
-#define MV64460_INCLUDE_CPU_MAPPING
-#define MV64460_INCLUDE_MPSC
-
-/* Not supported features */
-#undef INCLUDE_CNTMR_4_7
-#undef INCLUDE_DMA_4_7
-
-/****************************************/
-/* Processor Address Space */
-/****************************************/
-
-/* DDR SDRAM BAR and size registers */
-
-#define MV64460_CS_0_BASE_ADDR 0x008
-#define MV64460_CS_0_SIZE 0x010
-#define MV64460_CS_1_BASE_ADDR 0x208
-#define MV64460_CS_1_SIZE 0x210
-#define MV64460_CS_2_BASE_ADDR 0x018
-#define MV64460_CS_2_SIZE 0x020
-#define MV64460_CS_3_BASE_ADDR 0x218
-#define MV64460_CS_3_SIZE 0x220
-
-/* Devices BAR and size registers */
-
-#define MV64460_DEV_CS0_BASE_ADDR 0x028
-#define MV64460_DEV_CS0_SIZE 0x030
-#define MV64460_DEV_CS1_BASE_ADDR 0x228
-#define MV64460_DEV_CS1_SIZE 0x230
-#define MV64460_DEV_CS2_BASE_ADDR 0x248
-#define MV64460_DEV_CS2_SIZE 0x250
-#define MV64460_DEV_CS3_BASE_ADDR 0x038
-#define MV64460_DEV_CS3_SIZE 0x040
-#define MV64460_BOOTCS_BASE_ADDR 0x238
-#define MV64460_BOOTCS_SIZE 0x240
-
-/* PCI 0 BAR and size registers */
-
-#define MV64460_PCI_0_IO_BASE_ADDR 0x048
-#define MV64460_PCI_0_IO_SIZE 0x050
-#define MV64460_PCI_0_MEMORY0_BASE_ADDR 0x058
-#define MV64460_PCI_0_MEMORY0_SIZE 0x060
-#define MV64460_PCI_0_MEMORY1_BASE_ADDR 0x080
-#define MV64460_PCI_0_MEMORY1_SIZE 0x088
-#define MV64460_PCI_0_MEMORY2_BASE_ADDR 0x258
-#define MV64460_PCI_0_MEMORY2_SIZE 0x260
-#define MV64460_PCI_0_MEMORY3_BASE_ADDR 0x280
-#define MV64460_PCI_0_MEMORY3_SIZE 0x288
-
-/* PCI 1 BAR and size registers */
-#define MV64460_PCI_1_IO_BASE_ADDR 0x090
-#define MV64460_PCI_1_IO_SIZE 0x098
-#define MV64460_PCI_1_MEMORY0_BASE_ADDR 0x0a0
-#define MV64460_PCI_1_MEMORY0_SIZE 0x0a8
-#define MV64460_PCI_1_MEMORY1_BASE_ADDR 0x0b0
-#define MV64460_PCI_1_MEMORY1_SIZE 0x0b8
-#define MV64460_PCI_1_MEMORY2_BASE_ADDR 0x2a0
-#define MV64460_PCI_1_MEMORY2_SIZE 0x2a8
-#define MV64460_PCI_1_MEMORY3_BASE_ADDR 0x2b0
-#define MV64460_PCI_1_MEMORY3_SIZE 0x2b8
-
-/* SRAM base address */
-#define MV64460_INTEGRATED_SRAM_BASE_ADDR 0x268
-
-/* internal registers space base address */
-#define MV64460_INTERNAL_SPACE_BASE_ADDR 0x068
-
-/* Enables the CS , DEV_CS , PCI 0 and PCI 1
- windows above */
-#define MV64460_BASE_ADDR_ENABLE 0x278
-
-/****************************************/
-/* PCI remap registers */
-/****************************************/
- /* PCI 0 */
-#define MV64460_PCI_0_IO_ADDR_REMAP 0x0f0
-#define MV64460_PCI_0_MEMORY0_LOW_ADDR_REMAP 0x0f8
-#define MV64460_PCI_0_MEMORY0_HIGH_ADDR_REMAP 0x320
-#define MV64460_PCI_0_MEMORY1_LOW_ADDR_REMAP 0x100
-#define MV64460_PCI_0_MEMORY1_HIGH_ADDR_REMAP 0x328
-#define MV64460_PCI_0_MEMORY2_LOW_ADDR_REMAP 0x2f8
-#define MV64460_PCI_0_MEMORY2_HIGH_ADDR_REMAP 0x330
-#define MV64460_PCI_0_MEMORY3_LOW_ADDR_REMAP 0x300
-#define MV64460_PCI_0_MEMORY3_HIGH_ADDR_REMAP 0x338
- /* PCI 1 */
-#define MV64460_PCI_1_IO_ADDR_REMAP 0x108
-#define MV64460_PCI_1_MEMORY0_LOW_ADDR_REMAP 0x110
-#define MV64460_PCI_1_MEMORY0_HIGH_ADDR_REMAP 0x340
-#define MV64460_PCI_1_MEMORY1_LOW_ADDR_REMAP 0x118
-#define MV64460_PCI_1_MEMORY1_HIGH_ADDR_REMAP 0x348
-#define MV64460_PCI_1_MEMORY2_LOW_ADDR_REMAP 0x310
-#define MV64460_PCI_1_MEMORY2_HIGH_ADDR_REMAP 0x350
-#define MV64460_PCI_1_MEMORY3_LOW_ADDR_REMAP 0x318
-#define MV64460_PCI_1_MEMORY3_HIGH_ADDR_REMAP 0x358
-
-#define MV64460_CPU_PCI_0_HEADERS_RETARGET_CONTROL 0x3b0
-#define MV64460_CPU_PCI_0_HEADERS_RETARGET_BASE 0x3b8
-#define MV64460_CPU_PCI_1_HEADERS_RETARGET_CONTROL 0x3c0
-#define MV64460_CPU_PCI_1_HEADERS_RETARGET_BASE 0x3c8
-#define MV64460_CPU_GE_HEADERS_RETARGET_CONTROL 0x3d0
-#define MV64460_CPU_GE_HEADERS_RETARGET_BASE 0x3d8
-#define MV64460_CPU_IDMA_HEADERS_RETARGET_CONTROL 0x3e0
-#define MV64460_CPU_IDMA_HEADERS_RETARGET_BASE 0x3e8
-
-/****************************************/
-/* CPU Control Registers */
-/****************************************/
-
-#define MV64460_CPU_CONFIG 0x000
-#define MV64460_CPU_MODE 0x120
-#define MV64460_CPU_MASTER_CONTROL 0x160
-#define MV64460_CPU_CROSS_BAR_CONTROL_LOW 0x150
-#define MV64460_CPU_CROSS_BAR_CONTROL_HIGH 0x158
-#define MV64460_CPU_CROSS_BAR_TIMEOUT 0x168
-
-/****************************************/
-/* SMP RegisterS */
-/****************************************/
-
-#define MV64460_SMP_WHO_AM_I 0x200
-#define MV64460_SMP_CPU0_DOORBELL 0x214
-#define MV64460_SMP_CPU0_DOORBELL_CLEAR 0x21C
-#define MV64460_SMP_CPU1_DOORBELL 0x224
-#define MV64460_SMP_CPU1_DOORBELL_CLEAR 0x22C
-#define MV64460_SMP_CPU0_DOORBELL_MASK 0x234
-#define MV64460_SMP_CPU1_DOORBELL_MASK 0x23C
-#define MV64460_SMP_SEMAPHOR0 0x244
-#define MV64460_SMP_SEMAPHOR1 0x24c
-#define MV64460_SMP_SEMAPHOR2 0x254
-#define MV64460_SMP_SEMAPHOR3 0x25c
-#define MV64460_SMP_SEMAPHOR4 0x264
-#define MV64460_SMP_SEMAPHOR5 0x26c
-#define MV64460_SMP_SEMAPHOR6 0x274
-#define MV64460_SMP_SEMAPHOR7 0x27c
-
-/****************************************/
-/* CPU Sync Barrier Register */
-/****************************************/
-
-#define MV64460_CPU_0_SYNC_BARRIER_TRIGGER 0x0c0
-#define MV64460_CPU_0_SYNC_BARRIER_VIRTUAL 0x0c8
-#define MV64460_CPU_1_SYNC_BARRIER_TRIGGER 0x0d0
-#define MV64460_CPU_1_SYNC_BARRIER_VIRTUAL 0x0d8
-
-/****************************************/
-/* CPU Access Protect */
-/****************************************/
-
-#define MV64460_CPU_PROTECT_WINDOW_0_BASE_ADDR 0x180
-#define MV64460_CPU_PROTECT_WINDOW_0_SIZE 0x188
-#define MV64460_CPU_PROTECT_WINDOW_1_BASE_ADDR 0x190
-#define MV64460_CPU_PROTECT_WINDOW_1_SIZE 0x198
-#define MV64460_CPU_PROTECT_WINDOW_2_BASE_ADDR 0x1a0
-#define MV64460_CPU_PROTECT_WINDOW_2_SIZE 0x1a8
-#define MV64460_CPU_PROTECT_WINDOW_3_BASE_ADDR 0x1b0
-#define MV64460_CPU_PROTECT_WINDOW_3_SIZE 0x1b8
-
-
-/****************************************/
-/* CPU Error Report */
-/****************************************/
-
-#define MV64460_CPU_ERROR_ADDR_LOW 0x070
-#define MV64460_CPU_ERROR_ADDR_HIGH 0x078
-#define MV64460_CPU_ERROR_DATA_LOW 0x128
-#define MV64460_CPU_ERROR_DATA_HIGH 0x130
-#define MV64460_CPU_ERROR_PARITY 0x138
-#define MV64460_CPU_ERROR_CAUSE 0x140
-#define MV64460_CPU_ERROR_MASK 0x148
-
-/****************************************/
-/* CPU Interface Debug Registers */
-/****************************************/
-
-#define MV64460_PUNIT_SLAVE_DEBUG_LOW 0x360
-#define MV64460_PUNIT_SLAVE_DEBUG_HIGH 0x368
-#define MV64460_PUNIT_MASTER_DEBUG_LOW 0x370
-#define MV64460_PUNIT_MASTER_DEBUG_HIGH 0x378
-#define MV64460_PUNIT_MMASK 0x3e4
-
-/****************************************/
-/* Integrated SRAM Registers */
-/****************************************/
-
-#define MV64460_SRAM_CONFIG 0x380
-#define MV64460_SRAM_TEST_MODE 0X3F4
-#define MV64460_SRAM_ERROR_CAUSE 0x388
-#define MV64460_SRAM_ERROR_ADDR 0x390
-#define MV64460_SRAM_ERROR_ADDR_HIGH 0X3F8
-#define MV64460_SRAM_ERROR_DATA_LOW 0x398
-#define MV64460_SRAM_ERROR_DATA_HIGH 0x3a0
-#define MV64460_SRAM_ERROR_DATA_PARITY 0x3a8
-
-/****************************************/
-/* SDRAM Configuration */
-/****************************************/
-
-#define MV64460_SDRAM_CONFIG 0x1400
-#define MV64460_D_UNIT_CONTROL_LOW 0x1404
-#define MV64460_D_UNIT_CONTROL_HIGH 0x1424
-#define MV64460_SDRAM_TIMING_CONTROL_LOW 0x1408
-#define MV64460_SDRAM_TIMING_CONTROL_HIGH 0x140c
-#define MV64460_SDRAM_ADDR_CONTROL 0x1410
-#define MV64460_SDRAM_OPEN_PAGES_CONTROL 0x1414
-#define MV64460_SDRAM_OPERATION 0x1418
-#define MV64460_SDRAM_MODE 0x141c
-#define MV64460_EXTENDED_DRAM_MODE 0x1420
-#define MV64460_SDRAM_CROSS_BAR_CONTROL_LOW 0x1430
-#define MV64460_SDRAM_CROSS_BAR_CONTROL_HIGH 0x1434
-#define MV64460_SDRAM_CROSS_BAR_TIMEOUT 0x1438
-#define MV64460_SDRAM_ADDR_CTRL_PADS_CALIBRATION 0x14c0
-#define MV64460_SDRAM_DATA_PADS_CALIBRATION 0x14c4
-
-/****************************************/
-/* SDRAM Error Report */
-/****************************************/
-
-#define MV64460_SDRAM_ERROR_DATA_LOW 0x1444
-#define MV64460_SDRAM_ERROR_DATA_HIGH 0x1440
-#define MV64460_SDRAM_ERROR_ADDR 0x1450
-#define MV64460_SDRAM_RECEIVED_ECC 0x1448
-#define MV64460_SDRAM_CALCULATED_ECC 0x144c
-#define MV64460_SDRAM_ECC_CONTROL 0x1454
-#define MV64460_SDRAM_ECC_ERROR_COUNTER 0x1458
-
-/******************************************/
-/* Controlled Delay Line (CDL) Registers */
-/******************************************/
-
-#define MV64460_DFCDL_CONFIG0 0x1480
-#define MV64460_DFCDL_CONFIG1 0x1484
-#define MV64460_DLL_WRITE 0x1488
-#define MV64460_DLL_READ 0x148c
-#define MV64460_SRAM_ADDR 0x1490
-#define MV64460_SRAM_DATA0 0x1494
-#define MV64460_SRAM_DATA1 0x1498
-#define MV64460_SRAM_DATA2 0x149c
-#define MV64460_DFCL_PROBE 0x14a0
-
-/******************************************/
-/* Debug Registers */
-/******************************************/
-
-#define MV64460_DUNIT_DEBUG_LOW 0x1460
-#define MV64460_DUNIT_DEBUG_HIGH 0x1464
-#define MV64460_DUNIT_MMASK 0X1b40
-
-/****************************************/
-/* Device Parameters */
-/****************************************/
-
-#define MV64460_DEVICE_BANK0_PARAMETERS 0x45c
-#define MV64460_DEVICE_BANK1_PARAMETERS 0x460
-#define MV64460_DEVICE_BANK2_PARAMETERS 0x464
-#define MV64460_DEVICE_BANK3_PARAMETERS 0x468
-#define MV64460_DEVICE_BOOT_BANK_PARAMETERS 0x46c
-#define MV64460_DEVICE_INTERFACE_CONTROL 0x4c0
-#define MV64460_DEVICE_INTERFACE_CROSS_BAR_CONTROL_LOW 0x4c8
-#define MV64460_DEVICE_INTERFACE_CROSS_BAR_CONTROL_HIGH 0x4cc
-#define MV64460_DEVICE_INTERFACE_CROSS_BAR_TIMEOUT 0x4c4
-
-/****************************************/
-/* Device interrupt registers */
-/****************************************/
-
-#define MV64460_DEVICE_INTERRUPT_CAUSE 0x4d0
-#define MV64460_DEVICE_INTERRUPT_MASK 0x4d4
-#define MV64460_DEVICE_ERROR_ADDR 0x4d8
-#define MV64460_DEVICE_ERROR_DATA 0x4dc
-#define MV64460_DEVICE_ERROR_PARITY 0x4e0
-
-/****************************************/
-/* Device debug registers */
-/****************************************/
-
-#define MV64460_DEVICE_DEBUG_LOW 0x4e4
-#define MV64460_DEVICE_DEBUG_HIGH 0x4e8
-#define MV64460_RUNIT_MMASK 0x4f0
-
-/****************************************/
-/* PCI Slave Address Decoding registers */
-/****************************************/
-
-#define MV64460_PCI_0_CS_0_BANK_SIZE 0xc08
-#define MV64460_PCI_1_CS_0_BANK_SIZE 0xc88
-#define MV64460_PCI_0_CS_1_BANK_SIZE 0xd08
-#define MV64460_PCI_1_CS_1_BANK_SIZE 0xd88
-#define MV64460_PCI_0_CS_2_BANK_SIZE 0xc0c
-#define MV64460_PCI_1_CS_2_BANK_SIZE 0xc8c
-#define MV64460_PCI_0_CS_3_BANK_SIZE 0xd0c
-#define MV64460_PCI_1_CS_3_BANK_SIZE 0xd8c
-#define MV64460_PCI_0_DEVCS_0_BANK_SIZE 0xc10
-#define MV64460_PCI_1_DEVCS_0_BANK_SIZE 0xc90
-#define MV64460_PCI_0_DEVCS_1_BANK_SIZE 0xd10
-#define MV64460_PCI_1_DEVCS_1_BANK_SIZE 0xd90
-#define MV64460_PCI_0_DEVCS_2_BANK_SIZE 0xd18
-#define MV64460_PCI_1_DEVCS_2_BANK_SIZE 0xd98
-#define MV64460_PCI_0_DEVCS_3_BANK_SIZE 0xc14
-#define MV64460_PCI_1_DEVCS_3_BANK_SIZE 0xc94
-#define MV64460_PCI_0_DEVCS_BOOT_BANK_SIZE 0xd14
-#define MV64460_PCI_1_DEVCS_BOOT_BANK_SIZE 0xd94
-#define MV64460_PCI_0_P2P_MEM0_BAR_SIZE 0xd1c
-#define MV64460_PCI_1_P2P_MEM0_BAR_SIZE 0xd9c
-#define MV64460_PCI_0_P2P_MEM1_BAR_SIZE 0xd20
-#define MV64460_PCI_1_P2P_MEM1_BAR_SIZE 0xda0
-#define MV64460_PCI_0_P2P_I_O_BAR_SIZE 0xd24
-#define MV64460_PCI_1_P2P_I_O_BAR_SIZE 0xda4
-#define MV64460_PCI_0_CPU_BAR_SIZE 0xd28
-#define MV64460_PCI_1_CPU_BAR_SIZE 0xda8
-#define MV64460_PCI_0_INTERNAL_SRAM_BAR_SIZE 0xe00
-#define MV64460_PCI_1_INTERNAL_SRAM_BAR_SIZE 0xe80
-#define MV64460_PCI_0_EXPANSION_ROM_BAR_SIZE 0xd2c
-#define MV64460_PCI_1_EXPANSION_ROM_BAR_SIZE 0xd9c
-#define MV64460_PCI_0_BASE_ADDR_REG_ENABLE 0xc3c
-#define MV64460_PCI_1_BASE_ADDR_REG_ENABLE 0xcbc
-#define MV64460_PCI_0_CS_0_BASE_ADDR_REMAP 0xc48
-#define MV64460_PCI_1_CS_0_BASE_ADDR_REMAP 0xcc8
-#define MV64460_PCI_0_CS_1_BASE_ADDR_REMAP 0xd48
-#define MV64460_PCI_1_CS_1_BASE_ADDR_REMAP 0xdc8
-#define MV64460_PCI_0_CS_2_BASE_ADDR_REMAP 0xc4c
-#define MV64460_PCI_1_CS_2_BASE_ADDR_REMAP 0xccc
-#define MV64460_PCI_0_CS_3_BASE_ADDR_REMAP 0xd4c
-#define MV64460_PCI_1_CS_3_BASE_ADDR_REMAP 0xdcc
-#define MV64460_PCI_0_CS_0_BASE_HIGH_ADDR_REMAP 0xF04
-#define MV64460_PCI_1_CS_0_BASE_HIGH_ADDR_REMAP 0xF84
-#define MV64460_PCI_0_CS_1_BASE_HIGH_ADDR_REMAP 0xF08
-#define MV64460_PCI_1_CS_1_BASE_HIGH_ADDR_REMAP 0xF88
-#define MV64460_PCI_0_CS_2_BASE_HIGH_ADDR_REMAP 0xF0C
-#define MV64460_PCI_1_CS_2_BASE_HIGH_ADDR_REMAP 0xF8C
-#define MV64460_PCI_0_CS_3_BASE_HIGH_ADDR_REMAP 0xF10
-#define MV64460_PCI_1_CS_3_BASE_HIGH_ADDR_REMAP 0xF90
-#define MV64460_PCI_0_DEVCS_0_BASE_ADDR_REMAP 0xc50
-#define MV64460_PCI_1_DEVCS_0_BASE_ADDR_REMAP 0xcd0
-#define MV64460_PCI_0_DEVCS_1_BASE_ADDR_REMAP 0xd50
-#define MV64460_PCI_1_DEVCS_1_BASE_ADDR_REMAP 0xdd0
-#define MV64460_PCI_0_DEVCS_2_BASE_ADDR_REMAP 0xd58
-#define MV64460_PCI_1_DEVCS_2_BASE_ADDR_REMAP 0xdd8
-#define MV64460_PCI_0_DEVCS_3_BASE_ADDR_REMAP 0xc54
-#define MV64460_PCI_1_DEVCS_3_BASE_ADDR_REMAP 0xcd4
-#define MV64460_PCI_0_DEVCS_BOOTCS_BASE_ADDR_REMAP 0xd54
-#define MV64460_PCI_1_DEVCS_BOOTCS_BASE_ADDR_REMAP 0xdd4
-#define MV64460_PCI_0_P2P_MEM0_BASE_ADDR_REMAP_LOW 0xd5c
-#define MV64460_PCI_1_P2P_MEM0_BASE_ADDR_REMAP_LOW 0xddc
-#define MV64460_PCI_0_P2P_MEM0_BASE_ADDR_REMAP_HIGH 0xd60
-#define MV64460_PCI_1_P2P_MEM0_BASE_ADDR_REMAP_HIGH 0xde0
-#define MV64460_PCI_0_P2P_MEM1_BASE_ADDR_REMAP_LOW 0xd64
-#define MV64460_PCI_1_P2P_MEM1_BASE_ADDR_REMAP_LOW 0xde4
-#define MV64460_PCI_0_P2P_MEM1_BASE_ADDR_REMAP_HIGH 0xd68
-#define MV64460_PCI_1_P2P_MEM1_BASE_ADDR_REMAP_HIGH 0xde8
-#define MV64460_PCI_0_P2P_I_O_BASE_ADDR_REMAP 0xd6c
-#define MV64460_PCI_1_P2P_I_O_BASE_ADDR_REMAP 0xdec
-#define MV64460_PCI_0_CPU_BASE_ADDR_REMAP_LOW 0xd70
-#define MV64460_PCI_1_CPU_BASE_ADDR_REMAP_LOW 0xdf0
-#define MV64460_PCI_0_CPU_BASE_ADDR_REMAP_HIGH 0xd74
-#define MV64460_PCI_1_CPU_BASE_ADDR_REMAP_HIGH 0xdf4
-#define MV64460_PCI_0_INTEGRATED_SRAM_BASE_ADDR_REMAP 0xf00
-#define MV64460_PCI_1_INTEGRATED_SRAM_BASE_ADDR_REMAP 0xf80
-#define MV64460_PCI_0_EXPANSION_ROM_BASE_ADDR_REMAP 0xf38
-#define MV64460_PCI_1_EXPANSION_ROM_BASE_ADDR_REMAP 0xfb8
-#define MV64460_PCI_0_ADDR_DECODE_CONTROL 0xd3c
-#define MV64460_PCI_1_ADDR_DECODE_CONTROL 0xdbc
-#define MV64460_PCI_0_HEADERS_RETARGET_CONTROL 0xF40
-#define MV64460_PCI_1_HEADERS_RETARGET_CONTROL 0xFc0
-#define MV64460_PCI_0_HEADERS_RETARGET_BASE 0xF44
-#define MV64460_PCI_1_HEADERS_RETARGET_BASE 0xFc4
-#define MV64460_PCI_0_HEADERS_RETARGET_HIGH 0xF48
-#define MV64460_PCI_1_HEADERS_RETARGET_HIGH 0xFc8
-
-/***********************************/
-/* PCI Control Register Map */
-/***********************************/
-
-#define MV64460_PCI_0_DLL_STATUS_AND_COMMAND 0x1d20
-#define MV64460_PCI_1_DLL_STATUS_AND_COMMAND 0x1da0
-#define MV64460_PCI_0_MPP_PADS_DRIVE_CONTROL 0x1d1C
-#define MV64460_PCI_1_MPP_PADS_DRIVE_CONTROL 0x1d9C
-#define MV64460_PCI_0_COMMAND 0xc00
-#define MV64460_PCI_1_COMMAND 0xc80
-#define MV64460_PCI_0_MODE 0xd00
-#define MV64460_PCI_1_MODE 0xd80
-#define MV64460_PCI_0_RETRY 0xc04
-#define MV64460_PCI_1_RETRY 0xc84
-#define MV64460_PCI_0_READ_BUFFER_DISCARD_TIMER 0xd04
-#define MV64460_PCI_1_READ_BUFFER_DISCARD_TIMER 0xd84
-#define MV64460_PCI_0_MSI_TRIGGER_TIMER 0xc38
-#define MV64460_PCI_1_MSI_TRIGGER_TIMER 0xcb8
-#define MV64460_PCI_0_ARBITER_CONTROL 0x1d00
-#define MV64460_PCI_1_ARBITER_CONTROL 0x1d80
-#define MV64460_PCI_0_CROSS_BAR_CONTROL_LOW 0x1d08
-#define MV64460_PCI_1_CROSS_BAR_CONTROL_LOW 0x1d88
-#define MV64460_PCI_0_CROSS_BAR_CONTROL_HIGH 0x1d0c
-#define MV64460_PCI_1_CROSS_BAR_CONTROL_HIGH 0x1d8c
-#define MV64460_PCI_0_CROSS_BAR_TIMEOUT 0x1d04
-#define MV64460_PCI_1_CROSS_BAR_TIMEOUT 0x1d84
-#define MV64460_PCI_0_SYNC_BARRIER_TRIGGER_REG 0x1D18
-#define MV64460_PCI_1_SYNC_BARRIER_TRIGGER_REG 0x1D98
-#define MV64460_PCI_0_SYNC_BARRIER_VIRTUAL_REG 0x1d10
-#define MV64460_PCI_1_SYNC_BARRIER_VIRTUAL_REG 0x1d90
-#define MV64460_PCI_0_P2P_CONFIG 0x1d14
-#define MV64460_PCI_1_P2P_CONFIG 0x1d94
-
-#define MV64460_PCI_0_ACCESS_CONTROL_BASE_0_LOW 0x1e00
-#define MV64460_PCI_0_ACCESS_CONTROL_BASE_0_HIGH 0x1e04
-#define MV64460_PCI_0_ACCESS_CONTROL_SIZE_0 0x1e08
-#define MV64460_PCI_0_ACCESS_CONTROL_BASE_1_LOW 0x1e10
-#define MV64460_PCI_0_ACCESS_CONTROL_BASE_1_HIGH 0x1e14
-#define MV64460_PCI_0_ACCESS_CONTROL_SIZE_1 0x1e18
-#define MV64460_PCI_0_ACCESS_CONTROL_BASE_2_LOW 0x1e20
-#define MV64460_PCI_0_ACCESS_CONTROL_BASE_2_HIGH 0x1e24
-#define MV64460_PCI_0_ACCESS_CONTROL_SIZE_2 0x1e28
-#define MV64460_PCI_0_ACCESS_CONTROL_BASE_3_LOW 0x1e30
-#define MV64460_PCI_0_ACCESS_CONTROL_BASE_3_HIGH 0x1e34
-#define MV64460_PCI_0_ACCESS_CONTROL_SIZE_3 0x1e38
-#define MV64460_PCI_0_ACCESS_CONTROL_BASE_4_LOW 0x1e40
-#define MV64460_PCI_0_ACCESS_CONTROL_BASE_4_HIGH 0x1e44
-#define MV64460_PCI_0_ACCESS_CONTROL_SIZE_4 0x1e48
-#define MV64460_PCI_0_ACCESS_CONTROL_BASE_5_LOW 0x1e50
-#define MV64460_PCI_0_ACCESS_CONTROL_BASE_5_HIGH 0x1e54
-#define MV64460_PCI_0_ACCESS_CONTROL_SIZE_5 0x1e58
-
-#define MV64460_PCI_1_ACCESS_CONTROL_BASE_0_LOW 0x1e80
-#define MV64460_PCI_1_ACCESS_CONTROL_BASE_0_HIGH 0x1e84
-#define MV64460_PCI_1_ACCESS_CONTROL_SIZE_0 0x1e88
-#define MV64460_PCI_1_ACCESS_CONTROL_BASE_1_LOW 0x1e90
-#define MV64460_PCI_1_ACCESS_CONTROL_BASE_1_HIGH 0x1e94
-#define MV64460_PCI_1_ACCESS_CONTROL_SIZE_1 0x1e98
-#define MV64460_PCI_1_ACCESS_CONTROL_BASE_2_LOW 0x1ea0
-#define MV64460_PCI_1_ACCESS_CONTROL_BASE_2_HIGH 0x1ea4
-#define MV64460_PCI_1_ACCESS_CONTROL_SIZE_2 0x1ea8
-#define MV64460_PCI_1_ACCESS_CONTROL_BASE_3_LOW 0x1eb0
-#define MV64460_PCI_1_ACCESS_CONTROL_BASE_3_HIGH 0x1eb4
-#define MV64460_PCI_1_ACCESS_CONTROL_SIZE_3 0x1eb8
-#define MV64460_PCI_1_ACCESS_CONTROL_BASE_4_LOW 0x1ec0
-#define MV64460_PCI_1_ACCESS_CONTROL_BASE_4_HIGH 0x1ec4
-#define MV64460_PCI_1_ACCESS_CONTROL_SIZE_4 0x1ec8
-#define MV64460_PCI_1_ACCESS_CONTROL_BASE_5_LOW 0x1ed0
-#define MV64460_PCI_1_ACCESS_CONTROL_BASE_5_HIGH 0x1ed4
-#define MV64460_PCI_1_ACCESS_CONTROL_SIZE_5 0x1ed8
-
-/****************************************/
-/* PCI Configuration Access Registers */
-/****************************************/
-
-#define MV64460_PCI_0_CONFIG_ADDR 0xcf8
-#define MV64460_PCI_0_CONFIG_DATA_VIRTUAL_REG 0xcfc
-#define MV64460_PCI_1_CONFIG_ADDR 0xc78
-#define MV64460_PCI_1_CONFIG_DATA_VIRTUAL_REG 0xc7c
-#define MV64460_PCI_0_INTERRUPT_ACKNOWLEDGE_VIRTUAL_REG 0xc34
-#define MV64460_PCI_1_INTERRUPT_ACKNOWLEDGE_VIRTUAL_REG 0xcb4
-
-/****************************************/
-/* PCI Error Report Registers */
-/****************************************/
-
-#define MV64460_PCI_0_SERR_MASK 0xc28
-#define MV64460_PCI_1_SERR_MASK 0xca8
-#define MV64460_PCI_0_ERROR_ADDR_LOW 0x1d40
-#define MV64460_PCI_1_ERROR_ADDR_LOW 0x1dc0
-#define MV64460_PCI_0_ERROR_ADDR_HIGH 0x1d44
-#define MV64460_PCI_1_ERROR_ADDR_HIGH 0x1dc4
-#define MV64460_PCI_0_ERROR_ATTRIBUTE 0x1d48
-#define MV64460_PCI_1_ERROR_ATTRIBUTE 0x1dc8
-#define MV64460_PCI_0_ERROR_COMMAND 0x1d50
-#define MV64460_PCI_1_ERROR_COMMAND 0x1dd0
-#define MV64460_PCI_0_ERROR_CAUSE 0x1d58
-#define MV64460_PCI_1_ERROR_CAUSE 0x1dd8
-#define MV64460_PCI_0_ERROR_MASK 0x1d5c
-#define MV64460_PCI_1_ERROR_MASK 0x1ddc
-
-/****************************************/
-/* PCI Debug Registers */
-/****************************************/
-
-#define MV64460_PCI_0_MMASK 0X1D24
-#define MV64460_PCI_1_MMASK 0X1DA4
-
-/*********************************************/
-/* PCI Configuration, Function 0, Registers */
-/*********************************************/
-
-#define MV64460_PCI_DEVICE_AND_VENDOR_ID 0x000
-#define MV64460_PCI_STATUS_AND_COMMAND 0x004
-#define MV64460_PCI_CLASS_CODE_AND_REVISION_ID 0x008
-#define MV64460_PCI_BIST_HEADER_TYPE_LATENCY_TIMER_CACHE_LINE 0x00C
-
-#define MV64460_PCI_SCS_0_BASE_ADDR_LOW 0x010
-#define MV64460_PCI_SCS_0_BASE_ADDR_HIGH 0x014
-#define MV64460_PCI_SCS_1_BASE_ADDR_LOW 0x018
-#define MV64460_PCI_SCS_1_BASE_ADDR_HIGH 0x01C
-#define MV64460_PCI_INTERNAL_REG_MEM_MAPPED_BASE_ADDR_LOW 0x020
-#define MV64460_PCI_INTERNAL_REG_MEM_MAPPED_BASE_ADDR_HIGH 0x024
-#define MV64460_PCI_SUBSYSTEM_ID_AND_SUBSYSTEM_VENDOR_ID 0x02c
-#define MV64460_PCI_EXPANSION_ROM_BASE_ADDR_REG 0x030
-#define MV64460_PCI_CAPABILTY_LIST_POINTER 0x034
-#define MV64460_PCI_INTERRUPT_PIN_AND_LINE 0x03C
- /* capability list */
-#define MV64460_PCI_POWER_MANAGEMENT_CAPABILITY 0x040
-#define MV64460_PCI_POWER_MANAGEMENT_STATUS_AND_CONTROL 0x044
-#define MV64460_PCI_VPD_ADDR 0x048
-#define MV64460_PCI_VPD_DATA 0x04c
-#define MV64460_PCI_MSI_MESSAGE_CONTROL 0x050
-#define MV64460_PCI_MSI_MESSAGE_ADDR 0x054
-#define MV64460_PCI_MSI_MESSAGE_UPPER_ADDR 0x058
-#define MV64460_PCI_MSI_MESSAGE_DATA 0x05c
-#define MV64460_PCI_X_COMMAND 0x060
-#define MV64460_PCI_X_STATUS 0x064
-#define MV64460_PCI_COMPACT_PCI_HOT_SWAP 0x068
-
-/***********************************************/
-/* PCI Configuration, Function 1, Registers */
-/***********************************************/
-
-#define MV64460_PCI_SCS_2_BASE_ADDR_LOW 0x110
-#define MV64460_PCI_SCS_2_BASE_ADDR_HIGH 0x114
-#define MV64460_PCI_SCS_3_BASE_ADDR_LOW 0x118
-#define MV64460_PCI_SCS_3_BASE_ADDR_HIGH 0x11c
-#define MV64460_PCI_INTERNAL_SRAM_BASE_ADDR_LOW 0x120
-#define MV64460_PCI_INTERNAL_SRAM_BASE_ADDR_HIGH 0x124
-
-/***********************************************/
-/* PCI Configuration, Function 2, Registers */
-/***********************************************/
-
-#define MV64460_PCI_DEVCS_0_BASE_ADDR_LOW 0x210
-#define MV64460_PCI_DEVCS_0_BASE_ADDR_HIGH 0x214
-#define MV64460_PCI_DEVCS_1_BASE_ADDR_LOW 0x218
-#define MV64460_PCI_DEVCS_1_BASE_ADDR_HIGH 0x21c
-#define MV64460_PCI_DEVCS_2_BASE_ADDR_LOW 0x220
-#define MV64460_PCI_DEVCS_2_BASE_ADDR_HIGH 0x224
-
-/***********************************************/
-/* PCI Configuration, Function 3, Registers */
-/***********************************************/
-
-#define MV64460_PCI_DEVCS_3_BASE_ADDR_LOW 0x310
-#define MV64460_PCI_DEVCS_3_BASE_ADDR_HIGH 0x314
-#define MV64460_PCI_BOOT_CS_BASE_ADDR_LOW 0x318
-#define MV64460_PCI_BOOT_CS_BASE_ADDR_HIGH 0x31c
-#define MV64460_PCI_CPU_BASE_ADDR_LOW 0x220
-#define MV64460_PCI_CPU_BASE_ADDR_HIGH 0x224
-
-/***********************************************/
-/* PCI Configuration, Function 4, Registers */
-/***********************************************/
-
-#define MV64460_PCI_P2P_MEM0_BASE_ADDR_LOW 0x410
-#define MV64460_PCI_P2P_MEM0_BASE_ADDR_HIGH 0x414
-#define MV64460_PCI_P2P_MEM1_BASE_ADDR_LOW 0x418
-#define MV64460_PCI_P2P_MEM1_BASE_ADDR_HIGH 0x41c
-#define MV64460_PCI_P2P_I_O_BASE_ADDR 0x420
-#define MV64460_PCI_INTERNAL_REGS_I_O_MAPPED_BASE_ADDR 0x424
-
-/****************************************/
-/* Messaging Unit Registers (I20) */
-/****************************************/
-
-#define MV64460_I2O_INBOUND_MESSAGE_REG0_PCI_0_SIDE 0x010
-#define MV64460_I2O_INBOUND_MESSAGE_REG1_PCI_0_SIDE 0x014
-#define MV64460_I2O_OUTBOUND_MESSAGE_REG0_PCI_0_SIDE 0x018
-#define MV64460_I2O_OUTBOUND_MESSAGE_REG1_PCI_0_SIDE 0x01C
-#define MV64460_I2O_INBOUND_DOORBELL_REG_PCI_0_SIDE 0x020
-#define MV64460_I2O_INBOUND_INTERRUPT_CAUSE_REG_PCI_0_SIDE 0x024
-#define MV64460_I2O_INBOUND_INTERRUPT_MASK_REG_PCI_0_SIDE 0x028
-#define MV64460_I2O_OUTBOUND_DOORBELL_REG_PCI_0_SIDE 0x02C
-#define MV64460_I2O_OUTBOUND_INTERRUPT_CAUSE_REG_PCI_0_SIDE 0x030
-#define MV64460_I2O_OUTBOUND_INTERRUPT_MASK_REG_PCI_0_SIDE 0x034
-#define MV64460_I2O_INBOUND_QUEUE_PORT_VIRTUAL_REG_PCI_0_SIDE 0x040
-#define MV64460_I2O_OUTBOUND_QUEUE_PORT_VIRTUAL_REG_PCI_0_SIDE 0x044
-#define MV64460_I2O_QUEUE_CONTROL_REG_PCI_0_SIDE 0x050
-#define MV64460_I2O_QUEUE_BASE_ADDR_REG_PCI_0_SIDE 0x054
-#define MV64460_I2O_INBOUND_FREE_HEAD_POINTER_REG_PCI_0_SIDE 0x060
-#define MV64460_I2O_INBOUND_FREE_TAIL_POINTER_REG_PCI_0_SIDE 0x064
-#define MV64460_I2O_INBOUND_POST_HEAD_POINTER_REG_PCI_0_SIDE 0x068
-#define MV64460_I2O_INBOUND_POST_TAIL_POINTER_REG_PCI_0_SIDE 0x06C
-#define MV64460_I2O_OUTBOUND_FREE_HEAD_POINTER_REG_PCI_0_SIDE 0x070
-#define MV64460_I2O_OUTBOUND_FREE_TAIL_POINTER_REG_PCI_0_SIDE 0x074
-#define MV64460_I2O_OUTBOUND_POST_HEAD_POINTER_REG_PCI_0_SIDE 0x0F8
-#define MV64460_I2O_OUTBOUND_POST_TAIL_POINTER_REG_PCI_0_SIDE 0x0FC
-
-#define MV64460_I2O_INBOUND_MESSAGE_REG0_PCI_1_SIDE 0x090
-#define MV64460_I2O_INBOUND_MESSAGE_REG1_PCI_1_SIDE 0x094
-#define MV64460_I2O_OUTBOUND_MESSAGE_REG0_PCI_1_SIDE 0x098
-#define MV64460_I2O_OUTBOUND_MESSAGE_REG1_PCI_1_SIDE 0x09C
-#define MV64460_I2O_INBOUND_DOORBELL_REG_PCI_1_SIDE 0x0A0
-#define MV64460_I2O_INBOUND_INTERRUPT_CAUSE_REG_PCI_1_SIDE 0x0A4
-#define MV64460_I2O_INBOUND_INTERRUPT_MASK_REG_PCI_1_SIDE 0x0A8
-#define MV64460_I2O_OUTBOUND_DOORBELL_REG_PCI_1_SIDE 0x0AC
-#define MV64460_I2O_OUTBOUND_INTERRUPT_CAUSE_REG_PCI_1_SIDE 0x0B0
-#define MV64460_I2O_OUTBOUND_INTERRUPT_MASK_REG_PCI_1_SIDE 0x0B4
-#define MV64460_I2O_INBOUND_QUEUE_PORT_VIRTUAL_REG_PCI_1_SIDE 0x0C0
-#define MV64460_I2O_OUTBOUND_QUEUE_PORT_VIRTUAL_REG_PCI_1_SIDE 0x0C4
-#define MV64460_I2O_QUEUE_CONTROL_REG_PCI_1_SIDE 0x0D0
-#define MV64460_I2O_QUEUE_BASE_ADDR_REG_PCI_1_SIDE 0x0D4
-#define MV64460_I2O_INBOUND_FREE_HEAD_POINTER_REG_PCI_1_SIDE 0x0E0
-#define MV64460_I2O_INBOUND_FREE_TAIL_POINTER_REG_PCI_1_SIDE 0x0E4
-#define MV64460_I2O_INBOUND_POST_HEAD_POINTER_REG_PCI_1_SIDE 0x0E8
-#define MV64460_I2O_INBOUND_POST_TAIL_POINTER_REG_PCI_1_SIDE 0x0EC
-#define MV64460_I2O_OUTBOUND_FREE_HEAD_POINTER_REG_PCI_1_SIDE 0x0F0
-#define MV64460_I2O_OUTBOUND_FREE_TAIL_POINTER_REG_PCI_1_SIDE 0x0F4
-#define MV64460_I2O_OUTBOUND_POST_HEAD_POINTER_REG_PCI_1_SIDE 0x078
-#define MV64460_I2O_OUTBOUND_POST_TAIL_POINTER_REG_PCI_1_SIDE 0x07C
-
-#define MV64460_I2O_INBOUND_MESSAGE_REG0_CPU0_SIDE 0x1C10
-#define MV64460_I2O_INBOUND_MESSAGE_REG1_CPU0_SIDE 0x1C14
-#define MV64460_I2O_OUTBOUND_MESSAGE_REG0_CPU0_SIDE 0x1C18
-#define MV64460_I2O_OUTBOUND_MESSAGE_REG1_CPU0_SIDE 0x1C1C
-#define MV64460_I2O_INBOUND_DOORBELL_REG_CPU0_SIDE 0x1C20
-#define MV64460_I2O_INBOUND_INTERRUPT_CAUSE_REG_CPU0_SIDE 0x1C24
-#define MV64460_I2O_INBOUND_INTERRUPT_MASK_REG_CPU0_SIDE 0x1C28
-#define MV64460_I2O_OUTBOUND_DOORBELL_REG_CPU0_SIDE 0x1C2C
-#define MV64460_I2O_OUTBOUND_INTERRUPT_CAUSE_REG_CPU0_SIDE 0x1C30
-#define MV64460_I2O_OUTBOUND_INTERRUPT_MASK_REG_CPU0_SIDE 0x1C34
-#define MV64460_I2O_INBOUND_QUEUE_PORT_VIRTUAL_REG_CPU0_SIDE 0x1C40
-#define MV64460_I2O_OUTBOUND_QUEUE_PORT_VIRTUAL_REG_CPU0_SIDE 0x1C44
-#define MV64460_I2O_QUEUE_CONTROL_REG_CPU0_SIDE 0x1C50
-#define MV64460_I2O_QUEUE_BASE_ADDR_REG_CPU0_SIDE 0x1C54
-#define MV64460_I2O_INBOUND_FREE_HEAD_POINTER_REG_CPU0_SIDE 0x1C60
-#define MV64460_I2O_INBOUND_FREE_TAIL_POINTER_REG_CPU0_SIDE 0x1C64
-#define MV64460_I2O_INBOUND_POST_HEAD_POINTER_REG_CPU0_SIDE 0x1C68
-#define MV64460_I2O_INBOUND_POST_TAIL_POINTER_REG_CPU0_SIDE 0x1C6C
-#define MV64460_I2O_OUTBOUND_FREE_HEAD_POINTER_REG_CPU0_SIDE 0x1C70
-#define MV64460_I2O_OUTBOUND_FREE_TAIL_POINTER_REG_CPU0_SIDE 0x1C74
-#define MV64460_I2O_OUTBOUND_POST_HEAD_POINTER_REG_CPU0_SIDE 0x1CF8
-#define MV64460_I2O_OUTBOUND_POST_TAIL_POINTER_REG_CPU0_SIDE 0x1CFC
-#define MV64460_I2O_INBOUND_MESSAGE_REG0_CPU1_SIDE 0x1C90
-#define MV64460_I2O_INBOUND_MESSAGE_REG1_CPU1_SIDE 0x1C94
-#define MV64460_I2O_OUTBOUND_MESSAGE_REG0_CPU1_SIDE 0x1C98
-#define MV64460_I2O_OUTBOUND_MESSAGE_REG1_CPU1_SIDE 0x1C9C
-#define MV64460_I2O_INBOUND_DOORBELL_REG_CPU1_SIDE 0x1CA0
-#define MV64460_I2O_INBOUND_INTERRUPT_CAUSE_REG_CPU1_SIDE 0x1CA4
-#define MV64460_I2O_INBOUND_INTERRUPT_MASK_REG_CPU1_SIDE 0x1CA8
-#define MV64460_I2O_OUTBOUND_DOORBELL_REG_CPU1_SIDE 0x1CAC
-#define MV64460_I2O_OUTBOUND_INTERRUPT_CAUSE_REG_CPU1_SIDE 0x1CB0
-#define MV64460_I2O_OUTBOUND_INTERRUPT_MASK_REG_CPU1_SIDE 0x1CB4
-#define MV64460_I2O_INBOUND_QUEUE_PORT_VIRTUAL_REG_CPU1_SIDE 0x1CC0
-#define MV64460_I2O_OUTBOUND_QUEUE_PORT_VIRTUAL_REG_CPU1_SIDE 0x1CC4
-#define MV64460_I2O_QUEUE_CONTROL_REG_CPU1_SIDE 0x1CD0
-#define MV64460_I2O_QUEUE_BASE_ADDR_REG_CPU1_SIDE 0x1CD4
-#define MV64460_I2O_INBOUND_FREE_HEAD_POINTER_REG_CPU1_SIDE 0x1CE0
-#define MV64460_I2O_INBOUND_FREE_TAIL_POINTER_REG_CPU1_SIDE 0x1CE4
-#define MV64460_I2O_INBOUND_POST_HEAD_POINTER_REG_CPU1_SIDE 0x1CE8
-#define MV64460_I2O_INBOUND_POST_TAIL_POINTER_REG_CPU1_SIDE 0x1CEC
-#define MV64460_I2O_OUTBOUND_FREE_HEAD_POINTER_REG_CPU1_SIDE 0x1CF0
-#define MV64460_I2O_OUTBOUND_FREE_TAIL_POINTER_REG_CPU1_SIDE 0x1CF4
-#define MV64460_I2O_OUTBOUND_POST_HEAD_POINTER_REG_CPU1_SIDE 0x1C78
-#define MV64460_I2O_OUTBOUND_POST_TAIL_POINTER_REG_CPU1_SIDE 0x1C7C
-
-/****************************************/
-/* Ethernet Unit Registers */
-/****************************************/
-
-#define MV64460_ETH_PHY_ADDR_REG 0x2000
-#define MV64460_ETH_SMI_REG 0x2004
-#define MV64460_ETH_UNIT_DEFAULT_ADDR_REG 0x2008
-#define MV64460_ETH_UNIT_DEFAULTID_REG 0x200c
-#define MV64460_ETH_UNIT_INTERRUPT_CAUSE_REG 0x2080
-#define MV64460_ETH_UNIT_INTERRUPT_MASK_REG 0x2084
-#define MV64460_ETH_UNIT_INTERNAL_USE_REG 0x24fc
-#define MV64460_ETH_UNIT_ERROR_ADDR_REG 0x2094
-#define MV64460_ETH_BAR_0 0x2200
-#define MV64460_ETH_BAR_1 0x2208
-#define MV64460_ETH_BAR_2 0x2210
-#define MV64460_ETH_BAR_3 0x2218
-#define MV64460_ETH_BAR_4 0x2220
-#define MV64460_ETH_BAR_5 0x2228
-#define MV64460_ETH_SIZE_REG_0 0x2204
-#define MV64460_ETH_SIZE_REG_1 0x220c
-#define MV64460_ETH_SIZE_REG_2 0x2214
-#define MV64460_ETH_SIZE_REG_3 0x221c
-#define MV64460_ETH_SIZE_REG_4 0x2224
-#define MV64460_ETH_SIZE_REG_5 0x222c
-#define MV64460_ETH_HEADERS_RETARGET_BASE_REG 0x2230
-#define MV64460_ETH_HEADERS_RETARGET_CONTROL_REG 0x2234
-#define MV64460_ETH_HIGH_ADDR_REMAP_REG_0 0x2280
-#define MV64460_ETH_HIGH_ADDR_REMAP_REG_1 0x2284
-#define MV64460_ETH_HIGH_ADDR_REMAP_REG_2 0x2288
-#define MV64460_ETH_HIGH_ADDR_REMAP_REG_3 0x228c
-#define MV64460_ETH_BASE_ADDR_ENABLE_REG 0x2290
-#define MV64460_ETH_ACCESS_PROTECTION_REG(port) (0x2294 + (port<<2))
-#define MV64460_ETH_MIB_COUNTERS_BASE(port) (0x3000 + (port<<7))
-#define MV64460_ETH_PORT_CONFIG_REG(port) (0x2400 + (port<<10))
-#define MV64460_ETH_PORT_CONFIG_EXTEND_REG(port) (0x2404 + (port<<10))
-#define MV64460_ETH_MII_SERIAL_PARAMETRS_REG(port) (0x2408 + (port<<10))
-#define MV64460_ETH_GMII_SERIAL_PARAMETRS_REG(port) (0x240c + (port<<10))
-#define MV64460_ETH_VLAN_ETHERTYPE_REG(port) (0x2410 + (port<<10))
-#define MV64460_ETH_MAC_ADDR_LOW(port) (0x2414 + (port<<10))
-#define MV64460_ETH_MAC_ADDR_HIGH(port) (0x2418 + (port<<10))
-#define MV64460_ETH_SDMA_CONFIG_REG(port) (0x241c + (port<<10))
-#define MV64460_ETH_DSCP_0(port) (0x2420 + (port<<10))
-#define MV64460_ETH_DSCP_1(port) (0x2424 + (port<<10))
-#define MV64460_ETH_DSCP_2(port) (0x2428 + (port<<10))
-#define MV64460_ETH_DSCP_3(port) (0x242c + (port<<10))
-#define MV64460_ETH_DSCP_4(port) (0x2430 + (port<<10))
-#define MV64460_ETH_DSCP_5(port) (0x2434 + (port<<10))
-#define MV64460_ETH_DSCP_6(port) (0x2438 + (port<<10))
-#define MV64460_ETH_PORT_SERIAL_CONTROL_REG(port) (0x243c + (port<<10))
-#define MV64460_ETH_VLAN_PRIORITY_TAG_TO_PRIORITY(port) (0x2440 + (port<<10))
-#define MV64460_ETH_PORT_STATUS_REG(port) (0x2444 + (port<<10))
-#define MV64460_ETH_TRANSMIT_QUEUE_COMMAND_REG(port) (0x2448 + (port<<10))
-#define MV64460_ETH_TX_QUEUE_FIXED_PRIORITY(port) (0x244c + (port<<10))
-#define MV64460_ETH_PORT_TX_TOKEN_BUCKET_RATE_CONFIG(port) (0x2450 + (port<<10))
-#define MV64460_ETH_MAXIMUM_TRANSMIT_UNIT(port) (0x2458 + (port<<10))
-#define MV64460_ETH_PORT_MAXIMUM_TOKEN_BUCKET_SIZE(port) (0x245c + (port<<10))
-#define MV64460_ETH_INTERRUPT_CAUSE_REG(port) (0x2460 + (port<<10))
-#define MV64460_ETH_INTERRUPT_CAUSE_EXTEND_REG(port) (0x2464 + (port<<10))
-#define MV64460_ETH_INTERRUPT_MASK_REG(port) (0x2468 + (port<<10))
-#define MV64460_ETH_INTERRUPT_EXTEND_MASK_REG(port) (0x246c + (port<<10))
-#define MV64460_ETH_RX_FIFO_URGENT_THRESHOLD_REG(port) (0x2470 + (port<<10))
-#define MV64460_ETH_TX_FIFO_URGENT_THRESHOLD_REG(port) (0x2474 + (port<<10))
-#define MV64460_ETH_RX_MINIMAL_FRAME_SIZE_REG(port) (0x247c + (port<<10))
-#define MV64460_ETH_RX_DISCARDED_FRAMES_COUNTER(port) (0x2484 + (port<<10)
-#define MV64460_ETH_PORT_DEBUG_0_REG(port) (0x248c + (port<<10))
-#define MV64460_ETH_PORT_DEBUG_1_REG(port) (0x2490 + (port<<10))
-#define MV64460_ETH_PORT_INTERNAL_ADDR_ERROR_REG(port) (0x2494 + (port<<10))
-#define MV64460_ETH_INTERNAL_USE_REG(port) (0x24fc + (port<<10))
-#define MV64460_ETH_RECEIVE_QUEUE_COMMAND_REG(port) (0x2680 + (port<<10))
-#define MV64460_ETH_CURRENT_SERVED_TX_DESC_PTR(port) (0x2684 + (port<<10))
-#define MV64460_ETH_RX_CURRENT_QUEUE_DESC_PTR_0(port) (0x260c + (port<<10))
-#define MV64460_ETH_RX_CURRENT_QUEUE_DESC_PTR_1(port) (0x261c + (port<<10))
-#define MV64460_ETH_RX_CURRENT_QUEUE_DESC_PTR_2(port) (0x262c + (port<<10))
-#define MV64460_ETH_RX_CURRENT_QUEUE_DESC_PTR_3(port) (0x263c + (port<<10))
-#define MV64460_ETH_RX_CURRENT_QUEUE_DESC_PTR_4(port) (0x264c + (port<<10))
-#define MV64460_ETH_RX_CURRENT_QUEUE_DESC_PTR_5(port) (0x265c + (port<<10))
-#define MV64460_ETH_RX_CURRENT_QUEUE_DESC_PTR_6(port) (0x266c + (port<<10))
-#define MV64460_ETH_RX_CURRENT_QUEUE_DESC_PTR_7(port) (0x267c + (port<<10))
-#define MV64460_ETH_TX_CURRENT_QUEUE_DESC_PTR_0(port) (0x26c0 + (port<<10))
-#define MV64460_ETH_TX_CURRENT_QUEUE_DESC_PTR_1(port) (0x26c4 + (port<<10))
-#define MV64460_ETH_TX_CURRENT_QUEUE_DESC_PTR_2(port) (0x26c8 + (port<<10))
-#define MV64460_ETH_TX_CURRENT_QUEUE_DESC_PTR_3(port) (0x26cc + (port<<10))
-#define MV64460_ETH_TX_CURRENT_QUEUE_DESC_PTR_4(port) (0x26d0 + (port<<10))
-#define MV64460_ETH_TX_CURRENT_QUEUE_DESC_PTR_5(port) (0x26d4 + (port<<10))
-#define MV64460_ETH_TX_CURRENT_QUEUE_DESC_PTR_6(port) (0x26d8 + (port<<10))
-#define MV64460_ETH_TX_CURRENT_QUEUE_DESC_PTR_7(port) (0x26dc + (port<<10))
-#define MV64460_ETH_TX_QUEUE_0_TOKEN_BUCKET_COUNT(port) (0x2700 + (port<<10))
-#define MV64460_ETH_TX_QUEUE_1_TOKEN_BUCKET_COUNT(port) (0x2710 + (port<<10))
-#define MV64460_ETH_TX_QUEUE_2_TOKEN_BUCKET_COUNT(port) (0x2720 + (port<<10))
-#define MV64460_ETH_TX_QUEUE_3_TOKEN_BUCKET_COUNT(port) (0x2730 + (port<<10))
-#define MV64460_ETH_TX_QUEUE_4_TOKEN_BUCKET_COUNT(port) (0x2740 + (port<<10))
-#define MV64460_ETH_TX_QUEUE_5_TOKEN_BUCKET_COUNT(port) (0x2750 + (port<<10))
-#define MV64460_ETH_TX_QUEUE_6_TOKEN_BUCKET_COUNT(port) (0x2760 + (port<<10))
-#define MV64460_ETH_TX_QUEUE_7_TOKEN_BUCKET_COUNT(port) (0x2770 + (port<<10))
-#define MV64460_ETH_TX_QUEUE_0_TOKEN_BUCKET_CONFIG(port) (0x2704 + (port<<10))
-#define MV64460_ETH_TX_QUEUE_1_TOKEN_BUCKET_CONFIG(port) (0x2714 + (port<<10))
-#define MV64460_ETH_TX_QUEUE_2_TOKEN_BUCKET_CONFIG(port) (0x2724 + (port<<10))
-#define MV64460_ETH_TX_QUEUE_3_TOKEN_BUCKET_CONFIG(port) (0x2734 + (port<<10))
-#define MV64460_ETH_TX_QUEUE_4_TOKEN_BUCKET_CONFIG(port) (0x2744 + (port<<10))
-#define MV64460_ETH_TX_QUEUE_5_TOKEN_BUCKET_CONFIG(port) (0x2754 + (port<<10))
-#define MV64460_ETH_TX_QUEUE_6_TOKEN_BUCKET_CONFIG(port) (0x2764 + (port<<10))
-#define MV64460_ETH_TX_QUEUE_7_TOKEN_BUCKET_CONFIG(port) (0x2774 + (port<<10))
-#define MV64460_ETH_TX_QUEUE_0_ARBITER_CONFIG(port) (0x2708 + (port<<10))
-#define MV64460_ETH_TX_QUEUE_1_ARBITER_CONFIG(port) (0x2718 + (port<<10))
-#define MV64460_ETH_TX_QUEUE_2_ARBITER_CONFIG(port) (0x2728 + (port<<10))
-#define MV64460_ETH_TX_QUEUE_3_ARBITER_CONFIG(port) (0x2738 + (port<<10))
-#define MV64460_ETH_TX_QUEUE_4_ARBITER_CONFIG(port) (0x2748 + (port<<10))
-#define MV64460_ETH_TX_QUEUE_5_ARBITER_CONFIG(port) (0x2758 + (port<<10))
-#define MV64460_ETH_TX_QUEUE_6_ARBITER_CONFIG(port) (0x2768 + (port<<10))
-#define MV64460_ETH_TX_QUEUE_7_ARBITER_CONFIG(port) (0x2778 + (port<<10))
-#define MV64460_ETH_PORT_TX_TOKEN_BUCKET_COUNT(port) (0x2780 + (port<<10))
-#define MV64460_ETH_DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE(port) (0x3400 + (port<<10))
-#define MV64460_ETH_DA_FILTER_OTHER_MULTICAST_TABLE_BASE(port) (0x3500 + (port<<10))
-#define MV64460_ETH_DA_FILTER_UNICAST_TABLE_BASE(port) (0x3600 + (port<<10))
-
-/*******************************************/
-/* CUNIT Registers */
-/*******************************************/
-
- /* Address Decoding Register Map */
-
-#define MV64460_CUNIT_BASE_ADDR_REG0 0xf200
-#define MV64460_CUNIT_BASE_ADDR_REG1 0xf208
-#define MV64460_CUNIT_BASE_ADDR_REG2 0xf210
-#define MV64460_CUNIT_BASE_ADDR_REG3 0xf218
-#define MV64460_CUNIT_SIZE0 0xf204
-#define MV64460_CUNIT_SIZE1 0xf20c
-#define MV64460_CUNIT_SIZE2 0xf214
-#define MV64460_CUNIT_SIZE3 0xf21c
-#define MV64460_CUNIT_HIGH_ADDR_REMAP_REG0 0xf240
-#define MV64460_CUNIT_HIGH_ADDR_REMAP_REG1 0xf244
-#define MV64460_CUNIT_BASE_ADDR_ENABLE_REG 0xf250
-#define MV64460_MPSC0_ACCESS_PROTECTION_REG 0xf254
-#define MV64460_MPSC1_ACCESS_PROTECTION_REG 0xf258
-#define MV64460_CUNIT_INTERNAL_SPACE_BASE_ADDR_REG 0xf25C
-
- /* Error Report Registers */
-
-#define MV64460_CUNIT_INTERRUPT_CAUSE_REG 0xf310
-#define MV64460_CUNIT_INTERRUPT_MASK_REG 0xf314
-#define MV64460_CUNIT_ERROR_ADDR 0xf318
-
- /* Cunit Control Registers */
-
-#define MV64460_CUNIT_ARBITER_CONTROL_REG 0xf300
-#define MV64460_CUNIT_CONFIG_REG 0xb40c
-#define MV64460_CUNIT_CRROSBAR_TIMEOUT_REG 0xf304
-
- /* Cunit Debug Registers */
-
-#define MV64460_CUNIT_DEBUG_LOW 0xf340
-#define MV64460_CUNIT_DEBUG_HIGH 0xf344
-#define MV64460_CUNIT_MMASK 0xf380
-
- /* Cunit Base Address Enable Window Bits*/
-#define MV64460_CUNIT_BASE_ADDR_WIN_0_BIT 0x0
-#define MV64460_CUNIT_BASE_ADDR_WIN_1_BIT 0x1
-#define MV64460_CUNIT_BASE_ADDR_WIN_2_BIT 0x2
-#define MV64460_CUNIT_BASE_ADDR_WIN_3_BIT 0x3
-
- /* MPSCs Clocks Routing Registers */
-
-#define MV64460_MPSC_ROUTING_REG 0xb400
-#define MV64460_MPSC_RX_CLOCK_ROUTING_REG 0xb404
-#define MV64460_MPSC_TX_CLOCK_ROUTING_REG 0xb408
-
- /* MPSCs Interrupts Registers */
-
-#define MV64460_MPSC_CAUSE_REG(port) (0xb804 + (port<<3))
-#define MV64460_MPSC_MASK_REG(port) (0xb884 + (port<<3))
-
-#define MV64460_MPSC_MAIN_CONFIG_LOW(port) (0x8000 + (port<<12))
-#define MV64460_MPSC_MAIN_CONFIG_HIGH(port) (0x8004 + (port<<12))
-#define MV64460_MPSC_PROTOCOL_CONFIG(port) (0x8008 + (port<<12))
-#define MV64460_MPSC_CHANNEL_REG1(port) (0x800c + (port<<12))
-#define MV64460_MPSC_CHANNEL_REG2(port) (0x8010 + (port<<12))
-#define MV64460_MPSC_CHANNEL_REG3(port) (0x8014 + (port<<12))
-#define MV64460_MPSC_CHANNEL_REG4(port) (0x8018 + (port<<12))
-#define MV64460_MPSC_CHANNEL_REG5(port) (0x801c + (port<<12))
-#define MV64460_MPSC_CHANNEL_REG6(port) (0x8020 + (port<<12))
-#define MV64460_MPSC_CHANNEL_REG7(port) (0x8024 + (port<<12))
-#define MV64460_MPSC_CHANNEL_REG8(port) (0x8028 + (port<<12))
-#define MV64460_MPSC_CHANNEL_REG9(port) (0x802c + (port<<12))
-#define MV64460_MPSC_CHANNEL_REG10(port) (0x8030 + (port<<12))
-
- /* MPSC0 Registers */
-
-
-/***************************************/
-/* SDMA Registers */
-/***************************************/
-
-#define MV64460_SDMA_CONFIG_REG(channel) (0x4000 + (channel<<13))
-#define MV64460_SDMA_COMMAND_REG(channel) (0x4008 + (channel<<13))
-#define MV64460_SDMA_CURRENT_RX_DESCRIPTOR_POINTER(channel) (0x4810 + (channel<<13))
-#define MV64460_SDMA_CURRENT_TX_DESCRIPTOR_POINTER(channel) (0x4c10 + (channel<<13))
-#define MV64460_SDMA_FIRST_TX_DESCRIPTOR_POINTER(channel) (0x4c14 + (channel<<13))
-
-#define MV64460_SDMA_CAUSE_REG 0xb800
-#define MV64460_SDMA_MASK_REG 0xb880
-
-
-/****************************************/
-/* SDMA Address Space Targets */
-/****************************************/
-
-#define MV64460_SDMA_DRAM_CS_0_TARGET 0x0e00
-#define MV64460_SDMA_DRAM_CS_1_TARGET 0x0d00
-#define MV64460_SDMA_DRAM_CS_2_TARGET 0x0b00
-#define MV64460_SDMA_DRAM_CS_3_TARGET 0x0700
-
-#define MV64460_SDMA_DEV_CS_0_TARGET 0x1e01
-#define MV64460_SDMA_DEV_CS_1_TARGET 0x1d01
-#define MV64460_SDMA_DEV_CS_2_TARGET 0x1b01
-#define MV64460_SDMA_DEV_CS_3_TARGET 0x1701
-
-#define MV64460_SDMA_BOOT_CS_TARGET 0x0f00
-
-#define MV64460_SDMA_SRAM_TARGET 0x0003
-#define MV64460_SDMA_60X_BUS_TARGET 0x4003
-
-#define MV64460_PCI_0_TARGET 0x0003
-#define MV64460_PCI_1_TARGET 0x0004
-
-
-/* Devices BAR and size registers */
-
-#define MV64460_DEV_CS0_BASE_ADDR 0x028
-#define MV64460_DEV_CS0_SIZE 0x030
-#define MV64460_DEV_CS1_BASE_ADDR 0x228
-#define MV64460_DEV_CS1_SIZE 0x230
-#define MV64460_DEV_CS2_BASE_ADDR 0x248
-#define MV64460_DEV_CS2_SIZE 0x250
-#define MV64460_DEV_CS3_BASE_ADDR 0x038
-#define MV64460_DEV_CS3_SIZE 0x040
-#define MV64460_BOOTCS_BASE_ADDR 0x238
-#define MV64460_BOOTCS_SIZE 0x240
-
-/* SDMA Window access protection */
-#define MV64460_SDMA_WIN_ACCESS_NOT_ALLOWED 0
-#define MV64460_SDMA_WIN_ACCESS_READ_ONLY 1
-#define MV64460_SDMA_WIN_ACCESS_FULL 2
-
-/* BRG Interrupts */
-
-#define MV64460_BRG_CONFIG_REG(brg) (0xb200 + (brg<<3))
-#define MV64460_BRG_BAUDE_TUNING_REG(brg) (0xb204 + (brg<<3))
-#define MV64460_BRG_CAUSE_REG 0xb834
-#define MV64460_BRG_MASK_REG 0xb8b4
-
-/****************************************/
-/* DMA Channel Control */
-/****************************************/
-
-#define MV64460_DMA_CHANNEL0_CONTROL 0x840
-#define MV64460_DMA_CHANNEL0_CONTROL_HIGH 0x880
-#define MV64460_DMA_CHANNEL1_CONTROL 0x844
-#define MV64460_DMA_CHANNEL1_CONTROL_HIGH 0x884
-#define MV64460_DMA_CHANNEL2_CONTROL 0x848
-#define MV64460_DMA_CHANNEL2_CONTROL_HIGH 0x888
-#define MV64460_DMA_CHANNEL3_CONTROL 0x84C
-#define MV64460_DMA_CHANNEL3_CONTROL_HIGH 0x88C
-
-
-/****************************************/
-/* IDMA Registers */
-/****************************************/
-
-#define MV64460_DMA_CHANNEL0_BYTE_COUNT 0x800
-#define MV64460_DMA_CHANNEL1_BYTE_COUNT 0x804
-#define MV64460_DMA_CHANNEL2_BYTE_COUNT 0x808
-#define MV64460_DMA_CHANNEL3_BYTE_COUNT 0x80C
-#define MV64460_DMA_CHANNEL0_SOURCE_ADDR 0x810
-#define MV64460_DMA_CHANNEL1_SOURCE_ADDR 0x814
-#define MV64460_DMA_CHANNEL2_SOURCE_ADDR 0x818
-#define MV64460_DMA_CHANNEL3_SOURCE_ADDR 0x81c
-#define MV64460_DMA_CHANNEL0_DESTINATION_ADDR 0x820
-#define MV64460_DMA_CHANNEL1_DESTINATION_ADDR 0x824
-#define MV64460_DMA_CHANNEL2_DESTINATION_ADDR 0x828
-#define MV64460_DMA_CHANNEL3_DESTINATION_ADDR 0x82C
-#define MV64460_DMA_CHANNEL0_NEXT_DESCRIPTOR_POINTER 0x830
-#define MV64460_DMA_CHANNEL1_NEXT_DESCRIPTOR_POINTER 0x834
-#define MV64460_DMA_CHANNEL2_NEXT_DESCRIPTOR_POINTER 0x838
-#define MV64460_DMA_CHANNEL3_NEXT_DESCRIPTOR_POINTER 0x83C
-#define MV64460_DMA_CHANNEL0_CURRENT_DESCRIPTOR_POINTER 0x870
-#define MV64460_DMA_CHANNEL1_CURRENT_DESCRIPTOR_POINTER 0x874
-#define MV64460_DMA_CHANNEL2_CURRENT_DESCRIPTOR_POINTER 0x878
-#define MV64460_DMA_CHANNEL3_CURRENT_DESCRIPTOR_POINTER 0x87C
-
- /* IDMA Address Decoding Base Address Registers */
-
-#define MV64460_DMA_BASE_ADDR_REG0 0xa00
-#define MV64460_DMA_BASE_ADDR_REG1 0xa08
-#define MV64460_DMA_BASE_ADDR_REG2 0xa10
-#define MV64460_DMA_BASE_ADDR_REG3 0xa18
-#define MV64460_DMA_BASE_ADDR_REG4 0xa20
-#define MV64460_DMA_BASE_ADDR_REG5 0xa28
-#define MV64460_DMA_BASE_ADDR_REG6 0xa30
-#define MV64460_DMA_BASE_ADDR_REG7 0xa38
-
- /* IDMA Address Decoding Size Address Register */
-
-#define MV64460_DMA_SIZE_REG0 0xa04
-#define MV64460_DMA_SIZE_REG1 0xa0c
-#define MV64460_DMA_SIZE_REG2 0xa14
-#define MV64460_DMA_SIZE_REG3 0xa1c
-#define MV64460_DMA_SIZE_REG4 0xa24
-#define MV64460_DMA_SIZE_REG5 0xa2c
-#define MV64460_DMA_SIZE_REG6 0xa34
-#define MV64460_DMA_SIZE_REG7 0xa3C
-
- /* IDMA Address Decoding High Address Remap and Access
- Protection Registers */
-
-#define MV64460_DMA_HIGH_ADDR_REMAP_REG0 0xa60
-#define MV64460_DMA_HIGH_ADDR_REMAP_REG1 0xa64
-#define MV64460_DMA_HIGH_ADDR_REMAP_REG2 0xa68
-#define MV64460_DMA_HIGH_ADDR_REMAP_REG3 0xa6C
-#define MV64460_DMA_BASE_ADDR_ENABLE_REG 0xa80
-#define MV64460_DMA_CHANNEL0_ACCESS_PROTECTION_REG 0xa70
-#define MV64460_DMA_CHANNEL1_ACCESS_PROTECTION_REG 0xa74
-#define MV64460_DMA_CHANNEL2_ACCESS_PROTECTION_REG 0xa78
-#define MV64460_DMA_CHANNEL3_ACCESS_PROTECTION_REG 0xa7c
-#define MV64460_DMA_ARBITER_CONTROL 0x860
-#define MV64460_DMA_CROSS_BAR_TIMEOUT 0x8d0
-
- /* IDMA Headers Retarget Registers */
-
-#define MV64460_DMA_HEADERS_RETARGET_CONTROL 0xa84
-#define MV64460_DMA_HEADERS_RETARGET_BASE 0xa88
-
- /* IDMA Interrupt Register */
-
-#define MV64460_DMA_INTERRUPT_CAUSE_REG 0x8c0
-#define MV64460_DMA_INTERRUPT_CAUSE_MASK 0x8c4
-#define MV64460_DMA_ERROR_ADDR 0x8c8
-#define MV64460_DMA_ERROR_SELECT 0x8cc
-
- /* IDMA Debug Register ( for internal use ) */
-
-#define MV64460_DMA_DEBUG_LOW 0x8e0
-#define MV64460_DMA_DEBUG_HIGH 0x8e4
-#define MV64460_DMA_SPARE 0xA8C
-
-/****************************************/
-/* Timer_Counter */
-/****************************************/
-
-#define MV64460_TIMER_COUNTER0 0x850
-#define MV64460_TIMER_COUNTER1 0x854
-#define MV64460_TIMER_COUNTER2 0x858
-#define MV64460_TIMER_COUNTER3 0x85C
-#define MV64460_TIMER_COUNTER_0_3_CONTROL 0x864
-#define MV64460_TIMER_COUNTER_0_3_INTERRUPT_CAUSE 0x868
-#define MV64460_TIMER_COUNTER_0_3_INTERRUPT_MASK 0x86c
-
-/****************************************/
-/* Watchdog registers */
-/****************************************/
-
-#define MV64460_WATCHDOG_CONFIG_REG 0xb410
-#define MV64460_WATCHDOG_VALUE_REG 0xb414
-
-/****************************************/
-/* I2C Registers */
-/****************************************/
-
-#define MV64460_I2C_SLAVE_ADDR 0xc000
-#define MV64460_I2C_EXTENDED_SLAVE_ADDR 0xc010
-#define MV64460_I2C_DATA 0xc004
-#define MV64460_I2C_CONTROL 0xc008
-#define MV64460_I2C_STATUS_BAUDE_RATE 0xc00C
-#define MV64460_I2C_SOFT_RESET 0xc01c
-
-/****************************************/
-/* GPP Interface Registers */
-/****************************************/
-
-#define MV64460_GPP_IO_CONTROL 0xf100
-#define MV64460_GPP_LEVEL_CONTROL 0xf110
-#define MV64460_GPP_VALUE 0xf104
-#define MV64460_GPP_INTERRUPT_CAUSE 0xf108
-#define MV64460_GPP_INTERRUPT_MASK0 0xf10c
-#define MV64460_GPP_INTERRUPT_MASK1 0xf114
-#define MV64460_GPP_VALUE_SET 0xf118
-#define MV64460_GPP_VALUE_CLEAR 0xf11c
-
-/****************************************/
-/* Interrupt Controller Registers */
-/****************************************/
-
-/****************************************/
-/* Interrupts */
-/****************************************/
-
-#define MV64460_MAIN_INTERRUPT_CAUSE_LOW 0x004
-#define MV64460_MAIN_INTERRUPT_CAUSE_HIGH 0x00c
-#define MV64460_CPU_INTERRUPT0_MASK_LOW 0x014
-#define MV64460_CPU_INTERRUPT0_MASK_HIGH 0x01c
-#define MV64460_CPU_INTERRUPT0_SELECT_CAUSE 0x024
-#define MV64460_CPU_INTERRUPT1_MASK_LOW 0x034
-#define MV64460_CPU_INTERRUPT1_MASK_HIGH 0x03c
-#define MV64460_CPU_INTERRUPT1_SELECT_CAUSE 0x044
-#define MV64460_INTERRUPT0_MASK_0_LOW 0x054
-#define MV64460_INTERRUPT0_MASK_0_HIGH 0x05c
-#define MV64460_INTERRUPT0_SELECT_CAUSE 0x064
-#define MV64460_INTERRUPT1_MASK_0_LOW 0x074
-#define MV64460_INTERRUPT1_MASK_0_HIGH 0x07c
-#define MV64460_INTERRUPT1_SELECT_CAUSE 0x084
-
-/****************************************/
-/* MPP Interface Registers */
-/****************************************/
-
-#define MV64460_MPP_CONTROL0 0xf000
-#define MV64460_MPP_CONTROL1 0xf004
-#define MV64460_MPP_CONTROL2 0xf008
-#define MV64460_MPP_CONTROL3 0xf00c
-
-/****************************************/
-/* Serial Initialization registers */
-/****************************************/
-
-#define MV64460_SERIAL_INIT_LAST_DATA 0xf324
-#define MV64460_SERIAL_INIT_CONTROL 0xf328
-#define MV64460_SERIAL_INIT_STATUS 0xf32c
-
-
-#endif /* __INCgt64460rh */
diff --git a/board/Marvell/db64460/pci.c b/board/Marvell/db64460/pci.c
deleted file mode 100644
index 5637284124..0000000000
--- a/board/Marvell/db64460/pci.c
+++ /dev/null
@@ -1,940 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- */
-/* PCI.c - PCI functions */
-
-
-#include <common.h>
-#include <pci.h>
-
-#include "../include/pci.h"
-
-#undef DEBUG
-#undef IDE_SET_NATIVE_MODE
-static unsigned int local_buses[] = { 0, 0 };
-
-static const unsigned char pci_irq_swizzle[2][PCI_MAX_DEVICES] = {
- {0, 0, 0, 0, 0, 0, 0, 27, 27, [9 ... PCI_MAX_DEVICES - 1] = 0 },
- {0, 0, 0, 0, 0, 0, 0, 29, 29, [9 ... PCI_MAX_DEVICES - 1] = 0 },
-};
-
-
-#ifdef DEBUG
-static const unsigned int pci_bus_list[] = { PCI_0_MODE, PCI_1_MODE };
-static void gt_pci_bus_mode_display (PCI_HOST host)
-{
- unsigned int mode;
-
-
- mode = (GTREGREAD (pci_bus_list[host]) & (BIT4 | BIT5)) >> 4;
- switch (mode) {
- case 0:
- printf ("PCI %d bus mode: Conventional PCI\n", host);
- break;
- case 1:
- printf ("PCI %d bus mode: 66 Mhz PCIX\n", host);
- break;
- case 2:
- printf ("PCI %d bus mode: 100 Mhz PCIX\n", host);
- break;
- case 3:
- printf ("PCI %d bus mode: 133 Mhz PCIX\n", host);
- break;
- default:
- printf ("Unknown BUS %d\n", mode);
- }
-}
-#endif
-
-static const unsigned int pci_p2p_configuration_reg[] = {
- PCI_0P2P_CONFIGURATION, PCI_1P2P_CONFIGURATION
-};
-
-static const unsigned int pci_configuration_address[] = {
- PCI_0CONFIGURATION_ADDRESS, PCI_1CONFIGURATION_ADDRESS
-};
-
-static const unsigned int pci_configuration_data[] = {
- PCI_0CONFIGURATION_DATA_VIRTUAL_REGISTER,
- PCI_1CONFIGURATION_DATA_VIRTUAL_REGISTER
-};
-
-static const unsigned int pci_error_cause_reg[] = {
- PCI_0ERROR_CAUSE, PCI_1ERROR_CAUSE
-};
-
-static const unsigned int pci_arbiter_control[] = {
- PCI_0ARBITER_CONTROL, PCI_1ARBITER_CONTROL
-};
-
-static const unsigned int pci_address_space_en[] = {
- PCI_0_BASE_ADDR_REG_ENABLE, PCI_1_BASE_ADDR_REG_ENABLE
-};
-
-static const unsigned int pci_snoop_control_base_0_low[] = {
- PCI_0SNOOP_CONTROL_BASE_0_LOW, PCI_1SNOOP_CONTROL_BASE_0_LOW
-};
-static const unsigned int pci_snoop_control_top_0[] = {
- PCI_0SNOOP_CONTROL_TOP_0, PCI_1SNOOP_CONTROL_TOP_0
-};
-
-static const unsigned int pci_access_control_base_0_low[] = {
- PCI_0ACCESS_CONTROL_BASE_0_LOW, PCI_1ACCESS_CONTROL_BASE_0_LOW
-};
-static const unsigned int pci_access_control_top_0[] = {
- PCI_0ACCESS_CONTROL_TOP_0, PCI_1ACCESS_CONTROL_TOP_0
-};
-
-static const unsigned int pci_scs_bank_size[2][4] = {
- {PCI_0SCS_0_BANK_SIZE, PCI_0SCS_1_BANK_SIZE,
- PCI_0SCS_2_BANK_SIZE, PCI_0SCS_3_BANK_SIZE},
- {PCI_1SCS_0_BANK_SIZE, PCI_1SCS_1_BANK_SIZE,
- PCI_1SCS_2_BANK_SIZE, PCI_1SCS_3_BANK_SIZE}
-};
-
-static const unsigned int pci_p2p_configuration[] = {
- PCI_0P2P_CONFIGURATION, PCI_1P2P_CONFIGURATION
-};
-
-
-/********************************************************************
-* pciWriteConfigReg - Write to a PCI configuration register
-* - Make sure the GT is configured as a master before writing
-* to another device on the PCI.
-* - The function takes care of Big/Little endian conversion.
-*
-*
-* Inputs: unsigned int regOffset: The register offset as it apears in the GT spec
-* (or any other PCI device spec)
-* pciDevNum: The device number needs to be addressed.
-*
-* Configuration Address 0xCF8:
-*
-* 31 30 24 23 16 15 11 10 8 7 2 0 <=bit Number
-* |congif|Reserved| Bus |Device|Function|Register|00|
-* |Enable| |Number|Number| Number | Number | | <=field Name
-*
-*********************************************************************/
-void pciWriteConfigReg (PCI_HOST host, unsigned int regOffset,
- unsigned int pciDevNum, unsigned int data)
-{
- volatile unsigned int DataForAddrReg;
- unsigned int functionNum;
- unsigned int busNum = 0;
- unsigned int addr;
-
- if (pciDevNum > 32) /* illegal device Number */
- return;
- if (pciDevNum == SELF) { /* configure our configuration space. */
- pciDevNum =
- (GTREGREAD (pci_p2p_configuration_reg[host]) >> 24) &
- 0x1f;
- busNum = GTREGREAD (pci_p2p_configuration_reg[host]) &
- 0xff0000;
- }
- functionNum = regOffset & 0x00000700;
- pciDevNum = pciDevNum << 11;
- regOffset = regOffset & 0xfc;
- DataForAddrReg =
- (regOffset | pciDevNum | functionNum | busNum) | BIT31;
- GT_REG_WRITE (pci_configuration_address[host], DataForAddrReg);
- GT_REG_READ (pci_configuration_address[host], &addr);
- if (addr != DataForAddrReg)
- return;
- GT_REG_WRITE (pci_configuration_data[host], data);
-}
-
-/********************************************************************
-* pciReadConfigReg - Read from a PCI0 configuration register
-* - Make sure the GT is configured as a master before reading
-* from another device on the PCI.
-* - The function takes care of Big/Little endian conversion.
-* INPUTS: regOffset: The register offset as it apears in the GT spec (or PCI
-* spec)
-* pciDevNum: The device number needs to be addressed.
-* RETURNS: data , if the data == 0xffffffff check the master abort bit in the
-* cause register to make sure the data is valid
-*
-* Configuration Address 0xCF8:
-*
-* 31 30 24 23 16 15 11 10 8 7 2 0 <=bit Number
-* |congif|Reserved| Bus |Device|Function|Register|00|
-* |Enable| |Number|Number| Number | Number | | <=field Name
-*
-*********************************************************************/
-unsigned int pciReadConfigReg (PCI_HOST host, unsigned int regOffset,
- unsigned int pciDevNum)
-{
- volatile unsigned int DataForAddrReg;
- unsigned int data;
- unsigned int functionNum;
- unsigned int busNum = 0;
-
- if (pciDevNum > 32) /* illegal device Number */
- return 0xffffffff;
- if (pciDevNum == SELF) { /* configure our configuration space. */
- pciDevNum =
- (GTREGREAD (pci_p2p_configuration_reg[host]) >> 24) &
- 0x1f;
- busNum = GTREGREAD (pci_p2p_configuration_reg[host]) &
- 0xff0000;
- }
- functionNum = regOffset & 0x00000700;
- pciDevNum = pciDevNum << 11;
- regOffset = regOffset & 0xfc;
- DataForAddrReg =
- (regOffset | pciDevNum | functionNum | busNum) | BIT31;
- GT_REG_WRITE (pci_configuration_address[host], DataForAddrReg);
- GT_REG_READ (pci_configuration_address[host], &data);
- if (data != DataForAddrReg)
- return 0xffffffff;
- GT_REG_READ (pci_configuration_data[host], &data);
- return data;
-}
-
-/********************************************************************
-* pciOverBridgeWriteConfigReg - Write to a PCI configuration register where
-* the agent is placed on another Bus. For more
-* information read P2P in the PCI spec.
-*
-* Inputs: unsigned int regOffset - The register offset as it apears in the
-* GT spec (or any other PCI device spec).
-* unsigned int pciDevNum - The device number needs to be addressed.
-* unsigned int busNum - On which bus does the Target agent connect
-* to.
-* unsigned int data - data to be written.
-*
-* Configuration Address 0xCF8:
-*
-* 31 30 24 23 16 15 11 10 8 7 2 0 <=bit Number
-* |congif|Reserved| Bus |Device|Function|Register|01|
-* |Enable| |Number|Number| Number | Number | | <=field Name
-*
-* The configuration Address is configure as type-I (bits[1:0] = '01') due to
-* PCI spec referring to P2P.
-*
-*********************************************************************/
-void pciOverBridgeWriteConfigReg (PCI_HOST host,
- unsigned int regOffset,
- unsigned int pciDevNum,
- unsigned int busNum, unsigned int data)
-{
- unsigned int DataForReg;
- unsigned int functionNum;
-
- functionNum = regOffset & 0x00000700;
- pciDevNum = pciDevNum << 11;
- regOffset = regOffset & 0xff;
- busNum = busNum << 16;
- if (pciDevNum == SELF) { /* This board */
- DataForReg = (regOffset | pciDevNum | functionNum) | BIT0;
- } else {
- DataForReg = (regOffset | pciDevNum | functionNum | busNum) |
- BIT31 | BIT0;
- }
- GT_REG_WRITE (pci_configuration_address[host], DataForReg);
- GT_REG_WRITE (pci_configuration_data[host], data);
-}
-
-
-/********************************************************************
-* pciOverBridgeReadConfigReg - Read from a PCIn configuration register where
-* the agent target locate on another PCI bus.
-* - Make sure the GT is configured as a master
-* before reading from another device on the PCI.
-* - The function takes care of Big/Little endian
-* conversion.
-* INPUTS: regOffset: The register offset as it apears in the GT spec (or PCI
-* spec). (configuration register offset.)
-* pciDevNum: The device number needs to be addressed.
-* busNum: the Bus number where the agent is place.
-* RETURNS: data , if the data == 0xffffffff check the master abort bit in the
-* cause register to make sure the data is valid
-*
-* Configuration Address 0xCF8:
-*
-* 31 30 24 23 16 15 11 10 8 7 2 0 <=bit Number
-* |congif|Reserved| Bus |Device|Function|Register|01|
-* |Enable| |Number|Number| Number | Number | | <=field Name
-*
-*********************************************************************/
-unsigned int pciOverBridgeReadConfigReg (PCI_HOST host,
- unsigned int regOffset,
- unsigned int pciDevNum,
- unsigned int busNum)
-{
- unsigned int DataForReg;
- unsigned int data;
- unsigned int functionNum;
-
- functionNum = regOffset & 0x00000700;
- pciDevNum = pciDevNum << 11;
- regOffset = regOffset & 0xff;
- busNum = busNum << 16;
- if (pciDevNum == SELF) { /* This board */
- DataForReg = (regOffset | pciDevNum | functionNum) | BIT31;
- } else { /* agent on another bus */
-
- DataForReg = (regOffset | pciDevNum | functionNum | busNum) |
- BIT0 | BIT31;
- }
- GT_REG_WRITE (pci_configuration_address[host], DataForReg);
- GT_REG_READ (pci_configuration_data[host], &data);
- return data;
-}
-
-
-/********************************************************************
-* pciGetRegOffset - Gets the register offset for this region config.
-*
-* INPUT: Bus, Region - The bus and region we ask for its base address.
-* OUTPUT: N/A
-* RETURNS: PCI register base address
-*********************************************************************/
-static unsigned int pciGetRegOffset (PCI_HOST host, PCI_REGION region)
-{
- switch (host) {
- case PCI_HOST0:
- switch (region) {
- case PCI_IO:
- return PCI_0I_O_LOW_DECODE_ADDRESS;
- case PCI_REGION0:
- return PCI_0MEMORY0_LOW_DECODE_ADDRESS;
- case PCI_REGION1:
- return PCI_0MEMORY1_LOW_DECODE_ADDRESS;
- case PCI_REGION2:
- return PCI_0MEMORY2_LOW_DECODE_ADDRESS;
- case PCI_REGION3:
- return PCI_0MEMORY3_LOW_DECODE_ADDRESS;
- }
- case PCI_HOST1:
- switch (region) {
- case PCI_IO:
- return PCI_1I_O_LOW_DECODE_ADDRESS;
- case PCI_REGION0:
- return PCI_1MEMORY0_LOW_DECODE_ADDRESS;
- case PCI_REGION1:
- return PCI_1MEMORY1_LOW_DECODE_ADDRESS;
- case PCI_REGION2:
- return PCI_1MEMORY2_LOW_DECODE_ADDRESS;
- case PCI_REGION3:
- return PCI_1MEMORY3_LOW_DECODE_ADDRESS;
- }
- }
- return PCI_0MEMORY0_LOW_DECODE_ADDRESS;
-}
-
-static unsigned int pciGetRemapOffset (PCI_HOST host, PCI_REGION region)
-{
- switch (host) {
- case PCI_HOST0:
- switch (region) {
- case PCI_IO:
- return PCI_0I_O_ADDRESS_REMAP;
- case PCI_REGION0:
- return PCI_0MEMORY0_ADDRESS_REMAP;
- case PCI_REGION1:
- return PCI_0MEMORY1_ADDRESS_REMAP;
- case PCI_REGION2:
- return PCI_0MEMORY2_ADDRESS_REMAP;
- case PCI_REGION3:
- return PCI_0MEMORY3_ADDRESS_REMAP;
- }
- case PCI_HOST1:
- switch (region) {
- case PCI_IO:
- return PCI_1I_O_ADDRESS_REMAP;
- case PCI_REGION0:
- return PCI_1MEMORY0_ADDRESS_REMAP;
- case PCI_REGION1:
- return PCI_1MEMORY1_ADDRESS_REMAP;
- case PCI_REGION2:
- return PCI_1MEMORY2_ADDRESS_REMAP;
- case PCI_REGION3:
- return PCI_1MEMORY3_ADDRESS_REMAP;
- }
- }
- return PCI_0MEMORY0_ADDRESS_REMAP;
-}
-
-/********************************************************************
-* pciGetBaseAddress - Gets the base address of a PCI.
-* - If the PCI size is 0 then this base address has no meaning!!!
-*
-*
-* INPUT: Bus, Region - The bus and region we ask for its base address.
-* OUTPUT: N/A
-* RETURNS: PCI base address.
-*********************************************************************/
-unsigned int pciGetBaseAddress (PCI_HOST host, PCI_REGION region)
-{
- unsigned int regBase;
- unsigned int regEnd;
- unsigned int regOffset = pciGetRegOffset (host, region);
-
- GT_REG_READ (regOffset, &regBase);
- GT_REG_READ (regOffset + 8, &regEnd);
-
- if (regEnd <= regBase)
- return 0xffffffff; /* ERROR !!! */
-
- regBase = regBase << 16;
- return regBase;
-}
-
-bool pciMapSpace (PCI_HOST host, PCI_REGION region, unsigned int remapBase,
- unsigned int bankBase, unsigned int bankLength)
-{
- unsigned int low = 0xfff;
- unsigned int high = 0x0;
- unsigned int regOffset = pciGetRegOffset (host, region);
- unsigned int remapOffset = pciGetRemapOffset (host, region);
-
- if (bankLength != 0) {
- low = (bankBase >> 16) & 0xffff;
- high = ((bankBase + bankLength) >> 16) - 1;
- }
-
- GT_REG_WRITE (regOffset, low | (1 << 24)); /* no swapping */
- GT_REG_WRITE (regOffset + 8, high);
-
- if (bankLength != 0) { /* must do AFTER writing maps */
- GT_REG_WRITE (remapOffset, remapBase >> 16); /* sorry, 32 bits only.
- dont support upper 32
- in this driver */
- }
- return true;
-}
-
-unsigned int pciGetSpaceBase (PCI_HOST host, PCI_REGION region)
-{
- unsigned int low;
- unsigned int regOffset = pciGetRegOffset (host, region);
-
- GT_REG_READ (regOffset, &low);
- return (low & 0xffff) << 16;
-}
-
-unsigned int pciGetSpaceSize (PCI_HOST host, PCI_REGION region)
-{
- unsigned int low, high;
- unsigned int regOffset = pciGetRegOffset (host, region);
-
- GT_REG_READ (regOffset, &low);
- GT_REG_READ (regOffset + 8, &high);
- return ((high & 0xffff) + 1) << 16;
-}
-
-
-/* ronen - 7/Dec/03*/
-/********************************************************************
-* gtPciDisable/EnableInternalBAR - This function enable/disable PCI BARS.
-* Inputs: one of the PCI BAR
-*********************************************************************/
-void gtPciEnableInternalBAR (PCI_HOST host, PCI_INTERNAL_BAR pciBAR)
-{
- RESET_REG_BITS (pci_address_space_en[host], BIT0 << pciBAR);
-}
-
-void gtPciDisableInternalBAR (PCI_HOST host, PCI_INTERNAL_BAR pciBAR)
-{
- SET_REG_BITS (pci_address_space_en[host], BIT0 << pciBAR);
-}
-
-/********************************************************************
-* pciMapMemoryBank - Maps PCI_host memory bank "bank" for the slave.
-*
-* Inputs: base and size of PCI SCS
-*********************************************************************/
-void pciMapMemoryBank (PCI_HOST host, MEMORY_BANK bank,
- unsigned int pciDramBase, unsigned int pciDramSize)
-{
- /*ronen different function for 3rd bank. */
- unsigned int offset = (bank < 2) ? bank * 8 : 0x100 + (bank - 2) * 8;
-
- pciDramBase = pciDramBase & 0xfffff000;
- pciDramBase = pciDramBase | (pciReadConfigReg (host,
- PCI_SCS_0_BASE_ADDRESS
- + offset,
- SELF) & 0x00000fff);
- pciWriteConfigReg (host, PCI_SCS_0_BASE_ADDRESS + offset, SELF,
- pciDramBase);
- if (pciDramSize == 0)
- pciDramSize++;
- GT_REG_WRITE (pci_scs_bank_size[host][bank], pciDramSize - 1);
- gtPciEnableInternalBAR (host, bank);
-}
-
-/********************************************************************
-* pciSetRegionFeatures - This function modifys one of the 8 regions with
-* feature bits given as an input.
-* - Be advised to check the spec before modifying them.
-* Inputs: PCI_PROTECT_REGION region - one of the eight regions.
-* unsigned int features - See file: pci.h there are defintion for those
-* region features.
-* unsigned int baseAddress - The region base Address.
-* unsigned int topAddress - The region top Address.
-* Returns: false if one of the parameters is erroneous true otherwise.
-*********************************************************************/
-bool pciSetRegionFeatures (PCI_HOST host, PCI_ACCESS_REGIONS region,
- unsigned int features, unsigned int baseAddress,
- unsigned int regionLength)
-{
- unsigned int accessLow;
- unsigned int accessHigh;
- unsigned int accessTop = baseAddress + regionLength;
-
- if (regionLength == 0) { /* close the region. */
- pciDisableAccessRegion (host, region);
- return true;
- }
- /* base Address is store is bits [11:0] */
- accessLow = (baseAddress & 0xfff00000) >> 20;
- /* All the features are update according to the defines in pci.h (to be on
- the safe side we disable bits: [11:0] */
- accessLow = accessLow | (features & 0xfffff000);
- /* write to the Low Access Region register */
- GT_REG_WRITE (pci_access_control_base_0_low[host] + 0x10 * region,
- accessLow);
-
- accessHigh = (accessTop & 0xfff00000) >> 20;
-
- /* write to the High Access Region register */
- GT_REG_WRITE (pci_access_control_top_0[host] + 0x10 * region,
- accessHigh - 1);
- return true;
-}
-
-/********************************************************************
-* pciDisableAccessRegion - Disable The given Region by writing MAX size
-* to its low Address and MIN size to its high Address.
-*
-* Inputs: PCI_ACCESS_REGIONS region - The region we to be Disabled.
-* Returns: N/A.
-*********************************************************************/
-void pciDisableAccessRegion (PCI_HOST host, PCI_ACCESS_REGIONS region)
-{
- /* writing back the registers default values. */
- GT_REG_WRITE (pci_access_control_base_0_low[host] + 0x10 * region,
- 0x01001fff);
- GT_REG_WRITE (pci_access_control_top_0[host] + 0x10 * region, 0);
-}
-
-/********************************************************************
-* pciArbiterEnable - Enables PCI-0`s Arbitration mechanism.
-*
-* Inputs: N/A
-* Returns: true.
-*********************************************************************/
-bool pciArbiterEnable (PCI_HOST host)
-{
- unsigned int regData;
-
- GT_REG_READ (pci_arbiter_control[host], &regData);
- GT_REG_WRITE (pci_arbiter_control[host], regData | BIT31);
- return true;
-}
-
-/********************************************************************
-* pciArbiterDisable - Disable PCI-0`s Arbitration mechanism.
-*
-* Inputs: N/A
-* Returns: true
-*********************************************************************/
-bool pciArbiterDisable (PCI_HOST host)
-{
- unsigned int regData;
-
- GT_REG_READ (pci_arbiter_control[host], &regData);
- GT_REG_WRITE (pci_arbiter_control[host], regData & 0x7fffffff);
- return true;
-}
-
-/********************************************************************
-* pciSetArbiterAgentsPriority - Priority setup for the PCI agents (Hi or Low)
-*
-* Inputs: PCI_AGENT_PRIO internalAgent - priotity for internal agent.
-* PCI_AGENT_PRIO externalAgent0 - priotity for external#0 agent.
-* PCI_AGENT_PRIO externalAgent1 - priotity for external#1 agent.
-* PCI_AGENT_PRIO externalAgent2 - priotity for external#2 agent.
-* PCI_AGENT_PRIO externalAgent3 - priotity for external#3 agent.
-* PCI_AGENT_PRIO externalAgent4 - priotity for external#4 agent.
-* PCI_AGENT_PRIO externalAgent5 - priotity for external#5 agent.
-* Returns: true
-*********************************************************************/
-bool pciSetArbiterAgentsPriority (PCI_HOST host, PCI_AGENT_PRIO internalAgent,
- PCI_AGENT_PRIO externalAgent0,
- PCI_AGENT_PRIO externalAgent1,
- PCI_AGENT_PRIO externalAgent2,
- PCI_AGENT_PRIO externalAgent3,
- PCI_AGENT_PRIO externalAgent4,
- PCI_AGENT_PRIO externalAgent5)
-{
- unsigned int regData;
- unsigned int writeData;
-
- GT_REG_READ (pci_arbiter_control[host], &regData);
- writeData = (internalAgent << 7) + (externalAgent0 << 8) +
- (externalAgent1 << 9) + (externalAgent2 << 10) +
- (externalAgent3 << 11) + (externalAgent4 << 12) +
- (externalAgent5 << 13);
- regData = (regData & 0xffffc07f) | writeData;
- GT_REG_WRITE (pci_arbiter_control[host], regData & regData);
- return true;
-}
-
-/********************************************************************
-* pciParkingDisable - Park on last option disable, with this function you can
-* disable the park on last mechanism for each agent.
-* disabling this option for all agents results parking
-* on the internal master.
-*
-* Inputs: PCI_AGENT_PARK internalAgent - parking Disable for internal agent.
-* PCI_AGENT_PARK externalAgent0 - parking Disable for external#0 agent.
-* PCI_AGENT_PARK externalAgent1 - parking Disable for external#1 agent.
-* PCI_AGENT_PARK externalAgent2 - parking Disable for external#2 agent.
-* PCI_AGENT_PARK externalAgent3 - parking Disable for external#3 agent.
-* PCI_AGENT_PARK externalAgent4 - parking Disable for external#4 agent.
-* PCI_AGENT_PARK externalAgent5 - parking Disable for external#5 agent.
-* Returns: true
-*********************************************************************/
-bool pciParkingDisable (PCI_HOST host, PCI_AGENT_PARK internalAgent,
- PCI_AGENT_PARK externalAgent0,
- PCI_AGENT_PARK externalAgent1,
- PCI_AGENT_PARK externalAgent2,
- PCI_AGENT_PARK externalAgent3,
- PCI_AGENT_PARK externalAgent4,
- PCI_AGENT_PARK externalAgent5)
-{
- unsigned int regData;
- unsigned int writeData;
-
- GT_REG_READ (pci_arbiter_control[host], &regData);
- writeData = (internalAgent << 14) + (externalAgent0 << 15) +
- (externalAgent1 << 16) + (externalAgent2 << 17) +
- (externalAgent3 << 18) + (externalAgent4 << 19) +
- (externalAgent5 << 20);
- regData = (regData & ~(0x7f << 14)) | writeData;
- GT_REG_WRITE (pci_arbiter_control[host], regData);
- return true;
-}
-
-/********************************************************************
-* pciEnableBrokenAgentDetection - A master is said to be broken if it fails to
-* respond to grant assertion within a window specified in
-* the input value: 'brokenValue'.
-*
-* Inputs: unsigned char brokenValue - A value which limits the Master to hold the
-* grant without asserting frame.
-* Returns: Error for illegal broken value otherwise true.
-*********************************************************************/
-bool pciEnableBrokenAgentDetection (PCI_HOST host, unsigned char brokenValue)
-{
- unsigned int data;
- unsigned int regData;
-
- if (brokenValue > 0xf)
- return false; /* brokenValue must be 4 bit */
- data = brokenValue << 3;
- GT_REG_READ (pci_arbiter_control[host], &regData);
- regData = (regData & 0xffffff87) | data;
- GT_REG_WRITE (pci_arbiter_control[host], regData | BIT1);
- return true;
-}
-
-/********************************************************************
-* pciDisableBrokenAgentDetection - This function disable the Broken agent
-* Detection mechanism.
-* NOTE: This operation may cause a dead lock on the
-* pci0 arbitration.
-*
-* Inputs: N/A
-* Returns: true.
-*********************************************************************/
-bool pciDisableBrokenAgentDetection (PCI_HOST host)
-{
- unsigned int regData;
-
- GT_REG_READ (pci_arbiter_control[host], &regData);
- regData = regData & 0xfffffffd;
- GT_REG_WRITE (pci_arbiter_control[host], regData);
- return true;
-}
-
-/********************************************************************
-* pciP2PConfig - This function set the PCI_n P2P configurate.
-* For more information on the P2P read PCI spec.
-*
-* Inputs: unsigned int SecondBusLow - Secondery PCI interface Bus Range Lower
-* Boundry.
-* unsigned int SecondBusHigh - Secondry PCI interface Bus Range upper
-* Boundry.
-* unsigned int busNum - The CPI bus number to which the PCI interface
-* is connected.
-* unsigned int devNum - The PCI interface's device number.
-*
-* Returns: true.
-*********************************************************************/
-bool pciP2PConfig (PCI_HOST host, unsigned int SecondBusLow,
- unsigned int SecondBusHigh,
- unsigned int busNum, unsigned int devNum)
-{
- unsigned int regData;
-
- regData = (SecondBusLow & 0xff) | ((SecondBusHigh & 0xff) << 8) |
- ((busNum & 0xff) << 16) | ((devNum & 0x1f) << 24);
- GT_REG_WRITE (pci_p2p_configuration[host], regData);
- return true;
-}
-
-/********************************************************************
-* pciSetRegionSnoopMode - This function modifys one of the 4 regions which
-* supports Cache Coherency in the PCI_n interface.
-* Inputs: region - One of the four regions.
-* snoopType - There is four optional Types:
-* 1. No Snoop.
-* 2. Snoop to WT region.
-* 3. Snoop to WB region.
-* 4. Snoop & Invalidate to WB region.
-* baseAddress - Base Address of this region.
-* regionLength - Region length.
-* Returns: false if one of the parameters is wrong otherwise return true.
-*********************************************************************/
-bool pciSetRegionSnoopMode (PCI_HOST host, PCI_SNOOP_REGION region,
- PCI_SNOOP_TYPE snoopType,
- unsigned int baseAddress,
- unsigned int regionLength)
-{
- unsigned int snoopXbaseAddress;
- unsigned int snoopXtopAddress;
- unsigned int data;
- unsigned int snoopHigh = baseAddress + regionLength;
-
- if ((region > PCI_SNOOP_REGION3) || (snoopType > PCI_SNOOP_WB))
- return false;
- snoopXbaseAddress =
- pci_snoop_control_base_0_low[host] + 0x10 * region;
- snoopXtopAddress = pci_snoop_control_top_0[host] + 0x10 * region;
- if (regionLength == 0) { /* closing the region */
- GT_REG_WRITE (snoopXbaseAddress, 0x0000ffff);
- GT_REG_WRITE (snoopXtopAddress, 0);
- return true;
- }
- baseAddress = baseAddress & 0xfff00000; /* Granularity of 1MByte */
- data = (baseAddress >> 20) | snoopType << 12;
- GT_REG_WRITE (snoopXbaseAddress, data);
- snoopHigh = (snoopHigh & 0xfff00000) >> 20;
- GT_REG_WRITE (snoopXtopAddress, snoopHigh - 1);
- return true;
-}
-
-static int gt_read_config_dword (struct pci_controller *hose,
- pci_dev_t dev, int offset, u32 * value)
-{
- int bus = PCI_BUS (dev);
-
- if ((bus == local_buses[0]) || (bus == local_buses[1])) {
- *value = pciReadConfigReg ((PCI_HOST) hose->cfg_addr, offset,
- PCI_DEV (dev));
- } else {
- *value = pciOverBridgeReadConfigReg ((PCI_HOST) hose->
- cfg_addr, offset,
- PCI_DEV (dev), bus);
- }
-
- return 0;
-}
-
-static int gt_write_config_dword (struct pci_controller *hose,
- pci_dev_t dev, int offset, u32 value)
-{
- int bus = PCI_BUS (dev);
-
- if ((bus == local_buses[0]) || (bus == local_buses[1])) {
- pciWriteConfigReg ((PCI_HOST) hose->cfg_addr, offset,
- PCI_DEV (dev), value);
- } else {
- pciOverBridgeWriteConfigReg ((PCI_HOST) hose->cfg_addr,
- offset, PCI_DEV (dev), bus,
- value);
- }
- return 0;
-}
-
-
-static void gt_setup_ide (struct pci_controller *hose,
- pci_dev_t dev, struct pci_config_table *entry)
-{
- static const int ide_bar[] = { 8, 4, 8, 4, 0, 0 };
- u32 bar_response, bar_value;
- int bar;
-
- for (bar = 0; bar < 6; bar++) {
- /*ronen different function for 3rd bank. */
- unsigned int offset =
- (bar < 2) ? bar * 8 : 0x100 + (bar - 2) * 8;
-
- pci_write_config_dword (dev, PCI_BASE_ADDRESS_0 + offset,
- 0x0);
- pci_read_config_dword (dev, PCI_BASE_ADDRESS_0 + offset,
- &bar_response);
-
- pciauto_region_allocate (bar_response &
- PCI_BASE_ADDRESS_SPACE_IO ? hose->
- pci_io : hose->pci_mem, ide_bar[bar],
- &bar_value);
-
- pci_write_config_dword (dev, PCI_BASE_ADDRESS_0 + bar * 4,
- bar_value);
- }
-}
-
-
-/* TODO BJW: Change this for DB64360. This was pulled from the EV64260 */
-/* and is curently not called *. */
-#if 0
-static void gt_fixup_irq (struct pci_controller *hose, pci_dev_t dev)
-{
- unsigned char pin, irq;
-
- pci_read_config_byte (dev, PCI_INTERRUPT_PIN, &pin);
-
- if (pin == 1) { /* only allow INT A */
- irq = pci_irq_swizzle[(PCI_HOST) hose->
- cfg_addr][PCI_DEV (dev)];
- if (irq)
- pci_write_config_byte (dev, PCI_INTERRUPT_LINE, irq);
- }
-}
-#endif
-
-struct pci_config_table gt_config_table[] = {
- {PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_STORAGE_IDE,
- PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, gt_setup_ide},
-
- {}
-};
-
-struct pci_controller pci0_hose = {
-/* fixup_irq: gt_fixup_irq, */
- config_table:gt_config_table,
-};
-
-struct pci_controller pci1_hose = {
-/* fixup_irq: gt_fixup_irq, */
- config_table:gt_config_table,
-};
-
-void pci_init_board (void)
-{
- unsigned int command;
-
-#ifdef DEBUG
- gt_pci_bus_mode_display (PCI_HOST0);
-#endif
-
- pci0_hose.first_busno = 0;
- pci0_hose.last_busno = 0xff;
- local_buses[0] = pci0_hose.first_busno;
-
- /* PCI memory space */
- pci_set_region (pci0_hose.regions + 0,
- CFG_PCI0_0_MEM_SPACE,
- CFG_PCI0_0_MEM_SPACE,
- CFG_PCI0_MEM_SIZE, PCI_REGION_MEM);
-
- /* PCI I/O space */
- pci_set_region (pci0_hose.regions + 1,
- CFG_PCI0_IO_SPACE_PCI,
- CFG_PCI0_IO_SPACE, CFG_PCI0_IO_SIZE, PCI_REGION_IO);
-
- pci_set_ops (&pci0_hose,
- pci_hose_read_config_byte_via_dword,
- pci_hose_read_config_word_via_dword,
- gt_read_config_dword,
- pci_hose_write_config_byte_via_dword,
- pci_hose_write_config_word_via_dword,
- gt_write_config_dword);
- pci0_hose.region_count = 2;
-
- pci0_hose.cfg_addr = (unsigned int *) PCI_HOST0;
-
- pci_register_hose (&pci0_hose);
- pciArbiterEnable (PCI_HOST0);
- pciParkingDisable (PCI_HOST0, 1, 1, 1, 1, 1, 1, 1);
- command = pciReadConfigReg (PCI_HOST0, PCI_COMMAND, SELF);
- command |= PCI_COMMAND_MASTER;
- pciWriteConfigReg (PCI_HOST0, PCI_COMMAND, SELF, command);
- command = pciReadConfigReg (PCI_HOST0, PCI_COMMAND, SELF);
- command |= PCI_COMMAND_MEMORY;
- pciWriteConfigReg (PCI_HOST0, PCI_COMMAND, SELF, command);
-
- pci0_hose.last_busno = pci_hose_scan (&pci0_hose);
-
-#ifdef DEBUG
- gt_pci_bus_mode_display (PCI_HOST1);
-#endif
- pci1_hose.first_busno = pci0_hose.last_busno + 1;
- pci1_hose.last_busno = 0xff;
- pci1_hose.current_busno = pci1_hose.first_busno;
- local_buses[1] = pci1_hose.first_busno;
-
- /* PCI memory space */
- pci_set_region (pci1_hose.regions + 0,
- CFG_PCI1_0_MEM_SPACE,
- CFG_PCI1_0_MEM_SPACE,
- CFG_PCI1_MEM_SIZE, PCI_REGION_MEM);
-
- /* PCI I/O space */
- pci_set_region (pci1_hose.regions + 1,
- CFG_PCI1_IO_SPACE_PCI,
- CFG_PCI1_IO_SPACE, CFG_PCI1_IO_SIZE, PCI_REGION_IO);
-
- pci_set_ops (&pci1_hose,
- pci_hose_read_config_byte_via_dword,
- pci_hose_read_config_word_via_dword,
- gt_read_config_dword,
- pci_hose_write_config_byte_via_dword,
- pci_hose_write_config_word_via_dword,
- gt_write_config_dword);
-
- pci1_hose.region_count = 2;
-
- pci1_hose.cfg_addr = (unsigned int *) PCI_HOST1;
-
- pci_register_hose (&pci1_hose);
-
- pciArbiterEnable (PCI_HOST1);
- pciParkingDisable (PCI_HOST1, 1, 1, 1, 1, 1, 1, 1);
-
- command = pciReadConfigReg (PCI_HOST1, PCI_COMMAND, SELF);
- command |= PCI_COMMAND_MASTER;
- pciWriteConfigReg (PCI_HOST1, PCI_COMMAND, SELF, command);
-
- pci1_hose.last_busno = pci_hose_scan (&pci1_hose);
-
- command = pciReadConfigReg (PCI_HOST1, PCI_COMMAND, SELF);
- command |= PCI_COMMAND_MEMORY;
- pciWriteConfigReg (PCI_HOST1, PCI_COMMAND, SELF, command);
-
-}
diff --git a/board/Marvell/db64460/sdram_init.c b/board/Marvell/db64460/sdram_init.c
deleted file mode 100644
index 8cfe84c217..0000000000
--- a/board/Marvell/db64460/sdram_init.c
+++ /dev/null
@@ -1,1985 +0,0 @@
-/*
- * (C) Copyright 2001
- * Josh Huber <huber@mclx.com>, Mission Critical Linux, Inc.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*************************************************************************
- * adaption for the Marvell DB64460 Board
- * Ingo Assmus (ingo.assmus@keymile.com)
- ************************************************************************/
-
-
-/* sdram_init.c - automatic memory sizing */
-
-#include <common.h>
-#include <74xx_7xx.h>
-#include "../include/memory.h"
-#include "../include/pci.h"
-#include "../include/mv_gen_reg.h"
-#include <net.h>
-
-#include "eth.h"
-#include "mpsc.h"
-#include "../common/i2c.h"
-#include "64460.h"
-#include "mv_regs.h"
-
-#undef DEBUG
-#define MAP_PCI
-
-#ifdef DEBUG
-#define DP(x) x
-#else
-#define DP(x)
-#endif
-
-int set_dfcdlInit (void); /* setup delay line of Mv64460 */
-int mvDmaIsChannelActive (int);
-int mvDmaSetMemorySpace (ulong, ulong, ulong, ulong, ulong);
-int mvDmaTransfer (int, ulong, ulong, ulong, ulong);
-
-/* ------------------------------------------------------------------------- */
-
-int
-memory_map_bank (unsigned int bankNo,
- unsigned int bankBase, unsigned int bankLength)
-{
-#ifdef MAP_PCI
- PCI_HOST host;
-#endif
-
-
-#ifdef DEBUG
- if (bankLength > 0) {
- printf ("mapping bank %d at %08x - %08x\n",
- bankNo, bankBase, bankBase + bankLength - 1);
- } else {
- printf ("unmapping bank %d\n", bankNo);
- }
-#endif
-
- memoryMapBank (bankNo, bankBase, bankLength);
-
-#ifdef MAP_PCI
- for (host = PCI_HOST0; host <= PCI_HOST1; host++) {
- const int features =
- PREFETCH_ENABLE |
- DELAYED_READ_ENABLE |
- AGGRESSIVE_PREFETCH |
- READ_LINE_AGGRESSIVE_PREFETCH |
- READ_MULTI_AGGRESSIVE_PREFETCH |
- MAX_BURST_4 | PCI_NO_SWAP;
-
- pciMapMemoryBank (host, bankNo, bankBase, bankLength);
-
- pciSetRegionSnoopMode (host, bankNo, PCI_SNOOP_WB, bankBase,
- bankLength);
-
- pciSetRegionFeatures (host, bankNo, features, bankBase,
- bankLength);
- }
-#endif
- return 0;
-}
-
-#define GB (1 << 30)
-
-/* much of this code is based on (or is) the code in the pip405 port */
-/* thanks go to the authors of said port - Josh */
-
-/* structure to store the relevant information about an sdram bank */
-typedef struct sdram_info {
- uchar drb_size;
- uchar registered, ecc;
- uchar tpar;
- uchar tras_clocks;
- uchar burst_len;
- uchar banks, slot;
-} sdram_info_t;
-
-/* Typedefs for 'gtAuxilGetDIMMinfo' function */
-
-typedef enum _memoryType { SDRAM, DDR } MEMORY_TYPE;
-
-typedef enum _voltageInterface { TTL_5V_TOLERANT, LVTTL, HSTL_1_5V,
- SSTL_3_3V, SSTL_2_5V, VOLTAGE_UNKNOWN,
-} VOLTAGE_INTERFACE;
-
-typedef enum _max_CL_supported_DDR { DDR_CL_1 = 1, DDR_CL_1_5 = 2, DDR_CL_2 =
- 4, DDR_CL_2_5 = 8, DDR_CL_3 = 16, DDR_CL_3_5 =
- 32, DDR_CL_FAULT } MAX_CL_SUPPORTED_DDR;
-typedef enum _max_CL_supported_SD { SD_CL_1 =
- 1, SD_CL_2, SD_CL_3, SD_CL_4, SD_CL_5, SD_CL_6, SD_CL_7,
- SD_FAULT } MAX_CL_SUPPORTED_SD;
-
-
-/* SDRAM/DDR information struct */
-typedef struct _gtMemoryDimmInfo {
- MEMORY_TYPE memoryType;
- unsigned int numOfRowAddresses;
- unsigned int numOfColAddresses;
- unsigned int numOfModuleBanks;
- unsigned int dataWidth;
- VOLTAGE_INTERFACE voltageInterface;
- unsigned int errorCheckType; /* ECC , PARITY.. */
- unsigned int sdramWidth; /* 4,8,16 or 32 */ ;
- unsigned int errorCheckDataWidth; /* 0 - no, 1 - Yes */
- unsigned int minClkDelay;
- unsigned int burstLengthSupported;
- unsigned int numOfBanksOnEachDevice;
- unsigned int suportedCasLatencies;
- unsigned int RefreshInterval;
- unsigned int maxCASlatencySupported_LoP; /* LoP left of point (measured in ns) */
- unsigned int maxCASlatencySupported_RoP; /* RoP right of point (measured in ns) */
- MAX_CL_SUPPORTED_DDR maxClSupported_DDR;
- MAX_CL_SUPPORTED_SD maxClSupported_SD;
- unsigned int moduleBankDensity;
- /* module attributes (true for yes) */
- bool bufferedAddrAndControlInputs;
- bool registeredAddrAndControlInputs;
- bool onCardPLL;
- bool bufferedDQMBinputs;
- bool registeredDQMBinputs;
- bool differentialClockInput;
- bool redundantRowAddressing;
-
- /* module general attributes */
- bool suportedAutoPreCharge;
- bool suportedPreChargeAll;
- bool suportedEarlyRasPreCharge;
- bool suportedWrite1ReadBurst;
- bool suported5PercentLowVCC;
- bool suported5PercentUpperVCC;
- /* module timing parameters */
- unsigned int minRasToCasDelay;
- unsigned int minRowActiveRowActiveDelay;
- unsigned int minRasPulseWidth;
- unsigned int minRowPrechargeTime; /* measured in ns */
-
- int addrAndCommandHoldTime; /* LoP left of point (measured in ns) */
- int addrAndCommandSetupTime; /* (measured in ns/100) */
- int dataInputSetupTime; /* LoP left of point (measured in ns) */
- int dataInputHoldTime; /* LoP left of point (measured in ns) */
-/* tAC times for highest 2nd and 3rd highest CAS Latency values */
- unsigned int clockToDataOut_LoP; /* LoP left of point (measured in ns) */
- unsigned int clockToDataOut_RoP; /* RoP right of point (measured in ns) */
- unsigned int clockToDataOutMinus1_LoP; /* LoP left of point (measured in ns) */
- unsigned int clockToDataOutMinus1_RoP; /* RoP right of point (measured in ns) */
- unsigned int clockToDataOutMinus2_LoP; /* LoP left of point (measured in ns) */
- unsigned int clockToDataOutMinus2_RoP; /* RoP right of point (measured in ns) */
-
- unsigned int minimumCycleTimeAtMaxCasLatancy_LoP; /* LoP left of point (measured in ns) */
- unsigned int minimumCycleTimeAtMaxCasLatancy_RoP; /* RoP right of point (measured in ns) */
-
- unsigned int minimumCycleTimeAtMaxCasLatancyMinus1_LoP; /* LoP left of point (measured in ns) */
- unsigned int minimumCycleTimeAtMaxCasLatancyMinus1_RoP; /* RoP right of point (measured in ns) */
-
- unsigned int minimumCycleTimeAtMaxCasLatancyMinus2_LoP; /* LoP left of point (measured in ns) */
- unsigned int minimumCycleTimeAtMaxCasLatancyMinus2_RoP; /* RoP right of point (measured in ns) */
-
- /* Parameters calculated from
- the extracted DIMM information */
- unsigned int size;
- unsigned int deviceDensity; /* 16,64,128,256 or 512 Mbit */
- unsigned int numberOfDevices;
- uchar drb_size; /* DRAM size in n*64Mbit */
- uchar slot; /* Slot Number this module is inserted in */
- uchar spd_raw_data[128]; /* Content of SPD-EEPROM copied 1:1 */
-#ifdef DEBUG
- uchar manufactura[8]; /* Content of SPD-EEPROM Byte 64-71 */
- uchar modul_id[18]; /* Content of SPD-EEPROM Byte 73-90 */
- uchar vendor_data[27]; /* Content of SPD-EEPROM Byte 99-125 */
- unsigned long modul_serial_no; /* Content of SPD-EEPROM Byte 95-98 */
- unsigned int manufac_date; /* Content of SPD-EEPROM Byte 93-94 */
- unsigned int modul_revision; /* Content of SPD-EEPROM Byte 91-92 */
- uchar manufac_place; /* Content of SPD-EEPROM Byte 72 */
-
-#endif
-} AUX_MEM_DIMM_INFO;
-
-
-/*
- * translate ns.ns/10 coding of SPD timing values
- * into 10 ps unit values
- */
-static inline unsigned short NS10to10PS (unsigned char spd_byte)
-{
- unsigned short ns, ns10;
-
- /* isolate upper nibble */
- ns = (spd_byte >> 4) & 0x0F;
- /* isolate lower nibble */
- ns10 = (spd_byte & 0x0F);
-
- return (ns * 100 + ns10 * 10);
-}
-
-/*
- * translate ns coding of SPD timing values
- * into 10 ps unit values
- */
-static inline unsigned short NSto10PS (unsigned char spd_byte)
-{
- return (spd_byte * 100);
-}
-
-/* This code reads the SPD chip on the sdram and populates
- * the array which is passed in with the relevant information */
-/* static int check_dimm(uchar slot, AUX_MEM_DIMM_INFO *info) */
-static int check_dimm (uchar slot, AUX_MEM_DIMM_INFO * dimmInfo)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- unsigned long spd_checksum;
-
-#ifdef ZUMA_NTL
- /* zero all the values */
- memset (info, 0, sizeof (*info));
-
-/*
- if (!slot) {
- info->slot = 0;
- info->banks = 1;
- info->registered = 0;
- info->drb_size = 16;*/ /* 16 - 256MBit, 32 - 512MBit */
-/* info->tpar = 3;
- info->tras_clocks = 5;
- info->burst_len = 4;
-*/
-#ifdef CONFIG_MV64460_ECC
- /* check for ECC/parity [0 = none, 1 = parity, 2 = ecc] */
- dimmInfo->errorCheckType = 2;
-/* info->ecc = 2;*/
-#endif
-}
-
-return 0;
-
-#else
- uchar addr = slot == 0 ? DIMM0_I2C_ADDR : DIMM1_I2C_ADDR;
- int ret;
- unsigned int i, j, density = 1, devicesForErrCheck = 0;
-
-#ifdef DEBUG
- unsigned int k;
-#endif
- unsigned int rightOfPoint = 0, leftOfPoint = 0, mult, div, time_tmp;
- int sign = 1, shift, maskLeftOfPoint, maskRightOfPoint;
- uchar supp_cal, cal_val;
- ulong memclk, tmemclk;
- ulong tmp;
- uchar trp_clocks = 0, trcd_clocks, tras_clocks, trrd_clocks;
- uchar data[128];
-
- memclk = gd->bus_clk;
- tmemclk = 1000000000 / (memclk / 100); /* in 10 ps units */
-
- DP (puts ("before i2c read\n"));
-
- ret = i2c_read (addr, 0, 1, data, 128);
-
- DP (puts ("after i2c read\n"));
-
- /* zero all the values */
- memset (dimmInfo, 0, sizeof (*dimmInfo));
-
- /* copy the SPD content 1:1 into the dimmInfo structure */
- for (i = 0; i <= 127; i++) {
- dimmInfo->spd_raw_data[i] = data[i];
- }
-
- if (ret) {
- DP (printf ("No DIMM in slot %d [err = %x]\n", slot, ret));
- return 0;
- } else
- dimmInfo->slot = slot; /* start to fill up dimminfo for this "slot" */
-
-#ifdef CFG_DISPLAY_DIMM_SPD_CONTENT
-
- for (i = 0; i <= 127; i++) {
- printf ("SPD-EEPROM Byte %3d = %3x (%3d)\n", i, data[i],
- data[i]);
- }
-
-#endif
-#ifdef DEBUG
-/* find Manufactura of Dimm Module */
- for (i = 0; i < sizeof (dimmInfo->manufactura); i++) {
- dimmInfo->manufactura[i] = data[64 + i];
- }
- printf ("\nThis RAM-Module is produced by: %s\n",
- dimmInfo->manufactura);
-
-/* find Manul-ID of Dimm Module */
- for (i = 0; i < sizeof (dimmInfo->modul_id); i++) {
- dimmInfo->modul_id[i] = data[73 + i];
- }
- printf ("The Module-ID of this RAM-Module is: %s\n",
- dimmInfo->modul_id);
-
-/* find Vendor-Data of Dimm Module */
- for (i = 0; i < sizeof (dimmInfo->vendor_data); i++) {
- dimmInfo->vendor_data[i] = data[99 + i];
- }
- printf ("Vendor Data of this RAM-Module is: %s\n",
- dimmInfo->vendor_data);
-
-/* find modul_serial_no of Dimm Module */
- dimmInfo->modul_serial_no = (*((unsigned long *) (&data[95])));
- printf ("Serial No. of this RAM-Module is: %ld (%lx)\n",
- dimmInfo->modul_serial_no, dimmInfo->modul_serial_no);
-
-/* find Manufac-Data of Dimm Module */
- dimmInfo->manufac_date = (*((unsigned int *) (&data[93])));
- printf ("Manufactoring Date of this RAM-Module is: %d.%d\n", data[93], data[94]); /*dimmInfo->manufac_date */
-
-/* find modul_revision of Dimm Module */
- dimmInfo->modul_revision = (*((unsigned int *) (&data[91])));
- printf ("Module Revision of this RAM-Module is: %d.%d\n", data[91], data[92]); /* dimmInfo->modul_revision */
-
-/* find manufac_place of Dimm Module */
- dimmInfo->manufac_place = (*((unsigned char *) (&data[72])));
- printf ("manufac_place of this RAM-Module is: %d\n",
- dimmInfo->manufac_place);
-
-#endif
-
-/*------------------------------------------------------------------------------------------------------------------------------*/
-/* calculate SPD checksum */
-/*------------------------------------------------------------------------------------------------------------------------------*/
- spd_checksum = 0;
-
- for (i = 0; i <= 62; i++) {
- spd_checksum += data[i];
- }
-
- if ((spd_checksum & 0xff) != data[63]) {
- printf ("### Error in SPD Checksum !!! Is_value: %2x should value %2x\n", (unsigned int) (spd_checksum & 0xff), data[63]);
- hang ();
- }
-
- else
- printf ("SPD Checksum ok!\n");
-
-
-/*------------------------------------------------------------------------------------------------------------------------------*/
- for (i = 2; i <= 35; i++) {
- switch (i) {
- case 2: /* Memory type (DDR / SDRAM) */
- dimmInfo->memoryType = (data[i] == 0x7) ? DDR : SDRAM;
-#ifdef DEBUG
- if (dimmInfo->memoryType == 0)
- DP (printf
- ("Dram_type in slot %d is: SDRAM\n",
- dimmInfo->slot));
- if (dimmInfo->memoryType == 1)
- DP (printf
- ("Dram_type in slot %d is: DDRAM\n",
- dimmInfo->slot));
-#endif
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 3: /* Number Of Row Addresses */
- dimmInfo->numOfRowAddresses = data[i];
- DP (printf
- ("Module Number of row addresses: %d\n",
- dimmInfo->numOfRowAddresses));
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 4: /* Number Of Column Addresses */
- dimmInfo->numOfColAddresses = data[i];
- DP (printf
- ("Module Number of col addresses: %d\n",
- dimmInfo->numOfColAddresses));
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 5: /* Number Of Module Banks */
- dimmInfo->numOfModuleBanks = data[i];
- DP (printf
- ("Number of Banks on Mod. : %d\n",
- dimmInfo->numOfModuleBanks));
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 6: /* Data Width */
- dimmInfo->dataWidth = data[i];
- DP (printf
- ("Module Data Width: %d\n",
- dimmInfo->dataWidth));
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 8: /* Voltage Interface */
- switch (data[i]) {
- case 0x0:
- dimmInfo->voltageInterface = TTL_5V_TOLERANT;
- DP (printf
- ("Module is TTL_5V_TOLERANT\n"));
- break;
- case 0x1:
- dimmInfo->voltageInterface = LVTTL;
- DP (printf
- ("Module is LVTTL\n"));
- break;
- case 0x2:
- dimmInfo->voltageInterface = HSTL_1_5V;
- DP (printf
- ("Module is TTL_5V_TOLERANT\n"));
- break;
- case 0x3:
- dimmInfo->voltageInterface = SSTL_3_3V;
- DP (printf
- ("Module is HSTL_1_5V\n"));
- break;
- case 0x4:
- dimmInfo->voltageInterface = SSTL_2_5V;
- DP (printf
- ("Module is SSTL_2_5V\n"));
- break;
- default:
- dimmInfo->voltageInterface = VOLTAGE_UNKNOWN;
- DP (printf
- ("Module is VOLTAGE_UNKNOWN\n"));
- break;
- }
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 9: /* Minimum Cycle Time At Max CasLatancy */
- shift = (dimmInfo->memoryType == DDR) ? 4 : 2;
- mult = (dimmInfo->memoryType == DDR) ? 10 : 25;
- maskLeftOfPoint =
- (dimmInfo->memoryType == DDR) ? 0xf0 : 0xfc;
- maskRightOfPoint =
- (dimmInfo->memoryType == DDR) ? 0xf : 0x03;
- leftOfPoint = (data[i] & maskLeftOfPoint) >> shift;
- rightOfPoint = (data[i] & maskRightOfPoint) * mult;
- dimmInfo->minimumCycleTimeAtMaxCasLatancy_LoP =
- leftOfPoint;
- dimmInfo->minimumCycleTimeAtMaxCasLatancy_RoP =
- rightOfPoint;
- DP (printf
- ("Minimum Cycle Time At Max CasLatancy: %d.%d [ns]\n",
- leftOfPoint, rightOfPoint));
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 10: /* Clock To Data Out */
- div = (dimmInfo->memoryType == DDR) ? 100 : 10;
- time_tmp =
- (((data[i] & 0xf0) >> 4) * 10) +
- ((data[i] & 0x0f));
- leftOfPoint = time_tmp / div;
- rightOfPoint = time_tmp % div;
- dimmInfo->clockToDataOut_LoP = leftOfPoint;
- dimmInfo->clockToDataOut_RoP = rightOfPoint;
- DP (printf ("Clock To Data Out: %d.%2d [ns]\n", leftOfPoint, rightOfPoint)); /*dimmInfo->clockToDataOut */
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
-/*#ifdef CONFIG_ECC */
- case 11: /* Error Check Type */
- dimmInfo->errorCheckType = data[i];
- DP (printf
- ("Error Check Type (0=NONE): %d\n",
- dimmInfo->errorCheckType));
- break;
-/* #endif */
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 12: /* Refresh Interval */
- dimmInfo->RefreshInterval = data[i];
- DP (printf
- ("RefreshInterval (80= Self refresh Normal, 15.625us) : %x\n",
- dimmInfo->RefreshInterval));
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 13: /* Sdram Width */
- dimmInfo->sdramWidth = data[i];
- DP (printf
- ("Sdram Width: %d\n",
- dimmInfo->sdramWidth));
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 14: /* Error Check Data Width */
- dimmInfo->errorCheckDataWidth = data[i];
- DP (printf
- ("Error Check Data Width: %d\n",
- dimmInfo->errorCheckDataWidth));
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 15: /* Minimum Clock Delay */
- dimmInfo->minClkDelay = data[i];
- DP (printf
- ("Minimum Clock Delay: %d\n",
- dimmInfo->minClkDelay));
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 16: /* Burst Length Supported */
- /******-******-******-*******
- * bit3 | bit2 | bit1 | bit0 *
- *******-******-******-*******
- burst length = * 8 | 4 | 2 | 1 *
- *****************************
-
- If for example bit0 and bit2 are set, the burst
- length supported are 1 and 4. */
-
- dimmInfo->burstLengthSupported = data[i];
-#ifdef DEBUG
- DP (printf
- ("Burst Length Supported: "));
- if (dimmInfo->burstLengthSupported & 0x01)
- DP (printf ("1, "));
- if (dimmInfo->burstLengthSupported & 0x02)
- DP (printf ("2, "));
- if (dimmInfo->burstLengthSupported & 0x04)
- DP (printf ("4, "));
- if (dimmInfo->burstLengthSupported & 0x08)
- DP (printf ("8, "));
- DP (printf (" Bit \n"));
-#endif
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 17: /* Number Of Banks On Each Device */
- dimmInfo->numOfBanksOnEachDevice = data[i];
- DP (printf
- ("Number Of Banks On Each Chip: %d\n",
- dimmInfo->numOfBanksOnEachDevice));
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 18: /* Suported Cas Latencies */
-
- /* DDR:
- *******-******-******-******-******-******-******-*******
- * bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 *
- *******-******-******-******-******-******-******-*******
- CAS = * TBD | TBD | 3.5 | 3 | 2.5 | 2 | 1.5 | 1 *
- *********************************************************
- SDRAM:
- *******-******-******-******-******-******-******-*******
- * bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 *
- *******-******-******-******-******-******-******-*******
- CAS = * TBD | 7 | 6 | 5 | 4 | 3 | 2 | 1 *
- ********************************************************/
- dimmInfo->suportedCasLatencies = data[i];
-#ifdef DEBUG
- DP (printf
- ("Suported Cas Latencies: (CL) "));
- if (dimmInfo->memoryType == 0) { /* SDRAM */
- for (k = 0; k <= 7; k++) {
- if (dimmInfo->
- suportedCasLatencies & (1 << k))
- DP (printf
- ("%d, ",
- k + 1));
- }
-
- } else { /* DDR-RAM */
-
- if (dimmInfo->suportedCasLatencies & 1)
- DP (printf ("1, "));
- if (dimmInfo->suportedCasLatencies & 2)
- DP (printf ("1.5, "));
- if (dimmInfo->suportedCasLatencies & 4)
- DP (printf ("2, "));
- if (dimmInfo->suportedCasLatencies & 8)
- DP (printf ("2.5, "));
- if (dimmInfo->suportedCasLatencies & 16)
- DP (printf ("3, "));
- if (dimmInfo->suportedCasLatencies & 32)
- DP (printf ("3.5, "));
-
- }
- DP (printf ("\n"));
-#endif
- /* Calculating MAX CAS latency */
- for (j = 7; j > 0; j--) {
- if (((dimmInfo->
- suportedCasLatencies >> j) & 0x1) ==
- 1) {
- switch (dimmInfo->memoryType) {
- case DDR:
- /* CAS latency 1, 1.5, 2, 2.5, 3, 3.5 */
- switch (j) {
- case 7:
- DP (printf
- ("Max. Cas Latencies (DDR): ERROR !!!\n"));
- dimmInfo->
- maxClSupported_DDR
- =
- DDR_CL_FAULT;
- hang ();
- break;
- case 6:
- DP (printf
- ("Max. Cas Latencies (DDR): ERROR !!!\n"));
- dimmInfo->
- maxClSupported_DDR
- =
- DDR_CL_FAULT;
- hang ();
- break;
- case 5:
- DP (printf
- ("Max. Cas Latencies (DDR): 3.5 clk's\n"));
- dimmInfo->
- maxClSupported_DDR
- = DDR_CL_3_5;
- break;
- case 4:
- DP (printf
- ("Max. Cas Latencies (DDR): 3 clk's \n"));
- dimmInfo->
- maxClSupported_DDR
- = DDR_CL_3;
- break;
- case 3:
- DP (printf
- ("Max. Cas Latencies (DDR): 2.5 clk's \n"));
- dimmInfo->
- maxClSupported_DDR
- = DDR_CL_2_5;
- break;
- case 2:
- DP (printf
- ("Max. Cas Latencies (DDR): 2 clk's \n"));
- dimmInfo->
- maxClSupported_DDR
- = DDR_CL_2;
- break;
- case 1:
- DP (printf
- ("Max. Cas Latencies (DDR): 1.5 clk's \n"));
- dimmInfo->
- maxClSupported_DDR
- = DDR_CL_1_5;
- break;
- }
-
- /* ronen - in case we have a DIMM with minimumCycleTimeAtMaxCasLatancy
- lower then our SDRAM cycle count, we won't be able to support this CAL
- and we will have to use lower CAL. (minus - means from 3.0 to 2.5) */
- if ((dimmInfo->
- minimumCycleTimeAtMaxCasLatancy_LoP
- <
- CFG_DDR_SDRAM_CYCLE_COUNT_LOP)
- ||
- ((dimmInfo->
- minimumCycleTimeAtMaxCasLatancy_LoP
- ==
- CFG_DDR_SDRAM_CYCLE_COUNT_LOP)
- && (dimmInfo->
- minimumCycleTimeAtMaxCasLatancy_RoP
- <
- CFG_DDR_SDRAM_CYCLE_COUNT_ROP)))
- {
- dimmInfo->
- maxClSupported_DDR
- =
- dimmInfo->
- maxClSupported_DDR
- >> 1;
- DP (printf
- ("*** Change actual Cas Latencies cause of minimumCycleTime n"));
- }
- /* ronen - checkif the Dimm frequency compared to the Sysclock. */
- if ((dimmInfo->
- minimumCycleTimeAtMaxCasLatancy_LoP
- >
- CFG_DDR_SDRAM_CYCLE_COUNT_LOP)
- ||
- ((dimmInfo->
- minimumCycleTimeAtMaxCasLatancy_LoP
- ==
- CFG_DDR_SDRAM_CYCLE_COUNT_LOP)
- && (dimmInfo->
- minimumCycleTimeAtMaxCasLatancy_RoP
- >
- CFG_DDR_SDRAM_CYCLE_COUNT_ROP)))
- {
- printf ("*********************************************************\n");
- printf ("*** sysClock is higher than SDRAM's allowed frequency ***\n");
- printf ("*********************************************************\n");
- hang ();
- }
-
- dimmInfo->
- maxCASlatencySupported_LoP
- =
- 1 +
- (int) (5 * j / 10);
- if (((5 * j) % 10) != 0)
- dimmInfo->
- maxCASlatencySupported_RoP
- = 5;
- else
- dimmInfo->
- maxCASlatencySupported_RoP
- = 0;
- DP (printf
- ("Max. Cas Latencies (DDR LoP.RoP Notation): %d.%d \n",
- dimmInfo->
- maxCASlatencySupported_LoP,
- dimmInfo->
- maxCASlatencySupported_RoP));
- break;
- case SDRAM:
- /* CAS latency 1, 2, 3, 4, 5, 6, 7 */
- dimmInfo->maxClSupported_SD = j; /* Cas Latency DDR-RAM Coded */
- DP (printf
- ("Max. Cas Latencies (SD): %d\n",
- dimmInfo->
- maxClSupported_SD));
- dimmInfo->
- maxCASlatencySupported_LoP
- = j;
- dimmInfo->
- maxCASlatencySupported_RoP
- = 0;
- DP (printf
- ("Max. Cas Latencies (DDR LoP.RoP Notation): %d.%d \n",
- dimmInfo->
- maxCASlatencySupported_LoP,
- dimmInfo->
- maxCASlatencySupported_RoP));
- break;
- }
- break;
- }
- }
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 21: /* Buffered Address And Control Inputs */
- DP (printf ("\nModul Attributes (SPD Byte 21): \n"));
- dimmInfo->bufferedAddrAndControlInputs =
- data[i] & BIT0;
- dimmInfo->registeredAddrAndControlInputs =
- (data[i] & BIT1) >> 1;
- dimmInfo->onCardPLL = (data[i] & BIT2) >> 2;
- dimmInfo->bufferedDQMBinputs = (data[i] & BIT3) >> 3;
- dimmInfo->registeredDQMBinputs =
- (data[i] & BIT4) >> 4;
- dimmInfo->differentialClockInput =
- (data[i] & BIT5) >> 5;
- dimmInfo->redundantRowAddressing =
- (data[i] & BIT6) >> 6;
-#ifdef DEBUG
- if (dimmInfo->bufferedAddrAndControlInputs == 1)
- DP (printf
- (" - Buffered Address/Control Input: Yes \n"));
- else
- DP (printf
- (" - Buffered Address/Control Input: No \n"));
-
- if (dimmInfo->registeredAddrAndControlInputs == 1)
- DP (printf
- (" - Registered Address/Control Input: Yes \n"));
- else
- DP (printf
- (" - Registered Address/Control Input: No \n"));
-
- if (dimmInfo->onCardPLL == 1)
- DP (printf
- (" - On-Card PLL (clock): Yes \n"));
- else
- DP (printf
- (" - On-Card PLL (clock): No \n"));
-
- if (dimmInfo->bufferedDQMBinputs == 1)
- DP (printf
- (" - Bufferd DQMB Inputs: Yes \n"));
- else
- DP (printf
- (" - Bufferd DQMB Inputs: No \n"));
-
- if (dimmInfo->registeredDQMBinputs == 1)
- DP (printf
- (" - Registered DQMB Inputs: Yes \n"));
- else
- DP (printf
- (" - Registered DQMB Inputs: No \n"));
-
- if (dimmInfo->differentialClockInput == 1)
- DP (printf
- (" - Differential Clock Input: Yes \n"));
- else
- DP (printf
- (" - Differential Clock Input: No \n"));
-
- if (dimmInfo->redundantRowAddressing == 1)
- DP (printf
- (" - redundant Row Addressing: Yes \n"));
- else
- DP (printf
- (" - redundant Row Addressing: No \n"));
-
-#endif
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 22: /* Suported AutoPreCharge */
- DP (printf ("\nModul Attributes (SPD Byte 22): \n"));
- dimmInfo->suportedEarlyRasPreCharge = data[i] & BIT0;
- dimmInfo->suportedAutoPreCharge =
- (data[i] & BIT1) >> 1;
- dimmInfo->suportedPreChargeAll =
- (data[i] & BIT2) >> 2;
- dimmInfo->suportedWrite1ReadBurst =
- (data[i] & BIT3) >> 3;
- dimmInfo->suported5PercentLowVCC =
- (data[i] & BIT4) >> 4;
- dimmInfo->suported5PercentUpperVCC =
- (data[i] & BIT5) >> 5;
-#ifdef DEBUG
- if (dimmInfo->suportedEarlyRasPreCharge == 1)
- DP (printf
- (" - Early Ras Precharge: Yes \n"));
- else
- DP (printf
- (" - Early Ras Precharge: No \n"));
-
- if (dimmInfo->suportedAutoPreCharge == 1)
- DP (printf
- (" - AutoPreCharge: Yes \n"));
- else
- DP (printf
- (" - AutoPreCharge: No \n"));
-
- if (dimmInfo->suportedPreChargeAll == 1)
- DP (printf
- (" - Precharge All: Yes \n"));
- else
- DP (printf
- (" - Precharge All: No \n"));
-
- if (dimmInfo->suportedWrite1ReadBurst == 1)
- DP (printf
- (" - Write 1/ReadBurst: Yes \n"));
- else
- DP (printf
- (" - Write 1/ReadBurst: No \n"));
-
- if (dimmInfo->suported5PercentLowVCC == 1)
- DP (printf
- (" - lower VCC tolerance: 5 Percent \n"));
- else
- DP (printf
- (" - lower VCC tolerance: 10 Percent \n"));
-
- if (dimmInfo->suported5PercentUpperVCC == 1)
- DP (printf
- (" - upper VCC tolerance: 5 Percent \n"));
- else
- DP (printf
- (" - upper VCC tolerance: 10 Percent \n"));
-
-#endif
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 23: /* Minimum Cycle Time At Maximum Cas Latancy Minus 1 (2nd highest CL) */
- shift = (dimmInfo->memoryType == DDR) ? 4 : 2;
- mult = (dimmInfo->memoryType == DDR) ? 10 : 25;
- maskLeftOfPoint =
- (dimmInfo->memoryType == DDR) ? 0xf0 : 0xfc;
- maskRightOfPoint =
- (dimmInfo->memoryType == DDR) ? 0xf : 0x03;
- leftOfPoint = (data[i] & maskLeftOfPoint) >> shift;
- rightOfPoint = (data[i] & maskRightOfPoint) * mult;
- dimmInfo->minimumCycleTimeAtMaxCasLatancyMinus1_LoP =
- leftOfPoint;
- dimmInfo->minimumCycleTimeAtMaxCasLatancyMinus1_RoP =
- rightOfPoint;
- DP (printf ("Minimum Cycle Time At 2nd highest CasLatancy (0 = Not supported): %d.%d [ns]\n", leftOfPoint, rightOfPoint)); /*dimmInfo->minimumCycleTimeAtMaxCasLatancy */
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 24: /* Clock To Data Out 2nd highest Cas Latency Value */
- div = (dimmInfo->memoryType == DDR) ? 100 : 10;
- time_tmp =
- (((data[i] & 0xf0) >> 4) * 10) +
- ((data[i] & 0x0f));
- leftOfPoint = time_tmp / div;
- rightOfPoint = time_tmp % div;
- dimmInfo->clockToDataOutMinus1_LoP = leftOfPoint;
- dimmInfo->clockToDataOutMinus1_RoP = rightOfPoint;
- DP (printf
- ("Clock To Data Out (2nd CL value): %d.%2d [ns]\n",
- leftOfPoint, rightOfPoint));
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 25: /* Minimum Cycle Time At Maximum Cas Latancy Minus 2 (3rd highest CL) */
- shift = (dimmInfo->memoryType == DDR) ? 4 : 2;
- mult = (dimmInfo->memoryType == DDR) ? 10 : 25;
- maskLeftOfPoint =
- (dimmInfo->memoryType == DDR) ? 0xf0 : 0xfc;
- maskRightOfPoint =
- (dimmInfo->memoryType == DDR) ? 0xf : 0x03;
- leftOfPoint = (data[i] & maskLeftOfPoint) >> shift;
- rightOfPoint = (data[i] & maskRightOfPoint) * mult;
- dimmInfo->minimumCycleTimeAtMaxCasLatancyMinus2_LoP =
- leftOfPoint;
- dimmInfo->minimumCycleTimeAtMaxCasLatancyMinus2_RoP =
- rightOfPoint;
- DP (printf ("Minimum Cycle Time At 3rd highest CasLatancy (0 = Not supported): %d.%d [ns]\n", leftOfPoint, rightOfPoint)); /*dimmInfo->minimumCycleTimeAtMaxCasLatancy */
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 26: /* Clock To Data Out 3rd highest Cas Latency Value */
- div = (dimmInfo->memoryType == DDR) ? 100 : 10;
- time_tmp =
- (((data[i] & 0xf0) >> 4) * 10) +
- ((data[i] & 0x0f));
- leftOfPoint = time_tmp / div;
- rightOfPoint = time_tmp % div;
- dimmInfo->clockToDataOutMinus2_LoP = leftOfPoint;
- dimmInfo->clockToDataOutMinus2_RoP = rightOfPoint;
- DP (printf
- ("Clock To Data Out (3rd CL value): %d.%2d [ns]\n",
- leftOfPoint, rightOfPoint));
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 27: /* Minimum Row Precharge Time */
- shift = (dimmInfo->memoryType == DDR) ? 2 : 0;
- maskLeftOfPoint =
- (dimmInfo->memoryType == DDR) ? 0xfc : 0xff;
- maskRightOfPoint =
- (dimmInfo->memoryType == DDR) ? 0x03 : 0x00;
- leftOfPoint = ((data[i] & maskLeftOfPoint) >> shift);
- rightOfPoint = (data[i] & maskRightOfPoint) * 25;
-
- dimmInfo->minRowPrechargeTime = ((leftOfPoint * 100) + rightOfPoint); /* measured in n times 10ps Intervals */
- trp_clocks =
- (dimmInfo->minRowPrechargeTime +
- (tmemclk - 1)) / tmemclk;
- DP (printf
- ("*** 1 clock cycle = %ld 10ps intervalls = %ld.%ld ns****\n",
- tmemclk, tmemclk / 100, tmemclk % 100));
- DP (printf
- ("Minimum Row Precharge Time [ns]: %d.%2d = in Clk cycles %d\n",
- leftOfPoint, rightOfPoint, trp_clocks));
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 28: /* Minimum Row Active to Row Active Time */
- shift = (dimmInfo->memoryType == DDR) ? 2 : 0;
- maskLeftOfPoint =
- (dimmInfo->memoryType == DDR) ? 0xfc : 0xff;
- maskRightOfPoint =
- (dimmInfo->memoryType == DDR) ? 0x03 : 0x00;
- leftOfPoint = ((data[i] & maskLeftOfPoint) >> shift);
- rightOfPoint = (data[i] & maskRightOfPoint) * 25;
-
- dimmInfo->minRowActiveRowActiveDelay = ((leftOfPoint * 100) + rightOfPoint); /* measured in 100ns Intervals */
- trrd_clocks =
- (dimmInfo->minRowActiveRowActiveDelay +
- (tmemclk - 1)) / tmemclk;
- DP (printf
- ("Minimum Row Active -To- Row Active Delay [ns]: %d.%2d = in Clk cycles %d\n",
- leftOfPoint, rightOfPoint, trp_clocks));
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 29: /* Minimum Ras-To-Cas Delay */
- shift = (dimmInfo->memoryType == DDR) ? 2 : 0;
- maskLeftOfPoint =
- (dimmInfo->memoryType == DDR) ? 0xfc : 0xff;
- maskRightOfPoint =
- (dimmInfo->memoryType == DDR) ? 0x03 : 0x00;
- leftOfPoint = ((data[i] & maskLeftOfPoint) >> shift);
- rightOfPoint = (data[i] & maskRightOfPoint) * 25;
-
- dimmInfo->minRowActiveRowActiveDelay = ((leftOfPoint * 100) + rightOfPoint); /* measured in 100ns Intervals */
- trcd_clocks =
- (dimmInfo->minRowActiveRowActiveDelay +
- (tmemclk - 1)) / tmemclk;
- DP (printf
- ("Minimum Ras-To-Cas Delay [ns]: %d.%2d = in Clk cycles %d\n",
- leftOfPoint, rightOfPoint, trp_clocks));
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 30: /* Minimum Ras Pulse Width */
- dimmInfo->minRasPulseWidth = data[i];
- tras_clocks =
- (NSto10PS (data[i]) +
- (tmemclk - 1)) / tmemclk;
- DP (printf
- ("Minimum Ras Pulse Width [ns]: %d = in Clk cycles %d\n",
- dimmInfo->minRasPulseWidth, tras_clocks));
-
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 31: /* Module Bank Density */
- dimmInfo->moduleBankDensity = data[i];
- DP (printf
- ("Module Bank Density: %d\n",
- dimmInfo->moduleBankDensity));
-#ifdef DEBUG
- DP (printf
- ("*** Offered Densities (more than 1 = Multisize-Module): "));
- {
- if (dimmInfo->moduleBankDensity & 1)
- DP (printf ("4MB, "));
- if (dimmInfo->moduleBankDensity & 2)
- DP (printf ("8MB, "));
- if (dimmInfo->moduleBankDensity & 4)
- DP (printf ("16MB, "));
- if (dimmInfo->moduleBankDensity & 8)
- DP (printf ("32MB, "));
- if (dimmInfo->moduleBankDensity & 16)
- DP (printf ("64MB, "));
- if (dimmInfo->moduleBankDensity & 32)
- DP (printf ("128MB, "));
- if ((dimmInfo->moduleBankDensity & 64)
- || (dimmInfo->moduleBankDensity & 128)) {
- DP (printf ("ERROR, "));
- hang ();
- }
- }
- DP (printf ("\n"));
-#endif
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 32: /* Address And Command Setup Time (measured in ns/1000) */
- sign = 1;
- switch (dimmInfo->memoryType) {
- case DDR:
- time_tmp =
- (((data[i] & 0xf0) >> 4) * 10) +
- ((data[i] & 0x0f));
- leftOfPoint = time_tmp / 100;
- rightOfPoint = time_tmp % 100;
- break;
- case SDRAM:
- leftOfPoint = (data[i] & 0xf0) >> 4;
- if (leftOfPoint > 7) {
- leftOfPoint = data[i] & 0x70 >> 4;
- sign = -1;
- }
- rightOfPoint = (data[i] & 0x0f);
- break;
- }
- dimmInfo->addrAndCommandSetupTime =
- (leftOfPoint * 100 + rightOfPoint) * sign;
- DP (printf
- ("Address And Command Setup Time [ns]: %d.%d\n",
- sign * leftOfPoint, rightOfPoint));
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 33: /* Address And Command Hold Time */
- sign = 1;
- switch (dimmInfo->memoryType) {
- case DDR:
- time_tmp =
- (((data[i] & 0xf0) >> 4) * 10) +
- ((data[i] & 0x0f));
- leftOfPoint = time_tmp / 100;
- rightOfPoint = time_tmp % 100;
- break;
- case SDRAM:
- leftOfPoint = (data[i] & 0xf0) >> 4;
- if (leftOfPoint > 7) {
- leftOfPoint = data[i] & 0x70 >> 4;
- sign = -1;
- }
- rightOfPoint = (data[i] & 0x0f);
- break;
- }
- dimmInfo->addrAndCommandHoldTime =
- (leftOfPoint * 100 + rightOfPoint) * sign;
- DP (printf
- ("Address And Command Hold Time [ns]: %d.%d\n",
- sign * leftOfPoint, rightOfPoint));
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 34: /* Data Input Setup Time */
- sign = 1;
- switch (dimmInfo->memoryType) {
- case DDR:
- time_tmp =
- (((data[i] & 0xf0) >> 4) * 10) +
- ((data[i] & 0x0f));
- leftOfPoint = time_tmp / 100;
- rightOfPoint = time_tmp % 100;
- break;
- case SDRAM:
- leftOfPoint = (data[i] & 0xf0) >> 4;
- if (leftOfPoint > 7) {
- leftOfPoint = data[i] & 0x70 >> 4;
- sign = -1;
- }
- rightOfPoint = (data[i] & 0x0f);
- break;
- }
- dimmInfo->dataInputSetupTime =
- (leftOfPoint * 100 + rightOfPoint) * sign;
- DP (printf
- ("Data Input Setup Time [ns]: %d.%d\n",
- sign * leftOfPoint, rightOfPoint));
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 35: /* Data Input Hold Time */
- sign = 1;
- switch (dimmInfo->memoryType) {
- case DDR:
- time_tmp =
- (((data[i] & 0xf0) >> 4) * 10) +
- ((data[i] & 0x0f));
- leftOfPoint = time_tmp / 100;
- rightOfPoint = time_tmp % 100;
- break;
- case SDRAM:
- leftOfPoint = (data[i] & 0xf0) >> 4;
- if (leftOfPoint > 7) {
- leftOfPoint = data[i] & 0x70 >> 4;
- sign = -1;
- }
- rightOfPoint = (data[i] & 0x0f);
- break;
- }
- dimmInfo->dataInputHoldTime =
- (leftOfPoint * 100 + rightOfPoint) * sign;
- DP (printf
- ("Data Input Hold Time [ns]: %d.%d\n\n",
- sign * leftOfPoint, rightOfPoint));
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
- }
- }
- /* calculating the sdram density */
- for (i = 0;
- i < dimmInfo->numOfRowAddresses + dimmInfo->numOfColAddresses;
- i++) {
- density = density * 2;
- }
- dimmInfo->deviceDensity = density * dimmInfo->numOfBanksOnEachDevice *
- dimmInfo->sdramWidth;
- dimmInfo->numberOfDevices =
- (dimmInfo->dataWidth / dimmInfo->sdramWidth) *
- dimmInfo->numOfModuleBanks;
- devicesForErrCheck =
- (dimmInfo->dataWidth - 64) / dimmInfo->sdramWidth;
- if ((dimmInfo->errorCheckType == 0x1)
- || (dimmInfo->errorCheckType == 0x2)
- || (dimmInfo->errorCheckType == 0x3)) {
- dimmInfo->size =
- (dimmInfo->deviceDensity / 8) *
- (dimmInfo->numberOfDevices -
- /* ronen on the 1G dimm we get wrong value. (was devicesForErrCheck) */
- dimmInfo->numberOfDevices / 8);
- } else {
- dimmInfo->size =
- (dimmInfo->deviceDensity / 8) *
- dimmInfo->numberOfDevices;
- }
-
- /* compute the module DRB size */
- tmp = (1 <<
- (dimmInfo->numOfRowAddresses + dimmInfo->numOfColAddresses));
- tmp *= dimmInfo->numOfModuleBanks;
- tmp *= dimmInfo->sdramWidth;
- tmp = tmp >> 24; /* div by 0x4000000 (64M) */
- dimmInfo->drb_size = (uchar) tmp;
- DP (printf ("Module DRB size (n*64Mbit): %d\n", dimmInfo->drb_size));
-
- /* try a CAS latency of 3 first... */
-
- /* bit 1 is CL2, bit 2 is CL3 */
- supp_cal = (dimmInfo->suportedCasLatencies & 0x6) >> 1;
-
- cal_val = 0;
- if (supp_cal & 3) {
- if (NS10to10PS (data[9]) <= tmemclk)
- cal_val = 3;
- }
-
- /* then 2... */
- if (supp_cal & 2) {
- if (NS10to10PS (data[23]) <= tmemclk)
- cal_val = 2;
- }
-
- DP (printf ("cal_val = %d\n", cal_val));
-
- /* bummer, did't work... */
- if (cal_val == 0) {
- DP (printf ("Couldn't find a good CAS latency\n"));
- hang ();
- return 0;
- }
-
- return true;
-#endif
-}
-
-/* sets up the GT properly with information passed in */
-int setup_sdram (AUX_MEM_DIMM_INFO * info)
-{
- ulong tmp, check;
- ulong tmp_sdram_mode = 0; /* 0x141c */
- ulong tmp_dunit_control_low = 0; /* 0x1404 */
- int i;
-
- /* added 8/21/2003 P. Marchese */
- unsigned int sdram_config_reg;
-
- /* added 10/10/2003 P. Marchese */
- ulong sdram_chip_size;
-
- /* sanity checking */
- if (!info->numOfModuleBanks) {
- printf ("setup_sdram called with 0 banks\n");
- return 1;
- }
-
- /* delay line */
- set_dfcdlInit (); /* may be its not needed */
- DP (printf ("Delay line set done\n"));
-
- /* set SDRAM mode NOP */ /* To_do check it */
- GT_REG_WRITE (SDRAM_OPERATION, 0x5);
- while (GTREGREAD (SDRAM_OPERATION) != 0) {
- DP (printf
- ("\n*** SDRAM_OPERATION 1418: Module still busy ... please wait... ***\n"));
- }
-
- /* SDRAM configuration */
-/* added 8/21/2003 P. Marchese */
-/* code allows usage of registered DIMMS */
-
- /* figure out the memory refresh internal */
- switch (info->RefreshInterval) {
- case 0x0:
- case 0x80: /* refresh period is 15.625 usec */
- sdram_config_reg =
- (unsigned int) (((float) 15.625 * (float) CFG_BUS_HZ)
- / (float) 1000000.0);
- break;
- case 0x1:
- case 0x81: /* refresh period is 3.9 usec */
- sdram_config_reg =
- (unsigned int) (((float) 3.9 * (float) CFG_BUS_HZ) /
- (float) 1000000.0);
- break;
- case 0x2:
- case 0x82: /* refresh period is 7.8 usec */
- sdram_config_reg =
- (unsigned int) (((float) 7.8 * (float) CFG_BUS_HZ) /
- (float) 1000000.0);
- break;
- case 0x3:
- case 0x83: /* refresh period is 31.3 usec */
- sdram_config_reg =
- (unsigned int) (((float) 31.3 * (float) CFG_BUS_HZ) /
- (float) 1000000.0);
- break;
- case 0x4:
- case 0x84: /* refresh period is 62.5 usec */
- sdram_config_reg =
- (unsigned int) (((float) 62.5 * (float) CFG_BUS_HZ) /
- (float) 1000000.0);
- break;
- case 0x5:
- case 0x85: /* refresh period is 125 usec */
- sdram_config_reg =
- (unsigned int) (((float) 125 * (float) CFG_BUS_HZ) /
- (float) 1000000.0);
- break;
- default: /* refresh period undefined */
- printf ("DRAM refresh period is unknown!\n");
- printf ("Aborting DRAM setup with an error\n");
- hang ();
- break;
- }
- DP (printf ("calculated refresh interval %0x\n", sdram_config_reg));
-
- /* make sure the refresh value is only 14 bits */
- if (sdram_config_reg > 0x1fff)
- sdram_config_reg = 0x1fff;
- DP (printf ("adjusted refresh interval %0x\n", sdram_config_reg));
-
- /* we want physical bank interleaving and */
- /* virtual bank interleaving enabled so do nothing */
- /* since these bits need to be zero to enable the interleaving */
-
- /* registered DRAM ? */
- if (info->registeredAddrAndControlInputs == 1) {
- /* it's registered DRAM, so set the reg. DRAM bit */
- sdram_config_reg = sdram_config_reg | BIT17;
- DP (printf ("Enabling registered DRAM bit\n"));
- }
- /* turn on DRAM ECC? */
-#ifdef CONFIG_MV64460_ECC
- if (info->errorCheckType == 0x2) {
- /* DRAM has ECC, so turn it on */
- sdram_config_reg = sdram_config_reg | BIT18;
- DP (printf ("Enabling ECC\n"));
- }
-#endif
- /* set the data DQS pin configuration */
- switch (info->sdramWidth) {
- case 0x4: /* memory is x4 */
- sdram_config_reg = sdram_config_reg | BIT20 | BIT21;
- DP (printf ("Data DQS pins set for 16 pins\n"));
- break;
- case 0x8: /* memory is x8 or x16 */
- case 0x10:
- sdram_config_reg = sdram_config_reg | BIT21;
- DP (printf ("Data DQS pins set for 8 pins\n"));
- break;
- case 0x20: /* memory is x32 */
- /* both bits are cleared for x32 so nothing to do */
- DP (printf ("Data DQS pins set for 2 pins\n"));
- break;
- default: /* memory width unsupported */
- printf ("DRAM chip width is unknown!\n");
- printf ("Aborting DRAM setup with an error\n");
- hang ();
- break;
- }
-
- /*ronen db64460 */
- /* perform read buffer assignments */
- /* we are going to use the Power-up defaults */
- /* bit 27 = PCI bus #0 = buffer 0 */
- /* bit 28 = PCI bus #1 = buffer 0 */
- /* bit 29 = MPSC = buffer 0 */
- /* bit 30 = IDMA = buffer 0 */
- /* bit 31 = Gigabit = buffer 0 */
- sdram_config_reg = sdram_config_reg | 0x58000000;
- sdram_config_reg = sdram_config_reg & 0xffffff00;
- /* bit 14 FBSplit = FCRAM controller bsplit enable. */
- /* bit 15 vw = FCRAM Variable write length enable. */
- /* bit 16 DType = Dram Type (0 = FCRAM,1 = Standard) */
- sdram_config_reg = sdram_config_reg | BIT14 | BIT15;
-
- /* write the value into the SDRAM configuration register */
- GT_REG_WRITE (SDRAM_CONFIG, sdram_config_reg);
- DP (printf ("sdram_conf 0x1400: %08x\n", GTREGREAD (SDRAM_CONFIG)));
-
- /* SDRAM open pages control keep open as much as I can */
- GT_REG_WRITE (SDRAM_OPEN_PAGES_CONTROL, 0x0);
- DP (printf
- ("sdram_open_pages_controll 0x1414: %08x\n",
- GTREGREAD (SDRAM_OPEN_PAGES_CONTROL)));
-
- /* SDRAM D_UNIT_CONTROL_LOW 0x1404 */
- tmp = (GTREGREAD (D_UNIT_CONTROL_LOW) & 0x01); /* Clock Domain Sync from power on reset */
- if (tmp == 0)
- DP (printf ("Core Signals are sync (by HW-Setting)!!!\n"));
- else
- DP (printf
- ("Core Signals syncs. are bypassed (by HW-Setting)!!!\n"));
-
- /* SDRAM set CAS Latency according to SPD information */
- switch (info->memoryType) {
- case SDRAM:
- printf ("### SD-RAM not supported !!!\n");
- printf ("Aborting!!!\n");
- hang ();
- /* ToDo fill SD-RAM if needed !!!!! */
- break;
- /* Calculate the settings for SDRAM mode and Dunit control low registers */
- /* Values set according to technical bulletin TB-92 rev. c */
- case DDR:
- DP (printf ("### SET-CL for DDR-RAM\n"));
- /* ronen db64460 - change the tmp_dunit_control_low setting!!! */
- switch (info->maxClSupported_DDR) {
- case DDR_CL_3:
- tmp_sdram_mode = 0x32; /* CL=3 Burstlength = 4 */
- if (tmp == 1) { /* clocks sync */
- if (info->registeredAddrAndControlInputs == 1) /* registerd DDR SDRAM? */
- tmp_dunit_control_low = 0x05110051;
- else
- tmp_dunit_control_low = 0x24110051;
- DP (printf
- ("Max. CL is 3 CLKs 0x141c= %08lx, 0x1404 = %08lx\n",
- tmp_sdram_mode, tmp_dunit_control_low));
- printf ("Warnning: DRAM ClkSync was never tested(db64460)!!!!!\n");
- } else { /* clk sync. bypassed */
-
- if (info->registeredAddrAndControlInputs == 1) /* registerd DDR SDRAM? */
- tmp_dunit_control_low = 0xC5000540;
- else
- tmp_dunit_control_low = 0xC4000540;
- DP (printf
- ("Max. CL is 3 CLKs 0x141c= %08lx, 0x1404 = %08lx\n",
- tmp_sdram_mode, tmp_dunit_control_low));
- }
- break;
- case DDR_CL_2_5:
- tmp_sdram_mode = 0x62; /* CL=2.5 Burstlength = 4 */
- if (tmp == 1) { /* clocks sync */
- if (info->registeredAddrAndControlInputs == 1) /* registerd DDR SDRAM? */
- tmp_dunit_control_low = 0x25110051;
- else
- tmp_dunit_control_low = 0x24110051;
- DP (printf
- ("Max. CL is 2.5 CLKs 0x141c= %08lx, 0x1404 = %08lx\n",
- tmp_sdram_mode, tmp_dunit_control_low));
- printf ("Warnning: DRAM ClkSync was never tested(db64460)!!!!!\n");
- } else { /* clk sync. bypassed */
-
- if (info->registeredAddrAndControlInputs == 1) { /* registerd DDR SDRAM? */
- tmp_dunit_control_low = 0xC5000540;
- /* printf("CL = 2.5, Clock Unsync'ed, Dunit Control Low register setting undefined\n");1 */
- /* printf("Aborting!!!\n");1 */
- /* hang();1 */
- } else
- tmp_dunit_control_low = 0xC4000540;
- DP (printf
- ("Max. CL is 2.5 CLKs 0x141c= %08lx, 0x1404 = %08lx\n",
- tmp_sdram_mode, tmp_dunit_control_low));
- }
- break;
- case DDR_CL_2:
- tmp_sdram_mode = 0x22; /* CL=2 Burstlength = 4 */
- if (tmp == 1) { /* clocks sync */
- if (info->registeredAddrAndControlInputs == 1) /* registerd DDR SDRAM? */
- tmp_dunit_control_low = 0x04110051;
- else
- tmp_dunit_control_low = 0x03110051;
- DP (printf
- ("Max. CL is 2 CLKs 0x141c= %08lx, 0x1404 = %08lx\n",
- tmp_sdram_mode, tmp_dunit_control_low));
- printf ("Warnning: DRAM ClkSync was never tested(db64460)!!!!!\n");
- } else { /* clk sync. bypassed */
-
- if (info->registeredAddrAndControlInputs == 1) { /* registerd DDR SDRAM? */
- /*printf("CL = 2, Clock Unsync'ed, Dunit Control Low register setting undefined\n");1 */
- /*printf("Aborting!!!\n");1 */
- /*hang();1 */
- tmp_dunit_control_low = 0xC4000540;
- } else
- tmp_dunit_control_low = 0xC3000540;;
- DP (printf
- ("Max. CL is 2 CLKs 0x141c= %08lx, 0x1404 = %08lx\n",
- tmp_sdram_mode, tmp_dunit_control_low));
- }
- break;
- case DDR_CL_1_5:
- tmp_sdram_mode = 0x52; /* CL=1.5 Burstlength = 4 */
- if (tmp == 1) { /* clocks sync */
- if (info->registeredAddrAndControlInputs == 1) /* registerd DDR SDRAM? */
- tmp_dunit_control_low = 0x24110051;
- else
- tmp_dunit_control_low = 0x23110051;
- DP (printf
- ("Max. CL is 1.5 CLKs 0x141c= %08lx, 0x1404 = %08lx\n",
- tmp_sdram_mode, tmp_dunit_control_low));
- printf ("Warnning: DRAM ClkSync was never tested(db64460)!!!!!\n");
- } else { /* clk sync. bypassed */
-
- if (info->registeredAddrAndControlInputs == 1) { /* registerd DDR SDRAM? */
- /*printf("CL = 1.5, Clock Unsync'ed, Dunit Control Low register setting undefined\n");1 */
- /*printf("Aborting!!!\n");1 */
- /*hang();1 */
- tmp_dunit_control_low = 0xC4000540;
- } else
- tmp_dunit_control_low = 0xC3000540;
- DP (printf
- ("Max. CL is 1.5 CLKs 0x141c= %08lx, 0x1404 = %08lx\n",
- tmp_sdram_mode, tmp_dunit_control_low));
- }
- break;
-
- default:
- printf ("Max. CL is out of range %d\n",
- info->maxClSupported_DDR);
- hang ();
- break;
- } /* end DDR switch */
- break;
- } /* end CL switch */
-
- /* Write results of CL detection procedure */
- /* set SDRAM mode reg. 0x141c */
- GT_REG_WRITE (SDRAM_MODE, tmp_sdram_mode);
-
- /* set SDRAM mode SetCommand 0x1418 */
- GT_REG_WRITE (SDRAM_OPERATION, 0x3);
- while (GTREGREAD (SDRAM_OPERATION) != 0) {
- DP (printf
- ("\n*** SDRAM_OPERATION 0x1418 after SDRAM_MODE: Module still busy ... please wait... ***\n"));
- }
-
- /* SDRAM D_UNIT_CONTROL_LOW 0x1404 */
- GT_REG_WRITE (D_UNIT_CONTROL_LOW, tmp_dunit_control_low);
-
- /* set SDRAM mode SetCommand 0x1418 */
- GT_REG_WRITE (SDRAM_OPERATION, 0x3);
- while (GTREGREAD (SDRAM_OPERATION) != 0) {
- DP (printf
- ("\n*** SDRAM_OPERATION 1418 after D_UNIT_CONTROL_LOW: Module still busy ... please wait... ***\n"));
- }
-
-/*------------------------------------------------------------------------------ */
-
- /* bank parameters */
- /* SDRAM address decode register 0x1410 */
- /* program this with the default value */
- tmp = 0x02; /* power-up default address select decoding value */
-
- DP (printf ("drb_size (n*64Mbit): %d\n", info->drb_size));
-/* figure out the DRAM chip size */
- sdram_chip_size =
- (1 << (info->numOfRowAddresses + info->numOfColAddresses));
- sdram_chip_size *= info->sdramWidth;
- sdram_chip_size *= 4;
- DP (printf ("computed sdram chip size is %#lx\n", sdram_chip_size));
- /* divide sdram chip size by 64 Mbits */
- sdram_chip_size = sdram_chip_size / 0x4000000;
- switch (sdram_chip_size) {
- case 1: /* 64 Mbit */
- case 2: /* 128 Mbit */
- DP (printf ("RAM-Device_size 64Mbit or 128Mbit)\n"));
- tmp |= (0x00 << 4);
- break;
- case 4: /* 256 Mbit */
- case 8: /* 512 Mbit */
- DP (printf ("RAM-Device_size 256Mbit or 512Mbit)\n"));
- tmp |= (0x01 << 4);
- break;
- case 16: /* 1 Gbit */
- case 32: /* 2 Gbit */
- DP (printf ("RAM-Device_size 1Gbit or 2Gbit)\n"));
- tmp |= (0x02 << 4);
- break;
- default:
- printf ("Error in dram size calculation\n");
- printf ("RAM-Device_size is unsupported\n");
- hang ();
- }
-
- /* SDRAM address control */
- GT_REG_WRITE (SDRAM_ADDR_CONTROL, tmp);
- DP (printf
- ("setting up sdram address control (0x1410) with: %08lx \n",
- tmp));
-
-/* ------------------------------------------------------------------------------ */
-/* same settings for registerd & non-registerd DDR SDRAM */
- DP (printf
- ("setting up sdram_timing_control_low (0x1408) with: %08x \n",
- 0x01501220));
- /*ronen db64460 */
- GT_REG_WRITE (SDRAM_TIMING_CONTROL_LOW, 0x01501220);
-
-
-/* ------------------------------------------------------------------------------ */
-
- /* SDRAM configuration */
- tmp = GTREGREAD (SDRAM_CONFIG);
-
- if (info->registeredAddrAndControlInputs
- || info->registeredDQMBinputs) {
- tmp |= (1 << 17);
- DP (printf
- ("SPD says: registered Addr. and Cont.: %d; registered DQMBinputs: %d\n",
- info->registeredAddrAndControlInputs,
- info->registeredDQMBinputs));
- }
-
- /* Use buffer 1 to return read data to the CPU
- * Page 426 MV6indent: Standard input:1464: Warning:old style assignment ambiguity in "=*". Assuming "= *"
-
-indent: Standard input:1465: Warning:old style assignment ambiguity in "=*". Assuming "= *"
-
-4460 */
- tmp |= (1 << 26);
- DP (printf
- ("Before Buffer assignment - sdram_conf (0x1400): %08x\n",
- GTREGREAD (SDRAM_CONFIG)));
- DP (printf
- ("After Buffer assignment - sdram_conf (0x1400): %08x\n",
- GTREGREAD (SDRAM_CONFIG)));
-
- /* SDRAM timing To_do: */
-/* ------------------------------------------------------------------------------ */
- /* ronen db64460 */
- DP (printf
- ("setting up sdram_timing_control_high (0x140c) with: %08x \n",
- 0xc));
- GT_REG_WRITE (SDRAM_TIMING_CONTROL_HIGH, 0xc);
-
- DP (printf
- ("setting up sdram address pads control (0x14c0) with: %08x \n",
- 0x7d5014a));
- GT_REG_WRITE (SDRAM_ADDR_CTRL_PADS_CALIBRATION, 0x7d5014a);
-
- DP (printf
- ("setting up sdram data pads control (0x14c4) with: %08x \n",
- 0x7d5014a));
- GT_REG_WRITE (SDRAM_DATA_PADS_CALIBRATION, 0x7d5014a);
-
-/* ------------------------------------------------------------------------------ */
-
- /* set the SDRAM configuration for each bank */
-
-/* for (i = info->slot * 2; i < ((info->slot * 2) + info->banks); i++) */
- {
- i = info->slot;
- DP (printf
- ("\n*** Running a MRS cycle for bank %d ***\n", i));
-
- /* map the bank */
- memory_map_bank (i, 0, GB / 4);
-
- /* set SDRAM mode */ /* To_do check it */
- GT_REG_WRITE (SDRAM_OPERATION, 0x3);
- check = GTREGREAD (SDRAM_OPERATION);
- DP (printf
- ("\n*** SDRAM_OPERATION 1418 (0 = Normal Operation) = %08lx ***\n",
- check));
-
-
- /* switch back to normal operation mode */
- GT_REG_WRITE (SDRAM_OPERATION, 0);
- check = GTREGREAD (SDRAM_OPERATION);
- DP (printf
- ("\n*** SDRAM_OPERATION 1418 (0 = Normal Operation) = %08lx ***\n",
- check));
-
- /* unmap the bank */
- memory_map_bank (i, 0, 0);
- }
-
- return 0;
-
-}
-
-/*
- * Check memory range for valid RAM. A simple memory test determines
- * the actually available RAM size between addresses `base' and
- * `base + maxsize'. Some (not all) hardware errors are detected:
- * - short between address lines
- * - short between data lines
- */
-long int dram_size (long int *base, long int maxsize)
-{
- volatile long int *addr, *b = base;
- long int cnt, val, save1, save2;
-
-#define STARTVAL (1<<20) /* start test at 1M */
- for (cnt = STARTVAL / sizeof (long); cnt < maxsize / sizeof (long);
- cnt <<= 1) {
- addr = base + cnt; /* pointer arith! */
-
- save1 = *addr; /* save contents of addr */
- save2 = *b; /* save contents of base */
-
- *addr = cnt; /* write cnt to addr */
- *b = 0; /* put null at base */
-
- /* check at base address */
- if ((*b) != 0) {
- *addr = save1; /* restore *addr */
- *b = save2; /* restore *b */
- return (0);
- }
- val = *addr; /* read *addr */
- val = *addr; /* read *addr */
-
- *addr = save1;
- *b = save2;
-
- if (val != cnt) {
- DP (printf
- ("Found %08x at Address %08x (failure)\n",
- (unsigned int) val, (unsigned int) addr));
- /* fix boundary condition.. STARTVAL means zero */
- if (cnt == STARTVAL / sizeof (long))
- cnt = 0;
- return (cnt * sizeof (long));
- }
- }
- return maxsize;
-}
-
-/* ------------------------------------------------------------------------- */
-
-/* ppcboot interface function to SDRAM init - this is where all the
- * controlling logic happens */
-long int initdram (int board_type)
-{
- int s0 = 0, s1 = 0;
- int checkbank[4] = {[0 ... 3] = 0 };
- ulong realsize, total, check;
- AUX_MEM_DIMM_INFO dimmInfo1;
- AUX_MEM_DIMM_INFO dimmInfo2;
- int nhr, bank_no;
- ulong dest, memSpaceAttr;
-
- /* first, use the SPD to get info about the SDRAM/ DDRRAM */
-
- /* check the NHR bit and skip mem init if it's already done */
- nhr = get_hid0 () & (1 << 16);
-
- if (nhr) {
- printf ("Skipping SD- DDRRAM setup due to NHR bit being set\n");
- } else {
- /* DIMM0 */
- s0 = check_dimm (0, &dimmInfo1);
-
- /* DIMM1 */
- s1 = check_dimm (1, &dimmInfo2);
-
- memory_map_bank (0, 0, 0);
- memory_map_bank (1, 0, 0);
- memory_map_bank (2, 0, 0);
- memory_map_bank (3, 0, 0);
-
- /* ronen check correct set of DIMMS */
- if (dimmInfo1.numOfModuleBanks && dimmInfo2.numOfModuleBanks) {
- if (dimmInfo1.errorCheckType !=
- dimmInfo2.errorCheckType)
- printf ("***WARNNING***!!!! different ECC support of the DIMMS\n");
- if (dimmInfo1.maxClSupported_DDR !=
- dimmInfo2.maxClSupported_DDR)
- printf ("***WARNNING***!!!! different CAL setting of the DIMMS\n");
- if (dimmInfo1.registeredAddrAndControlInputs !=
- dimmInfo2.registeredAddrAndControlInputs)
- printf ("***WARNNING***!!!! different Registration setting of the DIMMS\n");
- }
-
- if (dimmInfo1.numOfModuleBanks && setup_sdram (&dimmInfo1)) {
- printf ("Setup for DIMM1 failed.\n");
- }
-
- if (dimmInfo2.numOfModuleBanks && setup_sdram (&dimmInfo2)) {
- printf ("Setup for DIMM2 failed.\n");
- }
-
- /* set the NHR bit */
- set_hid0 (get_hid0 () | (1 << 16));
- }
- /* next, size the SDRAM banks */
-
- realsize = total = 0;
- check = GB / 4;
- if (dimmInfo1.numOfModuleBanks > 0) {
- checkbank[0] = 1;
- }
- if (dimmInfo1.numOfModuleBanks > 1) {
- checkbank[1] = 1;
- }
- if (dimmInfo1.numOfModuleBanks > 2)
- printf ("Error, SPD claims DIMM1 has >2 banks\n");
-
- printf ("-- DIMM1 has %d banks\n", dimmInfo1.numOfModuleBanks);
-
- if (dimmInfo2.numOfModuleBanks > 0) {
- checkbank[2] = 1;
- }
- if (dimmInfo2.numOfModuleBanks > 1) {
- checkbank[3] = 1;
- }
- if (dimmInfo2.numOfModuleBanks > 2)
- printf ("Error, SPD claims DIMM2 has >2 banks\n");
-
- printf ("-- DIMM2 has %d banks\n", dimmInfo2.numOfModuleBanks);
-
- for (bank_no = 0; bank_no < CFG_DRAM_BANKS; bank_no++) {
- /* skip over banks that are not populated */
- if (!checkbank[bank_no])
- continue;
-
- /* ronen - realsize = dram_size((long int *)total, check); */
- if (bank_no == 0 || bank_no == 1) {
- if (checkbank[1] == 1)
- realsize = dimmInfo1.size / 2;
- else
- realsize = dimmInfo1.size;
- }
- if (bank_no == 2 || bank_no == 3) {
- if (checkbank[3] == 1)
- realsize = dimmInfo2.size / 2;
- else
- realsize = dimmInfo2.size;
- }
- memory_map_bank (bank_no, total, realsize);
-
- /* ronen - initialize the DRAM for ECC */
-#ifdef CONFIG_MV64460_ECC
- if ((dimmInfo1.errorCheckType != 0) &&
- ((dimmInfo2.errorCheckType != 0)
- || (dimmInfo2.numOfModuleBanks == 0))) {
- printf ("ECC Initialization of Bank %d:", bank_no);
- memSpaceAttr = ((~(BIT0 << bank_no)) & 0xf) << 8;
- mvDmaSetMemorySpace (0, 0, memSpaceAttr, total,
- realsize);
- for (dest = total; dest < total + realsize;
- dest += _8M) {
- mvDmaTransfer (0, total, dest, _8M,
- BIT8 /*DMA_DTL_128BYTES */ |
- BIT3 /*DMA_HOLD_SOURCE_ADDR */
- |
- BIT11
- /*DMA_BLOCK_TRANSFER_MODE */ );
- while (mvDmaIsChannelActive (0));
- }
- printf (" PASS\n");
- }
-#endif
-
- total += realsize;
- }
-
- /* ronen */
- switch ((GTREGREAD (0x141c) >> 4) & 0x7) {
- case 0x2:
- printf ("CAS Latency = 2");
- break;
- case 0x3:
- printf ("CAS Latency = 3");
- break;
- case 0x5:
- printf ("CAS Latency = 1.5");
- break;
- case 0x6:
- printf ("CAS Latency = 2.5");
- break;
- }
- printf (" tRP = %d tRAS = %d tRCD=%d\n",
- ((GTREGREAD (0x1408) >> 8) & 0xf) + 1,
- ((GTREGREAD (0x1408) >> 20) & 0xf) + 1,
- ((GTREGREAD (0x1408) >> 4) & 0xf) + 1);
-
-/* Setup Ethernet DMA Adress window to DRAM Area */
- if (total > _256M)
- printf ("*** ONLY the first 256MB DRAM memory are used out of the ");
- else
- printf ("Total SDRAM memory is ");
- /* (cause all the 4 BATS are taken) */
- return (total);
-}
-
-
-/* ronen- add Idma functions for usage of the ecc dram init. */
-/*******************************************************************************
-* mvDmaIsChannelActive - Checks if a engine is busy.
-********************************************************************************/
-int mvDmaIsChannelActive (int engine)
-{
- ulong data;
-
- data = GTREGREAD (MV64460_DMA_CHANNEL0_CONTROL + 4 * engine);
- if (data & BIT14 /*activity status */ ) {
- return 1;
- }
- return 0;
-}
-
-/*******************************************************************************
-* mvDmaSetMemorySpace - Set a DMA memory window for the DMA's address decoding
-* map.
-*******************************************************************************/
-int mvDmaSetMemorySpace (ulong memSpace,
- ulong memSpaceTarget,
- ulong memSpaceAttr, ulong baseAddress, ulong size)
-{
- ulong temp;
-
- /* The base address must be aligned to the size. */
- if (baseAddress % size != 0) {
- return 0;
- }
- if (size >= 0x10000 /*64K */ ) {
- size &= 0xffff0000;
- baseAddress = (baseAddress & 0xffff0000);
- /* Set the new attributes */
- GT_REG_WRITE (MV64460_DMA_BASE_ADDR_REG0 + memSpace * 8,
- (baseAddress | memSpaceTarget | memSpaceAttr));
- GT_REG_WRITE ((MV64460_DMA_SIZE_REG0 + memSpace * 8),
- (size - 1) & 0xffff0000);
- temp = GTREGREAD (MV64460_DMA_BASE_ADDR_ENABLE_REG);
- GT_REG_WRITE (DMA_BASE_ADDR_ENABLE_REG,
- (temp & ~(BIT0 << memSpace)));
- return 1;
- }
- return 0;
-}
-
-
-/*******************************************************************************
-* mvDmaTransfer - Transfer data from sourceAddr to destAddr on one of the 4
-* DMA channels.
-********************************************************************************/
-int mvDmaTransfer (int engine, ulong sourceAddr,
- ulong destAddr, ulong numOfBytes, ulong command)
-{
- ulong engOffReg = 0; /* Engine Offset Register */
-
- if (numOfBytes > 0xffff) {
- command = command | BIT31 /*DMA_16M_DESCRIPTOR_MODE */ ;
- }
- command = command | ((command >> 6) & 0x7);
- engOffReg = engine * 4;
- GT_REG_WRITE (MV64460_DMA_CHANNEL0_BYTE_COUNT + engOffReg,
- numOfBytes);
- GT_REG_WRITE (MV64460_DMA_CHANNEL0_SOURCE_ADDR + engOffReg,
- sourceAddr);
- GT_REG_WRITE (MV64460_DMA_CHANNEL0_DESTINATION_ADDR + engOffReg,
- destAddr);
- command =
- command | BIT12 /*DMA_CHANNEL_ENABLE */ | BIT9
- /*DMA_NON_CHAIN_MODE */ ;
- /* Activate DMA engine By writting to mvDmaControlRegister */
- GT_REG_WRITE (MV64460_DMA_CHANNEL0_CONTROL + engOffReg, command);
- return 1;
-}
-
-/****************************************************************************************
- * SDRAM INIT *
- * This procedure detect all Sdram types: 64, 128, 256, 512 Mbit, 1Gbit and 2Gb *
- * This procedure fits only the Atlantis *
- * *
- ***************************************************************************************/
-
-
-/****************************************************************************************
- * DFCDL initialize MV643xx Design Considerations *
- * *
- ***************************************************************************************/
-int set_dfcdlInit (void)
-{
- /*ronen the dfcdl init are done by the I2C */
- return (0);
-}
diff --git a/board/Marvell/db64460/u-boot.lds b/board/Marvell/db64460/u-boot.lds
deleted file mode 100644
index d89eb6cff2..0000000000
--- a/board/Marvell/db64460/u-boot.lds
+++ /dev/null
@@ -1,138 +0,0 @@
-/*
- * (C) Copyright 2001
- * Josh Huber <huber@mclx.com>, Mission Critical Linux, Inc.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * u-boot.lds - linker script for U-Boot on the Galileo Eval Board.
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/74xx_7xx/start.o (.text)
-
-/* store the environment in a seperate sector in the boot flash */
-/* . = env_offset; */
-/* common/environment.o(.text) */
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/Marvell/include/core.h b/board/Marvell/include/core.h
deleted file mode 100644
index 081d5fd678..0000000000
--- a/board/Marvell/include/core.h
+++ /dev/null
@@ -1,238 +0,0 @@
-/* Core.h - Basic core logic functions and definitions */
-
-/* Copyright Galileo Technology. */
-
-/*
-DESCRIPTION
-This header file contains simple read/write macros for addressing
-the SDRAM, devices, GT`s internal registers and PCI (using the PCI`s address
-space). The macros take care of Big/Little endian conversions.
-*/
-
-#ifndef __INCcoreh
-#define __INCcoreh
-
-#include "mv_gen_reg.h"
-
-extern unsigned int INTERNAL_REG_BASE_ADDR;
-
-/****************************************/
-/* GENERAL Definitions */
-/****************************************/
-
-#define NO_BIT 0x00000000
-#define BIT0 0x00000001
-#define BIT1 0x00000002
-#define BIT2 0x00000004
-#define BIT3 0x00000008
-#define BIT4 0x00000010
-#define BIT5 0x00000020
-#define BIT6 0x00000040
-#define BIT7 0x00000080
-#define BIT8 0x00000100
-#define BIT9 0x00000200
-#define BIT10 0x00000400
-#define BIT11 0x00000800
-#define BIT12 0x00001000
-#define BIT13 0x00002000
-#define BIT14 0x00004000
-#define BIT15 0x00008000
-#define BIT16 0x00010000
-#define BIT17 0x00020000
-#define BIT18 0x00040000
-#define BIT19 0x00080000
-#define BIT20 0x00100000
-#define BIT21 0x00200000
-#define BIT22 0x00400000
-#define BIT23 0x00800000
-#define BIT24 0x01000000
-#define BIT25 0x02000000
-#define BIT26 0x04000000
-#define BIT27 0x08000000
-#define BIT28 0x10000000
-#define BIT29 0x20000000
-#define BIT30 0x40000000
-#define BIT31 0x80000000
-
-#define _1K 0x00000400
-#define _2K 0x00000800
-#define _4K 0x00001000
-#define _8K 0x00002000
-#define _16K 0x00004000
-#define _32K 0x00008000
-#define _64K 0x00010000
-#define _128K 0x00020000
-#define _256K 0x00040000
-#define _512K 0x00080000
-
-#define _1M 0x00100000
-#define _2M 0x00200000
-#define _3M 0x00300000
-#define _4M 0x00400000
-#define _5M 0x00500000
-#define _6M 0x00600000
-#define _7M 0x00700000
-#define _8M 0x00800000
-#define _9M 0x00900000
-#define _10M 0x00a00000
-#define _11M 0x00b00000
-#define _12M 0x00c00000
-#define _13M 0x00d00000
-#define _14M 0x00e00000
-#define _15M 0x00f00000
-#define _16M 0x01000000
-
-#define _32M 0x02000000
-#define _64M 0x04000000
-#define _128M 0x08000000
-#define _256M 0x10000000
-#define _512M 0x20000000
-
-#define _1G 0x40000000
-#define _2G 0x80000000
-
-typedef enum _bool{false,true} bool;
-
-/* Little to Big endian conversion macros */
-
-#ifdef LE /* Little Endian */
-#define SHORT_SWAP(X) (X)
-#define WORD_SWAP(X) (X)
-#define LONG_SWAP(X) ((l64)(X))
-
-#else /* Big Endian */
-#define SHORT_SWAP(X) ((X <<8 ) | (X >> 8))
-
-#define WORD_SWAP(X) (((X)&0xff)<<24)+ \
- (((X)&0xff00)<<8)+ \
- (((X)&0xff0000)>>8)+ \
- (((X)&0xff000000)>>24)
-
-#define LONG_SWAP(X) ( (l64) (((X)&0xffULL)<<56)+ \
- (((X)&0xff00ULL)<<40)+ \
- (((X)&0xff0000ULL)<<24)+ \
- (((X)&0xff000000ULL)<<8)+ \
- (((X)&0xff00000000ULL)>>8)+ \
- (((X)&0xff0000000000ULL)>>24)+ \
- (((X)&0xff000000000000ULL)>>40)+ \
- (((X)&0xff00000000000000ULL)>>56))
-
-#endif
-
-#ifndef NULL
-#define NULL 0
-#endif
-
-/* Those two definitions were defined to be compatible with MIPS */
-#define NONE_CACHEABLE 0x00000000
-#define CACHEABLE 0x00000000
-
-/* 750 cache line */
-#define CACHE_LINE_SIZE 32
-#define CACHELINE_MASK_BITS (CACHE_LINE_SIZE - 1)
-#define CACHELINE_ROUNDUP(A) (((A)+CACHELINE_MASK_BITS) & ~CACHELINE_MASK_BITS)
-
-/* Read/Write to/from GT`s internal registers */
-#define GT_REG_READ(offset, pData) \
-*pData = ( *((volatile unsigned int *)(NONE_CACHEABLE | \
- INTERNAL_REG_BASE_ADDR | (offset))) ) ; \
-*pData = WORD_SWAP(*pData)
-
-#define GTREGREAD(offset) \
- (WORD_SWAP( *((volatile unsigned int *)(NONE_CACHEABLE | \
- INTERNAL_REG_BASE_ADDR | (offset))) ))
-
-#define GT_REG_WRITE(offset, data) \
-*((unsigned int *)( INTERNAL_REG_BASE_ADDR | (offset))) = \
- WORD_SWAP(data)
-
-/* Write 32/16/8 bit */
-#define WRITE_CHAR(address, data) \
- *((unsigned char *)(address)) = data
-#define WRITE_SHORT(address, data) \
- *((unsigned short *)(address)) = data
-#define WRITE_WORD(address, data) \
- *((unsigned int *)(address)) = data
-
-#define GT_WRITE_CHAR(address, data) WRITE_CHAR(address, data)
-
-/* Write 32/16/8 bit NonCacheable */
-/*
-#define GT_WRITE_CHAR(address, data) \
- (*((unsigned char *)NONE_CACHEABLE(address))) = data
-#define GT_WRITE_SHORT(address, data) \
- (*((unsigned short *)NONE_CACHEABLE(address))) = data
-#define GT_WRITE_WORD(address, data) \
- (*((unsigned int *)NONE_CACHEABLE(address))) = data
-*/
- /*#define GT_WRITE_CHAR(address, data) ((*((volatile unsigned char *)NONE_CACHEABLE((address)))) = ((unsigned char)(data)))1 */
-
- /*#define GT_WRITE_SHORT(address, data) ((*((volatile unsigned short *)NONE_CACHEABLE((address)))) = ((unsigned short)(data)))1 */
-
- /*#define GT_WRITE_WORD(address, data) ((*((volatile unsigned int *)NONE_CACHEABLE((address)))) = ((unsigned int)(data)))1 */
-
-
-/* Read 32/16/8 bits - returns data in variable. */
-#define READ_CHAR(address, pData) \
- *pData = *((volatile unsigned char *)(address))
-
-#define READ_SHORT(address, pData) \
- *pData = *((volatile unsigned short *)(address))
-
-#define READ_WORD(address, pData) \
- *pData = *((volatile unsigned int *)(address))
-
-/* Read 32/16/8 bit - returns data direct. */
-#define READCHAR(address) \
- *((volatile unsigned char *)((address) | NONE_CACHEABLE))
-
-#define READSHORT(address) \
- *((volatile unsigned short *)((address) | NONE_CACHEABLE))
-
-#define READWORD(address) \
- *((volatile unsigned int *)((address) | NONE_CACHEABLE))
-
-/* Those two Macros were defined to be compatible with MIPS */
-#define VIRTUAL_TO_PHY(x) (((unsigned int)x) & 0xffffffff)
-#define PHY_TO_VIRTUAL(x) (((unsigned int)x) | NONE_CACHEABLE)
-
-/* SET_REG_BITS(regOffset,bits) -
- gets register offset and bits: a 32bit value. It set to logic '1' in the
- internal register the bits which given as an input example:
- SET_REG_BITS(0x840,BIT3 | BIT24 | BIT30) - set bits: 3,24 and 30 to logic
- '1' in register 0x840 while the other bits stays as is. */
-#define SET_REG_BITS(regOffset,bits) \
- *(unsigned int*)(NONE_CACHEABLE | INTERNAL_REG_BASE_ADDR | \
- regOffset) |= (unsigned int)WORD_SWAP(bits)
-
-/* RESET_REG_BITS(regOffset,bits) -
- gets register offset and bits: a 32bit value. It set to logic '0' in the
- internal register the bits which given as an input example:
- RESET_REG_BITS(0x840,BIT3 | BIT24 | BIT30) - set bits: 3,24 and 30 to logic
- '0' in register 0x840 while the other bits stays as is. */
-#define RESET_REG_BITS(regOffset,bits) \
- *(unsigned int*)(NONE_CACHEABLE | INTERNAL_REG_BASE_ADDR \
- | regOffset) &= ~( (unsigned int)WORD_SWAP(bits) )
-/* gets register offset and bits: a 32bit value. It set to logic '1' in the
- internal register the bits which given as an input example:
- GT_SET_REG_BITS(0x840,BIT3 | BIT24 | BIT30) - set bits: 3,24 and 30 to logic
- '1' in register 0x840 while the other bits stays as is. */
- /*#define GT_SET_REG_BITS(regOffset,bits) ((*((volatile unsigned int*)(NONE_CACHEABLE(INTERNAL_REG_BASE_ADDR) | (regOffset)))) |= ((unsigned int)WORD_SWAP(bits)))1 */
- /*#define GT_SET_REG_BITS(regOffset,bits) RESET_REG_BITS(regOffset,bits)1 */
-#define GT_SET_REG_BITS(regOffset,bits) SET_REG_BITS(regOffset,bits)
-/* gets register offset and bits: a 32bit value. It set to logic '0' in the
- internal register the bits which given as an input example:
- GT_RESET_REG_BITS(0x840,BIT3 | BIT24 | BIT30) - set bits: 3,24 and 30 to
- logic '0' in register 0x840 while the other bits stays as is. */
- /*#define GT_RESET_REG_BITS(regOffset,bits) ((*((volatile unsigned int*)(NONE_CACHEABLE(INTERNAL_REG_BASE_ADDR) | (regOffset)))) &= ~((unsigned int)WORD_SWAP(bits)))1 */
-#define GT_RESET_REG_BITS(regOffset,bits) RESET_REG_BITS(regOffset,bits)
-
-
-#define DEBUG_LED0_ON() WRITE_CHAR(memoryGetDeviceBaseAddress(DEVICE1) | 0x8000,0)
-#define DEBUG_LED1_ON() WRITE_CHAR(memoryGetDeviceBaseAddress(DEVICE1) | 0xc000,0)
-#define DEBUG_LED2_ON() WRITE_CHAR(memoryGetDeviceBaseAddress(DEVICE1) | 0x10000,0)
-#define DEBUG_LED0_OFF() WRITE_CHAR(memoryGetDeviceBaseAddress(DEVICE1) | 0x14000,0)
-#define DEBUG_LED1_OFF() WRITE_CHAR(memoryGetDeviceBaseAddress(DEVICE1) | 0x18000,0)
-#define DEBUG_LED2_OFF() WRITE_CHAR(memoryGetDeviceBaseAddress(DEVICE1) | 0x1c000,0)
-
-#endif /* __INCcoreh */
diff --git a/board/Marvell/include/memory.h b/board/Marvell/include/memory.h
deleted file mode 100644
index 0947b6e4ff..0000000000
--- a/board/Marvell/include/memory.h
+++ /dev/null
@@ -1,173 +0,0 @@
-/* Memory.h - Memory mappings and remapping functions declarations */
-
-/* Copyright - Galileo technology. */
-
-#ifndef __INCmemoryh
-#define __INCmemoryh
-
-/* includes */
-
-#include "core.h"
-
-/* defines */
-
-#define DONT_MODIFY 0xffffffff
-#define PARITY_SUPPORT 0x40000000
-#define MINIMUM_MEM_BANK_SIZE 0x10000
-#define MINIMUM_DEVICE_WINDOW_SIZE 0x10000
-#define MINIMUM_PCI_WINDOW_SIZE 0x10000
-#define MINIMUM_ACCESS_WIN_SIZE 0x10000
-
-#define _8BIT 0x00000000
-#define _16BIT 0x00100000
-#define _32BIT 0x00200000
-#define _64BIT 0x00300000
-
-/* typedefs */
-
- typedef struct deviceParam
-{ /* boundary values */
- unsigned int turnOff; /* 0x0 - 0xf */
- unsigned int acc2First; /* 0x0 - 0x1f */
- unsigned int acc2Next; /* 0x0 - 0x1f */
- unsigned int ale2Wr; /* 0x0 - 0xf */
- unsigned int wrLow; /* 0x0 - 0xf */
- unsigned int wrHigh; /* 0x0 - 0xf */
- unsigned int badrSkew; /* 0x0 - 0x2 */
- unsigned int DPEn; /* 0x0 - 0x1 */
- unsigned int deviceWidth; /* in Bytes */
-} DEVICE_PARAM;
-
-
-typedef enum __memBank{BANK0,BANK1,BANK2,BANK3} MEMORY_BANK;
-typedef enum __memDevice{DEVICE0,DEVICE1,DEVICE2,DEVICE3,BOOT_DEVICE} DEVICE;
-
-/*typedef enum __memoryProtectRegion{MEM_REGION0,MEM_REGION1,MEM_REGION2, \
- MEM_REGION3,MEM_REGION4,MEM_REGION5, \
- MEM_REGION6,MEM_REGION7} \
- MEMORY_PROTECT_REGION;*/
-/* There are four possible windows that can be defined as protected */
-typedef enum _memoryProtectWindow{MEM_WINDOW0,MEM_WINDOW1,MEM_WINDOW2,
- MEM_WINDOW3
- } MEMORY_PROTECT_WINDOW;
-/* When defining a protected window , this paramter indicates whether it
- is accessible or not */
-typedef enum __memoryAccess{MEM_ACCESS_ALLOWED,MEM_ACCESS_FORBIDEN} \
- MEMORY_ACCESS;
-typedef enum __memoryWrite{MEM_WRITE_ALLOWED,MEM_WRITE_FORBIDEN} \
- MEMORY_ACCESS_WRITE;
-typedef enum __memoryCacheProtect{MEM_CACHE_ALLOWED,MEM_CACHE_FORBIDEN} \
- MEMORY_CACHE_PROTECT;
-typedef enum __memorySnoopType{MEM_NO_SNOOP,MEM_SNOOP_WT,MEM_SNOOP_WB} \
- MEMORY_SNOOP_TYPE;
-typedef enum __memorySnoopRegion{MEM_SNOOP_REGION0,MEM_SNOOP_REGION1, \
- MEM_SNOOP_REGION2,MEM_SNOOP_REGION3} \
- MEMORY_SNOOP_REGION;
-
-/* There are 21 memory windows dedicated for the varios interfaces (PCI,
- devCS (devices), CS(DDR), interenal registers and SRAM) used by the CPU's
- address decoding mechanism. */
-typedef enum _memoryWindow {CS_0_WINDOW = BIT0, CS_1_WINDOW = BIT1,
- CS_2_WINDOW = BIT2, CS_3_WINDOW = BIT3,
- DEVCS_0_WINDOW = BIT4, DEVCS_1_WINDOW = BIT5,
- DEVCS_2_WINDOW = BIT6, DEVCS_3_WINDOW = BIT7,
- BOOT_CS_WINDOW = BIT8, PCI_0_IO_WINDOW = BIT9,
- PCI_0_MEM0_WINDOW = BIT10,
- PCI_0_MEM1_WINDOW = BIT11,
- PCI_0_MEM2_WINDOW = BIT12,
- PCI_0_MEM3_WINDOW = BIT13, PCI_1_IO_WINDOW = BIT14,
- PCI_1_MEM0_WINDOW = BIT15, PCI_1_MEM1_WINDOW =BIT16,
- PCI_1_MEM2_WINDOW = BIT17, PCI_1_MEM3_WINDOW =BIT18,
- INTEGRATED_SRAM_WINDOW = BIT19,
- INTERNAL_SPACE_WINDOW = BIT20,
- ALL_WINDOWS = 0X1FFFFF
- } MEMORY_WINDOW;
-
-typedef enum _memoryWindowStatus {MEM_WINDOW_ENABLED,MEM_WINDOW_DISABLED
- } MEMORY_WINDOW_STATUS;
-
-
-typedef enum _pciMemWindow{PCI_0_IO,PCI_0_MEM0,PCI_0_MEM1,PCI_0_MEM2,PCI_0_MEM3
-#ifdef INCLUDE_PCI_1
- ,PCI_1_IO,PCI_1_MEM0,PCI_1_MEM1,PCI_1_MEM2,PCI_1_MEM3
-#endif /* INCLUDE_PCI_1 */
- } PCI_MEM_WINDOW;
-
-
-/* -------------------------------------------------------------------------------------------------*/
-
-/* functions */
-unsigned int memoryGetBankBaseAddress(MEMORY_BANK bank);
-unsigned int memoryGetDeviceBaseAddress(DEVICE device);
-/* New at MV6436x */
-unsigned int MemoryGetPciBaseAddr(PCI_MEM_WINDOW pciWindow);
-unsigned int memoryGetBankSize(MEMORY_BANK bank);
-unsigned int memoryGetDeviceSize(DEVICE device);
-unsigned int memoryGetDeviceWidth(DEVICE device);
-/* New at MV6436x */
-unsigned int gtMemoryGetPciWindowSize(PCI_MEM_WINDOW pciWindow);
-
-/* when given base Address and size Set new WINDOW for SCS_X. (X = 0,1,2 or 3*/
-bool memoryMapBank(MEMORY_BANK bank, unsigned int bankBase,unsigned int bankLength);
-/* Set a new base and size for one of the memory banks (CS0 - CS3) */
-bool gtMemorySetMemoryBank(MEMORY_BANK bank, unsigned int bankBase,
- unsigned int bankSize);
-bool memoryMapDeviceSpace(DEVICE device, unsigned int deviceBase,unsigned int deviceLength);
-
-/* Change the Internal Register Base Address to a new given Address. */
-bool memoryMapInternalRegistersSpace(unsigned int internalRegBase);
-/* returns internal Register Space Base Address. */
-unsigned int memoryGetInternalRegistersSpace(void);
-
-/* Returns the integrated SRAM Base Address. */
-unsigned int memoryGetInternalSramBaseAddr(void);
-/* -------------------------------------------------------------------------------------------------*/
-
-/* Set new base address for the integrated SRAM. */
-void memorySetInternalSramBaseAddr(unsigned int sramBaseAddress);
-/* -------------------------------------------------------------------------------------------------*/
-
-/* Delete a protection feature to a given space. */
-void memoryDisableProtectRegion(MEMORY_PROTECT_WINDOW window);
-/* -------------------------------------------------------------------------------------------------*/
-
-/* Writes a new remap value to the remap register */
-unsigned int memorySetPciRemapValue(PCI_MEM_WINDOW memoryWindow,
- unsigned int remapValueHigh,
- unsigned int remapValueLow);
-/* -------------------------------------------------------------------------------------------------*/
-
-/* Configurate the protection feature to a given space. */
-bool memorySetProtectRegion(MEMORY_PROTECT_WINDOW window,
- MEMORY_ACCESS gtMemoryAccess,
- MEMORY_ACCESS_WRITE gtMemoryWrite,
- MEMORY_CACHE_PROTECT cacheProtection,
- unsigned int baseAddress,
- unsigned int size);
-
-/* Configurate the protection feature to a given space. */
-/*bool memorySetProtectRegion(MEMORY_PROTECT_REGION region,
- MEMORY_ACCESS memoryAccess,
- MEMORY_ACCESS_WRITE memoryWrite,
- MEMORY_CACHE_PROTECT cacheProtection,
- unsigned int baseAddress,
- unsigned int regionLength); */
-/* Configurate the snoop feature to a given space. */
-bool memorySetRegionSnoopMode(MEMORY_SNOOP_REGION region,
- MEMORY_SNOOP_TYPE snoopType,
- unsigned int baseAddress,
- unsigned int regionLength);
-
-bool memoryRemapAddress(unsigned int remapReg, unsigned int remapValue);
-bool memoryGetDeviceParam(DEVICE_PARAM *deviceParam, DEVICE deviceNum);
-bool memorySetDeviceParam(DEVICE_PARAM *deviceParam, DEVICE deviceNum);
-/* Set a new base and size for one of the PCI windows. */
-bool memorySetPciWindow(PCI_MEM_WINDOW pciWindow, unsigned int pciWindowBase,
- unsigned int pciWindowSize);
-
-/* Disable or enable one of the 21 windows dedicated for the CPU's
- address decoding mechanism */
-void MemoryDisableWindow(MEMORY_WINDOW window);
-void MemoryEnableWindow (MEMORY_WINDOW window);
-MEMORY_WINDOW_STATUS MemoryGetMemWindowStatus(MEMORY_WINDOW window);
-#endif /* __INCmemoryh */
diff --git a/board/Marvell/include/mv_gen_reg.h b/board/Marvell/include/mv_gen_reg.h
deleted file mode 100644
index 5e4f07606c..0000000000
--- a/board/Marvell/include/mv_gen_reg.h
+++ /dev/null
@@ -1,2288 +0,0 @@
-/* mv_gen_reg.h - Internal registers definition file */
-/* Copyright - Galileo technology. */
-
-
-/*******************************************************************************
-* Copyright 2002, GALILEO TECHNOLOGY, LTD. *
-* THIS CODE CONTAINS CONFIDENTIAL INFORMATION OF MARVELL. *
-* NO RIGHTS ARE GRANTED HEREIN UNDER ANY PATENT, MASK WORK RIGHT OR COPYRIGHT *
-* OF MARVELL OR ANY THIRD PARTY. MARVELL RESERVES THE RIGHT AT ITS SOLE *
-* DISCRETION TO REQUEST THAT THIS CODE BE IMMEDIATELY RETURNED TO MARVELL. *
-* THIS CODE IS PROVIDED "AS IS". MARVELL MAKES NO WARRANTIES, EXPRESSED, *
-* IMPLIED OR OTHERWISE, REGARDING ITS ACCURACY, COMPLETENESS OR PERFORMANCE. *
-* *
-* MARVELL COMPRISES MARVELL TECHNOLOGY GROUP LTD. (MTGL) AND ITS SUBSIDIARIES, *
-* MARVELL INTERNATIONAL LTD. (MIL), MARVELL TECHNOLOGY, INC. (MTI), MARVELL *
-* SEMICONDUCTOR, INC. (MSI), MARVELL ASIA PTE LTD. (MAPL), MARVELL JAPAN K.K. *
-* (MJKK), GALILEO TECHNOLOGY LTD. (GTL) AND GALILEO TECHNOLOGY, INC. (GTI). *
-********************************************************************************
-* mv_gen_reg.h - Marvell 64360 and 64460 Internal registers definition file.
-*
-* DESCRIPTION:
-* None.
-*
-* DEPENDENCIES:
-* None.
-*
-*******************************************************************************/
-
-#ifndef __INCmv_gen_regh
-#define __INCmv_gen_regh
-
-
-/* Supported by the Atlantis */
-#define INCLUDE_PCI_1
-#define INCLUDE_PCI_0_ARBITER
-#define INCLUDE_PCI_1_ARBITER
-#define INCLUDE_SNOOP_SUPPORT
-#define INCLUDE_P2P
-#define INCLUDE_ETH_PORT_2
-#define INCLUDE_CPU_MAPPING
-#define INCLUDE_MPSC
-
-/* Not supported features */
-#undef INCLUDE_CNTMR_4_7
-#undef INCLUDE_DMA_4_7
-
-
-/****************************************/
-/* Processor Address Space */
-/****************************************/
-/* DDR SDRAM BAR and size registers */
-
-/* Sdram's BAR'S */
-#define SCS_0_LOW_DECODE_ADDRESS 0x008
-#define SCS_0_HIGH_DECODE_ADDRESS 0x010
-#define SCS_1_LOW_DECODE_ADDRESS 0x208
-#define SCS_1_HIGH_DECODE_ADDRESS 0x210
-#define SCS_2_LOW_DECODE_ADDRESS 0x018
-#define SCS_2_HIGH_DECODE_ADDRESS 0x020
-#define SCS_3_LOW_DECODE_ADDRESS 0x218
-#define SCS_3_HIGH_DECODE_ADDRESS 0x220
-
-/* Make it fit the MV64360 and MV64460 Lowlevel driver */
-#define CS_0_BASE_ADDR SCS_0_LOW_DECODE_ADDRESS
-#define CS_0_SIZE SCS_0_HIGH_DECODE_ADDRESS
-#define CS_1_BASE_ADDR SCS_1_LOW_DECODE_ADDRESS
-#define CS_1_SIZE SCS_1_HIGH_DECODE_ADDRESS
-#define CS_2_BASE_ADDR SCS_2_LOW_DECODE_ADDRESS
-#define CS_2_SIZE SCS_2_HIGH_DECODE_ADDRESS
-#define CS_3_BASE_ADDR SCS_3_LOW_DECODE_ADDRESS
-#define CS_3_SIZE SCS_3_HIGH_DECODE_ADDRESS
-
-/* Devices BAR'S */
-#define CS_0_LOW_DECODE_ADDRESS 0x028
-#define CS_0_HIGH_DECODE_ADDRESS 0x030
-#define CS_1_LOW_DECODE_ADDRESS 0x228
-#define CS_1_HIGH_DECODE_ADDRESS 0x230
-#define CS_2_LOW_DECODE_ADDRESS 0x248
-#define CS_2_HIGH_DECODE_ADDRESS 0x250
-#define CS_3_LOW_DECODE_ADDRESS 0x038
-#define CS_3_HIGH_DECODE_ADDRESS 0x040
-#define BOOTCS_LOW_DECODE_ADDRESS 0x238
-#define BOOTCS_HIGH_DECODE_ADDRESS 0x240
-
-/* Make it fit the MV64360 and MV64460 Lowlevel driver */
-/* Devices BAR and size registers */
-
-#define DEV_CS0_BASE_ADDR CS_0_LOW_DECODE_ADDRESS
-#define DEV_CS0_SIZE CS_0_HIGH_DECODE_ADDRESS
-#define DEV_CS1_BASE_ADDR CS_1_LOW_DECODE_ADDRESS
-#define DEV_CS1_SIZE CS_1_HIGH_DECODE_ADDRESS
-#define DEV_CS2_BASE_ADDR CS_2_LOW_DECODE_ADDRESS
-#define DEV_CS2_SIZE CS_2_HIGH_DECODE_ADDRESS
-#define DEV_CS3_BASE_ADDR CS_3_LOW_DECODE_ADDRESS
-#define DEV_CS3_SIZE CS_3_HIGH_DECODE_ADDRESS
-#define BOOTCS_BASE_ADDR BOOTCS_LOW_DECODE_ADDRESS
-#define BOOTCS_SIZE BOOTCS_HIGH_DECODE_ADDRESS
-
-/* PCI 0 BAR and size registers old names of evb64260*/
-
-#define PCI_0I_O_LOW_DECODE_ADDRESS 0x048
-#define PCI_0I_O_HIGH_DECODE_ADDRESS 0x050
-#define PCI_0MEMORY0_LOW_DECODE_ADDRESS 0x058
-#define PCI_0MEMORY0_HIGH_DECODE_ADDRESS 0x060
-#define PCI_0MEMORY1_LOW_DECODE_ADDRESS 0x080
-#define PCI_0MEMORY1_HIGH_DECODE_ADDRESS 0x088
-#define PCI_0MEMORY2_LOW_DECODE_ADDRESS 0x258
-#define PCI_0MEMORY2_HIGH_DECODE_ADDRESS 0x260
-#define PCI_0MEMORY3_LOW_DECODE_ADDRESS 0x280
-#define PCI_0MEMORY3_HIGH_DECODE_ADDRESS 0x288
-
-/* Make it fit the MV64360 and MV64460 Lowlevel driver */
-#define PCI_0_IO_BASE_ADDR 0x048
-#define PCI_0_IO_SIZE 0x050
-#define PCI_0_MEMORY0_BASE_ADDR 0x058
-#define PCI_0_MEMORY0_SIZE 0x060
-#define PCI_0_MEMORY1_BASE_ADDR 0x080
-#define PCI_0_MEMORY1_SIZE 0x088
-#define PCI_0_MEMORY2_BASE_ADDR 0x258
-#define PCI_0_MEMORY2_SIZE 0x260
-#define PCI_0_MEMORY3_BASE_ADDR 0x280
-#define PCI_0_MEMORY3_SIZE 0x288
-
-/* PCI 1 BAR and size registers old names of evb64260*/
-#define PCI_1I_O_LOW_DECODE_ADDRESS 0x090
-#define PCI_1I_O_HIGH_DECODE_ADDRESS 0x098
-#define PCI_1MEMORY0_LOW_DECODE_ADDRESS 0x0a0
-#define PCI_1MEMORY0_HIGH_DECODE_ADDRESS 0x0a8
-#define PCI_1MEMORY1_LOW_DECODE_ADDRESS 0x0b0
-#define PCI_1MEMORY1_HIGH_DECODE_ADDRESS 0x0b8
-#define PCI_1MEMORY2_LOW_DECODE_ADDRESS 0x2a0
-#define PCI_1MEMORY2_HIGH_DECODE_ADDRESS 0x2a8
-#define PCI_1MEMORY3_LOW_DECODE_ADDRESS 0x2b0
-#define PCI_1MEMORY3_HIGH_DECODE_ADDRESS 0x2b8
-
-/* Make it fit the MV64360 and MV64460 Lowlevel driver */
-#define PCI_1_IO_BASE_ADDR 0x090
-#define PCI_1_IO_SIZE 0x098
-#define PCI_1_MEMORY0_BASE_ADDR 0x0a0
-#define PCI_1_MEMORY0_SIZE 0x0a8
-#define PCI_1_MEMORY1_BASE_ADDR 0x0b0
-#define PCI_1_MEMORY1_SIZE 0x0b8
-#define PCI_1_MEMORY2_BASE_ADDR 0x2a0
-#define PCI_1_MEMORY2_SIZE 0x2a8
-#define PCI_1_MEMORY3_BASE_ADDR 0x2b0
-#define PCI_1_MEMORY3_SIZE 0x2b8
-
-/* internal registers space base address */
-#define INTERNAL_SPACE_DECODE 0x068
-#define INTERNAL_SPACE_BASE_ADDR INTERNAL_SPACE_DECODE
-
-/* SRAM base address */
-#define INTEGRATED_SRAM_BASE_ADDR 0x268
-
-/* Enables the CS , DEV_CS , PCI 0 and PCI 1
- windows above */
-#define BASE_ADDR_ENABLE 0x278
-
-
-#define CPU_0_LOW_DECODE_ADDRESS 0x290
-#define CPU_0_HIGH_DECODE_ADDRESS 0x298
-#define CPU_1_LOW_DECODE_ADDRESS 0x2c0
-#define CPU_1_HIGH_DECODE_ADDRESS 0x2c8
-
-/****************************************/
-/* PCI remap registers */
-/****************************************/
-/*****************************************************************************************/
- /* PCI 0 */
-/* old fashion evb 64260 */
-#define PCI_0I_O_ADDRESS_REMAP 0x0f0
-#define PCI_0MEMORY0_ADDRESS_REMAP 0x0f8
-#define PCI_0MEMORY0_HIGH_ADDRESS_REMAP 0x320
-#define PCI_0MEMORY1_ADDRESS_REMAP 0x100
-#define PCI_0MEMORY1_HIGH_ADDRESS_REMAP 0x328
-#define PCI_0MEMORY2_ADDRESS_REMAP 0x2f8
-#define PCI_0MEMORY2_HIGH_ADDRESS_REMAP 0x330
-#define PCI_0MEMORY3_ADDRESS_REMAP 0x300
-#define PCI_0MEMORY3_HIGH_ADDRESS_REMAP 0x338
-
-#define PCI_0_IO_ADDR_REMAP PCI_0I_O_ADDRESS_REMAP
-#define PCI_0_MEMORY0_LOW_ADDR_REMAP PCI_0MEMORY0_ADDRESS_REMAP
-#define PCI_0_MEMORY0_HIGH_ADDR_REMAP PCI_0MEMORY0_HIGH_ADDRESS_REMAP
-#define PCI_0_MEMORY1_LOW_ADDR_REMAP PCI_0MEMORY1_ADDRESS_REMAP
-#define PCI_0_MEMORY1_HIGH_ADDR_REMAP PCI_0MEMORY1_HIGH_ADDRESS_REMAP
-#define PCI_0_MEMORY2_LOW_ADDR_REMAP PCI_0MEMORY2_ADDRESS_REMAP
-#define PCI_0_MEMORY2_HIGH_ADDR_REMAP PCI_0MEMORY2_HIGH_ADDRESS_REMAP
-#define PCI_0_MEMORY3_LOW_ADDR_REMAP PCI_0MEMORY3_ADDRESS_REMAP
-#define PCI_0_MEMORY3_HIGH_ADDR_REMAP PCI_0MEMORY3_HIGH_ADDRESS_REMAP
-
- /* PCI 1 */
-/* old fashion evb 64260 */
-#define PCI_1I_O_ADDRESS_REMAP 0x108
-#define PCI_1MEMORY0_ADDRESS_REMAP 0x110
-#define PCI_1MEMORY0_HIGH_ADDRESS_REMAP 0x340
-#define PCI_1MEMORY1_ADDRESS_REMAP 0x118
-#define PCI_1MEMORY1_HIGH_ADDRESS_REMAP 0x348
-#define PCI_1MEMORY2_ADDRESS_REMAP 0x310
-#define PCI_1MEMORY2_HIGH_ADDRESS_REMAP 0x350
-#define PCI_1MEMORY3_ADDRESS_REMAP 0x318
-#define PCI_1MEMORY3_HIGH_ADDRESS_REMAP 0x358
-
-#define PCI_1_IO_ADDR_REMAP PCI_1I_O_ADDRESS_REMAP
-#define PCI_1_MEMORY0_LOW_ADDR_REMAP PCI_1MEMORY0_ADDRESS_REMAP
-#define PCI_1_MEMORY0_HIGH_ADDR_REMAP PCI_1MEMORY0_HIGH_ADDRESS_REMAP
-#define PCI_1_MEMORY1_LOW_ADDR_REMAP PCI_1MEMORY1_ADDRESS_REMAP
-#define PCI_1_MEMORY1_HIGH_ADDR_REMAP PCI_1MEMORY1_HIGH_ADDRESS_REMAP
-#define PCI_1_MEMORY2_LOW_ADDR_REMAP PCI_1MEMORY2_ADDRESS_REMAP
-#define PCI_1_MEMORY2_HIGH_ADDR_REMAP PCI_1MEMORY2_HIGH_ADDRESS_REMAP
-#define PCI_1_MEMORY3_LOW_ADDR_REMAP PCI_1MEMORY3_ADDRESS_REMAP
-#define PCI_1_MEMORY3_HIGH_ADDR_REMAP PCI_1MEMORY3_HIGH_ADDRESS_REMAP
-
-/* old fashion evb 64260 */
-#define CPU_PCI_0_HEADERS_RETARGET_CONTROL 0x3b0
-#define CPU_PCI_0_HEADERS_RETARGET_BASE 0x3b8
-#define CPU_PCI_1_HEADERS_RETARGET_CONTROL 0x3c0
-#define CPU_PCI_1_HEADERS_RETARGET_BASE 0x3c8
-#define CPU_GE_HEADERS_RETARGET_CONTROL 0x3d0
-#define CPU_GE_HEADERS_RETARGET_BASE 0x3d8
-
-/* MV64360 and MV64460 no changes needed*/
-/*****************************************************************************************/
-
-/****************************************/
-/* CPU Control Registers */
-/****************************************/
-/* CPU MASTER CONTROL REGISTER */
-#define CPU_CONFIGURATION 0x000
-#define CPU_MASTER_CONTROL 0x160
-
-#define CPU_CONFIG 0x000
-#define CPU_MODE 0x120
-#define CPU_MASTER_CONTROL 0x160
-/* new in MV64360 and MV64460 */
-#define CPU_CROSS_BAR_CONTROL_LOW 0x150
-#define CPU_CROSS_BAR_CONTROL_HIGH 0x158
-#define CPU_CROSS_BAR_TIMEOUT 0x168
-
-/****************************************/
-/* SMP RegisterS */
-/****************************************/
-
-#define SMP_WHO_AM_I 0x200
-#define SMP_CPU0_DOORBELL 0x214
-#define SMP_CPU0_DOORBELL_CLEAR 0x21C
-#define SMP_CPU1_DOORBELL 0x224
-#define SMP_CPU1_DOORBELL_CLEAR 0x22C
-#define SMP_CPU0_DOORBELL_MASK 0x234
-#define SMP_CPU1_DOORBELL_MASK 0x23C
-#define SMP_SEMAPHOR0 0x244
-#define SMP_SEMAPHOR1 0x24c
-#define SMP_SEMAPHOR2 0x254
-#define SMP_SEMAPHOR3 0x25c
-#define SMP_SEMAPHOR4 0x264
-#define SMP_SEMAPHOR5 0x26c
-#define SMP_SEMAPHOR6 0x274
-#define SMP_SEMAPHOR7 0x27c
-
-
-/****************************************/
-/* CPU Sync Barrier */
-/****************************************/
-#define CPU_0_SYNC_BARRIER_TRIGGER 0x0c0
-#define CPU_0_SYNC_BARRIER_VIRTUAL 0x0c8
-#define CPU_1_SYNC_BARRIER_TRIGGER 0x0d0
-#define CPU_1_SYNC_BARRIER_VIRTUAL 0x0d8
-
-
-/****************************************/
-/* CPU Access Protect */
-/****************************************/
-
-#define CPU_LOW_PROTECT_ADDRESS_0 0x180
-#define CPU_HIGH_PROTECT_ADDRESS_0 0x188
-#define CPU_LOW_PROTECT_ADDRESS_1 0x190
-#define CPU_HIGH_PROTECT_ADDRESS_1 0x198
-#define CPU_LOW_PROTECT_ADDRESS_2 0x1a0
-#define CPU_HIGH_PROTECT_ADDRESS_2 0x1a8
-#define CPU_LOW_PROTECT_ADDRESS_3 0x1b0
-#define CPU_HIGH_PROTECT_ADDRESS_3 0x1b8
-/*#define CPU_LOW_PROTECT_ADDRESS_4 0x1c0
-#define CPU_HIGH_PROTECT_ADDRESS_4 0x1c8
-#define CPU_LOW_PROTECT_ADDRESS_5 0x1d0
-#define CPU_HIGH_PROTECT_ADDRESS_5 0x1d8
-#define CPU_LOW_PROTECT_ADDRESS_6 0x1e0
-#define CPU_HIGH_PROTECT_ADDRESS_6 0x1e8
-#define CPU_LOW_PROTECT_ADDRESS_7 0x1f0
-#define CPU_HIGH_PROTECT_ADDRESS_7 0x1f8
-*/
-
-#define CPU_PROTECT_WINDOW_0_BASE_ADDR CPU_LOW_PROTECT_ADDRESS_0 /* 0x180 */
-#define CPU_PROTECT_WINDOW_0_SIZE CPU_HIGH_PROTECT_ADDRESS_0 /* 0x188 */
-#define CPU_PROTECT_WINDOW_1_BASE_ADDR CPU_LOW_PROTECT_ADDRESS_1 /* 0x190 */
-#define CPU_PROTECT_WINDOW_1_SIZE CPU_HIGH_PROTECT_ADDRESS_1 /* 0x198 */
-#define CPU_PROTECT_WINDOW_2_BASE_ADDR CPU_LOW_PROTECT_ADDRESS_2 /*0x1a0 */
-#define CPU_PROTECT_WINDOW_2_SIZE CPU_HIGH_PROTECT_ADDRESS_2 /* 0x1a8 */
-#define CPU_PROTECT_WINDOW_3_BASE_ADDR CPU_LOW_PROTECT_ADDRESS_3 /* 0x1b0 */
-#define CPU_PROTECT_WINDOW_3_SIZE CPU_HIGH_PROTECT_ADDRESS_3 /* 0x1b8 */
-
-
-/****************************************/
-/* Snoop Control */
-/****************************************/
-
-/*#define SNOOP_BASE_ADDRESS_0 0x380
-#define SNOOP_TOP_ADDRESS_0 0x388
-#define SNOOP_BASE_ADDRESS_1 0x390
-#define SNOOP_TOP_ADDRESS_1 0x398
-#define SNOOP_BASE_ADDRESS_2 0x3a0
-#define SNOOP_TOP_ADDRESS_2 0x3a8
-#define SNOOP_BASE_ADDRESS_3 0x3b0
-#define SNOOP_TOP_ADDRESS_3 0x3b8
-*/
-
-/****************************************/
-/* Integrated SRAM Registers */
-/****************************************/
-
-#define SRAM_CONFIG 0x380
-#define SRAM_TEST_MODE 0x3F4
-#define SRAM_ERROR_CAUSE 0x388
-#define SRAM_ERROR_ADDR 0x390
-#define SRAM_ERROR_ADDR_HIGH 0x3F8
-#define SRAM_ERROR_DATA_LOW 0x398
-#define SRAM_ERROR_DATA_HIGH 0x3a0
-#define SRAM_ERROR_DATA_PARITY 0x3a8
-
-/****************************************/
-/* CPU Error Report */
-/****************************************/
-
-#define CPU_ERROR_ADDRESS_LOW 0x070
-#define CPU_ERROR_ADDRESS_HIGH 0x078
-#define CPU_ERROR_DATA_LOW 0x128
-#define CPU_ERROR_DATA_HIGH 0x130
-#define CPU_ERROR_PARITY 0x138
-#define CPU_ERROR_CAUSE 0x140
-#define CPU_ERROR_MASK 0x148
-
-#define CPU_ERROR_ADDR_LOW CPU_ERROR_ADDRESS_LOW /* 0x0701 */
-#define CPU_ERROR_ADDR_HIGH CPU_ERROR_ADDRESS_HIGH /* 0x0781 */
-
-/****************************************/
-/* Pslave Debug */
-/* CPU Interface Debug Registers */
-/****************************************/
-
-#define X_0_ADDRESS 0x360
-#define X_0_COMMAND_ID 0x368
-#define X_1_ADDRESS 0x370
-#define X_1_COMMAND_ID 0x378
- /*#define WRITE_DATA_LOW 0x3c01 */
- /*#define WRITE_DATA_HIGH 0x3c81 */
- /*#define WRITE_BYTE_ENABLE 0x3e01 */
- /*#define READ_DATA_LOW 0x3d01 */
- /*#define READ_DATA_HIGH 0x3d81 */
- /*#define READ_ID 0x3e81 */
-
-#define PUNIT_SLAVE_DEBUG_LOW X_0_ADDRESS /* 0x3601 */
-#define PUNIT_SLAVE_DEBUG_HIGH X_0_COMMAND_ID /* 0x3681 */
-#define PUNIT_MASTER_DEBUG_LOW X_1_ADDRESS /* 0x3701 */
-#define PUNIT_MASTER_DEBUG_HIGH X_1_COMMAND_ID /* 0x3781 */
-#define PUNIT_MMASK 0x3e4
-
-
-/****************************************/
-/* SDRAM and Device Address Space */
-/****************************************/
-
-/****************************************/
-/* SDRAM Configuration */
-/****************************************/
-#define SDRAM_CONFIG 0x1400 /* MV64260 0x448 some changes*/
-#define D_UNIT_CONTROL_LOW 0x1404 /* NEW in MV64360 and MV64460 */
-#define D_UNIT_CONTROL_HIGH 0x1424 /* NEW in MV64360 and MV64460 */
-#define SDRAM_TIMING_CONTROL_LOW 0x1408 /* MV64260 0x4b4 new SDRAM TIMING REGISTER */
-#define SDRAM_TIMING_CONTROL_HIGH 0x140c /* MV64260 0x4b4 new SDRAM TIMING REGISTER */
-#define SDRAM_ADDR_CONTROL 0x1410 /* MV64260 0x47c some changes*/
-#define SDRAM_OPEN_PAGES_CONTROL 0x1414 /* NEW in MV64360 and MV64460 */
-#define SDRAM_OPERATION 0x1418 /* MV64260 0x474 some changes*/
-#define SDRAM_MODE 0x141c /* NEW in MV64360 and MV64460 */
-#define EXTENDED_DRAM_MODE 0x1420 /* NEW in MV64360 and MV64460 */
-#define SDRAM_CROSS_BAR_CONTROL_LOW 0x1430 /* MV64260 0x4a8 NO changes*/
-#define SDRAM_CROSS_BAR_CONTROL_HIGH 0x1434 /* MV64260 0x4ac NO changes*/
-#define SDRAM_CROSS_BAR_TIMEOUT 0x1438 /* MV64260 0x4b0 NO changes*/
-#define SDRAM_ADDR_CTRL_PADS_CALIBRATION 0x14c0 /* what is this ??? */
-#define SDRAM_DATA_PADS_CALIBRATION 0x14c4 /* what is this ??? */
-/****************************************/
-/* SDRAM Configuration MV64260 */
-/****************************************/
- /*#define SDRAM_CONFIGURATION 0x4481 */
- /*#define SDRAM_OPERATION_MODE 0x4741 */
- /*#define SDRAM_ADDRESS_DECODE 0x47c1 */
- /*#define SDRAM_UMA_CONTROL 0x4a4 eliminated in MV64360 and MV64460 */
- /*#define SDRAM_CROSS_BAR_CONTROL_LOW 0x4a81 */
- /*#define SDRAM_CROSS_BAR_CONTROL_HIGH 0x4ac1 */
- /*#define SDRAM_CROSS_BAR_TIMEOUT 0x4b01 */
- /*#define SDRAM_TIMING 0x4b41 */
-
-
-/****************************************/
-/* SDRAM Error Report */
-/****************************************/
-#define SDRAM_ERROR_DATA_LOW 0x1444 /* MV64260 0x484 NO changes*/
-#define SDRAM_ERROR_DATA_HIGH 0x1440 /* MV64260 0x480 NO changes*/
-#define SDRAM_ERROR_ADDR 0x1450 /* MV64260 0x490 NO changes*/
-#define SDRAM_RECEIVED_ECC 0x1448 /* MV64260 0x488 NO changes*/
-#define SDRAM_CALCULATED_ECC 0x144c /* MV64260 0x48c NO changes*/
-#define SDRAM_ECC_CONTROL 0x1454 /* MV64260 0x494 NO changes*/
-#define SDRAM_ECC_ERROR_COUNTER 0x1458 /* MV64260 0x498 NO changes*/
-#define SDRAM_MMASK 0x1B40 /* NEW Register in MV64360 and MV64460 DO NOT USE !!!*/
-/****************************************/
-/* SDRAM Error Report MV64260 */
-/****************************************/
- /*#define SDRAM_ERROR_DATA_LOW 0x4841 */
- /*#define SDRAM_ERROR_DATA_HIGH 0x4801 */
- /*#define SDRAM_AND_DEVICE_ERROR_ADDRESS 0x4901 */
- /*#define SDRAM_RECEIVED_ECC 0x4881 */
- /*#define SDRAM_CALCULATED_ECC 0x48c1 */
- /*#define SDRAM_ECC_CONTROL 0x4941 */
- /*#define SDRAM_ECC_ERROR_COUNTER 0x4981 */
-
-/******************************************/
-/* Controlled Delay Line (CDL) Registers */
-/******************************************/
-#define DFCDL_CONFIG0 0x1480
-#define DFCDL_CONFIG1 0x1484
-#define DLL_WRITE 0x1488
-#define DLL_READ 0x148c
-#define SRAM_ADDR 0x1490
-#define SRAM_DATA0 0x1494
-#define SRAM_DATA1 0x1498
-#define SRAM_DATA2 0x149c
-#define DFCL_PROBE 0x14a0
-
-
-/****************************************/
-/* SDRAM Parameters only in MV64260 */
-/****************************************/
-
- /*#define SDRAM_BANK0PARAMETERS 0x44C eliminated in MV64360 and MV64460 */
- /*#define SDRAM_BANK1PARAMETERS 0x450 eliminated in MV64360 and MV64460 */
- /*#define SDRAM_BANK2PARAMETERS 0x454 eliminated in MV64360 and MV64460 */
- /*#define SDRAM_BANK3PARAMETERS 0x458 eliminated in MV64360 and MV64460 */
-
-/******************************************/
-/* Debug Registers */
-/******************************************/
-
-#define DUNIT_DEBUG_LOW 0x1460
-#define DUNIT_DEBUG_HIGH 0x1464
-#define DUNIT_MMASK 0x1b40
-
-/****************************************/
-/* SDunit Debug (for internal use) */
-/****************************************/
-
-#define X0_ADDRESS 0x500
-#define X0_COMMAND_AND_ID 0x504
-#define X0_WRITE_DATA_LOW 0x508
-#define X0_WRITE_DATA_HIGH 0x50c
-#define X0_WRITE_BYTE_ENABLE 0x518
-#define X0_READ_DATA_LOW 0x510
-#define X0_READ_DATA_HIGH 0x514
-#define X0_READ_ID 0x51c
-#define X1_ADDRESS 0x520
-#define X1_COMMAND_AND_ID 0x524
-#define X1_WRITE_DATA_LOW 0x528
-#define X1_WRITE_DATA_HIGH 0x52c
-#define X1_WRITE_BYTE_ENABLE 0x538
-#define X1_READ_DATA_LOW 0x530
-#define X1_READ_DATA_HIGH 0x534
-#define X1_READ_ID 0x53c
-#define X0_SNOOP_ADDRESS 0x540
-#define X0_SNOOP_COMMAND 0x544
-#define X1_SNOOP_ADDRESS 0x548
-#define X1_SNOOP_COMMAND 0x54c
-
-/****************************************/
-/* Device Parameters */
-/****************************************/
-
-#define DEVICE_BANK0PARAMETERS 0x45c
-#define DEVICE_BANK1PARAMETERS 0x460
-#define DEVICE_BANK2PARAMETERS 0x464
-#define DEVICE_BANK3PARAMETERS 0x468
-#define DEVICE_BOOT_BANK_PARAMETERS 0x46c
-#define DEVICE_CONTROL 0x4c0
-#define DEVICE_CROSS_BAR_CONTROL_LOW 0x4c8
-#define DEVICE_CROSS_BAR_CONTROL_HIGH 0x4cc
-#define DEVICE_CROSS_BAR_TIMEOUT 0x4c4
-
-/****************************************/
-/* Device Parameters */
-/****************************************/
-
-#define DEVICE_BANK0_PARAMETERS DEVICE_BANK0PARAMETERS /* 0x45c1 */
-#define DEVICE_BANK1_PARAMETERS DEVICE_BANK1PARAMETERS /* 0x4601 */
-#define DEVICE_BANK2_PARAMETERS DEVICE_BANK2PARAMETERS /* 0x4641 */
-#define DEVICE_BANK3_PARAMETERS DEVICE_BANK3PARAMETERS /* 0x4681 */
-/*#define DEVICE_BOOT_BANK_PARAMETERS 0x46c1 */
-#define DEVICE_INTERFACE_CONTROL DEVICE_CONTROL /* 0x4c01 */
-#define DEVICE_INTERFACE_CROSS_BAR_CONTROL_LOW DEVICE_CROSS_BAR_CONTROL_LOW /* 0x4c81 */
-#define DEVICE_INTERFACE_CROSS_BAR_CONTROL_HIGH DEVICE_CROSS_BAR_CONTROL_HIGH /* 0x4cc1 */
-#define DEVICE_INTERFACE_CROSS_BAR_TIMEOUT DEVICE_CROSS_BAR_TIMEOUT /* 0x4c41 */
-
-
-/****************************************/
-/* Device Interrupt */
-/****************************************/
-
-#define DEVICE_INTERRUPT_CAUSE 0x4d0
-#define DEVICE_INTERRUPT_MASK 0x4d4
-#define DEVICE_ERROR_ADDRESS 0x4d8
- /*#define DEVICE_INTERRUPT_CAUSE 0x4d01 */
- /*#define DEVICE_INTERRUPT_MASK 0x4d41 */
-#define DEVICE_ERROR_ADDR DEVICE_ERROR_ADDRESS /*0x4d81 */
-#define DEVICE_ERROR_DATA 0x4dc
-#define DEVICE_ERROR_PARITY 0x4e0
-
-/****************************************/
-/* Device debug registers */
-/****************************************/
-
-#define DEVICE_DEBUG_LOW 0x4e4
-#define DEVICE_DEBUG_HIGH 0x4e8
-#define RUNIT_MMASK 0x4f0
-
-/****************************************/
-/* DMA Record */
-/****************************************/
-
- /*#define CHANNEL4_DMA_BYTE_COUNT 0x9001 */
- /*#define CHANNEL5_DMA_BYTE_COUNT 0x9041 */
- /*#define CHANNEL6_DMA_BYTE_COUNT 0x9081 */
- /*#define CHANNEL7_DMA_BYTE_COUNT 0x90C1 */
- /*#define CHANNEL4_DMA_SOURCE_ADDRESS 0x9101 */
- /*#define CHANNEL5_DMA_SOURCE_ADDRESS 0x9141 */
- /*#define CHANNEL6_DMA_SOURCE_ADDRESS 0x9181 */
- /*#define CHANNEL7_DMA_SOURCE_ADDRESS 0x91C1 */
- /*#define CHANNEL4_DMA_DESTINATION_ADDRESS 0x9201 */
- /*#define CHANNEL5_DMA_DESTINATION_ADDRESS 0x9241 */
- /*#define CHANNEL6_DMA_DESTINATION_ADDRESS 0x9281 */
- /*#define CHANNEL7_DMA_DESTINATION_ADDRESS 0x92C1 */
- /*#define CHANNEL4NEXT_RECORD_POINTER 0x9301 */
- /*#define CHANNEL5NEXT_RECORD_POINTER 0x9341 */
- /*#define CHANNEL6NEXT_RECORD_POINTER 0x9381 */
- /*#define CHANNEL7NEXT_RECORD_POINTER 0x93C1 */
- /*#define CHANNEL4CURRENT_DESCRIPTOR_POINTER 0x9701 */
- /*#define CHANNEL5CURRENT_DESCRIPTOR_POINTER 0x9741 */
- /*#define CHANNEL6CURRENT_DESCRIPTOR_POINTER 0x9781 */
- /*#define CHANNEL7CURRENT_DESCRIPTOR_POINTER 0x97C1 */
- /*#define CHANNEL0_DMA_SOURCE_HIGH_PCI_ADDRESS 0x8901 */
- /*#define CHANNEL1_DMA_SOURCE_HIGH_PCI_ADDRESS 0x8941 */
- /*#define CHANNEL2_DMA_SOURCE_HIGH_PCI_ADDRESS 0x8981 */
- /*#define CHANNEL3_DMA_SOURCE_HIGH_PCI_ADDRESS 0x89c1 */
- /*#define CHANNEL4_DMA_SOURCE_HIGH_PCI_ADDRESS 0x9901 */
- /*#define CHANNEL5_DMA_SOURCE_HIGH_PCI_ADDRESS 0x9941 */
- /*#define CHANNEL6_DMA_SOURCE_HIGH_PCI_ADDRESS 0x9981 */
- /*#define CHANNEL7_DMA_SOURCE_HIGH_PCI_ADDRESS 0x99c1 */
- /*#define CHANNEL0_DMA_DESTINATION_HIGH_PCI_ADDRESS 0x8a01 */
- /*#define CHANNEL1_DMA_DESTINATION_HIGH_PCI_ADDRESS 0x8a41 */
- /*#define CHANNEL2_DMA_DESTINATION_HIGH_PCI_ADDRESS 0x8a81 */
- /*#define CHANNEL3_DMA_DESTINATION_HIGH_PCI_ADDRESS 0x8ac1 */
- /*#define CHANNEL4_DMA_DESTINATION_HIGH_PCI_ADDRESS 0x9a01 */
- /*#define CHANNEL5_DMA_DESTINATION_HIGH_PCI_ADDRESS 0x9a41 */
- /*#define CHANNEL6_DMA_DESTINATION_HIGH_PCI_ADDRESS 0x9a81 */
- /*#define CHANNEL7_DMA_DESTINATION_HIGH_PCI_ADDRESS 0x9ac1 */
- /*#define CHANNEL0_DMA_NEXT_RECORD_POINTER_HIGH_PCI_ADDRESS 0x8b01 */
- /*#define CHANNEL1_DMA_NEXT_RECORD_POINTER_HIGH_PCI_ADDRESS 0x8b41 */
- /*#define CHANNEL2_DMA_NEXT_RECORD_POINTER_HIGH_PCI_ADDRESS 0x8b81 */
- /*#define CHANNEL3_DMA_NEXT_RECORD_POINTER_HIGH_PCI_ADDRESS 0x8bc1 */
- /*#define CHANNEL4_DMA_NEXT_RECORD_POINTER_HIGH_PCI_ADDRESS 0x9b01 */
- /*#define CHANNEL5_DMA_NEXT_RECORD_POINTER_HIGH_PCI_ADDRESS 0x9b41 */
- /*#define CHANNEL6_DMA_NEXT_RECORD_POINTER_HIGH_PCI_ADDRESS 0x9b81 */
- /*#define CHANNEL7_DMA_NEXT_RECORD_POINTER_HIGH_PCI_ADDRESS 0x9bc1 */
-
-/****************************************/
-/* DMA Channel Control */
-/****************************************/
-
-#define CHANNEL0CONTROL 0x840
-#define CHANNEL0CONTROL_HIGH 0x880
-#define CHANNEL1CONTROL 0x844
-#define CHANNEL1CONTROL_HIGH 0x884
-#define CHANNEL2CONTROL 0x848
-#define CHANNEL2CONTROL_HIGH 0x888
-#define CHANNEL3CONTROL 0x84C
-#define CHANNEL3CONTROL_HIGH 0x88C
-
-#define DMA_CHANNEL0_CONTROL CHANNEL0CONTROL /*0x8401 */
-#define DMA_CHANNEL0_CONTROL_HIGH CHANNEL0CONTROL_HIGH /*0x8801 */
-#define DMA_CHANNEL1_CONTROL CHANNEL1CONTROL /* 0x8441 */
-#define DMA_CHANNEL1_CONTROL_HIGH CHANNEL1CONTROL_HIGH /*0x8841 */
-#define DMA_CHANNEL2_CONTROL CHANNEL2CONTROL /*0x8481 */
-#define DMA_CHANNEL2_CONTROL_HIGH CHANNEL2CONTROL_HIGH /*0x8881 */
-#define DMA_CHANNEL3_CONTROL CHANNEL3CONTROL /*0x84C1 */
-#define DMA_CHANNEL3_CONTROL_HIGH CHANNEL3CONTROL_HIGH /*0x88C1 */
-
- /*#define CHANNEL4CONTROL 0x9401 */
- /*#define CHANNEL4CONTROL_HIGH 0x9801 */
- /*#define CHANNEL5CONTROL 0x9441 */
- /*#define CHANNEL5CONTROL_HIGH 0x9841 */
- /*#define CHANNEL6CONTROL 0x9481 */
- /*#define CHANNEL6CONTROL_HIGH 0x9881 */
- /*#define CHANNEL7CONTROL 0x94C1 */
- /*#define CHANNEL7CONTROL_HIGH 0x98C1 */
-
-
-/****************************************/
-/* DMA Arbiter */
-/****************************************/
-
- /*#define ARBITER_CONTROL_0_3 0x8601 */
-#define ARBITER_CONTROL_4_7 0x960
-/****************************************/
-/* IDMA Registers */
-/****************************************/
-
-#define DMA_CHANNEL0_BYTE_COUNT CHANNEL0_DMA_BYTE_COUNT /*0x8001 */
-#define DMA_CHANNEL1_BYTE_COUNT CHANNEL1_DMA_BYTE_COUNT /*0x8041 */
-#define DMA_CHANNEL2_BYTE_COUNT CHANNEL2_DMA_BYTE_COUNT /*0x8081 */
-#define DMA_CHANNEL3_BYTE_COUNT CHANNEL3_DMA_BYTE_COUNT /*0x80C1 */
-#define DMA_CHANNEL0_SOURCE_ADDR CHANNEL0_DMA_SOURCE_ADDRESS /*0x8101 */
-#define DMA_CHANNEL1_SOURCE_ADDR CHANNEL1_DMA_SOURCE_ADDRESS /*0x8141 */
-#define DMA_CHANNEL2_SOURCE_ADDR CHANNEL2_DMA_SOURCE_ADDRESS /*0x8181 */
-#define DMA_CHANNEL3_SOURCE_ADDR CHANNEL3_DMA_SOURCE_ADDRESS /*0x81c1 */
-#define DMA_CHANNEL0_DESTINATION_ADDR CHANNEL0_DMA_DESTINATION_ADDRESS /*0x8201 */
-#define DMA_CHANNEL1_DESTINATION_ADDR CHANNEL1_DMA_DESTINATION_ADDRESS /*0x8241 */
-#define DMA_CHANNEL2_DESTINATION_ADDR CHANNEL2_DMA_DESTINATION_ADDRESS /*0x8281 */
-#define DMA_CHANNEL3_DESTINATION_ADDR CHANNEL3_DMA_DESTINATION_ADDRESS /*0x82C1 */
-#define DMA_CHANNEL0_NEXT_DESCRIPTOR_POINTER CHANNEL0NEXT_RECORD_POINTER /*0x8301 */
-#define DMA_CHANNEL1_NEXT_DESCRIPTOR_POINTER CHANNEL1NEXT_RECORD_POINTER /*0x8341 */
-#define DMA_CHANNEL2_NEXT_DESCRIPTOR_POINTER CHANNEL2NEXT_RECORD_POINTER /*0x8381 */
-#define DMA_CHANNEL3_NEXT_DESCRIPTOR_POINTER CHANNEL3NEXT_RECORD_POINTER /*0x83C1 */
-#define DMA_CHANNEL0_CURRENT_DESCRIPTOR_POINTER CHANNEL0CURRENT_DESCRIPTOR_POINTER /*0x8701 */
-#define DMA_CHANNEL1_CURRENT_DESCRIPTOR_POINTER CHANNEL1CURRENT_DESCRIPTOR_POINTER /*0x8741 */
-#define DMA_CHANNEL2_CURRENT_DESCRIPTOR_POINTER CHANNEL2CURRENT_DESCRIPTOR_POINTER /*0x8781 */
-#define DMA_CHANNEL3_CURRENT_DESCRIPTOR_POINTER CHANNEL3CURRENT_DESCRIPTOR_POINTER /*0x87C1 */
-
-#define CHANNEL3CURRENT_DESCRIPTOR_POINTER 0x87C
-#define CHANNEL2CURRENT_DESCRIPTOR_POINTER 0x878
-#define CHANNEL1CURRENT_DESCRIPTOR_POINTER 0x874
-#define CHANNEL0CURRENT_DESCRIPTOR_POINTER 0x870
-#define CHANNEL0NEXT_RECORD_POINTER 0x830
-#define CHANNEL1NEXT_RECORD_POINTER 0x834
-#define CHANNEL2NEXT_RECORD_POINTER 0x838
-#define CHANNEL3NEXT_RECORD_POINTER 0x83C
-#define CHANNEL0_DMA_DESTINATION_ADDRESS 0x820
-#define CHANNEL1_DMA_DESTINATION_ADDRESS 0x824
-#define CHANNEL2_DMA_DESTINATION_ADDRESS 0x828
-#define CHANNEL3_DMA_DESTINATION_ADDRESS 0x82C
-#define CHANNEL0_DMA_SOURCE_ADDRESS 0x810
-#define CHANNEL1_DMA_SOURCE_ADDRESS 0x814
-#define CHANNEL2_DMA_SOURCE_ADDRESS 0x818
-#define CHANNEL3_DMA_SOURCE_ADDRESS 0x81C
-#define CHANNEL0_DMA_BYTE_COUNT 0x800
-#define CHANNEL1_DMA_BYTE_COUNT 0x804
-#define CHANNEL2_DMA_BYTE_COUNT 0x808
-#define CHANNEL3_DMA_BYTE_COUNT 0x80C
-
- /* IDMA Address Decoding Base Address Registers */
-
-#define DMA_BASE_ADDR_REG0 0xa00
-#define DMA_BASE_ADDR_REG1 0xa08
-#define DMA_BASE_ADDR_REG2 0xa10
-#define DMA_BASE_ADDR_REG3 0xa18
-#define DMA_BASE_ADDR_REG4 0xa20
-#define DMA_BASE_ADDR_REG5 0xa28
-#define DMA_BASE_ADDR_REG6 0xa30
-#define DMA_BASE_ADDR_REG7 0xa38
-
- /* IDMA Address Decoding Size Address Register */
-
-#define DMA_SIZE_REG0 0xa04
-#define DMA_SIZE_REG1 0xa0c
-#define DMA_SIZE_REG2 0xa14
-#define DMA_SIZE_REG3 0xa1c
-#define DMA_SIZE_REG4 0xa24
-#define DMA_SIZE_REG5 0xa2c
-#define DMA_SIZE_REG6 0xa34
-#define DMA_SIZE_REG7 0xa3C
-
- /* IDMA Address Decoding High Address Remap and Access
- Protection Registers */
-
-#define DMA_HIGH_ADDR_REMAP_REG0 0xa60
-#define DMA_HIGH_ADDR_REMAP_REG1 0xa64
-#define DMA_HIGH_ADDR_REMAP_REG2 0xa68
-#define DMA_HIGH_ADDR_REMAP_REG3 0xa6C
-#define DMA_BASE_ADDR_ENABLE_REG 0xa80
-#define DMA_CHANNEL0_ACCESS_PROTECTION_REG 0xa70
-#define DMA_CHANNEL1_ACCESS_PROTECTION_REG 0xa74
-#define DMA_CHANNEL2_ACCESS_PROTECTION_REG 0xa78
-#define DMA_CHANNEL3_ACCESS_PROTECTION_REG 0xa7c
-#define DMA_ARBITER_CONTROL 0x860
-#define DMA_CROSS_BAR_TIMEOUT 0x8d0
-
- /* IDMA Headers Retarget Registers */
-
- /*#define CPU_IDMA_HEADERS_RETARGET_CONTROL 0x3e01 */
- /*#define CPU_IDMA_HEADERS_RETARGET_BASE 0x3e81 */
-
-#define DMA_HEADERS_RETARGET_CONTROL 0xa84
-#define DMA_HEADERS_RETARGET_BASE 0xa88
-
-/****************************************/
-/* DMA Interrupt */
-/****************************************/
-
-#define CHANELS0_3_INTERRUPT_CAUSE 0x8c0
-#define CHANELS0_3_INTERRUPT_MASK 0x8c4
-#define CHANELS0_3_ERROR_ADDRESS 0x8c8
-#define CHANELS0_3_ERROR_SELECT 0x8cc
- /*#define CHANELS4_7_INTERRUPT_CAUSE 0x9c01 */
- /*#define CHANELS4_7_INTERRUPT_MASK 0x9c41 */
- /*#define CHANELS4_7_ERROR_ADDRESS 0x9c81 */
- /*#define CHANELS4_7_ERROR_SELECT 0x9cc1 */
-
-#define DMA_INTERRUPT_CAUSE_REG CHANELS0_3_INTERRUPT_CAUSE /*0x8c01 */
-#define DMA_INTERRUPT_CAUSE_MASK CHANELS0_3_INTERRUPT_MASK /*0x8c41 */
-#define DMA_ERROR_ADDR CHANELS0_3_ERROR_ADDRESS /*0x8c81 */
-#define DMA_ERROR_SELECT CHANELS0_3_ERROR_SELECT /*0x8cc1 */
-
-
-/****************************************/
-/* DMA Debug (for internal use) */
-/****************************************/
-
-#define DMA_X0_ADDRESS 0x8e0
-#define DMA_X0_COMMAND_AND_ID 0x8e4
- /*#define DMA_X0_WRITE_DATA_LOW 0x8e81 */
- /*#define DMA_X0_WRITE_DATA_HIGH 0x8ec1 */
- /*#define DMA_X0_WRITE_BYTE_ENABLE 0x8f81 */
- /*#define DMA_X0_READ_DATA_LOW 0x8f01 */
- /*#define DMA_X0_READ_DATA_HIGH 0x8f41 */
- /*#define DMA_X0_READ_ID 0x8fc1 */
- /*#define DMA_X1_ADDRESS 0x9e01 */
- /*#define DMA_X1_COMMAND_AND_ID 0x9e41 */
- /*#define DMA_X1_WRITE_DATA_LOW 0x9e81 */
- /*#define DMA_X1_WRITE_DATA_HIGH 0x9ec1 */
- /*#define DMA_X1_WRITE_BYTE_ENABLE 0x9f81 */
- /*#define DMA_X1_READ_DATA_LOW 0x9f01 */
- /*#define DMA_X1_READ_DATA_HIGH 0x9f41 */
- /*#define DMA_X1_READ_ID 0x9fc1 */
-
- /* IDMA Debug Register ( for internal use ) */
-
-#define DMA_DEBUG_LOW DMA_X0_ADDRESS /* 0x8e01 */
-#define DMA_DEBUG_HIGH DMA_X0_COMMAND_AND_ID /*0x8e41 */
-#define DMA_SPARE 0xA8C
-
-
-/****************************************/
-/* Timer_Counter */
-/****************************************/
-
-#define TIMER_COUNTER0 0x850
-#define TIMER_COUNTER1 0x854
-#define TIMER_COUNTER2 0x858
-#define TIMER_COUNTER3 0x85C
-#define TIMER_COUNTER_0_3_CONTROL 0x864
-#define TIMER_COUNTER_0_3_INTERRUPT_CAUSE 0x868
-#define TIMER_COUNTER_0_3_INTERRUPT_MASK 0x86c
- /*#define TIMER_COUNTER4 0x9501 */
- /*#define TIMER_COUNTER5 0x9541 */
- /*#define TIMER_COUNTER6 0x9581 */
- /*#define TIMER_COUNTER7 0x95C1 */
- /*#define TIMER_COUNTER_4_7_CONTROL 0x9641 */
- /*#define TIMER_COUNTER_4_7_INTERRUPT_CAUSE 0x9681 */
- /*#define TIMER_COUNTER_4_7_INTERRUPT_MASK 0x96c1 */
-
-/****************************************/
-/* PCI Slave Address Decoding */
-/****************************************/
-/****************************************/
-/* PCI Slave Address Decoding registers */
-/****************************************/
-#define PCI_0_CS_0_BANK_SIZE PCI_0SCS_0_BANK_SIZE /*0xc081 */
-#define PCI_1_CS_0_BANK_SIZE PCI_1SCS_0_BANK_SIZE /* 0xc881 */
-#define PCI_0_CS_1_BANK_SIZE PCI_0SCS_1_BANK_SIZE /*0xd081 */
-#define PCI_1_CS_1_BANK_SIZE PCI_1SCS_1_BANK_SIZE /* 0xd881 */
-#define PCI_0_CS_2_BANK_SIZE PCI_0SCS_2_BANK_SIZE /*0xc0c1 */
-#define PCI_1_CS_2_BANK_SIZE PCI_1SCS_2_BANK_SIZE /*0xc8c1 */
-#define PCI_0_CS_3_BANK_SIZE PCI_0SCS_3_BANK_SIZE /*0xd0c1 */
-#define PCI_1_CS_3_BANK_SIZE PCI_1SCS_3_BANK_SIZE /*0xd8c1 */
-#define PCI_0_DEVCS_0_BANK_SIZE PCI_0CS_0_BANK_SIZE /*0xc101 */
-#define PCI_1_DEVCS_0_BANK_SIZE PCI_1CS_0_BANK_SIZE /*0xc901 */
-#define PCI_0_DEVCS_1_BANK_SIZE PCI_0CS_1_BANK_SIZE /*0xd101 */
-#define PCI_1_DEVCS_1_BANK_SIZE PCI_1CS_1_BANK_SIZE /* 0xd901 */
-#define PCI_0_DEVCS_2_BANK_SIZE PCI_0CS_2_BANK_SIZE /* 0xd181 */
-#define PCI_1_DEVCS_2_BANK_SIZE PCI_1CS_2_BANK_SIZE /*0xd981 */
-#define PCI_0_DEVCS_3_BANK_SIZE PCI_0CS_3_BANK_SIZE /* 0xc141 */
-#define PCI_1_DEVCS_3_BANK_SIZE PCI_1CS_3_BANK_SIZE /*0xc941 */
-#define PCI_0_DEVCS_BOOT_BANK_SIZE PCI_0CS_BOOT_BANK_SIZE /*0xd141 */
-#define PCI_1_DEVCS_BOOT_BANK_SIZE PCI_1CS_BOOT_BANK_SIZE /* 0xd941 */
-#define PCI_0_P2P_MEM0_BAR_SIZE PCI_0P2P_MEM0_BAR_SIZE /*0xd1c1 */
-#define PCI_1_P2P_MEM0_BAR_SIZE PCI_1P2P_MEM0_BAR_SIZE /*0xd9c1 */
-#define PCI_0_P2P_MEM1_BAR_SIZE PCI_0P2P_MEM1_BAR_SIZE /*0xd201 */
-#define PCI_1_P2P_MEM1_BAR_SIZE PCI_1P2P_MEM1_BAR_SIZE /*0xda01 */
-#define PCI_0_P2P_I_O_BAR_SIZE PCI_0P2P_I_O_BAR_SIZE /*0xd241 */
-#define PCI_1_P2P_I_O_BAR_SIZE PCI_1P2P_I_O_BAR_SIZE /*0xda41 */
-#define PCI_0_CPU_BAR_SIZE PCI_0CPU_BAR_SIZE /*0xd281 */
-#define PCI_1_CPU_BAR_SIZE PCI_1CPU_BAR_SIZE /*0xda81 */
-#define PCI_0_INTERNAL_SRAM_BAR_SIZE PCI_0DAC_SCS_0_BANK_SIZE /*0xe001 */
-#define PCI_1_INTERNAL_SRAM_BAR_SIZE PCI_1DAC_SCS_0_BANK_SIZE /*0xe801 */
-#define PCI_0_EXPANSION_ROM_BAR_SIZE PCI_0EXPANSION_ROM_BAR_SIZE /*0xd2c1 */
-#define PCI_1_EXPANSION_ROM_BAR_SIZE PCI_1EXPANSION_ROM_BAR_SIZE /*0xd9c1 */
-#define PCI_0_BASE_ADDR_REG_ENABLE PCI_0BASE_ADDRESS_REGISTERS_ENABLE /*0xc3c1 */
-#define PCI_1_BASE_ADDR_REG_ENABLE PCI_1BASE_ADDRESS_REGISTERS_ENABLE /*0xcbc1 */
-#define PCI_0_CS_0_BASE_ADDR_REMAP PCI_0SCS_0_BASE_ADDRESS_REMAP /*0xc481 */
-#define PCI_1_CS_0_BASE_ADDR_REMAP PCI_1SCS_0_BASE_ADDRESS_REMAP /*0xcc81 */
-#define PCI_0_CS_1_BASE_ADDR_REMAP PCI_0SCS_1_BASE_ADDRESS_REMAP /*0xd481 */
-#define PCI_1_CS_1_BASE_ADDR_REMAP PCI_1SCS_1_BASE_ADDRESS_REMAP /*0xdc81 */
-#define PCI_0_CS_2_BASE_ADDR_REMAP PCI_0SCS_2_BASE_ADDRESS_REMAP /*0xc4c1 */
-#define PCI_1_CS_2_BASE_ADDR_REMAP PCI_1SCS_2_BASE_ADDRESS_REMAP /*0xccc1 */
-#define PCI_0_CS_3_BASE_ADDR_REMAP PCI_0SCS_3_BASE_ADDRESS_REMAP /*0xd4c1 */
-#define PCI_1_CS_3_BASE_ADDR_REMAP PCI_1SCS_3_BASE_ADDRESS_REMAP /* 0xdcc1 */
-#define PCI_0_CS_0_BASE_HIGH_ADDR_REMAP PCI_0DAC_SCS_0_BASE_ADDRESS_REMAP
-#define PCI_1_CS_0_BASE_HIGH_ADDR_REMAP PCI_1DAC_SCS_0_BASE_ADDRESS_REMAP
-#define PCI_0_CS_1_BASE_HIGH_ADDR_REMAP PCI_0DAC_SCS_1_BASE_ADDRESS_REMAP
-#define PCI_1_CS_1_BASE_HIGH_ADDR_REMAP PCI_1DAC_SCS_1_BASE_ADDRESS_REMAP
-#define PCI_0_CS_2_BASE_HIGH_ADDR_REMAP PCI_0DAC_SCS_2_BASE_ADDRESS_REMAP
-#define PCI_1_CS_2_BASE_HIGH_ADDR_REMAP PCI_1DAC_SCS_2_BASE_ADDRESS_REMAP
-#define PCI_0_CS_3_BASE_HIGH_ADDR_REMAP PCI_0DAC_SCS_3_BASE_ADDRESS_REMAP
-#define PCI_1_CS_3_BASE_HIGH_ADDR_REMAP PCI_1DAC_SCS_3_BASE_ADDRESS_REMAP
-#define PCI_0_DEVCS_0_BASE_ADDR_REMAP PCI_0CS_0_BASE_ADDRESS_REMAP /*0xc501 */
-#define PCI_1_DEVCS_0_BASE_ADDR_REMAP PCI_1CS_0_BASE_ADDRESS_REMAP /*0xcd01 */
-#define PCI_0_DEVCS_1_BASE_ADDR_REMAP PCI_0CS_1_BASE_ADDRESS_REMAP /*0xd501 */
-#define PCI_1_DEVCS_1_BASE_ADDR_REMAP PCI_1CS_1_BASE_ADDRESS_REMAP /*0xdd01 */
-#define PCI_0_DEVCS_2_BASE_ADDR_REMAP PCI_0CS_2_BASE_ADDRESS_REMAP /*0xd581 */
-#define PCI_1_DEVCS_2_BASE_ADDR_REMAP PCI_1CS_2_BASE_ADDRESS_REMAP /*0xdd81 */
-#define PCI_0_DEVCS_3_BASE_ADDR_REMAP PCI_0CS_3_BASE_ADDRESS_REMAP /*0xc541 */
-#define PCI_1_DEVCS_3_BASE_ADDR_REMAP PCI_1CS_3_BASE_ADDRESS_REMAP /*0xcd41 */
-#define PCI_0_DEVCS_BOOTCS_BASE_ADDR_REMAP PCI_0CS_BOOTCS_BASE_ADDRESS_REMAP /*0xd541 */
-#define PCI_1_DEVCS_BOOTCS_BASE_ADDR_REMAP PCI_1CS_BOOTCS_BASE_ADDRESS_REMAP /*0xdd41 */
-#define PCI_0_P2P_MEM0_BASE_ADDR_REMAP_LOW PCI_0P2P_MEM0_BASE_ADDRESS_REMAP_LOW /*0xd5c1 */
-#define PCI_1_P2P_MEM0_BASE_ADDR_REMAP_LOW PCI_1P2P_MEM0_BASE_ADDRESS_REMAP_LOW /*0xddc1 */
-#define PCI_0_P2P_MEM0_BASE_ADDR_REMAP_HIGH PCI_0P2P_MEM0_BASE_ADDRESS_REMAP_HIGH /*0xd601 */
-#define PCI_1_P2P_MEM0_BASE_ADDR_REMAP_HIGH PCI_1P2P_MEM0_BASE_ADDRESS_REMAP_HIGH /*0xde01 */
-#define PCI_0_P2P_MEM1_BASE_ADDR_REMAP_LOW PCI_0P2P_MEM1_BASE_ADDRESS_REMAP_LOW /*0xd641 */
-#define PCI_1_P2P_MEM1_BASE_ADDR_REMAP_LOW PCI_1P2P_MEM1_BASE_ADDRESS_REMAP_LOW /*0xde41 */
-#define PCI_0_P2P_MEM1_BASE_ADDR_REMAP_HIGH PCI_0P2P_MEM1_BASE_ADDRESS_REMAP_HIGH /*0xd681 */
-#define PCI_1_P2P_MEM1_BASE_ADDR_REMAP_HIGH PCI_1P2P_MEM1_BASE_ADDRESS_REMAP_HIGH /*0xde81 */
-#define PCI_0_P2P_I_O_BASE_ADDR_REMAP PCI_0P2P_I_O_BASE_ADDRESS_REMAP /*0xd6c1 */
-#define PCI_1_P2P_I_O_BASE_ADDR_REMAP PCI_1P2P_I_O_BASE_ADDRESS_REMAP /*0xdec 1 */
-#define PCI_0_CPU_BASE_ADDR_REMAP_LOW PCI_0CPU_BASE_ADDRESS_REMAP /*0xd701 */
-#define PCI_1_CPU_BASE_ADDR_REMAP_LOW PCI_1CPU_BASE_ADDRESS_REMAP /*0xdf01 */
-#define PCI_0_CPU_BASE_ADDR_REMAP_HIGH 0xd74
-#define PCI_1_CPU_BASE_ADDR_REMAP_HIGH 0xdf4
-#define PCI_0_INTEGRATED_SRAM_BASE_ADDR_REMAP PCI_0DAC_SCS_0_BASE_ADDRESS_REMAP /*0xf001 */
-#define PCI_1_INTEGRATED_SRAM_BASE_ADDR_REMAP 0xf80
-#define PCI_0_EXPANSION_ROM_BASE_ADDR_REMAP PCI_0EXPANSION_ROM_BASE_ADDRESS_REMAP /*0xf381 */
-#define PCI_1_EXPANSION_ROM_BASE_ADDR_REMAP PCI_1EXPANSION_ROM_BASE_ADDRESS_REMAP /*0xfb81 */
-#define PCI_0_ADDR_DECODE_CONTROL PCI_0ADDRESS_DECODE_CONTROL /*0xd3c1 */
-#define PCI_1_ADDR_DECODE_CONTROL PCI_1ADDRESS_DECODE_CONTROL /*0xdbc1 */
-#define PCI_0_HEADERS_RETARGET_CONTROL 0xF40
-#define PCI_1_HEADERS_RETARGET_CONTROL 0xFc0
-#define PCI_0_HEADERS_RETARGET_BASE 0xF44
-#define PCI_1_HEADERS_RETARGET_BASE 0xFc4
-#define PCI_0_HEADERS_RETARGET_HIGH 0xF48
-#define PCI_1_HEADERS_RETARGET_HIGH 0xFc8
-
-#define PCI_0SCS_0_BANK_SIZE 0xc08
-#define PCI_1SCS_0_BANK_SIZE 0xc88
-#define PCI_0SCS_1_BANK_SIZE 0xd08
-#define PCI_1SCS_1_BANK_SIZE 0xd88
-#define PCI_0SCS_2_BANK_SIZE 0xc0c
-#define PCI_1SCS_2_BANK_SIZE 0xc8c
-#define PCI_0SCS_3_BANK_SIZE 0xd0c
-#define PCI_1SCS_3_BANK_SIZE 0xd8c
-#define PCI_0CS_0_BANK_SIZE 0xc10
-#define PCI_1CS_0_BANK_SIZE 0xc90
-#define PCI_0CS_1_BANK_SIZE 0xd10
-#define PCI_1CS_1_BANK_SIZE 0xd90
-#define PCI_0CS_2_BANK_SIZE 0xd18
-#define PCI_1CS_2_BANK_SIZE 0xd98
-#define PCI_0CS_3_BANK_SIZE 0xc14
-#define PCI_1CS_3_BANK_SIZE 0xc94
-#define PCI_0CS_BOOT_BANK_SIZE 0xd14
-#define PCI_1CS_BOOT_BANK_SIZE 0xd94
-#define PCI_0P2P_MEM0_BAR_SIZE 0xd1c
-#define PCI_1P2P_MEM0_BAR_SIZE 0xd9c
-#define PCI_0P2P_MEM1_BAR_SIZE 0xd20
-#define PCI_1P2P_MEM1_BAR_SIZE 0xda0
-#define PCI_0P2P_I_O_BAR_SIZE 0xd24
-#define PCI_1P2P_I_O_BAR_SIZE 0xda4
-#define PCI_0CPU_BAR_SIZE 0xd28
-#define PCI_1CPU_BAR_SIZE 0xda8
-#define PCI_0DAC_SCS_0_BANK_SIZE 0xe00
-#define PCI_1DAC_SCS_0_BANK_SIZE 0xe80
-#define PCI_0DAC_SCS_1_BANK_SIZE 0xe04
-#define PCI_1DAC_SCS_1_BANK_SIZE 0xe84
-#define PCI_0DAC_SCS_2_BANK_SIZE 0xe08
-#define PCI_1DAC_SCS_2_BANK_SIZE 0xe88
-#define PCI_0DAC_SCS_3_BANK_SIZE 0xe0c
-#define PCI_1DAC_SCS_3_BANK_SIZE 0xe8c
-#define PCI_0DAC_CS_0_BANK_SIZE 0xe10
-#define PCI_1DAC_CS_0_BANK_SIZE 0xe90
-#define PCI_0DAC_CS_1_BANK_SIZE 0xe14
-#define PCI_1DAC_CS_1_BANK_SIZE 0xe94
-#define PCI_0DAC_CS_2_BANK_SIZE 0xe18
-#define PCI_1DAC_CS_2_BANK_SIZE 0xe98
-#define PCI_0DAC_CS_3_BANK_SIZE 0xe1c
-#define PCI_1DAC_CS_3_BANK_SIZE 0xe9c
-#define PCI_0DAC_BOOTCS_BANK_SIZE 0xe20
-#define PCI_1DAC_BOOTCS_BANK_SIZE 0xea0
-
-#define PCI_0DAC_P2P_MEM0_BAR_SIZE 0xe24
-#define PCI_1DAC_P2P_MEM0_BAR_SIZE 0xea4
-#define PCI_0DAC_P2P_MEM1_BAR_SIZE 0xe28
-#define PCI_1DAC_P2P_MEM1_BAR_SIZE 0xea8
-#define PCI_0DAC_CPU_BAR_SIZE 0xe2c
-#define PCI_1DAC_CPU_BAR_SIZE 0xeac
-#define PCI_0EXPANSION_ROM_BAR_SIZE 0xd2c
-#define PCI_1EXPANSION_ROM_BAR_SIZE 0xdac
-#define PCI_0BASE_ADDRESS_REGISTERS_ENABLE 0xc3c
-#define PCI_1BASE_ADDRESS_REGISTERS_ENABLE 0xcbc
-#define PCI_0SCS_0_BASE_ADDRESS_REMAP 0xc48
-#define PCI_1SCS_0_BASE_ADDRESS_REMAP 0xcc8
-#define PCI_0SCS_1_BASE_ADDRESS_REMAP 0xd48
-#define PCI_1SCS_1_BASE_ADDRESS_REMAP 0xdc8
-#define PCI_0SCS_2_BASE_ADDRESS_REMAP 0xc4c
-#define PCI_1SCS_2_BASE_ADDRESS_REMAP 0xccc
-#define PCI_0SCS_3_BASE_ADDRESS_REMAP 0xd4c
-#define PCI_1SCS_3_BASE_ADDRESS_REMAP 0xdcc
-#define PCI_0CS_0_BASE_ADDRESS_REMAP 0xc50
-#define PCI_1CS_0_BASE_ADDRESS_REMAP 0xcd0
-#define PCI_0CS_1_BASE_ADDRESS_REMAP 0xd50
-#define PCI_1CS_1_BASE_ADDRESS_REMAP 0xdd0
-#define PCI_0CS_2_BASE_ADDRESS_REMAP 0xd58
-#define PCI_1CS_2_BASE_ADDRESS_REMAP 0xdd8
-#define PCI_0CS_3_BASE_ADDRESS_REMAP 0xc54
-#define PCI_1CS_3_BASE_ADDRESS_REMAP 0xcd4
-#define PCI_0CS_BOOTCS_BASE_ADDRESS_REMAP 0xd54
-#define PCI_1CS_BOOTCS_BASE_ADDRESS_REMAP 0xdd4
-#define PCI_0P2P_MEM0_BASE_ADDRESS_REMAP_LOW 0xd5c
-#define PCI_1P2P_MEM0_BASE_ADDRESS_REMAP_LOW 0xddc
-#define PCI_0P2P_MEM0_BASE_ADDRESS_REMAP_HIGH 0xd60
-#define PCI_1P2P_MEM0_BASE_ADDRESS_REMAP_HIGH 0xde0
-#define PCI_0P2P_MEM1_BASE_ADDRESS_REMAP_LOW 0xd64
-#define PCI_1P2P_MEM1_BASE_ADDRESS_REMAP_LOW 0xde4
-#define PCI_0P2P_MEM1_BASE_ADDRESS_REMAP_HIGH 0xd68
-#define PCI_1P2P_MEM1_BASE_ADDRESS_REMAP_HIGH 0xde8
-#define PCI_0P2P_I_O_BASE_ADDRESS_REMAP 0xd6c
-#define PCI_1P2P_I_O_BASE_ADDRESS_REMAP 0xdec
-#define PCI_0CPU_BASE_ADDRESS_REMAP 0xd70
-#define PCI_1CPU_BASE_ADDRESS_REMAP 0xdf0
-#define PCI_0DAC_SCS_0_BASE_ADDRESS_REMAP 0xf00
-#define PCI_1DAC_SCS_0_BASE_ADDRESS_REMAP 0xff0
-#define PCI_0DAC_SCS_1_BASE_ADDRESS_REMAP 0xf04
-#define PCI_1DAC_SCS_1_BASE_ADDRESS_REMAP 0xf84
-#define PCI_0DAC_SCS_2_BASE_ADDRESS_REMAP 0xf08
-#define PCI_1DAC_SCS_2_BASE_ADDRESS_REMAP 0xf88
-#define PCI_0DAC_SCS_3_BASE_ADDRESS_REMAP 0xf0c
-#define PCI_1DAC_SCS_3_BASE_ADDRESS_REMAP 0xf8c
-#define PCI_0DAC_CS_0_BASE_ADDRESS_REMAP 0xf10
-#define PCI_1DAC_CS_0_BASE_ADDRESS_REMAP 0xf90
-#define PCI_0DAC_CS_1_BASE_ADDRESS_REMAP 0xf14
-#define PCI_1DAC_CS_1_BASE_ADDRESS_REMAP 0xf94
-#define PCI_0DAC_CS_2_BASE_ADDRESS_REMAP 0xf18
-#define PCI_1DAC_CS_2_BASE_ADDRESS_REMAP 0xf98
-#define PCI_0DAC_CS_3_BASE_ADDRESS_REMAP 0xf1c
-#define PCI_1DAC_CS_3_BASE_ADDRESS_REMAP 0xf9c
-#define PCI_0DAC_BOOTCS_BASE_ADDRESS_REMAP 0xf20
-#define PCI_1DAC_BOOTCS_BASE_ADDRESS_REMAP 0xfa0
-#define PCI_0DAC_P2P_MEM0_BASE_ADDRESS_REMAP_LOW 0xf24
-#define PCI_1DAC_P2P_MEM0_BASE_ADDRESS_REMAP_LOW 0xfa4
-#define PCI_0DAC_P2P_MEM0_BASE_ADDRESS_REMAP_HIGH 0xf28
-#define PCI_1DAC_P2P_MEM0_BASE_ADDRESS_REMAP_HIGH 0xfa8
-#define PCI_0DAC_P2P_MEM1_BASE_ADDRESS_REMAP_LOW 0xf2c
-#define PCI_1DAC_P2P_MEM1_BASE_ADDRESS_REMAP_LOW 0xfac
-#define PCI_0DAC_P2P_MEM1_BASE_ADDRESS_REMAP_HIGH 0xf30
-#define PCI_1DAC_P2P_MEM1_BASE_ADDRESS_REMAP_HIGH 0xfb0
-#define PCI_0DAC_CPU_BASE_ADDRESS_REMAP 0xf34
-#define PCI_1DAC_CPU_BASE_ADDRESS_REMAP 0xfb4
-#define PCI_0EXPANSION_ROM_BASE_ADDRESS_REMAP 0xf38
-#define PCI_1EXPANSION_ROM_BASE_ADDRESS_REMAP 0xfb8
-#define PCI_0ADDRESS_DECODE_CONTROL 0xd3c
-#define PCI_1ADDRESS_DECODE_CONTROL 0xdbc
-
-/****************************************/
-/* PCI Control */
-/****************************************/
-
-#define PCI_0COMMAND 0xc00
-#define PCI_1COMMAND 0xc80
-#define PCI_0MODE 0xd00
-#define PCI_1MODE 0xd80
-#define PCI_0TIMEOUT_RETRY 0xc04
-#define PCI_1TIMEOUT_RETRY 0xc84
-#define PCI_0READ_BUFFER_DISCARD_TIMER 0xd04
-#define PCI_1READ_BUFFER_DISCARD_TIMER 0xd84
-#define MSI_0TRIGGER_TIMER 0xc38
-#define MSI_1TRIGGER_TIMER 0xcb8
-#define PCI_0ARBITER_CONTROL 0x1d00
-#define PCI_1ARBITER_CONTROL 0x1d80
-/* changing untill here */
-#define PCI_0CROSS_BAR_CONTROL_LOW 0x1d08
-#define PCI_0CROSS_BAR_CONTROL_HIGH 0x1d0c
-#define PCI_0CROSS_BAR_TIMEOUT 0x1d04
-#define PCI_0READ_RESPONSE_CROSS_BAR_CONTROL_LOW 0x1d18
-#define PCI_0READ_RESPONSE_CROSS_BAR_CONTROL_HIGH 0x1d1c
-#define PCI_0SYNC_BARRIER_VIRTUAL_REGISTER 0x1d10
-#define PCI_0P2P_CONFIGURATION 0x1d14
-#define PCI_0ACCESS_CONTROL_BASE_0_LOW 0x1e00
-#define PCI_0ACCESS_CONTROL_BASE_0_HIGH 0x1e04
-#define PCI_0ACCESS_CONTROL_TOP_0 0x1e08
-#define PCI_0ACCESS_CONTROL_BASE_1_LOW 0x1e10
-#define PCI_0ACCESS_CONTROL_BASE_1_HIGH 0x1e14
-#define PCI_0ACCESS_CONTROL_TOP_1 0x1e18
-#define PCI_0ACCESS_CONTROL_BASE_2_LOW 0x1e20
-#define PCI_0ACCESS_CONTROL_BASE_2_HIGH 0x1e24
-#define PCI_0ACCESS_CONTROL_TOP_2 0x1e28
-#define PCI_0ACCESS_CONTROL_BASE_3_LOW 0x1e30
-#define PCI_0ACCESS_CONTROL_BASE_3_HIGH 0x1e34
-#define PCI_0ACCESS_CONTROL_TOP_3 0x1e38
-#define PCI_0ACCESS_CONTROL_BASE_4_LOW 0x1e40
-#define PCI_0ACCESS_CONTROL_BASE_4_HIGH 0x1e44
-#define PCI_0ACCESS_CONTROL_TOP_4 0x1e48
-#define PCI_0ACCESS_CONTROL_BASE_5_LOW 0x1e50
-#define PCI_0ACCESS_CONTROL_BASE_5_HIGH 0x1e54
-#define PCI_0ACCESS_CONTROL_TOP_5 0x1e58
-#define PCI_0ACCESS_CONTROL_BASE_6_LOW 0x1e60
-#define PCI_0ACCESS_CONTROL_BASE_6_HIGH 0x1e64
-#define PCI_0ACCESS_CONTROL_TOP_6 0x1e68
-#define PCI_0ACCESS_CONTROL_BASE_7_LOW 0x1e70
-#define PCI_0ACCESS_CONTROL_BASE_7_HIGH 0x1e74
-#define PCI_0ACCESS_CONTROL_TOP_7 0x1e78
-#define PCI_1CROSS_BAR_CONTROL_LOW 0x1d88
-#define PCI_1CROSS_BAR_CONTROL_HIGH 0x1d8c
-#define PCI_1CROSS_BAR_TIMEOUT 0x1d84
-#define PCI_1READ_RESPONSE_CROSS_BAR_CONTROL_LOW 0x1d98
-#define PCI_1READ_RESPONSE_CROSS_BAR_CONTROL_HIGH 0x1d9c
-#define PCI_1SYNC_BARRIER_VIRTUAL_REGISTER 0x1d90
-#define PCI_1P2P_CONFIGURATION 0x1d94
-#define PCI_1ACCESS_CONTROL_BASE_0_LOW 0x1e80
-#define PCI_1ACCESS_CONTROL_BASE_0_HIGH 0x1e84
-#define PCI_1ACCESS_CONTROL_TOP_0 0x1e88
-#define PCI_1ACCESS_CONTROL_BASE_1_LOW 0x1e90
-#define PCI_1ACCESS_CONTROL_BASE_1_HIGH 0x1e94
-#define PCI_1ACCESS_CONTROL_TOP_1 0x1e98
-#define PCI_1ACCESS_CONTROL_BASE_2_LOW 0x1ea0
-#define PCI_1ACCESS_CONTROL_BASE_2_HIGH 0x1ea4
-#define PCI_1ACCESS_CONTROL_TOP_2 0x1ea8
-#define PCI_1ACCESS_CONTROL_BASE_3_LOW 0x1eb0
-#define PCI_1ACCESS_CONTROL_BASE_3_HIGH 0x1eb4
-#define PCI_1ACCESS_CONTROL_TOP_3 0x1eb8
-#define PCI_1ACCESS_CONTROL_BASE_4_LOW 0x1ec0
-#define PCI_1ACCESS_CONTROL_BASE_4_HIGH 0x1ec4
-#define PCI_1ACCESS_CONTROL_TOP_4 0x1ec8
-#define PCI_1ACCESS_CONTROL_BASE_5_LOW 0x1ed0
-#define PCI_1ACCESS_CONTROL_BASE_5_HIGH 0x1ed4
-#define PCI_1ACCESS_CONTROL_TOP_5 0x1ed8
-#define PCI_1ACCESS_CONTROL_BASE_6_LOW 0x1ee0
-#define PCI_1ACCESS_CONTROL_BASE_6_HIGH 0x1ee4
-#define PCI_1ACCESS_CONTROL_TOP_6 0x1ee8
-#define PCI_1ACCESS_CONTROL_BASE_7_LOW 0x1ef0
-#define PCI_1ACCESS_CONTROL_BASE_7_HIGH 0x1ef4
-#define PCI_1ACCESS_CONTROL_TOP_7 0x1ef8
-
-/****************************************/
-/* PCI Snoop Control */
-/****************************************/
-
-#define PCI_0SNOOP_CONTROL_BASE_0_LOW 0x1f00
-#define PCI_0SNOOP_CONTROL_BASE_0_HIGH 0x1f04
-#define PCI_0SNOOP_CONTROL_TOP_0 0x1f08
-#define PCI_0SNOOP_CONTROL_BASE_1_0_LOW 0x1f10
-#define PCI_0SNOOP_CONTROL_BASE_1_0_HIGH 0x1f14
-#define PCI_0SNOOP_CONTROL_TOP_1 0x1f18
-#define PCI_0SNOOP_CONTROL_BASE_2_0_LOW 0x1f20
-#define PCI_0SNOOP_CONTROL_BASE_2_0_HIGH 0x1f24
-#define PCI_0SNOOP_CONTROL_TOP_2 0x1f28
-#define PCI_0SNOOP_CONTROL_BASE_3_0_LOW 0x1f30
-#define PCI_0SNOOP_CONTROL_BASE_3_0_HIGH 0x1f34
-#define PCI_0SNOOP_CONTROL_TOP_3 0x1f38
-#define PCI_1SNOOP_CONTROL_BASE_0_LOW 0x1f80
-#define PCI_1SNOOP_CONTROL_BASE_0_HIGH 0x1f84
-#define PCI_1SNOOP_CONTROL_TOP_0 0x1f88
-#define PCI_1SNOOP_CONTROL_BASE_1_0_LOW 0x1f90
-#define PCI_1SNOOP_CONTROL_BASE_1_0_HIGH 0x1f94
-#define PCI_1SNOOP_CONTROL_TOP_1 0x1f98
-#define PCI_1SNOOP_CONTROL_BASE_2_0_LOW 0x1fa0
-#define PCI_1SNOOP_CONTROL_BASE_2_0_HIGH 0x1fa4
-#define PCI_1SNOOP_CONTROL_TOP_2 0x1fa8
-#define PCI_1SNOOP_CONTROL_BASE_3_0_LOW 0x1fb0
-#define PCI_1SNOOP_CONTROL_BASE_3_0_HIGH 0x1fb4
-#define PCI_1SNOOP_CONTROL_TOP_3 0x1fb8
-
-/****************************************/
-/* PCI Configuration Address */
-/****************************************/
-
-#define PCI_0CONFIGURATION_ADDRESS 0xcf8
-#define PCI_0CONFIGURATION_DATA_VIRTUAL_REGISTER 0xcfc
-#define PCI_1CONFIGURATION_ADDRESS 0xc78
-#define PCI_1CONFIGURATION_DATA_VIRTUAL_REGISTER 0xc7c
-#define PCI_0INTERRUPT_ACKNOWLEDGE_VIRTUAL_REGISTER 0xc34
-#define PCI_1INTERRUPT_ACKNOWLEDGE_VIRTUAL_REGISTER 0xcb4
-
-/****************************************/
-/* PCI Error Report */
-/****************************************/
-
-#define PCI_0SERR_MASK 0xc28
-#define PCI_0ERROR_ADDRESS_LOW 0x1d40
-#define PCI_0ERROR_ADDRESS_HIGH 0x1d44
-#define PCI_0ERROR_DATA_LOW 0x1d48
-#define PCI_0ERROR_DATA_HIGH 0x1d4c
-#define PCI_0ERROR_COMMAND 0x1d50
-#define PCI_0ERROR_CAUSE 0x1d58
-#define PCI_0ERROR_MASK 0x1d5c
-#define PCI_1SERR_MASK 0xca8
-#define PCI_1ERROR_ADDRESS_LOW 0x1dc0
-#define PCI_1ERROR_ADDRESS_HIGH 0x1dc4
-#define PCI_1ERROR_DATA_LOW 0x1dc8
-#define PCI_1ERROR_DATA_HIGH 0x1dcc
-#define PCI_1ERROR_COMMAND 0x1dd0
-#define PCI_1ERROR_CAUSE 0x1dd8
-#define PCI_1ERROR_MASK 0x1ddc
-
-
-/****************************************/
-/* Lslave Debug (for internal use) */
-/****************************************/
-
-#define L_SLAVE_X0_ADDRESS 0x1d20
-#define L_SLAVE_X0_COMMAND_AND_ID 0x1d24
-#define L_SLAVE_X1_ADDRESS 0x1d28
-#define L_SLAVE_X1_COMMAND_AND_ID 0x1d2c
-#define L_SLAVE_WRITE_DATA_LOW 0x1d30
-#define L_SLAVE_WRITE_DATA_HIGH 0x1d34
-#define L_SLAVE_WRITE_BYTE_ENABLE 0x1d60
-#define L_SLAVE_READ_DATA_LOW 0x1d38
-#define L_SLAVE_READ_DATA_HIGH 0x1d3c
-#define L_SLAVE_READ_ID 0x1d64
-
-/****************************************/
-/* PCI Configuration Function 0 */
-/****************************************/
-
-#define PCI_DEVICE_AND_VENDOR_ID 0x000
-#define PCI_STATUS_AND_COMMAND 0x004
-#define PCI_CLASS_CODE_AND_REVISION_ID 0x008
-#define PCI_BIST_HEADER_TYPE_LATENCY_TIMER_CACHE_LINE 0x00C
-#define PCI_SCS_0_BASE_ADDRESS 0x010
-#define PCI_SCS_1_BASE_ADDRESS 0x014
-#define PCI_SCS_2_BASE_ADDRESS 0x018
-#define PCI_SCS_3_BASE_ADDRESS 0x01C
-#define PCI_INTERNAL_REGISTERS_MEMORY_MAPPED_BASE_ADDRESS 0x020
-#define PCI_INTERNAL_REGISTERS_I_OMAPPED_BASE_ADDRESS 0x024
-#define PCI_SUBSYSTEM_ID_AND_SUBSYSTEM_VENDOR_ID 0x02C
-#define PCI_EXPANSION_ROM_BASE_ADDRESS_REGISTER 0x030
-#define PCI_CAPABILTY_LIST_POINTER 0x034
-#define PCI_INTERRUPT_PIN_AND_LINE 0x03C
-#define PCI_POWER_MANAGEMENT_CAPABILITY 0x040
-#define PCI_POWER_MANAGEMENT_STATUS_AND_CONTROL 0x044
-#define PCI_VPD_ADDRESS 0x048
-#define PCI_VPD_DATA 0x04c
-#define PCI_MSI_MESSAGE_CONTROL 0x050
-#define PCI_MSI_MESSAGE_ADDRESS 0x054
-#define PCI_MSI_MESSAGE_UPPER_ADDRESS 0x058
-#define PCI_MSI_MESSAGE_DATA 0x05c
-#define PCI_COMPACT_PCI_HOT_SWAP_CAPABILITY 0x058
-
-/****************************************/
-/* PCI Configuration Function 1 */
-/****************************************/
-
-#define PCI_CS_0_BASE_ADDRESS 0x110
-#define PCI_CS_1_BASE_ADDRESS 0x114
-#define PCI_CS_2_BASE_ADDRESS 0x118
-#define PCI_CS_3_BASE_ADDRESS 0x11c
-#define PCI_BOOTCS_BASE_ADDRESS 0x120
-
-/****************************************/
-/* PCI Configuration Function 2 */
-/****************************************/
-
-#define PCI_P2P_MEM0_BASE_ADDRESS 0x210
- /*#define PCI_P2P_MEM1_BASE_ADDRESS 0x2141 */
-#define PCI_P2P_I_O_BASE_ADDRESS 0x218
- /*#define PCI_CPU_BASE_ADDRESS 0x21c1 */
-
-/****************************************/
-/* PCI Configuration Function 4 */
-/****************************************/
-
-#define PCI_DAC_SCS_0_BASE_ADDRESS_LOW 0x410
-#define PCI_DAC_SCS_0_BASE_ADDRESS_HIGH 0x414
-#define PCI_DAC_SCS_1_BASE_ADDRESS_LOW 0x418
-#define PCI_DAC_SCS_1_BASE_ADDRESS_HIGH 0x41c
-#define PCI_DAC_P2P_MEM0_BASE_ADDRESS_LOW 0x420
-#define PCI_DAC_P2P_MEM0_BASE_ADDRESS_HIGH 0x424
-
-
-/****************************************/
-/* PCI Configuration Function 5 */
-/****************************************/
-
-#define PCI_DAC_SCS_2_BASE_ADDRESS_LOW 0x510
-#define PCI_DAC_SCS_2_BASE_ADDRESS_HIGH 0x514
-#define PCI_DAC_SCS_3_BASE_ADDRESS_LOW 0x518
-#define PCI_DAC_SCS_3_BASE_ADDRESS_HIGH 0x51c
-#define PCI_DAC_P2P_MEM1_BASE_ADDRESS_LOW 0x520
-#define PCI_DAC_P2P_MEM1_BASE_ADDRESS_HIGH 0x524
-
-
-/****************************************/
-/* PCI Configuration Function 6 */
-/****************************************/
-
-#define PCI_DAC_CS_0_BASE_ADDRESS_LOW 0x610
-#define PCI_DAC_CS_0_BASE_ADDRESS_HIGH 0x614
-#define PCI_DAC_CS_1_BASE_ADDRESS_LOW 0x618
-#define PCI_DAC_CS_1_BASE_ADDRESS_HIGH 0x61c
-#define PCI_DAC_CS_2_BASE_ADDRESS_LOW 0x620
-#define PCI_DAC_CS_2_BASE_ADDRESS_HIGH 0x624
-
-/****************************************/
-/* PCI Configuration Function 7 */
-/****************************************/
-
-#define PCI_DAC_CS_3_BASE_ADDRESS_LOW 0x710
-#define PCI_DAC_CS_3_BASE_ADDRESS_HIGH 0x714
-#define PCI_DAC_BOOTCS_BASE_ADDRESS_LOW 0x718
-#define PCI_DAC_BOOTCS_BASE_ADDRESS_HIGH 0x71c
-#define PCI_DAC_CPU_BASE_ADDRESS_LOW 0x720
-#define PCI_DAC_CPU_BASE_ADDRESS_HIGH 0x724
-
-/****************************** MV64360 and MV64460 PCI ***************************/
-/***********************************/
-/* PCI Control Register Map */
-/***********************************/
-
-#define PCI_0_DLL_STATUS_AND_COMMAND 0x1d20
-#define PCI_1_DLL_STATUS_AND_COMMAND 0x1da0
-#define PCI_0_MPP_PADS_DRIVE_CONTROL 0x1d1C
-#define PCI_1_MPP_PADS_DRIVE_CONTROL 0x1d9C
-#define PCI_0_COMMAND 0xc00
-#define PCI_1_COMMAND 0xc80
-#define PCI_0_MODE 0xd00
-#define PCI_1_MODE 0xd80
-#define PCI_0_RETRY 0xc04
-#define PCI_1_RETRY 0xc84
-#define PCI_0_READ_BUFFER_DISCARD_TIMER 0xd04
-#define PCI_1_READ_BUFFER_DISCARD_TIMER 0xd84
-#define PCI_0_MSI_TRIGGER_TIMER 0xc38
-#define PCI_1_MSI_TRIGGER_TIMER 0xcb8
-#define PCI_0_ARBITER_CONTROL 0x1d00
-#define PCI_1_ARBITER_CONTROL 0x1d80
-#define PCI_0_CROSS_BAR_CONTROL_LOW 0x1d08
-#define PCI_1_CROSS_BAR_CONTROL_LOW 0x1d88
-#define PCI_0_CROSS_BAR_CONTROL_HIGH 0x1d0c
-#define PCI_1_CROSS_BAR_CONTROL_HIGH 0x1d8c
-#define PCI_0_CROSS_BAR_TIMEOUT 0x1d04
-#define PCI_1_CROSS_BAR_TIMEOUT 0x1d84
-#define PCI_0_SYNC_BARRIER_TRIGGER_REG 0x1D18
-#define PCI_1_SYNC_BARRIER_TRIGGER_REG 0x1D98
-#define PCI_0_SYNC_BARRIER_VIRTUAL_REG 0x1d10
-#define PCI_1_SYNC_BARRIER_VIRTUAL_REG 0x1d90
-#define PCI_0_P2P_CONFIG 0x1d14
-#define PCI_1_P2P_CONFIG 0x1d94
-
-#define PCI_0_ACCESS_CONTROL_BASE_0_LOW 0x1e00
-#define PCI_0_ACCESS_CONTROL_BASE_0_HIGH 0x1e04
-#define PCI_0_ACCESS_CONTROL_SIZE_0 0x1e08
-#define PCI_0_ACCESS_CONTROL_BASE_1_LOW 0x1e10
-#define PCI_0_ACCESS_CONTROL_BASE_1_HIGH 0x1e14
-#define PCI_0_ACCESS_CONTROL_SIZE_1 0x1e18
-#define PCI_0_ACCESS_CONTROL_BASE_2_LOW 0x1e20
-#define PCI_0_ACCESS_CONTROL_BASE_2_HIGH 0x1e24
-#define PCI_0_ACCESS_CONTROL_SIZE_2 0x1e28
-#define PCI_0_ACCESS_CONTROL_BASE_3_LOW 0x1e30
-#define PCI_0_ACCESS_CONTROL_BASE_3_HIGH 0x1e34
-#define PCI_0_ACCESS_CONTROL_SIZE_3 0x1e38
-#define PCI_0_ACCESS_CONTROL_BASE_4_LOW 0x1e40
-#define PCI_0_ACCESS_CONTROL_BASE_4_HIGH 0x1e44
-#define PCI_0_ACCESS_CONTROL_SIZE_4 0x1e48
-#define PCI_0_ACCESS_CONTROL_BASE_5_LOW 0x1e50
-#define PCI_0_ACCESS_CONTROL_BASE_5_HIGH 0x1e54
-#define PCI_0_ACCESS_CONTROL_SIZE_5 0x1e58
-
-#define PCI_1_ACCESS_CONTROL_BASE_0_LOW 0x1e80
-#define PCI_1_ACCESS_CONTROL_BASE_0_HIGH 0x1e84
-#define PCI_1_ACCESS_CONTROL_SIZE_0 0x1e88
-#define PCI_1_ACCESS_CONTROL_BASE_1_LOW 0x1e90
-#define PCI_1_ACCESS_CONTROL_BASE_1_HIGH 0x1e94
-#define PCI_1_ACCESS_CONTROL_SIZE_1 0x1e98
-#define PCI_1_ACCESS_CONTROL_BASE_2_LOW 0x1ea0
-#define PCI_1_ACCESS_CONTROL_BASE_2_HIGH 0x1ea4
-#define PCI_1_ACCESS_CONTROL_SIZE_2 0x1ea8
-#define PCI_1_ACCESS_CONTROL_BASE_3_LOW 0x1eb0
-#define PCI_1_ACCESS_CONTROL_BASE_3_HIGH 0x1eb4
-#define PCI_1_ACCESS_CONTROL_SIZE_3 0x1eb8
-#define PCI_1_ACCESS_CONTROL_BASE_4_LOW 0x1ec0
-#define PCI_1_ACCESS_CONTROL_BASE_4_HIGH 0x1ec4
-#define PCI_1_ACCESS_CONTROL_SIZE_4 0x1ec8
-#define PCI_1_ACCESS_CONTROL_BASE_5_LOW 0x1ed0
-#define PCI_1_ACCESS_CONTROL_BASE_5_HIGH 0x1ed4
-#define PCI_1_ACCESS_CONTROL_SIZE_5 0x1ed8
-
-/****************************************/
-/* PCI Configuration Access Registers */
-/****************************************/
-
-#define PCI_0_CONFIG_ADDR 0xcf8
-#define PCI_0_CONFIG_DATA_VIRTUAL_REG 0xcfc
-#define PCI_1_CONFIG_ADDR 0xc78
-#define PCI_1_CONFIG_DATA_VIRTUAL_REG 0xc7c
-#define PCI_0_INTERRUPT_ACKNOWLEDGE_VIRTUAL_REG 0xc34
-#define PCI_1_INTERRUPT_ACKNOWLEDGE_VIRTUAL_REG 0xcb4
-
-/****************************************/
-/* PCI Error Report Registers */
-/****************************************/
-
-#define PCI_0_SERR_MASK 0xc28
-#define PCI_1_SERR_MASK 0xca8
-#define PCI_0_ERROR_ADDR_LOW 0x1d40
-#define PCI_1_ERROR_ADDR_LOW 0x1dc0
-#define PCI_0_ERROR_ADDR_HIGH 0x1d44
-#define PCI_1_ERROR_ADDR_HIGH 0x1dc4
-#define PCI_0_ERROR_ATTRIBUTE 0x1d48
-#define PCI_1_ERROR_ATTRIBUTE 0x1dc8
-#define PCI_0_ERROR_COMMAND 0x1d50
-#define PCI_1_ERROR_COMMAND 0x1dd0
-#define PCI_0_ERROR_CAUSE 0x1d58
-#define PCI_1_ERROR_CAUSE 0x1dd8
-#define PCI_0_ERROR_MASK 0x1d5c
-#define PCI_1_ERROR_MASK 0x1ddc
-
-/****************************************/
-/* PCI Debug Registers */
-/****************************************/
-
-#define PCI_0_MMASK 0X1D24
-#define PCI_1_MMASK 0X1DA4
-
-/*********************************************/
-/* PCI Configuration, Function 0, Registers */
-/*********************************************/
-
-#define PCI_DEVICE_AND_VENDOR_ID 0x000
-#define PCI_STATUS_AND_COMMAND 0x004
-#define PCI_CLASS_CODE_AND_REVISION_ID 0x008
-#define PCI_BIST_HEADER_TYPE_LATENCY_TIMER_CACHE_LINE 0x00C
-
-#define PCI_SCS_0_BASE_ADDR_LOW 0x010
-#define PCI_SCS_0_BASE_ADDR_HIGH 0x014
-#define PCI_SCS_1_BASE_ADDR_LOW 0x018
-#define PCI_SCS_1_BASE_ADDR_HIGH 0x01C
-#define PCI_INTERNAL_REG_MEM_MAPPED_BASE_ADDR_LOW 0x020
-#define PCI_INTERNAL_REG_MEM_MAPPED_BASE_ADDR_HIGH 0x024
- /*#define PCI_SUBSYSTEM_ID_AND_SUBSYSTEM_VENDOR_ID 0x02c1 */
-#define PCI_EXPANSION_ROM_BASE_ADDR_REG 0x030
-#define PCI_CAPABILTY_LIST_POINTER 0x034
-#define PCI_INTERRUPT_PIN_AND_LINE 0x03C
- /* capability list */
-#define PCI_POWER_MANAGEMENT_CAPABILITY 0x040
-#define PCI_POWER_MANAGEMENT_STATUS_AND_CONTROL 0x044
-#define PCI_VPD_ADDR 0x048
-#define PCI_VPD_DATA 0x04c
-#define PCI_MSI_MESSAGE_CONTROL 0x050
-#define PCI_MSI_MESSAGE_ADDR 0x054
-#define PCI_MSI_MESSAGE_UPPER_ADDR 0x058
-#define PCI_MSI_MESSAGE_DATA 0x05c
-#define PCI_X_COMMAND 0x060
-#define PCI_X_STATUS 0x064
-#define PCI_COMPACT_PCI_HOT_SWAP 0x068
-
-/***********************************************/
-/* PCI Configuration, Function 1, Registers */
-/***********************************************/
-
-#define PCI_SCS_2_BASE_ADDR_LOW 0x110
-#define PCI_SCS_2_BASE_ADDR_HIGH 0x114
-#define PCI_SCS_3_BASE_ADDR_LOW 0x118
-#define PCI_SCS_3_BASE_ADDR_HIGH 0x11c
-#define PCI_INTERNAL_SRAM_BASE_ADDR_LOW 0x120
-#define PCI_INTERNAL_SRAM_BASE_ADDR_HIGH 0x124
-
-/***********************************************/
-/* PCI Configuration, Function 2, Registers */
-/***********************************************/
-
-#define PCI_DEVCS_0_BASE_ADDR_LOW 0x210
-#define PCI_DEVCS_0_BASE_ADDR_HIGH 0x214
-#define PCI_DEVCS_1_BASE_ADDR_LOW 0x218
-#define PCI_DEVCS_1_BASE_ADDR_HIGH 0x21c
-#define PCI_DEVCS_2_BASE_ADDR_LOW 0x220
-#define PCI_DEVCS_2_BASE_ADDR_HIGH 0x224
-
-/***********************************************/
-/* PCI Configuration, Function 3, Registers */
-/***********************************************/
-
-#define PCI_DEVCS_3_BASE_ADDR_LOW 0x310
-#define PCI_DEVCS_3_BASE_ADDR_HIGH 0x314
-#define PCI_BOOT_CS_BASE_ADDR_LOW 0x318
-#define PCI_BOOT_CS_BASE_ADDR_HIGH 0x31c
-#define PCI_CPU_BASE_ADDR_LOW 0x220
-#define PCI_CPU_BASE_ADDR_HIGH 0x224
-
-/***********************************************/
-/* PCI Configuration, Function 4, Registers */
-/***********************************************/
-
-#define PCI_P2P_MEM0_BASE_ADDR_LOW 0x410
-#define PCI_P2P_MEM0_BASE_ADDR_HIGH 0x414
-#define PCI_P2P_MEM1_BASE_ADDR_LOW 0x418
-#define PCI_P2P_MEM1_BASE_ADDR_HIGH 0x41c
-#define PCI_P2P_I_O_BASE_ADDR 0x420
-#define PCI_INTERNAL_REGS_I_O_MAPPED_BASE_ADDR 0x424
-
-/****************************** MV64360 and MV64460 PCI End ***************************/
-/****************************************/
-/* I20 Support registers */
-/****************************************/
-
-#define INBOUND_MESSAGE_REGISTER0_PCI_SIDE 0x010
-#define INBOUND_MESSAGE_REGISTER1_PCI_SIDE 0x014
-#define OUTBOUND_MESSAGE_REGISTER0_PCI_SIDE 0x018
-#define OUTBOUND_MESSAGE_REGISTER1_PCI_SIDE 0x01C
-#define INBOUND_DOORBELL_REGISTER_PCI_SIDE 0x020
-#define INBOUND_INTERRUPT_CAUSE_REGISTER_PCI_SIDE 0x024
-#define INBOUND_INTERRUPT_MASK_REGISTER_PCI_SIDE 0x028
-#define OUTBOUND_DOORBELL_REGISTER_PCI_SIDE 0x02C
-#define OUTBOUND_INTERRUPT_CAUSE_REGISTER_PCI_SIDE 0x030
-#define OUTBOUND_INTERRUPT_MASK_REGISTER_PCI_SIDE 0x034
-#define INBOUND_QUEUE_PORT_VIRTUAL_REGISTER_PCI_SIDE 0x040
-#define OUTBOUND_QUEUE_PORT_VIRTUAL_REGISTER_PCI_SIDE 0x044
-#define QUEUE_CONTROL_REGISTER_PCI_SIDE 0x050
-#define QUEUE_BASE_ADDRESS_REGISTER_PCI_SIDE 0x054
-#define INBOUND_FREE_HEAD_POINTER_REGISTER_PCI_SIDE 0x060
-#define INBOUND_FREE_TAIL_POINTER_REGISTER_PCI_SIDE 0x064
-#define INBOUND_POST_HEAD_POINTER_REGISTER_PCI_SIDE 0x068
-#define INBOUND_POST_TAIL_POINTER_REGISTER_PCI_SIDE 0x06C
-#define OUTBOUND_FREE_HEAD_POINTER_REGISTER_PCI_SIDE 0x070
-#define OUTBOUND_FREE_TAIL_POINTER_REGISTER_PCI_SIDE 0x074
-#define OUTBOUND_POST_HEAD_POINTER_REGISTER_PCI_SIDE 0x078
-#define OUTBOUND_POST_TAIL_POINTER_REGISTER_PCI_SIDE 0x07C
-
-#define INBOUND_MESSAGE_REGISTER0_CPU_SIDE 0x1C10
-#define INBOUND_MESSAGE_REGISTER1_CPU_SIDE 0x1C14
-#define OUTBOUND_MESSAGE_REGISTER0_CPU_SIDE 0x1C18
-#define OUTBOUND_MESSAGE_REGISTER1_CPU_SIDE 0x1C1C
-#define INBOUND_DOORBELL_REGISTER_CPU_SIDE 0x1C20
-#define INBOUND_INTERRUPT_CAUSE_REGISTER_CPU_SIDE 0x1C24
-#define INBOUND_INTERRUPT_MASK_REGISTER_CPU_SIDE 0x1C28
-#define OUTBOUND_DOORBELL_REGISTER_CPU_SIDE 0x1C2C
-#define OUTBOUND_INTERRUPT_CAUSE_REGISTER_CPU_SIDE 0x1C30
-#define OUTBOUND_INTERRUPT_MASK_REGISTER_CPU_SIDE 0x1C34
-#define INBOUND_QUEUE_PORT_VIRTUAL_REGISTER_CPU_SIDE 0x1C40
-#define OUTBOUND_QUEUE_PORT_VIRTUAL_REGISTER_CPU_SIDE 0x1C44
-#define QUEUE_CONTROL_REGISTER_CPU_SIDE 0x1C50
-#define QUEUE_BASE_ADDRESS_REGISTER_CPU_SIDE 0x1C54
-#define INBOUND_FREE_HEAD_POINTER_REGISTER_CPU_SIDE 0x1C60
-#define INBOUND_FREE_TAIL_POINTER_REGISTER_CPU_SIDE 0x1C64
-#define INBOUND_POST_HEAD_POINTER_REGISTER_CPU_SIDE 0x1C68
-#define INBOUND_POST_TAIL_POINTER_REGISTER_CPU_SIDE 0x1C6C
-#define OUTBOUND_FREE_HEAD_POINTER_REGISTER_CPU_SIDE 0x1C70
-#define OUTBOUND_FREE_TAIL_POINTER_REGISTER_CPU_SIDE 0x1C74
-#define OUTBOUND_POST_HEAD_POINTER_REGISTER_CPU_SIDE 0x1C78
-#define OUTBOUND_POST_TAIL_POINTER_REGISTER_CPU_SIDE 0x1C7C
-
-
-/****************************************/
-/* Messaging Unit Registers (I20) */
-/****************************************/
-
-#define I2O_INBOUND_MESSAGE_REG0_PCI_0_SIDE 0x010
-#define I2O_INBOUND_MESSAGE_REG1_PCI_0_SIDE 0x014
-#define I2O_OUTBOUND_MESSAGE_REG0_PCI_0_SIDE 0x018
-#define I2O_OUTBOUND_MESSAGE_REG1_PCI_0_SIDE 0x01C
-#define I2O_INBOUND_DOORBELL_REG_PCI_0_SIDE 0x020
-#define I2O_INBOUND_INTERRUPT_CAUSE_REG_PCI_0_SIDE 0x024
-#define I2O_INBOUND_INTERRUPT_MASK_REG_PCI_0_SIDE 0x028
-#define I2O_OUTBOUND_DOORBELL_REG_PCI_0_SIDE 0x02C
-#define I2O_OUTBOUND_INTERRUPT_CAUSE_REG_PCI_0_SIDE 0x030
-#define I2O_OUTBOUND_INTERRUPT_MASK_REG_PCI_0_SIDE 0x034
-#define I2O_INBOUND_QUEUE_PORT_VIRTUAL_REG_PCI_0_SIDE 0x040
-#define I2O_OUTBOUND_QUEUE_PORT_VIRTUAL_REG_PCI_0_SIDE 0x044
-#define I2O_QUEUE_CONTROL_REG_PCI_0_SIDE 0x050
-#define I2O_QUEUE_BASE_ADDR_REG_PCI_0_SIDE 0x054
-#define I2O_INBOUND_FREE_HEAD_POINTER_REG_PCI_0_SIDE 0x060
-#define I2O_INBOUND_FREE_TAIL_POINTER_REG_PCI_0_SIDE 0x064
-#define I2O_INBOUND_POST_HEAD_POINTER_REG_PCI_0_SIDE 0x068
-#define I2O_INBOUND_POST_TAIL_POINTER_REG_PCI_0_SIDE 0x06C
-#define I2O_OUTBOUND_FREE_HEAD_POINTER_REG_PCI_0_SIDE 0x070
-#define I2O_OUTBOUND_FREE_TAIL_POINTER_REG_PCI_0_SIDE 0x074
-#define I2O_OUTBOUND_POST_HEAD_POINTER_REG_PCI_0_SIDE 0x0F8
-#define I2O_OUTBOUND_POST_TAIL_POINTER_REG_PCI_0_SIDE 0x0FC
-
-#define I2O_INBOUND_MESSAGE_REG0_PCI_1_SIDE 0x090
-#define I2O_INBOUND_MESSAGE_REG1_PCI_1_SIDE 0x094
-#define I2O_OUTBOUND_MESSAGE_REG0_PCI_1_SIDE 0x098
-#define I2O_OUTBOUND_MESSAGE_REG1_PCI_1_SIDE 0x09C
-#define I2O_INBOUND_DOORBELL_REG_PCI_1_SIDE 0x0A0
-#define I2O_INBOUND_INTERRUPT_CAUSE_REG_PCI_1_SIDE 0x0A4
-#define I2O_INBOUND_INTERRUPT_MASK_REG_PCI_1_SIDE 0x0A8
-#define I2O_OUTBOUND_DOORBELL_REG_PCI_1_SIDE 0x0AC
-#define I2O_OUTBOUND_INTERRUPT_CAUSE_REG_PCI_1_SIDE 0x0B0
-#define I2O_OUTBOUND_INTERRUPT_MASK_REG_PCI_1_SIDE 0x0B4
-#define I2O_INBOUND_QUEUE_PORT_VIRTUAL_REG_PCI_1_SIDE 0x0C0
-#define I2O_OUTBOUND_QUEUE_PORT_VIRTUAL_REG_PCI_1_SIDE 0x0C4
-#define I2O_QUEUE_CONTROL_REG_PCI_1_SIDE 0x0D0
-#define I2O_QUEUE_BASE_ADDR_REG_PCI_1_SIDE 0x0D4
-#define I2O_INBOUND_FREE_HEAD_POINTER_REG_PCI_1_SIDE 0x0E0
-#define I2O_INBOUND_FREE_TAIL_POINTER_REG_PCI_1_SIDE 0x0E4
-#define I2O_INBOUND_POST_HEAD_POINTER_REG_PCI_1_SIDE 0x0E8
-#define I2O_INBOUND_POST_TAIL_POINTER_REG_PCI_1_SIDE 0x0EC
-#define I2O_OUTBOUND_FREE_HEAD_POINTER_REG_PCI_1_SIDE 0x0F0
-#define I2O_OUTBOUND_FREE_TAIL_POINTER_REG_PCI_1_SIDE 0x0F4
-#define I2O_OUTBOUND_POST_HEAD_POINTER_REG_PCI_1_SIDE 0x078
-#define I2O_OUTBOUND_POST_TAIL_POINTER_REG_PCI_1_SIDE 0x07C
-
-#define I2O_INBOUND_MESSAGE_REG0_CPU0_SIDE 0x1C10
-#define I2O_INBOUND_MESSAGE_REG1_CPU0_SIDE 0x1C14
-#define I2O_OUTBOUND_MESSAGE_REG0_CPU0_SIDE 0x1C18
-#define I2O_OUTBOUND_MESSAGE_REG1_CPU0_SIDE 0x1C1C
-#define I2O_INBOUND_DOORBELL_REG_CPU0_SIDE 0x1C20
-#define I2O_INBOUND_INTERRUPT_CAUSE_REG_CPU0_SIDE 0x1C24
-#define I2O_INBOUND_INTERRUPT_MASK_REG_CPU0_SIDE 0x1C28
-#define I2O_OUTBOUND_DOORBELL_REG_CPU0_SIDE 0x1C2C
-#define I2O_OUTBOUND_INTERRUPT_CAUSE_REG_CPU0_SIDE 0x1C30
-#define I2O_OUTBOUND_INTERRUPT_MASK_REG_CPU0_SIDE 0x1C34
-#define I2O_INBOUND_QUEUE_PORT_VIRTUAL_REG_CPU0_SIDE 0x1C40
-#define I2O_OUTBOUND_QUEUE_PORT_VIRTUAL_REG_CPU0_SIDE 0x1C44
-#define I2O_QUEUE_CONTROL_REG_CPU0_SIDE 0x1C50
-#define I2O_QUEUE_BASE_ADDR_REG_CPU0_SIDE 0x1C54
-#define I2O_INBOUND_FREE_HEAD_POINTER_REG_CPU0_SIDE 0x1C60
-#define I2O_INBOUND_FREE_TAIL_POINTER_REG_CPU0_SIDE 0x1C64
-#define I2O_INBOUND_POST_HEAD_POINTER_REG_CPU0_SIDE 0x1C68
-#define I2O_INBOUND_POST_TAIL_POINTER_REG_CPU0_SIDE 0x1C6C
-#define I2O_OUTBOUND_FREE_HEAD_POINTER_REG_CPU0_SIDE 0x1C70
-#define I2O_OUTBOUND_FREE_TAIL_POINTER_REG_CPU0_SIDE 0x1C74
-#define I2O_OUTBOUND_POST_HEAD_POINTER_REG_CPU0_SIDE 0x1CF8
-#define I2O_OUTBOUND_POST_TAIL_POINTER_REG_CPU0_SIDE 0x1CFC
-#define I2O_INBOUND_MESSAGE_REG0_CPU1_SIDE 0x1C90
-#define I2O_INBOUND_MESSAGE_REG1_CPU1_SIDE 0x1C94
-#define I2O_OUTBOUND_MESSAGE_REG0_CPU1_SIDE 0x1C98
-#define I2O_OUTBOUND_MESSAGE_REG1_CPU1_SIDE 0x1C9C
-#define I2O_INBOUND_DOORBELL_REG_CPU1_SIDE 0x1CA0
-#define I2O_INBOUND_INTERRUPT_CAUSE_REG_CPU1_SIDE 0x1CA4
-#define I2O_INBOUND_INTERRUPT_MASK_REG_CPU1_SIDE 0x1CA8
-#define I2O_OUTBOUND_DOORBELL_REG_CPU1_SIDE 0x1CAC
-#define I2O_OUTBOUND_INTERRUPT_CAUSE_REG_CPU1_SIDE 0x1CB0
-#define I2O_OUTBOUND_INTERRUPT_MASK_REG_CPU1_SIDE 0x1CB4
-#define I2O_INBOUND_QUEUE_PORT_VIRTUAL_REG_CPU1_SIDE 0x1CC0
-#define I2O_OUTBOUND_QUEUE_PORT_VIRTUAL_REG_CPU1_SIDE 0x1CC4
-#define I2O_QUEUE_CONTROL_REG_CPU1_SIDE 0x1CD0
-#define I2O_QUEUE_BASE_ADDR_REG_CPU1_SIDE 0x1CD4
-#define I2O_INBOUND_FREE_HEAD_POINTER_REG_CPU1_SIDE 0x1CE0
-#define I2O_INBOUND_FREE_TAIL_POINTER_REG_CPU1_SIDE 0x1CE4
-#define I2O_INBOUND_POST_HEAD_POINTER_REG_CPU1_SIDE 0x1CE8
-#define I2O_INBOUND_POST_TAIL_POINTER_REG_CPU1_SIDE 0x1CEC
-#define I2O_OUTBOUND_FREE_HEAD_POINTER_REG_CPU1_SIDE 0x1CF0
-#define I2O_OUTBOUND_FREE_TAIL_POINTER_REG_CPU1_SIDE 0x1CF4
-#define I2O_OUTBOUND_POST_HEAD_POINTER_REG_CPU1_SIDE 0x1C78
-#define I2O_OUTBOUND_POST_TAIL_POINTER_REG_CPU1_SIDE 0x1C7C
-
-
-/****************************************/
-/* Communication Unit Registers */
-/****************************************/
-/*
-#define ETHERNET_0_ADDRESS_CONTROL_LOW 0xf200
-#define ETHERNET_0_ADDRESS_CONTROL_HIGH 0xf204
-#define ETHERNET_0_RECEIVE_BUFFER_PCI_HIGH_ADDRESS 0xf208
-#define ETHERNET_0_TRANSMIT_BUFFER_PCI_HIGH_ADDRESS 0xf20c
-#define ETHERNET_0_RECEIVE_DESCRIPTOR_PCI_HIGH_ADDRESS 0xf210
-#define ETHERNET_0_TRANSMIT_DESCRIPTOR_PCI_HIGH_ADDRESS 0xf214
-#define ETHERNET_0_HASH_TABLE_PCI_HIGH_ADDRESS 0xf218
-#define ETHERNET_1_ADDRESS_CONTROL_LOW 0xf220
-#define ETHERNET_1_ADDRESS_CONTROL_HIGH 0xf224
-#define ETHERNET_1_RECEIVE_BUFFER_PCI_HIGH_ADDRESS 0xf228
-#define ETHERNET_1_TRANSMIT_BUFFER_PCI_HIGH_ADDRESS 0xf22c
-#define ETHERNET_1_RECEIVE_DESCRIPTOR_PCI_HIGH_ADDRESS 0xf230
-#define ETHERNET_1_TRANSMIT_DESCRIPTOR_PCI_HIGH_ADDRESS 0xf234
-#define ETHERNET_1_HASH_TABLE_PCI_HIGH_ADDRESS 0xf238
-#define ETHERNET_2_ADDRESS_CONTROL_LOW 0xf240
-#define ETHERNET_2_ADDRESS_CONTROL_HIGH 0xf244
-#define ETHERNET_2_RECEIVE_BUFFER_PCI_HIGH_ADDRESS 0xf248
-#define ETHERNET_2_TRANSMIT_BUFFER_PCI_HIGH_ADDRESS 0xf24c
-#define ETHERNET_2_RECEIVE_DESCRIPTOR_PCI_HIGH_ADDRESS 0xf250
-#define ETHERNET_2_TRANSMIT_DESCRIPTOR_PCI_HIGH_ADDRESS 0xf254
-#define ETHERNET_2_HASH_TABLE_PCI_HIGH_ADDRESS 0xf258
- */
-#define MPSC_0_ADDRESS_CONTROL_LOW 0xf280
-#define MPSC_0_ADDRESS_CONTROL_HIGH 0xf284
-#define MPSC_0_RECEIVE_BUFFER_PCI_HIGH_ADDRESS 0xf288
-#define MPSC_0_TRANSMIT_BUFFER_PCI_HIGH_ADDRESS 0xf28c
-#define MPSC_0_RECEIVE_DESCRIPTOR_PCI_HIGH_ADDRESS 0xf290
-#define MPSC_0_TRANSMIT_DESCRIPTOR_PCI_HIGH_ADDRESS 0xf294
-#define MPSC_1_ADDRESS_CONTROL_LOW 0xf2c0
-#define MPSC_1_ADDRESS_CONTROL_HIGH 0xf2c4
-#define MPSC_1_RECEIVE_BUFFER_PCI_HIGH_ADDRESS 0xf2c8
-#define MPSC_1_TRANSMIT_BUFFER_PCI_HIGH_ADDRESS 0xf2cc
-#define MPSC_1_RECEIVE_DESCRIPTOR_PCI_HIGH_ADDRESS 0xf2d0
-#define MPSC_1_TRANSMIT_DESCRIPTOR_PCI_HIGH_ADDRESS 0xf2d4
- /*#define SERIAL_INIT_PCI_HIGH_ADDRESS 0xf3201 */
-#define COMM_UNIT_ARBITER_CONTROL 0xf300
-#define COMM_UNIT_CROSS_BAR_TIMEOUT 0xf304
-#define COMM_UNIT_INTERRUPT_CAUSE 0xf310
-#define COMM_UNIT_INTERRUPT_MASK 0xf314
-#define COMM_UNIT_ERROR_ADDRESS 0xf314
-/****************************************/
-/* Serial Initialization registers */
-/****************************************/
-
- /*#define SERIAL_INIT_LAST_DATA 0xf3241 */
- /*#define SERIAL_INIT_STATUS_AND_CONTROL 0xf3281 */
-#define SERIAL_INIT_LAST_DATA 0xf324
-#define SERIAL_INIT_CONTROL 0xf328
-#define SERIAL_INIT_STATUS 0xf32c
-
-
-/****************************************/
-/* Ethernet Unit Registers */
-/****************************************/
-
-#define ETH_PHY_ADDR_REG 0x2000
-#define ETH_SMI_REG 0x2004
-#define ETH_UNIT_DEFAULT_ADDR_REG 0x2008
-#define ETH_UNIT_DEFAULTID_REG 0x200c
-#define ETH_UNIT_INTERRUPT_CAUSE_REG 0x2080
-#define ETH_UNIT_INTERRUPT_MASK_REG 0x2084
-#define ETH_UNIT_INTERNAL_USE_REG 0x24fc
-#define ETH_UNIT_ERROR_ADDR_REG 0x2094
-#define ETH_BAR_0 0x2200
-#define ETH_BAR_1 0x2208
-#define ETH_BAR_2 0x2210
-#define ETH_BAR_3 0x2218
-#define ETH_BAR_4 0x2220
-#define ETH_BAR_5 0x2228
-#define ETH_SIZE_REG_0 0x2204
-#define ETH_SIZE_REG_1 0x220c
-#define ETH_SIZE_REG_2 0x2214
-#define ETH_SIZE_REG_3 0x221c
-#define ETH_SIZE_REG_4 0x2224
-#define ETH_SIZE_REG_5 0x222c
-#define ETH_HEADERS_RETARGET_BASE_REG 0x2230
-#define ETH_HEADERS_RETARGET_CONTROL_REG 0x2234
-#define ETH_HIGH_ADDR_REMAP_REG_0 0x2280
-#define ETH_HIGH_ADDR_REMAP_REG_1 0x2284
-#define ETH_HIGH_ADDR_REMAP_REG_2 0x2288
-#define ETH_HIGH_ADDR_REMAP_REG_3 0x228c
-#define ETH_BASE_ADDR_ENABLE_REG 0x2290
-#define ETH_ACCESS_PROTECTION_REG(port) (0x2294 + (port<<2))
-#define ETH_MIB_COUNTERS_BASE(port) (0x3000 + (port<<7))
-#define ETH_PORT_CONFIG_REG(port) (0x2400 + (port<<10))
-#define ETH_PORT_CONFIG_EXTEND_REG(port) (0x2404 + (port<<10))
-#define ETH_MII_SERIAL_PARAMETRS_REG(port) (0x2408 + (port<<10))
-#define ETH_GMII_SERIAL_PARAMETRS_REG(port) (0x240c + (port<<10))
-#define ETH_VLAN_ETHERTYPE_REG(port) (0x2410 + (port<<10))
-#define ETH_MAC_ADDR_LOW(port) (0x2414 + (port<<10))
-#define ETH_MAC_ADDR_HIGH(port) (0x2418 + (port<<10))
-#define ETH_SDMA_CONFIG_REG(port) (0x241c + (port<<10))
-#define ETH_DSCP_0(port) (0x2420 + (port<<10))
-#define ETH_DSCP_1(port) (0x2424 + (port<<10))
-#define ETH_DSCP_2(port) (0x2428 + (port<<10))
-#define ETH_DSCP_3(port) (0x242c + (port<<10))
-#define ETH_DSCP_4(port) (0x2430 + (port<<10))
-#define ETH_DSCP_5(port) (0x2434 + (port<<10))
-#define ETH_DSCP_6(port) (0x2438 + (port<<10))
-#define ETH_PORT_SERIAL_CONTROL_REG(port) (0x243c + (port<<10))
-#define ETH_VLAN_PRIORITY_TAG_TO_PRIORITY(port) (0x2440 + (port<<10))
-#define ETH_PORT_STATUS_REG(port) (0x2444 + (port<<10))
-#define ETH_TRANSMIT_QUEUE_COMMAND_REG(port) (0x2448 + (port<<10))
-#define ETH_TX_QUEUE_FIXED_PRIORITY(port) (0x244c + (port<<10))
-#define ETH_PORT_TX_TOKEN_BUCKET_RATE_CONFIG(port) (0x2450 + (port<<10))
-#define ETH_MAXIMUM_TRANSMIT_UNIT(port) (0x2458 + (port<<10))
-#define ETH_PORT_MAXIMUM_TOKEN_BUCKET_SIZE(port) (0x245c + (port<<10))
-#define ETH_INTERRUPT_CAUSE_REG(port) (0x2460 + (port<<10))
-#define ETH_INTERRUPT_CAUSE_EXTEND_REG(port) (0x2464 + (port<<10))
-#define ETH_INTERRUPT_MASK_REG(port) (0x2468 + (port<<10))
-#define ETH_INTERRUPT_EXTEND_MASK_REG(port) (0x246c + (port<<10))
-#define ETH_RX_FIFO_URGENT_THRESHOLD_REG(port) (0x2470 + (port<<10))
-#define ETH_TX_FIFO_URGENT_THRESHOLD_REG(port) (0x2474 + (port<<10))
-#define ETH_RX_MINIMAL_FRAME_SIZE_REG(port) (0x247c + (port<<10))
-#define ETH_RX_DISCARDED_FRAMES_COUNTER(port) (0x2484 + (port<<10)
-#define ETH_PORT_DEBUG_0_REG(port) (0x248c + (port<<10))
-#define ETH_PORT_DEBUG_1_REG(port) (0x2490 + (port<<10))
-#define ETH_PORT_INTERNAL_ADDR_ERROR_REG(port) (0x2494 + (port<<10))
-#define ETH_INTERNAL_USE_REG(port) (0x24fc + (port<<10))
-#define ETH_RECEIVE_QUEUE_COMMAND_REG(port) (0x2680 + (port<<10))
-#define ETH_CURRENT_SERVED_TX_DESC_PTR(port) (0x2684 + (port<<10))
-#define ETH_RX_CURRENT_QUEUE_DESC_PTR_0(port) (0x260c + (port<<10))
-#define ETH_RX_CURRENT_QUEUE_DESC_PTR_1(port) (0x261c + (port<<10))
-#define ETH_RX_CURRENT_QUEUE_DESC_PTR_2(port) (0x262c + (port<<10))
-#define ETH_RX_CURRENT_QUEUE_DESC_PTR_3(port) (0x263c + (port<<10))
-#define ETH_RX_CURRENT_QUEUE_DESC_PTR_4(port) (0x264c + (port<<10))
-#define ETH_RX_CURRENT_QUEUE_DESC_PTR_5(port) (0x265c + (port<<10))
-#define ETH_RX_CURRENT_QUEUE_DESC_PTR_6(port) (0x266c + (port<<10))
-#define ETH_RX_CURRENT_QUEUE_DESC_PTR_7(port) (0x267c + (port<<10))
-#define ETH_TX_CURRENT_QUEUE_DESC_PTR_0(port) (0x26c0 + (port<<10))
-#define ETH_TX_CURRENT_QUEUE_DESC_PTR_1(port) (0x26c4 + (port<<10))
-#define ETH_TX_CURRENT_QUEUE_DESC_PTR_2(port) (0x26c8 + (port<<10))
-#define ETH_TX_CURRENT_QUEUE_DESC_PTR_3(port) (0x26cc + (port<<10))
-#define ETH_TX_CURRENT_QUEUE_DESC_PTR_4(port) (0x26d0 + (port<<10))
-#define ETH_TX_CURRENT_QUEUE_DESC_PTR_5(port) (0x26d4 + (port<<10))
-#define ETH_TX_CURRENT_QUEUE_DESC_PTR_6(port) (0x26d8 + (port<<10))
-#define ETH_TX_CURRENT_QUEUE_DESC_PTR_7(port) (0x26dc + (port<<10))
-#define ETH_TX_QUEUE_0_TOKEN_BUCKET_COUNT(port) (0x2700 + (port<<10))
-#define ETH_TX_QUEUE_1_TOKEN_BUCKET_COUNT(port) (0x2710 + (port<<10))
-#define ETH_TX_QUEUE_2_TOKEN_BUCKET_COUNT(port) (0x2720 + (port<<10))
-#define ETH_TX_QUEUE_3_TOKEN_BUCKET_COUNT(port) (0x2730 + (port<<10))
-#define ETH_TX_QUEUE_4_TOKEN_BUCKET_COUNT(port) (0x2740 + (port<<10))
-#define ETH_TX_QUEUE_5_TOKEN_BUCKET_COUNT(port) (0x2750 + (port<<10))
-#define ETH_TX_QUEUE_6_TOKEN_BUCKET_COUNT(port) (0x2760 + (port<<10))
-#define ETH_TX_QUEUE_7_TOKEN_BUCKET_COUNT(port) (0x2770 + (port<<10))
-#define ETH_TX_QUEUE_0_TOKEN_BUCKET_CONFIG(port) (0x2704 + (port<<10))
-#define ETH_TX_QUEUE_1_TOKEN_BUCKET_CONFIG(port) (0x2714 + (port<<10))
-#define ETH_TX_QUEUE_2_TOKEN_BUCKET_CONFIG(port) (0x2724 + (port<<10))
-#define ETH_TX_QUEUE_3_TOKEN_BUCKET_CONFIG(port) (0x2734 + (port<<10))
-#define ETH_TX_QUEUE_4_TOKEN_BUCKET_CONFIG(port) (0x2744 + (port<<10))
-#define ETH_TX_QUEUE_5_TOKEN_BUCKET_CONFIG(port) (0x2754 + (port<<10))
-#define ETH_TX_QUEUE_6_TOKEN_BUCKET_CONFIG(port) (0x2764 + (port<<10))
-#define ETH_TX_QUEUE_7_TOKEN_BUCKET_CONFIG(port) (0x2774 + (port<<10))
-#define ETH_TX_QUEUE_0_ARBITER_CONFIG(port) (0x2708 + (port<<10))
-#define ETH_TX_QUEUE_1_ARBITER_CONFIG(port) (0x2718 + (port<<10))
-#define ETH_TX_QUEUE_2_ARBITER_CONFIG(port) (0x2728 + (port<<10))
-#define ETH_TX_QUEUE_3_ARBITER_CONFIG(port) (0x2738 + (port<<10))
-#define ETH_TX_QUEUE_4_ARBITER_CONFIG(port) (0x2748 + (port<<10))
-#define ETH_TX_QUEUE_5_ARBITER_CONFIG(port) (0x2758 + (port<<10))
-#define ETH_TX_QUEUE_6_ARBITER_CONFIG(port) (0x2768 + (port<<10))
-#define ETH_TX_QUEUE_7_ARBITER_CONFIG(port) (0x2778 + (port<<10))
-#define ETH_PORT_TX_TOKEN_BUCKET_COUNT(port) (0x2780 + (port<<10))
-#define ETH_DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE(port) (0x3400 + (port<<10))
-#define ETH_DA_FILTER_OTHER_MULTICAST_TABLE_BASE(port) (0x3500 + (port<<10))
-#define ETH_DA_FILTER_UNICAST_TABLE_BASE(port) (0x3600 + (port<<10))
-
-/****************************************/
-/* Cunit Debug (for internal use) */
-/****************************************/
-
-#define CUNIT_ADDRESS 0xf340
-#define CUNIT_COMMAND_AND_ID 0xf344
-#define CUNIT_WRITE_DATA_LOW 0xf348
-#define CUNIT_WRITE_DATA_HIGH 0xf34c
-#define CUNIT_WRITE_BYTE_ENABLE 0xf358
-#define CUNIT_READ_DATA_LOW 0xf350
-#define CUNIT_READ_DATA_HIGH 0xf354
-#define CUNIT_READ_ID 0xf35c
-
-/****************************************/
-/* Fast Ethernet Unit Registers */
-/****************************************/
-
-/****************************************/
-/* Ethernet Unit Registers */
-/****************************************/
-
-#define ETH_PHY_ADDR_REG 0x2000
-#define ETH_SMI_REG 0x2004
-#define ETH_UNIT_DEFAULT_ADDR_REG 0x2008
-#define ETH_UNIT_DEFAULTID_REG 0x200c
-#define ETH_UNIT_INTERRUPT_CAUSE_REG 0x2080
-#define ETH_UNIT_INTERRUPT_MASK_REG 0x2084
-#define ETH_UNIT_INTERNAL_USE_REG 0x24fc
-#define ETH_UNIT_ERROR_ADDR_REG 0x2094
-#define ETH_BAR_0 0x2200
-#define ETH_BAR_1 0x2208
-#define ETH_BAR_2 0x2210
-#define ETH_BAR_3 0x2218
-#define ETH_BAR_4 0x2220
-#define ETH_BAR_5 0x2228
-#define ETH_SIZE_REG_0 0x2204
-#define ETH_SIZE_REG_1 0x220c
-#define ETH_SIZE_REG_2 0x2214
-#define ETH_SIZE_REG_3 0x221c
-#define ETH_SIZE_REG_4 0x2224
-#define ETH_SIZE_REG_5 0x222c
-#define ETH_HEADERS_RETARGET_BASE_REG 0x2230
-#define ETH_HEADERS_RETARGET_CONTROL_REG 0x2234
-#define ETH_HIGH_ADDR_REMAP_REG_0 0x2280
-#define ETH_HIGH_ADDR_REMAP_REG_1 0x2284
-#define ETH_HIGH_ADDR_REMAP_REG_2 0x2288
-#define ETH_HIGH_ADDR_REMAP_REG_3 0x228c
-#define ETH_BASE_ADDR_ENABLE_REG 0x2290
-#define ETH_ACCESS_PROTECTION_REG(port) (0x2294 + (port<<2))
-#define ETH_MIB_COUNTERS_BASE(port) (0x3000 + (port<<7))
-#define ETH_PORT_CONFIG_REG(port) (0x2400 + (port<<10))
-#define ETH_PORT_CONFIG_EXTEND_REG(port) (0x2404 + (port<<10))
-#define ETH_MII_SERIAL_PARAMETRS_REG(port) (0x2408 + (port<<10))
-#define ETH_GMII_SERIAL_PARAMETRS_REG(port) (0x240c + (port<<10))
-#define ETH_VLAN_ETHERTYPE_REG(port) (0x2410 + (port<<10))
-#define ETH_MAC_ADDR_LOW(port) (0x2414 + (port<<10))
-#define ETH_MAC_ADDR_HIGH(port) (0x2418 + (port<<10))
-#define ETH_SDMA_CONFIG_REG(port) (0x241c + (port<<10))
-#define ETH_DSCP_0(port) (0x2420 + (port<<10))
-#define ETH_DSCP_1(port) (0x2424 + (port<<10))
-#define ETH_DSCP_2(port) (0x2428 + (port<<10))
-#define ETH_DSCP_3(port) (0x242c + (port<<10))
-#define ETH_DSCP_4(port) (0x2430 + (port<<10))
-#define ETH_DSCP_5(port) (0x2434 + (port<<10))
-#define ETH_DSCP_6(port) (0x2438 + (port<<10))
-#define ETH_PORT_SERIAL_CONTROL_REG(port) (0x243c + (port<<10))
-#define ETH_VLAN_PRIORITY_TAG_TO_PRIORITY(port) (0x2440 + (port<<10))
-#define ETH_PORT_STATUS_REG(port) (0x2444 + (port<<10))
-#define ETH_TRANSMIT_QUEUE_COMMAND_REG(port) (0x2448 + (port<<10))
-#define ETH_TX_QUEUE_FIXED_PRIORITY(port) (0x244c + (port<<10))
-#define ETH_PORT_TX_TOKEN_BUCKET_RATE_CONFIG(port) (0x2450 + (port<<10))
-#define ETH_MAXIMUM_TRANSMIT_UNIT(port) (0x2458 + (port<<10))
-#define ETH_PORT_MAXIMUM_TOKEN_BUCKET_SIZE(port) (0x245c + (port<<10))
-#define ETH_INTERRUPT_CAUSE_REG(port) (0x2460 + (port<<10))
-#define ETH_INTERRUPT_CAUSE_EXTEND_REG(port) (0x2464 + (port<<10))
-#define ETH_INTERRUPT_MASK_REG(port) (0x2468 + (port<<10))
-#define ETH_INTERRUPT_EXTEND_MASK_REG(port) (0x246c + (port<<10))
-#define ETH_RX_FIFO_URGENT_THRESHOLD_REG(port) (0x2470 + (port<<10))
-#define ETH_TX_FIFO_URGENT_THRESHOLD_REG(port) (0x2474 + (port<<10))
-#define ETH_RX_MINIMAL_FRAME_SIZE_REG(port) (0x247c + (port<<10))
-#define ETH_RX_DISCARDED_FRAMES_COUNTER(port) (0x2484 + (port<<10)
-#define ETH_PORT_DEBUG_0_REG(port) (0x248c + (port<<10))
-#define ETH_PORT_DEBUG_1_REG(port) (0x2490 + (port<<10))
-#define ETH_PORT_INTERNAL_ADDR_ERROR_REG(port) (0x2494 + (port<<10))
-#define ETH_INTERNAL_USE_REG(port) (0x24fc + (port<<10))
-#define ETH_RECEIVE_QUEUE_COMMAND_REG(port) (0x2680 + (port<<10))
-#define ETH_CURRENT_SERVED_TX_DESC_PTR(port) (0x2684 + (port<<10))
-#define ETH_RX_CURRENT_QUEUE_DESC_PTR_0(port) (0x260c + (port<<10))
-#define ETH_RX_CURRENT_QUEUE_DESC_PTR_1(port) (0x261c + (port<<10))
-#define ETH_RX_CURRENT_QUEUE_DESC_PTR_2(port) (0x262c + (port<<10))
-#define ETH_RX_CURRENT_QUEUE_DESC_PTR_3(port) (0x263c + (port<<10))
-#define ETH_RX_CURRENT_QUEUE_DESC_PTR_4(port) (0x264c + (port<<10))
-#define ETH_RX_CURRENT_QUEUE_DESC_PTR_5(port) (0x265c + (port<<10))
-#define ETH_RX_CURRENT_QUEUE_DESC_PTR_6(port) (0x266c + (port<<10))
-#define ETH_RX_CURRENT_QUEUE_DESC_PTR_7(port) (0x267c + (port<<10))
-#define ETH_TX_CURRENT_QUEUE_DESC_PTR_0(port) (0x26c0 + (port<<10))
-#define ETH_TX_CURRENT_QUEUE_DESC_PTR_1(port) (0x26c4 + (port<<10))
-#define ETH_TX_CURRENT_QUEUE_DESC_PTR_2(port) (0x26c8 + (port<<10))
-#define ETH_TX_CURRENT_QUEUE_DESC_PTR_3(port) (0x26cc + (port<<10))
-#define ETH_TX_CURRENT_QUEUE_DESC_PTR_4(port) (0x26d0 + (port<<10))
-#define ETH_TX_CURRENT_QUEUE_DESC_PTR_5(port) (0x26d4 + (port<<10))
-#define ETH_TX_CURRENT_QUEUE_DESC_PTR_6(port) (0x26d8 + (port<<10))
-#define ETH_TX_CURRENT_QUEUE_DESC_PTR_7(port) (0x26dc + (port<<10))
-#define ETH_TX_QUEUE_0_TOKEN_BUCKET_COUNT(port) (0x2700 + (port<<10))
-#define ETH_TX_QUEUE_1_TOKEN_BUCKET_COUNT(port) (0x2710 + (port<<10))
-#define ETH_TX_QUEUE_2_TOKEN_BUCKET_COUNT(port) (0x2720 + (port<<10))
-#define ETH_TX_QUEUE_3_TOKEN_BUCKET_COUNT(port) (0x2730 + (port<<10))
-#define ETH_TX_QUEUE_4_TOKEN_BUCKET_COUNT(port) (0x2740 + (port<<10))
-#define ETH_TX_QUEUE_5_TOKEN_BUCKET_COUNT(port) (0x2750 + (port<<10))
-#define ETH_TX_QUEUE_6_TOKEN_BUCKET_COUNT(port) (0x2760 + (port<<10))
-#define ETH_TX_QUEUE_7_TOKEN_BUCKET_COUNT(port) (0x2770 + (port<<10))
-#define ETH_TX_QUEUE_0_TOKEN_BUCKET_CONFIG(port) (0x2704 + (port<<10))
-#define ETH_TX_QUEUE_1_TOKEN_BUCKET_CONFIG(port) (0x2714 + (port<<10))
-#define ETH_TX_QUEUE_2_TOKEN_BUCKET_CONFIG(port) (0x2724 + (port<<10))
-#define ETH_TX_QUEUE_3_TOKEN_BUCKET_CONFIG(port) (0x2734 + (port<<10))
-#define ETH_TX_QUEUE_4_TOKEN_BUCKET_CONFIG(port) (0x2744 + (port<<10))
-#define ETH_TX_QUEUE_5_TOKEN_BUCKET_CONFIG(port) (0x2754 + (port<<10))
-#define ETH_TX_QUEUE_6_TOKEN_BUCKET_CONFIG(port) (0x2764 + (port<<10))
-#define ETH_TX_QUEUE_7_TOKEN_BUCKET_CONFIG(port) (0x2774 + (port<<10))
-#define ETH_TX_QUEUE_0_ARBITER_CONFIG(port) (0x2708 + (port<<10))
-#define ETH_TX_QUEUE_1_ARBITER_CONFIG(port) (0x2718 + (port<<10))
-#define ETH_TX_QUEUE_2_ARBITER_CONFIG(port) (0x2728 + (port<<10))
-#define ETH_TX_QUEUE_3_ARBITER_CONFIG(port) (0x2738 + (port<<10))
-#define ETH_TX_QUEUE_4_ARBITER_CONFIG(port) (0x2748 + (port<<10))
-#define ETH_TX_QUEUE_5_ARBITER_CONFIG(port) (0x2758 + (port<<10))
-#define ETH_TX_QUEUE_6_ARBITER_CONFIG(port) (0x2768 + (port<<10))
-#define ETH_TX_QUEUE_7_ARBITER_CONFIG(port) (0x2778 + (port<<10))
-#define ETH_PORT_TX_TOKEN_BUCKET_COUNT(port) (0x2780 + (port<<10))
-#define ETH_DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE(port) (0x3400 + (port<<10))
-#define ETH_DA_FILTER_OTHER_MULTICAST_TABLE_BASE(port) (0x3500 + (port<<10))
-#define ETH_DA_FILTER_UNICAST_TABLE_BASE(port) (0x3600 + (port<<10))
-
-
-/* Ethernet GT64260 */
-/*
-#define ETHERNET_PHY_ADDRESS_REGISTER 0x2000
-#define ETHERNET_SMI_REGISTER 0x2010
-*/
-/* Ethernet 0 */
-/*
-#define ETHERNET0_PORT_CONFIGURATION_REGISTER 0x2400
-#define ETHERNET0_PORT_CONFIGURATION_EXTEND_REGISTER 0x2408
-#define ETHERNET0_PORT_COMMAND_REGISTER 0x2410
-#define ETHERNET0_PORT_STATUS_REGISTER 0x2418
-#define ETHERNET0_SERIAL_PARAMETRS_REGISTER 0x2420
-#define ETHERNET0_HASH_TABLE_POINTER_REGISTER 0x2428
-#define ETHERNET0_FLOW_CONTROL_SOURCE_ADDRESS_LOW 0x2430
-#define ETHERNET0_FLOW_CONTROL_SOURCE_ADDRESS_HIGH 0x2438
-#define ETHERNET0_SDMA_CONFIGURATION_REGISTER 0x2440
-#define ETHERNET0_SDMA_COMMAND_REGISTER 0x2448
-#define ETHERNET0_INTERRUPT_CAUSE_REGISTER 0x2450
-#define ETHERNET0_INTERRUPT_MASK_REGISTER 0x2458
-#define ETHERNET0_FIRST_RX_DESCRIPTOR_POINTER0 0x2480
-#define ETHERNET0_FIRST_RX_DESCRIPTOR_POINTER1 0x2484
-#define ETHERNET0_FIRST_RX_DESCRIPTOR_POINTER2 0x2488
-#define ETHERNET0_FIRST_RX_DESCRIPTOR_POINTER3 0x248c
-#define ETHERNET0_CURRENT_RX_DESCRIPTOR_POINTER0 0x24a0
-#define ETHERNET0_CURRENT_RX_DESCRIPTOR_POINTER1 0x24a4
-#define ETHERNET0_CURRENT_RX_DESCRIPTOR_POINTER2 0x24a8
-#define ETHERNET0_CURRENT_RX_DESCRIPTOR_POINTER3 0x24ac
-#define ETHERNET0_CURRENT_TX_DESCRIPTOR_POINTER0 0x24e0
-#define ETHERNET0_CURRENT_TX_DESCRIPTOR_POINTER1 0x24e4
-#define ETHERNET0_MIB_COUNTER_BASE 0x2500
-*/
-/* Ethernet 1 */
-/*
-#define ETHERNET1_PORT_CONFIGURATION_REGISTER 0x2800
-#define ETHERNET1_PORT_CONFIGURATION_EXTEND_REGISTER 0x2808
-#define ETHERNET1_PORT_COMMAND_REGISTER 0x2810
-#define ETHERNET1_PORT_STATUS_REGISTER 0x2818
-#define ETHERNET1_SERIAL_PARAMETRS_REGISTER 0x2820
-#define ETHERNET1_HASH_TABLE_POINTER_REGISTER 0x2828
-#define ETHERNET1_FLOW_CONTROL_SOURCE_ADDRESS_LOW 0x2830
-#define ETHERNET1_FLOW_CONTROL_SOURCE_ADDRESS_HIGH 0x2838
-#define ETHERNET1_SDMA_CONFIGURATION_REGISTER 0x2840
-#define ETHERNET1_SDMA_COMMAND_REGISTER 0x2848
-#define ETHERNET1_INTERRUPT_CAUSE_REGISTER 0x2850
-#define ETHERNET1_INTERRUPT_MASK_REGISTER 0x2858
-#define ETHERNET1_FIRST_RX_DESCRIPTOR_POINTER0 0x2880
-#define ETHERNET1_FIRST_RX_DESCRIPTOR_POINTER1 0x2884
-#define ETHERNET1_FIRST_RX_DESCRIPTOR_POINTER2 0x2888
-#define ETHERNET1_FIRST_RX_DESCRIPTOR_POINTER3 0x288c
-#define ETHERNET1_CURRENT_RX_DESCRIPTOR_POINTER0 0x28a0
-#define ETHERNET1_CURRENT_RX_DESCRIPTOR_POINTER1 0x28a4
-#define ETHERNET1_CURRENT_RX_DESCRIPTOR_POINTER2 0x28a8
-#define ETHERNET1_CURRENT_RX_DESCRIPTOR_POINTER3 0x28ac
-#define ETHERNET1_CURRENT_TX_DESCRIPTOR_POINTER0 0x28e0
-#define ETHERNET1_CURRENT_TX_DESCRIPTOR_POINTER1 0x28e4
-#define ETHERNET1_MIB_COUNTER_BASE 0x2900
-*/
-/* Ethernet 2 */
-/*
-#define ETHERNET2_PORT_CONFIGURATION_REGISTER 0x2c00
-#define ETHERNET2_PORT_CONFIGURATION_EXTEND_REGISTER 0x2c08
-#define ETHERNET2_PORT_COMMAND_REGISTER 0x2c10
-#define ETHERNET2_PORT_STATUS_REGISTER 0x2c18
-#define ETHERNET2_SERIAL_PARAMETRS_REGISTER 0x2c20
-#define ETHERNET2_HASH_TABLE_POINTER_REGISTER 0x2c28
-#define ETHERNET2_FLOW_CONTROL_SOURCE_ADDRESS_LOW 0x2c30
-#define ETHERNET2_FLOW_CONTROL_SOURCE_ADDRESS_HIGH 0x2c38
-#define ETHERNET2_SDMA_CONFIGURATION_REGISTER 0x2c40
-#define ETHERNET2_SDMA_COMMAND_REGISTER 0x2c48
-#define ETHERNET2_INTERRUPT_CAUSE_REGISTER 0x2c50
-#define ETHERNET2_INTERRUPT_MASK_REGISTER 0x2c58
-#define ETHERNET2_FIRST_RX_DESCRIPTOR_POINTER0 0x2c80
-#define ETHERNET2_FIRST_RX_DESCRIPTOR_POINTER1 0x2c84
-#define ETHERNET2_FIRST_RX_DESCRIPTOR_POINTER2 0x2c88
-#define ETHERNET2_FIRST_RX_DESCRIPTOR_POINTER3 0x2c8c
-#define ETHERNET2_CURRENT_RX_DESCRIPTOR_POINTER0 0x2ca0
-#define ETHERNET2_CURRENT_RX_DESCRIPTOR_POINTER1 0x2ca4
-#define ETHERNET2_CURRENT_RX_DESCRIPTOR_POINTER2 0x2ca8
-#define ETHERNET2_CURRENT_RX_DESCRIPTOR_POINTER3 0x2cac
-#define ETHERNET2_CURRENT_TX_DESCRIPTOR_POINTER0 0x2ce0
-#define ETHERNET2_CURRENT_TX_DESCRIPTOR_POINTER1 0x2ce4
-#define ETHERNET2_MIB_COUNTER_BASE 0x2d00
-*/
-
-/****************************************/
-/* SDMA Registers */
-/****************************************/
-
-#define SDMA_GROUP_CONFIGURATION_REGISTER 0xb1f0
-#define CHANNEL0_CONFIGURATION_REGISTER 0x4000
-#define CHANNEL0_COMMAND_REGISTER 0x4008
-#define CHANNEL0_RX_CMD_STATUS 0x4800
-#define CHANNEL0_RX_PACKET_AND_BUFFER_SIZES 0x4804
-#define CHANNEL0_RX_BUFFER_POINTER 0x4808
-#define CHANNEL0_RX_NEXT_POINTER 0x480c
-#define CHANNEL0_CURRENT_RX_DESCRIPTOR_POINTER 0x4810
-#define CHANNEL0_TX_CMD_STATUS 0x4C00
-#define CHANNEL0_TX_PACKET_SIZE 0x4C04
-#define CHANNEL0_TX_BUFFER_POINTER 0x4C08
-#define CHANNEL0_TX_NEXT_POINTER 0x4C0c
-#define CHANNEL0_CURRENT_TX_DESCRIPTOR_POINTER 0x4c10
-#define CHANNEL0_FIRST_TX_DESCRIPTOR_POINTER 0x4c14
-/*
-#define CHANNEL1_CONFIGURATION_REGISTER 0x5000
-#define CHANNEL1_COMMAND_REGISTER 0x5008
-#define CHANNEL1_RX_CMD_STATUS 0x5800
-#define CHANNEL1_RX_PACKET_AND_BUFFER_SIZES 0x5804
-#define CHANNEL1_RX_BUFFER_POINTER 0x5808
-#define CHANNEL1_RX_NEXT_POINTER 0x580c
-#define CHANNEL1_TX_CMD_STATUS 0x5C00
-#define CHANNEL1_TX_PACKET_SIZE 0x5C04
-#define CHANNEL1_TX_BUFFER_POINTER 0x5C08
-#define CHANNEL1_TX_NEXT_POINTER 0x5C0c
-#define CHANNEL1_CURRENT_RX_DESCRIPTOR_POINTER 0x5810
-#define CHANNEL1_CURRENT_TX_DESCRIPTOR_POINTER 0x5c10
-#define CHANNEL1_FIRST_TX_DESCRIPTOR_POINTER 0x5c14
-#define CHANNEL2_CONFIGURATION_REGISTER 0x6000
-#define CHANNEL2_COMMAND_REGISTER 0x6008
-#define CHANNEL2_RX_CMD_STATUS 0x6800
-#define CHANNEL2_RX_PACKET_AND_BUFFER_SIZES 0x6804
-#define CHANNEL2_RX_BUFFER_POINTER 0x6808
-#define CHANNEL2_RX_NEXT_POINTER 0x680c
-#define CHANNEL2_CURRENT_RX_DESCRIPTOR_POINTER 0x6810
-#define CHANNEL2_TX_CMD_STATUS 0x6C00
-#define CHANNEL2_TX_PACKET_SIZE 0x6C04
-#define CHANNEL2_TX_BUFFER_POINTER 0x6C08
-#define CHANNEL2_TX_NEXT_POINTER 0x6C0c
-#define CHANNEL2_CURRENT_RX_DESCRIPTOR_POINTER 0x6810
-#define CHANNEL2_CURRENT_TX_DESCRIPTOR_POINTER 0x6c10
-#define CHANNEL2_FIRST_TX_DESCRIPTOR_POINTER 0x6c14
-*/
-/* SDMA Interrupt */
-/*
-#define SDMA_CAUSE 0xb820
-#define SDMA_MASK 0xb8a0
-*/
-/***************************************/
-/* SDMA Registers */
-/***************************************/
-
-#define SDMA_CONFIG_REG(channel) (0x4000 + (channel<<13))
-#define SDMA_COMMAND_REG(channel) (0x4008 + (channel<<13))
-#define SDMA_CURRENT_RX_DESCRIPTOR_POINTER(channel) (0x4810 + (channel<<13))
-#define SDMA_CURRENT_TX_DESCRIPTOR_POINTER(channel) (0x4c10 + (channel<<13))
-#define SDMA_FIRST_TX_DESCRIPTOR_POINTER(channel) (0x4c14 + (channel<<13))
-
-#define SDMA_CAUSE_REG 0xb800
-#define SDMA_MASK_REG 0xb880
-
-/****************************************/
-/* Baude Rate Generators Registers */
-/****************************************/
-
-/* BRG 0 */
-#define BRG0_CONFIGURATION_REGISTER 0xb200
-#define BRG0_BAUDE_TUNING_REGISTER 0xb204
-
-/* BRG 1 */
-#define BRG1_CONFIGURATION_REGISTER 0xb208
-#define BRG1_BAUDE_TUNING_REGISTER 0xb20c
-
-/* BRG 2 */
-#define BRG2_CONFIGURATION_REGISTER 0xb210
-#define BRG2_BAUDE_TUNING_REGISTER 0xb214
-
-/* BRG Interrupts */
-#define BRG_CAUSE_REGISTER 0xb834
-#define BRG_MASK_REGISTER 0xb8b4
-#define BRG_CONFIG_REG(brg) (0xb200 + (brg<<3))
-#define BRG_BAUDE_TUNING_REG(brg) (0xb208 + (brg<<3))
-#define BRG_CAUSE_REG BRG_CAUSE_REGISTER /*0xb8341 */
-#define BRG_MASK_REG BRG_MASK_REGISTER /*0xb8b41 */
-
-/* MISC */
-
-#define MAIN_ROUTING_REGISTER 0xb400
-#define RECEIVE_CLOCK_ROUTING_REGISTER 0xb404
-#define TRANSMIT_CLOCK_ROUTING_REGISTER 0xb408
-#define COMM_UNIT_ARBITER_CONFIGURATION_REGISTER 0xb40c
-
-/****************************************/
-/* Watchdog registers */
-/****************************************/
-#define WATCHDOG_CONFIGURATION_REGISTER 0xb410
-#define WATCHDOG_VALUE_REGISTER 0xb414
-#define WATCHDOG_CONFIG_REG WATCHDOG_CONFIGURATION_REGISTER /*0xb4101 */
-#define WATCHDOG_VALUE_REG WATCHDOG_VALUE_REGISTER /*0xb4141 */
-
-
-/****************************************/
-/* Flex TDM Registers */
-/****************************************/
-
-/* FTDM Port */
-
-#define FLEXTDM_TRANSMIT_READ_POINTER 0xa800
-#define FLEXTDM_RECEIVE_READ_POINTER 0xa804
-#define FLEXTDM_CONFIGURATION_REGISTER 0xa808
-#define FLEXTDM_AUX_CHANNELA_TX_REGISTER 0xa80c
-#define FLEXTDM_AUX_CHANNELA_RX_REGISTER 0xa810
-#define FLEXTDM_AUX_CHANNELB_TX_REGISTER 0xa814
-#define FLEXTDM_AUX_CHANNELB_RX_REGISTER 0xa818
-
-/* FTDM Interrupts */
-
-#define FTDM_CAUSE_REGISTER 0xb830
-#define FTDM_MASK_REGISTER 0xb8b0
-
-
-/****************************************/
-/* GPP Interface Registers */
-/****************************************/
-
-#define GPP_IO_CONTROL 0xf100
-#define GPP_LEVEL_CONTROL 0xf110
-#define GPP_VALUE 0xf104
-#define GPP_INTERRUPT_CAUSE 0xf108
-#define GPP_INTERRUPT_MASK 0xf10c
-#define GPP_INTERRUPT_MASK0 GPP_INTERRUPT_MASK /* 0xf10c1 */
-#define GPP_INTERRUPT_MASK1 0xf114
-#define GPP_VALUE_SET 0xf118
-#define GPP_VALUE_CLEAR 0xf11c
-
-/****************************************/
-/* MPP Interface Registers */
-/****************************************/
-#define MPP_CONTROL0 0xf000
-#define MPP_CONTROL1 0xf004
-#define MPP_CONTROL2 0xf008
-#define MPP_CONTROL3 0xf00c
-#define DEBUG_PORT_MULTIPLEX 0xf014
- /*#define SERIAL_PORT_MULTIPLEX 0xf0101 */
-
-/****************************************/
-/* Interrupt Controller Registers */
-/****************************************/
-
-/****************************************/
-/* Interrupts */
-/****************************************/
-/****************************************/
-/* Interrupts (checked I.A. 14.10.02) */
-/****************************************/
-
-#define LOW_INTERRUPT_CAUSE_REGISTER 0x004 /* gt64260: 0xc181 */
-#define HIGH_INTERRUPT_CAUSE_REGISTER 0x00c /* gt64260: 0xc681 */
-#define CPU_INTERRUPT_MASK_REGISTER_LOW 0x014 /* gt64260: 0xc1c1 */
-#define CPU_INTERRUPT_MASK_REGISTER_HIGH 0x01c /* gt64260: 0xc6c1 */
-#define CPU_SELECT_CAUSE_REGISTER 0x024 /* gt64260: 0xc701 */
-#define CPU_INTERRUPT_1_MASK_REGISTER_LOW 0x034 /* new in the MV64360 and MV64460 */
-#define CPU_INTERRUPT_1_MASK_REGISTER_HIGH 0x03c /* new in the MV64360 and MV64460 */
-#define CPU_SELECT_1_CAUSE_REGISTER 0x044 /* new in the MV64360 and MV64460 */
-#define PCI_0INTERRUPT_CAUSE_MASK_REGISTER_LOW 0x054 /* gt64260: 0xc241 */
-#define PCI_0INTERRUPT_CAUSE_MASK_REGISTER_HIGH 0x05c /* gt64260: 0xc641 */
-#define PCI_0SELECT_CAUSE 0x064 /* gt64260: 0xc741 */
-#define PCI_1INTERRUPT_CAUSE_MASK_REGISTER_LOW 0x074 /* gt64260: 0xca41 */
-#define PCI_1INTERRUPT_CAUSE_MASK_REGISTER_HIGH 0x07c /* gt64260: 0xce41 */
-#define PCI_1SELECT_CAUSE 0x084 /* gt64260: 0xcf41 */
-/*#define CPU_INT_0_MASK 0xe60 signal is not multiplexed on MPP in the MV64360 and MV64460 */
-/*#define CPU_INT_1_MASK 0xe64 signal is not multiplexed on MPP in the MV64360 and MV64460 */
-/*#define CPU_INT_2_MASK 0xe68 signal is not multiplexed on MPP in the MV64360 and MV64460 */
-/*#define CPU_INT_3_MASK 0xe6c signal is not multiplexed on MPP in the MV64360 and MV64460 */
-
-#define MAIN_INTERRUPT_CAUSE_LOW LOW_INTERRUPT_CAUSE_REGISTER /* 0x0041 */
-#define MAIN_INTERRUPT_CAUSE_HIGH HIGH_INTERRUPT_CAUSE_REGISTER /* 0x00c1 */
-#define CPU_INTERRUPT0_MASK_LOW CPU_INTERRUPT_MASK_REGISTER_LOW /* 0x0141 */
-#define CPU_INTERRUPT0_MASK_HIGH CPU_INTERRUPT_MASK_REGISTER_HIGH /*0x01c1 */
-#define CPU_INTERRUPT0_SELECT_CAUSE CPU_SELECT_CAUSE_REGISTER /* 0x0241 */
-#define CPU_INTERRUPT1_MASK_LOW CPU_INTERRUPT_1_MASK_REGISTER_LOW /* 0x0341 */
-#define CPU_INTERRUPT1_MASK_HIGH CPU_INTERRUPT_1_MASK_REGISTER_HIGH /* 0x03c1 */
-#define CPU_INTERRUPT1_SELECT_CAUSE CPU_SELECT_1_CAUSE_REGISTER /* 0x0441 */
-#define INTERRUPT0_MASK_0_LOW PCI_0INTERRUPT_CAUSE_MASK_REGISTER_LOW /* 0x0541 */
-#define INTERRUPT0_MASK_0_HIGH PCI_0INTERRUPT_CAUSE_MASK_REGISTER_HIGH /* 0x05c1 */
-#define INTERRUPT0_SELECT_CAUSE PCI_0SELECT_CAUSE /* 0x0641 */
-#define INTERRUPT1_MASK_0_LOW PCI_1INTERRUPT_CAUSE_MASK_REGISTER_LOW /* 0x0741 */
-#define INTERRUPT1_MASK_0_HIGH PCI_1INTERRUPT_CAUSE_MASK_REGISTER_HIGH /* 0x07c1 */
-#define INTERRUPT1_SELECT_CAUSE PCI_1SELECT_CAUSE /* 0x0841 */
-
-/****************************************/
-/* I2C Registers */
-/****************************************/
-
-#define I2C_SLAVE_ADDRESS 0xc000
-#define I2C_EXTENDED_SLAVE_ADDRESS 0xc040
-#define I2C_DATA 0xc004
-#define I2C_CONTROL 0xc008
-#define I2C_STATUS_BAUDE_RATE 0xc00C
-#define I2C_SOFT_RESET 0xc01c
-#define I2C_SLAVE_ADDR I2C_SLAVE_ADDRESS /* 0xc0001 */
-#define I2C_EXTENDED_SLAVE_ADDR I2C_EXTENDED_SLAVE_ADDRESS /*0xc0101 */
-
-/****************************************/
-/* MPSC Registers */
-/****************************************/
-
- /* MPSCs Clocks Routing Registers */
-
-#define MPSC_ROUTING_REG 0xb400
-#define MPSC_RX_CLOCK_ROUTING_REG 0xb404
-#define MPSC_TX_CLOCK_ROUTING_REG 0xb408
-
- /* MPSCs Interrupts Registers */
-
-#define MPSC_CAUSE_REG(port) (0xb804 + (port<<3))
-#define MPSC_MASK_REG(port) (0xb884 + (port<<3))
-
-#define MPSC_MAIN_CONFIG_LOW(port) (0x8000 + (port<<12))
-#define MPSC_MAIN_CONFIG_HIGH(port) (0x8004 + (port<<12))
-#define MPSC_PROTOCOL_CONFIG(port) (0x8008 + (port<<12))
-#define MPSC_CHANNEL_REG1(port) (0x800c + (port<<12))
-#define MPSC_CHANNEL_REG2(port) (0x8010 + (port<<12))
-#define MPSC_CHANNEL_REG3(port) (0x8014 + (port<<12))
-#define MPSC_CHANNEL_REG4(port) (0x8018 + (port<<12))
-#define MPSC_CHANNEL_REG5(port) (0x801c + (port<<12))
-#define MPSC_CHANNEL_REG6(port) (0x8020 + (port<<12))
-#define MPSC_CHANNEL_REG7(port) (0x8024 + (port<<12))
-#define MPSC_CHANNEL_REG8(port) (0x8028 + (port<<12))
-#define MPSC_CHANNEL_REG9(port) (0x802c + (port<<12))
-#define MPSC_CHANNEL_REG10(port) (0x8030 + (port<<12))
-
-
-/* MPSC0 */
-
-#define MPSC0_MAIN_CONFIGURATION_LOW 0x8000
-#define MPSC0_MAIN_CONFIGURATION_HIGH 0x8004
-#define MPSC0_PROTOCOL_CONFIGURATION 0x8008
-#define CHANNEL0_REGISTER1 0x800c
-#define CHANNEL0_REGISTER2 0x8010
-#define CHANNEL0_REGISTER3 0x8014
-#define CHANNEL0_REGISTER4 0x8018
-#define CHANNEL0_REGISTER5 0x801c
-#define CHANNEL0_REGISTER6 0x8020
-#define CHANNEL0_REGISTER7 0x8024
-#define CHANNEL0_REGISTER8 0x8028
-#define CHANNEL0_REGISTER9 0x802c
-#define CHANNEL0_REGISTER10 0x8030
-#define CHANNEL0_REGISTER11 0x8034
-
-/* MPSC1 */
-
-#define MPSC1_MAIN_CONFIGURATION_LOW 0x8840
-#define MPSC1_MAIN_CONFIGURATION_HIGH 0x8844
-#define MPSC1_PROTOCOL_CONFIGURATION 0x8848
-#define CHANNEL1_REGISTER1 0x884c
-#define CHANNEL1_REGISTER2 0x8850
-#define CHANNEL1_REGISTER3 0x8854
-#define CHANNEL1_REGISTER4 0x8858
-#define CHANNEL1_REGISTER5 0x885c
-#define CHANNEL1_REGISTER6 0x8860
-#define CHANNEL1_REGISTER7 0x8864
-#define CHANNEL1_REGISTER8 0x8868
-#define CHANNEL1_REGISTER9 0x886c
-#define CHANNEL1_REGISTER10 0x8870
-#define CHANNEL1_REGISTER11 0x8874
-
-/* MPSC2 */
-
-#define MPSC2_MAIN_CONFIGURATION_LOW 0x9040
-#define MPSC2_MAIN_CONFIGURATION_HIGH 0x9044
-#define MPSC2_PROTOCOL_CONFIGURATION 0x9048
-#define CHANNEL2_REGISTER1 0x904c
-#define CHANNEL2_REGISTER2 0x9050
-#define CHANNEL2_REGISTER3 0x9054
-#define CHANNEL2_REGISTER4 0x9058
-#define CHANNEL2_REGISTER5 0x905c
-#define CHANNEL2_REGISTER6 0x9060
-#define CHANNEL2_REGISTER7 0x9064
-#define CHANNEL2_REGISTER8 0x9068
-#define CHANNEL2_REGISTER9 0x906c
-#define CHANNEL2_REGISTER10 0x9070
-#define CHANNEL2_REGISTER11 0x9074
-
-/* MPSCs Interupts */
-
-#define MPSC0_CAUSE 0xb824
-#define MPSC0_MASK 0xb8a4
-#define MPSC1_CAUSE 0xb828
-#define MPSC1_MASK 0xb8a8
-#define MPSC2_CAUSE 0xb82c
-#define MPSC2_MASK 0xb8ac
-
-/*******************************************/
-/* CUNIT Registers */
-/*******************************************/
-
- /* Address Decoding Register Map */
-
-#define CUNIT_BASE_ADDR_REG0 0xf200
-#define CUNIT_BASE_ADDR_REG1 0xf208
-#define CUNIT_BASE_ADDR_REG2 0xf210
-#define CUNIT_BASE_ADDR_REG3 0xf218
-#define CUNIT_SIZE0 0xf204
-#define CUNIT_SIZE1 0xf20c
-#define CUNIT_SIZE2 0xf214
-#define CUNIT_SIZE3 0xf21c
-#define CUNIT_HIGH_ADDR_REMAP_REG0 0xf240
-#define CUNIT_HIGH_ADDR_REMAP_REG1 0xf244
-#define CUNIT_BASE_ADDR_ENABLE_REG 0xf250
-#define MPSC0_ACCESS_PROTECTION_REG 0xf254
-#define MPSC1_ACCESS_PROTECTION_REG 0xf258
-#define CUNIT_INTERNAL_SPACE_BASE_ADDR_REG 0xf25C
-
- /* Error Report Registers */
-
-#define CUNIT_INTERRUPT_CAUSE_REG 0xf310
-#define CUNIT_INTERRUPT_MASK_REG 0xf314
-#define CUNIT_ERROR_ADDR 0xf318
-
- /* Cunit Control Registers */
-
-#define CUNIT_ARBITER_CONTROL_REG 0xf300
-#define CUNIT_CONFIG_REG 0xb40c
-#define CUNIT_CRROSBAR_TIMEOUT_REG 0xf304
-
- /* Cunit Debug Registers */
-
-#define CUNIT_DEBUG_LOW 0xf340
-#define CUNIT_DEBUG_HIGH 0xf344
-#define CUNIT_MMASK 0xf380
-
-#endif /* __INCmv_gen_regh */
diff --git a/board/Marvell/include/pci.h b/board/Marvell/include/pci.h
deleted file mode 100644
index 167248db1e..0000000000
--- a/board/Marvell/include/pci.h
+++ /dev/null
@@ -1,293 +0,0 @@
-/* PCI.h - PCI functions header file */
-
-/* Copyright - Galileo technology. */
-
-#ifndef __INCpcih
-#define __INCpcih
-
-/* includes */
-
-#include"core.h"
-#include"memory.h"
-
-/* According to PCI REV 2.1 MAX agents allowed on the bus are -21- */
-#define PCI_MAX_DEVICES 22
-
-
-/* Macros */
-
-/* The next Macros configurate the initiator board (SELF) or any any agent on
- the PCI to become: MASTER, response to MEMORY transactions , response to
- IO transactions or TWO both MEMORY_IO transactions. Those configuration
- are for both PCI0 and PCI1. */
-
-#define PCI_MEMORY_ENABLE(host, deviceNumber) pciWriteConfigReg(host, \
- PCI_STATUS_AND_COMMAND,deviceNumber,MEMORY_ENABLE | \
- pciReadConfigReg(host, PCI_STATUS_AND_COMMAND,deviceNumber) )
-
-#define PCI_IO_ENABLE(host, deviceNumber) pciWriteConfigReg(host, \
- PCI_STATUS_AND_COMMAND,deviceNumber,I_O_ENABLE | \
- pciReadConfigReg(host, PCI_STATUS_AND_COMMAND,deviceNumber) )
-
-#define PCI_SLAVE_ENABLE(host, deviceNumber) pciWriteConfigReg(host, \
- PCI_STATUS_AND_COMMAND,deviceNumber,MEMORY_ENABLE | I_O_ENABLE | \
- pciReadConfigReg(host, PCI_STATUS_AND_COMMAND,deviceNumber) )
-
-#define PCI_DISABLE(host, deviceNumber) pciWriteConfigReg(host, \
- PCI_STATUS_AND_COMMAND,deviceNumber,0xfffffff8 & \
- pciReadConfigReg(host, PCI_STATUS_AND_COMMAND,deviceNumber))
-
-#define PCI_MASTER_ENABLE(host,deviceNumber) pciWriteConfigReg(host, \
- PCI_STATUS_AND_COMMAND,deviceNumber,MASTER_ENABLE | \
- pciReadConfigReg(host,PCI_STATUS_AND_COMMAND,deviceNumber) )
-
-#define PCI_MASTER_DISABLE(deviceNumber) pciWriteConfigReg(host, \
- PCI_STATUS_AND_COMMAND,deviceNumber,~MASTER_ENABLE & \
- pciReadConfigReg(host,PCI_STATUS_AND_COMMAND,deviceNumber) )
-
-#define MASTER_ENABLE BIT2
-#define MEMORY_ENABLE BIT1
-#define I_O_ENABLE BIT0
-#define SELF 32
-
-/* Agent on the PCI bus may have up to 6 BARS. */
-#define BAR0 0x10
-#define BAR1 0x14
-#define BAR2 0x18
-#define BAR3 0x1c
-#define BAR4 0x20
-#define BAR5 0x24
-#define BAR_SEL_MEM_IO BIT0
-#define BAR_MEM_TYPE_32_BIT NO_BIT
-#define BAR_MEM_TYPE_BELOW_1M BIT1
-#define BAR_MEM_TYPE_64_BIT BIT2
-#define BAR_MEM_TYPE_RESERVED (BIT1 | BIT2)
-#define BAR_MEM_TYPE_MASK (BIT1 | BIT2)
-#define BAR_PREFETCHABLE BIT3
-#define BAR_CONFIG_MASK (BIT0 | BIT1 | BIT2 | BIT3)
-
-/* Defines for the access regions. */
-#define PREFETCH_ENABLE BIT12
-#define PREFETCH_DISABLE NO_BIT
-#define DELAYED_READ_ENABLE BIT13
-/* #define CACHING_ENABLE BIT14 */
-/* aggressive prefetch: PCI slave prefetch two burst in advance*/
-#define AGGRESSIVE_PREFETCH BIT16
-/* read line aggresive prefetch: PCI slave prefetch two burst in advance*/
-#define READ_LINE_AGGRESSIVE_PREFETCH BIT17
-/* read multiple aggresive prefetch: PCI slave prefetch two burst in advance*/
-#define READ_MULTI_AGGRESSIVE_PREFETCH BIT18
-#define MAX_BURST_4 NO_BIT
-#define MAX_BURST_8 BIT20 /* Bits[21:20] = 01 */
-#define MAX_BURST_16 BIT21 /* Bits[21:20] = 10 */
-#define PCI_BYTE_SWAP NO_BIT /* Bits[25:24] = 00 */
-#define PCI_NO_SWAP BIT24 /* Bits[25:24] = 01 */
-#define PCI_BYTE_AND_WORD_SWAP BIT25 /* Bits[25:24] = 10 */
-#define PCI_WORD_SWAP (BIT24 | BIT25) /* Bits[25:24] = 11 */
-#define PCI_ACCESS_PROTECT BIT28
-#define PCI_WRITE_PROTECT BIT29
-
-/* typedefs */
-
-typedef enum __pciAccessRegions{REGION0,REGION1,REGION2,REGION3,REGION4,REGION5,
- REGION6,REGION7} PCI_ACCESS_REGIONS;
-
-typedef enum __pciAgentPrio{LOW_AGENT_PRIO,HI_AGENT_PRIO} PCI_AGENT_PRIO;
-typedef enum __pciAgentPark{PARK_ON_AGENT,DONT_PARK_ON_AGENT} PCI_AGENT_PARK;
-
-typedef enum __pciSnoopType{PCI_NO_SNOOP,PCI_SNOOP_WT,PCI_SNOOP_WB}
- PCI_SNOOP_TYPE;
-typedef enum __pciSnoopRegion{PCI_SNOOP_REGION0,PCI_SNOOP_REGION1,
- PCI_SNOOP_REGION2,PCI_SNOOP_REGION3}
- PCI_SNOOP_REGION;
-
-typedef enum __memPciHost{PCI_HOST0,PCI_HOST1} PCI_HOST;
-typedef enum __memPciRegion{PCI_REGION0,PCI_REGION1,
- PCI_REGION2,PCI_REGION3,
- PCI_IO}
- PCI_REGION;
-
-/*ronen 7/Dec/03 */
-typedef enum __pci_bar_windows{PCI_CS0_BAR, PCI_CS1_BAR, PCI_CS2_BAR,
- PCI_CS3_BAR, PCI_DEV_CS0_BAR, PCI_DEV_CS1_BAR,
- PCI_DEV_CS2_BAR, PCI_DEV_CS3_BAR, PCI_BOOT_CS_BAR,
- PCI_MEM_INT_REG_BAR, PCI_IO_INT_REG_BAR,
- PCI_P2P_MEM0_BAR, PCI_P2P_MEM1_BAR,
- PCI_P2P_IO_BAR, PCI_CPU_BAR, PCI_INT_SRAM_BAR,
- PCI_LAST_BAR} PCI_INTERNAL_BAR;
-
-typedef struct pciBar {
- unsigned int detectBase;
- unsigned int base;
- unsigned int size;
- unsigned int type;
-} PCI_BAR;
-
-typedef struct pciDevice {
- PCI_HOST host;
- char type[40];
- unsigned int deviceNum;
- unsigned int venID;
- unsigned int deviceID;
- PCI_BAR bar[6];
-} PCI_DEVICE;
-
-typedef struct pciSelfBars {
- unsigned int SCS0Base;
- unsigned int SCS0Size;
- unsigned int SCS1Base;
- unsigned int SCS1Size;
- unsigned int SCS2Base;
- unsigned int SCS2Size;
- unsigned int SCS3Base;
- unsigned int SCS3Size;
- unsigned int internalMemBase;
- unsigned int internalIOBase;
- unsigned int CS0Base;
- unsigned int CS0Size;
- unsigned int CS1Base;
- unsigned int CS1Size;
- unsigned int CS2Base;
- unsigned int CS2Size;
- unsigned int CS3Base;
- unsigned int CS3Size;
- unsigned int CSBootBase;
- unsigned int CSBootSize;
- unsigned int P2PMem0Base;
- unsigned int P2PMem0Size;
- unsigned int P2PMem1Base;
- unsigned int P2PMem1Size;
- unsigned int P2PIOBase;
- unsigned int P2PIOSize;
- unsigned int CPUBase;
- unsigned int CPUSize;
-} PCI_SELF_BARS;
-
-/* read/write configuration registers on local PCI bus. */
-void pciWriteConfigReg(PCI_HOST host, unsigned int regOffset,
- unsigned int pciDevNum, unsigned int data);
-unsigned int pciReadConfigReg (PCI_HOST host, unsigned int regOffset,
- unsigned int pciDevNum);
-
-/* read/write configuration registers on another PCI bus. */
-void pciOverBridgeWriteConfigReg(PCI_HOST host,
- unsigned int regOffset,
- unsigned int pciDevNum,
- unsigned int busNum,unsigned int data);
-unsigned int pciOverBridgeReadConfigReg(PCI_HOST host,
- unsigned int regOffset,
- unsigned int pciDevNum,
- unsigned int busNum);
-
-/* Performs full scane on both PCI and returns all detail possible on the
- agents which exist on the bus. */
-void pciScanDevices(PCI_HOST host, PCI_DEVICE *pci0Detect,
- unsigned int numberOfElment);
-
-/* Master`s memory space */
-bool pciMapSpace(PCI_HOST host, PCI_REGION region,
- unsigned int remapBase,
- unsigned int deviceBase,
- unsigned int deviceLength);
-unsigned int pciGetSpaceBase(PCI_HOST host, PCI_REGION region);
-unsigned int pciGetSpaceSize(PCI_HOST host, PCI_REGION region);
-
-/* Slave`s memory space */
-void pciMapMemoryBank(PCI_HOST host, MEMORY_BANK bank,
- unsigned int pci0Dram0Base, unsigned int pci0Dram0Size);
-
-#if 0 /* GARBAGE routines - dont use till they get cleaned up */
-void pci0ScanSelfBars(PCI_SELF_BARS *pci0SelfBars);
-void pci1ScanSelfBars(PCI_SELF_BARS *pci1SelfBars);
-void pci0MapInternalRegSpace(unsigned int pci0InternalBase);
-void pci1MapInternalRegSpace(unsigned int pci1InternalBase);
-void pci0MapInternalRegIOSpace(unsigned int pci0InternalBase);
-void pci1MapInternalRegIOSpace(unsigned int pci1InternalBase);
-void pci0MapDevice0MemorySpace(unsigned int pci0Dev0Base,
- unsigned int pci0Dev0Length);
-void pci1MapDevice0MemorySpace(unsigned int pci1Dev0Base,
- unsigned int pci1Dev0Length);
-void pci0MapDevice1MemorySpace(unsigned int pci0Dev1Base,
- unsigned int pci0Dev1Length);
-void pci1MapDevice1MemorySpace(unsigned int pci1Dev1Base,
- unsigned int pci1Dev1Length);
-void pci0MapDevice2MemorySpace(unsigned int pci0Dev2Base,
- unsigned int pci0Dev2Length);
-void pci1MapDevice2MemorySpace(unsigned int pci1Dev2Base,
- unsigned int pci1Dev2Length);
-void pci0MapDevice3MemorySpace(unsigned int pci0Dev3Base,
- unsigned int pci0Dev3Length);
-void pci1MapDevice3MemorySpace(unsigned int pci1Dev3Base,
- unsigned int pci1Dev3Length);
-void pci0MapBootDeviceMemorySpace(unsigned int pci0DevBootBase,
- unsigned int pci0DevBootLength);
-void pci1MapBootDeviceMemorySpace(unsigned int pci1DevBootBase,
- unsigned int pci1DevBootLength);
-void pci0MapP2pMem0Space(unsigned int pci0P2pMem0Base,
- unsigned int pci0P2pMem0Length);
-void pci1MapP2pMem0Space(unsigned int pci1P2pMem0Base,
- unsigned int pci1P2pMem0Length);
-void pci0MapP2pMem1Space(unsigned int pci0P2pMem1Base,
- unsigned int pci0P2pMem1Length);
-void pci1MapP2pMem1Space(unsigned int pci1P2pMem1Base,
- unsigned int pci1P2pMem1Length);
-void pci0MapP2pIoSpace(unsigned int pci0P2pIoBase,
- unsigned int pci0P2pIoLength);
-void pci1MapP2pIoSpace(unsigned int pci1P2pIoBase,
- unsigned int pci1P2pIoLength);
-
-void pci0MapCPUspace(unsigned int pci0CpuBase, unsigned int pci0CpuLengs);
-void pci1MapCPUspace(unsigned int pci1CpuBase, unsigned int pci1CpuLengs);
-#endif
-
-/* PCI region options */
-
-bool pciSetRegionFeatures(PCI_HOST host, PCI_ACCESS_REGIONS region,
- unsigned int features, unsigned int baseAddress,
- unsigned int regionLength);
-
-void pciDisableAccessRegion(PCI_HOST host, PCI_ACCESS_REGIONS region);
-
-/* PCI arbiter */
-
-bool pciArbiterEnable(PCI_HOST host);
-bool pciArbiterDisable(PCI_HOST host);
-bool pciSetArbiterAgentsPriority(PCI_HOST host, PCI_AGENT_PRIO internalAgent,
- PCI_AGENT_PRIO externalAgent0,
- PCI_AGENT_PRIO externalAgent1,
- PCI_AGENT_PRIO externalAgent2,
- PCI_AGENT_PRIO externalAgent3,
- PCI_AGENT_PRIO externalAgent4,
- PCI_AGENT_PRIO externalAgent5);
-bool pciSetArbiterAgentsPriority(PCI_HOST host, PCI_AGENT_PRIO internalAgent,
- PCI_AGENT_PRIO externalAgent0,
- PCI_AGENT_PRIO externalAgent1,
- PCI_AGENT_PRIO externalAgent2,
- PCI_AGENT_PRIO externalAgent3,
- PCI_AGENT_PRIO externalAgent4,
- PCI_AGENT_PRIO externalAgent5);
-bool pciParkingDisable(PCI_HOST host, PCI_AGENT_PARK internalAgent,
- PCI_AGENT_PARK externalAgent0,
- PCI_AGENT_PARK externalAgent1,
- PCI_AGENT_PARK externalAgent2,
- PCI_AGENT_PARK externalAgent3,
- PCI_AGENT_PARK externalAgent4,
- PCI_AGENT_PARK externalAgent5);
-bool pciEnableBrokenAgentDetection(PCI_HOST host, unsigned char brokenValue);
-bool pciEnableBrokenAgentDetection(PCI_HOST host, unsigned char brokenValue);
-
-/* PCI-to-PCI (P2P) */
-
-bool pciP2PConfig(PCI_HOST host,
- unsigned int SecondBusLow,unsigned int SecondBusHigh,
- unsigned int busNum,unsigned int devNum);
-/* PCI Cache-coherency */
-
-bool pciSetRegionSnoopMode(PCI_HOST host, PCI_SNOOP_REGION region,
- PCI_SNOOP_TYPE snoopType,
- unsigned int baseAddress,
- unsigned int regionLength);
-
-PCI_DEVICE * pciFindDevice(unsigned short ven, unsigned short dev);
-
-#endif /* __INCpcih */
diff --git a/board/RPXClassic/Makefile b/board/RPXClassic/Makefile
deleted file mode 100644
index 93907babe0..0000000000
--- a/board/RPXClassic/Makefile
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o eccx.o
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/RPXClassic/RPXClassic.c b/board/RPXClassic/RPXClassic.c
deleted file mode 100644
index 49cb8ad24f..0000000000
--- a/board/RPXClassic/RPXClassic.c
+++ /dev/null
@@ -1,265 +0,0 @@
-/*
- * (C) Copyright 2001
- * Stäubli Faverges - <www.staubli.com>
- * Pierre AUBERT p.aubert@staubli.com
- * U-Boot port on RPXClassic LF (CLLF_BW31) board
- *
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <i2c.h>
-#include <config.h>
-#include <mpc8xx.h>
-
-/* ------------------------------------------------------------------------- */
-
-static long int dram_size (long int, long int *, long int);
-static unsigned char aschex_to_byte (unsigned char *cp);
-
-/* ------------------------------------------------------------------------- */
-
-#define _NOT_USED_ 0xFFFFCC25
-
-const uint sdram_table[] =
-{
- /*
- * Single Read. (Offset 00h in UPMA RAM)
- */
- 0xCFFFCC24, 0x0FFFCC04, 0X0CAFCC04, 0X03AFCC08,
- 0x3FBFCC27, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /*
- * Burst Read. (Offset 08h in UPMA RAM)
- */
- 0xCFFFCC24, 0x0FFFCC04, 0x0CAFCC84, 0x03AFCC88,
- 0x3FBFCC27, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /*
- * Single Write. (Offset 18h in UPMA RAM)
- */
- 0xCFFFCC24, 0x0FFFCC04, 0x0CFFCC04, 0x03FFCC00,
- 0x3FFFCC27, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /*
- * Burst Write. (Offset 20h in UPMA RAM)
- */
- 0xCFFFCC24, 0x0FFFCC04, 0x0CFFCC80, 0x03FFCC8C,
- 0x0CFFCC00, 0x33FFCC27, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_,
-
- /*
- * Refresh. (Offset 30h in UPMA RAM)
- */
- 0xC0FFCC24, 0x03FFCC24, 0x0FFFCC24, 0x0FFFCC24,
- 0x3FFFCC27, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /*
- * Exception. (Offset 3Ch in UPMA RAM)
- */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_
-};
-
-/* ------------------------------------------------------------------------- */
-
-
-/*
- * Check Board Identity:
- */
-
-int checkboard (void)
-{
- puts ("Board: RPXClassic\n");
- return (0);
-}
-
-/*-----------------------------------------------------------------------------
- * board_get_enetaddr -- Read the MAC Address in the I2C EEPROM
- *-----------------------------------------------------------------------------
- */
-void board_get_enetaddr (uchar * enet)
-{
- int i;
- char buff[256], *cp;
-
- /* Initialize I2C */
- i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
-
- /* Read 256 bytes in EEPROM */
- i2c_read (0x54, 0, 1, (uchar *)buff, 128);
- i2c_read (0x54, 128, 1, (uchar *)buff + 128, 128);
-
- /* Retrieve MAC address in buffer (key EA) */
- for (cp = buff;;) {
- if (cp[0] == 'E' && cp[1] == 'A') {
- cp += 3;
- /* Read MAC address */
- for (i = 0; i < 6; i++, cp += 2) {
- enet[i] = aschex_to_byte ((unsigned char *)cp);
- }
- }
- /* Scan to the end of the record */
- while ((*cp != '\n') && (*cp != (char)0xff)) {
- cp++;
- }
- /* If the next character is a \n, 0 or ff, we are done. */
- cp++;
- if ((*cp == '\n') || (*cp == 0) || (*cp == (char)0xff))
- break;
- }
-
-#ifdef CONFIG_FEC_ENET
- /* The MAC address is the same as normal ethernet except the 3rd byte */
- /* (See the E.P. Planet Core Overview manual */
- enet[3] |= 0x80;
-#endif
-
- printf ("MAC address = %02x:%02x:%02x:%02x:%02x:%02x\n",
- enet[0], enet[1], enet[2], enet[3], enet[4], enet[5]);
-
-}
-
-void rpxclassic_init (void)
-{
- /* Enable NVRAM */
- *((uchar *) BCSR0) |= BCSR0_ENNVRAM;
-
-#ifdef CONFIG_FEC_ENET
-
- /* Validate the fast ethernet tranceiver */
- *((volatile uchar *) BCSR2) &= ~BCSR2_MIICTL;
- *((volatile uchar *) BCSR2) &= ~BCSR2_MIIPWRDWN;
- *((volatile uchar *) BCSR2) |= BCSR2_MIIRST;
- *((volatile uchar *) BCSR2) |= BCSR2_MIIPWRDWN;
-#endif
-
-}
-
-/* ------------------------------------------------------------------------- */
-
-long int initdram (int board_type)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- long int size10;
-
- upmconfig (UPMA, (uint *) sdram_table,
- sizeof (sdram_table) / sizeof (uint));
-
- /* Refresh clock prescalar */
- memctl->memc_mptpr = CFG_MPTPR;
-
- memctl->memc_mar = 0x00000000;
-
- /* Map controller banks 1 to the SDRAM bank */
- memctl->memc_or1 = CFG_OR1_PRELIM;
- memctl->memc_br1 = CFG_BR1_PRELIM;
-
- memctl->memc_mamr = CFG_MAMR_10COL & (~(MAMR_PTAE)); /* no refresh yet */
-
- udelay (200);
-
- /* perform SDRAM initializsation sequence */
-
- memctl->memc_mcr = 0x80002230; /* SDRAM bank 0 - refresh twice */
- udelay (1);
-
- memctl->memc_mamr |= MAMR_PTAE; /* enable refresh */
-
- udelay (1000);
-
- /* Check Bank 0 Memory Size
- * try 10 column mode
- */
-
- size10 = dram_size (CFG_MAMR_10COL, SDRAM_BASE_PRELIM,
- SDRAM_MAX_SIZE);
-
- return (size10);
-}
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Check memory range for valid RAM. A simple memory test determines
- * the actually available RAM size between addresses `base' and
- * `base + maxsize'. Some (not all) hardware errors are detected:
- * - short between address lines
- * - short between data lines
- */
-
-static long int dram_size (long int mamr_value, long int *base, long int maxsize)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
-
- memctl->memc_mamr = mamr_value;
-
- return (get_ram_size(base, maxsize));
-}
-/*-----------------------------------------------------------------------------
- * aschex_to_byte --
- *-----------------------------------------------------------------------------
- */
-static unsigned char aschex_to_byte (unsigned char *cp)
-{
- u_char byte, c;
-
- c = *cp++;
-
- if ((c >= 'A') && (c <= 'F')) {
- c -= 'A';
- c += 10;
- } else if ((c >= 'a') && (c <= 'f')) {
- c -= 'a';
- c += 10;
- } else {
- c -= '0';
- }
-
- byte = c * 16;
-
- c = *cp;
-
- if ((c >= 'A') && (c <= 'F')) {
- c -= 'A';
- c += 10;
- } else if ((c >= 'a') && (c <= 'f')) {
- c -= 'a';
- c += 10;
- } else {
- c -= '0';
- }
-
- byte += c;
-
- return (byte);
-}
diff --git a/board/RPXClassic/config.mk b/board/RPXClassic/config.mk
deleted file mode 100644
index ae455e1202..0000000000
--- a/board/RPXClassic/config.mk
+++ /dev/null
@@ -1,29 +0,0 @@
-#
-# (C) Copyright 2001
-# Stäubli Faverges - <www.staubli.com>
-# Pierre AUBERT p.aubert@staubli.com
-# U-Boot port on RPXClassic LF (CLLF_BW31) board
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-TEXT_BASE = 0xff000000
diff --git a/board/RPXClassic/eccx.c b/board/RPXClassic/eccx.c
deleted file mode 100644
index cc76bbdfae..0000000000
--- a/board/RPXClassic/eccx.c
+++ /dev/null
@@ -1,351 +0,0 @@
-/*
- * (C) Copyright 2002
- * Stäubli Faverges - <www.staubli.com>
- * Pierre AUBERT p.aubert@staubli.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-/* Video support for the ECCX daughter board */
-
-
-#include <common.h>
-#include <config.h>
-
-#ifdef CONFIG_VIDEO_SED13806
-#include <sed13806.h>
-
-
-/* Screen configurations: the initialization of the SD13806 depends on
- screen and on display mode. We handle only 8bpp and 16 bpp modes */
-
-/* ECCX board is supplied with a NEC NL6448BC20 screen */
-#ifdef CONFIG_NEC_NL6448BC20
-#define DISPLAY_WIDTH 640
-#define DISPLAY_HEIGHT 480
-
-#ifdef CONFIG_VIDEO_SED13806_8BPP
-static const S1D_REGS init_regs [] =
-{
- {0x0001,0x00}, /* Miscellaneous Register */
- {0x01FC,0x00}, /* Display Mode Register */
- {0x0004,0x1b}, /* General IO Pins Configuration Register 0 */
- {0x0005,0x00}, /* General IO Pins Configuration Register 1 */
- {0x0008,0xe5}, /* General IO Pins Control Register 0 */
- {0x0009,0x1f}, /* General IO Pins Control Register 1 */
- {0x0010,0x02}, /* Memory Clock Configuration Register */
- {0x0014,0x10}, /* LCD Pixel Clock Configuration Register */
- {0x0018,0x02}, /* CRT/TV Pixel Clock Configuration Register */
- {0x001C,0x02}, /* MediaPlug Clock Configuration Register */
- {0x001E,0x01}, /* CPU To Memory Wait State Select Register */
- {0x0021,0x04}, /* DRAM Refresh Rate Register */
- {0x002A,0x00}, /* DRAM Timings Control Register 0 */
- {0x002B,0x01}, /* DRAM Timings Control Register 1 */
- {0x0020,0x80}, /* Memory Configuration Register */
- {0x0030,0x25}, /* Panel Type Register */
- {0x0031,0x00}, /* MOD Rate Register */
- {0x0032,0x4F}, /* LCD Horizontal Display Width Register */
- {0x0034,0x13}, /* LCD Horizontal Non-Display Period Register */
- {0x0035,0x01}, /* TFT FPLINE Start Position Register */
- {0x0036,0x0B}, /* TFT FPLINE Pulse Width Register */
- {0x0038,0xDF}, /* LCD Vertical Display Height Register 0 */
- {0x0039,0x01}, /* LCD Vertical Display Height Register 1 */
- {0x003A,0x2C}, /* LCD Vertical Non-Display Period Register */
- {0x003B,0x00}, /* TFT FPFRAME Start Position Register */
- {0x003C,0x01}, /* TFT FPFRAME Pulse Width Register */
- {0x0040,0x03}, /* LCD Display Mode Register */
- {0x0041,0x02}, /* LCD Miscellaneous Register */
- {0x0042,0x00}, /* LCD Display Start Address Register 0 */
- {0x0043,0x00}, /* LCD Display Start Address Register 1 */
- {0x0044,0x00}, /* LCD Display Start Address Register 2 */
- {0x0046,0x40}, /* LCD Memory Address Offset Register 0 */
- {0x0047,0x01}, /* LCD Memory Address Offset Register 1 */
- {0x0048,0x00}, /* LCD Pixel Panning Register */
- {0x004A,0x00}, /* LCD Display FIFO High Threshold Control Register */
- {0x004B,0x00}, /* LCD Display FIFO Low Threshold Control Register */
- {0x0050,0x4F}, /* CRT/TV Horizontal Display Width Register */
- {0x0052,0x13}, /* CRT/TV Horizontal Non-Display Period Register */
- {0x0053,0x01}, /* CRT/TV HRTC Start Position Register */
- {0x0054,0x0B}, /* CRT/TV HRTC Pulse Width Register */
- {0x0056,0xDF}, /* CRT/TV Vertical Display Height Register 0 */
- {0x0057,0x01}, /* CRT/TV Vertical Display Height Register 1 */
- {0x0058,0x2B}, /* CRT/TV Vertical Non-Display Period Register */
- {0x0059,0x09}, /* CRT/TV VRTC Start Position Register */
- {0x005A,0x01}, /* CRT/TV VRTC Pulse Width Register */
- {0x005B,0x00}, /* TV Output Control Register */
- {0x0060,0x03}, /* CRT/TV Display Mode Register */
- {0x0062,0x00}, /* CRT/TV Display Start Address Register 0 */
- {0x0063,0x00}, /* CRT/TV Display Start Address Register 1 */
- {0x0064,0x00}, /* CRT/TV Display Start Address Register 2 */
- {0x0066,0x40}, /* CRT/TV Memory Address Offset Register 0 */
- {0x0067,0x01}, /* CRT/TV Memory Address Offset Register 1 */
- {0x0068,0x00}, /* CRT/TV Pixel Panning Register */
- {0x006A,0x00}, /* CRT/TV Display FIFO High Threshold Control Register */
- {0x006B,0x00}, /* CRT/TV Display FIFO Low Threshold Control Register */
- {0x0070,0x00}, /* LCD Ink/Cursor Control Register */
- {0x0071,0x00}, /* LCD Ink/Cursor Start Address Register */
- {0x0072,0x00}, /* LCD Cursor X Position Register 0 */
- {0x0073,0x00}, /* LCD Cursor X Position Register 1 */
- {0x0074,0x00}, /* LCD Cursor Y Position Register 0 */
- {0x0075,0x00}, /* LCD Cursor Y Position Register 1 */
- {0x0076,0x00}, /* LCD Ink/Cursor Blue Color 0 Register */
- {0x0077,0x00}, /* LCD Ink/Cursor Green Color 0 Register */
- {0x0078,0x00}, /* LCD Ink/Cursor Red Color 0 Register */
- {0x007A,0x1F}, /* LCD Ink/Cursor Blue Color 1 Register */
- {0x007B,0x3F}, /* LCD Ink/Cursor Green Color 1 Register */
- {0x007C,0x1F}, /* LCD Ink/Cursor Red Color 1 Register */
- {0x007E,0x00}, /* LCD Ink/Cursor FIFO Threshold Register */
- {0x0080,0x00}, /* CRT/TV Ink/Cursor Control Register */
- {0x0081,0x00}, /* CRT/TV Ink/Cursor Start Address Register */
- {0x0082,0x00}, /* CRT/TV Cursor X Position Register 0 */
- {0x0083,0x00}, /* CRT/TV Cursor X Position Register 1 */
- {0x0084,0x00}, /* CRT/TV Cursor Y Position Register 0 */
- {0x0085,0x00}, /* CRT/TV Cursor Y Position Register 1 */
- {0x0086,0x00}, /* CRT/TV Ink/Cursor Blue Color 0 Register */
- {0x0087,0x00}, /* CRT/TV Ink/Cursor Green Color 0 Register */
- {0x0088,0x00}, /* CRT/TV Ink/Cursor Red Color 0 Register */
- {0x008A,0x1F}, /* CRT/TV Ink/Cursor Blue Color 1 Register */
- {0x008B,0x3F}, /* CRT/TV Ink/Cursor Green Color 1 Register */
- {0x008C,0x1F}, /* CRT/TV Ink/Cursor Red Color 1 Register */
- {0x008E,0x00}, /* CRT/TV Ink/Cursor FIFO Threshold Register */
- {0x0100,0x00}, /* BitBlt Control Register 0 */
- {0x0101,0x00}, /* BitBlt Control Register 1 */
- {0x0102,0x00}, /* BitBlt ROP Code/Color Expansion Register */
- {0x0103,0x00}, /* BitBlt Operation Register */
- {0x0104,0x00}, /* BitBlt Source Start Address Register 0 */
- {0x0105,0x00}, /* BitBlt Source Start Address Register 1 */
- {0x0106,0x00}, /* BitBlt Source Start Address Register 2 */
- {0x0108,0x00}, /* BitBlt Destination Start Address Register 0 */
- {0x0109,0x00}, /* BitBlt Destination Start Address Register 1 */
- {0x010A,0x00}, /* BitBlt Destination Start Address Register 2 */
- {0x010C,0x00}, /* BitBlt Memory Address Offset Register 0 */
- {0x010D,0x00}, /* BitBlt Memory Address Offset Register 1 */
- {0x0110,0x00}, /* BitBlt Width Register 0 */
- {0x0111,0x00}, /* BitBlt Width Register 1 */
- {0x0112,0x00}, /* BitBlt Height Register 0 */
- {0x0113,0x00}, /* BitBlt Height Register 1 */
- {0x0114,0x00}, /* BitBlt Background Color Register 0 */
- {0x0115,0x00}, /* BitBlt Background Color Register 1 */
- {0x0118,0x00}, /* BitBlt Foreground Color Register 0 */
- {0x0119,0x00}, /* BitBlt Foreground Color Register 1 */
- {0x01E0,0x00}, /* Look-Up Table Mode Register */
- {0x01E2,0x00}, /* Look-Up Table Address Register */
- {0x01E4,0x00}, /* Look-Up Table Data Register */
- {0x01F0,0x10}, /* Power Save Configuration Register */
- {0x01F1,0x00}, /* Power Save Status Register */
- {0x01F4,0x00}, /* CPU-to-Memory Access Watchdog Timer Register */
- {0x01FC,0x01}, /* Display Mode Register */
- {0, 0}
-};
-#endif /* CONFIG_VIDEO_SED13806_8BPP */
-
-#ifdef CONFIG_VIDEO_SED13806_16BPP
-
-static const S1D_REGS init_regs [] =
-{
- {0x0001,0x00}, /* Miscellaneous Register */
- {0x01FC,0x00}, /* Display Mode Register */
- {0x0004,0x1b}, /* General IO Pins Configuration Register 0 */
- {0x0005,0x00}, /* General IO Pins Configuration Register 1 */
- {0x0008,0xe5}, /* General IO Pins Control Register 0 */
- {0x0009,0x1f}, /* General IO Pins Control Register 1 */
- {0x0010,0x02}, /* Memory Clock Configuration Register */
- {0x0014,0x10}, /* LCD Pixel Clock Configuration Register */
- {0x0018,0x02}, /* CRT/TV Pixel Clock Configuration Register */
- {0x001C,0x02}, /* MediaPlug Clock Configuration Register */
- {0x001E,0x01}, /* CPU To Memory Wait State Select Register */
- {0x0021,0x04}, /* DRAM Refresh Rate Register */
- {0x002A,0x00}, /* DRAM Timings Control Register 0 */
- {0x002B,0x01}, /* DRAM Timings Control Register 1 */
- {0x0020,0x80}, /* Memory Configuration Register */
- {0x0030,0x25}, /* Panel Type Register */
- {0x0031,0x00}, /* MOD Rate Register */
- {0x0032,0x4F}, /* LCD Horizontal Display Width Register */
- {0x0034,0x13}, /* LCD Horizontal Non-Display Period Register */
- {0x0035,0x01}, /* TFT FPLINE Start Position Register */
- {0x0036,0x0B}, /* TFT FPLINE Pulse Width Register */
- {0x0038,0xDF}, /* LCD Vertical Display Height Register 0 */
- {0x0039,0x01}, /* LCD Vertical Display Height Register 1 */
- {0x003A,0x2C}, /* LCD Vertical Non-Display Period Register */
- {0x003B,0x00}, /* TFT FPFRAME Start Position Register */
- {0x003C,0x01}, /* TFT FPFRAME Pulse Width Register */
- {0x0040,0x05}, /* LCD Display Mode Register */
- {0x0041,0x02}, /* LCD Miscellaneous Register */
- {0x0042,0x00}, /* LCD Display Start Address Register 0 */
- {0x0043,0x00}, /* LCD Display Start Address Register 1 */
- {0x0044,0x00}, /* LCD Display Start Address Register 2 */
- {0x0046,0x80}, /* LCD Memory Address Offset Register 0 */
- {0x0047,0x02}, /* LCD Memory Address Offset Register 1 */
- {0x0048,0x00}, /* LCD Pixel Panning Register */
- {0x004A,0x00}, /* LCD Display FIFO High Threshold Control Register */
- {0x004B,0x00}, /* LCD Display FIFO Low Threshold Control Register */
- {0x0050,0x4F}, /* CRT/TV Horizontal Display Width Register */
- {0x0052,0x13}, /* CRT/TV Horizontal Non-Display Period Register */
- {0x0053,0x01}, /* CRT/TV HRTC Start Position Register */
- {0x0054,0x0B}, /* CRT/TV HRTC Pulse Width Register */
- {0x0056,0xDF}, /* CRT/TV Vertical Display Height Register 0 */
- {0x0057,0x01}, /* CRT/TV Vertical Display Height Register 1 */
- {0x0058,0x2B}, /* CRT/TV Vertical Non-Display Period Register */
- {0x0059,0x09}, /* CRT/TV VRTC Start Position Register */
- {0x005A,0x01}, /* CRT/TV VRTC Pulse Width Register */
- {0x005B,0x00}, /* TV Output Control Register */
- {0x0060,0x05}, /* CRT/TV Display Mode Register */
- {0x0062,0x00}, /* CRT/TV Display Start Address Register 0 */
- {0x0063,0x00}, /* CRT/TV Display Start Address Register 1 */
- {0x0064,0x00}, /* CRT/TV Display Start Address Register 2 */
- {0x0066,0x80}, /* CRT/TV Memory Address Offset Register 0 */
- {0x0067,0x02}, /* CRT/TV Memory Address Offset Register 1 */
- {0x0068,0x00}, /* CRT/TV Pixel Panning Register */
- {0x006A,0x00}, /* CRT/TV Display FIFO High Threshold Control Register */
- {0x006B,0x00}, /* CRT/TV Display FIFO Low Threshold Control Register */
- {0x0070,0x00}, /* LCD Ink/Cursor Control Register */
- {0x0071,0x00}, /* LCD Ink/Cursor Start Address Register */
- {0x0072,0x00}, /* LCD Cursor X Position Register 0 */
- {0x0073,0x00}, /* LCD Cursor X Position Register 1 */
- {0x0074,0x00}, /* LCD Cursor Y Position Register 0 */
- {0x0075,0x00}, /* LCD Cursor Y Position Register 1 */
- {0x0076,0x00}, /* LCD Ink/Cursor Blue Color 0 Register */
- {0x0077,0x00}, /* LCD Ink/Cursor Green Color 0 Register */
- {0x0078,0x00}, /* LCD Ink/Cursor Red Color 0 Register */
- {0x007A,0x1F}, /* LCD Ink/Cursor Blue Color 1 Register */
- {0x007B,0x3F}, /* LCD Ink/Cursor Green Color 1 Register */
- {0x007C,0x1F}, /* LCD Ink/Cursor Red Color 1 Register */
- {0x007E,0x00}, /* LCD Ink/Cursor FIFO Threshold Register */
- {0x0080,0x00}, /* CRT/TV Ink/Cursor Control Register */
- {0x0081,0x00}, /* CRT/TV Ink/Cursor Start Address Register */
- {0x0082,0x00}, /* CRT/TV Cursor X Position Register 0 */
- {0x0083,0x00}, /* CRT/TV Cursor X Position Register 1 */
- {0x0084,0x00}, /* CRT/TV Cursor Y Position Register 0 */
- {0x0085,0x00}, /* CRT/TV Cursor Y Position Register 1 */
- {0x0086,0x00}, /* CRT/TV Ink/Cursor Blue Color 0 Register */
- {0x0087,0x00}, /* CRT/TV Ink/Cursor Green Color 0 Register */
- {0x0088,0x00}, /* CRT/TV Ink/Cursor Red Color 0 Register */
- {0x008A,0x1F}, /* CRT/TV Ink/Cursor Blue Color 1 Register */
- {0x008B,0x3F}, /* CRT/TV Ink/Cursor Green Color 1 Register */
- {0x008C,0x1F}, /* CRT/TV Ink/Cursor Red Color 1 Register */
- {0x008E,0x00}, /* CRT/TV Ink/Cursor FIFO Threshold Register */
- {0x0100,0x00}, /* BitBlt Control Register 0 */
- {0x0101,0x00}, /* BitBlt Control Register 1 */
- {0x0102,0x00}, /* BitBlt ROP Code/Color Expansion Register */
- {0x0103,0x00}, /* BitBlt Operation Register */
- {0x0104,0x00}, /* BitBlt Source Start Address Register 0 */
- {0x0105,0x00}, /* BitBlt Source Start Address Register 1 */
- {0x0106,0x00}, /* BitBlt Source Start Address Register 2 */
- {0x0108,0x00}, /* BitBlt Destination Start Address Register 0 */
- {0x0109,0x00}, /* BitBlt Destination Start Address Register 1 */
- {0x010A,0x00}, /* BitBlt Destination Start Address Register 2 */
- {0x010C,0x00}, /* BitBlt Memory Address Offset Register 0 */
- {0x010D,0x00}, /* BitBlt Memory Address Offset Register 1 */
- {0x0110,0x00}, /* BitBlt Width Register 0 */
- {0x0111,0x00}, /* BitBlt Width Register 1 */
- {0x0112,0x00}, /* BitBlt Height Register 0 */
- {0x0113,0x00}, /* BitBlt Height Register 1 */
- {0x0114,0x00}, /* BitBlt Background Color Register 0 */
- {0x0115,0x00}, /* BitBlt Background Color Register 1 */
- {0x0118,0x00}, /* BitBlt Foreground Color Register 0 */
- {0x0119,0x00}, /* BitBlt Foreground Color Register 1 */
- {0x01E0,0x01}, /* Look-Up Table Mode Register */
- {0x01E2,0x00}, /* Look-Up Table Address Register */
- {0x01E4,0x00}, /* Look-Up Table Data Register */
- {0x01F0,0x10}, /* Power Save Configuration Register */
- {0x01F1,0x00}, /* Power Save Status Register */
- {0x01F4,0x00}, /* CPU-to-Memory Access Watchdog Timer Register */
- {0x01FC,0x01}, /* Display Mode Register */
- {0, 0}
-};
-
-#endif /* CONFIG_VIDEO_SED13806_16BPP */
-#endif /* CONFIG_NEC_NL6448BC20 */
-
-
-#ifdef CONFIG_CONSOLE_EXTRA_INFO
-
-/*-----------------------------------------------------------------------------
- * video_get_info_str -- setup a board string: type, speed, etc.
- * line_number= location to place info string beside logo
- * info= buffer for info string
- *-----------------------------------------------------------------------------
- */
-void video_get_info_str (int line_number, char *info)
-{
- if (line_number == 1) {
- strcpy (info, " RPXClassic board");
- }
- else {
- info [0] = '\0';
- }
-
-}
-#endif
-
-/*-----------------------------------------------------------------------------
- * board_video_init -- init de l'EPSON, config du CS
- *-----------------------------------------------------------------------------
- */
-unsigned int board_video_init (void)
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
-
- /* Program ECCX registers */
- *(ECCX_CSR12) |= ECCX_860;
- *(ECCX_CSR8) |= ECCX_BE | ECCX_CS2;
- *(ECCX_CSR8) |= ECCX_ENEPSON;
-
- memctl->memc_or2 = SED13806_OR;
- memctl->memc_br2 = SED13806_REG_ADDR | SED13806_ACCES;
-
- return (SED13806_REG_ADDR);
-}
-
-/*-----------------------------------------------------------------------------
- * board_validate_screen --
- *-----------------------------------------------------------------------------
- */
-void board_validate_screen (unsigned int base)
-{
- /* Activate the panel bias power */
- *(volatile unsigned char *)(base + REG_GPIO_CTRL) = 0x80;
-}
-/*-----------------------------------------------------------------------------
- * board_get_regs --
- *-----------------------------------------------------------------------------
- */
-const S1D_REGS *board_get_regs (void)
-{
- return (init_regs);
-}
-/*-----------------------------------------------------------------------------
- * board_get_width --
- *-----------------------------------------------------------------------------
- */
-int board_get_width (void)
-{
- return (DISPLAY_WIDTH);
-}
-
-/*-----------------------------------------------------------------------------
- * board_get_height --
- *-----------------------------------------------------------------------------
- */
-int board_get_height (void)
-{
- return (DISPLAY_HEIGHT);
-}
-
-#endif /* CONFIG_VIDEO_SED13806 */
diff --git a/board/RPXClassic/flash.c b/board/RPXClassic/flash.c
deleted file mode 100644
index 2e0b8f9588..0000000000
--- a/board/RPXClassic/flash.c
+++ /dev/null
@@ -1,447 +0,0 @@
-/*
- * (C) Copyright 2001
- * Stäubli Faverges - <www.staubli.com>
- * Pierre AUBERT p.aubert@staubli.com
- * U-Boot port on RPXClassic LF (CLLF_BW31) board
- *
- * RPXClassic uses Am29DL323B flash memory with 2 banks
- *
- *
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-
-#include <common.h>
-#include <mpc8xx.h>
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (vu_long *addr, flash_info_t *info);
-static int write_word (flash_info_t *info, ulong dest, ulong data);
-static void flash_get_offsets (ulong base, flash_info_t *info);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- unsigned long size_b0 ;
- int i;
-
- /* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- size_b0 = flash_get_size((vu_long *)CFG_FLASH_BASE, &flash_info[0]);
-
-
- flash_get_offsets (CFG_FLASH_BASE, &flash_info[0]);
-
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
- /* monitor protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+monitor_flash_len-1,
- &flash_info[0]);
-#endif
-
- flash_info[0].size = size_b0;
-
- return (size_b0);
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_get_offsets (ulong base, flash_info_t *info)
-{
- int i;
-
- if (info->flash_id & FLASH_BTYPE) {
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00008000;
- info->start[2] = base + 0x00010000;
- info->start[3] = base + 0x00018000;
- info->start[4] = base + 0x00020000;
- info->start[5] = base + 0x00028000;
- info->start[6] = base + 0x00030000;
- info->start[7] = base + 0x00038000;
- for (i = 8; i < info->sector_count; i++) {
- info->start[i] = base + ((i-7) * 0x00040000) ;
- }
- }
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD: printf ("AMD "); break;
- default: printf ("Unknown Vendor "); break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AMDL323B:
- printf ("AMDL323DB (16 Mbytes, bottom boot sect)\n");
- break;
- default:
- printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " "
- );
- }
- printf ("\n");
-}
-
-/*-----------------------------------------------------------------------
- */
-
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-
-static ulong flash_get_size (vu_long *addr, flash_info_t *info)
-{
- short i;
- ulong value;
- ulong base = (ulong)addr;
-
- /* Reset flash componeny */
- addr [0] = 0xf0f0f0f0;
-
- /* Write auto select command: read Manufacturer ID */
- addr[0xAAA] = 0xAAAAAAAA ;
- addr[0x555] = 0x55555555 ;
- addr[0xAAA] = 0x90909090 ;
-
- value = addr[0] ;
-
- switch (value & 0x00FF00FF) {
- case AMD_MANUFACT:
- info->flash_id = FLASH_MAN_AMD;
- break;
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- return (0); /* no or unknown flash */
- }
-
- value = addr[2] ; /* device ID */
-
- switch (value & 0x00FF00FF) {
- case (AMD_ID_DL323B & 0x00FF00FF):
- info->flash_id += FLASH_AMDL323B;
- info->sector_count = 71;
- info->size = 0x01000000; /* 16 Mb */
-
- break;
- default:
- info->flash_id = FLASH_UNKNOWN;
- return (0); /* => no or unknown flash */
-
- }
- /* set up sector start address table */
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00008000;
- info->start[2] = base + 0x00010000;
- info->start[3] = base + 0x00018000;
- info->start[4] = base + 0x00020000;
- info->start[5] = base + 0x00028000;
- info->start[6] = base + 0x00030000;
- info->start[7] = base + 0x00038000;
- for (i = 8; i < info->sector_count; i++) {
- info->start[i] = base + ((i-7) * 0x00040000) ;
- }
-
- /* check for protected sectors */
- for (i = 0; i < 23; i++) {
- /* read sector protection at sector address, (A7 .. A0) = 0x02 */
- /* D0 = 1 if protected */
- addr = (volatile unsigned long *)(info->start[i]);
- info->protect[i] = addr[4] & 1 ;
- }
- /* Check for protected sectors in the 2nd bank */
- addr[0x100AAA] = 0xAAAAAAAA ;
- addr[0x100555] = 0x55555555 ;
- addr[0x100AAA] = 0x90909090 ;
-
- for (i = 23; i < info->sector_count; i++) {
- /* read sector protection at sector address, (A7 .. A0) = 0x02 */
- /* D0 = 1 if protected */
- addr = (volatile unsigned long *)(info->start[i]);
- info->protect[i] = addr[4] & 1 ;
- }
-
- /*
- * Prevent writes to uninitialized FLASH.
- */
- if (info->flash_id != FLASH_UNKNOWN) {
- addr = (volatile unsigned long *)info->start[0];
-
- *addr = 0xF0F0F0F0; /* reset bank 1 */
- addr = (volatile unsigned long *)info->start[23];
-
- *addr = 0xF0F0F0F0; /* reset bank 2 */
-
- }
-
- return (info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- vu_long *addr = (vu_long*)(info->start[0]);
- int flag, prot, sect, l_sect;
- ulong start, now, last;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- if ((info->flash_id == FLASH_UNKNOWN) ||
- (info->flash_id > FLASH_AMD_COMP)) {
- printf ("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- l_sect = -1;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[0xAAA] = 0xAAAAAAAA;
- addr[0x555] = 0x55555555;
- addr[0xAAA] = 0x80808080;
- addr[0xAAA] = 0xAAAAAAAA;
- addr[0x555] = 0x55555555;
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr = (vu_long *)(info->start[sect]) ;
- addr[0] = 0x30303030 ;
- l_sect = sect;
- }
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- /*
- * We wait for the last triggered sector
- */
- if (l_sect < 0)
- goto DONE;
-
- start = get_timer (0);
- last = start;
- addr = (vu_long *)(info->start[l_sect]);
- while ((addr[0] & 0x80808080) != 0x80808080) {
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- return 1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- }
-
-DONE:
- /* reset to read mode */
- addr = (vu_long *)info->start[0];
- addr[0] = 0xF0F0F0F0; /* reset bank */
-
- printf (" done\n");
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int i, l, rc;
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
- for (; i<4 && cnt>0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = 0;
- for (i=0; i<4; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- return (write_word(info, wp, data));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word (flash_info_t *info, ulong dest, ulong data)
-{
- vu_long *addr = (vu_long *)(info->start[0]);
- ulong start;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*((vu_long *)dest) & data) != data) {
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[0xAAA] = 0xAAAAAAAA;
- addr[0x555] = 0x55555555;
- addr[0xAAA] = 0xA0A0A0A0;
-
- *((vu_long *)dest) = data;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* data polling for D7 */
- start = get_timer (0);
- while ((*((vu_long *)dest) & 0x80808080) != (data & 0x80808080)) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- return (1);
- }
- }
- return (0);
-}
-
-/*-----------------------------------------------------------------------
- */
diff --git a/board/RPXClassic/u-boot.lds b/board/RPXClassic/u-boot.lds
deleted file mode 100644
index 049f9901f7..0000000000
--- a/board/RPXClassic/u-boot.lds
+++ /dev/null
@@ -1,142 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc8xx/start.o (.text)
- common/dlmalloc.o (.text)
- lib_ppc/ppcstring.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
- lib_generic/zlib.o (.text)
-/* XXX ?
- . = env_offset;
-*/
- common/environment.o(.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/RPXClassic/u-boot.lds.debug b/board/RPXClassic/u-boot.lds.debug
deleted file mode 100644
index ddd4678ee8..0000000000
--- a/board/RPXClassic/u-boot.lds.debug
+++ /dev/null
@@ -1,137 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc8xx/start.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
-
- . = env_offset;
- common/environment.o(.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/RPXlite/Makefile b/board/RPXlite/Makefile
deleted file mode 100644
index 13ce9fc9d2..0000000000
--- a/board/RPXlite/Makefile
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/RPXlite/RPXlite.c b/board/RPXlite/RPXlite.c
deleted file mode 100644
index f37e07b923..0000000000
--- a/board/RPXlite/RPXlite.c
+++ /dev/null
@@ -1,165 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * Yoo. Jonghoon, IPone, yooth@ipone.co.kr
- * U-Boot port on RPXlite board
- *
- * DRAM related UPMA register values are modified.
- * See RPXLite engineering note : 50MHz/60ns - UPM RAM WORDS
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-
-/* ------------------------------------------------------------------------- */
-
-static long int dram_size (long int, long int *, long int);
-
-/* ------------------------------------------------------------------------- */
-
-#define _NOT_USED_ 0xFFFFCC25
-
-const uint sdram_table[] = {
- /*
- * Single Read. (Offset 00h in UPMA RAM)
- */
- 0xCFFFCC24, 0x0FFFCC04, 0X0CAFCC04, 0X03AFCC08,
- 0x3FBFCC27, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /*
- * Burst Read. (Offset 08h in UPMA RAM)
- */
- 0xCFFFCC24, 0x0FFFCC04, 0x0CAFCC84, 0x03AFCC88,
- 0x3FBFCC27, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /*
- * Single Write. (Offset 18h in UPMA RAM)
- */
- 0xCFFFCC24, 0x0FFFCC04, 0x0CFFCC04, 0x03FFCC00,
- 0x3FFFCC27, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /*
- * Burst Write. (Offset 20h in UPMA RAM)
- */
- 0xCFFFCC24, 0x0FFFCC04, 0x0CFFCC80, 0x03FFCC8C,
- 0x0CFFCC00, 0x33FFCC27, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_,
-
- /*
- * Refresh. (Offset 30h in UPMA RAM)
- */
- 0xC0FFCC24, 0x03FFCC24, 0x0FFFCC24, 0x0FFFCC24,
- 0x3FFFCC27, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /*
- * Exception. (Offset 3Ch in UPMA RAM)
- */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_
-};
-
-/* ------------------------------------------------------------------------- */
-
-
-/*
- * Check Board Identity:
- */
-
-int checkboard (void)
-{
- puts ("Board: RPXlite\n");
- return (0);
-}
-
-/* ------------------------------------------------------------------------- */
-
-long int initdram (int board_type)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- long int size10;
-
- upmconfig (UPMA, (uint *) sdram_table,
- sizeof (sdram_table) / sizeof (uint));
-
- /* Refresh clock prescalar */
- memctl->memc_mptpr = CFG_MPTPR;
-
- memctl->memc_mar = 0x00000000;
-
- /* Map controller banks 1 to the SDRAM bank */
- memctl->memc_or1 = CFG_OR1_PRELIM;
- memctl->memc_br1 = CFG_BR1_PRELIM;
-
- memctl->memc_mamr = CFG_MAMR_10COL & (~(MAMR_PTAE)); /* no refresh yet */
-
- udelay (200);
-
- /* perform SDRAM initializsation sequence */
-
- memctl->memc_mcr = 0x80002230; /* SDRAM bank 0 - refresh twice */
- udelay (1);
-
- memctl->memc_mamr |= MAMR_PTAE; /* enable refresh */
-
- udelay (1000);
-
- /* Check Bank 0 Memory Size
- * try 10 column mode
- */
-
- size10 = dram_size (CFG_MAMR_10COL, SDRAM_BASE_PRELIM,
- SDRAM_MAX_SIZE);
-
- return (size10);
-}
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Check memory range for valid RAM. A simple memory test determines
- * the actually available RAM size between addresses `base' and
- * `base + maxsize'. Some (not all) hardware errors are detected:
- * - short between address lines
- * - short between data lines
- */
-
-static long int dram_size (long int mamr_value, long int *base,
- long int maxsize)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
-
- memctl->memc_mamr = mamr_value;
-
- return (get_ram_size (base, maxsize));
-}
diff --git a/board/RPXlite/config.mk b/board/RPXlite/config.mk
deleted file mode 100644
index 6536b77616..0000000000
--- a/board/RPXlite/config.mk
+++ /dev/null
@@ -1,28 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# RPXlite boards
-#
-
-TEXT_BASE = 0xfff00000
diff --git a/board/RPXlite/flash.c b/board/RPXlite/flash.c
deleted file mode 100644
index 846794df3f..0000000000
--- a/board/RPXlite/flash.c
+++ /dev/null
@@ -1,524 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * Yoo. Jonghoon, IPone, yooth@ipone.co.kr
- * U-Boot port on RPXlite board
- *
- * Some of flash control words are modified. (from 2x16bit device
- * to 4x8bit device)
- * RPXLite board I tested has only 4 AM29LV800BB devices. Other devices
- * are not tested.
- *
- * (?) Does an RPXLite board which
- * does not use AM29LV800 flash memory exist ?
- * I don't know...
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (vu_long *addr, flash_info_t *info);
-static int write_word (flash_info_t *info, ulong dest, ulong data);
-static void flash_get_offsets (ulong base, flash_info_t *info);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
-/* volatile immap_t *immap = (immap_t *)CFG_IMMR; */
-/* volatile memctl8xx_t *memctl = &immap->im_memctl; */
- unsigned long size_b0 ;
- int i;
-
- /* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* Static FLASH Bank configuration here - FIXME XXX */
-/*
- size_b0 = flash_get_size((vu_long *)FLASH_BASE_DEBUG, &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size_b0, size_b0<<20);
- }
-*/
- /* Remap FLASH according to real size */
-/*%%%
- memctl->memc_or0 = CFG_OR_TIMING_FLASH | (-size_b0 & 0xFFFF8000);
- memctl->memc_br0 = (CFG_FLASH_BASE & BR_BA_MSK) | BR_MS_GPCM | BR_V;
-%%%*/
- /* Re-do sizing to get full correct info */
-
- size_b0 = flash_get_size((vu_long *)CFG_FLASH_BASE, &flash_info[0]);
- flash_get_offsets (CFG_FLASH_BASE, &flash_info[0]);
-
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
- /* monitor protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+monitor_flash_len-1,
- &flash_info[0]);
-#endif
-
- flash_info[0].size = size_b0;
-
- return (size_b0);
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_get_offsets (ulong base, flash_info_t *info)
-{
- int i;
-
- /* set up sector start address table */
- if (info->flash_id & FLASH_BTYPE) {
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00010000;
- info->start[2] = base + 0x00018000;
- info->start[3] = base + 0x00020000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] = base + ((i-3) * 0x00040000) ;
- }
- } else {
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- info->start[i--] = base + info->size - 0x00010000;
- info->start[i--] = base + info->size - 0x00018000;
- info->start[i--] = base + info->size - 0x00020000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00040000;
- }
- }
-
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD: printf ("AMD "); break;
- case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
- default: printf ("Unknown Vendor "); break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM400B: printf ("AM29LV400B (4 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM400T: printf ("AM29LV400T (4 Mbit, top boot sector)\n");
- break;
- case FLASH_AM800B: printf ("AM29LV800B (8 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM800T: printf ("AM29LV800T (8 Mbit, top boot sector)\n");
- break;
- case FLASH_AM160B: printf ("AM29LV160B (16 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM160T: printf ("AM29LV160T (16 Mbit, top boot sector)\n");
- break;
- case FLASH_AM320B: printf ("AM29LV320B (32 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM320T: printf ("AM29LV320T (32 Mbit, top boot sector)\n");
- break;
- default: printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " "
- );
- }
- printf ("\n");
- return;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-
-static ulong flash_get_size (vu_long *addr, flash_info_t *info)
-{
- short i;
- ulong value;
- ulong base = (ulong)addr;
-
- /* Write auto select command: read Manufacturer ID */
- addr[0xAAA] = 0x00AA00AA ;
- addr[0x555] = 0x00550055 ;
- addr[0xAAA] = 0x00900090 ;
-
- value = addr[0] ;
-
- switch (value & 0x00FF00FF) {
- case AMD_MANUFACT:
- info->flash_id = FLASH_MAN_AMD;
- break;
- case FUJ_MANUFACT:
- info->flash_id = FLASH_MAN_FUJ;
- break;
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- return (0); /* no or unknown flash */
- }
-
- value = addr[2] ; /* device ID */
-
- switch (value & 0x00FF00FF) {
- case (AMD_ID_LV400T & 0x00FF00FF):
- info->flash_id += FLASH_AM400T;
- info->sector_count = 11;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case (AMD_ID_LV400B & 0x00FF00FF):
- info->flash_id += FLASH_AM400B;
- info->sector_count = 11;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case (AMD_ID_LV800T & 0x00FF00FF):
- info->flash_id += FLASH_AM800T;
- info->sector_count = 19;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case (AMD_ID_LV800B & 0x00FF00FF):
- info->flash_id += FLASH_AM800B;
- info->sector_count = 19;
- info->size = 0x00400000; /*%%% Size doubled by yooth */
- break; /* => 4 MB */
-
- case (AMD_ID_LV160T & 0x00FF00FF):
- info->flash_id += FLASH_AM160T;
- info->sector_count = 35;
- info->size = 0x00400000;
- break; /* => 4 MB */
-
- case (AMD_ID_LV160B & 0x00FF00FF):
- info->flash_id += FLASH_AM160B;
- info->sector_count = 35;
- info->size = 0x00400000;
- break; /* => 4 MB */
-#if 0 /* enable when device IDs are available */
- case AMD_ID_LV320T:
- info->flash_id += FLASH_AM320T;
- info->sector_count = 67;
- info->size = 0x00800000;
- break; /* => 8 MB */
-
- case AMD_ID_LV320B:
- info->flash_id += FLASH_AM320B;
- info->sector_count = 67;
- info->size = 0x00800000;
- break; /* => 8 MB */
-#endif
- default:
- info->flash_id = FLASH_UNKNOWN;
- return (0); /* => no or unknown flash */
-
- }
- /*%%% sector start address modified */
- /* set up sector start address table */
- if (info->flash_id & FLASH_BTYPE) {
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00010000;
- info->start[2] = base + 0x00018000;
- info->start[3] = base + 0x00020000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] = base + ((i-3) * 0x00040000) ;
- }
- } else {
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- info->start[i--] = base + info->size - 0x00010000;
- info->start[i--] = base + info->size - 0x00018000;
- info->start[i--] = base + info->size - 0x00020000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00040000;
- }
- }
-
- /* check for protected sectors */
- for (i = 0; i < info->sector_count; i++) {
- /* read sector protection at sector address, (A7 .. A0) = 0x02 */
- /* D0 = 1 if protected */
- addr = (volatile unsigned long *)(info->start[i]);
- info->protect[i] = addr[4] & 1 ;
- }
-
- /*
- * Prevent writes to uninitialized FLASH.
- */
- if (info->flash_id != FLASH_UNKNOWN) {
- addr = (volatile unsigned long *)info->start[0];
-
- *addr = 0xF0F0F0F0; /* reset bank */
- }
-
- return (info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- vu_long *addr = (vu_long*)(info->start[0]);
- int flag, prot, sect, l_sect;
- ulong start, now, last;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- if ((info->flash_id == FLASH_UNKNOWN) ||
- (info->flash_id > FLASH_AMD_COMP)) {
- printf ("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- l_sect = -1;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[0xAAA] = 0xAAAAAAAA;
- addr[0x555] = 0x55555555;
- addr[0xAAA] = 0x80808080;
- addr[0xAAA] = 0xAAAAAAAA;
- addr[0x555] = 0x55555555;
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr = (vu_long *)(info->start[sect]) ;
- addr[0] = 0x30303030 ;
- l_sect = sect;
- }
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- /*
- * We wait for the last triggered sector
- */
- if (l_sect < 0)
- goto DONE;
-
- start = get_timer (0);
- last = start;
- addr = (vu_long *)(info->start[l_sect]);
- while ((addr[0] & 0x80808080) != 0x80808080) {
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- return 1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- }
-
-DONE:
- /* reset to read mode */
- addr = (vu_long *)info->start[0];
- addr[0] = 0xF0F0F0F0; /* reset bank */
-
- printf (" done\n");
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int i, l, rc;
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
- for (; i<4 && cnt>0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = 0;
- for (i=0; i<4; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- return (write_word(info, wp, data));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word (flash_info_t *info, ulong dest, ulong data)
-{
- vu_long *addr = (vu_long *)(info->start[0]);
- ulong start;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*((vu_long *)dest) & data) != data) {
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[0xAAA] = 0xAAAAAAAA;
- addr[0x555] = 0x55555555;
- addr[0xAAA] = 0xA0A0A0A0;
-
- *((vu_long *)dest) = data;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* data polling for D7 */
- start = get_timer (0);
- while ((*((vu_long *)dest) & 0x80808080) != (data & 0x80808080)) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- return (1);
- }
- }
- return (0);
-}
-
-/*-----------------------------------------------------------------------
- */
diff --git a/board/RPXlite/u-boot.lds b/board/RPXlite/u-boot.lds
deleted file mode 100644
index 049f9901f7..0000000000
--- a/board/RPXlite/u-boot.lds
+++ /dev/null
@@ -1,142 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc8xx/start.o (.text)
- common/dlmalloc.o (.text)
- lib_ppc/ppcstring.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
- lib_generic/zlib.o (.text)
-/* XXX ?
- . = env_offset;
-*/
- common/environment.o(.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/RPXlite/u-boot.lds.debug b/board/RPXlite/u-boot.lds.debug
deleted file mode 100644
index ddd4678ee8..0000000000
--- a/board/RPXlite/u-boot.lds.debug
+++ /dev/null
@@ -1,137 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc8xx/start.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
-
- . = env_offset;
- common/environment.o(.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/RPXlite_dw/Makefile b/board/RPXlite_dw/Makefile
deleted file mode 100644
index d45702091f..0000000000
--- a/board/RPXlite_dw/Makefile
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# (C) Copyright 2000-2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/RPXlite_dw/README b/board/RPXlite_dw/README
deleted file mode 100644
index 28bcb318e8..0000000000
--- a/board/RPXlite_dw/README
+++ /dev/null
@@ -1,161 +0,0 @@
-
-After following the step of Yoo. Jonghoon and Wolfgang Denk,
-I ported u-boot on RPXlite DW version board: RPXlite_DW or LITE_DW.
-
-There are at least three differences between the Yoo-ported RPXlite and the RPXlite_DW.
-
-Board(in U-Boot) version(in EmbeddedPlanet) CPU SDRAM FLASH
-RPXlite RPXlite CW 850 16MB 4MB
-RPXlite_DW RPXlite DW(EP 823 H1 DW) 823e 64MB 16MB
-
-This fireware is specially coded for EmbeddedPlanet Co. Software Development
-Platform(RPXlite DW),which has a NEC NL6448BC20-08 LCD panel.
-
-It has the following three features:
-
-1. 64MHz/48MHz system frequence setting options.
-The default setting is 48MHz.To get a 64MHz u-boot,just add
-'64' in make command,like
-
-make distclean
-make RPXlite_DW_64_config
-make all
-
-2. CFG_ENV_IS_IN_FLASH/CFG_ENV_IS_IN_NVRAM
-
-The default environment parameter is stored in FLASH because it is a common choice for
-environment parameter.So I make NVRAM as backup parameter storeage.The reason why I
-didn't use EEPROM for ENV is that PlanetCore V2.0 use EEPROM as environment parameter
-home.Because of the possibility of using two firewares on this board,I didn't
-'disturb' EEPROM.To get NVRAM support,you may use the following build command:
-
-make distclean
-make RPXlite_DW_NVRAM_config
-make all
-
-3. LCD panel support
-
-To support the Platform better,I added LCD panel(NL6448BC20-08) function.
-For the convenience of debug, CONFIG_PERBOOT was supported. So you just
-perss ENTER if you want to get a serial console in boot downcounting.
-Then you can switch to LCD and serial console freely just typing
-'run lcd' or 'run ser'. They are only vaild when CONFIG_LCD was enabled.
-
-To get a LCD support u-boot,you can do the following:
-
-make distclean
-make RPXlite_DW_LCD_config
-make all
-
-~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-The basic make commands could be:
-
-make RPXlite_DW_config
-make RPXlite_DW_64_config
-make RPXlite_DW_LCD_config
-make RPXlite_DW_NVRAM_config
-
-BTW,you can combine the above features together and get a workable u-boot to meet your need.
-For example,to get a 64MHZ && ENV_IS_IN_FLASH && LCD panel support u-boot,you can type:
-
-make RPXlite_DW_NVRAM_64_LCD_config
-make all
-
-So other combining make commands could be:
-
-make RPXlite_DW_NVRAM_64_config
-make RPXlite_DW_NVRAM_LCD_config
-make RPXlite_DW_64_LCD_config
-
-~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-
-The boot process by "make RPXlite_DW_config" could be:
-
-U-Boot 1.1.2 (Aug 29 2004 - 15:11:27)
-
-CPU: PPC823EZTnnB2 at 48 MHz: 16 kB I-Cache 8 kB D-Cache
-Board: RPXlite_DW
-DRAM: 64 MB
-FLASH: 16 MB
-*** Warning - bad CRC, using default environment
-
-In: serial
-Out: serial
-Err: serial
-Net: SCC ETHERNET
-u-boot>
-
-~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-
-A word on the U-Boot enviroment variable setting and usage :
-
-In the beginning, you could just need very simple defult environment variable setting,
-like[include/configs/RPXlite.h] :
-
-#define CONFIG_BOOTCOMMAND \
- "bootp; " \
- "setenv bootargs root=/dev/nfs rw nfsroot=${serverip}:${rootpath} " \
- "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off; " \
- "bootm"
-
-This is enough for kernel NFS test. But as debug process goes on, you would expect
-to save some time on environment variable setting and u-boot/kernel updating.
-So the default environment variable setting would become more complicated. Just like
-the one I did in include/configs/RPXlite_DW.h.
-
-Two u-boot commands, ku and uu, should be careful to use. They were designed to update
-kernel and u-boot image file respectively. You must tftp your image to default address
-'100000' and then use them correctly. Yeah, you can create your own command to do this
-job. :-) The example u-boot image updating process could be :
-
-u-boot>t 100000 RPXlite_DW_LCD.bin
-Using SCC ETHERNET device
-TFTP from server 172.16.115.6; our IP address is 172.16.115.7
-Filename 'RPXlite_DW_LCD.bin'.
-Load address: 0x100000
-Loading: #############################
-done
-Bytes transferred = 144700 (2353c hex)
-u-boot>run uu
-Un-Protect Flash Sectors 0-4 in Bank # 1
-Erase Flash Sectors 0-4 in Bank # 1
-.... done
-Copy to Flash... done
-ff000000: 27051956 552d426f 6f742031 2e312e32 '..VU-Boot 1.1.2
-ff000010: 20284175 67203239 20323030 34202d20 (Aug 29 2004 -
-ff000020: 31353a32 303a3238 29000000 00000000 15:20:28).......
-ff000030: 00000000 00000000 00000000 00000000 ................
-ff000040: 00000000 00000000 00000000 00000000 ................
-ff000050: 00000000 00000000 00000000 00000000 ................
-ff000060: 00000000 00000000 00000000 00000000 ................
-ff000070: 00000000 00000000 00000000 00000000 ................
-ff000080: 00000000 00000000 00000000 00000000 ................
-ff000090: 00000000 00000000 00000000 00000000 ................
-ff0000a0: 00000000 00000000 00000000 00000000 ................
-ff0000b0: 00000000 00000000 00000000 00000000 ................
-ff0000c0: 00000000 00000000 00000000 00000000 ................
-ff0000d0: 00000000 00000000 00000000 00000000 ................
-ff0000e0: 00000000 00000000 00000000 00000000 ................
-ff0000f0: 00000000 00000000 00000000 00000000 ................
-u-boot updating finished
-u-boot>
-
-Also for environment updating, 'run eu' could let you erase OLD default environment variable
-and then use the working u-boot environment setting.
-
-~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-
-Finally, if you want to keep the serial port to possible debug on spot for deployment, you
-just need to enable 'DEPLOYMENT' in RPXlite_DW.h as 'DEBUG' does. Only the special string
-defined by CONFIG_AUTOBOOT_STOP_STR like 'st' can stop the autoboot.
-
-I'd like to extend my heartfelt gratitute to kind people for helping me work it out.
-I would particually thank Wolfgang Denk for his nice help.
-
-Enjoy,
-
-Sam Song, samsongshu@yahoo.com.cn
-Institute of Electrical Machinery and Controls
-Shanghai University
-
-Oct. 11, 2004
diff --git a/board/RPXlite_dw/RPXlite_dw.c b/board/RPXlite_dw/RPXlite_dw.c
deleted file mode 100644
index 237c58af36..0000000000
--- a/board/RPXlite_dw/RPXlite_dw.c
+++ /dev/null
@@ -1,180 +0,0 @@
-/*
- * (C) Copyright 2004
- * Sam Song, IEMC. SHU, samsongshu@yahoo.com.cn
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * Sam Song
- * U-Boot port on RPXlite DW board : RPXlite_DW or LITE_DW
- * Tested on working at 64MHz(CPU)/32MHz(BUS),48MHz/24MHz
- * with 64MB, 2 SDRAM Micron chips,MT48LC16M16A2-75.
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-
-/* ------------------------------------------------------------------------- */
-static long int dram_size (long int, long int *, long int);
-/* ------------------------------------------------------------------------- */
-
-#define _NOT_USED_ 0xFFFFCC25
-
-const uint sdram_table[] =
-{
- /*
- * Single Read. (Offset 00h in UPMA RAM)
- */
- 0x0F03CC04, 0x00ACCC24, 0x1FF74C20, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_,
-
- /*
- * Burst Read. (Offset 08h in UPMA RAM)
- */
- 0x0F03CC04, 0x00ACCC24, 0x00FFCC20, 0x00FFCC20,
- 0x01FFCC20, 0x1FF74C20, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_,
-
- /*
- * Single Write. (Offset 18h in UPMA RAM)
- */
- 0x0F03CC02, 0x00AC0C24, 0x1FF74C25, /* last */
- _NOT_USED_, _NOT_USED_, 0x0FA00C34,0x0FFFCC35,
- _NOT_USED_,
-
- /*
- * Burst Write. (Offset 20h in UPMA RAM)
- */
- 0x0F03CC00, 0x00AC0C20, 0x00FFFC20, 0x00FFFC22,
- 0x01FFFC24, 0x1FF74C25, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_,
-
- /*
- * Refresh. (Offset 30h in UPMA RAM)
- */
- 0x0FF0CC24, 0xFFFFCC24, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, 0xEFFB8C34, 0x0FF74C34,
- 0x0FFACCB4, 0x0FF5CC34, 0x0FFFCC34, 0x0FFFCCB4,
- /* INIT sequence RAM WORDS
- * SDRAM Initialization (offset 0x36 in UPMA RAM)
- * The above definition uses the remaining space
- * to establish an initialization sequence,
- * which is executed by a RUN command.
- * The sequence is COMMAND INHIBIT(NOP),Precharge,
- * Load Mode Register,NOP,Auto Refresh.
- */
-
- /*
- * Exception. (Offset 3Ch in UPMA RAM)
- */
- 0x0FEA8C34, 0x1FB54C34, 0xFFFFCC34, _NOT_USED_
-};
-
-/*
- * Check Board Identity:
- */
-
-int checkboard (void)
-{
- puts ("Board: RPXlite_DW\n") ;
- return (0) ;
-}
-
-/* ------------------------------------------------------------------------- */
-
-long int initdram (int board_type)
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- long int size9;
-
- upmconfig(UPMA, (uint *)sdram_table, sizeof(sdram_table)/sizeof(uint));
-
- /* Refresh clock prescalar */
- memctl->memc_mptpr = CFG_MPTPR ;
-
- memctl->memc_mar = 0x00000088;
-
- /* Map controller banks 1 to the SDRAM bank */
- memctl->memc_or1 = CFG_OR1_PRELIM;
- memctl->memc_br1 = CFG_BR1_PRELIM;
-
- memctl->memc_mamr = CFG_MAMR_9COL & (~(MAMR_PTAE)); /* no refresh yet */
- /*Disable Periodic timer A. */
-
- udelay(200);
-
- /* perform SDRAM initializsation sequence */
-
- memctl->memc_mcr = 0x80002236; /* SDRAM bank 0 - refresh twice */
-
- udelay(1);
-
- memctl->memc_mamr |= MAMR_PTAE; /* enable refresh */
-
- /*Enable Periodic timer A */
-
- udelay (1000);
-
- /* Check Bank 0 Memory Size
- * try 9 column mode
- */
-
- size9 = dram_size (CFG_MAMR_9COL, SDRAM_BASE_PRELIM, SDRAM_MAX_SIZE);
-
- /*
- * Final mapping:
- */
-
- memctl->memc_or1 = ((-size9) & 0xFFFF0000) | CFG_OR_TIMING_SDRAM;
-
- udelay (1000);
-
- return (size9);
-}
-
-void rpxlite_init (void)
-{
- /* Enable NVRAM */
- *((uchar *) BCSR0) |= BCSR0_ENNVRAM;
-}
-
-/*
- * Check memory range for valid RAM. A simple memory test determines
- * the actually available RAM size between addresses `base' and
- * `base + maxsize'. Some (not all) hardware errors are detected:
- * - short between address lines
- * - short between data lines
- */
-static long int dram_size (long int mamr_value, long int *base,
- long int maxsize)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
-
- memctl->memc_mamr = mamr_value;
-
- return (get_ram_size (base, maxsize));
-}
diff --git a/board/RPXlite_dw/config.mk b/board/RPXlite_dw/config.mk
deleted file mode 100644
index 7970910959..0000000000
--- a/board/RPXlite_dw/config.mk
+++ /dev/null
@@ -1,29 +0,0 @@
-#
-# (C) Copyright 2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-# Sam Song, IEMC. SHU, samsongshu@yahoo.com.cn
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# RPXlite dw boards : lite_dw
-#
-
-TEXT_BASE = 0xff000000
diff --git a/board/RPXlite_dw/flash.c b/board/RPXlite_dw/flash.c
deleted file mode 100644
index 1cbd53719f..0000000000
--- a/board/RPXlite_dw/flash.c
+++ /dev/null
@@ -1,490 +0,0 @@
-/*
- * (C) Copyright 2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * Yoo. Jonghoon, IPone, yooth@ipone.co.kr
- * U-Boot port on RPXlite board
- *
- * Some of flash control words are modified. (from 2x16bit device
- * to 4x8bit device)
- * RPXLite board I tested has only 4 AM29LV800BB devices. Other devices
- * are not tested.
- *
- * (?) Does an RPXLite board which
- * does not use AM29LV800 flash memory exist ?
- * I don't know...
- */
-
-/* Yes,Yoo.They do use other FLASH for the board.
- *
- * Sam Song, IEMC. SHU, samsongshu@yahoo.com.cn
- * U-Boot port on RPXlite DW version board
- *
- * By now,it uses 4 AM29DL323DB90VI devices(4x8bit).
- * The total FLASH has 16MB(4x4MB).
- * I just made some necessary changes on the basis of Wolfgang and Yoo's job.
- *
- * June 8, 2004 */
-
-#include <common.h>
-#include <mpc8xx.h>
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/*-----------------------------------------------------------------------
- * Functions vu_long : volatile unsigned long IN include/common.h
- */
-static ulong flash_get_size (vu_long *addr, flash_info_t *info);
-static int write_word (flash_info_t *info, ulong dest, ulong data);
-static void flash_get_offsets (ulong base, flash_info_t *info);
-
-unsigned long flash_init (void)
-{
- unsigned long size_b0 ;
- int i;
-
- /* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- size_b0 = flash_get_size((vu_long *)CFG_FLASH_BASE, &flash_info[0]);
- flash_get_offsets (CFG_FLASH_BASE, &flash_info[0]);
-
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
- /* If Monitor is in the cope of FLASH,then
- * protect this area by default in case for
- * other occupation. [SAM] */
-
- /* monitor protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+CFG_MONITOR_LEN-1,
- &flash_info[0]);
-#endif
- flash_info[0].size = size_b0;
- return (size_b0);
-}
-
-static void flash_get_offsets (ulong base, flash_info_t *info)
-{
- int i;
-
- /* set up sector start address table */
- if (info->flash_id & FLASH_BTYPE) {
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00008000;
- info->start[2] = base + 0x00010000;
- info->start[3] = base + 0x00018000;
- info->start[4] = base + 0x00020000;
- info->start[5] = base + 0x00028000;
- info->start[6] = base + 0x00030000;
- info->start[7] = base + 0x00038000;
-
- for (i = 8; i < info->sector_count; i++) {
- info->start[i] = base + ((i-7) * 0x00040000);
- }
- } else {
- i = info->sector_count - 1;
- info->start[i--] = base + info->size - 0x00010000;
- info->start[i--] = base + info->size - 0x00018000;
- info->start[i--] = base + info->size - 0x00020000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00040000;
- }
- }
-
-}
-
-void flash_print_info (flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD: printf ("AMD "); break;
- case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
- default: printf ("Unknown Vendor "); break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM400B: printf ("AM29LV400B (4 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM400T: printf ("AM29LV400T (4 Mbit, top boot sector)\n");
- break;
- case FLASH_AM800B: printf ("AM29LV800B (8 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM800T: printf ("AM29LV800T (8 Mbit, top boot sector)\n");
- break;
- case FLASH_AM160B: printf ("AM29LV160B (16 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM160T: printf ("AM29LV160T (16 Mbit, top boot sector)\n");
- break;
- case FLASH_AM320B: printf ("AM29LV320B (32 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM320T: printf ("AM29LV320T (32 Mbit, top boot sector)\n");
- break;
- case FLASH_AMDL323B: printf ("AM29DL323B (32 Mbit, bottom boot sector)\n");
- break;
- /* I just add the FLASH_AMDL323B for RPXlite_DW BOARD. [SAM] */
- default: printf ("Unknown Chip Type\n");
- break;
- }
- printf (" Size: %ld MB in %d Sectors\n",info->size >> 20, info->sector_count);
- printf (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",info->start[i],info->protect[i] ? " (RO)" : " ");
- }
- printf ("\n");
- return;
-}
-
-static ulong flash_get_size (vu_long *addr, flash_info_t *info)
-{
- short i;
- ulong value;
- ulong base = (ulong)addr;
-
- /* Write auto select command: read Manufacturer ID */
- addr[0xAAA] = 0x00AA00AA ;
- addr[0x555] = 0x00550055 ;
- addr[0xAAA] = 0x00900090 ;
-
- value = addr[0] ;
- switch (value & 0x00FF00FF) {
- case AMD_MANUFACT: /* AMD_MANUFACT=0x00010001 in flash.h. */
- info->flash_id = FLASH_MAN_AMD; /* FLASH_MAN_AMD=0x00000000 in flash.h.*/
- break;
- case FUJ_MANUFACT:
- info->flash_id = FLASH_MAN_FUJ;
- break;
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- return (0); /* no or unknown flash */
- }
-
- value = addr[2] ; /* device ID */
- switch (value & 0x00FF00FF) {
- case (AMD_ID_LV400T & 0x00FF00FF):
- info->flash_id += FLASH_AM400T;
- info->sector_count = 11;
- info->size = 0x00100000;
- break; /* => 1 MB */
- case (AMD_ID_LV400B & 0x00FF00FF):
- info->flash_id += FLASH_AM400B;
- info->sector_count = 11;
- info->size = 0x00100000;
- break; /* => 1 MB */
- case (AMD_ID_LV800T & 0x00FF00FF):
- info->flash_id += FLASH_AM800T;
- info->sector_count = 19;
- info->size = 0x00200000;
- break; /* => 2 MB */
- case (AMD_ID_LV800B & 0x00FF00FF):
- info->flash_id += FLASH_AM800B;
- info->sector_count = 19;
- info->size = 0x00400000; /* Size doubled by yooth */
- break; /* => 4 MB */
- case (AMD_ID_LV160T & 0x00FF00FF):
- info->flash_id += FLASH_AM160T;
- info->sector_count = 35;
- info->size = 0x00400000;
- break; /* => 4 MB */
- case (AMD_ID_LV160B & 0x00FF00FF):
- info->flash_id += FLASH_AM160B;
- info->sector_count = 35;
- info->size = 0x00400000;
- break; /* => 4 MB */
- case (AMD_ID_DL323B & 0x00FF00FF):
- info->flash_id += FLASH_AMDL323B;
- info->sector_count = 71;
- info->size = 0x01000000;
- break; /* => 16 MB(4x4MB) */
- /* AMD_ID_DL323B= 0x22532253 FLASH_AMDL323B= 0x0013
- * AMD_ID_DL323B could be found in <flash.h>.[SAM]
- * So we could get : flash_id = 0x00000013.
- * The first four-bit represents VEDOR ID,leaving others for FLASH ID. */
- default:
- info->flash_id = FLASH_UNKNOWN;
- return (0); /* => no or unknown flash */
-
- }
- /* set up sector start address table */
- if (info->flash_id & FLASH_BTYPE) {
- /* FLASH_BTYPE=0x0001 mask for bottom boot sector type.If the last bit equals 1,
- * it means bottom boot flash. GOOD IDEA! [SAM]
- */
-
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00008000;
- info->start[2] = base + 0x00010000;
- info->start[3] = base + 0x00018000;
- info->start[4] = base + 0x00020000;
- info->start[5] = base + 0x00028000;
- info->start[6] = base + 0x00030000;
- info->start[7] = base + 0x00038000;
-
- for (i = 8; i < info->sector_count; i++) {
- info->start[i] = base + ((i-7) * 0x00040000) ;
- }
- } else {
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- info->start[i--] = base + info->size - 0x00010000;
- info->start[i--] = base + info->size - 0x00018000;
- info->start[i--] = base + info->size - 0x00020000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00040000;
- }
- }
-
- /* check for protected sectors */
- for (i = 0; i < info->sector_count; i++) {
- /* read sector protection at sector address, (A7 .. A0) = 0x02 */
- /* D0 = 1 if protected */
- addr = (volatile unsigned long *)(info->start[i]);
- /* info->protect[i] = addr[4] & 1 ; */
- /* Mask it for disorder FLASH protection **[Sam]** */
- }
-
- /*
- * Prevent writes to uninitialized FLASH.
- */
- if (info->flash_id != FLASH_UNKNOWN) {
- addr = (volatile unsigned long *)info->start[0];
-
- *addr = 0xF0F0F0F0; /* reset bank */
- }
- return (info->size);
-}
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- vu_long *addr = (vu_long*)(info->start[0]);
- int flag, prot, sect, l_sect;
- ulong start, now, last;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- if ((info->flash_id == FLASH_UNKNOWN) ||
- (info->flash_id > FLASH_AMD_COMP)) {
- printf ("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- l_sect = -1;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[0xAAA] = 0xAAAAAAAA;
- addr[0x555] = 0x55555555;
- addr[0xAAA] = 0x80808080;
- addr[0xAAA] = 0xAAAAAAAA;
- addr[0x555] = 0x55555555;
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr = (vu_long *)(info->start[sect]) ;
- addr[0] = 0x30303030 ;
- l_sect = sect;
- }
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- /*
- * We wait for the last triggered sector
- */
- if (l_sect < 0)
- goto DONE;
-
- start = get_timer (0);
- last = start;
- addr = (vu_long *)(info->start[l_sect]);
- while ((addr[0] & 0x80808080) != 0x80808080) {
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- return 1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- }
-
-DONE:
- /* reset to read mode */
- addr = (vu_long *)info->start[0];
- addr[0] = 0xF0F0F0F0; /* reset bank */
-
- printf (" done\n");
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int i, l, rc;
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
- for (; i<4 && cnt>0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = 0;
- for (i=0; i<4; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
- return (write_word(info, wp, data));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word (flash_info_t *info, ulong dest, ulong data)
-{
- vu_long *addr = (vu_long *)(info->start[0]);
- ulong start;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*((vu_long *)dest) & data) != data) {
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[0xAAA] = 0xAAAAAAAA;
- addr[0x555] = 0x55555555;
- addr[0xAAA] = 0xA0A0A0A0;
-
- *((vu_long *)dest) = data;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* data polling for D7 */
- start = get_timer (0);
- while ((*((vu_long *)dest) & 0x80808080) != (data & 0x80808080)) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- return (1);
- }
- }
- return (0);
-}
diff --git a/board/RPXlite_dw/u-boot.lds b/board/RPXlite_dw/u-boot.lds
deleted file mode 100644
index a9c88f6487..0000000000
--- a/board/RPXlite_dw/u-boot.lds
+++ /dev/null
@@ -1,142 +0,0 @@
-/*
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc8xx/start.o (.text)
- common/dlmalloc.o (.text)
- lib_ppc/ppcstring.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
- lib_generic/zlib.o (.text)
-/* XXX ?
- . = env_offset;
-*/
- common/environment.o(.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/RPXlite_dw/u-boot.lds.debug b/board/RPXlite_dw/u-boot.lds.debug
deleted file mode 100644
index c0cf1cb747..0000000000
--- a/board/RPXlite_dw/u-boot.lds.debug
+++ /dev/null
@@ -1,137 +0,0 @@
-/*
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc8xx/start.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
-
- . = env_offset;
- common/environment.o(.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/RRvision/Makefile b/board/RRvision/Makefile
deleted file mode 100644
index fdc6fd53ea..0000000000
--- a/board/RRvision/Makefile
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# (C) Copyright 2000-2002
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/RRvision/RRvision.c b/board/RRvision/RRvision.c
deleted file mode 100644
index f46bb9e8e4..0000000000
--- a/board/RRvision/RRvision.c
+++ /dev/null
@@ -1,236 +0,0 @@
-/*
- * (C) Copyright 2001-2002
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-
-/* ------------------------------------------------------------------------- */
-
-static long int dram_size (long int, long int *, long int);
-
-/* ------------------------------------------------------------------------- */
-
-#define _NOT_USED_ 0xFFFFFFFF
-
-const uint sdram_table[] =
-{
- /*
- * Single Read. (Offset 0 in UPMA RAM)
- */
- 0x1F07FC04, 0xEEAEFC04, 0x11ADFC04, 0xEFBBBC00,
- 0x1FF77C47, /* last */
- /*
- * SDRAM Initialization (offset 5 in UPMA RAM)
- *
- * This is no UPM entry point. The following definition uses
- * the remaining space to establish an initialization
- * sequence, which is executed by a RUN command.
- *
- */
- 0x1FF77C34, 0xEFEABC34, 0x1FB57C35, /* last */
- /*
- * Burst Read. (Offset 8 in UPMA RAM)
- */
- 0x1F07FC04, 0xEEAEFC04, 0x10ADFC04, 0xF0AFFC00,
- 0xF0AFFC00, 0xF1AFFC00, 0xEFBBBC00, 0x1FF77C47, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Single Write. (Offset 18 in UPMA RAM)
- */
- 0x1F07FC04, 0xEEAEBC00, 0x01B93C04, 0x1FF77C47, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Burst Write. (Offset 20 in UPMA RAM)
- */
- 0x1F07FC04, 0xEEAEBC00, 0x10AD7C00, 0xF0AFFC00,
- 0xF0AFFC00, 0xE1BBBC04, 0x1FF77C47, /* last */
- _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Refresh (Offset 30 in UPMA RAM)
- */
- 0x1FF5FC84, 0xFFFFFC04, 0xFFFFFC04, 0xFFFFFC04,
- 0xFFFFFC84, 0xFFFFFC07, /* last */
- _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Exception. (Offset 3c in UPMA RAM)
- */
- 0x7FFFFC07, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_,
-};
-
-/* ------------------------------------------------------------------------- */
-
-
-/*
- * Check Board Identity:
- *
- * Always return 1 (no second DRAM bank).
- */
-
-int checkboard (void)
-{
- char *s = getenv ("serial#");
-
- puts ("Board: RRvision ");
-
- for (; s && *s; ++s) {
- if (*s == ' ')
- break;
- putc (*s);
- }
-
- putc ('\n');
-
- return (0);
-}
-
-/* ------------------------------------------------------------------------- */
-
-long int initdram (int board_type)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- unsigned long reg;
- long int size8, size9;
- long int size = 0;
-
- upmconfig (UPMA, (uint *)sdram_table, sizeof(sdram_table) / sizeof(uint));
-
- /*
- * Preliminary prescaler for refresh (depends on number of
- * banks): This value is selected for four cycles every 62.4 us
- * with two SDRAM banks or four cycles every 31.2 us with one
- * bank. It will be adjusted after memory sizing.
- */
- memctl->memc_mptpr = CFG_MPTPR_2BK_8K;
-
- memctl->memc_mar = 0x00000088;
-
- /*
- * Map controller bank 1 the SDRAM bank 2 at physical address 0.
- */
- memctl->memc_or1 = CFG_OR2_PRELIM;
- memctl->memc_br1 = CFG_BR2_PRELIM;
-
- memctl->memc_mamr = CFG_MAMR_8COL & (~(MAMR_PTAE)); /* no refresh yet */
-
- udelay (200);
-
- /* perform SDRAM initializsation sequence */
-
- memctl->memc_mcr = 0x80002105; /* SDRAM bank 0 */
- udelay (1);
- memctl->memc_mcr = 0x80002230; /* SDRAM bank 0 - execute twice */
- udelay (1);
-
- memctl->memc_mamr |= MAMR_PTAE; /* enable refresh */
-
- udelay (1000);
-
- /*
- * Check Bank 0 Memory Size
- *
- * try 8 column mode
- */
- size8 = dram_size (CFG_MAMR_8COL,
- SDRAM_BASE2_PRELIM,
- SDRAM_MAX_SIZE);
-
- udelay (1000);
-
- /*
- * try 9 column mode
- */
- size9 = dram_size (CFG_MAMR_9COL,
- SDRAM_BASE2_PRELIM,
- SDRAM_MAX_SIZE);
-
- if (size8 < size9) { /* leave configuration at 9 columns */
- size = size9;
-/* debug ("SDRAM Bank 0 in 9 column mode: %ld MB\n", size >> 20); */
- } else { /* back to 8 columns */
- size = size8;
- memctl->memc_mamr = CFG_MAMR_8COL;
- udelay (500);
-/* debug ("SDRAM Bank 0 in 8 column mode: %ld MB\n", size >> 20); */
- }
-
- udelay (1000);
-
- /*
- * Adjust refresh rate depending on SDRAM type
- * For types > 128 MBit leave it at the current (fast) rate
- */
- if (size < 0x02000000) {
- /* reduce to 15.6 us (62.4 us / quad) */
- memctl->memc_mptpr = CFG_MPTPR_2BK_4K;
- udelay (1000);
- }
-
- /*
- * Final mapping
- */
- memctl->memc_or1 = ((-size) & 0xFFFF0000) | CFG_OR_TIMING_SDRAM;
- memctl->memc_br1 = (CFG_SDRAM_BASE & BR_BA_MSK) | BR_MS_UPMA | BR_V;
-
- /*
- * No bank 1
- *
- * invalidate bank
- */
- memctl->memc_br3 = 0;
-
- /* adjust refresh rate depending on SDRAM type, one bank */
- reg = memctl->memc_mptpr;
- reg >>= 1; /* reduce to CFG_MPTPR_1BK_8K / _4K */
- memctl->memc_mptpr = reg;
-
- udelay (10000);
-
- return (size);
-}
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Check memory range for valid RAM. A simple memory test determines
- * the actually available RAM size between addresses `base' and
- * `base + maxsize'. Some (not all) hardware errors are detected:
- * - short between address lines
- * - short between data lines
- */
-
-static long int dram_size (long int mamr_value, long int *base,
- long int maxsize)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
-
- memctl->memc_mamr = mamr_value;
-
- return (get_ram_size(base, maxsize));
-}
diff --git a/board/RRvision/config.mk b/board/RRvision/config.mk
deleted file mode 100644
index ab1c8d6ccb..0000000000
--- a/board/RRvision/config.mk
+++ /dev/null
@@ -1,28 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# RedRock vision boards
-#
-
-TEXT_BASE = 0x40000000
diff --git a/board/RRvision/flash.c b/board/RRvision/flash.c
deleted file mode 100644
index d8e07e6450..0000000000
--- a/board/RRvision/flash.c
+++ /dev/null
@@ -1,522 +0,0 @@
-/*
- * (C) Copyright 2000-2002
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#define DEBUG
-
-#include <common.h>
-#include <mpc8xx.h>
-
-#ifndef CFG_ENV_ADDR
-#define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_ENV_OFFSET)
-#endif
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (vu_long *addr, flash_info_t *info);
-static int write_word (flash_info_t *info, ulong dest, ulong data);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- unsigned long size;
- int i;
-
- /* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* Static FLASH Bank configuration here - FIXME XXX */
-
- size = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size, size<<20);
- }
-
- /* Remap FLASH according to real size */
- memctl->memc_or0 = CFG_OR_TIMING_FLASH | (-size & OR_AM_MSK);
- memctl->memc_br0 = (CFG_FLASH_BASE & BR_BA_MSK) | BR_MS_GPCM | BR_V;
-
- /* Re-do sizing to get full correct info */
- size = flash_get_size((vu_long *)CFG_FLASH_BASE, &flash_info[0]);
-
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
- /* monitor protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+monitor_flash_len-1,
- &flash_info[0]);
-#endif
-
-#ifdef CFG_ENV_IS_IN_FLASH
- /* ENV protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR+CFG_ENV_SIZE-1,
- &flash_info[0]);
-#endif
-
- flash_info[0].size = size;
-
- return (size);
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- puts ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD: puts ("AMD "); break;
- case FLASH_MAN_FUJ: puts ("FUJITSU "); break;
- default: puts ("Unknown Vendor "); break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM400B: puts ("AM29LV400B (4 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM400T: puts ("AM29LV400T (4 Mbit, top boot sector)\n");
- break;
- case FLASH_AM800B: puts ("AM29LV800B (8 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM800T: puts ("AM29LV800T (8 Mbit, top boot sector)\n");
- break;
- case FLASH_AM160B: puts ("AM29LV160B (16 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM160T: puts ("AM29LV160T (16 Mbit, top boot sector)\n");
- break;
- case FLASH_AM320B: puts ("AM29LV320B (32 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM320T: puts ("AM29LV320T (32 Mbit, top boot sector)\n");
- break;
- default: puts ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- puts (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
- if ((i % 5) == 0)
- puts ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " "
- );
- }
- puts ("\n");
- return;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-
-static ulong flash_get_size (vu_long *addr, flash_info_t *info)
-{
- short i;
- ulong value;
- ulong base = (ulong)addr;
-
- /* Write auto select command: read Manufacturer ID */
- addr[0x0555] = 0x00AA00AA;
- addr[0x02AA] = 0x00550055;
- addr[0x0555] = 0x00900090;
-
- value = addr[0];
-
- switch (value) {
- case AMD_MANUFACT:
- info->flash_id = FLASH_MAN_AMD;
- break;
- case FUJ_MANUFACT:
- info->flash_id = FLASH_MAN_FUJ;
- break;
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- return (0); /* no or unknown flash */
- }
-
- value = addr[1]; /* device ID */
-
- switch (value) {
- case AMD_ID_LV400T:
- info->flash_id += FLASH_AM400T;
- info->sector_count = 11;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case AMD_ID_LV400B:
- info->flash_id += FLASH_AM400B;
- info->sector_count = 11;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case AMD_ID_LV800T:
- info->flash_id += FLASH_AM800T;
- info->sector_count = 19;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case AMD_ID_LV800B:
- info->flash_id += FLASH_AM800B;
- info->sector_count = 19;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case AMD_ID_LV160T:
- info->flash_id += FLASH_AM160T;
- info->sector_count = 35;
- info->size = 0x00400000;
- break; /* => 4 MB */
-
- case AMD_ID_LV160B:
- info->flash_id += FLASH_AM160B;
- info->sector_count = 35;
- info->size = 0x00400000;
- break; /* => 4 MB */
- case AMD_ID_LV320T:
- info->flash_id += FLASH_AM320T;
- info->sector_count = 71;
- info->size = 0x00800000;
- break; /* => 8 MB */
-
- case AMD_ID_LV320B:
- info->flash_id += FLASH_AM320B;
- info->sector_count = 71;
- info->size = 0x00800000;
- break; /* => 8 MB */
- default:
- info->flash_id = FLASH_UNKNOWN;
- return (0); /* => no or unknown flash */
- }
-
- /* set up sector start address table */
- switch (value) {
- case AMD_ID_LV400B:
- case AMD_ID_LV800B:
- case AMD_ID_LV160B:
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00008000;
- info->start[2] = base + 0x0000C000;
- info->start[3] = base + 0x00010000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00020000) - 0x00060000;
- }
- break;
- case AMD_ID_LV400T:
- case AMD_ID_LV800T:
- case AMD_ID_LV160T:
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- info->start[i--] = base + info->size - 0x00008000;
- info->start[i--] = base + info->size - 0x0000C000;
- info->start[i--] = base + info->size - 0x00010000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00020000;
- }
- break;
- case AMD_ID_LV320B:
- for (i = 0; i < info->sector_count; i++) {
- info->start[i] = base;
- /*
- * The first 8 sectors are 8 kB,
- * all the other ones are 64 kB
- */
- base += (i < 8)
- ? 2 * ( 8 << 10)
- : 2 * (64 << 10);
- }
- break;
- case AMD_ID_LV320T:
- for (i = 0; i < info->sector_count; i++) {
- info->start[i] = base;
- /*
- * The last 8 sectors are 8 kB,
- * all the other ones are 64 kB
- */
- base += (i < (info->sector_count - 8))
- ? 2 * (64 << 10)
- : 2 * ( 8 << 10);
- }
- break;
- default:
- return (0);
- break;
- }
-
- /* check for protected sectors */
- for (i = 0; i < info->sector_count; i++) {
- /* read sector protection at sector address, (A7 .. A0) = 0x02 */
- /* D0 = 1 if protected */
- addr = (volatile unsigned long *)(info->start[i]);
- info->protect[i] = addr[2] & 1;
- }
-
- /*
- * Prevent writes to uninitialized FLASH.
- */
- if (info->flash_id != FLASH_UNKNOWN) {
- addr = (volatile unsigned long *)info->start[0];
-
- *addr = 0x00F000F0; /* reset bank */
- }
-
- return (info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- vu_long *addr = (vu_long*)(info->start[0]);
- int flag, prot, sect, l_sect;
- ulong start, now, last;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- puts ("- missing\n");
- } else {
- puts ("- no sectors to erase\n");
- }
- return 1;
- }
-
- if ((info->flash_id == FLASH_UNKNOWN) ||
- (info->flash_id > FLASH_AMD_COMP)) {
- printf ("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- puts ("\n");
- }
-
- l_sect = -1;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[0x0555] = 0x00AA00AA;
- addr[0x02AA] = 0x00550055;
- addr[0x0555] = 0x00800080;
- addr[0x0555] = 0x00AA00AA;
- addr[0x02AA] = 0x00550055;
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr = (vu_long*)(info->start[sect]);
- addr[0] = 0x00300030;
- l_sect = sect;
- }
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- /*
- * We wait for the last triggered sector
- */
- if (l_sect < 0)
- goto DONE;
-
- start = get_timer (0);
- last = start;
- addr = (vu_long*)(info->start[l_sect]);
- while ((addr[0] & 0x00800080) != 0x00800080) {
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- puts ("Timeout\n");
- return 1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- }
-
-DONE:
- /* reset to read mode */
- addr = (volatile unsigned long *)info->start[0];
- addr[0] = 0x00F000F0; /* reset bank */
-
- puts (" done\n");
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int i, l, rc;
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
- for (; i<4 && cnt>0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = 0;
- for (i=0; i<4; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- return (write_word(info, wp, data));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word (flash_info_t *info, ulong dest, ulong data)
-{
- vu_long *addr = (vu_long*)(info->start[0]);
- ulong start;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*((vu_long *)dest) & data) != data) {
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[0x0555] = 0x00AA00AA;
- addr[0x02AA] = 0x00550055;
- addr[0x0555] = 0x00A000A0;
-
- *((vu_long *)dest) = data;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* data polling for D7 */
- start = get_timer (0);
- while ((*((vu_long *)dest) & 0x00800080) != (data & 0x00800080)) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- return (1);
- }
- }
- return (0);
-}
-
-/*-----------------------------------------------------------------------
- */
diff --git a/board/RRvision/u-boot.lds b/board/RRvision/u-boot.lds
deleted file mode 100644
index 1d6288fea6..0000000000
--- a/board/RRvision/u-boot.lds
+++ /dev/null
@@ -1,144 +0,0 @@
-/*
- * (C) Copyright 2000-2002
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc8xx/start.o (.text)
- cpu/mpc8xx/traps.o (.text)
- common/dlmalloc.o (.text)
- lib_ppc/ppcstring.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
- lib_generic/zlib.o (.text)
- lib_ppc/cache.o (.text)
- lib_ppc/time.o (.text)
-
- . = env_offset;
- common/environment.o (.ppcenv)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/RRvision/video_ad7179.h b/board/RRvision/video_ad7179.h
deleted file mode 100644
index f14673827d..0000000000
--- a/board/RRvision/video_ad7179.h
+++ /dev/null
@@ -1,68 +0,0 @@
-/*
- * (C) Copyright 2003 Wolfgang Grandegger <wg@denx.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#define VIDEO_ENCODER_NAME "Analog Devices AD7179"
-
-#define VIDEO_ENCODER_I2C_RATE 100000 /* Max rate is 100Khz */
-#define VIDEO_ENCODER_CB_Y_CR_Y /* Use CB Y CR Y format... */
-
-#define VIDEO_MODE_YUYV /* The only mode supported by this encoder */
-#undef VIDEO_MODE_RGB
-#define VIDEO_MODE_BPP 16
-
-#ifdef VIDEO_MODE_PAL
-#define VIDEO_ACTIVE_COLS 720
-#define VIDEO_ACTIVE_ROWS 576
-#define VIDEO_VISIBLE_COLS 640
-#define VIDEO_VISIBLE_ROWS 480
-#else
-#error "NTSC mode is not supported"
-#endif
-
-static unsigned char video_encoder_data[] = {
- 0x05, /* Mode Register 0 */
- 0x11, /* Mode Register 1 */
- 0x20, /* Mode Register 2 */
- 0x0C, /* Mode Register 3 */
- 0x01, /* Mode Register 4 */
- 0x00, /* Reserved */
- 0x00, /* Reserved */
- 0x04, /* Timing Register 0 */
- 0x00, /* Timing Register 1 */
- 0xCB, /* Subcarrier Frequency Register 0 */
- 0x0A, /* Subcarrier Frequency Register 1 */
- 0x09, /* Subcarrier Frequency Register 2 */
- 0x2A, /* Subcarrier Frequency Register 3 */
- 0x00, /* Subcarrier Phase */
- 0x00, /* Closed Captioning Ext Reg 0 */
- 0x00, /* Closed Captioning Ext Reg 1 */
- 0x00, /* Closed Captioning Reg 0 */
- 0x00, /* Closed Captioning Reg 1 */
- 0x00, /* Pedestal Control Reg 0 */
- 0x00, /* Pedestal Control Reg 1 */
- 0x00, /* Pedestal Control Reg 2 */
- 0x00, /* Pedestal Control Reg 3 */
- 0x00, /* CGMS_WSS Reg 0 */
- 0x00, /* CGMS_WSS Reg 0 */
- 0x00, /* CGMS_WSS Reg 0 */
- 0x00 /* Teletext Req. Control Reg */
-} ;
diff --git a/board/a3000/Makefile b/board/a3000/Makefile
deleted file mode 100644
index 5fde362713..0000000000
--- a/board/a3000/Makefile
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/a3000/README b/board/a3000/README
deleted file mode 100644
index f0e92c543d..0000000000
--- a/board/a3000/README
+++ /dev/null
@@ -1,17 +0,0 @@
-U-Boot for Artis SBC-A3000
----------------------------
-
-Artis SBC-A3000 has one flash socket that the user uses Intel 28F128J3A (16MB)
-or 28F064J3A (8MB) chips.
-
-In board's notation, bank 0 is the one at the address of 0xFF000000.
-bank 1 is the one at the address of 0xFF800000
-
-On power-up the processor jumps to the address of 0xFFF00100, the last
-megabyte of the bank 0 of flash.
-
-Thus, U-Boot is configured to reside in flash starting at the address of
-0xFFF00000. The environment space is located in flash separately from
-U-Boot, at the address of 0xFFFE0000.
-
-There is a National ns83815 10/100M ethernet controller on-board.
diff --git a/board/a3000/a3000.c b/board/a3000/a3000.c
deleted file mode 100644
index ab707ae970..0000000000
--- a/board/a3000/a3000.c
+++ /dev/null
@@ -1,111 +0,0 @@
-/*
- * (C) Copyright 2001
- * Rob Taylor, Flying Pig Systems. robt@flyingpig.com.
- *
- * Modified during 2003 by
- * Ken Chou, kchou@ieee.org
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc824x.h>
-#include <pci.h>
-
-int checkboard (void)
-{
- ulong busfreq = get_bus_freq(0);
- char buf[32];
-
- printf("Board: A3000 Local Bus at %s MHz\n", strmhz(buf, busfreq));
- return 0;
-
-}
-
-long int initdram (int board_type)
-{
- long size;
- long new_bank0_end;
- long mear1;
- long emear1;
-
- size = get_ram_size(CFG_SDRAM_BASE, CFG_MAX_RAM_SIZE);
-
- new_bank0_end = size - 1;
- mear1 = mpc824x_mpc107_getreg(MEAR1);
- emear1 = mpc824x_mpc107_getreg(EMEAR1);
- mear1 = (mear1 & 0xFFFFFF00) |
- ((new_bank0_end & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT);
- emear1 = (emear1 & 0xFFFFFF00) |
- ((new_bank0_end & MICR_ADDR_MASK) >> MICR_EADDR_SHIFT);
- mpc824x_mpc107_setreg(MEAR1, mear1);
- mpc824x_mpc107_setreg(EMEAR1, emear1);
-
- return (size);
-}
-
-/*
- * Initialize PCI Devices
- */
-#ifndef CONFIG_PCI_PNP
-static struct pci_config_table pci_a3000_config_table[] = {
- /* vendor, device, class */
- /* bus, dev, func */
- { PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_83815, PCI_ANY_ID,
- PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, /* dp83815 eth0 divice */
- pci_cfgfunc_config_device, { PCI_ENET0_IOADDR,
- PCI_ENET0_MEMADDR,
- PCI_COMMAND_IO |
- PCI_COMMAND_MEMORY |
- PCI_COMMAND_MASTER }},
- { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
- PCI_ANY_ID, 0x14, PCI_ANY_ID, /* PCI slot1 */
- pci_cfgfunc_config_device, { PCI_ENET1_IOADDR,
- PCI_ENET1_MEMADDR,
- PCI_COMMAND_IO |
- PCI_COMMAND_MEMORY |
- PCI_COMMAND_MASTER }},
- { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
- PCI_ANY_ID, 0x15, PCI_ANY_ID, /* PCI slot2 */
- pci_cfgfunc_config_device, { PCI_ENET2_IOADDR,
- PCI_ENET2_MEMADDR,
- PCI_COMMAND_IO |
- PCI_COMMAND_MEMORY |
- PCI_COMMAND_MASTER }},
- { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
- PCI_ANY_ID, 0x16, PCI_ANY_ID, /* PCI slot3 */
- pci_cfgfunc_config_device, { PCI_ENET3_IOADDR,
- PCI_ENET3_MEMADDR,
- PCI_COMMAND_IO |
- PCI_COMMAND_MEMORY |
- PCI_COMMAND_MASTER }},
- { }
-};
-#endif
-
-struct pci_controller hose = {
-#ifndef CONFIG_PCI_PNP
- config_table: pci_a3000_config_table,
-#endif
-};
-
-void pci_init_board(void)
-{
- pci_mpc824x_init(&hose);
-}
diff --git a/board/a3000/config.mk b/board/a3000/config.mk
deleted file mode 100644
index 798e0321df..0000000000
--- a/board/a3000/config.mk
+++ /dev/null
@@ -1,30 +0,0 @@
-#
-# (C) Copyright 2000, 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# Artis A-3000 boards
-#
-
-TEXT_BASE = 0xFFF00000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE)
diff --git a/board/a3000/flash.c b/board/a3000/flash.c
deleted file mode 100644
index 13a5ca5b06..0000000000
--- a/board/a3000/flash.c
+++ /dev/null
@@ -1,454 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-
-#include <common.h>
-#include <mpc824x.h>
-
-#if defined(CFG_ENV_IS_IN_FLASH)
-# ifndef CFG_ENV_ADDR
-# define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_ENV_OFFSET)
-# endif
-# ifndef CFG_ENV_SIZE
-# define CFG_ENV_SIZE CFG_ENV_SECT_SIZE
-# endif
-# ifndef CFG_ENV_SECT_SIZE
-# define CFG_ENV_SECT_SIZE CFG_ENV_SIZE
-# endif
-#endif
-
-
-/*---------------------------------------------------------------------*/
-#define DEBUG_FLASH
-
-#ifdef DEBUG_FLASH
-#define DEBUGF(fmt,args...) printf(fmt ,##args)
-#else
-#define DEBUGF(fmt,args...)
-#endif
-/*---------------------------------------------------------------------*/
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (vu_char *addr, flash_info_t *info);
-static int write_data (flash_info_t *info, uchar *dest, uchar data);
-static void flash_get_offsets (ulong base, flash_info_t *info);
-
-#define BS(b) (b)
-#define BYTEME(x) ((x) & 0xFF)
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- unsigned long flash_banks[CFG_MAX_FLASH_BANKS] = CFG_FLASH_BANKS;
- unsigned long size, size_b[CFG_MAX_FLASH_BANKS];
-
- int i;
-
- /* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i)
- {
- flash_info[i].flash_id = FLASH_UNKNOWN;
-
- DEBUGF("Get flash bank %d @ 0x%08lx\n", i, flash_banks[i]);
-/*
- size_b[i] = flash_get_size((vu_char *)flash_banks[i], &flash_info[i]);
-*/
- size_b[i] = flash_get_size((vu_char *) 0xff800000 , &flash_info[i]);
-
- if (flash_info[i].flash_id == FLASH_UNKNOWN)
- {
- printf ("## Unknown FLASH on Bank %d: "
- "ID 0x%lx, Size = 0x%08lx = %ld MB\n",
- i, flash_info[i].flash_id,
- size_b[i], size_b[i]<<20);
- }
- else
- {
- DEBUGF("## Flash bank %d at 0x%08lx sizes: 0x%08lx \n",
- i, flash_banks[i], size_b[i]);
-
- flash_get_offsets (flash_banks[i], &flash_info[i]);
- flash_info[i].size = size_b[i];
- }
- }
-
-
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
- DEBUGF("protect monitor %x @ %x\n", CFG_MONITOR_BASE, CFG_MONITOR_LEN);
- /* monitor protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+CFG_MONITOR_LEN-1,
- &flash_info[0]);
-#endif
-
-#ifdef CFG_ENV_IS_IN_FLASH
- /* ENV protection ON by default */
- DEBUGF("protect environtment %x @ %x\n", CFG_ENV_ADDR, CFG_ENV_SECT_SIZE);
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR+CFG_ENV_SECT_SIZE-1,
- &flash_info[0]);
-#endif
-
- size = 0;
- DEBUGF("## Final Flash bank sizes: ");
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i)
- {
- DEBUGF("%08lx ", size_b[i]);
- size += size_b[i];
- }
- DEBUGF("\n");
- return (size);
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_get_offsets (ulong base, flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_INTEL:
- for (i = 0; i < info->sector_count; i++) {
- info->start[i] = base;
- base += 0x00020000; /* 128k per bank */
- }
- return;
-
- default:
- printf ("Don't know sector ofsets for flash type 0x%lx\n", info->flash_id);
- return;
- }
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD: printf ("AMD "); break;
- case FLASH_MAN_FUJ: printf ("Fujitsu "); break;
- case FLASH_MAN_SST: printf ("SST "); break;
- case FLASH_MAN_STM: printf ("STM "); break;
- case FLASH_MAN_INTEL: printf ("Intel "); break;
- case FLASH_MAN_MT: printf ("MT "); break;
- default: printf ("Unknown Vendor "); break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_28F320J3A:
- printf ("28F320J3A (32Mbit = 128K x 32)\n");
- break;
- case FLASH_28F640J3A:
- printf ("28F640J3A (64Mbit = 128K x 64)\n");
- break;
- case FLASH_28F128J3A:
- printf ("28F128J3A (128Mbit = 128K x 128)\n");
- break;
- default:
- printf ("Unknown Chip Type\n");
- break;
- }
-
-#if 1
- if (info->size >= (1 << 20)) {
- i = 20;
- } else {
- i = 10;
- }
- printf (" Size: %ld %cB in %d Sectors\n",
- info->size >> i,
- (i == 20) ? 'M' : 'k',
- info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " "
- );
- }
- printf ("\n");
-#endif
- return;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-static ulong flash_get_size (vu_char *addr, flash_info_t *info)
-{
- vu_char manuf, device;
-
- addr[0] = BS(0x90);
- manuf = BS(addr[0]);
- DEBUGF("Manuf. ID @ 0x%08lx: 0x%08x\n", (ulong)addr, manuf);
-
- switch (manuf) {
- case BYTEME(AMD_MANUFACT):
- info->flash_id = FLASH_MAN_AMD;
- break;
- case BYTEME(FUJ_MANUFACT):
- info->flash_id = FLASH_MAN_FUJ;
- break;
- case BYTEME(SST_MANUFACT):
- info->flash_id = FLASH_MAN_SST;
- break;
- case BYTEME(STM_MANUFACT):
- info->flash_id = FLASH_MAN_STM;
- break;
- case BYTEME(INTEL_MANUFACT):
- info->flash_id = FLASH_MAN_INTEL;
- break;
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- addr[0] = BS(0xFF); /* restore read mode, (yes, BS is a NOP) */
- return 0; /* no or unknown flash */
- }
-
- device = BS(addr[2]); /* device ID */
-
- DEBUGF("Device ID @ 0x%08lx: 0x%08x\n", (ulong)(&addr[1]), device);
-
- switch (device) {
- case BYTEME(INTEL_ID_28F320J3A):
- info->flash_id += FLASH_28F320J3A;
- info->sector_count = 32;
- info->size = 0x00400000;
- break; /* => 4 MB */
-
- case BYTEME(INTEL_ID_28F640J3A):
- info->flash_id += FLASH_28F640J3A;
- info->sector_count = 64;
- info->size = 0x00800000;
- break; /* => 8 MB */
-
- case BYTEME(INTEL_ID_28F128J3A):
- info->flash_id += FLASH_28F128J3A;
- info->sector_count = 128;
- info->size = 0x01000000;
- break; /* => 16 MB */
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- addr[0] = BS(0xFF); /* restore read mode (yes, a NOP) */
- return 0; /* => no or unknown flash */
-
- }
-
- if (info->sector_count > CFG_MAX_FLASH_SECT) {
- printf ("** ERROR: sector count %d > max (%d) **\n",
- info->sector_count, CFG_MAX_FLASH_SECT);
- info->sector_count = CFG_MAX_FLASH_SECT;
- }
-
- addr[0] = BS(0xFF); /* restore read mode */
-
- return (info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- int flag, prot, sect;
- ulong start, now, last;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- if ((info->flash_id & FLASH_VENDMASK) != FLASH_MAN_INTEL) {
- printf ("Can erase only Intel flash types - aborted\n");
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n", prot);
- } else {
- printf ("\n");
- }
-
- start = get_timer (0);
- last = start;
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- vu_char *addr = (vu_char *)(info->start[sect]);
- unsigned long status;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- *addr = BS(0x50); /* clear status register */
- *addr = BS(0x20); /* erase setup */
- *addr = BS(0xD0); /* erase confirm */
-
- /* re-enable interrupts if necessary */
- if (flag) {
- enable_interrupts();
- }
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- while (((status = BS(*addr)) & BYTEME(0x00800080)) != BYTEME(0x00800080)) {
- if ((now=get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- *addr = BS(0xB0); /* suspend erase */
- *addr = BS(0xFF); /* reset to read mode */
- return 1;
- }
-
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- }
-
- *addr = BS(0xFF); /* reset to read mode */
- }
- }
- printf (" done\n");
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- * 4 - Flash not identified
- */
-
-#define FLASH_WIDTH 1 /* flash bus width in bytes */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- uchar *wp = (uchar *)addr;
- int rc;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- return 4;
- }
-
- while (cnt > 0) {
- if ((rc = write_data(info, wp, *src)) != 0) {
- return rc;
- }
- wp++;
- src++;
- cnt--;
- }
-
- return cnt;
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_data (flash_info_t *info, uchar *dest, uchar data)
-{
- vu_char *addr = (vu_char *)dest;
- ulong status;
- ulong start;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((BS(*addr) & data) != data) {
- return 2;
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- *addr = BS(0x40); /* write setup */
- *addr = data;
-
- /* re-enable interrupts if necessary */
- if (flag) {
- enable_interrupts();
- }
-
- start = get_timer (0);
-
- while (((status = BS(*addr)) & BYTEME(0x00800080)) != BYTEME(0x00800080)) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- *addr = BS(0xFF); /* restore read mode */
- return 1;
- }
- }
-
- *addr = BS(0xFF); /* restore read mode */
-
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- */
diff --git a/board/a3000/u-boot.lds b/board/a3000/u-boot.lds
deleted file mode 100644
index acb9ffda3b..0000000000
--- a/board/a3000/u-boot.lds
+++ /dev/null
@@ -1,135 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc824x/start.o (.text)
- lib_ppc/board.o (.text)
- lib_ppc/ppcstring.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
- lib_generic/zlib.o (.text)
-
- . = DEFINED(env_offset) ? env_offset : .;
- common/environment.o (.text)
-
- *(.text)
-
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
-
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/adder/Makefile b/board/adder/Makefile
deleted file mode 100644
index 9123a8026d..0000000000
--- a/board/adder/Makefile
+++ /dev/null
@@ -1,46 +0,0 @@
-#
-# Copyright (C) 2004 Arabella Software Ltd.
-# Yuli Barcohen <yuli@arabellasw.com>
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := $(BOARD).o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/adder/adder.c b/board/adder/adder.c
deleted file mode 100644
index cab6e2f66a..0000000000
--- a/board/adder/adder.c
+++ /dev/null
@@ -1,107 +0,0 @@
-/*
- * Copyright (C) 2004 Arabella Software Ltd.
- * Yuli Barcohen <yuli@arabellasw.com>
- *
- * Support for Analogue&Micro Adder boards family.
- * Tested on AdderII and Adder87x.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-
-/*
- * SDRAM is single Samsung K4S643232F-T70 chip.
- * Minimal CPU frequency is 40MHz.
- */
-static uint sdram_table[] = {
- /* Single read (offset 0x00 in UPM RAM) */
- 0x1f07fc24, 0xe0aefc04, 0x10adfc04, 0xe0bbbc00,
- 0x10f77c44, 0xf3fffc07, 0xfffffc04, 0xfffffc04,
-
- /* Burst read (offset 0x08 in UPM RAM) */
- 0x1f07fc24, 0xe0aefc04, 0x10adfc04, 0xf0affc00,
- 0xf0affc00, 0xf0affc00, 0xf0affc00, 0x10a77c44,
- 0xf7bffc47, 0xfffffc35, 0xfffffc34, 0xfffffc35,
- 0xfffffc35, 0x1ff77c35, 0xfffffc34, 0x1fb57c35,
-
- /* Single write (offset 0x18 in UPM RAM) */
- 0x1f27fc24, 0xe0aebc04, 0x00b93c00, 0x13f77c47,
- 0xfffdfc04, 0xfffffc04, 0xfffffc04, 0xfffffc04,
-
- /* Burst write (offset 0x20 in UPM RAM) */
- 0x1f07fc24, 0xeeaebc00, 0x10ad7c00, 0xf0affc00,
- 0xf0affc00, 0xe0abbc00, 0x1fb77c47, 0xfffffc04,
- 0xfffffc04, 0xfffffc04, 0xfffffc04, 0xfffffc04,
- 0xfffffc04, 0xfffffc04, 0xfffffc04, 0xfffffc04,
-
- /* Refresh (offset 0x30 in UPM RAM) */
- 0x1ff5fca4, 0xfffffc04, 0xfffffc04, 0xfffffc04,
- 0xfffffc84, 0xfffffc07, 0xfffffc04, 0xfffffc04,
- 0xfffffc04, 0xfffffc04, 0xfffffc04, 0xfffffc04,
-
- /* Exception (offset 0x3C in UPM RAM) */
- 0xfffffc27, 0xfffffc04, 0xfffffc04, 0xfffffc04
-};
-
-long int initdram (int board_type)
-{
- long int msize = CFG_SDRAM_SIZE;
- volatile immap_t *immap = (volatile immap_t *)CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
-
- upmconfig(UPMA, sdram_table, sizeof(sdram_table) / sizeof(uint));
-
- /* Configure SDRAM refresh */
- memctl->memc_mptpr = MPTPR_PTP_DIV32; /* BRGCLK/32 */
-
- memctl->memc_mamr = (94 << 24) | CFG_MAMR;
- memctl->memc_mar = 0x0;
- udelay(200);
-
- /* Run precharge from location 0x15 */
- memctl->memc_mcr = 0x80002115;
- udelay(200);
-
- /* Run 8 refresh cycles */
- memctl->memc_mcr = 0x80002830;
- udelay(200);
-
- memctl->memc_mar = 0x88;
- udelay(200);
-
- /* Run MRS pattern from location 0x16 */
- memctl->memc_mcr = 0x80002116;
- udelay(200);
-
- return msize;
-}
-
-int checkboard( void )
-{
- puts("Board: Adder");
-#if defined(CONFIG_MPC885_FAMILY)
- puts("87x\n");
-#elif defined(CONFIG_MPC866_FAMILY)
- puts("II\n");
-#endif
-
- return 0;
-}
diff --git a/board/adder/config.mk b/board/adder/config.mk
deleted file mode 100644
index 4691a69ef1..0000000000
--- a/board/adder/config.mk
+++ /dev/null
@@ -1,27 +0,0 @@
-#
-# Copyright (C) 2004 Arabella Software Ltd.
-# Yuli Barcohen <yuli@arabellasw.com>
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# Analogue&Micro Adder boards family
-#
-TEXT_BASE = 0xFE000000
diff --git a/board/adder/u-boot.lds b/board/adder/u-boot.lds
deleted file mode 100644
index 66c324625a..0000000000
--- a/board/adder/u-boot.lds
+++ /dev/null
@@ -1,125 +0,0 @@
-/*
- * (C) Copyright 2001-2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * Modified by Yuli Barcohen <yuli@arabellasw.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc8xx/start.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
-ENTRY(_start)
diff --git a/board/adsvix/Makefile b/board/adsvix/Makefile
deleted file mode 100644
index 24d5d062bc..0000000000
--- a/board/adsvix/Makefile
+++ /dev/null
@@ -1,48 +0,0 @@
-
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := adsvix.o pcmcia.o
-SOBJS := lowlevel_init.o pxavoltage.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS) $(SOBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/adsvix/adsvix.c b/board/adsvix/adsvix.c
deleted file mode 100644
index 5e770e9493..0000000000
--- a/board/adsvix/adsvix.c
+++ /dev/null
@@ -1,77 +0,0 @@
-/*
- * (C) Copyright 2004
- * Robert Whaley, Applied Data Systems, Inc. rwhaley@applieddata.net
- *
- * (C) Copyright 2002
- * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
- *
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Miscelaneous platform dependent initialisations
- */
-
-int board_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- /* memory and cpu-speed are setup before relocation */
- /* so we do _nothing_ here */
-
- /* arch number of ADSVIX-Board */
- gd->bd->bi_arch_number = 620;
-
- /* adress of boot parameters */
- gd->bd->bi_boot_params = 0xa000003c;
-
- return 0;
-}
-
-int board_late_init(void)
-{
- setenv("stdout", "serial");
- setenv("stderr", "serial");
- return 0;
-}
-
-
-int dram_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
- gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
- gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
- gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
- gd->bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE;
- gd->bd->bi_dram[3].start = PHYS_SDRAM_4;
- gd->bd->bi_dram[3].size = PHYS_SDRAM_4_SIZE;
-
- return 0;
-}
diff --git a/board/adsvix/config.mk b/board/adsvix/config.mk
deleted file mode 100644
index 98be4ebe00..0000000000
--- a/board/adsvix/config.mk
+++ /dev/null
@@ -1 +0,0 @@
-TEXT_BASE = 0xa1700000
diff --git a/board/adsvix/lowlevel_init.S b/board/adsvix/lowlevel_init.S
deleted file mode 100644
index 8dea71c356..0000000000
--- a/board/adsvix/lowlevel_init.S
+++ /dev/null
@@ -1,466 +0,0 @@
-/*
- * This was originally from the Lubbock u-boot port.
- *
- * Most of this taken from Redboot hal_platform_setup.h with cleanup
- *
- * NOTE: I haven't clean this up considerably, just enough to get it
- * running. See hal_platform_setup.h for the source. See
- * board/cradle/lowlevel_init.S for another PXA250 setup that is
- * much cleaner.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <config.h>
-#include <version.h>
-#include <asm/arch/pxa-regs.h>
-
-/* wait for coprocessor write complete */
- .macro CPWAIT reg
- mrc p15,0,\reg,c2,c0,0
- mov \reg,\reg
- sub pc,pc,#4
- .endm
-
-
-/*
- * Memory setup
- */
-
-.globl lowlevel_init
-lowlevel_init:
-
- /* Set up GPIO pins first ----------------------------------------- */
-
- ldr r0, =GPSR0
- ldr r1, =CFG_GPSR0_VAL
- str r1, [r0]
-
- ldr r0, =GPSR1
- ldr r1, =CFG_GPSR1_VAL
- str r1, [r0]
-
- ldr r0, =GPSR2
- ldr r1, =CFG_GPSR2_VAL
- str r1, [r0]
-
- ldr r0, =GPSR3
- ldr r1, =CFG_GPSR3_VAL
- str r1, [r0]
-
- ldr r0, =GPCR0
- ldr r1, =CFG_GPCR0_VAL
- str r1, [r0]
-
- ldr r0, =GPCR1
- ldr r1, =CFG_GPCR1_VAL
- str r1, [r0]
-
- ldr r0, =GPCR2
- ldr r1, =CFG_GPCR2_VAL
- str r1, [r0]
-
- ldr r0, =GPCR3
- ldr r1, =CFG_GPCR3_VAL
- str r1, [r0]
-
- ldr r0, =GPDR0
- ldr r1, =CFG_GPDR0_VAL
- str r1, [r0]
-
- ldr r0, =GPDR1
- ldr r1, =CFG_GPDR1_VAL
- str r1, [r0]
-
- ldr r0, =GPDR2
- ldr r1, =CFG_GPDR2_VAL
- str r1, [r0]
-
- ldr r0, =GPDR3
- ldr r1, =CFG_GPDR3_VAL
- str r1, [r0]
-
- ldr r0, =GAFR0_L
- ldr r1, =CFG_GAFR0_L_VAL
- str r1, [r0]
-
- ldr r0, =GAFR0_U
- ldr r1, =CFG_GAFR0_U_VAL
- str r1, [r0]
-
- ldr r0, =GAFR1_L
- ldr r1, =CFG_GAFR1_L_VAL
- str r1, [r0]
-
- ldr r0, =GAFR1_U
- ldr r1, =CFG_GAFR1_U_VAL
- str r1, [r0]
-
- ldr r0, =GAFR2_L
- ldr r1, =CFG_GAFR2_L_VAL
- str r1, [r0]
-
- ldr r0, =GAFR2_U
- ldr r1, =CFG_GAFR2_U_VAL
- str r1, [r0]
-
- ldr r0, =GAFR3_L
- ldr r1, =CFG_GAFR3_L_VAL
- str r1, [r0]
-
- ldr r0, =GAFR3_U
- ldr r1, =CFG_GAFR3_U_VAL
- str r1, [r0]
-
- ldr r0, =PSSR /* enable GPIO pins */
- ldr r1, =CFG_PSSR_VAL
- str r1, [r0]
-
- /* ---------------------------------------------------------------- */
- /* Enable memory interface */
- /* */
- /* The sequence below is based on the recommended init steps */
- /* detailed in the Intel PXA250 Operating Systems Developers Guide, */
- /* Chapter 10. */
- /* ---------------------------------------------------------------- */
-
- /* ---------------------------------------------------------------- */
- /* Step 1: Wait for at least 200 microsedonds to allow internal */
- /* clocks to settle. Only necessary after hard reset... */
- /* FIXME: can be optimized later */
- /* ---------------------------------------------------------------- */
-
- ldr r3, =OSCR /* reset the OS Timer Count to zero */
- mov r2, #0
- str r2, [r3]
- ldr r4, =0x300 /* really 0x2E1 is about 200usec, */
- /* so 0x300 should be plenty */
-1:
- ldr r2, [r3]
- cmp r4, r2
- bgt 1b
-
-mem_init:
-
- ldr r1, =MEMC_BASE /* get memory controller base addr. */
-
- /* ---------------------------------------------------------------- */
- /* Step 2a: Initialize Asynchronous static memory controller */
- /* ---------------------------------------------------------------- */
-
- /* MSC registers: timing, bus width, mem type */
-
- /* MSC0: nCS(0,1) */
- ldr r2, =CFG_MSC0_VAL
- str r2, [r1, #MSC0_OFFSET]
- ldr r2, [r1, #MSC0_OFFSET] /* read back to ensure */
- /* that data latches */
- /* MSC1: nCS(2,3) */
- ldr r2, =CFG_MSC1_VAL
- str r2, [r1, #MSC1_OFFSET]
- ldr r2, [r1, #MSC1_OFFSET]
-
- /* MSC2: nCS(4,5) */
- ldr r2, =CFG_MSC2_VAL
- str r2, [r1, #MSC2_OFFSET]
- ldr r2, [r1, #MSC2_OFFSET]
-
- /* ---------------------------------------------------------------- */
- /* Step 2b: Initialize Card Interface */
- /* ---------------------------------------------------------------- */
-
- /* MECR: Memory Expansion Card Register */
- ldr r2, =CFG_MECR_VAL
- str r2, [r1, #MECR_OFFSET]
- ldr r2, [r1, #MECR_OFFSET]
-
- /* MCMEM0: Card Interface slot 0 timing */
- ldr r2, =CFG_MCMEM0_VAL
- str r2, [r1, #MCMEM0_OFFSET]
- ldr r2, [r1, #MCMEM0_OFFSET]
-
- /* MCMEM1: Card Interface slot 1 timing */
- ldr r2, =CFG_MCMEM1_VAL
- str r2, [r1, #MCMEM1_OFFSET]
- ldr r2, [r1, #MCMEM1_OFFSET]
-
- /* MCATT0: Card Interface Attribute Space Timing, slot 0 */
- ldr r2, =CFG_MCATT0_VAL
- str r2, [r1, #MCATT0_OFFSET]
- ldr r2, [r1, #MCATT0_OFFSET]
-
- /* MCATT1: Card Interface Attribute Space Timing, slot 1 */
- ldr r2, =CFG_MCATT1_VAL
- str r2, [r1, #MCATT1_OFFSET]
- ldr r2, [r1, #MCATT1_OFFSET]
-
- /* MCIO0: Card Interface I/O Space Timing, slot 0 */
- ldr r2, =CFG_MCIO0_VAL
- str r2, [r1, #MCIO0_OFFSET]
- ldr r2, [r1, #MCIO0_OFFSET]
-
- /* MCIO1: Card Interface I/O Space Timing, slot 1 */
- ldr r2, =CFG_MCIO1_VAL
- str r2, [r1, #MCIO1_OFFSET]
- ldr r2, [r1, #MCIO1_OFFSET]
-
- /* ---------------------------------------------------------------- */
- /* Step 2c: Write FLYCNFG FIXME: what's that??? */
- /* ---------------------------------------------------------------- */
- ldr r2, =CFG_FLYCNFG_VAL
- str r2, [r1, #FLYCNFG_OFFSET]
- str r2, [r1, #FLYCNFG_OFFSET]
-
- /* ---------------------------------------------------------------- */
- /* Step 2d: Initialize Timing for Sync Memory (SDCLK0) */
- /* ---------------------------------------------------------------- */
-
- /* Before accessing MDREFR we need a valid DRI field, so we set */
- /* this to power on defaults + DRI field. */
-
- ldr r4, [r1, #MDREFR_OFFSET]
- ldr r2, =0xFFF
- bic r4, r4, r2
-
- ldr r3, =CFG_MDREFR_VAL
- and r3, r3, r2
-
- orr r4, r4, r3
- str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */
-
- orr r4, r4, #MDREFR_K0RUN
- orr r4, r4, #MDREFR_K0DB4
- orr r4, r4, #MDREFR_K0FREE
- orr r4, r4, #MDREFR_K0DB2
- orr r4, r4, #MDREFR_K1DB2
- bic r4, r4, #MDREFR_K1FREE
- bic r4, r4, #MDREFR_K2FREE
-
- str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */
- ldr r4, [r1, #MDREFR_OFFSET]
-
- /* Note: preserve the mdrefr value in r4 */
-
-
- /* ---------------------------------------------------------------- */
- /* Step 3: Initialize Synchronous Static Memory (Flash/Peripherals) */
- /* ---------------------------------------------------------------- */
-
- /* Initialize SXCNFG register. Assert the enable bits */
-
- /* Write SXMRS to cause an MRS command to all enabled banks of */
- /* synchronous static memory. Note that SXLCR need not be written */
- /* at this time. */
-
- ldr r2, =CFG_SXCNFG_VAL
- str r2, [r1, #SXCNFG_OFFSET]
-
- /* ---------------------------------------------------------------- */
- /* Step 4: Initialize SDRAM */
- /* ---------------------------------------------------------------- */
-
- bic r4, r4, #(MDREFR_K2FREE |MDREFR_K1FREE | MDREFR_K0FREE)
-
- orr r4, r4, #MDREFR_K1RUN
- bic r4, r4, #MDREFR_K2DB2
- str r4, [r1, #MDREFR_OFFSET]
- ldr r4, [r1, #MDREFR_OFFSET]
-
- bic r4, r4, #MDREFR_SLFRSH
- str r4, [r1, #MDREFR_OFFSET]
- ldr r4, [r1, #MDREFR_OFFSET]
-
- orr r4, r4, #MDREFR_E1PIN
- str r4, [r1, #MDREFR_OFFSET]
- ldr r4, [r1, #MDREFR_OFFSET]
-
- nop
- nop
-
-
- /* Step 4d: write MDCNFG with MDCNFG:DEx deasserted (set to 0), to */
- /* configure but not enable each SDRAM partition pair. */
-
- ldr r4, =CFG_MDCNFG_VAL
- bic r4, r4, #(MDCNFG_DE0|MDCNFG_DE1)
- bic r4, r4, #(MDCNFG_DE2|MDCNFG_DE3)
-
- str r4, [r1, #MDCNFG_OFFSET] /* write back MDCNFG */
- ldr r4, [r1, #MDCNFG_OFFSET]
-
-
- /* Step 4e: Wait for the clock to the SDRAMs to stabilize, */
- /* 100..200 µsec. */
-
- ldr r3, =OSCR /* reset the OS Timer Count to zero */
- mov r2, #0
- str r2, [r3]
- ldr r4, =0x300 /* really 0x2E1 is about 200usec, */
- /* so 0x300 should be plenty */
-1:
- ldr r2, [r3]
- cmp r4, r2
- bgt 1b
-
-
- /* Step 4f: Trigger a number (usually 8) refresh cycles by */
- /* attempting non-burst read or write accesses to disabled */
- /* SDRAM, as commonly specified in the power up sequence */
- /* documented in SDRAM data sheets. The address(es) used */
- /* for this purpose must not be cacheable. */
-
- ldr r3, =CFG_DRAM_BASE
- str r2, [r3]
- str r2, [r3]
- str r2, [r3]
- str r2, [r3]
- str r2, [r3]
- str r2, [r3]
- str r2, [r3]
- str r2, [r3]
-
-
- /* Step 4g: Write MDCNFG with enable bits asserted */
- /* (MDCNFG:DEx set to 1). */
-
- ldr r3, [r1, #MDCNFG_OFFSET]
- mov r4, r3
- orr r3, r3, #MDCNFG_DE0
- str r3, [r1, #MDCNFG_OFFSET]
- mov r0, r3
-
- /* Step 4h: Write MDMRS. */
-
- ldr r2, =CFG_MDMRS_VAL
- str r2, [r1, #MDMRS_OFFSET]
-
- /* enable APD */
- ldr r3, [r1, #MDREFR_OFFSET]
- orr r3, r3, #MDREFR_APD
- str r3, [r1, #MDREFR_OFFSET]
-
- /* We are finished with Intel's memory controller initialisation */
-
-setvoltage:
-
- mov r10, lr
- bl initPXAvoltage /* In case the board is rebooting with a */
- mov lr, r10 /* low voltage raise it up to a good one. */
-
-wakeup:
- /* Are we waking from sleep? */
- ldr r0, =RCSR
- ldr r1, [r0]
- and r1, r1, #(RCSR_GPR | RCSR_SMR | RCSR_WDR | RCSR_HWR)
- str r1, [r0]
- teq r1, #RCSR_SMR
-
- bne initirqs
-
- ldr r0, =PSSR
- mov r1, #PSSR_PH
- str r1, [r0]
-
- /* if so, resume at PSPR */
- ldr r0, =PSPR
- ldr r1, [r0]
- mov pc, r1
-
- /* ---------------------------------------------------------------- */
- /* Disable (mask) all interrupts at interrupt controller */
- /* ---------------------------------------------------------------- */
-
-initirqs:
-
- mov r1, #0 /* clear int. level register (IRQ, not FIQ) */
- ldr r2, =ICLR
- str r1, [r2]
-
- ldr r2, =ICMR /* mask all interrupts at the controller */
- str r1, [r2]
-
- /* ---------------------------------------------------------------- */
- /* Clock initialisation */
- /* ---------------------------------------------------------------- */
-
-initclks:
-
- /* Disable the peripheral clocks, and set the core clock frequency */
-
- /* Turn Off on-chip peripheral clocks (except for memory) */
- /* for re-configuration. */
- ldr r1, =CKEN
- ldr r2, =CFG_CKEN
- str r2, [r1]
-
- /* ... and write the core clock config register */
- ldr r2, =CFG_CCCR
- ldr r1, =CCCR
- str r2, [r1]
-
- /* Turn on turbo mode */
- mrc p14, 0, r2, c6, c0, 0
- orr r2, r2, #0xB /* Turbo, Fast-Bus, Freq change**/
- mcr p14, 0, r2, c6, c0, 0
-
- /* Re-write MDREFR */
- ldr r1, =MEMC_BASE
- ldr r2, [r1, #MDREFR_OFFSET]
- str r2, [r1, #MDREFR_OFFSET]
-#ifdef RTC
- /* enable the 32Khz oscillator for RTC and PowerManager */
- ldr r1, =OSCC
- mov r2, #OSCC_OON
- str r2, [r1]
-
- /* NOTE: spin here until OSCC.OOK get set, meaning the PLL */
- /* has settled. */
-60:
- ldr r2, [r1]
- ands r2, r2, #1
- beq 60b
-#else
-#error "RTC not defined"
-#endif
-
- /* Interrupt init: Mask all interrupts */
- ldr r0, =ICMR /* enable no sources */
- mov r1, #0
- str r1, [r0]
- /* FIXME */
-
-#ifdef NODEBUG
- /*Disable software and data breakpoints */
- mov r0,#0
- mcr p15,0,r0,c14,c8,0 /* ibcr0 */
- mcr p15,0,r0,c14,c9,0 /* ibcr1 */
- mcr p15,0,r0,c14,c4,0 /* dbcon */
-
- /*Enable all debug functionality */
- mov r0,#0x80000000
- mcr p14,0,r0,c10,c0,0 /* dcsr */
-#endif
-
- /* ---------------------------------------------------------------- */
- /* End lowlevel_init */
- /* ---------------------------------------------------------------- */
-
-endlowlevel_init:
-
- mov pc, lr
diff --git a/board/adsvix/pcmcia.c b/board/adsvix/pcmcia.c
deleted file mode 100644
index ba5be01397..0000000000
--- a/board/adsvix/pcmcia.c
+++ /dev/null
@@ -1,67 +0,0 @@
-/*
- * (C) Copyright 2004
- * Robert Whaley, Applied Data Systems, Inc. rwhaley@applieddata.net
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/arch/pxa-regs.h>
-
-void pcmcia_power_on(void)
-{
-#if 0
- if (!(GPLR(20) & GPIO_bit(20))) { /* 3.3V */
- GPCR(81) = GPIO_bit(81);
- GPSR(82) = GPIO_bit(82);
- }
- else if (!(GPLR(21) & GPIO_bit(21))) { /* 5.0V */
- GPCR(81) = GPIO_bit(81);
- GPCR(82) = GPIO_bit(82);
- }
-#else
-#warning "Board will only supply 5V, wait for next HW spin for selectable power"
- /* 5.0V */
- GPCR(81) = GPIO_bit(81);
- GPCR(82) = GPIO_bit(82);
-#endif
-
- udelay(300000);
-
- /* reset the card */
- GPSR(52) = GPIO_bit(52);
-
- /* enable PCMCIA */
- GPCR(83) = GPIO_bit(83);
-
- /* clear reset */
- udelay(10);
- GPCR(52) = GPIO_bit(52);
-
- udelay(20000);
-}
-
-void pcmcia_power_off(void)
-{
- /* 0V */
- GPSR(81) = GPIO_bit(81);
- GPSR(82) = GPIO_bit(82);
- /* disable PCMCIA */
- GPSR(83) = GPIO_bit(83);
-}
diff --git a/board/adsvix/pxavoltage.S b/board/adsvix/pxavoltage.S
deleted file mode 100644
index 2fe1cabd7c..0000000000
--- a/board/adsvix/pxavoltage.S
+++ /dev/null
@@ -1,230 +0,0 @@
-/*
- * (C) Copyright 2004
- * Robert Whaley, Applied Data Systems, Inc. rwhaley@applieddata.net
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <asm/arch/pxa-regs.h>
-
-#define LTC1663_ADDR 0x20
-
-#define LTC1663_SY 0x01 /* Sync ACK */
-#define LTC1663_SD 0x04 /* shutdown */
-#define LTC1663_BG 0x04 /* Internal Voltage Ref */
-
-#define VOLT_1_55 18 /* DAC value for 1.55V */
-
- .global initPXAvoltage
-
-@ Set the voltage to 1.55V early in the boot process so we can run
-@ at a high clock speed and boot quickly. Note that this is necessary
-@ because the reset button does not reset the CPU voltage, so if the
-@ voltage was low (say 0.85V) then the CPU would crash without this
-@ routine
-
-@ This routine clobbers r0-r4
-
-initializei2c:
-
- ldr r2, =CKEN
- ldr r3, [r2]
- orr r3, r3, #CKEN15_PWRI2C
- str r3, [r2]
-
- ldr r2, =PCFR
- ldr r3, [r2]
- orr r3, r3, #PCFR_PI2C_EN
- str r3, [r2]
-
- /* delay for about 250msec
- */
- ldr r3, =OSCR
- mov r2, #0
- str r2, [r3]
- ldr r1, =0xC0000
-
-1:
- ldr r2, [r3]
- cmp r1, r2
- bgt 1b
- ldr r0, =PWRICR
- ldr r1, [r0]
- bic r1, r1, #(ICR_MA | ICR_START | ICR_STOP)
- str r1, [r0]
-
- orr r1, r1, #ICR_UR
- str r1, [r0]
-
- ldr r2, =PWRISR
- ldr r3, =0x7ff
- str r3, [r2]
-
- bic r1, r1, #ICR_UR
- str r1, [r0]
-
- mov r1, #(ICR_GCD | ICR_SCLE)
- str r1, [r0]
-
- orr r1, r1, #ICR_IUE
- str r1, [r0]
-
- orr r1, r1, #ICR_FM
- str r1, [r0]
-
- /* delay for about 1msec
- */
- ldr r3, =OSCR
- mov r2, #0
- str r2, [r3]
- ldr r1, =0xC00
-
-1:
- ldr r2, [r3]
- cmp r1, r2
- bgt 1b
- mov pc, lr
-
-sendbytei2c:
- ldr r3, =PWRIDBR
- str r0, [r3]
- ldr r3, =PWRICR
- ldr r0, [r3]
- orr r0, r0, r1
- bic r0, r0, r2
- str r0, [r3]
- orr r0, r0, #ICR_TB
- str r0, [r3]
-
- mov r2, #0x100000
-
-waitfortxemptyi2c:
-
- ldr r0, =PWRISR
- ldr r1, [r0]
-
- /* take it from the top if we don't get empty after a while */
- subs r2, r2, #1
- moveq lr, r4
- beq initPXAvoltage
-
- tst r1, #ISR_ITE
-
- beq waitfortxemptyi2c
-
- orr r1, r1, #ISR_ITE
- str r1, [r0]
-
- mov pc, lr
-
-initPXAvoltage:
-
- mov r4, lr
-
- bl setleds
-
- bl initializei2c
-
- bl setleds
-
- /* now send the real message to set the correct voltage */
- ldr r0, =LTC1663_ADDR
- mov r0, r0, LSL #1
- mov r1, #ICR_START
- ldr r2, =(ICR_STOP | ICR_ALDIE | ICR_ACKNAK)
- bl sendbytei2c
-
- bl setleds
-
- mov r0, #LTC1663_BG
- mov r1, #0
- mov r2, #(ICR_STOP | ICR_START)
- bl sendbytei2c
-
- bl setleds
-
- ldr r0, =VOLT_1_55
- and r0, r0, #0xff
- mov r1, #0
- mov r2, #(ICR_STOP | ICR_START)
- bl sendbytei2c
-
- bl setleds
-
- ldr r0, =VOLT_1_55
- mov r0, r0, ASR #8
- and r0, r0, #0xff
- mov r1, #ICR_STOP
- mov r2, #ICR_START
- bl sendbytei2c
-
- bl setleds
-
- @ delay a little for the volatage to stablize
- ldr r3, =OSCR
- mov r2, #0
- str r2, [r3]
- ldr r1, =0xC0
-
-1:
- ldr r2, [r3]
- cmp r1, r2
- bgt 1b
- mov pc, r4
-
-setleds:
- mov pc, lr
-
- ldr r5, =0x40e00058
- ldr r3, [r5]
- bic r3, r3, #0x3
- str r3, [r5]
- ldr r5, =0x40e0000c
- ldr r3, [r5]
- orr r3, r3, #0x00010000
- str r3, [r5]
-
- @ inner loop
- mov r0, #0x2
-1:
-
- ldr r5, =0x40e00018
- mov r3, #0x00010000
- str r3, [r5]
-
- @ outer loop
- mov r3, #0x00F00000
-2:
- subs r3, r3, #1
- bne 2b
-
- ldr r5, =0x40e00024
- mov r3, #0x00010000
- str r3, [r5]
-
- @ outer loop
- mov r3, #0x00F00000
-3:
- subs r3, r3, #1
- bne 3b
-
- subs r0, r0, #1
- bne 1b
-
- mov pc, lr
diff --git a/board/adsvix/u-boot.lds b/board/adsvix/u-boot.lds
deleted file mode 100644
index f0102391b3..0000000000
--- a/board/adsvix/u-boot.lds
+++ /dev/null
@@ -1,56 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-ENTRY(_start)
-SECTIONS
-{
- . = 0x00000000;
-
- . = ALIGN(4);
- .text :
- {
- cpu/pxa/start.o (.text)
- *(.text)
- }
-
- . = ALIGN(4);
- .rodata : { *(.rodata) }
-
- . = ALIGN(4);
- .data : { *(.data) }
-
- . = ALIGN(4);
- .got : { *(.got) }
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = ALIGN(4);
- __bss_start = .;
- .bss : { *(.bss) }
- _end = .;
-}
diff --git a/board/alaska/Makefile b/board/alaska/Makefile
deleted file mode 100644
index a4c1d2e9ac..0000000000
--- a/board/alaska/Makefile
+++ /dev/null
@@ -1,45 +0,0 @@
-# (C) Copyright 2003-2005
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := $(BOARD).o flash.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/alaska/alaska.c b/board/alaska/alaska.c
deleted file mode 100644
index 93874b24f5..0000000000
--- a/board/alaska/alaska.c
+++ /dev/null
@@ -1,153 +0,0 @@
-/*
- * (C) Copyright 2004, Freescale Inc.
- * TsiChung Liew, Tsi-Chung.Liew@freescale.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc8220.h>
-#include <asm/processor.h>
-#include <asm/mmu.h>
-
-void setupBat (ulong size)
-{
- ulong batu, batl;
- int blocksize = 0;
-
- /* Flash 0 */
-#if defined (CFG_AMD_BOOT)
- batu = CFG_FLASH0_BASE | (BL_512K << 2) | BPP_RW | BPP_RX;
-#else
- batu = CFG_FLASH0_BASE | (BL_16M << 2) | BPP_RW | BPP_RX;
-#endif
- batl = CFG_FLASH0_BASE | 0x22;
- write_bat (IBAT0, batu, batl);
- write_bat (DBAT0, batu, batl);
-
- /* Flash 1 */
-#if defined (CFG_AMD_BOOT)
- batu = CFG_FLASH1_BASE | (BL_16M << 2) | BPP_RW | BPP_RX;
-#else
- batu = CFG_FLASH1_BASE | (BL_512K << 2) | BPP_RW | BPP_RX;
-#endif
- batl = CFG_FLASH1_BASE | 0x22;
- write_bat (IBAT1, batu, batl);
- write_bat (DBAT1, batu, batl);
-
- /* CPLD */
- batu = CFG_CPLD_BASE | (BL_512K << 2) | BPP_RW | BPP_RX;
- batl = CFG_CPLD_BASE | 0x22;
- write_bat (IBAT2, 0, 0);
- write_bat (DBAT2, batu, batl);
-
- /* FPGA */
- batu = CFG_FPGA_BASE | (BL_512K << 2) | BPP_RW | BPP_RX;
- batl = CFG_FPGA_BASE | 0x22;
- write_bat (IBAT3, 0, 0);
- write_bat (DBAT3, batu, batl);
-
- /* MBAR - Data only */
- batu = CFG_MBAR | BPP_RW | BPP_RX;
- batl = CFG_MBAR | 0x22;
- mtspr (IBAT4L, 0);
- mtspr (IBAT4U, 0);
- mtspr (DBAT4L, batl);
- mtspr (DBAT4U, batu);
-
- /* MBAR - SRAM */
- batu = CFG_SRAM_BASE | BPP_RW | BPP_RX;
- batl = CFG_SRAM_BASE | 0x42;
- mtspr (IBAT5L, batl);
- mtspr (IBAT5U, batu);
- mtspr (DBAT5L, batl);
- mtspr (DBAT5U, batu);
-
- if (size <= 0x800000) /* 8MB */
- blocksize = BL_8M << 2;
- else if (size <= 0x1000000) /* 16MB */
- blocksize = BL_16M << 2;
- else if (size <= 0x2000000) /* 32MB */
- blocksize = BL_32M << 2;
- else if (size <= 0x4000000) /* 64MB */
- blocksize = BL_64M << 2;
- else if (size <= 0x8000000) /* 128MB */
- blocksize = BL_128M << 2;
- else if (size <= 0x10000000) /* 256MB */
- blocksize = BL_256M << 2;
-
- /* Memory */
- batu = CFG_SDRAM_BASE | blocksize | BPP_RW | BPP_RX;
- batl = CFG_SDRAM_BASE | 0x42;
- mtspr (IBAT6L, batl);
- mtspr (IBAT6U, batu);
- mtspr (DBAT6L, batl);
- mtspr (DBAT6U, batu);
-
- /* memory size is less than 256MB */
- if (size <= 0x10000000) {
- /* Nothing */
- batu = 0;
- batl = 0;
- } else {
- size -= 0x10000000;
- if (size <= 0x800000) /* 8MB */
- blocksize = BL_8M << 2;
- else if (size <= 0x1000000) /* 16MB */
- blocksize = BL_16M << 2;
- else if (size <= 0x2000000) /* 32MB */
- blocksize = BL_32M << 2;
- else if (size <= 0x4000000) /* 64MB */
- blocksize = BL_64M << 2;
- else if (size <= 0x8000000) /* 128MB */
- blocksize = BL_128M << 2;
- else if (size <= 0x10000000) /* 256MB */
- blocksize = BL_256M << 2;
-
- batu = (CFG_SDRAM_BASE +
- 0x10000000) | blocksize | BPP_RW | BPP_RX;
- batl = (CFG_SDRAM_BASE + 0x10000000) | 0x42;
- }
-
- mtspr (IBAT7L, batl);
- mtspr (IBAT7U, batu);
- mtspr (DBAT7L, batl);
- mtspr (DBAT7U, batu);
-}
-
-long int initdram (int board_type)
-{
- ulong size;
-
- size = dramSetup ();
-
-/* if iCache ad dCache is defined */
-#if (CONFIG_COMMANDS & CFG_CMD_CACHE)
-/* setupBat(size);*/
-#endif
-
- return size;
-}
-
-int checkboard (void)
-{
- puts ("Board: Alaska MPC8220 Evaluation Board\n");
-
- return 0;
-}
diff --git a/board/alaska/config.mk b/board/alaska/config.mk
deleted file mode 100644
index 99d28a54fc..0000000000
--- a/board/alaska/config.mk
+++ /dev/null
@@ -1,31 +0,0 @@
-#
-# (C) Copyright 2003-2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# alaska board
-#
-
-TEXT_BASE = 0xfff00000
-# TEXT_BASE = 0x00100000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
diff --git a/board/alaska/flash.c b/board/alaska/flash.c
deleted file mode 100644
index 383491f566..0000000000
--- a/board/alaska/flash.c
+++ /dev/null
@@ -1,936 +0,0 @@
-/*
- * (C) Copyright 2001
- * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
- *
- * (C) Copyright 2001-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <linux/byteorder/swab.h>
-
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/* Board support for 1 or 2 flash devices */
-#define FLASH_PORT_WIDTH8
-
-typedef unsigned char FLASH_PORT_WIDTH;
-typedef volatile unsigned char FLASH_PORT_WIDTHV;
-
-#define SWAP(x) (x)
-
-/* Intel-compatible flash ID */
-#define INTEL_COMPAT 0x89
-#define INTEL_ALT 0xB0
-
-/* Intel-compatible flash commands */
-#define INTEL_PROGRAM 0x10
-#define INTEL_ERASE 0x20
-#define INTEL_CLEAR 0x50
-#define INTEL_LOCKBIT 0x60
-#define INTEL_PROTECT 0x01
-#define INTEL_STATUS 0x70
-#define INTEL_READID 0x90
-#define INTEL_CONFIRM 0xD0
-#define INTEL_RESET 0xFF
-
-/* Intel-compatible flash status bits */
-#define INTEL_FINISHED 0x80
-#define INTEL_OK 0x80
-
-#define FPW FLASH_PORT_WIDTH
-#define FPWV FLASH_PORT_WIDTHV
-
-#define FLASH_CYCLE1 0x0555
-#define FLASH_CYCLE2 0x02aa
-
-#define WR_BLOCK 0x20
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (FPW * addr, flash_info_t * info);
-static int write_data (flash_info_t * info, ulong dest, FPW data);
-static int write_data_block (flash_info_t * info, ulong src, ulong dest);
-static int write_word_amd (flash_info_t * info, FPWV * dest, FPW data);
-static void flash_get_offsets (ulong base, flash_info_t * info);
-void inline spin_wheel (void);
-static void flash_sync_real_protect (flash_info_t * info);
-static unsigned char intel_sector_protected (flash_info_t *info, ushort sector);
-static unsigned char same_chip_banks (int bank1, int bank2);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- int i;
- ulong size = 0;
- ulong fsize = 0;
-
- for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
- memset (&flash_info[i], 0, sizeof (flash_info_t));
-
- switch (i) {
- case 0:
- flash_get_size ((FPW *) CFG_FLASH1_BASE,
- &flash_info[i]);
- flash_get_offsets (CFG_FLASH1_BASE, &flash_info[i]);
- break;
- case 1:
- flash_get_size ((FPW *) CFG_FLASH1_BASE,
- &flash_info[i]);
- fsize = CFG_FLASH1_BASE + flash_info[i - 1].size;
- flash_get_offsets (fsize, &flash_info[i]);
- break;
- case 2:
- flash_get_size ((FPW *) CFG_FLASH0_BASE,
- &flash_info[i]);
- flash_get_offsets (CFG_FLASH0_BASE, &flash_info[i]);
- break;
- case 3:
- flash_get_size ((FPW *) CFG_FLASH0_BASE,
- &flash_info[i]);
- fsize = CFG_FLASH0_BASE + flash_info[i - 1].size;
- flash_get_offsets (fsize, &flash_info[i]);
- break;
- default:
- panic ("configured to many flash banks!\n");
- break;
- }
- size += flash_info[i].size;
-
- /* get the h/w and s/w protection status in sync */
- flash_sync_real_protect(&flash_info[i]);
- }
-
- /* Protect monitor and environment sectors
- */
-#if defined (CFG_AMD_BOOT)
- flash_protect (FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE + monitor_flash_len - 1,
- &flash_info[2]);
- flash_protect (FLAG_PROTECT_SET,
- CFG_INTEL_BASE,
- CFG_INTEL_BASE + monitor_flash_len - 1,
- &flash_info[1]);
-#else
- flash_protect (FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE + monitor_flash_len - 1,
- &flash_info[3]);
- flash_protect (FLAG_PROTECT_SET,
- CFG_AMD_BASE,
- CFG_AMD_BASE + monitor_flash_len - 1, &flash_info[0]);
-#endif
-
- flash_protect (FLAG_PROTECT_SET,
- CFG_ENV1_ADDR,
- CFG_ENV1_ADDR + CFG_ENV1_SIZE - 1, &flash_info[1]);
- flash_protect (FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[3]);
-
- return size;
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_get_offsets (ulong base, flash_info_t * info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN)
- return;
-
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD) {
- for (i = 0; i < info->sector_count; i++) {
- info->start[i] = base + (i * PHYS_AMD_SECT_SIZE);
- info->protect[i] = 0;
- }
- }
-
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
- for (i = 0; i < info->sector_count; i++) {
- info->start[i] = base + (i * PHYS_INTEL_SECT_SIZE);
- }
- }
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t * info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_INTEL:
- printf ("INTEL ");
- break;
- case FLASH_MAN_AMD:
- printf ("AMD ");
- break;
- default:
- printf ("Unknown Vendor ");
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_28F128J3A:
- printf ("28F128J3A\n");
- break;
-
- case FLASH_AM040:
- printf ("AMD29F040B\n");
- break;
-
- default:
- printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i], info->protect[i] ? " (RO)" : " ");
- }
- printf ("\n");
- return;
-}
-
-/*
- * The following code cannot be run from FLASH!
- */
-static ulong flash_get_size (FPW * addr, flash_info_t * info)
-{
- FPWV value;
- static int amd = 0;
-
- /* Write auto select command: read Manufacturer ID */
- /* Write auto select command sequence and test FLASH answer */
- addr[FLASH_CYCLE1] = (FPW) 0x00AA00AA; /* for AMD, Intel ignores this */
- __asm__ ("sync");
- addr[FLASH_CYCLE2] = (FPW) 0x00550055; /* for AMD, Intel ignores this */
- __asm__ ("sync");
- addr[FLASH_CYCLE1] = (FPW) 0x00900090; /* selects Intel or AMD */
- __asm__ ("sync");
-
- udelay (100);
-
- switch (addr[0] & 0xff) {
-
- case (uchar) AMD_MANUFACT:
- info->flash_id = FLASH_MAN_AMD;
- value = addr[1];
- break;
-
- case (uchar) INTEL_MANUFACT:
- info->flash_id = FLASH_MAN_INTEL;
- value = addr[2];
- break;
-
- default:
- printf ("unknown\n");
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
- return (0); /* no or unknown flash */
- }
-
- switch (value) {
-
- case (FPW) INTEL_ID_28F128J3A:
- info->flash_id += FLASH_28F128J3A;
- info->sector_count = 64;
- info->size = 0x00800000; /* => 16 MB */
- break;
-
- case (FPW) AMD_ID_LV040B:
- info->flash_id += FLASH_AM040;
- if (amd == 0) {
- info->sector_count = 7;
- info->size = 0x00070000; /* => 448 KB */
- amd = 1;
- } else {
- /* for Environment settings */
- info->sector_count = 1;
- info->size = PHYS_AMD_SECT_SIZE; /* => 64 KB */
- amd = 0;
- }
- break;
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- break;
- }
-
- if (info->sector_count > CFG_MAX_FLASH_SECT) {
- printf ("** ERROR: sector count %d > max (%d) **\n",
- info->sector_count, CFG_MAX_FLASH_SECT);
- info->sector_count = CFG_MAX_FLASH_SECT;
- }
-
- if (value == (FPW) INTEL_ID_28F128J3A)
- addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
- else
- addr[0] = (FPW) 0x00F000F0; /* restore read mode */
-
- return (info->size);
-}
-
-
-/*
- * This function gets the u-boot flash sector protection status
- * (flash_info_t.protect[]) in sync with the sector protection
- * status stored in hardware.
- */
-static void flash_sync_real_protect (flash_info_t * info)
-{
- int i;
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_28F128J3A:
- for (i = 0; i < info->sector_count; ++i) {
- info->protect[i] = intel_sector_protected(info, i);
- }
- break;
- case FLASH_AM040:
- default:
- /* no h/w protect support */
- break;
- }
-}
-
-
-/*
- * checks if "sector" in bank "info" is protected. Should work on intel
- * strata flash chips 28FxxxJ3x in 8-bit mode.
- * Returns 1 if sector is protected (or timed-out while trying to read
- * protection status), 0 if it is not.
- */
-static unsigned char intel_sector_protected (flash_info_t *info, ushort sector)
-{
- FPWV *addr;
- FPWV *lock_conf_addr;
- ulong start;
- unsigned char ret;
-
- /*
- * first, wait for the WSM to be finished. The rationale for
- * waiting for the WSM to become idle for at most
- * CFG_FLASH_ERASE_TOUT is as follows. The WSM can be busy
- * because of: (1) erase, (2) program or (3) lock bit
- * configuration. So we just wait for the longest timeout of
- * the (1)-(3), i.e. the erase timeout.
- */
-
- /* wait at least 35ns (W12) before issuing Read Status Register */
- udelay(1);
- addr = (FPWV *) info->start[sector];
- *addr = (FPW) INTEL_STATUS;
-
- start = get_timer (0);
- while ((*addr & (FPW) INTEL_FINISHED) != (FPW) INTEL_FINISHED) {
- if (get_timer (start) > CFG_FLASH_ERASE_TOUT) {
- *addr = (FPW) INTEL_RESET; /* restore read mode */
- printf("WSM busy too long, can't get prot status\n");
- return 1;
- }
- }
-
- /* issue the Read Identifier Codes command */
- *addr = (FPW) INTEL_READID;
-
- /* wait at least 35ns (W12) before reading */
- udelay(1);
-
- /* Intel example code uses offset of 4 for 8-bit flash */
- lock_conf_addr = (FPWV *) info->start[sector] + 4;
- ret = (*lock_conf_addr & (FPW) INTEL_PROTECT) ? 1 : 0;
-
- /* put flash back in read mode */
- *addr = (FPW) INTEL_RESET;
-
- return ret;
-}
-
-
-/*
- * Checks if "bank1" and "bank2" are on the same chip. Returns 1 if they
- * are and 0 otherwise.
- */
-static unsigned char same_chip_banks (int bank1, int bank2)
-{
- unsigned char same_chip[CFG_MAX_FLASH_BANKS][CFG_MAX_FLASH_BANKS] = {
- {1, 1, 0, 0},
- {1, 1, 0, 0},
- {0, 0, 1, 1},
- {0, 0, 1, 1}
- };
- return same_chip[bank1][bank2];
-}
-
-
-/*-----------------------------------------------------------------------
- */
-int flash_erase (flash_info_t * info, int s_first, int s_last)
-{
- int flag, prot, sect;
- ulong type, start, last;
- int rcode = 0, intel = 0;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN)
- printf ("- missing\n");
- else
- printf ("- no sectors to erase\n");
- return 1;
- }
-
- type = (info->flash_id & FLASH_VENDMASK);
- if ((type != FLASH_MAN_INTEL)) {
- type = (info->flash_id & FLASH_VENDMASK);
- if ((type != FLASH_MAN_AMD)) {
- printf ("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- return 1;
- }
- }
-
- if (type == FLASH_MAN_INTEL)
- intel = 1;
-
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n", prot);
- } else {
- printf ("\n");
- }
-
- start = get_timer (0);
- last = start;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- FPWV *addr = (FPWV *) (info->start[sect]);
- FPW status;
-
- printf ("Erasing sector %2d ... ", sect);
-
- /* arm simple, non interrupt dependent timer */
- start = get_timer (0);
-
- if (intel) {
- *addr = (FPW) 0x00500050; /* clear status register */
- *addr = (FPW) 0x00200020; /* erase setup */
- *addr = (FPW) 0x00D000D0; /* erase confirm */
- } else {
- FPWV *base; /* first address in bank */
-
- base = (FPWV *) (CFG_AMD_BASE);
- base[FLASH_CYCLE1] = (FPW) 0x00AA00AA; /* unlock */
- base[FLASH_CYCLE2] = (FPW) 0x00550055; /* unlock */
- base[FLASH_CYCLE1] = (FPW) 0x00800080; /* erase mode */
- base[FLASH_CYCLE1] = (FPW) 0x00AA00AA; /* unlock */
- base[FLASH_CYCLE2] = (FPW) 0x00550055; /* unlock */
- *addr = (FPW) 0x00300030; /* erase sector */
- }
-
- while (((status =
- *addr) & (FPW) 0x00800080) !=
- (FPW) 0x00800080) {
- if (get_timer (start) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- if (intel) {
- *addr = (FPW) 0x00B000B0; /* suspend erase */
- *addr = (FPW) 0x00FF00FF; /* reset to read mode */
- } else
- *addr = (FPW) 0x00F000F0; /* reset to read mode */
-
- rcode = 1;
- break;
- }
- }
-
- if (intel) {
- *addr = (FPW) 0x00500050; /* clear status register cmd. */
- *addr = (FPW) 0x00FF00FF; /* resest to read mode */
- } else
- *addr = (FPW) 0x00F000F0; /* reset to read mode */
-
- printf (" done\n");
- }
- }
- return rcode;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- * 4 - Flash not identified
- */
-
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- if (info->flash_id == FLASH_UNKNOWN) {
- return 4;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD:
- {
- FPW data = 0; /* 16 or 32 bit word, matches flash bus width */
- int bytes; /* number of bytes to program in current word */
- int left; /* number of bytes left to program */
- int i, res;
-
- for (left = cnt, res = 0;
- left > 0 && res == 0;
- addr += sizeof (data), left -=
- sizeof (data) - bytes) {
-
- bytes = addr & (sizeof (data) - 1);
- addr &= ~(sizeof (data) - 1);
-
- /* combine source and destination data so can program
- * an entire word of 16 or 32 bits
- */
- for (i = 0; i < sizeof (data); i++) {
- data <<= 8;
- if (i < bytes || i - bytes >= left)
- data += *((uchar *) addr + i);
- else
- data += *src++;
- }
-
- res = write_word_amd (info, (FPWV *) addr,
- data);
- }
- return res;
- } /* case FLASH_MAN_AMD */
-
- case FLASH_MAN_INTEL:
- {
- ulong cp, wp;
- FPW data;
- int count, i, l, rc, port_width;
-
- /* get lower word aligned address */
- wp = addr;
- port_width = 1;
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i = 0, cp = wp; i < l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
-
- for (; i < port_width && cnt > 0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
-
- for (; cnt == 0 && i < port_width; ++i, ++cp)
- data = (data << 8) | (*(uchar *) cp);
-
- if ((rc =
- write_data (info, wp, SWAP (data))) != 0)
- return (rc);
- wp += port_width;
- }
-
- if (cnt > WR_BLOCK) {
- /*
- * handle word aligned part
- */
- count = 0;
- while (cnt >= WR_BLOCK) {
-
- if ((rc =
- write_data_block (info,
- (ulong) src,
- wp)) != 0)
- return (rc);
-
- wp += WR_BLOCK;
- src += WR_BLOCK;
- cnt -= WR_BLOCK;
-
- if (count++ > 0x800) {
- spin_wheel ();
- count = 0;
- }
- }
- }
-
- if (cnt < WR_BLOCK) {
- /*
- * handle word aligned part
- */
- count = 0;
- while (cnt >= port_width) {
- data = 0;
- for (i = 0; i < port_width; ++i)
- data = (data << 8) | *src++;
-
- if ((rc =
- write_data (info, wp,
- SWAP (data))) != 0)
- return (rc);
-
- wp += port_width;
- cnt -= port_width;
- if (count++ > 0x800) {
- spin_wheel ();
- count = 0;
- }
- }
- }
-
- if (cnt == 0)
- return (0);
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i = 0, cp = wp; i < port_width && cnt > 0;
- ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
-
- for (; i < port_width; ++i, ++cp)
- data = (data << 8) | (*(uchar *) cp);
-
- return (write_data (info, wp, SWAP (data)));
- } /* case FLASH_MAN_INTEL */
-
- } /* switch */
- return (0);
-}
-
-/*-----------------------------------------------------------------------
- * Write a word or halfword to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_data (flash_info_t * info, ulong dest, FPW data)
-{
- FPWV *addr = (FPWV *) dest;
- ulong start;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*addr & data) != data) {
- printf ("not erased at %08lx (%lx)\n", (ulong) addr, *addr);
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
-
- *addr = (FPW) 0x00400040; /* write setup */
- *addr = data;
-
- /* arm simple, non interrupt dependent timer */
- start = get_timer (0);
-
- /* wait while polling the status register */
- while ((*addr & (FPW) 0x00800080) != (FPW) 0x00800080) {
- if (get_timer (start) > CFG_FLASH_WRITE_TOUT) {
- *addr = (FPW) 0x00FF00FF; /* restore read mode */
- return (1);
- }
- }
-
- *addr = (FPW) 0x00FF00FF; /* restore read mode */
-
- return (0);
-}
-
-/*-----------------------------------------------------------------------
- * Write a word or halfword to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_data_block (flash_info_t * info, ulong src, ulong dest)
-{
- FPWV *srcaddr = (FPWV *) src;
- FPWV *dstaddr = (FPWV *) dest;
- ulong start;
- int flag, i;
-
- /* Check if Flash is (sufficiently) erased */
- for (i = 0; i < WR_BLOCK; i++)
- if ((*dstaddr++ & 0xff) != 0xff) {
- printf ("not erased at %08lx (%lx)\n",
- (ulong) dstaddr, *dstaddr);
- return (2);
- }
-
- dstaddr = (FPWV *) dest;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
-
- *dstaddr = (FPW) 0x00e800e8; /* write block setup */
-
- /* arm simple, non interrupt dependent timer */
- start = get_timer (0);
-
- /* wait while polling the status register */
- while ((*dstaddr & (FPW) 0x00800080) != (FPW) 0x00800080) {
- if (get_timer (start) > CFG_FLASH_WRITE_TOUT) {
- *dstaddr = (FPW) 0x00FF00FF; /* restore read mode */
- return (1);
- }
- }
-
- *dstaddr = (FPW) 0x001f001f; /* write 32 to buffer */
- for (i = 0; i < WR_BLOCK; i++)
- *dstaddr++ = *srcaddr++;
-
- dstaddr -= 1;
- *dstaddr = (FPW) 0x00d000d0; /* write 32 to buffer */
-
- /* arm simple, non interrupt dependent timer */
- start = get_timer (0);
-
- /* wait while polling the status register */
- while ((*dstaddr & (FPW) 0x00800080) != (FPW) 0x00800080) {
- if (get_timer (start) > CFG_FLASH_WRITE_TOUT) {
- *dstaddr = (FPW) 0x00FF00FF; /* restore read mode */
- return (1);
- }
- }
-
- *dstaddr = (FPW) 0x00FF00FF; /* restore read mode */
-
- return (0);
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash for AMD FLASH
- * A word is 16 or 32 bits, whichever the bus width of the flash bank
- * (not an individual chip) is.
- *
- * returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word_amd (flash_info_t * info, FPWV * dest, FPW data)
-{
- ulong start;
- int flag;
- int res = 0; /* result, assume success */
- FPWV *base; /* first address in flash bank */
-
- /* Check if Flash is (sufficiently) erased */
- if ((*dest & data) != data) {
- return (2);
- }
-
- base = (FPWV *) (CFG_AMD_BASE);
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
-
- base[FLASH_CYCLE1] = (FPW) 0x00AA00AA; /* unlock */
- base[FLASH_CYCLE2] = (FPW) 0x00550055; /* unlock */
- base[FLASH_CYCLE1] = (FPW) 0x00A000A0; /* selects program mode */
-
- *dest = data; /* start programming the data */
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts ();
-
- start = get_timer (0);
-
- /* data polling for D7 */
- while (res == 0
- && (*dest & (FPW) 0x00800080) != (data & (FPW) 0x00800080)) {
- if (get_timer (start) > CFG_FLASH_WRITE_TOUT) {
- *dest = (FPW) 0x00F000F0; /* reset bank */
- res = 1;
- }
- }
-
- return (res);
-}
-
-void inline spin_wheel (void)
-{
- static int p = 0;
- static char w[] = "\\/-";
-
- printf ("\010%c", w[p]);
- (++p == 3) ? (p = 0) : 0;
-}
-
-/*-----------------------------------------------------------------------
- * Set/Clear sector's lock bit, returns:
- * 0 - OK
- * 1 - Error (timeout, voltage problems, etc.)
- */
-int flash_real_protect (flash_info_t * info, long sector, int prot)
-{
- ulong start;
- int i, j;
- int curr_bank;
- int bank;
- int rc = 0;
- FPWV *addr = (FPWV *) (info->start[sector]);
- int flag = disable_interrupts ();
-
- /*
- * 29F040B AMD flash does not support software protection/unprotection,
- * the only way to protect the AMD flash is marked it as prot bit.
- * This flash only support hardware protection, by supply or not supply
- * 12vpp to the flash
- */
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD) {
- info->protect[sector] = prot;
-
- return 0;
- }
-
- *addr = INTEL_CLEAR; /* Clear status register */
- if (prot) { /* Set sector lock bit */
- *addr = INTEL_LOCKBIT; /* Sector lock bit */
- *addr = INTEL_PROTECT; /* set */
- } else { /* Clear sector lock bit */
- *addr = INTEL_LOCKBIT; /* All sectors lock bits */
- *addr = INTEL_CONFIRM; /* clear */
- }
-
- start = get_timer (0);
-
- while ((*addr & INTEL_FINISHED) != INTEL_FINISHED) {
- if (get_timer (start) > CFG_FLASH_UNLOCK_TOUT) {
- printf ("Flash lock bit operation timed out\n");
- rc = 1;
- break;
- }
- }
-
- if (*addr != INTEL_OK) {
- printf ("Flash lock bit operation failed at %08X, CSR=%08X\n",
- (uint) addr, (uint) * addr);
- rc = 1;
- }
-
- if (!rc)
- info->protect[sector] = prot;
-
- /*
- * Clear lock bit command clears all sectors lock bits, so
- * we have to restore lock bits of protected sectors.
- */
- if (!prot) {
- /*
- * re-locking must be done for all banks that belong on one
- * FLASH chip, as all the sectors on the chip were unlocked
- * by INTEL_LOCKBIT/INTEL_CONFIRM commands. (let's hope
- * that banks never span chips, in particular chips which
- * support h/w protection differently).
- */
-
- /* find the current bank number */
- curr_bank = CFG_MAX_FLASH_BANKS + 1;
- for (j = 0; j < CFG_MAX_FLASH_BANKS; ++j) {
- if (&flash_info[j] == info) {
- curr_bank = j;
- }
- }
- if (curr_bank == CFG_MAX_FLASH_BANKS + 1) {
- printf("Error: can't determine bank number!\n");
- }
-
- for (bank = 0; bank < CFG_MAX_FLASH_BANKS; ++bank) {
- if (!same_chip_banks(curr_bank, bank)) {
- continue;
- }
- info = &flash_info[bank];
- for (i = 0; i < info->sector_count; i++) {
- if (info->protect[i]) {
- start = get_timer (0);
- addr = (FPWV *) (info->start[i]);
- *addr = INTEL_LOCKBIT; /* Sector lock bit */
- *addr = INTEL_PROTECT; /* set */
- while ((*addr & INTEL_FINISHED) !=
- INTEL_FINISHED) {
- if (get_timer (start) >
- CFG_FLASH_UNLOCK_TOUT) {
- printf ("Flash lock bit operation timed out\n");
- rc = 1;
- break;
- }
- }
- }
- }
- }
-
- /*
- * get the s/w sector protection status in sync with the h/w,
- * in case something went wrong during the re-locking.
- */
- flash_sync_real_protect(info); /* resets flash to read mode */
- }
-
- if (flag)
- enable_interrupts ();
-
- *addr = INTEL_RESET; /* Reset to read array mode */
-
- return rc;
-}
diff --git a/board/alaska/u-boot.lds b/board/alaska/u-boot.lds
deleted file mode 100644
index 889bc77d2f..0000000000
--- a/board/alaska/u-boot.lds
+++ /dev/null
@@ -1,125 +0,0 @@
-/*
- * (C) Copyright 2003-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc8220/start.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/altera/common/flash.c b/board/altera/common/flash.c
deleted file mode 100644
index 2638ea899a..0000000000
--- a/board/altera/common/flash.c
+++ /dev/null
@@ -1,196 +0,0 @@
-/*
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-
-#include <common.h>
-#include <nios.h>
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
-
-/*--------------------------------------------------------------------*/
-void flash_print_info (flash_info_t * info)
-{
- int i, k;
- unsigned long size;
- int erased;
- volatile unsigned char *flash;
-
- printf (" Size: %ld KB in %d Sectors\n",
- info->size >> 10, info->sector_count);
- printf (" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; ++i) {
-
- /* Check if whole sector is erased */
- if (i != (info->sector_count - 1))
- size = info->start[i + 1] - info->start[i];
- else
- size = info->start[0] + info->size - info->start[i];
- erased = 1;
- flash = (volatile unsigned char *) info->start[i];
- for (k = 0; k < size; k++) {
- if (*flash++ != 0xff) {
- erased = 0;
- break;
- }
- }
-
- /* Print the info */
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s%s", info->start[i], erased ? " E" : " ",
- info->protect[i] ? "RO " : " ");
- }
- printf ("\n");
-}
-
-/*-------------------------------------------------------------------*/
-
-
-int flash_erase (flash_info_t * info, int s_first, int s_last)
-{
- volatile CFG_FLASH_WORD_SIZE *addr = (CFG_FLASH_WORD_SIZE *) (info->start[0]);
- volatile CFG_FLASH_WORD_SIZE *addr2;
- int prot, sect;
- unsigned oldpri;
- ulong start;
-
- /* Some sanity checking */
- if ((s_first < 0) || (s_first > s_last)) {
- printf ("- no sectors to erase\n");
- return 1;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
-#ifdef DEBUG
- for (sect = s_first; sect <= s_last; sect++) {
- printf("- Erase: Sect: %i @ 0x%08x\n", sect, info->start[sect]);
- }
-#endif
-
- /* NOTE: disabling interrupts on Nios can be very bad since it
- * also disables the LO_LIMIT exception. It's better here to
- * set the interrupt priority to 3 & restore it when we're done.
- */
- oldpri = ipri (3);
-
- /* It's ok to erase multiple sectors provided we don't delay more
- * than 50 usec between cmds ... at which point the erase time-out
- * occurs. So don't go and put printf() calls in the loop ... it
- * won't be very helpful ;-)
- */
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr2 = (CFG_FLASH_WORD_SIZE *) (info->start[sect]);
- *addr = 0xaa;
- *addr = 0x55;
- *addr = 0x80;
- *addr = 0xaa;
- *addr = 0x55;
- *addr2 = 0x30;
- /* Now just wait for 0xff & provide some user
- * feedback while we wait. Here we have to grant
- * timer interrupts. Otherwise get_timer() can't
- * work right. */
- ipri(oldpri);
- start = get_timer (0);
- while (*addr2 != 0xff) {
- udelay (1000 * 1000);
- putc ('.');
- if (get_timer (start) > CFG_FLASH_ERASE_TOUT) {
- printf ("timeout\n");
- return 1;
- }
- }
- oldpri = ipri (3); /* disallow non important irqs again */
- }
- }
-
- printf ("\n");
-
- /* Restore interrupt priority */
- ipri (oldpri);
-
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
-
- vu_char *cmd = (vu_char *) info->start[0];
- vu_char *dst = (vu_char *) addr;
- unsigned char b;
- unsigned oldpri;
- ulong start;
-
- while (cnt) {
- /* Check for sufficient erase */
- b = *src;
- if ((*dst & b) != b) {
- printf ("%02x : %02x\n", *dst, b);
- return (2);
- }
-
- /* Disable interrupts other than window underflow
- * (interrupt priority 2)
- */
- oldpri = ipri (3);
- *cmd = 0xaa;
- *cmd = 0x55;
- *cmd = 0xa0;
- *dst = b;
-
- /* Verify write */
- start = get_timer (0);
- while (*dst != b) {
- if (get_timer (start) > CFG_FLASH_WRITE_TOUT) {
- ipri (oldpri);
- return 1;
- }
- }
- dst++;
- src++;
- cnt--;
- ipri (oldpri);
- }
-
- return (0);
-}
diff --git a/board/altera/common/sevenseg.c b/board/altera/common/sevenseg.c
deleted file mode 100644
index c53cec16e6..0000000000
--- a/board/altera/common/sevenseg.c
+++ /dev/null
@@ -1,220 +0,0 @@
-/*
- * (C) Copyright 2003, Li-Pro.Net <www.li-pro.net>
- * Stephan Linz <linz@li-pro.net>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- * common/sevenseg.c
- *
- * NIOS PIO based seven segment led support functions
- */
-
-#include <common.h>
-#include <nios-io.h>
-
-#ifdef CONFIG_SEVENSEG
-
-#define SEVENDEG_MASK_DP ((SEVENSEG_DIGIT_DP << 8) | SEVENSEG_DIGIT_DP)
-
-#ifdef SEVENSEG_WRONLY /* emulate read access */
-#if (SEVENSEG_ACTIVE == 0)
-static unsigned int sevenseg_portval = ~0;
-#else
-static unsigned int sevenseg_portval = 0;
-#endif
-#endif
-
-static int sevenseg_init_done = 0;
-
-static inline void __sevenseg_set_masked (unsigned int mask, int value)
-{
- nios_pio_t *piop __attribute__((unused)) = (nios_pio_t*)SEVENSEG_BASE;
-
-#ifdef SEVENSEG_WRONLY /* emulate read access */
-
-#if (SEVENSEG_ACTIVE == 0)
- if (value)
- sevenseg_portval &= ~mask;
- else
- sevenseg_portval |= mask;
-#else
- if (value)
- sevenseg_portval |= mask;
- else
- sevenseg_portval &= ~mask;
-#endif
-
- piop->data = sevenseg_portval;
-
-#else /* !SEVENSEG_WRONLY */
-
-#if (SEVENSEG_ACTIVE == 0)
- if (value)
- piop->data &= ~mask;
- else
- piop->data |= mask;
-#else
- if (value)
- piop->data |= mask;
- else
- piop->data &= ~mask;
-#endif
-
-#endif /* SEVENSEG_WRONLY */
-}
-
-static inline void __sevenseg_toggle_masked (unsigned int mask)
-{
- nios_pio_t *piop = (nios_pio_t*)SEVENSEG_BASE;
-
-#ifdef SEVENSEG_WRONLY /* emulate read access */
-
- sevenseg_portval ^= mask;
- piop->data = sevenseg_portval;
-
-#else /* !SEVENSEG_WRONLY */
-
- piop->data ^= mask;
-
-#endif /* SEVENSEG_WRONLY */
-}
-
-static inline void __sevenseg_set (unsigned int value)
-{
- nios_pio_t *piop __attribute__((unused)) = (nios_pio_t*)SEVENSEG_BASE;
-
-#ifdef SEVENSEG_WRONLY /* emulate read access */
-
-#if (SEVENSEG_ACTIVE == 0)
- sevenseg_portval = (sevenseg_portval & SEVENDEG_MASK_DP)
- | ((~value) & (~SEVENDEG_MASK_DP));
-#else
- sevenseg_portval = (sevenseg_portval & SEVENDEG_MASK_DP)
- | (value);
-#endif
-
- piop->data = sevenseg_portval;
-
-#else /* !SEVENSEG_WRONLY */
-
-#if (SEVENSEG_ACTIVE == 0)
- piop->data = (piop->data & SEVENDEG_MASK_DP)
- | ((~value) & (~SEVENDEG_MASK_DP));
-#else
- piop->data = (piop->data & SEVENDEG_MASK_DP)
- | (value);
-#endif
-
-#endif /* SEVENSEG_WRONLY */
-}
-
-static inline void __sevenseg_init (void)
-{
- nios_pio_t *piop __attribute__((unused)) = (nios_pio_t*)SEVENSEG_BASE;
-
- __sevenseg_set(0);
-
-#ifndef SEVENSEG_WRONLY /* setup direction */
-
- piop->direction |= mask;
-
-#endif /* SEVENSEG_WRONLY */
-}
-
-
-void sevenseg_set(int value)
-{
- unsigned char digits[] = {
- SEVENSEG_DIGITS_0,
- SEVENSEG_DIGITS_1,
- SEVENSEG_DIGITS_2,
- SEVENSEG_DIGITS_3,
- SEVENSEG_DIGITS_4,
- SEVENSEG_DIGITS_5,
- SEVENSEG_DIGITS_6,
- SEVENSEG_DIGITS_7,
- SEVENSEG_DIGITS_8,
- SEVENSEG_DIGITS_9,
- SEVENSEG_DIGITS_A,
- SEVENSEG_DIGITS_B,
- SEVENSEG_DIGITS_C,
- SEVENSEG_DIGITS_D,
- SEVENSEG_DIGITS_E,
- SEVENSEG_DIGITS_F
- };
-
- if (!sevenseg_init_done) {
- __sevenseg_init();
- sevenseg_init_done++;
- }
-
- switch (value & SEVENSEG_MASK_CTRL) {
-
- case SEVENSEG_RAW:
- __sevenseg_set( (
- (digits[((value & SEVENSEG_MASK_VAL) >> 4)] << 8) |
- digits[((value & SEVENSEG_MASK_VAL) & 0xf)] ) );
- return;
- break; /* paranoia */
-
- case SEVENSEG_OFF:
- __sevenseg_set(0);
- __sevenseg_set_masked(SEVENDEG_MASK_DP, 0);
- return;
- break; /* paranoia */
-
- case SEVENSEG_SET_DPL:
- __sevenseg_set_masked(SEVENSEG_DIGIT_DP, 1);
- return;
- break; /* paranoia */
-
- case SEVENSEG_SET_DPH:
- __sevenseg_set_masked((SEVENSEG_DIGIT_DP << 8), 1);
- return;
- break; /* paranoia */
-
- case SEVENSEG_RES_DPL:
- __sevenseg_set_masked(SEVENSEG_DIGIT_DP, 0);
- return;
- break; /* paranoia */
-
- case SEVENSEG_RES_DPH:
- __sevenseg_set_masked((SEVENSEG_DIGIT_DP << 8), 0);
- return;
- break; /* paranoia */
-
- case SEVENSEG_TOG_DPL:
- __sevenseg_toggle_masked(SEVENSEG_DIGIT_DP);
- return;
- break; /* paranoia */
-
- case SEVENSEG_TOG_DPH:
- __sevenseg_toggle_masked((SEVENSEG_DIGIT_DP << 8));
- return;
- break; /* paranoia */
-
- case SEVENSEG_LO:
- case SEVENSEG_HI:
- case SEVENSEG_STR:
- default:
- break;
- }
-}
-
-#endif /* CONFIG_SEVENSEG */
diff --git a/board/altera/common/sevenseg.h b/board/altera/common/sevenseg.h
deleted file mode 100644
index cbfd2e74a2..0000000000
--- a/board/altera/common/sevenseg.h
+++ /dev/null
@@ -1,142 +0,0 @@
-/*
- * (C) Copyright 2003, Li-Pro.Net <www.li-pro.net>
- * Stephan Linz <linz@li-pro.net>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- * common/sevenseg.h
- *
- * NIOS PIO based seven segment led support functions
- */
-
-#ifndef __DK1S10_SEVENSEG_H__
-#define __DK1S10_SEVENSEG_H__
-
-#ifdef CONFIG_SEVENSEG
-
-/*
- * 15 8 7 0
- * |-----------------------|--------|
- * | controll value | value |
- * ----------------------------------
- */
-#define SEVENSEG_RAW (int)(0) /* write out byte value (hex) */
-#define SEVENSEG_OFF (int)( 1 << 8) /* display switch off */
-#define SEVENSEG_SET_DPL (int)( 2 << 8) /* set dp low nibble */
-#define SEVENSEG_SET_DPH (int)( 3 << 8) /* set dp high nibble */
-#define SEVENSEG_RES_DPL (int)( 4 << 8) /* reset dp low nibble */
-#define SEVENSEG_RES_DPH (int)( 5 << 8) /* reset dp high nibble */
-#define SEVENSEG_TOG_DPL (int)( 6 << 8) /* toggle dp low nibble */
-#define SEVENSEG_TOG_DPH (int)( 7 << 8) /* toggle dp high nibble */
-#define SEVENSEG_LO (int)( 8 << 8) /* write out low nibble only */
-#define SEVENSEG_HI (int)( 9 << 8) /* write out high nibble only */
-#define SEVENSEG_STR (int)(10 << 8) /* write out a string */
-
-#define SEVENSEG_MASK_VAL (0xff) /* only used by SEVENSEG_RAW */
-#define SEVENSEG_MASK_CTRL (~SEVENSEG_MASK_VAL)
-
-#ifdef SEVENSEG_DIGIT_HI_LO_EQUAL
-
-#define SEVENSEG_DIGITS_0 ( SEVENSEG_DIGIT_A \
- | SEVENSEG_DIGIT_B \
- | SEVENSEG_DIGIT_C \
- | SEVENSEG_DIGIT_D \
- | SEVENSEG_DIGIT_E \
- | SEVENSEG_DIGIT_F )
-#define SEVENSEG_DIGITS_1 ( SEVENSEG_DIGIT_B \
- | SEVENSEG_DIGIT_C )
-#define SEVENSEG_DIGITS_2 ( SEVENSEG_DIGIT_A \
- | SEVENSEG_DIGIT_B \
- | SEVENSEG_DIGIT_D \
- | SEVENSEG_DIGIT_E \
- | SEVENSEG_DIGIT_G )
-#define SEVENSEG_DIGITS_3 ( SEVENSEG_DIGIT_A \
- | SEVENSEG_DIGIT_B \
- | SEVENSEG_DIGIT_C \
- | SEVENSEG_DIGIT_D \
- | SEVENSEG_DIGIT_G )
-#define SEVENSEG_DIGITS_4 ( SEVENSEG_DIGIT_B \
- | SEVENSEG_DIGIT_C \
- | SEVENSEG_DIGIT_F \
- | SEVENSEG_DIGIT_G )
-#define SEVENSEG_DIGITS_5 ( SEVENSEG_DIGIT_A \
- | SEVENSEG_DIGIT_C \
- | SEVENSEG_DIGIT_D \
- | SEVENSEG_DIGIT_F \
- | SEVENSEG_DIGIT_G )
-#define SEVENSEG_DIGITS_6 ( SEVENSEG_DIGIT_A \
- | SEVENSEG_DIGIT_C \
- | SEVENSEG_DIGIT_D \
- | SEVENSEG_DIGIT_E \
- | SEVENSEG_DIGIT_F \
- | SEVENSEG_DIGIT_G )
-#define SEVENSEG_DIGITS_7 ( SEVENSEG_DIGIT_A \
- | SEVENSEG_DIGIT_B \
- | SEVENSEG_DIGIT_C )
-#define SEVENSEG_DIGITS_8 ( SEVENSEG_DIGIT_A \
- | SEVENSEG_DIGIT_B \
- | SEVENSEG_DIGIT_C \
- | SEVENSEG_DIGIT_D \
- | SEVENSEG_DIGIT_E \
- | SEVENSEG_DIGIT_F \
- | SEVENSEG_DIGIT_G )
-#define SEVENSEG_DIGITS_9 ( SEVENSEG_DIGIT_A \
- | SEVENSEG_DIGIT_B \
- | SEVENSEG_DIGIT_C \
- | SEVENSEG_DIGIT_D \
- | SEVENSEG_DIGIT_F \
- | SEVENSEG_DIGIT_G )
-#define SEVENSEG_DIGITS_A ( SEVENSEG_DIGIT_A \
- | SEVENSEG_DIGIT_B \
- | SEVENSEG_DIGIT_C \
- | SEVENSEG_DIGIT_E \
- | SEVENSEG_DIGIT_F \
- | SEVENSEG_DIGIT_G )
-#define SEVENSEG_DIGITS_B ( SEVENSEG_DIGIT_C \
- | SEVENSEG_DIGIT_D \
- | SEVENSEG_DIGIT_E \
- | SEVENSEG_DIGIT_F \
- | SEVENSEG_DIGIT_G )
-#define SEVENSEG_DIGITS_C ( SEVENSEG_DIGIT_D \
- | SEVENSEG_DIGIT_E \
- | SEVENSEG_DIGIT_G )
-#define SEVENSEG_DIGITS_D ( SEVENSEG_DIGIT_B \
- | SEVENSEG_DIGIT_C \
- | SEVENSEG_DIGIT_D \
- | SEVENSEG_DIGIT_E \
- | SEVENSEG_DIGIT_G )
-#define SEVENSEG_DIGITS_E ( SEVENSEG_DIGIT_A \
- | SEVENSEG_DIGIT_D \
- | SEVENSEG_DIGIT_E \
- | SEVENSEG_DIGIT_F \
- | SEVENSEG_DIGIT_G )
-#define SEVENSEG_DIGITS_F ( SEVENSEG_DIGIT_A \
- | SEVENSEG_DIGIT_E \
- | SEVENSEG_DIGIT_F \
- | SEVENSEG_DIGIT_G )
-
-#else /* !SEVENSEG_DIGIT_HI_LO_EQUAL */
-#error SEVENSEG: different pin asssignments not supported
-#endif
-
-void sevenseg_set(int value);
-
-#endif /* CONFIG_SEVENSEG */
-
-#endif /* __DK1S10_SEVENSEG_H__ */
diff --git a/board/altera/dk1c20/Makefile b/board/altera/dk1c20/Makefile
deleted file mode 100644
index 9182a4ecfe..0000000000
--- a/board/altera/dk1c20/Makefile
+++ /dev/null
@@ -1,48 +0,0 @@
-#
-# (C) Copyright 2001-2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := $(BOARD).o flash.o misc.o
-
-SOBJS = vectors.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $^
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/altera/dk1c20/config.mk b/board/altera/dk1c20/config.mk
deleted file mode 100644
index d200715f5f..0000000000
--- a/board/altera/dk1c20/config.mk
+++ /dev/null
@@ -1,29 +0,0 @@
-#
-# (C) Copyright 2003
-# Psyent Corporation
-# Scott McNutt <smcnutt@psyent.com>
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-TEXT_BASE = 0x018c0000
-
-ifeq ($(debug),1)
-PLATFORM_CPPFLAGS += -DDEBUG
-endif
diff --git a/board/altera/dk1c20/dk1c20.c b/board/altera/dk1c20/dk1c20.c
deleted file mode 100644
index 98ee7a71c9..0000000000
--- a/board/altera/dk1c20/dk1c20.c
+++ /dev/null
@@ -1,81 +0,0 @@
-/*
- * (C) Copyright 2003, Psyent Corporation <www.psyent.com>
- * Scott McNutt <smcnutt@psyent.com>
- *
- * CompactFlash/IDE:
- * (C) Copyright 2004, Shlomo Kut <skut@vyyo.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <nios-io.h>
-#if defined(CONFIG_SEVENSEG)
-#include "../common/sevenseg.h"
-#endif
-
-void _default_hdlr (void)
-{
- printf ("default_hdlr\n");
-}
-
-int board_early_init_f (void)
-{
-#if defined(CONFIG_SEVENSEG)
- /* init seven segment led display and switch off */
- sevenseg_set(SEVENSEG_OFF);
-#endif
- return 0;
-}
-
-int checkboard (void)
-{
- puts ("Board: Altera Nios 1C20 Development Kit\n");
- return 0;
-}
-
-long int initdram (int board_type)
-{
- return (0);
-}
-
-#if (CONFIG_COMMANDS & CFG_CMD_IDE)
-int ide_preinit (void)
-{
- nios_pio_t *present = (nios_pio_t *) CFG_CF_PRESENT;
- nios_pio_t *power = (nios_pio_t *) CFG_CF_POWER;
- nios_pio_t *atasel = (nios_pio_t *) CFG_CF_ATASEL;
-
- /* setup data direction registers */
- present->direction = NIOS_PIO_IN;
- power->direction = NIOS_PIO_OUT;
- atasel->direction = NIOS_PIO_OUT;
-
- /* Check for presence of card */
- if (present->data)
- return 1;
- printf ("Ok\n");
-
- /* Finish setup */
- power->data = 1; /* Turn on power FET */
- atasel->data = 0; /* Put in ATA mode */
-
- return 0;
-}
-#endif /* CONFIG_COMMANDS & CFG_CMD_IDE */
diff --git a/board/altera/dk1c20/flash.c b/board/altera/dk1c20/flash.c
deleted file mode 100644
index 1f344dd337..0000000000
--- a/board/altera/dk1c20/flash.c
+++ /dev/null
@@ -1,62 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-
-#include <common.h>
-#include <nios.h>
-
-/*
- * include common flash code (for altera boards)
- */
-#include "../common/flash.c"
-
-/*----------------------------------------------------------------------*/
-#define BANKSZ CFG_FLASH_SIZE
-#define SECTSZ (64 * 1024)
-#define USERFLASH (2 * 1024 * 1024) /* bottom 2 MB for user */
-
-/*----------------------------------------------------------------------*/
-unsigned long flash_init (void)
-{
- int i;
- unsigned long addr;
- flash_info_t *fli = &flash_info[0];
-
- fli->size = BANKSZ;
- fli->sector_count = CFG_MAX_FLASH_SECT;
- fli->flash_id = FLASH_MAN_AMD + FLASH_AMDLV065D;
-
- addr = CFG_FLASH_BASE;
- for (i = 0; i < fli->sector_count; ++i) {
- fli->start[i] = addr;
- addr += SECTSZ;
-
- /* Protect all but 2 MByte user area */
- if (addr < (CFG_FLASH_BASE + USERFLASH))
- fli->protect[i] = 0;
- else
- fli->protect[i] = 1;
- }
-
- return (BANKSZ);
-}
diff --git a/board/altera/dk1c20/misc.c b/board/altera/dk1c20/misc.c
deleted file mode 100644
index f25cdebd74..0000000000
--- a/board/altera/dk1c20/misc.c
+++ /dev/null
@@ -1,33 +0,0 @@
-/*
- * (C) Copyright 2003, Li-Pro.Net <www.li-pro.net>
- * Stephan Linz <linz@li-pro.net>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- * board/altera/dk1s10/misc.c
- *
- * miscellaneous board interfaces / drivers
- */
-
-#include <common.h>
-
-#if defined(CONFIG_SEVENSEG)
-#include "../common/sevenseg.h"
-#include "../common/sevenseg.c"
-#endif
diff --git a/board/altera/dk1c20/u-boot.lds b/board/altera/dk1c20/u-boot.lds
deleted file mode 100644
index 8b01f45e55..0000000000
--- a/board/altera/dk1c20/u-boot.lds
+++ /dev/null
@@ -1,70 +0,0 @@
-/*
- * (C) Copyright 2003, Psyent Corporation <www.psyent.com>
- * Scott McNutt <smcnutt@psyent.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-
-OUTPUT_FORMAT("elf32-nios")
-OUTPUT_ARCH(nios)
-ENTRY(_start)
-
-SECTIONS
-{
- .text :
- {
- cpu/nios/start.o (.text)
- *(.text)
- }
- __text_end = .;
-
- . = ALIGN(4);
- .rodata :
- {
- *(.rodata)
- }
- __rodata_end = .;
-
- . = ALIGN(4);
- .data :
- {
- *(.data)
- }
- . = ALIGN(4);
- __data_end = .;
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd :
- {
- *(.u_boot_cmd)
- }
- . = ALIGN(4);
- __u_boot_cmd_end = .;
-
- __bss_start = .;
- . = ALIGN(4);
- .bss :
- {
- *(.bss)
- }
- . = ALIGN(4);
- __bss_end = .;
-}
diff --git a/board/altera/dk1c20/vectors.S b/board/altera/dk1c20/vectors.S
deleted file mode 100644
index c83c0e70e1..0000000000
--- a/board/altera/dk1c20/vectors.S
+++ /dev/null
@@ -1,123 +0,0 @@
-/*
- * (C) Copyright 2003, Psyent Corporation <www.psyent.com>
- * Scott McNutt <smcnutt@psyent.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-
-/*************************************************************************
- * Exception Vector Table
- *
- * This could have gone in the cpu soure tree, but the whole point of
- * Nios is customization -- and polluting the cpu source tree with
- * board-specific ifdef's really defeats the purpose, no? With this in
- * the board-specific tree, each board has the freedom to organize
- * vectors/traps, etc anyway it wants. The init code copies this table
- * to the proper location.
- *
- * Each board can do what it likes here. But there are four "standard"
- * handlers availble:
- *
- * _cwp_lolimit -Handles register window underflows.
- * _cwp_hilimit -Handles register window overflows.
- * _timebase_int -Increments the timebase.
- * _brkpt_hw_int -Hardware breakpoint handler.
- * _brkpt_sw_int -Software breakpoint handler.
- * _def_xhandler -Default exception handler.
- *
- * _timebase_int handles a Nios Timer interrupt and increments the
- * timestamp used for the get_timer(), reset_timer(), etc. routines. It
- * expects the timer to be configured like the standard-32 low priority
- * timer.
- *
- * _def_xhandler dispatches exceptions/traps via the external_interrupt()
- * routine. This lets you use the irq_install_handler() and handle your
- * interrupts/traps with code written in C.
- ************************************************************************/
-
- .data
- .global _vectors
- .align 4
-_vectors:
-
- .long _def_xhandler@h /* Vector 0 - NMI */
- .long _cwp_lolimit@h /* Vector 1 - underflow */
- .long _cwp_hilimit@h /* Vector 2 - overflow */
- .long _brkpt_hw_int@h /* Vector 3 - Breakpoint */
- .long _brkpt_sw_int@h /* Vector 4 - Single step*/
- .long _def_xhandler@h /* Vector 5 - GNUPro debug */
- .long _def_xhandler@h /* Vector 6 - future reserved */
- .long _def_xhandler@h /* Vector 7 - future reserved */
- .long _def_xhandler@h /* Vector 8 - future reserved */
- .long _def_xhandler@h /* Vector 9 - future reserved */
- .long _def_xhandler@h /* Vector 10 - future reserved */
- .long _def_xhandler@h /* Vector 11 - future reserved */
- .long _def_xhandler@h /* Vector 12 - future reserved */
- .long _def_xhandler@h /* Vector 13 - future reserved */
- .long _def_xhandler@h /* Vector 14 - future reserved */
- .long _def_xhandler@h /* Vector 15 - future reserved */
- .long _def_xhandler@h /* Vector 16 */
- .long _def_xhandler@h /* Vector 17 */
- .long _def_xhandler@h /* Vector 18 */
- .long _def_xhandler@h /* Vector 19 */
- .long _def_xhandler@h /* Vector 20 */
- .long _def_xhandler@h /* Vector 21 */
- .long _def_xhandler@h /* Vector 22 */
- .long _def_xhandler@h /* Vector 23 */
- .long _def_xhandler@h /* Vector 24 */
- .long _def_xhandler@h /* Vector 25 */
- .long _def_xhandler@h /* Vector 26 */
- .long _def_xhandler@h /* Vector 27 */
- .long _def_xhandler@h /* Vector 28 */
- .long _def_xhandler@h /* Vector 29 */
- .long _def_xhandler@h /* Vector 30 */
- .long _def_xhandler@h /* Vector 31 */
- .long _def_xhandler@h /* Vector 32 */
- .long _def_xhandler@h /* Vector 33 */
- .long _def_xhandler@h /* Vector 34 */
- .long _def_xhandler@h /* Vector 35 */
- .long _def_xhandler@h /* Vector 36 */
- .long _def_xhandler@h /* Vector 37 */
- .long _def_xhandler@h /* Vector 38 */
- .long _def_xhandler@h /* Vector 39 */
- .long _def_xhandler@h /* Vector 40 */
- .long _def_xhandler@h /* Vector 41 */
- .long _def_xhandler@h /* Vector 42 */
- .long _def_xhandler@h /* Vector 43 */
- .long _def_xhandler@h /* Vector 44 */
- .long _def_xhandler@h /* Vector 45 */
- .long _def_xhandler@h /* Vector 46 */
- .long _def_xhandler@h /* Vector 47 */
- .long _def_xhandler@h /* Vector 48 */
- .long _def_xhandler@h /* Vector 49 */
- .long _timebase_int@h /* Vector 50 - lopri timer*/
- .long _def_xhandler@h /* Vector 51 */
- .long _def_xhandler@h /* Vector 52 */
- .long _def_xhandler@h /* Vector 53 */
- .long _def_xhandler@h /* Vector 54 */
- .long _def_xhandler@h /* Vector 55 */
- .long _def_xhandler@h /* Vector 56 */
- .long _def_xhandler@h /* Vector 57 */
- .long _def_xhandler@h /* Vector 58 */
- .long _def_xhandler@h /* Vector 59 */
- .long _def_xhandler@h /* Vector 60 */
- .long _def_xhandler@h /* Vector 61 */
- .long _def_xhandler@h /* Vector 62 */
- .long _def_xhandler@h /* Vector 63 */
diff --git a/board/altera/dk1s10/Makefile b/board/altera/dk1s10/Makefile
deleted file mode 100644
index 9182a4ecfe..0000000000
--- a/board/altera/dk1s10/Makefile
+++ /dev/null
@@ -1,48 +0,0 @@
-#
-# (C) Copyright 2001-2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := $(BOARD).o flash.o misc.o
-
-SOBJS = vectors.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $^
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/altera/dk1s10/config.mk b/board/altera/dk1s10/config.mk
deleted file mode 100644
index d200715f5f..0000000000
--- a/board/altera/dk1s10/config.mk
+++ /dev/null
@@ -1,29 +0,0 @@
-#
-# (C) Copyright 2003
-# Psyent Corporation
-# Scott McNutt <smcnutt@psyent.com>
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-TEXT_BASE = 0x018c0000
-
-ifeq ($(debug),1)
-PLATFORM_CPPFLAGS += -DDEBUG
-endif
diff --git a/board/altera/dk1s10/dk1s10.c b/board/altera/dk1s10/dk1s10.c
deleted file mode 100644
index c45e7f15d7..0000000000
--- a/board/altera/dk1s10/dk1s10.c
+++ /dev/null
@@ -1,60 +0,0 @@
-/*
- * (C) Copyright 2003, Psyent Corporation <www.psyent.com>
- * Scott McNutt <smcnutt@psyent.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#if defined(CONFIG_SEVENSEG)
-#include "../common/sevenseg.h"
-#endif
-
-void _default_hdlr (void)
-{
- printf ("default_hdlr\n");
-}
-
-int board_early_init_f (void)
-{
-#if defined(CONFIG_SEVENSEG)
- /* init seven segment led display and switch off */
- sevenseg_set(SEVENSEG_OFF);
-#endif
- return 0;
-}
-
-int checkboard (void)
-{
- puts ("Board: Altera Nios 1S10 Development Kit\n");
-#if defined(CONFIG_NIOS_SAFE_32)
- puts ("Conf.: Altera Safe 32 (safe_32)\n");
-#elif defined(CONFIG_NIOS_STANDARD_32)
- puts ("Conf.: Altera Standard 32 (standard_32)\n");
-#elif defined(CONFIG_NIOS_MTX_LDK_20)
- puts ("Conf.: Microtronix LDK 2.0 (LDK2)\n");
-#endif
-
- return 0;
-}
-
-long int initdram (int board_type)
-{
- return (0);
-}
diff --git a/board/altera/dk1s10/flash.c b/board/altera/dk1s10/flash.c
deleted file mode 100644
index 5c7093352e..0000000000
--- a/board/altera/dk1s10/flash.c
+++ /dev/null
@@ -1,62 +0,0 @@
-/*
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-
-#include <common.h>
-#include <nios.h>
-
-/*
- * include common flash code (for altera boards)
- */
-#include "../common/flash.c"
-
-/*---------------------------------------------------------------------*/
-#define BANKSZ (8 * 1024 * 1024)
-#define SECTSZ (64 * 1024)
-#define USERFLASH (2 * 1024 * 1024) /* bottom 2 MB for user */
-
-/*---------------------------------------------------------------------*/
-unsigned long flash_init (void)
-{
- int i;
- unsigned long addr;
- flash_info_t *fli = &flash_info[0];
-
- fli->size = BANKSZ;
- fli->sector_count = CFG_MAX_FLASH_SECT;
- fli->flash_id = FLASH_MAN_AMD + FLASH_AMDLV065D;
-
- addr = CFG_FLASH_BASE;
- for (i = 0; i < fli->sector_count; ++i) {
- fli->start[i] = addr;
- addr += SECTSZ;
-
- /* Protect all but 2 MByte user area */
- if (addr < (CFG_FLASH_BASE + USERFLASH))
- fli->protect[i] = 0;
- else
- fli->protect[i] = 1;
- }
-
- return (BANKSZ);
-}
diff --git a/board/altera/dk1s10/misc.c b/board/altera/dk1s10/misc.c
deleted file mode 100644
index f25cdebd74..0000000000
--- a/board/altera/dk1s10/misc.c
+++ /dev/null
@@ -1,33 +0,0 @@
-/*
- * (C) Copyright 2003, Li-Pro.Net <www.li-pro.net>
- * Stephan Linz <linz@li-pro.net>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- * board/altera/dk1s10/misc.c
- *
- * miscellaneous board interfaces / drivers
- */
-
-#include <common.h>
-
-#if defined(CONFIG_SEVENSEG)
-#include "../common/sevenseg.h"
-#include "../common/sevenseg.c"
-#endif
diff --git a/board/altera/dk1s10/u-boot.lds b/board/altera/dk1s10/u-boot.lds
deleted file mode 100644
index 8b01f45e55..0000000000
--- a/board/altera/dk1s10/u-boot.lds
+++ /dev/null
@@ -1,70 +0,0 @@
-/*
- * (C) Copyright 2003, Psyent Corporation <www.psyent.com>
- * Scott McNutt <smcnutt@psyent.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-
-OUTPUT_FORMAT("elf32-nios")
-OUTPUT_ARCH(nios)
-ENTRY(_start)
-
-SECTIONS
-{
- .text :
- {
- cpu/nios/start.o (.text)
- *(.text)
- }
- __text_end = .;
-
- . = ALIGN(4);
- .rodata :
- {
- *(.rodata)
- }
- __rodata_end = .;
-
- . = ALIGN(4);
- .data :
- {
- *(.data)
- }
- . = ALIGN(4);
- __data_end = .;
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd :
- {
- *(.u_boot_cmd)
- }
- . = ALIGN(4);
- __u_boot_cmd_end = .;
-
- __bss_start = .;
- . = ALIGN(4);
- .bss :
- {
- *(.bss)
- }
- . = ALIGN(4);
- __bss_end = .;
-}
diff --git a/board/altera/dk1s10/vectors.S b/board/altera/dk1s10/vectors.S
deleted file mode 100644
index 2f44875dcc..0000000000
--- a/board/altera/dk1s10/vectors.S
+++ /dev/null
@@ -1,139 +0,0 @@
-/*
- * (C) Copyright 2003, Psyent Corporation <www.psyent.com>
- * Scott McNutt <smcnutt@psyent.com>
- * Stephan Linz <linz@li-pro.net>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <config.h>
-
-
-/*************************************************************************
- * Exception Vector Table
- *
- * This could have gone in the cpu soure tree, but the whole point of
- * Nios is customization -- and polluting the cpu source tree with
- * board-specific ifdef's really defeats the purpose, no? With this in
- * the board-specific tree, each board has the freedom to organize
- * vectors/traps, etc anyway it wants. The init code copies this table
- * to the proper location.
- *
- * Each board can do what it likes here. But there are four "standard"
- * handlers availble:
- *
- * _cwp_lolimit -Handles register window underflows.
- * _cwp_hilimit -Handles register window overflows.
- * _timebase_int -Increments the timebase.
- * _def_xhandler -Default exception handler.
- *
- * _timebase_int handles a Nios Timer interrupt and increments the
- * timestamp used for the get_timer(), reset_timer(), etc. routines. It
- * expects the timer to be configured like the standard-32 low priority
- * timer.
- *
- * _def_xhandler dispatches exceptions/traps via the external_interrupt()
- * routine. This lets you use the irq_install_handler() and handle your
- * interrupts/traps with code written in C.
- ************************************************************************/
-
- .data
- .global _vectors
- .align 4
-_vectors:
-
-#if defined(CFG_NIOS_CPU_OCI_BASE)
- /* OCI does the reset job */
- .long _def_xhandler@h /* Vector 0 - NMI / Reset */
-#else
- /* there is no OCI, so we have to do a direct reset jump here */
- .long CFG_NIOS_CPU_RST_VECT /* Vector 0 - Reset to GERMS */
-#endif
- .long _cwp_lolimit@h /* Vector 1 - underflow */
- .long _cwp_hilimit@h /* Vector 2 - overflow */
-
- .long _def_xhandler@h /* Vector 3 - GNUPro debug */
- .long _def_xhandler@h /* Vector 4 - GNUPro debug */
- .long _def_xhandler@h /* Vector 5 - GNUPro debug */
- .long _def_xhandler@h /* Vector 6 - future reserved */
- .long _def_xhandler@h /* Vector 7 - future reserved */
- .long _def_xhandler@h /* Vector 8 - future reserved */
- .long _def_xhandler@h /* Vector 9 - future reserved */
- .long _def_xhandler@h /* Vector 10 - future reserved */
- .long _def_xhandler@h /* Vector 11 - future reserved */
- .long _def_xhandler@h /* Vector 12 - future reserved */
- .long _def_xhandler@h /* Vector 13 - future reserved */
- .long _def_xhandler@h /* Vector 14 - future reserved */
- .long _def_xhandler@h /* Vector 15 - future reserved */
-#if (CFG_NIOS_TMRIRQ == 16)
- .long _timebase_int@h /* Vector 16 - lopri timer*/
-#else
- .long _def_xhandler@h /* Vector 16 */
-#endif
- .long _def_xhandler@h /* Vector 17 */
- .long _def_xhandler@h /* Vector 18 */
- .long _def_xhandler@h /* Vector 19 */
- .long _def_xhandler@h /* Vector 20 */
- .long _def_xhandler@h /* Vector 21 */
- .long _def_xhandler@h /* Vector 22 */
- .long _def_xhandler@h /* Vector 23 */
- .long _def_xhandler@h /* Vector 24 */
- .long _def_xhandler@h /* Vector 25 */
- .long _def_xhandler@h /* Vector 26 */
- .long _def_xhandler@h /* Vector 27 */
- .long _def_xhandler@h /* Vector 28 */
- .long _def_xhandler@h /* Vector 29 */
- .long _def_xhandler@h /* Vector 30 */
- .long _def_xhandler@h /* Vector 31 */
- .long _def_xhandler@h /* Vector 32 */
- .long _def_xhandler@h /* Vector 33 */
- .long _def_xhandler@h /* Vector 34 */
- .long _def_xhandler@h /* Vector 35 */
- .long _def_xhandler@h /* Vector 36 */
- .long _def_xhandler@h /* Vector 37 */
- .long _def_xhandler@h /* Vector 38 */
- .long _def_xhandler@h /* Vector 39 */
- .long _def_xhandler@h /* Vector 40 */
- .long _def_xhandler@h /* Vector 41 */
- .long _def_xhandler@h /* Vector 42 */
- .long _def_xhandler@h /* Vector 43 */
- .long _def_xhandler@h /* Vector 44 */
- .long _def_xhandler@h /* Vector 45 */
- .long _def_xhandler@h /* Vector 46 */
- .long _def_xhandler@h /* Vector 47 */
- .long _def_xhandler@h /* Vector 48 */
- .long _def_xhandler@h /* Vector 49 */
-#if (CFG_NIOS_TMRIRQ == 50)
- .long _timebase_int@h /* Vector 50 - lopri timer*/
-#else
- .long _def_xhandler@h /* Vector 50 */
-#endif
- .long _def_xhandler@h /* Vector 51 */
- .long _def_xhandler@h /* Vector 52 */
- .long _def_xhandler@h /* Vector 53 */
- .long _def_xhandler@h /* Vector 54 */
- .long _def_xhandler@h /* Vector 55 */
- .long _def_xhandler@h /* Vector 56 */
- .long _def_xhandler@h /* Vector 57 */
- .long _def_xhandler@h /* Vector 58 */
- .long _def_xhandler@h /* Vector 59 */
- .long _def_xhandler@h /* Vector 60 */
- .long _def_xhandler@h /* Vector 61 */
- .long _def_xhandler@h /* Vector 62 */
- .long _def_xhandler@h /* Vector 63 */
diff --git a/board/amcc/bamboo/Makefile b/board/amcc/bamboo/Makefile
deleted file mode 100644
index 5654f91a83..0000000000
--- a/board/amcc/bamboo/Makefile
+++ /dev/null
@@ -1,48 +0,0 @@
-#
-# (C) Copyright 2002
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o
-OBJS += flash.o
-SOBJS = init.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/amcc/bamboo/bamboo.c b/board/amcc/bamboo/bamboo.c
deleted file mode 100644
index 803995ae5d..0000000000
--- a/board/amcc/bamboo/bamboo.c
+++ /dev/null
@@ -1,2089 +0,0 @@
-/*
- * (C) Copyright 2005
- * Stefan Roese, DENX Software Engineering, sr@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/processor.h>
-#include <spd_sdram.h>
-#include <ppc440.h>
-#include "bamboo.h"
-
-void ext_bus_cntlr_init(void);
-void configure_ppc440ep_pins(void);
-int is_nand_selected(void);
-
-unsigned char cfg_simulate_spd_eeprom[128];
-
-gpio_param_s gpio_tab[GPIO_GROUP_MAX][GPIO_MAX];
-#if 0
-{ /* GPIO Alternate1 Alternate2 Alternate3 */
- {
- /* GPIO Core 0 */
- { GPIO0_BASE, GPIO_DIS, GPIO_SEL }, /* GPIO0_0 -> EBC_ADDR(7) DMA_REQ(2) */
- { GPIO0_BASE, GPIO_DIS, GPIO_SEL }, /* GPIO0_1 -> EBC_ADDR(6) DMA_ACK(2) */
- { GPIO0_BASE, GPIO_DIS, GPIO_SEL }, /* GPIO0_2 -> EBC_ADDR(5) DMA_EOT/TC(2) */
- { GPIO0_BASE, GPIO_DIS, GPIO_SEL }, /* GPIO0_3 -> EBC_ADDR(4) DMA_REQ(3) */
- { GPIO0_BASE, GPIO_DIS, GPIO_SEL }, /* GPIO0_4 -> EBC_ADDR(3) DMA_ACK(3) */
- { GPIO0_BASE, GPIO_DIS, GPIO_SEL }, /* GPIO0_5 ................. */
- { GPIO0_BASE, GPIO_DIS, GPIO_SEL }, /* GPIO0_6 -> EBC_CS_N(1) */
- { GPIO0_BASE, GPIO_DIS, GPIO_SEL }, /* GPIO0_7 -> EBC_CS_N(2) */
- { GPIO0_BASE, GPIO_DIS, GPIO_SEL }, /* GPIO0_8 -> EBC_CS_N(3) */
- { GPIO0_BASE, GPIO_DIS, GPIO_ALT1 }, /* GPIO0_9 -> EBC_CS_N(4) */
- { GPIO0_BASE, GPIO_OUT, GPIO_ALT1 }, /* GPIO0_10 -> EBC_CS_N(5) */
- { GPIO0_BASE, GPIO_DIS, GPIO_SEL }, /* GPIO0_11 -> EBC_BUS_ERR */
- { GPIO0_BASE, GPIO_DIS, GPIO_SEL }, /* GPIO0_12 -> ZII_p0Rxd(0) */
- { GPIO0_BASE, GPIO_DIS, GPIO_SEL }, /* GPIO0_13 -> ZII_p0Rxd(1) */
- { GPIO0_BASE, GPIO_DIS, GPIO_SEL }, /* GPIO0_14 -> ZII_p0Rxd(2) */
- { GPIO0_BASE, GPIO_DIS, GPIO_SEL }, /* GPIO0_15 -> ZII_p0Rxd(3) */
- { GPIO0_BASE, GPIO_DIS, GPIO_SEL }, /* GPIO0_16 -> ZII_p0Txd(0) */
- { GPIO0_BASE, GPIO_DIS, GPIO_SEL }, /* GPIO0_17 -> ZII_p0Txd(1) */
- { GPIO0_BASE, GPIO_DIS, GPIO_SEL }, /* GPIO0_18 -> ZII_p0Txd(2) */
- { GPIO0_BASE, GPIO_DIS, GPIO_SEL }, /* GPIO0_19 -> ZII_p0Txd(3) */
- { GPIO0_BASE, GPIO_DIS, GPIO_SEL }, /* GPIO0_20 -> ZII_p0Rx_er */
- { GPIO0_BASE, GPIO_DIS, GPIO_SEL }, /* GPIO0_21 -> ZII_p0Rx_dv */
- { GPIO0_BASE, GPIO_DIS, GPIO_SEL }, /* GPIO0_22 -> ZII_p0RxCrs */
- { GPIO0_BASE, GPIO_DIS, GPIO_SEL }, /* GPIO0_23 -> ZII_p0Tx_er */
- { GPIO0_BASE, GPIO_DIS, GPIO_SEL }, /* GPIO0_24 -> ZII_p0Tx_en */
- { GPIO0_BASE, GPIO_DIS, GPIO_SEL }, /* GPIO0_25 -> ZII_p0Col */
- { GPIO0_BASE, GPIO_DIS, GPIO_SEL }, /* GPIO0_26 -> USB2D_RXVALID */
- { GPIO0_BASE, GPIO_DIS, GPIO_SEL }, /* GPIO0_27 -> EXT_EBC_REQ USB2D_RXERROR */
- { GPIO0_BASE, GPIO_DIS, GPIO_SEL }, /* GPIO0_28 -> USB2D_TXVALID */
- { GPIO0_BASE, GPIO_DIS, GPIO_SEL }, /* GPIO0_29 -> EBC_EXT_HDLA USB2D_PAD_SUSPNDM */
- { GPIO0_BASE, GPIO_DIS, GPIO_SEL }, /* GPIO0_30 -> EBC_EXT_ACK USB2D_XCVRSELECT */
- { GPIO0_BASE, GPIO_DIS, GPIO_SEL }, /* GPIO0_31 -> EBC_EXR_BUSREQ USB2D_TERMSELECT */
- },
- {
- /* GPIO Core 1 */
- { GPIO1_BASE, GPIO_DIS, GPIO_SEL }, /* GPIO1_0 -> USB2D_OPMODE0 */
- { GPIO1_BASE, GPIO_DIS, GPIO_SEL }, /* GPIO1_1 -> USB2D_OPMODE1 */
- { GPIO1_BASE, GPIO_DIS, GPIO_SEL }, /* GPIO1_2 -> UART0_DCD_N UART1_DSR_CTS_N UART2_SOUT */
- { GPIO1_BASE, GPIO_DIS, GPIO_SEL }, /* GPIO1_3 -> UART0_8PIN_DSR_N UART1_RTS_DTR_N UART2_SIN */
- { GPIO1_BASE, GPIO_DIS, GPIO_SEL }, /* GPIO1_4 -> UART0_8PIN_CTS_N UART3_SIN */
- { GPIO1_BASE, GPIO_DIS, GPIO_SEL }, /* GPIO1_5 -> UART0_RTS_N */
- { GPIO1_BASE, GPIO_DIS, GPIO_SEL }, /* GPIO1_6 -> UART0_DTR_N UART1_SOUT */
- { GPIO1_BASE, GPIO_DIS, GPIO_SEL }, /* GPIO1_7 -> UART0_RI_N UART1_SIN */
- { GPIO1_BASE, GPIO_DIS, GPIO_SEL }, /* GPIO1_8 -> UIC_IRQ(0) */
- { GPIO1_BASE, GPIO_DIS, GPIO_SEL }, /* GPIO1_9 -> UIC_IRQ(1) */
- { GPIO1_BASE, GPIO_DIS, GPIO_SEL }, /* GPIO1_10 -> UIC_IRQ(2) */
- { GPIO1_BASE, GPIO_DIS, GPIO_SEL }, /* GPIO1_11 -> UIC_IRQ(3) */
- { GPIO1_BASE, GPIO_DIS, GPIO_SEL }, /* GPIO1_12 -> UIC_IRQ(4) DMA_ACK(1) */
- { GPIO1_BASE, GPIO_DIS, GPIO_SEL }, /* GPIO1_13 -> UIC_IRQ(6) DMA_EOT/TC(1) */
- { GPIO1_BASE, GPIO_DIS, GPIO_SEL }, /* GPIO1_14 -> UIC_IRQ(7) DMA_REQ(0) */
- { GPIO1_BASE, GPIO_DIS, GPIO_SEL }, /* GPIO1_15 -> UIC_IRQ(8) DMA_ACK(0) */
- { GPIO1_BASE, GPIO_DIS, GPIO_SEL }, /* GPIO1_16 -> UIC_IRQ(9) DMA_EOT/TC(0) */
- { GPIO1_BASE, GPIO_DIS, GPIO_SEL }, /* GPIO1_17 -> - */
- { GPIO1_BASE, GPIO_DIS, GPIO_SEL }, /* GPIO1_18 -> | */
- { GPIO1_BASE, GPIO_DIS, GPIO_SEL }, /* GPIO1_19 -> | */
- { GPIO1_BASE, GPIO_DIS, GPIO_SEL }, /* GPIO1_20 -> | */
- { GPIO1_BASE, GPIO_DIS, GPIO_SEL }, /* GPIO1_21 -> | */
- { GPIO1_BASE, GPIO_DIS, GPIO_SEL }, /* GPIO1_22 -> | */
- { GPIO1_BASE, GPIO_DIS, GPIO_SEL }, /* GPIO1_23 -> \ Can be unselected thru TraceSelect Bit */
- { GPIO1_BASE, GPIO_DIS, GPIO_SEL }, /* GPIO1_24 -> / in PowerPC440EP Chip */
- { GPIO1_BASE, GPIO_DIS, GPIO_SEL }, /* GPIO1_25 -> | */
- { GPIO1_BASE, GPIO_DIS, GPIO_SEL }, /* GPIO1_26 -> | */
- { GPIO1_BASE, GPIO_DIS, GPIO_SEL }, /* GPIO1_27 -> | */
- { GPIO1_BASE, GPIO_DIS, GPIO_SEL }, /* GPIO1_28 -> | */
- { GPIO1_BASE, GPIO_DIS, GPIO_SEL }, /* GPIO1_29 -> | */
- { GPIO1_BASE, GPIO_DIS, GPIO_SEL }, /* GPIO1_30 -> | */
- { GPIO1_BASE, GPIO_DIS, GPIO_SEL }, /* GPIO1_31 -> - */
- }
-};
-#endif
-
-/*----------------------------------------------------------------------------+
- | EBC Devices Characteristics
- | Peripheral Bank Access Parameters - EBC0_BnAP
- | Peripheral Bank Configuration Register - EBC0_BnCR
- +----------------------------------------------------------------------------*/
-/* Small Flash */
-#define EBC0_BNAP_SMALL_FLASH \
- EBC0_BNAP_BME_DISABLED | \
- EBC0_BNAP_TWT_ENCODE(6) | \
- EBC0_BNAP_CSN_ENCODE(0) | \
- EBC0_BNAP_OEN_ENCODE(1) | \
- EBC0_BNAP_WBN_ENCODE(1) | \
- EBC0_BNAP_WBF_ENCODE(3) | \
- EBC0_BNAP_TH_ENCODE(1) | \
- EBC0_BNAP_RE_ENABLED | \
- EBC0_BNAP_SOR_DELAYED | \
- EBC0_BNAP_BEM_WRITEONLY | \
- EBC0_BNAP_PEN_DISABLED
-
-#define EBC0_BNCR_SMALL_FLASH_CS0 \
- EBC0_BNCR_BAS_ENCODE(0xFFF00000) | \
- EBC0_BNCR_BS_1MB | \
- EBC0_BNCR_BU_RW | \
- EBC0_BNCR_BW_8BIT
-
-#define EBC0_BNCR_SMALL_FLASH_CS4 \
- EBC0_BNCR_BAS_ENCODE(0x87F00000) | \
- EBC0_BNCR_BS_1MB | \
- EBC0_BNCR_BU_RW | \
- EBC0_BNCR_BW_8BIT
-
-/* Large Flash or SRAM */
-#define EBC0_BNAP_LARGE_FLASH_OR_SRAM \
- EBC0_BNAP_BME_DISABLED | \
- EBC0_BNAP_TWT_ENCODE(8) | \
- EBC0_BNAP_CSN_ENCODE(0) | \
- EBC0_BNAP_OEN_ENCODE(1) | \
- EBC0_BNAP_WBN_ENCODE(1) | \
- EBC0_BNAP_WBF_ENCODE(1) | \
- EBC0_BNAP_TH_ENCODE(2) | \
- EBC0_BNAP_SOR_DELAYED | \
- EBC0_BNAP_BEM_RW | \
- EBC0_BNAP_PEN_DISABLED
-
-#define EBC0_BNCR_LARGE_FLASH_OR_SRAM_CS0 \
- EBC0_BNCR_BAS_ENCODE(0xFF800000) | \
- EBC0_BNCR_BS_8MB | \
- EBC0_BNCR_BU_RW | \
- EBC0_BNCR_BW_16BIT
-
-
-#define EBC0_BNCR_LARGE_FLASH_OR_SRAM_CS4 \
- EBC0_BNCR_BAS_ENCODE(0x87800000) | \
- EBC0_BNCR_BS_8MB | \
- EBC0_BNCR_BU_RW | \
- EBC0_BNCR_BW_16BIT
-
-/* NVRAM - FPGA */
-#define EBC0_BNAP_NVRAM_FPGA \
- EBC0_BNAP_BME_DISABLED | \
- EBC0_BNAP_TWT_ENCODE(9) | \
- EBC0_BNAP_CSN_ENCODE(0) | \
- EBC0_BNAP_OEN_ENCODE(1) | \
- EBC0_BNAP_WBN_ENCODE(1) | \
- EBC0_BNAP_WBF_ENCODE(0) | \
- EBC0_BNAP_TH_ENCODE(2) | \
- EBC0_BNAP_RE_ENABLED | \
- EBC0_BNAP_SOR_DELAYED | \
- EBC0_BNAP_BEM_WRITEONLY | \
- EBC0_BNAP_PEN_DISABLED
-
-#define EBC0_BNCR_NVRAM_FPGA_CS5 \
- EBC0_BNCR_BAS_ENCODE(0x80000000) | \
- EBC0_BNCR_BS_1MB | \
- EBC0_BNCR_BU_RW | \
- EBC0_BNCR_BW_8BIT
-
-/* Nand Flash */
-#define EBC0_BNAP_NAND_FLASH \
- EBC0_BNAP_BME_DISABLED | \
- EBC0_BNAP_TWT_ENCODE(3) | \
- EBC0_BNAP_CSN_ENCODE(0) | \
- EBC0_BNAP_OEN_ENCODE(0) | \
- EBC0_BNAP_WBN_ENCODE(0) | \
- EBC0_BNAP_WBF_ENCODE(0) | \
- EBC0_BNAP_TH_ENCODE(1) | \
- EBC0_BNAP_RE_ENABLED | \
- EBC0_BNAP_SOR_NOT_DELAYED | \
- EBC0_BNAP_BEM_RW | \
- EBC0_BNAP_PEN_DISABLED
-
-
-#define EBC0_BNCR_NAND_FLASH_CS0 0xB8400000
-
-/* NAND0 */
-#define EBC0_BNCR_NAND_FLASH_CS1 \
- EBC0_BNCR_BAS_ENCODE(0x90000000) | \
- EBC0_BNCR_BS_1MB | \
- EBC0_BNCR_BU_RW | \
- EBC0_BNCR_BW_32BIT
-/* NAND1 - Bank2 */
-#define EBC0_BNCR_NAND_FLASH_CS2 \
- EBC0_BNCR_BAS_ENCODE(0x94000000) | \
- EBC0_BNCR_BS_1MB | \
- EBC0_BNCR_BU_RW | \
- EBC0_BNCR_BW_32BIT
-
-/* NAND1 - Bank3 */
-#define EBC0_BNCR_NAND_FLASH_CS3 \
- EBC0_BNCR_BAS_ENCODE(0x94000000) | \
- EBC0_BNCR_BS_1MB | \
- EBC0_BNCR_BU_RW | \
- EBC0_BNCR_BW_32BIT
-
-int board_early_init_f(void)
-{
- ext_bus_cntlr_init();
-
- /*--------------------------------------------------------------------
- * Setup the interrupt controller polarities, triggers, etc.
- *-------------------------------------------------------------------*/
- mtdcr(uic0sr, 0xffffffff); /* clear all */
- mtdcr(uic0er, 0x00000000); /* disable all */
- mtdcr(uic0cr, 0x00000009); /* ATI & UIC1 crit are critical */
- mtdcr(uic0pr, 0xfffffe13); /* per ref-board manual */
- mtdcr(uic0tr, 0x01c00008); /* per ref-board manual */
- mtdcr(uic0vr, 0x00000001); /* int31 highest, base=0x000 */
- mtdcr(uic0sr, 0xffffffff); /* clear all */
-
- mtdcr(uic1sr, 0xffffffff); /* clear all */
- mtdcr(uic1er, 0x00000000); /* disable all */
- mtdcr(uic1cr, 0x00000000); /* all non-critical */
- mtdcr(uic1pr, 0xffffe0ff); /* per ref-board manual */
- mtdcr(uic1tr, 0x00ffc000); /* per ref-board manual */
- mtdcr(uic1vr, 0x00000001); /* int31 highest, base=0x000 */
- mtdcr(uic1sr, 0xffffffff); /* clear all */
-
- /*--------------------------------------------------------------------
- * Setup the GPIO pins
- *-------------------------------------------------------------------*/
- out32(GPIO0_OSRL, 0x00000400);
- out32(GPIO0_OSRH, 0x00000000);
- out32(GPIO0_TSRL, 0x00000400);
- out32(GPIO0_TSRH, 0x00000000);
- out32(GPIO0_ISR1L, 0x00000000);
- out32(GPIO0_ISR1H, 0x00000000);
- out32(GPIO0_ISR2L, 0x00000000);
- out32(GPIO0_ISR2H, 0x00000000);
- out32(GPIO0_ISR3L, 0x00000000);
- out32(GPIO0_ISR3H, 0x00000000);
-
- out32(GPIO1_OSRL, 0x0C380000);
- out32(GPIO1_OSRH, 0x00000000);
- out32(GPIO1_TSRL, 0x0C380000);
- out32(GPIO1_TSRH, 0x00000000);
- out32(GPIO1_ISR1L, 0x0FC30000);
- out32(GPIO1_ISR1H, 0x00000000);
- out32(GPIO1_ISR2L, 0x0C010000);
- out32(GPIO1_ISR2H, 0x00000000);
- out32(GPIO1_ISR3L, 0x01400000);
- out32(GPIO1_ISR3H, 0x00000000);
-
- configure_ppc440ep_pins();
-
- return 0;
-}
-
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
-#include <linux/mtd/nand.h>
-extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
-
-/*----------------------------------------------------------------------------+
- | nand_reset.
- | Reset Nand flash
- | This routine will abort previous cmd
- +----------------------------------------------------------------------------*/
-int nand_reset(ulong addr)
-{
- int wait=0, stat=0;
-
- out8(addr + NAND_CMD_REG, NAND0_CMD_RESET);
- out8(addr + NAND_CMD_REG, NAND0_CMD_READ_STATUS);
-
- while ((stat != 0xc0) && (wait != 0xffff)) {
- stat = in8(addr + NAND_DATA_REG);
- wait++;
- }
-
- if (stat == 0xc0) {
- return 0;
- } else {
- printf("NAND Reset timeout.\n");
- return -1;
- }
-}
-
-void board_nand_set_device(int cs, ulong addr)
-{
- /* Set NandFlash Core Configuration Register */
- out32(addr + NAND_CCR_REG, 0x00001000 | (cs << 24));
-
- switch (cs) {
- case 1:
- /* -------
- * NAND0
- * -------
- * K9F1208U0A : 4 addr cyc, 1 col + 3 Row
- * Set NDF1CR - Enable External CS1 in NAND FLASH controller
- */
- out32(addr + NAND_CR1_REG, 0x80002222);
- break;
-
- case 2:
- /* -------
- * NAND1
- * -------
- * K9K2G0B : 5 addr cyc, 2 col + 3 Row
- * Set NDF2CR : Enable External CS2 in NAND FLASH controller
- */
- out32(addr + NAND_CR2_REG, 0xC0007777);
- break;
- }
-
- /* Perform Reset Command */
- if (nand_reset(addr) != 0)
- return;
-}
-
-void nand_init(void)
-{
- board_nand_set_device(1, CFG_NAND_ADDR);
-
- nand_probe(CFG_NAND_ADDR);
- if (nand_dev_desc[0].ChipID != NAND_ChipID_UNKNOWN) {
- print_size(nand_dev_desc[0].totlen, "\n");
- }
-
-#if 0 /* NAND1 not supported yet */
- board_nand_set_device(2, CFG_NAND2_ADDR);
-
- nand_probe(CFG_NAND2_ADDR);
- if (nand_dev_desc[0].ChipID != NAND_ChipID_UNKNOWN) {
- print_size(nand_dev_desc[0].totlen, "\n");
- }
-#endif
-}
-#endif /* (CONFIG_COMMANDS & CFG_CMD_NAND) */
-
-int checkboard(void)
-{
- char *s = getenv("serial#");
-
- printf("Board: Bamboo - AMCC PPC440EP Evaluation Board");
- if (s != NULL) {
- puts(", serial# ");
- puts(s);
- }
- putc('\n');
-
- return (0);
-}
-
-/*************************************************************************
- *
- * init_spd_array -- Bamboo has one bank onboard sdram (plus DIMM)
- *
- * Fixed memory is composed of :
- * MT46V16M16TG-75 from Micron (x 2), 256Mb, 16 M x16, DDR266,
- * 13 row add bits, 10 column add bits (but 12 row used only).
- * ECC device: MT46V16M8TG-75 from Micron (x 1), 128Mb, x8, DDR266,
- * 12 row add bits, 10 column add bits.
- * Prepare a subset (only the used ones) of SPD data
- *
- * Note : if the ECC is enabled (SDRAM_ECC_ENABLE) the size of
- * the corresponding bank is divided by 2 due to number of Row addresses
- * 12 in the ECC module
- *
- * Assumes: 64 MB, ECC, non-registered
- * PLB @ 133 MHz
- *
- ************************************************************************/
-static void init_spd_array(void)
-{
- cfg_simulate_spd_eeprom[8] = 0x04; /* 2.5 Volt */
- cfg_simulate_spd_eeprom[2] = 0x07; /* DDR ram */
-
-#ifdef CONFIG_DDR_ECC
- cfg_simulate_spd_eeprom[11] = 0x02; /* ECC ON : 02 OFF : 00 */
- cfg_simulate_spd_eeprom[31] = 0x08; /* bankSizeID: 32MB */
- cfg_simulate_spd_eeprom[3] = 0x0C; /* num Row Addr: 12 */
-#else
- cfg_simulate_spd_eeprom[11] = 0x00; /* ECC ON : 02 OFF : 00 */
- cfg_simulate_spd_eeprom[31] = 0x10; /* bankSizeID: 64MB */
- cfg_simulate_spd_eeprom[3] = 0x0D; /* num Row Addr: 13 */
-#endif
-
- cfg_simulate_spd_eeprom[4] = 0x09; /* numColAddr: 9 */
- cfg_simulate_spd_eeprom[5] = 0x01; /* numBanks: 1 */
- cfg_simulate_spd_eeprom[0] = 0x80; /* number of SPD bytes used: 128 */
- cfg_simulate_spd_eeprom[1] = 0x08; /* total number bytes in SPD device = 256 */
- cfg_simulate_spd_eeprom[21] = 0x00; /* not registered: 0 registered : 0x02*/
- cfg_simulate_spd_eeprom[6] = 0x20; /* Module data width: 32 bits */
- cfg_simulate_spd_eeprom[7] = 0x00; /* Module data width continued: +0 */
- cfg_simulate_spd_eeprom[15] = 0x01; /* wcsbc = 1 */
- cfg_simulate_spd_eeprom[27] = 0x50; /* tRpNs = 20 ns */
- cfg_simulate_spd_eeprom[29] = 0x50; /* tRcdNs = 20 ns */
-
- cfg_simulate_spd_eeprom[30] = 45; /* tRasNs */
-
- cfg_simulate_spd_eeprom[18] = 0x0C; /* casBit (2,2.5) */
-
- cfg_simulate_spd_eeprom[9] = 0x75; /* SDRAM Cycle Time (cas latency 2.5) = 7.5 ns */
- cfg_simulate_spd_eeprom[23] = 0xA0; /* SDRAM Cycle Time (cas latency 2) = 10 ns */
- cfg_simulate_spd_eeprom[25] = 0x00; /* SDRAM Cycle Time (cas latency 1.5) = N.A */
- cfg_simulate_spd_eeprom[12] = 0x82; /* refresh Rate Type: Normal (15.625us) + Self refresh */
-}
-
-long int initdram (int board_type)
-{
- long dram_size = 0;
-
- /*
- * First write simulated values in eeprom array for onboard bank 0
- */
- init_spd_array();
-
- dram_size = spd_sdram (0);
-
- return dram_size;
-}
-
-#if defined(CFG_DRAM_TEST)
-int testdram(void)
-{
- unsigned long *mem = (unsigned long *)0;
- const unsigned long kend = (1024 / sizeof(unsigned long));
- unsigned long k, n;
-
- mtmsr(0);
-
- for (k = 0; k < CFG_KBYTES_SDRAM;
- ++k, mem += (1024 / sizeof(unsigned long))) {
- if ((k & 1023) == 0) {
- printf("%3d MB\r", k / 1024);
- }
-
- memset(mem, 0xaaaaaaaa, 1024);
- for (n = 0; n < kend; ++n) {
- if (mem[n] != 0xaaaaaaaa) {
- printf("SDRAM test fails at: %08x\n",
- (uint) & mem[n]);
- return 1;
- }
- }
-
- memset(mem, 0x55555555, 1024);
- for (n = 0; n < kend; ++n) {
- if (mem[n] != 0x55555555) {
- printf("SDRAM test fails at: %08x\n",
- (uint) & mem[n]);
- return 1;
- }
- }
- }
- printf("SDRAM test passes\n");
- return 0;
-}
-#endif
-
-/*************************************************************************
- * pci_pre_init
- *
- * This routine is called just prior to registering the hose and gives
- * the board the opportunity to check things. Returning a value of zero
- * indicates that things are bad & PCI initialization should be aborted.
- *
- * Different boards may wish to customize the pci controller structure
- * (add regions, override default access routines, etc) or perform
- * certain pre-initialization actions.
- *
- ************************************************************************/
-#if defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT)
-int pci_pre_init(struct pci_controller *hose)
-{
- unsigned long addr;
-
- /*-------------------------------------------------------------------------+
- | Set priority for all PLB3 devices to 0.
- | Set PLB3 arbiter to fair mode.
- +-------------------------------------------------------------------------*/
- mfsdr(sdr_amp1, addr);
- mtsdr(sdr_amp1, (addr & 0x000000FF) | 0x0000FF00);
- addr = mfdcr(plb3_acr);
- mtdcr(plb3_acr, addr | 0x80000000);
-
- /*-------------------------------------------------------------------------+
- | Set priority for all PLB4 devices to 0.
- +-------------------------------------------------------------------------*/
- mfsdr(sdr_amp0, addr);
- mtsdr(sdr_amp0, (addr & 0x000000FF) | 0x0000FF00);
- addr = mfdcr(plb4_acr) | 0xa0000000; /* Was 0x8---- */
- mtdcr(plb4_acr, addr);
-
- /*-------------------------------------------------------------------------+
- | Set Nebula PLB4 arbiter to fair mode.
- +-------------------------------------------------------------------------*/
- /* Segment0 */
- addr = (mfdcr(plb0_acr) & ~plb0_acr_ppm_mask) | plb0_acr_ppm_fair;
- addr = (addr & ~plb0_acr_hbu_mask) | plb0_acr_hbu_enabled;
- addr = (addr & ~plb0_acr_rdp_mask) | plb0_acr_rdp_4deep;
- addr = (addr & ~plb0_acr_wrp_mask) | plb0_acr_wrp_2deep;
- mtdcr(plb0_acr, addr);
-
- /* Segment1 */
- addr = (mfdcr(plb1_acr) & ~plb1_acr_ppm_mask) | plb1_acr_ppm_fair;
- addr = (addr & ~plb1_acr_hbu_mask) | plb1_acr_hbu_enabled;
- addr = (addr & ~plb1_acr_rdp_mask) | plb1_acr_rdp_4deep;
- addr = (addr & ~plb1_acr_wrp_mask) | plb1_acr_wrp_2deep;
- mtdcr(plb1_acr, addr);
-
- return 1;
-}
-#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT) */
-
-/*************************************************************************
- * pci_target_init
- *
- * The bootstrap configuration provides default settings for the pci
- * inbound map (PIM). But the bootstrap config choices are limited and
- * may not be sufficient for a given board.
- *
- ************************************************************************/
-#if defined(CONFIG_PCI) && defined(CFG_PCI_TARGET_INIT)
-void pci_target_init(struct pci_controller *hose)
-{
- /*--------------------------------------------------------------------------+
- * Set up Direct MMIO registers
- *--------------------------------------------------------------------------*/
- /*--------------------------------------------------------------------------+
- | PowerPC440 EP PCI Master configuration.
- | Map one 1Gig range of PLB/processor addresses to PCI memory space.
- | PLB address 0xA0000000-0xDFFFFFFF ==> PCI address 0xA0000000-0xDFFFFFFF
- | Use byte reversed out routines to handle endianess.
- | Make this region non-prefetchable.
- +--------------------------------------------------------------------------*/
- out32r(PCIX0_PMM0MA, 0x00000000); /* PMM0 Mask/Attribute - disabled b4 setting */
- out32r(PCIX0_PMM0LA, CFG_PCI_MEMBASE); /* PMM0 Local Address */
- out32r(PCIX0_PMM0PCILA, CFG_PCI_MEMBASE); /* PMM0 PCI Low Address */
- out32r(PCIX0_PMM0PCIHA, 0x00000000); /* PMM0 PCI High Address */
- out32r(PCIX0_PMM0MA, 0xE0000001); /* 512M + No prefetching, and enable region */
-
- out32r(PCIX0_PMM1MA, 0x00000000); /* PMM0 Mask/Attribute - disabled b4 setting */
- out32r(PCIX0_PMM1LA, CFG_PCI_MEMBASE2); /* PMM0 Local Address */
- out32r(PCIX0_PMM1PCILA, CFG_PCI_MEMBASE2); /* PMM0 PCI Low Address */
- out32r(PCIX0_PMM1PCIHA, 0x00000000); /* PMM0 PCI High Address */
- out32r(PCIX0_PMM1MA, 0xE0000001); /* 512M + No prefetching, and enable region */
-
- out32r(PCIX0_PTM1MS, 0x00000001); /* Memory Size/Attribute */
- out32r(PCIX0_PTM1LA, 0); /* Local Addr. Reg */
- out32r(PCIX0_PTM2MS, 0); /* Memory Size/Attribute */
- out32r(PCIX0_PTM2LA, 0); /* Local Addr. Reg */
-
- /*--------------------------------------------------------------------------+
- * Set up Configuration registers
- *--------------------------------------------------------------------------*/
-
- /* Program the board's subsystem id/vendor id */
- pci_write_config_word(0, PCI_SUBSYSTEM_VENDOR_ID,
- CFG_PCI_SUBSYS_VENDORID);
- pci_write_config_word(0, PCI_SUBSYSTEM_ID, CFG_PCI_SUBSYS_ID);
-
- /* Configure command register as bus master */
- pci_write_config_word(0, PCI_COMMAND, PCI_COMMAND_MASTER);
-
- /* 240nS PCI clock */
- pci_write_config_word(0, PCI_LATENCY_TIMER, 1);
-
- /* No error reporting */
- pci_write_config_word(0, PCI_ERREN, 0);
-
- pci_write_config_dword(0, PCI_BRDGOPT2, 0x00000101);
-
-}
-#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_TARGET_INIT) */
-
-/*************************************************************************
- * pci_master_init
- *
- ************************************************************************/
-#if defined(CONFIG_PCI) && defined(CFG_PCI_MASTER_INIT)
-void pci_master_init(struct pci_controller *hose)
-{
- unsigned short temp_short;
-
- /*--------------------------------------------------------------------------+
- | Write the PowerPC440 EP PCI Configuration regs.
- | Enable PowerPC440 EP to be a master on the PCI bus (PMM).
- | Enable PowerPC440 EP to act as a PCI memory target (PTM).
- +--------------------------------------------------------------------------*/
- pci_read_config_word(0, PCI_COMMAND, &temp_short);
- pci_write_config_word(0, PCI_COMMAND,
- temp_short | PCI_COMMAND_MASTER |
- PCI_COMMAND_MEMORY);
-}
-#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_MASTER_INIT) */
-
-/*************************************************************************
- * is_pci_host
- *
- * This routine is called to determine if a pci scan should be
- * performed. With various hardware environments (especially cPCI and
- * PPMC) it's insufficient to depend on the state of the arbiter enable
- * bit in the strap register, or generic host/adapter assumptions.
- *
- * Rather than hard-code a bad assumption in the general 440 code, the
- * 440 pci code requires the board to decide at runtime.
- *
- * Return 0 for adapter mode, non-zero for host (monarch) mode.
- *
- *
- ************************************************************************/
-#if defined(CONFIG_PCI)
-int is_pci_host(struct pci_controller *hose)
-{
- /* Bamboo is always configured as host. */
- return (1);
-}
-#endif /* defined(CONFIG_PCI) */
-
-/*----------------------------------------------------------------------------+
- | is_powerpc440ep_pass1.
- +----------------------------------------------------------------------------*/
-int is_powerpc440ep_pass1(void)
-{
- unsigned long pvr;
-
- pvr = get_pvr();
-
- if (pvr == PVR_POWERPC_440EP_PASS1)
- return TRUE;
- else if (pvr == PVR_POWERPC_440EP_PASS2)
- return FALSE;
- else {
- printf("brdutil error 3\n");
- for (;;)
- ;
- }
-
- return(FALSE);
-}
-
-/*----------------------------------------------------------------------------+
- | is_nand_selected.
- +----------------------------------------------------------------------------*/
-int is_nand_selected(void)
-{
-#ifdef CONFIG_BAMBOO_NAND
- return TRUE;
-#else
- return FALSE;
-#endif
-}
-
-/*----------------------------------------------------------------------------+
- | config_on_ebc_cs4_is_small_flash => from EPLD
- +----------------------------------------------------------------------------*/
-unsigned char config_on_ebc_cs4_is_small_flash(void)
-{
- /* Not implemented yet => returns constant value */
- return TRUE;
-}
-
-/*----------------------------------------------------------------------------+
- | Ext_bus_cntlr_init.
- | Initialize the external bus controller
- +----------------------------------------------------------------------------*/
-void ext_bus_cntlr_init(void)
-{
- unsigned long sdr0_pstrp0, sdr0_sdstp1;
- unsigned long bootstrap_settings, boot_selection, ebc_boot_size;
- int computed_boot_device = BOOT_DEVICE_UNKNOWN;
- unsigned long ebc0_cs0_bnap_value = 0, ebc0_cs0_bncr_value = 0;
- unsigned long ebc0_cs1_bnap_value = 0, ebc0_cs1_bncr_value = 0;
- unsigned long ebc0_cs2_bnap_value = 0, ebc0_cs2_bncr_value = 0;
- unsigned long ebc0_cs3_bnap_value = 0, ebc0_cs3_bncr_value = 0;
- unsigned long ebc0_cs4_bnap_value = 0, ebc0_cs4_bncr_value = 0;
-
-
- /*-------------------------------------------------------------------------+
- |
- | PART 1 : Initialize EBC Bank 5
- | ==============================
- | Bank5 is always associated to the NVRAM/EPLD.
- | It has to be initialized prior to other banks settings computation since
- | some board registers values may be needed
- |
- +-------------------------------------------------------------------------*/
- /* NVRAM - FPGA */
- mtebc(pb5ap, EBC0_BNAP_NVRAM_FPGA);
- mtebc(pb5cr, EBC0_BNCR_NVRAM_FPGA_CS5);
-
- /*-------------------------------------------------------------------------+
- |
- | PART 2 : Determine which boot device was selected
- | =========================================
- |
- | Read Pin Strap Register in PPC440EP
- | In case of boot from IIC, read Serial Device Strap Register1
- |
- | Result can either be :
- | - Boot from EBC 8bits => SMALL FLASH
- | - Boot from EBC 16bits => Large Flash or SRAM
- | - Boot from NAND Flash
- | - Boot from PCI
- |
- +-------------------------------------------------------------------------*/
- /* Read Pin Strap Register in PPC440EP */
- mfsdr(sdr_pstrp0, sdr0_pstrp0);
- bootstrap_settings = sdr0_pstrp0 & SDR0_PSTRP0_BOOTSTRAP_MASK;
-
- /*-------------------------------------------------------------------------+
- | PPC440EP Pass1
- +-------------------------------------------------------------------------*/
- if (is_powerpc440ep_pass1() == TRUE) {
- switch(bootstrap_settings) {
- case SDR0_PSTRP0_BOOTSTRAP_SETTINGS0:
- /* Default Strap Settings 0 : CPU 400 - PLB 133 - Boot EBC 8 bit 33MHz */
- /* Boot from Small Flash */
- computed_boot_device = BOOT_FROM_SMALL_FLASH;
- break;
- case SDR0_PSTRP0_BOOTSTRAP_SETTINGS1:
- /* Default Strap Settings 1 : CPU 533 - PLB 133 - Boot PCI 66MHz */
- /* Boot from PCI */
- computed_boot_device = BOOT_FROM_PCI;
- break;
-
- case SDR0_PSTRP0_BOOTSTRAP_SETTINGS2:
- /* Default Strap Settings 2 : CPU 500 - PLB 100 - Boot NDFC16 66MHz */
- /* Boot from Nand Flash */
- computed_boot_device = BOOT_FROM_NAND_FLASH0;
- break;
-
- case SDR0_PSTRP0_BOOTSTRAP_SETTINGS3:
- /* Default Strap Settings 3 : CPU 333 - PLB 133 - Boot EBC 8 bit 66MHz */
- /* Boot from Small Flash */
- computed_boot_device = BOOT_FROM_SMALL_FLASH;
- break;
-
- case SDR0_PSTRP0_BOOTSTRAP_IIC_A8_EN:
- case SDR0_PSTRP0_BOOTSTRAP_IIC_A4_EN:
- /* Boot Settings in IIC EEprom address 0xA8 or 0xA4 */
- /* Read Serial Device Strap Register1 in PPC440EP */
- mfsdr(sdr_sdstp1, sdr0_sdstp1);
- boot_selection = sdr0_sdstp1 & SDR0_SDSTP1_BOOT_SEL_MASK;
- ebc_boot_size = sdr0_sdstp1 & SDR0_SDSTP1_EBC_ROM_BS_MASK;
-
- switch(boot_selection) {
- case SDR0_SDSTP1_BOOT_SEL_EBC:
- switch(ebc_boot_size) {
- case SDR0_SDSTP1_EBC_ROM_BS_16BIT:
- computed_boot_device = BOOT_FROM_LARGE_FLASH_OR_SRAM;
- break;
- case SDR0_SDSTP1_EBC_ROM_BS_8BIT:
- computed_boot_device = BOOT_FROM_SMALL_FLASH;
- break;
- }
- break;
-
- case SDR0_SDSTP1_BOOT_SEL_PCI:
- computed_boot_device = BOOT_FROM_PCI;
- break;
-
- case SDR0_SDSTP1_BOOT_SEL_NDFC:
- computed_boot_device = BOOT_FROM_NAND_FLASH0;
- break;
- }
- break;
- }
- }
-
- /*-------------------------------------------------------------------------+
- | PPC440EP Pass2
- +-------------------------------------------------------------------------*/
- else {
- switch(bootstrap_settings) {
- case SDR0_PSTRP0_BOOTSTRAP_SETTINGS0:
- /* Default Strap Settings 0 : CPU 400 - PLB 133 - Boot EBC 8 bit 33MHz */
- /* Boot from Small Flash */
- computed_boot_device = BOOT_FROM_SMALL_FLASH;
- break;
- case SDR0_PSTRP0_BOOTSTRAP_SETTINGS1:
- /* Default Strap Settings 1 : CPU 333 - PLB 133 - Boot PCI 66MHz */
- /* Boot from PCI */
- computed_boot_device = BOOT_FROM_PCI;
- break;
-
- case SDR0_PSTRP0_BOOTSTRAP_SETTINGS2:
- /* Default Strap Settings 2 : CPU 400 - PLB 100 - Boot NDFC16 33MHz */
- /* Boot from Nand Flash */
- computed_boot_device = BOOT_FROM_NAND_FLASH0;
- break;
-
- case SDR0_PSTRP0_BOOTSTRAP_SETTINGS3:
- /* Default Strap Settings 3 : CPU 400 - PLB 100 - Boot EBC 16 bit 33MHz */
- /* Boot from Large Flash or SRAM */
- computed_boot_device = BOOT_FROM_LARGE_FLASH_OR_SRAM;
- break;
-
- case SDR0_PSTRP0_BOOTSTRAP_SETTINGS4:
- /* Default Strap Settings 4 : CPU 333 - PLB 133 - Boot EBC 16 bit 66MHz */
- /* Boot from Large Flash or SRAM */
- computed_boot_device = BOOT_FROM_LARGE_FLASH_OR_SRAM;
- break;
-
- case SDR0_PSTRP0_BOOTSTRAP_SETTINGS6:
- /* Default Strap Settings 6 : CPU 400 - PLB 100 - Boot PCI 33MHz */
- /* Boot from PCI */
- computed_boot_device = BOOT_FROM_PCI;
- break;
-
- case SDR0_PSTRP0_BOOTSTRAP_IIC_A8_EN:
- case SDR0_PSTRP0_BOOTSTRAP_IIC_A4_EN:
- /* Default Strap Settings 5-7 */
- /* Boot Settings in IIC EEprom address 0xA8 or 0xA4 */
- /* Read Serial Device Strap Register1 in PPC440EP */
- mfsdr(sdr_sdstp1, sdr0_sdstp1);
- boot_selection = sdr0_sdstp1 & SDR0_SDSTP1_BOOT_SEL_MASK;
- ebc_boot_size = sdr0_sdstp1 & SDR0_SDSTP1_EBC_ROM_BS_MASK;
-
- switch(boot_selection) {
- case SDR0_SDSTP1_BOOT_SEL_EBC:
- switch(ebc_boot_size) {
- case SDR0_SDSTP1_EBC_ROM_BS_16BIT:
- computed_boot_device = BOOT_FROM_LARGE_FLASH_OR_SRAM;
- break;
- case SDR0_SDSTP1_EBC_ROM_BS_8BIT:
- computed_boot_device = BOOT_FROM_SMALL_FLASH;
- break;
- }
- break;
-
- case SDR0_SDSTP1_BOOT_SEL_PCI:
- computed_boot_device = BOOT_FROM_PCI;
- break;
-
- case SDR0_SDSTP1_BOOT_SEL_NDFC:
- computed_boot_device = BOOT_FROM_NAND_FLASH0;
- break;
- }
- break;
- }
- }
-
- /*-------------------------------------------------------------------------+
- |
- | PART 3 : Compute EBC settings depending on selected boot device
- | ====== ======================================================
- |
- | Resulting EBC init will be among following configurations :
- |
- | - Boot from EBC 8bits => boot from SMALL FLASH selected
- | EBC-CS0 = Small Flash
- | EBC-CS1,2,3 = NAND Flash or
- | Exp.Slot depending on Soft Config
- | EBC-CS4 = SRAM/Large Flash or
- | Large Flash/SRAM depending on jumpers
- | EBC-CS5 = NVRAM / EPLD
- |
- | - Boot from EBC 16bits => boot from Large Flash or SRAM selected
- | EBC-CS0 = SRAM/Large Flash or
- | Large Flash/SRAM depending on jumpers
- | EBC-CS1,2,3 = NAND Flash or
- | Exp.Slot depending on Software Configuration
- | EBC-CS4 = Small Flash
- | EBC-CS5 = NVRAM / EPLD
- |
- | - Boot from NAND Flash
- | EBC-CS0 = NAND Flash0
- | EBC-CS1,2,3 = NAND Flash1
- | EBC-CS4 = SRAM/Large Flash or
- | Large Flash/SRAM depending on jumpers
- | EBC-CS5 = NVRAM / EPLD
- |
- | - Boot from PCI
- | EBC-CS0 = ...
- | EBC-CS1,2,3 = NAND Flash or
- | Exp.Slot depending on Software Configuration
- | EBC-CS4 = SRAM/Large Flash or
- | Large Flash/SRAM or
- | Small Flash depending on jumpers
- | EBC-CS5 = NVRAM / EPLD
- |
- +-------------------------------------------------------------------------*/
-
- switch(computed_boot_device) {
- /*------------------------------------------------------------------------- */
- case BOOT_FROM_SMALL_FLASH:
- /*------------------------------------------------------------------------- */
- ebc0_cs0_bnap_value = EBC0_BNAP_SMALL_FLASH;
- ebc0_cs0_bncr_value = EBC0_BNCR_SMALL_FLASH_CS0;
- if ((is_nand_selected()) == TRUE) {
- /* NAND Flash */
- ebc0_cs1_bnap_value = EBC0_BNAP_NAND_FLASH;
- ebc0_cs1_bncr_value = EBC0_BNCR_NAND_FLASH_CS1;
- ebc0_cs2_bnap_value = EBC0_BNAP_NAND_FLASH;
- ebc0_cs2_bncr_value = EBC0_BNCR_NAND_FLASH_CS2;
- ebc0_cs3_bnap_value = 0;
- ebc0_cs3_bncr_value = 0;
- } else {
- /* Expansion Slot */
- ebc0_cs1_bnap_value = 0;
- ebc0_cs1_bncr_value = 0;
- ebc0_cs2_bnap_value = 0;
- ebc0_cs2_bncr_value = 0;
- ebc0_cs3_bnap_value = 0;
- ebc0_cs3_bncr_value = 0;
- }
- ebc0_cs4_bnap_value = EBC0_BNAP_LARGE_FLASH_OR_SRAM;
- ebc0_cs4_bncr_value = EBC0_BNCR_LARGE_FLASH_OR_SRAM_CS4;
-
- break;
-
- /*------------------------------------------------------------------------- */
- case BOOT_FROM_LARGE_FLASH_OR_SRAM:
- /*------------------------------------------------------------------------- */
- ebc0_cs0_bnap_value = EBC0_BNAP_LARGE_FLASH_OR_SRAM;
- ebc0_cs0_bncr_value = EBC0_BNCR_LARGE_FLASH_OR_SRAM_CS0;
- if ((is_nand_selected()) == TRUE) {
- /* NAND Flash */
- ebc0_cs1_bnap_value = EBC0_BNAP_NAND_FLASH;
- ebc0_cs1_bncr_value = EBC0_BNCR_NAND_FLASH_CS1;
- ebc0_cs2_bnap_value = 0;
- ebc0_cs2_bncr_value = 0;
- ebc0_cs3_bnap_value = 0;
- ebc0_cs3_bncr_value = 0;
- } else {
- /* Expansion Slot */
- ebc0_cs1_bnap_value = 0;
- ebc0_cs1_bncr_value = 0;
- ebc0_cs2_bnap_value = 0;
- ebc0_cs2_bncr_value = 0;
- ebc0_cs3_bnap_value = 0;
- ebc0_cs3_bncr_value = 0;
- }
- ebc0_cs4_bnap_value = EBC0_BNAP_SMALL_FLASH;
- ebc0_cs4_bncr_value = EBC0_BNCR_SMALL_FLASH_CS4;
-
- break;
-
- /*------------------------------------------------------------------------- */
- case BOOT_FROM_NAND_FLASH0:
- /*------------------------------------------------------------------------- */
- ebc0_cs0_bnap_value = 0;
- ebc0_cs0_bncr_value = 0;
-
- ebc0_cs1_bnap_value = EBC0_BNAP_NAND_FLASH;
- ebc0_cs1_bncr_value = EBC0_BNCR_NAND_FLASH_CS1;
- ebc0_cs2_bnap_value = 0;
- ebc0_cs2_bncr_value = 0;
- ebc0_cs3_bnap_value = 0;
- ebc0_cs3_bncr_value = 0;
-
- /* Large Flash or SRAM */
- ebc0_cs4_bnap_value = EBC0_BNAP_LARGE_FLASH_OR_SRAM;
- ebc0_cs4_bncr_value = EBC0_BNCR_LARGE_FLASH_OR_SRAM_CS4;
-
- break;
-
- /*------------------------------------------------------------------------- */
- case BOOT_FROM_PCI:
- /*------------------------------------------------------------------------- */
- ebc0_cs0_bnap_value = 0;
- ebc0_cs0_bncr_value = 0;
-
- if ((is_nand_selected()) == TRUE) {
- /* NAND Flash */
- ebc0_cs1_bnap_value = EBC0_BNAP_NAND_FLASH;
- ebc0_cs1_bncr_value = EBC0_BNCR_NAND_FLASH_CS1;
- ebc0_cs2_bnap_value = 0;
- ebc0_cs2_bncr_value = 0;
- ebc0_cs3_bnap_value = 0;
- ebc0_cs3_bncr_value = 0;
- } else {
- /* Expansion Slot */
- ebc0_cs1_bnap_value = 0;
- ebc0_cs1_bncr_value = 0;
- ebc0_cs2_bnap_value = 0;
- ebc0_cs2_bncr_value = 0;
- ebc0_cs3_bnap_value = 0;
- ebc0_cs3_bncr_value = 0;
- }
-
- if ((config_on_ebc_cs4_is_small_flash()) == TRUE) {
- /* Small Flash */
- ebc0_cs4_bnap_value = EBC0_BNAP_SMALL_FLASH;
- ebc0_cs4_bncr_value = EBC0_BNCR_SMALL_FLASH_CS4;
- } else {
- /* Large Flash or SRAM */
- ebc0_cs4_bnap_value = EBC0_BNAP_LARGE_FLASH_OR_SRAM;
- ebc0_cs4_bncr_value = EBC0_BNCR_LARGE_FLASH_OR_SRAM_CS4;
- }
-
- break;
-
- /*------------------------------------------------------------------------- */
- case BOOT_DEVICE_UNKNOWN:
- /*------------------------------------------------------------------------- */
- /* Error */
- break;
-
- }
-
-
- /*-------------------------------------------------------------------------+
- | Initialize EBC CONFIG
- +-------------------------------------------------------------------------*/
- mtdcr(ebccfga, xbcfg);
- mtdcr(ebccfgd, EBC0_CFG_EBTC_DRIVEN |
- EBC0_CFG_PTD_ENABLED |
- EBC0_CFG_RTC_2048PERCLK |
- EBC0_CFG_EMPL_LOW |
- EBC0_CFG_EMPH_LOW |
- EBC0_CFG_CSTC_DRIVEN |
- EBC0_CFG_BPF_ONEDW |
- EBC0_CFG_EMS_8BIT |
- EBC0_CFG_PME_DISABLED |
- EBC0_CFG_PMT_ENCODE(0) );
-
- /*-------------------------------------------------------------------------+
- | Initialize EBC Bank 0-4
- +-------------------------------------------------------------------------*/
- /* EBC Bank0 */
- mtebc(pb0ap, ebc0_cs0_bnap_value);
- mtebc(pb0cr, ebc0_cs0_bncr_value);
- /* EBC Bank1 */
- mtebc(pb1ap, ebc0_cs1_bnap_value);
- mtebc(pb1cr, ebc0_cs1_bncr_value);
- /* EBC Bank2 */
- mtebc(pb2ap, ebc0_cs2_bnap_value);
- mtebc(pb2cr, ebc0_cs2_bncr_value);
- /* EBC Bank3 */
- mtebc(pb3ap, ebc0_cs3_bnap_value);
- mtebc(pb3cr, ebc0_cs3_bncr_value);
- /* EBC Bank4 */
- mtebc(pb4ap, ebc0_cs4_bnap_value);
- mtebc(pb4cr, ebc0_cs4_bncr_value);
-
- return;
-}
-
-
-/*----------------------------------------------------------------------------+
- | get_uart_configuration.
- +----------------------------------------------------------------------------*/
-uart_config_nb_t get_uart_configuration(void)
-{
- return (L4);
-}
-
-/*----------------------------------------------------------------------------+
- | set_phy_configuration_through_fpga => to EPLD
- +----------------------------------------------------------------------------*/
-void set_phy_configuration_through_fpga(zmii_config_t config)
-{
-
- unsigned long fpga_selection_reg;
-
- fpga_selection_reg = in8(FPGA_SELECTION_1_REG) & ~FPGA_SEL_1_REG_PHY_MASK;
-
- switch(config)
- {
- case ZMII_CONFIGURATION_IS_MII:
- fpga_selection_reg = fpga_selection_reg | FPGA_SEL_1_REG_MII;
- break;
- case ZMII_CONFIGURATION_IS_RMII:
- fpga_selection_reg = fpga_selection_reg | FPGA_SEL_1_REG_RMII;
- break;
- case ZMII_CONFIGURATION_IS_SMII:
- fpga_selection_reg = fpga_selection_reg | FPGA_SEL_1_REG_SMII;
- break;
- case ZMII_CONFIGURATION_UNKNOWN:
- default:
- break;
- }
- out8(FPGA_SELECTION_1_REG,fpga_selection_reg);
-
-}
-
-/*----------------------------------------------------------------------------+
- | scp_selection_in_fpga.
- +----------------------------------------------------------------------------*/
-void scp_selection_in_fpga(void)
-{
- unsigned long fpga_selection_2_reg;
-
- fpga_selection_2_reg = in8(FPGA_SELECTION_2_REG) & ~FPGA_SEL2_REG_IIC1_SCP_SEL_MASK;
- fpga_selection_2_reg |= FPGA_SEL2_REG_SEL_SCP;
- out8(FPGA_SELECTION_2_REG,fpga_selection_2_reg);
-}
-
-/*----------------------------------------------------------------------------+
- | iic1_selection_in_fpga.
- +----------------------------------------------------------------------------*/
-void iic1_selection_in_fpga(void)
-{
- unsigned long fpga_selection_2_reg;
-
- fpga_selection_2_reg = in8(FPGA_SELECTION_2_REG) & ~FPGA_SEL2_REG_IIC1_SCP_SEL_MASK;
- fpga_selection_2_reg |= FPGA_SEL2_REG_SEL_IIC1;
- out8(FPGA_SELECTION_2_REG,fpga_selection_2_reg);
-}
-
-/*----------------------------------------------------------------------------+
- | dma_a_b_selection_in_fpga.
- +----------------------------------------------------------------------------*/
-void dma_a_b_selection_in_fpga(void)
-{
- unsigned long fpga_selection_2_reg;
-
- fpga_selection_2_reg = in8(FPGA_SELECTION_2_REG) | FPGA_SEL2_REG_SEL_DMA_A_B;
- out8(FPGA_SELECTION_2_REG,fpga_selection_2_reg);
-}
-
-/*----------------------------------------------------------------------------+
- | dma_a_b_unselect_in_fpga.
- +----------------------------------------------------------------------------*/
-void dma_a_b_unselect_in_fpga(void)
-{
- unsigned long fpga_selection_2_reg;
-
- fpga_selection_2_reg = in8(FPGA_SELECTION_2_REG) & ~FPGA_SEL2_REG_SEL_DMA_A_B;
- out8(FPGA_SELECTION_2_REG,fpga_selection_2_reg);
-}
-
-/*----------------------------------------------------------------------------+
- | dma_c_d_selection_in_fpga.
- +----------------------------------------------------------------------------*/
-void dma_c_d_selection_in_fpga(void)
-{
- unsigned long fpga_selection_2_reg;
-
- fpga_selection_2_reg = in8(FPGA_SELECTION_2_REG) | FPGA_SEL2_REG_SEL_DMA_C_D;
- out8(FPGA_SELECTION_2_REG,fpga_selection_2_reg);
-}
-
-/*----------------------------------------------------------------------------+
- | dma_c_d_unselect_in_fpga.
- +----------------------------------------------------------------------------*/
-void dma_c_d_unselect_in_fpga(void)
-{
- unsigned long fpga_selection_2_reg;
-
- fpga_selection_2_reg = in8(FPGA_SELECTION_2_REG) & ~FPGA_SEL2_REG_SEL_DMA_C_D;
- out8(FPGA_SELECTION_2_REG,fpga_selection_2_reg);
-}
-
-/*----------------------------------------------------------------------------+
- | usb2_device_selection_in_fpga.
- +----------------------------------------------------------------------------*/
-void usb2_device_selection_in_fpga(void)
-{
- unsigned long fpga_selection_1_reg;
-
- fpga_selection_1_reg = in8(FPGA_SELECTION_1_REG) | FPGA_SEL_1_REG_USB2_DEV_SEL;
- out8(FPGA_SELECTION_1_REG,fpga_selection_1_reg);
-}
-
-/*----------------------------------------------------------------------------+
- | usb2_device_reset_through_fpga.
- +----------------------------------------------------------------------------*/
-void usb2_device_reset_through_fpga(void)
-{
- /* Perform soft Reset pulse */
- unsigned long fpga_reset_reg;
- int i;
-
- fpga_reset_reg = in8(FPGA_RESET_REG);
- out8(FPGA_RESET_REG,fpga_reset_reg | FPGA_RESET_REG_RESET_USB20_DEV);
- for (i=0; i<500; i++)
- udelay(1000);
- out8(FPGA_RESET_REG,fpga_reset_reg);
-}
-
-/*----------------------------------------------------------------------------+
- | usb2_host_selection_in_fpga.
- +----------------------------------------------------------------------------*/
-void usb2_host_selection_in_fpga(void)
-{
- unsigned long fpga_selection_1_reg;
-
- fpga_selection_1_reg = in8(FPGA_SELECTION_1_REG) | FPGA_SEL_1_REG_USB2_HOST_SEL;
- out8(FPGA_SELECTION_1_REG,fpga_selection_1_reg);
-}
-
-/*----------------------------------------------------------------------------+
- | ndfc_selection_in_fpga.
- +----------------------------------------------------------------------------*/
-void ndfc_selection_in_fpga(void)
-{
- unsigned long fpga_selection_1_reg;
-
- fpga_selection_1_reg = in8(FPGA_SELECTION_1_REG) &~FPGA_SEL_1_REG_NF_SELEC_MASK;
- fpga_selection_1_reg |= FPGA_SEL_1_REG_NF0_SEL_BY_NFCS1;
- fpga_selection_1_reg |= FPGA_SEL_1_REG_NF1_SEL_BY_NFCS2;
- out8(FPGA_SELECTION_1_REG,fpga_selection_1_reg);
-}
-
-/*----------------------------------------------------------------------------+
- | uart_selection_in_fpga.
- +----------------------------------------------------------------------------*/
-void uart_selection_in_fpga(uart_config_nb_t uart_config)
-{
- /* FPGA register */
- unsigned char fpga_selection_3_reg;
-
- /* Read FPGA Reagister */
- fpga_selection_3_reg = in8(FPGA_SELECTION_3_REG);
-
- switch (uart_config)
- {
- case L1:
- /* ----------------------------------------------------------------------- */
- /* L1 configuration: UART0 = 8 pins */
- /* ----------------------------------------------------------------------- */
- /* Configure FPGA */
- fpga_selection_3_reg = fpga_selection_3_reg & ~FPGA_SEL3_REG_SEL_UART_CONFIG_MASK;
- fpga_selection_3_reg = fpga_selection_3_reg | FPGA_SEL3_REG_SEL_UART_CONFIG1;
- out8(FPGA_SELECTION_3_REG, fpga_selection_3_reg);
-
- break;
-
- case L2:
- /* ----------------------------------------------------------------------- */
- /* L2 configuration: UART0 = 4 pins */
- /* UART1 = 4 pins */
- /* ----------------------------------------------------------------------- */
- /* Configure FPGA */
- fpga_selection_3_reg = fpga_selection_3_reg & ~FPGA_SEL3_REG_SEL_UART_CONFIG_MASK;
- fpga_selection_3_reg = fpga_selection_3_reg | FPGA_SEL3_REG_SEL_UART_CONFIG2;
- out8(FPGA_SELECTION_3_REG, fpga_selection_3_reg);
-
- break;
-
- case L3:
- /* ----------------------------------------------------------------------- */
- /* L3 configuration: UART0 = 4 pins */
- /* UART1 = 2 pins */
- /* UART2 = 2 pins */
- /* ----------------------------------------------------------------------- */
- /* Configure FPGA */
- fpga_selection_3_reg = fpga_selection_3_reg & ~FPGA_SEL3_REG_SEL_UART_CONFIG_MASK;
- fpga_selection_3_reg = fpga_selection_3_reg | FPGA_SEL3_REG_SEL_UART_CONFIG3;
- out8(FPGA_SELECTION_3_REG, fpga_selection_3_reg);
- break;
-
- case L4:
- /* Configure FPGA */
- fpga_selection_3_reg = fpga_selection_3_reg & ~FPGA_SEL3_REG_SEL_UART_CONFIG_MASK;
- fpga_selection_3_reg = fpga_selection_3_reg | FPGA_SEL3_REG_SEL_UART_CONFIG4;
- out8(FPGA_SELECTION_3_REG, fpga_selection_3_reg);
-
- break;
-
- default:
- /* Unsupported UART configuration number */
- for (;;)
- ;
- break;
-
- }
-}
-
-
-/*----------------------------------------------------------------------------+
- | init_default_gpio
- +----------------------------------------------------------------------------*/
-void init_default_gpio(void)
-{
- int i;
-
- /* Init GPIO0 */
- for(i=0; i<GPIO_MAX; i++)
- {
- gpio_tab[GPIO0][i].add = GPIO0_BASE;
- gpio_tab[GPIO0][i].in_out = GPIO_DIS;
- gpio_tab[GPIO0][i].alt_nb = GPIO_SEL;
- }
-
- /* Init GPIO1 */
- for(i=0; i<GPIO_MAX; i++)
- {
- gpio_tab[GPIO1][i].add = GPIO1_BASE;
- gpio_tab[GPIO1][i].in_out = GPIO_DIS;
- gpio_tab[GPIO1][i].alt_nb = GPIO_SEL;
- }
-
- /* EBC_CS_N(5) - GPIO0_10 */
- gpio_tab[GPIO0][10].in_out = GPIO_OUT;
- gpio_tab[GPIO0][10].alt_nb = GPIO_ALT1;
-
- /* EBC_CS_N(4) - GPIO0_9 */
- gpio_tab[GPIO0][9].in_out = GPIO_OUT;
- gpio_tab[GPIO0][9].alt_nb = GPIO_ALT1;
-}
-
-/*----------------------------------------------------------------------------+
- | update_uart_ios
- +------------------------------------------------------------------------------
- |
- | Set UART Configuration in PowerPC440EP
- |
- | +---------------------------------------------------------------------+
- | | Configuartion | Connector | Nb of pins | Pins | Associated |
- | | Number | Port Name | available | naming | CORE |
- | +-----------------+---------------+------------+--------+-------------+
- | | L1 | Port_A | 8 | UART | UART core 0 |
- | +-----------------+---------------+------------+--------+-------------+
- | | L2 | Port_A | 4 | UART1 | UART core 0 |
- | | (L2D) | Port_B | 4 | UART2 | UART core 1 |
- | +-----------------+---------------+------------+--------+-------------+
- | | L3 | Port_A | 4 | UART1 | UART core 0 |
- | | (L3D) | Port_B | 2 | UART2 | UART core 1 |
- | | | Port_C | 2 | UART3 | UART core 2 |
- | +-----------------+---------------+------------+--------+-------------+
- | | | Port_A | 2 | UART1 | UART core 0 |
- | | L4 | Port_B | 2 | UART2 | UART core 1 |
- | | (L4D) | Port_C | 2 | UART3 | UART core 2 |
- | | | Port_D | 2 | UART4 | UART core 3 |
- | +-----------------+---------------+------------+--------+-------------+
- |
- | Involved GPIOs
- |
- | +------------------------------------------------------------------------------+
- | | GPIO | Aternate 1 | I/O | Alternate 2 | I/O | Alternate 3 | I/O |
- | +---------+------------------+-----+-----------------+-----+-------------+-----+
- | | GPIO1_2 | UART0_DCD_N | I | UART1_DSR_CTS_N | I | UART2_SOUT | O |
- | | GPIO1_3 | UART0_8PIN_DSR_N | I | UART1_RTS_DTR_N | O | UART2_SIN | I |
- | | GPIO1_4 | UART0_8PIN_CTS_N | I | NA | NA | UART3_SIN | I |
- | | GPIO1_5 | UART0_RTS_N | O | NA | NA | UART3_SOUT | O |
- | | GPIO1_6 | UART0_DTR_N | O | UART1_SOUT | O | NA | NA |
- | | GPIO1_7 | UART0_RI_N | I | UART1_SIN | I | NA | NA |
- | +------------------------------------------------------------------------------+
- |
- |
- +----------------------------------------------------------------------------*/
-
-void update_uart_ios(uart_config_nb_t uart_config)
-{
- switch (uart_config)
- {
- case L1:
- /* ----------------------------------------------------------------------- */
- /* L1 configuration: UART0 = 8 pins */
- /* ----------------------------------------------------------------------- */
- /* Update GPIO Configuration Table */
- gpio_tab[GPIO1][2].in_out = GPIO_IN;
- gpio_tab[GPIO1][2].alt_nb = GPIO_ALT1;
-
- gpio_tab[GPIO1][3].in_out = GPIO_IN;
- gpio_tab[GPIO1][3].alt_nb = GPIO_ALT1;
-
- gpio_tab[GPIO1][4].in_out = GPIO_IN;
- gpio_tab[GPIO1][4].alt_nb = GPIO_ALT1;
-
- gpio_tab[GPIO1][5].in_out = GPIO_OUT;
- gpio_tab[GPIO1][5].alt_nb = GPIO_ALT1;
-
- gpio_tab[GPIO1][6].in_out = GPIO_OUT;
- gpio_tab[GPIO1][6].alt_nb = GPIO_ALT1;
-
- gpio_tab[GPIO1][7].in_out = GPIO_IN;
- gpio_tab[GPIO1][7].alt_nb = GPIO_ALT1;
-
- break;
-
- case L2:
- /* ----------------------------------------------------------------------- */
- /* L2 configuration: UART0 = 4 pins */
- /* UART1 = 4 pins */
- /* ----------------------------------------------------------------------- */
- /* Update GPIO Configuration Table */
- gpio_tab[GPIO1][2].in_out = GPIO_IN;
- gpio_tab[GPIO1][2].alt_nb = GPIO_ALT2;
-
- gpio_tab[GPIO1][3].in_out = GPIO_OUT;
- gpio_tab[GPIO1][3].alt_nb = GPIO_ALT2;
-
- gpio_tab[GPIO1][4].in_out = GPIO_IN;
- gpio_tab[GPIO1][4].alt_nb = GPIO_ALT1;
-
- gpio_tab[GPIO1][5].in_out = GPIO_OUT;
- gpio_tab[GPIO1][5].alt_nb = GPIO_ALT1;
-
- gpio_tab[GPIO1][6].in_out = GPIO_OUT;
- gpio_tab[GPIO1][6].alt_nb = GPIO_ALT2;
-
- gpio_tab[GPIO1][7].in_out = GPIO_IN;
- gpio_tab[GPIO1][7].alt_nb = GPIO_ALT2;
-
- break;
-
- case L3:
- /* ----------------------------------------------------------------------- */
- /* L3 configuration: UART0 = 4 pins */
- /* UART1 = 2 pins */
- /* UART2 = 2 pins */
- /* ----------------------------------------------------------------------- */
- /* Update GPIO Configuration Table */
- gpio_tab[GPIO1][2].in_out = GPIO_OUT;
- gpio_tab[GPIO1][2].alt_nb = GPIO_ALT3;
-
- gpio_tab[GPIO1][3].in_out = GPIO_IN;
- gpio_tab[GPIO1][3].alt_nb = GPIO_ALT3;
-
- gpio_tab[GPIO1][4].in_out = GPIO_IN;
- gpio_tab[GPIO1][4].alt_nb = GPIO_ALT1;
-
- gpio_tab[GPIO1][5].in_out = GPIO_OUT;
- gpio_tab[GPIO1][5].alt_nb = GPIO_ALT1;
-
- gpio_tab[GPIO1][6].in_out = GPIO_OUT;
- gpio_tab[GPIO1][6].alt_nb = GPIO_ALT2;
-
- gpio_tab[GPIO1][7].in_out = GPIO_IN;
- gpio_tab[GPIO1][7].alt_nb = GPIO_ALT2;
-
- break;
-
- case L4:
- /* ----------------------------------------------------------------------- */
- /* L4 configuration: UART0 = 2 pins */
- /* UART1 = 2 pins */
- /* UART2 = 2 pins */
- /* UART3 = 2 pins */
- /* ----------------------------------------------------------------------- */
- /* Update GPIO Configuration Table */
- gpio_tab[GPIO1][2].in_out = GPIO_OUT;
- gpio_tab[GPIO1][2].alt_nb = GPIO_ALT3;
-
- gpio_tab[GPIO1][3].in_out = GPIO_IN;
- gpio_tab[GPIO1][3].alt_nb = GPIO_ALT3;
-
- gpio_tab[GPIO1][4].in_out = GPIO_IN;
- gpio_tab[GPIO1][4].alt_nb = GPIO_ALT3;
-
- gpio_tab[GPIO1][5].in_out = GPIO_OUT;
- gpio_tab[GPIO1][5].alt_nb = GPIO_ALT3;
-
- gpio_tab[GPIO1][6].in_out = GPIO_OUT;
- gpio_tab[GPIO1][6].alt_nb = GPIO_ALT2;
-
- gpio_tab[GPIO1][7].in_out = GPIO_IN;
- gpio_tab[GPIO1][7].alt_nb = GPIO_ALT2;
-
- break;
-
- default:
- /* Unsupported UART configuration number */
- printf("ERROR - Unsupported UART configuration number.\n\n");
- for (;;)
- ;
- break;
-
- }
-
- /* Set input Selection Register on Alt_Receive for UART Input Core */
- out32(GPIO1_IS1L, (in32(GPIO1_IS1L) | 0x0FC30000));
- out32(GPIO1_IS2L, (in32(GPIO1_IS2L) | 0x0C030000));
- out32(GPIO1_IS3L, (in32(GPIO1_IS3L) | 0x03C00000));
-}
-
-/*----------------------------------------------------------------------------+
- | update_ndfc_ios(void).
- +----------------------------------------------------------------------------*/
-void update_ndfc_ios(void)
-{
- /* Update GPIO Configuration Table */
- gpio_tab[GPIO0][6].in_out = GPIO_OUT; /* EBC_CS_N(1) */
- gpio_tab[GPIO0][6].alt_nb = GPIO_ALT1;
-
-#if 0
- gpio_tab[GPIO0][7].in_out = GPIO_OUT; /* EBC_CS_N(2) */
- gpio_tab[GPIO0][7].alt_nb = GPIO_ALT1;
-
- gpio_tab[GPIO0][7].in_out = GPIO_OUT; /* EBC_CS_N(3) */
- gpio_tab[GPIO0][7].alt_nb = GPIO_ALT1;
-#endif
-}
-
-/*----------------------------------------------------------------------------+
- | update_zii_ios(void).
- +----------------------------------------------------------------------------*/
-void update_zii_ios(void)
-{
- /* Update GPIO Configuration Table */
- gpio_tab[GPIO0][12].in_out = GPIO_IN; /* ZII_p0Rxd(0) */
- gpio_tab[GPIO0][12].alt_nb = GPIO_ALT1;
-
- gpio_tab[GPIO0][13].in_out = GPIO_IN; /* ZII_p0Rxd(1) */
- gpio_tab[GPIO0][13].alt_nb = GPIO_ALT1;
-
- gpio_tab[GPIO0][14].in_out = GPIO_IN; /* ZII_p0Rxd(2) */
- gpio_tab[GPIO0][14].alt_nb = GPIO_ALT1;
-
- gpio_tab[GPIO0][15].in_out = GPIO_IN; /* ZII_p0Rxd(3) */
- gpio_tab[GPIO0][15].alt_nb = GPIO_ALT1;
-
- gpio_tab[GPIO0][16].in_out = GPIO_OUT; /* ZII_p0Txd(0) */
- gpio_tab[GPIO0][16].alt_nb = GPIO_ALT1;
-
- gpio_tab[GPIO0][17].in_out = GPIO_OUT; /* ZII_p0Txd(1) */
- gpio_tab[GPIO0][17].alt_nb = GPIO_ALT1;
-
- gpio_tab[GPIO0][18].in_out = GPIO_OUT; /* ZII_p0Txd(2) */
- gpio_tab[GPIO0][18].alt_nb = GPIO_ALT1;
-
- gpio_tab[GPIO0][19].in_out = GPIO_OUT; /* ZII_p0Txd(3) */
- gpio_tab[GPIO0][19].alt_nb = GPIO_ALT1;
-
- gpio_tab[GPIO0][20].in_out = GPIO_IN; /* ZII_p0Rx_er */
- gpio_tab[GPIO0][20].alt_nb = GPIO_ALT1;
-
- gpio_tab[GPIO0][21].in_out = GPIO_IN; /* ZII_p0Rx_dv */
- gpio_tab[GPIO0][21].alt_nb = GPIO_ALT1;
-
- gpio_tab[GPIO0][22].in_out = GPIO_IN; /* ZII_p0Crs */
- gpio_tab[GPIO0][22].alt_nb = GPIO_ALT1;
-
- gpio_tab[GPIO0][23].in_out = GPIO_OUT; /* ZII_p0Tx_er */
- gpio_tab[GPIO0][23].alt_nb = GPIO_ALT1;
-
- gpio_tab[GPIO0][24].in_out = GPIO_OUT; /* ZII_p0Tx_en */
- gpio_tab[GPIO0][24].alt_nb = GPIO_ALT1;
-
- gpio_tab[GPIO0][25].in_out = GPIO_IN; /* ZII_p0Col */
- gpio_tab[GPIO0][25].alt_nb = GPIO_ALT1;
-
-}
-
-/*----------------------------------------------------------------------------+
- | update_uic_0_3_irq_ios().
- +----------------------------------------------------------------------------*/
-void update_uic_0_3_irq_ios(void)
-{
- gpio_tab[GPIO1][8].in_out = GPIO_IN; /* UIC_IRQ(0) */
- gpio_tab[GPIO1][8].alt_nb = GPIO_ALT1;
-
- gpio_tab[GPIO1][9].in_out = GPIO_IN; /* UIC_IRQ(1) */
- gpio_tab[GPIO1][9].alt_nb = GPIO_ALT1;
-
- gpio_tab[GPIO1][10].in_out = GPIO_IN; /* UIC_IRQ(2) */
- gpio_tab[GPIO1][10].alt_nb = GPIO_ALT1;
-
- gpio_tab[GPIO1][11].in_out = GPIO_IN; /* UIC_IRQ(3) */
- gpio_tab[GPIO1][11].alt_nb = GPIO_ALT1;
-}
-
-/*----------------------------------------------------------------------------+
- | update_uic_4_9_irq_ios().
- +----------------------------------------------------------------------------*/
-void update_uic_4_9_irq_ios(void)
-{
- gpio_tab[GPIO1][12].in_out = GPIO_IN; /* UIC_IRQ(4) */
- gpio_tab[GPIO1][12].alt_nb = GPIO_ALT1;
-
- gpio_tab[GPIO1][13].in_out = GPIO_IN; /* UIC_IRQ(6) */
- gpio_tab[GPIO1][13].alt_nb = GPIO_ALT1;
-
- gpio_tab[GPIO1][14].in_out = GPIO_IN; /* UIC_IRQ(7) */
- gpio_tab[GPIO1][14].alt_nb = GPIO_ALT1;
-
- gpio_tab[GPIO1][15].in_out = GPIO_IN; /* UIC_IRQ(8) */
- gpio_tab[GPIO1][15].alt_nb = GPIO_ALT1;
-
- gpio_tab[GPIO1][16].in_out = GPIO_IN; /* UIC_IRQ(9) */
- gpio_tab[GPIO1][16].alt_nb = GPIO_ALT1;
-}
-
-/*----------------------------------------------------------------------------+
- | update_dma_a_b_ios().
- +----------------------------------------------------------------------------*/
-void update_dma_a_b_ios(void)
-{
- gpio_tab[GPIO1][12].in_out = GPIO_OUT; /* DMA_ACK(1) */
- gpio_tab[GPIO1][12].alt_nb = GPIO_ALT2;
-
- gpio_tab[GPIO1][13].in_out = GPIO_BI; /* DMA_EOT/TC(1) */
- gpio_tab[GPIO1][13].alt_nb = GPIO_ALT2;
-
- gpio_tab[GPIO1][14].in_out = GPIO_IN; /* DMA_REQ(0) */
- gpio_tab[GPIO1][14].alt_nb = GPIO_ALT2;
-
- gpio_tab[GPIO1][15].in_out = GPIO_OUT; /* DMA_ACK(0) */
- gpio_tab[GPIO1][15].alt_nb = GPIO_ALT2;
-
- gpio_tab[GPIO1][16].in_out = GPIO_BI; /* DMA_EOT/TC(0) */
- gpio_tab[GPIO1][16].alt_nb = GPIO_ALT2;
-}
-
-/*----------------------------------------------------------------------------+
- | update_dma_c_d_ios().
- +----------------------------------------------------------------------------*/
-void update_dma_c_d_ios(void)
-{
- gpio_tab[GPIO0][0].in_out = GPIO_IN; /* DMA_REQ(2) */
- gpio_tab[GPIO0][0].alt_nb = GPIO_ALT2;
-
- gpio_tab[GPIO0][1].in_out = GPIO_OUT; /* DMA_ACK(2) */
- gpio_tab[GPIO0][1].alt_nb = GPIO_ALT2;
-
- gpio_tab[GPIO0][2].in_out = GPIO_BI; /* DMA_EOT/TC(2) */
- gpio_tab[GPIO0][2].alt_nb = GPIO_ALT2;
-
- gpio_tab[GPIO0][3].in_out = GPIO_IN; /* DMA_REQ(3) */
- gpio_tab[GPIO0][3].alt_nb = GPIO_ALT2;
-
- gpio_tab[GPIO0][4].in_out = GPIO_OUT; /* DMA_ACK(3) */
- gpio_tab[GPIO0][4].alt_nb = GPIO_ALT2;
-
- gpio_tab[GPIO0][5].in_out = GPIO_BI; /* DMA_EOT/TC(3) */
- gpio_tab[GPIO0][5].alt_nb = GPIO_ALT2;
-
-}
-
-/*----------------------------------------------------------------------------+
- | update_ebc_master_ios().
- +----------------------------------------------------------------------------*/
-void update_ebc_master_ios(void)
-{
- gpio_tab[GPIO0][27].in_out = GPIO_IN; /* EXT_EBC_REQ */
- gpio_tab[GPIO0][27].alt_nb = GPIO_ALT1;
-
- gpio_tab[GPIO0][29].in_out = GPIO_OUT; /* EBC_EXT_HDLA */
- gpio_tab[GPIO0][29].alt_nb = GPIO_ALT1;
-
- gpio_tab[GPIO0][30].in_out = GPIO_OUT; /* EBC_EXT_ACK */
- gpio_tab[GPIO0][30].alt_nb = GPIO_ALT1;
-
- gpio_tab[GPIO0][31].in_out = GPIO_OUT; /* EBC_EXR_BUSREQ */
- gpio_tab[GPIO0][31].alt_nb = GPIO_ALT1;
-}
-
-/*----------------------------------------------------------------------------+
- | update_usb2_device_ios().
- +----------------------------------------------------------------------------*/
-void update_usb2_device_ios(void)
-{
- gpio_tab[GPIO0][26].in_out = GPIO_IN; /* USB2D_RXVALID */
- gpio_tab[GPIO0][26].alt_nb = GPIO_ALT2;
-
- gpio_tab[GPIO0][27].in_out = GPIO_IN; /* USB2D_RXERROR */
- gpio_tab[GPIO0][27].alt_nb = GPIO_ALT2;
-
- gpio_tab[GPIO0][28].in_out = GPIO_OUT; /* USB2D_TXVALID */
- gpio_tab[GPIO0][28].alt_nb = GPIO_ALT2;
-
- gpio_tab[GPIO0][29].in_out = GPIO_OUT; /* USB2D_PAD_SUSPNDM */
- gpio_tab[GPIO0][29].alt_nb = GPIO_ALT2;
-
- gpio_tab[GPIO0][30].in_out = GPIO_OUT; /* USB2D_XCVRSELECT */
- gpio_tab[GPIO0][30].alt_nb = GPIO_ALT2;
-
- gpio_tab[GPIO0][31].in_out = GPIO_OUT; /* USB2D_TERMSELECT */
- gpio_tab[GPIO0][31].alt_nb = GPIO_ALT2;
-
- gpio_tab[GPIO1][0].in_out = GPIO_OUT; /* USB2D_OPMODE0 */
- gpio_tab[GPIO1][0].alt_nb = GPIO_ALT1;
-
- gpio_tab[GPIO1][1].in_out = GPIO_OUT; /* USB2D_OPMODE1 */
- gpio_tab[GPIO1][1].alt_nb = GPIO_ALT1;
-
-}
-
-/*----------------------------------------------------------------------------+
- | update_pci_patch_ios().
- +----------------------------------------------------------------------------*/
-void update_pci_patch_ios(void)
-{
- gpio_tab[GPIO0][29].in_out = GPIO_OUT; /* EBC_EXT_HDLA */
- gpio_tab[GPIO0][29].alt_nb = GPIO_ALT1;
-}
-
-/*----------------------------------------------------------------------------+
- | set_chip_gpio_configuration(unsigned char gpio_core)
- | Put the core impacted by clock modification and sharing in reset.
- | Config the select registers to resolve the sharing depending of the config.
- | Configure the GPIO registers.
- |
- +----------------------------------------------------------------------------*/
-void set_chip_gpio_configuration(unsigned char gpio_core)
-{
- unsigned char i=0, j=0, reg_offset = 0;
- unsigned long gpio_reg, gpio_core_add;
-
- /* GPIO config of the GPIOs 0 to 31 */
- for (i=0; i<GPIO_MAX; i++, j++)
- {
- if (i == GPIO_MAX/2)
- {
- reg_offset = 4;
- j = i-16;
- }
-
- gpio_core_add = gpio_tab[gpio_core][i].add;
-
- if ( (gpio_tab[gpio_core][i].in_out == GPIO_IN) ||
- (gpio_tab[gpio_core][i].in_out == GPIO_BI ))
- {
- switch (gpio_tab[gpio_core][i].alt_nb)
- {
- case GPIO_SEL:
- break;
-
- case GPIO_ALT1:
- gpio_reg = in32(GPIO_IS1(gpio_core_add+reg_offset)) & ~(GPIO_MASK >> (j*2));
- gpio_reg = gpio_reg | (GPIO_IN_SEL >> (j*2));
- out32(GPIO_IS1(gpio_core_add+reg_offset), gpio_reg);
- break;
-
- case GPIO_ALT2:
- gpio_reg = in32(GPIO_IS2(gpio_core_add+reg_offset)) & ~(GPIO_MASK >> (j*2));
- gpio_reg = gpio_reg | (GPIO_IN_SEL >> (j*2));
- out32(GPIO_IS2(gpio_core_add+reg_offset), gpio_reg);
- break;
-
- case GPIO_ALT3:
- gpio_reg = in32(GPIO_IS3(gpio_core_add+reg_offset)) & ~(GPIO_MASK >> (j*2));
- gpio_reg = gpio_reg | (GPIO_IN_SEL >> (j*2));
- out32(GPIO_IS3(gpio_core_add+reg_offset), gpio_reg);
- break;
- }
- }
- if ( (gpio_tab[gpio_core][i].in_out == GPIO_OUT) ||
- (gpio_tab[gpio_core][i].in_out == GPIO_BI ))
- {
-
- switch (gpio_tab[gpio_core][i].alt_nb)
- {
- case GPIO_SEL:
- break;
- case GPIO_ALT1:
- gpio_reg = in32(GPIO_OS(gpio_core_add+reg_offset)) & ~(GPIO_MASK >> (j*2));
- gpio_reg = gpio_reg | (GPIO_ALT1_SEL >> (j*2));
- out32(GPIO_OS(gpio_core_add+reg_offset), gpio_reg);
- gpio_reg = in32(GPIO_TS(gpio_core_add+reg_offset)) & ~(GPIO_MASK >> (j*2));
- gpio_reg = gpio_reg | (GPIO_ALT1_SEL >> (j*2));
- out32(GPIO_TS(gpio_core_add+reg_offset), gpio_reg);
- break;
- case GPIO_ALT2:
- gpio_reg = in32(GPIO_OS(gpio_core_add+reg_offset)) & ~(GPIO_MASK >> (j*2));
- gpio_reg = gpio_reg | (GPIO_ALT2_SEL >> (j*2));
- out32(GPIO_OS(gpio_core_add+reg_offset), gpio_reg);
- gpio_reg = in32(GPIO_TS(gpio_core_add+reg_offset)) & ~(GPIO_MASK >> (j*2));
- gpio_reg = gpio_reg | (GPIO_ALT2_SEL >> (j*2));
- out32(GPIO_TS(gpio_core_add+reg_offset), gpio_reg);
- break;
- case GPIO_ALT3:
- gpio_reg = in32(GPIO_OS(gpio_core_add+reg_offset)) & ~(GPIO_MASK >> (j*2));
- gpio_reg = gpio_reg | (GPIO_ALT3_SEL >> (j*2));
- out32(GPIO_OS(gpio_core_add+reg_offset), gpio_reg);
- gpio_reg = in32(GPIO_TS(gpio_core_add+reg_offset)) & ~(GPIO_MASK >> (j*2));
- gpio_reg = gpio_reg | (GPIO_ALT3_SEL >> (j*2));
- out32(GPIO_TS(gpio_core_add+reg_offset), gpio_reg);
- break;
- }
- }
- }
-}
-
-/*----------------------------------------------------------------------------+
- | force_bup_core_selection.
- +----------------------------------------------------------------------------*/
-void force_bup_core_selection(core_selection_t *core_select_P, config_validity_t *config_val_P)
-{
- /* Pointer invalid */
- if (core_select_P == NULL)
- {
- printf("Configuration invalid pointer 1\n");
- for (;;)
- ;
- }
-
- /* L4 Selection */
- *(core_select_P+UART_CORE0) = CORE_SELECTED;
- *(core_select_P+UART_CORE1) = CORE_SELECTED;
- *(core_select_P+UART_CORE2) = CORE_SELECTED;
- *(core_select_P+UART_CORE3) = CORE_SELECTED;
-
- /* RMII Selection */
- *(core_select_P+RMII_SEL) = CORE_SELECTED;
-
- /* External Interrupt 0-9 selection */
- *(core_select_P+UIC_0_3) = CORE_SELECTED;
- *(core_select_P+UIC_4_9) = CORE_SELECTED;
-
- *(core_select_P+SCP_CORE) = CORE_SELECTED;
- *(core_select_P+DMA_CHANNEL_CD) = CORE_SELECTED;
- *(core_select_P+PACKET_REJ_FUNC_AVAIL) = CORE_SELECTED;
- *(core_select_P+USB1_DEVICE) = CORE_SELECTED;
-
- if (is_nand_selected()) {
- *(core_select_P+NAND_FLASH) = CORE_SELECTED;
- }
-
- *config_val_P = CONFIG_IS_VALID;
-
-}
-
-/*----------------------------------------------------------------------------+
- | configure_ppc440ep_pins.
- +----------------------------------------------------------------------------*/
-void configure_ppc440ep_pins(void)
-{
- uart_config_nb_t uart_configuration;
- config_validity_t config_val = CONFIG_IS_INVALID;
-
- /* Create Core Selection Table */
- core_selection_t ppc440ep_core_selection[MAX_CORE_SELECT_NB] =
- {
- CORE_NOT_SELECTED, /* IIC_CORE, */
- CORE_NOT_SELECTED, /* SPC_CORE, */
- CORE_NOT_SELECTED, /* DMA_CHANNEL_AB, */
- CORE_NOT_SELECTED, /* UIC_4_9, */
- CORE_NOT_SELECTED, /* USB2_HOST, */
- CORE_NOT_SELECTED, /* DMA_CHANNEL_CD, */
- CORE_NOT_SELECTED, /* USB2_DEVICE, */
- CORE_NOT_SELECTED, /* PACKET_REJ_FUNC_AVAIL, */
- CORE_NOT_SELECTED, /* USB1_DEVICE, */
- CORE_NOT_SELECTED, /* EBC_MASTER, */
- CORE_NOT_SELECTED, /* NAND_FLASH, */
- CORE_NOT_SELECTED, /* UART_CORE0, */
- CORE_NOT_SELECTED, /* UART_CORE1, */
- CORE_NOT_SELECTED, /* UART_CORE2, */
- CORE_NOT_SELECTED, /* UART_CORE3, */
- CORE_NOT_SELECTED, /* MII_SEL, */
- CORE_NOT_SELECTED, /* RMII_SEL, */
- CORE_NOT_SELECTED, /* SMII_SEL, */
- CORE_NOT_SELECTED, /* PACKET_REJ_FUNC_EN */
- CORE_NOT_SELECTED, /* UIC_0_3 */
- CORE_NOT_SELECTED, /* USB1_HOST */
- CORE_NOT_SELECTED /* PCI_PATCH */
- };
-
-
- /* Table Default Initialisation + FPGA Access */
- init_default_gpio();
- set_chip_gpio_configuration(GPIO0);
- set_chip_gpio_configuration(GPIO1);
-
- /* Update Table */
- force_bup_core_selection(ppc440ep_core_selection, &config_val);
-#if 0 /* test-only */
- /* If we are running PIBS 1, force known configuration */
- update_core_selection_table(ppc440ep_core_selection, &config_val);
-#endif
-
- /*----------------------------------------------------------------------------+
- | SDR + ios table update + fpga initialization
- +----------------------------------------------------------------------------*/
- unsigned long sdr0_pfc1 = 0;
- unsigned long sdr0_usb0 = 0;
- unsigned long sdr0_mfr = 0;
-
- /* PCI Always selected */
-
- /* I2C Selection */
- if (ppc440ep_core_selection[IIC_CORE] == CORE_SELECTED)
- {
- sdr0_pfc1 = (sdr0_pfc1 & ~SDR0_PFC1_SIS_MASK) | SDR0_PFC1_SIS_IIC1_SEL;
- iic1_selection_in_fpga();
- }
-
- /* SCP Selection */
- if (ppc440ep_core_selection[SCP_CORE] == CORE_SELECTED)
- {
- sdr0_pfc1 = (sdr0_pfc1 & ~SDR0_PFC1_SIS_MASK) | SDR0_PFC1_SIS_SCP_SEL;
- scp_selection_in_fpga();
- }
-
- /* UIC 0:3 Selection */
- if (ppc440ep_core_selection[UIC_0_3] == CORE_SELECTED)
- {
- update_uic_0_3_irq_ios();
- dma_a_b_unselect_in_fpga();
- }
-
- /* UIC 4:9 Selection */
- if (ppc440ep_core_selection[UIC_4_9] == CORE_SELECTED)
- {
- sdr0_pfc1 = (sdr0_pfc1 & ~SDR0_PFC1_DIS_MASK) | SDR0_PFC1_DIS_UICIRQ5_SEL;
- update_uic_4_9_irq_ios();
- }
-
- /* DMA AB Selection */
- if (ppc440ep_core_selection[DMA_CHANNEL_AB] == CORE_SELECTED)
- {
- sdr0_pfc1 = (sdr0_pfc1 & ~SDR0_PFC1_DIS_MASK) | SDR0_PFC1_DIS_DMAR_SEL;
- update_dma_a_b_ios();
- dma_a_b_selection_in_fpga();
- }
-
- /* DMA CD Selection */
- if (ppc440ep_core_selection[DMA_CHANNEL_CD] == CORE_SELECTED)
- {
- update_dma_c_d_ios();
- dma_c_d_selection_in_fpga();
- }
-
- /* EBC Master Selection */
- if (ppc440ep_core_selection[EBC_MASTER] == CORE_SELECTED)
- {
- sdr0_pfc1 = (sdr0_pfc1 & ~SDR0_PFC1_ERE_MASK) | SDR0_PFC1_ERE_EXTR_SEL;
- sdr0_pfc1 = (sdr0_pfc1 & ~SDR0_PFC1_UES_MASK) | SDR0_PFC1_UES_EBCHR_SEL;
- update_ebc_master_ios();
- }
-
- /* PCI Patch Enable */
- if (ppc440ep_core_selection[PCI_PATCH] == CORE_SELECTED)
- {
- sdr0_pfc1 = (sdr0_pfc1 & ~SDR0_PFC1_UES_MASK) | SDR0_PFC1_UES_EBCHR_SEL;
- update_pci_patch_ios();
- }
-
- /* USB2 Host Selection - Not Implemented in PowerPC 440EP Pass1 */
- if (ppc440ep_core_selection[USB2_HOST] == CORE_SELECTED)
- {
- /* Not Implemented in PowerPC 440EP Pass1-Pass2 */
- printf("Invalid configuration => USB2 Host selected\n");
- for (;;)
- ;
- /*usb2_host_selection_in_fpga(); */
- }
-
- /* USB2.0 Device Selection */
- if (ppc440ep_core_selection[USB2_DEVICE] == CORE_SELECTED)
- {
- update_usb2_device_ios();
- sdr0_pfc1 = (sdr0_pfc1 & ~SDR0_PFC1_UES_MASK) | SDR0_PFC1_UES_USB2D_SEL;
- sdr0_pfc1 = (sdr0_pfc1 & ~SDR0_PFC1_UPR_MASK) | SDR0_PFC1_UPR_DISABLE;
-
- mfsdr(sdr_usb0, sdr0_usb0);
- sdr0_usb0 = sdr0_usb0 &~SDR0_USB0_USB_DEVSEL_MASK;
- sdr0_usb0 = sdr0_usb0 | SDR0_USB0_USB20D_DEVSEL;
- mtsdr(sdr_usb0, sdr0_usb0);
-
- usb2_device_selection_in_fpga();
- }
-
- /* USB1.1 Device Selection */
- if (ppc440ep_core_selection[USB1_DEVICE] == CORE_SELECTED)
- {
- mfsdr(sdr_usb0, sdr0_usb0);
- sdr0_usb0 = sdr0_usb0 &~SDR0_USB0_USB_DEVSEL_MASK;
- sdr0_usb0 = sdr0_usb0 | SDR0_USB0_USB11D_DEVSEL;
- mtsdr(sdr_usb0, sdr0_usb0);
- }
-
- /* USB1.1 Host Selection */
- if (ppc440ep_core_selection[USB1_HOST] == CORE_SELECTED)
- {
- mfsdr(sdr_usb0, sdr0_usb0);
- sdr0_usb0 = sdr0_usb0 &~SDR0_USB0_LEEN_MASK;
- sdr0_usb0 = sdr0_usb0 | SDR0_USB0_LEEN_ENABLE;
- mtsdr(sdr_usb0, sdr0_usb0);
- }
-
- /* NAND Flash Selection */
- if (ppc440ep_core_selection[NAND_FLASH] == CORE_SELECTED)
- {
- update_ndfc_ios();
-
- mtsdr(sdr_cust0, SDR0_CUST0_MUX_NDFC_SEL |
- SDR0_CUST0_NDFC_ENABLE |
- SDR0_CUST0_NDFC_BW_8_BIT |
- SDR0_CUST0_NDFC_ARE_MASK |
- SDR0_CUST0_CHIPSELGAT_EN1 |
- SDR0_CUST0_CHIPSELGAT_EN2);
-
- ndfc_selection_in_fpga();
- }
- else
- {
- /* Set Mux on EMAC */
- mtsdr(sdr_cust0, SDR0_CUST0_MUX_EMAC_SEL);
- }
-
- /* MII Selection */
- if (ppc440ep_core_selection[MII_SEL] == CORE_SELECTED)
- {
- update_zii_ios();
- mfsdr(sdr_mfr, sdr0_mfr);
- sdr0_mfr = (sdr0_mfr & ~SDR0_MFR_ZMII_MODE_MASK) | SDR0_MFR_ZMII_MODE_MII;
- mtsdr(sdr_mfr, sdr0_mfr);
-
- set_phy_configuration_through_fpga(ZMII_CONFIGURATION_IS_MII);
- }
-
- /* RMII Selection */
- if (ppc440ep_core_selection[RMII_SEL] == CORE_SELECTED)
- {
- update_zii_ios();
- mfsdr(sdr_mfr, sdr0_mfr);
- sdr0_mfr = (sdr0_mfr & ~SDR0_MFR_ZMII_MODE_MASK) | SDR0_MFR_ZMII_MODE_RMII_10M;
- mtsdr(sdr_mfr, sdr0_mfr);
-
- set_phy_configuration_through_fpga(ZMII_CONFIGURATION_IS_RMII);
- }
-
- /* SMII Selection */
- if (ppc440ep_core_selection[SMII_SEL] == CORE_SELECTED)
- {
- update_zii_ios();
- mfsdr(sdr_mfr, sdr0_mfr);
- sdr0_mfr = (sdr0_mfr & ~SDR0_MFR_ZMII_MODE_MASK) | SDR0_MFR_ZMII_MODE_SMII;
- mtsdr(sdr_mfr, sdr0_mfr);
-
- set_phy_configuration_through_fpga(ZMII_CONFIGURATION_IS_SMII);
- }
-
- /* UART Selection */
- uart_configuration = get_uart_configuration();
- switch (uart_configuration)
- {
- case L1: /* L1 Selection */
- /* UART0 8 pins Only */
- /*sdr0_pfc1 = (sdr0_pfc1 & ~SDR0_PFC1_U0ME_MASK) | SDR0_PFC1_U0ME_DSR_DTR; */
- sdr0_pfc1 = (sdr0_pfc1 & ~SDR0_PFC1_U0ME_MASK) |SDR0_PFC1_U0ME_CTS_RTS; /* Chip Pb */
- sdr0_pfc1 = (sdr0_pfc1 & ~SDR0_PFC1_U0IM_MASK) | SDR0_PFC1_U0IM_8PINS;
- break;
- case L2: /* L2 Selection */
- /* UART0 and UART1 4 pins */
- sdr0_pfc1 = (sdr0_pfc1 & ~SDR0_PFC1_U0ME_MASK) | SDR0_PFC1_U1ME_DSR_DTR;
- sdr0_pfc1 = (sdr0_pfc1 & ~SDR0_PFC1_U0IM_MASK) | SDR0_PFC1_U0IM_4PINS;
- sdr0_pfc1 = (sdr0_pfc1 & ~SDR0_PFC1_U1ME_MASK) | SDR0_PFC1_U1ME_DSR_DTR;
- break;
- case L3: /* L3 Selection */
- /* UART0 4 pins, UART1 and UART2 2 pins */
- sdr0_pfc1 = (sdr0_pfc1 & ~SDR0_PFC1_U0ME_MASK) | SDR0_PFC1_U1ME_DSR_DTR;
- sdr0_pfc1 = (sdr0_pfc1 & ~SDR0_PFC1_U0IM_MASK) | SDR0_PFC1_U0IM_4PINS;
- sdr0_pfc1 = (sdr0_pfc1 & ~SDR0_PFC1_U1ME_MASK) | SDR0_PFC1_U1ME_DSR_DTR;
- break;
- case L4: /* L4 Selection */
- /* UART0, UART1, UART2 and UART3 2 pins */
- sdr0_pfc1 = (sdr0_pfc1 & ~SDR0_PFC1_U0ME_MASK) | SDR0_PFC1_U0ME_DSR_DTR;
- sdr0_pfc1 = (sdr0_pfc1 & ~SDR0_PFC1_U0IM_MASK) | SDR0_PFC1_U0IM_4PINS;
- sdr0_pfc1 = (sdr0_pfc1 & ~SDR0_PFC1_U1ME_MASK) | SDR0_PFC1_U1ME_DSR_DTR;
- break;
- }
- update_uart_ios(uart_configuration);
-
- /* UART Selection in all cases */
- uart_selection_in_fpga(uart_configuration);
-
- /* Packet Reject Function Available */
- if (ppc440ep_core_selection[PACKET_REJ_FUNC_AVAIL] == CORE_SELECTED)
- {
- /* Set UPR Bit in SDR0_PFC1 Register */
- sdr0_pfc1 = (sdr0_pfc1 & ~SDR0_PFC1_UPR_MASK) | SDR0_PFC1_UPR_ENABLE;
- }
-
- /* Packet Reject Function Enable */
- if (ppc440ep_core_selection[PACKET_REJ_FUNC_EN] == CORE_SELECTED)
- {
- mfsdr(sdr_mfr, sdr0_mfr);
- sdr0_mfr = (sdr0_mfr & ~SDR0_MFR_PKT_REJ_MASK) | SDR0_MFR_PKT_REJ_EN;;
- mtsdr(sdr_mfr, sdr0_mfr);
- }
-
- /* Perform effective access to hardware */
- mtsdr(sdr_pfc1, sdr0_pfc1);
- set_chip_gpio_configuration(GPIO0);
- set_chip_gpio_configuration(GPIO1);
-
- /* USB2.0 Device Reset must be done after GPIO setting */
- if (ppc440ep_core_selection[USB2_DEVICE] == CORE_SELECTED)
- usb2_device_reset_through_fpga();
-
-}
diff --git a/board/amcc/bamboo/bamboo.h b/board/amcc/bamboo/bamboo.h
deleted file mode 100644
index 5f5fcde825..0000000000
--- a/board/amcc/bamboo/bamboo.h
+++ /dev/null
@@ -1,401 +0,0 @@
-/*
- * (C) Copyright 2005
- * Stefan Roese, DENX Software Engineering, sr@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*----------------------------------------------------------------------------+
- | FPGA registers and bit definitions
- +----------------------------------------------------------------------------*/
-/*
- * PowerPC 440EP Board FPGA is reached with physical address 0x80001FF0.
- * TLB initialization makes it correspond to logical address 0x80001FF0.
- * => Done init_chip.s in bootlib
- */
-#define FPGA_BASE_ADDR 0x80002000
-
-/*----------------------------------------------------------------------------+
- | Board Jumpers Setting Register
- | Board Settings provided by jumpers
- +----------------------------------------------------------------------------*/
-#define FPGA_SETTING_REG (FPGA_BASE_ADDR+0x3)
-/* Boot from small flash */
-#define FPGA_SET_REG_BOOT_SMALL_FLASH 0x80
-/* Operational Flash versus SRAM position in Memory Map */
-#define FPGA_SET_REG_OP_CODE_SRAM_SEL_MASK 0x40
-#define FPGA_SET_REG_OP_CODE_FLASH_ABOVE 0x40
-#define FPGA_SET_REG_SRAM_ABOVE 0x00
-/* Boot From NAND Flash */
-#define FPGA_SET_REG_BOOT_NAND_FLASH_MASK 0x40
-#define FPGA_SET_REG_BOOT_NAND_FLASH_SELECT 0x00
-/* On Board PCI Arbiter Select */
-#define FPGA_SET_REG_PCI_EXT_ARBITER_SEL_MASK 0x10
-#define FPGA_SET_REG_PCI_EXT_ARBITER_SEL 0x00
-
-/*----------------------------------------------------------------------------+
- | Functions Selection Register 1
- +----------------------------------------------------------------------------*/
-#define FPGA_SELECTION_1_REG (FPGA_BASE_ADDR+0x4)
-#define FPGA_SEL_1_REG_PHY_MASK 0xE0
-#define FPGA_SEL_1_REG_MII 0x80
-#define FPGA_SEL_1_REG_RMII 0x40
-#define FPGA_SEL_1_REG_SMII 0x20
-#define FPGA_SEL_1_REG_USB2_DEV_SEL 0x10 /* USB2 Device Selection */
-#define FPGA_SEL_1_REG_USB2_HOST_SEL 0x08 /* USB2 Host Selection */
-#define FPGA_SEL_1_REG_NF_SELEC_MASK 0x07 /* NF Selection Mask */
-#define FPGA_SEL_1_REG_NF0_SEL_BY_NFCS1 0x04 /* NF0 Selected by NF_CS1 */
-#define FPGA_SEL_1_REG_NF1_SEL_BY_NFCS2 0x02 /* NF1 Selected by NF_CS2 */
-#define FPGA_SEL_1_REG_NF1_SEL_BY_NFCS3 0x01 /* NF1 Selected by NF_CS3 */
-
-/*----------------------------------------------------------------------------+
- | Functions Selection Register 2
- +----------------------------------------------------------------------------*/
-#define FPGA_SELECTION_2_REG (FPGA_BASE_ADDR+0x5)
-#define FPGA_SEL2_REG_IIC1_SCP_SEL_MASK 0x80 /* IIC1 / SCP Selection */
-#define FPGA_SEL2_REG_SEL_FRAM 0x80 /* FRAM on IIC1 bus selected - SCP Select */
-#define FPGA_SEL2_REG_SEL_SCP 0x80 /* Identical to SCP Selection */
-#define FPGA_SEL2_REG_SEL_IIC1 0x00 /* IIC1 Selection - Default Value */
-#define FPGA_SEL2_REG_SEL_DMA_A_B 0x40 /* DMA A & B channels selected */
-#define FPGA_SEL2_REG_SEL_DMA_C_D 0x20 /* DMA C & D channels selected */
-#define FPGA_SEL2_REG_DMA_EOT_TC_3_SEL 0x10 /* 0 = EOT - input to 440EP */
- /* 1 = TC - output from 440EP */
-#define FPGA_SEL2_REG_DMA_EOT_TC_2_SEL 0x08 /* 0 = EOT (input to 440EP) */
- /* 1 = TC (output from 440EP) */
-#define FPGA_SEL2_REG_SEL_GPIO_1 0x04 /* EBC_GPIO & USB2_GPIO selected */
-#define FPGA_SEL2_REG_SEL_GPIO_2 0x02 /* Ether._GPIO & UART_GPIO selected */
-#define FPGA_SEL2_REG_SEL_GPIO_3 0x01 /* DMA_GPIO & Trace_GPIO selected */
-
-/*----------------------------------------------------------------------------+
- | Functions Selection Register 3
- +----------------------------------------------------------------------------*/
-#define FPGA_SELECTION_3_REG (FPGA_BASE_ADDR+0x6)
-#define FPGA_SEL3_REG_EXP_SLOT_EN 0x80 /* Expansion Slot enabled */
-#define FPGA_SEL3_REG_SEL_UART_CONFIG_MASK 0x70
-#define FPGA_SEL3_REG_SEL_UART_CONFIG1 0x40 /* one 8_pin UART */
-#define FPGA_SEL3_REG_SEL_UART_CONFIG2 0x20 /* two 4_pin UARTs */
-#define FPGA_SEL3_REG_SEL_UART_CONFIG3 0x10 /* one 4_pin & two 2_pin UARTs */
-#define FPGA_SEL3_REG_SEL_UART_CONFIG4 0x08 /* four 2_pin UARTs */
-#define FPGA_SEL3_REG_DTR_DSR_MODE_4_PIN_UART 0x00 /* DTR/DSR mode for 4_pin_UART */
-#define FPGA_SEL3_REG_RTS_CTS_MODE_4_PIN_UART 0x04 /* RTS/CTS mode for 4_pin_UART */
-
-/*----------------------------------------------------------------------------+
- | Soft Reset Register
- +----------------------------------------------------------------------------*/
-#define FPGA_RESET_REG (FPGA_BASE_ADDR+0x7)
-#define FPGA_RESET_REG_RESET_USB20_DEV 0x80 /* Hard Reset of the GT3200 */
-#define FPGA_RESET_REG_RESET_DISPLAY 0x40 /* Hard Reset on Display Device */
-#define FPGA_RESET_REG_STATUS_LED_0 0x08 /* 1 = Led On */
-#define FPGA_RESET_REG_STATUS_LED_1 0x04 /* 1 = Led On */
-#define FPGA_RESET_REG_STATUS_LED_2 0x02 /* 1 = Led On */
-#define FPGA_RESET_REG_STATUS_LED_3 0x01 /* 1 = Led On */
-
-
-/*----------------------------------------------------------------------------+
-| SDR Configuration registers
-+----------------------------------------------------------------------------*/
-/* Serial Device Strap Reg 0 */
-#define SDR0_SDSTP0 0x0020
-/* Serial Device Strap Reg 1 */
-#define SDR0_SDSTP1 0x0021
-/* Serial Device Strap Reg 2 */
-#define SDR0_SDSTP2 SDR0_STRP2
-/* Serial Device Strap Reg 3 */
-#define SDR0_SDSTP3 SDR0_STRP3
-
-#define sdr_pstrp0 0x0040
-
-#define SDR0_SDSTP1_EBC_ROM_BS_MASK 0x00006000 /* EBC Boot Size Mask */
-#define SDR0_SDSTP1_EBC_ROM_BS_32BIT 0x00004000 /* EBC 32 bits */
-#define SDR0_SDSTP1_EBC_ROM_BS_16BIT 0x00002000 /* EBC 16 Bits */
-#define SDR0_SDSTP1_EBC_ROM_BS_8BIT 0x00000000 /* EBC 8 Bits */
-
-#define SDR0_SDSTP1_BOOT_SEL_MASK 0x00001800 /* Boot device Selection Mask */
-#define SDR0_SDSTP1_BOOT_SEL_EBC 0x00000000 /* EBC */
-#define SDR0_SDSTP1_BOOT_SEL_PCI 0x00000800 /* PCI */
-#define SDR0_SDSTP1_BOOT_SEL_NDFC 0x00001000 /* NDFC */
-
-/* Serial Device Enabled - Addr = 0xA8 */
-#define SDR0_PSTRP0_BOOTSTRAP_IIC_A8_EN SDR0_PSTRP0_BOOTSTRAP_SETTINGS5
-/* Serial Device Enabled - Addr = 0xA4 */
-#define SDR0_PSTRP0_BOOTSTRAP_IIC_A4_EN SDR0_PSTRP0_BOOTSTRAP_SETTINGS7
-
-/* Pin Straps Reg */
-#define SDR0_PSTRP0 0x0040
-#define SDR0_PSTRP0_BOOTSTRAP_MASK 0xE0000000 /* Strap Bits */
-
-#define SDR0_PSTRP0_BOOTSTRAP_SETTINGS0 0x00000000 /* Default strap settings 0 */
-#define SDR0_PSTRP0_BOOTSTRAP_SETTINGS1 0x20000000 /* Default strap settings 1 */
-#define SDR0_PSTRP0_BOOTSTRAP_SETTINGS2 0x40000000 /* Default strap settings 2 */
-#define SDR0_PSTRP0_BOOTSTRAP_SETTINGS3 0x60000000 /* Default strap settings 3 */
-#define SDR0_PSTRP0_BOOTSTRAP_SETTINGS4 0x80000000 /* Default strap settings 4 */
-#define SDR0_PSTRP0_BOOTSTRAP_SETTINGS5 0xA0000000 /* Default strap settings 5 */
-#define SDR0_PSTRP0_BOOTSTRAP_SETTINGS6 0xC0000000 /* Default strap settings 6 */
-#define SDR0_PSTRP0_BOOTSTRAP_SETTINGS7 0xE0000000 /* Default strap settings 7 */
-
-/*----------------------------------------------------------------------------+
-| EBC Configuration Register - EBC0_CFG
-+----------------------------------------------------------------------------*/
-/* External Bus Three-State Control */
-#define EBC0_CFG_EBTC_DRIVEN 0x80000000
-/* Device-Paced Time-out Disable */
-#define EBC0_CFG_PTD_ENABLED 0x00000000
-/* Ready Timeout Count */
-#define EBC0_CFG_RTC_MASK 0x38000000
-#define EBC0_CFG_RTC_16PERCLK 0x00000000
-#define EBC0_CFG_RTC_32PERCLK 0x08000000
-#define EBC0_CFG_RTC_64PERCLK 0x10000000
-#define EBC0_CFG_RTC_128PERCLK 0x18000000
-#define EBC0_CFG_RTC_256PERCLK 0x20000000
-#define EBC0_CFG_RTC_512PERCLK 0x28000000
-#define EBC0_CFG_RTC_1024PERCLK 0x30000000
-#define EBC0_CFG_RTC_2048PERCLK 0x38000000
-/* External Master Priority Low */
-#define EBC0_CFG_EMPL_LOW 0x00000000
-#define EBC0_CFG_EMPL_MEDIUM_LOW 0x02000000
-#define EBC0_CFG_EMPL_MEDIUM_HIGH 0x04000000
-#define EBC0_CFG_EMPL_HIGH 0x06000000
-/* External Master Priority High */
-#define EBC0_CFG_EMPH_LOW 0x00000000
-#define EBC0_CFG_EMPH_MEDIUM_LOW 0x00800000
-#define EBC0_CFG_EMPH_MEDIUM_HIGH 0x01000000
-#define EBC0_CFG_EMPH_HIGH 0x01800000
-/* Chip Select Three-State Control */
-#define EBC0_CFG_CSTC_DRIVEN 0x00400000
-/* Burst Prefetch */
-#define EBC0_CFG_BPF_ONEDW 0x00000000
-#define EBC0_CFG_BPF_TWODW 0x00100000
-#define EBC0_CFG_BPF_FOURDW 0x00200000
-/* External Master Size */
-#define EBC0_CFG_EMS_8BIT 0x00000000
-/* Power Management Enable */
-#define EBC0_CFG_PME_DISABLED 0x00000000
-#define EBC0_CFG_PME_ENABLED 0x00020000
-/* Power Management Timer */
-#define EBC0_CFG_PMT_ENCODE(n) ((((unsigned long)(n))&0x1F)<<12)
-
-/*----------------------------------------------------------------------------+
-| Peripheral Bank Configuration Register - EBC0_BnCR
-+----------------------------------------------------------------------------*/
-/* BAS - Base Address Select */
-#define EBC0_BNCR_BAS_ENCODE(n) ((((unsigned long)(n))&0xFFF00000)<<0)
-/* BS - Bank Size */
-#define EBC0_BNCR_BS_MASK 0x000E0000
-#define EBC0_BNCR_BS_1MB 0x00000000
-#define EBC0_BNCR_BS_2MB 0x00020000
-#define EBC0_BNCR_BS_4MB 0x00040000
-#define EBC0_BNCR_BS_8MB 0x00060000
-#define EBC0_BNCR_BS_16MB 0x00080000
-#define EBC0_BNCR_BS_32MB 0x000A0000
-#define EBC0_BNCR_BS_64MB 0x000C0000
-#define EBC0_BNCR_BS_128MB 0x000E0000
-/* BU - Bank Usage */
-#define EBC0_BNCR_BU_MASK 0x00018000
-#define EBC0_BNCR_BU_RO 0x00008000
-#define EBC0_BNCR_BU_WO 0x00010000
-#define EBC0_BNCR_BU_RW 0x00018000
-/* BW - Bus Width */
-#define EBC0_BNCR_BW_MASK 0x00006000
-#define EBC0_BNCR_BW_8BIT 0x00000000
-#define EBC0_BNCR_BW_16BIT 0x00002000
-#define EBC0_BNCR_BW_32BIT 0x00004000
-
-/*----------------------------------------------------------------------------+
-| Peripheral Bank Access Parameters - EBC0_BnAP
-+----------------------------------------------------------------------------*/
-/* Burst Mode Enable */
-#define EBC0_BNAP_BME_ENABLED 0x80000000
-#define EBC0_BNAP_BME_DISABLED 0x00000000
-/* Transfert Wait */
-#define EBC0_BNAP_TWT_ENCODE(n) ((((unsigned long)(n))&0xFF)<<23) /* Bits 1:8 */
-/* Chip Select On Timing */
-#define EBC0_BNAP_CSN_ENCODE(n) ((((unsigned long)(n))&0x3)<<18) /* Bits 12:13 */
-/* Output Enable On Timing */
-#define EBC0_BNAP_OEN_ENCODE(n) ((((unsigned long)(n))&0x3)<<16) /* Bits 14:15 */
-/* Write Back Enable On Timing */
-#define EBC0_BNAP_WBN_ENCODE(n) ((((unsigned long)(n))&0x3)<<14) /* Bits 16:17 */
-/* Write Back Enable Off Timing */
-#define EBC0_BNAP_WBF_ENCODE(n) ((((unsigned long)(n))&0x3)<<12) /* Bits 18:19 */
-/* Transfert Hold */
-#define EBC0_BNAP_TH_ENCODE(n) ((((unsigned long)(n))&0x7)<<9) /* Bits 20:22 */
-/* PerReady Enable */
-#define EBC0_BNAP_RE_ENABLED 0x00000100
-#define EBC0_BNAP_RE_DISABLED 0x00000000
-/* Sample On Ready */
-#define EBC0_BNAP_SOR_DELAYED 0x00000000
-#define EBC0_BNAP_SOR_NOT_DELAYED 0x00000080
-/* Byte Enable Mode */
-#define EBC0_BNAP_BEM_WRITEONLY 0x00000000
-#define EBC0_BNAP_BEM_RW 0x00000040
-/* Parity Enable */
-#define EBC0_BNAP_PEN_DISABLED 0x00000000
-#define EBC0_BNAP_PEN_ENABLED 0x00000020
-
-/*----------------------------------------------------------------------------+
-| Define Boot devices
-+----------------------------------------------------------------------------*/
-/* */
-#define BOOT_FROM_SMALL_FLASH 0x00
-#define BOOT_FROM_LARGE_FLASH_OR_SRAM 0x01
-#define BOOT_FROM_NAND_FLASH0 0x02
-#define BOOT_FROM_PCI 0x03
-#define BOOT_DEVICE_UNKNOWN 0x04
-
-
-#define PVR_POWERPC_440EP_PASS1 0x42221850
-#define PVR_POWERPC_440EP_PASS2 0x422218D3
-
-#define TRUE 1
-#define FALSE 0
-
-#define GPIO_GROUP_MAX 2
-#define GPIO_MAX 32
-#define GPIO_ALT1_SEL 0x40000000 /* GPIO_OUT value put in GPIO_TSx for the GPIO nb 0 */
-#define GPIO_ALT2_SEL 0x80000000 /* GPIO_OUT value put in GPIO_TSx for the GPIO nb 1 */
-#define GPIO_ALT3_SEL 0xC0000000 /* GPIO_OUT value put in GPIO_TSx for the GPIO nb 2 */
-#define GPIO_MASK 0xC0000000 /* GPIO_MASK */
-#define GPIO_IN_SEL 0x40000000 /* GPIO_IN value put in GPIO_ISx for the GPIO nb 0 */
- /* For the other GPIO number, you must shift */
-
-#define GPIO0 0
-#define GPIO1 1
-
-
-/*#define MAX_SELECTION_NB CORE_NB */
-#define MAX_CORE_SELECT_NB 22
-
-/*----------------------------------------------------------------------------+
- | PPC440EP GPIOs addresses.
- +----------------------------------------------------------------------------*/
-#define GPIO0_BASE 0xEF600B00
-#define GPIO0_REAL 0xEF600B00
-
-#define GPIO1_BASE 0xEF600C00
-#define GPIO1_REAL 0xEF600C00
-
-/* Offsets */
-#define GPIOx_OR 0x00 /* GPIO Output Register */
-#define GPIOx_TCR 0x04 /* GPIO Three-State Control Register */
-#define GPIOx_OSL 0x08 /* GPIO Output Select Register (Bits 0-31) */
-#define GPIOx_OSH 0x0C /* GPIO Ouput Select Register (Bits 32-63) */
-#define GPIOx_TSL 0x10 /* GPIO Three-State Select Register (Bits 0-31) */
-#define GPIOx_TSH 0x14 /* GPIO Three-State Select Register (Bits 32-63) */
-#define GPIOx_ODR 0x18 /* GPIO Open drain Register */
-#define GPIOx_IR 0x1C /* GPIO Input Register */
-#define GPIOx_RR1 0x20 /* GPIO Receive Register 1 */
-#define GPIOx_RR2 0x24 /* GPIO Receive Register 2 */
-#define GPIOx_RR3 0x28 /* GPIO Receive Register 3 */
-#define GPIOx_IS1L 0x30 /* GPIO Input Select Register 1 (Bits 0-31) */
-#define GPIOx_IS1H 0x34 /* GPIO Input Select Register 1 (Bits 32-63) */
-#define GPIOx_IS2L 0x38 /* GPIO Input Select Register 2 (Bits 0-31) */
-#define GPIOx_IS2H 0x3C /* GPIO Input Select Register 2 (Bits 32-63) */
-#define GPIOx_IS3L 0x40 /* GPIO Input Select Register 3 (Bits 0-31) */
-#define GPIOx_IS3H 0x44 /* GPIO Input Select Register 3 (Bits 32-63) */
-
-/* GPIO0 */
-#define GPIO0_IS1L (GPIO0_BASE+GPIOx_IS1L)
-#define GPIO0_IS1H (GPIO0_BASE+GPIOx_IS1H)
-#define GPIO0_IS2L (GPIO0_BASE+GPIOx_IS2L)
-#define GPIO0_IS2H (GPIO0_BASE+GPIOx_IS2H)
-#define GPIO0_IS3L (GPIO0_BASE+GPIOx_IS3L)
-#define GPIO0_IS3H (GPIO0_BASE+GPIOx_IS3L)
-
-/* GPIO1 */
-#define GPIO1_IS1L (GPIO1_BASE+GPIOx_IS1L)
-#define GPIO1_IS1H (GPIO1_BASE+GPIOx_IS1H)
-#define GPIO1_IS2L (GPIO1_BASE+GPIOx_IS2L)
-#define GPIO1_IS2H (GPIO1_BASE+GPIOx_IS2H)
-#define GPIO1_IS3L (GPIO1_BASE+GPIOx_IS3L)
-#define GPIO1_IS3H (GPIO1_BASE+GPIOx_IS3L)
-
-#define GPIO_OS(x) (x+GPIOx_OSL) /* GPIO Output Register High or Low */
-#define GPIO_TS(x) (x+GPIOx_TSL) /* GPIO Three-state Control Reg High or Low */
-#define GPIO_IS1(x) (x+GPIOx_IS1L) /* GPIO Input register1 High or Low */
-#define GPIO_IS2(x) (x+GPIOx_IS2L) /* GPIO Input register2 High or Low */
-#define GPIO_IS3(x) (x+GPIOx_IS3L) /* GPIO Input register3 High or Low */
-
-
-/*----------------------------------------------------------------------------+
- | Declare Configuration values
- +----------------------------------------------------------------------------*/
-typedef enum gpio_select { GPIO_SEL, GPIO_ALT1, GPIO_ALT2, GPIO_ALT3 } gpio_select_t;
-typedef enum gpio_driver { GPIO_DIS, GPIO_IN, GPIO_OUT, GPIO_BI } gpio_driver_t;
-
-typedef struct { unsigned long add; /* gpio core base address */
- gpio_driver_t in_out; /* Driver Setting */
- gpio_select_t alt_nb; /* Selected Alternate */
-} gpio_param_s;
-
-/*----------------------------------------------------------------------------+
- | XX XX
- |
- | XXXXXX XXX XX XXX XXX
- | XX XX X XX XX XX
- | XX XX X XX XX XX
- | XX XX XX XX XX
- | XXXXXX XXX XXX XXXX XXXX
- +----------------------------------------------------------------------------*/
-/*----------------------------------------------------------------------------+
- | Defines
- +----------------------------------------------------------------------------*/
-typedef enum zmii_config { ZMII_CONFIGURATION_UNKNOWN,
- ZMII_CONFIGURATION_IS_MII,
- ZMII_CONFIGURATION_IS_RMII,
- ZMII_CONFIGURATION_IS_SMII
-} zmii_config_t;
-
-/*----------------------------------------------------------------------------+
- | Declare Configuration values
- +----------------------------------------------------------------------------*/
-typedef enum uart_config_nb { L1, L2, L3, L4 } uart_config_nb_t;
-typedef enum core_selection { CORE_NOT_SELECTED, CORE_SELECTED} core_selection_t;
-typedef enum config_list { IIC_CORE,
- SCP_CORE,
- DMA_CHANNEL_AB,
- UIC_4_9,
- USB2_HOST,
- DMA_CHANNEL_CD,
- USB2_DEVICE,
- PACKET_REJ_FUNC_AVAIL,
- USB1_DEVICE,
- EBC_MASTER,
- NAND_FLASH,
- UART_CORE0,
- UART_CORE1,
- UART_CORE2,
- UART_CORE3,
- MII_SEL,
- RMII_SEL,
- SMII_SEL,
- PACKET_REJ_FUNC_EN,
- UIC_0_3,
- USB1_HOST,
- PCI_PATCH,
- CORE_NB
-} core_list_t;
-
-typedef enum block3_value { B3_V1, B3_V2, B3_V3, B3_V4, B3_V5,
- B3_V6, B3_V7, B3_V8, B3_V9, B3_V10,
- B3_V11, B3_V12, B3_V13, B3_V14, B3_V15,
- B3_V16, B3_VALUE_UNKNOWN
-} block3_value_t;
-
-typedef enum config_validity { CONFIG_IS_VALID,
- CONFIG_IS_INVALID
-} config_validity_t;
diff --git a/board/amcc/bamboo/config.mk b/board/amcc/bamboo/config.mk
deleted file mode 100644
index 35cb65584a..0000000000
--- a/board/amcc/bamboo/config.mk
+++ /dev/null
@@ -1,34 +0,0 @@
-#
-# (C) Copyright 2002
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-TEXT_BASE = 0xFFF80000
-
-PLATFORM_CPPFLAGS += -DCONFIG_440=1
-
-ifeq ($(debug),1)
-PLATFORM_CPPFLAGS += -DDEBUG
-endif
-
-ifeq ($(dbcr),1)
-PLATFORM_CPPFLAGS += -DCFG_INIT_DBCR=0x8cff0000
-endif
diff --git a/board/amcc/bamboo/flash.c b/board/amcc/bamboo/flash.c
deleted file mode 100644
index a30ab7ada8..0000000000
--- a/board/amcc/bamboo/flash.c
+++ /dev/null
@@ -1,171 +0,0 @@
-/*
- * (C) Copyright 2004-2005
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2002 Jun Gu <jung@artesyncp.com>
- * Add support for Am29F016D and dynamic switch setting.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * Modified 4/5/2001
- * Wait for completion of each sector erase command issued
- * 4/5/2001
- * Chris Hallinan - DS4.COM, Inc. - clh@net1plus.com
- */
-
-#include <common.h>
-#include <ppc4xx.h>
-#include <asm/processor.h>
-#include <ppc440.h>
-#include "bamboo.h"
-
-#undef DEBUG
-
-#ifdef DEBUG
-#define DEBUGF(x...) printf(x)
-#else
-#define DEBUGF(x...)
-#endif /* DEBUG */
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/*
- * Mark big flash bank (16 bit instead of 8 bit access) in address with bit 0
- */
-static unsigned long flash_addr_table[][CFG_MAX_FLASH_BANKS] = {
- {0x87800001, 0xFFF00000, 0xFFF80000}, /* 0:boot from small flash */
- {0x00000000, 0x00000000, 0x00000000}, /* 1:boot from pci 66 */
- {0x00000000, 0x00000000, 0x00000000}, /* 2:boot from nand flash */
- {0x87F00000, 0x87F80000, 0xFFC00001}, /* 3:boot from big flash 33*/
- {0x87F00000, 0x87F80000, 0xFFC00001}, /* 4:boot from big flash 66*/
- {0x00000000, 0x00000000, 0x00000000}, /* 5:boot from */
- {0x00000000, 0x00000000, 0x00000000}, /* 6:boot from pci 66 */
- {0x00000000, 0x00000000, 0x00000000}, /* 7:boot from */
- {0x87C00001, 0xFFF00000, 0xFFF80000}, /* 0:boot from small flash */
-};
-
-/*
- * include common flash code (for amcc boards)
- */
-#include "../common/flash.c"
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size(vu_long * addr, flash_info_t * info);
-static int write_word(flash_info_t * info, ulong dest, ulong data);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init(void)
-{
- unsigned long total_b = 0;
- unsigned long size_b[CFG_MAX_FLASH_BANKS];
- unsigned short index = 0;
- int i;
- unsigned long val;
- unsigned long ebc_boot_size;
- unsigned long boot_selection;
-
- mfsdr(sdr_pstrp0, val);
- index = (val & SDR0_PSTRP0_BOOTSTRAP_MASK) >> 29;
-
- if ((index == 5) || (index == 7)) {
- /*
- * Boot Settings in IIC EEprom address 0xA8 or 0xA4
- * Read Serial Device Strap Register1 in PPC440EP
- */
- mfsdr(sdr_sdstp1, val);
- boot_selection = val & SDR0_SDSTP1_BOOT_SEL_MASK;
- ebc_boot_size = val & SDR0_SDSTP1_EBC_ROM_BS_MASK;
-
- switch(boot_selection) {
- case SDR0_SDSTP1_BOOT_SEL_EBC:
- switch(ebc_boot_size) {
- case SDR0_SDSTP1_EBC_ROM_BS_16BIT:
- index = 3;
- break;
- case SDR0_SDSTP1_EBC_ROM_BS_8BIT:
- index = 0;
- break;
- }
- break;
-
- case SDR0_SDSTP1_BOOT_SEL_PCI:
- index = 1;
- break;
-
- case SDR0_SDSTP1_BOOT_SEL_NDFC:
- index = 2;
- break;
- }
- } else if (index == 0) {
- if (in8(FPGA_SETTING_REG) & FPGA_SET_REG_OP_CODE_FLASH_ABOVE) {
- index = 8; /* sram below op code flash -> new index 8 */
- }
- }
-
- DEBUGF("\n");
- DEBUGF("FLASH: Index: %d\n", index);
-
- /* Init: no FLASHes known */
- for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- flash_info[i].sector_count = -1;
- flash_info[i].size = 0;
-
- /* check whether the address is 0 */
- if (flash_addr_table[index][i] == 0) {
- continue;
- }
-
- /* call flash_get_size() to initialize sector address */
- size_b[i] = flash_get_size((vu_long *) flash_addr_table[index][i],
- &flash_info[i]);
- flash_info[i].size = size_b[i];
- if (flash_info[i].flash_id == FLASH_UNKNOWN) {
- printf("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n",
- i, size_b[i], size_b[i] << 20);
- flash_info[i].sector_count = -1;
- flash_info[i].size = 0;
- }
-
- /* Monitor protection ON by default */
- (void)flash_protect(FLAG_PROTECT_SET, CFG_MONITOR_BASE,
- CFG_MONITOR_BASE + CFG_MONITOR_LEN - 1,
- &flash_info[i]);
-#if defined(CFG_ENV_IS_IN_FLASH)
- (void)flash_protect(FLAG_PROTECT_SET, CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1,
- &flash_info[i]);
-#if defined(CFG_ENV_IS_IN_FLASH) && defined(CFG_ENV_ADDR_REDUND)
- (void)flash_protect(FLAG_PROTECT_SET, CFG_ENV_ADDR_REDUND,
- CFG_ENV_ADDR_REDUND + CFG_ENV_SECT_SIZE - 1,
- &flash_info[i]);
-#endif
-#endif
-
- total_b += flash_info[i].size;
- }
-
- return total_b;
-}
diff --git a/board/amcc/bamboo/init.S b/board/amcc/bamboo/init.S
deleted file mode 100644
index 7820107aa5..0000000000
--- a/board/amcc/bamboo/init.S
+++ /dev/null
@@ -1,113 +0,0 @@
-/*
-*
-* See file CREDITS for list of people who contributed to this
-* project.
-*
-* This program is free software; you can redistribute it and/or
-* modify it under the terms of the GNU General Public License as
-* published by the Free Software Foundation; either version 2 of
-* the License, or (at your option) any later version.
-*
-* This program is distributed in the hope that it will be useful,
-* but WITHOUT ANY WARRANTY; without even the implied warranty of
-* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-* GNU General Public License for more details.
-*
-* You should have received a copy of the GNU General Public License
-* along with this program; if not, write to the Free Software
-* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-* MA 02111-1307 USA
-*/
-
-#include <ppc_asm.tmpl>
-#include <config.h>
-
-/* General */
-#define TLB_VALID 0x00000200
-
-/* Supported page sizes */
-
-#define SZ_1K 0x00000000
-#define SZ_4K 0x00000010
-#define SZ_16K 0x00000020
-#define SZ_64K 0x00000030
-#define SZ_256K 0x00000040
-#define SZ_1M 0x00000050
-#define SZ_8M 0x00000060
-#define SZ_16M 0x00000070
-#define SZ_256M 0x00000090
-
-/* Storage attributes */
-#define SA_W 0x00000800 /* Write-through */
-#define SA_I 0x00000400 /* Caching inhibited */
-#define SA_M 0x00000200 /* Memory coherence */
-#define SA_G 0x00000100 /* Guarded */
-#define SA_E 0x00000080 /* Endian */
-
-/* Access control */
-#define AC_X 0x00000024 /* Execute */
-#define AC_W 0x00000012 /* Write */
-#define AC_R 0x00000009 /* Read */
-
-/* Some handy macros */
-
-#define EPN(e) ((e) & 0xfffffc00)
-#define TLB0(epn,sz) ( (EPN((epn)) | (sz) | TLB_VALID ) )
-#define TLB1(rpn,erpn) ( ((rpn)&0xfffffc00) | (erpn) )
-#define TLB2(a) ( (a)&0x00000fbf )
-
-#define tlbtab_start\
- mflr r1 ;\
- bl 0f ;
-
-#define tlbtab_end\
- .long 0, 0, 0 ; \
-0: mflr r0 ; \
- mtlr r1 ; \
- blr ;
-
-#define tlbentry(epn,sz,rpn,erpn,attr)\
- .long TLB0(epn,sz),TLB1(rpn,erpn),TLB2(attr)
-
-
-/**************************************************************************
- * TLB TABLE
- *
- * This table is used by the cpu boot code to setup the initial tlb
- * entries. Rather than make broad assumptions in the cpu source tree,
- * this table lets each board set things up however they like.
- *
- * Pointer to the table is returned in r1
- *
- *************************************************************************/
-
- .section .bootpg,"ax"
- .globl tlbtab
-
-tlbtab:
- tlbtab_start
-
- /*
- * BOOT_CS (FLASH) must be first. Before relocation SA_I can be off to use the
- * speed up boot process. It is patched after relocation to enable SA_I
- */
- tlbentry( CFG_BOOT_BASE_ADDR, SZ_256M, CFG_BOOT_BASE_ADDR, 0, AC_R|AC_W|AC_X|SA_G/*|SA_I*/)
-
- /* TLB-entry for init-ram in dcache (SA_I must be turned off!) */
- tlbentry( CFG_INIT_RAM_ADDR, SZ_64K, CFG_INIT_RAM_ADDR, 0, AC_R|AC_W|AC_X|SA_G )
-
- tlbentry( CFG_SDRAM_BASE, SZ_256M, CFG_SDRAM_BASE, 0, AC_R|AC_W|AC_X|SA_G|SA_I )
- tlbentry( CFG_PCI_BASE, SZ_256M, CFG_PCI_BASE, 0, AC_R|AC_W|SA_G|SA_I )
- tlbentry( CFG_NVRAM_BASE_ADDR, SZ_256M, CFG_NVRAM_BASE_ADDR, 0, AC_R|AC_W|AC_X|SA_W|SA_I )
- tlbentry( CFG_NAND_ADDR, SZ_256M, CFG_NAND_ADDR, 0, AC_R|AC_W|AC_X|SA_W|SA_I )
-
- /* PCI */
- tlbentry( CFG_PCI_MEMBASE, SZ_256M, CFG_PCI_MEMBASE, 0, AC_R|AC_W|SA_G|SA_I )
- tlbentry( CFG_PCI_MEMBASE1, SZ_256M, CFG_PCI_MEMBASE1, 0, AC_R|AC_W|SA_G|SA_I )
- tlbentry( CFG_PCI_MEMBASE2, SZ_256M, CFG_PCI_MEMBASE2, 0, AC_R|AC_W|SA_G|SA_I )
- tlbentry( CFG_PCI_MEMBASE3, SZ_256M, CFG_PCI_MEMBASE3, 0, AC_R|AC_W|SA_G|SA_I )
-
- /* USB 2.0 Device */
- tlbentry( CFG_USB_DEVICE, SZ_1K, CFG_USB_DEVICE, 0, AC_R|AC_W|SA_G|SA_I )
-
- tlbtab_end
diff --git a/board/amcc/bamboo/u-boot.lds b/board/amcc/bamboo/u-boot.lds
deleted file mode 100644
index 176900ec2f..0000000000
--- a/board/amcc/bamboo/u-boot.lds
+++ /dev/null
@@ -1,160 +0,0 @@
-/*
- * (C) Copyright 2002
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- .resetvec 0xFFFFFFFC :
- {
- *(.resetvec)
- } = 0xffff
-
- .bootpg 0xFFFFF000 :
- {
- cpu/ppc4xx/start.o (.bootpg)
- } = 0xffff
-
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/ppc4xx/start.o (.text)
- board/amcc/bamboo/init.o (.text)
- cpu/ppc4xx/kgdb.o (.text)
- cpu/ppc4xx/traps.o (.text)
- cpu/ppc4xx/interrupts.o (.text)
- cpu/ppc4xx/serial.o (.text)
- cpu/ppc4xx/cpu_init.o (.text)
- cpu/ppc4xx/speed.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/extable.o (.text)
- lib_generic/zlib.o (.text)
-
-/* . = env_offset;*/
-/* common/environment.o(.text)*/
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
-
- ppcenv_assert = ASSERT(. < 0xFFFF8000, ".bss section too big, overlaps .ppcenv section. Please update your confguration: CFG_MONITOR_BASE, CFG_MONITOR_LEN and TEXT_BASE may need to be modified.");
-
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/amcc/bubinga/Makefile b/board/amcc/bubinga/Makefile
deleted file mode 100644
index f5bda5519a..0000000000
--- a/board/amcc/bubinga/Makefile
+++ /dev/null
@@ -1,46 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/amcc/bubinga/bubinga.c b/board/amcc/bubinga/bubinga.c
deleted file mode 100644
index fe6ce8a6d1..0000000000
--- a/board/amcc/bubinga/bubinga.c
+++ /dev/null
@@ -1,84 +0,0 @@
-/*
- * (C) Copyright 2000-2005
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-long int spd_sdram(void);
-
-#include <common.h>
-#include <asm/processor.h>
-
-int board_early_init_f(void)
-{
- mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
- mtdcr(uicer, 0x00000000); /* disable all ints */
- mtdcr(uiccr, 0x00000010);
- mtdcr(uicpr, 0xFFFF7FF0); /* set int polarities */
- mtdcr(uictr, 0x00000010); /* set int trigger levels */
- mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
-
- return 0;
-}
-
-/*
- * Check Board Identity:
- */
-int checkboard(void)
-{
- char *s = getenv("serial#");
-
- puts("Board: Bubinga - AMCC PPC405EP Evaluation Board");
-
- if (s != NULL) {
- puts(", serial# ");
- puts(s);
- }
- putc('\n');
-
- return (0);
-}
-
-/*
- * sdram_init - Dummy implementation for start.S, spd_sdram used on this board!
- */
-void sdram_init(void)
-{
- return;
-}
-
-/* -------------------------------------------------------------------------
- initdram(int board_type) reads EEPROM via I2c. EEPROM contains all of
- the necessary info for SDRAM controller configuration
- ------------------------------------------------------------------------- */
-long int initdram(int board_type)
-{
- long int ret;
-
- ret = spd_sdram();
- return ret;
-}
-
-int testdram(void)
-{
- /* TODO: XXX XXX XXX */
- printf("test: xxx MB - ok\n");
-
- return (0);
-}
diff --git a/board/amcc/bubinga/config.mk b/board/amcc/bubinga/config.mk
deleted file mode 100644
index 1bdf5e4fcf..0000000000
--- a/board/amcc/bubinga/config.mk
+++ /dev/null
@@ -1,24 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-TEXT_BASE = 0xFFFC0000
diff --git a/board/amcc/bubinga/flash.c b/board/amcc/bubinga/flash.c
deleted file mode 100644
index e4832ebf36..0000000000
--- a/board/amcc/bubinga/flash.c
+++ /dev/null
@@ -1,204 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * Modified 4/5/2001
- * Wait for completion of each sector erase command issued
- * 4/5/2001
- * Chris Hallinan - DS4.COM, Inc. - clh@net1plus.com
- */
-
-#include <common.h>
-#include <ppc4xx.h>
-#include <asm/processor.h>
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-#undef DEBUG
-#ifdef DEBUG
-#define DEBUGF(x...) printf(x)
-#else
-#define DEBUGF(x...)
-#endif /* DEBUG */
-
-/*
- * include common flash code (for amcc boards)
- */
-#include "../common/flash.c"
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size(vu_long * addr, flash_info_t * info);
-static void flash_get_offsets(ulong base, flash_info_t * info);
-
-unsigned long flash_init(void)
-{
- unsigned long size_b0, size_b1;
- int i;
- uint pbcr;
- unsigned long base_b0, base_b1;
-
- /* Init: no FLASHes known */
- for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* Static FLASH Bank configuration here - FIXME XXX */
-
- size_b0 =
- flash_get_size((vu_long *) FLASH_BASE0_PRELIM, &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size_b0, size_b0 << 20);
- }
-
- /* Only one bank */
- if (CFG_MAX_FLASH_BANKS == 1) {
- /* Setup offsets */
- flash_get_offsets(FLASH_BASE0_PRELIM, &flash_info[0]);
-
- /* Monitor protection ON by default */
- (void)flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE + CFG_MONITOR_LEN - 1,
- &flash_info[0]);
-#ifdef CFG_ENV_IS_IN_FLASH
- (void)flash_protect(FLAG_PROTECT_SET, CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1,
- &flash_info[0]);
- (void)flash_protect(FLAG_PROTECT_SET, CFG_ENV_ADDR_REDUND,
- CFG_ENV_ADDR_REDUND + CFG_ENV_SECT_SIZE - 1,
- &flash_info[0]);
-#endif
-
- size_b1 = 0;
- flash_info[0].size = size_b0;
- }
-
- /* 2 banks */
- else {
- size_b1 =
- flash_get_size((vu_long *) FLASH_BASE1_PRELIM,
- &flash_info[1]);
-
- /* Re-do sizing to get full correct info */
-
- if (size_b1) {
- mtdcr(ebccfga, pb0cr);
- pbcr = mfdcr(ebccfgd);
- mtdcr(ebccfga, pb0cr);
- base_b1 = -size_b1;
- pbcr = (pbcr & 0x0001ffff) | base_b1 |
- (((size_b1 / 1024 / 1024) - 1) << 17);
- mtdcr(ebccfgd, pbcr);
- /* printf("pb1cr = %x\n", pbcr); */
- }
-
- if (size_b0) {
- mtdcr(ebccfga, pb1cr);
- pbcr = mfdcr(ebccfgd);
- mtdcr(ebccfga, pb1cr);
- base_b0 = base_b1 - size_b0;
- pbcr = (pbcr & 0x0001ffff) | base_b0 |
- (((size_b0 / 1024 / 1024) - 1) << 17);
- mtdcr(ebccfgd, pbcr);
- /* printf("pb0cr = %x\n", pbcr); */
- }
-
- size_b0 = flash_get_size((vu_long *) base_b0, &flash_info[0]);
-
- flash_get_offsets(base_b0, &flash_info[0]);
-
- /* monitor protection ON by default */
- (void)flash_protect(FLAG_PROTECT_SET,
- base_b0 + size_b0 - CFG_MONITOR_LEN,
- base_b0 + size_b0 - 1, &flash_info[0]);
- /* Also protect sector containing initial power-up instruction */
- /* (flash_protect() checks address range - other call ignored) */
- (void)flash_protect(FLAG_PROTECT_SET,
- 0xFFFFFFFC, 0xFFFFFFFF, &flash_info[0]);
- (void)flash_protect(FLAG_PROTECT_SET,
- 0xFFFFFFFC, 0xFFFFFFFF, &flash_info[1]);
-
- if (size_b1) {
- /* Re-do sizing to get full correct info */
- size_b1 =
- flash_get_size((vu_long *) base_b1, &flash_info[1]);
-
- flash_get_offsets(base_b1, &flash_info[1]);
-
- /* monitor protection ON by default */
- (void)flash_protect(FLAG_PROTECT_SET,
- base_b1 + size_b1 - CFG_MONITOR_LEN,
- base_b1 + size_b1 - 1,
- &flash_info[1]);
- /* monitor protection OFF by default (one is enough) */
- (void)flash_protect(FLAG_PROTECT_CLEAR,
- base_b0 + size_b0 - CFG_MONITOR_LEN,
- base_b0 + size_b0 - 1,
- &flash_info[0]);
- } else {
- flash_info[1].flash_id = FLASH_UNKNOWN;
- flash_info[1].sector_count = -1;
- }
-
- flash_info[0].size = size_b0;
- flash_info[1].size = size_b1;
- } /* else 2 banks */
- return (size_b0 + size_b1);
-}
-
-static void flash_get_offsets(ulong base, flash_info_t * info)
-{
- int i;
-
- /* set up sector start address table */
- if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) ||
- (info->flash_id == FLASH_AM040)) {
- for (i = 0; i < info->sector_count; i++)
- info->start[i] = base + (i * 0x00010000);
- } else {
- if (info->flash_id & FLASH_BTYPE) {
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00004000;
- info->start[2] = base + 0x00006000;
- info->start[3] = base + 0x00008000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] =
- base + (i * 0x00010000) - 0x00030000;
- }
- } else {
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- info->start[i--] = base + info->size - 0x00004000;
- info->start[i--] = base + info->size - 0x00006000;
- info->start[i--] = base + info->size - 0x00008000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00010000;
- }
- }
- }
-}
diff --git a/board/amcc/bubinga/u-boot.lds b/board/amcc/bubinga/u-boot.lds
deleted file mode 100644
index be030923b8..0000000000
--- a/board/amcc/bubinga/u-boot.lds
+++ /dev/null
@@ -1,150 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- .resetvec 0xFFFFFFFC :
- {
- *(.resetvec)
- } = 0xffff
-
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/ppc4xx/start.o (.text)
- cpu/ppc4xx/kgdb.o (.text)
- cpu/ppc4xx/traps.o (.text)
- cpu/ppc4xx/interrupts.o (.text)
- cpu/ppc4xx/serial.o (.text)
- cpu/ppc4xx/cpu_init.o (.text)
- cpu/ppc4xx/speed.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/extable.o (.text)
- lib_generic/zlib.o (.text)
-
-/* . = env_offset;*/
-/* common/environment.o(.text)*/
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/amcc/common/flash.c b/board/amcc/common/flash.c
deleted file mode 100644
index 3a50b095ca..0000000000
--- a/board/amcc/common/flash.c
+++ /dev/null
@@ -1,917 +0,0 @@
-/*
- * (C) Copyright 2004-2005
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2002 Jun Gu <jung@artesyncp.com>
- * Add support for Am29F016D and dynamic switch setting.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * Modified 4/5/2001
- * Wait for completion of each sector erase command issued
- * 4/5/2001
- * Chris Hallinan - DS4.COM, Inc. - clh@net1plus.com
- */
-
-#include <common.h>
-#include <ppc4xx.h>
-#include <asm/processor.h>
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static int write_word(flash_info_t * info, ulong dest, ulong data);
-#ifdef CFG_FLASH_2ND_16BIT_DEV
-static int write_word_1(flash_info_t * info, ulong dest, ulong data);
-static int write_word_2(flash_info_t * info, ulong dest, ulong data);
-static int flash_erase_1(flash_info_t * info, int s_first, int s_last);
-static int flash_erase_2(flash_info_t * info, int s_first, int s_last);
-static ulong flash_get_size_1(vu_long * addr, flash_info_t * info);
-static ulong flash_get_size_2(vu_long * addr, flash_info_t * info);
-#endif
-
-void flash_print_info(flash_info_t * info)
-{
- int i;
- int k;
- int size;
- int erased;
- volatile unsigned long *flash;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD:
- printf("AMD ");
- break;
- case FLASH_MAN_STM:
- printf("STM ");
- break;
- case FLASH_MAN_FUJ:
- printf("FUJITSU ");
- break;
- case FLASH_MAN_SST:
- printf("SST ");
- break;
- default:
- printf("Unknown Vendor ");
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM040:
- printf("AM29F040 (512 Kbit, uniform sector size)\n");
- break;
- case FLASH_AM400B:
- printf("AM29LV400B (4 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM400T:
- printf("AM29LV400T (4 Mbit, top boot sector)\n");
- break;
- case FLASH_AM800B:
- printf("AM29LV800B (8 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM800T:
- printf("AM29LV800T (8 Mbit, top boot sector)\n");
- break;
- case FLASH_AMD016:
- printf("AM29F016D (16 Mbit, uniform sector size)\n");
- break;
- case FLASH_AM160B:
- printf("AM29LV160B (16 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM160T:
- printf("AM29LV160T (16 Mbit, top boot sector)\n");
- break;
- case FLASH_AM320B:
- printf("AM29LV320B (32 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM320T:
- printf("AM29LV320T (32 Mbit, top boot sector)\n");
- break;
- case FLASH_AM033C:
- printf("AM29LV033C (32 Mbit, top boot sector)\n");
- break;
- case FLASH_SST800A:
- printf("SST39LF/VF800 (8 Mbit, uniform sector size)\n");
- break;
- case FLASH_SST160A:
- printf("SST39LF/VF160 (16 Mbit, uniform sector size)\n");
- break;
- case FLASH_STMW320DT:
- printf ("M29W320DT (32 M, top sector)\n");
- break;
- default:
- printf("Unknown Chip Type\n");
- break;
- }
-
- printf(" Size: %ld KB in %d Sectors\n",
- info->size >> 10, info->sector_count);
-
- printf(" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; ++i) {
- /*
- * Check if whole sector is erased
- */
- if (i != (info->sector_count - 1))
- size = info->start[i + 1] - info->start[i];
- else
- size = info->start[0] + info->size - info->start[i];
- erased = 1;
- flash = (volatile unsigned long *)info->start[i];
- size = size >> 2; /* divide by 4 for longword access */
- for (k = 0; k < size; k++) {
- if (*flash++ != 0xffffffff) {
- erased = 0;
- break;
- }
- }
-
- if ((i % 5) == 0)
- printf("\n ");
- printf(" %08lX%s%s",
- info->start[i],
- erased ? " E" : " ", info->protect[i] ? "RO " : " ");
- }
- printf("\n");
- return;
-}
-
-
-/*
- * The following code cannot be run from FLASH!
- */
-#ifdef CFG_FLASH_2ND_16BIT_DEV
-static ulong flash_get_size(vu_long * addr, flash_info_t * info)
-{
- /* bit 0 used for big flash marking */
- if ((ulong)addr & 0x1) {
- return flash_get_size_2((vu_long *)((ulong)addr & 0xfffffffe), info);
- } else {
- return flash_get_size_1(addr, info);
- }
-}
-
-static ulong flash_get_size_1(vu_long * addr, flash_info_t * info)
-#else
-static ulong flash_get_size(vu_long * addr, flash_info_t * info)
-#endif
-{
- short i;
- CFG_FLASH_WORD_SIZE value;
- ulong base = (ulong) addr;
- volatile CFG_FLASH_WORD_SIZE *addr2 = (CFG_FLASH_WORD_SIZE *) addr;
-
- DEBUGF("FLASH ADDR: %08x\n", (unsigned)addr);
-
- /* Write auto select command: read Manufacturer ID */
- addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00AA00AA;
- addr2[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE) 0x00550055;
- addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00900090;
- udelay(1000);
-
- value = addr2[0];
- DEBUGF("FLASH MANUFACT: %x\n", value);
-
- switch (value) {
- case (CFG_FLASH_WORD_SIZE) AMD_MANUFACT:
- info->flash_id = FLASH_MAN_AMD;
- break;
- case (CFG_FLASH_WORD_SIZE) FUJ_MANUFACT:
- info->flash_id = FLASH_MAN_FUJ;
- break;
- case (CFG_FLASH_WORD_SIZE) SST_MANUFACT:
- info->flash_id = FLASH_MAN_SST;
- break;
- case (CFG_FLASH_WORD_SIZE) STM_MANUFACT:
- info->flash_id = FLASH_MAN_STM;
- break;
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- return (0); /* no or unknown flash */
- }
-
- value = addr2[1]; /* device ID */
- DEBUGF("\nFLASH DEVICEID: %x\n", value);
-
- switch (value) {
- case (CFG_FLASH_WORD_SIZE) AMD_ID_LV040B:
- info->flash_id += FLASH_AM040;
- info->sector_count = 8;
- info->size = 0x0080000; /* => 512 ko */
- break;
-
- case (CFG_FLASH_WORD_SIZE) AMD_ID_F040B:
- info->flash_id += FLASH_AM040;
- info->sector_count = 8;
- info->size = 0x0080000; /* => 512 ko */
- break;
-
- case (CFG_FLASH_WORD_SIZE) STM_ID_M29W040B:
- info->flash_id += FLASH_AM040;
- info->sector_count = 8;
- info->size = 0x0080000; /* => 512 ko */
- break;
-
- case (CFG_FLASH_WORD_SIZE) AMD_ID_F016D:
- info->flash_id += FLASH_AMD016;
- info->sector_count = 32;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case (CFG_FLASH_WORD_SIZE) AMD_ID_LV033C:
- info->flash_id += FLASH_AMDLV033C;
- info->sector_count = 64;
- info->size = 0x00400000;
- break; /* => 4 MB */
-
- case (CFG_FLASH_WORD_SIZE) AMD_ID_LV400T:
- info->flash_id += FLASH_AM400T;
- info->sector_count = 11;
- info->size = 0x00080000;
- break; /* => 0.5 MB */
-
- case (CFG_FLASH_WORD_SIZE) AMD_ID_LV400B:
- info->flash_id += FLASH_AM400B;
- info->sector_count = 11;
- info->size = 0x00080000;
- break; /* => 0.5 MB */
-
- case (CFG_FLASH_WORD_SIZE) AMD_ID_LV800T:
- info->flash_id += FLASH_AM800T;
- info->sector_count = 19;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case (CFG_FLASH_WORD_SIZE) AMD_ID_LV800B:
- info->flash_id += FLASH_AM800B;
- info->sector_count = 19;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case (CFG_FLASH_WORD_SIZE) AMD_ID_LV160T:
- info->flash_id += FLASH_AM160T;
- info->sector_count = 35;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case (CFG_FLASH_WORD_SIZE) AMD_ID_LV160B:
- info->flash_id += FLASH_AM160B;
- info->sector_count = 35;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- return (0); /* => no or unknown flash */
- }
-
- /* set up sector start address table */
- if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) ||
- ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM040) ||
- ((info->flash_id & FLASH_TYPEMASK) == FLASH_AMD016)) {
- for (i = 0; i < info->sector_count; i++)
- info->start[i] = base + (i * 0x00010000);
- } else {
- if (info->flash_id & FLASH_BTYPE) {
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00004000;
- info->start[2] = base + 0x00006000;
- info->start[3] = base + 0x00008000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] =
- base + (i * 0x00010000) - 0x00030000;
- }
- } else {
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- info->start[i--] = base + info->size - 0x00004000;
- info->start[i--] = base + info->size - 0x00006000;
- info->start[i--] = base + info->size - 0x00008000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00010000;
- }
- }
- }
-
- /* check for protected sectors */
- for (i = 0; i < info->sector_count; i++) {
- /* read sector protection at sector address, (A7 .. A0) = 0x02 */
- /* D0 = 1 if protected */
- addr2 = (volatile CFG_FLASH_WORD_SIZE *)(info->start[i]);
-
- /* For AMD29033C flash we need to resend the command of *
- * reading flash protection for upper 8 Mb of flash */
- if (i == 32) {
- addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0xAAAAAAAA;
- addr2[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE) 0x55555555;
- addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x90909090;
- }
-
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST)
- info->protect[i] = 0;
- else
- info->protect[i] = addr2[2] & 1;
- }
-
- /* issue bank reset to return to read mode */
- addr2[0] = (CFG_FLASH_WORD_SIZE) 0x00F000F0;
-
- return (info->size);
-}
-
-static int wait_for_DQ7_1(flash_info_t * info, int sect)
-{
- ulong start, now, last;
- volatile CFG_FLASH_WORD_SIZE *addr =
- (CFG_FLASH_WORD_SIZE *) (info->start[sect]);
-
- start = get_timer(0);
- last = start;
- while ((addr[0] & (CFG_FLASH_WORD_SIZE) 0x00800080) !=
- (CFG_FLASH_WORD_SIZE) 0x00800080) {
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf("Timeout\n");
- return -1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc('.');
- last = now;
- }
- }
- return 0;
-}
-
-#ifdef CFG_FLASH_2ND_16BIT_DEV
-int flash_erase(flash_info_t * info, int s_first, int s_last)
-{
- if (((info->flash_id & FLASH_TYPEMASK) == FLASH_AM320B) ||
- ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM320T) ||
- ((info->flash_id & FLASH_TYPEMASK) == FLASH_STMW320DT)) {
- return flash_erase_2(info, s_first, s_last);
- } else {
- return flash_erase_1(info, s_first, s_last);
- }
-}
-
-static int flash_erase_1(flash_info_t * info, int s_first, int s_last)
-#else
-int flash_erase(flash_info_t * info, int s_first, int s_last)
-#endif
-{
- volatile CFG_FLASH_WORD_SIZE *addr = (CFG_FLASH_WORD_SIZE *) (info->start[0]);
- volatile CFG_FLASH_WORD_SIZE *addr2;
- int flag, prot, sect, l_sect;
- int i;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf("- missing\n");
- } else {
- printf("- no sectors to erase\n");
- }
- return 1;
- }
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf("Can't erase unknown flash type - aborted\n");
- return 1;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf("\n");
- }
-
- l_sect = -1;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr2 = (CFG_FLASH_WORD_SIZE *) (info->start[sect]);
-
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) {
- addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00AA00AA;
- addr[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE) 0x00550055;
- addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00800080;
- addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00AA00AA;
- addr[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE) 0x00550055;
- addr2[0] = (CFG_FLASH_WORD_SIZE) 0x00500050; /* block erase */
- for (i = 0; i < 50; i++)
- udelay(1000); /* wait 1 ms */
- } else {
- addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00AA00AA;
- addr[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE) 0x00550055;
- addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00800080;
- addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00AA00AA;
- addr[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE) 0x00550055;
- addr2[0] = (CFG_FLASH_WORD_SIZE) 0x00300030; /* sector erase */
- }
- l_sect = sect;
- /*
- * Wait for each sector to complete, it's more
- * reliable. According to AMD Spec, you must
- * issue all erase commands within a specified
- * timeout. This has been seen to fail, especially
- * if printf()s are included (for debug)!!
- */
- wait_for_DQ7_1(info, sect);
- }
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay(1000);
-
- /* reset to read mode */
- addr = (CFG_FLASH_WORD_SIZE *) info->start[0];
- addr[0] = (CFG_FLASH_WORD_SIZE) 0x00F000F0; /* reset bank */
-
- printf(" done\n");
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-int write_buff(flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int i, l, rc;
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i = 0, cp = wp; i < l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
- for (; i < 4 && cnt > 0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt == 0 && i < 4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
-
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = 0;
- for (i = 0; i < 4; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i = 0, cp = wp; i < 4 && cnt > 0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i < 4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
-
- return (write_word(info, wp, data));
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-#ifdef CFG_FLASH_2ND_16BIT_DEV
-static int write_word(flash_info_t * info, ulong dest, ulong data)
-{
- if (((info->flash_id & FLASH_TYPEMASK) == FLASH_AM320B) ||
- ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM320T) ||
- ((info->flash_id & FLASH_TYPEMASK) == FLASH_STMW320DT)) {
- return write_word_2(info, dest, data);
- } else {
- return write_word_1(info, dest, data);
- }
-}
-
-static int write_word_1(flash_info_t * info, ulong dest, ulong data)
-#else
-static int write_word(flash_info_t * info, ulong dest, ulong data)
-#endif
-{
- volatile CFG_FLASH_WORD_SIZE *addr2 = (CFG_FLASH_WORD_SIZE *) (info->start[0]);
- volatile CFG_FLASH_WORD_SIZE *dest2 = (CFG_FLASH_WORD_SIZE *) dest;
- volatile CFG_FLASH_WORD_SIZE *data2 = (CFG_FLASH_WORD_SIZE *) & data;
- ulong start;
- int i;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*((vu_long *)dest) & data) != data) {
- return (2);
- }
-
- for (i = 0; i < 4 / sizeof(CFG_FLASH_WORD_SIZE); i++) {
- int flag;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00AA00AA;
- addr2[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE) 0x00550055;
- addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00A000A0;
-
- dest2[i] = data2[i];
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* data polling for D7 */
- start = get_timer(0);
- while ((dest2[i] & (CFG_FLASH_WORD_SIZE) 0x00800080) !=
- (data2[i] & (CFG_FLASH_WORD_SIZE) 0x00800080)) {
-
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- return (1);
- }
- }
- }
-
- return (0);
-}
-
-#ifdef CFG_FLASH_2ND_16BIT_DEV
-
-#undef CFG_FLASH_WORD_SIZE
-#define CFG_FLASH_WORD_SIZE unsigned short
-
-/*
- * The following code cannot be run from FLASH!
- */
-static ulong flash_get_size_2(vu_long * addr, flash_info_t * info)
-{
- short i;
- int n;
- CFG_FLASH_WORD_SIZE value;
- ulong base = (ulong) addr;
- volatile CFG_FLASH_WORD_SIZE *addr2 = (CFG_FLASH_WORD_SIZE *) addr;
-
- DEBUGF("FLASH ADDR: %08x\n", (unsigned)addr);
-
- /* Write auto select command: read Manufacturer ID */
- addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00AA00AA;
- addr2[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE) 0x00550055;
- addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00900090;
- udelay(1000);
-
- value = addr2[0];
- DEBUGF("FLASH MANUFACT: %x\n", value);
-
- switch (value) {
- case (CFG_FLASH_WORD_SIZE) AMD_MANUFACT:
- info->flash_id = FLASH_MAN_AMD;
- break;
- case (CFG_FLASH_WORD_SIZE) FUJ_MANUFACT:
- info->flash_id = FLASH_MAN_FUJ;
- break;
- case (CFG_FLASH_WORD_SIZE) SST_MANUFACT:
- info->flash_id = FLASH_MAN_SST;
- break;
- case (CFG_FLASH_WORD_SIZE) STM_MANUFACT:
- info->flash_id = FLASH_MAN_STM;
- break;
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- return (0); /* no or unknown flash */
- }
-
- value = addr2[1]; /* device ID */
-
- DEBUGF("\nFLASH DEVICEID: %x\n", value);
-
- switch (value) {
-
- case (CFG_FLASH_WORD_SIZE)AMD_ID_LV320T:
- info->flash_id += FLASH_AM320T;
- info->sector_count = 71;
- info->size = 0x00400000; break; /* => 4 MB */
-
- case (CFG_FLASH_WORD_SIZE)AMD_ID_LV320B:
- info->flash_id += FLASH_AM320B;
- info->sector_count = 71;
- info->size = 0x00400000; break; /* => 4 MB */
-
- case (CFG_FLASH_WORD_SIZE)STM_ID_29W320DT:
- info->flash_id += FLASH_STMW320DT;
- info->sector_count = 67;
- info->size = 0x00400000; break; /* => 4 MB */
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- return (0); /* => no or unknown flash */
- }
-
- /* set up sector start address table */
- if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) ||
- ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM040) ||
- ((info->flash_id & FLASH_TYPEMASK) == FLASH_AMD016)) {
- for (i = 0; i < info->sector_count; i++)
- info->start[i] = base + (i * 0x00010000);
- } else if ((info->flash_id & FLASH_TYPEMASK) == FLASH_STMW320DT) {
- /* set sector offsets for top boot block type */
- base += info->size;
- i = info->sector_count;
- /* 1 x 16k boot sector */
- base -= 16 << 10;
- --i;
- info->start[i] = base;
- /* 2 x 8k boot sectors */
- for (n=0; n<2; ++n) {
- base -= 8 << 10;
- --i;
- info->start[i] = base;
- }
- /* 1 x 32k boot sector */
- base -= 32 << 10;
- --i;
- info->start[i] = base;
-
- while (i > 0) { /* 64k regular sectors */
- base -= 64 << 10;
- --i;
- info->start[i] = base;
- }
- } else {
- if (info->flash_id & FLASH_BTYPE) {
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00004000;
- info->start[2] = base + 0x00006000;
- info->start[3] = base + 0x00008000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] =
- base + (i * 0x00010000) - 0x00030000;
- }
- } else {
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- info->start[i--] = base + info->size - 0x00004000;
- info->start[i--] = base + info->size - 0x00006000;
- info->start[i--] = base + info->size - 0x00008000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00010000;
- }
- }
- }
-
- /* check for protected sectors */
- for (i = 0; i < info->sector_count; i++) {
- /* read sector protection at sector address, (A7 .. A0) = 0x02 */
- /* D0 = 1 if protected */
- addr2 = (volatile CFG_FLASH_WORD_SIZE *)(info->start[i]);
-
- /* For AMD29033C flash we need to resend the command of *
- * reading flash protection for upper 8 Mb of flash */
- if (i == 32) {
- addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0xAAAAAAAA;
- addr2[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE) 0x55555555;
- addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x90909090;
- }
-
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST)
- info->protect[i] = 0;
- else
- info->protect[i] = addr2[2] & 1;
- }
-
- /* issue bank reset to return to read mode */
- addr2[0] = (CFG_FLASH_WORD_SIZE) 0x00F000F0;
-
- return (info->size);
-}
-
-static int wait_for_DQ7_2(flash_info_t * info, int sect)
-{
- ulong start, now, last;
- volatile CFG_FLASH_WORD_SIZE *addr =
- (CFG_FLASH_WORD_SIZE *) (info->start[sect]);
-
- start = get_timer(0);
- last = start;
- while ((addr[0] & (CFG_FLASH_WORD_SIZE) 0x00800080) !=
- (CFG_FLASH_WORD_SIZE) 0x00800080) {
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf("Timeout\n");
- return -1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc('.');
- last = now;
- }
- }
- return 0;
-}
-
-static int flash_erase_2(flash_info_t * info, int s_first, int s_last)
-{
- volatile CFG_FLASH_WORD_SIZE *addr = (CFG_FLASH_WORD_SIZE *) (info->start[0]);
- volatile CFG_FLASH_WORD_SIZE *addr2;
- int flag, prot, sect, l_sect;
- int i;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf("- missing\n");
- } else {
- printf("- no sectors to erase\n");
- }
- return 1;
- }
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf("Can't erase unknown flash type - aborted\n");
- return 1;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf("\n");
- }
-
- l_sect = -1;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr2 = (CFG_FLASH_WORD_SIZE *) (info->start[sect]);
-
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) {
- addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00AA00AA;
- addr[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE) 0x00550055;
- addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00800080;
- addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00AA00AA;
- addr[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE) 0x00550055;
- addr2[0] = (CFG_FLASH_WORD_SIZE) 0x00500050; /* block erase */
- for (i = 0; i < 50; i++)
- udelay(1000); /* wait 1 ms */
- } else {
- addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00AA00AA;
- addr[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE) 0x00550055;
- addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00800080;
- addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00AA00AA;
- addr[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE) 0x00550055;
- addr2[0] = (CFG_FLASH_WORD_SIZE) 0x00300030; /* sector erase */
- }
- l_sect = sect;
- /*
- * Wait for each sector to complete, it's more
- * reliable. According to AMD Spec, you must
- * issue all erase commands within a specified
- * timeout. This has been seen to fail, especially
- * if printf()s are included (for debug)!!
- */
- wait_for_DQ7_2(info, sect);
- }
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay(1000);
-
- /* reset to read mode */
- addr = (CFG_FLASH_WORD_SIZE *) info->start[0];
- addr[0] = (CFG_FLASH_WORD_SIZE) 0x00F000F0; /* reset bank */
-
- printf(" done\n");
- return 0;
-}
-
-static int write_word_2(flash_info_t * info, ulong dest, ulong data)
-{
- volatile CFG_FLASH_WORD_SIZE *addr2 = (CFG_FLASH_WORD_SIZE *) (info->start[0]);
- volatile CFG_FLASH_WORD_SIZE *dest2 = (CFG_FLASH_WORD_SIZE *) dest;
- volatile CFG_FLASH_WORD_SIZE *data2 = (CFG_FLASH_WORD_SIZE *) & data;
- ulong start;
- int i;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*((vu_long *)dest) & data) != data) {
- return (2);
- }
-
- for (i = 0; i < 4 / sizeof(CFG_FLASH_WORD_SIZE); i++) {
- int flag;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00AA00AA;
- addr2[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE) 0x00550055;
- addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00A000A0;
-
- dest2[i] = data2[i];
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* data polling for D7 */
- start = get_timer(0);
- while ((dest2[i] & (CFG_FLASH_WORD_SIZE) 0x00800080) !=
- (data2[i] & (CFG_FLASH_WORD_SIZE) 0x00800080)) {
-
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- return (1);
- }
- }
- }
-
- return (0);
-}
-#endif /* CFG_FLASH_2ND_16BIT_DEV */
diff --git a/board/amcc/ebony/Makefile b/board/amcc/ebony/Makefile
deleted file mode 100644
index 4a3927be7e..0000000000
--- a/board/amcc/ebony/Makefile
+++ /dev/null
@@ -1,47 +0,0 @@
-#
-# (C) Copyright 2002
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o
-SOBJS = init.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/amcc/ebony/config.mk b/board/amcc/ebony/config.mk
deleted file mode 100644
index e5722dd36a..0000000000
--- a/board/amcc/ebony/config.mk
+++ /dev/null
@@ -1,44 +0,0 @@
-#
-# (C) Copyright 2002
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# esd ADCIOP boards
-#
-
-#TEXT_BASE = 0xFFFE0000
-
-ifeq ($(ramsym),1)
-TEXT_BASE = 0x07FD0000
-else
-TEXT_BASE = 0xFFFC0000
-endif
-
-PLATFORM_CPPFLAGS += -DCONFIG_440=1
-
-ifeq ($(debug),1)
-PLATFORM_CPPFLAGS += -DDEBUG
-endif
-
-ifeq ($(dbcr),1)
-PLATFORM_CPPFLAGS += -DCFG_INIT_DBCR=0x8cff0000
-endif
diff --git a/board/amcc/ebony/ebony.c b/board/amcc/ebony/ebony.c
deleted file mode 100644
index a2595eec52..0000000000
--- a/board/amcc/ebony/ebony.c
+++ /dev/null
@@ -1,289 +0,0 @@
-/*
- * Copyright (C) 2002 Scott McNutt <smcnutt@artesyncp.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/processor.h>
-#include <spd_sdram.h>
-
-#define BOOT_SMALL_FLASH 32 /* 00100000 */
-#define FLASH_ONBD_N 2 /* 00000010 */
-#define FLASH_SRAM_SEL 1 /* 00000001 */
-
-long int fixed_sdram(void);
-
-int board_early_init_f(void)
-{
- uint reg;
- unsigned char *fpga_base = (unsigned char *)CFG_FPGA_BASE;
- unsigned char status;
-
- /*--------------------------------------------------------------------
- * Setup the external bus controller/chip selects
- *-------------------------------------------------------------------*/
- mtdcr(ebccfga, xbcfg);
- reg = mfdcr(ebccfgd);
- mtdcr(ebccfgd, reg | 0x04000000); /* Set ATC */
-
- mtebc(pb1ap, 0x02815480); /* NVRAM/RTC */
- mtebc(pb1cr, 0x48018000); /* BA=0x480 1MB R/W 8-bit */
- mtebc(pb7ap, 0x01015280); /* FPGA registers */
- mtebc(pb7cr, 0x48318000); /* BA=0x483 1MB R/W 8-bit */
-
- /* read FPGA_REG0 and set the bus controller */
- status = *fpga_base;
- if ((status & BOOT_SMALL_FLASH) && !(status & FLASH_ONBD_N)) {
- mtebc(pb0ap, 0x9b015480); /* FLASH/SRAM */
- mtebc(pb0cr, 0xfff18000); /* BAS=0xfff 1MB R/W 8-bit */
- mtebc(pb2ap, 0x9b015480); /* 4MB FLASH */
- mtebc(pb2cr, 0xff858000); /* BAS=0xff8 4MB R/W 8-bit */
- } else {
- mtebc(pb0ap, 0x9b015480); /* 4MB FLASH */
- mtebc(pb0cr, 0xffc58000); /* BAS=0xffc 4MB R/W 8-bit */
-
- /* set CS2 if FLASH_ONBD_N == 0 */
- if (!(status & FLASH_ONBD_N)) {
- mtebc(pb2ap, 0x9b015480); /* FLASH/SRAM */
- mtebc(pb2cr, 0xff818000); /* BAS=0xff8 4MB R/W 8-bit */
- }
- }
-
- /*--------------------------------------------------------------------
- * Setup the interrupt controller polarities, triggers, etc.
- *-------------------------------------------------------------------*/
- mtdcr(uic0sr, 0xffffffff); /* clear all */
- mtdcr(uic0er, 0x00000000); /* disable all */
- mtdcr(uic0cr, 0x00000009); /* SMI & UIC1 crit are critical */
- mtdcr(uic0pr, 0xfffffe13); /* per ref-board manual */
- mtdcr(uic0tr, 0x01c00008); /* per ref-board manual */
- mtdcr(uic0vr, 0x00000001); /* int31 highest, base=0x000 */
- mtdcr(uic0sr, 0xffffffff); /* clear all */
-
- mtdcr(uic1sr, 0xffffffff); /* clear all */
- mtdcr(uic1er, 0x00000000); /* disable all */
- mtdcr(uic1cr, 0x00000000); /* all non-critical */
- mtdcr(uic1pr, 0xffffe0ff); /* per ref-board manual */
- mtdcr(uic1tr, 0x00ffc000); /* per ref-board manual */
- mtdcr(uic1vr, 0x00000001); /* int31 highest, base=0x000 */
- mtdcr(uic1sr, 0xffffffff); /* clear all */
-
- return 0;
-}
-
-int checkboard(void)
-{
- char *s = getenv("serial#");
-
- printf("Board: Ebony - AMCC PPC440GP Evaluation Board");
- if (s != NULL) {
- puts(", serial# ");
- puts(s);
- }
- putc('\n');
-
- return (0);
-}
-
-long int initdram(int board_type)
-{
- long dram_size = 0;
-
-#if defined(CONFIG_SPD_EEPROM)
- dram_size = spd_sdram(0);
-#else
- dram_size = fixed_sdram();
-#endif
- return dram_size;
-}
-
-#if defined(CFG_DRAM_TEST)
-int testdram(void)
-{
- uint *pstart = (uint *) 0x00000000;
- uint *pend = (uint *) 0x08000000;
- uint *p;
-
- for (p = pstart; p < pend; p++)
- *p = 0xaaaaaaaa;
-
- for (p = pstart; p < pend; p++) {
- if (*p != 0xaaaaaaaa) {
- printf("SDRAM test fails at: %08x\n", (uint) p);
- return 1;
- }
- }
-
- for (p = pstart; p < pend; p++)
- *p = 0x55555555;
-
- for (p = pstart; p < pend; p++) {
- if (*p != 0x55555555) {
- printf("SDRAM test fails at: %08x\n", (uint) p);
- return 1;
- }
- }
- return 0;
-}
-#endif
-
-#if !defined(CONFIG_SPD_EEPROM)
-/*************************************************************************
- * fixed sdram init -- doesn't use serial presence detect.
- *
- * Assumes: 128 MB, non-ECC, non-registered
- * PLB @ 133 MHz
- *
- ************************************************************************/
-long int fixed_sdram(void)
-{
- uint reg;
-
- /*--------------------------------------------------------------------
- * Setup some default
- *------------------------------------------------------------------*/
- mtsdram(mem_uabba, 0x00000000); /* ubba=0 (default) */
- mtsdram(mem_slio, 0x00000000); /* rdre=0 wrre=0 rarw=0 */
- mtsdram(mem_devopt, 0x00000000); /* dll=0 ds=0 (normal) */
- mtsdram(mem_wddctr, 0x00000000); /* wrcp=0 dcd=0 */
- mtsdram(mem_clktr, 0x40000000); /* clkp=1 (90 deg wr) dcdt=0 */
-
- /*--------------------------------------------------------------------
- * Setup for board-specific specific mem
- *------------------------------------------------------------------*/
- /*
- * Following for CAS Latency = 2.5 @ 133 MHz PLB
- */
- mtsdram(mem_b0cr, 0x000a4001); /* SDBA=0x000 128MB, Mode 3, enabled */
- mtsdram(mem_tr0, 0x410a4012); /* WR=2 WD=1 CL=2.5 PA=3 CP=4 LD=2 */
- /* RA=10 RD=3 */
- mtsdram(mem_tr1, 0x8080082f); /* SS=T2 SL=STAGE 3 CD=1 CT=0x02f */
- mtsdram(mem_rtr, 0x08200000); /* Rate 15.625 ns @ 133 MHz PLB */
- mtsdram(mem_cfg1, 0x00000000); /* Self-refresh exit, disable PM */
- udelay(400); /* Delay 200 usecs (min) */
-
- /*--------------------------------------------------------------------
- * Enable the controller, then wait for DCEN to complete
- *------------------------------------------------------------------*/
- mtsdram(mem_cfg0, 0x86000000); /* DCEN=1, PMUD=1, 64-bit */
- for (;;) {
- mfsdram(mem_mcsts, reg);
- if (reg & 0x80000000)
- break;
- }
-
- return (128 * 1024 * 1024); /* 128 MB */
-}
-#endif /* !defined(CONFIG_SPD_EEPROM) */
-
-/*************************************************************************
- * pci_pre_init
- *
- * This routine is called just prior to registering the hose and gives
- * the board the opportunity to check things. Returning a value of zero
- * indicates that things are bad & PCI initialization should be aborted.
- *
- * Different boards may wish to customize the pci controller structure
- * (add regions, override default access routines, etc) or perform
- * certain pre-initialization actions.
- *
- ************************************************************************/
-#if defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT)
-int pci_pre_init(struct pci_controller *hose)
-{
- unsigned long strap;
-
- /*--------------------------------------------------------------------------+
- * The ebony board is always configured as the host & requires the
- * PCI arbiter to be enabled.
- *--------------------------------------------------------------------------*/
- strap = mfdcr(cpc0_strp1);
- if ((strap & 0x00100000) == 0) {
- printf("PCI: CPC0_STRP1[PAE] not set.\n");
- return 0;
- }
-
- return 1;
-}
-#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT) */
-
-/*************************************************************************
- * pci_target_init
- *
- * The bootstrap configuration provides default settings for the pci
- * inbound map (PIM). But the bootstrap config choices are limited and
- * may not be sufficient for a given board.
- *
- ************************************************************************/
-#if defined(CONFIG_PCI) && defined(CFG_PCI_TARGET_INIT)
-void pci_target_init(struct pci_controller *hose)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- /*--------------------------------------------------------------------------+
- * Disable everything
- *--------------------------------------------------------------------------*/
- out32r(PCIX0_PIM0SA, 0); /* disable */
- out32r(PCIX0_PIM1SA, 0); /* disable */
- out32r(PCIX0_PIM2SA, 0); /* disable */
- out32r(PCIX0_EROMBA, 0); /* disable expansion rom */
-
- /*--------------------------------------------------------------------------+
- * Map all of SDRAM to PCI address 0x0000_0000. Note that the 440 strapping
- * options to not support sizes such as 128/256 MB.
- *--------------------------------------------------------------------------*/
- out32r(PCIX0_PIM0LAL, CFG_SDRAM_BASE);
- out32r(PCIX0_PIM0LAH, 0);
- out32r(PCIX0_PIM0SA, ~(gd->ram_size - 1) | 1);
-
- out32r(PCIX0_BAR0, 0);
-
- /*--------------------------------------------------------------------------+
- * Program the board's subsystem id/vendor id
- *--------------------------------------------------------------------------*/
- out16r(PCIX0_SBSYSVID, CFG_PCI_SUBSYS_VENDORID);
- out16r(PCIX0_SBSYSID, CFG_PCI_SUBSYS_DEVICEID);
-
- out16r(PCIX0_CMD, in16r(PCIX0_CMD) | PCI_COMMAND_MEMORY);
-}
-#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_TARGET_INIT) */
-
-/*************************************************************************
- * is_pci_host
- *
- * This routine is called to determine if a pci scan should be
- * performed. With various hardware environments (especially cPCI and
- * PPMC) it's insufficient to depend on the state of the arbiter enable
- * bit in the strap register, or generic host/adapter assumptions.
- *
- * Rather than hard-code a bad assumption in the general 440 code, the
- * 440 pci code requires the board to decide at runtime.
- *
- * Return 0 for adapter mode, non-zero for host (monarch) mode.
- *
- *
- ************************************************************************/
-#if defined(CONFIG_PCI)
-int is_pci_host(struct pci_controller *hose)
-{
- /* The ebony board is always configured as host. */
- return (1);
-}
-#endif /* defined(CONFIG_PCI) */
diff --git a/board/amcc/ebony/flash.c b/board/amcc/ebony/flash.c
deleted file mode 100644
index e8fbbc493e..0000000000
--- a/board/amcc/ebony/flash.c
+++ /dev/null
@@ -1,140 +0,0 @@
-/*
- * (C) Copyright 2002
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2002 Jun Gu <jung@artesyncp.com>
- * Add support for Am29F016D and dynamic switch setting.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * Modified 4/5/2001
- * Wait for completion of each sector erase command issued
- * 4/5/2001
- * Chris Hallinan - DS4.COM, Inc. - clh@net1plus.com
- */
-
-#include <common.h>
-#include <ppc4xx.h>
-#include <asm/processor.h>
-
-#undef DEBUG
-#ifdef DEBUG
-#define DEBUGF(x...) printf(x)
-#else
-#define DEBUGF(x...)
-#endif /* DEBUG */
-
-#define BOOT_SMALL_FLASH 32 /* 00100000 */
-#define FLASH_ONBD_N 2 /* 00000010 */
-#define FLASH_SRAM_SEL 1 /* 00000001 */
-
-#define BOOT_SMALL_FLASH_VAL 4
-#define FLASH_ONBD_N_VAL 2
-#define FLASH_SRAM_SEL_VAL 1
-
-static unsigned long flash_addr_table[8][CFG_MAX_FLASH_BANKS] = {
- {0xffc00000, 0xffe00000, 0xff880000}, /* 0:000: configuraton 3 */
- {0xffc00000, 0xffe00000, 0xff800000}, /* 1:001: configuraton 4 */
- {0xffc00000, 0xffe00000, 0x00000000}, /* 2:010: configuraton 7 */
- {0xffc00000, 0xffe00000, 0x00000000}, /* 3:011: configuraton 8 */
- {0xff800000, 0xffa00000, 0xfff80000}, /* 4:100: configuraton 1 */
- {0xff800000, 0xffa00000, 0xfff00000}, /* 5:101: configuraton 2 */
- {0xffc00000, 0xffe00000, 0x00000000}, /* 6:110: configuraton 5 */
- {0xffc00000, 0xffe00000, 0x00000000} /* 7:111: configuraton 6 */
-};
-
-/*
- * include common flash code (for amcc boards)
- */
-#include "../common/flash.c"
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size(vu_long * addr, flash_info_t * info);
-
-unsigned long flash_init(void)
-{
- unsigned long total_b = 0;
- unsigned long size_b[CFG_MAX_FLASH_BANKS];
- unsigned char *fpga_base = (unsigned char *)CFG_FPGA_BASE;
- unsigned char switch_status;
- unsigned short index = 0;
- int i;
-
- /* read FPGA base register FPGA_REG0 */
- switch_status = *fpga_base;
-
- /* check the bitmap of switch status */
- if (switch_status & BOOT_SMALL_FLASH) {
- index += BOOT_SMALL_FLASH_VAL;
- }
- if (switch_status & FLASH_ONBD_N) {
- index += FLASH_ONBD_N_VAL;
- }
- if (switch_status & FLASH_SRAM_SEL) {
- index += FLASH_SRAM_SEL_VAL;
- }
-
- DEBUGF("\n");
- DEBUGF("FLASH: Index: %d\n", index);
-
- /* Init: no FLASHes known */
- for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- flash_info[i].sector_count = -1;
- flash_info[i].size = 0;
-
- /* check whether the address is 0 */
- if (flash_addr_table[index][i] == 0) {
- continue;
- }
-
- /* call flash_get_size() to initialize sector address */
- size_b[i] = flash_get_size((vu_long *)
- flash_addr_table[index][i],
- &flash_info[i]);
- flash_info[i].size = size_b[i];
- if (flash_info[i].flash_id == FLASH_UNKNOWN) {
- printf("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n",
- i, size_b[i], size_b[i] << 20);
- flash_info[i].sector_count = -1;
- flash_info[i].size = 0;
- }
-
- /* Monitor protection ON by default */
- (void)flash_protect(FLAG_PROTECT_SET, CFG_MONITOR_BASE,
- CFG_MONITOR_BASE + CFG_MONITOR_LEN - 1,
- &flash_info[2]);
-#ifdef CFG_ENV_IS_IN_FLASH
- (void)flash_protect(FLAG_PROTECT_SET, CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1,
- &flash_info[2]);
- (void)flash_protect(FLAG_PROTECT_SET, CFG_ENV_ADDR_REDUND,
- CFG_ENV_ADDR_REDUND + CFG_ENV_SECT_SIZE - 1,
- &flash_info[2]);
-#endif
-
- total_b += flash_info[i].size;
- }
-
- return total_b;
-}
diff --git a/board/amcc/ebony/init.S b/board/amcc/ebony/init.S
deleted file mode 100644
index cc8f8b444e..0000000000
--- a/board/amcc/ebony/init.S
+++ /dev/null
@@ -1,96 +0,0 @@
-/*
-* Copyright (C) 2002 Scott McNutt <smcnutt@artesyncp.com>
-*
-* See file CREDITS for list of people who contributed to this
-* project.
-*
-* This program is free software; you can redistribute it and/or
-* modify it under the terms of the GNU General Public License as
-* published by the Free Software Foundation; either version 2 of
-* the License, or (at your option) any later version.
-*
-* This program is distributed in the hope that it will be useful,
-* but WITHOUT ANY WARRANTY; without even the implied warranty of
-* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-* GNU General Public License for more details.
-*
-* You should have received a copy of the GNU General Public License
-* along with this program; if not, write to the Free Software
-* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-* MA 02111-1307 USA
-*/
-
-#include <ppc_asm.tmpl>
-#include <config.h>
-
-/* General */
-#define TLB_VALID 0x00000200
-
-/* Supported page sizes */
-
-#define SZ_1K 0x00000000
-#define SZ_4K 0x00000010
-#define SZ_16K 0x00000020
-#define SZ_64K 0x00000030
-#define SZ_256K 0x00000040
-#define SZ_1M 0x00000050
-#define SZ_16M 0x00000070
-#define SZ_256M 0x00000090
-
-/* Storage attributes */
-#define SA_W 0x00000800 /* Write-through */
-#define SA_I 0x00000400 /* Caching inhibited */
-#define SA_M 0x00000200 /* Memory coherence */
-#define SA_G 0x00000100 /* Guarded */
-#define SA_E 0x00000080 /* Endian */
-
-/* Access control */
-#define AC_X 0x00000024 /* Execute */
-#define AC_W 0x00000012 /* Write */
-#define AC_R 0x00000009 /* Read */
-
-/* Some handy macros */
-
-#define EPN(e) ((e) & 0xfffffc00)
-#define TLB0(epn,sz) ( (EPN((epn)) | (sz) | TLB_VALID ) )
-#define TLB1(rpn,erpn) ( ((rpn)&0xfffffc00) | (erpn) )
-#define TLB2(a) ( (a)&0x00000fbf )
-
-#define tlbtab_start\
- mflr r1 ;\
- bl 0f ;
-
-#define tlbtab_end\
- .long 0, 0, 0 ; \
-0: mflr r0 ; \
- mtlr r1 ; \
- blr ;
-
-#define tlbentry(epn,sz,rpn,erpn,attr)\
- .long TLB0(epn,sz),TLB1(rpn,erpn),TLB2(attr)
-
-
-/**************************************************************************
- * TLB TABLE
- *
- * This table is used by the cpu boot code to setup the initial tlb
- * entries. Rather than make broad assumptions in the cpu source tree,
- * this table lets each board set things up however they like.
- *
- * Pointer to the table is returned in r1
- *
- *************************************************************************/
-
- .section .bootpg,"ax"
- .globl tlbtab
-
-tlbtab:
- tlbtab_start
- tlbentry( 0xf0000000, SZ_256M, 0xf0000000, 1, AC_R|AC_W|AC_X|SA_G|SA_I)
- tlbentry( CFG_PERIPHERAL_BASE, SZ_256M, 0x40000000, 1, AC_R|AC_W|SA_G|SA_I)
- tlbentry( CFG_ISRAM_BASE, SZ_4K, 0x80000000, 0, AC_R|AC_W|AC_X )
- tlbentry( CFG_ISRAM_BASE + 0x1000, SZ_4K, 0x80001000, 0, AC_R|AC_W|AC_X )
- tlbentry( CFG_SDRAM_BASE, SZ_256M, 0x00000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I )
- tlbentry( CFG_PCI_BASE, SZ_256M, 0x00000000, 2, AC_R|AC_W|SA_G|SA_I )
- tlbentry( CFG_PCI_MEMBASE, SZ_256M, 0x00000000, 3, AC_R|AC_W|SA_G|SA_I )
- tlbtab_end
diff --git a/board/amcc/ebony/u-boot.lds b/board/amcc/ebony/u-boot.lds
deleted file mode 100644
index 5a1c5b1af4..0000000000
--- a/board/amcc/ebony/u-boot.lds
+++ /dev/null
@@ -1,157 +0,0 @@
-/*
- * (C) Copyright 2002
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- .resetvec 0xFFFFFFFC :
- {
- *(.resetvec)
- } = 0xffff
-
- .bootpg 0xFFFFF000 :
- {
- cpu/ppc4xx/start.o (.bootpg)
- } = 0xffff
-
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/ppc4xx/start.o (.text)
- board/amcc/ebony/init.o (.text)
- cpu/ppc4xx/kgdb.o (.text)
- cpu/ppc4xx/traps.o (.text)
- cpu/ppc4xx/interrupts.o (.text)
- cpu/ppc4xx/serial.o (.text)
- cpu/ppc4xx/cpu_init.o (.text)
- cpu/ppc4xx/speed.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/extable.o (.text)
- lib_generic/zlib.o (.text)
-
-/* . = env_offset;*/
-/* common/environment.o(.text)*/
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/amcc/luan/Makefile b/board/amcc/luan/Makefile
deleted file mode 100644
index 5654f91a83..0000000000
--- a/board/amcc/luan/Makefile
+++ /dev/null
@@ -1,48 +0,0 @@
-#
-# (C) Copyright 2002
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o
-OBJS += flash.o
-SOBJS = init.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/amcc/luan/config.mk b/board/amcc/luan/config.mk
deleted file mode 100644
index f52c206177..0000000000
--- a/board/amcc/luan/config.mk
+++ /dev/null
@@ -1,44 +0,0 @@
-#
-# (C) Copyright 2002
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# esd ADCIOP boards
-#
-
-#TEXT_BASE = 0x00001000
-
-ifeq ($(ramsym),1)
-TEXT_BASE = 0xFBD00000
-else
-TEXT_BASE = 0xFFFC0000
-endif
-
-PLATFORM_CPPFLAGS += -DCONFIG_440=1
-
-ifeq ($(debug),1)
-PLATFORM_CPPFLAGS += -DDEBUG
-endif
-
-ifeq ($(dbcr),1)
-PLATFORM_CPPFLAGS += -DCFG_INIT_DBCR=0x8cff0000
-endif
diff --git a/board/amcc/luan/epld.h b/board/amcc/luan/epld.h
deleted file mode 100644
index 05362e06d7..0000000000
--- a/board/amcc/luan/epld.h
+++ /dev/null
@@ -1,85 +0,0 @@
-#define EPLD0_FSEL_FB2 0x80
-#define EPLD0_BOOT_SMALL_FLASH 0x40 /* 0 boot from large flash, 1 from small flash */
-#define EPLD0_RAW_CARD_BIT0 0x20 /* raw card EC level */
-#define EPLD0_RAW_CARD_BIT1 0x10
-#define EPLD0_RAW_CARD_BIT2 0x08
-#define EPLD0_EXT_ARB_SEL_N 0x04 /* 0 select on-board ext PCI-X, 1 internal arbiter */
-#define EPLD0_FLASH_ONBRD_N 0x02 /* 0 small flash/SRAM active, 1 block access */
-#define EPLD0_FLASH_SRAM_SEL_N 0x01 /* 0 SRAM at mem top, 1 small flash at mem top */
-
-#define EPLD1_CLK_CNTL0 0x80 /* FSEL-FB1 of MPC9772 */
-#define EPLD1_PCIX0_CNTL1 0x40 /* S*0 of 9531 */
-#define EPLD1_PCIX0_CNTL2 0x20 /* S*1 of 9531 */
-#define EPLD1_CLK_CNTL3 0x10 /* FSEL-B1 of MPC9772 */
-#define EPLD1_CLK_CNTL4 0x08 /* FSEL-B0 of MPC9772 */
-#define EPLD1_MASTER_CLOCK6 0x04 /* clock source select 6 */
-#define EPLD1_MASTER_CLOCK7 0x02 /* clock source select 7 */
-#define EPLD1_MASTER_CLOCK8 0x01 /* clock source select 8 */
-
-#define EPLD2_ETH_MODE_10 0x80 /* Ethernet mode 10 (default = 1) */
-#define EPLD2_ETH_MODE_100 0x40 /* Ethernet mode 100 (default = 1) */
-#define EPLD2_ETH_MODE_1000 0x20 /* Ethernet mode 1000 (default = 1) */
-#define EPLD2_ETH_DUPLEX_MODE 0x10 /* Ethernet force full duplex mode */
-#define EPLD2_RESET_ETH_N 0x08 /* Ethernet reset (default = 1) */
-#define EPLD2_ETH_AUTO_NEGO 0x04 /* Ethernet auto negotiation */
-#define EPLD2_DEFAULT_UART_N 0x01 /* 0 select DSR DTR for UART1 */
-
-#define EPLD3_STATUS_LED4 0x08 /* status LED 8 (1 = LED on) */
-#define EPLD3_STATUS_LED3 0x04 /* status LED 4 (1 = LED on) */
-#define EPLD3_STATUS_LED2 0x02 /* status LED 2 (1 = LED on) */
-#define EPLD3_STATUS_LED1 0x01 /* status LED 1 (1 = LED on) */
-
-#define EPLD4_PCIX0_VTH1 0x80 /* PCI-X 0 VTH1 status */
-#define EPLD4_PCIX0_VTH2 0x40 /* PCI-X 0 VTH2 status */
-#define EPLD4_PCIX0_VTH3 0x20 /* PCI-X 0 VTH3 status */
-#define EPLD4_PCIX0_VTH4 0x10 /* PCI-X 0 VTH4 status */
-#define EPLD4_PCIX1_VTH1 0x08 /* PCI-X 1 VTH1 status */
-#define EPLD4_PCIX1_VTH2 0x04 /* PCI-X 1 VTH2 status */
-#define EPLD4_PCIX1_VTH3 0x02 /* PCI-X 1 VTH3 status */
-#define EPLD4_PCIX1_VTH4 0x01 /* PCI-X 1 VTH4 status */
-
-#define EPLD5_PCIX0_INT0 0x80 /* PCIX0 INT0 status, write 0 to reset */
-#define EPLD5_PCIX0_INT1 0x40 /* PCIX0 INT1 status, write 0 to reset */
-#define EPLD5_PCIX0_INT2 0x20 /* PCIX0 INT2 status, write 0 to reset */
-#define EPLD5_PCIX0_INT3 0x10 /* PCIX0 INT3 status, write 0 to reset */
-#define EPLD5_PCIX1_INT0 0x08 /* PCIX1 INT0 status, write 0 to reset */
-#define EPLD5_PCIX1_INT1 0x04 /* PCIX1 INT1 status, write 0 to reset */
-#define EPLD5_PCIX1_INT2 0x02 /* PCIX1 INT2 status, write 0 to reset */
-#define EPLD5_PCIX1_INT3 0x01 /* PCIX1 INT3 status, write 0 to reset */
-
-#define EPLD6_PCIX0_RESET_CTL 0x80 /* 0=enable slot reset, 1=disable slot reset */
-#define EPLD6_PCIX1_RESET_CTL 0x40 /* 0=enable slot reset, 1=disable slot reset */
-#define EPLD6_ETH_INT_MODE 0x20 /* 0=IRQ5 recv's external eth int */
-#define EPLD6_PCIX2_RESET_CTL 0x10 /* 0=enable slot reset, 1=disable slot reset */
-#define EPLD6_PCI1_CLKCNTL1 0x80 /* PCI1 clock control S*0 of 9531 */
-#define EPLD6_PCI1_CLKCNTL2 0x40 /* PCI1 clock control S*1 of 9531 */
-#define EPLD6_PCI2_CLKCNTL1 0x20 /* PCI2 clock control S*0 of 9531 */
-#define EPLD6_PCI2_CLKCNTL2 0x10 /* PCI2 clock control S*1 of 9531 */
-
-#define EPLD7_VTH1 0x80 /* PCI2 VTH1 status */
-#define EPLD7_VTH2 0x40 /* PCI2 VTH2 status */
-#define EPLD7_VTH3 0x20 /* PCI2 VTH3 status */
-#define EPLD7_VTH4 0x10 /* PCI2 VTH4 status */
-#define EPLD7_INTA_MODE 0x80 /* see S5 on SW2 for details */
-#define EPLD7_PCI_INT_MODE_N 0x40 /* see S1 on SW2 for details */
-#define EPLD7_WRITE_ENABLE_GPIO 0x20 /* see S2 on SW2 for details */
-#define EPLD7_WRITE_ENABLE_INT 0x10 /* see S3 on SW2 for details */
-
-
-typedef struct {
- unsigned char status; /* misc status */
- unsigned char clock; /* clock status, PCI-X clock control */
- unsigned char ethuart; /* Ethernet, UART status */
- unsigned char leds; /* LED register */
- unsigned char vth01; /* PCI0, PCI1 VTH register */
- unsigned char pciints; /* PCI0, PCI1 interrupts */
- unsigned char pci2; /* PCI2 interrupts, clock control */
- unsigned char vth2; /* PCI2 VTH register */
- unsigned char filler1[4096-8];
- unsigned char gpio00; /* GPIO bits 0-7 */
- unsigned char gpio08; /* GPIO bits 8-15 */
- unsigned char gpio16; /* GPIO bits 16-23 */
- unsigned char gpio24; /* GPIO bits 24-31 */
- unsigned char filler2[4096-4];
- unsigned char version; /* EPLD version */
-} epld_t;
diff --git a/board/amcc/luan/flash.c b/board/amcc/luan/flash.c
deleted file mode 100644
index d3c3c0d058..0000000000
--- a/board/amcc/luan/flash.c
+++ /dev/null
@@ -1,111 +0,0 @@
-/*
- * (C) Copyright 2002
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2002 Jun Gu <jung@artesyncp.com>
- * Add support for Am29F016D and dynamic switch setting.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * Modified 4/5/2001
- * Wait for completion of each sector erase command issued
- * 4/5/2001
- * Chris Hallinan - DS4.COM, Inc. - clh@net1plus.com
- */
-
-#include <common.h>
-#include <ppc4xx.h>
-#include <asm/processor.h>
-
-#undef DEBUG
-#ifdef DEBUG
-#define DEBUGF(x...) printf(x)
-#else
-#define DEBUGF(x...)
-#endif /* DEBUG */
-
-static unsigned long flash_addr_table[1][CFG_MAX_FLASH_BANKS] = {
- {0xff900000, 0xff980000, 0xffc00000}, /* 0:000: configuraton 3 */
-};
-
-/*
- * include common flash code (for amcc boards)
- */
-#include "../common/flash.c"
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size(vu_long * addr, flash_info_t * info);
-
-unsigned long flash_init(void)
-{
- unsigned long total_b = 0;
- unsigned long size_b[CFG_MAX_FLASH_BANKS];
- unsigned short index = 0;
- int i;
-
- /* read FPGA base register FPGA_REG0 */
-
- DEBUGF("\n");
- DEBUGF("FLASH: Index: %d\n", index);
-
- /* Init: no FLASHes known */
- for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- flash_info[i].sector_count = -1;
- flash_info[i].size = 0;
-
- /* check whether the address is 0 */
- if (flash_addr_table[index][i] == 0) {
- continue;
- }
-
- /* call flash_get_size() to initialize sector address */
- size_b[i] = flash_get_size((vu_long *)
- flash_addr_table[index][i],
- &flash_info[i]);
- flash_info[i].size = size_b[i];
- if (flash_info[i].flash_id == FLASH_UNKNOWN) {
- printf("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n",
- i, size_b[i], size_b[i] << 20);
- flash_info[i].sector_count = -1;
- flash_info[i].size = 0;
- }
-
- /* Monitor protection ON by default */
- (void)flash_protect(FLAG_PROTECT_SET, CFG_MONITOR_BASE,
- CFG_MONITOR_BASE + CFG_MONITOR_LEN - 1,
- &flash_info[2]);
-#ifdef CFG_ENV_IS_IN_FLASH
- (void)flash_protect(FLAG_PROTECT_SET, CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1,
- &flash_info[2]);
- (void)flash_protect(FLAG_PROTECT_SET, CFG_ENV_ADDR_REDUND,
- CFG_ENV_ADDR_REDUND + CFG_ENV_SECT_SIZE - 1,
- &flash_info[2]);
-#endif
-
- total_b += flash_info[i].size;
- }
-
- return total_b;
-}
diff --git a/board/amcc/luan/init.S b/board/amcc/luan/init.S
deleted file mode 100644
index 7830ebdfa6..0000000000
--- a/board/amcc/luan/init.S
+++ /dev/null
@@ -1,132 +0,0 @@
-/*
-*
-* See file CREDITS for list of people who contributed to this
-* project.
-*
-* This program is free software; you can redistribute it and/or
-* modify it under the terms of the GNU General Public License as
-* published by the Free Software Foundation; either version 2 of
-* the License, or (at your option) any later version.
-*
-* This program is distributed in the hope that it will be useful,
-* but WITHOUT ANY WARRANTY; without even the implied warranty of
-* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-* GNU General Public License for more details.
-*
-* You should have received a copy of the GNU General Public License
-* along with this program; if not, write to the Free Software
-* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-* MA 02111-1307 USA
-*/
-
-#include <ppc_asm.tmpl>
-#include <config.h>
-
-/* General */
-#define TLB_VALID 0x00000200
-
-/* Supported page sizes */
-
-#define SZ_1K 0x00000000
-#define SZ_4K 0x00000010
-#define SZ_16K 0x00000020
-#define SZ_64K 0x00000030
-#define SZ_256K 0x00000040
-#define SZ_1M 0x00000050
-#define SZ_16M 0x00000070
-#define SZ_256M 0x00000090
-
-/* Storage attributes */
-#define SA_W 0x00000800 /* Write-through */
-#define SA_I 0x00000400 /* Caching inhibited */
-#define SA_M 0x00000200 /* Memory coherence */
-#define SA_G 0x00000100 /* Guarded */
-#define SA_E 0x00000080 /* Endian */
-
-/* Access control */
-#define AC_X 0x00000024 /* Execute */
-#define AC_W 0x00000012 /* Write */
-#define AC_R 0x00000009 /* Read */
-
-/* Some handy macros */
-
-#define EPN(e) ((e) & 0xfffffc00)
-#define TLB0(epn,sz) ( (EPN((epn)) | (sz) | TLB_VALID ) )
-#define TLB1(rpn,erpn) ( ((rpn)&0xfffffc00) | (erpn) )
-#define TLB2(a) ( (a)&0x00000fbf )
-
-#define tlbtab_start\
- mflr r1 ;\
- bl 0f ;
-
-#define tlbtab_end\
- .long 0, 0, 0 ; \
-0: mflr r0 ; \
- mtlr r1 ; \
- blr ;
-
-#define tlbentry(epn,sz,rpn,erpn,attr)\
- .long TLB0(epn,sz),TLB1(rpn,erpn),TLB2(attr)
-
-
-/**************************************************************************
- * TLB TABLE
- *
- * This table is used by the cpu boot code to setup the initial tlb
- * entries. Rather than make broad assumptions in the cpu source tree,
- * this table lets each board set things up however they like.
- *
- * Pointer to the table is returned in r1
- *
- *************************************************************************/
-
- .section .bootpg,"ax"
- .globl tlbtab
-
-tlbtab:
- tlbtab_start
-
-#if (CFG_LARGE_FLASH == 0xffc00000) /* if booting from large flash */
- /* large flash */
- tlbentry( 0xffc00000, SZ_1M, 0xffc00000, 1, AC_R|AC_W|AC_X|SA_G|SA_I|SA_W )
- tlbentry( 0xffd00000, SZ_1M, 0xffd00000, 1, AC_R|AC_W|AC_X|SA_G|SA_I|SA_W )
- tlbentry( 0xffe00000, SZ_1M, 0xffe00000, 1, AC_R|AC_W|AC_X|SA_G|SA_I|SA_W )
- tlbentry( 0xfff00000, SZ_1M, 0xfff00000, 1, AC_R|AC_W|AC_X|SA_G|SA_I|SA_W )
-
- tlbentry( 0xff800000, SZ_1M, 0xff800000, 1, AC_R|AC_W|AC_X|SA_G/*|SA_I*/ )
- tlbentry( 0xff900000, SZ_1M, 0xff900000, 1, AC_R|AC_W|AC_X|SA_G|SA_I|SA_W )
-#else /* else booting from small flash */
- tlbentry( 0xffe00000, SZ_1M, 0xffe00000, 1, AC_R|AC_W|AC_X|SA_G/*|SA_I*/ )
- tlbentry( 0xfff00000, SZ_1M, 0xfff00000, 1, AC_R|AC_W|AC_X|SA_G/*|SA_I*/ )
-
- tlbentry( 0xff800000, SZ_1M, 0xff800000, 1, AC_R|AC_W|AC_X|SA_G/*|SA_I*/ )
- tlbentry( 0xff900000, SZ_1M, 0xff900000, 1, AC_R|AC_W|AC_X|SA_G/*|SA_I*/ )
- tlbentry( 0xffa00000, SZ_1M, 0xffa00000, 1, AC_R|AC_W|AC_X|SA_G/*|SA_I*/ )
- tlbentry( 0xffb00000, SZ_1M, 0xffb00000, 1, AC_R|AC_W|AC_X|SA_G/*|SA_I*/ )
-#endif
-
- tlbentry( CFG_EPLD_BASE, SZ_256K, 0xff000000, 1, AC_R|AC_W|SA_G|SA_I )
-
-#if (CFG_SRAM_BASE != 0) /* if SRAM up high and SDRAM at zero */
- tlbentry( 0x00000000, SZ_256M, 0x00000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I )
- tlbentry( 0x10000000, SZ_256M, 0x10000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I )
-#elif (CFG_SMALL_FLASH == 0xff900000) /* else SRAM at 0 */
- tlbentry( 0x00000000, SZ_1M, 0xff800000, 1, AC_R|AC_W|AC_X|SA_G/*|SA_I*/ )
-#elif (CFG_SMALL_FLASH == 0xfff00000)
- tlbentry( 0x00000000, SZ_1M, 0xffe00000, 1, AC_R|AC_W|AC_X|SA_G/*|SA_I*/ )
-#else
- #error DONT KNOW SRAM LOCATION
-#endif
-
- /* internal ram (l2 cache) */
- tlbentry( CFG_ISRAM_BASE, SZ_256K, 0x80000000, 0, AC_R|AC_W|AC_X|SA_I )
-
- /* peripherals at f0000000 */
- tlbentry( CFG_PERIPHERAL_BASE, SZ_4K, CFG_PERIPHERAL_BASE, 1, AC_R|AC_W|SA_G|SA_I )
-
- /* PCI */
-#if (CONFIG_COMMANDS & CFG_CMD_PCI)
- tlbentry( CFG_PCI_BASE, SZ_256M, 0x00000000, 9, AC_R|AC_W|SA_G|SA_I )
- tlbentry( CFG_PCI_MEMBASE, SZ_256M, 0x10000000, 9, AC_R|AC_W|SA_G|SA_I )
-#endif
- tlbtab_end
diff --git a/board/amcc/luan/luan.c b/board/amcc/luan/luan.c
deleted file mode 100644
index c6b79a9f5f..0000000000
--- a/board/amcc/luan/luan.c
+++ /dev/null
@@ -1,458 +0,0 @@
-/*
- * (C) Copyright 2005
- * John Otken, jotken@softadvances.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <command.h>
-#include <ppc4xx.h>
-#include <asm/processor.h>
-#include <spd_sdram.h>
-#include "epld.h"
-
-
-extern flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-
-/*************************************************************************
- * int board_early_init_f()
- *
- ************************************************************************/
-int board_early_init_f(void)
-{
- volatile epld_t *x = (epld_t *) CFG_EPLD_BASE;
-
- mtebc( pb0ap, 0x03800000 ); /* set chip selects */
- mtebc( pb0cr, 0xffc58000 ); /* ebc0_b0cr, 4MB at 0xffc00000 CS0 */
- mtebc( pb1ap, 0x03800000 );
- mtebc( pb1cr, 0xff018000 ); /* ebc0_b1cr, 1MB at 0xff000000 CS1 */
- mtebc( pb2ap, 0x03800000 );
- mtebc( pb2cr, 0xff838000 ); /* ebc0_b2cr, 2MB at 0xff800000 CS2 */
-
- mtdcr( uic1sr, 0xffffffff ); /* Clear all interrupts */
- mtdcr( uic1er, 0x00000000 ); /* disable all interrupts */
- mtdcr( uic1cr, 0x00000000 ); /* Set Critical / Non Critical interrupts */
- mtdcr( uic1pr, 0x7fff83ff ); /* Set Interrupt Polarities */
- mtdcr( uic1tr, 0x001f8000 ); /* Set Interrupt Trigger Levels */
- mtdcr( uic1vr, 0x00000001 ); /* Set Vect base=0,INT31 Highest priority */
- mtdcr( uic1sr, 0x00000000 ); /* clear all interrupts */
- mtdcr( uic1sr, 0xffffffff );
-
- mtdcr( uic0sr, 0xffffffff ); /* Clear all interrupts */
- mtdcr( uic0er, 0x00000000 ); /* disable all interrupts excepted cascade */
- mtdcr( uic0cr, 0x00000001 ); /* Set Critical / Non Critical interrupts */
- mtdcr( uic0pr, 0xffffffff ); /* Set Interrupt Polarities */
- mtdcr( uic0tr, 0x01000004 ); /* Set Interrupt Trigger Levels */
- mtdcr( uic0vr, 0x00000001 ); /* Set Vect base=0,INT31 Highest priority */
- mtdcr( uic0sr, 0x00000000 ); /* clear all interrupts */
- mtdcr( uic0sr, 0xffffffff );
-
- x->ethuart &= ~EPLD2_RESET_ETH_N; /* put Ethernet+PHY in reset */
-
- return 0;
-}
-
-
-/*************************************************************************
- * int misc_init_r()
- *
- ************************************************************************/
-int misc_init_r(void)
-{
- volatile epld_t *x = (epld_t *) CFG_EPLD_BASE;
- x->ethuart |= EPLD2_RESET_ETH_N; /* take Ethernet+PHY out of reset */
-
- return 0;
-}
-
-
-/*************************************************************************
- * int checkboard()
- *
- ************************************************************************/
-int checkboard(void)
-{
- char *s = getenv("serial#");
-
- printf("Board: Luan - AMCC PPC440SP Evaluation Board");
-
- if (s != NULL) {
- puts(", serial# ");
- puts(s);
- }
- putc('\n');
-
- return 0;
-}
-
-
-/*************************************************************************
- * long int fixed_sdram()
- *
- ************************************************************************/
-static long int fixed_sdram(void)
-{ /* DDR2 init from BDI2000 script */
- mtdcr( 0x10, 0x00000021 ); /* MCIF0_MCOPT2 - zero DCEN bit */
- mtdcr( 0x11, 0x84000000 );
- mtdcr( 0x10, 0x00000020 ); /* MCIF0_MCOPT1 - no ECC, 64 bits, 4 banks, DDR2 */
- mtdcr( 0x11, 0x2D122000 );
- mtdcr( 0x10, 0x00000026 ); /* MCIF0_CODT - die termination on */
- mtdcr( 0x11, 0x00800026 );
- mtdcr( 0x10, 0x00000081 ); /* MCIF0_WRDTR - Write DQS Adv 90 + Fractional DQS Delay */
- mtdcr( 0x11, 0x82000800 );
- mtdcr( 0x10, 0x00000080 ); /* MCIF0_CLKTR - advance addr clock by 180 deg */
- mtdcr( 0x11, 0x80000000 );
- mtdcr( 0x10, 0x00000040 ); /* MCIF0_MB0CF - turn on CS0, N x 10 coll */
- mtdcr( 0x11, 0x00000201 );
- mtdcr( 0x10, 0x00000044 ); /* MCIF0_MB1CF - turn on CS0, N x 10 coll */
- mtdcr( 0x11, 0x00000201 );
- mtdcr( 0x10, 0x00000030 ); /* MCIF0_RTR - refresh every 7.8125uS */
- mtdcr( 0x11, 0x08200000 );
- mtdcr( 0x10, 0x00000085 ); /* MCIF0_SDTR1 - timing register 1 */
- mtdcr( 0x11, 0x80201000 );
- mtdcr( 0x10, 0x00000086 ); /* MCIF0_SDTR2 - timing register 2 */
- mtdcr( 0x11, 0x42103242 );
- mtdcr( 0x10, 0x00000087 ); /* MCIF0_SDTR3 - timing register 3 */
- mtdcr( 0x11, 0x0C100D14 );
- mtdcr( 0x10, 0x00000088 ); /* MCIF0_MMODE - CAS is 4 cycles */
- mtdcr( 0x11, 0x00000642 );
- mtdcr( 0x10, 0x00000089 ); /* MCIF0_MEMODE - diff DQS disabled */
- mtdcr( 0x11, 0x00000400 ); /* ODT term disabled */
-
- mtdcr( 0x10, 0x00000050 ); /* MCIF0_INITPLR0 - NOP */
- mtdcr( 0x11, 0x81b80000 );
- mtdcr( 0x10, 0x00000051 ); /* MCIF0_INITPLR1 - PRE */
- mtdcr( 0x11, 0x82100400 );
- mtdcr( 0x10, 0x00000052 ); /* MCIF0_INITPLR2 - EMR2 */
- mtdcr( 0x11, 0x80820000 );
- mtdcr( 0x10, 0x00000053 ); /* MCIF0_INITPLR3 - EMR3 */
- mtdcr( 0x11, 0x80830000 );
- mtdcr( 0x10, 0x00000054 ); /* MCIF0_INITPLR4 - EMR DLL ENABLE */
- mtdcr( 0x11, 0x80810000 );
- mtdcr( 0x10, 0x00000055 ); /* MCIF0_INITPLR5 - MR DLL RESET */
- mtdcr( 0x11, 0x80800542 );
- mtdcr( 0x10, 0x00000056 ); /* MCIF0_INITPLR6 - PRE */
- mtdcr( 0x11, 0x82100400 );
- mtdcr( 0x10, 0x00000057 ); /* MCIF0_INITPLR7 - refresh */
- mtdcr( 0x11, 0x99080000 );
- mtdcr( 0x10, 0x00000058 ); /* MCIF0_INITPLR8 */
- mtdcr( 0x11, 0x99080000 );
- mtdcr( 0x10, 0x00000059 ); /* MCIF0_INITPLR9 */
- mtdcr( 0x11, 0x99080000 );
- mtdcr( 0x10, 0x0000005A ); /* MCIF0_INITPLR10 */
- mtdcr( 0x11, 0x99080000 );
- mtdcr( 0x10, 0x0000005B ); /* MCIF0_INITPLR11 - MR */
- mtdcr( 0x11, 0x80800442 );
- mtdcr( 0x10, 0x0000005C ); /* MCIF0_INITPLR12 - EMR OCD Default */
- mtdcr( 0x11, 0x80810380 );
- mtdcr( 0x10, 0x0000005D ); /* MCIF0_INITPLR13 - EMR OCD exit */
- mtdcr( 0x11, 0x80810000 );
- udelay( 10*1000 );
-
- mtdcr( 0x10, 0x00000021 ); /* MCIF0_MCOPT2 - execute preloaded init */
- mtdcr( 0x11, 0x28000000 ); /* set DC_EN */
- udelay( 100*1000 );
-
- mtdcr( 0x40, 0x0000F800 ); /* MQ0_B0BAS: base addr 00000000 / 256MB */
- mtdcr( 0x41, 0x1000F800 ); /* MQ0_B1BAS: base addr 10000000 / 256MB */
-
- mtdcr( 0x10, 0x00000078 ); /* MCIF0_RDCC - auto set read stage */
- mtdcr( 0x11, 0x00000000 );
- mtdcr( 0x10, 0x00000070 ); /* MCIF0_RQDC - read DQS delay control */
- mtdcr( 0x11, 0x8000003A ); /* enabled, frac DQS delay */
- mtdcr( 0x10, 0x00000074 ); /* MCIF0_RFDC - two clock feedback delay */
- mtdcr( 0x11, 0x00000200 );
-
- return 512 << 20;
-}
-
-
-/*************************************************************************
- * long int initdram
- *
- ************************************************************************/
-long int initdram( int board_type )
-{
- long dram_size = 0;
-
-#if defined(CONFIG_SPD_EEPROM)
- dram_size = spd_sdram (0);
-#else
- dram_size = fixed_sdram ();
-#endif
-
- return dram_size;
-}
-
-
-/*************************************************************************
- * int testdram()
- *
- ************************************************************************/
-#if defined(CFG_DRAM_TEST)
-int testdram(void)
-{
- unsigned long *mem = (unsigned long *) 0;
- const unsigned long kend = (1024 / sizeof(unsigned long));
- unsigned long k, n;
-
- mtmsr(0);
-
- for (k = 0; k < CFG_KBYTES_SDRAM;
- ++k, mem += (1024 / sizeof(unsigned long))) {
- if ((k & 1023) == 0) {
- printf("%3d MB\r", k / 1024);
- }
-
- memset(mem, 0xaaaaaaaa, 1024);
- for (n = 0; n < kend; ++n) {
- if (mem[n] != 0xaaaaaaaa) {
- printf("SDRAM test fails at: %08x\n",
- (uint) & mem[n]);
- return 1;
- }
- }
-
- memset(mem, 0x55555555, 1024);
- for (n = 0; n < kend; ++n) {
- if (mem[n] != 0x55555555) {
- printf("SDRAM test fails at: %08x\n",
- (uint) & mem[n]);
- return 1;
- }
- }
- }
- printf("SDRAM test passes\n");
-
- return 0;
-}
-#endif
-
-
-/*************************************************************************
- * pci_pre_init
- *
- * This routine is called just prior to registering the hose and gives
- * the board the opportunity to check things. Returning a value of zero
- * indicates that things are bad & PCI initialization should be aborted.
- *
- * Different boards may wish to customize the pci controller structure
- * (add regions, override default access routines, etc) or perform
- * certain pre-initialization actions.
- *
- ************************************************************************/
-#if defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT)
-int pci_pre_init( struct pci_controller *hose )
-{
- unsigned long strap;
-
- /*--------------------------------------------------------------------------+
- * The luan board is always configured as the host & requires the
- * PCI arbiter to be enabled.
- *--------------------------------------------------------------------------*/
- mfsdr(sdr_sdstp1, strap);
- if( (strap & SDR0_SDSTP1_PAE_MASK) == 0 ) {
- printf("PCI: SDR0_STRP1[%08lX] - PCI Arbiter disabled.\n",strap);
-
- return 0;
- }
-
- return 1;
-}
-#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT) */
-
-
-/*************************************************************************
- * pci_target_init
- *
- * The bootstrap configuration provides default settings for the pci
- * inbound map (PIM). But the bootstrap config choices are limited and
- * may not be sufficient for a given board.
- *
- ************************************************************************/
-#if defined(CONFIG_PCI) && defined(CFG_PCI_TARGET_INIT)
-void pci_target_init(struct pci_controller *hose)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- /*--------------------------------------------------------------------------+
- * Disable everything
- *--------------------------------------------------------------------------*/
- out32r( PCIX0_PIM0SA, 0 ); /* disable */
- out32r( PCIX0_PIM1SA, 0 ); /* disable */
- out32r( PCIX0_PIM2SA, 0 ); /* disable */
- out32r( PCIX0_EROMBA, 0 ); /* disable expansion rom */
-
- /*--------------------------------------------------------------------------+
- * Map all of SDRAM to PCI address 0x0000_0000. Note that the 440 strapping
- * options to not support sizes such as 128/256 MB.
- *--------------------------------------------------------------------------*/
- out32r( PCIX0_PIM0LAL, CFG_SDRAM_BASE );
- out32r( PCIX0_PIM0LAH, 0 );
- out32r( PCIX0_PIM0SA, ~(gd->ram_size - 1) | 1 );
-
- out32r( PCIX0_BAR0, 0 );
-
- /*--------------------------------------------------------------------------+
- * Program the board's subsystem id/vendor id
- *--------------------------------------------------------------------------*/
- out16r( PCIX0_SBSYSVID, CFG_PCI_SUBSYS_VENDORID );
- out16r( PCIX0_SBSYSID, CFG_PCI_SUBSYS_DEVICEID );
-
- out16r( PCIX0_CMD, in16r(PCIX0_CMD) | PCI_COMMAND_MEMORY );
-}
-#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_TARGET_INIT) */
-
-
-/*************************************************************************
- * is_pci_host
- *
- * This routine is called to determine if a pci scan should be
- * performed. With various hardware environments (especially cPCI and
- * PPMC) it's insufficient to depend on the state of the arbiter enable
- * bit in the strap register, or generic host/adapter assumptions.
- *
- * Rather than hard-code a bad assumption in the general 440 code, the
- * 440 pci code requires the board to decide at runtime.
- *
- * Return 0 for adapter mode, non-zero for host (monarch) mode.
- *
- *
- ************************************************************************/
-#if defined(CONFIG_PCI)
-int is_pci_host(struct pci_controller *hose)
-{
- return 1;
-}
-#endif /* defined(CONFIG_PCI) */
-
-
-/*************************************************************************
- * hw_watchdog_reset
- *
- * This routine is called to reset (keep alive) the watchdog timer
- *
- ************************************************************************/
-#if defined(CONFIG_HW_WATCHDOG)
-void hw_watchdog_reset(void)
-{
-}
-#endif
-
-
-/*************************************************************************
- * int on_off()
- *
- ************************************************************************/
-static int on_off( const char *s )
-{
- if (strcmp(s, "on") == 0) {
- return 1;
- } else if (strcmp(s, "off") == 0) {
- return 0;
- }
- return -1;
-}
-
-
-/*************************************************************************
- * void l2cache_disable()
- *
- ************************************************************************/
-static void l2cache_disable(void)
-{
- mtdcr( l2_cache_cfg, 0 );
-}
-
-
-/*************************************************************************
- * void l2cache_enable()
- *
- ************************************************************************/
-static void l2cache_enable(void) /* see p258 7.4.1 Enabling L2 Cache */
-{
- mtdcr( l2_cache_cfg, 0x80000000 ); /* enable L2_MODE L2_CFG[L2M] */
-
- mtdcr( l2_cache_addr, 0 ); /* set L2_ADDR with all zeros */
-
- mtdcr( l2_cache_cmd, 0x80000000 ); /* issue HCLEAR command via L2_CMD */
-
- while (!(mfdcr( l2_cache_stat ) & 0x80000000 )) ;; /* poll L2_SR for completion */
-
- mtdcr( l2_cache_cmd, 0x10000000 ); /* clear cache errors L2_CMD[CCP] */
-
- mtdcr( l2_cache_cmd, 0x08000000 ); /* clear tag errors L2_CMD[CTE] */
-
- mtdcr( l2_cache_snp0, 0 ); /* snoop registers */
- mtdcr( l2_cache_snp1, 0 );
-
- __asm__ volatile ("sync"); /* msync */
-
- mtdcr( l2_cache_cfg, 0xe0000000 ); /* inst and data use L2 */
-
- __asm__ volatile ("sync");
-}
-
-
-/*************************************************************************
- * int l2cache_status()
- *
- ************************************************************************/
-static int l2cache_status(void)
-{
- return (mfdcr( l2_cache_cfg ) & 0x60000000) != 0;
-}
-
-
-/*************************************************************************
- * int do_l2cache()
- *
- ************************************************************************/
-int do_l2cache( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[] )
-{
- switch (argc) {
- case 2: /* on / off */
- switch (on_off(argv[1])) {
- case 0: l2cache_disable();
- break;
- case 1: l2cache_enable();
- break;
- }
- /* FALL TROUGH */
- case 1: /* get status */
- printf ("L2 Cache is %s\n",
- l2cache_status() ? "ON" : "OFF");
- return 0;
- default:
- printf ("Usage:\n%s\n", cmdtp->usage);
- return 1;
- }
-
- return 0;
-}
-
-
-U_BOOT_CMD(
- l2cache, 2, 1, do_l2cache,
- "l2cache - enable or disable L2 cache\n",
- "[on, off]\n"
- " - enable or disable L2 cache\n"
- );
diff --git a/board/amcc/luan/u-boot.lds b/board/amcc/luan/u-boot.lds
deleted file mode 100644
index d122f499f1..0000000000
--- a/board/amcc/luan/u-boot.lds
+++ /dev/null
@@ -1,157 +0,0 @@
-/*
- * (C) Copyright 2002
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- .resetvec 0xFFFFFFFC :
- {
- *(.resetvec)
- } = 0xffff
-
- .bootpg 0xFFFFF000 :
- {
- cpu/ppc4xx/start.o (.bootpg)
- } = 0xffff
-
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/ppc4xx/start.o (.text)
- board/amcc/luan/init.o (.text)
- cpu/ppc4xx/kgdb.o (.text)
- cpu/ppc4xx/traps.o (.text)
- cpu/ppc4xx/interrupts.o (.text)
- cpu/ppc4xx/serial.o (.text)
- cpu/ppc4xx/cpu_init.o (.text)
- cpu/ppc4xx/speed.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/extable.o (.text)
- lib_generic/zlib.o (.text)
-
-/* . = env_offset;*/
-/* common/environment.o(.text)*/
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/amcc/ocotea/Makefile b/board/amcc/ocotea/Makefile
deleted file mode 100644
index af223d2c55..0000000000
--- a/board/amcc/ocotea/Makefile
+++ /dev/null
@@ -1,47 +0,0 @@
-#
-# (C) Copyright 2002
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o
-SOBJS = init.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend *~
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/amcc/ocotea/config.mk b/board/amcc/ocotea/config.mk
deleted file mode 100644
index 9e1833591a..0000000000
--- a/board/amcc/ocotea/config.mk
+++ /dev/null
@@ -1,44 +0,0 @@
-#
-# (C) Copyright 2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# AMCC 440GX Reference Platform (Ocotea) board
-#
-
-#TEXT_BASE = 0xFFFE0000
-
-ifeq ($(ramsym),1)
-TEXT_BASE = 0x07FD0000
-else
-TEXT_BASE = 0xFFFC0000
-endif
-
-PLATFORM_CPPFLAGS += -DCONFIG_440=1
-
-ifeq ($(debug),1)
-PLATFORM_CPPFLAGS += -DDEBUG
-endif
-
-ifeq ($(dbcr),1)
-PLATFORM_CPPFLAGS += -DCFG_INIT_DBCR=0x8cff0000
-endif
diff --git a/board/amcc/ocotea/flash.c b/board/amcc/ocotea/flash.c
deleted file mode 100644
index 5614e20780..0000000000
--- a/board/amcc/ocotea/flash.c
+++ /dev/null
@@ -1,150 +0,0 @@
-/*
- * (C) Copyright 2004-2005
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2002 Jun Gu <jung@artesyncp.com>
- * Add support for Am29F016D and dynamic switch setting.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * Modified 4/5/2001
- * Wait for completion of each sector erase command issued
- * 4/5/2001
- * Chris Hallinan - DS4.COM, Inc. - clh@net1plus.com
- */
-
-#include <common.h>
-#include <ppc4xx.h>
-#include <asm/processor.h>
-
-#undef DEBUG
-
-#ifdef DEBUG
-#define DEBUGF(x...) printf(x)
-#else
-#define DEBUGF(x...)
-#endif /* DEBUG */
-
-#define BOOT_SMALL_FLASH 0x40 /* 01000000 */
-#define FLASH_ONBD_N 2 /* 00000010 */
-#define FLASH_SRAM_SEL 1 /* 00000001 */
-#define FLASH_ONBD_N 2 /* 00000010 */
-#define FLASH_SRAM_SEL 1 /* 00000001 */
-
-#define BOOT_SMALL_FLASH_VAL 4
-#define FLASH_ONBD_N_VAL 2
-#define FLASH_SRAM_SEL_VAL 1
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-static unsigned long flash_addr_table[8][CFG_MAX_FLASH_BANKS] = {
- {0xFF800000, 0xFF880000, 0xFFC00000}, /* 0:000: configuraton 4 */
- {0xFF900000, 0xFF980000, 0xFFC00000}, /* 1:001: configuraton 3 */
- {0x00000000, 0x00000000, 0x00000000}, /* 2:010: configuraton 8 */
- {0x00000000, 0x00000000, 0x00000000}, /* 3:011: configuraton 7 */
- {0xFFE00000, 0xFFF00000, 0xFF800000}, /* 4:100: configuraton 2 */
- {0xFFF00000, 0xFFF80000, 0xFF800000}, /* 5:101: configuraton 1 */
- {0x00000000, 0x00000000, 0x00000000}, /* 6:110: configuraton 6 */
- {0x00000000, 0x00000000, 0x00000000} /* 7:111: configuraton 5 */
-};
-
-/*
- * include common flash code (for amcc boards)
- */
-#include "../common/flash.c"
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size(vu_long * addr, flash_info_t * info);
-static int write_word(flash_info_t * info, ulong dest, ulong data);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init(void)
-{
- unsigned long total_b = 0;
- unsigned long size_b[CFG_MAX_FLASH_BANKS];
- unsigned char *fpga_base = (unsigned char *)CFG_FPGA_BASE;
- unsigned char switch_status;
- unsigned short index = 0;
- int i;
-
- /* read FPGA base register FPGA_REG0 */
- switch_status = *fpga_base;
-
- /* check the bitmap of switch status */
- if (switch_status & BOOT_SMALL_FLASH) {
- index += BOOT_SMALL_FLASH_VAL;
- }
- if (switch_status & FLASH_ONBD_N) {
- index += FLASH_ONBD_N_VAL;
- }
- if (switch_status & FLASH_SRAM_SEL) {
- index += FLASH_SRAM_SEL_VAL;
- }
-
- DEBUGF("\n");
- DEBUGF("FLASH: Index: %d\n", index);
-
- /* Init: no FLASHes known */
- for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- flash_info[i].sector_count = -1;
- flash_info[i].size = 0;
-
- /* check whether the address is 0 */
- if (flash_addr_table[index][i] == 0) {
- continue;
- }
-
- /* call flash_get_size() to initialize sector address */
- size_b[i] =
- flash_get_size((vu_long *) flash_addr_table[index][i],
- &flash_info[i]);
- flash_info[i].size = size_b[i];
- if (flash_info[i].flash_id == FLASH_UNKNOWN) {
- printf
- ("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n",
- i, size_b[i], size_b[i] << 20);
- flash_info[i].sector_count = -1;
- flash_info[i].size = 0;
- }
-
- /* Monitor protection ON by default */
- (void)flash_protect(FLAG_PROTECT_SET, CFG_MONITOR_BASE,
- CFG_MONITOR_BASE + CFG_MONITOR_LEN - 1,
- &flash_info[i]);
-#ifdef CFG_ENV_IS_IN_FLASH
- (void)flash_protect(FLAG_PROTECT_SET, CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1,
- &flash_info[i]);
- (void)flash_protect(FLAG_PROTECT_SET, CFG_ENV_ADDR_REDUND,
- CFG_ENV_ADDR_REDUND + CFG_ENV_SECT_SIZE - 1,
- &flash_info[i]);
-#endif
-
- total_b += flash_info[i].size;
- }
-
- return total_b;
-}
diff --git a/board/amcc/ocotea/init.S b/board/amcc/ocotea/init.S
deleted file mode 100644
index e33427a108..0000000000
--- a/board/amcc/ocotea/init.S
+++ /dev/null
@@ -1,97 +0,0 @@
-/*
-* Copyright (C) 2002 Scott McNutt <smcnutt@artesyncp.com>
-*
-* See file CREDITS for list of people who contributed to this
-* project.
-*
-* This program is free software; you can redistribute it and/or
-* modify it under the terms of the GNU General Public License as
-* published by the Free Software Foundation; either version 2 of
-* the License, or (at your option) any later version.
-*
-* This program is distributed in the hope that it will be useful,
-* but WITHOUT ANY WARRANTY; without even the implied warranty of
-* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-* GNU General Public License for more details.
-*
-* You should have received a copy of the GNU General Public License
-* along with this program; if not, write to the Free Software
-* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-* MA 02111-1307 USA
-*/
-
-#include <ppc_asm.tmpl>
-#include <config.h>
-
-/* General */
-#define TLB_VALID 0x00000200
-
-/* Supported page sizes */
-
-#define SZ_1K 0x00000000
-#define SZ_4K 0x00000010
-#define SZ_16K 0x00000020
-#define SZ_64K 0x00000030
-#define SZ_256K 0x00000040
-#define SZ_1M 0x00000050
-#define SZ_16M 0x00000070
-#define SZ_256M 0x00000090
-
-/* Storage attributes */
-#define SA_W 0x00000800 /* Write-through */
-#define SA_I 0x00000400 /* Caching inhibited */
-#define SA_M 0x00000200 /* Memory coherence */
-#define SA_G 0x00000100 /* Guarded */
-#define SA_E 0x00000080 /* Endian */
-
-/* Access control */
-#define AC_X 0x00000024 /* Execute */
-#define AC_W 0x00000012 /* Write */
-#define AC_R 0x00000009 /* Read */
-
-/* Some handy macros */
-
-#define EPN(e) ((e) & 0xfffffc00)
-#define TLB0(epn,sz) ( (EPN((epn)) | (sz) | TLB_VALID ) )
-#define TLB1(rpn,erpn) ( ((rpn)&0xfffffc00) | (erpn) )
-#define TLB2(a) ( (a)&0x00000fbf )
-
-#define tlbtab_start\
- mflr r1 ;\
- bl 0f ;
-
-#define tlbtab_end\
- .long 0, 0, 0 ; \
-0: mflr r0 ; \
- mtlr r1 ; \
- blr ;
-
-#define tlbentry(epn,sz,rpn,erpn,attr)\
- .long TLB0(epn,sz),TLB1(rpn,erpn),TLB2(attr)
-
-
-/**************************************************************************
- * TLB TABLE
- *
- * This table is used by the cpu boot code to setup the initial tlb
- * entries. Rather than make broad assumptions in the cpu source tree,
- * this table lets each board set things up however they like.
- *
- * Pointer to the table is returned in r1
- *
- *************************************************************************/
-
- .section .bootpg,"ax"
- .globl tlbtab
-
-tlbtab:
- tlbtab_start
- tlbentry( 0xf0000000, SZ_256M, 0xf0000000, 1, AC_R|AC_W|AC_X|SA_G|SA_I)
- tlbentry( CFG_PERIPHERAL_BASE, SZ_256M, 0x40000000, 1, AC_R|AC_W|SA_G|SA_I)
- tlbentry( CFG_ISRAM_BASE, SZ_4K, 0x80000000, 0, AC_R|AC_W|AC_X )
- tlbentry( CFG_ISRAM_BASE + 0x1000, SZ_4K, 0x80001000, 0, AC_R|AC_W|AC_X )
- tlbentry( CFG_SDRAM_BASE, SZ_256M, 0x00000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I )
- tlbentry( CFG_SDRAM_BASE+0x10000000, SZ_256M, 0x00000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I )
- tlbentry( CFG_PCI_BASE, SZ_256M, 0x00000000, 2, AC_R|AC_W|SA_G|SA_I )
- tlbentry( CFG_PCI_MEMBASE, SZ_256M, 0x00000000, 3, AC_R|AC_W|SA_G|SA_I )
- tlbtab_end
diff --git a/board/amcc/ocotea/ocotea.c b/board/amcc/ocotea/ocotea.c
deleted file mode 100644
index d1a29c52a5..0000000000
--- a/board/amcc/ocotea/ocotea.c
+++ /dev/null
@@ -1,528 +0,0 @@
-/*
- * Copyright (C) 2004 PaulReynolds@lhsolutions.com
- *
- * (C) Copyright 2005
- * Stefan Roese, DENX Software Engineering, sr@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-
-#include <common.h>
-#include "ocotea.h"
-#include <asm/processor.h>
-#include <spd_sdram.h>
-#include <ppc4xx_enet.h>
-
-#define BOOT_SMALL_FLASH 32 /* 00100000 */
-#define FLASH_ONBD_N 2 /* 00000010 */
-#define FLASH_SRAM_SEL 1 /* 00000001 */
-
-long int fixed_sdram (void);
-void fpga_init (void);
-
-int board_early_init_f (void)
-{
- unsigned long mfr;
- unsigned char *fpga_base = (unsigned char *) CFG_FPGA_BASE;
- unsigned char switch_status;
- unsigned long cs0_base;
- unsigned long cs0_size;
- unsigned long cs0_twt;
- unsigned long cs2_base;
- unsigned long cs2_size;
- unsigned long cs2_twt;
-
- /*-------------------------------------------------------------------------+
- | Initialize EBC CONFIG
- +-------------------------------------------------------------------------*/
- mtebc(xbcfg, EBC_CFG_LE_UNLOCK |
- EBC_CFG_PTD_ENABLE | EBC_CFG_RTC_64PERCLK |
- EBC_CFG_ATC_PREVIOUS | EBC_CFG_DTC_PREVIOUS |
- EBC_CFG_CTC_PREVIOUS | EBC_CFG_EMC_NONDEFAULT |
- EBC_CFG_PME_DISABLE | EBC_CFG_PR_32);
-
- /*-------------------------------------------------------------------------+
- | FPGA. Initialize bank 7 with default values.
- +-------------------------------------------------------------------------*/
- mtebc(pb7ap, EBC_BXAP_BME_DISABLED|EBC_BXAP_TWT_ENCODE(7)|
- EBC_BXAP_BCE_DISABLE|
- EBC_BXAP_CSN_ENCODE(1)|EBC_BXAP_OEN_ENCODE(1)|
- EBC_BXAP_WBN_ENCODE(1)|EBC_BXAP_WBF_ENCODE(1)|
- EBC_BXAP_TH_ENCODE(1)|EBC_BXAP_RE_DISABLED|
- EBC_BXAP_BEM_WRITEONLY|
- EBC_BXAP_PEN_DISABLED);
- mtebc(pb7cr, EBC_BXCR_BAS_ENCODE(0x48300000)|
- EBC_BXCR_BS_1MB|EBC_BXCR_BU_RW|EBC_BXCR_BW_8BIT);
-
- /* read FPGA base register FPGA_REG0 */
- switch_status = *fpga_base;
-
- if (switch_status & 0x40) {
- cs0_base = 0xFFE00000;
- cs0_size = EBC_BXCR_BS_2MB;
- cs0_twt = 8;
- cs2_base = 0xFF800000;
- cs2_size = EBC_BXCR_BS_4MB;
- cs2_twt = 10;
- } else {
- cs0_base = 0xFFC00000;
- cs0_size = EBC_BXCR_BS_4MB;
- cs0_twt = 10;
- cs2_base = 0xFF800000;
- cs2_size = EBC_BXCR_BS_2MB;
- cs2_twt = 8;
- }
-
- /*-------------------------------------------------------------------------+
- | 1 MB FLASH / 1 MB SRAM. Initialize bank 0 with default values.
- +-------------------------------------------------------------------------*/
- mtebc(pb0ap, EBC_BXAP_BME_DISABLED|EBC_BXAP_TWT_ENCODE(cs0_twt)|
- EBC_BXAP_BCE_DISABLE|
- EBC_BXAP_CSN_ENCODE(1)|EBC_BXAP_OEN_ENCODE(1)|
- EBC_BXAP_WBN_ENCODE(1)|EBC_BXAP_WBF_ENCODE(1)|
- EBC_BXAP_TH_ENCODE(1)|EBC_BXAP_RE_DISABLED|
- EBC_BXAP_BEM_WRITEONLY|
- EBC_BXAP_PEN_DISABLED);
- mtebc(pb0cr, EBC_BXCR_BAS_ENCODE(cs0_base)|
- cs0_size|EBC_BXCR_BU_RW|EBC_BXCR_BW_8BIT);
-
- /*-------------------------------------------------------------------------+
- | 8KB NVRAM/RTC. Initialize bank 1 with default values.
- +-------------------------------------------------------------------------*/
- mtebc(pb1ap, EBC_BXAP_BME_DISABLED|EBC_BXAP_TWT_ENCODE(10)|
- EBC_BXAP_BCE_DISABLE|
- EBC_BXAP_CSN_ENCODE(1)|EBC_BXAP_OEN_ENCODE(1)|
- EBC_BXAP_WBN_ENCODE(1)|EBC_BXAP_WBF_ENCODE(1)|
- EBC_BXAP_TH_ENCODE(1)|EBC_BXAP_RE_DISABLED|
- EBC_BXAP_BEM_WRITEONLY|
- EBC_BXAP_PEN_DISABLED);
- mtebc(pb1cr, EBC_BXCR_BAS_ENCODE(0x48000000)|
- EBC_BXCR_BS_1MB|EBC_BXCR_BU_RW|EBC_BXCR_BW_8BIT);
-
- /*-------------------------------------------------------------------------+
- | 4 MB FLASH. Initialize bank 2 with default values.
- +-------------------------------------------------------------------------*/
- mtebc(pb2ap, EBC_BXAP_BME_DISABLED|EBC_BXAP_TWT_ENCODE(cs2_twt)|
- EBC_BXAP_BCE_DISABLE|
- EBC_BXAP_CSN_ENCODE(1)|EBC_BXAP_OEN_ENCODE(1)|
- EBC_BXAP_WBN_ENCODE(1)|EBC_BXAP_WBF_ENCODE(1)|
- EBC_BXAP_TH_ENCODE(1)|EBC_BXAP_RE_DISABLED|
- EBC_BXAP_BEM_WRITEONLY|
- EBC_BXAP_PEN_DISABLED);
- mtebc(pb2cr, EBC_BXCR_BAS_ENCODE(cs2_base)|
- cs2_size|EBC_BXCR_BU_RW|EBC_BXCR_BW_8BIT);
-
- /*-------------------------------------------------------------------------+
- | FPGA. Initialize bank 7 with default values.
- +-------------------------------------------------------------------------*/
- mtebc(pb7ap, EBC_BXAP_BME_DISABLED|EBC_BXAP_TWT_ENCODE(7)|
- EBC_BXAP_BCE_DISABLE|
- EBC_BXAP_CSN_ENCODE(1)|EBC_BXAP_OEN_ENCODE(1)|
- EBC_BXAP_WBN_ENCODE(1)|EBC_BXAP_WBF_ENCODE(1)|
- EBC_BXAP_TH_ENCODE(1)|EBC_BXAP_RE_DISABLED|
- EBC_BXAP_BEM_WRITEONLY|
- EBC_BXAP_PEN_DISABLED);
- mtebc(pb7cr, EBC_BXCR_BAS_ENCODE(0x48300000)|
- EBC_BXCR_BS_1MB|EBC_BXCR_BU_RW|EBC_BXCR_BW_8BIT);
-
- /*--------------------------------------------------------------------
- * Setup the interrupt controller polarities, triggers, etc.
- *-------------------------------------------------------------------*/
- mtdcr (uic0sr, 0xffffffff); /* clear all */
- mtdcr (uic0er, 0x00000000); /* disable all */
- mtdcr (uic0cr, 0x00000009); /* SMI & UIC1 crit are critical */
- mtdcr (uic0pr, 0xfffffe13); /* per ref-board manual */
- mtdcr (uic0tr, 0x01c00008); /* per ref-board manual */
- mtdcr (uic0vr, 0x00000001); /* int31 highest, base=0x000 */
- mtdcr (uic0sr, 0xffffffff); /* clear all */
-
- mtdcr (uic1sr, 0xffffffff); /* clear all */
- mtdcr (uic1er, 0x00000000); /* disable all */
- mtdcr (uic1cr, 0x00000000); /* all non-critical */
- mtdcr (uic1pr, 0xffffe0ff); /* per ref-board manual */
- mtdcr (uic1tr, 0x00ffc000); /* per ref-board manual */
- mtdcr (uic1vr, 0x00000001); /* int31 highest, base=0x000 */
- mtdcr (uic1sr, 0xffffffff); /* clear all */
-
- mtdcr (uic2sr, 0xffffffff); /* clear all */
- mtdcr (uic2er, 0x00000000); /* disable all */
- mtdcr (uic2cr, 0x00000000); /* all non-critical */
- mtdcr (uic2pr, 0xffffffff); /* per ref-board manual */
- mtdcr (uic2tr, 0x00ff8c0f); /* per ref-board manual */
- mtdcr (uic2vr, 0x00000001); /* int31 highest, base=0x000 */
- mtdcr (uic2sr, 0xffffffff); /* clear all */
-
- mtdcr (uicb0sr, 0xfc000000); /* clear all */
- mtdcr (uicb0er, 0x00000000); /* disable all */
- mtdcr (uicb0cr, 0x00000000); /* all non-critical */
- mtdcr (uicb0pr, 0xfc000000); /* */
- mtdcr (uicb0tr, 0x00000000); /* */
- mtdcr (uicb0vr, 0x00000001); /* */
- mfsdr (sdr_mfr, mfr);
- mfr &= ~SDR0_MFR_ECS_MASK;
-/* mtsdr(sdr_mfr, mfr); */
- fpga_init();
-
- return 0;
-}
-
-
-int checkboard (void)
-{
- char *s = getenv ("serial#");
-
- printf ("Board: Ocotea - AMCC PPC440GX Evaluation Board");
- if (s != NULL) {
- puts (", serial# ");
- puts (s);
- }
- putc ('\n');
-
- return (0);
-}
-
-
-long int initdram (int board_type)
-{
- long dram_size = 0;
-
-#if defined(CONFIG_SPD_EEPROM)
- dram_size = spd_sdram (0);
-#else
- dram_size = fixed_sdram ();
-#endif
- return dram_size;
-}
-
-
-#if defined(CFG_DRAM_TEST)
-int testdram (void)
-{
- uint *pstart = (uint *) 0x00000000;
- uint *pend = (uint *) 0x08000000;
- uint *p;
-
- for (p = pstart; p < pend; p++)
- *p = 0xaaaaaaaa;
-
- for (p = pstart; p < pend; p++) {
- if (*p != 0xaaaaaaaa) {
- printf ("SDRAM test fails at: %08x\n", (uint) p);
- return 1;
- }
- }
-
- for (p = pstart; p < pend; p++)
- *p = 0x55555555;
-
- for (p = pstart; p < pend; p++) {
- if (*p != 0x55555555) {
- printf ("SDRAM test fails at: %08x\n", (uint) p);
- return 1;
- }
- }
- return 0;
-}
-#endif
-
-#if !defined(CONFIG_SPD_EEPROM)
-/*************************************************************************
- * fixed sdram init -- doesn't use serial presence detect.
- *
- * Assumes: 128 MB, non-ECC, non-registered
- * PLB @ 133 MHz
- *
- ************************************************************************/
-long int fixed_sdram (void)
-{
- uint reg;
-
- /*--------------------------------------------------------------------
- * Setup some default
- *------------------------------------------------------------------*/
- mtsdram (mem_uabba, 0x00000000); /* ubba=0 (default) */
- mtsdram (mem_slio, 0x00000000); /* rdre=0 wrre=0 rarw=0 */
- mtsdram (mem_devopt, 0x00000000); /* dll=0 ds=0 (normal) */
- mtsdram (mem_wddctr, 0x00000000); /* wrcp=0 dcd=0 */
- mtsdram (mem_clktr, 0x40000000); /* clkp=1 (90 deg wr) dcdt=0 */
-
- /*--------------------------------------------------------------------
- * Setup for board-specific specific mem
- *------------------------------------------------------------------*/
- /*
- * Following for CAS Latency = 2.5 @ 133 MHz PLB
- */
- mtsdram (mem_b0cr, 0x000a4001); /* SDBA=0x000 128MB, Mode 3, enabled */
- mtsdram (mem_tr0, 0x410a4012); /* WR=2 WD=1 CL=2.5 PA=3 CP=4 LD=2 */
- /* RA=10 RD=3 */
- mtsdram (mem_tr1, 0x8080082f); /* SS=T2 SL=STAGE 3 CD=1 CT=0x02f */
- mtsdram (mem_rtr, 0x08200000); /* Rate 15.625 ns @ 133 MHz PLB */
- mtsdram (mem_cfg1, 0x00000000); /* Self-refresh exit, disable PM */
- udelay (400); /* Delay 200 usecs (min) */
-
- /*--------------------------------------------------------------------
- * Enable the controller, then wait for DCEN to complete
- *------------------------------------------------------------------*/
- mtsdram (mem_cfg0, 0x86000000); /* DCEN=1, PMUD=1, 64-bit */
- for (;;) {
- mfsdram (mem_mcsts, reg);
- if (reg & 0x80000000)
- break;
- }
-
- return (128 * 1024 * 1024); /* 128 MB */
-}
-#endif /* !defined(CONFIG_SPD_EEPROM) */
-
-
-/*************************************************************************
- * pci_pre_init
- *
- * This routine is called just prior to registering the hose and gives
- * the board the opportunity to check things. Returning a value of zero
- * indicates that things are bad & PCI initialization should be aborted.
- *
- * Different boards may wish to customize the pci controller structure
- * (add regions, override default access routines, etc) or perform
- * certain pre-initialization actions.
- *
- ************************************************************************/
-#if defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT)
-int pci_pre_init(struct pci_controller * hose )
-{
- unsigned long strap;
-
- /*--------------------------------------------------------------------------+
- * The ocotea board is always configured as the host & requires the
- * PCI arbiter to be enabled.
- *--------------------------------------------------------------------------*/
- mfsdr(sdr_sdstp1, strap);
- if( (strap & SDR0_SDSTP1_PAE_MASK) == 0 ){
- printf("PCI: SDR0_STRP1[%08lX] - PCI Arbiter disabled.\n",strap);
- return 0;
- }
-
- return 1;
-}
-#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT) */
-
-/*************************************************************************
- * pci_target_init
- *
- * The bootstrap configuration provides default settings for the pci
- * inbound map (PIM). But the bootstrap config choices are limited and
- * may not be sufficient for a given board.
- *
- ************************************************************************/
-#if defined(CONFIG_PCI) && defined(CFG_PCI_TARGET_INIT)
-void pci_target_init(struct pci_controller * hose )
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- /*--------------------------------------------------------------------------+
- * Disable everything
- *--------------------------------------------------------------------------*/
- out32r( PCIX0_PIM0SA, 0 ); /* disable */
- out32r( PCIX0_PIM1SA, 0 ); /* disable */
- out32r( PCIX0_PIM2SA, 0 ); /* disable */
- out32r( PCIX0_EROMBA, 0 ); /* disable expansion rom */
-
- /*--------------------------------------------------------------------------+
- * Map all of SDRAM to PCI address 0x0000_0000. Note that the 440 strapping
- * options to not support sizes such as 128/256 MB.
- *--------------------------------------------------------------------------*/
- out32r( PCIX0_PIM0LAL, CFG_SDRAM_BASE );
- out32r( PCIX0_PIM0LAH, 0 );
- out32r( PCIX0_PIM0SA, ~(gd->ram_size - 1) | 1 );
-
- out32r( PCIX0_BAR0, 0 );
-
- /*--------------------------------------------------------------------------+
- * Program the board's subsystem id/vendor id
- *--------------------------------------------------------------------------*/
- out16r( PCIX0_SBSYSVID, CFG_PCI_SUBSYS_VENDORID );
- out16r( PCIX0_SBSYSID, CFG_PCI_SUBSYS_DEVICEID );
-
- out16r( PCIX0_CMD, in16r(PCIX0_CMD) | PCI_COMMAND_MEMORY );
-}
-#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_TARGET_INIT) */
-
-
-/*************************************************************************
- * is_pci_host
- *
- * This routine is called to determine if a pci scan should be
- * performed. With various hardware environments (especially cPCI and
- * PPMC) it's insufficient to depend on the state of the arbiter enable
- * bit in the strap register, or generic host/adapter assumptions.
- *
- * Rather than hard-code a bad assumption in the general 440 code, the
- * 440 pci code requires the board to decide at runtime.
- *
- * Return 0 for adapter mode, non-zero for host (monarch) mode.
- *
- *
- ************************************************************************/
-#if defined(CONFIG_PCI)
-int is_pci_host(struct pci_controller *hose)
-{
- /* The ocotea board is always configured as host. */
- return(1);
-}
-#endif /* defined(CONFIG_PCI) */
-
-
-void fpga_init(void)
-{
- unsigned long group;
- unsigned long sdr0_pfc0;
- unsigned long sdr0_pfc1;
- unsigned long sdr0_cust0;
- unsigned long pvr;
-
- mfsdr (sdr_pfc0, sdr0_pfc0);
- mfsdr (sdr_pfc1, sdr0_pfc1);
- group = SDR0_PFC1_EPS_DECODE(sdr0_pfc1);
- pvr = get_pvr ();
-
- sdr0_pfc0 = (sdr0_pfc0 & ~SDR0_PFC0_GEIE_MASK) | SDR0_PFC0_GEIE_TRE;
- if ( ((pvr == PVR_440GX_RA) || (pvr == PVR_440GX_RB)) && ((group == 4) || (group == 5))) {
- sdr0_pfc0 = (sdr0_pfc0 & ~SDR0_PFC0_TRE_MASK) | SDR0_PFC0_TRE_DISABLE;
- sdr0_pfc1 = (sdr0_pfc1 & ~SDR0_PFC1_CTEMS_MASK) | SDR0_PFC1_CTEMS_EMS;
- out8(FPGA_REG2, (in8(FPGA_REG2) & ~FPGA_REG2_EXT_INTFACE_MASK) |
- FPGA_REG2_EXT_INTFACE_ENABLE);
- mtsdr (sdr_pfc0, sdr0_pfc0);
- mtsdr (sdr_pfc1, sdr0_pfc1);
- } else {
- sdr0_pfc0 = (sdr0_pfc0 & ~SDR0_PFC0_TRE_MASK) | SDR0_PFC0_TRE_ENABLE;
- switch (group)
- {
- case 0:
- case 1:
- case 2:
- /* CPU trace A */
- out8(FPGA_REG2, (in8(FPGA_REG2) & ~FPGA_REG2_EXT_INTFACE_MASK) |
- FPGA_REG2_EXT_INTFACE_ENABLE);
- sdr0_pfc1 = (sdr0_pfc1 & ~SDR0_PFC1_CTEMS_MASK) | SDR0_PFC1_CTEMS_EMS;
- mtsdr (sdr_pfc0, sdr0_pfc0);
- mtsdr (sdr_pfc1, sdr0_pfc1);
- break;
- case 3:
- case 4:
- case 5:
- case 6:
- /* CPU trace B - Over EBMI */
- sdr0_pfc1 = (sdr0_pfc1 & ~SDR0_PFC1_CTEMS_MASK) | SDR0_PFC1_CTEMS_CPUTRACE;
- mtsdr (sdr_pfc0, sdr0_pfc0);
- mtsdr (sdr_pfc1, sdr0_pfc1);
- out8(FPGA_REG2, (in8(FPGA_REG2) & ~FPGA_REG2_EXT_INTFACE_MASK) |
- FPGA_REG2_EXT_INTFACE_DISABLE);
- break;
- }
- }
-
- /* Initialize the ethernet specific functions in the fpga */
- mfsdr(sdr_pfc1, sdr0_pfc1);
- mfsdr(sdr_cust0, sdr0_cust0);
- if ( (SDR0_PFC1_EPS_DECODE(sdr0_pfc1) == 4) &&
- ((SDR0_CUST0_RGMII2_DECODE(sdr0_cust0) == RGMII_FER_GMII) ||
- (SDR0_CUST0_RGMII2_DECODE(sdr0_cust0) == RGMII_FER_TBI)))
- {
- if ((in8(FPGA_REG0) & FPGA_REG0_ECLS_MASK) == FPGA_REG0_ECLS_VER1)
- {
- out8(FPGA_REG3, (in8(FPGA_REG3) & ~FPGA_REG3_ENET_MASK1) |
- FPGA_REG3_ENET_GROUP7);
- }
- else
- {
- if (SDR0_CUST0_RGMII2_DECODE(sdr0_cust0) == RGMII_FER_GMII)
- {
- out8(FPGA_REG3, (in8(FPGA_REG3) & ~FPGA_REG3_ENET_MASK2) |
- FPGA_REG3_ENET_GROUP7);
- }
- else
- {
- out8(FPGA_REG3, (in8(FPGA_REG3) & ~FPGA_REG3_ENET_MASK2) |
- FPGA_REG3_ENET_GROUP8);
- }
- }
- }
- else
- {
- if ((in8(FPGA_REG0) & FPGA_REG0_ECLS_MASK) == FPGA_REG0_ECLS_VER1)
- {
- out8(FPGA_REG3, (in8(FPGA_REG3) & ~FPGA_REG3_ENET_MASK1) |
- FPGA_REG3_ENET_ENCODE1(SDR0_PFC1_EPS_DECODE(sdr0_pfc1)));
- }
- else
- {
- out8(FPGA_REG3, (in8(FPGA_REG3) & ~FPGA_REG3_ENET_MASK2) |
- FPGA_REG3_ENET_ENCODE2(SDR0_PFC1_EPS_DECODE(sdr0_pfc1)));
- }
- }
- out8(FPGA_REG4, FPGA_REG4_GPHY_MODE10 |
- FPGA_REG4_GPHY_MODE100 | FPGA_REG4_GPHY_MODE1000 |
- FPGA_REG4_GPHY_FRC_DPLX | FPGA_REG4_CONNECT_PHYS);
-
- /* reset the gigabyte phy if necessary */
- if (SDR0_PFC1_EPS_DECODE(sdr0_pfc1) >= 3)
- {
- if ((in8(FPGA_REG0) & FPGA_REG0_ECLS_MASK) == FPGA_REG0_ECLS_VER1)
- {
- out8(FPGA_REG3, in8(FPGA_REG3) & ~FPGA_REG3_GIGABIT_RESET_DISABLE);
- udelay(10000);
- out8(FPGA_REG3, in8(FPGA_REG3) | FPGA_REG3_GIGABIT_RESET_DISABLE);
- }
- else
- {
- out8(FPGA_REG2, in8(FPGA_REG2) & ~FPGA_REG2_GIGABIT_RESET_DISABLE);
- udelay(10000);
- out8(FPGA_REG2, in8(FPGA_REG2) | FPGA_REG2_GIGABIT_RESET_DISABLE);
- }
- }
-
- /*
- * new Ocotea with Rev. F (pass 3) chips has SMII PHY reset
- */
- if ((in8(FPGA_REG0) & FPGA_REG0_ECLS_MASK) == FPGA_REG0_ECLS_VER2) {
- out8(FPGA_REG2, in8(FPGA_REG2) & ~FPGA_REG2_SMII_RESET_DISABLE);
- udelay(10000);
- out8(FPGA_REG2, in8(FPGA_REG2) | FPGA_REG2_SMII_RESET_DISABLE);
- }
-
- /* Turn off the LED's */
- out8(FPGA_REG3, (in8(FPGA_REG3) & ~FPGA_REG3_STAT_MASK) |
- FPGA_REG3_STAT_LED8_DISAB | FPGA_REG3_STAT_LED4_DISAB |
- FPGA_REG3_STAT_LED2_DISAB | FPGA_REG3_STAT_LED1_DISAB);
-
- return;
-}
-
-#ifdef CONFIG_POST
-/*
- * Returns 1 if keys pressed to start the power-on long-running tests
- * Called from board_init_f().
- */
-int post_hotkeys_pressed(void)
-{
-
- return (ctrlc());
-}
-#endif
diff --git a/board/amcc/ocotea/ocotea.h b/board/amcc/ocotea/ocotea.h
deleted file mode 100644
index 95ce1fd351..0000000000
--- a/board/amcc/ocotea/ocotea.h
+++ /dev/null
@@ -1,141 +0,0 @@
-/*
- * (C) Copyright 2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/* Board specific FPGA stuff ... */
-#define FPGA_REG0 (CFG_FPGA_BASE + 0x00)
-#define FPGA_REG0_SSCG_MASK 0x80
-#define FPGA_REG0_SSCG_DISABLE 0x00
-#define FPGA_REG0_SSCG_ENABLE 0x80
-#define FPGA_REG0_BOOT_MASK 0x40
-#define FPGA_REG0_BOOT_LARGE_FLASH 0x00
-#define FPGA_REG0_BOOT_SMALL_FLASH 0x40
-#define FPGA_REG0_ECLS_MASK 0x38 /* New for Ocotea Rev 2 */
-#define FPGA_REG0_ECLS_0 0x20 /* New for Ocotea Rev 2 */
-#define FPGA_REG0_ECLS_1 0x10 /* New for Ocotea Rev 2 */
-#define FPGA_REG0_ECLS_2 0x08 /* New for Ocotea Rev 2 */
-#define FPGA_REG0_ECLS_VER1 0x00 /* New for Ocotea Rev 2 */
-#define FPGA_REG0_ECLS_VER3 0x08 /* New for Ocotea Rev 2 */
-#define FPGA_REG0_ECLS_VER4 0x10 /* New for Ocotea Rev 2 */
-#define FPGA_REG0_ECLS_VER5 0x18 /* New for Ocotea Rev 2 */
-#define FPGA_REG0_ECLS_VER2 0x20 /* New for Ocotea Rev 2 */
-#define FPGA_REG0_ECLS_VER6 0x28 /* New for Ocotea Rev 2 */
-#define FPGA_REG0_ECLS_VER7 0x30 /* New for Ocotea Rev 2 */
-#define FPGA_REG0_ECLS_VER8 0x38 /* New for Ocotea Rev 2 */
-#define FPGA_REG0_ARBITER_MASK 0x04
-#define FPGA_REG0_ARBITER_EXT 0x00
-#define FPGA_REG0_ARBITER_INT 0x04
-#define FPGA_REG0_ONBOARD_FLASH_MASK 0x02
-#define FPGA_REG0_ONBOARD_FLASH_ENABLE 0x00
-#define FPGA_REG0_ONBOARD_FLASH_DISABLE 0x02
-#define FPGA_REG0_FLASH 0x01
-#define FPGA_REG1 (CFG_FPGA_BASE + 0x01)
-#define FPGA_REG1_9772_FSELFBX_MASK 0x80
-#define FPGA_REG1_9772_FSELFBX_6 0x00
-#define FPGA_REG1_9772_FSELFBX_10 0x80
-#define FPGA_REG1_9531_SX_MASK 0x60
-#define FPGA_REG1_9531_SX_33MHZ 0x00
-#define FPGA_REG1_9531_SX_100MHZ 0x20
-#define FPGA_REG1_9531_SX_66MHZ 0x40
-#define FPGA_REG1_9531_SX_133MHZ 0x60
-#define FPGA_REG1_9772_FSELBX_MASK 0x18
-#define FPGA_REG1_9772_FSELBX_4 0x00
-#define FPGA_REG1_9772_FSELBX_6 0x08
-#define FPGA_REG1_9772_FSELBX_8 0x10
-#define FPGA_REG1_9772_FSELBX_10 0x18
-#define FPGA_REG1_SOURCE_MASK 0x07
-#define FPGA_REG1_SOURCE_TC 0x00
-#define FPGA_REG1_SOURCE_66MHZ 0x01
-#define FPGA_REG1_SOURCE_50MHZ 0x02
-#define FPGA_REG1_SOURCE_33MHZ 0x03
-#define FPGA_REG1_SOURCE_25MHZ 0x04
-#define FPGA_REG1_SOURCE_SSDIV1 0x05
-#define FPGA_REG1_SOURCE_SSDIV2 0x06
-#define FPGA_REG1_SOURCE_SSDIV4 0x07
-#define FPGA_REG2 (CFG_FPGA_BASE + 0x02)
-#define FPGA_REG2_TC0 0x80
-#define FPGA_REG2_TC1 0x40
-#define FPGA_REG2_TC2 0x20
-#define FPGA_REG2_TC3 0x10
-#define FPGA_REG2_GIGABIT_RESET_DISABLE 0x08 /*Use on Ocotea pass 2 boards*/
-#define FPGA_REG2_EXT_INTFACE_MASK 0x04
-#define FPGA_REG2_EXT_INTFACE_ENABLE 0x00
-#define FPGA_REG2_EXT_INTFACE_DISABLE 0x04
-#define FPGA_REG2_SMII_RESET_DISABLE 0x02 /*Use on Ocotea pass 3 boards*/
-#define FPGA_REG2_DEFAULT_UART1_N 0x01
-#define FPGA_REG3 (CFG_FPGA_BASE + 0x03)
-#define FPGA_REG3_GIGABIT_RESET_DISABLE 0x80 /*Use on Ocotea pass 1 boards*/
-#define FPGA_REG3_ENET_MASK1 0x70 /*Use on Ocotea pass 1 boards*/
-#define FPGA_REG3_ENET_MASK2 0xF0 /*Use on Ocotea pass 2 boards*/
-#define FPGA_REG3_ENET_GROUP0 0x00
-#define FPGA_REG3_ENET_GROUP1 0x10
-#define FPGA_REG3_ENET_GROUP2 0x20
-#define FPGA_REG3_ENET_GROUP3 0x30
-#define FPGA_REG3_ENET_GROUP4 0x40
-#define FPGA_REG3_ENET_GROUP5 0x50
-#define FPGA_REG3_ENET_GROUP6 0x60
-#define FPGA_REG3_ENET_GROUP7 0x70
-#define FPGA_REG3_ENET_GROUP8 0x80 /*Use on Ocotea pass 2 boards*/
-#define FPGA_REG3_ENET_ENCODE1(n) ((((unsigned long)(n))&0x07)<<4) /*pass1*/
-#define FPGA_REG3_ENET_DECODE1(n) ((((unsigned long)(n))>>4)&0x07) /*pass1*/
-#define FPGA_REG3_ENET_ENCODE2(n) ((((unsigned long)(n))&0x0F)<<4) /*pass2*/
-#define FPGA_REG3_ENET_DECODE2(n) ((((unsigned long)(n))>>4)&0x0F) /*pass2*/
-#define FPGA_REG3_STAT_MASK 0x0F
-#define FPGA_REG3_STAT_LED8_ENAB 0x08
-#define FPGA_REG3_STAT_LED4_ENAB 0x04
-#define FPGA_REG3_STAT_LED2_ENAB 0x02
-#define FPGA_REG3_STAT_LED1_ENAB 0x01
-#define FPGA_REG3_STAT_LED8_DISAB 0x00
-#define FPGA_REG3_STAT_LED4_DISAB 0x00
-#define FPGA_REG3_STAT_LED2_DISAB 0x00
-#define FPGA_REG3_STAT_LED1_DISAB 0x00
-#define FPGA_REG4 (CFG_FPGA_BASE + 0x04)
-#define FPGA_REG4_GPHY_MODE10 0x80
-#define FPGA_REG4_GPHY_MODE100 0x40
-#define FPGA_REG4_GPHY_MODE1000 0x20
-#define FPGA_REG4_GPHY_FRC_DPLX 0x10
-#define FPGA_REG4_GPHY_ANEG_DIS 0x08
-#define FPGA_REG4_CONNECT_PHYS 0x04
-
-
-#define SDR0_CUST0_ENET3_MASK 0x00000080
-#define SDR0_CUST0_ENET3_COPPER 0x00000000
-#define SDR0_CUST0_ENET3_FIBER 0x00000080
-#define SDR0_CUST0_RGMII3_MASK 0x00000070
-#define SDR0_CUST0_RGMII3_ENCODE(n) ((((unsigned long)(n))&0x7)<<4)
-#define SDR0_CUST0_RGMII3_DECODE(n) ((((unsigned long)(n))>>4)&0x07)
-#define SDR0_CUST0_RGMII3_DISAB 0x00000000
-#define SDR0_CUST0_RGMII3_RTBI 0x00000040
-#define SDR0_CUST0_RGMII3_RGMII 0x00000050
-#define SDR0_CUST0_RGMII3_TBI 0x00000060
-#define SDR0_CUST0_RGMII3_GMII 0x00000070
-#define SDR0_CUST0_ENET2_MASK 0x00000008
-#define SDR0_CUST0_ENET2_COPPER 0x00000000
-#define SDR0_CUST0_ENET2_FIBER 0x00000008
-#define SDR0_CUST0_RGMII2_MASK 0x00000007
-#define SDR0_CUST0_RGMII2_ENCODE(n) ((((unsigned long)(n))&0x7)<<0)
-#define SDR0_CUST0_RGMII2_DECODE(n) ((((unsigned long)(n))>>0)&0x07)
-#define SDR0_CUST0_RGMII2_DISAB 0x00000000
-#define SDR0_CUST0_RGMII2_RTBI 0x00000004
-#define SDR0_CUST0_RGMII2_RGMII 0x00000005
-#define SDR0_CUST0_RGMII2_TBI 0x00000006
-#define SDR0_CUST0_RGMII2_GMII 0x00000007
diff --git a/board/amcc/ocotea/u-boot.lds b/board/amcc/ocotea/u-boot.lds
deleted file mode 100644
index 316fee88c0..0000000000
--- a/board/amcc/ocotea/u-boot.lds
+++ /dev/null
@@ -1,157 +0,0 @@
-/*
- * (C) Copyright 2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- .resetvec 0xFFFFFFFC :
- {
- *(.resetvec)
- } = 0xffff
-
- .bootpg 0xFFFFF000 :
- {
- cpu/ppc4xx/start.o (.bootpg)
- } = 0xffff
-
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/ppc4xx/start.o (.text)
- board/amcc/ocotea/init.o (.text)
- cpu/ppc4xx/kgdb.o (.text)
- cpu/ppc4xx/traps.o (.text)
- cpu/ppc4xx/interrupts.o (.text)
- cpu/ppc4xx/serial.o (.text)
- cpu/ppc4xx/cpu_init.o (.text)
- cpu/ppc4xx/speed.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/extable.o (.text)
- lib_generic/zlib.o (.text)
-
-/* . = env_offset;*/
-/* common/environment.o(.text)*/
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/amcc/walnut/Makefile b/board/amcc/walnut/Makefile
deleted file mode 100644
index f5bda5519a..0000000000
--- a/board/amcc/walnut/Makefile
+++ /dev/null
@@ -1,46 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/amcc/walnut/config.mk b/board/amcc/walnut/config.mk
deleted file mode 100644
index 1bdf5e4fcf..0000000000
--- a/board/amcc/walnut/config.mk
+++ /dev/null
@@ -1,24 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-TEXT_BASE = 0xFFFC0000
diff --git a/board/amcc/walnut/flash.c b/board/amcc/walnut/flash.c
deleted file mode 100644
index 056f9b9362..0000000000
--- a/board/amcc/walnut/flash.c
+++ /dev/null
@@ -1,199 +0,0 @@
-/*
- * (C) Copyright 2000-2005
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * Modified 4/5/2001
- * Wait for completion of each sector erase command issued
- * 4/5/2001
- * Chris Hallinan - DS4.COM, Inc. - clh@net1plus.com
- */
-
-#include <common.h>
-#include <ppc4xx.h>
-#include <asm/processor.h>
-
-#undef DEBUG
-#ifdef DEBUG
-#define DEBUGF(x...) printf(x)
-#else
-#define DEBUGF(x...)
-#endif /* DEBUG */
-
-/*
- * include common flash code (for amcc boards)
- */
-#include "../common/flash.c"
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size(vu_long * addr, flash_info_t * info);
-static void flash_get_offsets(ulong base, flash_info_t * info);
-
-unsigned long flash_init(void)
-{
- unsigned long size_b0, size_b1;
- int i;
- uint pbcr;
- unsigned long base_b0, base_b1;
-
- /* Init: no FLASHes known */
- for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* Static FLASH Bank configuration here - FIXME XXX */
-
- size_b0 =
- flash_get_size((vu_long *) FLASH_BASE0_PRELIM, &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size_b0, size_b0 << 20);
- }
-
- /* Only one bank */
- if (CFG_MAX_FLASH_BANKS == 1) {
- /* Setup offsets */
- flash_get_offsets(FLASH_BASE0_PRELIM, &flash_info[0]);
-
- /* Monitor protection ON by default */
- (void)flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE + CFG_MONITOR_LEN - 1,
- &flash_info[0]);
-#ifdef CFG_ENV_IS_IN_FLASH
- (void)flash_protect(FLAG_PROTECT_SET, CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1,
- &flash_info[0]);
- (void)flash_protect(FLAG_PROTECT_SET, CFG_ENV_ADDR_REDUND,
- CFG_ENV_ADDR_REDUND + CFG_ENV_SECT_SIZE - 1,
- &flash_info[0]);
-#endif
-
- size_b1 = 0;
- flash_info[0].size = size_b0;
- } else {
- /* 2 banks */
- size_b1 =
- flash_get_size((vu_long *) FLASH_BASE1_PRELIM,
- &flash_info[1]);
-
- /* Re-do sizing to get full correct info */
-
- if (size_b1) {
- mtdcr(ebccfga, pb0cr);
- pbcr = mfdcr(ebccfgd);
- mtdcr(ebccfga, pb0cr);
- base_b1 = -size_b1;
- pbcr =
- (pbcr & 0x0001ffff) | base_b1 |
- (((size_b1 / 1024 / 1024) - 1) << 17);
- mtdcr(ebccfgd, pbcr);
- /* printf("pb1cr = %x\n", pbcr); */
- }
-
- if (size_b0) {
- mtdcr(ebccfga, pb1cr);
- pbcr = mfdcr(ebccfgd);
- mtdcr(ebccfga, pb1cr);
- base_b0 = base_b1 - size_b0;
- pbcr =
- (pbcr & 0x0001ffff) | base_b0 |
- (((size_b0 / 1024 / 1024) - 1) << 17);
- mtdcr(ebccfgd, pbcr);
- /* printf("pb0cr = %x\n", pbcr); */
- }
-
- size_b0 = flash_get_size((vu_long *) base_b0, &flash_info[0]);
-
- flash_get_offsets(base_b0, &flash_info[0]);
-
- /* monitor protection ON by default */
- (void)flash_protect(FLAG_PROTECT_SET,
- base_b0 + size_b0 - monitor_flash_len,
- base_b0 + size_b0 - 1, &flash_info[0]);
-
- if (size_b1) {
- /* Re-do sizing to get full correct info */
- size_b1 =
- flash_get_size((vu_long *) base_b1, &flash_info[1]);
-
- flash_get_offsets(base_b1, &flash_info[1]);
-
- /* monitor protection ON by default */
- (void)flash_protect(FLAG_PROTECT_SET,
- base_b1 + size_b1 -
- monitor_flash_len,
- base_b1 + size_b1 - 1,
- &flash_info[1]);
- /* monitor protection OFF by default (one is enough) */
- (void)flash_protect(FLAG_PROTECT_CLEAR,
- base_b0 + size_b0 -
- monitor_flash_len,
- base_b0 + size_b0 - 1,
- &flash_info[0]);
- } else {
- flash_info[1].flash_id = FLASH_UNKNOWN;
- flash_info[1].sector_count = -1;
- }
-
- flash_info[0].size = size_b0;
- flash_info[1].size = size_b1;
- } /* else 2 banks */
- return (size_b0 + size_b1);
-}
-
-
-static void flash_get_offsets(ulong base, flash_info_t * info)
-{
- int i;
-
- /* set up sector start address table */
- if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) ||
- (info->flash_id == FLASH_AM040)) {
- for (i = 0; i < info->sector_count; i++)
- info->start[i] = base + (i * 0x00010000);
- } else {
- if (info->flash_id & FLASH_BTYPE) {
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00004000;
- info->start[2] = base + 0x00006000;
- info->start[3] = base + 0x00008000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] =
- base + (i * 0x00010000) - 0x00030000;
- }
- } else {
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- info->start[i--] = base + info->size - 0x00004000;
- info->start[i--] = base + info->size - 0x00006000;
- info->start[i--] = base + info->size - 0x00008000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00010000;
- }
- }
- }
-}
diff --git a/board/amcc/walnut/u-boot.lds b/board/amcc/walnut/u-boot.lds
deleted file mode 100644
index 1dcbab5a24..0000000000
--- a/board/amcc/walnut/u-boot.lds
+++ /dev/null
@@ -1,151 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- .resetvec 0xFFFFFFFC :
- {
- *(.resetvec)
- } = 0xffff
-
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/ppc4xx/start.o (.text)
- cpu/ppc4xx/kgdb.o (.text)
- cpu/ppc4xx/traps.o (.text)
- cpu/ppc4xx/interrupts.o (.text)
- cpu/ppc4xx/serial.o (.text)
- cpu/ppc4xx/cpu_init.o (.text)
- cpu/ppc4xx/speed.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/extable.o (.text)
- lib_generic/zlib.o (.text)
-
-/* . = env_offset;*/
-/* common/environment.o(.text)*/
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/amcc/walnut/walnut.c b/board/amcc/walnut/walnut.c
deleted file mode 100644
index f1a96a6e7d..0000000000
--- a/board/amcc/walnut/walnut.c
+++ /dev/null
@@ -1,111 +0,0 @@
-/*
- * (C) Copyright 2000-2005
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/processor.h>
-#include <spd_sdram.h>
-
-int board_early_init_f(void)
-{
- /*-------------------------------------------------------------------------+
- | Interrupt controller setup for the Walnut/Sycamore board.
- | Note: IRQ 0-15 405GP internally generated; active high; level sensitive
- | IRQ 16 405GP internally generated; active low; level sensitive
- | IRQ 17-24 RESERVED
- | IRQ 25 (EXT IRQ 0) FPGA; active high; level sensitive
- | IRQ 26 (EXT IRQ 1) SMI; active high; level sensitive
- | IRQ 27 (EXT IRQ 2) Not Used
- | IRQ 28 (EXT IRQ 3) PCI SLOT 3; active low; level sensitive
- | IRQ 29 (EXT IRQ 4) PCI SLOT 2; active low; level sensitive
- | IRQ 30 (EXT IRQ 5) PCI SLOT 1; active low; level sensitive
- | IRQ 31 (EXT IRQ 6) PCI SLOT 0; active low; level sensitive
- | Note for Walnut board:
- | An interrupt taken for the FPGA (IRQ 25) indicates that either
- | the Mouse, Keyboard, IRDA, or External Expansion caused the
- | interrupt. The FPGA must be read to determine which device
- | caused the interrupt. The default setting of the FPGA clears
- |
- +-------------------------------------------------------------------------*/
-
- mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
- mtdcr(uicer, 0x00000000); /* disable all ints */
- mtdcr(uiccr, 0x00000020); /* set all but FPGA SMI to be non-critical */
- mtdcr(uicpr, 0xFFFFFFE0); /* set int polarities */
- mtdcr(uictr, 0x10000000); /* set int trigger levels */
- mtdcr(uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority */
- mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
-
- /* set UART1 control to select CTS/RTS */
-#define FPGA_BRDC 0xF0300004
- *(volatile char *)(FPGA_BRDC) |= 0x1;
-
- return 0;
-}
-
-/*
- * Check Board Identity:
- */
-int checkboard(void)
-{
- char *s = getenv("serial#");
- uint pvr = get_pvr();
-
- if (pvr == PVR_405GPR_RB) {
- puts("Board: Sycamore - AMCC PPC405GPr Evaluation Board");
- } else {
- puts("Board: Walnut - AMCC PPC405GP Evaluation Board");
- }
-
- if (s != NULL) {
- puts(", serial# ");
- puts(s);
- }
- putc('\n');
-
- return (0);
-}
-
-/*
- * sdram_init - Dummy implementation for start.S, spd_sdram used on this board!
- */
-void sdram_init(void)
-{
- return;
-}
-
-/*
- * initdram(int board_type) reads EEPROM via I2c. EEPROM contains all of
- * the necessary info for SDRAM controller configuration
- */
-long int initdram(int board_type)
-{
- return spd_sdram(0);
-}
-
-int testdram(void)
-{
- /* TODO: XXX XXX XXX */
- printf("test: xxx MB - ok\n");
-
- return (0);
-}
diff --git a/board/amcc/yellowstone/Makefile b/board/amcc/yellowstone/Makefile
deleted file mode 100644
index 47116d3674..0000000000
--- a/board/amcc/yellowstone/Makefile
+++ /dev/null
@@ -1,47 +0,0 @@
-#
-# (C) Copyright 2002
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o
-SOBJS = init.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/amcc/yellowstone/config.mk b/board/amcc/yellowstone/config.mk
deleted file mode 100644
index 4ab0ea0084..0000000000
--- a/board/amcc/yellowstone/config.mk
+++ /dev/null
@@ -1,44 +0,0 @@
-#
-# (C) Copyright 2002
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# esd ADCIOP boards
-#
-
-#TEXT_BASE = 0x00001000
-
-ifeq ($(ramsym),1)
-TEXT_BASE = 0xFBD00000
-else
-TEXT_BASE = 0xFFF80000
-endif
-
-PLATFORM_CPPFLAGS += -DCONFIG_440=1
-
-ifeq ($(debug),1)
-PLATFORM_CPPFLAGS += -DDEBUG
-endif
-
-ifeq ($(dbcr),1)
-PLATFORM_CPPFLAGS += -DCFG_INIT_DBCR=0x8cff0000
-endif
diff --git a/board/amcc/yellowstone/init.S b/board/amcc/yellowstone/init.S
deleted file mode 100644
index 425ad0868f..0000000000
--- a/board/amcc/yellowstone/init.S
+++ /dev/null
@@ -1,112 +0,0 @@
-/*
-*
-* See file CREDITS for list of people who contributed to this
-* project.
-*
-* This program is free software; you can redistribute it and/or
-* modify it under the terms of the GNU General Public License as
-* published by the Free Software Foundation; either version 2 of
-* the License, or (at your option) any later version.
-*
-* This program is distributed in the hope that it will be useful,
-* but WITHOUT ANY WARRANTY; without even the implied warranty of
-* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-* GNU General Public License for more details.
-*
-* You should have received a copy of the GNU General Public License
-* along with this program; if not, write to the Free Software
-* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-* MA 02111-1307 USA
-*/
-
-#include <ppc_asm.tmpl>
-#include <config.h>
-
-/* General */
-#define TLB_VALID 0x00000200
-
-/* Supported page sizes */
-
-#define SZ_1K 0x00000000
-#define SZ_4K 0x00000010
-#define SZ_16K 0x00000020
-#define SZ_64K 0x00000030
-#define SZ_256K 0x00000040
-#define SZ_1M 0x00000050
-#define SZ_8M 0x00000060
-#define SZ_16M 0x00000070
-#define SZ_256M 0x00000090
-
-/* Storage attributes */
-#define SA_W 0x00000800 /* Write-through */
-#define SA_I 0x00000400 /* Caching inhibited */
-#define SA_M 0x00000200 /* Memory coherence */
-#define SA_G 0x00000100 /* Guarded */
-#define SA_E 0x00000080 /* Endian */
-
-/* Access control */
-#define AC_X 0x00000024 /* Execute */
-#define AC_W 0x00000012 /* Write */
-#define AC_R 0x00000009 /* Read */
-
-/* Some handy macros */
-
-#define EPN(e) ((e) & 0xfffffc00)
-#define TLB0(epn,sz) ( (EPN((epn)) | (sz) | TLB_VALID ) )
-#define TLB1(rpn,erpn) ( ((rpn)&0xfffffc00) | (erpn) )
-#define TLB2(a) ( (a)&0x00000fbf )
-
-#define tlbtab_start\
- mflr r1 ;\
- bl 0f ;
-
-#define tlbtab_end\
- .long 0, 0, 0 ; \
-0: mflr r0 ; \
- mtlr r1 ; \
- blr ;
-
-#define tlbentry(epn,sz,rpn,erpn,attr)\
- .long TLB0(epn,sz),TLB1(rpn,erpn),TLB2(attr)
-
-
-/**************************************************************************
- * TLB TABLE
- *
- * This table is used by the cpu boot code to setup the initial tlb
- * entries. Rather than make broad assumptions in the cpu source tree,
- * this table lets each board set things up however they like.
- *
- * Pointer to the table is returned in r1
- *
- *************************************************************************/
-
- .section .bootpg,"ax"
- .globl tlbtab
-
-tlbtab:
- tlbtab_start
-
- /*
- * BOOT_CS (FLASH) must be first. Before relocation SA_I can be off to use the
- * speed up boot process. It is patched after relocation to enable SA_I
- */
- tlbentry( CFG_BOOT_BASE_ADDR, SZ_256M, CFG_BOOT_BASE_ADDR, 0, AC_R|AC_W|AC_X|SA_G/*|SA_I*/)
-
- /* TLB-entry for init-ram in dcache (SA_I must be turned off!) */
- tlbentry( CFG_INIT_RAM_ADDR, SZ_64K, CFG_INIT_RAM_ADDR, 0, AC_R|AC_W|AC_X|SA_G )
-
- tlbentry( CFG_SDRAM_BASE, SZ_256M, CFG_SDRAM_BASE, 0, AC_R|AC_W|AC_X|SA_G|SA_I )
- tlbentry( CFG_PCI_BASE, SZ_256M, CFG_PCI_BASE, 0, AC_R|AC_W|SA_G|SA_I )
- tlbentry( CFG_NVRAM_BASE_ADDR, SZ_256M, CFG_NVRAM_BASE_ADDR, 0, AC_R|AC_W|AC_X|SA_W|SA_I )
-
- /* PCI */
- tlbentry( CFG_PCI_MEMBASE, SZ_256M, CFG_PCI_MEMBASE, 0, AC_R|AC_W|SA_G|SA_I )
- tlbentry( CFG_PCI_MEMBASE1, SZ_256M, CFG_PCI_MEMBASE1, 0, AC_R|AC_W|SA_G|SA_I )
- tlbentry( CFG_PCI_MEMBASE2, SZ_256M, CFG_PCI_MEMBASE2, 0, AC_R|AC_W|SA_G|SA_I )
- tlbentry( CFG_PCI_MEMBASE3, SZ_256M, CFG_PCI_MEMBASE3, 0, AC_R|AC_W|SA_G|SA_I )
-
- /* USB 2.0 Device */
- tlbentry( CFG_USB_DEVICE, SZ_1K, 0x50000000, 0, AC_R|AC_W|SA_G|SA_I )
-
- tlbtab_end
diff --git a/board/amcc/yellowstone/u-boot.lds b/board/amcc/yellowstone/u-boot.lds
deleted file mode 100644
index a0ba44de88..0000000000
--- a/board/amcc/yellowstone/u-boot.lds
+++ /dev/null
@@ -1,157 +0,0 @@
-/*
- * (C) Copyright 2002
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- .resetvec 0xFFFFFFFC :
- {
- *(.resetvec)
- } = 0xffff
-
- .bootpg 0xFFFFF000 :
- {
- cpu/ppc4xx/start.o (.bootpg)
- } = 0xffff
-
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/ppc4xx/start.o (.text)
- board/amcc/yellowstone/init.o (.text)
- cpu/ppc4xx/kgdb.o (.text)
- cpu/ppc4xx/traps.o (.text)
- cpu/ppc4xx/interrupts.o (.text)
- cpu/ppc4xx/serial.o (.text)
- cpu/ppc4xx/cpu_init.o (.text)
- cpu/ppc4xx/speed.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/extable.o (.text)
- lib_generic/zlib.o (.text)
-
-/* . = env_offset;*/
-/* common/environment.o(.text)*/
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/amcc/yellowstone/yellowstone.c b/board/amcc/yellowstone/yellowstone.c
deleted file mode 100644
index 8ddf910c8e..0000000000
--- a/board/amcc/yellowstone/yellowstone.c
+++ /dev/null
@@ -1,553 +0,0 @@
-/*
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <ppc4xx.h>
-#include <asm/processor.h>
-#include <spd_sdram.h>
-
-extern flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-int board_early_init_f(void)
-{
- register uint reg;
-
- /*--------------------------------------------------------------------
- * Setup the external bus controller/chip selects
- *-------------------------------------------------------------------*/
- mtdcr(ebccfga, xbcfg);
- reg = mfdcr(ebccfgd);
- mtdcr(ebccfgd, reg | 0x04000000); /* Set ATC */
-
- mtebc(pb0ap, 0x03017300); /* FLASH/SRAM */
- mtebc(pb0cr, 0xfc0da000); /* BAS=0xfc0 64MB r/w 16-bit */
-
- mtebc(pb1ap, 0x00000000);
- mtebc(pb1cr, 0x00000000);
-
- mtebc(pb2ap, 0x04814500);
- /*CPLD*/ mtebc(pb2cr, 0x80018000); /*BAS=0x800 1MB r/w 8-bit */
-
- mtebc(pb3ap, 0x00000000);
- mtebc(pb3cr, 0x00000000);
-
- mtebc(pb4ap, 0x00000000);
- mtebc(pb4cr, 0x00000000);
-
- mtebc(pb5ap, 0x00000000);
- mtebc(pb5cr, 0x00000000);
-
- /*--------------------------------------------------------------------
- * Setup the GPIO pins
- *-------------------------------------------------------------------*/
- /*CPLD cs */
- /*setup Address lines for flash size 64Meg. */
- out32(GPIO0_OSRL, in32(GPIO0_OSRL) | 0x50010000);
- out32(GPIO0_TSRL, in32(GPIO0_TSRL) | 0x50010000);
- out32(GPIO0_ISR1L, in32(GPIO0_ISR1L) | 0x50000000);
-
- /*setup emac */
- out32(GPIO0_TCR, in32(GPIO0_TCR) | 0xC080);
- out32(GPIO0_TSRL, in32(GPIO0_TSRL) | 0x40);
- out32(GPIO0_ISR1L, in32(GPIO0_ISR1L) | 0x55);
- out32(GPIO0_OSRH, in32(GPIO0_OSRH) | 0x50004000);
- out32(GPIO0_ISR1H, in32(GPIO0_ISR1H) | 0x00440000);
-
- /*UART1 */
- out32(GPIO1_TCR, in32(GPIO1_TCR) | 0x02000000);
- out32(GPIO1_OSRL, in32(GPIO1_OSRL) | 0x00080000);
- out32(GPIO1_ISR2L, in32(GPIO1_ISR2L) | 0x00010000);
-
- /* external interrupts IRQ0...3 */
- out32(GPIO1_TCR, in32(GPIO1_TCR) & ~0x0f000000);
- out32(GPIO1_TSRL, in32(GPIO1_TSRL) & ~0x00005500);
- out32(GPIO1_ISR1L, in32(GPIO1_ISR1L) | 0x00005500);
-
-#if 0 /* test-only */
- /*setup USB 2.0 */
- out32(GPIO1_TCR, in32(GPIO1_TCR) | 0xc0000000);
- out32(GPIO1_OSRL, in32(GPIO1_OSRL) | 0x50000000);
- out32(GPIO0_TCR, in32(GPIO0_TCR) | 0xf);
- out32(GPIO0_OSRH, in32(GPIO0_OSRH) | 0xaa);
- out32(GPIO0_ISR2H, in32(GPIO0_ISR2H) | 0x00000500);
-#endif
-
- /*--------------------------------------------------------------------
- * Setup the interrupt controller polarities, triggers, etc.
- *-------------------------------------------------------------------*/
- mtdcr(uic0sr, 0xffffffff); /* clear all */
- mtdcr(uic0er, 0x00000000); /* disable all */
- mtdcr(uic0cr, 0x00000009); /* ATI & UIC1 crit are critical */
- mtdcr(uic0pr, 0xfffffe13); /* per ref-board manual */
- mtdcr(uic0tr, 0x01c00008); /* per ref-board manual */
- mtdcr(uic0vr, 0x00000001); /* int31 highest, base=0x000 */
- mtdcr(uic0sr, 0xffffffff); /* clear all */
-
- mtdcr(uic1sr, 0xffffffff); /* clear all */
- mtdcr(uic1er, 0x00000000); /* disable all */
- mtdcr(uic1cr, 0x00000000); /* all non-critical */
- mtdcr(uic1pr, 0xffffe0ff); /* per ref-board manual */
- mtdcr(uic1tr, 0x00ffc000); /* per ref-board manual */
- mtdcr(uic1vr, 0x00000001); /* int31 highest, base=0x000 */
- mtdcr(uic1sr, 0xffffffff); /* clear all */
-
- /*--------------------------------------------------------------------
- * Setup other serial configuration
- *-------------------------------------------------------------------*/
- mfsdr(sdr_pci0, reg);
- mtsdr(sdr_pci0, 0x80000000 | reg); /* PCI arbiter enabled */
- mtsdr(sdr_pfc0, 0x00003e00); /* Pin function */
- mtsdr(sdr_pfc1, 0x00048000); /* Pin function: UART0 has 4 pins */
-
- /*clear tmrclk divisor */
- *(unsigned char *)(CFG_BCSR_BASE | 0x04) = 0x00;
-
- /*enable ethernet */
- *(unsigned char *)(CFG_BCSR_BASE | 0x08) = 0xf0;
-
-#if 0 /* test-only */
- /*enable usb 1.1 fs device and remove usb 2.0 reset */
- *(unsigned char *)(CFG_BCSR_BASE | 0x09) = 0x00;
-#endif
-
- /*get rid of flash write protect */
- *(unsigned char *)(CFG_BCSR_BASE | 0x07) = 0x00;
-
- return 0;
-}
-
-int misc_init_r (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
- uint pbcr;
- int size_val = 0;
-
- /* Re-do sizing to get full correct info */
- mtdcr(ebccfga, pb0cr);
- pbcr = mfdcr(ebccfgd);
- switch (gd->bd->bi_flashsize) {
- case 1 << 20:
- size_val = 0;
- break;
- case 2 << 20:
- size_val = 1;
- break;
- case 4 << 20:
- size_val = 2;
- break;
- case 8 << 20:
- size_val = 3;
- break;
- case 16 << 20:
- size_val = 4;
- break;
- case 32 << 20:
- size_val = 5;
- break;
- case 64 << 20:
- size_val = 6;
- break;
- case 128 << 20:
- size_val = 7;
- break;
- }
- pbcr = (pbcr & 0x0001ffff) | gd->bd->bi_flashstart | (size_val << 17);
- mtdcr(ebccfga, pb0cr);
- mtdcr(ebccfgd, pbcr);
-
- /* adjust flash start and offset */
- gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize;
- gd->bd->bi_flashoffset = 0;
-
- /* Monitor protection ON by default */
- (void)flash_protect(FLAG_PROTECT_SET,
- -CFG_MONITOR_LEN,
- 0xffffffff,
- &flash_info[0]);
-
- return 0;
-}
-
-int checkboard(void)
-{
- char *s = getenv("serial#");
-
- printf("Board: Yellowstone - AMCC PPC440GR Evaluation Board");
- if (s != NULL) {
- puts(", serial# ");
- puts(s);
- }
- putc('\n');
-
- return (0);
-}
-
-/*************************************************************************
- * sdram_init -- doesn't use serial presence detect.
- *
- * Assumes: 256 MB, ECC, non-registered
- * PLB @ 133 MHz
- *
- ************************************************************************/
-#define NUM_TRIES 64
-#define NUM_READS 10
-
-void sdram_tr1_set(int ram_address, int* tr1_value)
-{
- int i;
- int j, k;
- volatile unsigned int* ram_pointer = (unsigned int*)ram_address;
- int first_good = -1, last_bad = 0x1ff;
-
- unsigned long test[NUM_TRIES] = {
- 0x00000000, 0x00000000, 0xFFFFFFFF, 0xFFFFFFFF,
- 0x00000000, 0x00000000, 0xFFFFFFFF, 0xFFFFFFFF,
- 0xFFFFFFFF, 0xFFFFFFFF, 0x00000000, 0x00000000,
- 0xFFFFFFFF, 0xFFFFFFFF, 0x00000000, 0x00000000,
- 0xAAAAAAAA, 0xAAAAAAAA, 0x55555555, 0x55555555,
- 0xAAAAAAAA, 0xAAAAAAAA, 0x55555555, 0x55555555,
- 0x55555555, 0x55555555, 0xAAAAAAAA, 0xAAAAAAAA,
- 0x55555555, 0x55555555, 0xAAAAAAAA, 0xAAAAAAAA,
- 0xA5A5A5A5, 0xA5A5A5A5, 0x5A5A5A5A, 0x5A5A5A5A,
- 0xA5A5A5A5, 0xA5A5A5A5, 0x5A5A5A5A, 0x5A5A5A5A,
- 0x5A5A5A5A, 0x5A5A5A5A, 0xA5A5A5A5, 0xA5A5A5A5,
- 0x5A5A5A5A, 0x5A5A5A5A, 0xA5A5A5A5, 0xA5A5A5A5,
- 0xAA55AA55, 0xAA55AA55, 0x55AA55AA, 0x55AA55AA,
- 0xAA55AA55, 0xAA55AA55, 0x55AA55AA, 0x55AA55AA,
- 0x55AA55AA, 0x55AA55AA, 0xAA55AA55, 0xAA55AA55,
- 0x55AA55AA, 0x55AA55AA, 0xAA55AA55, 0xAA55AA55 };
-
- /* go through all possible SDRAM0_TR1[RDCT] values */
- for (i=0; i<=0x1ff; i++) {
- /* set the current value for TR1 */
- mtsdram(mem_tr1, (0x80800800 | i));
-
- /* write values */
- for (j=0; j<NUM_TRIES; j++) {
- ram_pointer[j] = test[j];
-
- /* clear any cache at ram location */
- __asm__("dcbf 0,%0": :"r" (&ram_pointer[j]));
- }
-
- /* read values back */
- for (j=0; j<NUM_TRIES; j++) {
- for (k=0; k<NUM_READS; k++) {
- /* clear any cache at ram location */
- __asm__("dcbf 0,%0": :"r" (&ram_pointer[j]));
-
- if (ram_pointer[j] != test[j])
- break;
- }
-
- /* read error */
- if (k != NUM_READS) {
- break;
- }
- }
-
- /* we have a SDRAM0_TR1[RDCT] that is part of the window */
- if (j == NUM_TRIES) {
- if (first_good == -1)
- first_good = i; /* found beginning of window */
- } else { /* bad read */
- /* if we have not had a good read then don't care */
- if(first_good != -1) {
- /* first failure after a good read */
- last_bad = i-1;
- break;
- }
- }
- }
-
- /* return the current value for TR1 */
- *tr1_value = (first_good + last_bad) / 2;
-}
-
-void sdram_init(void)
-{
- register uint reg;
- int tr1_bank1, tr1_bank2;
-
- /*--------------------------------------------------------------------
- * Setup some default
- *------------------------------------------------------------------*/
- mtsdram(mem_uabba, 0x00000000); /* ubba=0 (default) */
- mtsdram(mem_slio, 0x00000000); /* rdre=0 wrre=0 rarw=0 */
- mtsdram(mem_devopt, 0x00000000); /* dll=0 ds=0 (normal) */
- mtsdram(mem_clktr, 0x40000000); /* ?? */
- mtsdram(mem_wddctr, 0x40000000); /* ?? */
-
- /*clear this first, if the DDR is enabled by a debugger
- then you can not make changes. */
- mtsdram(mem_cfg0, 0x00000000); /* Disable EEC */
-
- /*--------------------------------------------------------------------
- * Setup for board-specific specific mem
- *------------------------------------------------------------------*/
- /*
- * Following for CAS Latency = 2.5 @ 133 MHz PLB
- */
- mtsdram(mem_b0cr, 0x000a4001); /* SDBA=0x000 128MB, Mode 3, enabled */
- mtsdram(mem_b1cr, 0x080a4001); /* SDBA=0x080 128MB, Mode 3, enabled */
-
- mtsdram(mem_tr0, 0x410a4012); /* ?? */
- mtsdram(mem_rtr, 0x04080000); /* ?? */
- mtsdram(mem_cfg1, 0x00000000); /* Self-refresh exit, disable PM */
- mtsdram(mem_cfg0, 0x34000000); /* Disable EEC */
- udelay(400); /* Delay 200 usecs (min) */
-
- /*--------------------------------------------------------------------
- * Enable the controller, then wait for DCEN to complete
- *------------------------------------------------------------------*/
- mtsdram(mem_cfg0, 0x84000000); /* Enable */
-
- for (;;) {
- mfsdram(mem_mcsts, reg);
- if (reg & 0x80000000)
- break;
- }
-
- sdram_tr1_set(0x00000000, &tr1_bank1);
- sdram_tr1_set(0x08000000, &tr1_bank2);
- mtsdram(mem_tr1, (((tr1_bank1+tr1_bank2)/2) | 0x80800800) );
-}
-
-/*************************************************************************
- * long int initdram
- *
- ************************************************************************/
-long int initdram(int board)
-{
- sdram_init();
- return CFG_SDRAM_BANKS * (CFG_KBYTES_SDRAM * 1024); /* return bytes */
-}
-
-#if defined(CFG_DRAM_TEST)
-int testdram(void)
-{
- unsigned long *mem = (unsigned long *)0;
- const unsigned long kend = (1024 / sizeof(unsigned long));
- unsigned long k, n;
-
- mtmsr(0);
-
- for (k = 0; k < CFG_KBYTES_SDRAM;
- ++k, mem += (1024 / sizeof(unsigned long))) {
- if ((k & 1023) == 0) {
- printf("%3d MB\r", k / 1024);
- }
-
- memset(mem, 0xaaaaaaaa, 1024);
- for (n = 0; n < kend; ++n) {
- if (mem[n] != 0xaaaaaaaa) {
- printf("SDRAM test fails at: %08x\n",
- (uint) & mem[n]);
- return 1;
- }
- }
-
- memset(mem, 0x55555555, 1024);
- for (n = 0; n < kend; ++n) {
- if (mem[n] != 0x55555555) {
- printf("SDRAM test fails at: %08x\n",
- (uint) & mem[n]);
- return 1;
- }
- }
- }
- printf("SDRAM test passes\n");
- return 0;
-}
-#endif
-
-/*************************************************************************
- * pci_pre_init
- *
- * This routine is called just prior to registering the hose and gives
- * the board the opportunity to check things. Returning a value of zero
- * indicates that things are bad & PCI initialization should be aborted.
- *
- * Different boards may wish to customize the pci controller structure
- * (add regions, override default access routines, etc) or perform
- * certain pre-initialization actions.
- *
- ************************************************************************/
-#if defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT)
-int pci_pre_init(struct pci_controller *hose)
-{
- unsigned long addr;
-
- /*-------------------------------------------------------------------------+
- | Set priority for all PLB3 devices to 0.
- | Set PLB3 arbiter to fair mode.
- +-------------------------------------------------------------------------*/
- mfsdr(sdr_amp1, addr);
- mtsdr(sdr_amp1, (addr & 0x000000FF) | 0x0000FF00);
- addr = mfdcr(plb3_acr);
- mtdcr(plb3_acr, addr | 0x80000000);
-
- /*-------------------------------------------------------------------------+
- | Set priority for all PLB4 devices to 0.
- +-------------------------------------------------------------------------*/
- mfsdr(sdr_amp0, addr);
- mtsdr(sdr_amp0, (addr & 0x000000FF) | 0x0000FF00);
- addr = mfdcr(plb4_acr) | 0xa0000000; /* Was 0x8---- */
- mtdcr(plb4_acr, addr);
-
- /*-------------------------------------------------------------------------+
- | Set Nebula PLB4 arbiter to fair mode.
- +-------------------------------------------------------------------------*/
- /* Segment0 */
- addr = (mfdcr(plb0_acr) & ~plb0_acr_ppm_mask) | plb0_acr_ppm_fair;
- addr = (addr & ~plb0_acr_hbu_mask) | plb0_acr_hbu_enabled;
- addr = (addr & ~plb0_acr_rdp_mask) | plb0_acr_rdp_4deep;
- addr = (addr & ~plb0_acr_wrp_mask) | plb0_acr_wrp_2deep;
- mtdcr(plb0_acr, addr);
-
- /* Segment1 */
- addr = (mfdcr(plb1_acr) & ~plb1_acr_ppm_mask) | plb1_acr_ppm_fair;
- addr = (addr & ~plb1_acr_hbu_mask) | plb1_acr_hbu_enabled;
- addr = (addr & ~plb1_acr_rdp_mask) | plb1_acr_rdp_4deep;
- addr = (addr & ~plb1_acr_wrp_mask) | plb1_acr_wrp_2deep;
- mtdcr(plb1_acr, addr);
-
- return 1;
-}
-#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT) */
-
-/*************************************************************************
- * pci_target_init
- *
- * The bootstrap configuration provides default settings for the pci
- * inbound map (PIM). But the bootstrap config choices are limited and
- * may not be sufficient for a given board.
- *
- ************************************************************************/
-#if defined(CONFIG_PCI) && defined(CFG_PCI_TARGET_INIT)
-void pci_target_init(struct pci_controller *hose)
-{
- /*--------------------------------------------------------------------------+
- * Set up Direct MMIO registers
- *--------------------------------------------------------------------------*/
- /*--------------------------------------------------------------------------+
- | PowerPC440 EP PCI Master configuration.
- | Map one 1Gig range of PLB/processor addresses to PCI memory space.
- | PLB address 0xA0000000-0xDFFFFFFF ==> PCI address 0xA0000000-0xDFFFFFFF
- | Use byte reversed out routines to handle endianess.
- | Make this region non-prefetchable.
- +--------------------------------------------------------------------------*/
- out32r(PCIX0_PMM0MA, 0x00000000); /* PMM0 Mask/Attribute - disabled b4 setting */
- out32r(PCIX0_PMM0LA, CFG_PCI_MEMBASE); /* PMM0 Local Address */
- out32r(PCIX0_PMM0PCILA, CFG_PCI_MEMBASE); /* PMM0 PCI Low Address */
- out32r(PCIX0_PMM0PCIHA, 0x00000000); /* PMM0 PCI High Address */
- out32r(PCIX0_PMM0MA, 0xE0000001); /* 512M + No prefetching, and enable region */
-
- out32r(PCIX0_PMM1MA, 0x00000000); /* PMM0 Mask/Attribute - disabled b4 setting */
- out32r(PCIX0_PMM1LA, CFG_PCI_MEMBASE2); /* PMM0 Local Address */
- out32r(PCIX0_PMM1PCILA, CFG_PCI_MEMBASE2); /* PMM0 PCI Low Address */
- out32r(PCIX0_PMM1PCIHA, 0x00000000); /* PMM0 PCI High Address */
- out32r(PCIX0_PMM1MA, 0xE0000001); /* 512M + No prefetching, and enable region */
-
- out32r(PCIX0_PTM1MS, 0x00000001); /* Memory Size/Attribute */
- out32r(PCIX0_PTM1LA, 0); /* Local Addr. Reg */
- out32r(PCIX0_PTM2MS, 0); /* Memory Size/Attribute */
- out32r(PCIX0_PTM2LA, 0); /* Local Addr. Reg */
-
- /*--------------------------------------------------------------------------+
- * Set up Configuration registers
- *--------------------------------------------------------------------------*/
-
- /* Program the board's subsystem id/vendor id */
- pci_write_config_word(0, PCI_SUBSYSTEM_VENDOR_ID,
- CFG_PCI_SUBSYS_VENDORID);
- pci_write_config_word(0, PCI_SUBSYSTEM_ID, CFG_PCI_SUBSYS_ID);
-
- /* Configure command register as bus master */
- pci_write_config_word(0, PCI_COMMAND, PCI_COMMAND_MASTER);
-
- /* 240nS PCI clock */
- pci_write_config_word(0, PCI_LATENCY_TIMER, 1);
-
- /* No error reporting */
- pci_write_config_word(0, PCI_ERREN, 0);
-
- pci_write_config_dword(0, PCI_BRDGOPT2, 0x00000101);
-
-}
-#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_TARGET_INIT) */
-
-/*************************************************************************
- * pci_master_init
- *
- ************************************************************************/
-#if defined(CONFIG_PCI) && defined(CFG_PCI_MASTER_INIT)
-void pci_master_init(struct pci_controller *hose)
-{
- unsigned short temp_short;
-
- /*--------------------------------------------------------------------------+
- | Write the PowerPC440 EP PCI Configuration regs.
- | Enable PowerPC440 EP to be a master on the PCI bus (PMM).
- | Enable PowerPC440 EP to act as a PCI memory target (PTM).
- +--------------------------------------------------------------------------*/
- pci_read_config_word(0, PCI_COMMAND, &temp_short);
- pci_write_config_word(0, PCI_COMMAND,
- temp_short | PCI_COMMAND_MASTER |
- PCI_COMMAND_MEMORY);
-}
-#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_MASTER_INIT) */
-
-/*************************************************************************
- * is_pci_host
- *
- * This routine is called to determine if a pci scan should be
- * performed. With various hardware environments (especially cPCI and
- * PPMC) it's insufficient to depend on the state of the arbiter enable
- * bit in the strap register, or generic host/adapter assumptions.
- *
- * Rather than hard-code a bad assumption in the general 440 code, the
- * 440 pci code requires the board to decide at runtime.
- *
- * Return 0 for adapter mode, non-zero for host (monarch) mode.
- *
- *
- ************************************************************************/
-#if defined(CONFIG_PCI)
-int is_pci_host(struct pci_controller *hose)
-{
- /* Bamboo is always configured as host. */
- return (1);
-}
-#endif /* defined(CONFIG_PCI) */
-
-/*************************************************************************
- * hw_watchdog_reset
- *
- * This routine is called to reset (keep alive) the watchdog timer
- *
- ************************************************************************/
-#if defined(CONFIG_HW_WATCHDOG)
-void hw_watchdog_reset(void)
-{
-
-}
-#endif
diff --git a/board/amcc/yosemite/Makefile b/board/amcc/yosemite/Makefile
deleted file mode 100644
index 47116d3674..0000000000
--- a/board/amcc/yosemite/Makefile
+++ /dev/null
@@ -1,47 +0,0 @@
-#
-# (C) Copyright 2002
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o
-SOBJS = init.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/amcc/yosemite/config.mk b/board/amcc/yosemite/config.mk
deleted file mode 100644
index 4ab0ea0084..0000000000
--- a/board/amcc/yosemite/config.mk
+++ /dev/null
@@ -1,44 +0,0 @@
-#
-# (C) Copyright 2002
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# esd ADCIOP boards
-#
-
-#TEXT_BASE = 0x00001000
-
-ifeq ($(ramsym),1)
-TEXT_BASE = 0xFBD00000
-else
-TEXT_BASE = 0xFFF80000
-endif
-
-PLATFORM_CPPFLAGS += -DCONFIG_440=1
-
-ifeq ($(debug),1)
-PLATFORM_CPPFLAGS += -DDEBUG
-endif
-
-ifeq ($(dbcr),1)
-PLATFORM_CPPFLAGS += -DCFG_INIT_DBCR=0x8cff0000
-endif
diff --git a/board/amcc/yosemite/init.S b/board/amcc/yosemite/init.S
deleted file mode 100644
index 425ad0868f..0000000000
--- a/board/amcc/yosemite/init.S
+++ /dev/null
@@ -1,112 +0,0 @@
-/*
-*
-* See file CREDITS for list of people who contributed to this
-* project.
-*
-* This program is free software; you can redistribute it and/or
-* modify it under the terms of the GNU General Public License as
-* published by the Free Software Foundation; either version 2 of
-* the License, or (at your option) any later version.
-*
-* This program is distributed in the hope that it will be useful,
-* but WITHOUT ANY WARRANTY; without even the implied warranty of
-* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-* GNU General Public License for more details.
-*
-* You should have received a copy of the GNU General Public License
-* along with this program; if not, write to the Free Software
-* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-* MA 02111-1307 USA
-*/
-
-#include <ppc_asm.tmpl>
-#include <config.h>
-
-/* General */
-#define TLB_VALID 0x00000200
-
-/* Supported page sizes */
-
-#define SZ_1K 0x00000000
-#define SZ_4K 0x00000010
-#define SZ_16K 0x00000020
-#define SZ_64K 0x00000030
-#define SZ_256K 0x00000040
-#define SZ_1M 0x00000050
-#define SZ_8M 0x00000060
-#define SZ_16M 0x00000070
-#define SZ_256M 0x00000090
-
-/* Storage attributes */
-#define SA_W 0x00000800 /* Write-through */
-#define SA_I 0x00000400 /* Caching inhibited */
-#define SA_M 0x00000200 /* Memory coherence */
-#define SA_G 0x00000100 /* Guarded */
-#define SA_E 0x00000080 /* Endian */
-
-/* Access control */
-#define AC_X 0x00000024 /* Execute */
-#define AC_W 0x00000012 /* Write */
-#define AC_R 0x00000009 /* Read */
-
-/* Some handy macros */
-
-#define EPN(e) ((e) & 0xfffffc00)
-#define TLB0(epn,sz) ( (EPN((epn)) | (sz) | TLB_VALID ) )
-#define TLB1(rpn,erpn) ( ((rpn)&0xfffffc00) | (erpn) )
-#define TLB2(a) ( (a)&0x00000fbf )
-
-#define tlbtab_start\
- mflr r1 ;\
- bl 0f ;
-
-#define tlbtab_end\
- .long 0, 0, 0 ; \
-0: mflr r0 ; \
- mtlr r1 ; \
- blr ;
-
-#define tlbentry(epn,sz,rpn,erpn,attr)\
- .long TLB0(epn,sz),TLB1(rpn,erpn),TLB2(attr)
-
-
-/**************************************************************************
- * TLB TABLE
- *
- * This table is used by the cpu boot code to setup the initial tlb
- * entries. Rather than make broad assumptions in the cpu source tree,
- * this table lets each board set things up however they like.
- *
- * Pointer to the table is returned in r1
- *
- *************************************************************************/
-
- .section .bootpg,"ax"
- .globl tlbtab
-
-tlbtab:
- tlbtab_start
-
- /*
- * BOOT_CS (FLASH) must be first. Before relocation SA_I can be off to use the
- * speed up boot process. It is patched after relocation to enable SA_I
- */
- tlbentry( CFG_BOOT_BASE_ADDR, SZ_256M, CFG_BOOT_BASE_ADDR, 0, AC_R|AC_W|AC_X|SA_G/*|SA_I*/)
-
- /* TLB-entry for init-ram in dcache (SA_I must be turned off!) */
- tlbentry( CFG_INIT_RAM_ADDR, SZ_64K, CFG_INIT_RAM_ADDR, 0, AC_R|AC_W|AC_X|SA_G )
-
- tlbentry( CFG_SDRAM_BASE, SZ_256M, CFG_SDRAM_BASE, 0, AC_R|AC_W|AC_X|SA_G|SA_I )
- tlbentry( CFG_PCI_BASE, SZ_256M, CFG_PCI_BASE, 0, AC_R|AC_W|SA_G|SA_I )
- tlbentry( CFG_NVRAM_BASE_ADDR, SZ_256M, CFG_NVRAM_BASE_ADDR, 0, AC_R|AC_W|AC_X|SA_W|SA_I )
-
- /* PCI */
- tlbentry( CFG_PCI_MEMBASE, SZ_256M, CFG_PCI_MEMBASE, 0, AC_R|AC_W|SA_G|SA_I )
- tlbentry( CFG_PCI_MEMBASE1, SZ_256M, CFG_PCI_MEMBASE1, 0, AC_R|AC_W|SA_G|SA_I )
- tlbentry( CFG_PCI_MEMBASE2, SZ_256M, CFG_PCI_MEMBASE2, 0, AC_R|AC_W|SA_G|SA_I )
- tlbentry( CFG_PCI_MEMBASE3, SZ_256M, CFG_PCI_MEMBASE3, 0, AC_R|AC_W|SA_G|SA_I )
-
- /* USB 2.0 Device */
- tlbentry( CFG_USB_DEVICE, SZ_1K, 0x50000000, 0, AC_R|AC_W|SA_G|SA_I )
-
- tlbtab_end
diff --git a/board/amcc/yosemite/u-boot.lds b/board/amcc/yosemite/u-boot.lds
deleted file mode 100644
index a9a7b0af6a..0000000000
--- a/board/amcc/yosemite/u-boot.lds
+++ /dev/null
@@ -1,157 +0,0 @@
-/*
- * (C) Copyright 2002
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- .resetvec 0xFFFFFFFC :
- {
- *(.resetvec)
- } = 0xffff
-
- .bootpg 0xFFFFF000 :
- {
- cpu/ppc4xx/start.o (.bootpg)
- } = 0xffff
-
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/ppc4xx/start.o (.text)
- board/amcc/yosemite/init.o (.text)
- cpu/ppc4xx/kgdb.o (.text)
- cpu/ppc4xx/traps.o (.text)
- cpu/ppc4xx/interrupts.o (.text)
- cpu/ppc4xx/serial.o (.text)
- cpu/ppc4xx/cpu_init.o (.text)
- cpu/ppc4xx/speed.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/extable.o (.text)
- lib_generic/zlib.o (.text)
-
-/* . = env_offset;*/
-/* common/environment.o(.text)*/
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/amcc/yosemite/yosemite.c b/board/amcc/yosemite/yosemite.c
deleted file mode 100644
index 509d8e4cce..0000000000
--- a/board/amcc/yosemite/yosemite.c
+++ /dev/null
@@ -1,549 +0,0 @@
-/*
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <ppc4xx.h>
-#include <asm/processor.h>
-#include <spd_sdram.h>
-
-extern flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-int board_early_init_f(void)
-{
- register uint reg;
-
- /*--------------------------------------------------------------------
- * Setup the external bus controller/chip selects
- *-------------------------------------------------------------------*/
- mtdcr(ebccfga, xbcfg);
- reg = mfdcr(ebccfgd);
- mtdcr(ebccfgd, reg | 0x04000000); /* Set ATC */
-
- mtebc(pb0ap, 0x03017300); /* FLASH/SRAM */
- mtebc(pb0cr, 0xfc0da000); /* BAS=0xfc0 64MB r/w 16-bit */
-
- mtebc(pb1ap, 0x00000000);
- mtebc(pb1cr, 0x00000000);
-
- mtebc(pb2ap, 0x04814500);
- /*CPLD*/ mtebc(pb2cr, 0x80018000); /*BAS=0x800 1MB r/w 8-bit */
-
- mtebc(pb3ap, 0x00000000);
- mtebc(pb3cr, 0x00000000);
-
- mtebc(pb4ap, 0x00000000);
- mtebc(pb4cr, 0x00000000);
-
- mtebc(pb5ap, 0x00000000);
- mtebc(pb5cr, 0x00000000);
-
- /*--------------------------------------------------------------------
- * Setup the GPIO pins
- *-------------------------------------------------------------------*/
- /*CPLD cs */
- /*setup Address lines for flash size 64Meg. */
- out32(GPIO0_OSRL, in32(GPIO0_OSRL) | 0x50010000);
- out32(GPIO0_TSRL, in32(GPIO0_TSRL) | 0x50010000);
- out32(GPIO0_ISR1L, in32(GPIO0_ISR1L) | 0x50000000);
-
- /*setup emac */
- out32(GPIO0_TCR, in32(GPIO0_TCR) | 0xC080);
- out32(GPIO0_TSRL, in32(GPIO0_TSRL) | 0x40);
- out32(GPIO0_ISR1L, in32(GPIO0_ISR1L) | 0x55);
- out32(GPIO0_OSRH, in32(GPIO0_OSRH) | 0x50004000);
- out32(GPIO0_ISR1H, in32(GPIO0_ISR1H) | 0x00440000);
-
- /*UART1 */
- out32(GPIO1_TCR, in32(GPIO1_TCR) | 0x02000000);
- out32(GPIO1_OSRL, in32(GPIO1_OSRL) | 0x00080000);
- out32(GPIO1_ISR2L, in32(GPIO1_ISR2L) | 0x00010000);
-
- /* external interrupts IRQ0...3 */
- out32(GPIO1_TCR, in32(GPIO1_TCR) & ~0x0f000000);
- out32(GPIO1_TSRL, in32(GPIO1_TSRL) & ~0x00005500);
- out32(GPIO1_ISR1L, in32(GPIO1_ISR1L) | 0x00005500);
-
- /*setup USB 2.0 */
- out32(GPIO1_TCR, in32(GPIO1_TCR) | 0xc0000000);
- out32(GPIO1_OSRL, in32(GPIO1_OSRL) | 0x50000000);
- out32(GPIO0_TCR, in32(GPIO0_TCR) | 0xf);
- out32(GPIO0_OSRH, in32(GPIO0_OSRH) | 0xaa);
- out32(GPIO0_ISR2H, in32(GPIO0_ISR2H) | 0x00000500);
-
- /*--------------------------------------------------------------------
- * Setup the interrupt controller polarities, triggers, etc.
- *-------------------------------------------------------------------*/
- mtdcr(uic0sr, 0xffffffff); /* clear all */
- mtdcr(uic0er, 0x00000000); /* disable all */
- mtdcr(uic0cr, 0x00000009); /* ATI & UIC1 crit are critical */
- mtdcr(uic0pr, 0xfffffe13); /* per ref-board manual */
- mtdcr(uic0tr, 0x01c00008); /* per ref-board manual */
- mtdcr(uic0vr, 0x00000001); /* int31 highest, base=0x000 */
- mtdcr(uic0sr, 0xffffffff); /* clear all */
-
- mtdcr(uic1sr, 0xffffffff); /* clear all */
- mtdcr(uic1er, 0x00000000); /* disable all */
- mtdcr(uic1cr, 0x00000000); /* all non-critical */
- mtdcr(uic1pr, 0xffffe0ff); /* per ref-board manual */
- mtdcr(uic1tr, 0x00ffc000); /* per ref-board manual */
- mtdcr(uic1vr, 0x00000001); /* int31 highest, base=0x000 */
- mtdcr(uic1sr, 0xffffffff); /* clear all */
-
- /*--------------------------------------------------------------------
- * Setup other serial configuration
- *-------------------------------------------------------------------*/
- mfsdr(sdr_pci0, reg);
- mtsdr(sdr_pci0, 0x80000000 | reg); /* PCI arbiter enabled */
- mtsdr(sdr_pfc0, 0x00003e00); /* Pin function */
- mtsdr(sdr_pfc1, 0x00048000); /* Pin function: UART0 has 4 pins */
-
- /*clear tmrclk divisor */
- *(unsigned char *)(CFG_BCSR_BASE | 0x04) = 0x00;
-
- /*enable ethernet */
- *(unsigned char *)(CFG_BCSR_BASE | 0x08) = 0xf0;
-
- /*enable usb 1.1 fs device and remove usb 2.0 reset */
- *(unsigned char *)(CFG_BCSR_BASE | 0x09) = 0x00;
-
- /*get rid of flash write protect */
- *(unsigned char *)(CFG_BCSR_BASE | 0x07) = 0x00;
-
- return 0;
-}
-
-int misc_init_r (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
- uint pbcr;
- int size_val = 0;
-
- /* Re-do sizing to get full correct info */
- mtdcr(ebccfga, pb0cr);
- pbcr = mfdcr(ebccfgd);
- switch (gd->bd->bi_flashsize) {
- case 1 << 20:
- size_val = 0;
- break;
- case 2 << 20:
- size_val = 1;
- break;
- case 4 << 20:
- size_val = 2;
- break;
- case 8 << 20:
- size_val = 3;
- break;
- case 16 << 20:
- size_val = 4;
- break;
- case 32 << 20:
- size_val = 5;
- break;
- case 64 << 20:
- size_val = 6;
- break;
- case 128 << 20:
- size_val = 7;
- break;
- }
- pbcr = (pbcr & 0x0001ffff) | gd->bd->bi_flashstart | (size_val << 17);
- mtdcr(ebccfga, pb0cr);
- mtdcr(ebccfgd, pbcr);
-
- /* adjust flash start and offset */
- gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize;
- gd->bd->bi_flashoffset = 0;
-
- /* Monitor protection ON by default */
- (void)flash_protect(FLAG_PROTECT_SET,
- -CFG_MONITOR_LEN,
- 0xffffffff,
- &flash_info[0]);
-
- return 0;
-}
-
-int checkboard(void)
-{
- char *s = getenv("serial#");
-
- printf("Board: Yosemite - AMCC PPC440EP Evaluation Board");
- if (s != NULL) {
- puts(", serial# ");
- puts(s);
- }
- putc('\n');
-
- return (0);
-}
-
-/*************************************************************************
- * sdram_init -- doesn't use serial presence detect.
- *
- * Assumes: 256 MB, ECC, non-registered
- * PLB @ 133 MHz
- *
- ************************************************************************/
-#define NUM_TRIES 64
-#define NUM_READS 10
-
-void sdram_tr1_set(int ram_address, int* tr1_value)
-{
- int i;
- int j, k;
- volatile unsigned int* ram_pointer = (unsigned int*)ram_address;
- int first_good = -1, last_bad = 0x1ff;
-
- unsigned long test[NUM_TRIES] = {
- 0x00000000, 0x00000000, 0xFFFFFFFF, 0xFFFFFFFF,
- 0x00000000, 0x00000000, 0xFFFFFFFF, 0xFFFFFFFF,
- 0xFFFFFFFF, 0xFFFFFFFF, 0x00000000, 0x00000000,
- 0xFFFFFFFF, 0xFFFFFFFF, 0x00000000, 0x00000000,
- 0xAAAAAAAA, 0xAAAAAAAA, 0x55555555, 0x55555555,
- 0xAAAAAAAA, 0xAAAAAAAA, 0x55555555, 0x55555555,
- 0x55555555, 0x55555555, 0xAAAAAAAA, 0xAAAAAAAA,
- 0x55555555, 0x55555555, 0xAAAAAAAA, 0xAAAAAAAA,
- 0xA5A5A5A5, 0xA5A5A5A5, 0x5A5A5A5A, 0x5A5A5A5A,
- 0xA5A5A5A5, 0xA5A5A5A5, 0x5A5A5A5A, 0x5A5A5A5A,
- 0x5A5A5A5A, 0x5A5A5A5A, 0xA5A5A5A5, 0xA5A5A5A5,
- 0x5A5A5A5A, 0x5A5A5A5A, 0xA5A5A5A5, 0xA5A5A5A5,
- 0xAA55AA55, 0xAA55AA55, 0x55AA55AA, 0x55AA55AA,
- 0xAA55AA55, 0xAA55AA55, 0x55AA55AA, 0x55AA55AA,
- 0x55AA55AA, 0x55AA55AA, 0xAA55AA55, 0xAA55AA55,
- 0x55AA55AA, 0x55AA55AA, 0xAA55AA55, 0xAA55AA55 };
-
- /* go through all possible SDRAM0_TR1[RDCT] values */
- for (i=0; i<=0x1ff; i++) {
- /* set the current value for TR1 */
- mtsdram(mem_tr1, (0x80800800 | i));
-
- /* write values */
- for (j=0; j<NUM_TRIES; j++) {
- ram_pointer[j] = test[j];
-
- /* clear any cache at ram location */
- __asm__("dcbf 0,%0": :"r" (&ram_pointer[j]));
- }
-
- /* read values back */
- for (j=0; j<NUM_TRIES; j++) {
- for (k=0; k<NUM_READS; k++) {
- /* clear any cache at ram location */
- __asm__("dcbf 0,%0": :"r" (&ram_pointer[j]));
-
- if (ram_pointer[j] != test[j])
- break;
- }
-
- /* read error */
- if (k != NUM_READS) {
- break;
- }
- }
-
- /* we have a SDRAM0_TR1[RDCT] that is part of the window */
- if (j == NUM_TRIES) {
- if (first_good == -1)
- first_good = i; /* found beginning of window */
- } else { /* bad read */
- /* if we have not had a good read then don't care */
- if(first_good != -1) {
- /* first failure after a good read */
- last_bad = i-1;
- break;
- }
- }
- }
-
- /* return the current value for TR1 */
- *tr1_value = (first_good + last_bad) / 2;
-}
-
-void sdram_init(void)
-{
- register uint reg;
- int tr1_bank1, tr1_bank2;
-
- /*--------------------------------------------------------------------
- * Setup some default
- *------------------------------------------------------------------*/
- mtsdram(mem_uabba, 0x00000000); /* ubba=0 (default) */
- mtsdram(mem_slio, 0x00000000); /* rdre=0 wrre=0 rarw=0 */
- mtsdram(mem_devopt, 0x00000000); /* dll=0 ds=0 (normal) */
- mtsdram(mem_clktr, 0x40000000); /* ?? */
- mtsdram(mem_wddctr, 0x40000000); /* ?? */
-
- /*clear this first, if the DDR is enabled by a debugger
- then you can not make changes. */
- mtsdram(mem_cfg0, 0x00000000); /* Disable EEC */
-
- /*--------------------------------------------------------------------
- * Setup for board-specific specific mem
- *------------------------------------------------------------------*/
- /*
- * Following for CAS Latency = 2.5 @ 133 MHz PLB
- */
- mtsdram(mem_b0cr, 0x000a4001); /* SDBA=0x000 128MB, Mode 3, enabled */
- mtsdram(mem_b1cr, 0x080a4001); /* SDBA=0x080 128MB, Mode 3, enabled */
-
- mtsdram(mem_tr0, 0x410a4012); /* ?? */
- mtsdram(mem_rtr, 0x04080000); /* ?? */
- mtsdram(mem_cfg1, 0x00000000); /* Self-refresh exit, disable PM */
- mtsdram(mem_cfg0, 0x34000000); /* Disable EEC */
- udelay(400); /* Delay 200 usecs (min) */
-
- /*--------------------------------------------------------------------
- * Enable the controller, then wait for DCEN to complete
- *------------------------------------------------------------------*/
- mtsdram(mem_cfg0, 0x84000000); /* Enable */
-
- for (;;) {
- mfsdram(mem_mcsts, reg);
- if (reg & 0x80000000)
- break;
- }
-
- sdram_tr1_set(0x00000000, &tr1_bank1);
- sdram_tr1_set(0x08000000, &tr1_bank2);
- mtsdram(mem_tr1, (((tr1_bank1+tr1_bank2)/2) | 0x80800800) );
-}
-
-/*************************************************************************
- * long int initdram
- *
- ************************************************************************/
-long int initdram(int board)
-{
- sdram_init();
- return CFG_SDRAM_BANKS * (CFG_KBYTES_SDRAM * 1024); /* return bytes */
-}
-
-#if defined(CFG_DRAM_TEST)
-int testdram(void)
-{
- unsigned long *mem = (unsigned long *)0;
- const unsigned long kend = (1024 / sizeof(unsigned long));
- unsigned long k, n;
-
- mtmsr(0);
-
- for (k = 0; k < CFG_KBYTES_SDRAM;
- ++k, mem += (1024 / sizeof(unsigned long))) {
- if ((k & 1023) == 0) {
- printf("%3d MB\r", k / 1024);
- }
-
- memset(mem, 0xaaaaaaaa, 1024);
- for (n = 0; n < kend; ++n) {
- if (mem[n] != 0xaaaaaaaa) {
- printf("SDRAM test fails at: %08x\n",
- (uint) & mem[n]);
- return 1;
- }
- }
-
- memset(mem, 0x55555555, 1024);
- for (n = 0; n < kend; ++n) {
- if (mem[n] != 0x55555555) {
- printf("SDRAM test fails at: %08x\n",
- (uint) & mem[n]);
- return 1;
- }
- }
- }
- printf("SDRAM test passes\n");
- return 0;
-}
-#endif
-
-/*************************************************************************
- * pci_pre_init
- *
- * This routine is called just prior to registering the hose and gives
- * the board the opportunity to check things. Returning a value of zero
- * indicates that things are bad & PCI initialization should be aborted.
- *
- * Different boards may wish to customize the pci controller structure
- * (add regions, override default access routines, etc) or perform
- * certain pre-initialization actions.
- *
- ************************************************************************/
-#if defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT)
-int pci_pre_init(struct pci_controller *hose)
-{
- unsigned long addr;
-
- /*-------------------------------------------------------------------------+
- | Set priority for all PLB3 devices to 0.
- | Set PLB3 arbiter to fair mode.
- +-------------------------------------------------------------------------*/
- mfsdr(sdr_amp1, addr);
- mtsdr(sdr_amp1, (addr & 0x000000FF) | 0x0000FF00);
- addr = mfdcr(plb3_acr);
- mtdcr(plb3_acr, addr | 0x80000000);
-
- /*-------------------------------------------------------------------------+
- | Set priority for all PLB4 devices to 0.
- +-------------------------------------------------------------------------*/
- mfsdr(sdr_amp0, addr);
- mtsdr(sdr_amp0, (addr & 0x000000FF) | 0x0000FF00);
- addr = mfdcr(plb4_acr) | 0xa0000000; /* Was 0x8---- */
- mtdcr(plb4_acr, addr);
-
- /*-------------------------------------------------------------------------+
- | Set Nebula PLB4 arbiter to fair mode.
- +-------------------------------------------------------------------------*/
- /* Segment0 */
- addr = (mfdcr(plb0_acr) & ~plb0_acr_ppm_mask) | plb0_acr_ppm_fair;
- addr = (addr & ~plb0_acr_hbu_mask) | plb0_acr_hbu_enabled;
- addr = (addr & ~plb0_acr_rdp_mask) | plb0_acr_rdp_4deep;
- addr = (addr & ~plb0_acr_wrp_mask) | plb0_acr_wrp_2deep;
- mtdcr(plb0_acr, addr);
-
- /* Segment1 */
- addr = (mfdcr(plb1_acr) & ~plb1_acr_ppm_mask) | plb1_acr_ppm_fair;
- addr = (addr & ~plb1_acr_hbu_mask) | plb1_acr_hbu_enabled;
- addr = (addr & ~plb1_acr_rdp_mask) | plb1_acr_rdp_4deep;
- addr = (addr & ~plb1_acr_wrp_mask) | plb1_acr_wrp_2deep;
- mtdcr(plb1_acr, addr);
-
- return 1;
-}
-#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT) */
-
-/*************************************************************************
- * pci_target_init
- *
- * The bootstrap configuration provides default settings for the pci
- * inbound map (PIM). But the bootstrap config choices are limited and
- * may not be sufficient for a given board.
- *
- ************************************************************************/
-#if defined(CONFIG_PCI) && defined(CFG_PCI_TARGET_INIT)
-void pci_target_init(struct pci_controller *hose)
-{
- /*--------------------------------------------------------------------------+
- * Set up Direct MMIO registers
- *--------------------------------------------------------------------------*/
- /*--------------------------------------------------------------------------+
- | PowerPC440 EP PCI Master configuration.
- | Map one 1Gig range of PLB/processor addresses to PCI memory space.
- | PLB address 0xA0000000-0xDFFFFFFF ==> PCI address 0xA0000000-0xDFFFFFFF
- | Use byte reversed out routines to handle endianess.
- | Make this region non-prefetchable.
- +--------------------------------------------------------------------------*/
- out32r(PCIX0_PMM0MA, 0x00000000); /* PMM0 Mask/Attribute - disabled b4 setting */
- out32r(PCIX0_PMM0LA, CFG_PCI_MEMBASE); /* PMM0 Local Address */
- out32r(PCIX0_PMM0PCILA, CFG_PCI_MEMBASE); /* PMM0 PCI Low Address */
- out32r(PCIX0_PMM0PCIHA, 0x00000000); /* PMM0 PCI High Address */
- out32r(PCIX0_PMM0MA, 0xE0000001); /* 512M + No prefetching, and enable region */
-
- out32r(PCIX0_PMM1MA, 0x00000000); /* PMM0 Mask/Attribute - disabled b4 setting */
- out32r(PCIX0_PMM1LA, CFG_PCI_MEMBASE2); /* PMM0 Local Address */
- out32r(PCIX0_PMM1PCILA, CFG_PCI_MEMBASE2); /* PMM0 PCI Low Address */
- out32r(PCIX0_PMM1PCIHA, 0x00000000); /* PMM0 PCI High Address */
- out32r(PCIX0_PMM1MA, 0xE0000001); /* 512M + No prefetching, and enable region */
-
- out32r(PCIX0_PTM1MS, 0x00000001); /* Memory Size/Attribute */
- out32r(PCIX0_PTM1LA, 0); /* Local Addr. Reg */
- out32r(PCIX0_PTM2MS, 0); /* Memory Size/Attribute */
- out32r(PCIX0_PTM2LA, 0); /* Local Addr. Reg */
-
- /*--------------------------------------------------------------------------+
- * Set up Configuration registers
- *--------------------------------------------------------------------------*/
-
- /* Program the board's subsystem id/vendor id */
- pci_write_config_word(0, PCI_SUBSYSTEM_VENDOR_ID,
- CFG_PCI_SUBSYS_VENDORID);
- pci_write_config_word(0, PCI_SUBSYSTEM_ID, CFG_PCI_SUBSYS_ID);
-
- /* Configure command register as bus master */
- pci_write_config_word(0, PCI_COMMAND, PCI_COMMAND_MASTER);
-
- /* 240nS PCI clock */
- pci_write_config_word(0, PCI_LATENCY_TIMER, 1);
-
- /* No error reporting */
- pci_write_config_word(0, PCI_ERREN, 0);
-
- pci_write_config_dword(0, PCI_BRDGOPT2, 0x00000101);
-
-}
-#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_TARGET_INIT) */
-
-/*************************************************************************
- * pci_master_init
- *
- ************************************************************************/
-#if defined(CONFIG_PCI) && defined(CFG_PCI_MASTER_INIT)
-void pci_master_init(struct pci_controller *hose)
-{
- unsigned short temp_short;
-
- /*--------------------------------------------------------------------------+
- | Write the PowerPC440 EP PCI Configuration regs.
- | Enable PowerPC440 EP to be a master on the PCI bus (PMM).
- | Enable PowerPC440 EP to act as a PCI memory target (PTM).
- +--------------------------------------------------------------------------*/
- pci_read_config_word(0, PCI_COMMAND, &temp_short);
- pci_write_config_word(0, PCI_COMMAND,
- temp_short | PCI_COMMAND_MASTER |
- PCI_COMMAND_MEMORY);
-}
-#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_MASTER_INIT) */
-
-/*************************************************************************
- * is_pci_host
- *
- * This routine is called to determine if a pci scan should be
- * performed. With various hardware environments (especially cPCI and
- * PPMC) it's insufficient to depend on the state of the arbiter enable
- * bit in the strap register, or generic host/adapter assumptions.
- *
- * Rather than hard-code a bad assumption in the general 440 code, the
- * 440 pci code requires the board to decide at runtime.
- *
- * Return 0 for adapter mode, non-zero for host (monarch) mode.
- *
- *
- ************************************************************************/
-#if defined(CONFIG_PCI)
-int is_pci_host(struct pci_controller *hose)
-{
- /* Bamboo is always configured as host. */
- return (1);
-}
-#endif /* defined(CONFIG_PCI) */
-
-/*************************************************************************
- * hw_watchdog_reset
- *
- * This routine is called to reset (keep alive) the watchdog timer
- *
- ************************************************************************/
-#if defined(CONFIG_HW_WATCHDOG)
-void hw_watchdog_reset(void)
-{
-
-}
-#endif
diff --git a/board/amirix/ap1000/Makefile b/board/amirix/ap1000/Makefile
deleted file mode 100644
index 4e1ef217ca..0000000000
--- a/board/amirix/ap1000/Makefile
+++ /dev/null
@@ -1,47 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o serial.o pci.o powerspan.o
-SOBJS = init.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $^
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/amirix/ap1000/ap1000.c b/board/amirix/ap1000/ap1000.c
deleted file mode 100644
index dd836ce221..0000000000
--- a/board/amirix/ap1000/ap1000.c
+++ /dev/null
@@ -1,699 +0,0 @@
-/*
- * amirix.c: ppcboot platform support for AMIRIX board
- *
- * Copyright 2002 Mind NV
- * Copyright 2003 AMIRIX Systems Inc.
- *
- * http://www.mind.be/
- * http://www.amirix.com/
- *
- * Author : Peter De Schrijver (p2@mind.be)
- * Frank Smith (smith@amirix.com)
- *
- * Derived from : Other platform support files in this tree, ml2
- *
- * This software may be used and distributed according to the terms of
- * the GNU General Public License (GPL) version 2, incorporated herein by
- * reference. Drivers based on or derived from this code fall under the GPL
- * and must retain the authorship, copyright and this license notice. This
- * file is not a complete program and may only be used when the entire
- * program is licensed under the GPL.
- *
- */
-
-#include <common.h>
-#include <command.h>
-#include <asm/processor.h>
-
-#include "powerspan.h"
-#include "ap1000.h"
-
-int board_pre_init (void)
-{
- return 0;
-}
-
-/** serial number and platform display at startup */
-int checkboard (void)
-{
- unsigned char *s = getenv ("serial#");
- unsigned char *e;
-
- /* After a loadace command, the SystemAce control register is left in a wonky state. */
- /* this code did not work in board_pre_init */
- unsigned char *p = (unsigned char *) AP1000_SYSACE_REGBASE;
-
- p[SYSACE_CTRLREG0] = 0x0;
-
- /* add platform and device to banner */
- switch (get_device ()) {
- case AP1xx_AP107_TARGET:
- puts (AP1xx_AP107_TARGET_STR);
- break;
- case AP1xx_AP120_TARGET:
- puts (AP1xx_AP120_TARGET_STR);
- break;
- case AP1xx_AP130_TARGET:
- puts (AP1xx_AP130_TARGET_STR);
- break;
- case AP1xx_AP1070_TARGET:
- puts (AP1xx_AP1070_TARGET_STR);
- break;
- case AP1xx_AP1100_TARGET:
- puts (AP1xx_AP1100_TARGET_STR);
- break;
- default:
- puts (AP1xx_UNKNOWN_STR);
- break;
- }
- puts (AP1xx_TARGET_STR);
- puts (" with ");
-
- switch (get_platform ()) {
- case AP100_BASELINE_PLATFORM:
- case AP1000_BASELINE_PLATFORM:
- puts (AP1xx_BASELINE_PLATFORM_STR);
- break;
- case AP1xx_QUADGE_PLATFORM:
- puts (AP1xx_QUADGE_PLATFORM_STR);
- break;
- case AP1xx_MGT_REF_PLATFORM:
- puts (AP1xx_MGT_REF_PLATFORM_STR);
- break;
- case AP1xx_STANDARD_PLATFORM:
- puts (AP1xx_STANDARD_PLATFORM_STR);
- break;
- case AP1xx_DUAL_PLATFORM:
- puts (AP1xx_DUAL_PLATFORM_STR);
- break;
- case AP1xx_BASE_SRAM_PLATFORM:
- puts (AP1xx_BASE_SRAM_PLATFORM_STR);
- break;
- case AP1xx_PCI_PCB_TESTPLATFORM:
- case AP1000_PCI_PCB_TESTPLATFORM:
- puts (AP1xx_PCI_PCB_TESTPLATFORM_STR);
- break;
- case AP1xx_DUAL_GE_MEZZ_TESTPLATFORM:
- puts (AP1xx_DUAL_GE_MEZZ_TESTPLATFORM_STR);
- break;
- case AP1xx_SFP_MEZZ_TESTPLATFORM:
- puts (AP1xx_SFP_MEZZ_TESTPLATFORM_STR);
- break;
- default:
- puts (AP1xx_UNKNOWN_STR);
- break;
- }
-
- if ((get_platform () & AP1xx_TESTPLATFORM_MASK) != 0) {
- puts (AP1xx_TESTPLATFORM_STR);
- } else {
- puts (AP1xx_PLATFORM_STR);
- }
-
- putc ('\n');
-
- puts ("Serial#: ");
-
- if (!s) {
- printf ("### No HW ID - assuming AMIRIX");
- } else {
- for (e = s; *e; ++e) {
- if (*e == ' ')
- break;
- }
-
- for (; s < e; ++s) {
- putc (*s);
- }
- }
-
- putc ('\n');
-
- return (0);
-}
-
-
-long int initdram (int board_type)
-{
- unsigned char *s = getenv ("dramsize");
-
- if (s != NULL) {
- if ((s[0] == '0') && ((s[1] == 'x') || (s[1] == 'X'))) {
- s += 2;
- }
- return simple_strtoul (s, NULL, 16);
- } else {
- /* give all 64 MB */
- return 64 * 1024 * 1024;
- }
-}
-
-unsigned int get_platform (void)
-{
- unsigned int *revision_reg_ptr = (unsigned int *) AP1xx_FPGA_REV_ADDR;
-
- return (*revision_reg_ptr & AP1xx_PLATFORM_MASK);
-}
-
-unsigned int get_device (void)
-{
- unsigned int *revision_reg_ptr = (unsigned int *) AP1xx_FPGA_REV_ADDR;
-
- return (*revision_reg_ptr & AP1xx_TARGET_MASK);
-}
-
-#if 0 /* loadace is not working; it appears to be a hardware issue with the system ace. */
-/*
- This function loads FPGA configurations from the SystemACE CompactFlash
-*/
-int do_loadace (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
-{
- unsigned char *p = (unsigned char *) AP1000_SYSACE_REGBASE;
- int cfg;
-
- if ((p[SYSACE_STATREG0] & 0x10) == 0) {
- p[SYSACE_CTRLREG0] = 0x80;
- printf ("\nNo CompactFlash Detected\n\n");
- p[SYSACE_CTRLREG0] = 0x00;
- return 1;
- }
-
- /* reset configuration controller: | 0x80 */
- /* select cpflash & ~0x40 */
- /* cfg start | 0x20 */
- /* wait for cfgstart & ~0x10 */
- /* force cfgmode: | 0x08 */
- /* do no force cfgaddr: & ~0x04 */
- /* clear mpulock: & ~0x02 */
- /* do not force lock request & ~0x01 */
-
- p[SYSACE_CTRLREG0] = 0x80 | 0x20 | 0x08;
- p[SYSACE_CTRLREG1] = 0x00;
-
- /* force config address if arg2 exists */
- if (argc == 2) {
- cfg = simple_strtoul (argv[1], NULL, 10);
-
- if (cfg > 7) {
- printf ("\nInvalid Configuration\n\n");
- p[SYSACE_CTRLREG0] = 0x00;
- return 1;
- }
- /* Set config address */
- p[SYSACE_CTRLREG1] = (cfg << 5);
- /* force cfgaddr */
- p[SYSACE_CTRLREG0] |= 0x04;
-
- } else {
- cfg = (p[SYSACE_STATREG1] & 0xE0) >> 5;
- }
-
- /* release configuration controller */
- printf ("\nLoading V2PRO with config %d...\n", cfg);
- p[SYSACE_CTRLREG0] &= ~0x80;
-
-
- while ((p[SYSACE_STATREG1] & 0x01) == 0) {
-
- if (p[SYSACE_ERRREG0] & 0x80) {
- /* attempting to load an invalid configuration makes the cpflash */
- /* appear to be removed. Reset here to avoid that problem */
- p[SYSACE_CTRLREG0] = 0x80;
- printf ("\nConfiguration %d Read Error\n\n", cfg);
- p[SYSACE_CTRLREG0] = 0x00;
- return 1;
- }
- }
-
- p[SYSACE_CTRLREG0] |= 0x20;
-
- return 0;
-}
-#endif
-
-/** Console command to display and set the software reconfigure byte
- * <pre>
- * swconfig - display the current value of the software reconfigure byte
- * swconfig [#] - change the software reconfigure byte to #
- * </pre>
- * @param *cmdtp [IN] as passed by run_command (ignored)
- * @param flag [IN] as passed by run_command (ignored)
- * @param argc [IN] as passed by run_command if 1, display, if 2 change
- * @param *argv[] [IN] contains the parameters to use
- * @return
- * <pre>
- * 0 if passed
- * -1 if failed
- * </pre>
- */
-int do_swconfigbyte (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
-{
- unsigned char *sector_buffer = NULL;
- unsigned char input_char;
- int write_result;
- unsigned int input_uint;
-
- /* display value if no argument */
- if (argc < 2) {
- printf ("Software configuration byte is currently: 0x%02x\n",
- *((unsigned char *) (SW_BYTE_SECTOR_ADDR +
- SW_BYTE_SECTOR_OFFSET)));
- return 0;
- } else if (argc > 3) {
- printf ("Too many arguments\n");
- return -1;
- }
-
- /* if 3 arguments, 3rd argument is the address to use */
- if (argc == 3) {
- input_uint = simple_strtoul (argv[1], NULL, 16);
- sector_buffer = (unsigned char *) input_uint;
- } else {
- sector_buffer = (unsigned char *) DEFAULT_TEMP_ADDR;
- }
-
- input_char = simple_strtoul (argv[1], NULL, 0);
- if ((input_char & ~SW_BYTE_MASK) != 0) {
- printf ("Input of 0x%02x will be masked to 0x%02x\n",
- input_char, (input_char & SW_BYTE_MASK));
- input_char = input_char & SW_BYTE_MASK;
- }
-
- memcpy (sector_buffer, (void *) SW_BYTE_SECTOR_ADDR,
- SW_BYTE_SECTOR_SIZE);
- sector_buffer[SW_BYTE_SECTOR_OFFSET] = input_char;
-
-
- printf ("Erasing Flash...");
- if (flash_sect_erase
- (SW_BYTE_SECTOR_ADDR,
- (SW_BYTE_SECTOR_ADDR + SW_BYTE_SECTOR_OFFSET))) {
- return -1;
- }
-
- printf ("Writing to Flash... ");
- write_result =
- flash_write (sector_buffer, SW_BYTE_SECTOR_ADDR,
- SW_BYTE_SECTOR_SIZE);
- if (write_result != 0) {
- flash_perror (write_result);
- return -1;
- } else {
- printf ("done\n");
- printf ("Software configuration byte is now: 0x%02x\n",
- *((unsigned char *) (SW_BYTE_SECTOR_ADDR +
- SW_BYTE_SECTOR_OFFSET)));
- }
-
- return 0;
-}
-
-#define ONE_SECOND 1000000
-
-int do_pause (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
-{
- int pause_time;
- unsigned int delay_time;
- int break_loop = 0;
-
- /* display value if no argument */
- if (argc < 2) {
- pause_time = 1;
- }
-
- else if (argc > 2) {
- printf ("Too many arguments\n");
- return -1;
- } else {
- pause_time = simple_strtoul (argv[1], NULL, 0);
- }
-
- printf ("Pausing with a poll time of %d, press any key to reactivate\n", pause_time);
- delay_time = pause_time * ONE_SECOND;
- while (break_loop == 0) {
- udelay (delay_time);
- if (serial_tstc () != 0) {
- break_loop = 1;
- /* eat user key presses */
- while (serial_tstc () != 0) {
- serial_getc ();
- }
- }
- }
-
- return 0;
-}
-
-int do_swreconfig (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
-{
- printf ("Triggering software reconfigure (software config byte is 0x%02x)...\n",
- *((unsigned char *) (SW_BYTE_SECTOR_ADDR + SW_BYTE_SECTOR_OFFSET)));
- udelay (1000);
- *((unsigned char *) AP1000_CPLD_BASE) = 1;
-
- return 0;
-}
-
-#define GET_DECIMAL(low_byte) ((low_byte >> 5) * 125)
-#define TEMP_BUSY_BIT 0x80
-#define TEMP_LHIGH_BIT 0x40
-#define TEMP_LLOW_BIT 0x20
-#define TEMP_EHIGH_BIT 0x10
-#define TEMP_ELOW_BIT 0x08
-#define TEMP_OPEN_BIT 0x04
-#define TEMP_ETHERM_BIT 0x02
-#define TEMP_LTHERM_BIT 0x01
-
-int do_temp_sensor (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
-{
- char cmd;
- int ret_val = 0;
- unsigned char temp_byte;
- int temp;
- int temp_low;
- int low;
- int low_low;
- int high;
- int high_low;
- int therm;
- unsigned char user_data[4] = { 0 };
- int user_data_count = 0;
- int ii;
-
- if (argc > 1) {
- cmd = argv[1][0];
- } else {
- cmd = 's'; /* default to status */
- }
-
- user_data_count = argc - 2;
- for (ii = 0; ii < user_data_count; ii++) {
- user_data[ii] = simple_strtoul (argv[2 + ii], NULL, 0);
- }
- switch (cmd) {
- case 's':
- if (I2CAccess
- (0x2, I2C_SENSOR_DEV, I2C_SENSOR_CHIP_SEL,
- &temp_byte, I2C_READ) != 0) {
- goto fail;
- }
- printf ("Status : 0x%02x ", temp_byte);
- if (temp_byte & TEMP_BUSY_BIT)
- printf ("BUSY ");
-
- if (temp_byte & TEMP_LHIGH_BIT)
- printf ("LHIGH ");
-
- if (temp_byte & TEMP_LLOW_BIT)
- printf ("LLOW ");
-
- if (temp_byte & TEMP_EHIGH_BIT)
- printf ("EHIGH ");
-
- if (temp_byte & TEMP_ELOW_BIT)
- printf ("ELOW ");
-
- if (temp_byte & TEMP_OPEN_BIT)
- printf ("OPEN ");
-
- if (temp_byte & TEMP_ETHERM_BIT)
- printf ("ETHERM ");
-
- if (temp_byte & TEMP_LTHERM_BIT)
- printf ("LTHERM");
-
- printf ("\n");
-
- if (I2CAccess
- (0x3, I2C_SENSOR_DEV, I2C_SENSOR_CHIP_SEL,
- &temp_byte, I2C_READ) != 0) {
- goto fail;
- }
- printf ("Config : 0x%02x ", temp_byte);
-
- if (I2CAccess
- (0x4, I2C_SENSOR_DEV, I2C_SENSOR_CHIP_SEL,
- &temp_byte, I2C_READ) != 0) {
- printf ("\n");
- goto fail;
- }
- printf ("Conversion: 0x%02x\n", temp_byte);
- if (I2CAccess
- (0x22, I2C_SENSOR_DEV, I2C_SENSOR_CHIP_SEL,
- &temp_byte, I2C_READ) != 0) {
- goto fail;
- }
- printf ("Cons Alert: 0x%02x ", temp_byte);
-
- if (I2CAccess
- (0x21, I2C_SENSOR_DEV, I2C_SENSOR_CHIP_SEL,
- &temp_byte, I2C_READ) != 0) {
- printf ("\n");
- goto fail;
- }
- printf ("Therm Hyst: %d\n", temp_byte);
-
- if (I2CAccess
- (0x0, I2C_SENSOR_DEV, I2C_SENSOR_CHIP_SEL,
- &temp_byte, I2C_READ) != 0) {
- goto fail;
- }
- temp = temp_byte;
- if (I2CAccess
- (0x6, I2C_SENSOR_DEV, I2C_SENSOR_CHIP_SEL,
- &temp_byte, I2C_READ) != 0) {
- goto fail;
- }
- low = temp_byte;
- if (I2CAccess
- (0x5, I2C_SENSOR_DEV, I2C_SENSOR_CHIP_SEL,
- &temp_byte, I2C_READ) != 0) {
- goto fail;
- }
- high = temp_byte;
- if (I2CAccess
- (0x20, I2C_SENSOR_DEV, I2C_SENSOR_CHIP_SEL,
- &temp_byte, I2C_READ) != 0) {
- goto fail;
- }
- therm = temp_byte;
- printf ("Local Temp: %2d Low: %2d High: %2d THERM: %2d\n", temp, low, high, therm);
-
- if (I2CAccess
- (0x1, I2C_SENSOR_DEV, I2C_SENSOR_CHIP_SEL,
- &temp_byte, I2C_READ) != 0) {
- goto fail;
- }
- temp = temp_byte;
- if (I2CAccess
- (0x10, I2C_SENSOR_DEV, I2C_SENSOR_CHIP_SEL,
- &temp_byte, I2C_READ) != 0) {
- goto fail;
- }
- temp_low = temp_byte;
- if (I2CAccess
- (0x8, I2C_SENSOR_DEV, I2C_SENSOR_CHIP_SEL,
- &temp_byte, I2C_READ) != 0) {
- goto fail;
- }
- low = temp_byte;
- if (I2CAccess
- (0x14, I2C_SENSOR_DEV, I2C_SENSOR_CHIP_SEL,
- &temp_byte, I2C_READ) != 0) {
- goto fail;
- }
- low_low = temp_byte;
- if (I2CAccess
- (0x7, I2C_SENSOR_DEV, I2C_SENSOR_CHIP_SEL,
- &temp_byte, I2C_READ) != 0) {
- goto fail;
- }
- high = temp_byte;
- if (I2CAccess
- (0x13, I2C_SENSOR_DEV, I2C_SENSOR_CHIP_SEL,
- &temp_byte, I2C_READ) != 0) {
- goto fail;
- }
- high_low = temp_byte;
- if (I2CAccess
- (0x19, I2C_SENSOR_DEV, I2C_SENSOR_CHIP_SEL,
- &temp_byte, I2C_READ) != 0) {
- goto fail;
- }
- therm = temp_byte;
- if (I2CAccess
- (0x11, I2C_SENSOR_DEV, I2C_SENSOR_CHIP_SEL,
- &temp_byte, I2C_READ) != 0) {
- goto fail;
- }
- printf ("Ext Temp : %2d.%03d Low: %2d.%03d High: %2d.%03d THERM: %2d Offset: %2d\n", temp, GET_DECIMAL (temp_low), low, GET_DECIMAL (low_low), high, GET_DECIMAL (high_low), therm, temp_byte);
- break;
- case 'l': /* alter local limits : low, high, therm */
- if (argc < 3) {
- goto usage;
- }
-
- /* low */
- if (I2CAccess
- (0xC, I2C_SENSOR_DEV, I2C_SENSOR_CHIP_SEL,
- &user_data[0], I2C_WRITE) != 0) {
- goto fail;
- }
-
- if (user_data_count > 1) {
- /* high */
- if (I2CAccess
- (0xB, I2C_SENSOR_DEV, I2C_SENSOR_CHIP_SEL,
- &user_data[1], I2C_WRITE) != 0) {
- goto fail;
- }
- }
-
- if (user_data_count > 2) {
- /* therm */
- if (I2CAccess
- (0x20, I2C_SENSOR_DEV,
- I2C_SENSOR_CHIP_SEL, &user_data[2],
- I2C_WRITE) != 0) {
- goto fail;
- }
- }
- break;
- case 'e': /* alter external limits: low, high, therm, offset */
- if (argc < 3) {
- goto usage;
- }
-
- /* low */
- if (I2CAccess
- (0xE, I2C_SENSOR_DEV, I2C_SENSOR_CHIP_SEL,
- &user_data[0], I2C_WRITE) != 0) {
- goto fail;
- }
-
- if (user_data_count > 1) {
- /* high */
- if (I2CAccess
- (0xD, I2C_SENSOR_DEV, I2C_SENSOR_CHIP_SEL,
- &user_data[1], I2C_WRITE) != 0) {
- goto fail;
- }
- }
-
- if (user_data_count > 2) {
- /* therm */
- if (I2CAccess
- (0x19, I2C_SENSOR_DEV,
- I2C_SENSOR_CHIP_SEL, &user_data[2],
- I2C_WRITE) != 0) {
- goto fail;
- }
- }
-
- if (user_data_count > 3) {
- /* offset */
- if (I2CAccess
- (0x11, I2C_SENSOR_DEV,
- I2C_SENSOR_CHIP_SEL, &user_data[3],
- I2C_WRITE) != 0) {
- goto fail;
- }
- }
- break;
- case 'c': /* alter config settings: config, conv, cons alert, therm hyst */
- if (argc < 3) {
- goto usage;
- }
-
- /* config */
- if (I2CAccess
- (0x9, I2C_SENSOR_DEV, I2C_SENSOR_CHIP_SEL,
- &user_data[0], I2C_WRITE) != 0) {
- goto fail;
- }
-
- if (user_data_count > 1) {
- /* conversion */
- if (I2CAccess
- (0xA, I2C_SENSOR_DEV, I2C_SENSOR_CHIP_SEL,
- &user_data[1], I2C_WRITE) != 0) {
- goto fail;
- }
- }
-
- if (user_data_count > 2) {
- /* cons alert */
- if (I2CAccess
- (0x22, I2C_SENSOR_DEV,
- I2C_SENSOR_CHIP_SEL, &user_data[2],
- I2C_WRITE) != 0) {
- goto fail;
- }
- }
-
- if (user_data_count > 3) {
- /* therm hyst */
- if (I2CAccess
- (0x21, I2C_SENSOR_DEV,
- I2C_SENSOR_CHIP_SEL, &user_data[3],
- I2C_WRITE) != 0) {
- goto fail;
- }
- }
- break;
- default:
- goto usage;
- }
-
- goto done;
-fail:
- printf ("Access to sensor failed\n");
- ret_val = -1;
- goto done;
-usage:
- printf ("Usage:\n%s\n", cmdtp->help);
-
-done:
- return ret_val;
-}
-
-U_BOOT_CMD (temp, 6, 0, do_temp_sensor,
- "temp - interact with the temperature sensor\n",
- "temp [s]\n"
- " - Show status.\n"
- "temp l LOW [HIGH] [THERM]\n"
- " - Set local limits.\n"
- "temp e LOW [HIGH] [THERM] [OFFSET]\n"
- " - Set external limits.\n"
- "temp c CONFIG [CONVERSION] [CONS. ALERT] [THERM HYST]\n"
- " - Set config options.\n"
- "\n"
- "All values can be decimal or hex (hex preceded with 0x).\n"
- "Only whole numbers are supported for external limits.\n");
-
-#if 0
-U_BOOT_CMD (loadace, 2, 0, do_loadace,
- "loadace - load fpga configuration from System ACE compact flash\n",
- "N\n"
- " - Load configuration N (0-7) from System ACE compact flash\n"
- "loadace\n" " - loads default configuration\n");
-#endif
-
-U_BOOT_CMD (swconfig, 2, 0, do_swconfigbyte,
- "swconfig- display or modify the software configuration byte\n",
- "N [ADDRESS]\n"
- " - set software configuration byte to N, optionally use ADDRESS as\n"
- " location of buffer for flash copy\n"
- "swconfig\n" " - display software configuration byte\n");
-
-U_BOOT_CMD (pause, 2, 0, do_pause,
- "pause - sleep processor until any key is pressed with poll time of N seconds\n",
- "N\n"
- " - sleep processor until any key is pressed with poll time of N seconds\n"
- "pause\n"
- " - sleep processor until any key is pressed with poll time of 1 second\n");
-
-U_BOOT_CMD (swrecon, 1, 0, do_swreconfig,
- "swrecon - trigger a board reconfigure to the software selected configuration\n",
- "\n"
- " - trigger a board reconfigure to the software selected configuration\n");
diff --git a/board/amirix/ap1000/ap1000.h b/board/amirix/ap1000/ap1000.h
deleted file mode 100644
index 118c4d1b9a..0000000000
--- a/board/amirix/ap1000/ap1000.h
+++ /dev/null
@@ -1,173 +0,0 @@
-/*
- * ap1000.h: AP1000 (e.g. AP1070, AP1100) board specific definitions and functions that are needed globally
- *
- * Author : James MacAulay
- *
- * This software may be used and distributed according to the terms of
- * the GNU General Public License (GPL) version 2, incorporated herein by
- * reference. Drivers based on or derived from this code fall under the GPL
- * and must retain the authorship, copyright and this license notice. This
- * file is not a complete program and may only be used when the entire
- * program is licensed under the GPL.
- *
- */
-
-#ifndef __AP1000_H
-#define __AP1000_H
-
-/*
- * Revision Register stuff
- */
-#define AP1xx_FPGA_REV_ADDR 0x29000000
-
-#define AP1xx_PLATFORM_MASK 0xFF000000
-#define AP100_BASELINE_PLATFORM 0x01000000
-#define AP1xx_QUADGE_PLATFORM 0x02000000
-#define AP1xx_MGT_REF_PLATFORM 0x03000000
-#define AP1xx_STANDARD_PLATFORM 0x04000000
-#define AP1xx_DUAL_PLATFORM 0x05000000
-#define AP1xx_BASE_SRAM_PLATFORM 0x06000000
-
-#define AP1000_BASELINE_PLATFORM 0x21000000
-
-#define AP1xx_TESTPLATFORM_MASK 0xC0000000
-#define AP1xx_PCI_PCB_TESTPLATFORM 0xC0000000
-#define AP1xx_DUAL_GE_MEZZ_TESTPLATFORM 0xC1000000
-#define AP1xx_SFP_MEZZ_TESTPLATFORM 0xC2000000
-
-#define AP1000_PCI_PCB_TESTPLATFORM 0xC3000000
-
-#define AP1xx_TARGET_MASK 0x00FF0000
-#define AP1xx_AP107_TARGET 0x00010000
-#define AP1xx_AP120_TARGET 0x00020000
-#define AP1xx_AP130_TARGET 0x00030000
-#define AP1xx_AP1070_TARGET 0x00040000
-#define AP1xx_AP1100_TARGET 0x00050000
-
-#define AP1xx_UNKNOWN_STR "Unknown"
-
-#define AP1xx_PLATFORM_STR " Platform"
-#define AP1xx_BASELINE_PLATFORM_STR "Baseline"
-#define AP1xx_QUADGE_PLATFORM_STR "Quad GE"
-#define AP1xx_MGT_REF_PLATFORM_STR "MGT Reference"
-#define AP1xx_STANDARD_PLATFORM_STR "Standard"
-#define AP1xx_DUAL_PLATFORM_STR "Dual"
-#define AP1xx_BASE_SRAM_PLATFORM_STR "Baseline with SRAM"
-
-#define AP1xx_TESTPLATFORM_STR " Test Platform"
-#define AP1xx_PCI_PCB_TESTPLATFORM_STR "Base"
-#define AP1xx_DUAL_GE_MEZZ_TESTPLATFORM_STR "Dual GE Mezzanine"
-#define AP1xx_SFP_MEZZ_TESTPLATFORM_STR "SFP Mezzanine"
-
-#define AP1xx_TARGET_STR " Board"
-#define AP1xx_AP107_TARGET_STR "AP107"
-#define AP1xx_AP120_TARGET_STR "AP120"
-#define AP1xx_AP130_TARGET_STR "AP130"
-
-#define AP1xx_AP1070_TARGET_STR "AP1070"
-#define AP1xx_AP1100_TARGET_STR "AP1100"
-
-/*
- * Flash Stuff
- */
-#define AP1xx_PROGRAM_FLASH_INDEX 0
-#define AP1xx_CONFIG_FLASH_INDEX 1
-
-/*
- * System Ace Stuff
- */
-#define AP1000_SYSACE_REGBASE 0x28000000
-
-#define SYSACE_STATREG0 0x04 /* 7:0 */
-#define SYSACE_STATREG1 0x05 /* 15:8 */
-#define SYSACE_STATREG2 0x06 /* 23:16 */
-#define SYSACE_STATREG3 0x07 /* 31:24 */
-
-#define SYSACE_ERRREG0 0x08 /* 7:0 */
-#define SYSACE_ERRREG1 0x09 /* 15:8 */
-#define SYSACE_ERRREG2 0x0a /* 23:16 */
-#define SYSACE_ERRREG3 0x0b /* 31:24 */
-
-#define SYSACE_CTRLREG0 0x18 /* 7:0 */
-#define SYSACE_CTRLREG1 0x19 /* 15:8 */
-#define SYSACE_CTRLREG2 0x1A /* 23:16 */
-#define SYSACE_CTRLREG3 0x1B /* 31:24 */
-
-/*
- * Software reconfig thing
- */
-#define SW_BYTE_SECTOR_ADDR 0x24FE0000
-#define SW_BYTE_SECTOR_OFFSET 0x0001FFFF
-#define SW_BYTE_SECTOR_SIZE 0x00020000
-#define SW_BYTE_MASK 0x00000003
-
-#define DEFAULT_TEMP_ADDR 0x00100000
-
-#define AP1000_CPLD_BASE 0x26000000
-
-/* PowerSpan II Stuff */
-#define PSII_SYNC() asm("eieio")
-#define PSPAN_BASEADDR 0x30000000
-#define EEPROM_DEFAULT { 0x01, /* Byte 0 - Long Load = 0x02, short = 01, use 0xff for try no load */ \
- 0x0,0x0,0x0, /* Bytes 1 - 3 Power span reserved */ \
- 0x0, /* Byte 4 - Powerspan reserved - start of short load */ \
- 0x0F, /* Byte 5 - Enable PCI 1 & 2 as Bus masters and Memory targets. */ \
- 0x0E, /* Byte 6 - PCI 1 Target image prefetch - on for image 0,1,2, off for i20 & 3. */ \
- 0x00, 0x00, /* Byte 7,8 - PCI-1 Subsystem ID - */ \
- 0x00, 0x00, /* Byte 9,10 - PCI-1 Subsystem Vendor Id - */ \
- 0x00, /* Byte 11 - No PCI interrupt generation on PCI-1 PCI-2 int A */ \
- 0x1F, /* Byte 12 - PCI-1 enable bridge registers, all target images */ \
- 0xBA, /* Byte 13 - Target 0 image 128 Meg(Ram), Target 1 image 64 Meg. (config Flash/CPLD )*/ \
- 0xA0, /* Byte 14 - Target 2 image 64 Meg(program Flash), target 3 64k. */ \
- 0x00, /* Byte 15 - Vital Product Data Disabled. */ \
- 0x88, /* Byte 16 - PCI arbiter config complete, all requests routed through PCI-1, Unlock PCI-1 */ \
- 0x40, /* Byte 17 - Interrupt direction control - PCI-1 Int A out, everything else in. */ \
- 0x00, /* Byte 18 - I2O disabled */ \
- 0x00, /* Byte 19 - PCI-2 Target image prefetch - off for all images. */ \
- 0x00,0x00, /* Bytes 20,21 - PCI 2 Subsystem Id */ \
- 0x00,0x00, /* Bytes 22,23 - PCI 2 Subsystem Vendor id */ \
- 0x0C, /* Byte 24 - PCI-2 BAR enables, target image 0, & 1 */ \
- 0xBB, /* Byte 25 - PCI-2 target 0 - 128 Meg(Ram), target 1 - 128 Meg (program/config flash) */ \
- 0x00, /* Byte 26 - PCI-2 target 2 & 3 unused. */ \
- 0x00,0x00,0x00,0x00,0x00, /* Bytes 27,28,29,30, 31 - Reserved */ \
- /* Long Load Information */ \
- 0x82,0x60, /* Bytes 32,33 - PCI-1 Device ID - Powerspan II */ \
- 0x10,0xE3, /* Bytes 24,35 - PCI-1 Vendor ID - Tundra */ \
- 0x06, /* Byte 36 - PCI-1 Class Base - Bridge device. */ \
- 0x80, /* Byte 37 - PCI-1 Class sub class - Other bridge. */ \
- 0x00, /* Byte 38 - PCI-1 Class programing interface - Other bridge */ \
- 0x01, /* Byte 39 - Power span revision 1. */ \
- 0x6E, /* Byte 40 - PB SI0 enabled, translation enabled, decode enabled, 64 Meg */ \
- 0x40, /* Byte 41 - PB SI0 memory command mode, PCI-1 dest */ \
- 0x22, /* Byte 42 - Prefetch discard after read, PCI-little endian conversion, 32 byte prefetch */ \
- 0x00,0x00, /* Bytes 43, 44 - Translation address for SI0, set to zero for now. */ \
- 0x0E, /* Byte 45 - Translation address (0) and PB bus master enables - all. */ \
- 0x2c,00,00, /* Bytes 46,47,48 - PB SI0 processor base address - 0x2C000000 */ \
- 0x30,00,00, /* Bytes 49,50,51 - PB Address for Powerspan registers - 0x30000000, big Endian */ \
- 0x82,0x60, /* Bytes 52, 53 - PCI-2 Device ID - Powerspan II */ \
- 0x10,0xE3, /* Bytes 54,55 - PCI 2 Vendor Id - Tundra */ \
- 0x06, /* Byte 56 - PCI-2 Class Base - Bridge device */ \
- 0x80, /* Byte 57 - PCI-2 Class sub class - Other Bridge. */ \
- 0x00, /* Byte 58 - PCI-2 class programming interface - Other bridge */ \
- 0x01, /* Byte 59 - PCI-2 class revision 1 */ \
- 0x00,0x00,0x00,0x00 }; /* Bytes 60,61, 62, 63 - Powerspan reserved */
-
-
-#define EEPROM_LENGTH 64 /* Long Load */
-
-#define I2C_SENSOR_DEV 0x9
-#define I2C_SENSOR_CHIP_SEL 0x4
-
-/*
- * Board Functions
- */
-void set_eat_machine_checks(int a_flag);
-int get_eat_machine_checks(void);
-unsigned int get_platform(void);
-unsigned int get_device(void);
-void* memcpyb(void * dest,const void *src,size_t count);
-int process_bootflag(ulong bootflag);
-void user_led_on(void);
-void user_led_off(void);
-
-#endif /* __COMMON_H_ */
diff --git a/board/amirix/ap1000/config.mk b/board/amirix/ap1000/config.mk
deleted file mode 100644
index c09783a6ae..0000000000
--- a/board/amirix/ap1000/config.mk
+++ /dev/null
@@ -1,27 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-# Start at bottom of RAM, but at an aliased address so that it looks
-# like it's not in RAM. This is a bit of voodoo to allow it to be
-# run from RAM instead of Flash.
-TEXT_BASE = 0x08000000
diff --git a/board/amirix/ap1000/flash.c b/board/amirix/ap1000/flash.c
deleted file mode 100644
index 1a3b25218c..0000000000
--- a/board/amirix/ap1000/flash.c
+++ /dev/null
@@ -1,903 +0,0 @@
-/**
- * @file flash.c
- */
-
-/*
- * (C) Copyright 2003
- * AMIRIX Systems Inc.
- *
- * Originated from ppcboot-2.0.0/board/esd/cpci440/strataflash.c
- *
- * (C) Copyright 2002
- * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/processor.h>
-
-#undef DEBUG_FLASH
-/*
- * This file implements a Common Flash Interface (CFI) driver for ppcboot.
- * The width of the port and the width of the chips are determined at initialization.
- * These widths are used to calculate the address for access CFI data structures.
- * It has been tested on an Intel Strataflash implementation.
- *
- * References
- * JEDEC Standard JESD68 - Common Flash Interface (CFI)
- * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
- * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
- * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
- *
- * TODO
- * Use Primary Extended Query table (PRI) and Alternate Algorithm Query Table (ALT) to determine if protection is available
- * Add support for other command sets Use the PRI and ALT to determine command set
- * Verify erase and program timeouts.
- */
-
-#define FLASH_CMD_CFI 0x98
-#define FLASH_CMD_READ_ID 0x90
-#define FLASH_CMD_RESET 0xff
-#define FLASH_CMD_BLOCK_ERASE 0x20
-#define FLASH_CMD_ERASE_CONFIRM 0xD0
-#define FLASH_CMD_WRITE 0x40
-#define FLASH_CMD_PROTECT 0x60
-#define FLASH_CMD_PROTECT_SET 0x01
-#define FLASH_CMD_PROTECT_CLEAR 0xD0
-#define FLASH_CMD_CLEAR_STATUS 0x50
-#define FLASH_CMD_WRITE_TO_BUFFER 0xE8
-#define FLASH_CMD_WRITE_BUFFER_CONFIRM 0xD0
-
-#define FLASH_STATUS_DONE 0x80
-#define FLASH_STATUS_ESS 0x40
-#define FLASH_STATUS_ECLBS 0x20
-#define FLASH_STATUS_PSLBS 0x10
-#define FLASH_STATUS_VPENS 0x08
-#define FLASH_STATUS_PSS 0x04
-#define FLASH_STATUS_DPS 0x02
-#define FLASH_STATUS_R 0x01
-#define FLASH_STATUS_PROTECT 0x01
-
-#define FLASH_OFFSET_CFI 0x55
-#define FLASH_OFFSET_CFI_RESP 0x10
-#define FLASH_OFFSET_WTOUT 0x1F
-#define FLASH_OFFSET_WBTOUT 0x20
-#define FLASH_OFFSET_ETOUT 0x21
-#define FLASH_OFFSET_CETOUT 0x22
-#define FLASH_OFFSET_WMAX_TOUT 0x23
-#define FLASH_OFFSET_WBMAX_TOUT 0x24
-#define FLASH_OFFSET_EMAX_TOUT 0x25
-#define FLASH_OFFSET_CEMAX_TOUT 0x26
-#define FLASH_OFFSET_SIZE 0x27
-#define FLASH_OFFSET_INTERFACE 0x28
-#define FLASH_OFFSET_BUFFER_SIZE 0x2A
-#define FLASH_OFFSET_NUM_ERASE_REGIONS 0x2C
-#define FLASH_OFFSET_ERASE_REGIONS 0x2D
-#define FLASH_OFFSET_PROTECT 0x02
-#define FLASH_OFFSET_USER_PROTECTION 0x85
-#define FLASH_OFFSET_INTEL_PROTECTION 0x81
-
-#define FLASH_MAN_CFI 0x01000000
-
-typedef union {
- unsigned char c;
- unsigned short w;
- unsigned long l;
-} cfiword_t;
-
-typedef union {
- unsigned char *cp;
- unsigned short *wp;
- unsigned long *lp;
-} cfiptr_t;
-
-#define NUM_ERASE_REGIONS 4
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-
-static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c);
-static void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf);
-static void flash_write_cmd (flash_info_t * info, int sect, uchar offset,
- uchar cmd);
-static int flash_isequal (flash_info_t * info, int sect, uchar offset,
- uchar cmd);
-static int flash_isset (flash_info_t * info, int sect, uchar offset,
- uchar cmd);
-static int flash_detect_cfi (flash_info_t * info);
-static ulong flash_get_size (ulong base, int banknum);
-static int flash_write_cfiword (flash_info_t * info, ulong dest,
- cfiword_t cword);
-static int flash_full_status_check (flash_info_t * info, ulong sector,
- ulong tout, char *prompt);
-#ifdef CFG_FLASH_USE_BUFFER_WRITE
-static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
- int len);
-#endif
-/*-----------------------------------------------------------------------
- * create an address based on the offset and the port width
- */
-uchar *flash_make_addr (flash_info_t * info, int sect, int offset)
-{
- return ((uchar *) (info->start[sect] + (offset * info->chipwidth)));
-}
-
-/*-----------------------------------------------------------------------
- * read a character at a port width address
- */
-uchar flash_read_uchar (flash_info_t * info, uchar offset)
-{
- if (info->portwidth == FLASH_CFI_8BIT) {
- volatile uchar *cp;
- uchar c;
-
- cp = flash_make_addr (info, 0, offset);
- c = *cp;
-#ifdef DEBUG_FLASH
- printf ("flash_read_uchar offset=%04x ptr=%08x c=%02x\n",
- offset, (unsigned int) cp, c);
-#endif
- return (c);
-
- } else if (info->portwidth == FLASH_CFI_16BIT) {
- volatile ushort *sp;
- ushort s;
- uchar c;
-
- sp = (ushort *) flash_make_addr (info, 0, offset);
- s = *sp;
- c = (uchar) s;
-#ifdef DEBUG_FLASH
- printf ("flash_read_uchar offset=%04x ptr=%08x s=%04x c=%02x\n", offset, (unsigned int) sp, s, c);
-#endif
- return (c);
-
- }
-
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * read a short word by swapping for ppc format.
- */
-ushort flash_read_ushort (flash_info_t * info, int sect, uchar offset)
-{
- if (info->portwidth == FLASH_CFI_8BIT) {
- volatile uchar *cp;
- uchar c0, c1;
- ushort s;
-
- cp = flash_make_addr (info, 0, offset);
- c1 = cp[2];
- c0 = cp[0];
- s = c1 << 8 | c0;
-#ifdef DEBUG_FLASH
- printf ("flash_read_ushort offset=%04x ptr=%08x c1=%02x c0=%02x s=%04x\n", offset, (unsigned int) cp, c1, c0, s);
-#endif
- return (s);
-
- } else if (info->portwidth == FLASH_CFI_16BIT) {
- volatile ushort *sp;
- ushort s;
- uchar c0, c1;
-
- sp = (ushort *) flash_make_addr (info, 0, offset);
- s = *sp;
- c1 = (uchar) sp[1];
- c0 = (uchar) sp[0];
- s = c1 << 8 | c0;
-#ifdef DEBUG_FLASH
- printf ("flash_read_ushort offset=%04x ptr=%08x c1=%02x c0=%02x s=%04x\n", offset, (unsigned int) sp, c1, c0, s);
-#endif
- return (s);
-
- }
-
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * read a long word by picking the least significant byte of each maiximum
- * port size word. Swap for ppc format.
- */
-ulong flash_read_long (flash_info_t * info, int sect, uchar offset)
-{
- if (info->portwidth == FLASH_CFI_8BIT) {
- volatile uchar *cp;
- uchar c0, c1, c2, c3;
- ulong l;
-
- cp = flash_make_addr (info, 0, offset);
- c3 = cp[6];
- c2 = cp[4];
- c1 = cp[2];
- c0 = cp[0];
- l = c3 << 24 | c2 << 16 | c1 << 8 | c0;
-#ifdef DEBUG_FLASH
- printf ("flash_read_long offset=%04x ptr=%08x c3=%02x c2=%02x c1=%02x c0=%02x l=%08x\n", offset, (unsigned int) cp, c3, c2, c1, c0, l);
-#endif
- return (l);
-
- } else if (info->portwidth == FLASH_CFI_16BIT) {
- volatile ushort *sp;
- uchar c0, c1, c2, c3;
- ulong l;
-
- sp = (ushort *) flash_make_addr (info, 0, offset);
- c3 = (uchar) sp[3];
- c2 = (uchar) sp[2];
- c1 = (uchar) sp[1];
- c0 = (uchar) sp[0];
- l = c3 << 24 | c2 << 16 | c1 << 8 | c0;
-#ifdef DEBUG_FLASH
- printf ("flash_read_long offset=%04x ptr=%08x c3=%02x c2=%02x c1=%02x c0=%02x l=%08x\n", offset, (unsigned int) sp, c3, c2, c1, c0, l);
-#endif
- return (l);
-
- }
-
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- */
-unsigned long flash_init (void)
-{
- unsigned long size;
-
- size = 0;
-
- flash_info[0].flash_id = FLASH_UNKNOWN;
- flash_info[0].portwidth = FLASH_CFI_16BIT;
- flash_info[0].chipwidth = FLASH_CFI_16BIT;
- size += flash_info[0].size = flash_get_size (CFG_PROGFLASH_BASE, 0);
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n", 1, flash_info[0].size, flash_info[0].size << 20);
- };
-
- flash_info[1].flash_id = FLASH_UNKNOWN;
- flash_info[1].portwidth = FLASH_CFI_8BIT;
- flash_info[1].chipwidth = FLASH_CFI_16BIT;
- size += flash_info[1].size = flash_get_size (CFG_CONFFLASH_BASE, 1);
- if (flash_info[1].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n", 2, flash_info[1].size, flash_info[1].size << 20);
- };
-
- return (size);
-}
-
-/*-----------------------------------------------------------------------
- */
-int flash_erase (flash_info_t * info, int s_first, int s_last)
-{
- int rcode = 0;
- int prot;
- int sect;
-
- if (info->flash_id != FLASH_MAN_CFI) {
- printf ("Can't erase unknown flash type - aborted\n");
- return 1;
- }
- if ((s_first < 0) || (s_first > s_last)) {
- printf ("- no sectors to erase\n");
- return 1;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n", prot);
- } else {
- printf ("\n");
- }
-
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- flash_write_cmd (info, sect, 0,
- FLASH_CMD_CLEAR_STATUS);
- flash_write_cmd (info, sect, 0,
- FLASH_CMD_BLOCK_ERASE);
- flash_write_cmd (info, sect, 0,
- FLASH_CMD_ERASE_CONFIRM);
-
- if (flash_full_status_check
- (info, sect, info->erase_blk_tout, "erase")) {
- rcode = 1;
- } else
- printf (".");
- }
- }
- printf (" done\n");
- return rcode;
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t * info)
-{
- int i;
-
- if (info->flash_id != FLASH_MAN_CFI) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- printf ("CFI conformant FLASH (x%d device in x%d mode)",
- (info->chipwidth << 3), (info->portwidth << 3));
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
- printf (" Erase timeout %ld ms, write timeout %ld ms, buffer write timeout %ld ms, buffer size %d\n", info->erase_blk_tout, info->write_tout, info->buffer_write_tout, info->buffer_size);
-
- printf (" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n");
- printf (" %08lX%5s",
- info->start[i], info->protect[i] ? " (RO)" : " ");
- }
- printf ("\n");
- return;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- ulong wp;
- ulong cp;
- int aln;
- cfiword_t cword;
- int i, rc;
-
- /* get lower aligned address */
- wp = (addr & ~(info->portwidth - 1));
-
- /* handle unaligned start */
- if ((aln = addr - wp) != 0) {
- cword.l = 0;
- cp = wp;
- for (i = 0; i < aln; ++i, ++cp)
- flash_add_byte (info, &cword, (*(uchar *) cp));
-
- for (; (i < info->portwidth) && (cnt > 0); i++) {
- flash_add_byte (info, &cword, *src++);
- cnt--;
- cp++;
- }
- for (; (cnt == 0) && (i < info->portwidth); ++i, ++cp)
- flash_add_byte (info, &cword, (*(uchar *) cp));
- if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
- return rc;
- wp = cp;
- }
-#ifdef CFG_FLASH_USE_BUFFER_WRITE
- while (cnt >= info->portwidth) {
- i = info->buffer_size > cnt ? cnt : info->buffer_size;
- if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK)
- return rc;
- wp += i;
- src += i;
- cnt -= i;
- }
-#else
- /* handle the aligned part */
- while (cnt >= info->portwidth) {
- cword.l = 0;
- for (i = 0; i < info->portwidth; i++) {
- flash_add_byte (info, &cword, *src++);
- }
- if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
- return rc;
- wp += info->portwidth;
- cnt -= info->portwidth;
- }
-#endif /* CFG_FLASH_USE_BUFFER_WRITE */
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- cword.l = 0;
- for (i = 0, cp = wp; (i < info->portwidth) && (cnt > 0); ++i, ++cp) {
- flash_add_byte (info, &cword, *src++);
- --cnt;
- }
- for (; i < info->portwidth; ++i, ++cp) {
- flash_add_byte (info, &cword, (*(uchar *) cp));
- }
-
- return flash_write_cfiword (info, wp, cword);
-}
-
-/*-----------------------------------------------------------------------
- */
-int flash_real_protect (flash_info_t * info, long sector, int prot)
-{
- int retcode = 0;
-
- flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
- flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
- if (prot)
- flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET);
- else
- flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
-
- if ((retcode =
- flash_full_status_check (info, sector, info->erase_blk_tout,
- prot ? "protect" : "unprotect")) == 0) {
-
- info->protect[sector] = prot;
- /* Intel's unprotect unprotects all locking */
- if (prot == 0) {
- int i;
-
- for (i = 0; i < info->sector_count; i++) {
- if (info->protect[i])
- flash_real_protect (info, i, 1);
- }
- }
- }
-
- return retcode;
-}
-
-/*-----------------------------------------------------------------------
- * wait for XSR.7 to be set. Time out with an error if it does not.
- * This routine does not set the flash to read-array mode.
- */
-static int flash_status_check (flash_info_t * info, ulong sector, ulong tout,
- char *prompt)
-{
- ulong start;
-
- /* Wait for command completion */
- start = get_timer (0);
- while (!flash_isset (info, sector, 0, FLASH_STATUS_DONE)) {
- if (get_timer (start) > info->erase_blk_tout) {
- printf ("Flash %s timeout at address %lx\n", prompt,
- info->start[sector]);
- flash_write_cmd (info, sector, 0, FLASH_CMD_RESET);
- return ERR_TIMOUT;
- }
- }
- return ERR_OK;
-}
-
-/*-----------------------------------------------------------------------
- * Wait for XSR.7 to be set, if it times out print an error, otherwise do a full status check.
- * This routine sets the flash to read-array mode.
- */
-static int flash_full_status_check (flash_info_t * info, ulong sector,
- ulong tout, char *prompt)
-{
- int retcode;
-
- retcode = flash_status_check (info, sector, tout, prompt);
- if ((retcode == ERR_OK)
- && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) {
- retcode = ERR_INVAL;
- printf ("Flash %s error at address %lx\n", prompt,
- info->start[sector]);
- if (flash_isset
- (info, sector, 0,
- FLASH_STATUS_ECLBS | FLASH_STATUS_PSLBS)) {
- printf ("Command Sequence Error.\n");
- } else if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS)) {
- printf ("Block Erase Error.\n");
- retcode = ERR_NOT_ERASED;
- } else if (flash_isset (info, sector, 0, FLASH_STATUS_PSLBS)) {
- printf ("Locking Error\n");
- }
- if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
- printf ("Block locked.\n");
- retcode = ERR_PROTECTED;
- }
- if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
- printf ("Vpp Low Error.\n");
- }
- flash_write_cmd (info, sector, 0, FLASH_CMD_RESET);
- return retcode;
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
-{
- switch (info->portwidth) {
- case FLASH_CFI_8BIT:
- cword->c = c;
- break;
- case FLASH_CFI_16BIT:
- cword->w = (cword->w << 8) | c;
- break;
- case FLASH_CFI_32BIT:
- cword->l = (cword->l << 8) | c;
- }
-}
-
-/*-----------------------------------------------------------------------
- * make a proper sized command based on the port and chip widths
- */
-static void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf)
-{
- /*int i; */
- uchar *cp = (uchar *) cmdbuf;
-
- /* for(i=0; i< info->portwidth; i++) */
- /* *cp++ = ((i+1) % info->chipwidth) ? '\0':cmd; */
- if (info->portwidth == FLASH_CFI_8BIT
- && info->chipwidth == FLASH_CFI_16BIT) {
- cp[0] = cmd;
- } else if (info->portwidth == FLASH_CFI_16BIT
- && info->chipwidth == FLASH_CFI_16BIT) {
- cp[0] = '\0';
- cp[1] = cmd;
- };
-}
-
-/*
- * Write a proper sized command to the correct address
- */
-static void flash_write_cmd (flash_info_t * info, int sect, uchar offset,
- uchar cmd)
-{
-
- volatile cfiptr_t addr;
- cfiword_t cword;
-
- addr.cp = flash_make_addr (info, sect, offset);
- flash_make_cmd (info, cmd, &cword);
- switch (info->portwidth) {
- case FLASH_CFI_8BIT:
- *addr.cp = cword.c;
- break;
- case FLASH_CFI_16BIT:
- *addr.wp = cword.w;
- break;
- case FLASH_CFI_32BIT:
- *addr.lp = cword.l;
- break;
- }
-}
-
-/*-----------------------------------------------------------------------
- */
-static int flash_isequal (flash_info_t * info, int sect, uchar offset,
- uchar cmd)
-{
- cfiptr_t cptr;
- cfiword_t cword;
- int retval;
-
- cptr.cp = flash_make_addr (info, sect, offset);
- flash_make_cmd (info, cmd, &cword);
- switch (info->portwidth) {
- case FLASH_CFI_8BIT:
- retval = (cptr.cp[0] == cword.c);
- break;
- case FLASH_CFI_16BIT:
- retval = (cptr.wp[0] == cword.w);
- break;
- case FLASH_CFI_32BIT:
- retval = (cptr.lp[0] == cword.l);
- break;
- default:
- retval = 0;
- break;
- }
- return retval;
-}
-
-/*-----------------------------------------------------------------------
- */
-static int flash_isset (flash_info_t * info, int sect, uchar offset,
- uchar cmd)
-{
- cfiptr_t cptr;
- cfiword_t cword;
- int retval;
-
- cptr.cp = flash_make_addr (info, sect, offset);
- flash_make_cmd (info, cmd, &cword);
- switch (info->portwidth) {
- case FLASH_CFI_8BIT:
- retval = ((cptr.cp[0] & cword.c) == cword.c);
- break;
- case FLASH_CFI_16BIT:
- retval = ((cptr.wp[0] & cword.w) == cword.w);
- break;
- case FLASH_CFI_32BIT:
- retval = ((cptr.lp[0] & cword.l) == cword.l);
- break;
- default:
- retval = 0;
- break;
- }
- return retval;
-}
-
-/*-----------------------------------------------------------------------
- * detect if flash is compatible with the Common Flash Interface (CFI)
- * http://www.jedec.org/download/search/jesd68.pdf
- *
-*/
-static int flash_detect_cfi (flash_info_t * info)
-{
-
-#if 0
- for (info->portwidth = FLASH_CFI_8BIT;
- info->portwidth <= FLASH_CFI_32BIT; info->portwidth <<= 1) {
- for (info->chipwidth = FLASH_CFI_BY8;
- info->chipwidth <= info->portwidth;
- info->chipwidth <<= 1) {
- flash_write_cmd (info, 0, 0, FLASH_CMD_RESET);
- flash_write_cmd (info, 0, FLASH_OFFSET_CFI,
- FLASH_CMD_CFI);
- if (flash_isequal
- (info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
- && flash_isequal (info, 0,
- FLASH_OFFSET_CFI_RESP + 1, 'R')
- && flash_isequal (info, 0,
- FLASH_OFFSET_CFI_RESP + 2, 'Y'))
- return 1;
- }
- }
-#endif
- flash_write_cmd (info, 0, 0, FLASH_CMD_RESET);
- flash_write_cmd (info, 0, FLASH_OFFSET_CFI, FLASH_CMD_CFI);
- if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q') &&
- flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R') &&
- flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
- return 1;
- } else {
- return 0;
- };
-}
-
-/*
- * The following code cannot be run from FLASH!
- *
- */
-static ulong flash_get_size (ulong base, int banknum)
-{
- flash_info_t *info = &flash_info[banknum];
- int i, j;
- int sect_cnt;
- unsigned long sector;
- unsigned long tmp;
- int size_ratio;
- uchar num_erase_regions;
- int erase_region_size;
- int erase_region_count;
-
- info->start[0] = base;
-
- if (flash_detect_cfi (info)) {
-#ifdef DEBUG_FLASH
- printf ("portwidth=%d chipwidth=%d\n", info->portwidth, info->chipwidth); /* test-only */
-#endif
- size_ratio = 1; /* info->portwidth / info->chipwidth; */
- num_erase_regions =
- flash_read_uchar (info,
- FLASH_OFFSET_NUM_ERASE_REGIONS);
-#ifdef DEBUG_FLASH
- printf ("found %d erase regions\n", num_erase_regions);
-#endif
- sect_cnt = 0;
- sector = base;
- for (i = 0; i < num_erase_regions; i++) {
- if (i > NUM_ERASE_REGIONS) {
- printf ("%d erase regions found, only %d used\n", num_erase_regions, NUM_ERASE_REGIONS);
- break;
- }
- tmp = flash_read_long (info, 0,
- FLASH_OFFSET_ERASE_REGIONS);
- erase_region_count = (tmp & 0xffff) + 1;
- tmp >>= 16;
- erase_region_size =
- (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
- for (j = 0; j < erase_region_count; j++) {
- info->start[sect_cnt] = sector;
- sector += (erase_region_size * size_ratio);
- info->protect[sect_cnt] =
- flash_isset (info, sect_cnt,
- FLASH_OFFSET_PROTECT,
- FLASH_STATUS_PROTECT);
- sect_cnt++;
- }
- }
-
- info->sector_count = sect_cnt;
- /* multiply the size by the number of chips */
- info->size =
- (1 << flash_read_uchar (info, FLASH_OFFSET_SIZE)) *
- size_ratio;
- info->buffer_size =
- (1 <<
- flash_read_ushort (info, 0,
- FLASH_OFFSET_BUFFER_SIZE));
- tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_ETOUT);
- info->erase_blk_tout =
- (tmp *
- (1 <<
- flash_read_uchar (info, FLASH_OFFSET_EMAX_TOUT)));
- tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_WBTOUT);
- info->buffer_write_tout =
- (tmp *
- (1 <<
- flash_read_uchar (info, FLASH_OFFSET_WBMAX_TOUT)));
- tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_WTOUT);
- info->write_tout =
- (tmp *
- (1 <<
- flash_read_uchar (info,
- FLASH_OFFSET_WMAX_TOUT))) / 1000;
- info->flash_id = FLASH_MAN_CFI;
- }
-
- flash_write_cmd (info, 0, 0, FLASH_CMD_RESET);
- return (info->size);
-}
-
-/*-----------------------------------------------------------------------
- */
-static int flash_write_cfiword (flash_info_t * info, ulong dest,
- cfiword_t cword)
-{
-
- cfiptr_t ctladdr;
- cfiptr_t cptr;
- int flag;
-
- ctladdr.cp = flash_make_addr (info, 0, 0);
- cptr.cp = (uchar *) dest;
-
- /* Check if Flash is (sufficiently) erased */
- switch (info->portwidth) {
- case FLASH_CFI_8BIT:
- flag = ((cptr.cp[0] & cword.c) == cword.c);
- break;
- case FLASH_CFI_16BIT:
- flag = ((cptr.wp[0] & cword.w) == cword.w);
- break;
- case FLASH_CFI_32BIT:
- flag = ((cptr.lp[0] & cword.l) == cword.l);
- break;
- default:
- return 2;
- }
- if (!flag)
- return 2;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
-
- flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
- flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE);
-
- switch (info->portwidth) {
- case FLASH_CFI_8BIT:
- cptr.cp[0] = cword.c;
- break;
- case FLASH_CFI_16BIT:
- cptr.wp[0] = cword.w;
- break;
- case FLASH_CFI_32BIT:
- cptr.lp[0] = cword.l;
- break;
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts ();
-
- return flash_full_status_check (info, 0, info->write_tout, "write");
-}
-
-#ifdef CFG_FLASH_USE_BUFFER_WRITE
-
-/* loop through the sectors from the highest address
- * when the passed address is greater or equal to the sector address
- * we have a match
- */
-static int find_sector (flash_info_t * info, ulong addr)
-{
- int sector;
-
- for (sector = info->sector_count - 1; sector >= 0; sector--) {
- if (addr >= info->start[sector])
- break;
- }
- return sector;
-}
-
-static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
- int len)
-{
-
- int sector;
- int cnt;
- int retcode;
- volatile cfiptr_t src;
- volatile cfiptr_t dst;
-
- src.cp = cp;
- dst.cp = (uchar *) dest;
- sector = find_sector (info, dest);
- flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
- flash_write_cmd (info, sector, 0, FLASH_CMD_WRITE_TO_BUFFER);
- if ((retcode =
- flash_status_check (info, sector, info->buffer_write_tout,
- "write to buffer")) == ERR_OK) {
- switch (info->portwidth) {
- case FLASH_CFI_8BIT:
- cnt = len;
- break;
- case FLASH_CFI_16BIT:
- cnt = len >> 1;
- break;
- case FLASH_CFI_32BIT:
- cnt = len >> 2;
- break;
- default:
- return ERR_INVAL;
- break;
- }
- flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
- while (cnt-- > 0) {
- switch (info->portwidth) {
- case FLASH_CFI_8BIT:
- *dst.cp++ = *src.cp++;
- break;
- case FLASH_CFI_16BIT:
- *dst.wp++ = *src.wp++;
- break;
- case FLASH_CFI_32BIT:
- *dst.lp++ = *src.lp++;
- break;
- default:
- return ERR_INVAL;
- break;
- }
- }
- flash_write_cmd (info, sector, 0,
- FLASH_CMD_WRITE_BUFFER_CONFIRM);
- retcode =
- flash_full_status_check (info, sector,
- info->buffer_write_tout,
- "buffer write");
- }
- flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
- return retcode;
-}
-#endif /* CFG_USE_FLASH_BUFFER_WRITE */
diff --git a/board/amirix/ap1000/init.S b/board/amirix/ap1000/init.S
deleted file mode 100644
index 3aaa5c2f1a..0000000000
--- a/board/amirix/ap1000/init.S
+++ /dev/null
@@ -1,34 +0,0 @@
-/*
- * init.S: Stubs for ppcboot initialization
- *
- * Copyright 2002 Mind NV
- *
- * http://www.mind.be/
- *
- * Author : Peter De Schrijver (p2@mind.be)
- *
- * This software may be used and distributed according to the terms of
- * the GNU General Public License (GPL) version 2, incorporated herein by
- * reference. Drivers based on or derived from this code fall under the GPL
- * and must retain the authorship, copyright and this license notice. This
- * file is not a complete program and may only be used when the entire
- * program is licensed under the GPL.
- *
- */
-
-#include <ppc4xx.h>
-
-#include <ppc_asm.tmpl>
-#include <ppc_defs.h>
-
-#include <asm/cache.h>
-#include <asm/mmu.h>
-
-
- .globl ext_bus_cntlr_init
-ext_bus_cntlr_init:
- blr
-
- .globl sdram_init
-sdram_init:
- blr
diff --git a/board/amirix/ap1000/pci.c b/board/amirix/ap1000/pci.c
deleted file mode 100644
index a6436ac5bb..0000000000
--- a/board/amirix/ap1000/pci.c
+++ /dev/null
@@ -1,318 +0,0 @@
-/*
- * (C) Copyright 2003
- * AMIRIX Systems Inc.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <ppc4xx.h>
-#include <asm/processor.h>
-#include <pci.h>
-
-#define PCI_MEM_82559ER_CSR_BASE 0x30200000
-#define PCI_IO_82559ER_CSR_BASE 0x40000200
-
-/** AP1100 specific values */
-#define PSII_BASE 0x30000000 /**< PowerSpan II dual bridge local bus register address */
-#define PSII_CONFIG_ADDR 0x30000290 /**< PowerSpan II Configuration Cycle Address configuration register */
-#define PSII_CONFIG_DATA 0x30000294 /**< PowerSpan II Configuration Cycle Data register. */
-#define PSII_CONFIG_DEST_PCI2 0x01000000 /**< PowerSpan II configuration cycle destination selection, set for PCI2 bus */
-#define PSII_PCI_MEM_BASE 0x30200000 /**< Local Bus address for start of PCI memory space on PCI2 bus. */
-#define PSII_PCI_MEM_SIZE 0x1BE00000 /**< PCI Memory space about 510 Meg. */
-#define AP1000_SYS_MEM_START 0x00000000 /**< System memory starts at 0. */
-#define AP1000_SYS_MEM_SIZE 0x08000000 /**< System memory is 128 Meg. */
-
-/* static int G_verbosity_level = 1; */
-#define G_verbosity_level 1
-
-void write1 (unsigned long addr, unsigned char val)
-{
- volatile unsigned char *p = (volatile unsigned char *) addr;
-
- if (G_verbosity_level > 1)
- printf ("write1: addr=%08x val=%02x\n", (unsigned int) addr,
- val);
- *p = val;
- asm ("eieio");
-}
-
-unsigned char read1 (unsigned long addr)
-{
- unsigned char val;
- volatile unsigned char *p = (volatile unsigned char *) addr;
-
- if (G_verbosity_level > 1)
- printf ("read1: addr=%08x ", (unsigned int) addr);
- val = *p;
- asm ("eieio");
- if (G_verbosity_level > 1)
- printf ("val=%08x\n", val);
- return val;
-}
-
-void write2 (unsigned long addr, unsigned short val)
-{
- volatile unsigned short *p = (volatile unsigned short *) addr;
-
- if (G_verbosity_level > 1)
- printf ("write2: addr=%08x val=%04x -> *p=%04x\n",
- (unsigned int) addr, val,
- ((val & 0xFF00) >> 8) | ((val & 0x00FF) << 8));
-
- *p = ((val & 0xFF00) >> 8) | ((val & 0x00FF) << 8);
- asm ("eieio");
-}
-
-unsigned short read2 (unsigned long addr)
-{
- unsigned short val;
- volatile unsigned short *p = (volatile unsigned short *) addr;
-
- if (G_verbosity_level > 1)
- printf ("read2: addr=%08x ", (unsigned int) addr);
- val = *p;
- val = ((val & 0xFF00) >> 8) | ((val & 0x00FF) << 8);
- asm ("eieio");
- if (G_verbosity_level > 1)
- printf ("*p=%04x -> val=%04x\n",
- ((val & 0xFF00) >> 8) | ((val & 0x00FF) << 8), val);
- return val;
-}
-
-void write4 (unsigned long addr, unsigned long val)
-{
- volatile unsigned long *p = (volatile unsigned long *) addr;
-
- if (G_verbosity_level > 1)
- printf ("write4: addr=%08x val=%08x -> *p=%08x\n",
- (unsigned int) addr, (unsigned int) val,
- (unsigned int) (((val & 0xFF000000) >> 24) |
- ((val & 0x000000FF) << 24) |
- ((val & 0x00FF0000) >> 8) |
- ((val & 0x0000FF00) << 8)));
-
- *p = ((val & 0xFF000000) >> 24) | ((val & 0x000000FF) << 24) |
- ((val & 0x00FF0000) >> 8) | ((val & 0x0000FF00) << 8);
- asm ("eieio");
-}
-
-unsigned long read4 (unsigned long addr)
-{
- unsigned long val;
- volatile unsigned long *p = (volatile unsigned long *) addr;
-
- if (G_verbosity_level > 1)
- printf ("read4: addr=%08x", (unsigned int) addr);
-
- val = *p;
- val = ((val & 0xFF000000) >> 24) | ((val & 0x000000FF) << 24) |
- ((val & 0x00FF0000) >> 8) | ((val & 0x0000FF00) << 8);
- asm ("eieio");
-
- if (G_verbosity_level > 1)
- printf ("*p=%04x -> val=%04x\n",
- (unsigned int) (((val & 0xFF000000) >> 24) |
- ((val & 0x000000FF) << 24) |
- ((val & 0x00FF0000) >> 8) |
- ((val & 0x0000FF00) << 8)),
- (unsigned int) val);
- return val;
-}
-
-void write4be (unsigned long addr, unsigned long val)
-{
- volatile unsigned long *p = (volatile unsigned long *) addr;
-
- if (G_verbosity_level > 1)
- printf ("write4: addr=%08x val=%08x\n", (unsigned int) addr,
- (unsigned int) val);
- *p = val;
- asm ("eieio");
-}
-
-/** One byte configuration write on PSII.
- * Currently fixes destination PCI bus to PCI2, onboard
- * pci.
- * @param hose PCI Host controller information. Ignored.
- * @param dev Encoded PCI device/Bus and Function value.
- * @param reg PCI Configuration register number.
- * @param val Address of location for received byte.
- * @return Always Zero.
- */
-static int psII_read_config_byte (struct pci_controller *hose,
- pci_dev_t dev, int reg, u8 * val)
-{
- write4be (PSII_CONFIG_ADDR, PSII_CONFIG_DEST_PCI2 | /* Operate on PCI2 bus interface . */
- (PCI_BUS (dev) << 16) | (PCI_DEV (dev) << 11) | (PCI_FUNC (dev) << 8) | ((reg & 0xFF) & ~3)); /* Configuation cycle type 0 */
-
- *val = read1 (PSII_CONFIG_DATA + (reg & 0x03));
- return (0);
-}
-
-/** One byte configuration write on PSII.
- * Currently fixes destination bus to PCI2, onboard
- * pci.
- * @param hose PCI Host controller information. Ignored.
- * @param dev Encoded PCI device/Bus and Function value.
- * @param reg PCI Configuration register number.
- * @param val Output byte.
- * @return Always Zero.
- */
-static int psII_write_config_byte (struct pci_controller *hose,
- pci_dev_t dev, int reg, u8 val)
-{
- write4be (PSII_CONFIG_ADDR, PSII_CONFIG_DEST_PCI2 | /* Operate on PCI2 bus interface . */
- (PCI_BUS (dev) << 16) | (PCI_DEV (dev) << 11) | (PCI_FUNC (dev) << 8) | ((reg & 0xFF) & ~3)); /* Configuation cycle type 0 */
-
- write1 (PSII_CONFIG_DATA + (reg & 0x03), (unsigned char) val);
-
- return (0);
-}
-
-/** One word (16 bit) configuration read on PSII.
- * Currently fixes destination PCI bus to PCI2, onboard
- * pci.
- * @param hose PCI Host controller information. Ignored.
- * @param dev Encoded PCI device/Bus and Function value.
- * @param reg PCI Configuration register number.
- * @param val Address of location for received word.
- * @return Always Zero.
- */
-static int psII_read_config_word (struct pci_controller *hose,
- pci_dev_t dev, int reg, u16 * val)
-{
- write4be (PSII_CONFIG_ADDR, PSII_CONFIG_DEST_PCI2 | /* Operate on PCI2 bus interface . */
- (PCI_BUS (dev) << 16) | (PCI_DEV (dev) << 11) | (PCI_FUNC (dev) << 8) | ((reg & 0xFF) & ~3)); /* Configuation cycle type 0 */
-
- *val = read2 (PSII_CONFIG_DATA + (reg & 0x03));
- return (0);
-}
-
-/** One word (16 bit) configuration write on PSII.
- * Currently fixes destination bus to PCI2, onboard
- * pci.
- * @param hose PCI Host controller information. Ignored.
- * @param dev Encoded PCI device/Bus and Function value.
- * @param reg PCI Configuration register number.
- * @param val Output word.
- * @return Always Zero.
- */
-static int psII_write_config_word (struct pci_controller *hose,
- pci_dev_t dev, int reg, u16 val)
-{
- write4be (PSII_CONFIG_ADDR, PSII_CONFIG_DEST_PCI2 | /* Operate on PCI2 bus interface . */
- (PCI_BUS (dev) << 16) | (PCI_DEV (dev) << 11) | (PCI_FUNC (dev) << 8) | ((reg & 0xFF) & ~3)); /* Configuation cycle type 0 */
-
- write2 (PSII_CONFIG_DATA + (reg & 0x03), (unsigned short) val);
-
- return (0);
-}
-
-/** One DWord (32 bit) configuration read on PSII.
- * Currently fixes destination PCI bus to PCI2, onboard
- * pci.
- * @param hose PCI Host controller information. Ignored.
- * @param dev Encoded PCI device/Bus and Function value.
- * @param reg PCI Configuration register number.
- * @param val Address of location for received byte.
- * @return Always Zero.
- */
-static int psII_read_config_dword (struct pci_controller *hose,
- pci_dev_t dev, int reg, u32 * val)
-{
- write4be (PSII_CONFIG_ADDR, PSII_CONFIG_DEST_PCI2 | /* Operate on PCI2 bus interface . */
- (PCI_BUS (dev) << 16) | (PCI_DEV (dev) << 11) | (PCI_FUNC (dev) << 8) | ((reg & 0xFF) & ~3)); /* Configuation cycle type 0 */
-
- *val = read4 (PSII_CONFIG_DATA);
- return (0);
-}
-
-/** One DWord (32 bit) configuration write on PSII.
- * Currently fixes destination bus to PCI2, onboard
- * pci.
- * @param hose PCI Host controller information. Ignored.
- * @param dev Encoded PCI device/Bus and Function value.
- * @param reg PCI Configuration register number.
- * @param val Output Dword.
- * @return Always Zero.
- */
-static int psII_write_config_dword (struct pci_controller *hose,
- pci_dev_t dev, int reg, u32 val)
-{
- write4be (PSII_CONFIG_ADDR, PSII_CONFIG_DEST_PCI2 | /* Operate on PCI2 bus interface . */
- (PCI_BUS (dev) << 16) | (PCI_DEV (dev) << 11) | (PCI_FUNC (dev) << 8) | ((reg & 0xFF) & ~3)); /* Configuation cycle type 0 */
-
- write4 (PSII_CONFIG_DATA, (unsigned long) val);
-
- return (0);
-}
-
-static struct pci_config_table ap1000_config_table[] = {
-#ifdef CONFIG_AP1000
- {PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
- PCI_BUS (CFG_ETH_DEV_FN), PCI_DEV (CFG_ETH_DEV_FN),
- PCI_FUNC (CFG_ETH_DEV_FN),
- pci_cfgfunc_config_device,
- {CFG_ETH_IOBASE, CFG_ETH_MEMBASE,
- PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER}},
-#endif
- {}
-};
-
-static struct pci_controller psII_hose = {
- config_table:ap1000_config_table,
-};
-
-void pci_init_board (void)
-{
- struct pci_controller *hose = &psII_hose;
-
- /*
- * Register the hose
- */
- hose->first_busno = 0;
- hose->last_busno = 0xff;
-
- /* System memory space */
- pci_set_region (hose->regions + 0,
- AP1000_SYS_MEM_START, AP1000_SYS_MEM_START,
- AP1000_SYS_MEM_SIZE,
- PCI_REGION_MEM | PCI_REGION_MEMORY);
-
- /* PCI Memory space */
- pci_set_region (hose->regions + 1,
- PSII_PCI_MEM_BASE, PSII_PCI_MEM_BASE,
- PSII_PCI_MEM_SIZE, PCI_REGION_MEM);
-
- /* No IO Memory space - for now */
-
- pci_set_ops (hose,
- psII_read_config_byte,
- psII_read_config_word,
- psII_read_config_dword,
- psII_write_config_byte,
- psII_write_config_word, psII_write_config_dword);
-
- hose->region_count = 2;
-
- pci_register_hose (hose);
-
- hose->last_busno = pci_hose_scan (hose);
-}
diff --git a/board/amirix/ap1000/powerspan.c b/board/amirix/ap1000/powerspan.c
deleted file mode 100644
index f0481553f0..0000000000
--- a/board/amirix/ap1000/powerspan.c
+++ /dev/null
@@ -1,750 +0,0 @@
-/**
- * @file powerspan.c Source file for PowerSpan II code.
- */
-
-/*
- * (C) Copyright 2005
- * AMIRIX Systems Inc.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <command.h>
-#include <asm/processor.h>
-#include "powerspan.h"
-#define tolower(x) x
-#include "ap1000.h"
-
-#ifdef INCLUDE_PCI
-
-/** Write one byte with byte swapping.
- * @param addr [IN] the address to write to
- * @param val [IN] the value to write
- */
-void write1 (unsigned long addr, unsigned char val)
-{
- volatile unsigned char *p = (volatile unsigned char *) addr;
-
-#ifdef VERBOSITY
- if (gVerbosityLevel > 1) {
- printf ("write1: addr=%08x val=%02x\n", addr, val);
- }
-#endif
- *p = val;
- PSII_SYNC ();
-}
-
-/** Read one byte with byte swapping.
- * @param addr [IN] the address to read from
- * @return the value at addr
- */
-unsigned char read1 (unsigned long addr)
-{
- unsigned char val;
- volatile unsigned char *p = (volatile unsigned char *) addr;
-
- val = *p;
- PSII_SYNC ();
-#ifdef VERBOSITY
- if (gVerbosityLevel > 1) {
- printf ("read1: addr=%08x val=%02x\n", addr, val);
- }
-#endif
- return val;
-}
-
-/** Write one 2-byte word with byte swapping.
- * @param addr [IN] the address to write to
- * @param val [IN] the value to write
- */
-void write2 (unsigned long addr, unsigned short val)
-{
- volatile unsigned short *p = (volatile unsigned short *) addr;
-
-#ifdef VERBOSITY
- if (gVerbosityLevel > 1) {
- printf ("write2: addr=%08x val=%04x -> *p=%04x\n", addr, val,
- ((val & 0xFF00) >> 8) | ((val & 0x00FF) << 8));
- }
-#endif
- *p = ((val & 0xFF00) >> 8) | ((val & 0x00FF) << 8);
- PSII_SYNC ();
-}
-
-/** Read one 2-byte word with byte swapping.
- * @param addr [IN] the address to read from
- * @return the value at addr
- */
-unsigned short read2 (unsigned long addr)
-{
- unsigned short val;
- volatile unsigned short *p = (volatile unsigned short *) addr;
-
- val = *p;
- val = ((val & 0xFF00) >> 8) | ((val & 0x00FF) << 8);
- PSII_SYNC ();
-#ifdef VERBOSITY
- if (gVerbosityLevel > 1) {
- printf ("read2: addr=%08x *p=%04x -> val=%04x\n", addr, *p,
- val);
- }
-#endif
- return val;
-}
-
-/** Write one 4-byte word with byte swapping.
- * @param addr [IN] the address to write to
- * @param val [IN] the value to write
- */
-void write4 (unsigned long addr, unsigned long val)
-{
- volatile unsigned long *p = (volatile unsigned long *) addr;
-
-#ifdef VERBOSITY
- if (gVerbosityLevel > 1) {
- printf ("write4: addr=%08x val=%08x -> *p=%08x\n", addr, val,
- ((val & 0xFF000000) >> 24) |
- ((val & 0x000000FF) << 24) |
- ((val & 0x00FF0000) >> 8) |
- ((val & 0x0000FF00) << 8));
- }
-#endif
- *p = ((val & 0xFF000000) >> 24) | ((val & 0x000000FF) << 24) |
- ((val & 0x00FF0000) >> 8) | ((val & 0x0000FF00) << 8);
- PSII_SYNC ();
-}
-
-/** Read one 4-byte word with byte swapping.
- * @param addr [IN] the address to read from
- * @return the value at addr
- */
-unsigned long read4 (unsigned long addr)
-{
- unsigned long val;
- volatile unsigned long *p = (volatile unsigned long *) addr;
-
- val = *p;
- val = ((val & 0xFF000000) >> 24) | ((val & 0x000000FF) << 24) |
- ((val & 0x00FF0000) >> 8) | ((val & 0x0000FF00) << 8);
- PSII_SYNC ();
-#ifdef VERBOSITY
- if (gVerbosityLevel > 1) {
- printf ("read4: addr=%08x *p=%08x -> val=%08x\n", addr, *p,
- val);
- }
-#endif
- return val;
-}
-
-int PCIReadConfig (int bus, int dev, int fn, int reg, int width,
- unsigned long *val)
-{
- unsigned int conAdrVal;
- unsigned int conDataReg = REG_CONFIG_DATA;
- unsigned int status;
- int ret_val = 0;
-
-
- /* DEST bit hardcoded to 1: local pci is PCI-2 */
- /* TYPE bit is hardcoded to 1: all config cycles are local */
- conAdrVal = (1 << 24)
- | ((bus & 0xFF) << 16)
- | ((dev & 0xFF) << 11)
- | ((fn & 0x07) << 8)
- | (reg & 0xFC);
-
- /* clear any pending master aborts */
- write4 (REG_P1_CSR, CLEAR_MASTER_ABORT);
-
- /* Load the conAdrVal value first, then read from pb_conf_data */
- write4 (REG_CONFIG_ADDRESS, conAdrVal);
- PSII_SYNC ();
-
-
- /* Note: documentation does not match the pspan library code */
- /* Note: *pData comes back as -1 if device is not present */
- switch (width) {
- case 4:
- *(unsigned int *) val = read4 (conDataReg);
- break;
- case 2:
- *(unsigned short *) val = read2 (conDataReg);
- break;
- case 1:
- *(unsigned char *) val = read1 (conDataReg);
- break;
- default:
- ret_val = ILLEGAL_REG_OFFSET;
- break;
- }
- PSII_SYNC ();
-
- /* clear any pending master aborts */
- status = read4 (REG_P1_CSR);
- if (status & CLEAR_MASTER_ABORT) {
- ret_val = NO_DEVICE_FOUND;
- write4 (REG_P1_CSR, CLEAR_MASTER_ABORT);
- }
-
- return ret_val;
-}
-
-
-int PCIWriteConfig (int bus, int dev, int fn, int reg, int width,
- unsigned long val)
-{
- unsigned int conAdrVal;
- unsigned int conDataReg = REG_CONFIG_DATA;
- unsigned int status;
- int ret_val = 0;
-
-
- /* DEST bit hardcoded to 1: local pci is PCI-2 */
- /* TYPE bit is hardcoded to 1: all config cycles are local */
- conAdrVal = (1 << 24)
- | ((bus & 0xFF) << 16)
- | ((dev & 0xFF) << 11)
- | ((fn & 0x07) << 8)
- | (reg & 0xFC);
-
- /* clear any pending master aborts */
- write4 (REG_P1_CSR, CLEAR_MASTER_ABORT);
-
- /* Load the conAdrVal value first, then read from pb_conf_data */
- write4 (REG_CONFIG_ADDRESS, conAdrVal);
- PSII_SYNC ();
-
-
- /* Note: documentation does not match the pspan library code */
- /* Note: *pData comes back as -1 if device is not present */
- switch (width) {
- case 4:
- write4 (conDataReg, val);
- break;
- case 2:
- write2 (conDataReg, val);
- break;
- case 1:
- write1 (conDataReg, val);
- break;
- default:
- ret_val = ILLEGAL_REG_OFFSET;
- break;
- }
- PSII_SYNC ();
-
- /* clear any pending master aborts */
- status = read4 (REG_P1_CSR);
- if (status & CLEAR_MASTER_ABORT) {
- ret_val = NO_DEVICE_FOUND;
- write4 (REG_P1_CSR, CLEAR_MASTER_ABORT);
- }
-
- return ret_val;
-}
-
-
-int pci_read_config_byte (int bus, int dev, int fn, int reg,
- unsigned char *val)
-{
- unsigned long read_val;
- int ret_val;
-
- ret_val = PCIReadConfig (bus, dev, fn, reg, 1, &read_val);
- *val = read_val & 0xFF;
-
- return ret_val;
-}
-
-int pci_write_config_byte (int bus, int dev, int fn, int reg,
- unsigned char val)
-{
- return PCIWriteConfig (bus, dev, fn, reg, 1, val);
-}
-
-int pci_read_config_word (int bus, int dev, int fn, int reg,
- unsigned short *val)
-{
- unsigned long read_val;
- int ret_val;
-
- ret_val = PCIReadConfig (bus, dev, fn, reg, 2, &read_val);
- *val = read_val & 0xFFFF;
-
- return ret_val;
-}
-
-int pci_write_config_word (int bus, int dev, int fn, int reg,
- unsigned short val)
-{
- return PCIWriteConfig (bus, dev, fn, reg, 2, val);
-}
-
-int pci_read_config_dword (int bus, int dev, int fn, int reg,
- unsigned long *val)
-{
- return PCIReadConfig (bus, dev, fn, reg, 4, val);
-}
-
-int pci_write_config_dword (int bus, int dev, int fn, int reg,
- unsigned long val)
-{
- return PCIWriteConfig (bus, dev, fn, reg, 4, val);
-}
-
-#endif /* INCLUDE_PCI */
-
-int I2CAccess (unsigned char theI2CAddress, unsigned char theDevCode,
- unsigned char theChipSel, unsigned char *theValue, int RWFlag)
-{
- int ret_val = 0;
- unsigned int reg_value;
-
- reg_value = PowerSpanRead (REG_I2C_CSR);
-
- if (reg_value & I2C_CSR_ACT) {
- printf ("Error: I2C busy\n");
- ret_val = I2C_BUSY;
- } else {
- reg_value = ((theI2CAddress & 0xFF) << 24)
- | ((theDevCode & 0x0F) << 12)
- | ((theChipSel & 0x07) << 9)
- | I2C_CSR_ERR;
- if (RWFlag == I2C_WRITE) {
- reg_value |= I2C_CSR_RW | ((*theValue & 0xFF) << 16);
- }
-
- PowerSpanWrite (REG_I2C_CSR, reg_value);
- udelay (1);
-
- do {
- reg_value = PowerSpanRead (REG_I2C_CSR);
-
- if ((reg_value & I2C_CSR_ACT) == 0) {
- if (reg_value & I2C_CSR_ERR) {
- ret_val = I2C_ERR;
- } else {
- *theValue =
- (reg_value & I2C_CSR_DATA) >>
- 16;
- }
- }
- } while (reg_value & I2C_CSR_ACT);
- }
-
- return ret_val;
-}
-
-int EEPROMRead (unsigned char theI2CAddress, unsigned char *theValue)
-{
- return I2CAccess (theI2CAddress, I2C_EEPROM_DEV, I2C_EEPROM_CHIP_SEL,
- theValue, I2C_READ);
-}
-
-int EEPROMWrite (unsigned char theI2CAddress, unsigned char theValue)
-{
- return I2CAccess (theI2CAddress, I2C_EEPROM_DEV, I2C_EEPROM_CHIP_SEL,
- &theValue, I2C_WRITE);
-}
-
-int do_eeprom (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
-{
- char cmd;
- int ret_val = 0;
- unsigned int address = 0;
- unsigned char value = 1;
- unsigned char read_value;
- int ii;
- int error = 0;
- unsigned char *mem_ptr;
- unsigned char default_eeprom[] = EEPROM_DEFAULT;
-
- if (argc < 2) {
- goto usage;
- }
-
- cmd = argv[1][0];
- if (argc > 2) {
- address = simple_strtoul (argv[2], NULL, 16);
- if (argc > 3) {
- value = simple_strtoul (argv[3], NULL, 16) & 0xFF;
- }
- }
-
- switch (cmd) {
- case 'r':
- if (address > 256) {
- printf ("Illegal Address\n");
- goto usage;
- }
- printf ("@0x%x: ", address);
- for (ii = 0; ii < value; ii++) {
- if (EEPROMRead (address + ii, &read_value) !=
- 0) {
- printf ("Read Error\n");
- } else {
- printf ("0x%02x ", read_value);
- }
-
- if (((ii + 1) % 16) == 0) {
- printf ("\n");
- }
- }
- printf ("\n");
- break;
- case 'w':
- if (address > 256) {
- printf ("Illegal Address\n");
- goto usage;
- }
- if (argc < 4) {
- goto usage;
- }
- if (EEPROMWrite (address, value) != 0) {
- printf ("Write Error\n");
- }
- break;
- case 'g':
- if (argc != 3) {
- goto usage;
- }
- mem_ptr = (unsigned char *) address;
- for (ii = 0; ((ii < EEPROM_LENGTH) && (error == 0));
- ii++) {
- if (EEPROMRead (ii, &read_value) != 0) {
- printf ("Read Error\n");
- error = 1;
- } else {
- *mem_ptr = read_value;
- mem_ptr++;
- }
- }
- break;
- case 'p':
- if (argc != 3) {
- goto usage;
- }
- mem_ptr = (unsigned char *) address;
- for (ii = 0; ((ii < EEPROM_LENGTH) && (error == 0));
- ii++) {
- if (EEPROMWrite (ii, *mem_ptr) != 0) {
- printf ("Write Error\n");
- error = 1;
- }
-
- mem_ptr++;
- }
- break;
- case 'd':
- if (argc != 2) {
- goto usage;
- }
- for (ii = 0; ((ii < EEPROM_LENGTH) && (error == 0));
- ii++) {
- if (EEPROMWrite (ii, default_eeprom[ii]) != 0) {
- printf ("Write Error\n");
- error = 1;
- }
- }
- break;
- default:
- goto usage;
- }
-
- goto done;
- usage:
- printf ("Usage:\n%s\n", cmdtp->help);
-
- done:
- return ret_val;
-
-}
-
-U_BOOT_CMD (eeprom, 4, 0, do_eeprom,
- "eeprom - read/write/copy to/from the PowerSpan II eeprom\n",
- "eeprom r OFF [NUM]\n"
- " - read NUM words starting at OFF\n"
- "eeprom w OFF VAL\n"
- " - write word VAL at offset OFF\n"
- "eeprom g ADD\n"
- " - store contents of eeprom at address ADD\n"
- "eeprom p ADD\n"
- " - put data stored at address ADD into the eeprom\n"
- "eeprom d\n" " - return eeprom to default contents\n");
-
-unsigned int PowerSpanRead (unsigned int theOffset)
-{
- volatile unsigned int *ptr =
- (volatile unsigned int *) (PSPAN_BASEADDR + theOffset);
- unsigned int ret_val;
-
-#ifdef VERBOSITY
- if (gVerbosityLevel > 1) {
- printf ("PowerSpanRead: offset=%08x ", theOffset);
- }
-#endif
- ret_val = *ptr;
- PSII_SYNC ();
-
-#ifdef VERBOSITY
- if (gVerbosityLevel > 1) {
- printf ("value=%08x\n", ret_val);
- }
-#endif
-
- return ret_val;
-}
-
-void PowerSpanWrite (unsigned int theOffset, unsigned int theValue)
-{
- volatile unsigned int *ptr =
- (volatile unsigned int *) (PSPAN_BASEADDR + theOffset);
-#ifdef VERBOSITY
- if (gVerbosityLevel > 1) {
- printf ("PowerSpanWrite: offset=%08x val=%02x\n", theOffset,
- theValue);
- }
-#endif
- *ptr = theValue;
- PSII_SYNC ();
-}
-
-/**
- * Sets the indicated bits in the indicated register.
- * @param theOffset [IN] the register to access.
- * @param theMask [IN] bits set in theMask will be set in the register.
- */
-void PowerSpanSetBits (unsigned int theOffset, unsigned int theMask)
-{
- volatile unsigned int *ptr =
- (volatile unsigned int *) (PSPAN_BASEADDR + theOffset);
- unsigned int register_value;
-
-#ifdef VERBOSITY
- if (gVerbosityLevel > 1) {
- printf ("PowerSpanSetBits: offset=%08x mask=%02x\n",
- theOffset, theMask);
- }
-#endif
- register_value = *ptr;
- PSII_SYNC ();
-
- register_value |= theMask;
- *ptr = register_value;
- PSII_SYNC ();
-}
-
-/**
- * Clears the indicated bits in the indicated register.
- * @param theOffset [IN] the register to access.
- * @param theMask [IN] bits set in theMask will be cleared in the register.
- */
-void PowerSpanClearBits (unsigned int theOffset, unsigned int theMask)
-{
- volatile unsigned int *ptr =
- (volatile unsigned int *) (PSPAN_BASEADDR + theOffset);
- unsigned int register_value;
-
-#ifdef VERBOSITY
- if (gVerbosityLevel > 1) {
- printf ("PowerSpanClearBits: offset=%08x mask=%02x\n",
- theOffset, theMask);
- }
-#endif
- register_value = *ptr;
- PSII_SYNC ();
-
- register_value &= ~theMask;
- *ptr = register_value;
- PSII_SYNC ();
-}
-
-/**
- * Configures a slave image on the local bus, based on the parameters and some hardcoded system values.
- * Slave Images are images that cause the PowerSpan II to be a master on the PCI bus. Thus, they
- * are outgoing from the standpoint of the local bus.
- * @param theImageIndex [IN] the PowerSpan II image to set (assumed to be 0-7).
- * @param theBlockSize [IN] the block size of the image (as used by PowerSpan II: PB_SIx_CTL[BS]).
- * @param theMemIOFlag [IN] if PX_TGT_USE_MEM_IO, this image will have the MEM_IO bit set.
- * @param theEndianness [IN] the endian bits for the image (already shifted, use defines).
- * @param theLocalBaseAddr [IN] the Local address for the image (assumed to be valid with provided block size).
- * @param thePCIBaseAddr [IN] the PCI address for the image (assumed to be valid with provided block size).
- */
-int SetSlaveImage (int theImageIndex, unsigned int theBlockSize,
- int theMemIOFlag, int theEndianness,
- unsigned int theLocalBaseAddr, unsigned int thePCIBaseAddr)
-{
- unsigned int reg_offset = theImageIndex * PB_SLAVE_IMAGE_OFF;
- unsigned int reg_value = 0;
-
- /* Make sure that the Slave Image is disabled */
- PowerSpanClearBits ((REGS_PB_SLAVE_CSR + reg_offset),
- PB_SLAVE_CSR_IMG_EN);
-
- /* Setup the mask required for requested PB Slave Image configuration */
- reg_value = PB_SLAVE_CSR_TA_EN | theEndianness | (theBlockSize << 24);
- if (theMemIOFlag == PB_SLAVE_USE_MEM_IO) {
- reg_value |= PB_SLAVE_CSR_MEM_IO;
- }
-
- /* hardcoding the following:
- TA_EN = 1
- MD_EN = 0
- MODE = 0
- PRKEEP = 0
- RD_AMT = 0
- */
- PowerSpanWrite ((REGS_PB_SLAVE_CSR + reg_offset), reg_value);
-
- /* these values are not checked by software */
- PowerSpanWrite ((REGS_PB_SLAVE_BADDR + reg_offset), theLocalBaseAddr);
- PowerSpanWrite ((REGS_PB_SLAVE_TADDR + reg_offset), thePCIBaseAddr);
-
- /* Enable the Slave Image */
- PowerSpanSetBits ((REGS_PB_SLAVE_CSR + reg_offset),
- PB_SLAVE_CSR_IMG_EN);
-
- return 0;
-}
-
-/**
- * Configures a target image on the local bus, based on the parameters and some hardcoded system values.
- * Target Images are used when the PowerSpan II is acting as a target for an access. Thus, they
- * are incoming from the standpoint of the local bus.
- * In order to behave better on the host PCI bus, if thePCIBaseAddr is NULL (0x00000000), then the PCI
- * base address will not be updated; makes sense given that the hosts own memory should be mapped to
- * PCI address 0x00000000.
- * @param theImageIndex [IN] the PowerSpan II image to set.
- * @param theBlockSize [IN] the block size of the image (as used by PowerSpan II: Px_TIx_CTL[BS]).
- * @param theMemIOFlag [IN] if PX_TGT_USE_MEM_IO, this image will have the MEM_IO bit set.
- * @param theEndianness [IN] the endian bits for the image (already shifted, use defines).
- * @param theLocalBaseAddr [IN] the Local address for the image (assumed to be valid with provided block size).
- * @param thePCIBaseAddr [IN] the PCI address for the image (assumed to be valid with provided block size).
- */
-int SetTargetImage (int theImageIndex, unsigned int theBlockSize,
- int theMemIOFlag, int theEndianness,
- unsigned int theLocalBaseAddr,
- unsigned int thePCIBaseAddr)
-{
- unsigned int csr_reg_offset = theImageIndex * P1_TGT_IMAGE_OFF;
- unsigned int pci_reg_offset = theImageIndex * P1_BST_OFF;
- unsigned int reg_value = 0;
-
- /* Make sure that the Slave Image is disabled */
- PowerSpanClearBits ((REGS_P1_TGT_CSR + csr_reg_offset),
- PB_SLAVE_CSR_IMG_EN);
-
- /* Setup the mask required for requested PB Slave Image configuration */
- reg_value =
- PX_TGT_CSR_TA_EN | PX_TGT_CSR_BAR_EN | (theBlockSize << 24) |
- PX_TGT_CSR_RTT_READ | PX_TGT_CSR_WTT_WFLUSH | theEndianness;
- if (theMemIOFlag == PX_TGT_USE_MEM_IO) {
- reg_value |= PX_TGT_MEM_IO;
- }
-
- /* hardcoding the following:
- TA_EN = 1
- BAR_EN = 1
- MD_EN = 0
- MODE = 0
- DEST = 0
- RTT = 01010
- GBL = 0
- CI = 0
- WTT = 00010
- PRKEEP = 0
- MRA = 0
- RD_AMT = 0
- */
- PowerSpanWrite ((REGS_P1_TGT_CSR + csr_reg_offset), reg_value);
-
- PowerSpanWrite ((REGS_P1_TGT_TADDR + csr_reg_offset),
- theLocalBaseAddr);
-
- if (thePCIBaseAddr != (unsigned int) NULL) {
- PowerSpanWrite ((REGS_P1_BST + pci_reg_offset),
- thePCIBaseAddr);
- }
-
- /* Enable the Slave Image */
- PowerSpanSetBits ((REGS_P1_TGT_CSR + csr_reg_offset),
- PB_SLAVE_CSR_IMG_EN);
-
- return 0;
-}
-
-int do_bridge (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
-{
- char cmd;
- int ret_val = 1;
- unsigned int image_index;
- unsigned int block_size;
- unsigned int mem_io;
- unsigned int local_addr;
- unsigned int pci_addr;
- int endianness;
-
- if (argc != 8) {
- goto usage;
- }
-
- cmd = argv[1][0];
- image_index = simple_strtoul (argv[2], NULL, 16);
- block_size = simple_strtoul (argv[3], NULL, 16);
- mem_io = simple_strtoul (argv[4], NULL, 16);
- endianness = argv[5][0];
- local_addr = simple_strtoul (argv[6], NULL, 16);
- pci_addr = simple_strtoul (argv[7], NULL, 16);
-
-
- switch (cmd) {
- case 'i':
- if (tolower (endianness) == 'b') {
- endianness = PX_TGT_CSR_BIG_END;
- } else if (tolower (endianness) == 'l') {
- endianness = PX_TGT_CSR_TRUE_LEND;
- } else {
- goto usage;
- }
- SetTargetImage (image_index, block_size, mem_io,
- endianness, local_addr, pci_addr);
- break;
- case 'o':
- if (tolower (endianness) == 'b') {
- endianness = PB_SLAVE_CSR_BIG_END;
- } else if (tolower (endianness) == 'l') {
- endianness = PB_SLAVE_CSR_TRUE_LEND;
- } else {
- goto usage;
- }
- SetSlaveImage (image_index, block_size, mem_io,
- endianness, local_addr, pci_addr);
- break;
- default:
- goto usage;
- }
-
- goto done;
-usage:
- printf ("Usage:\n%s\n", cmdtp->help);
-
-done:
- return ret_val;
-}
diff --git a/board/amirix/ap1000/powerspan.h b/board/amirix/ap1000/powerspan.h
deleted file mode 100644
index 4e9a8c1bd8..0000000000
--- a/board/amirix/ap1000/powerspan.h
+++ /dev/null
@@ -1,170 +0,0 @@
-/**
- * @file powerspan.h Header file for PowerSpan II code.
- */
-
-/*
- * (C) Copyright 2005
- * AMIRIX Systems Inc.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef POWERSPAN_H
-#define POWERSPAN_H
-
-#define CLEAR_MASTER_ABORT 0xdeadbeef
-#define NO_DEVICE_FOUND -1
-#define ILLEGAL_REG_OFFSET -2
-#define I2C_BUSY -3
-#define I2C_ERR -4
-
-#define REG_P1_CSR 0x004
-#define REGS_P1_BST 0x018
-#define REG_P1_ERR_CSR 0x150
-#define REG_P1_MISC_CSR 0x160
-#define REGS_P1_TGT_CSR 0x100
-#define REGS_P1_TGT_TADDR 0x104
-#define REGS_PB_SLAVE_CSR 0x200
-#define REGS_PB_SLAVE_TADDR 0x204
-#define REGS_PB_SLAVE_BADDR 0x208
-#define REG_CONFIG_ADDRESS 0x290
-#define REG_CONFIG_DATA 0x294
-#define REG_PB_ERR_CSR 0x2B0
-#define REG_PB_MISC_CSR 0x2C0
-#define REG_MISC_CSR 0x400
-#define REG_I2C_CSR 0x408
-#define REG_RESET_CSR 0x40C
-#define REG_ISR0 0x410
-#define REG_ISR1 0x414
-#define REG_IER0 0x418
-#define REG_MBOX_MAP 0x420
-#define REG_HW_MAP 0x42C
-#define REG_IDR 0x444
-
-#define CSR_MEMORY_SPACE_ENABLE 0x00000002
-#define CSR_PCI_MASTER_ENABLE 0x00000004
-
-#define P1_BST_OFF 0x04
-
-#define PX_ERR_ERR_STATUS 0x01000000
-
-#define PX_MISC_CSR_MAX_RETRY_MASK 0x00000F00
-#define PX_MISC_CSR_MAX_RETRY 0x00000F00
-#define PX_MISC_REG_BAR_ENABLE 0x00008000
-#define PB_MISC_TEA_ENABLE 0x00000010
-#define PB_MISC_MAC_TEA 0x00000040
-
-#define P1_TGT_IMAGE_OFF 0x010
-#define PX_TGT_CSR_IMG_EN 0x80000000
-#define PX_TGT_CSR_TA_EN 0x40000000
-#define PX_TGT_CSR_BAR_EN 0x20000000
-#define PX_TGT_CSR_MD_EN 0x10000000
-#define PX_TGT_CSR_MODE 0x00800000
-#define PX_TGT_CSR_DEST 0x00400000
-#define PX_TGT_CSR_MEM_IO 0x00200000
-#define PX_TGT_CSR_GBL 0x00080000
-#define PX_TGT_CSR_CL 0x00040000
-#define PX_TGT_CSR_PRKEEP 0x00000080
-
-#define PX_TGT_CSR_BS_MASK 0x0F000000
-#define PX_TGT_MEM_IO 0x00200000
-#define PX_TGT_CSR_RTT_MASK 0x001F0000
-#define PX_TGT_CSR_RTT_READ 0x000A0000
-#define PX_TGT_CSR_WTT_MASK 0x00001F00
-#define PX_TGT_CSR_WTT_WFLUSH 0x00000200
-#define PX_TGT_CSR_END_MASK 0x00000060
-#define PX_TGT_CSR_BIG_END 0x00000040
-#define PX_TGT_CSR_TRUE_LEND 0x00000060
-#define PX_TGT_CSR_RDAMT_MASK 0x00000007
-
-#define PX_TGT_CSR_BS_64MB 0xa
-#define PX_TGT_CSR_BS_16MB 0x8
-
-#define PX_TGT_USE_MEM_IO 1
-#define PX_TGT_NOT_MEM_IO 0
-
-#define PB_SLAVE_IMAGE_OFF 0x010
-#define PB_SLAVE_CSR_IMG_EN 0x80000000
-#define PB_SLAVE_CSR_TA_EN 0x40000000
-#define PB_SLAVE_CSR_MD_EN 0x20000000
-#define PB_SLAVE_CSR_MODE 0x00800000
-#define PB_SLAVE_CSR_DEST 0x00400000
-#define PB_SLAVE_CSR_MEM_IO 0x00200000
-#define PB_SLAVE_CSR_PRKEEP 0x00000080
-
-#define PB_SLAVE_CSR_BS_MASK 0x1F000000
-#define PB_SLAVE_CSR_END_MASK 0x00000060
-#define PB_SLAVE_CSR_BIG_END 0x00000040
-#define PB_SLAVE_CSR_TRUE_LEND 0x00000060
-#define PB_SLAVE_CSR_RDAMT_MASK 0x00000007
-
-#define PB_SLAVE_USE_MEM_IO 1
-#define PB_SLAVE_NOT_MEM_IO 0
-
-
-#define MISC_CSR_PCI1_LOCK 0x00000080
-
-#define I2C_CSR_ADDR 0xFF000000 /* Specifies I2C Device Address to be Accessed */
-#define I2C_CSR_DATA 0x00FF0000 /* Specifies the Required Data for a Write */
-#define I2C_CSR_DEV_CODE 0x0000F000 /* Device Select. I2C 4-bit Device Code */
-#define I2C_CSR_CS 0x00000E00 /* Chip Select */
-#define I2C_CSR_RW 0x00000100 /* Read/Write */
-#define I2C_CSR_ACT 0x00000080 /* I2C Interface Active */
-#define I2C_CSR_ERR 0x00000040 /* Error */
-
-#define I2C_EEPROM_DEV 0xa
-#define I2C_EEPROM_CHIP_SEL 0
-
-#define I2C_READ 0
-#define I2C_WRITE 1
-
-#define RESET_CSR_EEPROM_LOAD 0x00000010
-
-#define ISR_CLEAR_ALL 0xFFFFFFFF
-
-#define IER0_DMA_INTS_EN 0x0F000000
-#define IER0_PCI_1_EN 0x00400000
-#define IER0_HW_INTS_EN 0x003F0000
-#define IER0_MB_INTS_EN 0x000000FF
-#define IER0_DEFAULT (IER0_DMA_INTS_EN | IER0_PCI_1_EN | IER0_HW_INTS_EN | IER0_MB_INTS_EN)
-
-#define MBOX_MAP_TO_INT4 0xCCCCCCCC
-
-#define HW_MAP_HW4_TO_INT4 0x000C0000
-
-#define IDR_PCI_A_OUT 0x40000000
-#define IDR_MBOX_OUT 0x10000000
-
-
-int pci_read_config_byte(int bus, int dev, int fn, int reg, unsigned char* val);
-int pci_write_config_byte(int bus, int dev, int fn, int reg, unsigned char val);
-int pci_read_config_word(int bus, int dev, int fn, int reg, unsigned short* val);
-int pci_write_config_word(int bus, int dev, int fn, int reg, unsigned short val);
-int pci_read_config_dword(int bus, int dev, int fn, int reg, unsigned long* val);
-int pci_write_config_dword(int bus, int dev, int fn, int reg, unsigned long val);
-
-unsigned int PowerSpanRead(unsigned int theOffset);
-void PowerSpanWrite(unsigned int theOffset, unsigned int theValue);
-
-int I2CAccess(unsigned char theI2CAddress, unsigned char theDevCode, unsigned char theChipSel, unsigned char* theValue, int RWFlag);
-
-int PCIWriteConfig(int bus, int dev, int fn, int reg, int width, unsigned long val);
-int PCIReadConfig(int bus, int dev, int fn, int reg, int width, unsigned long* val);
-
-int SetSlaveImage(int theImageIndex, unsigned int theBlockSize, int theMemIOFlag, int theEndianness, unsigned int theLocalBaseAddr, unsigned int thePCIBaseAddr);
-int SetTargetImage(int theImageIndex, unsigned int theBlockSize, int theMemIOFlag, int theEndianness, unsigned int theLocalBaseAddr, unsigned int thePCIBaseAddr);
-
-#endif
diff --git a/board/amirix/ap1000/serial.c b/board/amirix/ap1000/serial.c
deleted file mode 100644
index 39c4157925..0000000000
--- a/board/amirix/ap1000/serial.c
+++ /dev/null
@@ -1,117 +0,0 @@
-/*
- * (C) Copyright 2002
- * Peter De Schrijver (p2@mind.be), Mind Linux Solutions, NV.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- */
-
-#include <asm/u-boot.h>
-#include <asm/processor.h>
-#include <common.h>
-#include <command.h>
-#include <config.h>
-
-#include <ns16550.h>
-
-#if 0
-#include "serial.h"
-#endif
-
-const NS16550_t COM_PORTS[] =
- { (NS16550_t) CFG_NS16550_COM1, (NS16550_t) CFG_NS16550_COM2 };
-
-#undef CFG_DUART_CHAN
-#define CFG_DUART_CHAN gComPort
-static int gComPort = 0;
-
-int serial_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- int clock_divisor = CFG_NS16550_CLK / 16 / gd->baudrate;
-
- (void) NS16550_init (COM_PORTS[0], clock_divisor);
- gComPort = 0;
-
- return 0;
-}
-
-void serial_putc (const char c)
-{
- if (c == '\n') {
- NS16550_putc (COM_PORTS[CFG_DUART_CHAN], '\r');
- }
-
- NS16550_putc (COM_PORTS[CFG_DUART_CHAN], c);
-}
-
-int serial_getc (void)
-{
- return NS16550_getc (COM_PORTS[CFG_DUART_CHAN]);
-}
-
-int serial_tstc (void)
-{
- return NS16550_tstc (COM_PORTS[CFG_DUART_CHAN]);
-}
-
-void serial_setbrg (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- int clock_divisor = CFG_NS16550_CLK / 16 / gd->baudrate;
-
-#ifdef CFG_INIT_CHAN1
- NS16550_reinit (COM_PORTS[0], clock_divisor);
-#endif
-#ifdef CFG_INIT_CHAN2
- NS16550_reinit (COM_PORTS[1], clock_divisor);
-#endif
-}
-
-void serial_puts (const char *s)
-{
- while (*s) {
- serial_putc (*s++);
- }
-}
-
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
-void kgdb_serial_init (void)
-{
-}
-
-void putDebugChar (int c)
-{
- serial_putc (c);
-}
-
-void putDebugStr (const char *str)
-{
- serial_puts (str);
-}
-
-int getDebugChar (void)
-{
- return serial_getc ();
-}
-
-void kgdb_interruptible (int yes)
-{
- return;
-}
-#endif /* CFG_CMD_KGDB */
diff --git a/board/amirix/ap1000/u-boot.lds b/board/amirix/ap1000/u-boot.lds
deleted file mode 100644
index 109e7fe3e1..0000000000
--- a/board/amirix/ap1000/u-boot.lds
+++ /dev/null
@@ -1,145 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/ppc4xx/start.o (.text)
- board/amirix/ap1000/init.o (.text)
- cpu/ppc4xx/kgdb.o (.text)
- cpu/ppc4xx/traps.o (.text)
- cpu/ppc4xx/interrupts.o (.text)
- cpu/ppc4xx/serial.o (.text)
- cpu/ppc4xx/cpu_init.o (.text)
- cpu/ppc4xx/speed.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/extable.o (.text)
- lib_generic/zlib.o (.text)
-
-/* . = env_offset;*/
-/* common/environment.o(.text)*/
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/armadillo/Makefile b/board/armadillo/Makefile
deleted file mode 100644
index 52ea7f28d4..0000000000
--- a/board/armadillo/Makefile
+++ /dev/null
@@ -1,48 +0,0 @@
-#
-# (C) Copyright 2002
-# Sysgo Real-Time Solutions, GmbH <www.elinos.com>
-# Marius Groeger <mgroeger@sysgo.de>
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := armadillo.o flash.o
-SOBJS := lowlevel_init.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS) $(SOBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/armadillo/armadillo.c b/board/armadillo/armadillo.c
deleted file mode 100644
index de04c66385..0000000000
--- a/board/armadillo/armadillo.c
+++ /dev/null
@@ -1,62 +0,0 @@
-/*
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * (C) Copyright 2005 Rowel Atienza <rowel@diwalabs.com>
- * Armadillo board HT1070
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <clps7111.h>
-
-/* ------------------------------------------------------------------------- */
-
-
-/*
- * Miscelaneous platform dependent initialisations
- */
-
-int board_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- /* Activate LED flasher */
- IO_LEDFLSH = 0x40;
-
- /* arch number MACH_TYPE_ARMADILLO - not official*/
- gd->bd->bi_arch_number = 83;
-
- /* location of boot parameters */
- gd->bd->bi_boot_params = 0xc0000100;
-
- return 0;
-}
-
-int dram_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
-
- return (0);
-}
diff --git a/board/armadillo/config.mk b/board/armadillo/config.mk
deleted file mode 100644
index 23c432f165..0000000000
--- a/board/armadillo/config.mk
+++ /dev/null
@@ -1,29 +0,0 @@
-#
-# (C) Copyright 2000
-# Sysgo Real-Time Solutions, GmbH <www.elinos.com>
-# Marius Groeger <mgroeger@sysgo.de>
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#address where u-boot will be relocated
-TEXT_BASE = 0xc0f80000
diff --git a/board/armadillo/flash.c b/board/armadillo/flash.c
deleted file mode 100644
index 037a6430da..0000000000
--- a/board/armadillo/flash.c
+++ /dev/null
@@ -1,338 +0,0 @@
-/*
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * (C) Copyright 2005 Rowel Atienza <rowel@diwalabs.com>
- * Flash driver for armadillo board HT1070
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-
-#define FLASH_BANK_SIZE 0x400000
-
-/*value used by hermit is 0x200*/
-/*document says sector size is either 64k in low mem reg and 8k in high mem reg*/
-#define MAIN_SECT_SIZE 0x10000
-
-#define UNALIGNED_MASK (3)
-#define FL_WORD(addr) (*(volatile unsigned short*)(addr))
-#define FLASH_TIMEOUT 20000000
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
-
-/*-----------------------------------------------------------------------
- */
-
-ulong flash_init (void)
-{
- int i, j;
- ulong size = 0;
-
- for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
- ulong flashbase = 0;
-
- flash_info[i].flash_id = (FUJ_MANUFACT & FLASH_VENDMASK);
- /*(INTEL_ID_28F128J3 & FLASH_TYPEMASK); */
- flash_info[i].size = FLASH_BANK_SIZE;
- flash_info[i].sector_count = CFG_MAX_FLASH_SECT;
- memset (flash_info[i].protect, 0, CFG_MAX_FLASH_SECT);
- if (i == 0)
- flashbase = PHYS_FLASH_1;
- else
- panic ("configured too many flash banks!\n");
- for (j = 0; j < flash_info[i].sector_count; j++) {
- flash_info[i].start[j] =
- flashbase + j * MAIN_SECT_SIZE;
- }
- size += flash_info[i].size;
- }
-
- /* Protect monitor and environment sectors
- */
- flash_protect (FLAG_PROTECT_SET,
- CFG_FLASH_BASE,
- CFG_FLASH_BASE + monitor_flash_len - 1,
- &flash_info[0]);
-
- flash_protect (FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0]);
-
- return size;
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t * info)
-{
- int i;
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case (FUJ_MANUFACT & FLASH_VENDMASK):
- printf ("Fujitsu: ");
- break;
- default:
- printf ("Unknown Vendor ");
- break;
- }
-/*
- switch (info->flash_id & FLASH_TYPEMASK) {
- case (INTEL_ID_28F128J3 & FLASH_TYPEMASK):
- printf ("28F128J3 (128Mbit)\n");
- break;
- default:
- printf ("Unknown Chip Type\n");
- goto Done;
- break;
- }
-*/
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; i++) {
- if ((i % 5) == 0) {
- printf ("\n ");
- }
- printf (" %08lX%s", info->start[i],
- info->protect[i] ? " (RO)" : " ");
- }
- printf ("\n");
-
-/*
-Done: ;
-*/
-}
-
-/*
- * * Loop until both write state machines complete.
- * */
-static unsigned short flash_status_wait (unsigned long addr,
- unsigned short value)
-{
- unsigned short status;
- long timeout = FLASH_TIMEOUT;
-
- while (((status = (FL_WORD (addr))) != value) && timeout > 0) {
- timeout--;
- }
- return status;
-}
-
-/*
- * Loop until the Write State machine is ready, then do a full error
- * check. Clear status and leave the flash in Read Array mode; return
- * 0 for no error, -1 for error.
- */
-static int flash_status_full_check (unsigned long addr, unsigned short value1,
- unsigned short value2)
-{
- unsigned short status1, status2;
-
- status1 = flash_status_wait (addr, value1);
- status2 = flash_status_wait (addr + 2, value2);
- return (status1 != value1 || status2 != value2) ? -1 : 0;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t * info, int s_first, int s_last)
-{
- int flag, prot, sect;
- int rc = ERR_OK;
- unsigned long base;
- unsigned long addr;
-
- if ((info->flash_id & FLASH_VENDMASK) !=
- (FUJ_MANUFACT & FLASH_VENDMASK)) {
- return ERR_UNKNOWN_FLASH_VENDOR;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
- if (prot)
- return ERR_PROTECTED;
-
- /*
- * Disable interrupts which might cause a timeout
- * here. Remember that our exception vectors are
- * at address 0 in the flash, and we don't want a
- * (ticker) exception to happen while the flash
- * chip is in programming mode.
- */
- flag = disable_interrupts ();
-
- printf ("Erasing %d sectors starting at sector %2d.\n"
- "This make take some time ... ",
- s_last - s_first, sect);
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect <= s_last && !ctrlc (); sect++) {
- /* ARM simple, non interrupt dependent timer */
- reset_timer_masked ();
-
- if (info->protect[sect] == 0) { /* not protected */
-
- addr = sect * MAIN_SECT_SIZE;
- addr &= ~(unsigned long) UNALIGNED_MASK; /* word align */
- base = addr & 0xF0000000;
-
- FL_WORD (base + (0x555 << 1)) = 0xAA;
- FL_WORD (base + (0x2AA << 1)) = 0x55;
- FL_WORD (base + (0x555 << 1)) = 0x80;
- FL_WORD (base + (0x555 << 1)) = 0xAA;
- FL_WORD (base + (0x2AA << 1)) = 0x55;
- FL_WORD (addr) = 0x30;
- if (flash_status_full_check (addr, 0xFFFF, 0xFFFF))
- return ERR_PROTECTED;
- }
- }
- printf ("\nDone.\n");
- if (ctrlc ())
- printf ("User Interrupt!\n");
-
- /* allow flash to settle - wait 10 ms */
- udelay_masked (10000);
-
- if (flag)
- enable_interrupts ();
-
- return rc;
-}
-
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash
- */
-
-static int write_word (flash_info_t * info, ulong dest, ushort data)
-{
- int flag;
- unsigned long base;
-
- /* Check if Flash is (sufficiently) erased
- */
- if ((FL_WORD (dest) & data) != data)
- return ERR_NOT_ERASED;
-
- /*if(dest & UNALIGNED_MASK) return ERR_ALIGN; */
-
- /*
- * Disable interrupts which might cause a timeout
- * here. Remember that our exception vectors are
- * at address 0 in the flash, and we don't want a
- * (ticker) exception to happen while the flash
- * chip is in programming mode.
- */
- flag = disable_interrupts ();
-
- /* arm simple, non interrupt dependent timer */
- reset_timer_masked ();
-
- base = dest & 0xF0000000;
- FL_WORD (base + (0x555 << 1)) = 0xAA;
- FL_WORD (base + (0x2AA << 1)) = 0x55;
- FL_WORD (base + (0x555 << 1)) = 0xA0;
- FL_WORD (dest) = data;
- /*printf("writing 0x%p = 0x%x\n",dest,data); */
- if (flash_status_wait (dest, data) != data)
- return ERR_PROG_ERROR;
-
- if (flag)
- enable_interrupts ();
-
- return ERR_OK;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash.
- */
-
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- ulong cp, wp;
- ushort data;
- int l;
- int i, rc;
-
- wp = (addr & ~1); /* get lower word aligned address */
- printf ("Writing %d short data to 0x%p from 0x%p.\n ", cnt, wp, src);
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i = 0, cp = wp; i < l; ++i, ++cp) {
- data = (data >> 8) | (*(uchar *) cp << 8);
- }
- for (; i < 2 && cnt > 0; ++i) {
- data = (data >> 8) | (*src++ << 8);
- --cnt;
- ++cp;
- }
- for (; cnt == 0 && i < 2; ++i, ++cp) {
- data = (data >> 8) | (*(uchar *) cp << 8);
- }
-
- if ((rc = write_word (info, wp, data)) != 0) {
- return (rc);
- }
- wp += 2;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 2) {
- data = *((vu_short *) src);
- if ((rc = write_word (info, wp, data)) != 0) {
- return (rc);
- }
- src += 2;
- wp += 2;
- cnt -= 2;
- }
-
- if (cnt == 0) {
- printf ("\nDone.\n");
- return ERR_OK;
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i = 0, cp = wp; i < 2 && cnt > 0; ++i, ++cp) {
- data = (data >> 8) | (*src++ << 8);
- --cnt;
- }
- for (; i < 2; ++i, ++cp) {
- data = (data >> 8) | (*(uchar *) cp << 8);
- }
-
- return write_word (info, wp, data);
-}
diff --git a/board/armadillo/lowlevel_init.S b/board/armadillo/lowlevel_init.S
deleted file mode 100644
index 6cf642611c..0000000000
--- a/board/armadillo/lowlevel_init.S
+++ /dev/null
@@ -1,66 +0,0 @@
-/*
- * Initialization stuff - taken from hermit
- * (C) Copyright 2005 Rowel Atienza <rowel@diwalabs.com>
- * Armadillo board HT1070
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-
-#include <config.h>
-#include <version.h>
-
-
-/* some parameters for the board */
-/* setting up the memory */
-#define SRAM_START 0x60000000
-#define SRAM_SIZE 0x0000c000
-
-.globl lowlevel_init
-lowlevel_init:
- mov r0, #0x70 /* 32-bit code + data, MMU mandatory */
- mcr p15, 0, r0, c1, c0, 0 /* MMU init */
-
- mov r0, #0
- mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */
- mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */
-
- mov r0, #0x80000000 /* I/O base */
-
- mov r1, #0x6 /* CLKCTL_73 in SYSCON3 */
- add r2, r0, #0x2200 /* address of SYSCON3 in r2 */
- str r1, [r2] /* set clock speed to 73.728 MHz */
-
- mov r1, #0x81 /* 64KHz DRAM refresh period */
- str r1, [r0, #0x200] /* set DRFPR */
-
- mov r1, #0x500 /* permanent enable, 16bits wide */
- add r1, r1, #0x42 /* 128Mbit, CAS lat = 2 SDRAM */
- add r2, r0, #0x2300 /* load address in r2 */
- str r1, [r2]
-
- mov r1, #0x100 /* SDRAM refresh rate */
- add r2, r0, #0x2340 /* load address in r2 */
- str r1, [r2]
-
- mov sp, #SRAM_START /* init stack pointer */
- add sp, sp, #SRAM_SIZE
-
- /* everything is fine now */
- mov pc, lr
diff --git a/board/armadillo/u-boot.lds b/board/armadillo/u-boot.lds
deleted file mode 100644
index 64d946c439..0000000000
--- a/board/armadillo/u-boot.lds
+++ /dev/null
@@ -1,55 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-ENTRY(_start)
-SECTIONS
-{
- . = 0x00000000;
-
- . = ALIGN(4);
- .text :
- {
- cpu/arm720t/start.o (.text)
- *(.text)
- }
-
- . = ALIGN(4);
- .rodata : { *(.rodata) }
-
- . = ALIGN(4);
- .data : { *(.data) }
-
- . = ALIGN(4);
- .got : { *(.got) }
-
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = ALIGN(4);
- __bss_start = .;
- .bss : { *(.bss) }
- _end = .;
-}
diff --git a/board/assabet/Makefile b/board/assabet/Makefile
deleted file mode 100644
index c49f1b4604..0000000000
--- a/board/assabet/Makefile
+++ /dev/null
@@ -1,49 +0,0 @@
-#
-# (C) Copyright 2000-2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# 2004 (c) MontaVista Software, Inc.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := assabet.o
-SOBJS := setup.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS) $(SOBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/assabet/assabet.c b/board/assabet/assabet.c
deleted file mode 100644
index d3ccbb5367..0000000000
--- a/board/assabet/assabet.c
+++ /dev/null
@@ -1,121 +0,0 @@
-/*
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * 2004 (c) MontaVista Software, Inc.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <SA-1100.h>
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Board dependent initialisation
- */
-
-#define ECOR 0x8000
-#define ECOR_RESET 0x80
-#define ECOR_LEVEL_IRQ 0x40
-#define ECOR_WR_ATTRIB 0x04
-#define ECOR_ENABLE 0x01
-
-#define ECSR 0x8002
-#define ECSR_IOIS8 0x20
-#define ECSR_PWRDWN 0x04
-#define ECSR_INT 0x02
-#define SMC_IO_SHIFT 2
-#define NCR_0 (*((volatile u_char *)(0x100000a0)))
-#define NCR_ENET_OSC_EN (1<<3)
-
-static inline u8
-readb(volatile u8 * p)
-{
- return *p;
-}
-
-static inline void
-writeb(u8 v, volatile u8 * p)
-{
- *p = v;
-}
-
-static void
-smc_init(void)
-{
- u8 ecor;
- u8 ecsr;
- volatile u8 *addr = (volatile u8 *)(0x18000000 + (1 << 25));
-
- NCR_0 |= NCR_ENET_OSC_EN;
- udelay(100);
-
- ecor = readb(addr + (ECOR << SMC_IO_SHIFT)) & ~ECOR_RESET;
- writeb(ecor | ECOR_RESET, addr + (ECOR << SMC_IO_SHIFT));
- udelay(100);
-
- /*
- * The device will ignore all writes to the enable bit while
- * reset is asserted, even if the reset bit is cleared in the
- * same write. Must clear reset first, then enable the device.
- */
- writeb(ecor, addr + (ECOR << SMC_IO_SHIFT));
- writeb(ecor | ECOR_ENABLE, addr + (ECOR << SMC_IO_SHIFT));
-
- /*
- * Set the appropriate byte/word mode.
- */
- ecsr = readb(addr + (ECSR << SMC_IO_SHIFT)) & ~ECSR_IOIS8;
- ecsr |= ECSR_IOIS8;
- writeb(ecsr, addr + (ECSR << SMC_IO_SHIFT));
- udelay(100);
-}
-
-static void
-neponset_init(void)
-{
- smc_init();
-}
-
-int
-board_init(void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- gd->bd->bi_arch_number = MACH_TYPE_ASSABET;
- gd->bd->bi_boot_params = 0xc0000100;
-
- neponset_init();
-
- return 0;
-}
-
-int
-dram_init(void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
-
- return (0);
-}
diff --git a/board/assabet/config.mk b/board/assabet/config.mk
deleted file mode 100644
index 74cb41941d..0000000000
--- a/board/assabet/config.mk
+++ /dev/null
@@ -1,7 +0,0 @@
-#
-# SA-1110 based Intel Assabet board
-#
-# The Intel Assabet 1 bank of 32 MiB SDRAM
-#
-
-TEXT_BASE = 0xc1f00000
diff --git a/board/assabet/setup.S b/board/assabet/setup.S
deleted file mode 100644
index 56ea0dd928..0000000000
--- a/board/assabet/setup.S
+++ /dev/null
@@ -1,136 +0,0 @@
-/*
- * Memory Setup stuff - taken from blob memsetup.S
- *
- * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) and
- * Jan-Derk Bakker (J.D.Bakker@its.tudelft.nl)
- * 2004 (c) MontaVista Software, Inc.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-
-#include "config.h"
-#include "version.h"
-
-
-/*-----------------------------------------------------------------------
- * Board defines:
- */
-
-#define MDCNFG 0x00
-#define MDCAS00 0x04
-#define MDCAS01 0x08
-#define MDCAS02 0x0C
-#define MSC0 0x10
-#define MSC1 0x14
-#define MECR 0x18
-#define MDREFR 0x1C
-#define MDCAS20 0x20
-#define MDCAS21 0x24
-#define MDCAS22 0x28
-#define MSC2 0x2C
-#define SMCNFG 0x30
-
-#define ASSABET_BCR (0x12000000)
-#define ASSABET_BCR_DB1110 (0x00a07490 | (0<<16) | (0<<17))
-#define ASSABET_SCR_nNEPONSET (1 << 9)
-#define NEPONSET_LEDS (0x10000010)
-
-
-/*-----------------------------------------------------------------------
- * Setup parameters for the board:
- */
-
-
-MEM_BASE: .long 0xa0000000
-MEM_START: .long 0xc0000000
-
-mdcnfg: .long 0x72547254
-mdcas00: .long 0xaaaaaa7f
-mdcas01: .long 0xaaaaaaaa
-mdcas02: .long 0xaaaaaaaa
-msc0: .long 0x4b384370
-msc1: .long 0x22212419
-mecr: .long 0x994a994a
-mdrefr: .long 0x04340327
-mdcas20: .long 0xaaaaaa7f
-mdcas21: .long 0xaaaaaaaa
-mdcas22: .long 0xaaaaaaaa
-msc2: .long 0x42196669
-smcnfg: .long 0x00000000
-
-BCR: .long ASSABET_BCR
-BCR_DB1110: .long ASSABET_BCR_DB1110
-LEDS: .long NEPONSET_LEDS
-
-
- .globl lowlevel_init
-lowlevel_init:
-
- /* Setting up the memory and stuff */
-
- ldr r0, MEM_BASE
- ldr r1, mdcas00
- str r1, [r0, #MDCAS00]
- ldr r1, mdcas01
- str r1, [r0, #MDCAS01]
- ldr r1, mdcas02
- str r1, [r0, #MDCAS02]
- ldr r1, mdcas20
- str r1, [r0, #MDCAS20]
- ldr r1, mdcas21
- str r1, [r0, #MDCAS21]
- ldr r1, mdcas22
- str r1, [r0, #MDCAS22]
- ldr r1, mdrefr
- str r1, [r0, #MDREFR]
- ldr r1, mecr
- str r1, [r0, #MECR]
- ldr r1, msc0
- str r1, [r0, #MSC0]
- ldr r1, msc1
- str r1, [r0, #MSC1]
- ldr r1, msc2
- str r1, [r0, #MSC2]
- ldr r1, smcnfg
- str r1, [r0, #SMCNFG]
-
- ldr r1, mdcnfg
- str r1, [r0, #MDCNFG]
-
- /* Load something to activate bank */
- ldr r2, MEM_START
-.rept 8
- ldr r3, [r2]
-.endr
-
- /* Enable SDRAM */
- orr r1, r1, #0x00000001
- str r1, [r0, #MDCNFG]
-
- ldr r1, BCR
- ldr r2, BCR_DB1110
- str r2, [r1]
-
- ldr r1, LEDS
- mov r0, #0x3
- str r0, [r1]
-
- /* All done... */
- mov pc, lr
diff --git a/board/assabet/u-boot.lds b/board/assabet/u-boot.lds
deleted file mode 100644
index 7a3a9b8fc8..0000000000
--- a/board/assabet/u-boot.lds
+++ /dev/null
@@ -1,58 +0,0 @@
-/*
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- * 2004 (c) MontaVista Software, Inc.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-ENTRY(_start)
-SECTIONS
-{
- . = 0x00000000;
-
- . = ALIGN(4);
- .text :
- {
- cpu/sa1100/start.o (.text)
- *(.text)
- }
-
- . = ALIGN(4);
- .rodata : { *(.rodata) }
-
- . = ALIGN(4);
- .data : { *(.data) }
-
- . = ALIGN(4);
- .got : { *(.got) }
-
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = ALIGN(4);
- __bss_start = .;
- .bss : { *(.bss) }
- _end = .;
-}
diff --git a/board/at91rm9200dk/Makefile b/board/at91rm9200dk/Makefile
deleted file mode 100644
index ec77da9de3..0000000000
--- a/board/at91rm9200dk/Makefile
+++ /dev/null
@@ -1,46 +0,0 @@
-#
-# (C) Copyright 2003
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := at91rm9200dk.o at45.o flash.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS) $(SOBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/at91rm9200dk/at45.c b/board/at91rm9200dk/at45.c
deleted file mode 100644
index 3c00132164..0000000000
--- a/board/at91rm9200dk/at45.c
+++ /dev/null
@@ -1,621 +0,0 @@
-/* Driver for ATMEL DataFlash support
- * Author : Hamid Ikdoumi (Atmel)
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- */
-
-#include <config.h>
-#include <common.h>
-#include <asm/hardware.h>
-
-#ifdef CONFIG_HAS_DATAFLASH
-#include <dataflash.h>
-
-#define AT91C_SPI_CLK 10000000 /* Max Value = 10MHz to be compliant to
-the Continuous Array Read function */
-
-/* AC Characteristics */
-/* DLYBS = tCSS = 250ns min and DLYBCT = tCSH = 250ns */
-#define DATAFLASH_TCSS (0xC << 16)
-#define DATAFLASH_TCHS (0x1 << 24)
-
-#define AT91C_TIMEOUT_WRDY 200000
-#define AT91C_SPI_PCS0_SERIAL_DATAFLASH 0xE /* Chip Select 0 : NPCS0 %1110 */
-#define AT91C_SPI_PCS3_DATAFLASH_CARD 0x7 /* Chip Select 3 : NPCS3 %0111 */
-
-void AT91F_SpiInit(void) {
-
-/*-------------------------------------------------------------------*/
-/* SPI DataFlash Init */
-/*-------------------------------------------------------------------*/
- /* Configure PIOs */
- AT91C_BASE_PIOA->PIO_ASR = AT91C_PA3_NPCS0 | AT91C_PA4_NPCS1 | AT91C_PA1_MOSI | AT91C_PA5_NPCS2 |
- AT91C_PA6_NPCS3 | AT91C_PA0_MISO | AT91C_PA2_SPCK;
- AT91C_BASE_PIOA->PIO_PDR = AT91C_PA3_NPCS0 | AT91C_PA4_NPCS1 | AT91C_PA1_MOSI | AT91C_PA5_NPCS2 |
- AT91C_PA6_NPCS3 | AT91C_PA0_MISO | AT91C_PA2_SPCK;
- /* Enable CLock */
- AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_SPI;
-
- /* Reset the SPI */
- AT91C_BASE_SPI->SPI_CR = AT91C_SPI_SWRST;
-
- /* Configure SPI in Master Mode with No CS selected !!! */
- AT91C_BASE_SPI->SPI_MR = AT91C_SPI_MSTR | AT91C_SPI_MODFDIS | AT91C_SPI_PCS;
-
- /* Configure CS0 and CS3 */
- *(AT91C_SPI_CSR + 0) = AT91C_SPI_CPOL | (AT91C_SPI_DLYBS & DATAFLASH_TCSS) | (AT91C_SPI_DLYBCT &
- DATAFLASH_TCHS) | ((AT91C_MASTER_CLOCK / (2*AT91C_SPI_CLK)) << 8);
-
- *(AT91C_SPI_CSR + 3) = AT91C_SPI_CPOL | (AT91C_SPI_DLYBS & DATAFLASH_TCSS) | (AT91C_SPI_DLYBCT &
- DATAFLASH_TCHS) | ((AT91C_MASTER_CLOCK / (2*AT91C_SPI_CLK)) << 8);
-
-}
-
-void AT91F_SpiEnable(int cs) {
- switch(cs) {
- case 0: /* Configure SPI CS0 for Serial DataFlash AT45DBxx */
- AT91C_BASE_SPI->SPI_MR &= 0xFFF0FFFF;
- AT91C_BASE_SPI->SPI_MR |= ((AT91C_SPI_PCS0_SERIAL_DATAFLASH<<16) & AT91C_SPI_PCS);
- break;
- case 3: /* Configure SPI CS3 for Serial DataFlash Card */
- /* Set up PIO SDC_TYPE to switch on DataFlash Card and not MMC/SDCard */
- AT91C_BASE_PIOB->PIO_PER = AT91C_PIO_PB7; /* Set in PIO mode */
- AT91C_BASE_PIOB->PIO_OER = AT91C_PIO_PB7; /* Configure in output */
- /* Clear Output */
- AT91C_BASE_PIOB->PIO_CODR = AT91C_PIO_PB7;
- /* Configure PCS */
- AT91C_BASE_SPI->SPI_MR &= 0xFFF0FFFF;
- AT91C_BASE_SPI->SPI_MR |= ((AT91C_SPI_PCS3_DATAFLASH_CARD<<16) & AT91C_SPI_PCS);
- break;
- }
-
- /* SPI_Enable */
- AT91C_BASE_SPI->SPI_CR = AT91C_SPI_SPIEN;
-}
-
-/*----------------------------------------------------------------------------*/
-/* \fn AT91F_SpiWrite */
-/* \brief Set the PDC registers for a transfert */
-/*----------------------------------------------------------------------------*/
-unsigned int AT91F_SpiWrite ( AT91PS_DataflashDesc pDesc )
-{
- unsigned int timeout;
-
- pDesc->state = BUSY;
-
- AT91C_BASE_SPI->SPI_PTCR = AT91C_PDC_TXTDIS + AT91C_PDC_RXTDIS;
-
- /* Initialize the Transmit and Receive Pointer */
- AT91C_BASE_SPI->SPI_RPR = (unsigned int)pDesc->rx_cmd_pt ;
- AT91C_BASE_SPI->SPI_TPR = (unsigned int)pDesc->tx_cmd_pt ;
-
- /* Intialize the Transmit and Receive Counters */
- AT91C_BASE_SPI->SPI_RCR = pDesc->rx_cmd_size;
- AT91C_BASE_SPI->SPI_TCR = pDesc->tx_cmd_size;
-
- if ( pDesc->tx_data_size != 0 ) {
- /* Initialize the Next Transmit and Next Receive Pointer */
- AT91C_BASE_SPI->SPI_RNPR = (unsigned int)pDesc->rx_data_pt ;
- AT91C_BASE_SPI->SPI_TNPR = (unsigned int)pDesc->tx_data_pt ;
-
- /* Intialize the Next Transmit and Next Receive Counters */
- AT91C_BASE_SPI->SPI_RNCR = pDesc->rx_data_size ;
- AT91C_BASE_SPI->SPI_TNCR = pDesc->tx_data_size ;
- }
-
- /* arm simple, non interrupt dependent timer */
- reset_timer_masked();
- timeout = 0;
-
- AT91C_BASE_SPI->SPI_PTCR = AT91C_PDC_TXTEN + AT91C_PDC_RXTEN;
- while(!(AT91C_BASE_SPI->SPI_SR & AT91C_SPI_RXBUFF) && ((timeout = get_timer_masked() ) < CFG_SPI_WRITE_TOUT));
- AT91C_BASE_SPI->SPI_PTCR = AT91C_PDC_TXTDIS + AT91C_PDC_RXTDIS;
- pDesc->state = IDLE;
-
- if (timeout >= CFG_SPI_WRITE_TOUT){
- printf("Error Timeout\n\r");
- return DATAFLASH_ERROR;
- }
-
- return DATAFLASH_OK;
-}
-
-
-/*----------------------------------------------------------------------*/
-/* \fn AT91F_DataFlashSendCommand */
-/* \brief Generic function to send a command to the dataflash */
-/*----------------------------------------------------------------------*/
-AT91S_DataFlashStatus AT91F_DataFlashSendCommand(
- AT91PS_DataFlash pDataFlash,
- unsigned char OpCode,
- unsigned int CmdSize,
- unsigned int DataflashAddress)
-{
- unsigned int adr;
-
- if ( (pDataFlash->pDataFlashDesc->state) != IDLE)
- return DATAFLASH_BUSY;
-
- /* process the address to obtain page address and byte address */
- adr = ((DataflashAddress / (pDataFlash->pDevice->pages_size)) << pDataFlash->pDevice->page_offset) + (DataflashAddress % (pDataFlash->pDevice->pages_size));
-
- /* fill the command buffer */
- pDataFlash->pDataFlashDesc->command[0] = OpCode;
- if (pDataFlash->pDevice->pages_number >= 16384) {
- pDataFlash->pDataFlashDesc->command[1] = (unsigned char)((adr & 0x0F000000) >> 24);
- pDataFlash->pDataFlashDesc->command[2] = (unsigned char)((adr & 0x00FF0000) >> 16);
- pDataFlash->pDataFlashDesc->command[3] = (unsigned char)((adr & 0x0000FF00) >> 8);
- pDataFlash->pDataFlashDesc->command[4] = (unsigned char)(adr & 0x000000FF);
- } else {
- pDataFlash->pDataFlashDesc->command[1] = (unsigned char)((adr & 0x00FF0000) >> 16);
- pDataFlash->pDataFlashDesc->command[2] = (unsigned char)((adr & 0x0000FF00) >> 8);
- pDataFlash->pDataFlashDesc->command[3] = (unsigned char)(adr & 0x000000FF) ;
- pDataFlash->pDataFlashDesc->command[4] = 0;
- }
- pDataFlash->pDataFlashDesc->command[5] = 0;
- pDataFlash->pDataFlashDesc->command[6] = 0;
- pDataFlash->pDataFlashDesc->command[7] = 0;
-
- /* Initialize the SpiData structure for the spi write fuction */
- pDataFlash->pDataFlashDesc->tx_cmd_pt = pDataFlash->pDataFlashDesc->command ;
- pDataFlash->pDataFlashDesc->tx_cmd_size = CmdSize ;
- pDataFlash->pDataFlashDesc->rx_cmd_pt = pDataFlash->pDataFlashDesc->command ;
- pDataFlash->pDataFlashDesc->rx_cmd_size = CmdSize ;
-
- /* send the command and read the data */
- return AT91F_SpiWrite (pDataFlash->pDataFlashDesc);
-}
-
-
-/*----------------------------------------------------------------------*/
-/* \fn AT91F_DataFlashGetStatus */
-/* \brief Read the status register of the dataflash */
-/*----------------------------------------------------------------------*/
-AT91S_DataFlashStatus AT91F_DataFlashGetStatus(AT91PS_DataflashDesc pDesc)
-{
- AT91S_DataFlashStatus status;
-
- /* if a transfert is in progress ==> return 0 */
- if( (pDesc->state) != IDLE)
- return DATAFLASH_BUSY;
-
- /* first send the read status command (D7H) */
- pDesc->command[0] = DB_STATUS;
- pDesc->command[1] = 0;
-
- pDesc->DataFlash_state = GET_STATUS;
- pDesc->tx_data_size = 0 ; /* Transmit the command and receive response */
- pDesc->tx_cmd_pt = pDesc->command ;
- pDesc->rx_cmd_pt = pDesc->command ;
- pDesc->rx_cmd_size = 2 ;
- pDesc->tx_cmd_size = 2 ;
- status = AT91F_SpiWrite (pDesc);
-
- pDesc->DataFlash_state = *( (unsigned char *) (pDesc->rx_cmd_pt) +1);
-
- return status;
-}
-
-
-/*----------------------------------------------------------------------*/
-/* \fn AT91F_DataFlashWaitReady */
-/* \brief wait for dataflash ready (bit7 of the status register == 1) */
-/*----------------------------------------------------------------------*/
-AT91S_DataFlashStatus AT91F_DataFlashWaitReady(AT91PS_DataflashDesc pDataFlashDesc, unsigned int timeout)
-{
- pDataFlashDesc->DataFlash_state = IDLE;
-
- do {
- AT91F_DataFlashGetStatus(pDataFlashDesc);
- timeout--;
- } while( ((pDataFlashDesc->DataFlash_state & 0x80) != 0x80) && (timeout > 0) );
-
- if((pDataFlashDesc->DataFlash_state & 0x80) != 0x80)
- return DATAFLASH_ERROR;
-
- return DATAFLASH_OK;
-}
-
-
-/*------------------------------------------------------------------------------*/
-/* Function Name : AT91F_DataFlashContinuousRead */
-/* Object : Continuous stream Read */
-/* Input Parameters : DataFlash Service */
-/* : <src> = dataflash address */
-/* : <*dataBuffer> = data buffer pointer */
-/* : <sizeToRead> = data buffer size */
-/* Return value : State of the dataflash */
-/*------------------------------------------------------------------------------*/
-AT91S_DataFlashStatus AT91F_DataFlashContinuousRead (
- AT91PS_DataFlash pDataFlash,
- int src,
- unsigned char *dataBuffer,
- int sizeToRead )
-{
- AT91S_DataFlashStatus status;
- /* Test the size to read in the device */
- if ( (src + sizeToRead) > (pDataFlash->pDevice->pages_size * (pDataFlash->pDevice->pages_number)))
- return DATAFLASH_MEMORY_OVERFLOW;
-
- pDataFlash->pDataFlashDesc->rx_data_pt = dataBuffer;
- pDataFlash->pDataFlashDesc->rx_data_size = sizeToRead;
- pDataFlash->pDataFlashDesc->tx_data_pt = dataBuffer;
- pDataFlash->pDataFlashDesc->tx_data_size = sizeToRead;
-
- status = AT91F_DataFlashSendCommand (pDataFlash, DB_CONTINUOUS_ARRAY_READ, 8, src);
- /* Send the command to the dataflash */
- return(status);
-}
-
-
-/*------------------------------------------------------------------------------*/
-/* Function Name : AT91F_DataFlashPagePgmBuf */
-/* Object : Main memory page program through buffer 1 or buffer 2 */
-/* Input Parameters : DataFlash Service */
-/* : <*src> = Source buffer */
-/* : <dest> = dataflash destination address */
-/* : <SizeToWrite> = data buffer size */
-/* Return value : State of the dataflash */
-/*------------------------------------------------------------------------------*/
-AT91S_DataFlashStatus AT91F_DataFlashPagePgmBuf(
- AT91PS_DataFlash pDataFlash,
- unsigned char *src,
- unsigned int dest,
- unsigned int SizeToWrite)
-{
- int cmdsize;
- pDataFlash->pDataFlashDesc->tx_data_pt = src ;
- pDataFlash->pDataFlashDesc->tx_data_size = SizeToWrite ;
- pDataFlash->pDataFlashDesc->rx_data_pt = src;
- pDataFlash->pDataFlashDesc->rx_data_size = SizeToWrite;
-
- cmdsize = 4;
- /* Send the command to the dataflash */
- if (pDataFlash->pDevice->pages_number >= 16384)
- cmdsize = 5;
- return(AT91F_DataFlashSendCommand (pDataFlash, DB_PAGE_PGM_BUF1, cmdsize, dest));
-}
-
-
-/*------------------------------------------------------------------------------*/
-/* Function Name : AT91F_MainMemoryToBufferTransfert */
-/* Object : Read a page in the SRAM Buffer 1 or 2 */
-/* Input Parameters : DataFlash Service */
-/* : Page concerned */
-/* : */
-/* Return value : State of the dataflash */
-/*------------------------------------------------------------------------------*/
-AT91S_DataFlashStatus AT91F_MainMemoryToBufferTransfert(
- AT91PS_DataFlash pDataFlash,
- unsigned char BufferCommand,
- unsigned int page)
-{
- int cmdsize;
- /* Test if the buffer command is legal */
- if ((BufferCommand != DB_PAGE_2_BUF1_TRF) && (BufferCommand != DB_PAGE_2_BUF2_TRF))
- return DATAFLASH_BAD_COMMAND;
-
- /* no data to transmit or receive */
- pDataFlash->pDataFlashDesc->tx_data_size = 0;
- cmdsize = 4;
- if (pDataFlash->pDevice->pages_number >= 16384)
- cmdsize = 5;
- return(AT91F_DataFlashSendCommand (pDataFlash, BufferCommand, cmdsize, page*pDataFlash->pDevice->pages_size));
-}
-
-
-/*----------------------------------------------------------------------------- */
-/* Function Name : AT91F_DataFlashWriteBuffer */
-/* Object : Write data to the internal sram buffer 1 or 2 */
-/* Input Parameters : DataFlash Service */
-/* : <BufferCommand> = command to write buffer1 or buffer2 */
-/* : <*dataBuffer> = data buffer to write */
-/* : <bufferAddress> = address in the internal buffer */
-/* : <SizeToWrite> = data buffer size */
-/* Return value : State of the dataflash */
-/*------------------------------------------------------------------------------*/
-AT91S_DataFlashStatus AT91F_DataFlashWriteBuffer (
- AT91PS_DataFlash pDataFlash,
- unsigned char BufferCommand,
- unsigned char *dataBuffer,
- unsigned int bufferAddress,
- int SizeToWrite )
-{
- int cmdsize;
- /* Test if the buffer command is legal */
- if ((BufferCommand != DB_BUF1_WRITE) && (BufferCommand != DB_BUF2_WRITE))
- return DATAFLASH_BAD_COMMAND;
-
- /* buffer address must be lower than page size */
- if (bufferAddress > pDataFlash->pDevice->pages_size)
- return DATAFLASH_BAD_ADDRESS;
-
- if ( (pDataFlash->pDataFlashDesc->state) != IDLE)
- return DATAFLASH_BUSY;
-
- /* Send first Write Command */
- pDataFlash->pDataFlashDesc->command[0] = BufferCommand;
- pDataFlash->pDataFlashDesc->command[1] = 0;
- if (pDataFlash->pDevice->pages_number >= 16384) {
- pDataFlash->pDataFlashDesc->command[2] = 0;
- pDataFlash->pDataFlashDesc->command[3] = (unsigned char)(((unsigned int)(bufferAddress & pDataFlash->pDevice->byte_mask)) >> 8) ;
- pDataFlash->pDataFlashDesc->command[4] = (unsigned char)((unsigned int)bufferAddress & 0x00FF) ;
- cmdsize = 5;
- } else {
- pDataFlash->pDataFlashDesc->command[2] = (unsigned char)(((unsigned int)(bufferAddress & pDataFlash->pDevice->byte_mask)) >> 8) ;
- pDataFlash->pDataFlashDesc->command[3] = (unsigned char)((unsigned int)bufferAddress & 0x00FF) ;
- pDataFlash->pDataFlashDesc->command[4] = 0;
- cmdsize = 4;
- }
-
- pDataFlash->pDataFlashDesc->tx_cmd_pt = pDataFlash->pDataFlashDesc->command ;
- pDataFlash->pDataFlashDesc->tx_cmd_size = cmdsize ;
- pDataFlash->pDataFlashDesc->rx_cmd_pt = pDataFlash->pDataFlashDesc->command ;
- pDataFlash->pDataFlashDesc->rx_cmd_size = cmdsize ;
-
- pDataFlash->pDataFlashDesc->rx_data_pt = dataBuffer ;
- pDataFlash->pDataFlashDesc->tx_data_pt = dataBuffer ;
- pDataFlash->pDataFlashDesc->rx_data_size = SizeToWrite ;
- pDataFlash->pDataFlashDesc->tx_data_size = SizeToWrite ;
-
- return AT91F_SpiWrite(pDataFlash->pDataFlashDesc);
-}
-
-/*------------------------------------------------------------------------------*/
-/* Function Name : AT91F_PageErase */
-/* Object : Erase a page */
-/* Input Parameters : DataFlash Service */
-/* : Page concerned */
-/* : */
-/* Return value : State of the dataflash */
-/*------------------------------------------------------------------------------*/
-AT91S_DataFlashStatus AT91F_PageErase(
- AT91PS_DataFlash pDataFlash,
- unsigned int page)
-{
- int cmdsize;
- /* Test if the buffer command is legal */
- /* no data to transmit or receive */
- pDataFlash->pDataFlashDesc->tx_data_size = 0;
-
- cmdsize = 4;
- if (pDataFlash->pDevice->pages_number >= 16384)
- cmdsize = 5;
- return(AT91F_DataFlashSendCommand (pDataFlash, DB_PAGE_ERASE, cmdsize, page*pDataFlash->pDevice->pages_size));
-}
-
-
-/*------------------------------------------------------------------------------*/
-/* Function Name : AT91F_BlockErase */
-/* Object : Erase a Block */
-/* Input Parameters : DataFlash Service */
-/* : Page concerned */
-/* : */
-/* Return value : State of the dataflash */
-/*------------------------------------------------------------------------------*/
-AT91S_DataFlashStatus AT91F_BlockErase(
- AT91PS_DataFlash pDataFlash,
- unsigned int block)
-{
- int cmdsize;
- /* Test if the buffer command is legal */
- /* no data to transmit or receive */
- pDataFlash->pDataFlashDesc->tx_data_size = 0;
- cmdsize = 4;
- if (pDataFlash->pDevice->pages_number >= 16384)
- cmdsize = 5;
- return(AT91F_DataFlashSendCommand (pDataFlash, DB_BLOCK_ERASE,cmdsize, block*8*pDataFlash->pDevice->pages_size));
-}
-
-/*------------------------------------------------------------------------------*/
-/* Function Name : AT91F_WriteBufferToMain */
-/* Object : Write buffer to the main memory */
-/* Input Parameters : DataFlash Service */
-/* : <BufferCommand> = command to send to buffer1 or buffer2 */
-/* : <dest> = main memory address */
-/* Return value : State of the dataflash */
-/*------------------------------------------------------------------------------*/
-AT91S_DataFlashStatus AT91F_WriteBufferToMain (
- AT91PS_DataFlash pDataFlash,
- unsigned char BufferCommand,
- unsigned int dest )
-{
- int cmdsize;
- /* Test if the buffer command is correct */
- if ((BufferCommand != DB_BUF1_PAGE_PGM) &&
- (BufferCommand != DB_BUF1_PAGE_ERASE_PGM) &&
- (BufferCommand != DB_BUF2_PAGE_PGM) &&
- (BufferCommand != DB_BUF2_PAGE_ERASE_PGM) )
- return DATAFLASH_BAD_COMMAND;
-
- /* no data to transmit or receive */
- pDataFlash->pDataFlashDesc->tx_data_size = 0;
-
- cmdsize = 4;
- if (pDataFlash->pDevice->pages_number >= 16384)
- cmdsize = 5;
- /* Send the command to the dataflash */
- return(AT91F_DataFlashSendCommand (pDataFlash, BufferCommand, cmdsize, dest));
-}
-
-
-/*------------------------------------------------------------------------------*/
-/* Function Name : AT91F_PartialPageWrite */
-/* Object : Erase partielly a page */
-/* Input Parameters : <page> = page number */
-/* : <AdrInpage> = adr to begin the fading */
-/* : <length> = Number of bytes to erase */
-/*------------------------------------------------------------------------------*/
-AT91S_DataFlashStatus AT91F_PartialPageWrite (
- AT91PS_DataFlash pDataFlash,
- unsigned char *src,
- unsigned int dest,
- unsigned int size)
-{
- unsigned int page;
- unsigned int AdrInPage;
-
- page = dest / (pDataFlash->pDevice->pages_size);
- AdrInPage = dest % (pDataFlash->pDevice->pages_size);
-
- /* Read the contents of the page in the Sram Buffer */
- AT91F_MainMemoryToBufferTransfert(pDataFlash, DB_PAGE_2_BUF1_TRF, page);
- AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_TIMEOUT_WRDY);
- /*Update the SRAM buffer */
- AT91F_DataFlashWriteBuffer(pDataFlash, DB_BUF1_WRITE, src, AdrInPage, size);
-
- AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_TIMEOUT_WRDY);
-
- /* Erase page if a 128 Mbits device */
- if (pDataFlash->pDevice->pages_number >= 16384) {
- AT91F_PageErase(pDataFlash, page);
- /* Rewrite the modified Sram Buffer in the main memory */
- AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_TIMEOUT_WRDY);
- }
-
- /* Rewrite the modified Sram Buffer in the main memory */
- return(AT91F_WriteBufferToMain(pDataFlash, DB_BUF1_PAGE_ERASE_PGM, (page*pDataFlash->pDevice->pages_size)));
-}
-
-
-/*------------------------------------------------------------------------------*/
-/* Function Name : AT91F_DataFlashWrite */
-/* Object : */
-/* Input Parameters : <*src> = Source buffer */
-/* : <dest> = dataflash adress */
-/* : <size> = data buffer size */
-/*------------------------------------------------------------------------------*/
-AT91S_DataFlashStatus AT91F_DataFlashWrite(
- AT91PS_DataFlash pDataFlash,
- unsigned char *src,
- int dest,
- int size )
-{
- unsigned int length;
- unsigned int page;
- unsigned int status;
-
- AT91F_SpiEnable(pDataFlash->pDevice->cs);
-
- if ( (dest + size) > (pDataFlash->pDevice->pages_size * (pDataFlash->pDevice->pages_number)))
- return DATAFLASH_MEMORY_OVERFLOW;
-
- /* If destination does not fit a page start address */
- if ((dest % ((unsigned int)(pDataFlash->pDevice->pages_size))) != 0 ) {
- length = pDataFlash->pDevice->pages_size - (dest % ((unsigned int)(pDataFlash->pDevice->pages_size)));
-
- if (size < length)
- length = size;
-
- if(!AT91F_PartialPageWrite(pDataFlash,src, dest, length))
- return DATAFLASH_ERROR;
-
- AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_TIMEOUT_WRDY);
-
- /* Update size, source and destination pointers */
- size -= length;
- dest += length;
- src += length;
- }
-
- while (( size - pDataFlash->pDevice->pages_size ) >= 0 ) {
- /* program dataflash page */
- page = (unsigned int)dest / (pDataFlash->pDevice->pages_size);
-
- status = AT91F_DataFlashWriteBuffer(pDataFlash, DB_BUF1_WRITE, src, 0, pDataFlash->pDevice->pages_size);
- AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_TIMEOUT_WRDY);
-
- status = AT91F_PageErase(pDataFlash, page);
- AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_TIMEOUT_WRDY);
- if (!status)
- return DATAFLASH_ERROR;
-
- status = AT91F_WriteBufferToMain (pDataFlash, DB_BUF1_PAGE_PGM, dest);
- if(!status)
- return DATAFLASH_ERROR;
-
- AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_TIMEOUT_WRDY);
-
- /* Update size, source and destination pointers */
- size -= pDataFlash->pDevice->pages_size ;
- dest += pDataFlash->pDevice->pages_size ;
- src += pDataFlash->pDevice->pages_size ;
- }
-
- /* If still some bytes to read */
- if ( size > 0 ) {
- /* program dataflash page */
- if(!AT91F_PartialPageWrite(pDataFlash, src, dest, size) )
- return DATAFLASH_ERROR;
-
- AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_TIMEOUT_WRDY);
- }
- return DATAFLASH_OK;
-}
-
-
-/*------------------------------------------------------------------------------*/
-/* Function Name : AT91F_DataFlashRead */
-/* Object : Read a block in dataflash */
-/* Input Parameters : */
-/* Return value : */
-/*------------------------------------------------------------------------------*/
-int AT91F_DataFlashRead(
- AT91PS_DataFlash pDataFlash,
- unsigned long addr,
- unsigned long size,
- char *buffer)
-{
- unsigned long SizeToRead;
-
- AT91F_SpiEnable(pDataFlash->pDevice->cs);
-
- if(AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_TIMEOUT_WRDY) != DATAFLASH_OK)
- return -1;
-
- while (size) {
- SizeToRead = (size < 0x8000)? size:0x8000;
-
- if (AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_TIMEOUT_WRDY) != DATAFLASH_OK)
- return -1;
-
- if (AT91F_DataFlashContinuousRead (pDataFlash, addr, buffer, SizeToRead) != DATAFLASH_OK)
- return -1;
-
- size -= SizeToRead;
- addr += SizeToRead;
- buffer += SizeToRead;
- }
-
- return DATAFLASH_OK;
-}
-
-
-/*------------------------------------------------------------------------------*/
-/* Function Name : AT91F_DataflashProbe */
-/* Object : */
-/* Input Parameters : */
-/* Return value : Dataflash status register */
-/*------------------------------------------------------------------------------*/
-int AT91F_DataflashProbe(int cs, AT91PS_DataflashDesc pDesc)
-{
- AT91F_SpiEnable(cs);
- AT91F_DataFlashGetStatus(pDesc);
- return((pDesc->command[1] == 0xFF)? 0: pDesc->command[1] & 0x3C);
-}
-
-#endif
diff --git a/board/at91rm9200dk/at91rm9200dk.c b/board/at91rm9200dk/at91rm9200dk.c
deleted file mode 100644
index 77caed36dd..0000000000
--- a/board/at91rm9200dk/at91rm9200dk.c
+++ /dev/null
@@ -1,144 +0,0 @@
-/*
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/arch/AT91RM9200.h>
-#include <at91rm9200_net.h>
-#include <dm9161.h>
-
-/* ------------------------------------------------------------------------- */
-/*
- * Miscelaneous platform dependent initialisations
- */
-
-int board_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- /* Enable Ctrlc */
- console_init_f ();
-
- /* Correct IRDA resistor problem */
- /* Set PA23_TXD in Output */
- (AT91PS_PIO) AT91C_BASE_PIOA->PIO_OER = AT91C_PA23_TXD2;
-
- /* memory and cpu-speed are setup before relocation */
- /* so we do _nothing_ here */
-
- /* arch number of AT91RM9200DK-Board */
- gd->bd->bi_arch_number = MACH_TYPE_AT91RM9200;
- /* adress of boot parameters */
- gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
-
- return 0;
-}
-
-int dram_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- gd->bd->bi_dram[0].start = PHYS_SDRAM;
- gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
- return 0;
-}
-
-#ifdef CONFIG_DRIVER_ETHER
-#if (CONFIG_COMMANDS & CFG_CMD_NET)
-
-/*
- * Name:
- * at91rm9200_GetPhyInterface
- * Description:
- * Initialise the interface functions to the PHY
- * Arguments:
- * None
- * Return value:
- * None
- */
-void at91rm9200_GetPhyInterface(AT91PS_PhyOps p_phyops)
-{
- p_phyops->Init = dm9161_InitPhy;
- p_phyops->IsPhyConnected = dm9161_IsPhyConnected;
- p_phyops->GetLinkSpeed = dm9161_GetLinkSpeed;
- p_phyops->AutoNegotiate = dm9161_AutoNegotiate;
-}
-
-#endif /* CONFIG_COMMANDS & CFG_CMD_NET */
-#endif /* CONFIG_DRIVER_ETHER */
-
-/*
- * Disk On Chip (NAND) Millenium initialization.
- * The NAND lives in the CS2* space
- */
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
-extern ulong nand_probe (ulong physadr);
-
-#define AT91_SMARTMEDIA_BASE 0x40000000 /* physical address to access memory on NCS3 */
-void nand_init (void)
-{
- /* Setup Smart Media, fitst enable the address range of CS3 */
- *AT91C_EBI_CSA |= AT91C_EBI_CS3A_SMC_SmartMedia;
- /* set the bus interface characteristics based on
- tDS Data Set up Time 30 - ns
- tDH Data Hold Time 20 - ns
- tALS ALE Set up Time 20 - ns
- 16ns at 60 MHz ~= 3 */
-/*memory mapping structures */
-#define SM_ID_RWH (5 << 28)
-#define SM_RWH (1 << 28)
-#define SM_RWS (0 << 24)
-#define SM_TDF (1 << 8)
-#define SM_NWS (3)
- AT91C_BASE_SMC2->SMC2_CSR[3] = (SM_RWH | SM_RWS |
- AT91C_SMC2_ACSS_STANDARD | AT91C_SMC2_DBW_8 |
- SM_TDF | AT91C_SMC2_WSEN | SM_NWS);
-
- /* enable the SMOE line PC0=SMCE, A21=CLE, A22=ALE */
- *AT91C_PIOC_ASR = AT91C_PC0_BFCK | AT91C_PC1_BFRDY_SMOE |
- AT91C_PC3_BFBAA_SMWE;
- *AT91C_PIOC_PDR = AT91C_PC0_BFCK | AT91C_PC1_BFRDY_SMOE |
- AT91C_PC3_BFBAA_SMWE;
-
- /* Configure PC2 as input (signal READY of the SmartMedia) */
- *AT91C_PIOC_PER = AT91C_PC2_BFAVD; /* enable direct output enable */
- *AT91C_PIOC_ODR = AT91C_PC2_BFAVD; /* disable output */
-
- /* Configure PB1 as input (signal Card Detect of the SmartMedia) */
- *AT91C_PIOB_PER = AT91C_PIO_PB1; /* enable direct output enable */
- *AT91C_PIOB_ODR = AT91C_PIO_PB1; /* disable output */
-
- /* PIOB and PIOC clock enabling */
- *AT91C_PMC_PCER = 1 << AT91C_ID_PIOB;
- *AT91C_PMC_PCER = 1 << AT91C_ID_PIOC;
-
- if (*AT91C_PIOB_PDSR & AT91C_PIO_PB1)
- printf (" No SmartMedia card inserted\n");
-#ifdef DEBUG
- printf (" SmartMedia card inserted\n");
-
- printf ("Probing at 0x%.8x\n", AT91_SMARTMEDIA_BASE);
-#endif
- printf ("%4lu MB\n", nand_probe(AT91_SMARTMEDIA_BASE) >> 20);
-}
-#endif
diff --git a/board/at91rm9200dk/config.mk b/board/at91rm9200dk/config.mk
deleted file mode 100644
index 9ce161e55f..0000000000
--- a/board/at91rm9200dk/config.mk
+++ /dev/null
@@ -1 +0,0 @@
-TEXT_BASE = 0x21f00000
diff --git a/board/at91rm9200dk/flash.c b/board/at91rm9200dk/flash.c
deleted file mode 100644
index f6228ef03e..0000000000
--- a/board/at91rm9200dk/flash.c
+++ /dev/null
@@ -1,504 +0,0 @@
-/*
- * (C) Copyright 2002
- * Lineo, Inc. <www.lineo.com>
- * Bernhard Kuhn <bkuhn@lineo.com>
- *
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Alex Zuepke <azu@sysgo.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-
-ulong myflush(void);
-
-
-/* Flash Organization Structure */
-typedef struct OrgDef
-{
- unsigned int sector_number;
- unsigned int sector_size;
-} OrgDef;
-
-
-/* Flash Organizations */
-OrgDef OrgAT49BV16x4[] =
-{
- { 8, 8*1024 }, /* 8 * 8 kBytes sectors */
- { 2, 32*1024 }, /* 2 * 32 kBytes sectors */
- { 30, 64*1024 }, /* 30 * 64 kBytes sectors */
-};
-
-OrgDef OrgAT49BV16x4A[] =
-{
- { 8, 8*1024 }, /* 8 * 8 kBytes sectors */
- { 31, 64*1024 }, /* 31 * 64 kBytes sectors */
-};
-
-OrgDef OrgAT49BV6416[] =
-{
- { 8, 8*1024 }, /* 8 * 8 kBytes sectors */
- { 127, 64*1024 }, /* 127 * 64 kBytes sectors */
-};
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
-
-/* AT49BV1614A Codes */
-#define FLASH_CODE1 0xAA
-#define FLASH_CODE2 0x55
-#define ID_IN_CODE 0x90
-#define ID_OUT_CODE 0xF0
-
-
-#define CMD_READ_ARRAY 0x00F0
-#define CMD_UNLOCK1 0x00AA
-#define CMD_UNLOCK2 0x0055
-#define CMD_ERASE_SETUP 0x0080
-#define CMD_ERASE_CONFIRM 0x0030
-#define CMD_PROGRAM 0x00A0
-#define CMD_UNLOCK_BYPASS 0x0020
-#define CMD_SECTOR_UNLOCK 0x0070
-
-#define MEM_FLASH_ADDR1 (*(volatile u16 *)(CFG_FLASH_BASE + (0x00005555<<1)))
-#define MEM_FLASH_ADDR2 (*(volatile u16 *)(CFG_FLASH_BASE + (0x00002AAA<<1)))
-
-#define BIT_ERASE_DONE 0x0080
-#define BIT_RDY_MASK 0x0080
-#define BIT_PROGRAM_ERROR 0x0020
-#define BIT_TIMEOUT 0x80000000 /* our flag */
-
-#define READY 1
-#define ERR 2
-#define TMO 4
-
-/*-----------------------------------------------------------------------
- */
-void flash_identification (flash_info_t * info)
-{
- volatile u16 manuf_code, device_code, add_device_code;
-
- MEM_FLASH_ADDR1 = FLASH_CODE1;
- MEM_FLASH_ADDR2 = FLASH_CODE2;
- MEM_FLASH_ADDR1 = ID_IN_CODE;
-
- manuf_code = *(volatile u16 *) CFG_FLASH_BASE;
- device_code = *(volatile u16 *) (CFG_FLASH_BASE + 2);
- add_device_code = *(volatile u16 *) (CFG_FLASH_BASE + (3 << 1));
-
- MEM_FLASH_ADDR1 = FLASH_CODE1;
- MEM_FLASH_ADDR2 = FLASH_CODE2;
- MEM_FLASH_ADDR1 = ID_OUT_CODE;
-
- /* Vendor type */
- info->flash_id = ATM_MANUFACT & FLASH_VENDMASK;
- printf ("Atmel: ");
-
- if ((device_code & FLASH_TYPEMASK) == (ATM_ID_BV1614 & FLASH_TYPEMASK)) {
-
- if ((add_device_code & FLASH_TYPEMASK) ==
- (ATM_ID_BV1614A & FLASH_TYPEMASK)) {
- info->flash_id |= ATM_ID_BV1614A & FLASH_TYPEMASK;
- printf ("AT49BV1614A (16Mbit)\n");
- } else { /* AT49BV1614 Flash */
- info->flash_id |= ATM_ID_BV1614 & FLASH_TYPEMASK;
- printf ("AT49BV1614 (16Mbit)\n");
- }
-
- } else if ((device_code & FLASH_TYPEMASK) == (ATM_ID_BV6416 & FLASH_TYPEMASK)) {
- info->flash_id |= ATM_ID_BV6416 & FLASH_TYPEMASK;
- printf ("AT49BV6416 (64Mbit)\n");
- }
-}
-
-ushort flash_number_sector(OrgDef *pOrgDef, unsigned int nb_blocks)
-{
- int i, nb_sectors = 0;
-
- for (i=0; i<nb_blocks; i++){
- nb_sectors += pOrgDef[i].sector_number;
- }
-
- return nb_sectors;
-}
-
-void flash_unlock_sector(flash_info_t * info, unsigned int sector)
-{
- volatile u16 *addr = (volatile u16 *) (info->start[sector]);
-
- MEM_FLASH_ADDR1 = CMD_UNLOCK1;
- *addr = CMD_SECTOR_UNLOCK;
-}
-
-
-ulong flash_init (void)
-{
- int i, j, k;
- unsigned int flash_nb_blocks, sector;
- unsigned int start_address;
- OrgDef *pOrgDef;
-
- ulong size = 0;
-
- for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
- ulong flashbase = 0;
-
- flash_identification (&flash_info[i]);
-
- if ((flash_info[i].flash_id & FLASH_TYPEMASK) ==
- (ATM_ID_BV1614 & FLASH_TYPEMASK)) {
-
- pOrgDef = OrgAT49BV16x4;
- flash_nb_blocks = sizeof (OrgAT49BV16x4) / sizeof (OrgDef);
- } else if ((flash_info[i].flash_id & FLASH_TYPEMASK) ==
- (ATM_ID_BV1614A & FLASH_TYPEMASK)){ /* AT49BV1614A Flash */
-
- pOrgDef = OrgAT49BV16x4A;
- flash_nb_blocks = sizeof (OrgAT49BV16x4A) / sizeof (OrgDef);
- } else if ((flash_info[i].flash_id & FLASH_TYPEMASK) ==
- (ATM_ID_BV6416 & FLASH_TYPEMASK)){ /* AT49BV6416 Flash */
-
- pOrgDef = OrgAT49BV6416;
- flash_nb_blocks = sizeof (OrgAT49BV6416) / sizeof (OrgDef);
- } else {
- flash_nb_blocks = 0;
- pOrgDef = OrgAT49BV16x4;
- }
-
- flash_info[i].sector_count = flash_number_sector(pOrgDef, flash_nb_blocks);
- memset (flash_info[i].protect, 0, flash_info[i].sector_count);
-
- if (i == 0)
- flashbase = PHYS_FLASH_1;
- else
- panic ("configured too many flash banks!\n");
-
- sector = 0;
- start_address = flashbase;
- flash_info[i].size = 0;
-
- for (j = 0; j < flash_nb_blocks; j++) {
- for (k = 0; k < pOrgDef[j].sector_number; k++) {
- flash_info[i].start[sector++] = start_address;
- start_address += pOrgDef[j].sector_size;
- flash_info[i].size += pOrgDef[j].sector_size;
- }
- }
-
- size += flash_info[i].size;
-
- if ((flash_info[i].flash_id & FLASH_TYPEMASK) ==
- (ATM_ID_BV6416 & FLASH_TYPEMASK)){ /* AT49BV6416 Flash */
-
- /* Unlock all sectors at reset */
- for (j=0; j<flash_info[i].sector_count; j++){
- flash_unlock_sector(&flash_info[i], j);
- }
- }
- }
-
- /* Protect binary boot image */
- flash_protect (FLAG_PROTECT_SET,
- CFG_FLASH_BASE,
- CFG_FLASH_BASE + CFG_BOOT_SIZE - 1, &flash_info[0]);
-
- /* Protect environment variables */
- flash_protect (FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0]);
-
- /* Protect U-Boot gzipped image */
- flash_protect (FLAG_PROTECT_SET,
- CFG_U_BOOT_BASE,
- CFG_U_BOOT_BASE + CFG_U_BOOT_SIZE - 1, &flash_info[0]);
-
- return size;
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t * info)
-{
- int i;
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case (ATM_MANUFACT & FLASH_VENDMASK):
- printf ("Atmel: ");
- break;
- default:
- printf ("Unknown Vendor ");
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case (ATM_ID_BV1614 & FLASH_TYPEMASK):
- printf ("AT49BV1614 (16Mbit)\n");
- break;
- case (ATM_ID_BV1614A & FLASH_TYPEMASK):
- printf ("AT49BV1614A (16Mbit)\n");
- break;
- case (ATM_ID_BV6416 & FLASH_TYPEMASK):
- printf ("AT49BV6416 (64Mbit)\n");
- break;
- default:
- printf ("Unknown Chip Type\n");
- return;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; i++) {
- if ((i % 5) == 0) {
- printf ("\n ");
- }
- printf (" %08lX%s", info->start[i],
- info->protect[i] ? " (RO)" : " ");
- }
- printf ("\n");
-}
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t * info, int s_first, int s_last)
-{
- ulong result;
- int iflag, cflag, prot, sect;
- int rc = ERR_OK;
- int chip1;
-
- /* first look for protection bits */
-
- if (info->flash_id == FLASH_UNKNOWN)
- return ERR_UNKNOWN_FLASH_TYPE;
-
- if ((s_first < 0) || (s_first > s_last)) {
- return ERR_INVAL;
- }
-
- if ((info->flash_id & FLASH_VENDMASK) !=
- (ATM_MANUFACT & FLASH_VENDMASK)) {
- return ERR_UNKNOWN_FLASH_VENDOR;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
- if (prot)
- return ERR_PROTECTED;
-
- /*
- * Disable interrupts which might cause a timeout
- * here. Remember that our exception vectors are
- * at address 0 in the flash, and we don't want a
- * (ticker) exception to happen while the flash
- * chip is in programming mode.
- */
- cflag = icache_status ();
- icache_disable ();
- iflag = disable_interrupts ();
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect <= s_last && !ctrlc (); sect++) {
- printf ("Erasing sector %2d ... ", sect);
-
- /* arm simple, non interrupt dependent timer */
- reset_timer_masked ();
-
- if (info->protect[sect] == 0) { /* not protected */
- volatile u16 *addr = (volatile u16 *) (info->start[sect]);
-
- MEM_FLASH_ADDR1 = CMD_UNLOCK1;
- MEM_FLASH_ADDR2 = CMD_UNLOCK2;
- MEM_FLASH_ADDR1 = CMD_ERASE_SETUP;
-
- MEM_FLASH_ADDR1 = CMD_UNLOCK1;
- MEM_FLASH_ADDR2 = CMD_UNLOCK2;
- *addr = CMD_ERASE_CONFIRM;
-
- /* wait until flash is ready */
- chip1 = 0;
-
- do {
- result = *addr;
-
- /* check timeout */
- if (get_timer_masked () > CFG_FLASH_ERASE_TOUT) {
- MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
- chip1 = TMO;
- break;
- }
-
- if (!chip1 && (result & 0xFFFF) & BIT_ERASE_DONE)
- chip1 = READY;
-
- } while (!chip1);
-
- MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
-
- if (chip1 == ERR) {
- rc = ERR_PROG_ERROR;
- goto outahere;
- }
- if (chip1 == TMO) {
- rc = ERR_TIMOUT;
- goto outahere;
- }
-
- printf ("ok.\n");
- } else { /* it was protected */
- printf ("protected!\n");
- }
- }
-
- if (ctrlc ())
- printf ("User Interrupt!\n");
-
-outahere:
- /* allow flash to settle - wait 10 ms */
- udelay_masked (10000);
-
- if (iflag)
- enable_interrupts ();
-
- if (cflag)
- icache_enable ();
-
- return rc;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash
- */
-
-volatile static int write_word (flash_info_t * info, ulong dest,
- ulong data)
-{
- volatile u16 *addr = (volatile u16 *) dest;
- ulong result;
- int rc = ERR_OK;
- int cflag, iflag;
- int chip1;
-
- /*
- * Check if Flash is (sufficiently) erased
- */
- result = *addr;
- if ((result & data) != data)
- return ERR_NOT_ERASED;
-
-
- /*
- * Disable interrupts which might cause a timeout
- * here. Remember that our exception vectors are
- * at address 0 in the flash, and we don't want a
- * (ticker) exception to happen while the flash
- * chip is in programming mode.
- */
- cflag = icache_status ();
- icache_disable ();
- iflag = disable_interrupts ();
-
- MEM_FLASH_ADDR1 = CMD_UNLOCK1;
- MEM_FLASH_ADDR2 = CMD_UNLOCK2;
- MEM_FLASH_ADDR1 = CMD_PROGRAM;
- *addr = data;
-
- /* arm simple, non interrupt dependent timer */
- reset_timer_masked ();
-
- /* wait until flash is ready */
- chip1 = 0;
- do {
- result = *addr;
-
- /* check timeout */
- if (get_timer_masked () > CFG_FLASH_ERASE_TOUT) {
- chip1 = ERR | TMO;
- break;
- }
- if (!chip1 && ((result & 0x80) == (data & 0x80)))
- chip1 = READY;
-
- } while (!chip1);
-
- *addr = CMD_READ_ARRAY;
-
- if (chip1 == ERR || *addr != data)
- rc = ERR_PROG_ERROR;
-
- if (iflag)
- enable_interrupts ();
-
- if (cflag)
- icache_enable ();
-
- return rc;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash.
- */
-
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- ulong wp, data;
- int rc;
-
- if (addr & 1) {
- printf ("unaligned destination not supported\n");
- return ERR_ALIGN;
- };
-
- if ((int) src & 1) {
- printf ("unaligned source not supported\n");
- return ERR_ALIGN;
- };
-
- wp = addr;
-
- while (cnt >= 2) {
- data = *((volatile u16 *) src);
- if ((rc = write_word (info, wp, data)) != 0) {
- return (rc);
- }
- src += 2;
- wp += 2;
- cnt -= 2;
- }
-
- if (cnt == 1) {
- data = (*((volatile u8 *) src)) | (*((volatile u8 *) (wp + 1)) <<
- 8);
- if ((rc = write_word (info, wp, data)) != 0) {
- return (rc);
- }
- src += 1;
- wp += 1;
- cnt -= 1;
- };
-
- return ERR_OK;
-}
diff --git a/board/at91rm9200dk/u-boot.lds b/board/at91rm9200dk/u-boot.lds
deleted file mode 100644
index f4fbf969c3..0000000000
--- a/board/at91rm9200dk/u-boot.lds
+++ /dev/null
@@ -1,57 +0,0 @@
-/*
- * (C) Copyright 2002
- * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-/*OUTPUT_FORMAT("elf32-arm", "elf32-arm", "elf32-arm")*/
-OUTPUT_ARCH(arm)
-ENTRY(_start)
-SECTIONS
-{
- . = 0x00000000;
-
- . = ALIGN(4);
- .text :
- {
- cpu/arm920t/start.o (.text)
- *(.text)
- }
-
- . = ALIGN(4);
- .rodata : { *(.rodata) }
-
- . = ALIGN(4);
- .data : { *(.data) }
-
- . = ALIGN(4);
- .got : { *(.got) }
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = ALIGN(4);
- __bss_start = .;
- .bss : { *(.bss) }
- _end = .;
-}
diff --git a/board/atc/Makefile b/board/atc/Makefile
deleted file mode 100644
index 7a2014d466..0000000000
--- a/board/atc/Makefile
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/atc/atc.c b/board/atc/atc.c
deleted file mode 100644
index d2c6b3bfcd..0000000000
--- a/board/atc/atc.c
+++ /dev/null
@@ -1,399 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <ioports.h>
-#include <mpc8260.h>
-#include <pci.h>
-
-/*
- * I/O Port configuration table
- *
- * if conf is 1, then that port pin will be configured at boot time
- * according to the five values podr/pdir/ppar/psor/pdat for that entry
- */
-
-const iop_conf_t iop_conf_tab[4][32] = {
-
- /* Port A configuration */
- { /* conf ppar psor pdir podr pdat */
- /* PA31 */ { 1, 1, 1, 0, 0, 0 }, /* FCC1 MII COL */
- /* PA30 */ { 1, 1, 1, 0, 0, 0 }, /* FCC1 MII CRS */
- /* PA29 */ { 1, 1, 1, 1, 0, 0 }, /* FCC1 MII TX_ER */
- /* PA28 */ { 1, 1, 1, 1, 0, 0 }, /* FCC1 MII TX_EN */
- /* PA27 */ { 1, 1, 1, 0, 0, 0 }, /* FCC1 MII RX_DV */
- /* PA26 */ { 1, 1, 1, 0, 0, 0 }, /* FCC1 MII RX_ER */
- /* PA25 */ { 1, 0, 0, 1, 0, 0 }, /* FCC2 MII MDIO */
- /* PA24 */ { 1, 0, 0, 1, 0, 0 }, /* FCC2 MII MDC */
- /* PA23 */ { 1, 0, 0, 1, 0, 0 }, /* FCC1 MII MDIO */
- /* PA22 */ { 1, 0, 0, 1, 0, 0 }, /* FCC1 MII MDC */
- /* PA21 */ { 1, 1, 0, 1, 0, 0 }, /* FCC1 MII TxD[3] */
- /* PA20 */ { 1, 1, 0, 1, 0, 0 }, /* FCC1 MII TxD[2] */
- /* PA19 */ { 1, 1, 0, 1, 0, 0 }, /* FCC1 MII TxD[1] */
- /* PA18 */ { 1, 1, 0, 1, 0, 0 }, /* FCC1 MII TxD[0] */
- /* PA17 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 MII RxD[0] */
- /* PA16 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 MII RxD[1] */
- /* PA15 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 MII RxD[2] */
- /* PA14 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 MII RxD[3] */
- /* PA13 */ { 1, 0, 0, 1, 0, 0 }, /* FCC2 MII TXSL1 */
- /* PA12 */ { 1, 0, 0, 1, 0, 1 }, /* FCC2 MII TXSL0 */
- /* PA11 */ { 1, 0, 0, 1, 0, 0 }, /* FCC1 MII TXSL1 */
- /* PA10 */ { 1, 0, 0, 1, 0, 1 }, /* FCC1 MII TXSL0 */
-#if 1
- /* PA9 */ { 0, 1, 0, 1, 0, 0 }, /* SMC2 TXD */
- /* PA8 */ { 0, 1, 0, 0, 0, 0 }, /* SMC2 RXD */
-#else
- /* PA9 */ { 1, 1, 0, 1, 0, 0 }, /* SMC2 TXD */
- /* PA8 */ { 1, 1, 0, 0, 0, 0 }, /* SMC2 RXD */
-#endif
- /* PA7 */ { 0, 0, 0, 0, 0, 0 }, /* PA7 */
- /* PA6 */ { 1, 0, 0, 1, 0, 1 }, /* FCC2 MII PAUSE */
- /* PA5 */ { 1, 0, 0, 1, 0, 1 }, /* FCC1 MII PAUSE */
- /* PA4 */ { 1, 0, 0, 1, 0, 0 }, /* FCC2 MII PWRDN */
- /* PA3 */ { 1, 0, 0, 1, 0, 0 }, /* FCC1 MII PWRDN */
- /* PA2 */ { 0, 0, 0, 0, 0, 0 }, /* PA2 */
- /* PA1 */ { 1, 0, 0, 0, 0, 0 }, /* FCC2 MII MDINT */
- /* PA0 */ { 1, 0, 0, 1, 0, 0 } /* FCC1 MII MDINT */
- },
-
- /* Port B configuration */
- { /* conf ppar psor pdir podr pdat */
- /* PB31 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TX_ER */
- /* PB30 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_DV */
- /* PB29 */ { 1, 1, 1, 1, 0, 0 }, /* FCC2 MII TX_EN */
- /* PB28 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_ER */
- /* PB27 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII COL */
- /* PB26 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII CRS */
- /* PB25 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[3] */
- /* PB24 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[2] */
- /* PB23 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[1] */
- /* PB22 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[0] */
- /* PB21 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[0] */
- /* PB20 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[1] */
- /* PB19 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[2] */
- /* PB18 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[3] */
- /* PB17 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3 MII RX_DV */
- /* PB16 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3 MII RX_ER */
- /* PB15 */ { 1, 1, 0, 1, 0, 0 }, /* FCC3 MII TX_ER */
- /* PB14 */ { 1, 1, 0, 1, 0, 0 }, /* FCC3 MII TX_EN */
- /* PB13 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3 MII COL */
- /* PB12 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3 MII CRS */
- /* PB11 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3 MII RxD */
- /* PB10 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3 MII RxD */
- /* PB9 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3 MII RxD */
- /* PB8 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3 MII RxD */
- /* PB7 */ { 1, 1, 0, 1, 0, 0 }, /* FCC3 MII TxD */
- /* PB6 */ { 1, 1, 0, 1, 0, 0 }, /* FCC3 MII TxD */
- /* PB5 */ { 1, 1, 0, 1, 0, 0 }, /* FCC3 MII TxD */
- /* PB4 */ { 1, 1, 0, 1, 0, 0 }, /* FCC3 MII TxD */
- /* PB3 */ { 0, 0, 0, 0, 0, 0 }, /* PB3 */
- /* PB2 */ { 0, 0, 0, 0, 0, 0 }, /* PB2 */
- /* PB1 */ { 0, 0, 0, 0, 0, 0 }, /* PB1 */
- /* PB0 */ { 0, 0, 0, 0, 0, 0 } /* PB0 */
- },
-
- /* Port C */
- { /* conf ppar psor pdir podr pdat */
- /* PC31 */ { 0, 0, 0, 0, 0, 0 }, /* PC31 */
- /* PC30 */ { 0, 0, 0, 0, 0, 0 }, /* PC30 */
- /* PC29 */ { 1, 0, 0, 0, 0, 0 }, /* SCC1 CTS */
- /* PC28 */ { 1, 0, 0, 0, 0, 0 }, /* SCC2 CTS */
- /* PC27 */ { 0, 0, 0, 0, 0, 0 }, /* PC27 */
- /* PC26 */ { 0, 0, 0, 0, 0, 0 }, /* PC26 */
- /* PC25 */ { 0, 0, 0, 0, 0, 0 }, /* PC25 */
- /* PC24 */ { 0, 0, 0, 0, 0, 0 }, /* PC24 */
- /* PC23 */ { 0, 0, 0, 0, 0, 0 }, /* FDC37C78 DACFD */
- /* PC22 */ { 0, 0, 0, 0, 0, 0 }, /* FDC37C78 DNFD */
- /* PC21 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 MII RX_CLK */
- /* PC20 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 MII TX_CLK */
- /* PC19 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_CLK */
- /* PC18 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII TX_CLK */
- /* PC17 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3 MII RX_CLK */
- /* PC16 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3 MII TX_CLK */
-#if 0
- /* PC15 */ { 0, 0, 0, 0, 0, 0 }, /* PC15 */
-#else
- /* PC15 */ { 1, 1, 0, 1, 0, 0 }, /* PC15 */
-#endif
- /* PC14 */ { 0, 0, 0, 0, 0, 0 }, /* PC14 */
- /* PC13 */ { 0, 0, 0, 0, 0, 0 }, /* PC13 */
- /* PC12 */ { 0, 0, 0, 0, 0, 0 }, /* PC12 */
- /* PC11 */ { 0, 0, 0, 0, 0, 0 }, /* PC11 */
- /* PC10 */ { 0, 0, 0, 0, 0, 0 }, /* PC10 */
- /* PC9 */ { 0, 0, 0, 0, 0, 0 }, /* FC9 */
- /* PC8 */ { 0, 0, 0, 0, 0, 0 }, /* PC8 */
- /* PC7 */ { 0, 0, 0, 0, 0, 0 }, /* PC7 */
- /* PC6 */ { 0, 0, 0, 0, 0, 0 }, /* PC6 */
- /* PC5 */ { 0, 0, 0, 0, 0, 0 }, /* PC5 */
- /* PC4 */ { 0, 0, 0, 0, 0, 0 }, /* PC4 */
- /* PC3 */ { 0, 0, 0, 0, 0, 0 }, /* PC3 */
- /* PC2 */ { 0, 0, 0, 0, 0, 0 }, /* PC2 */
- /* PC1 */ { 0, 0, 0, 0, 0, 0 }, /* PC1 */
- /* PC0 */ { 0, 0, 0, 0, 0, 0 }, /* FDC37C78 DRQFD */
- },
-
- /* Port D */
- { /* conf ppar psor pdir podr pdat */
- /* PD31 */ { 1, 1, 0, 0, 0, 0 }, /* SCC1 RXD */
- /* PD30 */ { 1, 1, 1, 1, 0, 0 }, /* SCC1 TXD */
- /* PD29 */ { 1, 0, 0, 1, 0, 0 }, /* SCC1 RTS */
- /* PD28 */ { 1, 1, 0, 0, 0, 0 }, /* SCC2 RXD */
- /* PD27 */ { 1, 1, 0, 1, 0, 0 }, /* SCC2 TXD */
- /* PD26 */ { 1, 0, 0, 1, 0, 0 }, /* SCC2 RTS */
- /* PD25 */ { 0, 0, 0, 0, 0, 0 }, /* PD25 */
- /* PD24 */ { 0, 0, 0, 0, 0, 0 }, /* PD24 */
- /* PD23 */ { 0, 0, 0, 0, 0, 0 }, /* PD23 */
- /* PD22 */ { 0, 0, 0, 0, 0, 0 }, /* PD22 */
- /* PD21 */ { 0, 0, 0, 0, 0, 0 }, /* PD21 */
- /* PD20 */ { 0, 0, 0, 0, 0, 0 }, /* PD20 */
- /* PD19 */ { 0, 0, 0, 0, 0, 0 }, /* PD19 */
- /* PD18 */ { 0, 0, 0, 0, 0, 0 }, /* PD18 */
- /* PD17 */ { 0, 0, 0, 0, 0, 0 }, /* PD17 */
- /* PD16 */ { 0, 0, 0, 0, 0, 0 }, /* PD16 */
-#if defined(CONFIG_SOFT_I2C)
- /* PD15 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SDA */
- /* PD14 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SCL */
-#else
-#if defined(CONFIG_HARD_I2C)
- /* PD15 */ { 1, 1, 1, 0, 1, 0 }, /* I2C SDA */
- /* PD14 */ { 1, 1, 1, 0, 1, 0 }, /* I2C SCL */
-#else /* normal I/O port pins */
- /* PD15 */ { 1, 1, 1, 0, 1, 0 }, /* I2C SDA */
- /* PD14 */ { 1, 1, 1, 0, 1, 0 }, /* I2C SCL */
-#endif
-#endif
- /* PD13 */ { 0, 0, 0, 0, 0, 0 }, /* PD13 */
- /* PD12 */ { 0, 0, 0, 0, 0, 0 }, /* PD12 */
- /* PD11 */ { 0, 0, 0, 0, 0, 0 }, /* PD11 */
- /* PD10 */ { 0, 0, 0, 0, 0, 0 }, /* PD10 */
- /* PD9 */ { 1, 1, 0, 1, 0, 0 }, /* SMC1 TXD */
- /* PD8 */ { 1, 1, 0, 0, 0, 0 }, /* SMC1 RXD */
- /* PD7 */ { 0, 0, 0, 0, 0, 0 }, /* PD7 */
- /* PD6 */ { 0, 0, 0, 0, 0, 0 }, /* PD6 */
- /* PD5 */ { 0, 0, 0, 0, 0, 0 }, /* PD5 */
-#if 0
- /* PD4 */ { 0, 0, 0, 0, 0, 0 }, /* PD4 */
-#else
- /* PD4 */ { 1, 1, 1, 0, 0, 0 }, /* PD4 */
-#endif
- /* PD3 */ { 0, 0, 0, 0, 0, 0 }, /* PD3 */
- /* PD2 */ { 0, 0, 0, 0, 0, 0 }, /* PD2 */
- /* PD1 */ { 0, 0, 0, 0, 0, 0 }, /* PD1 */
- /* PD0 */ { 0, 0, 0, 0, 0, 0 } /* PD0 */
- }
-};
-
-/*
- * UPMB initialization table
- */
-#define _NOT_USED_ 0xFFFFFFFF
-
-static const uint rtc_table[] =
-{
- /*
- * Single Read. (Offset 0 in UPMA RAM)
- */
- 0xfffec00, 0xfffac00, 0xfff2d00, 0xfef2800,
- 0xfaf2080, 0xfaf2080, 0xfff2400, 0x1fff6c05, /* last */
- /*
- * Burst Read. (Offset 8 in UPMA RAM)
- */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Single Write. (Offset 18 in UPMA RAM)
- */
- 0xfffec00, 0xfffac00, 0xfff2d00, 0xfef2800,
- 0xfaf2080, 0xfaf2080, 0xfaf2400, 0x1fbf6c05, /* last */
- /*
- * Burst Write. (Offset 20 in UPMA RAM)
- */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Refresh (Offset 30 in UPMA RAM)
- */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Exception. (Offset 3c in UPMA RAM)
- */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-};
-
-/* ------------------------------------------------------------------------- */
-
-/* Check Board Identity:
- */
-int checkboard (void)
-{
- printf ("Board: ATC\n");
- return 0;
-}
-
-/* ------------------------------------------------------------------------- */
-
-/* Try SDRAM initialization with P/LSDMR=sdmr and ORx=orx
- *
- * This routine performs standard 8260 initialization sequence
- * and calculates the available memory size. It may be called
- * several times to try different SDRAM configurations on both
- * 60x and local buses.
- */
-static long int try_init (volatile memctl8260_t * memctl, ulong sdmr,
- ulong orx, volatile uchar * base)
-{
- volatile uchar c = 0xff;
- volatile uint *sdmr_ptr;
- volatile uint *orx_ptr;
- ulong maxsize, size;
- int i;
-
- /* We must be able to test a location outsize the maximum legal size
- * to find out THAT we are outside; but this address still has to be
- * mapped by the controller. That means, that the initial mapping has
- * to be (at least) twice as large as the maximum expected size.
- */
- maxsize = (1 + (~orx | 0x7fff)) / 2;
-
- /* Since CFG_SDRAM_BASE is always 0 (??), we assume that
- * we are configuring CS1 if base != 0
- */
- sdmr_ptr = &memctl->memc_psdmr;
- orx_ptr = &memctl->memc_or2;
-
- *orx_ptr = orx;
-
- /*
- * Quote from 8260 UM (10.4.2 SDRAM Power-On Initialization, 10-35):
- *
- * "At system reset, initialization software must set up the
- * programmable parameters in the memory controller banks registers
- * (ORx, BRx, P/LSDMR). After all memory parameters are configured,
- * system software should execute the following initialization sequence
- * for each SDRAM device.
- *
- * 1. Issue a PRECHARGE-ALL-BANKS command
- * 2. Issue eight CBR REFRESH commands
- * 3. Issue a MODE-SET command to initialize the mode register
- *
- * The initial commands are executed by setting P/LSDMR[OP] and
- * accessing the SDRAM with a single-byte transaction."
- *
- * The appropriate BRx/ORx registers have already been set when we
- * get here. The SDRAM can be accessed at the address CFG_SDRAM_BASE.
- */
-
- *sdmr_ptr = sdmr | PSDMR_OP_PREA;
- *base = c;
-
- *sdmr_ptr = sdmr | PSDMR_OP_CBRR;
- for (i = 0; i < 8; i++)
- *base = c;
-
- *sdmr_ptr = sdmr | PSDMR_OP_MRW;
- *(base + CFG_MRS_OFFS) = c; /* setting MR on address lines */
-
- *sdmr_ptr = sdmr | PSDMR_OP_NORM | PSDMR_RFEN;
- *base = c;
-
- size = get_ram_size((long *)base, maxsize);
-
- *orx_ptr = orx | ~(size - 1);
-
- return (size);
-}
-
-int misc_init_r(void)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8260_t *memctl = &immap->im_memctl;
-
- upmconfig(UPMA, (uint *)rtc_table, sizeof(rtc_table) / sizeof(uint));
- memctl->memc_mamr = MxMR_RLFx_6X | MxMR_WLFx_6X | MxMR_OP_NORM;
-
- return (0);
-}
-
-long int initdram (int board_type)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8260_t *memctl = &immap->im_memctl;
-
-#ifndef CFG_RAMBOOT
- ulong size8, size9;
-#endif
- long psize;
-
- psize = 8 * 1024 * 1024;
-
- memctl->memc_mptpr = CFG_MPTPR;
- memctl->memc_psrt = CFG_PSRT;
-
-#ifndef CFG_RAMBOOT
- /* 60x SDRAM setup:
- */
- size8 = try_init (memctl, CFG_PSDMR_8COL, CFG_OR2_8COL,
- (uchar *) CFG_SDRAM_BASE);
- size9 = try_init (memctl, CFG_PSDMR_9COL, CFG_OR2_9COL,
- (uchar *) CFG_SDRAM_BASE);
-
- if (size8 < size9) {
- psize = size9;
- printf ("(60x:9COL) ");
- } else {
- psize = try_init (memctl, CFG_PSDMR_8COL, CFG_OR2_8COL,
- (uchar *) CFG_SDRAM_BASE);
- printf ("(60x:8COL) ");
- }
-
-#endif /* CFG_RAMBOOT */
-
- icache_enable ();
-
- return (psize);
-}
-
-#if (CONFIG_COMMANDS & CFG_CMD_DOC)
-extern void doc_probe (ulong physadr);
-void doc_init (void)
-{
- doc_probe (CFG_DOC_BASE);
-}
-#endif
-
-#ifdef CONFIG_PCI
-struct pci_controller hose;
-
-extern void pci_mpc8250_init(struct pci_controller *);
-
-void pci_init_board(void)
-{
- pci_mpc8250_init(&hose);
-}
-#endif
diff --git a/board/atc/config.mk b/board/atc/config.mk
deleted file mode 100644
index eee7a60e3f..0000000000
--- a/board/atc/config.mk
+++ /dev/null
@@ -1,38 +0,0 @@
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# ATC boards
-#
-
-# This should be equal to the CFG_FLASH_BASE define in config_atc.h
-# for the "final" configuration, with U-Boot in flash, or the address
-# in RAM where U-Boot is loaded at for debugging.
-#
-
-TEXT_BASE := 0xFF000000
-
-# RAM version
-#TEXT_BASE := 0x100000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)
diff --git a/board/atc/flash.c b/board/atc/flash.c
deleted file mode 100644
index 2ab60e866b..0000000000
--- a/board/atc/flash.c
+++ /dev/null
@@ -1,663 +0,0 @@
-/*
- * (C) Copyright 2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/* NOTE - CONFIG_FLASH_16BIT means the CPU interface is 16-bit, it
- * has nothing to do with the flash chip being 8-bit or 16-bit.
- */
-#ifdef CONFIG_FLASH_16BIT
-typedef unsigned short FLASH_PORT_WIDTH;
-typedef volatile unsigned short FLASH_PORT_WIDTHV;
-#define FLASH_ID_MASK 0xFFFF
-#else
-typedef unsigned long FLASH_PORT_WIDTH;
-typedef volatile unsigned long FLASH_PORT_WIDTHV;
-#define FLASH_ID_MASK 0xFFFFFFFF
-#endif
-
-#define FPW FLASH_PORT_WIDTH
-#define FPWV FLASH_PORT_WIDTHV
-
-#define ORMASK(size) ((-size) & OR_AM_MSK)
-
-#define FLASH_CYCLE1 0x0555
-#define FLASH_CYCLE2 0x02aa
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size(FPWV *addr, flash_info_t *info);
-static void flash_reset(flash_info_t *info);
-static int write_word_intel(flash_info_t *info, FPWV *dest, FPW data);
-static int write_word_amd(flash_info_t *info, FPWV *dest, FPW data);
-static void flash_get_offsets(ulong base, flash_info_t *info);
-static flash_info_t *flash_get_info(ulong base);
-
-/*-----------------------------------------------------------------------
- * flash_init()
- *
- * sets up flash_info and returns size of FLASH (bytes)
- */
-unsigned long flash_init (void)
-{
- unsigned long size = 0;
- int i;
-
- /* Init: no FLASHes known */
- for (i=0; i < CFG_MAX_FLASH_BANKS; ++i) {
-#if 0
- ulong flashbase = (i == 0) ? PHYS_FLASH_1 : PHYS_FLASH_2;
-#else
- ulong flashbase = CFG_FLASH_BASE;
-#endif
-
- memset(&flash_info[i], 0, sizeof(flash_info_t));
-
- flash_info[i].size =
- flash_get_size((FPW *)flashbase, &flash_info[i]);
-
- if (flash_info[i].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx\n",
- i, flash_info[i].size);
- }
-
- size += flash_info[i].size;
- }
-
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
- /* monitor protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+monitor_flash_len-1,
- flash_get_info(CFG_MONITOR_BASE));
-#endif
-
-#ifdef CFG_ENV_IS_IN_FLASH
- /* ENV protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR+CFG_ENV_SIZE-1,
- flash_get_info(CFG_ENV_ADDR));
-#endif
-
-
- return size ? size : 1;
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_reset(flash_info_t *info)
-{
- FPWV *base = (FPWV *)(info->start[0]);
-
- /* Put FLASH back in read mode */
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL)
- *base = (FPW)0x00FF00FF; /* Intel Read Mode */
- else if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD)
- *base = (FPW)0x00F000F0; /* AMD Read Mode */
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_get_offsets (ulong base, flash_info_t *info)
-{
- int i;
-
- /* set up sector start address table */
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL
- && (info->flash_id & FLASH_BTYPE)) {
- int bootsect_size; /* number of bytes/boot sector */
- int sect_size; /* number of bytes/regular sector */
-
- bootsect_size = 0x00002000 * (sizeof(FPW)/2);
- sect_size = 0x00010000 * (sizeof(FPW)/2);
-
- /* set sector offsets for bottom boot block type */
- for (i = 0; i < 8; ++i) {
- info->start[i] = base + (i * bootsect_size);
- }
- for (i = 8; i < info->sector_count; i++) {
- info->start[i] = base + ((i - 7) * sect_size);
- }
- }
- else if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD
- && (info->flash_id & FLASH_TYPEMASK) == FLASH_AM640U) {
-
- int sect_size; /* number of bytes/sector */
-
- sect_size = 0x00010000 * (sizeof(FPW)/2);
-
- /* set up sector start address table (uniform sector type) */
- for( i = 0; i < info->sector_count; i++ )
- info->start[i] = base + (i * sect_size);
- }
-}
-
-/*-----------------------------------------------------------------------
- */
-
-static flash_info_t *flash_get_info(ulong base)
-{
- int i;
- flash_info_t * info;
-
- for (i = 0; i < CFG_MAX_FLASH_BANKS; i ++) {
- info = & flash_info[i];
- if (info->start[0] <= base && base < info->start[0] + info->size)
- break;
- }
-
- return i == CFG_MAX_FLASH_BANKS ? 0 : info;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-void flash_print_info (flash_info_t *info)
-{
- int i;
- uchar *boottype;
- uchar *bootletter;
- char *fmt;
- uchar botbootletter[] = "B";
- uchar topbootletter[] = "T";
- uchar botboottype[] = "bottom boot sector";
- uchar topboottype[] = "top boot sector";
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD: printf ("AMD "); break;
- case FLASH_MAN_BM: printf ("BRIGHT MICRO "); break;
- case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
- case FLASH_MAN_SST: printf ("SST "); break;
- case FLASH_MAN_STM: printf ("STM "); break;
- case FLASH_MAN_INTEL: printf ("INTEL "); break;
- default: printf ("Unknown Vendor "); break;
- }
-
- /* check for top or bottom boot, if it applies */
- if (info->flash_id & FLASH_BTYPE) {
- boottype = botboottype;
- bootletter = botbootletter;
- }
- else {
- boottype = topboottype;
- bootletter = topbootletter;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM640U:
- fmt = "29LV641D (64 Mbit, uniform sectors)\n";
- break;
- case FLASH_28F800C3B:
- case FLASH_28F800C3T:
- fmt = "28F800C3%s (8 Mbit, %s)\n";
- break;
- case FLASH_INTEL800B:
- case FLASH_INTEL800T:
- fmt = "28F800B3%s (8 Mbit, %s)\n";
- break;
- case FLASH_28F160C3B:
- case FLASH_28F160C3T:
- fmt = "28F160C3%s (16 Mbit, %s)\n";
- break;
- case FLASH_INTEL160B:
- case FLASH_INTEL160T:
- fmt = "28F160B3%s (16 Mbit, %s)\n";
- break;
- case FLASH_28F320C3B:
- case FLASH_28F320C3T:
- fmt = "28F320C3%s (32 Mbit, %s)\n";
- break;
- case FLASH_INTEL320B:
- case FLASH_INTEL320T:
- fmt = "28F320B3%s (32 Mbit, %s)\n";
- break;
- case FLASH_28F640C3B:
- case FLASH_28F640C3T:
- fmt = "28F640C3%s (64 Mbit, %s)\n";
- break;
- case FLASH_INTEL640B:
- case FLASH_INTEL640T:
- fmt = "28F640B3%s (64 Mbit, %s)\n";
- break;
- default:
- fmt = "Unknown Chip Type\n";
- break;
- }
-
- printf (fmt, bootletter, boottype);
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20,
- info->sector_count);
-
- printf (" Sector Start Addresses:");
-
- for (i=0; i<info->sector_count; ++i) {
- if ((i % 5) == 0) {
- printf ("\n ");
- }
-
- printf (" %08lX%s", info->start[i],
- info->protect[i] ? " (RO)" : " ");
- }
-
- printf ("\n");
-}
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-
-ulong flash_get_size (FPWV *addr, flash_info_t *info)
-{
- /* Write auto select command: read Manufacturer ID */
-
- /* Write auto select command sequence and test FLASH answer */
- addr[FLASH_CYCLE1] = (FPW)0x00AA00AA; /* for AMD, Intel ignores this */
- addr[FLASH_CYCLE2] = (FPW)0x00550055; /* for AMD, Intel ignores this */
- addr[FLASH_CYCLE1] = (FPW)0x00900090; /* selects Intel or AMD */
-
- /* The manufacturer codes are only 1 byte, so just use 1 byte.
- * This works for any bus width and any FLASH device width.
- */
- udelay(100);
- switch (addr[0] & 0xff) {
-
- case (uchar)AMD_MANUFACT:
- info->flash_id = FLASH_MAN_AMD;
- break;
-
- case (uchar)INTEL_MANUFACT:
- info->flash_id = FLASH_MAN_INTEL;
- break;
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- break;
- }
-
- /* Check 16 bits or 32 bits of ID so work on 32 or 16 bit bus. */
- if (info->flash_id != FLASH_UNKNOWN) switch (addr[1]) {
-
- case (FPW)AMD_ID_LV640U: /* 29LV640 and 29LV641 have same ID */
- info->flash_id += FLASH_AM640U;
- info->sector_count = 128;
- info->size = 0x00800000 * (sizeof(FPW)/2);
- break; /* => 8 or 16 MB */
-
- case (FPW)INTEL_ID_28F800C3B:
- info->flash_id += FLASH_28F800C3B;
- info->sector_count = 23;
- info->size = 0x00100000 * (sizeof(FPW)/2);
- break; /* => 1 or 2 MB */
-
- case (FPW)INTEL_ID_28F800B3B:
- info->flash_id += FLASH_INTEL800B;
- info->sector_count = 23;
- info->size = 0x00100000 * (sizeof(FPW)/2);
- break; /* => 1 or 2 MB */
-
- case (FPW)INTEL_ID_28F160C3B:
- info->flash_id += FLASH_28F160C3B;
- info->sector_count = 39;
- info->size = 0x00200000 * (sizeof(FPW)/2);
- break; /* => 2 or 4 MB */
-
- case (FPW)INTEL_ID_28F160B3B:
- info->flash_id += FLASH_INTEL160B;
- info->sector_count = 39;
- info->size = 0x00200000 * (sizeof(FPW)/2);
- break; /* => 2 or 4 MB */
-
- case (FPW)INTEL_ID_28F320C3B:
- info->flash_id += FLASH_28F320C3B;
- info->sector_count = 71;
- info->size = 0x00400000 * (sizeof(FPW)/2);
- break; /* => 4 or 8 MB */
-
- case (FPW)INTEL_ID_28F320B3B:
- info->flash_id += FLASH_INTEL320B;
- info->sector_count = 71;
- info->size = 0x00400000 * (sizeof(FPW)/2);
- break; /* => 4 or 8 MB */
-
- case (FPW)INTEL_ID_28F640C3B:
- info->flash_id += FLASH_28F640C3B;
- info->sector_count = 135;
- info->size = 0x00800000 * (sizeof(FPW)/2);
- break; /* => 8 or 16 MB */
-
- case (FPW)INTEL_ID_28F640B3B:
- info->flash_id += FLASH_INTEL640B;
- info->sector_count = 135;
- info->size = 0x00800000 * (sizeof(FPW)/2);
- break; /* => 8 or 16 MB */
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- return (0); /* => no or unknown flash */
- }
-
- flash_get_offsets((ulong)addr, info);
-
- /* Put FLASH back in read mode */
- flash_reset(info);
-
- return (info->size);
-}
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- FPWV *addr;
- int flag, prot, sect;
- int intel = (info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL;
- ulong start, now, last;
- int rcode = 0;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_INTEL800B:
- case FLASH_INTEL160B:
- case FLASH_INTEL320B:
- case FLASH_INTEL640B:
- case FLASH_28F800C3B:
- case FLASH_28F160C3B:
- case FLASH_28F320C3B:
- case FLASH_28F640C3B:
- case FLASH_AM640U:
- break;
- case FLASH_UNKNOWN:
- default:
- printf ("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- last = get_timer(0);
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last && rcode == 0; sect++) {
-
- if (info->protect[sect] != 0) /* protected, skip it */
- continue;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr = (FPWV *)(info->start[sect]);
- if (intel) {
- *addr = (FPW)0x00500050; /* clear status register */
- *addr = (FPW)0x00200020; /* erase setup */
- *addr = (FPW)0x00D000D0; /* erase confirm */
- }
- else {
- /* must be AMD style if not Intel */
- FPWV *base; /* first address in bank */
-
- base = (FPWV *)(info->start[0]);
- base[FLASH_CYCLE1] = (FPW)0x00AA00AA; /* unlock */
- base[FLASH_CYCLE2] = (FPW)0x00550055; /* unlock */
- base[FLASH_CYCLE1] = (FPW)0x00800080; /* erase mode */
- base[FLASH_CYCLE1] = (FPW)0x00AA00AA; /* unlock */
- base[FLASH_CYCLE2] = (FPW)0x00550055; /* unlock */
- *addr = (FPW)0x00300030; /* erase sector */
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- start = get_timer(0);
-
- /* wait at least 50us for AMD, 80us for Intel.
- * Let's wait 1 ms.
- */
- udelay (1000);
-
- while ((*addr & (FPW)0x00800080) != (FPW)0x00800080) {
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
-
- if (intel) {
- /* suspend erase */
- *addr = (FPW)0x00B000B0;
- }
-
- flash_reset(info); /* reset to read mode */
- rcode = 1; /* failed */
- break;
- }
-
- /* show that we're waiting */
- if ((get_timer(last)) > CFG_HZ) {/* every second */
- putc ('.');
- last = get_timer(0);
- }
- }
-
- /* show that we're waiting */
- if ((get_timer(last)) > CFG_HZ) { /* every second */
- putc ('.');
- last = get_timer(0);
- }
-
- flash_reset(info); /* reset to read mode */
- }
-
- printf (" done\n");
- return rcode;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- FPW data = 0; /* 16 or 32 bit word, matches flash bus width on MPC8XX */
- int bytes; /* number of bytes to program in current word */
- int left; /* number of bytes left to program */
- int i, res;
-
- for (left = cnt, res = 0;
- left > 0 && res == 0;
- addr += sizeof(data), left -= sizeof(data) - bytes) {
-
- bytes = addr & (sizeof(data) - 1);
- addr &= ~(sizeof(data) - 1);
-
- /* combine source and destination data so can program
- * an entire word of 16 or 32 bits
- */
- for (i = 0; i < sizeof(data); i++) {
- data <<= 8;
- if (i < bytes || i - bytes >= left )
- data += *((uchar *)addr + i);
- else
- data += *src++;
- }
-
- /* write one word to the flash */
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD:
- res = write_word_amd(info, (FPWV *)addr, data);
- break;
- case FLASH_MAN_INTEL:
- res = write_word_intel(info, (FPWV *)addr, data);
- break;
- default:
- /* unknown flash type, error! */
- printf ("missing or unknown FLASH type\n");
- res = 1; /* not really a timeout, but gives error */
- break;
- }
- }
-
- return (res);
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash for AMD FLASH
- * A word is 16 or 32 bits, whichever the bus width of the flash bank
- * (not an individual chip) is.
- *
- * returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word_amd (flash_info_t *info, FPWV *dest, FPW data)
-{
- ulong start;
- int flag;
- int res = 0; /* result, assume success */
- FPWV *base; /* first address in flash bank */
-
- /* Check if Flash is (sufficiently) erased */
- if ((*dest & data) != data) {
- return (2);
- }
-
-
- base = (FPWV *)(info->start[0]);
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- base[FLASH_CYCLE1] = (FPW)0x00AA00AA; /* unlock */
- base[FLASH_CYCLE2] = (FPW)0x00550055; /* unlock */
- base[FLASH_CYCLE1] = (FPW)0x00A000A0; /* selects program mode */
-
- *dest = data; /* start programming the data */
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- start = get_timer (0);
-
- /* data polling for D7 */
- while (res == 0 && (*dest & (FPW)0x00800080) != (data & (FPW)0x00800080)) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- *dest = (FPW)0x00F000F0; /* reset bank */
- res = 1;
- }
- }
-
- return (res);
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash for Intel FLASH
- * A word is 16 or 32 bits, whichever the bus width of the flash bank
- * (not an individual chip) is.
- *
- * returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word_intel (flash_info_t *info, FPWV *dest, FPW data)
-{
- ulong start;
- int flag;
- int res = 0; /* result, assume success */
-
- /* Check if Flash is (sufficiently) erased */
- if ((*dest & data) != data) {
- return (2);
- }
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- *dest = (FPW)0x00500050; /* clear status register */
- *dest = (FPW)0x00FF00FF; /* make sure in read mode */
- *dest = (FPW)0x00400040; /* program setup */
-
- *dest = data; /* start programming the data */
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- start = get_timer (0);
-
- while (res == 0 && (*dest & (FPW)0x00800080) != (FPW)0x00800080) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- *dest = (FPW)0x00B000B0; /* Suspend program */
- res = 1;
- }
- }
-
- if (res == 0 && (*dest & (FPW)0x00100010))
- res = 1; /* write failed, time out error is close enough */
-
- *dest = (FPW)0x00500050; /* clear status register */
- *dest = (FPW)0x00FF00FF; /* make sure in read mode */
-
- return (res);
-}
diff --git a/board/atc/u-boot.lds b/board/atc/u-boot.lds
deleted file mode 100644
index eee83d0993..0000000000
--- a/board/atc/u-boot.lds
+++ /dev/null
@@ -1,125 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc8260/start.o (.text)
- *(.text)
- common/environment.o(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/barco/Makefile b/board/barco/Makefile
deleted file mode 100644
index d6bbf2f297..0000000000
--- a/board/barco/Makefile
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/barco/README b/board/barco/README
deleted file mode 100644
index d255a3d11a..0000000000
--- a/board/barco/README
+++ /dev/null
@@ -1,11 +0,0 @@
-This port of U-Boot is tuned to run on a range of Barco Control Rooms
-Streaming Video Solutions, including:
-
- - Streaming Video Card (SVC)
- - Sample Compress Network (SCN)
-
-For more information, see http://www.barcocontrolrooms.com/
-
-Code and configuration are originally based on the Sandpoint board
-
-Marc Leeman <marc.leeman@barco.com>
diff --git a/board/barco/barco.c b/board/barco/barco.c
deleted file mode 100644
index becbd0abda..0000000000
--- a/board/barco/barco.c
+++ /dev/null
@@ -1,363 +0,0 @@
-/********************************************************************
- *
- * Unless otherwise specified, Copyright (C) 2004-2005 Barco Control Rooms
- *
- * $Source: /home/services/cvs/firmware/ppc/u-boot-1.1.2/board/barco/barco.c,v $
- * $Revision: 1.4 $
- * $Author: mleeman $
- * $Date: 2005/03/02 16:40:20 $
- *
- * Last ChangeLog Entry
- * $Log: barco.c,v $
- * Revision 1.4 2005/03/02 16:40:20 mleeman
- * remove empty labels (3.4 complains)
- *
- * Revision 1.3 2005/02/21 12:48:58 mleeman
- * update of copyright years (feedback wd)
- *
- * Revision 1.2 2005/02/21 10:10:53 mleeman
- * - split up switch statement to a function call (Linux kernel coding guidelines)
- * ( feedback wd)
- *
- * Revision 1.1 2005/02/14 09:31:07 mleeman
- * renaming of files
- *
- * Revision 1.1 2005/02/14 09:23:46 mleeman
- * - moved 'barcohydra' directory to a more generic barco; since we will be
- * supporting and adding multiple boards
- *
- * Revision 1.3 2005/02/10 13:57:32 mleeman
- * fixed flash corruption: I should exit from the moment I find the correct value
- *
- * Revision 1.2 2005/02/09 12:56:23 mleeman
- * add generic header to track changes in sources
- *
- *
- *******************************************************************/
-
-/*
- * (C) Copyright 2004
- * Marc Leeman <marc.leeman@barco.com>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc824x.h>
-#include <pci.h>
-#include <malloc.h>
-#include <command.h>
-
-#include "config.h"
-#include "barco_svc.h"
-
-#define TRY_WORKING (3)
-#define BOOT_DEFAULT (2)
-#define BOOT_WORKING (1)
-
-int checkboard (void)
-{
- /*TODO: Check processor type */
-
- puts ( "Board: Streaming Video Card for Hydra systems "
-#ifdef CONFIG_MPC8240
- "8240"
-#endif
-#ifdef CONFIG_MPC8245
- "8245"
-#endif
- " Unity ##Test not implemented yet##\n");
- return 0;
-}
-
-long int initdram (int board_type)
-{
- long size;
- long new_bank0_end;
- long mear1;
- long emear1;
-
- size = get_ram_size (CFG_SDRAM_BASE, CFG_MAX_RAM_SIZE);
-
- new_bank0_end = size - 1;
- mear1 = mpc824x_mpc107_getreg (MEAR1);
- emear1 = mpc824x_mpc107_getreg (EMEAR1);
- mear1 = (mear1 & 0xFFFFFF00) |
- ((new_bank0_end & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT);
- emear1 = (emear1 & 0xFFFFFF00) |
- ((new_bank0_end & MICR_ADDR_MASK) >> MICR_EADDR_SHIFT);
- mpc824x_mpc107_setreg (MEAR1, mear1);
- mpc824x_mpc107_setreg (EMEAR1, emear1);
-
- return (size);
-}
-
-/*
- * Initialize PCI Devices, report devices found.
- */
-#ifndef CONFIG_PCI_PNP
-static struct pci_config_table pci_barcohydra_config_table[] = {
- { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x0f, PCI_ANY_ID,
- pci_cfgfunc_config_device, { PCI_ENET0_IOADDR,
- PCI_ENET0_MEMADDR,
- PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER } },
- { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x10, PCI_ANY_ID,
- pci_cfgfunc_config_device, { PCI_ENET1_IOADDR,
- PCI_ENET1_MEMADDR,
- PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER } },
- { }
-};
-#endif
-
-struct pci_controller hose = {
-#ifndef CONFIG_PCI_PNP
- config_table: pci_barcohydra_config_table,
-#endif
-};
-
-void pci_init_board (void)
-{
- pci_mpc824x_init (&hose);
-}
-
-int write_flash (char *addr, char value)
-{
- char *adr = (char *)0xFF800000;
- int cnt = 0;
- char status,oldstatus;
-
- *(adr+0x55) = 0xAA; udelay (1);
- *(adr+0xAA) = 0x55; udelay (1);
- *(adr+0x55) = 0xA0; udelay (1);
- *addr = value;
-
- status = *addr;
- do {
- oldstatus = status;
- status = *addr;
-
- if ((oldstatus & 0x40) == (status & 0x40)) {
- return 4;
- }
- cnt++;
- if (cnt > 10000) {
- return 2;
- }
- } while ( (status & 0x20) == 0 );
-
- oldstatus = *addr;
- status = *addr;
-
- if ((oldstatus & 0x40) == (status & 0x40)) {
- return 0;
- } else {
- *(adr+0x55) = 0xF0;
- return 1;
- }
-}
-
-unsigned update_flash (unsigned char *buf)
-{
- switch ((*buf) & 0x3) {
- case TRY_WORKING:
- printf ("found 3 and converted it to 2\n");
- write_flash ((char *)buf, (*buf) & 0xFE);
- *((unsigned char *)0xFF800000) = 0xF0;
- udelay (100);
- printf ("buf [%#010x] %#010x\n", buf, (*buf));
- /* XXX - fall through??? */
- case BOOT_WORKING :
- return BOOT_WORKING;
- }
- return BOOT_DEFAULT;
-}
-
-unsigned scan_flash (void)
-{
- char section[] = "kernel";
- int cfgFileLen = (CFG_FLASH_ERASE_SECTOR_LENGTH >> 1);
- int sectionPtr = 0;
- int foundItem = 0; /* 0: None, 1: section found, 2: "=" found */
- int bufPtr;
- unsigned char *buf;
-
- buf = (unsigned char*)(CFG_FLASH_RANGE_BASE + CFG_FLASH_RANGE_SIZE \
- - CFG_FLASH_ERASE_SECTOR_LENGTH);
- for (bufPtr = 0; bufPtr < cfgFileLen; ++bufPtr) {
- if ((buf[bufPtr]==0xFF) && (*(int*)(buf+bufPtr)==0xFFFFFFFF)) {
- return BOOT_DEFAULT;
- }
- /* This is the scanning loop, we try to find a particular
- * quoted value
- */
- switch (foundItem) {
- case 0:
- if ((section[sectionPtr] == 0)) {
- ++foundItem;
- } else if (buf[bufPtr] == section[sectionPtr]) {
- ++sectionPtr;
- } else {
- sectionPtr = 0;
- }
- break;
- case 1:
- ++foundItem;
- break;
- case 2:
- ++foundItem;
- break;
- case 3:
- default:
- return update_flash (&buf[bufPtr - 1]);
- }
- }
-
- printf ("Failed to read %s\n",section);
- return BOOT_DEFAULT;
-}
-
-TSBootInfo* find_boot_info (void)
-{
- unsigned bootimage = scan_flash ();
- TSBootInfo* info = (TSBootInfo*)malloc (sizeof(TSBootInfo));
-
- switch (bootimage) {
- case TRY_WORKING:
- info->address = CFG_WORKING_KERNEL_ADDRESS;
- break;
- case BOOT_WORKING :
- info->address = CFG_WORKING_KERNEL_ADDRESS;
- break;
- case BOOT_DEFAULT:
- default:
- info->address= CFG_DEFAULT_KERNEL_ADDRESS;
-
- }
- info->size = *((unsigned int *)(info->address ));
-
- return info;
-}
-
-void barcobcd_boot (void)
-{
- TSBootInfo* start;
- char *bootm_args[2];
- char *buf;
- int cnt;
- extern int do_bootm (cmd_tbl_t *, int, int, char *[]);
-
- buf = (char *)(0x00800000);
- /* make certain there are enough chars to print the command line here!
- */
- bootm_args[0] = (char *)malloc (16*sizeof(char));
- bootm_args[1] = (char *)malloc (16*sizeof(char));
-
- start = find_boot_info ();
-
- printf ("Booting kernel at address %#10x with size %#10x\n",
- start->address, start->size);
-
- /* give length of the kernel image to bootm */
- sprintf (bootm_args[0],"%x",start->size);
- /* give address of the kernel image to bootm */
- sprintf (bootm_args[1],"%x",buf);
-
- printf ("flash address: %#10x\n",start->address+8);
- printf ("buf address: %#10x\n",buf);
-
- /* aha, we reserve 8 bytes here... */
- for (cnt = 0; cnt < start->size ; cnt++) {
- buf[cnt] = ((char *)start->address)[cnt+8];
- }
-
- /* initialise RAM memory */
- *((unsigned int *)0xFEC00000) = 0x00141A98;
- do_bootm (NULL,0,2,bootm_args);
-}
-
-int barcobcd_boot_image (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
-#if 0
- if (argc > 1) {
- printf ("Usage:\n (%d) %s\n", argc, cmdtp->usage);
- return 1;
- }
-#endif
- barcobcd_boot ();
-
- return 0;
-}
-
-/* Currently, boot_working and boot_default are the same command. This is
- * left in here to see what we'll do in the future */
-
-U_BOOT_CMD (
- try_working, 1, 1, barcobcd_boot_image,
- " try_working - check flash value and boot the appropriate image\n",
- "\n"
- );
-
-U_BOOT_CMD (
- boot_working, 1, 1, barcobcd_boot_image,
- " boot_working - check flash value and boot the appropriate image\n",
- "\n"
- );
-
-U_BOOT_CMD (
- boot_default, 1, 1, barcobcd_boot_image,
- " boot_default - check flash value and boot the appropriate image\n",
- "\n"
- );
-/*
- * We are not using serial communication, so just provide empty functions
- */
-int serial_init (void)
-{
- return 0;
-}
-void serial_setbrg (void)
-{
- return;
-}
-void serial_putc (const char c)
-{
- return;
-}
-void serial_puts (const char *c)
-{
- return;
-}
-void serial_addr (unsigned int i)
-{
- return;
-}
-int serial_getc (void)
-{
- return 0;
-}
-int serial_tstc (void)
-{
- return 0;
-}
-
-unsigned long post_word_load (void)
-{
- return 0l;
-}
-void post_word_store (unsigned long val)
-{
- return;
-}
diff --git a/board/barco/barco_svc.h b/board/barco/barco_svc.h
deleted file mode 100644
index 088f61e74e..0000000000
--- a/board/barco/barco_svc.h
+++ /dev/null
@@ -1,68 +0,0 @@
-/********************************************************************
- *
- * Unless otherwise specified, Copyright (C) 2004-2005 Barco Control Rooms
- *
- * $Source: /home/services/cvs/firmware/ppc/u-boot-1.1.2/board/barco/barco_svc.h,v $
- * $Revision: 1.2 $
- * $Author: mleeman $
- * $Date: 2005/02/21 12:48:58 $
- *
- * Last ChangeLog Entry
- * $Log: barco_svc.h,v $
- * Revision 1.2 2005/02/21 12:48:58 mleeman
- * update of copyright years (feedback wd)
- *
- * Revision 1.1 2005/02/14 09:31:07 mleeman
- * renaming of files
- *
- * Revision 1.1 2005/02/14 09:23:46 mleeman
- * - moved 'barcohydra' directory to a more generic barco; since we will be
- * supporting and adding multiple boards
- *
- * Revision 1.1 2005/02/08 15:40:19 mleeman
- * modified and added platform files
- *
- * Revision 1.2 2005/01/25 08:05:04 mleeman
- * more cleanup of the code
- *
- * Revision 1.1 2004/07/20 08:49:55 mleeman
- * Working version of the default and nfs kernel booting.
- *
- *
- *******************************************************************/
-
-#ifndef _LOCAL_BARCOHYDRA_H_
-#define _LOCAL_BARCOHYDRA_H_
-
-#include <flash.h>
-#include <asm/io.h>
-
-/* Defines for the barcohydra board */
-#ifndef CFG_FLASH_ERASE_SECTOR_LENGTH
-#define CFG_FLASH_ERASE_SECTOR_LENGTH (0x10000)
-#endif
-
-#ifndef CFG_DEFAULT_KERNEL_ADDRESS
-#define CFG_DEFAULT_KERNEL_ADDRESS (CFG_FLASH_BASE + 0x30000)
-#endif
-
-#ifndef CFG_WORKING_KERNEL_ADDRESS
-#define CFG_WORKING_KERNEL_ADDRESS (0xFFE00000)
-#endif
-
-
-typedef struct SBootInfo {
- unsigned int address;
- unsigned int size;
- unsigned char state;
-}TSBootInfo;
-
-/* barcohydra.c */
-int checkboard(void);
-long int initdram(int board_type);
-void pci_init_board(void);
-void check_flash(void);
-int write_flash(char *addr, char value);
-TSBootInfo* find_boot_info(void);
-void final_boot(void);
-#endif
diff --git a/board/barco/config.mk b/board/barco/config.mk
deleted file mode 100644
index f950c07b01..0000000000
--- a/board/barco/config.mk
+++ /dev/null
@@ -1,30 +0,0 @@
-#
-# (C) Copyright 2000, 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# Barco Hydra/SCN boards
-#
-
-TEXT_BASE = 0xFFF00000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE)
diff --git a/board/barco/early_init.S b/board/barco/early_init.S
deleted file mode 100644
index 07dafb716f..0000000000
--- a/board/barco/early_init.S
+++ /dev/null
@@ -1,152 +0,0 @@
-/*
- * (C) Copyright 2001
- * Thomas Koeller, tkoeller@gmx.net
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef __ASSEMBLY__
-#define __ASSEMBLY__ 1
-#endif
-
-#include <config.h>
-#include <asm/processor.h>
-#include <mpc824x.h>
-#include <ppc_asm.tmpl>
-
-#if defined(USE_DINK32)
- /* We are running from RAM, so do not clear the MCCR1_MEMGO bit! */
- #define MCCR1VAL ((CFG_ROMNAL << MCCR1_ROMNAL_SHIFT) | (CFG_ROMFAL << MCCR1_ROMFAL_SHIFT) | MCCR1_MEMGO)
-#else
- #define MCCR1VAL (CFG_ROMNAL << MCCR1_ROMNAL_SHIFT) | (CFG_ROMFAL << MCCR1_ROMFAL_SHIFT)
-#endif
-
- .text
-
- /* Values to program into memory controller registers */
-tbl: .long MCCR1, MCCR1VAL
- .long MCCR2, CFG_REFINT << MCCR2_REFINT_SHIFT
- .long MCCR3
- .long (((CFG_BSTOPRE & 0x000000f0) >> 4) << MCCR3_BSTOPRE2TO5_SHIFT) | \
- (CFG_REFREC << MCCR3_REFREC_SHIFT) | \
- (CFG_RDLAT << MCCR3_RDLAT_SHIFT)
- .long MCCR4
- .long (CFG_PRETOACT << MCCR4_PRETOACT_SHIFT) | (CFG_ACTTOPRE << MCCR4_ACTTOPRE_SHIFT) | \
- (CFG_REGISTERD_TYPE_BUFFER << 20) | \
- (((CFG_BSTOPRE & 0x00000300) >> 8) << MCCR4_BSTOPRE0TO1_SHIFT ) | \
- ((CFG_SDMODE_CAS_LAT << 4) | (CFG_SDMODE_WRAP << 3) | \
- (CFG_SDMODE_BURSTLEN) << MCCR4_SDMODE_SHIFT) | \
- (CFG_ACTTORW << MCCR4_ACTTORW_SHIFT) | \
- ((CFG_BSTOPRE & 0x0000000f) << MCCR4_BSTOPRE6TO9_SHIFT )
- .long MSAR1
- .long (((CFG_BANK0_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 0) | \
- (((CFG_BANK1_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 8) | \
- (((CFG_BANK2_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 16) | \
- (((CFG_BANK3_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 24)
- .long EMSAR1
- .long (((CFG_BANK0_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 0) | \
- (((CFG_BANK1_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 8) | \
- (((CFG_BANK2_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 16) | \
- (((CFG_BANK3_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 24)
- .long MSAR2
- .long (((CFG_BANK4_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 0) | \
- (((CFG_BANK5_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 8) | \
- (((CFG_BANK6_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 16) | \
- (((CFG_BANK7_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 24)
- .long EMSAR2
- .long (((CFG_BANK4_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 0) | \
- (((CFG_BANK5_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 8) | \
- (((CFG_BANK6_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 16) | \
- (((CFG_BANK7_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 24)
- .long MEAR1
- .long (((CFG_BANK0_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 0) | \
- (((CFG_BANK1_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 8) | \
- (((CFG_BANK2_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 16) | \
- (((CFG_BANK3_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 24)
- .long EMEAR1
- .long (((CFG_BANK0_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 0) | \
- (((CFG_BANK1_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 8) | \
- (((CFG_BANK2_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 16) | \
- (((CFG_BANK3_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 24)
- .long MEAR2
- .long (((CFG_BANK4_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 0) | \
- (((CFG_BANK5_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 8) | \
- (((CFG_BANK6_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 16) | \
- (((CFG_BANK7_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 24)
- .long EMEAR2
- .long (((CFG_BANK4_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 0) | \
- (((CFG_BANK5_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 8) | \
- (((CFG_BANK6_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 16) | \
- (((CFG_BANK7_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 24)
- .long 0
-
-
- /*
- * Early CPU initialization. Set up memory controller, so we can access any RAM at all. This
- * must be done in assembly, since we have no stack at this point.
- */
- .global early_init_f
-early_init_f:
- mflr r10
-
- /* basic memory controller configuration */
- lis r3, CONFIG_ADDR_HIGH
- lis r4, CONFIG_DATA_HIGH
- bl lab
-lab: mflr r5
- lwzu r0, tbl - lab(r5)
-loop: lwz r1, 4(r5)
- stwbrx r0, 0, r3
- eieio
- stwbrx r1, 0, r4
- eieio
- lwzu r0, 8(r5)
- cmpli cr0, 0, r0, 0
- bne cr0, loop
-
- /* set bank enable bits */
- lis r0, MBER@h
- ori r0, 0, MBER@l
- li r1, CFG_BANK_ENABLE
- stwbrx r0, 0, r3
- eieio
- stb r1, 0(r4)
- eieio
-
- /* delay loop */
- lis r0, 0x0003
- mtctr r0
-delay: bdnz delay
-
- /* enable memory controller */
- lis r0, MCCR1@h
- ori r0, 0, MCCR1@l
- stwbrx r0, 0, r3
- eieio
- lwbrx r0, 0, r4
- oris r0, 0, MCCR1_MEMGO@h
- stwbrx r0, 0, r4
- eieio
-
- /* set up stack pointer */
- lis r1, CFG_INIT_SP_OFFSET@h
- ori r1, r1, CFG_INIT_SP_OFFSET@l
-
- mtlr r10
- blr
diff --git a/board/barco/flash.c b/board/barco/flash.c
deleted file mode 100644
index 6cb19b7b07..0000000000
--- a/board/barco/flash.c
+++ /dev/null
@@ -1,611 +0,0 @@
-/********************************************************************
- *
- * Unless otherwise specified, Copyright (C) 2004-2005 Barco Control Rooms
- *
- * $Source: /home/services/cvs/firmware/ppc/u-boot-1.1.2/board/barco/flash.c,v $
- * $Revision: 1.3 $
- * $Author: mleeman $
- * $Date: 2005/02/21 12:48:58 $
- *
- * Last ChangeLog Entry
- * $Log: flash.c,v $
- * Revision 1.3 2005/02/21 12:48:58 mleeman
- * update of copyright years (feedback wd)
- *
- * Revision 1.2 2005/02/21 11:04:04 mleeman
- * remove dead code and Coding style (feedback wd)
- *
- * Revision 1.1 2005/02/14 09:23:46 mleeman
- * - moved 'barcohydra' directory to a more generic barco; since we will be
- * supporting and adding multiple boards
- *
- * Revision 1.2 2005/02/09 12:56:23 mleeman
- * add generic header to track changes in sources
- *
- *
- *******************************************************************/
-
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc824x.h>
-#include <asm/processor.h>
-#include <flash.h>
-
-#define ROM_CS0_START 0xFF800000
-#define ROM_CS1_START 0xFF000000
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-#if defined(CFG_ENV_IS_IN_FLASH)
-# ifndef CFG_ENV_ADDR
-# define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_ENV_OFFSET)
-# endif
-# ifndef CFG_ENV_SIZE
-# define CFG_ENV_SIZE CFG_ENV_SECT_SIZE
-# endif
-# ifndef CFG_ENV_SECT_SIZE
-# define CFG_ENV_SECT_SIZE CFG_ENV_SIZE
-# endif
-#endif
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static int write_word (flash_info_t *info, ulong dest, ulong data);
-
-/*flash command address offsets*/
-
-#define ADDR0 (0xAAA)
-#define ADDR1 (0x555)
-#define ADDR3 (0x001)
-
-#define FLASH_WORD_SIZE unsigned char
-
-/*-----------------------------------------------------------------------
- */
-
-static unsigned long flash_id(unsigned char mfct, unsigned char chip) __attribute__ ((const));
-
-typedef struct{
- FLASH_WORD_SIZE extval;
- unsigned short intval;
-} map_entry;
-
-static unsigned long flash_id(unsigned char mfct, unsigned char chip)
-{
- static const map_entry mfct_map[] = {
- {(FLASH_WORD_SIZE) AMD_MANUFACT, (unsigned short) ((unsigned long) FLASH_MAN_AMD >> 16)},
- {(FLASH_WORD_SIZE) FUJ_MANUFACT, (unsigned short) ((unsigned long) FLASH_MAN_FUJ >> 16)},
- {(FLASH_WORD_SIZE) STM_MANUFACT, (unsigned short) ((unsigned long) FLASH_MAN_STM >> 16)},
- {(FLASH_WORD_SIZE) MT_MANUFACT, (unsigned short) ((unsigned long) FLASH_MAN_MT >> 16)},
- {(FLASH_WORD_SIZE) INTEL_MANUFACT,(unsigned short) ((unsigned long) FLASH_MAN_INTEL >> 16)},
- {(FLASH_WORD_SIZE) INTEL_ALT_MANU,(unsigned short) ((unsigned long) FLASH_MAN_INTEL >> 16)}
- };
-
- static const map_entry chip_map[] = {
- {AMD_ID_F040B, FLASH_AM040},
- {AMD_ID_F033C, FLASH_AM033},
- {AMD_ID_F065D, FLASH_AM065},
- {ATM_ID_LV040, FLASH_AT040},
- {(FLASH_WORD_SIZE) STM_ID_x800AB, FLASH_STM800AB}
- };
-
- const map_entry *p;
- unsigned long result = FLASH_UNKNOWN;
-
- /* find chip id */
- for(p = &chip_map[0]; p < &chip_map[sizeof chip_map / sizeof chip_map[0]]; p++){
- if(p->extval == chip){
- result = FLASH_VENDMASK | p->intval;
- break;
- }
- }
-
- /* find vendor id */
- for(p = &mfct_map[0]; p < &mfct_map[sizeof mfct_map / sizeof mfct_map[0]]; p++){
- if(p->extval == mfct){
- result &= ~FLASH_VENDMASK;
- result |= (unsigned long) p->intval << 16;
- break;
- }
- }
-
- return result;
-}
-
-
-unsigned long flash_init(void)
-{
- unsigned long i;
- unsigned char j;
- static const ulong flash_banks[] = CFG_FLASH_BANKS;
-
- /* Init: no FLASHes known */
- for (i = 0; i < CFG_MAX_FLASH_BANKS; i++){
- flash_info_t * const pflinfo = &flash_info[i];
- pflinfo->flash_id = FLASH_UNKNOWN;
- pflinfo->size = 0;
- pflinfo->sector_count = 0;
- }
-
- /* Enable writes to Hydra/Argus flash */
- {
- register unsigned int temp;
- CONFIG_READ_WORD(PICR1,temp);
- temp |= PICR1_FLASH_WR_EN;
- CONFIG_WRITE_WORD(PICR1,temp);
- }
-
- for(i = 0; i < sizeof flash_banks / sizeof flash_banks[0]; i++){
- flash_info_t * const pflinfo = &flash_info[i];
- const unsigned long base_address = flash_banks[i];
- volatile FLASH_WORD_SIZE * const flash = (FLASH_WORD_SIZE *) base_address;
-
- /* write autoselect sequence */
- flash[0x5555] = 0xaa;
- flash[0x2aaa] = 0x55;
- flash[0x5555] = 0x90;
- __asm__ __volatile__("sync");
-
- pflinfo->flash_id = flash_id(flash[0x0], flash[0x1]);
-
- switch(pflinfo->flash_id & FLASH_TYPEMASK){
- case FLASH_AM033:
- pflinfo->size = 0x00200000;
- pflinfo->sector_count = 64;
- for(j = 0; j < 64; j++){
- pflinfo->start[j] = base_address + 0x00010000 * j;
- pflinfo->protect[j] = flash[(j << 16) | 0x2];
- }
- break;
- case FLASH_AM065:
- pflinfo->size = 0x00800000;
- pflinfo->sector_count =128;
- for(j = 0; j < 128; j++){
- pflinfo->start[j] = base_address + 0x00010000 * j;
- pflinfo->protect[j] = flash[(j << 16) | 0x2];
- }
- break;
- case FLASH_AT040:
- pflinfo->size = 0x00080000;
- pflinfo->sector_count = 2;
- pflinfo->start[0] = base_address ;
- pflinfo->start[1] = base_address + 0x00004000;
- pflinfo->protect[0] = ((flash[0x02] & 0X01)==0) ? 0X02 : 0X01;
- pflinfo->protect[1] = 0X02;
- break;
- case FLASH_AM040:
- pflinfo->size = 0x00080000;
- pflinfo->sector_count = 8;
- for(j = 0; j < 8; j++){
- pflinfo->start[j] = base_address + 0x00010000 * j;
- pflinfo->protect[j] = flash[(j << 16) | 0x2];
- }
- break;
- case FLASH_STM800AB:
- pflinfo->size = 0x00100000;
- pflinfo->sector_count = 19;
- pflinfo->start[0] = base_address;
- pflinfo->start[1] = base_address + 0x4000;
- pflinfo->start[2] = base_address + 0x6000;
- pflinfo->start[3] = base_address + 0x8000;
- for(j = 1; j < 16; j++){
- pflinfo->start[j+3] = base_address + 0x00010000 * j;
- }
- break;
- }
- /* Protect monitor and environment sectors */
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
- flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE + monitor_flash_len - 1,
- &flash_info[0]);
-#endif
-
-#if (CFG_ENV_IS_IN_FLASH == 1) && defined(CFG_ENV_ADDR)
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1,
- &flash_info[0]);
-#endif
-
- /* reset device to read mode */
- flash[0x0000] = 0xf0;
- __asm__ __volatile__("sync");
- }
-
- return flash_info[0].size + flash_info[1].size;
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info(flash_info_t *info)
-{
- static const char unk[] = "Unknown";
- const char *mfct = unk, *type = unk;
- unsigned int i;
-
- if(info->flash_id != FLASH_UNKNOWN){
- switch(info->flash_id & FLASH_VENDMASK){
- case FLASH_MAN_ATM:
- mfct = "Atmel";
- break;
- case FLASH_MAN_AMD:
- mfct = "AMD";
- break;
- case FLASH_MAN_FUJ:
- mfct = "FUJITSU";
- break;
- case FLASH_MAN_STM:
- mfct = "STM";
- break;
- case FLASH_MAN_SST:
- mfct = "SST";
- break;
- case FLASH_MAN_BM:
- mfct = "Bright Microelectonics";
- break;
- case FLASH_MAN_INTEL:
- mfct = "Intel";
- break;
- }
-
- switch(info->flash_id & FLASH_TYPEMASK){
- case FLASH_AT040:
- type = "AT49LV040 (512K * 8, uniform sector size)";
- break;
- case FLASH_AM033:
- type = "AM29F033C (4 Mbit * 8, uniform sector size)";
- break;
- case FLASH_AM040:
- type = "AM29F040B (512K * 8, uniform sector size)";
- break;
- case FLASH_AM065:
- type = "AM29F0465D ( 8 MBit * 8, uniform sector size) or part of AM29F652D( 16 MB)";
- break;
- case FLASH_AM400B:
- type = "AM29LV400B (4 Mbit, bottom boot sect)";
- break;
- case FLASH_AM400T:
- type = "AM29LV400T (4 Mbit, top boot sector)";
- break;
- case FLASH_AM800B:
- type = "AM29LV800B (8 Mbit, bottom boot sect)";
- break;
- case FLASH_AM800T:
- type = "AM29LV800T (8 Mbit, top boot sector)";
- break;
- case FLASH_AM160T:
- type = "AM29LV160T (16 Mbit, top boot sector)";
- break;
- case FLASH_AM320B:
- type = "AM29LV320B (32 Mbit, bottom boot sect)";
- break;
- case FLASH_AM320T:
- type = "AM29LV320T (32 Mbit, top boot sector)";
- break;
- case FLASH_STM800AB:
- type = "M29W800AB (8 Mbit, bottom boot sect)";
- break;
- case FLASH_SST800A:
- type = "SST39LF/VF800 (8 Mbit, uniform sector size)";
- break;
- case FLASH_SST160A:
- type = "SST39LF/VF160 (16 Mbit, uniform sector size)";
- break;
- }
- }
-
- printf(
- "\n Brand: %s Type: %s\n"
- " Size: %lu KB in %d Sectors\n",
- mfct,
- type,
- info->size >> 10,
- info->sector_count
- );
-
- printf (" Sector Start Addresses:");
-
- for (i = 0; i < info->sector_count; i++){
- unsigned long size;
- unsigned int erased;
- unsigned long * flash = (unsigned long *) info->start[i];
-
- /*
- * Check if whole sector is erased
- */
- size =
- (i != (info->sector_count - 1)) ?
- (info->start[i + 1] - info->start[i]) >> 2 :
- (info->start[0] + info->size - info->start[i]) >> 2;
-
- for(
- flash = (unsigned long *) info->start[i], erased = 1;
- (flash != (unsigned long *) info->start[i] + size) && erased;
- flash++
- ){
- erased = *flash == ~0x0UL;
- }
-
- printf(
- "%s %08lX %s %s",
- (i % 5) ? "" : "\n ",
- info->start[i],
- erased ? "E" : " ",
- info->protect[i] ? "RO" : " "
- );
- }
-
- puts("\n");
- return;
-}
-
-int flash_erase(flash_info_t *info, int s_first, int s_last)
-{
- volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[0]);
- int flag, prot, sect, l_sect;
- ulong start, now, last;
- unsigned char sh8b;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- if ((info->flash_id == FLASH_UNKNOWN) ||
- (info->flash_id > (FLASH_MAN_STM | FLASH_AMD_COMP))) {
- printf ("Can't erase unknown flash type - aborted\n");
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- l_sect = -1;
-
- /* Check the ROM CS */
- if ((info->start[0] >= ROM_CS1_START) && (info->start[0] < ROM_CS0_START)){
- sh8b = 3;
- }
- else{
- sh8b = 0;
- }
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE)0x00AA00AA;
- addr[ADDR1 << sh8b] = (FLASH_WORD_SIZE)0x00550055;
- addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE)0x00800080;
- addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE)0x00AA00AA;
- addr[ADDR1 << sh8b] = (FLASH_WORD_SIZE)0x00550055;
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr = (FLASH_WORD_SIZE *)(info->start[0] + (
- (info->start[sect] - info->start[0]) << sh8b));
- if (info->flash_id & FLASH_MAN_SST){
- addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE)0x00AA00AA;
- addr[ADDR1 << sh8b] = (FLASH_WORD_SIZE)0x00550055;
- addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE)0x00800080;
- addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE)0x00AA00AA;
- addr[ADDR1 << sh8b] = (FLASH_WORD_SIZE)0x00550055;
- addr[0] = (FLASH_WORD_SIZE)0x00500050; /* block erase */
- udelay(30000); /* wait 30 ms */
- }
- else
- addr[0] = (FLASH_WORD_SIZE)0x00300030; /* sector erase */
- l_sect = sect;
- }
- }
-
- /* re-enable interrupts if necessary */
- if (flag){
- enable_interrupts();
- }
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- /*
- * We wait for the last triggered sector
- */
- if (l_sect < 0){
- goto DONE;
- }
-
- start = get_timer (0);
- last = start;
- addr = (FLASH_WORD_SIZE *)(info->start[0] + (
- (info->start[l_sect] - info->start[0]) << sh8b));
- while ((addr[0] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080) {
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- return 1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- serial_putc ('.');
- last = now;
- }
- }
-
-DONE:
- /* reset to read mode */
- addr = (FLASH_WORD_SIZE *)info->start[0];
- addr[0] = (FLASH_WORD_SIZE)0x00F000F0; /* reset bank */
-
- printf (" done\n");
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int i, l, rc;
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
- for (; i<4 && cnt>0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = 0;
- for (i=0; i<4; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- return (write_word(info, wp, data));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word (flash_info_t *info, ulong dest, ulong data)
-{
- volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *)info->start[0];
- volatile FLASH_WORD_SIZE *dest2;
- volatile FLASH_WORD_SIZE *data2 = (FLASH_WORD_SIZE *)&data;
- ulong start;
- int flag;
- int i;
- unsigned char sh8b;
-
- /* Check the ROM CS */
- if ((info->start[0] >= ROM_CS1_START) && (info->start[0] < ROM_CS0_START)){
- sh8b = 3;
- }
- else{
- sh8b = 0;
- }
-
- dest2 = (FLASH_WORD_SIZE *)(((dest - info->start[0]) << sh8b) +
- info->start[0]);
-
- /* Check if Flash is (sufficiently) erased */
- if ((*dest2 & (FLASH_WORD_SIZE)data) != (FLASH_WORD_SIZE)data) {
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- for (i=0; i<4/sizeof(FLASH_WORD_SIZE); i++){
- addr2[ADDR0 << sh8b] = (FLASH_WORD_SIZE)0x00AA00AA;
- addr2[ADDR1 << sh8b] = (FLASH_WORD_SIZE)0x00550055;
- addr2[ADDR0 << sh8b] = (FLASH_WORD_SIZE)0x00A000A0;
-
- dest2[i << sh8b] = data2[i];
-
- /* re-enable interrupts if necessary */
- if (flag){
- enable_interrupts();
- }
-
- /* data polling for D7 */
- start = get_timer (0);
- while ((dest2[i << sh8b] & (FLASH_WORD_SIZE)0x00800080) !=
- (data2[i] & (FLASH_WORD_SIZE)0x00800080)) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- return (1);
- }
- }
- }
-
- return (0);
-}
-
-/*----------------------------------------------------------------------- */
diff --git a/board/barco/speed.h b/board/barco/speed.h
deleted file mode 100644
index 46860e840e..0000000000
--- a/board/barco/speed.h
+++ /dev/null
@@ -1,78 +0,0 @@
-/********************************************************************
- *
- * Unless otherwise specified, Copyright (C) 2004-2005 Barco Control Rooms
- *
- * $Source: /home/services/cvs/firmware/ppc/u-boot-1.1.2/board/barco/speed.h,v $
- * $Revision: 1.2 $
- * $Author: mleeman $
- * $Date: 2005/02/21 12:48:58 $
- *
- * Last ChangeLog Entry
- * $Log: speed.h,v $
- * Revision 1.2 2005/02/21 12:48:58 mleeman
- * update of copyright years (feedback wd)
- *
- * Revision 1.1 2005/02/14 09:23:46 mleeman
- * - moved 'barcohydra' directory to a more generic barco; since we will be
- * supporting and adding multiple boards
- *
- * Revision 1.2 2005/02/09 12:56:23 mleeman
- * add generic header to track changes in sources
- *
- *
- *******************************************************************/
-
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*-----------------------------------------------------------------------
- * Timer value for timer 2, ICLK = 10
- *
- * SPEED_FCOUNT2 = GCLK / (16 * (TIMER_TMR_PS + 1))
- * SPEED_TMR3_PS = (GCLK / (16 * SPEED_FCOUNT3)) - 1
- *
- * SPEED_FCOUNT2 timer 2 counting frequency
- * GCLK CPU clock
- * SPEED_TMR2_PS prescaler
- */
-#define SPEED_TMR2_PS (250 - 1) /* divide by 250 */
-
-/*-----------------------------------------------------------------------
- * Timer value for PIT
- *
- * PIT_TIME = SPEED_PITC / PITRTCLK
- * PITRTCLK = 8192
- */
-#define SPEED_PITC (82 << 16) /* start counting from 82 */
-
-/*
- * The new value for PTA is calculated from
- *
- * PTA = (gclk * Trefresh) / (2 ^ (2 * DFBRG) * PTP * NCS)
- *
- * gclk CPU clock (not bus clock !)
- * Trefresh Refresh cycle * 4 (four word bursts used)
- * DFBRG For normal mode (no clock reduction) always 0
- * PTP Prescaler (already adjusted for no. of banks and 4K / 8K refresh)
- * NCS Number of SDRAM banks (chip selects) on this UPM.
- */
diff --git a/board/barco/u-boot.lds b/board/barco/u-boot.lds
deleted file mode 100644
index 7bf8531ab3..0000000000
--- a/board/barco/u-boot.lds
+++ /dev/null
@@ -1,131 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc824x/start.o (.text)
- lib_ppc/board.o (.text)
- lib_ppc/ppcstring.o (.text)
-
- . = DEFINED(env_offset) ? env_offset : .;
- common/environment.o (.text)
-
- *(.text)
-
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
-
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/bmw/Makefile b/board/bmw/Makefile
deleted file mode 100644
index 621640b007..0000000000
--- a/board/bmw/Makefile
+++ /dev/null
@@ -1,43 +0,0 @@
-#
-# (C) Copyright 2002
-# James F. Dougherty, Broadcom Corporation, jfd@broadcom.com
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o ns16550.o serial.o m48t59y.o
-
-SOBJS = early_init.o
-
-$(LIB): .depend $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS) $(SOBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/bmw/README b/board/bmw/README
deleted file mode 100644
index 70bc81362f..0000000000
--- a/board/bmw/README
+++ /dev/null
@@ -1,331 +0,0 @@
-Broadcom 95xx BMW CPCI Platform
-
-Overview
-=========
-BMW is an MPC8245 system controller featuring:
-* 3U CPCI Form Factor
-* BCM5703 Gigabit Ethernet
-* M48T59Y NVRAM
-* 16MB DOC
-* DIP Socket for Socketed DOC up to 1GB
-* 64MB SDRAM
-* LCD Display
-* Configurable Jumper options for 66,85, and 100Mhz memory bus
-
-
-BMW System Address Map
-======================
-BMW uses the MPC8245 CHRP Address MAP B found in the MPC8245 Users Manual
-(P.121, Section 3.1 Address Maps, Address Map B). Other I/O devices found
-onboard the processor module are listed briefly below:
-
-0x00000000 - 0x40000000 - 64MB SDRAM SIMM
- (Unregistered PC-100 SDRAM DIMM Module)
-
-0xFF000000 - 0xFF001FFF - M-Systems DiskOnChip (TM) 2000
- TSOP 16MB (MD2211-D16-V3)
-
-0x70000000 - 0x70001FFF - M-Systems DiskOnChip (TM) 2000
- DIP32 (Socketed 16MB - 1GB ) *
- NOTE: this is not populated on all systems.
-
-0x7c000000 - 0x7c000000 - Reset Register
- (Write 0 to reset)
-
-0x7c000001 - 0x7c000001 - System LED
- (Clear Bit 7 to turn on, set to shut off)
-
-0x7c000002 - 0x7c000002 - M48T59 Watchdog IRQ3
- (Clear bit 7 to reset, set to assert IRQ3)
-
-0x7c000003 - 0x7c000003 - M48T59 Write-Protect Register
- (Clear bit 7 to make R/W, set to make R/O)
-
-0x7c002000 - 0x7c002003 - Infineon OSRAM DLR2416 4 Character
- 5x7 Dot Matrix Alphanumeric Display
- (Each byte sets the appropriate character)
-
-0x7c004000 - 0x7c005FF0 - SGS-THOMSON M48T59Y 8K NVRAM/RTC
- NVRAM Memory Region
-
-0x7c005FF0 - 0x7c005FFF - SGS-THOMSON M48T59Y 8K NVRAM/RTC
- Realtime Clock Registers
-
-0xFFF00000 - 0xFFF80000 - 512K PLCC32 BootRom
- (AMD AM29F040, ST 29W040B)
-
-0xFFF00100 - System Reset Vector
-
-
-IO/MMU (BAT) Configuration
-======================
-The following Block-Address-Translation (BAT) configuration
-is recommended to access all I/O devices.
-
-#define CFG_IBAT0L (0x00000000 | BATL_PP_10 | BATL_MEMCOHERENCE)
-#define CFG_IBAT0U (0x00000000 | BATU_BL_256M | BATU_VS | BATU_VP)
-
-#define CFG_IBAT1L (0x70000000 | BATL_PP_10 | BATL_CACHEINHIBIT)
-#define CFG_IBAT1U (0x70000000 | BATU_BL_256M | BATU_VS | BATU_VP)
-
-#define CFG_IBAT2L (0x80000000 | BATL_PP_10 | BATL_CACHEINHIBIT)
-#define CFG_IBAT2U (0x80000000 | BATU_BL_256M | BATU_VS | BATU_VP)
-
-#define CFG_IBAT3L (0xF0000000 | BATL_PP_10 | BATL_CACHEINHIBIT)
-#define CFG_IBAT3U (0xF0000000 | BATU_BL_256M | BATU_VS | BATU_VP)
-
-#define CFG_DBAT0L CFG_IBAT0L
-#define CFG_DBAT0U CFG_IBAT0U
-#define CFG_DBAT1L CFG_IBAT1L
-#define CFG_DBAT1U CFG_IBAT1U
-#define CFG_DBAT2L CFG_IBAT2L
-#define CFG_DBAT2U CFG_IBAT2U
-#define CFG_DBAT3L CFG_IBAT3L
-#define CFG_DBAT3U CFG_IBAT3U
-
-
-Interrupt Mappings
-======================
-BMW uses MPC8245 discrete mode interrupts. With the following
-hardwired mappings:
-
-BCM5701 10/100/1000 Ethernet IRQ1
-CompactPCI Interrupt A IRQ2
-RTC/Watchdog Interrupt IRQ3
-Internal NS16552 UART IRQ4
-
-
-Jumper Settings
-======================
-
-BMW has a jumper (JP600) for selecting 66, 85, or 100Mhz memory bus.
-A jumper (X) is a 0 bit.
-
-Hence 66= 10110
- 85= 11000
- 100= 10000
-
-Jumper Settings for various Speeds
-=======================
-J1 J2 J3 J4 J5
- X X 66Mhz
-=======================
-J1 J2 J3 J4 J5
- X X X 85Mhz
-=======================
-J1 J2 J3 J4 J5
- X X X X 100Mhz
-=======================
-
-Obviously, 100Mhz memory bus is recommended for optimum performance.
-
-
-U-Boot
-===============
-Broadcom BMW board is supported under config_BWM option.
-Supported features:
-
-- NVRAM setenv/getenv (used by Linux Kernel for configuration variables)
-- BCM570x TFTP file transfer support
-- LCD Display Support
-- DOC Support - (underway)
-
-
-U-Boot 1.2.0 (Aug 6 2002 - 17:44:48)
-
-CPU: MPC8245 Revision 16.20 at 264 MHz: 16 kB I-Cache 16 kB D-Cache
-Board: BMW MPC8245/KAHLUA2 - CHRP (MAP B)
-Built: Aug 6 2002 at 17:44:37
-Local Bus at 66 MHz
-DRAM: 64 MB
-FLASH: 4095 MB
-In: serial
-Out: serial
-Err: serial
-DOC: No DiskOnChip found
-Hit any key to stop autoboot: 0
-=>printenv
-bootdelay=5
-baudrate=9600
-clocks_in_mhz=1
-hostname=switch-2
-bootcmd=tftp 100000 vmlinux.img;bootm
-gateway=10.16.64.1
-ethaddr=00:00:10:18:10:10
-nfsroot=172.16.40.111:/boot/root-fs
-filesize=5ec8c
-netmask=255.255.240.0
-ipaddr=172.16.40.114
-serverip=172.16.40.111
-root=/dev/nfs
-stdin=serial
-stdout=serial
-stderr=serial
-
-Environment size: 315/8172 bytes
-=>boot
-
-
-DevTools
-========
-ELDK
- DENX Embedded Linux Development Kit
-
-ROM Emulator
- Grammar Engine PROMICE P1160-90-AI21E (2MBx8bit, 90ns access time)
- Grammar Engine PL32E 32Pin PLCC Emulation cables
- Grammar Engine 3VA8CON (3Volt adapter with Short cables)
- Grammar Engine FPNET PromICE Ethernet Adapters
-
-ICE
- WRS/EST VisionICE-II (PPC8240)
-
-
-=>reset
-
-
-U-Boot 1.2.0 (Aug 6 2002 - 17:44:48)
-
-CPU: MPC8245 Revision 16.20 at 264 MHz: 16 kB I-Cache 16 kB D-Cache
-Board: BMW MPC8245/KAHLUA2 - CHRP (MAP B)
-Built: Aug 6 2002 at 17:44:37
-Local Bus at 66 MHz
-DRAM: 64 MB
-FLASH: 4095 MB
-In: serial
-Out: serial
-Err: serial
-DOC: No DiskOnChip found
-Hit any key to stop autoboot: 0
-
-Broadcom BCM5701 1000Base-T: bus 0, device 13, function 0: MBAR=0x80100000
-BCM570x PCI Memory base address @0x80100000
-eth0:Broadcom BCM5701 1000Base-T: 100 Mbps half duplex link up, flow control OFF
-eth0: Broadcom BCM5701 1000Base-T @0x80100000,node addr 000010181010
-eth0: BCM5700 with Broadcom BCM5701 Integrated Copper transceiver found
-eth0: 32-bit PCI 33MHz, MTU: 1500,Rx Checksum ON
-ARP broadcast 1
-TFTP from server 172.16.40.111; our IP address is 172.16.40.114
-Filename 'vmlinux.img'.
-Load address: 0x100000
-Loading: #################################################################
- ####################################T #############################
- ######################
-done
-Bytes transferred = 777199 (bdbef hex)
-
-eth0:Broadcom BCM5701 1000Base-T,HALT,POWER DOWN,done - offline.
-## Booting image at 00100000 ...
- Image Name: vmlinux.bin.gz
- Created: 2002-08-06 6:30:13 UTC
- Image Type: PowerPC Linux Kernel Image (gzip compressed)
- Data Size: 777135 Bytes = 758 kB = 0 MB
- Load Address: 00000000
- Entry Point: 00000000
- Verifying Checksum ... OK
- Uncompressing Kernel Image ... OK
-Memory BAT mapping: BAT2=64Mb, BAT3=0Mb, residual: 0Mb
-Linux version 2.4.19-rc3 (jfd@que) (gcc version 2.95.3 20010111 (prerelease/franzo/20010111)) #168 Mon Aug 5 23:29:20 PDT 2002
-CPU:82xx: 32 I-Cache Block Size, 32 D-Cache Block Size PVR: 0x810000
-U-Boot Environment: 0xc01b08f0
-IP PNP: 802.3 Ethernet Address=<0:0:10:18:10:10>
-cpu0: MPC8245/KAHLUA-II : BMW Platform : 64MB RAM: BPLD Rev. 6e
-NOTICE: mounting root file system via NFS
-IP PNP: switch-2: eth0 IP 172.16.40.114/255.255.240.0 gateway 10.16.64.1 server 172.16.40.111
-On node 0 totalpages: 16384
-zone(0): 16384 pages.
-zone(1): 0 pages.
-zone(2): 0 pages.
-Kernel command line: console=ttyS0,9600 ip=172.16.40.114:172.16.40.111:10.16.64.1:255.255.240.0:switch-2:eth0 root=/dev/nfs rw nfsroot=172.16.40.111:/boot/root-fs,timeo=200,retrans=500 nfsaddrs=172.16.40.114:172.16.40.111
-root_dev_setup:/dev/nfs or 00:ff
-time_init: decrementer frequency = 16.501145 MHz
-Calibrating delay loop... 175.71 BogoMIPS
-Memory: 62572k available (1396k kernel code, 436k data, 100k init, 0k highmem)
-Dentry cache hash table entries: 8192 (order: 4, 65536 bytes)
-Inode cache hash table entries: 4096 (order: 3, 32768 bytes)
-Mount-cache hash table entries: 1024 (order: 1, 8192 bytes)
-Buffer-cache hash table entries: 4096 (order: 2, 16384 bytes)
-Page-cache hash table entries: 16384 (order: 4, 65536 bytes)
-POSIX conformance testing by UNIFIX
-PCI: Probing PCI hardware
-Linux NET4.0 for Linux 2.4
-Based upon Swansea University Computer Society NET3.039
-Initializing RT netlink socket
-Starting kswapd
-devfs: v1.12a (20020514) Richard Gooch (rgooch@atnf.csiro.au)
-devfs: devfs_debug: 0x0
-devfs: boot_options: 0x1
-Installing knfsd (copyright (C) 1996 okir@monad.swb.de).
-pty: 256 Unix98 ptys configured
-Serial driver version 5.05c (2001-07-08) with MANY_PORTS SHARE_IRQ SERIAL_PCI enabled
-Testing ttyS0 (0xf7f51500, 0xf7f51500)...
-Testing ttyS1 (0xfc004600, 0xfc004600)...
-ttyS00 at 0xf7f51500 (irq = 24) is a ST16650
-ttyS01 at 0xfc004600 (irq = 25) is a 16550A
-Real Time Clock Driver v1.10e
-RAMDISK driver initialized: 16 RAM disks of 4096K size 1024 blocksize
-loop: loaded (max 8 devices)
-TFFS 5.1.1 Flash disk driver for DiskOnChip
-Copyright (C) 1998,2001 M-Systems Flash Disk Pioneers Ltd.
-DOC device(s) found: 1
-fl_init: registered device at major: 100
-fl_geninit: registered device at major: 100
-Partition check:
- fla: p1
-partition: /dev/fl/0: start_sect: 0,nr_sects: 32000 Fl_blk_size[]: 16000KB
-partition: /dev/fl/1: start_sect: 2,nr_sects: 31998 Fl_blk_size[]: 15999KB
-partition: /dev/fl/2: start_sect: 0,nr_sects: 0 Fl_blk_size[]: 0KB
-partition: /dev/fl/3: start_sect: 0,nr_sects: 0 Fl_blk_size[]: 0KB
-Broadcom Gigabit Ethernet Driver bcm5700 ver. 3.0.7 (07/17/02)
-eth0: Broadcom BCM5701 found at mem bfff0000, IRQ 1, node addr 000010181010
-eth0: Broadcom BCM5701 Integrated Copper transceiver found
-eth0: Scatter-gather ON, 64-bit DMA ON, Tx Checksum ON, Rx Checksum ON, 802.1Q VLAN ON
-bond0 registered without MII link monitoring, in bonding mode.
-rtc: unable to get misc minor
-NET4: Linux TCP/IP 1.0 for NET4.0
-IP Protocols: ICMP, UDP, TCP, IGMP
-IP: routing cache hash table of 512 buckets, 4Kbytes
-TCP: Hash tables configured (established 4096 bind 4096)
-bcm5700: eth0 NIC Link is UP, 100 Mbps half duplex
-IP-Config: Gateway not on directly connected network.
-NET4: Unix domain sockets 1.0/SMP for Linux NET4.0.
-802.1Q VLAN Support v1.7 Ben Greear <greearb@candelatech.com>
-All bugs added by David S. Miller <davem@redhat.com>
-Looking up port of RPC 100003/2 on 172.16.40.111
-Looking up port of RPC 100005/1 on 172.16.40.111
-VFS: Mounted root (nfs filesystem).
-Mounted devfs on /dev
-Freeing unused kernel memory: 100k init
-INIT: version 2.78 booting
-Mounting local filesystems...
-not mounted anything
-Setting up symlinks in /dev...done.
-Setting up extra devices in /dev...done.
-Starting devfsd...Started device management daemon for /dev
-INIT: Entering runlevel: 2
-Starting internet superserver: inetd.
-
-
-Welcome to Linux/PPC
-MPC8245/BMW
-
-
-switch-2 login: root
-Password:
-PAM_unix[49]: (login) session opened for user root by LOGIN(uid=0)
-Last login: Thu Nov 25 11:51:14 1920 on console
-
-
-Welcome to Linux/PPC
-MPC8245/BMW
-
-
-login[49]: ROOT LOGIN on `console'
-
-root@switch-2:~# cat /proc/cpuinfo
-cpu : 82xx
-revision : 16.20 (pvr 8081 1014)
-bogomips : 175.71
-vendor : Broadcom
-machine : BMW/MPC8245
-root@switch-2:~#
diff --git a/board/bmw/bmw.c b/board/bmw/bmw.c
deleted file mode 100644
index 485e050b19..0000000000
--- a/board/bmw/bmw.c
+++ /dev/null
@@ -1,158 +0,0 @@
-/*
- * (C) Copyright 2002
- * James F. Dougherty, Broadcom Corporation, jfd@broadcom.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <common.h>
-#include <watchdog.h>
-#include <command.h>
-#include <malloc.h>
-#include <devices.h>
-#include <net.h>
-#include <version.h>
-#include <dtt.h>
-#include <mpc824x.h>
-#include <asm/processor.h>
-#include <linux/mtd/doc2000.h>
-
-#include "bmw.h"
-#include "m48t59y.h"
-#include <pci.h>
-
-
-int checkboard(void)
-{
- ulong busfreq = get_bus_freq(0);
- char buf[32];
-
- puts ("Board: BMW MPC8245/KAHLUA2 - CHRP (MAP B)\n");
- printf("Built: %s at %s\n", __DATE__ , __TIME__ );
- /* printf("MPLD: Revision %d\n", SYS_REVID_GET()); */
- printf("Local Bus at %s MHz\n", strmhz(buf, busfreq));
- return 0;
-}
-
-long int initdram(int board_type)
-{
- return 64*1024*1024;
-}
-
-
-void
-get_tod(void)
-{
- int year, month, day, hour, minute, second;
-
- m48_tod_get(&year,
- &month,
- &day,
- &hour,
- &minute,
- &second);
-
- printf(" Current date/time: %d/%d/%d %d:%d:%d \n",
- month, day, year, hour, minute, second);
-
-}
-
-/*
- * EPIC, PCI, and I/O devices.
- * Initialize Mousse Platform, probe for PCI devices,
- * Query configuration parameters if not set.
- */
-int misc_init_f (void)
-{
-#if 0
- m48_tod_init(); /* Init SGS M48T59Y TOD/NVRAM */
- printf("RTC: M48T589 TOD/NVRAM (%d) bytes\n",
- TOD_NVRAM_SIZE);
- get_tod();
-#endif
-
- sys_led_msg("BOOT");
- return 0;
-}
-
-
-/*
- * Initialize PCI Devices, report devices found.
- */
-struct pci_controller hose;
-
-void pci_init_board (void)
-{
- pci_mpc824x_init(&hose);
- /* pci_dev_init(0); */
-}
-
-/*
- * Write characters to LCD display.
- * Note that the bytes for the first character is the last address.
- */
-void
-sys_led_msg(char* msg)
-{
- LED_REG(0) = msg[3];
- LED_REG(1) = msg[2];
- LED_REG(2) = msg[1];
- LED_REG(3) = msg[0];
-}
-
-/*
- * Map onboard TSOP-16MB DOC FLASH chip.
- */
-void doc_init (void)
-{
- doc_probe(DOC_BASE_ADDR);
-}
-
-#define NV_ADDR ((volatile unsigned char *) CFG_ENV_ADDR)
-
-/* Read from NVRAM */
-void*
-nvram_read(void *dest, const long src, size_t count)
-{
- int i;
- volatile unsigned char* d = (unsigned char*)dest;
- volatile unsigned char* s = (unsigned char*)src;
-
- for( i = 0; i < count;i++)
- d[i] = s[i];
-
- return dest;
-}
-
-/* Write to NVRAM */
-void
-nvram_write(long dest, const void *src, size_t count)
-{
- int i;
- volatile unsigned char* d = (unsigned char*)dest;
- volatile unsigned char* s = (unsigned char*)src;
-
- SYS_TOD_UNPROTECT();
-
- for( i = 0; i < count;i++)
- d[i] = s[i];
-
- SYS_TOD_PROTECT();
-}
diff --git a/board/bmw/bmw.h b/board/bmw/bmw.h
deleted file mode 100644
index dd97569303..0000000000
--- a/board/bmw/bmw.h
+++ /dev/null
@@ -1,86 +0,0 @@
-/*
- * BMW/MPC8245 Board definitions.
- * For more info, see http://www.vooha.com/
- *
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2002
- * James Dougherty (jfd@broadcom.com)
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef __BMW_H
-#define __BMW_H
-
-/* System addresses */
-
-#define PCI_SPECIAL_BASE 0xfe000000
-#define PCI_SPECIAL_SIZE 0x01000000
-
-#define EUMBBAR_VAL 0x80500000 /* Location of EUMB region */
-#define EUMBSIZE 0x00100000 /* Size of EUMB region */
-
-/* Extended ROM space devices */
-#define DOC_BASE_ADDR 0xff000000 /* Onboard DOC TSOP 16MB */
-#define DOC2_BASE_ADDR 0x70000000 /* DIP32 socket -> 1GB */
-#define XROM_BASE_ADDR 0x7c000000 /* RCS2 (PAL / Satellite IO) */
-#define PLD_REG_BASE XROM_BASE_ADDR
-#define LED_REG_BASE (XROM_BASE_ADDR | 0x2000)
-#define TOD_BASE (XROM_BASE_ADDR | 0x4000)
-#define LED_REG(x) (*(volatile unsigned char *) \
- (LED_REG_BASE + (x)))
-#define XROM_DEV_SIZE 0x00006000
-
-#define ENET_DEV_BASE 0x80000000
-
-#define PLD_REG(off) (*(volatile unsigned char *)\
- (PLD_REG_BASE + (off)))
-
-#define PLD_REVID_B1 0x7f /* Fix me */
-#define PLD_REVID_B2 0x01 /* Fix me */
-
-#define SYS_HARD_RESET() { for (;;) PLD_REG(0) = 0; } /* clr 0x80 bit */
-#define SYS_REVID_GET() ((int) PLD_REG(0) & 0x7f)
-#define SYS_LED_OFF() (PLD_REG(1) |= 0x80)
-#define SYS_LED_ON() (PLD_REG(1) &= ~0x80)
-#define SYS_WATCHDOG_IRQ3() (PLD_REG(2) |= 0x80)
-#define SYS_WATCHDOG_RESET() (PLD_REG(2) &= ~0x80)
-#define SYS_TOD_PROTECT() (PLD_REG(3) |= 0x80)
-#define SYS_TOD_UNPROTECT() (PLD_REG(3) &= ~0x80)
-
-#define TOD_REG_BASE (TOD_BASE | 0x1ff0)
-#define TOD_NVRAM_BASE TOD_BASE
-#define TOD_NVRAM_SIZE 0x1ff0
-#define TOD_NVRAM_LIMIT (TOD_NVRAM_BASE + TOD_NVRAM_SIZE)
-#define RTC(r) (TOD_BASE + r)
-
-/* Onboard BCM570x device */
-#define PCI_ENET_IOADDR 0x80000000
-#define PCI_ENET_MEMADDR 0x80000000
-
-
-#ifndef __ASSEMBLY__
-/* C Function prototypes */
-void sys_led_msg(char* msg);
-
-#endif /* !__ASSEMBLY__ */
-
-#endif /* __BMW_H */
diff --git a/board/bmw/config.mk b/board/bmw/config.mk
deleted file mode 100644
index f9915496ad..0000000000
--- a/board/bmw/config.mk
+++ /dev/null
@@ -1,32 +0,0 @@
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# CU824 board
-#
-
-TEXT_BASE = 0xFFF00000
-# NOTE: The flags below affect how the BCM570x driver is compiled
-PLATFORM_CPPFLAGS += -DEMBEDDED -DBIG_ENDIAN_HOST -DINCLUDE_5701_AX_FIX=1\
- -DDBG=0 -DT3_JUMBO_RCV_RCB_ENTRY_COUNT=256\
- -DTEXT_BASE=$(TEXT_BASE)
diff --git a/board/bmw/early_init.S b/board/bmw/early_init.S
deleted file mode 100644
index e6400c3088..0000000000
--- a/board/bmw/early_init.S
+++ /dev/null
@@ -1,1170 +0,0 @@
-#include <ppc_asm.tmpl>
-#include <mpc824x.h>
-#include <ppc_defs.h>
-#include <asm/cache.h>
-#include <asm/mmu.h>
-
-#define USE_V2_INIT 1 /* Jimmy Blair's initialization. */
-
-
-/*
- * Initialize the MMU using BAT entries and hardwired TLB
- * This obviates the need for any code in cpu_init_f which
- * configures the BAT registers.
-*/
-#define MEMORY_MGMT_MSR_BITS (MSR_DR | MSR_IR) /* Data and Inst Relocate */
- .global iommu_setup
- /* Initialize IO/MMU mappings via BAT method Ch. 7,
- * PPC Programming Reference
- */
-iommu_setup:
-
-/* initialize the BAT registers (SPRs 528 - 543 */
-#define mtibat0u(x) mtspr 528,(x) /* SPR 528 (IBAT0U) */
-#define mtibat0l(x) mtspr 529,(x) /* SPR 529 (IBAT0L) */
-#define mtibat1u(x) mtspr 530,(x) /* SPR 530 (IBAT1U) */
-#define mtibat1l(x) mtspr 531,(x) /* SPR 531 (IBAT1L) */
-#define mtibat2u(x) mtspr 532,(x) /* SPR 532 (IBAT2U) */
-#define mtibat2l(x) mtspr 533,(x) /* SPR 533 (IBAT2L) */
-#define mtibat3u(x) mtspr 534,(x) /* SPR 534 (IBAT3U) */
-#define mtibat3l(x) mtspr 535,(x) /* SPR 535 (IBAT3L) */
-#define mtdbat0u(x) mtspr 536,(x) /* SPR 536 (DBAT0U) */
-#define mtdbat0l(x) mtspr 537,(x) /* SPR 537 (DBAT0L) */
-#define mtdbat1u(x) mtspr 538,(x) /* SPR 538 (DBAT1U) */
-#define mtdbat1l(x) mtspr 539,(x) /* SPR 539 (DBAT1L) */
-#define mtdbat2u(x) mtspr 540,(x) /* SPR 540 (DBAT2U) */
-#define mtdbat2l(x) mtspr 541,(x) /* SPR 541 (DBAT2L) */
-#define mtdbat3u(x) mtspr 542,(x) /* SPR 542 (DBAT3U) */
-#define mtdbat3l(x) mtspr 543,(x) /* SPR 543 (DBAT3L) */
-
-
-/* PowerPC processors do not necessarily initialize the BAT
- registers on power-up or reset. So they are in an unknown
- state. Before programming the BATs for the first time, all
- BAT registers MUST have their Vs and Vp bits cleared in the
- upper BAT half in order to avoid possibly having 2 BATs
- valid and mapping the same memory region.
-
- The reason for this is that, even with address translation
- disabled, multiple BAT hits for an address are treated as
- programming errors and can cause unpredictable results.
-
- It is up to the software to make sure it never has 2 IBAT
- mappings or 2 DBAT mappings that are valid for the same
- addresses. It is not necessary to perform this code
- sequence every time the BATs are programmed, only when
- there is a possibility that there may be overlapping BAT
- entries.
-
- When programming the BATs in non-reset scenarios, even if
- you are sure that your new mapping will not temporarily
- create overlapping regions, it is still a wise idea to
- invalidate a BAT entry by setting its upper BAT register to
- all 0's before programming it. This will avoid having a
- BAT marked valid that is in an unknown or transient state
-*/
-
- addis r5,0,0x0000
- mtibat0u(r5)
- mtibat0l(r5)
- mtibat1u(r5)
- mtibat1l(r5)
- mtibat2u(r5)
- mtibat2l(r5)
- mtibat3u(r5)
- mtibat3l(r5)
- mtdbat0u(r5)
- mtdbat0l(r5)
- mtdbat1u(r5)
- mtdbat1l(r5)
- mtdbat2u(r5)
- mtdbat2l(r5)
- mtdbat3u(r5)
- mtdbat3l(r5)
- isync
-
-/*
- * Set up I/D BAT0
- */
- lis r4, CFG_DBAT0L@h
- ori r4, r4, CFG_DBAT0L@l
- lis r3, CFG_DBAT0U@h
- ori r3, r3, CFG_DBAT0U@l
-
- mtdbat0l(r4)
- isync
- mtdbat0u(r3)
- isync
- sync
-
- lis r4, CFG_IBAT0L@h
- ori r4, r4, CFG_IBAT0L@l
- lis r3, CFG_IBAT0U@h
- ori r3, r3, CFG_IBAT0U@l
-
- isync
- mtibat0l(r4)
- isync
- mtibat0u(r3)
- isync
-
-/*
- * Set up I/D BAT1
- */
- lis r4, CFG_IBAT1L@h
- ori r4, r4, CFG_IBAT1L@l
- lis r3, CFG_IBAT1U@h
- ori r3, r3, CFG_IBAT1U@l
-
- isync
- mtibat1l(r4)
- isync
- mtibat1u(r3)
- isync
- mtdbat1l(r4)
- isync
- mtdbat1u(r3)
- isync
- sync
-
-/*
- * Set up I/D BAT2
- */
- lis r4, CFG_IBAT2L@h
- ori r4, r4, CFG_IBAT2L@l
- lis r3, CFG_IBAT2U@h
- ori r3, r3, CFG_IBAT2U@l
-
- isync
- mtibat2l(r4)
- isync
- mtibat2u(r3)
- isync
- mtdbat2l(r4)
- isync
- mtdbat2u(r3)
- isync
- sync
-
-/*
- * Setup I/D BAT3
- */
- lis r4, CFG_IBAT3L@h
- ori r4, r4, CFG_IBAT3L@l
- lis r3, CFG_IBAT3U@h
- ori r3, r3, CFG_IBAT3U@l
-
- isync
- mtibat3l(r4)
- isync
- mtibat3u(r3)
- isync
- mtdbat3l(r4)
- isync
- mtdbat3u(r3)
- isync
- sync
-
-
-/*
- * Invalidate all 64 TLB's
- */
- lis r3, 0
- mtctr r3
- lis r5, 4
-
-tlblp:
- tlbie r3
- sync
- addi r3, r3, 0x1000
- cmplw r3, r5
- blt tlblp
-
- sync
-
-/*
- * Enable Data Translation
- */
- lis r4, MEMORY_MGMT_MSR_BITS@h
- ori r4, r4, MEMORY_MGMT_MSR_BITS@l
- mfmsr r3
- or r3, r4, r3
- mtmsr r3
- isync
- sync
-
- blr
-
-
-#ifdef USE_V2_INIT
-/* #define USER_I_CACHE_ENABLE 1*/ /* Fast rom boots */
-/* Macro for hiadjust and lo */
-#define HIADJ(arg) arg@ha
-#define HI(arg) arg@h
-#define LO(arg) arg@l
-
-#undef LOADPTR
-#define LOADPTR(reg,const32) \
- addis reg,r0,HIADJ(const32); addi reg,reg,LO(const32)
-
-.globl early_init_f
-
-early_init_f:
-/* MPC8245/BMW CPCI System Init
- * Jimmy Blair, Broadcom Corp, 2002.
- */
- mflr r11
- /* Zero-out registers */
-
- addis r0,r0,0
- mtspr SPRG0,r0
- mtspr SPRG1,r0
- mtspr SPRG2,r0
- mtspr SPRG3,r0
-
- /* Set MPU/MSR to a known state. Turn on FP */
-
- LOADPTR (r3, MSR_FP)
- sync
- mtmsr r3
- isync
-
- /* Init the floating point control/status register */
-
- mtfsfi 7,0x0
- mtfsfi 6,0x0
- mtfsfi 5,0x0
- mtfsfi 4,0x0
- mtfsfi 3,0x0
- mtfsfi 2,0x0
- mtfsfi 1,0x0
- mtfsfi 0,0x0
- isync
-
- /* Set MPU/MSR to a known state. Turn off FP */
-
-#if 1 /* Turn off floating point (remove to keep FP on) */
- andi. r3, r3, 0
- sync
- mtmsr r3
- isync
-#endif
-
- /* Init the Segment registers */
-
- andi. r3, r3, 0
- isync
- mtsr 0,r3
- isync
- mtsr 1,r3
- isync
- mtsr 2,r3
- isync
- mtsr 3,r3
- isync
- mtsr 4,r3
- isync
- mtsr 5,r3
- isync
- mtsr 6,r3
- isync
- mtsr 7,r3
- isync
- mtsr 8,r3
- isync
- mtsr 9,r3
- isync
- mtsr 10,r3
- isync
- mtsr 11,r3
- isync
- mtsr 12,r3
- isync
- mtsr 13,r3
- isync
- mtsr 14,r3
- isync
- mtsr 15,r3
- isync
-
- /* Turn off data and instruction cache control bits */
-
- mfspr r3, HID0
- isync
- rlwinm r4, r3, 0, 18, 15 /* r4 has ICE and DCE bits cleared */
- sync
- isync
- mtspr HID0, r4 /* HID0 = r4 */
- isync
-
- /* Get cpu type */
-
- mfspr r28, PVR
- rlwinm r28, r28, 16, 16, 31
-
- /* invalidate the MPU's data/instruction caches */
-
- lis r3, 0x0
- cmpli 0, 0, r28, CPU_TYPE_603
- beq cpuIs603
- cmpli 0, 0, r28, CPU_TYPE_603E
- beq cpuIs603
- cmpli 0, 0, r28, CPU_TYPE_603P
- beq cpuIs603
- cmpli 0, 0, r28, CPU_TYPE_604R
- bne cpuNot604R
-
-cpuIs604R:
- lis r3, 0x0
- mtspr HID0, r3 /* disable the caches */
- isync
- ori r4, r4, 0x0002 /* disable BTAC by setting bit 30 */
-
-cpuNot604R:
- ori r3, r3, (HID0_ICFI |HID0_DCI)
-
-cpuIs603:
- ori r3, r3, (HID0_ICE | HID0_DCE)
- or r4, r4, r3 /* set bits */
- sync
- isync
- mtspr HID0, r4 /* HID0 = r4 */
- andc r4, r4, r3 /* clear bits */
- isync
- cmpli 0, 0, r28, CPU_TYPE_604
- beq cpuIs604
- cmpli 0, 0, r28, CPU_TYPE_604E
- beq cpuIs604
- cmpli 0, 0, r28, CPU_TYPE_604R
- beq cpuIs604
- mtspr HID0, r4
- isync
-
-#ifdef USER_I_CACHE_ENABLE
- b instCacheOn603
-#else
- b cacheEnableDone
-#endif
-
-cpuIs604:
- LOADPTR (r5, 0x1000) /* loop count, 0x1000 */
- mtspr CTR, r5
-loopDelay:
- nop
- bdnz loopDelay
- isync
- mtspr HID0, r4
- isync
-
- /* turn the Instruction cache ON for faster FLASH ROM boots */
-
-#ifdef USER_I_CACHE_ENABLE
-
- ori r4, r4, (HID0_ICE | HID0_ICFI)
- isync /* Synchronize for ICE enable */
- b writeReg4
-instCacheOn603:
- ori r4, r4, (HID0_ICE | HID0_ICFI)
- rlwinm r3, r4, 0, 21, 19 /* clear the ICFI bit */
-
- /*
- * The setting of the instruction cache enable (ICE) bit must be
- * preceded by an isync instruction to prevent the cache from being
- * enabled or disabled while an instruction access is in progress.
- */
- isync
-writeReg4:
- mtspr HID0, r4 /* Enable Instr Cache & Inval cache */
- cmpli 0, 0, r28, CPU_TYPE_604
- beq cacheEnableDone
- cmpli 0, 0, r28, CPU_TYPE_604E
- beq cacheEnableDone
-
- mtspr HID0, r3 /* using 2 consec instructions */
- /* PPC603 recommendation */
-#endif
-cacheEnableDone:
-
- /* Detect map A or B */
-
- addis r5,r0, HI(CHRP_REG_ADDR)
- addis r6,r0, HI(CHRP_REG_DATA)
- LOADPTR (r7, KAHLUA_ID) /* Kahlua PCI controller ID */
- LOADPTR (r8, BMC_BASE)
-
- stwbrx r8,0,(r5)
- lwbrx r3,0,(r6) /* Store read value to r3 */
- cmp 0,0,r3,r7
- beq cr0, X4_KAHLUA_START
-
- /* It's not an 8240, is it an 8245? */
-
- LOADPTR (r7, KAHLUA2_ID) /* Kahlua PCI controller ID */
- cmp 0,0,r3,r7
- beq cr0, X4_KAHLUA_START
-
- /* Save the PCI controller type in r7 */
- mr r7, r3
-
- LOADPTR (r5, PREP_REG_ADDR)
- LOADPTR (r6, PREP_REG_DATA)
-
-X4_KAHLUA_START:
- /* MPC8245 changes begin here */
- LOADPTR (r3, MPC107_PCI_CMD) /* PCI command reg */
- stwbrx r3,0,r5
- li r4, 6 /* Command register value */
- sthbrx r4, 0, r6
-
- LOADPTR (r3, MPC107_PCI_STAT) /* PCI status reg */
- stwbrx r3,0,r5
- li r4, -1 /* Write-to-clear all bits */
- li r3, 2 /* PCI_STATUS is at +2 offset */
- sthbrx r4, r3, r6
-
- /*-------PROC_INT1_ADR */
-
- LOADPTR (r3, PROC_INT1_ADR) /* Processor I/F Config 1 reg. */
- stwbrx r3,0,r5
- LOADPTR (r4, 0xff141b98)
- stwbrx r4,0,r6
-
- /*-------PROC_INT2_ADR */
-
- LOADPTR (r3, PROC_INT2_ADR) /* Processor I/F Config 2 reg. */
- stwbrx r3,0,r5
- lis r4, 0x2000 /* Flush PCI config writes */
- stwbrx r4,0,r6
-
- LOADPTR (r9, KAHLUA2_ID)
- cmpl 0, 0, r7, r9
- bne L1not8245
-
- /* MIOCR1 -- turn on bit for DLL delay */
-
- LOADPTR (r3, MIOCR1_ADR_X)
- stwbrx r3,0,r5
- li r4, 0x04
- stb r4, MIOCR1_SHIFT(r6)
-
- /* For the MPC8245, set register 77 to %00100000 (see Errata #15) */
- /* SDRAM_CLK_DEL (0x77)*/
-
- LOADPTR (r3, MIOCR2_ADR_X)
- stwbrx r3,0,r5
- li r4, 0x10
- stb r4, MIOCR2_SHIFT(r6)
-
- /* PMCR2 -- set PCI hold delay to <10>b for 33 MHz */
-
- LOADPTR (r3, PMCR2_ADR_X)
- stwbrx r3,0,r5
- li r4, 0x20
- stb r4, PMCR2_SHIFT(r6)
-
- /* Initialize EUMBBAR early since 8245 has internal UART in EUMB */
-
- LOADPTR (r3, EUMBBAR)
- stwbrx r3,0,r5
- LOADPTR (r4, CFG_EUMB_ADDR)
- stwbrx r4,0,r6
-
-L1not8245:
-
- /* Toggle the DLL reset bit in AMBOR */
-
- LOADPTR (r3, AMBOR)
- stwbrx r3,0,r5
- lbz r4, 0(r6)
-
- andi. r4, r4, 0xdf
- stb r4, 0(r6) /* Clear DLL_RESET */
- sync
-
- ori r4, r4, 0x20 /* Set DLL_RESET */
- stb r4, 0(r6)
- sync
-
- andi. r4, r4, 0xdf
- stb r4, 0(r6) /* Clear DLL_RESET */
-
-
- /* Enable RCS2, use supplied timings */
- LOADPTR (r3, ERCR1)
- stwbrx r3,0,r5
- LOADPTR (r4, 0x80408000)
- stwbrx r4,0,r6
-
- /* Disable RCS3 parameters */
- LOADPTR (r3, ERCR2)
- stwbrx r3,0,r5
- LOADPTR (r4, 0x00000000)
- stwbrx r4,0,r6
-
- /* RCS3 at 0x70000000, 64KBytes */
- LOADPTR (r3, ERCR2)
- stwbrx r3,0,r5
- LOADPTR (r4, 0x00000004)
- stwbrx r4,0,r6
-
- /*-------MCCR1 */
-
-#ifdef INCLUDE_ECC
-#define MC_ECC 1
-#else /* INCLUDE_ECC */
-#define MC_ECC 0
-#endif /* INCLUDE_ECC */
-
-#define MC1_ROMNAL 8 /* 0-15 */
-#define MC1_ROMFAL 11 /* 0-31 */
-#define MC1_DBUS_SIZE 0 /* 0-3, read only */
-#define MC1_BURST 0 /* 0-1 */
-#define MC1_MEMGO 0 /* 0-1 */
-#define MC1_SREN 1 /* 0-1 */
-#define MC1_RAM_TYPE 0 /* 0-1 */
-#define MC1_PCKEN MC_ECC /* 0-1 */
-#define MC1_BANKBITS 0x5555 /* 2 bits/bank 7-0 */
-
- LOADPTR (r3, MEM_CONT1_ADR) /* Set MCCR1 (F0) */
- stwbrx r3,0,r5
- LOADPTR(r4, \
- MC1_ROMNAL << 28 | MC1_ROMFAL << 23 | \
- MC1_DBUS_SIZE << 21 | MC1_BURST << 20 | \
- MC1_MEMGO << 19 | MC1_SREN << 18 | \
- MC1_RAM_TYPE << 17 | MC1_PCKEN << 16 )
- li r3, MC1_BANKBITS
- cmpl 0, 0, r7, r9 /* Check for Kahlua2 */
- bne BankBitsAdd
- cmpli 0, 0, r3, 0x5555
- beq K2BankBitsHack /* On 8245, 5555 ==> 0 */
-BankBitsAdd:
- ori r4, r3, 0
-K2BankBitsHack:
- stwbrx r4, 0, r6
-
- /*------- MCCR2 */
-
-#define MC2_TS_WAIT_TIMER 0 /* 0-7 */
-#define MC2_ASRISE 8 /* 0-15 */
-#define MC2_ASFALL 4 /* 0-15 */
-#define MC2_INLINE_PAR_NOT_ECC 0 /* 0-1 */
-#define MC2_WRITE_PARITY_CHK_EN MC_ECC /* 0-1 */
-#define MC2_INLRD_PARECC_CHK_EN MC_ECC /* 0-1 */
-#define MC2_ECC_EN 0 /* 0-1 */
-#define MC2_EDO 0 /* 0-1 */
-/*
-* N.B. This refresh interval looks good up to 85 MHz with Hynix SDRAM.
-* May need to be decreased for 100 MHz
-*/
-#define MC2_REFINT 0x3a5 /* 0-0x3fff */
-#define MC2_RSV_PG 0 /* 0-1 */
-#define MC2_RMW_PAR MC_ECC /* 0-1 */
-
- LOADPTR (r3, MEM_CONT2_ADR) /* Set MCCR2 (F4) */
- stwbrx r3,0,r5
- LOADPTR(r4, \
- MC2_TS_WAIT_TIMER << 29 | MC2_ASRISE << 25 | \
- MC2_ASFALL << 21 | MC2_INLINE_PAR_NOT_ECC << 20 | \
- MC2_WRITE_PARITY_CHK_EN << 19 | \
- MC2_INLRD_PARECC_CHK_EN << 18 | \
- MC2_ECC_EN << 17 | MC2_EDO << 16 | \
- MC2_REFINT << 2 | MC2_RSV_PG << 1 | MC2_RMW_PAR)
- cmpl 0, 0, r7, r9 /* Check for Kahlua2 */
- bne notK2
- /* clear Kahlua2 reserved bits */
- LOADPTR (r3, 0xfffcffff)
- and r4, r4, r3
-notK2:
- stwbrx r4,0,r6
-
- /*------- MCCR3 */
-
-#define MC_BSTOPRE 0x079 /* 0-0x7ff */
-
-#define MC3_BSTOPRE_U (MC_BSTOPRE >> 4 & 0xf)
-#define MC3_REFREC 8 /* 0-15 */
-#define MC3_RDLAT (4+MC_ECC) /* 0-15 */
-#define MC3_CPX 0 /* 0-1 */
-#define MC3_RAS6P 0 /* 0-15 */
-#define MC3_CAS5 0 /* 0-7 */
-#define MC3_CP4 0 /* 0-7 */
-#define MC3_CAS3 0 /* 0-7 */
-#define MC3_RCD2 0 /* 0-7 */
-#define MC3_RP1 0 /* 0-7 */
-
- LOADPTR (r3, MEM_CONT3_ADR) /* Set MCCR3 (F8) */
- stwbrx r3,0,r5
- LOADPTR(r4, \
- MC3_BSTOPRE_U << 28 | MC3_REFREC << 24 | \
- MC3_RDLAT << 20 | MC3_CPX << 19 | \
- MC3_RAS6P << 15 | MC3_CAS5 << 12 | MC3_CP4 << 9 | \
- MC3_CAS3 << 6 | MC3_RCD2 << 3 | MC3_RP1)
- cmpl 0, 0, r7, r9 /* Check for Kahlua2 */
- bne notK2b
- /* clear Kahlua2 reserved bits */
- LOADPTR (r3, 0xff000000)
- and r4, r4, r3
-notK2b:
- stwbrx r4,0,r6
-
- /*------- MCCR4 */
-
-#define MC4_PRETOACT 3 /* 0-15 */
-#define MC4_ACTOPRE 5 /* 0-15 */
-#define MC4_WMODE 0 /* 0-1 */
-#define MC4_INLINE MC_ECC /* 0-1 */
-#define MC4_REGISTERED (1-MC_ECC) /* 0-1 */
-#define MC4_BSTOPRE_UU (MC_BSTOPRE >> 8 & 3)
-#define MC4_REGDIMM 0 /* 0-1 */
-#define MC4_SDMODE_CAS 2 /* 0-7 */
-#define MC4_DBUS_RCS1 1 /* 0-1, 8-bit */
-#define MC4_SDMODE_WRAP 0 /* 0-1 */
-#define MC4_SDMODE_BURST 2 /* 0-7 */
-#define MC4_ACTORW 3 /* 0-15 */
-#define MC4_BSTOPRE_L (MC_BSTOPRE & 0xf)
-
- LOADPTR (r3, MEM_CONT4_ADR) /* Set MCCR4 (FC) */
- stwbrx r3,0,r5
- LOADPTR(r4, \
- MC4_PRETOACT << 28 | MC4_ACTOPRE << 24 | \
- MC4_WMODE << 23 | MC4_INLINE << 22 | \
- MC4_REGISTERED << 20 | MC4_BSTOPRE_UU << 18 | \
- MC4_DBUS_RCS1 << 17 | \
- MC4_REGDIMM << 15 | MC4_SDMODE_CAS << 12 | \
- MC4_SDMODE_WRAP << 11 | MC4_SDMODE_BURST << 8 | \
- MC4_ACTORW << 4 | MC4_BSTOPRE_L)
- cmpl 0, 0, r7, r9 /* Check for Kahlua 2 */
- bne notK2c
- /* Turn on Kahlua2 extended ROM space */
- LOADPTR (r3, 0x00200000)
- or r4, r4, r3
-notK2c:
- stwbrx r4,0,r6
-
-#ifdef INCLUDE_ECC
- /*------- MEM_ERREN1 */
-
- LOADPTR (r3, MEM_ERREN1_ADR) /* Set MEM_ERREN1 (c0) */
- stwbrx r3,0,r5
- lwbrx r4,0,r6
- ori r4,r4,4 /* Set MEM_PERR_EN */
- stwbrx r4,0,r6
-#endif /* INCLUDE_ECC */
-
- /*------- MSAR/MEAR */
-
- LOADPTR (r3, MEM_START1_ADR) /* Set MSAR1 (80) */
- stwbrx r3,0,r5
- LOADPTR (r4, 0xc0804000)
- stwbrx r4,0,r6
-
- LOADPTR (r3, MEM_START2_ADR) /* Set MSAR2 (84) */
- stwbrx r3,0,r5
- LOADPTR (r4, 0xc0804000)
- stwbrx r4,0,r6
-
- LOADPTR (r3, XMEM_START1_ADR) /* Set MESAR1 (88) */
- stwbrx r3,0,r5
- LOADPTR (r4, 0x00000000)
- stwbrx r4,0,r6
-
- LOADPTR (r3, XMEM_START2_ADR) /* Set MESAR2 (8c) */
- stwbrx r3,0,r5
- LOADPTR (r4, 0x01010101)
- stwbrx r4,0,r6
-
- LOADPTR (r3, MEM_END1_ADR) /* Set MEAR1 (90) */
- stwbrx r3,0,r5
- LOADPTR (r4, 0xffbf7f3f)
- stwbrx r4,0,r6
-
- LOADPTR (r3, MEM_END2_ADR) /* Set MEAR2 (94) */
- stwbrx r3,0,r5
- LOADPTR (r4, 0xffbf7f3f)
- stwbrx r4,0,r6
-
- LOADPTR (r3, XMEM_END1_ADR) /* MEEAR1 (98) */
- stwbrx r3,0,r5
- LOADPTR (r4, 0x00000000)
- stwbrx r4,0,r6
-
- LOADPTR (r3, XMEM_END2_ADR) /* MEEAR2 (9c) */
- stwbrx r3,0,r5
- LOADPTR (r4, 0x01010101)
- stwbrx r4,0,r6
-
- /*-------ODCR */
-
- LOADPTR (r3, ODCR_ADR_X) /* Set ODCR */
- stwbrx r3,0,r5
-
- li r4, 0x7f
- stb r4, ODCR_SHIFT(r6) /* ODCR is at +3 offset */
-
- /*-------MBEN */
-
- LOADPTR (r3, MEM_EN_ADR) /* Set MBEN (a0) */
- stwbrx r3,0,r5
- li r4, 0x01 /* Enable bank 0 */
- stb r4, 0(r6) /* MBEN is at +0 offset */
-
-#if 0 /* Jimmy: I think page made is broken */
- /*-------PGMAX */
-
- LOADPTR (r3, MPM_ADR_X)
- stwbrx r3,0,r5
- li r4, 0x32
- stb r4, MPM_SHIFT(r6) /* PAGE_MODE is at +3 offset */
-#endif
-
- /* Wait before initializing other registers */
-
- lis r4,0x0001
- mtctr r4
-
-KahluaX4wait200us:
- bdnz KahluaX4wait200us
-
- /* Set MEMGO bit */
-
- LOADPTR (r3, MEM_CONT1_ADR) /* MCCR1 (F0) |= PGMAX */
- stwbrx r3,0,r5
- lwbrx r4,0,r6 /* old MCCR1 */
- oris r4,r4,0x0008 /* MEMGO=1 */
- stwbrx r4, 0, r6
-
- /* Wait again */
-
- addis r4,r0,0x0002
- ori r4,r4,0xffff
-
- mtctr r4
-
-KahluaX4wait8ref:
- bdnz KahluaX4wait8ref
-
- sync
- eieio
- mtlr r11
- blr
-
-#else /* USE_V2_INIT */
-
-
-/* U-Boot works, but memory will not run reliably for all address ranges.
- * Early U-Boot Working init, but 2.4.19 kernel will crash since memory is not
- * initialized correctly. Could work if debugged.
- */
-/* PCI Support routines */
-
- .globl __pci_config_read_32
-__pci_config_read_32:
- lis r4, 0xfec0
- stwbrx r3, r0, r4
- sync
- lis r4, 0xfee0
- lwbrx r3, 0, r4
- blr
- .globl __pci_config_read_16
-__pci_config_read_16:
- lis r4, 0xfec0
- andi. r5, r3, 2
- stwbrx r3, r0, r4
- sync
- oris r4, r5, 0xfee0
- lhbrx r3, r0, r4
- blr
- .globl __pci_config_read_8
-__pci_config_read_8:
- lis r4, 0xfec0
- andi. r5, r3, 3
- stwbrx r3, r0, r4
- sync
- oris r4, r5, 0xfee0
- lbz r3, 0(4)
- blr
- .globl __pci_config_write_32
-__pci_config_write_32:
- lis r5, 0xfec0
- stwbrx r3, r0, r5
- sync
- lis r5, 0xfee0
- stwbrx r4, r0, r5
- sync
- blr
- .globl __pci_config_write_16
-__pci_config_write_16:
- lis r5, 0xfec0
- andi. r6, r3, 2
- stwbrx r3, r0, 5
- sync
- oris r5, r6, 0xfee0
- sthbrx r4, r0, r5
- sync
- blr
- .globl __pci_config_write_8
-__pci_config_write_8:
- lis r5, 0xfec0
- andi. r6, r3, 3
- stwbrx r3, r0, r5
- sync
- oris r5, r6, 0xfee0
- stb r4, 0(r5)
- sync
- blr
- .globl in_8
-in_8:
- oris r3, r3, 0xfe00
- lbz r3,0(r3)
- blr
- .globl in_16
-in_16:
- oris r3, r3, 0xfe00
- lhbrx r3, 0, r3
- blr
- .globl in_16_ne
-in_16_ne:
- oris r3, r3, 0xfe00
- lhzx r3, 0, r3
- blr
- .globl in_32
-in_32:
- oris r3, r3, 0xfe00
- lwbrx r3, 0, r3
- blr
- .globl out_8
-out_8:
- oris r3, r3, 0xfe00
- stb r4, 0(r3)
- eieio
- blr
- .globl out_16
-out_16:
- oris r3, r3, 0xfe00
- sthbrx r4, 0, r3
- eieio
- blr
- .globl out_16_ne
-out_16_ne:
- oris r3, r3, 0xfe00
- sth r4, 0(r3)
- eieio
- blr
- .globl out_32
-out_32:
- oris r3, r3, 0xfe00
- stwbrx r4, 0, r3
- eieio
- blr
- .globl read_8
-read_8:
- lbz r3,0(r3)
- blr
- .globl read_16
-read_16:
- lhbrx r3, 0, r3
- blr
- .globl read_32
-read_32:
- lwbrx r3, 0, r3
- blr
- .globl read_32_ne
-read_32_ne:
- lwz r3, 0(r3)
- blr
- .globl write_8
-write_8:
- stb r4, 0(r3)
- eieio
- blr
- .globl write_16
-write_16:
- sthbrx r4, 0, r3
- eieio
- blr
- .globl write_32
-write_32:
- stwbrx r4, 0, r3
- eieio
- blr
- .globl write_32_ne
-write_32_ne:
- stw r4, 0(r3)
- eieio
- blr
-
-
-.globl early_init_f
-
-early_init_f:
- mflr r11
- lis r10, 0x8000
-
- /* PCI Latency Timer */
- li r4, 0x0d
- ori r3, r10, PLTR@l
- bl __pci_config_write_8
-
- /* Cache Line Size */
- li r4, 0x08
- ori r3, r10, PCLSR@l
- bl __pci_config_write_8
-
- /* PCI Cmd */
- li r4, 6
- ori r3, r10, PCICR@l
- bl __pci_config_write_16
-
-#if 1
- /* PCI Stat */
- ori r3, r10, PCISR@l
- bl __pci_config_read_16
- ori r4, r4, 0xffff
- ori r3, r10, PCISR@l
- bl __pci_config_write_16
-#endif
-
- /* PICR1 */
- lis r4, 0xff14
- ori r4, r4, 0x1b98
- ori r3, r10, PICR1@l
- bl __pci_config_write_32
-
-
- /* PICR2 */
- lis r4, 0x0404
- ori r4, r4, 0x0004
- ori r3, r10, PICR2@l
- bl __pci_config_write_32
-
- /* MIOCR1 */
- li r4, 0x04
- ori r3, r10, MIOCR1@l
- bl __pci_config_write_8
-
- /* For the MPC8245, set register 77 to %00100000 (see Errata #15) */
- /* SDRAM_CLK_DEL (0x77)*/
- li r4, 0x10
- ori r3, r10, MIOCR2@l
- bl __pci_config_write_8
-
- /* EUMBBAR */
- lis r4, 0xfc00
- ori r3, r10, EUMBBAR@l
- bl __pci_config_write_32
-
- /* AMBOR */
-
- /* Even if Address Map B is not being used (though it should),
- * the memory DLL needs to be cleared/set/cleared before using memory.
- */
-
- ori r3, r10, AMBOR@l
- bl __pci_config_read_8 /* get Current bits */
-
- andi. r4, r4, 0xffdf
- ori r3, r10, AMBOR@l
- bl __pci_config_write_16 /* Clear DLL_RESET */
-
- ori r4, r4, 0x0020
- ori r3, r10, AMBOR@l
- bl __pci_config_write_16 /* Set DLL_RESET */
-
- andi. r4, r4, 0xffdf
- ori r3, r10, AMBOR@l
- bl __pci_config_write_16 /* Clear DLL_RESET */
-
- /* ERCR1 */
- lis r4, 0x8040 /* Enable RCS2, use supplied timings */
- ori r4, r4, 0x8000
- ori r3, r10, ERCR1@l
- bl __pci_config_write_32
-
- /* ERCR2 */
- lis r4, 0x0000 /* Disable RCS3 parms */
- ori r4, r4, 0x0000
- ori r3, r10, ERCR2@l
- bl __pci_config_write_32
-
- /* ERCR3 */
- lis r4, 0x0000 /* RCS3 at 0x70000000, 64K bytes */
- ori r4, r4, 0x0004
- ori r3, r10, ERCR2@l
- bl __pci_config_write_32
-
- /* Preserve memgo bit */
- /* MCCR1 */
-
-/* lis r4, 0x75a8 / Safe Local ROM = 11+3 clocks */
- lis r4, 0x75a0 /* Safe Local ROM = 11+3 clocks */
-/* lis r4, 0x73a0 / Fast Local ROM = 7+3 clocks */
-/* oris r4, r4, 0x0010 / Burst ROM/Flash enable */
-/* oris r4, r4, 0x0004 / Self-refresh enable */
-
-/* ori r4,r4,0xFFFF / 16Mbit 2bank SDRAM */
-/* ori r4,r4,0xAAAA / 256Mbit 4bank SDRAM (8245 only) */
-/* ori r4,r4,0x5555 / 64Mbit 2bank SDRAM */
- ori r4,r4,0x0000 /* 64Mbit 4bank SDRAM */
-
- ori r3, r10, MCCR1@l
- bl __pci_config_write_32
-
- /* MCCR2 */
-
- lis r4,0x0000
-/* oris r4,r4,0x4000 / TS_WAIT_TIMER = 3 clocks */
- oris r4,r4,0x1000 /* ASRISE = 8 clocks */
- oris r4,r4,0x0080 /* ASFALL = 8 clocks */
-/* oris r4,r4,0x0010 / SDRAM Parity (else ECC) */
-/* oris r4,r4,0x0008 / Write parity check */
-/* oris r4,r4,0x0004 / SDRAM inline reads */
-
-
-/* Select a refresh rate; it needs to match the bus speed; if too */
-/* slow, data may be lost; if too fast, performance is lost. We */
-/* use the fastest value so we run at all speeds. */
-/* Refresh = (15600ns/busclk) - (213 (see UM)). */
-
-/* ori r4,r4,0x1d2c / 133 MHz mem bus = 1867 */
-/* ori r4,r4,0x150c / 100 MHz mem bus = 1347 */
-/* ori r4,r4,0x10fc / 83 MHz mem bus = 1087 */
-/* ori r4,r4,0x0cc4 / 66 MHz mem bus = 817 */
- ori r4,r4,0x04cc /* 33 MHz mem bus (SAFE) = 307 */
-/* ori r4,r4,0x0002 / Reserve a page */
-/* ori r4,r4,0x0001 / RWM parity */
-
- ori r3, r10, MCCR2@l
- bl __pci_config_write_32
-
-
- /* MCCR3 */
- lis r4,0x0000 /* BSTOPRE_M = 7 (see A/N) */
- oris r4,r4,0x0500 /* REFREC = 8 clocks */
- ori r3, r10, MCCR3@l
- bl __pci_config_write_32
-
- /* MCCR4 */ /* Turn on registered buffer mode */
- lis r4, 0x2000 /* PRETOACT = 3 clocks */
- oris r4,r4,0x0400 /* ACTOPRE = 5 clocks */
-/* oris r4,r4,0x0080 / Enable 8-beat burst (32-bit bus) */
-/* oris r4,r4,0x0040 / Enable Inline ECC/Parity */
- oris r4,r4,0x0020 /* EXTROM enabled */
- oris r4,r4,0x0010 /* Registered buffers */
-/* oris r4,r4,0x0000 / BSTOPRE_U = 0 (see A/N) */
- oris r4,r4,0x0002 /* DBUS_SIZ[2] (8 bit on RCS1) */
-
-/* ori r4,r4,0x8000 / Registered DIMMs */
- ori r4,r4,0x2000 /*CAS Latency (CL=3) (see RDLAT) */
-/* ori r4,r4,0x2000 / CAS Latency (CL=2) (see RDLAT) */
-/* ori r4,r4,0x0300 / Sequential wrap/8-beat burst */
- ori r4,r4,0x0200 /* Sequential wrap/4-beat burst */
- ori r4,r4,0x0030 /* ACTORW = 3 clocks */
- ori r4,r4,0x0009 /* BSTOPRE_L = 9 (see A/N) */
-
- ori r3, r10, MCCR4@l
- bl __pci_config_write_32
-
- /* MSAR1 */
- lis r4, 0xc0804000@h
- ori r4, r4, 0xc0804000@l
- ori r3, r10, MSAR1@l
- bl __pci_config_write_32
-
- /* MSAR2 */
- lis r4, 0xc0804000@h
- ori r4, r4, 0xc0804000@l
- ori r3, r10, MSAR2@l
- bl __pci_config_write_32
-
- /* MESAR1 */
- lis r4, 0x00000000@h
- ori r4, r4, 0x00000000@l
- ori r3, r10, EMSAR1@l
- bl __pci_config_write_32
-
- /* MESAR2 */
- lis r4, 0x01010101@h
- ori r4, r4, 0x01010101@l
- ori r3, r10, EMSAR2@l
- bl __pci_config_write_32
-
- /* MEAR1 */
- lis r4, 0xffbf7f3f@h
- ori r4, r4, 0xffbf7f3f@l
- ori r3, r10, MEAR1@l
- bl __pci_config_write_32
-
- /* MEAR2 */
- lis r4, 0xffbf7f3f@h
- ori r4, r4, 0xffbf7f3f@l
- ori r3, r10, MEAR2@l
- bl __pci_config_write_32
-
- /* MEEAR1 */
- lis r4, 0x00000000@h
- ori r4, r4, 0x00000000@l
- ori r3, r10, EMEAR1@l
- bl __pci_config_write_32
-
- /* MEEAR2 */
- lis r4, 0x01010101@h
- ori r4, r4, 0x01010101@l
- ori r3, r10, EMEAR2@l
- bl __pci_config_write_32
-
- /* ODCR */
- li r4, 0x7f
- ori r3, r10, ODCR@l
- bl __pci_config_write_8
-
- /* MBER */
- li r4, 0x01
- ori r3, r10, MBER@l
- bl __pci_config_write_8
-
- /* Page CTR aka PGMAX */
- li r4, 0x32
- ori r3, r10, 0x70
- bl __pci_config_write_8
-
-#if 0
- /* CLK Drive */
- ori r4, r10, 0xfc01 /* Top bit will be ignored */
- ori r3, r10, 0x74
- bl __pci_config_write_16
-#endif
-
- /* delay */
- lis r7, 1
- mtctr r7
-label1: bdnz label1
-
- /* Set memgo bit */
- /* MCCR1 */
- ori r3, r10, MCCR1@l
- bl __pci_config_read_32
- lis r7, 0x0008
- or r4, r3, r7
- ori r3, r10, MCCR1@l
- bl __pci_config_write_32
-
- /* delay again */
- lis r7, 1
- mtctr r7
-label2: bdnz label2
-#if 0
-/* DEBUG: Infinite loop, write then read */
-loop:
- lis r7, 0xffff
- mtctr r7
- li r3, 0x5004
- lis r4, 0xa0a0
- ori r4, r4, 0x5050
- bl write_32_ne
- li r3, 0x5004
- bl read_32_ne
- bdnz loop
-#endif
- mtlr r11
- blr
-#endif
diff --git a/board/bmw/flash.c b/board/bmw/flash.c
deleted file mode 100644
index 7fba174f46..0000000000
--- a/board/bmw/flash.c
+++ /dev/null
@@ -1,779 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc824x.h>
-#include <asm/processor.h>
-#include <asm/pci_io.h>
-
-#define ROM_CS0_START 0xFF800000
-#define ROM_CS1_START 0xFF000000
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-#if defined(CFG_ENV_IS_IN_FLASH)
-# ifndef CFG_ENV_ADDR
-# define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_ENV_OFFSET)
-# endif
-# ifndef CFG_ENV_SIZE
-# define CFG_ENV_SIZE CFG_ENV_SECT_SIZE
-# endif
-# ifndef CFG_ENV_SECT_SIZE
-# define CFG_ENV_SECT_SIZE CFG_ENV_SIZE
-# endif
-#endif
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static int write_word (flash_info_t * info, ulong dest, ulong data);
-
-#if 0
-static void flash_get_offsets (ulong base, flash_info_t * info);
-#endif /* 0 */
-
-/*flash command address offsets*/
-
-#if 0
-#define ADDR0 (0x555)
-#define ADDR1 (0x2AA)
-#define ADDR3 (0x001)
-#else
-#define ADDR0 (0xAAA)
-#define ADDR1 (0x555)
-#define ADDR3 (0x001)
-#endif
-
-#define FLASH_WORD_SIZE unsigned char
-
-/*-----------------------------------------------------------------------
- */
-
-#if 0
-static int byte_parity_odd (unsigned char x) __attribute__ ((const));
-#endif /* 0 */
-static unsigned long flash_id (unsigned char mfct, unsigned char chip)
- __attribute__ ((const));
-
-typedef struct {
- FLASH_WORD_SIZE extval;
- unsigned short intval;
-} map_entry;
-
-#if 0
-static int byte_parity_odd (unsigned char x)
-{
- x ^= x >> 4;
- x ^= x >> 2;
- x ^= x >> 1;
- return (x & 0x1) != 0;
-}
-#endif /* 0 */
-
-
-static unsigned long flash_id (unsigned char mfct, unsigned char chip)
-{
- static const map_entry mfct_map[] = {
- {(FLASH_WORD_SIZE) AMD_MANUFACT,
- (unsigned short) ((unsigned long) FLASH_MAN_AMD >> 16)},
- {(FLASH_WORD_SIZE) FUJ_MANUFACT,
- (unsigned short) ((unsigned long) FLASH_MAN_FUJ >> 16)},
- {(FLASH_WORD_SIZE) STM_MANUFACT,
- (unsigned short) ((unsigned long) FLASH_MAN_STM >> 16)},
- {(FLASH_WORD_SIZE) MT_MANUFACT,
- (unsigned short) ((unsigned long) FLASH_MAN_MT >> 16)},
- {(FLASH_WORD_SIZE) INTEL_MANUFACT,
- (unsigned short) ((unsigned long) FLASH_MAN_INTEL >> 16)},
- {(FLASH_WORD_SIZE) INTEL_ALT_MANU,
- (unsigned short) ((unsigned long) FLASH_MAN_INTEL >> 16)}
- };
-
- static const map_entry chip_map[] = {
- {AMD_ID_F040B, FLASH_AM040},
- {(FLASH_WORD_SIZE) STM_ID_x800AB, FLASH_STM800AB}
- };
-
- const map_entry *p;
- unsigned long result = FLASH_UNKNOWN;
-
- /* find chip id */
- for (p = &chip_map[0];
- p < &chip_map[sizeof chip_map / sizeof chip_map[0]]; p++)
- if (p->extval == chip) {
- result = FLASH_VENDMASK | p->intval;
- break;
- }
-
- /* find vendor id */
- for (p = &mfct_map[0];
- p < &mfct_map[sizeof mfct_map / sizeof mfct_map[0]]; p++)
- if (p->extval == mfct) {
- result &= ~FLASH_VENDMASK;
- result |= (unsigned long) p->intval << 16;
- break;
- }
-
- return result;
-}
-
-
-unsigned long flash_init (void)
-{
- unsigned long i;
- unsigned char j;
- static const ulong flash_banks[] = CFG_FLASH_BANKS;
-
- /* Init: no FLASHes known */
- for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
- flash_info_t *const pflinfo = &flash_info[i];
-
- pflinfo->flash_id = FLASH_UNKNOWN;
- pflinfo->size = 0;
- pflinfo->sector_count = 0;
- }
-
- for (i = 0; i < sizeof flash_banks / sizeof flash_banks[0]; i++) {
- flash_info_t *const pflinfo = &flash_info[i];
- const unsigned long base_address = flash_banks[i];
- volatile FLASH_WORD_SIZE *const flash =
- (FLASH_WORD_SIZE *) base_address;
-#if 0
- volatile FLASH_WORD_SIZE *addr2;
-#endif
-#if 0
- /* write autoselect sequence */
- flash[0x5555] = 0xaa;
- flash[0x2aaa] = 0x55;
- flash[0x5555] = 0x90;
-#else
- flash[0xAAA << (3 * i)] = 0xaa;
- flash[0x555 << (3 * i)] = 0x55;
- flash[0xAAA << (3 * i)] = 0x90;
-#endif
- __asm__ __volatile__ ("sync");
-
-#if 0
- pflinfo->flash_id = flash_id (flash[0x0], flash[0x1]);
-#else
- pflinfo->flash_id =
- flash_id (flash[0x0], flash[0x2 + 14 * i]);
-#endif
-
- switch (pflinfo->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM040:
- pflinfo->size = 0x00080000;
- pflinfo->sector_count = 8;
- for (j = 0; j < 8; j++) {
- pflinfo->start[j] =
- base_address + 0x00010000 * j;
- pflinfo->protect[j] = flash[(j << 16) | 0x2];
- }
- break;
- case FLASH_STM800AB:
- pflinfo->size = 0x00100000;
- pflinfo->sector_count = 19;
- pflinfo->start[0] = base_address;
- pflinfo->start[1] = base_address + 0x4000;
- pflinfo->start[2] = base_address + 0x6000;
- pflinfo->start[3] = base_address + 0x8000;
- for (j = 1; j < 16; j++) {
- pflinfo->start[j + 3] =
- base_address + 0x00010000 * j;
- }
-#if 0
- /* check for protected sectors */
- for (j = 0; j < pflinfo->sector_count; j++) {
- /* read sector protection at sector address, (A7 .. A0) = 0x02 */
- /* D0 = 1 if protected */
- addr2 = (volatile FLASH_WORD_SIZE
- *) (pflinfo->start[j]);
- if (pflinfo->flash_id & FLASH_MAN_SST)
- pflinfo->protect[j] = 0;
- else
- pflinfo->protect[j] = addr2[2] & 1;
- }
-#endif
- break;
- }
- /* Protect monitor and environment sectors
- */
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
- flash_protect (FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE + monitor_flash_len - 1,
- &flash_info[0]);
-#endif
-
-#if (CFG_ENV_IS_IN_FLASH == 1) && defined(CFG_ENV_ADDR)
- flash_protect (FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1,
- &flash_info[0]);
-#endif
-
- /* reset device to read mode */
- flash[0x0000] = 0xf0;
- __asm__ __volatile__ ("sync");
- }
-
- return flash_info[0].size + flash_info[1].size;
-}
-
-#if 0
-static void flash_get_offsets (ulong base, flash_info_t * info)
-{
- int i;
-
- /* set up sector start address table */
- if (info->flash_id & FLASH_MAN_SST) {
- for (i = 0; i < info->sector_count; i++)
- info->start[i] = base + (i * 0x00010000);
- } else if (info->flash_id & FLASH_BTYPE) {
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00004000;
- info->start[2] = base + 0x00006000;
- info->start[3] = base + 0x00008000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00010000) - 0x00030000;
- }
- } else {
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- info->start[i--] = base + info->size - 0x00004000;
- info->start[i--] = base + info->size - 0x00006000;
- info->start[i--] = base + info->size - 0x00008000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00010000;
- }
- }
-
-}
-#endif /* 0 */
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t * info)
-{
- static const char unk[] = "Unknown";
- const char *mfct = unk, *type = unk;
- unsigned int i;
-
- if (info->flash_id != FLASH_UNKNOWN) {
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD:
- mfct = "AMD";
- break;
- case FLASH_MAN_FUJ:
- mfct = "FUJITSU";
- break;
- case FLASH_MAN_STM:
- mfct = "STM";
- break;
- case FLASH_MAN_SST:
- mfct = "SST";
- break;
- case FLASH_MAN_BM:
- mfct = "Bright Microelectonics";
- break;
- case FLASH_MAN_INTEL:
- mfct = "Intel";
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM040:
- type = "AM29F040B (512K * 8, uniform sector size)";
- break;
- case FLASH_AM400B:
- type = "AM29LV400B (4 Mbit, bottom boot sect)";
- break;
- case FLASH_AM400T:
- type = "AM29LV400T (4 Mbit, top boot sector)";
- break;
- case FLASH_AM800B:
- type = "AM29LV800B (8 Mbit, bottom boot sect)";
- break;
- case FLASH_AM800T:
- type = "AM29LV800T (8 Mbit, top boot sector)";
- break;
- case FLASH_AM160T:
- type = "AM29LV160T (16 Mbit, top boot sector)";
- break;
- case FLASH_AM320B:
- type = "AM29LV320B (32 Mbit, bottom boot sect)";
- break;
- case FLASH_AM320T:
- type = "AM29LV320T (32 Mbit, top boot sector)";
- break;
- case FLASH_STM800AB:
- type = "M29W800AB (8 Mbit, bottom boot sect)";
- break;
- case FLASH_SST800A:
- type = "SST39LF/VF800 (8 Mbit, uniform sector size)";
- break;
- case FLASH_SST160A:
- type = "SST39LF/VF160 (16 Mbit, uniform sector size)";
- break;
- }
- }
-
- printf ("\n Brand: %s Type: %s\n"
- " Size: %lu KB in %d Sectors\n",
- mfct, type, info->size >> 10, info->sector_count);
-
- printf (" Sector Start Addresses:");
-
- for (i = 0; i < info->sector_count; i++) {
- unsigned long size;
- unsigned int erased;
- unsigned long *flash = (unsigned long *) info->start[i];
-
- /*
- * Check if whole sector is erased
- */
- size = (i != (info->sector_count - 1)) ?
- (info->start[i + 1] - info->start[i]) >> 2 :
- (info->start[0] + info->size - info->start[i]) >> 2;
-
- for (flash = (unsigned long *) info->start[i], erased = 1;
- (flash != (unsigned long *) info->start[i] + size)
- && erased; flash++)
- erased = *flash == ~0x0UL;
-
- printf ("%s %08lX %s %s",
- (i % 5) ? "" : "\n ",
- info->start[i],
- erased ? "E" : " ", info->protect[i] ? "RO" : " ");
- }
-
- puts ("\n");
- return;
-}
-
-#if 0
-
-/*
- * The following code cannot be run from FLASH!
- */
-ulong flash_get_size (vu_long * addr, flash_info_t * info)
-{
- short i;
- FLASH_WORD_SIZE value;
- ulong base = (ulong) addr;
- volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *) addr;
-
- printf ("flash_get_size: \n");
- /* Write auto select command: read Manufacturer ID */
- eieio ();
- addr2[ADDR0] = (FLASH_WORD_SIZE) 0xAA;
- addr2[ADDR1] = (FLASH_WORD_SIZE) 0x55;
- addr2[ADDR0] = (FLASH_WORD_SIZE) 0x90;
- value = addr2[0];
-
- switch (value) {
- case (FLASH_WORD_SIZE) AMD_MANUFACT:
- info->flash_id = FLASH_MAN_AMD;
- break;
- case (FLASH_WORD_SIZE) FUJ_MANUFACT:
- info->flash_id = FLASH_MAN_FUJ;
- break;
- case (FLASH_WORD_SIZE) SST_MANUFACT:
- info->flash_id = FLASH_MAN_SST;
- break;
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- return (0); /* no or unknown flash */
- }
- printf ("recognised manufacturer");
-
- value = addr2[ADDR3]; /* device ID */
- debug ("\ndev_code=%x\n", value);
-
- switch (value) {
- case (FLASH_WORD_SIZE) AMD_ID_LV400T:
- info->flash_id += FLASH_AM400T;
- info->sector_count = 11;
- info->size = 0x00080000;
- break; /* => 0.5 MB */
-
- case (FLASH_WORD_SIZE) AMD_ID_LV400B:
- info->flash_id += FLASH_AM400B;
- info->sector_count = 11;
- info->size = 0x00080000;
- break; /* => 0.5 MB */
-
- case (FLASH_WORD_SIZE) AMD_ID_LV800T:
- info->flash_id += FLASH_AM800T;
- info->sector_count = 19;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case (FLASH_WORD_SIZE) AMD_ID_LV800B:
- info->flash_id += FLASH_AM800B;
- info->sector_count = 19;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case (FLASH_WORD_SIZE) AMD_ID_LV160T:
- info->flash_id += FLASH_AM160T;
- info->sector_count = 35;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case (FLASH_WORD_SIZE) AMD_ID_LV160B:
- info->flash_id += FLASH_AM160B;
- info->sector_count = 35;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case (FLASH_WORD_SIZE) SST_ID_xF800A:
- info->flash_id += FLASH_SST800A;
- info->sector_count = 16;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case (FLASH_WORD_SIZE) SST_ID_xF160A:
- info->flash_id += FLASH_SST160A;
- info->sector_count = 32;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case (FLASH_WORD_SIZE) AMD_ID_F040B:
- info->flash_id += FLASH_AM040;
- info->sector_count = 8;
- info->size = 0x00080000;
- break; /* => 0.5 MB */
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- return (0); /* => no or unknown flash */
-
- }
-
- printf ("flash id %lx; sector count %x, size %lx\n", info->flash_id,
- info->sector_count, info->size);
- /* set up sector start address table */
- if (info->flash_id & FLASH_MAN_SST) {
- for (i = 0; i < info->sector_count; i++)
- info->start[i] = base + (i * 0x00010000);
- } else if (info->flash_id & FLASH_BTYPE) {
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00004000;
- info->start[2] = base + 0x00006000;
- info->start[3] = base + 0x00008000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00010000) - 0x00030000;
- }
- } else {
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- info->start[i--] = base + info->size - 0x00004000;
- info->start[i--] = base + info->size - 0x00006000;
- info->start[i--] = base + info->size - 0x00008000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00010000;
- }
- }
-
- /* check for protected sectors */
- for (i = 0; i < info->sector_count; i++) {
- /* read sector protection at sector address, (A7 .. A0) = 0x02 */
- /* D0 = 1 if protected */
- addr2 = (volatile FLASH_WORD_SIZE *) (info->start[i]);
- if (info->flash_id & FLASH_MAN_SST)
- info->protect[i] = 0;
- else
- info->protect[i] = addr2[2] & 1;
- }
-
- /*
- * Prevent writes to uninitialized FLASH.
- */
- if (info->flash_id != FLASH_UNKNOWN) {
- addr2 = (FLASH_WORD_SIZE *) info->start[0];
- *addr2 = (FLASH_WORD_SIZE) 0x00F000F0; /* reset bank */
- }
-
- return (info->size);
-}
-
-#endif
-
-
-int flash_erase (flash_info_t * info, int s_first, int s_last)
-{
- volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *) (info->start[0]);
- int flag, prot, sect, l_sect;
- ulong start, now, last;
- unsigned char sh8b;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- if ((info->flash_id == FLASH_UNKNOWN) ||
- (info->flash_id > (FLASH_MAN_STM | FLASH_AMD_COMP))) {
- printf ("Can't erase unknown flash type - aborted\n");
- return 1;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n", prot);
- } else {
- printf ("\n");
- }
-
- l_sect = -1;
-
- /* Check the ROM CS */
- if ((info->start[0] >= ROM_CS1_START)
- && (info->start[0] < ROM_CS0_START))
- sh8b = 3;
- else
- sh8b = 0;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
-
- addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE) 0x00AA00AA;
- addr[ADDR1 << sh8b] = (FLASH_WORD_SIZE) 0x00550055;
- addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE) 0x00800080;
- addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE) 0x00AA00AA;
- addr[ADDR1 << sh8b] = (FLASH_WORD_SIZE) 0x00550055;
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr = (FLASH_WORD_SIZE *) (info->start[0] + ((info->
- start
- [sect]
- -
- info->
- start
- [0]) <<
- sh8b));
- if (info->flash_id & FLASH_MAN_SST) {
- addr[ADDR0 << sh8b] =
- (FLASH_WORD_SIZE) 0x00AA00AA;
- addr[ADDR1 << sh8b] =
- (FLASH_WORD_SIZE) 0x00550055;
- addr[ADDR0 << sh8b] =
- (FLASH_WORD_SIZE) 0x00800080;
- addr[ADDR0 << sh8b] =
- (FLASH_WORD_SIZE) 0x00AA00AA;
- addr[ADDR1 << sh8b] =
- (FLASH_WORD_SIZE) 0x00550055;
- addr[0] = (FLASH_WORD_SIZE) 0x00500050; /* block erase */
- udelay (30000); /* wait 30 ms */
- } else
- addr[0] = (FLASH_WORD_SIZE) 0x00300030; /* sector erase */
- l_sect = sect;
- }
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts ();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- /*
- * We wait for the last triggered sector
- */
- if (l_sect < 0)
- goto DONE;
-
- start = get_timer (0);
- last = start;
- addr = (FLASH_WORD_SIZE *) (info->start[0] + ((info->start[l_sect] -
- info->
- start[0]) << sh8b));
- while ((addr[0] & (FLASH_WORD_SIZE) 0x00800080) !=
- (FLASH_WORD_SIZE) 0x00800080) {
- if ((now = get_timer (start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- return 1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- serial_putc ('.');
- last = now;
- }
- }
-
- DONE:
- /* reset to read mode */
- addr = (FLASH_WORD_SIZE *) info->start[0];
- addr[0] = (FLASH_WORD_SIZE) 0x00F000F0; /* reset bank */
-
- printf (" done\n");
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int i, l, rc;
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i = 0, cp = wp; i < l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
- for (; i < 4 && cnt > 0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt == 0 && i < 4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
-
- if ((rc = write_word (info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = 0;
- for (i = 0; i < 4; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_word (info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i = 0, cp = wp; i < 4 && cnt > 0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i < 4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
-
- return (write_word (info, wp, data));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word (flash_info_t * info, ulong dest, ulong data)
-{
- volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *) info->start[0];
- volatile FLASH_WORD_SIZE *dest2;
- volatile FLASH_WORD_SIZE *data2 = (FLASH_WORD_SIZE *) & data;
- ulong start;
- int flag;
- int i;
- unsigned char sh8b;
-
- /* Check the ROM CS */
- if ((info->start[0] >= ROM_CS1_START)
- && (info->start[0] < ROM_CS0_START))
- sh8b = 3;
- else
- sh8b = 0;
-
- dest2 = (FLASH_WORD_SIZE *) (((dest - info->start[0]) << sh8b) +
- info->start[0]);
-
- /* Check if Flash is (sufficiently) erased */
- if ((*dest2 & (FLASH_WORD_SIZE) data) != (FLASH_WORD_SIZE) data) {
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
-
- for (i = 0; i < 4 / sizeof (FLASH_WORD_SIZE); i++) {
- addr2[ADDR0 << sh8b] = (FLASH_WORD_SIZE) 0x00AA00AA;
- addr2[ADDR1 << sh8b] = (FLASH_WORD_SIZE) 0x00550055;
- addr2[ADDR0 << sh8b] = (FLASH_WORD_SIZE) 0x00A000A0;
-
- dest2[i << sh8b] = data2[i];
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts ();
-
- /* data polling for D7 */
- start = get_timer (0);
- while ((dest2[i << sh8b] & (FLASH_WORD_SIZE) 0x00800080) !=
- (data2[i] & (FLASH_WORD_SIZE) 0x00800080)) {
- if (get_timer (start) > CFG_FLASH_WRITE_TOUT) {
- return (1);
- }
- }
- }
-
- return (0);
-}
-
-/*-----------------------------------------------------------------------
- */
diff --git a/board/bmw/m48t59y.c b/board/bmw/m48t59y.c
deleted file mode 100644
index d72c861a13..0000000000
--- a/board/bmw/m48t59y.c
+++ /dev/null
@@ -1,322 +0,0 @@
-/*
- * SGS M48-T59Y TOD/NVRAM Driver
- *
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 1999, by Curt McDowell, 08-06-99, Broadcom Corp.
- *
- * (C) Copyright 2001, James Dougherty, 07/18/01, Broadcom Corp.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * SGS M48-T59Y TOD/NVRAM Driver
- *
- * The SGS M48 an 8K NVRAM starting at offset M48_BASE_ADDR and
- * continuing for 8176 bytes. After that starts the Time-Of-Day (TOD)
- * registers which are used to set/get the internal date/time functions.
- *
- * This module implements Y2K compliance by taking full year numbers
- * and translating back and forth from the TOD 2-digit year.
- *
- * NOTE: for proper interaction with an operating system, the TOD should
- * be used to store Universal Coordinated Time (GMT) and timezone
- * conversions should be used.
- *
- * Here is a diagram of the memory layout:
- *
- * +---------------------------------------------+ 0xffe0a000
- * | Non-volatile memory | .
- * | | .
- * | (8176 bytes of Non-volatile memory) | .
- * | | .
- * +---------------------------------------------+ 0xffe0bff0
- * | Flags |
- * +---------------------------------------------+ 0xffe0bff1
- * | Unused |
- * +---------------------------------------------+ 0xffe0bff2
- * | Alarm Seconds |
- * +---------------------------------------------+ 0xffe0bff3
- * | Alarm Minutes |
- * +---------------------------------------------+ 0xffe0bff4
- * | Alarm Date |
- * +---------------------------------------------+ 0xffe0bff5
- * | Interrupts |
- * +---------------------------------------------+ 0xffe0bff6
- * | WatchDog |
- * +---------------------------------------------+ 0xffe0bff7
- * | Calibration |
- * +---------------------------------------------+ 0xffe0bff8
- * | Seconds |
- * +---------------------------------------------+ 0xffe0bff9
- * | Minutes |
- * +---------------------------------------------+ 0xffe0bffa
- * | Hours |
- * +---------------------------------------------+ 0xffe0bffb
- * | Day |
- * +---------------------------------------------+ 0xffe0bffc
- * | Date |
- * +---------------------------------------------+ 0xffe0bffd
- * | Month |
- * +---------------------------------------------+ 0xffe0bffe
- * | Year (2 digits only) |
- * +---------------------------------------------+ 0xffe0bfff
- */
-#include <common.h>
-#include <rtc.h>
-#include "bmw.h"
-
-/*
- * Imported from mousse.h:
- *
- * TOD_REG_BASE Base of m48t59y TOD registers
- * SYS_TOD_UNPROTECT() Disable NVRAM write protect
- * SYS_TOD_PROTECT() Re-enable NVRAM write protect
- */
-
-#define YEAR 0xf
-#define MONTH 0xe
-#define DAY 0xd
-#define DAY_OF_WEEK 0xc
-#define HOUR 0xb
-#define MINUTE 0xa
-#define SECOND 0x9
-#define CONTROL 0x8
-#define WATCH 0x7
-#define INTCTL 0x6
-#define WD_DATE 0x5
-#define WD_HOUR 0x4
-#define WD_MIN 0x3
-#define WD_SEC 0x2
-#define _UNUSED 0x1
-#define FLAGS 0x0
-
-#define M48_ADDR ((volatile unsigned char *) TOD_REG_BASE)
-
-int m48_tod_init(void)
-{
- SYS_TOD_UNPROTECT();
-
- M48_ADDR[CONTROL] = 0;
- M48_ADDR[WATCH] = 0;
- M48_ADDR[INTCTL] = 0;
-
- /*
- * If the oscillator is currently stopped (as on a new part shipped
- * from the factory), start it running.
- *
- * Here is an example of the TOD bytes on a brand new M48T59Y part:
- * 00 00 00 00 00 00 00 00 00 88 8c c3 bf c8 f5 01
- */
-
- if (M48_ADDR[SECOND] & 0x80)
- M48_ADDR[SECOND] = 0;
-
- /* Is battery low */
- if ( M48_ADDR[FLAGS] & 0x10) {
- printf("NOTICE: Battery low on Real-Time Clock (replace SNAPHAT).\n");
- }
-
- SYS_TOD_PROTECT();
-
- return 0;
-}
-
-/*
- * m48_tod_set
- */
-
-static int to_bcd(int value)
-{
- return value / 10 * 16 + value % 10;
-}
-
-static int from_bcd(int value)
-{
- return value / 16 * 10 + value % 16;
-}
-
-static int day_of_week(int y, int m, int d) /* 0-6 ==> Sun-Sat */
-{
- static int t[] = {0, 3, 2, 5, 0, 3, 5, 1, 4, 6, 2, 4};
- y -= m < 3;
- return (y + y/4 - y/100 + y/400 + t[m-1] + d) % 7;
-}
-
-/*
- * Note: the TOD should store the current GMT
- */
-
-int m48_tod_set(int year, /* 1980-2079 */
- int month, /* 01-12 */
- int day, /* 01-31 */
- int hour, /* 00-23 */
- int minute, /* 00-59 */
- int second) /* 00-59 */
-
-{
- SYS_TOD_UNPROTECT();
-
- M48_ADDR[CONTROL] |= 0x80; /* Set WRITE bit */
-
- M48_ADDR[YEAR] = to_bcd(year % 100);
- M48_ADDR[MONTH] = to_bcd(month);
- M48_ADDR[DAY] = to_bcd(day);
- M48_ADDR[DAY_OF_WEEK] = day_of_week(year, month, day) + 1;
- M48_ADDR[HOUR] = to_bcd(hour);
- M48_ADDR[MINUTE] = to_bcd(minute);
- M48_ADDR[SECOND] = to_bcd(second);
-
- M48_ADDR[CONTROL] &= ~0x80; /* Clear WRITE bit */
-
- SYS_TOD_PROTECT();
-
- return 0;
-}
-
-/*
- * Note: the TOD should store the current GMT
- */
-
-int m48_tod_get(int *year, /* 1980-2079 */
- int *month, /* 01-12 */
- int *day, /* 01-31 */
- int *hour, /* 00-23 */
- int *minute, /* 00-59 */
- int *second) /* 00-59 */
-{
- int y;
-
- SYS_TOD_UNPROTECT();
-
- M48_ADDR[CONTROL] |= 0x40; /* Set READ bit */
-
- y = from_bcd(M48_ADDR[YEAR]);
- *year = y < 80 ? 2000 + y : 1900 + y;
- *month = from_bcd(M48_ADDR[MONTH]);
- *day = from_bcd(M48_ADDR[DAY]);
- /* day_of_week = M48_ADDR[DAY_OF_WEEK] & 0xf; */
- *hour = from_bcd(M48_ADDR[HOUR]);
- *minute = from_bcd(M48_ADDR[MINUTE]);
- *second = from_bcd(M48_ADDR[SECOND] & 0x7f);
-
- M48_ADDR[CONTROL] &= ~0x40; /* Clear READ bit */
-
- SYS_TOD_PROTECT();
-
- return 0;
-}
-
-int m48_tod_get_second(void)
-{
- return from_bcd(M48_ADDR[SECOND] & 0x7f);
-}
-
-/*
- * Watchdog function
- *
- * If usec is 0, the watchdog timer is disarmed.
- *
- * If usec is non-zero, the watchdog timer is armed (or re-armed) for
- * approximately usec microseconds (if the exact requested usec is
- * not supported by the chip, the next higher available value is used).
- *
- * Minimum watchdog timeout = 62500 usec
- * Maximum watchdog timeout = 124 sec (124000000 usec)
- */
-
-void m48_watchdog_arm(int usec)
-{
- int mpy, res;
-
- SYS_TOD_UNPROTECT();
-
- if (usec == 0) {
- res = 0;
- mpy = 0;
- } else if (usec < 2000000) { /* Resolution: 1/16s if below 2s */
- res = 0;
- mpy = (usec + 62499) / 62500;
- } else if (usec < 8000000) { /* Resolution: 1/4s if below 8s */
- res = 1;
- mpy = (usec + 249999) / 250000;
- } else if (usec < 32000000) { /* Resolution: 1s if below 32s */
- res = 2;
- mpy = (usec + 999999) / 1000000;
- } else { /* Resolution: 4s up to 124s */
- res = 3;
- mpy = (usec + 3999999) / 4000000;
- if (mpy > 31)
- mpy = 31;
- }
-
- M48_ADDR[WATCH] = (0x80 | /* Steer to RST signal (IRQ = N/C) */
- mpy << 2 |
- res);
-
- SYS_TOD_PROTECT();
-}
-
-/*
- * U-Boot RTC support.
- */
-void
-rtc_get( struct rtc_time *tmp )
-{
- m48_tod_get(&tmp->tm_year,
- &tmp->tm_mon,
- &tmp->tm_mday,
- &tmp->tm_hour,
- &tmp->tm_min,
- &tmp->tm_sec);
- tmp->tm_yday = 0;
- tmp->tm_isdst= 0;
-
-#ifdef RTC_DEBUG
- printf( "Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
- tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
- tmp->tm_hour, tmp->tm_min, tmp->tm_sec );
-#endif
-}
-
-void
-rtc_set( struct rtc_time *tmp )
-{
- m48_tod_set(tmp->tm_year, /* 1980-2079 */
- tmp->tm_mon, /* 01-12 */
- tmp->tm_mday, /* 01-31 */
- tmp->tm_hour, /* 00-23 */
- tmp->tm_min, /* 00-59 */
- tmp->tm_sec); /* 00-59 */
-
-#ifdef RTC_DEBUG
- printf( "Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
- tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
- tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
-#endif
-
-}
-
-void
-rtc_reset (void)
-{
- m48_tod_init();
-}
diff --git a/board/bmw/m48t59y.h b/board/bmw/m48t59y.h
deleted file mode 100644
index 717300d957..0000000000
--- a/board/bmw/m48t59y.h
+++ /dev/null
@@ -1,57 +0,0 @@
-/*
- * SGS M48-T59Y TOD/NVRAM Driver
- *
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 1999, by Curt McDowell, 08-06-99, Broadcom Corp.
- *
- * (C) Copyright 2001, James Dougherty, 07/18/01, Broadcom Corp.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef __M48_T59_Y_H
-#define __M48_T59_Y_H
-
-/*
- * M48 T59Y -Timekeeping Battery backed SRAM.
- */
-
-int m48_tod_init(void);
-
-int m48_tod_set(int year,
- int month,
- int day,
- int hour,
- int minute,
- int second);
-
-int m48_tod_get(int *year,
- int *month,
- int *day,
- int *hour,
- int *minute,
- int *second);
-
-int m48_tod_get_second(void);
-
-void m48_watchdog_arm(int usec);
-
-#endif /*!__M48_T59_Y_H */
diff --git a/board/bmw/ns16550.c b/board/bmw/ns16550.c
deleted file mode 100644
index 7064567244..0000000000
--- a/board/bmw/ns16550.c
+++ /dev/null
@@ -1,57 +0,0 @@
-/*
- * COM1 NS16550 support
- * originally from linux source (arch/ppc/boot/ns16550.c)
- * modified to use CFG_ISA_MEM and new defines
- */
-
-#include <config.h>
-#include "ns16550.h"
-
-typedef struct NS16550 *NS16550_t;
-
-const NS16550_t COM_PORTS[] =
- { (NS16550_t) ((CFG_EUMB_ADDR) + 0x4500),
-(NS16550_t) ((CFG_EUMB_ADDR) + 0x4600) };
-
-volatile struct NS16550 *NS16550_init (int chan, int baud_divisor)
-{
- volatile struct NS16550 *com_port;
-
- com_port = (struct NS16550 *) COM_PORTS[chan];
- com_port->ier = 0x00;
- com_port->lcr = LCR_BKSE; /* Access baud rate */
- com_port->dll = baud_divisor & 0xff; /* 9600 baud */
- com_port->dlm = (baud_divisor >> 8) & 0xff;
- com_port->lcr = LCR_8N1; /* 8 data, 1 stop, no parity */
- com_port->mcr = MCR_RTS; /* RTS/DTR */
- com_port->fcr = FCR_FIFO_EN | FCR_RXSR | FCR_TXSR; /* Clear & enable FIFOs */
- return (com_port);
-}
-
-void NS16550_reinit (volatile struct NS16550 *com_port, int baud_divisor)
-{
- com_port->ier = 0x00;
- com_port->lcr = LCR_BKSE; /* Access baud rate */
- com_port->dll = baud_divisor & 0xff; /* 9600 baud */
- com_port->dlm = (baud_divisor >> 8) & 0xff;
- com_port->lcr = LCR_8N1; /* 8 data, 1 stop, no parity */
- com_port->mcr = MCR_RTS; /* RTS/DTR */
- com_port->fcr = FCR_FIFO_EN | FCR_RXSR | FCR_TXSR; /* Clear & enable FIFOs */
-}
-
-void NS16550_putc (volatile struct NS16550 *com_port, unsigned char c)
-{
- while ((com_port->lsr & LSR_THRE) == 0);
- com_port->thr = c;
-}
-
-unsigned char NS16550_getc (volatile struct NS16550 *com_port)
-{
- while ((com_port->lsr & LSR_DR) == 0);
- return (com_port->rbr);
-}
-
-int NS16550_tstc (volatile struct NS16550 *com_port)
-{
- return ((com_port->lsr & LSR_DR) != 0);
-}
diff --git a/board/bmw/ns16550.h b/board/bmw/ns16550.h
deleted file mode 100644
index 104f45bfb0..0000000000
--- a/board/bmw/ns16550.h
+++ /dev/null
@@ -1,79 +0,0 @@
-/*
- * NS16550 Serial Port
- * originally from linux source (arch/ppc/boot/ns16550.h)
- * modified slightly to
- * have addresses as offsets from CFG_ISA_BASE
- * added a few more definitions
- * added prototypes for ns16550.c
- * reduced no of com ports to 2
- * modifications (c) Rob Taylor, Flying Pig Systems. 2000.
- * further modified to support the 8245 duart
- * modifications (c) Paul Jimenez, Musenki, Inc. 2001.
- */
-
-
-struct NS16550 {
- unsigned char rbrthrdlb; /* 0 */
- unsigned char ierdmb; /* 1 */
- unsigned char iirfcrafr; /* 2 */
- unsigned char lcr; /* 3 */
- unsigned char mcr; /* 4 */
- unsigned char lsr; /* 5 */
- unsigned char msr; /* 6 */
- unsigned char scr; /* 7 */
- unsigned char reserved[2]; /* 8 & 9 */
- unsigned char dsr; /* 10 */
- unsigned char dcr; /* 11 */
-};
-
-
-#define rbr rbrthrdlb
-#define thr rbrthrdlb
-#define dll rbrthrdlb
-#define ier ierdmb
-#define dlm ierdmb
-#define iir iirfcrafr
-#define fcr iirfcrafr
-#define afr iirfcrafr
-
-#define FCR_FIFO_EN 0x01 /*fifo enable */
-#define FCR_RXSR 0x02 /*reciever soft reset */
-#define FCR_TXSR 0x04 /*transmitter soft reset */
-#define FCR_DMS 0x08 /* DMA Mode Select */
-
-#define MCR_RTS 0x02 /* Readyu to Send */
-#define MCR_LOOP 0x10 /* Local loopback mode enable */
-/* #define MCR_DTR 0x01 noton 8245 duart */
-/* #define MCR_DMA_EN 0x04 noton 8245 duart */
-/* #define MCR_TX_DFR 0x08 noton 8245 duart */
-
-#define LCR_WLS_MSK 0x03 /* character length slect mask */
-#define LCR_WLS_5 0x00 /* 5 bit character length */
-#define LCR_WLS_6 0x01 /* 6 bit character length */
-#define LCR_WLS_7 0x02 /* 7 bit character length */
-#define LCR_WLS_8 0x03 /* 8 bit character length */
-#define LCR_STB 0x04 /* Number of stop Bits, off = 1, on = 1.5 or 2) */
-#define LCR_PEN 0x08 /* Parity eneble */
-#define LCR_EPS 0x10 /* Even Parity Select */
-#define LCR_STKP 0x20 /* Stick Parity */
-#define LCR_SBRK 0x40 /* Set Break */
-#define LCR_BKSE 0x80 /* Bank select enable - aka DLAB on 8245 */
-
-#define LSR_DR 0x01 /* Data ready */
-#define LSR_OE 0x02 /* Overrun */
-#define LSR_PE 0x04 /* Parity error */
-#define LSR_FE 0x08 /* Framing error */
-#define LSR_BI 0x10 /* Break */
-#define LSR_THRE 0x20 /* Xmit holding register empty */
-#define LSR_TEMT 0x40 /* Xmitter empty */
-#define LSR_ERR 0x80 /* Error */
-
-/* useful defaults for LCR*/
-#define LCR_8N1 0x03
-
-
-volatile struct NS16550 *NS16550_init (int chan, int baud_divisor);
-void NS16550_putc (volatile struct NS16550 *com_port, unsigned char c);
-unsigned char NS16550_getc (volatile struct NS16550 *com_port);
-int NS16550_tstc (volatile struct NS16550 *com_port);
-void NS16550_reinit (volatile struct NS16550 *com_port, int baud_divisor);
diff --git a/board/bmw/serial.c b/board/bmw/serial.c
deleted file mode 100644
index f36a41b9ff..0000000000
--- a/board/bmw/serial.c
+++ /dev/null
@@ -1,83 +0,0 @@
-/*
- * (C) Copyright 2000
- * Rob Taylor, Flying Pig Systems. robt@flyingpig.com.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include "ns16550.h"
-
-#if CONFIG_CONS_INDEX == 1
-static struct NS16550 *console =
- (struct NS16550 *) (CFG_EUMB_ADDR + 0x4500);
-#elif CONFIG_CONS_INDEX == 2
-static struct NS16550 *console =
- (struct NS16550 *) (CFG_EUMB_ADDR + 0x4500);
-#else
-#error no valid console defined
-#endif
-
-extern ulong get_bus_freq (ulong);
-
-int serial_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- int clock_divisor = gd->bus_clk / 16 / gd->baudrate;
-
- NS16550_init (CONFIG_CONS_INDEX - 1, clock_divisor);
-
- return (0);
-}
-
-void serial_putc (const char c)
-{
- if (c == '\n') {
- serial_putc ('\r');
- }
- NS16550_putc (console, c);
-}
-
-void serial_puts (const char *s)
-{
- while (*s) {
- serial_putc (*s++);
- }
-}
-
-
-int serial_getc (void)
-{
- return NS16550_getc (console);
-}
-
-int serial_tstc (void)
-{
- return NS16550_tstc (console);
-}
-
-void serial_setbrg (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- int clock_divisor = get_bus_freq (0) / 16 / gd->baudrate;
-
- NS16550_reinit (console, clock_divisor);
-}
diff --git a/board/bmw/u-boot.lds b/board/bmw/u-boot.lds
deleted file mode 100644
index eaee3fdefc..0000000000
--- a/board/bmw/u-boot.lds
+++ /dev/null
@@ -1,136 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc824x/start.o (.text)
- lib_ppc/board.o (.text)
- lib_ppc/ppcstring.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
- lib_generic/zlib.o (.text)
-
- . = DEFINED(env_offset) ? env_offset : .;
- common/environment.o (.text)
-
- *(.text)
-
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
-
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/c2mon/Makefile b/board/c2mon/Makefile
deleted file mode 100644
index 7a2014d466..0000000000
--- a/board/c2mon/Makefile
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/c2mon/c2mon.c b/board/c2mon/c2mon.c
deleted file mode 100644
index ca8eb0cb02..0000000000
--- a/board/c2mon/c2mon.c
+++ /dev/null
@@ -1,234 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-
-/* ------------------------------------------------------------------------- */
-
-static long int dram_size (long int, long int *, long int);
-
-/* ------------------------------------------------------------------------- */
-
-#define _NOT_USED_ 0xFFFFFFFF
-
-const uint sdram_table[] =
-{
- /*
- * Single Read. (Offset 0 in UPMA RAM)
- */
- 0x1F07FC04, 0xEEAEFC04, 0x11ADFC04, 0xEFBBBC00,
- 0x1FF77C47, /* last */
- /*
- * SDRAM Initialization (offset 5 in UPMA RAM)
- *
- * This is no UPM entry point. The following definition uses
- * the remaining space to establish an initialization
- * sequence, which is executed by a RUN command.
- *
- */
- 0x1FF77C34, 0xEFEABC34, 0x1FB57C35, /* last */
- /*
- * Burst Read. (Offset 8 in UPMA RAM)
- */
- 0x1F07FC04, 0xEEAEFC04, 0x10ADFC04, 0xF0AFFC00,
- 0xF0AFFC00, 0xF1AFFC00, 0xEFBBBC00, 0x1FF77C47, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Single Write. (Offset 18 in UPMA RAM)
- */
- 0x1F07FC04, 0xEEAEBC00, 0x01B93C04, 0x1FF77C47, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Burst Write. (Offset 20 in UPMA RAM)
- */
- 0x1F07FC04, 0xEEAEBC00, 0x10AD7C00, 0xF0AFFC00,
- 0xF0AFFC00, 0xE1BBBC04, 0x1FF77C47, /* last */
- _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Refresh (Offset 30 in UPMA RAM)
- */
- 0x1FF5FC84, 0xFFFFFC04, 0xFFFFFC04, 0xFFFFFC04,
- 0xFFFFFC84, 0xFFFFFC07, /* last */
- _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Exception. (Offset 3c in UPMA RAM)
- */
- 0x7FFFFC07, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_,
-};
-
-/* ------------------------------------------------------------------------- */
-
-
-/*
- * Check Board Identity:
- */
-
-int checkboard (void)
-{
- unsigned char *s = (unsigned char *)getenv ("serial#");
-
- puts ("Board: TTTech C2MON ");
-
- for (; s && *s; ++s) {
- if (*s == ' ')
- break;
- putc (*s);
- }
-
- putc ('\n');
-
- return (0);
-}
-
-/* ------------------------------------------------------------------------- */
-
-long int initdram (int board_type)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- unsigned long reg;
- long int size8, size9;
- long int size = 0;
-
- upmconfig (UPMA, (uint *)sdram_table, sizeof(sdram_table) / sizeof(uint));
-
- /*
- * Preliminary prescaler for refresh (depends on number of
- * banks): This value is selected for four cycles every 62.4 us
- * with two SDRAM banks or four cycles every 31.2 us with one
- * bank. It will be adjusted after memory sizing.
- */
- memctl->memc_mptpr = CFG_MPTPR_2BK_8K;
-
- memctl->memc_mar = 0x00000088;
-
- /*
- * Map controller bank 2 the SDRAM bank 2 at physical address 0.
- */
- memctl->memc_or2 = CFG_OR2_PRELIM;
- memctl->memc_br2 = CFG_BR2_PRELIM;
-
- memctl->memc_mamr = CFG_MAMR_8COL & (~(MAMR_PTAE)); /* no refresh yet */
-
- udelay (200);
-
- /* perform SDRAM initializsation sequence */
-
- memctl->memc_mcr = 0x80004105; /* SDRAM bank 0 */
- udelay (1);
- memctl->memc_mcr = 0x80004230; /* SDRAM bank 0 - execute twice */
- udelay (1);
-
- memctl->memc_mamr |= MAMR_PTAE; /* enable refresh */
-
- udelay (1000);
-
- /*
- * Check Bank 0 Memory Size
- *
- * try 8 column mode
- */
- size8 = dram_size (CFG_MAMR_8COL,
- SDRAM_BASE2_PRELIM,
- SDRAM_MAX_SIZE);
-
- udelay (1000);
-
- /*
- * try 9 column mode
- */
- size9 = dram_size (CFG_MAMR_9COL,
- SDRAM_BASE2_PRELIM,
- SDRAM_MAX_SIZE);
-
- if (size8 < size9) { /* leave configuration at 9 columns */
- size = size9;
-/* debug ("SDRAM Bank 0 in 9 column mode: %ld MB\n", size >> 20); */
- } else { /* back to 8 columns */
- size = size8;
- memctl->memc_mamr = CFG_MAMR_8COL;
- udelay (500);
-/* debug ("SDRAM Bank 0 in 8 column mode: %ld MB\n", size >> 20); */
- }
-
- udelay (1000);
-
- /*
- * Adjust refresh rate depending on SDRAM type
- * For types > 128 MBit leave it at the current (fast) rate
- */
- if (size < 0x02000000) {
- /* reduce to 15.6 us (62.4 us / quad) */
- memctl->memc_mptpr = CFG_MPTPR_2BK_4K;
- udelay (1000);
- }
-
- /*
- * Final mapping
- */
- memctl->memc_or2 = ((-size) & 0xFFFF0000) | CFG_OR_TIMING_SDRAM;
- memctl->memc_br2 = (CFG_SDRAM_BASE & BR_BA_MSK) | BR_MS_UPMA | BR_V;
-
- /*
- * No bank 1
- *
- * invalidate bank
- */
- memctl->memc_br3 = 0;
-
- /* adjust refresh rate depending on SDRAM type, one bank */
- reg = memctl->memc_mptpr;
- reg >>= 1; /* reduce to CFG_MPTPR_1BK_8K / _4K */
- memctl->memc_mptpr = reg;
-
- udelay (10000);
-
- return (size);
-}
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Check memory range for valid RAM. A simple memory test determines
- * the actually available RAM size between addresses `base' and
- * `base + maxsize'. Some (not all) hardware errors are detected:
- * - short between address lines
- * - short between data lines
- */
-
-static long int dram_size (long int mamr_value, long int *base,
- long int maxsize)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
-
- memctl->memc_mamr = mamr_value;
-
- return (get_ram_size(base, maxsize));
-}
diff --git a/board/c2mon/config.mk b/board/c2mon/config.mk
deleted file mode 100644
index c2d21e2e44..0000000000
--- a/board/c2mon/config.mk
+++ /dev/null
@@ -1,28 +0,0 @@
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# TTTech C2MON boards
-#
-
-TEXT_BASE = 0x40000000
diff --git a/board/c2mon/flash.c b/board/c2mon/flash.c
deleted file mode 100644
index b2be21c684..0000000000
--- a/board/c2mon/flash.c
+++ /dev/null
@@ -1,570 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-
-#ifndef CFG_ENV_ADDR
-#define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_ENV_OFFSET)
-#endif
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (vu_long *addr, flash_info_t *info);
-static int write_word (flash_info_t *info, ulong dest, ulong data);
-static void flash_get_offsets (ulong base, flash_info_t *info);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- unsigned long size_b0, size_b1;
- int i;
-
- /* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* Static FLASH Bank configuration here - FIXME XXX */
-
- size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size_b0, size_b0<<20);
- }
-
- size_b1 = flash_get_size((vu_long *)FLASH_BASE1_PRELIM, &flash_info[1]);
-
- if (size_b1 > size_b0) {
- printf ("## ERROR: "
- "Bank 1 (0x%08lx = %ld MB) > Bank 0 (0x%08lx = %ld MB)\n",
- size_b1, size_b1<<20,
- size_b0, size_b0<<20
- );
- flash_info[0].flash_id = FLASH_UNKNOWN;
- flash_info[1].flash_id = FLASH_UNKNOWN;
- flash_info[0].sector_count = -1;
- flash_info[1].sector_count = -1;
- flash_info[0].size = 0;
- flash_info[1].size = 0;
- return (0);
- }
-
- /* Remap FLASH according to real size */
- memctl->memc_or0 = CFG_OR_TIMING_FLASH | (-size_b0 & OR_AM_MSK);
- memctl->memc_br0 = (CFG_FLASH_BASE & BR_BA_MSK) | BR_MS_GPCM | BR_V;
-
- /* Re-do sizing to get full correct info */
- size_b0 = flash_get_size((vu_long *)CFG_FLASH_BASE, &flash_info[0]);
-
- flash_get_offsets (CFG_FLASH_BASE, &flash_info[0]);
-
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
- /* monitor protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+monitor_flash_len-1,
- &flash_info[0]);
-#endif
-
-#ifdef CFG_ENV_IS_IN_FLASH
- /* ENV protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR+CFG_ENV_SIZE-1,
- &flash_info[0]);
-#endif
-
- if (size_b1) {
- memctl->memc_or1 = CFG_OR_TIMING_FLASH | (-size_b1 & 0xFFFF8000);
- memctl->memc_br1 = ((CFG_FLASH_BASE + size_b0) & BR_BA_MSK) |
- BR_MS_GPCM | BR_V;
-
- /* Re-do sizing to get full correct info */
- size_b1 = flash_get_size((vu_long *)(CFG_FLASH_BASE + size_b0),
- &flash_info[1]);
-
- flash_get_offsets (CFG_FLASH_BASE + size_b0, &flash_info[1]);
-
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
- /* monitor protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+monitor_flash_len-1,
- &flash_info[1]);
-#endif
-
-#ifdef CFG_ENV_IS_IN_FLASH
- /* ENV protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR+CFG_ENV_SIZE-1,
- &flash_info[1]);
-#endif
- } else {
- memctl->memc_br1 = 0; /* invalidate bank */
-
- flash_info[1].flash_id = FLASH_UNKNOWN;
- flash_info[1].sector_count = -1;
- }
-
- flash_info[0].size = size_b0;
- flash_info[1].size = size_b1;
-
- return (size_b0 + size_b1);
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_get_offsets (ulong base, flash_info_t *info)
-{
- int i;
-
- /* set up sector start address table */
- if (info->flash_id & FLASH_BTYPE) {
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00008000;
- info->start[2] = base + 0x0000C000;
- info->start[3] = base + 0x00010000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00020000) - 0x00060000;
- }
- } else {
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- info->start[i--] = base + info->size - 0x00008000;
- info->start[i--] = base + info->size - 0x0000C000;
- info->start[i--] = base + info->size - 0x00010000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00020000;
- }
- }
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD: printf ("AMD "); break;
- case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
- default: printf ("Unknown Vendor "); break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM400B: printf ("AM29LV400B (4 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM400T: printf ("AM29LV400T (4 Mbit, top boot sector)\n");
- break;
- case FLASH_AM800B: printf ("AM29LV800B (8 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM800T: printf ("AM29LV800T (8 Mbit, top boot sector)\n");
- break;
- case FLASH_AM160B: printf ("AM29LV160B (16 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM160T: printf ("AM29LV160T (16 Mbit, top boot sector)\n");
- break;
- case FLASH_AM320B: printf ("AM29LV320B (32 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM320T: printf ("AM29LV320T (32 Mbit, top boot sector)\n");
- break;
- default: printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " "
- );
- }
- printf ("\n");
- return;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-
-static ulong flash_get_size (vu_long *addr, flash_info_t *info)
-{
- short i;
- ulong value;
- ulong base = (ulong)addr;
-
- /* Write auto select command: read Manufacturer ID */
- addr[0x0555] = 0x00AA00AA;
- addr[0x02AA] = 0x00550055;
- addr[0x0555] = 0x00900090;
-
- value = addr[0];
-
- switch (value) {
- case AMD_MANUFACT:
- info->flash_id = FLASH_MAN_AMD;
- break;
- case FUJ_MANUFACT:
- info->flash_id = FLASH_MAN_FUJ;
- break;
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- return (0); /* no or unknown flash */
- }
-
- value = addr[1]; /* device ID */
-
- switch (value) {
- case AMD_ID_LV400T:
- info->flash_id += FLASH_AM400T;
- info->sector_count = 11;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case AMD_ID_LV400B:
- info->flash_id += FLASH_AM400B;
- info->sector_count = 11;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case AMD_ID_LV800T:
- info->flash_id += FLASH_AM800T;
- info->sector_count = 19;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case AMD_ID_LV800B:
- info->flash_id += FLASH_AM800B;
- info->sector_count = 19;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case AMD_ID_LV160T:
- info->flash_id += FLASH_AM160T;
- info->sector_count = 35;
- info->size = 0x00400000;
- break; /* => 4 MB */
-
- case AMD_ID_LV160B:
- info->flash_id += FLASH_AM160B;
- info->sector_count = 35;
- info->size = 0x00400000;
- break; /* => 4 MB */
-#if 0 /* enable when device IDs are available */
- case AMD_ID_LV320T:
- info->flash_id += FLASH_AM320T;
- info->sector_count = 67;
- info->size = 0x00800000;
- break; /* => 8 MB */
-
- case AMD_ID_LV320B:
- info->flash_id += FLASH_AM320B;
- info->sector_count = 67;
- info->size = 0x00800000;
- break; /* => 8 MB */
-#endif
- default:
- info->flash_id = FLASH_UNKNOWN;
- return (0); /* => no or unknown flash */
- }
-
- /* set up sector start address table */
- if (info->flash_id & FLASH_BTYPE) {
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00008000;
- info->start[2] = base + 0x0000C000;
- info->start[3] = base + 0x00010000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00020000) - 0x00060000;
- }
- } else {
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- info->start[i--] = base + info->size - 0x00008000;
- info->start[i--] = base + info->size - 0x0000C000;
- info->start[i--] = base + info->size - 0x00010000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00020000;
- }
- }
-
- /* check for protected sectors */
- for (i = 0; i < info->sector_count; i++) {
- /* read sector protection at sector address, (A7 .. A0) = 0x02 */
- /* D0 = 1 if protected */
- addr = (volatile unsigned long *)(info->start[i]);
- info->protect[i] = addr[2] & 1;
- }
-
- /*
- * Prevent writes to uninitialized FLASH.
- */
- if (info->flash_id != FLASH_UNKNOWN) {
- addr = (volatile unsigned long *)info->start[0];
-
- *addr = 0x00F000F0; /* reset bank */
- }
-
- return (info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- vu_long *addr = (vu_long*)(info->start[0]);
- int flag, prot, sect, l_sect;
- ulong start, now, last;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- if ((info->flash_id == FLASH_UNKNOWN) ||
- (info->flash_id > FLASH_AMD_COMP)) {
- printf ("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- l_sect = -1;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[0x0555] = 0x00AA00AA;
- addr[0x02AA] = 0x00550055;
- addr[0x0555] = 0x00800080;
- addr[0x0555] = 0x00AA00AA;
- addr[0x02AA] = 0x00550055;
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr = (vu_long*)(info->start[sect]);
- addr[0] = 0x00300030;
- l_sect = sect;
- }
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- /*
- * We wait for the last triggered sector
- */
- if (l_sect < 0)
- goto DONE;
-
- start = get_timer (0);
- last = start;
- addr = (vu_long*)(info->start[l_sect]);
- while ((addr[0] & 0x00800080) != 0x00800080) {
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- return 1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- }
-
-DONE:
- /* reset to read mode */
- addr = (volatile unsigned long *)info->start[0];
- addr[0] = 0x00F000F0; /* reset bank */
-
- printf (" done\n");
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int i, l, rc;
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
- for (; i<4 && cnt>0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = 0;
- for (i=0; i<4; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- return (write_word(info, wp, data));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word (flash_info_t *info, ulong dest, ulong data)
-{
- vu_long *addr = (vu_long*)(info->start[0]);
- ulong start;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*((vu_long *)dest) & data) != data) {
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[0x0555] = 0x00AA00AA;
- addr[0x02AA] = 0x00550055;
- addr[0x0555] = 0x00A000A0;
-
- *((vu_long *)dest) = data;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* data polling for D7 */
- start = get_timer (0);
- while ((*((vu_long *)dest) & 0x00800080) != (data & 0x00800080)) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- return (1);
- }
- }
- return (0);
-}
-
-/*-----------------------------------------------------------------------
- */
diff --git a/board/c2mon/u-boot.lds b/board/c2mon/u-boot.lds
deleted file mode 100644
index cdf550f67b..0000000000
--- a/board/c2mon/u-boot.lds
+++ /dev/null
@@ -1,141 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc8xx/start.o (.text)
- common/dlmalloc.o (.text)
- lib_ppc/ppcstring.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
- lib_generic/zlib.o (.text)
-
- . = env_offset;
- common/environment.o(.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/c2mon/u-boot.lds.debug b/board/c2mon/u-boot.lds.debug
deleted file mode 100644
index 3165d56345..0000000000
--- a/board/c2mon/u-boot.lds.debug
+++ /dev/null
@@ -1,137 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc8xx/start.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
-
- . = env_offset;
- common/environment.o(.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/canmb/Makefile b/board/canmb/Makefile
deleted file mode 100644
index 607833f8b0..0000000000
--- a/board/canmb/Makefile
+++ /dev/null
@@ -1,47 +0,0 @@
-#
-# (C) Copyright 2005
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := $(BOARD).o
-#../common/flash.o ../common/vpd.o ../common/am79c874.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/canmb/canmb.c b/board/canmb/canmb.c
deleted file mode 100644
index 1782b314f8..0000000000
--- a/board/canmb/canmb.c
+++ /dev/null
@@ -1,251 +0,0 @@
-/*
- * (C) Copyright 2005
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2004
- * Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc5xxx.h>
-#include <pci.h>
-
-#if defined(CONFIG_MPC5200_DDR)
-#include "mt46v16m16-75.h"
-#else
-#include "mt48lc16m32s2-75.h"
-#endif
-
-#ifndef CFG_RAMBOOT
-static void sdram_start (int hi_addr)
-{
- long hi_addr_bit = hi_addr ? 0x01000000 : 0;
-
- /* unlock mode register */
- *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000000 | hi_addr_bit;
- __asm__ volatile ("sync");
-
- /* precharge all banks */
- *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000002 | hi_addr_bit;
- __asm__ volatile ("sync");
-
-#if SDRAM_DDR
- /* set mode register: extended mode */
- *(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_EMODE;
- __asm__ volatile ("sync");
-
- /* set mode register: reset DLL */
- *(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_MODE | 0x04000000;
- __asm__ volatile ("sync");
-#endif
-
- /* precharge all banks */
- *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000002 | hi_addr_bit;
- __asm__ volatile ("sync");
-
- /* auto refresh */
- *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000004 | hi_addr_bit;
- __asm__ volatile ("sync");
-
- /* set mode register */
- *(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_MODE;
- __asm__ volatile ("sync");
-
- /* normal operation */
- *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | hi_addr_bit;
- __asm__ volatile ("sync");
-}
-#endif
-
-/*
- * ATTENTION: Although partially referenced initdram does NOT make real use
- * use of CFG_SDRAM_BASE. The code does not work if CFG_SDRAM_BASE
- * is something else than 0x00000000.
- */
-
-#if defined(CONFIG_MPC5200)
-long int initdram (int board_type)
-{
- ulong dramsize = 0;
- ulong dramsize2 = 0;
-#ifndef CFG_RAMBOOT
- ulong test1, test2;
-
- /* setup SDRAM chip selects */
- *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x0000001e;/* 2G at 0x0 */
- *(vu_long *)MPC5XXX_SDRAM_CS1CFG = 0x80000000;/* disabled */
- __asm__ volatile ("sync");
-
- /* setup config registers */
- *(vu_long *)MPC5XXX_SDRAM_CONFIG1 = SDRAM_CONFIG1;
- *(vu_long *)MPC5XXX_SDRAM_CONFIG2 = SDRAM_CONFIG2;
- __asm__ volatile ("sync");
-
-#if SDRAM_DDR
- /* set tap delay */
- *(vu_long *)MPC5XXX_CDM_PORCFG = SDRAM_TAPDELAY;
- __asm__ volatile ("sync");
-#endif
-
- /* find RAM size using SDRAM CS0 only */
- sdram_start(0);
- test1 = get_ram_size((ulong *)CFG_SDRAM_BASE, 0x80000000);
- sdram_start(1);
- test2 = get_ram_size((ulong *)CFG_SDRAM_BASE, 0x80000000);
- if (test1 > test2) {
- sdram_start(0);
- dramsize = test1;
- } else {
- dramsize = test2;
- }
-
- /* memory smaller than 1MB is impossible */
- if (dramsize < (1 << 20)) {
- dramsize = 0;
- }
-
- /* set SDRAM CS0 size according to the amount of RAM found */
- if (dramsize > 0) {
- *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x13 + __builtin_ffs(dramsize >> 20) - 1;
- } else {
- *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0; /* disabled */
- }
-
- /* let SDRAM CS1 start right after CS0 */
- *(vu_long *)MPC5XXX_SDRAM_CS1CFG = dramsize + 0x0000001e;/* 2G */
-
- /* find RAM size using SDRAM CS1 only */
- if (!dramsize)
- sdram_start(0);
- test2 = test1 = get_ram_size((ulong *)(CFG_SDRAM_BASE + dramsize), 0x80000000);
- if (!dramsize) {
- sdram_start(1);
- test2 = get_ram_size((ulong *)(CFG_SDRAM_BASE + dramsize), 0x80000000);
- }
- if (test1 > test2) {
- sdram_start(0);
- dramsize2 = test1;
- } else {
- dramsize2 = test2;
- }
-
- /* memory smaller than 1MB is impossible */
- if (dramsize2 < (1 << 20)) {
- dramsize2 = 0;
- }
-
- /* set SDRAM CS1 size according to the amount of RAM found */
- if (dramsize2 > 0) {
- *(vu_long *)MPC5XXX_SDRAM_CS1CFG = dramsize
- | (0x13 + __builtin_ffs(dramsize2 >> 20) - 1);
- } else {
- *(vu_long *)MPC5XXX_SDRAM_CS1CFG = dramsize; /* disabled */
- }
-
-#else /* CFG_RAMBOOT */
-
- /* retrieve size of memory connected to SDRAM CS0 */
- dramsize = *(vu_long *)MPC5XXX_SDRAM_CS0CFG & 0xFF;
- if (dramsize >= 0x13) {
- dramsize = (1 << (dramsize - 0x13)) << 20;
- } else {
- dramsize = 0;
- }
-
- /* retrieve size of memory connected to SDRAM CS1 */
- dramsize2 = *(vu_long *)MPC5XXX_SDRAM_CS1CFG & 0xFF;
- if (dramsize2 >= 0x13) {
- dramsize2 = (1 << (dramsize2 - 0x13)) << 20;
- } else {
- dramsize2 = 0;
- }
-
-#endif /* CFG_RAMBOOT */
-
- return dramsize + dramsize2;
-}
-
-#elif defined(CONFIG_MGT5100)
-
-long int initdram (int board_type)
-{
- ulong dramsize = 0;
-#ifndef CFG_RAMBOOT
- ulong test1, test2;
-
- /* setup and enable SDRAM chip selects */
- *(vu_long *)MPC5XXX_SDRAM_START = 0x00000000;
- *(vu_long *)MPC5XXX_SDRAM_STOP = 0x0000ffff;/* 2G */
- *(vu_long *)MPC5XXX_ADDECR |= (1 << 22); /* Enable SDRAM */
- __asm__ volatile ("sync");
-
- /* setup config registers */
- *(vu_long *)MPC5XXX_SDRAM_CONFIG1 = SDRAM_CONFIG1;
- *(vu_long *)MPC5XXX_SDRAM_CONFIG2 = SDRAM_CONFIG2;
-
- /* address select register */
- *(vu_long *)MPC5XXX_SDRAM_XLBSEL = SDRAM_ADDRSEL;
- __asm__ volatile ("sync");
-
- /* find RAM size */
- sdram_start(0);
- test1 = get_ram_size((ulong *)CFG_SDRAM_BASE, 0x80000000);
- sdram_start(1);
- test2 = get_ram_size((ulong *)CFG_SDRAM_BASE, 0x80000000);
- if (test1 > test2) {
- sdram_start(0);
- dramsize = test1;
- } else {
- dramsize = test2;
- }
-
- /* set SDRAM end address according to size */
- *(vu_long *)MPC5XXX_SDRAM_STOP = ((dramsize - 1) >> 15);
-
-#else /* CFG_RAMBOOT */
-
- /* Retrieve amount of SDRAM available */
- dramsize = ((*(vu_long *)MPC5XXX_SDRAM_STOP + 1) << 15);
-
-#endif /* CFG_RAMBOOT */
-
- return dramsize;
-}
-
-#else
-#error Neither CONFIG_MPC5200 or CONFIG_MGT5100 defined
-#endif
-
-int checkboard (void)
-{
- puts ("Board: CANMB\n");
- return 0;
-}
-
-int board_early_init_r (void)
-{
- *(vu_long *)MPC5XXX_BOOTCS_CFG &= ~0x1; /* clear RO */
- *(vu_long *)MPC5XXX_BOOTCS_START =
- *(vu_long *)MPC5XXX_CS0_START = START_REG(CFG_FLASH_BASE);
- *(vu_long *)MPC5XXX_BOOTCS_STOP =
- *(vu_long *)MPC5XXX_CS0_STOP = STOP_REG(CFG_FLASH_BASE, CFG_FLASH_SIZE);
- return 0;
-}
diff --git a/board/canmb/config.mk b/board/canmb/config.mk
deleted file mode 100644
index a163b34d65..0000000000
--- a/board/canmb/config.mk
+++ /dev/null
@@ -1,39 +0,0 @@
-#
-# (C) Copyright 2005
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# (C) Copyright 2003
-# Reinhard Meyer, EMK Elektronik GmbH, r.meyer@emk-elektronik.de
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# CANMB board
-#
-# allowed and functional TEXT_BASE values:
-#
-# 0xfe000000 low boot at 0x00000100 (default board setting)
-# 0x00100000 RAM load and test
-#
-
-TEXT_BASE = 0xFE000000
-#TEXT_BASE = 0x00100000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
diff --git a/board/canmb/mt48lc16m32s2-75.h b/board/canmb/mt48lc16m32s2-75.h
deleted file mode 100644
index ffdf0396a5..0000000000
--- a/board/canmb/mt48lc16m32s2-75.h
+++ /dev/null
@@ -1,43 +0,0 @@
-/*
- * (C) Copyright 2004
- * Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#define SDRAM_DDR 0 /* is SDR */
-
-#if defined(CONFIG_MPC5200)
-/* Settings for XLB = 132 MHz */
-#define SDRAM_MODE 0x00CD0000
-#define SDRAM_CONTROL 0x504F0000
-#define SDRAM_CONFIG1 0xD2322800
-#define SDRAM_CONFIG2 0x8AD70000
-
-#elif defined(CONFIG_MGT5100)
-/* Settings for XLB = 66 MHz */
-#define SDRAM_MODE 0x008D0000
-#define SDRAM_CONTROL 0x504F0000
-#define SDRAM_CONFIG1 0xC2222600
-#define SDRAM_CONFIG2 0x88B70004
-#define SDRAM_ADDRSEL 0x02000000
-
-#else
-#error Neither CONFIG_MPC5200 or CONFIG_MGT5100 defined
-#endif
diff --git a/board/canmb/u-boot.lds b/board/canmb/u-boot.lds
deleted file mode 100644
index 88dc118e8f..0000000000
--- a/board/canmb/u-boot.lds
+++ /dev/null
@@ -1,125 +0,0 @@
-/*
- * (C) Copyright 2005
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc5xxx/start.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/cds/common/cadmus.c b/board/cds/common/cadmus.c
deleted file mode 100644
index 5f86de5af2..0000000000
--- a/board/cds/common/cadmus.c
+++ /dev/null
@@ -1,95 +0,0 @@
-/*
- * Copyright 2004 Freescale Semiconductor.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-
-#include <common.h>
-
-
-/*
- * CADMUS Board System Registers
- */
-#ifndef CFG_CADMUS_BASE_REG
-#define CFG_CADMUS_BASE_REG (CADMUS_BASE_ADDR + 0x4000)
-#endif
-
-typedef struct cadmus_reg {
- u_char cm_ver; /* Board version */
- u_char cm_csr; /* General control/status */
- u_char cm_rst; /* Reset control */
- u_char cm_hsclk; /* High speed clock */
- u_char cm_hsxclk; /* High speed clock extended */
- u_char cm_led; /* LED data */
- u_char cm_pci; /* PCI control/status */
- u_char cm_dma; /* DMA control */
- u_char cm_reserved[248]; /* Total 256 bytes */
-} cadmus_reg_t;
-
-
-unsigned int
-get_board_version(void)
-{
- volatile cadmus_reg_t *cadmus = (cadmus_reg_t *)CFG_CADMUS_BASE_REG;
-
- return cadmus->cm_ver;
-}
-
-
-unsigned long
-get_clock_freq(void)
-{
- volatile cadmus_reg_t *cadmus = (cadmus_reg_t *)CFG_CADMUS_BASE_REG;
-
- uint pci1_speed = (cadmus->cm_pci >> 2) & 0x3; /* PSPEED in [4:5] */
-
- if (pci1_speed == 0) {
- return 33000000;
- } else if (pci1_speed == 1) {
- return 66000000;
- } else {
- /* Really, unknown. Be safe? */
- return 33000000;
- }
-}
-
-
-unsigned int
-get_pci_slot(void)
-{
- volatile cadmus_reg_t *cadmus = (cadmus_reg_t *)CFG_CADMUS_BASE_REG;
-
- /*
- * PCI slot in USER bits CSR[6:7] by convention.
- */
- return ((cadmus->cm_csr >> 6) & 0x3) + 1;
-}
-
-
-unsigned int
-get_pci_dual(void)
-{
- volatile cadmus_reg_t *cadmus = (cadmus_reg_t *)CFG_CADMUS_BASE_REG;
-
- /*
- * PCI DUAL in CM_PCI[3]
- */
- return cadmus->cm_pci & 0x10;
-}
diff --git a/board/cds/common/cadmus.h b/board/cds/common/cadmus.h
deleted file mode 100644
index 217ea64251..0000000000
--- a/board/cds/common/cadmus.h
+++ /dev/null
@@ -1,54 +0,0 @@
-/*
- * Copyright 2004 Freescale Semiconductor.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef __CADMUS_H_
-#define __CADMUS_H_
-
-
-/*
- * CADMUS Board System Register interface.
- */
-
-/*
- * Returns board version register.
- */
-extern unsigned int get_board_version(void);
-
-/*
- * Returns either 33000000 or 66000000 as the SYS_CLK_FREQ.
- */
-extern unsigned long get_clock_freq(void);
-
-
-/*
- * Returns 1 - 4, as found in the USER CSR[6:7] bits.
- */
-extern unsigned int get_pci_slot(void);
-
-
-/*
- * Returns PCI DUAL as found in CM_PCI[3].
- */
-extern unsigned int get_pci_dual(void);
-
-
-#endif /* __CADMUS_H_ */
diff --git a/board/cds/common/eeprom.c b/board/cds/common/eeprom.c
deleted file mode 100644
index 5034e0ca2e..0000000000
--- a/board/cds/common/eeprom.c
+++ /dev/null
@@ -1,60 +0,0 @@
-/*
- * Copyright 2004 Freescale Semiconductor.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-
-#include <common.h>
-#include <i2c.h>
-
-#include "eeprom.h"
-
-
-typedef struct {
- char idee_pcbid[4]; /* "CCID" for CDC v1.X */
- u8 idee_major;
- u8 idee_minor;
- char idee_serial[10];
- char idee_errata[2];
- char idee_date[8]; /* yyyymmdd */
- /* The rest of the EEPROM space is reserved */
-} id_eeprom_t;
-
-
-unsigned int
-get_cpu_board_revision(void)
-{
- uint major = 0;
- uint minor = 0;
-
- id_eeprom_t id_eeprom;
-
- i2c_read(CFG_I2C_EEPROM_ADDR, 0, 2,
- (uchar *) &id_eeprom, sizeof(id_eeprom));
-
- major = id_eeprom.idee_major;
- minor = id_eeprom.idee_minor;
-
- if (major == 0xff && minor == 0xff) {
- major = minor = 0;
- }
-
- return MPC85XX_CPU_BOARD_REV(major,minor);
-}
diff --git a/board/cds/common/eeprom.h b/board/cds/common/eeprom.h
deleted file mode 100644
index 12a0789049..0000000000
--- a/board/cds/common/eeprom.h
+++ /dev/null
@@ -1,50 +0,0 @@
-/*
- * Copyright 2004 Freescale Semiconductor.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef __EEPROM_H_
-#define __EEPROM_H_
-
-
-/*
- * EEPROM Board System Register interface.
- */
-
-
-/*
- * CPU Board Revision
- */
-#define MPC85XX_CPU_BOARD_REV(maj, min) ((((maj)&0xff) << 8) | ((min) & 0xff))
-#define MPC85XX_CPU_BOARD_MAJOR(rev) (((rev) >> 8) & 0xff)
-#define MPC85XX_CPU_BOARD_MINOR(rev) ((rev) & 0xff)
-
-#define MPC85XX_CPU_BOARD_REV_UNKNOWN MPC85XX_CPU_BOARD_REV(0,0)
-#define MPC85XX_CPU_BOARD_REV_1_0 MPC85XX_CPU_BOARD_REV(1,0)
-#define MPC85XX_CPU_BOARD_REV_1_1 MPC85XX_CPU_BOARD_REV(1,1)
-
-/*
- * Returns CPU board revision register as a 16-bit value with
- * the Major in the high byte, and Minor in the low byte.
- */
-extern unsigned int get_cpu_board_revision(void);
-
-
-#endif /* __CADMUS_H_ */
diff --git a/board/cds/mpc8541cds/Makefile b/board/cds/mpc8541cds/Makefile
deleted file mode 100644
index 0d4abbd71d..0000000000
--- a/board/cds/mpc8541cds/Makefile
+++ /dev/null
@@ -1,51 +0,0 @@
-#
-# Copyright 2004 Freescale Semiconductor.
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := $(BOARD).o \
- ../common/cadmus.o \
- ../common/eeprom.o
-
-SOBJS := init.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(OBJS) $(SOBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/cds/mpc8541cds/config.mk b/board/cds/mpc8541cds/config.mk
deleted file mode 100644
index 17cc8bce9c..0000000000
--- a/board/cds/mpc8541cds/config.mk
+++ /dev/null
@@ -1,30 +0,0 @@
-#
-# Copyright 2004 Freescale Semiconductor.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# mpc8541cds board
-#
-TEXT_BASE = 0xfff80000
-
-PLATFORM_CPPFLAGS += -DCONFIG_E500=1
-PLATFORM_CPPFLAGS += -DCONFIG_MPC85xx=1
-PLATFORM_CPPFLAGS += -DCONFIG_MPC8541=1
diff --git a/board/cds/mpc8541cds/init.S b/board/cds/mpc8541cds/init.S
deleted file mode 100644
index 53dcd0d762..0000000000
--- a/board/cds/mpc8541cds/init.S
+++ /dev/null
@@ -1,255 +0,0 @@
-/*
- * Copyright 2004 Freescale Semiconductor.
- * Copyright 2002,2003, Motorola Inc.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <ppc_asm.tmpl>
-#include <ppc_defs.h>
-#include <asm/cache.h>
-#include <asm/mmu.h>
-#include <config.h>
-#include <mpc85xx.h>
-
-
-/*
- * TLB0 and TLB1 Entries
- *
- * Out of reset, TLB1's Entry 0 maps the highest 4K for CCSRBAR.
- * However, CCSRBAR is then relocated to CFG_CCSRBAR right after
- * these TLB entries are established.
- *
- * The TLB entries for DDR are dynamically setup in spd_sdram()
- * and use TLB1 Entries 8 through 15 as needed according to the
- * size of DDR memory.
- *
- * MAS0: tlbsel, esel, nv
- * MAS1: valid, iprot, tid, ts, tsize
- * MAS2: epn, sharen, x0, x1, w, i, m, g, e
- * MAS3: rpn, u0-u3, ux, sx, uw, sw, ur, sr
- */
-
-#define entry_start \
- mflr r1 ; \
- bl 0f ;
-
-#define entry_end \
-0: mflr r0 ; \
- mtlr r1 ; \
- blr ;
-
-
- .section .bootpg, "ax"
- .globl tlb1_entry
-tlb1_entry:
- entry_start
-
- /*
- * Number of TLB0 and TLB1 entries in the following table
- */
- .long 13
-
-#if (CFG_CCSRBAR_DEFAULT != CFG_CCSRBAR)
- /*
- * TLB0 4K Non-cacheable, guarded
- * 0xff700000 4K Initial CCSRBAR mapping
- *
- * This ends up at a TLB0 Index==0 entry, and must not collide
- * with other TLB0 Entries.
- */
- .long TLB1_MAS0(0, 0, 0)
- .long TLB1_MAS1(1, 0, 0, 0, 0)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_CCSRBAR_DEFAULT), 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_CCSRBAR_DEFAULT), 0,0,0,0,0,1,0,1,0,1)
-#else
-#error("Update the number of table entries in tlb1_entry")
-#endif
-
- /*
- * TLB0 16K Cacheable, non-guarded
- * 0xd001_0000 16K Temporary Global data for initialization
- *
- * Use four 4K TLB0 entries. These entries must be cacheable
- * as they provide the bootstrap memory before the memory
- * controler and real memory have been configured.
- *
- * These entries end up at TLB0 Indicies 0x10, 0x14, 0x18 and 0x1c,
- * and must not collide with other TLB0 entries.
- */
- .long TLB1_MAS0(0, 0, 0)
- .long TLB1_MAS1(1, 0, 0, 0, 0)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_INIT_RAM_ADDR),
- 0,0,0,0,0,0,0,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_INIT_RAM_ADDR),
- 0,0,0,0,0,1,0,1,0,1)
-
- .long TLB1_MAS0(0, 0, 0)
- .long TLB1_MAS1(1, 0, 0, 0, 0)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_INIT_RAM_ADDR + 4 * 1024),
- 0,0,0,0,0,0,0,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_INIT_RAM_ADDR + 4 * 1024),
- 0,0,0,0,0,1,0,1,0,1)
-
- .long TLB1_MAS0(0, 0, 0)
- .long TLB1_MAS1(1, 0, 0, 0, 0)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_INIT_RAM_ADDR + 8 * 1024),
- 0,0,0,0,0,0,0,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_INIT_RAM_ADDR + 8 * 1024),
- 0,0,0,0,0,1,0,1,0,1)
-
- .long TLB1_MAS0(0, 0, 0)
- .long TLB1_MAS1(1, 0, 0, 0, 0)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_INIT_RAM_ADDR + 12 * 1024),
- 0,0,0,0,0,0,0,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_INIT_RAM_ADDR + 12 * 1024),
- 0,0,0,0,0,1,0,1,0,1)
-
-
- /*
- * TLB 0: 16M Non-cacheable, guarded
- * 0xff000000 16M FLASH
- * Out of reset this entry is only 4K.
- */
- .long TLB1_MAS0(1, 0, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_16M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_FLASH_BASE), 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_FLASH_BASE), 0,0,0,0,0,1,0,1,0,1)
-
- /*
- * TLB 1: 256M Non-cacheable, guarded
- * 0x80000000 256M PCI1 MEM First half
- */
- .long TLB1_MAS0(1, 1, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_PCI1_MEM_BASE), 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_PCI1_MEM_BASE), 0,0,0,0,0,1,0,1,0,1)
-
- /*
- * TLB 2: 256M Non-cacheable, guarded
- * 0x90000000 256M PCI1 MEM Second half
- */
- .long TLB1_MAS0(1, 2, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_PCI1_MEM_BASE + 0x10000000),
- 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_PCI1_MEM_BASE + 0x10000000),
- 0,0,0,0,0,1,0,1,0,1)
-
- /*
- * TLB 3: 256M Non-cacheable, guarded
- * 0xa0000000 256M PCI2 MEM First half
- */
- .long TLB1_MAS0(1, 3, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_PCI2_MEM_BASE), 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_PCI2_MEM_BASE), 0,0,0,0,0,1,0,1,0,1)
-
- /*
- * TLB 4: 256M Non-cacheable, guarded
- * 0xb0000000 256M PCI2 MEM Second half
- */
- .long TLB1_MAS0(1, 4, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_PCI2_MEM_BASE + 0x10000000),
- 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_PCI2_MEM_BASE + 0x10000000),
- 0,0,0,0,0,1,0,1,0,1)
-
- /*
- * TLB 5: 64M Non-cacheable, guarded
- * 0xe000_0000 1M CCSRBAR
- * 0xe200_0000 16M PCI1 IO
- * 0xe300_0000 16M PCI2 IO
- */
- .long TLB1_MAS0(1, 5, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_64M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_CCSRBAR), 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_CCSRBAR), 0,0,0,0,0,1,0,1,0,1)
-
- /*
- * TLB 6: 64M Cacheable, non-guarded
- * 0xf000_0000 64M LBC SDRAM
- */
- .long TLB1_MAS0(1, 6, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_64M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_LBC_SDRAM_BASE), 0,0,0,0,0,0,0,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_LBC_SDRAM_BASE), 0,0,0,0,0,1,0,1,0,1)
-
- /*
- * TLB 7: 1M Non-cacheable, guarded
- * 0xf8000000 1M CADMUS registers
- */
- .long TLB1_MAS0(1, 7, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_1M)
- .long TLB1_MAS2(E500_TLB_EPN(CADMUS_BASE_ADDR), 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CADMUS_BASE_ADDR), 0,0,0,0,0,1,0,1,0,1)
-
- entry_end
-
-/*
- * LAW(Local Access Window) configuration:
- *
- * 0x0000_0000 0x7fff_ffff DDR 2G
- * 0x8000_0000 0x9fff_ffff PCI1 MEM 512M
- * 0xa000_0000 0xbfff_ffff PCI2 MEM 512M
- * 0xe000_0000 0xe000_ffff CCSR 1M
- * 0xe200_0000 0xe2ff_ffff PCI1 IO 16M
- * 0xe300_0000 0xe3ff_ffff PCI2 IO 16M
- * 0xf000_0000 0xf7ff_ffff SDRAM 128M
- * 0xf800_0000 0xf80f_ffff NVRAM/CADMUS (*) 1M
- * 0xff00_0000 0xff7f_ffff FLASH (2nd bank) 8M
- * 0xff80_0000 0xffff_ffff FLASH (boot bank) 8M
- *
- * Notes:
- * CCSRBAR and L2-as-SRAM don't need a configured Local Access Window.
- * If flash is 8M at default position (last 8M), no LAW needed.
- *
- * The defines below are 1-off of the actual LAWAR0 usage.
- * So LAWAR3 define uses the LAWAR4 register in the ECM.
- */
-
-#define LAWBAR0 0
-#define LAWAR0 ((LAWAR_TRGT_IF_DDR | (LAWAR_SIZE & LAWAR_SIZE_128M)) & ~LAWAR_EN)
-
-#define LAWBAR1 ((CFG_PCI1_MEM_BASE>>12) & 0xfffff)
-#define LAWAR1 (LAWAR_EN | LAWAR_TRGT_IF_PCI1 | (LAWAR_SIZE & LAWAR_SIZE_512M))
-
-#define LAWBAR2 ((CFG_PCI2_MEM_BASE>>12) & 0xfffff)
-#define LAWAR2 (LAWAR_EN | LAWAR_TRGT_IF_PCI2 | (LAWAR_SIZE & LAWAR_SIZE_512M))
-
-#define LAWBAR3 ((CFG_PCI1_IO_BASE>>12) & 0xfffff)
-#define LAWAR3 (LAWAR_EN | LAWAR_TRGT_IF_PCI1 | (LAWAR_SIZE & LAWAR_SIZE_16M))
-
-#define LAWBAR4 ((CFG_PCI2_IO_BASE>>12) & 0xfffff)
-#define LAWAR4 (LAWAR_EN | LAWAR_TRGT_IF_PCI2 | (LAWAR_SIZE & LAWAR_SIZE_16M))
-
-/* LBC window - maps 256M 0xf0000000 -> 0xffffffff */
-#define LAWBAR5 ((CFG_LBC_SDRAM_BASE>>12) & 0xfffff)
-#define LAWAR5 (LAWAR_EN | LAWAR_TRGT_IF_LBC | (LAWAR_SIZE & LAWAR_SIZE_256M))
-
- .section .bootpg, "ax"
- .globl law_entry
-
-law_entry:
- entry_start
- .long 6
- .long LAWBAR0,LAWAR0,LAWBAR1,LAWAR1,LAWBAR2,LAWAR2,LAWBAR3,LAWAR3
- .long LAWBAR4,LAWAR4,LAWBAR5,LAWAR5
- entry_end
diff --git a/board/cds/mpc8541cds/mpc8541cds.c b/board/cds/mpc8541cds/mpc8541cds.c
deleted file mode 100644
index 6b8aa68f54..0000000000
--- a/board/cds/mpc8541cds/mpc8541cds.c
+++ /dev/null
@@ -1,504 +0,0 @@
-/*
- * Copyright 2004 Freescale Semiconductor.
- *
- * (C) Copyright 2002 Scott McNutt <smcnutt@artesyncp.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <pci.h>
-#include <asm/processor.h>
-#include <asm/immap_85xx.h>
-#include <ioports.h>
-#include <spd.h>
-
-#include "../common/cadmus.h"
-#include "../common/eeprom.h"
-
-#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
-extern void ddr_enable_ecc(unsigned int dram_size);
-#endif
-
-extern long int spd_sdram(void);
-
-void local_bus_init(void);
-void sdram_init(void);
-
-/*
- * I/O Port configuration table
- *
- * if conf is 1, then that port pin will be configured at boot time
- * according to the five values podr/pdir/ppar/psor/pdat for that entry
- */
-
-const iop_conf_t iop_conf_tab[4][32] = {
-
- /* Port A configuration */
- { /* conf ppar psor pdir podr pdat */
- /* PA31 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 TxENB */
- /* PA30 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 TxClav */
- /* PA29 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 TxSOC */
- /* PA28 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 RxENB */
- /* PA27 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 RxSOC */
- /* PA26 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 RxClav */
- /* PA25 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[0] */
- /* PA24 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[1] */
- /* PA23 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[2] */
- /* PA22 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[3] */
- /* PA21 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[4] */
- /* PA20 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[5] */
- /* PA19 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[6] */
- /* PA18 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[7] */
- /* PA17 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[7] */
- /* PA16 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[6] */
- /* PA15 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[5] */
- /* PA14 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[4] */
- /* PA13 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[3] */
- /* PA12 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[2] */
- /* PA11 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[1] */
- /* PA10 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[0] */
- /* PA9 */ { 0, 1, 1, 1, 0, 0 }, /* FCC1 L1TXD */
- /* PA8 */ { 0, 1, 1, 0, 0, 0 }, /* FCC1 L1RXD */
- /* PA7 */ { 0, 0, 0, 1, 0, 0 }, /* PA7 */
- /* PA6 */ { 0, 1, 1, 1, 0, 0 }, /* TDM A1 L1RSYNC */
- /* PA5 */ { 0, 0, 0, 1, 0, 0 }, /* PA5 */
- /* PA4 */ { 0, 0, 0, 1, 0, 0 }, /* PA4 */
- /* PA3 */ { 0, 0, 0, 1, 0, 0 }, /* PA3 */
- /* PA2 */ { 0, 0, 0, 1, 0, 0 }, /* PA2 */
- /* PA1 */ { 1, 0, 0, 0, 0, 0 }, /* FREERUN */
- /* PA0 */ { 0, 0, 0, 1, 0, 0 } /* PA0 */
- },
-
- /* Port B configuration */
- { /* conf ppar psor pdir podr pdat */
- /* PB31 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TX_ER */
- /* PB30 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_DV */
- /* PB29 */ { 1, 1, 1, 1, 0, 0 }, /* FCC2 MII TX_EN */
- /* PB28 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_ER */
- /* PB27 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII COL */
- /* PB26 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII CRS */
- /* PB25 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[3] */
- /* PB24 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[2] */
- /* PB23 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[1] */
- /* PB22 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[0] */
- /* PB21 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[0] */
- /* PB20 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[1] */
- /* PB19 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[2] */
- /* PB18 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[3] */
- /* PB17 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:RX_DIV */
- /* PB16 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:RX_ERR */
- /* PB15 */ { 0, 1, 0, 1, 0, 0 }, /* FCC3:TX_ERR */
- /* PB14 */ { 0, 1, 0, 1, 0, 0 }, /* FCC3:TX_EN */
- /* PB13 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:COL */
- /* PB12 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:CRS */
- /* PB11 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:RXD */
- /* PB10 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:RXD */
- /* PB9 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:RXD */
- /* PB8 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:RXD */
- /* PB7 */ { 0, 1, 0, 1, 0, 0 }, /* FCC3:TXD */
- /* PB6 */ { 0, 1, 0, 1, 0, 0 }, /* FCC3:TXD */
- /* PB5 */ { 0, 1, 0, 1, 0, 0 }, /* FCC3:TXD */
- /* PB4 */ { 0, 1, 0, 1, 0, 0 }, /* FCC3:TXD */
- /* PB3 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PB2 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PB1 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PB0 */ { 0, 0, 0, 0, 0, 0 } /* pin doesn't exist */
- },
-
- /* Port C */
- { /* conf ppar psor pdir podr pdat */
- /* PC31 */ { 0, 0, 0, 1, 0, 0 }, /* PC31 */
- /* PC30 */ { 0, 0, 0, 1, 0, 0 }, /* PC30 */
- /* PC29 */ { 0, 1, 1, 0, 0, 0 }, /* SCC1 EN *CLSN */
- /* PC28 */ { 0, 0, 0, 1, 0, 0 }, /* PC28 */
- /* PC27 */ { 0, 0, 0, 1, 0, 0 }, /* UART Clock in */
- /* PC26 */ { 0, 0, 0, 1, 0, 0 }, /* PC26 */
- /* PC25 */ { 0, 0, 0, 1, 0, 0 }, /* PC25 */
- /* PC24 */ { 0, 0, 0, 1, 0, 0 }, /* PC24 */
- /* PC23 */ { 0, 1, 0, 1, 0, 0 }, /* ATMTFCLK */
- /* PC22 */ { 0, 1, 0, 0, 0, 0 }, /* ATMRFCLK */
- /* PC21 */ { 0, 1, 0, 0, 0, 0 }, /* SCC1 EN RXCLK */
- /* PC20 */ { 0, 1, 0, 0, 0, 0 }, /* SCC1 EN TXCLK */
- /* PC19 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_CLK CLK13 */
- /* PC18 */ { 1, 1, 0, 0, 0, 0 }, /* FCC Tx Clock (CLK14) */
- /* PC17 */ { 0, 0, 0, 1, 0, 0 }, /* PC17 */
- /* PC16 */ { 0, 1, 0, 0, 0, 0 }, /* FCC Tx Clock (CLK16) */
- /* PC15 */ { 1, 1, 0, 0, 0, 0 }, /* PC15 */
- /* PC14 */ { 0, 1, 0, 0, 0, 0 }, /* SCC1 EN *CD */
- /* PC13 */ { 0, 0, 0, 1, 0, 0 }, /* PC13 */
- /* PC12 */ { 0, 1, 0, 1, 0, 0 }, /* PC12 */
- /* PC11 */ { 0, 0, 0, 1, 0, 0 }, /* LXT971 transmit control */
- /* PC10 */ { 1, 0, 0, 1, 0, 0 }, /* FETHMDC */
- /* PC9 */ { 1, 0, 0, 0, 0, 0 }, /* FETHMDIO */
- /* PC8 */ { 0, 0, 0, 1, 0, 0 }, /* PC8 */
- /* PC7 */ { 0, 0, 0, 1, 0, 0 }, /* PC7 */
- /* PC6 */ { 0, 0, 0, 1, 0, 0 }, /* PC6 */
- /* PC5 */ { 0, 0, 0, 1, 0, 0 }, /* PC5 */
- /* PC4 */ { 0, 0, 0, 1, 0, 0 }, /* PC4 */
- /* PC3 */ { 0, 0, 0, 1, 0, 0 }, /* PC3 */
- /* PC2 */ { 0, 0, 0, 1, 0, 1 }, /* ENET FDE */
- /* PC1 */ { 0, 0, 0, 1, 0, 0 }, /* ENET DSQE */
- /* PC0 */ { 0, 0, 0, 1, 0, 0 }, /* ENET LBK */
- },
-
- /* Port D */
- { /* conf ppar psor pdir podr pdat */
- /* PD31 */ { 1, 1, 0, 0, 0, 0 }, /* SCC1 EN RxD */
- /* PD30 */ { 1, 1, 1, 1, 0, 0 }, /* SCC1 EN TxD */
- /* PD29 */ { 1, 1, 0, 1, 0, 0 }, /* SCC1 EN TENA */
- /* PD28 */ { 0, 1, 0, 0, 0, 0 }, /* PD28 */
- /* PD27 */ { 0, 1, 1, 1, 0, 0 }, /* PD27 */
- /* PD26 */ { 0, 0, 0, 1, 0, 0 }, /* PD26 */
- /* PD25 */ { 0, 0, 0, 1, 0, 0 }, /* PD25 */
- /* PD24 */ { 0, 0, 0, 1, 0, 0 }, /* PD24 */
- /* PD23 */ { 0, 0, 0, 1, 0, 0 }, /* PD23 */
- /* PD22 */ { 0, 0, 0, 1, 0, 0 }, /* PD22 */
- /* PD21 */ { 0, 0, 0, 1, 0, 0 }, /* PD21 */
- /* PD20 */ { 0, 0, 0, 1, 0, 0 }, /* PD20 */
- /* PD19 */ { 0, 0, 0, 1, 0, 0 }, /* PD19 */
- /* PD18 */ { 0, 0, 0, 1, 0, 0 }, /* PD18 */
- /* PD17 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXPRTY */
- /* PD16 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXPRTY */
- /* PD15 */ { 0, 1, 1, 0, 1, 0 }, /* I2C SDA */
- /* PD14 */ { 0, 0, 0, 1, 0, 0 }, /* LED */
- /* PD13 */ { 0, 0, 0, 0, 0, 0 }, /* PD13 */
- /* PD12 */ { 0, 0, 0, 0, 0, 0 }, /* PD12 */
- /* PD11 */ { 0, 0, 0, 0, 0, 0 }, /* PD11 */
- /* PD10 */ { 0, 0, 0, 0, 0, 0 }, /* PD10 */
- /* PD9 */ { 0, 1, 0, 1, 0, 0 }, /* SMC1 TXD */
- /* PD8 */ { 0, 1, 0, 0, 0, 0 }, /* SMC1 RXD */
- /* PD7 */ { 0, 0, 0, 1, 0, 1 }, /* PD7 */
- /* PD6 */ { 0, 0, 0, 1, 0, 1 }, /* PD6 */
- /* PD5 */ { 0, 0, 0, 1, 0, 1 }, /* PD5 */
- /* PD4 */ { 0, 0, 0, 1, 0, 1 }, /* PD4 */
- /* PD3 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PD2 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PD1 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PD0 */ { 0, 0, 0, 0, 0, 0 } /* pin doesn't exist */
- }
-};
-
-int board_early_init_f (void)
-{
- return 0;
-}
-
-int checkboard (void)
-{
- volatile immap_t *immap = (immap_t *) CFG_CCSRBAR;
- volatile ccsr_gur_t *gur = &immap->im_gur;
-
- /* PCI slot in USER bits CSR[6:7] by convention. */
- uint pci_slot = get_pci_slot ();
-
- uint pci_dual = get_pci_dual (); /* PCI DUAL in CM_PCI[3] */
- uint pci1_32 = gur->pordevsr & 0x10000; /* PORDEVSR[15] */
- uint pci1_clk_sel = gur->porpllsr & 0x8000; /* PORPLLSR[16] */
- uint pci2_clk_sel = gur->porpllsr & 0x4000; /* PORPLLSR[17] */
-
- uint pci1_speed = get_clock_freq (); /* PCI PSPEED in [4:5] */
-
- uint cpu_board_rev = get_cpu_board_revision ();
-
- printf ("Board: CDS Version 0x%02x, PCI Slot %d\n",
- get_board_version (), pci_slot);
-
- printf ("CPU Board Revision %d.%d (0x%04x)\n",
- MPC85XX_CPU_BOARD_MAJOR (cpu_board_rev),
- MPC85XX_CPU_BOARD_MINOR (cpu_board_rev), cpu_board_rev);
-
- printf (" PCI1: %d bit, %s MHz, %s\n",
- (pci1_32) ? 32 : 64,
- (pci1_speed == 33000000) ? "33" :
- (pci1_speed == 66000000) ? "66" : "unknown",
- pci1_clk_sel ? "sync" : "async");
-
- if (pci_dual) {
- printf (" PCI2: 32 bit, 66 MHz, %s\n",
- pci2_clk_sel ? "sync" : "async");
- } else {
- printf (" PCI2: disabled\n");
- }
-
- /*
- * Initialize local bus.
- */
- local_bus_init ();
-
- return 0;
-}
-
-long int
-initdram(int board_type)
-{
- long dram_size = 0;
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
-
- puts("Initializing\n");
-
-#if defined(CONFIG_DDR_DLL)
- {
- /*
- * Work around to stabilize DDR DLL MSYNC_IN.
- * Errata DDR9 seems to have been fixed.
- * This is now the workaround for Errata DDR11:
- * Override DLL = 1, Course Adj = 1, Tap Select = 0
- */
-
- volatile ccsr_gur_t *gur= &immap->im_gur;
-
- gur->ddrdllcr = 0x81000000;
- asm("sync;isync;msync");
- udelay(200);
- }
-#endif
- dram_size = spd_sdram();
-
-#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
- /*
- * Initialize and enable DDR ECC.
- */
- ddr_enable_ecc(dram_size);
-#endif
- /*
- * SDRAM Initialization
- */
- sdram_init();
-
- puts(" DDR: ");
- return dram_size;
-}
-
-/*
- * Initialize Local Bus
- */
-void
-local_bus_init(void)
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile ccsr_gur_t *gur = &immap->im_gur;
- volatile ccsr_lbc_t *lbc = &immap->im_lbc;
-
- uint clkdiv;
- uint lbc_hz;
- sys_info_t sysinfo;
- uint temp_lbcdll;
-
- /*
- * Errata LBC11.
- * Fix Local Bus clock glitch when DLL is enabled.
- *
- * If localbus freq is < 66Mhz, DLL bypass mode must be used.
- * If localbus freq is > 133Mhz, DLL can be safely enabled.
- * Between 66 and 133, the DLL is enabled with an override workaround.
- */
-
- get_sys_info(&sysinfo);
- clkdiv = lbc->lcrr & 0x0f;
- lbc_hz = sysinfo.freqSystemBus / 1000000 / clkdiv;
-
- if (lbc_hz < 66) {
- lbc->lcrr |= 0x80000000; /* DLL Bypass */
-
- } else if (lbc_hz >= 133) {
- lbc->lcrr &= (~0x80000000); /* DLL Enabled */
-
- } else {
- lbc->lcrr &= (~0x8000000); /* DLL Enabled */
- udelay(200);
-
- /*
- * Sample LBC DLL ctrl reg, upshift it to set the
- * override bits.
- */
- temp_lbcdll = gur->lbcdllcr;
- gur->lbcdllcr = (((temp_lbcdll & 0xff) << 16) | 0x80000000);
- asm("sync;isync;msync");
- }
-}
-
-/*
- * Initialize SDRAM memory on the Local Bus.
- */
-void
-sdram_init(void)
-{
-#if defined(CFG_OR2_PRELIM) && defined(CFG_BR2_PRELIM)
-
- uint idx;
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile ccsr_lbc_t *lbc = &immap->im_lbc;
- uint *sdram_addr = (uint *)CFG_LBC_SDRAM_BASE;
- uint cpu_board_rev;
- uint lsdmr_common;
-
- puts(" SDRAM: ");
-
- print_size (CFG_LBC_SDRAM_SIZE * 1024 * 1024, "\n");
-
- /*
- * Setup SDRAM Base and Option Registers
- */
- lbc->or2 = CFG_OR2_PRELIM;
- asm("msync");
-
- lbc->br2 = CFG_BR2_PRELIM;
- asm("msync");
-
- lbc->lbcr = CFG_LBC_LBCR;
- asm("msync");
-
-
- lbc->lsrt = CFG_LBC_LSRT;
- lbc->mrtpr = CFG_LBC_MRTPR;
- asm("msync");
-
- /*
- * Determine which address lines to use baed on CPU board rev.
- */
- cpu_board_rev = get_cpu_board_revision();
- lsdmr_common = CFG_LBC_LSDMR_COMMON;
- if (cpu_board_rev == MPC85XX_CPU_BOARD_REV_1_0) {
- lsdmr_common |= CFG_LBC_LSDMR_BSMA1617;
- } else if (cpu_board_rev == MPC85XX_CPU_BOARD_REV_1_1) {
- lsdmr_common |= CFG_LBC_LSDMR_BSMA1516;
- } else {
- /*
- * Assume something unable to identify itself is
- * really old, and likely has lines 16/17 mapped.
- */
- lsdmr_common |= CFG_LBC_LSDMR_BSMA1617;
- }
-
- /*
- * Issue PRECHARGE ALL command.
- */
- lbc->lsdmr = lsdmr_common | CFG_LBC_LSDMR_OP_PCHALL;
- asm("sync;msync");
- *sdram_addr = 0xff;
- ppcDcbf((unsigned long) sdram_addr);
- udelay(100);
-
- /*
- * Issue 8 AUTO REFRESH commands.
- */
- for (idx = 0; idx < 8; idx++) {
- lbc->lsdmr = lsdmr_common | CFG_LBC_LSDMR_OP_ARFRSH;
- asm("sync;msync");
- *sdram_addr = 0xff;
- ppcDcbf((unsigned long) sdram_addr);
- udelay(100);
- }
-
- /*
- * Issue 8 MODE-set command.
- */
- lbc->lsdmr = lsdmr_common | CFG_LBC_LSDMR_OP_MRW;
- asm("sync;msync");
- *sdram_addr = 0xff;
- ppcDcbf((unsigned long) sdram_addr);
- udelay(100);
-
- /*
- * Issue NORMAL OP command.
- */
- lbc->lsdmr = lsdmr_common | CFG_LBC_LSDMR_OP_NORMAL;
- asm("sync;msync");
- *sdram_addr = 0xff;
- ppcDcbf((unsigned long) sdram_addr);
- udelay(200); /* Overkill. Must wait > 200 bus cycles */
-
-#endif /* enable SDRAM init */
-}
-
-#if defined(CFG_DRAM_TEST)
-int
-testdram(void)
-{
- uint *pstart = (uint *) CFG_MEMTEST_START;
- uint *pend = (uint *) CFG_MEMTEST_END;
- uint *p;
-
- printf("Testing DRAM from 0x%08x to 0x%08x\n",
- CFG_MEMTEST_START,
- CFG_MEMTEST_END);
-
- printf("DRAM test phase 1:\n");
- for (p = pstart; p < pend; p++)
- *p = 0xaaaaaaaa;
-
- for (p = pstart; p < pend; p++) {
- if (*p != 0xaaaaaaaa) {
- printf ("DRAM test fails at: %08x\n", (uint) p);
- return 1;
- }
- }
-
- printf("DRAM test phase 2:\n");
- for (p = pstart; p < pend; p++)
- *p = 0x55555555;
-
- for (p = pstart; p < pend; p++) {
- if (*p != 0x55555555) {
- printf ("DRAM test fails at: %08x\n", (uint) p);
- return 1;
- }
- }
-
- printf("DRAM test passed.\n");
- return 0;
-}
-#endif
-
-#if defined(CONFIG_PCI)
-
-/*
- * Initialize PCI Devices, report devices found.
- */
-
-#ifndef CONFIG_PCI_PNP
-static struct pci_config_table pci_mpc85xxcds_config_table[] = {
- { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
- PCI_IDSEL_NUMBER, PCI_ANY_ID,
- pci_cfgfunc_config_device, { PCI_ENET0_IOADDR,
- PCI_ENET0_MEMADDR,
- PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER
- } },
- { }
-};
-#endif
-
-static struct pci_controller hose = {
-#ifndef CONFIG_PCI_PNP
- config_table: pci_mpc85xxcds_config_table,
-#endif
-};
-
-#endif /* CONFIG_PCI */
-
-void
-pci_init_board(void)
-{
-#ifdef CONFIG_PCI
- extern void pci_mpc85xx_init(struct pci_controller *hose);
-
- pci_mpc85xx_init(&hose);
-#endif
-}
diff --git a/board/cds/mpc8541cds/u-boot.lds b/board/cds/mpc8541cds/u-boot.lds
deleted file mode 100644
index 1bea0074fa..0000000000
--- a/board/cds/mpc8541cds/u-boot.lds
+++ /dev/null
@@ -1,149 +0,0 @@
-/*
- * Copyright 2004 Freescale Semiconductor.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- .resetvec 0xFFFFFFFC :
- {
- *(.resetvec)
- } = 0xffff
-
- .bootpg 0xFFFFF000 :
- {
- cpu/mpc85xx/start.o (.bootpg)
- board/cds/mpc8541cds/init.o (.bootpg)
- } = 0xffff
-
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc85xx/start.o (.text)
- board/cds/mpc8541cds/init.o (.text)
- cpu/mpc85xx/traps.o (.text)
- cpu/mpc85xx/interrupts.o (.text)
- cpu/mpc85xx/cpu_init.o (.text)
- cpu/mpc85xx/cpu.o (.text)
- cpu/mpc85xx/speed.o (.text)
- cpu/mpc85xx/pci.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/extable.o (.text)
- lib_generic/zlib.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/cds/mpc8548cds/Makefile b/board/cds/mpc8548cds/Makefile
deleted file mode 100644
index 0d4abbd71d..0000000000
--- a/board/cds/mpc8548cds/Makefile
+++ /dev/null
@@ -1,51 +0,0 @@
-#
-# Copyright 2004 Freescale Semiconductor.
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := $(BOARD).o \
- ../common/cadmus.o \
- ../common/eeprom.o
-
-SOBJS := init.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(OBJS) $(SOBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/cds/mpc8548cds/config.mk b/board/cds/mpc8548cds/config.mk
deleted file mode 100644
index 242a676200..0000000000
--- a/board/cds/mpc8548cds/config.mk
+++ /dev/null
@@ -1,30 +0,0 @@
-#
-# Copyright 2004 Freescale Semiconductor.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# mpc8548cds board
-#
-TEXT_BASE = 0xfff80000
-
-PLATFORM_CPPFLAGS += -DCONFIG_E500=1
-PLATFORM_CPPFLAGS += -DCONFIG_MPC85xx=1
-PLATFORM_CPPFLAGS += -DCONFIG_MPC8548=1
diff --git a/board/cds/mpc8548cds/init.S b/board/cds/mpc8548cds/init.S
deleted file mode 100644
index 53dcd0d762..0000000000
--- a/board/cds/mpc8548cds/init.S
+++ /dev/null
@@ -1,255 +0,0 @@
-/*
- * Copyright 2004 Freescale Semiconductor.
- * Copyright 2002,2003, Motorola Inc.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <ppc_asm.tmpl>
-#include <ppc_defs.h>
-#include <asm/cache.h>
-#include <asm/mmu.h>
-#include <config.h>
-#include <mpc85xx.h>
-
-
-/*
- * TLB0 and TLB1 Entries
- *
- * Out of reset, TLB1's Entry 0 maps the highest 4K for CCSRBAR.
- * However, CCSRBAR is then relocated to CFG_CCSRBAR right after
- * these TLB entries are established.
- *
- * The TLB entries for DDR are dynamically setup in spd_sdram()
- * and use TLB1 Entries 8 through 15 as needed according to the
- * size of DDR memory.
- *
- * MAS0: tlbsel, esel, nv
- * MAS1: valid, iprot, tid, ts, tsize
- * MAS2: epn, sharen, x0, x1, w, i, m, g, e
- * MAS3: rpn, u0-u3, ux, sx, uw, sw, ur, sr
- */
-
-#define entry_start \
- mflr r1 ; \
- bl 0f ;
-
-#define entry_end \
-0: mflr r0 ; \
- mtlr r1 ; \
- blr ;
-
-
- .section .bootpg, "ax"
- .globl tlb1_entry
-tlb1_entry:
- entry_start
-
- /*
- * Number of TLB0 and TLB1 entries in the following table
- */
- .long 13
-
-#if (CFG_CCSRBAR_DEFAULT != CFG_CCSRBAR)
- /*
- * TLB0 4K Non-cacheable, guarded
- * 0xff700000 4K Initial CCSRBAR mapping
- *
- * This ends up at a TLB0 Index==0 entry, and must not collide
- * with other TLB0 Entries.
- */
- .long TLB1_MAS0(0, 0, 0)
- .long TLB1_MAS1(1, 0, 0, 0, 0)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_CCSRBAR_DEFAULT), 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_CCSRBAR_DEFAULT), 0,0,0,0,0,1,0,1,0,1)
-#else
-#error("Update the number of table entries in tlb1_entry")
-#endif
-
- /*
- * TLB0 16K Cacheable, non-guarded
- * 0xd001_0000 16K Temporary Global data for initialization
- *
- * Use four 4K TLB0 entries. These entries must be cacheable
- * as they provide the bootstrap memory before the memory
- * controler and real memory have been configured.
- *
- * These entries end up at TLB0 Indicies 0x10, 0x14, 0x18 and 0x1c,
- * and must not collide with other TLB0 entries.
- */
- .long TLB1_MAS0(0, 0, 0)
- .long TLB1_MAS1(1, 0, 0, 0, 0)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_INIT_RAM_ADDR),
- 0,0,0,0,0,0,0,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_INIT_RAM_ADDR),
- 0,0,0,0,0,1,0,1,0,1)
-
- .long TLB1_MAS0(0, 0, 0)
- .long TLB1_MAS1(1, 0, 0, 0, 0)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_INIT_RAM_ADDR + 4 * 1024),
- 0,0,0,0,0,0,0,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_INIT_RAM_ADDR + 4 * 1024),
- 0,0,0,0,0,1,0,1,0,1)
-
- .long TLB1_MAS0(0, 0, 0)
- .long TLB1_MAS1(1, 0, 0, 0, 0)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_INIT_RAM_ADDR + 8 * 1024),
- 0,0,0,0,0,0,0,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_INIT_RAM_ADDR + 8 * 1024),
- 0,0,0,0,0,1,0,1,0,1)
-
- .long TLB1_MAS0(0, 0, 0)
- .long TLB1_MAS1(1, 0, 0, 0, 0)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_INIT_RAM_ADDR + 12 * 1024),
- 0,0,0,0,0,0,0,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_INIT_RAM_ADDR + 12 * 1024),
- 0,0,0,0,0,1,0,1,0,1)
-
-
- /*
- * TLB 0: 16M Non-cacheable, guarded
- * 0xff000000 16M FLASH
- * Out of reset this entry is only 4K.
- */
- .long TLB1_MAS0(1, 0, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_16M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_FLASH_BASE), 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_FLASH_BASE), 0,0,0,0,0,1,0,1,0,1)
-
- /*
- * TLB 1: 256M Non-cacheable, guarded
- * 0x80000000 256M PCI1 MEM First half
- */
- .long TLB1_MAS0(1, 1, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_PCI1_MEM_BASE), 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_PCI1_MEM_BASE), 0,0,0,0,0,1,0,1,0,1)
-
- /*
- * TLB 2: 256M Non-cacheable, guarded
- * 0x90000000 256M PCI1 MEM Second half
- */
- .long TLB1_MAS0(1, 2, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_PCI1_MEM_BASE + 0x10000000),
- 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_PCI1_MEM_BASE + 0x10000000),
- 0,0,0,0,0,1,0,1,0,1)
-
- /*
- * TLB 3: 256M Non-cacheable, guarded
- * 0xa0000000 256M PCI2 MEM First half
- */
- .long TLB1_MAS0(1, 3, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_PCI2_MEM_BASE), 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_PCI2_MEM_BASE), 0,0,0,0,0,1,0,1,0,1)
-
- /*
- * TLB 4: 256M Non-cacheable, guarded
- * 0xb0000000 256M PCI2 MEM Second half
- */
- .long TLB1_MAS0(1, 4, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_PCI2_MEM_BASE + 0x10000000),
- 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_PCI2_MEM_BASE + 0x10000000),
- 0,0,0,0,0,1,0,1,0,1)
-
- /*
- * TLB 5: 64M Non-cacheable, guarded
- * 0xe000_0000 1M CCSRBAR
- * 0xe200_0000 16M PCI1 IO
- * 0xe300_0000 16M PCI2 IO
- */
- .long TLB1_MAS0(1, 5, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_64M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_CCSRBAR), 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_CCSRBAR), 0,0,0,0,0,1,0,1,0,1)
-
- /*
- * TLB 6: 64M Cacheable, non-guarded
- * 0xf000_0000 64M LBC SDRAM
- */
- .long TLB1_MAS0(1, 6, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_64M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_LBC_SDRAM_BASE), 0,0,0,0,0,0,0,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_LBC_SDRAM_BASE), 0,0,0,0,0,1,0,1,0,1)
-
- /*
- * TLB 7: 1M Non-cacheable, guarded
- * 0xf8000000 1M CADMUS registers
- */
- .long TLB1_MAS0(1, 7, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_1M)
- .long TLB1_MAS2(E500_TLB_EPN(CADMUS_BASE_ADDR), 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CADMUS_BASE_ADDR), 0,0,0,0,0,1,0,1,0,1)
-
- entry_end
-
-/*
- * LAW(Local Access Window) configuration:
- *
- * 0x0000_0000 0x7fff_ffff DDR 2G
- * 0x8000_0000 0x9fff_ffff PCI1 MEM 512M
- * 0xa000_0000 0xbfff_ffff PCI2 MEM 512M
- * 0xe000_0000 0xe000_ffff CCSR 1M
- * 0xe200_0000 0xe2ff_ffff PCI1 IO 16M
- * 0xe300_0000 0xe3ff_ffff PCI2 IO 16M
- * 0xf000_0000 0xf7ff_ffff SDRAM 128M
- * 0xf800_0000 0xf80f_ffff NVRAM/CADMUS (*) 1M
- * 0xff00_0000 0xff7f_ffff FLASH (2nd bank) 8M
- * 0xff80_0000 0xffff_ffff FLASH (boot bank) 8M
- *
- * Notes:
- * CCSRBAR and L2-as-SRAM don't need a configured Local Access Window.
- * If flash is 8M at default position (last 8M), no LAW needed.
- *
- * The defines below are 1-off of the actual LAWAR0 usage.
- * So LAWAR3 define uses the LAWAR4 register in the ECM.
- */
-
-#define LAWBAR0 0
-#define LAWAR0 ((LAWAR_TRGT_IF_DDR | (LAWAR_SIZE & LAWAR_SIZE_128M)) & ~LAWAR_EN)
-
-#define LAWBAR1 ((CFG_PCI1_MEM_BASE>>12) & 0xfffff)
-#define LAWAR1 (LAWAR_EN | LAWAR_TRGT_IF_PCI1 | (LAWAR_SIZE & LAWAR_SIZE_512M))
-
-#define LAWBAR2 ((CFG_PCI2_MEM_BASE>>12) & 0xfffff)
-#define LAWAR2 (LAWAR_EN | LAWAR_TRGT_IF_PCI2 | (LAWAR_SIZE & LAWAR_SIZE_512M))
-
-#define LAWBAR3 ((CFG_PCI1_IO_BASE>>12) & 0xfffff)
-#define LAWAR3 (LAWAR_EN | LAWAR_TRGT_IF_PCI1 | (LAWAR_SIZE & LAWAR_SIZE_16M))
-
-#define LAWBAR4 ((CFG_PCI2_IO_BASE>>12) & 0xfffff)
-#define LAWAR4 (LAWAR_EN | LAWAR_TRGT_IF_PCI2 | (LAWAR_SIZE & LAWAR_SIZE_16M))
-
-/* LBC window - maps 256M 0xf0000000 -> 0xffffffff */
-#define LAWBAR5 ((CFG_LBC_SDRAM_BASE>>12) & 0xfffff)
-#define LAWAR5 (LAWAR_EN | LAWAR_TRGT_IF_LBC | (LAWAR_SIZE & LAWAR_SIZE_256M))
-
- .section .bootpg, "ax"
- .globl law_entry
-
-law_entry:
- entry_start
- .long 6
- .long LAWBAR0,LAWAR0,LAWBAR1,LAWAR1,LAWBAR2,LAWAR2,LAWBAR3,LAWAR3
- .long LAWBAR4,LAWAR4,LAWBAR5,LAWAR5
- entry_end
diff --git a/board/cds/mpc8548cds/mpc8548cds.c b/board/cds/mpc8548cds/mpc8548cds.c
deleted file mode 100644
index 5bc08900a4..0000000000
--- a/board/cds/mpc8548cds/mpc8548cds.c
+++ /dev/null
@@ -1,329 +0,0 @@
-/*
- * Copyright 2004 Freescale Semiconductor.
- *
- * (C) Copyright 2002 Scott McNutt <smcnutt@artesyncp.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <pci.h>
-#include <asm/processor.h>
-#include <asm/immap_85xx.h>
-#include <spd.h>
-
-#include "../common/cadmus.h"
-#include "../common/eeprom.h"
-
-#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
-extern void ddr_enable_ecc(unsigned int dram_size);
-#endif
-
-extern long int spd_sdram(void);
-
-void local_bus_init(void);
-void sdram_init(void);
-
-int board_early_init_f (void)
-{
- return 0;
-}
-
-int checkboard (void)
-{
- volatile immap_t *immap = (immap_t *) CFG_CCSRBAR;
- volatile ccsr_gur_t *gur = &immap->im_gur;
-
- /* PCI slot in USER bits CSR[6:7] by convention. */
- uint pci_slot = get_pci_slot ();
-
- uint pci_dual = get_pci_dual (); /* PCI DUAL in CM_PCI[3] */
- uint pci1_32 = gur->pordevsr & 0x10000; /* PORDEVSR[15] */
- uint pci1_clk_sel = gur->porpllsr & 0x8000; /* PORPLLSR[16] */
- uint pci2_clk_sel = gur->porpllsr & 0x4000; /* PORPLLSR[17] */
-
- uint pci1_speed = get_clock_freq (); /* PCI PSPEED in [4:5] */
-
- uint cpu_board_rev = get_cpu_board_revision ();
-
- printf ("Board: CDS Version 0x%02x, PCI Slot %d\n",
- get_board_version (), pci_slot);
-
- printf ("CPU Board Revision %d.%d (0x%04x)\n",
- MPC85XX_CPU_BOARD_MAJOR (cpu_board_rev),
- MPC85XX_CPU_BOARD_MINOR (cpu_board_rev), cpu_board_rev);
-
- printf (" PCI1: %d bit, %s MHz, %s\n",
- (pci1_32) ? 32 : 64,
- (pci1_speed == 33000000) ? "33" :
- (pci1_speed == 66000000) ? "66" : "unknown",
- pci1_clk_sel ? "sync" : "async");
-
- if (pci_dual) {
- printf (" PCI2: 32 bit, 66 MHz, %s\n",
- pci2_clk_sel ? "sync" : "async");
- } else {
- printf (" PCI2: disabled\n");
- }
-
- /*
- * Initialize local bus.
- */
- local_bus_init ();
-
-
- /*
- * Hack TSEC 3 and 4 IO voltages.
- */
- gur->tsec34ioovcr = 0xe7e0; /* 1110 0111 1110 0xxx */
-
- return 0;
-}
-
-long int
-initdram(int board_type)
-{
- long dram_size = 0;
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
-
- puts("Initializing\n");
-
-#if defined(CONFIG_DDR_DLL)
- {
- /*
- * Work around to stabilize DDR DLL MSYNC_IN.
- * Errata DDR9 seems to have been fixed.
- * This is now the workaround for Errata DDR11:
- * Override DLL = 1, Course Adj = 1, Tap Select = 0
- */
-
- volatile ccsr_gur_t *gur= &immap->im_gur;
-
- gur->ddrdllcr = 0x81000000;
- asm("sync;isync;msync");
- udelay(200);
- }
-#endif
- dram_size = spd_sdram();
-
-#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
- /*
- * Initialize and enable DDR ECC.
- */
- ddr_enable_ecc(dram_size);
-#endif
- /*
- * SDRAM Initialization
- */
- sdram_init();
-
- puts(" DDR: ");
- return dram_size;
-}
-
-/*
- * Initialize Local Bus
- */
-void
-local_bus_init(void)
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile ccsr_gur_t *gur = &immap->im_gur;
- volatile ccsr_lbc_t *lbc = &immap->im_lbc;
-
- uint clkdiv;
- uint lbc_hz;
- sys_info_t sysinfo;
-
- get_sys_info(&sysinfo);
- clkdiv = (lbc->lcrr & 0x0f) * 2;
- lbc_hz = sysinfo.freqSystemBus / 1000000 / clkdiv;
-
- gur->lbiuiplldcr1 = 0x00078080;
- if (clkdiv == 16) {
- gur->lbiuiplldcr0 = 0x7c0f1bf0;
- } else if (clkdiv == 8) {
- gur->lbiuiplldcr0 = 0x6c0f1bf0;
- } else if (clkdiv == 4) {
- gur->lbiuiplldcr0 = 0x5c0f1bf0;
- }
-
- lbc->lcrr |= 0x00030000;
-
- asm("sync;isync;msync");
-}
-
-/*
- * Initialize SDRAM memory on the Local Bus.
- */
-void
-sdram_init(void)
-{
-#if defined(CFG_OR2_PRELIM) && defined(CFG_BR2_PRELIM)
-
- uint idx;
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile ccsr_lbc_t *lbc = &immap->im_lbc;
- uint *sdram_addr = (uint *)CFG_LBC_SDRAM_BASE;
- uint cpu_board_rev;
- uint lsdmr_common;
-
- puts(" SDRAM: ");
-
- print_size (CFG_LBC_SDRAM_SIZE * 1024 * 1024, "\n");
-
- /*
- * Setup SDRAM Base and Option Registers
- */
- lbc->or2 = CFG_OR2_PRELIM;
- asm("msync");
-
- lbc->br2 = CFG_BR2_PRELIM;
- asm("msync");
-
- lbc->lbcr = CFG_LBC_LBCR;
- asm("msync");
-
-
- lbc->lsrt = CFG_LBC_LSRT;
- lbc->mrtpr = CFG_LBC_MRTPR;
- asm("msync");
-
- /*
- * MPC8548 uses "new" 15-16 style addressing.
- */
- cpu_board_rev = get_cpu_board_revision();
- lsdmr_common = CFG_LBC_LSDMR_COMMON;
- lsdmr_common |= CFG_LBC_LSDMR_BSMA1516;
-
- /*
- * Issue PRECHARGE ALL command.
- */
- lbc->lsdmr = lsdmr_common | CFG_LBC_LSDMR_OP_PCHALL;
- asm("sync;msync");
- *sdram_addr = 0xff;
- ppcDcbf((unsigned long) sdram_addr);
- udelay(100);
-
- /*
- * Issue 8 AUTO REFRESH commands.
- */
- for (idx = 0; idx < 8; idx++) {
- lbc->lsdmr = lsdmr_common | CFG_LBC_LSDMR_OP_ARFRSH;
- asm("sync;msync");
- *sdram_addr = 0xff;
- ppcDcbf((unsigned long) sdram_addr);
- udelay(100);
- }
-
- /*
- * Issue 8 MODE-set command.
- */
- lbc->lsdmr = lsdmr_common | CFG_LBC_LSDMR_OP_MRW;
- asm("sync;msync");
- *sdram_addr = 0xff;
- ppcDcbf((unsigned long) sdram_addr);
- udelay(100);
-
- /*
- * Issue NORMAL OP command.
- */
- lbc->lsdmr = lsdmr_common | CFG_LBC_LSDMR_OP_NORMAL;
- asm("sync;msync");
- *sdram_addr = 0xff;
- ppcDcbf((unsigned long) sdram_addr);
- udelay(200); /* Overkill. Must wait > 200 bus cycles */
-
-#endif /* enable SDRAM init */
-}
-
-#if defined(CFG_DRAM_TEST)
-int
-testdram(void)
-{
- uint *pstart = (uint *) CFG_MEMTEST_START;
- uint *pend = (uint *) CFG_MEMTEST_END;
- uint *p;
-
- printf("Testing DRAM from 0x%08x to 0x%08x\n",
- CFG_MEMTEST_START,
- CFG_MEMTEST_END);
-
- printf("DRAM test phase 1:\n");
- for (p = pstart; p < pend; p++)
- *p = 0xaaaaaaaa;
-
- for (p = pstart; p < pend; p++) {
- if (*p != 0xaaaaaaaa) {
- printf ("DRAM test fails at: %08x\n", (uint) p);
- return 1;
- }
- }
-
- printf("DRAM test phase 2:\n");
- for (p = pstart; p < pend; p++)
- *p = 0x55555555;
-
- for (p = pstart; p < pend; p++) {
- if (*p != 0x55555555) {
- printf ("DRAM test fails at: %08x\n", (uint) p);
- return 1;
- }
- }
-
- printf("DRAM test passed.\n");
- return 0;
-}
-#endif
-
-#if defined(CONFIG_PCI)
-
-/*
- * Initialize PCI Devices, report devices found.
- */
-
-#ifndef CONFIG_PCI_PNP
-static struct pci_config_table pci_mpc85xxcds_config_table[] = {
- { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
- PCI_IDSEL_NUMBER, PCI_ANY_ID,
- pci_cfgfunc_config_device, { PCI_ENET0_IOADDR,
- PCI_ENET0_MEMADDR,
- PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER
- } },
- { }
-};
-#endif
-
-static struct pci_controller hose = {
-#ifndef CONFIG_PCI_PNP
- config_table: pci_mpc85xxcds_config_table,
-#endif
-};
-
-#endif /* CONFIG_PCI */
-
-void
-pci_init_board(void)
-{
-#ifdef CONFIG_PCI
- extern void pci_mpc85xx_init(struct pci_controller *hose);
-
- pci_mpc85xx_init(&hose);
-#endif
-}
diff --git a/board/cds/mpc8548cds/u-boot.lds b/board/cds/mpc8548cds/u-boot.lds
deleted file mode 100644
index 2c8fe9603d..0000000000
--- a/board/cds/mpc8548cds/u-boot.lds
+++ /dev/null
@@ -1,149 +0,0 @@
-/*
- * Copyright 2004 Freescale Semiconductor.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- .resetvec 0xFFFFFFFC :
- {
- *(.resetvec)
- } = 0xffff
-
- .bootpg 0xFFFFF000 :
- {
- cpu/mpc85xx/start.o (.bootpg)
- board/cds/mpc8548cds/init.o (.bootpg)
- } = 0xffff
-
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc85xx/start.o (.text)
- board/cds/mpc8548cds/init.o (.text)
- cpu/mpc85xx/traps.o (.text)
- cpu/mpc85xx/interrupts.o (.text)
- cpu/mpc85xx/cpu_init.o (.text)
- cpu/mpc85xx/cpu.o (.text)
- cpu/mpc85xx/speed.o (.text)
- cpu/mpc85xx/pci.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/extable.o (.text)
- lib_generic/zlib.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/cds/mpc8555cds/Makefile b/board/cds/mpc8555cds/Makefile
deleted file mode 100644
index 0d4abbd71d..0000000000
--- a/board/cds/mpc8555cds/Makefile
+++ /dev/null
@@ -1,51 +0,0 @@
-#
-# Copyright 2004 Freescale Semiconductor.
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := $(BOARD).o \
- ../common/cadmus.o \
- ../common/eeprom.o
-
-SOBJS := init.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(OBJS) $(SOBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/cds/mpc8555cds/config.mk b/board/cds/mpc8555cds/config.mk
deleted file mode 100644
index 5dcaa774db..0000000000
--- a/board/cds/mpc8555cds/config.mk
+++ /dev/null
@@ -1,30 +0,0 @@
-#
-# Copyright 2004 Freescale Semiconductor.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# mpc8555cds board
-#
-TEXT_BASE = 0xfff80000
-
-PLATFORM_CPPFLAGS += -DCONFIG_E500=1
-PLATFORM_CPPFLAGS += -DCONFIG_MPC85xx=1
-PLATFORM_CPPFLAGS += -DCONFIG_MPC8555=1
diff --git a/board/cds/mpc8555cds/init.S b/board/cds/mpc8555cds/init.S
deleted file mode 100644
index 53dcd0d762..0000000000
--- a/board/cds/mpc8555cds/init.S
+++ /dev/null
@@ -1,255 +0,0 @@
-/*
- * Copyright 2004 Freescale Semiconductor.
- * Copyright 2002,2003, Motorola Inc.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <ppc_asm.tmpl>
-#include <ppc_defs.h>
-#include <asm/cache.h>
-#include <asm/mmu.h>
-#include <config.h>
-#include <mpc85xx.h>
-
-
-/*
- * TLB0 and TLB1 Entries
- *
- * Out of reset, TLB1's Entry 0 maps the highest 4K for CCSRBAR.
- * However, CCSRBAR is then relocated to CFG_CCSRBAR right after
- * these TLB entries are established.
- *
- * The TLB entries for DDR are dynamically setup in spd_sdram()
- * and use TLB1 Entries 8 through 15 as needed according to the
- * size of DDR memory.
- *
- * MAS0: tlbsel, esel, nv
- * MAS1: valid, iprot, tid, ts, tsize
- * MAS2: epn, sharen, x0, x1, w, i, m, g, e
- * MAS3: rpn, u0-u3, ux, sx, uw, sw, ur, sr
- */
-
-#define entry_start \
- mflr r1 ; \
- bl 0f ;
-
-#define entry_end \
-0: mflr r0 ; \
- mtlr r1 ; \
- blr ;
-
-
- .section .bootpg, "ax"
- .globl tlb1_entry
-tlb1_entry:
- entry_start
-
- /*
- * Number of TLB0 and TLB1 entries in the following table
- */
- .long 13
-
-#if (CFG_CCSRBAR_DEFAULT != CFG_CCSRBAR)
- /*
- * TLB0 4K Non-cacheable, guarded
- * 0xff700000 4K Initial CCSRBAR mapping
- *
- * This ends up at a TLB0 Index==0 entry, and must not collide
- * with other TLB0 Entries.
- */
- .long TLB1_MAS0(0, 0, 0)
- .long TLB1_MAS1(1, 0, 0, 0, 0)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_CCSRBAR_DEFAULT), 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_CCSRBAR_DEFAULT), 0,0,0,0,0,1,0,1,0,1)
-#else
-#error("Update the number of table entries in tlb1_entry")
-#endif
-
- /*
- * TLB0 16K Cacheable, non-guarded
- * 0xd001_0000 16K Temporary Global data for initialization
- *
- * Use four 4K TLB0 entries. These entries must be cacheable
- * as they provide the bootstrap memory before the memory
- * controler and real memory have been configured.
- *
- * These entries end up at TLB0 Indicies 0x10, 0x14, 0x18 and 0x1c,
- * and must not collide with other TLB0 entries.
- */
- .long TLB1_MAS0(0, 0, 0)
- .long TLB1_MAS1(1, 0, 0, 0, 0)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_INIT_RAM_ADDR),
- 0,0,0,0,0,0,0,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_INIT_RAM_ADDR),
- 0,0,0,0,0,1,0,1,0,1)
-
- .long TLB1_MAS0(0, 0, 0)
- .long TLB1_MAS1(1, 0, 0, 0, 0)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_INIT_RAM_ADDR + 4 * 1024),
- 0,0,0,0,0,0,0,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_INIT_RAM_ADDR + 4 * 1024),
- 0,0,0,0,0,1,0,1,0,1)
-
- .long TLB1_MAS0(0, 0, 0)
- .long TLB1_MAS1(1, 0, 0, 0, 0)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_INIT_RAM_ADDR + 8 * 1024),
- 0,0,0,0,0,0,0,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_INIT_RAM_ADDR + 8 * 1024),
- 0,0,0,0,0,1,0,1,0,1)
-
- .long TLB1_MAS0(0, 0, 0)
- .long TLB1_MAS1(1, 0, 0, 0, 0)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_INIT_RAM_ADDR + 12 * 1024),
- 0,0,0,0,0,0,0,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_INIT_RAM_ADDR + 12 * 1024),
- 0,0,0,0,0,1,0,1,0,1)
-
-
- /*
- * TLB 0: 16M Non-cacheable, guarded
- * 0xff000000 16M FLASH
- * Out of reset this entry is only 4K.
- */
- .long TLB1_MAS0(1, 0, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_16M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_FLASH_BASE), 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_FLASH_BASE), 0,0,0,0,0,1,0,1,0,1)
-
- /*
- * TLB 1: 256M Non-cacheable, guarded
- * 0x80000000 256M PCI1 MEM First half
- */
- .long TLB1_MAS0(1, 1, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_PCI1_MEM_BASE), 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_PCI1_MEM_BASE), 0,0,0,0,0,1,0,1,0,1)
-
- /*
- * TLB 2: 256M Non-cacheable, guarded
- * 0x90000000 256M PCI1 MEM Second half
- */
- .long TLB1_MAS0(1, 2, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_PCI1_MEM_BASE + 0x10000000),
- 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_PCI1_MEM_BASE + 0x10000000),
- 0,0,0,0,0,1,0,1,0,1)
-
- /*
- * TLB 3: 256M Non-cacheable, guarded
- * 0xa0000000 256M PCI2 MEM First half
- */
- .long TLB1_MAS0(1, 3, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_PCI2_MEM_BASE), 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_PCI2_MEM_BASE), 0,0,0,0,0,1,0,1,0,1)
-
- /*
- * TLB 4: 256M Non-cacheable, guarded
- * 0xb0000000 256M PCI2 MEM Second half
- */
- .long TLB1_MAS0(1, 4, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_PCI2_MEM_BASE + 0x10000000),
- 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_PCI2_MEM_BASE + 0x10000000),
- 0,0,0,0,0,1,0,1,0,1)
-
- /*
- * TLB 5: 64M Non-cacheable, guarded
- * 0xe000_0000 1M CCSRBAR
- * 0xe200_0000 16M PCI1 IO
- * 0xe300_0000 16M PCI2 IO
- */
- .long TLB1_MAS0(1, 5, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_64M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_CCSRBAR), 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_CCSRBAR), 0,0,0,0,0,1,0,1,0,1)
-
- /*
- * TLB 6: 64M Cacheable, non-guarded
- * 0xf000_0000 64M LBC SDRAM
- */
- .long TLB1_MAS0(1, 6, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_64M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_LBC_SDRAM_BASE), 0,0,0,0,0,0,0,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_LBC_SDRAM_BASE), 0,0,0,0,0,1,0,1,0,1)
-
- /*
- * TLB 7: 1M Non-cacheable, guarded
- * 0xf8000000 1M CADMUS registers
- */
- .long TLB1_MAS0(1, 7, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_1M)
- .long TLB1_MAS2(E500_TLB_EPN(CADMUS_BASE_ADDR), 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CADMUS_BASE_ADDR), 0,0,0,0,0,1,0,1,0,1)
-
- entry_end
-
-/*
- * LAW(Local Access Window) configuration:
- *
- * 0x0000_0000 0x7fff_ffff DDR 2G
- * 0x8000_0000 0x9fff_ffff PCI1 MEM 512M
- * 0xa000_0000 0xbfff_ffff PCI2 MEM 512M
- * 0xe000_0000 0xe000_ffff CCSR 1M
- * 0xe200_0000 0xe2ff_ffff PCI1 IO 16M
- * 0xe300_0000 0xe3ff_ffff PCI2 IO 16M
- * 0xf000_0000 0xf7ff_ffff SDRAM 128M
- * 0xf800_0000 0xf80f_ffff NVRAM/CADMUS (*) 1M
- * 0xff00_0000 0xff7f_ffff FLASH (2nd bank) 8M
- * 0xff80_0000 0xffff_ffff FLASH (boot bank) 8M
- *
- * Notes:
- * CCSRBAR and L2-as-SRAM don't need a configured Local Access Window.
- * If flash is 8M at default position (last 8M), no LAW needed.
- *
- * The defines below are 1-off of the actual LAWAR0 usage.
- * So LAWAR3 define uses the LAWAR4 register in the ECM.
- */
-
-#define LAWBAR0 0
-#define LAWAR0 ((LAWAR_TRGT_IF_DDR | (LAWAR_SIZE & LAWAR_SIZE_128M)) & ~LAWAR_EN)
-
-#define LAWBAR1 ((CFG_PCI1_MEM_BASE>>12) & 0xfffff)
-#define LAWAR1 (LAWAR_EN | LAWAR_TRGT_IF_PCI1 | (LAWAR_SIZE & LAWAR_SIZE_512M))
-
-#define LAWBAR2 ((CFG_PCI2_MEM_BASE>>12) & 0xfffff)
-#define LAWAR2 (LAWAR_EN | LAWAR_TRGT_IF_PCI2 | (LAWAR_SIZE & LAWAR_SIZE_512M))
-
-#define LAWBAR3 ((CFG_PCI1_IO_BASE>>12) & 0xfffff)
-#define LAWAR3 (LAWAR_EN | LAWAR_TRGT_IF_PCI1 | (LAWAR_SIZE & LAWAR_SIZE_16M))
-
-#define LAWBAR4 ((CFG_PCI2_IO_BASE>>12) & 0xfffff)
-#define LAWAR4 (LAWAR_EN | LAWAR_TRGT_IF_PCI2 | (LAWAR_SIZE & LAWAR_SIZE_16M))
-
-/* LBC window - maps 256M 0xf0000000 -> 0xffffffff */
-#define LAWBAR5 ((CFG_LBC_SDRAM_BASE>>12) & 0xfffff)
-#define LAWAR5 (LAWAR_EN | LAWAR_TRGT_IF_LBC | (LAWAR_SIZE & LAWAR_SIZE_256M))
-
- .section .bootpg, "ax"
- .globl law_entry
-
-law_entry:
- entry_start
- .long 6
- .long LAWBAR0,LAWAR0,LAWBAR1,LAWAR1,LAWBAR2,LAWAR2,LAWBAR3,LAWAR3
- .long LAWBAR4,LAWAR4,LAWBAR5,LAWAR5
- entry_end
diff --git a/board/cds/mpc8555cds/mpc8555cds.c b/board/cds/mpc8555cds/mpc8555cds.c
deleted file mode 100644
index 18adf5b9e6..0000000000
--- a/board/cds/mpc8555cds/mpc8555cds.c
+++ /dev/null
@@ -1,501 +0,0 @@
-/*
- * Copyright 2004 Freescale Semiconductor.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <pci.h>
-#include <asm/processor.h>
-#include <asm/immap_85xx.h>
-#include <ioports.h>
-#include <spd.h>
-
-#include "../common/cadmus.h"
-#include "../common/eeprom.h"
-
-#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
-extern void ddr_enable_ecc(unsigned int dram_size);
-#endif
-
-extern long int spd_sdram(void);
-
-void local_bus_init(void);
-void sdram_init(void);
-
-/*
- * I/O Port configuration table
- *
- * if conf is 1, then that port pin will be configured at boot time
- * according to the five values podr/pdir/ppar/psor/pdat for that entry
- */
-
-const iop_conf_t iop_conf_tab[4][32] = {
-
- /* Port A configuration */
- { /* conf ppar psor pdir podr pdat */
- /* PA31 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 TxENB */
- /* PA30 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 TxClav */
- /* PA29 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 TxSOC */
- /* PA28 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 RxENB */
- /* PA27 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 RxSOC */
- /* PA26 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 RxClav */
- /* PA25 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[0] */
- /* PA24 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[1] */
- /* PA23 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[2] */
- /* PA22 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[3] */
- /* PA21 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[4] */
- /* PA20 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[5] */
- /* PA19 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[6] */
- /* PA18 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[7] */
- /* PA17 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[7] */
- /* PA16 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[6] */
- /* PA15 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[5] */
- /* PA14 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[4] */
- /* PA13 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[3] */
- /* PA12 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[2] */
- /* PA11 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[1] */
- /* PA10 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[0] */
- /* PA9 */ { 0, 1, 1, 1, 0, 0 }, /* FCC1 L1TXD */
- /* PA8 */ { 0, 1, 1, 0, 0, 0 }, /* FCC1 L1RXD */
- /* PA7 */ { 0, 0, 0, 1, 0, 0 }, /* PA7 */
- /* PA6 */ { 0, 1, 1, 1, 0, 0 }, /* TDM A1 L1RSYNC */
- /* PA5 */ { 0, 0, 0, 1, 0, 0 }, /* PA5 */
- /* PA4 */ { 0, 0, 0, 1, 0, 0 }, /* PA4 */
- /* PA3 */ { 0, 0, 0, 1, 0, 0 }, /* PA3 */
- /* PA2 */ { 0, 0, 0, 1, 0, 0 }, /* PA2 */
- /* PA1 */ { 1, 0, 0, 0, 0, 0 }, /* FREERUN */
- /* PA0 */ { 0, 0, 0, 1, 0, 0 } /* PA0 */
- },
-
- /* Port B configuration */
- { /* conf ppar psor pdir podr pdat */
- /* PB31 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TX_ER */
- /* PB30 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_DV */
- /* PB29 */ { 1, 1, 1, 1, 0, 0 }, /* FCC2 MII TX_EN */
- /* PB28 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_ER */
- /* PB27 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII COL */
- /* PB26 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII CRS */
- /* PB25 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[3] */
- /* PB24 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[2] */
- /* PB23 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[1] */
- /* PB22 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[0] */
- /* PB21 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[0] */
- /* PB20 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[1] */
- /* PB19 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[2] */
- /* PB18 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[3] */
- /* PB17 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:RX_DIV */
- /* PB16 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:RX_ERR */
- /* PB15 */ { 0, 1, 0, 1, 0, 0 }, /* FCC3:TX_ERR */
- /* PB14 */ { 0, 1, 0, 1, 0, 0 }, /* FCC3:TX_EN */
- /* PB13 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:COL */
- /* PB12 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:CRS */
- /* PB11 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:RXD */
- /* PB10 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:RXD */
- /* PB9 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:RXD */
- /* PB8 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:RXD */
- /* PB7 */ { 0, 1, 0, 1, 0, 0 }, /* FCC3:TXD */
- /* PB6 */ { 0, 1, 0, 1, 0, 0 }, /* FCC3:TXD */
- /* PB5 */ { 0, 1, 0, 1, 0, 0 }, /* FCC3:TXD */
- /* PB4 */ { 0, 1, 0, 1, 0, 0 }, /* FCC3:TXD */
- /* PB3 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PB2 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PB1 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PB0 */ { 0, 0, 0, 0, 0, 0 } /* pin doesn't exist */
- },
-
- /* Port C */
- { /* conf ppar psor pdir podr pdat */
- /* PC31 */ { 0, 0, 0, 1, 0, 0 }, /* PC31 */
- /* PC30 */ { 0, 0, 0, 1, 0, 0 }, /* PC30 */
- /* PC29 */ { 0, 1, 1, 0, 0, 0 }, /* SCC1 EN *CLSN */
- /* PC28 */ { 0, 0, 0, 1, 0, 0 }, /* PC28 */
- /* PC27 */ { 0, 0, 0, 1, 0, 0 }, /* UART Clock in */
- /* PC26 */ { 0, 0, 0, 1, 0, 0 }, /* PC26 */
- /* PC25 */ { 0, 0, 0, 1, 0, 0 }, /* PC25 */
- /* PC24 */ { 0, 0, 0, 1, 0, 0 }, /* PC24 */
- /* PC23 */ { 0, 1, 0, 1, 0, 0 }, /* ATMTFCLK */
- /* PC22 */ { 0, 1, 0, 0, 0, 0 }, /* ATMRFCLK */
- /* PC21 */ { 0, 1, 0, 0, 0, 0 }, /* SCC1 EN RXCLK */
- /* PC20 */ { 0, 1, 0, 0, 0, 0 }, /* SCC1 EN TXCLK */
- /* PC19 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_CLK CLK13 */
- /* PC18 */ { 1, 1, 0, 0, 0, 0 }, /* FCC Tx Clock (CLK14) */
- /* PC17 */ { 0, 0, 0, 1, 0, 0 }, /* PC17 */
- /* PC16 */ { 0, 1, 0, 0, 0, 0 }, /* FCC Tx Clock (CLK16) */
- /* PC15 */ { 1, 1, 0, 0, 0, 0 }, /* PC15 */
- /* PC14 */ { 0, 1, 0, 0, 0, 0 }, /* SCC1 EN *CD */
- /* PC13 */ { 0, 0, 0, 1, 0, 0 }, /* PC13 */
- /* PC12 */ { 0, 1, 0, 1, 0, 0 }, /* PC12 */
- /* PC11 */ { 0, 0, 0, 1, 0, 0 }, /* LXT971 transmit control */
- /* PC10 */ { 1, 0, 0, 1, 0, 0 }, /* FETHMDC */
- /* PC9 */ { 1, 0, 0, 0, 0, 0 }, /* FETHMDIO */
- /* PC8 */ { 0, 0, 0, 1, 0, 0 }, /* PC8 */
- /* PC7 */ { 0, 0, 0, 1, 0, 0 }, /* PC7 */
- /* PC6 */ { 0, 0, 0, 1, 0, 0 }, /* PC6 */
- /* PC5 */ { 0, 0, 0, 1, 0, 0 }, /* PC5 */
- /* PC4 */ { 0, 0, 0, 1, 0, 0 }, /* PC4 */
- /* PC3 */ { 0, 0, 0, 1, 0, 0 }, /* PC3 */
- /* PC2 */ { 0, 0, 0, 1, 0, 1 }, /* ENET FDE */
- /* PC1 */ { 0, 0, 0, 1, 0, 0 }, /* ENET DSQE */
- /* PC0 */ { 0, 0, 0, 1, 0, 0 }, /* ENET LBK */
- },
-
- /* Port D */
- { /* conf ppar psor pdir podr pdat */
- /* PD31 */ { 1, 1, 0, 0, 0, 0 }, /* SCC1 EN RxD */
- /* PD30 */ { 1, 1, 1, 1, 0, 0 }, /* SCC1 EN TxD */
- /* PD29 */ { 1, 1, 0, 1, 0, 0 }, /* SCC1 EN TENA */
- /* PD28 */ { 0, 1, 0, 0, 0, 0 }, /* PD28 */
- /* PD27 */ { 0, 1, 1, 1, 0, 0 }, /* PD27 */
- /* PD26 */ { 0, 0, 0, 1, 0, 0 }, /* PD26 */
- /* PD25 */ { 0, 0, 0, 1, 0, 0 }, /* PD25 */
- /* PD24 */ { 0, 0, 0, 1, 0, 0 }, /* PD24 */
- /* PD23 */ { 0, 0, 0, 1, 0, 0 }, /* PD23 */
- /* PD22 */ { 0, 0, 0, 1, 0, 0 }, /* PD22 */
- /* PD21 */ { 0, 0, 0, 1, 0, 0 }, /* PD21 */
- /* PD20 */ { 0, 0, 0, 1, 0, 0 }, /* PD20 */
- /* PD19 */ { 0, 0, 0, 1, 0, 0 }, /* PD19 */
- /* PD18 */ { 0, 0, 0, 1, 0, 0 }, /* PD18 */
- /* PD17 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXPRTY */
- /* PD16 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXPRTY */
- /* PD15 */ { 0, 1, 1, 0, 1, 0 }, /* I2C SDA */
- /* PD14 */ { 0, 0, 0, 1, 0, 0 }, /* LED */
- /* PD13 */ { 0, 0, 0, 0, 0, 0 }, /* PD13 */
- /* PD12 */ { 0, 0, 0, 0, 0, 0 }, /* PD12 */
- /* PD11 */ { 0, 0, 0, 0, 0, 0 }, /* PD11 */
- /* PD10 */ { 0, 0, 0, 0, 0, 0 }, /* PD10 */
- /* PD9 */ { 0, 1, 0, 1, 0, 0 }, /* SMC1 TXD */
- /* PD8 */ { 0, 1, 0, 0, 0, 0 }, /* SMC1 RXD */
- /* PD7 */ { 0, 0, 0, 1, 0, 1 }, /* PD7 */
- /* PD6 */ { 0, 0, 0, 1, 0, 1 }, /* PD6 */
- /* PD5 */ { 0, 0, 0, 1, 0, 1 }, /* PD5 */
- /* PD4 */ { 0, 0, 0, 1, 0, 1 }, /* PD4 */
- /* PD3 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PD2 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PD1 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PD0 */ { 0, 0, 0, 0, 0, 0 } /* pin doesn't exist */
- }
-};
-
-int board_early_init_f (void)
-{
- return 0;
-}
-
-int checkboard (void)
-{
- volatile immap_t *immap = (immap_t *) CFG_CCSRBAR;
- volatile ccsr_gur_t *gur = &immap->im_gur;
-
- /* PCI slot in USER bits CSR[6:7] by convention. */
- uint pci_slot = get_pci_slot ();
-
- uint pci_dual = get_pci_dual (); /* PCI DUAL in CM_PCI[3] */
- uint pci1_32 = gur->pordevsr & 0x10000; /* PORDEVSR[15] */
- uint pci1_clk_sel = gur->porpllsr & 0x8000; /* PORPLLSR[16] */
- uint pci2_clk_sel = gur->porpllsr & 0x4000; /* PORPLLSR[17] */
-
- uint pci1_speed = get_clock_freq (); /* PCI PSPEED in [4:5] */
-
- uint cpu_board_rev = get_cpu_board_revision ();
-
- printf ("Board: CDS Version 0x%02x, PCI Slot %d\n",
- get_board_version (), pci_slot);
-
- printf ("CPU Board Revision %d.%d (0x%04x)\n",
- MPC85XX_CPU_BOARD_MAJOR (cpu_board_rev),
- MPC85XX_CPU_BOARD_MINOR (cpu_board_rev), cpu_board_rev);
-
- printf (" PCI1: %d bit, %s MHz, %s\n",
- (pci1_32) ? 32 : 64,
- (pci1_speed == 33000000) ? "33" :
- (pci1_speed == 66000000) ? "66" : "unknown",
- pci1_clk_sel ? "sync" : "async");
-
- if (pci_dual) {
- printf (" PCI2: 32 bit, 66 MHz, %s\n",
- pci2_clk_sel ? "sync" : "async");
- } else {
- printf (" PCI2: disabled\n");
- }
-
- /*
- * Initialize local bus.
- */
- local_bus_init ();
-
- return 0;
-}
-
-long int
-initdram(int board_type)
-{
- long dram_size = 0;
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
-
- puts("Initializing\n");
-
-#if defined(CONFIG_DDR_DLL)
- {
- /*
- * Work around to stabilize DDR DLL MSYNC_IN.
- * Errata DDR9 seems to have been fixed.
- * This is now the workaround for Errata DDR11:
- * Override DLL = 1, Course Adj = 1, Tap Select = 0
- */
-
- volatile ccsr_gur_t *gur= &immap->im_gur;
-
- gur->ddrdllcr = 0x81000000;
- asm("sync;isync;msync");
- udelay(200);
- }
-#endif
- dram_size = spd_sdram();
-
-#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
- /*
- * Initialize and enable DDR ECC.
- */
- ddr_enable_ecc(dram_size);
-#endif
- /*
- * SDRAM Initialization
- */
- sdram_init();
-
- puts(" DDR: ");
- return dram_size;
-}
-
-/*
- * Initialize Local Bus
- */
-void
-local_bus_init(void)
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile ccsr_gur_t *gur = &immap->im_gur;
- volatile ccsr_lbc_t *lbc = &immap->im_lbc;
-
- uint clkdiv;
- uint lbc_hz;
- sys_info_t sysinfo;
- uint temp_lbcdll;
-
- /*
- * Errata LBC11.
- * Fix Local Bus clock glitch when DLL is enabled.
- *
- * If localbus freq is < 66Mhz, DLL bypass mode must be used.
- * If localbus freq is > 133Mhz, DLL can be safely enabled.
- * Between 66 and 133, the DLL is enabled with an override workaround.
- */
-
- get_sys_info(&sysinfo);
- clkdiv = lbc->lcrr & 0x0f;
- lbc_hz = sysinfo.freqSystemBus / 1000000 / clkdiv;
-
- if (lbc_hz < 66) {
- lbc->lcrr |= 0x80000000; /* DLL Bypass */
-
- } else if (lbc_hz >= 133) {
- lbc->lcrr &= (~0x80000000); /* DLL Enabled */
-
- } else {
- lbc->lcrr &= (~0x8000000); /* DLL Enabled */
- udelay(200);
-
- /*
- * Sample LBC DLL ctrl reg, upshift it to set the
- * override bits.
- */
- temp_lbcdll = gur->lbcdllcr;
- gur->lbcdllcr = (((temp_lbcdll & 0xff) << 16) | 0x80000000);
- asm("sync;isync;msync");
- }
-}
-
-/*
- * Initialize SDRAM memory on the Local Bus.
- */
-void
-sdram_init(void)
-{
-#if defined(CFG_OR2_PRELIM) && defined(CFG_BR2_PRELIM)
-
- uint idx;
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile ccsr_lbc_t *lbc = &immap->im_lbc;
- uint *sdram_addr = (uint *)CFG_LBC_SDRAM_BASE;
- uint cpu_board_rev;
- uint lsdmr_common;
-
- puts(" SDRAM: ");
-
- print_size (CFG_LBC_SDRAM_SIZE * 1024 * 1024, "\n");
-
- /*
- * Setup SDRAM Base and Option Registers
- */
- lbc->or2 = CFG_OR2_PRELIM;
- asm("msync");
-
- lbc->br2 = CFG_BR2_PRELIM;
- asm("msync");
-
- lbc->lbcr = CFG_LBC_LBCR;
- asm("msync");
-
- lbc->lsrt = CFG_LBC_LSRT;
- lbc->mrtpr = CFG_LBC_MRTPR;
- asm("msync");
-
- /*
- * Determine which address lines to use baed on CPU board rev.
- */
- cpu_board_rev = get_cpu_board_revision();
- lsdmr_common = CFG_LBC_LSDMR_COMMON;
- if (cpu_board_rev == MPC85XX_CPU_BOARD_REV_1_0) {
- lsdmr_common |= CFG_LBC_LSDMR_BSMA1617;
- } else if (cpu_board_rev == MPC85XX_CPU_BOARD_REV_1_1) {
- lsdmr_common |= CFG_LBC_LSDMR_BSMA1516;
- } else {
- /*
- * Assume something unable to identify itself is
- * really old, and likely has lines 16/17 mapped.
- */
- lsdmr_common |= CFG_LBC_LSDMR_BSMA1617;
- }
-
- /*
- * Issue PRECHARGE ALL command.
- */
- lbc->lsdmr = lsdmr_common | CFG_LBC_LSDMR_OP_PCHALL;
- asm("sync;msync");
- *sdram_addr = 0xff;
- ppcDcbf((unsigned long) sdram_addr);
- udelay(100);
-
- /*
- * Issue 8 AUTO REFRESH commands.
- */
- for (idx = 0; idx < 8; idx++) {
- lbc->lsdmr = lsdmr_common | CFG_LBC_LSDMR_OP_ARFRSH;
- asm("sync;msync");
- *sdram_addr = 0xff;
- ppcDcbf((unsigned long) sdram_addr);
- udelay(100);
- }
-
- /*
- * Issue 8 MODE-set command.
- */
- lbc->lsdmr = lsdmr_common | CFG_LBC_LSDMR_OP_MRW;
- asm("sync;msync");
- *sdram_addr = 0xff;
- ppcDcbf((unsigned long) sdram_addr);
- udelay(100);
-
- /*
- * Issue NORMAL OP command.
- */
- lbc->lsdmr = lsdmr_common | CFG_LBC_LSDMR_OP_NORMAL;
- asm("sync;msync");
- *sdram_addr = 0xff;
- ppcDcbf((unsigned long) sdram_addr);
- udelay(200); /* Overkill. Must wait > 200 bus cycles */
-
-#endif /* enable SDRAM init */
-}
-
-#if defined(CFG_DRAM_TEST)
-int
-testdram(void)
-{
- uint *pstart = (uint *) CFG_MEMTEST_START;
- uint *pend = (uint *) CFG_MEMTEST_END;
- uint *p;
-
- printf("Testing DRAM from 0x%08x to 0x%08x\n",
- CFG_MEMTEST_START,
- CFG_MEMTEST_END);
-
- printf("DRAM test phase 1:\n");
- for (p = pstart; p < pend; p++)
- *p = 0xaaaaaaaa;
-
- for (p = pstart; p < pend; p++) {
- if (*p != 0xaaaaaaaa) {
- printf ("DRAM test fails at: %08x\n", (uint) p);
- return 1;
- }
- }
-
- printf("DRAM test phase 2:\n");
- for (p = pstart; p < pend; p++)
- *p = 0x55555555;
-
- for (p = pstart; p < pend; p++) {
- if (*p != 0x55555555) {
- printf ("DRAM test fails at: %08x\n", (uint) p);
- return 1;
- }
- }
-
- printf("DRAM test passed.\n");
- return 0;
-}
-#endif
-
-#if defined(CONFIG_PCI)
-
-/*
- * Initialize PCI Devices, report devices found.
- */
-
-#ifndef CONFIG_PCI_PNP
-static struct pci_config_table pci_mpc85xxcds_config_table[] = {
- { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
- PCI_IDSEL_NUMBER, PCI_ANY_ID,
- pci_cfgfunc_config_device, { PCI_ENET0_IOADDR,
- PCI_ENET0_MEMADDR,
- PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER
- } },
- { }
-};
-#endif
-
-static struct pci_controller hose = {
-#ifndef CONFIG_PCI_PNP
- config_table: pci_mpc85xxcds_config_table,
-#endif
-};
-
-#endif /* CONFIG_PCI */
-
-void
-pci_init_board(void)
-{
-#ifdef CONFIG_PCI
- extern void pci_mpc85xx_init(struct pci_controller *hose);
-
- pci_mpc85xx_init(&hose);
-#endif
-}
diff --git a/board/cds/mpc8555cds/u-boot.lds b/board/cds/mpc8555cds/u-boot.lds
deleted file mode 100644
index 2aa2ad78fc..0000000000
--- a/board/cds/mpc8555cds/u-boot.lds
+++ /dev/null
@@ -1,149 +0,0 @@
-/*
- * Copyright 2004 Freescale Semiconductor.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- .resetvec 0xFFFFFFFC :
- {
- *(.resetvec)
- } = 0xffff
-
- .bootpg 0xFFFFF000 :
- {
- cpu/mpc85xx/start.o (.bootpg)
- board/cds/mpc8555cds/init.o (.bootpg)
- } = 0xffff
-
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc85xx/start.o (.text)
- board/cds/mpc8555cds/init.o (.text)
- cpu/mpc85xx/traps.o (.text)
- cpu/mpc85xx/interrupts.o (.text)
- cpu/mpc85xx/cpu_init.o (.text)
- cpu/mpc85xx/cpu.o (.text)
- cpu/mpc85xx/speed.o (.text)
- cpu/mpc85xx/pci.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/extable.o (.text)
- lib_generic/zlib.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/cerf250/Makefile b/board/cerf250/Makefile
deleted file mode 100644
index 83e3ba458a..0000000000
--- a/board/cerf250/Makefile
+++ /dev/null
@@ -1,47 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := cerf250.o flash.o
-SOBJS := lowlevel_init.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS) $(SOBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/cerf250/cerf250.c b/board/cerf250/cerf250.c
deleted file mode 100644
index cc1bc16f6e..0000000000
--- a/board/cerf250/cerf250.c
+++ /dev/null
@@ -1,75 +0,0 @@
-/*
- * (C) Copyright 2002
- * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
- *
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-
-/* ------------------------------------------------------------------------- */
-
-
-/*
- * Miscelaneous platform dependent initialisations
- */
-
-int board_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- /* memory and cpu-speed are setup before relocation */
- /* so we do _nothing_ here */
-
- /* arch number of cerf PXA Board */
- gd->bd->bi_arch_number = MACH_TYPE_PXA_CERF;
-
- /* adress of boot parameters */
- gd->bd->bi_boot_params = 0xa0000100;
-
- return 0;
-}
-
-int board_late_init(void)
-{
- setenv("stdout", "serial");
- setenv("stderr", "serial");
- return 0;
-}
-
-
-int dram_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
- gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
- gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
- gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
- gd->bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE;
- gd->bd->bi_dram[3].start = PHYS_SDRAM_4;
- gd->bd->bi_dram[3].size = PHYS_SDRAM_4_SIZE;
-
- return 0;
-}
diff --git a/board/cerf250/config.mk b/board/cerf250/config.mk
deleted file mode 100644
index 1a86cc998e..0000000000
--- a/board/cerf250/config.mk
+++ /dev/null
@@ -1,5 +0,0 @@
-#
-# Cerf board with PXA250 cpu
-#
-#
-TEXT_BASE = 0xa3080000
diff --git a/board/cerf250/flash.c b/board/cerf250/flash.c
deleted file mode 100644
index ba82892dde..0000000000
--- a/board/cerf250/flash.c
+++ /dev/null
@@ -1,431 +0,0 @@
-/*
- * (C) Copyright 2001
- * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
- *
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <linux/byteorder/swab.h>
-
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/* Board support for 1 or 2 flash devices */
-#define FLASH_PORT_WIDTH32
-#undef FLASH_PORT_WIDTH16
-
-#ifdef FLASH_PORT_WIDTH16
-#define FLASH_PORT_WIDTH ushort
-#define FLASH_PORT_WIDTHV vu_short
-#define SWAP(x) __swab16(x)
-#else
-#define FLASH_PORT_WIDTH ulong
-#define FLASH_PORT_WIDTHV vu_long
-#define SWAP(x) __swab32(x)
-#endif
-
-#define FPW FLASH_PORT_WIDTH
-#define FPWV FLASH_PORT_WIDTHV
-
-#define mb() __asm__ __volatile__ ("" : : : "memory")
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (FPW *addr, flash_info_t *info);
-static int write_data (flash_info_t *info, ulong dest, FPW data);
-static void flash_get_offsets (ulong base, flash_info_t *info);
-void inline spin_wheel (void);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- int i;
- ulong size = 0;
-
- for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
- switch (i) {
- case 0:
- flash_get_size ((FPW *) PHYS_FLASH_1, &flash_info[i]);
- flash_get_offsets (PHYS_FLASH_1, &flash_info[i]);
- break;
- case 1:
- flash_get_size ((FPW *) PHYS_FLASH_2, &flash_info[i]);
- flash_get_offsets (PHYS_FLASH_2, &flash_info[i]);
- break;
- default:
- panic ("configured too many flash banks!\n");
- break;
- }
- size += flash_info[i].size;
- }
-
- /* Protect monitor and environment sectors
- */
- flash_protect ( FLAG_PROTECT_SET,
- CFG_FLASH_BASE,
- CFG_FLASH_BASE + monitor_flash_len - 1,
- &flash_info[0] );
-
- flash_protect ( FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0] );
-
- return size;
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_get_offsets (ulong base, flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- return;
- }
-
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
- for (i = 0; i < info->sector_count; i++) {
- info->start[i] = base + (i * PHYS_FLASH_SECT_SIZE);
- info->protect[i] = 0;
- }
- }
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_INTEL:
- printf ("INTEL ");
- break;
- default:
- printf ("Unknown Vendor ");
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_28F128J3A:
- printf ("28F128J3A\n");
- break;
- default:
- printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " ");
- }
- printf ("\n");
- return;
-}
-
-/*
- * The following code cannot be run from FLASH!
- */
-static ulong flash_get_size (FPW *addr, flash_info_t *info)
-{
- volatile FPW value;
-
- /* Write auto select command: read Manufacturer ID */
- addr[0x5555] = (FPW) 0x00AA00AA;
- addr[0x2AAA] = (FPW) 0x00550055;
- addr[0x5555] = (FPW) 0x00900090;
-
- mb ();
- value = addr[0];
-
- switch (value) {
-
- case (FPW) INTEL_MANUFACT:
- info->flash_id = FLASH_MAN_INTEL;
- break;
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
- return (0); /* no or unknown flash */
- }
-
- mb ();
- value = addr[1]; /* device ID */
-
- switch (value) {
-
- case (FPW) INTEL_ID_28F128J3A:
- info->flash_id += FLASH_28F128J3A;
- info->sector_count = 128;
- info->size = 0x02000000;
- break; /* => 16 MB */
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- break;
- }
-
- if (info->sector_count > CFG_MAX_FLASH_SECT) {
- printf ("** ERROR: sector count %d > max (%d) **\n",
- info->sector_count, CFG_MAX_FLASH_SECT);
- info->sector_count = CFG_MAX_FLASH_SECT;
- }
-
- addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
-
- return (info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- int flag, prot, sect;
- ulong type, start, last;
- int rcode = 0;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- type = (info->flash_id & FLASH_VENDMASK);
- if ((type != FLASH_MAN_INTEL)) {
- printf ("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- return 1;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- start = get_timer (0);
- last = start;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- FPWV *addr = (FPWV *) (info->start[sect]);
- FPW status;
-
- printf ("Erasing sector %2d ... ", sect);
-
- /* arm simple, non interrupt dependent timer */
- reset_timer_masked ();
-
- *addr = (FPW) 0x00500050; /* clear status register */
- *addr = (FPW) 0x00200020; /* erase setup */
- *addr = (FPW) 0x00D000D0; /* erase confirm */
-
- while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
- if (get_timer_masked () > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- *addr = (FPW) 0x00B000B0; /* suspend erase */
- *addr = (FPW) 0x00FF00FF; /* reset to read mode */
- rcode = 1;
- break;
- }
- }
-
- *addr = 0x00500050; /* clear status register cmd. */
- *addr = 0x00FF00FF; /* resest to read mode */
-
- printf (" done\n");
- }
- }
- return rcode;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- * 4 - Flash not identified
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp;
- FPW data;
- int count, i, l, rc, port_width;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- return 4;
- }
-/* get lower word aligned address */
-#ifdef FLASH_PORT_WIDTH16
- wp = (addr & ~1);
- port_width = 2;
-#else
- wp = (addr & ~3);
- port_width = 4;
-#endif
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i = 0, cp = wp; i < l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
- for (; i < port_width && cnt > 0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt == 0 && i < port_width; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
-
- if ((rc = write_data (info, wp, SWAP (data))) != 0) {
- return (rc);
- }
- wp += port_width;
- }
-
- /*
- * handle word aligned part
- */
- count = 0;
- while (cnt >= port_width) {
- data = 0;
- for (i = 0; i < port_width; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_data (info, wp, SWAP (data))) != 0) {
- return (rc);
- }
- wp += port_width;
- cnt -= port_width;
- if (count++ > 0x800) {
- spin_wheel ();
- count = 0;
- }
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i < port_width; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
-
- return (write_data (info, wp, SWAP (data)));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word or halfword to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_data (flash_info_t *info, ulong dest, FPW data)
-{
- FPWV *addr = (FPWV *) dest;
- ulong status;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*addr & data) != data) {
- printf ("not erased at %08lx (%lx)\n", (ulong) addr, *addr);
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
-
- *addr = (FPW) 0x00400040; /* write setup */
- *addr = data;
-
- /* arm simple, non interrupt dependent timer */
- reset_timer_masked ();
-
- /* wait while polling the status register */
- while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
- if (get_timer_masked () > CFG_FLASH_WRITE_TOUT) {
- *addr = (FPW) 0x00FF00FF; /* restore read mode */
- return (1);
- }
- }
-
- *addr = (FPW) 0x00FF00FF; /* restore read mode */
-
- return (0);
-}
-
-void inline spin_wheel (void)
-{
- static int p = 0;
- static char w[] = "\\/-";
-
- printf ("\010%c", w[p]);
- (++p == 3) ? (p = 0) : 0;
-}
diff --git a/board/cerf250/lowlevel_init.S b/board/cerf250/lowlevel_init.S
deleted file mode 100644
index c9b68d7ff3..0000000000
--- a/board/cerf250/lowlevel_init.S
+++ /dev/null
@@ -1,411 +0,0 @@
-/*
- * Most of this taken from Redboot hal_platform_setup.h with cleanup
- *
- * NOTE: I haven't clean this up considerably, just enough to get it
- * running. See hal_platform_setup.h for the source. See
- * board/cradle/lowlevel_init.S for another PXA250 setup that is
- * much cleaner.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <config.h>
-#include <version.h>
-#include <asm/arch/pxa-regs.h>
-
-DRAM_SIZE: .long CFG_DRAM_SIZE
-
-/* wait for coprocessor write complete */
- .macro CPWAIT reg
- mrc p15,0,\reg,c2,c0,0
- mov \reg,\reg
- sub pc,pc,#4
- .endm
-
-
-/*
- * Memory setup
- */
-
-.globl lowlevel_init
-lowlevel_init:
-
- /* Set up GPIO pins first ----------------------------------------- */
-
- ldr r0, =GPSR0
- ldr r1, =CFG_GPSR0_VAL
- str r1, [r0]
-
- ldr r0, =GPSR1
- ldr r1, =CFG_GPSR1_VAL
- str r1, [r0]
-
- ldr r0, =GPSR2
- ldr r1, =CFG_GPSR2_VAL
- str r1, [r0]
-
- ldr r0, =GPCR0
- ldr r1, =CFG_GPCR0_VAL
- str r1, [r0]
-
- ldr r0, =GPCR1
- ldr r1, =CFG_GPCR1_VAL
- str r1, [r0]
-
- ldr r0, =GPCR2
- ldr r1, =CFG_GPCR2_VAL
- str r1, [r0]
-
- ldr r0, =GPDR0
- ldr r1, =CFG_GPDR0_VAL
- str r1, [r0]
-
- ldr r0, =GPDR1
- ldr r1, =CFG_GPDR1_VAL
- str r1, [r0]
-
- ldr r0, =GPDR2
- ldr r1, =CFG_GPDR2_VAL
- str r1, [r0]
-
- ldr r0, =GAFR0_L
- ldr r1, =CFG_GAFR0_L_VAL
- str r1, [r0]
-
- ldr r0, =GAFR0_U
- ldr r1, =CFG_GAFR0_U_VAL
- str r1, [r0]
-
- ldr r0, =GAFR1_L
- ldr r1, =CFG_GAFR1_L_VAL
- str r1, [r0]
-
- ldr r0, =GAFR1_U
- ldr r1, =CFG_GAFR1_U_VAL
- str r1, [r0]
-
- ldr r0, =GAFR2_L
- ldr r1, =CFG_GAFR2_L_VAL
- str r1, [r0]
-
- ldr r0, =GAFR2_U
- ldr r1, =CFG_GAFR2_U_VAL
- str r1, [r0]
-
- ldr r0, =PSSR /* enable GPIO pins */
- ldr r1, =CFG_PSSR_VAL
- str r1, [r0]
-
- /* ---------------------------------------------------------------- */
- /* Enable memory interface */
- /* */
- /* The sequence below is based on the recommended init steps */
- /* detailed in the Intel PXA250 Operating Systems Developers Guide, */
- /* Chapter 10. */
- /* ---------------------------------------------------------------- */
-
- /* ---------------------------------------------------------------- */
- /* Step 1: Wait for at least 200 microsedonds to allow internal */
- /* clocks to settle. Only necessary after hard reset... */
- /* FIXME: can be optimized later */
- /* ---------------------------------------------------------------- */
-
- ldr r3, =OSCR /* reset the OS Timer Count to zero */
- mov r2, #0
- str r2, [r3]
- ldr r4, =0x300 /* really 0x2E1 is about 200usec, */
- /* so 0x300 should be plenty */
-1:
- ldr r2, [r3]
- cmp r4, r2
- bgt 1b
-
-mem_init:
-
- ldr r1, =MEMC_BASE /* get memory controller base addr. */
-
- /* ---------------------------------------------------------------- */
- /* Step 2a: Initialize Asynchronous static memory controller */
- /* ---------------------------------------------------------------- */
-
- /* MSC registers: timing, bus width, mem type */
-
- /* MSC0: nCS(0,1) */
- ldr r2, =CFG_MSC0_VAL
- str r2, [r1, #MSC0_OFFSET]
- ldr r2, [r1, #MSC0_OFFSET] /* read back to ensure */
- /* that data latches */
- /* MSC1: nCS(2,3) */
- ldr r2, =CFG_MSC1_VAL
- str r2, [r1, #MSC1_OFFSET]
- ldr r2, [r1, #MSC1_OFFSET]
-
- /* MSC2: nCS(4,5) */
- ldr r2, =CFG_MSC2_VAL
- str r2, [r1, #MSC2_OFFSET]
- ldr r2, [r1, #MSC2_OFFSET]
-
- /* ---------------------------------------------------------------- */
- /* Step 2b: Initialize Card Interface */
- /* ---------------------------------------------------------------- */
-
- /* MECR: Memory Expansion Card Register */
- ldr r2, =CFG_MECR_VAL
- str r2, [r1, #MECR_OFFSET]
- ldr r2, [r1, #MECR_OFFSET]
-
- /* MCMEM0: Card Interface slot 0 timing */
- ldr r2, =CFG_MCMEM0_VAL
- str r2, [r1, #MCMEM0_OFFSET]
- ldr r2, [r1, #MCMEM0_OFFSET]
-
- /* MCMEM1: Card Interface slot 1 timing */
- ldr r2, =CFG_MCMEM1_VAL
- str r2, [r1, #MCMEM1_OFFSET]
- ldr r2, [r1, #MCMEM1_OFFSET]
-
- /* MCATT0: Card Interface Attribute Space Timing, slot 0 */
- ldr r2, =CFG_MCATT0_VAL
- str r2, [r1, #MCATT0_OFFSET]
- ldr r2, [r1, #MCATT0_OFFSET]
-
- /* MCATT1: Card Interface Attribute Space Timing, slot 1 */
- ldr r2, =CFG_MCATT1_VAL
- str r2, [r1, #MCATT1_OFFSET]
- ldr r2, [r1, #MCATT1_OFFSET]
-
- /* MCIO0: Card Interface I/O Space Timing, slot 0 */
- ldr r2, =CFG_MCIO0_VAL
- str r2, [r1, #MCIO0_OFFSET]
- ldr r2, [r1, #MCIO0_OFFSET]
-
- /* MCIO1: Card Interface I/O Space Timing, slot 1 */
- ldr r2, =CFG_MCIO1_VAL
- str r2, [r1, #MCIO1_OFFSET]
- ldr r2, [r1, #MCIO1_OFFSET]
-
- /* ---------------------------------------------------------------- */
- /* Step 2c: Write FLYCNFG FIXME: what's that??? */
- /* ---------------------------------------------------------------- */
-
-
- /* ---------------------------------------------------------------- */
- /* Step 2d: Initialize Timing for Sync Memory (SDCLK0) */
- /* ---------------------------------------------------------------- */
-
- /* Before accessing MDREFR we need a valid DRI field, so we set */
- /* this to power on defaults + DRI field, set SDRAM clocks free running */
-
- ldr r3, =CFG_MDREFR_VAL
- ldr r2, =0xFFF
- and r3, r3, r2
-
- ldr r0, [r1, #MDREFR_OFFSET]
- bic r0, r0, r2
- bic r0, r0, #(MDREFR_K0FREE|MDREFR_K1FREE|MDREFR_K2FREE)
- orr r0, r0, r3
-
- str r0, [r1, #MDREFR_OFFSET] /* write back MDREFR */
-
-
- /* ---------------------------------------------------------------- */
- /* Step 3: Initialize Synchronous Static Memory (Flash/Peripherals) */
- /* ---------------------------------------------------------------- */
-
- /* Initialize SXCNFG register. Assert the enable bits */
-
- /* Write SXMRS to cause an MRS command to all enabled banks of */
- /* synchronous static memory. Note that SXLCR need not be written */
- /* at this time. */
-
- /* FIXME: we use async mode for now */
-
-
- /* ---------------------------------------------------------------- */
- /* Step 4: Initialize SDRAM */
- /* ---------------------------------------------------------------- */
-
- /* set MDREFR according to user define with exception of a few bits */
-
- ldr r4, =CFG_MDREFR_VAL
- ldr r2, =(MDREFR_K0RUN|MDREFR_K0DB2|MDREFR_K1RUN|MDREFR_K1DB2|\
- MDREFR_K2RUN |MDREFR_K2DB2)
- and r4, r4, r2
- bic r0, r0, r2
- orr r0, r0, r4
-
- str r0, [r1, #MDREFR_OFFSET] /* write back MDREFR */
- ldr r0, [r1, #MDREFR_OFFSET]
-
- /* Step 4b: de-assert MDREFR:SLFRSH. */
-
- bic r0, r0, #(MDREFR_SLFRSH)
- str r0, [r1, #MDREFR_OFFSET] /* write back MDREFR */
- ldr r0, [r1, #MDREFR_OFFSET]
-
-
- /* Step 4c: assert MDREFR:E1PIN and E0PIO as desired, set KXFREE */
-
- ldr r4, =CFG_MDREFR_VAL
- ldr r2, =(MDREFR_E0PIN|MDREFR_E1PIN|MDREFR_K0FREE| \
- MDREFR_K1FREE | MDREFR_K2FREE)
- and r4, r4, r2
- orr r0, r0, r4
- str r0, [r1, #MDREFR_OFFSET] /* write back MDREFR */
- ldr r0, [r1, #MDREFR_OFFSET]
-
-
- /* Step 4d: write MDCNFG with MDCNFG:DEx deasserted (set to 0), to */
- /* configure but not enable each SDRAM partition pair. */
-
- ldr r4, =CFG_MDCNFG_VAL
- bic r4, r4, #(MDCNFG_DE0|MDCNFG_DE1)
- bic r4, r4, #(MDCNFG_DE2|MDCNFG_DE3)
- str r4, [r1, #MDCNFG_OFFSET] /* write back MDCNFG */
- ldr r4, [r1, #MDCNFG_OFFSET]
-
-
- /* Step 4e: Wait for the clock to the SDRAMs to stabilize, */
- /* 100..200 µsec. */
-
- ldr r3, =OSCR /* reset the OS Timer Count to zero */
- mov r2, #0
- str r2, [r3]
- ldr r4, =0x300 /* really 0x2E1 is about 200usec, */
- /* so 0x300 should be plenty */
-1:
- ldr r2, [r3]
- cmp r4, r2
- bgt 1b
-
-
- /* Step 4f: Trigger a number (usually 8) refresh cycles by */
- /* attempting non-burst read or write accesses to disabled */
- /* SDRAM, as commonly specified in the power up sequence */
- /* documented in SDRAM data sheets. The address(es) used */
- /* for this purpose must not be cacheable. */
-
- ldr r3, =CFG_DRAM_BASE
-.rept 8
- str r2, [r3]
-.endr
-
- /* Step 4g: Write MDCNFG with enable bits asserted */
- /* (MDCNFG:DEx set to 1). */
-
- ldr r3, [r1, #MDCNFG_OFFSET]
- orr r3, r3, #(MDCNFG_DE0|MDCNFG_DE1)
- str r3, [r1, #MDCNFG_OFFSET]
-
- /* Step 4h: Write MDMRS. */
-
- ldr r2, =CFG_MDMRS_VAL
- str r2, [r1, #MDMRS_OFFSET]
-
-
- /* We are finished with Intel's memory controller initialisation */
-
-
- /* ---------------------------------------------------------------- */
- /* Disable (mask) all interrupts at interrupt controller */
- /* ---------------------------------------------------------------- */
-
-initirqs:
-
- mov r1, #0 /* clear int. level register (IRQ, not FIQ) */
- ldr r2, =ICLR
- str r1, [r2]
-
- ldr r2, =ICMR /* mask all interrupts at the controller */
- str r1, [r2]
-
-
- /* ---------------------------------------------------------------- */
- /* Clock initialisation */
- /* ---------------------------------------------------------------- */
-
-initclks:
-
- /* Disable the peripheral clocks, and set the core clock frequency */
-
- /* Turn Off ALL on-chip peripheral clocks for re-configuration */
- /* Note: See label 'ENABLECLKS' for the re-enabling */
- ldr r1, =CKEN
- mov r2, #0
- str r2, [r1]
-
-
- /* default value in case no valid rotary switch setting is found */
- ldr r2, =(CCCR_L27|CCCR_M2|CCCR_N10) /* DEFAULT: {200/200/100} */
-
- /* ... and write the core clock config register */
- ldr r1, =CCCR
- str r2, [r1]
-
-#ifdef RTC
- /* enable the 32Khz oscillator for RTC and PowerManager */
-
- ldr r1, =OSCC
- mov r2, #OSCC_OON
- str r2, [r1]
-
- /* NOTE: spin here until OSCC.OOK get set, meaning the PLL */
- /* has settled. */
-60:
- ldr r2, [r1]
- ands r2, r2, #1
- beq 60b
-#endif
-
- /* ---------------------------------------------------------------- */
- /* */
- /* ---------------------------------------------------------------- */
-
- /* Save SDRAM size */
- ldr r1, =DRAM_SIZE
- str r8, [r1]
-
- /* Interrupt init: Mask all interrupts */
- ldr r0, =ICMR /* enable no sources */
- mov r1, #0
- str r1, [r0]
-
- /* FIXME */
-
-#define NODEBUG
-#ifdef NODEBUG
- /*Disable software and data breakpoints */
- mov r0,#0
- mcr p15,0,r0,c14,c8,0 /* ibcr0 */
- mcr p15,0,r0,c14,c9,0 /* ibcr1 */
- mcr p15,0,r0,c14,c4,0 /* dbcon */
-
- /*Enable all debug functionality */
- mov r0,#0x80000000
- mcr p14,0,r0,c10,c0,0 /* dcsr */
-
-#endif
-
- /* ---------------------------------------------------------------- */
- /* End lowlevel_init */
- /* ---------------------------------------------------------------- */
-
-endlowlevel_init:
-
- mov pc, lr
diff --git a/board/cerf250/u-boot.lds b/board/cerf250/u-boot.lds
deleted file mode 100644
index f0102391b3..0000000000
--- a/board/cerf250/u-boot.lds
+++ /dev/null
@@ -1,56 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-ENTRY(_start)
-SECTIONS
-{
- . = 0x00000000;
-
- . = ALIGN(4);
- .text :
- {
- cpu/pxa/start.o (.text)
- *(.text)
- }
-
- . = ALIGN(4);
- .rodata : { *(.rodata) }
-
- . = ALIGN(4);
- .data : { *(.data) }
-
- . = ALIGN(4);
- .got : { *(.got) }
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = ALIGN(4);
- __bss_start = .;
- .bss : { *(.bss) }
- _end = .;
-}
diff --git a/board/cm4008/Makefile b/board/cm4008/Makefile
deleted file mode 100644
index c66dd716c8..0000000000
--- a/board/cm4008/Makefile
+++ /dev/null
@@ -1,46 +0,0 @@
-#
-# (C) Copyright 2000, 2002
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := cm4008.o flash.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $^
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/cm4008/cm4008.c b/board/cm4008/cm4008.c
deleted file mode 100644
index 4d2013b407..0000000000
--- a/board/cm4008/cm4008.c
+++ /dev/null
@@ -1,101 +0,0 @@
-/*
- * (C) Copyright 2005
- * Greg Ungerer, OpenGear Inc, <greg.ungerer@opengear.com>
- *
- * (C) Copyright 2002
- * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
- *
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/arch/platform.h>
-
-/* ------------------------------------------------------------------------- */
-
-#define ks8695_read(a) *((volatile unsigned int *) (KS8695_IO_BASE+(a)))
-#define ks8695_write(a,b) *((volatile unsigned int *) (KS8695_IO_BASE+(a))) = (b)
-
-/* ------------------------------------------------------------------------- */
-
-
-/*
- * Miscelaneous platform dependent initialisations
- */
-int env_flash_cmdline (void)
-{
- unsigned char *sp = (unsigned char *) 0x0201c020;
- unsigned char *ep;
- int len;
-
- /* Check if "erase" push button is depressed */
- if ((ks8695_read(KS8695_GPIO_DATA) & 0x8) == 0) {
- printf("### Entering network recovery mode...\n");
- setenv("bootargs", "console=ttyAM0,115200 mem=16M initrd=0x400000,6M root=/dev/ram0");
- setenv("bootcmd", "bootp 0x400000; gofsk 0x400000");
- setenv("bootdelay", "2");
- return 0;
- }
-
- /* Check for flash based kernel boot args to use as default */
- for (ep = sp, len = 0; ((len < 1024) && (*ep != 0)); ep++, len++)
- ;
-
- if ((len > 0) && (len <1024))
- setenv("bootargs", sp);
-
- return 0;
-}
-
-int board_late_init (void)
-{
- return 0;
-}
-
-
-int board_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- /* arch number of CM4008 */
- gd->bd->bi_arch_number = 624;
-
- /* adress of boot parameters */
- gd->bd->bi_boot_params = 0x00000100;
-
- /* power down all but port 0 on the switch */
- ks8695_write(KS8695_SWITCH_LPPM12, 0x00000005);
- ks8695_write(KS8695_SWITCH_LPPM34, 0x00050005);
-
- return 0;
-}
-
-int dram_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
-
- return (0);
-}
diff --git a/board/cm4008/config.mk b/board/cm4008/config.mk
deleted file mode 100644
index 74eaeb0e66..0000000000
--- a/board/cm4008/config.mk
+++ /dev/null
@@ -1 +0,0 @@
-TEXT_BASE = 0x00f00000
diff --git a/board/cm4008/flash.c b/board/cm4008/flash.c
deleted file mode 100644
index 86c8e2a5f0..0000000000
--- a/board/cm4008/flash.c
+++ /dev/null
@@ -1,409 +0,0 @@
-/*
- * (C) Copyright 2005
- * Greg Ungerer, OpenGear Inc, greg.ungerer@opengear.com
- *
- * (C) Copyright 2001
- * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
- *
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <linux/byteorder/swab.h>
-
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-#define mb() __asm__ __volatile__ ("" : : : "memory")
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (unsigned char * addr, flash_info_t * info);
-static int write_data (flash_info_t * info, ulong dest, unsigned char data);
-static void flash_get_offsets (ulong base, flash_info_t * info);
-void inline spin_wheel (void);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- int i;
- ulong size = 0;
-
- for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
- switch (i) {
- case 0:
- flash_get_size ((unsigned char *) PHYS_FLASH_1, &flash_info[i]);
- flash_get_offsets (PHYS_FLASH_1, &flash_info[i]);
- break;
- case 1:
- /* ignore for now */
- flash_info[i].flash_id = FLASH_UNKNOWN;
- break;
- default:
- panic ("configured too many flash banks!\n");
- break;
- }
- size += flash_info[i].size;
- }
-
- /* Protect monitor and environment sectors
- */
- flash_protect (FLAG_PROTECT_SET,
- CFG_FLASH_BASE,
- CFG_FLASH_BASE + _bss_start - _armboot_start,
- &flash_info[0]);
-
- return size;
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_get_offsets (ulong base, flash_info_t * info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN)
- return;
-
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
- for (i = 0; i < info->sector_count; i++) {
- info->start[i] = base + (i * PHYS_FLASH_SECT_SIZE);
- info->protect[i] = 0;
- }
- }
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t * info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_INTEL:
- printf ("INTEL ");
- break;
- default:
- printf ("Unknown Vendor ");
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_28F128J3A:
- printf ("28F128J3A\n");
- break;
- default:
- printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i], info->protect[i] ? " (RO)" : " ");
- }
- printf ("\n");
- return;
-}
-
-/*
- * The following code cannot be run from FLASH!
- */
-static ulong flash_get_size (unsigned char * addr, flash_info_t * info)
-{
- volatile unsigned char value;
-
- /* Write auto select command: read Manufacturer ID */
- addr[0x5555] = 0xAA;
- addr[0x2AAA] = 0x55;
- addr[0x5555] = 0x90;
-
- mb ();
- value = addr[0];
-
- switch (value) {
-
- case (unsigned char)INTEL_MANUFACT:
- info->flash_id = FLASH_MAN_INTEL;
- break;
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- addr[0] = 0xFF; /* restore read mode */
- return (0); /* no or unknown flash */
- }
-
- mb ();
- value = addr[2]; /* device ID */
-
- switch (value) {
-
- case (unsigned char)INTEL_ID_28F640J3A:
- info->flash_id += FLASH_28F640J3A;
- info->sector_count = 64;
- info->size = 0x00800000;
- break; /* => 8 MB */
-
- case (unsigned char)INTEL_ID_28F128J3A:
- info->flash_id += FLASH_28F128J3A;
- info->sector_count = 128;
- info->size = 0x01000000;
- break; /* => 16 MB */
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- break;
- }
-
- if (info->sector_count > CFG_MAX_FLASH_SECT) {
- printf ("** ERROR: sector count %d > max (%d) **\n",
- info->sector_count, CFG_MAX_FLASH_SECT);
- info->sector_count = CFG_MAX_FLASH_SECT;
- }
-
- addr[0] = 0xFF; /* restore read mode */
-
- return (info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t * info, int s_first, int s_last)
-{
- int flag, prot, sect;
- ulong type;
- int rcode = 0;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- type = (info->flash_id & FLASH_VENDMASK);
- if ((type != FLASH_MAN_INTEL)) {
- printf ("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- return 1;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot)
- printf ("- Warning: %d protected sectors will not be erased!\n", prot);
- else
- printf ("\n");
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- volatile unsigned char *addr;
- unsigned char status;
-
- printf ("Erasing sector %2d ... ", sect);
-
- /* arm simple, non interrupt dependent timer */
- reset_timer_masked ();
-
- addr = (volatile unsigned char *) (info->start[sect]);
- *addr = 0x50; /* clear status register */
- *addr = 0x20; /* erase setup */
- *addr = 0xD0; /* erase confirm */
-
- while (((status = *addr) & 0x80) != 0x80) {
- if (get_timer_masked () >
- CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- *addr = 0xB0; /* suspend erase */
- *addr = 0xFF; /* reset to read mode */
- rcode = 1;
- break;
- }
- }
-
- *addr = 0x50; /* clear status register cmd */
- *addr = 0xFF; /* resest to read mode */
-
- printf (" done\n");
- }
- }
- return rcode;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- * 4 - Flash not identified
- */
-
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- ulong cp, wp;
- unsigned char data;
- int count, i, l, rc, port_width;
-
- if (info->flash_id == FLASH_UNKNOWN)
- return 4;
-
- wp = addr;
- port_width = 1;
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i = 0, cp = wp; i < l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
- for (; i < port_width && cnt > 0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt == 0 && i < port_width; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
-
- if ((rc = write_data (info, wp, data)) != 0) {
- return (rc);
- }
- wp += port_width;
- }
-
- /*
- * handle word aligned part
- */
- count = 0;
- while (cnt >= port_width) {
- data = 0;
- for (i = 0; i < port_width; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_data (info, wp, data)) != 0) {
- return (rc);
- }
- wp += port_width;
- cnt -= port_width;
- if (count++ > 0x800) {
- spin_wheel ();
- count = 0;
- }
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i < port_width; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
-
- return (write_data (info, wp, data));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word or halfword to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_data (flash_info_t * info, ulong dest, unsigned char data)
-{
- volatile unsigned char *addr = (volatile unsigned char *) dest;
- ulong status;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*addr & data) != data) {
- printf ("not erased at %08lx (%lx)\n", (ulong) addr,
- (ulong) * addr);
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
-
- *addr = 0x40; /* write setup */
- *addr = data;
-
- /* arm simple, non interrupt dependent timer */
- reset_timer_masked ();
-
- /* wait while polling the status register */
- while (((status = *addr) & 0x80) != 0x80) {
- if (get_timer_masked () > CFG_FLASH_WRITE_TOUT) {
- *addr = 0xFF; /* restore read mode */
- return (1);
- }
- }
-
- *addr = 0xFF; /* restore read mode */
-
- return (0);
-}
-
-void inline spin_wheel (void)
-{
- static int p = 0;
- static char w[] = "\\/-";
-
- printf ("\010%c", w[p]);
- (++p == 3) ? (p = 0) : 0;
-}
diff --git a/board/cm4008/u-boot.lds b/board/cm4008/u-boot.lds
deleted file mode 100644
index ec09fa23c3..0000000000
--- a/board/cm4008/u-boot.lds
+++ /dev/null
@@ -1,56 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-ENTRY(_start)
-SECTIONS
-{
- . = 0x00000000;
-
- . = ALIGN(4);
- .text :
- {
- cpu/arm920t/start.o (.text)
- *(.text)
- }
-
- . = ALIGN(4);
- .rodata : { *(.rodata) }
-
- . = ALIGN(4);
- .data : { *(.data) }
-
- . = ALIGN(4);
- .got : { *(.got) }
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = ALIGN(4);
- __bss_start = .;
- .bss : { *(.bss) }
- _end = .;
-}
diff --git a/board/cm41xx/Makefile b/board/cm41xx/Makefile
deleted file mode 100644
index f0d3451989..0000000000
--- a/board/cm41xx/Makefile
+++ /dev/null
@@ -1,46 +0,0 @@
-#
-# (C) Copyright 2000, 2002
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := cm41xx.o flash.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $^
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/cm41xx/cm41xx.c b/board/cm41xx/cm41xx.c
deleted file mode 100644
index 65eaa942c5..0000000000
--- a/board/cm41xx/cm41xx.c
+++ /dev/null
@@ -1,101 +0,0 @@
-/*
- * (C) Copyright 2005
- * Greg Ungerer, OpenGear Inc, <greg.ungerer@opengear.com>
- *
- * (C) Copyright 2002
- * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
- *
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/arch/platform.h>
-
-/* ------------------------------------------------------------------------- */
-
-#define ks8695_read(a) *((volatile unsigned int *) (KS8695_IO_BASE+(a)))
-#define ks8695_write(a,b) *((volatile unsigned int *) (KS8695_IO_BASE+(a))) = (b)
-
-/* ------------------------------------------------------------------------- */
-
-
-/*
- * Miscelaneous platform dependent initialisations
- */
-int env_flash_cmdline (void)
-{
- unsigned char *sp = (unsigned char *) 0x0201c020;
- unsigned char *ep;
- int len;
-
- /* Check if "erase" push button is depressed */
- if ((ks8695_read(KS8695_GPIO_DATA) & 0x8) == 0) {
- printf("### Entering network recovery mode...\n");
- setenv("bootargs", "console=ttyAM0,115200 mem=32M initrd=0x400000,8M root=/dev/ram0");
- setenv("bootcmd", "bootp 0x400000; gofsk 0x400000");
- setenv("bootdelay", "2");
- return 0;
- }
-
- /* Check for flash based kernel boot args to use as default */
- for (ep = sp, len = 0; ((len < 1024) && (*ep != 0)); ep++, len++)
- ;
-
- if ((len > 0) && (len <1024))
- setenv("bootargs", sp);
-
- return 0;
-}
-
-int board_late_init (void)
-{
- return 0;
-}
-
-
-int board_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- /* arch number of CM41xx */
- gd->bd->bi_arch_number = 672;
-
- /* adress of boot parameters */
- gd->bd->bi_boot_params = 0x00000100;
-
- /* power down all but port 0 on the switch */
- ks8695_write(KS8695_SWITCH_LPPM12, 0x00000005);
- ks8695_write(KS8695_SWITCH_LPPM34, 0x00050005);
-
- return 0;
-}
-
-int dram_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
-
- return (0);
-}
diff --git a/board/cm41xx/config.mk b/board/cm41xx/config.mk
deleted file mode 100644
index 74eaeb0e66..0000000000
--- a/board/cm41xx/config.mk
+++ /dev/null
@@ -1 +0,0 @@
-TEXT_BASE = 0x00f00000
diff --git a/board/cm41xx/flash.c b/board/cm41xx/flash.c
deleted file mode 100644
index 86c8e2a5f0..0000000000
--- a/board/cm41xx/flash.c
+++ /dev/null
@@ -1,409 +0,0 @@
-/*
- * (C) Copyright 2005
- * Greg Ungerer, OpenGear Inc, greg.ungerer@opengear.com
- *
- * (C) Copyright 2001
- * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
- *
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <linux/byteorder/swab.h>
-
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-#define mb() __asm__ __volatile__ ("" : : : "memory")
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (unsigned char * addr, flash_info_t * info);
-static int write_data (flash_info_t * info, ulong dest, unsigned char data);
-static void flash_get_offsets (ulong base, flash_info_t * info);
-void inline spin_wheel (void);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- int i;
- ulong size = 0;
-
- for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
- switch (i) {
- case 0:
- flash_get_size ((unsigned char *) PHYS_FLASH_1, &flash_info[i]);
- flash_get_offsets (PHYS_FLASH_1, &flash_info[i]);
- break;
- case 1:
- /* ignore for now */
- flash_info[i].flash_id = FLASH_UNKNOWN;
- break;
- default:
- panic ("configured too many flash banks!\n");
- break;
- }
- size += flash_info[i].size;
- }
-
- /* Protect monitor and environment sectors
- */
- flash_protect (FLAG_PROTECT_SET,
- CFG_FLASH_BASE,
- CFG_FLASH_BASE + _bss_start - _armboot_start,
- &flash_info[0]);
-
- return size;
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_get_offsets (ulong base, flash_info_t * info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN)
- return;
-
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
- for (i = 0; i < info->sector_count; i++) {
- info->start[i] = base + (i * PHYS_FLASH_SECT_SIZE);
- info->protect[i] = 0;
- }
- }
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t * info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_INTEL:
- printf ("INTEL ");
- break;
- default:
- printf ("Unknown Vendor ");
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_28F128J3A:
- printf ("28F128J3A\n");
- break;
- default:
- printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i], info->protect[i] ? " (RO)" : " ");
- }
- printf ("\n");
- return;
-}
-
-/*
- * The following code cannot be run from FLASH!
- */
-static ulong flash_get_size (unsigned char * addr, flash_info_t * info)
-{
- volatile unsigned char value;
-
- /* Write auto select command: read Manufacturer ID */
- addr[0x5555] = 0xAA;
- addr[0x2AAA] = 0x55;
- addr[0x5555] = 0x90;
-
- mb ();
- value = addr[0];
-
- switch (value) {
-
- case (unsigned char)INTEL_MANUFACT:
- info->flash_id = FLASH_MAN_INTEL;
- break;
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- addr[0] = 0xFF; /* restore read mode */
- return (0); /* no or unknown flash */
- }
-
- mb ();
- value = addr[2]; /* device ID */
-
- switch (value) {
-
- case (unsigned char)INTEL_ID_28F640J3A:
- info->flash_id += FLASH_28F640J3A;
- info->sector_count = 64;
- info->size = 0x00800000;
- break; /* => 8 MB */
-
- case (unsigned char)INTEL_ID_28F128J3A:
- info->flash_id += FLASH_28F128J3A;
- info->sector_count = 128;
- info->size = 0x01000000;
- break; /* => 16 MB */
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- break;
- }
-
- if (info->sector_count > CFG_MAX_FLASH_SECT) {
- printf ("** ERROR: sector count %d > max (%d) **\n",
- info->sector_count, CFG_MAX_FLASH_SECT);
- info->sector_count = CFG_MAX_FLASH_SECT;
- }
-
- addr[0] = 0xFF; /* restore read mode */
-
- return (info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t * info, int s_first, int s_last)
-{
- int flag, prot, sect;
- ulong type;
- int rcode = 0;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- type = (info->flash_id & FLASH_VENDMASK);
- if ((type != FLASH_MAN_INTEL)) {
- printf ("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- return 1;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot)
- printf ("- Warning: %d protected sectors will not be erased!\n", prot);
- else
- printf ("\n");
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- volatile unsigned char *addr;
- unsigned char status;
-
- printf ("Erasing sector %2d ... ", sect);
-
- /* arm simple, non interrupt dependent timer */
- reset_timer_masked ();
-
- addr = (volatile unsigned char *) (info->start[sect]);
- *addr = 0x50; /* clear status register */
- *addr = 0x20; /* erase setup */
- *addr = 0xD0; /* erase confirm */
-
- while (((status = *addr) & 0x80) != 0x80) {
- if (get_timer_masked () >
- CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- *addr = 0xB0; /* suspend erase */
- *addr = 0xFF; /* reset to read mode */
- rcode = 1;
- break;
- }
- }
-
- *addr = 0x50; /* clear status register cmd */
- *addr = 0xFF; /* resest to read mode */
-
- printf (" done\n");
- }
- }
- return rcode;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- * 4 - Flash not identified
- */
-
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- ulong cp, wp;
- unsigned char data;
- int count, i, l, rc, port_width;
-
- if (info->flash_id == FLASH_UNKNOWN)
- return 4;
-
- wp = addr;
- port_width = 1;
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i = 0, cp = wp; i < l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
- for (; i < port_width && cnt > 0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt == 0 && i < port_width; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
-
- if ((rc = write_data (info, wp, data)) != 0) {
- return (rc);
- }
- wp += port_width;
- }
-
- /*
- * handle word aligned part
- */
- count = 0;
- while (cnt >= port_width) {
- data = 0;
- for (i = 0; i < port_width; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_data (info, wp, data)) != 0) {
- return (rc);
- }
- wp += port_width;
- cnt -= port_width;
- if (count++ > 0x800) {
- spin_wheel ();
- count = 0;
- }
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i < port_width; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
-
- return (write_data (info, wp, data));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word or halfword to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_data (flash_info_t * info, ulong dest, unsigned char data)
-{
- volatile unsigned char *addr = (volatile unsigned char *) dest;
- ulong status;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*addr & data) != data) {
- printf ("not erased at %08lx (%lx)\n", (ulong) addr,
- (ulong) * addr);
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
-
- *addr = 0x40; /* write setup */
- *addr = data;
-
- /* arm simple, non interrupt dependent timer */
- reset_timer_masked ();
-
- /* wait while polling the status register */
- while (((status = *addr) & 0x80) != 0x80) {
- if (get_timer_masked () > CFG_FLASH_WRITE_TOUT) {
- *addr = 0xFF; /* restore read mode */
- return (1);
- }
- }
-
- *addr = 0xFF; /* restore read mode */
-
- return (0);
-}
-
-void inline spin_wheel (void)
-{
- static int p = 0;
- static char w[] = "\\/-";
-
- printf ("\010%c", w[p]);
- (++p == 3) ? (p = 0) : 0;
-}
diff --git a/board/cm41xx/u-boot.lds b/board/cm41xx/u-boot.lds
deleted file mode 100644
index ec09fa23c3..0000000000
--- a/board/cm41xx/u-boot.lds
+++ /dev/null
@@ -1,56 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-ENTRY(_start)
-SECTIONS
-{
- . = 0x00000000;
-
- . = ALIGN(4);
- .text :
- {
- cpu/arm920t/start.o (.text)
- *(.text)
- }
-
- . = ALIGN(4);
- .rodata : { *(.rodata) }
-
- . = ALIGN(4);
- .data : { *(.data) }
-
- . = ALIGN(4);
- .got : { *(.got) }
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = ALIGN(4);
- __bss_start = .;
- .bss : { *(.bss) }
- _end = .;
-}
diff --git a/board/cmc_pu2/Makefile b/board/cmc_pu2/Makefile
deleted file mode 100644
index d0def05520..0000000000
--- a/board/cmc_pu2/Makefile
+++ /dev/null
@@ -1,46 +0,0 @@
-#
-# (C) Copyright 2003
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := cmc_pu2.o at45.o flash.o load_sernum_ethaddr.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS) $(SOBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/cmc_pu2/at45.c b/board/cmc_pu2/at45.c
deleted file mode 100644
index 3c00132164..0000000000
--- a/board/cmc_pu2/at45.c
+++ /dev/null
@@ -1,621 +0,0 @@
-/* Driver for ATMEL DataFlash support
- * Author : Hamid Ikdoumi (Atmel)
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- */
-
-#include <config.h>
-#include <common.h>
-#include <asm/hardware.h>
-
-#ifdef CONFIG_HAS_DATAFLASH
-#include <dataflash.h>
-
-#define AT91C_SPI_CLK 10000000 /* Max Value = 10MHz to be compliant to
-the Continuous Array Read function */
-
-/* AC Characteristics */
-/* DLYBS = tCSS = 250ns min and DLYBCT = tCSH = 250ns */
-#define DATAFLASH_TCSS (0xC << 16)
-#define DATAFLASH_TCHS (0x1 << 24)
-
-#define AT91C_TIMEOUT_WRDY 200000
-#define AT91C_SPI_PCS0_SERIAL_DATAFLASH 0xE /* Chip Select 0 : NPCS0 %1110 */
-#define AT91C_SPI_PCS3_DATAFLASH_CARD 0x7 /* Chip Select 3 : NPCS3 %0111 */
-
-void AT91F_SpiInit(void) {
-
-/*-------------------------------------------------------------------*/
-/* SPI DataFlash Init */
-/*-------------------------------------------------------------------*/
- /* Configure PIOs */
- AT91C_BASE_PIOA->PIO_ASR = AT91C_PA3_NPCS0 | AT91C_PA4_NPCS1 | AT91C_PA1_MOSI | AT91C_PA5_NPCS2 |
- AT91C_PA6_NPCS3 | AT91C_PA0_MISO | AT91C_PA2_SPCK;
- AT91C_BASE_PIOA->PIO_PDR = AT91C_PA3_NPCS0 | AT91C_PA4_NPCS1 | AT91C_PA1_MOSI | AT91C_PA5_NPCS2 |
- AT91C_PA6_NPCS3 | AT91C_PA0_MISO | AT91C_PA2_SPCK;
- /* Enable CLock */
- AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_SPI;
-
- /* Reset the SPI */
- AT91C_BASE_SPI->SPI_CR = AT91C_SPI_SWRST;
-
- /* Configure SPI in Master Mode with No CS selected !!! */
- AT91C_BASE_SPI->SPI_MR = AT91C_SPI_MSTR | AT91C_SPI_MODFDIS | AT91C_SPI_PCS;
-
- /* Configure CS0 and CS3 */
- *(AT91C_SPI_CSR + 0) = AT91C_SPI_CPOL | (AT91C_SPI_DLYBS & DATAFLASH_TCSS) | (AT91C_SPI_DLYBCT &
- DATAFLASH_TCHS) | ((AT91C_MASTER_CLOCK / (2*AT91C_SPI_CLK)) << 8);
-
- *(AT91C_SPI_CSR + 3) = AT91C_SPI_CPOL | (AT91C_SPI_DLYBS & DATAFLASH_TCSS) | (AT91C_SPI_DLYBCT &
- DATAFLASH_TCHS) | ((AT91C_MASTER_CLOCK / (2*AT91C_SPI_CLK)) << 8);
-
-}
-
-void AT91F_SpiEnable(int cs) {
- switch(cs) {
- case 0: /* Configure SPI CS0 for Serial DataFlash AT45DBxx */
- AT91C_BASE_SPI->SPI_MR &= 0xFFF0FFFF;
- AT91C_BASE_SPI->SPI_MR |= ((AT91C_SPI_PCS0_SERIAL_DATAFLASH<<16) & AT91C_SPI_PCS);
- break;
- case 3: /* Configure SPI CS3 for Serial DataFlash Card */
- /* Set up PIO SDC_TYPE to switch on DataFlash Card and not MMC/SDCard */
- AT91C_BASE_PIOB->PIO_PER = AT91C_PIO_PB7; /* Set in PIO mode */
- AT91C_BASE_PIOB->PIO_OER = AT91C_PIO_PB7; /* Configure in output */
- /* Clear Output */
- AT91C_BASE_PIOB->PIO_CODR = AT91C_PIO_PB7;
- /* Configure PCS */
- AT91C_BASE_SPI->SPI_MR &= 0xFFF0FFFF;
- AT91C_BASE_SPI->SPI_MR |= ((AT91C_SPI_PCS3_DATAFLASH_CARD<<16) & AT91C_SPI_PCS);
- break;
- }
-
- /* SPI_Enable */
- AT91C_BASE_SPI->SPI_CR = AT91C_SPI_SPIEN;
-}
-
-/*----------------------------------------------------------------------------*/
-/* \fn AT91F_SpiWrite */
-/* \brief Set the PDC registers for a transfert */
-/*----------------------------------------------------------------------------*/
-unsigned int AT91F_SpiWrite ( AT91PS_DataflashDesc pDesc )
-{
- unsigned int timeout;
-
- pDesc->state = BUSY;
-
- AT91C_BASE_SPI->SPI_PTCR = AT91C_PDC_TXTDIS + AT91C_PDC_RXTDIS;
-
- /* Initialize the Transmit and Receive Pointer */
- AT91C_BASE_SPI->SPI_RPR = (unsigned int)pDesc->rx_cmd_pt ;
- AT91C_BASE_SPI->SPI_TPR = (unsigned int)pDesc->tx_cmd_pt ;
-
- /* Intialize the Transmit and Receive Counters */
- AT91C_BASE_SPI->SPI_RCR = pDesc->rx_cmd_size;
- AT91C_BASE_SPI->SPI_TCR = pDesc->tx_cmd_size;
-
- if ( pDesc->tx_data_size != 0 ) {
- /* Initialize the Next Transmit and Next Receive Pointer */
- AT91C_BASE_SPI->SPI_RNPR = (unsigned int)pDesc->rx_data_pt ;
- AT91C_BASE_SPI->SPI_TNPR = (unsigned int)pDesc->tx_data_pt ;
-
- /* Intialize the Next Transmit and Next Receive Counters */
- AT91C_BASE_SPI->SPI_RNCR = pDesc->rx_data_size ;
- AT91C_BASE_SPI->SPI_TNCR = pDesc->tx_data_size ;
- }
-
- /* arm simple, non interrupt dependent timer */
- reset_timer_masked();
- timeout = 0;
-
- AT91C_BASE_SPI->SPI_PTCR = AT91C_PDC_TXTEN + AT91C_PDC_RXTEN;
- while(!(AT91C_BASE_SPI->SPI_SR & AT91C_SPI_RXBUFF) && ((timeout = get_timer_masked() ) < CFG_SPI_WRITE_TOUT));
- AT91C_BASE_SPI->SPI_PTCR = AT91C_PDC_TXTDIS + AT91C_PDC_RXTDIS;
- pDesc->state = IDLE;
-
- if (timeout >= CFG_SPI_WRITE_TOUT){
- printf("Error Timeout\n\r");
- return DATAFLASH_ERROR;
- }
-
- return DATAFLASH_OK;
-}
-
-
-/*----------------------------------------------------------------------*/
-/* \fn AT91F_DataFlashSendCommand */
-/* \brief Generic function to send a command to the dataflash */
-/*----------------------------------------------------------------------*/
-AT91S_DataFlashStatus AT91F_DataFlashSendCommand(
- AT91PS_DataFlash pDataFlash,
- unsigned char OpCode,
- unsigned int CmdSize,
- unsigned int DataflashAddress)
-{
- unsigned int adr;
-
- if ( (pDataFlash->pDataFlashDesc->state) != IDLE)
- return DATAFLASH_BUSY;
-
- /* process the address to obtain page address and byte address */
- adr = ((DataflashAddress / (pDataFlash->pDevice->pages_size)) << pDataFlash->pDevice->page_offset) + (DataflashAddress % (pDataFlash->pDevice->pages_size));
-
- /* fill the command buffer */
- pDataFlash->pDataFlashDesc->command[0] = OpCode;
- if (pDataFlash->pDevice->pages_number >= 16384) {
- pDataFlash->pDataFlashDesc->command[1] = (unsigned char)((adr & 0x0F000000) >> 24);
- pDataFlash->pDataFlashDesc->command[2] = (unsigned char)((adr & 0x00FF0000) >> 16);
- pDataFlash->pDataFlashDesc->command[3] = (unsigned char)((adr & 0x0000FF00) >> 8);
- pDataFlash->pDataFlashDesc->command[4] = (unsigned char)(adr & 0x000000FF);
- } else {
- pDataFlash->pDataFlashDesc->command[1] = (unsigned char)((adr & 0x00FF0000) >> 16);
- pDataFlash->pDataFlashDesc->command[2] = (unsigned char)((adr & 0x0000FF00) >> 8);
- pDataFlash->pDataFlashDesc->command[3] = (unsigned char)(adr & 0x000000FF) ;
- pDataFlash->pDataFlashDesc->command[4] = 0;
- }
- pDataFlash->pDataFlashDesc->command[5] = 0;
- pDataFlash->pDataFlashDesc->command[6] = 0;
- pDataFlash->pDataFlashDesc->command[7] = 0;
-
- /* Initialize the SpiData structure for the spi write fuction */
- pDataFlash->pDataFlashDesc->tx_cmd_pt = pDataFlash->pDataFlashDesc->command ;
- pDataFlash->pDataFlashDesc->tx_cmd_size = CmdSize ;
- pDataFlash->pDataFlashDesc->rx_cmd_pt = pDataFlash->pDataFlashDesc->command ;
- pDataFlash->pDataFlashDesc->rx_cmd_size = CmdSize ;
-
- /* send the command and read the data */
- return AT91F_SpiWrite (pDataFlash->pDataFlashDesc);
-}
-
-
-/*----------------------------------------------------------------------*/
-/* \fn AT91F_DataFlashGetStatus */
-/* \brief Read the status register of the dataflash */
-/*----------------------------------------------------------------------*/
-AT91S_DataFlashStatus AT91F_DataFlashGetStatus(AT91PS_DataflashDesc pDesc)
-{
- AT91S_DataFlashStatus status;
-
- /* if a transfert is in progress ==> return 0 */
- if( (pDesc->state) != IDLE)
- return DATAFLASH_BUSY;
-
- /* first send the read status command (D7H) */
- pDesc->command[0] = DB_STATUS;
- pDesc->command[1] = 0;
-
- pDesc->DataFlash_state = GET_STATUS;
- pDesc->tx_data_size = 0 ; /* Transmit the command and receive response */
- pDesc->tx_cmd_pt = pDesc->command ;
- pDesc->rx_cmd_pt = pDesc->command ;
- pDesc->rx_cmd_size = 2 ;
- pDesc->tx_cmd_size = 2 ;
- status = AT91F_SpiWrite (pDesc);
-
- pDesc->DataFlash_state = *( (unsigned char *) (pDesc->rx_cmd_pt) +1);
-
- return status;
-}
-
-
-/*----------------------------------------------------------------------*/
-/* \fn AT91F_DataFlashWaitReady */
-/* \brief wait for dataflash ready (bit7 of the status register == 1) */
-/*----------------------------------------------------------------------*/
-AT91S_DataFlashStatus AT91F_DataFlashWaitReady(AT91PS_DataflashDesc pDataFlashDesc, unsigned int timeout)
-{
- pDataFlashDesc->DataFlash_state = IDLE;
-
- do {
- AT91F_DataFlashGetStatus(pDataFlashDesc);
- timeout--;
- } while( ((pDataFlashDesc->DataFlash_state & 0x80) != 0x80) && (timeout > 0) );
-
- if((pDataFlashDesc->DataFlash_state & 0x80) != 0x80)
- return DATAFLASH_ERROR;
-
- return DATAFLASH_OK;
-}
-
-
-/*------------------------------------------------------------------------------*/
-/* Function Name : AT91F_DataFlashContinuousRead */
-/* Object : Continuous stream Read */
-/* Input Parameters : DataFlash Service */
-/* : <src> = dataflash address */
-/* : <*dataBuffer> = data buffer pointer */
-/* : <sizeToRead> = data buffer size */
-/* Return value : State of the dataflash */
-/*------------------------------------------------------------------------------*/
-AT91S_DataFlashStatus AT91F_DataFlashContinuousRead (
- AT91PS_DataFlash pDataFlash,
- int src,
- unsigned char *dataBuffer,
- int sizeToRead )
-{
- AT91S_DataFlashStatus status;
- /* Test the size to read in the device */
- if ( (src + sizeToRead) > (pDataFlash->pDevice->pages_size * (pDataFlash->pDevice->pages_number)))
- return DATAFLASH_MEMORY_OVERFLOW;
-
- pDataFlash->pDataFlashDesc->rx_data_pt = dataBuffer;
- pDataFlash->pDataFlashDesc->rx_data_size = sizeToRead;
- pDataFlash->pDataFlashDesc->tx_data_pt = dataBuffer;
- pDataFlash->pDataFlashDesc->tx_data_size = sizeToRead;
-
- status = AT91F_DataFlashSendCommand (pDataFlash, DB_CONTINUOUS_ARRAY_READ, 8, src);
- /* Send the command to the dataflash */
- return(status);
-}
-
-
-/*------------------------------------------------------------------------------*/
-/* Function Name : AT91F_DataFlashPagePgmBuf */
-/* Object : Main memory page program through buffer 1 or buffer 2 */
-/* Input Parameters : DataFlash Service */
-/* : <*src> = Source buffer */
-/* : <dest> = dataflash destination address */
-/* : <SizeToWrite> = data buffer size */
-/* Return value : State of the dataflash */
-/*------------------------------------------------------------------------------*/
-AT91S_DataFlashStatus AT91F_DataFlashPagePgmBuf(
- AT91PS_DataFlash pDataFlash,
- unsigned char *src,
- unsigned int dest,
- unsigned int SizeToWrite)
-{
- int cmdsize;
- pDataFlash->pDataFlashDesc->tx_data_pt = src ;
- pDataFlash->pDataFlashDesc->tx_data_size = SizeToWrite ;
- pDataFlash->pDataFlashDesc->rx_data_pt = src;
- pDataFlash->pDataFlashDesc->rx_data_size = SizeToWrite;
-
- cmdsize = 4;
- /* Send the command to the dataflash */
- if (pDataFlash->pDevice->pages_number >= 16384)
- cmdsize = 5;
- return(AT91F_DataFlashSendCommand (pDataFlash, DB_PAGE_PGM_BUF1, cmdsize, dest));
-}
-
-
-/*------------------------------------------------------------------------------*/
-/* Function Name : AT91F_MainMemoryToBufferTransfert */
-/* Object : Read a page in the SRAM Buffer 1 or 2 */
-/* Input Parameters : DataFlash Service */
-/* : Page concerned */
-/* : */
-/* Return value : State of the dataflash */
-/*------------------------------------------------------------------------------*/
-AT91S_DataFlashStatus AT91F_MainMemoryToBufferTransfert(
- AT91PS_DataFlash pDataFlash,
- unsigned char BufferCommand,
- unsigned int page)
-{
- int cmdsize;
- /* Test if the buffer command is legal */
- if ((BufferCommand != DB_PAGE_2_BUF1_TRF) && (BufferCommand != DB_PAGE_2_BUF2_TRF))
- return DATAFLASH_BAD_COMMAND;
-
- /* no data to transmit or receive */
- pDataFlash->pDataFlashDesc->tx_data_size = 0;
- cmdsize = 4;
- if (pDataFlash->pDevice->pages_number >= 16384)
- cmdsize = 5;
- return(AT91F_DataFlashSendCommand (pDataFlash, BufferCommand, cmdsize, page*pDataFlash->pDevice->pages_size));
-}
-
-
-/*----------------------------------------------------------------------------- */
-/* Function Name : AT91F_DataFlashWriteBuffer */
-/* Object : Write data to the internal sram buffer 1 or 2 */
-/* Input Parameters : DataFlash Service */
-/* : <BufferCommand> = command to write buffer1 or buffer2 */
-/* : <*dataBuffer> = data buffer to write */
-/* : <bufferAddress> = address in the internal buffer */
-/* : <SizeToWrite> = data buffer size */
-/* Return value : State of the dataflash */
-/*------------------------------------------------------------------------------*/
-AT91S_DataFlashStatus AT91F_DataFlashWriteBuffer (
- AT91PS_DataFlash pDataFlash,
- unsigned char BufferCommand,
- unsigned char *dataBuffer,
- unsigned int bufferAddress,
- int SizeToWrite )
-{
- int cmdsize;
- /* Test if the buffer command is legal */
- if ((BufferCommand != DB_BUF1_WRITE) && (BufferCommand != DB_BUF2_WRITE))
- return DATAFLASH_BAD_COMMAND;
-
- /* buffer address must be lower than page size */
- if (bufferAddress > pDataFlash->pDevice->pages_size)
- return DATAFLASH_BAD_ADDRESS;
-
- if ( (pDataFlash->pDataFlashDesc->state) != IDLE)
- return DATAFLASH_BUSY;
-
- /* Send first Write Command */
- pDataFlash->pDataFlashDesc->command[0] = BufferCommand;
- pDataFlash->pDataFlashDesc->command[1] = 0;
- if (pDataFlash->pDevice->pages_number >= 16384) {
- pDataFlash->pDataFlashDesc->command[2] = 0;
- pDataFlash->pDataFlashDesc->command[3] = (unsigned char)(((unsigned int)(bufferAddress & pDataFlash->pDevice->byte_mask)) >> 8) ;
- pDataFlash->pDataFlashDesc->command[4] = (unsigned char)((unsigned int)bufferAddress & 0x00FF) ;
- cmdsize = 5;
- } else {
- pDataFlash->pDataFlashDesc->command[2] = (unsigned char)(((unsigned int)(bufferAddress & pDataFlash->pDevice->byte_mask)) >> 8) ;
- pDataFlash->pDataFlashDesc->command[3] = (unsigned char)((unsigned int)bufferAddress & 0x00FF) ;
- pDataFlash->pDataFlashDesc->command[4] = 0;
- cmdsize = 4;
- }
-
- pDataFlash->pDataFlashDesc->tx_cmd_pt = pDataFlash->pDataFlashDesc->command ;
- pDataFlash->pDataFlashDesc->tx_cmd_size = cmdsize ;
- pDataFlash->pDataFlashDesc->rx_cmd_pt = pDataFlash->pDataFlashDesc->command ;
- pDataFlash->pDataFlashDesc->rx_cmd_size = cmdsize ;
-
- pDataFlash->pDataFlashDesc->rx_data_pt = dataBuffer ;
- pDataFlash->pDataFlashDesc->tx_data_pt = dataBuffer ;
- pDataFlash->pDataFlashDesc->rx_data_size = SizeToWrite ;
- pDataFlash->pDataFlashDesc->tx_data_size = SizeToWrite ;
-
- return AT91F_SpiWrite(pDataFlash->pDataFlashDesc);
-}
-
-/*------------------------------------------------------------------------------*/
-/* Function Name : AT91F_PageErase */
-/* Object : Erase a page */
-/* Input Parameters : DataFlash Service */
-/* : Page concerned */
-/* : */
-/* Return value : State of the dataflash */
-/*------------------------------------------------------------------------------*/
-AT91S_DataFlashStatus AT91F_PageErase(
- AT91PS_DataFlash pDataFlash,
- unsigned int page)
-{
- int cmdsize;
- /* Test if the buffer command is legal */
- /* no data to transmit or receive */
- pDataFlash->pDataFlashDesc->tx_data_size = 0;
-
- cmdsize = 4;
- if (pDataFlash->pDevice->pages_number >= 16384)
- cmdsize = 5;
- return(AT91F_DataFlashSendCommand (pDataFlash, DB_PAGE_ERASE, cmdsize, page*pDataFlash->pDevice->pages_size));
-}
-
-
-/*------------------------------------------------------------------------------*/
-/* Function Name : AT91F_BlockErase */
-/* Object : Erase a Block */
-/* Input Parameters : DataFlash Service */
-/* : Page concerned */
-/* : */
-/* Return value : State of the dataflash */
-/*------------------------------------------------------------------------------*/
-AT91S_DataFlashStatus AT91F_BlockErase(
- AT91PS_DataFlash pDataFlash,
- unsigned int block)
-{
- int cmdsize;
- /* Test if the buffer command is legal */
- /* no data to transmit or receive */
- pDataFlash->pDataFlashDesc->tx_data_size = 0;
- cmdsize = 4;
- if (pDataFlash->pDevice->pages_number >= 16384)
- cmdsize = 5;
- return(AT91F_DataFlashSendCommand (pDataFlash, DB_BLOCK_ERASE,cmdsize, block*8*pDataFlash->pDevice->pages_size));
-}
-
-/*------------------------------------------------------------------------------*/
-/* Function Name : AT91F_WriteBufferToMain */
-/* Object : Write buffer to the main memory */
-/* Input Parameters : DataFlash Service */
-/* : <BufferCommand> = command to send to buffer1 or buffer2 */
-/* : <dest> = main memory address */
-/* Return value : State of the dataflash */
-/*------------------------------------------------------------------------------*/
-AT91S_DataFlashStatus AT91F_WriteBufferToMain (
- AT91PS_DataFlash pDataFlash,
- unsigned char BufferCommand,
- unsigned int dest )
-{
- int cmdsize;
- /* Test if the buffer command is correct */
- if ((BufferCommand != DB_BUF1_PAGE_PGM) &&
- (BufferCommand != DB_BUF1_PAGE_ERASE_PGM) &&
- (BufferCommand != DB_BUF2_PAGE_PGM) &&
- (BufferCommand != DB_BUF2_PAGE_ERASE_PGM) )
- return DATAFLASH_BAD_COMMAND;
-
- /* no data to transmit or receive */
- pDataFlash->pDataFlashDesc->tx_data_size = 0;
-
- cmdsize = 4;
- if (pDataFlash->pDevice->pages_number >= 16384)
- cmdsize = 5;
- /* Send the command to the dataflash */
- return(AT91F_DataFlashSendCommand (pDataFlash, BufferCommand, cmdsize, dest));
-}
-
-
-/*------------------------------------------------------------------------------*/
-/* Function Name : AT91F_PartialPageWrite */
-/* Object : Erase partielly a page */
-/* Input Parameters : <page> = page number */
-/* : <AdrInpage> = adr to begin the fading */
-/* : <length> = Number of bytes to erase */
-/*------------------------------------------------------------------------------*/
-AT91S_DataFlashStatus AT91F_PartialPageWrite (
- AT91PS_DataFlash pDataFlash,
- unsigned char *src,
- unsigned int dest,
- unsigned int size)
-{
- unsigned int page;
- unsigned int AdrInPage;
-
- page = dest / (pDataFlash->pDevice->pages_size);
- AdrInPage = dest % (pDataFlash->pDevice->pages_size);
-
- /* Read the contents of the page in the Sram Buffer */
- AT91F_MainMemoryToBufferTransfert(pDataFlash, DB_PAGE_2_BUF1_TRF, page);
- AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_TIMEOUT_WRDY);
- /*Update the SRAM buffer */
- AT91F_DataFlashWriteBuffer(pDataFlash, DB_BUF1_WRITE, src, AdrInPage, size);
-
- AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_TIMEOUT_WRDY);
-
- /* Erase page if a 128 Mbits device */
- if (pDataFlash->pDevice->pages_number >= 16384) {
- AT91F_PageErase(pDataFlash, page);
- /* Rewrite the modified Sram Buffer in the main memory */
- AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_TIMEOUT_WRDY);
- }
-
- /* Rewrite the modified Sram Buffer in the main memory */
- return(AT91F_WriteBufferToMain(pDataFlash, DB_BUF1_PAGE_ERASE_PGM, (page*pDataFlash->pDevice->pages_size)));
-}
-
-
-/*------------------------------------------------------------------------------*/
-/* Function Name : AT91F_DataFlashWrite */
-/* Object : */
-/* Input Parameters : <*src> = Source buffer */
-/* : <dest> = dataflash adress */
-/* : <size> = data buffer size */
-/*------------------------------------------------------------------------------*/
-AT91S_DataFlashStatus AT91F_DataFlashWrite(
- AT91PS_DataFlash pDataFlash,
- unsigned char *src,
- int dest,
- int size )
-{
- unsigned int length;
- unsigned int page;
- unsigned int status;
-
- AT91F_SpiEnable(pDataFlash->pDevice->cs);
-
- if ( (dest + size) > (pDataFlash->pDevice->pages_size * (pDataFlash->pDevice->pages_number)))
- return DATAFLASH_MEMORY_OVERFLOW;
-
- /* If destination does not fit a page start address */
- if ((dest % ((unsigned int)(pDataFlash->pDevice->pages_size))) != 0 ) {
- length = pDataFlash->pDevice->pages_size - (dest % ((unsigned int)(pDataFlash->pDevice->pages_size)));
-
- if (size < length)
- length = size;
-
- if(!AT91F_PartialPageWrite(pDataFlash,src, dest, length))
- return DATAFLASH_ERROR;
-
- AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_TIMEOUT_WRDY);
-
- /* Update size, source and destination pointers */
- size -= length;
- dest += length;
- src += length;
- }
-
- while (( size - pDataFlash->pDevice->pages_size ) >= 0 ) {
- /* program dataflash page */
- page = (unsigned int)dest / (pDataFlash->pDevice->pages_size);
-
- status = AT91F_DataFlashWriteBuffer(pDataFlash, DB_BUF1_WRITE, src, 0, pDataFlash->pDevice->pages_size);
- AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_TIMEOUT_WRDY);
-
- status = AT91F_PageErase(pDataFlash, page);
- AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_TIMEOUT_WRDY);
- if (!status)
- return DATAFLASH_ERROR;
-
- status = AT91F_WriteBufferToMain (pDataFlash, DB_BUF1_PAGE_PGM, dest);
- if(!status)
- return DATAFLASH_ERROR;
-
- AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_TIMEOUT_WRDY);
-
- /* Update size, source and destination pointers */
- size -= pDataFlash->pDevice->pages_size ;
- dest += pDataFlash->pDevice->pages_size ;
- src += pDataFlash->pDevice->pages_size ;
- }
-
- /* If still some bytes to read */
- if ( size > 0 ) {
- /* program dataflash page */
- if(!AT91F_PartialPageWrite(pDataFlash, src, dest, size) )
- return DATAFLASH_ERROR;
-
- AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_TIMEOUT_WRDY);
- }
- return DATAFLASH_OK;
-}
-
-
-/*------------------------------------------------------------------------------*/
-/* Function Name : AT91F_DataFlashRead */
-/* Object : Read a block in dataflash */
-/* Input Parameters : */
-/* Return value : */
-/*------------------------------------------------------------------------------*/
-int AT91F_DataFlashRead(
- AT91PS_DataFlash pDataFlash,
- unsigned long addr,
- unsigned long size,
- char *buffer)
-{
- unsigned long SizeToRead;
-
- AT91F_SpiEnable(pDataFlash->pDevice->cs);
-
- if(AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_TIMEOUT_WRDY) != DATAFLASH_OK)
- return -1;
-
- while (size) {
- SizeToRead = (size < 0x8000)? size:0x8000;
-
- if (AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_TIMEOUT_WRDY) != DATAFLASH_OK)
- return -1;
-
- if (AT91F_DataFlashContinuousRead (pDataFlash, addr, buffer, SizeToRead) != DATAFLASH_OK)
- return -1;
-
- size -= SizeToRead;
- addr += SizeToRead;
- buffer += SizeToRead;
- }
-
- return DATAFLASH_OK;
-}
-
-
-/*------------------------------------------------------------------------------*/
-/* Function Name : AT91F_DataflashProbe */
-/* Object : */
-/* Input Parameters : */
-/* Return value : Dataflash status register */
-/*------------------------------------------------------------------------------*/
-int AT91F_DataflashProbe(int cs, AT91PS_DataflashDesc pDesc)
-{
- AT91F_SpiEnable(cs);
- AT91F_DataFlashGetStatus(pDesc);
- return((pDesc->command[1] == 0xFF)? 0: pDesc->command[1] & 0x3C);
-}
-
-#endif
diff --git a/board/cmc_pu2/cmc_pu2.c b/board/cmc_pu2/cmc_pu2.c
deleted file mode 100644
index 14168e636b..0000000000
--- a/board/cmc_pu2/cmc_pu2.c
+++ /dev/null
@@ -1,180 +0,0 @@
-/*
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * Modified for CMC_PU2 (removed Smart Media support) by Gary Jennejohn
- * (2004) garyj@denx.de
- *
- * Modified for CMC_BASIC by Martin Krause (2005), TQ-Systems GmbH
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/mach-types.h>
-#include <asm/arch/AT91RM9200.h>
-#include <at91rm9200_net.h>
-#include <dm9161.h>
-
-/* ------------------------------------------------------------------------- */
-/*
- * Miscelaneous platform dependent initialisations
- */
-#define CMC_HP_BASIC 1
-#define CMC_PU2 2
-#define CMC_BASIC 4
-
-int hw_detect (void);
-
-int board_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
- AT91PS_PIO piob = AT91C_BASE_PIOB;
- AT91PS_PIO pioc = AT91C_BASE_PIOC;
-
- /* Enable Ctrlc */
- console_init_f ();
-
- /* Correct IRDA resistor problem */
- /* Set PA23_TXD in Output */
- /* (AT91PS_PIO) AT91C_BASE_PIOA->PIO_OER = AT91C_PA23_TXD2; */
-
- /* memory and cpu-speed are setup before relocation */
- /* so we do _nothing_ here */
-
- /* PIOB and PIOC clock enabling */
- *AT91C_PMC_PCER = 1 << AT91C_ID_PIOB;
- *AT91C_PMC_PCER = 1 << AT91C_ID_PIOC;
-
- /*
- * configure PC0-PC3 as input without pull ups, so RS485 driver enable
- * (CMC-PU2) and digital outputs (CMC-BASIC) are deactivated.
- */
- pioc->PIO_ODR = AT91C_PIO_PC0 | AT91C_PIO_PC1 |
- AT91C_PIO_PC2 | AT91C_PIO_PC3;
- pioc->PIO_PPUDR = AT91C_PIO_PC0 | AT91C_PIO_PC1 |
- AT91C_PIO_PC2 | AT91C_PIO_PC3;
- pioc->PIO_PER = AT91C_PIO_PC0 | AT91C_PIO_PC1 |
- AT91C_PIO_PC2 | AT91C_PIO_PC3;
-
- /*
- * On CMC-PU2 board configure PB3-PB6 to input without pull ups to
- * clear the duo LEDs (the external pull downs assure a proper
- * signal). On CMC-BASIC and CMC-HP-BASIC set PB3-PB6 to output and
- * drive it high, to configure current measurement on AINx.
- */
- if (hw_detect() & CMC_PU2) {
- piob->PIO_ODR = AT91C_PIO_PB3 | AT91C_PIO_PB4 |
- AT91C_PIO_PB5 | AT91C_PIO_PB6;
- }
- else if ((hw_detect() & CMC_BASIC) || (hw_detect() & CMC_HP_BASIC)) {
- piob->PIO_SODR = AT91C_PIO_PB3 | AT91C_PIO_PB4 |
- AT91C_PIO_PB5 | AT91C_PIO_PB6;
- piob->PIO_OER = AT91C_PIO_PB3 | AT91C_PIO_PB4 |
- AT91C_PIO_PB5 | AT91C_PIO_PB6;
- }
- piob->PIO_PPUDR = AT91C_PIO_PB3 | AT91C_PIO_PB4 |
- AT91C_PIO_PB5 | AT91C_PIO_PB6;
- piob->PIO_PER = AT91C_PIO_PB3 | AT91C_PIO_PB4 |
- AT91C_PIO_PB5 | AT91C_PIO_PB6;
-
- /*
- * arch number of CMC_PU2-Board. MACH_TYPE_CMC_PU2 is not supported in
- * the linuxarm kernel, yet.
- */
- /* gd->bd->bi_arch_number = MACH_TYPE_CMC_PU2; */
- gd->bd->bi_arch_number = 251;
- /* adress of boot parameters */
- gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
-
- return 0;
-}
-
-int dram_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- gd->bd->bi_dram[0].start = PHYS_SDRAM;
- gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
- return 0;
-}
-
-int checkboard (void)
-{
- if (hw_detect() & CMC_PU2)
- puts ("Board: CMC-PU2 (Rittal GmbH)\n");
- else if (hw_detect() & CMC_BASIC)
- puts ("Board: CMC-BASIC (Rittal GmbH)\n");
- else if (hw_detect() & CMC_HP_BASIC)
- puts ("Board: CMC-HP-BASIC (Rittal GmbH)\n");
- else
- puts ("Board: unknown\n");
- return 0;
-}
-
-int hw_detect (void)
-{
- AT91PS_PIO pio = AT91C_BASE_PIOB;
-
- /* PIOB clock enabling */
- *AT91C_PMC_PCER = 1 << AT91C_ID_PIOB;
-
- /* configure PB12 as input without pull up */
- pio->PIO_ODR = AT91C_PIO_PB12;
- pio->PIO_PPUDR = AT91C_PIO_PB12;
- pio->PIO_PER = AT91C_PIO_PB12;
-
- /* configure PB13 as input without pull up */
- pio->PIO_ODR = AT91C_PIO_PB13;
- pio->PIO_PPUDR = AT91C_PIO_PB13;
- pio->PIO_PER = AT91C_PIO_PB13;
-
- /* read board identification pin */
- if (pio->PIO_PDSR & AT91C_PIO_PB12)
- return ((pio->PIO_PDSR & AT91C_PIO_PB13)
- ? CMC_PU2 : 0);
- else
- return ((pio->PIO_PDSR & AT91C_PIO_PB13)
- ? CMC_HP_BASIC : CMC_BASIC);
-}
-
-#ifdef CONFIG_DRIVER_ETHER
-#if (CONFIG_COMMANDS & CFG_CMD_NET)
-
-/*
- * Name:
- * at91rm9200_GetPhyInterface
- * Description:
- * Initialise the interface functions to the PHY
- * Arguments:
- * None
- * Return value:
- * None
- */
-void at91rm9200_GetPhyInterface(AT91PS_PhyOps p_phyops)
-{
- p_phyops->Init = dm9161_InitPhy;
- p_phyops->IsPhyConnected = dm9161_IsPhyConnected;
- p_phyops->GetLinkSpeed = dm9161_GetLinkSpeed;
- p_phyops->AutoNegotiate = dm9161_AutoNegotiate;
-}
-
-#endif /* CONFIG_COMMANDS & CFG_CMD_NET */
-#endif /* CONFIG_DRIVER_ETHER */
diff --git a/board/cmc_pu2/config.mk b/board/cmc_pu2/config.mk
deleted file mode 100644
index 7116eea872..0000000000
--- a/board/cmc_pu2/config.mk
+++ /dev/null
@@ -1,3 +0,0 @@
-TEXT_BASE = 0x20F00000
-## For testing: load at 0x20100000 and "go" at 0x201000A4
-#TEXT_BASE = 0x20100000
diff --git a/board/cmc_pu2/flash.c b/board/cmc_pu2/flash.c
deleted file mode 100644
index 9983c7b78c..0000000000
--- a/board/cmc_pu2/flash.c
+++ /dev/null
@@ -1,468 +0,0 @@
-/*
- * (C) Copyright 2003-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2004
- * Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de
- *
- * Modified for the CMC PU2 by (C) Copyright 2004 Gary Jennejohn
- * garyj@denx.de
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-
-#ifndef CFG_ENV_ADDR
-#define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_ENV_OFFSET)
-#endif
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-#define FLASH_CYCLE1 0x0555
-#define FLASH_CYCLE2 0x02AA
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size(vu_short *addr, flash_info_t *info);
-static void flash_reset(flash_info_t *info);
-static int write_word_amd(flash_info_t *info, vu_short *dest, ushort data);
-static flash_info_t *flash_get_info(ulong base);
-
-/*-----------------------------------------------------------------------
- * flash_init()
- *
- * sets up flash_info and returns size of FLASH (bytes)
- */
-unsigned long flash_init (void)
-{
- unsigned long size = 0;
- ulong flashbase = CFG_FLASH_BASE;
-
- /* Init: no FLASHes known */
- memset(&flash_info[0], 0, sizeof(flash_info_t));
-
- flash_info[0].size = flash_get_size((vu_short *)flashbase, &flash_info[0]);
-
- size = flash_info[0].size;
-
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
- /* monitor protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+monitor_flash_len-1,
- flash_get_info(CFG_MONITOR_BASE));
-#endif
-
-#ifdef CFG_ENV_IS_IN_FLASH
- /* ENV protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR+CFG_ENV_SIZE-1,
- flash_get_info(CFG_ENV_ADDR));
-#endif
-
- return size ? size : 1;
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_reset(flash_info_t *info)
-{
- vu_short *base = (vu_short *)(info->start[0]);
-
- /* Put FLASH back in read mode */
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL)
- *base = 0x00FF; /* Intel Read Mode */
- else if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD)
- *base = 0x00F0; /* AMD Read Mode */
-}
-
-/*-----------------------------------------------------------------------
- */
-
-static flash_info_t *flash_get_info(ulong base)
-{
- int i;
- flash_info_t * info;
-
- info = NULL;
- for (i = 0; i < CFG_MAX_FLASH_BANKS; i ++) {
- info = & flash_info[i];
- if (info->size && info->start[0] <= base &&
- base <= info->start[0] + info->size - 1)
- break;
- }
-
- return i == CFG_MAX_FLASH_BANKS ? 0 : info;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-void flash_print_info (flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD: printf ("AMD "); break;
- case FLASH_MAN_BM: printf ("BRIGHT MICRO "); break;
- case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
- case FLASH_MAN_SST: printf ("SST "); break;
- case FLASH_MAN_STM: printf ("STM "); break;
- case FLASH_MAN_INTEL: printf ("INTEL "); break;
- default: printf ("Unknown Vendor "); break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_S29GL064M:
- printf ("S29GL064M-R6 (64Mbit, uniform sector size)\n");
- break;
- default:
- printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20,
- info->sector_count);
-
- printf (" Sector Start Addresses:");
-
- for (i=0; i<info->sector_count; ++i) {
- if ((i % 5) == 0) {
- printf ("\n ");
- }
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " ");
- }
- printf ("\n");
- return;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-
-ulong flash_get_size (vu_short *addr, flash_info_t *info)
-{
- int i;
- ushort value;
- ulong base = (ulong)addr;
-
- /* Write auto select command sequence */
- addr[FLASH_CYCLE1] = 0x00AA; /* for AMD, Intel ignores this */
- addr[FLASH_CYCLE2] = 0x0055; /* for AMD, Intel ignores this */
- addr[FLASH_CYCLE1] = 0x0090; /* selects Intel or AMD */
-
- /* read Manufacturer ID */
- udelay(100);
- value = addr[0];
- debug ("Manufacturer ID: %04X\n", value);
-
- switch (value) {
-
- case (AMD_MANUFACT & 0xFFFF):
- debug ("Manufacturer: AMD (Spansion)\n");
- info->flash_id = FLASH_MAN_AMD;
- break;
-
- case (INTEL_MANUFACT & 0xFFFF):
- debug ("Manufacturer: Intel (not supported yet)\n");
- info->flash_id = FLASH_MAN_INTEL;
- break;
-
- default:
- printf ("Unknown Manufacturer ID: %04X\n", value);
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- goto out;
- }
-
- value = addr[1];
- debug ("Device ID: %04X\n", value);
-
- switch (addr[1]) {
-
- case (AMD_ID_MIRROR & 0xFFFF):
- debug ("Mirror Bit flash: addr[14] = %08X addr[15] = %08X\n",
- addr[14], addr[15]);
-
- switch(addr[14]) {
- case (AMD_ID_GL064M_2 & 0xFFFF):
- if (addr[15] != (AMD_ID_GL064M_3 & 0xffff)) {
- printf ("Chip: S29GLxxxM -> unknown\n");
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- } else {
- debug ("Chip: S29GL064M-R6\n");
- info->flash_id += FLASH_S29GL064M;
- info->sector_count = 128;
- info->size = 0x00800000;
- for (i = 0; i < info->sector_count; i++) {
- info->start[i] = base;
- base += 0x10000;
- }
- }
- break; /* => 16 MB */
- default:
- printf ("Chip: *** unknown ***\n");
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- break;
- }
- break;
-
- default:
- printf ("Unknown Device ID: %04X\n", value);
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- break;
- }
-
-out:
- /* Put FLASH back in read mode */
- flash_reset(info);
-
- return (info->size);
-}
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- vu_short *addr = (vu_short *)(info->start[0]);
- int flag, prot, sect, ssect, l_sect;
- ulong now, last;
-
- debug ("flash_erase: first: %d last: %d\n", s_first, s_last);
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- if ((info->flash_id == FLASH_UNKNOWN) ||
- (info->flash_id > FLASH_AMD_COMP)) {
- printf ("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- /*
- * Start erase on unprotected sectors.
- * Since the flash can erase multiple sectors with one command
- * we take advantage of that by doing the erase in chunks of
- * 3 sectors.
- */
- for (sect = s_first; sect <= s_last; ) {
- l_sect = -1;
-
- addr[FLASH_CYCLE1] = 0x00AA;
- addr[FLASH_CYCLE2] = 0x0055;
- addr[FLASH_CYCLE1] = 0x0080;
- addr[FLASH_CYCLE1] = 0x00AA;
- addr[FLASH_CYCLE2] = 0x0055;
-
- /* do the erase in chunks of at most 3 sectors */
- for (ssect = 0; ssect < 3; ssect++) {
- if ((sect + ssect) > s_last)
- break;
- if (info->protect[sect + ssect] == 0) { /* not protected */
- addr = (vu_short *)(info->start[sect + ssect]);
- addr[0] = 0x0030;
- l_sect = sect + ssect;
- }
- }
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- /*
- * We wait for the last triggered sector
- */
- if (l_sect < 0)
- goto DONE;
-
- reset_timer_masked ();
- last = 0;
- addr = (vu_short *)(info->start[l_sect]);
- while ((addr[0] & 0x0080) != 0x0080) {
- if ((now = get_timer_masked ()) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- return 1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- }
- addr = (vu_short *)info->start[0];
- addr[0] = 0x00F0; /* reset bank */
- sect += ssect;
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
-DONE:
- /* reset to read mode */
- addr = (vu_short *)info->start[0];
- addr[0] = 0x00F0; /* reset bank */
-
- printf (" done\n");
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong wp, data;
- int rc;
-
- if (addr & 1) {
- printf ("unaligned destination not supported\n");
- return ERR_ALIGN;
- };
-
- if ((int) src & 1) {
- printf ("unaligned source not supported\n");
- return ERR_ALIGN;
- };
-
- wp = addr;
-
- while (cnt >= 2) {
- data = *((vu_short *)src);
- if ((rc = write_word_amd(info, (vu_short *)wp, data)) != 0) {
-printf ("write_buff 1: write_word_amd() rc=%d\n", rc);
- return (rc);
- }
- src += 2;
- wp += 2;
- cnt -= 2;
- }
-
- if (cnt == 0) {
- return (ERR_OK);
- }
-
- if (cnt == 1) {
- data = (*((volatile u8 *) src)) | (*((volatile u8 *) (wp + 1)) << 8);
- if ((rc = write_word_amd(info, (vu_short *)wp, data)) != 0) {
-printf ("write_buff 1: write_word_amd() rc=%d\n", rc);
- return (rc);
- }
- src += 1;
- wp += 1;
- cnt -= 1;
- }
-
- return ERR_OK;
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash for AMD FLASH
- * A word is 16 or 32 bits, whichever the bus width of the flash bank
- * (not an individual chip) is.
- *
- * returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word_amd (flash_info_t *info, vu_short *dest, ushort data)
-{
- int flag;
- vu_short *base; /* first address in flash bank */
-
- /* Check if Flash is (sufficiently) erased */
- if ((*dest & data) != data) {
- return (2);
- }
-
- base = (vu_short *)(info->start[0]);
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- base[FLASH_CYCLE1] = 0x00AA; /* unlock */
- base[FLASH_CYCLE2] = 0x0055; /* unlock */
- base[FLASH_CYCLE1] = 0x00A0; /* selects program mode */
-
- *dest = data; /* start programming the data */
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- reset_timer_masked ();
-
- /* data polling for D7 */
- while ((*dest & 0x0080) != (data & 0x0080)) {
- if (get_timer_masked () > CFG_FLASH_WRITE_TOUT) {
- *dest = 0x00F0; /* reset bank */
- return (1);
- }
- }
- return (0);
-}
diff --git a/board/cmc_pu2/load_sernum_ethaddr.c b/board/cmc_pu2/load_sernum_ethaddr.c
deleted file mode 100644
index 94aa30df96..0000000000
--- a/board/cmc_pu2/load_sernum_ethaddr.c
+++ /dev/null
@@ -1,122 +0,0 @@
-/*
- * (C) Copyright 2000, 2001, 2002
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2005
- * Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/* #define DEBUG */
-
-#include <common.h>
-
-#define I2C_CHIP 0x50 /* I2C bus address of onboard EEPROM */
-#define I2C_ALEN 1 /* length of EEPROM addresses in bytes */
-#define I2C_OFFSET 0x0 /* start address of manufacturere data block
- * in EEPROM */
-
-/* 64 Byte manufacturer data block in EEPROM */
-struct manufacturer_data {
- unsigned int serial_number; /* serial number (0...999999) */
- unsigned short hardware; /* hardware version (e.g. V1.02) */
- unsigned short manuf_date; /* manufacture date (e.g. 25/02) */
- unsigned char name[20]; /* device name (in CHIP.INI) */
- unsigned char macadr[6]; /* MAC address */
- signed char a_kal[4]; /* calibration value for U */
- signed char i_kal[4]; /* calibration value for I */
- unsigned char reserve[18]; /* reserved */
- unsigned short save_nr; /* save count */
- unsigned short chksum; /* checksum */
-};
-
-
-int i2c_read (unsigned char chip, unsigned int addr, int alen,
- unsigned char *buffer, int len);
-
-/*-----------------------------------------------------------------------
- * Process manufacturer data block in EEPROM:
- *
- * If we boot on a system fresh from factory, check if the manufacturer data
- * in the EEPROM is valid and save some information it contains.
- *
- * CMC manufacturer data is defined as follows:
- *
- * - located in the onboard EEPROM
- * - starts at offset 0x0
- * - size 0x00000040
- *
- * Internal structure: see struct definition
- */
-
-void load_sernum_ethaddr (void)
-{
- struct manufacturer_data data;
- unsigned char serial [9];
- unsigned char ethaddr[18];
- unsigned short chksum;
- unsigned char *p;
- unsigned short i, is, id;
-
-#if !defined(CONFIG_HARD_I2C) && !defined(CONFIG_SOFT_I2C)
-#error you must define some I2C support (CONFIG_HARD_I2C or CONFIG_SOFT_I2C)
-#endif
- if (i2c_read(I2C_CHIP, I2C_OFFSET, I2C_ALEN, (unsigned char *)&data,
- sizeof(data)) != 0) {
- puts ("Error reading manufacturer data from EEPROM\n");
- return;
- }
-
- /* check if manufacturer data block is valid */
- p = (unsigned char *)&data;
- chksum = 0;
- for (i = 0; i < (sizeof(data) - sizeof(data.chksum)); i++)
- chksum += *p++;
-
- debug ("checksum of manufacturer data block: %#.4x\n", chksum);
-
- if (chksum != data.chksum) {
- puts ("Error: manufacturer data block has invalid checksum\n");
- return;
- }
-
- /* copy MAC address */
- is = 0;
- id = 0;
- for (i = 0; i < 6; i++) {
- sprintf (&ethaddr[id], "%02x", data.macadr[is++]);
- id += 2;
- if (is < 6)
- ethaddr[id++] = ':';
- }
- ethaddr[id] = '\0'; /* just to be sure */
-
- /* copy serial number */
- sprintf (serial, "%d", data.serial_number);
-
- /* set serial# and ethaddr if not yet defined */
- if (getenv("serial#") == NULL) {
- setenv ("serial#", serial);
- }
-
- if (getenv("ethaddr") == NULL) {
- setenv ("ethaddr", ethaddr);
- }
-}
diff --git a/board/cmc_pu2/u-boot.lds b/board/cmc_pu2/u-boot.lds
deleted file mode 100644
index f4fbf969c3..0000000000
--- a/board/cmc_pu2/u-boot.lds
+++ /dev/null
@@ -1,57 +0,0 @@
-/*
- * (C) Copyright 2002
- * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-/*OUTPUT_FORMAT("elf32-arm", "elf32-arm", "elf32-arm")*/
-OUTPUT_ARCH(arm)
-ENTRY(_start)
-SECTIONS
-{
- . = 0x00000000;
-
- . = ALIGN(4);
- .text :
- {
- cpu/arm920t/start.o (.text)
- *(.text)
- }
-
- . = ALIGN(4);
- .rodata : { *(.rodata) }
-
- . = ALIGN(4);
- .data : { *(.data) }
-
- . = ALIGN(4);
- .got : { *(.got) }
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = ALIGN(4);
- __bss_start = .;
- .bss : { *(.bss) }
- _end = .;
-}
diff --git a/board/cmi/Makefile b/board/cmi/Makefile
deleted file mode 100644
index 2324d8772e..0000000000
--- a/board/cmi/Makefile
+++ /dev/null
@@ -1,47 +0,0 @@
-#
-# (C) Copyright 2001 Wolfgang Denk, DENX Software Engineering, wd@denx.de
-#
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := flash.o cmi.o
-SOBJS :=
-
-$(LIB): $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/cmi/cmi.c b/board/cmi/cmi.c
deleted file mode 100644
index cbf34f7854..0000000000
--- a/board/cmi/cmi.c
+++ /dev/null
@@ -1,73 +0,0 @@
-/*
- * (C) Copyright 2003
- * Martin Winistoerfer, martinwinistoerfer@gmx.ch.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * File: cmi.c
- *
- * Discription: For generic board specific functions
- *
- */
-
-
-#include <common.h>
-#include <mpc5xx.h>
-
-#define SRAM_SIZE 1024000L /* 1M RAM available*/
-
-#if defined(__APPLE__)
-/* Leading underscore on symbols */
-# define SYM_CHAR "_"
-#else /* No leading character on symbols */
-# define SYM_CHAR
-#endif
-
-/*
- * Macros to generate global absolutes.
- */
-#define GEN_SYMNAME(str) SYM_CHAR #str
-#define GEN_VALUE(str) #str
-#define GEN_ABS(name, value) \
- asm (".globl " GEN_SYMNAME(name)); \
- asm (GEN_SYMNAME(name) " = " GEN_VALUE(value))
-
-/*
- * Check the board
- */
-int checkboard(void)
-{
- puts ("Board: ### No HW ID - assuming CMI board\n");
- return (0);
-}
-
-/*
- * Get RAM size.
- */
-long int initdram(int board_type)
-{
- return (SRAM_SIZE); /* We currently have a static size adapted for cmi board. */
-}
-
-/*
- * Absolute environment address for linker file.
- */
-GEN_ABS(env_start, CFG_ENV_OFFSET + CFG_FLASH_BASE);
diff --git a/board/cmi/config.mk b/board/cmi/config.mk
deleted file mode 100644
index 564f638a39..0000000000
--- a/board/cmi/config.mk
+++ /dev/null
@@ -1,31 +0,0 @@
-#
-# (C) Copyright 2003
-# Martin Winistoerfer, martinwinistoerfer@gmx.ch.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# EPQ Board Configuration
-#
-
-# Boot from flash at location 0x00000000
-TEXT_BASE = 0x02000000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)
diff --git a/board/cmi/flash.c b/board/cmi/flash.c
deleted file mode 100644
index f7c25f4284..0000000000
--- a/board/cmi/flash.c
+++ /dev/null
@@ -1,517 +0,0 @@
-/*
- * (C) Copyright 2003
- * Martin Winistoerfer, martinwinistoerfer@gmx.ch.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * File: flash.c
- *
- * Discription: This Driver is for 28F320J3A, 28F640J3A and
- * 28F128J3A Intel flashs working in 16 Bit mode.
- * They are single bank flashs.
- *
- * Most of this code is taken from existing u-boot
- * source code.
- */
-
-
-#include <common.h>
-#include <mpc5xx.h>
-
-#if defined(CFG_ENV_IS_IN_FLASH)
-# ifndef CFG_ENV_ADDR
-# define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_ENV_OFFSET)
-# endif
-# ifndef CFG_ENV_SIZE
-# define CFG_ENV_SIZE CFG_ENV_SECT_SIZE
-# endif
-# ifndef CFG_ENV_SECT_SIZE
-# define CFG_ENV_SECT_SIZE CFG_ENV_SIZE
-# endif
-#endif
-
-#define FLASH_ID_MASK 0xFFFF
-#define FLASH_BLOCK_SIZE 0x00010000
-#define FLASH_CMD_READ_ID 0x0090
-#define FLASH_CMD_RESET 0x00ff
-#define FLASH_CMD_BLOCK_ERASE 0x0020
-#define FLASH_CMD_ERASE_CONFIRM 0x00D0
-#define FLASH_CMD_CLEAR_STATUS 0x0050
-#define FLASH_CMD_SUSPEND_ERASE 0x00B0
-#define FLASH_CMD_WRITE 0x0040
-#define FLASH_CMD_PROTECT 0x0060
-#define FLASH_CMD_PROTECT_SET 0x0001
-#define FLASH_CMD_PROTECT_CLEAR 0x00D0
-#define FLASH_STATUS_DONE 0x0080
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
-
-/*
- * Local function prototypes
- */
-static ulong flash_get_size (vu_short *addr, flash_info_t *info);
-static int write_short (flash_info_t *info, ulong dest, ushort data);
-static void flash_get_offsets (ulong base, flash_info_t *info);
-
-/*
- * Initialize flash
- */
-
-unsigned long flash_init (void)
-{
- unsigned long size_b0;
- int i;
-
- /* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* Static FLASH Bank configuration here - FIXME XXX */
-#if 1
- debug ("\n## Get flash bank 1 size @ 0x%08x\n",FLASH_BASE0_PRELIM);
-#endif
- size_b0 = flash_get_size((vu_short *)FLASH_BASE0_PRELIM, &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank 0: "
- "ID 0x%lx, Size = 0x%08lx = %ld MB\n",
- flash_info[0].flash_id,
- size_b0, size_b0<<20);
- }
-
- flash_get_offsets (FLASH_BASE0_PRELIM, &flash_info[0]);
-
- flash_info[0].size = size_b0;
-
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
- /* monitor protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+monitor_flash_len-1,
- &flash_info[0]);
-#endif
-
-#ifdef CFG_ENV_IS_IN_FLASH
- /* ENV protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR+CFG_ENV_SECT_SIZE-1,
- &flash_info[0]);
-#endif
-
- return size_b0;
-}
-
-/*
- * Compute start adress of each sector (block)
- */
-
-static void flash_get_offsets (ulong base, flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_INTEL:
- for (i = 0; i < info->sector_count; i++) {
- info->start[i] = base + i * FLASH_BLOCK_SIZE;
- }
- return;
-
- default:
- printf ("Don't know sector offsets for flash type 0x%lx\n",
- info->flash_id);
- return;
- }
-}
-
-/*
- * Print flash information
- */
-void flash_print_info (flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD: printf ("AMD "); break;
- case FLASH_MAN_FUJ: printf ("Fujitsu "); break;
- case FLASH_MAN_SST: printf ("SST "); break;
- case FLASH_MAN_STM: printf ("STM "); break;
- case FLASH_MAN_INTEL: printf ("Intel "); break;
- case FLASH_MAN_MT: printf ("MT "); break;
- default: printf ("Unknown Vendor "); break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_28F320J3A: printf ("28F320J3A (32Mbit) 16-Bit\n");
- break;
- case FLASH_28F640J3A: printf ("28F640J3A (64Mbit) 16-Bit\n");
- break;
- case FLASH_28F128J3A: printf ("28F128J3A (128Mbit) 16-Bit\n");
- break;
- default: printf ("Unknown Chip Type\n");
- break;
- }
-
- if (info->size >= (1 << 20)) {
- i = 20;
- } else {
- i = 10;
- }
- printf (" Size: %ld %cB in %d Sectors\n",
- info->size >> i,
- (i == 20) ? 'M' : 'k',
- info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " "
- );
- }
- printf ("\n");
- return;
-}
-
-/*
- * Get size of flash in bytes.
- * The following code cannot be run from FLASH!
- */
-
-static ulong flash_get_size (vu_short *addr, flash_info_t *info)
-{
- vu_short value;
-
- /* Read Manufacturer ID */
- addr[0] = FLASH_CMD_READ_ID;
- value = addr[0];
-
- switch (value) {
- case (AMD_MANUFACT & FLASH_ID_MASK):
- info->flash_id = FLASH_MAN_AMD;
- break;
- case (FUJ_MANUFACT & FLASH_ID_MASK):
- info->flash_id = FLASH_MAN_FUJ;
- break;
- case (SST_MANUFACT & FLASH_ID_MASK):
- info->flash_id = FLASH_MAN_SST;
- break;
- case (STM_MANUFACT & FLASH_ID_MASK):
- info->flash_id = FLASH_MAN_STM;
- break;
- case (INTEL_MANUFACT & FLASH_ID_MASK):
- info->flash_id = FLASH_MAN_INTEL;
- break;
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- addr[0] = FLASH_CMD_RESET; /* restore read mode */
- return (0); /* no or unknown flash */
- }
-
- value = addr[1]; /* device ID */
-
- switch (value) {
- case (INTEL_ID_28F320J3A & FLASH_ID_MASK):
- info->flash_id += FLASH_28F320J3A;
- info->sector_count = 32;
- info->size = 0x00400000;
- break; /* => 32 MBit */
-
- case (INTEL_ID_28F640J3A & FLASH_ID_MASK):
- info->flash_id += FLASH_28F640J3A;
- info->sector_count = 64;
- info->size = 0x00800000;
- break; /* => 64 MBit */
-
- case (INTEL_ID_28F128J3A & FLASH_ID_MASK):
- info->flash_id += FLASH_28F128J3A;
- info->sector_count = 128;
- info->size = 0x01000000;
- break; /* => 128 MBit */
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- addr[0] = FLASH_CMD_RESET; /* restore read mode */
- return (0); /* => no or unknown flash */
-
- }
-
- if (info->sector_count > CFG_MAX_FLASH_SECT) {
- printf ("** ERROR: sector count %d > max (%d) **\n",
- info->sector_count, CFG_MAX_FLASH_SECT);
- info->sector_count = CFG_MAX_FLASH_SECT;
- }
-
- addr[0] = FLASH_CMD_RESET; /* restore read mode */
-
- return (info->size);
-}
-
-
-/*
- * Erase unprotected sectors
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- int flag, prot, sect;
- ulong start, now, last;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- if ((info->flash_id & FLASH_VENDMASK) != FLASH_MAN_INTEL) {
- printf ("Can erase only Intel flash types - aborted\n");
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- start = get_timer (0);
- last = start;
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- vu_short *addr = (vu_short *)(info->start[sect]);
- unsigned long status;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
-#ifdef DEBUG
- printf("Erase sector %d at start addr 0x%08X", sect, (unsigned int)info->start[sect]);
-#endif
-
- *addr = FLASH_CMD_CLEAR_STATUS;
- *addr = FLASH_CMD_BLOCK_ERASE;
- *addr = FLASH_CMD_ERASE_CONFIRM;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- while (((status = *addr) & FLASH_STATUS_DONE) != FLASH_STATUS_DONE) {
- if ((now=get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf("Flash erase timeout at address %lx\n", info->start[sect]);
- *addr = FLASH_CMD_SUSPEND_ERASE;
- *addr = FLASH_CMD_RESET;
- return 1;
- }
-
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- }
- *addr = FLASH_CMD_RESET;
- }
- }
- printf (" done\n");
- return 0;
-}
-
-/*
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- * 4 - Flash not identified
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp;
- ushort data;
- int i, rc;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- return 4;
- }
-
- wp = (addr & ~1); /* get lower word aligned address */
-
- /*
- * handle unaligned start byte
- */
-
- if (addr - wp) {
- data = 0;
- data = (data << 8) | *src++;
- --cnt;
- if ((rc = write_short(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 2;
- }
-
- /*
- * handle word aligned part
- */
-
- while (cnt >= 2) {
- data = 0;
- for (i=0; i<2; ++i) {
- data = (data << 8) | *src++;
- }
-
- if ((rc = write_short(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 2;
- cnt -= 2;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
-
- data = 0;
- for (i=0, cp=wp; i<2 && cnt>0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i<2; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- return (write_short(info, wp, data));
-
-}
-
-/*
- * Write 16 bit (short) to flash
- */
-
-static int write_short (flash_info_t *info, ulong dest, ushort data)
-{
- vu_short *addr = (vu_short*)(info->start[0]);
- ulong start;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*((vu_short *)dest) & data) != data) {
- return (2);
- }
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- if (!(info->flash_id & FLASH_VENDMASK)) {
- return 4;
- }
- *addr = FLASH_CMD_ERASE_CONFIRM;
- *addr = FLASH_CMD_WRITE;
-
- *((vu_short *)dest) = data;
-
- /* re-enable interrupts if necessary */
- if (flag) {
- enable_interrupts();
- }
-
- /* data polling for D7 */
- start = get_timer (0);
-
- /* wait for error or finish */
- while(!(addr[0] & FLASH_STATUS_DONE)){
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- addr[0] = FLASH_CMD_RESET;
- return (1);
- }
- }
-
- *addr = FLASH_CMD_RESET;
- return (0);
-}
-
-/*
- * Protects a flash sector
- */
-
-int flash_real_protect(flash_info_t *info, long sector, int prot)
-{
- vu_short *addr = (vu_short*)(info->start[sector]);
- ulong start;
-
- *addr = FLASH_CMD_CLEAR_STATUS;
- *addr = FLASH_CMD_PROTECT;
-
- if(prot) {
- *addr = FLASH_CMD_PROTECT_SET;
- } else {
- *addr = FLASH_CMD_PROTECT_CLEAR;
- }
-
- /* wait for error or finish */
- start = get_timer (0);
- while(!(addr[0] & FLASH_STATUS_DONE)){
- if (get_timer(start) > CFG_FLASH_ERASE_TOUT) {
- printf("Flash protect timeout at address %lx\n", info->start[sector]);
- addr[0] = FLASH_CMD_RESET;
- return (1);
- }
- }
- /* Set software protect flag */
- info->protect[sector] = prot;
- *addr = FLASH_CMD_RESET;
- return (0);
-}
diff --git a/board/cmi/u-boot.lds b/board/cmi/u-boot.lds
deleted file mode 100644
index 5b03fef66c..0000000000
--- a/board/cmi/u-boot.lds
+++ /dev/null
@@ -1,140 +0,0 @@
-/*
- * (C) Copyright 2001 Wolfgang Denk, DENX Software Engineering, wd@denx.de
- * (C) Copyright 2003 Martin Winistoerfer, martinwinistoerfer@gmx.ch
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc5xx/start.o (.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
-
- _end = . ;
- PROVIDE (end = .);
-/* . = env_start;
- .ppcenv :
- {
- common/environment.o (.ppcenv)
- }
-*/
-}
diff --git a/board/cobra5272/Makefile b/board/cobra5272/Makefile
deleted file mode 100644
index e5d8446313..0000000000
--- a/board/cobra5272/Makefile
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# (C) Copyright 2000-2003
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/cobra5272/bdm/cobra5272_uboot.gdb b/board/cobra5272/bdm/cobra5272_uboot.gdb
deleted file mode 100644
index 61e778ea5f..0000000000
--- a/board/cobra5272/bdm/cobra5272_uboot.gdb
+++ /dev/null
@@ -1,169 +0,0 @@
-#
-# GDB Init script for the Coldfire 5272 processor.
-#
-# The main purpose of this script is to configure the
-# DRAM controller so code can be loaded.
-#
-# This file was changed to suite the senTec COBRA5272 board.
-#
-
-define addresses
-
-set $mbar = 0x10000001
-set $scr = $mbar - 1 + 0x004
-set $spr = $mbar - 1 + 0x006
-set $pmr = $mbar - 1 + 0x008
-set $apmr = $mbar - 1 + 0x00e
-set $dir = $mbar - 1 + 0x010
-set $icr1 = $mbar - 1 + 0x020
-set $icr2 = $mbar - 1 + 0x024
-set $icr3 = $mbar - 1 + 0x028
-set $icr4 = $mbar - 1 + 0x02c
-set $isr = $mbar - 1 + 0x030
-set $pitr = $mbar - 1 + 0x034
-set $piwr = $mbar - 1 + 0x038
-set $pivr = $mbar - 1 + 0x03f
-set $csbr0 = $mbar - 1 + 0x040
-set $csor0 = $mbar - 1 + 0x044
-set $csbr1 = $mbar - 1 + 0x048
-set $csor1 = $mbar - 1 + 0x04c
-set $csbr2 = $mbar - 1 + 0x050
-set $csor2 = $mbar - 1 + 0x054
-set $csbr3 = $mbar - 1 + 0x058
-set $csor3 = $mbar - 1 + 0x05c
-set $csbr4 = $mbar - 1 + 0x060
-set $csor4 = $mbar - 1 + 0x064
-set $csbr5 = $mbar - 1 + 0x068
-set $csor5 = $mbar - 1 + 0x06c
-set $csbr6 = $mbar - 1 + 0x070
-set $csor6 = $mbar - 1 + 0x074
-set $csbr7 = $mbar - 1 + 0x078
-set $csor7 = $mbar - 1 + 0x07c
-set $pacnt = $mbar - 1 + 0x080
-set $paddr = $mbar - 1 + 0x084
-set $padat = $mbar - 1 + 0x086
-set $pbcnt = $mbar - 1 + 0x088
-set $pbddr = $mbar - 1 + 0x08c
-set $pbdat = $mbar - 1 + 0x08e
-set $pcddr = $mbar - 1 + 0x094
-set $pcdat = $mbar - 1 + 0x096
-set $pdcnt = $mbar - 1 + 0x098
-set $sdcr = $mbar - 1 + 0x180
-set $sdtr = $mbar - 1 + 0x184
-set $wrrr = $mbar - 1 + 0x280
-set $wirr = $mbar - 1 + 0x283
-set $wcr = $mbar - 1 + 0x288
-set $wer = $mbar - 1 + 0x28c
-
-end
-
-
-#
-# Setup system configuration
-#
-define setup-sys
-set *((unsigned short *) $scr) = 0x0003
-set *((unsigned short *) $spr) = 0xffff
-set *((unsigned char *) $pivr) = 0x4f
-end
-
-
-#
-# Setup Chip Selects (as per Motorola M5272C3 board)
-#
-define setup-cs
-
-# CS0 -- FLASH
-set *((unsigned long *) $csbr0) = 0xffe00201
-set *((unsigned long *) $csor0) = 0xffe00014
-
-# CS1 -- external bus test
-set *((unsigned long *) $csbr1) = 0x0
-set *((unsigned long *) $csor1) = 0x0
-
-# CS2 -- Optional FSRAM
-set *((unsigned long *) $csbr2) = 0x30000001
-set *((unsigned long *) $csor2) = 0xfff80000
-
-# CS3 -- not used
-set *((unsigned long *) $csbr3) = 0x0
-set *((unsigned long *) $csor3) = 0x0
-
-# CS4 -- not used
-set *((unsigned long *) $csbr4) = 0x0
-set *((unsigned long *) $csor4) = 0x0
-
-# CS5 -- PLI socket0
-set *((unsigned long *) $csbr5) = 0x0
-set *((unsigned long *) $csor5) = 0x0
-
-# CS6 -- PLI socket1
-set *((unsigned long *) $csbr6) = 0x0
-set *((unsigned long *) $csor6) = 0x0
-
-# CS7 -- SDRAM
-set *((unsigned long *) $csbr7) = 0x00000701
-set *((unsigned long *) $csor7) = 0xff00007c
-
-end
-
-
-#
-# Setup the DRAM controller.
-#
-
-define setup-dram
-set *((unsigned long *) $sdtr) = 0x0000f539
-set *((unsigned long *) $sdcr) = 0x00004211
-
-# Dummy write to start SDRAM
-set *((unsigned long *) 0) = 0
-end
-
-
-#
-# Setup for GPIO pins
-#
-define setup-ppio
-
-# PORT A -- the LED's
-set *((unsigned long *) $pacnt) = 0x00000000
-# lower 8 bits for output:
-set *((unsigned short *) $paddr) = 0xff
-# LED's off:
-set *((unsigned short *) $padat) = 0xff
-
-# PORT B
-set *((unsigned long *) $pbcnt) = 0x55554155
-set *((unsigned short *) $pbddr) = 0x0000
-set *((unsigned short *) $pbdat) = 0x17ea
-
-# PORT C
-#set *((unsigned short *) $pcddr) = 0x0000
-#set *((unsigned short *) $pcdat) = 0x1898
-
-# PORT D
-set *((unsigned long *) $pdcnt) = 0x00000000
-
-end
-
-
-#
-# Added for uClinux-coldfire target...
-#
-target bdm /dev/bdm
-
-addresses
-setup-sys
-setup-cs
-setup-dram
-setup-ppio
-set print pretty
-set print asm-demangle
-display/i $pc
-
-
-#
-load u-boot
-set $pc=0x20000
-c
diff --git a/board/cobra5272/bdm/gdbinit.reset b/board/cobra5272/bdm/gdbinit.reset
deleted file mode 100644
index 5f1e48217c..0000000000
--- a/board/cobra5272/bdm/gdbinit.reset
+++ /dev/null
@@ -1,2 +0,0 @@
-target bdm /dev/bdmcf0
-q
diff --git a/board/cobra5272/bdm/load-cobra_uboot b/board/cobra5272/bdm/load-cobra_uboot
deleted file mode 100644
index 933c7e7235..0000000000
--- a/board/cobra5272/bdm/load-cobra_uboot
+++ /dev/null
@@ -1,2 +0,0 @@
-m68k-bdm-elf-gdb -n -x board/cobra5272/bdm/cobra5272_uboot.gdb u-boot
-
diff --git a/board/cobra5272/bdm/reset b/board/cobra5272/bdm/reset
deleted file mode 100644
index 8bef00bf1c..0000000000
--- a/board/cobra5272/bdm/reset
+++ /dev/null
@@ -1,2 +0,0 @@
-m68k-bdm-elf-gdb -n -x bdm/gdbinit.reset
-
diff --git a/board/cobra5272/cobra5272.c b/board/cobra5272/cobra5272.c
deleted file mode 100644
index 26adb4abb1..0000000000
--- a/board/cobra5272/cobra5272.c
+++ /dev/null
@@ -1,55 +0,0 @@
-/*
- * (C) Copyright 2000-2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/m5272.h>
-#include <asm/immap_5272.h>
-
-
-int checkboard (void)
-{
- puts ("Board: ");
- puts ("senTec COBRA5272 Board\n");
- return 0;
-};
-
-long int initdram (int board_type)
-{
- volatile sdramctrl_t *sdp = (sdramctrl_t *) (CFG_MBAR + MCFSIM_SDCR);
-
- sdp->sdram_sdtr = 0xf539;
- sdp->sdram_sdcr = 0x4211;
-
- /* Dummy write to start SDRAM */
- *((volatile unsigned long *) 0) = 0;
-
- return CFG_SDRAM_SIZE * 1024 * 1024;
-};
-
-int testdram (void)
-{
- /* TODO: XXX XXX XXX */
- printf ("DRAM test not implemented!\n");
-
- return (0);
-}
diff --git a/board/cobra5272/config.mk b/board/cobra5272/config.mk
deleted file mode 100644
index ccb2cf735d..0000000000
--- a/board/cobra5272/config.mk
+++ /dev/null
@@ -1,25 +0,0 @@
-#
-# (C) Copyright 2000-2003
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-# Coldfire contribution by Bernhard Kuhn <bkuhn@metrowerks.com>
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-TEXT_BASE = 0xffe00000
diff --git a/board/cobra5272/flash.c b/board/cobra5272/flash.c
deleted file mode 100644
index 6f5874a671..0000000000
--- a/board/cobra5272/flash.c
+++ /dev/null
@@ -1,378 +0,0 @@
-/*
- * (C) Copyright 2000-2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-
-#define PHYS_FLASH_1 CFG_FLASH_BASE
-#define FLASH_BANK_SIZE 0x200000
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
-
-void flash_print_info (flash_info_t * info)
-{
- int i;
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case (AMD_MANUFACT & FLASH_VENDMASK):
- printf ("AMD: ");
- break;
- default:
- printf ("Unknown Vendor ");
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case (AMD_ID_PL160CB & FLASH_TYPEMASK):
- printf ("AM29PL160CB (16Mbit)\n");
- break;
- default:
- printf ("Unknown Chip Type\n");
- goto Done;
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; i++) {
- if ((i % 5) == 0) {
- printf ("\n ");
- }
- printf (" %08lX%s", info->start[i],
- info->protect[i] ? " (RO)" : " ");
- }
- printf ("\n");
-
-Done:
-}
-
-
-unsigned long flash_init (void)
-{
- int i, j;
- ulong size = 0;
-
- for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
- ulong flashbase = 0;
-
- flash_info[i].flash_id =
- (AMD_MANUFACT & FLASH_VENDMASK) |
- (AMD_ID_PL160CB & FLASH_TYPEMASK);
- flash_info[i].size = FLASH_BANK_SIZE;
- flash_info[i].sector_count = CFG_MAX_FLASH_SECT;
- memset (flash_info[i].protect, 0, CFG_MAX_FLASH_SECT);
- if (i == 0)
- flashbase = PHYS_FLASH_1;
- else
- panic ("configured to many flash banks!\n");
-
- for (j = 0; j < flash_info[i].sector_count; j++) {
- if (j == 0) {
- /* 1st is 16 KiB */
- flash_info[i].start[j] = flashbase;
- }
- if ((j >= 1) && (j <= 2)) {
- /* 2nd and 3rd are 8 KiB */
- flash_info[i].start[j] =
- flashbase + 0x4000 + 0x2000 * (j - 1);
- }
- if (j == 3) {
- /* 4th is 224 KiB */
- flash_info[i].start[j] = flashbase + 0x8000;
- }
- if ((j >= 4) && (j <= 10)) {
- /* rest is 256 KiB */
- flash_info[i].start[j] =
- flashbase + 0x40000 + 0x40000 * (j -
- 4);
- }
- }
- size += flash_info[i].size;
- }
-
- flash_protect (FLAG_PROTECT_SET,
- CFG_FLASH_BASE,
- CFG_FLASH_BASE + 0x3ffff, &flash_info[0]);
-
- return size;
-}
-
-
-#define CMD_READ_ARRAY 0x00F0
-#define CMD_UNLOCK1 0x00AA
-#define CMD_UNLOCK2 0x0055
-#define CMD_ERASE_SETUP 0x0080
-#define CMD_ERASE_CONFIRM 0x0030
-#define CMD_PROGRAM 0x00A0
-#define CMD_UNLOCK_BYPASS 0x0020
-
-#define MEM_FLASH_ADDR1 (*(volatile u16 *)(CFG_FLASH_BASE + (0x00000555<<1)))
-#define MEM_FLASH_ADDR2 (*(volatile u16 *)(CFG_FLASH_BASE + (0x000002AA<<1)))
-
-#define BIT_ERASE_DONE 0x0080
-#define BIT_RDY_MASK 0x0080
-#define BIT_PROGRAM_ERROR 0x0020
-#define BIT_TIMEOUT 0x80000000 /* our flag */
-
-#define READY 1
-#define ERR 2
-#define TMO 4
-
-
-int flash_erase (flash_info_t * info, int s_first, int s_last)
-{
- ulong result;
- int iflag, cflag, prot, sect;
- int rc = ERR_OK;
- int chip1;
-
- /* first look for protection bits */
-
- if (info->flash_id == FLASH_UNKNOWN)
- return ERR_UNKNOWN_FLASH_TYPE;
-
- if ((s_first < 0) || (s_first > s_last)) {
- return ERR_INVAL;
- }
-
- if ((info->flash_id & FLASH_VENDMASK) !=
- (AMD_MANUFACT & FLASH_VENDMASK)) {
- return ERR_UNKNOWN_FLASH_VENDOR;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
- if (prot)
- return ERR_PROTECTED;
-
- /*
- * Disable interrupts which might cause a timeout
- * here. Remember that our exception vectors are
- * at address 0 in the flash, and we don't want a
- * (ticker) exception to happen while the flash
- * chip is in programming mode.
- */
-
- cflag = icache_status ();
- icache_disable ();
- iflag = disable_interrupts ();
-
- printf ("\n");
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect <= s_last && !ctrlc (); sect++) {
- printf ("Erasing sector %2d ... ", sect);
-
- /* arm simple, non interrupt dependent timer */
- set_timer (0);
-
- if (info->protect[sect] == 0) { /* not protected */
- volatile u16 *addr =
- (volatile u16 *) (info->start[sect]);
-
- MEM_FLASH_ADDR1 = CMD_UNLOCK1;
- MEM_FLASH_ADDR2 = CMD_UNLOCK2;
- MEM_FLASH_ADDR1 = CMD_ERASE_SETUP;
-
- MEM_FLASH_ADDR1 = CMD_UNLOCK1;
- MEM_FLASH_ADDR2 = CMD_UNLOCK2;
- *addr = CMD_ERASE_CONFIRM;
-
- /* wait until flash is ready */
- chip1 = 0;
-
- do {
- result = *addr;
-
- /* check timeout */
- if (get_timer (0) > CFG_FLASH_ERASE_TOUT) {
- MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
- chip1 = TMO;
- break;
- }
-
- if (!chip1
- && (result & 0xFFFF) & BIT_ERASE_DONE)
- chip1 = READY;
-
- } while (!chip1);
-
- MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
-
- if (chip1 == ERR) {
- rc = ERR_PROG_ERROR;
- goto outahere;
- }
- if (chip1 == TMO) {
- rc = ERR_TIMOUT;
- goto outahere;
- }
-
- printf ("ok.\n");
- } else { /* it was protected */
-
- printf ("protected!\n");
- }
- }
-
- if (ctrlc ())
- printf ("User Interrupt!\n");
-
- outahere:
- /* allow flash to settle - wait 10 ms */
- udelay (10000);
-
- if (iflag)
- enable_interrupts ();
-
- if (cflag)
- icache_enable ();
-
- return rc;
-}
-
-
-volatile static int write_word (flash_info_t * info, ulong dest, ulong data)
-{
- volatile u16 *addr = (volatile u16 *) dest;
- ulong result;
- int rc = ERR_OK;
- int cflag, iflag;
- int chip1;
-
- /*
- * Check if Flash is (sufficiently) erased
- */
- result = *addr;
- if ((result & data) != data)
- return ERR_NOT_ERASED;
-
-
- /*
- * Disable interrupts which might cause a timeout
- * here. Remember that our exception vectors are
- * at address 0 in the flash, and we don't want a
- * (ticker) exception to happen while the flash
- * chip is in programming mode.
- */
-
- cflag = icache_status ();
- icache_disable ();
- iflag = disable_interrupts ();
-
- MEM_FLASH_ADDR1 = CMD_UNLOCK1;
- MEM_FLASH_ADDR2 = CMD_UNLOCK2;
- MEM_FLASH_ADDR1 = CMD_PROGRAM;
- *addr = data;
-
- /* arm simple, non interrupt dependent timer */
- set_timer (0);
-
- /* wait until flash is ready */
- chip1 = 0;
- do {
- result = *addr;
-
- /* check timeout */
- if (get_timer (0) > CFG_FLASH_ERASE_TOUT) {
- chip1 = ERR | TMO;
- break;
- }
- if (!chip1 && ((result & 0x80) == (data & 0x80)))
- chip1 = READY;
-
- } while (!chip1);
-
- *addr = CMD_READ_ARRAY;
-
- if (chip1 == ERR || *addr != data)
- rc = ERR_PROG_ERROR;
-
- if (iflag)
- enable_interrupts ();
-
- if (cflag)
- icache_enable ();
-
- return rc;
-}
-
-
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- ulong wp, data;
- int rc;
-
- if (addr & 1) {
- printf ("unaligned destination not supported\n");
- return ERR_ALIGN;
- }
-
-#if 0
- if (cnt & 1) {
- printf ("odd transfer sizes not supported\n");
- return ERR_ALIGN;
- }
-#endif
-
- wp = addr;
-
- if (addr & 1) {
- data = (*((volatile u8 *) addr) << 8) | *((volatile u8 *)
- src);
- if ((rc = write_word (info, wp - 1, data)) != 0) {
- return (rc);
- }
- src += 1;
- wp += 1;
- cnt -= 1;
- }
-
- while (cnt >= 2) {
- data = *((volatile u16 *) src);
- if ((rc = write_word (info, wp, data)) != 0) {
- return (rc);
- }
- src += 2;
- wp += 2;
- cnt -= 2;
- }
-
- if (cnt == 1) {
- data = (*((volatile u8 *) src) << 8) |
- *((volatile u8 *) (wp + 1));
- if ((rc = write_word (info, wp, data)) != 0) {
- return (rc);
- }
- src += 1;
- wp += 1;
- cnt -= 1;
- }
-
- return ERR_OK;
-}
diff --git a/board/cobra5272/u-boot.lds b/board/cobra5272/u-boot.lds
deleted file mode 100644
index 872f09439c..0000000000
--- a/board/cobra5272/u-boot.lds
+++ /dev/null
@@ -1,144 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(m68k)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
- cpu/mcf52x2/start.o (.text)
- cpu/mcf52x2/cpu_init.o (.text)
- lib_m68k/traps.o (.text)
- cpu/mcf52x2/interrupts.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/zlib.o (.text)
-
- . = DEFINED(env_offset) ? env_offset : .;
- common/environment.o (.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
-
- .reloc :
- {
- __got_start = .;
- *(.got)
- __got_end = .;
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- _sbss = .;
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- . = ALIGN(4);
- _ebss = .;
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/cogent/Makefile b/board/cogent/Makefile
deleted file mode 100644
index 4084c7ebe5..0000000000
--- a/board/cogent/Makefile
+++ /dev/null
@@ -1,47 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := mb.o flash.o dipsw.o lcd.o serial.o # pci.o rtc.o par.o kbm.o
-SOBJS :=
-
-$(LIB): $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/cogent/README b/board/cogent/README
deleted file mode 100644
index e6eef662c9..0000000000
--- a/board/cogent/README
+++ /dev/null
@@ -1,118 +0,0 @@
-Cogent Modular Architecture configuration
------------------------------------------
-
-As the name suggests, the Cogent platform is a modular system where
-you have a motherboard into which plugs a cpu module and one or more
-i/o modules. This provides very nice flexibility, but makes the
-configuration task somewhat harder.
-
-The possible Cogent motherboards are:
-
-Code Config Variable Description
----- --------------- -----------
-
-CMA101 CONFIG_CMA101 32MB ram, 2 ser, 1 par, rtc, dipsw,
- 2x16 lcd, eth(?)
-CMA102 CONFIG_CMA102 32MB ram, 2 ser, 1 par, rtc, dipsw,
- 2x16 lcd
-CMA111 CONFIG_CMA111 32MB ram, 1MB flash, 4 ser, 1 par,
- rtc, ps/2 kbd/mse, 2x16 lcd, 2xPCI,
- 10/100TP eth
-CMA120 CONFIG_CMA120 32MB ram, 1MB flash, 4 ser, 1 par,
- rtc, ps/2 kbd/mse, 2x16 lcd, 2xPCI,
- 10/100TP eth, 2xPCMCIA, video/lcd-panel
-CMA150 CONFIG_CMA150 8MB ram, 1MB flash, 2 ser, 1 par, rtc,
- ps/2 kbd/mse, 2x16 lcd
-
-The possible Cogent PowerPC CPU modules are:
-
-Code Config Variable Description
----- --------------- -----------
-
-CMA278-603EV CONFIG_CMA278_603EV PPC603ev CPU, 66MHz clock, 512K EPROM,
- JTAG/COP
-CMA278-603ER CONFIG_CMA278_603ER PPC603er CPU, 66MHz clock, 512K EPROM,
- JTAG/COP
-CMA278-740 CONFIG_CMA278_740 PPC740 CPU, 66MHz clock, 512K EPROM,
- JTAG/COP
-CMA280-509 CONFIG_CMA280_509 MPC505/509 CPU, 50MHz clock,
- 512K EPROM, BDM
-CMA282 CONFIG_CMA282 MPC8260 CPU, 66MHz clock, 512K EPROM,
- JTAG, 16M RAM, 1 x ser (SMC2),
- 1 x 10baseT PHY (SCC4), 1 x 10/100 TP
- PHY (FCC1), 2 x 48pin DIN (FCC2 + TDM1)
-CMA285 CONFIG_CMA285 MPC801 CPU, 33MHz clock, 512K EPROM,
- BDM
-CMA286-21 CONFIG_CMA286_21 MPC821 CPU, 66MHz clock, 512K EPROM,
- BDM, 16M RAM, 2 x ser (SMC1 + SMC2),
- 1 x 10baseT PHY (SCC2)
-CMA286-60-OLD CONFIG_CMA286_60_OLD MPC860 CPU, 33MHz clock, 128K EPROM,
- BDM
-CMA286-60 CONFIG_CMA286_60 MPC860 CPU, 66MHz clock, 512K EPROM,
- BDM, 16M RAM, 2 x ser (SMC1 + SMC2),
- 1 x 10baseT PHY (SCC2)
-CMA286-60P CONFIG_CMA286_60P MPC860P CPU, 66MHz clock, 512K EPROM,
- BDM, 16M RAM, 2 x ser (SMC1 + SMC2),
- 1 x 10baseT PHY (SCC2)
-CMA287-23 CONFIG_CMA287_23 MPC823 CPU, 33MHz clock, 512K EPROM,
- BDM
-CMA287-50 CONFIG_CMA287_50 MPC850 CPU, 33MHz clock, 512K EPROM,
- BDM
-
-(there are a lot of other cpu modules with ARM, MIPS and M-CORE CPUs,
-but we'll worry about those later).
-
-The possible Cogent CMA I/O Modules are:
-
-Code Config Variable Description
----- --------------- -----------
-
-CMA302 CONFIG_CMA302 up to 16M flash, ps/2 keyboard/mouse
-CMA352 CONFIG_CMA352 CMAbus <=> PCI
-
-Currently supported:
-
- Motherboards: CMA102
- CPU Modules: CMA286-60-OLD
- I/O Modules: CMA302 I/O module
-
-To configure, perform the usual U-Boot configuration task of editing
-"include/config_cogent_mpc8xx.h" and reviewing all the options and
-settings in there. In particular, check the chip select values
-installed into the memory controller's various option and base
-registers - these are set by the defines CFG_CMA_CSn_{BASE,SIZE} and
-CFG_{B,O}Rn_PRELIM. Also be careful of the clock settings installed
-into the SCCR - via the define CFG_SCCR. Finally, decide whether you
-want the serial console on motherboard serial port A or on one of the
-8xx SMC ports, and set CONFIG_8xx_CONS_{SMC1,SMC2,NONE} accordingly
-(NONE means use Cogent motherboard serial port A).
-
-Then edit the file "cogent/config.mk". Firstly, set TEXT_BASE to be
-the base address of the EPROM for the CPU module. This should be the
-same as the value selected for CFG_MONITOR_BASE in
-"include/config_cogent_*.h" (in fact, I have made this automatic via
-the -DTEXT_BASE=... option in CPPFLAGS).
-
-Finally, set the values of the make variables $(CMA_MB) and $(CMA_IOMS).
-
-$(CMA_MB) is the name of the directory that contains support for your
-motherboard. At this stage, only "cma10x" exists, which supports the
-CMA101 and CMA102 motherboards - but only selected devices, namely
-serial, lcd and dipsw.
-
-$(CMA_IOMS) is a list of zero or more directories that contain
-support for the i/o modules you have installed. At this stage, only
-"cma302" exists, which supports the CMA302 flash i/o module - but
-only the flash part, not the ps/2 keyboard and mouse interfaces.
-
-There should be a make variable for each of the above directories,
-which is the directory name with "_O" appended. This make variable is
-a list of object files to compile from that directory and include in
-the library.
-
- e.g. cma10x_O = serial.o ...
-
-That's it. Good Luck.
-
-Murray.Jensen@cmst.csiro.au
-August 31, 2000.
diff --git a/board/cogent/README.cma286 b/board/cogent/README.cma286
deleted file mode 100644
index 0345feae00..0000000000
--- a/board/cogent/README.cma286
+++ /dev/null
@@ -1,69 +0,0 @@
-CPU module revisions
---------------------
-
-My cpu module has the model number "CMA286-60-990526-01". My motherboard
-has the model number "CMA102-32M-990526-01". These are both fairly old,
-and may not reflect current design. In particular, I can see from the
-Cogent web site that the CMA286 has been significantly redesigned - it
-now has on board RAM (4M), ethernet 10baseT PHY (on SCC2), 2 serial ports
-(SMC1 and SMC2), and 48pin DIN for the FEC (if present i.e. MPC860T), and
-also the EPROM is 512K.
-
-My CMA286-60 has none of this, and only 128K EPROM. In addition, the CPU
-clock is listed as 66MHz, whereas mine is 33.333MHz.
-
-Clocks
-------
-
-Quote from my "CMA286 MPC860/821 User's Manual":
-
-"When setting up the Periodic Interrupt Timer (PIT), be aware that the
-CMA286 places the MPC860/821 in PLL X1 Mode. This means that we feed
-a 25MHz clock directly into the MPC860/821. This mode sets the divisor
-for the PIT to be 512. In addition, the Time Base Register (TMB)
-divisor is set to 16."
-
-I interpreted this information to mean that EXTCLK is 25MHz and that at
-power on reset, MODCK1=1 and MODCK2=0, which selects EXTCLK as the
-source for OSCCLK and PITRTCLK, sets RTDIV to 512 and sets MF (the
-multiplication factor) to 1 (I assume this is what they mean by X1
-mode above). MF=1 means the cpus internal clock runs at the same
-rate as EXTCLK i.e. 25MHz.
-
-Furthermore, since SCCR[TBS] (the Time Base Source selector bit in the
-System Clock and Reset Control register) is set in the cpu initialisation
-code, the TMBCLK source is forced to be GCLK2 and the TMBCLK prescale is
-forced to be 16. This results in TMBCLK=1562500.
-
-One problem - since PITRTCLK source is EXTCLK (25Mhz) and RTDIV is 512,
-PITRTCLK will be 48828.125 (huh?). Another quote from the MPC860 Users
-Manual:
-
-"When used by the real-time clock (RTC), the PITRTCLK source is first
-divided as determined by RTDIV, and then divided in the RTC circuits by
-either 8192 or 9600. Therefore, in order for the RTC to count in
-seconds, the clock source must satisfy:
-
- (EXTCLK or OSCM) / [(4 or 512) x (8192 or 9600)] = 1
-
-The RTC will operate with other frequencies, but it will not count in
-units of seconds."
-
-Therefore, the internal RTC of the MPC860 is not going to count in
-seconds, so we must use the motherboard RTC (if we need a RTC).
-
-I presume this means that they do not provide a fixed oscillator for
-OSCM. The code in get_gclk_freq() assumes PITRTCLK source is OSCM,
-RTDIV is 4, and that OSCM/4 is 8192 (i.e. a ~32KHz oscillator). Since
-the CMA286-60 doesn't have this (at least mine doesn't) we can't use
-the code in get_gclk_freq().
-
-Finally, it appears that the internal clock in my CMA286-60 is actually
-33.333MHz. Which makes TMBCLK=2083312.5 (another huh?) and
-PITRTCLK=65103.515625 (bloody hell!).
-
-If anyone finds anything wrong with the stuff above, I would appreciate
-an email about it.
-
-Murray Jensen <Murray.Jensen@csiro.au>
-21-Aug-00
diff --git a/board/cogent/config.mk b/board/cogent/config.mk
deleted file mode 100644
index ee779394bb..0000000000
--- a/board/cogent/config.mk
+++ /dev/null
@@ -1,31 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# Cogent Modular Architecture
-#
-
-# Boot EPROM location
-TEXT_BASE = 0xfff00000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)
diff --git a/board/cogent/dipsw.c b/board/cogent/dipsw.c
deleted file mode 100644
index d2027c9758..0000000000
--- a/board/cogent/dipsw.c
+++ /dev/null
@@ -1,50 +0,0 @@
-#include <common.h>
-#include <board/cogent/dipsw.h>
-
-unsigned char
-dipsw_raw(void)
-{
- return cma_mb_reg_read(&((cma_mb_dipsw *)CMA_MB_DIPSW_BASE)->dip_val);
-}
-
-unsigned char
-dipsw_cooked(void)
-{
- unsigned char val1, val2, mask1, mask2;
-
- val1 = dipsw_raw();
-
- /*
- * we want to mirror the bits because the low bit is switch 1 and high
- * bit is switch 8 and also invert them because 1=off and 0=on, according
- * to manual.
- *
- * this makes the value more intuitive i.e.
- * - left most, or high, or top, bit is left most switch (1);
- * - right most, or low, or bottom, bit is right most switch (8)
- * - a set bit means "on" and a clear bit means "off"
- */
-
- val2 = 0;
- for (mask1 = 1 << 7, mask2 = 1; mask1 > 0; mask1 >>= 1, mask2 <<= 1)
- if ((val1 & mask1) == 0)
- val2 |= mask2;
-
- return (val2);
-}
-
-void
-dipsw_init(void)
-{
- unsigned char val, mask;
-
- val = dipsw_cooked();
-
- printf("|");
- for (mask = 1 << 7; mask > 0; mask >>= 1)
- if (val & mask)
- printf("on |");
- else
- printf("off|");
- printf("\n");
-}
diff --git a/board/cogent/dipsw.h b/board/cogent/dipsw.h
deleted file mode 100644
index 4f52fd4392..0000000000
--- a/board/cogent/dipsw.h
+++ /dev/null
@@ -1,3 +0,0 @@
-extern unsigned char dipsw_raw(void);
-extern unsigned char dipsw_cooked(void);
-extern void dipsw_init(void);
diff --git a/board/cogent/flash.c b/board/cogent/flash.c
deleted file mode 100644
index 969520d277..0000000000
--- a/board/cogent/flash.c
+++ /dev/null
@@ -1,648 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <board/cogent/flash.h>
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-#if defined(CFG_ENV_IS_IN_FLASH)
-# ifndef CFG_ENV_ADDR
-# define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_ENV_OFFSET)
-# endif
-# ifndef CFG_ENV_SIZE
-# define CFG_ENV_SIZE CFG_ENV_SECT_SIZE
-# endif
-# ifndef CFG_ENV_SECT_SIZE
-# define CFG_ENV_SECT_SIZE CFG_ENV_SIZE
-# endif
-#endif
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static int write_word (flash_info_t *info, ulong dest, ulong data);
-
-/*-----------------------------------------------------------------------
- */
-
-
-#if defined(CONFIG_CMA302)
-
-/*
- * probe for the existence of flash at address "addr"
- * 0 = yes, 1 = bad Manufacturer's Id, 2 = bad Device Id
- */
-static int
-c302f_probe_word(c302f_addr_t addr)
-{
- /* reset the flash */
- *addr = C302F_BNK_CMD_RST;
-
- /* check the manufacturer id */
- *addr = C302F_BNK_CMD_RD_ID;
- if (*C302F_BNK_ADDR_MAN(addr) != C302F_BNK_RD_ID_MAN)
- return 1;
-
- /* check the device id */
- *addr = C302F_BNK_CMD_RD_ID;
- if (*C302F_BNK_ADDR_DEV(addr) != C302F_BNK_RD_ID_DEV)
- return 2;
-
-#ifdef FLASH_DEBUG
- {
- int i;
-
- printf("\nMaster Lock Config = 0x%08lx\n",
- *C302F_BNK_ADDR_CFGM(addr));
- for (i = 0; i < C302F_BNK_NBLOCKS; i++)
- printf("Block %2d Lock Config = 0x%08lx\n",
- i, *C302F_BNK_ADDR_CFG(i, addr));
- }
-#endif
-
- /* reset the flash again */
- *addr = C302F_BNK_CMD_RST;
-
- return 0;
-}
-
-/*
- * probe for Cogent CMA302 flash module at address "base" and store
- * info for any found into flash_info entry "fip". Must find at least
- * one bank.
- */
-static void
-c302f_probe(flash_info_t *fip, c302f_addr_t base)
-{
- c302f_addr_t addr, eaddr;
- int nbanks;
-
- fip->size = 0L;
- fip->sector_count = 0;
-
- addr = base;
- eaddr = C302F_BNK_ADDR_BASE(addr, C302F_MAX_BANKS);
- nbanks = 0;
-
- while (addr < eaddr) {
- c302f_addr_t addrw, eaddrw, addrb;
- int i, osc, nsc;
-
- addrw = addr;
- eaddrw = C302F_BNK_ADDR_NEXT_WORD(addrw);
-
- while (addrw < eaddrw)
- if (c302f_probe_word(addrw++) != 0)
- goto out;
-
- /* bank exists - append info for this bank to *fip */
- fip->flash_id = FLASH_MAN_INTEL|FLASH_28F008S5;
- fip->size += C302F_BNK_SIZE;
- osc = fip->sector_count;
- fip->sector_count += C302F_BNK_NBLOCKS;
- if ((nsc = fip->sector_count) >= CFG_MAX_FLASH_SECT)
- panic("Too many sectors in flash at address 0x%08lx\n",
- (unsigned long)base);
-
- addrb = addr;
- for (i = osc; i < nsc; i++) {
- fip->start[i] = (ulong)addrb;
- fip->protect[i] = 0;
- addrb = C302F_BNK_ADDR_NEXT_BLK(addrb);
- }
-
- addr = C302F_BNK_ADDR_NEXT_BNK(addr);
- nbanks++;
- }
-
-out:
- if (nbanks == 0)
- panic("ERROR: no flash found at address 0x%08lx\n",
- (unsigned long)base);
-}
-
-static void
-c302f_reset(flash_info_t *info, int sect)
-{
- c302f_addr_t addrw, eaddrw;
-
- addrw = (c302f_addr_t)info->start[sect];
- eaddrw = C302F_BNK_ADDR_NEXT_WORD(addrw);
-
- while (addrw < eaddrw) {
-#ifdef FLASH_DEBUG
- printf(" writing reset cmd to addr 0x%08lx\n",
- (unsigned long)addrw);
-#endif
- *addrw = C302F_BNK_CMD_RST;
- addrw++;
- }
-}
-
-static void
-c302f_erase_init(flash_info_t *info, int sect)
-{
- c302f_addr_t addrw, saddrw, eaddrw;
- int flag;
-
-#ifdef FLASH_DEBUG
- printf("0x%08lx C302F_BNK_CMD_PROG\n", C302F_BNK_CMD_PROG);
- printf("0x%08lx C302F_BNK_CMD_ERASE1\n", C302F_BNK_CMD_ERASE1);
- printf("0x%08lx C302F_BNK_CMD_ERASE2\n", C302F_BNK_CMD_ERASE2);
- printf("0x%08lx C302F_BNK_CMD_CLR_STAT\n", C302F_BNK_CMD_CLR_STAT);
- printf("0x%08lx C302F_BNK_CMD_RST\n", C302F_BNK_CMD_RST);
- printf("0x%08lx C302F_BNK_STAT_RDY\n", C302F_BNK_STAT_RDY);
- printf("0x%08lx C302F_BNK_STAT_ERR\n", C302F_BNK_STAT_ERR);
-#endif
-
- saddrw = (c302f_addr_t)info->start[sect];
- eaddrw = C302F_BNK_ADDR_NEXT_WORD(saddrw);
-
-#ifdef FLASH_DEBUG
- printf("erasing sector %d, start addr = 0x%08lx "
- "(bank next word addr = 0x%08lx)\n", sect,
- (unsigned long)saddrw, (unsigned long)eaddrw);
-#endif
-
- /* Disable intrs which might cause a timeout here */
- flag = disable_interrupts();
-
- for (addrw = saddrw; addrw < eaddrw; addrw++) {
-#ifdef FLASH_DEBUG
- printf(" writing erase cmd to addr 0x%08lx\n",
- (unsigned long)addrw);
-#endif
- *addrw = C302F_BNK_CMD_ERASE1;
- *addrw = C302F_BNK_CMD_ERASE2;
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-}
-
-static int
-c302f_erase_poll(flash_info_t *info, int sect)
-{
- c302f_addr_t addrw, saddrw, eaddrw;
- int sectdone, haderr;
-
- saddrw = (c302f_addr_t)info->start[sect];
- eaddrw = C302F_BNK_ADDR_NEXT_WORD(saddrw);
-
- sectdone = 1;
- haderr = 0;
-
- for (addrw = saddrw; addrw < eaddrw; addrw++) {
- c302f_word_t stat = *addrw;
-
-#ifdef FLASH_DEBUG
- printf(" checking status at addr "
- "0x%08lx [0x%08lx]\n",
- (unsigned long)addrw, stat);
-#endif
- if ((stat & C302F_BNK_STAT_RDY) != C302F_BNK_STAT_RDY)
- sectdone = 0;
- else if ((stat & C302F_BNK_STAT_ERR) != 0) {
- printf(" failed on sector %d "
- "(stat = 0x%08lx) at "
- "address 0x%08lx\n",
- sect, stat,
- (unsigned long)addrw);
- *addrw = C302F_BNK_CMD_CLR_STAT;
- haderr = 1;
- }
- }
-
- if (haderr)
- return (-1);
- else
- return (sectdone);
-}
-
-static int
-c302f_write_word(c302f_addr_t addr, c302f_word_t value)
-{
- c302f_word_t stat;
- ulong start;
- int flag, retval;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- *addr = C302F_BNK_CMD_PROG;
-
- *addr = value;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- retval = 0;
-
- /* data polling for D7 */
- start = get_timer (0);
- do {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- retval = 1;
- goto done;
- }
- stat = *addr;
- } while ((stat & C302F_BNK_STAT_RDY) != C302F_BNK_STAT_RDY);
-
- if ((stat & C302F_BNK_STAT_ERR) != 0) {
- printf("flash program failed (stat = 0x%08lx) "
- "at address 0x%08lx\n", (ulong)stat, (ulong)addr);
- *addr = C302F_BNK_CMD_CLR_STAT;
- retval = 3;
- }
-
-done:
- /* reset to read mode */
- *addr = C302F_BNK_CMD_RST;
-
- return (retval);
-}
-
-#endif /* CONFIG_CMA302 */
-
-unsigned long
-flash_init(void)
-{
- unsigned long total;
- int i;
- flash_info_t *fip;
-
- /* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- fip = &flash_info[0];
- total = 0L;
-
-#if defined(CONFIG_CMA302)
- c302f_probe(fip, (c302f_addr_t)CFG_FLASH_BASE);
- total += fip->size;
- fip++;
-#endif
-
-#if (CMA_MB_CAPS & CMA_MB_CAP_FLASH)
- /* not yet ...
- cmbf_probe(fip, (cmbf_addr_t)CMA_MB_FLASH_BASE);
- total += fip->size;
- fip++;
- */
-#endif
-
- /*
- * protect monitor and environment sectors
- */
-
-#if CFG_MONITOR_BASE == CFG_FLASH_BASE
- flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+monitor_flash_len-1,
- &flash_info[0]);
-#endif
-
-#ifdef CFG_ENV_IS_IN_FLASH
- /* ENV protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR+CFG_ENV_SECT_SIZE-1,
- &flash_info[0]);
-#endif
- return total;
-}
-
-/*-----------------------------------------------------------------------
- */
-void
-flash_print_info(flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_INTEL: printf ("INTEL "); break;
- default: printf ("Unknown Vendor "); break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_28F008S5: printf ("28F008S5\n");
- break;
- default: printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
- if ((i % 4) == 0)
- printf ("\n ");
- printf (" %2d - %08lX%s", i,
- info->start[i],
- info->protect[i] ? " (RO)" : " "
- );
- }
- printf ("\n");
- return;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-
-int
-flash_erase(flash_info_t *info, int s_first, int s_last)
-{
- int prot, sect, haderr;
- ulong start, now, last;
- void (*erase_init)(flash_info_t *, int);
- int (*erase_poll)(flash_info_t *, int);
- void (*reset)(flash_info_t *, int);
- int rcode = 0;
-
-#ifdef FLASH_DEBUG
- printf("\nflash_erase: erase %d sectors (%d to %d incl.) from\n"
- " Bank # %d: ", s_last - s_first + 1, s_first, s_last,
- (info - flash_info) + 1);
- flash_print_info(info);
-#endif
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- switch (info->flash_id) {
-
-#if defined(CONFIG_CMA302)
- case FLASH_MAN_INTEL|FLASH_28F008S5:
- erase_init = c302f_erase_init;
- erase_poll = c302f_erase_poll;
- reset = c302f_reset;
- break;
-#endif
-
-#if (CMA_MB_CAPS & CMA_MB_CAP_FLASH)
- case FLASH_MAN_INTEL|FLASH_28F800_B:
- case FLASH_MAN_AMD|FLASH_AM29F800B:
- /* not yet ...
- erase_init = cmbf_erase_init;
- erase_poll = cmbf_erase_poll;
- reset = cmbf_reset;
- break;
- */
-#endif
-
- default:
- printf ("Flash type %08lx not supported - aborted\n",
- info->flash_id);
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf("- Warning: %d protected sector%s will not be erased!\n",
- prot, (prot > 1 ? "s" : ""));
- }
-
- start = get_timer (0);
- last = 0;
- haderr = 0;
-
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- ulong estart;
- int sectdone;
-
- (*erase_init)(info, sect);
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- estart = get_timer(start);
-
- do {
- now = get_timer(start);
-
- if (now - estart > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout (sect %d)\n", sect);
- haderr = 1;
- break;
- }
-
-#ifndef FLASH_DEBUG
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
-#endif
-
- sectdone = (*erase_poll)(info, sect);
-
- if (sectdone < 0) {
- haderr = 1;
- break;
- }
-
- } while (!sectdone);
-
- if (haderr)
- break;
- }
- }
-
- if (haderr > 0) {
- printf (" failed\n");
- rcode = 1;
- }
- else
- printf (" done\n");
-
- /* reset to read mode */
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- (*reset)(info, sect);
- }
- }
- return rcode;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- * 3 - write error
- */
-
-int
-write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int i, l, rc;
- ulong start, now, last;
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
- for (; i<4 && cnt>0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- start = get_timer (0);
- last = 0;
- while (cnt >= 4) {
- data = 0;
- for (i=0; i<4; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- cnt -= 4;
-
- /* show that we're waiting */
- now = get_timer(start);
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- return (write_word(info, wp, data));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- * 3 - write error
- */
-static int
-write_word(flash_info_t *info, ulong dest, ulong data)
-{
- int retval;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*(ulong *)dest & data) != data) {
- return (2);
- }
-
- switch (info->flash_id) {
-
-#if defined(CONFIG_CMA302)
- case FLASH_MAN_INTEL|FLASH_28F008S5:
- retval = c302f_write_word((c302f_addr_t)dest, (c302f_word_t)data);
- break;
-#endif
-
-#if (CMA_MB_CAPS & CMA_MB_CAP_FLASH)
- case FLASH_MAN_INTEL|FLASH_28F800_B:
- case FLASH_MAN_AMD|FLASH_AM29F800B:
- /* not yet ...
- retval = cmbf_write_word((cmbf_addr_t)dest, (cmbf_word_t)data);
- */
- retval = 3;
- break;
-#endif
-
- default:
- printf ("Flash type %08lx not supported - aborted\n",
- info->flash_id);
- retval = 3;
- break;
- }
-
- return (retval);
-}
-
-/*-----------------------------------------------------------------------
- */
diff --git a/board/cogent/flash.h b/board/cogent/flash.h
deleted file mode 100644
index 0b8d6aaef6..0000000000
--- a/board/cogent/flash.h
+++ /dev/null
@@ -1,305 +0,0 @@
-/**************** DEFINES for Intel 28F008S5 FLASH chip **********************/
-
-/* register addresses, valid only following a I8S5_CMD_RD_ID command */
-#define I8S5_ADDR_MAN 0x00000 /* manufacturer's id */
-#define I8S5_ADDR_DEV 0x00001 /* device id */
-#define I8S5_ADDR_CFGM 0x00003 /* master lock configuration */
-#define I8S5_ADDR_CFG(b) (((b)<<16)|2) /* block lock configuration */
-
-/* Commands */
-#define I8S5_CMD_RST 0xFF /* reset flash */
-#define I8S5_CMD_RD_ID 0x90 /* read the id and lock bits */
-#define I8S5_CMD_RD_STAT 0x70 /* read the status register */
-#define I8S5_CMD_CLR_STAT 0x50 /* clear the staus register */
-#define I8S5_CMD_ERASE1 0x20 /* first word for block erase */
-#define I8S5_CMD_ERASE2 0xD0 /* second word for block erase */
-#define I8S5_CMD_PROG 0x40 /* program word command */
-#define I8S5_CMD_LOCK 0x60 /* first word for all lock commands */
-#define I8S5_CMD_SET_LOCK_BLK 0x01 /* 2nd word for set block lock bit */
-#define I8S5_CMD_SET_LOCK_MSTR 0xF1 /* 2nd word for set master lock bit */
-#define I8S5_CMD_CLR_LOCK_BLK 0xD0 /* 2nd word for clear block lock bit */
-
-/* status register bits */
-#define I8S5_STAT_DPS 0x02 /* Device Protect Status */
-#define I8S5_STAT_PSS 0x04 /* Program Suspend Status */
-#define I8S5_STAT_VPPS 0x08 /* VPP Status */
-#define I8S5_STAT_PSLBS 0x10 /* Program and Set Lock Bit Status */
-#define I8S5_STAT_ECLBS 0x20 /* Erase and Clear Lock Bit Status */
-#define I8S5_STAT_ESS 0x40 /* Erase Suspend Status */
-#define I8S5_STAT_RDY 0x80 /* Write State Machine Status, 1=rdy */
-
-#define I8S5_STAT_ERR (I8S5_STAT_VPPS | I8S5_STAT_DPS | \
- I8S5_STAT_ECLBS | I8S5_STAT_PSLBS)
-
-/* ID and Lock Configuration */
-#define I8S5_RD_ID_LOCK 0x01 /* Bit 0 of each byte */
-#define I8S5_RD_ID_MAN 0x89 /* Manufacturer code = 0x89 */
-#define I8S5_RD_ID_DEV 0xA6 /* Device code = 0xA6, 28F008S5 */
-
-/* dimensions */
-#define I8S5_NBLOCKS 16 /* a 28F008S5 consists of 16 blocks */
-#define I8S5_BLKSZ (64*1024) /* of 64Kbyte each */
-#define I8S5_SIZE (I8S5_BLKSZ * I8S5_NBLOCKS)
-
-/**************** DEFINES for Intel 28F800B5 FLASH chip **********************/
-
-/* register addresses, valid only following a I8S5_CMD_RD_ID command */
-#define I8B5_ADDR_MAN 0x00000 /* manufacturer's id */
-#define I8B5_ADDR_DEV 0x00001 /* device id */
-
-/* Commands */
-#define I8B5_CMD_RST 0xFF /* reset flash */
-#define I8B5_CMD_RD_ID 0x90 /* read the id and lock bits */
-#define I8B5_CMD_RD_STAT 0x70 /* read the status register */
-#define I8B5_CMD_CLR_STAT 0x50 /* clear the staus register */
-#define I8B5_CMD_ERASE1 0x20 /* first word for block erase */
-#define I8B5_CMD_ERASE2 0xD0 /* second word for block erase */
-#define I8B5_CMD_PROG 0x40 /* program word command */
-
-/* status register bits */
-#define I8B5_STAT_VPPS 0x08 /* VPP Status */
-#define I8B5_STAT_DWS 0x10 /* Program and Set Lock Bit Status */
-#define I8B5_STAT_ES 0x20 /* Erase and Clear Lock Bit Status */
-#define I8B5_STAT_ESS 0x40 /* Erase Suspend Status */
-#define I8B5_STAT_RDY 0x80 /* Write State Machine Status, 1=rdy */
-
-#define I8B5_STAT_ERR (I8B5_STAT_VPPS | I8B5_STAT_DWS | I8B5_STAT_ES)
-
-/* ID Configuration */
-#define I8B5_RD_ID_MAN 0x89 /* Manufacturer code = 0x89 */
-#define I8B5_RD_ID_DEV1 0x889D /* Device code = 0x889D, 28F800B5 */
-
-/* dimensions */
-#define I8B5_NBLOCKS 8 /* a 28F008S5 consists of 16 blocks */
-#define I8B5_BLKSZ (128*1024) /* of 64Kbyte each */
-#define I8B5_SIZE (I8B5_BLKSZ * I8B5_NBLOCKS)
-
-/****************** DEFINES for Cogent CMA302 Flash **************************/
-
-/*
- * Quoted from the CMA302 manual:
- *
- * Although the CMA302 supports 64-bit reads, all writes must be done with
- * word size only. When programming the CMA302, the FLASH devices appear as 2
- * banks of interleaved, 32-bit wide FLASH. Each 32-bit word consists of four
- * 28F008S5 devices. The first bank is accessed when the word address is even,
- * while the second bank is accessed when the word address is odd. This must
- * be taken into account when programming the desired word. Also, when locking
- * blocks, software must lock both banks. The CMA302 does not directly support
- * byte writing. Programming and/or erasing individual bytes is done with
- * selective use of the Write Command. By not placing the Write Command value
- * on a particular byte lane, that byte will not be written with the following
- * Write Data. Also, remember that within a byte lane (i.e. D0-7), there are
- * two 28F008S5 devices, one for each bank or every other word.
- *
- * End quote.
- *
- * Each 28F008S5 is 8Mbit, with 8 bit wide data. i.e. each is 1Mbyte. The
- * chips are arranged on the CMA302 in multiples of two banks, each bank having
- * 4 chips. Each bank must be accessed as a single 32 bit wide device (i.e.
- * aligned on a 32 bit boundary), with each byte lane within the 32 bits (0-3)
- * going to each of the 4 chips and the word address selecting the bank, even
- * being the low bank and odd the high bank. For 64bit reads, both banks are
- * read simultaneously with the second bank on byte lanes 4-7. Each 28F008S5
- * consists of 16 64Kbyte "block"s. Before programming a byte, the block that
- * the byte resides within must be erased. So if you want to program contiguous
- * memory locations, you must erase all 8 chips at the same time. i.e. the
- * flash on the CMA302 can be viewed as a number of 512Kbyte blocks.
- *
- * Note: I am going to treat banks as 8 Mbytes (1Meg of 64bit words), whereas
- * the example code treats them as a pair of interleaved 1 Mbyte x 32bit banks.
- */
-
-typedef unsigned long c302f_word_t; /* 32 or 64 bit unsigned integer */
-typedef volatile c302f_word_t *c302f_addr_t;
-typedef unsigned long c302f_size_t; /* want this big - at least 32 bit */
-
-/* layout of banks on cma302 board */
-#define C302F_BNK_WIDTH 8 /* each bank is 8 chips wide */
-#define C302F_BNK_WSHIFT 3 /* log base 2 of C302F_BNK_WIDTH */
-#define C302F_BNK_NBLOCKS I8S5_NBLOCKS
-#define C302F_BNK_BLKSZ (I8S5_BLKSZ * C302F_BNK_WIDTH)
-#define C302F_BNK_SIZE (I8S5_SIZE * C302F_BNK_WIDTH)
-
-#define C302F_MAX_BANKS 2 /* up to 2 banks (8M each) on CMA302 */
-
-/* align addresses and sizes to bank boundaries */
-#define C302F_BNK_ADDR_ALIGN(a) ((c302f_addr_t)((c302f_size_t)(a) \
- & ~(C302F_BNK_WIDTH - 1)))
-#define C302F_BNK_SIZE_ALIGN(s) ((c302f_size_t)C302F_BNK_ADDR_ALIGN( \
- (c302f_size_t)(s) + (C302F_BNK_WIDTH - 1)))
-
-/* align addresses and sizes to block boundaries */
-#define C302F_BLK_ADDR_ALIGN(a) ((c302f_addr_t)((c302f_size_t)(a) \
- & ~(C302F_BNK_BLKSZ - 1)))
-#define C302F_BLK_SIZE_ALIGN(s) ((c302f_size_t)C302F_BLK_ADDR_ALIGN( \
- (c302f_size_t)(s) + (C302F_BNK_BLKSZ - 1)))
-
-/* add a byte offset to a flash address */
-#define C302F_ADDR_ADD_BYTEOFF(a,o) \
- (c302f_addr_t)((c302f_size_t)(a) + (o))
-
-/* get base address of bank b, given flash base address a */
-#define C302F_BNK_ADDR_BASE(a,b) \
- C302F_ADDR_ADD_BYTEOFF((a), \
- (c302f_size_t)(b) * C302F_BNK_SIZE)
-
-/* adjust an address a (within a bank) to next word, block or bank */
-#define C302F_BNK_ADDR_NEXT_WORD(a) \
- C302F_ADDR_ADD_BYTEOFF((a), C302F_BNK_WIDTH)
-#define C302F_BNK_ADDR_NEXT_BLK(a) \
- C302F_ADDR_ADD_BYTEOFF((a), C302F_BNK_BLKSZ)
-#define C302F_BNK_ADDR_NEXT_BNK(a) \
- C302F_ADDR_ADD_BYTEOFF((a), C302F_BNK_SIZE)
-
-/* get bank address of chip register r given a bank base address a */
-#define C302F_BNK_ADDR_I8S5REG(a,r) \
- C302F_ADDR_ADD_BYTEOFF((a), \
- (r) << C302F_BNK_WSHIFT)
-
-/* make a bank representation for each chip address */
-
-#define C302F_BNK_ADDR_MAN(a) C302F_BNK_ADDR_I8S5REG((a), I8S5_ADDR_MAN)
-#define C302F_BNK_ADDR_DEV(a) C302F_BNK_ADDR_I8S5REG((a), I8S5_ADDR_DEV)
-#define C302F_BNK_ADDR_CFGM(a) C302F_BNK_ADDR_I8S5REG((a), I8S5_ADDR_CFGM)
-#define C302F_BNK_ADDR_CFG(b,a) C302F_BNK_ADDR_I8S5REG((a), I8S5_ADDR_CFG(b))
-
-/*
- * replicate a chip cmd/stat/rd value into each byte position within a word
- * so that multiple chips are accessed in a single word i/o operation
- *
- * this must be as wide as the c302f_word_t type
- */
-#define C302F_FILL_WORD(o) (((unsigned long)(o) << 24) | \
- ((unsigned long)(o) << 16) | \
- ((unsigned long)(o) << 8) | \
- (unsigned long)(o))
-
-/* make a bank representation for each chip cmd/stat/rd value */
-
-/* Commands */
-#define C302F_BNK_CMD_RST C302F_FILL_WORD(I8S5_CMD_RST)
-#define C302F_BNK_CMD_RD_ID C302F_FILL_WORD(I8S5_CMD_RD_ID)
-#define C302F_BNK_CMD_RD_STAT C302F_FILL_WORD(I8S5_CMD_RD_STAT)
-#define C302F_BNK_CMD_CLR_STAT C302F_FILL_WORD(I8S5_CMD_CLR_STAT)
-#define C302F_BNK_CMD_ERASE1 C302F_FILL_WORD(I8S5_CMD_ERASE1)
-#define C302F_BNK_CMD_ERASE2 C302F_FILL_WORD(I8S5_CMD_ERASE2)
-#define C302F_BNK_CMD_PROG C302F_FILL_WORD(I8S5_CMD_PROG)
-#define C302F_BNK_CMD_LOCK C302F_FILL_WORD(I8S5_CMD_LOCK)
-#define C302F_BNK_CMD_SET_LOCK_BLK C302F_FILL_WORD(I8S5_CMD_SET_LOCK_BLK)
-#define C302F_BNK_CMD_SET_LOCK_MSTR C302F_FILL_WORD(I8S5_CMD_SET_LOCK_MSTR)
-#define C302F_BNK_CMD_CLR_LOCK_BLK C302F_FILL_WORD(I8S5_CMD_CLR_LOCK_BLK)
-
-/* status register bits */
-#define C302F_BNK_STAT_DPS C302F_FILL_WORD(I8S5_STAT_DPS)
-#define C302F_BNK_STAT_PSS C302F_FILL_WORD(I8S5_STAT_PSS)
-#define C302F_BNK_STAT_VPPS C302F_FILL_WORD(I8S5_STAT_VPPS)
-#define C302F_BNK_STAT_PSLBS C302F_FILL_WORD(I8S5_STAT_PSLBS)
-#define C302F_BNK_STAT_ECLBS C302F_FILL_WORD(I8S5_STAT_ECLBS)
-#define C302F_BNK_STAT_ESS C302F_FILL_WORD(I8S5_STAT_ESS)
-#define C302F_BNK_STAT_RDY C302F_FILL_WORD(I8S5_STAT_RDY)
-
-#define C302F_BNK_STAT_ERR C302F_FILL_WORD(I8S5_STAT_ERR)
-
-/* ID and Lock Configuration */
-#define C302F_BNK_RD_ID_LOCK C302F_FILL_WORD(I8S5_RD_ID_LOCK)
-#define C302F_BNK_RD_ID_MAN C302F_FILL_WORD(I8S5_RD_ID_MAN)
-#define C302F_BNK_RD_ID_DEV C302F_FILL_WORD(I8S5_RD_ID_DEV)
-
-/*************** DEFINES for Cogent Motherboard Flash ************************/
-
-typedef unsigned short cmbf_word_t; /* 16 bit unsigned integer */
-typedef volatile cmbf_word_t *cmbf_addr_t;
-typedef unsigned long cmbf_size_t; /* want this big - at least 32 bit */
-
-/* layout of banks on cogent motherboard - only 1 bank, 16 bit wide */
-#define CMBF_BNK_WIDTH 1 /* each bank is one chip wide */
-#define CMBF_BNK_WSHIFT 0 /* log base 2 of CMBF_BNK_WIDTH */
-#define CMBF_BNK_NBLOCKS I8B5_NBLOCKS
-#define CMBF_BNK_BLKSZ (I8B5_BLKSZ * CMBF_BNK_WIDTH)
-#define CMBF_BNK_SIZE (I8B5_SIZE * CMBF_BNK_WIDTH)
-
-#define CMBF_MAX_BANKS 1 /* only 1 x 1Mbyte bank on cogent m/b */
-
-/* align addresses and sizes to bank boundaries */
-#define CMBF_BNK_ADDR_ALIGN(a) ((c302f_addr_t)((c302f_size_t)(a) \
- & ~(CMBF_BNK_WIDTH - 1)))
-#define CMBF_BNK_SIZE_ALIGN(s) ((c302f_size_t)CMBF_BNK_ADDR_ALIGN( \
- (c302f_size_t)(s) + (CMBF_BNK_WIDTH - 1)))
-
-/* align addresses and sizes to block boundaries */
-#define CMBF_BLK_ADDR_ALIGN(a) ((c302f_addr_t)((c302f_size_t)(a) \
- & ~(CMBF_BNK_BLKSZ - 1)))
-#define CMBF_BLK_SIZE_ALIGN(s) ((c302f_size_t)CMBF_BLK_ADDR_ALIGN( \
- (c302f_size_t)(s) + (CMBF_BNK_BLKSZ - 1)))
-
-/* add a byte offset to a flash address */
-#define CMBF_ADDR_ADD_BYTEOFF(a,o) \
- (c302f_addr_t)((c302f_size_t)(a) + (o))
-
-/* get base address of bank b, given flash base address a */
-#define CMBF_BNK_ADDR_BASE(a,b) \
- CMBF_ADDR_ADD_BYTEOFF((a), \
- (c302f_size_t)(b) * CMBF_BNK_SIZE)
-
-/* adjust an address a (within a bank) to next word, block or bank */
-#define CMBF_BNK_ADDR_NEXT_WORD(a) \
- CMBF_ADDR_ADD_BYTEOFF((a), CMBF_BNK_WIDTH)
-#define CMBF_BNK_ADDR_NEXT_BLK(a) \
- CMBF_ADDR_ADD_BYTEOFF((a), CMBF_BNK_BLKSZ)
-#define CMBF_BNK_ADDR_NEXT_BNK(a) \
- CMBF_ADDR_ADD_BYTEOFF((a), CMBF_BNK_SIZE)
-
-/* get bank address of chip register r given a bank base address a */
-#define CMBF_BNK_ADDR_I8B5REG(a,r) \
- CMBF_ADDR_ADD_BYTEOFF((a), \
- (r) << CMBF_BNK_WSHIFT)
-
-/* make a bank representation for each chip address */
-
-#define CMBF_BNK_ADDR_MAN(a) CMBF_BNK_ADDR_I8B5REG((a), I8B5_ADDR_MAN)
-#define CMBF_BNK_ADDR_DEV(a) CMBF_BNK_ADDR_I8B5REG((a), I8B5_ADDR_DEV)
-#define CMBF_BNK_ADDR_CFGM(a) CMBF_BNK_ADDR_I8B5REG((a), I8B5_ADDR_CFGM)
-#define CMBF_BNK_ADDR_CFG(b,a) CMBF_BNK_ADDR_I8B5REG((a), I8B5_ADDR_CFG(b))
-
-/*
- * replicate a chip cmd/stat/rd value into each byte position within a word
- * so that multiple chips are accessed in a single word i/o operation
- *
- * this must be as wide as the c302f_word_t type
- */
-#define CMBF_FILL_WORD(o) (((unsigned long)(o) << 24) | \
- ((unsigned long)(o) << 16) | \
- ((unsigned long)(o) << 8) | \
- (unsigned long)(o))
-
-/* make a bank representation for each chip cmd/stat/rd value */
-
-/* Commands */
-#define CMBF_BNK_CMD_RST CMBF_FILL_WORD(I8B5_CMD_RST)
-#define CMBF_BNK_CMD_RD_ID CMBF_FILL_WORD(I8B5_CMD_RD_ID)
-#define CMBF_BNK_CMD_RD_STAT CMBF_FILL_WORD(I8B5_CMD_RD_STAT)
-#define CMBF_BNK_CMD_CLR_STAT CMBF_FILL_WORD(I8B5_CMD_CLR_STAT)
-#define CMBF_BNK_CMD_ERASE1 CMBF_FILL_WORD(I8B5_CMD_ERASE1)
-#define CMBF_BNK_CMD_ERASE2 CMBF_FILL_WORD(I8B5_CMD_ERASE2)
-#define CMBF_BNK_CMD_PROG CMBF_FILL_WORD(I8B5_CMD_PROG)
-#define CMBF_BNK_CMD_LOCK CMBF_FILL_WORD(I8B5_CMD_LOCK)
-#define CMBF_BNK_CMD_SET_LOCK_BLK CMBF_FILL_WORD(I8B5_CMD_SET_LOCK_BLK)
-#define CMBF_BNK_CMD_SET_LOCK_MSTR CMBF_FILL_WORD(I8B5_CMD_SET_LOCK_MSTR)
-#define CMBF_BNK_CMD_CLR_LOCK_BLK CMBF_FILL_WORD(I8B5_CMD_CLR_LOCK_BLK)
-
-/* status register bits */
-#define CMBF_BNK_STAT_DPS CMBF_FILL_WORD(I8B5_STAT_DPS)
-#define CMBF_BNK_STAT_PSS CMBF_FILL_WORD(I8B5_STAT_PSS)
-#define CMBF_BNK_STAT_VPPS CMBF_FILL_WORD(I8B5_STAT_VPPS)
-#define CMBF_BNK_STAT_PSLBS CMBF_FILL_WORD(I8B5_STAT_PSLBS)
-#define CMBF_BNK_STAT_ECLBS CMBF_FILL_WORD(I8B5_STAT_ECLBS)
-#define CMBF_BNK_STAT_ESS CMBF_FILL_WORD(I8B5_STAT_ESS)
-#define CMBF_BNK_STAT_RDY CMBF_FILL_WORD(I8B5_STAT_RDY)
-
-#define CMBF_BNK_STAT_ERR CMBF_FILL_WORD(I8B5_STAT_ERR)
-
-/* ID and Lock Configuration */
-#define CMBF_BNK_RD_ID_LOCK CMBF_FILL_WORD(I8B5_RD_ID_LOCK)
-#define CMBF_BNK_RD_ID_MAN CMBF_FILL_WORD(I8B5_RD_ID_MAN)
-#define CMBF_BNK_RD_ID_DEV CMBF_FILL_WORD(I8B5_RD_ID_DEV)
diff --git a/board/cogent/kbm.c b/board/cogent/kbm.c
deleted file mode 100644
index 84964025ac..0000000000
--- a/board/cogent/kbm.c
+++ /dev/null
@@ -1,3 +0,0 @@
-/* keyboard/mouse not implemented yet */
-
-int cma_kbm_not_implemented = 1;
diff --git a/board/cogent/kbm.h b/board/cogent/kbm.h
deleted file mode 100644
index 7eb419c1d6..0000000000
--- a/board/cogent/kbm.h
+++ /dev/null
@@ -1,79 +0,0 @@
-/* keyboard/mouse not implemented yet */
-
-extern int cma_kbm_not_implemented;
-
-/**************** DEFINES for H8542B Keyboard/Mouse Controller ***************/
-
-/*
- * note the auxillary port is used to control the mouse
- */
-
-/* 8542B Commands (Sent to the Command Port) */
-#define HT8542_CMD_SET_BYTE 0x60 /* Set the command byte */
-#define HT8542_CMD_GET_BYTE 0x20 /* Get the command byte */
-#define HT8542_CMD_KBD_OBUFF 0xD2 /* Write to HT8542 Kbd Output Buffer */
-#define HT8542_CMD_AUX_OBUFF 0xD3 /* Write to HT8542 Mse Output Buffer */
-#define HT8542_CMD_AUX_WRITE 0xD4 /* Write to Mouse Port */
-#define HT8542_CMD_AUX_OFF 0xA7 /* Disable Mouse Port */
-#define HT8542_CMD_AUX_ON 0xA8 /* Re-Enable Mouse Port */
-#define HT8542_CMD_AUX_TEST 0xA9 /* Test for the presence of a Mouse */
-#define HT8542_CMD_DIAG 0xAA /* Start Diagnostics */
-#define HT8542_CMD_KBD_TEST 0xAB /* Test for presence of a keyboard */
-#define HT8542_CMD_KBD_OFF 0xAD /* Disable Kbd Port (use KBD_DAT_ON) */
-#define HT8542_CMD_KBD_ON 0xAE /* Enable Kbd Port (use KBD_DAT_OFF) */
-
-/* HT8542B cmd byte set by KBD_CMD_SET_BYTE and retrieved by KBD_CMD_GET_BYTE */
-#define HT8542_CMD_BYTE_TRANS 0x40
-#define HT8542_CMD_BYTE_AUX_OFF 0x20 /* 1 = mse port disabled, 0 = enabled */
-#define HT8542_CMD_BYTE_KBD_OFF 0x10 /* 1 = kbd port disabled, 0 = enabled */
-#define HT8542_CMD_BYTE_OVER 0x08 /* 1 = override keyboard lock */
-#define HT8542_CMD_BYTE_RES 0x04 /* reserved */
-#define HT8542_CMD_BYTE_AUX_INT 0x02 /* 1 = enable mouse interrupt */
-#define HT8542_CMD_BYTE_KBD_INT 0x01 /* 1 = enable keyboard interrupt */
-
-/* Keyboard Commands (Sent to the Data Port) */
-#define KBD_CMD_LED 0xED /* Set Keyboard LEDS with next byte */
-#define KBD_CMD_ECHO 0xEE /* Echo - we get 0xFA, 0xEE back */
-#define KBD_CMD_MODE 0xF0 /* set scan code mode with next byte */
-#define KBD_CMD_ID 0xF2 /* get keyboard/mouse ID */
-#define KBD_CMD_RPT 0xF3 /* Set Repeat Rate and Delay 2nd Byte */
-#define KBD_CMD_ON 0xF4 /* Enable keyboard */
-#define KBD_CMD_OFF 0xF5 /* Disables Scanning, Resets to Def */
-#define KBD_CMD_DEF 0xF6 /* Reverts kbd to default settings */
-#define KBD_CMD_RST 0xFF /* Reset - should get 0xFA, 0xAA back */
-
-/* Set LED second bit defines */
-#define KBD_CMD_LED_SCROLL 0x01 /* Set SCROLL LOCK LED on */
-#define KBD_CMD_LED_NUM 0x02 /* Set NUM LOCK LED on */
-#define KBD_CMD_LED_CAPS 0x04 /* Set CAPS LOCK LED on */
-
-/* Set Mode second byte defines */
-#define KBD_CMD_MODE_STAT 0x00 /* get current scan code mode */
-#define KBD_CMD_MODE_SCAN1 0x01 /* set mode to scan code 1 */
-#define KBD_CMD_MODE_SCAN2 0x02 /* set mode to scan code 2 */
-#define KBD_CMD_MODE_SCAN3 0x03 /* set mode to scan code 3 */
-
-/* Keyboard/Mouse ID Codes */
-#define KBD_CMD_ID_1ST 0xAB /* 1st byte is 0xAB, 2nd is actual ID */
-#define KBD_CMD_ID_KBD 0x83 /* Keyboard */
-#define KBD_CMD_ID_MOUSE 0x00 /* Mouse */
-
-/* Keyboard Data Return Defines */
-#define KBD_STAT_OVER 0x00 /* Buffer Overrun */
-#define KBD_STAT_DIAG_OK 0x55 /* Internal Self Test OK */
-#define KBD_STAT_RST_OK 0xAA /* Reset Complete */
-#define KBD_STAT_ECHO 0xEE /* Echo Command Return */
-#define KBD_STAT_BRK 0xF0 /* Prefix for Break Key Code */
-#define KBD_STAT_ACK 0xFA /* Received after all commands */
-#define KBD_STAT_DIAG_FAIL 0xFD /* Internal Self Test Failed */
-#define KBD_STAT_RESEND 0xFE /* Resend Last Command */
-
-/* HT8542B Status Register Bit Defines */
-#define HT8542_STAT_OBF 0x01 /* 1 = output buffer is full */
-#define HT8542_STAT_IBF 0x02 /* 1 = input buffer is full */
-#define HT8542_STAT_SYS 0x04 /* system flag - unused */
-#define HT8542_STAT_CMD 0x08 /* 1 = cmd in input buffer, 0 = data */
-#define HT8542_STAT_INH 0x10 /* 1 = Inhibit - unused */
-#define HT8542_STAT_TX 0x20 /* 1 = Transmit Timeout has occured */
-#define HT8542_STAT_RX 0x40 /* 1 = Receive Timeout has occured */
-#define HT8542_STAT_PERR 0x80 /* 1 = Parity Error from Keyboard */
diff --git a/board/cogent/lcd.c b/board/cogent/lcd.c
deleted file mode 100644
index 814b4c80a0..0000000000
--- a/board/cogent/lcd.c
+++ /dev/null
@@ -1,245 +0,0 @@
-/* most of this is taken from the file */
-/* hal/powerpc/cogent/current/src/hal_diag.c in the */
-/* Cygnus eCos source. Here is the copyright notice: */
-/* */
-/*============================================================================= */
-/* */
-/* hal_diag.c */
-/* */
-/* HAL diagnostic output code */
-/* */
-/*============================================================================= */
-/*####COPYRIGHTBEGIN#### */
-/* */
-/* ------------------------------------------- */
-/* The contents of this file are subject to the Cygnus eCos Public License */
-/* Version 1.0 (the "License"); you may not use this file except in */
-/* compliance with the License. You may obtain a copy of the License at */
-/* http://sourceware.cygnus.com/ecos */
-/* */
-/* Software distributed under the License is distributed on an "AS IS" */
-/* basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the */
-/* License for the specific language governing rights and limitations under */
-/* the License. */
-/* */
-/* The Original Code is eCos - Embedded Cygnus Operating System, released */
-/* September 30, 1998. */
-/* */
-/* The Initial Developer of the Original Code is Cygnus. Portions created */
-/* by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. */
-/* ------------------------------------------- */
-/* */
-/*####COPYRIGHTEND#### */
-/*============================================================================= */
-/*#####DESCRIPTIONBEGIN#### */
-/* */
-/* Author(s): nickg, jskov */
-/* Contributors: nickg, jskov */
-/* Date: 1999-03-23 */
-/* Purpose: HAL diagnostic output */
-/* Description: Implementations of HAL diagnostic output support. */
-/* */
-/*####DESCRIPTIONEND#### */
-/* */
-/*============================================================================= */
-
-/*----------------------------------------------------------------------------- */
-/* Cogent board specific LCD code */
-
-#include <common.h>
-#include <stdarg.h>
-#include <board/cogent/lcd.h>
-
-static char lines[2][LCD_LINE_LENGTH+1];
-static int curline;
-static int linepos;
-static int heartbeat_active;
-/* make the next two strings exactly LCD_LINE_LENGTH (16) chars long */
-/* pad to the right with spaces if necessary */
-static char init_line0[LCD_LINE_LENGTH+1] = "U-Boot Cogent ";
-static char init_line1[LCD_LINE_LENGTH+1] = "mjj, 11 Aug 2000";
-
-static inline unsigned char
-lcd_read_status(cma_mb_lcd *clp)
-{
- /* read the Busy Status Register */
- return (cma_mb_reg_read(&clp->lcd_bsr));
-}
-
-static inline void
-lcd_wait_not_busy(cma_mb_lcd *clp)
-{
- /*
- * wait for not busy
- * Note: It seems that the LCD isn't quite ready to process commands
- * when it clears the BUSY flag. Reading the status address an extra
- * time seems to give it enough breathing room.
- */
-
- while (lcd_read_status(clp) & LCD_STAT_BUSY)
- ;
-
- (void)lcd_read_status(clp);
-}
-
-static inline void
-lcd_write_command(cma_mb_lcd *clp, unsigned char cmd)
-{
- lcd_wait_not_busy(clp);
-
- /* write the Command Register */
- cma_mb_reg_write(&clp->lcd_cmd, cmd);
-}
-
-static inline void
-lcd_write_data(cma_mb_lcd *clp, unsigned char data)
-{
- lcd_wait_not_busy(clp);
-
- /* write the Current Character Register */
- cma_mb_reg_write(&clp->lcd_ccr, data);
-}
-
-static inline void
-lcd_dis(int addr, char *string)
-{
- cma_mb_lcd *clp = (cma_mb_lcd *)CMA_MB_LCD_BASE;
- int pos, linelen;
-
- linelen = LCD_LINE_LENGTH;
- if (heartbeat_active && addr == LCD_LINE0)
- linelen--;
-
- lcd_write_command(clp, LCD_CMD_ADD + addr);
- for (pos = 0; *string != '\0' && pos < linelen; pos++)
- lcd_write_data(clp, *string++);
-}
-
-void
-lcd_init(void)
-{
- cma_mb_lcd *clp = (cma_mb_lcd *)CMA_MB_LCD_BASE;
- int i;
-
- /* configure the lcd for 8 bits/char, 2 lines and 5x7 dot matrix */
- lcd_write_command(clp, LCD_CMD_MODE);
-
- /* turn the LCD display on */
- lcd_write_command(clp, LCD_CMD_DON);
-
- curline = 0;
- linepos = 0;
-
- for (i = 0; i < LCD_LINE_LENGTH; i++) {
- lines[0][i] = init_line0[i];
- lines[1][i] = init_line1[i];
- }
-
- lines[0][LCD_LINE_LENGTH] = lines[1][LCD_LINE_LENGTH] = 0;
-
- lcd_dis(LCD_LINE0, lines[0]);
- lcd_dis(LCD_LINE1, lines[1]);
-
- printf("HD44780 2 line x %d char display\n", LCD_LINE_LENGTH);
-}
-
-void
-lcd_write_char(const char c)
-{
- int i, linelen;
-
- /* ignore CR */
- if (c == '\r')
- return;
-
- linelen = LCD_LINE_LENGTH;
- if (heartbeat_active && curline == 0)
- linelen--;
-
- if (c == '\n') {
- lcd_dis(LCD_LINE0, &lines[curline^1][0]);
- lcd_dis(LCD_LINE1, &lines[curline][0]);
-
- /* Do a line feed */
- curline ^= 1;
- linelen = LCD_LINE_LENGTH;
- if (heartbeat_active && curline == 0)
- linelen--;
- linepos = 0;
-
- for (i = 0; i < linelen; i++)
- lines[curline][i] = ' ';
-
- return;
- }
-
- /* Only allow to be output if there is room on the LCD line */
- if (linepos < linelen)
- lines[curline][linepos++] = c;
-}
-
-void
-lcd_flush(void)
-{
- lcd_dis(LCD_LINE1, &lines[curline][0]);
-}
-
-void
-lcd_write_string(const char *s)
-{
- char *p;
-
- for (p = (char *)s; *p != '\0'; p++)
- lcd_write_char(*p);
-}
-
-void
-lcd_printf(const char *fmt, ...)
-{
- va_list args;
- char buf[CFG_PBSIZE];
-
- va_start(args, fmt);
- (void)vsprintf(buf, fmt, args);
- va_end(args);
-
- lcd_write_string(buf);
-}
-
-void
-lcd_heartbeat(void)
-{
- cma_mb_lcd *clp = (cma_mb_lcd *)CMA_MB_LCD_BASE;
-#if 0
- static char rotchars[] = { '|', '/', '-', '\\' };
-#else
- /* HD44780 Rom Code A00 has no backslash */
- static char rotchars[] = { '|', '/', '-', '\315' };
-#endif
- static int rotator_index = 0;
-
- heartbeat_active = 1;
-
- /* write the address */
- lcd_write_command(clp, LCD_CMD_ADD + LCD_LINE0 + (LCD_LINE_LENGTH - 1));
-
- /* write the next char in the sequence */
- lcd_write_data(clp, rotchars[rotator_index]);
-
- if (++rotator_index >= (sizeof rotchars / sizeof rotchars[0]))
- rotator_index = 0;
-}
-
-#ifdef CONFIG_SHOW_ACTIVITY
-void board_show_activity (ulong timestamp)
-{
-#ifdef CONFIG_STATUS_LED
- if ((timestamp % (CFG_HZ / 2) == 0)
- lcd_heartbeat ();
-#endif
-}
-
-void show_activity(int arg)
-{
-}
-#endif
diff --git a/board/cogent/lcd.h b/board/cogent/lcd.h
deleted file mode 100644
index 1056eea473..0000000000
--- a/board/cogent/lcd.h
+++ /dev/null
@@ -1,84 +0,0 @@
-/* most of this is taken from the file */
-/* hal/powerpc/cogent/current/src/hal_diag.c in the */
-/* Cygnus eCos source. Here is the copyright notice: */
-/* */
-/*============================================================================= */
-/* */
-/* hal_diag.c */
-/* */
-/* HAL diagnostic output code */
-/* */
-/*============================================================================= */
-/*####COPYRIGHTBEGIN#### */
-/* */
-/* ------------------------------------------- */
-/* The contents of this file are subject to the Cygnus eCos Public License */
-/* Version 1.0 (the "License"); you may not use this file except in */
-/* compliance with the License. You may obtain a copy of the License at */
-/* http://sourceware.cygnus.com/ecos */
-/* */
-/* Software distributed under the License is distributed on an "AS IS" */
-/* basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the */
-/* License for the specific language governing rights and limitations under */
-/* the License. */
-/* */
-/* The Original Code is eCos - Embedded Cygnus Operating System, released */
-/* September 30, 1998. */
-/* */
-/* The Initial Developer of the Original Code is Cygnus. Portions created */
-/* by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. */
-/* ------------------------------------------- */
-/* */
-/*####COPYRIGHTEND#### */
-/*============================================================================= */
-/*#####DESCRIPTIONBEGIN#### */
-/* */
-/* Author(s): nickg, jskov */
-/* Contributors: nickg, jskov */
-/* Date: 1999-03-23 */
-/* Purpose: HAL diagnostic output */
-/* Description: Implementations of HAL diagnostic output support. */
-/* */
-/*####DESCRIPTIONEND#### */
-/* */
-/*============================================================================= */
-
-/* FEMA 162B 16 character x 2 line LCD */
-
-/* status register bit definitions */
-#define LCD_STAT_BUSY 0x80 /* 1 = display busy */
-#define LCD_STAT_ADD 0x7F /* bits 0-6 return current display address */
-
-/* command register definitions */
-#define LCD_CMD_RST 0x01 /* clear entire display and reset display addr */
-#define LCD_CMD_HOME 0x02 /* reset display address and reset any shifting */
-#define LCD_CMD_ECL 0x04 /* move cursor left one pos on next data write */
-#define LCD_CMD_ESL 0x05 /* shift display left one pos on next data write */
-#define LCD_CMD_ECR 0x06 /* move cursor right one pos on next data write */
-#define LCD_CMD_ESR 0x07 /* shift disp right one pos on next data write */
-#define LCD_CMD_DOFF 0x08 /* display off, cursor off, blinking off */
-#define LCD_CMD_BL 0x09 /* blink character at current cursor position */
-#define LCD_CMD_CUR 0x0A /* enable cursor on */
-#define LCD_CMD_DON 0x0C /* turn display on */
-#define LCD_CMD_CL 0x10 /* move cursor left one position */
-#define LCD_CMD_SL 0x14 /* shift display left one position */
-#define LCD_CMD_CR 0x18 /* move cursor right one position */
-#define LCD_CMD_SR 0x1C /* shift display right one position */
-#define LCD_CMD_MODE 0x38 /* sets 8 bits, 2 lines, 5x7 characters */
-#define LCD_CMD_ACG 0x40 /* bits 0-5 sets character generator address */
-#define LCD_CMD_ADD 0x80 /* bits 0-6 sets display data addr to line 1 + */
-
-/* LCD status values */
-#define LCD_OK 0x00
-#define LCD_ERR 0x01
-
-#define LCD_LINE0 0x00
-#define LCD_LINE1 0x40
-
-#define LCD_LINE_LENGTH 16
-
-extern void lcd_init(void);
-extern void lcd_write_char(const char);
-extern void lcd_flush(void);
-extern void lcd_write_string(const char *);
-extern void lcd_printf(const char *, ...);
diff --git a/board/cogent/mb.c b/board/cogent/mb.c
deleted file mode 100644
index 917132b3fb..0000000000
--- a/board/cogent/mb.c
+++ /dev/null
@@ -1,296 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <board/cogent/dipsw.h>
-#include <board/cogent/lcd.h>
-#include <board/cogent/rtc.h>
-#include <board/cogent/par.h>
-#include <board/cogent/pci.h>
-
-/* ------------------------------------------------------------------------- */
-
-#if defined(CONFIG_8260)
-
-#include <ioports.h>
-
-/*
- * I/O Port configuration table
- *
- * if conf is 1, then that port pin will be configured at boot time
- * according to the five values podr/pdir/ppar/psor/pdat for that entry
- */
-
-const iop_conf_t iop_conf_tab[4][32] = {
-
- /* Port A configuration */
- { /* conf ppar psor pdir podr pdat */
- /* PA31 */ {0, 0, 0, 0, 0, 0},
- /* PA30 */ {0, 0, 0, 0, 0, 0},
- /* PA29 */ {0, 0, 0, 0, 0, 0},
- /* PA28 */ {0, 0, 0, 0, 0, 0},
- /* PA27 */ {0, 0, 0, 0, 0, 0},
- /* PA26 */ {0, 0, 0, 0, 0, 0},
- /* PA25 */ {0, 0, 0, 0, 0, 0},
- /* PA24 */ {0, 0, 0, 0, 0, 0},
- /* PA23 */ {0, 0, 0, 0, 0, 0},
- /* PA22 */ {0, 0, 0, 0, 0, 0},
- /* PA21 */ {0, 0, 0, 0, 0, 0},
- /* PA20 */ {0, 0, 0, 0, 0, 0},
- /* PA19 */ {0, 0, 0, 0, 0, 0},
- /* PA18 */ {0, 0, 0, 0, 0, 0},
- /* PA17 */ {0, 0, 0, 0, 0, 0},
- /* PA16 */ {0, 0, 0, 0, 0, 0},
- /* PA15 */ {0, 0, 0, 0, 0, 0},
- /* PA14 */ {0, 0, 0, 0, 0, 0},
- /* PA13 */ {0, 0, 0, 0, 0, 0},
- /* PA12 */ {0, 0, 0, 0, 0, 0},
- /* PA11 */ {0, 0, 0, 0, 0, 0},
- /* PA10 */ {0, 0, 0, 0, 0, 0},
- /* PA9 */ {1, 1, 0, 1, 0, 0},
- /* SMC2 TXD */
- /* PA8 */ {1, 1, 0, 0, 0, 0},
- /* SMC2 RXD */
- /* PA7 */ {0, 0, 0, 0, 0, 0},
- /* PA6 */ {0, 0, 0, 0, 0, 0},
- /* PA5 */ {0, 0, 0, 0, 0, 0},
- /* PA4 */ {0, 0, 0, 0, 0, 0},
- /* PA3 */ {0, 0, 0, 0, 0, 0},
- /* PA2 */ {0, 0, 0, 0, 0, 0},
- /* PA1 */ {0, 0, 0, 0, 0, 0},
- /* PA0 */ {0, 0, 0, 0, 0, 0}
- },
-
-
- { /* conf ppar psor pdir podr pdat */
- /* PB31 */ {0, 0, 0, 0, 0, 0},
- /* PB30 */ {0, 0, 0, 0, 0, 0},
- /* PB29 */ {0, 0, 0, 0, 0, 0},
- /* PB28 */ {0, 0, 0, 0, 0, 0},
- /* PB27 */ {0, 0, 0, 0, 0, 0},
- /* PB26 */ {0, 0, 0, 0, 0, 0},
- /* PB25 */ {0, 0, 0, 0, 0, 0},
- /* PB24 */ {0, 0, 0, 0, 0, 0},
- /* PB23 */ {0, 0, 0, 0, 0, 0},
- /* PB22 */ {0, 0, 0, 0, 0, 0},
- /* PB21 */ {0, 0, 0, 0, 0, 0},
- /* PB20 */ {0, 0, 0, 0, 0, 0},
- /* PB19 */ {0, 0, 0, 0, 0, 0},
- /* PB18 */ {0, 0, 0, 0, 0, 0},
- /* PB17 */ {0, 0, 0, 0, 0, 0},
- /* PB16 */ {0, 0, 0, 0, 0, 0},
- /* PB15 */ {0, 0, 0, 0, 0, 0},
- /* PB14 */ {0, 0, 0, 0, 0, 0},
- /* PB13 */ {0, 0, 0, 0, 0, 0},
- /* PB12 */ {0, 0, 0, 0, 0, 0},
- /* PB11 */ {0, 0, 0, 0, 0, 0},
- /* PB10 */ {0, 0, 0, 0, 0, 0},
- /* PB9 */ {0, 0, 0, 0, 0, 0},
- /* PB8 */ {0, 0, 0, 0, 0, 0},
- /* PB7 */ {0, 0, 0, 0, 0, 0},
- /* PB6 */ {0, 0, 0, 0, 0, 0},
- /* PB5 */ {0, 0, 0, 0, 0, 0},
- /* PB4 */ {0, 0, 0, 0, 0, 0},
- /* PB3 */ {0, 0, 0, 0, 0, 0},
- /* pin doesn't exist */
- /* PB2 */ {0, 0, 0, 0, 0, 0},
- /* pin doesn't exist */
- /* PB1 */ {0, 0, 0, 0, 0, 0},
- /* pin doesn't exist */
- /* PB0 */ {0, 0, 0, 0, 0, 0}
- /* pin doesn't exist */
- },
-
-
- { /* conf ppar psor pdir podr pdat */
- /* PC31 */ {0, 0, 0, 0, 0, 0},
- /* PC30 */ {0, 0, 0, 0, 0, 0},
- /* PC29 */ {0, 0, 0, 0, 0, 0},
- /* PC28 */ {0, 0, 0, 0, 0, 0},
- /* PC27 */ {0, 0, 0, 0, 0, 0},
- /* PC26 */ {0, 0, 0, 0, 0, 0},
- /* PC25 */ {0, 0, 0, 0, 0, 0},
- /* PC24 */ {0, 0, 0, 0, 0, 0},
- /* PC23 */ {0, 0, 0, 0, 0, 0},
- /* PC22 */ {0, 0, 0, 0, 0, 0},
- /* PC21 */ {0, 0, 0, 0, 0, 0},
- /* PC20 */ {0, 0, 0, 0, 0, 0},
- /* PC19 */ {0, 0, 0, 0, 0, 0},
- /* PC18 */ {0, 0, 0, 0, 0, 0},
- /* PC17 */ {0, 0, 0, 0, 0, 0},
- /* PC16 */ {0, 0, 0, 0, 0, 0},
- /* PC15 */ {0, 0, 0, 0, 0, 0},
- /* PC14 */ {0, 0, 0, 0, 0, 0},
- /* PC13 */ {0, 0, 0, 0, 0, 0},
- /* PC12 */ {0, 0, 0, 0, 0, 0},
- /* PC11 */ {0, 0, 0, 0, 0, 0},
- /* PC10 */ {0, 0, 0, 0, 0, 0},
- /* PC9 */ {0, 0, 0, 0, 0, 0},
- /* PC8 */ {0, 0, 0, 0, 0, 0},
- /* PC7 */ {0, 0, 0, 0, 0, 0},
- /* PC6 */ {0, 0, 0, 0, 0, 0},
- /* PC5 */ {0, 0, 0, 0, 0, 0},
- /* PC4 */ {0, 0, 0, 0, 0, 0},
- /* PC3 */ {0, 0, 0, 0, 0, 0},
- /* PC2 */ {0, 0, 0, 0, 0, 0},
- /* PC1 */ {0, 0, 0, 0, 0, 0},
- /* PC0 */ {0, 0, 0, 0, 0, 0}
- },
-
-
- { /* conf ppar psor pdir podr pdat */
- /* PD31 */ {0, 0, 0, 0, 0, 0},
- /* PD30 */ {0, 0, 0, 0, 0, 0},
- /* PD29 */ {0, 0, 0, 0, 0, 0},
- /* PD28 */ {0, 0, 0, 0, 0, 0},
- /* PD27 */ {0, 0, 0, 0, 0, 0},
- /* PD26 */ {0, 0, 0, 0, 0, 0},
- /* PD25 */ {0, 0, 0, 0, 0, 0},
- /* PD24 */ {0, 0, 0, 0, 0, 0},
- /* PD23 */ {0, 0, 0, 0, 0, 0},
- /* PD22 */ {0, 0, 0, 0, 0, 0},
- /* PD21 */ {0, 0, 0, 0, 0, 0},
- /* PD20 */ {0, 0, 0, 0, 0, 0},
- /* PD19 */ {0, 0, 0, 0, 0, 0},
- /* PD18 */ {0, 0, 0, 0, 0, 0},
- /* PD17 */ {0, 0, 0, 0, 0, 0},
- /* PD16 */ {0, 0, 0, 0, 0, 0},
- /* PD15 */ {1, 1, 1, 0, 0, 0},
- /* I2C SDA */
- /* PD14 */ {1, 1, 1, 0, 0, 0},
- /* I2C SCL */
- /* PD13 */ {0, 0, 0, 0, 0, 0},
- /* PD12 */ {0, 0, 0, 0, 0, 0},
- /* PD11 */ {0, 0, 0, 0, 0, 0},
- /* PD10 */ {0, 0, 0, 0, 0, 0},
- /* PD9 */ {1, 1, 0, 1, 0, 0},
- /* SMC1 TXD */
- /* PD8 */ {1, 1, 0, 0, 0, 0},
- /* SMC1 RXD */
- /* PD7 */ {0, 0, 0, 0, 0, 0},
- /* PD6 */ {0, 0, 0, 0, 0, 0},
- /* PD5 */ {0, 0, 0, 0, 0, 0},
- /* PD4 */ {0, 0, 0, 0, 0, 0},
- /* PD3 */ {0, 0, 0, 0, 0, 0},
- /* pin doesn't exist */
- /* PD2 */ {0, 0, 0, 0, 0, 0},
- /* pin doesn't exist */
- /* PD1 */ {0, 0, 0, 0, 0, 0},
- /* pin doesn't exist */
- /* PD0 */ {0, 0, 0, 0, 0, 0}
- /* pin doesn't exist */
- }
-};
-
-#endif /* CONFIG_8260 */
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Check Board Identity:
- */
-
-int checkboard (void)
-{
- puts ("Board: Cogent " COGENT_MOTHERBOARD " motherboard with a "
- COGENT_CPU_MODULE " CPU Module\n");
- return (0);
-}
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Miscelaneous platform dependent initialisations while still
- * running in flash
- */
-
-int misc_init_f (void)
-{
- printf ("DIPSW: ");
- dipsw_init ();
- return (0);
-}
-
-/* ------------------------------------------------------------------------- */
-
-long int initdram (int board_type)
-{
-#ifdef CONFIG_CMA111
- return (32L * 1024L * 1024L);
-#else
- unsigned char dipsw_val;
- int dual, size0, size1;
- long int memsize;
-
- dipsw_val = dipsw_cooked ();
-
- dual = dipsw_val & 0x01;
- size0 = (dipsw_val & 0x08) >> 3;
- size1 = (dipsw_val & 0x04) >> 2;
-
- if (size0)
- if (size1)
- memsize = 16L * 1024L * 1024L;
- else
- memsize = 1L * 1024L * 1024L;
- else if (size1)
- memsize = 4L * 1024L * 1024L;
- else {
- printf ("[Illegal dip switch settings - assuming 16Mbyte SIMMs] ");
- memsize = 16L * 1024L * 1024L; /* shouldn't happen - guess 16M */
- }
-
- if (dual)
- memsize *= 2L;
-
- return (memsize);
-#endif
-}
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Miscelaneous platform dependent initialisations after monitor
- * has been relocated into ram
- */
-
-int misc_init_r (void)
-{
- printf ("LCD: ");
- lcd_init ();
-
-#if 0
- printf ("RTC: ");
- rtc_init ();
-
- printf ("PAR: ");
- par_init ();
-
- printf ("KBM: ");
- kbm_init ();
-
- printf ("PCI: ");
- pci_init ();
-#endif
- return (0);
-}
diff --git a/board/cogent/mb.h b/board/cogent/mb.h
deleted file mode 100644
index f6eaf0ac5e..0000000000
--- a/board/cogent/mb.h
+++ /dev/null
@@ -1,529 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * defines for Cogent Motherboards
- */
-
-#ifndef _COGENT_MB_H
-#define _COGENT_MB_H
-
-/*
- * Cogent Motherboard Address Map
- *
- * The size of a Cogent motherboard address space is 256 Mbytes (i.e. 28 bits).
- *
- * The first 32 Mbyte (0x0000000-0x1FFFFFF) is usually RAM. The following
- * 3 x 32 Mbyte areas (0x2000000-0x3FFFFFF, 0x4000000-0x5FFFFFF and
- * 0x6000000-0x7FFFFFF) are general I/O "slots" (slots 1, 2 and 3).
- * Most other motherboard devices have registers mapped into the area
- * 0xE000000-0xFFFFFFF (Motherboard I/O slot?). The area 0x8000000-0xDFFFFFF
- * is free for whatever.
- *
- * The location of the motherboard address space in the physical address space
- * of the cpu is given by CMA_MB_BASE. This value is determined by the cpu
- * module plugged into the motherboard and is configured above.
- *
- * Motherboard I/O devices mapped into the area (0xE000000-0xFFFFFFF)
- * generally only use byte lane 0 (D0-7) for their transfers, i.e. only
- * 8 bit, or 1 byte, transfers can take place, so all the registers are
- * only 8 bits wide. The exceptions are the motherboard flash, which uses
- * byte lanes 0 and 1 (i.e. 16 bits), and the mapped PCI address space.
- *
- * I/O registers within the mapped motherboard devices are 64 bit aligned
- * i.e. they are 8 bytes apart. For big endian addressing, the 8 bit register
- * will be at byte 7 (the address + 7). For little endian addressing, the
- * register will be at byte 0 (the address + 0). To learn the endianess
- * we must include <endian.h>
- *
- * Take the CMA102 and CMA111 motherboards as examples...
- *
- * The CMA102 has three CMABus I/O Expansion slots and no PCI bridge. The 3
- * CMABus slots are each mapped directly onto the three general I/O slots.
- *
- * The CMA111 has only one CMABus I/O Expansion slot, but has a V360EPC PCI
- * bridge. The CMABus slot is mapped onto general I/O slot 1. The standard
- * PCI Bus space is mapped onto general I/O slot 2, with a small area at the
- * top reserved for access to the V360EPC registers (0x5FF0000-0x5FFFFFF).
- * I/O slot 3 is unused. The extended PCI Bus space is mapped onto the area
- * 0xA000000-0xDFFFFFF.
- */
-
-#define CMA_MB_RAM_BASE (CFG_CMA_MB_BASE+0x0000000)
-#define CMA_MB_RAM_SIZE 0x2000000 /* dip sws set actual size */
-
-#if (CMA_MB_CAPS & CMA_MB_CAP_SLOT1)
-#define CMA_MB_SLOT1_BASE (CFG_CMA_MB_BASE+0x2000000)
-#define CMA_MB_SLOT1_SIZE 0x2000000
-#endif
-
-#if (CMA_MB_CAPS & CMA_MB_CAP_SLOT2)
-#define CMA_MB_SLOT2_BASE (CFG_CMA_MB_BASE+0x4000000)
-#define CMA_MB_SLOT2_SIZE 0x2000000
-#endif
-#if (CMA_MB_CAPS & CMA_MB_CAP_PCI)
-#define CMA_MB_STDPCI_BASE (CFG_CMA_MB_BASE+0x4000000)
-#define CMA_MB_STDPCI_SIZE 0x1ff0000
-#define CMA_MB_V360EPC_BASE (CFG_CMA_MB_BASE+0x5ff0000)
-#define CMA_MB_V360EPC_SIZE 0x10000
-#endif
-
-#if (CMA_MB_CAPS & CMA_MB_CAP_SLOT3)
-#define CMA_MB_SLOT3_BASE (CFG_CMA_MB_BASE+0x6000000)
-#define CMA_MB_SLOT3_SIZE 0x2000000
-#endif
-
-#if (CMA_MB_CAPS & CMA_MB_CAP_PCI_EXT)
-#define CMA_MB_EXTPCI_BASE (CFG_CMA_MB_BASE+0xa000000)
-#define CMA_MB_EXTPCI_SIZE 0x4000000
-#endif
-
-#define CMA_MB_ROMLOW_BASE (CFG_CMA_MB_BASE+0xe000000)
-#define CMA_MB_ROMLOW_SIZE 0x800000
-#if (CMA_MB_CAPS & CMA_MB_CAP_FLASH)
-#define CMA_MB_FLLOW_EXEC_BASE (CFG_CMA_MB_BASE+0xe000000)
-#define CMA_MB_FLLOW_EXEC_SIZE 0x100000
-#define CMA_MB_FLLOW_RDWR_BASE (CFG_CMA_MB_BASE+0xe400000)
-#define CMA_MB_FLLOW_RDWR_SIZE 0x400000
-#endif
-
-#if (CMA_MB_CAPS & CMA_MB_CAP_RTC)
-#define CMA_MB_RTC_BASE (CFG_CMA_MB_BASE+0xe800000)
-#define CMA_MB_RTC_SIZE 0x4000
-#endif
-
-#if (CMA_MB_CAPS & CMA_MB_CAP_SERPAR)
-#define CMA_MB_SERPAR_BASE (CFG_CMA_MB_BASE+0xe900000)
-#define CMA_MB_SERIALB_BASE (CMA_MB_SERPAR_BASE+0x00)
-#define CMA_MB_SERIALA_BASE (CMA_MB_SERPAR_BASE+0x40)
-#define CMA_MB_PARALLEL_BASE (CMA_MB_SERPAR_BASE+0x80)
-#define CMA_MB_SERPAR_SIZE 0xa0
-#endif
-
-#if (CMA_MB_CAPS & CMA_MB_CAP_KBM)
-#define CMA_MB_PKBM_BASE (CFG_CMA_MB_BASE+0xe900100)
-#define CMA_MB_PKBM_SIZE 0x10
-#endif
-
-#if (CMA_MB_CAPS & CMA_MB_CAP_LCD)
-#define CMA_MB_LCD_BASE (CFG_CMA_MB_BASE+0xeb00000)
-#define CMA_MB_LCD_SIZE 0x10
-#endif
-
-#define CMA_MB_DIPSW_BASE (CFG_CMA_MB_BASE+0xec00000)
-#define CMA_MB_DIPSW_SIZE 0x10
-
-#if (CMA_MB_CAPS & (CMA_MB_CAP_SLOT1|CMA_MB_CAP_SER2|CMA_MB_CAP_KBM))
-#define CMA_MB_SLOT1CFG_BASE (CFG_CMA_MB_BASE+0xf100000)
-#if (CMA_MB_CAPS & CMA_MB_CAP_SER2)
-#define CMA_MB_SER2_BASE (CMA_MB_SLOT1CFG_BASE+0x80)
-#define CMA_MB_SER2B_BASE (CMA_MB_SER2_BASE+0x00)
-#define CMA_MB_SER2A_BASE (CMA_MB_SER2_BASE+0x40)
-#endif
-#if defined(CONFIG_CMA302) && defined(CONFIG_CMA302_SLOT1)
-#define CMA_MB_S1KBM_BASE (CMA_MB_SLOT1CFG_BASE+0x200)
-#endif
-#if (CMA_MB_CAPS & CMA_MB_CAP_KBM) && !defined(COGENT_CMA150)
-#define CMA_MB_IREQ1STAT_BASE (CMA_MB_SLOT1CFG_BASE+0x100)
-#define CMA_MB_AKBM_BASE (CMA_MB_SLOT1CFG_BASE+0x200)
-#define CMA_MB_IREQ1MASK_BASE (CMA_MB_SLOT1CFG_BASE+0x300)
-#endif
-#define CMA_MB_SLOT1CFG_SIZE 0x400
-#endif
-
-#if (CMA_MB_CAPS & CMA_MB_CAP_SLOT2)
-#define CMA_MB_SLOT2CFG_BASE (CFG_CMA_MB_BASE+0xf200000)
-#if defined(CONFIG_CMA302) && defined(CONFIG_CMA302_SLOT2)
-#define CMA_MB_S2KBM_BASE (CMA_MB_SLOT2CFG_BASE+0x200)
-#endif
-#define CMA_MB_SLOT2CFG_SIZE 0x400
-#endif
-
-#if (CMA_MB_CAPS & CMA_MB_CAP_PCI)
-#define CMA_MB_PCICTL_BASE (CFG_CMA_MB_BASE+0xf200000)
-#define CMA_MB_PCI_V3CTL_BASE (CMA_MB_PCICTL_BASE+0x100)
-#define CMA_MB_PCI_IDSEL_BASE (CMA_MB_PCICTL_BASE+0x200)
-#define CMA_MB_PCI_IMASK_BASE (CMA_MB_PCICTL_BASE+0x300)
-#define CMA_MB_PCI_ISTAT_BASE (CMA_MB_PCICTL_BASE+0x400)
-#define CMA_MB_PCI_MBID_BASE (CMA_MB_PCICTL_BASE+0x500)
-#define CMA_MB_PCI_MBREV_BASE (CMA_MB_PCICTL_BASE+0x600)
-#define CMA_MB_PCICTL_SIZE 0x700
-#endif
-
-#if (CMA_MB_CAPS & CMA_MB_CAP_SLOT3)
-#define CMA_MB_SLOT3CFG_BASE (CFG_CMA_MB_BASE+0xf300000)
-#if defined(CONFIG_CMA302) && defined(CONFIG_CMA302_SLOT3)
-#define CMA_MB_S3KBM_BASE (CMA_MB_SLOT3CFG_BASE+0x200)
-#endif
-#define CMA_MB_SLOT3CFG_SIZE 0x400
-#endif
-
-#define CMA_MB_ROMHIGH_BASE (CFG_CMA_MB_BASE+0xf800000)
-#define CMA_MB_ROMHIGH_SIZE 0x800000
-#if (CMA_MB_CAPS & CMA_MB_CAP_FLASH)
-#define CMA_MB_FLHIGH_EXEC_BASE (CFG_CMA_MB_BASE+0xf800000)
-#define CMA_MB_FLHIGH_EXEC_SIZE 0x100000
-#define CMA_MB_FLHIGH_RDWR_BASE (CFG_CMA_MB_BASE+0xfc00000)
-#define CMA_MB_FLHIGH_RDWR_SIZE 0x400000
-#endif
-
-#if (CMA_MB_CAPS & CMA_MB_CAP_PCI)
-
-/* PCI Control Register bits */
-
-/* V360EPC Control register bits */
-#define CMA_MB_PCI_V3CTL_RESET 0x01
-#define CMA_MB_PCI_V3CTL_EXTADD 0x08
-
-/* PCI ID Select register bits */
-#define CMA_MB_PCI_IDSEL_SLOTA 0x01
-#define CMA_MB_PCI_IDSEL_SLOTB 0x02
-#define CMA_MB_PCI_IDSEL_GD82559 0x04
-#define CMA_MB_PCI_IDSEL_B69000 0x08
-#define CMA_MB_PCI_IDSEL_PD6832 0x10
-
-/* PCI Interrupt Mask/Status register bits */
-#define CMA_MB_PCI_IMS_INTA 0x01
-#define CMA_MB_PCI_IMS_INTB 0x02
-#define CMA_MB_PCI_IMS_INTC 0x04
-#define CMA_MB_PCI_IMS_INTD 0x08
-#define CMA_MB_PCI_IMS_CBINT 0x10
-#define CMA_MB_PCI_IMS_V3LINT 0x80
-
-#endif
-
-#if (CMA_MB_CAPS & (CMA_MB_CAP_KBM|CMA_MB_CAP_SER2)) && !defined(COGENT_CMA150)
-
-/*
- * IREQ1 Interrupt Mask/Status register bits
- * (Note: not available on CMA150 - must poll HT6542B interrupt register)
- */
-
-#define IREQ1_MINT 0x01
-#define IREQ1_KINT 0x02
-#if (CMA_MB_CAPS & CMA_MB_CAP_SER2)
-#define IREQ1_SINT2 0x04
-#define IREQ1_SINT3 0x08
-#endif
-
-#endif
-
-#ifndef __ASSEMBLY__
-
-#ifdef USE_HOSTCC
-#include <endian.h> /* avoid using private kernel header files */
-#else
-#include <asm/byteorder.h> /* use U-Boot provided headers */
-#endif
-
-/* a single CMA10x motherboard i/o register */
-typedef
- struct {
-#if __BYTE_ORDER == __LITTLE_ENDIAN
- unsigned char value;
-#endif
- unsigned char filler[7];
-#if __BYTE_ORDER == __BIG_ENDIAN
- unsigned char value;
-#endif
- }
-cma_mb_reg;
-
-extern __inline__ unsigned char
-cma_mb_reg_read(volatile cma_mb_reg *reg)
-{
- unsigned char data = reg->value;
- __asm__ __volatile__ ("eieio" : : : "memory");
- return data;
-}
-
-extern __inline__ void
-cma_mb_reg_write(volatile cma_mb_reg *reg, unsigned char data)
-{
- reg->value = data;
- __asm__ __volatile__ ("eieio" : : : "memory");
-}
-
-#if (CMA_MB_CAPS & CMA_MB_CAP_RTC)
-
-/* MK48T02 RTC registers */
-typedef
- struct {
- cma_mb_reg sram[2040];/* Battery-Backed SRAM */
- cma_mb_reg clk_ctl; /* Clock Control Register */
- cma_mb_reg clk_sec; /* Clock Seconds Register */
- cma_mb_reg clk_min; /* Clock Minutes Register */
- cma_mb_reg clk_hour; /* Clock Hour Register */
- cma_mb_reg clk_day; /* Clock Day Register */
- cma_mb_reg clk_date; /* Clock Date Register */
- cma_mb_reg clk_month; /* Clock Month Register */
- cma_mb_reg clk_year; /* Clock Year Register */
- }
-cma_mb_rtc;
-
-#endif
-
-#if (CMA_MB_CAPS & CMA_MB_CAP_SERPAR)
-
-/* ST16C522 Serial I/O */
-typedef
- struct {
- cma_mb_reg ser_rhr; /* Receive Holding Register (R, DLAB=0) */
- cma_mb_reg ser_ier; /* Interrupt Enable Register (R/W, DLAB=0) */
- cma_mb_reg ser_isr; /* Interrupt Status Register (R) */
- cma_mb_reg ser_lcr; /* Line Control Register (R/W) */
- cma_mb_reg ser_mcr; /* Modem Control Register (R/W) */
- cma_mb_reg ser_lsr; /* Line Status Register (R) */
- cma_mb_reg ser_msr; /* Modem Status Register (R/W) */
- cma_mb_reg ser_spr; /* Scratch Pad Register (R/W) */
- }
-cma_mb_serial;
-
-#define ser_thr ser_rhr /* Transmit Holding Register (W, DLAB=0) */
-#define ser_brl ser_rhr /* Baud Rate Divisor Low Byte (R/W, DLAB=1) */
-#define ser_brh ser_ier /* Baud Rate Divisor High Byte (R/W, DLAB=1) */
-#define ser_fcr ser_isr /* FIFO Control Register (W) */
-#define ser_nop ser_lsr /* No Operation (W) */
-
-/* ST16C522 Parallel I/O */
-typedef
- struct {
- cma_mb_reg par_rdr; /* Port Read Data Register (R) */
- cma_mb_reg par_sr; /* Status Register (R) */
- cma_mb_reg par_cmd; /* Command Register (R) */
- }
-cma_mb_parallel;
-
-#define par_wdr par_rdr /* Port Write Data Register (W) */
-#define par_ios par_sr /* I/O Select Register (W) */
-#define par_ctl par_cmd /* Control Register (W) */
-
-#endif
-
-#if (CMA_MB_CAPS & CMA_MB_CAP_KBM) || defined(CONFIG_CMA302)
-
-/* HT6542B PS/2 Keyboard/Mouse Controller */
-typedef
- struct {
- cma_mb_reg kbm_rdr; /* Read Data Register (R) */
- cma_mb_reg kbm_sr; /* Status Register (R) */
- }
-cma_mb_kbm;
-
-#define kbm_wdr kbm_rdr /* Write Data Register (W) */
-#define kbm_cmd kbm_sr /* Command Register (W) */
-
-#endif
-
-#if (CMA_MB_CAPS & CMA_MB_CAP_LCD)
-
-/* HD44780 LCD Display */
-typedef
- struct {
- cma_mb_reg lcd_ccr; /* Current Character Register (R/W) */
- cma_mb_reg lcd_bsr; /* Busy Status Register (R) */
- }
-cma_mb_lcd;
-
-#define lcd_cmd lcd_bsr /* Command Register (W) */
-
-#endif
-
-/* 8-Position Configuration Switch */
-typedef
- struct {
- cma_mb_reg dip_val; /* Dip Switch value (R) */
- }
-cma_mb_dipsw;
-
-#if (CMA_MB_CAPS & CMA_MB_CAP_PCI)
-
-/* V360EPC PCI Bridge */
-typedef
- struct {
-#if __BYTE_ORDER == __LITTLE_ENDIAN
- unsigned short v3_pci_vendor; /* 0x00 */
- unsigned short v3_pci_device;
- unsigned short v3_pci_cmd; /* 0x04 */
- unsigned short v3_pci_stat;
- unsigned long v3_pci_cc_rev; /* 0x08 */
- unsigned long v3_pci_hdr_cfg; /* 0x0c */
- unsigned long v3_pci_io_base; /* 0x10 */
- unsigned long v3_pci_base0; /* 0x14 */
- unsigned long v3_pci_base1; /* 0x18 */
- unsigned long reserved1[4]; /* 0x1c */
- unsigned short v3_pci_sub_vendor; /* 0x2c */
- unsigned short v3_pci_sub_id;
- unsigned long v3_pci_rom; /* 0x30 */
- unsigned long reserved2[2]; /* 0x34 */
- unsigned long v3_pci_bparam; /* 0x3c */
- unsigned long v3_pci_map0; /* 0x40 */
- unsigned long v3_pci_map1; /* 0x44 */
- unsigned long v3_pci_int_stat; /* 0x48 */
- unsigned long v3_pci_int_cfg; /* 0x4c */
- unsigned long reserved3[1]; /* 0x50 */
- unsigned long v3_lb_base0; /* 0x54 */
- unsigned long v3_lb_base1; /* 0x58 */
- unsigned short reserved4; /* 0x5c */
- unsigned short v3_lb_map0;
- unsigned short reserved5; /* 0x60 */
- unsigned short v3_lb_map1;
- unsigned short v3_lb_base2; /* 0x64 */
- unsigned short v3_lb_map2;
- unsigned long v3_lb_size; /* 0x68 */
- unsigned short reserved6; /* 0x6c */
- unsigned short v3_lb_io_base;
- unsigned short v3_fifo_cfg; /* 0x70 */
- unsigned short v3_fifo_priority;
- unsigned short v3_fifo_stat; /* 0x74 */
- unsigned char v3_lb_istat;
- unsigned char v3_lb_imask;
- unsigned short v3_system; /* 0x78 */
- unsigned short v3_lb_cfg;
- unsigned short v3_pci_cfg; /* 0x7c */
- unsigned short reserved7;
- unsigned long v3_dma_pci_addr0; /* 0x80 */
- unsigned long v3_dma_local_addr0; /* 0x84 */
- unsigned long v3_dma_length0:24; /* 0x88 */
- unsigned long v3_dma_csr0:8;
- unsigned long v3_dma_ctlb_adr0; /* 0x8c */
- unsigned long v3_dma_pci_addr1; /* 0x90 */
- unsigned long v3_dma_local_addr1; /* 0x94 */
- unsigned long v3_dma_length1:24; /* 0x98 */
- unsigned long v3_dma_csr1:8;
- unsigned long v3_dma_ctlb_adr1; /* 0x9c */
- unsigned long v3_i20_mups[8]; /* 0xa0 */
- unsigned char v3_mail_data0; /* 0xc0 */
- unsigned char v3_mail_data1;
- unsigned char v3_mail_data2;
- unsigned char v3_mail_data3;
- unsigned char v3_mail_data4; /* 0xc4 */
- unsigned char v3_mail_data5;
- unsigned char v3_mail_data6;
- unsigned char v3_mail_data7;
- unsigned char v3_mail_data8; /* 0xc8 */
- unsigned char v3_mail_data9;
- unsigned char v3_mail_data10;
- unsigned char v3_mail_data11;
- unsigned char v3_mail_data12; /* 0xcc */
- unsigned char v3_mail_data13;
- unsigned char v3_mail_data14;
- unsigned char v3_mail_data15;
- unsigned short v3_pci_mail_iewr; /* 0xd0 */
- unsigned short v3_pci_mail_ierd;
- unsigned short v3_lb_mail_iewr; /* 0xd4 */
- unsigned short v3_lb_mail_ierd;
- unsigned short v3_mail_wr_stat; /* 0xd8 */
- unsigned short v3_mail_rd_stat;
- unsigned long v3_qba_map; /* 0xdc */
- unsigned long v3_dma_delay:8; /* 0xe0 */
- unsigned long reserved8:24;
- unsigned long reserved9[7]; /* 0xe4 */
-#endif
-#if __BYTE_ORDER == __BIG_ENDIAN
- unsigned short v3_pci_device; /* 0x00 */
- unsigned short v3_pci_vendor;
- unsigned short v3_pci_stat; /* 0x04 */
- unsigned short v3_pci_cmd;
- unsigned long v3_pci_cc_rev; /* 0x08 */
- unsigned long v3_pci_hdr_cfg; /* 0x0c */
- unsigned long v3_pci_io_base; /* 0x10 */
- unsigned long v3_pci_base0; /* 0x14 */
- unsigned long v3_pci_base1; /* 0x18 */
- unsigned long reserved1[4]; /* 0x1c */
- unsigned short v3_pci_sub_id; /* 0x2c */
- unsigned short v3_pci_sub_vendor;
- unsigned long v3_pci_rom; /* 0x30 */
- unsigned long reserved2[2]; /* 0x34 */
- unsigned long v3_pci_bparam; /* 0x3c */
- unsigned long v3_pci_map0; /* 0x40 */
- unsigned long v3_pci_map1; /* 0x44 */
- unsigned long v3_pci_int_stat; /* 0x48 */
- unsigned long v3_pci_int_cfg; /* 0x4c */
- unsigned long reserved3; /* 0x50 */
- unsigned long v3_lb_base0; /* 0x54 */
- unsigned long v3_lb_base1; /* 0x58 */
- unsigned short v3_lb_map0; /* 0x5c */
- unsigned short reserved4;
- unsigned short v3_lb_map1; /* 0x60 */
- unsigned short reserved5;
- unsigned short v3_lb_map2; /* 0x64 */
- unsigned short v3_lb_base2;
- unsigned long v3_lb_size; /* 0x68 */
- unsigned short v3_lb_io_base; /* 0x6c */
- unsigned short reserved6;
- unsigned short v3_fifo_priority; /* 0x70 */
- unsigned short v3_fifo_cfg;
- unsigned char v3_lb_imask; /* 0x74 */
- unsigned char v3_lb_istat;
- unsigned short v3_fifo_stat;
- unsigned short v3_lb_cfg; /* 0x78 */
- unsigned short v3_system;
- unsigned short reserved7; /* 0x7c */
- unsigned short v3_pci_cfg;
- unsigned long v3_dma_pci_addr0; /* 0x80 */
- unsigned long v3_dma_local_addr0; /* 0x84 */
- unsigned long v3_dma_csr0:8; /* 0x88 */
- unsigned long v3_dma_length0:24;
- unsigned long v3_dma_ctlb_adr0; /* 0x8c */
- unsigned long v3_dma_pci_addr1; /* 0x90 */
- unsigned long v3_dma_local_addr1; /* 0x94 */
- unsigned long v3_dma_csr1:8; /* 0x98 */
- unsigned long v3_dma_length1:24;
- unsigned long v3_dma_ctlb_adr1; /* 0x9c */
- unsigned long v3_i20_mups[8]; /* 0xa0 */
- unsigned char v3_mail_data3; /* 0xc0 */
- unsigned char v3_mail_data2;
- unsigned char v3_mail_data1;
- unsigned char v3_mail_data0;
- unsigned char v3_mail_data7; /* 0xc4 */
- unsigned char v3_mail_data6;
- unsigned char v3_mail_data5;
- unsigned char v3_mail_data4;
- unsigned char v3_mail_data11; /* 0xc8 */
- unsigned char v3_mail_data10;
- unsigned char v3_mail_data9;
- unsigned char v3_mail_data8;
- unsigned char v3_mail_data15; /* 0xcc */
- unsigned char v3_mail_data14;
- unsigned char v3_mail_data13;
- unsigned char v3_mail_data12;
- unsigned short v3_pci_mail_ierd; /* 0xd0 */
- unsigned short v3_pci_mail_iewr;
- unsigned short v3_lb_mail_ierd; /* 0xd4 */
- unsigned short v3_lb_mail_iewr;
- unsigned short v3_mail_rd_stat; /* 0xd8 */
- unsigned short v3_mail_wr_stat;
- unsigned long v3_qba_map; /* 0xdc */
- unsigned long reserved8:24; /* 0xe0 */
- unsigned long v3_dma_delay:8;
- unsigned long reserved9[7]; /* 0xe4 */
-#endif
- } /* 0x100 */
-cma_mb_v360epc;
-
-#endif
-
-#endif /* __ASSEMBLY__ */
-
-#endif /* _COGENT_MB_H */
diff --git a/board/cogent/par.c b/board/cogent/par.c
deleted file mode 100644
index a03c0f10d2..0000000000
--- a/board/cogent/par.c
+++ /dev/null
@@ -1,3 +0,0 @@
-/* parallel not implemented yet */
-
-int cma_parallel_not_implemented = 1;
diff --git a/board/cogent/par.h b/board/cogent/par.h
deleted file mode 100644
index 664ae4a952..0000000000
--- a/board/cogent/par.h
+++ /dev/null
@@ -1,3 +0,0 @@
-/* parallel not implemented yet */
-
-extern int cma_parallel_not_implemented;
diff --git a/board/cogent/pci.c b/board/cogent/pci.c
deleted file mode 100644
index 0a57c0c558..0000000000
--- a/board/cogent/pci.c
+++ /dev/null
@@ -1,3 +0,0 @@
-/* pci not implemented yet */
-
-int cma_pci_not_implemented = 1;
diff --git a/board/cogent/pci.h b/board/cogent/pci.h
deleted file mode 100644
index 35aa354a24..0000000000
--- a/board/cogent/pci.h
+++ /dev/null
@@ -1,3 +0,0 @@
-/* pci not implemented yet */
-
-extern int cma_pci_not_implemented;
diff --git a/board/cogent/rtc.c b/board/cogent/rtc.c
deleted file mode 100644
index ace9193542..0000000000
--- a/board/cogent/rtc.c
+++ /dev/null
@@ -1,3 +0,0 @@
-/* rtc not implemented yet */
-
-int cma_rtc_not_implemented = 1;
diff --git a/board/cogent/rtc.h b/board/cogent/rtc.h
deleted file mode 100644
index 4b55bd2275..0000000000
--- a/board/cogent/rtc.h
+++ /dev/null
@@ -1,3 +0,0 @@
-/* rtc not implemented yet */
-
-extern int cma_rtc_not_implemented;
diff --git a/board/cogent/serial.c b/board/cogent/serial.c
deleted file mode 100644
index 4c200170d0..0000000000
--- a/board/cogent/serial.c
+++ /dev/null
@@ -1,190 +0,0 @@
-/*
- * Simple serial driver for Cogent motherboard serial ports
- * for use during boot
- */
-
-#include <common.h>
-#include <board/cogent/serial.h>
-
-#if (CMA_MB_CAPS & CMA_MB_CAP_SERPAR)
-
-#if (defined(CONFIG_8xx) && defined(CONFIG_8xx_CONS_NONE)) || \
- (defined(CONFIG_8260) && defined(CONFIG_CONS_NONE))
-
-#if CONFIG_CONS_INDEX == 1
-#define CMA_MB_SERIAL_BASE CMA_MB_SERIALA_BASE
-#elif CONFIG_CONS_INDEX == 2
-#define CMA_MB_SERIAL_BASE CMA_MB_SERIALB_BASE
-#elif CONFIG_CONS_INDEX == 3 && (CMA_MB_CAPS & CMA_MB_CAP_SER2)
-#define CMA_MB_SERIAL_BASE CMA_MB_SER2A_BASE
-#elif CONFIG_CONS_INDEX == 4 && (CMA_MB_CAPS & CMA_MB_CAP_SER2)
-#define CMA_MB_SERIAL_BASE CMA_MB_SER2B_BASE
-#else
-#error CONFIG_CONS_INDEX must be configured for Cogent motherboard serial
-#endif
-
-int serial_init (void)
-{
-/* DECLARE_GLOBAL_DATA_PTR; */
-
- cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_SERIAL_BASE;
-
- cma_mb_reg_write(&mbsp->ser_ier, 0x00); /* turn off interrupts */
- serial_setbrg ();
- cma_mb_reg_write(&mbsp->ser_lcr, 0x03); /* 8 data, 1 stop, no parity */
- cma_mb_reg_write(&mbsp->ser_mcr, 0x03); /* RTS/DTR */
- cma_mb_reg_write(&mbsp->ser_fcr, 0x07); /* Clear & enable FIFOs */
-
- return (0);
-}
-
-void
-serial_setbrg (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_SERIAL_BASE;
- unsigned int divisor;
- unsigned char lcr;
-
- if ((divisor = br_to_div(gd->baudrate)) == 0)
- divisor = DEFDIV;
-
- lcr = cma_mb_reg_read(&mbsp->ser_lcr);
- cma_mb_reg_write(&mbsp->ser_lcr, lcr|0x80);/* Access baud rate(set DLAB)*/
- cma_mb_reg_write(&mbsp->ser_brl, divisor & 0xff);
- cma_mb_reg_write(&mbsp->ser_brh, (divisor >> 8) & 0xff);
- cma_mb_reg_write(&mbsp->ser_lcr, lcr); /* unset DLAB */
-}
-
-void
-serial_putc(const char c)
-{
- cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_SERIAL_BASE;
-
- if (c == '\n')
- serial_putc('\r');
-
- while ((cma_mb_reg_read(&mbsp->ser_lsr) & LSR_THRE) == 0)
- ;
-
- cma_mb_reg_write(&mbsp->ser_thr, c);
-}
-
-void
-serial_puts(const char *s)
-{
- while (*s != '\0')
- serial_putc(*s++);
-}
-
-int
-serial_getc(void)
-{
- cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_SERIAL_BASE;
-
- while ((cma_mb_reg_read(&mbsp->ser_lsr) & LSR_DR) == 0)
- ;
-
- return ((int)cma_mb_reg_read(&mbsp->ser_rhr) & 0x7f);
-}
-
-int
-serial_tstc(void)
-{
- cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_SERIAL_BASE;
-
- return ((cma_mb_reg_read(&mbsp->ser_lsr) & LSR_DR) != 0);
-}
-
-#endif /* CONS_NONE */
-
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB) && \
- defined(CONFIG_KGDB_NONE)
-
-#if CONFIG_KGDB_INDEX == CONFIG_CONS_INDEX
-#error Console and kgdb are on the same serial port - this is not supported
-#endif
-
-#if CONFIG_KGDB_INDEX == 1
-#define CMA_MB_KGDB_SER_BASE CMA_MB_SERIALA_BASE
-#elif CONFIG_KGDB_INDEX == 2
-#define CMA_MB_KGDB_SER_BASE CMA_MB_SERIALB_BASE
-#elif CONFIG_KGDB_INDEX == 3 && (CMA_MB_CAPS & CMA_MB_CAP_SER2)
-#define CMA_MB_KGDB_SER_BASE CMA_MB_SER2A_BASE
-#elif CONFIG_KGDB_INDEX == 4 && (CMA_MB_CAPS & CMA_MB_CAP_SER2)
-#define CMA_MB_KGDB_SER_BASE CMA_MB_SER2B_BASE
-#else
-#error CONFIG_KGDB_INDEX must be configured for Cogent motherboard serial
-#endif
-
-void
-kgdb_serial_init(void)
-{
- cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_KGDB_SER_BASE;
- unsigned int divisor;
-
- if ((divisor = br_to_div(CONFIG_KGDB_BAUDRATE)) == 0)
- divisor = DEFDIV;
-
- cma_mb_reg_write(&mbsp->ser_ier, 0x00); /* turn off interrupts */
- cma_mb_reg_write(&mbsp->ser_lcr, 0x80); /* Access baud rate(set DLAB)*/
- cma_mb_reg_write(&mbsp->ser_brl, divisor & 0xff);
- cma_mb_reg_write(&mbsp->ser_brh, (divisor >> 8) & 0xff);
- cma_mb_reg_write(&mbsp->ser_lcr, 0x03); /* 8 data, 1 stop, no parity */
- cma_mb_reg_write(&mbsp->ser_mcr, 0x03); /* RTS/DTR */
- cma_mb_reg_write(&mbsp->ser_fcr, 0x07); /* Clear & enable FIFOs */
-
- printf("[on cma10x serial port B] ");
-}
-
-void
-putDebugChar(int c)
-{
- cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_KGDB_SER_BASE;
-
- while ((cma_mb_reg_read(&mbsp->ser_lsr) & LSR_THRE) == 0)
- ;
-
- cma_mb_reg_write(&mbsp->ser_thr, c & 0xff);
-}
-
-void
-putDebugStr(const char *str)
-{
- while (*str != '\0') {
- if (*str == '\n')
- putDebugChar('\r');
- putDebugChar(*str++);
- }
-}
-
-int
-getDebugChar(void)
-{
- cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_KGDB_SER_BASE;
-
- while ((cma_mb_reg_read(&mbsp->ser_lsr) & LSR_DR) == 0)
- ;
-
- return ((int)cma_mb_reg_read(&mbsp->ser_rhr) & 0x7f);
-}
-
-void
-kgdb_interruptible(int yes)
-{
- cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_KGDB_SER_BASE;
-
- if (yes == 1) {
- printf("kgdb: turning serial ints on\n");
- cma_mb_reg_write(&mbsp->ser_ier, 0xf);
- }
- else {
- printf("kgdb: turning serial ints off\n");
- cma_mb_reg_write(&mbsp->ser_ier, 0x0);
- }
-}
-
-#endif /* KGDB && KGDB_NONE */
-
-#endif /* CAPS & SERPAR */
diff --git a/board/cogent/serial.h b/board/cogent/serial.h
deleted file mode 100644
index 89962d887d..0000000000
--- a/board/cogent/serial.h
+++ /dev/null
@@ -1,15 +0,0 @@
-/* Line Status Register bits */
-#define LSR_DR 0x01 /* Data ready */
-#define LSR_OE 0x02 /* Overrun */
-#define LSR_PE 0x04 /* Parity error */
-#define LSR_FE 0x08 /* Framing error */
-#define LSR_BI 0x10 /* Break */
-#define LSR_THRE 0x20 /* Xmit holding register empty */
-#define LSR_TEMT 0x40 /* Xmitter empty */
-#define LSR_ERR 0x80 /* Error */
-
-#define CLKRATE 3686400 /* cogent motherboard serial clk = 3.6864MHz */
-#define DEFDIV 1 /* default to 230400 bps */
-
-#define br_to_div(br) (CLKRATE / (16 * (br)))
-#define div_to_br(div) (CLKRATE / (16 * (div)))
diff --git a/board/cogent/u-boot.lds b/board/cogent/u-boot.lds
deleted file mode 100644
index 5ce2694cbf..0000000000
--- a/board/cogent/u-boot.lds
+++ /dev/null
@@ -1,129 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- *(.text)
- common/environment.o(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/cogent/u-boot.lds.debug b/board/cogent/u-boot.lds.debug
deleted file mode 100644
index ddd4678ee8..0000000000
--- a/board/cogent/u-boot.lds.debug
+++ /dev/null
@@ -1,137 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc8xx/start.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
-
- . = env_offset;
- common/environment.o(.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/cpc45/Makefile b/board/cpc45/Makefile
deleted file mode 100644
index ccb811bd4d..0000000000
--- a/board/cpc45/Makefile
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# (C) Copyright 2001-2003
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o plx9030.o pd67290.o
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/cpc45/config.mk b/board/cpc45/config.mk
deleted file mode 100644
index bf9d9debc6..0000000000
--- a/board/cpc45/config.mk
+++ /dev/null
@@ -1,36 +0,0 @@
-#
-# (C) Copyright 2001-2003
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# CPC45 board
-#
-
-
-ifeq ($(CONFIG_BOOT_ROM),y)
- TEXT_BASE := 0xFFF00000
- PLATFORM_CPPFLAGS += -DCONFIG_BOOT_ROM
-else
- TEXT_BASE := 0xFFF00000
-endif
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)
diff --git a/board/cpc45/cpc45.c b/board/cpc45/cpc45.c
deleted file mode 100644
index 51b0085911..0000000000
--- a/board/cpc45/cpc45.c
+++ /dev/null
@@ -1,275 +0,0 @@
-/*
- * (C) Copyright 2001
- * Rob Taylor, Flying Pig Systems. robt@flyingpig.com.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc824x.h>
-#include <asm/processor.h>
-#include <asm/io.h>
-#include <pci.h>
-#include <i2c.h>
-
-int sysControlDisplay(int digit, uchar ascii_code);
-extern void Plx9030Init(void);
-extern void SPD67290Init(void);
-
- /* We have to clear the initial data area here. Couldn't have done it
- * earlier because DRAM had not been initialized.
- */
-int board_early_init_f(void)
-{
-
- /* enable DUAL UART Mode on CPC45 */
- *(uchar*)DUART_DCR |= 0x1; /* set DCM bit */
-
- return 0;
-}
-
-int checkboard(void)
-{
-/*
- char revision = BOARD_REV;
-*/
- ulong busfreq = get_bus_freq(0);
- char buf[32];
-
- puts ("CPC45 ");
-/*
- printf("Revision %d ", revision);
-*/
- printf("Local Bus at %s MHz\n", strmhz(buf, busfreq));
-
- return 0;
-}
-
-long int initdram (int board_type)
-{
- int m, row, col, bank, i, ref;
- unsigned long start, end;
- uint32_t mccr1, mccr2;
- uint32_t mear1 = 0, emear1 = 0, msar1 = 0, emsar1 = 0;
- uint32_t mear2 = 0, emear2 = 0, msar2 = 0, emsar2 = 0;
- uint8_t mber = 0;
- unsigned int tmp;
-
- i2c_init(CFG_I2C_SPEED, CFG_I2C_SLAVE);
-
- if (i2c_reg_read (0x50, 2) != 0x04)
- return 0; /* Memory type */
-
- m = i2c_reg_read (0x50, 5); /* # of physical banks */
- row = i2c_reg_read (0x50, 3); /* # of rows */
- col = i2c_reg_read (0x50, 4); /* # of columns */
- bank = i2c_reg_read (0x50, 17); /* # of logical banks */
- ref = i2c_reg_read (0x50, 12); /* refresh rate / type */
-
- CONFIG_READ_WORD(MCCR1, mccr1);
- mccr1 &= 0xffff0000;
-
- CONFIG_READ_WORD(MCCR2, mccr2);
- mccr2 &= 0xffff0000;
-
- start = CFG_SDRAM_BASE;
- end = start + (1 << (col + row + 3) ) * bank - 1;
-
- for (i = 0; i < m; i++) {
- mccr1 |= ((row == 13)? 2 : (bank == 4)? 0 : 3) << i * 2;
- if (i < 4) {
- msar1 |= ((start >> 20) & 0xff) << i * 8;
- emsar1 |= ((start >> 28) & 0xff) << i * 8;
- mear1 |= ((end >> 20) & 0xff) << i * 8;
- emear1 |= ((end >> 28) & 0xff) << i * 8;
- } else {
- msar2 |= ((start >> 20) & 0xff) << (i-4) * 8;
- emsar2 |= ((start >> 28) & 0xff) << (i-4) * 8;
- mear2 |= ((end >> 20) & 0xff) << (i-4) * 8;
- emear2 |= ((end >> 28) & 0xff) << (i-4) * 8;
- }
- mber |= 1 << i;
- start += (1 << (col + row + 3) ) * bank;
- end += (1 << (col + row + 3) ) * bank;
- }
- for (; i < 8; i++) {
- if (i < 4) {
- msar1 |= 0xff << i * 8;
- emsar1 |= 0x30 << i * 8;
- mear1 |= 0xff << i * 8;
- emear1 |= 0x30 << i * 8;
- } else {
- msar2 |= 0xff << (i-4) * 8;
- emsar2 |= 0x30 << (i-4) * 8;
- mear2 |= 0xff << (i-4) * 8;
- emear2 |= 0x30 << (i-4) * 8;
- }
- }
-
- switch(ref) {
- case 0x00:
- case 0x80:
- tmp = get_bus_freq(0) / 1000000 * 15625 / 1000 - 22;
- break;
- case 0x01:
- case 0x81:
- tmp = get_bus_freq(0) / 1000000 * 3900 / 1000 - 22;
- break;
- case 0x02:
- case 0x82:
- tmp = get_bus_freq(0) / 1000000 * 7800 / 1000 - 22;
- break;
- case 0x03:
- case 0x83:
- tmp = get_bus_freq(0) / 1000000 * 31300 / 1000 - 22;
- break;
- case 0x04:
- case 0x84:
- tmp = get_bus_freq(0) / 1000000 * 62500 / 1000 - 22;
- break;
- case 0x05:
- case 0x85:
- tmp = get_bus_freq(0) / 1000000 * 125000 / 1000 - 22;
- break;
- default:
- tmp = 0x512;
- break;
- }
-
- CONFIG_WRITE_WORD(MCCR1, mccr1);
- CONFIG_WRITE_WORD(MCCR2, tmp << MCCR2_REFINT_SHIFT);
- CONFIG_WRITE_WORD(MSAR1, msar1);
- CONFIG_WRITE_WORD(EMSAR1, emsar1);
- CONFIG_WRITE_WORD(MEAR1, mear1);
- CONFIG_WRITE_WORD(EMEAR1, emear1);
- CONFIG_WRITE_WORD(MSAR2, msar2);
- CONFIG_WRITE_WORD(EMSAR2, emsar2);
- CONFIG_WRITE_WORD(MEAR2, mear2);
- CONFIG_WRITE_WORD(EMEAR2, emear2);
- CONFIG_WRITE_BYTE(MBER, mber);
-
- return (1 << (col + row + 3) ) * bank * m;
-}
-
-
-/*
- * Initialize PCI Devices, report devices found.
- */
-
-static struct pci_config_table pci_cpc45_config_table[] = {
-#ifndef CONFIG_PCI_PNP
- { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x0F, PCI_ANY_ID,
- pci_cfgfunc_config_device, { PCI_ENET0_IOADDR,
- PCI_ENET0_MEMADDR,
- PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }},
- { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x0D, PCI_ANY_ID,
- pci_cfgfunc_config_device, { PCI_PLX9030_IOADDR,
- PCI_PLX9030_MEMADDR,
- PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }},
- { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x0E, PCI_ANY_ID,
- pci_cfgfunc_config_device, { PCMCIA_IO_BASE,
- PCMCIA_IO_BASE,
- PCI_COMMAND_MEMORY | PCI_COMMAND_IO }},
-#endif /*CONFIG_PCI_PNP*/
- { }
-};
-
-struct pci_controller hose = {
-#ifndef CONFIG_PCI_PNP
- config_table: pci_cpc45_config_table,
-#endif
-};
-
-void pci_init_board(void)
-{
- pci_mpc824x_init(&hose);
-
- /* init PCI_to_LOCAL Bus BRIDGE */
- Plx9030Init();
-
- /* Clear Display */
- DISP_CWORD = 0x0;
-
- sysControlDisplay(0,' ');
- sysControlDisplay(1,'C');
- sysControlDisplay(2,'P');
- sysControlDisplay(3,'C');
- sysControlDisplay(4,' ');
- sysControlDisplay(5,'4');
- sysControlDisplay(6,'5');
- sysControlDisplay(7,' ');
-
-}
-
-/**************************************************************************
-*
-* sysControlDisplay - controls one of the Alphanum. Display digits.
-*
-* This routine will write an ASCII character to the display digit requested.
-*
-* SEE ALSO:
-*
-* RETURNS: NA
-*/
-
-int sysControlDisplay (int digit, /* number of digit 0..7 */
- uchar ascii_code /* ASCII code */
- )
-{
- if ((digit < 0) || (digit > 7))
- return (-1);
-
- *((volatile uchar *) (DISP_CHR_RAM + digit)) = ascii_code;
-
- return (0);
-}
-
-#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
-
-#ifdef CFG_PCMCIA_MEM_ADDR
-volatile unsigned char *pcmcia_mem = (unsigned char*)CFG_PCMCIA_MEM_ADDR;
-#endif
-
-int pcmcia_init(void)
-{
- u_int rc;
-
- debug ("Enable PCMCIA " PCMCIA_SLOT_MSG "\n");
-
- rc = i82365_init();
-
- return rc;
-}
-
-#endif /* CFG_CMD_PCMCIA */
-
-# ifdef CONFIG_IDE_LED
-void ide_led (uchar led, uchar status)
-{
- u_char val;
- /* We have one PCMCIA slot and use LED H4 for the IDE Interface */
- val = readb(BCSR_BASE + 0x04);
- if (status) { /* led on */
- val |= B_CTRL_LED0;
- } else {
- val &= ~B_CTRL_LED0;
- }
- writeb(val, BCSR_BASE + 0x04);
-}
-# endif
diff --git a/board/cpc45/flash.c b/board/cpc45/flash.c
deleted file mode 100644
index 37dd182ba4..0000000000
--- a/board/cpc45/flash.c
+++ /dev/null
@@ -1,522 +0,0 @@
-/*
- * (C) Copyright 2001-2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc824x.h>
-#include <asm/processor.h>
-
-#if defined(CFG_ENV_IS_IN_FLASH)
-# ifndef CFG_ENV_ADDR
-# define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_ENV_OFFSET)
-# endif
-# ifndef CFG_ENV_SIZE
-# define CFG_ENV_SIZE CFG_ENV_SECT_SIZE
-# endif
-# ifndef CFG_ENV_SECT_SIZE
-# define CFG_ENV_SECT_SIZE CFG_ENV_SIZE
-# endif
-#endif
-
-#define FLASH_BANK_SIZE 0x800000
-#define MAIN_SECT_SIZE 0x40000
-#define PARAM_SECT_SIZE 0x8000
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
-
-static int write_data (flash_info_t * info, ulong dest, ulong * data);
-static void write_via_fpu (vu_long * addr, ulong * data);
-static __inline__ unsigned long get_msr (void);
-static __inline__ void set_msr (unsigned long msr);
-
-/*---------------------------------------------------------------------*/
-#undef DEBUG_FLASH
-
-/*---------------------------------------------------------------------*/
-#ifdef DEBUG_FLASH
-#define DEBUGF(fmt,args...) printf(fmt ,##args)
-#else
-#define DEBUGF(fmt,args...)
-#endif
-/*---------------------------------------------------------------------*/
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- int i, j;
- ulong size = 0;
- uchar tempChar;
- vu_long *tmpaddr;
-
- /* Enable flash writes on CPC45 */
-
- tempChar = BOARD_CTRL;
-
- tempChar |= (B_CTRL_FWPT_1 | B_CTRL_FWRE_1);
-
- tempChar &= ~(B_CTRL_FWPT_0 | B_CTRL_FWRE_0);
-
- BOARD_CTRL = tempChar;
-
- __asm__ volatile ("sync\n eieio");
-
- for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
- vu_long *addr = (vu_long *) (CFG_FLASH_BASE + i * FLASH_BANK_SIZE);
-
- addr[0] = 0x00900090;
-
- __asm__ volatile ("sync\n eieio");
-
- udelay (100);
-
- DEBUGF ("Flash bank # %d:\n"
- "\tManuf. ID @ 0x%08lX: 0x%08lX\n"
- "\tDevice ID @ 0x%08lX: 0x%08lX\n",
- i,
- (ulong) (&addr[0]), addr[0],
- (ulong) (&addr[2]), addr[2]);
-
-
- if ((addr[0] == addr[1]) && (addr[0] == INTEL_MANUFACT) &&
- (addr[2] == addr[3]) && (addr[2] == INTEL_ID_28F160F3T)) {
-
- flash_info[i].flash_id =
- (FLASH_MAN_INTEL & FLASH_VENDMASK) |
- (INTEL_ID_28F160F3T & FLASH_TYPEMASK);
-
- } else if ((addr[0] == addr[1]) && (addr[0] == INTEL_MANUFACT)
- && (addr[2] == addr[3])
- && (addr[2] == INTEL_ID_28F160C3T)) {
-
- flash_info[i].flash_id =
- (FLASH_MAN_INTEL & FLASH_VENDMASK) |
- (INTEL_ID_28F160C3T & FLASH_TYPEMASK);
-
- } else {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- addr[0] = 0xFFFFFFFF;
- goto Done;
- }
-
- DEBUGF ("flash_id = 0x%08lX\n", flash_info[i].flash_id);
-
- addr[0] = 0xFFFFFFFF;
-
- flash_info[i].size = FLASH_BANK_SIZE;
- flash_info[i].sector_count = CFG_MAX_FLASH_SECT;
- memset (flash_info[i].protect, 0, CFG_MAX_FLASH_SECT);
- for (j = 0; j < flash_info[i].sector_count; j++) {
- if (j > 30) {
- flash_info[i].start[j] = CFG_FLASH_BASE +
- i * FLASH_BANK_SIZE +
- (MAIN_SECT_SIZE * 31) + (j -
- 31) *
- PARAM_SECT_SIZE;
- } else {
- flash_info[i].start[j] = CFG_FLASH_BASE +
- i * FLASH_BANK_SIZE +
- j * MAIN_SECT_SIZE;
- }
- }
-
- /* unlock sectors, if 160C3T */
-
- for (j = 0; j < flash_info[i].sector_count; j++) {
- tmpaddr = (vu_long *) flash_info[i].start[j];
-
- if ((flash_info[i].flash_id & FLASH_TYPEMASK) ==
- (INTEL_ID_28F160C3T & FLASH_TYPEMASK)) {
- tmpaddr[0] = 0x00600060;
- tmpaddr[0] = 0x00D000D0;
- tmpaddr[1] = 0x00600060;
- tmpaddr[1] = 0x00D000D0;
- }
- }
-
- size += flash_info[i].size;
-
- addr[0] = 0x00FF00FF;
- addr[1] = 0x00FF00FF;
- }
-
- /* Protect monitor and environment sectors
- */
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE + FLASH_BANK_SIZE
- flash_protect (FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE + monitor_flash_len - 1,
- &flash_info[1]);
-#else
- flash_protect (FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE + monitor_flash_len - 1,
- &flash_info[0]);
-#endif
-
-#if (CFG_ENV_IS_IN_FLASH == 1) && defined(CFG_ENV_ADDR)
-#if CFG_ENV_ADDR >= CFG_FLASH_BASE + FLASH_BANK_SIZE
- flash_protect (FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[1]);
-#else
- flash_protect (FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0]);
-#endif
-#endif
-
-Done:
- return size;
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t * info)
-{
- int i;
-
- switch ((i = info->flash_id & FLASH_VENDMASK)) {
- case (FLASH_MAN_INTEL & FLASH_VENDMASK):
- printf ("Intel: ");
- break;
- default:
- printf ("Unknown Vendor 0x%04x ", i);
- break;
- }
-
- switch ((i = info->flash_id & FLASH_TYPEMASK)) {
- case (INTEL_ID_28F160F3T & FLASH_TYPEMASK):
- printf ("28F160F3T (16Mbit)\n");
- break;
-
- case (INTEL_ID_28F160C3T & FLASH_TYPEMASK):
- printf ("28F160C3T (16Mbit)\n");
- break;
-
- default:
- printf ("Unknown Chip Type 0x%04x\n", i);
- goto Done;
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; i++) {
- if ((i % 5) == 0) {
- printf ("\n ");
- }
- printf (" %08lX%s", info->start[i],
- info->protect[i] ? " (RO)" : " ");
- }
- printf ("\n");
-
-Done:
- return;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t * info, int s_first, int s_last)
-{
- int flag, prot, sect;
- ulong start, now, last;
-
- DEBUGF ("Erase flash bank %d sect %d ... %d\n",
- info - &flash_info[0], s_first, s_last);
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- if ((info->flash_id & FLASH_VENDMASK) !=
- (FLASH_MAN_INTEL & FLASH_VENDMASK)) {
- printf ("Can erase only Intel flash types - aborted\n");
- return 1;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n", prot);
- } else {
- printf ("\n");
- }
-
- start = get_timer (0);
- last = start;
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- vu_long *addr = (vu_long *) (info->start[sect]);
-
- DEBUGF ("Erase sect %d @ 0x%08lX\n",
- sect, (ulong) addr);
-
- /* Disable interrupts which might cause a timeout
- * here.
- */
- flag = disable_interrupts ();
-
- addr[0] = 0x00500050; /* clear status register */
- addr[0] = 0x00200020; /* erase setup */
- addr[0] = 0x00D000D0; /* erase confirm */
-
- addr[1] = 0x00500050; /* clear status register */
- addr[1] = 0x00200020; /* erase setup */
- addr[1] = 0x00D000D0; /* erase confirm */
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts ();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- while (((addr[0] & 0x00800080) != 0x00800080) ||
- ((addr[1] & 0x00800080) != 0x00800080)) {
- if ((now = get_timer (start)) >
- CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- addr[0] = 0x00B000B0; /* suspend erase */
- addr[0] = 0x00FF00FF; /* to read mode */
- return 1;
- }
-
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- }
-
- addr[0] = 0x00FF00FF;
- }
- }
- printf (" done\n");
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- * 4 - Flash not identified
- */
-
-#define FLASH_WIDTH 8 /* flash bus width in bytes */
-
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- ulong wp, cp, msr;
- int l, rc, i;
- ulong data[2];
- ulong *datah = &data[0];
- ulong *datal = &data[1];
-
- DEBUGF ("Flash write_buff: @ 0x%08lx, src 0x%08lx len %ld\n",
- addr, (ulong) src, cnt);
-
- if (info->flash_id == FLASH_UNKNOWN) {
- return 4;
- }
-
- msr = get_msr ();
- set_msr (msr | MSR_FP);
-
- wp = (addr & ~(FLASH_WIDTH - 1)); /* get lower aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- *datah = *datal = 0;
-
- for (i = 0, cp = wp; i < l; i++, cp++) {
- if (i >= 4) {
- *datah = (*datah << 8) |
- ((*datal & 0xFF000000) >> 24);
- }
-
- *datal = (*datal << 8) | (*(uchar *) cp);
- }
- for (; i < FLASH_WIDTH && cnt > 0; ++i) {
- char tmp = *src++;
-
- if (i >= 4) {
- *datah = (*datah << 8) |
- ((*datal & 0xFF000000) >> 24);
- }
-
- *datal = (*datal << 8) | tmp;
- --cnt;
- ++cp;
- }
-
- for (; cnt == 0 && i < FLASH_WIDTH; ++i, ++cp) {
- if (i >= 4) {
- *datah = (*datah << 8) |
- ((*datal & 0xFF000000) >> 24);
- }
-
- *datal = (*datah << 8) | (*(uchar *) cp);
- }
-
- if ((rc = write_data (info, wp, data)) != 0) {
- set_msr (msr);
- return (rc);
- }
-
- wp += FLASH_WIDTH;
- }
-
- /*
- * handle FLASH_WIDTH aligned part
- */
- while (cnt >= FLASH_WIDTH) {
- *datah = *(ulong *) src;
- *datal = *(ulong *) (src + 4);
- if ((rc = write_data (info, wp, data)) != 0) {
- set_msr (msr);
- return (rc);
- }
- wp += FLASH_WIDTH;
- cnt -= FLASH_WIDTH;
- src += FLASH_WIDTH;
- }
-
- if (cnt == 0) {
- set_msr (msr);
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- *datah = *datal = 0;
- for (i = 0, cp = wp; i < FLASH_WIDTH && cnt > 0; ++i, ++cp) {
- char tmp = *src++;
-
- if (i >= 4) {
- *datah = (*datah << 8) | ((*datal & 0xFF000000) >>
- 24);
- }
-
- *datal = (*datal << 8) | tmp;
- --cnt;
- }
-
- for (; i < FLASH_WIDTH; ++i, ++cp) {
- if (i >= 4) {
- *datah = (*datah << 8) | ((*datal & 0xFF000000) >>
- 24);
- }
-
- *datal = (*datal << 8) | (*(uchar *) cp);
- }
-
- rc = write_data (info, wp, data);
- set_msr (msr);
-
- return (rc);
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_data (flash_info_t * info, ulong dest, ulong * data)
-{
- vu_long *addr = (vu_long *) dest;
- ulong start;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if (((addr[0] & data[0]) != data[0]) ||
- ((addr[1] & data[1]) != data[1])) {
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
-
- addr[0] = 0x00400040; /* write setup */
- write_via_fpu (addr, data);
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts ();
-
- start = get_timer (0);
-
- while (((addr[0] & 0x00800080) != 0x00800080) ||
- ((addr[1] & 0x00800080) != 0x00800080)) {
- if (get_timer (start) > CFG_FLASH_WRITE_TOUT) {
- addr[0] = 0x00FF00FF; /* restore read mode */
- return (1);
- }
- }
-
- addr[0] = 0x00FF00FF; /* restore read mode */
-
- return (0);
-}
-
-/*-----------------------------------------------------------------------
- */
-static void write_via_fpu (vu_long * addr, ulong * data)
-{
- __asm__ __volatile__ ("lfd 1, 0(%0)"::"r" (data));
- __asm__ __volatile__ ("stfd 1, 0(%0)"::"r" (addr));
-}
-
-/*-----------------------------------------------------------------------
- */
-static __inline__ unsigned long get_msr (void)
-{
- unsigned long msr;
-
- __asm__ __volatile__ ("mfmsr %0":"=r" (msr):);
-
- return msr;
-}
-
-static __inline__ void set_msr (unsigned long msr)
-{
- __asm__ __volatile__ ("mtmsr %0"::"r" (msr));
-}
diff --git a/board/cpc45/pd67290.c b/board/cpc45/pd67290.c
deleted file mode 100644
index c84fbae918..0000000000
--- a/board/cpc45/pd67290.c
+++ /dev/null
@@ -1,68 +0,0 @@
-/* pd67290.c - system configuration module for SPD67290
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- * (C) 2004 DENX Software Engineering, Heiko Schocher <hs@denx.de>
- */
-
-#include <common.h>
-#include <malloc.h>
-#include <net.h>
-#include <asm/io.h>
-#include <pci.h>
-
-/* imports */
-#include <mpc824x.h>
-
-static struct pci_device_id supported[] = {
- {PCI_VENDOR_ID_CIRRUS, PCI_DEVICE_ID_CIRRUS_6729},
- {}
-};
-
-/***************************************************************************
-*
-* SPD67290Init -
-*
-* RETURNS: -1 on error, 0 if OK
-*/
-
-int SPD67290Init (void)
-{
- pci_dev_t devno;
- int idx = 0; /* general index */
- ulong membaseCsr; /* base address of device memory space */
-
- /* find PD67290 device */
- if ((devno = pci_find_devices (supported, idx++)) < 0) {
- printf ("No PD67290 device found !!\n");
- return -1;
- }
- /* - 0xfe000000 see MPC 8245 Users Manual Adress Map B */
- membaseCsr = PCMCIA_IO_BASE - 0xfe000000;
-
- /* set base address */
- pci_write_config_dword (devno, PCI_BASE_ADDRESS_0, membaseCsr);
-
- /* enable mapped memory and IO addresses */
- pci_write_config_dword (devno,
- PCI_COMMAND,
- PCI_COMMAND_MEMORY |
- PCI_COMMAND_IO | PCI_COMMAND_WAIT);
- return 0;
-}
diff --git a/board/cpc45/plx9030.c b/board/cpc45/plx9030.c
deleted file mode 100644
index 99ec39af7a..0000000000
--- a/board/cpc45/plx9030.c
+++ /dev/null
@@ -1,173 +0,0 @@
-/* Plx9030.c - system configuration module for PLX9030 PCI to Local Bus Bridge */
-/*
- * (C) Copyright 2002-2003
- * Josef Wagner, MicroSys GmbH, wagner@microsys.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- * Date Modification by
- * ------- ---------------------------------------------- ---
- * 30sep02 converted from VxWorks to LINUX wa
-*/
-
-
-/*
-DESCRIPTION
-
-This is the configuration module for the PLX9030 PCI to Local Bus Bridge.
-It configures the Chip select lines for SRAM (CS0), ST16C552 (CS1,CS2), Display and local
-registers (CS3) on CPC45.
-*/
-
-/* includes */
-
-#include <common.h>
-#include <malloc.h>
-#include <net.h>
-#include <asm/io.h>
-#include <pci.h>
-
-/* imports */
-
-
-/* defines */
-#define PLX9030_VENDOR_ID 0x10B5
-#define PLX9030_DEVICE_ID 0x9030
-
-#undef PLX_DEBUG
-
-/* PLX9030 register offsets */
-#define P9030_LAS0RR 0x00
-#define P9030_LAS1RR 0x04
-#define P9030_LAS2RR 0x08
-#define P9030_LAS3RR 0x0c
-#define P9030_EROMRR 0x10
-#define P9030_LAS0BA 0x14
-#define P9030_LAS1BA 0x18
-#define P9030_LAS2BA 0x1c
-#define P9030_LAS3BA 0x20
-#define P9030_EROMBA 0x24
-#define P9030_LAS0BRD 0x28
-#define P9030_LAS1BRD 0x2c
-#define P9030_LAS2BRD 0x30
-#define P9030_LAS3BRD 0x34
-#define P9030_EROMBRD 0x38
-#define P9030_CS0BASE 0x3C
-#define P9030_CS1BASE 0x40
-#define P9030_CS2BASE 0x44
-#define P9030_CS3BASE 0x48
-#define P9030_INTCSR 0x4c
-#define P9030_CNTRL 0x50
-#define P9030_GPIOC 0x54
-
-/* typedefs */
-
-
-/* locals */
-
-static struct pci_device_id supported[] = {
- { PLX9030_VENDOR_ID, PLX9030_DEVICE_ID },
- { }
-};
-
-/* forward declarations */
-void sysOutLong(ulong address, ulong value);
-
-
-/***************************************************************************
-*
-* Plx9030Init - init CS0..CS3 for CPC45
-*
-*
-* RETURNS: N/A
-*/
-
-void Plx9030Init (void)
-{
- pci_dev_t devno;
- ulong membaseCsr; /* base address of device memory space */
- int idx = 0; /* general index */
-
-
- /* find plx9030 device */
-
- if ((devno = pci_find_devices(supported, idx++)) < 0)
- {
- printf("No PLX9030 device found !!\n");
- return;
- }
-
-
-#ifdef PLX_DEBUG
- printf("PLX 9030 device found ! devno = 0x%x\n",devno);
-#endif
-
- membaseCsr = PCI_PLX9030_MEMADDR;
-
- /* set base address */
- pci_write_config_dword(devno, PCI_BASE_ADDRESS_0, membaseCsr);
-
- /* enable mapped memory and IO addresses */
- pci_write_config_dword(devno,
- PCI_COMMAND,
- PCI_COMMAND_MEMORY |
- PCI_COMMAND_MASTER);
-
-
- /* configure GBIOC */
- sysOutLong((membaseCsr + P9030_GPIOC), 0x00000FC0); /* CS2/CS3 enable */
-
- /* configure CS0 (SRAM) */
- sysOutLong((membaseCsr + P9030_LAS0BA), 0x00000001); /* enable space base */
- sysOutLong((membaseCsr + P9030_LAS0RR), 0x0FE00000); /* 2 MByte */
- sysOutLong((membaseCsr + P9030_LAS0BRD), 0x51928900); /* 4 wait states */
- sysOutLong((membaseCsr + P9030_CS0BASE), 0x00100001); /* enable 2 MByte */
- /* remap CS0 (SRAM) */
- pci_write_config_dword(devno, PCI_BASE_ADDRESS_2, SRAM_BASE);
-
- /* configure CS1 (ST16552 / CHAN A) */
- sysOutLong((membaseCsr + P9030_LAS1BA), 0x00400001); /* enable space base */
- sysOutLong((membaseCsr + P9030_LAS1RR), 0x0FFFFF00); /* 256 byte */
- sysOutLong((membaseCsr + P9030_LAS1BRD), 0x55122900); /* 4 wait states */
- sysOutLong((membaseCsr + P9030_CS1BASE), 0x00400081); /* enable 256 Byte */
- /* remap CS1 (ST16552 / CHAN A) */
- /* remap CS1 (ST16552 / CHAN A) */
- pci_write_config_dword(devno, PCI_BASE_ADDRESS_3, ST16552_A_BASE);
-
- /* configure CS2 (ST16552 / CHAN B) */
- sysOutLong((membaseCsr + P9030_LAS2BA), 0x00800001); /* enable space base */
- sysOutLong((membaseCsr + P9030_LAS2RR), 0x0FFFFF00); /* 256 byte */
- sysOutLong((membaseCsr + P9030_LAS2BRD), 0x55122900); /* 4 wait states */
- sysOutLong((membaseCsr + P9030_CS2BASE), 0x00800081); /* enable 256 Byte */
- /* remap CS2 (ST16552 / CHAN B) */
- pci_write_config_dword(devno, PCI_BASE_ADDRESS_4, ST16552_B_BASE);
-
- /* configure CS3 (BCSR) */
- sysOutLong((membaseCsr + P9030_LAS3BA), 0x00C00001); /* enable space base */
- sysOutLong((membaseCsr + P9030_LAS3RR), 0x0FFFFF00); /* 256 byte */
- sysOutLong((membaseCsr + P9030_LAS3BRD), 0x55357A80); /* 9 wait states */
- sysOutLong((membaseCsr + P9030_CS3BASE), 0x00C00081); /* enable 256 Byte */
- /* remap CS3 (DISPLAY and BCSR) */
- pci_write_config_dword(devno, PCI_BASE_ADDRESS_5, BCSR_BASE);
-}
-
-void sysOutLong(ulong address, ulong value)
-{
- *(ulong*)address = cpu_to_le32(value);
-}
diff --git a/board/cpc45/u-boot.lds b/board/cpc45/u-boot.lds
deleted file mode 100644
index 9ea26aa265..0000000000
--- a/board/cpc45/u-boot.lds
+++ /dev/null
@@ -1,136 +0,0 @@
-/*
- * (C) Copyright 2001-2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc824x/start.o (.text)
- lib_ppc/board.o (.text)
- lib_ppc/ppcstring.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
- lib_generic/zlib.o (.text)
-
- . = DEFINED(env_offset) ? env_offset : .;
- common/environment.o (.text)
-
- *(.text)
-
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
-
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/cpu86/Makefile b/board/cpu86/Makefile
deleted file mode 100644
index 7a2014d466..0000000000
--- a/board/cpu86/Makefile
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/cpu86/config.mk b/board/cpu86/config.mk
deleted file mode 100644
index 00354c46bd..0000000000
--- a/board/cpu86/config.mk
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# CPU86 boards
-#
-
-# This should be equal to the CFG_FLASH_BASE define in config_CPU86.h
-# for the "final" configuration, with U-Boot in flash, or the address
-# in RAM where U-Boot is loaded at for debugging.
-#
-
-ifeq ($(CONFIG_BOOT_ROM),y)
- TEXT_BASE := 0xFF800000
- PLATFORM_CPPFLAGS += -DCONFIG_BOOT_ROM
-else
- TEXT_BASE := 0xFF000000
-endif
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)
diff --git a/board/cpu86/cpu86.c b/board/cpu86/cpu86.c
deleted file mode 100644
index 3eb5b35426..0000000000
--- a/board/cpu86/cpu86.c
+++ /dev/null
@@ -1,321 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <ioports.h>
-#include <mpc8260.h>
-#include "cpu86.h"
-
-/*
- * I/O Port configuration table
- *
- * if conf is 1, then that port pin will be configured at boot time
- * according to the five values podr/pdir/ppar/psor/pdat for that entry
- */
-
-const iop_conf_t iop_conf_tab[4][32] = {
-
- /* Port A configuration */
- { /* conf ppar psor pdir podr pdat */
- /* PA31 */ { 1, 1, 1, 0, 0, 0 }, /* FCC1 MII COL */
- /* PA30 */ { 1, 1, 1, 0, 0, 0 }, /* FCC1 MII CRS */
- /* PA29 */ { 1, 1, 1, 1, 0, 0 }, /* FCC1 MII TX_ER */
- /* PA28 */ { 1, 1, 1, 1, 0, 0 }, /* FCC1 MII TX_EN */
- /* PA27 */ { 1, 1, 1, 0, 0, 0 }, /* FCC1 MII RX_DV */
- /* PA26 */ { 1, 1, 1, 0, 0, 0 }, /* FCC1 MII RX_ER */
- /* PA25 */ { 1, 0, 0, 1, 0, 0 }, /* FCC2 MII MDIO */
- /* PA24 */ { 1, 0, 0, 1, 0, 0 }, /* FCC2 MII MDC */
- /* PA23 */ { 1, 0, 0, 1, 0, 0 }, /* FCC1 MII MDIO */
- /* PA22 */ { 1, 0, 0, 1, 0, 0 }, /* FCC1 MII MDC */
- /* PA21 */ { 1, 1, 0, 1, 0, 0 }, /* FCC1 MII TxD[3] */
- /* PA20 */ { 1, 1, 0, 1, 0, 0 }, /* FCC1 MII TxD[2] */
- /* PA19 */ { 1, 1, 0, 1, 0, 0 }, /* FCC1 MII TxD[1] */
- /* PA18 */ { 1, 1, 0, 1, 0, 0 }, /* FCC1 MII TxD[0] */
- /* PA17 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 MII RxD[0] */
- /* PA16 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 MII RxD[1] */
- /* PA15 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 MII RxD[2] */
- /* PA14 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 MII RxD[3] */
- /* PA13 */ { 1, 0, 0, 1, 0, 0 }, /* FCC2 MII TXSL1 */
- /* PA12 */ { 1, 0, 0, 1, 0, 1 }, /* FCC2 MII TXSL0 */
- /* PA11 */ { 1, 0, 0, 1, 0, 0 }, /* FCC1 MII TXSL1 */
- /* PA10 */ { 1, 0, 0, 1, 0, 1 }, /* FCC1 MII TXSL0 */
- /* PA9 */ { 0, 1, 0, 1, 0, 0 }, /* SMC2 TXD */
- /* PA8 */ { 0, 1, 0, 0, 0, 0 }, /* SMC2 RXD */
- /* PA7 */ { 0, 0, 0, 0, 0, 0 }, /* PA7 */
- /* PA6 */ { 1, 0, 0, 1, 0, 1 }, /* FCC2 MII PAUSE */
- /* PA5 */ { 1, 0, 0, 1, 0, 1 }, /* FCC1 MII PAUSE */
- /* PA4 */ { 1, 0, 0, 1, 0, 0 }, /* FCC2 MII PWRDN */
- /* PA3 */ { 1, 0, 0, 1, 0, 0 }, /* FCC1 MII PWRDN */
- /* PA2 */ { 0, 0, 0, 0, 0, 0 }, /* PA2 */
- /* PA1 */ { 1, 0, 0, 0, 0, 0 }, /* FCC2 MII MDINT */
- /* PA0 */ { 1, 0, 0, 1, 0, 0 } /* FCC1 MII MDINT */
- },
-
- /* Port B configuration */
- { /* conf ppar psor pdir podr pdat */
- /* PB31 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TX_ER */
- /* PB30 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_DV */
- /* PB29 */ { 1, 1, 1, 1, 0, 0 }, /* FCC2 MII TX_EN */
- /* PB28 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_ER */
- /* PB27 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII COL */
- /* PB26 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII CRS */
- /* PB25 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[3] */
- /* PB24 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[2] */
- /* PB23 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[1] */
- /* PB22 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[0] */
- /* PB21 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[0] */
- /* PB20 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[1] */
- /* PB19 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[2] */
- /* PB18 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[3] */
- /* PB17 */ { 0, 0, 0, 0, 0, 0 }, /* PB17 */
- /* PB16 */ { 0, 0, 0, 0, 0, 0 }, /* PB16 */
- /* PB15 */ { 0, 0, 0, 0, 0, 0 }, /* PB15 */
- /* PB14 */ { 0, 0, 0, 0, 0, 0 }, /* PB14 */
- /* PB13 */ { 0, 0, 0, 0, 0, 0 }, /* PB13 */
- /* PB12 */ { 0, 0, 0, 0, 0, 0 }, /* PB12 */
- /* PB11 */ { 0, 0, 0, 0, 0, 0 }, /* PB11 */
- /* PB10 */ { 0, 0, 0, 0, 0, 0 }, /* PB10 */
- /* PB9 */ { 0, 0, 0, 0, 0, 0 }, /* PB9 */
- /* PB8 */ { 0, 0, 0, 0, 0, 0 }, /* PB8 */
- /* PB7 */ { 0, 0, 0, 0, 0, 0 }, /* PB7 */
- /* PB6 */ { 0, 0, 0, 0, 0, 0 }, /* PB6 */
- /* PB5 */ { 0, 0, 0, 0, 0, 0 }, /* PB5 */
- /* PB4 */ { 0, 0, 0, 0, 0, 0 }, /* PB4 */
- /* PB3 */ { 0, 0, 0, 0, 0, 0 }, /* PB3 */
- /* PB2 */ { 0, 0, 0, 0, 0, 0 }, /* PB2 */
- /* PB1 */ { 0, 0, 0, 0, 0, 0 }, /* PB1 */
- /* PB0 */ { 0, 0, 0, 0, 0, 0 } /* PB0 */
- },
-
- /* Port C */
- { /* conf ppar psor pdir podr pdat */
- /* PC31 */ { 0, 0, 0, 0, 0, 0 }, /* PC31 */
- /* PC30 */ { 0, 0, 0, 0, 0, 0 }, /* PC30 */
- /* PC29 */ { 1, 0, 0, 0, 0, 0 }, /* SCC1 CTS */
- /* PC28 */ { 1, 0, 0, 0, 0, 0 }, /* SCC2 CTS */
- /* PC27 */ { 0, 0, 0, 0, 0, 0 }, /* PC27 */
- /* PC26 */ { 0, 0, 0, 0, 0, 0 }, /* PC26 */
- /* PC25 */ { 0, 0, 0, 0, 0, 0 }, /* PC25 */
- /* PC24 */ { 0, 0, 0, 0, 0, 0 }, /* PC24 */
- /* PC23 */ { 0, 0, 0, 0, 0, 0 }, /* FDC37C78 DACFD */
- /* PC22 */ { 0, 0, 0, 0, 0, 0 }, /* FDC37C78 DNFD */
- /* PC21 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 MII RX_CLK */
- /* PC20 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 MII TX_CLK */
- /* PC19 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_CLK */
- /* PC18 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII TX_CLK */
- /* PC17 */ { 0, 0, 0, 0, 0, 0 }, /* PC17 */
- /* PC16 */ { 0, 0, 0, 0, 0, 0 }, /* PC16 */
- /* PC15 */ { 0, 0, 0, 0, 0, 0 }, /* PC15 */
- /* PC14 */ { 0, 0, 0, 0, 0, 0 }, /* PC14 */
- /* PC13 */ { 0, 0, 0, 0, 0, 0 }, /* PC13 */
- /* PC12 */ { 0, 0, 0, 0, 0, 0 }, /* PC12 */
- /* PC11 */ { 0, 0, 0, 0, 0, 0 }, /* PC11 */
- /* PC10 */ { 0, 0, 0, 0, 0, 0 }, /* PC10 */
- /* PC9 */ { 0, 0, 0, 0, 0, 0 }, /* FC9 */
- /* PC8 */ { 0, 0, 0, 0, 0, 0 }, /* PC8 */
- /* PC7 */ { 0, 0, 0, 0, 0, 0 }, /* PC7 */
- /* PC6 */ { 0, 0, 0, 0, 0, 0 }, /* PC6 */
- /* PC5 */ { 0, 0, 0, 0, 0, 0 }, /* PC5 */
- /* PC4 */ { 0, 0, 0, 0, 0, 0 }, /* PC4 */
- /* PC3 */ { 0, 0, 0, 0, 0, 0 }, /* PC3 */
- /* PC2 */ { 0, 0, 0, 0, 0, 0 }, /* PC2 */
- /* PC1 */ { 0, 0, 0, 0, 0, 0 }, /* PC1 */
- /* PC0 */ { 0, 0, 0, 0, 0, 0 }, /* FDC37C78 DRQFD */
- },
-
- /* Port D */
- { /* conf ppar psor pdir podr pdat */
- /* PD31 */ { 1, 1, 0, 0, 0, 0 }, /* SCC1 RXD */
- /* PD30 */ { 1, 1, 1, 1, 0, 0 }, /* SCC1 TXD */
- /* PD29 */ { 1, 0, 0, 1, 0, 0 }, /* SCC1 RTS */
- /* PD28 */ { 1, 1, 0, 0, 0, 0 }, /* SCC2 RXD */
- /* PD27 */ { 1, 1, 0, 1, 0, 0 }, /* SCC2 TXD */
- /* PD26 */ { 1, 0, 0, 1, 0, 0 }, /* SCC2 RTS */
- /* PD25 */ { 0, 0, 0, 0, 0, 0 }, /* PD25 */
- /* PD24 */ { 0, 0, 0, 0, 0, 0 }, /* PD24 */
- /* PD23 */ { 0, 0, 0, 0, 0, 0 }, /* PD23 */
- /* PD22 */ { 0, 0, 0, 0, 0, 0 }, /* PD22 */
- /* PD21 */ { 0, 0, 0, 0, 0, 0 }, /* PD21 */
- /* PD20 */ { 0, 0, 0, 0, 0, 0 }, /* PD20 */
- /* PD19 */ { 0, 0, 0, 0, 0, 0 }, /* PD19 */
- /* PD18 */ { 0, 0, 0, 0, 0, 0 }, /* PD18 */
- /* PD17 */ { 0, 0, 0, 0, 0, 0 }, /* PD17 */
- /* PD16 */ { 0, 0, 0, 0, 0, 0 }, /* PD16 */
-#if defined(CONFIG_SOFT_I2C)
- /* PD15 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SDA */
- /* PD14 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SCL */
-#else
-#if defined(CONFIG_HARD_I2C)
- /* PD15 */ { 1, 1, 1, 0, 1, 0 }, /* I2C SDA */
- /* PD14 */ { 1, 1, 1, 0, 1, 0 }, /* I2C SCL */
-#else /* normal I/O port pins */
- /* PD15 */ { 1, 1, 1, 0, 1, 0 }, /* I2C SDA */
- /* PD14 */ { 1, 1, 1, 0, 1, 0 }, /* I2C SCL */
-#endif
-#endif
- /* PD13 */ { 0, 0, 0, 0, 0, 0 }, /* PD13 */
- /* PD12 */ { 0, 0, 0, 0, 0, 0 }, /* PD12 */
- /* PD11 */ { 0, 0, 0, 0, 0, 0 }, /* PD11 */
- /* PD10 */ { 0, 0, 0, 0, 0, 0 }, /* PD10 */
- /* PD9 */ { 1, 1, 0, 1, 0, 0 }, /* SMC1 TXD */
- /* PD8 */ { 1, 1, 0, 0, 0, 0 }, /* SMC1 RXD */
- /* PD7 */ { 0, 0, 0, 0, 0, 0 }, /* PD7 */
- /* PD6 */ { 0, 0, 0, 0, 0, 0 }, /* PD6 */
- /* PD5 */ { 0, 0, 0, 0, 0, 0 }, /* PD5 */
- /* PD4 */ { 0, 0, 0, 0, 0, 0 }, /* PD4 */
- /* PD3 */ { 0, 0, 0, 0, 0, 0 }, /* PD3 */
- /* PD2 */ { 0, 0, 0, 0, 0, 0 }, /* PD2 */
- /* PD1 */ { 0, 0, 0, 0, 0, 0 }, /* PD1 */
- /* PD0 */ { 0, 0, 0, 0, 0, 0 } /* PD0 */
- }
-};
-
-/* ------------------------------------------------------------------------- */
-
-/* Check Board Identity:
- */
-int checkboard (void)
-{
- printf ("Board: CPU86 (Rev %02x)\n", CPU86_REV);
- return 0;
-}
-
-/* ------------------------------------------------------------------------- */
-
-/* Try SDRAM initialization with P/LSDMR=sdmr and ORx=orx
- *
- * This routine performs standard 8260 initialization sequence
- * and calculates the available memory size. It may be called
- * several times to try different SDRAM configurations on both
- * 60x and local buses.
- */
-static long int try_init (volatile memctl8260_t * memctl, ulong sdmr,
- ulong orx, volatile uchar * base)
-{
- volatile uchar c = 0xff;
- volatile uint *sdmr_ptr;
- volatile uint *orx_ptr;
- ulong maxsize, size;
- int i;
-
- /* We must be able to test a location outsize the maximum legal size
- * to find out THAT we are outside; but this address still has to be
- * mapped by the controller. That means, that the initial mapping has
- * to be (at least) twice as large as the maximum expected size.
- */
- maxsize = (1 + (~orx | 0x7fff)) / 2;
-
- /* Since CFG_SDRAM_BASE is always 0 (??), we assume that
- * we are configuring CS1 if base != 0
- */
- sdmr_ptr = &memctl->memc_psdmr;
- orx_ptr = &memctl->memc_or2;
-
- *orx_ptr = orx;
-
- /*
- * Quote from 8260 UM (10.4.2 SDRAM Power-On Initialization, 10-35):
- *
- * "At system reset, initialization software must set up the
- * programmable parameters in the memory controller banks registers
- * (ORx, BRx, P/LSDMR). After all memory parameters are configured,
- * system software should execute the following initialization sequence
- * for each SDRAM device.
- *
- * 1. Issue a PRECHARGE-ALL-BANKS command
- * 2. Issue eight CBR REFRESH commands
- * 3. Issue a MODE-SET command to initialize the mode register
- *
- * The initial commands are executed by setting P/LSDMR[OP] and
- * accessing the SDRAM with a single-byte transaction."
- *
- * The appropriate BRx/ORx registers have already been set when we
- * get here. The SDRAM can be accessed at the address CFG_SDRAM_BASE.
- */
-
- *sdmr_ptr = sdmr | PSDMR_OP_PREA;
- *base = c;
-
- *sdmr_ptr = sdmr | PSDMR_OP_CBRR;
- for (i = 0; i < 8; i++)
- *base = c;
-
- *sdmr_ptr = sdmr | PSDMR_OP_MRW;
- *(base + CFG_MRS_OFFS) = c; /* setting MR on address lines */
-
- *sdmr_ptr = sdmr | PSDMR_OP_NORM | PSDMR_RFEN;
- *base = c;
-
- size = get_ram_size((long *)base, maxsize);
-
- *orx_ptr = orx | ~(size - 1);
-
- return (size);
-}
-
-long int initdram (int board_type)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8260_t *memctl = &immap->im_memctl;
-
-#ifndef CFG_RAMBOOT
- ulong size8, size9;
-#endif
- long psize;
-
- psize = 32 * 1024 * 1024;
-
- memctl->memc_mptpr = CFG_MPTPR;
- memctl->memc_psrt = CFG_PSRT;
-
-#ifndef CFG_RAMBOOT
- /* 60x SDRAM setup:
- */
- size8 = try_init (memctl, CFG_PSDMR_8COL, CFG_OR2_8COL,
- (uchar *) CFG_SDRAM_BASE);
- size9 = try_init (memctl, CFG_PSDMR_9COL, CFG_OR2_9COL,
- (uchar *) CFG_SDRAM_BASE);
-
- if (size8 < size9) {
- psize = size9;
- printf ("(60x:9COL) ");
- } else {
- psize = try_init (memctl, CFG_PSDMR_8COL, CFG_OR2_8COL,
- (uchar *) CFG_SDRAM_BASE);
- printf ("(60x:8COL) ");
- }
-
-#endif /* CFG_RAMBOOT */
-
- icache_enable ();
-
- return (psize);
-}
-
-#if (CONFIG_COMMANDS & CFG_CMD_DOC)
-extern void doc_probe (ulong physadr);
-void doc_init (void)
-{
- doc_probe (CFG_DOC_BASE);
-}
-#endif
diff --git a/board/cpu86/cpu86.h b/board/cpu86/cpu86.h
deleted file mode 100644
index cf7852cefd..0000000000
--- a/board/cpu86/cpu86.h
+++ /dev/null
@@ -1,27 +0,0 @@
-#ifndef __BOARD_CPU86__
-#define __BOARD_CPU86__
-
-#include <config.h>
-
-#define REG8(x) (*(volatile unsigned char *)(x))
-
-/* CPU86 register definitions */
-#define CPU86_VME_EAC REG8(CFG_BCRS_BASE + 0x00)
-#define CPU86_VME_SAC REG8(CFG_BCRS_BASE + 0x01)
-#define CPU86_VME_MAC REG8(CFG_BCRS_BASE + 0x02)
-#define CPU86_BCR REG8(CFG_BCRS_BASE + 0x03)
-#define CPU86_BSR REG8(CFG_BCRS_BASE + 0x04)
-#define CPU86_WDOG_RPORT REG8(CFG_BCRS_BASE + 0x05)
-#define CPU86_MBOX_IRQ REG8(CFG_BCRS_BASE + 0x04)
-#define CPU86_REV REG8(CFG_BCRS_BASE + 0x07)
-#define CPU86_VME_IRQMASK REG8(CFG_BCRS_BASE + 0x80)
-#define CPU86_VME_IRQSTATUS REG8(CFG_BCRS_BASE + 0x81)
-#define CPU86_LOCAL_IRQMASK REG8(CFG_BCRS_BASE + 0x82)
-#define CPU86_LOCAL_IRQSTATUS REG8(CFG_BCRS_BASE + 0x83)
-#define CPU86_PMCL_IRQSTATUS REG8(CFG_BCRS_BASE + 0x84)
-
-/* Board Control Register bits */
-#define CPU86_BCR_FWPT 0x01
-#define CPU86_BCR_FWRE 0x02
-
-#endif /* __BOARD_CPU86__ */
diff --git a/board/cpu86/flash.c b/board/cpu86/flash.c
deleted file mode 100644
index 1535a6b48f..0000000000
--- a/board/cpu86/flash.c
+++ /dev/null
@@ -1,615 +0,0 @@
-/*
- * (C) Copyright 2001, 2002
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * Flash Routines for Intel devices
- *
- *--------------------------------------------------------------------
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-#include "cpu86.h"
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
-
-/*-----------------------------------------------------------------------
- */
-ulong flash_int_get_size (volatile unsigned long *baseaddr,
- flash_info_t * info)
-{
- short i;
- unsigned long flashtest_h, flashtest_l;
-
- info->sector_count = info->size = 0;
- info->flash_id = FLASH_UNKNOWN;
-
- /* Write identify command sequence and test FLASH answer
- */
- baseaddr[0] = 0x00900090;
- baseaddr[1] = 0x00900090;
-
- flashtest_h = baseaddr[0]; /* manufacturer ID */
- flashtest_l = baseaddr[1];
-
- if (flashtest_h != INTEL_MANUFACT || flashtest_l != INTEL_MANUFACT)
- return (0); /* no or unknown flash */
-
- flashtest_h = baseaddr[2]; /* device ID */
- flashtest_l = baseaddr[3];
-
- if (flashtest_h != flashtest_l)
- return (0);
-
- switch (flashtest_h) {
- case INTEL_ID_28F160C3B:
- info->flash_id = FLASH_28F160C3B;
- info->sector_count = 39;
- info->size = 0x00800000; /* 4 * 2 MB = 8 MB */
- break;
- case INTEL_ID_28F160F3B:
- info->flash_id = FLASH_28F160F3B;
- info->sector_count = 39;
- info->size = 0x00800000; /* 4 * 2 MB = 8 MB */
- break;
- default:
- return (0); /* no or unknown flash */
- }
-
- info->flash_id |= INTEL_MANUFACT << 16; /* set manufacturer offset */
-
- if (info->flash_id & FLASH_BTYPE) {
- volatile unsigned long *tmp = baseaddr;
-
- /* set up sector start adress table (bottom sector type)
- * AND unlock the sectors (if our chip is 160C3)
- */
- for (i = 0; i < info->sector_count; i++) {
- if ((info->flash_id & FLASH_TYPEMASK) == FLASH_28F160C3B) {
- tmp[0] = 0x00600060;
- tmp[1] = 0x00600060;
- tmp[0] = 0x00D000D0;
- tmp[1] = 0x00D000D0;
- }
- info->start[i] = (uint) tmp;
- tmp += i < 8 ? 0x2000 : 0x10000; /* pointer arith */
- }
- }
-
- memset (info->protect, 0, info->sector_count);
-
- baseaddr[0] = 0x00FF00FF;
- baseaddr[1] = 0x00FF00FF;
-
- return (info->size);
-}
-
-static ulong flash_amd_get_size (vu_char *addr, flash_info_t *info)
-{
- short i;
- uchar vendor, devid;
- ulong base = (ulong)addr;
-
- /* Write auto select command: read Manufacturer ID */
- addr[0x0555] = 0xAA;
- addr[0x02AA] = 0x55;
- addr[0x0555] = 0x90;
-
- udelay(1000);
-
- vendor = addr[0];
- devid = addr[1] & 0xff;
-
- /* only support AMD */
- if (vendor != 0x01) {
- return 0;
- }
-
- vendor &= 0xf;
- devid &= 0xff;
-
- if (devid == AMD_ID_F040B) {
- info->flash_id = vendor << 16 | devid;
- info->sector_count = 8;
- info->size = info->sector_count * 0x10000;
- }
- else if (devid == AMD_ID_F080B) {
- info->flash_id = vendor << 16 | devid;
- info->sector_count = 16;
- info->size = 4 * info->sector_count * 0x10000;
- }
- else if (devid == AMD_ID_F016D) {
- info->flash_id = vendor << 16 | devid;
- info->sector_count = 32;
- info->size = 4 * info->sector_count * 0x10000;
- }
- else {
- printf ("## Unknown Flash Type: %02x\n", devid);
- return 0;
- }
-
- /* check for protected sectors */
- for (i = 0; i < info->sector_count; i++) {
- /* sector base address */
- info->start[i] = base + i * (info->size / info->sector_count);
- /* read sector protection at sector address, (A7 .. A0) = 0x02 */
- /* D0 = 1 if protected */
- addr = (volatile unsigned char *)(info->start[i]);
- info->protect[i] = addr[2] & 1;
- }
-
- /*
- * Prevent writes to uninitialized FLASH.
- */
- if (info->flash_id != FLASH_UNKNOWN) {
- addr = (vu_char *)info->start[0];
- addr[0] = 0xF0; /* reset bank */
- }
-
- return (info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-unsigned long flash_init (void)
-{
- unsigned long size_b0 = 0;
- unsigned long size_b1 = 0;
- int i;
-
- /* Init: no FLASHes known
- */
- for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* Disable flash protection */
- CPU86_BCR |= (CPU86_BCR_FWPT | CPU86_BCR_FWRE);
-
- /* Static FLASH Bank configuration here (only one bank) */
-
- size_b0 = flash_int_get_size ((ulong *) CFG_FLASH_BASE, &flash_info[0]);
- size_b1 = flash_amd_get_size ((uchar *) CFG_BOOTROM_BASE, &flash_info[1]);
-
- if (size_b0 > 0 || size_b1 > 0) {
-
- printf("(");
-
- if (size_b0 > 0) {
- puts ("Bank#1 - ");
- print_size (size_b0, (size_b1 > 0) ? ", " : ") ");
- }
-
- if (size_b1 > 0) {
- puts ("Bank#2 - ");
- print_size (size_b1, ") ");
- }
- }
- else {
- printf ("## No FLASH found.\n");
- return 0;
- }
- /* protect monitor and environment sectors
- */
-
-#if CFG_MONITOR_BASE >= CFG_BOOTROM_BASE
- if (size_b1) {
- /* If U-Boot is booted from ROM the CFG_MONITOR_BASE > CFG_FLASH_BASE
- * but we shouldn't protect it.
- */
-
- flash_protect (FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE + monitor_flash_len - 1, &flash_info[1]
- );
- }
-#else
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
- flash_protect (FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE + monitor_flash_len - 1, &flash_info[0]
- );
-#endif
-#endif
-
-#if (CFG_ENV_IS_IN_FLASH == 1) && defined(CFG_ENV_ADDR)
-# ifndef CFG_ENV_SIZE
-# define CFG_ENV_SIZE CFG_ENV_SECT_SIZE
-# endif
-# if CFG_ENV_ADDR >= CFG_BOOTROM_BASE
- if (size_b1) {
- flash_protect (FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[1]);
- }
-# else
- flash_protect (FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0]);
-# endif
-#endif
-
- return (size_b0 + size_b1);
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t * info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch ((info->flash_id >> 16) & 0xff) {
- case 0x89:
- printf ("INTEL ");
- break;
- case 0x1:
- printf ("AMD ");
- break;
- default:
- printf ("Unknown Vendor ");
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_28F160C3B:
- printf ("28F160C3B (16 Mbit, bottom sector)\n");
- break;
- case FLASH_28F160F3B:
- printf ("28F160F3B (16 Mbit, bottom sector)\n");
- break;
- case AMD_ID_F040B:
- printf ("AM29F040B (4 Mbit)\n");
- break;
- default:
- printf ("Unknown Chip Type\n");
- break;
- }
-
- if (info->size < 0x100000)
- printf (" Size: %ld KB in %d Sectors\n",
- info->size >> 10, info->sector_count);
- else
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " "
- );
- }
- printf ("\n");
-}
-
-/*-----------------------------------------------------------------------
- */
-int flash_erase (flash_info_t * info, int s_first, int s_last)
-{
- vu_char *addr = (vu_char *)(info->start[0]);
- int flag, prot, sect, l_sect;
- ulong start, now, last;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect])
- prot++;
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- /* Check the type of erased flash
- */
- if (info->flash_id >> 16 == 0x1) {
- /* Erase AMD flash
- */
- l_sect = -1;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[0x0555] = 0xAA;
- addr[0x02AA] = 0x55;
- addr[0x0555] = 0x80;
- addr[0x0555] = 0xAA;
- addr[0x02AA] = 0x55;
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr = (vu_char *)(info->start[sect]);
- addr[0] = 0x30;
- l_sect = sect;
- }
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- /*
- * We wait for the last triggered sector
- */
- if (l_sect < 0)
- goto AMD_DONE;
-
- start = get_timer (0);
- last = start;
- addr = (vu_char *)(info->start[l_sect]);
- while ((addr[0] & 0x80) != 0x80) {
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- return 1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- serial_putc ('.');
- last = now;
- }
- }
-
-AMD_DONE:
- /* reset to read mode */
- addr = (volatile unsigned char *)info->start[0];
- addr[0] = 0xF0; /* reset bank */
-
- } else {
- /* Erase Intel flash
- */
-
- /* Start erase on unprotected sectors
- */
- for (sect = s_first; sect <= s_last; sect++) {
- volatile ulong *addr =
- (volatile unsigned long *) info->start[sect];
-
- start = get_timer (0);
- last = start;
- if (info->protect[sect] == 0) {
- /* Disable interrupts which might cause a timeout here
- */
- flag = disable_interrupts ();
-
- /* Erase the block
- */
- addr[0] = 0x00200020;
- addr[1] = 0x00200020;
- addr[0] = 0x00D000D0;
- addr[1] = 0x00D000D0;
-
- /* re-enable interrupts if necessary
- */
- if (flag)
- enable_interrupts ();
-
- /* wait at least 80us - let's wait 1 ms
- */
- udelay (1000);
-
- last = start;
- while ((addr[0] & 0x00800080) != 0x00800080 ||
- (addr[1] & 0x00800080) != 0x00800080) {
- if ((now = get_timer (start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout (erase suspended!)\n");
- /* Suspend erase
- */
- addr[0] = 0x00B000B0;
- addr[1] = 0x00B000B0;
- goto DONE;
- }
- /* show that we're waiting
- */
- if ((now - last) > 1000) { /* every second */
- serial_putc ('.');
- last = now;
- }
- }
- if (addr[0] & 0x00220022 || addr[1] & 0x00220022) {
- printf ("*** ERROR: erase failed!\n");
- goto DONE;
- }
- }
- /* Clear status register and reset to read mode
- */
- addr[0] = 0x00500050;
- addr[1] = 0x00500050;
- addr[0] = 0x00FF00FF;
- addr[1] = 0x00FF00FF;
- }
- }
-
- printf (" done\n");
-
-DONE:
- return 0;
-}
-
-static int write_word (flash_info_t *, volatile unsigned long *, ulong);
-static int write_byte (flash_info_t *info, ulong dest, uchar data);
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- ulong v;
- int i, l, rc, cc = cnt, res = 0;
-
- if (info->flash_id >> 16 == 0x1) {
-
- /* Write to AMD 8-bit flash
- */
- while (cnt > 0) {
- if ((rc = write_byte(info, addr, *src)) != 0) {
- return (rc);
- }
- addr++;
- src++;
- cnt--;
- }
-
- return (0);
- } else {
-
- /* Write to Intel 64-bit flash
- */
- for (v=0; cc > 0; addr += 4, cc -= 4 - l) {
- l = (addr & 3);
- addr &= ~3;
-
- for (i = 0; i < 4; i++) {
- v = (v << 8) + (i < l || i - l >= cc ?
- *((unsigned char *) addr + i) : *src++);
- }
-
- if ((res = write_word (info, (volatile unsigned long *) addr, v)) != 0)
- break;
- }
- }
-
- return (res);
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word (flash_info_t * info, volatile unsigned long *addr,
- ulong data)
-{
- int flag, res = 0;
- ulong start;
-
- /* Check if Flash is (sufficiently) erased
- */
- if ((*addr & data) != data)
- return (2);
-
- /* Disable interrupts which might cause a timeout here
- */
- flag = disable_interrupts ();
-
- *addr = 0x00400040;
- *addr = data;
-
- /* re-enable interrupts if necessary
- */
- if (flag)
- enable_interrupts ();
-
- start = get_timer (0);
- while ((*addr & 0x00800080) != 0x00800080) {
- if (get_timer (start) > CFG_FLASH_WRITE_TOUT) {
- /* Suspend program
- */
- *addr = 0x00B000B0;
- res = 1;
- goto OUT;
- }
- }
-
- if (*addr & 0x00220022) {
- printf ("*** ERROR: program failed!\n");
- res = 1;
- }
-
-OUT:
- /* Clear status register and reset to read mode
- */
- *addr = 0x00500050;
- *addr = 0x00FF00FF;
-
- return (res);
-}
-
-/*-----------------------------------------------------------------------
- * Write a byte to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_byte (flash_info_t *info, ulong dest, uchar data)
-{
- vu_char *addr = (vu_char *)(info->start[0]);
- ulong start;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*((vu_char *)dest) & data) != data) {
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[0x0555] = 0xAA;
- addr[0x02AA] = 0x55;
- addr[0x0555] = 0xA0;
-
- *((vu_char *)dest) = data;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* data polling for D7 */
- start = get_timer (0);
- while ((*((vu_char *)dest) & 0x80) != (data & 0x80)) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- return (1);
- }
- }
- return (0);
-}
-
-/*-----------------------------------------------------------------------
- */
diff --git a/board/cpu86/u-boot.lds b/board/cpu86/u-boot.lds
deleted file mode 100644
index 05f29c6ed0..0000000000
--- a/board/cpu86/u-boot.lds
+++ /dev/null
@@ -1,126 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc8260/start.o (.text)
- *(.text)
- common/environment.o(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/cpu87/Makefile b/board/cpu87/Makefile
deleted file mode 100644
index 26f53ede42..0000000000
--- a/board/cpu87/Makefile
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# (C) Copyright 2001-2005
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/cpu87/config.mk b/board/cpu87/config.mk
deleted file mode 100644
index 6384c78397..0000000000
--- a/board/cpu87/config.mk
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# (C) Copyright 2001-2005
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# CPU87 board
-#
-
-# This should be equal to the CFG_FLASH_BASE define in configs/cpu87.h
-# for the "final" configuration, with U-Boot in flash, or the address
-# in RAM where U-Boot is loaded at for debugging.
-#
-
-ifeq ($(CONFIG_BOOT_ROM),y)
- TEXT_BASE := 0xFF800000
- PLATFORM_CPPFLAGS += -DCONFIG_BOOT_ROM
-else
- TEXT_BASE := 0xFF000000
-endif
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)
diff --git a/board/cpu87/cpu87.c b/board/cpu87/cpu87.c
deleted file mode 100644
index 8363d868fc..0000000000
--- a/board/cpu87/cpu87.c
+++ /dev/null
@@ -1,333 +0,0 @@
-/*
- * (C) Copyright 2001-2005
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <ioports.h>
-#include <mpc8260.h>
-#include "cpu87.h"
-#include <pci.h>
-
-/*
- * I/O Port configuration table
- *
- * if conf is 1, then that port pin will be configured at boot time
- * according to the five values podr/pdir/ppar/psor/pdat for that entry
- */
-
-const iop_conf_t iop_conf_tab[4][32] = {
-
- /* Port A configuration */
- { /* conf ppar psor pdir podr pdat */
- /* PA31 */ { 1, 1, 1, 0, 0, 0 }, /* FCC1 MII COL */
- /* PA30 */ { 1, 1, 1, 0, 0, 0 }, /* FCC1 MII CRS */
- /* PA29 */ { 1, 1, 1, 1, 0, 0 }, /* FCC1 MII TX_ER */
- /* PA28 */ { 1, 1, 1, 1, 0, 0 }, /* FCC1 MII TX_EN */
- /* PA27 */ { 1, 1, 1, 0, 0, 0 }, /* FCC1 MII RX_DV */
- /* PA26 */ { 1, 1, 1, 0, 0, 0 }, /* FCC1 MII RX_ER */
- /* PA25 */ { 1, 0, 0, 1, 0, 0 }, /* FCC2 MII MDIO */
- /* PA24 */ { 1, 0, 0, 1, 0, 0 }, /* FCC2 MII MDC */
- /* PA23 */ { 1, 0, 0, 1, 0, 0 }, /* FCC1 MII MDIO */
- /* PA22 */ { 1, 0, 0, 1, 0, 0 }, /* FCC1 MII MDC */
- /* PA21 */ { 1, 1, 0, 1, 0, 0 }, /* FCC1 MII TxD[3] */
- /* PA20 */ { 1, 1, 0, 1, 0, 0 }, /* FCC1 MII TxD[2] */
- /* PA19 */ { 1, 1, 0, 1, 0, 0 }, /* FCC1 MII TxD[1] */
- /* PA18 */ { 1, 1, 0, 1, 0, 0 }, /* FCC1 MII TxD[0] */
- /* PA17 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 MII RxD[0] */
- /* PA16 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 MII RxD[1] */
- /* PA15 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 MII RxD[2] */
- /* PA14 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 MII RxD[3] */
- /* PA13 */ { 1, 0, 0, 1, 0, 0 }, /* FCC2 MII TXSL1 */
- /* PA12 */ { 1, 0, 0, 1, 0, 1 }, /* FCC2 MII TXSL0 */
- /* PA11 */ { 1, 0, 0, 1, 0, 0 }, /* FCC1 MII TXSL1 */
- /* PA10 */ { 1, 0, 0, 1, 0, 1 }, /* FCC1 MII TXSL0 */
- /* PA9 */ { 0, 1, 0, 1, 0, 0 }, /* SMC2 TXD */
- /* PA8 */ { 0, 1, 0, 0, 0, 0 }, /* SMC2 RXD */
- /* PA7 */ { 0, 0, 0, 0, 0, 0 }, /* PA7 */
- /* PA6 */ { 1, 0, 0, 1, 0, 1 }, /* FCC2 MII PAUSE */
- /* PA5 */ { 1, 0, 0, 1, 0, 1 }, /* FCC1 MII PAUSE */
- /* PA4 */ { 1, 0, 0, 1, 0, 0 }, /* FCC2 MII PWRDN */
- /* PA3 */ { 1, 0, 0, 1, 0, 0 }, /* FCC1 MII PWRDN */
- /* PA2 */ { 0, 0, 0, 0, 0, 0 }, /* PA2 */
- /* PA1 */ { 1, 0, 0, 0, 0, 0 }, /* FCC2 MII MDINT */
- /* PA0 */ { 1, 0, 0, 1, 0, 0 } /* FCC1 MII MDINT */
- },
-
- /* Port B configuration */
- { /* conf ppar psor pdir podr pdat */
- /* PB31 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TX_ER */
- /* PB30 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_DV */
- /* PB29 */ { 1, 1, 1, 1, 0, 0 }, /* FCC2 MII TX_EN */
- /* PB28 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_ER */
- /* PB27 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII COL */
- /* PB26 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII CRS */
- /* PB25 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[3] */
- /* PB24 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[2] */
- /* PB23 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[1] */
- /* PB22 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[0] */
- /* PB21 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[0] */
- /* PB20 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[1] */
- /* PB19 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[2] */
- /* PB18 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[3] */
- /* PB17 */ { 0, 0, 0, 0, 0, 0 }, /* PB17 */
- /* PB16 */ { 0, 0, 0, 0, 0, 0 }, /* PB16 */
- /* PB15 */ { 0, 0, 0, 0, 0, 0 }, /* PB15 */
- /* PB14 */ { 0, 0, 0, 0, 0, 0 }, /* PB14 */
- /* PB13 */ { 0, 0, 0, 0, 0, 0 }, /* PB13 */
- /* PB12 */ { 0, 0, 0, 0, 0, 0 }, /* PB12 */
- /* PB11 */ { 0, 0, 0, 0, 0, 0 }, /* PB11 */
- /* PB10 */ { 0, 0, 0, 0, 0, 0 }, /* PB10 */
- /* PB9 */ { 0, 0, 0, 0, 0, 0 }, /* PB9 */
- /* PB8 */ { 0, 0, 0, 0, 0, 0 }, /* PB8 */
- /* PB7 */ { 0, 0, 0, 0, 0, 0 }, /* PB7 */
- /* PB6 */ { 0, 0, 0, 0, 0, 0 }, /* PB6 */
- /* PB5 */ { 0, 0, 0, 0, 0, 0 }, /* PB5 */
- /* PB4 */ { 0, 0, 0, 0, 0, 0 }, /* PB4 */
- /* PB3 */ { 0, 0, 0, 0, 0, 0 }, /* PB3 */
- /* PB2 */ { 0, 0, 0, 0, 0, 0 }, /* PB2 */
- /* PB1 */ { 0, 0, 0, 0, 0, 0 }, /* PB1 */
- /* PB0 */ { 0, 0, 0, 0, 0, 0 } /* PB0 */
- },
-
- /* Port C */
- { /* conf ppar psor pdir podr pdat */
- /* PC31 */ { 0, 0, 0, 0, 0, 0 }, /* PC31 */
- /* PC30 */ { 0, 0, 0, 0, 0, 0 }, /* PC30 */
- /* PC29 */ { 1, 0, 0, 0, 0, 0 }, /* SCC1 CTS */
- /* PC28 */ { 1, 0, 0, 0, 0, 0 }, /* SCC2 CTS */
- /* PC27 */ { 0, 0, 0, 0, 0, 0 }, /* PC27 */
- /* PC26 */ { 0, 0, 0, 0, 0, 0 }, /* PC26 */
- /* PC25 */ { 0, 0, 0, 0, 0, 0 }, /* PC25 */
- /* PC24 */ { 0, 0, 0, 0, 0, 0 }, /* PC24 */
- /* PC23 */ { 0, 0, 0, 0, 0, 0 }, /* FDC37C78 DACFD */
- /* PC22 */ { 0, 0, 0, 0, 0, 0 }, /* FDC37C78 DNFD */
- /* PC21 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 MII RX_CLK */
- /* PC20 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 MII TX_CLK */
- /* PC19 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_CLK */
- /* PC18 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII TX_CLK */
- /* PC17 */ { 0, 0, 0, 0, 0, 0 }, /* PC17 */
- /* PC16 */ { 0, 0, 0, 0, 0, 0 }, /* PC16 */
- /* PC15 */ { 0, 0, 0, 0, 0, 0 }, /* PC15 */
- /* PC14 */ { 0, 0, 0, 0, 0, 0 }, /* PC14 */
- /* PC13 */ { 0, 0, 0, 0, 0, 0 }, /* PC13 */
- /* PC12 */ { 0, 0, 0, 0, 0, 0 }, /* PC12 */
- /* PC11 */ { 0, 0, 0, 0, 0, 0 }, /* PC11 */
- /* PC10 */ { 0, 0, 0, 0, 0, 0 }, /* PC10 */
- /* PC9 */ { 0, 0, 0, 0, 0, 0 }, /* FC9 */
- /* PC8 */ { 0, 0, 0, 0, 0, 0 }, /* PC8 */
- /* PC7 */ { 0, 0, 0, 0, 0, 0 }, /* PC7 */
- /* PC6 */ { 0, 0, 0, 0, 0, 0 }, /* PC6 */
- /* PC5 */ { 0, 0, 0, 0, 0, 0 }, /* PC5 */
- /* PC4 */ { 0, 0, 0, 0, 0, 0 }, /* PC4 */
- /* PC3 */ { 0, 0, 0, 0, 0, 0 }, /* PC3 */
- /* PC2 */ { 0, 0, 0, 0, 0, 0 }, /* PC2 */
- /* PC1 */ { 0, 0, 0, 0, 0, 0 }, /* PC1 */
- /* PC0 */ { 0, 0, 0, 0, 0, 0 }, /* FDC37C78 DRQFD */
- },
-
- /* Port D */
- { /* conf ppar psor pdir podr pdat */
- /* PD31 */ { 1, 1, 0, 0, 0, 0 }, /* SCC1 RXD */
- /* PD30 */ { 1, 1, 1, 1, 0, 0 }, /* SCC1 TXD */
- /* PD29 */ { 1, 0, 0, 1, 0, 0 }, /* SCC1 RTS */
- /* PD28 */ { 1, 1, 0, 0, 0, 0 }, /* SCC2 RXD */
- /* PD27 */ { 1, 1, 0, 1, 0, 0 }, /* SCC2 TXD */
- /* PD26 */ { 1, 0, 0, 1, 0, 0 }, /* SCC2 RTS */
- /* PD25 */ { 0, 0, 0, 0, 0, 0 }, /* PD25 */
- /* PD24 */ { 0, 0, 0, 0, 0, 0 }, /* PD24 */
- /* PD23 */ { 0, 0, 0, 0, 0, 0 }, /* PD23 */
- /* PD22 */ { 0, 0, 0, 0, 0, 0 }, /* PD22 */
- /* PD21 */ { 0, 0, 0, 0, 0, 0 }, /* PD21 */
- /* PD20 */ { 0, 0, 0, 0, 0, 0 }, /* PD20 */
- /* PD19 */ { 0, 0, 0, 0, 0, 0 }, /* PD19 */
- /* PD18 */ { 0, 0, 0, 0, 0, 0 }, /* PD18 */
- /* PD17 */ { 0, 0, 0, 0, 0, 0 }, /* PD17 */
- /* PD16 */ { 0, 0, 0, 0, 0, 0 }, /* PD16 */
-#if defined(CONFIG_SOFT_I2C)
- /* PD15 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SDA */
- /* PD14 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SCL */
-#else
-#if defined(CONFIG_HARD_I2C)
- /* PD15 */ { 1, 1, 1, 0, 1, 0 }, /* I2C SDA */
- /* PD14 */ { 1, 1, 1, 0, 1, 0 }, /* I2C SCL */
-#else /* normal I/O port pins */
- /* PD15 */ { 1, 1, 1, 0, 1, 0 }, /* I2C SDA */
- /* PD14 */ { 1, 1, 1, 0, 1, 0 }, /* I2C SCL */
-#endif
-#endif
- /* PD13 */ { 0, 0, 0, 0, 0, 0 }, /* PD13 */
- /* PD12 */ { 0, 0, 0, 0, 0, 0 }, /* PD12 */
- /* PD11 */ { 0, 0, 0, 0, 0, 0 }, /* PD11 */
- /* PD10 */ { 0, 0, 0, 0, 0, 0 }, /* PD10 */
- /* PD9 */ { 1, 1, 0, 1, 0, 0 }, /* SMC1 TXD */
- /* PD8 */ { 1, 1, 0, 0, 0, 0 }, /* SMC1 RXD */
- /* PD7 */ { 0, 0, 0, 0, 0, 0 }, /* PD7 */
- /* PD6 */ { 0, 0, 0, 0, 0, 0 }, /* PD6 */
- /* PD5 */ { 0, 0, 0, 0, 0, 0 }, /* PD5 */
- /* PD4 */ { 0, 0, 0, 0, 0, 0 }, /* PD4 */
- /* PD3 */ { 0, 0, 0, 0, 0, 0 }, /* PD3 */
- /* PD2 */ { 0, 0, 0, 0, 0, 0 }, /* PD2 */
- /* PD1 */ { 0, 0, 0, 0, 0, 0 }, /* PD1 */
- /* PD0 */ { 0, 0, 0, 0, 0, 0 } /* PD0 */
- }
-};
-
-/* ------------------------------------------------------------------------- */
-
-/* Check Board Identity:
- */
-int checkboard (void)
-{
- printf ("Board: CPU87 (Rev %02x)\n", CPU86_REV);
- return 0;
-}
-
-/* ------------------------------------------------------------------------- */
-
-/* Try SDRAM initialization with P/LSDMR=sdmr and ORx=orx
- *
- * This routine performs standard 8260 initialization sequence
- * and calculates the available memory size. It may be called
- * several times to try different SDRAM configurations on both
- * 60x and local buses.
- */
-static long int try_init (volatile memctl8260_t * memctl, ulong sdmr,
- ulong orx, volatile uchar * base)
-{
- volatile uchar c = 0xff;
- volatile uint *sdmr_ptr;
- volatile uint *orx_ptr;
- ulong maxsize, size;
- int i;
-
- /* We must be able to test a location outsize the maximum legal size
- * to find out THAT we are outside; but this address still has to be
- * mapped by the controller. That means, that the initial mapping has
- * to be (at least) twice as large as the maximum expected size.
- */
- maxsize = (1 + (~orx | 0x7fff)) / 2;
-
- /* Since CFG_SDRAM_BASE is always 0 (??), we assume that
- * we are configuring CS1 if base != 0
- */
- sdmr_ptr = &memctl->memc_psdmr;
- orx_ptr = &memctl->memc_or2;
-
- *orx_ptr = orx;
-
- /*
- * Quote from 8260 UM (10.4.2 SDRAM Power-On Initialization, 10-35):
- *
- * "At system reset, initialization software must set up the
- * programmable parameters in the memory controller banks registers
- * (ORx, BRx, P/LSDMR). After all memory parameters are configured,
- * system software should execute the following initialization sequence
- * for each SDRAM device.
- *
- * 1. Issue a PRECHARGE-ALL-BANKS command
- * 2. Issue eight CBR REFRESH commands
- * 3. Issue a MODE-SET command to initialize the mode register
- *
- * The initial commands are executed by setting P/LSDMR[OP] and
- * accessing the SDRAM with a single-byte transaction."
- *
- * The appropriate BRx/ORx registers have already been set when we
- * get here. The SDRAM can be accessed at the address CFG_SDRAM_BASE.
- */
-
- *sdmr_ptr = sdmr | PSDMR_OP_PREA;
- *base = c;
-
- *sdmr_ptr = sdmr | PSDMR_OP_CBRR;
- for (i = 0; i < 8; i++)
- *base = c;
-
- *sdmr_ptr = sdmr | PSDMR_OP_MRW;
- *(base + CFG_MRS_OFFS) = c; /* setting MR on address lines */
-
- *sdmr_ptr = sdmr | PSDMR_OP_NORM | PSDMR_RFEN;
- *base = c;
-
- size = get_ram_size((long *)base, maxsize);
-
- *orx_ptr = orx | ~(size - 1);
-
- return (size);
-}
-
-long int initdram (int board_type)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8260_t *memctl = &immap->im_memctl;
-
-#ifndef CFG_RAMBOOT
- ulong size8, size9;
-#endif
- long psize;
-
- psize = 32 * 1024 * 1024;
-
- memctl->memc_mptpr = CFG_MPTPR;
- memctl->memc_psrt = CFG_PSRT;
-
-#ifndef CFG_RAMBOOT
- /* 60x SDRAM setup:
- */
- size8 = try_init (memctl, CFG_PSDMR_8COL, CFG_OR2_8COL,
- (uchar *) CFG_SDRAM_BASE);
- size9 = try_init (memctl, CFG_PSDMR_9COL, CFG_OR2_9COL,
- (uchar *) CFG_SDRAM_BASE);
-
- if (size8 < size9) {
- psize = size9;
- printf ("(60x:9COL) ");
- } else {
- psize = try_init (memctl, CFG_PSDMR_8COL, CFG_OR2_8COL,
- (uchar *) CFG_SDRAM_BASE);
- printf ("(60x:8COL) ");
- }
-
-#endif /* CFG_RAMBOOT */
-
- icache_enable ();
-
- return (psize);
-}
-
-#if (CONFIG_COMMANDS & CFG_CMD_DOC)
-extern void doc_probe (ulong physadr);
-void doc_init (void)
-{
- doc_probe (CFG_DOC_BASE);
-}
-#endif
-
-#ifdef CONFIG_PCI
-struct pci_controller hose;
-
-extern void pci_mpc8250_init(struct pci_controller *);
-
-void pci_init_board(void)
-{
- pci_mpc8250_init(&hose);
-}
-#endif
diff --git a/board/cpu87/cpu87.h b/board/cpu87/cpu87.h
deleted file mode 100644
index 5dbd4ae07d..0000000000
--- a/board/cpu87/cpu87.h
+++ /dev/null
@@ -1,27 +0,0 @@
-#ifndef __BOARD_CPU87__
-#define __BOARD_CPU87__
-
-#include <config.h>
-
-#define REG8(x) (*(volatile unsigned char *)(x))
-
-/* CPU86 register definitions */
-#define CPU86_VME_EAC REG8(CFG_BCRS_BASE + 0x00)
-#define CPU86_VME_SAC REG8(CFG_BCRS_BASE + 0x01)
-#define CPU86_VME_MAC REG8(CFG_BCRS_BASE + 0x02)
-#define CPU86_BCR REG8(CFG_BCRS_BASE + 0x03)
-#define CPU86_BSR REG8(CFG_BCRS_BASE + 0x04)
-#define CPU86_WDOG_RPORT REG8(CFG_BCRS_BASE + 0x05)
-#define CPU86_MBOX_IRQ REG8(CFG_BCRS_BASE + 0x04)
-#define CPU86_REV REG8(CFG_BCRS_BASE + 0x07)
-#define CPU86_VME_IRQMASK REG8(CFG_BCRS_BASE + 0x80)
-#define CPU86_VME_IRQSTATUS REG8(CFG_BCRS_BASE + 0x81)
-#define CPU86_LOCAL_IRQMASK REG8(CFG_BCRS_BASE + 0x82)
-#define CPU86_LOCAL_IRQSTATUS REG8(CFG_BCRS_BASE + 0x83)
-#define CPU86_PMCL_IRQSTATUS REG8(CFG_BCRS_BASE + 0x84)
-
-/* Board Control Register bits */
-#define CPU86_BCR_FWPT 0x01
-#define CPU86_BCR_FWRE 0x02
-
-#endif /* __BOARD_CPU87__ */
diff --git a/board/cpu87/flash.c b/board/cpu87/flash.c
deleted file mode 100644
index 076c2f9192..0000000000
--- a/board/cpu87/flash.c
+++ /dev/null
@@ -1,624 +0,0 @@
-/*
- * (C) Copyright 2001-2005
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * Flash Routines for Intel devices
- *
- *--------------------------------------------------------------------
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-#include "cpu87.h"
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
-
-/*-----------------------------------------------------------------------
- */
-ulong flash_int_get_size (volatile unsigned long *baseaddr,
- flash_info_t * info)
-{
- short i;
- unsigned long flashtest_h, flashtest_l;
-
- info->sector_count = info->size = 0;
- info->flash_id = FLASH_UNKNOWN;
-
- /* Write identify command sequence and test FLASH answer
- */
- baseaddr[0] = 0x00900090;
- baseaddr[1] = 0x00900090;
-
- flashtest_h = baseaddr[0]; /* manufacturer ID */
- flashtest_l = baseaddr[1];
-
- if (flashtest_h != INTEL_MANUFACT || flashtest_l != INTEL_MANUFACT)
- return (0); /* no or unknown flash */
-
- flashtest_h = baseaddr[2]; /* device ID */
- flashtest_l = baseaddr[3];
-
- if (flashtest_h != flashtest_l)
- return (0);
-
- switch (flashtest_h) {
- case INTEL_ID_28F160C3B:
- info->flash_id = FLASH_28F160C3B;
- info->sector_count = 39;
- info->size = 0x00800000; /* 4 * 2 MB = 8 MB */
- break;
- case INTEL_ID_28F160F3B:
- info->flash_id = FLASH_28F160F3B;
- info->sector_count = 39;
- info->size = 0x00800000; /* 4 * 2 MB = 8 MB */
- break;
- case INTEL_ID_28F640C3B:
- info->flash_id = FLASH_28F640C3B;
- info->sector_count = 135;
- info->size = 0x02000000; /* 16 * 2 MB = 32 MB */
- break;
- default:
- return (0); /* no or unknown flash */
- }
-
- info->flash_id |= INTEL_MANUFACT << 16; /* set manufacturer offset */
-
- if (info->flash_id & FLASH_BTYPE) {
- volatile unsigned long *tmp = baseaddr;
-
- /* set up sector start adress table (bottom sector type)
- * AND unlock the sectors (if our chip is 160C3)
- */
- for (i = 0; i < info->sector_count; i++) {
- if (((info->flash_id & FLASH_TYPEMASK) == FLASH_28F160C3B) ||
- ((info->flash_id & FLASH_TYPEMASK) == FLASH_28F640C3B)) {
- tmp[0] = 0x00600060;
- tmp[1] = 0x00600060;
- tmp[0] = 0x00D000D0;
- tmp[1] = 0x00D000D0;
- }
- info->start[i] = (uint) tmp;
- tmp += i < 8 ? 0x2000 : 0x10000; /* pointer arith */
- }
- }
-
- memset (info->protect, 0, info->sector_count);
-
- baseaddr[0] = 0x00FF00FF;
- baseaddr[1] = 0x00FF00FF;
-
- return (info->size);
-}
-
-static ulong flash_amd_get_size (vu_char *addr, flash_info_t *info)
-{
- short i;
- uchar vendor, devid;
- ulong base = (ulong)addr;
-
- /* Write auto select command: read Manufacturer ID */
- addr[0x0555] = 0xAA;
- addr[0x02AA] = 0x55;
- addr[0x0555] = 0x90;
-
- udelay(1000);
-
- vendor = addr[0];
- devid = addr[1] & 0xff;
-
- /* only support AMD */
- if (vendor != 0x01) {
- return 0;
- }
-
- vendor &= 0xf;
- devid &= 0xff;
-
- if (devid == AMD_ID_F040B) {
- info->flash_id = vendor << 16 | devid;
- info->sector_count = 8;
- info->size = info->sector_count * 0x10000;
- }
- else if (devid == AMD_ID_F080B) {
- info->flash_id = vendor << 16 | devid;
- info->sector_count = 16;
- info->size = 4 * info->sector_count * 0x10000;
- }
- else if (devid == AMD_ID_F016D) {
- info->flash_id = vendor << 16 | devid;
- info->sector_count = 32;
- info->size = 4 * info->sector_count * 0x10000;
- }
- else {
- printf ("## Unknown Flash Type: %02x\n", devid);
- return 0;
- }
-
- /* check for protected sectors */
- for (i = 0; i < info->sector_count; i++) {
- /* sector base address */
- info->start[i] = base + i * (info->size / info->sector_count);
- /* read sector protection at sector address, (A7 .. A0) = 0x02 */
- /* D0 = 1 if protected */
- addr = (volatile unsigned char *)(info->start[i]);
- info->protect[i] = addr[2] & 1;
- }
-
- /*
- * Prevent writes to uninitialized FLASH.
- */
- if (info->flash_id != FLASH_UNKNOWN) {
- addr = (vu_char *)info->start[0];
- addr[0] = 0xF0; /* reset bank */
- }
-
- return (info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-unsigned long flash_init (void)
-{
- unsigned long size_b0 = 0;
- unsigned long size_b1 = 0;
- int i;
-
- /* Init: no FLASHes known
- */
- for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* Disable flash protection */
- CPU86_BCR |= (CPU86_BCR_FWPT | CPU86_BCR_FWRE);
-
- /* Static FLASH Bank configuration here (only one bank) */
-
- size_b0 = flash_int_get_size ((ulong *) CFG_FLASH_BASE, &flash_info[0]);
- size_b1 = flash_amd_get_size ((uchar *) CFG_BOOTROM_BASE, &flash_info[1]);
-
- if (size_b0 > 0 || size_b1 > 0) {
-
- printf("(");
-
- if (size_b0 > 0) {
- puts ("Bank#1 - ");
- print_size (size_b0, (size_b1 > 0) ? ", " : ") ");
- }
-
- if (size_b1 > 0) {
- puts ("Bank#2 - ");
- print_size (size_b1, ") ");
- }
- }
- else {
- printf ("## No FLASH found.\n");
- return 0;
- }
- /* protect monitor and environment sectors
- */
-
-#if CFG_MONITOR_BASE >= CFG_BOOTROM_BASE
- if (size_b1) {
- /* If U-Boot is booted from ROM the CFG_MONITOR_BASE > CFG_FLASH_BASE
- * but we shouldn't protect it.
- */
-
- flash_protect (FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE + monitor_flash_len - 1, &flash_info[1]
- );
- }
-#else
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
- flash_protect (FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE + monitor_flash_len - 1, &flash_info[0]
- );
-#endif
-#endif
-
-#if (CFG_ENV_IS_IN_FLASH == 1) && defined(CFG_ENV_ADDR)
-# ifndef CFG_ENV_SIZE
-# define CFG_ENV_SIZE CFG_ENV_SECT_SIZE
-# endif
-# if CFG_ENV_ADDR >= CFG_BOOTROM_BASE
- if (size_b1) {
- flash_protect (FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[1]);
- }
-# else
- flash_protect (FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0]);
-# endif
-#endif
-
- return (size_b0 + size_b1);
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t * info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch ((info->flash_id >> 16) & 0xff) {
- case 0x89:
- printf ("INTEL ");
- break;
- case 0x1:
- printf ("AMD ");
- break;
- default:
- printf ("Unknown Vendor ");
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_28F160C3B:
- printf ("28F160C3B (16 Mbit, bottom sector)\n");
- break;
- case FLASH_28F160F3B:
- printf ("28F160F3B (16 Mbit, bottom sector)\n");
- break;
- case FLASH_28F640C3B:
- printf ("28F640C3B (64 M, bottom sector)\n");
- break;
- case AMD_ID_F040B:
- printf ("AM29F040B (4 Mbit)\n");
- break;
- default:
- printf ("Unknown Chip Type\n");
- break;
- }
-
- if (info->size < 0x100000)
- printf (" Size: %ld KB in %d Sectors\n",
- info->size >> 10, info->sector_count);
- else
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " "
- );
- }
- printf ("\n");
-}
-
-/*-----------------------------------------------------------------------
- */
-int flash_erase (flash_info_t * info, int s_first, int s_last)
-{
- vu_char *addr = (vu_char *)(info->start[0]);
- int flag, prot, sect, l_sect;
- ulong start, now, last;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect])
- prot++;
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- /* Check the type of erased flash
- */
- if (info->flash_id >> 16 == 0x1) {
- /* Erase AMD flash
- */
- l_sect = -1;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[0x0555] = 0xAA;
- addr[0x02AA] = 0x55;
- addr[0x0555] = 0x80;
- addr[0x0555] = 0xAA;
- addr[0x02AA] = 0x55;
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr = (vu_char *)(info->start[sect]);
- addr[0] = 0x30;
- l_sect = sect;
- }
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- /*
- * We wait for the last triggered sector
- */
- if (l_sect < 0)
- goto AMD_DONE;
-
- start = get_timer (0);
- last = start;
- addr = (vu_char *)(info->start[l_sect]);
- while ((addr[0] & 0x80) != 0x80) {
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- return 1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- serial_putc ('.');
- last = now;
- }
- }
-
-AMD_DONE:
- /* reset to read mode */
- addr = (volatile unsigned char *)info->start[0];
- addr[0] = 0xF0; /* reset bank */
-
- } else {
- /* Erase Intel flash
- */
-
- /* Start erase on unprotected sectors
- */
- for (sect = s_first; sect <= s_last; sect++) {
- volatile ulong *addr =
- (volatile unsigned long *) info->start[sect];
-
- start = get_timer (0);
- last = start;
- if (info->protect[sect] == 0) {
- /* Disable interrupts which might cause a timeout here
- */
- flag = disable_interrupts ();
-
- /* Erase the block
- */
- addr[0] = 0x00200020;
- addr[1] = 0x00200020;
- addr[0] = 0x00D000D0;
- addr[1] = 0x00D000D0;
-
- /* re-enable interrupts if necessary
- */
- if (flag)
- enable_interrupts ();
-
- /* wait at least 80us - let's wait 1 ms
- */
- udelay (1000);
-
- last = start;
- while ((addr[0] & 0x00800080) != 0x00800080 ||
- (addr[1] & 0x00800080) != 0x00800080) {
- if ((now = get_timer (start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout (erase suspended!)\n");
- /* Suspend erase
- */
- addr[0] = 0x00B000B0;
- addr[1] = 0x00B000B0;
- goto DONE;
- }
- /* show that we're waiting
- */
- if ((now - last) > 1000) { /* every second */
- serial_putc ('.');
- last = now;
- }
- }
- if (addr[0] & 0x00220022 || addr[1] & 0x00220022) {
- printf ("*** ERROR: erase failed!\n");
- goto DONE;
- }
- }
- /* Clear status register and reset to read mode
- */
- addr[0] = 0x00500050;
- addr[1] = 0x00500050;
- addr[0] = 0x00FF00FF;
- addr[1] = 0x00FF00FF;
- }
- }
-
- printf (" done\n");
-
-DONE:
- return 0;
-}
-
-static int write_word (flash_info_t *, volatile unsigned long *, ulong);
-static int write_byte (flash_info_t *info, ulong dest, uchar data);
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- ulong v;
- int i, l, rc, cc = cnt, res = 0;
-
- if (info->flash_id >> 16 == 0x1) {
-
- /* Write to AMD 8-bit flash
- */
- while (cnt > 0) {
- if ((rc = write_byte(info, addr, *src)) != 0) {
- return (rc);
- }
- addr++;
- src++;
- cnt--;
- }
-
- return (0);
- } else {
-
- /* Write to Intel 64-bit flash
- */
- for (v=0; cc > 0; addr += 4, cc -= 4 - l) {
- l = (addr & 3);
- addr &= ~3;
-
- for (i = 0; i < 4; i++) {
- v = (v << 8) + (i < l || i - l >= cc ?
- *((unsigned char *) addr + i) : *src++);
- }
-
- if ((res = write_word (info, (volatile unsigned long *) addr, v)) != 0)
- break;
- }
- }
-
- return (res);
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word (flash_info_t * info, volatile unsigned long *addr,
- ulong data)
-{
- int flag, res = 0;
- ulong start;
-
- /* Check if Flash is (sufficiently) erased
- */
- if ((*addr & data) != data)
- return (2);
-
- /* Disable interrupts which might cause a timeout here
- */
- flag = disable_interrupts ();
-
- *addr = 0x00400040;
- *addr = data;
-
- /* re-enable interrupts if necessary
- */
- if (flag)
- enable_interrupts ();
-
- start = get_timer (0);
- while ((*addr & 0x00800080) != 0x00800080) {
- if (get_timer (start) > CFG_FLASH_WRITE_TOUT) {
- /* Suspend program
- */
- *addr = 0x00B000B0;
- res = 1;
- goto OUT;
- }
- }
-
- if (*addr & 0x00220022) {
- printf ("*** ERROR: program failed!\n");
- res = 1;
- }
-
-OUT:
- /* Clear status register and reset to read mode
- */
- *addr = 0x00500050;
- *addr = 0x00FF00FF;
-
- return (res);
-}
-
-/*-----------------------------------------------------------------------
- * Write a byte to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_byte (flash_info_t *info, ulong dest, uchar data)
-{
- vu_char *addr = (vu_char *)(info->start[0]);
- ulong start;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*((vu_char *)dest) & data) != data) {
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[0x0555] = 0xAA;
- addr[0x02AA] = 0x55;
- addr[0x0555] = 0xA0;
-
- *((vu_char *)dest) = data;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* data polling for D7 */
- start = get_timer (0);
- while ((*((vu_char *)dest) & 0x80) != (data & 0x80)) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- return (1);
- }
- }
- return (0);
-}
-
-/*-----------------------------------------------------------------------
- */
diff --git a/board/cpu87/u-boot.lds b/board/cpu87/u-boot.lds
deleted file mode 100644
index fb7e665b67..0000000000
--- a/board/cpu87/u-boot.lds
+++ /dev/null
@@ -1,126 +0,0 @@
-/*
- * (C) Copyright 2001-2005
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc8260/start.o (.text)
- *(.text)
- common/environment.o(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/cradle/Makefile b/board/cradle/Makefile
deleted file mode 100644
index 265d50043c..0000000000
--- a/board/cradle/Makefile
+++ /dev/null
@@ -1,47 +0,0 @@
-#
-# (C) Copyright 2000, 2002
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := cradle.o flash.o
-SOBJS := lowlevel_init.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS) $(SOBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/cradle/config.mk b/board/cradle/config.mk
deleted file mode 100644
index aa40388811..0000000000
--- a/board/cradle/config.mk
+++ /dev/null
@@ -1,2 +0,0 @@
-TEXT_BASE = 0xa0f80000
-#TEXT_BASE = 0
diff --git a/board/cradle/cradle.c b/board/cradle/cradle.c
deleted file mode 100644
index 6f65f32757..0000000000
--- a/board/cradle/cradle.c
+++ /dev/null
@@ -1,227 +0,0 @@
-/*
- * (C) Copyright 2002
- * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
- *
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <asm/arch/pxa-regs.h>
-#include <common.h>
-
-/* ------------------------------------------------------------------------- */
-
-
-/* local prototypes */
-void set_led (int led, int color);
-void error_code_halt (int code);
-int init_sio (int led, unsigned long base);
-inline void cradle_outb (unsigned short val, unsigned long base,
- unsigned long reg);
-inline unsigned char cradle_inb (unsigned long base, unsigned long reg);
-inline void sleep (int i);
-
-inline void
-/**********************************************************/
-sleep (int i)
-/**********************************************************/
-{
- while (i--) {
- udelay (1000000);
- }
-}
-
-void
-/**********************************************************/
-error_code_halt (int code)
-/**********************************************************/
-{
- while (1) {
- led_code (code, RED);
- sleep (1);
- led_code (0, OFF);
- sleep (1);
- }
-}
-
-void
-/**********************************************************/
-led_code (int code, int color)
-/**********************************************************/
-{
- int i;
-
- code &= 0xf; /* only 4 leds */
-
- for (i = 0; i < 4; i++) {
- if (code & (1 << i)) {
- set_led (i, color);
- } else {
- set_led (i, OFF);
- }
- }
-}
-
-void
-/**********************************************************/
-set_led (int led, int color)
-/**********************************************************/
-{
- int shift = led * 2;
- unsigned long mask = 0x3 << shift;
-
- CRADLE_LED_CLR_REG = mask; /* clear bits */
- CRADLE_LED_SET_REG = (color << shift); /* set bits */
- udelay (5000);
-}
-
-inline void
-/**********************************************************/
-cradle_outb (unsigned short val, unsigned long base, unsigned long reg)
-/**********************************************************/
-{
- *(volatile unsigned short *) (base + (reg * 2)) = val;
-}
-
-inline unsigned char
-/**********************************************************/
-cradle_inb (unsigned long base, unsigned long reg)
-/**********************************************************/
-{
- unsigned short val;
-
- val = *(volatile unsigned short *) (base + (reg * 2));
- return (val & 0xff);
-}
-
-int
-/**********************************************************/
-init_sio (int led, unsigned long base)
-/**********************************************************/
-{
- unsigned char val;
-
- set_led (led, YELLOW);
- val = cradle_inb (base, CRADLE_SIO_INDEX);
- val = cradle_inb (base, CRADLE_SIO_INDEX);
- if (val != 0) {
- set_led (led, RED);
- return -1;
- }
-
- /* map SCC2 to COM1 */
- cradle_outb (0x01, base, CRADLE_SIO_INDEX);
- cradle_outb (0x00, base, CRADLE_SIO_DATA);
-
- /* enable SCC2 extended regs */
- cradle_outb (0x40, base, CRADLE_SIO_INDEX);
- cradle_outb (0xa0, base, CRADLE_SIO_DATA);
-
- /* enable SCC2 clock multiplier */
- cradle_outb (0x51, base, CRADLE_SIO_INDEX);
- cradle_outb (0x04, base, CRADLE_SIO_DATA);
-
- /* enable SCC2 */
- cradle_outb (0x00, base, CRADLE_SIO_INDEX);
- cradle_outb (0x04, base, CRADLE_SIO_DATA);
-
- /* map SCC2 DMA to channel 0 */
- cradle_outb (0x4f, base, CRADLE_SIO_INDEX);
- cradle_outb (0x09, base, CRADLE_SIO_DATA);
-
- /* read ID from SIO to check operation */
- cradle_outb (0xe4, base, 0x3f8 + 0x3);
- val = cradle_inb (base, 0x3f8 + 0x0);
- if ((val & 0xf0) != 0x20) {
- set_led (led, RED);
- /* disable SCC2 */
- cradle_outb (0, base, CRADLE_SIO_INDEX);
- cradle_outb (0, base, CRADLE_SIO_DATA);
- return -1;
- }
- /* set back to bank 0 */
- cradle_outb (0, base, 0x3f8 + 0x3);
- set_led (led, GREEN);
- return 0;
-}
-
-/*
- * Miscelaneous platform dependent initialisations
- */
-
-int
-/**********************************************************/
-board_late_init (void)
-/**********************************************************/
-{
- return (0);
-}
-
-int
-/**********************************************************/
-board_init (void)
-/**********************************************************/
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- led_code (0xf, YELLOW);
-
- /* arch number of HHP Cradle */
- gd->bd->bi_arch_number = MACH_TYPE_HHP_CRADLE;
-
- /* adress of boot parameters */
- gd->bd->bi_boot_params = 0xa0000100;
-
- /* Init SIOs to enable SCC2 */
- udelay (100000); /* delay makes it look neat */
- init_sio (0, CRADLE_SIO1_PHYS);
- udelay (100000);
- init_sio (1, CRADLE_SIO2_PHYS);
- udelay (100000);
- init_sio (2, CRADLE_SIO3_PHYS);
- udelay (100000);
- set_led (3, GREEN);
-
- return 1;
-}
-
-int
-/**********************************************************/
-dram_init (void)
-/**********************************************************/
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
- gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
- gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
- gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
- gd->bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE;
- gd->bd->bi_dram[3].start = PHYS_SDRAM_4;
- gd->bd->bi_dram[3].size = PHYS_SDRAM_4_SIZE;
-
- return (PHYS_SDRAM_1_SIZE +
- PHYS_SDRAM_2_SIZE +
- PHYS_SDRAM_3_SIZE +
- PHYS_SDRAM_4_SIZE );
-}
diff --git a/board/cradle/flash.c b/board/cradle/flash.c
deleted file mode 100644
index f3f9a8ccea..0000000000
--- a/board/cradle/flash.c
+++ /dev/null
@@ -1,359 +0,0 @@
-/*
- * (C) Copyright 2002
- * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
- *
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-
-#define FLASH_BANK_SIZE 0x400000
-#define MAIN_SECT_SIZE 0x20000
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
-
-
-/*-----------------------------------------------------------------------
- */
-
-ulong flash_init (void)
-{
- int i, j;
- ulong size = 0;
-
- for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
- ulong flashbase = 0;
-
- flash_info[i].flash_id =
- (INTEL_MANUFACT & FLASH_VENDMASK) |
- (INTEL_ID_28F128J3 & FLASH_TYPEMASK);
- flash_info[i].size = FLASH_BANK_SIZE;
- flash_info[i].sector_count = CFG_MAX_FLASH_SECT;
- memset (flash_info[i].protect, 0, CFG_MAX_FLASH_SECT);
- switch (i) {
- case 0:
- flashbase = PHYS_FLASH_1;
- break;
- case 1:
- flashbase = PHYS_FLASH_2;
- break;
- default:
- panic ("configured too many flash banks!\n");
- break;
- }
- for (j = 0; j < flash_info[i].sector_count; j++) {
- flash_info[i].start[j] =
- flashbase + j * MAIN_SECT_SIZE;
- }
- size += flash_info[i].size;
- }
-
- /* Protect monitor and environment sectors
- */
- flash_protect (FLAG_PROTECT_SET,
- CFG_FLASH_BASE,
- CFG_FLASH_BASE + monitor_flash_len - 1,
- &flash_info[0]);
-
- flash_protect (FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0]);
-
- return size;
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t * info)
-{
- int i, j;
-
- for (j = 0; j < CFG_MAX_FLASH_BANKS; j++) {
- switch (info->flash_id & FLASH_VENDMASK) {
- case (INTEL_MANUFACT & FLASH_VENDMASK):
- printf ("Intel: ");
- break;
- default:
- printf ("Unknown Vendor ");
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case (INTEL_ID_28F320J3A & FLASH_TYPEMASK):
- printf ("28F320J3A (32Mbit)\n");
- break;
- case (INTEL_ID_28F128J3 & FLASH_TYPEMASK):
- printf ("28F128J3 (128Mbit)\n");
- break;
- default:
- printf ("Unknown Chip Type\n");
- goto Done;
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; i++) {
- if ((i % 5) == 0) {
- printf ("\n ");
- }
- printf (" %08lX%s", info->start[i],
- info->protect[i] ? " (RO)" : " ");
- }
- printf ("\n");
- info++;
- }
-
-Done: ;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t * info, int s_first, int s_last)
-{
- int flag, prot, sect;
- int rc = ERR_OK;
-
- if (info->flash_id == FLASH_UNKNOWN)
- return ERR_UNKNOWN_FLASH_TYPE;
-
- if ((s_first < 0) || (s_first > s_last)) {
- return ERR_INVAL;
- }
-
- if ((info->flash_id & FLASH_VENDMASK) !=
- (INTEL_MANUFACT & FLASH_VENDMASK)) {
- return ERR_UNKNOWN_FLASH_VENDOR;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
- if (prot)
- return ERR_PROTECTED;
-
- /*
- * Disable interrupts which might cause a timeout
- * here. Remember that our exception vectors are
- * at address 0 in the flash, and we don't want a
- * (ticker) exception to happen while the flash
- * chip is in programming mode.
- */
- flag = disable_interrupts ();
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect <= s_last && !ctrlc (); sect++) {
-
- printf ("Erasing sector %2d ... ", sect);
-
- /* arm simple, non interrupt dependent timer */
- reset_timer_masked ();
-
- if (info->protect[sect] == 0) { /* not protected */
- vu_short *addr = (vu_short *) (info->start[sect]);
-
- *addr = 0x20; /* erase setup */
- *addr = 0xD0; /* erase confirm */
-
- while ((*addr & 0x80) != 0x80) {
- if (get_timer_masked () >
- CFG_FLASH_ERASE_TOUT) {
- *addr = 0xB0; /* suspend erase */
- *addr = 0xFF; /* reset to read mode */
- rc = ERR_TIMOUT;
- goto outahere;
- }
- }
-
- /* clear status register command */
- *addr = 0x50;
- /* reset to read mode */
- *addr = 0xFF;
- }
- printf ("ok.\n");
- }
- if (ctrlc ())
- printf ("User Interrupt!\n");
-
-outahere:
-
- /* allow flash to settle - wait 10 ms */
- udelay_masked (10000);
-
- if (flag)
- enable_interrupts ();
-
- return rc;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash
- */
-
-static int write_word (flash_info_t * info, ulong dest, ushort data)
-{
- vu_short *addr = (vu_short *) dest, val;
- int rc = ERR_OK;
- int flag;
-
- /* Check if Flash is (sufficiently) erased
- */
- if ((*addr & data) != data)
- return ERR_NOT_ERASED;
-
- /*
- * Disable interrupts which might cause a timeout
- * here. Remember that our exception vectors are
- * at address 0 in the flash, and we don't want a
- * (ticker) exception to happen while the flash
- * chip is in programming mode.
- */
- flag = disable_interrupts ();
-
- /* clear status register command */
- *addr = 0x50;
-
- /* program set-up command */
- *addr = 0x40;
-
- /* latch address/data */
- *addr = data;
-
- /* arm simple, non interrupt dependent timer */
- reset_timer_masked ();
-
- /* wait while polling the status register */
- while (((val = *addr) & 0x80) != 0x80) {
- if (get_timer_masked () > CFG_FLASH_WRITE_TOUT) {
- rc = ERR_TIMOUT;
- /* suspend program command */
- *addr = 0xB0;
- goto outahere;
- }
- }
-
- if (val & 0x1A) { /* check for error */
- printf ("\nFlash write error %02x at address %08lx\n",
- (int) val, (unsigned long) dest);
- if (val & (1 << 3)) {
- printf ("Voltage range error.\n");
- rc = ERR_PROG_ERROR;
- goto outahere;
- }
- if (val & (1 << 1)) {
- printf ("Device protect error.\n");
- rc = ERR_PROTECTED;
- goto outahere;
- }
- if (val & (1 << 4)) {
- printf ("Programming error.\n");
- rc = ERR_PROG_ERROR;
- goto outahere;
- }
- rc = ERR_PROG_ERROR;
- goto outahere;
- }
-
-outahere:
- /* read array command */
- *addr = 0xFF;
-
- if (flag)
- enable_interrupts ();
-
- return rc;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash.
- */
-
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- ulong cp, wp;
- ushort data;
- int l;
- int i, rc;
-
- wp = (addr & ~1); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i = 0, cp = wp; i < l; ++i, ++cp) {
- data = (data >> 8) | (*(uchar *) cp << 8);
- }
- for (; i < 2 && cnt > 0; ++i) {
- data = (data >> 8) | (*src++ << 8);
- --cnt;
- ++cp;
- }
- for (; cnt == 0 && i < 2; ++i, ++cp) {
- data = (data >> 8) | (*(uchar *) cp << 8);
- }
-
- if ((rc = write_word (info, wp, data)) != 0) {
- return (rc);
- }
- wp += 2;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 2) {
- data = *((vu_short *) src);
- if ((rc = write_word (info, wp, data)) != 0) {
- return (rc);
- }
- src += 2;
- wp += 2;
- cnt -= 2;
- }
-
- if (cnt == 0) {
- return ERR_OK;
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i = 0, cp = wp; i < 2 && cnt > 0; ++i, ++cp) {
- data = (data >> 8) | (*src++ << 8);
- --cnt;
- }
- for (; i < 2; ++i, ++cp) {
- data = (data >> 8) | (*(uchar *) cp << 8);
- }
-
- return write_word (info, wp, data);
-}
diff --git a/board/cradle/lowlevel_init.S b/board/cradle/lowlevel_init.S
deleted file mode 100644
index 2fd307f1d0..0000000000
--- a/board/cradle/lowlevel_init.S
+++ /dev/null
@@ -1,515 +0,0 @@
-/*
- * Most of this taken from Redboot hal_platform_setup.h with cleanup
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <config.h>
-#include <version.h>
-#include <asm/arch/pxa-regs.h>
-
-DRAM_SIZE: .long CFG_DRAM_SIZE
-
-/* wait for coprocessor write complete */
- .macro CPWAIT reg
- mrc p15,0,\reg,c2,c0,0
- mov \reg,\reg
- sub pc,pc,#4
- .endm
-
- .macro SET_LED val
- ldr r6, =CRADLE_LED_CLR_REG
- ldr r7, =0
- str r7, [r6]
- ldr r6, =CRADLE_LED_SET_REG
- ldr r7, =\val
- str r7, [r6]
- .endm
-
-
-.globl lowlevel_init
-lowlevel_init:
-
- mov r10, lr
-
- /* Set up GPIO pins first */
-
- ldr r0, =GPSR0
- ldr r1, =CFG_GPSR0_VAL
- str r1, [r0]
-
- ldr r0, =GPSR1
- ldr r1, =CFG_GPSR1_VAL
- str r1, [r0]
-
- ldr r0, =GPSR2
- ldr r1, =CFG_GPSR2_VAL
- str r1, [r0]
-
- ldr r0, =GPCR0
- ldr r1, =CFG_GPCR0_VAL
- str r1, [r0]
-
- ldr r0, =GPCR1
- ldr r1, =CFG_GPCR1_VAL
- str r1, [r0]
-
- ldr r0, =GPCR2
- ldr r1, =CFG_GPCR2_VAL
- str r1, [r0]
-
- ldr r0, =GRER0
- ldr r1, =CFG_GRER0_VAL
- str r1, [r0]
-
- ldr r0, =GRER1
- ldr r1, =CFG_GRER1_VAL
- str r1, [r0]
-
- ldr r0, =GRER2
- ldr r1, =CFG_GRER2_VAL
- str r1, [r0]
-
- ldr r0, =GFER0
- ldr r1, =CFG_GFER0_VAL
- str r1, [r0]
-
- ldr r0, =GFER1
- ldr r1, =CFG_GFER1_VAL
- str r1, [r0]
-
- ldr r0, =GFER2
- ldr r1, =CFG_GFER2_VAL
- str r1, [r0]
-
- ldr r0, =GPDR0
- ldr r1, =CFG_GPDR0_VAL
- str r1, [r0]
-
- ldr r0, =GPDR1
- ldr r1, =CFG_GPDR1_VAL
- str r1, [r0]
-
- ldr r0, =GPDR2
- ldr r1, =CFG_GPDR2_VAL
- str r1, [r0]
-
- ldr r0, =GAFR0_L
- ldr r1, =CFG_GAFR0_L_VAL
- str r1, [r0]
-
- ldr r0, =GAFR0_U
- ldr r1, =CFG_GAFR0_U_VAL
- str r1, [r0]
-
- ldr r0, =GAFR1_L
- ldr r1, =CFG_GAFR1_L_VAL
- str r1, [r0]
-
- ldr r0, =GAFR1_U
- ldr r1, =CFG_GAFR1_U_VAL
- str r1, [r0]
-
- ldr r0, =GAFR2_L
- ldr r1, =CFG_GAFR2_L_VAL
- str r1, [r0]
-
- ldr r0, =GAFR2_U
- ldr r1, =CFG_GAFR2_U_VAL
- str r1, [r0]
-
- /* enable GPIO pins */
- ldr r0, =PSSR
- ldr r1, =CFG_PSSR_VAL
- str r1, [r0]
-
- SET_LED 1
-
- ldr r3, =MSC1 /* low - bank 2 Lubbock Registers / SRAM */
- ldr r2, =CFG_MSC1_VAL /* high - bank 3 Ethernet Controller */
- str r2, [r3] /* need to set MSC1 before trying to write to the HEX LEDs */
- ldr r2, [r3] /* need to read it back to make sure the value latches (see MSC section of manual) */
-
-
-/*********************************************************************
- Initlialize Memory Controller
-
- See PXA250 Operating System Developer's Guide
-
- pause for 200 uSecs- allow internal clocks to settle
- *Note: only need this if hard reset... doing it anyway for now
-*/
-
- @ Step 1
- @ ---- Wait 200 usec
- ldr r3, =OSCR @ reset the OS Timer Count to zero
- mov r2, #0
- str r2, [r3]
- ldr r4, =0x300 @ really 0x2E1 is about 200usec, so 0x300 should be plenty
-1:
- ldr r2, [r3]
- cmp r4, r2
- bgt 1b
-
- SET_LED 2
-
-mem_init:
- @ get memory controller base address
- ldr r1, =MEMC_BASE
-
-
-@****************************************************************************
-@ Step 2
-@
-
- @ Step 2a
- @ write msc0, read back to ensure data latches
- @
- ldr r2, =CFG_MSC0_VAL
- str r2, [r1, #MSC0_OFFSET]
- ldr r2, [r1, #MSC0_OFFSET]
-
- @ write msc1
- ldr r2, =CFG_MSC1_VAL
- str r2, [r1, #MSC1_OFFSET]
- ldr r2, [r1, #MSC1_OFFSET]
-
- @ write msc2
- ldr r2, =CFG_MSC2_VAL
- str r2, [r1, #MSC2_OFFSET]
- ldr r2, [r1, #MSC2_OFFSET]
-
- @ Step 2b
- @ write mecr
- ldr r2, =CFG_MECR_VAL
- str r2, [r1, #MECR_OFFSET]
-
- @ write mcmem0
- ldr r2, =CFG_MCMEM0_VAL
- str r2, [r1, #MCMEM0_OFFSET]
-
- @ write mcmem1
- ldr r2, =CFG_MCMEM1_VAL
- str r2, [r1, #MCMEM1_OFFSET]
-
- @ write mcatt0
- ldr r2, =CFG_MCATT0_VAL
- str r2, [r1, #MCATT0_OFFSET]
-
- @ write mcatt1
- ldr r2, =CFG_MCATT1_VAL
- str r2, [r1, #MCATT1_OFFSET]
-
- @ write mcio0
- ldr r2, =CFG_MCIO0_VAL
- str r2, [r1, #MCIO0_OFFSET]
-
- @ write mcio1
- ldr r2, =CFG_MCIO1_VAL
- str r2, [r1, #MCIO1_OFFSET]
-
- /*SET_LED 3 */
-
- @ Step 2c
- @ fly-by-dma is defeatured on this part
- @ write flycnfg
- @ldr r2, =CFG_FLYCNFG_VAL
- @str r2, [r1, #FLYCNFG_OFFSET]
-
-/* FIXME Does this sequence really make sense */
-#ifdef REDBOOT_WAY
- @ Step 2d
- @ get the mdrefr settings
- ldr r3, =CFG_MDREFR_VAL
-
- @ extract DRI field (we need a valid DRI field)
- @
- ldr r2, =0xFFF
-
- @ valid DRI field in r3
- @
- and r3, r3, r2
-
- @ get the reset state of MDREFR
- @
- ldr r4, [r1, #MDREFR_OFFSET]
-
- @ clear the DRI field
- @
- bic r4, r4, r2
-
- @ insert the valid DRI field loaded above
- @
- orr r4, r4, r3
-
- @ write back mdrefr
- @
- str r4, [r1, #MDREFR_OFFSET]
-
- @ *Note: preserve the mdrefr value in r4 *
-
- /*SET_LED 4 */
-
-@****************************************************************************
-@ Step 3
-@
-@ NO SRAM
-
- mov pc, r10
-
-
-@****************************************************************************
-@ Step 4
-@
-
- @ Assumes previous mdrefr value in r4, if not then read current mdrefr
-
- @ clear the free-running clock bits
- @ (clear K0Free, K1Free, K2Free
- @
- bic r4, r4, #(0x00800000 | 0x01000000 | 0x02000000)
-
- @ set K0RUN for CPLD clock
- @
- orr r4, r4, #0x00002000
-
- @ set K1RUN if bank 0 installed
- @
- orr r4, r4, #0x00010000
-
- @ write back mdrefr
- @
- str r4, [r1, #MDREFR_OFFSET]
- ldr r4, [r1, #MDREFR_OFFSET]
-
- @ deassert SLFRSH
- @
- bic r4, r4, #0x00400000
-
- @ write back mdrefr
- @
- str r4, [r1, #MDREFR_OFFSET]
-
- @ assert E1PIN
- @
- orr r4, r4, #0x00008000
-
- @ write back mdrefr
- @
- str r4, [r1, #MDREFR_OFFSET]
- ldr r4, [r1, #MDREFR_OFFSET]
- nop
- nop
-#else
- @ Step 2d
- @ get the mdrefr settings
- ldr r3, =CFG_MDREFR_VAL
-
- @ write back mdrefr
- @
- str r4, [r1, #MDREFR_OFFSET]
-
- @ Step 4
-
- @ set K0RUN for CPLD clock
- @
- orr r4, r4, #0x00002000
-
- @ set K1RUN for bank 0
- @
- orr r4, r4, #0x00010000
-
- @ write back mdrefr
- @
- str r4, [r1, #MDREFR_OFFSET]
- ldr r4, [r1, #MDREFR_OFFSET]
-
- @ deassert SLFRSH
- @
- bic r4, r4, #0x00400000
-
- @ write back mdrefr
- @
- str r4, [r1, #MDREFR_OFFSET]
-
- @ assert E1PIN
- @
- orr r4, r4, #0x00008000
-
- @ write back mdrefr
- @
- str r4, [r1, #MDREFR_OFFSET]
- ldr r4, [r1, #MDREFR_OFFSET]
- nop
- nop
-#endif
-
- @ Step 4d
- @ fetch platform value of mdcnfg
- @
- ldr r2, =CFG_MDCNFG_VAL
-
- @ disable all sdram banks
- @
- bic r2, r2, #(MDCNFG_DE0 | MDCNFG_DE1)
- bic r2, r2, #(MDCNFG_DE2 | MDCNFG_DE3)
-
- @ program banks 0/1 for bus width
- @
- bic r2, r2, #MDCNFG_DWID0 @0=32-bit
-
- @ write initial value of mdcnfg, w/o enabling sdram banks
- @
- str r2, [r1, #MDCNFG_OFFSET]
-
- @ Step 4e
- @ pause for 200 uSecs
- @
- ldr r3, =OSCR @ reset the OS Timer Count to zero
- mov r2, #0
- str r2, [r3]
- ldr r4, =0x300 @ really 0x2E1 is about 200usec, so 0x300 should be plenty
-1:
- ldr r2, [r3]
- cmp r4, r2
- bgt 1b
-
- /*SET_LED 5 */
-
- /* Why is this here??? */
- mov r0, #0x78 @turn everything off
- mcr p15, 0, r0, c1, c0, 0 @(caches off, MMU off, etc.)
-
- @ Step 4f
- @ Access memory *not yet enabled* for CBR refresh cycles (8)
- @ - CBR is generated for all banks
-
- ldr r2, =CFG_DRAM_BASE
- str r2, [r2]
- str r2, [r2]
- str r2, [r2]
- str r2, [r2]
- str r2, [r2]
- str r2, [r2]
- str r2, [r2]
- str r2, [r2]
-
- @ Step 4g
- @get memory controller base address
- @
- ldr r1, =MEMC_BASE
-
- @fetch current mdcnfg value
- @
- ldr r3, [r1, #MDCNFG_OFFSET]
-
- @enable sdram bank 0 if installed (must do for any populated bank)
- @
- orr r3, r3, #MDCNFG_DE0
-
- @write back mdcnfg, enabling the sdram bank(s)
- @
- str r3, [r1, #MDCNFG_OFFSET]
-
- @ Step 4h
- @ write mdmrs
- @
- ldr r2, =CFG_MDMRS_VAL
- str r2, [r1, #MDMRS_OFFSET]
-
- @ Done Memory Init
-
- /*SET_LED 6 */
-
- @********************************************************************
- @ Disable (mask) all interrupts at the interrupt controller
- @
-
- @ clear the interrupt level register (use IRQ, not FIQ)
- @
- mov r1, #0
- ldr r2, =ICLR
- str r1, [r2]
-
- @ Set interrupt mask register
- @
- ldr r1, =CFG_ICMR_VAL
- ldr r2, =ICMR
- str r1, [r2]
-
- @ ********************************************************************
- @ Disable the peripheral clocks, and set the core clock
- @
-
- @ Turn Off ALL on-chip peripheral clocks for re-configuration
- @
- ldr r1, =CKEN
- mov r2, #0
- str r2, [r1]
-
- @ set core clocks
- @
- ldr r2, =CFG_CCCR_VAL
- ldr r1, =CCCR
- str r2, [r1]
-
-#ifdef ENABLE32KHZ
- @ enable the 32Khz oscillator for RTC and PowerManager
- @
- ldr r1, =OSCC
- mov r2, #OSCC_OON
- str r2, [r1]
-
- @ NOTE: spin here until OSCC.OOK get set,
- @ meaning the PLL has settled.
- @
-60:
- ldr r2, [r1]
- ands r2, r2, #1
- beq 60b
-#endif
-
- @ Turn on needed clocks
- @
- ldr r1, =CKEN
- ldr r2, =CFG_CKEN_VAL
- str r2, [r1]
-
- /*SET_LED 7 */
-
-/* Is this needed???? */
-#define NODEBUG
-#ifdef NODEBUG
- /*Disable software and data breakpoints */
- mov r0,#0
- mcr p15,0,r0,c14,c8,0 /* ibcr0 */
- mcr p15,0,r0,c14,c9,0 /* ibcr1 */
- mcr p15,0,r0,c14,c4,0 /* dbcon */
-
- /*Enable all debug functionality */
- mov r0,#0x80000000
- mcr p14,0,r0,c10,c0,0 /* dcsr */
-
-#endif
-
- /*SET_LED 8 */
-
- mov pc, r10
-
-@ End lowlevel_init
diff --git a/board/cradle/u-boot.lds b/board/cradle/u-boot.lds
deleted file mode 100644
index f0102391b3..0000000000
--- a/board/cradle/u-boot.lds
+++ /dev/null
@@ -1,56 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-ENTRY(_start)
-SECTIONS
-{
- . = 0x00000000;
-
- . = ALIGN(4);
- .text :
- {
- cpu/pxa/start.o (.text)
- *(.text)
- }
-
- . = ALIGN(4);
- .rodata : { *(.rodata) }
-
- . = ALIGN(4);
- .data : { *(.data) }
-
- . = ALIGN(4);
- .got : { *(.got) }
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = ALIGN(4);
- __bss_start = .;
- .bss : { *(.bss) }
- _end = .;
-}
diff --git a/board/cray/L1/L1.c b/board/cray/L1/L1.c
deleted file mode 100644
index a7114eb074..0000000000
--- a/board/cray/L1/L1.c
+++ /dev/null
@@ -1,365 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/processor.h>
-#include <405gp_i2c.h>
-#include <command.h>
-#include <rtc.h>
-#include <post.h>
-#include <net.h>
-#include <malloc.h>
-
-#define L1_MEMSIZE (32*1024*1024)
-
-/* the std. DHCP stufff */
-#define DHCP_ROUTER 3
-#define DHCP_NETMASK 1
-#define DHCP_BOOTFILE 67
-#define DHCP_ROOTPATH 17
-#define DHCP_HOSTNAME 12
-
-/* some extras used by CRAY
- *
- * on the server this looks like:
- *
- * option L1-initrd-image code 224 = string;
- * option L1-initrd-image "/opt/craysv2/craymcu/l1/flash/initrd.image"
- */
-#define DHCP_L1_INITRD 224
-
-/* new, [better?] way via official vendor-extensions, defining an option
- * space.
- * on the server this looks like:
- *
- * option space CRAYL1;
- * option CRAYL1.initrd code 3 = string;
- * ..etc...
- */
-#define DHCP_VENDOR_SPECX 43
-#define DHCP_VX_INITRD 3
-#define DHCP_VX_BOOTCMD 4
-#define DHCP_VX_BOOTARGS 5
-#define DHCP_VX_ROOTDEV 6
-#define DHCP_VX_FROMFLASH 7
-#define DHCP_VX_BOOTSCRIPT 8
-#define DHCP_VX_RCFILE 9
-#define DHCP_VX_MAGIC 10
-
-/* Things DHCP server can tellme about. If there's no flash address, then
- * they dont participate in 'update' to flash, and we force their values
- * back to '0' every boot to be sure to get them fresh from DHCP. Yes, I
- * know this is a pain...
- *
- * If I get no bootfile, boot from flash. If rootpath, use that. If no
- * rootpath use initrd in flash.
- */
-typedef struct dhcp_item_s {
- u8 dhcp_option;
- u8 dhcp_vendor_option;
- char *dhcpvalue;
- char *envname;
-} dhcp_item_t;
-static dhcp_item_t Things[] = {
- {DHCP_ROUTER, 0, NULL, "gateway"},
- {DHCP_NETMASK, 0, NULL, "netmask"},
- {DHCP_BOOTFILE, 0, NULL, "bootfile"},
- {DHCP_ROOTPATH, 0, NULL, "rootpath"},
- {DHCP_HOSTNAME, 0, NULL, "hostname"},
- {DHCP_L1_INITRD, 0, NULL, "initrd"},
-/* and the other way.. */
- {DHCP_VENDOR_SPECX, DHCP_VX_INITRD, NULL, "initrd"},
- {DHCP_VENDOR_SPECX, DHCP_VX_BOOTCMD, NULL, "bootcmd"},
- {DHCP_VENDOR_SPECX, DHCP_VX_FROMFLASH, NULL, "fromflash"},
- {DHCP_VENDOR_SPECX, DHCP_VX_BOOTSCRIPT, NULL, "bootscript"},
- {DHCP_VENDOR_SPECX, DHCP_VX_RCFILE, NULL, "rcfile"},
- {DHCP_VENDOR_SPECX, DHCP_VX_BOOTARGS, NULL, "xbootargs"},
- {DHCP_VENDOR_SPECX, DHCP_VX_ROOTDEV, NULL, NULL},
- {DHCP_VENDOR_SPECX, DHCP_VX_MAGIC, NULL, NULL}
-};
-
-#define N_THINGS ((sizeof(Things))/(sizeof(dhcp_item_t)))
-
-extern char bootscript[];
-
-/* Here is the boot logic as HUSH script. Overridden by any TFP provided
- * bootscript file.
- */
-
-static void init_sdram (void);
-
-/* ------------------------------------------------------------------------- */
-int board_early_init_f (void)
-{
- /* Running from ROM: global data is still READONLY */
- init_sdram ();
- mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
- mtdcr (uicer, 0x00000000); /* disable all ints */
- mtdcr (uiccr, 0x00000020); /* set all but FPGA SMI to be non-critical */
- mtdcr (uicpr, 0xFFFFFFE0); /* set int polarities */
- mtdcr (uictr, 0x10000000); /* set int trigger levels */
- mtdcr (uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority */
- mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
- return 0;
-}
-
-/* ------------------------------------------------------------------------- */
-int checkboard (void)
-{
- return (0);
-}
-/* ------------------------------------------------------------------------- */
-
-/* ------------------------------------------------------------------------- */
-int misc_init_r (void)
-{
- char *s, *e;
- image_header_t *hdr;
- time_t timestamp;
- struct rtc_time tm;
- char bootcmd[32];
-
- hdr = (image_header_t *) (CFG_MONITOR_BASE - sizeof (image_header_t));
- timestamp = (time_t) hdr->ih_time;
- to_tm (timestamp, &tm);
- printf ("Welcome to U-Boot on Cray L1. Compiled %4d-%02d-%02d %2d:%02d:%02d (UTC)\n", tm.tm_year, tm.tm_mon, tm.tm_mday, tm.tm_hour, tm.tm_min, tm.tm_sec);
-
-#define FACTORY_SETTINGS 0xFFFC0000
- if ((s = getenv ("ethaddr")) == NULL) {
- e = (char *) (FACTORY_SETTINGS);
- if (*(e + 0) != '0'
- || *(e + 1) != '0'
- || *(e + 2) != ':'
- || *(e + 3) != '4' || *(e + 4) != '0' || *(e + 17) != '\0') {
- printf ("No valid MAC address in flash location 0x3C0000!\n");
- } else {
- printf ("Factory MAC: %s\n", e);
- setenv ("ethaddr", e);
- }
- }
- sprintf (bootcmd,"autoscript %X",(unsigned)bootscript);
- setenv ("bootcmd", bootcmd);
- return (0);
-}
-
-/* ------------------------------------------------------------------------- */
-long int initdram (int board_type)
-{
- return (L1_MEMSIZE);
-}
-
-/* ------------------------------------------------------------------------- */
-/* stubs so we can print dates w/o any nvram RTC.*/
-void rtc_get (struct rtc_time *tmp)
-{
- return;
-}
-void rtc_set (struct rtc_time *tmp)
-{
- return;
-}
-void rtc_reset (void)
-{
- return;
-}
-
-/* ------------------------------------------------------------------------- */
-/* Do sdram bank init in C so I can read it..no console to print to yet!
- */
-static void init_sdram (void)
-{
- unsigned long tmp;
-
- /* write SDRAM bank 0 register */
- mtdcr (memcfga, mem_mb0cf);
- mtdcr (memcfgd, 0x00062001);
-
-/* Set the SDRAM Timing reg, SDTR1 and the refresh timer reg, RTR. */
-/* To set the appropriate timings, we need to know the SDRAM speed. */
-/* We can use the PLB speed since the SDRAM speed is the same as */
-/* the PLB speed. The PLB speed is the FBK divider times the */
-/* 405GP reference clock, which on the L1 is 25Mhz. */
-/* Thus, if FBK div is 2, SDRAM is 50Mhz; if FBK div is 3, SDRAM is */
-/* 150Mhz; if FBK is 3, SDRAM is 150Mhz. */
-
- /* divisor = ((mfdcr(strap)>> 28) & 0x3); */
-
-/* write SDRAM timing for 100Mhz. */
- mtdcr (memcfga, mem_sdtr1);
- mtdcr (memcfgd, 0x0086400D);
-
-/* write SDRAM refresh interval register */
- mtdcr (memcfga, mem_rtr);
- mtdcr (memcfgd, 0x05F00000);
- udelay (200);
-
-/* sdram controller.*/
- mtdcr (memcfga, mem_mcopt1);
- mtdcr (memcfgd, 0x90800000);
- udelay (200);
-
-/* initially, disable ECC on all banks */
- udelay (200);
- mtdcr (memcfga, mem_ecccf);
- tmp = mfdcr (memcfgd);
- tmp &= 0xff0fffff;
- mtdcr (memcfga, mem_ecccf);
- mtdcr (memcfgd, tmp);
-
- return;
-}
-
-extern int memory_post_test (int flags);
-
-int testdram (void)
-{
- unsigned long tmp;
- uint *pstart = (uint *) 0x00000000;
- uint *pend = (uint *) L1_MEMSIZE;
- uint *p;
-
- if (getenv_r("booted",NULL,0) <= 0)
- {
- printf ("testdram..");
- /*AA*/
- for (p = pstart; p < pend; p++)
- *p = 0xaaaaaaaa;
- for (p = pstart; p < pend; p++) {
- if (*p != 0xaaaaaaaa) {
- printf ("SDRAM test fails at: %08x, was %08x expected %08x\n",
- (uint) p, *p, 0xaaaaaaaa);
- return 1;
- }
- }
- /*55*/
- for (p = pstart; p < pend; p++)
- *p = 0x55555555;
- for (p = pstart; p < pend; p++) {
- if (*p != 0x55555555) {
- printf ("SDRAM test fails at: %08x, was %08x expected %08x\n",
- (uint) p, *p, 0x55555555);
- return 1;
- }
- }
- /*addr*/
- for (p = pstart; p < pend; p++)
- *p = (unsigned)p;
- for (p = pstart; p < pend; p++) {
- if (*p != (unsigned)p) {
- printf ("SDRAM test fails at: %08x, was %08x expected %08x\n",
- (uint) p, *p, (uint)p);
- return 1;
- }
- }
- printf ("Success. ");
- }
- printf ("Enable ECC..");
-
- mtdcr (memcfga, mem_mcopt1);
- tmp = (mfdcr (memcfgd) & ~0xFFE00000) | 0x90800000;
- mtdcr (memcfga, mem_mcopt1);
- mtdcr (memcfgd, tmp);
- udelay (600);
- for (p = (unsigned long) 0; ((unsigned long) p < L1_MEMSIZE); *p++ = 0L)
- ;
- udelay (400);
- mtdcr (memcfga, mem_ecccf);
- tmp = mfdcr (memcfgd);
- tmp |= 0x00800000;
- mtdcr (memcfgd, tmp);
- udelay (400);
- printf ("enabled.\n");
- return (0);
-}
-
-/* ------------------------------------------------------------------------- */
-static u8 *dhcp_env_update (u8 thing, u8 * pop)
-{
- u8 i, oplen;
-
- oplen = *(pop + 1);
-
- if ((Things[thing].dhcpvalue = malloc (oplen)) == NULL) {
- printf ("Whoops! failed to malloc space for DHCP thing %s\n",
- Things[thing].envname);
- return NULL;
- }
- for (i = 0; (i < oplen); i++)
- if ((*(Things[thing].dhcpvalue + i) = *(pop + 2 + i)) == ' ')
- break;
- *(Things[thing].dhcpvalue + i) = '\0';
-
-/* set env. */
- if (Things[thing].envname)
- {
- setenv (Things[thing].envname, Things[thing].dhcpvalue);
- }
- return ((u8 *)(Things[thing].dhcpvalue));
-}
-
-/* ------------------------------------------------------------------------- */
-u8 *dhcp_vendorex_prep (u8 * e)
-{
- u8 thing;
-
-/* ask for the things I want. */
- *e++ = 55; /* Parameter Request List */
- *e++ = N_THINGS;
- for (thing = 0; thing < N_THINGS; thing++)
- *e++ = Things[thing].dhcp_option;
- *e++ = 255;
-
- return e;
-}
-
-/* ------------------------------------------------------------------------- */
-/* .. return NULL means it wasnt mine, non-null means I got it..*/
-u8 *dhcp_vendorex_proc (u8 * pop)
-{
- u8 oplen, *sub_op, sub_oplen, *retval;
- u8 thing = 0;
-
- retval = NULL;
- oplen = *(pop + 1);
-/* if pop is vender spec indicator, there are sub-options. */
- if (*pop == DHCP_VENDOR_SPECX) {
- for (sub_op = pop + 2;
- oplen && (sub_oplen = *(sub_op + 1));
- oplen -= sub_oplen, sub_op += (sub_oplen + 2)) {
- for (thing = 0; thing < N_THINGS; thing++) {
- if (*sub_op == Things[thing].dhcp_vendor_option) {
- if (!(retval = dhcp_env_update (thing, sub_op))) {
- return NULL;
- }
- }
- }
- }
- } else {
- for (thing = 0; thing < N_THINGS; thing++) {
- if (*pop == Things[thing].dhcp_option)
- if (!(retval = dhcp_env_update (thing, pop)))
- return NULL;
- }
- }
- return (pop);
-}
diff --git a/board/cray/L1/L1.h b/board/cray/L1/L1.h
deleted file mode 100644
index 1b41824483..0000000000
--- a/board/cray/L1/L1.h
+++ /dev/null
@@ -1,44 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/****************************************************************************
- * FLASH Memory Map as used by CRAY L1, 4MB AMD29F032B flash chip
- *
- * Start Address Length
- * +++++++++++++++++++++++++ 0xFFC0_0000 Start of Flash -----------------
- * | Failsafe Linux Image | (1M)
- * +=======================+ 0xFFD0_0000
- * | (Reserved FlashFiles) | (1M)
- * +=======================+ 0xFFE0_0000
- * | Failsafe RootFS | (1M)
- * +=======================+ 0xFFF0_0000
- * | |
- * | U N U S E D |
- * | |
- * +-----------------------+ 0xFFFD_0000 U-Boot image header (64 bytes)
- * | environment settings | (64k)
- * +-----------------------+ 0xFFFE_0000 U-Boot image header (64 bytes)
- * | U-Boot | 0xFFFE_0040 _start of U-Boot
- * | | 0xFFFE_FFFC reset vector - branch to _start
- * +++++++++++++++++++++++++ 0xFFFF_FFFF End of Flash -----------------
- *****************************************************************************/
diff --git a/board/cray/L1/Makefile b/board/cray/L1/Makefile
deleted file mode 100644
index bfe0922ebc..0000000000
--- a/board/cray/L1/Makefile
+++ /dev/null
@@ -1,57 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o
-SOBJS = init.o
-
-# HACK: depend needs bootscript.c, which needs tools/mkimage, which is not
-# built in the depend stage. So... put bootscript.o here, not in OBJS
-$(LIB): $(OBJS) $(SOBJS) bootscript.o
- $(AR) crv $@ $^
-
-clean:
- rm -f $(SOBJS) $(OBJS) bootscript.c bootscript.image bootscript.o
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-$(BOARD).o : $(BOARD).c bootscript.o
-
-bootscript.c: bootscript.image
- od -t x1 -v -A x $^ | awk -f x2c.awk > $@
-
-bootscript.image: bootscript.hush Makefile
- -$(TOPDIR)/tools/mkimage -A ppc -O linux -T script -C none -a 0 -e 0 -n bootscript -d bootscript.hush $@
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/cray/L1/bootscript.hush b/board/cray/L1/bootscript.hush
deleted file mode 100644
index ec4839b5d0..0000000000
--- a/board/cray/L1/bootscript.hush
+++ /dev/null
@@ -1,117 +0,0 @@
-# $Header$
-# hush bootscript for PPCBOOT on L1
-# note: all #s are in hex, do _NOT_ prefix it with 0x
-
-flash_rfs=ffc00000
-flash_krl=fff00000
-tftp_addr=100000
-tftp2_addr=1000000
-
-if printenv booted
-then
- echo already booted before
-else
- echo first boot in environment, create and save settings
- setenv booted OK
- saveenv
-fi
-
-setenv autoload no
-# clear out stale env stuff, so we get fresh from dhcp.
-for setting in initrd fromflash kernel rootfs rootpath
-do
-setenv $setting
-done
-
-dhcp
-
-# if host provides us with a different bootscript, us it.
-if printenv bootscript
- then
- tftp $tftp_addr $bootcript
- if imi $tftp_addr
- then
- autoscript $tftp_addr
- fi
-fi
-
-# default base kernel arguments.
-setenv bootargs $xbootargs devfs=mount ip=$ipaddr:$serverip:$gatewayip:$netmask:L1:eth0:off wdt=120
-
-# Have a kernel in flash?
-if imi $flash_krl
-then
- echo ok kernel to boot from $flash_krl
- setenv kernel $flash_krl
-else
- echo no kernel to boot from $flash_krl, need tftp
-fi
-
-# Have a rootfs in flash?
-echo test for SQUASHfs at $flash_rfs
-
-if imi $flash_rfs
-then
- echo appears to be a good initrd image at base of flash OK
- setenv rootfs $flash_rfs
-else
- echo no image at base of flash, need nfsroot or initrd
-fi
-
-# I boot from flash if told to and I can.
-if printenv fromflash && printenv kernel && printenv rootfs
-then
- echo booting entirely from flash
- setenv bootargs root=/dev/ram0 rw $bootargs
- bootm $kernel $rootfs
- echo oh no failed so I try some other stuff
-fi
-
-# TFTP down a kernel
-if printenv bootfile
-then
- tftp $tftp_addr $bootfile
- setenv kernel $tftp_addr
- echo I will boot the TFTP kernel
-else
- if printenv kernel
- then
- echo no bootfile specified, will use one from flash
- else
- setenv bootfile /opt/crayx1/craymcu/l1/flash/linux.image
- echo OH NO! we have no bootfile,nor flash kernel! try default: $bootfile
- tftp $tftp_addr $bootfile
- setenv kernel $tftp_addr
- fi
-fi
-
-# the rootfs.
-if printenv rootpath
-then
- echo rootpath is $rootpath
- if printenv initrd
- then
- echo initrd is also specified, so use $initrd
- tftp $tftp2_addr $initrd
- setenv bootargs root=/dev/ram0 rw cwsroot=$serverip:$rootpath $bootargs
- bootm $kernel $tftp2_addr
- else
- echo initrd is not specified, so use NFSROOT $rootpat
- setenv bootargs root=/dev/nfs ro nfsroot=$serverip:$rootpath $bootargs
- bootm $kernel
- fi
-else
- echo we have no rootpath check for one in flash
- if printenv rootfs
- then
- echo I will use the one in flash
- setenv bootargs root=/dev/mtdblock/0 ro rootfstype=squashfs $bootargs
- bootm $kernel
- else
- setenv rootpath /export/crayl1
- echo OH NO! we have no rootpath,nor flash kernel! try default: $rootpath
- setenv bootargs root=/dev/mtdblock/0 ro rootfstype=squashfs $bootargs
- bootm $kernel
- fi
-fi
-reset
diff --git a/board/cray/L1/config.mk b/board/cray/L1/config.mk
deleted file mode 100644
index b69fe8ee01..0000000000
--- a/board/cray/L1/config.mk
+++ /dev/null
@@ -1,26 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-# Note: I make an "image" from U-Boot itself, which prefixes 0x40 bytes of
-# header info, hence start address is thus shifted.
-TEXT_BASE = 0xFFFD0040
diff --git a/board/cray/L1/flash.c b/board/cray/L1/flash.c
deleted file mode 100644
index f3132740e3..0000000000
--- a/board/cray/L1/flash.c
+++ /dev/null
@@ -1,470 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * Modified 4/5/2001
- * Wait for completion of each sector erase command issued
- * 4/5/2001
- * Chris Hallinan - DS4.COM, Inc. - clh@net1plus.com
- */
-
-/*
- * Modified July 20, 2001
- * Strip down to support ONLY the AMD29F032B.
- * Dave Updegraff - Cray, Inc. dave@cray.com
- */
-
-#include <common.h>
-#include <ppc4xx.h>
-#include <asm/processor.h>
-
-/* The flash chip we use... */
-#define AMD_ID_F032B 0x41 /* 29F032B ID 32 Mbit,64 64Kx8 sectors */
-#define FLASH_AM320B 0x0009
-
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (vu_long *addr, flash_info_t *info);
-static int write_word (flash_info_t *info, ulong dest, ulong data);
-static void flash_get_offsets (ulong base, flash_info_t *info);
-
-#define ADDR0 0x5555
-#define ADDR1 0x2aaa
-#define FLASH_WORD_SIZE unsigned char
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- unsigned long size_b0, size_b1;
- int i;
-
- /* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* Static FLASH Bank configuration here - FIXME XXX */
-
- size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size_b0, size_b0<<20);
- }
-
- /* Only one bank */
- if (CFG_MAX_FLASH_BANKS == 1)
- {
- /* Setup offsets */
- flash_get_offsets (FLASH_BASE0_PRELIM, &flash_info[0]);
-
-#if 0
- /* Monitor protection ON by default */
- (void)flash_protect(FLAG_PROTECT_SET,
- FLASH_BASE0_PRELIM,
- FLASH_BASE0_PRELIM+monitor_flash_len-1,
- &flash_info[0]);
-#endif
- size_b1 = 0 ;
- flash_info[0].size = size_b0;
- }
-
- return (size_b0 + size_b1);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-static void flash_get_offsets (ulong base, flash_info_t *info)
-{
- int i;
-
- /* set up sector start address table */
- for (i = 0; i < info->sector_count; i++)
- info->start[i] = base + (i * 0x00010000);
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t *info)
-{
- int i;
- int k;
- int size;
- int erased;
- volatile unsigned long *flash;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD: printf ("AMD "); break;
- default: printf ("Unknown Vendor "); break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM320B:printf ("AM29F032B (32 Mbit 64x64KB uniform sectors)\n");
- break;
- default: printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld KB in %d Sectors\n",
- info->size >> 10, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
- /*
- * Check if whole sector is erased
- */
- if (i != (info->sector_count-1))
- size = info->start[i+1] - info->start[i];
- else
- size = info->start[0] + info->size - info->start[i];
- erased = 1;
- flash = (volatile unsigned long *)info->start[i];
- size = size >> 2; /* divide by 4 for longword access */
- for (k=0; k<size; k++)
- {
- if (*flash++ != 0xffffffff)
- {
- erased = 0;
- break;
- }
- }
-
- if ((i % 5) == 0)
- printf ("\n ");
-
- printf (" %08lX%s%s",
- info->start[i],
- erased ? " E" : " ",
- info->protect[i] ? "RO " : " "
- );
- }
- printf ("\n");
-}
-
-/*-----------------------------------------------------------------------
- */
-
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-static ulong flash_get_size (vu_long *addr, flash_info_t *info)
-{
- short i;
- FLASH_WORD_SIZE value;
- ulong base = (ulong)addr;
- volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *)addr;
-
- /* Write auto select command: read Manufacturer ID */
- addr2[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
- addr2[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
- addr2[ADDR0] = (FLASH_WORD_SIZE)0x00900090;
-
- value = addr2[0];
-
- switch (value) {
- case (FLASH_WORD_SIZE)AMD_MANUFACT:
- info->flash_id = FLASH_MAN_AMD;
- break;
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- return (0); /* no or unknown flash */
- }
-
- value = addr2[1]; /* device ID */
-
- switch (value) {
- case (FLASH_WORD_SIZE)AMD_ID_F032B:
- info->flash_id += FLASH_AM320B;
- info->sector_count = 64;
- info->size = 0x0400000; /* => 4 MB */
- break;
- default:
- info->flash_id = FLASH_UNKNOWN;
- return (0); /* => no or unknown flash */
-
- }
-
- /* set up sector start address table */
- for (i = 0; i < info->sector_count; i++)
- info->start[i] = base + (i * 0x00010000);
-
- /* check for protected sectors */
- for (i = 0; i < info->sector_count; i++) {
- /* read sector protection at sector address, (A7 .. A0) = 0x02 */
- /* D0 = 1 if protected */
- addr2 = (volatile FLASH_WORD_SIZE *)(info->start[i]);
- info->protect[i] = addr2[2] & 1;
- }
-
- /*
- * Prevent writes to uninitialized FLASH.
- */
- if (info->flash_id != FLASH_UNKNOWN) {
- addr2 = (FLASH_WORD_SIZE *)info->start[0];
- *addr2 = (FLASH_WORD_SIZE)0x00F000F0; /* reset bank */
- }
-
- return (info->size);
-}
-
-int wait_for_DQ7(flash_info_t *info, int sect)
-{
- ulong start, now, last;
- volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[sect]);
-
- start = get_timer (0);
- last = start;
- while ((addr[0] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080) {
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- return -1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- }
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[0]);
- volatile FLASH_WORD_SIZE *addr2;
- int flag, prot, sect, l_sect;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("Can't erase unknown flash type - aborted\n");
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- l_sect = -1;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr2 = (FLASH_WORD_SIZE *)(info->start[sect]);
- printf("Erasing sector %p\n", addr2);
-
- addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
- addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
- addr[ADDR0] = (FLASH_WORD_SIZE)0x00800080;
- addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
- addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
- addr2[0] = (FLASH_WORD_SIZE)0x00300030; /* sector erase */
- l_sect = sect;
- /*
- * Wait for each sector to complete, it's more
- * reliable. According to AMD Spec, you must
- * issue all erase commands within a specified
- * timeout. This has been seen to fail, especially
- * if printf()s are included (for debug)!!
- */
- wait_for_DQ7(info, sect);
- }
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- /* reset to read mode */
- addr = (FLASH_WORD_SIZE *)info->start[0];
- addr[0] = (FLASH_WORD_SIZE)0x00F000F0; /* reset bank */
-
- printf (" done\n");
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int i, l, rc;
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
- for (; i<4 && cnt>0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = 0;
- for (i=0; i<4; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- return (write_word(info, wp, data));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word (flash_info_t *info, ulong dest, ulong data)
-{
- volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *)(info->start[0]);
- volatile FLASH_WORD_SIZE *dest2 = (FLASH_WORD_SIZE *)dest;
- volatile FLASH_WORD_SIZE *data2 = (FLASH_WORD_SIZE *)&data;
- ulong start;
- int flag;
- int i;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*((volatile FLASH_WORD_SIZE *)dest) &
- (FLASH_WORD_SIZE)data) != (FLASH_WORD_SIZE)data) {
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- for (i=0; i<4/sizeof(FLASH_WORD_SIZE); i++)
- {
- addr2[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
- addr2[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
- addr2[ADDR0] = (FLASH_WORD_SIZE)0x00A000A0;
-
- dest2[i] = data2[i];
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* data polling for D7 */
- start = get_timer (0);
- while ((dest2[i] & (FLASH_WORD_SIZE)0x00800080) !=
- (data2[i] & (FLASH_WORD_SIZE)0x00800080)) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- return (1);
- }
- }
- }
-
- return (0);
-}
-
-/*-----------------------------------------------------------------------
- */
diff --git a/board/cray/L1/init.S b/board/cray/L1/init.S
deleted file mode 100644
index 72a10d3a1b..0000000000
--- a/board/cray/L1/init.S
+++ /dev/null
@@ -1,147 +0,0 @@
-/*------------------------------------------------------------------------------+ */
-/* */
-/* This source code has been made available to you by IBM on an AS-IS */
-/* basis. Anyone receiving this source is licensed under IBM */
-/* copyrights to use it in any way he or she deems fit, including */
-/* copying it, modifying it, compiling it, and redistributing it either */
-/* with or without modifications. No license under IBM patents or */
-/* patent applications is to be implied by the copyright license. */
-/* */
-/* Any user of this software should understand that IBM cannot provide */
-/* technical support for this software and will not be responsible for */
-/* any consequences resulting from the use of this software. */
-/* */
-/* Any person who transfers this source code or any derivative work */
-/* must include the IBM copyright notice, this paragraph, and the */
-/* preceding two paragraphs in the transferred software. */
-/* */
-/* COPYRIGHT I B M CORPORATION 1995 */
-/* LICENSED MATERIAL - PROGRAM PROPERTY OF I B M */
-/*------------------------------------------------------------------------------- */
-
-/*----------------------------------------------------------------------------- */
-/* Function: ext_bus_cntlr_init */
-/* Description: Initializes the External Bus Controller for the external */
-/* peripherals. IMPORTANT: For pass1 this code must run from */
-/* cache since you can not reliably change a peripheral banks */
-/* timing register (pbxap) while running code from that bank. */
-/* For ex., since we are running from ROM on bank 0, we can NOT */
-/* execute the code that modifies bank 0 timings from ROM, so */
-/* we run it from cache. */
-/* Bank 0 - Flash and SRAM */
-/* Bank 1 - NVRAM/RTC */
-/* Bank 2 - Keyboard/Mouse controller */
-/* Bank 3 - IR controller */
-/* Bank 4 - not used */
-/* Bank 5 - not used */
-/* Bank 6 - not used */
-/* Bank 7 - FPGA registers */
-/*-----------------------------------------------------------------------------#include <config.h> */
-#include <ppc4xx.h>
-
-#define _LINUX_CONFIG_H 1 /* avoid reading Linux autoconf.h file */
-
-#include <ppc_asm.tmpl>
-#include <ppc_defs.h>
-
-#include <asm/cache.h>
-#include <asm/mmu.h>
-
-/* CRAY - L1: only nominally a 'walnut', since ext.Bus.Cntlr is all empty */
-/* except for #1 which we use for DMA'ing to IOCA-like things, so the */
-/* control registers to set that up are determined by what we've */
-/* empirically discovered work there. */
-
- .globl ext_bus_cntlr_init
-ext_bus_cntlr_init:
- mflr r4 /* save link register */
- bl ..getAddr
-..getAddr:
- mflr r3 /* get address of ..getAddr */
- mtlr r4 /* restore link register */
- addi r4,0,14 /* set ctr to 10; used to prefetch */
- mtctr r4 /* 10 cache lines to fit this function */
- /* in cache (gives us 8x10=80 instrctns) */
-..ebcloop:
- icbt r0,r3 /* prefetch cache line for addr in r3 */
- addi r3,r3,32 /* move to next cache line */
- bdnz ..ebcloop /* continue for 10 cache lines */
-
- /*------------------------------------------------------------------- */
- /* Delay to ensure all accesses to ROM are complete before changing */
- /* bank 0 timings. 200usec should be enough. */
- /* 200,000,000 (cycles/sec) X .000200 (sec) = 0x9C40 cycles */
- /*------------------------------------------------------------------- */
- addis r3,0,0x0
- ori r3,r3,0xA000 /* ensure 200usec have passed since reset */
- mtctr r3
-..spinlp:
- bdnz ..spinlp /* spin loop */
-
-
- /*---------------------------------------------------------------------- */
- /* Peripheral Bank 0 (Flash) initialization */
- /*---------------------------------------------------------------------- */
- /* 0x7F8FFE80 slowest boot */
- addi r4,0,pb0ap
- mtdcr ebccfga,r4
- addis r4,0,0x9B01
- ori r4,r4,0x5480
- mtdcr ebccfgd,r4
-
- addi r4,0,pb0cr
- mtdcr ebccfga,r4
- addis r4,0,0xFFC5 /* BAS=0xFFC,BS=0x4(4MB),BU=0x3(R/W), */
- ori r4,r4,0x8000 /* BW=0x0( 8 bits) */
- mtdcr ebccfgd,r4
-
- blr
-
- /*---------------------------------------------------------------------- */
- /* Peripheral Bank 1 (NVRAM/RTC) initialization */
- /* CRAY:the L1 has NOT this bank, it is tied to SV2/IOCA/etc/ instead */
- /* and we do DMA on it. The ConfigurationRegister part is threfore */
- /* almost arbitrary, except that our linux driver needs to know the */
- /* address, but it can query, it.. */
- /* */
- /* The AccessParameter is CRITICAL, */
- /* thouch, since it needs to agree with the electrical timings on the */
- /* IOCA parallel interface. That value is: 0x0185,4380 */
- /* BurstModeEnable BME=0 */
- /* TransferWait TWT=3 */
- /* ChipSelectOnTiming CSN=1 */
- /* OutputEnableOnTimimg OEN=1 */
- /* WriteByteEnableOnTiming WBN=1 */
- /* WriteByteEnableOffTiming WBF=0 */
- /* TransferHold TH=1 */
- /* ReadyEnable RE=1 */
- /* SampleOnReady SOR=1 */
- /* ByteEnableMode BEM=0 */
- /* ParityEnable PEN=0 */
- /* all reserved bits=0 */
- /*---------------------------------------------------------------------- */
- /*---------------------------------------------------------------------- */
- addi r4,0,pb1ap
- mtdcr ebccfga,r4
- addis r4,0,0x0185 /* hiword */
- ori r4,r4,0x4380 /* loword */
- mtdcr ebccfgd,r4
-
- addi r4,0,pb1cr
- mtdcr ebccfga,r4
- addis r4,0,0xF001 /* BAS=0xF00,BS=0x0(1MB),BU=0x3(R/W), */
- ori r4,r4,0x8000 /* BW=0x0( 8 bits) */
- mtdcr ebccfgd,r4
-
- blr
-
-/*----------------------------------------------------------------------------- */
-/* Function: sdram_init */
-/* Description: Configures SDRAM memory banks. */
-/* NOTE: for CrayL1 we have ECC memory, so enable it. */
-/*....now done in C in L1.c:init_sdram for readability. */
-/*----------------------------------------------------------------------------- */
- .globl sdram_init
-
-sdram_init:
- blr
diff --git a/board/cray/L1/patchme b/board/cray/L1/patchme
deleted file mode 100644
index e77ee7e1f5..0000000000
--- a/board/cray/L1/patchme
+++ /dev/null
@@ -1,30 +0,0 @@
-# master confi.mk
-echo "CROSS_COMPILE = powerpc-linux-" >>include/config.mk
-
-# patch the examples/Makefile to ignore return value from OBJCOPY
-sed -e 's/$(OBJCOPY)/-&/' < examples/Makefile > examples/makefile
-
-# add a built target for mkimage on the target architecture
-sed -e 's/^all:.*$/all: .depend envcrc mkimage mkimage.ppc/' < tools/Makefile > tools/makefile
-
-cat <<EOF >>tools/makefile
-mkimage.ppc : mkimage.o.ppc crc32.o.ppc
- powerpc-linux-gcc -msoft-float -Wall -Wstrict-prototypes -o \$@ \$^
- powerpc-linux-strip $@
-
-XFLAGS="-D__KERNEL__ -I../include -DCONFIG_4xx -Wall -Wstict-prototypes"
-mkimage.o.ppc: mkimage.c
- powerpc-linux-gcc -msoft-float -Wall -I../include -c -o \$@ \$^
-
-crc32.o.ppc: crc32.c
- powerpc-linux-gcc -msoft-float -Wall -I../include -c -o \$@ \$^
-
-EOF
-
-# make an image by default out of the u-boot image
-sed -e 's/^all:.*$/all: u-boot.image /' < Makefile > makefile
-cat <<EOF >>makefile
-u-boot.image: u-boot.bin
- tools/mkimage -A ppc -O linux -T firmware -C none -a 0 -e 0 -n U-Boot -d \$^ \$@
-
-EOF
diff --git a/board/cray/L1/u-boot.lds b/board/cray/L1/u-boot.lds
deleted file mode 100644
index cf4bbb921d..0000000000
--- a/board/cray/L1/u-boot.lds
+++ /dev/null
@@ -1,153 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- .resetvec 0xFFFFFFFC :
- {
- *(.resetvec)
- } = 0xffff
-
-
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/ppc4xx/start.o (.text)
- board/cray/L1/init.o (.text)
- cpu/ppc4xx/traps.o (.text)
- cpu/ppc4xx/interrupts.o (.text)
- cpu/ppc4xx/serial.o (.text)
- cpu/ppc4xx/cpu_init.o (.text)
- cpu/ppc4xx/speed.o (.text)
- cpu/ppc4xx/4xx_enet.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/extable.o (.text)
- lib_generic/zlib.o (.text)
-
-/*. = env_offset;*/
- common/environment.o(.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/cray/L1/u-boot.lds.debug b/board/cray/L1/u-boot.lds.debug
deleted file mode 100644
index 1608f8cdaa..0000000000
--- a/board/cray/L1/u-boot.lds.debug
+++ /dev/null
@@ -1,137 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- mpc8xx/start.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/extable.o (.text)
-
- common/environment.o(.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/cray/L1/x2c.awk b/board/cray/L1/x2c.awk
deleted file mode 100644
index 9235e6cb36..0000000000
--- a/board/cray/L1/x2c.awk
+++ /dev/null
@@ -1,6 +0,0 @@
-#!/bin/awk
-BEGIN { print "unsigned char bootscript[] = { \n"}
-{ for (i = 2; i <= NF ; i++ ) printf "0x"$i","
- print ""
-}
-END { print "\n};\n" }
diff --git a/board/csb226/Makefile b/board/csb226/Makefile
deleted file mode 100644
index 5b311a9450..0000000000
--- a/board/csb226/Makefile
+++ /dev/null
@@ -1,47 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := csb226.o flash.o
-SOBJS := lowlevel_init.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS) $(SOBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/csb226/config.mk b/board/csb226/config.mk
deleted file mode 100644
index 23543920c3..0000000000
--- a/board/csb226/config.mk
+++ /dev/null
@@ -1,15 +0,0 @@
-#
-# Linux-Kernel is expected to be at c000'8000, entry c000'8000
-#
-# we load ourself to c170'0000, the upper 1 MB of second bank
-#
-# download areas is c800'0000
-#
-
-# This is the address where U-Boot lives in flash:
-#TEXT_BASE = 0
-
-# FIXME: armboot does only work correctly when being compiled
-# for the addresses _after_ relocation to RAM!! Otherwhise the
-# .bss segment is assumed in flash...
-TEXT_BASE = 0xa1fe0000
diff --git a/board/csb226/csb226.c b/board/csb226/csb226.c
deleted file mode 100644
index c99a71557c..0000000000
--- a/board/csb226/csb226.c
+++ /dev/null
@@ -1,155 +0,0 @@
-/*
- * (C) Copyright 2002
- * Robert Schwebel, Pengutronix, r.schwebel@pengutronix.de
- * Kyle Harris, Nexus Technologies, Inc., kharris@nexus-tech.net
- * Marius Groeger, Sysgo Real-Time Solutions GmbH, mgroeger@sysgo.de
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/arch/pxa-regs.h>
-
-#ifdef CONFIG_SHOW_BOOT_PROGRESS
-# define SHOW_BOOT_PROGRESS(arg) show_boot_progress(arg)
-#else
-# define SHOW_BOOT_PROGRESS(arg)
-#endif
-
-/**
- * misc_init_r: - misc initialisation routines
- */
-
-int misc_init_r(void)
-{
-#if 0
- uchar *str;
-
- /* determine if the software update key is pressed during startup */
- /* not ported yet... */
- if (GPLR0 & 0x00000800) {
- printf("using bootcmd_normal (sw-update button not pressed)\n");
- str = getenv("bootcmd_normal");
- } else {
- printf("using bootcmd_update (sw-update button pressed)\n");
- str = getenv("bootcmd_update");
- }
-
- setenv("bootcmd",str);
-#endif
- return 0;
-}
-
-
-/**
- * board_init: - setup some data structures
- *
- * @return: 0 in case of success
- */
-
-int board_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- /* memory and cpu-speed are setup before relocation */
- /* so we do _nothing_ here */
-
- /* arch number of CSB226 board */
- gd->bd->bi_arch_number = MACH_TYPE_CSB226;
-
- /* adress of boot parameters */
- gd->bd->bi_boot_params = 0xa0000100;
-
- return 0;
-}
-
-
-/**
- * dram_init: - setup dynamic RAM
- *
- * @return: 0 in case of success
- */
-
-int dram_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
-
- return 0;
-}
-
-
-/**
- * csb226_set_led: - switch LEDs on or off
- *
- * @param led: LED to switch (0,1,2)
- * @param state: switch on (1) or off (0)
- */
-
-void csb226_set_led(int led, int state)
-{
- switch(led) {
-
- case 0: if (state==1) {
- GPCR0 |= CSB226_USER_LED0;
- } else if (state==0) {
- GPSR0 |= CSB226_USER_LED0;
- }
- break;
-
- case 1: if (state==1) {
- GPCR0 |= CSB226_USER_LED1;
- } else if (state==0) {
- GPSR0 |= CSB226_USER_LED1;
- }
- break;
-
- case 2: if (state==1) {
- GPCR0 |= CSB226_USER_LED2;
- } else if (state==0) {
- GPSR0 |= CSB226_USER_LED2;
- }
- break;
- }
-
- return;
-}
-
-
-/**
- * show_boot_progress: - indicate state of the boot process
- *
- * @param status: Status number - see README for details.
- *
- * The CSB226 does only have 3 LEDs, so we switch them on at the most
- * important states (1, 5, 15).
- */
-
-void show_boot_progress (int status)
-{
- switch(status) {
- case 1: csb226_set_led(0,1); break;
- case 5: csb226_set_led(1,1); break;
- case 15: csb226_set_led(2,1); break;
- }
-
- return;
-}
diff --git a/board/csb226/flash.c b/board/csb226/flash.c
deleted file mode 100644
index f6dfd96177..0000000000
--- a/board/csb226/flash.c
+++ /dev/null
@@ -1,366 +0,0 @@
-/*
- * (C) Copyright 2002
- * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
- *
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * (C) Copyright 2002
- * Robert Schwebel, Pengutronix, <r.schwebel@pengutronix.de>
- *
- * (C) Copyright 2003 (2 x 16 bit Flash bank patches)
- * Rolf Peukert, IMMS gGmbH, <rolf.peukert@imms.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/arch/pxa-regs.h>
-
-#define FLASH_BANK_SIZE 0x02000000
-#define MAIN_SECT_SIZE 0x40000 /* 2x16 = 256k per sector */
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
-
-
-/**
- * flash_init: - initialize data structures for flash chips
- *
- * @return: size of the flash
- */
-
-ulong flash_init(void)
-{
- int i, j;
- ulong size = 0;
-
- for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
- ulong flashbase = 0;
- flash_info[i].flash_id =
- (INTEL_MANUFACT & FLASH_VENDMASK) |
- (INTEL_ID_28F128J3 & FLASH_TYPEMASK);
- flash_info[i].size = FLASH_BANK_SIZE;
- flash_info[i].sector_count = CFG_MAX_FLASH_SECT;
- memset(flash_info[i].protect, 0, CFG_MAX_FLASH_SECT);
-
- switch (i) {
- case 0:
- flashbase = PHYS_FLASH_1;
- break;
- default:
- panic("configured too many flash banks!\n");
- break;
- }
- for (j = 0; j < flash_info[i].sector_count; j++) {
- flash_info[i].start[j] = flashbase + j*MAIN_SECT_SIZE;
- }
- size += flash_info[i].size;
- }
-
- /* Protect monitor and environment sectors */
- flash_protect(FLAG_PROTECT_SET,
- CFG_FLASH_BASE,
- CFG_FLASH_BASE + monitor_flash_len - 1,
- &flash_info[0]);
-
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1,
- &flash_info[0]);
-
- return size;
-}
-
-
-/**
- * flash_print_info: - print information about the flash situation
- */
-
-void flash_print_info (flash_info_t *info)
-{
- int i, j;
-
- for (j=0; j<CFG_MAX_FLASH_BANKS; j++) {
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case (INTEL_MANUFACT & FLASH_VENDMASK):
- printf ("Intel: ");
- break;
- default:
- printf ("Unknown Vendor ");
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case (INTEL_ID_28F128J3 & FLASH_TYPEMASK):
- printf("28F128J3 (128Mbit)\n");
- break;
- default:
- printf("Unknown Chip Type\n");
- return;
- }
-
- printf(" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf(" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; i++) {
- if ((i % 5) == 0) printf ("\n ");
-
- printf (" %08lX%s", info->start[i],
- info->protect[i] ? " (RO)" : " ");
- }
- printf ("\n");
- info++;
- }
-}
-
-
-/**
- * flash_erase: - erase flash sectors
- */
-
-int flash_erase(flash_info_t *info, int s_first, int s_last)
-{
- int flag, prot, sect;
- int rc = ERR_OK;
-
- if (info->flash_id == FLASH_UNKNOWN)
- return ERR_UNKNOWN_FLASH_TYPE;
-
- if ((s_first < 0) || (s_first > s_last)) {
- return ERR_INVAL;
- }
-
- if ((info->flash_id & FLASH_VENDMASK) != (INTEL_MANUFACT & FLASH_VENDMASK))
- return ERR_UNKNOWN_FLASH_VENDOR;
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) prot++;
- }
-
- if (prot) return ERR_PROTECTED;
-
- /*
- * Disable interrupts which might cause a timeout
- * here. Remember that our exception vectors are
- * at address 0 in the flash, and we don't want a
- * (ticker) exception to happen while the flash
- * chip is in programming mode.
- */
-
- flag = disable_interrupts();
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last && !ctrlc(); sect++) {
-
- printf("Erasing sector %2d ... ", sect);
-
- /* arm simple, non interrupt dependent timer */
- reset_timer_masked();
-
- if (info->protect[sect] == 0) { /* not protected */
- u32 * volatile addr = (u32 * volatile)(info->start[sect]);
-
- /* erase sector: */
- /* The strata flashs are aligned side by side on */
- /* the data bus, so we have to write the commands */
- /* to both chips here: */
-
- *addr = 0x00200020; /* erase setup */
- *addr = 0x00D000D0; /* erase confirm */
-
- while ((*addr & 0x00800080) != 0x00800080) {
- if (get_timer_masked() > CFG_FLASH_ERASE_TOUT) {
- *addr = 0x00B000B0; /* suspend erase*/
- *addr = 0x00FF00FF; /* read mode */
- rc = ERR_TIMOUT;
- goto outahere;
- }
- }
- *addr = 0x00500050; /* clear status register cmd. */
- *addr = 0x00FF00FF; /* reset to read mode */
- }
- printf("ok.\n");
- }
- if (ctrlc()) printf("User Interrupt!\n");
-
-outahere:
- /* allow flash to settle - wait 10 ms */
- udelay_masked(10000);
-
- if (flag) enable_interrupts();
-
- return rc;
-}
-
-/**
- * write_long: - copy memory to flash, assume a bank of 2 devices with 16bit each
- */
-
-static int write_long (flash_info_t *info, ulong dest, ulong data)
-{
- u32 * volatile addr = (u32 * volatile)dest, val;
- int rc = ERR_OK;
- int flag;
-
- /* read array command - just for the case... */
- *addr = 0x00FF00FF;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*addr & data) != data) return ERR_NOT_ERASED;
-
- /*
- * Disable interrupts which might cause a timeout
- * here. Remember that our exception vectors are
- * at address 0 in the flash, and we don't want a
- * (ticker) exception to happen while the flash
- * chip is in programming mode.
- */
- flag = disable_interrupts();
-
- /* clear status register command */
- *addr = 0x00500050;
-
- /* program set-up command */
- *addr = 0x00400040;
-
- /* latch address/data */
- *addr = data;
-
- /* arm simple, non interrupt dependent timer */
- reset_timer_masked();
-
- /* wait while polling the status register */
- while(((val = *addr) & 0x00800080) != 0x00800080) {
- if (get_timer_masked() > CFG_FLASH_WRITE_TOUT) {
- rc = ERR_TIMOUT;
- /* suspend program command */
- *addr = 0x00B000B0;
- goto outahere;
- }
- }
-
- /* check for errors */
- if(val & 0x001A001A) {
- printf("\nFlash write error %02x at address %08lx\n",
- (int)val, (unsigned long)dest);
- if(val & 0x00080008) {
- printf("Voltage range error.\n");
- rc = ERR_PROG_ERROR;
- goto outahere;
- }
- if(val & 0x00020002) {
- printf("Device protect error.\n");
- rc = ERR_PROTECTED;
- goto outahere;
- }
- if(val & 0x00100010) {
- printf("Programming error.\n");
- rc = ERR_PROG_ERROR;
- goto outahere;
- }
- rc = ERR_PROG_ERROR;
- goto outahere;
- }
-
-outahere:
- /* read array command */
- *addr = 0x00FF00FF;
- if (flag) enable_interrupts();
-
- return rc;
-}
-
-
-/**
- * write_buf: - Copy memory to flash.
- *
- * @param info:
- * @param src: source of copy transaction
- * @param addr: where to copy to
- * @param cnt: number of bytes to copy
- *
- * @return error code
- */
-
-/* "long" version, uses 32bit words */
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp;
- ulong data;
- int l;
- int i, rc;
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data >> 8) | (*(uchar *)cp << 24);
- }
- for (; i<4 && cnt>0; ++i) {
- data = (data >> 8) | (*src++ << 24);
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<4; ++i, ++cp) {
- data = (data >> 8) | (*(uchar *)cp << 24);
- }
-
- if ((rc = write_long(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = *((ulong*)src);
- if ((rc = write_long(info, wp, data)) != 0) {
- return (rc);
- }
- src += 4;
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) return ERR_OK;
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
- data = (data >> 8) | (*src++ << 24);
- --cnt;
- }
- for (; i<4; ++i, ++cp) {
- data = (data >> 8) | (*(uchar *)cp << 24);
- }
-
- return write_long(info, wp, data);
-}
diff --git a/board/csb226/lowlevel_init.S b/board/csb226/lowlevel_init.S
deleted file mode 100644
index aa9dcba6fc..0000000000
--- a/board/csb226/lowlevel_init.S
+++ /dev/null
@@ -1,437 +0,0 @@
-/*
- * Most of this taken from Redboot hal_platform_setup.h with cleanup
- *
- * NOTE: I haven't clean this up considerably, just enough to get it
- * running. See hal_platform_setup.h for the source. See
- * board/cradle/lowlevel_init.S for another PXA250 setup that is
- * much cleaner.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <config.h>
-#include <version.h>
-#include <asm/arch/pxa-regs.h>
-
-DRAM_SIZE: .long CFG_DRAM_SIZE
-
-/* wait for coprocessor write complete */
- .macro CPWAIT reg
- mrc p15,0,\reg,c2,c0,0
- mov \reg,\reg
- sub pc,pc,#4
- .endm
-
-_TEXT_BASE:
- .word TEXT_BASE
-
-
-/*
- * Memory setup
- */
-
-.globl lowlevel_init
-lowlevel_init:
-
- mov r10, lr
-
- /* Set up GPIO pins first ----------------------------------------- */
-
- ldr r0, =GPSR0
- ldr r1, =CFG_GPSR0_VAL
- str r1, [r0]
-
- ldr r0, =GPSR1
- ldr r1, =CFG_GPSR1_VAL
- str r1, [r0]
-
- ldr r0, =GPSR2
- ldr r1, =CFG_GPSR2_VAL
- str r1, [r0]
-
- ldr r0, =GPCR0
- ldr r1, =CFG_GPCR0_VAL
- str r1, [r0]
-
- ldr r0, =GPCR1
- ldr r1, =CFG_GPCR1_VAL
- str r1, [r0]
-
- ldr r0, =GPCR2
- ldr r1, =CFG_GPCR2_VAL
- str r1, [r0]
-
- ldr r0, =GPDR0
- ldr r1, =CFG_GPDR0_VAL
- str r1, [r0]
-
- ldr r0, =GPDR1
- ldr r1, =CFG_GPDR1_VAL
- str r1, [r0]
-
- ldr r0, =GPDR2
- ldr r1, =CFG_GPDR2_VAL
- str r1, [r0]
-
- ldr r0, =GAFR0_L
- ldr r1, =CFG_GAFR0_L_VAL
- str r1, [r0]
-
- ldr r0, =GAFR0_U
- ldr r1, =CFG_GAFR0_U_VAL
- str r1, [r0]
-
- ldr r0, =GAFR1_L
- ldr r1, =CFG_GAFR1_L_VAL
- str r1, [r0]
-
- ldr r0, =GAFR1_U
- ldr r1, =CFG_GAFR1_U_VAL
- str r1, [r0]
-
- ldr r0, =GAFR2_L
- ldr r1, =CFG_GAFR2_L_VAL
- str r1, [r0]
-
- ldr r0, =GAFR2_U
- ldr r1, =CFG_GAFR2_U_VAL
- str r1, [r0]
-
- ldr r0, =PSSR /* enable GPIO pins */
- ldr r1, =CFG_PSSR_VAL
- str r1, [r0]
-
-/* ldr r3, =MSC1 / low - bank 2 Lubbock Registers / SRAM */
-/* ldr r2, =CFG_MSC1_VAL / high - bank 3 Ethernet Controller */
-/* str r2, [r3] / need to set MSC1 before trying to write to the HEX LEDs */
-/* ldr r2, [r3] / need to read it back to make sure the value latches (see MSC section of manual) */
-/* */
-/* ldr r1, =LED_BLANK */
-/* mov r0, #0xFF */
-/* str r0, [r1] / turn on hex leds */
-/* */
-/*loop: */
-/* */
-/* ldr r0, =0xB0070001 */
-/* ldr r1, =_LED */
-/* str r0, [r1] / hex display */
-
-
- /* ---------------------------------------------------------------- */
- /* Enable memory interface */
- /* */
- /* The sequence below is based on the recommended init steps */
- /* detailed in the Intel PXA250 Operating Systems Developers Guide, */
- /* Chapter 10. */
- /* ---------------------------------------------------------------- */
-
- /* ---------------------------------------------------------------- */
- /* Step 1: Wait for at least 200 microsedonds to allow internal */
- /* clocks to settle. Only necessary after hard reset... */
- /* FIXME: can be optimized later */
- /* ---------------------------------------------------------------- */
-
- ldr r3, =OSCR /* reset the OS Timer Count to zero */
- mov r2, #0
- str r2, [r3]
- ldr r4, =0x300 /* really 0x2E1 is about 200usec, */
- /* so 0x300 should be plenty */
-1:
- ldr r2, [r3]
- cmp r4, r2
- bgt 1b
-
-mem_init:
-
- ldr r1, =MEMC_BASE /* get memory controller base addr. */
-
- /* ---------------------------------------------------------------- */
- /* Step 2a: Initialize Asynchronous static memory controller */
- /* ---------------------------------------------------------------- */
-
- /* MSC registers: timing, bus width, mem type */
-
- /* MSC0: nCS(0,1) */
- ldr r2, =CFG_MSC0_VAL
- str r2, [r1, #MSC0_OFFSET]
- ldr r2, [r1, #MSC0_OFFSET] /* read back to ensure */
- /* that data latches */
- /* MSC1: nCS(2,3) */
- ldr r2, =CFG_MSC1_VAL
- str r2, [r1, #MSC1_OFFSET]
- ldr r2, [r1, #MSC1_OFFSET]
-
- /* MSC2: nCS(4,5) */
- ldr r2, =CFG_MSC2_VAL
- str r2, [r1, #MSC2_OFFSET]
- ldr r2, [r1, #MSC2_OFFSET]
-
- /* ---------------------------------------------------------------- */
- /* Step 2b: Initialize Card Interface */
- /* ---------------------------------------------------------------- */
-
- /* MECR: Memory Expansion Card Register */
- ldr r2, =CFG_MECR_VAL
- str r2, [r1, #MECR_OFFSET]
- ldr r2, [r1, #MECR_OFFSET]
-
- /* MCMEM0: Card Interface slot 0 timing */
- ldr r2, =CFG_MCMEM0_VAL
- str r2, [r1, #MCMEM0_OFFSET]
- ldr r2, [r1, #MCMEM0_OFFSET]
-
- /* MCMEM1: Card Interface slot 1 timing */
- ldr r2, =CFG_MCMEM1_VAL
- str r2, [r1, #MCMEM1_OFFSET]
- ldr r2, [r1, #MCMEM1_OFFSET]
-
- /* MCATT0: Card Interface Attribute Space Timing, slot 0 */
- ldr r2, =CFG_MCATT0_VAL
- str r2, [r1, #MCATT0_OFFSET]
- ldr r2, [r1, #MCATT0_OFFSET]
-
- /* MCATT1: Card Interface Attribute Space Timing, slot 1 */
- ldr r2, =CFG_MCATT1_VAL
- str r2, [r1, #MCATT1_OFFSET]
- ldr r2, [r1, #MCATT1_OFFSET]
-
- /* MCIO0: Card Interface I/O Space Timing, slot 0 */
- ldr r2, =CFG_MCIO0_VAL
- str r2, [r1, #MCIO0_OFFSET]
- ldr r2, [r1, #MCIO0_OFFSET]
-
- /* MCIO1: Card Interface I/O Space Timing, slot 1 */
- ldr r2, =CFG_MCIO1_VAL
- str r2, [r1, #MCIO1_OFFSET]
- ldr r2, [r1, #MCIO1_OFFSET]
-
- /* ---------------------------------------------------------------- */
- /* Step 2c: Write FLYCNFG FIXME: what's that??? */
- /* ---------------------------------------------------------------- */
-
- /* test if we run from flash or RAM - RAM/BDI: don't setup RAM */
- adr r3, mem_init /* r0 <- current position of code */
- ldr r2, =mem_init
- cmp r3, r2 /* skip init if in place */
- beq initirqs
-
-
- /* ---------------------------------------------------------------- */
- /* Step 2d: Initialize Timing for Sync Memory (SDCLK0) */
- /* ---------------------------------------------------------------- */
-
- /* Before accessing MDREFR we need a valid DRI field, so we set */
- /* this to power on defaults + DRI field. */
-
- ldr r3, =CFG_MDREFR_VAL
- ldr r2, =0xFFF
- and r3, r3, r2
- ldr r4, =0x03ca4000
- orr r4, r4, r3
-
- str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */
- ldr r4, [r1, #MDREFR_OFFSET]
-
-
- /* ---------------------------------------------------------------- */
- /* Step 3: Initialize Synchronous Static Memory (Flash/Peripherals) */
- /* ---------------------------------------------------------------- */
-
- /* Initialize SXCNFG register. Assert the enable bits */
-
- /* Write SXMRS to cause an MRS command to all enabled banks of */
- /* synchronous static memory. Note that SXLCR need not be written */
- /* at this time. */
-
- /* FIXME: we use async mode for now */
-
-
- /* ---------------------------------------------------------------- */
- /* Step 4: Initialize SDRAM */
- /* ---------------------------------------------------------------- */
-
- /* Step 4a: assert MDREFR:K?RUN and configure */
- /* MDREFR:K1DB2 and MDREFR:K2DB2 as desired. */
-
- ldr r4, =CFG_MDREFR_VAL
- str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */
- ldr r4, [r1, #MDREFR_OFFSET]
-
- /* Step 4b: de-assert MDREFR:SLFRSH. */
-
- bic r4, r4, #(MDREFR_SLFRSH)
-
- str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */
- ldr r4, [r1, #MDREFR_OFFSET]
-
-
- /* Step 4c: assert MDREFR:E1PIN and E0PIO */
-
- orr r4, r4, #(MDREFR_E1PIN|MDREFR_E0PIN)
-
- str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */
- ldr r4, [r1, #MDREFR_OFFSET]
-
-
- /* Step 4d: write MDCNFG with MDCNFG:DEx deasserted (set to 0), to */
- /* configure but not enable each SDRAM partition pair. */
-
- ldr r4, =CFG_MDCNFG_VAL
- bic r4, r4, #(MDCNFG_DE0|MDCNFG_DE1)
-
- str r4, [r1, #MDCNFG_OFFSET] /* write back MDCNFG */
- ldr r4, [r1, #MDCNFG_OFFSET]
-
-
- /* Step 4e: Wait for the clock to the SDRAMs to stabilize, */
- /* 100..200 µsec. */
-
- ldr r3, =OSCR /* reset the OS Timer Count to zero */
- mov r2, #0
- str r2, [r3]
- ldr r4, =0x300 /* really 0x2E1 is about 200usec, */
- /* so 0x300 should be plenty */
-1:
- ldr r2, [r3]
- cmp r4, r2
- bgt 1b
-
-
- /* Step 4f: Trigger a number (usually 8) refresh cycles by */
- /* attempting non-burst read or write accesses to disabled */
- /* SDRAM, as commonly specified in the power up sequence */
- /* documented in SDRAM data sheets. The address(es) used */
- /* for this purpose must not be cacheable. */
-
- /* There should 9 writes, since the first write doesn't */
- /* trigger a refresh cycle on PXA250. See Intel PXA250 and */
- /* PXA210 Processors Specification Update, */
- /* Jan 2003, Errata #116, page 30. */
-
-
- ldr r3, =CFG_DRAM_BASE
- str r2, [r3]
- str r2, [r3]
- str r2, [r3]
- str r2, [r3]
- str r2, [r3]
- str r2, [r3]
- str r2, [r3]
- str r2, [r3]
- str r2, [r3]
-
- /* Step 4g: Write MDCNFG with enable bits asserted */
- /* (MDCNFG:DEx set to 1). */
-
- ldr r3, [r1, #MDCNFG_OFFSET]
- orr r3, r3, #(MDCNFG_DE0|MDCNFG_DE1)
- str r3, [r1, #MDCNFG_OFFSET]
-
- /* Step 4h: Write MDMRS. */
-
- ldr r2, =CFG_MDMRS_VAL
- str r2, [r1, #MDMRS_OFFSET]
-
-
- /* We are finished with Intel's memory controller initialisation */
-
- /* ---------------------------------------------------------------- */
- /* Disable (mask) all interrupts at interrupt controller */
- /* ---------------------------------------------------------------- */
-
-initirqs:
-
- mov r1, #0 /* clear int. level register (IRQ, not FIQ) */
- ldr r2, =ICLR
- str r1, [r2]
-
- ldr r2, =ICMR /* mask all interrupts at the controller */
- str r1, [r2]
-
-
- /* ---------------------------------------------------------------- */
- /* Clock initialisation */
- /* ---------------------------------------------------------------- */
-
-initclks:
-
- /* Disable the peripheral clocks, and set the core clock frequency */
- /* (hard-coding at 398.12MHz for now). */
-
- /* Turn Off ALL on-chip peripheral clocks for re-configuration */
- /* Note: See label 'ENABLECLKS' for the re-enabling */
- ldr r1, =CKEN
- mov r2, #0
- str r2, [r1]
-
-
- /* default value in case no valid rotary switch setting is found */
- ldr r2, =(CCCR_L27|CCCR_M2|CCCR_N10) /* DEFAULT: {200/200/100} */
-
- /* ... and write the core clock config register */
- ldr r1, =CCCR
- str r2, [r1]
-
- /* enable the 32Khz oscillator for RTC and PowerManager */
-/*
- ldr r1, =OSCC
- mov r2, #OSCC_OON
- str r2, [r1]
-*/
- /* NOTE: spin here until OSCC.OOK get set, meaning the PLL */
- /* has settled. */
-60:
- ldr r2, [r1]
- ands r2, r2, #1
- beq 60b
-
- /* ---------------------------------------------------------------- */
- /* */
- /* ---------------------------------------------------------------- */
-
- /* Save SDRAM size */
- ldr r1, =DRAM_SIZE
- str r8, [r1]
-
- /* Interrupt init: Mask all interrupts */
- ldr r0, =ICMR /* enable no sources */
- mov r1, #0
- str r1, [r0]
-
- /* FIXME */
-
-#ifndef DEBUG
- /*Disable software and data breakpoints */
- mov r0,#0
- mcr p15,0,r0,c14,c8,0 /* ibcr0 */
- mcr p15,0,r0,c14,c9,0 /* ibcr1 */
- mcr p15,0,r0,c14,c4,0 /* dbcon */
-
- /*Enable all debug functionality */
- mov r0,#0x80000000
- mcr p14,0,r0,c10,c0,0 /* dcsr */
-#endif
-
- /* ---------------------------------------------------------------- */
- /* End lowlevel_init */
- /* ---------------------------------------------------------------- */
-
-endlowlevel_init:
-
- mov pc, lr
diff --git a/board/csb226/u-boot.lds b/board/csb226/u-boot.lds
deleted file mode 100644
index f0102391b3..0000000000
--- a/board/csb226/u-boot.lds
+++ /dev/null
@@ -1,56 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-ENTRY(_start)
-SECTIONS
-{
- . = 0x00000000;
-
- . = ALIGN(4);
- .text :
- {
- cpu/pxa/start.o (.text)
- *(.text)
- }
-
- . = ALIGN(4);
- .rodata : { *(.rodata) }
-
- . = ALIGN(4);
- .data : { *(.data) }
-
- . = ALIGN(4);
- .got : { *(.got) }
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = ALIGN(4);
- __bss_start = .;
- .bss : { *(.bss) }
- _end = .;
-}
diff --git a/board/csb272/Makefile b/board/csb272/Makefile
deleted file mode 100644
index 926e065032..0000000000
--- a/board/csb272/Makefile
+++ /dev/null
@@ -1,51 +0,0 @@
-#
-# (C) Copyright 2000-2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-#OBJS = $(BOARD).o flash.o
-#OBJS = $(BOARD).o strataflash.o
-OBJS = $(BOARD).o
-
-SOBJS = init.o
-
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $^
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/csb272/config.mk b/board/csb272/config.mk
deleted file mode 100644
index 4672f08172..0000000000
--- a/board/csb272/config.mk
+++ /dev/null
@@ -1,36 +0,0 @@
-#
-# (C) Copyright 2000-2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# (C) Copyright 2004
-# Tolunay Orkun, NextIO Inc., torkun@nextio.com.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# Cogent CSB272 board
-#
-
-LDFLAGS += $(LINKER_UNDEFS)
-
-TEXT_BASE := 0xFFFC0000
-#TEXT_BASE := 0x00100000
-
-PLATFORM_RELFLAGS := $(PLATFORM_RELFLAGS)
diff --git a/board/csb272/csb272.c b/board/csb272/csb272.c
deleted file mode 100644
index 24c6f0d986..0000000000
--- a/board/csb272/csb272.c
+++ /dev/null
@@ -1,178 +0,0 @@
-/*
- * (C) Copyright 2004
- * Tolunay Orkun, Nextio Inc., torkun@nextio.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/processor.h>
-#include <i2c.h>
-#include <miiphy.h>
-#include <ppc4xx_enet.h>
-
-/*
- * Configuration data for AMIS FS6377-01 Programmable 3-PLL Clock Generator
- *
- * CLKA output => Epson LCD Controller
- * CLKB output => Not Connected
- * CLKC output => Ethernet
- * CLKD output => UART external clock
- *
- * Note: these values are obtained from device after init by micromonitor
-*/
-uchar pll_fs6377_regs[16] = {
- 0x28, 0xef, 0x53, 0x03, 0x4b, 0x80, 0x32, 0x80,
- 0x94, 0x32, 0x80, 0xd4, 0x56, 0xf6, 0xf6, 0xe0 };
-
-/*
- * pll_init: Initialize AMIS IC FS6377-01 PLL
- *
- * PLL supplies Epson LCD Clock, Ethernet Clock and UART external clock
- *
- */
-int pll_init(void)
-{
- i2c_init(CFG_I2C_SPEED, CFG_I2C_SLAVE);
-
- return i2c_write(CFG_I2C_PLL_ADDR, 0, 1,
- (uchar *) pll_fs6377_regs, sizeof(pll_fs6377_regs));
-}
-
-/*
- * board_early_init_f: do early board initialization
- *
- */
-int board_early_init_f(void)
-{
- /* initialize PLL so UART, LCD, Ethernet clocked at correctly */
- (void) get_clocks();
- pll_init();
-
- /*-------------------------------------------------------------------------+
- | Interrupt controller setup for the Walnut board.
- | Note: IRQ 0-15 405GP internally generated; active high; level sensitive
- | IRQ 16 405GP internally generated; active low; level sensitive
- | IRQ 17-24 RESERVED
- | IRQ 25 (EXT IRQ 0) FPGA; active high; level sensitive
- | IRQ 26 (EXT IRQ 1) SMI; active high; level sensitive
- | IRQ 27 (EXT IRQ 2) Not Used
- | IRQ 28 (EXT IRQ 3) PCI SLOT 3; active low; level sensitive
- | IRQ 29 (EXT IRQ 4) PCI SLOT 2; active low; level sensitive
- | IRQ 30 (EXT IRQ 5) PCI SLOT 1; active low; level sensitive
- | IRQ 31 (EXT IRQ 6) PCI SLOT 0; active low; level sensitive
- | Note for Walnut board:
- | An interrupt taken for the FPGA (IRQ 25) indicates that either
- | the Mouse, Keyboard, IRDA, or External Expansion caused the
- | interrupt. The FPGA must be read to determine which device
- | caused the interrupt. The default setting of the FPGA clears
- |
- +-------------------------------------------------------------------------*/
-
- mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
- mtdcr (uicer, 0x00000000); /* disable all ints */
- mtdcr (uiccr, 0x00000000); /* set all to be non-critical */
- mtdcr (uicpr, 0xFFFFFF83); /* set int polarities */
- mtdcr (uictr, 0x10000000); /* set int trigger levels */
- mtdcr (uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority */
- mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
-
- mtebc (epcr, 0xa8400000); /* EBC always driven */
-
- return 0; /* success */
-}
-
-/*
- * checkboard: identify/verify the board we are running
- *
- * Remark: we just assume it is correct board here!
- *
- */
-int checkboard(void)
-{
- printf("BOARD: Cogent CSB272\n");
-
- return 0; /* success */
-}
-
-/*
- * initram: Determine the size of mounted DRAM
- *
- * Size is determined by reading SDRAM configuration registers as
- * configured by initialization code
- *
- */
-long initdram (int board_type)
-{
- ulong tot_size;
- ulong bank_size;
- ulong tmp;
-
- tot_size = 0;
-
- mtdcr (memcfga, mem_mb0cf);
- tmp = mfdcr (memcfgd);
- if (tmp & 0x00000001) {
- bank_size = 0x00400000 << ((tmp >> 17) & 0x7);
- tot_size += bank_size;
- }
-
- mtdcr (memcfga, mem_mb1cf);
- tmp = mfdcr (memcfgd);
- if (tmp & 0x00000001) {
- bank_size = 0x00400000 << ((tmp >> 17) & 0x7);
- tot_size += bank_size;
- }
-
- mtdcr (memcfga, mem_mb2cf);
- tmp = mfdcr (memcfgd);
- if (tmp & 0x00000001) {
- bank_size = 0x00400000 << ((tmp >> 17) & 0x7);
- tot_size += bank_size;
- }
-
- mtdcr (memcfga, mem_mb3cf);
- tmp = mfdcr (memcfgd);
- if (tmp & 0x00000001) {
- bank_size = 0x00400000 << ((tmp >> 17) & 0x7);
- tot_size += bank_size;
- }
-
- return tot_size;
-}
-
-/*
- * last_stage_init: final configurations (such as PHY etc)
- *
- */
-int last_stage_init(void)
-{
- /* initialize the PHY */
- miiphy_reset("ppc_4xx_eth0", CONFIG_PHY_ADDR);
-
- /* AUTO neg */
- miiphy_write("ppc_4xx_eth0", CONFIG_PHY_ADDR, PHY_BMCR,
- PHY_BMCR_AUTON | PHY_BMCR_RST_NEG);
-
- /* LEDs */
- miiphy_write("ppc_4xx_eth0", CONFIG_PHY_ADDR, PHY_FCSCR, 0x0d08);
-
-
- return 0; /* success */
-}
diff --git a/board/csb272/init.S b/board/csb272/init.S
deleted file mode 100644
index e00ebf89c1..0000000000
--- a/board/csb272/init.S
+++ /dev/null
@@ -1,216 +0,0 @@
-/******************************************************************************
- *
- * This source code has been made available to you by IBM on an AS-IS
- * basis. Anyone receiving this source is licensed under IBM
- * copyrights to use it in any way he or she deems fit, including
- * copying it, modifying it, compiling it, and redistributing it either
- * with or without modifications. No license under IBM patents or
- * patent applications is to be implied by the copyright license.
- *
- * Any user of this software should understand that IBM cannot provide
- * technical support for this software and will not be responsible for
- * any consequences resulting from the use of this software.
- *
- * Any person who transfers this source code or any derivative work
- * must include the IBM copyright notice, this paragraph, and the
- * preceding two paragraphs in the transferred software.
- *
- * COPYRIGHT I B M CORPORATION 1995
- * LICENSED MATERIAL - PROGRAM PROPERTY OF I B M
- *
- *****************************************************************************/
-#include <config.h>
-#include <ppc4xx.h>
-
-#define _LINUX_CONFIG_H 1 /* avoid reading Linux autoconf.h file */
-
-#include <ppc_asm.tmpl>
-#include <ppc_defs.h>
-
-#include <asm/cache.h>
-#include <asm/mmu.h>
-
-#define LI32(reg,val) \
- addis reg,0,val@h;\
- ori reg,reg,val@l
-
-#define WDCR_EBC(reg,val) \
- addi r4,0,reg;\
- mtdcr ebccfga,r4;\
- addis r4,0,val@h;\
- ori r4,r4,val@l;\
- mtdcr ebccfgd,r4
-
-#define WDCR_SDRAM(reg,val) \
- addi r4,0,reg;\
- mtdcr memcfga,r4;\
- addis r4,0,val@h;\
- ori r4,r4,val@l;\
- mtdcr memcfgd,r4
-
-/******************************************************************************
- * Function: ext_bus_cntlr_init
- *
- * Description: Configures EBC Controller and a few basic chip selects.
- *
- * CS0 is setup to get the Boot Flash out of the addresss range
- * so that we may setup a stack. CS7 is setup so that we can
- * access and reset the hardware watchdog.
- *
- * IMPORTANT: For pass1 this code must run from
- * cache since you can not reliably change a peripheral banks
- * timing register (pbxap) while running code from that bank.
- * For ex., since we are running from ROM on bank 0, we can NOT
- * execute the code that modifies bank 0 timings from ROM, so
- * we run it from cache.
- *
- * Notes: Does NOT use the stack.
- *****************************************************************************/
- .section ".text"
- .align 2
- .globl ext_bus_cntlr_init
- .type ext_bus_cntlr_init, @function
-ext_bus_cntlr_init:
- mflr r0
- /********************************************************************
- * Prefetch entire ext_bus_cntrl_init function into the icache.
- * This is necessary because we are going to change the same CS we
- * are executing from. Otherwise a CPU lockup may occur.
- *******************************************************************/
- bl ..getAddr
-..getAddr:
- mflr r3 /* get address of ..getAddr */
-
- /* Calculate number of cache lines for this function */
- addi r4, 0, (((.Lfe0 - ..getAddr) / CFG_CACHELINE_SIZE) + 2)
- mtctr r4
-..ebcloop:
- icbt r0, r3 /* prefetch cache line for addr in r3*/
- addi r3, r3, CFG_CACHELINE_SIZE /* move to next cache line */
- bdnz ..ebcloop /* continue for $CTR cache lines */
-
- /********************************************************************
- * Delay to ensure all accesses to ROM are complete before changing
- * bank 0 timings. 200usec should be enough.
- * 200,000,000 (cycles/sec) X .000200 (sec) = 0x9C40 cycles.
- *******************************************************************/
- addis r3, 0, 0x0
- ori r3, r3, 0xA000 /* wait 200us from reset */
- mtctr r3
-..spinlp:
- bdnz ..spinlp /* spin loop */
-
- /********************************************************************
- * SETUP CPC0_CR0
- *******************************************************************/
- LI32(r4, 0x007000c0)
- mtdcr cntrl0, r4
-
- /********************************************************************
- * Setup CPC0_CR1: Change PCIINT signal to PerWE
- *******************************************************************/
- mfdcr r4, cntrl1
- ori r4, r4, 0x4000
- mtdcr cntrl1, r4
-
- /********************************************************************
- * Setup External Bus Controller (EBC).
- *******************************************************************/
- WDCR_EBC(epcr, 0xd84c0000)
- /********************************************************************
- * Memory Bank 0 (Intel 28F128J3 Flash) initialization
- *******************************************************************/
- /*WDCR_EBC(pb0ap, 0x02869200)*/
- WDCR_EBC(pb0ap, 0x07869200)
- WDCR_EBC(pb0cr, 0xfe0bc000)
- /********************************************************************
- * Memory Bank 1 (Holtek HT6542B PS/2) initialization
- *******************************************************************/
- WDCR_EBC(pb1ap, 0x1f869200)
- WDCR_EBC(pb1cr, 0xf0818000)
- /********************************************************************
- * Memory Bank 2 (Epson S1D13506) initialization
- *******************************************************************/
- WDCR_EBC(pb2ap, 0x05860300)
- WDCR_EBC(pb2cr, 0xf045a000)
- /********************************************************************
- * Memory Bank 3 (Philips SJA1000 CAN Controllers) initialization
- *******************************************************************/
- WDCR_EBC(pb3ap, 0x0387d200)
- WDCR_EBC(pb3cr, 0xf021c000)
- /********************************************************************
- * Memory Bank 4-7 (Unused) initialization
- *******************************************************************/
- WDCR_EBC(pb4ap, 0)
- WDCR_EBC(pb4cr, 0)
- WDCR_EBC(pb5ap, 0)
- WDCR_EBC(pb5cr, 0)
- WDCR_EBC(pb6ap, 0)
- WDCR_EBC(pb6cr, 0)
- WDCR_EBC(pb7ap, 0)
- WDCR_EBC(pb7cr, 0)
-
- /* We are all done */
- mtlr r0 /* Restore link register */
- blr /* Return to calling function */
-.Lfe0: .size ext_bus_cntlr_init,.Lfe0-ext_bus_cntlr_init
-/* end ext_bus_cntlr_init() */
-
-/******************************************************************************
- * Function: sdram_init
- *
- * Description: Configures SDRAM memory banks.
- *
- * Notes: Does NOT use the stack.
- *****************************************************************************/
- .section ".text"
- .align 2
- .globl sdram_init
- .type sdram_init, @function
-sdram_init:
-
- /*
- * Disable memory controller to allow
- * values to be changed.
- */
- WDCR_SDRAM(mem_mcopt1, 0x00000000)
-
- /*
- * Configure Memory Banks
- */
- WDCR_SDRAM(mem_mb0cf, 0x00084001)
- WDCR_SDRAM(mem_mb1cf, 0x00000000)
- WDCR_SDRAM(mem_mb2cf, 0x00000000)
- WDCR_SDRAM(mem_mb3cf, 0x00000000)
-
- /*
- * Set up SDTR1 (SDRAM Timing Register)
- */
- WDCR_SDRAM(mem_sdtr1, 0x00854009)
-
- /*
- * Set RTR (Refresh Timing Register)
- */
- WDCR_SDRAM(mem_rtr, 0x10000000)
- /* WDCR_SDRAM(mem_rtr, 0x05f00000) */
-
- /********************************************************************
- * Delay to ensure 200usec have elapsed since reset. Assume worst
- * case that the core is running 200Mhz:
- * 200,000,000 (cycles/sec) X .000200 (sec) = 0x9C40 cycles
- *******************************************************************/
- addis r3, 0, 0x0000
- ori r3, r3, 0xA000 /* Wait >200us from reset */
- mtctr r3
-..spinlp2:
- bdnz ..spinlp2 /* spin loop */
-
- /********************************************************************
- * Set memory controller options reg, MCOPT1.
- *******************************************************************/
- WDCR_SDRAM(mem_mcopt1,0x80800000)
-
-..sdri_done:
- blr /* Return to calling function */
-.Lfe1: .size sdram_init,.Lfe1-sdram_init
-/* end sdram_init() */
diff --git a/board/csb272/u-boot.lds b/board/csb272/u-boot.lds
deleted file mode 100644
index d75d6d1ce9..0000000000
--- a/board/csb272/u-boot.lds
+++ /dev/null
@@ -1,154 +0,0 @@
-/*
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- .resetvec 0xFFFFFFFC :
- {
- *(.resetvec)
- } = 0xffff
-
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/ppc4xx/start.o (.text)
- board/csb272/init.o (.text)
- cpu/ppc4xx/kgdb.o (.text)
- cpu/ppc4xx/traps.o (.text)
- cpu/ppc4xx/interrupts.o (.text)
- cpu/ppc4xx/serial.o (.text)
- cpu/ppc4xx/cpu_init.o (.text)
- cpu/ppc4xx/speed.o (.text)
- cpu/ppc4xx/4xx_enet.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/crc32.o (.text)
-
- lib_ppc/extable.o (.text)
- lib_ppc/board.o (.text)
- lib_generic/zlib.o (.text)
-/* . = env_offset;*/
-/* common/environment.o(.text)*/
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/csb472/Makefile b/board/csb472/Makefile
deleted file mode 100644
index 926e065032..0000000000
--- a/board/csb472/Makefile
+++ /dev/null
@@ -1,51 +0,0 @@
-#
-# (C) Copyright 2000-2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-#OBJS = $(BOARD).o flash.o
-#OBJS = $(BOARD).o strataflash.o
-OBJS = $(BOARD).o
-
-SOBJS = init.o
-
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $^
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/csb472/config.mk b/board/csb472/config.mk
deleted file mode 100644
index 04aefd1f82..0000000000
--- a/board/csb472/config.mk
+++ /dev/null
@@ -1,36 +0,0 @@
-#
-# (C) Copyright 2000-2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# (C) Copyright 2004
-# Tolunay Orkun, NextIO Inc., torkun@nextio.com.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# Cogent CSB472 board
-#
-
-LDFLAGS += $(LINKER_UNDEFS)
-
-TEXT_BASE := 0xFFFC0000
-#TEXT_BASE := 0x00100000
-
-PLATFORM_RELFLAGS := $(PLATFORM_RELFLAGS)
diff --git a/board/csb472/csb472.c b/board/csb472/csb472.c
deleted file mode 100644
index 833bbce923..0000000000
--- a/board/csb472/csb472.c
+++ /dev/null
@@ -1,145 +0,0 @@
-/*
- * (C) Copyright 2004
- * Tolunay Orkun, Nextio Inc., torkun@nextio.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/processor.h>
-#include <i2c.h>
-#include <miiphy.h>
-#include <ppc4xx_enet.h>
-
-/*
- * board_early_init_f: do early board initialization
- *
- */
-int board_early_init_f(void)
-{
- /*-------------------------------------------------------------------------+
- | Interrupt controller setup for the Walnut board.
- | Note: IRQ 0-15 405GP internally generated; active high; level sensitive
- | IRQ 16 405GP internally generated; active low; level sensitive
- | IRQ 17-24 RESERVED
- | IRQ 25 (EXT IRQ 0) FPGA; active high; level sensitive
- | IRQ 26 (EXT IRQ 1) SMI; active high; level sensitive
- | IRQ 27 (EXT IRQ 2) Not Used
- | IRQ 28 (EXT IRQ 3) PCI SLOT 3; active low; level sensitive
- | IRQ 29 (EXT IRQ 4) PCI SLOT 2; active low; level sensitive
- | IRQ 30 (EXT IRQ 5) PCI SLOT 1; active low; level sensitive
- | IRQ 31 (EXT IRQ 6) PCI SLOT 0; active low; level sensitive
- | Note for Walnut board:
- | An interrupt taken for the FPGA (IRQ 25) indicates that either
- | the Mouse, Keyboard, IRDA, or External Expansion caused the
- | interrupt. The FPGA must be read to determine which device
- | caused the interrupt. The default setting of the FPGA clears
- |
- +-------------------------------------------------------------------------*/
-
- mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
- mtdcr (uicer, 0x00000000); /* disable all ints */
- mtdcr (uiccr, 0x00000000); /* set all to be non-critical */
- mtdcr (uicpr, 0xFFFFFF83); /* set int polarities */
- mtdcr (uictr, 0x10000000); /* set int trigger levels */
- mtdcr (uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority */
- mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
-
- mtebc (epcr, 0xa8400000); /* EBC always driven */
-
- return 0; /* success */
-}
-
-/*
- * checkboard: identify/verify the board we are running
- *
- * Remark: we just assume it is correct board here!
- *
- */
-int checkboard(void)
-{
- printf("BOARD: Cogent CSB472\n");
-
- return 0; /* success */
-}
-
-/*
- * initram: Determine the size of mounted DRAM
- *
- * Size is determined by reading SDRAM configuration registers as
- * configured by initialization code
- *
- */
-long initdram (int board_type)
-{
- ulong tot_size;
- ulong bank_size;
- ulong tmp;
-
- tot_size = 0;
-
- mtdcr (memcfga, mem_mb0cf);
- tmp = mfdcr (memcfgd);
- if (tmp & 0x00000001) {
- bank_size = 0x00400000 << ((tmp >> 17) & 0x7);
- tot_size += bank_size;
- }
-
- mtdcr (memcfga, mem_mb1cf);
- tmp = mfdcr (memcfgd);
- if (tmp & 0x00000001) {
- bank_size = 0x00400000 << ((tmp >> 17) & 0x7);
- tot_size += bank_size;
- }
-
- mtdcr (memcfga, mem_mb2cf);
- tmp = mfdcr (memcfgd);
- if (tmp & 0x00000001) {
- bank_size = 0x00400000 << ((tmp >> 17) & 0x7);
- tot_size += bank_size;
- }
-
- mtdcr (memcfga, mem_mb3cf);
- tmp = mfdcr (memcfgd);
- if (tmp & 0x00000001) {
- bank_size = 0x00400000 << ((tmp >> 17) & 0x7);
- tot_size += bank_size;
- }
-
- return tot_size;
-}
-
-/*
- * last_stage_init: final configurations (such as PHY etc)
- *
- */
-int last_stage_init(void)
-{
- /* initialize the PHY */
- miiphy_reset("ppc_4xx_eth0", CONFIG_PHY_ADDR);
-
- /* AUTO neg */
- miiphy_write("ppc_4xx_eth0", CONFIG_PHY_ADDR, PHY_BMCR,
- PHY_BMCR_AUTON | PHY_BMCR_RST_NEG);
-
- /* LEDs */
- miiphy_write("ppc_4xx_eth0", CONFIG_PHY_ADDR, PHY_FCSCR, 0x0d08);
-
- return 0; /* success */
-}
diff --git a/board/csb472/init.S b/board/csb472/init.S
deleted file mode 100644
index aec42a14b9..0000000000
--- a/board/csb472/init.S
+++ /dev/null
@@ -1,212 +0,0 @@
-/******************************************************************************
- *
- * This source code has been made available to you by IBM on an AS-IS
- * basis. Anyone receiving this source is licensed under IBM
- * copyrights to use it in any way he or she deems fit, including
- * copying it, modifying it, compiling it, and redistributing it either
- * with or without modifications. No license under IBM patents or
- * patent applications is to be implied by the copyright license.
- *
- * Any user of this software should understand that IBM cannot provide
- * technical support for this software and will not be responsible for
- * any consequences resulting from the use of this software.
- *
- * Any person who transfers this source code or any derivative work
- * must include the IBM copyright notice, this paragraph, and the
- * preceding two paragraphs in the transferred software.
- *
- * COPYRIGHT I B M CORPORATION 1995
- * LICENSED MATERIAL - PROGRAM PROPERTY OF I B M
- *
- *****************************************************************************/
-#include <config.h>
-#include <ppc4xx.h>
-
-#define _LINUX_CONFIG_H 1 /* avoid reading Linux autoconf.h file */
-
-#include <ppc_asm.tmpl>
-#include <ppc_defs.h>
-
-#include <asm/cache.h>
-#include <asm/mmu.h>
-
-#define LI32(reg,val) \
- addis reg,0,val@h;\
- ori reg,reg,val@l
-
-#define WDCR_EBC(reg,val) \
- addi r4,0,reg;\
- mtdcr ebccfga,r4;\
- addis r4,0,val@h;\
- ori r4,r4,val@l;\
- mtdcr ebccfgd,r4
-
-#define WDCR_SDRAM(reg,val) \
- addi r4,0,reg;\
- mtdcr memcfga,r4;\
- addis r4,0,val@h;\
- ori r4,r4,val@l;\
- mtdcr memcfgd,r4
-
-/******************************************************************************
- * Function: ext_bus_cntlr_init
- *
- * Description: Configures EBC Controller and a few basic chip selects.
- *
- * CS0 is setup to get the Boot Flash out of the addresss range
- * so that we may setup a stack. CS7 is setup so that we can
- * access and reset the hardware watchdog.
- *
- * IMPORTANT: For pass1 this code must run from
- * cache since you can not reliably change a peripheral banks
- * timing register (pbxap) while running code from that bank.
- * For ex., since we are running from ROM on bank 0, we can NOT
- * execute the code that modifies bank 0 timings from ROM, so
- * we run it from cache.
- *
- * Notes: Does NOT use the stack.
- *****************************************************************************/
- .section ".text"
- .align 2
- .globl ext_bus_cntlr_init
- .type ext_bus_cntlr_init, @function
-ext_bus_cntlr_init:
- mflr r0
- /********************************************************************
- * Prefetch entire ext_bus_cntrl_init function into the icache.
- * This is necessary because we are going to change the same CS we
- * are executing from. Otherwise a CPU lockup may occur.
- *******************************************************************/
- bl ..getAddr
-..getAddr:
- mflr r3 /* get address of ..getAddr */
-
- /* Calculate number of cache lines for this function */
- addi r4, 0, (((.Lfe0 - ..getAddr) / CFG_CACHELINE_SIZE) + 2)
- mtctr r4
-..ebcloop:
- icbt r0, r3 /* prefetch cache line for addr in r3*/
- addi r3, r3, CFG_CACHELINE_SIZE /* move to next cache line */
- bdnz ..ebcloop /* continue for $CTR cache lines */
-
- /********************************************************************
- * Delay to ensure all accesses to ROM are complete before changing
- * bank 0 timings. 200usec should be enough.
- * 200,000,000 (cycles/sec) X .000200 (sec) = 0x9C40 cycles.
- *******************************************************************/
- addis r3, 0, 0x0
- ori r3, r3, 0xA000 /* wait 200us from reset */
- mtctr r3
-..spinlp:
- bdnz ..spinlp /* spin loop */
-
- /********************************************************************
- * SETUP CPC0_CR0
- *******************************************************************/
- LI32(r4, 0x00c01030)
- mtdcr cntrl0, r4
-
- /********************************************************************
- * Setup CPC0_CR1: Change PCIINT signal to PerWE
- *******************************************************************/
- mfdcr r4, cntrl1
- ori r4, r4, 0x4000
- mtdcr cntrl1, r4
-
- /********************************************************************
- * Setup External Bus Controller (EBC).
- *******************************************************************/
- WDCR_EBC(epcr, 0xd84c0000)
- /********************************************************************
- * Memory Bank 0 (Intel 28F640J3 Flash) initialization
- *******************************************************************/
- /*WDCR_EBC(pb0ap, 0x03055200)*/
- /*WDCR_EBC(pb0ap, 0x04055200)*/
- WDCR_EBC(pb0ap, 0x08055200)
- WDCR_EBC(pb0cr, 0xff87a000)
- /********************************************************************
- * Memory Bank 3 (Xilinx XC95144 CPLD) initialization
- *******************************************************************/
- /*WDCR_EBC(pb3ap, 0x07869200)*/
- WDCR_EBC(pb3ap, 0x04055200)
- WDCR_EBC(pb3cr, 0xf081c000)
- /********************************************************************
- * Memory Bank 1,2,4-7 (Unused) initialization
- *******************************************************************/
- WDCR_EBC(pb1ap, 0)
- WDCR_EBC(pb1cr, 0)
- WDCR_EBC(pb2ap, 0)
- WDCR_EBC(pb2cr, 0)
- WDCR_EBC(pb4ap, 0)
- WDCR_EBC(pb4cr, 0)
- WDCR_EBC(pb5ap, 0)
- WDCR_EBC(pb5cr, 0)
- WDCR_EBC(pb6ap, 0)
- WDCR_EBC(pb6cr, 0)
- WDCR_EBC(pb7ap, 0)
- WDCR_EBC(pb7cr, 0)
-
- /* We are all done */
- mtlr r0 /* Restore link register */
- blr /* Return to calling function */
-.Lfe0: .size ext_bus_cntlr_init,.Lfe0-ext_bus_cntlr_init
-/* end ext_bus_cntlr_init() */
-
-/******************************************************************************
- * Function: sdram_init
- *
- * Description: Configures SDRAM memory banks.
- *
- * Notes: Does NOT use the stack.
- *****************************************************************************/
- .section ".text"
- .align 2
- .globl sdram_init
- .type sdram_init, @function
-sdram_init:
-
- /*
- * Disable memory controller to allow
- * values to be changed.
- */
- WDCR_SDRAM(mem_mcopt1, 0x00000000)
-
- /*
- * Configure Memory Banks
- */
- WDCR_SDRAM(mem_mb0cf, 0x00062001)
- WDCR_SDRAM(mem_mb1cf, 0x00000000)
- WDCR_SDRAM(mem_mb2cf, 0x00000000)
- WDCR_SDRAM(mem_mb3cf, 0x00000000)
-
- /*
- * Set up SDTR1 (SDRAM Timing Register)
- */
- WDCR_SDRAM(mem_sdtr1, 0x00854009)
-
- /*
- * Set RTR (Refresh Timing Register)
- */
- WDCR_SDRAM(mem_rtr, 0x10000000)
- /* WDCR_SDRAM(mem_rtr, 0x05f00000) */
-
- /********************************************************************
- * Delay to ensure 200usec have elapsed since reset. Assume worst
- * case that the core is running 200Mhz:
- * 200,000,000 (cycles/sec) X .000200 (sec) = 0x9C40 cycles
- *******************************************************************/
- addis r3, 0, 0x0000
- ori r3, r3, 0xA000 /* Wait >200us from reset */
- mtctr r3
-..spinlp2:
- bdnz ..spinlp2 /* spin loop */
-
- /********************************************************************
- * Set memory controller options reg, MCOPT1.
- *******************************************************************/
- WDCR_SDRAM(mem_mcopt1,0x80800000)
-
-..sdri_done:
- blr /* Return to calling function */
-.Lfe1: .size sdram_init,.Lfe1-sdram_init
-/* end sdram_init() */
diff --git a/board/csb472/u-boot.lds b/board/csb472/u-boot.lds
deleted file mode 100644
index 14ac3fb4fc..0000000000
--- a/board/csb472/u-boot.lds
+++ /dev/null
@@ -1,154 +0,0 @@
-/*
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- .resetvec 0xFFFFFFFC :
- {
- *(.resetvec)
- } = 0xffff
-
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/ppc4xx/start.o (.text)
- board/csb472/init.o (.text)
- cpu/ppc4xx/kgdb.o (.text)
- cpu/ppc4xx/traps.o (.text)
- cpu/ppc4xx/interrupts.o (.text)
- cpu/ppc4xx/serial.o (.text)
- cpu/ppc4xx/cpu_init.o (.text)
- cpu/ppc4xx/speed.o (.text)
- cpu/ppc4xx/4xx_enet.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/crc32.o (.text)
-
- lib_ppc/extable.o (.text)
- lib_ppc/board.o (.text)
- lib_generic/zlib.o (.text)
-/* . = env_offset;*/
-/* common/environment.o(.text)*/
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/csb637/Makefile b/board/csb637/Makefile
deleted file mode 100644
index 61d5a35dd5..0000000000
--- a/board/csb637/Makefile
+++ /dev/null
@@ -1,46 +0,0 @@
-#
-# (C) Copyright 2003
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := csb637.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS) $(SOBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/csb637/config.mk b/board/csb637/config.mk
deleted file mode 100644
index 4c6f631134..0000000000
--- a/board/csb637/config.mk
+++ /dev/null
@@ -1 +0,0 @@
-TEXT_BASE = 0x23fc0000
diff --git a/board/csb637/csb637.c b/board/csb637/csb637.c
deleted file mode 100644
index 6100a53fb7..0000000000
--- a/board/csb637/csb637.c
+++ /dev/null
@@ -1,83 +0,0 @@
-/*
- * (C) Copyright 2005 REA Elektronik GmbH <www.rea.de>
- * Anders Larsen <alarsen@rea.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/arch/AT91RM9200.h>
-#include <at91rm9200_net.h>
-#include <bcm5221.h>
-
-/* ------------------------------------------------------------------------- */
-/*
- * Miscelaneous platform dependent initialisations
- */
-
-int board_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- /* Enable Ctrlc */
- console_init_f ();
-
- /* memory and cpu-speed are setup before relocation */
- /* so we do _nothing_ here */
-
- /* arch number of CSB637-Board */
- gd->bd->bi_arch_number = MACH_TYPE_CSB637;
- /* adress of boot parameters */
- gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
-
- return 0;
-}
-
-int dram_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- gd->bd->bi_dram[0].start = PHYS_SDRAM;
- gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
- return 0;
-}
-
-#ifdef CONFIG_DRIVER_ETHER
-#if (CONFIG_COMMANDS & CFG_CMD_NET)
-
-/*
- * Name:
- * at91rm9200_GetPhyInterface
- * Description:
- * Initialise the interface functions to the PHY
- * Arguments:
- * None
- * Return value:
- * None
- */
-void at91rm9200_GetPhyInterface(AT91PS_PhyOps p_phyops)
-{
- p_phyops->Init = bcm5221_InitPhy;
- p_phyops->IsPhyConnected = bcm5221_IsPhyConnected;
- p_phyops->GetLinkSpeed = bcm5221_GetLinkSpeed;
- p_phyops->AutoNegotiate = bcm5221_AutoNegotiate;
-}
-
-#endif /* CONFIG_COMMANDS & CFG_CMD_NET */
-#endif /* CONFIG_DRIVER_ETHER */
diff --git a/board/csb637/u-boot.lds b/board/csb637/u-boot.lds
deleted file mode 100644
index 76df6b2af1..0000000000
--- a/board/csb637/u-boot.lds
+++ /dev/null
@@ -1,56 +0,0 @@
-/*
- * (C) Copyright 2002
- * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-/*OUTPUT_FORMAT("elf32-arm", "elf32-arm", "elf32-arm")*/
-OUTPUT_ARCH(arm)
-ENTRY(_start)
-SECTIONS
-{
- . = 0x00000000;
-
- . = ALIGN(4);
- .text :
- {
- cpu/arm920t/start.o (.text)
- *(.text)
- }
-
- . = ALIGN(4);
- .rodata : { *(.rodata) }
-
- . = ALIGN(4);
- .data : { *(.data) }
-
- . = ALIGN(4);
- .got : { *(.got) }
-
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = ALIGN(4);
- __bss_start = .;
- .bss : { *(.bss) }
- _end = .;
-}
diff --git a/board/cu824/Makefile b/board/cu824/Makefile
deleted file mode 100644
index 7a2014d466..0000000000
--- a/board/cu824/Makefile
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/cu824/README b/board/cu824/README
deleted file mode 100644
index cc0d207f5d..0000000000
--- a/board/cu824/README
+++ /dev/null
@@ -1,453 +0,0 @@
-ppcboot for a CU824 board
----------------------------
-
-CU824 has two banks of flash 8MB each. In board's notation, bank 0 is
-the one at the address of 0xFF800000 and bank 1 is the one at the
-address of 0xFF000000. On power-up the processor jumps to the address
-of 0xFFF00100, the last megabyte of the bank 0 of flash. Thus,
-U-Boot is configured to reside in flash starting at the address of
-0xFFF00000. The environment space is not embedded in the U-Boot code
-and is located in flash separately from U-Boot, at the address of
-0xFF008000.
-
-
-U-Boot test results
---------------------
-
-x.x Operation on all available serial consoles
-
-x.x.x CONFIG_CONS_INDEX 1
-
-
-ppcboot 0.9.2 (May 13 2001 - 17:56:46)
-
-Initializing...
- CPU: MPC8240 Revsion 1.1 at 247 MHz: 16 kB I-Cache 16 kB D-Cache
- Board: CU824 Revision 1 Local Bus at 99 MHz
- DRAM: 64 MB
- FLASH: 16 MB
- In: serial
- Out: serial
- Err: serial
-
-Hit any key to stop autoboot: 0
-=>
-=>he
-go - start application at address 'addr'
-run - run commands in an environment variable
-bootm - boot application image from memory
-bootp - boot image via network using BootP/TFTP protocol
-tftpboot- boot image via network using TFTP protocol
- and env variables ipaddr and serverip
-rarpboot- boot image via network using RARP/TFTP protocol
-bootd - boot default, i.e., run 'bootcmd'
-loads - load S-Record file over serial line
-loadb - load binary file over serial line (kermit mode)
-md - memory display
-mm - memory modify (auto-incrementing)
-nm - memory modify (constant address)
-mw - memory write (fill)
-cp - memory copy
-cmp - memory compare
-crc32 - checksum calculation
-base - print or set address offset
-printenv- print environment variables
-setenv - set environment variables
-saveenv - save environment variables to persistent storage
-protect - enable or disable FLASH write protection
-erase - erase FLASH memory
-flinfo - print FLASH memory information
-bdinfo - print Board Info structure
-iminfo - print header information for application image
-coninfo - print console devices and informations
-loop - infinite loop on address range
-mtest - simple RAM test
-icache - enable or disable instruction cache
-dcache - enable or disable data cache
-reset - Perform RESET of the CPU
-echo - echo args to console
-version - print monitor version
-help - print online help
-? - alias for 'help'
-=>
-
-
-x.x.x CONFIG_CONS_INDEX 2
-
-**** NOT TESTED ****
-
-x.x Flash Driver Operation
-
-x.x.x Erase Operation
-
-
-ppcboot 0.9.2 (May 13 2001 - 17:56:46)
-
-Initializing...
- CPU: MPC8240 Revsion 1.1 at 247 MHz: 16 kB I-Cache 16 kB D-Cache
- Board: CU824 Revision 1 Local Bus at 99 MHz
- DRAM: 64 MB
- FLASH: 16 MB
- In: serial
- Out: serial
- Err: serial
-
-Hit any key to stop autoboot: 0
-=>
-=>
-=>
-=>md ff000000
-ff000000: 27051956 70706362 6f6f7420 302e382e '..Vppcboot 0.8.
-ff000010: 3320284d 61792031 31203230 3031202d 3 (May 11 2001 -
-ff000020: 2031343a 35373a30 33290000 00000000 14:57:03)......
-ff000030: 00000000 00000000 00000000 00000000 ................
-ff000040: 00000000 00000000 00000000 00000000 ................
-ff000050: 00000000 00000000 00000000 00000000 ................
-ff000060: 00000000 00000000 00000000 00000000 ................
-ff000070: 00000000 00000000 00000000 00000000 ................
-ff000080: 00000000 00000000 00000000 00000000 ................
-ff000090: 00000000 00000000 00000000 00000000 ................
-ff0000a0: 00000000 00000000 00000000 00000000 ................
-ff0000b0: 00000000 00000000 00000000 00000000 ................
-ff0000c0: 00000000 00000000 00000000 00000000 ................
-ff0000d0: 00000000 00000000 00000000 00000000 ................
-ff0000e0: 00000000 00000000 00000000 00000000 ................
-ff0000f0: 00000000 00000000 00000000 00000000 ................
-=>erase ff000000 ff007fff
-Erase Flash from 0xff000000 to 0xff007fff
- done
-Erased 1 sectors
-=>md ff000000
-ff000000: ffffffff ffffffff ffffffff ffffffff ................
-ff000010: ffffffff ffffffff ffffffff ffffffff ................
-ff000020: ffffffff ffffffff ffffffff ffffffff ................
-ff000030: ffffffff ffffffff ffffffff ffffffff ................
-ff000040: ffffffff ffffffff ffffffff ffffffff ................
-ff000050: ffffffff ffffffff ffffffff ffffffff ................
-ff000060: ffffffff ffffffff ffffffff ffffffff ................
-ff000070: ffffffff ffffffff ffffffff ffffffff ................
-ff000080: ffffffff ffffffff ffffffff ffffffff ................
-ff000090: ffffffff ffffffff ffffffff ffffffff ................
-ff0000a0: ffffffff ffffffff ffffffff ffffffff ................
-ff0000b0: ffffffff ffffffff ffffffff ffffffff ................
-ff0000c0: ffffffff ffffffff ffffffff ffffffff ................
-ff0000d0: ffffffff ffffffff ffffffff ffffffff ................
-ff0000e0: ffffffff ffffffff ffffffff ffffffff ................
-ff0000f0: ffffffff ffffffff ffffffff ffffffff ................
-=>
-
-x.x.x Information
-
-
-ppcboot 0.9.2 (May 13 2001 - 17:56:46)
-
-Initializing...
- CPU: MPC8240 Revsion 1.1 at 247 MHz: 16 kB I-Cache 16 kB D-Cache
- Board: CU824 Revision 1 Local Bus at 99 MHz
- DRAM: 64 MB
- FLASH: 16 MB
- In: serial
- Out: serial
- Err: serial
-
-Hit any key to stop autoboot: 0
-=>
-=>
-=>
-=>
-=>flinfo
-
-Bank # 1: Intel: 28F160F3B (16Mbit)
- Size: 8 MB in 39 Sectors
- Sector Start Addresses:
- FF000000 FF008000 (RO) FF010000 FF018000 FF020000
- FF028000 FF030000 FF038000 FF040000 FF080000
- FF0C0000 FF100000 FF140000 FF180000 FF1C0000
- FF200000 FF240000 FF280000 FF2C0000 FF300000
- FF340000 FF380000 FF3C0000 FF400000 FF440000
- FF480000 FF4C0000 FF500000 FF540000 FF580000
- FF5C0000 FF600000 FF640000 FF680000 FF6C0000
- FF700000 FF740000 FF780000 FF7C0000
-
-Bank # 2: Intel: 28F160F3B (16Mbit)
- Size: 8 MB in 39 Sectors
- Sector Start Addresses:
- FF800000 FF808000 FF810000 FF818000 FF820000
- FF828000 FF830000 FF838000 FF840000 FF880000
- FF8C0000 FF900000 FF940000 FF980000 FF9C0000
- FFA00000 FFA40000 FFA80000 FFAC0000 FFB00000
- FFB40000 FFB80000 FFBC0000 FFC00000 FFC40000
- FFC80000 FFCC0000 FFD00000 FFD40000 FFD80000
- FFDC0000 FFE00000 FFE40000 FFE80000 FFEC0000
- FFF00000 (RO) FFF40000 FFF80000 FFFC0000
-=>
-
-x.x.x Flash Programming
-
-
-ppcboot 0.9.2 (May 13 2001 - 17:56:46)
-
-Initializing...
- CPU: MPC8240 Revsion 1.1 at 247 MHz: 16 kB I-Cache 16 kB D-Cache
- Board: CU824 Revision 1 Local Bus at 99 MHz
- DRAM: 64 MB
- FLASH: 16 MB
- In: serial
- Out: serial
- Err: serial
-
-Hit any key to stop autoboot: 0
-=>
-=>
-=>
-=>
-=>cp 0 ff000000 20
-Copy to Flash... done
-=>md 0
-00000000: 0ec08ce0 03f9800c 00000001 040c0000 ................
-00000010: 00000001 03fd1aa0 03fd1ae4 03fd1a00 ................
-00000020: 03fd1a58 03fceb04 03fd34cc 03fd34d0 ...X......4...4.
-00000030: 03fcd5bc 03fcdabc 00000000 00000000 ................
-00000040: 00000000 00000000 00000000 00000000 ................
-00000050: 00000000 00000000 00000000 00000000 ................
-00000060: 00000000 00000000 00000000 00000000 ................
-00000070: 00000000 00000000 00000000 00000000 ................
-00000080: 00000000 00000000 00000000 00000000 ................
-00000090: 00000000 00000000 00000000 00000000 ................
-000000a0: 00000000 00000000 00000000 00000000 ................
-000000b0: 00000000 00000000 00000000 00000000 ................
-000000c0: 00000000 00000000 00000000 00000000 ................
-000000d0: 00000000 00000000 00000000 00000000 ................
-000000e0: 00000000 00000000 00000000 00000000 ................
-000000f0: 00000000 00000000 00000000 00000000 ................
-=>md ff000000
-ff000000: 0ec08ce0 03f9800c 00000001 040c0000 ................
-ff000010: 00000001 03fd1aa0 03fd1ae4 03fd1a00 ................
-ff000020: 03fd1a58 03fceb04 03fd34cc 03fd34d0 ...X......4...4.
-ff000030: 03fcd5bc 03fcdabc 00000000 00000000 ................
-ff000040: 00000000 00000000 00000000 00000000 ................
-ff000050: 00000000 00000000 00000000 00000000 ................
-ff000060: 00000000 00000000 00000000 00000000 ................
-ff000070: 00000000 00000000 00000000 00000000 ................
-ff000080: ffffffff ffffffff ffffffff ffffffff ................
-ff000090: ffffffff ffffffff ffffffff ffffffff ................
-ff0000a0: ffffffff ffffffff ffffffff ffffffff ................
-ff0000b0: ffffffff ffffffff ffffffff ffffffff ................
-ff0000c0: ffffffff ffffffff ffffffff ffffffff ................
-ff0000d0: ffffffff ffffffff ffffffff ffffffff ................
-ff0000e0: ffffffff ffffffff ffffffff ffffffff ................
-ff0000f0: ffffffff ffffffff ffffffff ffffffff ................
-=>
-
-x.x.x Storage of environment variables in flash
-
-
-ppcboot 0.9.2 (May 13 2001 - 17:56:46)
-
-Initializing...
- CPU: MPC8240 Revsion 1.1 at 247 MHz: 16 kB I-Cache 16 kB D-Cache
- Board: CU824 Revision 1 Local Bus at 99 MHz
- DRAM: 64 MB
- FLASH: 16 MB
- In: serial
- Out: serial
- Err: serial
-
-Hit any key to stop autoboot: 0
-=>
-=>printenv
-bootargs=
-bootcmd=bootm FE020000
-bootdelay=5
-baudrate=9600
-ipaddr=192.168.4.2
-serverip=192.168.4.1
-ethaddr=00:40:42:01:00:a0
-stdin=serial
-stdout=serial
-stderr=serial
-
-Environment size: 167/32764 bytes
-=>setenv myvar 1234
-=>save_env
-Un-Protected 1 sectors
-Erasing Flash...
- done
-Erased 1 sectors
-Saving Environment to Flash...
-Protected 1 sectors
-=>reset
-
-
-ppcboot 0.9.2 (May 13 2001 - 17:56:46)
-
-Initializing...
- CPU: MPC8240 Revsion 1.1 at 247 MHz: 16 kB I-Cache 16 kB D-Cache
- Board: CU824 Revision 1 Local Bus at 99 MHz
- DRAM: 64 MB
- FLASH: 16 MB
- In: serial
- Out: serial
- Err: serial
-
-Hit any key to stop autoboot: 0
-=>
-=>printenv
-bootargs=
-bootcmd=bootm FE020000
-bootdelay=5
-baudrate=9600
-ipaddr=192.168.4.2
-serverip=192.168.4.1
-ethaddr=00:40:42:01:00:a0
-myvar=1234
-stdin=serial
-stdout=serial
-stderr=serial
-
-Environment size: 178/32764 bytes
-=>
-
-x.x Image Download and run over serial port
-
-
-ppcboot 0.9.2 (May 13 2001 - 17:56:46)
-
-Initializing...
- CPU: MPC8240 Revsion 1.1 at 247 MHz: 16 kB I-Cache 16 kB D-Cache
- Board: CU824 Revision 1 Local Bus at 99 MHz
- DRAM: 64 MB
- FLASH: 16 MB
- In: serial
- Out: serial
- Err: serial
-
-Hit any key to stop autoboot: 0
-=>
-=>
-=>mw 40000 0 10000
-=>md 40000
-00040000: 00000000 00000000 00000000 00000000 ................
-00040010: 00000000 00000000 00000000 00000000 ................
-00040020: 00000000 00000000 00000000 00000000 ................
-00040030: 00000000 00000000 00000000 00000000 ................
-00040040: 00000000 00000000 00000000 00000000 ................
-00040050: 00000000 00000000 00000000 00000000 ................
-00040060: 00000000 00000000 00000000 00000000 ................
-00040070: 00000000 00000000 00000000 00000000 ................
-00040080: 00000000 00000000 00000000 00000000 ................
-00040090: 00000000 00000000 00000000 00000000 ................
-000400a0: 00000000 00000000 00000000 00000000 ................
-000400b0: 00000000 00000000 00000000 00000000 ................
-000400c0: 00000000 00000000 00000000 00000000 ................
-000400d0: 00000000 00000000 00000000 00000000 ................
-000400e0: 00000000 00000000 00000000 00000000 ................
-000400f0: 00000000 00000000 00000000 00000000 ................
-=>loads
-## Ready for S-Record download ...
-
-(Back at xpert.denx.de)
-[vlad@xpert vlad]$ cat hello_world.srec >/dev/ttyS0
-[vlad@xpert vlad]$ kermit -l /dev/ttyS0 -b 9600 -c
-Connecting to /dev/ttyS0, speed 9600.
-The escape character is Ctrl-\ (ASCII 28, FS)
-Type the escape character followed by C to get back,
-or followed by ? to see other options.
-md 40000
-00040000: 00018148 9421ffe0 7c0802a6 bf61000c ...H.!..|....a..
-00040010: 90010024 48000005 7fc802a6 801effe8 ...$H...........
-00040020: 7fc0f214 7c7f1b78 813f0038 7c9c2378 ....|..x.?.8|.#x
-00040030: 807e8000 7cbd2b78 80090010 3b600000 .~..|.+x....;`..
-00040040: 7c0803a6 4e800021 813f0038 7f84e378 |...N..!.?.8...x
-00040050: 807e8004 80090010 7c0803a6 4e800021 .~......|...N..!
-00040060: 7c1be000 4181003c 80bd0000 813f0038 |...A..<.....?.8
-00040070: 3bbd0004 2c050000 40820008 80be8008 ;...,...@.......
-00040080: 80090010 7f64db78 807e800c 3b7b0001 .....d.x.~..;{..
-00040090: 7c0803a6 4e800021 7c1be000 4081ffcc |...N..!|...@...
-000400a0: 813f0038 807e8010 80090010 7c0803a6 .?.8.~......|...
-000400b0: 4e800021 813f0038 80090004 7c0803a6 N..!.?.8....|...
-000400c0: 4e800021 2c030000 4182ffec 813f0038 N..!,...A....?.8
-000400d0: 80090000 7c0803a6 4e800021 813f0038 ....|...N..!.?.8
-000400e0: 807e8014 80090010 7c0803a6 4e800021 .~......|...N..!
-000400f0: 38600000 80010024 7c0803a6 bb61000c 8`.....$|....a..
-=>go 40004
-## Starting application at 0x00040004 ...
-Hello World
-argc = 1
-argv[0] = "40004"
-argv[1] = "<NULL>"
-Hit any key to exit ...
-
-## Application terminated, rc = 0x0
-=>
-
-x.x Image download and run over ethernet interface
-
-
-ppcboot 0.9.2 (May 13 2001 - 17:56:46)
-
-Initializing...
- CPU: MPC8240 Revsion 1.1 at 247 MHz: 16 kB I-Cache 16 kB D-Cache
- Board: CU824 Revision 1 Local Bus at 99 MHz
- DRAM: 64 MB
- FLASH: 16 MB
- In: serial
- Out: serial
- Err: serial
-
-Hit any key to stop autoboot: 0
-=>
-=>
-=>mw 40000 0 10000
-=>md 40000
-00040000: 00000000 00000000 00000000 00000000 ................
-00040010: 00000000 00000000 00000000 00000000 ................
-00040020: 00000000 00000000 00000000 00000000 ................
-00040030: 00000000 00000000 00000000 00000000 ................
-00040040: 00000000 00000000 00000000 00000000 ................
-00040050: 00000000 00000000 00000000 00000000 ................
-00040060: 00000000 00000000 00000000 00000000 ................
-00040070: 00000000 00000000 00000000 00000000 ................
-00040080: 00000000 00000000 00000000 00000000 ................
-00040090: 00000000 00000000 00000000 00000000 ................
-000400a0: 00000000 00000000 00000000 00000000 ................
-000400b0: 00000000 00000000 00000000 00000000 ................
-000400c0: 00000000 00000000 00000000 00000000 ................
-000400d0: 00000000 00000000 00000000 00000000 ................
-000400e0: 00000000 00000000 00000000 00000000 ................
-000400f0: 00000000 00000000 00000000 00000000 ................
-=>tftpboot 40000 hello_world.bin
-ARP broadcast 1
-TFTP from server 192.168.4.1; our IP address is 192.168.4.2
-Filename 'hello_world.bin'.
-Load address: 0x40000
-Loading: #############
-done
-Bytes transferred = 65912 (10178 hex)
-=>md 40000
-00040000: 00018148 9421ffe0 7c0802a6 bf61000c ...H.!..|....a..
-00040010: 90010024 48000005 7fc802a6 801effe8 ...$H...........
-00040020: 7fc0f214 7c7f1b78 813f0038 7c9c2378 ....|..x.?.8|.#x
-00040030: 807e8000 7cbd2b78 80090010 3b600000 .~..|.+x....;`..
-00040040: 7c0803a6 4e800021 813f0038 7f84e378 |...N..!.?.8...x
-00040050: 807e8004 80090010 7c0803a6 4e800021 .~......|...N..!
-00040060: 7c1be000 4181003c 80bd0000 813f0038 |...A..<.....?.8
-00040070: 3bbd0004 2c050000 40820008 80be8008 ;...,...@.......
-00040080: 80090010 7f64db78 807e800c 3b7b0001 .....d.x.~..;{..
-00040090: 7c0803a6 4e800021 7c1be000 4081ffcc |...N..!|...@...
-000400a0: 813f0038 807e8010 80090010 7c0803a6 .?.8.~......|...
-000400b0: 4e800021 813f0038 80090004 7c0803a6 N..!.?.8....|...
-000400c0: 4e800021 2c030000 4182ffec 813f0038 N..!,...A....?.8
-000400d0: 80090000 7c0803a6 4e800021 813f0038 ....|...N..!.?.8
-000400e0: 807e8014 80090010 7c0803a6 4e800021 .~......|...N..!
-000400f0: 38600000 80010024 7c0803a6 bb61000c 8`.....$|....a..
-=>go 40004
-## Starting application at 0x00040004 ...
-Hello World
-argc = 1
-argv[0] = "40004"
-argv[1] = "<NULL>"
-Hit any key to exit ...
-
-## Application terminated, rc = 0x0
-=>
diff --git a/board/cu824/config.mk b/board/cu824/config.mk
deleted file mode 100644
index 18673e16d4..0000000000
--- a/board/cu824/config.mk
+++ /dev/null
@@ -1,30 +0,0 @@
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# CU824 board
-#
-
-TEXT_BASE = 0xFFF00000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE)
diff --git a/board/cu824/cu824.c b/board/cu824/cu824.c
deleted file mode 100644
index 5844a5cf32..0000000000
--- a/board/cu824/cu824.c
+++ /dev/null
@@ -1,93 +0,0 @@
-/*
- * (C) Copyright 2001
- * Rob Taylor, Flying Pig Systems. robt@flyingpig.com.
- *
- * (C) Copyright 2001, 2002
- * Wolfgang Denk, DENX Software Engineering, <wd@denx.de>
-
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc824x.h>
-#include <asm/processor.h>
-#include <pci.h>
-
-#define BOARD_REV_REG 0xFE80002B
-
-int checkboard (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- char revision = *(volatile char *)(BOARD_REV_REG);
- char buf[32];
-
- puts ("Board: CU824 ");
- printf("Revision %d ", revision);
- printf("Local Bus at %s MHz\n", strmhz(buf, gd->bus_clk));
-
- return 0;
-}
-
-long int initdram(int board_type)
-{
- long size;
- long new_bank0_end;
- long mear1;
- long emear1;
-
- size = get_ram_size(CFG_SDRAM_BASE, CFG_MAX_RAM_SIZE);
-
- new_bank0_end = size - 1;
- mear1 = mpc824x_mpc107_getreg(MEAR1);
- emear1 = mpc824x_mpc107_getreg(EMEAR1);
- mear1 = (mear1 & 0xFFFFFF00) |
- ((new_bank0_end & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT);
- emear1 = (emear1 & 0xFFFFFF00) |
- ((new_bank0_end & MICR_ADDR_MASK) >> MICR_EADDR_SHIFT);
- mpc824x_mpc107_setreg(MEAR1, mear1);
- mpc824x_mpc107_setreg(EMEAR1, emear1);
-
- return (size);
-}
-
-/*
- * Initialize PCI Devices, report devices found.
- */
-#ifndef CONFIG_PCI_PNP
-static struct pci_config_table pci_sandpoint_config_table[] = {
- { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x0f, PCI_ANY_ID,
- pci_cfgfunc_config_device, { PCI_ENET0_IOADDR,
- PCI_ENET0_MEMADDR,
- PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }},
-
- { }
-};
-#endif
-
-struct pci_controller hose = {
-#ifndef CONFIG_PCI_PNP
- config_table: pci_sandpoint_config_table,
-#endif
-};
-
-void pci_init_board(void)
-{
- pci_mpc824x_init(&hose);
-}
diff --git a/board/cu824/flash.c b/board/cu824/flash.c
deleted file mode 100644
index 7368176e54..0000000000
--- a/board/cu824/flash.c
+++ /dev/null
@@ -1,486 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc824x.h>
-#include <asm/processor.h>
-
-#if defined(CFG_ENV_IS_IN_FLASH)
-# ifndef CFG_ENV_ADDR
-# define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_ENV_OFFSET)
-# endif
-# ifndef CFG_ENV_SIZE
-# define CFG_ENV_SIZE CFG_ENV_SECT_SIZE
-# endif
-# ifndef CFG_ENV_SECT_SIZE
-# define CFG_ENV_SECT_SIZE CFG_ENV_SIZE
-# endif
-#endif
-
-#define FLASH_BANK_SIZE 0x800000
-#define MAIN_SECT_SIZE 0x40000
-#define PARAM_SECT_SIZE 0x8000
-
-#define BOARD_CTRL_REG 0xFE800013
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
-
-static int write_data (flash_info_t *info, ulong dest, ulong *data);
-static void write_via_fpu(vu_long *addr, ulong *data);
-static __inline__ unsigned long get_msr(void);
-static __inline__ void set_msr(unsigned long msr);
-
-/*---------------------------------------------------------------------*/
-#undef DEBUG_FLASH
-
-/*---------------------------------------------------------------------*/
-#ifdef DEBUG_FLASH
-#define DEBUGF(fmt,args...) printf(fmt ,##args)
-#else
-#define DEBUGF(fmt,args...)
-#endif
-/*---------------------------------------------------------------------*/
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init(void)
-{
- int i, j;
- ulong size = 0;
- volatile unsigned char *bcr = (volatile unsigned char *)(BOARD_CTRL_REG);
-
- DEBUGF("Write protect was: 0x%02X\n", *bcr);
- *bcr &= 0x1; /* FWPT must be 0 */
- *bcr |= 0x6; /* FWP0 = FWP1 = 1 */
- DEBUGF("Write protect is: 0x%02X\n", *bcr);
-
- for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
- vu_long *addr = (vu_long *)(CFG_FLASH_BASE + i * FLASH_BANK_SIZE);
-
- addr[0] = 0x00900090;
-
- DEBUGF ("Flash bank # %d:\n"
- "\tManuf. ID @ 0x%08lX: 0x%08lX\n"
- "\tDevice ID @ 0x%08lX: 0x%08lX\n",
- i,
- (ulong)(&addr[0]), addr[0],
- (ulong)(&addr[2]), addr[2]);
-
- if ((addr[0] == addr[1]) && (addr[0] == INTEL_MANUFACT) &&
- (addr[2] == addr[3]) && (addr[2] == INTEL_ID_28F160F3B))
- {
- flash_info[i].flash_id = (FLASH_MAN_INTEL & FLASH_VENDMASK) |
- (INTEL_ID_28F160F3B & FLASH_TYPEMASK);
- } else {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- addr[0] = 0xFFFFFFFF;
- goto Done;
- }
-
- DEBUGF ("flash_id = 0x%08lX\n", flash_info[i].flash_id);
-
- addr[0] = 0xFFFFFFFF;
-
- flash_info[i].size = FLASH_BANK_SIZE;
- flash_info[i].sector_count = CFG_MAX_FLASH_SECT;
- memset(flash_info[i].protect, 0, CFG_MAX_FLASH_SECT);
- for (j = 0; j < flash_info[i].sector_count; j++) {
- if (j <= 7) {
- flash_info[i].start[j] = CFG_FLASH_BASE +
- i * FLASH_BANK_SIZE +
- j * PARAM_SECT_SIZE;
- } else {
- flash_info[i].start[j] = CFG_FLASH_BASE +
- i * FLASH_BANK_SIZE +
- (j - 7)*MAIN_SECT_SIZE;
- }
- }
- size += flash_info[i].size;
- }
-
- /* Protect monitor and environment sectors
- */
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE + FLASH_BANK_SIZE
- flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE + monitor_flash_len - 1,
- &flash_info[1]);
-#else
- flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE + monitor_flash_len - 1,
- &flash_info[0]);
-#endif
-#endif
-
-#if (CFG_ENV_IS_IN_FLASH == 1) && defined(CFG_ENV_ADDR)
-#if CFG_ENV_ADDR >= CFG_FLASH_BASE + FLASH_BANK_SIZE
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1,
- &flash_info[1]);
-#else
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1,
- &flash_info[0]);
-#endif
-#endif
-
-Done:
- return size;
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t * info)
-{
- int i;
-
- switch ((i = info->flash_id & FLASH_VENDMASK)) {
- case (FLASH_MAN_INTEL & FLASH_VENDMASK):
- printf ("Intel: ");
- break;
- default:
- printf ("Unknown Vendor 0x%04x ", i);
- break;
- }
-
- switch ((i = info->flash_id & FLASH_TYPEMASK)) {
- case (INTEL_ID_28F160F3B & FLASH_TYPEMASK):
- printf ("28F160F3B (16Mbit)\n");
- break;
- default:
- printf ("Unknown Chip Type 0x%04x\n", i);
- goto Done;
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; i++) {
- if ((i % 5) == 0) {
- printf ("\n ");
- }
- printf (" %08lX%s", info->start[i],
- info->protect[i] ? " (RO)" : " ");
- }
- printf ("\n");
-
-Done:
- return;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- int flag, prot, sect;
- ulong start, now, last;
-
- DEBUGF ("Erase flash bank %d sect %d ... %d\n",
- info - &flash_info[0], s_first, s_last);
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- if ((info->flash_id & FLASH_VENDMASK) !=
- (FLASH_MAN_INTEL & FLASH_VENDMASK)) {
- printf ("Can erase only Intel flash types - aborted\n");
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- start = get_timer (0);
- last = start;
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- vu_long *addr = (vu_long *)(info->start[sect]);
-
- DEBUGF ("Erase sect %d @ 0x%08lX\n",
- sect, (ulong)addr);
-
- /* Disable interrupts which might cause a timeout
- * here.
- */
- flag = disable_interrupts();
-
- addr[0] = 0x00500050; /* clear status register */
- addr[0] = 0x00200020; /* erase setup */
- addr[0] = 0x00D000D0; /* erase confirm */
-
- addr[1] = 0x00500050; /* clear status register */
- addr[1] = 0x00200020; /* erase setup */
- addr[1] = 0x00D000D0; /* erase confirm */
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- while (((addr[0] & 0x00800080) != 0x00800080) ||
- ((addr[1] & 0x00800080) != 0x00800080) ) {
- if ((now=get_timer(start)) >
- CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- addr[0] = 0x00B000B0; /* suspend erase */
- addr[0] = 0x00FF00FF; /* to read mode */
- return 1;
- }
-
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- }
-
- addr[0] = 0x00FF00FF;
- }
- }
- printf (" done\n");
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- * 4 - Flash not identified
- */
-
-#define FLASH_WIDTH 8 /* flash bus width in bytes */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong wp, cp, msr;
- int l, rc, i;
- ulong data[2];
- ulong *datah = &data[0];
- ulong *datal = &data[1];
-
- DEBUGF ("Flash write_buff: @ 0x%08lx, src 0x%08lx len %ld\n",
- addr, (ulong)src, cnt);
-
- if (info->flash_id == FLASH_UNKNOWN) {
- return 4;
- }
-
- msr = get_msr();
- set_msr(msr | MSR_FP);
-
- wp = (addr & ~(FLASH_WIDTH-1)); /* get lower aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- *datah = *datal = 0;
-
- for (i = 0, cp = wp; i < l; i++, cp++) {
- if (i >= 4) {
- *datah = (*datah << 8) |
- ((*datal & 0xFF000000) >> 24);
- }
-
- *datal = (*datal << 8) | (*(uchar *)cp);
- }
- for (; i < FLASH_WIDTH && cnt > 0; ++i) {
- char tmp;
-
- tmp = *src;
-
- src++;
-
- if (i >= 4) {
- *datah = (*datah << 8) |
- ((*datal & 0xFF000000) >> 24);
- }
-
- *datal = (*datal << 8) | tmp;
-
- --cnt; ++cp;
- }
-
- for (; cnt == 0 && i < FLASH_WIDTH; ++i, ++cp) {
- if (i >= 4) {
- *datah = (*datah << 8) |
- ((*datal & 0xFF000000) >> 24);
- }
-
- *datal = (*datah << 8) | (*(uchar *)cp);
- }
-
- if ((rc = write_data(info, wp, data)) != 0) {
- set_msr(msr);
- return (rc);
- }
-
- wp += FLASH_WIDTH;
- }
-
- /*
- * handle FLASH_WIDTH aligned part
- */
- while (cnt >= FLASH_WIDTH) {
- *datah = *(ulong *)src;
- *datal = *(ulong *)(src + 4);
- if ((rc = write_data(info, wp, data)) != 0) {
- set_msr(msr);
- return (rc);
- }
- wp += FLASH_WIDTH;
- cnt -= FLASH_WIDTH;
- src += FLASH_WIDTH;
- }
-
- if (cnt == 0) {
- set_msr(msr);
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- *datah = *datal = 0;
- for (i = 0, cp = wp; i < FLASH_WIDTH && cnt > 0; ++i, ++cp) {
- char tmp;
-
- tmp = *src;
-
- src++;
-
- if (i >= 4) {
- *datah = (*datah << 8) | ((*datal & 0xFF000000) >> 24);
- }
-
- *datal = (*datal << 8) | tmp;
-
- --cnt;
- }
-
- for (; i < FLASH_WIDTH; ++i, ++cp) {
- if (i >= 4) {
- *datah = (*datah << 8) | ((*datal & 0xFF000000) >> 24);
- }
-
- *datal = (*datal << 8) | (*(uchar *)cp);
- }
-
- rc = write_data(info, wp, data);
- set_msr(msr);
-
- return (rc);
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_data (flash_info_t *info, ulong dest, ulong *data)
-{
- vu_long *addr = (vu_long *)dest;
- ulong start;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if (((addr[0] & data[0]) != data[0]) ||
- ((addr[1] & data[1]) != data[1]) ) {
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[0] = 0x00400040; /* write setup */
- write_via_fpu(addr, data);
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- start = get_timer (0);
-
- while (((addr[0] & 0x00800080) != 0x00800080) ||
- ((addr[1] & 0x00800080) != 0x00800080) ) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- addr[0] = 0x00FF00FF; /* restore read mode */
- return (1);
- }
- }
-
- addr[0] = 0x00FF00FF; /* restore read mode */
-
- return (0);
-}
-
-/*-----------------------------------------------------------------------
- */
-static void write_via_fpu(vu_long *addr, ulong *data)
-{
- __asm__ __volatile__ ("lfd 1, 0(%0)" : : "r" (data));
- __asm__ __volatile__ ("stfd 1, 0(%0)" : : "r" (addr));
-}
-/*-----------------------------------------------------------------------
- */
-static __inline__ unsigned long get_msr(void)
-{
- unsigned long msr;
-
- __asm__ __volatile__ ("mfmsr %0" : "=r" (msr) :);
- return msr;
-}
-
-static __inline__ void set_msr(unsigned long msr)
-{
- __asm__ __volatile__ ("mtmsr %0" : : "r" (msr));
-}
diff --git a/board/cu824/u-boot.lds b/board/cu824/u-boot.lds
deleted file mode 100644
index 7be85e4410..0000000000
--- a/board/cu824/u-boot.lds
+++ /dev/null
@@ -1,136 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc824x/start.o (.text)
- lib_ppc/board.o (.text)
- lib_ppc/ppcstring.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
- lib_generic/zlib.o (.text)
-
- . = DEFINED(env_offset) ? env_offset : .;
- common/environment.o (.text)
-
- *(.text)
-
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
-
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/dave/B2/B2.c b/board/dave/B2/B2.c
deleted file mode 100644
index 29676b800f..0000000000
--- a/board/dave/B2/B2.c
+++ /dev/null
@@ -1,128 +0,0 @@
-/*
- * (C) Copyright 2004
- * DAVE Srl
- * http://www.dave-tech.it
- * http://www.wawnet.biz
- * mailto:info@wawnet.biz
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/hardware.h>
-
-/*
- * Miscelaneous platform dependent initialization
- */
-
-int board_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
- u32 temp;
-
- /* Configuration Port Control Register*/
- /* Port A */
- PCONA = 0x3ff;
-
- /* Port B */
- PCONB = 0xff;
- PDATB = 0xFFFF;
-
- /* Port C */
- /*
- PCONC = 0xff55ff15;
- PDATC = 0x0;
- PUPC = 0xffff;
- */
-
- /* Port D */
- /*
- PCOND = 0xaaaa;
- PUPD = 0xff;
- */
-
- /* Port E */
- PCONE = 0x0001aaa9;
- PDATE = 0x0;
- PUPE = 0xff;
-
- /* Port F */
- PCONF = 0x124955;
- PDATF = 0xff; /* B2-eth_reset tied high level */
- /*
- PUPF = 0x1e3;
- */
-
- /* Port G */
- PUPG = 0x1;
- PCONG = 0x3; /*PG0= EINT0= ETH_INT prepared for linux kernel*/
-
- INTMSK = 0x03fffeff;
- INTCON = 0x05;
-
- /*
- Configure chip ethernet interrupt as High level
- Port G EINT 0-7 EINT0 -> CHIP ETHERNET
- */
- temp = EXTINT;
- temp &= ~0x7;
- temp |= 0x1; /*LEVEL_HIGH*/
- EXTINT = temp;
-
- /*
- Reset SMSC LAN91C96 chip
- */
- temp= PCONF;
- temp |= 0x00000040;
- PCONF = temp;
-
- /* Reset high */
- temp = PDATF;
- temp |= (1 << 3);
- PDATF = temp;
-
- /* Short delay */
- for (temp=0;temp<10;temp++)
- {
- /* NOP */
- }
-
- /* Reset low */
- temp = PDATF;
- temp &= ~(1 << 3);
- PDATF = temp;
-
- /* arch number MACH_TYPE_MBA44B0 */
- gd->bd->bi_arch_number = MACH_TYPE_S3C44B0;
-
- /* location of boot parameters */
- gd->bd->bi_boot_params = 0x0c000100;
-
- return 0;
-}
-
-int dram_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
-
- return (0);
-}
diff --git a/board/dave/B2/Makefile b/board/dave/B2/Makefile
deleted file mode 100644
index 548fd528ba..0000000000
--- a/board/dave/B2/Makefile
+++ /dev/null
@@ -1,48 +0,0 @@
-#
-# (C) Copyright 2002
-# Sysgo Real-Time Solutions, GmbH <www.elinos.com>
-# Marius Groeger <mgroeger@sysgo.de>
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := B2.o flash.o
-SOBJS := lowlevel_init.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS) $(SOBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/dave/B2/config.mk b/board/dave/B2/config.mk
deleted file mode 100644
index 521662207c..0000000000
--- a/board/dave/B2/config.mk
+++ /dev/null
@@ -1,30 +0,0 @@
-#
-# (C) Copyright 2000
-# Sysgo Real-Time Solutions, GmbH <www.elinos.com>
-# Marius Groeger <mgroeger@sysgo.de>
-#
-# (C) Copyright 2000-2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-TEXT_BASE = 0x0C100000
-
-PLATFORM_CPPFLAGS += -Uarm
diff --git a/board/dave/B2/flash.c b/board/dave/B2/flash.c
deleted file mode 100644
index ad67e865b3..0000000000
--- a/board/dave/B2/flash.c
+++ /dev/null
@@ -1,76 +0,0 @@
-/*
- * (C) Copyright 2001
- * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/hardware.h>
-
-/*
- * include common flash code (for esd boards)
- */
-#include "../common/flash.c"
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (vu_long * addr, flash_info_t * info);
-static void flash_get_offsets (ulong base, flash_info_t * info);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
-#ifdef __DEBUG_START_FROM_SRAM__
- return CFG_DUMMY_FLASH_SIZE;
-#else
- unsigned long size_b0;
- int i;
-
- /* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* Static FLASH Bank configuration here - FIXME XXX */
-
- size_b0 = flash_get_size((vu_long *)CFG_FLASH_BASE, &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size_b0, size_b0<<20);
- }
-
- /* Setup offsets */
- flash_get_offsets (0, &flash_info[0]);
-
- /* Monitor protection ON by default */
- (void)flash_protect(FLAG_PROTECT_SET,
- -CFG_MONITOR_LEN,
- 0xffffffff,
- &flash_info[0]);
-
- flash_info[0].size = size_b0;
-
- return (size_b0);
-#endif
-}
diff --git a/board/dave/B2/lowlevel_init.S b/board/dave/B2/lowlevel_init.S
deleted file mode 100644
index 2f3a3645ed..0000000000
--- a/board/dave/B2/lowlevel_init.S
+++ /dev/null
@@ -1,167 +0,0 @@
-/*
- * (C) Copyright 2004
- * DAVE Srl
- *
- * http://www.dave-tech.it
- * http://www.wawnet.biz
- * mailto:info@wawnet.biz
- *
- * memsetup-sa1110.S (blob): memory setup for various SA1110 architectures
- * Modified By MATTO
- *
- * Copyright (C) 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl)
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- *
- */
-
-/*
- * Documentation:
- * Intel Corporation, "Intel StrongARM SA-1110 Microprocessor
- * Advanced Developer's manual, December 1999
- *
- * Intel has a very hard to find SDRAM configurator on their web site:
- * http://appzone.intel.com/hcd/sa1110/memory/index.asp
- *
- * NOTE: This code assumes that an SA1110 CPU *always* uses SDRAM. This
- * appears to be true, but it might be possible that somebody designs a
- * board with mixed EDODRAM/SDRAM memory (which is a bad idea). -- Erik
- *
- * 04-10-2001: SELETZ
- * - separated memory config for multiple platform support
- * - perform SA1110 Hardware Reset Procedure
- *
- */
-
-.equ B0_Tacs, 0x0 /* 0clk */
-.equ B0_Tcos, 0x0 /* 0clk */
-.equ B0_Tacc, 0x4 /* 6clk */
-.equ B0_Tcoh, 0x0 /* 0clk */
-.equ B0_Tah, 0x0 /* 0clk */
-.equ B0_Tacp, 0x0 /* 0clk */
-.equ B0_PMC, 0x0 /* normal(1data) */
-/* Bank 1 parameter */
-.equ B1_Tacs, 0x3 /* 4clk */
-.equ B1_Tcos, 0x3 /* 4clk */
-.equ B1_Tacc, 0x7 /* 14clkv */
-.equ B1_Tcoh, 0x3 /* 4clk */
-.equ B1_Tah, 0x3 /* 4clk */
-.equ B1_Tacp, 0x3 /* 6clk */
-.equ B1_PMC, 0x0 /* normal(1data) */
-
-/* Bank 2 parameter - LAN91C96 */
-.equ B2_Tacs, 0x3 /* 4clk */
-.equ B2_Tcos, 0x3 /* 4clk */
-.equ B2_Tacc, 0x7 /* 14clk */
-.equ B2_Tcoh, 0x3 /* 4clk */
-.equ B2_Tah, 0x3 /* 4clk */
-.equ B2_Tacp, 0x3 /* 6clk */
-.equ B2_PMC, 0x0 /* normal(1data) */
-
-/* Bank 3 parameter */
-.equ B3_Tacs, 0x3 /* 4clk */
-.equ B3_Tcos, 0x3 /* 4clk */
-.equ B3_Tacc, 0x7 /* 14clk */
-.equ B3_Tcoh, 0x3 /* 4clk */
-.equ B3_Tah, 0x3 /* 4clk */
-.equ B3_Tacp, 0x3 /* 6clk */
-.equ B3_PMC, 0x0 /* normal(1data) */
-
-/* Bank 4 parameter */
-.equ B4_Tacs, 0x3 /* 4clk */
-.equ B4_Tcos, 0x3 /* 4clk */
-.equ B4_Tacc, 0x7 /* 14clk */
-.equ B4_Tcoh, 0x3 /* 4clk */
-.equ B4_Tah, 0x3 /* 4clk */
-.equ B4_Tacp, 0x3 /* 6clk */
-.equ B4_PMC, 0x0 /* normal(1data) */
-
-/* Bank 5 parameter */
-.equ B5_Tacs, 0x3 /* 4clk */
-.equ B5_Tcos, 0x3 /* 4clk */
-.equ B5_Tacc, 0x7 /* 14clk */
-.equ B5_Tcoh, 0x3 /* 4clk */
-.equ B5_Tah, 0x3 /* 4clk */
-.equ B5_Tacp, 0x3 /* 6clk */
-.equ B5_PMC, 0x0 /* normal(1data) */
-
-/* Bank 6(if SROM) parameter */
-.equ B6_Tacs, 0x3 /* 4clk */
-.equ B6_Tcos, 0x3 /* 4clk */
-.equ B6_Tacc, 0x7 /* 14clk */
-.equ B6_Tcoh, 0x3 /* 4clk */
-.equ B6_Tah, 0x3 /* 4clk */
-.equ B6_Tacp, 0x3 /* 6clk */
-.equ B6_PMC, 0x0 /* normal(1data) */
-
-/* Bank 7(if SROM) parameter */
-.equ B7_Tacs, 0x3 /* 4clk */
-.equ B7_Tcos, 0x3 /* 4clk */
-.equ B7_Tacc, 0x7 /* 14clk */
-.equ B7_Tcoh, 0x3 /* 4clk */
-.equ B7_Tah, 0x3 /* 4clk */
-.equ B7_Tacp, 0x3 /* 6clk */
-.equ B7_PMC, 0x0 /* normal(1data) */
-
-/* Bank 6 parameter */
-.equ B6_MT, 0x3 /* SDRAM */
-.equ B6_Trcd, 0x0 /* 2clk */
-.equ B6_SCAN, 0x0 /* 10bit */
-
-.equ B7_MT, 0x3 /* SDRAM */
-.equ B7_Trcd, 0x0 /* 2clk */
-.equ B7_SCAN, 0x0 /* 10bit */
-
-
-/* REFRESH parameter */
-.equ REFEN, 0x1 /* Refresh enable */
-.equ TREFMD, 0x0 /* CBR(CAS before RAS)/Auto refresh */
-.equ Trp, 0x0 /* 2clk */
-.equ Trc, 0x3 /* 0x1=5clk 0x3=11clk*/
-.equ Tchr, 0x0 /* 0x2=3clk 0x0=0clks */
-.equ REFCNT, 879
-
-MEMORY_CONFIG:
- .long 0x12111900 /* Bank0 = OM[1:0] , Bank1-7 16bit, Bank2=Nowait,UB/LB*/
- .word ((B0_Tacs<<13)+(B0_Tcos<<11)+(B0_Tacc<<8)+(B0_Tcoh<<6)+(B0_Tah<<4)+(B0_Tacp<<2)+(B0_PMC)) /*GCS0*/
- .word ((B1_Tacs<<13)+(B1_Tcos<<11)+(B1_Tacc<<8)+(B1_Tcoh<<6)+(B1_Tah<<4)+(B1_Tacp<<2)+(B1_PMC)) /*GCS1*/
- .word ((B2_Tacs<<13)+(B2_Tcos<<11)+(B2_Tacc<<8)+(B2_Tcoh<<6)+(B2_Tah<<4)+(B2_Tacp<<2)+(B2_PMC)) /*GCS2*/
- .word ((B3_Tacs<<13)+(B3_Tcos<<11)+(B3_Tacc<<8)+(B3_Tcoh<<6)+(B3_Tah<<4)+(B3_Tacp<<2)+(B3_PMC)) /*GCS3*/
- .word ((B4_Tacs<<13)+(B4_Tcos<<11)+(B4_Tacc<<8)+(B4_Tcoh<<6)+(B4_Tah<<4)+(B4_Tacp<<2)+(B4_PMC)) /*GCS4*/
- .word ((B5_Tacs<<13)+(B5_Tcos<<11)+(B5_Tacc<<8)+(B5_Tcoh<<6)+(B5_Tah<<4)+(B5_Tacp<<2)+(B5_PMC)) /*GCS5*/
- .word ((B6_MT<<15)+(B6_Trcd<<2)+(B6_SCAN)) /*GCS6*/
- .word ((B7_MT<<15)+(B7_Trcd<<2)+(B7_SCAN)) /*GCS7*/
- .word ((REFEN<<23)+(TREFMD<<22)+(Trp<<20)+(Trc<<18)+(Tchr<<16)+REFCNT) /*REFRESH RFEN=1, TREFMD=0, trp=3clk, trc=5clk, tchr=3clk,count=1019*/
- .word 0x17 /*SCLK power down mode, BANKSIZE 16M/16M*/
- .word 0x20 /*MRSR6 CL=2clk*/
- .word 0x20 /*MRSR7*/
-
-
-.globl lowlevel_init
-lowlevel_init:
-
- /*
- the next instruction fail due memory relocation...
- we'll find the right MEMORY_CONFIG address with the next 3 lines...
- */
- /*ldr r0, =MEMORY_CONFIG*/
- mov r0, pc
- ldr r1, =(0x38+4)
- sub r0, r0, r1
-
- ldmia r0, {r1-r13}
- ldr r0, =0x01c80000
- stmia r0, {r1-r13}
- mov pc, lr
diff --git a/board/dave/B2/u-boot.lds b/board/dave/B2/u-boot.lds
deleted file mode 100644
index e10ac437ec..0000000000
--- a/board/dave/B2/u-boot.lds
+++ /dev/null
@@ -1,58 +0,0 @@
-/*
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-ENTRY(_start)
-SECTIONS
-{
- . = 0x00000000;
-
- . = ALIGN(4);
- .text :
- {
- cpu/s3c44b0/start.o (.text)
- *(.text)
- }
-
- . = ALIGN(4);
- .rodata : { *(.rodata) }
-
- . = ALIGN(4);
- .data : { *(.data) }
-
- . = ALIGN(4);
- .got : { *(.got) }
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- armboot_end_data = .;
-
- . = ALIGN(4);
- __bss_start = .;
- .bss : { *(.bss) }
- _end = .;
-}
diff --git a/board/dave/PPChameleonEVB/Makefile b/board/dave/PPChameleonEVB/Makefile
deleted file mode 100644
index 39d2feceb4..0000000000
--- a/board/dave/PPChameleonEVB/Makefile
+++ /dev/null
@@ -1,46 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $^
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/dave/PPChameleonEVB/PPChameleonEVB.c b/board/dave/PPChameleonEVB/PPChameleonEVB.c
deleted file mode 100644
index 5f2c705f12..0000000000
--- a/board/dave/PPChameleonEVB/PPChameleonEVB.c
+++ /dev/null
@@ -1,302 +0,0 @@
-/*
- * (C) Copyright 2003
- * DAVE Srl
- * http://www.dave-tech.it
- * http://www.wawnet.biz
- * mailto:info@wawnet.biz
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/processor.h>
-#include <command.h>
-#include <malloc.h>
-
-/* ------------------------------------------------------------------------- */
-
-/* Prototypes */
-int gunzip(void *, int, unsigned char *, unsigned long *);
-
-int board_early_init_f (void)
-{
- out32(GPIO0_OR, CFG_NAND0_CE); /* set initial outputs */
- out32(GPIO0_OR, CFG_NAND1_CE); /* set initial outputs */
-
- /*
- * IRQ 0-15 405GP internally generated; active high; level sensitive
- * IRQ 16 405GP internally generated; active low; level sensitive
- * IRQ 17-24 RESERVED
- * IRQ 25 (EXT IRQ 0)
- * IRQ 26 (EXT IRQ 1)
- * IRQ 27 (EXT IRQ 2)
- * IRQ 28 (EXT IRQ 3)
- * IRQ 29 (EXT IRQ 4)
- * IRQ 30 (EXT IRQ 5)
- * IRQ 31 (EXT IRQ 6)
- */
- mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
- mtdcr(uicer, 0x00000000); /* disable all ints */
- mtdcr(uiccr, 0x00000000); /* set all to be non-critical*/
- mtdcr(uicpr, 0xFFFFFF80); /* set int polarities */
- mtdcr(uictr, 0x10000000); /* set int trigger levels */
- mtdcr(uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority*/
- mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
-
- /*
- * EBC Configuration Register: set ready timeout to 512 ebc-clks -> ca. 15 us
- */
-#if 1 /* test-only */
- mtebc (epcr, 0xa8400000); /* ebc always driven */
-#else
- mtebc (epcr, 0x28400000); /* ebc in high-z */
-#endif
- return 0;
-}
-
-/* ------------------------------------------------------------------------- */
-
-int misc_init_f (void)
-{
- return 0; /* dummy implementation */
-}
-
-extern flash_info_t flash_info[]; /* info for FLASH chips */
-
-int misc_init_r (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- /* adjust flash start and size as well as the offset */
- gd->bd->bi_flashstart = 0 - flash_info[0].size;
- gd->bd->bi_flashoffset= flash_info[0].size - CFG_MONITOR_LEN;
-#if 0
- volatile unsigned short *fpga_mode =
- (unsigned short *)((ulong)CFG_FPGA_BASE_ADDR + CFG_FPGA_CTRL);
- volatile unsigned char *duart0_mcr =
- (unsigned char *)((ulong)DUART0_BA + 4);
- volatile unsigned char *duart1_mcr =
- (unsigned char *)((ulong)DUART1_BA + 4);
-
- bd_t *bd = gd->bd;
- char * tmp; /* Temporary char pointer */
- unsigned char *dst;
- ulong len = sizeof(fpgadata);
- int status;
- int index;
- int i;
- unsigned long cntrl0Reg;
-
- dst = malloc(CFG_FPGA_MAX_SIZE);
- if (gunzip (dst, CFG_FPGA_MAX_SIZE, (uchar *)fpgadata, &len) != 0) {
- printf ("GUNZIP ERROR - must RESET board to recover\n");
- do_reset (NULL, 0, 0, NULL);
- }
-
- status = fpga_boot(dst, len);
- if (status != 0) {
- printf("\nFPGA: Booting failed ");
- switch (status) {
- case ERROR_FPGA_PRG_INIT_LOW:
- printf("(Timeout: INIT not low after asserting PROGRAM*)\n ");
- break;
- case ERROR_FPGA_PRG_INIT_HIGH:
- printf("(Timeout: INIT not high after deasserting PROGRAM*)\n ");
- break;
- case ERROR_FPGA_PRG_DONE:
- printf("(Timeout: DONE not high after programming FPGA)\n ");
- break;
- }
-
- /* display infos on fpgaimage */
- index = 15;
- for (i=0; i<4; i++) {
- len = dst[index];
- printf("FPGA: %s\n", &(dst[index+1]));
- index += len+3;
- }
- putc ('\n');
- /* delayed reboot */
- for (i=20; i>0; i--) {
- printf("Rebooting in %2d seconds \r",i);
- for (index=0;index<1000;index++)
- udelay(1000);
- }
- putc ('\n');
- do_reset(NULL, 0, 0, NULL);
- }
-
- puts("FPGA: ");
-
- /* display infos on fpgaimage */
- index = 15;
- for (i=0; i<4; i++) {
- len = dst[index];
- printf("%s ", &(dst[index+1]));
- index += len+3;
- }
- putc ('\n');
-
- free(dst);
-
- /*
- * Reset FPGA via FPGA_DATA pin
- */
- SET_FPGA(FPGA_PRG | FPGA_CLK);
- udelay(1000); /* wait 1ms */
- SET_FPGA(FPGA_PRG | FPGA_CLK | FPGA_DATA);
- udelay(1000); /* wait 1ms */
-#endif
-
-#if 0
- /*
- * Enable power on PS/2 interface
- */
- *fpga_mode |= CFG_FPGA_CTRL_PS2_RESET;
-
- /*
- * Enable interrupts in exar duart mcr[3]
- */
- *duart0_mcr = 0x08;
- *duart1_mcr = 0x08;
-#endif
- return (0);
-}
-
-/*
- * Check Board Identity:
- */
-
-int checkboard (void)
-{
- char str[64];
- int i = getenv_r ("serial#", str, sizeof(str));
-
- puts ("Board: ");
-
- if (i == -1) {
- puts ("### No HW ID - assuming PPChameleonEVB");
- } else {
- puts(str);
- }
-
- putc ('\n');
-
- return 0;
-}
-
-/* ------------------------------------------------------------------------- */
-
-long int initdram (int board_type)
-{
- unsigned long val;
-
- mtdcr(memcfga, mem_mb0cf);
- val = mfdcr(memcfgd);
-
-#if 0 /* test-only */
- for (;;) {
- NAND_DISABLE_CE(1);
- udelay(100);
- NAND_ENABLE_CE(1);
- udelay(100);
- }
-#endif
-#if 0
- printf("\nmb0cf=%x\n", val); /* test-only */
- printf("strap=%x\n", mfdcr(strap)); /* test-only */
-#endif
-
- return (4*1024*1024 << ((val & 0x000e0000) >> 17));
-}
-
-/* ------------------------------------------------------------------------- */
-
-int testdram (void)
-{
- /* TODO: XXX XXX XXX */
- printf ("test: 16 MB - ok\n");
-
- return (0);
-}
-
-/* ------------------------------------------------------------------------- */
-
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
-extern ulong
-nand_probe(ulong physadr);
-
-void
-nand_init(void)
-{
- ulong totlen = 0;
-
-/*
- The HI model is equipped with a large block NAND chip not supported yet
- by U-Boot
- (CONFIG_PPCHAMELEON_MODULE_MODEL == CONFIG_PPCHAMELEON_MODULE_HI)
-*/
-
-#if (CONFIG_PPCHAMELEON_MODULE_MODEL == CONFIG_PPCHAMELEON_MODULE_ME)
- debug ("Probing at 0x%.8x\n", CFG_NAND0_BASE);
- totlen += nand_probe (CFG_NAND0_BASE);
-#endif /* CONFIG_PPCHAMELEON_MODULE_ME, CONFIG_PPCHAMELEON_MODULE_HI */
-
- debug ("Probing at 0x%.8x\n", CFG_NAND1_BASE);
- totlen += nand_probe (CFG_NAND1_BASE);
-
- printf ("%3lu MB\n", totlen >>20);
-}
-#endif
-
-#ifdef CONFIG_CFB_CONSOLE
-# ifdef CONFIG_CONSOLE_EXTRA_INFO
-# include <video_fb.h>
-extern GraphicDevice smi;
-
-void video_get_info_str (int line_number, char *info)
-{
- uint pvr = get_pvr ();
-
- /* init video info strings for graphic console */
- switch (line_number) {
- case 1:
- switch (pvr) {
- case PVR_405EP_RB:
- sprintf (info, " AMCC PowerPC 405EP Rev. B");
- break;
- default:
- sprintf (info, " AMCC PowerPC 405EP Rev. <unknown>");
- break;
- }
- return;
- case 2:
- sprintf (info, " DAVE Srl PPChameleonEVB - www.dave-tech.it");
- return;
- case 3:
- sprintf (info, " %s", smi.modeIdent);
- return;
- }
-
- /* no more info lines */
- *info = 0;
- return;
-}
-# endif /* CONFIG_CONSOLE_EXTRA_INFO */
-#endif /* CONFIG_CFB_CONSOLE */
diff --git a/board/dave/PPChameleonEVB/config.mk b/board/dave/PPChameleonEVB/config.mk
deleted file mode 100644
index 5856aec0ce..0000000000
--- a/board/dave/PPChameleonEVB/config.mk
+++ /dev/null
@@ -1,28 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-# Reserve 256 kB for Monitor
-TEXT_BASE = 0xFFFC0000
-
-# Reserve 320 kB for Monitor
-#TEXT_BASE = 0xFFFB0000
diff --git a/board/dave/PPChameleonEVB/flash.c b/board/dave/PPChameleonEVB/flash.c
deleted file mode 100644
index 692d275a59..0000000000
--- a/board/dave/PPChameleonEVB/flash.c
+++ /dev/null
@@ -1,114 +0,0 @@
-/*
- * (C) Copyright 2001
- * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <ppc4xx.h>
-#include <asm/processor.h>
-
-/*
- * include common flash code (for esd boards)
- */
-#include "../common/flash.c"
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (vu_long * addr, flash_info_t * info);
-static void flash_get_offsets (ulong base, flash_info_t * info);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
-#ifdef __DEBUG_START_FROM_SRAM__
- return CFG_DUMMY_FLASH_SIZE;
-#else
- unsigned long size;
- int i;
- uint pbcr;
- unsigned long base;
- int size_val = 0;
-
- debug("[%s, %d] Entering ...\n", __FUNCTION__, __LINE__);
- debug("[%s, %d] flash_info = 0x%08X ...\n", __FUNCTION__, __LINE__, flash_info);
-
- /* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* Static FLASH Bank configuration here - FIXME XXX */
-
- debug("[%s, %d] Calling flash_get_size ...\n", __FUNCTION__, __LINE__);
- size = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size, size<<20);
- }
-
- debug("[%s, %d] Test point ...\n", __FUNCTION__, __LINE__);
-
- /* Setup offsets */
- flash_get_offsets (-size, &flash_info[0]);
- debug("[%s, %d] Test point ...\n", __FUNCTION__, __LINE__);
-
- /* Re-do sizing to get full correct info */
- mtdcr(ebccfga, pb0cr);
- pbcr = mfdcr(ebccfgd);
- mtdcr(ebccfga, pb0cr);
- base = -size;
- switch (size) {
- case 1 << 20:
- size_val = 0;
- break;
- case 2 << 20:
- size_val = 1;
- break;
- case 4 << 20:
- size_val = 2;
- break;
- case 8 << 20:
- size_val = 3;
- break;
- case 16 << 20:
- size_val = 4;
- break;
- }
- pbcr = (pbcr & 0x0001ffff) | base | (size_val << 17);
- mtdcr(ebccfgd, pbcr);
- debug("[%s, %d] Test point ...\n", __FUNCTION__, __LINE__);
-
- /* Monitor protection ON by default */
- (void)flash_protect(FLAG_PROTECT_SET,
- -CFG_MONITOR_LEN,
- 0xffffffff,
- &flash_info[0]);
-
- debug("[%s, %d] Test point ...\n", __FUNCTION__, __LINE__);
- flash_info[0].size = size;
-
- return (size);
-#endif
-}
diff --git a/board/dave/PPChameleonEVB/fpgadata.c b/board/dave/PPChameleonEVB/fpgadata.c
deleted file mode 100644
index f5e30dd6e3..0000000000
--- a/board/dave/PPChameleonEVB/fpgadata.c
+++ /dev/null
@@ -1,1139 +0,0 @@
- 0x1f,0x8b,0x08,0x08,0x80,0xb0,0xc0,0x3e,0x00,0x03,0x61,0x73,0x68,0x34,0x30,0x35,
- 0x5f,0x31,0x5f,0x30,0x30,0x2e,0x62,0x69,0x74,0x00,0x94,0x9b,0x7f,0x70,0x14,0x65,
- 0x9a,0xc7,0x9f,0xe9,0xee,0x24,0x9d,0x99,0x4e,0xa6,0x0d,0x84,0x42,0xe5,0x47,0xe7,
- 0xc7,0xba,0xa3,0x37,0x0c,0x63,0x82,0x9a,0x05,0x32,0x69,0x03,0x7f,0xe4,0x84,0x2d,
- 0xd9,0xbd,0xba,0xaa,0xdb,0x5a,0x6b,0x1d,0x5d,0xbc,0xe2,0xb6,0xd0,0xca,0xea,0x55,
- 0x1d,0x67,0x6d,0xdd,0xbd,0x24,0x39,0x08,0x07,0x2b,0x01,0xb9,0x23,0xee,0x51,0x5c,
- 0xf3,0x63,0xcb,0xa8,0xa9,0xad,0x11,0x76,0x0d,0x0a,0xa5,0x4d,0x2e,0x8b,0x21,0x44,
- 0xc8,0xb1,0xd6,0x6e,0x44,0x97,0x1d,0x34,0xab,0x23,0x72,0x18,0xd1,0x92,0x44,0x20,
- 0xb9,0xf7,0xed,0xee,0xf7,0xed,0x9f,0x33,0xc9,0x8e,0x7f,0xf8,0xe4,0x9d,0xd7,0xf6,
- 0x7d,0x9e,0x79,0xfb,0x79,0x3e,0xfd,0x7d,0xde,0x86,0xd2,0xe8,0xb8,0xf9,0x0f,0x40,
- 0xe8,0x31,0x90,0x1f,0x7b,0x66,0xc3,0xb2,0xe4,0x7d,0x8f,0xde,0xfb,0x68,0x32,0x99,
- 0x78,0xea,0xc7,0xeb,0xe1,0x71,0x88,0xd4,0x3d,0x73,0x5f,0xf2,0x89,0x7f,0xfc,0xe9,
- 0xbd,0xcb,0x96,0xc1,0x8f,0xf1,0x5f,0xc9,0x64,0xfd,0xd2,0xe4,0x7d,0x4b,0xef,0xad,
- 0x87,0xf5,0x50,0x7a,0x6f,0x72,0xf9,0xb2,0x65,0xcb,0x97,0x35,0xc0,0x13,0x10,0xaa,
- 0x3f,0x3c,0x8d,0x3f,0x2f,0xbf,0xf0,0xb7,0x7f,0x9f,0x04,0x14,0x02,0x80,0x92,0x64,
- 0x28,0x4d,0xfe,0x1d,0x49,0x86,0x94,0x10,0xa0,0xa6,0x25,0x49,0xd0,0xc9,0xdf,0x60,
- 0x7d,0x5f,0x9a,0x04,0xc5,0xf9,0x77,0x28,0x09,0x2a,0xac,0x03,0x75,0x07,0x54,0x24,
- 0x61,0xe6,0x8f,0x2a,0x20,0x6a,0xfe,0x85,0xf3,0xa7,0x87,0x50,0xde,0x59,0xf6,0xa7,
- 0xe9,0x9a,0x46,0x4d,0x6e,0x16,0xd7,0x0f,0xa9,0xc0,0xae,0x7f,0x61,0x56,0xd7,0xff,
- 0x9a,0x5e,0xff,0x2f,0x9d,0x0f,0x15,0xb3,0x98,0x0e,0x20,0xb0,0xf5,0x58,0xf3,0x11,
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- 0x28,0xa1,0x84,0x12,0xca,0xef,0xbb,0xf0,0xbd,0x03,0x0d,0xf7,0x0e,0xa1,0x84,0x12,
- 0x4a,0x28,0xa1,0x84,0x12,0x4a,0x28,0xa1,0x84,0x12,0x4a,0x75,0xe1,0x7b,0x87,0x9a,
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- 0xa1,0x84,0x12,0x4a,0x28,0xa1,0x84,0x12,0xca,0x17,0x28,0x29,0x16,0x72,0x19,0x5e,
- 0xf9,0x20,0x05,0x36,0xf3,0x62,0x8a,0xa4,0xc0,0xbc,0xe8,0xf3,0x04,0xe7,0x6f,0xd5,
- 0x14,0xe4,0x89,0xff,0xcc,0xe3,0x77,0x15,0xd7,0xfb,0x5f,0x2b,0x92,0xad,0x46,0xf1,
- 0x33,0x01,0x00,
diff --git a/board/dave/PPChameleonEVB/u-boot.lds b/board/dave/PPChameleonEVB/u-boot.lds
deleted file mode 100644
index 481d291874..0000000000
--- a/board/dave/PPChameleonEVB/u-boot.lds
+++ /dev/null
@@ -1,156 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- .resetvec 0xFFFFFFFC :
- {
- *(.resetvec)
- } = 0xffff
-
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/ppc4xx/start.o (.text)
- cpu/ppc4xx/traps.o (.text)
- cpu/ppc4xx/interrupts.o (.text)
- cpu/ppc4xx/serial.o (.text)
- cpu/ppc4xx/cpu_init.o (.text)
- cpu/ppc4xx/speed.o (.text)
- cpu/ppc4xx/4xx_enet.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/extable.o (.text)
- lib_generic/zlib.o (.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
-
- ppcenv_assert = ASSERT(. < 0xFFFF8000, ".bss section too big, overlaps .ppcenv section. Please update your confguration: CFG_MONITOR_BASE, CFG_MONITOR_LEN and TEXT_BASE may need to be modified.");
- . = 0xFFFF8000;
- .ppcenv :
- {
- common/environment.o(.ppcenv);
- }
-
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/dave/common/flash.c b/board/dave/common/flash.c
deleted file mode 100644
index bf0f2bf282..0000000000
--- a/board/dave/common/flash.c
+++ /dev/null
@@ -1,706 +0,0 @@
-/*
- * (C) Copyright 2001
- * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/processor.h>
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static int write_word (flash_info_t *info, ulong dest, ulong data);
-
-/*-----------------------------------------------------------------------
- */
-static void flash_get_offsets (ulong base, flash_info_t *info)
-{
- int i;
- short n;
-
- /* set up sector start address table */
- if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) ||
- ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM640U)) {
- for (i = 0; i < info->sector_count; i++)
- info->start[i] = base + (i * 0x00010000);
- } else if (((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL322B) ||
- ((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL323B) ||
- ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM320B) ||
- ((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL324B)) {
- /* set sector offsets for bottom boot block type */
- for (i=0; i<8; ++i) { /* 8 x 8k boot sectors */
- info->start[i] = base;
- base += 8 << 10;
- }
- while (i < info->sector_count) { /* 64k regular sectors */
- info->start[i] = base;
- base += 64 << 10;
- ++i;
- }
- } else if (((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL322T) ||
- ((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL323T) ||
- ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM320T) ||
- ((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL324T)) {
- /* set sector offsets for top boot block type */
- base += info->size;
- i = info->sector_count;
- for (n=0; n<8; ++n) { /* 8 x 8k boot sectors */
- base -= 8 << 10;
- --i;
- info->start[i] = base;
- }
- while (i > 0) { /* 64k regular sectors */
- base -= 64 << 10;
- --i;
- info->start[i] = base;
- }
- } else {
- if (info->flash_id & FLASH_BTYPE) {
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00004000;
- info->start[2] = base + 0x00006000;
- info->start[3] = base + 0x00008000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00010000) - 0x00030000;
- }
- } else {
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- info->start[i--] = base + info->size - 0x00004000;
- info->start[i--] = base + info->size - 0x00006000;
- info->start[i--] = base + info->size - 0x00008000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00010000;
- }
- }
- }
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t *info)
-{
- int i;
- int k;
- int size;
- int erased;
- volatile unsigned long *flash;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD: printf ("AMD "); break;
- case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
- case FLASH_MAN_SST: printf ("SST "); break;
- case FLASH_MAN_STM: printf ("ST "); break;
- default: printf ("Unknown Vendor "); break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM400B: printf ("AM29LV400B (4 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM400T: printf ("AM29LV400T (4 Mbit, top boot sector)\n");
- break;
- case FLASH_AM800B: printf ("AM29LV800B (8 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM800T: printf ("AM29LV800T (8 Mbit, top boot sector)\n");
- break;
- case FLASH_AM160B: printf ("AM29LV160B (16 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM160T: printf ("AM29LV160T (16 Mbit, top boot sector)\n");
- break;
- case FLASH_AM320T: printf ("AM29LV320T (32 M, top sector)\n");
- break;
- case FLASH_AM320B: printf ("AM29LV320B (32 M, bottom sector)\n");
- break;
- case FLASH_AMDL322T: printf ("AM29DL322T (32 M, top sector)\n");
- break;
- case FLASH_AMDL322B: printf ("AM29DL322B (32 M, bottom sector)\n");
- break;
- case FLASH_AMDL323T: printf ("AM29DL323T (32 M, top sector)\n");
- break;
- case FLASH_AMDL323B: printf ("AM29DL323B (32 M, bottom sector)\n");
- break;
- case FLASH_AM640U: printf ("AM29LV640D (64 M, uniform sector)\n");
- break;
- case FLASH_SST800A: printf ("SST39LF/VF800 (8 Mbit, uniform sector size)\n");
- break;
- case FLASH_SST160A: printf ("SST39LF/VF160 (16 Mbit, uniform sector size)\n");
- break;
- case FLASH_STMW320DT: printf ("M29W320DT (32 M, top sector)\n");
- break;
- default: printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
-#ifdef CFG_FLASH_EMPTY_INFO
- /*
- * Check if whole sector is erased
- */
- if (i != (info->sector_count-1))
- size = info->start[i+1] - info->start[i];
- else
- size = info->start[0] + info->size - info->start[i];
- erased = 1;
- flash = (volatile unsigned long *)info->start[i];
- size = size >> 2; /* divide by 4 for longword access */
- for (k=0; k<size; k++)
- {
- if (*flash++ != 0xffffffff)
- {
- erased = 0;
- break;
- }
- }
-
- if ((i % 5) == 0)
- printf ("\n ");
- /* print empty and read-only info */
- printf (" %08lX%s%s",
- info->start[i],
- erased ? " E" : " ",
- info->protect[i] ? "RO " : " ");
-#else
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " ");
-#endif
-
- }
- printf ("\n");
- return;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-static ulong flash_get_size (vu_long *addr, flash_info_t *info)
-{
- short i;
- short n;
- CFG_FLASH_WORD_SIZE value;
- ulong base = (ulong)addr;
- volatile CFG_FLASH_WORD_SIZE *addr2 = (CFG_FLASH_WORD_SIZE *)addr;
-
- debug("[%s, %d] Entering ...\n", __FUNCTION__, __LINE__);
-
- /* Write auto select command: read Manufacturer ID */
- addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE)0x00AA00AA;
- addr2[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE)0x00550055;
- addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE)0x00900090;
-
- value = addr2[CFG_FLASH_READ0];
-
- switch (value) {
- case (CFG_FLASH_WORD_SIZE)AMD_MANUFACT:
- info->flash_id = FLASH_MAN_AMD;
- break;
- case (CFG_FLASH_WORD_SIZE)FUJ_MANUFACT:
- info->flash_id = FLASH_MAN_FUJ;
- break;
- case (CFG_FLASH_WORD_SIZE)SST_MANUFACT:
- info->flash_id = FLASH_MAN_SST;
- break;
- case (CFG_FLASH_WORD_SIZE)STM_MANUFACT:
- info->flash_id = FLASH_MAN_STM;
- break;
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- return (0); /* no or unknown flash */
- }
-
- value = addr2[CFG_FLASH_READ1]; /* device ID */
-
- switch (value) {
- case (CFG_FLASH_WORD_SIZE)AMD_ID_LV400T:
- info->flash_id += FLASH_AM400T;
- info->sector_count = 11;
- info->size = 0x00080000;
- break; /* => 0.5 MB */
-
- case (CFG_FLASH_WORD_SIZE)AMD_ID_LV400B:
- info->flash_id += FLASH_AM400B;
- info->sector_count = 11;
- info->size = 0x00080000;
- break; /* => 0.5 MB */
-
- case (CFG_FLASH_WORD_SIZE)AMD_ID_LV800T:
- info->flash_id += FLASH_AM800T;
- info->sector_count = 19;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case (CFG_FLASH_WORD_SIZE)AMD_ID_LV800B:
- info->flash_id += FLASH_AM800B;
- info->sector_count = 19;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case (CFG_FLASH_WORD_SIZE)AMD_ID_LV160T:
- info->flash_id += FLASH_AM160T;
- info->sector_count = 35;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case (CFG_FLASH_WORD_SIZE)AMD_ID_LV160B:
- info->flash_id += FLASH_AM160B;
- info->sector_count = 35;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case (CFG_FLASH_WORD_SIZE)STM_ID_29W320DT:
- info->flash_id += FLASH_STMW320DT;
- info->sector_count = 67;
- info->size = 0x00400000; break; /* => 4 MB */
-
- case (CFG_FLASH_WORD_SIZE)AMD_ID_LV320T:
- info->flash_id += FLASH_AM320T;
- info->sector_count = 71;
- info->size = 0x00400000; break; /* => 4 MB */
-
- case (CFG_FLASH_WORD_SIZE)AMD_ID_LV320B:
- info->flash_id += FLASH_AM320B;
- info->sector_count = 71;
- info->size = 0x00400000; break; /* => 4 MB */
-
- case (CFG_FLASH_WORD_SIZE)AMD_ID_DL322T:
- info->flash_id += FLASH_AMDL322T;
- info->sector_count = 71;
- info->size = 0x00400000; break; /* => 4 MB */
-
- case (CFG_FLASH_WORD_SIZE)AMD_ID_DL322B:
- info->flash_id += FLASH_AMDL322B;
- info->sector_count = 71;
- info->size = 0x00400000; break; /* => 4 MB */
-
- case (CFG_FLASH_WORD_SIZE)AMD_ID_DL323T:
- info->flash_id += FLASH_AMDL323T;
- info->sector_count = 71;
- info->size = 0x00400000; break; /* => 4 MB */
-
- case (CFG_FLASH_WORD_SIZE)AMD_ID_DL323B:
- info->flash_id += FLASH_AMDL323B;
- info->sector_count = 71;
- info->size = 0x00400000; break; /* => 4 MB */
-
- case (CFG_FLASH_WORD_SIZE)AMD_ID_LV640U:
- info->flash_id += FLASH_AM640U;
- info->sector_count = 128;
- info->size = 0x00800000; break; /* => 8 MB */
-
- case (CFG_FLASH_WORD_SIZE)SST_ID_xF800A:
- info->flash_id += FLASH_SST800A;
- info->sector_count = 16;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case (CFG_FLASH_WORD_SIZE)SST_ID_xF160A:
- info->flash_id += FLASH_SST160A;
- info->sector_count = 32;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- return (0); /* => no or unknown flash */
-
- }
-
- /* set up sector start address table */
- if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) ||
- ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM640U)) {
- for (i = 0; i < info->sector_count; i++)
- info->start[i] = base + (i * 0x00010000);
- } else if (((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL322B) ||
- ((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL323B) ||
- ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM320B) ||
- ((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL324B)) {
- /* set sector offsets for bottom boot block type */
- for (i=0; i<8; ++i) { /* 8 x 8k boot sectors */
- info->start[i] = base;
- base += 8 << 10;
- }
- while (i < info->sector_count) { /* 64k regular sectors */
- info->start[i] = base;
- base += 64 << 10;
- ++i;
- }
- } else if (((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL322T) ||
- ((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL323T) ||
- ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM320T) ||
- ((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL324T)) {
- /* set sector offsets for top boot block type */
- base += info->size;
- i = info->sector_count;
- for (n=0; n<8; ++n) { /* 8 x 8k boot sectors */
- base -= 8 << 10;
- --i;
- info->start[i] = base;
- }
- while (i > 0) { /* 64k regular sectors */
- base -= 64 << 10;
- --i;
- info->start[i] = base;
- }
- } else if ((info->flash_id & FLASH_TYPEMASK) == FLASH_STMW320DT) {
- /* set sector offsets for top boot block type */
- base += info->size;
- i = info->sector_count;
- /* 1 x 16k boot sector */
- base -= 16 << 10;
- --i;
- info->start[i] = base;
- /* 2 x 8k boot sectors */
- for (n=0; n<2; ++n) {
- base -= 8 << 10;
- --i;
- info->start[i] = base;
- }
- /* 1 x 32k boot sector */
- base -= 32 << 10;
- --i;
- info->start[i] = base;
-
- while (i > 0) { /* 64k regular sectors */
- base -= 64 << 10;
- --i;
- info->start[i] = base;
- }
- } else {
- if (info->flash_id & FLASH_BTYPE) {
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00004000;
- info->start[2] = base + 0x00006000;
- info->start[3] = base + 0x00008000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00010000) - 0x00030000;
- }
- } else {
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- info->start[i--] = base + info->size - 0x00004000;
- info->start[i--] = base + info->size - 0x00006000;
- info->start[i--] = base + info->size - 0x00008000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00010000;
- }
- }
- }
-
- /* check for protected sectors */
- for (i = 0; i < info->sector_count; i++) {
- /* read sector protection at sector address, (A7 .. A0) = 0x02 */
- /* D0 = 1 if protected */
- addr2 = (volatile CFG_FLASH_WORD_SIZE *)(info->start[i]);
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST)
- info->protect[i] = 0;
- else
- info->protect[i] = addr2[CFG_FLASH_READ2] & 1;
- }
-
- /*
- * Prevent writes to uninitialized FLASH.
- */
- if (info->flash_id != FLASH_UNKNOWN) {
- addr2 = (CFG_FLASH_WORD_SIZE *)info->start[0];
- *addr2 = (CFG_FLASH_WORD_SIZE)0x00F000F0; /* reset bank */
- }
-
- return (info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- volatile CFG_FLASH_WORD_SIZE *addr = (CFG_FLASH_WORD_SIZE *)(info->start[0]);
- volatile CFG_FLASH_WORD_SIZE *addr2;
- int flag, prot, sect, l_sect;
- ulong start, now, last;
- int i;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("Can't erase unknown flash type - aborted\n");
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- l_sect = -1;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr2 = (CFG_FLASH_WORD_SIZE *)(info->start[sect]);
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) {
- addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE)0x00AA00AA;
- addr[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE)0x00550055;
- addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE)0x00800080;
- addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE)0x00AA00AA;
- addr[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE)0x00550055;
- addr2[0] = (CFG_FLASH_WORD_SIZE)0x00500050; /* block erase */
- for (i=0; i<50; i++)
- udelay(1000); /* wait 1 ms */
- } else {
- if (sect == s_first) {
- addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE)0x00AA00AA;
- addr[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE)0x00550055;
- addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE)0x00800080;
- addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE)0x00AA00AA;
- addr[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE)0x00550055;
- }
- addr2[0] = (CFG_FLASH_WORD_SIZE)0x00300030; /* sector erase */
- }
- l_sect = sect;
- }
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- /*
- * We wait for the last triggered sector
- */
- if (l_sect < 0)
- goto DONE;
-
- start = get_timer (0);
- last = start;
- addr = (CFG_FLASH_WORD_SIZE *)(info->start[l_sect]);
- while ((addr[0] & (CFG_FLASH_WORD_SIZE)0x00800080) != (CFG_FLASH_WORD_SIZE)0x00800080) {
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- return 1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- }
-
-DONE:
- /* reset to read mode */
- addr = (CFG_FLASH_WORD_SIZE *)info->start[0];
- addr[0] = (CFG_FLASH_WORD_SIZE)0x00F000F0; /* reset bank */
-
- printf (" done\n");
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int i, l, rc;
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
-#ifdef CONFIG_B2
- data = data | ((*(uchar *)cp)<<(8*i));
-#else
- data = (data << 8) | (*(uchar *)cp);
-#endif
- }
- for (; i<4 && cnt>0; ++i) {
-#ifdef CONFIG_B2
- data = data | ((*src++)<<(8*i));
-#else
- data = (data << 8) | *src++;
-#endif
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<4; ++i, ++cp) {
-#ifdef CONFIG_B2
- data = data | ((*(uchar *)cp)<<(8*i));
-#else
- data = (data << 8) | (*(uchar *)cp);
-#endif
- }
-
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = 0;
-#ifdef CONFIG_B2
- data = (*(ulong*)src);
- src += 4;
-#else
- for (i=0; i<4; ++i) {
- data = (data << 8) | *src++;
- }
-#endif
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
-#ifdef CONFIG_B2
- data = data | ((*src++)<<(8*i));
-#else
- data = (data << 8) | *src++;
-#endif
- --cnt;
- }
- for (; i<4; ++i, ++cp) {
-#ifdef CONFIG_B2
- data = data | ((*(uchar *)cp)<<(8*i));
-#else
- data = (data << 8) | (*(uchar *)cp);
-#endif
- }
-
- return (write_word(info, wp, data));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word (flash_info_t *info, ulong dest, ulong data)
-{
- volatile CFG_FLASH_WORD_SIZE *addr2 = (CFG_FLASH_WORD_SIZE *)(info->start[0]);
- volatile CFG_FLASH_WORD_SIZE *dest2 = (CFG_FLASH_WORD_SIZE *)dest;
- volatile CFG_FLASH_WORD_SIZE *data2 = (CFG_FLASH_WORD_SIZE *)&data;
- ulong start;
- int flag;
- int i;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*((volatile ulong *)dest) & data) != data) {
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- for (i=0; i<4/sizeof(CFG_FLASH_WORD_SIZE); i++)
- {
- addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE)0x00AA00AA;
- addr2[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE)0x00550055;
- addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE)0x00A000A0;
-
- dest2[i] = data2[i];
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* data polling for D7 */
- start = get_timer (0);
- while ((dest2[i] & (CFG_FLASH_WORD_SIZE)0x00800080) !=
- (data2[i] & (CFG_FLASH_WORD_SIZE)0x00800080)) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- return (1);
- }
- }
- }
-
- return (0);
-}
-
-/*-----------------------------------------------------------------------
- */
diff --git a/board/dave/common/fpga.c b/board/dave/common/fpga.c
deleted file mode 100644
index 5b5b5e9d2e..0000000000
--- a/board/dave/common/fpga.c
+++ /dev/null
@@ -1,256 +0,0 @@
-/*
- * (C) Copyright 2001-2003
- * Matthias Fuchs, esd gmbh germany, matthias.fuchs@esd-electronics.com
- * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/processor.h>
-#include <command.h>
-
-/* ------------------------------------------------------------------------- */
-
-#ifdef FPGA_DEBUG
-#define DBG(x...) printf(x)
-#else
-#define DBG(x...)
-#endif /* DEBUG */
-
-#define MAX_ONES 226
-
-#ifdef CFG_FPGA_PRG
-# define FPGA_PRG CFG_FPGA_PRG /* FPGA program pin (ppc output)*/
-# define FPGA_CLK CFG_FPGA_CLK /* FPGA clk pin (ppc output) */
-# define FPGA_DATA CFG_FPGA_DATA /* FPGA data pin (ppc output) */
-# define FPGA_DONE CFG_FPGA_DONE /* FPGA done pin (ppc input) */
-# define FPGA_INIT CFG_FPGA_INIT /* FPGA init pin (ppc input) */
-#else
-# define FPGA_PRG 0x04000000 /* FPGA program pin (ppc output) */
-# define FPGA_CLK 0x02000000 /* FPGA clk pin (ppc output) */
-# define FPGA_DATA 0x01000000 /* FPGA data pin (ppc output) */
-# define FPGA_DONE 0x00800000 /* FPGA done pin (ppc input) */
-# define FPGA_INIT 0x00400000 /* FPGA init pin (ppc input) */
-#endif
-
-#define ERROR_FPGA_PRG_INIT_LOW -1 /* Timeout after PRG* asserted */
-#define ERROR_FPGA_PRG_INIT_HIGH -2 /* Timeout after PRG* deasserted */
-#define ERROR_FPGA_PRG_DONE -3 /* Timeout after programming */
-
-#define SET_FPGA(data) out32(GPIO0_OR, data)
-
-#define FPGA_WRITE_1 { \
- SET_FPGA(FPGA_PRG | FPGA_DATA); /* set clock to 0 */ \
- SET_FPGA(FPGA_PRG | FPGA_DATA); /* set data to 1 */ \
- SET_FPGA(FPGA_PRG | FPGA_CLK | FPGA_DATA); /* set clock to 1 */ \
- SET_FPGA(FPGA_PRG | FPGA_CLK | FPGA_DATA);} /* set data to 1 */
-
-#define FPGA_WRITE_0 { \
- SET_FPGA(FPGA_PRG | FPGA_DATA); /* set clock to 0 */ \
- SET_FPGA(FPGA_PRG); /* set data to 0 */ \
- SET_FPGA(FPGA_PRG | FPGA_CLK); /* set clock to 1 */ \
- SET_FPGA(FPGA_PRG | FPGA_CLK | FPGA_DATA);} /* set data to 1 */
-
-#if 0
-static int fpga_boot (unsigned char *fpgadata, int size)
-{
- int i, index, len;
- int count;
-
-#ifdef CFG_FPGA_SPARTAN2
- int j;
-#else
- unsigned char b;
- int bit;
-#endif
-
- /* display infos on fpgaimage */
- index = 15;
- for (i = 0; i < 4; i++) {
- len = fpgadata[index];
- DBG ("FPGA: %s\n", &(fpgadata[index + 1]));
- index += len + 3;
- }
-
-#ifdef CFG_FPGA_SPARTAN2
- /* search for preamble 0xFFFFFFFF */
- while (1) {
- if ((fpgadata[index] == 0xff) && (fpgadata[index + 1] == 0xff)
- && (fpgadata[index + 2] == 0xff)
- && (fpgadata[index + 3] == 0xff))
- break; /* preamble found */
- else
- index++;
- }
-#else
- /* search for preamble 0xFF2X */
- for (index = 0; index < size - 1; index++) {
- if ((fpgadata[index] == 0xff)
- && ((fpgadata[index + 1] & 0xf0) == 0x30))
- break;
- }
- index += 2;
-#endif
-
- DBG ("FPGA: configdata starts at position 0x%x\n", index);
- DBG ("FPGA: length of fpga-data %d\n", size - index);
-
- /*
- * Setup port pins for fpga programming
- */
- out32 (GPIO0_ODR, 0x00000000); /* no open drain pins */
- out32 (GPIO0_TCR, in32 (GPIO0_TCR) | FPGA_PRG | FPGA_CLK | FPGA_DATA); /* setup for output */
- out32 (GPIO0_OR, in32 (GPIO0_OR) | FPGA_PRG | FPGA_CLK | FPGA_DATA); /* set pins to high */
-
- DBG ("%s, ",
- ((in32 (GPIO0_IR) & FPGA_DONE) == 0) ? "NOT DONE" : "DONE");
- DBG ("%s\n",
- ((in32 (GPIO0_IR) & FPGA_INIT) == 0) ? "NOT INIT" : "INIT");
-
- /*
- * Init fpga by asserting and deasserting PROGRAM*
- */
- SET_FPGA (FPGA_CLK | FPGA_DATA);
-
- /* Wait for FPGA init line low */
- count = 0;
- while (in32 (GPIO0_IR) & FPGA_INIT) {
- udelay (1000); /* wait 1ms */
- /* Check for timeout - 100us max, so use 3ms */
- if (count++ > 3) {
- DBG ("FPGA: Booting failed!\n");
- return ERROR_FPGA_PRG_INIT_LOW;
- }
- }
-
- DBG ("%s, ",
- ((in32 (GPIO0_IR) & FPGA_DONE) == 0) ? "NOT DONE" : "DONE");
- DBG ("%s\n",
- ((in32 (GPIO0_IR) & FPGA_INIT) == 0) ? "NOT INIT" : "INIT");
-
- /* deassert PROGRAM* */
- SET_FPGA (FPGA_PRG | FPGA_CLK | FPGA_DATA);
-
- /* Wait for FPGA end of init period . */
- count = 0;
- while (!(in32 (GPIO0_IR) & FPGA_INIT)) {
- udelay (1000); /* wait 1ms */
- /* Check for timeout */
- if (count++ > 3) {
- DBG ("FPGA: Booting failed!\n");
- return ERROR_FPGA_PRG_INIT_HIGH;
- }
- }
-
- DBG ("%s, ",
- ((in32 (GPIO0_IR) & FPGA_DONE) == 0) ? "NOT DONE" : "DONE");
- DBG ("%s\n",
- ((in32 (GPIO0_IR) & FPGA_INIT) == 0) ? "NOT INIT" : "INIT");
-
- DBG ("write configuration data into fpga\n");
- /* write configuration-data into fpga... */
-
-#ifdef CFG_FPGA_SPARTAN2
- /*
- * Load uncompressed image into fpga
- */
- for (i = index; i < size; i++) {
- for (j = 0; j < 8; j++) {
- if ((fpgadata[i] & 0x80) == 0x80) {
- FPGA_WRITE_1;
- } else {
- FPGA_WRITE_0;
- }
- fpgadata[i] <<= 1;
- }
- }
-#else /* ! CFG_FPGA_SPARTAN2 */
- /* send 0xff 0x20 */
- FPGA_WRITE_1;
- FPGA_WRITE_1;
- FPGA_WRITE_1;
- FPGA_WRITE_1;
- FPGA_WRITE_1;
- FPGA_WRITE_1;
- FPGA_WRITE_1;
- FPGA_WRITE_1;
- FPGA_WRITE_0;
- FPGA_WRITE_0;
- FPGA_WRITE_1;
- FPGA_WRITE_0;
- FPGA_WRITE_0;
- FPGA_WRITE_0;
- FPGA_WRITE_0;
- FPGA_WRITE_0;
-
- /*
- ** Bit_DeCompression
- ** Code 1 .. maxOnes : n '1's followed by '0'
- ** maxOnes + 1 .. maxOnes + 1 : n - 1 '1's no '0'
- ** maxOnes + 2 .. 254 : n - (maxOnes + 2) '0's followed by '1'
- ** 255 : '1'
- */
-
- for (i = index; i < size; i++) {
- b = fpgadata[i];
- if ((b >= 1) && (b <= MAX_ONES)) {
- for (bit = 0; bit < b; bit++) {
- FPGA_WRITE_1;
- }
- FPGA_WRITE_0;
- } else if (b == (MAX_ONES + 1)) {
- for (bit = 1; bit < b; bit++) {
- FPGA_WRITE_1;
- }
- } else if ((b >= (MAX_ONES + 2)) && (b <= 254)) {
- for (bit = 0; bit < (b - (MAX_ONES + 2)); bit++) {
- FPGA_WRITE_0;
- }
- FPGA_WRITE_1;
- } else if (b == 255) {
- FPGA_WRITE_1;
- }
- }
-#endif /* CFG_FPGA_SPARTAN2 */
-
- DBG ("%s, ",
- ((in32 (GPIO0_IR) & FPGA_DONE) == 0) ? "NOT DONE" : "DONE");
- DBG ("%s\n",
- ((in32 (GPIO0_IR) & FPGA_INIT) == 0) ? "NOT INIT" : "INIT");
-
- /*
- * Check if fpga's DONE signal - correctly booted ?
- */
-
- /* Wait for FPGA end of programming period . */
- count = 0;
- while (!(in32 (GPIO0_IR) & FPGA_DONE)) {
- udelay (1000); /* wait 1ms */
- /* Check for timeout */
- if (count++ > 3) {
- DBG ("FPGA: Booting failed!\n");
- return ERROR_FPGA_PRG_DONE;
- }
- }
-
- DBG ("FPGA: Booting successful!\n");
- return 0;
-}
-#endif /* 0 */
diff --git a/board/dave/common/pci.c b/board/dave/common/pci.c
deleted file mode 100644
index f8f180c6c4..0000000000
--- a/board/dave/common/pci.c
+++ /dev/null
@@ -1,202 +0,0 @@
-/*
- * (C) Copyright 2001
- * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <ppc4xx.h>
-#include <asm/processor.h>
-#include <pci.h>
-
-
-u_long pci9054_iobase;
-
-
-#define PCI_PRIMARY_CAR (0x500000dc) /* PCI config address reg */
-#define PCI_PRIMARY_CDR (0x80000000) /* PCI config data reg */
-
-
-/*-----------------------------------------------------------------------------+
-| Subroutine: pci9054_read_config_dword
-| Description: Read a PCI configuration register
-| Inputs:
-| hose PCI Controller
-| dev PCI Bus+Device+Function number
-| offset Configuration register number
-| value Address of the configuration register value
-| Return value:
-| 0 Successful
-+-----------------------------------------------------------------------------*/
-int pci9054_read_config_dword(struct pci_controller *hose,
- pci_dev_t dev, int offset, u32* value)
-{
- unsigned long conAdrVal;
- unsigned long val;
-
- /* generate coded value for CON_ADR register */
- conAdrVal = dev | (offset & 0xfc) | 0x80000000;
-
- /* Load the CON_ADR (CAR) value first, then read from CON_DATA (CDR) */
- *(unsigned long *)PCI_PRIMARY_CAR = conAdrVal;
-
- /* Note: *pResult comes back as -1 if machine check happened */
- val = in32r(PCI_PRIMARY_CDR);
-
- *value = (unsigned long) val;
-
- out32r(PCI_PRIMARY_CAR, 0);
-
- if ((*(unsigned long *)0x50000304) & 0x60000000)
- {
- /* clear pci master/target abort bits */
- *(unsigned long *)0x50000304 = *(unsigned long *)0x50000304;
- }
-
- return 0;
-}
-
-/*-----------------------------------------------------------------------------+
-| Subroutine: pci9054_write_config_dword
-| Description: Write a PCI configuration register.
-| Inputs:
-| hose PCI Controller
-| dev PCI Bus+Device+Function number
-| offset Configuration register number
-| Value Configuration register value
-| Return value:
-| 0 Successful
-| Updated for pass2 errata #6. Need to disable interrupts and clear the
-| PCICFGADR reg after writing the PCICFGDATA reg.
-+-----------------------------------------------------------------------------*/
-int pci9054_write_config_dword(struct pci_controller *hose,
- pci_dev_t dev, int offset, u32 value)
-{
- unsigned long conAdrVal;
-
- conAdrVal = dev | (offset & 0xfc) | 0x80000000;
-
- *(unsigned long *)PCI_PRIMARY_CAR = conAdrVal;
-
- out32r(PCI_PRIMARY_CDR, value);
-
- out32r(PCI_PRIMARY_CAR, 0);
-
- /* clear pci master/target abort bits */
- *(unsigned long *)0x50000304 = *(unsigned long *)0x50000304;
-
- return (0);
-}
-
-/*-----------------------------------------------------------------------
- */
-
-#ifdef CONFIG_DASA_SIM
-static void pci_dasa_sim_config_pci9054(struct pci_controller *hose, pci_dev_t dev,
- struct pci_config_table *_)
-{
- unsigned int iobase;
- unsigned short status = 0;
- unsigned char timer;
-
- /*
- * Configure PLX PCI9054
- */
- pci_read_config_word(CFG_PCI9054_DEV_FN, PCI_COMMAND, &status);
- status |= PCI_COMMAND_MASTER | PCI_COMMAND_IO | PCI_COMMAND_MEMORY;
- pci_write_config_word(CFG_PCI9054_DEV_FN, PCI_COMMAND, status);
-
- /* Check the latency timer for values >= 0x60.
- */
- pci_read_config_byte(CFG_PCI9054_DEV_FN, PCI_LATENCY_TIMER, &timer);
- if (timer < 0x60)
- {
- pci_write_config_byte(CFG_PCI9054_DEV_FN, PCI_LATENCY_TIMER, 0x60);
- }
-
- /* Set I/O base register.
- */
- pci_write_config_dword(CFG_PCI9054_DEV_FN, PCI_BASE_ADDRESS_0, CFG_PCI9054_IOBASE);
- pci_read_config_dword(CFG_PCI9054_DEV_FN, PCI_BASE_ADDRESS_0, &iobase);
-
- pci9054_iobase = pci_mem_to_phys(CFG_PCI9054_DEV_FN, iobase & PCI_BASE_ADDRESS_MEM_MASK);
-
- if (pci9054_iobase == 0xffffffff)
- {
- printf("Error: Can not set I/O base register.\n");
- return;
- }
-}
-#endif
-
-static struct pci_config_table pci9054_config_table[] = {
-#ifndef CONFIG_PCI_PNP
- { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
- PCI_BUS(CFG_ETH_DEV_FN), PCI_DEV(CFG_ETH_DEV_FN), PCI_FUNC(CFG_ETH_DEV_FN),
- pci_cfgfunc_config_device, { CFG_ETH_IOBASE,
- CFG_ETH_IOBASE,
- PCI_COMMAND_IO | PCI_COMMAND_MASTER }},
-#ifdef CONFIG_DASA_SIM
- { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
- PCI_BUS(CFG_PCI9054_DEV_FN), PCI_DEV(CFG_PCI9054_DEV_FN), PCI_FUNC(CFG_PCI9054_DEV_FN),
- pci_dasa_sim_config_pci9054 },
-#endif
-#endif
- { }
-};
-
-static struct pci_controller pci9054_hose = {
- config_table: pci9054_config_table,
-};
-
-void pci_init(void)
-{
- struct pci_controller *hose = &pci9054_hose;
-
- /*
- * Register the hose
- */
- hose->first_busno = 0;
- hose->last_busno = 0xff;
-
- /* System memory space */
- pci_set_region(hose->regions + 0,
- 0x00000000, 0x00000000, 0x01000000,
- PCI_REGION_MEM | PCI_REGION_MEMORY);
-
- /* PCI Memory space */
- pci_set_region(hose->regions + 1,
- 0x00000000, 0xc0000000, 0x10000000,
- PCI_REGION_MEM);
-
- pci_set_ops(hose,
- pci_hose_read_config_byte_via_dword,
- pci_hose_read_config_word_via_dword,
- pci9054_read_config_dword,
- pci_hose_write_config_byte_via_dword,
- pci_hose_write_config_word_via_dword,
- pci9054_write_config_dword);
-
- hose->region_count = 2;
-
- pci_register_hose(hose);
-
- hose->last_busno = pci_hose_scan(hose);
-}
diff --git a/board/dbau1x00/Makefile b/board/dbau1x00/Makefile
deleted file mode 100644
index d9b0e2d258..0000000000
--- a/board/dbau1x00/Makefile
+++ /dev/null
@@ -1,41 +0,0 @@
-#
-# (C) Copyright 2003
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o
-SOBJS = lowlevel_init.o
-
-$(LIB): .depend $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS) $(SOBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/dbau1x00/README b/board/dbau1x00/README
deleted file mode 100644
index b37ff3616b..0000000000
--- a/board/dbau1x00/README
+++ /dev/null
@@ -1,63 +0,0 @@
-By Thomas.Lange@corelatus.se 2004-Oct-05
-----------------------------------------
-DbAu1xx0 are development boards from AMD containing
-an Alchemy AU1xx0 series cpu with mips32 core.
-Existing cpu:s are Au1000, Au1100, Au1500 and Au1550
-
-Limitations & comments
-----------------------
-Support was originally big endian only.
-I have not tested, but several u-boot users report working
-configurations in little endian mode.
-
-I named the board dbau1x00, to allow
-support for all three development boards
-( dbau1000, dbau1100 and dbau1500 ).
-Now there is a new board called dbau1550 also, which
-should be supported RSN.
-
-I only have a dbau1000, so my testing is limited
-to this board.
-
-The board has two different flash banks, that can
-be selected via dip switch. This makes it possible
-to test new bootloaders without thrashing the YAMON
-boot loader delivered with board.
-
-NOTE! When you switch between the two boot flashes, the
-base addresses will be swapped.
-Have this in mind when you compile u-boot. TEXT_BASE has
-to match the address where u-boot is located when you
-actually launch.
-
-Ethernet only supported for mac0.
-
-PCMCIA only supported for slot 0, only 3.3V.
-
-PCMCIA IDE tested with Sandisk Compact Flash and
-IBM microdrive.
-
-###################################
-######## NOTE!!!!!! #########
-###################################
-If you partition a disk on another system (e.g. laptop),
-all bytes will be swapped on 16bit level when using
-PCMCIA and running cpu in big endian mode!!!!
-
-This is probably due to an error in Au1000 chip.
-
-Solution:
-
-a) Boot via network and partition disk directly from
-dbau1x00. The endian will then be correct.
-
-b) Partition disk on "laptop" and fill it with all files
-you need. Then write a simple program that endian swaps
-whole disk,
-
-Example:
-Original "laptop" byte order:
-B0 B1 B2 B3 B4 B5 B6 B7 B8 B9...
-
-Dbau1000 byte order will then be:
-B1 B0 B3 B2 B5 B4 B7 B6 B9 B8...
diff --git a/board/dbau1x00/config.mk b/board/dbau1x00/config.mk
deleted file mode 100644
index 39eb60a176..0000000000
--- a/board/dbau1x00/config.mk
+++ /dev/null
@@ -1,32 +0,0 @@
-#
-# (C) Copyright 2003
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# AMD development board AMD Alchemy DbAu1x00, MIPS32 core
-#
-
-# ROM version
-TEXT_BASE = 0xbfc00000
-
-# RAM version
-#TEXT_BASE = 0x80100000
diff --git a/board/dbau1x00/dbau1x00.c b/board/dbau1x00/dbau1x00.c
deleted file mode 100644
index d29e8d591e..0000000000
--- a/board/dbau1x00/dbau1x00.c
+++ /dev/null
@@ -1,127 +0,0 @@
-/*
- * (C) Copyright 2003
- * Thomas.Lange@corelatus.se
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <command.h>
-#include <asm/au1x00.h>
-#include <asm/mipsregs.h>
-
-long int initdram(int board_type)
-{
- /* Sdram is setup by assembler code */
- /* If memory could be changed, we should return the true value here */
- return MEM_SIZE*1024*1024;
-}
-
-#define BCSR_PCMCIA_PC0DRVEN 0x0010
-#define BCSR_PCMCIA_PC0RST 0x0080
-
-/* In cpu/mips/cpu.c */
-void write_one_tlb( int index, u32 pagemask, u32 hi, u32 low0, u32 low1 );
-
-int checkboard (void)
-{
-#ifdef CONFIG_IDE_PCMCIA
- u16 status;
- volatile u32 *pcmcia_bcsr = (u32*)(DB1XX0_BCSR_ADDR+0x10);
-#endif /* CONFIG_IDE_PCMCIA */
- volatile u32 *phy = (u32*)(DB1XX0_BCSR_ADDR+0xC);
- volatile u32 *sys_counter = (volatile u32*)SYS_COUNTER_CNTRL;
- u32 proc_id;
-
- *sys_counter = 0x100; /* Enable 32 kHz oscillator for RTC/TOY */
-
- proc_id = read_32bit_cp0_register(CP0_PRID);
-
- switch (proc_id >> 24) {
- case 0:
- puts ("Board: Merlot (DbAu1000)\n");
- printf ("CPU: Au1000 396 MHz, id: 0x%02x, rev: 0x%02x\n",
- (proc_id >> 8) & 0xFF, proc_id & 0xFF);
- break;
- case 1:
- puts ("Board: DbAu1500\n");
- printf ("CPU: Au1500, id: 0x%02x, rev: 0x%02x\n",
- (proc_id >> 8) & 0xFF, proc_id & 0xFF);
- break;
- case 2:
- puts ("Board: DbAu1100\n");
- printf ("CPU: Au1100, id: 0x%02x, rev: 0x%02x\n",
- (proc_id >> 8) & 0xFF, proc_id & 0xFF);
- break;
- case 3:
- puts ("Board: DbAu1550\n");
- printf ("CPU: Au1550, id: 0x%02x, rev: 0x%02x\n",
- (proc_id >> 8) & 0xFF, proc_id & 0xFF);
- break;
- default:
- printf ("Unsupported cpu %d, proc_id=0x%x\n", proc_id >> 24, proc_id);
- }
-#ifdef CONFIG_IDE_PCMCIA
- /* Enable 3.3 V on slot 0 ( VCC )
- No 5V */
- status = 4;
- *pcmcia_bcsr = status;
-
- status |= BCSR_PCMCIA_PC0DRVEN;
- *pcmcia_bcsr = status;
- au_sync();
-
- udelay(300*1000);
-
- status |= BCSR_PCMCIA_PC0RST;
- *pcmcia_bcsr = status;
- au_sync();
-
- udelay(100*1000);
-
- /* PCMCIA is on a 36 bit physical address.
- We need to map it into a 32 bit addresses */
-
-#if 0
- /* We dont need theese unless we run whole pcmcia package */
- write_one_tlb(20, /* index */
- 0x01ffe000, /* Pagemask, 16 MB pages */
- CFG_PCMCIA_IO_BASE, /* Hi */
- 0x3C000017, /* Lo0 */
- 0x3C200017); /* Lo1 */
-
- write_one_tlb(21, /* index */
- 0x01ffe000, /* Pagemask, 16 MB pages */
- CFG_PCMCIA_ATTR_BASE, /* Hi */
- 0x3D000017, /* Lo0 */
- 0x3D200017); /* Lo1 */
-#endif /* 0 */
- write_one_tlb(22, /* index */
- 0x01ffe000, /* Pagemask, 16 MB pages */
- CFG_PCMCIA_MEM_ADDR, /* Hi */
- 0x3E000017, /* Lo0 */
- 0x3E200017); /* Lo1 */
-#endif /* CONFIG_IDE_PCMCIA */
-
- /* Release reset of ethernet PHY chips */
- /* Always do this, because linux does not know about it */
- *phy = 3;
-
- return 0;
-}
diff --git a/board/dbau1x00/flash.c b/board/dbau1x00/flash.c
deleted file mode 100644
index 3cf29e844b..0000000000
--- a/board/dbau1x00/flash.c
+++ /dev/null
@@ -1,43 +0,0 @@
-/*
- * (C) Copyright 2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/*-----------------------------------------------------------------------
- * flash_init()
- *
- * sets up flash_info and returns size of FLASH (bytes)
- */
-unsigned long flash_init (void)
-{
- printf ("Skipping flash_init\n");
- return (0);
-}
-
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- printf ("write_buff not implemented\n");
- return (-1);
-}
diff --git a/board/dbau1x00/lowlevel_init.S b/board/dbau1x00/lowlevel_init.S
deleted file mode 100644
index 7afd5840c8..0000000000
--- a/board/dbau1x00/lowlevel_init.S
+++ /dev/null
@@ -1,587 +0,0 @@
-/* Memory sub-system initialization code */
-
-#include <config.h>
-#include <version.h>
-#include <asm/regdef.h>
-#include <asm/au1x00.h>
-#include <asm/mipsregs.h>
-
-#define AU1500_SYS_ADDR 0xB1900000
-#define sys_endian 0x0038
-#define CP0_Config0 $16
-#define CPU_SCALE ((CFG_MHZ) / 12) /* CPU clock is a multiple of 12 MHz */
-#define MEM_1MS ((CFG_MHZ) * 1000)
-
- .text
- .set noreorder
- .set mips32
-
- .globl lowlevel_init
-lowlevel_init:
- /*
- * Step 1) Establish CPU endian mode.
- * Db1500-specific:
- * Switch S1.1 Off(bit7 reads 1) is Little Endian
- * Switch S1.1 On (bit7 reads 0) is Big Endian
- */
-#ifdef CONFIG_DBAU1550
- li t0, MEM_STCFG2
- li t1, 0x00000040
- sw t1, 0(t0)
-
- li t0, MEM_STTIME2
- li t1, 0x22080a20
- sw t1, 0(t0)
-
- li t0, MEM_STADDR2
- li t1, 0x10c03f00
- sw t1, 0(t0)
-#else
- li t0, MEM_STCFG1
- li t1, 0x00000080
- sw t1, 0(t0)
-
- li t0, MEM_STTIME1
- li t1, 0x22080a20
- sw t1, 0(t0)
-
- li t0, MEM_STADDR1
- li t1, 0x10c03f00
- sw t1, 0(t0)
-#endif
-
- li t0, DB1XX0_BCSR_ADDR
- lw t1,8(t0)
- andi t1,t1,0x80
- beq zero,t1,big_endian
- nop
-little_endian:
-
- /* Change Au1 core to little endian */
- li t0, AU1500_SYS_ADDR
- li t1, 1
- sw t1, sys_endian(t0)
- mfc0 t2, CP0_CONFIG
- mtc0 t2, CP0_CONFIG
- nop
- nop
-
- /* Big Endian is default so nothing to do but fall through */
-
-big_endian:
-
- /*
- * Step 2) Establish Status Register
- * (set BEV, clear ERL, clear EXL, clear IE)
- */
- li t1, 0x00400000
- mtc0 t1, CP0_STATUS
-
- /*
- * Step 3) Establish CP0 Config0
- * (set OD, set K0=3)
- */
- li t1, 0x00080003
- mtc0 t1, CP0_CONFIG
-
- /*
- * Step 4) Disable Watchpoint facilities
- */
- li t1, 0x00000000
- mtc0 t1, CP0_WATCHLO
- mtc0 t1, CP0_IWATCHLO
- /*
- * Step 5) Disable the performance counters
- */
- mtc0 zero, CP0_PERFORMANCE
- nop
-
- /*
- * Step 6) Establish EJTAG Debug register
- */
- mtc0 zero, CP0_DEBUG
- nop
-
- /*
- * Step 7) Establish Cause
- * (set IV bit)
- */
- li t1, 0x00800000
- mtc0 t1, CP0_CAUSE
-
- /* Establish Wired (and Random) */
- mtc0 zero, CP0_WIRED
- nop
-
-#ifdef CONFIG_DBAU1550
- /* No workaround if running from ram */
- lui t0, 0xffc0
- lui t3, 0xbfc0
- and t1, ra, t0
- bne t1, t3, noCacheJump
- nop
-
- /*** From AMD YAMON ***/
- /*
- * Step 8) Initialize the caches
- */
- li t0, (16*1024)
- li t1, 32
- li t2, 0x80000000
- addu t3, t0, t2
-cacheloop:
- cache 0, 0(t2)
- cache 1, 0(t2)
- addu t2, t1
- bne t2, t3, cacheloop
- nop
-
- /* Save return address */
- move t3, ra
-
- /* Run from cacheable space now */
- bal cachehere
- nop
-cachehere:
- li t1, ~0x20000000 /* convert to KSEG0 */
- and t0, ra, t1
- addi t0, 5*4 /* 5 insns beyond cachehere */
- jr t0
- nop
-
- /* Restore return address */
- move ra, t3
-
- /*
- * Step 9) Initialize the TLB
- */
- li t0, 0 # index value
- li t1, 0x00000000 # entryhi value
- li t2, 32 # 32 entries
-
-tlbloop:
- /* Probe TLB for matching EntryHi */
- mtc0 t1, CP0_ENTRYHI
- tlbp
- nop
-
- /* Examine Index[P], 1=no matching entry */
- mfc0 t3, CP0_INDEX
- li t4, 0x80000000
- and t3, t4, t3
- addiu t1, t1, 1 # increment t1 (asid)
- beq zero, t3, tlbloop
- nop
-
- /* Initialize the TLB entry */
- mtc0 t0, CP0_INDEX
- mtc0 zero, CP0_ENTRYLO0
- mtc0 zero, CP0_ENTRYLO1
- mtc0 zero, CP0_PAGEMASK
- tlbwi
-
- /* Do it again */
- addiu t0, t0, 1
- bne t0, t2, tlbloop
- nop
-
- /* First setup pll:s to make serial work ok */
- /* We have a 12 MHz crystal */
- li t0, SYS_CPUPLL
- li t1, CPU_SCALE /* CPU clock */
- sw t1, 0(t0)
- sync
- nop
- nop
-
- /* wait 1mS for clocks to settle */
- li t1, MEM_1MS
-1: add t1, -1
- bne t1, zero, 1b
- nop
- /* Setup AUX PLL */
- li t0, SYS_AUXPLL
- li t1, 0x20 /* 96 MHz */
- sw t1, 0(t0) /* aux pll */
- sync
-
- /* Static memory controller */
- /* RCE0 - can not change while fetching, do so from icache */
- move t2, ra /* Store return address */
- bal getAddr
- nop
-
-getAddr:
- move t1, ra
- move ra, t2 /* Move return addess back */
-
- cache 0x14,0(t1)
- cache 0x14,32(t1)
- /*** /From YAMON ***/
-
-noCacheJump:
-#endif /* CONFIG_DBAU1550 */
-
-#ifdef CONFIG_DBAU1550
- li t0, MEM_STTIME0
- li t1, 0x040181D7
- sw t1, 0(t0)
-
- /* RCE0 AMD MirrorBit Flash (?) */
- li t0, MEM_STCFG0
- li t1, 0x00000003
- sw t1, 0(t0)
-
- li t0, MEM_STADDR0
- li t1, 0x11803E00
- sw t1, 0(t0)
-#else /* CONFIG_DBAU1550 */
- li t0, MEM_STTIME0
- li t1, 0x00014C0F
- sw t1, 0(t0)
-
- /* RCE0 AMD 29LV640M MirrorBit Flash */
- li t0, MEM_STCFG0
- li t1, 0x00000013
- sw t1, 0(t0)
-
- li t0, MEM_STADDR0
- li t1, 0x11E03F80
- sw t1, 0(t0)
-#endif /* CONFIG_DBAU1550 */
-
- /* RCE1 CPLD Board Logic */
- li t0, MEM_STCFG1
- li t1, 0x00000080
- sw t1, 0(t0)
-
- li t0, MEM_STTIME1
- li t1, 0x22080a20
- sw t1, 0(t0)
-
- li t0, MEM_STADDR1
- li t1, 0x10c03f00
- sw t1, 0(t0)
-
-#ifdef CONFIG_DBAU1550
- /* RCE2 CPLD Board Logic */
- li t0, MEM_STCFG2
- li t1, 0x00000040
- sw t1, 0(t0)
-
- li t0, MEM_STTIME2
- li t1, 0x22080a20
- sw t1, 0(t0)
-
- li t0, MEM_STADDR2
- li t1, 0x10c03f00
- sw t1, 0(t0)
-#else
- li t0, MEM_STCFG2
- li t1, 0x00000000
- sw t1, 0(t0)
-
- li t0, MEM_STTIME2
- li t1, 0x00000000
- sw t1, 0(t0)
-
- li t0, MEM_STADDR2
- li t1, 0x00000000
- sw t1, 0(t0)
-#endif
-
- /* RCE3 PCMCIA 250ns */
- li t0, MEM_STCFG3
- li t1, 0x00000002
- sw t1, 0(t0)
-
- li t0, MEM_STTIME3
- li t1, 0x280E3E07
- sw t1, 0(t0)
-
- li t0, MEM_STADDR3
- li t1, 0x10000000
- sw t1, 0(t0)
-
- sync
-
- /* Set peripherals to a known state */
- li t0, IC0_CFG0CLR
- li t1, 0xFFFFFFFF
- sw t1, 0(t0)
-
- li t0, IC0_CFG0CLR
- sw t1, 0(t0)
-
- li t0, IC0_CFG1CLR
- sw t1, 0(t0)
-
- li t0, IC0_CFG2CLR
- sw t1, 0(t0)
-
- li t0, IC0_SRCSET
- sw t1, 0(t0)
-
- li t0, IC0_ASSIGNSET
- sw t1, 0(t0)
-
- li t0, IC0_WAKECLR
- sw t1, 0(t0)
-
- li t0, IC0_RISINGCLR
- sw t1, 0(t0)
-
- li t0, IC0_FALLINGCLR
- sw t1, 0(t0)
-
- li t0, IC0_TESTBIT
- li t1, 0x00000000
- sw t1, 0(t0)
- sync
-
- li t0, IC1_CFG0CLR
- li t1, 0xFFFFFFFF
- sw t1, 0(t0)
-
- li t0, IC1_CFG0CLR
- sw t1, 0(t0)
-
- li t0, IC1_CFG1CLR
- sw t1, 0(t0)
-
- li t0, IC1_CFG2CLR
- sw t1, 0(t0)
-
- li t0, IC1_SRCSET
- sw t1, 0(t0)
-
- li t0, IC1_ASSIGNSET
- sw t1, 0(t0)
-
- li t0, IC1_WAKECLR
- sw t1, 0(t0)
-
- li t0, IC1_RISINGCLR
- sw t1, 0(t0)
-
- li t0, IC1_FALLINGCLR
- sw t1, 0(t0)
-
- li t0, IC1_TESTBIT
- li t1, 0x00000000
- sw t1, 0(t0)
- sync
-
- li t0, SYS_FREQCTRL0
- li t1, 0x00000000
- sw t1, 0(t0)
-
- li t0, SYS_FREQCTRL1
- li t1, 0x00000000
- sw t1, 0(t0)
-
- li t0, SYS_CLKSRC
- li t1, 0x00000000
- sw t1, 0(t0)
-
- li t0, SYS_PININPUTEN
- li t1, 0x00000000
- sw t1, 0(t0)
- sync
-
- li t0, 0xB1100100
- li t1, 0x00000000
- sw t1, 0(t0)
-
- li t0, 0xB1400100
- li t1, 0x00000000
- sw t1, 0(t0)
-
-
- li t0, SYS_WAKEMSK
- li t1, 0x00000000
- sw t1, 0(t0)
-
- li t0, SYS_WAKESRC
- li t1, 0x00000000
- sw t1, 0(t0)
-
- /* wait 1mS before setup */
- li t1, MEM_1MS
-1: add t1, -1
- bne t1, zero, 1b
- nop
-
-#ifdef CONFIG_DBAU1550
-/* SDCS 0,1,2 DDR SDRAM */
- li t0, MEM_SDMODE0
- li t1, 0x04276221
- sw t1, 0(t0)
-
- li t0, MEM_SDMODE1
- li t1, 0x04276221
- sw t1, 0(t0)
-
- li t0, MEM_SDMODE2
- li t1, 0x04276221
- sw t1, 0(t0)
-
- li t0, MEM_SDADDR0
- li t1, 0xe21003f0
- sw t1, 0(t0)
-
- li t0, MEM_SDADDR1
- li t1, 0xe21043f0
- sw t1, 0(t0)
-
- li t0, MEM_SDADDR2
- li t1, 0xe21083f0
- sw t1, 0(t0)
-
- sync
-
- li t0, MEM_SDCONFIGA
- li t1, 0x9030060a /* Program refresh - disabled */
- sw t1, 0(t0)
- sync
-
- li t0, MEM_SDCONFIGB
- li t1, 0x00028000
- sw t1, 0(t0)
- sync
-
- li t0, MEM_SDPRECMD /* Precharge all */
- li t1, 0
- sw t1, 0(t0)
- sync
-
- li t0, MEM_SDWRMD0
- li t1, 0x40000000
- sw t1, 0(t0)
- sync
-
- li t0, MEM_SDWRMD1
- li t1, 0x40000000
- sw t1, 0(t0)
- sync
-
- li t0, MEM_SDWRMD2
- li t1, 0x40000000
- sw t1, 0(t0)
- sync
-
- li t0, MEM_SDWRMD0
- li t1, 0x00000063
- sw t1, 0(t0)
- sync
-
- li t0, MEM_SDWRMD1
- li t1, 0x00000063
- sw t1, 0(t0)
- sync
-
- li t0, MEM_SDWRMD2
- li t1, 0x00000063
- sw t1, 0(t0)
- sync
-
- li t0, MEM_SDPRECMD /* Precharge all */
- sw zero, 0(t0)
- sync
-
- /* Issue 2 autoref */
- li t0, MEM_SDAUTOREF
- sw zero, 0(t0)
- sync
-
- li t0, MEM_SDAUTOREF
- sw zero, 0(t0)
- sync
-
- /* Enable refresh */
- li t0, MEM_SDCONFIGA
- li t1, 0x9830060a /* Program refresh - enabled */
- sw t1, 0(t0)
- sync
-
-#else /* CONFIG_DBAU1550 */
-/* SDCS 0,1 SDRAM */
- li t0, MEM_SDMODE0
- li t1, 0x005522AA
- sw t1, 0(t0)
-
- li t0, MEM_SDMODE1
- li t1, 0x005522AA
- sw t1, 0(t0)
-
- li t0, MEM_SDMODE2
- li t1, 0x00000000
- sw t1, 0(t0)
-
- li t0, MEM_SDADDR0
- li t1, 0x001003F8
- sw t1, 0(t0)
-
-
- li t0, MEM_SDADDR1
- li t1, 0x001023F8
- sw t1, 0(t0)
-
- li t0, MEM_SDADDR2
- li t1, 0x00000000
- sw t1, 0(t0)
-
- sync
-
- li t0, MEM_SDREFCFG
- li t1, 0x64000C24 /* Disable */
- sw t1, 0(t0)
- sync
-
- li t0, MEM_SDPRECMD
- sw zero, 0(t0)
- sync
-
- li t0, MEM_SDAUTOREF
- sw zero, 0(t0)
- sync
- sw zero, 0(t0)
- sync
-
- li t0, MEM_SDREFCFG
- li t1, 0x66000C24 /* Enable */
- sw t1, 0(t0)
- sync
-
- li t0, MEM_SDWRMD0
- li t1, 0x00000033
- sw t1, 0(t0)
- sync
-
- li t0, MEM_SDWRMD1
- li t1, 0x00000033
- sw t1, 0(t0)
- sync
-
-#endif /* CONFIG_DBAU1550 */
- /* wait 1mS after setup */
- li t1, MEM_1MS
-1: add t1, -1
- bne t1, zero, 1b
- nop
-
- li t0, SYS_PINFUNC
- li t1, 0x00008080
- sw t1, 0(t0)
-
- li t0, SYS_TRIOUTCLR
- li t1, 0x00001FFF
- sw t1, 0(t0)
-
- li t0, SYS_OUTPUTCLR
- li t1, 0x00008000
- sw t1, 0(t0)
- sync
-
- j ra
- nop
diff --git a/board/dbau1x00/u-boot.lds b/board/dbau1x00/u-boot.lds
deleted file mode 100644
index 10c9917986..0000000000
--- a/board/dbau1x00/u-boot.lds
+++ /dev/null
@@ -1,69 +0,0 @@
-/*
- * (C) Copyright 2003
- * Wolfgang Denk Engineering, <wd@denx.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
-OUTPUT_FORMAT("elf32-bigmips", "elf32-bigmips", "elf32-bigmips")
-*/
-OUTPUT_FORMAT("elf32-tradbigmips", "elf32-tradbigmips", "elf32-tradbigmips")
-OUTPUT_ARCH(mips)
-ENTRY(_start)
-SECTIONS
-{
- . = 0x00000000;
-
- . = ALIGN(4);
- .text :
- {
- *(.text)
- }
-
- . = ALIGN(4);
- .rodata : { *(.rodata) }
-
- . = ALIGN(4);
- .data : { *(.data) }
-
- . = ALIGN(4);
- .sdata : { *(.sdata) }
-
- _gp = ALIGN(16);
-
- __got_start = .;
- .got : { *(.got) }
- __got_end = .;
-
- .sdata : { *(.sdata) }
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- uboot_end_data = .;
- num_got_entries = (__got_end - __got_start) >> 2;
-
- . = ALIGN(4);
- .sbss : { *(.sbss) }
- .bss : { *(.bss) }
- uboot_end = .;
-}
diff --git a/board/dnp1110/Makefile b/board/dnp1110/Makefile
deleted file mode 100644
index eaa38bc3c1..0000000000
--- a/board/dnp1110/Makefile
+++ /dev/null
@@ -1,47 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := dnp1110.o flash.o
-SOBJS := lowlevel_init.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS) $(SOBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/dnp1110/config.mk b/board/dnp1110/config.mk
deleted file mode 100644
index 4f6af46f8c..0000000000
--- a/board/dnp1110/config.mk
+++ /dev/null
@@ -1,17 +0,0 @@
-#
-# DNP/1110 board with SA1100 cpu
-#
-# http://www.dilnetpc.com
-#
-
-#
-# DILNETPC has 1 banks of 32 MB DRAM
-#
-# c000'0000
-#
-# Linux-Kernel is expected to be at c000'8000, entry c000'8000
-#
-# we load ourself to c1f8'0000, the upper 1 MB of the first (only) bank
-#
-
-TEXT_BASE = 0xc1f80000
diff --git a/board/dnp1110/dnp1110.c b/board/dnp1110/dnp1110.c
deleted file mode 100644
index 24c3e00c7f..0000000000
--- a/board/dnp1110/dnp1110.c
+++ /dev/null
@@ -1,59 +0,0 @@
-/*
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <SA-1100.h>
-/* ------------------------------------------------------------------------- */
-
-
-/*
- * Miscelaneous platform dependent initialisations
- */
-
-int board_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- /* memory and cpu-speed are setup before relocation */
- /* so we do _nothing_ here */
-
- /* arch number of DNP1110-Board */
- gd->bd->bi_arch_number = MACH_TYPE_DNP1110;
-
- /* flash vpp on */
- PPDR |= 0x80; /* assumes LCD controller is off */
- PPSR |= 0x80;
-
- return 0;
-}
-
-int dram_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
-
- return (0);
-}
diff --git a/board/dnp1110/flash.c b/board/dnp1110/flash.c
deleted file mode 100644
index 60874ba9b8..0000000000
--- a/board/dnp1110/flash.c
+++ /dev/null
@@ -1,424 +0,0 @@
-/*
- * (C) Copyright 2001
- * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
- *
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <linux/byteorder/swab.h>
-
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/* Board support for 1 or 2 flash devices */
-#undef FLASH_PORT_WIDTH32
-#define FLASH_PORT_WIDTH16
-
-#ifdef FLASH_PORT_WIDTH16
-#define FLASH_PORT_WIDTH ushort
-#define FLASH_PORT_WIDTHV vu_short
-#define SWAP(x) __swab16(x)
-#else
-#define FLASH_PORT_WIDTH ulong
-#define FLASH_PORT_WIDTHV vu_long
-#define SWAP(x) __swab32(x)
-#endif
-
-#define FPW FLASH_PORT_WIDTH
-#define FPWV FLASH_PORT_WIDTHV
-
-#define mb() __asm__ __volatile__ ("" : : : "memory")
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (FPW *addr, flash_info_t *info);
-static int write_data (flash_info_t *info, ulong dest, FPW data);
-static void flash_get_offsets (ulong base, flash_info_t *info);
-void inline spin_wheel(void);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- int i;
- ulong size = 0;
-
- for (i = 0; i < CFG_MAX_FLASH_BANKS; i++)
- {
- switch (i)
- {
- case 0:
- flash_get_size((FPW *)PHYS_FLASH_1, &flash_info[i]);
- flash_get_offsets(PHYS_FLASH_1, &flash_info[i]);
- break;
- default:
- panic("configured too many flash banks!\n");
- break;
- }
- size += flash_info[i].size;
- }
-
- /* Protect monitor and environment sectors
- */
- flash_protect(FLAG_PROTECT_SET,
- CFG_FLASH_BASE,
- CFG_FLASH_BASE + monitor_flash_len - 1,
- &flash_info[0]);
-
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1,
- &flash_info[0]);
-
- return size;
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_get_offsets (ulong base, flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- return;
- }
-
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
- for (i = 0; i < info->sector_count; i++) {
- info->start[i] = base + (i * PHYS_FLASH_SECT_SIZE);
- info->protect[i] = 0;
- }
- }
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_INTEL: printf ("INTEL "); break;
- default: printf ("Unknown Vendor "); break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_28F128J3A:
- printf ("28F128J3A\n"); break;
- default: printf ("Unknown Chip Type\n"); break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " "
- );
- }
- printf ("\n");
- return;
-}
-
-/*
- * The following code cannot be run from FLASH!
- */
-static ulong flash_get_size (FPW *addr, flash_info_t *info)
-{
- volatile FPW value;
- /* Write auto select command: read Manufacturer ID */
- addr[0x5555] = (FPW)0x00AA00AA;
- addr[0x2AAA] = (FPW)0x00550055;
- addr[0x5555] = (FPW)0x00900090;
-
- mb();
- value = addr[0];
-
- switch (value) {
-
- case (FPW)INTEL_MANUFACT:
- info->flash_id = FLASH_MAN_INTEL;
- break;
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- addr[0] = (FPW)0x00FF00FF; /* restore read mode */
- return (0); /* no or unknown flash */
- }
-
- mb();
- value = addr[1]; /* device ID */
- switch (value) {
-
- case (FPW)INTEL_ID_28F128J3A:
- info->flash_id += FLASH_28F128J3A;
- info->sector_count = 128;
- info->size = 0x02000000;
- break; /* => 16 MB */
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- break;
- }
-
- if (info->sector_count > CFG_MAX_FLASH_SECT) {
- printf ("** ERROR: sector count %d > max (%d) **\n",
- info->sector_count, CFG_MAX_FLASH_SECT);
- info->sector_count = CFG_MAX_FLASH_SECT;
- }
-
- addr[0] = (FPW)0x00FF00FF; /* restore read mode */
-
- return (info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- int flag, prot, sect;
- ulong type, start, last;
- int rcode = 0;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- type = (info->flash_id & FLASH_VENDMASK);
- if ((type != FLASH_MAN_INTEL)) {
- printf ("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- start = get_timer (0);
- last = start;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- FPWV *addr = (FPWV *)(info->start[sect]);
- FPW status;
-
- printf("Erasing sector %2d ... ", sect);
-
- /* arm simple, non interrupt dependent timer */
- reset_timer_masked();
-
- *addr = (FPW)0x00500050; /* clear status register */
- *addr = (FPW)0x00200020; /* erase setup */
- *addr = (FPW)0x00D000D0; /* erase confirm */
-
- while (((status = *addr) & (FPW)0x00800080) != (FPW)0x00800080) {
- if (get_timer_masked() > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- *addr = (FPW)0x00B000B0; /* suspend erase */
- *addr = (FPW)0x00FF00FF; /* reset to read mode */
- rcode = 1;
- break;
- }
- }
-
- *addr = (FPW)0x00500050; /* clear status register cmd. */
- *addr = (FPW)0x00FF00FF; /* resest to read mode */
-
- printf (" done\n");
- }
- }
- return rcode;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- * 4 - Flash not identified
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp;
- FPW data;
- int count, i, l, rc, port_width;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- return 4;
- }
-/* get lower word aligned address */
-#ifdef FLASH_PORT_WIDTH16
- wp = (addr & ~1);
- port_width = 2;
-#else
- wp = (addr & ~3);
- port_width = 4;
-#endif
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
- for (; i<port_width && cnt>0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<port_width; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- if ((rc = write_data(info, wp, SWAP(data))) != 0) {
- return (rc);
- }
- wp += port_width;
- }
-
- /*
- * handle word aligned part
- */
- count = 0;
- while (cnt >= port_width) {
- data = 0;
- for (i=0; i<port_width; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_data(info, wp, SWAP(data))) != 0) {
- return (rc);
- }
- wp += port_width;
- cnt -= port_width;
- if (count++ > 0x800)
- {
- spin_wheel();
- count = 0;
- }
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<port_width && cnt>0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i<port_width; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- return (write_data(info, wp, SWAP(data)));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word or halfword to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_data (flash_info_t *info, ulong dest, FPW data)
-{
- FPWV *addr = (FPWV *)dest;
- ulong status;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*addr & data) != data) {
- printf("not erased at %08lx (%x)\n",(ulong)addr,*addr);
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- *addr = (FPW)0x00400040; /* write setup */
- *addr = data;
-
- /* arm simple, non interrupt dependent timer */
- reset_timer_masked();
-
- /* wait while polling the status register */
- while (((status = *addr) & (FPW)0x00800080) != (FPW)0x00800080) {
- if (get_timer_masked() > CFG_FLASH_WRITE_TOUT) {
- *addr = (FPW)0x00FF00FF; /* restore read mode */
- return (1);
- }
- }
-
- *addr = (FPW)0x00FF00FF; /* restore read mode */
-
- return (0);
-}
-
-void inline
-spin_wheel(void)
-{
- static int p=0;
- static char w[] = "\\/-";
-
- printf("\010%c", w[p]);
- (++p == 3) ? (p = 0) : 0;
-}
diff --git a/board/dnp1110/lowlevel_init.S b/board/dnp1110/lowlevel_init.S
deleted file mode 100644
index 7730be3437..0000000000
--- a/board/dnp1110/lowlevel_init.S
+++ /dev/null
@@ -1,135 +0,0 @@
-/*
- * Memory Setup stuff - taken from blob memsetup.S
- *
- * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) and
- * Jan-Derk Bakker (J.D.Bakker@its.tudelft.nl)
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-
-#include "config.h"
-#include "version.h"
-
-
-/* some parameters for the board */
-
-MEM_BASE: .long 0xa0000000
-MEM_START: .long 0xc0000000
-
-#define MDCNFG 0x00
-#define MDCAS00 0x04 /* CAS waveform rotate reg 0 */
-#define MDCAS01 0x08 /* CAS waveform rotate reg 1 bank */
-#define MDCAS02 0x0C /* CAS waveform rotate reg 2 bank */
-#define MDREFR 0x1C /* DRAM refresh control reg */
-#define MDCAS20 0x20 /* CAS waveform rotate reg 0 bank */
-#define MDCAS21 0x24 /* CAS waveform rotate reg 1 bank */
-#define MDCAS22 0x28 /* CAS waveform rotate reg 2 bank */
-#define MECR 0x18 /* Expansion memory (PCMCIA) bus configuration register */
-#define MSC0 0x10 /* static memory control reg 0 */
-#define MSC1 0x14 /* static memory control reg 1 */
-#define MSC2 0x2C /* static memory control reg 2 */
-#define SMCNFG 0x30 /* SMROM configuration reg */
-
-mdcas00: .long 0x5555557F
-mdcas01: .long 0x55555555
-mdcas02: .long 0x55555555
-mdcas20: .long 0x5555557F
-mdcas21: .long 0x55555555
-mdcas22: .long 0x55555555
-mdcnfg: .long 0x0000B25C
-mdrefr: .long 0x007000C1
-mecr: .long 0x10841084
-msc0: .long 0x00004774
-msc1: .long 0x00000000
-msc2: .long 0x00000000
-smcnfg: .long 0x00000000
-
-/* setting up the memory */
-
-.globl lowlevel_init
-lowlevel_init:
-
- ldr r0, MEM_BASE
-
- /* Set up the DRAM */
-
- /* MDCAS00 */
- ldr r1, mdcas00
- str r1, [r0, #MDCAS00]
-
- /* MDCAS01 */
- ldr r1, mdcas01
- str r1, [r0, #MDCAS01]
-
- /* MDCAS02 */
- ldr r1, mdcas02
- str r1, [r0, #MDCAS02]
-
- /* MDCAS20 */
- ldr r1, mdcas20
- str r1, [r0, #MDCAS20]
-
- /* MDCAS21 */
- ldr r1, mdcas21
- str r1, [r0, #MDCAS21]
-
- /* MDCAS22 */
- ldr r1, mdcas22
- str r1, [r0, #MDCAS22]
-
- /* MDREFR */
- ldr r1, mdrefr
- str r1, [r0, #MDREFR]
-
- /* Set up PCMCIA space */
- ldr r1, mecr
- str r1, [r0, #MECR]
-
- /* Setup the flash memory and other */
- ldr r1, msc0
- str r1, [r0, #MSC0]
-
- ldr r1, msc1
- str r1, [r0, #MSC1]
-
- ldr r1, msc2
- str r1, [r0, #MSC2]
-
- ldr r1, smcnfg
- str r1, [r0, #SMCNFG]
-
- /* MDCNFG */
- ldr r1, mdcnfg
- bic r1, r1, #0x00000001
- str r1, [r0, #MDCNFG]
-
- /* Load something to activate bank */
- ldr r2, MEM_START
-.rept 8
- ldr r1, [r2]
-.endr
-
- /* MDCNFG */
- ldr r1, mdcnfg
- orr r1, r1, #0x00000001
- str r1, [r0, #MDCNFG]
-
- /* everything is fine now */
- mov pc, lr
diff --git a/board/dnp1110/u-boot.lds b/board/dnp1110/u-boot.lds
deleted file mode 100644
index 258bece23c..0000000000
--- a/board/dnp1110/u-boot.lds
+++ /dev/null
@@ -1,56 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-ENTRY(_start)
-SECTIONS
-{
- . = 0x00000000;
-
- . = ALIGN(4);
- .text :
- {
- cpu/sa1100/start.o (.text)
- *(.text)
- }
-
- . = ALIGN(4);
- .rodata : { *(.rodata) }
-
- . = ALIGN(4);
- .data : { *(.data) }
-
- . = ALIGN(4);
- .got : { *(.got) }
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = ALIGN(4);
- __bss_start = .;
- .bss : { *(.bss) }
- _end = .;
-}
diff --git a/board/eXalion/Makefile b/board/eXalion/Makefile
deleted file mode 100644
index cfbf465bbe..0000000000
--- a/board/eXalion/Makefile
+++ /dev/null
@@ -1,41 +0,0 @@
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o
-SOBJS =
-
-$(LIB): .depend $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS) $(SOBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/eXalion/config.mk b/board/eXalion/config.mk
deleted file mode 100644
index b3f65ebe58..0000000000
--- a/board/eXalion/config.mk
+++ /dev/null
@@ -1,31 +0,0 @@
-#
-# (C) Copyright 2000, 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# Sandpoint boards
-#
-
-#TEXT_BASE = 0x00090000
-TEXT_BASE = 0xFFF00000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE)
diff --git a/board/eXalion/eXalion.c b/board/eXalion/eXalion.c
deleted file mode 100644
index 2e3f51998e..0000000000
--- a/board/eXalion/eXalion.c
+++ /dev/null
@@ -1,292 +0,0 @@
-/*
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2002
- * Torsten Demke, FORCE Computers GmbH. torsten.demke@fci.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc824x.h>
-#include <asm/processor.h>
-#include <asm/io.h>
-#include <pci.h>
-#include <ide.h>
-#include "piix_pci.h"
-#include "eXalion.h"
-
-int checkboard (void)
-{
- ulong busfreq = get_bus_freq (0);
- char buf[32];
-
- printf ("Board: eXalion MPC824x - CHRP (MAP B)\n");
- printf ("Built: %s at %s\n", __DATE__, __TIME__);
- printf ("Local Bus: %s MHz\n", strmhz (buf, busfreq));
-
- return 0;
-}
-
-int checkflash (void)
-{
- printf ("checkflash\n");
- flash_init ();
- return (0);
-}
-
-long int initdram (int board_type)
-{
- int i, cnt;
- volatile uchar *base = CFG_SDRAM_BASE;
- volatile ulong *addr;
- ulong save[32];
- ulong val, ret = 0;
-
- for (i = 0, cnt = (CFG_MAX_RAM_SIZE / sizeof (long)) >> 1; cnt > 0;
- cnt >>= 1) {
- addr = (volatile ulong *) base + cnt;
- save[i++] = *addr;
- *addr = ~cnt;
- }
-
- addr = (volatile ulong *) base;
- save[i] = *addr;
- *addr = 0;
-
- if (*addr != 0) {
- *addr = save[i];
- goto Done;
- }
-
- for (cnt = 1; cnt <= CFG_MAX_RAM_SIZE / sizeof (long); cnt <<= 1) {
- addr = (volatile ulong *) base + cnt;
- val = *addr;
- *addr = save[--i];
- if (val != ~cnt) {
- ulong new_bank0_end = cnt * sizeof (long) - 1;
- ulong mear1 = mpc824x_mpc107_getreg (MEAR1);
- ulong emear1 = mpc824x_mpc107_getreg (EMEAR1);
-
- mear1 = (mear1 & 0xFFFFFF00) |
- ((new_bank0_end & MICR_ADDR_MASK) >>
- MICR_ADDR_SHIFT);
- emear1 = (emear1 & 0xFFFFFF00) |
- ((new_bank0_end & MICR_ADDR_MASK) >>
- MICR_EADDR_SHIFT);
- mpc824x_mpc107_setreg (MEAR1, mear1);
- mpc824x_mpc107_setreg (EMEAR1, emear1);
-
- ret = cnt * sizeof (long);
- goto Done;
- }
- }
-
- ret = CFG_MAX_RAM_SIZE;
- Done:
- return ret;
-}
-
-int misc_init_r (void)
-{
- pci_dev_t bdf;
- u32 val32;
- u8 val8;
-
- puts ("ISA: ");
- bdf = pci_find_device (PIIX4_VENDOR_ID, PIIX4_ISA_DEV_ID, 0);
- if (bdf == -1) {
- puts ("Unable to find PIIX4 ISA bridge !\n");
- hang ();
- }
-
- /* set device for normal ISA instead EIO */
- pci_read_config_dword (bdf, PCI_CFG_PIIX4_GENCFG, &val32);
- val32 |= 0x00000001;
- pci_write_config_dword (bdf, PCI_CFG_PIIX4_GENCFG, val32);
- printf ("PIIX4 ISA bridge (%d,%d,%d)\n", PCI_BUS (bdf),
- PCI_DEV (bdf), PCI_FUNC (bdf));
-
- puts ("ISA: ");
- bdf = pci_find_device (PIIX4_VENDOR_ID, PIIX4_IDE_DEV_ID, 0);
- if (bdf == -1) {
- puts ("Unable to find PIIX4 IDE controller !\n");
- hang ();
- }
-
- /* Init BMIBA register */
- /* pci_read_config_dword(bdf, PCI_CFG_PIIX4_BMIBA, &val32); */
- /* val32 |= 0x1000; */
- /* pci_write_config_dword(bdf, PCI_CFG_PIIX4_BMIBA, val32); */
-
- /* Enable BUS master and IO access */
- val32 = PCI_COMMAND_MASTER | PCI_COMMAND_IO;
- pci_write_config_dword (bdf, PCI_COMMAND, val32);
-
- /* Set latency */
- pci_read_config_byte (bdf, PCI_LATENCY_TIMER, &val8);
- val8 = 0x40;
- pci_write_config_byte (bdf, PCI_LATENCY_TIMER, val8);
-
- /* Enable Primary ATA/IDE */
- pci_read_config_dword (bdf, PCI_CFG_PIIX4_IDETIM, &val32);
- /* val32 = 0xa307a307; */
- val32 = 0x00008000;
- pci_write_config_dword (bdf, PCI_CFG_PIIX4_IDETIM, val32);
-
-
- printf ("PIIX4 IDE controller (%d,%d,%d)\n", PCI_BUS (bdf),
- PCI_DEV (bdf), PCI_FUNC (bdf));
-
- /* Try to get FAT working... */
- /* fat_register_read(ide_read); */
-
-
- return (0);
-}
-
-/*
- * Show/Init PCI devices on the specified bus number.
- */
-
-void pci_eXalion_fixup_irq (struct pci_controller *hose, pci_dev_t dev)
-{
- unsigned char line;
-
- switch (PCI_DEV (dev)) {
- case 16:
- line = PCI_INT_A;
- break;
- case 17:
- line = PCI_INT_B;
- break;
- case 18:
- line = PCI_INT_C;
- break;
- case 19:
- line = PCI_INT_D;
- break;
-#if defined (CONFIG_MPC8245)
- case 20:
- line = PCI_INT_A;
- break;
- case 21:
- line = PCI_INT_B;
- break;
- case 22:
- line = PCI_INT_NA;
- break;
-#endif
- default:
- line = PCI_INT_A;
- break;
- }
- pci_hose_write_config_byte (hose, dev, PCI_INTERRUPT_LINE, line);
-}
-
-
-/*
- * Initialize PCI Devices, report devices found.
- */
-#ifndef CONFIG_PCI_PNP
-#if defined (CONFIG_MPC8240)
-static struct pci_config_table pci_eXalion_config_table[] = {
- {
- /* Intel 82559ER ethernet controller */
- PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x00, 18, 0x00,
- pci_cfgfunc_config_device, {PCI_ENET0_IOADDR,
- PCI_ENET0_MEMADDR,
- PCI_COMMAND_MEMORY |
- PCI_COMMAND_MASTER}},
- {
- /* Intel 82371AB PIIX4 PCI to ISA bridge */
- PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x00, 20, 0x00,
- pci_cfgfunc_config_device, {0,
- 0,
- PCI_COMMAND_IO | PCI_COMMAND_MASTER}},
- {
- /* Intel 82371AB PIIX4 IDE controller */
- PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x00, 20, 0x01,
- pci_cfgfunc_config_device, {0,
- 0,
- PCI_COMMAND_IO | PCI_COMMAND_MASTER}},
- {}
-};
-#elif defined (CONFIG_MPC8245)
-static struct pci_config_table pci_eXalion_config_table[] = {
- {
- /* Intel 82559ER ethernet controller */
- PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x00, 17, 0x00,
- pci_cfgfunc_config_device, {PCI_ENET0_IOADDR,
- PCI_ENET0_MEMADDR,
- PCI_COMMAND_MEMORY |
- PCI_COMMAND_MASTER}},
- {
- /* Intel 82559ER ethernet controller */
- PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x00, 18, 0x00,
- pci_cfgfunc_config_device, {PCI_ENET1_IOADDR,
- PCI_ENET1_MEMADDR,
- PCI_COMMAND_MEMORY |
- PCI_COMMAND_MASTER}},
- {
- /* Broadcom BCM5690 Gigabit switch */
- PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x00, 20, 0x00,
- pci_cfgfunc_config_device, {PCI_ENET2_IOADDR,
- PCI_ENET2_MEMADDR,
- PCI_COMMAND_MEMORY |
- PCI_COMMAND_MASTER}},
- {
- /* Broadcom BCM5690 Gigabit switch */
- PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x00, 21, 0x00,
- pci_cfgfunc_config_device, {PCI_ENET3_IOADDR,
- PCI_ENET3_MEMADDR,
- PCI_COMMAND_MEMORY |
- PCI_COMMAND_MASTER}},
- {
- /* Intel 82371AB PIIX4 PCI to ISA bridge */
- PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x00, 22, 0x00,
- pci_cfgfunc_config_device, {0,
- 0,
- PCI_COMMAND_IO | PCI_COMMAND_MASTER}},
- {
- /* Intel 82371AB PIIX4 IDE controller */
- PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x00, 22, 0x01,
- pci_cfgfunc_config_device, {0,
- 0,
- PCI_COMMAND_IO | PCI_COMMAND_MASTER}},
- {}
-};
-#else
-#error Specific type of MPC824x must be defined (i.e. CONFIG_MPC8240)
-#endif
-
-#endif /* #ifndef CONFIG_PCI_PNP */
-
-struct pci_controller hose = {
-#ifndef CONFIG_PCI_PNP
- config_table:pci_eXalion_config_table,
- fixup_irq:pci_eXalion_fixup_irq,
-#endif
-};
-
-void pci_init_board (void)
-{
- pci_mpc824x_init (&hose);
-}
diff --git a/board/eXalion/eXalion.h b/board/eXalion/eXalion.h
deleted file mode 100644
index 8dccabb71e..0000000000
--- a/board/eXalion/eXalion.h
+++ /dev/null
@@ -1,52 +0,0 @@
-/*
- * (C) Copyright 2002
- * Torsten Demke, FORCE Computers GmbH. torsten.demke@fci.com
- *
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2002
- * James Dougherty (jfd@broadcom.com)
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef __EXALION_H
-#define __EXALION_H
-
-/* IRQ settings */
-#define PCI_INT_NA (0xff) /* PCI Intr. not used */
-#define PCI_INT_A (0x09) /* PCI Intr. A Interrupt Request Line Nr. */
-#define PCI_INT_B (0x0a) /* PCI Intr. B Interrupt Request Line Nr. */
-#define PCI_INT_C (0x0b) /* PCI Intr. C Interrupt Request Line Nr. */
-#define PCI_INT_D (0x0c) /* PCI Intr. D Interrupt Request Line Nr. */
-#if defined (CPU_MPC8245)
-#define LN_1_INT PCI_INT_B /* ethernet interrupt level */
-#define LN_2_INT PCI_INT_C /* ethernet interrupt level */
-#define BCM_1_INT PCI_INT_A /* BCM5690 interrupt level */
-#define BCM_2_INT PCI_INT_B /* BCM5690 interrupt level */
-#elif defined (CPU_MPC8240)
-#define BCM_INT PCI_INT_B /* BCM5600 interrupt level */
-#define LN_INT PCI_INT_C /* ethernet interrupt level */
-#endif
-
-#ifndef __ASSEMBLY__
-#endif /* !__ASSEMBLY__ */
-
-#endif /* __EXALION_H */
diff --git a/board/eXalion/piix_pci.h b/board/eXalion/piix_pci.h
deleted file mode 100644
index b3c9c16cc8..0000000000
--- a/board/eXalion/piix_pci.h
+++ /dev/null
@@ -1,172 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2002
- * Torsten Demke, FORCE Computers GmbH. torsten.demke@fci.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-#ifndef _PIIX4_PCI_H
-#define _PIIX4_PCI_H
-
-#include <common.h>
-#include <mpc824x.h>
-#include <asm/processor.h>
-#include <asm/io.h>
-#include <pci.h>
-
-#define PIIX4_VENDOR_ID 0x8086
-#define PIIX4_ISA_DEV_ID 0x7110
-#define PIIX4_IDE_DEV_ID 0x7111
-
-/* Function 0 ISA Bridge */
-#define PCI_CFG_PIIX4_IORT 0x4C /* 8 bit ISA Recovery Timer Reg (default 0x4D) */
-#define PCI_CFG_PIIX4_XBCS 0x4E /* 16 bit XBus Chip select reg (default 0x0003) */
-#define PCI_CFG_PIIX4_PIRQC 0x60 /* PCI IRQ Route Register 4 x 8bit (default )*/
-#define PCI_CFG_PIIX4_SERIRQ 0x64
-#define PCI_CFG_PIIX4_TOM 0x69
-#define PCI_CFG_PIIX4_MSTAT 0x6A
-#define PCI_CFG_PIIX4_MBDMA 0x76
-#define PCI_CFG_PIIX4_APICBS 0x80
-#define PCI_CFG_PIIX4_DLC 0x82
-#define PCI_CFG_PIIX4_PDMACFG 0x90
-#define PCI_CFG_PIIX4_DDMABS 0x92
-#define PCI_CFG_PIIX4_GENCFG 0xB0
-#define PCI_CFG_PIIX4_RTCCFG 0xCB
-
-/* IO Addresses */
-#define PIIX4_ISA_DMA1_CH0BA 0x00
-#define PIIX4_ISA_DMA1_CH0CA 0x01
-#define PIIX4_ISA_DMA1_CH1BA 0x02
-#define PIIX4_ISA_DMA1_CH1CA 0x03
-#define PIIX4_ISA_DMA1_CH2BA 0x04
-#define PIIX4_ISA_DMA1_CH2CA 0x05
-#define PIIX4_ISA_DMA1_CH3BA 0x06
-#define PIIX4_ISA_DMA1_CH3CA 0x07
-#define PIIX4_ISA_DMA1_CMDST 0x08
-#define PIIX4_ISA_DMA1_REQ 0x09
-#define PIIX4_ISA_DMA1_WSBM 0x0A
-#define PIIX4_ISA_DMA1_CH_MOD 0x0B
-#define PIIX4_ISA_DMA1_CLR_PT 0x0C
-#define PIIX4_ISA_DMA1_M_CLR 0x0D
-#define PIIX4_ISA_DMA1_CLR_M 0x0E
-#define PIIX4_ISA_DMA1_RWAMB 0x0F
-
-#define PIIX4_ISA_DMA2_CH0BA 0xC0
-#define PIIX4_ISA_DMA2_CH0CA 0xC1
-#define PIIX4_ISA_DMA2_CH1BA 0xC2
-#define PIIX4_ISA_DMA2_CH1CA 0xC3
-#define PIIX4_ISA_DMA2_CH2BA 0xC4
-#define PIIX4_ISA_DMA2_CH2CA 0xC5
-#define PIIX4_ISA_DMA2_CH3BA 0xC6
-#define PIIX4_ISA_DMA2_CH3CA 0xC7
-#define PIIX4_ISA_DMA2_CMDST 0xD0
-#define PIIX4_ISA_DMA2_REQ 0xD2
-#define PIIX4_ISA_DMA2_WSBM 0xD4
-#define PIIX4_ISA_DMA2_CH_MOD 0xD6
-#define PIIX4_ISA_DMA2_CLR_PT 0xD8
-#define PIIX4_ISA_DMA2_M_CLR 0xDA
-#define PIIX4_ISA_DMA2_CLR_M 0xDC
-#define PIIX4_ISA_DMA2_RWAMB 0xDE
-
-#define PIIX4_ISA_INT1_ICW1 0x20
-#define PIIX4_ISA_INT1_OCW2 0x20
-#define PIIX4_ISA_INT1_OCW3 0x20
-#define PIIX4_ISA_INT1_ICW2 0x21
-#define PIIX4_ISA_INT1_ICW3 0x21
-#define PIIX4_ISA_INT1_ICW4 0x21
-#define PIIX4_ISA_INT1_OCW1 0x21
-
-#define PIIX4_ISA_INT1_ELCR 0x4D0
-
-#define PIIX4_ISA_INT2_ICW1 0xA0
-#define PIIX4_ISA_INT2_OCW2 0xA0
-#define PIIX4_ISA_INT2_OCW3 0xA0
-#define PIIX4_ISA_INT2_ICW2 0xA1
-#define PIIX4_ISA_INT2_ICW3 0xA1
-#define PIIX4_ISA_INT2_ICW4 0xA1
-#define PIIX4_ISA_INT2_OCW1 0xA1
-#define PIIX4_ISA_INT2_IMR 0xA1 /* read only */
-
-#define PIIX4_ISA_INT2_ELCR 0x4D1
-
-#define PIIX4_ISA_TMR0_CNT_ST 0x40
-#define PIIX4_ISA_TMR1_CNT_ST 0x41
-#define PIIX4_ISA_TMR2_CNT_ST 0x42
-#define PIIX4_ISA_TMR_TCW 0x43
-
-#define PIIX4_ISA_RST_XBUS 0x60
-
-#define PIIX4_ISA_NMI_CNT_ST 0x61
-#define PIIX4_ISA_NMI_ENABLE 0x70
-
-#define PIIX4_ISA_RTC_INDEX 0x70
-#define PIIX4_ISA_RTC_DATA 0x71
-#define PIIX4_ISA_RTCEXT_IND 0x70
-#define PIIX4_ISA_RTCEXT_DATA 0x71
-
-#define PIIX4_ISA_DMA1_CH2LPG 0x81
-#define PIIX4_ISA_DMA1_CH3LPG 0x82
-#define PIIX4_ISA_DMA1_CH1LPG 0x83
-#define PIIX4_ISA_DMA1_CH0LPG 0x87
-#define PIIX4_ISA_DMA2_CH2LPG 0x89
-#define PIIX4_ISA_DMA2_CH3LPG 0x8A
-#define PIIX4_ISA_DMA2_CH1LPG 0x8B
-#define PIIX4_ISA_DMA2_LPGRFR 0x8F
-
-#define PIIX4_ISA_PORT_92 0x92
-
-#define PIIX4_ISA_APM_CONTRL 0xB2
-#define PIIX4_ISA_APM_STATUS 0xB3
-
-#define PIIX4_ISA_COCPU_ERROR 0xF0
-
-/* Function 1 IDE Controller */
-#define PCI_CFG_PIIX4_BMIBA 0x20
-#define PCI_CFG_PIIX4_IDETIM 0x40
-#define PCI_CFG_PIIX4_SIDETIM 0x44
-#define PCI_CFG_PIIX4_UDMACTL 0x48
-#define PCI_CFG_PIIX4_UDMATIM 0x4A
-
-/* Function 2 USB Controller */
-#define PCI_CFG_PIIX4_SBRNUM 0x60
-#define PCI_CFG_PIIX4_LEGSUP 0xC0
-
-/* Function 3 Power Management */
-#define PCI_CFG_PIIX4_PMAB 0x40
-#define PCI_CFG_PIIX4_CNTA 0x44
-#define PCI_CFG_PIIX4_CNTB 0x48
-#define PCI_CFG_PIIX4_GPICTL 0x4C
-#define PCI_CFG_PIIX4_DEVRESD 0x50
-#define PCI_CFG_PIIX4_DEVACTA 0x54
-#define PCI_CFG_PIIX4_DEVACTB 0x58
-#define PCI_CFG_PIIX4_DEVRESA 0x5C
-#define PCI_CFG_PIIX4_DEVRESB 0x60
-#define PCI_CFG_PIIX4_DEVRESC 0x64
-#define PCI_CFG_PIIX4_DEVRESE 0x68
-#define PCI_CFG_PIIX4_DEVRESF 0x6C
-#define PCI_CFG_PIIX4_DEVRESG 0x70
-#define PCI_CFG_PIIX4_DEVRESH 0x74
-#define PCI_CFG_PIIX4_DEVRESI 0x78
-#define PCI_CFG_PIIX4_PMMISC 0x80
-#define PCI_CFG_PIIX4_SMBBA 0x90
-
-
-#endif /* _PIIX4_PCI_H */
diff --git a/board/eXalion/u-boot.lds b/board/eXalion/u-boot.lds
deleted file mode 100644
index eaee3fdefc..0000000000
--- a/board/eXalion/u-boot.lds
+++ /dev/null
@@ -1,136 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc824x/start.o (.text)
- lib_ppc/board.o (.text)
- lib_ppc/ppcstring.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
- lib_generic/zlib.o (.text)
-
- . = DEFINED(env_offset) ? env_offset : .;
- common/environment.o (.text)
-
- *(.text)
-
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
-
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/eltec/bab7xx/Makefile b/board/eltec/bab7xx/Makefile
deleted file mode 100644
index 7d8ed26b52..0000000000
--- a/board/eltec/bab7xx/Makefile
+++ /dev/null
@@ -1,48 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o pci.o misc.o el_srom.o dc_srom.o l2cache.o
-
-SOBJS = asm_init.o
-
-$(LIB): .depend $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS) $(SOBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/eltec/bab7xx/asm_init.S b/board/eltec/bab7xx/asm_init.S
deleted file mode 100644
index 2a9b33e12c..0000000000
--- a/board/eltec/bab7xx/asm_init.S
+++ /dev/null
@@ -1,1476 +0,0 @@
-/*
- * (C) Copyright 2001 ELTEC Elektronik AG
- * Frank Gottschling <fgottschling@eltec.de>
- *
- * ELTEC BAB PPC RAM initialization
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <config.h>
-#include <asm/processor.h>
-#include <74xx_7xx.h>
-#include <mpc106.h>
-#include <version.h>
-
-#include <ppc_asm.tmpl>
-#include <ppc_defs.h>
-
-/*
- * This following contains the entry code for the initialization code
- * for the MPC 106, a PCI Bridge/Memory Controller.
- * Register usage:
- * r0 = ramtest scratch register, toggleError loop counter
- * r1 = 0xfec0 0cf8 CONFIG_ADDRESS
- * r2 = 0xfee0 0cfc CONFIG_DATA
- * r3 = scratch register, subroutine argument and return value, ramtest size
- * r4 = scratch register, spdRead clock mask, OutHex loop count
- * r5 = ramtest scratch register
- * r6 = toggleError 1st value, spdRead port mask
- * r7 = toggleError 2nd value, ramtest scratch register,
- * spdRead scratch register (0x00)
- * r8 = ramtest scratch register, spdRead scratch register (0x80)
- * r9 = ramtest scratch register, toggleError loop end, OutHex digit
- * r10 = ramtest scratch register, spdWriteByte parameter,
- * spdReadByte return value, printf pointer to COM1
- * r11 = startType
- * r12 = ramtest scratch register, spdRead data mask
- * r13 = pointer to message block
- * r14 = pointer to GOT
- * r15 = scratch register, SPD save
- * r16 = bank0 size, total memory size
- * r17 = bank1 size
- * r18 = bank2 size
- * r19 = bank3 size
- * r20 = MCCR1, MSAR1
- * r21 = MCCR3, MEAR1
- * r22 = MCCR4, MBER
- * r23 = EMSAR1
- * r24 = EMEAR1
- * r25 = save link register 1st level
- * r26 = save link register 2nd level
- * r27 = save link register 3rd level
- * r30 = pointer to GPIO for spdRead
- */
-
-
-.globl board_asm_init
-board_asm_init:
-/*
- * setup pointer to message block
- */
- mflr r25 /* save away link register */
- bl get_lnk_reg /* r3=addr of next instruction */
- subi r4, r3, 8 /* r4=board_asm_init addr */
- addi r13, r4, (MessageBlock-board_asm_init)
-/*
- * dcache_disable
- */
- mfspr r3, HID0
- li r4, HID0_DCE
- andc r3, r3, r4
- mr r2, r3
- ori r3, r3, HID0_DCI
- sync
- mtspr HID0, r3
- mtspr HID0, r2
- isync
- sync
-/*
- * icache_disable
- */
- mfspr r3, HID0
- li r4, 0
- ori r4, r4, HID0_ICE
- andc r3, r3, r4
- sync
- mtspr HID0, r3
-/*
- * invalidate caches
- */
- ori r3, r3, (HID0_ICE | HID0_ICFI | HID0_DCI | HID0_DCE)
- or r4, r4, r3
- isync
- mtspr HID0, r4
- andc r4, r4, r3
- isync
- mtspr HID0, r4
- isync
-/*
- * icache_enable
- */
- mfspr r3, HID0
- ori r3, r3, (HID0_ICE | HID0_ICFI)
- sync
- mtspr HID0, r3
-
- lis r1, 0xfec0
- ori r1, r1, 0x0cf8
- lis r2, 0xfee0
- ori r2, r2, 0xcfc
-
-#ifdef CFG_ADDRESS_MAP_A
-/*
- * Switch to address map A if necessary.
- */
- lis r3, MPC106_REG@h
- ori r3, r3, PCI_PICR1
- stwbrx r3, 0, r1
- sync
- lwbrx r4, 0, r2
- sync
- lis r0, PICR1_XIO_MODE@h
- ori r0, r0, PICR1_XIO_MODE@l
- andc r4, r4, r0
- lis r0, PICR1_ADDRESS_MAP@h
- ori r0, r0, PICR1_ADDRESS_MAP@l
- or r4, r4, r0
- stwbrx r4, 0, r2
- sync
-#endif
-
-/*
- * Do the init for the SIO.
- */
- bl .sioInit
-
- addi r3, r13, (MinitLogo-MessageBlock)
- bl Printf
-
- addi r3, r13, (Mspd01-MessageBlock)
- bl Printf
-/*
- * Memory cofiguration using SPD information stored on the SODIMMs
- */
- li r17, 0
- li r18, 0
- li r19, 0
-
- li r3, 0x0002 /* get RAM type from spd for bank0/1 */
- bl spdRead
-
- cmpi 0, 0, r3, -1 /* error ? */
- bne noSpdError
-
- addi r3, r13, (Mfail-MessageBlock)
- bl Printf
-
- li r6, 0xe0 /* error codes in r6 and r7 */
- li r7, 0x00
- b toggleError /* fail - loop forever */
-
-noSpdError:
- mr r15, r3 /* save r3 */
-
- addi r3, r13, (Mok-MessageBlock)
- bl Printf
-
- cmpli 0, 0, r15, 0x0001 /* FPM ? */
- beq configFPM
- cmpli 0, 0, r15, 0x0002 /* EDO ? */
- beq configEDO
- cmpli 0, 0, r15, 0x0004 /* SDRAM ? */
- beq configSDRAM
-
- li r6, 0xe0 /* error codes in r6 and r7 */
- li r7, 0x01
- b toggleError /* fail - loop forever */
-
-configSDRAM:
- addi r3, r13, (MsdRam-MessageBlock)
- bl Printf
-/*
- * set the Memory Configuration Reg. 1
- */
- li r3, 0x001f /* get bank size from spd bank0/1 */
- bl spdRead
-
- andi. r3, r3, 0x0038
- beq SD16MB2B
-
- li r3, 0x0011 /* get number of internal banks */
- /* from spd for bank0/1 */
- bl spdRead
-
- cmpli 0, 0, r3, 0x02
- beq SD64MB2B
-
- cmpli 0, 0, r3, 0x04
- beq SD64MB4B
-
- li r6, 0xe0 /* error codes in r6 and r7 */
- li r7, 0x02
- b toggleError /* fail - loop forever */
-
-SD64MB2B:
- li r20, 0x0005 /* 64-Mbit SDRAM 2 banks */
- b SDRow2nd
-
-SD64MB4B:
- li r20, 0x0000 /* 64-Mbit SDRAM 4 banks */
- b SDRow2nd
-
-SD16MB2B:
- li r20, 0x000f /* 16-Mbit SDRAM 2 banks */
-
-SDRow2nd:
- li r3, 0x0102 /* get RAM type spd for bank2/3 */
- bl spdRead
-
- cmpli 0, 0, r3, 0x0004
- bne S2D64MB4B /* bank2/3 isn't present or no SDRAM */
-
- li r3, 0x011f /* get bank size from spd bank2/3 */
- bl spdRead
-
- andi. r3, r3, 0x0038
- beq S2D16MB2B
-/*
- * set the Memory Configuration Reg. 2
- */
- li r3, 0x0111 /* get number of internal banks */
- /* from spd for bank2/3 */
- bl spdRead
-
- cmpli 0, 0, r3, 0x02
- beq S2D64MB2B
-
- cmpli 0, 0, r3, 0x04
- beq S2D64MB4B
-
- li r6, 0xe0 /* error codes in r6 and r7 */
- li r7, 0x03
- b toggleError /* fail - loop forever */
-
-S2D64MB2B:
- ori r20, r20, 0x0050 /* 64-Mbit SDRAM 2 banks */
- b S2D64MB4B
-
-S2D16MB2B:
- ori r20, r20, 0x00f0 /* 16-Mbit SDRAM 2 banks */
-
-/*
- * set the Memory Configuration Reg. 3
- */
-S2D64MB4B:
- lis r21, 0x8630 /* BSTOPRE = 0x80, REFREC = 6, */
- /* RDLAT = 3 */
-
-/*
- * set the Memory Configuration Reg. 4
- */
- lis r22, 0x2430 /* PRETOACT = 2, ACTOPRE = 4, */
- /* WCBUF = 1, RCBUF = 1 */
- ori r22, r22, 0x2220 /* SDMODE = 0x022, ACTORW = 2 */
-
-/*
- * get the size of bank 0-3
- */
- li r3, 0x001f /* get bank size from spd bank0/1 */
- bl spdRead
-
- rlwinm r16, r3, 2, 24, 29 /* calculate size in MByte */
- /* (128 MB max.) */
-
- li r3, 0x0005 /* get number of banks from spd */
- /* for bank0/1 */
- bl spdRead
-
- cmpi 0, 0, r3, 2 /* 2 banks ? */
- bne SDRAMnobank1
-
- mr r17, r16
-
-SDRAMnobank1:
- addi r3, r13, (Mspd23-MessageBlock)
- bl Printf
-
- li r3, 0x0102 /* get RAM type spd for bank2/3 */
- bl spdRead
-
- cmpli 0, 0, r3, 0x0001 /* FPM ? */
- bne noFPM23 /* handle as EDO */
- addi r3, r13, (Mok-MessageBlock)
- bl Printf
- addi r3, r13, (MfpmRam-MessageBlock)
- bl Printf
- b configRAMcommon
-noFPM23:
- cmpli 0, 0, r3, 0x0002 /* EDO ? */
- bne noEDO23
- addi r3, r13, (Mok-MessageBlock)
- bl Printf
- addi r3, r13, (MedoRam-MessageBlock)
- bl Printf
- b configRAMcommon
-noEDO23:
- cmpli 0, 0, r3, 0x0004 /* SDRAM ? */
- bne noSDRAM23
- addi r3, r13, (Mok-MessageBlock)
- bl Printf
- addi r3, r13, (MsdRam-MessageBlock)
- bl Printf
- b configSDRAM23
-noSDRAM23:
- addi r3, r13, (Mna-MessageBlock)
- bl Printf
- b configRAMcommon /* bank2/3 isn't present or no SDRAM */
-
-configSDRAM23:
- li r3, 0x011f /* get bank size from spd bank2/3 */
- bl spdRead
-
- rlwinm r18, r3, 2, 24, 29 /* calculate size in MByte */
- /* (128 MB max.) */
-
- li r3, 0x0105 /* get number of banks from */
- /* spd bank0/1 */
- bl spdRead
-
- cmpi 0, 0, r3, 2 /* 2 banks ? */
- bne SDRAMnobank3
-
- mr r19, r18
-
-SDRAMnobank3:
- b configRAMcommon
-
-configFPM:
- addi r3, r13, (MfpmRam-MessageBlock)
- bl Printf
- b configEDO0
-/*
- * set the Memory Configuration Reg. 1
- */
-configEDO:
- addi r3, r13, (MedoRam-MessageBlock)
- bl Printf
-configEDO0:
- lis r20, MCCR1_TYPE_EDO@h
-
-getSpdRowBank01:
- li r3, 0x0003 /* get number of row bits from */
- /* spd from bank0/1 */
- bl spdRead
- ori r20, r20, (MCCR1_BK0_9BITS | MCCR1_BK1_9BITS)
- cmpli 0, 0, r3, 0x0009 /* bank0 - 9 row bits */
- beq getSpdRowBank23
-
- ori r20, r20, (MCCR1_BK0_10BITS | MCCR1_BK1_10BITS)
- cmpli 0, 0, r3, 0x000a /* bank0 - 10 row bits */
- beq getSpdRowBank23
-
- ori r20, r20, (MCCR1_BK0_11BITS | MCCR1_BK1_11BITS)
- cmpli 0, 0, r3, 0x000b /* bank0 - 11 row bits */
- beq getSpdRowBank23
-
- ori r20, r20, (MCCR1_BK0_12BITS | MCCR1_BK1_12BITS)
- cmpli 0, 0, r3, 0x000c /* bank0 - 12 row bits */
- beq getSpdRowBank23
-
- cmpli 0, 0, r3, 0x000d /* bank0 - 13 row bits */
- beq getSpdRowBank23
-
- li r6, 0xe0 /* error codes in r6 and r7 */
- li r7, 0x10
- b toggleError /* fail - loop forever */
-
-getSpdRowBank23:
- li r3, 0x0103 /* get number of row bits from */
- /* spd for bank2/3 */
- bl spdRead
-
- ori r20, r20, (MCCR1_BK2_9BITS | MCCR1_BK3_9BITS)
- cmpli 0, 0, r3, 0x0009 /* bank0 - 9 row bits */
- beq writeRowBits
-
- ori r20, r20, (MCCR1_BK2_10BITS | MCCR1_BK3_10BITS)
- cmpli 0, 0, r3, 0x000a /* bank0 - 10 row bits */
- beq writeRowBits
-
- ori r20, r20, (MCCR1_BK2_11BITS | MCCR1_BK3_11BITS)
- cmpli 0, 0, r3, 0x000b /* bank0 - 11 row bits */
- beq writeRowBits
-
- ori r20, r20, (MCCR1_BK2_12BITS | MCCR1_BK3_12BITS)
-
-/*
- * set the Memory Configuration Reg. 3
- */
-writeRowBits:
- lis r21, 0x000a /* CPX = 1, RAS6P = 4 */
- ori r21, r21, 0x2293 /* CAS5 = 2, CP4 = 1, */
- /* CAS3 = 2, RCD2 = 2, RP = 3 */
-/*
- * set the Memory Configuration Reg. 4
- */
- lis r22, 0x0010 /* all SDRAM parameter 0, */
- /* WCBUF flow through, */
- /* RCBUF registered */
-/*
- * get the size of bank 0-3
- */
- li r3, 0x0003 /* get row bits from spd bank0/1 */
- bl spdRead
-
- li r16, 0 /* bank size is: */
- /* (8*2^row*2^column)/0x100000 MB */
- ori r16, r16, 0x8000
- rlwnm r16, r16, r3, 0, 31
-
- li r3, 0x0004 /* get column bits from spd bank0/1 */
- bl spdRead
-
- rlwnm r16, r16, r3, 0, 31
-
- li r3, 0x0005 /* get number of banks from */
- /* spd for bank0/1 */
- bl spdRead
-
- cmpi 0, 0, r3, 2 /* 2 banks ? */
- bne EDOnobank1
-
- mr r17, r16
-
-EDOnobank1:
- addi r3, r13, (Mspd23-MessageBlock)
- bl Printf
-
- li r3, 0x0102 /* get RAM type spd for bank2/3 */
- bl spdRead
-
- cmpli 0, 0, r3, 0x0001 /* FPM ? */
- bne noFPM231 /* handle as EDO */
- addi r3, r13, (Mok-MessageBlock)
- bl Printf
- addi r3, r13, (MfpmRam-MessageBlock)
- bl Printf
- b EDObank2
-noFPM231:
- cmpli 0, 0, r3, 0x0002 /* EDO ? */
- bne noEDO231
- addi r3, r13, (Mok-MessageBlock)
- bl Printf
- addi r3, r13, (MedoRam-MessageBlock)
- bl Printf
- b EDObank2
-noEDO231:
- cmpli 0, 0, r3, 0x0004 /* SDRAM ? */
- bne noSDRAM231
- addi r3, r13, (Mok-MessageBlock)
- bl Printf
- addi r3, r13, (MsdRam-MessageBlock)
- bl Printf
- b configRAMcommon
-noSDRAM231:
- addi r3, r13, (Mfail-MessageBlock)
- bl Printf
- b configRAMcommon /* bank2/3 isn't present or no SDRAM */
-
-EDObank2:
- li r3, 0x0103 /* get row bits from spd for bank2/3 */
- bl spdRead
-
- li r18, 0 /* bank size is: */
- /* (8*2^row*2^column)/0x100000 MB */
- ori r18, r18, 0x8000
- rlwnm r18, r18, r3, 0, 31
-
- li r3, 0x0104 /* get column bits from spd bank2/3 */
- bl spdRead
-
- rlwnm r18, r18, r3, 0, 31
-
- li r3, 0x0105 /* get number of banks from */
- /* spd for bank2/3 */
- bl spdRead
-
- cmpi 0, 0, r3, 2 /* 2 banks ? */
- bne configRAMcommon
-
- mr r19, r18
-
-configRAMcommon:
- lis r1, MPC106_REG_ADDR@h
- ori r1, r1, MPC106_REG_ADDR@l
- lis r2, MPC106_REG_DATA@h
- ori r2, r2, MPC106_REG_DATA@l
-
- li r0, 0
-
-/*
- * If we are already running in RAM (debug mode), we should
- * NOT reset the MEMGO flag. Otherwise we will stop all memory
- * accesses.
- */
-#ifdef IN_RAM
- lis r4, MCCR1_MEMGO@h
- ori r4, r4, MCCR1_MEMGO@l
- or r20, r20, r4
-#endif
-
-/*
- * set the Memory Configuration Reg. 1
- */
- lis r3, MPC106_REG@h /* start building new reg number */
- ori r3, r3, MPC106_MCCR1 /* register number 0xf0 */
- stwbrx r3, r0, r1 /* write this value to CONFIG_ADDR */
- eieio /* make sure mem. access is complete */
- stwbrx r20, r0, r2 /* write data to CONFIG_DATA */
-/*
- * set the Memory Configuration Reg. 3
- */
- lis r3, MPC106_REG@h /* start building new reg number */
- ori r3, r3, MPC106_MCCR3 /* register number 0xf8 */
- stwbrx r3, r0, r1 /* write this value to CONFIG_ADDR */
- eieio /* make sure mem. access is complete */
- stwbrx r21, r0, r2 /* write data to CONFIG_DATA */
-/*
- * set the Memory Configuration Reg. 4
- */
- lis r3, MPC106_REG@h /* start building new reg number */
- ori r3, r3, MPC106_MCCR4 /* register number 0xfc */
- stwbrx r3, r0, r1 /* write this value to CONFIG_ADDR */
- eieio /* make sure mem. access is complete */
- stwbrx r22, r0, r2 /* write data to CONFIG_DATA */
-/*
- * set the memory boundary registers for bank 0-3
- */
- li r20, 0
- li r23, 0
- li r24, 0
- subi r21, r16, 1 /* calculate end address bank0 */
- li r22, (MBER_BANK0)
-
- cmpi 0, 0, r17, 0 /* bank1 present ? */
- beq nobank1
-
- rlwinm r3, r16, 8, 16, 23 /* calculate start address of bank1 */
- or r20, r20, r3
- add r16, r16, r17 /* add to total memory size */
- subi r3, r16, 1 /* calculate end address of bank1 */
- rlwinm r3, r3, 8, 16, 23
- or r21, r21, r3
- ori r22, r22, (MBER_BANK1) /* enable bank1 */
- b bank2
-
-nobank1:
- ori r23, r23, 0x0300 /* set bank1 start to unused area */
- ori r24, r24, 0x0300 /* set bank1 end to unused area */
-
-bank2:
- cmpi 0, 0, r18, 0 /* bank2 present ? */
- beq nobank2
-
- andi. r3, r16, 0x00ff /* calculate start address of bank2 */
- andi. r4, r16, 0x0300
- rlwinm r3, r3, 16, 8, 15
- or r20, r20, r3
- rlwinm r3, r4, 8, 8, 15
- or r23, r23, r3
- add r16, r16, r18 /* add to total memory size */
- subi r3, r16, 1 /* calculate end address of bank2 */
- andi. r4, r3, 0x0300
- andi. r3, r3, 0x00ff
- rlwinm r3, r3, 16, 8, 15
- or r21, r21, r3
- rlwinm r3, r4, 8, 8, 15
- or r24, r24, r3
- ori r22, r22, (MBER_BANK2) /* enable bank2 */
- b bank3
-
-nobank2:
- lis r3, 0x0003
- or r23, r23, r3 /* set bank2 start to unused area */
- or r24, r24, r3 /* set bank2 end to unused area */
-
-bank3:
- cmpi 0, 0, r19, 0 /* bank3 present ? */
- beq nobank3
-
- andi. r3, r16, 0x00ff /* calculate start address of bank3 */
- andi. r4, r16, 0x0300
- rlwinm r3, r3, 24, 0, 7
- or r20, r20, r3
- rlwinm r3, r4, 16, 0, 7
- or r23, r23, r3
- add r16, r16, r19 /* add to total memory size */
- subi r3, r16, 1 /* calculate end address of bank3 */
- andi. r4, r3, 0x0300
- andi. r3, r3, 0x00ff
- rlwinm r3, r3, 24, 0, 7
- or r21, r21, r3
- rlwinm r3, r4, 16, 0, 7
- or r24, r24, r3
- ori r22, r22, (MBER_BANK3) /* enable bank3 */
- b writebound
-
-nobank3:
- lis r3, 0x0300
- or r23, r23, r3 /* set bank3 start to unused area */
- or r24, r24, r3 /* set bank3 end to unused area */
-
-writebound:
- lis r3, MPC106_REG@h /* start building new reg number */
- ori r3, r3, MPC106_MSAR1 /* register number 0x80 */
- stwbrx r3, r0, r1 /* write this value to CONFIG_ADDR */
- eieio /* make sure mem. access is complete */
- stwbrx r20, r0, r2 /* write data to CONFIG_DATA */
-
- lis r3, MPC106_REG@h /* start building new reg number */
- ori r3, r3, MPC106_MEAR1 /* register number 0x90 */
- stwbrx r3, r0, r1 /* write this value to CONFIG_ADDR */
- eieio /* make sure mem. access is complete */
- stwbrx r21, r0, r2 /* write data to CONFIG_DATA */
-
- lis r3, MPC106_REG@h /* start building new reg number */
- ori r3, r3, MPC106_EMSAR1 /* register number 0x88 */
- stwbrx r3, r0, r1 /* write this value to CONFIG_ADDR */
- eieio /* make sure mem. access is complete */
- stwbrx r23, r0, r2 /* write data to CONFIG_DATA */
-
- lis r3, MPC106_REG@h /* start building new reg number */
- ori r3, r3, MPC106_EMEAR1 /* register number 0x98 */
- stwbrx r3, r0, r1 /* write this value to CONFIG_ADDR */
- eieio /* make sure mem. access is complete */
- stwbrx r24, r0, r2 /* write data to CONFIG_DATA */
-
-/*
- * set boundaries of unused banks to unused address space
- */
- lis r4, 0x0303
- ori r4, r4, 0x0303 /* bank 4-7 start and end adresses */
- lis r3, MPC106_REG@h /* start building new reg number */
- ori r3, r3, MPC106_EMSAR2 /* register number 0x8C */
- stwbrx r3, r0, r1 /* write this value to CONFIG_ADDR */
- eieio /* make sure mem. access is complete */
- stwbrx r4, r0, r2 /* write data to CONFIG_DATA */
-
- lis r3, MPC106_REG@h /* start building new reg number */
- ori r3, r3, MPC106_EMEAR2 /* register number 0x9C */
- stwbrx r3, r0, r1 /* write this value to CONFIG_ADDR */
- eieio /* make sure mem. access is complete */
- stwbrx r4, r0, r2 /* write data to CONFIG_DATA */
-
-/*
- * set the Memory Configuration Reg. 2
- */
- lis r3, MPC106_REG@h /* start building new reg number */
- ori r3, r3, MPC106_MCCR2 /* register number 0xf4 */
- stwbrx r3, r0, r1 /* write this value to CONFIG_ADDR */
- eieio /* make sure mem. access is complete */
-
- li r3, 0x000c /* get refresh from spd for bank0/1 */
- bl spdRead
-
- cmpi 0, 0, r3, -1 /* error ? */
- bne common1
-
- li r6, 0xe0 /* error codes in r6 and r7 */
- li r7, 0x20
- b toggleError /* fail - loop forever */
-
-common1:
- andi. r15, r3, 0x007f /* mask selfrefresh bit */
- li r3, 0x010c /* get refresh from spd for bank2/3 */
- bl spdRead
-
- cmpi 0, 0, r3, -1 /* error ? */
- beq common2
- andi. r3, r3, 0x007f /* mask selfrefresh bit */
- cmp 0, 0, r3, r15 /* find the lower */
- blt common3
-
-common2:
- mr r3, r15
-
-common3:
- li r4, 0x1010 /* refesh cycle 1028 clocks */
- /* left shifted 2 */
- cmpli 0, 0, r3, 0x0000 /* 15.6 us ? */
- beq writeRefresh
-
- li r4, 0x0808 /* refesh cycle 514 clocks */
- /* left shifted 2 */
- cmpli 0, 0, r3, 0x0002 /* 7.8 us ? */
- beq writeRefresh
-
- li r4, 0x2020 /* refesh cycle 2056 clocks */
- /* left shifted 2 */
- cmpli 0, 0, r3, 0x0003 /* 31.3 us ? */
- beq writeRefresh
-
- li r4, 0x4040 /* refesh cycle 4112 clocks */
- /* left shifted 2 */
- cmpli 0, 0, r3, 0x0004 /* 62.5 us ? */
- beq writeRefresh
-
- li r4, 0
- ori r4, r4, 0x8080 /* refesh cycle 8224 clocks */
- /* left shifted 2 */
- cmpli 0, 0, r3, 0x0005 /* 125 us ? */
- beq writeRefresh
-
- li r6, 0xe0 /* error codes in r6 and r7 */
- li r7, 0x21
- b toggleError /* fail - loop forever */
-
-writeRefresh:
- stwbrx r4, r0, r2 /* write data to CONFIG_DATA */
-
-/*
- * DRAM BANKS SHOULD BE ENABLED
- */
- addi r3, r13, (Mactivate-MessageBlock)
- bl Printf
- mr r3, r16
- bl OutDec
- addi r3, r13, (Mmbyte-MessageBlock)
- bl Printf
-
- lis r3, MPC106_REG@h /* start building new reg number */
- ori r3, r3, MPC106_MBER /* register number 0xa0 */
- stwbrx r3, r0, r1 /* write this value to CONFIG_ADDR */
- eieio /* make sure mem. access is complete */
- stb r22, 0(r2) /* write data to CONFIG_DATA */
- li r8, 0x63 /* PGMAX = 99 */
- stb r8, 3(r2) /* write data to CONFIG_DATA */
-
-/*
- * DRAM SHOULD NOW BE CONFIGURED AND ENABLED
- * MUST WAIT 200us BEFORE ACCESSING
- */
- li r0, 0x7800
- mtctr r0
-
-wait200us:
- bdnz wait200us
-
- lis r3, MPC106_REG@h /* start building new reg number */
- ori r3, r3, MPC106_MCCR1 /* register number 0xf0 */
- stwbrx r3, r0, r1 /* write this value to CONFIG_ADDR */
- eieio /* make sure mem. access is complete */
-
- lwbrx r4, r0, r2 /* load r4 from CONFIG_DATA */
-
- lis r0, MCCR1_MEMGO@h /* MEMGO=1 */
- ori r0, r0, MCCR1_MEMGO@l
- or r4, r4, r0 /* set the MEMGO bit */
- stwbrx r4, r0, r2 /* write mdfd data to CONFIG_DATA */
-
- li r0, 0x7000
- mtctr r0
-
-wait8ref:
- bdnz wait8ref
-
- addi r3, r13, (Mok-MessageBlock)
- bl Printf
-
- mtlr r25
- blr
-
-/*
- * Infinite loop called in case of an error during RAM initialisation.
- * error codes in r6 and r7.
- */
-toggleError:
- li r0, 0
- lis r9, 127
- ori r9, r9, 65535
-toggleError1:
- addic r0, r0, 1
- cmpw cr1, r0, r9
- ble cr1, toggleError1
- li r0, 0
- lis r9, 127
- ori r9, r9, 65535
-toggleError2:
- addic r0, r0, 1
- cmpw cr1, r0, r9
- ble cr1, toggleError2
- b toggleError
-
-
-/******************************************************************************
- * This function performs a basic initialisation of the superio chip
- * to enable basic console output and SPD access during RAM initialisation.
- *
- * Upon completion, SIO resource registers are mapped as follows:
- * Resource Enabled Address
- * UART1 Yes 3F8-3FF COM1
- * UART2 Yes 2F8-2FF COM2
- * GPIO Yes 220-227
- */
-.set SIO_LUNINDEX, 0x07 /* SIO LUN index register */
-.set SIO_CNFG1, 0x21 /* SIO configuration #1 register */
-.set SIO_PCSCI, 0x23 /* SIO PCS configuration index reg */
-.set SIO_PCSCD, 0x24 /* SIO PCS configuration data reg */
-.set SIO_ACTIVATE, 0x30 /* SIO activate register */
-.set SIO_IOBASEHI, 0x60 /* SIO I/O port base address, 15:8 */
-.set SIO_IOBASELO, 0x61 /* SIO I/O port base address, 7:0 */
-.set SIO_LUNENABLE, 0x01 /* SIO LUN enable */
-
-.sioInit:
- mfspr r7, 8 /* save link register */
-
-.sioInit_87308:
-
-/*
- * Get base addr of ISA I/O space
- */
- lis r6, CFG_ISA_IO@h
- ori r6, r6, CFG_ISA_IO@l
-
-/*
- * Set offset to base address for config registers.
- */
-#if defined(CFG_NS87308_BADDR_0x)
- addi r4, r0, 0x0279
-#elif defined(CFG_NS87308_BADDR_10)
- addi r4, r0, 0x015C
-#elif defined(CFG_NS87308_BADDR_11)
- addi r4, r0, 0x002E
-#endif
- add r6, r6, r4 /* add offset to base */
- or r3, r6, r6 /* make a copy */
-
-/*
- * PMC (LUN 8)
- */
- addi r4, r0, SIO_LUNINDEX /* select PMC LUN */
- addi r5, r0, 0x8
- bl .sio_bw
- addi r4, r0, SIO_IOBASEHI /* initialize PMC address to 0x460 */
- addi r5, r0, 0x04
- bl .sio_bw
- addi r4, r0, SIO_IOBASELO
- addi r5, r0, 0x60
- bl .sio_bw
- addi r4, r0, SIO_ACTIVATE /* enable PMC */
- addi r5, r0, SIO_LUNENABLE
- bl .sio_bw
-
- lis r8, CFG_ISA_IO@h
- ori r8, r8, 0x0460
- li r9, 0x03
- stb r9, 0(r8) /* select PMC2 register */
- eieio
- li r9, 0x00
- stb r9, 1(r8) /* SuperI/O clock src: 24MHz via X1 */
- eieio
-
-/*
- * map UART1 (LUN 6) or UART2 (LUN 5) to COM1 (0x3F8)
- */
- addi r4, r0, SIO_LUNINDEX /* select COM1 LUN */
- addi r5, r0, 0x6
- bl .sio_bw
-
- addi r4, r0, SIO_IOBASEHI /* initialize COM1 address to 0x3F8 */
- addi r5, r0, 0x03
- bl .sio_bw
-
- addi r4, r0, SIO_IOBASELO
- addi r5, r0, 0xF8
- bl .sio_bw
-
- addi r4, r0, SIO_ACTIVATE /* enable COM1 */
- addi r5, r0, SIO_LUNENABLE
- bl .sio_bw
-
-/*
- * Init COM1 for polled output
- */
- lis r8, CFG_ISA_IO@h
- ori r8, r8, 0x03f8
- li r9, 0x00
- stb r9, 1(r8) /* int disabled */
- eieio
- li r9, 0x00
- stb r9, 4(r8) /* modem ctrl */
- eieio
- li r9, 0x80
- stb r9, 3(r8) /* link ctrl, bank select */
- eieio
- li r9, 115200/CONFIG_BAUDRATE
- stb r9, 0(r8) /* baud rate (LSB)*/
- eieio
- rotrwi r9, r9, 8
- stb r9, 1(r8) /* baud rate (MSB) */
- eieio
- li r9, 0x03
- stb r9, 3(r8) /* 8 data bits, 1 stop bit, */
- /* no parity */
- eieio
- li r9, 0x0b
- stb r9, 4(r8) /* enable the receiver and transmitter */
- eieio
-
-waitEmpty:
- lbz r9, 5(r8) /* transmit empty */
- andi. r9, r9, 0x40
- beq waitEmpty
- li r9, 0x47
- stb r9, 3(r8) /* send break, 8 data bits, */
- /* 2 stop bits, no parity */
- eieio
-
- lis r0, 0x0001
- mtctr r0
-
-waitCOM1:
- lwz r0, 5(r8) /* load from port for delay */
- bdnz waitCOM1
-
-waitEmpty1:
- lbz r9, 5(r8) /* transmit empty */
- andi. r9, r9, 0x40
- beq waitEmpty1
- li r9, 0x07
- stb r9, 3(r8) /* 8 data bits, 2 stop bits, */
- /* no parity */
- eieio
-
-/*
- * GPIO (LUN 7)
- */
- addi r4, r0, SIO_LUNINDEX /* select GPIO LUN */
- addi r5, r0, 0x7
- bl .sio_bw
-
- addi r4, r0, SIO_IOBASEHI /* initialize GPIO address to 0x220 */
- addi r5, r0, 0x02
- bl .sio_bw
-
- addi r4, r0, SIO_IOBASELO
- addi r5, r0, 0x20
- bl .sio_bw
-
- addi r4, r0, SIO_ACTIVATE /* enable GPIO */
- addi r5, r0, SIO_LUNENABLE
- bl .sio_bw
-
-.sioInit_done:
-
-/*
- * Get base addr of ISA I/O space
- */
- lis r3, CFG_ISA_IO@h
- ori r3, r3, CFG_ISA_IO@l
-
- addi r3, r3, 0x015C /* adjust to superI/O 87308 base */
- or r6, r3, r3 /* make a copy */
-/*
- * CS0
- */
- addi r4, r0, SIO_PCSCI /* select PCSCIR */
- addi r5, r0, 0x00
- bl .sio_bw
- addi r4, r0, SIO_PCSCD /* select PCSCDR */
- addi r5, r0, 0x00
- bl .sio_bw
- addi r4, r0, SIO_PCSCI /* select PCSCIR */
- addi r5, r0, 0x01
- bl .sio_bw
- addi r4, r0, SIO_PCSCD /* select PCSCDR */
- addi r5, r0, 0x76
- bl .sio_bw
- addi r4, r0, SIO_PCSCI /* select PCSCIR */
- addi r5, r0, 0x02
- bl .sio_bw
- addi r4, r0, SIO_PCSCD /* select PCSCDR */
- addi r5, r0, 0x40
- bl .sio_bw
-/*
- * CS1
- */
- addi r4, r0, SIO_PCSCI /* select PCSCIR */
- addi r5, r0, 0x05
- bl .sio_bw
- addi r4, r0, SIO_PCSCD /* select PCSCDR */
- addi r5, r0, 0x00
- bl .sio_bw
- addi r4, r0, SIO_PCSCI /* select PCSCIR */
- addi r5, r0, 0x05
- bl .sio_bw
- addi r4, r0, SIO_PCSCD /* select PCSCDR */
- addi r5, r0, 0x70
- bl .sio_bw
- addi r4, r0, SIO_PCSCI /* select PCSCIR */
- addi r5, r0, 0x06
- bl .sio_bw
- addi r4, r0, SIO_PCSCD /* select PCSCDR */
- addi r5, r0, 0x1C
- bl .sio_bw
-/*
- * CS2
- */
- addi r4, r0, SIO_PCSCI /* select PCSCIR */
- addi r5, r0, 0x08
- bl .sio_bw
- addi r4, r0, SIO_PCSCD /* select PCSCDR */
- addi r5, r0, 0x00
- bl .sio_bw
- addi r4, r0, SIO_PCSCI /* select PCSCIR */
- addi r5, r0, 0x09
- bl .sio_bw
- addi r4, r0, SIO_PCSCD /* select PCSCDR */
- addi r5, r0, 0x71
- bl .sio_bw
- addi r4, r0, SIO_PCSCI /* select PCSCIR */
- addi r5, r0, 0x0A
- bl .sio_bw
- addi r4, r0, SIO_PCSCD /* select PCSCDR */
- addi r5, r0, 0x1C
- bl .sio_bw
-
- mtspr 8, r7 /* restore link register */
- bclr 20, 0 /* return to caller */
-
-/*
- * this function writes a register to the SIO chip
- */
-.sio_bw:
- stb r4, 0(r3) /* write index register with register offset */
- eieio
- sync
- stb r5, 1(r3) /* 1st write */
- eieio
- sync
- stb r5, 1(r3) /* 2nd write */
- eieio
- sync
- bclr 20, 0 /* return to caller */
-/*
- * this function reads a register from the SIO chip
- */
-.sio_br:
- stb r4, 0(r3) /* write index register with register offset */
- eieio
- sync
- lbz r3, 1(r3) /* retrieve specified reg offset contents */
- eieio
- sync
- bclr 20, 0 /* return to caller */
-
-/*
- * Print a message to COM1 in polling mode
- * r10=COM1 port, r3=(char*)string
- */
-.globl Printf
-Printf:
- lis r10, CFG_ISA_IO@h /* COM1 port */
- ori r10, r10, 0x03f8
-
-WaitChr:
- lbz r0, 5(r10) /* read link status */
- eieio
- andi. r0, r0, 0x40 /* mask transmitter empty bit */
- beq cr0, WaitChr /* wait till empty */
- lbzx r0, r0, r3 /* get char */
- stb r0, 0(r10) /* write to transmit reg */
- eieio
- addi r3, r3, 1 /* next char */
- lbzx r0, r0, r3 /* get char */
- cmpwi cr1, r0, 0 /* end of string ? */
- bne cr1, WaitChr
- blr
-
-/*
- * Print 8/4/2 digits hex value to COM1 in polling mode
- * r10=COM1 port, r3=val
- */
-OutHex2:
- li r9, 4 /* shift reg for 2 digits */
- b OHstart
-OutHex4:
- li r9, 12 /* shift reg for 4 digits */
- b OHstart
- .globl OutHex
-OutHex:
- li r9, 28 /* shift reg for 8 digits */
-OHstart:
- lis r10, CFG_ISA_IO@h /* COM1 port */
- ori r10, r10, 0x03f8
-OutDig:
- lbz r0, 5(r10) /* read link status */
- eieio
- andi. r0, r0, 0x40 /* mask transmitter empty bit */
- beq cr0, OutDig
- sraw r0, r3, r9
- clrlwi r0, r0, 28
- cmpwi cr1, r0, 9
- ble cr1, digIsNum
- addic r0, r0, 55
- b nextDig
-digIsNum:
- addic r0, r0, 48
-nextDig:
- stb r0, 0(r10) /* write to transmit reg */
- eieio
- addic. r9, r9, -4
- bge OutDig
- blr
-/*
- * Print 3 digits hdec value to COM1 in polling mode
- * r10=COM1 port, r3=val, r7=x00, r8=x0, r9=x, r0, r6=scratch
- */
-.globl OutDec
-OutDec:
- li r6, 10
- divwu r0, r3, r6 /* r0 = r3 / 10, r9 = r3 mod 10 */
- mullw r10, r0, r6
- subf r9, r10, r3
-
- mr r3, r0
- divwu r0, r3, r6 /* r0 = r3 / 10, r8 = r3 mod 10 */
- mullw r10, r0, r6
- subf r8, r10, r3
-
- mr r3, r0
- divwu r0, r3, r6 /* r0 = r3 / 10, r7 = r3 mod 10 */
- mullw r10, r0, r6
- subf r7, r10, r3
-
- lis r10, CFG_ISA_IO@h /* COM1 port */
- ori r10, r10, 0x03f8
-
- or. r7, r7, r7
- bne noblank1
- li r3, 0x20
- b OutDec4
-
-noblank1:
- addi r3, r7, 48 /* convert to ASCII */
-
-OutDec4:
- lbz r0, 0(r13) /* slow down dummy read */
- lbz r0, 5(r10) /* read link status */
- eieio
- andi. r0, r0, 0x40 /* mask transmitter empty bit */
- beq cr0, OutDec4
- stb r3, 0(r10) /* x00 to transmit */
- eieio
-
- or. r7, r7, r8
- beq OutDec5
-
- addi r3, r8, 48 /* convert to ASCII */
-OutDec5:
- lbz r0, 0(r13) /* slow down dummy read */
- lbz r0, 5(r10) /* read link status */
- eieio
- andi. r0, r0, 0x40 /* mask transmitter empty bit */
- beq cr0, OutDec5
- stb r3, 0(r10) /* x0 to transmit */
- eieio
-
- addi r3, r9, 48 /* convert to ASCII */
-OutDec6:
- lbz r0, 0(r13) /* slow down dummy read */
- lbz r0, 5(r10) /* read link status */
- eieio
- andi. r0, r0, 0x40 /* mask transmitter empty bit */
- beq cr0, OutDec6
- stb r3, 0(r10) /* x to transmit */
- eieio
- blr
-/*
- * Print a char to COM1 in polling mode
- * r10=COM1 port, r3=char
- */
-.globl OutChr
-OutChr:
- lis r10, CFG_ISA_IO@h /* COM1 port */
- ori r10, r10, 0x03f8
-
-OutChr1:
- lbz r0, 5(r10) /* read link status */
- eieio
- andi. r0, r0, 0x40 /* mask transmitter empty bit */
- beq cr0, OutChr1 /* wait till empty */
- stb r3, 0(r10) /* write to transmit reg */
- eieio
- blr
-/*
- * Input: r3 adr to read
- * Output: r3 val or -1 for error
- */
-spdRead:
- mfspr r26, 8 /* save link register */
-
- lis r30, CFG_ISA_IO@h
- ori r30, r30, 0x220 /* GPIO Port 1 */
- li r7, 0x00
- li r8, 0x100
- and. r5, r3, r8
- beq spdbank0
- li r12, 0x08
- li r4, 0x10
- li r6, 0x18
- b spdRead1
-
-spdbank0:
- li r12, 0x20 /* set I2C data */
- li r4, 0x40 /* set I2C clock */
- li r6, 0x60 /* set I2C clock and data */
-
-spdRead1:
- li r8, 0x80
-
- bl spdStart /* access I2C bus as master */
- li r10, 0xa0 /* write to SPD */
- bl spdWriteByte
- bl spdReadAck /* ACK returns in r10 */
- cmpw cr0, r10, r7
- bne AckErr /* r10 must be 0, if ACK received */
- mr r10, r3 /* adr to read */
- bl spdWriteByte
- bl spdReadAck
- cmpw cr0, r10, r7
- bne AckErr
- bl spdStart
- li r10, 0xa1 /* read from SPD */
- bl spdWriteByte
- bl spdReadAck
- cmpw cr0, r10, r7
- bne AckErr
- bl spdReadByte /* return val in r10 */
- bl spdWriteAck
- bl spdStop /* release I2C bus */
- mr r3, r10
- mtspr 8, r26 /* restore link register */
- blr
-/*
- * ACK error occurred
- */
-AckErr:
- bl spdStop
- orc r3, r0, r0 /* return -1 */
- mtspr 8, r26 /* restore link register */
- blr
-
-/*
- * Routines to read from RAM spd.
- * r30 - GPIO Port1 address in all cases.
- * r4 - clock mask for SPD
- * r6 - port mask for SPD
- * r12 - data mask for SPD
- */
-waitSpd:
- li r0, 0x1000
- mtctr r0
-wSpd:
- bdnz wSpd
- bclr 20, 0 /* return to caller */
-
-/*
- * establish START condition on I2C bus
- */
-spdStart:
- mfspr r27, 8 /* save link register */
- stb r6, 0(r30) /* set SDA and SCL */
- eieio
- stb r6, 1(r30) /* switch GPIO to output */
- eieio
- bl waitSpd
- stb r4, 0(r30) /* reset SDA */
- eieio
- bl waitSpd
- stb r7, 0(r30) /* reset SCL */
- eieio
- bl waitSpd
- mtspr 8, r27
- bclr 20, 0 /* return to caller */
-
-/*
- * establish STOP condition on I2C bus
- */
-spdStop:
- mfspr r27, 8 /* save link register */
- stb r7, 0(r30) /* reset SCL and SDA */
- eieio
- stb r6, 1(r30) /* switch GPIO to output */
- eieio
- bl waitSpd
- stb r4, 0(r30) /* set SCL */
- eieio
- bl waitSpd
- stb r6, 0(r30) /* set SDA and SCL */
- eieio
- bl waitSpd
- stb r7, 1(r30) /* switch GPIO to input */
- eieio
- mtspr 8, r27
- bclr 20, 0 /* return to caller */
-
-spdReadByte:
- mfspr r27, 8
- stb r4, 1(r30) /* set GPIO for SCL output */
- eieio
- li r9, 0x08
- li r10, 0x00
-loopRB:
- stb r7, 0(r30) /* reset SDA and SCL */
- eieio
- bl waitSpd
- stb r4, 0(r30) /* set SCL */
- eieio
- bl waitSpd
- lbz r5, 0(r30) /* read from GPIO Port1 */
- rlwinm r10, r10, 1, 0, 31
- and. r5, r5, r12
- beq clearBit
- ori r10, r10, 0x01 /* append _1_ */
-clearBit:
- stb r7, 0(r30) /* reset SCL */
- eieio
- bl waitSpd
- addic. r9, r9, -1
- bne loopRB
- mtspr 8, r27
- bclr 20, 0 /* return (r10) to caller */
-
-/*
- * spdWriteByte writes bits 24 - 31 of r10 to I2C.
- * r8 contains bit mask 0x80
- */
-spdWriteByte:
- mfspr r27, 8 /* save link register */
- li r9, 0x08 /* write octet */
- and. r5, r10, r8
- bne sWB1
- stb r7, 0(r30) /* set SDA to _0_ */
- eieio
- b sWB2
-sWB1:
- stb r12, 0(r30) /* set SDA to _1_ */
- eieio
-sWB2:
- stb r6, 1(r30) /* set GPIO to output */
- eieio
-loopWB:
- and. r5, r10, r8
- bne sWB3
- stb r7, 0(r30) /* set SDA to _0_ */
- eieio
- b sWB4
-sWB3:
- stb r12, 0(r30) /* set SDA to _1_ */
- eieio
-sWB4:
- bl waitSpd
- and. r5, r10, r8
- bne sWB5
- stb r4, 0(r30) /* set SDA to _0_ and SCL */
- eieio
- b sWB6
-sWB5:
- stb r6, 0(r30) /* set SDA to _1_ and SCL */
- eieio
-sWB6:
- bl waitSpd
- and. r5, r10, r8
- bne sWB7
- stb r7, 0(r30) /* set SDA to _0_ and reset SCL */
- eieio
- b sWB8
-sWB7:
- stb r12, 0(r30) /* set SDA to _1_ and reset SCL */
- eieio
-sWB8:
- bl waitSpd
- rlwinm r10, r10, 1, 0, 31 /* next bit */
- addic. r9, r9, -1
- bne loopWB
- mtspr 8, r27
- bclr 20, 0 /* return to caller */
-
-/*
- * Read ACK from SPD, return value in r10
- */
-spdReadAck:
- mfspr r27, 8 /* save link register */
- stb r4, 1(r30) /* set GPIO to output */
- eieio
- stb r7, 0(r30) /* reset SDA and SCL */
- eieio
- bl waitSpd
- stb r4, 0(r30) /* set SCL */
- eieio
- bl waitSpd
- lbz r10, 0(r30) /* read GPIO Port 1 and mask SDA */
- and r10, r10, r12
- bl waitSpd
- stb r7, 0(r30) /* reset SDA and SCL */
- eieio
- bl waitSpd
- mtspr 8, r27
- bclr 20, 0 /* return (r10) to caller */
-
-spdWriteAck:
- mfspr r27, 8
- stb r12, 0(r30) /* set SCL */
- eieio
- stb r6, 1(r30) /* set GPIO to output */
- eieio
- bl waitSpd
- stb r6, 0(r30) /* SDA and SCL */
- eieio
- bl waitSpd
- stb r12, 0(r30) /* reset SCL */
- eieio
- bl waitSpd
- mtspr 8, r27
- bclr 20, 0 /* return to caller */
-
-get_lnk_reg:
- mflr r3 /* return link reg */
- blr
-
-/*
- * Messages for console output
- */
-.globl MessageBlock
-MessageBlock:
-Mok:
- .ascii "OK\015\012\000"
-Mfail:
- .ascii "FAILED\015\012\000"
-Mna:
- .ascii "NA\015\012\000"
-MinitLogo:
- .ascii "\015\012*** ELTEC Elektronik, Mainz ***\015\012"
- .ascii "\015\012Initialising RAM\015\012\000"
-Mspd01:
- .ascii " Reading SPD of bank0/1 ..... \000"
-Mspd23:
- .ascii " Reading SPD of bank2/3 ..... \000"
-MfpmRam:
- .ascii " RAM-Type: FPM \015\012\000"
-MedoRam:
- .ascii " RAM-Type: EDO \015\012\000"
-MsdRam:
- .ascii " RAM-Type: SDRAM \015\012\000"
-Mactivate:
- .ascii " Activating \000"
-Mmbyte:
- .ascii " MB .......... \000"
- .align 4
diff --git a/board/eltec/bab7xx/bab7xx.c b/board/eltec/bab7xx/bab7xx.c
deleted file mode 100644
index fc48ed547e..0000000000
--- a/board/eltec/bab7xx/bab7xx.c
+++ /dev/null
@@ -1,246 +0,0 @@
-/*
- * (C) Copyright 2001 Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Andreas Heppel <aheppel@sysgo.de>
- * (C) Copyright 2001 ELTEC Elektronik AG
- * Frank Gottschling <fgottschling@eltec.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <command.h>
-#include <mpc106.h>
-#include <mk48t59.h>
-#include <74xx_7xx.h>
-#include <ns87308.h>
-#include <video_fb.h>
-
-/*---------------------------------------------------------------------------*/
-/*
- * Get Bus clock frequency
- */
-ulong bab7xx_get_bus_freq (void)
-{
- /*
- * The GPIO Port 1 on BAB7xx reflects the bus speed.
- */
- volatile struct GPIO *gpio =
- (struct GPIO *) (CFG_ISA_IO + CFG_NS87308_GPIO_BASE);
-
- unsigned char data = gpio->dta1;
-
- if (data & 0x02)
- return 66666666;
-
- return 83333333;
-}
-
-/*---------------------------------------------------------------------------*/
-
-/*
- * Measure CPU clock speed (core clock GCLK1) (Approx. GCLK frequency in Hz)
- */
-ulong bab7xx_get_gclk_freq (void)
-{
- static const int pllratio_to_factor[] = {
- 00, 75, 70, 00, 20, 65, 100, 45, 30, 55, 40, 50, 80, 60, 35,
- 00,
- };
-
- return pllratio_to_factor[get_hid1 () >> 28] *
- (bab7xx_get_bus_freq () / 10);
-}
-
-/*----------------------------------------------------------------------------*/
-
-int checkcpu (void)
-{
- uint pvr = get_pvr ();
-
- printf ("MPC7xx V%d.%d", (pvr >> 8) & 0xFF, pvr & 0xFF);
- printf (" at %ld / %ld MHz\n", bab7xx_get_gclk_freq () / 1000000,
- bab7xx_get_bus_freq () / 1000000);
-
- return (0);
-}
-
-/* ------------------------------------------------------------------------- */
-
-int checkboard (void)
-{
-#ifdef CFG_ADDRESS_MAP_A
- puts ("Board: ELTEC BAB7xx PReP\n");
-#else
- puts ("Board: ELTEC BAB7xx CHRP\n");
-#endif
- return (0);
-}
-
-/* ------------------------------------------------------------------------- */
-
-int checkflash (void)
-{
- /* TODO: XXX XXX XXX */
- printf ("2 MB ## Test not implemented yet ##\n");
- return (0);
-}
-
-/* ------------------------------------------------------------------------- */
-
-
-static unsigned int mpc106_read_cfg_dword (unsigned int reg)
-{
- unsigned int reg_addr = MPC106_REG | (reg & 0xFFFFFFFC);
-
- out32r (MPC106_REG_ADDR, reg_addr);
-
- return (in32r (MPC106_REG_DATA | (reg & 0x3)));
-}
-
-/* ------------------------------------------------------------------------- */
-
-long int dram_size (int board_type)
-{
- /* No actual initialisation to do - done when setting up
- * PICRs MCCRs ME/SARs etc in ram_init.S.
- */
-
- register unsigned long i, msar1, mear1, memSize;
-
-#if defined(CFG_MEMTEST)
- register unsigned long reg;
-
- printf ("Testing DRAM\n");
-
- /* write each mem addr with it's address */
- for (reg = CFG_MEMTEST_START; reg < CFG_MEMTEST_END; reg += 4)
- *reg = reg;
-
- for (reg = CFG_MEMTEST_START; reg < CFG_MEMTEST_END; reg += 4) {
- if (*reg != reg)
- return -1;
- }
-#endif
-
- /*
- * Since MPC106 memory controller chip has already been set to
- * control all memory, just read and interpret its memory boundery register.
- */
- memSize = 0;
- msar1 = mpc106_read_cfg_dword (MPC106_MSAR1);
- mear1 = mpc106_read_cfg_dword (MPC106_MEAR1);
- i = mpc106_read_cfg_dword (MPC106_MBER) & 0xf;
-
- do {
- if (i & 0x01) /* is bank enabled ? */
- memSize += (mear1 & 0xff) - (msar1 & 0xff) + 1;
- msar1 >>= 8;
- mear1 >>= 8;
- i >>= 1;
- } while (i);
-
- return (memSize * 0x100000);
-}
-
-/* ------------------------------------------------------------------------- */
-
-long int initdram (int board_type)
-{
- return dram_size (board_type);
-}
-
-/* ------------------------------------------------------------------------- */
-
-void after_reloc (ulong dest_addr)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- /*
- * Jump to the main U-Boot board init code
- */
- board_init_r ((gd_t *) gd, dest_addr);
-}
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * do_reset is done here because in this case it is board specific, since the
- * 7xx CPUs can only be reset by external HW (the RTC in this case).
- */
-void do_reset (cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[])
-{
-#if defined(CONFIG_RTC_MK48T59)
- /* trigger watchdog immediately */
- rtc_set_watchdog (1, RTC_WD_RB_16TH);
-#else
-#error "You must define the macro CONFIG_RTC_MK48T59."
-#endif
-}
-
-/* ------------------------------------------------------------------------- */
-
-#if defined(CONFIG_WATCHDOG)
-/*
- * Since the 7xx CPUs don't have an internal watchdog, this function is
- * board specific. We use the RTC here.
- */
-void watchdog_reset (void)
-{
-#if defined(CONFIG_RTC_MK48T59)
- /* we use a 32 sec watchdog timer */
- rtc_set_watchdog (8, RTC_WD_RB_4);
-#else
-#error "You must define the macro CONFIG_RTC_MK48T59."
-#endif
-}
-#endif /* CONFIG_WATCHDOG */
-
-/* ------------------------------------------------------------------------- */
-
-#ifdef CONFIG_CONSOLE_EXTRA_INFO
-extern GraphicDevice smi;
-
-void video_get_info_str (int line_number, char *info)
-{
- /* init video info strings for graphic console */
- switch (line_number) {
- case 1:
- sprintf (info, " MPC7xx V%d.%d at %ld / %ld MHz",
- (get_pvr () >> 8) & 0xFF,
- get_pvr () & 0xFF,
- bab7xx_get_gclk_freq () / 1000000,
- bab7xx_get_bus_freq () / 1000000);
- return;
- case 2:
- sprintf (info,
- " ELTEC BAB7xx with %ld MB DRAM and %ld MB FLASH",
- dram_size (0) / 0x100000, flash_init () / 0x100000);
- return;
- case 3:
- sprintf (info, " %s", smi.modeIdent);
- return;
- }
-
- /* no more info lines */
- *info = 0;
- return;
-}
-#endif
-
-/*---------------------------------------------------------------------------*/
diff --git a/board/eltec/bab7xx/config.mk b/board/eltec/bab7xx/config.mk
deleted file mode 100644
index aa463c5dc1..0000000000
--- a/board/eltec/bab7xx/config.mk
+++ /dev/null
@@ -1,26 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-TEXT_BASE = 0xFFF00000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE)
diff --git a/board/eltec/bab7xx/dc_srom.c b/board/eltec/bab7xx/dc_srom.c
deleted file mode 100644
index a44af6e0d0..0000000000
--- a/board/eltec/bab7xx/dc_srom.c
+++ /dev/null
@@ -1,291 +0,0 @@
-/*
- * (C) Copyright 2002 ELTEC Elektronik AG
- * Frank Gottschling <fgottschling@eltec.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * SRom I/O routines.
- */
-
-#include <common.h>
-#include <pci.h>
-#include "srom.h"
-
-#define SROM_RD 0x00004000 /* Read from Boot ROM */
-#define SROM_WR 0x00002000 /* Write to Boot ROM */
-#define SROM_SR 0x00000800 /* Select Serial ROM when set */
-
-#define DT_IN 0x00000004 /* Serial Data In */
-#define DT_CLK 0x00000002 /* Serial ROM Clock */
-#define DT_CS 0x00000001 /* Serial ROM Chip Select */
-
-static u_int dc_srom_iobase;
-
-/*----------------------------------------------------------------------------*/
-
-static int inl(u_long addr)
-{
- return le32_to_cpu(*(volatile u_long *)(addr));
-}
-
-/*----------------------------------------------------------------------------*/
-
-static void outl (int command, u_long addr)
-{
- *(volatile u_long *)(addr) = cpu_to_le32(command);
-}
-
-/*----------------------------------------------------------------------------*/
-
-static void sendto_srom(u_int command, u_long addr)
-{
- outl(command, addr);
- udelay(1);
-
- return;
-}
-
-/*----------------------------------------------------------------------------*/
-
-static int getfrom_srom(u_long addr)
-{
- s32 tmp;
-
- tmp = inl(addr);
- udelay(1);
-
- return tmp;
-}
-
-/*----------------------------------------------------------------------------*/
-
-static void srom_latch (u_int command, u_long addr)
-{
- sendto_srom (command, addr);
- sendto_srom (command | DT_CLK, addr);
- sendto_srom (command, addr);
-
- return;
-}
-
-/*----------------------------------------------------------------------------*/
-
-static void srom_command_rd (u_int command, u_long addr)
-{
- srom_latch (command, addr);
- srom_latch (command, addr);
- srom_latch ((command & 0x0000ff00) | DT_CS, addr);
-
- return;
-}
-
-/*----------------------------------------------------------------------------*/
-
-static void srom_command_wr (u_int command, u_long addr)
-{
- srom_latch (command, addr);
- srom_latch ((command & 0x0000ff00) | DT_CS, addr);
- srom_latch (command, addr);
-
- return;
-}
-
-/*----------------------------------------------------------------------------*/
-
-static void srom_address(u_int command, u_long addr, u_char offset)
-{
- int i;
- signed char a;
-
- a = (char)(offset << 2);
- for (i=0; i<6; i++, a <<= 1)
- {
- srom_latch(command | ((a < 0) ? DT_IN : 0), addr);
- }
- udelay(1);
-
- i = (getfrom_srom(addr) >> 3) & 0x01;
-
- return;
-}
-/*----------------------------------------------------------------------------*/
-
-static short srom_data_rd (u_int command, u_long addr)
-{
- int i;
- short word = 0;
- s32 tmp;
-
- for (i=0; i<16; i++)
- {
- sendto_srom(command | DT_CLK, addr);
- tmp = getfrom_srom(addr);
- sendto_srom(command, addr);
-
- word = (word << 1) | ((tmp >> 3) & 0x01);
- }
-
- sendto_srom(command & 0x0000ff00, addr);
-
- return word;
-}
-
-/*----------------------------------------------------------------------------*/
-
-static int srom_data_wr (u_int command, u_long addr, short val)
-{
- int i;
- u_long longVal;
- s32 tmp;
-
- longVal = (u_long)(le16_to_cpu(val));
-
- for (i=0; i<16; i++)
- {
- tmp = (longVal & 0x8000)>>13;
-
- sendto_srom (tmp | command, addr);
- sendto_srom (tmp | command | DT_CLK, addr);
- sendto_srom (tmp | command, addr);
-
- longVal = longVal<<1;
- }
-
- sendto_srom(command & 0x0000ff00, addr);
- sendto_srom(command, addr);
-
- tmp = 100;
- do
- {
- if ((getfrom_srom(dc_srom_iobase) & 0x8) == 0x8)
- break;
- udelay(1000);
- } while (--tmp);
-
- if (tmp == 0)
- {
- printf("Write DEC21143 SRom timed out !\n");
- return (-1);
- }
-
- return 0;
-}
-
-
-/*----------------------------------------------------------------------------*/
-static short srom_rd (u_long addr, u_char offset)
-{
- sendto_srom (SROM_RD | SROM_SR, addr);
- srom_latch (SROM_RD | SROM_SR | DT_CS, addr);
-
- srom_command_rd (SROM_RD | SROM_SR | DT_IN | DT_CS, addr);
-
- srom_address (SROM_RD | SROM_SR | DT_CS, addr, offset);
-
- return srom_data_rd (SROM_RD | SROM_SR | DT_CS, addr);
-}
-
-/*----------------------------------------------------------------------------*/
-
-static void srom_wr_enable (u_long addr)
-{
- int i;
-
- sendto_srom (SROM_WR | SROM_SR, addr);
- srom_latch (SROM_WR | SROM_SR | DT_CS, addr);
-
- srom_latch (SROM_WR | SROM_SR | DT_IN | DT_CS, addr);
- srom_latch (SROM_WR | SROM_SR | DT_CS, addr);
- srom_latch (SROM_WR | SROM_SR | DT_CS, addr);
-
- for (i=0; i<6; i++)
- {
- srom_latch (SROM_WR | SROM_SR | DT_IN | DT_CS, addr);
- }
-}
-
-/*----------------------------------------------------------------------------*/
-
-static int srom_wr (u_long addr, u_char offset, short val)
-{
- srom_wr_enable (addr);
-
- sendto_srom (SROM_WR | SROM_SR, addr);
- srom_latch (SROM_WR | SROM_SR | DT_CS, addr);
-
- srom_command_wr (SROM_WR | SROM_SR | DT_IN | DT_CS, addr);
-
- srom_address (SROM_WR | SROM_SR | DT_CS, addr, offset);
-
- return srom_data_wr (SROM_WR | SROM_SR | DT_CS, addr, val);
-}
-
-/*----------------------------------------------------------------------------*/
-/*
- * load data from the srom
- */
-int dc_srom_load (u_short *dest)
-{
- int offset;
- short tmp;
-
- /* get srom iobase from local network controller */
- pci_read_config_dword(PCI_BDF(0,14,0), PCI_BASE_ADDRESS_1, &dc_srom_iobase);
- dc_srom_iobase &= PCI_BASE_ADDRESS_MEM_MASK;
- dc_srom_iobase = pci_mem_to_phys(PCI_BDF(0,14,0), dc_srom_iobase);
- dc_srom_iobase += 0x48; /* io offset for srom access */
-
- memset (dest, 0, 128);
- for (offset=0; offset<64; offset++)
- {
- tmp = srom_rd (dc_srom_iobase, offset);
- *dest++ = le16_to_cpu(tmp);
- }
-
- return (0);
-}
-
-/*----------------------------------------------------------------------------*/
-
-/*
- * store data into the srom
- */
-int dc_srom_store (u_short *src)
-{
- int offset;
-
- /* get srom iobase from local network controller */
- pci_read_config_dword(PCI_BDF(0,14,0), PCI_BASE_ADDRESS_1, &dc_srom_iobase);
- dc_srom_iobase &= PCI_BASE_ADDRESS_MEM_MASK;
- dc_srom_iobase = pci_mem_to_phys(PCI_BDF(0,14,0), dc_srom_iobase);
- dc_srom_iobase += 0x48; /* io offset for srom access */
-
- for (offset=0; offset<64; offset++)
- {
- if (srom_wr (dc_srom_iobase, offset, *src) == -1)
- return (-1);
- src++;
- }
-
- return (0);
-}
-
-/*----------------------------------------------------------------------------*/
diff --git a/board/eltec/bab7xx/el_srom.c b/board/eltec/bab7xx/el_srom.c
deleted file mode 100644
index 73f8066e0d..0000000000
--- a/board/eltec/bab7xx/el_srom.c
+++ /dev/null
@@ -1,292 +0,0 @@
-/*
- * (C) Copyright 2002 ELTEC Elektronik AG
- * Frank Gottschling <fgottschling@eltec.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include "srom.h"
-
-/*----------------------------------------------------------------------------*/
-/*
- * START sequence
- * _ _________
- * SCLK _> \____
- * _ ____
- * SDIO _> \_________
- * : : :
- */
-static void eepStart (void)
-{
- out8(I2C_BUS_DAT, 0x60); /* SCLK = high SDIO = high */
- out8(I2C_BUS_DIR, 0x60); /* set output direction for SCLK/SDIO */
- udelay(10);
- out8(I2C_BUS_DAT, 0x40); /* SCLK = high SDIO = low */
- udelay(10);
- out8(I2C_BUS_DAT, 0x00); /* SCLK = low SDIO = low */
- udelay(10);
-}
-
-/*----------------------------------------------------------------------------*/
-/*
- * STOP sequence
- * _______
- * SCLK _____/
- * _ ___
- * SDIO _>_______/
- * : : :
- */
-static void eepStop (void)
-{
- out8(I2C_BUS_DAT, 0x00); /* SCLK = low SDIO = low */
- out8(I2C_BUS_DIR, 0x60); /* set output direction for SCLK/SDIO */
- udelay(10);
- out8(I2C_BUS_DAT, 0x40); /* SCLK = high SDIO = low */
- udelay(10);
- out8(I2C_BUS_DAT, 0x60); /* SCLK = high SDIO = high */
- udelay(10);
- out8(I2C_BUS_DIR, 0x00); /* reset to input direction */
-}
-
-/*----------------------------------------------------------------------------*/
-/*
- * Read one byte from EEPROM
- * ___ ___ ___ ___ ___ ___ ___ ___
- * SCLK ___/ \___/ \___/ \___/ \___/ \___/ \___/ \___/ \
- * _________________________________________________________________
- * SDIO > ^ ^ ^ ^ ^ ^ ^ ^
- * : : : : : : : : : : : : : : : : :
- */
-static unsigned char eepReadByte (void)
-{
- register unsigned char buf = 0x00;
- register int i;
-
- out8(I2C_BUS_DIR, 0x40);
-
- for (i = 0; i < 8; i++)
- {
- out8(I2C_BUS_DAT, 0x00); /* SCLK = low SDIO = high */
- udelay(10);
- out8(I2C_BUS_DAT, 0x40); /* SCLK = high SDIO = high */
- udelay(15);
- buf <<= 1;
- buf = (in8(I2C_BUS_DAT) & 0x20) ? (buf | 0x01) : (buf & 0xFE);
- out8(I2C_BUS_DAT, 0x00); /* SCLK = low SDIO = high */
- udelay(10);
- }
- return(buf);
-}
-
-/*----------------------------------------------------------------------------*/
-/*
- * Write one byte to EEPROM
- * ___ ___ ___ ___ ___ ___ ___ ___
- * SCLK __/ \___/ \___/ \___/ \___/ \___/ \___/ \___/ \__
- * _______ _______ _______ _______ _______ _______ _______ ________
- * SDIO X_______X_______X_______X_______X_______X_______X_______X________
- * : 7 : 6 : 5 : 4 : 3 : 2 : 1 : 0
- */
-static void eepWriteByte (register unsigned char buf)
-{
- register int i;
-
- (buf & 0x80) ? out8(I2C_BUS_DAT, 0x20) : out8(I2C_BUS_DAT, 0x00); /* SCLK = low SDIO = data */
- out8(I2C_BUS_DIR, 0x60);
-
- for (i = 7; i >= 0; i--)
- {
- (buf & 0x80) ? out8(I2C_BUS_DAT, 0x20) : out8(I2C_BUS_DAT, 0x00); /* SCLK=low SDIO=data */
- udelay(10);
- (buf & 0x80) ? out8(I2C_BUS_DAT, 0x60) : out8(I2C_BUS_DAT, 0x40); /* SCLK=high SDIO=data */
- udelay(15);
- (buf & 0x80) ? out8(I2C_BUS_DAT, 0x20) : out8(I2C_BUS_DAT, 0x00); /* SCLK=low SDIO=data */
- udelay(10);
- buf <<= 1;
- }
-}
-
-/*----------------------------------------------------------------------------*/
-/*
- * Read data acknowledge of EEPROM
- * _______
- * SCLK ____/ \___
- * _______________
- * SDIO >
- * : : ^ :
- */
-static int eepReadAck (void)
-{
- int retval;
-
- out8(I2C_BUS_DIR, 0x40);
- out8(I2C_BUS_DAT, 0x00); /* SCLK = low SDIO = high */
- udelay(10);
- out8(I2C_BUS_DAT, 0x40); /* SCLK = high SDIO = high */
- udelay(10);
- retval = (in8(I2C_BUS_DAT) & 0x20) ? ERROR : 0;
- udelay(10);
- out8(I2C_BUS_DAT, 0x00); /* SCLK = low SDIO = high */
- udelay(10);
-
- return(retval);
-}
-
-/*----------------------------------------------------------------------------*/
-/*
- * Write data acknowledge to EEPROM
- * _______
- * SCLK ____/ \___
- *
- * SDIO >_______________
- * : : :
- */
-static void eepWriteAck (unsigned char ack)
-{
- ack ? out8(I2C_BUS_DAT, 0x20) : out8(I2C_BUS_DAT, 0x00); /* SCLK = low SDIO = ack */
- out8(I2C_BUS_DIR, 0x60);
- udelay(10);
- ack ? out8(I2C_BUS_DAT, 0x60) : out8(I2C_BUS_DAT, 0x40); /* SCLK = high SDIO = ack */
- udelay(15);
- ack ? out8(I2C_BUS_DAT, 0x20) : out8(I2C_BUS_DAT, 0x00); /* SCLK = low SDIO = ack */
- udelay(10);
-}
-
-/*----------------------------------------------------------------------------*/
-/*
- * Read bytes from EEPROM
- */
-int el_srom_load (addr, buf, cnt, device, block)
-unsigned char addr;
-unsigned char *buf;
-int cnt;
-unsigned char device;
-unsigned char block;
-{
- register int i;
-
- for (i=0;i<cnt;i++)
- {
- eepStart();
- eepWriteByte(0xA0 | device | block);
- if (eepReadAck() == ERROR)
- {
- eepStop();
- return(ERROR);
- }
- eepWriteByte(addr++);
- if (eepReadAck() == ERROR)
- {
- eepStop();
- return(ERROR);
- }
- eepStart();
-
- eepWriteByte(0xA1 | device | block);
- if (eepReadAck() == ERROR)
- {
- eepStop();
- return(ERROR);
- }
-
- *buf++ = eepReadByte();
- eepWriteAck(1);
- eepStop();
-
- if ((addr == 0) && (i != (cnt-1))) /* is it the same block ? */
- {
- if (block == FIRST_BLOCK)
- block = SECOND_BLOCK;
- else
- return(ERROR);
- }
- }
- return(cnt);
-}
-
-/*----------------------------------------------------------------------------*/
-/*
- *
- * Write bytes to EEPROM
- *
- */
-int el_srom_store (addr, buf, cnt, device, block)
-unsigned char addr, *buf, device, block;
-int cnt;
-{
- register int i, retVal;
-
- for (i=0;i<cnt;i++)
- {
- retVal = ERROR;
- do
- {
- eepStart();
- eepWriteByte(0xA0 | device | block);
- if ((retVal = eepReadAck()) == ERROR)
- eepStop();
- } while (retVal == ERROR);
-
- eepWriteByte(addr++);
- if (eepReadAck() == ERROR) return(ERROR);
-
- if ((addr == 0) && (i != (cnt-1))) /* is it the same block ? */
- {
- if (block == FIRST_BLOCK)
- block = SECOND_BLOCK;
- else
- return(ERROR);
- }
-
- eepWriteByte(*buf++);
- if (eepReadAck() == ERROR)
- return(ERROR);
-
- eepStop();
- }
- return(cnt);
-}
-
-/*----------------------------------------------------------------------------*/
-/*
- * calculate checksum for ELTEC revision srom
- */
-unsigned long el_srom_checksum (ptr, size)
-register unsigned char *ptr;
-unsigned long size;
-{
- u_long f, accu = 0;
- u_int i;
- u_char byte;
-
- for (; size; size--)
- {
- byte = *ptr++;
- for (i = 8; i; i--)
- {
- f = ((byte & 1) ^ (accu & 1)) ? 0x84083001 : 0;
- accu >>= 1; accu ^= f;
- byte >>= 1;
- }
- }
- return(accu);
-}
-
-/*----------------------------------------------------------------------------*/
diff --git a/board/eltec/bab7xx/flash.c b/board/eltec/bab7xx/flash.c
deleted file mode 100644
index 442dd00519..0000000000
--- a/board/eltec/bab7xx/flash.c
+++ /dev/null
@@ -1,512 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * 07-10-2002 Frank Gottschling: added 29F032 flash (ELPPC).
- * fixed monitor protection part
- *
- * 09-18-2001 Andreas Heppel: Reduced the code in here to the usage
- * of AMD's 29F040 and 29F016 flashes, since the BAB7xx does use
- * any other.
- */
-
-#include <common.h>
-#include <asm/processor.h>
-#include <asm/pci_io.h>
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-ulong flash_get_size (vu_long *addr, flash_info_t *info);
-static int write_word (flash_info_t *info, ulong dest, ulong data);
-
-/*flash command address offsets*/
-
-#define ADDR0 (0x555)
-#define ADDR1 (0x2AA)
-#define ADDR3 (0x001)
-
-#define FLASH_WORD_SIZE unsigned char
-
-/*----------------------------------------------------------------------------*/
-
-unsigned long flash_init (void)
-{
- unsigned long size1, size2;
- int i;
-
- /* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i)
- {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* initialise 1st flash */
- size1 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN)
- {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size1, size1<<20);
- }
-
- /* initialise 2nd flash */
- size2 = flash_get_size((vu_long *)FLASH_BASE1_PRELIM, &flash_info[1]);
-
- if (flash_info[1].flash_id == FLASH_UNKNOWN)
- {
- printf ("## Unknown FLASH on Bank 1 - Size = 0x%08lx = %ld MB\n",
- size2, size2<<20);
- }
-
- /* monitor protection ON by default */
- if (size1 == 512*1024)
- {
- (void)flash_protect(FLAG_PROTECT_SET,
- FLASH_BASE0_PRELIM,
- FLASH_BASE0_PRELIM+monitor_flash_len-1,
- &flash_info[0]);
- }
- if (size2 == 512*1024)
- {
- (void)flash_protect(FLAG_PROTECT_SET,
- FLASH_BASE1_PRELIM,
- FLASH_BASE1_PRELIM+monitor_flash_len-1,
- &flash_info[1]);
- }
- if (size2 == 4*1024*1024)
- {
- (void)flash_protect(FLAG_PROTECT_SET,
- CFG_FLASH_BASE,
- CFG_FLASH_BASE+monitor_flash_len-1,
- &flash_info[1]);
- }
-
- return (size1 + size2);
-}
-
-/*----------------------------------------------------------------------------*/
-
-void flash_print_info (flash_info_t *info)
-{
- int i;
- int k;
- int size;
- int erased;
- volatile unsigned long *flash;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- flash_init();
- }
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD:
- printf ("AMD ");
- break;
- default:
- printf ("Unknown Vendor ");
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case AMD_ID_F040B:
- printf ("AM29F040B (4 Mbit)\n");
- break;
- case AMD_ID_F016D:
- printf ("AM29F016D (16 Mbit)\n");
- break;
- case AMD_ID_F032B:
- printf ("AM29F032B (32 Mbit)\n");
- break;
- default:
- printf ("Unknown Chip Type\n");
- break;
- }
-
- if (info->size >= (1 << 20)) {
- printf (" Size: %ld MB in %d Sectors\n", info->size >> 20, info->sector_count);
- } else {
- printf (" Size: %ld kB in %d Sectors\n", info->size >> 10, info->sector_count);
- }
-
- printf (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
- /*
- * Check if whole sector is erased
- */
- if (i != (info->sector_count-1))
- size = info->start[i+1] - info->start[i];
- else
- size = info->start[0] + info->size - info->start[i];
-
- erased = 1;
- flash = (volatile unsigned long *)info->start[i];
- size = size >> 2; /* divide by 4 for longword access */
- for (k=0; k<size; k++) {
- if (*flash++ != 0xffffffff) {
- erased = 0;
- break;
- }
- }
-
- if ((i % 5) == 0)
- printf ("\n ");
-
- printf (" %08lX%s%s",
- info->start[i],
- erased ? " E" : " ",
- info->protect[i] ? "RO " : " ");
- }
- printf ("\n");
-}
-
-/*----------------------------------------------------------------------------*/
-/*
- * The following code cannot be run from FLASH!
- */
-ulong flash_get_size (vu_long *addr, flash_info_t *info)
-{
- short i;
- ulong vendor, devid;
- ulong base = (ulong)addr;
- volatile unsigned char *caddr = (unsigned char *)addr;
-
-#ifdef DEBUG
- printf("flash_get_size for address 0x%lx: \n", (unsigned long)caddr);
-#endif
-
- /* Write auto select command: read Manufacturer ID */
- caddr[0] = 0xF0; /* reset bank */
- udelay(10);
-
- eieio();
- caddr[0x555] = 0xAA;
- udelay(10);
- caddr[0x2AA] = 0x55;
- udelay(10);
- caddr[0x555] = 0x90;
-
- udelay(10);
-
- vendor = caddr[0];
- devid = caddr[1];
-
-#ifdef DEBUG
- printf("Manufacturer: 0x%lx\n", vendor);
-#endif
-
- vendor &= 0xff;
- devid &= 0xff;
-
- /* We accept only two AMD types */
- switch (vendor) {
- case (FLASH_WORD_SIZE)AMD_MANUFACT:
- info->flash_id = FLASH_MAN_AMD;
- break;
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- return (0); /* no or unknown flash */
- }
-
- switch (devid) {
- case (FLASH_WORD_SIZE)AMD_ID_F040B:
- info->flash_id |= AMD_ID_F040B;
- info->sector_count = 8;
- info->size = 0x00080000;
- break; /* => 0.5 MB */
-
- case (FLASH_WORD_SIZE)AMD_ID_F016D:
- info->flash_id |= AMD_ID_F016D;
- info->sector_count = 32;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case (FLASH_WORD_SIZE)AMD_ID_F032B:
- info->flash_id |= AMD_ID_F032B;
- info->sector_count = 64;
- info->size = 0x00400000;
- break; /* => 4 MB */
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- return (0); /* => no or unknown flash */
-
- }
-
-#ifdef DEBUG
- printf("flash id 0x%lx; sector count 0x%x, size 0x%lx\n", info->flash_id, info->sector_count, info->size);
-#endif
-
- /* check for protected sectors */
- for (i = 0; i < info->sector_count; i++) {
- /* sector base address */
- info->start[i] = base + i * (info->size / info->sector_count);
- /* read sector protection at sector address, (A7 .. A0) = 0x02 */
- /* D0 = 1 if protected */
- caddr = (volatile unsigned char *)(info->start[i]);
- info->protect[i] = caddr[2] & 1;
- }
-
- /*
- * Prevent writes to uninitialized FLASH.
- */
- if (info->flash_id != FLASH_UNKNOWN) {
- caddr = (volatile unsigned char *)info->start[0];
- caddr[0] = 0xF0; /* reset bank */
- }
-
- return (info->size);
-}
-
-/*----------------------------------------------------------------------------*/
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[0]);
- int flag, prot, sect, l_sect;
- ulong start, now, last;
- int rc = 0;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- if ((info->flash_id == FLASH_UNKNOWN) ||
- (info->flash_id > FLASH_AMD_COMP)) {
- printf ("Can't erase unknown flash type - aborted\n");
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- l_sect = -1;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
- addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
- addr[ADDR0] = (FLASH_WORD_SIZE)0x00800080;
- addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
- addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr = (FLASH_WORD_SIZE *)(info->start[sect]);
- if (info->flash_id & FLASH_MAN_SST) {
- addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
- addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
- addr[ADDR0] = (FLASH_WORD_SIZE)0x00800080;
- addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
- addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
- addr[0] = (FLASH_WORD_SIZE)0x00500050; /* block erase */
- udelay(30000); /* wait 30 ms */
- }
- else
- addr[0] = (FLASH_WORD_SIZE)0x00300030; /* sector erase */
- l_sect = sect;
- }
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- /*
- * We wait for the last triggered sector
- */
- if (l_sect < 0)
- goto DONE;
-
- start = get_timer (0);
- last = start;
- addr = (FLASH_WORD_SIZE *)(info->start[l_sect]);
- while ((addr[0] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080) {
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- return 1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- serial_putc ('.');
- last = now;
- }
- }
-
-DONE:
- /* reset to read mode */
- addr = (FLASH_WORD_SIZE *)info->start[0];
- addr[0] = (FLASH_WORD_SIZE)0x00F000F0; /* reset bank */
-
- printf (" done\n");
- return rc;
-}
-
-/*----------------------------------------------------------------------------*/
-/*
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int i, l, rc;
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
- for (; i<4 && cnt>0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = 0;
- for (i=0; i<4; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- return (write_word(info, wp, data));
-}
-
-/*----------------------------------------------------------------------------*/
-/* Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word (flash_info_t *info, ulong dest, ulong data)
-{
- volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *)(info->start[0]);
- volatile FLASH_WORD_SIZE *dest2 = (FLASH_WORD_SIZE *)dest;
- volatile FLASH_WORD_SIZE *data2 = (FLASH_WORD_SIZE *)&data;
- ulong start;
- int flag;
- int i;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*((volatile FLASH_WORD_SIZE *)dest) &
- (FLASH_WORD_SIZE)data) != (FLASH_WORD_SIZE)data) {
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- for (i=0; i<4/sizeof(FLASH_WORD_SIZE); i++)
- {
- addr2[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
- addr2[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
- addr2[ADDR0] = (FLASH_WORD_SIZE)0x00A000A0;
-
- dest2[i] = data2[i];
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* data polling for D7 */
- start = get_timer (0);
- while ((dest2[i] & (FLASH_WORD_SIZE)0x00800080) !=
- (data2[i] & (FLASH_WORD_SIZE)0x00800080)) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- return (1);
- }
- }
- }
-
- return (0);
-}
-
-/*----------------------------------------------------------------------------*/
diff --git a/board/eltec/bab7xx/l2cache.c b/board/eltec/bab7xx/l2cache.c
deleted file mode 100644
index 1e7537745a..0000000000
--- a/board/eltec/bab7xx/l2cache.c
+++ /dev/null
@@ -1,159 +0,0 @@
-/*
- * (C) Copyright 2002 ELTEC Elektronik AG
- * Frank Gottschling <fgottschling@eltec.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-
-#if defined(CFG_L2_BAB7xx)
-
-#include <pci.h>
-#include <mpc106.h>
-#include <asm/processor.h>
-
-/* defines L2CR register for MPC750 */
-
-#define L2CR_E 0x80000000
-#define L2CR_256K 0x10000000
-#define L2CR_512K 0x20000000
-#define L2CR_1024K 0x30000000
-#define L2CR_I 0x00200000
-#define L2CR_SL 0x00008000
-#define L2CR_IP 0x00000001
-
-/*----------------------------------------------------------------------------*/
-
-static int dummy (int dummy)
-{
- return (dummy+1);
-}
-
-/*----------------------------------------------------------------------------*/
-
-int l2_cache_enable (int l2control)
-{
- if (l2control) /* BAB750 */
- {
- mtspr(SPRN_L2CR, l2control);
- mtspr(SPRN_L2CR, (l2control | L2CR_I));
- while (mfspr(SPRN_L2CR) & L2CR_IP)
- ;
- mtspr(SPRN_L2CR, (l2control | L2CR_E));
- return (0);
- }
- else /* BAB740 */
- {
- int picr1, picr2, mask;
- int picr2CacheSize, cacheSize;
- int *d;
- int devbusfn;
- u32 reg32;
-
- devbusfn = pci_find_device(PCI_VENDOR_ID_MOTOROLA,
- PCI_DEVICE_ID_MOTOROLA_MPC106, 0);
- if (devbusfn == -1)
- return (-1);
-
- pci_read_config_dword (devbusfn, PCI_PICR2, &reg32);
- reg32 &= ~PICR2_L2_EN;
- pci_write_config_dword (devbusfn, PCI_PICR2, reg32);
-
- /* cache size */
- if (*(volatile unsigned char *) (CFG_ISA_IO + 0x220) & 0x04)
- {
- /* cache size is 512 KB */
- picr2CacheSize = PICR2_L2_SIZE_512K;
- cacheSize = 0x80000;
- }
- else
- {
- /* cache size is 256 KB */
- picr2CacheSize = PICR2_L2_SIZE_256K;
- cacheSize = 0x40000;
- }
-
- /* setup PICR1 */
- mask =
- ~(PICR1_CF_BREAD_WS(1) |
- PICR1_CF_BREAD_WS(2) |
- PICR1_CF_CBA(0xff) |
- PICR1_CF_CACHE_1G |
- PICR1_CF_DPARK |
- PICR1_CF_APARK |
- PICR1_CF_L2_CACHE_MASK);
-
- picr1 =
- (PICR1_CF_CBA(0x3f) |
- PICR1_CF_CACHE_1G |
- PICR1_CF_APARK |
- PICR1_CF_DPARK |
- PICR1_CF_L2_COPY_BACK); /* PICR1_CF_L2_WRITE_THROUGH */
-
- pci_read_config_dword (devbusfn, PCI_PICR1, &reg32);
- reg32 &= mask;
- reg32 |= picr1;
- pci_write_config_dword (devbusfn, PCI_PICR1, reg32);
-
- /*
- * invalidate all L2 cache
- */
- picr2 =
- (PICR2_CF_INV_MODE |
- PICR2_CF_HIT_HIGH |
- PICR2_CF_MOD_HIGH |
- PICR2_CF_L2_HIT_DELAY(1) |
- PICR2_CF_APHASE_WS(1) |
- picr2CacheSize);
-
- pci_write_config_dword (devbusfn, PCI_PICR2, picr2);
-
- /*
- * dummy transactions
- */
- for (d=0; d<(int *)(2*cacheSize); d++)
- dummy(*d);
-
- pci_write_config_dword (devbusfn, PCI_PICR2,
- (picr2 | PICR2_CF_FLUSH_L2));
-
- /* setup PICR2 */
- picr2 =
- (PICR2_CF_FAST_CASTOUT |
- PICR2_CF_WDATA |
- PICR2_CF_ADDR_ONLY_DISABLE |
- PICR2_CF_HIT_HIGH |
- PICR2_CF_MOD_HIGH |
- PICR2_L2_UPDATE_EN |
- PICR2_L2_EN |
- PICR2_CF_APHASE_WS(1) |
- PICR2_CF_DATA_RAM_PBURST |
- PICR2_CF_L2_HIT_DELAY(1) |
- PICR2_CF_SNOOP_WS(2) |
- picr2CacheSize);
-
- pci_write_config_dword (devbusfn, PCI_PICR2, picr2);
- }
- return (0);
-}
-
-/*----------------------------------------------------------------------------*/
-
-#endif /* (CFG_L2_BAB7xx) */
diff --git a/board/eltec/bab7xx/misc.c b/board/eltec/bab7xx/misc.c
deleted file mode 100644
index 6a24807411..0000000000
--- a/board/eltec/bab7xx/misc.c
+++ /dev/null
@@ -1,547 +0,0 @@
-/*
- * (C) Copyright 2002 ELTEC Elektronik AG
- * Frank Gottschling <fgottschling@eltec.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/* includes */
-#include <common.h>
-#include <linux/ctype.h>
-#include <pci.h>
-#include <net.h>
-#include <mpc106.h>
-#include <w83c553f.h>
-#include "srom.h"
-
-/* imports */
-extern char console_buffer[CFG_CBSIZE];
-extern int l2_cache_enable (int l2control);
-extern void *nvram_read (void *dest, const short src, size_t count);
-extern void nvram_write (short dest, const void *src, size_t count);
-
-/* globals */
-unsigned int ata_reset_time = 60;
-unsigned int scsi_reset_time = 10;
-unsigned int eltec_board;
-
-/* BAB750 uses SYM53C875(default) and BAB740 uses SYM53C860
- * values fixed after board identification
- */
-unsigned short scsi_dev_id = PCI_DEVICE_ID_NCR_53C875;
-unsigned int scsi_max_scsi_id = 15;
-unsigned char scsi_sym53c8xx_ccf = 0x13;
-
-/*----------------------------------------------------------------------------*/
-/*
- * handle sroms on BAB740/750
- * fix ether address
- * L2 cache initialization
- * ide dma control
- */
-int misc_init_r (void)
-{
- revinfo eerev;
- char *ptr;
- u_int i, l, initSrom, copyNv;
- char buf[256];
- char hex[23] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 0, 0, 0,
- 0, 0, 0, 0, 10, 11, 12, 13, 14, 15 };
- pci_dev_t bdf;
-
- char sromSYM[] = {
-#ifdef TULIP_BUG
- /* 10BaseT, 100BaseTx no full duplex modes */
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x04, 0x01, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x1e, 0x00, 0x00, 0x00, 0x08,
- 0x02, 0x86, 0x02, 0x00, 0xaf, 0x08, 0xa5, 0x00,
- 0x88, 0x04, 0x03, 0x27, 0x08, 0x25, 0x00, 0x61,
- 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc6, 0xe8
-#endif
- /* 10BaseT, 10BaseT-FD, 100BaseTx, 100BaseTx-FD */
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x04, 0x01, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x1e, 0x00, 0x00, 0x00, 0x08,
- 0x04, 0x86, 0x02, 0x00, 0xaf, 0x08, 0xa5, 0x00,
- 0x86, 0x02, 0x04, 0xaf, 0x08, 0xa5, 0x00, 0x88,
- 0x04, 0x03, 0x27, 0x08, 0x25, 0x00, 0x61, 0x80,
- 0x88, 0x04, 0x05, 0x27, 0x08, 0x25, 0x00, 0x61,
- 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x77
- };
-
- char sromMII[] = {
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x04, 0x01, 0x00, 0x00, 0x5b, 0x00,
- 0x2e, 0x4d, 0x00, 0x1e, 0x00, 0x00, 0x00, 0x08,
- 0x01, 0x95, 0x03, 0x00, 0x00, 0x04, 0x01, 0x08,
- 0x00, 0x00, 0x02, 0x08, 0x02, 0x00, 0x00, 0x78,
- 0xe0, 0x01, 0x00, 0x50, 0x00, 0x18, 0x80, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xde, 0x41
- };
-
- /*
- * Check/Remake revision info
- */
- initSrom = 0;
- copyNv = 0;
-
- /* read out current revision srom contens */
- el_srom_load (0x0000, (u_char*)&eerev, sizeof(revinfo),
- SECOND_DEVICE, FIRST_BLOCK);
-
- /* read out current nvram shadow image */
- nvram_read (buf, CFG_NV_SROM_COPY_ADDR, CFG_SROM_SIZE);
-
- if (strcmp (eerev.magic, "ELTEC") != 0)
- {
- /* srom is not initialized -> create a default revision info */
- for (i = 0, ptr = (char *)&eerev; i < sizeof(revinfo); i++)
- *ptr++ = 0x00;
- strcpy(eerev.magic, "ELTEC");
- eerev.revrev[0] = 1;
- eerev.revrev[1] = 0;
- eerev.size = 0x00E0;
- eerev.category[0] = 0x01;
-
- /* node id from dead e128 as default */
- eerev.etheraddr[0] = 0x00;
- eerev.etheraddr[1] = 0x00;
- eerev.etheraddr[2] = 0x5B;
- eerev.etheraddr[3] = 0x00;
- eerev.etheraddr[4] = 0x2E;
- eerev.etheraddr[5] = 0x4D;
-
- /* cache config word for bab750 */
- *(int*)&eerev.res[0] = CLK2P0TO1_1MB_PB_0P5DH;
-
- initSrom = 1; /* force dialog */
- copyNv = 1; /* copy to nvram */
- }
-
- if ((copyNv == 0) && (el_srom_checksum((u_char*)&eerev, CFG_SROM_SIZE) !=
- el_srom_checksum((u_char*)buf, CFG_SROM_SIZE)))
- {
- printf ("Invalid revision info copy in nvram !\n");
- printf ("Press key:\n <c> to copy current revision info to nvram.\n");
- printf (" <r> to reenter revision info.\n");
- printf ("=> ");
- if (0 != readline (NULL))
- {
- switch ((char)toupper(console_buffer[0]))
- {
- case 'C':
- copyNv = 1;
- break;
- case 'R':
- copyNv = 1;
- initSrom = 1;
- break;
- }
- }
- }
-
- if (initSrom)
- {
- memcpy (buf, &eerev.revision[0][0], 14); /* save all revision info */
- printf ("Enter revision number (0-9): %c ", eerev.revision[0][0]);
- if (0 != readline (NULL))
- {
- eerev.revision[0][0] = (char)toupper(console_buffer[0]);
- memcpy (&eerev.revision[1][0], buf, 12); /* shift rest of rev info */
- }
-
- printf ("Enter revision character (A-Z): %c ", eerev.revision[0][1]);
- if (1 == readline (NULL))
- {
- eerev.revision[0][1] = (char)toupper(console_buffer[0]);
- }
-
- printf ("Enter board name (V-XXXX-XXXX): %s ", (char *)&eerev.board);
- if (11 == readline (NULL))
- {
- for (i=0; i<11; i++)
- eerev.board[i] = (char)toupper(console_buffer[i]);
- eerev.board[11] = '\0';
- }
-
- printf ("Enter serial number: %s ", (char *)&eerev.serial );
- if (6 == readline (NULL))
- {
- for (i=0; i<6; i++)
- eerev.serial[i] = console_buffer[i];
- eerev.serial[6] = '\0';
- }
-
- printf ("Enter ether node ID with leading zero (HEX): %02x%02x%02x%02x%02x%02x ",
- eerev.etheraddr[0], eerev.etheraddr[1],
- eerev.etheraddr[2], eerev.etheraddr[3],
- eerev.etheraddr[4], eerev.etheraddr[5]);
- if (12 == readline (NULL))
- {
- for (i=0; i<12; i+=2)
- eerev.etheraddr[i>>1] = (char)(16*hex[toupper(console_buffer[i])-'0'] +
- hex[toupper(console_buffer[i+1])-'0']);
- }
-
- l = strlen ((char *)&eerev.text);
- printf("Add to text section (max 64 chr): %s ", (char *)&eerev.text );
- if (0 != readline (NULL))
- {
- for (i = l; i<63; i++)
- eerev.text[i] = console_buffer[i-l];
- eerev.text[63] = '\0';
- }
-
- if (strstr ((char *)&eerev.board, "75") != NULL)
- eltec_board = 750;
- else
- eltec_board = 740;
-
- if (eltec_board == 750)
- {
- if (CPU_TYPE == CPU_TYPE_750)
- *(int*)&eerev.res[0] = CLK2P0TO1_1MB_PB_0P5DH;
- else
- *(int*)&eerev.res[0] = CLK2P5TO1_1MB_PB_0P5DH;
-
- printf("Enter L2Cache config word with leading zero (HEX): %08X ",
- *(int*)&eerev.res[0] );
- if (0 != readline (NULL))
- {
- for (i=0; i<7; i+=2)
- {
- eerev.res[i>>1] =
- (char)(16*hex[toupper(console_buffer[i])-'0'] +
- hex[toupper(console_buffer[i+1])-'0']);
- }
- }
-
- /* prepare network eeprom */
- sromMII[20] = eerev.etheraddr[0];
- sromMII[21] = eerev.etheraddr[1];
- sromMII[22] = eerev.etheraddr[2];
- sromMII[23] = eerev.etheraddr[3];
- sromMII[24] = eerev.etheraddr[4];
- sromMII[25] = eerev.etheraddr[5];
- printf("\nSRom: Writing DEC21143 MII info .. ");
-
- if (dc_srom_store ((u_short *)sromMII) == -1)
- printf("FAILED\n");
- else
- printf("OK\n");
- }
-
- if (eltec_board == 740)
- {
- *(int *)&eerev.res[0] = 0;
- sromSYM[20] = eerev.etheraddr[0];
- sromSYM[21] = eerev.etheraddr[1];
- sromSYM[22] = eerev.etheraddr[2];
- sromSYM[23] = eerev.etheraddr[3];
- sromSYM[24] = eerev.etheraddr[4];
- sromSYM[25] = eerev.etheraddr[5];
- printf("\nSRom: Writing DEC21143 SYM info .. ");
-
- if (dc_srom_store ((u_short *)sromSYM) == -1)
- printf("FAILED\n");
- else
- printf("OK\n");
- }
-
- /* update CRC */
- eerev.crc = el_srom_checksum((u_char *)eerev.board, eerev.size);
-
- /* write new values */
- printf("\nSRom: Writing revision info ...... ");
- if (el_srom_store((BLOCK_SIZE-sizeof(revinfo)), (u_char *)&eerev,
- sizeof(revinfo), SECOND_DEVICE, FIRST_BLOCK) == -1)
- printf("FAILED\n\n");
- else
- printf("OK\n\n");
-
- /* write new values as shadow image to nvram */
- nvram_write (CFG_NV_SROM_COPY_ADDR, (void *)&eerev, CFG_SROM_SIZE);
-
- } /*if (initSrom) */
-
- /* copy current values as shadow image to nvram */
- if (initSrom == 0 && copyNv == 1)
- nvram_write (CFG_NV_SROM_COPY_ADDR, (void *)&eerev, CFG_SROM_SIZE);
-
- /* update environment */
- sprintf (buf, "%02x:%02x:%02x:%02x:%02x:%02x",
- eerev.etheraddr[0], eerev.etheraddr[1],
- eerev.etheraddr[2], eerev.etheraddr[3],
- eerev.etheraddr[4], eerev.etheraddr[5]);
- setenv ("ethaddr", buf);
-
- /* print actual board identification */
- printf("Ident: %s Ser %s Rev %c%c\n",
- eerev.board, (char *)&eerev.serial,
- eerev.revision[0][0], eerev.revision[0][1]);
-
- /* global board ident */
- if (strstr ((char *)&eerev.board, "75") != NULL)
- eltec_board = 750;
- else
- eltec_board = 740;
-
- /*
- * L2 cache configuration
- */
-#if defined(CFG_L2_BAB7xx)
- ptr = getenv("l2cache");
- if (*ptr == '0')
- {
- printf ("Cache: L2 NOT activated on BAB%d\n", eltec_board);
- }
- else
- {
- printf ("Cache: L2 activated on BAB%d\n", eltec_board);
- l2_cache_enable(*(int*)&eerev.res[0]);
- }
-#endif
-
- /*
- * Reconfig ata reset timeout from environment
- */
- if ((ptr = getenv ("ata_reset_time")) != NULL)
- {
- ata_reset_time = (int)simple_strtoul (ptr, NULL, 10);
- }
- else
- {
- sprintf (buf, "%d", ata_reset_time);
- setenv ("ata_reset_time", buf);
- }
-
- /*
- * Reconfig scsi reset timeout from environment
- */
- if ((ptr = getenv ("scsi_reset_time")) != NULL)
- {
- scsi_reset_time = (int)simple_strtoul (ptr, NULL, 10);
- }
- else
- {
- sprintf (buf, "%d", scsi_reset_time);
- setenv ("scsi_reset_time", buf);
- }
-
-
- if ((bdf = pci_find_device(PCI_VENDOR_ID_WINBOND, PCI_DEVICE_ID_WINBOND_83C553, 0)) > 0)
- {
- if (pci_find_device(PCI_VENDOR_ID_NCR, PCI_DEVICE_ID_NCR_53C860, 0) > 0)
- {
- /* BAB740 with SCSI=IRQ 11; SCC=IRQ 9; no IDE; NCR860 at 80 Mhz */
- scsi_dev_id = PCI_DEVICE_ID_NCR_53C860;
- scsi_max_scsi_id = 7;
- scsi_sym53c8xx_ccf = 0x15;
- pci_write_config_byte (bdf, WINBOND_IDEIRCR, 0xb0);
- }
-
- if ((ptr = getenv ("ide_dma_off")) != NULL)
- {
- u_long dma_off = simple_strtoul (ptr, NULL, 10);
- /*
- * setup user defined registers
- * s.a. linux/drivers/ide/sl82c105.c
- */
- bdf |= PCI_BDF(0,0,1); /* ide user reg at bdf function 1 */
- if (dma_off & 1)
- {
- pci_write_config_byte (bdf, 0x46, 1);
- printf("IDE: DMA off flag set: Bus 0 : Dev 0\n");
- }
- if (dma_off & 2)
- {
- pci_write_config_byte (bdf, 0x4a, 1);
- printf("IDE: DMA off flag set: Bus 0 : Dev 1\n");
- }
- if (dma_off & 4)
- {
- pci_write_config_byte (bdf, 0x4e, 1);
- printf("IDE: DMA off flag set: Bus 1 : Dev 0\n");
- }
- if (dma_off & 8)
- {
- pci_write_config_byte (bdf, 0x52, 1);
- printf("IDE: DMA off flag set: Bus 1 : Dev 1\n");
- }
- }
- }
- return (0);
-}
-
-/*----------------------------------------------------------------------------*/
-/*
- * BAB740 uses KENDIN KS8761 modem chip with not common setup values
- */
-#ifdef CONFIG_TULIP_SELECT_MEDIA
-
-/* Register bits.
- */
-#define BMR_SWR 0x00000001 /* Software Reset */
-#define STS_TS 0x00700000 /* Transmit Process State */
-#define STS_RS 0x000e0000 /* Receive Process State */
-#define OMR_ST 0x00002000 /* Start/Stop Transmission Command */
-#define OMR_SR 0x00000002 /* Start/Stop Receive */
-#define OMR_PS 0x00040000 /* Port Select */
-#define OMR_SDP 0x02000000 /* SD Polarity - MUST BE ASSERTED */
-#define OMR_PM 0x00000080 /* Pass All Multicast */
-#define OMR_PR 0x00000040 /* Promiscuous Mode */
-#define OMR_PCS 0x00800000 /* PCS Function */
-#define OMR_TTM 0x00400000 /* Transmit Threshold Mode */
-
-/* Ethernet chip registers.
- */
-#define DE4X5_BMR 0x000 /* Bus Mode Register */
-#define DE4X5_TPD 0x008 /* Transmit Poll Demand Reg */
-#define DE4X5_RRBA 0x018 /* RX Ring Base Address Reg */
-#define DE4X5_TRBA 0x020 /* TX Ring Base Address Reg */
-#define DE4X5_STS 0x028 /* Status Register */
-#define DE4X5_OMR 0x030 /* Operation Mode Register */
-#define DE4X5_SISR 0x060 /* SIA Status Register */
-#define DE4X5_SICR 0x068 /* SIA Connectivity Register */
-#define DE4X5_TXRX 0x070 /* SIA Transmit and Receive Register */
-#define DE4X5_GPPR 0x078 /* General Purpose Port register */
-#define DE4X5_APROM 0x048 /* Ethernet Address PROM */
-
-/*----------------------------------------------------------------------------*/
-
-static int INL(struct eth_device* dev, u_long addr)
-{
- return le32_to_cpu(*(volatile u_long *)(addr + dev->iobase));
-}
-
-/*----------------------------------------------------------------------------*/
-
-static void OUTL(struct eth_device* dev, int command, u_long addr)
-{
- *(volatile u_long *)(addr + dev->iobase) = cpu_to_le32(command);
-}
-
-/*----------------------------------------------------------------------------*/
-
-static void media_reg_init (
- struct eth_device* dev,
- u32 csr14,
- u32 csr15_dir,
- u32 csr15_v0,
- u32 csr15_v1,
- u32 csr6 )
-{
- OUTL(dev, 0, DE4X5_OMR); /* CSR6 */
- udelay(10 * 1000);
- OUTL(dev, 0, DE4X5_SICR); /* CSR13 */
- OUTL(dev, 1, DE4X5_SICR); /* CSR13 */
- udelay(10 * 1000);
- OUTL(dev, csr14, DE4X5_TXRX); /* CSR14 */
- OUTL(dev, csr15_dir, DE4X5_GPPR); /* CSR15 */
- OUTL(dev, csr15_v0, DE4X5_GPPR); /* CSR15 */
- udelay(10 * 1000);
- OUTL(dev, csr15_v1, DE4X5_GPPR); /* CSR15 */
- OUTL(dev, 0x00000301, DE4X5_SISR); /* CSR12 */
- OUTL(dev, csr6, DE4X5_OMR); /* CSR6 */
-}
-
-/*----------------------------------------------------------------------------*/
-
-void dc21x4x_select_media(struct eth_device* dev)
-{
- int i, status, ext;
- extern unsigned int eltec_board;
-
- if (eltec_board == 740)
- {
- printf("SYM media select "); /* BAB740 */
- /* start autoneg. with 10 mbit */
- media_reg_init (dev, 0x3ffff, 0x08af0008, 0x00a10008, 0x00a50008, 0x02400080);
- ext = status = 0;
- for (i=0; i<2000+ext; i++)
- {
- status = INL(dev, DE4X5_SISR);
- udelay(1000);
- if (status & 0x2000) ext = 2000;
- if ((status & 0x7000) == 0x5000) break;
- }
-
- /* autoneg. ok -> 100MB FD */
- if ((status & 0x0100f000) == 0x0100d000)
- {
- media_reg_init (dev, 0x37f7f, 0x08270008, 0x00210008, 0x00250008, 0x03c40280);
- printf("100baseTx-FD\n");
- }
- /* autoneg. ok -> 100MB HD */
- else if ((status & 0x0080f000) == 0x0080d000)
- {
- media_reg_init (dev, 0x17f7f, 0x08270008, 0x00210008, 0x00250008, 0x03c40080);
- printf("100baseTx\n");
- }
- /* autoneg. ok -> 10MB FD */
- else if ((status & 0x0040f000) == 0x0040d000)
- {
- media_reg_init (dev, 0x07f7f, 0x08af0008, 0x00a10008, 0x00a50008, 0x02400280);
- printf("10baseT-FD\n");
- }
- /* autoneg. fail -> 10MB HD */
- else
- {
- media_reg_init (dev, 0x7f7f, 0x08af0008, 0x00a10008, 0x00a50008,
- (OMR_SDP | OMR_TTM | OMR_PM));
- printf("10baseT\n");
- }
- }
- else
- {
- printf("MII media selected\n"); /* BAB750 */
- OUTL(dev, OMR_SDP | OMR_PS | OMR_PM, DE4X5_OMR); /* CSR6 */
- }
-}
-#endif /* CONFIG_TULIP_SELECT_MEDIA */
-
-/*---------------------------------------------------------------------------*/
diff --git a/board/eltec/bab7xx/pci.c b/board/eltec/bab7xx/pci.c
deleted file mode 100644
index edbd3ddf73..0000000000
--- a/board/eltec/bab7xx/pci.c
+++ /dev/null
@@ -1,120 +0,0 @@
-/*
- * (C) Copyright 2002 ELTEC Elektronik AG
- * Frank Gottschling <fgottschling@eltec.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * PCI initialisation for the MPC10x.
- */
-
-#include <common.h>
-#include <pci.h>
-#include <mpc106.h>
-
-#ifdef CONFIG_PCI
-
-struct pci_controller local_hose;
-
-void pci_init_board(void)
-{
- struct pci_controller* hose = (struct pci_controller *)&local_hose;
- u32 reg32;
- u16 reg16;
-
- hose->first_busno = 0;
- hose->last_busno = 0xff;
-
- pci_set_region(hose->regions + 0,
- CFG_PCI_MEMORY_BUS,
- CFG_PCI_MEMORY_PHYS,
- /*
- * Attention: pci_hose_phys_to_bus() failes in address compare,
- * so we need (CFG_PCI_MEMORY_SIZE-1)
- */
- CFG_PCI_MEMORY_SIZE-1,
- PCI_REGION_MEM | PCI_REGION_MEMORY);
-
- /* PCI memory space */
- pci_set_region(hose->regions + 1,
- CFG_PCI_MEM_BUS,
- CFG_PCI_MEM_PHYS,
- CFG_PCI_MEM_SIZE,
- PCI_REGION_MEM);
-
- /* ISA/PCI memory space */
- pci_set_region(hose->regions + 2,
- CFG_ISA_MEM_BUS,
- CFG_ISA_MEM_PHYS,
- CFG_ISA_MEM_SIZE,
- PCI_REGION_MEM);
-
- /* PCI I/O space */
- pci_set_region(hose->regions + 3,
- CFG_PCI_IO_BUS,
- CFG_PCI_IO_PHYS,
- CFG_PCI_IO_SIZE,
- PCI_REGION_IO);
-
- /* ISA/PCI I/O space */
- pci_set_region(hose->regions + 4,
- CFG_ISA_IO_BUS,
- CFG_ISA_IO_PHYS,
- CFG_ISA_IO_SIZE,
- PCI_REGION_IO);
-
- hose->region_count = 5;
-
- pci_setup_indirect(hose,
- MPC106_REG_ADDR,
- MPC106_REG_DATA);
-
- pci_register_hose(hose);
-
- hose->last_busno = pci_hose_scan(hose);
-
- /* Initialises the MPC10x PCI Configuration regs. */
- pci_read_config_dword (PCI_BDF(0,0,0), PCI_PICR2, &reg32);
- reg32 |= PICR2_CF_SNOOP_WS(3) |
- PICR2_CF_FLUSH_L2 |
- PICR2_CF_L2_HIT_DELAY(3) |
- PICR2_CF_APHASE_WS(3);
- reg32 &= ~(PICR2_L2_EN | PICR2_L2_UPDATE_EN);
- pci_write_config_dword (PCI_BDF(0,0,0), PCI_PICR2, reg32);
-
- pci_read_config_word (PCI_BDF(0,0,0), PCI_COMMAND, &reg16);
- reg16 |= PCI_COMMAND_SERR | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
- pci_write_config_word(PCI_BDF(0,0,0), PCI_COMMAND, reg16);
-
- /* Clear non-reserved bits in status register */
- pci_write_config_word(PCI_BDF(0,0,0), PCI_STATUS, 0xffff);
-
- pci_read_config_dword (PCI_BDF(0,0,0), PCI_PICR1, &reg32);
- reg32 |= PICR1_CF_CBA(63) |
- PICR1_CF_BREAD_WS(2) |
- PICR1_MCP_EN |
- PICR1_CF_DPARK |
- PICR1_PROC_TYPE_604 |
- PICR1_CF_LOOP_SNOOP |
- PICR1_CF_APARK;
- pci_write_config_dword (PCI_BDF(0,0,0), PCI_PICR1, reg32);
-}
-
-#endif /* CONFIG_PCI */
diff --git a/board/eltec/bab7xx/srom.h b/board/eltec/bab7xx/srom.h
deleted file mode 100644
index c18ab91645..0000000000
--- a/board/eltec/bab7xx/srom.h
+++ /dev/null
@@ -1,102 +0,0 @@
-/*
- * (C) Copyright 2002 ELTEC Elektronik AG
- * Frank Gottschling <fgottschling@eltec.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/* common srom defs */
-#define FIRST_DEVICE 0x00
-#define SECOND_DEVICE 0x04
-#define FIRST_BLOCK 0x00
-#define SECOND_BLOCK 0x02
-#define BLOCK_SIZE 0x100
-#define ERROR (-1)
-
-#define CLK2P0TO1_1MB_PB_0P5DH 0x79000100
-#define CLK2P5TO1_1MB_PB_0P5DH 0x7B000100
-
-#define CPU_TYPE_740 0x08
-#define CPU_TYPE_750 0x08
-#define CPU_TYPE ((get_pvr()>>16)&0xffff)
-
-#define ABS(x) ((x<0)?-x:x)
-#define SROM_SHORT(pX) (*(u8 *)(pX) | *((u8 *)(pX)+1) << 8)
-
-/* bab7xx ELTEC srom */
-#define I2C_BUS_DAT (CFG_ISA_IO + 0x220)
-#define I2C_BUS_DIR (CFG_ISA_IO + 0x221)
-
-/* srom at mpc107 */
-#define MPC107_I2CADDR (mpc107_eumb_addr + 0x3000) /* address */
-#define MPC107_I2CFDR (mpc107_eumb_addr + 0x3004) /* freq divider */
-#define MPC107_I2CCR (mpc107_eumb_addr + 0x3008) /* control */
-#define MPC107_I2CSR (mpc107_eumb_addr + 0x300c) /* status */
-#define MPC107_I2CDR (mpc107_eumb_addr + 0x3010) /* data */
-#define MPC107_I2C_TIMEOUT 10000000
-
-/* i82559 */
-#define EE_ADDR_BITS 6
-#define EE_SIZE 0x40 /* 0x40 words */
-#define EE_CHECKSUM 0xBABA
-
-/* dc21143 */
-#define DEC_SROM_SIZE 128
-
-
-/*
- * structure of revision srom
- */
-typedef struct {
- char magic[8]; /* 000 - Magic number */
- char revrev[2]; /* 008 - Revision of structure */
- unsigned short size; /* 00A - Size of CRC area */
- unsigned long crc; /* 00C - CRC */
- char board[16]; /* 010 - Board Revision information */
- char option[4][16]; /* 020 - Option Revision information */
- char serial[8]; /* 060 - Board serial number */
- char etheraddr[6]; /* 068 - Ethernet node addresse */
- char reserved[2]; /* 06E - Reserved */
- char revision[7][2]; /* 070 - Revision codes */
- char category[2]; /* 07E - Category codes */
- char text[64]; /* 080 - Text field */
- char res[64]; /* 0C0 - Reserved */
-} revinfo;
-
-unsigned long el_srom_checksum (unsigned char *ptr, unsigned long size);
-int el_srom_load (unsigned char addr, unsigned char *buf, int cnt,
- unsigned char device, unsigned char block);
-int el_srom_store (unsigned char addr, unsigned char *buf, int cnt,
- unsigned char device, unsigned char block);
-
-int mpc107_i2c_init (unsigned long eumb_addr, unsigned long divider);
-int mpc107_i2c_read_byte (unsigned char device, unsigned char block, unsigned char offset);
-int mpc107_i2c_write_byte (unsigned char device, unsigned char block,
- unsigned char offset, unsigned char val);
-int mpc107_srom_load (unsigned char addr, unsigned char *pBuf, int cnt,
- unsigned char device, unsigned char block);
-int mpc107_srom_store (unsigned char addr, unsigned char *pBuf, int cnt,
- unsigned char device, unsigned char block);
-
-int dc_srom_load (unsigned short *dest);
-int dc_srom_store (unsigned short *src);
-
-unsigned short eepro100_srom_checksum (unsigned short *sromdata);
-void eepro100_srom_load (unsigned short *destination);
-int eepro100_srom_store (unsigned short *source);
diff --git a/board/eltec/bab7xx/u-boot.lds b/board/eltec/bab7xx/u-boot.lds
deleted file mode 100644
index d89eb6cff2..0000000000
--- a/board/eltec/bab7xx/u-boot.lds
+++ /dev/null
@@ -1,138 +0,0 @@
-/*
- * (C) Copyright 2001
- * Josh Huber <huber@mclx.com>, Mission Critical Linux, Inc.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * u-boot.lds - linker script for U-Boot on the Galileo Eval Board.
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/74xx_7xx/start.o (.text)
-
-/* store the environment in a seperate sector in the boot flash */
-/* . = env_offset; */
-/* common/environment.o(.text) */
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/eltec/elppc/Makefile b/board/eltec/elppc/Makefile
deleted file mode 100644
index 76b2cfe620..0000000000
--- a/board/eltec/elppc/Makefile
+++ /dev/null
@@ -1,48 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o pci.o misc.o mpc107_i2c.o eepro100_srom.o
-
-SOBJS = asm_init.o
-
-$(LIB): .depend $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS) $(SOBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/eltec/elppc/asm_init.S b/board/eltec/elppc/asm_init.S
deleted file mode 100644
index 1b8d399ed3..0000000000
--- a/board/eltec/elppc/asm_init.S
+++ /dev/null
@@ -1,878 +0,0 @@
-/*
- * (C) Copyright 2001 ELTEC Elektronik AG
- * Frank Gottschling <fgottschling@eltec.de>
- *
- * ELTEC ELPPC RAM initialization
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <config.h>
-#include <asm/processor.h>
-#include <version.h>
-#include <mpc106.h>
-
-#include <ppc_asm.tmpl>
-#include <ppc_defs.h>
-
-.globl board_asm_init
-board_asm_init:
-
-/*
- * setup pointer to message block
- */
- mflr r13 /* save away link register */
- bl get_lnk_reg /* r3=addr of next instruction */
- subi r4, r3, 8 /* r4=board_asm_init addr */
- addi r29, r4, (MessageBlock-board_asm_init)
-
-/*
- * dcache_disable
- */
- mfspr r3, HID0
- li r4, HID0_DCE
- andc r3, r3, r4
- mr r2, r3
- ori r3, r3, HID0_DCI
- sync
- mtspr HID0, r3
- mtspr HID0, r2
- isync
- sync
-/*
- * icache_disable
- */
- mfspr r3, HID0
- li r4, 0
- ori r4, r4, HID0_ICE
- andc r3, r3, r4
- sync
- mtspr HID0, r3
-/*
- * invalidate caches
- */
- ori r3, r3, (HID0_ICE | HID0_ICFI | HID0_DCI | HID0_DCE)
- or r4, r4, r3
- isync
- mtspr HID0, r4
- andc r4, r4, r3
- isync
- mtspr HID0, r4
- isync
-/*
- * icache_enable
- */
- mfspr r3, HID0
- ori r3, r3, (HID0_ICE | HID0_ICFI)
- sync
- mtspr HID0, r3
-
-
-/*
- * setup memory controller
- */
- lis r1, MPC106_REG_ADDR@h
- ori r1, r1, MPC106_REG_ADDR@l
- lis r2, MPC106_REG_DATA@h
- ori r2, r2, MPC106_REG_DATA@l
-
- /* Configure PICR1 */
- lis r3, MPC106_REG@h
- ori r3, r3, PCI_PICR1
- stwbrx r3, 0, r1
- addis r3, r0, 0xFF14
- ori r3, r3, 0x1CC8
- eieio
- stwbrx r3, 0, r2
-
- /* Configure PICR2 */
- lis r3, MPC106_REG@h
- ori r3, r3, PCI_PICR2
- stwbrx r3, 0, r1
- addis r3, r0, 0x0000
- ori r3, r3, 0x0000
- eieio
- stwbrx r3, 0, r2
-
- /* Configure EUMBAR */
- lis r3, MPC106_REG@h
- ori r3, r3, 0x0078 /* offest of EUMBAR in PCI config space */
- stwbrx r3, 0, r1
- lis r3, MPC107_EUMB_ADDR@h
- eieio
- stwbrx r3, 0, r2
-
- /* Configure Address Map B Option Reg */
- lis r3, MPC106_REG@h
- ori r3, r3, 0x00e0 /* offest of AMBOR in PCI config space */
- stwbrx r3, 0, r1
- lis r3, 0
- eieio
- stwbrx r3, 0, r2
-
- /* Configure I2C Controller */
- lis r14, MPC107_I2C_ADDR@h /* base of I2C controller */
- ori r14, r14, MPC107_I2C_ADDR@l
- lis r3, 0x2b10 /* I2C clock = 100MHz/1024 */
- stw r3, 4(r14)
- li r3, 0 /* clear arbitration */
- eieio
- stw r3, 12(r14)
-
- /* Configure MCCR1 */
- lis r3, MPC106_REG@h
- ori r3, r3, MPC106_MCCR1
- stwbrx r3, 0, r1
- addis r3, r0, 0x0660 /* don't set MEMGO now ! */
- ori r3, r3, 0x0000
- eieio
- stwbrx r3, 0, r2
-
- /* Configure MCCR2 */
- lis r3, MPC106_REG@h
- ori r3, r3, MPC106_MCCR2
- stwbrx r3, 0, r1
- addis r3, r0, 0x0400
- ori r3, r3, 0x1800
- eieio
- stwbrx r3, 0, r2
-
-
- /* Configure MCCR3 */
- lis r3, MPC106_REG@h
- ori r3, r3, MPC106_MCCR3
- stwbrx r3, 0, r1
- addis r3, r0, 0x0230
- ori r3, r3, 0x0000
- eieio
- stwbrx r3, 0, r2
-
- /* Configure MCCR4 */
- lis r3, MPC106_REG@h
- ori r3, r3, MPC106_MCCR4
- stwbrx r3, 0, r1
- addis r3, r0, 0x2532
- ori r3, r3, 0x2220
- eieio
- stwbrx r3, 0, r2
-
-/*
- * configure memory interface (MICRs)
- */
- addis r3, r0, 0x8000 /* ADDR_80 */
- ori r3, r3, 0x0080 /* SMEMADD1 */
- stwbrx r3, 0, r1
- addis r3, r0, 0xFFFF
- ori r3, r3, 0x4000
- eieio
- stwbrx r3, 0, r2
-
- addis r3, r0, 0x8000 /* ADDR_84 */
- ori r3, r3, 0x0084 /* SMEMADD2 */
- stwbrx r3, 0, r1
- addis r3, r0, 0xFFFF
- ori r3, r3, 0xFFFF
- eieio
- stwbrx r3, 0, r2
-
- addis r3, r0, 0x8000 /* ADDR_88 */
- ori r3, r3, 0x0088 /* EXTSMEM1 */
- stwbrx r3, 0, r1
- addis r3, r0, 0x0303
- ori r3, r3, 0x0000
- eieio
- stwbrx r3, 0, r2
-
- addis r3, r0, 0x8000 /* ADDR_8C */
- ori r3, r3, 0x008c /* EXTSMEM2 */
- stwbrx r3, 0, r1
- addis r3, r0, 0x0303
- ori r3, r3, 0x0303
- eieio
- stwbrx r3, 0, r2
-
- addis r3, r0, 0x8000 /* ADDR_90 */
- ori r3, r3, 0x0090 /* EMEMADD1 */
- stwbrx r3, 0, r1
- addis r3, r0, 0xFFFF
- ori r3, r3, 0x7F3F
- eieio
- stwbrx r3, 0, r2
-
- addis r3, r0, 0x8000 /* ADDR_94 */
- ori r3, r3, 0x0094 /* EMEMADD2 */
- stwbrx r3, 0, r1
- addis r3, r0, 0xFFFF
- ori r3, r3, 0xFFFF
- eieio
- stwbrx r3, 0, r2
-
- addis r3, r0, 0x8000 /* ADDR_98 */
- ori r3, r3, 0x0098 /* EXTEMEM1 */
- stwbrx r3, 0, r1
- addis r3, r0, 0x0303
- ori r3, r3, 0x0000
- eieio
- stwbrx r3, 0, r2
-
- addis r3, r0, 0x8000 /* ADDR_9C */
- ori r3, r3, 0x009c /* EXTEMEM2 */
- stwbrx r3, 0, r1
- addis r3, r0, 0x0303
- ori r3, r3, 0x0303
- eieio
- stwbrx r3, 0, r2
-
- addis r3, r0, 0x8000 /* ADDR_A0 */
- ori r3, r3, 0x00a0 /* MEMBNKEN */
- stwbrx r3, 0, r1
- addis r3, r0, 0x0000
- ori r3, r3, 0x0003
- eieio
- stwbrx r3, 0, r2
-
-/*
- * must wait at least 100us after HRESET to issue a MEMGO
- */
- lis r0, 1
- mtctr r0
-memStartWait:
- bdnz memStartWait
-
-/*
- * enable RAM Operations through MCCR1 (MEMGO)
- */
- lis r3, 0x8000
- ori r3, r3, 0x00f0
- stwbrx r3, r0, r1
- sync
- lwbrx r3, 0, r2
- lis r0, 0x0008
- or r3, r0, r3
- stwbrx r3, 0, r2
- sync
-
-/*
- * set LEDs first time
- */
- li r3, 0x1
- lis r30, CFG_USR_LED_BASE@h
- stb r3, 2(r30)
- sync
-
-/*
- * init COM1 for polled output
- */
- lis r8, CFG_NS16550_COM1@h /* COM1 base address*/
- ori r8, r8, CFG_NS16550_COM1@l
- li r9, 0x00
- stb r9, 1(r8) /* int disabled */
- eieio
- li r9, 0x00
- stb r9, 4(r8) /* modem ctrl */
- eieio
- li r9, 0x80
- stb r9, 3(r8) /* link ctrl */
- eieio
- li r9, (CFG_NS16550_CLK / 16 / CONFIG_BAUDRATE)
- stb r9, 0(r8) /* baud rate (LSB)*/
- eieio
- li r9, ((CFG_NS16550_CLK / 16 / CONFIG_BAUDRATE) >> 8)
- stb r9, 1(r8) /* baud rate (MSB) */
- eieio
- li r9, 0x07
- stb r9, 3(r8) /* 8 data bits, 2 stop bit, no parity */
- eieio
- li r9, 0x0b
- stb r9, 4(r8) /* enable the receiver and transmitter (modem ctrl) */
- eieio
-waitEmpty:
- lbz r9, 5(r8) /* transmit empty */
- andi. r9, r9, 0x40
- beq waitEmpty
- li r9, 0x47
- stb r9, 3(r8) /* send break, 8 data bits, 2 stop bit, no parity */
- eieio
-
- lis r0, 0x0001
- mtctr r0
-waitCOM1:
- lwz r0, 5(r8) /* load from port for delay */
- bdnz waitCOM1
-
-waitEmpty1:
- lbz r9, 5(r8) /* transmit empty */
- andi. r9, r9, 0x40
- beq waitEmpty1
- li r9, 0x07
- stb r9, 3(r8) /* 8 data bits, 2 stop bit, no parity */
- eieio
-
-/*
- * intro message from message block
- */
- addi r3, r29, (MnewLine-MessageBlock)
- bl Printf
- addi r3, r29, (MinitLogo-MessageBlock)
- bl Printf
-
-/*
- * memory cofiguration using SPD information stored on the SODIMMs
- */
- addi r3, r29, (Mspd01-MessageBlock)
- bl Printf
-
- li r17, 0
-
- li r3, 0x0002 /* get RAM type from spd for bank0/1 */
- bl spdRead
-
- cmpi 0, 0, r3, -1 /* error ? */
- bne noSpdError
-
- addi r3, r29, (Mfail-MessageBlock)
- bl Printf
-
- li r6, 0xe /* error codes in r6 and r7 */
- li r7, 0x0
- b toggleError /* fail - loop forever */
-
-noSpdError:
- mr r15, r3 /* save r3 */
-
- addi r3, r29, (Mok-MessageBlock)
- bl Printf
-
- cmpli 0, 0, r15, 0x0004 /* SDRAM ? */
- beq isSDRAM
-
- addi r3, r29, (MramTyp-MessageBlock)
- bl Printf
-
- li r6, 0xd /* error codes in r6 and r7 */
- li r7, 0x0
- b toggleError /* fail - loop forever */
-
-isSDRAM:
- li r3, 0x0012 /* get supported CAS latencies from byte 18 */
- bl spdRead
- mr r15, r3
- li r3, 0x09
- andi. r0, r15, 0x04
- bne maxCLis3
- li r3, 0x17
-maxCLis3:
- andi. r0, r15, 0x02
- bne CL2
-
- addi r3, r29, (MramTyp-MessageBlock)
- bl Printf
-
- li r6, 0xc /* error codes in r6 and r7 */
- li r7, 0x0
- b toggleError /* fail - loop forever */
-CL2:
- bl spdRead
- cmpli 0, 0, r3, 0xa1 /* cycle time must be 10ns max. */
- blt speedOk
-
- addi r3, r29, (MramTyp-MessageBlock)
- bl Printf
-
- li r6, 0xb /* error codes in r6 and r7 */
- li r7, 0x0
- b toggleError /* fail - loop forever */
-speedOk:
- lis r20, 0x06e8 /* preset MCR1 value */
-
- li r3, 0x0011 /* get number of internal banks from spd for bank0/1 */
- bl spdRead
-
- cmpli 0, 0, r3, 0x02
- beq SD_2B
- cmpli 0, 0, r3, 0x04
- beq SD_4B
-memConfErr:
- addi r3, r29, (MramConfErr-MessageBlock)
- bl Printf
-
- li r6, 0xa /* error codes in r6 and r7 */
- li r7, 0x0
- b toggleError /* fail - loop forever */
-
-SD_2B:
- li r3, 0x0003 /* get number of row bits from spd for bank0/1 */
- bl spdRead
- cmpli 0, 0, r3, 0x0b
- beq row11x2
- cmpli 0, 0, r3, 0x0c
- beq row12x2or13x2
- cmpli 0, 0, r3, 0x0d
- beq row12x2or13x2
- b memConfErr
-SD_4B:
- li r3, 0x0003 /* get number of row bits from spd for bank0/1 */
- bl spdRead
- cmpli 0, 0, r3, 0x0b
- beq row11x4or12x4
- cmpli 0, 0, r3, 0x0c
- beq row11x4or12x4
- cmpli 0, 0, r3, 0x0d
- beq row13x4
- b memConfErr
-row12x2or13x2:
- ori r20, r20, 0x05
- b row11x4or12x4
-row13x4:
- ori r20, r20, 0x0a
- b row11x4or12x4
-row11x2:
- ori r20, r20, 0x0f
-row11x4or12x4:
- /* get the size of bank 0-1 */
-
- li r3, 0x001f /* get bank size from spd for bank0/1 */
- bl spdRead
-
- rlwinm r16, r3, 2, 24, 29 /* calculate size in MByte (128 MB max.) */
-
- li r3, 0x0005 /* get number of banks from spd for bank0/1 */
- bl spdRead
-
- cmpi 0, 0, r3, 2 /* 2 banks ? */
- bne SDRAMnobank1
-
- mr r17, r16
-
-SDRAMnobank1:
- li r3, 0x000c /* get refresh from spd for bank0/1 */
- bl spdRead
- andi. r3, r3, 0x007f /* mask selfrefresh bit */
- li r4, 0x1800 /* refesh cycle 1536 clocks left shifted 2 */
- cmpli 0, 0, r3, 0x0000 /* 15.6 us ? */
- beq writeRefresh
-
- li r4, 0x0c00 /* refesh cycle 768 clocks left shifted 2 */
- cmpli 0, 0, r3, 0x0002 /* 7.8 us ? */
- beq writeRefresh
-
- li r4, 0x3000 /* refesh cycle 3072 clocks left shifted 2 */
- cmpli 0, 0, r3, 0x0003 /* 31.3 us ? */
- beq writeRefresh
-
- li r4, 0x6000 /* refesh cycle 6144 clocks left shifted 2 */
- cmpli 0, 0, r3, 0x0004 /* 62.5 us ? */
- beq writeRefresh
-
- li r4, 0
- ori r4, r4, 0xc000 /* refesh cycle 8224 clocks left shifted 2 */
- cmpli 0, 0, r3, 0x0005 /* 125 us ? */
- beq writeRefresh
-
- b memConfErr
-
-writeRefresh:
- lis r21, 0x0400 /* preset MCCR2 value */
- or r21, r21, r4
-
- /* Overwrite MCCR1 */
- lis r3, MPC106_REG@h
- ori r3, r3, MPC106_MCCR1
- stwbrx r3, 0, r1
- eieio
- stwbrx r20, 0, r2
-
- /* Overwrite MCCR2 */
- lis r3, MPC106_REG@h
- ori r3, r3, MPC106_MCCR2
- stwbrx r3, 0, r1
- eieio
- stwbrx r21, 0, r2
-
- /* set the memory boundary registers for bank 0-3 */
- li r20, 0
- lis r23, 0x0303
- lis r24, 0x0303
- subi r21, r16, 1 /* calculate end address bank0 */
- li r22, 1
-
- cmpi 0, 0, r17, 0 /* bank1 present ? */
- beq nobank1
-
- andi. r3, r16, 0x00ff /* calculate start address of bank1 */
- andi. r4, r16, 0x0300
- rlwinm r3, r3, 8, 16, 23
- or r20, r20, r3
- or r23, r23, r4
-
- add r16, r16, r17 /* add to total memory size */
-
- subi r3, r16, 1 /* calculate end address of bank1 */
- andi. r4, r3, 0x0300
- andi. r3, r3, 0x00ff
- rlwinm r3, r3, 8, 16, 23
- or r21, r21, r3
- or r24, r24, r4
-
- ori r22, r22, 2 /* enable bank1 */
- b bankOk
-nobank1:
- ori r23, r23, 0x0300 /* set bank1 start to unused area */
- ori r24, r24, 0x0300 /* set bank1 end to unused area */
-bankOk:
- addi r3, r29, (Mactivate-MessageBlock)
- bl Printf
- mr r3, r16
- bl OutDec
- addi r3, r29, (Mact0123e-MessageBlock)
- bl Printf
-
-/*
- * overwrite MSAR1, MEAR1, EMSAR1, and EMEAR1
- */
- addis r3, r0, 0x8000 /* ADDR_80 */
- ori r3, r3, 0x0080 /* MSAR1 */
- stwbrx r3, 0, r1
- eieio
- stwbrx r20, 0, r2
-
- addis r3, r0, 0x8000 /* ADDR_88 */
- ori r3, r3, 0x0088 /* EMSAR1 */
- stwbrx r3, 0, r1
- eieio
- stwbrx r23, 0, r2
-
- addis r3, r0, 0x8000 /* ADDR_90 */
- ori r3, r3, 0x0090 /* MEAR1 */
- stwbrx r3, 0, r1
- eieio
- stwbrx r21, 0, r2
-
- addis r3, r0, 0x8000 /* ADDR_98 */
- ori r3, r3, 0x0098 /* EMEAR1 */
- stwbrx r3, 0, r1
- eieio
- stwbrx r24, 0, r2
-
- addis r3, r0, 0x8000 /* ADDR_A0 */
- ori r3, r3, 0x00a0 /* MBER */
- stwbrx r3, 0, r1
- eieio
- stwbrx r22, 0, r2
-
-/*
- * delay to let SDRAM go through several initialization/refresh cycles
- */
- lis r3, 3
- mtctr r3
-memStartWait_1:
- bdnz memStartWait_1
- eieio
-
-/*
- * set LEDs end
- */
- li r3, 0xf
- lis r30, CFG_USR_LED_BASE@h
- stb r3, 2(r30)
- sync
-
- mtlr r13
- blr /* EXIT board_asm_init ... */
-
-/*----------------------------------------------------------------------------*/
-/*
- * print a message to COM1 in polling mode (r10=COM1 port, r3=(char*)string)
- */
-
-Printf:
- lis r10, CFG_NS16550_COM1@h /* COM1 base address*/
- ori r10, r10, CFG_NS16550_COM1@l
-WaitChr:
- lbz r0, 5(r10) /* read link status */
- eieio
- andi. r0, r0, 0x40 /* mask transmitter empty bit */
- beq cr0, WaitChr /* wait till empty */
- lbzx r0, r0, r3 /* get char */
- stb r0, 0(r10) /* write to transmit reg */
- eieio
- addi r3, r3, 1 /* next char */
- lbzx r0, r0, r3 /* get char */
- cmpwi cr1, r0, 0 /* end of string ? */
- bne cr1, WaitChr
- blr
-
-/*
- * print a char to COM1 in polling mode (r10=COM1 port, r3=char)
- */
-OutChr:
- lis r10, CFG_NS16550_COM1@h /* COM1 base address*/
- ori r10, r10, CFG_NS16550_COM1@l
-OutChr1:
- lbz r0, 5(r10) /* read link status */
- eieio
- andi. r0, r0, 0x40 /* mask transmitter empty bit */
- beq cr0, OutChr1 /* wait till empty */
- stb r3, 0(r10) /* write to transmit reg */
- eieio
- blr
-
-/*
- * print 8/4/2 digits hex value to COM1 in polling mode (r10=COM1 port, r3=val)
- */
-OutHex2:
- li r9, 4 /* shift reg for 2 digits */
- b OHstart
-OutHex4:
- li r9, 12 /* shift reg for 4 digits */
- b OHstart
-OutHex:
- li r9, 28 /* shift reg for 8 digits */
-OHstart:
- lis r10, CFG_NS16550_COM1@h /* COM1 base address*/
- ori r10, r10, CFG_NS16550_COM1@l
-OutDig:
- lbz r0, 0(r29) /* slow down dummy read */
- lbz r0, 5(r10) /* read link status */
- eieio
- andi. r0, r0, 0x40 /* mask transmitter empty bit */
- beq cr0, OutDig
- sraw r0, r3, r9
- clrlwi r0, r0, 28
- cmpwi cr1, r0, 9
- ble cr1, digIsNum
- addic r0, r0, 55
- b nextDig
-digIsNum:
- addic r0, r0, 48
-nextDig:
- stb r0, 0(r10) /* write to transmit reg */
- eieio
- addic. r9, r9, -4
- bge OutDig
- blr
-
-/*
- * print 3 digits hdec value to COM1 in polling mode
- * (r10=COM1 port, r3=val, r7=x00, r8=x0, r9=x, r0, r6=scratch)
- */
-OutDec:
- li r6, 10
- divwu r0, r3, r6 /* r0 = r3 / 10, r9 = r3 mod 10 */
- mullw r10, r0, r6
- subf r9, r10, r3
- mr r3, r0
- divwu r0, r3, r6 /* r0 = r3 / 10, r8 = r3 mod 10 */
- mullw r10, r0, r6
- subf r8, r10, r3
- mr r3, r0
- divwu r0, r3, r6 /* r0 = r3 / 10, r7 = r3 mod 10 */
- mullw r10, r0, r6
- subf r7, r10, r3
- lis r10, CFG_NS16550_COM1@h /* COM1 base address*/
- ori r10, r10, CFG_NS16550_COM1@l
- or. r7, r7, r7
- bne noblank1
- li r3, 0x20
- b OutDec4
-noblank1:
- addi r3, r7, 48 /* convert to ASCII */
-OutDec4:
- lbz r0, 0(r29) /* slow down dummy read */
- lbz r0, 5(r10) /* read link status */
- eieio
- andi. r0, r0, 0x40 /* mask transmitter empty bit */
- beq cr0, OutDec4
- stb r3, 0(r10) /* x00 to transmit */
- eieio
- or. r7, r7, r8
- beq OutDec5
- addi r3, r8, 48 /* convert to ASCII */
-OutDec5:
- lbz r0, 0(r29) /* slow down dummy read */
- lbz r0, 5(r10) /* read link status */
- eieio
- andi. r0, r0, 0x40 /* mask transmitter empty bit */
- beq cr0, OutDec5
- stb r3, 0(r10) /* x0 to transmit */
- eieio
- addi r3, r9, 48 /* convert to ASCII */
-OutDec6:
- lbz r0, 0(r29) /* slow down dummy read */
- lbz r0, 5(r10) /* read link status */
- eieio
- andi. r0, r0, 0x40 /* mask transmitter empty bit */
- beq cr0, OutDec6
- stb r3, 0(r10) /* x to transmit */
- eieio
- blr
-
-/*
- * hang endless loop
- */
-toggleError: /* fail type in r6, r7=0xff, toggle LEDs */
- stb r7, 2(r30) /* r7 to LED */
- li r0, 0
- lis r9, 127
- ori r9, r9, 65535
-toggleError1:
- addic r0, r0, 1
- cmpw cr1, r0, r9
- ble cr1, toggleError1
- stb r6, 2(r30) /* r6 to LED */
- li r0, 0
- lis r9, 127
- ori r9, r9, 65535
-toggleError2:
- addic r0, r0, 1
- cmpw cr1, r0, r9
- ble cr1, toggleError2
- b toggleError
-
-/*
- * routines to read from ram spd
- */
-spdWaitIdle:
- lis r0, 0x1 /* timeout for about 100us */
- mtctr r0
-iSpd:
- lbz r10, 12(r14)
- andi. r10, r10, 0x20 /* mask and test MBB */
- beq idle
- bdnz iSpd
- orc. r10, r0, r0 /* return -1 to caller */
-idle:
- bclr 20, 0 /* return to caller */
-
-waitSpd:
- lis r0, 0x10 /* timeout for about 1.5ms */
- mtctr r0
-wSpd:
- lbz r10, 12(r14)
- andi. r10, r10, 0x82
- cmpli 0, 0, r10, 0x82 /* test MCF and MIF set */
- beq wend
- bdnz wSpd
- orc. r10, r0, r0 /* return -1 to caller */
- bclr 20, 0 /* return to caller */
-
-wend:
- li r10, 0
- stb r10, 12(r14) /* clear status */
- bclr 20, 0 /* return to caller */
-
-/*
- * spdread
- * in: r3 adr to read
- * out: r3 val or -1 for error
- * uses r10, assumes that r14 points to I2C controller
- */
-spdRead:
- mfspr r25, 8 /* save link register */
-
- bl spdWaitIdle
- bne spdErr
-
- li r10, 0x80 /* start with MEN */
- stb r10, 8(r14)
- eieio
-
- li r10, 0xb0 /* start as master */
- stb r10, 8(r14)
- eieio
-
- li r10, 0xa0 /* write device 0xA0 */
- stb r10, 16(r14)
- eieio
- bl waitSpd
- bne spdErr
-
- lbz r10, 12(r14) /* test ACK */
- andi. r10, r10, 0x01
- bne gotNoAck
-
- stb r3, 16(r14) /* data address */
- eieio
- bl waitSpd
- bne spdErr
-
-
- li r10, 0xb4 /* switch to read - restart */
- stb r10, 8(r14)
- eieio
-
- li r10, 0xa1 /* read device 0xA0 */
- stb r10, 16(r14)
- eieio
- bl waitSpd
- bne spdErr
-
- li r10, 0xa8 /* no ACK */
- stb r10, 8(r14)
- eieio
-
- lbz r10, 16(r14) /* trigger read next byte */
- eieio
- bl waitSpd
- bne spdErr
-
- li r10, 0x88 /* generate STOP condition */
- stb r10, 8(r14)
- eieio
-
- lbz r3, 16(r14) /* return read byte */
-
- mtspr 8, r25 /* restore link register */
- blr
-
-gotNoAck:
- li r10, 0x80 /* generate STOP condition */
- stb r10, 8(r14)
- eieio
-spdErr:
- orc r3, r0, r0 /* return -1 */
- mtspr 8, r25 /* restore link register */
- blr
-
-get_lnk_reg:
- mflr r3 /* return link reg */
- blr
-
-MessageBlock:
-
-MinitLogo:
- .ascii "\015\012*** ELTEC Elektronik, Mainz ***\015\012"
- .ascii "\015\012Initialising RAM\015\012\000"
-Mspd01:
- .ascii " Reading SPD of SODIMM ...... \000"
-MramTyp:
- .ascii "\015\012\SDRAM with CL=2 at 100 MHz required!\015\012\000"
-MramConfErr:
- .ascii "\015\012\Unsupported SODIMM Configuration!\015\012\000"
-Mactivate:
- .ascii " Activating \000"
-Mact0123e:
- .ascii " MByte.\015\012\000"
-Mok:
- .ascii "OK \015\012\000"
-Mfail:
- .ascii "FAILED \015\012\000"
-MnewLine:
- .ascii "\015\012\000"
- .align 4
diff --git a/board/eltec/elppc/config.mk b/board/eltec/elppc/config.mk
deleted file mode 100644
index aa463c5dc1..0000000000
--- a/board/eltec/elppc/config.mk
+++ /dev/null
@@ -1,26 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-TEXT_BASE = 0xFFF00000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE)
diff --git a/board/eltec/elppc/eepro100_srom.c b/board/eltec/elppc/eepro100_srom.c
deleted file mode 100644
index f021c50cd6..0000000000
--- a/board/eltec/elppc/eepro100_srom.c
+++ /dev/null
@@ -1,113 +0,0 @@
-/*
- * (C) Copyright 2002 ELTEC Elektronik AG
- * Frank Gottschling <fgottschling@eltec.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * Local network srom writing for first time run
- */
-
-/* includes */
-#include <common.h>
-#include <pci.h>
-#include <net.h>
-#include "srom.h"
-
-extern int eepro100_write_eeprom (struct eth_device* dev,
- int location, int addr_len, unsigned short data);
-
-/*----------------------------------------------------------------------------*/
-
-unsigned short eepro100_srom_checksum (unsigned short *sromdata)
-{
- unsigned short sum = 0;
- unsigned int i;
-
- for (i = 0; i < (EE_SIZE-1); i++)
- {
- sum += sromdata[i];
- }
- return (EE_CHECKSUM - sum);
-}
-
-/*----------------------------------------------------------------------------*/
-
-int eepro100_srom_store (unsigned short *source)
-{
- int count;
- struct eth_device onboard_dev;
-
- /* get onboard network iobase */
- pci_read_config_dword(PCI_BDF(0,0x10,0), PCI_BASE_ADDRESS_0,
- (unsigned int *)&onboard_dev.iobase);
- onboard_dev.iobase &= ~0xf;
-
- source[63] = eepro100_srom_checksum (source);
-
- for (count=0; count < EE_SIZE; count++)
- {
- if ( eepro100_write_eeprom ((struct eth_device*)&onboard_dev,
- count, EE_ADDR_BITS, SROM_SHORT(source)) == -1 )
- return -1;
- source++;
- }
- return 0;
-}
-
-/*----------------------------------------------------------------------------*/
-
-#ifdef EEPRO100_SROM_CHECK
-
-extern int read_eeprom (struct eth_device* dev, int location, int addr_len);
-
-void eepro100_srom_load (unsigned short *destination)
-{
- int count;
- struct eth_device onboard_dev;
-#ifdef DEBUG
- int lr = 0;
- printf ("eepro100_srom_download:\n");
-#endif
-
- /* get onboard network iobase */
- pci_read_config_dword(PCI_BDF(0,0x10,0), PCI_BASE_ADDRESS_0,
- &onboard_dev.iobase);
- onboard_dev.iobase &= ~0xf;
-
- memset (destination, 0x65, 128);
-
- for (count=0; count < 0x40; count++)
- {
- *destination++ = read_eeprom (struct eth_device*)&onboard_dev,
- count, EE_ADDR_BITS);
-#ifdef DEBUG
- printf ("%04x ", *(destination - 1));
- if (lr++ == 7)
- {
- printf("\n");
- lr = 0;
- }
-#endif
- }
-}
-#endif /* EEPRO100_SROM_CHECK */
-
-/*----------------------------------------------------------------------------*/
diff --git a/board/eltec/elppc/elppc.c b/board/eltec/elppc/elppc.c
deleted file mode 100644
index a9dbeb2095..0000000000
--- a/board/eltec/elppc/elppc.c
+++ /dev/null
@@ -1,174 +0,0 @@
-/*
- * (C) Copyright 2002 ELTEC Elektronik AG
- * Frank Gottschling <fgottschling@eltec.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <command.h>
-#include <mpc106.h>
-#include <video_fb.h>
-
-/* ------------------------------------------------------------------------- */
-
-int checkboard (void)
-{
- puts ("Board: ELTEC PowerPC\n");
- return (0);
-}
-
-/* ------------------------------------------------------------------------- */
-
-int checkflash (void)
-{
- /* TODO */
- printf ("Test not implemented !\n");
- return (0);
-}
-
-/* ------------------------------------------------------------------------- */
-
-static unsigned int mpc106_read_cfg_dword (unsigned int reg)
-{
- unsigned int reg_addr = MPC106_REG | (reg & 0xFFFFFFFC);
-
- out32r (MPC106_REG_ADDR, reg_addr);
-
- return (in32r (MPC106_REG_DATA | (reg & 0x3)));
-}
-
-/* ------------------------------------------------------------------------- */
-
-long int dram_size (int board_type)
-{
- /*
- * No actual initialisation to do - done when setting up
- * PICRs MCCRs ME/SARs etc in asm_init.S.
- */
-
- register unsigned long i, msar1, mear1, memSize;
-
-#if defined(CFG_MEMTEST)
- register unsigned long reg;
-
- printf ("Testing DRAM\n");
-
- /* write each mem addr with it's address */
- for (reg = CFG_MEMTEST_START; reg < CFG_MEMTEST_END; reg += 4)
- *reg = reg;
-
- for (reg = CFG_MEMTEST_START; reg < CFG_MEMTEST_END; reg += 4) {
- if (*reg != reg)
- return -1;
- }
-#endif
-
- /*
- * Since MPC107 memory controller chip has already been set to
- * control all memory, just read and interpret its memory boundery register.
- */
- memSize = 0;
- msar1 = mpc106_read_cfg_dword (MPC106_MSAR1);
- mear1 = mpc106_read_cfg_dword (MPC106_MEAR1);
- i = mpc106_read_cfg_dword (MPC106_MBER) & 0xf;
-
- do {
- if (i & 0x01) /* is bank enabled ? */
- memSize += (mear1 & 0xff) - (msar1 & 0xff) + 1;
- msar1 >>= 8;
- mear1 >>= 8;
- i >>= 1;
- } while (i);
-
- return (memSize * 0x100000);
-}
-
-/* ------------------------------------------------------------------------- */
-
-long int initdram (int board_type)
-{
- return dram_size (board_type);
-}
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * The BAB 911 can be reset by writing bit 0 of the Processor Initialization
- * Register PI in the MPC 107 (at offset 0x41090 of the Embedded Utilities
- * Memory Block).
- */
-int do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
-{
- out8 (MPC107_EUMB_PI, 1);
- return (0);
-}
-
-/* ------------------------------------------------------------------------- */
-
-#if defined(CONFIG_WATCHDOG)
-
-/*
- * Since the 7xx CPUs don't have an internal watchdog, this function is
- * board specific.
- */
-void watchdog_reset (void)
-{
-}
-#endif /* CONFIG_WATCHDOG */
-
-/* ------------------------------------------------------------------------- */
-
-void after_reloc (ulong dest_addr)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- /*
- * Jump to the main U-Boot board init code
- */
- board_init_r ((gd_t *)gd, dest_addr);
-}
-
-/* ------------------------------------------------------------------------- */
-
-#ifdef CONFIG_CONSOLE_EXTRA_INFO
-extern GraphicDevice smi;
-
-void video_get_info_str (int line_number, char *info)
-{
- /* init video info strings for graphic console */
- switch (line_number) {
- case 1:
- sprintf (info, " MPC7xx V%d.%d at %d / %d MHz",
- (get_pvr () >> 8) & 0xFF, get_pvr () & 0xFF, 400, 100);
- return;
- case 2:
- sprintf (info, " ELTEC ELPPC with %ld MB DRAM and %ld MB FLASH",
- dram_size (0) / 0x100000, flash_init () / 0x100000);
- return;
- case 3:
- sprintf (info, " %s", smi.modeIdent);
- return;
- }
-
- /* no more info lines */
- *info = 0;
- return;
-}
-#endif
diff --git a/board/eltec/elppc/flash.c b/board/eltec/elppc/flash.c
deleted file mode 100644
index 442dd00519..0000000000
--- a/board/eltec/elppc/flash.c
+++ /dev/null
@@ -1,512 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * 07-10-2002 Frank Gottschling: added 29F032 flash (ELPPC).
- * fixed monitor protection part
- *
- * 09-18-2001 Andreas Heppel: Reduced the code in here to the usage
- * of AMD's 29F040 and 29F016 flashes, since the BAB7xx does use
- * any other.
- */
-
-#include <common.h>
-#include <asm/processor.h>
-#include <asm/pci_io.h>
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-ulong flash_get_size (vu_long *addr, flash_info_t *info);
-static int write_word (flash_info_t *info, ulong dest, ulong data);
-
-/*flash command address offsets*/
-
-#define ADDR0 (0x555)
-#define ADDR1 (0x2AA)
-#define ADDR3 (0x001)
-
-#define FLASH_WORD_SIZE unsigned char
-
-/*----------------------------------------------------------------------------*/
-
-unsigned long flash_init (void)
-{
- unsigned long size1, size2;
- int i;
-
- /* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i)
- {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* initialise 1st flash */
- size1 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN)
- {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size1, size1<<20);
- }
-
- /* initialise 2nd flash */
- size2 = flash_get_size((vu_long *)FLASH_BASE1_PRELIM, &flash_info[1]);
-
- if (flash_info[1].flash_id == FLASH_UNKNOWN)
- {
- printf ("## Unknown FLASH on Bank 1 - Size = 0x%08lx = %ld MB\n",
- size2, size2<<20);
- }
-
- /* monitor protection ON by default */
- if (size1 == 512*1024)
- {
- (void)flash_protect(FLAG_PROTECT_SET,
- FLASH_BASE0_PRELIM,
- FLASH_BASE0_PRELIM+monitor_flash_len-1,
- &flash_info[0]);
- }
- if (size2 == 512*1024)
- {
- (void)flash_protect(FLAG_PROTECT_SET,
- FLASH_BASE1_PRELIM,
- FLASH_BASE1_PRELIM+monitor_flash_len-1,
- &flash_info[1]);
- }
- if (size2 == 4*1024*1024)
- {
- (void)flash_protect(FLAG_PROTECT_SET,
- CFG_FLASH_BASE,
- CFG_FLASH_BASE+monitor_flash_len-1,
- &flash_info[1]);
- }
-
- return (size1 + size2);
-}
-
-/*----------------------------------------------------------------------------*/
-
-void flash_print_info (flash_info_t *info)
-{
- int i;
- int k;
- int size;
- int erased;
- volatile unsigned long *flash;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- flash_init();
- }
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD:
- printf ("AMD ");
- break;
- default:
- printf ("Unknown Vendor ");
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case AMD_ID_F040B:
- printf ("AM29F040B (4 Mbit)\n");
- break;
- case AMD_ID_F016D:
- printf ("AM29F016D (16 Mbit)\n");
- break;
- case AMD_ID_F032B:
- printf ("AM29F032B (32 Mbit)\n");
- break;
- default:
- printf ("Unknown Chip Type\n");
- break;
- }
-
- if (info->size >= (1 << 20)) {
- printf (" Size: %ld MB in %d Sectors\n", info->size >> 20, info->sector_count);
- } else {
- printf (" Size: %ld kB in %d Sectors\n", info->size >> 10, info->sector_count);
- }
-
- printf (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
- /*
- * Check if whole sector is erased
- */
- if (i != (info->sector_count-1))
- size = info->start[i+1] - info->start[i];
- else
- size = info->start[0] + info->size - info->start[i];
-
- erased = 1;
- flash = (volatile unsigned long *)info->start[i];
- size = size >> 2; /* divide by 4 for longword access */
- for (k=0; k<size; k++) {
- if (*flash++ != 0xffffffff) {
- erased = 0;
- break;
- }
- }
-
- if ((i % 5) == 0)
- printf ("\n ");
-
- printf (" %08lX%s%s",
- info->start[i],
- erased ? " E" : " ",
- info->protect[i] ? "RO " : " ");
- }
- printf ("\n");
-}
-
-/*----------------------------------------------------------------------------*/
-/*
- * The following code cannot be run from FLASH!
- */
-ulong flash_get_size (vu_long *addr, flash_info_t *info)
-{
- short i;
- ulong vendor, devid;
- ulong base = (ulong)addr;
- volatile unsigned char *caddr = (unsigned char *)addr;
-
-#ifdef DEBUG
- printf("flash_get_size for address 0x%lx: \n", (unsigned long)caddr);
-#endif
-
- /* Write auto select command: read Manufacturer ID */
- caddr[0] = 0xF0; /* reset bank */
- udelay(10);
-
- eieio();
- caddr[0x555] = 0xAA;
- udelay(10);
- caddr[0x2AA] = 0x55;
- udelay(10);
- caddr[0x555] = 0x90;
-
- udelay(10);
-
- vendor = caddr[0];
- devid = caddr[1];
-
-#ifdef DEBUG
- printf("Manufacturer: 0x%lx\n", vendor);
-#endif
-
- vendor &= 0xff;
- devid &= 0xff;
-
- /* We accept only two AMD types */
- switch (vendor) {
- case (FLASH_WORD_SIZE)AMD_MANUFACT:
- info->flash_id = FLASH_MAN_AMD;
- break;
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- return (0); /* no or unknown flash */
- }
-
- switch (devid) {
- case (FLASH_WORD_SIZE)AMD_ID_F040B:
- info->flash_id |= AMD_ID_F040B;
- info->sector_count = 8;
- info->size = 0x00080000;
- break; /* => 0.5 MB */
-
- case (FLASH_WORD_SIZE)AMD_ID_F016D:
- info->flash_id |= AMD_ID_F016D;
- info->sector_count = 32;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case (FLASH_WORD_SIZE)AMD_ID_F032B:
- info->flash_id |= AMD_ID_F032B;
- info->sector_count = 64;
- info->size = 0x00400000;
- break; /* => 4 MB */
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- return (0); /* => no or unknown flash */
-
- }
-
-#ifdef DEBUG
- printf("flash id 0x%lx; sector count 0x%x, size 0x%lx\n", info->flash_id, info->sector_count, info->size);
-#endif
-
- /* check for protected sectors */
- for (i = 0; i < info->sector_count; i++) {
- /* sector base address */
- info->start[i] = base + i * (info->size / info->sector_count);
- /* read sector protection at sector address, (A7 .. A0) = 0x02 */
- /* D0 = 1 if protected */
- caddr = (volatile unsigned char *)(info->start[i]);
- info->protect[i] = caddr[2] & 1;
- }
-
- /*
- * Prevent writes to uninitialized FLASH.
- */
- if (info->flash_id != FLASH_UNKNOWN) {
- caddr = (volatile unsigned char *)info->start[0];
- caddr[0] = 0xF0; /* reset bank */
- }
-
- return (info->size);
-}
-
-/*----------------------------------------------------------------------------*/
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[0]);
- int flag, prot, sect, l_sect;
- ulong start, now, last;
- int rc = 0;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- if ((info->flash_id == FLASH_UNKNOWN) ||
- (info->flash_id > FLASH_AMD_COMP)) {
- printf ("Can't erase unknown flash type - aborted\n");
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- l_sect = -1;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
- addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
- addr[ADDR0] = (FLASH_WORD_SIZE)0x00800080;
- addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
- addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr = (FLASH_WORD_SIZE *)(info->start[sect]);
- if (info->flash_id & FLASH_MAN_SST) {
- addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
- addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
- addr[ADDR0] = (FLASH_WORD_SIZE)0x00800080;
- addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
- addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
- addr[0] = (FLASH_WORD_SIZE)0x00500050; /* block erase */
- udelay(30000); /* wait 30 ms */
- }
- else
- addr[0] = (FLASH_WORD_SIZE)0x00300030; /* sector erase */
- l_sect = sect;
- }
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- /*
- * We wait for the last triggered sector
- */
- if (l_sect < 0)
- goto DONE;
-
- start = get_timer (0);
- last = start;
- addr = (FLASH_WORD_SIZE *)(info->start[l_sect]);
- while ((addr[0] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080) {
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- return 1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- serial_putc ('.');
- last = now;
- }
- }
-
-DONE:
- /* reset to read mode */
- addr = (FLASH_WORD_SIZE *)info->start[0];
- addr[0] = (FLASH_WORD_SIZE)0x00F000F0; /* reset bank */
-
- printf (" done\n");
- return rc;
-}
-
-/*----------------------------------------------------------------------------*/
-/*
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int i, l, rc;
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
- for (; i<4 && cnt>0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = 0;
- for (i=0; i<4; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- return (write_word(info, wp, data));
-}
-
-/*----------------------------------------------------------------------------*/
-/* Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word (flash_info_t *info, ulong dest, ulong data)
-{
- volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *)(info->start[0]);
- volatile FLASH_WORD_SIZE *dest2 = (FLASH_WORD_SIZE *)dest;
- volatile FLASH_WORD_SIZE *data2 = (FLASH_WORD_SIZE *)&data;
- ulong start;
- int flag;
- int i;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*((volatile FLASH_WORD_SIZE *)dest) &
- (FLASH_WORD_SIZE)data) != (FLASH_WORD_SIZE)data) {
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- for (i=0; i<4/sizeof(FLASH_WORD_SIZE); i++)
- {
- addr2[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
- addr2[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
- addr2[ADDR0] = (FLASH_WORD_SIZE)0x00A000A0;
-
- dest2[i] = data2[i];
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* data polling for D7 */
- start = get_timer (0);
- while ((dest2[i] & (FLASH_WORD_SIZE)0x00800080) !=
- (data2[i] & (FLASH_WORD_SIZE)0x00800080)) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- return (1);
- }
- }
- }
-
- return (0);
-}
-
-/*----------------------------------------------------------------------------*/
diff --git a/board/eltec/elppc/misc.c b/board/eltec/elppc/misc.c
deleted file mode 100644
index 5fb20ae66c..0000000000
--- a/board/eltec/elppc/misc.c
+++ /dev/null
@@ -1,261 +0,0 @@
-/*
- * (C) Copyright 2002 ELTEC Elektronik AG
- * Frank Gottschling <fgottschling@eltec.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/* includes */
-#include <common.h>
-#include <linux/ctype.h>
-#include <pci.h>
-#include <net.h>
-#include "srom.h"
-
-/* imports */
-extern char console_buffer[CFG_CBSIZE];
-extern int l2_cache_enable (int l2control);
-extern int eepro100_write_eeprom (struct eth_device *dev, int location,
- int addr_len, unsigned short data);
-extern int read_eeprom (struct eth_device *dev, int location, int addr_len);
-
-/*----------------------------------------------------------------------------*/
-/*
- * read/write to nvram is only byte access
- */
-void *nvram_read (void *dest, const long src, size_t count)
-{
- uchar *d = (uchar *) dest;
- uchar *s = (uchar *) (CFG_ENV_MAP_ADRS + src);
-
- while (count--)
- *d++ = *s++;
-
- return dest;
-}
-
-void nvram_write (long dest, const void *src, size_t count)
-{
- uchar *d = (uchar *) (CFG_ENV_MAP_ADRS + dest);
- uchar *s = (uchar *) src;
-
- while (count--)
- *d++ = *s++;
-}
-
-/*----------------------------------------------------------------------------*/
-/*
- * handle sroms on ELPPC
- * fix ether address
- * set serial console as default
- */
-int misc_init_r (void)
-{
- revinfo eerev;
- u_char *ptr;
- u_int i, l, initSrom, copyNv;
- char buf[256];
- char hex[23] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 0, 0, 0,
- 0, 0, 0, 0, 10, 11, 12, 13, 14, 15
- };
-
- /* Clock setting for MPC107 i2c */
- mpc107_i2c_init (MPC107_EUMB_ADDR, 0x2b);
-
- /* Reset the EPIC */
- out32r (MPC107_EUMB_GCR, 0xa0000000);
- while (in32r (MPC107_EUMB_GCR) & 0x80000000); /* Wait for reset to complete */
- out32r (MPC107_EUMB_GCR, 0x20000000); /* Put into into mixed mode */
- while (in32r (MPC107_EUMB_IACKR) != 0xff); /* Clear all pending interrupts */
-
- /*
- * Check/Remake revision info
- */
- initSrom = 0;
- copyNv = 0;
-
- /* read out current revision srom contens */
- mpc107_srom_load (0x0000, (u_char *) & eerev, sizeof (revinfo),
- SECOND_DEVICE, FIRST_BLOCK);
-
- /* read out current nvram shadow image */
- nvram_read (buf, CFG_NV_SROM_COPY_ADDR, CFG_SROM_SIZE);
-
- if (strcmp (eerev.magic, "ELTEC") != 0) {
- /* srom is not initialized -> create a default revision info */
- for (i = 0, ptr = (u_char *) & eerev; i < sizeof (revinfo);
- i++)
- *ptr++ = 0x00;
- strcpy (eerev.magic, "ELTEC");
- eerev.revrev[0] = 1;
- eerev.revrev[1] = 0;
- eerev.size = 0x00E0;
- eerev.category[0] = 0x01;
-
- /* node id from dead e128 as default */
- eerev.etheraddr[0] = 0x00;
- eerev.etheraddr[1] = 0x00;
- eerev.etheraddr[2] = 0x5B;
- eerev.etheraddr[3] = 0x00;
- eerev.etheraddr[4] = 0x2E;
- eerev.etheraddr[5] = 0x4D;
-
- /* cache config word for ELPPC */
- *(int *) &eerev.res[0] = 0;
-
- initSrom = 1; /* force dialog */
- copyNv = 1; /* copy to nvram */
- }
-
- if ((copyNv == 0)
- && (el_srom_checksum ((u_char *) & eerev, CFG_SROM_SIZE) !=
- el_srom_checksum ((u_char *) buf, CFG_SROM_SIZE))) {
- printf ("Invalid revision info copy in nvram !\n");
- printf ("Press key:\n <c> to copy current revision info to nvram.\n");
- printf (" <r> to reenter revision info.\n");
- printf ("=> ");
- if (0 != readline (NULL)) {
- switch ((char) toupper (console_buffer[0])) {
- case 'C':
- copyNv = 1;
- break;
- case 'R':
- copyNv = 1;
- initSrom = 1;
- break;
- }
- }
- }
-
- if (initSrom) {
- memcpy (buf, &eerev.revision[0][0], 14); /* save all revision info */
- printf ("Enter revision number (0-9): %c ",
- eerev.revision[0][0]);
- if (0 != readline (NULL)) {
- eerev.revision[0][0] =
- (char) toupper (console_buffer[0]);
- memcpy (&eerev.revision[1][0], buf, 12); /* shift rest of rev info */
- }
-
- printf ("Enter revision character (A-Z): %c ",
- eerev.revision[0][1]);
- if (1 == readline (NULL)) {
- eerev.revision[0][1] =
- (char) toupper (console_buffer[0]);
- }
-
- printf ("Enter board name (V-XXXX-XXXX): %s ",
- (char *) &eerev.board);
- if (11 == readline (NULL)) {
- for (i = 0; i < 11; i++)
- eerev.board[i] =
- (char) toupper (console_buffer[i]);
- eerev.board[11] = '\0';
- }
-
- printf ("Enter serial number: %s ", (char *) &eerev.serial);
- if (6 == readline (NULL)) {
- for (i = 0; i < 6; i++)
- eerev.serial[i] = console_buffer[i];
- eerev.serial[6] = '\0';
- }
-
- printf ("Enter ether node ID with leading zero (HEX): %02x%02x%02x%02x%02x%02x ", eerev.etheraddr[0], eerev.etheraddr[1], eerev.etheraddr[2], eerev.etheraddr[3], eerev.etheraddr[4], eerev.etheraddr[5]);
- if (12 == readline (NULL)) {
- for (i = 0; i < 12; i += 2)
- eerev.etheraddr[i >> 1] =
- (char) (16 *
- hex[toupper
- (console_buffer[i]) -
- '0'] +
- hex[toupper
- (console_buffer[i + 1]) -
- '0']);
- }
-
- l = strlen ((char *) &eerev.text);
- printf ("Add to text section (max 64 chr): %s ",
- (char *) &eerev.text);
- if (0 != readline (NULL)) {
- for (i = l; i < 63; i++)
- eerev.text[i] = console_buffer[i - l];
- eerev.text[63] = '\0';
- }
-
- /* prepare network eeprom */
- memset (buf, 0, 128);
-
- buf[0] = eerev.etheraddr[1];
- buf[1] = eerev.etheraddr[0];
- buf[2] = eerev.etheraddr[3];
- buf[3] = eerev.etheraddr[2];
- buf[4] = eerev.etheraddr[5];
- buf[5] = eerev.etheraddr[4];
-
- *(unsigned short *) &buf[20] = 0x48B2;
- *(unsigned short *) &buf[22] = 0x0004;
- *(unsigned short *) &buf[24] = 0x1433;
-
- printf ("\nSRom: Writing i82559 info ........ ");
- if (eepro100_srom_store ((unsigned short *) buf) == -1)
- printf ("FAILED\n");
- else
- printf ("OK\n");
-
- /* update CRC */
- eerev.crc =
- el_srom_checksum ((u_char *) eerev.board, eerev.size);
-
- /* write new values */
- printf ("\nSRom: Writing revision info ...... ");
- if (mpc107_srom_store
- ((BLOCK_SIZE - sizeof (revinfo)), (u_char *) & eerev,
- sizeof (revinfo), SECOND_DEVICE, FIRST_BLOCK) == -1)
- printf ("FAILED\n\n");
- else
- printf ("OK\n\n");
-
- /* write new values as shadow image to nvram */
- nvram_write (CFG_NV_SROM_COPY_ADDR, (void *) &eerev,
- CFG_SROM_SIZE);
-
- }
-
- /*if (initSrom) */
- /* copy current values as shadow image to nvram */
- if (initSrom == 0 && copyNv == 1)
- nvram_write (CFG_NV_SROM_COPY_ADDR, (void *) &eerev,
- CFG_SROM_SIZE);
-
- /* update environment */
- sprintf (buf, "%02x:%02x:%02x:%02x:%02x:%02x",
- eerev.etheraddr[0], eerev.etheraddr[1],
- eerev.etheraddr[2], eerev.etheraddr[3],
- eerev.etheraddr[4], eerev.etheraddr[5]);
- setenv ("ethaddr", buf);
-
- /* print actual board identification */
- printf ("Ident: %s Ser %s Rev %c%c\n",
- eerev.board, (char *) &eerev.serial,
- eerev.revision[0][0], eerev.revision[0][1]);
-
- return (0);
-}
-
-/*----------------------------------------------------------------------------*/
diff --git a/board/eltec/elppc/mpc107_i2c.c b/board/eltec/elppc/mpc107_i2c.c
deleted file mode 100644
index ae6642e952..0000000000
--- a/board/eltec/elppc/mpc107_i2c.c
+++ /dev/null
@@ -1,320 +0,0 @@
-/*
- * (C) Copyright 2002 ELTEC Elektronik AG
- * Frank Gottschling <fgottschling@eltec.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/* includes */
-#include <common.h>
-#include "srom.h"
-
-/* locals */
-static unsigned long mpc107_eumb_addr = 0;
-
-/*----------------------------------------------------------------------------*/
-
-/*
- * calculate checksum for ELTEC revision srom
- */
-unsigned long el_srom_checksum (ptr, size)
-register unsigned char *ptr;
-unsigned long size;
-{
- u_long f, accu = 0;
- u_int i;
- u_char byte;
-
- for (; size; size--)
- {
- byte = *ptr++;
- for (i = 8; i; i--)
- {
- f = ((byte & 1) ^ (accu & 1)) ? 0x84083001 : 0;
- accu >>= 1; accu ^= f;
- byte >>= 1;
- }
- }
- return(accu);
-}
-
-/*----------------------------------------------------------------------------*/
-
-static int mpc107_i2c_wait ( unsigned long timeout )
-{
- unsigned long x;
-
- while (((x = in32r(MPC107_I2CSR)) & 0x82) != 0x82)
- {
- if (!timeout--)
- return -1;
- }
-
- if (x & 0x10)
- {
- return -1;
- }
- out32r(MPC107_I2CSR, 0);
-
- return 0;
-}
-
-/*----------------------------------------------------------------------------*/
-
-static int mpc107_i2c_wait_idle ( unsigned long timeout )
-{
- while (in32r(MPC107_I2CSR) & 0x20)
- {
- if (!timeout--)
- return -1;
- }
- return 0;
-}
-
-
-/*----------------------------------------------------------------------------*/
-
-int mpc107_i2c_read_byte (
- unsigned char device,
- unsigned char block,
- unsigned char offset )
-{
- unsigned long timeout = MPC107_I2C_TIMEOUT;
- int data;
-
- if (!mpc107_eumb_addr)
- return -6;
-
- mpc107_i2c_wait_idle (timeout);
-
- /* Start with MEN */
- out32r(MPC107_I2CCR, 0x80);
-
- /* Start as master */
- out32r(MPC107_I2CCR, 0xB0);
- out32r(MPC107_I2CDR, (0xA0 | device | block));
-
- if (mpc107_i2c_wait(timeout) < 0)
- {
- printf("mpc107_i2c_read Error 1\n");
- return -2;
- }
-
- if (in32r(MPC107_I2CSR)&0x1)
- {
- /* Generate STOP condition; device busy or not existing */
- out32r(MPC107_I2CCR, 0x80);
- return -1;
- }
-
- /* Data address */
- out32r(MPC107_I2CDR, offset);
-
- if (mpc107_i2c_wait(timeout) < 0)
- {
- printf("mpc107_i2c_read Error 2\n");
- return -3;
- }
-
- /* Switch to read - restart */
- out32r(MPC107_I2CCR, 0xB4);
- out32r(MPC107_I2CDR, (0xA1 | device | block));
-
- if (mpc107_i2c_wait(timeout) < 0)
- {
- printf("mpc107_i2c_read Error 3\n");
- return -4;
- }
-
- out32r(MPC107_I2CCR, 0xA8); /* no ACK */
- in32r(MPC107_I2CDR);
-
- if (mpc107_i2c_wait(timeout) < 0)
- {
- printf("mpc107_i2c_read Error 4\n");
- return -5;
- }
- /* Generate STOP condition */
- out32r(MPC107_I2CCR, 0x88);
-
- /* read */
- data = in32r(MPC107_I2CDR);
-
- return (data);
-}
-
-/*----------------------------------------------------------------------------*/
-
-int mpc107_i2c_write_byte (
- unsigned char device,
- unsigned char block,
- unsigned char offset,
- unsigned char val )
-{
-
- unsigned long timeout = MPC107_I2C_TIMEOUT;
-
- if (!mpc107_eumb_addr)
- return -6;
-
- mpc107_i2c_wait_idle(timeout);
-
- /* Start with MEN */
- out32r(MPC107_I2CCR, 0x80);
-
- /* Start as master */
- out32r(MPC107_I2CCR, 0xB0);
- out32r(MPC107_I2CDR, (0xA0 | device | block));
-
- if (mpc107_i2c_wait(timeout) < 0)
- {
- printf("mpc107_i2c_write Error 1\n");
- return -1;
- }
-
- /* Data address */
- out32r(MPC107_I2CDR, offset);
-
- if (mpc107_i2c_wait(timeout) < 0)
- {
- printf("mpc107_i2c_write Error 2\n");
- return -1;
- }
-
- /* Write */
- out32r(MPC107_I2CDR, val);
- if (mpc107_i2c_wait(timeout) < 0)
- {
- printf("mpc107_i2c_write Error 3\n");
- return -1;
- }
-
- /* Generate Stop Condition */
- out32r(MPC107_I2CCR, 0x80);
-
- /* Return ACK or no ACK */
- return (in32r(MPC107_I2CSR) & 0x01);
-}
-
-/*----------------------------------------------------------------------------*/
-
-int mpc107_srom_load (
- unsigned char addr,
- unsigned char *pBuf,
- int cnt,
- unsigned char device,
- unsigned char block )
-{
- register int i;
- int val;
- int timeout;
-
- for (i = 0; i < cnt; i++)
- {
- timeout=100;
- do
- {
- val = mpc107_i2c_read_byte (device, block, addr);
- if (val < -1)
- {
- printf("i2c_read_error %d at dev %x block %x addr %x\n",
- val, device, block, addr);
- return -1;
- }
- else if (timeout==0)
- {
- printf ("i2c_read_error: timeout at dev %x block %x addr %x\n",
- device, block, addr);
- return -1;
- }
- timeout--;
- } while (val == -1); /* if no ack: try again! */
-
- *pBuf++ = (unsigned char)val;
- addr++;
-
- if ((addr == 0) && (i != cnt-1)) /* is it the same block ? */
- {
- if (block == FIRST_BLOCK)
- block = SECOND_BLOCK;
- else
- {
- printf ("ic2_read_error: read beyond 2. block !\n");
- return -1;
- }
- }
- }
- udelay(100000);
- return (cnt);
-}
-
-/*----------------------------------------------------------------------------*/
-
-int mpc107_srom_store (
- unsigned char addr,
- unsigned char *pBuf,
- int cnt,
- unsigned char device,
- unsigned char block )
-{
- register int i;
-
- for (i = 0; i < cnt; i++)
- {
- while (mpc107_i2c_write_byte (device,block,addr,*pBuf) == 1);
- addr++;
- pBuf++;
-
- if ((addr == 0) && (i != cnt-1)) /* is it the same block ? */
- {
- if (block == FIRST_BLOCK)
- block = SECOND_BLOCK;
- else
- {
- printf ("ic2_write_error: write beyond 2. block !\n");
- return -1;
- }
- }
- }
- udelay(100000);
- return(cnt);
-}
-
-/*----------------------------------------------------------------------------*/
-
-int mpc107_i2c_init ( unsigned long eumb_addr, unsigned long divider )
-{
- unsigned long x;
-
- if (eumb_addr)
- mpc107_eumb_addr = eumb_addr;
- else
- return -1;
-
- /* Set I2C clock */
- x = in32r(MPC107_I2CFDR) & 0xffffff00;
- out32r(MPC107_I2CFDR, (x | divider));
-
- /* Clear arbitration */
- out32r(MPC107_I2CSR, 0);
-
- return mpc107_eumb_addr;
-}
-
-/*----------------------------------------------------------------------------*/
diff --git a/board/eltec/elppc/pci.c b/board/eltec/elppc/pci.c
deleted file mode 100644
index 5b115ea617..0000000000
--- a/board/eltec/elppc/pci.c
+++ /dev/null
@@ -1,97 +0,0 @@
-/*
- * (C) Copyright 2002 ELTEC Elektronik AG
- * Frank Gottschling <fgottschling@eltec.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * PCI initialisation for the MPC10x.
- */
-
-#include <common.h>
-#include <pci.h>
-#include <mpc106.h>
-
-#ifdef CONFIG_PCI
-
-struct pci_controller local_hose;
-
-void pci_init_board(void)
-{
- struct pci_controller* hose = (struct pci_controller *)&local_hose;
- u16 reg16;
-
- hose->first_busno = 0;
- hose->last_busno = 0xff;
-
- pci_set_region(hose->regions + 0,
- CFG_PCI_MEMORY_BUS,
- CFG_PCI_MEMORY_PHYS,
- CFG_PCI_MEMORY_SIZE,
- PCI_REGION_MEM | PCI_REGION_MEMORY);
-
- /* PCI memory space */
- pci_set_region(hose->regions + 1,
- CFG_PCI_MEM_BUS,
- CFG_PCI_MEM_PHYS,
- CFG_PCI_MEM_SIZE,
- PCI_REGION_MEM);
-
- /* ISA/PCI memory space */
- pci_set_region(hose->regions + 2,
- CFG_ISA_MEM_BUS,
- CFG_ISA_MEM_PHYS,
- CFG_ISA_MEM_SIZE,
- PCI_REGION_MEM);
-
- /* PCI I/O space */
- pci_set_region(hose->regions + 3,
- CFG_PCI_IO_BUS,
- CFG_PCI_IO_PHYS,
- CFG_PCI_IO_SIZE,
- PCI_REGION_IO);
-
- /* ISA/PCI I/O space */
- pci_set_region(hose->regions + 4,
- CFG_ISA_IO_BUS,
- CFG_ISA_IO_PHYS,
- CFG_ISA_IO_SIZE,
- PCI_REGION_IO);
-
- hose->region_count = 5;
-
- pci_setup_indirect(hose,
- MPC106_REG_ADDR,
- MPC106_REG_DATA);
-
- pci_register_hose(hose);
-
- hose->last_busno = pci_hose_scan(hose);
-
- /* Initialises the MPC10x PCI Configuration regs. */
- pci_read_config_word (PCI_BDF(0,0,0), PCI_COMMAND, &reg16);
- reg16 |= PCI_COMMAND_SERR | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
- pci_write_config_word(PCI_BDF(0,0,0), PCI_COMMAND, reg16);
-
- /* Clear non-reserved bits in status register */
- pci_write_config_word(PCI_BDF(0,0,0), PCI_STATUS, 0xffff);
-}
-
-#endif /* CONFIG_PCI */
diff --git a/board/eltec/elppc/srom.h b/board/eltec/elppc/srom.h
deleted file mode 100644
index c18ab91645..0000000000
--- a/board/eltec/elppc/srom.h
+++ /dev/null
@@ -1,102 +0,0 @@
-/*
- * (C) Copyright 2002 ELTEC Elektronik AG
- * Frank Gottschling <fgottschling@eltec.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/* common srom defs */
-#define FIRST_DEVICE 0x00
-#define SECOND_DEVICE 0x04
-#define FIRST_BLOCK 0x00
-#define SECOND_BLOCK 0x02
-#define BLOCK_SIZE 0x100
-#define ERROR (-1)
-
-#define CLK2P0TO1_1MB_PB_0P5DH 0x79000100
-#define CLK2P5TO1_1MB_PB_0P5DH 0x7B000100
-
-#define CPU_TYPE_740 0x08
-#define CPU_TYPE_750 0x08
-#define CPU_TYPE ((get_pvr()>>16)&0xffff)
-
-#define ABS(x) ((x<0)?-x:x)
-#define SROM_SHORT(pX) (*(u8 *)(pX) | *((u8 *)(pX)+1) << 8)
-
-/* bab7xx ELTEC srom */
-#define I2C_BUS_DAT (CFG_ISA_IO + 0x220)
-#define I2C_BUS_DIR (CFG_ISA_IO + 0x221)
-
-/* srom at mpc107 */
-#define MPC107_I2CADDR (mpc107_eumb_addr + 0x3000) /* address */
-#define MPC107_I2CFDR (mpc107_eumb_addr + 0x3004) /* freq divider */
-#define MPC107_I2CCR (mpc107_eumb_addr + 0x3008) /* control */
-#define MPC107_I2CSR (mpc107_eumb_addr + 0x300c) /* status */
-#define MPC107_I2CDR (mpc107_eumb_addr + 0x3010) /* data */
-#define MPC107_I2C_TIMEOUT 10000000
-
-/* i82559 */
-#define EE_ADDR_BITS 6
-#define EE_SIZE 0x40 /* 0x40 words */
-#define EE_CHECKSUM 0xBABA
-
-/* dc21143 */
-#define DEC_SROM_SIZE 128
-
-
-/*
- * structure of revision srom
- */
-typedef struct {
- char magic[8]; /* 000 - Magic number */
- char revrev[2]; /* 008 - Revision of structure */
- unsigned short size; /* 00A - Size of CRC area */
- unsigned long crc; /* 00C - CRC */
- char board[16]; /* 010 - Board Revision information */
- char option[4][16]; /* 020 - Option Revision information */
- char serial[8]; /* 060 - Board serial number */
- char etheraddr[6]; /* 068 - Ethernet node addresse */
- char reserved[2]; /* 06E - Reserved */
- char revision[7][2]; /* 070 - Revision codes */
- char category[2]; /* 07E - Category codes */
- char text[64]; /* 080 - Text field */
- char res[64]; /* 0C0 - Reserved */
-} revinfo;
-
-unsigned long el_srom_checksum (unsigned char *ptr, unsigned long size);
-int el_srom_load (unsigned char addr, unsigned char *buf, int cnt,
- unsigned char device, unsigned char block);
-int el_srom_store (unsigned char addr, unsigned char *buf, int cnt,
- unsigned char device, unsigned char block);
-
-int mpc107_i2c_init (unsigned long eumb_addr, unsigned long divider);
-int mpc107_i2c_read_byte (unsigned char device, unsigned char block, unsigned char offset);
-int mpc107_i2c_write_byte (unsigned char device, unsigned char block,
- unsigned char offset, unsigned char val);
-int mpc107_srom_load (unsigned char addr, unsigned char *pBuf, int cnt,
- unsigned char device, unsigned char block);
-int mpc107_srom_store (unsigned char addr, unsigned char *pBuf, int cnt,
- unsigned char device, unsigned char block);
-
-int dc_srom_load (unsigned short *dest);
-int dc_srom_store (unsigned short *src);
-
-unsigned short eepro100_srom_checksum (unsigned short *sromdata);
-void eepro100_srom_load (unsigned short *destination);
-int eepro100_srom_store (unsigned short *source);
diff --git a/board/eltec/elppc/u-boot.lds b/board/eltec/elppc/u-boot.lds
deleted file mode 100644
index d89eb6cff2..0000000000
--- a/board/eltec/elppc/u-boot.lds
+++ /dev/null
@@ -1,138 +0,0 @@
-/*
- * (C) Copyright 2001
- * Josh Huber <huber@mclx.com>, Mission Critical Linux, Inc.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * u-boot.lds - linker script for U-Boot on the Galileo Eval Board.
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/74xx_7xx/start.o (.text)
-
-/* store the environment in a seperate sector in the boot flash */
-/* . = env_offset; */
-/* common/environment.o(.text) */
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/eltec/mhpc/Makefile b/board/eltec/mhpc/Makefile
deleted file mode 100644
index 13ce9fc9d2..0000000000
--- a/board/eltec/mhpc/Makefile
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/eltec/mhpc/config.mk b/board/eltec/mhpc/config.mk
deleted file mode 100644
index 03934de3f6..0000000000
--- a/board/eltec/mhpc/config.mk
+++ /dev/null
@@ -1,33 +0,0 @@
-#
-# (C) Copyright 2000
-# Sysgo Real-Time Solutions, GmbH <www.elinos.com>
-# Marius Groeger <mgroeger@sysgo.de>
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# MHPC boards
-#
-
-TEXT_BASE = 0xfe000000
-/*TEXT_BASE = 0x00200000 */
diff --git a/board/eltec/mhpc/flash.c b/board/eltec/mhpc/flash.c
deleted file mode 100644
index 4cc66a973d..0000000000
--- a/board/eltec/mhpc/flash.c
+++ /dev/null
@@ -1,431 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-#include <linux/byteorder/swab.h>
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/*-----------------------------------------------------------------------
- * Protection Flags:
- */
-#define FLAG_PROTECT_SET 0x01
-#define FLAG_PROTECT_CLEAR 0x02
-
-/* Board support for 1 or 2 flash devices */
-#undef FLASH_PORT_WIDTH32
-#define FLASH_PORT_WIDTH16
-
-#ifdef FLASH_PORT_WIDTH16
-#define FLASH_PORT_WIDTH ushort
-#define FLASH_PORT_WIDTHV vu_short
-#define SWAP(x) __swab16(x)
-#else
-#define FLASH_PORT_WIDTH ulong
-#define FLASH_PORT_WIDTHV vu_long
-#define SWAP(x) __swab32(x)
-#endif
-
-#define FPW FLASH_PORT_WIDTH
-#define FPWV FLASH_PORT_WIDTHV
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (FPW *addr, flash_info_t *info);
-static int write_data (flash_info_t *info, ulong dest, FPW data);
-static void flash_get_offsets (ulong base, flash_info_t *info);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- unsigned long size_b0;
- int i;
-
- /* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* Static FLASH Bank configuration here - FIXME XXX */
- size_b0 = flash_get_size((FPW *)FLASH_BASE0_PRELIM, &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size_b0, size_b0<<20);
- }
-
- /* Remap FLASH according to real size */
- memctl->memc_or0 = CFG_OR_TIMING_FLASH | (-size_b0 & 0xFFFF8000);
- memctl->memc_br0 = (CFG_FLASH_BASE & BR_BA_MSK) | BR_PS_16 | BR_MS_GPCM | BR_V;
-
- /* Re-do sizing to get full correct info */
- size_b0 = flash_get_size((FPW *)CFG_FLASH_BASE, &flash_info[0]);
-
- flash_get_offsets (CFG_FLASH_BASE, &flash_info[0]);
-
- /* monitor protection ON by default */
- (void)flash_protect(FLAG_PROTECT_SET,
- CFG_FLASH_BASE,
- CFG_FLASH_BASE+monitor_flash_len-1,
- &flash_info[0]);
-
- flash_info[0].size = size_b0;
-
- return (size_b0);
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_get_offsets (ulong base, flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- return;
- }
-
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
- for (i = 0; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00020000);
- }
- }
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_INTEL: printf ("INTEL "); break;
- default: printf ("Unknown Vendor "); break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_28F640J5 :
- printf ("28F640J5 \n"); break;
- default: printf ("Unknown Chip Type=0x%lXh\n",
- info->flash_id & FLASH_TYPEMASK); break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " "
- );
- }
- printf ("\n");
-}
-
-/*-----------------------------------------------------------------------
- */
-
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-
-static ulong flash_get_size (FPW *addr, flash_info_t *info)
-{
- FPW value;
-
- /* Write auto select command: read Manufacturer ID */
- addr[0x5555] = (FPW)0xAA00AA00;
- addr[0x2AAA] = (FPW)0x55005500;
- addr[0x5555] = (FPW)0x90009000;
-
- value = SWAP(addr[0]);
-
- switch (value) {
- case (FPW)INTEL_MANUFACT:
- info->flash_id = FLASH_MAN_INTEL;
- break;
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- addr[0] = (FPW)0xFF00FF00; /* restore read mode */
- return (0); /* no or unknown flash */
- }
-
- value = SWAP(addr[1]); /* device ID no swap !*/
-
- switch (value) {
- case (FPW)INTEL_ID_28F640J5 :
- info->flash_id += FLASH_28F640J5 ;
- info->sector_count = 64;
- info->size = 0x00800000;
- break; /* => 8 MB */
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- break;
- }
-
- if (info->sector_count > CFG_MAX_FLASH_SECT) {
- printf ("** ERROR: sector count %d > max (%d) **\n",
- info->sector_count, CFG_MAX_FLASH_SECT);
- info->sector_count = CFG_MAX_FLASH_SECT;
- }
-
- addr[0] = (FPW)0xFF00FF00; /* restore read mode */
-
- return (info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- int flag, prot, sect;
- ulong type, start, now, last;
- int rc = 0;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- type = (info->flash_id & FLASH_VENDMASK);
- if ((type != FLASH_MAN_INTEL)) {
- printf ("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- start = get_timer (0);
- last = start;
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- FPWV *addr = (FPWV *)(info->start[sect]);
- FPW status;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- *addr = (FPW)0x50005000; /* clear status register */
- *addr = (FPW)0x20002000; /* erase setup */
- *addr = (FPW)0xD000D000; /* erase confirm */
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- while (((status = SWAP(*addr)) & (FPW)0x00800080) != (FPW)0x00800080) {
- if ((now=get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- *addr = (FPW)0xB000B000; /* suspend erase */
- *addr = (FPW)0xFF00FF00; /* reset to read mode */
- rc = 1;
- break;
- }
-
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- }
-
- *addr = (FPW)0xFF00FF00; /* reset to read mode */
- printf (" done\n");
- }
- }
- return rc;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- * 4 - Flash not identified
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp;
- FPW data;
- int count, i, l, rc, port_width;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- return 4;
- }
-/* get lower word aligned address */
-#ifdef FLASH_PORT_WIDTH16
- wp = (addr & ~1);
- port_width = 2;
-#else
- wp = (addr & ~3);
- port_width = 4;
-#endif
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
- for (; i<port_width && cnt>0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<port_width; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- if ((rc = write_data(info, wp, data)) != 0) {
- return (rc);
- }
- wp += port_width;
- }
-
- /*
- * handle word aligned part
- */
- count = 0;
- while (cnt >= port_width) {
- data = 0;
- for (i=0; i<port_width; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_data(info, wp, data)) != 0) {
- return (rc);
- }
- wp += port_width;
- cnt -= port_width;
- if ((wp & 0xfff) == 0)
- {
- printf("%08lX",wp);
- printf("\x1b[8D");
- }
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<port_width && cnt>0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i<port_width; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- return (write_data(info, wp, data));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word or halfword to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_data (flash_info_t *info, ulong dest, FPW data)
-{
- FPWV *addr = (FPWV *)dest;
- ulong status;
- ulong start;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*addr & data) != data) {
- printf("not erased at %08lx (%x)\n",(ulong)addr,*addr);
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- *addr = (FPW)0x40004000; /* write setup */
- *addr = data;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- start = get_timer (0);
-
- while (((status = SWAP(*addr)) & (FPW)0x00800080) != (FPW)0x00800080) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- *addr = (FPW)0xFF00FF00; /* restore read mode */
- return (1);
- }
- }
-
- *addr = (FPW)0xFF00FF00; /* restore read mode */
-
- return (0);
-}
diff --git a/board/eltec/mhpc/mhpc.c b/board/eltec/mhpc/mhpc.c
deleted file mode 100644
index 0ffbdf0e57..0000000000
--- a/board/eltec/mhpc/mhpc.c
+++ /dev/null
@@ -1,483 +0,0 @@
-/*
- * (C) Copyright 2001
- * ELTEC Elektronik AG
- * Frank Gottschling <fgottschling@eltec.de>
- *
- * Board specific routines for the miniHiPerCam
- *
- * - initialisation (eeprom)
- * - memory controller
- * - serial io initialisation
- * - ethernet io initialisation
- *
- * -----------------------------------------------------------------
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-#include <common.h>
-#include <linux/ctype.h>
-#include <commproc.h>
-#include "mpc8xx.h"
-#include <video_fb.h>
-
-/* imports from common/main.c */
-extern char console_buffer[CFG_CBSIZE];
-
-extern void eeprom_init (void);
-extern int eeprom_read (unsigned dev_addr, unsigned offset,
- unsigned char *buffer, unsigned cnt);
-extern int eeprom_write (unsigned dev_addr, unsigned offset,
- unsigned char *buffer, unsigned cnt);
-
-/* globals */
-void *video_hw_init (void);
-void video_set_lut (unsigned int index, /* color number */
- unsigned char r, /* red */
- unsigned char g, /* green */
- unsigned char b /* blue */
- );
-
-GraphicDevice gdev;
-
-/* locals */
-static void video_circle (char *center, int radius, int color, int pitch);
-static void video_test_image (void);
-static void video_default_lut (unsigned int clut_type);
-
-/* revision info foer MHPC EEPROM offset 480 */
-typedef struct {
- char board[12]; /* 000 - Board Revision information */
- char sensor; /* 012 - Sensor Type information */
- char serial[8]; /* 013 - Board serial number */
- char etheraddr[6]; /* 021 - Ethernet node addresse */
- char revision[2]; /* 027 - Revision code */
- char option[3]; /* 029 - resevered for options */
-} revinfo;
-
-/* ------------------------------------------------------------------------- */
-
-static const unsigned int sdram_table[] = {
- /* read single beat cycle */
- 0xef0efc04, 0x0e2dac04, 0x01ba5c04, 0x1ff5fc00,
- 0xfffffc05, 0xeffafc34, 0x0ff0bc34, 0x1ff57c35,
-
- /* read burst cycle */
- 0xef0efc04, 0x0e3dac04, 0x10ff5c04, 0xf0fffc00,
- 0xf0fffc00, 0xf1fffc00, 0xfffffc00, 0xfffffc05,
- 0xfffffc04, 0xfffffc04, 0xfffffc04, 0xfffffc04,
- 0xfffffc04, 0xfffffc04, 0xfffffc04, 0xfffffc04,
-
- /* write single beat cycle */
- 0xef0efc04, 0x0e29ac00, 0x01b25c04, 0x1ff5fc05,
- 0xfffffc04, 0xfffffc04, 0xfffffc04, 0xfffffc04,
-
- /* write burst cycle */
- 0xef0ef804, 0x0e39a000, 0x10f75000, 0xf0fff440,
- 0xf0fffc40, 0xf1fffc04, 0xfffffc05, 0xfffffc04,
- 0xfffffc04, 0xfffffc04, 0xfffffc04, 0xfffffc04,
- 0xfffffc04, 0xfffffc04, 0xfffffc04, 0xfffffc04,
-
- /* periodic timer expired */
- 0xeffebc84, 0x1ffd7c04, 0xfffffc04, 0xfffffc84,
- 0xeffebc04, 0x1ffd7c04, 0xfffffc04, 0xfffffc05,
- 0xfffffc04, 0xfffffc04, 0xfffffc04, 0xfffffc04,
-
- /* exception */
- 0xfffffc04, 0xfffffc05, 0xfffffc04, 0xfffffc04
-};
-
-/* ------------------------------------------------------------------------- */
-
-int board_early_init_f (void)
-{
- volatile immap_t *im = (immap_t *) CFG_IMMR;
- volatile cpm8xx_t *cp = &(im->im_cpm);
- volatile iop8xx_t *ip = (iop8xx_t *) & (im->im_ioport);
-
- /* reset the port A s.a. cpm-routines */
- ip->iop_padat = 0x0000;
- ip->iop_papar = 0x0000;
- ip->iop_padir = 0x0800;
- ip->iop_paodr = 0x0000;
-
- /* reset the port B for digital and LCD output */
- cp->cp_pbdat = 0x0300;
- cp->cp_pbpar = 0x5001;
- cp->cp_pbdir = 0x5301;
- cp->cp_pbodr = 0x0000;
-
- /* reset the port C configured for SMC1 serial port and aqc. control */
- ip->iop_pcdat = 0x0800;
- ip->iop_pcpar = 0x0000;
- ip->iop_pcdir = 0x0e30;
- ip->iop_pcso = 0x0000;
-
- /* Config port D for LCD output */
- ip->iop_pdpar = 0x1fff;
- ip->iop_pddir = 0x1fff;
-
- return (0);
-}
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Check Board Identity
- */
-int checkboard (void)
-{
- puts ("Board: ELTEC miniHiperCam\n");
- return (0);
-}
-
-/* ------------------------------------------------------------------------- */
-
-int misc_init_r (void)
-{
- revinfo mhpcRevInfo;
- char nid[32];
- char *mhpcSensorTypes[] = { "OMNIVISON OV7610/7620 color",
- "OMNIVISON OV7110 b&w", NULL
- };
- char hex[23] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 0, 0, 0,
- 0, 0, 0, 0, 10, 11, 12, 13, 14, 15
- };
- int i;
-
- /* check revision data */
- eeprom_read (CFG_I2C_EEPROM_ADDR, 480, (uchar *) &mhpcRevInfo, 32);
-
- if (strncmp ((char *) &mhpcRevInfo.board[2], "MHPC", 4) != 0) {
- printf ("Enter revision number (0-9): %c ",
- mhpcRevInfo.revision[0]);
- if (0 != readline (NULL)) {
- mhpcRevInfo.revision[0] =
- (char) toupper (console_buffer[0]);
- }
-
- printf ("Enter revision character (A-Z): %c ",
- mhpcRevInfo.revision[1]);
- if (1 == readline (NULL)) {
- mhpcRevInfo.revision[1] =
- (char) toupper (console_buffer[0]);
- }
-
- printf ("Enter board name (V-XXXX-XXXX): %s ",
- (char *) &mhpcRevInfo.board);
- if (11 == readline (NULL)) {
- for (i = 0; i < 11; i++) {
- mhpcRevInfo.board[i] =
- (char) toupper (console_buffer[i]);
- mhpcRevInfo.board[11] = '\0';
- }
- }
-
- printf ("Supported sensor types:\n");
- i = 0;
- do {
- printf ("\n \'%d\' : %s\n", i, mhpcSensorTypes[i]);
- } while (mhpcSensorTypes[++i] != NULL);
-
- do {
- printf ("\nEnter sensor number (0-255): %d ",
- (int) mhpcRevInfo.sensor);
- if (0 != readline (NULL)) {
- mhpcRevInfo.sensor =
- (unsigned char)
- simple_strtoul (console_buffer, NULL,
- 10);
- }
- } while (mhpcRevInfo.sensor >= i);
-
- printf ("Enter serial number: %s ",
- (char *) &mhpcRevInfo.serial);
- if (6 == readline (NULL)) {
- for (i = 0; i < 6; i++) {
- mhpcRevInfo.serial[i] = console_buffer[i];
- }
- mhpcRevInfo.serial[6] = '\0';
- }
-
- printf ("Enter ether node ID with leading zero (HEX): %02x%02x%02x%02x%02x%02x ", mhpcRevInfo.etheraddr[0], mhpcRevInfo.etheraddr[1], mhpcRevInfo.etheraddr[2], mhpcRevInfo.etheraddr[3], mhpcRevInfo.etheraddr[4], mhpcRevInfo.etheraddr[5]);
- if (12 == readline (NULL)) {
- for (i = 0; i < 12; i += 2) {
- mhpcRevInfo.etheraddr[i >> 1] =
- (char) (16 *
- hex[toupper
- (console_buffer[i]) -
- '0'] +
- hex[toupper
- (console_buffer[i + 1]) -
- '0']);
- }
- }
-
- /* setup new revision data */
- eeprom_write (CFG_I2C_EEPROM_ADDR, 480, (uchar *) &mhpcRevInfo,
- 32);
- }
-
- /* set environment */
- sprintf (nid, "%02x:%02x:%02x:%02x:%02x:%02x",
- mhpcRevInfo.etheraddr[0], mhpcRevInfo.etheraddr[1],
- mhpcRevInfo.etheraddr[2], mhpcRevInfo.etheraddr[3],
- mhpcRevInfo.etheraddr[4], mhpcRevInfo.etheraddr[5]);
- setenv ("ethaddr", nid);
-
- /* print actual board identification */
- printf ("Ident: %s %s Ser %s Rev %c%c\n",
- mhpcRevInfo.board,
- (mhpcRevInfo.sensor == 0 ? "color" : "b&w"),
- (char *) &mhpcRevInfo.serial, mhpcRevInfo.revision[0],
- mhpcRevInfo.revision[1]);
-
- return (0);
-}
-
-/* ------------------------------------------------------------------------- */
-
-long int initdram (int board_type)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
-
- upmconfig (UPMA, (uint *) sdram_table,
- sizeof (sdram_table) / sizeof (uint));
-
- memctl->memc_mamr = CFG_MAMR & (~(MAMR_PTAE)); /* no refresh yet */
- memctl->memc_mbmr = MBMR_GPL_B4DIS; /* should this be mamr? - NTL */
- memctl->memc_mptpr = MPTPR_PTP_DIV64;
- memctl->memc_mar = 0x00008800;
-
- /*
- * Map controller SDRAM bank 0
- */
- memctl->memc_or1 = CFG_OR1_PRELIM;
- memctl->memc_br1 = CFG_BR1_PRELIM;
- udelay (200);
-
- /*
- * Map controller SDRAM bank 1
- */
- memctl->memc_or2 = CFG_OR2;
- memctl->memc_br2 = CFG_BR2;
-
- /*
- * Perform SDRAM initializsation sequence
- */
- memctl->memc_mcr = 0x80002105; /* SDRAM bank 0 */
- udelay (1);
- memctl->memc_mcr = 0x80002730; /* SDRAM bank 0 - execute twice */
- udelay (1);
- memctl->memc_mamr |= MAMR_PTAE; /* enable refresh */
-
- udelay (10000);
-
- /* leave place for framebuffers */
- return (SDRAM_MAX_SIZE - SDRAM_RES_SIZE);
-}
-
-/* ------------------------------------------------------------------------- */
-
-static void video_circle (char *center, int radius, int color, int pitch)
-{
- int x, y, d, dE, dSE;
-
- x = 0;
- y = radius;
- d = 1 - radius;
- dE = 3;
- dSE = -2 * radius + 5;
-
- *(center + x + y * pitch) = color;
- *(center + y + x * pitch) = color;
- *(center + y - x * pitch) = color;
- *(center + x - y * pitch) = color;
- *(center - x - y * pitch) = color;
- *(center - y - x * pitch) = color;
- *(center - y + x * pitch) = color;
- *(center - x + y * pitch) = color;
- while (y > x) {
- if (d < 0) {
- d += dE;
- dE += 2;
- dSE += 2;
- x++;
- } else {
- d += dSE;
- dE += 2;
- dSE += 4;
- x++;
- y--;
- }
- *(center + x + y * pitch) = color;
- *(center + y + x * pitch) = color;
- *(center + y - x * pitch) = color;
- *(center + x - y * pitch) = color;
- *(center - x - y * pitch) = color;
- *(center - y - x * pitch) = color;
- *(center - y + x * pitch) = color;
- *(center - x + y * pitch) = color;
- }
-}
-
-/* ------------------------------------------------------------------------- */
-
-static void video_test_image (void)
-{
- char *di;
- int i, n;
-
- /* draw raster */
- for (i = 0; i < LCD_VIDEO_ROWS; i += 32) {
- memset ((char *) (LCD_VIDEO_ADDR + i * LCD_VIDEO_COLS),
- LCD_VIDEO_FG, LCD_VIDEO_COLS);
- for (n = i + 1; n < i + 32; n++)
- memset ((char *) (LCD_VIDEO_ADDR +
- n * LCD_VIDEO_COLS), LCD_VIDEO_BG,
- LCD_VIDEO_COLS);
- }
-
- for (i = 0; i < LCD_VIDEO_COLS; i += 32) {
- for (n = 0; n < LCD_VIDEO_ROWS; n++)
- *(char *) (LCD_VIDEO_ADDR + n * LCD_VIDEO_COLS + i) =
- LCD_VIDEO_FG;
- }
-
- /* draw gray bar */
- di = (char *) (LCD_VIDEO_ADDR + (LCD_VIDEO_COLS - 256) / 64 * 32 +
- 97 * LCD_VIDEO_COLS);
- for (n = 0; n < 63; n++) {
- for (i = 0; i < 256; i++) {
- *di++ = (char) i;
- *(di + LCD_VIDEO_COLS * 64) = (i & 1) * 255;
- }
- di += LCD_VIDEO_COLS - 256;
- }
-
- video_circle ((char *) LCD_VIDEO_ADDR + LCD_VIDEO_COLS / 2 +
- LCD_VIDEO_ROWS / 2 * LCD_VIDEO_COLS, LCD_VIDEO_ROWS / 2,
- LCD_VIDEO_FG, LCD_VIDEO_COLS);
-}
-
-/* ------------------------------------------------------------------------- */
-
-static void video_default_lut (unsigned int clut_type)
-{
- unsigned int i;
- unsigned char RGB[] = {
- 0x00, 0x00, 0x00, /* black */
- 0x80, 0x80, 0x80, /* gray */
- 0xff, 0x00, 0x00, /* red */
- 0x00, 0xff, 0x00, /* green */
- 0x00, 0x00, 0xff, /* blue */
- 0x00, 0xff, 0xff, /* cyan */
- 0xff, 0x00, 0xff, /* magenta */
- 0xff, 0xff, 0x00, /* yellow */
- 0x80, 0x00, 0x00, /* dark red */
- 0x00, 0x80, 0x00, /* dark green */
- 0x00, 0x00, 0x80, /* dark blue */
- 0x00, 0x80, 0x80, /* dark cyan */
- 0x80, 0x00, 0x80, /* dark magenta */
- 0x80, 0x80, 0x00, /* dark yellow */
- 0xc0, 0xc0, 0xc0, /* light gray */
- 0xff, 0xff, 0xff, /* white */
- };
-
- switch (clut_type) {
- case 1:
- for (i = 0; i < 240; i++)
- video_set_lut (i, i, i, i);
- for (i = 0; i < 16; i++)
- video_set_lut (i + 240, RGB[i * 3], RGB[i * 3 + 1],
- RGB[i * 3 + 2]);
- break;
- default:
- for (i = 0; i < 256; i++)
- video_set_lut (i, i, i, i);
- }
-}
-
-/* ------------------------------------------------------------------------- */
-
-void *video_hw_init (void)
-{
- unsigned int clut = 0;
- unsigned char *penv;
- immap_t *immr = (immap_t *) CFG_IMMR;
-
- /* enable video only on CLUT value */
- if ((penv = (uchar *)getenv ("clut")) != NULL)
- clut = (u_int) simple_strtoul ((char *)penv, NULL, 10);
- else
- return NULL;
-
- /* disable graphic before write LCD regs. */
- immr->im_lcd.lcd_lccr = 0x96000866;
-
- /* config LCD regs. */
- immr->im_lcd.lcd_lcfaa = LCD_VIDEO_ADDR;
- immr->im_lcd.lcd_lchcr = 0x010a0093;
- immr->im_lcd.lcd_lcvcr = 0x900f0024;
-
- printf ("Video: 640x480 8Bit Index Lut %s\n",
- (clut == 1 ? "240/16 (gray/vga)" : "256(gray)"));
-
- video_default_lut (clut);
-
- /* clear framebuffer */
- memset ((char *) (LCD_VIDEO_ADDR), LCD_VIDEO_BG,
- LCD_VIDEO_ROWS * LCD_VIDEO_COLS);
-
- /* enable graphic */
- immr->im_lcd.lcd_lccr = 0x96000867;
-
- /* fill in Graphic Device */
- gdev.frameAdrs = LCD_VIDEO_ADDR;
- gdev.winSizeX = LCD_VIDEO_COLS;
- gdev.winSizeY = LCD_VIDEO_ROWS;
- gdev.gdfBytesPP = 1;
- gdev.gdfIndex = GDF__8BIT_INDEX;
-
- if (clut > 1)
- /* return Graphic Device for console */
- return (void *) &gdev;
- else
- /* just graphic enabled - draw something beautiful */
- video_test_image ();
-
- return NULL; /* this disabels cfb - console */
-}
-
-/* ------------------------------------------------------------------------- */
-
-void video_set_lut (unsigned int index,
- unsigned char r, unsigned char g, unsigned char b)
-{
- unsigned int lum;
- unsigned short *pLut = (unsigned short *) (CFG_IMMR + 0x0e00);
-
- /* 16 bit lut values, 12 bit used, xxxx BBGG RRii iiii */
- /* y = 0.299*R + 0.587*G + 0.114*B */
- lum = (2990 * r + 5870 * g + 1140 * b) / 10000;
- pLut[index] =
- ((b & 0xc0) << 4) | ((g & 0xc0) << 2) | (r & 0xc0) | (lum &
- 0x3f);
-}
-
-/* ------------------------------------------------------------------------- */
diff --git a/board/eltec/mhpc/u-boot.lds b/board/eltec/mhpc/u-boot.lds
deleted file mode 100644
index 7099fc40de..0000000000
--- a/board/eltec/mhpc/u-boot.lds
+++ /dev/null
@@ -1,131 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc8xx/start.o (.text)
- common/environment.o(.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/eltec/mhpc/u-boot.lds.debug b/board/eltec/mhpc/u-boot.lds.debug
deleted file mode 100644
index 3165d56345..0000000000
--- a/board/eltec/mhpc/u-boot.lds.debug
+++ /dev/null
@@ -1,137 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc8xx/start.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
-
- . = env_offset;
- common/environment.o(.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/emk/common/am79c874.c b/board/emk/common/am79c874.c
deleted file mode 100644
index 552813e029..0000000000
--- a/board/emk/common/am79c874.c
+++ /dev/null
@@ -1,29 +0,0 @@
-/*
- * (C) Copyright 2003
- * Reinhard Meyer, EMK Elektronik GmbH, r.meyer@emk-elektronik.de
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-
-/*****************************************************************************
- * check fiber optic link present, and then copper link present. do auto switch
- * between both
- *****************************************************************************/
diff --git a/board/emk/common/flash.c b/board/emk/common/flash.c
deleted file mode 100644
index d6161bf358..0000000000
--- a/board/emk/common/flash.c
+++ /dev/null
@@ -1,591 +0,0 @@
-/*
- * (C) Copyright 2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2003
- * Reinhard Meyer, EMK Elektronik GmbH, r.meyer@emk-elektronik.de
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-#if defined (CONFIG_TOP860)
- typedef unsigned short FLASH_PORT_WIDTH;
- typedef volatile unsigned short FLASH_PORT_WIDTHV;
- #define FLASH_ID_MASK 0xFF
-
- #define FPW FLASH_PORT_WIDTH
- #define FPWV FLASH_PORT_WIDTHV
-
- #define FLASH_CYCLE1 0x0555
- #define FLASH_CYCLE2 0x02aa
- #define FLASH_ID1 0
- #define FLASH_ID2 1
- #define FLASH_ID3 0x0e
- #define FLASH_ID4 0x0F
-#endif
-
-#if defined (CONFIG_TOP5200) && !defined (CONFIG_LITE5200)
- typedef unsigned char FLASH_PORT_WIDTH;
- typedef volatile unsigned char FLASH_PORT_WIDTHV;
- #define FLASH_ID_MASK 0xFF
-
- #define FPW FLASH_PORT_WIDTH
- #define FPWV FLASH_PORT_WIDTHV
-
- #define FLASH_CYCLE1 0x0aaa
- #define FLASH_CYCLE2 0x0555
- #define FLASH_ID1 0
- #define FLASH_ID2 2
- #define FLASH_ID3 0x1c
- #define FLASH_ID4 0x1E
-#endif
-
-#if defined (CONFIG_TOP5200) && defined (CONFIG_LITE5200)
- typedef unsigned char FLASH_PORT_WIDTH;
- typedef volatile unsigned char FLASH_PORT_WIDTHV;
- #define FLASH_ID_MASK 0xFF
-
- #define FPW FLASH_PORT_WIDTH
- #define FPWV FLASH_PORT_WIDTHV
-
- #define FLASH_CYCLE1 0x0555
- #define FLASH_CYCLE2 0x02aa
- #define FLASH_ID1 0
- #define FLASH_ID2 1
- #define FLASH_ID3 0x0E
- #define FLASH_ID4 0x0F
-#endif
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size(FPWV *addr, flash_info_t *info);
-static void flash_reset(flash_info_t *info);
-static int write_word_amd(flash_info_t *info, FPWV *dest, FPW data);
-static flash_info_t *flash_get_info(ulong base);
-
-/*-----------------------------------------------------------------------
- * flash_init()
- *
- * sets up flash_info and returns size of FLASH (bytes)
- */
-unsigned long flash_init (void)
-{
- unsigned long size = 0;
- int i = 0;
- extern void flash_preinit(void);
- extern void flash_afterinit(uint, ulong, ulong);
- ulong flashbase = CFG_FLASH_BASE;
-
- flash_preinit();
-
- /* There is only ONE FLASH device */
- memset(&flash_info[i], 0, sizeof(flash_info_t));
- flash_info[i].size =
- flash_get_size((FPW *)flashbase, &flash_info[i]);
- size += flash_info[i].size;
-
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
- /* monitor protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+monitor_flash_len-1,
- flash_get_info(CFG_MONITOR_BASE));
-#endif
-
-#ifdef CFG_ENV_IS_IN_FLASH
- /* ENV protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR+CFG_ENV_SIZE-1,
- flash_get_info(CFG_ENV_ADDR));
-#endif
-
-
- flash_afterinit(i, flash_info[i].start[0], flash_info[i].size);
- return size ? size : 1;
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_reset(flash_info_t *info)
-{
- FPWV *base = (FPWV *)(info->start[0]);
-
- /* Put FLASH back in read mode */
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL)
- *base = (FPW)0x00FF00FF; /* Intel Read Mode */
- else if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD)
- *base = (FPW)0x00F000F0; /* AMD Read Mode */
-}
-
-/*-----------------------------------------------------------------------
- */
-
-static flash_info_t *flash_get_info(ulong base)
-{
- int i;
- flash_info_t * info;
-
- for (i = 0; i < CFG_MAX_FLASH_BANKS; i ++) {
- info = & flash_info[i];
- if (info->size &&
- info->start[0] <= base && base <= info->start[0] + info->size - 1)
- break;
- }
-
- return i == CFG_MAX_FLASH_BANKS ? 0 : info;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-void flash_print_info (flash_info_t *info)
-{
- int i;
- uchar *boottype;
- uchar *bootletter;
- char *fmt;
- uchar botbootletter[] = "B";
- uchar topbootletter[] = "T";
- uchar botboottype[] = "bottom boot sector";
- uchar topboottype[] = "top boot sector";
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD: printf ("AMD "); break;
-#if 0
- case FLASH_MAN_BM: printf ("BRIGHT MICRO "); break;
- case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
- case FLASH_MAN_SST: printf ("SST "); break;
- case FLASH_MAN_STM: printf ("STM "); break;
- case FLASH_MAN_INTEL: printf ("INTEL "); break;
-#endif
- default: printf ("Unknown Vendor "); break;
- }
-
- /* check for top or bottom boot, if it applies */
- if (info->flash_id & FLASH_BTYPE) {
- boottype = botboottype;
- bootletter = botbootletter;
- }
- else {
- boottype = topboottype;
- bootletter = topbootletter;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM160T:
- case FLASH_AM160B:
- fmt = "29LV160%s (16 Mbit, %s)\n";
- break;
- case FLASH_AMLV640U:
- fmt = "29LV640M (64 Mbit)\n";
- break;
- case FLASH_AMDLV065D:
- fmt = "29LV065D (64 Mbit)\n";
- break;
- case FLASH_AMLV256U:
- fmt = "29LV256M (256 Mbit)\n";
- break;
- default:
- fmt = "Unknown Chip Type\n";
- break;
- }
-
- printf (fmt, bootletter, boottype);
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20,
- info->sector_count);
-
- printf (" Sector Start Addresses:");
-
- for (i=0; i<info->sector_count; ++i) {
- ulong size;
- int erased;
- ulong *flash = (unsigned long *) info->start[i];
-
- if ((i % 5) == 0) {
- printf ("\n ");
- }
-
- /*
- * Check if whole sector is erased
- */
- size =
- (i != (info->sector_count - 1)) ?
- (info->start[i + 1] - info->start[i]) >> 2 :
- (info->start[0] + info->size - info->start[i]) >> 2;
-
- for (
- flash = (unsigned long *) info->start[i], erased = 1;
- (flash != (unsigned long *) info->start[i] + size) && erased;
- flash++
- )
- erased = *flash == ~0x0UL;
-
- printf (" %08lX %s %s",
- info->start[i],
- erased ? "E": " ",
- info->protect[i] ? "(RO)" : " ");
- }
-
- printf ("\n");
-}
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-
-ulong flash_get_size (FPWV *addr, flash_info_t *info)
-{
- int i;
-
- /* Write auto select command: read Manufacturer ID */
- /* Write auto select command sequence and test FLASH answer */
- addr[FLASH_CYCLE1] = (FPW)0x00AA00AA; /* for AMD, Intel ignores this */
- addr[FLASH_CYCLE2] = (FPW)0x00550055; /* for AMD, Intel ignores this */
- addr[FLASH_CYCLE1] = (FPW)0x00900090; /* selects Intel or AMD */
-
- /* The manufacturer codes are only 1 byte, so just use 1 byte.
- * This works for any bus width and any FLASH device width.
- */
- udelay(100);
- switch (addr[FLASH_ID1] & 0xff) {
-
- case (uchar)AMD_MANUFACT:
- info->flash_id = FLASH_MAN_AMD;
- break;
-
-#if 0
- case (uchar)INTEL_MANUFACT:
- info->flash_id = FLASH_MAN_INTEL;
- break;
-#endif
-
- default:
- printf ("unknown vendor=%x ", addr[FLASH_ID1] & 0xff);
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- break;
- }
-
- /* Check 16 bits or 32 bits of ID so work on 32 or 16 bit bus. */
- if (info->flash_id != FLASH_UNKNOWN) switch ((FPW)addr[FLASH_ID2]) {
-
- case (FPW)AMD_ID_LV160B:
- info->flash_id += FLASH_AM160B;
- info->sector_count = 35;
- info->size = 0x00200000;
- info->start[0] = (ulong)addr;
- info->start[1] = (ulong)addr + 0x4000;
- info->start[2] = (ulong)addr + 0x6000;
- info->start[3] = (ulong)addr + 0x8000;
- for (i = 4; i < info->sector_count; i++)
- {
- info->start[i] = (ulong)addr + 0x10000 * (i-3);
- }
- break;
-
- case (FPW)AMD_ID_LV065D:
- info->flash_id += FLASH_AMDLV065D;
- info->sector_count = 128;
- info->size = 0x00800000;
- for (i = 0; i < info->sector_count; i++)
- {
- info->start[i] = (ulong)addr + 0x10000 * i;
- }
- break;
-
- case (FPW)AMD_ID_MIRROR:
- /* MIRROR BIT FLASH, read more ID bytes */
- if ((FPW)addr[FLASH_ID3] == (FPW)AMD_ID_LV640U_2 &&
- (FPW)addr[FLASH_ID4] == (FPW)AMD_ID_LV640U_3)
- {
- info->flash_id += FLASH_AMLV640U;
- info->sector_count = 128;
- info->size = 0x00800000;
- for (i = 0; i < info->sector_count; i++)
- {
- info->start[i] = (ulong)addr + 0x10000 * i;
- }
- break;
- }
- if ((FPW)addr[FLASH_ID3] == (FPW)AMD_ID_LV256U_2 &&
- (FPW)addr[FLASH_ID4] == (FPW)AMD_ID_LV256U_3)
- {
- /* attention: only the first 16 MB will be used in u-boot */
- info->flash_id += FLASH_AMLV256U;
- info->sector_count = 256;
- info->size = 0x01000000;
- for (i = 0; i < info->sector_count; i++)
- {
- info->start[i] = (ulong)addr + 0x10000 * i;
- }
- break;
- }
-
- /* fall thru to here ! */
- default:
- printf ("unknown AMD device=%x %x %x",
- (FPW)addr[FLASH_ID2],
- (FPW)addr[FLASH_ID3],
- (FPW)addr[FLASH_ID4]);
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0x800000;
- break;
- }
-
- /* Put FLASH back in read mode */
- flash_reset(info);
-
- return (info->size);
-}
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- FPWV *addr;
- int flag, prot, sect;
- int intel = (info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL;
- ulong start, now, last;
- int rcode = 0;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM160B:
- case FLASH_AMLV640U:
- break;
- case FLASH_UNKNOWN:
- default:
- printf ("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- last = get_timer(0);
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last && rcode == 0; sect++) {
-
- if (info->protect[sect] != 0) /* protected, skip it */
- continue;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr = (FPWV *)(info->start[sect]);
- if (intel) {
- *addr = (FPW)0x00500050; /* clear status register */
- *addr = (FPW)0x00200020; /* erase setup */
- *addr = (FPW)0x00D000D0; /* erase confirm */
- }
- else {
- /* must be AMD style if not Intel */
- FPWV *base; /* first address in bank */
-
- base = (FPWV *)(info->start[0]);
- base[FLASH_CYCLE1] = (FPW)0x00AA00AA; /* unlock */
- base[FLASH_CYCLE2] = (FPW)0x00550055; /* unlock */
- base[FLASH_CYCLE1] = (FPW)0x00800080; /* erase mode */
- base[FLASH_CYCLE1] = (FPW)0x00AA00AA; /* unlock */
- base[FLASH_CYCLE2] = (FPW)0x00550055; /* unlock */
- *addr = (FPW)0x00300030; /* erase sector */
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- start = get_timer(0);
-
- /* wait at least 50us for AMD, 80us for Intel.
- * Let's wait 1 ms.
- */
- udelay (1000);
-
- while ((*addr & (FPW)0x00800080) != (FPW)0x00800080) {
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
-
- if (intel) {
- /* suspend erase */
- *addr = (FPW)0x00B000B0;
- }
-
- flash_reset(info); /* reset to read mode */
- rcode = 1; /* failed */
- break;
- }
-
- /* show that we're waiting */
- if ((get_timer(last)) > CFG_HZ) {/* every second */
- putc ('.');
- last = get_timer(0);
- }
- }
-
- /* show that we're waiting */
- if ((get_timer(last)) > CFG_HZ) { /* every second */
- putc ('.');
- last = get_timer(0);
- }
-
- flash_reset(info); /* reset to read mode */
- }
-
- printf (" done\n");
- return rcode;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- FPW data = 0; /* 16 or 32 bit word, matches flash bus width on MPC8XX */
- int bytes; /* number of bytes to program in current word */
- int left; /* number of bytes left to program */
- int i, res;
-
- for (left = cnt, res = 0;
- left > 0 && res == 0;
- addr += sizeof(data), left -= sizeof(data) - bytes) {
-
- bytes = addr & (sizeof(data) - 1);
- addr &= ~(sizeof(data) - 1);
-
- /* combine source and destination data so can program
- * an entire word of 16 or 32 bits
- */
- for (i = 0; i < sizeof(data); i++) {
- data <<= 8;
- if (i < bytes || i - bytes >= left )
- data += *((uchar *)addr + i);
- else
- data += *src++;
- }
-
- /* write one word to the flash */
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD:
- res = write_word_amd(info, (FPWV *)addr, data);
- break;
- default:
- /* unknown flash type, error! */
- printf ("missing or unknown FLASH type\n");
- res = 1; /* not really a timeout, but gives error */
- break;
- }
- }
-
- return (res);
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash for AMD FLASH
- * A word is 16 or 32 bits, whichever the bus width of the flash bank
- * (not an individual chip) is.
- *
- * returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word_amd (flash_info_t *info, FPWV *dest, FPW data)
-{
- ulong start;
- int flag;
- int res = 0; /* result, assume success */
- FPWV *base; /* first address in flash bank */
-
- /* Check if Flash is (sufficiently) erased */
- if ((*dest & data) != data) {
- return (2);
- }
-
-
- base = (FPWV *)(info->start[0]);
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- base[FLASH_CYCLE1] = (FPW)0x00AA00AA; /* unlock */
- base[FLASH_CYCLE2] = (FPW)0x00550055; /* unlock */
- base[FLASH_CYCLE1] = (FPW)0x00A000A0; /* selects program mode */
-
- *dest = data; /* start programming the data */
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- start = get_timer (0);
-
- /* data polling for D7 */
- while (res == 0 && (*dest & (FPW)0x00800080) != (data & (FPW)0x00800080)) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- *dest = (FPW)0x00F000F0; /* reset bank */
- res = 1;
- }
- }
-
- return (res);
-}
diff --git a/board/emk/common/vpd.c b/board/emk/common/vpd.c
deleted file mode 100644
index 8a3a12b047..0000000000
--- a/board/emk/common/vpd.c
+++ /dev/null
@@ -1,79 +0,0 @@
-/*
- * (C) Copyright 2003
- * Reinhard Meyer, EMK Elektronik GmbH, r.meyer@emk-elektronik.de
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-
-/*****************************************************************************
- * read "factory" part of EEPROM and set some environment variables
- *****************************************************************************/
-void read_factory_r (void)
-{
- /* read 'factory' part of EEPROM */
- uchar buf[81];
- uchar *p;
- uint length;
- uint addr;
- uint len;
-
- /* get length first */
- addr = CFG_FACT_OFFSET;
- if (eeprom_read (CFG_I2C_FACT_ADDR, addr, buf, 2)) {
- bailout:
- printf ("cannot read factory configuration\n");
- printf ("be sure to set ethaddr yourself!\n");
- return;
- }
- length = buf[0] + (buf[1] << 8);
- addr += 2;
-
- /* sanity check */
- if (length < 20 || length > CFG_FACT_SIZE - 2)
- goto bailout;
-
- /* read lines */
- while (length > 0) {
- /* read one line */
- len = length > 80 ? 80 : length;
- if (eeprom_read (CFG_I2C_FACT_ADDR, addr, buf, len))
- goto bailout;
- /* mark end of buffer */
- buf[len] = 0;
- /* search end of line */
- for (p = buf; *p && *p != 0x0a; p++);
- if (!*p)
- goto bailout;
- *p++ = 0;
- /* advance to next line start */
- length -= p - buf;
- addr += p - buf;
- /*printf ("%s\n", buf); */
- /* search for our specific entry */
- if (!strncmp ((char *) buf, "[RLA/lan/Ethernet] ", 19)) {
- setenv ("ethaddr", (char *)(buf + 19));
- } else if (!strncmp ((char *) buf, "[BOARD/SERIAL] ", 15)) {
- setenv ("serial#", (char *)(buf + 15));
- } else if (!strncmp ((char *) buf, "[BOARD/TYPE] ", 13)) {
- setenv ("board_id", (char *)(buf + 13));
- }
- }
-}
diff --git a/board/emk/top5200/Makefile b/board/emk/top5200/Makefile
deleted file mode 100644
index 986608bb11..0000000000
--- a/board/emk/top5200/Makefile
+++ /dev/null
@@ -1,47 +0,0 @@
-
-#
-# (C) Copyright 2003
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := $(BOARD).o ../common/flash.o ../common/vpd.o ../common/am79c874.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/emk/top5200/config.mk b/board/emk/top5200/config.mk
deleted file mode 100644
index 84131fef10..0000000000
--- a/board/emk/top5200/config.mk
+++ /dev/null
@@ -1,41 +0,0 @@
-#
-# (C) Copyright 2003
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# (C) Copyright 2003
-# Reinhard Meyer, EMK Elektronik GmbH, r.meyer@emk-elektronik.de
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# TOP5200 board, on optional MINI5200 and EVAL5200 boards
-#
-# allowed and functional TEXT_BASE values:
-#
-# 0xff000000 low boot at 0x00000100 (default board setting)
-# 0xfff00000 high boot at 0xfff00100 (board needs modification)
-# 0x00100000 RAM load and test
-#
-
-TEXT_BASE = 0xff000000
-#TEXT_BASE = 0xfff00000
-#TEXT_BASE = 0x00100000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
diff --git a/board/emk/top5200/top5200.c b/board/emk/top5200/top5200.c
deleted file mode 100644
index 4508438ca3..0000000000
--- a/board/emk/top5200/top5200.c
+++ /dev/null
@@ -1,210 +0,0 @@
-/*
- * (C) Copyright 2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2003
- * Reinhard Meyer, EMK Elektronik GmbH, r.meyer@emk-elektronik.de
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc5xxx.h>
-#include <pci.h>
-
-/*****************************************************************************
- * initialize SDRAM/DDRAM controller.
- * TBD: get data from I2C EEPROM
- *****************************************************************************/
-long int initdram (int board_type)
-{
- ulong dramsize = 0;
-#ifndef CFG_RAMBOOT
-#if 0
- ulong t;
- ulong tap_del;
-#endif
-
- #define MODE_EN 0x80000000
- #define SOFT_PRE 2
- #define SOFT_REF 4
-
- /* configure SDRAM start/end */
- *(vu_long *)MPC5XXX_SDRAM_CS0CFG = (CFG_SDRAM_BASE & 0xFFF00000) | CFG_DRAM_RAM_SIZE;
- *(vu_long *)MPC5XXX_SDRAM_CS1CFG = 0x80000000; /* disabled */
-
- /* setup config registers */
- *(vu_long *)MPC5XXX_SDRAM_CONFIG1 = CFG_DRAM_CONFIG1;
- *(vu_long *)MPC5XXX_SDRAM_CONFIG2 = CFG_DRAM_CONFIG2;
-
- /* unlock mode register */
- *(vu_long *)MPC5XXX_SDRAM_CTRL = CFG_DRAM_CONTROL | MODE_EN;
- /* precharge all banks */
- *(vu_long *)MPC5XXX_SDRAM_CTRL = CFG_DRAM_CONTROL | MODE_EN | SOFT_PRE;
-#ifdef CFG_DRAM_DDR
- /* set extended mode register */
- *(vu_short *)MPC5XXX_SDRAM_MODE = CFG_DRAM_EMODE;
-#endif
- /* set mode register */
- *(vu_short *)MPC5XXX_SDRAM_MODE = CFG_DRAM_MODE | 0x0400;
- /* precharge all banks */
- *(vu_long *)MPC5XXX_SDRAM_CTRL = CFG_DRAM_CONTROL | MODE_EN | SOFT_PRE;
- /* auto refresh */
- *(vu_long *)MPC5XXX_SDRAM_CTRL = CFG_DRAM_CONTROL | MODE_EN | SOFT_REF;
- /* set mode register */
- *(vu_short *)MPC5XXX_SDRAM_MODE = CFG_DRAM_MODE;
- /* normal operation */
- *(vu_long *)MPC5XXX_SDRAM_CTRL = CFG_DRAM_CONTROL;
- /* write default TAP delay */
- *(vu_long *)MPC5XXX_CDM_PORCFG = CFG_DRAM_TAP_DEL << 24;
-
-#if 0
- for (tap_del = 0; tap_del < 32; tap_del++)
- {
- *(vu_long *)MPC5XXX_CDM_PORCFG = tap_del << 24;
-
- printf ("\nTAP Delay:%x Filling DRAM...", *(vu_long *)MPC5XXX_CDM_PORCFG);
- for (t = 0; t < 0x04000000; t+=4)
- *(vu_long *) t = t;
- printf ("Checking DRAM...\n");
- for (t = 0; t < 0x04000000; t+=4)
- {
- ulong rval = *(vu_long *) t;
- if (rval != t)
- {
- printf ("mismatch at %x: ", t);
- printf (" 1.read %x", rval);
- printf (" 2.read %x", *(vu_long *) t);
- printf (" 3.read %x", *(vu_long *) t);
- break;
- }
- }
- }
-#endif
-#endif /* CFG_RAMBOOT */
-
- dramsize = ((1 << (*(vu_long *)MPC5XXX_SDRAM_CS0CFG - 0x13)) << 20);
-
- /* return total ram size */
- return dramsize;
-}
-
-/*****************************************************************************
- * print board identification
- *****************************************************************************/
-int checkboard (void)
-{
-#if defined (CONFIG_EVAL5200)
- puts ("Board: EMK TOP5200 on EVAL5200\n");
-#else
-#if defined (CONFIG_LITE5200)
- puts ("Board: LITE5200\n");
-#else
-#if defined (CONFIG_MINI5200)
- puts ("Board: EMK TOP5200 on MINI5200\n");
-#else
- puts ("Board: EMK TOP5200\n");
-#endif
-#endif
-#endif
- return 0;
-}
-
-/*****************************************************************************
- * prepare for FLASH detection
- *****************************************************************************/
-void flash_preinit(void)
-{
- /*
- * Now, when we are in RAM, enable flash write
- * access for detection process.
- * Note that CS_BOOT cannot be cleared when
- * executing in flash.
- */
- *(vu_long *)MPC5XXX_BOOTCS_CFG &= ~0x1; /* clear RO */
-}
-
-/*****************************************************************************
- * finalize FLASH setup
- *****************************************************************************/
-void flash_afterinit(uint bank, ulong start, ulong size)
-{
- if (bank == 0) { /* adjust mapping */
- *(vu_long *)MPC5XXX_BOOTCS_START =
- *(vu_long *)MPC5XXX_CS0_START = START_REG(start);
- *(vu_long *)MPC5XXX_BOOTCS_STOP =
- *(vu_long *)MPC5XXX_CS0_STOP = STOP_REG(start, size);
- }
-}
-
-/*****************************************************************************
- * otherinits after RAM is there and we are relocated to RAM
- * note: though this is an int function, nobody cares for the result!
- *****************************************************************************/
-int misc_init_r (void)
-{
-#if !defined (CONFIG_LITE5200)
- /* read 'factory' part of EEPROM */
- extern void read_factory_r (void);
- read_factory_r ();
-#endif
- return (0);
-}
-
-/*****************************************************************************
- * initialize the PCI system
- *****************************************************************************/
-#ifdef CONFIG_PCI
-static struct pci_controller hose;
-
-extern void pci_mpc5xxx_init(struct pci_controller *);
-
-void pci_init_board(void)
-{
- pci_mpc5xxx_init(&hose);
-}
-#endif
-
-/*****************************************************************************
- * provide the IDE Reset Function
- *****************************************************************************/
-#if defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET)
-
-#define GPIO_PSC1_4 0x01000000UL
-
-void init_ide_reset (void)
-{
- debug ("init_ide_reset\n");
-
- /* Configure PSC1_4 as GPIO output for ATA reset */
- *(vu_long *) MPC5XXX_WU_GPIO_ENABLE |= GPIO_PSC1_4;
- *(vu_long *) MPC5XXX_WU_GPIO_DIR |= GPIO_PSC1_4;
-}
-
-void ide_set_reset (int idereset)
-{
- debug ("ide_reset(%d)\n", idereset);
-
- if (idereset) {
- *(vu_long *) MPC5XXX_WU_GPIO_DATA &= ~GPIO_PSC1_4;
- } else {
- *(vu_long *) MPC5XXX_WU_GPIO_DATA |= GPIO_PSC1_4;
- }
-}
-#endif /* defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET) */
diff --git a/board/emk/top5200/u-boot.lds b/board/emk/top5200/u-boot.lds
deleted file mode 100644
index f23432ecfa..0000000000
--- a/board/emk/top5200/u-boot.lds
+++ /dev/null
@@ -1,125 +0,0 @@
-/*
- * (C) Copyright 2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc5xxx/start.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/emk/top860/Makefile b/board/emk/top860/Makefile
deleted file mode 100644
index a74dd2fa2b..0000000000
--- a/board/emk/top860/Makefile
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o ../common/flash.o ../common/vpd.o ../common/am79c874.o
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/emk/top860/config.mk b/board/emk/top860/config.mk
deleted file mode 100644
index 7b940cb813..0000000000
--- a/board/emk/top860/config.mk
+++ /dev/null
@@ -1,28 +0,0 @@
-#
-# (C) Copyright 2003
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# TOP860 board
-#
-
-TEXT_BASE = 0x80000000
diff --git a/board/emk/top860/top860.c b/board/emk/top860/top860.c
deleted file mode 100644
index 84afaaa2b2..0000000000
--- a/board/emk/top860/top860.c
+++ /dev/null
@@ -1,147 +0,0 @@
-/*
- * (C) Copyright 2003
- * EMK Elektronik GmbH <www.emk-elektronik.de>
- * Reinhard Meyer <r.meyer@emk-elektronik.de>
- *
- * Board specific routines for the TOP860
- *
- * - initialisation
- * - interface to VPD data (mac address, clock speeds)
- * - memory controller
- * - serial io initialisation
- * - ethernet io initialisation
- *
- * -----------------------------------------------------------------
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <commproc.h>
-#include <mpc8xx.h>
-
-/*****************************************************************************
- * UPM table for 60ns EDO RAM at 25 MHz bus/external clock
- *****************************************************************************/
-static const uint edo_60ns_25MHz_tbl[] = {
-
-/* single read (offset 0x00 in upm ram) */
- 0x0ff3fc04,0x08f3fc04,0x00f3fc04,0x00f3fc00,
- 0x33f7fc07,0xfffffc05,0xfffffc05,0xfffffc05,
-/* burst read (offset 0x08 in upm ram) */
- 0x0ff3fc04,0x08f3fc04,0x00f3fc0c,0x0ff3fc40,
- 0x0cf3fc04,0x03f3fc48,0x0cf3fc04,0x03f3fc48,
- 0x0cf3fc04,0x03f3fc00,0x3ff7fc07,0xfffffc05,
- 0xfffffc05,0xfffffc05,0xfffffc05,0xfffffc05,
-/* single write (offset 0x18 in upm ram) */
- 0x0ffffc04,0x08fffc04,0x30fffc00,0xf1fffc07,
- 0xfffffc05,0xfffffc05,0xfffffc05,0xfffffc05,
-/* burst write (offset 0x20 in upm ram) */
- 0x0ffffc04,0x08fffc00,0x00fffc04,0x03fffc4c,
- 0x00fffc00,0x07fffc4c,0x00fffc00,0x0ffffc4c,
- 0x00fffc00,0x3ffffc07,0xfffffc05,0xfffffc05,
- 0xfffffc05,0xfffffc05,0xfffffc05,0xfffffc05,
-/* refresh (offset 0x30 in upm ram) */
- 0xc0fffc04,0x07fffc04,0x0ffffc04,0x0ffffc04,
- 0xfffffc05,0xfffffc05,0xfffffc05,0xfffffc05,
- 0xfffffc05,0xfffffc05,0xfffffc05,0xfffffc05,
-/* exception (offset 0x3C in upm ram) */
- 0xfffffc07,0xfffffc03,0xfffffc05,0xfffffc05,
-};
-
-/*****************************************************************************
- * Print Board Identity
- *****************************************************************************/
-int checkboard (void)
-{
- puts ("Board:"CONFIG_IDENT_STRING"\n");
- return (0);
-}
-
-/*****************************************************************************
- * Initialize DRAM controller
- *****************************************************************************/
-long int initdram (int board_type)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
-
- /*
- * Only initialize memory controller when running from FLASH.
- * When running from RAM, don't touch it.
- */
- if ((ulong) initdram & 0xff000000) {
- volatile uint *addr1, *addr2;
- uint i, j;
-
- upmconfig (UPMA, (uint *) edo_60ns_25MHz_tbl,
- sizeof (edo_60ns_25MHz_tbl) / sizeof (uint));
- memctl->memc_mptpr = 0x0200;
- memctl->memc_mamr = 0x0ca20330;
- memctl->memc_or2 = -CFG_DRAM_MAX | OR_CSNT_SAM;
- memctl->memc_br2 = CFG_DRAM_BASE | BR_MS_UPMA | BR_V;
- /*
- * Do 8 read accesses to DRAM
- */
- addr1 = (volatile uint *) 0;
- addr2 = (volatile uint *) 0x00400000;
- for (i = 0, j = 0; i < 8; i++)
- j = addr1[0];
-
- /*
- * Now check whether we got 4MB or 16MB populated
- */
- addr1[0] = 0x12345678;
- addr1[1] = 0x9abcdef0;
- addr2[0] = 0xfeedc0de;
- addr2[1] = 0x47110815;
- if (addr1[0] == 0xfeedc0de && addr1[1] == 0x47110815) {
- /* only 4MB populated */
- memctl->memc_or2 = -(CFG_DRAM_MAX / 4) | OR_CSNT_SAM;
- }
- }
-
- return -(memctl->memc_or2 & 0xffff0000);
-}
-
-/*****************************************************************************
- * prepare for FLASH detection
- *****************************************************************************/
-void flash_preinit(void)
-{
-}
-
-/*****************************************************************************
- * finalize FLASH setup
- *****************************************************************************/
-void flash_afterinit(uint bank, ulong start, ulong size)
-{
-}
-
-/*****************************************************************************
- * otherinits after RAM is there and we are relocated to RAM
- * note: though this is an int function, nobody cares for the result!
- *****************************************************************************/
-int misc_init_r (void)
-{
- /* read 'factory' part of EEPROM */
- extern void read_factory_r (void);
- read_factory_r ();
-
- return (0);
-}
diff --git a/board/emk/top860/u-boot.lds b/board/emk/top860/u-boot.lds
deleted file mode 100644
index b3747e4242..0000000000
--- a/board/emk/top860/u-boot.lds
+++ /dev/null
@@ -1,131 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc8xx/start.o (.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/emk/top860/u-boot.lds.debug b/board/emk/top860/u-boot.lds.debug
deleted file mode 100644
index 580575a5a2..0000000000
--- a/board/emk/top860/u-boot.lds.debug
+++ /dev/null
@@ -1,133 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc8xx/start.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/extable.o (.text)
-
- . = env_offset;
- common/environment.o(.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/ep7312/Makefile b/board/ep7312/Makefile
deleted file mode 100644
index c53a3c7a0d..0000000000
--- a/board/ep7312/Makefile
+++ /dev/null
@@ -1,48 +0,0 @@
-#
-# (C) Copyright 2002
-# Sysgo Real-Time Solutions, GmbH <www.elinos.com>
-# Marius Groeger <mgroeger@sysgo.de>
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := ep7312.o flash.o
-SOBJS := lowlevel_init.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS) $(SOBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/ep7312/config.mk b/board/ep7312/config.mk
deleted file mode 100644
index 0ae16a2efe..0000000000
--- a/board/ep7312/config.mk
+++ /dev/null
@@ -1,28 +0,0 @@
-#
-# (C) Copyright 2000
-# Sysgo Real-Time Solutions, GmbH <www.elinos.com>
-# Marius Groeger <mgroeger@sysgo.de>
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-TEXT_BASE = 0xc0f80000
diff --git a/board/ep7312/ep7312.c b/board/ep7312/ep7312.c
deleted file mode 100644
index 11eab234bc..0000000000
--- a/board/ep7312/ep7312.c
+++ /dev/null
@@ -1,59 +0,0 @@
-/*
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <clps7111.h>
-
-/* ------------------------------------------------------------------------- */
-
-
-/*
- * Miscelaneous platform dependent initialisations
- */
-
-int board_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- /* Activate LED flasher */
- IO_LEDFLSH = 0x40;
-
- /* arch number MACH_TYPE_EDB7312 */
- gd->bd->bi_arch_number = MACH_TYPE_EDB7312;
-
- /* location of boot parameters */
- gd->bd->bi_boot_params = 0xc0020100;
-
- return 0;
-}
-
-int dram_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
-
- return (0);
-}
diff --git a/board/ep7312/flash.c b/board/ep7312/flash.c
deleted file mode 100644
index 272a9e5cce..0000000000
--- a/board/ep7312/flash.c
+++ /dev/null
@@ -1,341 +0,0 @@
-/*
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-
-#define FLASH_BANK_SIZE 0x1000000
-#define MAIN_SECT_SIZE 0x20000
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
-
-
-/*-----------------------------------------------------------------------
- */
-
-ulong flash_init (void)
-{
- int i, j;
- ulong size = 0;
-
- for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
- ulong flashbase = 0;
-
- flash_info[i].flash_id =
- (INTEL_MANUFACT & FLASH_VENDMASK) |
- (INTEL_ID_28F128J3 & FLASH_TYPEMASK);
- flash_info[i].size = FLASH_BANK_SIZE;
- flash_info[i].sector_count = CFG_MAX_FLASH_SECT;
- memset (flash_info[i].protect, 0, CFG_MAX_FLASH_SECT);
- if (i == 0)
- flashbase = PHYS_FLASH_1;
- else
- panic ("configured too many flash banks!\n");
- for (j = 0; j < flash_info[i].sector_count; j++) {
- flash_info[i].start[j] = flashbase + j * MAIN_SECT_SIZE;
- }
- size += flash_info[i].size;
- }
-
- /* Protect monitor and environment sectors
- */
- flash_protect ( FLAG_PROTECT_SET,
- CFG_FLASH_BASE,
- CFG_FLASH_BASE + monitor_flash_len - 1,
- &flash_info[0]);
-
- flash_protect ( FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0]);
-
- return size;
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t * info)
-{
- int i;
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case (INTEL_MANUFACT & FLASH_VENDMASK):
- printf ("Intel: ");
- break;
- default:
- printf ("Unknown Vendor ");
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case (INTEL_ID_28F128J3 & FLASH_TYPEMASK):
- printf ("28F128J3 (128Mbit)\n");
- break;
- default:
- printf ("Unknown Chip Type\n");
- goto Done;
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; i++) {
- if ((i % 5) == 0) {
- printf ("\n ");
- }
- printf (" %08lX%s", info->start[i],
- info->protect[i] ? " (RO)" : " ");
- }
- printf ("\n");
-
-Done: ;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t * info, int s_first, int s_last)
-{
- int flag, prot, sect;
- int rc = ERR_OK;
-
- if (info->flash_id == FLASH_UNKNOWN)
- return ERR_UNKNOWN_FLASH_TYPE;
-
- if ((s_first < 0) || (s_first > s_last)) {
- return ERR_INVAL;
- }
-
- if ((info->flash_id & FLASH_VENDMASK) !=
- (INTEL_MANUFACT & FLASH_VENDMASK)) {
- return ERR_UNKNOWN_FLASH_VENDOR;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
- if (prot)
- return ERR_PROTECTED;
-
- /*
- * Disable interrupts which might cause a timeout
- * here. Remember that our exception vectors are
- * at address 0 in the flash, and we don't want a
- * (ticker) exception to happen while the flash
- * chip is in programming mode.
- */
- flag = disable_interrupts ();
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect <= s_last && !ctrlc (); sect++) {
-
- printf ("Erasing sector %2d ... ", sect);
-
- /* arm simple, non interrupt dependent timer */
- reset_timer_masked ();
-
- if (info->protect[sect] == 0) { /* not protected */
- vu_short *addr = (vu_short *) (info->start[sect]);
-
- *addr = 0x20; /* erase setup */
- *addr = 0xD0; /* erase confirm */
-
- while ((*addr & 0x80) != 0x80) {
- if (get_timer_masked () > CFG_FLASH_ERASE_TOUT) {
- *addr = 0xB0; /* suspend erase */
- *addr = 0xFF; /* reset to read mode */
- rc = ERR_TIMOUT;
- goto outahere;
- }
- }
-
- /* clear status register command */
- *addr = 0x50;
- /* reset to read mode */
- *addr = 0xFF;
- }
- printf ("ok.\n");
- }
- if (ctrlc ())
- printf ("User Interrupt!\n");
-
- outahere:
-
- /* allow flash to settle - wait 10 ms */
- udelay_masked (10000);
-
- if (flag)
- enable_interrupts ();
-
- return rc;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash
- */
-
-static int write_word (flash_info_t * info, ulong dest, ushort data)
-{
- vu_short *addr = (vu_short *) dest, val;
- int rc = ERR_OK;
- int flag;
-
- /* Check if Flash is (sufficiently) erased
- */
- if ((*addr & data) != data)
- return ERR_NOT_ERASED;
-
- /*
- * Disable interrupts which might cause a timeout
- * here. Remember that our exception vectors are
- * at address 0 in the flash, and we don't want a
- * (ticker) exception to happen while the flash
- * chip is in programming mode.
- */
- flag = disable_interrupts ();
-
- /* clear status register command */
- *addr = 0x50;
-
- /* program set-up command */
- *addr = 0x40;
-
- /* latch address/data */
- *addr = data;
-
- /* arm simple, non interrupt dependent timer */
- reset_timer_masked ();
-
- /* wait while polling the status register */
- while (((val = *addr) & 0x80) != 0x80) {
- if (get_timer_masked () > CFG_FLASH_WRITE_TOUT) {
- rc = ERR_TIMOUT;
- /* suspend program command */
- *addr = 0xB0;
- goto outahere;
- }
- }
-
- if (val & 0x1A) { /* check for error */
- printf ("\nFlash write error %02x at address %08lx\n",
- (int) val, (unsigned long) dest);
- if (val & (1 << 3)) {
- printf ("Voltage range error.\n");
- rc = ERR_PROG_ERROR;
- goto outahere;
- }
- if (val & (1 << 1)) {
- printf ("Device protect error.\n");
- rc = ERR_PROTECTED;
- goto outahere;
- }
- if (val & (1 << 4)) {
- printf ("Programming error.\n");
- rc = ERR_PROG_ERROR;
- goto outahere;
- }
- rc = ERR_PROG_ERROR;
- goto outahere;
- }
-
- outahere:
- /* read array command */
- *addr = 0xFF;
-
- if (flag)
- enable_interrupts ();
-
- return rc;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash.
- */
-
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- ulong cp, wp;
- ushort data;
- int l;
- int i, rc;
-
- wp = (addr & ~1); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i = 0, cp = wp; i < l; ++i, ++cp) {
- data = (data >> 8) | (*(uchar *) cp << 8);
- }
- for (; i < 2 && cnt > 0; ++i) {
- data = (data >> 8) | (*src++ << 8);
- --cnt;
- ++cp;
- }
- for (; cnt == 0 && i < 2; ++i, ++cp) {
- data = (data >> 8) | (*(uchar *) cp << 8);
- }
-
- if ((rc = write_word (info, wp, data)) != 0) {
- return (rc);
- }
- wp += 2;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 2) {
- data = *((vu_short *) src);
- if ((rc = write_word (info, wp, data)) != 0) {
- return (rc);
- }
- src += 2;
- wp += 2;
- cnt -= 2;
- }
-
- if (cnt == 0) {
- return ERR_OK;
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i = 0, cp = wp; i < 2 && cnt > 0; ++i, ++cp) {
- data = (data >> 8) | (*src++ << 8);
- --cnt;
- }
- for (; i < 2; ++i, ++cp) {
- data = (data >> 8) | (*(uchar *) cp << 8);
- }
-
- return write_word (info, wp, data);
-}
diff --git a/board/ep7312/lowlevel_init.S b/board/ep7312/lowlevel_init.S
deleted file mode 100644
index 5dadb313b1..0000000000
--- a/board/ep7312/lowlevel_init.S
+++ /dev/null
@@ -1,95 +0,0 @@
-/*
- * Memory Setup stuff - taken from ???
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-
-#include <config.h>
-#include <version.h>
-
-
-/* some parameters for the board */
-
-SYSCON1: .long 0x80000100
-SYSCON2: .long 0x80001100
-SYSCON3: .long 0x80002200
-MEMCFG1: .long 0x80000180
-MEMCFG2: .long 0x800001C0
-SDCONF: .long 0x80002300
-SDRFPR: .long 0x80002340
-
-syscon1_val: .long 0x00040100
-syscon2_val: .long 0x00000102
-syscon3_val: .long 0x0000020E
-memcfg1_val: .long 0x1f101710
-memcfg2_mask: .long 0x0000ffff @ only set lower 16 bits
-memcfg2_val: .long 0x00001f13 @ upper 16 bits are reserved for CS7 + CS6
-sdrfpr_val: .long 0x00000240
-sdconf_val: .long 0x00000522
-/* setting up the memory */
-
-.globl lowlevel_init
-lowlevel_init:
- /*
- * SYSCON1-3
- */
- ldr r0, SYSCON1
- ldr r1, syscon1_val
- str r1, [r0]
-
- ldr r0, SYSCON2
- ldr r1, syscon2_val
- str r1, [r0]
-
- ldr r0, SYSCON3
- ldr r1, syscon3_val
- str r1, [r0]
-
- /*
- * MEMCFG1
- */
- ldr r0, MEMCFG1
- ldr r1, memcfg1_val
- str r1, [r0]
-
- /*
- * MEMCFG2
- */
- ldr r0, MEMCFG2
- ldr r2, [r0]
- ldr r1, memcfg2_mask
- bic r2, r2, r1
- ldr r1, memcfg2_val
- orr r2, r2, r1
- str r2, [r0]
-
- /*
- * SDRFPR,SDCONF
- */
- ldr r0, SDCONF
- ldr r1, sdconf_val
- str r1, [r0]
-
- ldr r0, SDRFPR
- ldr r1, sdrfpr_val
- str r1, [r0]
-
- /* everything is fine now */
- mov pc, lr
diff --git a/board/ep7312/u-boot.lds b/board/ep7312/u-boot.lds
deleted file mode 100644
index 1122d7521c..0000000000
--- a/board/ep7312/u-boot.lds
+++ /dev/null
@@ -1,56 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-ENTRY(_start)
-SECTIONS
-{
- . = 0x00000000;
-
- . = ALIGN(4);
- .text :
- {
- cpu/arm720t/start.o (.text)
- *(.text)
- }
-
- . = ALIGN(4);
- .rodata : { *(.rodata) }
-
- . = ALIGN(4);
- .data : { *(.data) }
-
- . = ALIGN(4);
- .got : { *(.got) }
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = ALIGN(4);
- __bss_start = .;
- .bss : { *(.bss) }
- _end = .;
-}
diff --git a/board/ep8248/Makefile b/board/ep8248/Makefile
deleted file mode 100644
index 8b10993194..0000000000
--- a/board/ep8248/Makefile
+++ /dev/null
@@ -1,46 +0,0 @@
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := $(BOARD).o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/ep8248/config.mk b/board/ep8248/config.mk
deleted file mode 100644
index eda523be26..0000000000
--- a/board/ep8248/config.mk
+++ /dev/null
@@ -1,30 +0,0 @@
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# Modified by, Yuli Barcohen, Arabella Software Ltd. <yuli@arabellasw.com>
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# EP82xx series boards by Embedded Planet
-#
-
-TEXT_BASE = 0xFFF00000
diff --git a/board/ep8248/ep8248.c b/board/ep8248/ep8248.c
deleted file mode 100644
index 69975caa2e..0000000000
--- a/board/ep8248/ep8248.c
+++ /dev/null
@@ -1,263 +0,0 @@
-/*
- * Copyright (C) 2004 Arabella Software Ltd.
- * Yuli Barcohen <yuli@arabellasw.com>
- *
- * Support for Embedded Planet EP8248 boards.
- * Tested on EP8248E.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc8260.h>
-#include <ioports.h>
-
-/*
- * I/O Port configuration table
- *
- * if conf is 1, then that port pin will be configured at boot time
- * according to the five values podr/pdir/ppar/psor/pdat for that entry
- */
-
-#define CFG_FCC1 (CONFIG_ETHER_INDEX == 1)
-#define CFG_FCC2 (CONFIG_ETHER_INDEX == 2)
-
-const iop_conf_t iop_conf_tab[4][32] = {
-
- /* Port A */
- { /* conf ppar psor pdir podr pdat */
- /* PA31 */ { CFG_FCC1, 1, 1, 0, 0, 0 }, /* FCC1 MII COL */
- /* PA30 */ { CFG_FCC1, 1, 1, 0, 0, 0 }, /* FCC1 MII CRS */
- /* PA29 */ { CFG_FCC1, 1, 1, 1, 0, 0 }, /* FCC1 MII TX_ER */
- /* PA28 */ { CFG_FCC1, 1, 1, 1, 0, 0 }, /* FCC1 MII TX_EN */
- /* PA27 */ { CFG_FCC1, 1, 1, 0, 0, 0 }, /* FCC1 MII RX_DV */
- /* PA26 */ { CFG_FCC1, 1, 1, 0, 0, 0 }, /* FCC1 MII RX_ER */
- /* PA25 */ { 0, 0, 0, 0, 0, 0 }, /* PA25 */
- /* PA24 */ { 0, 0, 0, 0, 0, 0 }, /* PA24 */
- /* PA23 */ { 0, 0, 0, 0, 0, 0 }, /* PA23 */
- /* PA22 */ { 0, 0, 0, 0, 0, 0 }, /* PA22 */
- /* PA21 */ { CFG_FCC1, 1, 0, 1, 0, 0 }, /* FCC1 MII TxD[3] */
- /* PA20 */ { CFG_FCC1, 1, 0, 1, 0, 0 }, /* FCC1 MII TxD[2] */
- /* PA19 */ { CFG_FCC1, 1, 0, 1, 0, 0 }, /* FCC1 MII TxD[1] */
- /* PA18 */ { CFG_FCC1, 1, 0, 1, 0, 0 }, /* FCC1 MII TxD[0] */
- /* PA17 */ { CFG_FCC1, 1, 0, 0, 0, 0 }, /* FCC1 MII RxD[0] */
- /* PA16 */ { CFG_FCC1, 1, 0, 0, 0, 0 }, /* FCC1 MII RxD[1] */
- /* PA15 */ { CFG_FCC1, 1, 0, 0, 0, 0 }, /* FCC1 MII RxD[2] */
- /* PA14 */ { CFG_FCC1, 1, 0, 0, 0, 0 }, /* FCC1 MII RxD[3] */
- /* PA13 */ { 0, 0, 0, 0, 0, 0 }, /* PA13 */
- /* PA12 */ { 0, 0, 0, 0, 0, 0 }, /* PA12 */
- /* PA11 */ { 0, 0, 0, 0, 0, 0 }, /* PA11 */
- /* PA10 */ { 0, 0, 0, 0, 0, 0 }, /* PA10 */
- /* PA9 */ { 0, 1, 0, 1, 0, 0 }, /* SMC2 TxD */
- /* PA8 */ { 0, 1, 0, 0, 0, 0 }, /* SMC2 RxD */
- /* PA7 */ { 0, 0, 0, 0, 0, 0 }, /* PA7 */
- /* PA6 */ { 0, 0, 0, 0, 0, 0 }, /* PA6 */
- /* PA5 */ { 0, 0, 0, 0, 0, 0 }, /* PA5 */
- /* PA4 */ { 0, 0, 0, 0, 0, 0 }, /* PA4 */
- /* PA3 */ { 0, 0, 0, 0, 0, 0 }, /* PA3 */
- /* PA2 */ { 0, 0, 0, 0, 0, 0 }, /* PA2 */
- /* PA1 */ { 0, 0, 0, 0, 0, 0 }, /* PA1 */
- /* PA0 */ { 0, 0, 0, 0, 0, 0 } /* PA0 */
- },
-
- /* Port B */
- { /* conf ppar psor pdir podr pdat */
- /* PB31 */ { CFG_FCC2, 1, 0, 1, 0, 0 }, /* FCC2 MII TX_ER */
- /* PB30 */ { CFG_FCC2, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_DV */
- /* PB29 */ { CFG_FCC2, 1, 1, 1, 0, 0 }, /* FCC2 MII TX_EN */
- /* PB28 */ { CFG_FCC2, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_ER */
- /* PB27 */ { CFG_FCC2, 1, 0, 0, 0, 0 }, /* FCC2 MII COL */
- /* PB26 */ { CFG_FCC2, 1, 0, 0, 0, 0 }, /* FCC2 MII CRS */
- /* PB25 */ { CFG_FCC2, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[3] */
- /* PB24 */ { CFG_FCC2, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[2] */
- /* PB23 */ { CFG_FCC2, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[1] */
- /* PB22 */ { CFG_FCC2, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[0] */
- /* PB21 */ { CFG_FCC2, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[0] */
- /* PB20 */ { CFG_FCC2, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[1] */
- /* PB19 */ { CFG_FCC2, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[2] */
- /* PB18 */ { CFG_FCC2, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[3] */
- /* PB17 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */
- /* PB16 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */
- /* PB15 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */
- /* PB14 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */
- /* PB13 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */
- /* PB12 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */
- /* PB11 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */
- /* PB10 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */
- /* PB9 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */
- /* PB8 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */
- /* PB7 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */
- /* PB6 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */
- /* PB5 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */
- /* PB4 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */
- /* PB3 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */
- /* PB2 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */
- /* PB1 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */
- /* PB0 */ { 0, 0, 0, 0, 0, 0 } /* non-existent */
- },
-
- /* Port C */
- { /* conf ppar psor pdir podr pdat */
- /* PC31 */ { 0, 0, 0, 0, 0, 0 }, /* PC31 */
- /* PC30 */ { 0, 0, 0, 0, 0, 0 }, /* PC30 */
- /* PC29 */ { 0, 0, 0, 0, 0, 0 }, /* PC29 */
- /* PC28 */ { 0, 0, 0, 0, 0, 0 }, /* PC28 */
- /* PC27 */ { 0, 0, 0, 0, 0, 0 }, /* PC27 */
- /* PC26 */ { 0, 0, 0, 0, 0, 0 }, /* PC26 */
- /* PC25 */ { 0, 0, 0, 0, 0, 0 }, /* PC25 */
- /* PC24 */ { 0, 0, 0, 0, 0, 0 }, /* PC24 */
- /* PC23 */ { 0, 0, 0, 0, 0, 0 }, /* PC23 */
- /* PC22 */ { CFG_FCC1, 1, 0, 0, 0, 0 }, /* FCC1 RxClk (CLK10) */
- /* PC21 */ { CFG_FCC1, 1, 0, 0, 0, 0 }, /* FCC1 TxClk (CLK11) */
- /* PC20 */ { 0, 0, 0, 0, 0, 0 }, /* PC20 */
- /* PC19 */ { CFG_FCC2, 1, 0, 0, 0, 0 }, /* FCC2 RxClk (CLK13) */
- /* PC18 */ { CFG_FCC2, 1, 0, 0, 0, 0 }, /* FCC2 TxClk (CLK14) */
- /* PC17 */ { 0, 0, 0, 0, 0, 0 }, /* PC17 */
- /* PC16 */ { 0, 0, 0, 0, 0, 0 }, /* PC16 */
- /* PC15 */ { 0, 0, 0, 0, 0, 0 }, /* PC15 */
- /* PC14 */ { 0, 0, 0, 0, 0, 0 }, /* PC14 */
- /* PC13 */ { 0, 0, 0, 0, 0, 0 }, /* PC13 */
- /* PC12 */ { 0, 0, 0, 0, 0, 0 }, /* PC12 */
- /* PC11 */ { 0, 0, 0, 0, 0, 0 }, /* PC11 */
- /* PC10 */ { 0, 0, 0, 0, 0, 0 }, /* PC10 */
- /* PC9 */ { 1, 0, 0, 1, 0, 1 }, /* MDIO */
- /* PC8 */ { 1, 0, 0, 1, 0, 1 }, /* MDC */
- /* PC7 */ { 0, 0, 0, 0, 0, 0 }, /* PC7 */
- /* PC6 */ { 0, 0, 0, 0, 0, 0 }, /* PC6 */
- /* PC5 */ { 1, 1, 0, 1, 0, 0 }, /* SMC1 TxD */
- /* PC4 */ { 1, 1, 0, 0, 0, 0 }, /* SMC1 RxD */
- /* PC3 */ { 0, 0, 0, 0, 0, 0 }, /* PC3 */
- /* PC2 */ { 0, 0, 0, 0, 0, 0 }, /* PC2 */
- /* PC1 */ { 0, 0, 0, 0, 0, 0 }, /* PC1 */
- /* PC0 */ { 0, 0, 0, 0, 0, 0 }, /* PC0 */
- },
-
- /* Port D */
- { /* conf ppar psor pdir podr pdat */
- /* PD31 */ { 1, 1, 0, 0, 0, 0 }, /* SCC1 RxD */
- /* PD30 */ { 1, 1, 1, 1, 0, 0 }, /* SCC1 TxD */
- /* PD29 */ { 0, 0, 0, 0, 0, 0 }, /* PD29 */
- /* PD28 */ { 0, 0, 0, 0, 0, 0 }, /* PD28 */
- /* PD27 */ { 0, 0, 0, 0, 0, 0 }, /* PD27 */
- /* PD26 */ { 0, 0, 0, 0, 0, 0 }, /* PD26 */
- /* PD25 */ { 0, 0, 0, 0, 0, 0 }, /* PD25 */
- /* PD24 */ { 0, 0, 0, 0, 0, 0 }, /* PD24 */
- /* PD23 */ { 0, 0, 0, 0, 0, 0 }, /* PD23 */
- /* PD22 */ { 0, 0, 0, 0, 0, 0 }, /* PD22 */
- /* PD21 */ { 0, 0, 0, 0, 0, 0 }, /* PD21 */
- /* PD20 */ { 0, 0, 0, 0, 0, 0 }, /* PD20 */
- /* PD19 */ { 0, 0, 0, 0, 0, 0 }, /* PD19 */
- /* PD18 */ { 0, 0, 0, 0, 0, 0 }, /* PD18 */
- /* PD17 */ { 0, 0, 0, 0, 0, 0 }, /* PD17 */
- /* PD16 */ { 0, 0, 0, 0, 0, 0 }, /* PD16 */
- /* PD15 */ { 1, 1, 1, 0, 1, 0 }, /* I2C SDA */
- /* PD14 */ { 1, 1, 1, 0, 1, 0 }, /* I2C SCL */
- /* PD13 */ { 0, 0, 0, 0, 0, 0 }, /* PD13 */
- /* PD12 */ { 0, 0, 0, 0, 0, 0 }, /* PD12 */
- /* PD11 */ { 0, 0, 0, 0, 0, 0 }, /* PD11 */
- /* PD10 */ { 0, 0, 0, 0, 0, 0 }, /* PD10 */
- /* PD9 */ { 0, 0, 0, 0, 0, 0 }, /* PD9 */
- /* PD8 */ { 0, 0, 0, 0, 0, 0 }, /* PD8 */
- /* PD7 */ { 0, 0, 0, 0, 0, 0 }, /* PD7 */
- /* PD6 */ { 0, 0, 0, 0, 0, 0 }, /* PD6 */
- /* PD5 */ { 0, 0, 0, 0, 0, 0 }, /* PD5 */
- /* PD4 */ { 0, 0, 0, 0, 0, 0 }, /* PD4 */
- /* PD3 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */
- /* PD2 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */
- /* PD1 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */
- /* PD0 */ { 0, 0, 0, 0, 0, 0 } /* non-existent */
- }
-};
-
-int board_early_init_f (void)
-{
- vu_char *bcsr = (vu_char *)CFG_BCSR;
-
- bcsr[4] |= 0x30; /* Turn the LEDs off */
-
-#if defined(CONFIG_CONS_ON_SMC) || defined(CONFIG_KGDB_ON_SMC)
- bcsr[6] |= 0x10;
-#endif
-#if defined(CONFIG_CONS_ON_SCC) || defined(CONFIG_KGDB_ON_SCC)
- bcsr[7] |= 0x10;
-#endif
-
-#if CFG_FCC1
- bcsr[8] |= 0xC0;
-#endif /* CFG_FCC1 */
-#if CFG_FCC2
- bcsr[8] |= 0x30;
-#endif /* CFG_FCC2 */
-
- return 0;
-}
-
-long int initdram(int board_type)
-{
- vu_char *bcsr = (vu_char *)CFG_BCSR;
- long int msize = 16L << (bcsr[2] & 3);
-
-#ifndef CFG_RAMBOOT
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile memctl8260_t *memctl = &immap->im_memctl;
- vu_char *ramaddr = (vu_char *)CFG_SDRAM_BASE;
- uchar c = 0xFF;
- uint psdmr = CFG_PSDMR;
- int i;
-
- immap->im_siu_conf.sc_ppc_acr = 0x02;
- immap->im_siu_conf.sc_ppc_alrh = 0x30126745;
- immap->im_siu_conf.sc_tescr1 = 0x00004000;
-
- memctl->memc_mptpr = CFG_MPTPR;
-
- /* Initialise 60x bus SDRAM */
- memctl->memc_psrt = CFG_PSRT;
- memctl->memc_or1 = CFG_SDRAM_OR;
- memctl->memc_br1 = CFG_SDRAM_BR;
- memctl->memc_psdmr = psdmr | PSDMR_OP_PREA; /* Precharge all banks */
- *ramaddr = c;
- memctl->memc_psdmr = psdmr | PSDMR_OP_CBRR; /* CBR refresh */
- for (i = 0; i < 8; i++)
- *ramaddr = c;
- memctl->memc_psdmr = psdmr | PSDMR_OP_MRW; /* Mode Register write */
- *ramaddr = c;
- memctl->memc_psdmr = psdmr | PSDMR_RFEN; /* Refresh enable */
- *ramaddr = c;
-#endif /* !CFG_RAMBOOT */
-
- /* Return total 60x bus SDRAM size */
- return msize * 1024 * 1024;
-}
-
-int checkboard(void)
-{
- vu_char *bcsr = (vu_char *)CFG_BCSR;
-
- puts("Board: ");
- switch (bcsr[0]) {
- case 0x0C:
- printf("EP8248E 1.0 CPLD revision %d\n", bcsr[1]);
- break;
- default:
- printf("unknown: ID=%02X\n", bcsr[0]);
- }
-
- return 0;
-}
diff --git a/board/ep8248/u-boot.lds b/board/ep8248/u-boot.lds
deleted file mode 100644
index 18c4b46f47..0000000000
--- a/board/ep8248/u-boot.lds
+++ /dev/null
@@ -1,125 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * Modified by Yuli Barcohen <yuli@arabellasw.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc8260/start.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
-ENTRY(_start)
diff --git a/board/ep8260/Makefile b/board/ep8260/Makefile
deleted file mode 100644
index 477e5eedeb..0000000000
--- a/board/ep8260/Makefile
+++ /dev/null
@@ -1,46 +0,0 @@
-#
-# (C) Copyright 2002
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o mii_phy.o
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/ep8260/config.mk b/board/ep8260/config.mk
deleted file mode 100644
index eaf1560e6f..0000000000
--- a/board/ep8260/config.mk
+++ /dev/null
@@ -1,36 +0,0 @@
-#
-# (C) Copyright 2002
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# EP8260 boards
-#
-
-# This should be equal to the CFG_FLASH_BASE define in config_ep8260.h
-# for the "final" configuration, with U-Boot in flash, or the address
-# in RAM where U-Boot is loaded at for debugging.
-#
-#TEXT_BASE = 0x00100000
-#TEXT_BASE = 0xFF000000
-TEXT_BASE = 0xFFF00000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)
diff --git a/board/ep8260/ep8260.c b/board/ep8260/ep8260.c
deleted file mode 100644
index b9e1df43d7..0000000000
--- a/board/ep8260/ep8260.c
+++ /dev/null
@@ -1,320 +0,0 @@
-/*
- * (C) Copyright 2001, 2002
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2002
- * Frank Panno <fpanno@delphintech.com>, Delphin Technology AG
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <ioports.h>
-#include <mpc8260.h>
-#include "ep8260.h"
-/*
- * I/O Port configuration table
- *
- * if conf is 1, then that port pin will be configured at boot time
- * according to the five values podr/pdir/ppar/psor/pdat for that entry
- */
-
-const iop_conf_t iop_conf_tab[4][32] = {
-
- /* Port A configuration */
- { /* conf ppar psor pdir podr pdat */
- /* PA31 */ { 0, 0, 0, 1, 0, 0 }, /* */
- /* PA30 */ { 0, 0, 0, 1, 0, 0 }, /* */
- /* PA29 */ { 0, 0, 0, 1, 0, 0 }, /* */
- /* PA28 */ { 0, 0, 0, 1, 0, 0 }, /* */
- /* PA27 */ { 0, 0, 0, 1, 0, 0 }, /* */
- /* PA26 */ { 0, 0, 0, 1, 0, 0 }, /* */
- /* PA25 */ { 0, 0, 0, 1, 0, 0 }, /* */
- /* PA24 */ { 0, 0, 0, 1, 0, 0 }, /* */
- /* PA23 */ { 0, 0, 0, 1, 0, 0 }, /* */
- /* PA22 */ { 0, 0, 0, 1, 0, 0 }, /* */
- /* PA21 */ { 0, 0, 0, 1, 0, 0 }, /* */
- /* PA20 */ { 0, 0, 0, 1, 0, 0 }, /* */
- /* PA19 */ { 0, 0, 0, 1, 0, 0 }, /* */
- /* PA18 */ { 0, 0, 0, 1, 0, 0 }, /* */
- /* PA17 */ { 0, 0, 0, 1, 0, 0 }, /* */
- /* PA16 */ { 0, 0, 0, 1, 0, 0 }, /* */
- /* PA15 */ { 0, 0, 0, 1, 0, 0 }, /* */
- /* PA14 */ { 0, 0, 0, 1, 0, 0 }, /* */
- /* PA13 */ { 0, 0, 0, 1, 0, 0 }, /* */
- /* PA12 */ { 0, 0, 0, 1, 0, 0 }, /* */
- /* PA11 */ { 0, 0, 0, 1, 0, 0 }, /* */
- /* PA10 */ { 0, 0, 0, 1, 0, 0 }, /* */
- /* PA9 */ { 0, 1, 0, 1, 0, 0 }, /* */
- /* PA8 */ { 0, 1, 0, 0, 0, 0 }, /* */
- /* PA7 */ { 0, 0, 0, 1, 0, 0 }, /* PA7 */
- /* PA6 */ { 0, 0, 0, 1, 0, 0 }, /* PA6 */
- /* PA5 */ { 0, 0, 0, 1, 0, 0 }, /* PA5 */
- /* PA4 */ { 0, 0, 0, 1, 0, 0 }, /* PA4 */
- /* PA3 */ { 0, 0, 0, 1, 0, 0 }, /* PA3 */
- /* PA2 */ { 0, 0, 0, 1, 0, 0 }, /* PA2 */
- /* PA1 */ { 0, 0, 0, 1, 0, 0 }, /* PA1 */
- /* PA0 */ { 0, 0, 0, 1, 0, 0 } /* PA0 */
- },
-
- /* Port B configuration */
- { /* conf ppar psor pdir podr pdat */
- /* PB31 */ { 0, 1, 0, 1, 0, 0 }, /* */
- /* PB30 */ { 0, 1, 0, 0, 0, 0 }, /* */
- /* PB29 */ { 0, 1, 1, 1, 0, 0 }, /* */
- /* PB28 */ { 0, 1, 0, 0, 0, 0 }, /* */
- /* PB27 */ { 0, 1, 0, 0, 0, 0 }, /* */
- /* PB26 */ { 0, 1, 0, 0, 0, 0 }, /* */
- /* PB25 */ { 0, 1, 0, 1, 0, 0 }, /* */
- /* PB24 */ { 0, 1, 0, 1, 0, 0 }, /* */
- /* PB23 */ { 0, 1, 0, 1, 0, 0 }, /* */
- /* PB22 */ { 0, 1, 0, 1, 0, 0 }, /* */
- /* PB21 */ { 0, 1, 0, 0, 0, 0 }, /* */
- /* PB20 */ { 0, 1, 0, 0, 0, 0 }, /* */
- /* PB19 */ { 0, 1, 0, 0, 0, 0 }, /* */
- /* PB18 */ { 0, 1, 0, 0, 0, 0 }, /* */
- /* PB17 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3 MII RX_DV */
- /* PB16 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3 MII RX_ER */
- /* PB15 */ { 1, 1, 0, 1, 0, 0 }, /* FCC3 MII TX_ER */
- /* PB14 */ { 1, 1, 0, 1, 0, 0 }, /* FCC3 MII TX_EN */
- /* PB13 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3 MII COL */
- /* PB12 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3 MII CRS */
- /* PB11 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3 MII RxD[3] */
- /* PB10 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3 MII RxD[2] */
- /* PB9 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3 MII RxD[1] */
- /* PB8 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3 MII RxD[0] */
- /* PB7 */ { 0, 0, 0, 0, 0, 0 }, /* PB7 */
- /* PB6 */ { 1, 1, 0, 1, 0, 0 }, /* FCC3 MII TxD[1] */
- /* PB5 */ { 1, 1, 0, 1, 0, 0 }, /* FCC3 MII TxD[2] */
- /* PB4 */ { 1, 1, 0, 1, 0, 0 }, /* FCC3 MII TxD[3] */
- /* PB3 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PB2 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PB1 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PB0 */ { 0, 0, 0, 0, 0, 0 } /* pin doesn't exist */
- },
-
- /* Port C */
- { /* conf ppar psor pdir podr pdat */
- /* PC31 */ { 0, 0, 0, 1, 0, 0 }, /* PC31 */
- /* PC30 */ { 0, 0, 0, 1, 0, 0 }, /* PC30 */
- /* PC29 */ { 0, 1, 1, 0, 0, 0 }, /* */
- /* PC28 */ { 0, 0, 0, 1, 0, 0 }, /* PC28 */
- /* PC27 */ { 1, 1, 0, 1, 0, 0 }, /* FCC3 MII TxD[0] */
- /* PC26 */ { 0, 0, 0, 1, 0, 0 }, /* PC26 */
- /* PC25 */ { 0, 0, 0, 1, 0, 0 }, /* PC25 */
- /* PC24 */ { 0, 0, 0, 1, 0, 0 }, /* PC24 */
- /* PC23 */ { 0, 1, 0, 1, 0, 0 }, /* */
- /* PC22 */ { 0, 1, 0, 0, 0, 0 }, /* */
- /* PC21 */ { 0, 1, 0, 0, 0, 0 }, /* */
- /* PC20 */ { 0, 1, 0, 0, 0, 0 }, /* */
- /* PC19 */ { 0, 1, 0, 0, 0, 0 }, /* */
- /* PC18 */ { 0, 1, 0, 0, 0, 0 }, /* */
- /* PC17 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3 MII CLK15 */
- /* PC16 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3 MII CLK16 */
- /* PC15 */ { 0, 0, 0, 1, 0, 0 }, /* PC15 */
- /* PC14 */ { 0, 1, 0, 0, 0, 0 }, /* */
- /* PC13 */ { 0, 0, 0, 1, 0, 0 }, /* PC13 */
- /* PC12 */ { 0, 0, 0, 1, 0, 0 }, /* PC12 */
- /* PC11 */ { 0, 0, 0, 1, 0, 0 }, /* PC11 */
- /* PC10 */ { 0, 0, 0, 1, 0, 0 }, /* */
- /* PC9 */ { 0, 0, 0, 1, 0, 0 }, /* */
- /* PC8 */ { 0, 0, 0, 1, 0, 0 }, /* PC8 */
- /* PC7 */ { 0, 0, 0, 1, 0, 0 }, /* PC7 */
- /* PC6 */ { 0, 0, 0, 1, 0, 0 }, /* PC6 */
- /* PC5 */ { 0, 0, 0, 1, 0, 0 }, /* PC5 */
- /* PC4 */ { 0, 0, 0, 1, 0, 0 }, /* PC4 */
- /* PC3 */ { 0, 0, 0, 1, 0, 0 }, /* PC3 */
- /* PC2 */ { 0, 0, 0, 1, 0, 1 }, /* */
- /* PC1 */ { 0, 0, 0, 1, 0, 0 }, /* */
- /* PC0 */ { 0, 0, 0, 1, 0, 0 }, /* */
- },
-
- /* Port D */
- { /* conf ppar psor pdir podr pdat */
- /* PD31 */ { 0, 1, 0, 0, 0, 0 }, /* */
- /* PD30 */ { 0, 1, 1, 1, 0, 0 }, /* */
- /* PD29 */ { 0, 1, 0, 1, 0, 0 }, /* */
- /* PD28 */ { 0, 0, 0, 1, 0, 0 }, /* PD28 */
- /* PD27 */ { 0, 0, 0, 1, 0, 0 }, /* PD27 */
- /* PD26 */ { 0, 0, 0, 1, 0, 0 }, /* PD26 */
- /* PD25 */ { 0, 0, 0, 1, 0, 0 }, /* PD25 */
- /* PD24 */ { 0, 0, 0, 1, 0, 0 }, /* PD24 */
- /* PD23 */ { 0, 0, 0, 1, 0, 0 }, /* PD23 */
- /* PD22 */ { 0, 0, 0, 1, 0, 0 }, /* PD22 */
- /* PD21 */ { 0, 0, 0, 1, 0, 0 }, /* PD21 */
- /* PD20 */ { 0, 0, 0, 1, 0, 0 }, /* PD20 */
- /* PD19 */ { 0, 0, 0, 1, 0, 0 }, /* PD19 */
- /* PD18 */ { 0, 0, 0, 1, 0, 0 }, /* PD19 */
- /* PD17 */ { 0, 1, 0, 0, 0, 0 }, /* */
- /* PD16 */ { 0, 1, 0, 1, 0, 0 }, /* */
- /* PD15 */ { 1, 1, 1, 0, 1, 0 }, /* I2C SDA */
- /* PD14 */ { 1, 1, 1, 0, 1, 0 }, /* I2C SCL */
- /* PD13 */ { 0, 0, 0, 0, 0, 0 }, /* PD13 */
- /* PD12 */ { 0, 0, 0, 0, 0, 0 }, /* PD12 */
- /* PD11 */ { 0, 0, 0, 0, 0, 0 }, /* PD11 */
- /* PD10 */ { 0, 0, 0, 0, 0, 0 }, /* PD10 */
- /* PD9 */ { 1, 1, 0, 1, 0, 0 }, /* SMC1 TXD */
- /* PD8 */ { 1, 1, 0, 0, 0, 0 }, /* SMC1 RXD */
- /* PD7 */ { 0, 0, 0, 1, 0, 1 }, /* PD7 */
- /* PD6 */ { 0, 0, 0, 1, 0, 1 }, /* PD6 */
- /* PD5 */ { 0, 0, 0, 1, 0, 1 }, /* PD5 */
- /* PD4 */ { 0, 0, 0, 1, 0, 1 }, /* PD4 */
- /* PD3 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PD2 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PD1 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PD0 */ { 0, 0, 0, 0, 0, 0 } /* pin doesn't exist */
- }
-};
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Setup CS4 to enable the Board Control/Status registers.
- * Otherwise the smcs won't work.
-*/
-int board_early_init_f (void)
-{
- volatile t_ep_regs *regs = (t_ep_regs *) CFG_REGS_BASE;
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8260_t *memctl = &immap->im_memctl;
-
- memctl->memc_br4 = CFG_BR4_PRELIM;
- memctl->memc_or4 = CFG_OR4_PRELIM;
- regs->bcsr1 = 0x62; /* to enable terminal on SMC1 */
- regs->bcsr2 = 0x30; /* enable NVRAM and writing FLASH */
- return 0;
-}
-
-void reset_phy (void)
-{
- volatile t_ep_regs *regs = (t_ep_regs *) CFG_REGS_BASE;
-
- regs->bcsr4 = 0xC0;
-}
-
-/*
- * Check Board Identity:
- * I don' know, how the next board revisions will be coded.
- * Thats why its a static interpretation ...
-*/
-
-int checkboard (void)
-{
- volatile t_ep_regs *regs = (t_ep_regs *) CFG_REGS_BASE;
- uint major = 0, minor = 0;
-
- switch (regs->bcsr0) {
- case 0x02:
- major = 1;
- break;
- case 0x03:
- major = 1;
- minor = 1;
- break;
- case 0x06:
- major = 1;
- minor = 3;
- break;
- default:
- break;
- }
- printf ("Board: Embedded Planet EP8260, Revision %d.%d\n",
- major, minor);
- return 0;
-}
-
-
-/* ------------------------------------------------------------------------- */
-
-
-long int initdram (int board_type)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8260_t *memctl = &immap->im_memctl;
- volatile uchar c = 0;
- volatile uchar *ramaddr = (uchar *) (CFG_SDRAM_BASE) + 0x110;
-
-/*
- ulong psdmr = CFG_PSDMR;
-#ifdef CFG_LSDRAM
- ulong lsdmr = CFG_LSDMR;
-#endif
-*/
- long size = CFG_SDRAM0_SIZE;
- int i;
-
-
-/*
-* Quote from 8260 UM (10.4.2 SDRAM Power-On Initialization, 10-35):
-*
-* "At system reset, initialization software must set up the
-* programmable parameters in the memory controller banks registers
-* (ORx, BRx, P/LSDMR). After all memory parameters are configured,
-* system software should execute the following initialization sequence
-* for each SDRAM device.
-*
-* 1. Issue a PRECHARGE-ALL-BANKS command
-* 2. Issue eight CBR REFRESH commands
-* 3. Issue a MODE-SET command to initialize the mode register
-*
-* The initial commands are executed by setting P/LSDMR[OP] and
-* accessing the SDRAM with a single-byte transaction."
-*
-* The appropriate BRx/ORx registers have already been set when we
-* get here. The SDRAM can be accessed at the address CFG_SDRAM_BASE.
-*/
-
- memctl->memc_psrt = CFG_PSRT;
- memctl->memc_mptpr = CFG_MPTPR;
-
- memctl->memc_psdmr = (ulong) CFG_PSDMR | PSDMR_OP_PREA;
- *ramaddr = c;
-
- memctl->memc_psdmr = (ulong) CFG_PSDMR | PSDMR_OP_CBRR;
- for (i = 0; i < 8; i++)
- *ramaddr = c;
-
- memctl->memc_psdmr = (ulong) CFG_PSDMR | PSDMR_OP_MRW;
- *ramaddr = c;
-
- memctl->memc_psdmr = (ulong) CFG_PSDMR | PSDMR_OP_NORM | PSDMR_RFEN;
- *ramaddr = c;
-
-#ifndef CFG_RAMBOOT
-#ifdef CFG_LSDRAM
- size += CFG_SDRAM1_SIZE;
- ramaddr = (uchar *) (CFG_SDRAM1_BASE) + 0x8c;
- memctl->memc_lsrt = CFG_LSRT;
-
- memctl->memc_lsdmr = (ulong) CFG_LSDMR | PSDMR_OP_PREA;
- *ramaddr = c;
-
- memctl->memc_lsdmr = (ulong) CFG_LSDMR | PSDMR_OP_CBRR;
- for (i = 0; i < 8; i++)
- *ramaddr = c;
-
- memctl->memc_lsdmr = (ulong) CFG_LSDMR | PSDMR_OP_MRW;
- *ramaddr = c;
-
- memctl->memc_lsdmr = (ulong) CFG_LSDMR | PSDMR_OP_NORM | PSDMR_RFEN;
- *ramaddr = c;
-#endif /* CFG_LSDRAM */
-#endif /* CFG_RAMBOOT */
- return (size * 1024 * 1024);
-}
diff --git a/board/ep8260/ep8260.h b/board/ep8260/ep8260.h
deleted file mode 100644
index 3032b14245..0000000000
--- a/board/ep8260/ep8260.h
+++ /dev/null
@@ -1,24 +0,0 @@
-#ifndef __EP8260_H__
-#define __EP8260_H__
-
-typedef struct tt_ep_regs {
- volatile unsigned char bcsr0;
- volatile unsigned char bcsr1;
- volatile unsigned char bcsr2;
- volatile unsigned char bcsr3;
- volatile unsigned char bcsr4;
- volatile unsigned char bcsr5;
- volatile unsigned char bcsr6;
- volatile unsigned char bcsr7;
- volatile unsigned char bcsr8;
- volatile unsigned char bcsr9;
- volatile unsigned char bcsr10;
- volatile unsigned char bcsr11;
- volatile unsigned char bcsr12;
- volatile unsigned char bcsr13;
- volatile unsigned char bcsr14;
- volatile unsigned char bcsr15;
-} t_ep_regs;
-typedef t_ep_regs *tp_ep_regs;
-
-#endif
diff --git a/board/ep8260/flash.c b/board/ep8260/flash.c
deleted file mode 100644
index 278d606b32..0000000000
--- a/board/ep8260/flash.c
+++ /dev/null
@@ -1,411 +0,0 @@
-/*
- * (C) Copyright 2001, 2002
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2002
- * Frank Panno <fpanno@delphintech.com>, Delphin Technology AG
- *
- * Flash Routines for AMD device AM29DL323DB on the EP8260 board.
- *
- * This file is based on board/tqm8260/flash.c.
- *--------------------------------------------------------------------
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-
-#define V_ULONG(a) (*(volatile unsigned long *)( a ))
-#define V_BYTE(a) (*(volatile unsigned char *)( a ))
-
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
-
-
-/*-----------------------------------------------------------------------
- */
-void flash_reset(void)
-{
- if( flash_info[0].flash_id != FLASH_UNKNOWN ) {
- V_ULONG( flash_info[0].start[0] ) = 0x00F000F0;
- V_ULONG( flash_info[0].start[0] + 4 ) = 0x00F000F0;
- }
-}
-
-/*-----------------------------------------------------------------------
- */
-ulong flash_get_size( ulong baseaddr, flash_info_t *info )
-{
- short i;
- unsigned long flashtest_h, flashtest_l;
-
- /* Write auto select command sequence and test FLASH answer */
- V_ULONG(baseaddr + ((ulong)0x0555 << 3)) = 0x00AA00AA;
- V_ULONG(baseaddr + ((ulong)0x02AA << 3)) = 0x00550055;
- V_ULONG(baseaddr + ((ulong)0x0555 << 3)) = 0x00900090;
- V_ULONG(baseaddr + 4 + ((ulong)0x0555 << 3)) = 0x00AA00AA;
- V_ULONG(baseaddr + 4 + ((ulong)0x02AA << 3)) = 0x00550055;
- V_ULONG(baseaddr + 4 + ((ulong)0x0555 << 3)) = 0x00900090;
-
- flashtest_h = V_ULONG(baseaddr); /* manufacturer ID */
- flashtest_l = V_ULONG(baseaddr + 4);
-
- if ((int)flashtest_h == AMD_MANUFACT) {
- info->flash_id = FLASH_MAN_AMD;
- } else {
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- return (0); /* no or unknown flash */
- }
-
- flashtest_h = V_ULONG(baseaddr + 8); /* device ID */
- flashtest_l = V_ULONG(baseaddr + 12);
- if (flashtest_h != flashtest_l) {
- info->flash_id = FLASH_UNKNOWN;
- return(0);
- }
-
- switch((int)flashtest_h) {
- case AMD_ID_DL323B:
- info->flash_id += FLASH_AMDL323B;
- info->sector_count = 71;
- info->size = 0x01000000; /* 4 * 4 MB = 16 MB */
- break;
- case AMD_ID_LV640U: /* AMDLV640 and AMDLV641 have same ID */
- info->flash_id += FLASH_AMLV640U;
- info->sector_count = 128;
- info->size = 0x02000000; /* 4 * 8 MB = 32 MB */
- break;
- default:
- info->flash_id = FLASH_UNKNOWN;
- return(0); /* no or unknown flash */
- }
-
- if(flashtest_h == AMD_ID_LV640U) {
- /* set up sector start adress table (uniform sector type) */
- for (i = 0; i < info->sector_count; i++)
- info->start[i] = baseaddr + (i * 0x00040000);
- } else {
- /* set up sector start adress table (bottom sector type) */
- for (i = 0; i < 8; i++) {
- info->start[i] = baseaddr + (i * 0x00008000);
- }
- for (i = 8; i < info->sector_count; i++) {
- info->start[i] = baseaddr + (i * 0x00040000) - 0x001C0000;
- }
- }
- /* check for protected sectors */
- for (i = 0; i < info->sector_count; i++) {
- /* read sector protection at sector address, (A7 .. A0) = 0x02 */
- if ((V_ULONG( info->start[i] + 16 ) & 0x00010001) ||
- (V_ULONG( info->start[i] + 20 ) & 0x00010001)) {
- info->protect[i] = 1; /* D0 = 1 if protected */
- } else {
- info->protect[i] = 0;
- }
- }
-
- flash_reset();
- return(info->size);
-}
-
-/*-----------------------------------------------------------------------
- */
-unsigned long flash_init (void)
-{
- unsigned long size_b0 = 0;
- int i;
-
- /* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* Static FLASH Bank configuration here (only one bank) */
-
- size_b0 = flash_get_size(CFG_FLASH0_BASE, &flash_info[0]);
- if (flash_info[0].flash_id == FLASH_UNKNOWN || size_b0 == 0) {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size_b0, size_b0>>20);
- }
-
- /*
- * protect monitor and environment sectors
- */
-
-#if CFG_MONITOR_BASE >= CFG_FLASH0_BASE
- flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+monitor_flash_len-1,
- &flash_info[0]);
-#endif
-
-#if (CFG_ENV_IS_IN_FLASH == 1) && defined(CFG_ENV_ADDR)
-# ifndef CFG_ENV_SIZE
-# define CFG_ENV_SIZE CFG_ENV_SECT_SIZE
-# endif
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1,
- &flash_info[0]);
-#endif
-
- return (size_b0);
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch ((info->flash_id >> 16) & 0xff) {
- case FLASH_MAN_AMD: printf ("AMD "); break;
- default: printf ("Unknown Vendor "); break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AMDL323B: printf ("29DL323B (32 M, bottom sector)\n");
- break;
- case FLASH_AMLV640U: printf ("29LV640U (64 M, uniform sector)\n");
- break;
- default: printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " "
- );
- }
- printf ("\n");
- return;
-}
-
-/*-----------------------------------------------------------------------
- */
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- int flag, prot, sect, l_sect;
- ulong start, now, last;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect])
- prot++;
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- l_sect = -1;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- V_ULONG( info->start[0] + (0x0555 << 3) ) = 0x00AA00AA;
- V_ULONG( info->start[0] + (0x02AA << 3) ) = 0x00550055;
- V_ULONG( info->start[0] + (0x0555 << 3) ) = 0x00800080;
- V_ULONG( info->start[0] + (0x0555 << 3) ) = 0x00AA00AA;
- V_ULONG( info->start[0] + (0x02AA << 3) ) = 0x00550055;
- V_ULONG( info->start[0] + 4 + (0x0555 << 3) ) = 0x00AA00AA;
- V_ULONG( info->start[0] + 4 + (0x02AA << 3) ) = 0x00550055;
- V_ULONG( info->start[0] + 4 + (0x0555 << 3) ) = 0x00800080;
- V_ULONG( info->start[0] + 4 + (0x0555 << 3) ) = 0x00AA00AA;
- V_ULONG( info->start[0] + 4 + (0x02AA << 3) ) = 0x00550055;
- udelay (1000);
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- V_ULONG( info->start[sect] ) = 0x00300030;
- V_ULONG( info->start[sect] + 4 ) = 0x00300030;
- l_sect = sect;
- }
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- /*
- * We wait for the last triggered sector
- */
- if (l_sect < 0)
- goto DONE;
-
- start = get_timer (0);
- last = start;
- while ((V_ULONG( info->start[l_sect] ) & 0x00800080) != 0x00800080 ||
- (V_ULONG( info->start[l_sect] + 4 ) & 0x00800080) != 0x00800080)
- {
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- return 1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- serial_putc ('.');
- last = now;
- }
- }
-
- DONE:
- /* reset to read mode */
- flash_reset ();
-
- printf (" done\n");
- return 0;
-}
-
-static int write_dword (flash_info_t *, ulong, unsigned char *);
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong dp;
- static unsigned char bb[8];
- int i, l, rc, cc = cnt;
-
- dp = (addr & ~7); /* get lower dword aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - dp) != 0) {
- for (i = 0; i < 8; i++)
- bb[i] = (i < l || (i-l) >= cc) ? V_BYTE(dp+i) : *src++;
- if ((rc = write_dword(info, dp, bb)) != 0)
- {
- return (rc);
- }
- dp += 8;
- cc -= 8 - l;
- }
-
- /*
- * handle word aligned part
- */
- while (cc >= 8) {
- if ((rc = write_dword(info, dp, src)) != 0) {
- return (rc);
- }
- dp += 8;
- src += 8;
- cc -= 8;
- }
-
- if (cc <= 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- for (i = 0; i < 8; i++) {
- bb[i] = (i < cc) ? *src++ : V_BYTE(dp+i);
- }
- return (write_dword(info, dp, bb));
-}
-
-/*-----------------------------------------------------------------------
- * Write a dword to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_dword (flash_info_t *info, ulong dest, unsigned char * pdata)
-{
- ulong start;
- ulong cl = 0, ch =0;
- int flag, i;
-
- for (ch=0, i=0; i < 4; i++)
- ch = (ch << 8) + *pdata++; /* high word */
- for (cl=0, i=0; i < 4; i++)
- cl = (cl << 8) + *pdata++; /* low word */
-
- /* Check if Flash is (sufficiently) erased */
- if ((*((vu_long *)dest) & ch) != ch
- ||(*((vu_long *)(dest + 4)) & cl) != cl)
- {
- return (2);
- }
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- V_ULONG( info->start[0] + (0x0555 << 3) ) = 0x00AA00AA;
- V_ULONG( info->start[0] + (0x02AA << 3) ) = 0x00550055;
- V_ULONG( info->start[0] + (0x0555 << 3) ) = 0x00A000A0;
- V_ULONG( dest ) = ch;
- V_ULONG( info->start[0] + 4 + (0x0555 << 3) ) = 0x00AA00AA;
- V_ULONG( info->start[0] + 4 + (0x02AA << 3) ) = 0x00550055;
- V_ULONG( info->start[0] + 4 + (0x0555 << 3) ) = 0x00A000A0;
- V_ULONG( dest + 4 ) = cl;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* data polling for D7 */
- start = get_timer (0);
- while (((V_ULONG( dest ) & 0x00800080) != (ch & 0x00800080)) ||
- ((V_ULONG( dest + 4 ) & 0x00800080) != (cl & 0x00800080))) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- return (1);
- }
- }
- return (0);
-}
diff --git a/board/ep8260/mii_phy.c b/board/ep8260/mii_phy.c
deleted file mode 100644
index 813f020ee9..0000000000
--- a/board/ep8260/mii_phy.c
+++ /dev/null
@@ -1,107 +0,0 @@
-#include <common.h>
-#include <mii_phy.h>
-#include "ep8260.h"
-
-#define MII_MDIO 0x01
-#define MII_MDCK 0x02
-#define MII_MDIR 0x04
-
-void
-mii_discover_phy(void)
-{
- int known;
- unsigned short phy_reg;
- unsigned long phy_id;
-
- known = 0;
- printf("Discovering phy @ 0: ");
- phy_id = mii_phy_read(2) << 16;
- phy_id |= mii_phy_read(3);
- if ((phy_id & 0xFFFFFC00) == 0x00137800) {
- printf("Level One ");
- if ((phy_id & 0x000003F0) == 0xE0) {
- printf("LXT971A Revision %d\n", (int)(phy_id & 0xF));
- known = 1;
- }
- else printf("unknown type\n");
- }
- else printf("unknown OUI = 0x%08lX\n", phy_id);
-
- phy_reg = mii_phy_read(1);
- if (!(phy_reg & 0x0004)) printf("Link is down\n");
- if (!(phy_reg & 0x0020)) printf("Auto-negotiation not complete\n");
- if (phy_reg & 0x0002) printf("Jabber condition detected\n");
- if (phy_reg & 0x0010) printf("Remote fault condition detected \n");
-
- if (known) {
- phy_reg = mii_phy_read(17);
- if (phy_reg & 0x0400)
- printf("Phy operating at %d MBit/s in %s-duplex mode\n",
- phy_reg & 0x4000 ? 100 : 10,
- phy_reg & 0x0200 ? "full" : "half");
- else
- printf("bad link!!\n");
-/*
-left off: no link, green 100MBit, yellow 10MBit
-right off: no activity, green full-duplex, yellow half-duplex
-*/
- mii_phy_write(20, 0x0452);
- }
-}
-
-unsigned short
-mii_phy_read(unsigned short reg)
-{
- int i;
- unsigned short tmp, val = 0, adr = 0;
- t_ep_regs *regs = (t_ep_regs*)CFG_REGS_BASE;
-
- tmp = 0x6002 | (adr << 7) | (reg << 2);
- regs->bcsr4 = 0xC3;
- for (i = 0; i < 64; i++) {
- regs->bcsr4 ^= MII_MDCK;
- }
- for (i = 0; i < 16; i++) {
- regs->bcsr4 &= ~MII_MDCK;
- if (tmp & 0x8000) regs->bcsr4 |= MII_MDIO;
- else regs->bcsr4 &= ~MII_MDIO;
- regs->bcsr4 |= MII_MDCK;
- tmp <<= 1;
- }
- regs->bcsr4 |= MII_MDIR;
- for (i = 0; i < 16; i++) {
- val <<= 1;
- regs->bcsr4 = MII_MDIO | (regs->bcsr4 | MII_MDCK);
- if (regs->bcsr4 & MII_MDIO) val |= 1;
- regs->bcsr4 = MII_MDIO | (regs->bcsr4 &= ~MII_MDCK);
- }
- return val;
-}
-
-void
-mii_phy_write(unsigned short reg, unsigned short val)
-{
- int i;
- unsigned short tmp, adr = 0;
- t_ep_regs *regs = (t_ep_regs*)CFG_REGS_BASE;
-
- tmp = 0x5002 | (adr << 7) | (reg << 2);
- regs->bcsr4 = 0xC3;
- for (i = 0; i < 64; i++) {
- regs->bcsr4 ^= MII_MDCK;
- }
- for (i = 0; i < 16; i++) {
- regs->bcsr4 &= ~MII_MDCK;
- if (tmp & 0x8000) regs->bcsr4 |= MII_MDIO;
- else regs->bcsr4 &= ~MII_MDIO;
- regs->bcsr4 |= MII_MDCK;
- tmp <<= 1;
- }
- for (i = 0; i < 16; i++) {
- regs->bcsr4 &= ~MII_MDCK;
- if (val & 0x8000) regs->bcsr4 |= MII_MDIO;
- else regs->bcsr4 &= ~MII_MDIO;
- regs->bcsr4 |= MII_MDCK;
- val <<= 1;
- }
-}
diff --git a/board/ep8260/u-boot.lds b/board/ep8260/u-boot.lds
deleted file mode 100644
index 4250e83f76..0000000000
--- a/board/ep8260/u-boot.lds
+++ /dev/null
@@ -1,127 +0,0 @@
-/*
- * (C) Copyright 2001, 2002, 2002
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/opt/cross/lib); SEARCH_DIR(/opt/cross/powerpc-linux/lib);
-/* SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib); */
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc8260/start.o (.text)
- *(.text)
-/* common/environment.o(.text) */
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/eric/Makefile b/board/eric/Makefile
deleted file mode 100644
index f55e7e2f84..0000000000
--- a/board/eric/Makefile
+++ /dev/null
@@ -1,47 +0,0 @@
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o
-SOBJS = init.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/eric/config.mk b/board/eric/config.mk
deleted file mode 100644
index dd0b412095..0000000000
--- a/board/eric/config.mk
+++ /dev/null
@@ -1,29 +0,0 @@
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# esd ADCIOP boards
-#
-
-#TEXT_BASE = 0xFFF80000
-TEXT_BASE = 0xFFFC0000
diff --git a/board/eric/eric.c b/board/eric/eric.c
deleted file mode 100644
index 5413ae15c7..0000000000
--- a/board/eric/eric.c
+++ /dev/null
@@ -1,195 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <i2c.h>
-#include "eric.h"
-#include <asm/processor.h>
-
-#define PPC405GP_GPIO0_OR 0xef600700 /* GPIO Output */
-#define PPC405GP_GPIO0_TCR 0xef600704 /* GPIO Three-State Control */
-#define PPC405GP_GPIO0_ODR 0xef600718 /* GPIO Open Drain */
-#define PPC405GP_GPIO0_IR 0xef60071c /* GPIO Input */
-
-int board_early_init_f (void)
-{
-
- /*-------------------------------------------------------------------------+
- | Interrupt controller setup for the ERIC board.
- | Note: IRQ 0-15 405GP internally generated; active high; level sensitive
- | IRQ 16 405GP internally generated; active low; level sensitive
- | IRQ 17-24 RESERVED
- | IRQ 25 (EXT IRQ 0) FLASH; active low; level sensitive
- | IRQ 26 (EXT IRQ 1) PHY ; active low; level sensitive
- | IRQ 27 (EXT IRQ 2) HOST FAIL, active low; level sensitive
- | indicates NO Power or HOST RESET active
- | check GPIO7 (HOST RESET#) and GPIO8 (NO Power#)
- | for real IRQ source
- | IRQ 28 (EXT IRQ 3) HOST; active high; level sensitive
- | IRQ 29 (EXT IRQ 4) PCI INTC#; active low; level sensitive
- | IRQ 30 (EXT IRQ 5) PCI INTB#; active low; level sensitive
- | IRQ 31 (EXT IRQ 6) PCI INTA#; active low; level sensitive
- | -> IRQ6 Pin is NOW GPIO23 and can be activateted by setting
- | PPC405GP_GPIO0_TCR Bit 0 = 1 (driving the output as defined in PPC405GP_GPIO0_OR,
- | else tristate)
- | Note for ERIC board:
- | An interrupt taken for the HOST (IRQ 28) indicates that
- | the HOST wrote a "1" to one of the following locations
- | - VGA CRT_GPIO0 (if R1216 is loaded)
- | - VGA CRT_GPIO1 (if R1217 is loaded)
- |
- +-------------------------------------------------------------------------*/
-
- mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
- mtdcr (uicer, 0x00000000); /* disable all ints */
- mtdcr (uiccr, 0x00000000); /* set all SMI to be non-critical */
- mtdcr (uicpr, 0xFFFFFF88); /* set int polarities; IRQ3 to 1 */
- mtdcr (uictr, 0x10000000); /* set int trigger levels, UART0 is EDGE */
- mtdcr (uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority */
- mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
-
- mtdcr (cntrl0, 0x00002000); /* set IRQ6 as GPIO23 to generate an interrupt request to the PCP2PCI bridge */
-
- out32 (PPC405GP_GPIO0_OR, 0x60000000); /*fixme is SMB_INT high or low active??; IRQ6 is GPIO23 output */
- out32 (PPC405GP_GPIO0_TCR, 0x7E400000);
-
- return 0;
-}
-
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Check Board Identity:
- */
-
-int checkboard (void)
-{
- char *s = getenv ("serial#");
- char *e;
-
- puts ("Board: ");
-
- if (!s || strncmp (s, "ERIC", 9)) {
- puts ("### No HW ID - assuming ERIC");
- } else {
- for (e = s; *e; ++e) {
- if (*e == ' ')
- break;
- }
-
- for (; s < e; ++s) {
- putc (*s);
- }
- }
-
-
- putc ('\n');
-
- return (0);
-}
-
-
-/* ------------------------------------------------------------------------- */
-/* ------------------------------------------------------------------------- */
-/* ------------------------------------------------------------------------- */
-/*
- initdram(int board_type) reads EEPROM via I2c. EEPROM contains all of
- the necessary info for SDRAM controller configuration
-*/
-/* ------------------------------------------------------------------------- */
-/* ------------------------------------------------------------------------- */
-long int initdram (int board_type)
-{
-#ifndef CONFIG_ERIC
- int i;
- unsigned char datain[128];
- int TotalSize;
-#endif
-
-
-#ifdef CONFIG_ERIC
- /*
- * we have no EEPROM on ERIC
- * so let init.S do the init job for SDRAM
- * and simply return 32MByte here
- */
- return (CFG_SDRAM_SIZE * 1024 * 1024);
-#else
-
- /* Read Serial Presence Detect Information */
- for (i = 0; i < 128; i++)
- datain[i] = 127;
- i2c_send (SPD_EEPROM_ADDRESS, 0, 1, datain, 128);
- printf ("\nReading DIMM...\n");
-#if 0
- for (i = 0; i < 128; i++) {
- printf ("%d=0x%x ", i, datain[i]);
- if (((i + 1) % 10) == 0)
- printf ("\n");
- }
- printf ("\n");
-#endif
-
- /*****************************/
- /* Retrieve interesting data */
- /*****************************/
- /* size of a SDRAM bank */
- /* Number of bytes per side / number of banks per side */
- if (datain[31] == 0x08)
- TotalSize = 32;
- else if (datain[31] == 0x10)
- TotalSize = 64;
- else {
- printf ("IIC READ ERROR!!!\n");
- TotalSize = 32;
- }
-
- /* single-sided DIMM or double-sided DIMM? */
- if (datain[5] != 1) {
- /* double-sided DIMM => SDRAM banks 0..3 are valid */
- printf ("double-sided DIMM\n");
- TotalSize *= 2;
- }
- /* else single-sided DIMM => SDRAM bank 0 and bank 2 are valid */
- else {
- printf ("single-sided DIMM\n");
- }
-
-
- /* return size in Mb unit => *(1024*1024) */
- return (TotalSize * 1024 * 1024);
-#endif
-}
-
-/* ------------------------------------------------------------------------- */
-
-int testdram (void)
-{
- /* TODO: XXX XXX XXX */
- printf ("test: xxx MB - ok\n");
-
- return (0);
-}
-
-/* ------------------------------------------------------------------------- */
diff --git a/board/eric/eric.h b/board/eric/eric.h
deleted file mode 100644
index b50d521d95..0000000000
--- a/board/eric/eric.h
+++ /dev/null
@@ -1,44 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/****************************************************************************
- * FLASH Memory Map as used by TQ Monitor:
- *
- * Start Address Length
- * +-----------------------+ 0x4000_0000 Start of Flash -----------------
- * | MON8xx code | 0x4000_0100 Reset Vector
- * +-----------------------+ 0x400?_????
- * | (unused) |
- * +-----------------------+ 0x4001_FF00
- * | Ethernet Addresses | 0x78
- * +-----------------------+ 0x4001_FF78
- * | (Reserved for MON8xx) | 0x44
- * +-----------------------+ 0x4001_FFBC
- * | Lock Address | 0x04
- * +-----------------------+ 0x4001_FFC0 ^
- * | Hardware Information | 0x40 | MON8xx
- * +=======================+ 0x4002_0000 (sector border) -----------------
- * | Autostart Header | | Applications
- * | ... | v
- *
- *****************************************************************************/
diff --git a/board/eric/flash.c b/board/eric/flash.c
deleted file mode 100644
index c08a760266..0000000000
--- a/board/eric/flash.c
+++ /dev/null
@@ -1,1128 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <ppc4xx.h>
-#include <asm/processor.h>
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-
-#ifdef CFG_FLASH_16BIT
-#define FLASH_WORD_SIZE unsigned short
-#define FLASH_ID_MASK 0xFFFF
-#else
-#define FLASH_WORD_SIZE unsigned long
-#define FLASH_ID_MASK 0xFFFFFFFF
-#endif
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-/* stolen from esteem192e/flash.c */
-ulong flash_get_size (volatile FLASH_WORD_SIZE *addr, flash_info_t *info);
-
-#ifndef CFG_FLASH_16BIT
-static int write_word (flash_info_t *info, ulong dest, ulong data);
-#else
-static int write_short (flash_info_t *info, ulong dest, ushort data);
-#endif
-static void flash_get_offsets (ulong base, flash_info_t *info);
-
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- unsigned long size_b0, size_b1;
- int i;
- uint pbcr;
- unsigned long base_b0, base_b1;
-
- /* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* Static FLASH Bank configuration here - FIXME XXX */
-
- size_b0 = flash_get_size((volatile FLASH_WORD_SIZE *)FLASH_BASE0_PRELIM, &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size_b0, size_b0<<20);
- }
-
- /* Only one bank */
- if (CFG_MAX_FLASH_BANKS == 1)
- {
- /* Setup offsets */
- flash_get_offsets (FLASH_BASE0_PRELIM, &flash_info[0]);
-
- /* Monitor protection ON by default */
-#if 0 /* sand: */
- (void)flash_protect(FLAG_PROTECT_SET,
- FLASH_BASE0_PRELIM-monitor_flash_len+size_b0,
- FLASH_BASE0_PRELIM-1+size_b0,
- &flash_info[0]);
-#else
- (void)flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+monitor_flash_len-1,
- &flash_info[0]);
-#endif
- size_b1 = 0 ;
- flash_info[0].size = size_b0;
- }
-
- /* 2 banks */
- else
- {
- size_b1 = flash_get_size((volatile FLASH_WORD_SIZE *)FLASH_BASE1_PRELIM, &flash_info[1]);
-
- /* Re-do sizing to get full correct info */
-
- if (size_b1)
- {
- mtdcr(ebccfga, pb0cr);
- pbcr = mfdcr(ebccfgd);
- mtdcr(ebccfga, pb0cr);
- base_b1 = -size_b1;
- pbcr = (pbcr & 0x0001ffff) | base_b1 | (((size_b1/1024/1024)-1)<<17);
- mtdcr(ebccfgd, pbcr);
- /* printf("pb1cr = %x\n", pbcr); */
- }
-
- if (size_b0)
- {
- mtdcr(ebccfga, pb1cr);
- pbcr = mfdcr(ebccfgd);
- mtdcr(ebccfga, pb1cr);
- base_b0 = base_b1 - size_b0;
- pbcr = (pbcr & 0x0001ffff) | base_b0 | (((size_b0/1024/1024)-1)<<17);
- mtdcr(ebccfgd, pbcr);
- /* printf("pb0cr = %x\n", pbcr); */
- }
-
- size_b0 = flash_get_size((volatile FLASH_WORD_SIZE *)base_b0, &flash_info[0]);
-
- flash_get_offsets (base_b0, &flash_info[0]);
-
- /* monitor protection ON by default */
-#if 0 /* sand: */
- (void)flash_protect(FLAG_PROTECT_SET,
- FLASH_BASE0_PRELIM-monitor_flash_len+size_b0,
- FLASH_BASE0_PRELIM-1+size_b0,
- &flash_info[0]);
-#else
- (void)flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+monitor_flash_len-1,
- &flash_info[0]);
-#endif
-
- if (size_b1) {
- /* Re-do sizing to get full correct info */
- size_b1 = flash_get_size((volatile FLASH_WORD_SIZE *)base_b1, &flash_info[1]);
-
- flash_get_offsets (base_b1, &flash_info[1]);
-
- /* monitor protection ON by default */
- (void)flash_protect(FLAG_PROTECT_SET,
- base_b1+size_b1-monitor_flash_len,
- base_b1+size_b1-1,
- &flash_info[1]);
- /* monitor protection OFF by default (one is enough) */
- (void)flash_protect(FLAG_PROTECT_CLEAR,
- base_b0+size_b0-monitor_flash_len,
- base_b0+size_b0-1,
- &flash_info[0]);
- } else {
- flash_info[1].flash_id = FLASH_UNKNOWN;
- flash_info[1].sector_count = -1;
- }
-
- flash_info[0].size = size_b0;
- flash_info[1].size = size_b1;
- }/* else 2 banks */
- return (size_b0 + size_b1);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-static void flash_get_offsets (ulong base, flash_info_t *info)
-{
- int i;
-
- /* set up sector start adress table */
- if ((info->flash_id & FLASH_TYPEMASK) == FLASH_28F320J3A ||
- (info->flash_id & FLASH_TYPEMASK) == FLASH_28F640J3A ||
- (info->flash_id & FLASH_TYPEMASK) == FLASH_28F128J3A) {
- for (i = 0; i < info->sector_count; i++) {
- info->start[i] = base + (i * info->size/info->sector_count);
- }
- } else if (info->flash_id & FLASH_BTYPE) {
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
-
-#ifndef CFG_FLASH_16BIT
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00004000;
- info->start[2] = base + 0x00008000;
- info->start[3] = base + 0x0000C000;
- info->start[4] = base + 0x00010000;
- info->start[5] = base + 0x00014000;
- info->start[6] = base + 0x00018000;
- info->start[7] = base + 0x0001C000;
- for (i = 8; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00020000) - 0x000E0000;
- }
- }
- else {
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00008000;
- info->start[2] = base + 0x0000C000;
- info->start[3] = base + 0x00010000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00020000) - 0x00060000;
- }
- }
-#else
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00002000;
- info->start[2] = base + 0x00004000;
- info->start[3] = base + 0x00006000;
- info->start[4] = base + 0x00008000;
- info->start[5] = base + 0x0000A000;
- info->start[6] = base + 0x0000C000;
- info->start[7] = base + 0x0000E000;
- for (i = 8; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00010000) - 0x00070000;
- }
- }
- else {
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00004000;
- info->start[2] = base + 0x00006000;
- info->start[3] = base + 0x00008000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00010000) - 0x00030000;
- }
- }
-#endif
- } else {
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
-
-#ifndef CFG_FLASH_16BIT
- info->start[i--] = base + info->size - 0x00004000;
- info->start[i--] = base + info->size - 0x00008000;
- info->start[i--] = base + info->size - 0x0000C000;
- info->start[i--] = base + info->size - 0x00010000;
- info->start[i--] = base + info->size - 0x00014000;
- info->start[i--] = base + info->size - 0x00018000;
- info->start[i--] = base + info->size - 0x0001C000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00020000;
- }
-
- } else {
-
- info->start[i--] = base + info->size - 0x00008000;
- info->start[i--] = base + info->size - 0x0000C000;
- info->start[i--] = base + info->size - 0x00010000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00020000;
- }
- }
-#else
- info->start[i--] = base + info->size - 0x00002000;
- info->start[i--] = base + info->size - 0x00004000;
- info->start[i--] = base + info->size - 0x00006000;
- info->start[i--] = base + info->size - 0x00008000;
- info->start[i--] = base + info->size - 0x0000A000;
- info->start[i--] = base + info->size - 0x0000C000;
- info->start[i--] = base + info->size - 0x0000E000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00010000;
- }
-
- } else {
-
- info->start[i--] = base + info->size - 0x00004000;
- info->start[i--] = base + info->size - 0x00006000;
- info->start[i--] = base + info->size - 0x00008000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00010000;
- }
- }
-#endif
- }
-
-
-}
-
-/*-----------------------------------------------------------------------
- */
-
-void flash_print_info (flash_info_t *info)
-{
- int i;
- uchar *boottype;
- uchar botboot[]=", bottom boot sect)\n";
- uchar topboot[]=", top boot sector)\n";
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD: printf ("AMD "); break;
- case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
- case FLASH_MAN_SST: printf ("SST "); break;
- case FLASH_MAN_STM: printf ("STM "); break;
- case FLASH_MAN_INTEL: printf ("INTEL "); break;
- default: printf ("Unknown Vendor "); break;
- }
-
- if (info->flash_id & 0x0001 ) {
- boottype = botboot;
- } else {
- boottype = topboot;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM400B: printf ("AM29LV400B (4 Mbit%s",boottype);
- break;
- case FLASH_AM400T: printf ("AM29LV400T (4 Mbit%s",boottype);
- break;
- case FLASH_AM800B: printf ("AM29LV800B (8 Mbit%s",boottype);
- break;
- case FLASH_AM800T: printf ("AM29LV800T (8 Mbit%s",boottype);
- break;
- case FLASH_AM160B: printf ("AM29LV160B (16 Mbit%s",boottype);
- break;
- case FLASH_AM160T: printf ("AM29LV160T (16 Mbit%s",boottype);
- break;
- case FLASH_AM320B: printf ("AM29LV320B (32 Mbit%s",boottype);
- break;
- case FLASH_AM320T: printf ("AM29LV320T (32 Mbit%s",boottype);
- break;
- case FLASH_INTEL800B: printf ("INTEL28F800B (8 Mbit%s",boottype);
- break;
- case FLASH_INTEL800T: printf ("INTEL28F800T (8 Mbit%s",boottype);
- break;
- case FLASH_INTEL160B: printf ("INTEL28F160B (16 Mbit%s",boottype);
- break;
- case FLASH_INTEL160T: printf ("INTEL28F160T (16 Mbit%s",boottype);
- break;
- case FLASH_INTEL320B: printf ("INTEL28F320B (32 Mbit%s",boottype);
- break;
- case FLASH_INTEL320T: printf ("INTEL28F320T (32 Mbit%s",boottype);
- break;
-
-#if 0 /* enable when devices are available */
-
- case FLASH_INTEL640B: printf ("INTEL28F640B (64 Mbit%s",boottype);
- break;
- case FLASH_INTEL640T: printf ("INTEL28F640T (64 Mbit%s",boottype);
- break;
-#endif
- case FLASH_28F320J3A: printf ("INTEL28F320J3A (32 Mbit%s",boottype);
- break;
- case FLASH_28F640J3A: printf ("INTEL28F640J3A (64 Mbit%s",boottype);
- break;
- case FLASH_28F128J3A: printf ("INTEL28F128J3A (128 Mbit%s",boottype);
- break;
-
- default: printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " "
- );
- }
- printf ("\n");
- return;
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-ulong flash_get_size (volatile FLASH_WORD_SIZE *addr, flash_info_t *info)
-{
- short i;
- ulong base = (ulong)addr;
- FLASH_WORD_SIZE value;
-
- /* Write auto select command: read Manufacturer ID */
-
-
-#ifndef CFG_FLASH_16BIT
-
- /*
- * Note: if it is an AMD flash and the word at addr[0000]
- * is 0x00890089 this routine will think it is an Intel
- * flash device and may(most likely) cause trouble.
- */
-
- addr[0x0000] = 0x00900090;
- if(addr[0x0000] != 0x00890089){
- addr[0x0555] = 0x00AA00AA;
- addr[0x02AA] = 0x00550055;
- addr[0x0555] = 0x00900090;
-#else
-
- /*
- * Note: if it is an AMD flash and the word at addr[0000]
- * is 0x0089 this routine will think it is an Intel
- * flash device and may(most likely) cause trouble.
- */
-
- addr[0x0000] = 0x0090;
-
- if(addr[0x0000] != 0x0089){
- addr[0x0555] = 0x00AA;
- addr[0x02AA] = 0x0055;
- addr[0x0555] = 0x0090;
-#endif
- }
- value = addr[0];
-
- switch (value) {
- case (AMD_MANUFACT & FLASH_ID_MASK):
- info->flash_id = FLASH_MAN_AMD;
- break;
- case (FUJ_MANUFACT & FLASH_ID_MASK):
- info->flash_id = FLASH_MAN_FUJ;
- break;
- case (STM_MANUFACT & FLASH_ID_MASK):
- info->flash_id = FLASH_MAN_STM;
- break;
- case (SST_MANUFACT & FLASH_ID_MASK):
- info->flash_id = FLASH_MAN_SST;
- break;
- case (INTEL_MANUFACT & FLASH_ID_MASK):
- info->flash_id = FLASH_MAN_INTEL;
- break;
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- return (0); /* no or unknown flash */
-
- }
-
- value = addr[1]; /* device ID */
-
- switch (value) {
-
- case (AMD_ID_LV400T & FLASH_ID_MASK):
- info->flash_id += FLASH_AM400T;
- info->sector_count = 11;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case (AMD_ID_LV400B & FLASH_ID_MASK):
- info->flash_id += FLASH_AM400B;
- info->sector_count = 11;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case (AMD_ID_LV800T & FLASH_ID_MASK):
- info->flash_id += FLASH_AM800T;
- info->sector_count = 19;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case (AMD_ID_LV800B & FLASH_ID_MASK):
- info->flash_id += FLASH_AM800B;
- info->sector_count = 19;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case (AMD_ID_LV160T & FLASH_ID_MASK):
- info->flash_id += FLASH_AM160T;
- info->sector_count = 35;
- info->size = 0x00400000;
- break; /* => 4 MB */
-
- case (AMD_ID_LV160B & FLASH_ID_MASK):
- info->flash_id += FLASH_AM160B;
- info->sector_count = 35;
- info->size = 0x00400000;
- break; /* => 4 MB */
-#if 0 /* enable when device IDs are available */
- case (AMD_ID_LV320T & FLASH_ID_MASK):
- info->flash_id += FLASH_AM320T;
- info->sector_count = 67;
- info->size = 0x00800000;
- break; /* => 8 MB */
-
- case (AMD_ID_LV320B & FLASH_ID_MASK):
- info->flash_id += FLASH_AM320B;
- info->sector_count = 67;
- info->size = 0x00800000;
- break; /* => 8 MB */
-#endif
-
- case (INTEL_ID_28F800B3T & FLASH_ID_MASK):
- info->flash_id += FLASH_INTEL800T;
- info->sector_count = 23;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case (INTEL_ID_28F800B3B & FLASH_ID_MASK):
- info->flash_id += FLASH_INTEL800B;
- info->sector_count = 23;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case (INTEL_ID_28F160B3T & FLASH_ID_MASK):
- info->flash_id += FLASH_INTEL160T;
- info->sector_count = 39;
- info->size = 0x00400000;
- break; /* => 4 MB */
-
- case (INTEL_ID_28F160B3B & FLASH_ID_MASK):
- info->flash_id += FLASH_INTEL160B;
- info->sector_count = 39;
- info->size = 0x00400000;
- break; /* => 4 MB */
-
- case (INTEL_ID_28F320B3T & FLASH_ID_MASK):
- info->flash_id += FLASH_INTEL320T;
- info->sector_count = 71;
- info->size = 0x00800000;
- break; /* => 8 MB */
-
- case (INTEL_ID_28F320B3B & FLASH_ID_MASK):
- info->flash_id += FLASH_AM320B;
- info->sector_count = 71;
- info->size = 0x00800000;
- break; /* => 8 MB */
-
-#if 0 /* enable when devices are available */
- case (INTEL_ID_28F320B3T & FLASH_ID_MASK):
- info->flash_id += FLASH_INTEL320T;
- info->sector_count = 135;
- info->size = 0x01000000;
- break; /* => 16 MB */
-
- case (INTEL_ID_28F320B3B & FLASH_ID_MASK):
- info->flash_id += FLASH_AM320B;
- info->sector_count = 135;
- info->size = 0x01000000;
- break; /* => 16 MB */
-#endif
- case (INTEL_ID_28F320J3A & FLASH_ID_MASK):
- info->flash_id += FLASH_28F320J3A;
- info->sector_count = 32;
- info->size = 0x00400000;
- break; /* => 32 MBit */
- case (INTEL_ID_28F640J3A & FLASH_ID_MASK):
- info->flash_id += FLASH_28F640J3A;
- info->sector_count = 64;
- info->size = 0x00800000;
- break; /* => 64 MBit */
- case (INTEL_ID_28F128J3A & FLASH_ID_MASK):
- info->flash_id += FLASH_28F128J3A;
- info->sector_count = 128;
- info->size = 0x01000000;
- break; /* => 128 MBit */
-
- default:
- /* FIXME*/
- info->flash_id = FLASH_UNKNOWN;
- return (0); /* => no or unknown flash */
- }
-
- flash_get_offsets(base, info);
-
- /* check for protected sectors */
- for (i = 0; i < info->sector_count; i++) {
- /* read sector protection at sector address, (A7 .. A0) = 0x02 */
- /* D0 = 1 if protected */
- addr = (volatile FLASH_WORD_SIZE *)(info->start[i]);
- info->protect[i] = addr[2] & 1;
- }
-
- /*
- * Prevent writes to uninitialized FLASH.
- */
- if (info->flash_id != FLASH_UNKNOWN) {
- addr = (volatile FLASH_WORD_SIZE *)info->start[0];
- if( (info->flash_id & 0xFF00) == FLASH_MAN_INTEL){
- *addr = (0x00F000F0 & FLASH_ID_MASK); /* reset bank */
- } else {
- *addr = (0x00FF00FF & FLASH_ID_MASK); /* reset bank */
- }
- }
-
- return (info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
-
- volatile FLASH_WORD_SIZE *addr=(volatile FLASH_WORD_SIZE*)(info->start[0]);
- int flag, prot, sect, l_sect, barf;
- ulong start, now, last;
- int rcode = 0;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- if ((info->flash_id == FLASH_UNKNOWN) ||
- ((info->flash_id > FLASH_AMD_COMP) &&
- ( (info->flash_id & FLASH_VENDMASK) != FLASH_MAN_INTEL ) ) ){
- printf ("Can't erase unknown flash type - aborted\n");
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- l_sect = -1;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
- if(info->flash_id < FLASH_AMD_COMP) {
-#ifndef CFG_FLASH_16BIT
- addr[0x0555] = 0x00AA00AA;
- addr[0x02AA] = 0x00550055;
- addr[0x0555] = 0x00800080;
- addr[0x0555] = 0x00AA00AA;
- addr[0x02AA] = 0x00550055;
-#else
- addr[0x0555] = 0x00AA;
- addr[0x02AA] = 0x0055;
- addr[0x0555] = 0x0080;
- addr[0x0555] = 0x00AA;
- addr[0x02AA] = 0x0055;
-#endif
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr = (volatile FLASH_WORD_SIZE *)(info->start[sect]);
- addr[0] = (0x00300030 & FLASH_ID_MASK);
- l_sect = sect;
- }
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- /*
- * We wait for the last triggered sector
- */
- if (l_sect < 0)
- goto DONE;
-
- start = get_timer (0);
- last = start;
- addr = (volatile FLASH_WORD_SIZE*)(info->start[l_sect]);
- while ((addr[0] & (0x00800080&FLASH_ID_MASK)) !=
- (0x00800080&FLASH_ID_MASK) )
- {
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- return 1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- serial_putc ('.');
- last = now;
- }
- }
-
-DONE:
- /* reset to read mode */
- addr = (volatile FLASH_WORD_SIZE *)info->start[0];
- addr[0] = (0x00F000F0 & FLASH_ID_MASK); /* reset bank */
- } else {
-
-
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- barf = 0;
-#ifndef CFG_FLASH_16BIT
- addr = (vu_long*)(info->start[sect]);
- addr[0] = 0x00200020;
- addr[0] = 0x00D000D0;
- while(!(addr[0] & 0x00800080)); /* wait for error or finish */
- if( addr[0] & 0x003A003A) { /* check for error */
- barf = addr[0] & 0x003A0000;
- if( barf ) {
- barf >>=16;
- } else {
- barf = addr[0] & 0x0000003A;
- }
- }
-#else
- addr = (vu_short*)(info->start[sect]);
- addr[0] = 0x0020;
- addr[0] = 0x00D0;
- while(!(addr[0] & 0x0080)); /* wait for error or finish */
- if( addr[0] & 0x003A) /* check for error */
- barf = addr[0] & 0x003A;
-#endif
- if(barf) {
- printf("\nFlash error in sector at %lx\n",(unsigned long)addr);
- if(barf & 0x0002) printf("Block locked, not erased.\n");
- if((barf & 0x0030) == 0x0030)
- printf("Command Sequence error.\n");
- if((barf & 0x0030) == 0x0020)
- printf("Block Erase error.\n");
- if(barf & 0x0008) printf("Vpp Low error.\n");
- rcode = 1;
- } else printf(".");
- l_sect = sect;
- }
- addr = (volatile FLASH_WORD_SIZE *)info->start[0];
- addr[0] = (0x00FF00FF & FLASH_ID_MASK); /* reset bank */
-
- }
-
- }
- printf (" done\n");
- return rcode;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-/*flash_info_t *addr2info (ulong addr)
-{
- flash_info_t *info;
- int i;
-
- for (i=0, info=&flash_info[0]; i<CFG_MAX_FLASH_BANKS; ++i, ++info) {
- if ((addr >= info->start[0]) &&
- (addr < (info->start[0] + info->size)) ) {
- return (info);
- }
- }
-
- return (NULL);
-}
-*/
-/*-----------------------------------------------------------------------
- * Copy memory to flash.
- * Make sure all target addresses are within Flash bounds,
- * and no protected sectors are hit.
- * Returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- * 4 - target range includes protected sectors
- * 8 - target address not in Flash memory
- */
-
-/*int flash_write (uchar *src, ulong addr, ulong cnt)
-{
- int i;
- ulong end = addr + cnt - 1;
- flash_info_t *info_first = addr2info (addr);
- flash_info_t *info_last = addr2info (end );
- flash_info_t *info;
-
- if (cnt == 0) {
- return (0);
- }
-
- if (!info_first || !info_last) {
- return (8);
- }
-
- for (info = info_first; info <= info_last; ++info) {
- ulong b_end = info->start[0] + info->size;*/ /* bank end addr */
-/* short s_end = info->sector_count - 1;
- for (i=0; i<info->sector_count; ++i) {
- ulong e_addr = (i == s_end) ? b_end : info->start[i + 1];
-
- if ((end >= info->start[i]) && (addr < e_addr) &&
- (info->protect[i] != 0) ) {
- return (4);
- }
- }
- }
-
-*/ /* finally write data to flash */
-/* for (info = info_first; info <= info_last && cnt>0; ++info) {
- ulong len;
-
- len = info->start[0] + info->size - addr;
- if (len > cnt)
- len = cnt;
- if ((i = write_buff(info, src, addr, len)) != 0) {
- return (i);
- }
- cnt -= len;
- addr += len;
- src += len;
- }
- return (0);
-}
-*/
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
-#ifndef CFG_FLASH_16BIT
- ulong cp, wp, data;
- int l;
-#else
- ulong cp, wp;
- ushort data;
-#endif
- int i, rc;
-
-#ifndef CFG_FLASH_16BIT
-
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
- for (; i<4 && cnt>0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = 0;
- for (i=0; i<4; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- return (write_word(info, wp, data));
-
-#else
- wp = (addr & ~1); /* get lower word aligned address */
-
- /*
- * handle unaligned start byte
- */
- if (addr - wp) {
- data = 0;
- data = (data << 8) | *src++;
- --cnt;
- if ((rc = write_short(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 2;
- }
-
- /*
- * handle word aligned part
- */
-/* l = 0; used for debuging */
- while (cnt >= 2) {
- data = 0;
- for (i=0; i<2; ++i) {
- data = (data << 8) | *src++;
- }
-
-/* if(!l){
- printf("%x",data);
- l = 1;
- } used for debuging */
-
- if ((rc = write_short(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 2;
- cnt -= 2;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<2 && cnt>0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i<2; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- return (write_short(info, wp, data));
-
-
-#endif
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-#ifndef CFG_FLASH_16BIT
-static int write_word (flash_info_t *info, ulong dest, ulong data)
-{
- vu_long *addr = (vu_long*)(info->start[0]);
- ulong start,barf;
- int flag;
-
-
- /* Check if Flash is (sufficiently) erased */
- if ((*((vu_long *)dest) & data) != data) {
- return (2);
- }
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- if(info->flash_id > FLASH_AMD_COMP) {
- /* AMD stuff */
- addr[0x0555] = 0x00AA00AA;
- addr[0x02AA] = 0x00550055;
- addr[0x0555] = 0x00A000A0;
- } else {
- /* intel stuff */
- *addr = 0x00400040;
- }
- *((vu_long *)dest) = data;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* data polling for D7 */
- start = get_timer (0);
-
- if(info->flash_id > FLASH_AMD_COMP) {
-
- while ((*((vu_long *)dest) & 0x00800080) != (data & 0x00800080)) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- return (1);
- }
- }
-
- } else {
-
- while(!(addr[0] & 0x00800080)){ /* wait for error or finish */
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- return (1);
- }
-
- if( addr[0] & 0x003A003A) { /* check for error */
- barf = addr[0] & 0x003A0000;
- if( barf ) {
- barf >>=16;
- } else {
- barf = addr[0] & 0x0000003A;
- }
- printf("\nFlash write error at address %lx\n",(unsigned long)dest);
- if(barf & 0x0002) printf("Block locked, not erased.\n");
- if(barf & 0x0010) printf("Programming error.\n");
- if(barf & 0x0008) printf("Vpp Low error.\n");
- return(2);
- }
-
-
- }
-
- return (0);
-
-}
-
-#else
-
-static int write_short (flash_info_t *info, ulong dest, ushort data)
-{
- vu_short *addr = (vu_short*)(info->start[0]);
- ulong start,barf;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*((vu_short *)dest) & data) != data) {
- return (2);
- }
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- if(info->flash_id < FLASH_AMD_COMP) {
- /* AMD stuff */
- addr[0x0555] = 0x00AA;
- addr[0x02AA] = 0x0055;
- addr[0x0555] = 0x00A0;
- } else {
- /* intel stuff */
- *addr = 0x00D0;
- *addr = 0x0040;
- }
- *((vu_short *)dest) = data;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* data polling for D7 */
- start = get_timer (0);
-
- if(info->flash_id < FLASH_AMD_COMP) {
- /* AMD stuff */
- while ((*((vu_short *)dest) & 0x0080) != (data & 0x0080)) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- return (1);
- }
- }
-
- } else {
- /* intel stuff */
- while(!(addr[0] & 0x0080)){ /* wait for error or finish */
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) return (1);
- }
-
- if( addr[0] & 0x003A) { /* check for error */
- barf = addr[0] & 0x003A;
- printf("\nFlash write error at address %lx\n",(unsigned long)dest);
- if(barf & 0x0002) printf("Block locked, not erased.\n");
- if(barf & 0x0010) printf("Programming error.\n");
- if(barf & 0x0008) printf("Vpp Low error.\n");
- return(2);
- }
- *addr = 0x00B0;
- *addr = 0x0070;
- while(!(addr[0] & 0x0080)){ /* wait for error or finish */
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) return (1);
- }
-
- *addr = 0x00FF;
-
- }
-
- return (0);
-
-}
-
-
-#endif
-
-/*-----------------------------------------------------------------------
- */
diff --git a/board/eric/init.S b/board/eric/init.S
deleted file mode 100644
index 9d4e7ff482..0000000000
--- a/board/eric/init.S
+++ /dev/null
@@ -1,355 +0,0 @@
-/*------------------------------------------------------------------------------+ */
-/* */
-/* This source code has been made available to you by IBM on an AS-IS */
-/* basis. Anyone receiving this source is licensed under IBM */
-/* copyrights to use it in any way he or she deems fit, including */
-/* copying it, modifying it, compiling it, and redistributing it either */
-/* with or without modifications. No license under IBM patents or */
-/* patent applications is to be implied by the copyright license. */
-/* */
-/* Any user of this software should understand that IBM cannot provide */
-/* technical support for this software and will not be responsible for */
-/* any consequences resulting from the use of this software. */
-/* */
-/* Any person who transfers this source code or any derivative work */
-/* must include the IBM copyright notice, this paragraph, and the */
-/* preceding two paragraphs in the transferred software. */
-/* */
-/* COPYRIGHT I B M CORPORATION 1995 */
-/* LICENSED MATERIAL - PROGRAM PROPERTY OF I B M */
-/*------------------------------------------------------------------------------- */
-
-/*----------------------------------------------------------------------------- */
-/* Function: ext_bus_cntlr_init */
-/* Description: Initializes the External Bus Controller for the external */
-/* peripherals. IMPORTANT: For pass1 this code must run from */
-/* cache since you can not reliably change a peripheral banks */
-/* timing register (pbxap) while running code from that bank. */
-/* For ex., since we are running from ROM on bank 0, we can NOT */
-/* execute the code that modifies bank 0 timings from ROM, so */
-/* we run it from cache. */
-/* */
-/*----------------------------------------------------------------------------- */
-#include <config.h>
-#include <ppc4xx.h>
-
-#define _LINUX_CONFIG_H 1 /* avoid reading Linux autoconf.h file */
-
-#include <ppc_asm.tmpl>
-#include <ppc_defs.h>
-
-#include <asm/cache.h>
-#include <asm/mmu.h>
-
-
- .globl ext_bus_cntlr_init
-ext_bus_cntlr_init:
- mflr r4 /* save link register */
- bl ..getAddr
-..getAddr:
- mflr r3 /* get address of ..getAddr */
- mtlr r4 /* restore link register */
- addi r4,0,14 /* set ctr to 10; used to prefetch */
- mtctr r4 /* 10 cache lines to fit this function */
- /* in cache (gives us 8x10=80 instrctns) */
-..ebcloop:
- icbt r0,r3 /* prefetch cache line for addr in r3 */
- addi r3,r3,32 /* move to next cache line */
- bdnz ..ebcloop /* continue for 10 cache lines */
-
- /*------------------------------------------------------------------- */
- /* Delay to ensure all accesses to ROM are complete before changing */
- /* bank 0 timings. 200usec should be enough. */
- /* 200,000,000 (cycles/sec) X .000200 (sec) = 0x9C40 cycles */
- /*------------------------------------------------------------------- */
- addis r3,0,0x0
- ori r3,r3,0xA000 /* ensure 200usec have passed since reset */
- mtctr r3
-..spinlp:
- bdnz ..spinlp /* spin loop */
-
- /*----------------------------------------------------------------------- */
- /* Memory Bank 0 (Flash) initialization (from openbios) */
- /*----------------------------------------------------------------------- */
-
- addi r4,0,pb0ap
- mtdcr ebccfga,r4
- addis r4,0,CS0_AP@h
- ori r4,r4,CS0_AP@l
- mtdcr ebccfgd,r4
-
- addi r4,0,pb0cr
- mtdcr ebccfga,r4
- addis r4,0,CS0_CR@h
- ori r4,r4,CS0_CR@l
- mtdcr ebccfgd,r4
-
- /*----------------------------------------------------------------------- */
- /* Memory Bank 1 (NVRAM/RTC) initialization */
- /*----------------------------------------------------------------------- */
-
- addi r4,0,pb1ap
- mtdcr ebccfga,r4
- addis r4,0,CS1_AP@h
- ori r4,r4,CS1_AP@l
- mtdcr ebccfgd,r4
-
- addi r4,0,pb1cr
- mtdcr ebccfga,r4
- addis r4,0,CS1_CR@h
- ori r4,r4,CS1_CR@l
- mtdcr ebccfgd,r4
-
- /*----------------------------------------------------------------------- */
- /* Memory Bank 2 (A/D converter) initialization */
- /*----------------------------------------------------------------------- */
-
- addi r4,0,pb2ap
- mtdcr ebccfga,r4
- addis r4,0,CS2_AP@h
- ori r4,r4,CS2_AP@l
- mtdcr ebccfgd,r4
-
- addi r4,0,pb2cr
- mtdcr ebccfga,r4
- addis r4,0,CS2_CR@h
- ori r4,r4,CS2_CR@l
- mtdcr ebccfgd,r4
-
- /*----------------------------------------------------------------------- */
- /* Memory Bank 3 (Ethernet PHY Reset) initialization */
- /*----------------------------------------------------------------------- */
-
- addi r4,0,pb3ap
- mtdcr ebccfga,r4
- addis r4,0,CS3_AP@h
- ori r4,r4,CS3_AP@l
- mtdcr ebccfgd,r4
-
- addi r4,0,pb3cr
- mtdcr ebccfga,r4
- addis r4,0,CS3_CR@h
- ori r4,r4,CS3_CR@l
- mtdcr ebccfgd,r4
-
- /*----------------------------------------------------------------------- */
- /* Memory Bank 4 (PC-MIP PRSNT1#) initialization */
- /*----------------------------------------------------------------------- */
-
- addi r4,0,pb4ap
- mtdcr ebccfga,r4
- addis r4,0,CS4_AP@h
- ori r4,r4,CS4_AP@l
- mtdcr ebccfgd,r4
-
- addi r4,0,pb4cr
- mtdcr ebccfga,r4
- addis r4,0,CS4_CR@h
- ori r4,r4,CS4_CR@l
- mtdcr ebccfgd,r4
-
- /*----------------------------------------------------------------------- */
- /* Memory Bank 5 (PC-MIP PRSNT2#) initialization */
- /*----------------------------------------------------------------------- */
-
- addi r4,0,pb5ap
- mtdcr ebccfga,r4
- addis r4,0,CS5_AP@h
- ori r4,r4,CS5_AP@l
- mtdcr ebccfgd,r4
-
- addi r4,0,pb5cr
- mtdcr ebccfga,r4
- addis r4,0,CS5_CR@h
- ori r4,r4,CS5_CR@l
- mtdcr ebccfgd,r4
-
- /*----------------------------------------------------------------------- */
- /* Memory Bank 6 (CPU LED0) initialization */
- /*----------------------------------------------------------------------- */
-
- addi r4,0,pb6ap
- mtdcr ebccfga,r4
- addis r4,0,CS6_AP@h
- ori r4,r4,CS6_AP@l
- mtdcr ebccfgd,r4
-
- addi r4,0,pb6cr
- mtdcr ebccfga,r4
- addis r4,0,CS6_CR@h
- ori r4,r4,CS5_CR@l
- mtdcr ebccfgd,r4
-
- /*----------------------------------------------------------------------- */
- /* Memory Bank 7 (CPU LED1) initialization */
- /*----------------------------------------------------------------------- */
-
- addi r4,0,pb7ap
- mtdcr ebccfga,r4
- addis r4,0,CS7_AP@h
- ori r4,r4,CS7_AP@l
- mtdcr ebccfgd,r4
-
- addi r4,0,pb7cr
- mtdcr ebccfga,r4
- addis r4,0,CS7_CR@h
- ori r4,r4,CS7_CR@l
- mtdcr ebccfgd,r4
-
-/* addis r4,r0,FPGA_BRDC@h */
-/* ori r4,r4,FPGA_BRDC@l */
-/* lbz r3,0(r4) /###*get FPGA board control reg */
-/* eieio */
-/* ori r3,r3,0x01 /###*set UART1 control to select CTS/RTS */
-/* stb r3,0(r4) */
-
- nop /* pass2 DCR errata #8 */
- blr
-
-/*----------------------------------------------------------------------------- */
-/* Function: sdram_init */
-/* Description: Configures SDRAM memory banks on ERIC. */
-/* We do manually init our SDRAM. */
-/* If we have two SDRAM banks, simply undef SINGLE_BANK (ROLF :-) */
-/* It is assumed that a 32MB 12x8(2) SDRAM is used. */
-/*----------------------------------------------------------------------------- */
- .globl sdram_init
-
-sdram_init:
-
- mflr r31
-
-#ifdef CFG_SDRAM_MANUALLY
- /*------------------------------------------------------------------- */
- /* Set MB0CF for bank 0. (0-32MB) Address Mode 4 since 12x8(2) */
- /*------------------------------------------------------------------- */
-
- addi r4,0,mem_mb0cf
- mtdcr memcfga,r4
- addis r4,0,MB0CF@h
- ori r4,r4,MB0CF@l
- mtdcr memcfgd,r4
-
- /*------------------------------------------------------------------- */
- /* Set MB1CF for bank 1. (32MB-64MB) Address Mode 4 since 12x8(2) */
- /*------------------------------------------------------------------- */
-
- addi r4,0,mem_mb1cf
- mtdcr memcfga,r4
- addis r4,0,MB1CF@h
- ori r4,r4,MB1CF@l
- mtdcr memcfgd,r4
-
- /*------------------------------------------------------------------- */
- /* Set MB2CF for bank 2. off */
- /*------------------------------------------------------------------- */
-
- addi r4,0,mem_mb2cf
- mtdcr memcfga,r4
- addis r4,0,MB2CF@h
- ori r4,r4,MB2CF@l
- mtdcr memcfgd,r4
-
- /*------------------------------------------------------------------- */
- /* Set MB3CF for bank 3. off */
- /*------------------------------------------------------------------- */
-
- addi r4,0,mem_mb3cf
- mtdcr memcfga,r4
- addis r4,0,MB3CF@h
- ori r4,r4,MB3CF@l
- mtdcr memcfgd,r4
-
- /*------------------------------------------------------------------- */
- /* Set the SDRAM Timing reg, SDTR1 and the refresh timer reg, RTR. */
- /* To set the appropriate timings, we need to know the SDRAM speed. */
- /* We can use the PLB speed since the SDRAM speed is the same as */
- /* the PLB speed. The PLB speed is the FBK divider times the */
- /* 405GP reference clock, which on the Walnut board is 33Mhz. */
- /* Thus, if FBK div is 2, SDRAM is 66Mhz; if FBK div is 3, SDRAM is */
- /* 100Mhz; if FBK is 3, SDRAM is 133Mhz. */
- /* NOTE: The Walnut board supports SDRAM speeds of 66Mhz, 100Mhz, and */
- /* maybe 133Mhz. */
- /*------------------------------------------------------------------- */
-
- mfdcr r5,strap /* determine FBK divider */
- /* via STRAP reg to calc PLB speed. */
- /* SDRAM speed is the same as the PLB */
- /* speed. */
- rlwinm r4,r5,4,0x3 /* get FBK divide bits */
-
-..chk_66:
- cmpi %cr0,0,r4,0x1
- bne ..chk_100
- addis r6,0,SDTR_66@h /* SDTR1 value for 66Mhz */
- ori r6,r6,SDTR_66@l
- addis r7,0,RTR_66 /* RTR value for 66Mhz */
- b ..sdram_ok
-..chk_100:
- cmpi %cr0,0,r4,0x2
- bne ..chk_133
- addis r6,0,SDTR_100@h /* SDTR1 value for 100Mhz */
- ori r6,r6,SDTR_100@l
- addis r7,0,RTR_100 /* RTR value for 100Mhz */
- b ..sdram_ok
-..chk_133:
- addis r6,0,0x0107 /* SDTR1 value for 133Mhz */
- ori r6,r6,0x4015
- addis r7,0,0x07F0 /* RTR value for 133Mhz */
-
-..sdram_ok:
- /*------------------------------------------------------------------- */
- /* Set SDTR1 */
- /*------------------------------------------------------------------- */
- addi r4,0,mem_sdtr1
- mtdcr memcfga,r4
- mtdcr memcfgd,r6
-
- /*------------------------------------------------------------------- */
- /* Set RTR */
- /*------------------------------------------------------------------- */
- addi r4,0,mem_rtr
- mtdcr memcfga,r4
- mtdcr memcfgd,r7
-
- /*------------------------------------------------------------------- */
- /* Delay to ensure 200usec have elapsed since reset. Assume worst */
- /* case that the core is running 200Mhz: */
- /* 200,000,000 (cycles/sec) X .000200 (sec) = 0x9C40 cycles */
- /*------------------------------------------------------------------- */
- addis r3,0,0x0000
- ori r3,r3,0xA000 /* ensure 200usec have passed since reset */
- mtctr r3
-..spinlp2:
- bdnz ..spinlp2 /* spin loop */
-
- /*------------------------------------------------------------------- */
- /* Set memory controller options reg, MCOPT1. */
- /* Set DC_EN to '1' and BRD_PRF to '01' for 16 byte PLB Burst */
- /* read/prefetch. */
- /*------------------------------------------------------------------- */
- addi r4,0,mem_mcopt1
- mtdcr memcfga,r4
- addis r4,0,0x8080 /* set DC_EN=1 */
- ori r4,r4,0x0000
- mtdcr memcfgd,r4
-
- /*------------------------------------------------------------------- */
- /* Delay to ensure 10msec have elapsed since reset. This is */
- /* required for the MPC952 to stabalize. Assume worst */
- /* case that the core is running 200Mhz: */
- /* 200,000,000 (cycles/sec) X .010 (sec) = 0x1E8480 cycles */
- /* This delay should occur before accessing SDRAM. */
- /*------------------------------------------------------------------- */
- addis r3,0,0x001E
- ori r3,r3,0x8480 /* ensure 10msec have passed since reset */
- mtctr r3
-..spinlp3:
- bdnz ..spinlp3 /* spin loop */
-
-#else
-/*fixme: do SDRAM Autoconfig from EEPROM here */
-
-#endif
- mtlr r31 /* restore lr */
- blr
diff --git a/board/eric/u-boot.lds b/board/eric/u-boot.lds
deleted file mode 100644
index 4a0e5b4aed..0000000000
--- a/board/eric/u-boot.lds
+++ /dev/null
@@ -1,153 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- .resetvec 0xFFFFFFFC :
- {
- *(.resetvec)
- } = 0xffff
-
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/ppc4xx/start.o (.text)
- board/eric/init.o (.text)
- cpu/ppc4xx/kgdb.o (.text)
- cpu/ppc4xx/traps.o (.text)
- cpu/ppc4xx/interrupts.o (.text)
- cpu/ppc4xx/serial.o (.text)
- cpu/ppc4xx/cpu_init.o (.text)
- cpu/ppc4xx/speed.o (.text)
- cpu/ppc4xx/4xx_enet.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/extable.o (.text)
- lib_generic/zlib.o (.text)
-
-/* . = env_offset;*/
- common/environment.o(.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/esd/adciop/Makefile b/board/esd/adciop/Makefile
deleted file mode 100644
index 67cf29b328..0000000000
--- a/board/esd/adciop/Makefile
+++ /dev/null
@@ -1,47 +0,0 @@
-
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o ../common/misc.o ../common/pci.o
-
-$(LIB): $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/esd/adciop/adciop.c b/board/esd/adciop/adciop.c
deleted file mode 100644
index 7a11a12cef..0000000000
--- a/board/esd/adciop/adciop.c
+++ /dev/null
@@ -1,97 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include "adciop.h"
-
-/* ------------------------------------------------------------------------- */
-
-#define _NOT_USED_ 0xFFFFFFFF
-
-/* ------------------------------------------------------------------------- */
-
-
-int board_early_init_f (void)
-{
- /*
- * Set port pin in escc2 to keep living, and configure user led output
- */
- *(unsigned char *) 0x2000033e = 0x77; /* ESCC2: PCR bit3=pwr on, bit7=led out */
- *(unsigned char *) 0x2000033c = 0x88; /* ESCC2: PVR pwr on, led off */
-
- /*
- * Init pci regs
- */
- *(unsigned long *) 0x50000304 = 0x02900007; /* enable mem/io/master bits */
- *(unsigned long *) 0x500001b4 = 0x00000000; /* disable pci interrupt output enable */
- *(unsigned long *) 0x50000354 = 0x00c05800; /* disable emun interrupt output enable */
- *(unsigned long *) 0x50000344 = 0x00000000; /* disable pme interrupt output enable */
- *(unsigned long *) 0x50000310 = 0x00000000; /* pcibar0 */
- *(unsigned long *) 0x50000314 = 0x00000000; /* pcibar1 */
- *(unsigned long *) 0x50000318 = 0x00000000; /* pcibar2 */
-
- return 0;
-}
-
-
-/*
- * Check Board Identity:
- */
-
-int checkboard (void)
-{
- char str[64];
- int i = getenv_r ("serial#", str, sizeof (str));
-
- puts ("Board: ");
-
- if (!i || strncmp (str, "ADCIOP", 6)) {
- puts ("### No HW ID - assuming ADCIOP\n");
- return (1);
- }
-
- puts (str);
-
- putc ('\n');
-
- return 0;
-}
-
-/* ------------------------------------------------------------------------- */
-
-long int initdram (int board_type)
-{
- return (16 * 1024 * 1024);
-}
-
-/* ------------------------------------------------------------------------- */
-
-int testdram (void)
-{
- /* TODO: XXX XXX XXX */
- printf ("test: 16 MB - ok\n");
-
- return (0);
-}
-
-/* ------------------------------------------------------------------------- */
diff --git a/board/esd/adciop/adciop.h b/board/esd/adciop/adciop.h
deleted file mode 100644
index 5fc313a258..0000000000
--- a/board/esd/adciop/adciop.h
+++ /dev/null
@@ -1,44 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/****************************************************************************
- * FLASH Memory Map as used by TQ Monitor:
- *
- * Start Address Length
- * +-----------------------+ 0x4000_0000 Start of Flash -----------------
- * | MON8xx code | 0x4000_0100 Reset Vector
- * +-----------------------+ 0x400?_????
- * | (unused) |
- * +-----------------------+ 0x4001_FF00
- * | Ethernet Addresses | 0x78
- * +-----------------------+ 0x4001_FF78
- * | (Reserved for MON8xx) | 0x44
- * +-----------------------+ 0x4001_FFBC
- * | Lock Address | 0x04
- * +-----------------------+ 0x4001_FFC0 ^
- * | Hardware Information | 0x40 | MON8xx
- * +=======================+ 0x4002_0000 (sector border) -----------------
- * | Autostart Header | | Applications
- * | ... | v
- *
- *****************************************************************************/
diff --git a/board/esd/adciop/config.mk b/board/esd/adciop/config.mk
deleted file mode 100644
index 747f29f77e..0000000000
--- a/board/esd/adciop/config.mk
+++ /dev/null
@@ -1,33 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# esd ADCIOP boards
-#
-
-# FLASH:
-#TEXT_BASE = 0xFFFE0000
-TEXT_BASE = 0xFFFD0000
-
-# SDRAM:
-#TEXT_BASE = 0x00FE0000
diff --git a/board/esd/adciop/flash.c b/board/esd/adciop/flash.c
deleted file mode 100644
index d9eccba1ea..0000000000
--- a/board/esd/adciop/flash.c
+++ /dev/null
@@ -1,113 +0,0 @@
-/*
- * (C) Copyright 2001
- * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <ppc4xx.h>
-#include <asm/processor.h>
-
-/*
- * include common flash code (for esd boards)
- */
-#include "../common/flash.c"
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (vu_long *addr, flash_info_t *info);
-static void flash_get_offsets (ulong base, flash_info_t *info);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- unsigned long size_b0, size_b1;
- int i;
-
- /* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size_b0, size_b0<<20);
- }
-
- size_b1 = flash_get_size((vu_long *)FLASH_BASE1_PRELIM, &flash_info[1]);
-
- if (size_b1 > size_b0) {
- printf ("## ERROR: "
- "Bank 1 (0x%08lx = %ld MB) > Bank 0 (0x%08lx = %ld MB)\n",
- size_b1, size_b1<<20,
- size_b0, size_b0<<20
- );
- flash_info[0].flash_id = FLASH_UNKNOWN;
- flash_info[1].flash_id = FLASH_UNKNOWN;
- flash_info[0].sector_count = -1;
- flash_info[1].sector_count = -1;
- flash_info[0].size = 0;
- flash_info[1].size = 0;
- return (0);
- }
-
- /* Re-do sizing to get full correct info */
- size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
-
- flash_get_offsets (FLASH_BASE0_PRELIM, &flash_info[0]);
-
- /* monitor protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- FLASH_BASE0_PRELIM+size_b0-monitor_flash_len,
- FLASH_BASE0_PRELIM+size_b0-1,
- &flash_info[0]);
-
- if (size_b1) {
- /* Re-do sizing to get full correct info */
- size_b1 = flash_get_size((vu_long *)(FLASH_BASE0_PRELIM + size_b0),
- &flash_info[1]);
-
- flash_get_offsets (FLASH_BASE0_PRELIM + size_b0, &flash_info[1]);
-
- /* monitor protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- FLASH_BASE0_PRELIM+size_b0+size_b1-monitor_flash_len,
- FLASH_BASE0_PRELIM+size_b0+size_b1-1,
- &flash_info[1]);
- /* monitor protection OFF by default (one is enough) */
- flash_protect(FLAG_PROTECT_CLEAR,
- FLASH_BASE0_PRELIM+size_b0-monitor_flash_len,
- FLASH_BASE0_PRELIM+size_b0-1,
- &flash_info[0]);
- } else {
- flash_info[1].flash_id = FLASH_UNKNOWN;
- flash_info[1].sector_count = -1;
- }
-
- flash_info[0].size = size_b0;
- flash_info[1].size = size_b1;
-
- return (size_b0 + size_b1);
-}
diff --git a/board/esd/adciop/u-boot.lds b/board/esd/adciop/u-boot.lds
deleted file mode 100644
index ef937dd015..0000000000
--- a/board/esd/adciop/u-boot.lds
+++ /dev/null
@@ -1,139 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- .resetvec 0xFFFFFFFC :
- {
- *(.resetvec)
- } = 0xffff
-
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/ppc4xx/start.o (.text)
- cpu/ppc4xx/traps.o (.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/esd/apc405/Makefile b/board/esd/apc405/Makefile
deleted file mode 100644
index 8529ec70c0..0000000000
--- a/board/esd/apc405/Makefile
+++ /dev/null
@@ -1,46 +0,0 @@
-#
-# (C) Copyright 2000, 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o strataflash.o ../common/misc.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $^
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/esd/apc405/apc405.c b/board/esd/apc405/apc405.c
deleted file mode 100644
index 4b2b07a393..0000000000
--- a/board/esd/apc405/apc405.c
+++ /dev/null
@@ -1,376 +0,0 @@
-/*
- * (C) Copyright 2001-2003
- * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/processor.h>
-#include <command.h>
-#include <malloc.h>
-
-/* ------------------------------------------------------------------------- */
-
-#if 0
-#define FPGA_DEBUG
-#endif
-
-extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
-extern void lxt971_no_sleep(void);
-
-/* fpga configuration data - gzip compressed and generated by bin2c */
-const unsigned char fpgadata[] =
-{
-#include "fpgadata.c"
-};
-
-/*
- * include common fpga code (for esd boards)
- */
-#include "../common/fpga.c"
-
-
-/* Prototypes */
-int gunzip(void *, int, unsigned char *, unsigned long *);
-
-
-#ifdef CONFIG_LCD_USED
-/* logo bitmap data - gzip compressed and generated by bin2c */
-unsigned char logo_bmp[] =
-{
-#include CFG_LCD_LOGO_NAME
-};
-
-/*
- * include common lcd code (for esd boards)
- */
-#include "../common/lcd.c"
-
-#include CFG_LCD_HEADER_NAME
-#endif /* CONFIG_LCD_USED */
-
-
-int board_revision(void)
-{
- unsigned long cntrl0Reg;
- unsigned long value;
-
- /*
- * Get version of APC405 board from GPIO's
- */
-
- /*
- * Setup GPIO pins (CS2/GPIO11 and CS3/GPIO12 as GPIO)
- */
- cntrl0Reg = mfdcr(cntrl0);
- mtdcr(cntrl0, cntrl0Reg | 0x03000000);
- out32(GPIO0_ODR, in32(GPIO0_ODR) & ~0x00180000);
- out32(GPIO0_TCR, in32(GPIO0_TCR) & ~0x00180000);
- udelay(1000); /* wait some time before reading input */
- value = in32(GPIO0_IR) & 0x00180000; /* get config bits */
-
- /*
- * Restore GPIO settings
- */
- mtdcr(cntrl0, cntrl0Reg);
-
- switch (value) {
- case 0x00180000:
- /* CS2==1 && CS3==1 -> version <= 1.2 */
- return 2;
- case 0x00080000:
- /* CS2==0 && CS3==1 -> version 1.3 */
- return 3;
-#if 0 /* not yet manufactured ! */
- case 0x00100000:
- /* CS2==1 && CS3==0 -> version 1.4 */
- return 4;
- case 0x00000000:
- /* CS2==0 && CS3==0 -> version 1.5 */
- return 5;
-#endif
- default:
- /* should not be reached! */
- return 0;
- }
-}
-
-
-int board_early_init_f (void)
-{
- /*
- * First pull fpga-prg pin low, to disable fpga logic (on version 2 board)
- */
- out32(GPIO0_ODR, 0x00000000); /* no open drain pins */
- out32(GPIO0_TCR, CFG_FPGA_PRG); /* setup for output */
- out32(GPIO0_OR, CFG_FPGA_PRG); /* set output pins to high */
- out32(GPIO0_OR, 0); /* pull prg low */
-
- /*
- * IRQ 0-15 405GP internally generated; active high; level sensitive
- * IRQ 16 405GP internally generated; active low; level sensitive
- * IRQ 17-24 RESERVED
- * IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive
- * IRQ 26 (EXT IRQ 1) SER0 ; active low; level sensitive
- * IRQ 27 (EXT IRQ 2) SER1; active low; level sensitive
- * IRQ 28 (EXT IRQ 3) FPGA 0; active low; level sensitive
- * IRQ 29 (EXT IRQ 4) FPGA 1; active low; level sensitive
- * IRQ 30 (EXT IRQ 5) PCI INTA; active low; level sensitive
- * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
- */
- mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
- mtdcr(uicer, 0x00000000); /* disable all ints */
- mtdcr(uiccr, 0x00000000); /* set all to be non-critical*/
- mtdcr(uicpr, 0xFFFFFF81); /* set int polarities */
- mtdcr(uictr, 0x10000000); /* set int trigger levels */
- mtdcr(uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority*/
- mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
-
- /*
- * EBC Configuration Register: set ready timeout to 512 ebc-clks -> ca. 15 us
- */
-#if 1 /* test-only */
- mtebc (epcr, 0xa8400000); /* ebc always driven */
-#else
- mtebc (epcr, 0x28400000); /* ebc in high-z */
-#endif
-
- return 0;
-}
-
-
-/* ------------------------------------------------------------------------- */
-
-int misc_init_f (void)
-{
- return 0; /* dummy implementation */
-}
-
-
-int misc_init_r (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- volatile unsigned short *fpga_mode =
- (unsigned short *)((ulong)CFG_FPGA_BASE_ADDR + CFG_FPGA_CTRL);
- volatile unsigned short *fpga_ctrl2 =
- (unsigned short *)((ulong)CFG_FPGA_BASE_ADDR + CFG_FPGA_CTRL2);
- volatile unsigned char *duart0_mcr =
- (unsigned char *)((ulong)DUART0_BA + 4);
- volatile unsigned char *duart1_mcr =
- (unsigned char *)((ulong)DUART1_BA + 4);
- volatile unsigned short *fuji_lcdbl_pwm =
- (unsigned short *)((ulong)0xf0100200 + 0xa0);
- unsigned char *dst;
- ulong len = sizeof(fpgadata);
- int status;
- int index;
- int i;
- unsigned long cntrl0Reg;
-
- /*
- * Setup GPIO pins (CS6+CS7 as GPIO)
- */
- cntrl0Reg = mfdcr(cntrl0);
- mtdcr(cntrl0, cntrl0Reg | 0x00300000);
-
- dst = malloc(CFG_FPGA_MAX_SIZE);
- if (gunzip (dst, CFG_FPGA_MAX_SIZE, (uchar *)fpgadata, &len) != 0) {
- printf ("GUNZIP ERROR - must RESET board to recover\n");
- do_reset (NULL, 0, 0, NULL);
- }
-
- status = fpga_boot(dst, len);
- if (status != 0) {
- printf("\nFPGA: Booting failed ");
- switch (status) {
- case ERROR_FPGA_PRG_INIT_LOW:
- printf("(Timeout: INIT not low after asserting PROGRAM*)\n ");
- break;
- case ERROR_FPGA_PRG_INIT_HIGH:
- printf("(Timeout: INIT not high after deasserting PROGRAM*)\n ");
- break;
- case ERROR_FPGA_PRG_DONE:
- printf("(Timeout: DONE not high after programming FPGA)\n ");
- break;
- }
-
- /* display infos on fpgaimage */
- index = 15;
- for (i=0; i<4; i++) {
- len = dst[index];
- printf("FPGA: %s\n", &(dst[index+1]));
- index += len+3;
- }
- putc ('\n');
- /* delayed reboot */
- for (i=20; i>0; i--) {
- printf("Rebooting in %2d seconds \r",i);
- for (index=0;index<1000;index++)
- udelay(1000);
- }
- putc ('\n');
- do_reset(NULL, 0, 0, NULL);
- }
-
- /* restore gpio/cs settings */
- mtdcr(cntrl0, cntrl0Reg);
-
- puts("FPGA: ");
-
- /* display infos on fpgaimage */
- index = 15;
- for (i=0; i<4; i++) {
- len = dst[index];
- printf("%s ", &(dst[index+1]));
- index += len+3;
- }
- putc ('\n');
-
- free(dst);
-
- /*
- * Reset FPGA via FPGA_DATA pin
- */
- SET_FPGA(FPGA_PRG | FPGA_CLK);
- udelay(1000); /* wait 1ms */
- SET_FPGA(FPGA_PRG | FPGA_CLK | FPGA_DATA);
- udelay(1000); /* wait 1ms */
-
- /*
- * Write board revision in FPGA
- */
- *fpga_ctrl2 = (*fpga_ctrl2 & 0xfff0) | (gd->board_type & 0x000f);
-
- /*
- * Enable power on PS/2 interface (with reset)
- */
- *fpga_mode |= CFG_FPGA_CTRL_PS2_RESET;
- for (i=0;i<100;i++)
- udelay(1000);
- udelay(1000);
- *fpga_mode &= ~CFG_FPGA_CTRL_PS2_RESET;
-
- /*
- * Enable interrupts in exar duart mcr[3]
- */
- *duart0_mcr = 0x08;
- *duart1_mcr = 0x08;
-
- /*
- * Init lcd interface and display logo
- */
- lcd_init((uchar *)CFG_LCD_BIG_REG, (uchar *)CFG_LCD_BIG_MEM,
- regs_13806_640_480_16bpp,
- sizeof(regs_13806_640_480_16bpp)/sizeof(regs_13806_640_480_16bpp[0]),
- logo_bmp, sizeof(logo_bmp));
-
- /*
- * Reset microcontroller and setup backlight PWM controller
- */
- *fpga_mode |= 0x0014;
- for (i=0;i<10;i++)
- udelay(1000);
- *fpga_mode |= 0x001c;
- *fuji_lcdbl_pwm = 0x00ff;
-
- return (0);
-}
-
-
-/*
- * Check Board Identity:
- */
-
-int checkboard (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- unsigned char str[64];
- int i = getenv_r ("serial#", str, sizeof(str));
-
- puts ("Board: ");
-
- if (i == -1) {
- puts ("### No HW ID - assuming APC405");
- } else {
- puts(str);
- }
-
- gd->board_type = board_revision();
- printf(", Rev 1.%ld\n", gd->board_type);
-
- /*
- * Disable sleep mode in LXT971
- */
- lxt971_no_sleep();
-
- return 0;
-}
-
-/* ------------------------------------------------------------------------- */
-
-long int initdram (int board_type)
-{
- unsigned long val;
-
- mtdcr(memcfga, mem_mb0cf);
- val = mfdcr(memcfgd);
-
-#if 0
- printf("\nmb0cf=%x\n", val); /* test-only */
- printf("strap=%x\n", mfdcr(strap)); /* test-only */
-#endif
-
- return (4*1024*1024 << ((val & 0x000e0000) >> 17));
-}
-
-/* ------------------------------------------------------------------------- */
-
-int testdram (void)
-{
- /* TODO: XXX XXX XXX */
- printf ("test: 16 MB - ok\n");
-
- return (0);
-}
-
-/* ------------------------------------------------------------------------- */
-
-#ifdef CONFIG_IDE_RESET
-
-void ide_set_reset(int on)
-{
- volatile unsigned short *fpga_mode =
- (unsigned short *)((ulong)CFG_FPGA_BASE_ADDR + CFG_FPGA_CTRL);
-
- /*
- * Assert or deassert CompactFlash Reset Pin
- */
- if (on) { /* assert RESET */
- *fpga_mode &= ~(CFG_FPGA_CTRL_CF_RESET);
- } else { /* release RESET */
- *fpga_mode |= CFG_FPGA_CTRL_CF_RESET;
- }
-}
-
-#endif /* CONFIG_IDE_RESET */
-
-/* ------------------------------------------------------------------------- */
diff --git a/board/esd/apc405/config.mk b/board/esd/apc405/config.mk
deleted file mode 100644
index 11faad2e00..0000000000
--- a/board/esd/apc405/config.mk
+++ /dev/null
@@ -1,28 +0,0 @@
-#
-# (C) Copyright 2000, 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# esd ABG405 boards
-#
-
-TEXT_BASE = 0xFFF80000
diff --git a/board/esd/apc405/fpgadata.c b/board/esd/apc405/fpgadata.c
deleted file mode 100644
index c31625a99a..0000000000
--- a/board/esd/apc405/fpgadata.c
+++ /dev/null
@@ -1,2280 +0,0 @@
- 0x1f,0x8b,0x08,0x08,0x30,0x6a,0x41,0x42,0x00,0x03,0x61,0x62,0x67,0x34,0x30,0x35,
- 0x5f,0x31,0x5f,0x30,0x32,0x2e,0x62,0x69,0x74,0x00,0xed,0xbd,0x0b,0x74,0x1c,0xd5,
- 0x95,0x2e,0xbc,0xeb,0x54,0x49,0x2e,0x75,0xb7,0xd4,0xa5,0x87,0x89,0x00,0x63,0x4a,
- 0x2d,0xd9,0xb4,0x3d,0x6d,0xb9,0x2d,0x1b,0x59,0x08,0x59,0x2a,0x3d,0x20,0x1d,0xec,
- 0x60,0x41,0x98,0xc4,0x93,0x9f,0xcb,0x34,0xc4,0xc9,0x78,0xb2,0x9c,0x5c,0x43,0x72,
- 0xe7,0x3a,0x8f,0x21,0x47,0x0f,0xdb,0x6d,0xcb,0xe0,0xb6,0x71,0x12,0x67,0xe2,0x24,
- 0xed,0x07,0x60,0x88,0x27,0xd3,0x96,0x0d,0x96,0x31,0x81,0x92,0x11,0x20,0x1b,0x61,
- 0x2b,0x84,0x49,0xcc,0x23,0xd0,0x26,0x82,0x08,0x22,0x8c,0x30,0x0e,0x91,0xdf,0xff,
- 0xde,0xa7,0xba,0xaa,0xab,0x65,0x67,0xee,0xcc,0xbd,0x97,0xb5,0xfe,0xf5,0xaf,0x74,
- 0xd6,0x4c,0x76,0xaa,0x8e,0x4b,0x55,0xa7,0x4e,0xed,0xfd,0x9d,0xbd,0xbf,0xbd,0x37,
- 0xe4,0xf9,0x47,0xad,0xff,0x00,0x48,0x77,0x82,0x76,0xe7,0x5d,0xff,0x30,0x27,0x7c,
- 0xed,0xdf,0xcf,0xfa,0xfb,0x70,0x55,0xe5,0xd7,0xbf,0xb4,0x18,0xee,0x02,0x4f,0xd5,
- 0x37,0xae,0x0d,0x7f,0xe5,0x1f,0xaa,0xae,0xad,0x86,0x2f,0x81,0xb7,0x2a,0x1c,0xbe,
- 0x76,0x66,0x78,0xf6,0xcc,0xaa,0xd9,0xb0,0x18,0xf2,0x66,0xcd,0xa9,0x0d,0xd7,0xd4,
- 0x86,0x67,0xc1,0x97,0x41,0x2a,0xf4,0x5d,0xc0,0xdf,0xa3,0x3f,0xfa,0xdb,0xaf,0x84,
- 0x81,0x4b,0x00,0x30,0x21,0x2c,0x45,0xe9,0xbf,0xbd,0x61,0x49,0x97,0x80,0x37,0xcc,
- 0x08,0x83,0x49,0xff,0x1b,0xd2,0xe7,0xf3,0xc2,0xa0,0xbb,0xff,0xb7,0x14,0x06,0x03,
- 0x5a,0xa1,0x5e,0x81,0x22,0xf8,0x5f,0xff,0x24,0x50,0xb8,0x2d,0xff,0x57,0xc7,0xb3,
- 0xff,0xc4,0x78,0xfc,0xfd,0x6f,0x8f,0xff,0xcf,0xdc,0x0f,0x80,0xf2,0xbf,0x3d,0x5e,
- 0xfb,0xcf,0x8d,0xb7,0x85,0x0b,0x1a,0xfe,0x8b,0x1c,0x90,0x68,0x76,0x4b,0xfe,0x92,
- 0x60,0x34,0xf4,0xd9,0xd7,0x37,0x73,0xce,0xc3,0x05,0xde,0x90,0xf2,0x9f,0x95,0xbf,
- 0xc5,0x5f,0x08,0xef,0x1d,0x58,0x30,0xd6,0xfc,0x12,0xfb,0x00,0xe6,0xa6,0xfc,0xfd,
- 0xf2,0xbd,0xd0,0xd7,0x3e,0xfb,0xb0,0x6f,0x4c,0x1e,0x85,0x65,0xe9,0xf1,0x5c,0x3b,
- 0x0e,0xfb,0x79,0x65,0xca,0x1b,0x66,0xff,0x68,0xac,0xbb,0xa7,0x7c,0x40,0xed,0xc9,
- 0x7d,0x07,0xd6,0xf1,0x40,0xca,0x1b,0x63,0x21,0xd8,0xc1,0x03,0x83,0x6a,0x0f,0x4b,
- 0x29,0xe1,0xf4,0xf8,0x58,0xce,0x00,0xec,0x86,0x90,0xe9,0xad,0x62,0xc1,0xd8,0x36,
- 0x49,0x37,0x63,0x61,0x96,0x82,0x6d,0x9a,0x6e,0xfe,0x98,0x07,0x16,0xe0,0x34,0xea,
- 0xfd,0xd3,0xc3,0xec,0x2d,0xc9,0xbe,0xbe,0x39,0x71,0x27,0xec,0x87,0xca,0x5e,0x6f,
- 0x92,0x4d,0x97,0x7f,0x0e,0x01,0x53,0x4d,0x06,0x52,0xbc,0x0b,0x02,0xbd,0x5e,0x2e,
- 0xae,0xbf,0xd5,0xf4,0x24,0x9b,0x46,0x95,0xa8,0xfd,0xc0,0x85,0x23,0xa5,0x67,0xa0,
- 0xde,0xf4,0x27,0x65,0x43,0xff,0xa3,0x54,0x6d,0x4e,0x4a,0xb2,0x67,0xe0,0xf7,0x50,
- 0xdd,0xeb,0x5f,0x2b,0x2f,0x80,0x43,0x66,0xd8,0x2c,0x48,0xca,0xa6,0xd2,0x9a,0x1e,
- 0x9e,0x92,0x9e,0x84,0x0b,0xd0,0x60,0x8a,0xaf,0xe0,0x4d,0x14,0xbe,0x37,0x8a,0x4f,
- 0x77,0x46,0xc2,0x23,0x87,0xe4,0xb3,0xfa,0x79,0xbc,0x54,0xfe,0xa8,0x3c,0x06,0xf6,
- 0xf5,0x0d,0x6d,0x27,0xa4,0xaf,0x5f,0xa6,0x7d,0x89,0xce,0x26,0xe5,0x63,0xf0,0x82,
- 0x56,0x65,0xfa,0x3b,0xe5,0xa5,0xf0,0xaa,0x5e,0x4b,0xd7,0x6f,0x55,0xf4,0xf4,0xf8,
- 0xfe,0x9c,0x90,0x86,0xf7,0x6f,0x7a,0x93,0xde,0x28,0xac,0x53,0x66,0xe2,0x3f,0x64,
- 0x29,0x69,0x1d,0xaf,0x36,0x3f,0x03,0x72,0x08,0xda,0x53,0xe5,0x2f,0x2b,0x49,0x76,
- 0x02,0x57,0x7f,0xfa,0x7e,0x72,0x16,0x58,0xf3,0x93,0x64,0x0a,0x0a,0x95,0xbd,0xf3,
- 0xc3,0x45,0xfd,0xd0,0x91,0xd0,0x4d,0x2f,0xe4,0xfa,0x20,0xce,0x83,0xa6,0x1c,0x66,
- 0x63,0x60,0xdf,0x7f,0x54,0x9a,0x0c,0x7b,0xf9,0x8c,0x54,0xd7,0x77,0xd8,0x65,0x2d,
- 0x3f,0x4c,0xcc,0x18,0xf2,0x2e,0x6f,0x3f,0x01,0xab,0xf8,0x94,0x61,0x6f,0x7f,0xee,
- 0x53,0xbc,0x93,0x97,0xa5,0xd4,0xe5,0x97,0xf5,0x3b,0xd7,0x8f,0xa8,0x3e,0xbc,0x6c,
- 0x9d,0xe9,0xaf,0x65,0x01,0xfe,0x51,0x22,0xd4,0xe7,0xbf,0x4e,0xee,0x65,0x1d,0x4a,
- 0x78,0xe4,0x6a,0xc9,0x5b,0xa9,0x0e,0x42,0x8d,0xe9,0x0f,0xcb,0xb7,0x3a,0xab,0xde,
- 0xb8,0x2a,0x3d,0x3f,0x49,0x39,0x05,0x1f,0x68,0x0d,0x7d,0x05,0xa3,0xe5,0xa3,0xc6,
- 0x05,0x4f,0xbd,0x79,0x9f,0x81,0xcf,0x7b,0xce,0x3a,0x35,0x98,0x6b,0xcf,0xcf,0x8e,
- 0x9c,0x91,0xf4,0xfc,0x48,0x2a,0x4e,0x4b,0xfd,0x09,0x1f,0xce,0x36,0xfc,0x1a,0x6a,
- 0xcd,0x7c,0x2e,0x1f,0x87,0xa3,0x7c,0x36,0xcd,0xcf,0x7b,0xce,0xfa,0x89,0x14,0x6e,
- 0x86,0xbd,0x30,0xa3,0xd7,0xbb,0x2c,0x58,0xca,0x56,0x69,0xf3,0x8e,0x5e,0xb1,0x4c,
- 0x1e,0x84,0x87,0xb5,0x69,0xa6,0xd7,0x60,0x67,0x61,0x25,0x94,0x1d,0xf5,0x2e,0x63,
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diff --git a/board/esd/apc405/logo_640_480_24bpp.c b/board/esd/apc405/logo_640_480_24bpp.c
deleted file mode 100644
index c52a430dd9..0000000000
--- a/board/esd/apc405/logo_640_480_24bpp.c
+++ /dev/null
@@ -1,235 +0,0 @@
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- 0x78,0x51,0xda,0x03,0x7c,0x19,0xee,0x4c,0x17,0x64,0x74,0xc7,0xc9,0x46,0xfa,0x66,
- 0x78,0xd4,0xb4,0xb5,0x39,0x05,0xc1,0xe0,0x61,0x6e,0x53,0x28,0x07,0x43,0xce,0x49,
- 0xd2,0x9e,0x30,0x44,0xef,0xea,0xdf,0x85,0x3b,0xd3,0x05,0x19,0xdd,0x71,0xb2,0x91,
- 0xbe,0x19,0x1e,0x35,0x6d,0x6d,0x4e,0x41,0x30,0x78,0x9e,0xd4,0x37,0xb3,0xb2,0xef,
- 0x8e,0x84,0x1c,0x15,0xa6,0x3d,0xe1,0xbe,0xc6,0xa5,0x0f,0x84,0x3b,0xd3,0x05,0x19,
- 0xdd,0x71,0xb2,0x91,0xbe,0x19,0x1e,0x35,0x6d,0x6d,0x4e,0x41,0x30,0x78,0xa4,0xbc,
- 0x67,0xb3,0xb8,0xef,0x8e,0x24,0x1c,0x15,0xe6,0x72,0xf1,0xa2,0xd2,0x56,0x38,0xd5,
- 0x05,0x19,0xc5,0x71,0xbe,0x94,0xbe,0x9a,0x1f,0x35,0x6d,0x6d,0x4e,0x41,0x30,0x78,
- 0xa4,0xbc,0x97,0xb3,0xb2,0x4d,0x0e,0xc6,0x1b,0x15,0xa6,0x37,0xe1,0xbe,0xc6,0xa5,
- 0x0f,0x84,0x3b,0xd3,0x05,0x19,0xc5,0x71,0xbe,0x94,0x5e,0xce,0x5f,0x1b,0xf5,0xe9,
- 0xb4,0xc0,0x51,0xe1,0xd3,0xe0,0x91,0xf2,0x1e,0xcf,0xca,0xbe,0x3b,0x12,0x6f,0x4e,
- 0x92,0x09,0x21,0x37,0x75,0xad,0x7b,0x2c,0x5c,0x8e,0xec,0x00,0xb1,0x5b,0x08,0x3f,
- 0x99,0x8c,0x39,0xf0,0x78,0x49,0x8f,0x67,0x65,0xdf,0x1d,0x89,0x37,0x27,0xc9,0x84,
- 0x90,0x9b,0xba,0xd6,0x3d,0x9c,0x2f,0x41,0xef,0xea,0x67,0x5d,0x2b,0x18,0x3c,0x5b,
- 0xf8,0xfb,0x59,0xd9,0x77,0x47,0xb2,0x8d,0x0a,0x33,0x21,0xe4,0x8e,0xae,0x75,0x0f,
- 0xe7,0x6b,0x2d,0x8e,0x8c,0xd5,0xcf,0x1a,0x9b,0x2d,0xe2,0x7a,0xe1,0x7e,0x62,0xdf,
- 0xcf,0xe2,0xbe,0x3b,0x12,0x6c,0x54,0x98,0x8b,0x26,0xdc,0xcf,0x59,0xa1,0xb7,0x35,
- 0xc2,0x57,0x5f,0x30,0x36,0xdb,0xf6,0xdd,0xc2,0x5d,0xc5,0x3e,0xa1,0x95,0x6d,0x72,
- 0x24,0xd5,0xa8,0x30,0x17,0x4d,0xb8,0x9f,0xb3,0x42,0x6f,0x6b,0x84,0xaf,0x1e,0x9b,
- 0x76,0x6c,0x30,0x78,0xbc,0xc0,0x57,0xb4,0xb2,0x4d,0x8e,0xa4,0x9a,0x93,0xe4,0xba,
- 0x09,0xf7,0x73,0x56,0xe8,0x2d,0x8e,0xf0,0xd5,0x63,0xa3,0x4e,0xce,0x06,0x8f,0x17,
- 0xf5,0x90,0x56,0xb6,0xc9,0x91,0x48,0x73,0x92,0xb4,0xc7,0xdb,0x7c,0x09,0xbb,0xd6,
- 0x3d,0x9c,0xaf,0xb5,0x38,0xc2,0x57,0x0f,0x8f,0x3a,0x36,0x18,0x70,0xc1,0xbe,0x9b,
- 0x96,0x27,0xef,0xcc,0x1b,0x13,0x86,0x44,0x2d,0xd2,0xd8,0x1d,0xb1,0x4b,0x27,0x45,
- 0x1d,0x1b,0x0c,0x88,0x78,0x4e,0x8b,0x0b,0xe5,0xc8,0x1f,0xf0,0x39,0x49,0xe6,0x9f,
- 0x55,0x52,0xda,0x22,0x8d,0xc5,0x11,0xb8,0xf4,0x6d,0x72,0x9e,0xcd,0x06,0x6c,0x3f,
- 0xa7,0xd3,0x6a,0x65,0x4e,0x92,0xe1,0x07,0x95,0x17,0xb5,0x48,0x63,0x77,0x04,0x2e,
- 0x9d,0x9a,0xb3,0x2c,0xea,0x42,0x30,0xe0,0x87,0x9d,0x17,0x75,0x5a,0xad,0xcc,0x49,
- 0xd2,0x78,0x44,0x9b,0x3d,0xd8,0xb5,0xee,0xc9,0x94,0x7d,0xf5,0x11,0xb8,0x74,0x52,
- 0xc2,0xca,0xb4,0x3b,0xd9,0x80,0x8d,0x77,0x75,0x5a,0xad,0x74,0x95,0xdd,0xc0,0x2f,
- 0xf5,0xc7,0x90,0xb1,0xee,0xc9,0x94,0x7d,0x0d,0x12,0xb8,0x74,0x52,0xc2,0x9a,0xc0,
- 0x9b,0xa9,0x80,0xff,0x58,0x7b,0x5a,0xa7,0xd5,0x4a,0x7b,0xeb,0xcd,0xf9,0x52,0x7f,
- 0x09,0x19,0xeb,0x9e,0x4c,0xd9,0xd7,0x23,0x81,0x4b,0x87,0x67,0x2b,0x8b,0x1d,0x18,
- 0x0c,0x58,0x7a,0x5d,0xa7,0xd5,0x4a,0x7b,0xeb,0xcd,0xf9,0x52,0x7f,0x06,0x19,0xeb,
- 0x9e,0x4c,0xd9,0xd7,0x23,0x51,0x4b,0x87,0x07,0xab,0x49,0x9e,0x11,0x0c,0x58,0x7a,
- 0x5d,0xa7,0x35,0x4b,0x7b,0xf1,0x4d,0xf8,0x52,0x7f,0x03,0x49,0xeb,0x52,0x4a,0xe7,
- 0xc2,0x3c,0x67,0x1f,0xd8,0x69,0xe5,0xd2,0xde,0x7d,0x13,0xbe,0xa4,0xdb,0xcf,0x5b,
- 0x97,0x1e,0x9a,0x17,0xe6,0x39,0xfe,0xc0,0x4e,0x2b,0x97,0xf6,0xee,0x6b,0xff,0x32,
- 0xee,0xbd,0x60,0x69,0x00,0xfe,0xeb,0xc8,0x03,0x3b,0xad,0x5f,0xda,0xeb,0xaf,0xfd,
- 0x0b,0xbc,0xee,0xb2,0xa5,0x01,0xf8,0xc9,0x91,0x37,0x76,0x5a,0xc5,0xb4,0x37,0x60,
- 0xe3,0x17,0x7b,0xd7,0x95,0xab,0x03,0xf0,0xd1,0xd7,0x6f,0xec,0xb4,0x96,0x69,0x2f,
- 0xc1,0xae,0x2f,0xf0,0x96,0x5b,0x02,0x00,0xf0,0xd1,0x17,0x6f,0xec,0xb4,0xa2,0x69,
- 0xef,0xc1,0x96,0x2f,0xea,0x7e,0xbb,0x02,0x00,0xf0,0xca,0xab,0x67,0x76,0x5a,0xd7,
- 0xb4,0x57,0xe1,0xb4,0x03,0x39,0x78,0xb3,0x8d,0x01,0x00,0x58,0x30,0xb0,0x6e,0xda,
- 0x0b,0x71,0xd4,0x69,0x14,0x1c,0x17,0x00,0x2d,0xa6,0x95,0x4e,0x7b,0x27,0x4e,0x38,
- 0x84,0xca,0xbb,0x03,0xa0,0xc5,0xb4,0xea,0x69,0x6f,0xc6,0xc6,0xbd,0xb7,0xdc,0x1d,
- 0x00,0x2d,0xa6,0x75,0x50,0x7b,0x45,0xb6,0xec,0xba,0xeb,0xe2,0x00,0xe8,0x32,0xad,
- 0x89,0xda,0x8b,0xf2,0x12,0x8d,0x76,0xad,0xb4,0x00,0x7c,0x74,0xd7,0x86,0xba,0x31,
- 0x17,0x01,0x00,0xc5,0x94,0x2f,0x00,0x14,0x53,0xbe,0x00,0x50,0xcc,0xff,0x05,0x00,
- 0x00,0xc5,0x94,0x2f,0xc0,0xa3,0x78,0xcc,0x27,0x08,0x2c,0x5f,0x57,0x06,0x70,0x15,
- 0xde,0xf3,0x5e,0xca,0x17,0xe0,0xc9,0x3c,0xec,0x2d,0x94,0x2f,0x00,0xff,0xe2,0x79,
- 0xaf,0x11,0xdb,0xbc,0x6e,0x07,0xe0,0x1e,0xbc,0xf3,0xa9,0x94,0x2f,0x00,0x5f,0xf3,
- 0xe0,0x87,0x53,0xbe,0x00,0x1c,0xe4,0xf1,0x0f,0xa1,0x79,0x01,0x58,0xa0,0x0b,0x96,
- 0x85,0x37,0xaf,0x33,0x07,0x78,0x1a,0x8d,0x70,0x8a,0xda,0x05,0x20,0x8a,0x82,0x38,
- 0xc2,0xdf,0x79,0x01,0x48,0xa5,0x32,0x7e,0xa2,0x79,0x01,0x28,0xa3,0x3b,0xde,0xd2,
- 0x9a,0xf7,0x39,0x07,0x08,0xc0,0xb2,0xa7,0xb5,0x49,0x5e,0xe7,0xde,0xef,0xac,0x00,
- 0x28,0x70,0xfb,0x5a,0xd1,0xbc,0x00,0x8c,0x75,0xcb,0xc6,0x51,0xbb,0x00,0x5c,0xc5,
- 0x0d,0x3a,0xc8,0x5f,0x78,0x01,0xb8,0x81,0xc9,0xdd,0x94,0x5d,0xb5,0x3a,0x17,0x80,
- 0x76,0xed,0xcd,0x55,0xd6,0xb6,0x6a,0x17,0x80,0xb1,0xea,0xdb,0x50,0xf3,0x02,0xc0,
- 0x47,0xed,0xa5,0xa9,0x73,0x01,0x78,0xb2,0xf6,0x26,0x55,0xb5,0x00,0xd0,0xde,0xb6,
- 0x3a,0x17,0x00,0x3e,0xa5,0x5e,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xea,0xfc,0x03,0x26,
- 0x84,0x0a,0xd6,0x36,0x10,0x0e,0x00,
diff --git a/board/esd/apc405/strataflash.c b/board/esd/apc405/strataflash.c
deleted file mode 100644
index ad7a71dc4d..0000000000
--- a/board/esd/apc405/strataflash.c
+++ /dev/null
@@ -1,789 +0,0 @@
-/*
- * (C) Copyright 2002
- * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/processor.h>
-
-#undef DEBUG_FLASH
-/*
- * This file implements a Common Flash Interface (CFI) driver for ppcboot.
- * The width of the port and the width of the chips are determined at initialization.
- * These widths are used to calculate the address for access CFI data structures.
- * It has been tested on an Intel Strataflash implementation.
- *
- * References
- * JEDEC Standard JESD68 - Common Flash Interface (CFI)
- * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
- * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
- * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
- *
- * TODO
- * Use Primary Extended Query table (PRI) and Alternate Algorithm Query Table (ALT) to determine if protection is available
- * Add support for other command sets Use the PRI and ALT to determine command set
- * Verify erase and program timeouts.
- */
-
-#define FLASH_CMD_CFI 0x98
-#define FLASH_CMD_READ_ID 0x90
-#define FLASH_CMD_RESET 0xff
-#define FLASH_CMD_BLOCK_ERASE 0x20
-#define FLASH_CMD_ERASE_CONFIRM 0xD0
-#define FLASH_CMD_WRITE 0x40
-#define FLASH_CMD_PROTECT 0x60
-#define FLASH_CMD_PROTECT_SET 0x01
-#define FLASH_CMD_PROTECT_CLEAR 0xD0
-#define FLASH_CMD_CLEAR_STATUS 0x50
-#define FLASH_CMD_WRITE_TO_BUFFER 0xE8
-#define FLASH_CMD_WRITE_BUFFER_CONFIRM 0xD0
-
-#define FLASH_STATUS_DONE 0x80
-#define FLASH_STATUS_ESS 0x40
-#define FLASH_STATUS_ECLBS 0x20
-#define FLASH_STATUS_PSLBS 0x10
-#define FLASH_STATUS_VPENS 0x08
-#define FLASH_STATUS_PSS 0x04
-#define FLASH_STATUS_DPS 0x02
-#define FLASH_STATUS_R 0x01
-#define FLASH_STATUS_PROTECT 0x01
-
-#define FLASH_OFFSET_CFI 0x55
-#define FLASH_OFFSET_CFI_RESP 0x10
-#define FLASH_OFFSET_WTOUT 0x1F
-#define FLASH_OFFSET_WBTOUT 0x20
-#define FLASH_OFFSET_ETOUT 0x21
-#define FLASH_OFFSET_CETOUT 0x22
-#define FLASH_OFFSET_WMAX_TOUT 0x23
-#define FLASH_OFFSET_WBMAX_TOUT 0x24
-#define FLASH_OFFSET_EMAX_TOUT 0x25
-#define FLASH_OFFSET_CEMAX_TOUT 0x26
-#define FLASH_OFFSET_SIZE 0x27
-#define FLASH_OFFSET_INTERFACE 0x28
-#define FLASH_OFFSET_BUFFER_SIZE 0x2A
-#define FLASH_OFFSET_NUM_ERASE_REGIONS 0x2C
-#define FLASH_OFFSET_ERASE_REGIONS 0x2D
-#define FLASH_OFFSET_PROTECT 0x02
-#define FLASH_OFFSET_USER_PROTECTION 0x85
-#define FLASH_OFFSET_INTEL_PROTECTION 0x81
-
-#define FLASH_MAN_CFI 0x01000000
-
-typedef union {
- unsigned char c;
- unsigned short w;
- unsigned long l;
-} cfiword_t;
-
-typedef union {
- unsigned char * cp;
- unsigned short *wp;
- unsigned long *lp;
-} cfiptr_t;
-
-#define NUM_ERASE_REGIONS 4
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-
-static void flash_add_byte(flash_info_t *info, cfiword_t * cword, uchar c);
-static void flash_make_cmd(flash_info_t * info, uchar cmd, void * cmdbuf);
-static void flash_write_cmd(flash_info_t * info, int sect, uchar offset, uchar cmd);
-static int flash_isequal(flash_info_t * info, int sect, uchar offset, uchar cmd);
-static int flash_isset(flash_info_t * info, int sect, uchar offset, uchar cmd);
-static int flash_detect_cfi(flash_info_t * info);
-static ulong flash_get_size (ulong base, int banknum);
-static int flash_write_cfiword (flash_info_t *info, ulong dest, cfiword_t cword);
-static int flash_full_status_check(flash_info_t * info, ulong sector, ulong tout, char * prompt);
-#ifdef CFG_FLASH_USE_BUFFER_WRITE
-static int flash_write_cfibuffer(flash_info_t * info, ulong dest, uchar * cp, int len);
-#endif
-/*-----------------------------------------------------------------------
- * create an address based on the offset and the port width
- */
-inline uchar * flash_make_addr(flash_info_t * info, int sect, int offset)
-{
- return ((uchar *)(info->start[sect] + (offset * info->portwidth)));
-}
-/*-----------------------------------------------------------------------
- * read a character at a port width address
- */
-inline uchar flash_read_uchar(flash_info_t * info, uchar offset)
-{
- uchar *cp;
- cp = flash_make_addr(info, 0, offset);
- return (cp[info->portwidth - 1]);
-}
-
-/*-----------------------------------------------------------------------
- * read a short word by swapping for ppc format.
- */
-ushort flash_read_ushort(flash_info_t * info, int sect, uchar offset)
-{
- uchar * addr;
-
- addr = flash_make_addr(info, sect, offset);
- return ((addr[(2*info->portwidth) - 1] << 8) | addr[info->portwidth - 1]);
-
-}
-
-/*-----------------------------------------------------------------------
- * read a long word by picking the least significant byte of each maiximum
- * port size word. Swap for ppc format.
- */
-ulong flash_read_long(flash_info_t * info, int sect, uchar offset)
-{
- uchar * addr;
-
- addr = flash_make_addr(info, sect, offset);
- return ( (addr[(2*info->portwidth) - 1] << 24 ) | (addr[(info->portwidth) -1] << 16) |
- (addr[(4*info->portwidth) - 1] << 8) | addr[(3*info->portwidth) - 1]);
-
-}
-
-/*-----------------------------------------------------------------------
- */
-unsigned long flash_init (void)
-{
- unsigned long size;
- int i;
- unsigned long address;
-
-
- /* The flash is positioned back to back, with the demultiplexing of the chip
- * based on the A24 address line.
- *
- */
-
- address = CFG_FLASH_BASE;
- size = 0;
-
- /* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- size += flash_info[i].size = flash_get_size(address, i);
- address += CFG_FLASH_INCREMENT;
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n",i,
- flash_info[0].size, flash_info[i].size<<20);
- }
- }
-
-#if 0 /* test-only */
- /* Monitor protection ON by default */
-#if (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
- for(i=0; flash_info[0].start[i] < CFG_MONITOR_BASE+CFG_MONITOR_LEN-1; i++)
- (void)flash_real_protect(&flash_info[0], i, 1);
-#endif
-#else
- /* monitor protection ON by default */
- flash_protect (FLAG_PROTECT_SET,
- - CFG_MONITOR_LEN,
- - 1, &flash_info[1]);
-#endif
-
- return (size);
-}
-
-/*-----------------------------------------------------------------------
- */
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- int rcode = 0;
- int prot;
- int sect;
-
- if( info->flash_id != FLASH_MAN_CFI) {
- printf ("Can't erase unknown flash type - aborted\n");
- return 1;
- }
- if ((s_first < 0) || (s_first > s_last)) {
- printf ("- no sectors to erase\n");
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
-
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- flash_write_cmd(info, sect, 0, FLASH_CMD_CLEAR_STATUS);
- flash_write_cmd(info, sect, 0, FLASH_CMD_BLOCK_ERASE);
- flash_write_cmd(info, sect, 0, FLASH_CMD_ERASE_CONFIRM);
-
- if(flash_full_status_check(info, sect, info->erase_blk_tout, "erase")) {
- rcode = 1;
- } else
- printf(".");
- }
- }
- printf (" done\n");
- return rcode;
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t *info)
-{
- int i;
-
- if (info->flash_id != FLASH_MAN_CFI) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- printf("CFI conformant FLASH (%d x %d)",
- (info->portwidth << 3 ), (info->chipwidth << 3 ));
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
- printf(" Erase timeout %ld ms, write timeout %ld ms, buffer write timeout %ld ms, buffer size %d\n",
- info->erase_blk_tout, info->write_tout, info->buffer_write_tout, info->buffer_size);
-
- printf (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
-#ifdef CFG_FLASH_EMPTY_INFO
- int k;
- int size;
- int erased;
- volatile unsigned long *flash;
-
- /*
- * Check if whole sector is erased
- */
- if (i != (info->sector_count-1))
- size = info->start[i+1] - info->start[i];
- else
- size = info->start[0] + info->size - info->start[i];
- erased = 1;
- flash = (volatile unsigned long *)info->start[i];
- size = size >> 2; /* divide by 4 for longword access */
- for (k=0; k<size; k++)
- {
- if (*flash++ != 0xffffffff)
- {
- erased = 0;
- break;
- }
- }
-
- if ((i % 5) == 0)
- printf ("\n ");
- /* print empty and read-only info */
- printf (" %08lX%s%s",
- info->start[i],
- erased ? " E" : " ",
- info->protect[i] ? "RO " : " ");
-#else
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " ");
-#endif
- }
- printf ("\n");
- return;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong wp;
- ulong cp;
- int aln;
- cfiword_t cword;
- int i, rc;
-
- /* get lower aligned address */
- wp = (addr & ~(info->portwidth - 1));
-
- /* handle unaligned start */
- if((aln = addr - wp) != 0) {
- cword.l = 0;
- cp = wp;
- for(i=0;i<aln; ++i, ++cp)
- flash_add_byte(info, &cword, (*(uchar *)cp));
-
- for(; (i< info->portwidth) && (cnt > 0) ; i++) {
- flash_add_byte(info, &cword, *src++);
- cnt--;
- cp++;
- }
- for(; (cnt == 0) && (i < info->portwidth); ++i, ++cp)
- flash_add_byte(info, &cword, (*(uchar *)cp));
- if((rc = flash_write_cfiword(info, wp, cword)) != 0)
- return rc;
- wp = cp;
- }
-
-#ifdef CFG_FLASH_USE_BUFFER_WRITE
- while(cnt >= info->portwidth) {
- i = info->buffer_size > cnt? cnt: info->buffer_size;
- if((rc = flash_write_cfibuffer(info, wp, src,i)) != ERR_OK)
- return rc;
- wp += i;
- src += i;
- cnt -=i;
- }
-#else
- /* handle the aligned part */
- while(cnt >= info->portwidth) {
- cword.l = 0;
- for(i = 0; i < info->portwidth; i++) {
- flash_add_byte(info, &cword, *src++);
- }
- if((rc = flash_write_cfiword(info, wp, cword)) != 0)
- return rc;
- wp += info->portwidth;
- cnt -= info->portwidth;
- }
-#endif /* CFG_FLASH_USE_BUFFER_WRITE */
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- cword.l = 0;
- for (i=0, cp=wp; (i<info->portwidth) && (cnt>0); ++i, ++cp) {
- flash_add_byte(info, &cword, *src++);
- --cnt;
- }
- for (; i<info->portwidth; ++i, ++cp) {
- flash_add_byte(info, & cword, (*(uchar *)cp));
- }
-
- return flash_write_cfiword(info, wp, cword);
-}
-
-/*-----------------------------------------------------------------------
- */
-int flash_real_protect(flash_info_t *info, long sector, int prot)
-{
- int retcode = 0;
-
- flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
- flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT);
- if(prot)
- flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT_SET);
- else
- flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
-
- if((retcode = flash_full_status_check(info, sector, info->erase_blk_tout,
- prot?"protect":"unprotect")) == 0) {
-
- info->protect[sector] = prot;
- /* Intel's unprotect unprotects all locking */
- if(prot == 0) {
- int i;
- for(i = 0 ; i<info->sector_count; i++) {
- if(info->protect[i])
- flash_real_protect(info, i, 1);
- }
- }
- }
-
- return retcode;
-}
-/*-----------------------------------------------------------------------
- * wait for XSR.7 to be set. Time out with an error if it does not.
- * This routine does not set the flash to read-array mode.
- */
-static int flash_status_check(flash_info_t * info, ulong sector, ulong tout, char * prompt)
-{
- ulong start;
-
- /* Wait for command completion */
- start = get_timer (0);
- while(!flash_isset(info, sector, 0, FLASH_STATUS_DONE)) {
- if (get_timer(start) > info->erase_blk_tout) {
- printf("Flash %s timeout at address %lx\n", prompt, info->start[sector]);
- flash_write_cmd(info, sector, 0, FLASH_CMD_RESET);
- return ERR_TIMOUT;
- }
- }
- return ERR_OK;
-}
-/*-----------------------------------------------------------------------
- * Wait for XSR.7 to be set, if it times out print an error, otherwise do a full status check.
- * This routine sets the flash to read-array mode.
- */
-static int flash_full_status_check(flash_info_t * info, ulong sector, ulong tout, char * prompt)
-{
- int retcode;
- retcode = flash_status_check(info, sector, tout, prompt);
- if((retcode == ERR_OK) && !flash_isequal(info,sector, 0, FLASH_STATUS_DONE)) {
- retcode = ERR_INVAL;
- printf("Flash %s error at address %lx\n", prompt,info->start[sector]);
- if(flash_isset(info, sector, 0, FLASH_STATUS_ECLBS | FLASH_STATUS_PSLBS)){
- printf("Command Sequence Error.\n");
- } else if(flash_isset(info, sector, 0, FLASH_STATUS_ECLBS)){
- printf("Block Erase Error.\n");
- retcode = ERR_NOT_ERASED;
- } else if (flash_isset(info, sector, 0, FLASH_STATUS_PSLBS)) {
- printf("Locking Error\n");
- }
- if(flash_isset(info, sector, 0, FLASH_STATUS_DPS)){
- printf("Block locked.\n");
- retcode = ERR_PROTECTED;
- }
- if(flash_isset(info, sector, 0, FLASH_STATUS_VPENS))
- printf("Vpp Low Error.\n");
- }
- flash_write_cmd(info, sector, 0, FLASH_CMD_RESET);
- return retcode;
-}
-/*-----------------------------------------------------------------------
- */
-static void flash_add_byte(flash_info_t *info, cfiword_t * cword, uchar c)
-{
- switch(info->portwidth) {
- case FLASH_CFI_8BIT:
- cword->c = c;
- break;
- case FLASH_CFI_16BIT:
- cword->w = (cword->w << 8) | c;
- break;
- case FLASH_CFI_32BIT:
- cword->l = (cword->l << 8) | c;
- }
-}
-
-
-/*-----------------------------------------------------------------------
- * make a proper sized command based on the port and chip widths
- */
-static void flash_make_cmd(flash_info_t * info, uchar cmd, void * cmdbuf)
-{
- int i;
- uchar *cp = (uchar *)cmdbuf;
- for(i=0; i< info->portwidth; i++)
- *cp++ = ((i+1) % info->chipwidth) ? '\0':cmd;
-}
-
-/*
- * Write a proper sized command to the correct address
- */
-static void flash_write_cmd(flash_info_t * info, int sect, uchar offset, uchar cmd)
-{
-
- volatile cfiptr_t addr;
- cfiword_t cword;
- addr.cp = flash_make_addr(info, sect, offset);
- flash_make_cmd(info, cmd, &cword);
- switch(info->portwidth) {
- case FLASH_CFI_8BIT:
- *addr.cp = cword.c;
- break;
- case FLASH_CFI_16BIT:
- *addr.wp = cword.w;
- break;
- case FLASH_CFI_32BIT:
- *addr.lp = cword.l;
- break;
- }
-}
-
-/*-----------------------------------------------------------------------
- */
-static int flash_isequal(flash_info_t * info, int sect, uchar offset, uchar cmd)
-{
- cfiptr_t cptr;
- cfiword_t cword;
- int retval;
- cptr.cp = flash_make_addr(info, sect, offset);
- flash_make_cmd(info, cmd, &cword);
- switch(info->portwidth) {
- case FLASH_CFI_8BIT:
- retval = (cptr.cp[0] == cword.c);
- break;
- case FLASH_CFI_16BIT:
- retval = (cptr.wp[0] == cword.w);
- break;
- case FLASH_CFI_32BIT:
- retval = (cptr.lp[0] == cword.l);
- break;
- default:
- retval = 0;
- break;
- }
- return retval;
-}
-/*-----------------------------------------------------------------------
- */
-static int flash_isset(flash_info_t * info, int sect, uchar offset, uchar cmd)
-{
- cfiptr_t cptr;
- cfiword_t cword;
- int retval;
- cptr.cp = flash_make_addr(info, sect, offset);
- flash_make_cmd(info, cmd, &cword);
- switch(info->portwidth) {
- case FLASH_CFI_8BIT:
- retval = ((cptr.cp[0] & cword.c) == cword.c);
- break;
- case FLASH_CFI_16BIT:
- retval = ((cptr.wp[0] & cword.w) == cword.w);
- break;
- case FLASH_CFI_32BIT:
- retval = ((cptr.lp[0] & cword.l) == cword.l);
- break;
- default:
- retval = 0;
- break;
- }
- return retval;
-}
-
-/*-----------------------------------------------------------------------
- * detect if flash is compatible with the Common Flash Interface (CFI)
- * http://www.jedec.org/download/search/jesd68.pdf
- *
-*/
-static int flash_detect_cfi(flash_info_t * info)
-{
-
- for(info->portwidth=FLASH_CFI_8BIT; info->portwidth <= FLASH_CFI_32BIT;
- info->portwidth <<= 1) {
- for(info->chipwidth =FLASH_CFI_BY8;
- info->chipwidth <= info->portwidth;
- info->chipwidth <<= 1) {
- flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
- flash_write_cmd(info, 0, FLASH_OFFSET_CFI, FLASH_CMD_CFI);
- if(flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP,'Q') &&
- flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R') &&
- flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y'))
- return 1;
- }
- }
- return 0;
-}
-/*
- * The following code cannot be run from FLASH!
- *
- */
-static ulong flash_get_size (ulong base, int banknum)
-{
- flash_info_t * info = &flash_info[banknum];
- int i, j;
- int sect_cnt;
- unsigned long sector;
- unsigned long tmp;
- int size_ratio;
- uchar num_erase_regions;
- int erase_region_size;
- int erase_region_count;
-
- info->start[0] = base;
-
- if(flash_detect_cfi(info)){
-#ifdef DEBUG_FLASH
- printf("portwidth=%d chipwidth=%d\n", info->portwidth, info->chipwidth); /* test-only */
-#endif
- size_ratio = info->portwidth / info->chipwidth;
- num_erase_regions = flash_read_uchar(info, FLASH_OFFSET_NUM_ERASE_REGIONS);
-#ifdef DEBUG_FLASH
- printf("found %d erase regions\n", num_erase_regions);
-#endif
- sect_cnt = 0;
- sector = base;
- for(i = 0 ; i < num_erase_regions; i++) {
- if(i > NUM_ERASE_REGIONS) {
- printf("%d erase regions found, only %d used\n",
- num_erase_regions, NUM_ERASE_REGIONS);
- break;
- }
- tmp = flash_read_long(info, 0, FLASH_OFFSET_ERASE_REGIONS);
- erase_region_size = (tmp & 0xffff)? ((tmp & 0xffff) * 256): 128;
- tmp >>= 16;
- erase_region_count = (tmp & 0xffff) +1;
- for(j = 0; j< erase_region_count; j++) {
- info->start[sect_cnt] = sector;
- sector += (erase_region_size * size_ratio);
- info->protect[sect_cnt] = flash_isset(info, sect_cnt, FLASH_OFFSET_PROTECT, FLASH_STATUS_PROTECT);
- sect_cnt++;
- }
- }
-
- info->sector_count = sect_cnt;
- /* multiply the size by the number of chips */
- info->size = (1 << flash_read_uchar(info, FLASH_OFFSET_SIZE)) * size_ratio;
- info->buffer_size = (1 << flash_read_ushort(info, 0, FLASH_OFFSET_BUFFER_SIZE));
- tmp = 1 << flash_read_uchar(info, FLASH_OFFSET_ETOUT);
- info->erase_blk_tout = (tmp * (1 << flash_read_uchar(info, FLASH_OFFSET_EMAX_TOUT)));
- tmp = 1 << flash_read_uchar(info, FLASH_OFFSET_WBTOUT);
- info->buffer_write_tout = (tmp * (1 << flash_read_uchar(info, FLASH_OFFSET_WBMAX_TOUT)));
- tmp = 1 << flash_read_uchar(info, FLASH_OFFSET_WTOUT);
- info->write_tout = (tmp * (1 << flash_read_uchar(info, FLASH_OFFSET_WMAX_TOUT)))/ 1000;
- info->flash_id = FLASH_MAN_CFI;
- }
-
- flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
- return(info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-static int flash_write_cfiword (flash_info_t *info, ulong dest, cfiword_t cword)
-{
-
- cfiptr_t ctladdr;
- cfiptr_t cptr;
- int flag;
-
- ctladdr.cp = flash_make_addr(info, 0, 0);
- cptr.cp = (uchar *)dest;
-
-
- /* Check if Flash is (sufficiently) erased */
- switch(info->portwidth) {
- case FLASH_CFI_8BIT:
- flag = ((cptr.cp[0] & cword.c) == cword.c);
- break;
- case FLASH_CFI_16BIT:
- flag = ((cptr.wp[0] & cword.w) == cword.w);
- break;
- case FLASH_CFI_32BIT:
- flag = ((cptr.lp[0] & cword.l) == cword.l);
- break;
- default:
- return 2;
- }
- if(!flag)
- return 2;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- flash_write_cmd(info, 0, 0, FLASH_CMD_CLEAR_STATUS);
- flash_write_cmd(info, 0, 0, FLASH_CMD_WRITE);
-
- switch(info->portwidth) {
- case FLASH_CFI_8BIT:
- cptr.cp[0] = cword.c;
- break;
- case FLASH_CFI_16BIT:
- cptr.wp[0] = cword.w;
- break;
- case FLASH_CFI_32BIT:
- cptr.lp[0] = cword.l;
- break;
- }
-
- /* re-enable interrupts if necessary */
- if(flag)
- enable_interrupts();
-
- return flash_full_status_check(info, 0, info->write_tout, "write");
-}
-
-#ifdef CFG_FLASH_USE_BUFFER_WRITE
-
-/* loop through the sectors from the highest address
- * when the passed address is greater or equal to the sector address
- * we have a match
- */
-static int find_sector(flash_info_t *info, ulong addr)
-{
- int sector;
- for(sector = info->sector_count - 1; sector >= 0; sector--) {
- if(addr >= info->start[sector])
- break;
- }
- return sector;
-}
-
-static int flash_write_cfibuffer(flash_info_t * info, ulong dest, uchar * cp, int len)
-{
-
- int sector;
- int cnt;
- int retcode;
- volatile cfiptr_t src;
- volatile cfiptr_t dst;
-
- src.cp = cp;
- dst.cp = (uchar *)dest;
- sector = find_sector(info, dest);
- flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
- flash_write_cmd(info, sector, 0, FLASH_CMD_WRITE_TO_BUFFER);
- if((retcode = flash_status_check(info, sector, info->buffer_write_tout,
- "write to buffer")) == ERR_OK) {
- switch(info->portwidth) {
- case FLASH_CFI_8BIT:
- cnt = len;
- break;
- case FLASH_CFI_16BIT:
- cnt = len >> 1;
- break;
- case FLASH_CFI_32BIT:
- cnt = len >> 2;
- break;
- default:
- return ERR_INVAL;
- break;
- }
- flash_write_cmd(info, sector, 0, (uchar)cnt-1);
- while(cnt-- > 0) {
- switch(info->portwidth) {
- case FLASH_CFI_8BIT:
- *dst.cp++ = *src.cp++;
- break;
- case FLASH_CFI_16BIT:
- *dst.wp++ = *src.wp++;
- break;
- case FLASH_CFI_32BIT:
- *dst.lp++ = *src.lp++;
- break;
- default:
- return ERR_INVAL;
- break;
- }
- }
- flash_write_cmd(info, sector, 0, FLASH_CMD_WRITE_BUFFER_CONFIRM);
- retcode = flash_full_status_check(info, sector, info->buffer_write_tout,
- "buffer write");
- }
- flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
- return retcode;
-}
-#endif /* CFG_USE_FLASH_BUFFER_WRITE */
diff --git a/board/esd/apc405/u-boot.lds b/board/esd/apc405/u-boot.lds
deleted file mode 100644
index f7a20d1da2..0000000000
--- a/board/esd/apc405/u-boot.lds
+++ /dev/null
@@ -1,150 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- .resetvec 0xFFFFFFFC :
- {
- *(.resetvec)
- } = 0xffff
-
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/ppc4xx/start.o (.text)
- cpu/ppc4xx/traps.o (.text)
- cpu/ppc4xx/interrupts.o (.text)
- cpu/ppc4xx/serial.o (.text)
- cpu/ppc4xx/cpu_init.o (.text)
- cpu/ppc4xx/speed.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/extable.o (.text)
- lib_generic/zlib.o (.text)
-
-/* . = env_offset;*/
-/* common/environment.o(.text)*/
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/esd/ar405/Makefile b/board/esd/ar405/Makefile
deleted file mode 100644
index a60495a59a..0000000000
--- a/board/esd/ar405/Makefile
+++ /dev/null
@@ -1,46 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o ../common/misc.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/esd/ar405/ar405.c b/board/esd/ar405/ar405.c
deleted file mode 100644
index 3aac3c6732..0000000000
--- a/board/esd/ar405/ar405.c
+++ /dev/null
@@ -1,438 +0,0 @@
-/*
- * (C) Copyright 2001-2004
- * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include "ar405.h"
-#include <asm/processor.h>
-#include <command.h>
-
-/*cmd_boot.c*/
-extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
-extern void lxt971_no_sleep(void);
-
-/* ------------------------------------------------------------------------- */
-
-#if 0
-#define FPGA_DEBUG
-#endif
-
-/* fpga configuration data - generated by bin2cc */
-const unsigned char fpgadata[] = {
-#include "fpgadata.c"
-};
-
-const unsigned char fpgadata_xl30[] = {
-#include "fpgadata_xl30.c"
-};
-
-/*
- * include common fpga code (for esd boards)
- */
-#include "../common/fpga.c"
-
-
-int board_early_init_f (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- int index, len, i;
- int status;
-
-#ifdef FPGA_DEBUG
- /* set up serial port with default baudrate */
- (void) get_clocks ();
- gd->baudrate = CONFIG_BAUDRATE;
- serial_init ();
- console_init_f ();
-#endif
-
- /*
- * Boot onboard FPGA
- */
- /* first try 40er image */
- gd->board_type = 40;
- status = fpga_boot ((unsigned char *) fpgadata, sizeof (fpgadata));
- if (status != 0) {
- /* try xl30er image */
- gd->board_type = 30;
- status = fpga_boot ((unsigned char *) fpgadata_xl30, sizeof (fpgadata_xl30));
- if (status != 0) {
- /* booting FPGA failed */
-#ifndef FPGA_DEBUG
- /* set up serial port with default baudrate */
- (void) get_clocks ();
- gd->baudrate = CONFIG_BAUDRATE;
- serial_init ();
- console_init_f ();
-#endif
- printf ("\nFPGA: Booting failed ");
- switch (status) {
- case ERROR_FPGA_PRG_INIT_LOW:
- printf ("(Timeout: INIT not low after asserting PROGRAM*)\n ");
- break;
- case ERROR_FPGA_PRG_INIT_HIGH:
- printf ("(Timeout: INIT not high after deasserting PROGRAM*)\n ");
- break;
- case ERROR_FPGA_PRG_DONE:
- printf ("(Timeout: DONE not high after programming FPGA)\n ");
- break;
- }
-
- /* display infos on fpgaimage */
- index = 15;
- for (i = 0; i < 4; i++) {
- len = fpgadata[index];
- printf ("FPGA: %s\n", &(fpgadata[index + 1]));
- index += len + 3;
- }
- putc ('\n');
- /* delayed reboot */
- for (i = 20; i > 0; i--) {
- printf ("Rebooting in %2d seconds \r", i);
- for (index = 0; index < 1000; index++)
- udelay (1000);
- }
- putc ('\n');
- do_reset (NULL, 0, 0, NULL);
- }
- }
-
- /*
- * IRQ 0-15 405GP internally generated; active high; level sensitive
- * IRQ 16 405GP internally generated; active low; level sensitive
- * IRQ 17-24 RESERVED
- * IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive
- * IRQ 26 (EXT IRQ 1) CAN1; active low; level sensitive
- * IRQ 27 (EXT IRQ 2) PCI SLOT 0; active low; level sensitive
- * IRQ 28 (EXT IRQ 3) PCI SLOT 1; active low; level sensitive
- * IRQ 29 (EXT IRQ 4) PCI SLOT 2; active low; level sensitive
- * IRQ 30 (EXT IRQ 5) PCI SLOT 3; active low; level sensitive
- * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
- */
- mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
- mtdcr (uicer, 0x00000000); /* disable all ints */
- mtdcr (uiccr, 0x00000000); /* set all to be non-critical */
- mtdcr (uicpr, 0xFFFFFF81); /* set int polarities */
- mtdcr (uictr, 0x10000000); /* set int trigger levels */
- mtdcr (uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority */
- mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
-
- *(ushort *) 0xf03000ec = 0x0fff; /* enable all interrupts in fpga */
-
- return 0;
-}
-
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Check Board Identity:
- */
-
-int checkboard (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- int index;
- int len;
- char str[64];
- int i = getenv_r ("serial#", str, sizeof (str));
- const unsigned char *fpga;
-
- puts ("Board: ");
-
- if (i == -1) {
- puts ("### No HW ID - assuming AR405");
- } else {
- puts(str);
- }
-
- puts ("\nFPGA: ");
-
- /* display infos on fpgaimage */
- if (gd->board_type == 30) {
- fpga = fpgadata_xl30;
- } else {
- fpga = fpgadata;
- }
- index = 15;
- for (i = 0; i < 4; i++) {
- len = fpga[index];
- printf ("%s ", &(fpga[index + 1]));
- index += len + 3;
- }
-
- putc ('\n');
-
- /*
- * Disable sleep mode in LXT971
- */
- lxt971_no_sleep();
-
- return 0;
-}
-
-/* ------------------------------------------------------------------------- */
-
-long int initdram (int board_type)
-{
- unsigned long val;
-
- mtdcr(memcfga, mem_mb0cf);
- val = mfdcr(memcfgd);
-
- return (4*1024*1024 << ((val & 0x000e0000) >> 17));
-}
-
-/* ------------------------------------------------------------------------- */
-
-int testdram (void)
-{
- /* TODO: XXX XXX XXX */
- printf ("test: 16 MB - ok\n");
-
- return (0);
-}
-
-
-#if 1 /* test-only: some internal test routines... */
-/*
- * Some test routines
- */
-int do_digtest(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- volatile uchar *digen = (volatile uchar *)0xf03000b4;
- volatile ushort *digout = (volatile ushort *)0xf03000b0;
- volatile ushort *digin = (volatile ushort *)0xf03000a0;
- int i;
- int k;
- int start;
- int end;
-
- if (argc != 3) {
- puts("Usage: digtest n_start n_end (digtest 0 7)\n");
- return 0;
- }
-
- start = simple_strtol (argv[1], NULL, 10);
- end = simple_strtol (argv[2], NULL, 10);
-
- /*
- * Enable digital outputs
- */
- *digen = 0x08;
-
- printf("\nStarting digital In-/Out Test from I/O %d to %d (Cntrl-C to abort)...\n",
- start, end);
-
- /*
- * Set outputs one by one
- */
- for (;;) {
- for (i=start; i<=end; i++) {
- *digout = 0x0001 << i;
- for (k=0; k<200; k++)
- udelay(1000);
-
- if (*digin != (0x0001 << i)) {
- printf("ERROR: OUT=0x%04X, IN=0x%04X\n", 0x0001 << i, *digin);
- return 0;
- }
-
- /* Abort if ctrl-c was pressed */
- if (ctrlc()) {
- puts("\nAbort\n");
- return 0;
- }
- }
- }
-
- return 0;
-}
-U_BOOT_CMD(
- digtest, 3, 1, do_digtest,
- "digtest - Test digital in-/output\n",
- NULL
- );
-
-
-#define ERROR_DELTA 256
-
-struct io {
- volatile short val;
- short dummy;
-};
-
-int do_anatest(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- volatile short val;
- int i;
- int volt;
- struct io *out;
- struct io *in;
-
- out = (struct io *)0xf0300090;
- in = (struct io *)0xf0300000;
-
- i = simple_strtol (argv[1], NULL, 10);
-
- volt = 0;
- printf("Setting Channel %d to %dV...\n", i, volt);
- out[i].val = (volt * 0x7fff) / 10;
- udelay(10000);
- val = in[i*2].val;
- printf("-> InChannel %d: 0x%04x=%dV\n", i*2, val, (val * 4000) / 0x7fff);
- if ((val < ((volt * 0x7fff) / 40) - ERROR_DELTA) ||
- (val > ((volt * 0x7fff) / 40) + ERROR_DELTA)) {
- printf("ERROR! (min=0x%04x max=0x%04x)\n", ((volt * 0x7fff) / 40) - ERROR_DELTA,
- ((volt * 0x7fff) / 40) + ERROR_DELTA);
- return -1;
- }
- val = in[i*2+1].val;
- printf("-> InChannel %d: 0x%04x=%dV\n", i*2+1, val, (val * 4000) / 0x7fff);
- if ((val < ((volt * 0x7fff) / 40) - ERROR_DELTA) ||
- (val > ((volt * 0x7fff) / 40) + ERROR_DELTA)) {
- printf("ERROR! (min=0x%04x max=0x%04x)\n", ((volt * 0x7fff) / 40) - ERROR_DELTA,
- ((volt * 0x7fff) / 40) + ERROR_DELTA);
- return -1;
- }
-
- volt = 5;
- printf("Setting Channel %d to %dV...\n", i, volt);
- out[i].val = (volt * 0x7fff) / 10;
- udelay(10000);
- val = in[i*2].val;
- printf("-> InChannel %d: 0x%04x=%dV\n", i*2, val, (val * 4000) / 0x7fff);
- if ((val < ((volt * 0x7fff) / 40) - ERROR_DELTA) ||
- (val > ((volt * 0x7fff) / 40) + ERROR_DELTA)) {
- printf("ERROR! (min=0x%04x max=0x%04x)\n", ((volt * 0x7fff) / 40) - ERROR_DELTA,
- ((volt * 0x7fff) / 40) + ERROR_DELTA);
- return -1;
- }
- val = in[i*2+1].val;
- printf("-> InChannel %d: 0x%04x=%dV\n", i*2+1, val, (val * 4000) / 0x7fff);
- if ((val < ((volt * 0x7fff) / 40) - ERROR_DELTA) ||
- (val > ((volt * 0x7fff) / 40) + ERROR_DELTA)) {
- printf("ERROR! (min=0x%04x max=0x%04x)\n", ((volt * 0x7fff) / 40) - ERROR_DELTA,
- ((volt * 0x7fff) / 40) + ERROR_DELTA);
- return -1;
- }
-
- volt = 10;
- printf("Setting Channel %d to %dV...\n", i, volt);
- out[i].val = (volt * 0x7fff) / 10;
- udelay(10000);
- val = in[i*2].val;
- printf("-> InChannel %d: 0x%04x=%dV\n", i*2, val, (val * 4000) / 0x7fff);
- if ((val < ((volt * 0x7fff) / 40) - ERROR_DELTA) ||
- (val > ((volt * 0x7fff) / 40) + ERROR_DELTA)) {
- printf("ERROR! (min=0x%04x max=0x%04x)\n", ((volt * 0x7fff) / 40) - ERROR_DELTA,
- ((volt * 0x7fff) / 40) + ERROR_DELTA);
- return -1;
- }
- val = in[i*2+1].val;
- printf("-> InChannel %d: 0x%04x=%dV\n", i*2+1, val, (val * 4000) / 0x7fff);
- if ((val < ((volt * 0x7fff) / 40) - ERROR_DELTA) ||
- (val > ((volt * 0x7fff) / 40) + ERROR_DELTA)) {
- printf("ERROR! (min=0x%04x max=0x%04x)\n", ((volt * 0x7fff) / 40) - ERROR_DELTA,
- ((volt * 0x7fff) / 40) + ERROR_DELTA);
- return -1;
- }
-
- printf("Channel %d OK!\n", i);
-
- return 0;
-}
-U_BOOT_CMD(
- anatest, 2, 1, do_anatest,
- "anatest - Test analog in-/output\n",
- NULL
- );
-
-
-int counter = 0;
-
-void cyclicInt(void *ptr)
-{
- *(ushort *)0xf03000e8 = 0x0800; /* ack int */
- counter++;
-}
-
-
-int do_inctest(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- volatile uchar *digout = (volatile uchar *)0xf03000b4;
- volatile ulong *incin;
- int i;
-
- incin = (volatile ulong *)0xf0300040;
-
- /*
- * Clear inc counter
- */
- incin[0] = 0;
- incin[1] = 0;
- incin[2] = 0;
- incin[3] = 0;
-
- incin = (volatile ulong *)0xf0300050;
-
- /*
- * Inc a little
- */
- for (i=0; i<10000; i++) {
- switch (i & 0x03) {
- case 0:
- *digout = 0x02;
- break;
- case 1:
- *digout = 0x03;
- break;
- case 2:
- *digout = 0x01;
- break;
- case 3:
- *digout = 0x00;
- break;
- }
- udelay(10);
- }
-
- printf("Inc 0 = %ld\n", incin[0]);
- printf("Inc 1 = %ld\n", incin[1]);
- printf("Inc 2 = %ld\n", incin[2]);
- printf("Inc 3 = %ld\n", incin[3]);
-
- *(ushort *)0xf03000e0 = 0x0c80-1; /* set counter */
- *(ushort *)0xf03000ec |= 0x0800; /* enable int */
- irq_install_handler (30, (interrupt_handler_t *) cyclicInt, NULL);
- printf("counter=%d\n", counter);
-
- return 0;
-}
-U_BOOT_CMD(
- inctest, 3, 1, do_inctest,
- "inctest - Test incremental encoder inputs\n",
- NULL
- );
-#endif
diff --git a/board/esd/ar405/ar405.h b/board/esd/ar405/ar405.h
deleted file mode 100644
index 5fc313a258..0000000000
--- a/board/esd/ar405/ar405.h
+++ /dev/null
@@ -1,44 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/****************************************************************************
- * FLASH Memory Map as used by TQ Monitor:
- *
- * Start Address Length
- * +-----------------------+ 0x4000_0000 Start of Flash -----------------
- * | MON8xx code | 0x4000_0100 Reset Vector
- * +-----------------------+ 0x400?_????
- * | (unused) |
- * +-----------------------+ 0x4001_FF00
- * | Ethernet Addresses | 0x78
- * +-----------------------+ 0x4001_FF78
- * | (Reserved for MON8xx) | 0x44
- * +-----------------------+ 0x4001_FFBC
- * | Lock Address | 0x04
- * +-----------------------+ 0x4001_FFC0 ^
- * | Hardware Information | 0x40 | MON8xx
- * +=======================+ 0x4002_0000 (sector border) -----------------
- * | Autostart Header | | Applications
- * | ... | v
- *
- *****************************************************************************/
diff --git a/board/esd/ar405/config.mk b/board/esd/ar405/config.mk
deleted file mode 100644
index 3e8baf6563..0000000000
--- a/board/esd/ar405/config.mk
+++ /dev/null
@@ -1,30 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# esd AR405 boards
-#
-
-#TEXT_BASE = 0xFFFE0000
-#TEXT_BASE = 0xFFFD0000
-TEXT_BASE = 0xFFFC0000
diff --git a/board/esd/ar405/flash.c b/board/esd/ar405/flash.c
deleted file mode 100644
index 89af1190a8..0000000000
--- a/board/esd/ar405/flash.c
+++ /dev/null
@@ -1,101 +0,0 @@
-/*
- * (C) Copyright 2001
- * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <ppc4xx.h>
-#include <asm/processor.h>
-
-/*
- * include common flash code (for esd boards)
- */
-#include "../common/flash.c"
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (vu_long * addr, flash_info_t * info);
-static void flash_get_offsets (ulong base, flash_info_t * info);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- unsigned long size_b0;
- int i;
- uint pbcr;
- unsigned long base_b0;
- int size_val = 0;
-
- /* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* Static FLASH Bank configuration here - FIXME XXX */
-
- size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size_b0, size_b0<<20);
- }
-
- /* Setup offsets */
- flash_get_offsets (-size_b0, &flash_info[0]);
-
- /* Re-do sizing to get full correct info */
- mtdcr(ebccfga, pb0cr);
- pbcr = mfdcr(ebccfgd);
- mtdcr(ebccfga, pb0cr);
- base_b0 = -size_b0;
- switch (size_b0) {
- case 1 << 20:
- size_val = 0;
- break;
- case 2 << 20:
- size_val = 1;
- break;
- case 4 << 20:
- size_val = 2;
- break;
- case 8 << 20:
- size_val = 3;
- break;
- case 16 << 20:
- size_val = 4;
- break;
- }
- pbcr = (pbcr & 0x0001ffff) | base_b0 | (size_val << 17);
- mtdcr(ebccfgd, pbcr);
-
- /* Monitor protection ON by default */
- (void)flash_protect(FLAG_PROTECT_SET,
- -CFG_MONITOR_LEN,
- 0xffffffff,
- &flash_info[0]);
-
- flash_info[0].size = size_b0;
-
- return (size_b0);
-}
diff --git a/board/esd/ar405/fpgadata.c b/board/esd/ar405/fpgadata.c
deleted file mode 100644
index 5c337e0390..0000000000
--- a/board/esd/ar405/fpgadata.c
+++ /dev/null
@@ -1,2750 +0,0 @@
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diff --git a/board/esd/ar405/fpgadata_xl30.c b/board/esd/ar405/fpgadata_xl30.c
deleted file mode 100644
index 57d327a2c5..0000000000
--- a/board/esd/ar405/fpgadata_xl30.c
+++ /dev/null
@@ -1,2436 +0,0 @@
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- 0x05,0x02,0xe5,0x05,0x15,0x3b,0xe5,0x14,0x13,0x13,0x09,0x14,0x09,0x0d,0x09,0x06,
- 0x04,0x09,0x04,0xe5,0x02,0x04,0x04,0x18,0x13,0x09,0x27,0xe5,0xe5,0x09,0x17,0x06,
- 0x02,0x4f,0x4f,0x09,0x2b,0x05,0xe6,0x0a,0x3b,0x27,0x5b,0x3c,0xe6,0x3c,0x5b,0x1e,
- 0x26,0x27,0xe5,0xe5,0x03,0x10,0x31,0x2a,0x05,0x03,0x05,0x02,0x02,0x05,0x03,0x05,
- 0x03,0x05,0xe5,0x01,0x05,0x14,0x13,0x29,0x06,0xe5,0xe6,0x46,0x27,0x15,0x46,0x33,
- 0x05,0xe5,0x01,0x04,0x57,0xa9,0x03,0x14,0x09,0x09,0x09,0x09,0x09,0xe6,0x06,0x09,
- 0xe6,0x06,0x09,0xe6,0x06,0x09,0x0b,0x09,0x09,0x09,0x09,0x09,0x09,0xe6,0x06,0x09,
- 0x09,0x09,0x09,0x0a,0x02,0x05,0x09,0x08,0xe5,0x07,0xe5,0x07,0xe5,0x07,0xe5,0x07,
- 0xe5,0x05,0x01,0xe5,0x07,0xe5,0x05,0x01,0xe5,0x07,0xe5,0x05,0x02,0x09,0x07,0x03,
- 0x09,0x09,0x09,0x09,0x04,0x03,0xe5,0x07,0xe5,0x05,0x01,0xe5,0x07,0xe5,0x07,0xe5,
- 0x08,0x09,0x10,0xe6,0x15,0x05,0x03,0x05,0x03,0x05,0x03,0x05,0x03,0x05,0x03,0x05,
- 0x03,0x05,0x03,0x09,0x05,0x03,0x04,0x09,0x05,0x05,0x09,0x09,0x09,0x14,0x03,0x09,
- 0x05,0x03,0x09,0x27,0x01,0x0d,0x03,0x03,0x05,0x03,0x05,0x03,0x05,0x03,0x05,0x03,
- 0x09,0x05,0x03,0x09,0x05,0x03,0x09,0x01,0x04,0x04,0x04,0x06,0x04,0x04,0x04,0x04,
- 0x04,0x04,0x04,0x06,0x0b,0x03,0x09,0x09,0x09,0x09,0x03,0x05,0x03,0x0d,0x02,0x01,
- 0x0b,0x06,0x01,0x02,0x01,0x04,0x02,0x01,0x04,0x02,0x01,0x04,0x02,0x01,0x04,0x02,
- 0x01,0x01,0x05,0x01,0x04,0x02,0x01,0x01,0x05,0x01,0x02,0x01,0x02,0x01,0x01,0xe5,
- 0x06,0x02,0x02,0x03,0x02,0x02,0x05,0x02,0x02,0x03,0x02,0x02,0x03,0x02,0x02,0x03,
- 0x02,0x02,0x02,0x04,0x02,0x01,0x04,0x02,0x01,0x01,0xe5,0x03,0x01,0x01,0x02,0x04,
- 0x02,0x01,0x02,0x01,0x01,0x02,0x04,0x04,0x04,0x06,0x02,0x02,0xe6,0xe5,0xe5,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
diff --git a/board/esd/ar405/u-boot.lds b/board/esd/ar405/u-boot.lds
deleted file mode 100644
index 3b9aa7c5d1..0000000000
--- a/board/esd/ar405/u-boot.lds
+++ /dev/null
@@ -1,164 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- .resetvec 0xFFFFFFFC :
- {
- *(.resetvec)
- } = 0xffff
-
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/ppc4xx/start.o (.text)
- cpu/ppc4xx/traps.o (.text)
- cpu/ppc4xx/interrupts.o (.text)
- cpu/ppc4xx/serial.o (.text)
- cpu/ppc4xx/cpu_init.o (.text)
- cpu/ppc4xx/speed.o (.text)
- cpu/ppc4xx/4xx_enet.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/extable.o (.text)
- lib_ppc/board.o (.text)
- lib_generic/zlib.o (.text)
-
- common/cmd_boot.o (.text)
- common/cmd_bootm.o (.text)
- common/cmd_flash.o (.text)
- common/cmd_mem.o (.text)
- common/cmd_nvedit.o (.text)
- common/console.o (.text)
- common/lists.o (.text)
- common/main.o (.text)
-
-/*
- . = DEFINED(env_offset) ? env_offset : .;
- common/environment.o (.ppcenv)
-*/
- common/environment.o (.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/esd/ash405/Makefile b/board/esd/ash405/Makefile
deleted file mode 100644
index a60495a59a..0000000000
--- a/board/esd/ash405/Makefile
+++ /dev/null
@@ -1,46 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o ../common/misc.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/esd/ash405/ash405.c b/board/esd/ash405/ash405.c
deleted file mode 100644
index 03ae7fda4b..0000000000
--- a/board/esd/ash405/ash405.c
+++ /dev/null
@@ -1,252 +0,0 @@
-/*
- * (C) Copyright 2001-2003
- * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/processor.h>
-#include <command.h>
-#include <malloc.h>
-
-/* ------------------------------------------------------------------------- */
-
-#if 0
-#define FPGA_DEBUG
-#endif
-
-extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
-
-/* fpga configuration data - gzip compressed and generated by bin2c */
-const unsigned char fpgadata[] =
-{
-#include "fpgadata.c"
-};
-
-/*
- * include common fpga code (for esd boards)
- */
-#include "../common/fpga.c"
-
-
-/* Prototypes */
-int gunzip(void *, int, unsigned char *, unsigned long *);
-
-
-int board_early_init_f (void)
-{
- /*
- * IRQ 0-15 405GP internally generated; active high; level sensitive
- * IRQ 16 405GP internally generated; active low; level sensitive
- * IRQ 17-24 RESERVED
- * IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive
- * IRQ 26 (EXT IRQ 1) SER0 ; active low; level sensitive
- * IRQ 27 (EXT IRQ 2) SER1; active low; level sensitive
- * IRQ 28 (EXT IRQ 3) FPGA 0; active low; level sensitive
- * IRQ 29 (EXT IRQ 4) FPGA 1; active low; level sensitive
- * IRQ 30 (EXT IRQ 5) PCI INTA; active low; level sensitive
- * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
- */
- mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
- mtdcr(uicer, 0x00000000); /* disable all ints */
- mtdcr(uiccr, 0x00000000); /* set all to be non-critical*/
- mtdcr(uicpr, 0xFFFFFF9F); /* set int polarities */
- mtdcr(uictr, 0x10000000); /* set int trigger levels */
- mtdcr(uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority*/
- mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
-
- /*
- * EBC Configuration Register: set ready timeout to 512 ebc-clks -> ca. 15 us
- */
- mtebc (epcr, 0xa8400000); /* ebc always driven */
-
- return 0;
-}
-
-
-/* ------------------------------------------------------------------------- */
-
-int misc_init_f (void)
-{
- return 0; /* dummy implementation */
-}
-
-
-int misc_init_r (void)
-{
- volatile unsigned char *duart0_mcr = (unsigned char *)((ulong)DUART0_BA + 4);
- volatile unsigned char *duart1_mcr = (unsigned char *)((ulong)DUART1_BA + 4);
- volatile unsigned char *duart2_mcr = (unsigned char *)((ulong)DUART2_BA + 4);
- volatile unsigned char *duart3_mcr = (unsigned char *)((ulong)DUART3_BA + 4);
- unsigned char *dst;
- ulong len = sizeof(fpgadata);
- int status;
- int index;
- int i;
-
- dst = malloc(CFG_FPGA_MAX_SIZE);
- if (gunzip (dst, CFG_FPGA_MAX_SIZE, (uchar *)fpgadata, &len) != 0) {
- printf ("GUNZIP ERROR - must RESET board to recover\n");
- do_reset (NULL, 0, 0, NULL);
- }
-
- status = fpga_boot(dst, len);
- if (status != 0) {
- printf("\nFPGA: Booting failed ");
- switch (status) {
- case ERROR_FPGA_PRG_INIT_LOW:
- printf("(Timeout: INIT not low after asserting PROGRAM*)\n ");
- break;
- case ERROR_FPGA_PRG_INIT_HIGH:
- printf("(Timeout: INIT not high after deasserting PROGRAM*)\n ");
- break;
- case ERROR_FPGA_PRG_DONE:
- printf("(Timeout: DONE not high after programming FPGA)\n ");
- break;
- }
-
- /* display infos on fpgaimage */
- index = 15;
- for (i=0; i<4; i++) {
- len = dst[index];
- printf("FPGA: %s\n", &(dst[index+1]));
- index += len+3;
- }
- putc ('\n');
- /* delayed reboot */
- for (i=20; i>0; i--) {
- printf("Rebooting in %2d seconds \r",i);
- for (index=0;index<1000;index++)
- udelay(1000);
- }
- putc ('\n');
- do_reset(NULL, 0, 0, NULL);
- }
-
- puts("FPGA: ");
-
- /* display infos on fpgaimage */
- index = 15;
- for (i=0; i<4; i++) {
- len = dst[index];
- printf("%s ", &(dst[index+1]));
- index += len+3;
- }
- putc ('\n');
-
- free(dst);
-
- /*
- * Reset FPGA via FPGA_DATA pin
- */
- SET_FPGA(FPGA_PRG | FPGA_CLK);
- udelay(1000); /* wait 1ms */
- SET_FPGA(FPGA_PRG | FPGA_CLK | FPGA_DATA);
- udelay(1000); /* wait 1ms */
-
- /*
- * Reset external DUARTs
- */
- out32(GPIO0_OR, in32(GPIO0_OR) | CFG_DUART_RST); /* set reset to high */
- udelay(10); /* wait 10us */
- out32(GPIO0_OR, in32(GPIO0_OR) & ~CFG_DUART_RST); /* set reset to low */
- udelay(1000); /* wait 1ms */
-
- /*
- * Set NAND-FLASH GPIO signals to default
- */
- out32(GPIO0_OR, in32(GPIO0_OR) & ~(CFG_NAND_CLE | CFG_NAND_ALE));
- out32(GPIO0_OR, in32(GPIO0_OR) | CFG_NAND_CE);
-
- /*
- * Enable interrupts in exar duart mcr[3]
- */
- *duart0_mcr = 0x08;
- *duart1_mcr = 0x08;
- *duart2_mcr = 0x08;
- *duart3_mcr = 0x08;
-
- return (0);
-}
-
-
-/*
- * Check Board Identity:
- */
-
-int checkboard (void)
-{
- char str[64];
- int i = getenv_r ("serial#", str, sizeof(str));
-
- puts ("Board: ");
-
- if (i == -1) {
- puts ("### No HW ID - assuming ASH405");
- } else {
- puts(str);
- }
-
- putc ('\n');
-
- return 0;
-}
-
-/* ------------------------------------------------------------------------- */
-
-long int initdram (int board_type)
-{
- unsigned long val;
-
- mtdcr(memcfga, mem_mb0cf);
- val = mfdcr(memcfgd);
-
-#if 0
- printf("\nmb0cf=%x\n", val); /* test-only */
- printf("strap=%x\n", mfdcr(strap)); /* test-only */
-#endif
-
- return (4*1024*1024 << ((val & 0x000e0000) >> 17));
-}
-
-/* ------------------------------------------------------------------------- */
-
-int testdram (void)
-{
- /* TODO: XXX XXX XXX */
- printf ("test: 16 MB - ok\n");
-
- return (0);
-}
-
-/* ------------------------------------------------------------------------- */
-
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
-#include <linux/mtd/nand.h>
-extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
-
-void nand_init(void)
-{
- nand_probe(CFG_NAND_BASE);
- if (nand_dev_desc[0].ChipID != NAND_ChipID_UNKNOWN) {
- print_size(nand_dev_desc[0].totlen, "\n");
- }
-}
-#endif
diff --git a/board/esd/ash405/config.mk b/board/esd/ash405/config.mk
deleted file mode 100644
index 1d743a9f87..0000000000
--- a/board/esd/ash405/config.mk
+++ /dev/null
@@ -1,28 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# esd ASH405 boards
-#
-
-TEXT_BASE = 0xFFFC0000
diff --git a/board/esd/ash405/flash.c b/board/esd/ash405/flash.c
deleted file mode 100644
index 89af1190a8..0000000000
--- a/board/esd/ash405/flash.c
+++ /dev/null
@@ -1,101 +0,0 @@
-/*
- * (C) Copyright 2001
- * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <ppc4xx.h>
-#include <asm/processor.h>
-
-/*
- * include common flash code (for esd boards)
- */
-#include "../common/flash.c"
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (vu_long * addr, flash_info_t * info);
-static void flash_get_offsets (ulong base, flash_info_t * info);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- unsigned long size_b0;
- int i;
- uint pbcr;
- unsigned long base_b0;
- int size_val = 0;
-
- /* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* Static FLASH Bank configuration here - FIXME XXX */
-
- size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size_b0, size_b0<<20);
- }
-
- /* Setup offsets */
- flash_get_offsets (-size_b0, &flash_info[0]);
-
- /* Re-do sizing to get full correct info */
- mtdcr(ebccfga, pb0cr);
- pbcr = mfdcr(ebccfgd);
- mtdcr(ebccfga, pb0cr);
- base_b0 = -size_b0;
- switch (size_b0) {
- case 1 << 20:
- size_val = 0;
- break;
- case 2 << 20:
- size_val = 1;
- break;
- case 4 << 20:
- size_val = 2;
- break;
- case 8 << 20:
- size_val = 3;
- break;
- case 16 << 20:
- size_val = 4;
- break;
- }
- pbcr = (pbcr & 0x0001ffff) | base_b0 | (size_val << 17);
- mtdcr(ebccfgd, pbcr);
-
- /* Monitor protection ON by default */
- (void)flash_protect(FLAG_PROTECT_SET,
- -CFG_MONITOR_LEN,
- 0xffffffff,
- &flash_info[0]);
-
- flash_info[0].size = size_b0;
-
- return (size_b0);
-}
diff --git a/board/esd/ash405/fpgadata.c b/board/esd/ash405/fpgadata.c
deleted file mode 100644
index 94e8db892a..0000000000
--- a/board/esd/ash405/fpgadata.c
+++ /dev/null
@@ -1,2492 +0,0 @@
- 0x1f,0x8b,0x08,0x08,0x5c,0xa1,0x5d,0x3f,0x00,0x03,0x61,0x73,0x68,0x34,0x30,0x35,
- 0x5f,0x31,0x5f,0x30,0x32,0x2e,0x62,0x69,0x74,0x00,0xec,0xfd,0x0f,0x78,0x1c,0xe5,
- 0x91,0x2f,0x0a,0x57,0xbf,0xdd,0x92,0x5f,0x4d,0x8f,0x34,0xad,0x91,0x4c,0x14,0x30,
- 0xa6,0x35,0x92,0xcd,0x58,0x19,0xc9,0xe3,0x91,0x90,0x85,0x10,0xa3,0xb6,0x24,0x58,
- 0x45,0x36,0x58,0x71,0xd8,0x2c,0x67,0x97,0x93,0x1d,0x88,0x93,0xe3,0xdd,0x75,0x72,
- 0x1c,0x36,0x37,0xc7,0x21,0x6c,0xf2,0x6a,0x24,0xe3,0xb1,0x65,0xe3,0xc1,0x38,0xc1,
- 0x04,0x92,0x3b,0xfe,0x43,0x10,0xe0,0x24,0x63,0xd9,0x60,0x19,0x1b,0x68,0x09,0x41,
- 0xc6,0xb6,0xb0,0x15,0xc7,0x9b,0x35,0xc4,0x0b,0x63,0x50,0x88,0x30,0x82,0xc8,0xe0,
- 0x24,0xb2,0x2d,0xec,0x5b,0xd5,0x23,0xcd,0xf4,0x38,0x7b,0xf6,0xec,0xde,0xf3,0xdc,
- 0xef,0xdb,0xef,0xbb,0xab,0x73,0x9e,0x67,0x2b,0xdd,0xed,0xa6,0xfb,0x9d,0xb7,0xab,
- 0x7e,0x55,0xf5,0xab,0x2a,0xc8,0x73,0x8d,0xa7,0xfe,0x1f,0x80,0x74,0x37,0x68,0x77,
- 0xff,0xfd,0x8a,0x1a,0xff,0x0d,0x7f,0xbd,0xe0,0xaf,0xfd,0x81,0xaa,0xaf,0x7d,0x69,
- 0x39,0xdc,0x03,0x6a,0xe0,0xef,0x6f,0xf0,0x7f,0xf9,0x1b,0x5f,0x5f,0x50,0x53,0x03,
- 0x5f,0xc2,0xff,0xe5,0xf7,0x57,0xcf,0xf7,0xdf,0x88,0xff,0x1f,0x96,0x43,0xde,0x82,
- 0x05,0xf5,0x35,0xb5,0xf5,0xfe,0x1a,0xf8,0x32,0x48,0xd5,0x3b,0x2f,0xe3,0xdf,0xd3,
- 0x8f,0xfe,0xf9,0x57,0xfc,0x20,0x24,0x00,0x98,0xe1,0x97,0x42,0xf4,0x7f,0x55,0xbf,
- 0xa4,0x4b,0x20,0x1a,0x2b,0xfd,0x60,0xd2,0xff,0x86,0xa9,0xf3,0x79,0x7e,0xd0,0xed,
- 0xff,0x5b,0xf2,0x83,0x01,0xed,0x60,0x6c,0x00,0xb7,0x1f,0xfe,0xd7,0x7f,0x86,0x22,
- 0xa6,0xc5,0x7f,0xe7,0xf5,0x97,0x0f,0x8b,0xff,0xe9,0x55,0x99,0xbf,0xc6,0x8f,0x62,
- 0xd3,0x22,0xfb,0x37,0xdc,0x5f,0x32,0x20,0x7d,0xff,0x37,0xfe,0x4d,0xf7,0xff,0xc3,
- 0xf4,0xfd,0xff,0xbd,0xd7,0x83,0xfb,0xdf,0x70,0x39,0x80,0x92,0x7e,0x1e,0x37,0x38,
- 0x80,0x09,0x88,0x81,0xf7,0x5f,0x11,0x1a,0x07,0xa7,0xff,0x61,0x7f,0xce,0x09,0x71,
- 0x4c,0x34,0x24,0x67,0xac,0x92,0x67,0x19,0x93,0x7c,0x61,0xd2,0x15,0xed,0x3c,0x17,
- 0x3b,0x2a,0x1a,0x93,0xae,0x44,0xd9,0x4a,0x76,0xac,0xa3,0x5a,0x5f,0x3a,0x51,0x34,
- 0xae,0xad,0x9a,0xba,0xde,0x2c,0xf9,0x2d,0x74,0x8b,0x82,0x10,0x8f,0xb3,0xca,0x48,
- 0x1f,0x38,0x92,0x05,0x1b,0xd8,0x6f,0xf4,0xf5,0xa2,0x2a,0xa9,0xf6,0xc1,0x8b,0x7c,
- 0x9d,0xa8,0x30,0xd4,0x3e,0x96,0x54,0xf4,0xa9,0xeb,0x13,0xd0,0x65,0x74,0x82,0xcf,
- 0x7c,0xcc,0x9f,0x9b,0xaf,0x3c,0x9f,0x17,0x33,0x55,0x0d,0x06,0x79,0x58,0xf2,0xa1,
- 0x90,0xeb,0x84,0x67,0x84,0x6e,0xa8,0xfe,0xa6,0xc3,0xd2,0xf4,0xf5,0x66,0xce,0x8f,
- 0xa1,0x1b,0xaa,0x42,0x25,0xc2,0xb1,0x12,0xfa,0xc2,0x1e,0xd3,0xb1,0x81,0x7d,0x85,
- 0x45,0xb4,0xaa,0x41,0x75,0x6b,0x93,0x0f,0x9e,0xd1,0x2b,0x5a,0xd5,0x38,0x9b,0x50,
- 0xa6,0x9f,0x67,0xd1,0xcc,0x77,0xc3,0x47,0x1e,0x08,0xbe,0xe3,0xda,0x5b,0xe6,0x83,
- 0x71,0x11,0xe8,0xbf,0xee,0x71,0xf9,0x5d,0x38,0x6c,0x04,0x93,0x2e,0xbd,0xcc,0x09,
- 0xef,0xac,0x09,0xac,0x72,0xc5,0xe5,0xe1,0x96,0xe9,0xeb,0x63,0x52,0x5c,0xb9,0xbc,
- 0xa8,0x71,0x91,0xeb,0x5b,0xf2,0x41,0xf8,0x04,0x1a,0xcd,0xa5,0xa6,0x3c,0x0e,0x97,
- 0x44,0xa3,0xe9,0x1a,0x57,0x27,0xb5,0x1f,0x2a,0x2f,0xdd,0xed,0x1a,0x6f,0x1e,0x85,
- 0xd0,0xd4,0xf5,0x27,0xb4,0x2e,0xfe,0x3e,0xd4,0x0f,0x5c,0xb7,0xfb,0xf3,0x63,0xca,
- 0xaf,0xcb,0xeb,0xcd,0x25,0x8f,0x7f,0x6a,0x44,0x9a,0x80,0xa0,0xe9,0xea,0x93,0x3f,
- 0x84,0xf3,0x22,0x60,0x6c,0x88,0xcb,0xe3,0xca,0xf4,0x7a,0x26,0x72,0x74,0xd1,0x3d,
- 0xa2,0x1b,0xfc,0x59,0xd6,0x80,0x2f,0xe2,0x49,0xb4,0x46,0xd9,0xbb,0x30,0x21,0xaa,
- 0xde,0x56,0x9f,0x65,0x93,0xb0,0xbf,0xab,0xd6,0xcc,0x8f,0xb3,0x8f,0x70,0xf7,0x4f,
- 0xbd,0xaf,0xb2,0x44,0xd9,0x91,0xe0,0xe3,0x8e,0x9a,0xdc,0x8d,0x7a,0x54,0xd2,0x4f,
- 0x73,0xb7,0x7b,0x44,0xe9,0x15,0xbe,0xa4,0xaa,0xb0,0x21,0xa8,0x86,0x98,0xc1,0xfd,
- 0x6c,0x02,0xbf,0x95,0xd4,0xdf,0xb8,0xf6,0x5d,0xf8,0x94,0x28,0xfb,0x69,0xeb,0x6a,
- 0xcf,0x6c,0xe8,0xea,0xbb,0x3b,0xe9,0xbd,0x93,0xfd,0x2a,0x54,0x1e,0xa9,0x4c,0xaa,
- 0x2b,0xd8,0x9b,0xc6,0xbe,0xe1,0x39,0xa1,0xbc,0xd5,0xec,0x64,0xfa,0xfe,0xad,0x7c,
- 0x89,0xf1,0x0e,0xd4,0x8d,0x3a,0x6a,0x9b,0x37,0xc0,0x2f,0xcd,0x78,0xff,0x92,0x9b,
- 0x9a,0x86,0x8c,0x5e,0xad,0x21,0xe9,0xaa,0x29,0x3b,0x2a,0x3e,0x86,0x40,0xbb,0xd3,
- 0x2f,0x1f,0x67,0xd3,0xcf,0x6f,0xcc,0x3c,0x08,0xbf,0x85,0xe0,0xa0,0x67,0x5c,0xde,
- 0x05,0xfb,0xe0,0x06,0x13,0x57,0x6f,0xd2,0xb8,0x5f,0xc3,0xf7,0x1d,0x97,0x27,0xe1,
- 0x8f,0x4a,0x63,0x8b,0x3a,0x2e,0x0f,0xb3,0xe9,0xf5,0xe1,0x33,0x7b,0xe0,0x22,0xf8,
- 0x4d,0x67,0xbc,0x79,0x97,0x11,0x67,0x6e,0x73,0x69,0x54,0x1a,0x81,0x93,0x10,0x4c,
- 0x3a,0xe3,0xf2,0x07,0xe6,0x00,0x04,0x42,0x28,0x0c,0x40,0x7a,0x3f,0x68,0x51,0x78,
- 0x16,0x4a,0xcd,0xfc,0x55,0x15,0xb3,0xa2,0x7b,0x51,0x58,0xdc,0xce,0x06,0xa1,0x0b,
- 0x6e,0x34,0x1d,0xab,0x9a,0x86,0xf4,0x5f,0xc1,0x53,0x06,0x5f,0x85,0xeb,0x33,0x7d,
- 0xbd,0x0e,0x8f,0xc1,0x4b,0xa2,0x2c,0xf9,0xe8,0x6a,0xc7,0x8f,0xe0,0xa5,0xf0,0x9c,
- 0x64,0xdb,0x6a,0xcf,0x9b,0xd0,0x25,0xe6,0x27,0xf3,0x56,0x2f,0x7b,0x53,0xac,0x15,
- 0xd7,0xdf,0xc3,0x57,0x33,0x33,0xbd,0xdf,0x46,0x8b,0xd7,0xc3,0x6e,0xd0,0x5f,0xcf,
- 0x0b,0x38,0x36,0xf0,0x3d,0xc9,0x72,0x53,0xad,0x61,0x1f,0xe4,0x75,0xc4,0xbc,0x21,
- 0xf5,0x06,0x5c,0xcf,0x87,0x4d,0x5f,0xc8,0xeb,0x67,0xc7,0xd3,0xd7,0x8f,0xcc,0xbc,
- 0x08,0x17,0x62,0xd5,0xd1,0xfc,0x0f,0xd5,0x1e,0xb8,0xb4,0xad,0x56,0x14,0x7c,0x59,
- 0x3e,0xcf,0x1e,0x0c,0x05,0x3b,0xf3,0x56,0x7c,0x7e,0x14,0x5e,0x8d,0x2d,0x8c,0x3b,
- 0x63,0xf2,0x84,0x32,0xfd,0xbe,0xad,0x92,0xd0,0x27,0xe0,0x45,0xcd,0xd5,0x25,0xdf,
- 0x0d,0x13,0xec,0x79,0x40,0x21,0x19,0x19,0x65,0x41,0x28,0x10,0x9d,0x49,0x3e,0x01,
- 0xf7,0x31,0x97,0x90,0x8f,0xc3,0xb4,0x16,0x71,0x6a,0x3b,0x9b,0x0e,0x41,0xaf,0xe1,
- 0x8c,0xca,0xb9,0xe1,0x43,0xa2,0xb6,0xc5,0xb5,0x55,0xfe,0x4a,0xd7,0xa1,0x45,0xc1,
- 0x90,0xeb,0x71,0xf9,0x01,0x71,0x28,0x12,0x30,0x36,0x45,0xe5,0x01,0x65,0xfa,0x7a,
- 0x01,0x5f,0x81,0x0e,0x43,0xff,0x2f,0x8e,0xab,0xcb,0x7e,0x13,0xe9,0x10,0x9e,0x90,
- 0xfa,0x28,0x2b,0x87,0xd7,0xa1,0xca,0x50,0xa3,0xee,0xb9,0xf0,0x7a,0xc8,0x83,0x02,
- 0x4b,0x82,0x36,0x75,0x7d,0x5d,0x4e,0x39,0xac,0x03,0x8f,0xd1,0xba,0x19,0x2f,0x5b,
- 0x17,0xfa,0x31,0x9e,0x0d,0xaf,0xa4,0x2f,0xa8,0x55,0xdd,0xc2,0x76,0xc2,0x3a,0xdd,
- 0xba,0xfe,0xd5,0xf4,0x7e,0xf0,0x16,0x3b,0xb7,0xad,0x13,0x1e,0xa3,0xcd,0xbd,0x7e,
- 0xb0,0xa7,0xc3,0x1b,0x32,0x54,0xf7,0x80,0xb2,0xed,0x21,0x70,0x1a,0xaa,0xc6,0x94,
- 0xd8,0xa3,0x90,0x24,0x61,0x60,0x7a,0x3b,0xc0,0xea,0xfc,0x90,0x48,0x40,0x00,0x78,
- 0x58,0xd5,0x45,0x42,0xaf,0x95,0xd4,0xb0,0x4c,0x47,0x82,0xa0,0x0a,0x39,0x86,0x42,
- 0x2f,0xe0,0xfb,0xbe,0x29,0x4d,0x3f,0xcf,0xd6,0x99,0xe7,0xe0,0xf7,0xd0,0x68,0x2c,
- 0x5d,0xf6,0xf2,0xce,0xd8,0x27,0xde,0xa0,0xe1,0x1a,0x96,0xce,0x6d,0xfb,0x04,0x6e,
- 0x36,0xd4,0x61,0x79,0x04,0x2e,0xc3,0xcd,0x6d,0xae,0xa8,0xfc,0x95,0x9c,0xe9,0xef,
- 0xb1,0x24,0x67,0x2f,0xd0,0xd9,0x45,0xc7,0x17,0xef,0x15,0xff,0xc0,0xaa,0xf1,0x1f,
- 0xb2,0x1b,0xc4,0x3f,0xe4,0xdc,0x64,0xac,0x1d,0x96,0xf7,0xe2,0xad,0x7a,0x5b,0xf0,
- 0xfa,0x57,0x61,0xfa,0xfa,0xba,0x92,0xd3,0xd0,0xa7,0x54,0x09,0x1e,0x0e,0xeb,0xa2,
- 0x17,0xf0,0x79,0xba,0x1c,0xa5,0xa2,0x0f,0x3c,0xa0,0xc6,0x58,0x29,0xa0,0x20,0x54,
- 0xc1,0x8e,0xa6,0xd7,0xb3,0x55,0xe9,0x32,0x76,0x83,0xcf,0xc8,0x2b,0x72,0x6c,0x8c,
- 0xed,0x87,0x90,0xb1,0xb8,0xd8,0x93,0x03,0xfb,0xc3,0xba,0xb1,0x58,0x73,0xaf,0x51,
- 0xf6,0x33,0x9d,0xde,0xf7,0xb8,0x34,0x7d,0xff,0xad,0xca,0x2e,0xe9,0x00,0xae,0x36,
- 0x8f,0xe2,0x7a,0xee,0x87,0xb9,0xb4,0x7a,0xe5,0xfa,0x7e,0xd8,0x6e,0x74,0x3f,0x64,
- 0x1d,0xb1,0xd6,0xf3,0xdd,0xf4,0x7e,0x88,0xcd,0x7c,0xb7,0xe4,0xbc,0xd2,0xd0,0x7e,
- 0xdb,0x6c,0x75,0x27,0x9c,0x1f,0xf6,0x18,0xae,0xc7,0x3b,0xe7,0xc2,0xf9,0xa6,0xfa,
- 0xd0,0x75,0x5b,0x71,0xfd,0xcf,0xb6,0x07,0x96,0xe3,0xf3,0x8f,0xa6,0xf5,0x55,0x62,
- 0xd1,0x4e,0x71,0x9e,0xe3,0xb2,0x6c,0xc6,0xd5,0x38,0x0f,0x28,0x3c,0x2a,0xbf,0xbb,
- 0xe8,0x7c,0x6b,0x70,0x05,0x6e,0x0c,0x3c,0x22,0xf0,0x48,0x54,0xbe,0x90,0xd6,0x3f,
- 0x5c,0x8b,0xe1,0xd7,0x5c,0x0f,0xf9,0xe2,0x4b,0xba,0x38,0x19,0xaa,0x85,0x7c,0x90,
- 0x75,0xa0,0xf5,0xf7,0x09,0x59,0x37,0x4e,0x42,0x40,0xcb,0x17,0xf2,0xe1,0xf4,0x7e,
- 0xf6,0xe6,0xd4,0xc3,0x51,0xa3,0x4c,0xf0,0xa4,0xfb,0x46,0xc8,0x6d,0xa9,0x88,0x5d,
- 0x33,0xc6,0xbc,0xf0,0x40,0x17,0xae,0xd8,0x0a,0xd6,0x07,0x6f,0x0a,0x5c,0x9f,0x18,
- 0x3b,0x9c,0xd9,0x0f,0x4a,0x0b,0x74,0x1a,0xde,0x81,0x3c,0xdd,0x93,0x0f,0x0f,0x47,
- 0xf5,0x91,0xcf,0x56,0x7b,0x9c,0x78,0xc4,0x97,0x44,0xb5,0x93,0x0b,0x3b,0x56,0xe9,
- 0xfd,0x79,0x7e,0xbc,0x7e,0xfa,0xf7,0x15,0xda,0x17,0xf4,0xb5,0xa2,0xcc,0xf4,0x7e,
- 0x83,0x39,0x60,0x0d,0xcc,0x33,0xd4,0x71,0x36,0x1b,0xd6,0xf0,0xfc,0x7b,0x5a,0xc7,
- 0x07,0x7e,0xc4,0x1f,0x91,0x4a,0x4d,0x75,0x95,0x67,0x34,0x7d,0x7d,0x24,0x72,0x2b,
- 0xfc,0x5c,0xdc,0x98,0xbc,0xcd,0x3b,0x63,0x36,0xff,0x95,0x58,0x80,0xda,0xa9,0xa8,
- 0x80,0xbd,0x22,0x6e,0x0e,0x39,0xef,0x94,0x67,0xc3,0x6f,0xc5,0x82,0x64,0xfe,0x6a,
- 0xe9,0x8c,0x67,0xfa,0x7a,0x2e,0xed,0x82,0x77,0x48,0xbb,0xc6,0xd4,0x51,0x98,0x80,
- 0xfa,0x45,0xae,0xb8,0x3a,0x86,0x0b,0xd5,0x60,0xb8,0xfc,0xf2,0x10,0xaa,0x9a,0x17,
- 0x07,0x51,0x23,0x0d,0x3c,0x30,0xbd,0x3e,0x4c,0x39,0x08,0x97,0xf1,0x26,0xce,0x51,
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- 0x9d,0xf4,0x1d,0xf8,0xa4,0x03,0x4f,0x4d,0xc8,0x66,0x7a,0xff,0xf4,0x94,0x3c,0x2e,
- 0xf6,0xf1,0xd2,0x01,0x3e,0xce,0xea,0x59,0x87,0x5e,0x6a,0xa8,0xdf,0x61,0xb3,0xc4,
- 0x5e,0xf0,0x35,0xa9,0xdf,0x96,0x67,0x89,0x7d,0xb0,0xdb,0x44,0xfd,0x73,0x46,0x4c,
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diff --git a/board/esd/ash405/u-boot.lds b/board/esd/ash405/u-boot.lds
deleted file mode 100644
index 95854f2932..0000000000
--- a/board/esd/ash405/u-boot.lds
+++ /dev/null
@@ -1,149 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- .resetvec 0xFFFFFFFC :
- {
- *(.resetvec)
- } = 0xffff
-
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/ppc4xx/start.o (.text)
- cpu/ppc4xx/traps.o (.text)
- cpu/ppc4xx/interrupts.o (.text)
- cpu/ppc4xx/serial.o (.text)
- cpu/ppc4xx/cpu_init.o (.text)
- cpu/ppc4xx/speed.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/extable.o (.text)
- lib_generic/zlib.o (.text)
-
-/* . = env_offset;*/
-/* common/environment.o(.text)*/
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/esd/canbt/Makefile b/board/esd/canbt/Makefile
deleted file mode 100644
index a60495a59a..0000000000
--- a/board/esd/canbt/Makefile
+++ /dev/null
@@ -1,46 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o ../common/misc.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/esd/canbt/canbt.c b/board/esd/canbt/canbt.c
deleted file mode 100644
index 2ced6cb17f..0000000000
--- a/board/esd/canbt/canbt.c
+++ /dev/null
@@ -1,203 +0,0 @@
-/*
- * (C) Copyright 2001
- * Matthias Fuchs, esd gmbh germany, matthias.fuchs@esd-electronics.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include "canbt.h"
-#include <asm/processor.h>
-#include <command.h>
-
-
-/*cmd_boot.c*/
-extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
-
-
-/* ------------------------------------------------------------------------- */
-
-#if 0
-#define FPGA_DEBUG
-#endif
-
-/* fpga configuration data */
-const unsigned char fpgadata[] = {
-#include "fpgadata.c"
-};
-
-/*
- * include common fpga code (for esd boards)
- */
-#include "../common/fpga.c"
-
-
-int board_early_init_f (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- unsigned long cntrl0Reg;
- int index, len, i;
- int status;
-
- /*
- * Setup GPIO pins
- */
- cntrl0Reg = mfdcr (cntrl0) & 0xf0001fff;
- cntrl0Reg |= 0x0070f000;
- mtdcr (cntrl0, cntrl0Reg);
-
-#ifdef FPGA_DEBUG
- /* set up serial port with default baudrate */
- (void) get_clocks ();
- gd->baudrate = CONFIG_BAUDRATE;
- serial_init ();
- console_init_f ();
-#endif
-
- /*
- * Boot onboard FPGA
- */
- status = fpga_boot ((unsigned char *) fpgadata, sizeof (fpgadata));
- if (status != 0) {
- /* booting FPGA failed */
-#ifndef FPGA_DEBUG
- /* set up serial port with default baudrate */
- (void) get_clocks ();
- gd->baudrate = CONFIG_BAUDRATE;
- serial_init ();
- console_init_f ();
-#endif
- printf ("\nFPGA: Booting failed ");
- switch (status) {
- case ERROR_FPGA_PRG_INIT_LOW:
- printf ("(Timeout: INIT not low after asserting PROGRAM*)\n ");
- break;
- case ERROR_FPGA_PRG_INIT_HIGH:
- printf ("(Timeout: INIT not high after deasserting PROGRAM*)\n ");
- break;
- case ERROR_FPGA_PRG_DONE:
- printf ("(Timeout: DONE not high after programming FPGA)\n ");
- break;
- }
-
- /* display infos on fpgaimage */
- index = 15;
- for (i = 0; i < 4; i++) {
- len = fpgadata[index];
- printf ("FPGA: %s\n", &(fpgadata[index + 1]));
- index += len + 3;
- }
- putc ('\n');
- /* delayed reboot */
- for (i = 20; i > 0; i--) {
- printf ("Rebooting in %2d seconds \r", i);
- for (index = 0; index < 1000; index++)
- udelay (1000);
- }
- putc ('\n');
- do_reset (NULL, 0, 0, NULL);
- }
-
- /*
- * Setup port pins for normal operation
- */
- out32 (GPIO0_ODR, 0x00000000); /* no open drain pins */
- out32 (GPIO0_TCR, 0x07038100); /* setup for output */
- out32 (GPIO0_OR, 0x07030100); /* set output pins to high (default) */
-
- /*
- * IRQ 0-15 405GP internally generated; active high; level sensitive
- * IRQ 16 405GP internally generated; active low; level sensitive
- * IRQ 17-24 RESERVED
- * IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive
- * IRQ 26 (EXT IRQ 1) CAN1; active low; level sensitive
- * IRQ 27 (EXT IRQ 2) PCI SLOT 0; active low; level sensitive
- * IRQ 28 (EXT IRQ 3) PCI SLOT 1; active low; level sensitive
- * IRQ 29 (EXT IRQ 4) PCI SLOT 2; active low; level sensitive
- * IRQ 30 (EXT IRQ 5) PCI SLOT 3; active low; level sensitive
- * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
- */
- mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
- mtdcr (uicer, 0x00000000); /* disable all ints */
- mtdcr (uiccr, 0x00000000); /* set all to be non-critical */
- mtdcr (uicpr, 0xFFFFFF81); /* set int polarities */
- mtdcr (uictr, 0x10000000); /* set int trigger levels */
- mtdcr (uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority */
- mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
-
- return 0;
-}
-
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Check Board Identity:
- */
-
-int checkboard (void)
-{
- int index;
- int len;
- char str[64];
- int i = getenv_r ("serial#", str, sizeof (str));
-
- puts ("Board: ");
-
- if (!i || strncmp (str, "CANBT", 5)) {
- puts ("### No HW ID - assuming CANBT\n");
- return (0);
- }
-
- puts (str);
-
- puts ("\nFPGA: ");
-
- /* display infos on fpgaimage */
- index = 15;
- for (i = 0; i < 4; i++) {
- len = fpgadata[index];
- printf ("%s ", &(fpgadata[index + 1]));
- index += len + 3;
- }
-
- putc ('\n');
-
- return 0;
-}
-
-/* ------------------------------------------------------------------------- */
-
-long int initdram (int board_type)
-{
- return (16 * 1024 * 1024);
-}
-
-/* ------------------------------------------------------------------------- */
-
-int testdram (void)
-{
- /* TODO: XXX XXX XXX */
- printf ("test: 16 MB - ok\n");
-
- return (0);
-}
-
-/* ------------------------------------------------------------------------- */
diff --git a/board/esd/canbt/canbt.h b/board/esd/canbt/canbt.h
deleted file mode 100644
index 5fc313a258..0000000000
--- a/board/esd/canbt/canbt.h
+++ /dev/null
@@ -1,44 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/****************************************************************************
- * FLASH Memory Map as used by TQ Monitor:
- *
- * Start Address Length
- * +-----------------------+ 0x4000_0000 Start of Flash -----------------
- * | MON8xx code | 0x4000_0100 Reset Vector
- * +-----------------------+ 0x400?_????
- * | (unused) |
- * +-----------------------+ 0x4001_FF00
- * | Ethernet Addresses | 0x78
- * +-----------------------+ 0x4001_FF78
- * | (Reserved for MON8xx) | 0x44
- * +-----------------------+ 0x4001_FFBC
- * | Lock Address | 0x04
- * +-----------------------+ 0x4001_FFC0 ^
- * | Hardware Information | 0x40 | MON8xx
- * +=======================+ 0x4002_0000 (sector border) -----------------
- * | Autostart Header | | Applications
- * | ... | v
- *
- *****************************************************************************/
diff --git a/board/esd/canbt/config.mk b/board/esd/canbt/config.mk
deleted file mode 100644
index 80076cd943..0000000000
--- a/board/esd/canbt/config.mk
+++ /dev/null
@@ -1,29 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# esd ADCIOP boards
-#
-
-TEXT_BASE = 0xFFFE0000
-#TEXT_BASE = 0xFFFD0000
diff --git a/board/esd/canbt/flash.c b/board/esd/canbt/flash.c
deleted file mode 100644
index de847f9bea..0000000000
--- a/board/esd/canbt/flash.c
+++ /dev/null
@@ -1,84 +0,0 @@
-/*
- * (C) Copyright 2001
- * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <ppc4xx.h>
-#include <asm/processor.h>
-
-/*
- * include common flash code (for esd boards)
- */
-#include "../common/flash.c"
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (vu_long *addr, flash_info_t *info);
-static void flash_get_offsets (ulong base, flash_info_t *info);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- unsigned long size_b0;
- int i;
- uint pbcr;
- unsigned long base_b0;
-
- /* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* Static FLASH Bank configuration here - FIXME XXX */
-
- size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size_b0, size_b0<<20);
- }
-
- /* Setup offsets */
- flash_get_offsets (-size_b0, &flash_info[0]);
-
- /* Re-do sizing to get full correct info */
- mtdcr(ebccfga, pb0cr);
- pbcr = mfdcr(ebccfgd);
- mtdcr(ebccfga, pb0cr);
- base_b0 = -size_b0;
- pbcr = (pbcr & 0x0001ffff) | base_b0 | (((size_b0/1024/1024)-1)<<17);
- mtdcr(ebccfgd, pbcr);
- /* printf("pb1cr = %x\n", pbcr); */
-
- /* Monitor protection ON by default */
- (void)flash_protect(FLAG_PROTECT_SET,
- -monitor_flash_len,
- 0xffffffff,
- &flash_info[0]);
-
- flash_info[0].size = size_b0;
-
- return (size_b0);
-}
diff --git a/board/esd/canbt/fpgadata.c b/board/esd/canbt/fpgadata.c
deleted file mode 100644
index 0de7d9225b..0000000000
--- a/board/esd/canbt/fpgadata.c
+++ /dev/null
@@ -1,404 +0,0 @@
- 0x00,0x09,0x0f,0xf0,0x0f,0xf0,0x0f,0xf0,0x0f,0xf0,0x00,0x00,0x01,0x61,0x00,0x0c,
- 0x69,0x6f,0x5f,0x63,0x68,0x69,0x70,0x2e,0x6e,0x63,0x64,0x00,0x62,0x00,0x0b,0x73,
- 0x30,0x35,0x78,0x6c,0x76,0x71,0x31,0x30,0x30,0x00,0x63,0x00,0x0b,0x32,0x30,0x30,
- 0x31,0x2f,0x31,0x31,0x2f,0x32,0x33,0x00,0x64,0x00,0x09,0x31,0x33,0x3a,0x33,0x34,
- 0x3a,0x34,0x33,0x00,0x65,0xe2,0x01,0x00,0x00,0x18,0xe6,0xff,0x30,0xe8,0x01,0x01,
- 0x01,0x01,0xe7,0xe6,0x04,0x01,0x0d,0x04,0x07,0x03,0x05,0x03,0x05,0x03,0xe5,0xe5,
- 0x05,0x09,0x04,0x06,0x01,0x07,0x09,0x01,0x07,0x0b,0x0f,0x07,0x03,0x05,0x03,0x05,
- 0x03,0x11,0x03,0x0f,0x09,0x03,0x05,0x10,0xe5,0xe6,0x1a,0x0a,0x13,0x29,0x19,0x05,
- 0x09,0x04,0x04,0x09,0x09,0x09,0x0b,0x04,0x04,0x09,0x09,0x09,0x0e,0xe5,0x01,0x14,
- 0x09,0x09,0x09,0x03,0x05,0x0b,0x03,0x05,0x09,0x09,0x09,0x09,0x01,0xe6,0x7b,0x01,
- 0x01,0x02,0x75,0xe8,0x3e,0x3b,0x02,0x34,0x0a,0x09,0x07,0x09,0x01,0x11,0x0a,0xe5,
- 0xe6,0x5c,0x1e,0xe6,0xe5,0x0a,0xe5,0x50,0x1d,0x0d,0x31,0x09,0x14,0x13,0x07,0x01,
- 0x01,0x2a,0x08,0x0b,0x1e,0x1c,0x01,0xe5,0x0f,0x09,0x09,0xe5,0x07,0x09,0xe6,0x08,
- 0x05,0x03,0x01,0x07,0x09,0x09,0x0d,0xe8,0x0f,0x09,0xe5,0x07,0x09,0x04,0x05,0x0a,
- 0x01,0x07,0x01,0x07,0x09,0x09,0x0d,0xe5,0xe6,0x0c,0xe5,0x07,0xe5,0x07,0xe5,0x07,
- 0xe5,0x03,0x03,0xe5,0x06,0xe5,0xe6,0x03,0x03,0xe5,0x04,0x02,0xe5,0x01,0x05,0xe5,
- 0x07,0xe5,0x01,0x07,0x05,0xe7,0x0f,0x09,0x09,0x09,0x10,0x04,0x05,0x03,0x03,0x05,
- 0x09,0x09,0x08,0x08,0x04,0x01,0x06,0xe5,0x07,0xe5,0x07,0xe5,0x07,0xe5,0x07,0xe5,
- 0x02,0xe5,0x04,0xe5,0x07,0xe5,0x07,0xe5,0x07,0xe5,0x02,0x04,0xe5,0x07,0x02,0x03,
- 0x02,0xe5,0x0e,0x09,0x09,0x09,0x15,0x09,0x09,0x09,0x09,0x0e,0xe6,0xe5,0x0c,0x09,
- 0x09,0x09,0x09,0x04,0x04,0x01,0x09,0x06,0x02,0x09,0x09,0x11,0xe7,0x0c,0x02,0x06,
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- 0x01,0xe6,0x0f,0xe5,0x02,0x09,0x01,0x01,0xe5,0x03,0x03,0x03,0x01,0x38,0x0b,0x01,
- 0x01,0x01,0x13,0x02,0x09,0xe5,0xe6,0x02,0x01,0x02,0x06,0x37,0x0d,0x01,0x01,0x15,
- 0x07,0xe6,0xe5,0xe5,0x04,0x03,0x05,0x47,0xe5,0xe5,0x0f,0x02,0xe5,0x07,0xe5,0x01,
- 0x01,0xe5,0x01,0xe5,0x03,0x03,0xe5,0x38,0x0e,0x01,0xe5,0x2e,0x33,0x15,0xe5,0xe5,
- 0xe5,0x10,0x01,0x07,0x01,0x07,0x01,0xe5,0xe5,0x03,0x01,0xe5,0xe5,0x02,0xe5,0xe6,
- 0x07,0x01,0xe5,0x05,0x01,0xe6,0x04,0xe7,0x05,0x01,0x07,0x01,0x0b,0xe7,0x3d,0x15,
- 0x21,0x03,0x03,0xe5,0x3e,0x38,0xe5,0xe5,0xe5,0x12,0x02,0x09,0x1e,0x07,0x32,0x03,
- 0xe5,0x19,0x05,0x01,0x0a,0x09,0x06,0x3a,0xe5,0x01,0x23,0x03,0x17,0x3a,0x03,0xe5,
- 0x1f,0x1d,0x16,0xe5,0x24,0xe5,0x1e,0x09,0x12,0x02,0x15,0x01,0x23,0xe7,0x3e,0x23,
- 0x17,0x01,0xe5,0x3e,0x3c,0xe6,0x24,0x19,0x3d,0xe6,0x1b,0xe5,0x04,0x02,0xe5,0x08,
- 0x38,0x12,0x33,0x36,0xe6,0x0b,0x01,0xe5,0xe5,0x6a,0x10,0xe6,0x02,0x0b,0xe5,0xe5,
- 0x05,0xe5,0x07,0xe5,0x07,0xe6,0x06,0xe5,0x07,0xe7,0x07,0xe5,0x07,0xe5,0x07,0xe5,
- 0x07,0xe5,0x0b,0x03,0xe5,0x0f,0x09,0x09,0x09,0x09,0x04,0x04,0x01,0x09,0x09,0x09,
- 0x01,0x07,0x0d,0xe5,0xe6,0x0e,0x09,0x03,0x05,0x09,0x09,0x04,0x06,0x04,0x04,0x04,
- 0x04,0x04,0x04,0x09,0x0e,0x03,0x26,0x57,0x0f,0x09,0x09,0x09,0x09,0x0b,0x01,0x07,
- 0x09,0x09,0x02,0x06,0x0e,0xe5,0xe6,0x0c,0xe5,0x07,0xe5,0x07,0xe5,0x07,0xe5,0x07,
- 0xe5,0x09,0xe5,0x07,0xe5,0x07,0xe5,0x07,0xe5,0x07,0xe5,0x0e,0x03,0x03,0x09,0x09,
- 0x09,0x09,0x09,0x0b,0x09,0x09,0x09,0x09,0x12,0xe6,0x0d,0xe5,0xe5,0x05,0xe5,0xe5,
- 0x05,0xe5,0xe5,0x05,0xe5,0xe5,0x05,0xe5,0xe5,0x07,0xe5,0xe5,0x05,0xe5,0xe5,0x05,
- 0xe5,0xe5,0x05,0xe5,0xe5,0x05,0xe5,0xe5,0x0b,0x03,0x0e,0x09,0x09,0x09,0x09,0x03,
- 0x07,0x09,0x09,0x09,0x09,0x0f,0x02,0xe5,0x79,0xe5,0x01,0x0e,0x09,0x09,0x09,0x09,
- 0x08,0x02,0x09,0x09,0x09,0x09,0x11,0xe6,0x3e,0x3b,0x02,0x10,0x09,0x09,0x09,0x09,
- 0x0b,0x09,0x09,0x09,0x09,0x10,0xe5,0x7d,0x3f,0x3a,0xe5,0x01,0x3f,0x36,0x04,0x02,
- 0x7a,0x01,0x01,0x13,0x3d,0x28,0x01,0x01,0x3f,0x33,0x0a,0x3f,0x34,0x08,0xe5,0x79,
- 0x01,0x01,0x14,0x09,0x09,0x09,0x09,0x0b,0x09,0x09,0x09,0x09,0x09,0xe5,0x01,0x0f,
- 0x09,0x09,0x09,0x09,0x07,0x03,0x09,0x09,0x09,0x08,0xe5,0x0d,0x03,0x3a,0x04,0x3a,
- 0x02,0xe5,0x0c,0x09,0x03,0x05,0x09,0x09,0x03,0x07,0x09,0x09,0x07,0x01,0x1b,0x01,
- 0xe5,0x0a,0x02,0x07,0x05,0x03,0x01,0x03,0x03,0x01,0x03,0x03,0x09,0x06,0xe5,0x02,
- 0x04,0x04,0x04,0x02,0x06,0xe5,0x02,0x02,0x06,0x02,0xe5,0x02,0x03,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xff,
diff --git a/board/esd/canbt/u-boot.lds b/board/esd/canbt/u-boot.lds
deleted file mode 100644
index ff15b3fef9..0000000000
--- a/board/esd/canbt/u-boot.lds
+++ /dev/null
@@ -1,162 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- .resetvec 0xFFFFFFFC :
- {
- *(.resetvec)
- } = 0xffff
-
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/ppc4xx/start.o (.text)
- cpu/ppc4xx/traps.o (.text)
- cpu/ppc4xx/interrupts.o (.text)
- cpu/ppc4xx/serial.o (.text)
- cpu/ppc4xx/cpu_init.o (.text)
- cpu/ppc4xx/speed.o (.text)
- common/dlmalloc.o (.text)
- lib_ppc/extable.o (.text)
- lib_ppc/board.o (.text)
- lib_generic/zlib.o (.text)
- lib_generic/crc32.o (.text)
-
- common/cmd_boot.o (.text)
- common/cmd_bootm.o (.text)
- common/cmd_flash.o (.text)
- common/cmd_mem.o (.text)
- common/cmd_nvedit.o (.text)
- common/console.o (.text)
- common/lists.o (.text)
- common/main.o (.text)
- net/net.o (.text)
-
-/* . = env_offset;
- common/environment.o (.text)
-*/
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/esd/cms700/Makefile b/board/esd/cms700/Makefile
deleted file mode 100644
index a11ee82aa2..0000000000
--- a/board/esd/cms700/Makefile
+++ /dev/null
@@ -1,51 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-# Objects for Xilinx JTAG programming (CPLD)
-CPLD = ../common/xilinx_jtag/lenval.o \
- ../common/xilinx_jtag/micro.o \
- ../common/xilinx_jtag/ports.o
-
-OBJS = $(BOARD).o flash.o ../common/misc.o $(CPLD)
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/esd/cms700/cms700.c b/board/esd/cms700/cms700.c
deleted file mode 100644
index 649619d454..0000000000
--- a/board/esd/cms700/cms700.c
+++ /dev/null
@@ -1,262 +0,0 @@
-/*
- * (C) Copyright 2005
- * Matthias Fuchs, esd gmbh germany, matthias.fuchs@esd-electronics.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/processor.h>
-#include <command.h>
-#include <malloc.h>
-
-
-extern void lxt971_no_sleep(void);
-
-
-/* fpga configuration data - not compressed, generated by bin2c */
-const unsigned char fpgadata[] =
-{
-#include "fpgadata.c"
-};
-int filesize = sizeof(fpgadata);
-
-
-int board_early_init_f (void)
-{
- /*
- * IRQ 0-15 405GP internally generated; active high; level sensitive
- * IRQ 16 405GP internally generated; active low; level sensitive
- * IRQ 17-24 RESERVED
- * IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive
- * IRQ 26 (EXT IRQ 1) SER0 ; active low; level sensitive
- * IRQ 27 (EXT IRQ 2) SER1; active low; level sensitive
- * IRQ 28 (EXT IRQ 3) FPGA 0; active low; level sensitive
- * IRQ 29 (EXT IRQ 4) FPGA 1; active low; level sensitive
- * IRQ 30 (EXT IRQ 5) PCI INTA; active low; level sensitive
- * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
- */
- mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
- mtdcr(uicer, 0x00000000); /* disable all ints */
- mtdcr(uiccr, 0x00000000); /* set all to be non-critical*/
- mtdcr(uicpr, 0xFFFFFF80); /* set int polarities */
- mtdcr(uictr, 0x10000000); /* set int trigger levels */
- mtdcr(uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority*/
- mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
-
- /*
- * EBC Configuration Register: set ready timeout to 512 ebc-clks -> ca. 15 us
- */
- mtebc (epcr, 0xa8400000); /* ebc always driven */
-
- /*
- * Reset CPLD via GPIO12 (CS3) pin
- */
- out32(GPIO0_OR, in32(GPIO0_OR) & ~CFG_PLD_RESET);
- udelay(1000); /* wait 1ms */
- out32(GPIO0_OR, in32(GPIO0_OR) | CFG_PLD_RESET);
- udelay(1000); /* wait 1ms */
-
- return 0;
-}
-
-
-/* ------------------------------------------------------------------------- */
-
-int misc_init_f (void)
-{
- return 0; /* dummy implementation */
-}
-
-
-int misc_init_r (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- /* adjust flash start and offset */
- gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize;
- gd->bd->bi_flashoffset = 0;
-
- /*
- * Setup and enable EEPROM write protection
- */
- out32(GPIO0_OR, in32(GPIO0_OR) | CFG_EEPROM_WP);
-
- /*
- * Set NAND-FLASH GPIO signals to default
- */
- out32(GPIO0_OR, in32(GPIO0_OR) & ~(CFG_NAND_CLE | CFG_NAND_ALE));
- out32(GPIO0_OR, in32(GPIO0_OR) | CFG_NAND_CE);
-
- return (0);
-}
-
-
-/*
- * Check Board Identity:
- */
-
-int checkboard (void)
-{
- unsigned char str[64];
- int flashcnt;
- int delay;
- volatile unsigned char *led_reg = (unsigned char *)((ulong)CFG_PLD_BASE + 0x1000);
- volatile unsigned char *ver_reg = (unsigned char *)((ulong)CFG_PLD_BASE + 0x1001);
-
- puts ("Board: ");
-
- if (getenv_r("serial#", str, sizeof(str)) == -1) {
- puts ("### No HW ID - assuming CMS700");
- } else {
- puts(str);
- }
-
- printf(" (PLD-Version=%02d)\n", *ver_reg);
-
- /*
- * Flash LEDs
- */
- for (flashcnt = 0; flashcnt < 3; flashcnt++) {
- *led_reg = 0x00; /* LEDs off */
- for (delay = 0; delay < 100; delay++)
- udelay(1000);
- *led_reg = 0x0f; /* LEDs on */
- for (delay = 0; delay < 50; delay++)
- udelay(1000);
- }
- *led_reg = 0x70;
-
- return 0;
-}
-
-/* ------------------------------------------------------------------------- */
-
-long int initdram (int board_type)
-{
- unsigned long val;
-
- mtdcr(memcfga, mem_mb0cf);
- val = mfdcr(memcfgd);
-
-#if 0
- printf("\nmb0cf=%x\n", val); /* test-only */
- printf("strap=%x\n", mfdcr(strap)); /* test-only */
-#endif
-
- return (4*1024*1024 << ((val & 0x000e0000) >> 17));
-}
-
-/* ------------------------------------------------------------------------- */
-
-#if defined(CFG_EEPROM_WREN)
-/* Input: <dev_addr> I2C address of EEPROM device to enable.
- * <state> -1: deliver current state
- * 0: disable write
- * 1: enable write
- * Returns: -1: wrong device address
- * 0: dis-/en- able done
- * 0/1: current state if <state> was -1.
- */
-int eeprom_write_enable (unsigned dev_addr, int state)
-{
- if (CFG_I2C_EEPROM_ADDR != dev_addr) {
- return -1;
- } else {
- switch (state) {
- case 1:
- /* Enable write access, clear bit GPIO_SINT2. */
- out32(GPIO0_OR, in32(GPIO0_OR) & ~CFG_EEPROM_WP);
- state = 0;
- break;
- case 0:
- /* Disable write access, set bit GPIO_SINT2. */
- out32(GPIO0_OR, in32(GPIO0_OR) | CFG_EEPROM_WP);
- state = 0;
- break;
- default:
- /* Read current status back. */
- state = (0 == (in32(GPIO0_OR) & CFG_EEPROM_WP));
- break;
- }
- }
- return state;
-}
-
-int do_eep_wren (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- int query = argc == 1;
- int state = 0;
-
- if (query) {
- /* Query write access state. */
- state = eeprom_write_enable (CFG_I2C_EEPROM_ADDR, -1);
- if (state < 0) {
- puts ("Query of write access state failed.\n");
- } else {
- printf ("Write access for device 0x%0x is %sabled.\n",
- CFG_I2C_EEPROM_ADDR, state ? "en" : "dis");
- state = 0;
- }
- } else {
- if ('0' == argv[1][0]) {
- /* Disable write access. */
- state = eeprom_write_enable (CFG_I2C_EEPROM_ADDR, 0);
- } else {
- /* Enable write access. */
- state = eeprom_write_enable (CFG_I2C_EEPROM_ADDR, 1);
- }
- if (state < 0) {
- puts ("Setup of write access state failed.\n");
- }
- }
-
- return state;
-}
-
-U_BOOT_CMD(eepwren, 2, 0, do_eep_wren,
- "eepwren - Enable / disable / query EEPROM write access\n",
- NULL);
-#endif /* #if defined(CFG_EEPROM_WREN) */
-
-/* ------------------------------------------------------------------------- */
-
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
-#include <linux/mtd/nand.h>
-extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
-
-void nand_init(void)
-{
- nand_probe(CFG_NAND_BASE);
- if (nand_dev_desc[0].ChipID != NAND_ChipID_UNKNOWN) {
- print_size(nand_dev_desc[0].totlen, "\n");
- }
-}
-#endif
-
-void reset_phy(void)
-{
-#ifdef CONFIG_LXT971_NO_SLEEP
-
- /*
- * Disable sleep mode in LXT971
- */
- lxt971_no_sleep();
-#endif
-}
diff --git a/board/esd/cms700/config.mk b/board/esd/cms700/config.mk
deleted file mode 100644
index 5c3c01cf87..0000000000
--- a/board/esd/cms700/config.mk
+++ /dev/null
@@ -1,28 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# esd CMS405 boards
-#
-
-TEXT_BASE = 0xFFFC0000
diff --git a/board/esd/cms700/flash.c b/board/esd/cms700/flash.c
deleted file mode 100644
index 89af1190a8..0000000000
--- a/board/esd/cms700/flash.c
+++ /dev/null
@@ -1,101 +0,0 @@
-/*
- * (C) Copyright 2001
- * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <ppc4xx.h>
-#include <asm/processor.h>
-
-/*
- * include common flash code (for esd boards)
- */
-#include "../common/flash.c"
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (vu_long * addr, flash_info_t * info);
-static void flash_get_offsets (ulong base, flash_info_t * info);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- unsigned long size_b0;
- int i;
- uint pbcr;
- unsigned long base_b0;
- int size_val = 0;
-
- /* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* Static FLASH Bank configuration here - FIXME XXX */
-
- size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size_b0, size_b0<<20);
- }
-
- /* Setup offsets */
- flash_get_offsets (-size_b0, &flash_info[0]);
-
- /* Re-do sizing to get full correct info */
- mtdcr(ebccfga, pb0cr);
- pbcr = mfdcr(ebccfgd);
- mtdcr(ebccfga, pb0cr);
- base_b0 = -size_b0;
- switch (size_b0) {
- case 1 << 20:
- size_val = 0;
- break;
- case 2 << 20:
- size_val = 1;
- break;
- case 4 << 20:
- size_val = 2;
- break;
- case 8 << 20:
- size_val = 3;
- break;
- case 16 << 20:
- size_val = 4;
- break;
- }
- pbcr = (pbcr & 0x0001ffff) | base_b0 | (size_val << 17);
- mtdcr(ebccfgd, pbcr);
-
- /* Monitor protection ON by default */
- (void)flash_protect(FLAG_PROTECT_SET,
- -CFG_MONITOR_LEN,
- 0xffffffff,
- &flash_info[0]);
-
- flash_info[0].size = size_b0;
-
- return (size_b0);
-}
diff --git a/board/esd/cms700/fpgadata.c b/board/esd/cms700/fpgadata.c
deleted file mode 100644
index 08be5e7949..0000000000
--- a/board/esd/cms700/fpgadata.c
+++ /dev/null
@@ -1,1812 +0,0 @@
- 0x07,0x20,0x12,0x00,0x12,0x01,0x04,0x00,0x00,0x00,0x00,0x02,0x08,0xff,0x02,0x08,
- 0xfe,0x08,0x00,0x00,0x00,0x20,0x01,0x0f,0xff,0xff,0xff,0x09,0x00,0x00,0x00,0x00,
- 0xf9,0x60,0x40,0x93,0x02,0x08,0xff,0x02,0x08,0xff,0x02,0x08,0xe8,0x08,0x00,0x00,
- 0x00,0x06,0x01,0x00,0x09,0x05,0x00,0x02,0x08,0xed,0x04,0x00,0x03,0x0d,0x40,0x08,
- 0x00,0x00,0x00,0x12,0x01,0x00,0x00,0x00,0x09,0x03,0xff,0xff,0x00,0x00,0x00,0x01,
- 0x00,0x00,0x03,0x09,0x03,0xff,0xfd,0x03,0xff,0xfd,0x04,0x00,0x00,0x00,0x00,0x02,
- 0x08,0xea,0x08,0x00,0x00,0x00,0x32,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x09,
- 0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,
- 0x00,0x00,0x00,0x00,0x00,0x00,0x09,0x00,0x00,0x04,0x00,0x00,0x00,0x01,0x00,0x00,
- 0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0x08,0x00,0x00,0x00,0x01,0x00,0x00,0x00,
- 0x00,0x00,0x00,0x01,0x09,0x00,0x00,0x0c,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,
- 0x00,0x00,0x01,0x09,0x00,0x00,0x10,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,
- 0x00,0x01,0x09,0x00,0x00,0x20,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,
- 0x01,0x09,0x00,0x00,0x24,0x00,0x1c,0x00,0x81,0x00,0x00,0x00,0x00,0x00,0x00,0x01,
- 0x09,0x00,0x00,0x28,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,
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- 0x00,0x30,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,
- 0x40,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0x44,
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- 0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0x4c,0x00,0x00,
- 0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x04,0x00,0x00,0x4e,0x20,0x01,0x00,
- 0x00,0x00,0x00,0x00,0x00,0x00,0x09,0x00,0x00,0x50,0x00,0x00,0x00,0x03,0x00,0x00,
- 0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x09,0x00,0x00,
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- 0x00,0x00,0x8c,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,
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- 0xa0,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0xa4,
- 0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0xa8,0x00,
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- 0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0xb0,0x00,0x00,0x00,
- 0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0xc0,0x00,0x00,0x00,0x01,
- 0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0xc4,0x00,0x00,0x00,0x01,0x00,
- 0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0xc8,0x00,0x00,0x00,0x01,0x00,0x00,
- 0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0xcc,0x00,0x00,0x00,0x01,0x00,0x00,0x00,
- 0x00,0x00,0x00,0x01,0x04,0x00,0x00,0x4e,0x20,0x01,0x00,0x00,0x00,0x00,0x00,0x00,
- 0x00,0x09,0x00,0x00,0xd0,0x00,0x00,0x00,0x03,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x09,0x00,0x01,0x00,0x00,0x00,0x00,0x01,
- 0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x04,
- 0x00,0x00,0x00,0x00,0x09,0x00,0x01,0x04,0x00,0x00,0x01,0x01,0x00,0x00,0x00,0x00,
- 0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x09,0x00,0x01,0x08,0x10,
- 0x00,0x01,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x01,0x0c,0x00,0x00,
- 0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x01,0x10,0x00,0x00,0x00,
- 0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x01,0x20,0x00,0x00,0x00,0x01,
- 0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x01,0x24,0x00,0x00,0x00,0x01,0x00,
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- 0x00,0x01,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x04,0x00,0x00,0x00,0x00,0x09,
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- 0x02,0x20,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x02,
- 0x24,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x02,0x28,
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- 0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x09,0x00,0x02,0x80,0x00,0x00,0x00,
- 0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0x04,0x00,0x00,0x00,0x00,0x09,0x00,0x02,0x84,0x00,0x00,0x00,0x01,0x00,0x00,0x00,
- 0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x09,0x00,0x02,0x88,
- 0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x02,0x8c,0x00,
- 0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x02,0x90,0x00,0x00,
- 0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x02,0xa0,0x00,0x00,0x00,
- 0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x02,0xa4,0x00,0x00,0x00,0x01,
- 0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x02,0xa8,0x00,0x00,0x00,0x01,0x00,
- 0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x02,0xac,0x00,0x00,0x00,0x01,0x00,0x00,
- 0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x02,0xb0,0x00,0x00,0x00,0x01,0x00,0x00,0x00,
- 0x00,0x00,0x00,0x01,0x09,0x00,0x02,0xc0,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,
- 0x00,0x00,0x01,0x09,0x00,0x02,0xc4,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,
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- 0x00,0x00,0x01,0x09,0x00,0x34,0xa8,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,
- 0x00,0x01,0x09,0x00,0x34,0xac,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,
- 0x01,0x09,0x00,0x34,0xb0,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,
- 0x09,0x00,0x34,0xc0,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,
- 0x00,0x34,0xc4,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,
- 0x34,0xc8,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x34,
- 0xcc,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x04,0x00,0x00,0x4e,
- 0x20,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x09,0x00,0x34,0xd0,0x00,0x00,0x00,
- 0x03,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x03,
- 0x09,0x00,0x35,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x01,
- 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x04,0x00,0x00,0x00,0x00,0x09,0x00,0x35,0x04,
- 0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,
- 0x00,0x00,0x00,0x09,0x00,0x35,0x08,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,
- 0x00,0x01,0x09,0x00,0x35,0x0c,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,
- 0x01,0x09,0x00,0x35,0x10,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,
- 0x09,0x00,0x35,0x20,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,
- 0x00,0x35,0x24,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,
- 0x35,0x28,0x00,0x00,0x08,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,
- 0x2c,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0x30,
- 0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0x40,0x00,
- 0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0x44,0x00,0x00,
- 0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0x48,0x00,0x00,0x00,
- 0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0x4c,0x00,0x00,0x00,0x01,
- 0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x04,0x00,0x00,0x4e,0x20,0x01,0x00,0x00,0x00,
- 0x00,0x00,0x00,0x00,0x09,0x00,0x35,0x50,0x00,0x00,0x00,0x03,0x00,0x00,0x00,0x00,
- 0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x09,0x00,0x35,0x80,0x00,
- 0x00,0x40,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x01,0x00,0x00,0x00,0x00,0x00,
- 0x00,0x00,0x04,0x00,0x00,0x00,0x00,0x09,0x00,0x35,0x84,0x00,0x00,0x00,0x01,0x00,
- 0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x09,0x00,
- 0x35,0x88,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,
- 0x8c,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0x90,
- 0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0xa0,0x00,
- 0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0xa4,0x00,0x1c,
- 0x00,0x81,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0xa8,0x00,0x00,0x00,
- 0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0xac,0x00,0x00,0x00,0x01,
- 0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0xb0,0x00,0x00,0x00,0x01,0x00,
- 0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0xc0,0x00,0x00,0x00,0x01,0x00,0x00,
- 0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0xc4,0x00,0x14,0x00,0x61,0x00,0x00,0x00,
- 0x00,0x00,0x00,0x01,0x09,0x00,0x35,0xc8,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,
- 0x00,0x00,0x01,0x09,0x00,0x35,0xcc,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,
- 0x00,0x01,0x04,0x00,0x00,0x4e,0x20,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x09,
- 0x00,0x35,0xd0,0x00,0x00,0x00,0x03,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,
- 0x00,0x00,0x00,0x00,0x00,0x03,0x09,0x00,0x35,0xd0,0x00,0x00,0x00,0x01,0x00,0x00,
- 0x00,0x00,0x00,0x00,0x01,0x04,0x00,0x00,0x00,0x00,0x02,0x08,0xff,0x04,0x00,0x00,
- 0x00,0x64,0x02,0x08,0xf0,0x04,0x00,0x00,0x00,0x00,0x02,0x08,0xff,0x02,0x08,0xff,
- 0x08,0x00,0x00,0x00,0x01,0x01,0x00,0x09,0x00,0x00,0x00,
diff --git a/board/esd/cms700/u-boot.lds b/board/esd/cms700/u-boot.lds
deleted file mode 100644
index f7a20d1da2..0000000000
--- a/board/esd/cms700/u-boot.lds
+++ /dev/null
@@ -1,150 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- .resetvec 0xFFFFFFFC :
- {
- *(.resetvec)
- } = 0xffff
-
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/ppc4xx/start.o (.text)
- cpu/ppc4xx/traps.o (.text)
- cpu/ppc4xx/interrupts.o (.text)
- cpu/ppc4xx/serial.o (.text)
- cpu/ppc4xx/cpu_init.o (.text)
- cpu/ppc4xx/speed.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/extable.o (.text)
- lib_generic/zlib.o (.text)
-
-/* . = env_offset;*/
-/* common/environment.o(.text)*/
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/esd/common/auto_update.c b/board/esd/common/auto_update.c
deleted file mode 100644
index d48e972866..0000000000
--- a/board/esd/common/auto_update.c
+++ /dev/null
@@ -1,556 +0,0 @@
-/*
- * (C) Copyright 2003-2004
- * Gary Jennejohn, DENX Software Engineering, gj@denx.de.
- * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <command.h>
-#include <image.h>
-#include <asm/byteorder.h>
-#include <linux/mtd/nand.h>
-#include <fat.h>
-
-#include "auto_update.h"
-
-#ifdef CONFIG_AUTO_UPDATE
-
-#if !(CONFIG_COMMANDS & CFG_CMD_FAT)
-#error "must define CFG_CMD_FAT"
-#endif
-
-extern au_image_t au_image[];
-extern int N_AU_IMAGES;
-
-#define AU_DEBUG
-#undef AU_DEBUG
-
-#undef debug
-#ifdef AU_DEBUG
-#define debug(fmt,args...) printf (fmt ,##args)
-#else
-#define debug(fmt,args...)
-#endif /* AU_DEBUG */
-
-
-#define LOAD_ADDR ((unsigned char *)0x100000) /* where to load files into memory */
-#define MAX_LOADSZ 0x1e00000
-
-/* externals */
-extern int fat_register_device(block_dev_desc_t *, int);
-extern int file_fat_detectfs(void);
-extern long file_fat_read(const char *, void *, unsigned long);
-long do_fat_read (const char *filename, void *buffer, unsigned long maxsize, int dols);
-#ifdef CONFIG_VFD
-extern int trab_vfd (ulong);
-extern int transfer_pic(unsigned char, unsigned char *, int, int);
-#endif
-extern int flash_sect_erase(ulong, ulong);
-extern int flash_sect_protect (int, ulong, ulong);
-extern int flash_write (char *, ulong, ulong);
-/* change char* to void* to shutup the compiler */
-extern block_dev_desc_t *get_dev (char*, int);
-
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
-/* references to names in cmd_nand.c */
-#define NANDRW_READ 0x01
-#define NANDRW_WRITE 0x00
-#define NANDRW_JFFS2 0x02
-#define NANDRW_JFFS2_SKIP 0x04
-extern struct nand_chip nand_dev_desc[];
-extern int nand_rw(struct nand_chip* nand, int cmd, size_t start, size_t len,
- size_t * retlen, u_char * buf);
-extern int nand_erase(struct nand_chip* nand, size_t ofs, size_t len, int clean);
-#endif /* (CONFIG_COMMANDS & CFG_CMD_NAND) */
-
-extern block_dev_desc_t ide_dev_desc[CFG_IDE_MAXDEVICE];
-
-
-int au_check_cksum_valid(int i, long nbytes)
-{
- image_header_t *hdr;
- unsigned long checksum;
-
- hdr = (image_header_t *)LOAD_ADDR;
-
- if ((au_image[i].type == AU_FIRMWARE) && (au_image[i].size != ntohl(hdr->ih_size))) {
- printf ("Image %s has wrong size\n", au_image[i].name);
- return -1;
- }
-
- if (nbytes != (sizeof(*hdr) + ntohl(hdr->ih_size))) {
- printf ("Image %s bad total SIZE\n", au_image[i].name);
- return -1;
- }
- /* check the data CRC */
- checksum = ntohl(hdr->ih_dcrc);
-
- if (crc32 (0, (uchar *)(LOAD_ADDR + sizeof(*hdr)), ntohl(hdr->ih_size))
- != checksum) {
- printf ("Image %s bad data checksum\n", au_image[i].name);
- return -1;
- }
- return 0;
-}
-
-
-int au_check_header_valid(int i, long nbytes)
-{
- image_header_t *hdr;
- unsigned long checksum;
-
- hdr = (image_header_t *)LOAD_ADDR;
- /* check the easy ones first */
-#undef CHECK_VALID_DEBUG
-#ifdef CHECK_VALID_DEBUG
- printf("magic %#x %#x ", ntohl(hdr->ih_magic), IH_MAGIC);
- printf("arch %#x %#x ", hdr->ih_arch, IH_CPU_PPC);
- printf("size %#x %#lx ", ntohl(hdr->ih_size), nbytes);
- printf("type %#x %#x ", hdr->ih_type, IH_TYPE_KERNEL);
-#endif
- if (nbytes < sizeof(*hdr))
- {
- printf ("Image %s bad header SIZE\n", au_image[i].name);
- return -1;
- }
- if (ntohl(hdr->ih_magic) != IH_MAGIC || hdr->ih_arch != IH_CPU_PPC)
- {
- printf ("Image %s bad MAGIC or ARCH\n", au_image[i].name);
- return -1;
- }
- /* check the hdr CRC */
- checksum = ntohl(hdr->ih_hcrc);
- hdr->ih_hcrc = 0;
-
- if (crc32 (0, (uchar *)hdr, sizeof(*hdr)) != checksum) {
- printf ("Image %s bad header checksum\n", au_image[i].name);
- return -1;
- }
- hdr->ih_hcrc = htonl(checksum);
-
- /* check the type - could do this all in one gigantic if() */
- if ((au_image[i].type == AU_FIRMWARE) && (hdr->ih_type != IH_TYPE_FIRMWARE)) {
- printf ("Image %s wrong type\n", au_image[i].name);
- return -1;
- }
- if ((au_image[i].type == AU_SCRIPT) && (hdr->ih_type != IH_TYPE_SCRIPT)) {
- printf ("Image %s wrong type\n", au_image[i].name);
- return -1;
- }
-
- /* recycle checksum */
- checksum = ntohl(hdr->ih_size);
-
-#if 0 /* test-only */
- /* for kernel and app the image header must also fit into flash */
- if (idx != IDX_DISK)
- checksum += sizeof(*hdr);
- /* check the size does not exceed space in flash. HUSH scripts */
- /* all have ausize[] set to 0 */
- if ((ausize[idx] != 0) && (ausize[idx] < checksum)) {
- printf ("Image %s is bigger than FLASH\n", au_image[i].name);
- return -1;
- }
-#endif
-
- return 0;
-}
-
-
-int au_do_update(int i, long sz)
-{
- image_header_t *hdr;
- char *addr;
- long start, end;
- int off, rc;
- uint nbytes;
- int k;
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
- int total;
-#endif
-
- hdr = (image_header_t *)LOAD_ADDR;
-
- switch (au_image[i].type) {
- case AU_SCRIPT:
- printf("Executing script %s\n", au_image[i].name);
-
- /* execute a script */
- if (hdr->ih_type == IH_TYPE_SCRIPT) {
- addr = (char *)((char *)hdr + sizeof(*hdr));
- /* stick a NULL at the end of the script, otherwise */
- /* parse_string_outer() runs off the end. */
- addr[ntohl(hdr->ih_size)] = 0;
- addr += 8;
-
- /*
- * Replace cr/lf with ;
- */
- k = 0;
- while (addr[k] != 0) {
- if ((addr[k] == 10) || (addr[k] == 13)) {
- addr[k] = ';';
- }
- k++;
- }
-
- run_command(addr, 0);
- return 0;
- }
-
- break;
-
- case AU_FIRMWARE:
- case AU_NOR:
- case AU_NAND:
- start = au_image[i].start;
- end = au_image[i].start + au_image[i].size - 1;
-
- /*
- * do not update firmware when image is already in flash.
- */
- if (au_image[i].type == AU_FIRMWARE) {
- char *orig = (char*)start;
- char *new = (char *)((char *)hdr + sizeof(*hdr));
- nbytes = ntohl(hdr->ih_size);
-
- while(--nbytes) {
- if (*orig++ != *new++) {
- break;
- }
- }
- if (!nbytes) {
- printf("Skipping firmware update - images are identical\n");
- break;
- }
- }
-
- /* unprotect the address range */
- /* this assumes that ONLY the firmware is protected! */
- if (au_image[i].type == AU_FIRMWARE) {
- flash_sect_protect(0, start, end);
- }
-
- /*
- * erase the address range.
- */
- if (au_image[i].type != AU_NAND) {
- printf("Updating NOR FLASH with image %s\n", au_image[i].name);
- debug ("flash_sect_erase(%lx, %lx);\n", start, end);
- flash_sect_erase(start, end);
- } else {
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
- printf("Updating NAND FLASH with image %s\n", au_image[i].name);
- debug ("nand_erase(%lx, %lx);\n", start, end);
- rc = nand_erase (nand_dev_desc, start, end - start + 1, 0);
- debug ("nand_erase returned %x\n", rc);
-#endif
- }
-
- udelay(10000);
-
- /* strip the header - except for the kernel and ramdisk */
- if (au_image[i].type != AU_FIRMWARE) {
- addr = (char *)hdr;
- off = sizeof(*hdr);
- nbytes = sizeof(*hdr) + ntohl(hdr->ih_size);
- } else {
- addr = (char *)((char *)hdr + sizeof(*hdr));
- off = 0;
- nbytes = ntohl(hdr->ih_size);
- }
-
- /*
- * copy the data from RAM to FLASH
- */
- if (au_image[i].type != AU_NAND) {
- debug ("flash_write(%p, %lx %x)\n", addr, start, nbytes);
- rc = flash_write((uchar *)addr, start, nbytes);
- } else {
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
- debug ("nand_rw(%p, %lx %x)\n", addr, start, nbytes);
- rc = nand_rw(nand_dev_desc, NANDRW_WRITE | NANDRW_JFFS2,
- start, nbytes, (size_t *)&total, (uchar *)addr);
- debug ("nand_rw: ret=%x total=%d nbytes=%d\n", rc, total, nbytes);
-#endif
- }
- if (rc != 0) {
- printf("Flashing failed due to error %d\n", rc);
- return -1;
- }
-
- /*
- * check the dcrc of the copy
- */
- if (au_image[i].type != AU_NAND) {
- rc = crc32 (0, (uchar *)(start + off), ntohl(hdr->ih_size));
- } else {
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
- rc = nand_rw(nand_dev_desc, NANDRW_READ | NANDRW_JFFS2 | NANDRW_JFFS2_SKIP,
- start, nbytes, (size_t *)&total, (uchar *)addr);
- rc = crc32 (0, (uchar *)(addr + off), ntohl(hdr->ih_size));
-#endif
- }
- if (rc != ntohl(hdr->ih_dcrc)) {
- printf ("Image %s Bad Data Checksum After COPY\n", au_image[i].name);
- return -1;
- }
-
- /* protect the address range */
- /* this assumes that ONLY the firmware is protected! */
- if (au_image[i].type == AU_FIRMWARE) {
- flash_sect_protect(1, start, end);
- }
-
- break;
-
- default:
- printf("Wrong image type selected!\n");
- }
-
- return 0;
-}
-
-
-static void process_macros (const char *input, char *output)
-{
- char c, prev;
- const char *varname_start = NULL;
- int inputcnt = strlen (input);
- int outputcnt = CFG_CBSIZE;
- int state = 0; /* 0 = waiting for '$' */
- /* 1 = waiting for '(' or '{' */
- /* 2 = waiting for ')' or '}' */
- /* 3 = waiting for ''' */
-#ifdef DEBUG_PARSER
- char *output_start = output;
-
- printf ("[PROCESS_MACROS] INPUT len %d: \"%s\"\n", strlen(input), input);
-#endif
-
- prev = '\0'; /* previous character */
-
- while (inputcnt && outputcnt) {
- c = *input++;
- inputcnt--;
-
- if (state!=3) {
- /* remove one level of escape characters */
- if ((c == '\\') && (prev != '\\')) {
- if (inputcnt-- == 0)
- break;
- prev = c;
- c = *input++;
- }
- }
-
- switch (state) {
- case 0: /* Waiting for (unescaped) $ */
- if ((c == '\'') && (prev != '\\')) {
- state = 3;
- break;
- }
- if ((c == '$') && (prev != '\\')) {
- state++;
- } else {
- *(output++) = c;
- outputcnt--;
- }
- break;
- case 1: /* Waiting for ( */
- if (c == '(' || c == '{') {
- state++;
- varname_start = input;
- } else {
- state = 0;
- *(output++) = '$';
- outputcnt--;
-
- if (outputcnt) {
- *(output++) = c;
- outputcnt--;
- }
- }
- break;
- case 2: /* Waiting for ) */
- if (c == ')' || c == '}') {
- int i;
- char envname[CFG_CBSIZE], *envval;
- int envcnt = input-varname_start-1; /* Varname # of chars */
-
- /* Get the varname */
- for (i = 0; i < envcnt; i++) {
- envname[i] = varname_start[i];
- }
- envname[i] = 0;
-
- /* Get its value */
- envval = getenv (envname);
-
- /* Copy into the line if it exists */
- if (envval != NULL)
- while ((*envval) && outputcnt) {
- *(output++) = *(envval++);
- outputcnt--;
- }
- /* Look for another '$' */
- state = 0;
- }
- break;
- case 3: /* Waiting for ' */
- if ((c == '\'') && (prev != '\\')) {
- state = 0;
- } else {
- *(output++) = c;
- outputcnt--;
- }
- break;
- }
- prev = c;
- }
-
- if (outputcnt)
- *output = 0;
-
-#ifdef DEBUG_PARSER
- printf ("[PROCESS_MACROS] OUTPUT len %d: \"%s\"\n",
- strlen(output_start), output_start);
-#endif
-}
-
-
-/*
- * this is called from board_init() after the hardware has been set up
- * and is usable. That seems like a good time to do this.
- * Right now the return value is ignored.
- */
-int do_auto_update(void)
-{
- block_dev_desc_t *stor_dev;
- long sz;
- int i, res, cnt, old_ctrlc, got_ctrlc;
- char buffer[32];
- char str[80];
-
- /*
- * Check whether a CompactFlash is inserted
- */
- if (ide_dev_desc[0].type == DEV_TYPE_UNKNOWN) {
- return -1; /* no disk detected! */
- }
-
- /* check whether it has a partition table */
- stor_dev = get_dev("ide", 0);
- if (stor_dev == NULL) {
- debug ("Uknown device type\n");
- return -1;
- }
- if (fat_register_device(stor_dev, 1) != 0) {
- debug ("Unable to register ide disk 0:1 for fatls\n");
- return -1;
- }
-
- /*
- * Check if magic file is present
- */
- if (do_fat_read(AU_MAGIC_FILE, buffer, sizeof(buffer), LS_NO) <= 0) {
- return -1;
- }
-
-#ifdef CONFIG_AUTO_UPDATE_SHOW
- board_auto_update_show(1);
-#endif
- puts("\nAutoUpdate Disk detected! Trying to update system...\n");
-
- /* make sure that we see CTRL-C and save the old state */
- old_ctrlc = disable_ctrlc(0);
-
- /* just loop thru all the possible files */
- for (i = 0; i < N_AU_IMAGES; i++) {
- /*
- * Try to expand the environment var in the fname
- */
- process_macros(au_image[i].name, str);
- strcpy(au_image[i].name, str);
-
- printf("Reading %s ...", au_image[i].name);
- /* just read the header */
- sz = do_fat_read(au_image[i].name, LOAD_ADDR, sizeof(image_header_t), LS_NO);
- debug ("read %s sz %ld hdr %d\n",
- au_image[i].name, sz, sizeof(image_header_t));
- if (sz <= 0 || sz < sizeof(image_header_t)) {
- puts(" not found\n");
- continue;
- }
- if (au_check_header_valid(i, sz) < 0) {
- puts(" header not valid\n");
- continue;
- }
- sz = do_fat_read(au_image[i].name, LOAD_ADDR, MAX_LOADSZ, LS_NO);
- debug ("read %s sz %ld hdr %d\n",
- au_image[i].name, sz, sizeof(image_header_t));
- if (sz <= 0 || sz <= sizeof(image_header_t)) {
- puts(" not found\n");
- continue;
- }
- if (au_check_cksum_valid(i, sz) < 0) {
- puts(" checksum not valid\n");
- continue;
- }
- puts(" done\n");
-
- do {
- res = au_do_update(i, sz);
- /* let the user break out of the loop */
- if (ctrlc() || had_ctrlc()) {
- clear_ctrlc();
- if (res < 0)
- got_ctrlc = 1;
- break;
- }
- cnt++;
- } while (res < 0);
- }
-
- /* restore the old state */
- disable_ctrlc(old_ctrlc);
-
- puts("AutoUpdate finished\n\n");
-#ifdef CONFIG_AUTO_UPDATE_SHOW
- board_auto_update_show(0);
-#endif
-
- return 0;
-}
-
-
-int auto_update(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- do_auto_update();
-
- return 0;
-}
-U_BOOT_CMD(
- autoupd, 1, 1, auto_update,
- "autoupd - Automatically update images\n",
- NULL
-);
-#endif /* CONFIG_AUTO_UPDATE */
diff --git a/board/esd/common/auto_update.h b/board/esd/common/auto_update.h
deleted file mode 100644
index e2af3c7b15..0000000000
--- a/board/esd/common/auto_update.h
+++ /dev/null
@@ -1,51 +0,0 @@
-/*
- * (C) Copyright 2004
- * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef _AUTO_UPDATE_H_
-#define _AUTO_UPDATE_H_
-
-#define MBR_MAGIC 0x07081967
-#define MBR_MAGIC_ADDR 0x100 /* offset 0x100 should be free space */
-
-#define AU_MAGIC_FILE "__auto_update"
-
-#define AU_SCRIPT 1
-#define AU_FIRMWARE 2
-#define AU_NOR 3
-#define AU_NAND 4
-
-struct au_image_s {
- char name[80];
- ulong start;
- ulong size;
- int type;
-};
-
-typedef struct au_image_s au_image_t;
-
-int do_auto_update(void);
-#ifdef CONFIG_AUTO_UPDATE_SHOW
-void board_auto_update_show(int au_active);
-#endif
-
-#endif /* #ifndef _AUTO_UPDATE_H_ */
diff --git a/board/esd/common/flash.c b/board/esd/common/flash.c
deleted file mode 100644
index dca10be1b5..0000000000
--- a/board/esd/common/flash.c
+++ /dev/null
@@ -1,672 +0,0 @@
-/*
- * (C) Copyright 2001
- * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <ppc4xx.h>
-#include <asm/processor.h>
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static int write_word (flash_info_t *info, ulong dest, ulong data);
-
-/*-----------------------------------------------------------------------
- */
-static void flash_get_offsets (ulong base, flash_info_t *info)
-{
- int i;
- short n;
-
- /* set up sector start address table */
- if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) ||
- ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM640U)) {
- for (i = 0; i < info->sector_count; i++)
- info->start[i] = base + (i * 0x00010000);
- } else if (((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL322B) ||
- ((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL323B) ||
- ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM320B) ||
- ((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL324B)) {
- /* set sector offsets for bottom boot block type */
- for (i=0; i<8; ++i) { /* 8 x 8k boot sectors */
- info->start[i] = base;
- base += 8 << 10;
- }
- while (i < info->sector_count) { /* 64k regular sectors */
- info->start[i] = base;
- base += 64 << 10;
- ++i;
- }
- } else if (((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL322T) ||
- ((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL323T) ||
- ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM320T) ||
- ((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL324T)) {
- /* set sector offsets for top boot block type */
- base += info->size;
- i = info->sector_count;
- for (n=0; n<8; ++n) { /* 8 x 8k boot sectors */
- base -= 8 << 10;
- --i;
- info->start[i] = base;
- }
- while (i > 0) { /* 64k regular sectors */
- base -= 64 << 10;
- --i;
- info->start[i] = base;
- }
- } else {
- if (info->flash_id & FLASH_BTYPE) {
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00004000;
- info->start[2] = base + 0x00006000;
- info->start[3] = base + 0x00008000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00010000) - 0x00030000;
- }
- } else {
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- info->start[i--] = base + info->size - 0x00004000;
- info->start[i--] = base + info->size - 0x00006000;
- info->start[i--] = base + info->size - 0x00008000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00010000;
- }
- }
- }
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t *info)
-{
- int i;
- int k;
- int size;
- int erased;
- volatile unsigned long *flash;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD: printf ("AMD "); break;
- case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
- case FLASH_MAN_SST: printf ("SST "); break;
- case FLASH_MAN_EXCEL: printf ("Excel Semiconductor "); break;
- default: printf ("Unknown Vendor "); break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM400B: printf ("AM29LV400B (4 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM400T: printf ("AM29LV400T (4 Mbit, top boot sector)\n");
- break;
- case FLASH_AM800B: printf ("AM29LV800B (8 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM800T: printf ("AM29LV800T (8 Mbit, top boot sector)\n");
- break;
- case FLASH_AM160B: printf ("AM29LV160B (16 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM160T: printf ("AM29LV160T (16 Mbit, top boot sector)\n");
- break;
- case FLASH_AM320T: printf ("AM29LV320T (32 M, top sector)\n");
- break;
- case FLASH_AM320B: printf ("AM29LV320B (32 M, bottom sector)\n");
- break;
- case FLASH_AMDL322T: printf ("AM29DL322T (32 M, top sector)\n");
- break;
- case FLASH_AMDL322B: printf ("AM29DL322B (32 M, bottom sector)\n");
- break;
- case FLASH_AMDL323T: printf ("AM29DL323T (32 M, top sector)\n");
- break;
- case FLASH_AMDL323B: printf ("AM29DL323B (32 M, bottom sector)\n");
- break;
- case FLASH_AM640U: printf ("AM29LV640D (64 M, uniform sector)\n");
- break;
- case FLASH_SST800A: printf ("SST39LF/VF800 (8 Mbit, uniform sector size)\n");
- break;
- case FLASH_SST160A: printf ("SST39LF/VF160 (16 Mbit, uniform sector size)\n");
- break;
- case FLASH_SST320: printf ("SST39LF/VF320 (32 Mbit, uniform sector size)\n");
- break;
- case FLASH_SST640: printf ("SST39LF/VF640 (64 Mbit, uniform sector size)\n");
- break;
- default: printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
-#ifdef CFG_FLASH_EMPTY_INFO
- /*
- * Check if whole sector is erased
- */
- if (i != (info->sector_count-1))
- size = info->start[i+1] - info->start[i];
- else
- size = info->start[0] + info->size - info->start[i];
- erased = 1;
- flash = (volatile unsigned long *)info->start[i];
- size = size >> 2; /* divide by 4 for longword access */
- for (k=0; k<size; k++)
- {
- if (*flash++ != 0xffffffff)
- {
- erased = 0;
- break;
- }
- }
-
- if ((i % 5) == 0)
- printf ("\n ");
- /* print empty and read-only info */
- printf (" %08lX%s%s",
- info->start[i],
- erased ? " E" : " ",
- info->protect[i] ? "RO " : " ");
-#else
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " ");
-#endif
-
- }
- printf ("\n");
- return;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-static ulong flash_get_size (vu_long *addr, flash_info_t *info)
-{
- short i;
- short n;
- CFG_FLASH_WORD_SIZE value;
- ulong base = (ulong)addr;
- volatile CFG_FLASH_WORD_SIZE *addr2 = (CFG_FLASH_WORD_SIZE *)addr;
-
- /* Write auto select command: read Manufacturer ID */
- addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE)0x00AA00AA;
- addr2[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE)0x00550055;
- addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE)0x00900090;
-
- value = addr2[CFG_FLASH_READ0];
-
- switch (value) {
- case (CFG_FLASH_WORD_SIZE)AMD_MANUFACT:
- info->flash_id = FLASH_MAN_AMD;
- break;
- case (CFG_FLASH_WORD_SIZE)FUJ_MANUFACT:
- info->flash_id = FLASH_MAN_FUJ;
- break;
- case (CFG_FLASH_WORD_SIZE)SST_MANUFACT:
- info->flash_id = FLASH_MAN_SST;
- break;
- case (CFG_FLASH_WORD_SIZE)EXCEL_MANUFACT:
- info->flash_id = FLASH_MAN_EXCEL;
- break;
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- return (0); /* no or unknown flash */
- }
-
- value = addr2[CFG_FLASH_READ1]; /* device ID */
-
- switch (value) {
- case (CFG_FLASH_WORD_SIZE)AMD_ID_LV400T:
- info->flash_id += FLASH_AM400T;
- info->sector_count = 11;
- info->size = 0x00080000;
- break; /* => 0.5 MB */
-
- case (CFG_FLASH_WORD_SIZE)AMD_ID_LV400B:
- info->flash_id += FLASH_AM400B;
- info->sector_count = 11;
- info->size = 0x00080000;
- break; /* => 0.5 MB */
-
- case (CFG_FLASH_WORD_SIZE)AMD_ID_LV800T:
- info->flash_id += FLASH_AM800T;
- info->sector_count = 19;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case (CFG_FLASH_WORD_SIZE)AMD_ID_LV800B:
- info->flash_id += FLASH_AM800B;
- info->sector_count = 19;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case (CFG_FLASH_WORD_SIZE)AMD_ID_LV160T:
- info->flash_id += FLASH_AM160T;
- info->sector_count = 35;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case (CFG_FLASH_WORD_SIZE)AMD_ID_LV160B:
- info->flash_id += FLASH_AM160B;
- info->sector_count = 35;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case (CFG_FLASH_WORD_SIZE)AMD_ID_LV320T:
- info->flash_id += FLASH_AM320T;
- info->sector_count = 71;
- info->size = 0x00400000; break; /* => 4 MB */
-
- case (CFG_FLASH_WORD_SIZE)AMD_ID_LV320B:
- info->flash_id += FLASH_AM320B;
- info->sector_count = 71;
- info->size = 0x00400000; break; /* => 4 MB */
-
- case (CFG_FLASH_WORD_SIZE)AMD_ID_DL322T:
- info->flash_id += FLASH_AMDL322T;
- info->sector_count = 71;
- info->size = 0x00400000; break; /* => 4 MB */
-
- case (CFG_FLASH_WORD_SIZE)AMD_ID_DL322B:
- info->flash_id += FLASH_AMDL322B;
- info->sector_count = 71;
- info->size = 0x00400000; break; /* => 4 MB */
-
- case (CFG_FLASH_WORD_SIZE)AMD_ID_DL323T:
- info->flash_id += FLASH_AMDL323T;
- info->sector_count = 71;
- info->size = 0x00400000; break; /* => 4 MB */
-
- case (CFG_FLASH_WORD_SIZE)AMD_ID_DL323B:
- info->flash_id += FLASH_AMDL323B;
- info->sector_count = 71;
- info->size = 0x00400000; break; /* => 4 MB */
-
- case (CFG_FLASH_WORD_SIZE)AMD_ID_LV640U:
- info->flash_id += FLASH_AM640U;
- info->sector_count = 128;
- info->size = 0x00800000; break; /* => 8 MB */
-
-#if !(defined(CONFIG_ADCIOP) || defined(CONFIG_DASA_SIM))
- case (CFG_FLASH_WORD_SIZE)SST_ID_xF800A:
- info->flash_id += FLASH_SST800A;
- info->sector_count = 16;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case (CFG_FLASH_WORD_SIZE)SST_ID_xF160A:
- case (CFG_FLASH_WORD_SIZE)SST_ID_xF1601:
- case (CFG_FLASH_WORD_SIZE)SST_ID_xF1602:
- info->flash_id += FLASH_SST160A;
- info->sector_count = 32;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case (CFG_FLASH_WORD_SIZE)SST_ID_xF3201:
- case (CFG_FLASH_WORD_SIZE)SST_ID_xF3202:
- info->flash_id += FLASH_SST320;
- info->sector_count = 64;
- info->size = 0x00400000;
- break; /* => 4 MB */
-
- case (CFG_FLASH_WORD_SIZE)SST_ID_xF6401:
- case (CFG_FLASH_WORD_SIZE)SST_ID_xF6402:
- info->flash_id += FLASH_SST640;
- info->sector_count = 128;
- info->size = 0x00800000;
- break; /* => 8 MB */
-#endif
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- return (0); /* => no or unknown flash */
-
- }
-
- /* set up sector start address table */
- if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) ||
- ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM640U)) {
- for (i = 0; i < info->sector_count; i++)
- info->start[i] = base + (i * 0x00010000);
- } else if (((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL322B) ||
- ((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL323B) ||
- ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM320B) ||
- ((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL324B)) {
- /* set sector offsets for bottom boot block type */
- for (i=0; i<8; ++i) { /* 8 x 8k boot sectors */
- info->start[i] = base;
- base += 8 << 10;
- }
- while (i < info->sector_count) { /* 64k regular sectors */
- info->start[i] = base;
- base += 64 << 10;
- ++i;
- }
- } else if (((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL322T) ||
- ((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL323T) ||
- ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM320T) ||
- ((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL324T)) {
- /* set sector offsets for top boot block type */
- base += info->size;
- i = info->sector_count;
- for (n=0; n<8; ++n) { /* 8 x 8k boot sectors */
- base -= 8 << 10;
- --i;
- info->start[i] = base;
- }
- while (i > 0) { /* 64k regular sectors */
- base -= 64 << 10;
- --i;
- info->start[i] = base;
- }
- } else {
- if (info->flash_id & FLASH_BTYPE) {
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00004000;
- info->start[2] = base + 0x00006000;
- info->start[3] = base + 0x00008000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00010000) - 0x00030000;
- }
- } else {
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- info->start[i--] = base + info->size - 0x00004000;
- info->start[i--] = base + info->size - 0x00006000;
- info->start[i--] = base + info->size - 0x00008000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00010000;
- }
- }
- }
-
- /* check for protected sectors */
- for (i = 0; i < info->sector_count; i++) {
- /* read sector protection at sector address, (A7 .. A0) = 0x02 */
- /* D0 = 1 if protected */
- addr2 = (volatile CFG_FLASH_WORD_SIZE *)(info->start[i]);
- if ((info->flash_id & FLASH_VENDMASK) != FLASH_MAN_AMD)
- info->protect[i] = 0;
- else
- info->protect[i] = addr2[CFG_FLASH_READ2] & 1;
- }
-
- /*
- * Prevent writes to uninitialized FLASH.
- */
- if (info->flash_id != FLASH_UNKNOWN) {
- addr2 = (CFG_FLASH_WORD_SIZE *)info->start[0];
- *addr2 = (CFG_FLASH_WORD_SIZE)0x00F000F0; /* reset bank */
- }
-
- return (info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- volatile CFG_FLASH_WORD_SIZE *addr = (CFG_FLASH_WORD_SIZE *)(info->start[0]);
- volatile CFG_FLASH_WORD_SIZE *addr2;
- int flag, prot, sect, l_sect;
- ulong start, now, last;
- int i;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("Can't erase unknown flash type - aborted\n");
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- l_sect = -1;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr2 = (CFG_FLASH_WORD_SIZE *)(info->start[sect]);
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) {
- addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE)0x00AA00AA;
- addr[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE)0x00550055;
- addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE)0x00800080;
- addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE)0x00AA00AA;
- addr[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE)0x00550055;
- addr2[0] = (CFG_FLASH_WORD_SIZE)0x00500050; /* block erase */
- for (i=0; i<50; i++)
- udelay(1000); /* wait 1 ms */
- } else {
- if (sect == s_first) {
- addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE)0x00AA00AA;
- addr[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE)0x00550055;
- addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE)0x00800080;
- addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE)0x00AA00AA;
- addr[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE)0x00550055;
- }
- addr2[0] = (CFG_FLASH_WORD_SIZE)0x00300030; /* sector erase */
- }
- l_sect = sect;
- }
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- /*
- * We wait for the last triggered sector
- */
- if (l_sect < 0)
- goto DONE;
-
- start = get_timer (0);
- last = start;
- addr = (CFG_FLASH_WORD_SIZE *)(info->start[l_sect]);
- while ((addr[0] & (CFG_FLASH_WORD_SIZE)0x00800080) != (CFG_FLASH_WORD_SIZE)0x00800080) {
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- return 1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- }
-
-DONE:
- /* reset to read mode */
- addr = (CFG_FLASH_WORD_SIZE *)info->start[0];
- addr[0] = (CFG_FLASH_WORD_SIZE)0x00F000F0; /* reset bank */
-
- printf (" done\n");
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int i, l, rc;
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
- for (; i<4 && cnt>0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = 0;
- for (i=0; i<4; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- return (write_word(info, wp, data));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word (flash_info_t *info, ulong dest, ulong data)
-{
- volatile CFG_FLASH_WORD_SIZE *addr2 = (CFG_FLASH_WORD_SIZE *)(info->start[0]);
- volatile CFG_FLASH_WORD_SIZE *dest2 = (CFG_FLASH_WORD_SIZE *)dest;
- volatile CFG_FLASH_WORD_SIZE *data2 = (CFG_FLASH_WORD_SIZE *)&data;
- ulong start;
- int flag;
- int i;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*((vu_long *)dest) & data) != data) {
- return (2);
- }
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- for (i=0; i<4/sizeof(CFG_FLASH_WORD_SIZE); i++)
- {
- addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE)0x00AA00AA;
- addr2[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE)0x00550055;
- addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE)0x00A000A0;
-
- dest2[i] = data2[i];
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* data polling for D7 */
- start = get_timer (0);
- while ((dest2[i] & (CFG_FLASH_WORD_SIZE)0x00800080) !=
- (data2[i] & (CFG_FLASH_WORD_SIZE)0x00800080)) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- return (1);
- }
- }
- }
-
- return (0);
-}
-
-/*-----------------------------------------------------------------------
- */
diff --git a/board/esd/common/fpga.c b/board/esd/common/fpga.c
deleted file mode 100644
index ad56402693..0000000000
--- a/board/esd/common/fpga.c
+++ /dev/null
@@ -1,282 +0,0 @@
-/*
- * (C) Copyright 2001-2004
- * Matthias Fuchs, esd gmbh germany, matthias.fuchs@esd-electronics.com
- * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/processor.h>
-#include <command.h>
-
-/* ------------------------------------------------------------------------- */
-
-#ifdef FPGA_DEBUG
-#define DBG(x...) printf(x)
-#else
-#define DBG(x...)
-#endif /* DEBUG */
-
-#define MAX_ONES 226
-
-#ifdef CFG_FPGA_PRG
-# define FPGA_PRG CFG_FPGA_PRG /* FPGA program pin (ppc output)*/
-# define FPGA_CLK CFG_FPGA_CLK /* FPGA clk pin (ppc output) */
-# define FPGA_DATA CFG_FPGA_DATA /* FPGA data pin (ppc output) */
-# define FPGA_DONE CFG_FPGA_DONE /* FPGA done pin (ppc input) */
-# define FPGA_INIT CFG_FPGA_INIT /* FPGA init pin (ppc input) */
-#else
-# define FPGA_PRG 0x04000000 /* FPGA program pin (ppc output) */
-# define FPGA_CLK 0x02000000 /* FPGA clk pin (ppc output) */
-# define FPGA_DATA 0x01000000 /* FPGA data pin (ppc output) */
-# define FPGA_DONE 0x00800000 /* FPGA done pin (ppc input) */
-# define FPGA_INIT 0x00400000 /* FPGA init pin (ppc input) */
-#endif
-
-#define ERROR_FPGA_PRG_INIT_LOW -1 /* Timeout after PRG* asserted */
-#define ERROR_FPGA_PRG_INIT_HIGH -2 /* Timeout after PRG* deasserted */
-#define ERROR_FPGA_PRG_DONE -3 /* Timeout after programming */
-
-#ifndef SET_FPGA
-# define SET_FPGA(data) out32(GPIO0_OR, data)
-#endif
-
-#ifdef FPGA_PROG_ACTIVE_HIGH
-# define FPGA_PRG_LOW FPGA_PRG
-# define FPGA_PRG_HIGH 0
-#else
-# define FPGA_PRG_LOW 0
-# define FPGA_PRG_HIGH FPGA_PRG
-#endif
-
-#define FPGA_CLK_LOW 0
-#define FPGA_CLK_HIGH FPGA_CLK
-
-#define FPGA_DATA_LOW 0
-#define FPGA_DATA_HIGH FPGA_DATA
-
-#define FPGA_WRITE_1 { \
- SET_FPGA(FPGA_PRG_HIGH | FPGA_CLK_LOW | FPGA_DATA_HIGH); /* set clock to 0 */ \
- SET_FPGA(FPGA_PRG_HIGH | FPGA_CLK_LOW | FPGA_DATA_HIGH); /* set data to 1 */ \
- SET_FPGA(FPGA_PRG_HIGH | FPGA_CLK_HIGH | FPGA_DATA_HIGH); /* set clock to 1 */ \
- SET_FPGA(FPGA_PRG_HIGH | FPGA_CLK_HIGH | FPGA_DATA_HIGH);} /* set data to 1 */
-
-#define FPGA_WRITE_0 { \
- SET_FPGA(FPGA_PRG_HIGH | FPGA_CLK_LOW | FPGA_DATA_HIGH); /* set clock to 0 */ \
- SET_FPGA(FPGA_PRG_HIGH | FPGA_CLK_LOW | FPGA_DATA_LOW); /* set data to 0 */ \
- SET_FPGA(FPGA_PRG_HIGH | FPGA_CLK_HIGH | FPGA_DATA_LOW); /* set clock to 1 */ \
- SET_FPGA(FPGA_PRG_HIGH | FPGA_CLK_HIGH | FPGA_DATA_HIGH);} /* set data to 1 */
-
-#ifndef FPGA_DONE_STATE
-# define FPGA_DONE_STATE (in32(GPIO0_IR) & FPGA_DONE)
-#endif
-#ifndef FPGA_INIT_STATE
-# define FPGA_INIT_STATE (in32(GPIO0_IR) & FPGA_INIT)
-#endif
-
-
-static int fpga_boot(unsigned char *fpgadata, int size)
-{
- int i,index,len;
- int count;
-#ifdef CFG_FPGA_SPARTAN2
- int j;
-#else
- unsigned char b;
- int bit;
-#endif
-
- /* display infos on fpgaimage */
- index = 15;
- for (i=0; i<4; i++)
- {
- len = fpgadata[index];
- DBG("FPGA: %s\n", &(fpgadata[index+1]));
- index += len+3;
- }
-
-#ifdef CFG_FPGA_SPARTAN2
- /* search for preamble 0xFFFFFFFF */
- while (1)
- {
- if ((fpgadata[index] == 0xff) && (fpgadata[index+1] == 0xff) &&
- (fpgadata[index+2] == 0xff) && (fpgadata[index+3] == 0xff))
- break; /* preamble found */
- else
- index++;
- }
-#else
- /* search for preamble 0xFF2X */
- for (index = 0; index < size-1 ; index++)
- {
- if ((fpgadata[index] == 0xff) && ((fpgadata[index+1] & 0xf0) == 0x30))
- break;
- }
- index += 2;
-#endif
-
- DBG("FPGA: configdata starts at position 0x%x\n",index);
- DBG("FPGA: length of fpga-data %d\n", size-index);
-
- /*
- * Setup port pins for fpga programming
- */
-#ifndef CONFIG_M5249
- out32(GPIO0_ODR, 0x00000000); /* no open drain pins */
- out32(GPIO0_TCR, in32(GPIO0_TCR) | FPGA_PRG | FPGA_CLK | FPGA_DATA); /* setup for output */
-#endif
- SET_FPGA(FPGA_PRG_HIGH | FPGA_CLK_HIGH | FPGA_DATA_HIGH); /* set pins to high */
-
- DBG("%s, ",(FPGA_DONE_STATE == 0) ? "NOT DONE" : "DONE" );
- DBG("%s\n",(FPGA_INIT_STATE == 0) ? "NOT INIT" : "INIT" );
-
- /*
- * Init fpga by asserting and deasserting PROGRAM*
- */
- SET_FPGA(FPGA_PRG_LOW | FPGA_CLK_HIGH | FPGA_DATA_HIGH); /* set prog active */
-
- /* Wait for FPGA init line low */
- count = 0;
- while (FPGA_INIT_STATE)
- {
- udelay(1000); /* wait 1ms */
- /* Check for timeout - 100us max, so use 3ms */
- if (count++ > 3)
- {
- DBG("FPGA: Booting failed!\n");
- return ERROR_FPGA_PRG_INIT_LOW;
- }
- }
-
- DBG("%s, ",(FPGA_DONE_STATE == 0) ? "NOT DONE" : "DONE" );
- DBG("%s\n",(FPGA_INIT_STATE == 0) ? "NOT INIT" : "INIT" );
-
- /* deassert PROGRAM* */
- SET_FPGA(FPGA_PRG_HIGH | FPGA_CLK_HIGH | FPGA_DATA_HIGH); /* set prog inactive */
-
- /* Wait for FPGA end of init period . */
- count = 0;
- while (!(FPGA_INIT_STATE))
- {
- udelay(1000); /* wait 1ms */
- /* Check for timeout */
- if (count++ > 3)
- {
- DBG("FPGA: Booting failed!\n");
- return ERROR_FPGA_PRG_INIT_HIGH;
- }
- }
-
- DBG("%s, ",(FPGA_DONE_STATE == 0) ? "NOT DONE" : "DONE" );
- DBG("%s\n",(FPGA_INIT_STATE == 0) ? "NOT INIT" : "INIT" );
-
- DBG("write configuration data into fpga\n");
- /* write configuration-data into fpga... */
-
-#ifdef CFG_FPGA_SPARTAN2
- /*
- * Load uncompressed image into fpga
- */
- for (i=index; i<size; i++)
- {
- for (j=0; j<8; j++)
- {
- if ((fpgadata[i] & 0x80) == 0x80)
- {
- FPGA_WRITE_1;
- }
- else
- {
- FPGA_WRITE_0;
- }
- fpgadata[i] <<= 1;
- }
- }
-#else
- /* send 0xff 0x20 */
- FPGA_WRITE_1; FPGA_WRITE_1; FPGA_WRITE_1; FPGA_WRITE_1;
- FPGA_WRITE_1; FPGA_WRITE_1; FPGA_WRITE_1; FPGA_WRITE_1;
- FPGA_WRITE_0; FPGA_WRITE_0; FPGA_WRITE_1; FPGA_WRITE_0;
- FPGA_WRITE_0; FPGA_WRITE_0; FPGA_WRITE_0; FPGA_WRITE_0;
-
- /*
- ** Bit_DeCompression
- ** Code 1 .. maxOnes : n '1's followed by '0'
- ** maxOnes + 1 .. maxOnes + 1 : n - 1 '1's no '0'
- ** maxOnes + 2 .. 254 : n - (maxOnes + 2) '0's followed by '1'
- ** 255 : '1'
- */
-
- for (i=index; i<size; i++)
- {
- b = fpgadata[i];
- if ((b >= 1) && (b <= MAX_ONES))
- {
- for(bit=0; bit<b; bit++)
- {
- FPGA_WRITE_1;
- }
- FPGA_WRITE_0;
- }
- else if (b == (MAX_ONES+1))
- {
- for(bit=1; bit<b; bit++)
- {
- FPGA_WRITE_1;
- }
- }
- else if ((b >= (MAX_ONES+2)) && (b <= 254))
- {
- for(bit=0; bit<(b-(MAX_ONES+2)); bit++)
- {
- FPGA_WRITE_0;
- }
- FPGA_WRITE_1;
- }
- else if (b == 255)
- {
- FPGA_WRITE_1;
- }
- }
-#endif
-
- DBG("%s, ",(FPGA_DONE_STATE == 0) ? "NOT DONE" : "DONE" );
- DBG("%s\n",(FPGA_INIT_STATE == 0) ? "NOT INIT" : "INIT" );
-
- /*
- * Check if fpga's DONE signal - correctly booted ?
- */
-
- /* Wait for FPGA end of programming period . */
- count = 0;
- while (!(FPGA_DONE_STATE))
- {
- udelay(1000); /* wait 1ms */
- /* Check for timeout */
- if (count++ > 3)
- {
- DBG("FPGA: Booting failed!\n");
- return ERROR_FPGA_PRG_DONE;
- }
- }
-
- DBG("FPGA: Booting successful!\n");
- return 0;
-}
diff --git a/board/esd/common/lcd.c b/board/esd/common/lcd.c
deleted file mode 100644
index 0edc08308a..0000000000
--- a/board/esd/common/lcd.c
+++ /dev/null
@@ -1,334 +0,0 @@
-/*
- * (C) Copyright 2003-2004
- * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
- *
- * (C) Copyright 2005
- * Stefan Roese, DENX Software Engineering, sr@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include "lcd.h"
-
-
-extern int video_display_bitmap (ulong, int, int);
-
-
-int palette_index;
-int palette_value;
-int lcd_depth;
-unsigned char *glob_lcd_reg;
-unsigned char *glob_lcd_mem;
-
-#ifdef CFG_LCD_ENDIAN
-void lcd_setup(int lcd, int config)
-{
- if (lcd == 0) {
- /*
- * Set endianess and reset lcd controller 0 (small)
- */
- out32(GPIO0_OR, in32(GPIO0_OR) & ~CFG_LCD0_RST); /* set reset to low */
- udelay(10); /* wait 10us */
- if (config == 1) {
- out32(GPIO0_OR, in32(GPIO0_OR) | CFG_LCD_ENDIAN); /* big-endian */
- } else {
- out32(GPIO0_OR, in32(GPIO0_OR) & ~CFG_LCD_ENDIAN); /* little-endian */
- }
- udelay(10); /* wait 10us */
- out32(GPIO0_OR, in32(GPIO0_OR) | CFG_LCD0_RST); /* set reset to high */
- } else {
- /*
- * Set endianess and reset lcd controller 1 (big)
- */
- out32(GPIO0_OR, in32(GPIO0_OR) & ~CFG_LCD1_RST); /* set reset to low */
- udelay(10); /* wait 10us */
- if (config == 1) {
- out32(GPIO0_OR, in32(GPIO0_OR) | CFG_LCD_ENDIAN); /* big-endian */
- } else {
- out32(GPIO0_OR, in32(GPIO0_OR) & ~CFG_LCD_ENDIAN); /* little-endian */
- }
- udelay(10); /* wait 10us */
- out32(GPIO0_OR, in32(GPIO0_OR) | CFG_LCD1_RST); /* set reset to high */
- }
-
- /*
- * CFG_LCD_ENDIAN may also be FPGA_RESET, so set inactive
- */
- out32(GPIO0_OR, in32(GPIO0_OR) | CFG_LCD_ENDIAN); /* set reset high again */
-}
-#endif /* #ifdef CFG_LCD_ENDIAN */
-
-
-void lcd_bmp(uchar *logo_bmp)
-{
- int i;
- uchar *ptr;
- ushort *ptr2;
- ushort val;
- unsigned char *dst = NULL;
- int x, y;
- int width, height, bpp, colors, line_size;
- int header_size;
- unsigned char *bmp;
- unsigned char r, g, b;
- BITMAPINFOHEADER *bm_info;
- ulong len;
-
- /*
- * Check for bmp mark 'BM'
- */
- if (*(ushort *)logo_bmp != 0x424d) {
-
- /*
- * Decompress bmp image
- */
- len = CFG_VIDEO_LOGO_MAX_SIZE;
- dst = malloc(CFG_VIDEO_LOGO_MAX_SIZE);
- if (dst == NULL) {
- printf("Error: malloc in gunzip failed!\n");
- return;
- }
- if (gunzip(dst, CFG_VIDEO_LOGO_MAX_SIZE, (uchar *)logo_bmp, &len) != 0) {
- return;
- }
- if (len == CFG_VIDEO_LOGO_MAX_SIZE) {
- printf("Image could be truncated (increase CFG_VIDEO_LOGO_MAX_SIZE)!\n");
- }
-
- /*
- * Check for bmp mark 'BM'
- */
- if (*(ushort *)dst != 0x424d) {
- printf("LCD: Unknown image format!\n");
- free(dst);
- return;
- }
- } else {
- /*
- * Uncompressed BMP image, just use this pointer
- */
- dst = (uchar *)logo_bmp;
- }
-
- /*
- * Get image info from bmp-header
- */
- bm_info = (BITMAPINFOHEADER *)(dst + 14);
- bpp = LOAD_SHORT(bm_info->biBitCount);
- width = LOAD_LONG(bm_info->biWidth);
- height = LOAD_LONG(bm_info->biHeight);
- switch (bpp) {
- case 1:
- colors = 1;
- line_size = width >> 3;
- break;
- case 4:
- colors = 16;
- line_size = width >> 1;
- break;
- case 8:
- colors = 256;
- line_size = width;
- break;
- case 24:
- colors = 0;
- line_size = width * 3;
- break;
- default:
- printf("LCD: Unknown bpp (%d) im image!\n", bpp);
- if ((dst != NULL) && (dst != (uchar *)logo_bmp)) {
- free(dst);
- }
- return;
- }
- printf(" (%d*%d, %dbpp)\n", width, height, bpp);
-
- /*
- * Write color palette
- */
- if ((colors <= 256) && (lcd_depth <= 8)) {
- ptr = (unsigned char *)(dst + 14 + 40);
- for (i=0; i<colors; i++) {
- b = *ptr++;
- g = *ptr++;
- r = *ptr++;
- ptr++;
- S1D_WRITE_PALETTE(glob_lcd_reg, i, r, g, b);
- }
- }
-
- /*
- * Write bitmap data into framebuffer
- */
- ptr = glob_lcd_mem;
- ptr2 = (ushort *)glob_lcd_mem;
- header_size = 14 + 40 + 4*colors; /* skip bmp header */
- for (y=0; y<height; y++) {
- bmp = &dst[(height-1-y)*line_size + header_size];
- if (lcd_depth == 16) {
- if (bpp == 24) {
- for (x=0; x<width; x++) {
- /*
- * Generate epson 16bpp fb-format from 24bpp image
- */
- b = *bmp++ >> 3;
- g = *bmp++ >> 2;
- r = *bmp++ >> 3;
- val = ((r & 0x1f) << 11) | ((g & 0x3f) << 5) | (b & 0x1f);
- *ptr2++ = val;
- }
- } else if (bpp == 8) {
- for (x=0; x<line_size; x++) {
- /* query rgb value from palette */
- ptr = (unsigned char *)(dst + 14 + 40) ;
- ptr += (*bmp++) << 2;
- b = *ptr++ >> 3;
- g = *ptr++ >> 2;
- r = *ptr++ >> 3;
- val = ((r & 0x1f) << 11) | ((g & 0x3f) << 5) | (b & 0x1f);
- *ptr2++ = val;
- }
- }
- } else {
- for (x=0; x<line_size; x++) {
- *ptr++ = *bmp++;
- }
- }
- }
-
- if ((dst != NULL) && (dst != (uchar *)logo_bmp)) {
- free(dst);
- }
-}
-
-
-void lcd_init(uchar *lcd_reg, uchar *lcd_mem, S1D_REGS *regs, int reg_count,
- uchar *logo_bmp, ulong len)
-{
- int i;
- ushort s1dReg;
- uchar s1dValue;
- int reg_byte_swap;
-
- /*
- * Detect epson
- */
- if (lcd_reg[0] == 0x1c) {
- /*
- * Big epson detected
- */
- reg_byte_swap = FALSE;
- palette_index = 0x1e2;
- palette_value = 0x1e4;
- lcd_depth = 16;
- puts("LCD: S1D13806");
- } else if (lcd_reg[1] == 0x1c) {
- /*
- * Big epson detected (with register swap bug)
- */
- reg_byte_swap = TRUE;
- palette_index = 0x1e3;
- palette_value = 0x1e5;
- lcd_depth = 16;
- puts("LCD: S1D13806S");
- } else if (lcd_reg[0] == 0x18) {
- /*
- * Small epson detected (704)
- */
- reg_byte_swap = FALSE;
- palette_index = 0x15;
- palette_value = 0x17;
- lcd_depth = 8;
- puts("LCD: S1D13704");
- } else if (lcd_reg[0x10000] == 0x24) {
- /*
- * Small epson detected (705)
- */
- reg_byte_swap = FALSE;
- palette_index = 0x15;
- palette_value = 0x17;
- lcd_depth = 8;
- lcd_reg += 0x10000; /* add offset for 705 regs */
- puts("LCD: S1D13705");
- } else {
- puts("LCD: No controller detected!\n");
- return;
- }
-
- /*
- * Setup lcd controller regs
- */
- for (i = 0; i<reg_count; i++) {
- s1dReg = regs[i].Index;
- if (reg_byte_swap) {
- if ((s1dReg & 0x0001) == 0)
- s1dReg |= 0x0001;
- else
- s1dReg &= ~0x0001;
- }
- s1dValue = regs[i].Value;
- lcd_reg[s1dReg] = s1dValue;
- }
-
- /*
- * Save reg & mem pointer for later usage (e.g. bmp command)
- */
- glob_lcd_reg = lcd_reg;
- glob_lcd_mem = lcd_mem;
-
- /*
- * Display bmp image
- */
- lcd_bmp(logo_bmp);
-}
-
-#ifdef CONFIG_VIDEO_SM501
-int do_esdbmp(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- ulong addr;
- char *str;
-
- if (argc != 2) {
- printf ("Usage:\n%s\n", cmdtp->usage);
- return 1;
- }
-
- addr = simple_strtoul(argv[1], NULL, 16);
-
- str = getenv("bd_type");
- if ((strcmp(str, "ppc221") == 0) || (strcmp(str, "ppc231") == 0)) {
- /*
- * SM501 available, use standard bmp command
- */
- return (video_display_bitmap(addr, 0, 0));
- } else {
- /*
- * No SM501 available, use esd epson bmp command
- */
- lcd_bmp((uchar *)addr);
- return 0;
- }
-}
-
-U_BOOT_CMD(
- esdbmp, 2, 1, do_esdbmp,
- "esdbmp - display BMP image\n",
- "<imageAddr> - display image\n"
-);
-#endif
diff --git a/board/esd/common/lcd.h b/board/esd/common/lcd.h
deleted file mode 100644
index 3169e6bb5c..0000000000
--- a/board/esd/common/lcd.h
+++ /dev/null
@@ -1,70 +0,0 @@
-/*
- * (C) Copyright 2003-2004
- * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * Neutralize little endians.
- */
-#define SWAP_LONG(data) ((unsigned long) \
- (((unsigned long)(data) >> 24) | \
- ((unsigned long)(data) << 24) | \
- (((unsigned long)(data) >> 8) & 0x0000ff00 ) | \
- (((unsigned long)(data) << 8) & 0x00ff0000 )))
-#define SWAP_SHORT(data) ((unsigned short) \
- (((unsigned short)(data) >> 8 ) | \
- ((unsigned short)(data) << 8 )))
-#define LOAD_LONG(data) SWAP_LONG(data)
-#define LOAD_SHORT(data) SWAP_SHORT(data)
-
-#ifndef FALSE
-#define FALSE 0
-#define TRUE (!FALSE)
-#endif
-
-#define S1D_WRITE_PALETTE(p,i,r,g,b) \
- { \
- ((volatile uchar*)(p))[palette_index] = (uchar)(i); \
- ((volatile uchar*)(p))[palette_value] = (uchar)(r); \
- ((volatile uchar*)(p))[palette_value] = (uchar)(g); \
- ((volatile uchar*)(p))[palette_value] = (uchar)(b); \
- }
-
-typedef struct
-{
- ushort Index;
- uchar Value;
-} S1D_REGS;
-
-typedef struct /**** BMP file info structure ****/
-{
- unsigned int biSize; /* Size of info header */
- int biWidth; /* Width of image */
- int biHeight; /* Height of image */
- unsigned short biPlanes; /* Number of color planes */
- unsigned short biBitCount; /* Number of bits per pixel */
- unsigned int biCompression; /* Type of compression to use */
- unsigned int biSizeImage; /* Size of image data */
- int biXPelsPerMeter; /* X pixels per meter */
- int biYPelsPerMeter; /* Y pixels per meter */
- unsigned int biClrUsed; /* Number of colors used */
- unsigned int biClrImportant; /* Number of important colors */
-} BITMAPINFOHEADER;
diff --git a/board/esd/common/misc.c b/board/esd/common/misc.c
deleted file mode 100644
index 48b4b7c7b9..0000000000
--- a/board/esd/common/misc.c
+++ /dev/null
@@ -1,40 +0,0 @@
-/*
- * (C) Copyright 2004
- * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-
-#ifdef CONFIG_LXT971_NO_SLEEP
-#include <miiphy.h>
-#endif
-
-
-#ifdef CONFIG_LXT971_NO_SLEEP
-void lxt971_no_sleep(void)
-{
- unsigned short reg;
-
- miiphy_read("ppc_4xx_eth0", CONFIG_PHY_ADDR, 0x10, &reg);
- reg &= ~0x0040; /* disable sleep mode */
- miiphy_write("ppc_4xx_eth0", CONFIG_PHY_ADDR, 0x10, reg);
-}
-#endif /* CONFIG_LXT971_NO_SLEEP */
diff --git a/board/esd/common/pci.c b/board/esd/common/pci.c
deleted file mode 100644
index f711205efe..0000000000
--- a/board/esd/common/pci.c
+++ /dev/null
@@ -1,202 +0,0 @@
-/*
- * (C) Copyright 2001
- * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <ppc4xx.h>
-#include <asm/processor.h>
-#include <pci.h>
-
-
-u_long pci9054_iobase;
-
-
-#define PCI_PRIMARY_CAR (0x500000dc) /* PCI config address reg */
-#define PCI_PRIMARY_CDR (0x80000000) /* PCI config data reg */
-
-
-/*-----------------------------------------------------------------------------+
-| Subroutine: pci9054_read_config_dword
-| Description: Read a PCI configuration register
-| Inputs:
-| hose PCI Controller
-| dev PCI Bus+Device+Function number
-| offset Configuration register number
-| value Address of the configuration register value
-| Return value:
-| 0 Successful
-+-----------------------------------------------------------------------------*/
-int pci9054_read_config_dword(struct pci_controller *hose,
- pci_dev_t dev, int offset, u32* value)
-{
- unsigned long conAdrVal;
- unsigned long val;
-
- /* generate coded value for CON_ADR register */
- conAdrVal = dev | (offset & 0xfc) | 0x80000000;
-
- /* Load the CON_ADR (CAR) value first, then read from CON_DATA (CDR) */
- *(unsigned long *)PCI_PRIMARY_CAR = conAdrVal;
-
- /* Note: *pResult comes back as -1 if machine check happened */
- val = in32r(PCI_PRIMARY_CDR);
-
- *value = (unsigned long) val;
-
- out32r(PCI_PRIMARY_CAR, 0);
-
- if ((*(unsigned long *)0x50000304) & 0x60000000)
- {
- /* clear pci master/target abort bits */
- *(unsigned long *)0x50000304 = *(unsigned long *)0x50000304;
- }
-
- return 0;
-}
-
-/*-----------------------------------------------------------------------------+
-| Subroutine: pci9054_write_config_dword
-| Description: Write a PCI configuration register.
-| Inputs:
-| hose PCI Controller
-| dev PCI Bus+Device+Function number
-| offset Configuration register number
-| Value Configuration register value
-| Return value:
-| 0 Successful
-| Updated for pass2 errata #6. Need to disable interrupts and clear the
-| PCICFGADR reg after writing the PCICFGDATA reg.
-+-----------------------------------------------------------------------------*/
-int pci9054_write_config_dword(struct pci_controller *hose,
- pci_dev_t dev, int offset, u32 value)
-{
- unsigned long conAdrVal;
-
- conAdrVal = dev | (offset & 0xfc) | 0x80000000;
-
- *(unsigned long *)PCI_PRIMARY_CAR = conAdrVal;
-
- out32r(PCI_PRIMARY_CDR, value);
-
- out32r(PCI_PRIMARY_CAR, 0);
-
- /* clear pci master/target abort bits */
- *(unsigned long *)0x50000304 = *(unsigned long *)0x50000304;
-
- return (0);
-}
-
-/*-----------------------------------------------------------------------
- */
-
-#ifdef CONFIG_DASA_SIM
-static void pci_dasa_sim_config_pci9054(struct pci_controller *hose, pci_dev_t dev,
- struct pci_config_table *_)
-{
- unsigned int iobase;
- unsigned short status = 0;
- unsigned char timer;
-
- /*
- * Configure PLX PCI9054
- */
- pci_read_config_word(CFG_PCI9054_DEV_FN, PCI_COMMAND, &status);
- status |= PCI_COMMAND_MASTER | PCI_COMMAND_IO | PCI_COMMAND_MEMORY;
- pci_write_config_word(CFG_PCI9054_DEV_FN, PCI_COMMAND, status);
-
- /* Check the latency timer for values >= 0x60.
- */
- pci_read_config_byte(CFG_PCI9054_DEV_FN, PCI_LATENCY_TIMER, &timer);
- if (timer < 0x60)
- {
- pci_write_config_byte(CFG_PCI9054_DEV_FN, PCI_LATENCY_TIMER, 0x60);
- }
-
- /* Set I/O base register.
- */
- pci_write_config_dword(CFG_PCI9054_DEV_FN, PCI_BASE_ADDRESS_0, CFG_PCI9054_IOBASE);
- pci_read_config_dword(CFG_PCI9054_DEV_FN, PCI_BASE_ADDRESS_0, &iobase);
-
- pci9054_iobase = pci_mem_to_phys(CFG_PCI9054_DEV_FN, iobase & PCI_BASE_ADDRESS_MEM_MASK);
-
- if (pci9054_iobase == 0xffffffff)
- {
- printf("Error: Can not set I/O base register.\n");
- return;
- }
-}
-#endif
-
-static struct pci_config_table pci9054_config_table[] = {
-#ifndef CONFIG_PCI_PNP
- { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
- PCI_BUS(CFG_ETH_DEV_FN), PCI_DEV(CFG_ETH_DEV_FN), PCI_FUNC(CFG_ETH_DEV_FN),
- pci_cfgfunc_config_device, { CFG_ETH_IOBASE,
- CFG_ETH_IOBASE,
- PCI_COMMAND_IO | PCI_COMMAND_MASTER }},
-#ifdef CONFIG_DASA_SIM
- { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
- PCI_BUS(CFG_PCI9054_DEV_FN), PCI_DEV(CFG_PCI9054_DEV_FN), PCI_FUNC(CFG_PCI9054_DEV_FN),
- pci_dasa_sim_config_pci9054 },
-#endif
-#endif
- { }
-};
-
-static struct pci_controller pci9054_hose = {
- config_table: pci9054_config_table,
-};
-
-void pci_init_board(void)
-{
- struct pci_controller *hose = &pci9054_hose;
-
- /*
- * Register the hose
- */
- hose->first_busno = 0;
- hose->last_busno = 0xff;
-
- /* System memory space */
- pci_set_region(hose->regions + 0,
- 0x00000000, 0x00000000, 0x01000000,
- PCI_REGION_MEM | PCI_REGION_MEMORY);
-
- /* PCI Memory space */
- pci_set_region(hose->regions + 1,
- 0x00000000, 0xc0000000, 0x10000000,
- PCI_REGION_MEM);
-
- pci_set_ops(hose,
- pci_hose_read_config_byte_via_dword,
- pci_hose_read_config_word_via_dword,
- pci9054_read_config_dword,
- pci_hose_write_config_byte_via_dword,
- pci_hose_write_config_word_via_dword,
- pci9054_write_config_dword);
-
- hose->region_count = 2;
-
- pci_register_hose(hose);
-
- hose->last_busno = pci_hose_scan(hose);
-}
diff --git a/board/esd/common/s1d13704_320_240_4bpp.h b/board/esd/common/s1d13704_320_240_4bpp.h
deleted file mode 100644
index 77c8a467a9..0000000000
--- a/board/esd/common/s1d13704_320_240_4bpp.h
+++ /dev/null
@@ -1,53 +0,0 @@
-/*
- *
- * Generic Header information generated by 13704CFG.EXE (Build 10)
- *
- * Copyright (c) 2000,2001 Epson Research and Development, Inc.
- * All rights reserved.
- *
- * Panel: 320x240x4bpp 78Hz Mono 4-Bit STN, Disabled (PCLK=6.666MHz)
- *
- * This file defines the configuration environment and registers,
- * which can be used by any software, such as display drivers.
- *
- * PLEASE NOTE: If you FTP this file to a non-Windows platform, make
- * sure you transfer this file using ASCII, not BINARY
- * mode.
- *
- */
-
-static S1D_REGS regs_13704_320_240_4bpp[] =
-{
- { 0x00, 0x00 }, /* Revision Code Register */
- { 0x01, 0x04 }, /*00*/ /* Mode Register 0 Register */
- { 0x02, 0xA4 }, /*a0*/ /* Mode Register 1 Register */
- { 0x03, 0x83 }, /*03*/ /* Mode Register 2 Register - bit7 is LUT bypass */
- { 0x04, 0x27 }, /* Horizontal Panel Size Register */
- { 0x05, 0xEF }, /* Vertical Panel Size Register (LSB) */
- { 0x06, 0x00 }, /* Vertical Panel Size Register (MSB) */
- { 0x07, 0x00 }, /* FPLINE Start Position Register */
- { 0x08, 0x00 }, /* Horizontal Non-Display Period Register */
- { 0x09, 0x00 }, /* FPFRAME Start Position Register */
- { 0x0A, 0x02 }, /* Vertical Non-Display Period Register */
- { 0x0B, 0x00 }, /* MOD Rate Register */
- { 0x0C, 0x00 }, /* Screen 1 Start Address Register (LSB) */
- { 0x0D, 0x00 }, /* Screen 1 Start Address Register (MSB) */
- { 0x0E, 0x00 }, /* Not Used */
- { 0x0F, 0x00 }, /* Screen 2 Start Address Register (LSB) */
- { 0x10, 0x00 }, /* Screen 2 Start Address Register (MSB) */
- { 0x11, 0x00 }, /* Not Used */
- { 0x12, 0x00 }, /* Memory Address Offset Register */
- { 0x13, 0xFF }, /* Screen 1 Vertical Size Register (LSB) */
- { 0x14, 0x03 }, /* Screen 1 Vertical Size Register (MSB) */
- { 0x15, 0x00 }, /* Look-Up Table Address Register */
- { 0x16, 0x00 }, /* Look-Up Table Bank Select Register */
- { 0x17, 0x00 }, /* Look-Up Table Data Register */
- { 0x18, 0x01 }, /* GPIO Configuration Control Register */
- { 0x19, 0x01 }, /* GPIO Status/Control Register */
- { 0x1A, 0x00 }, /* Scratch Pad Register */
- { 0x1B, 0x00 }, /* SwivelView Mode Register */
- { 0x1C, 0xA0 }, /* Line Byte Count Register */
- { 0x1D, 0x00 }, /* Not Used */
- { 0x1E, 0x00 }, /* Not Used */
- { 0x1F, 0x00 }, /* Not Used */
-};
diff --git a/board/esd/common/s1d13705_320_240_8bpp.h b/board/esd/common/s1d13705_320_240_8bpp.h
deleted file mode 100644
index 60843ac433..0000000000
--- a/board/esd/common/s1d13705_320_240_8bpp.h
+++ /dev/null
@@ -1,53 +0,0 @@
-/*
- *
- * Generic Header information generated by 13704CFG.EXE (Build 10)
- *
- * Copyright (c) 2000,2001 Epson Research and Development, Inc.
- * All rights reserved.
- *
- * Panel: 320x240x8bpp 78Hz Mono 8-Bit STN, Disabled (PCLK=6.666MHz)
- *
- * This file defines the configuration environment and registers,
- * which can be used by any software, such as display drivers.
- *
- * PLEASE NOTE: If you FTP this file to a non-Windows platform, make
- * sure you transfer this file using ASCII, not BINARY
- * mode.
- *
- */
-
-static S1D_REGS regs_13705_320_240_8bpp[] =
-{
- { 0x00, 0x00 }, /* Revision Code Register */
- { 0x01, 0x23 }, /* Mode Register 0 Register */
- { 0x02, 0xE0 }, /* Mode Register 1 Register */
- { 0x03, 0x03 }, /* Mode Register 2 Register - bit7 is LUT bypass */
- { 0x04, 0x27 }, /* Horizontal Panel Size Register */
- { 0x05, 0xEF }, /* Vertical Panel Size Register (LSB) */
- { 0x06, 0x00 }, /* Vertical Panel Size Register (MSB) */
- { 0x07, 0x00 }, /* FPLINE Start Position Register */
- { 0x08, 0x00 }, /* Horizontal Non-Display Period Register */
- { 0x09, 0x01 }, /* FPFRAME Start Position Register */
- { 0x0A, 0x02 }, /* Vertical Non-Display Period Register */
- { 0x0B, 0x00 }, /* MOD Rate Register */
- { 0x0C, 0x00 }, /* Screen 1 Start Address Register (LSB) */
- { 0x0D, 0x00 }, /* Screen 1 Start Address Register (MSB) */
- { 0x0E, 0x00 }, /* Not Used */
- { 0x0F, 0x00 }, /* Screen 2 Start Address Register (LSB) */
- { 0x10, 0x00 }, /* Screen 2 Start Address Register (MSB) */
- { 0x11, 0x00 }, /* Not Used */
- { 0x12, 0x00 }, /* Memory Address Offset Register */
- { 0x13, 0xFF }, /* Screen 1 Vertical Size Register (LSB) */
- { 0x14, 0x03 }, /* Screen 1 Vertical Size Register (MSB) */
- { 0x15, 0x00 }, /* Look-Up Table Address Register */
- { 0x16, 0x00 }, /* Look-Up Table Bank Select Register */
- { 0x17, 0x00 }, /* Look-Up Table Data Register */
- { 0x18, 0x01 }, /* GPIO Configuration Control Register */
- { 0x19, 0x01 }, /* GPIO Status/Control Register */
- { 0x1A, 0x00 }, /* Scratch Pad Register */
- { 0x1B, 0x00 }, /* SwivelView Mode Register */
- { 0x1C, 0xFF }, /* Line Byte Count Register */
- { 0x1D, 0x00 }, /* Not Used */
- { 0x1E, 0x00 }, /* Not Used */
- { 0x1F, 0x00 }, /* Not Used */
-};
diff --git a/board/esd/common/s1d13806_1024_768_8bpp.h b/board/esd/common/s1d13806_1024_768_8bpp.h
deleted file mode 100644
index 68801bf408..0000000000
--- a/board/esd/common/s1d13806_1024_768_8bpp.h
+++ /dev/null
@@ -1,125 +0,0 @@
-/*
- *
- * File generated by S1D13806CFG.EXE
- *
- * Copyright (c) 2000,2001 Epson Research and Development, Inc.
- * All rights reserved.
- *
- * PLEASE NOTE: If you FTP this file to a non-Windows platform, make
- * sure you transfer this file using ASCII, not BINARY mode.
- *
- * Panel: (active) 1024x768 34Hz TFT Single 12-bit (PCLK=BUSCLK=33.333MHz)
- * Memory: Embedded SDRAM (MCLK=CLKI=49.100MHz) (BUSCLK=33.333MHz)
- *
- */
-
-static S1D_REGS regs_13806_1024_768_8bpp[] =
-{
- {0x0001,0x00}, /* Miscellaneous Register */
- {0x01FC,0x00}, /* Display Mode Register */
- {0x0004,0x00}, /* General IO Pins Configuration Register 0 */
- {0x0005,0x00}, /* General IO Pins Configuration Register 1 */
- {0x0008,0x00}, /* General IO Pins Control Register 0 */
- {0x0009,0x00}, /* General IO Pins Control Register 1 */
- {0x0010,0x00}, /* Memory Clock Configuration Register */
- {0x0014,0x01}, /* LCD Pixel Clock Configuration Register */
- {0x0018,0x00}, /* CRT/TV Pixel Clock Configuration Register */
- {0x001C,0x02}, /* MediaPlug Clock Configuration Register */
- {0x001E,0x01}, /* CPU To Memory Wait State Select Register */
- {0x0021,0x03}, /* DRAM Refresh Rate Register */
- {0x002A,0x00}, /* DRAM Timings Control Register 0 */
- {0x002B,0x01}, /* DRAM Timings Control Register 1 */
- {0x0020,0x80}, /* Memory Configuration Register */
- {0x0030,0x55}, /* Panel Type Register */
- {0x0031,0x00}, /* MOD Rate Register */
- {0x0032,0x7F}, /* LCD Horizontal Display Width Register */
- {0x0034,0x12}, /* LCD Horizontal Non-Display Period Register */
- {0x0035,0x01}, /* TFT FPLINE Start Position Register */
- {0x0036,0x0B}, /* TFT FPLINE Pulse Width Register */
- {0x0038,0xFF}, /* LCD Vertical Display Height Register 0 */
- {0x0039,0x02}, /* LCD Vertical Display Height Register 1 */
- {0x003A,0x2C}, /* LCD Vertical Non-Display Period Register */
- {0x003B,0x0A}, /* TFT FPFRAME Start Position Register */
- {0x003C,0x01}, /* TFT FPFRAME Pulse Width Register */
- {0x0040,0x03}, /* LCD Display Mode Register */
- {0x0041,0x00}, /* LCD Miscellaneous Register */
- {0x0042,0x00}, /* LCD Display Start Address Register 0 */
- {0x0043,0x00}, /* LCD Display Start Address Register 1 */
- {0x0044,0x00}, /* LCD Display Start Address Register 2 */
- {0x0046,0x00}, /* LCD Memory Address Offset Register 0 */
- {0x0047,0x02}, /* LCD Memory Address Offset Register 1 */
- {0x0048,0x00}, /* LCD Pixel Panning Register */
- {0x004A,0x00}, /* LCD Display FIFO High Threshold Control Register */
- {0x004B,0x00}, /* LCD Display FIFO Low Threshold Control Register */
- {0x0050,0x4F}, /* CRT/TV Horizontal Display Width Register */
- {0x0052,0x13}, /* CRT/TV Horizontal Non-Display Period Register */
- {0x0053,0x01}, /* CRT/TV HRTC Start Position Register */
- {0x0054,0x0B}, /* CRT/TV HRTC Pulse Width Register */
- {0x0056,0xDF}, /* CRT/TV Vertical Display Height Register 0 */
- {0x0057,0x01}, /* CRT/TV Vertical Display Height Register 1 */
- {0x0058,0x2B}, /* CRT/TV Vertical Non-Display Period Register */
- {0x0059,0x09}, /* CRT/TV VRTC Start Position Register */
- {0x005A,0x01}, /* CRT/TV VRTC Pulse Width Register */
- {0x005B,0x10}, /* TV Output Control Register */
- {0x0060,0x03}, /* CRT/TV Display Mode Register */
- {0x0062,0x00}, /* CRT/TV Display Start Address Register 0 */
- {0x0063,0x00}, /* CRT/TV Display Start Address Register 1 */
- {0x0064,0x00}, /* CRT/TV Display Start Address Register 2 */
- {0x0066,0x40}, /* CRT/TV Memory Address Offset Register 0 */
- {0x0067,0x01}, /* CRT/TV Memory Address Offset Register 1 */
- {0x0068,0x00}, /* CRT/TV Pixel Panning Register */
- {0x006A,0x00}, /* CRT/TV Display FIFO High Threshold Control Register */
- {0x006B,0x00}, /* CRT/TV Display FIFO Low Threshold Control Register */
- {0x0070,0x00}, /* LCD Ink/Cursor Control Register */
- {0x0071,0x01}, /* LCD Ink/Cursor Start Address Register */
- {0x0072,0x00}, /* LCD Cursor X Position Register 0 */
- {0x0073,0x00}, /* LCD Cursor X Position Register 1 */
- {0x0074,0x00}, /* LCD Cursor Y Position Register 0 */
- {0x0075,0x00}, /* LCD Cursor Y Position Register 1 */
- {0x0076,0x00}, /* LCD Ink/Cursor Blue Color 0 Register */
- {0x0077,0x00}, /* LCD Ink/Cursor Green Color 0 Register */
- {0x0078,0x00}, /* LCD Ink/Cursor Red Color 0 Register */
- {0x007A,0x1F}, /* LCD Ink/Cursor Blue Color 1 Register */
- {0x007B,0x3F}, /* LCD Ink/Cursor Green Color 1 Register */
- {0x007C,0x1F}, /* LCD Ink/Cursor Red Color 1 Register */
- {0x007E,0x00}, /* LCD Ink/Cursor FIFO Threshold Register */
- {0x0080,0x00}, /* CRT/TV Ink/Cursor Control Register */
- {0x0081,0x01}, /* CRT/TV Ink/Cursor Start Address Register */
- {0x0082,0x00}, /* CRT/TV Cursor X Position Register 0 */
- {0x0083,0x00}, /* CRT/TV Cursor X Position Register 1 */
- {0x0084,0x00}, /* CRT/TV Cursor Y Position Register 0 */
- {0x0085,0x00}, /* CRT/TV Cursor Y Position Register 1 */
- {0x0086,0x00}, /* CRT/TV Ink/Cursor Blue Color 0 Register */
- {0x0087,0x00}, /* CRT/TV Ink/Cursor Green Color 0 Register */
- {0x0088,0x00}, /* CRT/TV Ink/Cursor Red Color 0 Register */
- {0x008A,0x1F}, /* CRT/TV Ink/Cursor Blue Color 1 Register */
- {0x008B,0x3F}, /* CRT/TV Ink/Cursor Green Color 1 Register */
- {0x008C,0x1F}, /* CRT/TV Ink/Cursor Red Color 1 Register */
- {0x008E,0x00}, /* CRT/TV Ink/Cursor FIFO Threshold Register */
- {0x0100,0x00}, /* BitBlt Control Register 0 */
- {0x0101,0x00}, /* BitBlt Control Register 1 */
- {0x0102,0x00}, /* BitBlt ROP Code/Color Expansion Register */
- {0x0103,0x00}, /* BitBlt Operation Register */
- {0x0104,0x00}, /* BitBlt Source Start Address Register 0 */
- {0x0105,0x00}, /* BitBlt Source Start Address Register 1 */
- {0x0106,0x00}, /* BitBlt Source Start Address Register 2 */
- {0x0108,0x00}, /* BitBlt Destination Start Address Register 0 */
- {0x0109,0x00}, /* BitBlt Destination Start Address Register 1 */
- {0x010A,0x00}, /* BitBlt Destination Start Address Register 2 */
- {0x010C,0x00}, /* BitBlt Memory Address Offset Register 0 */
- {0x010D,0x00}, /* BitBlt Memory Address Offset Register 1 */
- {0x0110,0x00}, /* BitBlt Width Register 0 */
- {0x0111,0x00}, /* BitBlt Width Register 1 */
- {0x0112,0x00}, /* BitBlt Height Register 0 */
- {0x0113,0x00}, /* BitBlt Height Register 1 */
- {0x0114,0x00}, /* BitBlt Background Color Register 0 */
- {0x0115,0x00}, /* BitBlt Background Color Register 1 */
- {0x0118,0x00}, /* BitBlt Foreground Color Register 0 */
- {0x0119,0x00}, /* BitBlt Foreground Color Register 1 */
- {0x01E0,0x00}, /* Look-Up Table Mode Register */
- {0x01E2,0x00}, /* Look-Up Table Address Register */
- {0x01F0,0x10}, /* Power Save Configuration Register */
- {0x01F1,0x00}, /* Power Save Status Register */
- {0x01F4,0x00}, /* CPU-to-Memory Access Watchdog Timer Register */
- {0x01FC,0x01}, /* Display Mode Register */
-};
diff --git a/board/esd/common/s1d13806_320_240_4bpp.h b/board/esd/common/s1d13806_320_240_4bpp.h
deleted file mode 100644
index 24d7350f26..0000000000
--- a/board/esd/common/s1d13806_320_240_4bpp.h
+++ /dev/null
@@ -1,125 +0,0 @@
-/*
- *
- * File generated by S1D13806CFG.EXE
- *
- * Copyright (c) 2000,2001 Epson Research and Development, Inc.
- * All rights reserved.
- *
- * PLEASE NOTE: If you FTP this file to a non-Windows platform, make
- * sure you transfer this file using ASCII, not BINARY mode.
- *
- * Panel: (active) 320x240 62Hz STN Single 4-bit (PCLK=CLKI2/4=6.250MHz)
- * Memory: Embedded SDRAM (MCLK=CLKI=49.500MHz) (BUSCLK=33.333MHz)
- *
- */
-
-static S1D_REGS regs_13806_320_240_4bpp[] =
-{
- {0x0001,0x00}, /* Miscellaneous Register */
- {0x01FC,0x00}, /* Display Mode Register */
- {0x0004,0x08}, /* General IO Pins Configuration Register 0 */
- {0x0005,0x08}, /* General IO Pins Configuration Register 1 */
- {0x0008,0x08}, /* General IO Pins Control Register 0 */
- {0x0009,0x00}, /* General IO Pins Control Register 1 */
- {0x0010,0x00}, /* Memory Clock Configuration Register */
- {0x0014,0x32}, /* LCD Pixel Clock Configuration Register */
- {0x0018,0x00}, /* CRT/TV Pixel Clock Configuration Register */
- {0x001C,0x02}, /* MediaPlug Clock Configuration Register */
- {0x001E,0x01}, /* CPU To Memory Wait State Select Register */
- {0x0021,0x03}, /* DRAM Refresh Rate Register */
- {0x002A,0x00}, /* DRAM Timings Control Register 0 */
- {0x002B,0x01}, /* DRAM Timings Control Register 1 */
- {0x0020,0x80}, /* Memory Configuration Register */
- {0x0030,0x00}, /* Panel Type Register */
- {0x0031,0x00}, /* MOD Rate Register */
- {0x0032,0x27}, /* LCD Horizontal Display Width Register */
- {0x0034,0x03}, /* LCD Horizontal Non-Display Period Register */
- {0x0035,0x01}, /* TFT FPLINE Start Position Register */
- {0x0036,0x0B}, /* TFT FPLINE Pulse Width Register */
- {0x0038,0xEF}, /* LCD Vertical Display Height Register 0 */
- {0x0039,0x00}, /* LCD Vertical Display Height Register 1 */
- {0x003A,0x2C}, /* LCD Vertical Non-Display Period Register */
- {0x003B,0x0A}, /* TFT FPFRAME Start Position Register */
- {0x003C,0x01}, /* TFT FPFRAME Pulse Width Register */
- {0x0040,0x02}, /* LCD Display Mode Register */
- {0x0041,0x00}, /* LCD Miscellaneous Register */
- {0x0042,0x00}, /* LCD Display Start Address Register 0 */
- {0x0043,0x00}, /* LCD Display Start Address Register 1 */
- {0x0044,0x00}, /* LCD Display Start Address Register 2 */
- {0x0046,0x50}, /* LCD Memory Address Offset Register 0 */
- {0x0047,0x00}, /* LCD Memory Address Offset Register 1 */
- {0x0048,0x00}, /* LCD Pixel Panning Register */
- {0x004A,0x00}, /* LCD Display FIFO High Threshold Control Register */
- {0x004B,0x00}, /* LCD Display FIFO Low Threshold Control Register */
- {0x0050,0x4F}, /* CRT/TV Horizontal Display Width Register */
- {0x0052,0x13}, /* CRT/TV Horizontal Non-Display Period Register */
- {0x0053,0x01}, /* CRT/TV HRTC Start Position Register */
- {0x0054,0x0B}, /* CRT/TV HRTC Pulse Width Register */
- {0x0056,0xDF}, /* CRT/TV Vertical Display Height Register 0 */
- {0x0057,0x01}, /* CRT/TV Vertical Display Height Register 1 */
- {0x0058,0x2B}, /* CRT/TV Vertical Non-Display Period Register */
- {0x0059,0x09}, /* CRT/TV VRTC Start Position Register */
- {0x005A,0x01}, /* CRT/TV VRTC Pulse Width Register */
- {0x005B,0x10}, /* TV Output Control Register */
- {0x0060,0x03}, /* CRT/TV Display Mode Register */
- {0x0062,0x00}, /* CRT/TV Display Start Address Register 0 */
- {0x0063,0x00}, /* CRT/TV Display Start Address Register 1 */
- {0x0064,0x00}, /* CRT/TV Display Start Address Register 2 */
- {0x0066,0x40}, /* CRT/TV Memory Address Offset Register 0 */
- {0x0067,0x01}, /* CRT/TV Memory Address Offset Register 1 */
- {0x0068,0x00}, /* CRT/TV Pixel Panning Register */
- {0x006A,0x00}, /* CRT/TV Display FIFO High Threshold Control Register */
- {0x006B,0x00}, /* CRT/TV Display FIFO Low Threshold Control Register */
- {0x0070,0x00}, /* LCD Ink/Cursor Control Register */
- {0x0071,0x01}, /* LCD Ink/Cursor Start Address Register */
- {0x0072,0x00}, /* LCD Cursor X Position Register 0 */
- {0x0073,0x00}, /* LCD Cursor X Position Register 1 */
- {0x0074,0x00}, /* LCD Cursor Y Position Register 0 */
- {0x0075,0x00}, /* LCD Cursor Y Position Register 1 */
- {0x0076,0x00}, /* LCD Ink/Cursor Blue Color 0 Register */
- {0x0077,0x00}, /* LCD Ink/Cursor Green Color 0 Register */
- {0x0078,0x00}, /* LCD Ink/Cursor Red Color 0 Register */
- {0x007A,0x1F}, /* LCD Ink/Cursor Blue Color 1 Register */
- {0x007B,0x3F}, /* LCD Ink/Cursor Green Color 1 Register */
- {0x007C,0x1F}, /* LCD Ink/Cursor Red Color 1 Register */
- {0x007E,0x00}, /* LCD Ink/Cursor FIFO Threshold Register */
- {0x0080,0x00}, /* CRT/TV Ink/Cursor Control Register */
- {0x0081,0x01}, /* CRT/TV Ink/Cursor Start Address Register */
- {0x0082,0x00}, /* CRT/TV Cursor X Position Register 0 */
- {0x0083,0x00}, /* CRT/TV Cursor X Position Register 1 */
- {0x0084,0x00}, /* CRT/TV Cursor Y Position Register 0 */
- {0x0085,0x00}, /* CRT/TV Cursor Y Position Register 1 */
- {0x0086,0x00}, /* CRT/TV Ink/Cursor Blue Color 0 Register */
- {0x0087,0x00}, /* CRT/TV Ink/Cursor Green Color 0 Register */
- {0x0088,0x00}, /* CRT/TV Ink/Cursor Red Color 0 Register */
- {0x008A,0x1F}, /* CRT/TV Ink/Cursor Blue Color 1 Register */
- {0x008B,0x3F}, /* CRT/TV Ink/Cursor Green Color 1 Register */
- {0x008C,0x1F}, /* CRT/TV Ink/Cursor Red Color 1 Register */
- {0x008E,0x00}, /* CRT/TV Ink/Cursor FIFO Threshold Register */
- {0x0100,0x00}, /* BitBlt Control Register 0 */
- {0x0101,0x00}, /* BitBlt Control Register 1 */
- {0x0102,0x00}, /* BitBlt ROP Code/Color Expansion Register */
- {0x0103,0x00}, /* BitBlt Operation Register */
- {0x0104,0x00}, /* BitBlt Source Start Address Register 0 */
- {0x0105,0x00}, /* BitBlt Source Start Address Register 1 */
- {0x0106,0x00}, /* BitBlt Source Start Address Register 2 */
- {0x0108,0x00}, /* BitBlt Destination Start Address Register 0 */
- {0x0109,0x00}, /* BitBlt Destination Start Address Register 1 */
- {0x010A,0x00}, /* BitBlt Destination Start Address Register 2 */
- {0x010C,0x00}, /* BitBlt Memory Address Offset Register 0 */
- {0x010D,0x00}, /* BitBlt Memory Address Offset Register 1 */
- {0x0110,0x00}, /* BitBlt Width Register 0 */
- {0x0111,0x00}, /* BitBlt Width Register 1 */
- {0x0112,0x00}, /* BitBlt Height Register 0 */
- {0x0113,0x00}, /* BitBlt Height Register 1 */
- {0x0114,0x00}, /* BitBlt Background Color Register 0 */
- {0x0115,0x00}, /* BitBlt Background Color Register 1 */
- {0x0118,0x00}, /* BitBlt Foreground Color Register 0 */
- {0x0119,0x00}, /* BitBlt Foreground Color Register 1 */
- {0x01E0,0x00}, /* Look-Up Table Mode Register */
- {0x01E2,0x00}, /* Look-Up Table Address Register */
- {0x01F0,0x10}, /* Power Save Configuration Register */
- {0x01F1,0x00}, /* Power Save Status Register */
- {0x01F4,0x00}, /* CPU-to-Memory Access Watchdog Timer Register */
- {0x01FC,0x01}, /* Display Mode Register */
-};
diff --git a/board/esd/common/s1d13806_640_480_16bpp.h b/board/esd/common/s1d13806_640_480_16bpp.h
deleted file mode 100644
index 178f1a9615..0000000000
--- a/board/esd/common/s1d13806_640_480_16bpp.h
+++ /dev/null
@@ -1,125 +0,0 @@
-/*
- *
- * File generated by S1D13806CFG.EXE
- *
- * Copyright (c) 2000,2001 Epson Research and Development, Inc.
- * All rights reserved.
- *
- * PLEASE NOTE: If you FTP this file to a non-Windows platform, make
- * sure you transfer this file using ASCII, not BINARY mode.
- *
- * Panel: (active) 640x480 59Hz TFT Single 18-bit (PCLK=CLKI2=25.000MHz)
- * Memory: Embedded SDRAM (MCLK=CLKI=49.152MHz) (BUSCLK=33.333MHz)
- *
- */
-
-static S1D_REGS regs_13806_640_480_16bpp[] =
-{
- {0x0001,0x00}, /* Miscellaneous Register */
- {0x01FC,0x00}, /* Display Mode Register */
- {0x0004,0x18}, /* General IO Pins Configuration Register 0 */
- {0x0005,0x00}, /* General IO Pins Configuration Register 1 */
- {0x0008,0x18}, /* General IO Pins Control Register 0 */
- {0x0009,0x00}, /* General IO Pins Control Register 1 */
- {0x0010,0x00}, /* Memory Clock Configuration Register */
- {0x0014,0x02}, /* LCD Pixel Clock Configuration Register */
- {0x0018,0x02}, /* CRT/TV Pixel Clock Configuration Register */
- {0x001C,0x02}, /* MediaPlug Clock Configuration Register */
- {0x001E,0x01}, /* CPU To Memory Wait State Select Register */
- {0x0021,0x03}, /* DRAM Refresh Rate Register */
- {0x002A,0x00}, /* DRAM Timings Control Register 0 */
- {0x002B,0x01}, /* DRAM Timings Control Register 1 */
- {0x0020,0x80}, /* Memory Configuration Register */
- {0x0030,0x25}, /* Panel Type Register */
- {0x0031,0x00}, /* MOD Rate Register */
- {0x0032,0x4F}, /* LCD Horizontal Display Width Register */
- {0x0034,0x13}, /* LCD Horizontal Non-Display Period Register */
- {0x0035,0x00}, /* TFT FPLINE Start Position Register */
- {0x0036,0x0B}, /* TFT FPLINE Pulse Width Register */
- {0x0038,0xDF}, /* LCD Vertical Display Height Register 0 */
- {0x0039,0x01}, /* LCD Vertical Display Height Register 1 */
- {0x003A,0x24}, /* LCD Vertical Non-Display Period Register */
- {0x003B,0x00}, /* TFT FPFRAME Start Position Register */
- {0x003C,0x01}, /* TFT FPFRAME Pulse Width Register */
- {0x0040,0x05}, /* LCD Display Mode Register */
- {0x0041,0x00}, /* LCD Miscellaneous Register */
- {0x0042,0x00}, /* LCD Display Start Address Register 0 */
- {0x0043,0x00}, /* LCD Display Start Address Register 1 */
- {0x0044,0x00}, /* LCD Display Start Address Register 2 */
- {0x0046,0x80}, /* LCD Memory Address Offset Register 0 */
- {0x0047,0x02}, /* LCD Memory Address Offset Register 1 */
- {0x0048,0x00}, /* LCD Pixel Panning Register */
- {0x004A,0x00}, /* LCD Display FIFO High Threshold Control Register */
- {0x004B,0x00}, /* LCD Display FIFO Low Threshold Control Register */
- {0x0050,0x4F}, /* CRT/TV Horizontal Display Width Register */
- {0x0052,0x13}, /* CRT/TV Horizontal Non-Display Period Register */
- {0x0053,0x01}, /* CRT/TV HRTC Start Position Register */
- {0x0054,0x0B}, /* CRT/TV HRTC Pulse Width Register */
- {0x0056,0xDF}, /* CRT/TV Vertical Display Height Register 0 */
- {0x0057,0x01}, /* CRT/TV Vertical Display Height Register 1 */
- {0x0058,0x2B}, /* CRT/TV Vertical Non-Display Period Register */
- {0x0059,0x09}, /* CRT/TV VRTC Start Position Register */
- {0x005A,0x01}, /* CRT/TV VRTC Pulse Width Register */
- {0x005B,0x10}, /* TV Output Control Register */
- {0x0060,0x05}, /* CRT/TV Display Mode Register */
- {0x0062,0x00}, /* CRT/TV Display Start Address Register 0 */
- {0x0063,0x00}, /* CRT/TV Display Start Address Register 1 */
- {0x0064,0x00}, /* CRT/TV Display Start Address Register 2 */
- {0x0066,0x80}, /* CRT/TV Memory Address Offset Register 0 */
- {0x0067,0x02}, /* CRT/TV Memory Address Offset Register 1 */
- {0x0068,0x00}, /* CRT/TV Pixel Panning Register */
- {0x006A,0x00}, /* CRT/TV Display FIFO High Threshold Control Register */
- {0x006B,0x00}, /* CRT/TV Display FIFO Low Threshold Control Register */
- {0x0070,0x00}, /* LCD Ink/Cursor Control Register */
- {0x0071,0x01}, /* LCD Ink/Cursor Start Address Register */
- {0x0072,0x00}, /* LCD Cursor X Position Register 0 */
- {0x0073,0x00}, /* LCD Cursor X Position Register 1 */
- {0x0074,0x00}, /* LCD Cursor Y Position Register 0 */
- {0x0075,0x00}, /* LCD Cursor Y Position Register 1 */
- {0x0076,0x00}, /* LCD Ink/Cursor Blue Color 0 Register */
- {0x0077,0x00}, /* LCD Ink/Cursor Green Color 0 Register */
- {0x0078,0x00}, /* LCD Ink/Cursor Red Color 0 Register */
- {0x007A,0x1F}, /* LCD Ink/Cursor Blue Color 1 Register */
- {0x007B,0x3F}, /* LCD Ink/Cursor Green Color 1 Register */
- {0x007C,0x1F}, /* LCD Ink/Cursor Red Color 1 Register */
- {0x007E,0x00}, /* LCD Ink/Cursor FIFO Threshold Register */
- {0x0080,0x00}, /* CRT/TV Ink/Cursor Control Register */
- {0x0081,0x01}, /* CRT/TV Ink/Cursor Start Address Register */
- {0x0082,0x00}, /* CRT/TV Cursor X Position Register 0 */
- {0x0083,0x00}, /* CRT/TV Cursor X Position Register 1 */
- {0x0084,0x00}, /* CRT/TV Cursor Y Position Register 0 */
- {0x0085,0x00}, /* CRT/TV Cursor Y Position Register 1 */
- {0x0086,0x00}, /* CRT/TV Ink/Cursor Blue Color 0 Register */
- {0x0087,0x00}, /* CRT/TV Ink/Cursor Green Color 0 Register */
- {0x0088,0x00}, /* CRT/TV Ink/Cursor Red Color 0 Register */
- {0x008A,0x1F}, /* CRT/TV Ink/Cursor Blue Color 1 Register */
- {0x008B,0x3F}, /* CRT/TV Ink/Cursor Green Color 1 Register */
- {0x008C,0x1F}, /* CRT/TV Ink/Cursor Red Color 1 Register */
- {0x008E,0x00}, /* CRT/TV Ink/Cursor FIFO Threshold Register */
- {0x0100,0x00}, /* BitBlt Control Register 0 */
- {0x0101,0x00}, /* BitBlt Control Register 1 */
- {0x0102,0x00}, /* BitBlt ROP Code/Color Expansion Register */
- {0x0103,0x00}, /* BitBlt Operation Register */
- {0x0104,0x00}, /* BitBlt Source Start Address Register 0 */
- {0x0105,0x00}, /* BitBlt Source Start Address Register 1 */
- {0x0106,0x00}, /* BitBlt Source Start Address Register 2 */
- {0x0108,0x00}, /* BitBlt Destination Start Address Register 0 */
- {0x0109,0x00}, /* BitBlt Destination Start Address Register 1 */
- {0x010A,0x00}, /* BitBlt Destination Start Address Register 2 */
- {0x010C,0x00}, /* BitBlt Memory Address Offset Register 0 */
- {0x010D,0x00}, /* BitBlt Memory Address Offset Register 1 */
- {0x0110,0x00}, /* BitBlt Width Register 0 */
- {0x0111,0x00}, /* BitBlt Width Register 1 */
- {0x0112,0x00}, /* BitBlt Height Register 0 */
- {0x0113,0x00}, /* BitBlt Height Register 1 */
- {0x0114,0x00}, /* BitBlt Background Color Register 0 */
- {0x0115,0x00}, /* BitBlt Background Color Register 1 */
- {0x0118,0x00}, /* BitBlt Foreground Color Register 0 */
- {0x0119,0x00}, /* BitBlt Foreground Color Register 1 */
- {0x01E0,0x00}, /* Look-Up Table Mode Register */
- {0x01E2,0x00}, /* Look-Up Table Address Register */
- {0x01F0,0x10}, /* Power Save Configuration Register */
- {0x01F1,0x00}, /* Power Save Status Register */
- {0x01F4,0x00}, /* CPU-to-Memory Access Watchdog Timer Register */
- {0x01FC,0x01}, /* Display Mode Register */
-};
diff --git a/board/esd/common/s1d13806_640_480_8bpp.h b/board/esd/common/s1d13806_640_480_8bpp.h
deleted file mode 100644
index c1f5b2bb77..0000000000
--- a/board/esd/common/s1d13806_640_480_8bpp.h
+++ /dev/null
@@ -1,125 +0,0 @@
-/*
- *
- * File generated by S1D13806CFG.EXE
- *
- * Copyright (c) 2000,2001 Epson Research and Development, Inc.
- * All rights reserved.
- *
- * PLEASE NOTE: If you FTP this file to a non-Windows platform, make
- * sure you transfer this file using ASCII, not BINARY mode.
- *
- * Panel: (active) 640x480 59Hz TFT Single 18-bit (PCLK=CLKI2=25.000MHz)
- * Memory: Embedded SDRAM (MCLK=CLKI=49.152MHz) (BUSCLK=33.333MHz)
- *
- */
-
-static S1D_REGS regs_13806_640_320_16bpp[] =
-{
- {0x0001,0x00}, /* Miscellaneous Register */
- {0x01FC,0x00}, /* Display Mode Register */
- {0x0004,0x18}, /* General IO Pins Configuration Register 0 */
- {0x0005,0x00}, /* General IO Pins Configuration Register 1 */
- {0x0008,0x18}, /* General IO Pins Control Register 0 */
- {0x0009,0x00}, /* General IO Pins Control Register 1 */
- {0x0010,0x00}, /* Memory Clock Configuration Register */
- {0x0014,0x02}, /* LCD Pixel Clock Configuration Register */
- {0x0018,0x02}, /* CRT/TV Pixel Clock Configuration Register */
- {0x001C,0x02}, /* MediaPlug Clock Configuration Register */
- {0x001E,0x01}, /* CPU To Memory Wait State Select Register */
- {0x0021,0x03}, /* DRAM Refresh Rate Register */
- {0x002A,0x00}, /* DRAM Timings Control Register 0 */
- {0x002B,0x01}, /* DRAM Timings Control Register 1 */
- {0x0020,0x80}, /* Memory Configuration Register */
- {0x0030,0x25}, /* Panel Type Register */
- {0x0031,0x00}, /* MOD Rate Register */
- {0x0032,0x4F}, /* LCD Horizontal Display Width Register */
- {0x0034,0x13}, /* LCD Horizontal Non-Display Period Register */
- {0x0035,0x00}, /* TFT FPLINE Start Position Register */
- {0x0036,0x0B}, /* TFT FPLINE Pulse Width Register */
- {0x0038,0xDF}, /* LCD Vertical Display Height Register 0 */
- {0x0039,0x01}, /* LCD Vertical Display Height Register 1 */
- {0x003A,0x24}, /* LCD Vertical Non-Display Period Register */
- {0x003B,0x00}, /* TFT FPFRAME Start Position Register */
- {0x003C,0x01}, /* TFT FPFRAME Pulse Width Register */
- {0x0040,0x03}, /* LCD Display Mode Register (8bpp) */
- {0x0041,0x00}, /* LCD Miscellaneous Register */
- {0x0042,0x00}, /* LCD Display Start Address Register 0 */
- {0x0043,0x00}, /* LCD Display Start Address Register 1 */
- {0x0044,0x00}, /* LCD Display Start Address Register 2 */
- {0x0046,0x80}, /* LCD Memory Address Offset Register 0 */
- {0x0047,0x02}, /* LCD Memory Address Offset Register 1 */
- {0x0048,0x00}, /* LCD Pixel Panning Register */
- {0x004A,0x00}, /* LCD Display FIFO High Threshold Control Register */
- {0x004B,0x00}, /* LCD Display FIFO Low Threshold Control Register */
- {0x0050,0x4F}, /* CRT/TV Horizontal Display Width Register */
- {0x0052,0x13}, /* CRT/TV Horizontal Non-Display Period Register */
- {0x0053,0x01}, /* CRT/TV HRTC Start Position Register */
- {0x0054,0x0B}, /* CRT/TV HRTC Pulse Width Register */
- {0x0056,0xDF}, /* CRT/TV Vertical Display Height Register 0 */
- {0x0057,0x01}, /* CRT/TV Vertical Display Height Register 1 */
- {0x0058,0x2B}, /* CRT/TV Vertical Non-Display Period Register */
- {0x0059,0x09}, /* CRT/TV VRTC Start Position Register */
- {0x005A,0x01}, /* CRT/TV VRTC Pulse Width Register */
- {0x005B,0x10}, /* TV Output Control Register */
- {0x0060,0x05}, /* CRT/TV Display Mode Register */
- {0x0062,0x00}, /* CRT/TV Display Start Address Register 0 */
- {0x0063,0x00}, /* CRT/TV Display Start Address Register 1 */
- {0x0064,0x00}, /* CRT/TV Display Start Address Register 2 */
- {0x0066,0x80}, /* CRT/TV Memory Address Offset Register 0 */
- {0x0067,0x02}, /* CRT/TV Memory Address Offset Register 1 */
- {0x0068,0x00}, /* CRT/TV Pixel Panning Register */
- {0x006A,0x00}, /* CRT/TV Display FIFO High Threshold Control Register */
- {0x006B,0x00}, /* CRT/TV Display FIFO Low Threshold Control Register */
- {0x0070,0x00}, /* LCD Ink/Cursor Control Register */
- {0x0071,0x01}, /* LCD Ink/Cursor Start Address Register */
- {0x0072,0x00}, /* LCD Cursor X Position Register 0 */
- {0x0073,0x00}, /* LCD Cursor X Position Register 1 */
- {0x0074,0x00}, /* LCD Cursor Y Position Register 0 */
- {0x0075,0x00}, /* LCD Cursor Y Position Register 1 */
- {0x0076,0x00}, /* LCD Ink/Cursor Blue Color 0 Register */
- {0x0077,0x00}, /* LCD Ink/Cursor Green Color 0 Register */
- {0x0078,0x00}, /* LCD Ink/Cursor Red Color 0 Register */
- {0x007A,0x1F}, /* LCD Ink/Cursor Blue Color 1 Register */
- {0x007B,0x3F}, /* LCD Ink/Cursor Green Color 1 Register */
- {0x007C,0x1F}, /* LCD Ink/Cursor Red Color 1 Register */
- {0x007E,0x00}, /* LCD Ink/Cursor FIFO Threshold Register */
- {0x0080,0x00}, /* CRT/TV Ink/Cursor Control Register */
- {0x0081,0x01}, /* CRT/TV Ink/Cursor Start Address Register */
- {0x0082,0x00}, /* CRT/TV Cursor X Position Register 0 */
- {0x0083,0x00}, /* CRT/TV Cursor X Position Register 1 */
- {0x0084,0x00}, /* CRT/TV Cursor Y Position Register 0 */
- {0x0085,0x00}, /* CRT/TV Cursor Y Position Register 1 */
- {0x0086,0x00}, /* CRT/TV Ink/Cursor Blue Color 0 Register */
- {0x0087,0x00}, /* CRT/TV Ink/Cursor Green Color 0 Register */
- {0x0088,0x00}, /* CRT/TV Ink/Cursor Red Color 0 Register */
- {0x008A,0x1F}, /* CRT/TV Ink/Cursor Blue Color 1 Register */
- {0x008B,0x3F}, /* CRT/TV Ink/Cursor Green Color 1 Register */
- {0x008C,0x1F}, /* CRT/TV Ink/Cursor Red Color 1 Register */
- {0x008E,0x00}, /* CRT/TV Ink/Cursor FIFO Threshold Register */
- {0x0100,0x00}, /* BitBlt Control Register 0 */
- {0x0101,0x00}, /* BitBlt Control Register 1 */
- {0x0102,0x00}, /* BitBlt ROP Code/Color Expansion Register */
- {0x0103,0x00}, /* BitBlt Operation Register */
- {0x0104,0x00}, /* BitBlt Source Start Address Register 0 */
- {0x0105,0x00}, /* BitBlt Source Start Address Register 1 */
- {0x0106,0x00}, /* BitBlt Source Start Address Register 2 */
- {0x0108,0x00}, /* BitBlt Destination Start Address Register 0 */
- {0x0109,0x00}, /* BitBlt Destination Start Address Register 1 */
- {0x010A,0x00}, /* BitBlt Destination Start Address Register 2 */
- {0x010C,0x00}, /* BitBlt Memory Address Offset Register 0 */
- {0x010D,0x00}, /* BitBlt Memory Address Offset Register 1 */
- {0x0110,0x00}, /* BitBlt Width Register 0 */
- {0x0111,0x00}, /* BitBlt Width Register 1 */
- {0x0112,0x00}, /* BitBlt Height Register 0 */
- {0x0113,0x00}, /* BitBlt Height Register 1 */
- {0x0114,0x00}, /* BitBlt Background Color Register 0 */
- {0x0115,0x00}, /* BitBlt Background Color Register 1 */
- {0x0118,0x00}, /* BitBlt Foreground Color Register 0 */
- {0x0119,0x00}, /* BitBlt Foreground Color Register 1 */
- {0x01E0,0x00}, /* Look-Up Table Mode Register */
- {0x01E2,0x00}, /* Look-Up Table Address Register */
- {0x01F0,0x10}, /* Power Save Configuration Register */
- {0x01F1,0x00}, /* Power Save Status Register */
- {0x01F4,0x00}, /* CPU-to-Memory Access Watchdog Timer Register */
- {0x01FC,0x01}, /* Display Mode Register */
-};
diff --git a/board/esd/common/xilinx_jtag/lenval.c b/board/esd/common/xilinx_jtag/lenval.c
deleted file mode 100644
index 7316266a52..0000000000
--- a/board/esd/common/xilinx_jtag/lenval.c
+++ /dev/null
@@ -1,217 +0,0 @@
-/*
- * (C) Copyright 2003
- * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*******************************************************/
-/* file: lenval.c */
-/* abstract: This file contains routines for using */
-/* the lenVal data structure. */
-/*******************************************************/
-
-#include <common.h>
-#include <asm/processor.h>
-
-#include "lenval.h"
-#include "ports.h"
-
-
-/*****************************************************************************
- * Function: value
- * Description: Extract the long value from the lenval array.
- * Parameters: plvValue - ptr to lenval.
- * Returns: long - the extracted value.
- *****************************************************************************/
-long value( lenVal* plvValue )
-{
- long lValue; /* result to hold the accumulated result */
- short sIndex;
-
- lValue = 0;
- for ( sIndex = 0; sIndex < plvValue->len ; ++sIndex )
- {
- lValue <<= 8; /* shift the accumulated result */
- lValue |= plvValue->val[ sIndex]; /* get the last byte first */
- }
-
- return( lValue );
-}
-
-/*****************************************************************************
- * Function: initLenVal
- * Description: Initialize the lenval array with the given value.
- * Assumes lValue is less than 256.
- * Parameters: plv - ptr to lenval.
- * lValue - the value to set.
- * Returns: void.
- *****************************************************************************/
-void initLenVal( lenVal* plv,
- long lValue )
-{
- plv->len = 1;
- plv->val[0] = (unsigned char)lValue;
-}
-
-/*****************************************************************************
- * Function: EqualLenVal
- * Description: Compare two lenval arrays with an optional mask.
- * Parameters: plvTdoExpected - ptr to lenval #1.
- * plvTdoCaptured - ptr to lenval #2.
- * plvTdoMask - optional ptr to mask (=0 if no mask).
- * Returns: short - 0 = mismatch; 1 = equal.
- *****************************************************************************/
-short EqualLenVal( lenVal* plvTdoExpected,
- lenVal* plvTdoCaptured,
- lenVal* plvTdoMask )
-{
- short sEqual;
- short sIndex;
- unsigned char ucByteVal1;
- unsigned char ucByteVal2;
- unsigned char ucByteMask;
-
- sEqual = 1;
- sIndex = plvTdoExpected->len;
-
- while ( sEqual && sIndex-- )
- {
- ucByteVal1 = plvTdoExpected->val[ sIndex ];
- ucByteVal2 = plvTdoCaptured->val[ sIndex ];
- if ( plvTdoMask )
- {
- ucByteMask = plvTdoMask->val[ sIndex ];
- ucByteVal1 &= ucByteMask;
- ucByteVal2 &= ucByteMask;
- }
- if ( ucByteVal1 != ucByteVal2 )
- {
- sEqual = 0;
- }
- }
-
- return( sEqual );
-}
-
-
-/*****************************************************************************
- * Function: RetBit
- * Description: return the (byte, bit) of lv (reading from left to right).
- * Parameters: plv - ptr to lenval.
- * iByte - the byte to get the bit from.
- * iBit - the bit number (0=msb)
- * Returns: short - the bit value.
- *****************************************************************************/
-short RetBit( lenVal* plv,
- int iByte,
- int iBit )
-{
- /* assert( ( iByte >= 0 ) && ( iByte < plv->len ) ); */
- /* assert( ( iBit >= 0 ) && ( iBit < 8 ) ); */
- return( (short)( ( plv->val[ iByte ] >> ( 7 - iBit ) ) & 0x1 ) );
-}
-
-/*****************************************************************************
- * Function: SetBit
- * Description: set the (byte, bit) of lv equal to val
- * Example: SetBit("00000000",byte, 1) equals "01000000".
- * Parameters: plv - ptr to lenval.
- * iByte - the byte to get the bit from.
- * iBit - the bit number (0=msb).
- * sVal - the bit value to set.
- * Returns: void.
- *****************************************************************************/
-void SetBit( lenVal* plv,
- int iByte,
- int iBit,
- short sVal )
-{
- unsigned char ucByteVal;
- unsigned char ucBitMask;
-
- ucBitMask = (unsigned char)(1 << ( 7 - iBit ));
- ucByteVal = (unsigned char)(plv->val[ iByte ] & (~ucBitMask));
-
- if ( sVal )
- {
- ucByteVal |= ucBitMask;
- }
- plv->val[ iByte ] = ucByteVal;
-}
-
-/*****************************************************************************
- * Function: AddVal
- * Description: add val1 to val2 and store in resVal;
- * assumes val1 and val2 are of equal length.
- * Parameters: plvResVal - ptr to result.
- * plvVal1 - ptr of addendum.
- * plvVal2 - ptr of addendum.
- * Returns: void.
- *****************************************************************************/
-void addVal( lenVal* plvResVal,
- lenVal* plvVal1,
- lenVal* plvVal2 )
-{
- unsigned char ucCarry;
- unsigned short usSum;
- unsigned short usVal1;
- unsigned short usVal2;
- short sIndex;
-
- plvResVal->len = plvVal1->len; /* set up length of result */
-
- /* start at least significant bit and add bytes */
- ucCarry = 0;
- sIndex = plvVal1->len;
- while ( sIndex-- )
- {
- usVal1 = plvVal1->val[ sIndex ]; /* i'th byte of val1 */
- usVal2 = plvVal2->val[ sIndex ]; /* i'th byte of val2 */
-
- /* add the two bytes plus carry from previous addition */
- usSum = (unsigned short)( usVal1 + usVal2 + ucCarry );
-
- /* set up carry for next byte */
- ucCarry = (unsigned char)( ( usSum > 255 ) ? 1 : 0 );
-
- /* set the i'th byte of the result */
- plvResVal->val[ sIndex ] = (unsigned char)usSum;
- }
-}
-
-/*****************************************************************************
- * Function: readVal
- * Description: read from XSVF numBytes bytes of data into x.
- * Parameters: plv - ptr to lenval in which to put the bytes read.
- * sNumBytes - the number of bytes to read.
- * Returns: void.
- *****************************************************************************/
-void readVal( lenVal* plv,
- short sNumBytes )
-{
- unsigned char* pucVal;
-
- plv->len = sNumBytes; /* set the length of the lenVal */
- for ( pucVal = plv->val; sNumBytes; --sNumBytes, ++pucVal )
- {
- /* read a byte of data into the lenVal */
- readByte( pucVal );
- }
-}
diff --git a/board/esd/common/xilinx_jtag/lenval.h b/board/esd/common/xilinx_jtag/lenval.h
deleted file mode 100644
index 6bec4ea5aa..0000000000
--- a/board/esd/common/xilinx_jtag/lenval.h
+++ /dev/null
@@ -1,79 +0,0 @@
-/*
- * (C) Copyright 2003
- * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*******************************************************/
-/* file: lenval.h */
-/* abstract: This file contains a description of the */
-/* data structure "lenval". */
-/*******************************************************/
-
-#ifndef lenval_dot_h
-#define lenval_dot_h
-
-/* the lenVal structure is a byte oriented type used to store an */
-/* arbitrary length binary value. As an example, the hex value */
-/* 0x0e3d is represented as a lenVal with len=2 (since 2 bytes */
-/* and val[0]=0e and val[1]=3d. val[2-MAX_LEN] are undefined */
-
-/* maximum length (in bytes) of value to read in */
-/* this needs to be at least 4, and longer than the */
-/* length of the longest SDR instruction. If there is, */
-/* only 1 device in the chain, MAX_LEN must be at least */
-/* ceil(27/8) == 4. For 6 devices in a chain, MAX_LEN */
-/* must be 5, for 14 devices MAX_LEN must be 6, for 20 */
-/* devices MAX_LEN must be 7, etc.. */
-/* You can safely set MAX_LEN to a smaller number if you*/
-/* know how many devices will be in your chain. */
-#define MAX_LEN 7000
-
-
-typedef struct var_len_byte
-{
- short len; /* number of chars in this value */
- unsigned char val[MAX_LEN+1]; /* bytes of data */
-} lenVal;
-
-
-/* return the long representation of a lenVal */
-extern long value(lenVal *x);
-
-/* set lenVal equal to value */
-extern void initLenVal(lenVal *x, long value);
-
-/* check if expected equals actual (taking the mask into account) */
-extern short EqualLenVal(lenVal *expected, lenVal *actual, lenVal *mask);
-
-/* add val1+val2 and put the result in resVal */
-extern void addVal(lenVal *resVal, lenVal *val1, lenVal *val2);
-
-/* return the (byte, bit) of lv (reading from left to right) */
-extern short RetBit(lenVal *lv, int byte, int bit);
-
-/* set the (byte, bit) of lv equal to val (e.g. SetBit("00000000",byte, 1)
- equals "01000000" */
-extern void SetBit(lenVal *lv, int byte, int bit, short val);
-
-/* read from XSVF numBytes bytes of data into x */
-extern void readVal(lenVal *x, short numBytes);
-
-#endif
diff --git a/board/esd/common/xilinx_jtag/micro.c b/board/esd/common/xilinx_jtag/micro.c
deleted file mode 100644
index 318f229feb..0000000000
--- a/board/esd/common/xilinx_jtag/micro.c
+++ /dev/null
@@ -1,1864 +0,0 @@
-/*
- * (C) Copyright 2003
- * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*****************************************************************************
- * file: micro.c
- * abstract: This file contains the function, xsvfExecute(),
- * call for interpreting the XSVF commands.
- * Usage: Call xsvfExecute() to process XSVF data.
- * The XSVF data is retrieved by readByte() in ports.c
- * Remove the main function if you already have one.
- * Options: XSVF_SUPPORT_COMPRESSION
- * This define supports the XC9500/XL compression scheme.
- * This define adds support for XSDRINC and XSETSDRMASKS.
- * XSVF_SUPPORT_ERRORCODES
- * This define causes the xsvfExecute function to return
- * an error code for specific errors. See error codes below.
- * If this is not defined, the return value defaults to the
- * legacy values for backward compatibility:
- * 1 = success; 0 = failure.
- * Debugging: DEBUG_MODE (Legacy name)
- * Define DEBUG_MODE to compile with debugging features.
- * Both micro.c and ports.c must be compiled with the DEBUG_MODE
- * defined to enable the standalone main implementation in
- * micro.c that reads XSVF from a file.
- * History: v2.00 - Original XSVF implementation.
- * v4.04 - Added delay at end of XSIR for XC18v00 support.
- * Added new commands for CoolRunner support:
- * XSTATE, XENDIR, XENDDR
- * v4.05 - Cleanup micro.c but leave ports.c intact.
- * v4.06 - Fix xsvfGotoTapState for retry transition.
- * v4.07 - Update example waitTime implementations for
- * compatibility with Virtex-II.
- * v4.10 - Add new XSIR2 command that supports a 2-byte
- * IR-length parameter for IR shifts > 255 bits.
- * v4.11 - No change. Update version to match SVF2XSVF xlator.
- * v4.14 - Added XCOMMENT.
- * v5.00 - Improve XSTATE support.
- * Added XWAIT.
- *****************************************************************************/
-
-#include <common.h>
-#include <command.h>
-#include <asm/processor.h>
-
-#include "micro.h"
-#include "lenval.h"
-#include "ports.h"
-
-
-extern const unsigned char fpgadata[];
-extern int filesize;
-
-
-/*============================================================================
- * XSVF #define
- ============================================================================*/
-
-#define XSVF_VERSION "5.00"
-
-/*****************************************************************************
- * Define: XSVF_SUPPORT_COMPRESSION
- * Description: Define this to support the XC9500/XL XSVF data compression
- * scheme.
- * Code size can be reduced by NOT supporting this feature.
- * However, you must use the -nc (no compress) option when
- * translating SVF to XSVF using the SVF2XSVF translator.
- * Corresponding, uncompressed XSVF may be larger.
- *****************************************************************************/
-#ifndef XSVF_SUPPORT_COMPRESSION
-#define XSVF_SUPPORT_COMPRESSION 1
-#endif
-
-/*****************************************************************************
- * Define: XSVF_SUPPORT_ERRORCODES
- * Description: Define this to support the new XSVF error codes.
- * (The original XSVF player just returned 1 for success and
- * 0 for an unspecified failure.)
- *****************************************************************************/
-#ifndef XSVF_SUPPORT_ERRORCODES
-#define XSVF_SUPPORT_ERRORCODES 1
-#endif
-
-#ifdef XSVF_SUPPORT_ERRORCODES
-#define XSVF_ERRORCODE(errorCode) errorCode
-#else /* Use legacy error code */
-#define XSVF_ERRORCODE(errorCode) ((errorCode==XSVF_ERROR_NONE)?1:0)
-#endif /* XSVF_SUPPORT_ERRORCODES */
-
-
-/*============================================================================
- * DEBUG_MODE #define
- ============================================================================*/
-#define DEBUG_MODE
-
-#ifdef DEBUG_MODE
-#define XSVFDBG_PRINTF(iDebugLevel,pzFormat) \
- { if ( xsvf_iDebugLevel >= iDebugLevel ) \
- printf( pzFormat ); }
-#define XSVFDBG_PRINTF1(iDebugLevel,pzFormat,arg1) \
- { if ( xsvf_iDebugLevel >= iDebugLevel ) \
- printf( pzFormat, arg1 ); }
-#define XSVFDBG_PRINTF2(iDebugLevel,pzFormat,arg1,arg2) \
- { if ( xsvf_iDebugLevel >= iDebugLevel ) \
- printf( pzFormat, arg1, arg2 ); }
-#define XSVFDBG_PRINTF3(iDebugLevel,pzFormat,arg1,arg2,arg3) \
- { if ( xsvf_iDebugLevel >= iDebugLevel ) \
- printf( pzFormat, arg1, arg2, arg3 ); }
-#define XSVFDBG_PRINTLENVAL(iDebugLevel,plenVal) \
- { if ( xsvf_iDebugLevel >= iDebugLevel ) \
- xsvfPrintLenVal(plenVal); }
-#else /* !DEBUG_MODE */
-#define XSVFDBG_PRINTF(iDebugLevel,pzFormat)
-#define XSVFDBG_PRINTF1(iDebugLevel,pzFormat,arg1)
-#define XSVFDBG_PRINTF2(iDebugLevel,pzFormat,arg1,arg2)
-#define XSVFDBG_PRINTF3(iDebugLevel,pzFormat,arg1,arg2,arg3)
-#define XSVFDBG_PRINTLENVAL(iDebugLevel,plenVal)
-#endif /* DEBUG_MODE */
-
-
-/*============================================================================
- * XSVF Type Declarations
- ============================================================================*/
-
-/*****************************************************************************
- * Struct: SXsvfInfo
- * Description: This structure contains all of the data used during the
- * execution of the XSVF. Some data is persistent, predefined
- * information (e.g. lRunTestTime). The bulk of this struct's
- * size is due to the lenVal structs (defined in lenval.h)
- * which contain buffers for the active shift data. The MAX_LEN
- * #define in lenval.h defines the size of these buffers.
- * These buffers must be large enough to store the longest
- * shift data in your XSVF file. For example:
- * MAX_LEN >= ( longest_shift_data_in_bits / 8 )
- * Because the lenVal struct dominates the space usage of this
- * struct, the rough size of this struct is:
- * sizeof( SXsvfInfo ) ~= MAX_LEN * 7 (number of lenVals)
- * xsvfInitialize() contains initialization code for the data
- * in this struct.
- * xsvfCleanup() contains cleanup code for the data in this
- * struct.
- *****************************************************************************/
-typedef struct tagSXsvfInfo
-{
- /* XSVF status information */
- unsigned char ucComplete; /* 0 = running; 1 = complete */
- unsigned char ucCommand; /* Current XSVF command byte */
- long lCommandCount; /* Number of commands processed */
- int iErrorCode; /* An error code. 0 = no error. */
-
- /* TAP state/sequencing information */
- unsigned char ucTapState; /* Current TAP state */
- unsigned char ucEndIR; /* ENDIR TAP state (See SVF) */
- unsigned char ucEndDR; /* ENDDR TAP state (See SVF) */
-
- /* RUNTEST information */
- unsigned char ucMaxRepeat; /* Max repeat loops (for xc9500/xl) */
- long lRunTestTime; /* Pre-specified RUNTEST time (usec) */
-
- /* Shift Data Info and Buffers */
- long lShiftLengthBits; /* Len. current shift data in bits */
- short sShiftLengthBytes; /* Len. current shift data in bytes */
-
- lenVal lvTdi; /* Current TDI shift data */
- lenVal lvTdoExpected; /* Expected TDO shift data */
- lenVal lvTdoCaptured; /* Captured TDO shift data */
- lenVal lvTdoMask; /* TDO mask: 0=dontcare; 1=compare */
-
-#ifdef XSVF_SUPPORT_COMPRESSION
- /* XSDRINC Data Buffers */
- lenVal lvAddressMask; /* Address mask for XSDRINC */
- lenVal lvDataMask; /* Data mask for XSDRINC */
- lenVal lvNextData; /* Next data for XSDRINC */
-#endif /* XSVF_SUPPORT_COMPRESSION */
-} SXsvfInfo;
-
-/* Declare pointer to functions that perform XSVF commands */
-typedef int (*TXsvfDoCmdFuncPtr)( SXsvfInfo* );
-
-/*============================================================================
- * XSVF Command Bytes
- ============================================================================*/
-
-/* encodings of xsvf instructions */
-#define XCOMPLETE 0
-#define XTDOMASK 1
-#define XSIR 2
-#define XSDR 3
-#define XRUNTEST 4
-/* Reserved 5 */
-/* Reserved 6 */
-#define XREPEAT 7
-#define XSDRSIZE 8
-#define XSDRTDO 9
-#define XSETSDRMASKS 10
-#define XSDRINC 11
-#define XSDRB 12
-#define XSDRC 13
-#define XSDRE 14
-#define XSDRTDOB 15
-#define XSDRTDOC 16
-#define XSDRTDOE 17
-#define XSTATE 18 /* 4.00 */
-#define XENDIR 19 /* 4.04 */
-#define XENDDR 20 /* 4.04 */
-#define XSIR2 21 /* 4.10 */
-#define XCOMMENT 22 /* 4.14 */
-#define XWAIT 23 /* 5.00 */
-/* Insert new commands here */
-/* and add corresponding xsvfDoCmd function to xsvf_pfDoCmd below. */
-#define XLASTCMD 24 /* Last command marker */
-
-
-/*============================================================================
- * XSVF Command Parameter Values
- ============================================================================*/
-
-#define XSTATE_RESET 0 /* 4.00 parameter for XSTATE */
-#define XSTATE_RUNTEST 1 /* 4.00 parameter for XSTATE */
-
-#define XENDXR_RUNTEST 0 /* 4.04 parameter for XENDIR/DR */
-#define XENDXR_PAUSE 1 /* 4.04 parameter for XENDIR/DR */
-
-/* TAP states */
-#define XTAPSTATE_RESET 0x00
-#define XTAPSTATE_RUNTEST 0x01 /* a.k.a. IDLE */
-#define XTAPSTATE_SELECTDR 0x02
-#define XTAPSTATE_CAPTUREDR 0x03
-#define XTAPSTATE_SHIFTDR 0x04
-#define XTAPSTATE_EXIT1DR 0x05
-#define XTAPSTATE_PAUSEDR 0x06
-#define XTAPSTATE_EXIT2DR 0x07
-#define XTAPSTATE_UPDATEDR 0x08
-#define XTAPSTATE_IRSTATES 0x09 /* All IR states begin here */
-#define XTAPSTATE_SELECTIR 0x09
-#define XTAPSTATE_CAPTUREIR 0x0A
-#define XTAPSTATE_SHIFTIR 0x0B
-#define XTAPSTATE_EXIT1IR 0x0C
-#define XTAPSTATE_PAUSEIR 0x0D
-#define XTAPSTATE_EXIT2IR 0x0E
-#define XTAPSTATE_UPDATEIR 0x0F
-
-/*============================================================================
- * XSVF Function Prototypes
- ============================================================================*/
-
-int xsvfDoIllegalCmd( SXsvfInfo* pXsvfInfo ); /* Illegal command function */
-int xsvfDoXCOMPLETE( SXsvfInfo* pXsvfInfo );
-int xsvfDoXTDOMASK( SXsvfInfo* pXsvfInfo );
-int xsvfDoXSIR( SXsvfInfo* pXsvfInfo );
-int xsvfDoXSIR2( SXsvfInfo* pXsvfInfo );
-int xsvfDoXSDR( SXsvfInfo* pXsvfInfo );
-int xsvfDoXRUNTEST( SXsvfInfo* pXsvfInfo );
-int xsvfDoXREPEAT( SXsvfInfo* pXsvfInfo );
-int xsvfDoXSDRSIZE( SXsvfInfo* pXsvfInfo );
-int xsvfDoXSDRTDO( SXsvfInfo* pXsvfInfo );
-int xsvfDoXSETSDRMASKS( SXsvfInfo* pXsvfInfo );
-int xsvfDoXSDRINC( SXsvfInfo* pXsvfInfo );
-int xsvfDoXSDRBCE( SXsvfInfo* pXsvfInfo );
-int xsvfDoXSDRTDOBCE( SXsvfInfo* pXsvfInfo );
-int xsvfDoXSTATE( SXsvfInfo* pXsvfInfo );
-int xsvfDoXENDXR( SXsvfInfo* pXsvfInfo );
-int xsvfDoXCOMMENT( SXsvfInfo* pXsvfInfo );
-int xsvfDoXWAIT( SXsvfInfo* pXsvfInfo );
-/* Insert new command functions here */
-
-/*============================================================================
- * XSVF Global Variables
- ============================================================================*/
-
-/* Array of XSVF command functions. Must follow command byte value order! */
-/* If your compiler cannot take this form, then convert to a switch statement*/
-TXsvfDoCmdFuncPtr xsvf_pfDoCmd[] =
-{
- xsvfDoXCOMPLETE, /* 0 */
- xsvfDoXTDOMASK, /* 1 */
- xsvfDoXSIR, /* 2 */
- xsvfDoXSDR, /* 3 */
- xsvfDoXRUNTEST, /* 4 */
- xsvfDoIllegalCmd, /* 5 */
- xsvfDoIllegalCmd, /* 6 */
- xsvfDoXREPEAT, /* 7 */
- xsvfDoXSDRSIZE, /* 8 */
- xsvfDoXSDRTDO, /* 9 */
-#ifdef XSVF_SUPPORT_COMPRESSION
- xsvfDoXSETSDRMASKS, /* 10 */
- xsvfDoXSDRINC, /* 11 */
-#else
- xsvfDoIllegalCmd, /* 10 */
- xsvfDoIllegalCmd, /* 11 */
-#endif /* XSVF_SUPPORT_COMPRESSION */
- xsvfDoXSDRBCE, /* 12 */
- xsvfDoXSDRBCE, /* 13 */
- xsvfDoXSDRBCE, /* 14 */
- xsvfDoXSDRTDOBCE, /* 15 */
- xsvfDoXSDRTDOBCE, /* 16 */
- xsvfDoXSDRTDOBCE, /* 17 */
- xsvfDoXSTATE, /* 18 */
- xsvfDoXENDXR, /* 19 */
- xsvfDoXENDXR, /* 20 */
- xsvfDoXSIR2, /* 21 */
- xsvfDoXCOMMENT, /* 22 */
- xsvfDoXWAIT /* 23 */
-/* Insert new command functions here */
-};
-
-#ifdef DEBUG_MODE
-char* xsvf_pzCommandName[] =
-{
- "XCOMPLETE",
- "XTDOMASK",
- "XSIR",
- "XSDR",
- "XRUNTEST",
- "Reserved5",
- "Reserved6",
- "XREPEAT",
- "XSDRSIZE",
- "XSDRTDO",
- "XSETSDRMASKS",
- "XSDRINC",
- "XSDRB",
- "XSDRC",
- "XSDRE",
- "XSDRTDOB",
- "XSDRTDOC",
- "XSDRTDOE",
- "XSTATE",
- "XENDIR",
- "XENDDR",
- "XSIR2",
- "XCOMMENT",
- "XWAIT"
-};
-
-char* xsvf_pzErrorName[] =
-{
- "No error",
- "ERROR: Unknown",
- "ERROR: TDO mismatch",
- "ERROR: TDO mismatch and exceeded max retries",
- "ERROR: Unsupported XSVF command",
- "ERROR: Illegal state specification",
- "ERROR: Data overflows allocated MAX_LEN buffer size"
-};
-
-char* xsvf_pzTapState[] =
-{
- "RESET", /* 0x00 */
- "RUNTEST/IDLE", /* 0x01 */
- "DRSELECT", /* 0x02 */
- "DRCAPTURE", /* 0x03 */
- "DRSHIFT", /* 0x04 */
- "DREXIT1", /* 0x05 */
- "DRPAUSE", /* 0x06 */
- "DREXIT2", /* 0x07 */
- "DRUPDATE", /* 0x08 */
- "IRSELECT", /* 0x09 */
- "IRCAPTURE", /* 0x0A */
- "IRSHIFT", /* 0x0B */
- "IREXIT1", /* 0x0C */
- "IRPAUSE", /* 0x0D */
- "IREXIT2", /* 0x0E */
- "IRUPDATE" /* 0x0F */
-};
-#endif /* DEBUG_MODE */
-
-/*#ifdef DEBUG_MODE */
-/* FILE* in; /XXX* Legacy DEBUG_MODE file pointer */
-int xsvf_iDebugLevel;
-/*#endif /XXX* DEBUG_MODE */
-
-/*============================================================================
- * Utility Functions
- ============================================================================*/
-
-/*****************************************************************************
- * Function: xsvfPrintLenVal
- * Description: Print the lenval value in hex.
- * Parameters: plv - ptr to lenval.
- * Returns: void.
- *****************************************************************************/
-#ifdef DEBUG_MODE
-void xsvfPrintLenVal( lenVal *plv )
-{
- int i;
-
- if ( plv )
- {
- printf( "0x" );
- for ( i = 0; i < plv->len; ++i )
- {
- printf( "%02x", ((unsigned int)(plv->val[ i ])) );
- }
- }
-}
-#endif /* DEBUG_MODE */
-
-
-/*****************************************************************************
- * Function: xsvfInfoInit
- * Description: Initialize the xsvfInfo data.
- * Parameters: pXsvfInfo - ptr to the XSVF info structure.
- * Returns: int - 0 = success; otherwise error.
- *****************************************************************************/
-int xsvfInfoInit( SXsvfInfo* pXsvfInfo )
-{
- XSVFDBG_PRINTF1( 4, " sizeof( SXsvfInfo ) = %d bytes\n",
- sizeof( SXsvfInfo ) );
-
- pXsvfInfo->ucComplete = 0;
- pXsvfInfo->ucCommand = XCOMPLETE;
- pXsvfInfo->lCommandCount = 0;
- pXsvfInfo->iErrorCode = XSVF_ERROR_NONE;
- pXsvfInfo->ucMaxRepeat = 0;
- pXsvfInfo->ucTapState = XTAPSTATE_RESET;
- pXsvfInfo->ucEndIR = XTAPSTATE_RUNTEST;
- pXsvfInfo->ucEndDR = XTAPSTATE_RUNTEST;
- pXsvfInfo->lShiftLengthBits = 0L;
- pXsvfInfo->sShiftLengthBytes= 0;
- pXsvfInfo->lRunTestTime = 0L;
-
- return( 0 );
-}
-
-/*****************************************************************************
- * Function: xsvfInfoCleanup
- * Description: Cleanup the xsvfInfo data.
- * Parameters: pXsvfInfo - ptr to the XSVF info structure.
- * Returns: void.
- *****************************************************************************/
-void xsvfInfoCleanup( SXsvfInfo* pXsvfInfo )
-{
-}
-
-/*****************************************************************************
- * Function: xsvfGetAsNumBytes
- * Description: Calculate the number of bytes the given number of bits
- * consumes.
- * Parameters: lNumBits - the number of bits.
- * Returns: short - the number of bytes to store the number of bits.
- *****************************************************************************/
-short xsvfGetAsNumBytes( long lNumBits )
-{
- return( (short)( ( lNumBits + 7L ) / 8L ) );
-}
-
-/*****************************************************************************
- * Function: xsvfTmsTransition
- * Description: Apply TMS and transition TAP controller by applying one TCK
- * cycle.
- * Parameters: sTms - new TMS value.
- * Returns: void.
- *****************************************************************************/
-void xsvfTmsTransition( short sTms )
-{
- setPort( TMS, sTms );
- setPort( TCK, 0 );
- setPort( TCK, 1 );
-}
-
-/*****************************************************************************
- * Function: xsvfGotoTapState
- * Description: From the current TAP state, go to the named TAP state.
- * A target state of RESET ALWAYS causes TMS reset sequence.
- * All SVF standard stable state paths are supported.
- * All state transitions are supported except for the following
- * which cause an XSVF_ERROR_ILLEGALSTATE:
- * - Target==DREXIT2; Start!=DRPAUSE
- * - Target==IREXIT2; Start!=IRPAUSE
- * Parameters: pucTapState - Current TAP state; returns final TAP state.
- * ucTargetState - New target TAP state.
- * Returns: int - 0 = success; otherwise error.
- *****************************************************************************/
-int xsvfGotoTapState( unsigned char* pucTapState,
- unsigned char ucTargetState )
-{
- int i;
- int iErrorCode;
-
- iErrorCode = XSVF_ERROR_NONE;
- if ( ucTargetState == XTAPSTATE_RESET )
- {
- /* If RESET, always perform TMS reset sequence to reset/sync TAPs */
- xsvfTmsTransition( 1 );
- for ( i = 0; i < 5; ++i )
- {
- setPort( TCK, 0 );
- setPort( TCK, 1 );
- }
- *pucTapState = XTAPSTATE_RESET;
- XSVFDBG_PRINTF( 3, " TMS Reset Sequence -> Test-Logic-Reset\n" );
- XSVFDBG_PRINTF1( 3, " TAP State = %s\n",
- xsvf_pzTapState[ *pucTapState ] );
- } else if ( ( ucTargetState != *pucTapState ) &&
- ( ( ( ucTargetState == XTAPSTATE_EXIT2DR ) && ( *pucTapState != XTAPSTATE_PAUSEDR ) ) ||
- ( ( ucTargetState == XTAPSTATE_EXIT2IR ) && ( *pucTapState != XTAPSTATE_PAUSEIR ) ) ) )
- {
- /* Trap illegal TAP state path specification */
- iErrorCode = XSVF_ERROR_ILLEGALSTATE;
- } else {
- if ( ucTargetState == *pucTapState )
- {
- /* Already in target state. Do nothing except when in DRPAUSE
- or in IRPAUSE to comply with SVF standard */
- if ( ucTargetState == XTAPSTATE_PAUSEDR )
- {
- xsvfTmsTransition( 1 );
- *pucTapState = XTAPSTATE_EXIT2DR;
- XSVFDBG_PRINTF1( 3, " TAP State = %s\n",
- xsvf_pzTapState[ *pucTapState ] );
- }
- else if ( ucTargetState == XTAPSTATE_PAUSEIR )
- {
- xsvfTmsTransition( 1 );
- *pucTapState = XTAPSTATE_EXIT2IR;
- XSVFDBG_PRINTF1( 3, " TAP State = %s\n",
- xsvf_pzTapState[ *pucTapState ] );
- }
- }
-
- /* Perform TAP state transitions to get to the target state */
- while ( ucTargetState != *pucTapState )
- {
- switch ( *pucTapState )
- {
- case XTAPSTATE_RESET:
- xsvfTmsTransition( 0 );
- *pucTapState = XTAPSTATE_RUNTEST;
- break;
- case XTAPSTATE_RUNTEST:
- xsvfTmsTransition( 1 );
- *pucTapState = XTAPSTATE_SELECTDR;
- break;
- case XTAPSTATE_SELECTDR:
- if ( ucTargetState >= XTAPSTATE_IRSTATES )
- {
- xsvfTmsTransition( 1 );
- *pucTapState = XTAPSTATE_SELECTIR;
- }
- else
- {
- xsvfTmsTransition( 0 );
- *pucTapState = XTAPSTATE_CAPTUREDR;
- }
- break;
- case XTAPSTATE_CAPTUREDR:
- if ( ucTargetState == XTAPSTATE_SHIFTDR )
- {
- xsvfTmsTransition( 0 );
- *pucTapState = XTAPSTATE_SHIFTDR;
- }
- else
- {
- xsvfTmsTransition( 1 );
- *pucTapState = XTAPSTATE_EXIT1DR;
- }
- break;
- case XTAPSTATE_SHIFTDR:
- xsvfTmsTransition( 1 );
- *pucTapState = XTAPSTATE_EXIT1DR;
- break;
- case XTAPSTATE_EXIT1DR:
- if ( ucTargetState == XTAPSTATE_PAUSEDR )
- {
- xsvfTmsTransition( 0 );
- *pucTapState = XTAPSTATE_PAUSEDR;
- }
- else
- {
- xsvfTmsTransition( 1 );
- *pucTapState = XTAPSTATE_UPDATEDR;
- }
- break;
- case XTAPSTATE_PAUSEDR:
- xsvfTmsTransition( 1 );
- *pucTapState = XTAPSTATE_EXIT2DR;
- break;
- case XTAPSTATE_EXIT2DR:
- if ( ucTargetState == XTAPSTATE_SHIFTDR )
- {
- xsvfTmsTransition( 0 );
- *pucTapState = XTAPSTATE_SHIFTDR;
- }
- else
- {
- xsvfTmsTransition( 1 );
- *pucTapState = XTAPSTATE_UPDATEDR;
- }
- break;
- case XTAPSTATE_UPDATEDR:
- if ( ucTargetState == XTAPSTATE_RUNTEST )
- {
- xsvfTmsTransition( 0 );
- *pucTapState = XTAPSTATE_RUNTEST;
- }
- else
- {
- xsvfTmsTransition( 1 );
- *pucTapState = XTAPSTATE_SELECTDR;
- }
- break;
- case XTAPSTATE_SELECTIR:
- xsvfTmsTransition( 0 );
- *pucTapState = XTAPSTATE_CAPTUREIR;
- break;
- case XTAPSTATE_CAPTUREIR:
- if ( ucTargetState == XTAPSTATE_SHIFTIR )
- {
- xsvfTmsTransition( 0 );
- *pucTapState = XTAPSTATE_SHIFTIR;
- }
- else
- {
- xsvfTmsTransition( 1 );
- *pucTapState = XTAPSTATE_EXIT1IR;
- }
- break;
- case XTAPSTATE_SHIFTIR:
- xsvfTmsTransition( 1 );
- *pucTapState = XTAPSTATE_EXIT1IR;
- break;
- case XTAPSTATE_EXIT1IR:
- if ( ucTargetState == XTAPSTATE_PAUSEIR )
- {
- xsvfTmsTransition( 0 );
- *pucTapState = XTAPSTATE_PAUSEIR;
- }
- else
- {
- xsvfTmsTransition( 1 );
- *pucTapState = XTAPSTATE_UPDATEIR;
- }
- break;
- case XTAPSTATE_PAUSEIR:
- xsvfTmsTransition( 1 );
- *pucTapState = XTAPSTATE_EXIT2IR;
- break;
- case XTAPSTATE_EXIT2IR:
- if ( ucTargetState == XTAPSTATE_SHIFTIR )
- {
- xsvfTmsTransition( 0 );
- *pucTapState = XTAPSTATE_SHIFTIR;
- }
- else
- {
- xsvfTmsTransition( 1 );
- *pucTapState = XTAPSTATE_UPDATEIR;
- }
- break;
- case XTAPSTATE_UPDATEIR:
- if ( ucTargetState == XTAPSTATE_RUNTEST )
- {
- xsvfTmsTransition( 0 );
- *pucTapState = XTAPSTATE_RUNTEST;
- }
- else
- {
- xsvfTmsTransition( 1 );
- *pucTapState = XTAPSTATE_SELECTDR;
- }
- break;
- default:
- iErrorCode = XSVF_ERROR_ILLEGALSTATE;
- *pucTapState = ucTargetState; /* Exit while loop */
- break;
- }
- XSVFDBG_PRINTF1( 3, " TAP State = %s\n",
- xsvf_pzTapState[ *pucTapState ] );
- }
- }
-
- return( iErrorCode );
-}
-
-/*****************************************************************************
- * Function: xsvfShiftOnly
- * Description: Assumes that starting TAP state is SHIFT-DR or SHIFT-IR.
- * Shift the given TDI data into the JTAG scan chain.
- * Optionally, save the TDO data shifted out of the scan chain.
- * Last shift cycle is special: capture last TDO, set last TDI,
- * but does not pulse TCK. Caller must pulse TCK and optionally
- * set TMS=1 to exit shift state.
- * Parameters: lNumBits - number of bits to shift.
- * plvTdi - ptr to lenval for TDI data.
- * plvTdoCaptured - ptr to lenval for storing captured TDO data.
- * iExitShift - 1=exit at end of shift; 0=stay in Shift-DR.
- * Returns: void.
- *****************************************************************************/
-void xsvfShiftOnly( long lNumBits,
- lenVal* plvTdi,
- lenVal* plvTdoCaptured,
- int iExitShift )
-{
- unsigned char* pucTdi;
- unsigned char* pucTdo;
- unsigned char ucTdiByte;
- unsigned char ucTdoByte;
- unsigned char ucTdoBit;
- int i;
-
- /* assert( ( ( lNumBits + 7 ) / 8 ) == plvTdi->len ); */
-
- /* Initialize TDO storage len == TDI len */
- pucTdo = 0;
- if ( plvTdoCaptured )
- {
- plvTdoCaptured->len = plvTdi->len;
- pucTdo = plvTdoCaptured->val + plvTdi->len;
- }
-
- /* Shift LSB first. val[N-1] == LSB. val[0] == MSB. */
- pucTdi = plvTdi->val + plvTdi->len;
- while ( lNumBits )
- {
- /* Process on a byte-basis */
- ucTdiByte = (*(--pucTdi));
- ucTdoByte = 0;
- for ( i = 0; ( lNumBits && ( i < 8 ) ); ++i )
- {
- --lNumBits;
- if ( iExitShift && !lNumBits )
- {
- /* Exit Shift-DR state */
- setPort( TMS, 1 );
- }
-
- /* Set the new TDI value */
- setPort( TDI, (short)(ucTdiByte & 1) );
- ucTdiByte >>= 1;
-
- /* Set TCK low */
- setPort( TCK, 0 );
-
- if ( pucTdo )
- {
- /* Save the TDO value */
- ucTdoBit = readTDOBit();
- ucTdoByte |= ( ucTdoBit << i );
- }
-
- /* Set TCK high */
- setPort( TCK, 1 );
- }
-
- /* Save the TDO byte value */
- if ( pucTdo )
- {
- (*(--pucTdo)) = ucTdoByte;
- }
- }
-}
-
-/*****************************************************************************
- * Function: xsvfShift
- * Description: Goes to the given starting TAP state.
- * Calls xsvfShiftOnly to shift in the given TDI data and
- * optionally capture the TDO data.
- * Compares the TDO captured data against the TDO expected
- * data.
- * If a data mismatch occurs, then executes the exception
- * handling loop upto ucMaxRepeat times.
- * Parameters: pucTapState - Ptr to current TAP state.
- * ucStartState - Starting shift state: Shift-DR or Shift-IR.
- * lNumBits - number of bits to shift.
- * plvTdi - ptr to lenval for TDI data.
- * plvTdoCaptured - ptr to lenval for storing TDO data.
- * plvTdoExpected - ptr to expected TDO data.
- * plvTdoMask - ptr to TDO mask.
- * ucEndState - state in which to end the shift.
- * lRunTestTime - amount of time to wait after the shift.
- * ucMaxRepeat - Maximum number of retries on TDO mismatch.
- * Returns: int - 0 = success; otherwise TDO mismatch.
- * Notes: XC9500XL-only Optimization:
- * Skip the waitTime() if plvTdoMask->val[0:plvTdoMask->len-1]
- * is NOT all zeros and sMatch==1.
- *****************************************************************************/
-int xsvfShift( unsigned char* pucTapState,
- unsigned char ucStartState,
- long lNumBits,
- lenVal* plvTdi,
- lenVal* plvTdoCaptured,
- lenVal* plvTdoExpected,
- lenVal* plvTdoMask,
- unsigned char ucEndState,
- long lRunTestTime,
- unsigned char ucMaxRepeat )
-{
- int iErrorCode;
- int iMismatch;
- unsigned char ucRepeat;
- int iExitShift;
-
- iErrorCode = XSVF_ERROR_NONE;
- iMismatch = 0;
- ucRepeat = 0;
- iExitShift = ( ucStartState != ucEndState );
-
- XSVFDBG_PRINTF1( 3, " Shift Length = %ld\n", lNumBits );
- XSVFDBG_PRINTF( 4, " TDI = ");
- XSVFDBG_PRINTLENVAL( 4, plvTdi );
- XSVFDBG_PRINTF( 4, "\n");
- XSVFDBG_PRINTF( 4, " TDO Expected = ");
- XSVFDBG_PRINTLENVAL( 4, plvTdoExpected );
- XSVFDBG_PRINTF( 4, "\n");
-
- if ( !lNumBits )
- {
- /* Compatibility with XSVF2.00: XSDR 0 = no shift, but wait in RTI */
- if ( lRunTestTime )
- {
- /* Wait for prespecified XRUNTEST time */
- xsvfGotoTapState( pucTapState, XTAPSTATE_RUNTEST );
- XSVFDBG_PRINTF1( 3, " Wait = %ld usec\n", lRunTestTime );
- waitTime( lRunTestTime );
- }
- }
- else
- {
- do
- {
- /* Goto Shift-DR or Shift-IR */
- xsvfGotoTapState( pucTapState, ucStartState );
-
- /* Shift TDI and capture TDO */
- xsvfShiftOnly( lNumBits, plvTdi, plvTdoCaptured, iExitShift );
-
- if ( plvTdoExpected )
- {
- /* Compare TDO data to expected TDO data */
- iMismatch = !EqualLenVal( plvTdoExpected,
- plvTdoCaptured,
- plvTdoMask );
- }
-
- if ( iExitShift )
- {
- /* Update TAP state: Shift->Exit */
- ++(*pucTapState);
- XSVFDBG_PRINTF1( 3, " TAP State = %s\n",
- xsvf_pzTapState[ *pucTapState ] );
-
- if ( iMismatch && lRunTestTime && ( ucRepeat < ucMaxRepeat ) )
- {
- XSVFDBG_PRINTF( 4, " TDO Expected = ");
- XSVFDBG_PRINTLENVAL( 4, plvTdoExpected );
- XSVFDBG_PRINTF( 4, "\n");
- XSVFDBG_PRINTF( 4, " TDO Captured = ");
- XSVFDBG_PRINTLENVAL( 4, plvTdoCaptured );
- XSVFDBG_PRINTF( 4, "\n");
- XSVFDBG_PRINTF( 4, " TDO Mask = ");
- XSVFDBG_PRINTLENVAL( 4, plvTdoMask );
- XSVFDBG_PRINTF( 4, "\n");
- XSVFDBG_PRINTF1( 3, " Retry #%d\n", ( ucRepeat + 1 ) );
- /* Do exception handling retry - ShiftDR only */
- xsvfGotoTapState( pucTapState, XTAPSTATE_PAUSEDR );
- /* Shift 1 extra bit */
- xsvfGotoTapState( pucTapState, XTAPSTATE_SHIFTDR );
- /* Increment RUNTEST time by an additional 25% */
- lRunTestTime += ( lRunTestTime >> 2 );
- }
- else
- {
- /* Do normal exit from Shift-XR */
- xsvfGotoTapState( pucTapState, ucEndState );
- }
-
- if ( lRunTestTime )
- {
- /* Wait for prespecified XRUNTEST time */
- xsvfGotoTapState( pucTapState, XTAPSTATE_RUNTEST );
- XSVFDBG_PRINTF1( 3, " Wait = %ld usec\n", lRunTestTime );
- waitTime( lRunTestTime );
- }
- }
- } while ( iMismatch && ( ucRepeat++ < ucMaxRepeat ) );
- }
-
- if ( iMismatch )
- {
- XSVFDBG_PRINTF( 1, " TDO Expected = ");
- XSVFDBG_PRINTLENVAL( 1, plvTdoExpected );
- XSVFDBG_PRINTF( 1, "\n");
- XSVFDBG_PRINTF( 1, " TDO Captured = ");
- XSVFDBG_PRINTLENVAL( 1, plvTdoCaptured );
- XSVFDBG_PRINTF( 1, "\n");
- XSVFDBG_PRINTF( 1, " TDO Mask = ");
- XSVFDBG_PRINTLENVAL( 1, plvTdoMask );
- XSVFDBG_PRINTF( 1, "\n");
- if ( ucMaxRepeat && ( ucRepeat > ucMaxRepeat ) )
- {
- iErrorCode = XSVF_ERROR_MAXRETRIES;
- }
- else
- {
- iErrorCode = XSVF_ERROR_TDOMISMATCH;
- }
- }
-
- return( iErrorCode );
-}
-
-/*****************************************************************************
- * Function: xsvfBasicXSDRTDO
- * Description: Get the XSDRTDO parameters and execute the XSDRTDO command.
- * This is the common function for all XSDRTDO commands.
- * Parameters: pucTapState - Current TAP state.
- * lShiftLengthBits - number of bits to shift.
- * sShiftLengthBytes - number of bytes to read.
- * plvTdi - ptr to lenval for TDI data.
- * lvTdoCaptured - ptr to lenval for storing TDO data.
- * iEndState - state in which to end the shift.
- * lRunTestTime - amount of time to wait after the shift.
- * ucMaxRepeat - maximum xc9500/xl retries.
- * Returns: int - 0 = success; otherwise TDO mismatch.
- *****************************************************************************/
-int xsvfBasicXSDRTDO( unsigned char* pucTapState,
- long lShiftLengthBits,
- short sShiftLengthBytes,
- lenVal* plvTdi,
- lenVal* plvTdoCaptured,
- lenVal* plvTdoExpected,
- lenVal* plvTdoMask,
- unsigned char ucEndState,
- long lRunTestTime,
- unsigned char ucMaxRepeat )
-{
- readVal( plvTdi, sShiftLengthBytes );
- if ( plvTdoExpected )
- {
- readVal( plvTdoExpected, sShiftLengthBytes );
- }
- return( xsvfShift( pucTapState, XTAPSTATE_SHIFTDR, lShiftLengthBits,
- plvTdi, plvTdoCaptured, plvTdoExpected, plvTdoMask,
- ucEndState, lRunTestTime, ucMaxRepeat ) );
-}
-
-/*****************************************************************************
- * Function: xsvfDoSDRMasking
- * Description: Update the data value with the next XSDRINC data and address.
- * Example: dataVal=0x01ff, nextData=0xab, addressMask=0x0100,
- * dataMask=0x00ff, should set dataVal to 0x02ab
- * Parameters: plvTdi - The current TDI value.
- * plvNextData - the next data value.
- * plvAddressMask - the address mask.
- * plvDataMask - the data mask.
- * Returns: void.
- *****************************************************************************/
-#ifdef XSVF_SUPPORT_COMPRESSION
-void xsvfDoSDRMasking( lenVal* plvTdi,
- lenVal* plvNextData,
- lenVal* plvAddressMask,
- lenVal* plvDataMask )
-{
- int i;
- unsigned char ucTdi;
- unsigned char ucTdiMask;
- unsigned char ucDataMask;
- unsigned char ucNextData;
- unsigned char ucNextMask;
- short sNextData;
-
- /* add the address Mask to dataVal and return as a new dataVal */
- addVal( plvTdi, plvTdi, plvAddressMask );
-
- ucNextData = 0;
- ucNextMask = 0;
- sNextData = plvNextData->len;
- for ( i = plvDataMask->len - 1; i >= 0; --i )
- {
- /* Go through data mask in reverse order looking for mask (1) bits */
- ucDataMask = plvDataMask->val[ i ];
- if ( ucDataMask )
- {
- /* Retrieve the corresponding TDI byte value */
- ucTdi = plvTdi->val[ i ];
-
- /* For each bit in the data mask byte, look for 1's */
- ucTdiMask = 1;
- while ( ucDataMask )
- {
- if ( ucDataMask & 1 )
- {
- if ( !ucNextMask )
- {
- /* Get the next data byte */
- ucNextData = plvNextData->val[ --sNextData ];
- ucNextMask = 1;
- }
-
- /* Set or clear the data bit according to the next data */
- if ( ucNextData & ucNextMask )
- {
- ucTdi |= ucTdiMask; /* Set bit */
- }
- else
- {
- ucTdi &= ( ~ucTdiMask ); /* Clear bit */
- }
-
- /* Update the next data */
- ucNextMask <<= 1;
- }
- ucTdiMask <<= 1;
- ucDataMask >>= 1;
- }
-
- /* Update the TDI value */
- plvTdi->val[ i ] = ucTdi;
- }
- }
-}
-#endif /* XSVF_SUPPORT_COMPRESSION */
-
-/*============================================================================
- * XSVF Command Functions (type = TXsvfDoCmdFuncPtr)
- * These functions update pXsvfInfo->iErrorCode only on an error.
- * Otherwise, the error code is left alone.
- * The function returns the error code from the function.
- ============================================================================*/
-
-/*****************************************************************************
- * Function: xsvfDoIllegalCmd
- * Description: Function place holder for illegal/unsupported commands.
- * Parameters: pXsvfInfo - XSVF information pointer.
- * Returns: int - 0 = success; non-zero = error.
- *****************************************************************************/
-int xsvfDoIllegalCmd( SXsvfInfo* pXsvfInfo )
-{
- XSVFDBG_PRINTF2( 0, "ERROR: Encountered unsupported command #%d (%s)\n",
- ((unsigned int)(pXsvfInfo->ucCommand)),
- ((pXsvfInfo->ucCommand < XLASTCMD)
- ? (xsvf_pzCommandName[pXsvfInfo->ucCommand])
- : "Unknown") );
- pXsvfInfo->iErrorCode = XSVF_ERROR_ILLEGALCMD;
- return( pXsvfInfo->iErrorCode );
-}
-
-/*****************************************************************************
- * Function: xsvfDoXCOMPLETE
- * Description: XCOMPLETE (no parameters)
- * Update complete status for XSVF player.
- * Parameters: pXsvfInfo - XSVF information pointer.
- * Returns: int - 0 = success; non-zero = error.
- *****************************************************************************/
-int xsvfDoXCOMPLETE( SXsvfInfo* pXsvfInfo )
-{
- pXsvfInfo->ucComplete = 1;
- return( XSVF_ERROR_NONE );
-}
-
-/*****************************************************************************
- * Function: xsvfDoXTDOMASK
- * Description: XTDOMASK <lenVal.TdoMask[XSDRSIZE]>
- * Prespecify the TDO compare mask.
- * Parameters: pXsvfInfo - XSVF information pointer.
- * Returns: int - 0 = success; non-zero = error.
- *****************************************************************************/
-int xsvfDoXTDOMASK( SXsvfInfo* pXsvfInfo )
-{
- readVal( &(pXsvfInfo->lvTdoMask), pXsvfInfo->sShiftLengthBytes );
- XSVFDBG_PRINTF( 4, " TDO Mask = ");
- XSVFDBG_PRINTLENVAL( 4, &(pXsvfInfo->lvTdoMask) );
- XSVFDBG_PRINTF( 4, "\n");
- return( XSVF_ERROR_NONE );
-}
-
-/*****************************************************************************
- * Function: xsvfDoXSIR
- * Description: XSIR <(byte)shiftlen> <lenVal.TDI[shiftlen]>
- * Get the instruction and shift the instruction into the TAP.
- * If prespecified XRUNTEST!=0, goto RUNTEST and wait after
- * the shift for XRUNTEST usec.
- * Parameters: pXsvfInfo - XSVF information pointer.
- * Returns: int - 0 = success; non-zero = error.
- *****************************************************************************/
-int xsvfDoXSIR( SXsvfInfo* pXsvfInfo )
-{
- unsigned char ucShiftIrBits;
- short sShiftIrBytes;
- int iErrorCode;
-
- /* Get the shift length and store */
- readByte( &ucShiftIrBits );
- sShiftIrBytes = xsvfGetAsNumBytes( ucShiftIrBits );
- XSVFDBG_PRINTF1( 3, " XSIR length = %d\n",
- ((unsigned int)ucShiftIrBits) );
-
- if ( sShiftIrBytes > MAX_LEN )
- {
- iErrorCode = XSVF_ERROR_DATAOVERFLOW;
- }
- else
- {
- /* Get and store instruction to shift in */
- readVal( &(pXsvfInfo->lvTdi), xsvfGetAsNumBytes( ucShiftIrBits ) );
-
- /* Shift the data */
- iErrorCode = xsvfShift( &(pXsvfInfo->ucTapState), XTAPSTATE_SHIFTIR,
- ucShiftIrBits, &(pXsvfInfo->lvTdi),
- /*plvTdoCaptured*/0, /*plvTdoExpected*/0,
- /*plvTdoMask*/0, pXsvfInfo->ucEndIR,
- pXsvfInfo->lRunTestTime, /*ucMaxRepeat*/0 );
- }
-
- if ( iErrorCode != XSVF_ERROR_NONE )
- {
- pXsvfInfo->iErrorCode = iErrorCode;
- }
- return( iErrorCode );
-}
-
-/*****************************************************************************
- * Function: xsvfDoXSIR2
- * Description: XSIR <(2-byte)shiftlen> <lenVal.TDI[shiftlen]>
- * Get the instruction and shift the instruction into the TAP.
- * If prespecified XRUNTEST!=0, goto RUNTEST and wait after
- * the shift for XRUNTEST usec.
- * Parameters: pXsvfInfo - XSVF information pointer.
- * Returns: int - 0 = success; non-zero = error.
- *****************************************************************************/
-int xsvfDoXSIR2( SXsvfInfo* pXsvfInfo )
-{
- long lShiftIrBits;
- short sShiftIrBytes;
- int iErrorCode;
-
- /* Get the shift length and store */
- readVal( &(pXsvfInfo->lvTdi), 2 );
- lShiftIrBits = value( &(pXsvfInfo->lvTdi) );
- sShiftIrBytes = xsvfGetAsNumBytes( lShiftIrBits );
- XSVFDBG_PRINTF1( 3, " XSIR2 length = %d\n", (int)lShiftIrBits);
-
- if ( sShiftIrBytes > MAX_LEN )
- {
- iErrorCode = XSVF_ERROR_DATAOVERFLOW;
- }
- else
- {
- /* Get and store instruction to shift in */
- readVal( &(pXsvfInfo->lvTdi), xsvfGetAsNumBytes( lShiftIrBits ) );
-
- /* Shift the data */
- iErrorCode = xsvfShift( &(pXsvfInfo->ucTapState), XTAPSTATE_SHIFTIR,
- lShiftIrBits, &(pXsvfInfo->lvTdi),
- /*plvTdoCaptured*/0, /*plvTdoExpected*/0,
- /*plvTdoMask*/0, pXsvfInfo->ucEndIR,
- pXsvfInfo->lRunTestTime, /*ucMaxRepeat*/0 );
- }
-
- if ( iErrorCode != XSVF_ERROR_NONE )
- {
- pXsvfInfo->iErrorCode = iErrorCode;
- }
- return( iErrorCode );
-}
-
-/*****************************************************************************
- * Function: xsvfDoXSDR
- * Description: XSDR <lenVal.TDI[XSDRSIZE]>
- * Shift the given TDI data into the JTAG scan chain.
- * Compare the captured TDO with the expected TDO from the
- * previous XSDRTDO command using the previously specified
- * XTDOMASK.
- * Parameters: pXsvfInfo - XSVF information pointer.
- * Returns: int - 0 = success; non-zero = error.
- *****************************************************************************/
-int xsvfDoXSDR( SXsvfInfo* pXsvfInfo )
-{
- int iErrorCode;
- readVal( &(pXsvfInfo->lvTdi), pXsvfInfo->sShiftLengthBytes );
- /* use TDOExpected from last XSDRTDO instruction */
- iErrorCode = xsvfShift( &(pXsvfInfo->ucTapState), XTAPSTATE_SHIFTDR,
- pXsvfInfo->lShiftLengthBits, &(pXsvfInfo->lvTdi),
- &(pXsvfInfo->lvTdoCaptured),
- &(pXsvfInfo->lvTdoExpected),
- &(pXsvfInfo->lvTdoMask), pXsvfInfo->ucEndDR,
- pXsvfInfo->lRunTestTime, pXsvfInfo->ucMaxRepeat );
- if ( iErrorCode != XSVF_ERROR_NONE )
- {
- pXsvfInfo->iErrorCode = iErrorCode;
- }
- return( iErrorCode );
-}
-
-/*****************************************************************************
- * Function: xsvfDoXRUNTEST
- * Description: XRUNTEST <uint32>
- * Prespecify the XRUNTEST wait time for shift operations.
- * Parameters: pXsvfInfo - XSVF information pointer.
- * Returns: int - 0 = success; non-zero = error.
- *****************************************************************************/
-int xsvfDoXRUNTEST( SXsvfInfo* pXsvfInfo )
-{
- readVal( &(pXsvfInfo->lvTdi), 4 );
- pXsvfInfo->lRunTestTime = value( &(pXsvfInfo->lvTdi) );
- XSVFDBG_PRINTF1( 3, " XRUNTEST = %ld\n", pXsvfInfo->lRunTestTime );
- return( XSVF_ERROR_NONE );
-}
-
-/*****************************************************************************
- * Function: xsvfDoXREPEAT
- * Description: XREPEAT <byte>
- * Prespecify the maximum number of XC9500/XL retries.
- * Parameters: pXsvfInfo - XSVF information pointer.
- * Returns: int - 0 = success; non-zero = error.
- *****************************************************************************/
-int xsvfDoXREPEAT( SXsvfInfo* pXsvfInfo )
-{
- readByte( &(pXsvfInfo->ucMaxRepeat) );
- XSVFDBG_PRINTF1( 3, " XREPEAT = %d\n",
- ((unsigned int)(pXsvfInfo->ucMaxRepeat)) );
- return( XSVF_ERROR_NONE );
-}
-
-/*****************************************************************************
- * Function: xsvfDoXSDRSIZE
- * Description: XSDRSIZE <uint32>
- * Prespecify the XRUNTEST wait time for shift operations.
- * Parameters: pXsvfInfo - XSVF information pointer.
- * Returns: int - 0 = success; non-zero = error.
- *****************************************************************************/
-int xsvfDoXSDRSIZE( SXsvfInfo* pXsvfInfo )
-{
- int iErrorCode;
- iErrorCode = XSVF_ERROR_NONE;
- readVal( &(pXsvfInfo->lvTdi), 4 );
- pXsvfInfo->lShiftLengthBits = value( &(pXsvfInfo->lvTdi) );
- pXsvfInfo->sShiftLengthBytes= xsvfGetAsNumBytes( pXsvfInfo->lShiftLengthBits );
- XSVFDBG_PRINTF1( 3, " XSDRSIZE = %ld\n", pXsvfInfo->lShiftLengthBits );
- if ( pXsvfInfo->sShiftLengthBytes > MAX_LEN )
- {
- iErrorCode = XSVF_ERROR_DATAOVERFLOW;
- pXsvfInfo->iErrorCode = iErrorCode;
- }
- return( iErrorCode );
-}
-
-/*****************************************************************************
- * Function: xsvfDoXSDRTDO
- * Description: XSDRTDO <lenVal.TDI[XSDRSIZE]> <lenVal.TDO[XSDRSIZE]>
- * Get the TDI and expected TDO values. Then, shift.
- * Compare the expected TDO with the captured TDO using the
- * prespecified XTDOMASK.
- * Parameters: pXsvfInfo - XSVF information pointer.
- * Returns: int - 0 = success; non-zero = error.
- *****************************************************************************/
-int xsvfDoXSDRTDO( SXsvfInfo* pXsvfInfo )
-{
- int iErrorCode;
- iErrorCode = xsvfBasicXSDRTDO( &(pXsvfInfo->ucTapState),
- pXsvfInfo->lShiftLengthBits,
- pXsvfInfo->sShiftLengthBytes,
- &(pXsvfInfo->lvTdi),
- &(pXsvfInfo->lvTdoCaptured),
- &(pXsvfInfo->lvTdoExpected),
- &(pXsvfInfo->lvTdoMask),
- pXsvfInfo->ucEndDR,
- pXsvfInfo->lRunTestTime,
- pXsvfInfo->ucMaxRepeat );
- if ( iErrorCode != XSVF_ERROR_NONE )
- {
- pXsvfInfo->iErrorCode = iErrorCode;
- }
- return( iErrorCode );
-}
-
-/*****************************************************************************
- * Function: xsvfDoXSETSDRMASKS
- * Description: XSETSDRMASKS <lenVal.AddressMask[XSDRSIZE]>
- * <lenVal.DataMask[XSDRSIZE]>
- * Get the prespecified address and data mask for the XSDRINC
- * command.
- * Used for xc9500/xl compressed XSVF data.
- * Parameters: pXsvfInfo - XSVF information pointer.
- * Returns: int - 0 = success; non-zero = error.
- *****************************************************************************/
-#ifdef XSVF_SUPPORT_COMPRESSION
-int xsvfDoXSETSDRMASKS( SXsvfInfo* pXsvfInfo )
-{
- /* read the addressMask */
- readVal( &(pXsvfInfo->lvAddressMask), pXsvfInfo->sShiftLengthBytes );
- /* read the dataMask */
- readVal( &(pXsvfInfo->lvDataMask), pXsvfInfo->sShiftLengthBytes );
-
- XSVFDBG_PRINTF( 4, " Address Mask = " );
- XSVFDBG_PRINTLENVAL( 4, &(pXsvfInfo->lvAddressMask) );
- XSVFDBG_PRINTF( 4, "\n" );
- XSVFDBG_PRINTF( 4, " Data Mask = " );
- XSVFDBG_PRINTLENVAL( 4, &(pXsvfInfo->lvDataMask) );
- XSVFDBG_PRINTF( 4, "\n" );
-
- return( XSVF_ERROR_NONE );
-}
-#endif /* XSVF_SUPPORT_COMPRESSION */
-
-/*****************************************************************************
- * Function: xsvfDoXSDRINC
- * Description: XSDRINC <lenVal.firstTDI[XSDRSIZE]> <byte(numTimes)>
- * <lenVal.data[XSETSDRMASKS.dataMask.len]> ...
- * Get the XSDRINC parameters and execute the XSDRINC command.
- * XSDRINC starts by loading the first TDI shift value.
- * Then, for numTimes, XSDRINC gets the next piece of data,
- * replaces the bits from the starting TDI as defined by the
- * XSETSDRMASKS.dataMask, adds the address mask from
- * XSETSDRMASKS.addressMask, shifts the new TDI value,
- * and compares the TDO to the expected TDO from the previous
- * XSDRTDO command using the XTDOMASK.
- * Used for xc9500/xl compressed XSVF data.
- * Parameters: pXsvfInfo - XSVF information pointer.
- * Returns: int - 0 = success; non-zero = error.
- *****************************************************************************/
-#ifdef XSVF_SUPPORT_COMPRESSION
-int xsvfDoXSDRINC( SXsvfInfo* pXsvfInfo )
-{
- int iErrorCode;
- int iDataMaskLen;
- unsigned char ucDataMask;
- unsigned char ucNumTimes;
- unsigned char i;
-
- readVal( &(pXsvfInfo->lvTdi), pXsvfInfo->sShiftLengthBytes );
- iErrorCode = xsvfShift( &(pXsvfInfo->ucTapState), XTAPSTATE_SHIFTDR,
- pXsvfInfo->lShiftLengthBits,
- &(pXsvfInfo->lvTdi), &(pXsvfInfo->lvTdoCaptured),
- &(pXsvfInfo->lvTdoExpected),
- &(pXsvfInfo->lvTdoMask), pXsvfInfo->ucEndDR,
- pXsvfInfo->lRunTestTime, pXsvfInfo->ucMaxRepeat );
- if ( !iErrorCode )
- {
- /* Calculate number of data mask bits */
- iDataMaskLen = 0;
- for ( i = 0; i < pXsvfInfo->lvDataMask.len; ++i )
- {
- ucDataMask = pXsvfInfo->lvDataMask.val[ i ];
- while ( ucDataMask )
- {
- iDataMaskLen += ( ucDataMask & 1 );
- ucDataMask >>= 1;
- }
- }
-
- /* Get the number of data pieces, i.e. number of times to shift */
- readByte( &ucNumTimes );
-
- /* For numTimes, get data, fix TDI, and shift */
- for ( i = 0; !iErrorCode && ( i < ucNumTimes ); ++i )
- {
- readVal( &(pXsvfInfo->lvNextData),
- xsvfGetAsNumBytes( iDataMaskLen ) );
- xsvfDoSDRMasking( &(pXsvfInfo->lvTdi),
- &(pXsvfInfo->lvNextData),
- &(pXsvfInfo->lvAddressMask),
- &(pXsvfInfo->lvDataMask) );
- iErrorCode = xsvfShift( &(pXsvfInfo->ucTapState),
- XTAPSTATE_SHIFTDR,
- pXsvfInfo->lShiftLengthBits,
- &(pXsvfInfo->lvTdi),
- &(pXsvfInfo->lvTdoCaptured),
- &(pXsvfInfo->lvTdoExpected),
- &(pXsvfInfo->lvTdoMask),
- pXsvfInfo->ucEndDR,
- pXsvfInfo->lRunTestTime,
- pXsvfInfo->ucMaxRepeat );
- }
- }
- if ( iErrorCode != XSVF_ERROR_NONE )
- {
- pXsvfInfo->iErrorCode = iErrorCode;
- }
- return( iErrorCode );
-}
-#endif /* XSVF_SUPPORT_COMPRESSION */
-
-/*****************************************************************************
- * Function: xsvfDoXSDRBCE
- * Description: XSDRB/XSDRC/XSDRE <lenVal.TDI[XSDRSIZE]>
- * If not already in SHIFTDR, goto SHIFTDR.
- * Shift the given TDI data into the JTAG scan chain.
- * Ignore TDO.
- * If cmd==XSDRE, then goto ENDDR. Otherwise, stay in ShiftDR.
- * XSDRB, XSDRC, and XSDRE are the same implementation.
- * Parameters: pXsvfInfo - XSVF information pointer.
- * Returns: int - 0 = success; non-zero = error.
- *****************************************************************************/
-int xsvfDoXSDRBCE( SXsvfInfo* pXsvfInfo )
-{
- unsigned char ucEndDR;
- int iErrorCode;
- ucEndDR = (unsigned char)(( pXsvfInfo->ucCommand == XSDRE ) ?
- pXsvfInfo->ucEndDR : XTAPSTATE_SHIFTDR);
- iErrorCode = xsvfBasicXSDRTDO( &(pXsvfInfo->ucTapState),
- pXsvfInfo->lShiftLengthBits,
- pXsvfInfo->sShiftLengthBytes,
- &(pXsvfInfo->lvTdi),
- /*plvTdoCaptured*/0, /*plvTdoExpected*/0,
- /*plvTdoMask*/0, ucEndDR,
- /*lRunTestTime*/0, /*ucMaxRepeat*/0 );
- if ( iErrorCode != XSVF_ERROR_NONE )
- {
- pXsvfInfo->iErrorCode = iErrorCode;
- }
- return( iErrorCode );
-}
-
-/*****************************************************************************
- * Function: xsvfDoXSDRTDOBCE
- * Description: XSDRB/XSDRC/XSDRE <lenVal.TDI[XSDRSIZE]> <lenVal.TDO[XSDRSIZE]>
- * If not already in SHIFTDR, goto SHIFTDR.
- * Shift the given TDI data into the JTAG scan chain.
- * Compare TDO, but do NOT use XTDOMASK.
- * If cmd==XSDRTDOE, then goto ENDDR. Otherwise, stay in ShiftDR.
- * XSDRTDOB, XSDRTDOC, and XSDRTDOE are the same implementation.
- * Parameters: pXsvfInfo - XSVF information pointer.
- * Returns: int - 0 = success; non-zero = error.
- *****************************************************************************/
-int xsvfDoXSDRTDOBCE( SXsvfInfo* pXsvfInfo )
-{
- unsigned char ucEndDR;
- int iErrorCode;
- ucEndDR = (unsigned char)(( pXsvfInfo->ucCommand == XSDRTDOE ) ?
- pXsvfInfo->ucEndDR : XTAPSTATE_SHIFTDR);
- iErrorCode = xsvfBasicXSDRTDO( &(pXsvfInfo->ucTapState),
- pXsvfInfo->lShiftLengthBits,
- pXsvfInfo->sShiftLengthBytes,
- &(pXsvfInfo->lvTdi),
- &(pXsvfInfo->lvTdoCaptured),
- &(pXsvfInfo->lvTdoExpected),
- /*plvTdoMask*/0, ucEndDR,
- /*lRunTestTime*/0, /*ucMaxRepeat*/0 );
- if ( iErrorCode != XSVF_ERROR_NONE )
- {
- pXsvfInfo->iErrorCode = iErrorCode;
- }
- return( iErrorCode );
-}
-
-/*****************************************************************************
- * Function: xsvfDoXSTATE
- * Description: XSTATE <byte>
- * <byte> == XTAPSTATE;
- * Get the state parameter and transition the TAP to that state.
- * Parameters: pXsvfInfo - XSVF information pointer.
- * Returns: int - 0 = success; non-zero = error.
- *****************************************************************************/
-int xsvfDoXSTATE( SXsvfInfo* pXsvfInfo )
-{
- unsigned char ucNextState;
- int iErrorCode;
- readByte( &ucNextState );
- iErrorCode = xsvfGotoTapState( &(pXsvfInfo->ucTapState), ucNextState );
- if ( iErrorCode != XSVF_ERROR_NONE )
- {
- pXsvfInfo->iErrorCode = iErrorCode;
- }
- return( iErrorCode );
-}
-
-/*****************************************************************************
- * Function: xsvfDoXENDXR
- * Description: XENDIR/XENDDR <byte>
- * <byte>: 0 = RUNTEST; 1 = PAUSE.
- * Get the prespecified XENDIR or XENDDR.
- * Both XENDIR and XENDDR use the same implementation.
- * Parameters: pXsvfInfo - XSVF information pointer.
- * Returns: int - 0 = success; non-zero = error.
- *****************************************************************************/
-int xsvfDoXENDXR( SXsvfInfo* pXsvfInfo )
-{
- int iErrorCode;
- unsigned char ucEndState;
-
- iErrorCode = XSVF_ERROR_NONE;
- readByte( &ucEndState );
- if ( ( ucEndState != XENDXR_RUNTEST ) && ( ucEndState != XENDXR_PAUSE ) )
- {
- iErrorCode = XSVF_ERROR_ILLEGALSTATE;
- }
- else
- {
-
- if ( pXsvfInfo->ucCommand == XENDIR )
- {
- if ( ucEndState == XENDXR_RUNTEST )
- {
- pXsvfInfo->ucEndIR = XTAPSTATE_RUNTEST;
- }
- else
- {
- pXsvfInfo->ucEndIR = XTAPSTATE_PAUSEIR;
- }
- XSVFDBG_PRINTF1( 3, " ENDIR State = %s\n",
- xsvf_pzTapState[ pXsvfInfo->ucEndIR ] );
- }
- else /* XENDDR */
- {
- if ( ucEndState == XENDXR_RUNTEST )
- {
- pXsvfInfo->ucEndDR = XTAPSTATE_RUNTEST;
- }
- else
- {
- pXsvfInfo->ucEndDR = XTAPSTATE_PAUSEDR;
- }
- XSVFDBG_PRINTF1( 3, " ENDDR State = %s\n",
- xsvf_pzTapState[ pXsvfInfo->ucEndDR ] );
- }
- }
-
- if ( iErrorCode != XSVF_ERROR_NONE )
- {
- pXsvfInfo->iErrorCode = iErrorCode;
- }
- return( iErrorCode );
-}
-
-/*****************************************************************************
- * Function: xsvfDoXCOMMENT
- * Description: XCOMMENT <text string ending in \0>
- * <text string ending in \0> == text comment;
- * Arbitrary comment embedded in the XSVF.
- * Parameters: pXsvfInfo - XSVF information pointer.
- * Returns: int - 0 = success; non-zero = error.
- *****************************************************************************/
-int xsvfDoXCOMMENT( SXsvfInfo* pXsvfInfo )
-{
- /* Use the comment for debugging */
- /* Otherwise, read through the comment to the end '\0' and ignore */
- unsigned char ucText;
-
- if ( xsvf_iDebugLevel > 0 )
- {
- putc( ' ' );
- }
-
- do
- {
- readByte( &ucText );
- if ( xsvf_iDebugLevel > 0 )
- {
- putc( ucText ? ucText : '\n' );
- }
- } while ( ucText );
-
- pXsvfInfo->iErrorCode = XSVF_ERROR_NONE;
-
- return( pXsvfInfo->iErrorCode );
-}
-
-/*****************************************************************************
- * Function: xsvfDoXWAIT
- * Description: XWAIT <wait_state> <end_state> <wait_time>
- * If not already in <wait_state>, then go to <wait_state>.
- * Wait in <wait_state> for <wait_time> microseconds.
- * Finally, if not already in <end_state>, then goto <end_state>.
- * Parameters: pXsvfInfo - XSVF information pointer.
- * Returns: int - 0 = success; non-zero = error.
- *****************************************************************************/
-int xsvfDoXWAIT( SXsvfInfo* pXsvfInfo )
-{
- unsigned char ucWaitState;
- unsigned char ucEndState;
- long lWaitTime;
-
- /* Get Parameters */
- /* <wait_state> */
- readVal( &(pXsvfInfo->lvTdi), 1 );
- ucWaitState = pXsvfInfo->lvTdi.val[0];
-
- /* <end_state> */
- readVal( &(pXsvfInfo->lvTdi), 1 );
- ucEndState = pXsvfInfo->lvTdi.val[0];
-
- /* <wait_time> */
- readVal( &(pXsvfInfo->lvTdi), 4 );
- lWaitTime = value( &(pXsvfInfo->lvTdi) );
- XSVFDBG_PRINTF2( 3, " XWAIT: state = %s; time = %ld\n",
- xsvf_pzTapState[ ucWaitState ], lWaitTime );
-
- /* If not already in <wait_state>, go to <wait_state> */
- if ( pXsvfInfo->ucTapState != ucWaitState )
- {
- xsvfGotoTapState( &(pXsvfInfo->ucTapState), ucWaitState );
- }
-
- /* Wait for <wait_time> microseconds */
- waitTime( lWaitTime );
-
- /* If not already in <end_state>, go to <end_state> */
- if ( pXsvfInfo->ucTapState != ucEndState )
- {
- xsvfGotoTapState( &(pXsvfInfo->ucTapState), ucEndState );
- }
-
- return( XSVF_ERROR_NONE );
-}
-
-
-/*============================================================================
- * Execution Control Functions
- ============================================================================*/
-
-/*****************************************************************************
- * Function: xsvfInitialize
- * Description: Initialize the xsvf player.
- * Call this before running the player to initialize the data
- * in the SXsvfInfo struct.
- * xsvfCleanup is called to clean up the data in SXsvfInfo
- * after the XSVF is played.
- * Parameters: pXsvfInfo - ptr to the XSVF information.
- * Returns: int - 0 = success; otherwise error.
- *****************************************************************************/
-int xsvfInitialize( SXsvfInfo* pXsvfInfo )
-{
- /* Initialize values */
- pXsvfInfo->iErrorCode = xsvfInfoInit( pXsvfInfo );
-
- if ( !pXsvfInfo->iErrorCode )
- {
- /* Initialize the TAPs */
- pXsvfInfo->iErrorCode = xsvfGotoTapState( &(pXsvfInfo->ucTapState),
- XTAPSTATE_RESET );
- }
-
- return( pXsvfInfo->iErrorCode );
-}
-
-/*****************************************************************************
- * Function: xsvfRun
- * Description: Run the xsvf player for a single command and return.
- * First, call xsvfInitialize.
- * Then, repeatedly call this function until an error is detected
- * or until the pXsvfInfo->ucComplete variable is non-zero.
- * Finally, call xsvfCleanup to cleanup any remnants.
- * Parameters: pXsvfInfo - ptr to the XSVF information.
- * Returns: int - 0 = success; otherwise error.
- *****************************************************************************/
-int xsvfRun( SXsvfInfo* pXsvfInfo )
-{
- /* Process the XSVF commands */
- if ( (!pXsvfInfo->iErrorCode) && (!pXsvfInfo->ucComplete) )
- {
- /* read 1 byte for the instruction */
- readByte( &(pXsvfInfo->ucCommand) );
- ++(pXsvfInfo->lCommandCount);
-
- if ( pXsvfInfo->ucCommand < XLASTCMD )
- {
- /* Execute the command. Func sets error code. */
- XSVFDBG_PRINTF1( 2, " %s\n",
- xsvf_pzCommandName[pXsvfInfo->ucCommand] );
- /* If your compiler cannot take this form,
- then convert to a switch statement */
-#if 0 /* test-only */
- xsvf_pfDoCmd[ pXsvfInfo->ucCommand ]( pXsvfInfo );
-#else
- switch (pXsvfInfo->ucCommand) {
- case 0:
- xsvfDoXCOMPLETE(pXsvfInfo); /* 0 */
- break;
- case 1:
- xsvfDoXTDOMASK(pXsvfInfo); /* 1 */
- break;
- case 2:
- xsvfDoXSIR(pXsvfInfo); /* 2 */
- break;
- case 3:
- xsvfDoXSDR(pXsvfInfo); /* 3 */
- break;
- case 4:
- xsvfDoXRUNTEST(pXsvfInfo); /* 4 */
- break;
- case 5:
- xsvfDoIllegalCmd(pXsvfInfo); /* 5 */
- break;
- case 6:
- xsvfDoIllegalCmd(pXsvfInfo); /* 6 */
- break;
- case 7:
- xsvfDoXREPEAT(pXsvfInfo); /* 7 */
- break;
- case 8:
- xsvfDoXSDRSIZE(pXsvfInfo); /* 8 */
- break;
- case 9:
- xsvfDoXSDRTDO(pXsvfInfo); /* 9 */
- break;
-#ifdef XSVF_SUPPORT_COMPRESSION
- case 10:
- xsvfDoXSETSDRMASKS(pXsvfInfo); /* 10 */
- break;
- case 11:
- xsvfDoXSDRINC(pXsvfInfo); /* 11 */
- break;
-#else
- case 10:
- xsvfDoIllegalCmd(pXsvfInfo); /* 10 */
- break;
- case 11:
- xsvfDoIllegalCmd(pXsvfInfo); /* 11 */
- break;
-#endif /* XSVF_SUPPORT_COMPRESSION */
- case 12:
- xsvfDoXSDRBCE(pXsvfInfo); /* 12 */
- break;
- case 13:
- xsvfDoXSDRBCE(pXsvfInfo); /* 13 */
- break;
- case 14:
- xsvfDoXSDRBCE(pXsvfInfo); /* 14 */
- break;
- case 15:
- xsvfDoXSDRTDOBCE(pXsvfInfo); /* 15 */
- break;
- case 16:
- xsvfDoXSDRTDOBCE(pXsvfInfo); /* 16 */
- break;
- case 17:
- xsvfDoXSDRTDOBCE(pXsvfInfo); /* 17 */
- break;
- case 18:
- xsvfDoXSTATE(pXsvfInfo); /* 18 */
- break;
- case 19:
- xsvfDoXENDXR(pXsvfInfo); /* 19 */
- break;
- case 20:
- xsvfDoXENDXR(pXsvfInfo); /* 20 */
- break;
- case 21:
- xsvfDoXSIR2(pXsvfInfo); /* 21 */
- break;
- case 22:
- xsvfDoXCOMMENT(pXsvfInfo); /* 22 */
- break;
- case 23:
- xsvfDoXWAIT(pXsvfInfo); /* 23 */
- break;
- }
-#endif
- }
- else
- {
- /* Illegal command value. Func sets error code. */
- xsvfDoIllegalCmd( pXsvfInfo );
- }
- }
-
- return( pXsvfInfo->iErrorCode );
-}
-
-/*****************************************************************************
- * Function: xsvfCleanup
- * Description: cleanup remnants of the xsvf player.
- * Parameters: pXsvfInfo - ptr to the XSVF information.
- * Returns: void.
- *****************************************************************************/
-void xsvfCleanup( SXsvfInfo* pXsvfInfo )
-{
- xsvfInfoCleanup( pXsvfInfo );
-}
-
-
-/*============================================================================
- * xsvfExecute() - The primary entry point to the XSVF player
- ============================================================================*/
-
-/*****************************************************************************
- * Function: xsvfExecute
- * Description: Process, interpret, and apply the XSVF commands.
- * See port.c:readByte for source of XSVF data.
- * Parameters: none.
- * Returns: int - Legacy result values: 1 == success; 0 == failed.
- *****************************************************************************/
-int xsvfExecute(void)
-{
- SXsvfInfo xsvfInfo;
-
- xsvfInitialize( &xsvfInfo );
-
- while ( !xsvfInfo.iErrorCode && (!xsvfInfo.ucComplete) )
- {
- xsvfRun( &xsvfInfo );
- }
-
- if ( xsvfInfo.iErrorCode )
- {
- XSVFDBG_PRINTF1( 0, "%s\n", xsvf_pzErrorName[
- ( xsvfInfo.iErrorCode < XSVF_ERROR_LAST )
- ? xsvfInfo.iErrorCode : XSVF_ERROR_UNKNOWN ] );
- XSVFDBG_PRINTF2( 0, "ERROR at or near XSVF command #%ld. See line #%ld in the XSVF ASCII file.\n",
- xsvfInfo.lCommandCount, xsvfInfo.lCommandCount );
- }
- else
- {
- XSVFDBG_PRINTF( 0, "SUCCESS - Completed XSVF execution.\n" );
- }
-
- xsvfCleanup( &xsvfInfo );
-
- return( XSVF_ERRORCODE(xsvfInfo.iErrorCode) );
-}
-
-
-/*****************************************************************************
- * Function: do_cpld
- * Description: main function.
- * Specified here for creating stand-alone debug executable.
- * Embedded users should call xsvfExecute() directly.
- * Parameters: iArgc - number of command-line arguments.
- * ppzArgv - array of ptrs to strings (command-line arguments).
- * Returns: int - Legacy return value: 1 = success; 0 = error.
- *****************************************************************************/
-int do_cpld(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- int iErrorCode;
- char* pzXsvfFileName;
- unsigned long duration;
- unsigned long long startClock, endClock;
-
- iErrorCode = XSVF_ERRORCODE( XSVF_ERROR_NONE );
- pzXsvfFileName = 0;
- xsvf_iDebugLevel = 0;
-
- printf("XSVF Player v%s, Xilinx, Inc.\n", XSVF_VERSION);
- printf("XSVF Filesize = %d bytes\n", filesize);
-
- /* Initialize the I/O. SetPort initializes I/O on first call */
- setPort( TMS, 1 );
-
- /* Execute the XSVF in the file */
- startClock = get_ticks();
- iErrorCode = xsvfExecute();
- endClock = get_ticks();
- duration = (unsigned long)(endClock - startClock);
- printf("\nExecution Time = %d seconds\n", (int)(duration/get_tbclk()));
-
- return( iErrorCode );
-}
-U_BOOT_CMD(
- cpld, 1, 1, do_cpld,
- "cpld - Program onboard CPLD\n",
- NULL
- );
diff --git a/board/esd/common/xilinx_jtag/micro.h b/board/esd/common/xilinx_jtag/micro.h
deleted file mode 100644
index 3c463ab92b..0000000000
--- a/board/esd/common/xilinx_jtag/micro.h
+++ /dev/null
@@ -1,64 +0,0 @@
-/*
- * (C) Copyright 2003
- * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*****************************************************************************
- * File: micro.h
- * Description: This header file contains the function prototype to the
- * primary interface function for the XSVF player.
- * Usage: FIRST - PORTS.C
- * Customize the ports.c function implementations to establish
- * the correct protocol for communicating with your JTAG ports
- * (setPort() and readTDOBit()) and tune the waitTime() delay
- * function. Also, establish access to the XSVF data source
- * in the readByte() function.
- * FINALLY - Call xsvfExecute().
- *****************************************************************************/
-#ifndef XSVF_MICRO_H
-#define XSVF_MICRO_H
-
-/* Legacy error codes for xsvfExecute from original XSVF player v2.0 */
-#define XSVF_LEGACY_SUCCESS 1
-#define XSVF_LEGACY_ERROR 0
-
-/* 4.04 [NEW] Error codes for xsvfExecute. */
-/* Must #define XSVF_SUPPORT_ERRORCODES in micro.c to get these codes */
-#define XSVF_ERROR_NONE 0
-#define XSVF_ERROR_UNKNOWN 1
-#define XSVF_ERROR_TDOMISMATCH 2
-#define XSVF_ERROR_MAXRETRIES 3 /* TDO mismatch after max retries */
-#define XSVF_ERROR_ILLEGALCMD 4
-#define XSVF_ERROR_ILLEGALSTATE 5
-#define XSVF_ERROR_DATAOVERFLOW 6 /* Data > lenVal MAX_LEN buffer size*/
-/* Insert new errors here */
-#define XSVF_ERROR_LAST 7
-
-/*****************************************************************************
- * Function: xsvfExecute
- * Description: Process, interpret, and apply the XSVF commands.
- * See port.c:readByte for source of XSVF data.
- * Parameters: none.
- * Returns: int - For error codes see above.
- *****************************************************************************/
-int xsvfExecute(void);
-
-#endif /* XSVF_MICRO_H */
diff --git a/board/esd/common/xilinx_jtag/ports.c b/board/esd/common/xilinx_jtag/ports.c
deleted file mode 100644
index 3ad94a5b66..0000000000
--- a/board/esd/common/xilinx_jtag/ports.c
+++ /dev/null
@@ -1,116 +0,0 @@
-/*
- * (C) Copyright 2003
- * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*******************************************************/
-/* file: ports.c */
-/* abstract: This file contains the routines to */
-/* output values on the JTAG ports, to read */
-/* the TDO bit, and to read a byte of data */
-/* from the prom */
-/* */
-/*******************************************************/
-
-#include <common.h>
-#include <asm/processor.h>
-
-#include "ports.h"
-
-static unsigned long output = 0;
-static int filepos = 0;
-static int oldstate = 0;
-static int newstate = 0;
-static int readptr = 0;
-
-extern long filesize;
-extern const unsigned char fpgadata[];
-
-
-/* if in debugging mode, then just set the variables */
-void setPort(short p,short val)
-{
- if (p==TMS) {
- if (val) {
- output |= JTAG_TMS;
- } else {
- output &= ~JTAG_TMS;
- }
- }
- if (p==TDI) {
- if (val) {
- output |= JTAG_TDI;
- } else {
- output &= ~JTAG_TDI;
- }
- }
- if (p==TCK) {
- if (val) {
- output |= JTAG_TCK;
- } else {
- output &= ~JTAG_TCK;
- }
- out32(GPIO0_OR, output);
- }
-}
-
-
-/* toggle tck LH */
-void pulseClock(void)
-{
- setPort(TCK,0); /* set the TCK port to low */
- setPort(TCK,1); /* set the TCK port to high */
-}
-
-
-/* read in a byte of data from the prom */
-void readByte(unsigned char *data)
-{
- /* pretend reading using a file */
- *data = fpgadata[readptr++];
- newstate = (100 * filepos++) / filesize;
- if (newstate != oldstate) {
- printf("%4d\r\r\r\r", newstate);
- oldstate = newstate;
- }
-}
-
-/* read the TDO bit from port */
-unsigned char readTDOBit(void)
-{
- unsigned long inputs;
-
- inputs = in32(GPIO0_IR);
- if (inputs & JTAG_TDO)
- return 1;
- else
- return 0;
-}
-
-
-/* Wait at least the specified number of microsec. */
-/* Use a timer if possible; otherwise estimate the number of instructions */
-/* necessary to be run based on the microcontroller speed. For this example */
-/* we pulse the TCK port a number of times based on the processor speed. */
-void waitTime(long microsec)
-{
- udelay(microsec); /* esd */
-}
diff --git a/board/esd/common/xilinx_jtag/ports.h b/board/esd/common/xilinx_jtag/ports.h
deleted file mode 100644
index 0e389907ff..0000000000
--- a/board/esd/common/xilinx_jtag/ports.h
+++ /dev/null
@@ -1,62 +0,0 @@
-/*
- * (C) Copyright 2003
- * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*******************************************************/
-/* file: ports.h */
-/* abstract: This file contains extern declarations */
-/* for providing stimulus to the JTAG ports.*/
-/*******************************************************/
-
-#ifndef ports_dot_h
-#define ports_dot_h
-
-/* these constants are used to send the appropriate ports to setPort */
-/* they should be enumerated types, but some of the microcontroller */
-/* compilers don't like enumerated types */
-#define TCK (short) 0
-#define TMS (short) 1
-#define TDI (short) 2
-
-/*
- * Use CFG_FPGA_xxx defines from board include file.
- */
-#define JTAG_TMS CFG_FPGA_PRG /* output */
-#define JTAG_TCK CFG_FPGA_CLK /* output */
-#define JTAG_TDI CFG_FPGA_DATA /* output */
-#define JTAG_TDO CFG_FPGA_DONE /* input */
-
-/* set the port "p" (TCK, TMS, or TDI) to val (0 or 1) */
-void setPort(short p, short val);
-
-/* read the TDO bit and store it in val */
-unsigned char readTDOBit(void);
-
-/* make clock go down->up->down*/
-void pulseClock(void);
-
-/* read the next byte of data from the xsvf file */
-void readByte(unsigned char *data);
-
-void waitTime(long microsec);
-
-#endif
diff --git a/board/esd/cpci2dp/Makefile b/board/esd/cpci2dp/Makefile
deleted file mode 100644
index a60495a59a..0000000000
--- a/board/esd/cpci2dp/Makefile
+++ /dev/null
@@ -1,46 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o ../common/misc.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/esd/cpci2dp/config.mk b/board/esd/cpci2dp/config.mk
deleted file mode 100644
index 2da4c9f765..0000000000
--- a/board/esd/cpci2dp/config.mk
+++ /dev/null
@@ -1,28 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# esd CPCI2DP board
-#
-
-TEXT_BASE = 0xFFFC0000
diff --git a/board/esd/cpci2dp/cpci2dp.c b/board/esd/cpci2dp/cpci2dp.c
deleted file mode 100644
index df10c0e6aa..0000000000
--- a/board/esd/cpci2dp/cpci2dp.c
+++ /dev/null
@@ -1,214 +0,0 @@
-/*
- * (C) Copyright 2005
- * Matthias Fuchs, esd gmbh germany, matthias.fuchs@esd-electronics.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/processor.h>
-#include <command.h>
-#include <malloc.h>
-
-int board_early_init_f (void)
-{
- unsigned long cntrl0Reg;
-
- /*
- * Setup GPIO pins (CS4+CS7 as GPIO)
- */
- cntrl0Reg = mfdcr(cntrl0);
- mtdcr(cntrl0, cntrl0Reg | 0x00900000);
-
- /* set output pins to high */
- out32(GPIO0_OR, CFG_INTA_FAKE | CFG_EEPROM_WP | CFG_PB_LED);
- /* INTA# is open drain */
- out32(GPIO0_ODR, CFG_INTA_FAKE);
- /* setup for output */
- out32(GPIO0_TCR, CFG_INTA_FAKE | CFG_EEPROM_WP);
-
- /*
- * IRQ 0-15 405GP internally generated; active high; level sensitive
- * IRQ 16 405GP internally generated; active low; level sensitive
- * IRQ 17-24 RESERVED
- * IRQ 25 (EXT IRQ 0) PB0; active low; level sensitive
- * IRQ 26 (EXT IRQ 1) PB1; active low; level sensitive
- * IRQ 27 (EXT IRQ 2) PCI SLOT 0; active low; level sensitive
- * IRQ 28 (EXT IRQ 3) PCI SLOT 1; active low; level sensitive
- * IRQ 29 (EXT IRQ 4) PCI SLOT 2; active low; level sensitive
- * IRQ 30 (EXT IRQ 5) PCI SLOT 3; active low; level sensitive
- * IRQ 31 (EXT IRQ 6) unused
- */
- mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
- mtdcr(uicer, 0x00000000); /* disable all ints */
- mtdcr(uiccr, 0x00000000); /* set all to be non-critical*/
- mtdcr(uicpr, 0xFFFFFF81); /* set int polarities */
-
- mtdcr(uictr, 0x10000000); /* set int trigger levels */
- mtdcr(uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority*/
- mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
-
- return 0;
-}
-
-
-int misc_init_f (void)
-{
- return 0; /* dummy implementation */
-}
-
-
-int misc_init_r (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
- unsigned long cntrl0Reg;
-
- /* adjust flash start and offset */
- gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize;
- gd->bd->bi_flashoffset = 0;
-
- /*
- * Select cts (and not dsr) on uart1
- */
- cntrl0Reg = mfdcr(cntrl0);
- mtdcr(cntrl0, cntrl0Reg | 0x00001000);
-
- return (0);
-}
-
-
-/*
- * Check Board Identity:
- */
-int checkboard (void)
-{
- char str[64];
- int i = getenv_r ("serial#", str, sizeof(str));
-
- puts ("Board: ");
-
- if (i == -1) {
- puts ("### No HW ID - assuming CPCI2DP");
- } else {
- puts(str);
- }
-
- printf(" (Ver 1.0)");
-
- putc ('\n');
-
- return 0;
-}
-
-/* ------------------------------------------------------------------------- */
-
-long int initdram (int board_type)
-{
- unsigned long val;
-
- mtdcr(memcfga, mem_mb0cf);
- val = mfdcr(memcfgd);
-
- return (4*1024*1024 << ((val & 0x000e0000) >> 17));
-}
-
-/* ------------------------------------------------------------------------- */
-
-int testdram (void)
-{
- /* TODO: XXX XXX XXX */
- printf ("test: 64 MB - ok\n");
-
- return (0);
-}
-
-/* ------------------------------------------------------------------------- */
-
-#if defined(CFG_EEPROM_WREN)
-/* Input: <dev_addr> I2C address of EEPROM device to enable.
- * <state> -1: deliver current state
- * 0: disable write
- * 1: enable write
- * Returns: -1: wrong device address
- * 0: dis-/en- able done
- * 0/1: current state if <state> was -1.
- */
-int eeprom_write_enable (unsigned dev_addr, int state) {
- if (CFG_I2C_EEPROM_ADDR != dev_addr) {
- return -1;
- } else {
- switch (state) {
- case 1:
- /* Enable write access, clear bit GPIO_SINT2. */
- out32(GPIO0_OR, in32(GPIO0_OR) & ~CFG_EEPROM_WP);
- state = 0;
- break;
- case 0:
- /* Disable write access, set bit GPIO_SINT2. */
- out32(GPIO0_OR, in32(GPIO0_OR) | CFG_EEPROM_WP);
- state = 0;
- break;
- default:
- /* Read current status back. */
- state = (0 == (in32(GPIO0_OR) & CFG_EEPROM_WP));
- break;
- }
- }
- return state;
-}
-#endif
-
-#if defined(CFG_EEPROM_WREN)
-int do_eep_wren (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- int query = argc == 1;
- int state = 0;
-
- if (query) {
- /* Query write access state. */
- state = eeprom_write_enable (CFG_I2C_EEPROM_ADDR, -1);
- if (state < 0) {
- puts ("Query of write access state failed.\n");
- } else {
- printf ("Write access for device 0x%0x is %sabled.\n",
- CFG_I2C_EEPROM_ADDR, state ? "en" : "dis");
- state = 0;
- }
- } else {
- if ('0' == argv[1][0]) {
- /* Disable write access. */
- state = eeprom_write_enable (CFG_I2C_EEPROM_ADDR, 0);
- } else {
- /* Enable write access. */
- state = eeprom_write_enable (CFG_I2C_EEPROM_ADDR, 1);
- }
- if (state < 0) {
- puts ("Setup of write access state failed.\n");
- }
- }
-
- return state;
-}
-
-U_BOOT_CMD(
- eepwren, 2, 0, do_eep_wren,
- "eepwren - Enable / disable / query EEPROM write access\n",
- NULL
- );
-#endif /* #if defined(CFG_EEPROM_WREN) */
diff --git a/board/esd/cpci2dp/flash.c b/board/esd/cpci2dp/flash.c
deleted file mode 100644
index de847f9bea..0000000000
--- a/board/esd/cpci2dp/flash.c
+++ /dev/null
@@ -1,84 +0,0 @@
-/*
- * (C) Copyright 2001
- * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <ppc4xx.h>
-#include <asm/processor.h>
-
-/*
- * include common flash code (for esd boards)
- */
-#include "../common/flash.c"
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (vu_long *addr, flash_info_t *info);
-static void flash_get_offsets (ulong base, flash_info_t *info);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- unsigned long size_b0;
- int i;
- uint pbcr;
- unsigned long base_b0;
-
- /* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* Static FLASH Bank configuration here - FIXME XXX */
-
- size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size_b0, size_b0<<20);
- }
-
- /* Setup offsets */
- flash_get_offsets (-size_b0, &flash_info[0]);
-
- /* Re-do sizing to get full correct info */
- mtdcr(ebccfga, pb0cr);
- pbcr = mfdcr(ebccfgd);
- mtdcr(ebccfga, pb0cr);
- base_b0 = -size_b0;
- pbcr = (pbcr & 0x0001ffff) | base_b0 | (((size_b0/1024/1024)-1)<<17);
- mtdcr(ebccfgd, pbcr);
- /* printf("pb1cr = %x\n", pbcr); */
-
- /* Monitor protection ON by default */
- (void)flash_protect(FLAG_PROTECT_SET,
- -monitor_flash_len,
- 0xffffffff,
- &flash_info[0]);
-
- flash_info[0].size = size_b0;
-
- return (size_b0);
-}
diff --git a/board/esd/cpci2dp/u-boot.lds b/board/esd/cpci2dp/u-boot.lds
deleted file mode 100644
index f7a20d1da2..0000000000
--- a/board/esd/cpci2dp/u-boot.lds
+++ /dev/null
@@ -1,150 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- .resetvec 0xFFFFFFFC :
- {
- *(.resetvec)
- } = 0xffff
-
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/ppc4xx/start.o (.text)
- cpu/ppc4xx/traps.o (.text)
- cpu/ppc4xx/interrupts.o (.text)
- cpu/ppc4xx/serial.o (.text)
- cpu/ppc4xx/cpu_init.o (.text)
- cpu/ppc4xx/speed.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/extable.o (.text)
- lib_generic/zlib.o (.text)
-
-/* . = env_offset;*/
-/* common/environment.o(.text)*/
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/esd/cpci405/Makefile b/board/esd/cpci405/Makefile
deleted file mode 100644
index 9340a32a5f..0000000000
--- a/board/esd/cpci405/Makefile
+++ /dev/null
@@ -1,46 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o ../common/misc.o ../common/auto_update.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/esd/cpci405/config.mk b/board/esd/cpci405/config.mk
deleted file mode 100644
index 0be45c70d7..0000000000
--- a/board/esd/cpci405/config.mk
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# esd CPCI405 boards
-#
-
-ifeq ($(BOARD_REVISION),CPCI4052)
-TEXT_BASE = 0xFFFC0000
-else
-ifeq ($(BOARD_REVISION),CPCI405DT)
-TEXT_BASE = 0xFFFC0000
-else
-ifeq ($(BOARD_REVISION),CPCI405AB)
-TEXT_BASE = 0xFFFC0000
-else
-TEXT_BASE = 0xFFFD0000
-endif
-endif
-endif
diff --git a/board/esd/cpci405/cpci405.c b/board/esd/cpci405/cpci405.c
deleted file mode 100644
index 2ab96731e0..0000000000
--- a/board/esd/cpci405/cpci405.c
+++ /dev/null
@@ -1,799 +0,0 @@
-/*
- * (C) Copyright 2001-2003
- * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/processor.h>
-#include <command.h>
-#include <malloc.h>
-#include <net.h>
-
-/* ------------------------------------------------------------------------- */
-extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); /*cmd_boot.c*/
-#if 0
-#define FPGA_DEBUG
-#endif
-
-/* fpga configuration data - generated by bin2cc */
-const unsigned char fpgadata[] =
-{
-#ifdef CONFIG_CPCI405_VER2
-# ifdef CONFIG_CPCI405AB
-# include "fpgadata_cpci405ab.c"
-# else
-# include "fpgadata_cpci4052.c"
-# endif
-#else
-# include "fpgadata_cpci405.c"
-#endif
-};
-
-/*
- * include common fpga code (for esd boards)
- */
-#include "../common/fpga.c"
-
-
-#include "../common/auto_update.h"
-
-#ifdef CONFIG_CPCI405AB
-au_image_t au_image[] = {
- {"cpci405ab/preinst.img", 0, -1, AU_SCRIPT},
- {"cpci405ab/pImage", 0xffc00000, 0x000c0000, AU_NOR},
- {"cpci405ab/pImage.initrd", 0xffcc0000, 0x00300000, AU_NOR},
- {"cpci405ab/u-boot.img", 0xfffc0000, 0x00040000, AU_FIRMWARE},
- {"cpci405ab/postinst.img", 0, 0, AU_SCRIPT},
-};
-#else
-#ifdef CONFIG_CPCI405_VER2
-au_image_t au_image[] = {
- {"cpci4052/preinst.img", 0, -1, AU_SCRIPT},
- {"cpci4052/pImage", 0xffc00000, 0x000c0000, AU_NOR},
- {"cpci4052/pImage.initrd", 0xffcc0000, 0x00300000, AU_NOR},
- {"cpci4052/u-boot.img", 0xfffc0000, 0x00040000, AU_FIRMWARE},
- {"cpci4052/postinst.img", 0, 0, AU_SCRIPT},
-};
-#else
-au_image_t au_image[] = {
- {"cpci405/preinst.img", 0, -1, AU_SCRIPT},
- {"cpci405/pImage", 0xffc00000, 0x000c0000, AU_NOR},
- {"cpci405/pImage.initrd", 0xffcc0000, 0x00310000, AU_NOR},
- {"cpci405/u-boot.img", 0xfffd0000, 0x00030000, AU_FIRMWARE},
- {"cpci405/postinst.img", 0, 0, AU_SCRIPT},
-};
-#endif
-#endif
-
-int N_AU_IMAGES = (sizeof(au_image) / sizeof(au_image[0]));
-
-
-/* Prototypes */
-int cpci405_version(void);
-int gunzip(void *, int, unsigned char *, unsigned long *);
-void lxt971_no_sleep(void);
-
-
-int board_early_init_f (void)
-{
-#ifndef CONFIG_CPCI405_VER2
- int index, len, i;
- int status;
-#endif
-
-#ifdef FPGA_DEBUG
- DECLARE_GLOBAL_DATA_PTR;
-
- /* set up serial port with default baudrate */
- (void) get_clocks ();
- gd->baudrate = CONFIG_BAUDRATE;
- serial_init ();
- console_init_f();
-#endif
-
- /*
- * First pull fpga-prg pin low, to disable fpga logic (on version 2 board)
- */
- out32(GPIO0_ODR, 0x00000000); /* no open drain pins */
- out32(GPIO0_TCR, CFG_FPGA_PRG); /* setup for output */
- out32(GPIO0_OR, CFG_FPGA_PRG); /* set output pins to high */
- out32(GPIO0_OR, 0); /* pull prg low */
-
- /*
- * Boot onboard FPGA
- */
-#ifndef CONFIG_CPCI405_VER2
- if (cpci405_version() == 1) {
- status = fpga_boot((unsigned char *)fpgadata, sizeof(fpgadata));
- if (status != 0) {
- /* booting FPGA failed */
-#ifndef FPGA_DEBUG
- DECLARE_GLOBAL_DATA_PTR;
-
- /* set up serial port with default baudrate */
- (void) get_clocks ();
- gd->baudrate = CONFIG_BAUDRATE;
- serial_init ();
- console_init_f();
-#endif
- printf("\nFPGA: Booting failed ");
- switch (status) {
- case ERROR_FPGA_PRG_INIT_LOW:
- printf("(Timeout: INIT not low after asserting PROGRAM*)\n ");
- break;
- case ERROR_FPGA_PRG_INIT_HIGH:
- printf("(Timeout: INIT not high after deasserting PROGRAM*)\n ");
- break;
- case ERROR_FPGA_PRG_DONE:
- printf("(Timeout: DONE not high after programming FPGA)\n ");
- break;
- }
-
- /* display infos on fpgaimage */
- index = 15;
- for (i=0; i<4; i++) {
- len = fpgadata[index];
- printf("FPGA: %s\n", &(fpgadata[index+1]));
- index += len+3;
- }
- putc ('\n');
- /* delayed reboot */
- for (i=20; i>0; i--) {
- printf("Rebooting in %2d seconds \r",i);
- for (index=0;index<1000;index++)
- udelay(1000);
- }
- putc ('\n');
- do_reset(NULL, 0, 0, NULL);
- }
- }
-#endif /* !CONFIG_CPCI405_VER2 */
-
- /*
- * IRQ 0-15 405GP internally generated; active high; level sensitive
- * IRQ 16 405GP internally generated; active low; level sensitive
- * IRQ 17-24 RESERVED
- * IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive
- * IRQ 26 (EXT IRQ 1) CAN1 (+FPGA on CPCI4052) ; active low; level sensitive
- * IRQ 27 (EXT IRQ 2) PCI SLOT 0; active low; level sensitive
- * IRQ 28 (EXT IRQ 3) PCI SLOT 1; active low; level sensitive
- * IRQ 29 (EXT IRQ 4) PCI SLOT 2; active low; level sensitive
- * IRQ 30 (EXT IRQ 5) PCI SLOT 3; active low; level sensitive
- * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
- */
- mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
- mtdcr(uicer, 0x00000000); /* disable all ints */
- mtdcr(uiccr, 0x00000000); /* set all to be non-critical*/
- if (cpci405_version() == 3) {
- mtdcr(uicpr, 0xFFFFFF99); /* set int polarities */
- } else {
- mtdcr(uicpr, 0xFFFFFF81); /* set int polarities */
- }
- mtdcr(uictr, 0x10000000); /* set int trigger levels */
- mtdcr(uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority*/
- mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
-
- return 0;
-}
-
-
-/* ------------------------------------------------------------------------- */
-
-int ctermm2(void)
-{
-#ifdef CONFIG_CPCI405_VER2
- return 0; /* no, board is cpci405 */
-#else
- if ((*(unsigned char *)0xf0000400 == 0x00) &&
- (*(unsigned char *)0xf0000401 == 0x01))
- return 0; /* no, board is cpci405 */
- else
- return -1; /* yes, board is cterm-m2 */
-#endif
-}
-
-
-int cpci405_host(void)
-{
- if (mfdcr(strap) & PSR_PCI_ARBIT_EN)
- return -1; /* yes, board is cpci405 host */
- else
- return 0; /* no, board is cpci405 adapter */
-}
-
-
-int cpci405_version(void)
-{
- unsigned long cntrl0Reg;
- unsigned long value;
-
- /*
- * Setup GPIO pins (CS2/GPIO11 and CS3/GPIO12 as GPIO)
- */
- cntrl0Reg = mfdcr(cntrl0);
- mtdcr(cntrl0, cntrl0Reg | 0x03000000);
- out32(GPIO0_ODR, in32(GPIO0_ODR) & ~0x00180000);
- out32(GPIO0_TCR, in32(GPIO0_TCR) & ~0x00180000);
- udelay(1000); /* wait some time before reading input */
- value = in32(GPIO0_IR) & 0x00180000; /* get config bits */
-
- /*
- * Restore GPIO settings
- */
- mtdcr(cntrl0, cntrl0Reg);
-
- switch (value) {
- case 0x00180000:
- /* CS2==1 && CS3==1 -> version 1 */
- return 1;
- case 0x00080000:
- /* CS2==0 && CS3==1 -> version 2 */
- return 2;
- case 0x00100000:
- /* CS2==1 && CS3==0 -> version 3 */
- return 3;
- case 0x00000000:
- /* CS2==0 && CS3==0 -> version 4 */
- return 4;
- default:
- /* should not be reached! */
- return 2;
- }
-}
-
-
-int misc_init_f (void)
-{
- return 0; /* dummy implementation */
-}
-
-
-int misc_init_r (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
- unsigned long cntrl0Reg;
-
- /* adjust flash start and offset */
- gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize;
- gd->bd->bi_flashoffset = 0;
-
-#ifdef CONFIG_CPCI405_VER2
- {
- unsigned char *dst;
- ulong len = sizeof(fpgadata);
- int status;
- int index;
- int i;
-
- /*
- * On CPCI-405 version 2 the environment is saved in eeprom!
- * FPGA can be gzip compressed (malloc) and booted this late.
- */
-
- if (cpci405_version() >= 2) {
- /*
- * Setup GPIO pins (CS6+CS7 as GPIO)
- */
- cntrl0Reg = mfdcr(cntrl0);
- mtdcr(cntrl0, cntrl0Reg | 0x00300000);
-
- dst = malloc(CFG_FPGA_MAX_SIZE);
- if (gunzip (dst, CFG_FPGA_MAX_SIZE, (uchar *)fpgadata, &len) != 0) {
- printf ("GUNZIP ERROR - must RESET board to recover\n");
- do_reset (NULL, 0, 0, NULL);
- }
-
- status = fpga_boot(dst, len);
- if (status != 0) {
- printf("\nFPGA: Booting failed ");
- switch (status) {
- case ERROR_FPGA_PRG_INIT_LOW:
- printf("(Timeout: INIT not low after asserting PROGRAM*)\n ");
- break;
- case ERROR_FPGA_PRG_INIT_HIGH:
- printf("(Timeout: INIT not high after deasserting PROGRAM*)\n ");
- break;
- case ERROR_FPGA_PRG_DONE:
- printf("(Timeout: DONE not high after programming FPGA)\n ");
- break;
- }
-
- /* display infos on fpgaimage */
- index = 15;
- for (i=0; i<4; i++) {
- len = dst[index];
- printf("FPGA: %s\n", &(dst[index+1]));
- index += len+3;
- }
- putc ('\n');
- /* delayed reboot */
- for (i=20; i>0; i--) {
- printf("Rebooting in %2d seconds \r",i);
- for (index=0;index<1000;index++)
- udelay(1000);
- }
- putc ('\n');
- do_reset(NULL, 0, 0, NULL);
- }
-
- /* restore gpio/cs settings */
- mtdcr(cntrl0, cntrl0Reg);
-
- puts("FPGA: ");
-
- /* display infos on fpgaimage */
- index = 15;
- for (i=0; i<4; i++) {
- len = dst[index];
- printf("%s ", &(dst[index+1]));
- index += len+3;
- }
- putc ('\n');
-
- free(dst);
-
- /*
- * Reset FPGA via FPGA_DATA pin
- */
- SET_FPGA(FPGA_PRG | FPGA_CLK);
- udelay(1000); /* wait 1ms */
- SET_FPGA(FPGA_PRG | FPGA_CLK | FPGA_DATA);
- udelay(1000); /* wait 1ms */
-
- if (cpci405_version() == 3) {
- volatile unsigned short *fpga_mode = (unsigned short *)CFG_FPGA_BASE_ADDR;
- volatile unsigned char *leds = (unsigned char *)CFG_LED_ADDR;
-
- /*
- * Enable outputs in fpga on version 3 board
- */
- *fpga_mode |= CFG_FPGA_MODE_ENABLE_OUTPUT;
-
- /*
- * Set outputs to 0
- */
- *leds = 0x00;
-
- /*
- * Reset external DUART
- */
- *fpga_mode |= CFG_FPGA_MODE_DUART_RESET;
- udelay(100);
- *fpga_mode &= ~(CFG_FPGA_MODE_DUART_RESET);
- }
- }
- else {
- puts("\n*** U-Boot Version does not match Board Version!\n");
- puts("*** CPCI-405 Version 1.x detected!\n");
- puts("*** Please use correct U-Boot version (CPCI405 instead of CPCI4052)!\n\n");
- }
- }
-
-#else /* CONFIG_CPCI405_VER2 */
-
-#if 0 /* test-only: code-plug now not relavant for ip-address any more */
- /*
- * Generate last byte of ip-addr from code-plug @ 0xf0000400
- */
- if (ctermm2()) {
- char str[32];
- unsigned char ipbyte = *(unsigned char *)0xf0000400;
-
- /*
- * Only overwrite ip-addr with allowed values
- */
- if ((ipbyte != 0x00) && (ipbyte != 0xff)) {
- bd->bi_ip_addr = (bd->bi_ip_addr & 0xffffff00) | ipbyte;
- sprintf(str, "%ld.%ld.%ld.%ld",
- (bd->bi_ip_addr & 0xff000000) >> 24,
- (bd->bi_ip_addr & 0x00ff0000) >> 16,
- (bd->bi_ip_addr & 0x0000ff00) >> 8,
- (bd->bi_ip_addr & 0x000000ff));
- setenv("ipaddr", str);
- }
- }
-#endif
-
- if (cpci405_version() >= 2) {
- puts("\n*** U-Boot Version does not match Board Version!\n");
- puts("*** CPCI-405 Board Version 2.x detected!\n");
- puts("*** Please use correct U-Boot version (CPCI4052 instead of CPCI405)!\n\n");
- }
-
-#endif /* CONFIG_CPCI405_VER2 */
-
- /*
- * Select cts (and not dsr) on uart1
- */
- cntrl0Reg = mfdcr(cntrl0);
- mtdcr(cntrl0, cntrl0Reg | 0x00001000);
-
- return (0);
-}
-
-
-/*
- * Check Board Identity:
- */
-
-int checkboard (void)
-{
-#ifndef CONFIG_CPCI405_VER2
- int index;
- int len;
-#endif
- char str[64];
- int i = getenv_r ("serial#", str, sizeof(str));
- unsigned short ver;
-
- puts ("Board: ");
-
- if (i == -1) {
- puts ("### No HW ID - assuming CPCI405");
- } else {
- puts(str);
- }
-
- ver = cpci405_version();
- printf(" (Ver %d.x, ", ver);
-
-#if 0 /* test-only */
- if (ver >= 2) {
- volatile u16 *fpga_status = (u16 *)CFG_FPGA_BASE_ADDR + 1;
-
- if (*fpga_status & CFG_FPGA_STATUS_FLASH) {
- puts ("FLASH Bank B, ");
- } else {
- puts ("FLASH Bank A, ");
- }
- }
-#endif
-
- if (ctermm2()) {
- char str[4];
-
- /*
- * Read board-id and save in env-variable
- */
- sprintf(str, "%d", *(unsigned char *)0xf0000400);
- setenv("boardid", str);
- printf("CTERM-M2 - Id=%s)", str);
- } else {
- if (cpci405_host()) {
- puts ("PCI Host Version)");
- } else {
- puts ("PCI Adapter Version)");
- }
- }
-
-#ifndef CONFIG_CPCI405_VER2
- puts ("\nFPGA: ");
-
- /* display infos on fpgaimage */
- index = 15;
- for (i=0; i<4; i++) {
- len = fpgadata[index];
- printf("%s ", &(fpgadata[index+1]));
- index += len+3;
- }
-#endif
-
- putc ('\n');
-
- /*
- * Disable sleep mode in LXT971
- */
- lxt971_no_sleep();
-
- return 0;
-}
-
-/* ------------------------------------------------------------------------- */
-
-long int initdram (int board_type)
-{
- unsigned long val;
-
- mtdcr(memcfga, mem_mb0cf);
- val = mfdcr(memcfgd);
-
-#if 0
- printf("\nmb0cf=%x\n", val); /* test-only */
- printf("strap=%x\n", mfdcr(strap)); /* test-only */
-#endif
-
- return (4*1024*1024 << ((val & 0x000e0000) >> 17));
-}
-
-/* ------------------------------------------------------------------------- */
-
-int testdram (void)
-{
- /* TODO: XXX XXX XXX */
- printf ("test: 16 MB - ok\n");
-
- return (0);
-}
-
-/* ------------------------------------------------------------------------- */
-
-#ifdef CONFIG_CPCI405_VER2
-#ifdef CONFIG_IDE_RESET
-
-void ide_set_reset(int on)
-{
- volatile unsigned short *fpga_mode = (unsigned short *)CFG_FPGA_BASE_ADDR;
-
- /*
- * Assert or deassert CompactFlash Reset Pin
- */
- if (on) { /* assert RESET */
- *fpga_mode &= ~(CFG_FPGA_MODE_CF_RESET);
- } else { /* release RESET */
- *fpga_mode |= CFG_FPGA_MODE_CF_RESET;
- }
-}
-
-#endif /* CONFIG_IDE_RESET */
-#endif /* CONFIG_CPCI405_VER2 */
-
-
-#ifdef CONFIG_CPCI405AB
-
-#define ONE_WIRE_CLEAR (*(volatile unsigned short *)(CFG_FPGA_BASE_ADDR + CFG_FPGA_MODE) \
- |= CFG_FPGA_MODE_1WIRE_DIR)
-#define ONE_WIRE_SET (*(volatile unsigned short *)(CFG_FPGA_BASE_ADDR + CFG_FPGA_MODE) \
- &= ~CFG_FPGA_MODE_1WIRE_DIR)
-#define ONE_WIRE_GET (*(volatile unsigned short *)(CFG_FPGA_BASE_ADDR + CFG_FPGA_STATUS) \
- & CFG_FPGA_MODE_1WIRE)
-
-/*
- * Generate a 1-wire reset, return 1 if no presence detect was found,
- * return 0 otherwise.
- * (NOTE: Does not handle alarm presence from DS2404/DS1994)
- */
-int OWTouchReset(void)
-{
- int result;
-
- ONE_WIRE_CLEAR;
- udelay(480);
- ONE_WIRE_SET;
- udelay(70);
-
- result = ONE_WIRE_GET;
-
- udelay(410);
- return result;
-}
-
-
-/*
- * Send 1 a 1-wire write bit.
- * Provide 10us recovery time.
- */
-void OWWriteBit(int bit)
-{
- if (bit) {
- /*
- * write '1' bit
- */
- ONE_WIRE_CLEAR;
- udelay(6);
- ONE_WIRE_SET;
- udelay(64);
- } else {
- /*
- * write '0' bit
- */
- ONE_WIRE_CLEAR;
- udelay(60);
- ONE_WIRE_SET;
- udelay(10);
- }
-}
-
-
-/*
- * Read a bit from the 1-wire bus and return it.
- * Provide 10us recovery time.
- */
-int OWReadBit(void)
-{
- int result;
-
- ONE_WIRE_CLEAR;
- udelay(6);
- ONE_WIRE_SET;
- udelay(9);
-
- result = ONE_WIRE_GET;
-
- udelay(55);
- return result;
-}
-
-
-void OWWriteByte(int data)
-{
- int loop;
-
- for (loop=0; loop<8; loop++) {
- OWWriteBit(data & 0x01);
- data >>= 1;
- }
-}
-
-
-int OWReadByte(void)
-{
- int loop, result = 0;
-
- for (loop=0; loop<8; loop++) {
- result >>= 1;
- if (OWReadBit()) {
- result |= 0x80;
- }
- }
-
- return result;
-}
-
-
-int do_onewire(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- volatile unsigned short val;
- int result;
- int i;
- unsigned char ow_id[6];
- char str[32];
- unsigned char ow_crc;
-
- /*
- * Clear 1-wire bit (open drain with pull-up)
- */
- val = *(volatile unsigned short *)0xf0400000;
- val &= ~0x1000; /* clear 1-wire bit */
- *(volatile unsigned short *)0xf0400000 = val;
-
- result = OWTouchReset();
- if (result != 0) {
- puts("No 1-wire device detected!\n");
- }
-
- OWWriteByte(0x33); /* send read rom command */
- OWReadByte(); /* skip family code ( == 0x01) */
- for (i=0; i<6; i++) {
- ow_id[i] = OWReadByte();
- }
- ow_crc = OWReadByte(); /* read crc */
-
- sprintf(str, "%08X%04X", *(unsigned int *)&ow_id[0], *(unsigned short *)&ow_id[4]);
- printf("Setting environment variable 'ow_id' to %s\n", str);
- setenv("ow_id", str);
-
- return 0;
-}
-U_BOOT_CMD(
- onewire, 1, 1, do_onewire,
- "onewire - Read 1-write ID\n",
- NULL
- );
-
-
-#define CFG_I2C_EEPROM_ADDR_2 0x51 /* EEPROM CAT28WC32 */
-#define CFG_ENV_SIZE_2 0x800 /* 2048 bytes may be used for env vars*/
-
-/*
- * Write backplane ip-address...
- */
-int do_get_bpip(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- bd_t *bd = gd->bd;
- char *buf;
- ulong crc;
- char str[32];
- char *ptr;
- IPaddr_t ipaddr;
-
- buf = malloc(CFG_ENV_SIZE_2);
- if (eeprom_read(CFG_I2C_EEPROM_ADDR_2, 0, (uchar *)buf, CFG_ENV_SIZE_2)) {
- puts("\nError reading backplane EEPROM!\n");
- } else {
- crc = crc32(0, (uchar *)(buf+4), CFG_ENV_SIZE_2-4);
- if (crc != *(ulong *)buf) {
- printf("ERROR: crc mismatch %08lx %08lx\n", crc, *(ulong *)buf);
- return -1;
- }
-
- /*
- * Find bp_ip
- */
- ptr = strstr(buf+4, "bp_ip=");
- if (ptr == NULL) {
- printf("ERROR: bp_ip not found!\n");
- return -1;
- }
- ptr += 6;
- ipaddr = string_to_ip(ptr);
-
- /*
- * Update whole ip-addr
- */
- bd->bi_ip_addr = ipaddr;
- sprintf(str, "%ld.%ld.%ld.%ld",
- (bd->bi_ip_addr & 0xff000000) >> 24,
- (bd->bi_ip_addr & 0x00ff0000) >> 16,
- (bd->bi_ip_addr & 0x0000ff00) >> 8,
- (bd->bi_ip_addr & 0x000000ff));
- setenv("ipaddr", str);
- printf("Updated ip_addr from bp_eeprom to %s!\n", str);
- }
-
- free(buf);
-
- return 0;
-}
-U_BOOT_CMD(
- getbpip, 1, 1, do_get_bpip,
- "getbpip - Update IP-Address with Backplane IP-Address\n",
- NULL
- );
-
-/*
- * Set and print backplane ip...
- */
-int do_set_bpip(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- char *buf;
- char str[32];
- ulong crc;
-
- if (argc < 2) {
- puts("ERROR!\n");
- return -1;
- }
-
- printf("Setting bp_ip to %s\n", argv[1]);
- buf = malloc(CFG_ENV_SIZE_2);
- memset(buf, 0, CFG_ENV_SIZE_2);
- sprintf(str, "bp_ip=%s", argv[1]);
- strcpy(buf+4, str);
- crc = crc32(0, (uchar *)(buf+4), CFG_ENV_SIZE_2-4);
- *(ulong *)buf = crc;
-
- if (eeprom_write(CFG_I2C_EEPROM_ADDR_2, 0, (uchar *)buf, CFG_ENV_SIZE_2)) {
- puts("\nError writing backplane EEPROM!\n");
- }
-
- free(buf);
-
- return 0;
-}
-U_BOOT_CMD(
- setbpip, 2, 1, do_set_bpip,
- "setbpip - Write Backplane IP-Address\n",
- NULL
- );
-
-#endif /* CONFIG_CPCI405AB */
diff --git a/board/esd/cpci405/flash.c b/board/esd/cpci405/flash.c
deleted file mode 100644
index e766895bb0..0000000000
--- a/board/esd/cpci405/flash.c
+++ /dev/null
@@ -1,154 +0,0 @@
-/*
- * (C) Copyright 2001-2003
- * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <ppc4xx.h>
-#include <asm/processor.h>
-
-/*
- * include common flash code (for esd boards)
- */
-#include "../common/flash.c"
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (vu_long * addr, flash_info_t * info);
-static void flash_get_offsets (ulong base, flash_info_t * info);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long calc_size(unsigned long size)
-{
- switch (size) {
- case 1 << 20:
- return 0;
- case 2 << 20:
- return 1;
- case 4 << 20:
- return 2;
- case 8 << 20:
- return 3;
- case 16 << 20:
- return 4;
- default:
- return 0;
- }
-}
-
-
-unsigned long flash_init (void)
-{
- unsigned long size_b0, size_b1;
- int i;
- uint pbcr;
- unsigned long base_b0, base_b1;
-
- /* Init: no FLASHes known */
- for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* Static FLASH Bank configuration here - FIXME XXX */
-
- base_b0 = FLASH_BASE0_PRELIM;
- size_b0 = flash_get_size ((vu_long *) base_b0, &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size_b0, size_b0 << 20);
- }
-
- base_b1 = FLASH_BASE1_PRELIM;
- size_b1 = flash_get_size ((vu_long *) base_b1, &flash_info[1]);
-
- /* Re-do sizing to get full correct info */
-
- if (size_b1) {
- if (size_b1 < (1 << 20)) {
- /* minimum CS size on PPC405GP is 1MB !!! */
- size_b1 = 1 << 20;
- }
- base_b1 = -size_b1;
- mtdcr (ebccfga, pb0cr);
- pbcr = mfdcr (ebccfgd);
- mtdcr (ebccfga, pb0cr);
- pbcr = (pbcr & 0x0001ffff) | base_b1 | (calc_size(size_b1) << 17);
- mtdcr (ebccfgd, pbcr);
-#if 0 /* test-only */
- printf("size_b1=%x base_b1=%x pb1cr = %x\n",
- size_b1, base_b1, pbcr); /* test-only */
-#endif
- }
-
- if (size_b0) {
- if (size_b0 < (1 << 20)) {
- /* minimum CS size on PPC405GP is 1MB !!! */
- size_b0 = 1 << 20;
- }
- base_b0 = base_b1 - size_b0;
- mtdcr (ebccfga, pb1cr);
- pbcr = mfdcr (ebccfgd);
- mtdcr (ebccfga, pb1cr);
- pbcr = (pbcr & 0x0001ffff) | base_b0 | (calc_size(size_b0) << 17);
- mtdcr (ebccfgd, pbcr);
-#if 0 /* test-only */
- printf("size_b0=%x base_b0=%x pb0cr = %x\n",
- size_b0, base_b0, pbcr); /* test-only */
-#endif
- }
-
- size_b0 = flash_get_size ((vu_long *) base_b0, &flash_info[0]);
-
- flash_get_offsets (base_b0, &flash_info[0]);
-
- /* monitor protection ON by default */
- flash_protect (FLAG_PROTECT_SET,
- base_b0 + size_b0 - monitor_flash_len,
- base_b0 + size_b0 - 1, &flash_info[0]);
-
- if (size_b1) {
- /* Re-do sizing to get full correct info */
- size_b1 = flash_get_size ((vu_long *) base_b1, &flash_info[1]);
-
- flash_get_offsets (base_b1, &flash_info[1]);
-
- /* monitor protection ON by default */
- flash_protect (FLAG_PROTECT_SET,
- base_b1 + size_b1 - monitor_flash_len,
- base_b1 + size_b1 - 1, &flash_info[1]);
- /* monitor protection OFF by default (one is enough) */
- flash_protect (FLAG_PROTECT_CLEAR,
- base_b0 + size_b0 - monitor_flash_len,
- base_b0 + size_b0 - 1, &flash_info[0]);
- } else {
- flash_info[1].flash_id = FLASH_UNKNOWN;
- flash_info[1].sector_count = -1;
- }
-
- flash_info[0].size = size_b0;
- flash_info[1].size = size_b1;
-
- return (size_b0 + size_b1);
-}
diff --git a/board/esd/cpci405/fpgadata_cpci405.c b/board/esd/cpci405/fpgadata_cpci405.c
deleted file mode 100644
index 20e61c1fa7..0000000000
--- a/board/esd/cpci405/fpgadata_cpci405.c
+++ /dev/null
@@ -1,342 +0,0 @@
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diff --git a/board/esd/cpci405/fpgadata_cpci4052.c b/board/esd/cpci405/fpgadata_cpci4052.c
deleted file mode 100644
index 7204028408..0000000000
--- a/board/esd/cpci405/fpgadata_cpci4052.c
+++ /dev/null
@@ -1,765 +0,0 @@
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diff --git a/board/esd/cpci405/fpgadata_cpci405ab.c b/board/esd/cpci405/fpgadata_cpci405ab.c
deleted file mode 100644
index 3f78473dc5..0000000000
--- a/board/esd/cpci405/fpgadata_cpci405ab.c
+++ /dev/null
@@ -1,1285 +0,0 @@
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- 0xb9,0x6a,0xec,0xc6,0x9f,0xbc,0x3c,0x76,0xe6,0xdc,0xca,0xaa,0xb1,0xa5,0xfb,0xde,
- 0xf8,0xe4,0x4c,0x06,0x97,0x33,0xf7,0x99,0x37,0xb6,0x64,0xac,0x68,0xec,0xcc,0xe8,
- 0xc9,0x79,0x63,0x4b,0x8f,0xbe,0x71,0xfa,0x4c,0x06,0x97,0x33,0x6d,0xae,0xe1,0xb8,
- 0x3c,0x20,0x70,0xd9,0x7f,0x15,0xc7,0xe5,0x9b,0x19,0x2e,0x3f,0x70,0xd6,0x69,0x43,
- 0xda,0x61,0x1b,0x54,0x1a,0xee,0xa9,0xbd,0x96,0xa1,0xb1,0x2b,0x87,0x99,0xe1,0xb4,
- 0x41,0xbf,0xe5,0x38,0xb0,0x09,0x46,0xa6,0xd3,0xed,0xec,0x55,0xe0,0xe8,0x33,0xc9,
- 0x70,0x3e,0xdc,0xed,0x19,0x30,0xd5,0xb4,0x0c,0xbe,0xc6,0x0e,0x73,0xc3,0xf9,0x50,
- 0xf1,0x92,0x4d,0x36,0xbc,0xa6,0xd3,0xe7,0x2f,0x6f,0x65,0xf7,0x98,0x31,0x78,0xfe,
- 0xeb,0xc3,0x20,0x8e,0xa1,0xc8,0x6e,0x4a,0xec,0x36,0x17,0xfd,0x1a,0x6e,0x78,0x7b,
- 0xed,0x36,0xee,0x76,0xb2,0x0d,0x76,0x19,0xb3,0x35,0xf7,0xba,0x30,0x37,0xa6,0x1e,
- 0xb4,0xaf,0x90,0x3f,0xfd,0xf9,0xa8,0x93,0x9f,0x4f,0xe6,0x8a,0xdd,0x1f,0x0d,0x72,
- 0x43,0xf8,0x34,0xbe,0x8f,0xcf,0x87,0x1b,0xce,0xf3,0xf9,0x3e,0x30,0x99,0x85,0x75,
- 0x9f,0x75,0xa1,0x2f,0x7b,0xce,0x4e,0x7f,0xb0,0xf1,0x7f,0xf2,0x7c,0xf8,0x7c,0x7d,
- 0xc9,0x73,0x76,0x5a,0x68,0xac,0x46,0xf7,0x65,0x1f,0x91,0xd3,0xfb,0x53,0x3e,0xb5,
- 0xb5,0x7f,0xe4,0x8f,0x3e,0xdf,0x9f,0x7a,0x9b,0xff,0xc6,0x4f,0xfd,0xd8,0xd8,0x98,
- 0x79,0x71,0xe3,0xff,0xd3,0x6d,0x48,0xf6,0x12,0x1e,0x6f,0x64,0x1a,0x89,0xa5,0x37,
- 0xf1,0x5d,0x1d,0xbf,0x06,0xff,0x0b,0x6b,0x59,0xbb,0x88,0xe1,0x7c,0xbe,0x74,0x2d,
- 0xdb,0x0d,0xbe,0x7c,0x05,0x66,0x5a,0xa9,0x99,0x25,0xac,0x4e,0x58,0xd4,0x81,0x3f,
- 0x65,0x2d,0x67,0xda,0x88,0xb5,0xfc,0x7d,0x5c,0xcb,0xd6,0x12,0x9e,0xb4,0x96,0xd5,
- 0x3f,0xb6,0x96,0x9d,0x36,0x7f,0xe4,0xf9,0x8c,0x5b,0xcb,0xc0,0xd7,0xb2,0xb5,0x84,
- 0xad,0x45,0x8d,0x46,0xaf,0xf2,0x27,0xdf,0xe7,0x4f,0xf1,0x75,0x7f,0xca,0x73,0x86,
- 0x0c,0x71,0xbe,0xc8,0xe7,0xab,0xb5,0xfc,0xff,0xbe,0x36,0xff,0xf9,0x27,0x04,0xba,
- 0x44,0xf8,0xff,0x46,0xae,0xff,0x2f,0xfe,0xd3,0xaf,0x3e,0x5f,0x7d,0xbe,0xfa,0x7c,
- 0xf5,0xf9,0xea,0xf3,0xd5,0xe7,0xab,0xcf,0x57,0x9f,0xff,0x5f,0x7c,0x78,0xbc,0x44,
- 0x78,0xbc,0x64,0xfc,0x3f,0xdd,0x97,0xaf,0x3e,0x5f,0x7d,0xbe,0xfa,0x7c,0xf5,0xf9,
- 0xea,0xf3,0xd5,0xe7,0xab,0xcf,0x57,0x9f,0xff,0xbb,0x3f,0x21,0x2e,0x0c,0x7b,0xa3,
- 0x36,0x04,0xbc,0xa8,0x2b,0x87,0xc0,0xc8,0xfb,0xd3,0xfe,0x1d,0x6f,0xef,0x0a,0x41,
- 0x42,0xca,0xdc,0xa7,0xe7,0x1f,0x27,0xf6,0xf5,0xff,0x02,0xd6,0x2c,0x67,0x26,0xbd,
- 0xa4,0x00,0x00,
diff --git a/board/esd/cpci405/u-boot.lds b/board/esd/cpci405/u-boot.lds
deleted file mode 100644
index f7a20d1da2..0000000000
--- a/board/esd/cpci405/u-boot.lds
+++ /dev/null
@@ -1,150 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- .resetvec 0xFFFFFFFC :
- {
- *(.resetvec)
- } = 0xffff
-
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/ppc4xx/start.o (.text)
- cpu/ppc4xx/traps.o (.text)
- cpu/ppc4xx/interrupts.o (.text)
- cpu/ppc4xx/serial.o (.text)
- cpu/ppc4xx/cpu_init.o (.text)
- cpu/ppc4xx/speed.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/extable.o (.text)
- lib_generic/zlib.o (.text)
-
-/* . = env_offset;*/
-/* common/environment.o(.text)*/
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/esd/cpci440/Makefile b/board/esd/cpci440/Makefile
deleted file mode 100644
index 84d44fbf4f..0000000000
--- a/board/esd/cpci440/Makefile
+++ /dev/null
@@ -1,47 +0,0 @@
-#
-# (C) Copyright 2002
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o strataflash.o ../common/misc.o
-SOBJS = init.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/esd/cpci440/config.mk b/board/esd/cpci440/config.mk
deleted file mode 100644
index 8e5f63fe48..0000000000
--- a/board/esd/cpci440/config.mk
+++ /dev/null
@@ -1,45 +0,0 @@
-#
-# (C) Copyright 2002
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# esd ADCIOP boards
-#
-
-#TEXT_BASE = 0xFFFE0000
-
-ifeq ($(ramsym),1)
-TEXT_BASE = 0x07FD0000
-else
-TEXT_BASE = 0xFFFC0000
-#TEXT_BASE = 0x01fc0000
-endif
-
-PLATFORM_CPPFLAGS += -DCONFIG_440=1
-
-ifeq ($(debug),1)
-PLATFORM_CPPFLAGS += -DDEBUG
-endif
-
-ifeq ($(dbcr),1)
-PLATFORM_CPPFLAGS += -DCFG_INIT_DBCR=0x8cff0000
-endif
diff --git a/board/esd/cpci440/cpci440.c b/board/esd/cpci440/cpci440.c
deleted file mode 100644
index 43d8a3b3bf..0000000000
--- a/board/esd/cpci440/cpci440.c
+++ /dev/null
@@ -1,152 +0,0 @@
-/*
- * (C) Copyright 2002
- * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-
-#include <common.h>
-#include <asm/processor.h>
-
-
-extern void lxt971_no_sleep(void);
-
-
-long int fixed_sdram( void );
-
-int board_early_init_f (void)
-{
- uint reg;
-
- /*--------------------------------------------------------------------
- * Setup the external bus controller/chip selects
- *-------------------------------------------------------------------*/
- mtdcr( ebccfga, xbcfg );
- reg = mfdcr( ebccfgd );
- mtdcr( ebccfgd, reg | 0x04000000 ); /* Set ATC */
-
- mtebc( pb0ap, 0x92015480 ); /* FLASH/SRAM */
- mtebc( pb0cr, 0xFF87A000 ); /* BAS=0xff8 8MB R/W 16-bit */
- /* test-only: other regs still missing... */
-
- /*--------------------------------------------------------------------
- * Setup the interrupt controller polarities, triggers, etc.
- *-------------------------------------------------------------------*/
- mtdcr( uic0sr, 0xffffffff ); /* clear all */
- mtdcr( uic0er, 0x00000000 ); /* disable all */
- mtdcr( uic0cr, 0x00000009 ); /* SMI & UIC1 crit are critical */
- mtdcr( uic0pr, 0xfffffe13 ); /* per ref-board manual */
- mtdcr( uic0tr, 0x01c00008 ); /* per ref-board manual */
- mtdcr( uic0vr, 0x00000001 ); /* int31 highest, base=0x000 */
- mtdcr( uic0sr, 0xffffffff ); /* clear all */
-
- mtdcr( uic1sr, 0xffffffff ); /* clear all */
- mtdcr( uic1er, 0x00000000 ); /* disable all */
- mtdcr( uic1cr, 0x00000000 ); /* all non-critical */
- mtdcr( uic1pr, 0xffffe0ff ); /* per ref-board manual */
- mtdcr( uic1tr, 0x00ffc000 ); /* per ref-board manual */
- mtdcr( uic1vr, 0x00000001 ); /* int31 highest, base=0x000 */
- mtdcr( uic1sr, 0xffffffff ); /* clear all */
-
- return 0;
-}
-
-
-int checkboard (void)
-{
- sys_info_t sysinfo;
- get_sys_info(&sysinfo);
-
- printf("Board: esd CPCI-440\n");
- printf("\tVCO: %lu MHz\n", sysinfo.freqVCOMhz/1000000);
- printf("\tCPU: %lu MHz\n", sysinfo.freqProcessor/1000000);
- printf("\tPLB: %lu MHz\n", sysinfo.freqPLB/1000000);
- printf("\tOPB: %lu MHz\n", sysinfo.freqOPB/1000000);
- printf("\tEPB: %lu MHz\n", sysinfo.freqEPB/1000000);
-
- /*
- * Disable sleep mode in LXT971
- */
- lxt971_no_sleep();
-
- return (0);
-}
-
-
-long int initdram (int board_type)
-{
- long dram_size = 0;
-
- dram_size = fixed_sdram();
- return dram_size;
-}
-
-
-/*************************************************************************
- * fixed sdram init -- doesn't use serial presence detect.
- *
- * Assumes: 64 MB, non-ECC, non-registered
- * PLB @ 133 MHz
- *
- ************************************************************************/
-long int fixed_sdram( void )
-{
- uint reg;
-
-#if 1 /* test-only */
- /*--------------------------------------------------------------------
- * Setup some default
- *------------------------------------------------------------------*/
- mtsdram( mem_uabba, 0x00000000 ); /* ubba=0 (default) */
- mtsdram( mem_slio, 0x00000000 ); /* rdre=0 wrre=0 rarw=0 */
- mtsdram( mem_devopt,0x00000000 ); /* dll=0 ds=0 (normal) */
- mtsdram( mem_wddctr,0x40000000 ); /* wrcp=0 dcd=0 */
- mtsdram( mem_clktr, 0x40000000 ); /* clkp=1 (90 deg wr) dcdt=0 */
-
- /*--------------------------------------------------------------------
- * Setup for board-specific specific mem
- *------------------------------------------------------------------*/
- /*
- * Following for CAS Latency = 2.5 @ 133 MHz PLB
- */
- mtsdram( mem_b0cr, 0x00082001 );/* SDBA=0x000, 64MB, Mode 2, enabled*/
- mtsdram( mem_tr0, 0x410a4012 );/* WR=2 WD=1 CL=2.5 PA=3 CP=4 LD=2 */
- /* RA=10 RD=3 */
- mtsdram( mem_tr1, 0x8080082f );/* SS=T2 SL=STAGE 3 CD=1 CT=0x02f */
- mtsdram( mem_rtr, 0x08200000 );/* Rate 15.625 ns @ 133 MHz PLB */
- mtsdram( mem_cfg1, 0x00000000 );/* Self-refresh exit, disable PM */
- udelay( 400 ); /* Delay 200 usecs (min) */
-
- /*--------------------------------------------------------------------
- * Enable the controller, then wait for DCEN to complete
- *------------------------------------------------------------------*/
- mtsdram( mem_cfg0, 0x86000000 );/* DCEN=1, PMUD=1, 64-bit */
- for(;;)
- {
- mfsdram( mem_mcsts, reg );
- if( reg & 0x80000000 )
- break;
- }
-
- return( 64 * 1024 * 1024 ); /* 64 MB */
-#else
- return( 32 * 1024 * 1024 ); /* 64 MB */
-#endif
-}
diff --git a/board/esd/cpci440/init.S b/board/esd/cpci440/init.S
deleted file mode 100644
index 82f37fd996..0000000000
--- a/board/esd/cpci440/init.S
+++ /dev/null
@@ -1,94 +0,0 @@
-/*
-* Copyright (C) 2002 Scott McNutt <smcnutt@artesyncp.com>
-*
-* See file CREDITS for list of people who contributed to this
-* project.
-*
-* This program is free software; you can redistribute it and/or
-* modify it under the terms of the GNU General Public License as
-* published by the Free Software Foundation; either version 2 of
-* the License, or (at your option) any later version.
-*
-* This program is distributed in the hope that it will be useful,
-* but WITHOUT ANY WARRANTY; without even the implied warranty of
-* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-* GNU General Public License for more details.
-*
-* You should have received a copy of the GNU General Public License
-* along with this program; if not, write to the Free Software
-* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-* MA 02111-1307 USA
-*/
-
-#include <ppc_asm.tmpl>
-#include <config.h>
-
-/* General */
-#define TLB_VALID 0x00000200
-
-/* Supported page sizes */
-
-#define SZ_1K 0x00000000
-#define SZ_4K 0x00000010
-#define SZ_16K 0x00000020
-#define SZ_64K 0x00000030
-#define SZ_256K 0x00000040
-#define SZ_1M 0x00000050
-#define SZ_16M 0x00000070
-#define SZ_256M 0x00000090
-
-/* Storage attributes */
-#define SA_W 0x00000800 /* Write-through */
-#define SA_I 0x00000400 /* Caching inhibited */
-#define SA_M 0x00000200 /* Memory coherence */
-#define SA_G 0x00000100 /* Guarded */
-#define SA_E 0x00000080 /* Endian */
-
-/* Access control */
-#define AC_X 0x00000024 /* Execute */
-#define AC_W 0x00000012 /* Write */
-#define AC_R 0x00000009 /* Read */
-
-/* Some handy macros */
-
-#define EPN(e) ((e) & 0xfffffc00)
-#define TLB0(epn,sz) ( (EPN((epn)) | (sz) | TLB_VALID ) )
-#define TLB1(rpn,erpn) ( ((rpn)&0xfffffc00) | (erpn) )
-#define TLB2(a) ( (a)&0x00000fbf )
-
-#define tlbtab_start\
- mflr r1 ;\
- bl 0f ;
-
-#define tlbtab_end\
- .long 0, 0, 0 ; \
-0: mflr r0 ; \
- mtlr r1 ; \
- blr ;
-
-#define tlbentry(epn,sz,rpn,erpn,attr)\
- .long TLB0(epn,sz),TLB1(rpn,erpn),TLB2(attr)
-
-
-/**************************************************************************
- * TLB TABLE
- *
- * This table is used by the cpu boot code to setup the initial tlb
- * entries. Rather than make broad assumptions in the cpu source tree,
- * this table lets each board set things up however they like.
- *
- * Pointer to the table is returned in r1
- *
- *************************************************************************/
-
- .section .bootpg,"ax"
- .globl tlbtab
-
-tlbtab:
- tlbtab_start
- tlbentry( 0xf0000000, SZ_256M, 0xf0000000, 1, AC_R|AC_W|AC_X|SA_G|SA_I)
- tlbentry( CFG_PERIPHERAL_BASE, SZ_256M, 0x40000000, 1, AC_R|AC_W|SA_G|SA_I)
- tlbentry( CFG_ISRAM_BASE, SZ_4K, 0x80000000, 0, AC_R|AC_W|AC_X )
- tlbentry( CFG_ISRAM_BASE + 0x1000, SZ_4K, 0x80001000, 0, AC_R|AC_W|AC_X )
- tlbentry( CFG_SDRAM_BASE, SZ_256M, 0x00000000, 0, AC_R|AC_W|AC_X )
- tlbtab_end
diff --git a/board/esd/cpci440/strataflash.c b/board/esd/cpci440/strataflash.c
deleted file mode 100644
index 2f055c20d5..0000000000
--- a/board/esd/cpci440/strataflash.c
+++ /dev/null
@@ -1,755 +0,0 @@
-/*
- * (C) Copyright 2002
- * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/processor.h>
-
-#undef DEBUG_FLASH
-/*
- * This file implements a Common Flash Interface (CFI) driver for U-Boot.
- * The width of the port and the width of the chips are determined at initialization.
- * These widths are used to calculate the address for access CFI data structures.
- * It has been tested on an Intel Strataflash implementation.
- *
- * References
- * JEDEC Standard JESD68 - Common Flash Interface (CFI)
- * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
- * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
- * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
- *
- * TODO
- * Use Primary Extended Query table (PRI) and Alternate Algorithm Query Table (ALT) to determine if protection is available
- * Add support for other command sets Use the PRI and ALT to determine command set
- * Verify erase and program timeouts.
- */
-
-#define FLASH_CMD_CFI 0x98
-#define FLASH_CMD_READ_ID 0x90
-#define FLASH_CMD_RESET 0xff
-#define FLASH_CMD_BLOCK_ERASE 0x20
-#define FLASH_CMD_ERASE_CONFIRM 0xD0
-#define FLASH_CMD_WRITE 0x40
-#define FLASH_CMD_PROTECT 0x60
-#define FLASH_CMD_PROTECT_SET 0x01
-#define FLASH_CMD_PROTECT_CLEAR 0xD0
-#define FLASH_CMD_CLEAR_STATUS 0x50
-#define FLASH_CMD_WRITE_TO_BUFFER 0xE8
-#define FLASH_CMD_WRITE_BUFFER_CONFIRM 0xD0
-
-#define FLASH_STATUS_DONE 0x80
-#define FLASH_STATUS_ESS 0x40
-#define FLASH_STATUS_ECLBS 0x20
-#define FLASH_STATUS_PSLBS 0x10
-#define FLASH_STATUS_VPENS 0x08
-#define FLASH_STATUS_PSS 0x04
-#define FLASH_STATUS_DPS 0x02
-#define FLASH_STATUS_R 0x01
-#define FLASH_STATUS_PROTECT 0x01
-
-#define FLASH_OFFSET_CFI 0x55
-#define FLASH_OFFSET_CFI_RESP 0x10
-#define FLASH_OFFSET_WTOUT 0x1F
-#define FLASH_OFFSET_WBTOUT 0x20
-#define FLASH_OFFSET_ETOUT 0x21
-#define FLASH_OFFSET_CETOUT 0x22
-#define FLASH_OFFSET_WMAX_TOUT 0x23
-#define FLASH_OFFSET_WBMAX_TOUT 0x24
-#define FLASH_OFFSET_EMAX_TOUT 0x25
-#define FLASH_OFFSET_CEMAX_TOUT 0x26
-#define FLASH_OFFSET_SIZE 0x27
-#define FLASH_OFFSET_INTERFACE 0x28
-#define FLASH_OFFSET_BUFFER_SIZE 0x2A
-#define FLASH_OFFSET_NUM_ERASE_REGIONS 0x2C
-#define FLASH_OFFSET_ERASE_REGIONS 0x2D
-#define FLASH_OFFSET_PROTECT 0x02
-#define FLASH_OFFSET_USER_PROTECTION 0x85
-#define FLASH_OFFSET_INTEL_PROTECTION 0x81
-
-
-#define FLASH_MAN_CFI 0x01000000
-
-
-typedef union {
- unsigned char c;
- unsigned short w;
- unsigned long l;
-} cfiword_t;
-
-typedef union {
- unsigned char * cp;
- unsigned short *wp;
- unsigned long *lp;
-} cfiptr_t;
-
-#define NUM_ERASE_REGIONS 4
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-
-
-static void flash_add_byte(flash_info_t *info, cfiword_t * cword, uchar c);
-static void flash_make_cmd(flash_info_t * info, uchar cmd, void * cmdbuf);
-static void flash_write_cmd(flash_info_t * info, int sect, uchar offset, uchar cmd);
-static int flash_isequal(flash_info_t * info, int sect, uchar offset, uchar cmd);
-static int flash_isset(flash_info_t * info, int sect, uchar offset, uchar cmd);
-static int flash_detect_cfi(flash_info_t * info);
-static ulong flash_get_size (ulong base, int banknum);
-static int flash_write_cfiword (flash_info_t *info, ulong dest, cfiword_t cword);
-static int flash_full_status_check(flash_info_t * info, ulong sector, ulong tout, char * prompt);
-#ifdef CFG_FLASH_USE_BUFFER_WRITE
-static int flash_write_cfibuffer(flash_info_t * info, ulong dest, uchar * cp, int len);
-#endif
-/*-----------------------------------------------------------------------
- * create an address based on the offset and the port width
- */
-inline uchar * flash_make_addr(flash_info_t * info, int sect, int offset)
-{
- return ((uchar *)(info->start[sect] + (offset * info->portwidth)));
-}
-/*-----------------------------------------------------------------------
- * read a character at a port width address
- */
-inline uchar flash_read_uchar(flash_info_t * info, uchar offset)
-{
- uchar *cp;
- cp = flash_make_addr(info, 0, offset);
- return (cp[info->portwidth - 1]);
-}
-
-/*-----------------------------------------------------------------------
- * read a short word by swapping for ppc format.
- */
-ushort flash_read_ushort(flash_info_t * info, int sect, uchar offset)
-{
- uchar * addr;
-
- addr = flash_make_addr(info, sect, offset);
- return ((addr[(2*info->portwidth) - 1] << 8) | addr[info->portwidth - 1]);
-
-}
-
-/*-----------------------------------------------------------------------
- * read a long word by picking the least significant byte of each maiximum
- * port size word. Swap for ppc format.
- */
-ulong flash_read_long(flash_info_t * info, int sect, uchar offset)
-{
- uchar * addr;
-
- addr = flash_make_addr(info, sect, offset);
- return ( (addr[(2*info->portwidth) - 1] << 24 ) | (addr[(info->portwidth) -1] << 16) |
- (addr[(4*info->portwidth) - 1] << 8) | addr[(3*info->portwidth) - 1]);
-
-}
-
-/*-----------------------------------------------------------------------
- */
-unsigned long flash_init (void)
-{
- unsigned long size;
- int i;
- unsigned long address;
-
-
- /* The flash is positioned back to back, with the demultiplexing of the chip
- * based on the A24 address line.
- *
- */
-
- address = CFG_FLASH_BASE;
- size = 0;
-
- /* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- size += flash_info[i].size = flash_get_size(address, i);
- address += CFG_FLASH_INCREMENT;
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n",i,
- flash_info[0].size, flash_info[i].size<<20);
- }
- }
-
-#if 0 /* test-only */
- /* Monitor protection ON by default */
-#if (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
- for(i=0; flash_info[0].start[i] < CFG_MONITOR_BASE+monitor_flash_len-1; i++)
- (void)flash_real_protect(&flash_info[0], i, 1);
-#endif
-#endif
-
- return (size);
-}
-
-/*-----------------------------------------------------------------------
- */
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- int rcode = 0;
- int prot;
- int sect;
-
- if( info->flash_id != FLASH_MAN_CFI) {
- printf ("Can't erase unknown flash type - aborted\n");
- return 1;
- }
- if ((s_first < 0) || (s_first > s_last)) {
- printf ("- no sectors to erase\n");
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
-
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- flash_write_cmd(info, sect, 0, FLASH_CMD_CLEAR_STATUS);
- flash_write_cmd(info, sect, 0, FLASH_CMD_BLOCK_ERASE);
- flash_write_cmd(info, sect, 0, FLASH_CMD_ERASE_CONFIRM);
-
- if(flash_full_status_check(info, sect, info->erase_blk_tout, "erase")) {
- rcode = 1;
- } else
- printf(".");
- }
- }
- printf (" done\n");
- return rcode;
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t *info)
-{
- int i;
-
- if (info->flash_id != FLASH_MAN_CFI) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- printf("CFI conformant FLASH (%d x %d)",
- (info->portwidth << 3 ), (info->chipwidth << 3 ));
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
- printf(" Erase timeout %ld ms, write timeout %ld ms, buffer write timeout %ld ms, buffer size %d\n",
- info->erase_blk_tout, info->write_tout, info->buffer_write_tout, info->buffer_size);
-
- printf (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n");
- printf (" %08lX%5s",
- info->start[i],
- info->protect[i] ? " (RO)" : " "
- );
- }
- printf ("\n");
- return;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong wp;
- ulong cp;
- int aln;
- cfiword_t cword;
- int i, rc;
-
- /* get lower aligned address */
- wp = (addr & ~(info->portwidth - 1));
-
- /* handle unaligned start */
- if((aln = addr - wp) != 0) {
- cword.l = 0;
- cp = wp;
- for(i=0;i<aln; ++i, ++cp)
- flash_add_byte(info, &cword, (*(uchar *)cp));
-
- for(; (i< info->portwidth) && (cnt > 0) ; i++) {
- flash_add_byte(info, &cword, *src++);
- cnt--;
- cp++;
- }
- for(; (cnt == 0) && (i < info->portwidth); ++i, ++cp)
- flash_add_byte(info, &cword, (*(uchar *)cp));
- if((rc = flash_write_cfiword(info, wp, cword)) != 0)
- return rc;
- wp = cp;
- }
-
-#ifdef CFG_FLASH_USE_BUFFER_WRITE
- while(cnt >= info->portwidth) {
- i = info->buffer_size > cnt? cnt: info->buffer_size;
- if((rc = flash_write_cfibuffer(info, wp, src,i)) != ERR_OK)
- return rc;
- wp += i;
- src += i;
- cnt -=i;
- }
-#else
- /* handle the aligned part */
- while(cnt >= info->portwidth) {
- cword.l = 0;
- for(i = 0; i < info->portwidth; i++) {
- flash_add_byte(info, &cword, *src++);
- }
- if((rc = flash_write_cfiword(info, wp, cword)) != 0)
- return rc;
- wp += info->portwidth;
- cnt -= info->portwidth;
- }
-#endif /* CFG_FLASH_USE_BUFFER_WRITE */
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- cword.l = 0;
- for (i=0, cp=wp; (i<info->portwidth) && (cnt>0); ++i, ++cp) {
- flash_add_byte(info, &cword, *src++);
- --cnt;
- }
- for (; i<info->portwidth; ++i, ++cp) {
- flash_add_byte(info, & cword, (*(uchar *)cp));
- }
-
- return flash_write_cfiword(info, wp, cword);
-}
-
-/*-----------------------------------------------------------------------
- */
-int flash_real_protect(flash_info_t *info, long sector, int prot)
-{
- int retcode = 0;
-
- flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
- flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT);
- if(prot)
- flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT_SET);
- else
- flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
-
- if((retcode = flash_full_status_check(info, sector, info->erase_blk_tout,
- prot?"protect":"unprotect")) == 0) {
-
- info->protect[sector] = prot;
- /* Intel's unprotect unprotects all locking */
- if(prot == 0) {
- int i;
- for(i = 0 ; i<info->sector_count; i++) {
- if(info->protect[i])
- flash_real_protect(info, i, 1);
- }
- }
- }
-
- return retcode;
-}
-/*-----------------------------------------------------------------------
- * wait for XSR.7 to be set. Time out with an error if it does not.
- * This routine does not set the flash to read-array mode.
- */
-static int flash_status_check(flash_info_t * info, ulong sector, ulong tout, char * prompt)
-{
- ulong start;
-
- /* Wait for command completion */
- start = get_timer (0);
- while(!flash_isset(info, sector, 0, FLASH_STATUS_DONE)) {
- if (get_timer(start) > info->erase_blk_tout) {
- printf("Flash %s timeout at address %lx\n", prompt, info->start[sector]);
- flash_write_cmd(info, sector, 0, FLASH_CMD_RESET);
- return ERR_TIMOUT;
- }
- }
- return ERR_OK;
-}
-/*-----------------------------------------------------------------------
- * Wait for XSR.7 to be set, if it times out print an error, otherwise do a full status check.
- * This routine sets the flash to read-array mode.
- */
-static int flash_full_status_check(flash_info_t * info, ulong sector, ulong tout, char * prompt)
-{
- int retcode;
- retcode = flash_status_check(info, sector, tout, prompt);
- if((retcode == ERR_OK) && !flash_isequal(info,sector, 0, FLASH_STATUS_DONE)) {
- retcode = ERR_INVAL;
- printf("Flash %s error at address %lx\n", prompt,info->start[sector]);
- if(flash_isset(info, sector, 0, FLASH_STATUS_ECLBS | FLASH_STATUS_PSLBS)){
- printf("Command Sequence Error.\n");
- } else if(flash_isset(info, sector, 0, FLASH_STATUS_ECLBS)){
- printf("Block Erase Error.\n");
- retcode = ERR_NOT_ERASED;
- } else if (flash_isset(info, sector, 0, FLASH_STATUS_PSLBS)) {
- printf("Locking Error\n");
- }
- if(flash_isset(info, sector, 0, FLASH_STATUS_DPS)){
- printf("Block locked.\n");
- retcode = ERR_PROTECTED;
- }
- if(flash_isset(info, sector, 0, FLASH_STATUS_VPENS))
- printf("Vpp Low Error.\n");
- }
- flash_write_cmd(info, sector, 0, FLASH_CMD_RESET);
- return retcode;
-}
-/*-----------------------------------------------------------------------
- */
-static void flash_add_byte(flash_info_t *info, cfiword_t * cword, uchar c)
-{
- switch(info->portwidth) {
- case FLASH_CFI_8BIT:
- cword->c = c;
- break;
- case FLASH_CFI_16BIT:
- cword->w = (cword->w << 8) | c;
- break;
- case FLASH_CFI_32BIT:
- cword->l = (cword->l << 8) | c;
- }
-}
-
-
-/*-----------------------------------------------------------------------
- * make a proper sized command based on the port and chip widths
- */
-static void flash_make_cmd(flash_info_t * info, uchar cmd, void * cmdbuf)
-{
- int i;
- uchar *cp = (uchar *)cmdbuf;
- for(i=0; i< info->portwidth; i++)
- *cp++ = ((i+1) % info->chipwidth) ? '\0':cmd;
-}
-
-/*
- * Write a proper sized command to the correct address
- */
-static void flash_write_cmd(flash_info_t * info, int sect, uchar offset, uchar cmd)
-{
-
- volatile cfiptr_t addr;
- cfiword_t cword;
- addr.cp = flash_make_addr(info, sect, offset);
- flash_make_cmd(info, cmd, &cword);
- switch(info->portwidth) {
- case FLASH_CFI_8BIT:
- *addr.cp = cword.c;
- break;
- case FLASH_CFI_16BIT:
- *addr.wp = cword.w;
- break;
- case FLASH_CFI_32BIT:
- *addr.lp = cword.l;
- break;
- }
-}
-
-/*-----------------------------------------------------------------------
- */
-static int flash_isequal(flash_info_t * info, int sect, uchar offset, uchar cmd)
-{
- cfiptr_t cptr;
- cfiword_t cword;
- int retval;
- cptr.cp = flash_make_addr(info, sect, offset);
- flash_make_cmd(info, cmd, &cword);
- switch(info->portwidth) {
- case FLASH_CFI_8BIT:
- retval = (cptr.cp[0] == cword.c);
- break;
- case FLASH_CFI_16BIT:
- retval = (cptr.wp[0] == cword.w);
- break;
- case FLASH_CFI_32BIT:
- retval = (cptr.lp[0] == cword.l);
- break;
- default:
- retval = 0;
- break;
- }
- return retval;
-}
-/*-----------------------------------------------------------------------
- */
-static int flash_isset(flash_info_t * info, int sect, uchar offset, uchar cmd)
-{
- cfiptr_t cptr;
- cfiword_t cword;
- int retval;
- cptr.cp = flash_make_addr(info, sect, offset);
- flash_make_cmd(info, cmd, &cword);
- switch(info->portwidth) {
- case FLASH_CFI_8BIT:
- retval = ((cptr.cp[0] & cword.c) == cword.c);
- break;
- case FLASH_CFI_16BIT:
- retval = ((cptr.wp[0] & cword.w) == cword.w);
- break;
- case FLASH_CFI_32BIT:
- retval = ((cptr.lp[0] & cword.l) == cword.l);
- break;
- default:
- retval = 0;
- break;
- }
- return retval;
-}
-
-/*-----------------------------------------------------------------------
- * detect if flash is compatible with the Common Flash Interface (CFI)
- * http://www.jedec.org/download/search/jesd68.pdf
- *
- */
-static int flash_detect_cfi(flash_info_t * info)
-{
-
- for(info->portwidth=FLASH_CFI_8BIT; info->portwidth <= FLASH_CFI_32BIT;
- info->portwidth <<= 1) {
- for(info->chipwidth =FLASH_CFI_BY8;
- info->chipwidth <= info->portwidth;
- info->chipwidth <<= 1) {
- flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
- flash_write_cmd(info, 0, FLASH_OFFSET_CFI, FLASH_CMD_CFI);
- if(flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP,'Q') &&
- flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R') &&
- flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y'))
- return 1;
- }
- }
- return 0;
-}
-/*
- * The following code cannot be run from FLASH!
- *
- */
-static ulong flash_get_size (ulong base, int banknum)
-{
- flash_info_t * info = &flash_info[banknum];
- int i, j;
- int sect_cnt;
- unsigned long sector;
- unsigned long tmp;
- int size_ratio;
- uchar num_erase_regions;
- int erase_region_size;
- int erase_region_count;
-
- info->start[0] = base;
-
- if(flash_detect_cfi(info)){
-#ifdef DEBUG_FLASH
- printf("portwidth=%d chipwidth=%d\n", info->portwidth, info->chipwidth); /* test-only */
-#endif
- size_ratio = info->portwidth / info->chipwidth;
- num_erase_regions = flash_read_uchar(info, FLASH_OFFSET_NUM_ERASE_REGIONS);
-#ifdef DEBUG_FLASH
- printf("found %d erase regions\n", num_erase_regions);
-#endif
- sect_cnt = 0;
- sector = base;
- for(i = 0 ; i < num_erase_regions; i++) {
- if(i > NUM_ERASE_REGIONS) {
- printf("%d erase regions found, only %d used\n",
- num_erase_regions, NUM_ERASE_REGIONS);
- break;
- }
- tmp = flash_read_long(info, 0, FLASH_OFFSET_ERASE_REGIONS);
- erase_region_size = (tmp & 0xffff)? ((tmp & 0xffff) * 256): 128;
- tmp >>= 16;
- erase_region_count = (tmp & 0xffff) +1;
- for(j = 0; j< erase_region_count; j++) {
- info->start[sect_cnt] = sector;
- sector += (erase_region_size * size_ratio);
- info->protect[sect_cnt] = flash_isset(info, sect_cnt, FLASH_OFFSET_PROTECT, FLASH_STATUS_PROTECT);
- sect_cnt++;
- }
- }
-
- info->sector_count = sect_cnt;
- /* multiply the size by the number of chips */
- info->size = (1 << flash_read_uchar(info, FLASH_OFFSET_SIZE)) * size_ratio;
- info->buffer_size = (1 << flash_read_ushort(info, 0, FLASH_OFFSET_BUFFER_SIZE));
- tmp = 1 << flash_read_uchar(info, FLASH_OFFSET_ETOUT);
- info->erase_blk_tout = (tmp * (1 << flash_read_uchar(info, FLASH_OFFSET_EMAX_TOUT)));
- tmp = 1 << flash_read_uchar(info, FLASH_OFFSET_WBTOUT);
- info->buffer_write_tout = (tmp * (1 << flash_read_uchar(info, FLASH_OFFSET_WBMAX_TOUT)));
- tmp = 1 << flash_read_uchar(info, FLASH_OFFSET_WTOUT);
- info->write_tout = (tmp * (1 << flash_read_uchar(info, FLASH_OFFSET_WMAX_TOUT)))/ 1000;
- info->flash_id = FLASH_MAN_CFI;
- }
-
- flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
- return(info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-static int flash_write_cfiword (flash_info_t *info, ulong dest, cfiword_t cword)
-{
-
- cfiptr_t ctladdr;
- cfiptr_t cptr;
- int flag;
-
- ctladdr.cp = flash_make_addr(info, 0, 0);
- cptr.cp = (uchar *)dest;
-
-
- /* Check if Flash is (sufficiently) erased */
- switch(info->portwidth) {
- case FLASH_CFI_8BIT:
- flag = ((cptr.cp[0] & cword.c) == cword.c);
- break;
- case FLASH_CFI_16BIT:
- flag = ((cptr.wp[0] & cword.w) == cword.w);
- break;
- case FLASH_CFI_32BIT:
- flag = ((cptr.lp[0] & cword.l) == cword.l);
- break;
- default:
- return 2;
- }
- if(!flag)
- return 2;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- flash_write_cmd(info, 0, 0, FLASH_CMD_CLEAR_STATUS);
- flash_write_cmd(info, 0, 0, FLASH_CMD_WRITE);
-
- switch(info->portwidth) {
- case FLASH_CFI_8BIT:
- cptr.cp[0] = cword.c;
- break;
- case FLASH_CFI_16BIT:
- cptr.wp[0] = cword.w;
- break;
- case FLASH_CFI_32BIT:
- cptr.lp[0] = cword.l;
- break;
- }
-
- /* re-enable interrupts if necessary */
- if(flag)
- enable_interrupts();
-
- return flash_full_status_check(info, 0, info->write_tout, "write");
-}
-
-#ifdef CFG_FLASH_USE_BUFFER_WRITE
-
-/* loop through the sectors from the highest address
- * when the passed address is greater or equal to the sector address
- * we have a match
- */
-static int find_sector(flash_info_t *info, ulong addr)
-{
- int sector;
- for(sector = info->sector_count - 1; sector >= 0; sector--) {
- if(addr >= info->start[sector])
- break;
- }
- return sector;
-}
-
-static int flash_write_cfibuffer(flash_info_t * info, ulong dest, uchar * cp, int len)
-{
-
- int sector;
- int cnt;
- int retcode;
- volatile cfiptr_t src;
- volatile cfiptr_t dst;
-
- src.cp = cp;
- dst.cp = (uchar *)dest;
- sector = find_sector(info, dest);
- flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
- flash_write_cmd(info, sector, 0, FLASH_CMD_WRITE_TO_BUFFER);
- if((retcode = flash_status_check(info, sector, info->buffer_write_tout,
- "write to buffer")) == ERR_OK) {
- switch(info->portwidth) {
- case FLASH_CFI_8BIT:
- cnt = len;
- break;
- case FLASH_CFI_16BIT:
- cnt = len >> 1;
- break;
- case FLASH_CFI_32BIT:
- cnt = len >> 2;
- break;
- default:
- return ERR_INVAL;
- break;
- }
- flash_write_cmd(info, sector, 0, (uchar)cnt-1);
- while(cnt-- > 0) {
- switch(info->portwidth) {
- case FLASH_CFI_8BIT:
- *dst.cp++ = *src.cp++;
- break;
- case FLASH_CFI_16BIT:
- *dst.wp++ = *src.wp++;
- break;
- case FLASH_CFI_32BIT:
- *dst.lp++ = *src.lp++;
- break;
- default:
- return ERR_INVAL;
- break;
- }
- }
- flash_write_cmd(info, sector, 0, FLASH_CMD_WRITE_BUFFER_CONFIRM);
- retcode = flash_full_status_check(info, sector, info->buffer_write_tout,
- "buffer write");
- }
- flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
- return retcode;
-}
-#endif /* CFG_USE_FLASH_BUFFER_WRITE */
diff --git a/board/esd/cpci440/u-boot.lds b/board/esd/cpci440/u-boot.lds
deleted file mode 100644
index 57220d385a..0000000000
--- a/board/esd/cpci440/u-boot.lds
+++ /dev/null
@@ -1,159 +0,0 @@
-/*
- * (C) Copyright 2002
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- .resetvec 0xFFFFFFFC :
-/* .resetvec 0x01FFFFFC :*/
- {
- *(.resetvec)
- } = 0xffff
-
- .bootpg 0xFFFFF000 :
-/* .bootpg 0x01FFF000 :*/
- {
- cpu/ppc4xx/start.o (.bootpg)
- } = 0xffff
-
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/ppc4xx/start.o (.text)
- board/esd/cpci440/init.o (.text)
- cpu/ppc4xx/kgdb.o (.text)
- cpu/ppc4xx/traps.o (.text)
- cpu/ppc4xx/interrupts.o (.text)
- cpu/ppc4xx/serial.o (.text)
- cpu/ppc4xx/cpu_init.o (.text)
- cpu/ppc4xx/speed.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/extable.o (.text)
- lib_generic/zlib.o (.text)
-
-/* . = env_offset;*/
-/* common/environment.o(.text)*/
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/esd/cpci5200/Makefile b/board/esd/cpci5200/Makefile
deleted file mode 100644
index 2ca73a99e2..0000000000
--- a/board/esd/cpci5200/Makefile
+++ /dev/null
@@ -1,53 +0,0 @@
-
-#
-# (C) Copyright 2003
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-# Objects for Xilinx JTAG programming (CPLD)
-# CPLD = ../common/xilinx_jtag/lenval.o \
-# ../common/xilinx_jtag/micro.o \
-# ../common/xilinx_jtag/ports.o
-
-# OBJS = $(BOARD).o flash.o $(CPLD)
-OBJS = $(BOARD).o strataflash.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/esd/cpci5200/config.mk b/board/esd/cpci5200/config.mk
deleted file mode 100644
index 07b5de1881..0000000000
--- a/board/esd/cpci5200/config.mk
+++ /dev/null
@@ -1,44 +0,0 @@
-#
-# (C) Copyright 2003
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# IceCube board:
-#
-# Valid values for TEXT_BASE are:
-#
-# 0xFFF00000 boot high (standard configuration)
-# 0xFF000000 boot low for 16 MiB boards
-# 0xFF800000 boot low for 8 MiB boards
-# 0x00100000 boot from RAM (for testing only)
-#
-
-sinclude $(TOPDIR)/board/$(BOARDDIR)/config.tmp
-
-ifndef TEXT_BASE
-## Standard: boot high
-TEXT_BASE = 0xFFF00000
-## For testing: boot from RAM
-# TEXT_BASE = 0x00100000
-endif
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
diff --git a/board/esd/cpci5200/cpci5200.c b/board/esd/cpci5200/cpci5200.c
deleted file mode 100644
index 6c98f13fb6..0000000000
--- a/board/esd/cpci5200/cpci5200.c
+++ /dev/null
@@ -1,295 +0,0 @@
-/*
- * (C) Copyright 2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2004
- * Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * cpci5200.c - main board support/init for the esd cpci5200.
- */
-
-#include <common.h>
-#include <mpc5xxx.h>
-#include <pci.h>
-#include <command.h>
-
-#include "mt46v16m16-75.h"
-
-void init_ata_reset(void);
-
-static void sdram_start(int hi_addr)
-{
- long hi_addr_bit = hi_addr ? 0x01000000 : 0;
-
- /* unlock mode register */
- *(vu_long *) MPC5XXX_SDRAM_CTRL =
- SDRAM_CONTROL | 0x80000000 | hi_addr_bit;
- __asm__ volatile ("sync");
-
- /* precharge all banks */
- *(vu_long *) MPC5XXX_SDRAM_CTRL =
- SDRAM_CONTROL | 0x80000002 | hi_addr_bit;
- __asm__ volatile ("sync");
-
- /* set mode register: extended mode */
- *(vu_long *) MPC5XXX_SDRAM_MODE = SDRAM_EMODE;
- __asm__ volatile ("sync");
-
- /* set mode register: reset DLL */
- *(vu_long *) MPC5XXX_SDRAM_MODE = SDRAM_MODE | 0x04000000;
- __asm__ volatile ("sync");
-
- /* precharge all banks */
- *(vu_long *) MPC5XXX_SDRAM_CTRL =
- SDRAM_CONTROL | 0x80000002 | hi_addr_bit;
- __asm__ volatile ("sync");
-
- /* auto refresh */
- *(vu_long *) MPC5XXX_SDRAM_CTRL =
- SDRAM_CONTROL | 0x80000004 | hi_addr_bit;
- __asm__ volatile ("sync");
-
- /* set mode register */
- *(vu_long *) MPC5XXX_SDRAM_MODE = SDRAM_MODE;
- __asm__ volatile ("sync");
-
- /* normal operation */
- *(vu_long *) MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | hi_addr_bit;
- __asm__ volatile ("sync");
-}
-
-/*
- * ATTENTION: Although partially referenced initdram does NOT make real use
- * use of CFG_SDRAM_BASE. The code does not work if CFG_SDRAM_BASE
- * is something else than 0x00000000.
- */
-
-long int initdram(int board_type)
-{
- ulong dramsize = 0;
- ulong test1, test2;
-
- /* setup SDRAM chip selects */
- *(vu_long *) MPC5XXX_SDRAM_CS0CFG = 0x0000001e; /* 2G at 0x0 */
- *(vu_long *) MPC5XXX_SDRAM_CS1CFG = 0x80000000; /* disabled */
- __asm__ volatile ("sync");
-
- /* setup config registers */
- *(vu_long *) MPC5XXX_SDRAM_CONFIG1 = SDRAM_CONFIG1;
- *(vu_long *) MPC5XXX_SDRAM_CONFIG2 = SDRAM_CONFIG2;
- __asm__ volatile ("sync");
-
- /* set tap delay */
- *(vu_long *) MPC5XXX_CDM_PORCFG = SDRAM_TAPDELAY;
- __asm__ volatile ("sync");
-
- /* find RAM size using SDRAM CS0 only */
- sdram_start(0);
- test1 = get_ram_size((long *) CFG_SDRAM_BASE, 0x80000000);
- sdram_start(1);
- test2 = get_ram_size((long *) CFG_SDRAM_BASE, 0x80000000);
-
- if (test1 > test2) {
- sdram_start(0);
- dramsize = test1;
- } else {
- dramsize = test2;
- }
-
- /* memory smaller than 1MB is impossible */
- if (dramsize < (1 << 20)) {
- dramsize = 0;
- }
-
- /* set SDRAM CS0 size according to the amount of RAM found */
- if (dramsize > 0) {
- *(vu_long *) MPC5XXX_SDRAM_CS0CFG =
- 0x13 + __builtin_ffs(dramsize >> 20) - 1;
- /* let SDRAM CS1 start right after CS0 */
- *(vu_long *) MPC5XXX_SDRAM_CS1CFG = dramsize + 0x0000001e; /* 2G */
- } else {
-#if 0
- *(vu_long *) MPC5XXX_SDRAM_CS0CFG = 0; /* disabled */
- /* let SDRAM CS1 start right after CS0 */
- *(vu_long *) MPC5XXX_SDRAM_CS1CFG = dramsize + 0x0000001e; /* 2G */
-#else
- *(vu_long *) MPC5XXX_SDRAM_CS0CFG =
- 0x13 + __builtin_ffs(0x08000000 >> 20) - 1;
- /* let SDRAM CS1 start right after CS0 */
- *(vu_long *) MPC5XXX_SDRAM_CS1CFG = 0x08000000 + 0x0000001e; /* 2G */
-#endif
- }
-
-#if 0
- /* find RAM size using SDRAM CS1 only */
- sdram_start(0);
- get_ram_size((ulong *) (CFG_SDRAM_BASE + dramsize), 0x80000000);
- sdram_start(1);
- get_ram_size((ulong *) (CFG_SDRAM_BASE + dramsize), 0x80000000);
- sdram_start(0);
-#endif
- /* set SDRAM CS1 size according to the amount of RAM found */
-
- *(vu_long *) MPC5XXX_SDRAM_CS1CFG = dramsize; /* disabled */
-
- init_ata_reset();
- return (dramsize);
-}
-
-int checkboard(void)
-{
- puts("Board: esd CPCI5200 (cpci5200)\n");
- return 0;
-}
-
-void flash_preinit(void)
-{
- /*
- * Now, when we are in RAM, enable flash write
- * access for detection process.
- * Note that CS_BOOT cannot be cleared when
- * executing in flash.
- */
- *(vu_long *) MPC5XXX_BOOTCS_CFG &= ~0x1; /* clear RO */
-}
-
-void flash_afterinit(ulong size)
-{
- if (size == 0x02000000) {
- /* adjust mapping */
- *(vu_long *) MPC5XXX_BOOTCS_START =
- *(vu_long *) MPC5XXX_CS0_START =
- START_REG(CFG_BOOTCS_START | size);
- *(vu_long *) MPC5XXX_BOOTCS_STOP =
- *(vu_long *) MPC5XXX_CS0_STOP =
- STOP_REG(CFG_BOOTCS_START | size, size);
- }
-}
-
-#ifdef CONFIG_PCI
-static struct pci_controller hose;
-
-extern void pci_mpc5xxx_init(struct pci_controller *);
-
-void pci_init_board(void
- ) {
- pci_mpc5xxx_init(&hose);
-}
-#endif
-
-#if defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET)
-
-#define GPIO_PSC1_4 0x01000000UL
-
-void init_ide_reset(void)
-{
- debug("init_ide_reset\n");
-
- /* Configure PSC1_4 as GPIO output for ATA reset */
- *(vu_long *) MPC5XXX_WU_GPIO_ENABLE |= GPIO_PSC1_4;
- *(vu_long *) MPC5XXX_WU_GPIO_DIR |= GPIO_PSC1_4;
-}
-
-void ide_set_reset(int idereset)
-{
- debug("ide_reset(%d)\n", idereset);
-
- if (idereset) {
- *(vu_long *) MPC5XXX_WU_GPIO_DATA &= ~GPIO_PSC1_4;
- } else {
- *(vu_long *) MPC5XXX_WU_GPIO_DATA |= GPIO_PSC1_4;
- }
-}
-#endif /* defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET) */
-
-#define MPC5XXX_SIMPLEIO_GPIO_ENABLE (MPC5XXX_GPIO + 0x0004)
-#define MPC5XXX_SIMPLEIO_GPIO_DIR (MPC5XXX_GPIO + 0x000C)
-#define MPC5XXX_SIMPLEIO_GPIO_DATA_OUTPUT (MPC5XXX_GPIO + 0x0010)
-#define MPC5XXX_SIMPLEIO_GPIO_DATA_INPUT (MPC5XXX_GPIO + 0x0014)
-
-#define MPC5XXX_INTERRUPT_GPIO_ENABLE (MPC5XXX_GPIO + 0x0020)
-#define MPC5XXX_INTERRUPT_GPIO_DIR (MPC5XXX_GPIO + 0x0028)
-#define MPC5XXX_INTERRUPT_GPIO_DATA_OUTPUT (MPC5XXX_GPIO + 0x002C)
-#define MPC5XXX_INTERRUPT_GPIO_STATUS (MPC5XXX_GPIO + 0x003C)
-
-#define GPIO_WU6 0x40000000UL
-#define GPIO_USB0 0x00010000UL
-#define GPIO_USB9 0x08000000UL
-#define GPIO_USB9S 0x00080000UL
-
-void init_ata_reset(void)
-{
- debug("init_ata_reset\n");
-
- /* Configure GPIO_WU6 as GPIO output for ATA reset */
- *(vu_long *) MPC5XXX_WU_GPIO_DATA |= GPIO_WU6;
- *(vu_long *) MPC5XXX_WU_GPIO_ENABLE |= GPIO_WU6;
- *(vu_long *) MPC5XXX_WU_GPIO_DIR |= GPIO_WU6;
- __asm__ volatile ("sync");
-
- *(vu_long *) MPC5XXX_SIMPLEIO_GPIO_DATA_OUTPUT &= ~GPIO_USB0;
- *(vu_long *) MPC5XXX_SIMPLEIO_GPIO_ENABLE |= GPIO_USB0;
- *(vu_long *) MPC5XXX_SIMPLEIO_GPIO_DIR |= GPIO_USB0;
- __asm__ volatile ("sync");
-
- *(vu_long *) MPC5XXX_INTERRUPT_GPIO_DATA_OUTPUT &= ~GPIO_USB9;
- *(vu_long *) MPC5XXX_INTERRUPT_GPIO_ENABLE &= ~GPIO_USB9;
- __asm__ volatile ("sync");
-
- if ((*(vu_long *) MPC5XXX_INTERRUPT_GPIO_STATUS & GPIO_USB9S) == 0) {
- *(vu_long *) MPC5XXX_SIMPLEIO_GPIO_DATA_OUTPUT |= GPIO_USB0;
- __asm__ volatile ("sync");
- }
-}
-
-int do_writepci(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
-{
- unsigned int addr;
- unsigned int size;
- int i;
- volatile unsigned long *ptr;
-
- addr = simple_strtol(argv[1], NULL, 16);
- size = simple_strtol(argv[2], NULL, 16);
-
- printf("\nWriting at addr %08x, size %08x.\n", addr, size);
-
- while (1) {
- ptr = (volatile unsigned long *)addr;
- for (i = 0; i < (size >> 2); i++) {
- *ptr++ = i;
- }
-
- /* Abort if ctrl-c was pressed */
- if (ctrlc()) {
- puts("\nAbort\n");
- return 0;
- }
- putc('.');
- }
- return 0;
-}
-
-U_BOOT_CMD(writepci, 3, 1, do_writepci,
- "writepci- Write some data to pcibus\n",
- "<addr> <size>\n" " - Write some data to pcibus.\n");
diff --git a/board/esd/cpci5200/mt46v16m16-75.h b/board/esd/cpci5200/mt46v16m16-75.h
deleted file mode 100644
index 22d0a55444..0000000000
--- a/board/esd/cpci5200/mt46v16m16-75.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/*
- * (C) Copyright 2004
- * Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#define SDRAM_DDR 1 /* is DDR */
-
-#if defined(CONFIG_MPC5200)
-/* Settings for XLB = 132 MHz */
-#define SDRAM_MODE 0x018D0000
-#define SDRAM_EMODE 0x40090000
-#define SDRAM_CONTROL 0x705f0f00
-#define SDRAM_CONFIG1 0x73722930
-#define SDRAM_CONFIG2 0x47770000
-#define SDRAM_TAPDELAY 0x10000000
-
-#else
-#error CONFIG_MPC5200 not defined
-#endif
diff --git a/board/esd/cpci5200/strataflash.c b/board/esd/cpci5200/strataflash.c
deleted file mode 100644
index d76af02dbe..0000000000
--- a/board/esd/cpci5200/strataflash.c
+++ /dev/null
@@ -1,804 +0,0 @@
-/*
- * (C) Copyright 2002
- * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/processor.h>
-#include <asm/cache.h>
-
-#undef DEBUG_FLASH
-/*
- * This file implements a Common Flash Interface (CFI) driver for U-Boot.
- * The width of the port and the width of the chips are determined at initialization.
- * These widths are used to calculate the address for access CFI data structures.
- * It has been tested on an Intel Strataflash implementation.
- *
- * References
- * JEDEC Standard JESD68 - Common Flash Interface (CFI)
- * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
- * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
- * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
- *
- * TODO
- * Use Primary Extended Query table (PRI) and Alternate Algorithm Query Table (ALT) to determine if protection is available
- * Add support for other command sets Use the PRI and ALT to determine command set
- * Verify erase and program timeouts.
- */
-
-#define FLASH_CMD_CFI 0x98
-#define FLASH_CMD_READ_ID 0x90
-#define FLASH_CMD_RESET 0xff
-#define FLASH_CMD_BLOCK_ERASE 0x20
-#define FLASH_CMD_ERASE_CONFIRM 0xD0
-#define FLASH_CMD_WRITE 0x40
-#define FLASH_CMD_PROTECT 0x60
-#define FLASH_CMD_PROTECT_SET 0x01
-#define FLASH_CMD_PROTECT_CLEAR 0xD0
-#define FLASH_CMD_CLEAR_STATUS 0x50
-#define FLASH_CMD_WRITE_TO_BUFFER 0xE8
-#define FLASH_CMD_WRITE_BUFFER_CONFIRM 0xD0
-
-#define FLASH_STATUS_DONE 0x80
-#define FLASH_STATUS_ESS 0x40
-#define FLASH_STATUS_ECLBS 0x20
-#define FLASH_STATUS_PSLBS 0x10
-#define FLASH_STATUS_VPENS 0x08
-#define FLASH_STATUS_PSS 0x04
-#define FLASH_STATUS_DPS 0x02
-#define FLASH_STATUS_R 0x01
-#define FLASH_STATUS_PROTECT 0x01
-
-#define FLASH_OFFSET_CFI 0x55
-#define FLASH_OFFSET_CFI_RESP 0x10
-#define FLASH_OFFSET_WTOUT 0x1F
-#define FLASH_OFFSET_WBTOUT 0x20
-#define FLASH_OFFSET_ETOUT 0x21
-#define FLASH_OFFSET_CETOUT 0x22
-#define FLASH_OFFSET_WMAX_TOUT 0x23
-#define FLASH_OFFSET_WBMAX_TOUT 0x24
-#define FLASH_OFFSET_EMAX_TOUT 0x25
-#define FLASH_OFFSET_CEMAX_TOUT 0x26
-#define FLASH_OFFSET_SIZE 0x27
-#define FLASH_OFFSET_INTERFACE 0x28
-#define FLASH_OFFSET_BUFFER_SIZE 0x2A
-#define FLASH_OFFSET_NUM_ERASE_REGIONS 0x2C
-#define FLASH_OFFSET_ERASE_REGIONS 0x2D
-#define FLASH_OFFSET_PROTECT 0x02
-#define FLASH_OFFSET_USER_PROTECTION 0x85
-#define FLASH_OFFSET_INTEL_PROTECTION 0x81
-
-#define FLASH_MAN_CFI 0x01000000
-
-typedef union {
- unsigned char c;
- unsigned short w;
- unsigned long l;
-} cfiword_t;
-
-typedef union {
- unsigned char *cp;
- unsigned short *wp;
- unsigned long *lp;
-} cfiptr_t;
-
-#define NUM_ERASE_REGIONS 4
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-
-static void flash_add_byte(flash_info_t * info, cfiword_t * cword, uchar c);
-static void flash_make_cmd(flash_info_t * info, uchar cmd, void *cmdbuf);
-static void flash_write_cmd(flash_info_t * info, int sect, uchar offset,
- uchar cmd);
-static int flash_isequal(flash_info_t * info, int sect, uchar offset,
- uchar cmd);
-static int flash_isset(flash_info_t * info, int sect, uchar offset, uchar cmd);
-static int flash_detect_cfi(flash_info_t * info);
-static ulong flash_get_size(ulong base, int banknum);
-static int flash_write_cfiword(flash_info_t * info, ulong dest,
- cfiword_t cword);
-static int flash_full_status_check(flash_info_t * info, ulong sector,
- ulong tout, char *prompt);
-#ifdef CFG_FLASH_USE_BUFFER_WRITE
-static int flash_write_cfibuffer(flash_info_t * info, ulong dest, uchar * cp,
- int len);
-#endif
-/*-----------------------------------------------------------------------
- * create an address based on the offset and the port width
- */
-inline uchar *flash_make_addr(flash_info_t * info, int sect, int offset)
-{
- return ((uchar *) (info->start[sect] + (offset * info->portwidth)));
-}
-
-/*-----------------------------------------------------------------------
- * read a character at a port width address
- */
-inline uchar flash_read_uchar(flash_info_t * info, uchar offset)
-{
- uchar *cp;
- cp = flash_make_addr(info, 0, offset);
- return (cp[info->portwidth - 1]);
-}
-
-/*-----------------------------------------------------------------------
- * read a short word by swapping for ppc format.
- */
-ushort flash_read_ushort(flash_info_t * info, int sect, uchar offset)
-{
- uchar *addr;
-
- addr = flash_make_addr(info, sect, offset);
- return ((addr[(2 * info->portwidth) - 1] << 8) |
- addr[info->portwidth - 1]);
-
-}
-
-/*-----------------------------------------------------------------------
- * read a long word by picking the least significant byte of each maiximum
- * port size word. Swap for ppc format.
- */
-ulong flash_read_long(flash_info_t * info, int sect, uchar offset)
-{
- uchar *addr;
-
- addr = flash_make_addr(info, sect, offset);
- return ((addr[(2 * info->portwidth) - 1] << 24) |
- (addr[(info->portwidth) - 1] << 16) |
- (addr[(4 * info->portwidth) - 1] << 8) |
- addr[(3 * info->portwidth) - 1]);
-
-}
-
-/*-----------------------------------------------------------------------
- */
-unsigned long flash_init(void)
-{
- unsigned long size;
- int i;
- unsigned long address;
-
- /* The flash is positioned back to back, with the demultiplexing of the chip
- * based on the A24 address line.
- *
- */
-
- address = CFG_FLASH_BASE;
- size = 0;
-
- /* Init: no FLASHes known */
- for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- size += flash_info[i].size = flash_get_size(address, i);
- address += CFG_FLASH_INCREMENT;
- if (flash_info[i].flash_id == FLASH_UNKNOWN) {
- printf
- ("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n",
- i, flash_info[0].size, flash_info[i].size << 20);
- }
- }
-
-#if 0 /* test-only */
- /* Monitor protection ON by default */
-#if (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
- for (i = 0;
- flash_info[0].start[i] < CFG_MONITOR_BASE + monitor_flash_len - 1;
- i++)
- (void)flash_real_protect(&flash_info[0], i, 1);
-#endif
-#endif
-
- return (size);
-}
-
-/*-----------------------------------------------------------------------
- */
-int flash_erase(flash_info_t * info, int s_first, int s_last)
-{
- int rcode = 0;
- int prot;
- int sect;
-
- if (info->flash_id != FLASH_MAN_CFI) {
- printf("Can't erase unknown flash type - aborted\n");
- return 1;
- }
- if ((s_first < 0) || (s_first > s_last)) {
- printf("- no sectors to erase\n");
- return 1;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
- if (prot) {
- printf("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf("\n");
- }
-
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- flash_write_cmd(info, sect, 0, FLASH_CMD_CLEAR_STATUS);
- flash_write_cmd(info, sect, 0, FLASH_CMD_BLOCK_ERASE);
- flash_write_cmd(info, sect, 0, FLASH_CMD_ERASE_CONFIRM);
-
- if (flash_full_status_check
- (info, sect, info->erase_blk_tout, "erase")) {
- rcode = 1;
- } else
- printf(".");
- }
- }
- printf(" done\n");
- return rcode;
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info(flash_info_t * info)
-{
- int i;
-
- if (info->flash_id != FLASH_MAN_CFI) {
- printf("missing or unknown FLASH type\n");
- return;
- }
-
- printf("CFI conformant FLASH (%d x %d)",
- (info->portwidth << 3), (info->chipwidth << 3));
- printf(" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
- printf
- (" Erase timeout %ld ms, write timeout %ld ms, buffer write timeout %ld ms, buffer size %d\n",
- info->erase_blk_tout, info->write_tout, info->buffer_write_tout,
- info->buffer_size);
-
- printf(" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf("\n");
- printf(" %08lX%5s",
- info->start[i], info->protect[i] ? " (RO)" : " ");
- }
- printf("\n");
- return;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-int write_buff(flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- ulong wp;
- ulong cp;
- int aln;
- cfiword_t cword;
- int i, rc;
-
- /* get lower aligned address */
- wp = (addr & ~(info->portwidth - 1));
-
- /* handle unaligned start */
- if ((aln = addr - wp) != 0) {
- cword.l = 0;
- cp = wp;
- for (i = 0; i < aln; ++i, ++cp)
- flash_add_byte(info, &cword, (*(uchar *) cp));
-
- for (; (i < info->portwidth) && (cnt > 0); i++) {
- flash_add_byte(info, &cword, *src++);
- cnt--;
- cp++;
- }
- for (; (cnt == 0) && (i < info->portwidth); ++i, ++cp)
- flash_add_byte(info, &cword, (*(uchar *) cp));
- if ((rc = flash_write_cfiword(info, wp, cword)) != 0)
- return rc;
- wp = cp;
- }
-#ifdef CFG_FLASH_USE_BUFFER_WRITE
- while (cnt >= info->portwidth) {
- i = info->buffer_size > cnt ? cnt : info->buffer_size;
- if ((rc = flash_write_cfibuffer(info, wp, src, i)) != ERR_OK)
- return rc;
- wp += i;
- src += i;
- cnt -= i;
- }
-#else
- /* handle the aligned part */
- while (cnt >= info->portwidth) {
- cword.l = 0;
- for (i = 0; i < info->portwidth; i++) {
- flash_add_byte(info, &cword, *src++);
- }
- if ((rc = flash_write_cfiword(info, wp, cword)) != 0)
- return rc;
- wp += info->portwidth;
- cnt -= info->portwidth;
- }
-#endif /* CFG_FLASH_USE_BUFFER_WRITE */
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- cword.l = 0;
- for (i = 0, cp = wp; (i < info->portwidth) && (cnt > 0); ++i, ++cp) {
- flash_add_byte(info, &cword, *src++);
- --cnt;
- }
- for (; i < info->portwidth; ++i, ++cp) {
- flash_add_byte(info, &cword, (*(uchar *) cp));
- }
-
- return flash_write_cfiword(info, wp, cword);
-}
-
-/*-----------------------------------------------------------------------
- */
-int flash_real_protect(flash_info_t * info, long sector, int prot)
-{
- int retcode = 0;
-
- flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
- flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT);
- if (prot)
- flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT_SET);
- else
- flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
-
- if ((retcode =
- flash_full_status_check(info, sector, info->erase_blk_tout,
- prot ? "protect" : "unprotect")) == 0) {
-
- info->protect[sector] = prot;
- /* Intel's unprotect unprotects all locking */
- if (prot == 0) {
- int i;
- for (i = 0; i < info->sector_count; i++) {
- if (info->protect[i])
- flash_real_protect(info, i, 1);
- }
- }
- }
-
- return retcode;
-}
-
-/*-----------------------------------------------------------------------
- * wait for XSR.7 to be set. Time out with an error if it does not.
- * This routine does not set the flash to read-array mode.
- */
-static int flash_status_check(flash_info_t * info, ulong sector, ulong tout,
- char *prompt)
-{
- ulong start;
-
- /* Wait for command completion */
- start = get_timer(0);
- while (!flash_isset(info, sector, 0, FLASH_STATUS_DONE)) {
- if (get_timer(start) > info->erase_blk_tout) {
- printf("Flash %s timeout at address %lx\n", prompt,
- info->start[sector]);
- flash_write_cmd(info, sector, 0, FLASH_CMD_RESET);
- return ERR_TIMOUT;
- }
- }
- return ERR_OK;
-}
-
-/*-----------------------------------------------------------------------
- * Wait for XSR.7 to be set, if it times out print an error, otherwise do a full status check.
- * This routine sets the flash to read-array mode.
- */
-static int flash_full_status_check(flash_info_t * info, ulong sector,
- ulong tout, char *prompt)
-{
- int retcode;
- retcode = flash_status_check(info, sector, tout, prompt);
- if ((retcode == ERR_OK)
- && !flash_isequal(info, sector, 0, FLASH_STATUS_DONE)) {
- retcode = ERR_INVAL;
- printf("Flash %s error at address %lx\n", prompt,
- info->start[sector]);
- if (flash_isset
- (info, sector, 0,
- FLASH_STATUS_ECLBS | FLASH_STATUS_PSLBS)) {
- printf("Command Sequence Error.\n");
- } else if (flash_isset(info, sector, 0, FLASH_STATUS_ECLBS)) {
- printf("Block Erase Error.\n");
- retcode = ERR_NOT_ERASED;
- } else if (flash_isset(info, sector, 0, FLASH_STATUS_PSLBS)) {
- printf("Locking Error\n");
- }
- if (flash_isset(info, sector, 0, FLASH_STATUS_DPS)) {
- printf("Block locked.\n");
- retcode = ERR_PROTECTED;
- }
- if (flash_isset(info, sector, 0, FLASH_STATUS_VPENS))
- printf("Vpp Low Error.\n");
- }
- flash_write_cmd(info, sector, 0, FLASH_CMD_RESET);
- return retcode;
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_add_byte(flash_info_t * info, cfiword_t * cword, uchar c)
-{
- switch (info->portwidth) {
- case FLASH_CFI_8BIT:
- cword->c = c;
- break;
- case FLASH_CFI_16BIT:
- cword->w = (cword->w << 8) | c;
- break;
- case FLASH_CFI_32BIT:
- cword->l = (cword->l << 8) | c;
- }
-}
-
-/*-----------------------------------------------------------------------
- * make a proper sized command based on the port and chip widths
- */
-static void flash_make_cmd(flash_info_t * info, uchar cmd, void *cmdbuf)
-{
- int i;
- uchar *cp = (uchar *) cmdbuf;
- for (i = 0; i < info->portwidth; i++)
- *cp++ = ((i + 1) % info->chipwidth) ? '\0' : cmd;
-}
-
-/*
- * Write a proper sized command to the correct address
- */
-static void flash_write_cmd(flash_info_t * info, int sect, uchar offset,
- uchar cmd)
-{
-
- volatile cfiptr_t addr;
- cfiword_t cword;
- addr.cp = flash_make_addr(info, sect, offset);
- flash_make_cmd(info, cmd, &cword);
- switch (info->portwidth) {
- case FLASH_CFI_8BIT:
- *addr.cp = cword.c;
- break;
- case FLASH_CFI_16BIT:
- *addr.wp = cword.w;
- break;
- case FLASH_CFI_32BIT:
- *addr.lp = cword.l;
- break;
- }
-}
-
-/*-----------------------------------------------------------------------
- */
-static int flash_isequal(flash_info_t * info, int sect, uchar offset, uchar cmd)
-{
- cfiptr_t cptr;
- cfiword_t cword;
- int retval;
- cptr.cp = flash_make_addr(info, sect, offset);
- flash_make_cmd(info, cmd, &cword);
- switch (info->portwidth) {
- case FLASH_CFI_8BIT:
- retval = (cptr.cp[0] == cword.c);
- break;
- case FLASH_CFI_16BIT:
- retval = (cptr.wp[0] == cword.w);
- break;
- case FLASH_CFI_32BIT:
- retval = (cptr.lp[0] == cword.l);
- break;
- default:
- retval = 0;
- break;
- }
- return retval;
-}
-
-/*-----------------------------------------------------------------------
- */
-static int flash_isset(flash_info_t * info, int sect, uchar offset, uchar cmd)
-{
- cfiptr_t cptr;
- cfiword_t cword;
- int retval;
- cptr.cp = flash_make_addr(info, sect, offset);
- flash_make_cmd(info, cmd, &cword);
- switch (info->portwidth) {
- case FLASH_CFI_8BIT:
- retval = ((cptr.cp[0] & cword.c) == cword.c);
- break;
- case FLASH_CFI_16BIT:
- retval = ((cptr.wp[0] & cword.w) == cword.w);
- break;
- case FLASH_CFI_32BIT:
- retval = ((cptr.lp[0] & cword.l) == cword.l);
- break;
- default:
- retval = 0;
- break;
- }
- return retval;
-}
-
-/*-----------------------------------------------------------------------
- * detect if flash is compatible with the Common Flash Interface (CFI)
- * http://www.jedec.org/download/search/jesd68.pdf
- *
- */
-static int flash_detect_cfi(flash_info_t * info)
-{
-
- for (info->portwidth = FLASH_CFI_8BIT;
- info->portwidth <= FLASH_CFI_32BIT; info->portwidth <<= 1) {
- for (info->chipwidth = FLASH_CFI_BY8;
- info->chipwidth <= info->portwidth;
- info->chipwidth <<= 1) {
- flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
- flash_write_cmd(info, 0, FLASH_OFFSET_CFI,
- FLASH_CMD_CFI);
- if (flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
- && flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 1,
- 'R')
- && flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 2,
- 'Y'))
- return 1;
- }
- }
- return 0;
-}
-
-/*
- * The following code cannot be run from FLASH!
- *
- */
-static ulong flash_get_size(ulong base, int banknum)
-{
- flash_info_t *info = &flash_info[banknum];
- int i, j;
- int sect_cnt;
- unsigned long sector;
- unsigned long tmp;
- int size_ratio = 0;
- uchar num_erase_regions;
- int erase_region_size;
- int erase_region_count;
-
- info->start[0] = base;
-#if 0
- invalidate_dcache_range(base, base + 0x400);
-#endif
- if (flash_detect_cfi(info)) {
-
- size_ratio = info->portwidth / info->chipwidth;
- num_erase_regions =
- flash_read_uchar(info, FLASH_OFFSET_NUM_ERASE_REGIONS);
-
- sect_cnt = 0;
- sector = base;
- for (i = 0; i < num_erase_regions; i++) {
- if (i > NUM_ERASE_REGIONS) {
- printf("%d erase regions found, only %d used\n",
- num_erase_regions, NUM_ERASE_REGIONS);
- break;
- }
- tmp =
- flash_read_long(info, 0,
- FLASH_OFFSET_ERASE_REGIONS);
- erase_region_size =
- (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
- tmp >>= 16;
- erase_region_count = (tmp & 0xffff) + 1;
- for (j = 0; j < erase_region_count; j++) {
- info->start[sect_cnt] = sector;
- sector += (erase_region_size * size_ratio);
- info->protect[sect_cnt] =
- flash_isset(info, sect_cnt,
- FLASH_OFFSET_PROTECT,
- FLASH_STATUS_PROTECT);
- sect_cnt++;
- }
- }
-
- info->sector_count = sect_cnt;
- /* multiply the size by the number of chips */
- info->size =
- (1 << flash_read_uchar(info, FLASH_OFFSET_SIZE)) *
- size_ratio;
- info->buffer_size =
- (1 << flash_read_ushort(info, 0, FLASH_OFFSET_BUFFER_SIZE));
- tmp = 1 << flash_read_uchar(info, FLASH_OFFSET_ETOUT);
- info->erase_blk_tout =
- (tmp *
- (1 << flash_read_uchar(info, FLASH_OFFSET_EMAX_TOUT)));
- tmp = 1 << flash_read_uchar(info, FLASH_OFFSET_WBTOUT);
- info->buffer_write_tout =
- (tmp *
- (1 << flash_read_uchar(info, FLASH_OFFSET_WBMAX_TOUT)));
- tmp = 1 << flash_read_uchar(info, FLASH_OFFSET_WTOUT);
- info->write_tout =
- (tmp *
- (1 << flash_read_uchar(info, FLASH_OFFSET_WMAX_TOUT))) /
- 1000;
- info->flash_id = FLASH_MAN_CFI;
- }
-
- flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
-#ifdef DEBUG_FLASH
- printf("portwidth=%d chipwidth=%d\n", info->portwidth, info->chipwidth); /* test-only */
-#endif
-#ifdef DEBUG_FLASH
- printf("found %d erase regions\n", num_erase_regions);
-#endif
-#ifdef DEBUG_FLASH
- printf("size=%08x sectors=%08x \n", info->size, info->sector_count);
-#endif
- return (info->size);
-}
-
-/*-----------------------------------------------------------------------
- */
-static int flash_write_cfiword(flash_info_t * info, ulong dest, cfiword_t cword)
-{
-
- cfiptr_t ctladdr;
- cfiptr_t cptr;
- int flag;
-
- ctladdr.cp = flash_make_addr(info, 0, 0);
- cptr.cp = (uchar *) dest;
-
- /* Check if Flash is (sufficiently) erased */
- switch (info->portwidth) {
- case FLASH_CFI_8BIT:
- flag = ((cptr.cp[0] & cword.c) == cword.c);
- break;
- case FLASH_CFI_16BIT:
- flag = ((cptr.wp[0] & cword.w) == cword.w);
- break;
- case FLASH_CFI_32BIT:
- flag = ((cptr.lp[0] & cword.l) == cword.l);
- break;
- default:
- return 2;
- }
- if (!flag)
- return 2;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- flash_write_cmd(info, 0, 0, FLASH_CMD_CLEAR_STATUS);
- flash_write_cmd(info, 0, 0, FLASH_CMD_WRITE);
-
- switch (info->portwidth) {
- case FLASH_CFI_8BIT:
- cptr.cp[0] = cword.c;
- break;
- case FLASH_CFI_16BIT:
- cptr.wp[0] = cword.w;
- break;
- case FLASH_CFI_32BIT:
- cptr.lp[0] = cword.l;
- break;
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- return flash_full_status_check(info, 0, info->write_tout, "write");
-}
-
-#ifdef CFG_FLASH_USE_BUFFER_WRITE
-
-/* loop through the sectors from the highest address
- * when the passed address is greater or equal to the sector address
- * we have a match
- */
-static int find_sector(flash_info_t * info, ulong addr)
-{
- int sector;
- for (sector = info->sector_count - 1; sector >= 0; sector--) {
- if (addr >= info->start[sector])
- break;
- }
- return sector;
-}
-
-static int flash_write_cfibuffer(flash_info_t * info, ulong dest, uchar * cp,
- int len)
-{
-
- int sector;
- int cnt;
- int retcode;
- volatile cfiptr_t src;
- volatile cfiptr_t dst;
-
- src.cp = cp;
- dst.cp = (uchar *) dest;
- sector = find_sector(info, dest);
- flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
- flash_write_cmd(info, sector, 0, FLASH_CMD_WRITE_TO_BUFFER);
- if ((retcode = flash_status_check(info, sector, info->buffer_write_tout,
- "write to buffer")) == ERR_OK) {
- switch (info->portwidth) {
- case FLASH_CFI_8BIT:
- cnt = len;
- break;
- case FLASH_CFI_16BIT:
- cnt = len >> 1;
- break;
- case FLASH_CFI_32BIT:
- cnt = len >> 2;
- break;
- default:
- return ERR_INVAL;
- break;
- }
- flash_write_cmd(info, sector, 0, (uchar) cnt - 1);
- while (cnt-- > 0) {
- switch (info->portwidth) {
- case FLASH_CFI_8BIT:
- *dst.cp++ = *src.cp++;
- break;
- case FLASH_CFI_16BIT:
- *dst.wp++ = *src.wp++;
- break;
- case FLASH_CFI_32BIT:
- *dst.lp++ = *src.lp++;
- break;
- default:
- return ERR_INVAL;
- break;
- }
- }
- flash_write_cmd(info, sector, 0,
- FLASH_CMD_WRITE_BUFFER_CONFIRM);
- retcode =
- flash_full_status_check(info, sector,
- info->buffer_write_tout,
- "buffer write");
- }
- flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
- return retcode;
-}
-#endif /* CFG_USE_FLASH_BUFFER_WRITE */
diff --git a/board/esd/cpci5200/u-boot.lds b/board/esd/cpci5200/u-boot.lds
deleted file mode 100644
index f23432ecfa..0000000000
--- a/board/esd/cpci5200/u-boot.lds
+++ /dev/null
@@ -1,125 +0,0 @@
-/*
- * (C) Copyright 2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc5xxx/start.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/esd/cpci750/64360.h b/board/esd/cpci750/64360.h
deleted file mode 100644
index 262abf3e99..0000000000
--- a/board/esd/cpci750/64360.h
+++ /dev/null
@@ -1,53 +0,0 @@
-/*
- * (C) Copyright 2003
- * Ingo Assmus <ingo.assmus@keymile.com>
- * for cpci750 Reinhard Arlt
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * main board support/init for the cpci750.
- */
-
-#ifndef __64360_H__
-#define __64360_H__
-
-/* CPU Configuration bits */
-#define CPU_CONF_ADDR_MISS_EN (1 << 8)
-#define CPU_CONF_SINGLE_CPU (1 << 11)
-#define CPU_CONF_ENDIANESS (1 << 12)
-#define CPU_CONF_PIPELINE (1 << 13)
-#define CPU_CONF_STOP_RETRY (1 << 17)
-#define CPU_CONF_MULTI_DECODE (1 << 18)
-#define CPU_CONF_DP_VALID (1 << 19)
-#define CPU_CONF_PERR_PROP (1 << 22)
-#define CPU_CONF_AACK_DELAY_2 (1 << 25)
-#define CPU_CONF_AP_VALID (1 << 26)
-#define CPU_CONF_REMAP_WR_DIS (1 << 27)
-
-/* CPU Master Control bits */
-#define CPU_MAST_CTL_ARB_EN (1 << 8)
-#define CPU_MAST_CTL_MASK_BR_1 (1 << 9)
-#define CPU_MAST_CTL_M_WR_TRIG (1 << 10)
-#define CPU_MAST_CTL_M_RD_TRIG (1 << 11)
-#define CPU_MAST_CTL_CLEAN_BLK (1 << 12)
-#define CPU_MAST_CTL_FLUSH_BLK (1 << 13)
-
-#endif /* __64360_H__ */
diff --git a/board/esd/cpci750/Makefile b/board/esd/cpci750/Makefile
deleted file mode 100644
index 04867295cc..0000000000
--- a/board/esd/cpci750/Makefile
+++ /dev/null
@@ -1,44 +0,0 @@
-#
-# (C) Copyright 2001
-# Josh Huber <huber@mclx.com>, Mission Critical Linux, Inc.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-SOBJS = misc.o
-
-OBJS = $(BOARD).o serial.o ../../Marvell/common/memory.o pci.o \
- mv_eth.o mpsc.o i2c.o \
- sdram_init.o strataflash.o ide.o
-
-$(LIB): .depend $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS) $(SOBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/esd/cpci750/config.mk b/board/esd/cpci750/config.mk
deleted file mode 100644
index 7795dfa813..0000000000
--- a/board/esd/cpci750/config.mk
+++ /dev/null
@@ -1,28 +0,0 @@
-#
-# (C) Copyright 2004
-# Reinhard Arlt <reinhard.arlt@esd-electronics.com>
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# cpci750 board
-#
-
-TEXT_BASE = 0xfff00000
diff --git a/board/esd/cpci750/cpci750.c b/board/esd/cpci750/cpci750.c
deleted file mode 100644
index e4b062bdd0..0000000000
--- a/board/esd/cpci750/cpci750.c
+++ /dev/null
@@ -1,885 +0,0 @@
-/*
- * (C) Copyright 2001
- * Josh Huber <huber@mclx.com>, Mission Critical Linux, Inc.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- * modifications for the DB64360 eval board based by Ingo.Assmus@keymile.com
- * modifications for the cpci750 by reinhard.arlt@esd-electronics.com
- */
-
-/*
- * cpci750.c - main board support/init for the esd cpci750.
- */
-
-#include <common.h>
-#include <74xx_7xx.h>
-#include "../../Marvell/include/memory.h"
-#include "../../Marvell/include/pci.h"
-#include "../../Marvell/include/mv_gen_reg.h"
-#include <net.h>
-
-#include "eth.h"
-#include "mpsc.h"
-#include "i2c.h"
-#include "64360.h"
-#include "mv_regs.h"
-
-#undef DEBUG
-/*#define DEBUG */
-
-#ifdef CONFIG_PCI
-#define MAP_PCI
-#endif /* of CONFIG_PCI */
-
-#ifdef DEBUG
-#define DP(x) x
-#else
-#define DP(x)
-#endif
-
-extern void flush_data_cache (void);
-extern void invalidate_l1_instruction_cache (void);
-
-/* ------------------------------------------------------------------------- */
-
-/* this is the current GT register space location */
-/* it starts at CFG_DFL_GT_REGS but moves later to CFG_GT_REGS */
-
-/* Unfortunately, we cant change it while we are in flash, so we initialize it
- * to the "final" value. This means that any debug_led calls before
- * board_early_init_f wont work right (like in cpu_init_f).
- * See also my_remap_gt_regs below. (NTL)
- */
-
-void board_prebootm_init (void);
-unsigned int INTERNAL_REG_BASE_ADDR = CFG_GT_REGS;
-int display_mem_map (void);
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * This is a version of the GT register space remapping function that
- * doesn't touch globals (meaning, it's ok to run from flash.)
- *
- * Unfortunately, this has the side effect that a writable
- * INTERNAL_REG_BASE_ADDR is impossible. Oh well.
- */
-
-void my_remap_gt_regs (u32 cur_loc, u32 new_loc)
-{
- u32 temp;
-
- /* check and see if it's already moved */
-
-/* original ppcboot 1.1.6 source
-
- temp = in_le32((u32 *)(new_loc + INTERNAL_SPACE_DECODE));
- if ((temp & 0xffff) == new_loc >> 20)
- return;
-
- temp = (in_le32((u32 *)(cur_loc + INTERNAL_SPACE_DECODE)) &
- 0xffff0000) | (new_loc >> 20);
-
- out_le32((u32 *)(cur_loc + INTERNAL_SPACE_DECODE), temp);
-
- while (GTREGREAD(INTERNAL_SPACE_DECODE) != temp);
-original ppcboot 1.1.6 source end */
-
- temp = in_le32 ((u32 *) (new_loc + INTERNAL_SPACE_DECODE));
- if ((temp & 0xffff) == new_loc >> 16)
- return;
-
- temp = (in_le32 ((u32 *) (cur_loc + INTERNAL_SPACE_DECODE)) &
- 0xffff0000) | (new_loc >> 16);
-
- out_le32 ((u32 *) (cur_loc + INTERNAL_SPACE_DECODE), temp);
-
- while (GTREGREAD (INTERNAL_SPACE_DECODE) != temp);
-}
-
-#ifdef CONFIG_PCI
-
-static void gt_pci_config (void)
-{
- unsigned int stat;
- unsigned int val = 0x00fff864; /* DINK32: BusNum 23:16, DevNum 15:11, FuncNum 10:8, RegNum 7:2 */
-
- /* In PCIX mode devices provide their own bus and device numbers. We query the Discovery II's
- * config registers by writing ones to the bus and device.
- * We then update the Virtual register with the correct value for the bus and device.
- */
- if ((GTREGREAD (PCI_0_MODE) & (BIT4 | BIT5)) != 0) { /*if PCI-X */
- GT_REG_WRITE (PCI_0_CONFIG_ADDR, BIT31 | val);
-
- GT_REG_READ (PCI_0_CONFIG_DATA_VIRTUAL_REG, &stat);
-
- GT_REG_WRITE (PCI_0_CONFIG_ADDR, BIT31 | val);
- GT_REG_WRITE (PCI_0_CONFIG_DATA_VIRTUAL_REG,
- (stat & 0xffff0000) | CFG_PCI_IDSEL);
-
- }
- if ((GTREGREAD (PCI_1_MODE) & (BIT4 | BIT5)) != 0) { /*if PCI-X */
- GT_REG_WRITE (PCI_1_CONFIG_ADDR, BIT31 | val);
- GT_REG_READ (PCI_1_CONFIG_DATA_VIRTUAL_REG, &stat);
-
- GT_REG_WRITE (PCI_1_CONFIG_ADDR, BIT31 | val);
- GT_REG_WRITE (PCI_1_CONFIG_DATA_VIRTUAL_REG,
- (stat & 0xffff0000) | CFG_PCI_IDSEL);
- }
-
- /* Enable master */
- PCI_MASTER_ENABLE (0, SELF);
- PCI_MASTER_ENABLE (1, SELF);
-
- /* Enable PCI0/1 Mem0 and IO 0 disable all others */
- GT_REG_READ (BASE_ADDR_ENABLE, &stat);
- stat |= (1 << 11) | (1 << 12) | (1 << 13) | (1 << 16) | (1 << 17) | (1
- <<
- 18);
- stat &= ~((1 << 9) | (1 << 10) | (1 << 14) | (1 << 15));
- GT_REG_WRITE (BASE_ADDR_ENABLE, stat);
-
- /* ronen- add write to pci remap registers for 64460.
- in 64360 when writing to pci base go and overide remap automaticaly,
- in 64460 it doesn't */
- GT_REG_WRITE (PCI_0_IO_BASE_ADDR, CFG_PCI0_IO_SPACE >> 16);
- GT_REG_WRITE (PCI_0I_O_ADDRESS_REMAP, CFG_PCI0_IO_SPACE_PCI >> 16);
- GT_REG_WRITE (PCI_0_IO_SIZE, (CFG_PCI0_IO_SIZE - 1) >> 16);
-
- GT_REG_WRITE (PCI_0_MEMORY0_BASE_ADDR, CFG_PCI0_MEM_BASE >> 16);
- GT_REG_WRITE (PCI_0MEMORY0_ADDRESS_REMAP, CFG_PCI0_MEM_BASE >> 16);
- GT_REG_WRITE (PCI_0_MEMORY0_SIZE, (CFG_PCI0_MEM_SIZE - 1) >> 16);
-
- GT_REG_WRITE (PCI_1_IO_BASE_ADDR, CFG_PCI1_IO_SPACE >> 16);
- GT_REG_WRITE (PCI_1I_O_ADDRESS_REMAP, CFG_PCI1_IO_SPACE_PCI >> 16);
- GT_REG_WRITE (PCI_1_IO_SIZE, (CFG_PCI1_IO_SIZE - 1) >> 16);
-
- GT_REG_WRITE (PCI_1_MEMORY0_BASE_ADDR, CFG_PCI1_MEM_BASE >> 16);
- GT_REG_WRITE (PCI_1MEMORY0_ADDRESS_REMAP, CFG_PCI1_MEM_BASE >> 16);
- GT_REG_WRITE (PCI_1_MEMORY0_SIZE, (CFG_PCI1_MEM_SIZE - 1) >> 16);
-
- /* PCI interface settings */
- /* Timeout set to retry forever */
- GT_REG_WRITE (PCI_0TIMEOUT_RETRY, 0x0);
- GT_REG_WRITE (PCI_1TIMEOUT_RETRY, 0x0);
-
- /* ronen - enable only CS0 and Internal reg!! */
- GT_REG_WRITE (PCI_0BASE_ADDRESS_REGISTERS_ENABLE, 0xfffffdfe);
- GT_REG_WRITE (PCI_1BASE_ADDRESS_REGISTERS_ENABLE, 0xfffffdfe);
-
-/*ronen update the pci internal registers base address.*/
-#ifdef MAP_PCI
- for (stat = 0; stat <= PCI_HOST1; stat++)
- pciWriteConfigReg (stat,
- PCI_INTERNAL_REGISTERS_MEMORY_MAPPED_BASE_ADDRESS,
- SELF, CFG_GT_REGS);
-#endif
-
-}
-#endif
-
-/* Setup CPU interface paramaters */
-static void gt_cpu_config (void)
-{
- cpu_t cpu = get_cpu_type ();
- ulong tmp;
-
- /* cpu configuration register */
- tmp = GTREGREAD (CPU_CONFIGURATION);
-
- /* set the SINGLE_CPU bit see MV64360 P.399 */
-#ifndef CFG_GT_DUAL_CPU /* SINGLE_CPU seems to cause JTAG problems */
- tmp |= CPU_CONF_SINGLE_CPU;
-#endif
-
- tmp &= ~CPU_CONF_AACK_DELAY_2;
-
- tmp |= CPU_CONF_DP_VALID;
- tmp |= CPU_CONF_AP_VALID;
-
- tmp |= CPU_CONF_PIPELINE;
-
- GT_REG_WRITE (CPU_CONFIGURATION, tmp); /* Marvell (VXWorks) writes 0x20220FF */
-
- /* CPU master control register */
- tmp = GTREGREAD (CPU_MASTER_CONTROL);
-
- tmp |= CPU_MAST_CTL_ARB_EN;
-
- if ((cpu == CPU_7400) ||
- (cpu == CPU_7410) || (cpu == CPU_7455) || (cpu == CPU_7450)) {
-
- tmp |= CPU_MAST_CTL_CLEAN_BLK;
- tmp |= CPU_MAST_CTL_FLUSH_BLK;
-
- } else {
- /* cleanblock must be cleared for CPUs
- * that do not support this command (603e, 750)
- * see Res#1 */
- tmp &= ~CPU_MAST_CTL_CLEAN_BLK;
- tmp &= ~CPU_MAST_CTL_FLUSH_BLK;
- }
- GT_REG_WRITE (CPU_MASTER_CONTROL, tmp);
-}
-
-/*
- * board_early_init_f.
- *
- * set up gal. device mappings, etc.
- */
-int board_early_init_f (void)
-{
-
- /*
- * set up the GT the way the kernel wants it
- * the call to move the GT register space will obviously
- * fail if it has already been done, but we're going to assume
- * that if it's not at the power-on location, it's where we put
- * it last time. (huber)
- */
-
- my_remap_gt_regs (CFG_DFL_GT_REGS, CFG_GT_REGS);
-
- /* No PCI in first release of Port To_do: enable it. */
-#ifdef CONFIG_PCI
- gt_pci_config ();
-#endif
- /* mask all external interrupt sources */
- GT_REG_WRITE (CPU_INTERRUPT_MASK_REGISTER_LOW, 0);
- GT_REG_WRITE (CPU_INTERRUPT_MASK_REGISTER_HIGH, 0);
- /* new in MV6436x */
- GT_REG_WRITE (CPU_INTERRUPT_1_MASK_REGISTER_LOW, 0);
- GT_REG_WRITE (CPU_INTERRUPT_1_MASK_REGISTER_HIGH, 0);
- /* --------------------- */
- GT_REG_WRITE (PCI_0INTERRUPT_CAUSE_MASK_REGISTER_LOW, 0);
- GT_REG_WRITE (PCI_0INTERRUPT_CAUSE_MASK_REGISTER_HIGH, 0);
- GT_REG_WRITE (PCI_1INTERRUPT_CAUSE_MASK_REGISTER_LOW, 0);
- GT_REG_WRITE (PCI_1INTERRUPT_CAUSE_MASK_REGISTER_HIGH, 0);
- /* does not exist in MV6436x
- GT_REG_WRITE(CPU_INT_0_MASK, 0);
- GT_REG_WRITE(CPU_INT_1_MASK, 0);
- GT_REG_WRITE(CPU_INT_2_MASK, 0);
- GT_REG_WRITE(CPU_INT_3_MASK, 0);
- --------------------- */
-
-
- /* ----- DEVICE BUS SETTINGS ------ */
-
- /*
- * EVB
- * 0 - SRAM ????
- * 1 - RTC ????
- * 2 - UART ????
- * 3 - Flash checked 32Bit Intel Strata
- * boot - BootCS checked 8Bit 29LV040B
- *
- */
-
- /*
- * the dual 7450 module requires burst access to the boot
- * device, so the serial rom copies the boot device to the
- * on-board sram on the eval board, and updates the correct
- * registers to boot from the sram. (device0)
- */
-
- memoryMapDeviceSpace (DEVICE0, CFG_DEV0_SPACE, CFG_DEV0_SIZE);
- memoryMapDeviceSpace (DEVICE1, CFG_DEV1_SPACE, CFG_DEV1_SIZE);
- memoryMapDeviceSpace (DEVICE2, CFG_DEV2_SPACE, CFG_DEV2_SIZE);
- memoryMapDeviceSpace (DEVICE3, CFG_DEV3_SPACE, CFG_DEV3_SIZE);
-
-
- /* configure device timing */
- GT_REG_WRITE (DEVICE_BANK0PARAMETERS, CFG_DEV0_PAR);
- GT_REG_WRITE (DEVICE_BANK1PARAMETERS, CFG_DEV1_PAR);
- GT_REG_WRITE (DEVICE_BANK2PARAMETERS, CFG_DEV2_PAR);
- GT_REG_WRITE (DEVICE_BANK3PARAMETERS, CFG_DEV3_PAR);
-
-#ifdef CFG_32BIT_BOOT_PAR /* set port parameters for Flash device module access */
- /* detect if we are booting from the 32 bit flash */
- if (GTREGREAD (DEVICE_BOOT_BANK_PARAMETERS) & (0x3 << 20)) {
- /* 32 bit boot flash */
- GT_REG_WRITE (DEVICE_BANK3PARAMETERS, CFG_8BIT_BOOT_PAR);
- GT_REG_WRITE (DEVICE_BOOT_BANK_PARAMETERS,
- CFG_32BIT_BOOT_PAR);
- } else {
- /* 8 bit boot flash */
- GT_REG_WRITE (DEVICE_BANK3PARAMETERS, CFG_32BIT_BOOT_PAR);
- GT_REG_WRITE (DEVICE_BOOT_BANK_PARAMETERS, CFG_8BIT_BOOT_PAR);
- }
-#else
- /* 8 bit boot flash only */
-/* GT_REG_WRITE(DEVICE_BOOT_BANK_PARAMETERS, CFG_8BIT_BOOT_PAR);*/
-#endif
-
-
- gt_cpu_config ();
-
- /* MPP setup */
- GT_REG_WRITE (MPP_CONTROL0, CFG_MPP_CONTROL_0);
- GT_REG_WRITE (MPP_CONTROL1, CFG_MPP_CONTROL_1);
- GT_REG_WRITE (MPP_CONTROL2, CFG_MPP_CONTROL_2);
- GT_REG_WRITE (MPP_CONTROL3, CFG_MPP_CONTROL_3);
-
- GT_REG_WRITE (GPP_LEVEL_CONTROL, CFG_GPP_LEVEL_CONTROL);
- DEBUG_LED0_ON ();
- DEBUG_LED1_ON ();
- DEBUG_LED2_ON ();
-
- return 0;
-}
-
-/* various things to do after relocation */
-
-int misc_init_r ()
-{
- icache_enable ();
-#ifdef CFG_L2
- l2cache_enable ();
-#endif
-#ifdef CONFIG_MPSC
-
- mpsc_sdma_init ();
- mpsc_init2 ();
-#endif
-
-#if 0
- /* disable the dcache and MMU */
- dcache_lock ();
-#endif
- return 0;
-}
-
-void after_reloc (ulong dest_addr, gd_t * gd)
-{
-
- memoryMapDeviceSpace (BOOT_DEVICE, CFG_BOOT_SPACE, CFG_BOOT_SIZE);
-
- display_mem_map ();
- /* now, jump to the main ppcboot board init code */
- board_init_r (gd, dest_addr);
- /* NOTREACHED */
-}
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Check Board Identity:
- *
- * right now, assume borad type. (there is just one...after all)
- */
-
-int checkboard (void)
-{
- int l_type = 0;
-
- printf ("BOARD: %s\n", CFG_BOARD_NAME);
- return (l_type);
-}
-
-/* utility functions */
-void debug_led (int led, int mode)
-{
-}
-
-int display_mem_map (void)
-{
- int i, j;
- unsigned int base, size, width;
-
- /* SDRAM */
- printf ("SD (DDR) RAM\n");
- for (i = 0; i <= BANK3; i++) {
- base = memoryGetBankBaseAddress (i);
- size = memoryGetBankSize (i);
- if (size != 0) {
- printf ("BANK%d: base - 0x%08x\tsize - %dM bytes\n",
- i, base, size >> 20);
- }
- }
-#ifdef CONFIG_PCI
- /* CPU's PCI windows */
- for (i = 0; i <= PCI_HOST1; i++) {
- printf ("\nCPU's PCI %d windows\n", i);
- base = pciGetSpaceBase (i, PCI_IO);
- size = pciGetSpaceSize (i, PCI_IO);
- printf (" IO: base - 0x%08x\tsize - %dM bytes\n", base,
- size >> 20);
- for (j = 0;
- j <=
- PCI_REGION0
- /*ronen currently only first PCI MEM is used 3 */ ;
- j++) {
- base = pciGetSpaceBase (i, j);
- size = pciGetSpaceSize (i, j);
- printf ("MEMORY %d: base - 0x%08x\tsize - %dM bytes\n", j, base, size >> 20);
- }
- }
-#endif /* of CONFIG_PCI */
- /* Devices */
- printf ("\nDEVICES\n");
- for (i = 0; i <= DEVICE3; i++) {
- base = memoryGetDeviceBaseAddress (i);
- size = memoryGetDeviceSize (i);
- width = memoryGetDeviceWidth (i) * 8;
- printf ("DEV %d: base - 0x%08x size - %dM bytes\twidth - %d bits", i, base, size >> 20, width);
- if (i == 0)
- printf ("\t- FLASH\n");
- else if (i == 1)
- printf ("\t- FLASH\n");
- else if (i == 2)
- printf ("\t- FLASH\n");
- else
- printf ("\t- RTC/REGS/CAN\n");
- }
-
- /* Bootrom */
- base = memoryGetDeviceBaseAddress (BOOT_DEVICE); /* Boot */
- size = memoryGetDeviceSize (BOOT_DEVICE);
- width = memoryGetDeviceWidth (BOOT_DEVICE) * 8;
- printf (" BOOT: base - 0x%08x size - %dM bytes\twidth - %d bits\t- FLASH\n",
- base, size >> 20, width);
- return (0);
-}
-
-/* DRAM check routines copied from gw8260 */
-
-#if defined (CFG_DRAM_TEST)
-
-/*********************************************************************/
-/* NAME: move64() - moves a double word (64-bit) */
-/* */
-/* DESCRIPTION: */
-/* this function performs a double word move from the data at */
-/* the source pointer to the location at the destination pointer. */
-/* */
-/* INPUTS: */
-/* unsigned long long *src - pointer to data to move */
-/* */
-/* OUTPUTS: */
-/* unsigned long long *dest - pointer to locate to move data */
-/* */
-/* RETURNS: */
-/* None */
-/* */
-/* RESTRICTIONS/LIMITATIONS: */
-/* May cloober fr0. */
-/* */
-/*********************************************************************/
-static void move64 (unsigned long long *src, unsigned long long *dest)
-{
- asm ("lfd 0, 0(3)\n\t" /* fpr0 = *scr */
- "stfd 0, 0(4)" /* *dest = fpr0 */
- : : : "fr0"); /* Clobbers fr0 */
- return;
-}
-
-
-#if defined (CFG_DRAM_TEST_DATA)
-
-unsigned long long pattern[] = {
- 0xaaaaaaaaaaaaaaaaLL,
- 0xccccccccccccccccLL,
- 0xf0f0f0f0f0f0f0f0LL,
- 0xff00ff00ff00ff00LL,
- 0xffff0000ffff0000LL,
- 0xffffffff00000000LL,
- 0x00000000ffffffffLL,
- 0x0000ffff0000ffffLL,
- 0x00ff00ff00ff00ffLL,
- 0x0f0f0f0f0f0f0f0fLL,
- 0x3333333333333333LL,
- 0x5555555555555555LL,
-};
-
-/*********************************************************************/
-/* NAME: mem_test_data() - test data lines for shorts and opens */
-/* */
-/* DESCRIPTION: */
-/* Tests data lines for shorts and opens by forcing adjacent data */
-/* to opposite states. Because the data lines could be routed in */
-/* an arbitrary manner the must ensure test patterns ensure that */
-/* every case is tested. By using the following series of binary */
-/* patterns every combination of adjacent bits is test regardless */
-/* of routing. */
-/* */
-/* ...101010101010101010101010 */
-/* ...110011001100110011001100 */
-/* ...111100001111000011110000 */
-/* ...111111110000000011111111 */
-/* */
-/* Carrying this out, gives us six hex patterns as follows: */
-/* */
-/* 0xaaaaaaaaaaaaaaaa */
-/* 0xcccccccccccccccc */
-/* 0xf0f0f0f0f0f0f0f0 */
-/* 0xff00ff00ff00ff00 */
-/* 0xffff0000ffff0000 */
-/* 0xffffffff00000000 */
-/* */
-/* The number test patterns will always be given by: */
-/* */
-/* log(base 2)(number data bits) = log2 (64) = 6 */
-/* */
-/* To test for short and opens to other signals on our boards. we */
-/* simply */
-/* test with the 1's complemnt of the paterns as well. */
-/* */
-/* OUTPUTS: */
-/* Displays failing test pattern */
-/* */
-/* RETURNS: */
-/* 0 - Passed test */
-/* 1 - Failed test */
-/* */
-/* RESTRICTIONS/LIMITATIONS: */
-/* Assumes only one one SDRAM bank */
-/* */
-/*********************************************************************/
-int mem_test_data (void)
-{
- unsigned long long *pmem = (unsigned long long *) CFG_MEMTEST_START;
- unsigned long long temp64 = 0;
- int num_patterns = sizeof (pattern) / sizeof (pattern[0]);
- int i;
- unsigned int hi, lo;
-
- for (i = 0; i < num_patterns; i++) {
- move64 (&(pattern[i]), pmem);
- move64 (pmem, &temp64);
-
- /* hi = (temp64>>32) & 0xffffffff; */
- /* lo = temp64 & 0xffffffff; */
- /* printf("\ntemp64 = 0x%08x%08x", hi, lo); */
-
- hi = (pattern[i] >> 32) & 0xffffffff;
- lo = pattern[i] & 0xffffffff;
- /* printf("\npattern[%d] = 0x%08x%08x", i, hi, lo); */
-
- if (temp64 != pattern[i]) {
- printf ("\n Data Test Failed, pattern 0x%08x%08x",
- hi, lo);
- return 1;
- }
- }
-
- return 0;
-}
-#endif /* CFG_DRAM_TEST_DATA */
-
-#if defined (CFG_DRAM_TEST_ADDRESS)
-/*********************************************************************/
-/* NAME: mem_test_address() - test address lines */
-/* */
-/* DESCRIPTION: */
-/* This function performs a test to verify that each word im */
-/* memory is uniquly addressable. The test sequence is as follows: */
-/* */
-/* 1) write the address of each word to each word. */
-/* 2) verify that each location equals its address */
-/* */
-/* OUTPUTS: */
-/* Displays failing test pattern and address */
-/* */
-/* RETURNS: */
-/* 0 - Passed test */
-/* 1 - Failed test */
-/* */
-/* RESTRICTIONS/LIMITATIONS: */
-/* */
-/* */
-/*********************************************************************/
-int mem_test_address (void)
-{
- volatile unsigned int *pmem =
- (volatile unsigned int *) CFG_MEMTEST_START;
- const unsigned int size = (CFG_MEMTEST_END - CFG_MEMTEST_START) / 4;
- unsigned int i;
-
- /* write address to each location */
- for (i = 0; i < size; i++) {
- pmem[i] = i;
- }
-
- /* verify each loaction */
- for (i = 0; i < size; i++) {
- if (pmem[i] != i) {
- printf ("\n Address Test Failed at 0x%x", i);
- return 1;
- }
- }
- return 0;
-}
-#endif /* CFG_DRAM_TEST_ADDRESS */
-
-#if defined (CFG_DRAM_TEST_WALK)
-/*********************************************************************/
-/* NAME: mem_march() - memory march */
-/* */
-/* DESCRIPTION: */
-/* Marches up through memory. At each location verifies rmask if */
-/* read = 1. At each location write wmask if write = 1. Displays */
-/* failing address and pattern. */
-/* */
-/* INPUTS: */
-/* volatile unsigned long long * base - start address of test */
-/* unsigned int size - number of dwords(64-bit) to test */
-/* unsigned long long rmask - read verify mask */
-/* unsigned long long wmask - wrtie verify mask */
-/* short read - verifies rmask if read = 1 */
-/* short write - writes wmask if write = 1 */
-/* */
-/* OUTPUTS: */
-/* Displays failing test pattern and address */
-/* */
-/* RETURNS: */
-/* 0 - Passed test */
-/* 1 - Failed test */
-/* */
-/* RESTRICTIONS/LIMITATIONS: */
-/* */
-/* */
-/*********************************************************************/
-int mem_march (volatile unsigned long long *base,
- unsigned int size,
- unsigned long long rmask,
- unsigned long long wmask, short read, short write)
-{
- unsigned int i;
- unsigned long long temp = 0;
- unsigned int hitemp, lotemp, himask, lomask;
-
- for (i = 0; i < size; i++) {
- if (read != 0) {
- /* temp = base[i]; */
- move64 ((unsigned long long *) &(base[i]), &temp);
- if (rmask != temp) {
- hitemp = (temp >> 32) & 0xffffffff;
- lotemp = temp & 0xffffffff;
- himask = (rmask >> 32) & 0xffffffff;
- lomask = rmask & 0xffffffff;
-
- printf ("\n Walking one's test failed: address = 0x%08x," "\n\texpected 0x%08x%08x, found 0x%08x%08x", i << 3, himask, lomask, hitemp, lotemp);
- return 1;
- }
- }
- if (write != 0) {
- /* base[i] = wmask; */
- move64 (&wmask, (unsigned long long *) &(base[i]));
- }
- }
- return 0;
-}
-#endif /* CFG_DRAM_TEST_WALK */
-
-/*********************************************************************/
-/* NAME: mem_test_walk() - a simple walking ones test */
-/* */
-/* DESCRIPTION: */
-/* Performs a walking ones through entire physical memory. The */
-/* test uses as series of memory marches, mem_march(), to verify */
-/* and write the test patterns to memory. The test sequence is as */
-/* follows: */
-/* 1) march writing 0000...0001 */
-/* 2) march verifying 0000...0001 , writing 0000...0010 */
-/* 3) repeat step 2 shifting masks left 1 bit each time unitl */
-/* the write mask equals 1000...0000 */
-/* 4) march verifying 1000...0000 */
-/* The test fails if any of the memory marches return a failure. */
-/* */
-/* OUTPUTS: */
-/* Displays which pass on the memory test is executing */
-/* */
-/* RETURNS: */
-/* 0 - Passed test */
-/* 1 - Failed test */
-/* */
-/* RESTRICTIONS/LIMITATIONS: */
-/* */
-/* */
-/*********************************************************************/
-int mem_test_walk (void)
-{
- unsigned long long mask;
- volatile unsigned long long *pmem =
- (volatile unsigned long long *) CFG_MEMTEST_START;
- const unsigned long size = (CFG_MEMTEST_END - CFG_MEMTEST_START) / 8;
-
- unsigned int i;
-
- mask = 0x01;
-
- printf ("Initial Pass");
- mem_march (pmem, size, 0x0, 0x1, 0, 1);
-
- printf ("\b\b\b\b\b\b\b\b\b\b\b\b");
- printf (" ");
- printf (" ");
- printf ("\b\b\b\b\b\b\b\b\b\b\b\b");
-
- for (i = 0; i < 63; i++) {
- printf ("Pass %2d", i + 2);
- if (mem_march (pmem, size, mask, mask << 1, 1, 1) != 0) {
- /*printf("mask: 0x%x, pass: %d, ", mask, i); */
- return 1;
- }
- mask = mask << 1;
- printf ("\b\b\b\b\b\b\b");
- }
-
- printf ("Last Pass");
- if (mem_march (pmem, size, 0, mask, 0, 1) != 0) {
- /* printf("mask: 0x%x", mask); */
- return 1;
- }
- printf ("\b\b\b\b\b\b\b\b\b");
- printf (" ");
- printf ("\b\b\b\b\b\b\b\b\b");
-
- return 0;
-}
-
-/*********************************************************************/
-/* NAME: testdram() - calls any enabled memory tests */
-/* */
-/* DESCRIPTION: */
-/* Runs memory tests if the environment test variables are set to */
-/* 'y'. */
-/* */
-/* INPUTS: */
-/* testdramdata - If set to 'y', data test is run. */
-/* testdramaddress - If set to 'y', address test is run. */
-/* testdramwalk - If set to 'y', walking ones test is run */
-/* */
-/* OUTPUTS: */
-/* None */
-/* */
-/* RETURNS: */
-/* 0 - Passed test */
-/* 1 - Failed test */
-/* */
-/* RESTRICTIONS/LIMITATIONS: */
-/* */
-/* */
-/*********************************************************************/
-int testdram (void)
-{
- char *s;
- int rundata = 0;
- int runaddress = 0;
- int runwalk = 0;
-
-#ifdef CFG_DRAM_TEST_DATA
- s = getenv ("testdramdata");
- rundata = (s && (*s == 'y')) ? 1 : 0;
-#endif
-#ifdef CFG_DRAM_TEST_ADDRESS
- s = getenv ("testdramaddress");
- runaddress = (s && (*s == 'y')) ? 1 : 0;
-#endif
-#ifdef CFG_DRAM_TEST_WALK
- s = getenv ("testdramwalk");
- runwalk = (s && (*s == 'y')) ? 1 : 0;
-#endif
-
- if ((rundata == 1) || (runaddress == 1) || (runwalk == 1)) {
- printf ("Testing RAM from 0x%08x to 0x%08x ... (don't panic... that will take a moment !!!!)\n", CFG_MEMTEST_START, CFG_MEMTEST_END);
- }
-#ifdef CFG_DRAM_TEST_DATA
- if (rundata == 1) {
- printf ("Test DATA ... ");
- if (mem_test_data () == 1) {
- printf ("failed \n");
- return 1;
- } else
- printf ("ok \n");
- }
-#endif
-#ifdef CFG_DRAM_TEST_ADDRESS
- if (runaddress == 1) {
- printf ("Test ADDRESS ... ");
- if (mem_test_address () == 1) {
- printf ("failed \n");
- return 1;
- } else
- printf ("ok \n");
- }
-#endif
-#ifdef CFG_DRAM_TEST_WALK
- if (runwalk == 1) {
- printf ("Test WALKING ONEs ... ");
- if (mem_test_walk () == 1) {
- printf ("failed \n");
- return 1;
- } else
- printf ("ok \n");
- }
-#endif
- if ((rundata == 1) || (runaddress == 1) || (runwalk == 1)) {
- printf ("passed\n");
- }
- return 0;
-
-}
-#endif /* CFG_DRAM_TEST */
-
-/* ronen - the below functions are used by the bootm function */
-/* - we map the base register to fbe00000 (same mapping as in the LSP) */
-/* - we turn off the RX gig dmas - to prevent the dma from overunning */
-/* the kernel data areas. */
-/* - we diable and invalidate the icache and dcache. */
-void my_remap_gt_regs_bootm (u32 cur_loc, u32 new_loc)
-{
- u32 temp;
-
- temp = in_le32 ((u32 *) (new_loc + INTERNAL_SPACE_DECODE));
- if ((temp & 0xffff) == new_loc >> 16)
- return;
-
- temp = (in_le32 ((u32 *) (cur_loc + INTERNAL_SPACE_DECODE)) &
- 0xffff0000) | (new_loc >> 16);
-
- out_le32 ((u32 *) (cur_loc + INTERNAL_SPACE_DECODE), temp);
-
- while ((WORD_SWAP (*((volatile unsigned int *) (NONE_CACHEABLE |
- new_loc |
- (INTERNAL_SPACE_DECODE)))))
- != temp);
-
-}
-
-void board_prebootm_init ()
-{
-
-/* change window size of PCI1 IO in order tp prevent overlaping with REG BASE. */
- GT_REG_WRITE (PCI_1_IO_SIZE, (_64K - 1) >> 16);
-
-/* Stop GigE Rx DMA engines */
- GT_REG_WRITE (MV64360_ETH_RECEIVE_QUEUE_COMMAND_REG (0), 0x0000ff00);
-/* GT_REG_WRITE (MV64360_ETH_RECEIVE_QUEUE_COMMAND_REG (1), 0x0000ff00); */
-/* GV_REG_WRITE (MV64360_ETH_RECEIVE_QUEUE_COMMAND_REG (2), 0x0000ff00); */
-
-/* Relocate MV64360 internal regs */
- my_remap_gt_regs_bootm (CFG_GT_REGS, CFG_DFL_GT_REGS);
-
- icache_disable ();
- invalidate_l1_instruction_cache ();
- flush_data_cache ();
- dcache_disable ();
-}
diff --git a/board/esd/cpci750/eth.h b/board/esd/cpci750/eth.h
deleted file mode 100644
index aab32d2a5a..0000000000
--- a/board/esd/cpci750/eth.h
+++ /dev/null
@@ -1,43 +0,0 @@
-/*
- * (C) Copyright 2001
- * Josh Huber <huber@mclx.com>, Mission Critical Linux, Inc.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * eth.h - header file for the polled mode GT ethernet driver
- */
-
-#ifndef __EVB64360_ETH_H__
-#define __EVB64360_ETH_H__
-
-#include <asm/types.h>
-#include <asm/io.h>
-#include <asm/byteorder.h>
-#include <common.h>
-
-
-int db64360_eth0_poll(void);
-int db64360_eth0_transmit(unsigned int s, volatile char *p);
-void db64360_eth0_disable(void);
-bool network_start(bd_t *bis);
-
-
-#endif /* __EVB64360_ETH_H__ */
diff --git a/board/esd/cpci750/i2c.c b/board/esd/cpci750/i2c.c
deleted file mode 100644
index 5b1bc01c21..0000000000
--- a/board/esd/cpci750/i2c.c
+++ /dev/null
@@ -1,487 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- * Hacked for the DB64360 board by Ingo.Assmus@keymile.com
- * extra improvments by Brain Waite
- * for cpci750 by reinhard.arlt@esd-electronics.com
- */
-#include <common.h>
-#include <mpc8xx.h>
-#include <malloc.h>
-#include "../../Marvell/include/mv_gen_reg.h"
-#include "../../Marvell/include/core.h"
-
-#define I2C_DELAY 100
-#undef DEBUG_I2C
-
-#ifdef DEBUG_I2C
-#define DP(x) x
-#else
-#define DP(x)
-#endif
-
-/* Assuming that there is only one master on the bus (us) */
-
-static void i2c_init (int speed, int slaveaddr)
-{
- unsigned int n, m, freq, margin, power;
- unsigned int actualN = 0, actualM = 0;
- unsigned int minMargin = 0xffffffff;
- unsigned int tclk = CFG_TCLK;
- unsigned int i2cFreq = speed; /* 100000 max. Fast mode not supported */
-
- DP (puts ("i2c_init\n"));
-/* gtI2cMasterInit */
- for (n = 0; n < 8; n++) {
- for (m = 0; m < 16; m++) {
- power = 2 << n; /* power = 2^(n+1) */
- freq = tclk / (10 * (m + 1) * power);
- if (i2cFreq > freq)
- margin = i2cFreq - freq;
- else
- margin = freq - i2cFreq;
- if (margin < minMargin) {
- minMargin = margin;
- actualN = n;
- actualM = m;
- }
- }
- }
-
- DP (puts ("setup i2c bus\n"));
-
- /* Setup bus */
- /* gtI2cReset */
- GT_REG_WRITE (I2C_SOFT_RESET, 0);
- asm(" sync");
- GT_REG_WRITE (I2C_CONTROL, 0);
- asm(" sync");
-
- DP (puts ("set baudrate\n"));
-
- GT_REG_WRITE (I2C_STATUS_BAUDE_RATE, (actualM << 3) | actualN);
- asm(" sync");
-
- DP (puts ("udelay...\n"));
-
- udelay (I2C_DELAY);
-
- GT_REG_WRITE (I2C_CONTROL, (0x1 << 2) | (0x1 << 6));
- asm(" sync");
-}
-
-
-static uchar i2c_select_device (uchar dev_addr, uchar read, int ten_bit)
-{
- unsigned int status, data, bits = 7;
- unsigned int control;
- int count = 0;
-
- DP (puts ("i2c_select_device\n"));
-
- /* Output slave address */
-
- if (ten_bit) {
- bits = 10;
- }
-
- GT_REG_READ (I2C_CONTROL, &control);
- control |= (0x1 << 2);
- GT_REG_WRITE (I2C_CONTROL, control);
- asm(" sync");
-
- GT_REG_READ (I2C_CONTROL, &control);
- control |= (0x1 << 5); /* generate the I2C_START_BIT */
- GT_REG_WRITE (I2C_CONTROL, control);
- asm(" sync");
- RESET_REG_BITS (I2C_CONTROL, (0x01 << 3));
- asm(" sync");
-
- GT_REG_READ (I2C_CONTROL, &status);
- while ((status & 0x08) != 0x08) {
- GT_REG_READ (I2C_CONTROL, &status);
- }
-
-
- count = 0;
-
- GT_REG_READ (I2C_STATUS_BAUDE_RATE, &status);
- while (((status & 0xff) != 0x08) && ((status & 0xff) != 0x10)){
- if (count > 200) {
-#ifdef DEBUG_I2C
- printf ("Failed to set startbit: 0x%02x\n", status);
-#endif
- GT_REG_WRITE (I2C_CONTROL, (0x1 << 4)); /*stop */
- asm(" sync");
- return (status);
- }
- GT_REG_READ (I2C_STATUS_BAUDE_RATE, &status);
- count++;
- }
-
- DP (puts ("i2c_select_device:write addr byte\n"));
-
- /* assert the address */
-
- data = (dev_addr << 1);
- /* set the read bit */
- data |= read;
- GT_REG_WRITE (I2C_DATA, data);
- asm(" sync");
- RESET_REG_BITS (I2C_CONTROL, BIT3);
- asm(" sync");
-
- GT_REG_READ (I2C_CONTROL, &status);
- while ((status & 0x08) != 0x08) {
- GT_REG_READ (I2C_CONTROL, &status);
- }
-
- GT_REG_READ (I2C_STATUS_BAUDE_RATE, &status);
- count = 0;
- while (((status & 0xff) != 0x40) && ((status & 0xff) != 0x18)) {
- if (count > 200) {
-#ifdef DEBUG_I2C
- printf ("Failed to write address: 0x%02x\n", status);
-#endif
- GT_REG_WRITE (I2C_CONTROL, (0x1 << 4)); /*stop */
- return (status);
- }
- GT_REG_READ (I2C_STATUS_BAUDE_RATE, &status);
- asm(" sync");
- count++;
- }
-
- if (bits == 10) {
- printf ("10 bit I2C addressing not yet implemented\n");
- return (0xff);
- }
-
- return (0);
-}
-
-static uchar i2c_get_data (uchar * return_data, int len)
-{
-
- unsigned int data, status;
- int count = 0;
-
- DP (puts ("i2c_get_data\n"));
-
- while (len) {
-
- RESET_REG_BITS (I2C_CONTROL, BIT3);
- asm(" sync");
-
- /* Get and return the data */
-
- GT_REG_READ (I2C_CONTROL, &status);
- while ((status & 0x08) != 0x08) {
- GT_REG_READ (I2C_CONTROL, &status);
- }
-
- GT_REG_READ (I2C_STATUS_BAUDE_RATE, &status);
- count++;
- while ((status & 0xff) != 0x50) {
- if (count > 20) {
-#ifdef DEBUG_I2C
- printf ("Failed to get data len status: 0x%02x\n", status);
-#endif
- GT_REG_WRITE (I2C_CONTROL, (0x1 << 4)); /*stop */
- asm(" sync");
- return 0;
- }
- GT_REG_READ (I2C_STATUS_BAUDE_RATE, &status);
- count++;
- }
- GT_REG_READ (I2C_DATA, &data);
- len--;
- *return_data = (uchar) data;
- return_data++;
-
- }
- RESET_REG_BITS (I2C_CONTROL, BIT2 | BIT3);
- asm(" sync");
- count = 0;
-
- GT_REG_READ (I2C_CONTROL, &status);
- while ((status & 0x08) != 0x08) {
- GT_REG_READ (I2C_CONTROL, &status);
- }
-
- while ((status & 0xff) != 0x58) {
- if (count > 2000) {
- GT_REG_WRITE (I2C_CONTROL, (0x1 << 4)); /*stop */
- return (status);
- }
- GT_REG_READ (I2C_STATUS_BAUDE_RATE, &status);
- count++;
- }
- GT_REG_WRITE (I2C_CONTROL, (0x1 << 4)); /* stop */
- asm(" sync");
- RESET_REG_BITS (I2C_CONTROL, (0x1 << 3));
- asm(" sync");
-
- return (0);
-}
-
-
-static uchar i2c_write_data (unsigned int *data, int len)
-{
- unsigned int status;
- int count;
- unsigned int temp;
- unsigned int *temp_ptr = data;
-
- DP (puts ("i2c_write_data\n"));
-
- while (len) {
- count = 0;
- temp = (unsigned int) (*temp_ptr);
- GT_REG_WRITE (I2C_DATA, temp);
- asm(" sync");
- RESET_REG_BITS (I2C_CONTROL, (0x1 << 3));
- asm(" sync");
-
- GT_REG_READ (I2C_CONTROL, &status);
- while ((status & 0x08) != 0x08) {
- GT_REG_READ (I2C_CONTROL, &status);
- }
-
- GT_REG_READ (I2C_STATUS_BAUDE_RATE, &status);
- count++;
- while ((status & 0xff) != 0x28) {
- if (count > 200) {
- GT_REG_WRITE (I2C_CONTROL, (0x1 << 4)); /*stop */
- asm(" sync");
- return (status);
- }
- GT_REG_READ (I2C_STATUS_BAUDE_RATE, &status);
- count++;
- }
- len--;
- temp_ptr++;
- }
- return (0);
-}
-
-
-static uchar i2c_write_byte (unsigned char *data, int len)
-{
- unsigned int status;
- int count;
- unsigned int temp;
- unsigned char *temp_ptr = data;
-
- DP (puts ("i2c_write_byte\n"));
-
- while (len) {
- count = 0;
- /* Set and assert the data */
- temp = *temp_ptr;
- GT_REG_WRITE (I2C_DATA, temp);
- asm(" sync");
- RESET_REG_BITS (I2C_CONTROL, (0x1 << 3));
- asm(" sync");
-
-
- GT_REG_READ (I2C_CONTROL, &status);
- while ((status & 0x08) != 0x08) {
- GT_REG_READ (I2C_CONTROL, &status);
- }
-
- GT_REG_READ (I2C_STATUS_BAUDE_RATE, &status);
- count++;
- while ((status & 0xff) != 0x28) {
- if (count > 200) {
- GT_REG_WRITE (I2C_CONTROL, (0x1 << 4)); /*stop */
- asm(" sync");
- return (status);
- }
- GT_REG_READ (I2C_STATUS_BAUDE_RATE, &status);
- count++;
- }
- len--;
- temp_ptr++;
- }
- return (0);
-}
-
-static uchar
-i2c_set_dev_offset (uchar dev_addr, unsigned int offset, int ten_bit,
- int alen)
-{
- uchar status;
- unsigned int table[2];
-
- table[1] = (offset ) & 0x0ff; /* low byte */
- table[0] = (offset >> 8) & 0x0ff; /* high byte */
-
- DP (puts ("i2c_set_dev_offset\n"));
-
- status = i2c_select_device (dev_addr, 0, ten_bit);
- if (status) {
-#ifdef DEBUG_I2C
-22 printf ("Failed to select device setting offset: 0x%02x\n",
- status);
-#endif
- return status;
- }
-/* check the address offset length */
- if (alen == 0)
- /* no address offset */
- return (0);
- else if (alen == 1) {
- /* 1 byte address offset */
- status = i2c_write_data (&offset, 1);
- if (status) {
-#ifdef DEBUG_I2C
- printf ("Failed to write data: 0x%02x\n", status);
-#endif
- return status;
- }
- } else if (alen == 2) {
- /* 2 bytes address offset */
- status = i2c_write_data (table, 2);
- if (status) {
-#ifdef DEBUG_I2C
- printf ("Failed to write data: 0x%02x\n", status);
-#endif
- return status;
- }
- } else {
- /* address offset unknown or not supported */
- printf ("Address length offset %d is not supported\n", alen);
- return 1;
- }
- return 0; /* sucessful completion */
-}
-
-uchar
-i2c_read (uchar dev_addr, unsigned int offset, int alen, uchar * data,
- int len)
-{
- uchar status = 0;
- unsigned int i2cFreq = CFG_I2C_SPEED;
-
- DP (puts ("i2c_read\n"));
-
- i2c_init (i2cFreq, 0); /* set the i2c frequency */
-
- status = i2c_set_dev_offset (dev_addr, offset, 0, alen); /* send the slave address + offset */
- if (status) {
-#ifdef DEBUG_I2C
- printf ("Failed to set slave address & offset: 0x%02x\n",
- status);
-#endif
- return status;
- }
-
- status = i2c_select_device (dev_addr, 1, 0);
- if (status) {
-#ifdef DEBUG_I2C
- printf ("Failed to select device for data read: 0x%02x\n",
- status);
-#endif
- return status;
- }
-
- status = i2c_get_data (data, len);
- if (status) {
-#ifdef DEBUG_I2C
- printf ("Data not read: 0x%02x\n", status);
-#endif
- return status;
- }
-
- return 0;
-}
-
-
-void i2c_stop (void)
-{
- GT_REG_WRITE (I2C_CONTROL, (0x1 << 4));
- asm(" sync");
-}
-
-
-uchar
-i2c_write (uchar dev_addr, unsigned int offset, int alen, uchar * data,
- int len)
-{
- uchar status = 0;
- unsigned int i2cFreq = CFG_I2C_SPEED;
-
- DP (puts ("i2c_write\n"));
-
- i2c_init (i2cFreq, 0); /* set the i2c frequency */
-
- status = i2c_set_dev_offset (dev_addr, offset, 0, alen); /* send the slave address + offset */
- if (status) {
-#ifdef DEBUG_I2C
- printf ("Failed to set slave address & offset: 0x%02x\n",
- status);
-#endif
- return status;
- }
-
-
- status = i2c_write_byte (data, len); /* write the data */
- if (status) {
-#ifdef DEBUG_I2C
- printf ("Data not written: 0x%02x\n", status);
-#endif
- return status;
- }
- /* issue a stop bit */
- i2c_stop ();
- return 0;
-}
-
-
-int i2c_probe (uchar chip)
-{
-
-#ifdef DEBUG_I2C
- unsigned int i2c_status;
-#endif
- uchar status = 0;
- unsigned int i2cFreq = CFG_I2C_SPEED;
-
- DP (puts ("i2c_probe\n"));
-
- i2c_init (i2cFreq, 0); /* set the i2c frequency */
-
- status = i2c_set_dev_offset (chip, 0, 0, 0); /* send the slave address + no offset */
- if (status) {
-#ifdef DEBUG_I2C
- printf ("Failed to set slave address: 0x%02x\n", status);
-#endif
- return (int) status;
- }
-#ifdef DEBUG_I2C
- GT_REG_READ (I2C_STATUS_BAUDE_RATE, &i2c_status);
- printf ("address %#x returned %#x\n", chip, i2c_status);
-#endif
- /* issue a stop bit */
- i2c_stop ();
- return 0; /* successful completion */
-}
diff --git a/board/esd/cpci750/i2c.h b/board/esd/cpci750/i2c.h
deleted file mode 100644
index b669ff0031..0000000000
--- a/board/esd/cpci750/i2c.h
+++ /dev/null
@@ -1,32 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- * Hacked for the DB64360 board by Ingo.Assmus@keymile.com
- */
-
-#ifndef __I2C_H__
-#define __I2C_H__
-
-/* function declarations */
-uchar i2c_read(uchar, unsigned int, int, uchar*, int);
-
-#endif
diff --git a/board/esd/cpci750/ide.c b/board/esd/cpci750/ide.c
deleted file mode 100644
index bea99ce8e7..0000000000
--- a/board/esd/cpci750/ide.c
+++ /dev/null
@@ -1,65 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- */
-/* ide.c - ide support functions */
-
-
-#include <common.h>
-#ifdef CFG_CMD_IDE
-#include <ata.h>
-#include <ide.h>
-#include <pci.h>
-
-extern ulong ide_bus_offset[CFG_IDE_MAXBUS];
-
-int ide_preinit (void)
-{
- int status;
- pci_dev_t devbusfn;
- int l;
-
- status = 1;
- for (l = 0; l < CFG_IDE_MAXBUS; l++) {
- ide_bus_offset[l] = -ATA_STATUS;
- }
- devbusfn = pci_find_device (0x1103, 0x0004, 0);
- if (devbusfn != -1) {
- status = 0;
-
- pci_read_config_dword (devbusfn, PCI_BASE_ADDRESS_0,
- (u32 *) & ide_bus_offset[0]);
- ide_bus_offset[0] &= 0xfffffffe;
- ide_bus_offset[0] += CFG_PCI0_IO_SPACE;
- pci_read_config_dword (devbusfn, PCI_BASE_ADDRESS_2,
- (u32 *) & ide_bus_offset[1]);
- ide_bus_offset[1] &= 0xfffffffe;
- ide_bus_offset[1] += CFG_PCI0_IO_SPACE;
- }
- return (status);
-}
-
-void ide_set_reset (int flag) {
- return;
-}
-
-#endif /* of CONFIG_CMDS_IDE */
diff --git a/board/esd/cpci750/local.h b/board/esd/cpci750/local.h
deleted file mode 100644
index bca0e1ff50..0000000000
--- a/board/esd/cpci750/local.h
+++ /dev/null
@@ -1,85 +0,0 @@
-/*
- * (C) Copyright 2003
- * Ingo Assmus <ingo.assmus@keymile.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * include/local.h - local configuration options, board specific
- */
-
-#ifndef __LOCAL_H
-#define __LOCAL_H
-
-/*
- * High Level Configuration Options
- * (easy to change)
- */
-
-/* This tells PPCBoot that the config options are compiled in */
-/* #undef ENV_IS_EMBEDDED */
-/* Don't touch this! PPCBOOT figures this out based on other
- * magic. */
-
-/* Uncomment and define any of the below options */
-
-/* #define CONFIG_750CX */ /* The 750CX doesn't support as many things in L2CR */
-#define CONFIG_750FX /* The 750FX doesn't support as many things in L2CR like 750CX*/
-
-/* These want string arguments */
-/* #define CONFIG_BOOTARGS */
-/* #define CONFIG_BOOTCOMMAND */
-/* #define CONFIG_RAMBOOTCOMMAND */
-/* #define CONFIG_NFSBOOTCOMMAND */
-/* #define CFG_AUTOLOAD */
-/* #define CONFIG_PREBOOT */
-
-/* These don't */
-
-/* #define CONFIG_BOOTDELAY */
-/* #define CONFIG_BAUDRATE */
-/* #define CONFIG_LOADS_ECHO */
-/* #define CONFIG_ETHADDR */
-/* #define CONFIG_ETH2ADDR */
-/* #define CONFIG_ETH3ADDR */
-/* #define CONFIG_IPADDR */
-/* #define CONFIG_SERVERIP */
-/* #define CONFIG_ROOTPATH */
-/* #define CONFIG_GATEWAYIP */
-/* #define CONFIG_NETMASK */
-/* #define CONFIG_HOSTNAME */
-/* #define CONFIG_BOOTFILE */
-/* #define CONFIG_LOADADDR */
-
-/* these hardware addresses are pretty bogus, please change them to
- suit your needs */
-
-/* first ethernet */
-/* #define CONFIG_ETHADDR 86:06:2d:7e:c6:53 */
-#define CONFIG_ETHADDR 64:36:00:00:00:01
-
-/* next two ethernet hwaddrs */
-#define CONFIG_HAS_ETH1
-#define CONFIG_ETH1ADDR 86:06:2d:7e:c6:54
-#define CONFIG_HAS_ETH2
-#define CONFIG_ETH2ADDR 86:06:2d:7e:c6:55
-
-#define CONFIG_ENV_OVERWRITE
-#endif /* __CONFIG_H */
diff --git a/board/esd/cpci750/misc.S b/board/esd/cpci750/misc.S
deleted file mode 100644
index 160b1d31f7..0000000000
--- a/board/esd/cpci750/misc.S
+++ /dev/null
@@ -1,245 +0,0 @@
-#include <config.h>
-#include <74xx_7xx.h>
-#include "version.h"
-
-#include <ppc_asm.tmpl>
-#include <ppc_defs.h>
-
-#include <asm/cache.h>
-#include <asm/mmu.h>
-
-#include "../../Marvell/include/mv_gen_reg.h"
-
-#ifdef CONFIG_ECC
- /* Galileo specific asm code for initializing ECC */
- .globl board_relocate_rom
-board_relocate_rom:
- mflr r7
- /* update the location of the GT registers */
- lis r11, CFG_GT_REGS@h
- /* if we're using ECC, we must use the DMA engine to copy ourselves */
- bl start_idma_transfer_0
- bl wait_for_idma_0
- bl stop_idma_engine_0
-
- mtlr r7
- blr
-
- .globl board_init_ecc
-board_init_ecc:
- mflr r7
- /* NOTE: r10 still contains the location we've been relocated to
- * which happens to be TOP_OF_RAM - CFG_MONITOR_LEN */
-
- /* now that we're running from ram, init the rest of main memory
- * for ECC use */
- lis r8, CFG_MONITOR_LEN@h
- ori r8, r8, CFG_MONITOR_LEN@l
-
- divw r3, r10, r8
-
- /* set up the counter, and init the starting address */
- mtctr r3
- li r12, 0
-
- /* bytes per transfer */
- mr r5, r8
-about_to_init_ecc:
-1: mr r3, r12
- mr r4, r12
- bl start_idma_transfer_0
- bl wait_for_idma_0
- bl stop_idma_engine_0
- add r12, r12, r8
- bdnz 1b
-
- mtlr r7
- blr
-
- /* r3: dest addr
- * r4: source addr
- * r5: byte count
- * r11: gt regbase
- * trashes: r6, r5
- */
-start_idma_transfer_0:
- /* set the byte count, including the OWN bit */
- mr r6, r11
- ori r6, r6, CHANNEL0_DMA_BYTE_COUNT
- stwbrx r5, 0, (r6)
-
- /* set the source address */
- mr r6, r11
- ori r6, r6, CHANNEL0_DMA_SOURCE_ADDRESS
- stwbrx r4, 0, (r6)
-
- /* set the dest address */
- mr r6, r11
- ori r6, r6, CHANNEL0_DMA_DESTINATION_ADDRESS
- stwbrx r3, 0, (r6)
-
- /* set the next record pointer */
- li r5, 0
- mr r6, r11
- ori r6, r6, CHANNEL0NEXT_RECORD_POINTER
- stwbrx r5, 0, (r6)
-
- /* set the low control register */
- /* bit 9 is NON chained mode, bit 31 is new style descriptors.
- bit 12 is channel enable */
- ori r5, r5, (1 << 12) | (1 << 12) | (1 << 11)
- /* 15 shifted by 16 (oris) == bit 31 */
- oris r5, r5, (1 << 15)
- mr r6, r11
- ori r6, r6, CHANNEL0CONTROL
- stwbrx r5, 0, (r6)
-
- blr
-
- /* this waits for the bytecount to return to zero, indicating
- * that the trasfer is complete */
-wait_for_idma_0:
- mr r5, r11
- lis r6, 0xff
- ori r6, r6, 0xffff
- ori r5, r5, CHANNEL0_DMA_BYTE_COUNT
-1: lwbrx r4, 0, (r5)
- and. r4, r4, r6
- bne 1b
-
- blr
-
- /* this turns off channel 0 of the idma engine */
-stop_idma_engine_0:
- /* shut off the DMA engine */
- li r5, 0
- mr r6, r11
- ori r6, r6, CHANNEL0CONTROL
- stwbrx r5, 0, (r6)
-
- blr
-#endif
-
-#ifdef CFG_BOARD_ASM_INIT
- /* NOTE: trashes r3-r7 */
- .globl board_asm_init
-board_asm_init:
- /* just move the GT registers to where they belong */
- lis r3, CFG_DFL_GT_REGS@h
- ori r3, r3, CFG_DFL_GT_REGS@l
- lis r4, CFG_GT_REGS@h
- ori r4, r4, CFG_GT_REGS@l
- li r5, INTERNAL_SPACE_DECODE
-
- /* test to see if we've already moved */
- lwbrx r6, r5, r4
- andi. r6, r6, 0xffff
- /* check loading of R7 is: 0x0F80 should: 0xf800: DONE */
-/* rlwinm r7, r4, 8, 16, 31
- rlwinm r7, r4, 12, 16, 31 */ /* original */
- rlwinm r7, r4, 16, 16, 31
- /* -----------------------------------------------------*/
- cmp cr0, r7, r6
- beqlr
-
- /* nope, have to move the registers */
- lwbrx r6, r5, r3
- andis. r6, r6, 0xffff
- or r6, r6, r7
- stwbrx r6, r5, r3
-
- /* now, poll for the change */
-1: lwbrx r7, r5, r4
- cmp cr0, r7, r6
- bne 1b
-
- lis r3, CFG_INT_SRAM_BASE@h
- ori r3, r3, CFG_INT_SRAM_BASE@l
- rlwinm r3, r3, 16, 16, 31
- lis r4, CFG_GT_REGS@h
- ori r4, r4, CFG_GT_REGS@l
- li r5, INTEGRATED_SRAM_BASE_ADDR
- stwbrx r3, r5, r4
-
-2: lwbrx r6, r5, r4
- cmp cr0, r3, r6
- bne 2b
-
- /* done! */
- blr
-#endif
-
-/* For use of the debug LEDs */
- .global led_on0_relocated
-led_on0_relocated:
- xor r21, r21, r21
- xor r18, r18, r18
- lis r18, 0xFC80
- ori r18, r18, 0x8000
-/* stw r21, 0x0(r18) */
- sync
- blr
-
- .global led_off0_relocated
-led_off0_relocated:
- xor r21, r21, r21
- xor r18, r18, r18
- lis r18, 0xFC81
- ori r18, r18, 0x4000
-/* stw r21, 0x0(r18) */
- sync
- blr
-
- .global led_on0
-led_on0:
- xor r18, r18, r18
- lis r18, 0x1c80
- ori r18, r18, 0x8000
-/* stw r18, 0x0(r18) */
- sync
- blr
-
- .global led_off0
-led_off0:
- xor r18, r18, r18
- lis r18, 0x1c81
- ori r18, r18, 0x4000
-/* stw r18, 0x0(r18) */
- sync
- blr
-
- .global led_on1
-led_on1:
- xor r18, r18, r18
- lis r18, 0x1c80
- ori r18, r18, 0xc000
-/* stw r18, 0x0(r18) */
- sync
- blr
-
- .global led_off1
-led_off1:
- xor r18, r18, r18
- lis r18, 0x1c81
- ori r18, r18, 0x8000
-/* stw r18, 0x0(r18) */
- sync
- blr
-
- .global led_on2
-led_on2:
- xor r18, r18, r18
- lis r18, 0x1c81
- ori r18, r18, 0x0000
-/* stw r18, 0x0(r18) */
- sync
- blr
-
- .global led_off2
-led_off2:
- xor r18, r18, r18
- lis r18, 0x1c81
- ori r18, r18, 0xc000
-/* stw r18, 0x0(r18) */
- sync
- blr
diff --git a/board/esd/cpci750/mpsc.c b/board/esd/cpci750/mpsc.c
deleted file mode 100644
index 52398b24ea..0000000000
--- a/board/esd/cpci750/mpsc.c
+++ /dev/null
@@ -1,1018 +0,0 @@
-/*
- * (C) Copyright 2001
- * John Clemens <clemens@mclx.com>, Mission Critical Linux, Inc.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*************************************************************************
- * changes for Marvell DB64360 eval board 2003 by Ingo Assmus <ingo.assmus@keymile.com>
- *
- ************************************************************************/
-
-/*
- * mpsc.c - driver for console over the MPSC.
- */
-
-
-#include <common.h>
-#include <config.h>
-#include <asm/cache.h>
-
-#include <malloc.h>
-#include "mpsc.h"
-
-#include "mv_regs.h"
-
-#include "../../Marvell/include/memory.h"
-
-/* Define this if you wish to use the MPSC as a register based UART.
- * This will force the serial port to not use the SDMA engine at all.
- */
-
-#undef CONFIG_MPSC_DEBUG_PORT
-
-
-int (*mpsc_putchar) (char ch) = mpsc_putchar_early;
-char (*mpsc_getchar) (void) = mpsc_getchar_debug;
-int (*mpsc_test_char) (void) = mpsc_test_char_debug;
-
-
-static volatile unsigned int *rx_desc_base = NULL;
-static unsigned int rx_desc_index = 0;
-static volatile unsigned int *tx_desc_base = NULL;
-static unsigned int tx_desc_index = 0;
-
-/* local function declarations */
-static int galmpsc_connect (int channel, int connect);
-static int galmpsc_route_rx_clock (int channel, int brg);
-static int galmpsc_route_tx_clock (int channel, int brg);
-static int galmpsc_write_config_regs (int mpsc, int mode);
-static int galmpsc_config_channel_regs (int mpsc);
-static int galmpsc_set_char_length (int mpsc, int value);
-static int galmpsc_set_stop_bit_length (int mpsc, int value);
-static int galmpsc_set_parity (int mpsc, int value);
-static int galmpsc_enter_hunt (int mpsc);
-static int galmpsc_set_brkcnt (int mpsc, int value);
-static int galmpsc_set_tcschar (int mpsc, int value);
-static int galmpsc_set_snoop (int mpsc, int value);
-static int galmpsc_shutdown (int mpsc);
-
-static int galsdma_set_RFT (int channel);
-static int galsdma_set_SFM (int channel);
-static int galsdma_set_rxle (int channel);
-static int galsdma_set_txle (int channel);
-static int galsdma_set_burstsize (int channel, unsigned int value);
-static int galsdma_set_RC (int channel, unsigned int value);
-
-static int galbrg_set_CDV (int channel, int value);
-static int galbrg_enable (int channel);
-static int galbrg_disable (int channel);
-static int galbrg_set_clksrc (int channel, int value);
-static int galbrg_set_CUV (int channel, int value);
-
-static void galsdma_enable_rx (void);
-static int galsdma_set_mem_space (unsigned int memSpace,
- unsigned int memSpaceTarget,
- unsigned int memSpaceAttr,
- unsigned int baseAddress,
- unsigned int size);
-
-
-#define SOFTWARE_CACHE_MANAGEMENT
-
-#ifdef SOFTWARE_CACHE_MANAGEMENT
-#define FLUSH_DCACHE(a,b) if(dcache_status()){clean_dcache_range((u32)(a),(u32)(b));}
-#define FLUSH_AND_INVALIDATE_DCACHE(a,b) if(dcache_status()){flush_dcache_range((u32)(a),(u32)(b));}
-#define INVALIDATE_DCACHE(a,b) if(dcache_status()){invalidate_dcache_range((u32)(a),(u32)(b));}
-#else
-#define FLUSH_DCACHE(a,b)
-#define FLUSH_AND_INVALIDATE_DCACHE(a,b)
-#define INVALIDATE_DCACHE(a,b)
-#endif
-
-#ifdef CONFIG_MPSC_DEBUG_PORT
-static void mpsc_debug_init (void)
-{
-
- volatile unsigned int temp;
-
- /* Clear the CFR (CHR4) */
- /* Write random 'Z' bit (bit 29) of CHR4 to enable debug uart *UNDOCUMENTED FEATURE* */
- temp = GTREGREAD (GALMPSC_CHANNELREG_4 + (CHANNEL * GALMPSC_REG_GAP));
- temp &= 0xffffff00;
- temp |= BIT29;
- GT_REG_WRITE (GALMPSC_CHANNELREG_4 + (CHANNEL * GALMPSC_REG_GAP),
- temp);
-
- /* Set the Valid bit 'V' (bit 12) and int generation bit 'INT' (bit 15) */
- temp = GTREGREAD (GALMPSC_CHANNELREG_5 + (CHANNEL * GALMPSC_REG_GAP));
- temp |= (BIT12 | BIT15);
- GT_REG_WRITE (GALMPSC_CHANNELREG_5 + (CHANNEL * GALMPSC_REG_GAP),
- temp);
-
- /* Set int mask */
- temp = GTREGREAD (GALMPSC_0_INT_MASK);
- temp |= BIT6;
- GT_REG_WRITE (GALMPSC_0_INT_MASK, temp);
-}
-#endif
-
-char mpsc_getchar_debug (void)
-{
- volatile int temp;
- volatile unsigned int cause;
-
- cause = GTREGREAD (GALMPSC_0_INT_CAUSE);
- while ((cause & BIT6) == 0) {
- cause = GTREGREAD (GALMPSC_0_INT_CAUSE);
- }
-
- temp = GTREGREAD (GALMPSC_CHANNELREG_10 +
- (CHANNEL * GALMPSC_REG_GAP));
- /* By writing 1's to the set bits, the register is cleared */
- GT_REG_WRITE (GALMPSC_CHANNELREG_10 + (CHANNEL * GALMPSC_REG_GAP),
- temp);
- GT_REG_WRITE (GALMPSC_0_INT_CAUSE, cause & ~BIT6);
- return (temp >> 16) & 0xff;
-}
-
-/* special function for running out of flash. doesn't modify any
- * global variables [josh] */
-int mpsc_putchar_early (char ch)
-{
- DECLARE_GLOBAL_DATA_PTR;
- int mpsc = CHANNEL;
- int temp =
- GTREGREAD (GALMPSC_CHANNELREG_2 + (mpsc * GALMPSC_REG_GAP));
- galmpsc_set_tcschar (mpsc, ch);
- GT_REG_WRITE (GALMPSC_CHANNELREG_2 + (mpsc * GALMPSC_REG_GAP),
- temp | 0x200);
-
-#define MAGIC_FACTOR (10*1000000)
-
- udelay (MAGIC_FACTOR / gd->baudrate);
- return 0;
-}
-
-/* This is used after relocation, see serial.c and mpsc_init2 */
-static int mpsc_putchar_sdma (char ch)
-{
- volatile unsigned int *p;
- unsigned int temp;
-
-
- /* align the descriptor */
- p = tx_desc_base;
- memset ((void *) p, 0, 8 * sizeof (unsigned int));
-
- /* fill one 64 bit buffer */
- /* word swap, pad with 0 */
- p[4] = 0; /* x */
- p[5] = (unsigned int) ch; /* x */
-
- /* CHANGED completely according to GT64260A dox - NTL */
- p[0] = 0x00010001; /* 0 */
- p[1] = DESC_OWNER_BIT | DESC_FIRST | DESC_LAST; /* 4 */
- p[2] = 0; /* 8 */
- p[3] = (unsigned int) &p[4]; /* c */
-
-#if 0
- p[9] = DESC_FIRST | DESC_LAST;
- p[10] = (unsigned int) &p[0];
- p[11] = (unsigned int) &p[12];
-#endif
-
- FLUSH_DCACHE (&p[0], &p[8]);
-
- GT_REG_WRITE (GALSDMA_0_CUR_TX_PTR + (CHANNEL * GALSDMA_REG_DIFF),
- (unsigned int) &p[0]);
- GT_REG_WRITE (GALSDMA_0_FIR_TX_PTR + (CHANNEL * GALSDMA_REG_DIFF),
- (unsigned int) &p[0]);
-
- temp = GTREGREAD (GALSDMA_0_COM_REG + (CHANNEL * GALSDMA_REG_DIFF));
- temp |= (TX_DEMAND | TX_STOP);
- GT_REG_WRITE (GALSDMA_0_COM_REG + (CHANNEL * GALSDMA_REG_DIFF), temp);
-
- INVALIDATE_DCACHE (&p[1], &p[2]);
-
- while (p[1] & DESC_OWNER_BIT) {
- udelay (100);
- INVALIDATE_DCACHE (&p[1], &p[2]);
- }
- return 0;
-}
-
-char mpsc_getchar_sdma (void)
-{
- static unsigned int done = 0;
- volatile char ch;
- unsigned int len = 0, idx = 0, temp;
-
- volatile unsigned int *p;
-
-
- do {
- p = &rx_desc_base[rx_desc_index * 8];
-
- INVALIDATE_DCACHE (&p[0], &p[1]);
- /* Wait for character */
- while (p[1] & DESC_OWNER_BIT) {
- udelay (100);
- INVALIDATE_DCACHE (&p[0], &p[1]);
- }
-
- /* Handle error case */
- if (p[1] & (1 << 15)) {
- printf ("oops, error: %08x\n", p[1]);
-
- temp = GTREGREAD (GALMPSC_CHANNELREG_2 +
- (CHANNEL * GALMPSC_REG_GAP));
- temp |= (1 << 23);
- GT_REG_WRITE (GALMPSC_CHANNELREG_2 +
- (CHANNEL * GALMPSC_REG_GAP), temp);
-
- /* Can't poll on abort bit, so we just wait. */
- udelay (100);
-
- galsdma_enable_rx ();
- }
-
- /* Number of bytes left in this descriptor */
- len = p[0] & 0xffff;
-
- if (len) {
- /* Where to look */
- idx = 5;
- if (done > 3)
- idx = 4;
- if (done > 7)
- idx = 7;
- if (done > 11)
- idx = 6;
-
- INVALIDATE_DCACHE (&p[idx], &p[idx + 1]);
- ch = p[idx] & 0xff;
- done++;
- }
-
- if (done < len) {
- /* this descriptor has more bytes still
- * shift down the char we just read, and leave the
- * buffer in place for the next time around
- */
- p[idx] = p[idx] >> 8;
- FLUSH_DCACHE (&p[idx], &p[idx + 1]);
- }
-
- if (done == len) {
- /* nothing left in this descriptor.
- * go to next one
- */
- p[1] = DESC_OWNER_BIT | DESC_FIRST | DESC_LAST;
- p[0] = 0x00100000;
- FLUSH_DCACHE (&p[0], &p[1]);
- /* Next descriptor */
- rx_desc_index = (rx_desc_index + 1) % RX_DESC;
- done = 0;
- }
- } while (len == 0); /* galileo bug.. len might be zero */
-
- return ch;
-}
-
-
-int mpsc_test_char_debug (void)
-{
- if ((GTREGREAD (GALMPSC_0_INT_CAUSE) & BIT6) == 0)
- return 0;
- else {
- return 1;
- }
-}
-
-
-int mpsc_test_char_sdma (void)
-{
- volatile unsigned int *p = &rx_desc_base[rx_desc_index * 8];
-
- INVALIDATE_DCACHE (&p[1], &p[2]);
-
- if (p[1] & DESC_OWNER_BIT)
- return 0;
- else
- return 1;
-}
-
-int mpsc_init (int baud)
-{
- /* BRG CONFIG */
- galbrg_set_baudrate (CHANNEL, baud);
- galbrg_set_clksrc (CHANNEL, 8); /* set source=Tclk */
- galbrg_set_CUV (CHANNEL, 0); /* set up CountUpValue */
- galbrg_enable (CHANNEL); /* Enable BRG */
-
- /* Set up clock routing */
- galmpsc_connect (CHANNEL, GALMPSC_CONNECT); /* connect it */
-
- galmpsc_route_rx_clock (CHANNEL, CHANNEL); /* chosse BRG0 for Rx */
- galmpsc_route_tx_clock (CHANNEL, CHANNEL); /* chose BRG0 for Tx */
-
- /* reset MPSC state */
- galmpsc_shutdown (CHANNEL);
-
- /* SDMA CONFIG */
- galsdma_set_burstsize (CHANNEL, L1_CACHE_BYTES / 8); /* in 64 bit words (8 bytes) */
- galsdma_set_txle (CHANNEL);
- galsdma_set_rxle (CHANNEL);
- galsdma_set_RC (CHANNEL, 0xf);
- galsdma_set_SFM (CHANNEL);
- galsdma_set_RFT (CHANNEL);
-
- /* MPSC CONFIG */
- galmpsc_write_config_regs (CHANNEL, GALMPSC_UART);
- galmpsc_config_channel_regs (CHANNEL);
- galmpsc_set_char_length (CHANNEL, GALMPSC_CHAR_LENGTH_8); /* 8 */
- galmpsc_set_parity (CHANNEL, GALMPSC_PARITY_NONE); /* N */
- galmpsc_set_stop_bit_length (CHANNEL, GALMPSC_STOP_BITS_1); /* 1 */
-
-#ifdef CONFIG_MPSC_DEBUG_PORT
- mpsc_debug_init ();
-#endif
-
- /* COMM_MPSC CONFIG */
-#ifdef SOFTWARE_CACHE_MANAGEMENT
- galmpsc_set_snoop (CHANNEL, 0); /* disable snoop */
-#else
- galmpsc_set_snoop (CHANNEL, 1); /* enable snoop */
-#endif
-
- return 0;
-}
-
-
-void mpsc_sdma_init (void)
-{
-/* Setup SDMA channel0 SDMA_CONFIG_REG*/
- GT_REG_WRITE (SDMA_CONFIG_REG (0), 0x000020ff);
-
-/* Enable MPSC-Window0 for DRAM Bank0 */
- if (galsdma_set_mem_space (MV64360_CUNIT_BASE_ADDR_WIN_0_BIT,
- MV64360_SDMA_DRAM_CS_0_TARGET,
- 0,
- memoryGetBankBaseAddress
- (CS_0_LOW_DECODE_ADDRESS),
- memoryGetBankSize (BANK0)) != true)
- printf ("%s: SDMA_Window0 memory setup failed !!! \n",
- __FUNCTION__);
-
-
-/* Disable MPSC-Window1 */
- if (galsdma_set_mem_space (MV64360_CUNIT_BASE_ADDR_WIN_1_BIT,
- MV64360_SDMA_DRAM_CS_0_TARGET,
- 0,
- memoryGetBankBaseAddress
- (CS_1_LOW_DECODE_ADDRESS),
- memoryGetBankSize (BANK3)) != true)
- printf ("%s: SDMA_Window1 memory setup failed !!! \n",
- __FUNCTION__);
-
-
-/* Disable MPSC-Window2 */
- if (galsdma_set_mem_space (MV64360_CUNIT_BASE_ADDR_WIN_2_BIT,
- MV64360_SDMA_DRAM_CS_0_TARGET,
- 0,
- memoryGetBankBaseAddress
- (CS_2_LOW_DECODE_ADDRESS),
- memoryGetBankSize (BANK3)) != true)
- printf ("%s: SDMA_Window2 memory setup failed !!! \n",
- __FUNCTION__);
-
-
-/* Disable MPSC-Window3 */
- if (galsdma_set_mem_space (MV64360_CUNIT_BASE_ADDR_WIN_3_BIT,
- MV64360_SDMA_DRAM_CS_0_TARGET,
- 0,
- memoryGetBankBaseAddress
- (CS_3_LOW_DECODE_ADDRESS),
- memoryGetBankSize (BANK3)) != true)
- printf ("%s: SDMA_Window3 memory setup failed !!! \n",
- __FUNCTION__);
-
-/* Setup MPSC0 access mode Window0 full access */
- GT_SET_REG_BITS (MPSC0_ACCESS_PROTECTION_REG,
- (MV64360_SDMA_WIN_ACCESS_FULL <<
- (MV64360_CUNIT_BASE_ADDR_WIN_0_BIT * 2)));
-
-/* Setup MPSC1 access mode Window1 full access */
- GT_SET_REG_BITS (MPSC1_ACCESS_PROTECTION_REG,
- (MV64360_SDMA_WIN_ACCESS_FULL <<
- (MV64360_CUNIT_BASE_ADDR_WIN_0_BIT * 2)));
-
-/* Setup MPSC internal address space base address */
- GT_REG_WRITE (CUNIT_INTERNAL_SPACE_BASE_ADDR_REG, CFG_GT_REGS);
-
-/* no high address remap*/
- GT_REG_WRITE (CUNIT_HIGH_ADDR_REMAP_REG0, 0x00);
- GT_REG_WRITE (CUNIT_HIGH_ADDR_REMAP_REG1, 0x00);
-
-/* clear interrupt cause register for MPSC (fault register)*/
- GT_REG_WRITE (CUNIT_INTERRUPT_CAUSE_REG, 0x00);
-}
-
-
-void mpsc_init2 (void)
-{
- int i;
-
-#ifndef CONFIG_MPSC_DEBUG_PORT
- mpsc_putchar = mpsc_putchar_sdma;
- mpsc_getchar = mpsc_getchar_sdma;
- mpsc_test_char = mpsc_test_char_sdma;
-#endif
- /* RX descriptors */
- rx_desc_base = (unsigned int *) malloc (((RX_DESC + 1) * 8) *
- sizeof (unsigned int));
-
- /* align descriptors */
- rx_desc_base = (unsigned int *)
- (((unsigned int) rx_desc_base + 32) & 0xFFFFFFF0);
-
- rx_desc_index = 0;
-
- memset ((void *) rx_desc_base, 0,
- (RX_DESC * 8) * sizeof (unsigned int));
-
- for (i = 0; i < RX_DESC; i++) {
- rx_desc_base[i * 8 + 3] = (unsigned int) &rx_desc_base[i * 8 + 4]; /* Buffer */
- rx_desc_base[i * 8 + 2] = (unsigned int) &rx_desc_base[(i + 1) * 8]; /* Next descriptor */
- rx_desc_base[i * 8 + 1] = DESC_OWNER_BIT | DESC_FIRST | DESC_LAST; /* Command & control */
- rx_desc_base[i * 8] = 0x00100000;
- }
- rx_desc_base[(i - 1) * 8 + 2] = (unsigned int) &rx_desc_base[0];
-
- FLUSH_DCACHE (&rx_desc_base[0], &rx_desc_base[RX_DESC * 8]);
- GT_REG_WRITE (GALSDMA_0_CUR_RX_PTR + (CHANNEL * GALSDMA_REG_DIFF),
- (unsigned int) &rx_desc_base[0]);
-
- /* TX descriptors */
- tx_desc_base = (unsigned int *) malloc (((TX_DESC + 1) * 8) *
- sizeof (unsigned int));
-
- /* align descriptors */
- tx_desc_base = (unsigned int *)
- (((unsigned int) tx_desc_base + 32) & 0xFFFFFFF0);
-
- tx_desc_index = -1;
-
- memset ((void *) tx_desc_base, 0,
- (TX_DESC * 8) * sizeof (unsigned int));
-
- for (i = 0; i < TX_DESC; i++) {
- tx_desc_base[i * 8 + 5] = (unsigned int) 0x23232323;
- tx_desc_base[i * 8 + 4] = (unsigned int) 0x23232323;
- tx_desc_base[i * 8 + 3] =
- (unsigned int) &tx_desc_base[i * 8 + 4];
- tx_desc_base[i * 8 + 2] =
- (unsigned int) &tx_desc_base[(i + 1) * 8];
- tx_desc_base[i * 8 + 1] =
- DESC_OWNER_BIT | DESC_FIRST | DESC_LAST;
-
- /* set sbytecnt and shadow byte cnt to 1 */
- tx_desc_base[i * 8] = 0x00010001;
- }
- tx_desc_base[(i - 1) * 8 + 2] = (unsigned int) &tx_desc_base[0];
-
- FLUSH_DCACHE (&tx_desc_base[0], &tx_desc_base[TX_DESC * 8]);
-
- udelay (100);
-
- galsdma_enable_rx ();
-
- return;
-}
-
-int galbrg_set_baudrate (int channel, int rate)
-{
- DECLARE_GLOBAL_DATA_PTR;
- int clock;
-
- galbrg_disable (channel); /*ok */
-
-#ifdef ZUMA_NTL
- /* from tclk */
- clock = (CFG_TCLK / (16 * rate)) - 1;
-#else
- clock = (CFG_TCLK / (16 * rate)) - 1;
-#endif
-
- galbrg_set_CDV (channel, clock); /* set timer Reg. for BRG */
-
- galbrg_enable (channel);
-
- gd->baudrate = rate;
-
- return 0;
-}
-
-/* ------------------------------------------------------------------ */
-
-/* Below are all the private functions that no one else needs */
-
-static int galbrg_set_CDV (int channel, int value)
-{
- unsigned int temp;
-
- temp = GTREGREAD (GALBRG_0_CONFREG + (channel * GALBRG_REG_GAP));
- temp &= 0xFFFF0000;
- temp |= (value & 0x0000FFFF);
- GT_REG_WRITE (GALBRG_0_CONFREG + (channel * GALBRG_REG_GAP), temp);
-
- return 0;
-}
-
-static int galbrg_enable (int channel)
-{
- unsigned int temp;
-
- temp = GTREGREAD (GALBRG_0_CONFREG + (channel * GALBRG_REG_GAP));
- temp |= 0x00010000;
- GT_REG_WRITE (GALBRG_0_CONFREG + (channel * GALBRG_REG_GAP), temp);
-
- return 0;
-}
-
-static int galbrg_disable (int channel)
-{
- unsigned int temp;
-
- temp = GTREGREAD (GALBRG_0_CONFREG + (channel * GALBRG_REG_GAP));
- temp &= 0xFFFEFFFF;
- GT_REG_WRITE (GALBRG_0_CONFREG + (channel * GALBRG_REG_GAP), temp);
-
- return 0;
-}
-
-static int galbrg_set_clksrc (int channel, int value)
-{
- unsigned int temp;
-
- temp = GTREGREAD (GALBRG_0_CONFREG + (channel * GALBRG_REG_GAP));
- temp &= 0xFFC3FFFF; /* Bit 18 - 21 (MV 64260 18-22) */
- temp |= (value << 18);
- GT_REG_WRITE (GALBRG_0_CONFREG + (channel * GALBRG_REG_GAP), temp);
- return 0;
-}
-
-static int galbrg_set_CUV (int channel, int value)
-{
- /* set CountUpValue */
- GT_REG_WRITE (GALBRG_0_BTREG + (channel * GALBRG_REG_GAP), value);
-
- return 0;
-}
-
-#if 0
-static int galbrg_reset (int channel)
-{
- unsigned int temp;
-
- temp = GTREGREAD (GALBRG_0_CONFREG + (channel * GALBRG_REG_GAP));
- temp |= 0x20000;
- GT_REG_WRITE (GALBRG_0_CONFREG + (channel * GALBRG_REG_GAP), temp);
-
- return 0;
-}
-#endif
-
-static int galsdma_set_RFT (int channel)
-{
- unsigned int temp;
-
- temp = GTREGREAD (GALSDMA_0_CONF_REG + (channel * GALSDMA_REG_DIFF));
- temp |= 0x00000001;
- GT_REG_WRITE (GALSDMA_0_CONF_REG + (channel * GALSDMA_REG_DIFF),
- temp);
-
- return 0;
-}
-
-static int galsdma_set_SFM (int channel)
-{
- unsigned int temp;
-
- temp = GTREGREAD (GALSDMA_0_CONF_REG + (channel * GALSDMA_REG_DIFF));
- temp |= 0x00000002;
- GT_REG_WRITE (GALSDMA_0_CONF_REG + (channel * GALSDMA_REG_DIFF),
- temp);
-
- return 0;
-}
-
-static int galsdma_set_rxle (int channel)
-{
- unsigned int temp;
-
- temp = GTREGREAD (GALSDMA_0_CONF_REG + (channel * GALSDMA_REG_DIFF));
- temp |= 0x00000040;
- GT_REG_WRITE (GALSDMA_0_CONF_REG + (channel * GALSDMA_REG_DIFF),
- temp);
-
- return 0;
-}
-
-static int galsdma_set_txle (int channel)
-{
- unsigned int temp;
-
- temp = GTREGREAD (GALSDMA_0_CONF_REG + (channel * GALSDMA_REG_DIFF));
- temp |= 0x00000080;
- GT_REG_WRITE (GALSDMA_0_CONF_REG + (channel * GALSDMA_REG_DIFF),
- temp);
-
- return 0;
-}
-
-static int galsdma_set_RC (int channel, unsigned int value)
-{
- unsigned int temp;
-
- temp = GTREGREAD (GALSDMA_0_CONF_REG + (channel * GALSDMA_REG_DIFF));
- temp &= ~0x0000003c;
- temp |= (value << 2);
- GT_REG_WRITE (GALSDMA_0_CONF_REG + (channel * GALSDMA_REG_DIFF),
- temp);
-
- return 0;
-}
-
-static int galsdma_set_burstsize (int channel, unsigned int value)
-{
- unsigned int temp;
-
- temp = GTREGREAD (GALSDMA_0_CONF_REG + (channel * GALSDMA_REG_DIFF));
- temp &= 0xFFFFCFFF;
- switch (value) {
- case 8:
- GT_REG_WRITE (GALSDMA_0_CONF_REG +
- (channel * GALSDMA_REG_DIFF),
- (temp | (0x3 << 12)));
- break;
-
- case 4:
- GT_REG_WRITE (GALSDMA_0_CONF_REG +
- (channel * GALSDMA_REG_DIFF),
- (temp | (0x2 << 12)));
- break;
-
- case 2:
- GT_REG_WRITE (GALSDMA_0_CONF_REG +
- (channel * GALSDMA_REG_DIFF),
- (temp | (0x1 << 12)));
- break;
-
- case 1:
- GT_REG_WRITE (GALSDMA_0_CONF_REG +
- (channel * GALSDMA_REG_DIFF),
- (temp | (0x0 << 12)));
- break;
-
- default:
- return -1;
- break;
- }
-
- return 0;
-}
-
-static int galmpsc_connect (int channel, int connect)
-{
- unsigned int temp;
-
- temp = GTREGREAD (GALMPSC_ROUTING_REGISTER);
-
- if ((channel == 0) && connect)
- temp &= ~0x00000007;
- else if ((channel == 1) && connect)
- temp &= ~(0x00000007 << 6);
- else if ((channel == 0) && !connect)
- temp |= 0x00000007;
- else
- temp |= (0x00000007 << 6);
-
- /* Just in case... */
- temp &= 0x3fffffff;
-
- GT_REG_WRITE (GALMPSC_ROUTING_REGISTER, temp);
-
- return 0;
-}
-
-static int galmpsc_route_rx_clock (int channel, int brg)
-{
- unsigned int temp;
-
- temp = GTREGREAD (GALMPSC_RxC_ROUTE);
-
- if (channel == 0) {
- temp &= ~0x0000000F;
- temp |= brg;
- } else {
- temp &= ~0x00000F00;
- temp |= (brg << 8);
- }
-
- GT_REG_WRITE (GALMPSC_RxC_ROUTE, temp);
-
- return 0;
-}
-
-static int galmpsc_route_tx_clock (int channel, int brg)
-{
- unsigned int temp;
-
- temp = GTREGREAD (GALMPSC_TxC_ROUTE);
-
- if (channel == 0) {
- temp &= ~0x0000000F;
- temp |= brg;
- } else {
- temp &= ~0x00000F00;
- temp |= (brg << 8);
- }
-
- GT_REG_WRITE (GALMPSC_TxC_ROUTE, temp);
-
- return 0;
-}
-
-static int galmpsc_write_config_regs (int mpsc, int mode)
-{
- if (mode == GALMPSC_UART) {
- /* Main config reg Low (Null modem, Enable Tx/Rx, UART mode) */
- GT_REG_WRITE (GALMPSC_MCONF_LOW + (mpsc * GALMPSC_REG_GAP),
- 0x000004c4);
-
- /* Main config reg High (32x Rx/Tx clock mode, width=8bits */
- GT_REG_WRITE (GALMPSC_MCONF_HIGH + (mpsc * GALMPSC_REG_GAP),
- 0x024003f8);
- /* 22 2222 1111 */
- /* 54 3210 9876 */
- /* 0000 0010 0000 0000 */
- /* 1 */
- /* 098 7654 3210 */
- /* 0000 0011 1111 1000 */
- } else
- return -1;
-
- return 0;
-}
-
-static int galmpsc_config_channel_regs (int mpsc)
-{
- GT_REG_WRITE (GALMPSC_CHANNELREG_1 + (mpsc * GALMPSC_REG_GAP), 0);
- GT_REG_WRITE (GALMPSC_CHANNELREG_2 + (mpsc * GALMPSC_REG_GAP), 0);
- GT_REG_WRITE (GALMPSC_CHANNELREG_3 + (mpsc * GALMPSC_REG_GAP), 1);
- GT_REG_WRITE (GALMPSC_CHANNELREG_4 + (mpsc * GALMPSC_REG_GAP), 0);
- GT_REG_WRITE (GALMPSC_CHANNELREG_5 + (mpsc * GALMPSC_REG_GAP), 0);
- GT_REG_WRITE (GALMPSC_CHANNELREG_6 + (mpsc * GALMPSC_REG_GAP), 0);
- GT_REG_WRITE (GALMPSC_CHANNELREG_7 + (mpsc * GALMPSC_REG_GAP), 0);
- GT_REG_WRITE (GALMPSC_CHANNELREG_8 + (mpsc * GALMPSC_REG_GAP), 0);
- GT_REG_WRITE (GALMPSC_CHANNELREG_9 + (mpsc * GALMPSC_REG_GAP), 0);
- GT_REG_WRITE (GALMPSC_CHANNELREG_10 + (mpsc * GALMPSC_REG_GAP), 0);
-
- galmpsc_set_brkcnt (mpsc, 0x3);
- galmpsc_set_tcschar (mpsc, 0xab);
-
- return 0;
-}
-
-static int galmpsc_set_brkcnt (int mpsc, int value)
-{
- unsigned int temp;
-
- temp = GTREGREAD (GALMPSC_CHANNELREG_1 + (mpsc * GALMPSC_REG_GAP));
- temp &= 0x0000FFFF;
- temp |= (value << 16);
- GT_REG_WRITE (GALMPSC_CHANNELREG_1 + (mpsc * GALMPSC_REG_GAP), temp);
-
- return 0;
-}
-
-static int galmpsc_set_tcschar (int mpsc, int value)
-{
- unsigned int temp;
-
- temp = GTREGREAD (GALMPSC_CHANNELREG_1 + (mpsc * GALMPSC_REG_GAP));
- temp &= 0xFFFF0000;
- temp |= value;
- GT_REG_WRITE (GALMPSC_CHANNELREG_1 + (mpsc * GALMPSC_REG_GAP), temp);
-
- return 0;
-}
-
-static int galmpsc_set_char_length (int mpsc, int value)
-{
- unsigned int temp;
-
- temp = GTREGREAD (GALMPSC_PROTOCONF_REG + (mpsc * GALMPSC_REG_GAP));
- temp &= 0xFFFFCFFF;
- temp |= (value << 12);
- GT_REG_WRITE (GALMPSC_PROTOCONF_REG + (mpsc * GALMPSC_REG_GAP), temp);
-
- return 0;
-}
-
-static int galmpsc_set_stop_bit_length (int mpsc, int value)
-{
- unsigned int temp;
-
- temp = GTREGREAD (GALMPSC_PROTOCONF_REG + (mpsc * GALMPSC_REG_GAP));
- temp &= 0xFFFFBFFF;
- temp |= (value << 14);
- GT_REG_WRITE (GALMPSC_PROTOCONF_REG + (mpsc * GALMPSC_REG_GAP), temp);
-
- return 0;
-}
-
-static int galmpsc_set_parity (int mpsc, int value)
-{
- unsigned int temp;
-
- temp = GTREGREAD (GALMPSC_CHANNELREG_2 + (mpsc * GALMPSC_REG_GAP));
- if (value != -1) {
- temp &= 0xFFF3FFF3;
- temp |= ((value << 18) | (value << 2));
- temp |= ((value << 17) | (value << 1));
- } else {
- temp &= 0xFFF1FFF1;
- }
-
- GT_REG_WRITE (GALMPSC_CHANNELREG_2 + (mpsc * GALMPSC_REG_GAP), temp);
-
- return 0;
-}
-
-static int galmpsc_enter_hunt (int mpsc)
-{
- int temp;
-
- temp = GTREGREAD (GALMPSC_CHANNELREG_2 + (mpsc * GALMPSC_REG_GAP));
- temp |= 0x80000000;
- GT_REG_WRITE (GALMPSC_CHANNELREG_2 + (mpsc * GALMPSC_REG_GAP), temp);
-
- while (GTREGREAD (GALMPSC_CHANNELREG_2 + (mpsc * GALMPSC_REG_GAP)) &
- MPSC_ENTER_HUNT) {
- udelay (1);
- }
- return 0;
-}
-
-
-static int galmpsc_shutdown (int mpsc)
-{
- unsigned int temp;
-
- /* cause RX abort (clears RX) */
- temp = GTREGREAD (GALMPSC_CHANNELREG_2 + (mpsc * GALMPSC_REG_GAP));
- temp |= MPSC_RX_ABORT | MPSC_TX_ABORT;
- temp &= ~MPSC_ENTER_HUNT;
- GT_REG_WRITE (GALMPSC_CHANNELREG_2 + (mpsc * GALMPSC_REG_GAP), temp);
-
- GT_REG_WRITE (GALSDMA_0_COM_REG, 0);
- GT_REG_WRITE (GALSDMA_0_COM_REG, SDMA_TX_ABORT | SDMA_RX_ABORT);
-
- /* shut down the MPSC */
- GT_REG_WRITE (GALMPSC_MCONF_LOW, 0);
- GT_REG_WRITE (GALMPSC_MCONF_HIGH, 0);
- GT_REG_WRITE (GALMPSC_PROTOCONF_REG + (mpsc * GALMPSC_REG_GAP), 0);
-
- udelay (100);
-
- /* shut down the sdma engines. */
- /* reset config to default */
- GT_REG_WRITE (GALSDMA_0_CONF_REG, 0x000000fc);
-
- udelay (100);
-
- /* clear the SDMA current and first TX and RX pointers */
- GT_REG_WRITE (GALSDMA_0_CUR_RX_PTR, 0);
- GT_REG_WRITE (GALSDMA_0_CUR_TX_PTR, 0);
- GT_REG_WRITE (GALSDMA_0_FIR_TX_PTR, 0);
-
- udelay (100);
-
- return 0;
-}
-
-static void galsdma_enable_rx (void)
-{
- int temp;
-
- /* Enable RX processing */
- temp = GTREGREAD (GALSDMA_0_COM_REG + (CHANNEL * GALSDMA_REG_DIFF));
- temp |= RX_ENABLE;
- GT_REG_WRITE (GALSDMA_0_COM_REG + (CHANNEL * GALSDMA_REG_DIFF), temp);
-
- galmpsc_enter_hunt (CHANNEL);
-}
-
-static int galmpsc_set_snoop (int mpsc, int value)
-{
- int reg =
- mpsc ? MPSC_1_ADDRESS_CONTROL_LOW :
- MPSC_0_ADDRESS_CONTROL_LOW;
- int temp = GTREGREAD (reg);
-
- if (value)
- temp |= (1 << 6) | (1 << 14) | (1 << 22) | (1 << 30);
- else
- temp &= ~((1 << 6) | (1 << 14) | (1 << 22) | (1 << 30));
- GT_REG_WRITE (reg, temp);
- return 0;
-}
-
-/*******************************************************************************
-* galsdma_set_mem_space - Set MV64360 IDMA memory decoding map.
-*
-* DESCRIPTION:
-* the MV64360 SDMA has its own address decoding map that is de-coupled
-* from the CPU interface address decoding windows. The SDMA channels
-* share four address windows. Each region can be individually configured
-* by this function by associating it to a target interface and setting
-* base and size values.
-*
-* NOTE!!!
-* The size must be in 64Kbyte granularity.
-* The base address must be aligned to the size.
-* The size must be a series of 1s followed by a series of zeros
-*
-* OUTPUT:
-* None.
-*
-* RETURN:
-* True for success, false otherwise.
-*
-*******************************************************************************/
-
-static int galsdma_set_mem_space (unsigned int memSpace,
- unsigned int memSpaceTarget,
- unsigned int memSpaceAttr,
- unsigned int baseAddress, unsigned int size)
-{
- unsigned int temp;
-
- if (size == 0) {
- GT_RESET_REG_BITS (MV64360_CUNIT_BASE_ADDR_ENABLE_REG,
- 1 << memSpace);
- return true;
- }
-
- /* The base address must be aligned to the size. */
- if (baseAddress % size != 0) {
- return false;
- }
- if (size < 0x10000) {
- return false;
- }
-
- /* Align size and base to 64K */
- baseAddress &= 0xffff0000;
- size &= 0xffff0000;
- temp = size >> 16;
-
- /* Checking that the size is a sequence of '1' followed by a
- sequence of '0' starting from LSB to MSB. */
- while ((temp > 0) && (temp & 0x1)) {
- temp = temp >> 1;
- }
-
- if (temp != 0) {
- GT_REG_WRITE (MV64360_CUNIT_BASE_ADDR_REG0 + memSpace * 8,
- (baseAddress | memSpaceTarget | memSpaceAttr));
- GT_REG_WRITE ((MV64360_CUNIT_SIZE0 + memSpace * 8),
- (size - 1) & 0xffff0000);
- GT_RESET_REG_BITS (MV64360_CUNIT_BASE_ADDR_ENABLE_REG,
- 1 << memSpace);
- } else {
- /* An invalid size was specified */
- return false;
- }
- return true;
-}
diff --git a/board/esd/cpci750/mpsc.h b/board/esd/cpci750/mpsc.h
deleted file mode 100644
index a03d1cc0f8..0000000000
--- a/board/esd/cpci750/mpsc.h
+++ /dev/null
@@ -1,156 +0,0 @@
-/*
- * (C) Copyright 2001
- * John Clemens <clemens@mclx.com>, Mission Critical Linux, Inc.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*************************************************************************
- * changes for Marvell DB64360 eval board 2003 by Ingo Assmus <ingo.assmus@keymile.com>
- *
- ************************************************************************/
-
-
-/*
- * mpsc.h - header file for MPSC in uart mode (console driver)
- */
-
-#ifndef __MPSC_H__
-#define __MPSC_H__
-
-/* include actual Galileo defines */
-#include "../../Marvell/include/mv_gen_reg.h"
-
-/* driver related defines */
-
-int mpsc_init(int baud);
-void mpsc_sdma_init(void);
-void mpsc_init2(void);
-int galbrg_set_baudrate(int channel, int rate);
-
-int mpsc_putchar_early(char ch);
-char mpsc_getchar_debug(void);
-int mpsc_test_char_debug(void);
-
-int mpsc_test_char_sdma(void);
-
-extern int (*mpsc_putchar)(char ch);
-extern char (*mpsc_getchar)(void);
-extern int (*mpsc_test_char)(void);
-
-#define CHANNEL CONFIG_MPSC_PORT
-
-#define TX_DESC 5
-#define RX_DESC 20
-
-#define DESC_FIRST 0x00010000
-#define DESC_LAST 0x00020000
-#define DESC_OWNER_BIT 0x80000000
-
-#define TX_DEMAND 0x00800000
-#define TX_STOP 0x00010000
-#define RX_ENABLE 0x00000080
-
-#define SDMA_RX_ABORT (1 << 15)
-#define SDMA_TX_ABORT (1 << 31)
-#define MPSC_TX_ABORT (1 << 7)
-#define MPSC_RX_ABORT (1 << 23)
-#define MPSC_ENTER_HUNT (1 << 31)
-
-/* MPSC defines */
-
-#define GALMPSC_CONNECT 0x1
-#define GALMPSC_DISCONNECT 0x0
-
-#define GALMPSC_UART 0x1
-
-#define GALMPSC_STOP_BITS_1 0x0
-#define GALMPSC_STOP_BITS_2 0x1
-#define GALMPSC_CHAR_LENGTH_8 0x3
-#define GALMPSC_CHAR_LENGTH_7 0x2
-
-#define GALMPSC_PARITY_ODD 0x0
-#define GALMPSC_PARITY_EVEN 0x2
-#define GALMPSC_PARITY_MARK 0x3
-#define GALMPSC_PARITY_SPACE 0x1
-#define GALMPSC_PARITY_NONE -1
-
-#define GALMPSC_SERIAL_MULTIPLEX SERIAL_PORT_MULTIPLEX /* 0xf010 */
-#define GALMPSC_ROUTING_REGISTER MAIN_ROUTING_REGISTER /* 0xb400 */
-#define GALMPSC_RxC_ROUTE RECEIVE_CLOCK_ROUTING_REGISTER /* 0xb404 */
-#define GALMPSC_TxC_ROUTE TRANSMIT_CLOCK_ROUTING_REGISTER /* 0xb408 */
-#define GALMPSC_MCONF_LOW MPSC0_MAIN_CONFIGURATION_LOW /* 0x8000 */
-#define GALMPSC_MCONF_HIGH MPSC0_MAIN_CONFIGURATION_HIGH /* 0x8004 */
-#define GALMPSC_PROTOCONF_REG MPSC0_PROTOCOL_CONFIGURATION /* 0x8008 */
-
-#define GALMPSC_REG_GAP 0x1000
-
-#define GALMPSC_MCONF_CHREG_BASE CHANNEL0_REGISTER1 /* 0x800c */
-#define GALMPSC_CHANNELREG_1 CHANNEL0_REGISTER1 /* 0x800c */
-#define GALMPSC_CHANNELREG_2 CHANNEL0_REGISTER2 /* 0x8010 */
-#define GALMPSC_CHANNELREG_3 CHANNEL0_REGISTER3 /* 0x8014 */
-#define GALMPSC_CHANNELREG_4 CHANNEL0_REGISTER4 /* 0x8018 */
-#define GALMPSC_CHANNELREG_5 CHANNEL0_REGISTER5 /* 0x801c */
-#define GALMPSC_CHANNELREG_6 CHANNEL0_REGISTER6 /* 0x8020 */
-#define GALMPSC_CHANNELREG_7 CHANNEL0_REGISTER7 /* 0x8024 */
-#define GALMPSC_CHANNELREG_8 CHANNEL0_REGISTER8 /* 0x8028 */
-#define GALMPSC_CHANNELREG_9 CHANNEL0_REGISTER9 /* 0x802c */
-#define GALMPSC_CHANNELREG_10 CHANNEL0_REGISTER10 /* 0x8030 */
-#define GALMPSC_CHANNELREG_11 CHANNEL0_REGISTER11 /* 0x8034 */
-
-#define GALSDMA_COMMAND_FIRST (1 << 16)
-#define GALSDMA_COMMAND_LAST (1 << 17)
-#define GALSDMA_COMMAND_ENABLEINT (1 << 23)
-#define GALSDMA_COMMAND_AUTO (1 << 30)
-#define GALSDMA_COMMAND_OWNER (1 << 31)
-
-#define GALSDMA_RX 0
-#define GALSDMA_TX 1
-
-/* CHANNEL2 should be CHANNEL1, according to documentation,
- * but to work with the current GTREGS file...
- */
-#define GALSDMA_0_CONF_REG CHANNEL0_CONFIGURATION_REGISTER /* 0x4000 */
-#define GALSDMA_1_CONF_REG CHANNEL2_CONFIGURATION_REGISTER /* 0x6000 */
-#define GALSDMA_0_COM_REG CHANNEL0_COMMAND_REGISTER /* 0x4008 */
-#define GALSDMA_1_COM_REG CHANNEL2_COMMAND_REGISTER /* 0x6008 */
-#define GALSDMA_0_CUR_RX_PTR CHANNEL0_CURRENT_RX_DESCRIPTOR_POINTER /* 0x4810 */
-#define GALSDMA_0_CUR_TX_PTR CHANNEL0_CURRENT_TX_DESCRIPTOR_POINTER /* 0x4c10 */
-#define GALSDMA_0_FIR_TX_PTR CHANNEL0_FIRST_TX_DESCRIPTOR_POINTER /* 0x4c14 */
-#define GALSDMA_1_CUR_RX_PTR CHANNEL2_CURRENT_RX_DESCRIPTOR_POINTER /* 0x6810 */
-#define GALSDMA_1_CUR_TX_PTR CHANNEL2_CURRENT_TX_DESCRIPTOR_POINTER /* 0x6c10 */
-#define GALSDMA_1_FIR_TX_PTR CHANNEL2_FIRST_TX_DESCRIPTOR_POINTER /* 0x6c14 */
-#define GALSDMA_REG_DIFF 0x2000
-
-/* WRONG in gt64260R.h */
-#define GALSDMA_INT_CAUSE 0xb800 /* SDMA_CAUSE */
-#define GALSDMA_INT_MASK 0xb880 /* SDMA_MASK */
-#define GALMPSC_0_INT_CAUSE 0xb804
-#define GALMPSC_0_INT_MASK 0xb884
-
-#define GALSDMA_MODE_UART 0
-#define GALSDMA_MODE_BISYNC 1
-#define GALSDMA_MODE_HDLC 2
-#define GALSDMA_MODE_TRANSPARENT 3
-
-#define GALBRG_0_CONFREG BRG0_CONFIGURATION_REGISTER /* 0xb200 */
-#define GALBRG_REG_GAP 0x0008
-#define GALBRG_0_BTREG BRG0_BAUDE_TUNING_REGISTER /* 0xb204 */
-
-#endif /* __MPSC_H__ */
diff --git a/board/esd/cpci750/mv_eth.c b/board/esd/cpci750/mv_eth.c
deleted file mode 100644
index be176dcc84..0000000000
--- a/board/esd/cpci750/mv_eth.c
+++ /dev/null
@@ -1,3184 +0,0 @@
-/*
- * (C) Copyright 2003
- * Ingo Assmus <ingo.assmus@keymile.com>
- *
- * based on - Driver for MV64360X ethernet ports
- * Copyright (C) 2002 rabeeh@galileo.co.il
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * mv_eth.c - header file for the polled mode GT ethernet driver
- */
-#include <common.h>
-#include <net.h>
-#include <malloc.h>
-
-#include "mv_eth.h"
-
-/* enable Debug outputs */
-
-#undef DEBUG_MV_ETH
-
-#ifdef DEBUG_MV_ETH
-#define DEBUG
-#define DP(x) x
-#else
-#define DP(x)
-#endif
-
-#undef MV64360_CHECKSUM_OFFLOAD
-/*************************************************************************
-**************************************************************************
-**************************************************************************
-* The first part is the high level driver of the gigE ethernet ports. *
-**************************************************************************
-**************************************************************************
-*************************************************************************/
-
-/* Definition for configuring driver */
-/* #define UPDATE_STATS_BY_SOFTWARE */
-#undef MV64360_RX_QUEUE_FILL_ON_TASK
-
-
-/* Constants */
-#define MAGIC_ETH_RUNNING 8031971
-#define MV64360_INTERNAL_SRAM_SIZE _256K
-#define EXTRA_BYTES 32
-#define WRAP ETH_HLEN + 2 + 4 + 16
-#define BUFFER_MTU dev->mtu + WRAP
-#define INT_CAUSE_UNMASK_ALL 0x0007ffff
-#define INT_CAUSE_UNMASK_ALL_EXT 0x0011ffff
-#ifdef MV64360_RX_FILL_ON_TASK
-#define INT_CAUSE_MASK_ALL 0x00000000
-#define INT_CAUSE_CHECK_BITS INT_CAUSE_UNMASK_ALL
-#define INT_CAUSE_CHECK_BITS_EXT INT_CAUSE_UNMASK_ALL_EXT
-#endif
-
-/* Read/Write to/from MV64360 internal registers */
-#define MV_REG_READ(offset) my_le32_to_cpu(* (volatile unsigned int *) (INTERNAL_REG_BASE_ADDR + offset))
-#define MV_REG_WRITE(offset,data) *(volatile unsigned int *) (INTERNAL_REG_BASE_ADDR + offset) = my_cpu_to_le32 (data)
-#define MV_SET_REG_BITS(regOffset,bits) ((*((volatile unsigned int*)((INTERNAL_REG_BASE_ADDR) + (regOffset)))) |= ((unsigned int)my_cpu_to_le32(bits)))
-#define MV_RESET_REG_BITS(regOffset,bits) ((*((volatile unsigned int*)((INTERNAL_REG_BASE_ADDR) + (regOffset)))) &= ~((unsigned int)my_cpu_to_le32(bits)))
-
-/* Static function declarations */
-static int mv64360_eth_real_open (struct eth_device *eth);
-static int mv64360_eth_real_stop (struct eth_device *eth);
-static struct net_device_stats *mv64360_eth_get_stats (struct eth_device
- *dev);
-static void eth_port_init_mac_tables (ETH_PORT eth_port_num);
-static void mv64360_eth_update_stat (struct eth_device *dev);
-bool db64360_eth_start (struct eth_device *eth);
-unsigned int eth_read_mib_counter (ETH_PORT eth_port_num,
- unsigned int mib_offset);
-int mv64360_eth_receive (struct eth_device *dev);
-
-int mv64360_eth_xmit (struct eth_device *, volatile void *packet, int length);
-
-#ifndef UPDATE_STATS_BY_SOFTWARE
-static void mv64360_eth_print_stat (struct eth_device *dev);
-#endif
-/* Processes a received packet */
-extern void NetReceive (volatile uchar *, int);
-
-extern unsigned int INTERNAL_REG_BASE_ADDR;
-
-/*************************************************
- *Helper functions - used inside the driver only *
- *************************************************/
-#ifdef DEBUG_MV_ETH
-void print_globals (struct eth_device *dev)
-{
- printf ("Ethernet PRINT_Globals-Debug function\n");
- printf ("Base Address for ETH_PORT_INFO: %08x\n",
- (unsigned int) dev->priv);
- printf ("Base Address for mv64360_eth_priv: %08x\n",
- (unsigned int) &(((ETH_PORT_INFO *) dev->priv)->
- port_private));
-
- printf ("GT Internal Base Address: %08x\n",
- INTERNAL_REG_BASE_ADDR);
- printf ("Base Address for TX-DESCs: %08x Number of allocated Buffers %d\n", (unsigned int) ((ETH_PORT_INFO *) dev->priv)->p_tx_desc_area_base[0], MV64360_TX_QUEUE_SIZE);
- printf ("Base Address for RX-DESCs: %08x Number of allocated Buffers %d\n", (unsigned int) ((ETH_PORT_INFO *) dev->priv)->p_rx_desc_area_base[0], MV64360_RX_QUEUE_SIZE);
- printf ("Base Address for RX-Buffer: %08x allocated Bytes %d\n",
- (unsigned int) ((ETH_PORT_INFO *) dev->priv)->
- p_rx_buffer_base[0],
- (MV64360_RX_QUEUE_SIZE * MV64360_RX_BUFFER_SIZE) + 32);
- printf ("Base Address for TX-Buffer: %08x allocated Bytes %d\n",
- (unsigned int) ((ETH_PORT_INFO *) dev->priv)->
- p_tx_buffer_base[0],
- (MV64360_TX_QUEUE_SIZE * MV64360_TX_BUFFER_SIZE) + 32);
-}
-#endif
-
-#define my_cpu_to_le32(x) my_le32_to_cpu((x))
-
-unsigned long my_le32_to_cpu (unsigned long x)
-{
- return (((x & 0x000000ffU) << 24) |
- ((x & 0x0000ff00U) << 8) |
- ((x & 0x00ff0000U) >> 8) | ((x & 0xff000000U) >> 24));
-}
-
-
-/**********************************************************************
- * mv64360_eth_print_phy_status
- *
- * Prints gigabit ethenret phy status
- *
- * Input : pointer to ethernet interface network device structure
- * Output : N/A
- **********************************************************************/
-
-static void mv64360_eth_print_phy_status (struct eth_device *dev)
-{
- struct mv64360_eth_priv *port_private;
- unsigned int port_num;
- ETH_PORT_INFO *ethernet_private = (ETH_PORT_INFO *) dev->priv;
- unsigned int port_status, phy_reg_data;
-
- port_private =
- (struct mv64360_eth_priv *) ethernet_private->port_private;
- port_num = port_private->port_num;
-
- /* Check Link status on phy */
- eth_port_read_smi_reg (port_num, 1, &phy_reg_data);
- if (!(phy_reg_data & 0x20)) {
- printf ("Ethernet port changed link status to DOWN\n");
- } else {
- port_status =
- MV_REG_READ (MV64360_ETH_PORT_STATUS_REG (port_num));
- printf ("Ethernet status port %d: Link up", port_num);
- printf (", %s",
- (port_status & BIT2) ? "Full Duplex" : "Half Duplex");
- if (port_status & BIT4)
- printf (", Speed 1 Gbps");
- else
- printf (", %s",
- (port_status & BIT5) ? "Speed 100 Mbps" :
- "Speed 10 Mbps");
- printf ("\n");
- }
-}
-
-/**********************************************************************
- * u-boot entry functions for mv64360_eth
- *
- **********************************************************************/
-int db64360_eth_probe (struct eth_device *dev)
-{
- return ((int) db64360_eth_start (dev));
-}
-
-int db64360_eth_poll (struct eth_device *dev)
-{
- return mv64360_eth_receive (dev);
-}
-
-int db64360_eth_transmit (struct eth_device *dev, volatile void *packet,
- int length)
-{
- mv64360_eth_xmit (dev, packet, length);
- return 0;
-}
-
-void db64360_eth_disable (struct eth_device *dev)
-{
- mv64360_eth_stop (dev);
-}
-
-
-void mv6436x_eth_initialize (bd_t * bis)
-{
- struct eth_device *dev;
- ETH_PORT_INFO *ethernet_private;
- struct mv64360_eth_priv *port_private;
- int devnum, x, temp;
- char *s, *e, buf[64];
-
- for (devnum = 0; devnum < MV_ETH_DEVS; devnum++) {
- dev = calloc (sizeof (*dev), 1);
- if (!dev) {
- printf ("%s: mv_enet%d allocation failure, %s\n",
- __FUNCTION__, devnum, "eth_device structure");
- return;
- }
-
- /* must be less than NAMESIZE (16) */
- sprintf (dev->name, "mv_enet%d", devnum);
-
-#ifdef DEBUG
- printf ("Initializing %s\n", dev->name);
-#endif
-
- /* Extract the MAC address from the environment */
- switch (devnum) {
- case 0:
- s = "ethaddr";
- break;
-
- case 1:
- s = "eth1addr";
- break;
-
- case 2:
- s = "eth2addr";
- break;
-
- default: /* this should never happen */
- printf ("%s: Invalid device number %d\n",
- __FUNCTION__, devnum);
- return;
- }
-
- temp = getenv_r (s, buf, sizeof (buf));
- s = (temp > 0) ? buf : NULL;
-
-#ifdef DEBUG
- printf ("Setting MAC %d to %s\n", devnum, s);
-#endif
- for (x = 0; x < 6; ++x) {
- dev->enetaddr[x] = s ? simple_strtoul (s, &e, 16) : 0;
- if (s)
- s = (*e) ? e + 1 : e;
- }
- /* ronen - set the MAC addr in the HW */
- eth_port_uc_addr_set (devnum, dev->enetaddr, 0);
-
- dev->init = (void *) db64360_eth_probe;
- dev->halt = (void *) ethernet_phy_reset;
- dev->send = (void *) db64360_eth_transmit;
- dev->recv = (void *) db64360_eth_poll;
-
- ethernet_private =
- calloc (sizeof (*ethernet_private), 1);
- dev->priv = (void *) ethernet_private;
- if (!ethernet_private) {
- printf ("%s: %s allocation failure, %s\n",
- __FUNCTION__, dev->name,
- "Private Device Structure");
- free (dev);
- return;
- }
- /* start with an zeroed ETH_PORT_INFO */
- memset (ethernet_private, 0, sizeof (ETH_PORT_INFO));
- memcpy (ethernet_private->port_mac_addr, dev->enetaddr, 6);
-
- /* set pointer to memory for stats data structure etc... */
- port_private =
- calloc (sizeof (*ethernet_private), 1);
- ethernet_private->port_private = (void *)port_private;
- if (!port_private) {
- printf ("%s: %s allocation failure, %s\n",
- __FUNCTION__, dev->name,
- "Port Private Device Structure");
-
- free (ethernet_private);
- free (dev);
- return;
- }
-
- port_private->stats =
- calloc (sizeof (struct net_device_stats), 1);
- if (!port_private->stats) {
- printf ("%s: %s allocation failure, %s\n",
- __FUNCTION__, dev->name,
- "Net stat Structure");
-
- free (port_private);
- free (ethernet_private);
- free (dev);
- return;
- }
- memset (ethernet_private->port_private, 0,
- sizeof (struct mv64360_eth_priv));
- switch (devnum) {
- case 0:
- ethernet_private->port_num = ETH_0;
- break;
- case 1:
- ethernet_private->port_num = ETH_1;
- break;
- case 2:
- ethernet_private->port_num = ETH_2;
- break;
- default:
- printf ("Invalid device number %d\n", devnum);
- break;
- };
-
- port_private->port_num = devnum;
- /*
- * Read MIB counter on the GT in order to reset them,
- * then zero all the stats fields in memory
- */
- mv64360_eth_update_stat (dev);
- memset (port_private->stats, 0,
- sizeof (struct net_device_stats));
- /* Extract the MAC address from the environment */
- switch (devnum) {
- case 0:
- s = "ethaddr";
- break;
-
- case 1:
- s = "eth1addr";
- break;
-
- case 2:
- s = "eth2addr";
- break;
-
- default: /* this should never happen */
- printf ("%s: Invalid device number %d\n",
- __FUNCTION__, devnum);
- return;
- }
-
- temp = getenv_r (s, buf, sizeof (buf));
- s = (temp > 0) ? buf : NULL;
-
-#ifdef DEBUG
- printf ("Setting MAC %d to %s\n", devnum, s);
-#endif
- for (x = 0; x < 6; ++x) {
- dev->enetaddr[x] = s ? simple_strtoul (s, &e, 16) : 0;
- if (s)
- s = (*e) ? e + 1 : e;
- }
-
- DP (printf ("Allocating descriptor and buffer rings\n"));
-
- ethernet_private->p_rx_desc_area_base[0] =
- (ETH_RX_DESC *) memalign (16,
- RX_DESC_ALIGNED_SIZE *
- MV64360_RX_QUEUE_SIZE + 1);
- ethernet_private->p_tx_desc_area_base[0] =
- (ETH_TX_DESC *) memalign (16,
- TX_DESC_ALIGNED_SIZE *
- MV64360_TX_QUEUE_SIZE + 1);
-
- ethernet_private->p_rx_buffer_base[0] =
- (char *) memalign (16,
- MV64360_RX_QUEUE_SIZE *
- MV64360_TX_BUFFER_SIZE + 1);
- ethernet_private->p_tx_buffer_base[0] =
- (char *) memalign (16,
- MV64360_RX_QUEUE_SIZE *
- MV64360_TX_BUFFER_SIZE + 1);
-
-#ifdef DEBUG_MV_ETH
- /* DEBUG OUTPUT prints adresses of globals */
- print_globals (dev);
-#endif
- eth_register (dev);
-
- }
- DP (printf ("%s: exit\n", __FUNCTION__));
-
-}
-
-/**********************************************************************
- * mv64360_eth_open
- *
- * This function is called when openning the network device. The function
- * should initialize all the hardware, initialize cyclic Rx/Tx
- * descriptors chain and buffers and allocate an IRQ to the network
- * device.
- *
- * Input : a pointer to the network device structure
- * / / ronen - changed the output to match net/eth.c needs
- * Output : nonzero of success , zero if fails.
- * under construction
- **********************************************************************/
-
-int mv64360_eth_open (struct eth_device *dev)
-{
- return (mv64360_eth_real_open (dev));
-}
-
-/* Helper function for mv64360_eth_open */
-static int mv64360_eth_real_open (struct eth_device *dev)
-{
-
- unsigned int queue;
- ETH_PORT_INFO *ethernet_private;
- struct mv64360_eth_priv *port_private;
- unsigned int port_num;
- u32 port_status, phy_reg_data;
-
- ethernet_private = (ETH_PORT_INFO *) dev->priv;
- /* ronen - when we update the MAC env params we only update dev->enetaddr
- see ./net/eth.c eth_set_enetaddr() */
- memcpy (ethernet_private->port_mac_addr, dev->enetaddr, 6);
-
- port_private =
- (struct mv64360_eth_priv *) ethernet_private->port_private;
- port_num = port_private->port_num;
-
- /* Stop RX Queues */
- MV_REG_WRITE (MV64360_ETH_RECEIVE_QUEUE_COMMAND_REG (port_num),
- 0x0000ff00);
-
- /* Clear the ethernet port interrupts */
- MV_REG_WRITE (MV64360_ETH_INTERRUPT_CAUSE_REG (port_num), 0);
- MV_REG_WRITE (MV64360_ETH_INTERRUPT_CAUSE_EXTEND_REG (port_num), 0);
-
- /* Unmask RX buffer and TX end interrupt */
- MV_REG_WRITE (MV64360_ETH_INTERRUPT_MASK_REG (port_num),
- INT_CAUSE_UNMASK_ALL);
-
- /* Unmask phy and link status changes interrupts */
- MV_REG_WRITE (MV64360_ETH_INTERRUPT_EXTEND_MASK_REG (port_num),
- INT_CAUSE_UNMASK_ALL_EXT);
-
- /* Set phy address of the port */
- ethernet_private->port_phy_addr = 0x8 + port_num;
-
- /* Activate the DMA channels etc */
- eth_port_init (ethernet_private);
-
-
- /* "Allocate" setup TX rings */
-
- for (queue = 0; queue < MV64360_TX_QUEUE_NUM; queue++) {
- unsigned int size;
-
- port_private->tx_ring_size[queue] = MV64360_TX_QUEUE_SIZE;
- size = (port_private->tx_ring_size[queue] * TX_DESC_ALIGNED_SIZE); /*size = no of DESCs times DESC-size */
- ethernet_private->tx_desc_area_size[queue] = size;
-
- /* first clear desc area completely */
- memset ((void *) ethernet_private->p_tx_desc_area_base[queue],
- 0, ethernet_private->tx_desc_area_size[queue]);
-
- /* initialize tx desc ring with low level driver */
- if (ether_init_tx_desc_ring
- (ethernet_private, ETH_Q0,
- port_private->tx_ring_size[queue],
- MV64360_TX_BUFFER_SIZE /* Each Buffer is 1600 Byte */ ,
- (unsigned int) ethernet_private->
- p_tx_desc_area_base[queue],
- (unsigned int) ethernet_private->
- p_tx_buffer_base[queue]) == false)
- printf ("### Error initializing TX Ring\n");
- }
-
- /* "Allocate" setup RX rings */
- for (queue = 0; queue < MV64360_RX_QUEUE_NUM; queue++) {
- unsigned int size;
-
- /* Meantime RX Ring are fixed - but must be configurable by user */
- port_private->rx_ring_size[queue] = MV64360_RX_QUEUE_SIZE;
- size = (port_private->rx_ring_size[queue] *
- RX_DESC_ALIGNED_SIZE);
- ethernet_private->rx_desc_area_size[queue] = size;
-
- /* first clear desc area completely */
- memset ((void *) ethernet_private->p_rx_desc_area_base[queue],
- 0, ethernet_private->rx_desc_area_size[queue]);
- if ((ether_init_rx_desc_ring
- (ethernet_private, ETH_Q0,
- port_private->rx_ring_size[queue],
- MV64360_RX_BUFFER_SIZE /* Each Buffer is 1600 Byte */ ,
- (unsigned int) ethernet_private->
- p_rx_desc_area_base[queue],
- (unsigned int) ethernet_private->
- p_rx_buffer_base[queue])) == false)
- printf ("### Error initializing RX Ring\n");
- }
-
- eth_port_start (ethernet_private);
-
- /* Set maximum receive buffer to 9700 bytes */
- MV_REG_WRITE (MV64360_ETH_PORT_SERIAL_CONTROL_REG (port_num),
- (0x5 << 17) |
- (MV_REG_READ
- (MV64360_ETH_PORT_SERIAL_CONTROL_REG (port_num))
- & 0xfff1ffff));
-
- /*
- * Set ethernet MTU for leaky bucket mechanism to 0 - this will
- * disable the leaky bucket mechanism .
- */
-
- MV_REG_WRITE (MV64360_ETH_MAXIMUM_TRANSMIT_UNIT (port_num), 0);
- port_status = MV_REG_READ (MV64360_ETH_PORT_STATUS_REG (port_num));
-
- /* Check Link status on phy */
- eth_port_read_smi_reg (port_num, 1, &phy_reg_data);
- if (!(phy_reg_data & 0x20)) {
- /* Reset PHY */
- if ((ethernet_phy_reset (port_num)) != true) {
- printf ("$$ Warnning: No link on port %d \n",
- port_num);
- return 0;
- } else {
- eth_port_read_smi_reg (port_num, 1, &phy_reg_data);
- if (!(phy_reg_data & 0x20)) {
- printf ("### Error: Phy is not active\n");
- return 0;
- }
- }
- } else {
- mv64360_eth_print_phy_status (dev);
- }
- port_private->eth_running = MAGIC_ETH_RUNNING;
- return 1;
-}
-
-
-static int mv64360_eth_free_tx_rings (struct eth_device *dev)
-{
- unsigned int queue;
- ETH_PORT_INFO *ethernet_private;
- struct mv64360_eth_priv *port_private;
- unsigned int port_num;
- volatile ETH_TX_DESC *p_tx_curr_desc;
-
- ethernet_private = (ETH_PORT_INFO *) dev->priv;
- port_private =
- (struct mv64360_eth_priv *) ethernet_private->port_private;
- port_num = port_private->port_num;
-
- /* Stop Tx Queues */
- MV_REG_WRITE (MV64360_ETH_TRANSMIT_QUEUE_COMMAND_REG (port_num),
- 0x0000ff00);
-
- /* Free TX rings */
- DP (printf ("Clearing previously allocated TX queues... "));
- for (queue = 0; queue < MV64360_TX_QUEUE_NUM; queue++) {
- /* Free on TX rings */
- for (p_tx_curr_desc =
- ethernet_private->p_tx_desc_area_base[queue];
- ((unsigned int) p_tx_curr_desc <= (unsigned int)
- ethernet_private->p_tx_desc_area_base[queue] +
- ethernet_private->tx_desc_area_size[queue]);
- p_tx_curr_desc =
- (ETH_TX_DESC *) ((unsigned int) p_tx_curr_desc +
- TX_DESC_ALIGNED_SIZE)) {
- /* this is inside for loop */
- if (p_tx_curr_desc->return_info != 0) {
- p_tx_curr_desc->return_info = 0;
- DP (printf ("freed\n"));
- }
- }
- DP (printf ("Done\n"));
- }
- return 0;
-}
-
-static int mv64360_eth_free_rx_rings (struct eth_device *dev)
-{
- unsigned int queue;
- ETH_PORT_INFO *ethernet_private;
- struct mv64360_eth_priv *port_private;
- unsigned int port_num;
- volatile ETH_RX_DESC *p_rx_curr_desc;
-
- ethernet_private = (ETH_PORT_INFO *) dev->priv;
- port_private =
- (struct mv64360_eth_priv *) ethernet_private->port_private;
- port_num = port_private->port_num;
-
-
- /* Stop RX Queues */
- MV_REG_WRITE (MV64360_ETH_RECEIVE_QUEUE_COMMAND_REG (port_num),
- 0x0000ff00);
-
- /* Free RX rings */
- DP (printf ("Clearing previously allocated RX queues... "));
- for (queue = 0; queue < MV64360_RX_QUEUE_NUM; queue++) {
- /* Free preallocated skb's on RX rings */
- for (p_rx_curr_desc =
- ethernet_private->p_rx_desc_area_base[queue];
- (((unsigned int) p_rx_curr_desc <
- ((unsigned int) ethernet_private->
- p_rx_desc_area_base[queue] +
- ethernet_private->rx_desc_area_size[queue])));
- p_rx_curr_desc =
- (ETH_RX_DESC *) ((unsigned int) p_rx_curr_desc +
- RX_DESC_ALIGNED_SIZE)) {
- if (p_rx_curr_desc->return_info != 0) {
- p_rx_curr_desc->return_info = 0;
- DP (printf ("freed\n"));
- }
- }
- DP (printf ("Done\n"));
- }
- return 0;
-}
-
-/**********************************************************************
- * mv64360_eth_stop
- *
- * This function is used when closing the network device.
- * It updates the hardware,
- * release all memory that holds buffers and descriptors and release the IRQ.
- * Input : a pointer to the device structure
- * Output : zero if success , nonzero if fails
- *********************************************************************/
-
-int mv64360_eth_stop (struct eth_device *dev)
-{
- ETH_PORT_INFO *ethernet_private;
- struct mv64360_eth_priv *port_private;
- unsigned int port_num;
-
- ethernet_private = (ETH_PORT_INFO *) dev->priv;
- port_private =
- (struct mv64360_eth_priv *) ethernet_private->port_private;
- port_num = port_private->port_num;
-
- /* Disable all gigE address decoder */
- MV_REG_WRITE (MV64360_ETH_BASE_ADDR_ENABLE_REG, 0x3f);
- DP (printf ("%s Ethernet stop called ... \n", __FUNCTION__));
- mv64360_eth_real_stop (dev);
-
- return 0;
-};
-
-/* Helper function for mv64360_eth_stop */
-
-static int mv64360_eth_real_stop (struct eth_device *dev)
-{
- ETH_PORT_INFO *ethernet_private;
- struct mv64360_eth_priv *port_private;
- unsigned int port_num;
-
- ethernet_private = (ETH_PORT_INFO *) dev->priv;
- port_private =
- (struct mv64360_eth_priv *) ethernet_private->port_private;
- port_num = port_private->port_num;
-
-
- mv64360_eth_free_tx_rings (dev);
- mv64360_eth_free_rx_rings (dev);
-
- eth_port_reset (ethernet_private->port_num);
- /* Disable ethernet port interrupts */
- MV_REG_WRITE (MV64360_ETH_INTERRUPT_CAUSE_REG (port_num), 0);
- MV_REG_WRITE (MV64360_ETH_INTERRUPT_CAUSE_EXTEND_REG (port_num), 0);
- /* Mask RX buffer and TX end interrupt */
- MV_REG_WRITE (MV64360_ETH_INTERRUPT_MASK_REG (port_num), 0);
- /* Mask phy and link status changes interrupts */
- MV_REG_WRITE (MV64360_ETH_INTERRUPT_EXTEND_MASK_REG (port_num), 0);
- MV_RESET_REG_BITS (MV64360_CPU_INTERRUPT0_MASK_HIGH,
- BIT0 << port_num);
- /* Print Network statistics */
-#ifndef UPDATE_STATS_BY_SOFTWARE
- /*
- * Print statistics (only if ethernet is running),
- * then zero all the stats fields in memory
- */
- if (port_private->eth_running == MAGIC_ETH_RUNNING) {
- port_private->eth_running = 0;
- mv64360_eth_print_stat (dev);
- }
- memset (port_private->stats, 0, sizeof (struct net_device_stats));
-#endif
- DP (printf ("\nEthernet stopped ... \n"));
- return 0;
-}
-
-
-/**********************************************************************
- * mv64360_eth_start_xmit
- *
- * This function is queues a packet in the Tx descriptor for
- * required port.
- *
- * Input : skb - a pointer to socket buffer
- * dev - a pointer to the required port
- *
- * Output : zero upon success
- **********************************************************************/
-
-int mv64360_eth_xmit (struct eth_device *dev, volatile void *dataPtr,
- int dataSize)
-{
- ETH_PORT_INFO *ethernet_private;
- struct mv64360_eth_priv *port_private;
- unsigned int port_num;
- PKT_INFO pkt_info;
- ETH_FUNC_RET_STATUS status;
- struct net_device_stats *stats;
- ETH_FUNC_RET_STATUS release_result;
-
- ethernet_private = (ETH_PORT_INFO *) dev->priv;
- port_private =
- (struct mv64360_eth_priv *) ethernet_private->port_private;
- port_num = port_private->port_num;
-
- stats = port_private->stats;
-
- /* Update packet info data structure */
- pkt_info.cmd_sts = ETH_TX_FIRST_DESC | ETH_TX_LAST_DESC; /* DMA owned, first last */
- pkt_info.byte_cnt = dataSize;
- pkt_info.buf_ptr = (unsigned int) dataPtr;
-
- status = eth_port_send (ethernet_private, ETH_Q0, &pkt_info);
- if ((status == ETH_ERROR) || (status == ETH_QUEUE_FULL)) {
- printf ("Error on transmitting packet ..");
- if (status == ETH_QUEUE_FULL)
- printf ("ETH Queue is full. \n");
- if (status == ETH_QUEUE_LAST_RESOURCE)
- printf ("ETH Queue: using last available resource. \n");
- goto error;
- }
-
- /* Update statistics and start of transmittion time */
- stats->tx_bytes += dataSize;
- stats->tx_packets++;
-
- /* Check if packet(s) is(are) transmitted correctly (release everything) */
- do {
- release_result =
- eth_tx_return_desc (ethernet_private, ETH_Q0,
- &pkt_info);
- switch (release_result) {
- case ETH_OK:
- DP (printf ("descriptor released\n"));
- if (pkt_info.cmd_sts & BIT0) {
- printf ("Error in TX\n");
- stats->tx_errors++;
-
- }
- break;
- case ETH_RETRY:
- DP (printf ("transmission still in process\n"));
- break;
-
- case ETH_ERROR:
- printf ("routine can not access Tx desc ring\n");
- break;
-
- case ETH_END_OF_JOB:
- DP (printf ("the routine has nothing to release\n"));
- break;
- default: /* should not happen */
- break;
- }
- } while (release_result == ETH_OK);
-
-
- return 0; /* success */
- error:
- return 1; /* Failed - higher layers will free the skb */
-}
-
-/**********************************************************************
- * mv64360_eth_receive
- *
- * This function is forward packets that are received from the port's
- * queues toward kernel core or FastRoute them to another interface.
- *
- * Input : dev - a pointer to the required interface
- * max - maximum number to receive (0 means unlimted)
- *
- * Output : number of served packets
- **********************************************************************/
-
-int mv64360_eth_receive (struct eth_device *dev)
-{
- ETH_PORT_INFO *ethernet_private;
- struct mv64360_eth_priv *port_private;
- unsigned int port_num;
- PKT_INFO pkt_info;
- struct net_device_stats *stats;
-
-
- ethernet_private = (ETH_PORT_INFO *) dev->priv;
- port_private =
- (struct mv64360_eth_priv *) ethernet_private->port_private;
- port_num = port_private->port_num;
- stats = port_private->stats;
-
- while ((eth_port_receive (ethernet_private, ETH_Q0, &pkt_info) ==
- ETH_OK)) {
-
-#ifdef DEBUG_MV_ETH
- if (pkt_info.byte_cnt != 0) {
- printf ("%s: Received %d byte Packet @ 0x%x\n",
- __FUNCTION__, pkt_info.byte_cnt,
- pkt_info.buf_ptr);
- }
-#endif
- /* Update statistics. Note byte count includes 4 byte CRC count */
- stats->rx_packets++;
- stats->rx_bytes += pkt_info.byte_cnt;
-
- /*
- * In case received a packet without first / last bits on OR the error
- * summary bit is on, the packets needs to be dropeed.
- */
- if (((pkt_info.
- cmd_sts & (ETH_RX_FIRST_DESC | ETH_RX_LAST_DESC)) !=
- (ETH_RX_FIRST_DESC | ETH_RX_LAST_DESC))
- || (pkt_info.cmd_sts & ETH_ERROR_SUMMARY)) {
- stats->rx_dropped++;
-
- printf ("Received packet spread on multiple descriptors\n");
-
- /* Is this caused by an error ? */
- if (pkt_info.cmd_sts & ETH_ERROR_SUMMARY) {
- stats->rx_errors++;
- }
-
- /* free these descriptors again without forwarding them to the higher layers */
- pkt_info.buf_ptr &= ~0x7; /* realign buffer again */
- pkt_info.byte_cnt = 0x0000; /* Reset Byte count */
-
- if (eth_rx_return_buff
- (ethernet_private, ETH_Q0, &pkt_info) != ETH_OK) {
- printf ("Error while returning the RX Desc to Ring\n");
- } else {
- DP (printf ("RX Desc returned to Ring\n"));
- }
- /* /free these descriptors again */
- } else {
-
-/* !!! call higher layer processing */
-#ifdef DEBUG_MV_ETH
- printf ("\nNow send it to upper layer protocols (NetReceive) ...\n");
-#endif
- /* let the upper layer handle the packet */
- NetReceive ((uchar *) pkt_info.buf_ptr,
- (int) pkt_info.byte_cnt);
-
-/* **************************************************************** */
-/* free descriptor */
- pkt_info.buf_ptr &= ~0x7; /* realign buffer again */
- pkt_info.byte_cnt = 0x0000; /* Reset Byte count */
- DP (printf
- ("RX: pkt_info.buf_ptr = %x\n",
- pkt_info.buf_ptr));
- if (eth_rx_return_buff
- (ethernet_private, ETH_Q0, &pkt_info) != ETH_OK) {
- printf ("Error while returning the RX Desc to Ring\n");
- } else {
- DP (printf ("RX Desc returned to Ring\n"));
- }
-
-/* **************************************************************** */
-
- }
- }
- mv64360_eth_get_stats (dev); /* update statistics */
- return 1;
-}
-
-/**********************************************************************
- * mv64360_eth_get_stats
- *
- * Returns a pointer to the interface statistics.
- *
- * Input : dev - a pointer to the required interface
- *
- * Output : a pointer to the interface's statistics
- **********************************************************************/
-
-static struct net_device_stats *mv64360_eth_get_stats (struct eth_device *dev)
-{
- ETH_PORT_INFO *ethernet_private;
- struct mv64360_eth_priv *port_private;
- unsigned int port_num;
-
- ethernet_private = (ETH_PORT_INFO *) dev->priv;
- port_private =
- (struct mv64360_eth_priv *) ethernet_private->port_private;
- port_num = port_private->port_num;
-
- mv64360_eth_update_stat (dev);
-
- return port_private->stats;
-}
-
-
-/**********************************************************************
- * mv64360_eth_update_stat
- *
- * Update the statistics structure in the private data structure
- *
- * Input : pointer to ethernet interface network device structure
- * Output : N/A
- **********************************************************************/
-
-static void mv64360_eth_update_stat (struct eth_device *dev)
-{
- ETH_PORT_INFO *ethernet_private;
- struct mv64360_eth_priv *port_private;
- struct net_device_stats *stats;
- unsigned int port_num;
- volatile unsigned int dummy;
-
- ethernet_private = (ETH_PORT_INFO *) dev->priv;
- port_private =
- (struct mv64360_eth_priv *) ethernet_private->port_private;
- port_num = port_private->port_num;
- stats = port_private->stats;
-
- /* These are false updates */
- stats->rx_packets += (unsigned long)
- eth_read_mib_counter (ethernet_private->port_num,
- ETH_MIB_GOOD_FRAMES_RECEIVED);
- stats->tx_packets += (unsigned long)
- eth_read_mib_counter (ethernet_private->port_num,
- ETH_MIB_GOOD_FRAMES_SENT);
- stats->rx_bytes += (unsigned long)
- eth_read_mib_counter (ethernet_private->port_num,
- ETH_MIB_GOOD_OCTETS_RECEIVED_LOW);
- /*
- * Ideally this should be as follows -
- *
- * stats->rx_bytes += stats->rx_bytes +
- * ((unsigned long) ethReadMibCounter (ethernet_private->port_num ,
- * ETH_MIB_GOOD_OCTETS_RECEIVED_HIGH) << 32);
- *
- * But the unsigned long in PowerPC and MIPS are 32bit. So the next read
- * is just a dummy read for proper work of the GigE port
- */
- dummy = eth_read_mib_counter (ethernet_private->port_num,
- ETH_MIB_GOOD_OCTETS_RECEIVED_HIGH);
- stats->tx_bytes += (unsigned long)
- eth_read_mib_counter (ethernet_private->port_num,
- ETH_MIB_GOOD_OCTETS_SENT_LOW);
- dummy = eth_read_mib_counter (ethernet_private->port_num,
- ETH_MIB_GOOD_OCTETS_SENT_HIGH);
- stats->rx_errors += (unsigned long)
- eth_read_mib_counter (ethernet_private->port_num,
- ETH_MIB_MAC_RECEIVE_ERROR);
-
- /* Rx dropped is for received packet with CRC error */
- stats->rx_dropped +=
- (unsigned long) eth_read_mib_counter (ethernet_private->
- port_num,
- ETH_MIB_BAD_CRC_EVENT);
- stats->multicast += (unsigned long)
- eth_read_mib_counter (ethernet_private->port_num,
- ETH_MIB_MULTICAST_FRAMES_RECEIVED);
- stats->collisions +=
- (unsigned long) eth_read_mib_counter (ethernet_private->
- port_num,
- ETH_MIB_COLLISION) +
- (unsigned long) eth_read_mib_counter (ethernet_private->
- port_num,
- ETH_MIB_LATE_COLLISION);
- /* detailed rx errors */
- stats->rx_length_errors +=
- (unsigned long) eth_read_mib_counter (ethernet_private->
- port_num,
- ETH_MIB_UNDERSIZE_RECEIVED)
- +
- (unsigned long) eth_read_mib_counter (ethernet_private->
- port_num,
- ETH_MIB_OVERSIZE_RECEIVED);
- /* detailed tx errors */
-}
-
-#ifndef UPDATE_STATS_BY_SOFTWARE
-/**********************************************************************
- * mv64360_eth_print_stat
- *
- * Update the statistics structure in the private data structure
- *
- * Input : pointer to ethernet interface network device structure
- * Output : N/A
- **********************************************************************/
-
-static void mv64360_eth_print_stat (struct eth_device *dev)
-{
- ETH_PORT_INFO *ethernet_private;
- struct mv64360_eth_priv *port_private;
- struct net_device_stats *stats;
- unsigned int port_num;
-
- ethernet_private = (ETH_PORT_INFO *) dev->priv;
- port_private =
- (struct mv64360_eth_priv *) ethernet_private->port_private;
- port_num = port_private->port_num;
- stats = port_private->stats;
-
- /* These are false updates */
- printf ("\n### Network statistics: ###\n");
- printf ("--------------------------\n");
- printf (" Packets received: %ld\n", stats->rx_packets);
- printf (" Packets send: %ld\n", stats->tx_packets);
- printf (" Received bytes: %ld\n", stats->rx_bytes);
- printf (" Send bytes: %ld\n", stats->tx_bytes);
- if (stats->rx_errors != 0)
- printf (" Rx Errors: %ld\n",
- stats->rx_errors);
- if (stats->rx_dropped != 0)
- printf (" Rx dropped (CRC Errors): %ld\n",
- stats->rx_dropped);
- if (stats->multicast != 0)
- printf (" Rx mulicast frames: %ld\n",
- stats->multicast);
- if (stats->collisions != 0)
- printf (" No. of collisions: %ld\n",
- stats->collisions);
- if (stats->rx_length_errors != 0)
- printf (" Rx length errors: %ld\n",
- stats->rx_length_errors);
-}
-#endif
-
-/**************************************************************************
- *network_start - Network Kick Off Routine UBoot
- *Inputs :
- *Outputs :
- **************************************************************************/
-
-bool db64360_eth_start (struct eth_device *dev)
-{
- return (mv64360_eth_open (dev)); /* calls real open */
-}
-
-/*************************************************************************
-**************************************************************************
-**************************************************************************
-* The second part is the low level driver of the gigE ethernet ports. *
-**************************************************************************
-**************************************************************************
-*************************************************************************/
-/*
- * based on Linux code
- * arch/ppc/galileo/EVB64360/mv64360_eth.c - Driver for MV64360X ethernet ports
- * Copyright (C) 2002 rabeeh@galileo.co.il
-
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version 2
- * of the License, or (at your option) any later version.
-
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
-
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
- *
- */
-
-/********************************************************************************
- * Marvell's Gigabit Ethernet controller low level driver
- *
- * DESCRIPTION:
- * This file introduce low level API to Marvell's Gigabit Ethernet
- * controller. This Gigabit Ethernet Controller driver API controls
- * 1) Operations (i.e. port init, start, reset etc').
- * 2) Data flow (i.e. port send, receive etc').
- * Each Gigabit Ethernet port is controlled via ETH_PORT_INFO
- * struct.
- * This struct includes user configuration information as well as
- * driver internal data needed for its operations.
- *
- * Supported Features:
- * - This low level driver is OS independent. Allocating memory for
- * the descriptor rings and buffers are not within the scope of
- * this driver.
- * - The user is free from Rx/Tx queue managing.
- * - This low level driver introduce functionality API that enable
- * the to operate Marvell's Gigabit Ethernet Controller in a
- * convenient way.
- * - Simple Gigabit Ethernet port operation API.
- * - Simple Gigabit Ethernet port data flow API.
- * - Data flow and operation API support per queue functionality.
- * - Support cached descriptors for better performance.
- * - Enable access to all four DRAM banks and internal SRAM memory
- * spaces.
- * - PHY access and control API.
- * - Port control register configuration API.
- * - Full control over Unicast and Multicast MAC configurations.
- *
- * Operation flow:
- *
- * Initialization phase
- * This phase complete the initialization of the ETH_PORT_INFO
- * struct.
- * User information regarding port configuration has to be set
- * prior to calling the port initialization routine. For example,
- * the user has to assign the port_phy_addr field which is board
- * depended parameter.
- * In this phase any port Tx/Rx activity is halted, MIB counters
- * are cleared, PHY address is set according to user parameter and
- * access to DRAM and internal SRAM memory spaces.
- *
- * Driver ring initialization
- * Allocating memory for the descriptor rings and buffers is not
- * within the scope of this driver. Thus, the user is required to
- * allocate memory for the descriptors ring and buffers. Those
- * memory parameters are used by the Rx and Tx ring initialization
- * routines in order to curve the descriptor linked list in a form
- * of a ring.
- * Note: Pay special attention to alignment issues when using
- * cached descriptors/buffers. In this phase the driver store
- * information in the ETH_PORT_INFO struct regarding each queue
- * ring.
- *
- * Driver start
- * This phase prepares the Ethernet port for Rx and Tx activity.
- * It uses the information stored in the ETH_PORT_INFO struct to
- * initialize the various port registers.
- *
- * Data flow:
- * All packet references to/from the driver are done using PKT_INFO
- * struct.
- * This struct is a unified struct used with Rx and Tx operations.
- * This way the user is not required to be familiar with neither
- * Tx nor Rx descriptors structures.
- * The driver's descriptors rings are management by indexes.
- * Those indexes controls the ring resources and used to indicate
- * a SW resource error:
- * 'current'
- * This index points to the current available resource for use. For
- * example in Rx process this index will point to the descriptor
- * that will be passed to the user upon calling the receive routine.
- * In Tx process, this index will point to the descriptor
- * that will be assigned with the user packet info and transmitted.
- * 'used'
- * This index points to the descriptor that need to restore its
- * resources. For example in Rx process, using the Rx buffer return
- * API will attach the buffer returned in packet info to the
- * descriptor pointed by 'used'. In Tx process, using the Tx
- * descriptor return will merely return the user packet info with
- * the command status of the transmitted buffer pointed by the
- * 'used' index. Nevertheless, it is essential to use this routine
- * to update the 'used' index.
- * 'first'
- * This index supports Tx Scatter-Gather. It points to the first
- * descriptor of a packet assembled of multiple buffers. For example
- * when in middle of Such packet we have a Tx resource error the
- * 'curr' index get the value of 'first' to indicate that the ring
- * returned to its state before trying to transmit this packet.
- *
- * Receive operation:
- * The eth_port_receive API set the packet information struct,
- * passed by the caller, with received information from the
- * 'current' SDMA descriptor.
- * It is the user responsibility to return this resource back
- * to the Rx descriptor ring to enable the reuse of this source.
- * Return Rx resource is done using the eth_rx_return_buff API.
- *
- * Transmit operation:
- * The eth_port_send API supports Scatter-Gather which enables to
- * send a packet spanned over multiple buffers. This means that
- * for each packet info structure given by the user and put into
- * the Tx descriptors ring, will be transmitted only if the 'LAST'
- * bit will be set in the packet info command status field. This
- * API also consider restriction regarding buffer alignments and
- * sizes.
- * The user must return a Tx resource after ensuring the buffer
- * has been transmitted to enable the Tx ring indexes to update.
- *
- * BOARD LAYOUT
- * This device is on-board. No jumper diagram is necessary.
- *
- * EXTERNAL INTERFACE
- *
- * Prior to calling the initialization routine eth_port_init() the user
- * must set the following fields under ETH_PORT_INFO struct:
- * port_num User Ethernet port number.
- * port_phy_addr User PHY address of Ethernet port.
- * port_mac_addr[6] User defined port MAC address.
- * port_config User port configuration value.
- * port_config_extend User port config extend value.
- * port_sdma_config User port SDMA config value.
- * port_serial_control User port serial control value.
- * *port_virt_to_phys () User function to cast virtual addr to CPU bus addr.
- * *port_private User scratch pad for user specific data structures.
- *
- * This driver introduce a set of default values:
- * PORT_CONFIG_VALUE Default port configuration value
- * PORT_CONFIG_EXTEND_VALUE Default port extend configuration value
- * PORT_SDMA_CONFIG_VALUE Default sdma control value
- * PORT_SERIAL_CONTROL_VALUE Default port serial control value
- *
- * This driver data flow is done using the PKT_INFO struct which is
- * a unified struct for Rx and Tx operations:
- * byte_cnt Tx/Rx descriptor buffer byte count.
- * l4i_chk CPU provided TCP Checksum. For Tx operation only.
- * cmd_sts Tx/Rx descriptor command status.
- * buf_ptr Tx/Rx descriptor buffer pointer.
- * return_info Tx/Rx user resource return information.
- *
- *
- * EXTERNAL SUPPORT REQUIREMENTS
- *
- * This driver requires the following external support:
- *
- * D_CACHE_FLUSH_LINE (address, address offset)
- *
- * This macro applies assembly code to flush and invalidate cache
- * line.
- * address - address base.
- * address offset - address offset
- *
- *
- * CPU_PIPE_FLUSH
- *
- * This macro applies assembly code to flush the CPU pipeline.
- *
- *******************************************************************************/
-/* includes */
-
-/* defines */
-/* SDMA command macros */
-#define ETH_ENABLE_TX_QUEUE(tx_queue, eth_port) \
- MV_REG_WRITE(MV64360_ETH_TRANSMIT_QUEUE_COMMAND_REG(eth_port), (1 << tx_queue))
-
-#define ETH_DISABLE_TX_QUEUE(tx_queue, eth_port) \
- MV_REG_WRITE(MV64360_ETH_TRANSMIT_QUEUE_COMMAND_REG(eth_port),\
- (1 << (8 + tx_queue)))
-
-#define ETH_ENABLE_RX_QUEUE(rx_queue, eth_port) \
-MV_REG_WRITE(MV64360_ETH_RECEIVE_QUEUE_COMMAND_REG(eth_port), (1 << rx_queue))
-
-#define ETH_DISABLE_RX_QUEUE(rx_queue, eth_port) \
-MV_REG_WRITE(MV64360_ETH_RECEIVE_QUEUE_COMMAND_REG(eth_port), (1 << (8 + rx_queue)))
-
-#define CURR_RFD_GET(p_curr_desc, queue) \
- ((p_curr_desc) = p_eth_port_ctrl->p_rx_curr_desc_q[queue])
-
-#define CURR_RFD_SET(p_curr_desc, queue) \
- (p_eth_port_ctrl->p_rx_curr_desc_q[queue] = (p_curr_desc))
-
-#define USED_RFD_GET(p_used_desc, queue) \
- ((p_used_desc) = p_eth_port_ctrl->p_rx_used_desc_q[queue])
-
-#define USED_RFD_SET(p_used_desc, queue)\
-(p_eth_port_ctrl->p_rx_used_desc_q[queue] = (p_used_desc))
-
-
-#define CURR_TFD_GET(p_curr_desc, queue) \
- ((p_curr_desc) = p_eth_port_ctrl->p_tx_curr_desc_q[queue])
-
-#define CURR_TFD_SET(p_curr_desc, queue) \
- (p_eth_port_ctrl->p_tx_curr_desc_q[queue] = (p_curr_desc))
-
-#define USED_TFD_GET(p_used_desc, queue) \
- ((p_used_desc) = p_eth_port_ctrl->p_tx_used_desc_q[queue])
-
-#define USED_TFD_SET(p_used_desc, queue) \
- (p_eth_port_ctrl->p_tx_used_desc_q[queue] = (p_used_desc))
-
-#define FIRST_TFD_GET(p_first_desc, queue) \
- ((p_first_desc) = p_eth_port_ctrl->p_tx_first_desc_q[queue])
-
-#define FIRST_TFD_SET(p_first_desc, queue) \
- (p_eth_port_ctrl->p_tx_first_desc_q[queue] = (p_first_desc))
-
-
-/* Macros that save access to desc in order to find next desc pointer */
-#define RX_NEXT_DESC_PTR(p_rx_desc, queue) (ETH_RX_DESC*)(((((unsigned int)p_rx_desc - (unsigned int)p_eth_port_ctrl->p_rx_desc_area_base[queue]) + RX_DESC_ALIGNED_SIZE) % p_eth_port_ctrl->rx_desc_area_size[queue]) + (unsigned int)p_eth_port_ctrl->p_rx_desc_area_base[queue])
-
-#define TX_NEXT_DESC_PTR(p_tx_desc, queue) (ETH_TX_DESC*)(((((unsigned int)p_tx_desc - (unsigned int)p_eth_port_ctrl->p_tx_desc_area_base[queue]) + TX_DESC_ALIGNED_SIZE) % p_eth_port_ctrl->tx_desc_area_size[queue]) + (unsigned int)p_eth_port_ctrl->p_tx_desc_area_base[queue])
-
-#define LINK_UP_TIMEOUT 100000
-#define PHY_BUSY_TIMEOUT 10000000
-
-/* locals */
-
-/* PHY routines */
-static void ethernet_phy_set (ETH_PORT eth_port_num, int phy_addr);
-static int ethernet_phy_get (ETH_PORT eth_port_num);
-
-/* Ethernet Port routines */
-static void eth_set_access_control (ETH_PORT eth_port_num,
- ETH_WIN_PARAM * param);
-static bool eth_port_uc_addr (ETH_PORT eth_port_num, unsigned char uc_nibble,
- ETH_QUEUE queue, int option);
-#if 0 /* FIXME */
-static bool eth_port_smc_addr (ETH_PORT eth_port_num,
- unsigned char mc_byte,
- ETH_QUEUE queue, int option);
-static bool eth_port_omc_addr (ETH_PORT eth_port_num,
- unsigned char crc8,
- ETH_QUEUE queue, int option);
-#endif
-
-static void eth_b_copy (unsigned int src_addr, unsigned int dst_addr,
- int byte_count);
-
-void eth_dbg (ETH_PORT_INFO * p_eth_port_ctrl);
-
-
-typedef enum _memory_bank { BANK0, BANK1, BANK2, BANK3 } MEMORY_BANK;
-u32 mv_get_dram_bank_base_addr (MEMORY_BANK bank)
-{
- u32 result = 0;
- u32 enable = MV_REG_READ (MV64360_BASE_ADDR_ENABLE);
-
- if (enable & (1 << bank))
- return 0;
- if (bank == BANK0)
- result = MV_REG_READ (MV64360_CS_0_BASE_ADDR);
- if (bank == BANK1)
- result = MV_REG_READ (MV64360_CS_1_BASE_ADDR);
- if (bank == BANK2)
- result = MV_REG_READ (MV64360_CS_2_BASE_ADDR);
- if (bank == BANK3)
- result = MV_REG_READ (MV64360_CS_3_BASE_ADDR);
- result &= 0x0000ffff;
- result = result << 16;
- return result;
-}
-
-u32 mv_get_dram_bank_size (MEMORY_BANK bank)
-{
- u32 result = 0;
- u32 enable = MV_REG_READ (MV64360_BASE_ADDR_ENABLE);
-
- if (enable & (1 << bank))
- return 0;
- if (bank == BANK0)
- result = MV_REG_READ (MV64360_CS_0_SIZE);
- if (bank == BANK1)
- result = MV_REG_READ (MV64360_CS_1_SIZE);
- if (bank == BANK2)
- result = MV_REG_READ (MV64360_CS_2_SIZE);
- if (bank == BANK3)
- result = MV_REG_READ (MV64360_CS_3_SIZE);
- result += 1;
- result &= 0x0000ffff;
- result = result << 16;
- return result;
-}
-
-u32 mv_get_internal_sram_base (void)
-{
- u32 result;
-
- result = MV_REG_READ (MV64360_INTEGRATED_SRAM_BASE_ADDR);
- result &= 0x0000ffff;
- result = result << 16;
- return result;
-}
-
-/*******************************************************************************
-* eth_port_init - Initialize the Ethernet port driver
-*
-* DESCRIPTION:
-* This function prepares the ethernet port to start its activity:
-* 1) Completes the ethernet port driver struct initialization toward port
-* start routine.
-* 2) Resets the device to a quiescent state in case of warm reboot.
-* 3) Enable SDMA access to all four DRAM banks as well as internal SRAM.
-* 4) Clean MAC tables. The reset status of those tables is unknown.
-* 5) Set PHY address.
-* Note: Call this routine prior to eth_port_start routine and after setting
-* user values in the user fields of Ethernet port control struct (i.e.
-* port_phy_addr).
-*
-* INPUT:
-* ETH_PORT_INFO *p_eth_port_ctrl Ethernet port control struct
-*
-* OUTPUT:
-* See description.
-*
-* RETURN:
-* None.
-*
-*******************************************************************************/
-static void eth_port_init (ETH_PORT_INFO * p_eth_port_ctrl)
-{
- int queue;
- ETH_WIN_PARAM win_param;
-
- p_eth_port_ctrl->port_config = PORT_CONFIG_VALUE;
- p_eth_port_ctrl->port_config_extend = PORT_CONFIG_EXTEND_VALUE;
- p_eth_port_ctrl->port_sdma_config = PORT_SDMA_CONFIG_VALUE;
- p_eth_port_ctrl->port_serial_control = PORT_SERIAL_CONTROL_VALUE;
-
- p_eth_port_ctrl->port_rx_queue_command = 0;
- p_eth_port_ctrl->port_tx_queue_command = 0;
-
- /* Zero out SW structs */
- for (queue = 0; queue < MAX_RX_QUEUE_NUM; queue++) {
- CURR_RFD_SET ((ETH_RX_DESC *) 0x00000000, queue);
- USED_RFD_SET ((ETH_RX_DESC *) 0x00000000, queue);
- p_eth_port_ctrl->rx_resource_err[queue] = false;
- }
-
- for (queue = 0; queue < MAX_TX_QUEUE_NUM; queue++) {
- CURR_TFD_SET ((ETH_TX_DESC *) 0x00000000, queue);
- USED_TFD_SET ((ETH_TX_DESC *) 0x00000000, queue);
- FIRST_TFD_SET ((ETH_TX_DESC *) 0x00000000, queue);
- p_eth_port_ctrl->tx_resource_err[queue] = false;
- }
-
- eth_port_reset (p_eth_port_ctrl->port_num);
-
- /* Set access parameters for DRAM bank 0 */
- win_param.win = ETH_WIN0; /* Use Ethernet window 0 */
- win_param.target = ETH_TARGET_DRAM; /* Window target - DDR */
- win_param.attributes = EBAR_ATTR_DRAM_CS0; /* Enable DRAM bank */
-#ifndef CONFIG_NOT_COHERENT_CACHE
- win_param.attributes |= EBAR_ATTR_DRAM_CACHE_COHERENCY_WB;
-#endif
- win_param.high_addr = 0;
- /* Get bank base */
- win_param.base_addr = mv_get_dram_bank_base_addr (BANK0);
- win_param.size = mv_get_dram_bank_size (BANK0); /* Get bank size */
- if (win_param.size == 0)
- win_param.enable = 0;
- else
- win_param.enable = 1; /* Enable the access */
- win_param.access_ctrl = EWIN_ACCESS_FULL; /* Enable full access */
-
- /* Set the access control for address window (EPAPR) READ & WRITE */
- eth_set_access_control (p_eth_port_ctrl->port_num, &win_param);
-
- /* Set access parameters for DRAM bank 1 */
- win_param.win = ETH_WIN1; /* Use Ethernet window 1 */
- win_param.target = ETH_TARGET_DRAM; /* Window target - DDR */
- win_param.attributes = EBAR_ATTR_DRAM_CS1; /* Enable DRAM bank */
-#ifndef CONFIG_NOT_COHERENT_CACHE
- win_param.attributes |= EBAR_ATTR_DRAM_CACHE_COHERENCY_WB;
-#endif
- win_param.high_addr = 0;
- /* Get bank base */
- win_param.base_addr = mv_get_dram_bank_base_addr (BANK1);
- win_param.size = mv_get_dram_bank_size (BANK1); /* Get bank size */
- if (win_param.size == 0)
- win_param.enable = 0;
- else
- win_param.enable = 1; /* Enable the access */
- win_param.access_ctrl = EWIN_ACCESS_FULL; /* Enable full access */
-
- /* Set the access control for address window (EPAPR) READ & WRITE */
- eth_set_access_control (p_eth_port_ctrl->port_num, &win_param);
-
- /* Set access parameters for DRAM bank 2 */
- win_param.win = ETH_WIN2; /* Use Ethernet window 2 */
- win_param.target = ETH_TARGET_DRAM; /* Window target - DDR */
- win_param.attributes = EBAR_ATTR_DRAM_CS2; /* Enable DRAM bank */
-#ifndef CONFIG_NOT_COHERENT_CACHE
- win_param.attributes |= EBAR_ATTR_DRAM_CACHE_COHERENCY_WB;
-#endif
- win_param.high_addr = 0;
- /* Get bank base */
- win_param.base_addr = mv_get_dram_bank_base_addr (BANK2);
- win_param.size = mv_get_dram_bank_size (BANK2); /* Get bank size */
- if (win_param.size == 0)
- win_param.enable = 0;
- else
- win_param.enable = 1; /* Enable the access */
- win_param.access_ctrl = EWIN_ACCESS_FULL; /* Enable full access */
-
- /* Set the access control for address window (EPAPR) READ & WRITE */
- eth_set_access_control (p_eth_port_ctrl->port_num, &win_param);
-
- /* Set access parameters for DRAM bank 3 */
- win_param.win = ETH_WIN3; /* Use Ethernet window 3 */
- win_param.target = ETH_TARGET_DRAM; /* Window target - DDR */
- win_param.attributes = EBAR_ATTR_DRAM_CS3; /* Enable DRAM bank */
-#ifndef CONFIG_NOT_COHERENT_CACHE
- win_param.attributes |= EBAR_ATTR_DRAM_CACHE_COHERENCY_WB;
-#endif
- win_param.high_addr = 0;
- /* Get bank base */
- win_param.base_addr = mv_get_dram_bank_base_addr (BANK3);
- win_param.size = mv_get_dram_bank_size (BANK3); /* Get bank size */
- if (win_param.size == 0)
- win_param.enable = 0;
- else
- win_param.enable = 1; /* Enable the access */
- win_param.access_ctrl = EWIN_ACCESS_FULL; /* Enable full access */
-
- /* Set the access control for address window (EPAPR) READ & WRITE */
- eth_set_access_control (p_eth_port_ctrl->port_num, &win_param);
-
- /* Set access parameters for Internal SRAM */
- win_param.win = ETH_WIN4; /* Use Ethernet window 0 */
- win_param.target = EBAR_TARGET_CBS; /* Target - Internal SRAM */
- win_param.attributes = EBAR_ATTR_CBS_SRAM | EBAR_ATTR_CBS_SRAM_BLOCK0;
- win_param.high_addr = 0;
- win_param.base_addr = mv_get_internal_sram_base (); /* Get base addr */
- win_param.size = MV64360_INTERNAL_SRAM_SIZE; /* Get bank size */
- win_param.enable = 1; /* Enable the access */
- win_param.access_ctrl = EWIN_ACCESS_FULL; /* Enable full access */
-
- /* Set the access control for address window (EPAPR) READ & WRITE */
- eth_set_access_control (p_eth_port_ctrl->port_num, &win_param);
-
- eth_port_init_mac_tables (p_eth_port_ctrl->port_num);
-
- ethernet_phy_set (p_eth_port_ctrl->port_num,
- p_eth_port_ctrl->port_phy_addr);
-
- return;
-
-}
-
-/*******************************************************************************
-* eth_port_start - Start the Ethernet port activity.
-*
-* DESCRIPTION:
-* This routine prepares the Ethernet port for Rx and Tx activity:
-* 1. Initialize Tx and Rx Current Descriptor Pointer for each queue that
-* has been initialized a descriptor's ring (using ether_init_tx_desc_ring
-* for Tx and ether_init_rx_desc_ring for Rx)
-* 2. Initialize and enable the Ethernet configuration port by writing to
-* the port's configuration and command registers.
-* 3. Initialize and enable the SDMA by writing to the SDMA's
-* configuration and command registers.
-* After completing these steps, the ethernet port SDMA can starts to
-* perform Rx and Tx activities.
-*
-* Note: Each Rx and Tx queue descriptor's list must be initialized prior
-* to calling this function (use ether_init_tx_desc_ring for Tx queues and
-* ether_init_rx_desc_ring for Rx queues).
-*
-* INPUT:
-* ETH_PORT_INFO *p_eth_port_ctrl Ethernet port control struct
-*
-* OUTPUT:
-* Ethernet port is ready to receive and transmit.
-*
-* RETURN:
-* false if the port PHY is not up.
-* true otherwise.
-*
-*******************************************************************************/
-static bool eth_port_start (ETH_PORT_INFO * p_eth_port_ctrl)
-{
- int queue;
- volatile ETH_TX_DESC *p_tx_curr_desc;
- volatile ETH_RX_DESC *p_rx_curr_desc;
- unsigned int phy_reg_data;
- ETH_PORT eth_port_num = p_eth_port_ctrl->port_num;
-
-
- /* Assignment of Tx CTRP of given queue */
- for (queue = 0; queue < MAX_TX_QUEUE_NUM; queue++) {
- CURR_TFD_GET (p_tx_curr_desc, queue);
- MV_REG_WRITE ((MV64360_ETH_TX_CURRENT_QUEUE_DESC_PTR_0
- (eth_port_num)
- + (4 * queue)),
- ((unsigned int) p_tx_curr_desc));
-
- }
-
- /* Assignment of Rx CRDP of given queue */
- for (queue = 0; queue < MAX_RX_QUEUE_NUM; queue++) {
- CURR_RFD_GET (p_rx_curr_desc, queue);
- MV_REG_WRITE ((MV64360_ETH_RX_CURRENT_QUEUE_DESC_PTR_0
- (eth_port_num)
- + (4 * queue)),
- ((unsigned int) p_rx_curr_desc));
-
- if (p_rx_curr_desc != NULL)
- /* Add the assigned Ethernet address to the port's address table */
- eth_port_uc_addr_set (p_eth_port_ctrl->port_num,
- p_eth_port_ctrl->port_mac_addr,
- queue);
- }
-
- /* Assign port configuration and command. */
- MV_REG_WRITE (MV64360_ETH_PORT_CONFIG_REG (eth_port_num),
- p_eth_port_ctrl->port_config);
-
- MV_REG_WRITE (MV64360_ETH_PORT_CONFIG_EXTEND_REG (eth_port_num),
- p_eth_port_ctrl->port_config_extend);
-
- MV_REG_WRITE (MV64360_ETH_PORT_SERIAL_CONTROL_REG (eth_port_num),
- p_eth_port_ctrl->port_serial_control);
-
- MV_SET_REG_BITS (MV64360_ETH_PORT_SERIAL_CONTROL_REG (eth_port_num),
- ETH_SERIAL_PORT_ENABLE);
-
- /* Assign port SDMA configuration */
- MV_REG_WRITE (MV64360_ETH_SDMA_CONFIG_REG (eth_port_num),
- p_eth_port_ctrl->port_sdma_config);
-
- MV_REG_WRITE (MV64360_ETH_TX_QUEUE_0_TOKEN_BUCKET_COUNT
- (eth_port_num), 0x3fffffff);
- MV_REG_WRITE (MV64360_ETH_TX_QUEUE_0_TOKEN_BUCKET_CONFIG
- (eth_port_num), 0x03fffcff);
- /* Turn off the port/queue bandwidth limitation */
- MV_REG_WRITE (MV64360_ETH_MAXIMUM_TRANSMIT_UNIT (eth_port_num), 0x0);
-
- /* Enable port Rx. */
- MV_REG_WRITE (MV64360_ETH_RECEIVE_QUEUE_COMMAND_REG (eth_port_num),
- p_eth_port_ctrl->port_rx_queue_command);
-
- /* Check if link is up */
- eth_port_read_smi_reg (eth_port_num, 1, &phy_reg_data);
-
- if (!(phy_reg_data & 0x20))
- return false;
-
- return true;
-}
-
-/*******************************************************************************
-* eth_port_uc_addr_set - This function Set the port Unicast address.
-*
-* DESCRIPTION:
-* This function Set the port Ethernet MAC address.
-*
-* INPUT:
-* ETH_PORT eth_port_num Port number.
-* char * p_addr Address to be set
-* ETH_QUEUE queue Rx queue number for this MAC address.
-*
-* OUTPUT:
-* Set MAC address low and high registers. also calls eth_port_uc_addr()
-* To set the unicast table with the proper information.
-*
-* RETURN:
-* N/A.
-*
-*******************************************************************************/
-static void eth_port_uc_addr_set (ETH_PORT eth_port_num,
- unsigned char *p_addr, ETH_QUEUE queue)
-{
- unsigned int mac_h;
- unsigned int mac_l;
-
- mac_l = (p_addr[4] << 8) | (p_addr[5]);
- mac_h = (p_addr[0] << 24) | (p_addr[1] << 16) |
- (p_addr[2] << 8) | (p_addr[3] << 0);
-
- MV_REG_WRITE (MV64360_ETH_MAC_ADDR_LOW (eth_port_num), mac_l);
- MV_REG_WRITE (MV64360_ETH_MAC_ADDR_HIGH (eth_port_num), mac_h);
-
- /* Accept frames of this address */
- eth_port_uc_addr (eth_port_num, p_addr[5], queue, ACCEPT_MAC_ADDR);
-
- return;
-}
-
-/*******************************************************************************
-* eth_port_uc_addr - This function Set the port unicast address table
-*
-* DESCRIPTION:
-* This function locates the proper entry in the Unicast table for the
-* specified MAC nibble and sets its properties according to function
-* parameters.
-*
-* INPUT:
-* ETH_PORT eth_port_num Port number.
-* unsigned char uc_nibble Unicast MAC Address last nibble.
-* ETH_QUEUE queue Rx queue number for this MAC address.
-* int option 0 = Add, 1 = remove address.
-*
-* OUTPUT:
-* This function add/removes MAC addresses from the port unicast address
-* table.
-*
-* RETURN:
-* true is output succeeded.
-* false if option parameter is invalid.
-*
-*******************************************************************************/
-static bool eth_port_uc_addr (ETH_PORT eth_port_num,
- unsigned char uc_nibble,
- ETH_QUEUE queue, int option)
-{
- unsigned int unicast_reg;
- unsigned int tbl_offset;
- unsigned int reg_offset;
-
- /* Locate the Unicast table entry */
- uc_nibble = (0xf & uc_nibble);
- tbl_offset = (uc_nibble / 4) * 4; /* Register offset from unicast table base */
- reg_offset = uc_nibble % 4; /* Entry offset within the above register */
-
- switch (option) {
- case REJECT_MAC_ADDR:
- /* Clear accepts frame bit at specified unicast DA table entry */
- unicast_reg =
- MV_REG_READ ((MV64360_ETH_DA_FILTER_UNICAST_TABLE_BASE
- (eth_port_num)
- + tbl_offset));
-
- unicast_reg &= (0x0E << (8 * reg_offset));
-
- MV_REG_WRITE ((MV64360_ETH_DA_FILTER_UNICAST_TABLE_BASE
- (eth_port_num)
- + tbl_offset), unicast_reg);
- break;
-
- case ACCEPT_MAC_ADDR:
- /* Set accepts frame bit at unicast DA filter table entry */
- unicast_reg =
- MV_REG_READ ((MV64360_ETH_DA_FILTER_UNICAST_TABLE_BASE
- (eth_port_num)
- + tbl_offset));
-
- unicast_reg |= ((0x01 | queue) << (8 * reg_offset));
-
- MV_REG_WRITE ((MV64360_ETH_DA_FILTER_UNICAST_TABLE_BASE
- (eth_port_num)
- + tbl_offset), unicast_reg);
-
- break;
-
- default:
- return false;
- }
- return true;
-}
-
-#if 0 /* FIXME */
-/*******************************************************************************
-* eth_port_mc_addr - Multicast address settings.
-*
-* DESCRIPTION:
-* This API controls the MV device MAC multicast support.
-* The MV device supports multicast using two tables:
-* 1) Special Multicast Table for MAC addresses of the form
-* 0x01-00-5E-00-00-XX (where XX is between 0x00 and 0x_fF).
-* The MAC DA[7:0] bits are used as a pointer to the Special Multicast
-* Table entries in the DA-Filter table.
-* In this case, the function calls eth_port_smc_addr() routine to set the
-* Special Multicast Table.
-* 2) Other Multicast Table for multicast of another type. A CRC-8bit
-* is used as an index to the Other Multicast Table entries in the
-* DA-Filter table.
-* In this case, the function calculates the CRC-8bit value and calls
-* eth_port_omc_addr() routine to set the Other Multicast Table.
-* INPUT:
-* ETH_PORT eth_port_num Port number.
-* unsigned char *p_addr Unicast MAC Address.
-* ETH_QUEUE queue Rx queue number for this MAC address.
-* int option 0 = Add, 1 = remove address.
-*
-* OUTPUT:
-* See description.
-*
-* RETURN:
-* true is output succeeded.
-* false if add_address_table_entry( ) failed.
-*
-*******************************************************************************/
-static void eth_port_mc_addr (ETH_PORT eth_port_num,
- unsigned char *p_addr,
- ETH_QUEUE queue, int option)
-{
- unsigned int mac_h;
- unsigned int mac_l;
- unsigned char crc_result = 0;
- int mac_array[48];
- int crc[8];
- int i;
-
-
- if ((p_addr[0] == 0x01) &&
- (p_addr[1] == 0x00) &&
- (p_addr[2] == 0x5E) && (p_addr[3] == 0x00) && (p_addr[4] == 0x00))
-
- eth_port_smc_addr (eth_port_num, p_addr[5], queue, option);
- else {
- /* Calculate CRC-8 out of the given address */
- mac_h = (p_addr[0] << 8) | (p_addr[1]);
- mac_l = (p_addr[2] << 24) | (p_addr[3] << 16) |
- (p_addr[4] << 8) | (p_addr[5] << 0);
-
- for (i = 0; i < 32; i++)
- mac_array[i] = (mac_l >> i) & 0x1;
- for (i = 32; i < 48; i++)
- mac_array[i] = (mac_h >> (i - 32)) & 0x1;
-
-
- crc[0] = mac_array[45] ^ mac_array[43] ^ mac_array[40] ^
- mac_array[39] ^ mac_array[35] ^ mac_array[34] ^
- mac_array[31] ^ mac_array[30] ^ mac_array[28] ^
- mac_array[23] ^ mac_array[21] ^ mac_array[19] ^
- mac_array[18] ^ mac_array[16] ^ mac_array[14] ^
- mac_array[12] ^ mac_array[8] ^ mac_array[7] ^
- mac_array[6] ^ mac_array[0];
-
- crc[1] = mac_array[46] ^ mac_array[45] ^ mac_array[44] ^
- mac_array[43] ^ mac_array[41] ^ mac_array[39] ^
- mac_array[36] ^ mac_array[34] ^ mac_array[32] ^
- mac_array[30] ^ mac_array[29] ^ mac_array[28] ^
- mac_array[24] ^ mac_array[23] ^ mac_array[22] ^
- mac_array[21] ^ mac_array[20] ^ mac_array[18] ^
- mac_array[17] ^ mac_array[16] ^ mac_array[15] ^
- mac_array[14] ^ mac_array[13] ^ mac_array[12] ^
- mac_array[9] ^ mac_array[6] ^ mac_array[1] ^
- mac_array[0];
-
- crc[2] = mac_array[47] ^ mac_array[46] ^ mac_array[44] ^
- mac_array[43] ^ mac_array[42] ^ mac_array[39] ^
- mac_array[37] ^ mac_array[34] ^ mac_array[33] ^
- mac_array[29] ^ mac_array[28] ^ mac_array[25] ^
- mac_array[24] ^ mac_array[22] ^ mac_array[17] ^
- mac_array[15] ^ mac_array[13] ^ mac_array[12] ^
- mac_array[10] ^ mac_array[8] ^ mac_array[6] ^
- mac_array[2] ^ mac_array[1] ^ mac_array[0];
-
- crc[3] = mac_array[47] ^ mac_array[45] ^ mac_array[44] ^
- mac_array[43] ^ mac_array[40] ^ mac_array[38] ^
- mac_array[35] ^ mac_array[34] ^ mac_array[30] ^
- mac_array[29] ^ mac_array[26] ^ mac_array[25] ^
- mac_array[23] ^ mac_array[18] ^ mac_array[16] ^
- mac_array[14] ^ mac_array[13] ^ mac_array[11] ^
- mac_array[9] ^ mac_array[7] ^ mac_array[3] ^
- mac_array[2] ^ mac_array[1];
-
- crc[4] = mac_array[46] ^ mac_array[45] ^ mac_array[44] ^
- mac_array[41] ^ mac_array[39] ^ mac_array[36] ^
- mac_array[35] ^ mac_array[31] ^ mac_array[30] ^
- mac_array[27] ^ mac_array[26] ^ mac_array[24] ^
- mac_array[19] ^ mac_array[17] ^ mac_array[15] ^
- mac_array[14] ^ mac_array[12] ^ mac_array[10] ^
- mac_array[8] ^ mac_array[4] ^ mac_array[3] ^
- mac_array[2];
-
- crc[5] = mac_array[47] ^ mac_array[46] ^ mac_array[45] ^
- mac_array[42] ^ mac_array[40] ^ mac_array[37] ^
- mac_array[36] ^ mac_array[32] ^ mac_array[31] ^
- mac_array[28] ^ mac_array[27] ^ mac_array[25] ^
- mac_array[20] ^ mac_array[18] ^ mac_array[16] ^
- mac_array[15] ^ mac_array[13] ^ mac_array[11] ^
- mac_array[9] ^ mac_array[5] ^ mac_array[4] ^
- mac_array[3];
-
- crc[6] = mac_array[47] ^ mac_array[46] ^ mac_array[43] ^
- mac_array[41] ^ mac_array[38] ^ mac_array[37] ^
- mac_array[33] ^ mac_array[32] ^ mac_array[29] ^
- mac_array[28] ^ mac_array[26] ^ mac_array[21] ^
- mac_array[19] ^ mac_array[17] ^ mac_array[16] ^
- mac_array[14] ^ mac_array[12] ^ mac_array[10] ^
- mac_array[6] ^ mac_array[5] ^ mac_array[4];
-
- crc[7] = mac_array[47] ^ mac_array[44] ^ mac_array[42] ^
- mac_array[39] ^ mac_array[38] ^ mac_array[34] ^
- mac_array[33] ^ mac_array[30] ^ mac_array[29] ^
- mac_array[27] ^ mac_array[22] ^ mac_array[20] ^
- mac_array[18] ^ mac_array[17] ^ mac_array[15] ^
- mac_array[13] ^ mac_array[11] ^ mac_array[7] ^
- mac_array[6] ^ mac_array[5];
-
- for (i = 0; i < 8; i++)
- crc_result = crc_result | (crc[i] << i);
-
- eth_port_omc_addr (eth_port_num, crc_result, queue, option);
- }
- return;
-}
-
-/*******************************************************************************
-* eth_port_smc_addr - Special Multicast address settings.
-*
-* DESCRIPTION:
-* This routine controls the MV device special MAC multicast support.
-* The Special Multicast Table for MAC addresses supports MAC of the form
-* 0x01-00-5E-00-00-XX (where XX is between 0x00 and 0x_fF).
-* The MAC DA[7:0] bits are used as a pointer to the Special Multicast
-* Table entries in the DA-Filter table.
-* This function set the Special Multicast Table appropriate entry
-* according to the argument given.
-*
-* INPUT:
-* ETH_PORT eth_port_num Port number.
-* unsigned char mc_byte Multicast addr last byte (MAC DA[7:0] bits).
-* ETH_QUEUE queue Rx queue number for this MAC address.
-* int option 0 = Add, 1 = remove address.
-*
-* OUTPUT:
-* See description.
-*
-* RETURN:
-* true is output succeeded.
-* false if option parameter is invalid.
-*
-*******************************************************************************/
-static bool eth_port_smc_addr (ETH_PORT eth_port_num,
- unsigned char mc_byte,
- ETH_QUEUE queue, int option)
-{
- unsigned int smc_table_reg;
- unsigned int tbl_offset;
- unsigned int reg_offset;
-
- /* Locate the SMC table entry */
- tbl_offset = (mc_byte / 4) * 4; /* Register offset from SMC table base */
- reg_offset = mc_byte % 4; /* Entry offset within the above register */
- queue &= 0x7;
-
- switch (option) {
- case REJECT_MAC_ADDR:
- /* Clear accepts frame bit at specified Special DA table entry */
- smc_table_reg =
- MV_REG_READ ((MV64360_ETH_DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE (eth_port_num) + tbl_offset));
- smc_table_reg &= (0x0E << (8 * reg_offset));
-
- MV_REG_WRITE ((MV64360_ETH_DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE (eth_port_num) + tbl_offset), smc_table_reg);
- break;
-
- case ACCEPT_MAC_ADDR:
- /* Set accepts frame bit at specified Special DA table entry */
- smc_table_reg =
- MV_REG_READ ((MV64360_ETH_DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE (eth_port_num) + tbl_offset));
- smc_table_reg |= ((0x01 | queue) << (8 * reg_offset));
-
- MV_REG_WRITE ((MV64360_ETH_DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE (eth_port_num) + tbl_offset), smc_table_reg);
- break;
-
- default:
- return false;
- }
- return true;
-}
-
-/*******************************************************************************
-* eth_port_omc_addr - Multicast address settings.
-*
-* DESCRIPTION:
-* This routine controls the MV device Other MAC multicast support.
-* The Other Multicast Table is used for multicast of another type.
-* A CRC-8bit is used as an index to the Other Multicast Table entries
-* in the DA-Filter table.
-* The function gets the CRC-8bit value from the calling routine and
-* set the Other Multicast Table appropriate entry according to the
-* CRC-8 argument given.
-*
-* INPUT:
-* ETH_PORT eth_port_num Port number.
-* unsigned char crc8 A CRC-8bit (Polynomial: x^8+x^2+x^1+1).
-* ETH_QUEUE queue Rx queue number for this MAC address.
-* int option 0 = Add, 1 = remove address.
-*
-* OUTPUT:
-* See description.
-*
-* RETURN:
-* true is output succeeded.
-* false if option parameter is invalid.
-*
-*******************************************************************************/
-static bool eth_port_omc_addr (ETH_PORT eth_port_num,
- unsigned char crc8,
- ETH_QUEUE queue, int option)
-{
- unsigned int omc_table_reg;
- unsigned int tbl_offset;
- unsigned int reg_offset;
-
- /* Locate the OMC table entry */
- tbl_offset = (crc8 / 4) * 4; /* Register offset from OMC table base */
- reg_offset = crc8 % 4; /* Entry offset within the above register */
- queue &= 0x7;
-
- switch (option) {
- case REJECT_MAC_ADDR:
- /* Clear accepts frame bit at specified Other DA table entry */
- omc_table_reg =
- MV_REG_READ ((MV64360_ETH_DA_FILTER_OTHER_MULTICAST_TABLE_BASE (eth_port_num) + tbl_offset));
- omc_table_reg &= (0x0E << (8 * reg_offset));
-
- MV_REG_WRITE ((MV64360_ETH_DA_FILTER_OTHER_MULTICAST_TABLE_BASE (eth_port_num) + tbl_offset), omc_table_reg);
- break;
-
- case ACCEPT_MAC_ADDR:
- /* Set accepts frame bit at specified Other DA table entry */
- omc_table_reg =
- MV_REG_READ ((MV64360_ETH_DA_FILTER_OTHER_MULTICAST_TABLE_BASE (eth_port_num) + tbl_offset));
- omc_table_reg |= ((0x01 | queue) << (8 * reg_offset));
-
- MV_REG_WRITE ((MV64360_ETH_DA_FILTER_OTHER_MULTICAST_TABLE_BASE (eth_port_num) + tbl_offset), omc_table_reg);
- break;
-
- default:
- return false;
- }
- return true;
-}
-#endif
-
-/*******************************************************************************
-* eth_port_init_mac_tables - Clear all entrance in the UC, SMC and OMC tables
-*
-* DESCRIPTION:
-* Go through all the DA filter tables (Unicast, Special Multicast & Other
-* Multicast) and set each entry to 0.
-*
-* INPUT:
-* ETH_PORT eth_port_num Ethernet Port number. See ETH_PORT enum.
-*
-* OUTPUT:
-* Multicast and Unicast packets are rejected.
-*
-* RETURN:
-* None.
-*
-*******************************************************************************/
-static void eth_port_init_mac_tables (ETH_PORT eth_port_num)
-{
- int table_index;
-
- /* Clear DA filter unicast table (Ex_dFUT) */
- for (table_index = 0; table_index <= 0xC; table_index += 4)
- MV_REG_WRITE ((MV64360_ETH_DA_FILTER_UNICAST_TABLE_BASE
- (eth_port_num) + table_index), 0);
-
- for (table_index = 0; table_index <= 0xFC; table_index += 4) {
- /* Clear DA filter special multicast table (Ex_dFSMT) */
- MV_REG_WRITE ((MV64360_ETH_DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE (eth_port_num) + table_index), 0);
- /* Clear DA filter other multicast table (Ex_dFOMT) */
- MV_REG_WRITE ((MV64360_ETH_DA_FILTER_OTHER_MULTICAST_TABLE_BASE (eth_port_num) + table_index), 0);
- }
-}
-
-/*******************************************************************************
-* eth_clear_mib_counters - Clear all MIB counters
-*
-* DESCRIPTION:
-* This function clears all MIB counters of a specific ethernet port.
-* A read from the MIB counter will reset the counter.
-*
-* INPUT:
-* ETH_PORT eth_port_num Ethernet Port number. See ETH_PORT enum.
-*
-* OUTPUT:
-* After reading all MIB counters, the counters resets.
-*
-* RETURN:
-* MIB counter value.
-*
-*******************************************************************************/
-static void eth_clear_mib_counters (ETH_PORT eth_port_num)
-{
- int i;
- unsigned int dummy;
-
- /* Perform dummy reads from MIB counters */
- for (i = ETH_MIB_GOOD_OCTETS_RECEIVED_LOW; i < ETH_MIB_LATE_COLLISION;
- i += 4)
- dummy = MV_REG_READ ((MV64360_ETH_MIB_COUNTERS_BASE
- (eth_port_num) + i));
-
- return;
-}
-
-/*******************************************************************************
-* eth_read_mib_counter - Read a MIB counter
-*
-* DESCRIPTION:
-* This function reads a MIB counter of a specific ethernet port.
-* NOTE - If read from ETH_MIB_GOOD_OCTETS_RECEIVED_LOW, then the
-* following read must be from ETH_MIB_GOOD_OCTETS_RECEIVED_HIGH
-* register. The same applies for ETH_MIB_GOOD_OCTETS_SENT_LOW and
-* ETH_MIB_GOOD_OCTETS_SENT_HIGH
-*
-* INPUT:
-* ETH_PORT eth_port_num Ethernet Port number. See ETH_PORT enum.
-* unsigned int mib_offset MIB counter offset (use ETH_MIB_... macros).
-*
-* OUTPUT:
-* After reading the MIB counter, the counter resets.
-*
-* RETURN:
-* MIB counter value.
-*
-*******************************************************************************/
-unsigned int eth_read_mib_counter (ETH_PORT eth_port_num,
- unsigned int mib_offset)
-{
- return (MV_REG_READ (MV64360_ETH_MIB_COUNTERS_BASE (eth_port_num)
- + mib_offset));
-}
-
-/*******************************************************************************
-* ethernet_phy_set - Set the ethernet port PHY address.
-*
-* DESCRIPTION:
-* This routine set the ethernet port PHY address according to given
-* parameter.
-*
-* INPUT:
-* ETH_PORT eth_port_num Ethernet Port number. See ETH_PORT enum.
-*
-* OUTPUT:
-* Set PHY Address Register with given PHY address parameter.
-*
-* RETURN:
-* None.
-*
-*******************************************************************************/
-static void ethernet_phy_set (ETH_PORT eth_port_num, int phy_addr)
-{
- unsigned int reg_data;
-
- reg_data = MV_REG_READ (MV64360_ETH_PHY_ADDR_REG);
-
- reg_data &= ~(0x1F << (5 * eth_port_num));
- reg_data |= (phy_addr << (5 * eth_port_num));
-
- MV_REG_WRITE (MV64360_ETH_PHY_ADDR_REG, reg_data);
-
- return;
-}
-
-/*******************************************************************************
- * ethernet_phy_get - Get the ethernet port PHY address.
- *
- * DESCRIPTION:
- * This routine returns the given ethernet port PHY address.
- *
- * INPUT:
- * ETH_PORT eth_port_num Ethernet Port number. See ETH_PORT enum.
- *
- * OUTPUT:
- * None.
- *
- * RETURN:
- * PHY address.
- *
- *******************************************************************************/
-static int ethernet_phy_get (ETH_PORT eth_port_num)
-{
- unsigned int reg_data;
-
- reg_data = MV_REG_READ (MV64360_ETH_PHY_ADDR_REG);
-
- return ((reg_data >> (5 * eth_port_num)) & 0x1f);
-}
-
-/*******************************************************************************
- * ethernet_phy_reset - Reset Ethernet port PHY.
- *
- * DESCRIPTION:
- * This routine utilize the SMI interface to reset the ethernet port PHY.
- * The routine waits until the link is up again or link up is timeout.
- *
- * INPUT:
- * ETH_PORT eth_port_num Ethernet Port number. See ETH_PORT enum.
- *
- * OUTPUT:
- * The ethernet port PHY renew its link.
- *
- * RETURN:
- * None.
- *
-*******************************************************************************/
-static bool ethernet_phy_reset (ETH_PORT eth_port_num)
-{
- unsigned int time_out = 50;
- unsigned int phy_reg_data;
-
- /* Reset the PHY */
- eth_port_read_smi_reg (eth_port_num, 0, &phy_reg_data);
- phy_reg_data |= 0x8000; /* Set bit 15 to reset the PHY */
- eth_port_write_smi_reg (eth_port_num, 0, phy_reg_data);
-
- /* Poll on the PHY LINK */
- do {
- eth_port_read_smi_reg (eth_port_num, 1, &phy_reg_data);
-
- if (time_out-- == 0)
- return false;
- }
- while (!(phy_reg_data & 0x20));
-
- return true;
-}
-
-/*******************************************************************************
- * eth_port_reset - Reset Ethernet port
- *
- * DESCRIPTION:
- * This routine resets the chip by aborting any SDMA engine activity and
- * clearing the MIB counters. The Receiver and the Transmit unit are in
- * idle state after this command is performed and the port is disabled.
- *
- * INPUT:
- * ETH_PORT eth_port_num Ethernet Port number. See ETH_PORT enum.
- *
- * OUTPUT:
- * Channel activity is halted.
- *
- * RETURN:
- * None.
- *
- *******************************************************************************/
-static void eth_port_reset (ETH_PORT eth_port_num)
-{
- unsigned int reg_data;
-
- /* Stop Tx port activity. Check port Tx activity. */
- reg_data =
- MV_REG_READ (MV64360_ETH_TRANSMIT_QUEUE_COMMAND_REG
- (eth_port_num));
-
- if (reg_data & 0xFF) {
- /* Issue stop command for active channels only */
- MV_REG_WRITE (MV64360_ETH_TRANSMIT_QUEUE_COMMAND_REG
- (eth_port_num), (reg_data << 8));
-
- /* Wait for all Tx activity to terminate. */
- do {
- /* Check port cause register that all Tx queues are stopped */
- reg_data =
- MV_REG_READ
- (MV64360_ETH_TRANSMIT_QUEUE_COMMAND_REG
- (eth_port_num));
- }
- while (reg_data & 0xFF);
- }
-
- /* Stop Rx port activity. Check port Rx activity. */
- reg_data =
- MV_REG_READ (MV64360_ETH_RECEIVE_QUEUE_COMMAND_REG
- (eth_port_num));
-
- if (reg_data & 0xFF) {
- /* Issue stop command for active channels only */
- MV_REG_WRITE (MV64360_ETH_RECEIVE_QUEUE_COMMAND_REG
- (eth_port_num), (reg_data << 8));
-
- /* Wait for all Rx activity to terminate. */
- do {
- /* Check port cause register that all Rx queues are stopped */
- reg_data =
- MV_REG_READ
- (MV64360_ETH_RECEIVE_QUEUE_COMMAND_REG
- (eth_port_num));
- }
- while (reg_data & 0xFF);
- }
-
-
- /* Clear all MIB counters */
- eth_clear_mib_counters (eth_port_num);
-
- /* Reset the Enable bit in the Configuration Register */
- reg_data =
- MV_REG_READ (MV64360_ETH_PORT_SERIAL_CONTROL_REG
- (eth_port_num));
- reg_data &= ~ETH_SERIAL_PORT_ENABLE;
- MV_REG_WRITE (MV64360_ETH_PORT_SERIAL_CONTROL_REG (eth_port_num),
- reg_data);
-
- return;
-}
-
-#if 0 /* Not needed here */
-/*******************************************************************************
- * ethernet_set_config_reg - Set specified bits in configuration register.
- *
- * DESCRIPTION:
- * This function sets specified bits in the given ethernet
- * configuration register.
- *
- * INPUT:
- * ETH_PORT eth_port_num Ethernet Port number. See ETH_PORT enum.
- * unsigned int value 32 bit value.
- *
- * OUTPUT:
- * The set bits in the value parameter are set in the configuration
- * register.
- *
- * RETURN:
- * None.
- *
- *******************************************************************************/
-static void ethernet_set_config_reg (ETH_PORT eth_port_num,
- unsigned int value)
-{
- unsigned int eth_config_reg;
-
- eth_config_reg =
- MV_REG_READ (MV64360_ETH_PORT_CONFIG_REG (eth_port_num));
- eth_config_reg |= value;
- MV_REG_WRITE (MV64360_ETH_PORT_CONFIG_REG (eth_port_num),
- eth_config_reg);
-
- return;
-}
-#endif
-
-#if 0 /* FIXME */
-/*******************************************************************************
- * ethernet_reset_config_reg - Reset specified bits in configuration register.
- *
- * DESCRIPTION:
- * This function resets specified bits in the given Ethernet
- * configuration register.
- *
- * INPUT:
- * ETH_PORT eth_port_num Ethernet Port number. See ETH_PORT enum.
- * unsigned int value 32 bit value.
- *
- * OUTPUT:
- * The set bits in the value parameter are reset in the configuration
- * register.
- *
- * RETURN:
- * None.
- *
- *******************************************************************************/
-static void ethernet_reset_config_reg (ETH_PORT eth_port_num,
- unsigned int value)
-{
- unsigned int eth_config_reg;
-
- eth_config_reg = MV_REG_READ (MV64360_ETH_PORT_CONFIG_EXTEND_REG
- (eth_port_num));
- eth_config_reg &= ~value;
- MV_REG_WRITE (MV64360_ETH_PORT_CONFIG_EXTEND_REG (eth_port_num),
- eth_config_reg);
-
- return;
-}
-#endif
-
-#if 0 /* Not needed here */
-/*******************************************************************************
- * ethernet_get_config_reg - Get the port configuration register
- *
- * DESCRIPTION:
- * This function returns the configuration register value of the given
- * ethernet port.
- *
- * INPUT:
- * ETH_PORT eth_port_num Ethernet Port number. See ETH_PORT enum.
- *
- * OUTPUT:
- * None.
- *
- * RETURN:
- * Port configuration register value.
- *
- *******************************************************************************/
-static unsigned int ethernet_get_config_reg (ETH_PORT eth_port_num)
-{
- unsigned int eth_config_reg;
-
- eth_config_reg = MV_REG_READ (MV64360_ETH_PORT_CONFIG_EXTEND_REG
- (eth_port_num));
- return eth_config_reg;
-}
-
-#endif
-
-/*******************************************************************************
- * eth_port_read_smi_reg - Read PHY registers
- *
- * DESCRIPTION:
- * This routine utilize the SMI interface to interact with the PHY in
- * order to perform PHY register read.
- *
- * INPUT:
- * ETH_PORT eth_port_num Ethernet Port number. See ETH_PORT enum.
- * unsigned int phy_reg PHY register address offset.
- * unsigned int *value Register value buffer.
- *
- * OUTPUT:
- * Write the value of a specified PHY register into given buffer.
- *
- * RETURN:
- * false if the PHY is busy or read data is not in valid state.
- * true otherwise.
- *
- *******************************************************************************/
-static bool eth_port_read_smi_reg (ETH_PORT eth_port_num,
- unsigned int phy_reg, unsigned int *value)
-{
- unsigned int reg_value;
- unsigned int time_out = PHY_BUSY_TIMEOUT;
- int phy_addr;
-
- phy_addr = ethernet_phy_get (eth_port_num);
-/* printf(" Phy-Port %d has addess %d \n",eth_port_num, phy_addr );*/
-
- /* first check that it is not busy */
- do {
- reg_value = MV_REG_READ (MV64360_ETH_SMI_REG);
- if (time_out-- == 0) {
- return false;
- }
- }
- while (reg_value & ETH_SMI_BUSY);
-
- /* not busy */
-
- MV_REG_WRITE (MV64360_ETH_SMI_REG,
- (phy_addr << 16) | (phy_reg << 21) |
- ETH_SMI_OPCODE_READ);
-
- time_out = PHY_BUSY_TIMEOUT; /* initialize the time out var again */
-
- do {
- reg_value = MV_REG_READ (MV64360_ETH_SMI_REG);
- if (time_out-- == 0) {
- return false;
- }
- }
- while ((reg_value & ETH_SMI_READ_VALID) != ETH_SMI_READ_VALID); /* Bit set equ operation done */
-
- /* Wait for the data to update in the SMI register */
-#define PHY_UPDATE_TIMEOUT 10000
- for (time_out = 0; time_out < PHY_UPDATE_TIMEOUT; time_out++);
-
- reg_value = MV_REG_READ (MV64360_ETH_SMI_REG);
-
- *value = reg_value & 0xffff;
-
- return true;
-}
-
-/*******************************************************************************
- * eth_port_write_smi_reg - Write to PHY registers
- *
- * DESCRIPTION:
- * This routine utilize the SMI interface to interact with the PHY in
- * order to perform writes to PHY registers.
- *
- * INPUT:
- * ETH_PORT eth_port_num Ethernet Port number. See ETH_PORT enum.
- * unsigned int phy_reg PHY register address offset.
- * unsigned int value Register value.
- *
- * OUTPUT:
- * Write the given value to the specified PHY register.
- *
- * RETURN:
- * false if the PHY is busy.
- * true otherwise.
- *
- *******************************************************************************/
-static bool eth_port_write_smi_reg (ETH_PORT eth_port_num,
- unsigned int phy_reg, unsigned int value)
-{
- unsigned int reg_value;
- unsigned int time_out = PHY_BUSY_TIMEOUT;
- int phy_addr;
-
- phy_addr = ethernet_phy_get (eth_port_num);
-
- /* first check that it is not busy */
- do {
- reg_value = MV_REG_READ (MV64360_ETH_SMI_REG);
- if (time_out-- == 0) {
- return false;
- }
- }
- while (reg_value & ETH_SMI_BUSY);
-
- /* not busy */
- MV_REG_WRITE (MV64360_ETH_SMI_REG,
- (phy_addr << 16) | (phy_reg << 21) |
- ETH_SMI_OPCODE_WRITE | (value & 0xffff));
- return true;
-}
-
-/*******************************************************************************
- * eth_set_access_control - Config address decode parameters for Ethernet unit
- *
- * DESCRIPTION:
- * This function configures the address decode parameters for the Gigabit
- * Ethernet Controller according the given parameters struct.
- *
- * INPUT:
- * ETH_PORT eth_port_num Ethernet Port number. See ETH_PORT enum.
- * ETH_WIN_PARAM *param Address decode parameter struct.
- *
- * OUTPUT:
- * An access window is opened using the given access parameters.
- *
- * RETURN:
- * None.
- *
- *******************************************************************************/
-static void eth_set_access_control (ETH_PORT eth_port_num,
- ETH_WIN_PARAM * param)
-{
- unsigned int access_prot_reg;
-
- /* Set access control register */
- access_prot_reg = MV_REG_READ (MV64360_ETH_ACCESS_PROTECTION_REG
- (eth_port_num));
- access_prot_reg &= (~(3 << (param->win * 2))); /* clear window permission */
- access_prot_reg |= (param->access_ctrl << (param->win * 2));
- MV_REG_WRITE (MV64360_ETH_ACCESS_PROTECTION_REG (eth_port_num),
- access_prot_reg);
-
- /* Set window Size reg (SR) */
- MV_REG_WRITE ((MV64360_ETH_SIZE_REG_0 +
- (ETH_SIZE_REG_GAP * param->win)),
- (((param->size / 0x10000) - 1) << 16));
-
- /* Set window Base address reg (BA) */
- MV_REG_WRITE ((MV64360_ETH_BAR_0 + (ETH_BAR_GAP * param->win)),
- (param->target | param->attributes | param->base_addr));
- /* High address remap reg (HARR) */
- if (param->win < 4)
- MV_REG_WRITE ((MV64360_ETH_HIGH_ADDR_REMAP_REG_0 +
- (ETH_HIGH_ADDR_REMAP_REG_GAP * param->win)),
- param->high_addr);
-
- /* Base address enable reg (BARER) */
- if (param->enable == 1)
- MV_RESET_REG_BITS (MV64360_ETH_BASE_ADDR_ENABLE_REG,
- (1 << param->win));
- else
- MV_SET_REG_BITS (MV64360_ETH_BASE_ADDR_ENABLE_REG,
- (1 << param->win));
-}
-
-/*******************************************************************************
- * ether_init_rx_desc_ring - Curve a Rx chain desc list and buffer in memory.
- *
- * DESCRIPTION:
- * This function prepares a Rx chained list of descriptors and packet
- * buffers in a form of a ring. The routine must be called after port
- * initialization routine and before port start routine.
- * The Ethernet SDMA engine uses CPU bus addresses to access the various
- * devices in the system (i.e. DRAM). This function uses the ethernet
- * struct 'virtual to physical' routine (set by the user) to set the ring
- * with physical addresses.
- *
- * INPUT:
- * ETH_PORT_INFO *p_eth_port_ctrl Ethernet Port Control srtuct.
- * ETH_QUEUE rx_queue Number of Rx queue.
- * int rx_desc_num Number of Rx descriptors
- * int rx_buff_size Size of Rx buffer
- * unsigned int rx_desc_base_addr Rx descriptors memory area base addr.
- * unsigned int rx_buff_base_addr Rx buffer memory area base addr.
- *
- * OUTPUT:
- * The routine updates the Ethernet port control struct with information
- * regarding the Rx descriptors and buffers.
- *
- * RETURN:
- * false if the given descriptors memory area is not aligned according to
- * Ethernet SDMA specifications.
- * true otherwise.
- *
- *******************************************************************************/
-static bool ether_init_rx_desc_ring (ETH_PORT_INFO * p_eth_port_ctrl,
- ETH_QUEUE rx_queue,
- int rx_desc_num,
- int rx_buff_size,
- unsigned int rx_desc_base_addr,
- unsigned int rx_buff_base_addr)
-{
- ETH_RX_DESC *p_rx_desc;
- ETH_RX_DESC *p_rx_prev_desc; /* pointer to link with the last descriptor */
- unsigned int buffer_addr;
- int ix; /* a counter */
-
-
- p_rx_desc = (ETH_RX_DESC *) rx_desc_base_addr;
- p_rx_prev_desc = p_rx_desc;
- buffer_addr = rx_buff_base_addr;
-
- /* Rx desc Must be 4LW aligned (i.e. Descriptor_Address[3:0]=0000). */
- if (rx_buff_base_addr & 0xF)
- return false;
-
- /* Rx buffers are limited to 64K bytes and Minimum size is 8 bytes */
- if ((rx_buff_size < 8) || (rx_buff_size > RX_BUFFER_MAX_SIZE))
- return false;
-
- /* Rx buffers must be 64-bit aligned. */
- if ((rx_buff_base_addr + rx_buff_size) & 0x7)
- return false;
-
- /* initialize the Rx descriptors ring */
- for (ix = 0; ix < rx_desc_num; ix++) {
- p_rx_desc->buf_size = rx_buff_size;
- p_rx_desc->byte_cnt = 0x0000;
- p_rx_desc->cmd_sts =
- ETH_BUFFER_OWNED_BY_DMA | ETH_RX_ENABLE_INTERRUPT;
- p_rx_desc->next_desc_ptr =
- ((unsigned int) p_rx_desc) + RX_DESC_ALIGNED_SIZE;
- p_rx_desc->buf_ptr = buffer_addr;
- p_rx_desc->return_info = 0x00000000;
- D_CACHE_FLUSH_LINE (p_rx_desc, 0);
- buffer_addr += rx_buff_size;
- p_rx_prev_desc = p_rx_desc;
- p_rx_desc = (ETH_RX_DESC *)
- ((unsigned int) p_rx_desc + RX_DESC_ALIGNED_SIZE);
- }
-
- /* Closing Rx descriptors ring */
- p_rx_prev_desc->next_desc_ptr = (rx_desc_base_addr);
- D_CACHE_FLUSH_LINE (p_rx_prev_desc, 0);
-
- /* Save Rx desc pointer to driver struct. */
- CURR_RFD_SET ((ETH_RX_DESC *) rx_desc_base_addr, rx_queue);
- USED_RFD_SET ((ETH_RX_DESC *) rx_desc_base_addr, rx_queue);
-
- p_eth_port_ctrl->p_rx_desc_area_base[rx_queue] =
- (ETH_RX_DESC *) rx_desc_base_addr;
- p_eth_port_ctrl->rx_desc_area_size[rx_queue] =
- rx_desc_num * RX_DESC_ALIGNED_SIZE;
-
- p_eth_port_ctrl->port_rx_queue_command |= (1 << rx_queue);
-
- return true;
-}
-
-/*******************************************************************************
- * ether_init_tx_desc_ring - Curve a Tx chain desc list and buffer in memory.
- *
- * DESCRIPTION:
- * This function prepares a Tx chained list of descriptors and packet
- * buffers in a form of a ring. The routine must be called after port
- * initialization routine and before port start routine.
- * The Ethernet SDMA engine uses CPU bus addresses to access the various
- * devices in the system (i.e. DRAM). This function uses the ethernet
- * struct 'virtual to physical' routine (set by the user) to set the ring
- * with physical addresses.
- *
- * INPUT:
- * ETH_PORT_INFO *p_eth_port_ctrl Ethernet Port Control srtuct.
- * ETH_QUEUE tx_queue Number of Tx queue.
- * int tx_desc_num Number of Tx descriptors
- * int tx_buff_size Size of Tx buffer
- * unsigned int tx_desc_base_addr Tx descriptors memory area base addr.
- * unsigned int tx_buff_base_addr Tx buffer memory area base addr.
- *
- * OUTPUT:
- * The routine updates the Ethernet port control struct with information
- * regarding the Tx descriptors and buffers.
- *
- * RETURN:
- * false if the given descriptors memory area is not aligned according to
- * Ethernet SDMA specifications.
- * true otherwise.
- *
- *******************************************************************************/
-static bool ether_init_tx_desc_ring (ETH_PORT_INFO * p_eth_port_ctrl,
- ETH_QUEUE tx_queue,
- int tx_desc_num,
- int tx_buff_size,
- unsigned int tx_desc_base_addr,
- unsigned int tx_buff_base_addr)
-{
-
- ETH_TX_DESC *p_tx_desc;
- ETH_TX_DESC *p_tx_prev_desc;
- unsigned int buffer_addr;
- int ix; /* a counter */
-
-
- /* save the first desc pointer to link with the last descriptor */
- p_tx_desc = (ETH_TX_DESC *) tx_desc_base_addr;
- p_tx_prev_desc = p_tx_desc;
- buffer_addr = tx_buff_base_addr;
-
- /* Tx desc Must be 4LW aligned (i.e. Descriptor_Address[3:0]=0000). */
- if (tx_buff_base_addr & 0xF)
- return false;
-
- /* Tx buffers are limited to 64K bytes and Minimum size is 8 bytes */
- if ((tx_buff_size > TX_BUFFER_MAX_SIZE)
- || (tx_buff_size < TX_BUFFER_MIN_SIZE))
- return false;
-
- /* Initialize the Tx descriptors ring */
- for (ix = 0; ix < tx_desc_num; ix++) {
- p_tx_desc->byte_cnt = 0x0000;
- p_tx_desc->l4i_chk = 0x0000;
- p_tx_desc->cmd_sts = 0x00000000;
- p_tx_desc->next_desc_ptr =
- ((unsigned int) p_tx_desc) + TX_DESC_ALIGNED_SIZE;
-
- p_tx_desc->buf_ptr = buffer_addr;
- p_tx_desc->return_info = 0x00000000;
- D_CACHE_FLUSH_LINE (p_tx_desc, 0);
- buffer_addr += tx_buff_size;
- p_tx_prev_desc = p_tx_desc;
- p_tx_desc = (ETH_TX_DESC *)
- ((unsigned int) p_tx_desc + TX_DESC_ALIGNED_SIZE);
-
- }
- /* Closing Tx descriptors ring */
- p_tx_prev_desc->next_desc_ptr = tx_desc_base_addr;
- D_CACHE_FLUSH_LINE (p_tx_prev_desc, 0);
- /* Set Tx desc pointer in driver struct. */
- CURR_TFD_SET ((ETH_TX_DESC *) tx_desc_base_addr, tx_queue);
- USED_TFD_SET ((ETH_TX_DESC *) tx_desc_base_addr, tx_queue);
-
- /* Init Tx ring base and size parameters */
- p_eth_port_ctrl->p_tx_desc_area_base[tx_queue] =
- (ETH_TX_DESC *) tx_desc_base_addr;
- p_eth_port_ctrl->tx_desc_area_size[tx_queue] =
- (tx_desc_num * TX_DESC_ALIGNED_SIZE);
-
- /* Add the queue to the list of Tx queues of this port */
- p_eth_port_ctrl->port_tx_queue_command |= (1 << tx_queue);
-
- return true;
-}
-
-/*******************************************************************************
- * eth_port_send - Send an Ethernet packet
- *
- * DESCRIPTION:
- * This routine send a given packet described by p_pktinfo parameter. It
- * supports transmitting of a packet spaned over multiple buffers. The
- * routine updates 'curr' and 'first' indexes according to the packet
- * segment passed to the routine. In case the packet segment is first,
- * the 'first' index is update. In any case, the 'curr' index is updated.
- * If the routine get into Tx resource error it assigns 'curr' index as
- * 'first'. This way the function can abort Tx process of multiple
- * descriptors per packet.
- *
- * INPUT:
- * ETH_PORT_INFO *p_eth_port_ctrl Ethernet Port Control srtuct.
- * ETH_QUEUE tx_queue Number of Tx queue.
- * PKT_INFO *p_pkt_info User packet buffer.
- *
- * OUTPUT:
- * Tx ring 'curr' and 'first' indexes are updated.
- *
- * RETURN:
- * ETH_QUEUE_FULL in case of Tx resource error.
- * ETH_ERROR in case the routine can not access Tx desc ring.
- * ETH_QUEUE_LAST_RESOURCE if the routine uses the last Tx resource.
- * ETH_OK otherwise.
- *
- *******************************************************************************/
-static ETH_FUNC_RET_STATUS eth_port_send (ETH_PORT_INFO * p_eth_port_ctrl,
- ETH_QUEUE tx_queue,
- PKT_INFO * p_pkt_info)
-{
- volatile ETH_TX_DESC *p_tx_desc_first;
- volatile ETH_TX_DESC *p_tx_desc_curr;
- volatile ETH_TX_DESC *p_tx_next_desc_curr;
- volatile ETH_TX_DESC *p_tx_desc_used;
- unsigned int command_status;
-
- /* Do not process Tx ring in case of Tx ring resource error */
- if (p_eth_port_ctrl->tx_resource_err[tx_queue] == true)
- return ETH_QUEUE_FULL;
-
- /* Get the Tx Desc ring indexes */
- CURR_TFD_GET (p_tx_desc_curr, tx_queue);
- USED_TFD_GET (p_tx_desc_used, tx_queue);
-
- if (p_tx_desc_curr == NULL)
- return ETH_ERROR;
-
- /* The following parameters are used to save readings from memory */
- p_tx_next_desc_curr = TX_NEXT_DESC_PTR (p_tx_desc_curr, tx_queue);
- command_status = p_pkt_info->cmd_sts | ETH_ZERO_PADDING | ETH_GEN_CRC;
-
- if (command_status & (ETH_TX_FIRST_DESC)) {
- /* Update first desc */
- FIRST_TFD_SET (p_tx_desc_curr, tx_queue);
- p_tx_desc_first = p_tx_desc_curr;
- } else {
- FIRST_TFD_GET (p_tx_desc_first, tx_queue);
- command_status |= ETH_BUFFER_OWNED_BY_DMA;
- }
-
- /* Buffers with a payload smaller than 8 bytes must be aligned to 64-bit */
- /* boundary. We use the memory allocated for Tx descriptor. This memory */
- /* located in TX_BUF_OFFSET_IN_DESC offset within the Tx descriptor. */
- if (p_pkt_info->byte_cnt <= 8) {
- printf ("You have failed in the < 8 bytes errata - fixme\n"); /* RABEEH - TBD */
- return ETH_ERROR;
-
- p_tx_desc_curr->buf_ptr =
- (unsigned int) p_tx_desc_curr + TX_BUF_OFFSET_IN_DESC;
- eth_b_copy (p_pkt_info->buf_ptr, p_tx_desc_curr->buf_ptr,
- p_pkt_info->byte_cnt);
- } else
- p_tx_desc_curr->buf_ptr = p_pkt_info->buf_ptr;
-
- p_tx_desc_curr->byte_cnt = p_pkt_info->byte_cnt;
- p_tx_desc_curr->return_info = p_pkt_info->return_info;
-
- if (p_pkt_info->cmd_sts & (ETH_TX_LAST_DESC)) {
- /* Set last desc with DMA ownership and interrupt enable. */
- p_tx_desc_curr->cmd_sts = command_status |
- ETH_BUFFER_OWNED_BY_DMA | ETH_TX_ENABLE_INTERRUPT;
-
- if (p_tx_desc_curr != p_tx_desc_first)
- p_tx_desc_first->cmd_sts |= ETH_BUFFER_OWNED_BY_DMA;
-
- /* Flush CPU pipe */
-
- D_CACHE_FLUSH_LINE ((unsigned int) p_tx_desc_curr, 0);
- D_CACHE_FLUSH_LINE ((unsigned int) p_tx_desc_first, 0);
- CPU_PIPE_FLUSH;
-
- /* Apply send command */
- ETH_ENABLE_TX_QUEUE (tx_queue, p_eth_port_ctrl->port_num);
-
- /* Finish Tx packet. Update first desc in case of Tx resource error */
- p_tx_desc_first = p_tx_next_desc_curr;
- FIRST_TFD_SET (p_tx_desc_first, tx_queue);
-
- } else {
- p_tx_desc_curr->cmd_sts = command_status;
- D_CACHE_FLUSH_LINE ((unsigned int) p_tx_desc_curr, 0);
- }
-
- /* Check for ring index overlap in the Tx desc ring */
- if (p_tx_next_desc_curr == p_tx_desc_used) {
- /* Update the current descriptor */
- CURR_TFD_SET (p_tx_desc_first, tx_queue);
-
- p_eth_port_ctrl->tx_resource_err[tx_queue] = true;
- return ETH_QUEUE_LAST_RESOURCE;
- } else {
- /* Update the current descriptor */
- CURR_TFD_SET (p_tx_next_desc_curr, tx_queue);
- return ETH_OK;
- }
-}
-
-/*******************************************************************************
- * eth_tx_return_desc - Free all used Tx descriptors
- *
- * DESCRIPTION:
- * This routine returns the transmitted packet information to the caller.
- * It uses the 'first' index to support Tx desc return in case a transmit
- * of a packet spanned over multiple buffer still in process.
- * In case the Tx queue was in "resource error" condition, where there are
- * no available Tx resources, the function resets the resource error flag.
- *
- * INPUT:
- * ETH_PORT_INFO *p_eth_port_ctrl Ethernet Port Control srtuct.
- * ETH_QUEUE tx_queue Number of Tx queue.
- * PKT_INFO *p_pkt_info User packet buffer.
- *
- * OUTPUT:
- * Tx ring 'first' and 'used' indexes are updated.
- *
- * RETURN:
- * ETH_ERROR in case the routine can not access Tx desc ring.
- * ETH_RETRY in case there is transmission in process.
- * ETH_END_OF_JOB if the routine has nothing to release.
- * ETH_OK otherwise.
- *
- *******************************************************************************/
-static ETH_FUNC_RET_STATUS eth_tx_return_desc (ETH_PORT_INFO *
- p_eth_port_ctrl,
- ETH_QUEUE tx_queue,
- PKT_INFO * p_pkt_info)
-{
- volatile ETH_TX_DESC *p_tx_desc_used = NULL;
- volatile ETH_TX_DESC *p_tx_desc_first = NULL;
- unsigned int command_status;
-
-
- /* Get the Tx Desc ring indexes */
- USED_TFD_GET (p_tx_desc_used, tx_queue);
- FIRST_TFD_GET (p_tx_desc_first, tx_queue);
-
-
- /* Sanity check */
- if (p_tx_desc_used == NULL)
- return ETH_ERROR;
-
- command_status = p_tx_desc_used->cmd_sts;
-
- /* Still transmitting... */
- if (command_status & (ETH_BUFFER_OWNED_BY_DMA)) {
- D_CACHE_FLUSH_LINE ((unsigned int) p_tx_desc_used, 0);
- return ETH_RETRY;
- }
-
- /* Stop release. About to overlap the current available Tx descriptor */
- if ((p_tx_desc_used == p_tx_desc_first) &&
- (p_eth_port_ctrl->tx_resource_err[tx_queue] == false)) {
- D_CACHE_FLUSH_LINE ((unsigned int) p_tx_desc_used, 0);
- return ETH_END_OF_JOB;
- }
-
- /* Pass the packet information to the caller */
- p_pkt_info->cmd_sts = command_status;
- p_pkt_info->return_info = p_tx_desc_used->return_info;
- p_tx_desc_used->return_info = 0;
-
- /* Update the next descriptor to release. */
- USED_TFD_SET (TX_NEXT_DESC_PTR (p_tx_desc_used, tx_queue), tx_queue);
-
- /* Any Tx return cancels the Tx resource error status */
- if (p_eth_port_ctrl->tx_resource_err[tx_queue] == true)
- p_eth_port_ctrl->tx_resource_err[tx_queue] = false;
-
- D_CACHE_FLUSH_LINE ((unsigned int) p_tx_desc_used, 0);
-
- return ETH_OK;
-
-}
-
-/*******************************************************************************
- * eth_port_receive - Get received information from Rx ring.
- *
- * DESCRIPTION:
- * This routine returns the received data to the caller. There is no
- * data copying during routine operation. All information is returned
- * using pointer to packet information struct passed from the caller.
- * If the routine exhausts Rx ring resources then the resource error flag
- * is set.
- *
- * INPUT:
- * ETH_PORT_INFO *p_eth_port_ctrl Ethernet Port Control srtuct.
- * ETH_QUEUE rx_queue Number of Rx queue.
- * PKT_INFO *p_pkt_info User packet buffer.
- *
- * OUTPUT:
- * Rx ring current and used indexes are updated.
- *
- * RETURN:
- * ETH_ERROR in case the routine can not access Rx desc ring.
- * ETH_QUEUE_FULL if Rx ring resources are exhausted.
- * ETH_END_OF_JOB if there is no received data.
- * ETH_OK otherwise.
- *
- *******************************************************************************/
-static ETH_FUNC_RET_STATUS eth_port_receive (ETH_PORT_INFO * p_eth_port_ctrl,
- ETH_QUEUE rx_queue,
- PKT_INFO * p_pkt_info)
-{
- volatile ETH_RX_DESC *p_rx_curr_desc;
- volatile ETH_RX_DESC *p_rx_next_curr_desc;
- volatile ETH_RX_DESC *p_rx_used_desc;
- unsigned int command_status;
-
- /* Do not process Rx ring in case of Rx ring resource error */
- if (p_eth_port_ctrl->rx_resource_err[rx_queue] == true) {
- printf ("\nRx Queue is full ...\n");
- return ETH_QUEUE_FULL;
- }
-
- /* Get the Rx Desc ring 'curr and 'used' indexes */
- CURR_RFD_GET (p_rx_curr_desc, rx_queue);
- USED_RFD_GET (p_rx_used_desc, rx_queue);
-
- /* Sanity check */
- if (p_rx_curr_desc == NULL)
- return ETH_ERROR;
-
- /* The following parameters are used to save readings from memory */
- p_rx_next_curr_desc = RX_NEXT_DESC_PTR (p_rx_curr_desc, rx_queue);
- command_status = p_rx_curr_desc->cmd_sts;
-
- /* Nothing to receive... */
- if (command_status & (ETH_BUFFER_OWNED_BY_DMA)) {
-/* DP(printf("Rx: command_status: %08x\n", command_status)); */
- D_CACHE_FLUSH_LINE ((unsigned int) p_rx_curr_desc, 0);
-/* DP(printf("\nETH_END_OF_JOB ...\n"));*/
- return ETH_END_OF_JOB;
- }
-
- p_pkt_info->byte_cnt = (p_rx_curr_desc->byte_cnt) - RX_BUF_OFFSET;
- p_pkt_info->cmd_sts = command_status;
- p_pkt_info->buf_ptr = (p_rx_curr_desc->buf_ptr) + RX_BUF_OFFSET;
- p_pkt_info->return_info = p_rx_curr_desc->return_info;
- p_pkt_info->l4i_chk = p_rx_curr_desc->buf_size; /* IP fragment indicator */
-
- /* Clean the return info field to indicate that the packet has been */
- /* moved to the upper layers */
- p_rx_curr_desc->return_info = 0;
-
- /* Update 'curr' in data structure */
- CURR_RFD_SET (p_rx_next_curr_desc, rx_queue);
-
- /* Rx descriptors resource exhausted. Set the Rx ring resource error flag */
- if (p_rx_next_curr_desc == p_rx_used_desc)
- p_eth_port_ctrl->rx_resource_err[rx_queue] = true;
-
- D_CACHE_FLUSH_LINE ((unsigned int) p_rx_curr_desc, 0);
- CPU_PIPE_FLUSH;
- return ETH_OK;
-}
-
-/*******************************************************************************
- * eth_rx_return_buff - Returns a Rx buffer back to the Rx ring.
- *
- * DESCRIPTION:
- * This routine returns a Rx buffer back to the Rx ring. It retrieves the
- * next 'used' descriptor and attached the returned buffer to it.
- * In case the Rx ring was in "resource error" condition, where there are
- * no available Rx resources, the function resets the resource error flag.
- *
- * INPUT:
- * ETH_PORT_INFO *p_eth_port_ctrl Ethernet Port Control srtuct.
- * ETH_QUEUE rx_queue Number of Rx queue.
- * PKT_INFO *p_pkt_info Information on the returned buffer.
- *
- * OUTPUT:
- * New available Rx resource in Rx descriptor ring.
- *
- * RETURN:
- * ETH_ERROR in case the routine can not access Rx desc ring.
- * ETH_OK otherwise.
- *
- *******************************************************************************/
-static ETH_FUNC_RET_STATUS eth_rx_return_buff (ETH_PORT_INFO *
- p_eth_port_ctrl,
- ETH_QUEUE rx_queue,
- PKT_INFO * p_pkt_info)
-{
- volatile ETH_RX_DESC *p_used_rx_desc; /* Where to return Rx resource */
-
- /* Get 'used' Rx descriptor */
- USED_RFD_GET (p_used_rx_desc, rx_queue);
-
- /* Sanity check */
- if (p_used_rx_desc == NULL)
- return ETH_ERROR;
-
- p_used_rx_desc->buf_ptr = p_pkt_info->buf_ptr;
- p_used_rx_desc->return_info = p_pkt_info->return_info;
- p_used_rx_desc->byte_cnt = p_pkt_info->byte_cnt;
- p_used_rx_desc->buf_size = MV64360_RX_BUFFER_SIZE; /* Reset Buffer size */
-
- /* Flush the write pipe */
- CPU_PIPE_FLUSH;
-
- /* Return the descriptor to DMA ownership */
- p_used_rx_desc->cmd_sts =
- ETH_BUFFER_OWNED_BY_DMA | ETH_RX_ENABLE_INTERRUPT;
-
- /* Flush descriptor and CPU pipe */
- D_CACHE_FLUSH_LINE ((unsigned int) p_used_rx_desc, 0);
- CPU_PIPE_FLUSH;
-
- /* Move the used descriptor pointer to the next descriptor */
- USED_RFD_SET (RX_NEXT_DESC_PTR (p_used_rx_desc, rx_queue), rx_queue);
-
- /* Any Rx return cancels the Rx resource error status */
- if (p_eth_port_ctrl->rx_resource_err[rx_queue] == true)
- p_eth_port_ctrl->rx_resource_err[rx_queue] = false;
-
- return ETH_OK;
-}
-
-/*******************************************************************************
- * eth_port_set_rx_coal - Sets coalescing interrupt mechanism on RX path
- *
- * DESCRIPTION:
- * This routine sets the RX coalescing interrupt mechanism parameter.
- * This parameter is a timeout counter, that counts in 64 t_clk
- * chunks ; that when timeout event occurs a maskable interrupt
- * occurs.
- * The parameter is calculated using the tClk of the MV-643xx chip
- * , and the required delay of the interrupt in usec.
- *
- * INPUT:
- * ETH_PORT eth_port_num Ethernet port number
- * unsigned int t_clk t_clk of the MV-643xx chip in HZ units
- * unsigned int delay Delay in usec
- *
- * OUTPUT:
- * Interrupt coalescing mechanism value is set in MV-643xx chip.
- *
- * RETURN:
- * The interrupt coalescing value set in the gigE port.
- *
- *******************************************************************************/
-#if 0 /* FIXME */
-static unsigned int eth_port_set_rx_coal (ETH_PORT eth_port_num,
- unsigned int t_clk,
- unsigned int delay)
-{
- unsigned int coal;
-
- coal = ((t_clk / 1000000) * delay) / 64;
- /* Set RX Coalescing mechanism */
- MV_REG_WRITE (MV64360_ETH_SDMA_CONFIG_REG (eth_port_num),
- ((coal & 0x3fff) << 8) |
- (MV_REG_READ
- (MV64360_ETH_SDMA_CONFIG_REG (eth_port_num))
- & 0xffc000ff));
- return coal;
-}
-
-#endif
-/*******************************************************************************
- * eth_port_set_tx_coal - Sets coalescing interrupt mechanism on TX path
- *
- * DESCRIPTION:
- * This routine sets the TX coalescing interrupt mechanism parameter.
- * This parameter is a timeout counter, that counts in 64 t_clk
- * chunks ; that when timeout event occurs a maskable interrupt
- * occurs.
- * The parameter is calculated using the t_cLK frequency of the
- * MV-643xx chip and the required delay in the interrupt in uSec
- *
- * INPUT:
- * ETH_PORT eth_port_num Ethernet port number
- * unsigned int t_clk t_clk of the MV-643xx chip in HZ units
- * unsigned int delay Delay in uSeconds
- *
- * OUTPUT:
- * Interrupt coalescing mechanism value is set in MV-643xx chip.
- *
- * RETURN:
- * The interrupt coalescing value set in the gigE port.
- *
- *******************************************************************************/
-#if 0 /* FIXME */
-static unsigned int eth_port_set_tx_coal (ETH_PORT eth_port_num,
- unsigned int t_clk,
- unsigned int delay)
-{
- unsigned int coal;
-
- coal = ((t_clk / 1000000) * delay) / 64;
- /* Set TX Coalescing mechanism */
- MV_REG_WRITE (MV64360_ETH_TX_FIFO_URGENT_THRESHOLD_REG (eth_port_num),
- coal << 4);
- return coal;
-}
-#endif
-
-/*******************************************************************************
- * eth_b_copy - Copy bytes from source to destination
- *
- * DESCRIPTION:
- * This function supports the eight bytes limitation on Tx buffer size.
- * The routine will zero eight bytes starting from the destination address
- * followed by copying bytes from the source address to the destination.
- *
- * INPUT:
- * unsigned int src_addr 32 bit source address.
- * unsigned int dst_addr 32 bit destination address.
- * int byte_count Number of bytes to copy.
- *
- * OUTPUT:
- * See description.
- *
- * RETURN:
- * None.
- *
- *******************************************************************************/
-static void eth_b_copy (unsigned int src_addr, unsigned int dst_addr,
- int byte_count)
-{
- /* Zero the dst_addr area */
- *(unsigned int *) dst_addr = 0x0;
-
- while (byte_count != 0) {
- *(char *) dst_addr = *(char *) src_addr;
- dst_addr++;
- src_addr++;
- byte_count--;
- }
-}
diff --git a/board/esd/cpci750/mv_eth.h b/board/esd/cpci750/mv_eth.h
deleted file mode 100644
index c57e6796cc..0000000000
--- a/board/esd/cpci750/mv_eth.h
+++ /dev/null
@@ -1,844 +0,0 @@
-/*
- * (C) Copyright 2003
- * Ingo Assmus <ingo.assmus@keymile.com>
- *
- * based on - Driver for MV64360X ethernet ports
- * Copyright (C) 2002 rabeeh@galileo.co.il
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * mv_eth.h - header file for the polled mode GT ethernet driver
- */
-
-#ifndef __DB64360_ETH_H__
-#define __DB64360_ETH_H__
-
-#include <asm/types.h>
-#include <asm/io.h>
-#include <asm/byteorder.h>
-#include <common.h>
-#include <net.h>
-#include "mv_regs.h"
-#include "../../Marvell/common/ppc_error_no.h"
-
-
-/*************************************************************************
-**************************************************************************
-**************************************************************************
-* The first part is the high level driver of the gigE ethernet ports. *
-**************************************************************************
-**************************************************************************
-*************************************************************************/
-#ifndef TRUE
-#define TRUE 1
-#endif
-#ifndef FALSE
-#define FALSE 0
-#endif
-
-/* In case not using SG on Tx, define MAX_SKB_FRAGS as 0 */
-#ifndef MAX_SKB_FRAGS
-#define MAX_SKB_FRAGS 0
-#endif
-
-/* Port attributes */
-/*#define MAX_RX_QUEUE_NUM 8*/
-/*#define MAX_TX_QUEUE_NUM 8*/
-#define MAX_RX_QUEUE_NUM 1
-#define MAX_TX_QUEUE_NUM 1
-
-
-/* Use one TX queue and one RX queue */
-#define MV64360_TX_QUEUE_NUM 1
-#define MV64360_RX_QUEUE_NUM 1
-
-/*
- * Number of RX / TX descriptors on RX / TX rings.
- * Note that allocating RX descriptors is done by allocating the RX
- * ring AND a preallocated RX buffers (skb's) for each descriptor.
- * The TX descriptors only allocates the TX descriptors ring,
- * with no pre allocated TX buffers (skb's are allocated by higher layers.
- */
-
-/* Default TX ring size is 10 descriptors */
-#ifdef CONFIG_MV64360_ETH_TXQUEUE_SIZE
-#define MV64360_TX_QUEUE_SIZE CONFIG_MV64360_ETH_TXQUEUE_SIZE
-#else
-#define MV64360_TX_QUEUE_SIZE 4
-#endif
-
-/* Default RX ring size is 4 descriptors */
-#ifdef CONFIG_MV64360_ETH_RXQUEUE_SIZE
-#define MV64360_RX_QUEUE_SIZE CONFIG_MV64360_ETH_RXQUEUE_SIZE
-#else
-#define MV64360_RX_QUEUE_SIZE 4
-#endif
-
-#ifdef CONFIG_RX_BUFFER_SIZE
-#define MV64360_RX_BUFFER_SIZE CONFIG_RX_BUFFER_SIZE
-#else
-#define MV64360_RX_BUFFER_SIZE 1600
-#endif
-
-#ifdef CONFIG_TX_BUFFER_SIZE
-#define MV64360_TX_BUFFER_SIZE CONFIG_TX_BUFFER_SIZE
-#else
-#define MV64360_TX_BUFFER_SIZE 1600
-#endif
-
-
-/*
- * Network device statistics. Akin to the 2.0 ether stats but
- * with byte counters.
- */
-
-struct net_device_stats
-{
- unsigned long rx_packets; /* total packets received */
- unsigned long tx_packets; /* total packets transmitted */
- unsigned long rx_bytes; /* total bytes received */
- unsigned long tx_bytes; /* total bytes transmitted */
- unsigned long rx_errors; /* bad packets received */
- unsigned long tx_errors; /* packet transmit problems */
- unsigned long rx_dropped; /* no space in linux buffers */
- unsigned long tx_dropped; /* no space available in linux */
- unsigned long multicast; /* multicast packets received */
- unsigned long collisions;
-
- /* detailed rx_errors: */
- unsigned long rx_length_errors;
- unsigned long rx_over_errors; /* receiver ring buff overflow */
- unsigned long rx_crc_errors; /* recved pkt with crc error */
- unsigned long rx_frame_errors; /* recv'd frame alignment error */
- unsigned long rx_fifo_errors; /* recv'r fifo overrun */
- unsigned long rx_missed_errors; /* receiver missed packet */
-
- /* detailed tx_errors */
- unsigned long tx_aborted_errors;
- unsigned long tx_carrier_errors;
- unsigned long tx_fifo_errors;
- unsigned long tx_heartbeat_errors;
- unsigned long tx_window_errors;
-
- /* for cslip etc */
- unsigned long rx_compressed;
- unsigned long tx_compressed;
-};
-
-
-/* Private data structure used for ethernet device */
-struct mv64360_eth_priv {
- unsigned int port_num;
- struct net_device_stats *stats;
-
-/* to buffer area aligned */
- char * p_eth_tx_buffer[MV64360_TX_QUEUE_SIZE+1]; /*pointers to alligned tx buffs in memory space */
- char * p_eth_rx_buffer[MV64360_RX_QUEUE_SIZE+1]; /*pointers to allinged rx buffs in memory space */
-
- /* Size of Tx Ring per queue */
- unsigned int tx_ring_size [MAX_TX_QUEUE_NUM];
-
-
- /* Size of Rx Ring per queue */
- unsigned int rx_ring_size [MAX_RX_QUEUE_NUM];
-
- /* Magic Number for Ethernet running */
- unsigned int eth_running;
-
-};
-
-
-int mv64360_eth_init (struct eth_device *dev);
-int mv64360_eth_stop (struct eth_device *dev);
-int mv64360_eth_start_xmit (struct eth_device*, volatile void* packet, int length);
-/* return db64360_eth0_poll(); */
-
-int mv64360_eth_open (struct eth_device *dev);
-
-
-/*************************************************************************
-**************************************************************************
-**************************************************************************
-* The second part is the low level driver of the gigE ethernet ports. *
-**************************************************************************
-**************************************************************************
-*************************************************************************/
-
-
-/********************************************************************************
- * Header File for : MV-643xx network interface header
- *
- * DESCRIPTION:
- * This header file contains macros typedefs and function declaration for
- * the Marvell Gig Bit Ethernet Controller.
- *
- * DEPENDENCIES:
- * None.
- *
- *******************************************************************************/
-
-
-#ifdef CONFIG_SPECIAL_CONSISTENT_MEMORY
-#ifdef CONFIG_MV64360_SRAM_CACHEABLE
-/* In case SRAM is cacheable but not cache coherent */
-#define D_CACHE_FLUSH_LINE(addr, offset) \
-{ \
- __asm__ __volatile__ ("dcbf %0,%1" : : "r" (addr), "r" (offset)); \
-}
-#else
-/* In case SRAM is cache coherent or non-cacheable */
-#define D_CACHE_FLUSH_LINE(addr, offset) ;
-#endif
-#else
-#ifdef CONFIG_NOT_COHERENT_CACHE
-/* In case of descriptors on DDR but not cache coherent */
-#define D_CACHE_FLUSH_LINE(addr, offset) \
-{ \
- __asm__ __volatile__ ("dcbf %0,%1" : : "r" (addr), "r" (offset)); \
-}
-#else
-/* In case of descriptors on DDR and cache coherent */
-#define D_CACHE_FLUSH_LINE(addr, offset) ;
-#endif /* CONFIG_NOT_COHERENT_CACHE */
-#endif /* CONFIG_SPECIAL_CONSISTENT_MEMORY */
-
-
-#define CPU_PIPE_FLUSH \
-{ \
- __asm__ __volatile__ ("eieio"); \
-}
-
-
-/* defines */
-
-/* Default port configuration value */
-#define PORT_CONFIG_VALUE \
- ETH_UNICAST_NORMAL_MODE | \
- ETH_DEFAULT_RX_QUEUE_0 | \
- ETH_DEFAULT_RX_ARP_QUEUE_0 | \
- ETH_RECEIVE_BC_IF_NOT_IP_OR_ARP | \
- ETH_RECEIVE_BC_IF_IP | \
- ETH_RECEIVE_BC_IF_ARP | \
- ETH_CAPTURE_TCP_FRAMES_DIS | \
- ETH_CAPTURE_UDP_FRAMES_DIS | \
- ETH_DEFAULT_RX_TCP_QUEUE_0 | \
- ETH_DEFAULT_RX_UDP_QUEUE_0 | \
- ETH_DEFAULT_RX_BPDU_QUEUE_0
-
-/* Default port extend configuration value */
-#define PORT_CONFIG_EXTEND_VALUE \
- ETH_SPAN_BPDU_PACKETS_AS_NORMAL | \
- ETH_PARTITION_DISABLE
-
-
-/* Default sdma control value */
-#ifdef CONFIG_NOT_COHERENT_CACHE
-#define PORT_SDMA_CONFIG_VALUE \
- ETH_RX_BURST_SIZE_16_64BIT | \
- GT_ETH_IPG_INT_RX(0) | \
- ETH_TX_BURST_SIZE_16_64BIT;
-#else
-#define PORT_SDMA_CONFIG_VALUE \
- ETH_RX_BURST_SIZE_4_64BIT | \
- GT_ETH_IPG_INT_RX(0) | \
- ETH_TX_BURST_SIZE_4_64BIT;
-#endif
-
-#define GT_ETH_IPG_INT_RX(value) \
- ((value & 0x3fff) << 8)
-
-/* Default port serial control value */
-#define PORT_SERIAL_CONTROL_VALUE \
- ETH_FORCE_LINK_PASS | \
- ETH_ENABLE_AUTO_NEG_FOR_DUPLX | \
- ETH_DISABLE_AUTO_NEG_FOR_FLOW_CTRL | \
- ETH_ADV_SYMMETRIC_FLOW_CTRL | \
- ETH_FORCE_FC_MODE_NO_PAUSE_DIS_TX | \
- ETH_FORCE_BP_MODE_NO_JAM | \
- BIT9 | \
- ETH_DO_NOT_FORCE_LINK_FAIL | \
- ETH_RETRANSMIT_16_ETTEMPTS | \
- ETH_ENABLE_AUTO_NEG_SPEED_GMII | \
- ETH_DTE_ADV_0 | \
- ETH_DISABLE_AUTO_NEG_BYPASS | \
- ETH_AUTO_NEG_NO_CHANGE | \
- ETH_MAX_RX_PACKET_1552BYTE | \
- ETH_CLR_EXT_LOOPBACK | \
- ETH_SET_FULL_DUPLEX_MODE | \
- ETH_ENABLE_FLOW_CTRL_TX_RX_IN_FULL_DUPLEX;
-
-#define RX_BUFFER_MAX_SIZE 0xFFFF
-#define TX_BUFFER_MAX_SIZE 0xFFFF /* Buffer are limited to 64k */
-
-#define RX_BUFFER_MIN_SIZE 0x8
-#define TX_BUFFER_MIN_SIZE 0x8
-
-/* Tx WRR confoguration macros */
-#define PORT_MAX_TRAN_UNIT 0x24 /* MTU register (default) 9KByte */
-#define PORT_MAX_TOKEN_BUCKET_SIZE 0x_fFFF /* PMTBS register (default) */
-#define PORT_TOKEN_RATE 1023 /* PTTBRC register (default) */
-
-/* MAC accepet/reject macros */
-#define ACCEPT_MAC_ADDR 0
-#define REJECT_MAC_ADDR 1
-
-/* Size of a Tx/Rx descriptor used in chain list data structure */
-#define RX_DESC_ALIGNED_SIZE 0x20
-#define TX_DESC_ALIGNED_SIZE 0x20
-
-/* An offest in Tx descriptors to store data for buffers less than 8 Bytes */
-#define TX_BUF_OFFSET_IN_DESC 0x18
-/* Buffer offset from buffer pointer */
-#define RX_BUF_OFFSET 0x2
-
-/* Gap define */
-#define ETH_BAR_GAP 0x8
-#define ETH_SIZE_REG_GAP 0x8
-#define ETH_HIGH_ADDR_REMAP_REG_GAP 0x4
-#define ETH_PORT_ACCESS_CTRL_GAP 0x4
-
-/* Gigabit Ethernet Unit Global Registers */
-
-/* MIB Counters register definitions */
-#define ETH_MIB_GOOD_OCTETS_RECEIVED_LOW 0x0
-#define ETH_MIB_GOOD_OCTETS_RECEIVED_HIGH 0x4
-#define ETH_MIB_BAD_OCTETS_RECEIVED 0x8
-#define ETH_MIB_INTERNAL_MAC_TRANSMIT_ERR 0xc
-#define ETH_MIB_GOOD_FRAMES_RECEIVED 0x10
-#define ETH_MIB_BAD_FRAMES_RECEIVED 0x14
-#define ETH_MIB_BROADCAST_FRAMES_RECEIVED 0x18
-#define ETH_MIB_MULTICAST_FRAMES_RECEIVED 0x1c
-#define ETH_MIB_FRAMES_64_OCTETS 0x20
-#define ETH_MIB_FRAMES_65_TO_127_OCTETS 0x24
-#define ETH_MIB_FRAMES_128_TO_255_OCTETS 0x28
-#define ETH_MIB_FRAMES_256_TO_511_OCTETS 0x2c
-#define ETH_MIB_FRAMES_512_TO_1023_OCTETS 0x30
-#define ETH_MIB_FRAMES_1024_TO_MAX_OCTETS 0x34
-#define ETH_MIB_GOOD_OCTETS_SENT_LOW 0x38
-#define ETH_MIB_GOOD_OCTETS_SENT_HIGH 0x3c
-#define ETH_MIB_GOOD_FRAMES_SENT 0x40
-#define ETH_MIB_EXCESSIVE_COLLISION 0x44
-#define ETH_MIB_MULTICAST_FRAMES_SENT 0x48
-#define ETH_MIB_BROADCAST_FRAMES_SENT 0x4c
-#define ETH_MIB_UNREC_MAC_CONTROL_RECEIVED 0x50
-#define ETH_MIB_FC_SENT 0x54
-#define ETH_MIB_GOOD_FC_RECEIVED 0x58
-#define ETH_MIB_BAD_FC_RECEIVED 0x5c
-#define ETH_MIB_UNDERSIZE_RECEIVED 0x60
-#define ETH_MIB_FRAGMENTS_RECEIVED 0x64
-#define ETH_MIB_OVERSIZE_RECEIVED 0x68
-#define ETH_MIB_JABBER_RECEIVED 0x6c
-#define ETH_MIB_MAC_RECEIVE_ERROR 0x70
-#define ETH_MIB_BAD_CRC_EVENT 0x74
-#define ETH_MIB_COLLISION 0x78
-#define ETH_MIB_LATE_COLLISION 0x7c
-
-/* Port serial status reg (PSR) */
-#define ETH_INTERFACE_GMII_MII 0
-#define ETH_INTERFACE_PCM BIT0
-#define ETH_LINK_IS_DOWN 0
-#define ETH_LINK_IS_UP BIT1
-#define ETH_PORT_AT_HALF_DUPLEX 0
-#define ETH_PORT_AT_FULL_DUPLEX BIT2
-#define ETH_RX_FLOW_CTRL_DISABLED 0
-#define ETH_RX_FLOW_CTRL_ENBALED BIT3
-#define ETH_GMII_SPEED_100_10 0
-#define ETH_GMII_SPEED_1000 BIT4
-#define ETH_MII_SPEED_10 0
-#define ETH_MII_SPEED_100 BIT5
-#define ETH_NO_TX 0
-#define ETH_TX_IN_PROGRESS BIT7
-#define ETH_BYPASS_NO_ACTIVE 0
-#define ETH_BYPASS_ACTIVE BIT8
-#define ETH_PORT_NOT_AT_PARTITION_STATE 0
-#define ETH_PORT_AT_PARTITION_STATE BIT9
-#define ETH_PORT_TX_FIFO_NOT_EMPTY 0
-#define ETH_PORT_TX_FIFO_EMPTY BIT10
-
-
-/* These macros describes the Port configuration reg (Px_cR) bits */
-#define ETH_UNICAST_NORMAL_MODE 0
-#define ETH_UNICAST_PROMISCUOUS_MODE BIT0
-#define ETH_DEFAULT_RX_QUEUE_0 0
-#define ETH_DEFAULT_RX_QUEUE_1 BIT1
-#define ETH_DEFAULT_RX_QUEUE_2 BIT2
-#define ETH_DEFAULT_RX_QUEUE_3 (BIT2 | BIT1)
-#define ETH_DEFAULT_RX_QUEUE_4 BIT3
-#define ETH_DEFAULT_RX_QUEUE_5 (BIT3 | BIT1)
-#define ETH_DEFAULT_RX_QUEUE_6 (BIT3 | BIT2)
-#define ETH_DEFAULT_RX_QUEUE_7 (BIT3 | BIT2 | BIT1)
-#define ETH_DEFAULT_RX_ARP_QUEUE_0 0
-#define ETH_DEFAULT_RX_ARP_QUEUE_1 BIT4
-#define ETH_DEFAULT_RX_ARP_QUEUE_2 BIT5
-#define ETH_DEFAULT_RX_ARP_QUEUE_3 (BIT5 | BIT4)
-#define ETH_DEFAULT_RX_ARP_QUEUE_4 BIT6
-#define ETH_DEFAULT_RX_ARP_QUEUE_5 (BIT6 | BIT4)
-#define ETH_DEFAULT_RX_ARP_QUEUE_6 (BIT6 | BIT5)
-#define ETH_DEFAULT_RX_ARP_QUEUE_7 (BIT6 | BIT5 | BIT4)
-#define ETH_RECEIVE_BC_IF_NOT_IP_OR_ARP 0
-#define ETH_REJECT_BC_IF_NOT_IP_OR_ARP BIT7
-#define ETH_RECEIVE_BC_IF_IP 0
-#define ETH_REJECT_BC_IF_IP BIT8
-#define ETH_RECEIVE_BC_IF_ARP 0
-#define ETH_REJECT_BC_IF_ARP BIT9
-#define ETH_TX_AM_NO_UPDATE_ERROR_SUMMARY BIT12
-#define ETH_CAPTURE_TCP_FRAMES_DIS 0
-#define ETH_CAPTURE_TCP_FRAMES_EN BIT14
-#define ETH_CAPTURE_UDP_FRAMES_DIS 0
-#define ETH_CAPTURE_UDP_FRAMES_EN BIT15
-#define ETH_DEFAULT_RX_TCP_QUEUE_0 0
-#define ETH_DEFAULT_RX_TCP_QUEUE_1 BIT16
-#define ETH_DEFAULT_RX_TCP_QUEUE_2 BIT17
-#define ETH_DEFAULT_RX_TCP_QUEUE_3 (BIT17 | BIT16)
-#define ETH_DEFAULT_RX_TCP_QUEUE_4 BIT18
-#define ETH_DEFAULT_RX_TCP_QUEUE_5 (BIT18 | BIT16)
-#define ETH_DEFAULT_RX_TCP_QUEUE_6 (BIT18 | BIT17)
-#define ETH_DEFAULT_RX_TCP_QUEUE_7 (BIT18 | BIT17 | BIT16)
-#define ETH_DEFAULT_RX_UDP_QUEUE_0 0
-#define ETH_DEFAULT_RX_UDP_QUEUE_1 BIT19
-#define ETH_DEFAULT_RX_UDP_QUEUE_2 BIT20
-#define ETH_DEFAULT_RX_UDP_QUEUE_3 (BIT20 | BIT19)
-#define ETH_DEFAULT_RX_UDP_QUEUE_4 (BIT21
-#define ETH_DEFAULT_RX_UDP_QUEUE_5 (BIT21 | BIT19)
-#define ETH_DEFAULT_RX_UDP_QUEUE_6 (BIT21 | BIT20)
-#define ETH_DEFAULT_RX_UDP_QUEUE_7 (BIT21 | BIT20 | BIT19)
-#define ETH_DEFAULT_RX_BPDU_QUEUE_0 0
-#define ETH_DEFAULT_RX_BPDU_QUEUE_1 BIT22
-#define ETH_DEFAULT_RX_BPDU_QUEUE_2 BIT23
-#define ETH_DEFAULT_RX_BPDU_QUEUE_3 (BIT23 | BIT22)
-#define ETH_DEFAULT_RX_BPDU_QUEUE_4 BIT24
-#define ETH_DEFAULT_RX_BPDU_QUEUE_5 (BIT24 | BIT22)
-#define ETH_DEFAULT_RX_BPDU_QUEUE_6 (BIT24 | BIT23)
-#define ETH_DEFAULT_RX_BPDU_QUEUE_7 (BIT24 | BIT23 | BIT22)
-
-
-/* These macros describes the Port configuration extend reg (Px_cXR) bits*/
-#define ETH_CLASSIFY_EN BIT0
-#define ETH_SPAN_BPDU_PACKETS_AS_NORMAL 0
-#define ETH_SPAN_BPDU_PACKETS_TO_RX_QUEUE_7 BIT1
-#define ETH_PARTITION_DISABLE 0
-#define ETH_PARTITION_ENABLE BIT2
-
-
-/* Tx/Rx queue command reg (RQCR/TQCR)*/
-#define ETH_QUEUE_0_ENABLE BIT0
-#define ETH_QUEUE_1_ENABLE BIT1
-#define ETH_QUEUE_2_ENABLE BIT2
-#define ETH_QUEUE_3_ENABLE BIT3
-#define ETH_QUEUE_4_ENABLE BIT4
-#define ETH_QUEUE_5_ENABLE BIT5
-#define ETH_QUEUE_6_ENABLE BIT6
-#define ETH_QUEUE_7_ENABLE BIT7
-#define ETH_QUEUE_0_DISABLE BIT8
-#define ETH_QUEUE_1_DISABLE BIT9
-#define ETH_QUEUE_2_DISABLE BIT10
-#define ETH_QUEUE_3_DISABLE BIT11
-#define ETH_QUEUE_4_DISABLE BIT12
-#define ETH_QUEUE_5_DISABLE BIT13
-#define ETH_QUEUE_6_DISABLE BIT14
-#define ETH_QUEUE_7_DISABLE BIT15
-
-
-/* These macros describes the Port Sdma configuration reg (SDCR) bits */
-#define ETH_RIFB BIT0
-#define ETH_RX_BURST_SIZE_1_64BIT 0
-#define ETH_RX_BURST_SIZE_2_64BIT BIT1
-#define ETH_RX_BURST_SIZE_4_64BIT BIT2
-#define ETH_RX_BURST_SIZE_8_64BIT (BIT2 | BIT1)
-#define ETH_RX_BURST_SIZE_16_64BIT BIT3
-#define ETH_BLM_RX_NO_SWAP BIT4
-#define ETH_BLM_RX_BYTE_SWAP 0
-#define ETH_BLM_TX_NO_SWAP BIT5
-#define ETH_BLM_TX_BYTE_SWAP 0
-#define ETH_DESCRIPTORS_BYTE_SWAP BIT6
-#define ETH_DESCRIPTORS_NO_SWAP 0
-#define ETH_TX_BURST_SIZE_1_64BIT 0
-#define ETH_TX_BURST_SIZE_2_64BIT BIT22
-#define ETH_TX_BURST_SIZE_4_64BIT BIT23
-#define ETH_TX_BURST_SIZE_8_64BIT (BIT23 | BIT22)
-#define ETH_TX_BURST_SIZE_16_64BIT BIT24
-
-
-/* These macros describes the Port serial control reg (PSCR) bits */
-#define ETH_SERIAL_PORT_DISABLE 0
-#define ETH_SERIAL_PORT_ENABLE BIT0
-#define ETH_FORCE_LINK_PASS BIT1
-#define ETH_DO_NOT_FORCE_LINK_PASS 0
-#define ETH_ENABLE_AUTO_NEG_FOR_DUPLX 0
-#define ETH_DISABLE_AUTO_NEG_FOR_DUPLX BIT2
-#define ETH_ENABLE_AUTO_NEG_FOR_FLOW_CTRL 0
-#define ETH_DISABLE_AUTO_NEG_FOR_FLOW_CTRL BIT3
-#define ETH_ADV_NO_FLOW_CTRL 0
-#define ETH_ADV_SYMMETRIC_FLOW_CTRL BIT4
-#define ETH_FORCE_FC_MODE_NO_PAUSE_DIS_TX 0
-#define ETH_FORCE_FC_MODE_TX_PAUSE_DIS BIT5
-#define ETH_FORCE_BP_MODE_NO_JAM 0
-#define ETH_FORCE_BP_MODE_JAM_TX BIT7
-#define ETH_FORCE_BP_MODE_JAM_TX_ON_RX_ERR BIT8
-#define ETH_FORCE_LINK_FAIL 0
-#define ETH_DO_NOT_FORCE_LINK_FAIL BIT10
-#define ETH_RETRANSMIT_16_ETTEMPTS 0
-#define ETH_RETRANSMIT_FOREVER BIT11
-#define ETH_DISABLE_AUTO_NEG_SPEED_GMII BIT13
-#define ETH_ENABLE_AUTO_NEG_SPEED_GMII 0
-#define ETH_DTE_ADV_0 0
-#define ETH_DTE_ADV_1 BIT14
-#define ETH_DISABLE_AUTO_NEG_BYPASS 0
-#define ETH_ENABLE_AUTO_NEG_BYPASS BIT15
-#define ETH_AUTO_NEG_NO_CHANGE 0
-#define ETH_RESTART_AUTO_NEG BIT16
-#define ETH_MAX_RX_PACKET_1518BYTE 0
-#define ETH_MAX_RX_PACKET_1522BYTE BIT17
-#define ETH_MAX_RX_PACKET_1552BYTE BIT18
-#define ETH_MAX_RX_PACKET_9022BYTE (BIT18 | BIT17)
-#define ETH_MAX_RX_PACKET_9192BYTE BIT19
-#define ETH_MAX_RX_PACKET_9700BYTE (BIT19 | BIT17)
-#define ETH_SET_EXT_LOOPBACK BIT20
-#define ETH_CLR_EXT_LOOPBACK 0
-#define ETH_SET_FULL_DUPLEX_MODE BIT21
-#define ETH_SET_HALF_DUPLEX_MODE 0
-#define ETH_ENABLE_FLOW_CTRL_TX_RX_IN_FULL_DUPLEX BIT22
-#define ETH_DISABLE_FLOW_CTRL_TX_RX_IN_FULL_DUPLEX 0
-#define ETH_SET_GMII_SPEED_TO_10_100 0
-#define ETH_SET_GMII_SPEED_TO_1000 BIT23
-#define ETH_SET_MII_SPEED_TO_10 0
-#define ETH_SET_MII_SPEED_TO_100 BIT24
-
-
-/* SMI reg */
-#define ETH_SMI_BUSY BIT28 /* 0 - Write, 1 - Read */
-#define ETH_SMI_READ_VALID BIT27 /* 0 - Write, 1 - Read */
-#define ETH_SMI_OPCODE_WRITE 0 /* Completion of Read operation */
-#define ETH_SMI_OPCODE_READ BIT26 /* Operation is in progress */
-
-/* SDMA command status fields macros */
-
-/* Tx & Rx descriptors status */
-#define ETH_ERROR_SUMMARY (BIT0)
-
-/* Tx & Rx descriptors command */
-#define ETH_BUFFER_OWNED_BY_DMA (BIT31)
-
-/* Tx descriptors status */
-#define ETH_LC_ERROR (0 )
-#define ETH_UR_ERROR (BIT1 )
-#define ETH_RL_ERROR (BIT2 )
-#define ETH_LLC_SNAP_FORMAT (BIT9 )
-
-/* Rx descriptors status */
-#define ETH_CRC_ERROR (0 )
-#define ETH_OVERRUN_ERROR (BIT1 )
-#define ETH_MAX_FRAME_LENGTH_ERROR (BIT2 )
-#define ETH_RESOURCE_ERROR ((BIT2 | BIT1))
-#define ETH_VLAN_TAGGED (BIT19)
-#define ETH_BPDU_FRAME (BIT20)
-#define ETH_TCP_FRAME_OVER_IP_V_4 (0 )
-#define ETH_UDP_FRAME_OVER_IP_V_4 (BIT21)
-#define ETH_OTHER_FRAME_TYPE (BIT22)
-#define ETH_LAYER_2_IS_ETH_V_2 (BIT23)
-#define ETH_FRAME_TYPE_IP_V_4 (BIT24)
-#define ETH_FRAME_HEADER_OK (BIT25)
-#define ETH_RX_LAST_DESC (BIT26)
-#define ETH_RX_FIRST_DESC (BIT27)
-#define ETH_UNKNOWN_DESTINATION_ADDR (BIT28)
-#define ETH_RX_ENABLE_INTERRUPT (BIT29)
-#define ETH_LAYER_4_CHECKSUM_OK (BIT30)
-
-/* Rx descriptors byte count */
-#define ETH_FRAME_FRAGMENTED (BIT2)
-
-/* Tx descriptors command */
-#define ETH_LAYER_4_CHECKSUM_FIRST_DESC (BIT10)
-#define ETH_FRAME_SET_TO_VLAN (BIT15)
-#define ETH_TCP_FRAME (0 )
-#define ETH_UDP_FRAME (BIT16)
-#define ETH_GEN_TCP_UDP_CHECKSUM (BIT17)
-#define ETH_GEN_IP_V_4_CHECKSUM (BIT18)
-#define ETH_ZERO_PADDING (BIT19)
-#define ETH_TX_LAST_DESC (BIT20)
-#define ETH_TX_FIRST_DESC (BIT21)
-#define ETH_GEN_CRC (BIT22)
-#define ETH_TX_ENABLE_INTERRUPT (BIT23)
-#define ETH_AUTO_MODE (BIT30)
-
-/* Address decode parameters */
-/* Ethernet Base Address Register bits */
-#define EBAR_TARGET_DRAM 0x00000000
-#define EBAR_TARGET_DEVICE 0x00000001
-#define EBAR_TARGET_CBS 0x00000002
-#define EBAR_TARGET_PCI0 0x00000003
-#define EBAR_TARGET_PCI1 0x00000004
-#define EBAR_TARGET_CUNIT 0x00000005
-#define EBAR_TARGET_AUNIT 0x00000006
-#define EBAR_TARGET_GUNIT 0x00000007
-
-/* Window attributes */
-#define EBAR_ATTR_DRAM_CS0 0x00000E00
-#define EBAR_ATTR_DRAM_CS1 0x00000D00
-#define EBAR_ATTR_DRAM_CS2 0x00000B00
-#define EBAR_ATTR_DRAM_CS3 0x00000700
-
-/* DRAM Target interface */
-#define EBAR_ATTR_DRAM_NO_CACHE_COHERENCY 0x00000000
-#define EBAR_ATTR_DRAM_CACHE_COHERENCY_WT 0x00001000
-#define EBAR_ATTR_DRAM_CACHE_COHERENCY_WB 0x00002000
-
-/* Device Bus Target interface */
-#define EBAR_ATTR_DEVICE_DEVCS0 0x00001E00
-#define EBAR_ATTR_DEVICE_DEVCS1 0x00001D00
-#define EBAR_ATTR_DEVICE_DEVCS2 0x00001B00
-#define EBAR_ATTR_DEVICE_DEVCS3 0x00001700
-#define EBAR_ATTR_DEVICE_BOOTCS3 0x00000F00
-
-/* PCI Target interface */
-#define EBAR_ATTR_PCI_BYTE_SWAP 0x00000000
-#define EBAR_ATTR_PCI_NO_SWAP 0x00000100
-#define EBAR_ATTR_PCI_BYTE_WORD_SWAP 0x00000200
-#define EBAR_ATTR_PCI_WORD_SWAP 0x00000300
-#define EBAR_ATTR_PCI_NO_SNOOP_NOT_ASSERT 0x00000000
-#define EBAR_ATTR_PCI_NO_SNOOP_ASSERT 0x00000400
-#define EBAR_ATTR_PCI_IO_SPACE 0x00000000
-#define EBAR_ATTR_PCI_MEMORY_SPACE 0x00000800
-#define EBAR_ATTR_PCI_REQ64_FORCE 0x00000000
-#define EBAR_ATTR_PCI_REQ64_SIZE 0x00001000
-
-/* CPU 60x bus or internal SRAM interface */
-#define EBAR_ATTR_CBS_SRAM_BLOCK0 0x00000000
-#define EBAR_ATTR_CBS_SRAM_BLOCK1 0x00000100
-#define EBAR_ATTR_CBS_SRAM 0x00000000
-#define EBAR_ATTR_CBS_CPU_BUS 0x00000800
-
-/* Window access control */
-#define EWIN_ACCESS_NOT_ALLOWED 0
-#define EWIN_ACCESS_READ_ONLY BIT0
-#define EWIN_ACCESS_FULL (BIT1 | BIT0)
-#define EWIN0_ACCESS_MASK 0x0003
-#define EWIN1_ACCESS_MASK 0x000C
-#define EWIN2_ACCESS_MASK 0x0030
-#define EWIN3_ACCESS_MASK 0x00C0
-
-/* typedefs */
-
-typedef enum _eth_port
-{
- ETH_0 = 0,
- ETH_1 = 1,
- ETH_2 = 2
-}ETH_PORT;
-
-typedef enum _eth_func_ret_status
-{
- ETH_OK, /* Returned as expected. */
- ETH_ERROR, /* Fundamental error. */
- ETH_RETRY, /* Could not process request. Try later. */
- ETH_END_OF_JOB, /* Ring has nothing to process. */
- ETH_QUEUE_FULL, /* Ring resource error. */
- ETH_QUEUE_LAST_RESOURCE /* Ring resources about to exhaust. */
-}ETH_FUNC_RET_STATUS;
-
-typedef enum _eth_queue
-{
- ETH_Q0 = 0,
- ETH_Q1 = 1,
- ETH_Q2 = 2,
- ETH_Q3 = 3,
- ETH_Q4 = 4,
- ETH_Q5 = 5,
- ETH_Q6 = 6,
- ETH_Q7 = 7
-} ETH_QUEUE;
-
-typedef enum _addr_win
-{
- ETH_WIN0,
- ETH_WIN1,
- ETH_WIN2,
- ETH_WIN3,
- ETH_WIN4,
- ETH_WIN5
-} ETH_ADDR_WIN;
-
-typedef enum _eth_target
-{
- ETH_TARGET_DRAM ,
- ETH_TARGET_DEVICE,
- ETH_TARGET_CBS ,
- ETH_TARGET_PCI0 ,
- ETH_TARGET_PCI1
-}ETH_TARGET;
-
-typedef struct _eth_rx_desc
-{
- unsigned short byte_cnt ; /* Descriptor buffer byte count */
- unsigned short buf_size ; /* Buffer size */
- unsigned int cmd_sts ; /* Descriptor command status */
- unsigned int next_desc_ptr; /* Next descriptor pointer */
- unsigned int buf_ptr ; /* Descriptor buffer pointer */
- unsigned int return_info ; /* User resource return information */
-} ETH_RX_DESC;
-
-
-typedef struct _eth_tx_desc
-{
- unsigned short byte_cnt ; /* Descriptor buffer byte count */
- unsigned short l4i_chk ; /* CPU provided TCP Checksum */
- unsigned int cmd_sts ; /* Descriptor command status */
- unsigned int next_desc_ptr; /* Next descriptor pointer */
- unsigned int buf_ptr ; /* Descriptor buffer pointer */
- unsigned int return_info ; /* User resource return information */
-} ETH_TX_DESC;
-
-/* Unified struct for Rx and Tx operations. The user is not required to */
-/* be familier with neither Tx nor Rx descriptors. */
-typedef struct _pkt_info
-{
- unsigned short byte_cnt ; /* Descriptor buffer byte count */
- unsigned short l4i_chk ; /* Tx CPU provided TCP Checksum */
- unsigned int cmd_sts ; /* Descriptor command status */
- unsigned int buf_ptr ; /* Descriptor buffer pointer */
- unsigned int return_info ; /* User resource return information */
-} PKT_INFO;
-
-
-typedef struct _eth_win_param
-{
- ETH_ADDR_WIN win; /* Window number. See ETH_ADDR_WIN enum */
- ETH_TARGET target; /* System targets. See ETH_TARGET enum */
- unsigned short attributes; /* BAR attributes. See above macros. */
- unsigned int base_addr; /* Window base address in unsigned int form */
- unsigned int high_addr; /* Window high address in unsigned int form */
- unsigned int size; /* Size in MBytes. Must be % 64Kbyte. */
- bool enable; /* Enable/disable access to the window. */
- unsigned short access_ctrl; /* Access ctrl register. see above macros */
-} ETH_WIN_PARAM;
-
-
-/* Ethernet port specific infomation */
-
-typedef struct _eth_port_ctrl
-{
- ETH_PORT port_num; /* User Ethernet port number */
- int port_phy_addr; /* User phy address of Ethrnet port */
- unsigned char port_mac_addr[6]; /* User defined port MAC address. */
- unsigned int port_config; /* User port configuration value */
- unsigned int port_config_extend; /* User port config extend value */
- unsigned int port_sdma_config; /* User port SDMA config value */
- unsigned int port_serial_control; /* User port serial control value */
- unsigned int port_tx_queue_command; /* Port active Tx queues summary */
- unsigned int port_rx_queue_command; /* Port active Rx queues summary */
-
- /* User function to cast virtual address to CPU bus address */
- unsigned int (*port_virt_to_phys)(unsigned int addr);
- /* User scratch pad for user specific data structures */
- void *port_private;
-
- bool rx_resource_err[MAX_RX_QUEUE_NUM]; /* Rx ring resource error flag */
- bool tx_resource_err[MAX_TX_QUEUE_NUM]; /* Tx ring resource error flag */
-
- /* Tx/Rx rings managment indexes fields. For driver use */
-
- /* Next available Rx resource */
- volatile ETH_RX_DESC *p_rx_curr_desc_q[MAX_RX_QUEUE_NUM];
- /* Returning Rx resource */
- volatile ETH_RX_DESC *p_rx_used_desc_q[MAX_RX_QUEUE_NUM];
-
- /* Next available Tx resource */
- volatile ETH_TX_DESC *p_tx_curr_desc_q[MAX_TX_QUEUE_NUM];
- /* Returning Tx resource */
- volatile ETH_TX_DESC *p_tx_used_desc_q[MAX_TX_QUEUE_NUM];
- /* An extra Tx index to support transmit of multiple buffers per packet */
- volatile ETH_TX_DESC *p_tx_first_desc_q[MAX_TX_QUEUE_NUM];
-
- /* Tx/Rx rings size and base variables fields. For driver use */
-
- volatile ETH_RX_DESC *p_rx_desc_area_base[MAX_RX_QUEUE_NUM];
- unsigned int rx_desc_area_size[MAX_RX_QUEUE_NUM];
- char *p_rx_buffer_base[MAX_RX_QUEUE_NUM];
-
- volatile ETH_TX_DESC *p_tx_desc_area_base[MAX_TX_QUEUE_NUM];
- unsigned int tx_desc_area_size[MAX_TX_QUEUE_NUM];
- char *p_tx_buffer_base[MAX_TX_QUEUE_NUM];
-
-} ETH_PORT_INFO;
-
-
-/* ethernet.h API list */
-
-/* Port operation control routines */
-static void eth_port_init (ETH_PORT_INFO *p_eth_port_ctrl);
-static void eth_port_reset(ETH_PORT eth_port_num);
-static bool eth_port_start(ETH_PORT_INFO *p_eth_port_ctrl);
-
-
-/* Port MAC address routines */
-static void eth_port_uc_addr_set (ETH_PORT eth_port_num,
- unsigned char *p_addr,
- ETH_QUEUE queue);
-#if 0 /* FIXME */
-static void eth_port_mc_addr (ETH_PORT eth_port_num,
- unsigned char *p_addr,
- ETH_QUEUE queue,
- int option);
-#endif
-
-/* PHY and MIB routines */
-static bool ethernet_phy_reset(ETH_PORT eth_port_num);
-
-static bool eth_port_write_smi_reg(ETH_PORT eth_port_num,
- unsigned int phy_reg,
- unsigned int value);
-
-static bool eth_port_read_smi_reg(ETH_PORT eth_port_num,
- unsigned int phy_reg,
- unsigned int* value);
-
-static void eth_clear_mib_counters(ETH_PORT eth_port_num);
-
-/* Port data flow control routines */
-static ETH_FUNC_RET_STATUS eth_port_send (ETH_PORT_INFO *p_eth_port_ctrl,
- ETH_QUEUE tx_queue,
- PKT_INFO *p_pkt_info);
-static ETH_FUNC_RET_STATUS eth_tx_return_desc(ETH_PORT_INFO *p_eth_port_ctrl,
- ETH_QUEUE tx_queue,
- PKT_INFO *p_pkt_info);
-static ETH_FUNC_RET_STATUS eth_port_receive (ETH_PORT_INFO *p_eth_port_ctrl,
- ETH_QUEUE rx_queue,
- PKT_INFO *p_pkt_info);
-static ETH_FUNC_RET_STATUS eth_rx_return_buff(ETH_PORT_INFO *p_eth_port_ctrl,
- ETH_QUEUE rx_queue,
- PKT_INFO *p_pkt_info);
-
-
-static bool ether_init_tx_desc_ring(ETH_PORT_INFO *p_eth_port_ctrl,
- ETH_QUEUE tx_queue,
- int tx_desc_num,
- int tx_buff_size,
- unsigned int tx_desc_base_addr,
- unsigned int tx_buff_base_addr);
-
-static bool ether_init_rx_desc_ring(ETH_PORT_INFO *p_eth_port_ctrl,
- ETH_QUEUE rx_queue,
- int rx_desc_num,
- int rx_buff_size,
- unsigned int rx_desc_base_addr,
- unsigned int rx_buff_base_addr);
-
-#endif /* MV64360_ETH_ */
diff --git a/board/esd/cpci750/mv_regs.h b/board/esd/cpci750/mv_regs.h
deleted file mode 100644
index 0d6370b52c..0000000000
--- a/board/esd/cpci750/mv_regs.h
+++ /dev/null
@@ -1,1124 +0,0 @@
-/*
- * (C) Copyright 2003
- * Ingo Assmus <ingo.assmus@keymile.com>
- *
- * based on - Driver for MV64360X ethernet ports
- * Copyright (C) 2002 rabeeh@galileo.co.il
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/********************************************************************************
-* gt64360r.h - GT-64360 Internal registers definition file.
-*
-* DESCRIPTION:
-* None.
-*
-* DEPENDENCIES:
-* None.
-*
-*******************************************************************************/
-
-#ifndef __INCmv_regsh
-#define __INCmv_regsh
-
-#define MV64360
-
-/* Supported by the Atlantis */
-#define MV64360_INCLUDE_PCI_1
-#define MV64360_INCLUDE_PCI_0_ARBITER
-#define MV64360_INCLUDE_PCI_1_ARBITER
-#define MV64360_INCLUDE_SNOOP_SUPPORT
-#define MV64360_INCLUDE_P2P
-#define MV64360_INCLUDE_ETH_PORT_2
-#define MV64360_INCLUDE_CPU_MAPPING
-#define MV64360_INCLUDE_MPSC
-
-/* Not supported features */
-#undef INCLUDE_CNTMR_4_7
-#undef INCLUDE_DMA_4_7
-
-/****************************************/
-/* Processor Address Space */
-/****************************************/
-
-/* DDR SDRAM BAR and size registers */
-
-#define MV64360_CS_0_BASE_ADDR 0x008
-#define MV64360_CS_0_SIZE 0x010
-#define MV64360_CS_1_BASE_ADDR 0x208
-#define MV64360_CS_1_SIZE 0x210
-#define MV64360_CS_2_BASE_ADDR 0x018
-#define MV64360_CS_2_SIZE 0x020
-#define MV64360_CS_3_BASE_ADDR 0x218
-#define MV64360_CS_3_SIZE 0x220
-
-/* Devices BAR and size registers */
-
-#define MV64360_DEV_CS0_BASE_ADDR 0x028
-#define MV64360_DEV_CS0_SIZE 0x030
-#define MV64360_DEV_CS1_BASE_ADDR 0x228
-#define MV64360_DEV_CS1_SIZE 0x230
-#define MV64360_DEV_CS2_BASE_ADDR 0x248
-#define MV64360_DEV_CS2_SIZE 0x250
-#define MV64360_DEV_CS3_BASE_ADDR 0x038
-#define MV64360_DEV_CS3_SIZE 0x040
-#define MV64360_BOOTCS_BASE_ADDR 0x238
-#define MV64360_BOOTCS_SIZE 0x240
-
-/* PCI 0 BAR and size registers */
-
-#define MV64360_PCI_0_IO_BASE_ADDR 0x048
-#define MV64360_PCI_0_IO_SIZE 0x050
-#define MV64360_PCI_0_MEMORY0_BASE_ADDR 0x058
-#define MV64360_PCI_0_MEMORY0_SIZE 0x060
-#define MV64360_PCI_0_MEMORY1_BASE_ADDR 0x080
-#define MV64360_PCI_0_MEMORY1_SIZE 0x088
-#define MV64360_PCI_0_MEMORY2_BASE_ADDR 0x258
-#define MV64360_PCI_0_MEMORY2_SIZE 0x260
-#define MV64360_PCI_0_MEMORY3_BASE_ADDR 0x280
-#define MV64360_PCI_0_MEMORY3_SIZE 0x288
-
-/* PCI 1 BAR and size registers */
-#define MV64360_PCI_1_IO_BASE_ADDR 0x090
-#define MV64360_PCI_1_IO_SIZE 0x098
-#define MV64360_PCI_1_MEMORY0_BASE_ADDR 0x0a0
-#define MV64360_PCI_1_MEMORY0_SIZE 0x0a8
-#define MV64360_PCI_1_MEMORY1_BASE_ADDR 0x0b0
-#define MV64360_PCI_1_MEMORY1_SIZE 0x0b8
-#define MV64360_PCI_1_MEMORY2_BASE_ADDR 0x2a0
-#define MV64360_PCI_1_MEMORY2_SIZE 0x2a8
-#define MV64360_PCI_1_MEMORY3_BASE_ADDR 0x2b0
-#define MV64360_PCI_1_MEMORY3_SIZE 0x2b8
-
-/* SRAM base address */
-#define MV64360_INTEGRATED_SRAM_BASE_ADDR 0x268
-
-/* internal registers space base address */
-#define MV64360_INTERNAL_SPACE_BASE_ADDR 0x068
-
-/* Enables the CS , DEV_CS , PCI 0 and PCI 1
- windows above */
-#define MV64360_BASE_ADDR_ENABLE 0x278
-
-/****************************************/
-/* PCI remap registers */
-/****************************************/
- /* PCI 0 */
-#define MV64360_PCI_0_IO_ADDR_REMAP 0x0f0
-#define MV64360_PCI_0_MEMORY0_LOW_ADDR_REMAP 0x0f8
-#define MV64360_PCI_0_MEMORY0_HIGH_ADDR_REMAP 0x320
-#define MV64360_PCI_0_MEMORY1_LOW_ADDR_REMAP 0x100
-#define MV64360_PCI_0_MEMORY1_HIGH_ADDR_REMAP 0x328
-#define MV64360_PCI_0_MEMORY2_LOW_ADDR_REMAP 0x2f8
-#define MV64360_PCI_0_MEMORY2_HIGH_ADDR_REMAP 0x330
-#define MV64360_PCI_0_MEMORY3_LOW_ADDR_REMAP 0x300
-#define MV64360_PCI_0_MEMORY3_HIGH_ADDR_REMAP 0x338
- /* PCI 1 */
-#define MV64360_PCI_1_IO_ADDR_REMAP 0x108
-#define MV64360_PCI_1_MEMORY0_LOW_ADDR_REMAP 0x110
-#define MV64360_PCI_1_MEMORY0_HIGH_ADDR_REMAP 0x340
-#define MV64360_PCI_1_MEMORY1_LOW_ADDR_REMAP 0x118
-#define MV64360_PCI_1_MEMORY1_HIGH_ADDR_REMAP 0x348
-#define MV64360_PCI_1_MEMORY2_LOW_ADDR_REMAP 0x310
-#define MV64360_PCI_1_MEMORY2_HIGH_ADDR_REMAP 0x350
-#define MV64360_PCI_1_MEMORY3_LOW_ADDR_REMAP 0x318
-#define MV64360_PCI_1_MEMORY3_HIGH_ADDR_REMAP 0x358
-
-#define MV64360_CPU_PCI_0_HEADERS_RETARGET_CONTROL 0x3b0
-#define MV64360_CPU_PCI_0_HEADERS_RETARGET_BASE 0x3b8
-#define MV64360_CPU_PCI_1_HEADERS_RETARGET_CONTROL 0x3c0
-#define MV64360_CPU_PCI_1_HEADERS_RETARGET_BASE 0x3c8
-#define MV64360_CPU_GE_HEADERS_RETARGET_CONTROL 0x3d0
-#define MV64360_CPU_GE_HEADERS_RETARGET_BASE 0x3d8
-#define MV64360_CPU_IDMA_HEADERS_RETARGET_CONTROL 0x3e0
-#define MV64360_CPU_IDMA_HEADERS_RETARGET_BASE 0x3e8
-
-/****************************************/
-/* CPU Control Registers */
-/****************************************/
-
-#define MV64360_CPU_CONFIG 0x000
-#define MV64360_CPU_MODE 0x120
-#define MV64360_CPU_MASTER_CONTROL 0x160
-#define MV64360_CPU_CROSS_BAR_CONTROL_LOW 0x150
-#define MV64360_CPU_CROSS_BAR_CONTROL_HIGH 0x158
-#define MV64360_CPU_CROSS_BAR_TIMEOUT 0x168
-
-/****************************************/
-/* SMP RegisterS */
-/****************************************/
-
-#define MV64360_SMP_WHO_AM_I 0x200
-#define MV64360_SMP_CPU0_DOORBELL 0x214
-#define MV64360_SMP_CPU0_DOORBELL_CLEAR 0x21C
-#define MV64360_SMP_CPU1_DOORBELL 0x224
-#define MV64360_SMP_CPU1_DOORBELL_CLEAR 0x22C
-#define MV64360_SMP_CPU0_DOORBELL_MASK 0x234
-#define MV64360_SMP_CPU1_DOORBELL_MASK 0x23C
-#define MV64360_SMP_SEMAPHOR0 0x244
-#define MV64360_SMP_SEMAPHOR1 0x24c
-#define MV64360_SMP_SEMAPHOR2 0x254
-#define MV64360_SMP_SEMAPHOR3 0x25c
-#define MV64360_SMP_SEMAPHOR4 0x264
-#define MV64360_SMP_SEMAPHOR5 0x26c
-#define MV64360_SMP_SEMAPHOR6 0x274
-#define MV64360_SMP_SEMAPHOR7 0x27c
-
-/****************************************/
-/* CPU Sync Barrier Register */
-/****************************************/
-
-#define MV64360_CPU_0_SYNC_BARRIER_TRIGGER 0x0c0
-#define MV64360_CPU_0_SYNC_BARRIER_VIRTUAL 0x0c8
-#define MV64360_CPU_1_SYNC_BARRIER_TRIGGER 0x0d0
-#define MV64360_CPU_1_SYNC_BARRIER_VIRTUAL 0x0d8
-
-/****************************************/
-/* CPU Access Protect */
-/****************************************/
-
-#define MV64360_CPU_PROTECT_WINDOW_0_BASE_ADDR 0x180
-#define MV64360_CPU_PROTECT_WINDOW_0_SIZE 0x188
-#define MV64360_CPU_PROTECT_WINDOW_1_BASE_ADDR 0x190
-#define MV64360_CPU_PROTECT_WINDOW_1_SIZE 0x198
-#define MV64360_CPU_PROTECT_WINDOW_2_BASE_ADDR 0x1a0
-#define MV64360_CPU_PROTECT_WINDOW_2_SIZE 0x1a8
-#define MV64360_CPU_PROTECT_WINDOW_3_BASE_ADDR 0x1b0
-#define MV64360_CPU_PROTECT_WINDOW_3_SIZE 0x1b8
-
-
-/****************************************/
-/* CPU Error Report */
-/****************************************/
-
-#define MV64360_CPU_ERROR_ADDR_LOW 0x070
-#define MV64360_CPU_ERROR_ADDR_HIGH 0x078
-#define MV64360_CPU_ERROR_DATA_LOW 0x128
-#define MV64360_CPU_ERROR_DATA_HIGH 0x130
-#define MV64360_CPU_ERROR_PARITY 0x138
-#define MV64360_CPU_ERROR_CAUSE 0x140
-#define MV64360_CPU_ERROR_MASK 0x148
-
-/****************************************/
-/* CPU Interface Debug Registers */
-/****************************************/
-
-#define MV64360_PUNIT_SLAVE_DEBUG_LOW 0x360
-#define MV64360_PUNIT_SLAVE_DEBUG_HIGH 0x368
-#define MV64360_PUNIT_MASTER_DEBUG_LOW 0x370
-#define MV64360_PUNIT_MASTER_DEBUG_HIGH 0x378
-#define MV64360_PUNIT_MMASK 0x3e4
-
-/****************************************/
-/* Integrated SRAM Registers */
-/****************************************/
-
-#define MV64360_SRAM_CONFIG 0x380
-#define MV64360_SRAM_TEST_MODE 0X3F4
-#define MV64360_SRAM_ERROR_CAUSE 0x388
-#define MV64360_SRAM_ERROR_ADDR 0x390
-#define MV64360_SRAM_ERROR_ADDR_HIGH 0X3F8
-#define MV64360_SRAM_ERROR_DATA_LOW 0x398
-#define MV64360_SRAM_ERROR_DATA_HIGH 0x3a0
-#define MV64360_SRAM_ERROR_DATA_PARITY 0x3a8
-
-/****************************************/
-/* SDRAM Configuration */
-/****************************************/
-
-#define MV64360_SDRAM_CONFIG 0x1400
-#define MV64360_D_UNIT_CONTROL_LOW 0x1404
-#define MV64360_D_UNIT_CONTROL_HIGH 0x1424
-#define MV64360_SDRAM_TIMING_CONTROL_LOW 0x1408
-#define MV64360_SDRAM_TIMING_CONTROL_HIGH 0x140c
-#define MV64360_SDRAM_ADDR_CONTROL 0x1410
-#define MV64360_SDRAM_OPEN_PAGES_CONTROL 0x1414
-#define MV64360_SDRAM_OPERATION 0x1418
-#define MV64360_SDRAM_MODE 0x141c
-#define MV64360_EXTENDED_DRAM_MODE 0x1420
-#define MV64360_SDRAM_CROSS_BAR_CONTROL_LOW 0x1430
-#define MV64360_SDRAM_CROSS_BAR_CONTROL_HIGH 0x1434
-#define MV64360_SDRAM_CROSS_BAR_TIMEOUT 0x1438
-#define MV64360_SDRAM_ADDR_CTRL_PADS_CALIBRATION 0x14c0
-#define MV64360_SDRAM_DATA_PADS_CALIBRATION 0x14c4
-
-/****************************************/
-/* SDRAM Error Report */
-/****************************************/
-
-#define MV64360_SDRAM_ERROR_DATA_LOW 0x1444
-#define MV64360_SDRAM_ERROR_DATA_HIGH 0x1440
-#define MV64360_SDRAM_ERROR_ADDR 0x1450
-#define MV64360_SDRAM_RECEIVED_ECC 0x1448
-#define MV64360_SDRAM_CALCULATED_ECC 0x144c
-#define MV64360_SDRAM_ECC_CONTROL 0x1454
-#define MV64360_SDRAM_ECC_ERROR_COUNTER 0x1458
-
-/******************************************/
-/* Controlled Delay Line (CDL) Registers */
-/******************************************/
-
-#define MV64360_DFCDL_CONFIG0 0x1480
-#define MV64360_DFCDL_CONFIG1 0x1484
-#define MV64360_DLL_WRITE 0x1488
-#define MV64360_DLL_READ 0x148c
-#define MV64360_SRAM_ADDR 0x1490
-#define MV64360_SRAM_DATA0 0x1494
-#define MV64360_SRAM_DATA1 0x1498
-#define MV64360_SRAM_DATA2 0x149c
-#define MV64360_DFCL_PROBE 0x14a0
-
-/******************************************/
-/* Debug Registers */
-/******************************************/
-
-#define MV64360_DUNIT_DEBUG_LOW 0x1460
-#define MV64360_DUNIT_DEBUG_HIGH 0x1464
-#define MV64360_DUNIT_MMASK 0X1b40
-
-/****************************************/
-/* Device Parameters */
-/****************************************/
-
-#define MV64360_DEVICE_BANK0_PARAMETERS 0x45c
-#define MV64360_DEVICE_BANK1_PARAMETERS 0x460
-#define MV64360_DEVICE_BANK2_PARAMETERS 0x464
-#define MV64360_DEVICE_BANK3_PARAMETERS 0x468
-#define MV64360_DEVICE_BOOT_BANK_PARAMETERS 0x46c
-#define MV64360_DEVICE_INTERFACE_CONTROL 0x4c0
-#define MV64360_DEVICE_INTERFACE_CROSS_BAR_CONTROL_LOW 0x4c8
-#define MV64360_DEVICE_INTERFACE_CROSS_BAR_CONTROL_HIGH 0x4cc
-#define MV64360_DEVICE_INTERFACE_CROSS_BAR_TIMEOUT 0x4c4
-
-/****************************************/
-/* Device interrupt registers */
-/****************************************/
-
-#define MV64360_DEVICE_INTERRUPT_CAUSE 0x4d0
-#define MV64360_DEVICE_INTERRUPT_MASK 0x4d4
-#define MV64360_DEVICE_ERROR_ADDR 0x4d8
-#define MV64360_DEVICE_ERROR_DATA 0x4dc
-#define MV64360_DEVICE_ERROR_PARITY 0x4e0
-
-/****************************************/
-/* Device debug registers */
-/****************************************/
-
-#define MV64360_DEVICE_DEBUG_LOW 0x4e4
-#define MV64360_DEVICE_DEBUG_HIGH 0x4e8
-#define MV64360_RUNIT_MMASK 0x4f0
-
-/****************************************/
-/* PCI Slave Address Decoding registers */
-/****************************************/
-
-#define MV64360_PCI_0_CS_0_BANK_SIZE 0xc08
-#define MV64360_PCI_1_CS_0_BANK_SIZE 0xc88
-#define MV64360_PCI_0_CS_1_BANK_SIZE 0xd08
-#define MV64360_PCI_1_CS_1_BANK_SIZE 0xd88
-#define MV64360_PCI_0_CS_2_BANK_SIZE 0xc0c
-#define MV64360_PCI_1_CS_2_BANK_SIZE 0xc8c
-#define MV64360_PCI_0_CS_3_BANK_SIZE 0xd0c
-#define MV64360_PCI_1_CS_3_BANK_SIZE 0xd8c
-#define MV64360_PCI_0_DEVCS_0_BANK_SIZE 0xc10
-#define MV64360_PCI_1_DEVCS_0_BANK_SIZE 0xc90
-#define MV64360_PCI_0_DEVCS_1_BANK_SIZE 0xd10
-#define MV64360_PCI_1_DEVCS_1_BANK_SIZE 0xd90
-#define MV64360_PCI_0_DEVCS_2_BANK_SIZE 0xd18
-#define MV64360_PCI_1_DEVCS_2_BANK_SIZE 0xd98
-#define MV64360_PCI_0_DEVCS_3_BANK_SIZE 0xc14
-#define MV64360_PCI_1_DEVCS_3_BANK_SIZE 0xc94
-#define MV64360_PCI_0_DEVCS_BOOT_BANK_SIZE 0xd14
-#define MV64360_PCI_1_DEVCS_BOOT_BANK_SIZE 0xd94
-#define MV64360_PCI_0_P2P_MEM0_BAR_SIZE 0xd1c
-#define MV64360_PCI_1_P2P_MEM0_BAR_SIZE 0xd9c
-#define MV64360_PCI_0_P2P_MEM1_BAR_SIZE 0xd20
-#define MV64360_PCI_1_P2P_MEM1_BAR_SIZE 0xda0
-#define MV64360_PCI_0_P2P_I_O_BAR_SIZE 0xd24
-#define MV64360_PCI_1_P2P_I_O_BAR_SIZE 0xda4
-#define MV64360_PCI_0_CPU_BAR_SIZE 0xd28
-#define MV64360_PCI_1_CPU_BAR_SIZE 0xda8
-#define MV64360_PCI_0_INTERNAL_SRAM_BAR_SIZE 0xe00
-#define MV64360_PCI_1_INTERNAL_SRAM_BAR_SIZE 0xe80
-#define MV64360_PCI_0_EXPANSION_ROM_BAR_SIZE 0xd2c
-#define MV64360_PCI_1_EXPANSION_ROM_BAR_SIZE 0xd9c
-#define MV64360_PCI_0_BASE_ADDR_REG_ENABLE 0xc3c
-#define MV64360_PCI_1_BASE_ADDR_REG_ENABLE 0xcbc
-#define MV64360_PCI_0_CS_0_BASE_ADDR_REMAP 0xc48
-#define MV64360_PCI_1_CS_0_BASE_ADDR_REMAP 0xcc8
-#define MV64360_PCI_0_CS_1_BASE_ADDR_REMAP 0xd48
-#define MV64360_PCI_1_CS_1_BASE_ADDR_REMAP 0xdc8
-#define MV64360_PCI_0_CS_2_BASE_ADDR_REMAP 0xc4c
-#define MV64360_PCI_1_CS_2_BASE_ADDR_REMAP 0xccc
-#define MV64360_PCI_0_CS_3_BASE_ADDR_REMAP 0xd4c
-#define MV64360_PCI_1_CS_3_BASE_ADDR_REMAP 0xdcc
-#define MV64360_PCI_0_CS_0_BASE_HIGH_ADDR_REMAP 0xF04
-#define MV64360_PCI_1_CS_0_BASE_HIGH_ADDR_REMAP 0xF84
-#define MV64360_PCI_0_CS_1_BASE_HIGH_ADDR_REMAP 0xF08
-#define MV64360_PCI_1_CS_1_BASE_HIGH_ADDR_REMAP 0xF88
-#define MV64360_PCI_0_CS_2_BASE_HIGH_ADDR_REMAP 0xF0C
-#define MV64360_PCI_1_CS_2_BASE_HIGH_ADDR_REMAP 0xF8C
-#define MV64360_PCI_0_CS_3_BASE_HIGH_ADDR_REMAP 0xF10
-#define MV64360_PCI_1_CS_3_BASE_HIGH_ADDR_REMAP 0xF90
-#define MV64360_PCI_0_DEVCS_0_BASE_ADDR_REMAP 0xc50
-#define MV64360_PCI_1_DEVCS_0_BASE_ADDR_REMAP 0xcd0
-#define MV64360_PCI_0_DEVCS_1_BASE_ADDR_REMAP 0xd50
-#define MV64360_PCI_1_DEVCS_1_BASE_ADDR_REMAP 0xdd0
-#define MV64360_PCI_0_DEVCS_2_BASE_ADDR_REMAP 0xd58
-#define MV64360_PCI_1_DEVCS_2_BASE_ADDR_REMAP 0xdd8
-#define MV64360_PCI_0_DEVCS_3_BASE_ADDR_REMAP 0xc54
-#define MV64360_PCI_1_DEVCS_3_BASE_ADDR_REMAP 0xcd4
-#define MV64360_PCI_0_DEVCS_BOOTCS_BASE_ADDR_REMAP 0xd54
-#define MV64360_PCI_1_DEVCS_BOOTCS_BASE_ADDR_REMAP 0xdd4
-#define MV64360_PCI_0_P2P_MEM0_BASE_ADDR_REMAP_LOW 0xd5c
-#define MV64360_PCI_1_P2P_MEM0_BASE_ADDR_REMAP_LOW 0xddc
-#define MV64360_PCI_0_P2P_MEM0_BASE_ADDR_REMAP_HIGH 0xd60
-#define MV64360_PCI_1_P2P_MEM0_BASE_ADDR_REMAP_HIGH 0xde0
-#define MV64360_PCI_0_P2P_MEM1_BASE_ADDR_REMAP_LOW 0xd64
-#define MV64360_PCI_1_P2P_MEM1_BASE_ADDR_REMAP_LOW 0xde4
-#define MV64360_PCI_0_P2P_MEM1_BASE_ADDR_REMAP_HIGH 0xd68
-#define MV64360_PCI_1_P2P_MEM1_BASE_ADDR_REMAP_HIGH 0xde8
-#define MV64360_PCI_0_P2P_I_O_BASE_ADDR_REMAP 0xd6c
-#define MV64360_PCI_1_P2P_I_O_BASE_ADDR_REMAP 0xdec
-#define MV64360_PCI_0_CPU_BASE_ADDR_REMAP_LOW 0xd70
-#define MV64360_PCI_1_CPU_BASE_ADDR_REMAP_LOW 0xdf0
-#define MV64360_PCI_0_CPU_BASE_ADDR_REMAP_HIGH 0xd74
-#define MV64360_PCI_1_CPU_BASE_ADDR_REMAP_HIGH 0xdf4
-#define MV64360_PCI_0_INTEGRATED_SRAM_BASE_ADDR_REMAP 0xf00
-#define MV64360_PCI_1_INTEGRATED_SRAM_BASE_ADDR_REMAP 0xf80
-#define MV64360_PCI_0_EXPANSION_ROM_BASE_ADDR_REMAP 0xf38
-#define MV64360_PCI_1_EXPANSION_ROM_BASE_ADDR_REMAP 0xfb8
-#define MV64360_PCI_0_ADDR_DECODE_CONTROL 0xd3c
-#define MV64360_PCI_1_ADDR_DECODE_CONTROL 0xdbc
-#define MV64360_PCI_0_HEADERS_RETARGET_CONTROL 0xF40
-#define MV64360_PCI_1_HEADERS_RETARGET_CONTROL 0xFc0
-#define MV64360_PCI_0_HEADERS_RETARGET_BASE 0xF44
-#define MV64360_PCI_1_HEADERS_RETARGET_BASE 0xFc4
-#define MV64360_PCI_0_HEADERS_RETARGET_HIGH 0xF48
-#define MV64360_PCI_1_HEADERS_RETARGET_HIGH 0xFc8
-
-/***********************************/
-/* PCI Control Register Map */
-/***********************************/
-
-#define MV64360_PCI_0_DLL_STATUS_AND_COMMAND 0x1d20
-#define MV64360_PCI_1_DLL_STATUS_AND_COMMAND 0x1da0
-#define MV64360_PCI_0_MPP_PADS_DRIVE_CONTROL 0x1d1C
-#define MV64360_PCI_1_MPP_PADS_DRIVE_CONTROL 0x1d9C
-#define MV64360_PCI_0_COMMAND 0xc00
-#define MV64360_PCI_1_COMMAND 0xc80
-#define MV64360_PCI_0_MODE 0xd00
-#define MV64360_PCI_1_MODE 0xd80
-#define MV64360_PCI_0_RETRY 0xc04
-#define MV64360_PCI_1_RETRY 0xc84
-#define MV64360_PCI_0_READ_BUFFER_DISCARD_TIMER 0xd04
-#define MV64360_PCI_1_READ_BUFFER_DISCARD_TIMER 0xd84
-#define MV64360_PCI_0_MSI_TRIGGER_TIMER 0xc38
-#define MV64360_PCI_1_MSI_TRIGGER_TIMER 0xcb8
-#define MV64360_PCI_0_ARBITER_CONTROL 0x1d00
-#define MV64360_PCI_1_ARBITER_CONTROL 0x1d80
-#define MV64360_PCI_0_CROSS_BAR_CONTROL_LOW 0x1d08
-#define MV64360_PCI_1_CROSS_BAR_CONTROL_LOW 0x1d88
-#define MV64360_PCI_0_CROSS_BAR_CONTROL_HIGH 0x1d0c
-#define MV64360_PCI_1_CROSS_BAR_CONTROL_HIGH 0x1d8c
-#define MV64360_PCI_0_CROSS_BAR_TIMEOUT 0x1d04
-#define MV64360_PCI_1_CROSS_BAR_TIMEOUT 0x1d84
-#define MV64360_PCI_0_SYNC_BARRIER_TRIGGER_REG 0x1D18
-#define MV64360_PCI_1_SYNC_BARRIER_TRIGGER_REG 0x1D98
-#define MV64360_PCI_0_SYNC_BARRIER_VIRTUAL_REG 0x1d10
-#define MV64360_PCI_1_SYNC_BARRIER_VIRTUAL_REG 0x1d90
-#define MV64360_PCI_0_P2P_CONFIG 0x1d14
-#define MV64360_PCI_1_P2P_CONFIG 0x1d94
-
-#define MV64360_PCI_0_ACCESS_CONTROL_BASE_0_LOW 0x1e00
-#define MV64360_PCI_0_ACCESS_CONTROL_BASE_0_HIGH 0x1e04
-#define MV64360_PCI_0_ACCESS_CONTROL_SIZE_0 0x1e08
-#define MV64360_PCI_0_ACCESS_CONTROL_BASE_1_LOW 0x1e10
-#define MV64360_PCI_0_ACCESS_CONTROL_BASE_1_HIGH 0x1e14
-#define MV64360_PCI_0_ACCESS_CONTROL_SIZE_1 0x1e18
-#define MV64360_PCI_0_ACCESS_CONTROL_BASE_2_LOW 0x1e20
-#define MV64360_PCI_0_ACCESS_CONTROL_BASE_2_HIGH 0x1e24
-#define MV64360_PCI_0_ACCESS_CONTROL_SIZE_2 0x1e28
-#define MV64360_PCI_0_ACCESS_CONTROL_BASE_3_LOW 0x1e30
-#define MV64360_PCI_0_ACCESS_CONTROL_BASE_3_HIGH 0x1e34
-#define MV64360_PCI_0_ACCESS_CONTROL_SIZE_3 0x1e38
-#define MV64360_PCI_0_ACCESS_CONTROL_BASE_4_LOW 0x1e40
-#define MV64360_PCI_0_ACCESS_CONTROL_BASE_4_HIGH 0x1e44
-#define MV64360_PCI_0_ACCESS_CONTROL_SIZE_4 0x1e48
-#define MV64360_PCI_0_ACCESS_CONTROL_BASE_5_LOW 0x1e50
-#define MV64360_PCI_0_ACCESS_CONTROL_BASE_5_HIGH 0x1e54
-#define MV64360_PCI_0_ACCESS_CONTROL_SIZE_5 0x1e58
-
-#define MV64360_PCI_1_ACCESS_CONTROL_BASE_0_LOW 0x1e80
-#define MV64360_PCI_1_ACCESS_CONTROL_BASE_0_HIGH 0x1e84
-#define MV64360_PCI_1_ACCESS_CONTROL_SIZE_0 0x1e88
-#define MV64360_PCI_1_ACCESS_CONTROL_BASE_1_LOW 0x1e90
-#define MV64360_PCI_1_ACCESS_CONTROL_BASE_1_HIGH 0x1e94
-#define MV64360_PCI_1_ACCESS_CONTROL_SIZE_1 0x1e98
-#define MV64360_PCI_1_ACCESS_CONTROL_BASE_2_LOW 0x1ea0
-#define MV64360_PCI_1_ACCESS_CONTROL_BASE_2_HIGH 0x1ea4
-#define MV64360_PCI_1_ACCESS_CONTROL_SIZE_2 0x1ea8
-#define MV64360_PCI_1_ACCESS_CONTROL_BASE_3_LOW 0x1eb0
-#define MV64360_PCI_1_ACCESS_CONTROL_BASE_3_HIGH 0x1eb4
-#define MV64360_PCI_1_ACCESS_CONTROL_SIZE_3 0x1eb8
-#define MV64360_PCI_1_ACCESS_CONTROL_BASE_4_LOW 0x1ec0
-#define MV64360_PCI_1_ACCESS_CONTROL_BASE_4_HIGH 0x1ec4
-#define MV64360_PCI_1_ACCESS_CONTROL_SIZE_4 0x1ec8
-#define MV64360_PCI_1_ACCESS_CONTROL_BASE_5_LOW 0x1ed0
-#define MV64360_PCI_1_ACCESS_CONTROL_BASE_5_HIGH 0x1ed4
-#define MV64360_PCI_1_ACCESS_CONTROL_SIZE_5 0x1ed8
-
-/****************************************/
-/* PCI Configuration Access Registers */
-/****************************************/
-
-#define MV64360_PCI_0_CONFIG_ADDR 0xcf8
-#define MV64360_PCI_0_CONFIG_DATA_VIRTUAL_REG 0xcfc
-#define MV64360_PCI_1_CONFIG_ADDR 0xc78
-#define MV64360_PCI_1_CONFIG_DATA_VIRTUAL_REG 0xc7c
-#define MV64360_PCI_0_INTERRUPT_ACKNOWLEDGE_VIRTUAL_REG 0xc34
-#define MV64360_PCI_1_INTERRUPT_ACKNOWLEDGE_VIRTUAL_REG 0xcb4
-
-/****************************************/
-/* PCI Error Report Registers */
-/****************************************/
-
-#define MV64360_PCI_0_SERR_MASK 0xc28
-#define MV64360_PCI_1_SERR_MASK 0xca8
-#define MV64360_PCI_0_ERROR_ADDR_LOW 0x1d40
-#define MV64360_PCI_1_ERROR_ADDR_LOW 0x1dc0
-#define MV64360_PCI_0_ERROR_ADDR_HIGH 0x1d44
-#define MV64360_PCI_1_ERROR_ADDR_HIGH 0x1dc4
-#define MV64360_PCI_0_ERROR_ATTRIBUTE 0x1d48
-#define MV64360_PCI_1_ERROR_ATTRIBUTE 0x1dc8
-#define MV64360_PCI_0_ERROR_COMMAND 0x1d50
-#define MV64360_PCI_1_ERROR_COMMAND 0x1dd0
-#define MV64360_PCI_0_ERROR_CAUSE 0x1d58
-#define MV64360_PCI_1_ERROR_CAUSE 0x1dd8
-#define MV64360_PCI_0_ERROR_MASK 0x1d5c
-#define MV64360_PCI_1_ERROR_MASK 0x1ddc
-
-/****************************************/
-/* PCI Debug Registers */
-/****************************************/
-
-#define MV64360_PCI_0_MMASK 0X1D24
-#define MV64360_PCI_1_MMASK 0X1DA4
-
-/*********************************************/
-/* PCI Configuration, Function 0, Registers */
-/*********************************************/
-
-#define MV64360_PCI_DEVICE_AND_VENDOR_ID 0x000
-#define MV64360_PCI_STATUS_AND_COMMAND 0x004
-#define MV64360_PCI_CLASS_CODE_AND_REVISION_ID 0x008
-#define MV64360_PCI_BIST_HEADER_TYPE_LATENCY_TIMER_CACHE_LINE 0x00C
-
-#define MV64360_PCI_SCS_0_BASE_ADDR_LOW 0x010
-#define MV64360_PCI_SCS_0_BASE_ADDR_HIGH 0x014
-#define MV64360_PCI_SCS_1_BASE_ADDR_LOW 0x018
-#define MV64360_PCI_SCS_1_BASE_ADDR_HIGH 0x01C
-#define MV64360_PCI_INTERNAL_REG_MEM_MAPPED_BASE_ADDR_LOW 0x020
-#define MV64360_PCI_INTERNAL_REG_MEM_MAPPED_BASE_ADDR_HIGH 0x024
-#define MV64360_PCI_SUBSYSTEM_ID_AND_SUBSYSTEM_VENDOR_ID 0x02c
-#define MV64360_PCI_EXPANSION_ROM_BASE_ADDR_REG 0x030
-#define MV64360_PCI_CAPABILTY_LIST_POINTER 0x034
-#define MV64360_PCI_INTERRUPT_PIN_AND_LINE 0x03C
- /* capability list */
-#define MV64360_PCI_POWER_MANAGEMENT_CAPABILITY 0x040
-#define MV64360_PCI_POWER_MANAGEMENT_STATUS_AND_CONTROL 0x044
-#define MV64360_PCI_VPD_ADDR 0x048
-#define MV64360_PCI_VPD_DATA 0x04c
-#define MV64360_PCI_MSI_MESSAGE_CONTROL 0x050
-#define MV64360_PCI_MSI_MESSAGE_ADDR 0x054
-#define MV64360_PCI_MSI_MESSAGE_UPPER_ADDR 0x058
-#define MV64360_PCI_MSI_MESSAGE_DATA 0x05c
-#define MV64360_PCI_X_COMMAND 0x060
-#define MV64360_PCI_X_STATUS 0x064
-#define MV64360_PCI_COMPACT_PCI_HOT_SWAP 0x068
-
-/***********************************************/
-/* PCI Configuration, Function 1, Registers */
-/***********************************************/
-
-#define MV64360_PCI_SCS_2_BASE_ADDR_LOW 0x110
-#define MV64360_PCI_SCS_2_BASE_ADDR_HIGH 0x114
-#define MV64360_PCI_SCS_3_BASE_ADDR_LOW 0x118
-#define MV64360_PCI_SCS_3_BASE_ADDR_HIGH 0x11c
-#define MV64360_PCI_INTERNAL_SRAM_BASE_ADDR_LOW 0x120
-#define MV64360_PCI_INTERNAL_SRAM_BASE_ADDR_HIGH 0x124
-
-/***********************************************/
-/* PCI Configuration, Function 2, Registers */
-/***********************************************/
-
-#define MV64360_PCI_DEVCS_0_BASE_ADDR_LOW 0x210
-#define MV64360_PCI_DEVCS_0_BASE_ADDR_HIGH 0x214
-#define MV64360_PCI_DEVCS_1_BASE_ADDR_LOW 0x218
-#define MV64360_PCI_DEVCS_1_BASE_ADDR_HIGH 0x21c
-#define MV64360_PCI_DEVCS_2_BASE_ADDR_LOW 0x220
-#define MV64360_PCI_DEVCS_2_BASE_ADDR_HIGH 0x224
-
-/***********************************************/
-/* PCI Configuration, Function 3, Registers */
-/***********************************************/
-
-#define MV64360_PCI_DEVCS_3_BASE_ADDR_LOW 0x310
-#define MV64360_PCI_DEVCS_3_BASE_ADDR_HIGH 0x314
-#define MV64360_PCI_BOOT_CS_BASE_ADDR_LOW 0x318
-#define MV64360_PCI_BOOT_CS_BASE_ADDR_HIGH 0x31c
-#define MV64360_PCI_CPU_BASE_ADDR_LOW 0x220
-#define MV64360_PCI_CPU_BASE_ADDR_HIGH 0x224
-
-/***********************************************/
-/* PCI Configuration, Function 4, Registers */
-/***********************************************/
-
-#define MV64360_PCI_P2P_MEM0_BASE_ADDR_LOW 0x410
-#define MV64360_PCI_P2P_MEM0_BASE_ADDR_HIGH 0x414
-#define MV64360_PCI_P2P_MEM1_BASE_ADDR_LOW 0x418
-#define MV64360_PCI_P2P_MEM1_BASE_ADDR_HIGH 0x41c
-#define MV64360_PCI_P2P_I_O_BASE_ADDR 0x420
-#define MV64360_PCI_INTERNAL_REGS_I_O_MAPPED_BASE_ADDR 0x424
-
-/****************************************/
-/* Messaging Unit Registers (I20) */
-/****************************************/
-
-#define MV64360_I2O_INBOUND_MESSAGE_REG0_PCI_0_SIDE 0x010
-#define MV64360_I2O_INBOUND_MESSAGE_REG1_PCI_0_SIDE 0x014
-#define MV64360_I2O_OUTBOUND_MESSAGE_REG0_PCI_0_SIDE 0x018
-#define MV64360_I2O_OUTBOUND_MESSAGE_REG1_PCI_0_SIDE 0x01C
-#define MV64360_I2O_INBOUND_DOORBELL_REG_PCI_0_SIDE 0x020
-#define MV64360_I2O_INBOUND_INTERRUPT_CAUSE_REG_PCI_0_SIDE 0x024
-#define MV64360_I2O_INBOUND_INTERRUPT_MASK_REG_PCI_0_SIDE 0x028
-#define MV64360_I2O_OUTBOUND_DOORBELL_REG_PCI_0_SIDE 0x02C
-#define MV64360_I2O_OUTBOUND_INTERRUPT_CAUSE_REG_PCI_0_SIDE 0x030
-#define MV64360_I2O_OUTBOUND_INTERRUPT_MASK_REG_PCI_0_SIDE 0x034
-#define MV64360_I2O_INBOUND_QUEUE_PORT_VIRTUAL_REG_PCI_0_SIDE 0x040
-#define MV64360_I2O_OUTBOUND_QUEUE_PORT_VIRTUAL_REG_PCI_0_SIDE 0x044
-#define MV64360_I2O_QUEUE_CONTROL_REG_PCI_0_SIDE 0x050
-#define MV64360_I2O_QUEUE_BASE_ADDR_REG_PCI_0_SIDE 0x054
-#define MV64360_I2O_INBOUND_FREE_HEAD_POINTER_REG_PCI_0_SIDE 0x060
-#define MV64360_I2O_INBOUND_FREE_TAIL_POINTER_REG_PCI_0_SIDE 0x064
-#define MV64360_I2O_INBOUND_POST_HEAD_POINTER_REG_PCI_0_SIDE 0x068
-#define MV64360_I2O_INBOUND_POST_TAIL_POINTER_REG_PCI_0_SIDE 0x06C
-#define MV64360_I2O_OUTBOUND_FREE_HEAD_POINTER_REG_PCI_0_SIDE 0x070
-#define MV64360_I2O_OUTBOUND_FREE_TAIL_POINTER_REG_PCI_0_SIDE 0x074
-#define MV64360_I2O_OUTBOUND_POST_HEAD_POINTER_REG_PCI_0_SIDE 0x0F8
-#define MV64360_I2O_OUTBOUND_POST_TAIL_POINTER_REG_PCI_0_SIDE 0x0FC
-
-#define MV64360_I2O_INBOUND_MESSAGE_REG0_PCI_1_SIDE 0x090
-#define MV64360_I2O_INBOUND_MESSAGE_REG1_PCI_1_SIDE 0x094
-#define MV64360_I2O_OUTBOUND_MESSAGE_REG0_PCI_1_SIDE 0x098
-#define MV64360_I2O_OUTBOUND_MESSAGE_REG1_PCI_1_SIDE 0x09C
-#define MV64360_I2O_INBOUND_DOORBELL_REG_PCI_1_SIDE 0x0A0
-#define MV64360_I2O_INBOUND_INTERRUPT_CAUSE_REG_PCI_1_SIDE 0x0A4
-#define MV64360_I2O_INBOUND_INTERRUPT_MASK_REG_PCI_1_SIDE 0x0A8
-#define MV64360_I2O_OUTBOUND_DOORBELL_REG_PCI_1_SIDE 0x0AC
-#define MV64360_I2O_OUTBOUND_INTERRUPT_CAUSE_REG_PCI_1_SIDE 0x0B0
-#define MV64360_I2O_OUTBOUND_INTERRUPT_MASK_REG_PCI_1_SIDE 0x0B4
-#define MV64360_I2O_INBOUND_QUEUE_PORT_VIRTUAL_REG_PCI_1_SIDE 0x0C0
-#define MV64360_I2O_OUTBOUND_QUEUE_PORT_VIRTUAL_REG_PCI_1_SIDE 0x0C4
-#define MV64360_I2O_QUEUE_CONTROL_REG_PCI_1_SIDE 0x0D0
-#define MV64360_I2O_QUEUE_BASE_ADDR_REG_PCI_1_SIDE 0x0D4
-#define MV64360_I2O_INBOUND_FREE_HEAD_POINTER_REG_PCI_1_SIDE 0x0E0
-#define MV64360_I2O_INBOUND_FREE_TAIL_POINTER_REG_PCI_1_SIDE 0x0E4
-#define MV64360_I2O_INBOUND_POST_HEAD_POINTER_REG_PCI_1_SIDE 0x0E8
-#define MV64360_I2O_INBOUND_POST_TAIL_POINTER_REG_PCI_1_SIDE 0x0EC
-#define MV64360_I2O_OUTBOUND_FREE_HEAD_POINTER_REG_PCI_1_SIDE 0x0F0
-#define MV64360_I2O_OUTBOUND_FREE_TAIL_POINTER_REG_PCI_1_SIDE 0x0F4
-#define MV64360_I2O_OUTBOUND_POST_HEAD_POINTER_REG_PCI_1_SIDE 0x078
-#define MV64360_I2O_OUTBOUND_POST_TAIL_POINTER_REG_PCI_1_SIDE 0x07C
-
-#define MV64360_I2O_INBOUND_MESSAGE_REG0_CPU0_SIDE 0x1C10
-#define MV64360_I2O_INBOUND_MESSAGE_REG1_CPU0_SIDE 0x1C14
-#define MV64360_I2O_OUTBOUND_MESSAGE_REG0_CPU0_SIDE 0x1C18
-#define MV64360_I2O_OUTBOUND_MESSAGE_REG1_CPU0_SIDE 0x1C1C
-#define MV64360_I2O_INBOUND_DOORBELL_REG_CPU0_SIDE 0x1C20
-#define MV64360_I2O_INBOUND_INTERRUPT_CAUSE_REG_CPU0_SIDE 0x1C24
-#define MV64360_I2O_INBOUND_INTERRUPT_MASK_REG_CPU0_SIDE 0x1C28
-#define MV64360_I2O_OUTBOUND_DOORBELL_REG_CPU0_SIDE 0x1C2C
-#define MV64360_I2O_OUTBOUND_INTERRUPT_CAUSE_REG_CPU0_SIDE 0x1C30
-#define MV64360_I2O_OUTBOUND_INTERRUPT_MASK_REG_CPU0_SIDE 0x1C34
-#define MV64360_I2O_INBOUND_QUEUE_PORT_VIRTUAL_REG_CPU0_SIDE 0x1C40
-#define MV64360_I2O_OUTBOUND_QUEUE_PORT_VIRTUAL_REG_CPU0_SIDE 0x1C44
-#define MV64360_I2O_QUEUE_CONTROL_REG_CPU0_SIDE 0x1C50
-#define MV64360_I2O_QUEUE_BASE_ADDR_REG_CPU0_SIDE 0x1C54
-#define MV64360_I2O_INBOUND_FREE_HEAD_POINTER_REG_CPU0_SIDE 0x1C60
-#define MV64360_I2O_INBOUND_FREE_TAIL_POINTER_REG_CPU0_SIDE 0x1C64
-#define MV64360_I2O_INBOUND_POST_HEAD_POINTER_REG_CPU0_SIDE 0x1C68
-#define MV64360_I2O_INBOUND_POST_TAIL_POINTER_REG_CPU0_SIDE 0x1C6C
-#define MV64360_I2O_OUTBOUND_FREE_HEAD_POINTER_REG_CPU0_SIDE 0x1C70
-#define MV64360_I2O_OUTBOUND_FREE_TAIL_POINTER_REG_CPU0_SIDE 0x1C74
-#define MV64360_I2O_OUTBOUND_POST_HEAD_POINTER_REG_CPU0_SIDE 0x1CF8
-#define MV64360_I2O_OUTBOUND_POST_TAIL_POINTER_REG_CPU0_SIDE 0x1CFC
-#define MV64360_I2O_INBOUND_MESSAGE_REG0_CPU1_SIDE 0x1C90
-#define MV64360_I2O_INBOUND_MESSAGE_REG1_CPU1_SIDE 0x1C94
-#define MV64360_I2O_OUTBOUND_MESSAGE_REG0_CPU1_SIDE 0x1C98
-#define MV64360_I2O_OUTBOUND_MESSAGE_REG1_CPU1_SIDE 0x1C9C
-#define MV64360_I2O_INBOUND_DOORBELL_REG_CPU1_SIDE 0x1CA0
-#define MV64360_I2O_INBOUND_INTERRUPT_CAUSE_REG_CPU1_SIDE 0x1CA4
-#define MV64360_I2O_INBOUND_INTERRUPT_MASK_REG_CPU1_SIDE 0x1CA8
-#define MV64360_I2O_OUTBOUND_DOORBELL_REG_CPU1_SIDE 0x1CAC
-#define MV64360_I2O_OUTBOUND_INTERRUPT_CAUSE_REG_CPU1_SIDE 0x1CB0
-#define MV64360_I2O_OUTBOUND_INTERRUPT_MASK_REG_CPU1_SIDE 0x1CB4
-#define MV64360_I2O_INBOUND_QUEUE_PORT_VIRTUAL_REG_CPU1_SIDE 0x1CC0
-#define MV64360_I2O_OUTBOUND_QUEUE_PORT_VIRTUAL_REG_CPU1_SIDE 0x1CC4
-#define MV64360_I2O_QUEUE_CONTROL_REG_CPU1_SIDE 0x1CD0
-#define MV64360_I2O_QUEUE_BASE_ADDR_REG_CPU1_SIDE 0x1CD4
-#define MV64360_I2O_INBOUND_FREE_HEAD_POINTER_REG_CPU1_SIDE 0x1CE0
-#define MV64360_I2O_INBOUND_FREE_TAIL_POINTER_REG_CPU1_SIDE 0x1CE4
-#define MV64360_I2O_INBOUND_POST_HEAD_POINTER_REG_CPU1_SIDE 0x1CE8
-#define MV64360_I2O_INBOUND_POST_TAIL_POINTER_REG_CPU1_SIDE 0x1CEC
-#define MV64360_I2O_OUTBOUND_FREE_HEAD_POINTER_REG_CPU1_SIDE 0x1CF0
-#define MV64360_I2O_OUTBOUND_FREE_TAIL_POINTER_REG_CPU1_SIDE 0x1CF4
-#define MV64360_I2O_OUTBOUND_POST_HEAD_POINTER_REG_CPU1_SIDE 0x1C78
-#define MV64360_I2O_OUTBOUND_POST_TAIL_POINTER_REG_CPU1_SIDE 0x1C7C
-
-/****************************************/
-/* Ethernet Unit Registers */
-/****************************************/
-
-#define MV64360_ETH_PHY_ADDR_REG 0x2000
-#define MV64360_ETH_SMI_REG 0x2004
-#define MV64360_ETH_UNIT_DEFAULT_ADDR_REG 0x2008
-#define MV64360_ETH_UNIT_DEFAULTID_REG 0x200c
-#define MV64360_ETH_UNIT_INTERRUPT_CAUSE_REG 0x2080
-#define MV64360_ETH_UNIT_INTERRUPT_MASK_REG 0x2084
-#define MV64360_ETH_UNIT_INTERNAL_USE_REG 0x24fc
-#define MV64360_ETH_UNIT_ERROR_ADDR_REG 0x2094
-#define MV64360_ETH_BAR_0 0x2200
-#define MV64360_ETH_BAR_1 0x2208
-#define MV64360_ETH_BAR_2 0x2210
-#define MV64360_ETH_BAR_3 0x2218
-#define MV64360_ETH_BAR_4 0x2220
-#define MV64360_ETH_BAR_5 0x2228
-#define MV64360_ETH_SIZE_REG_0 0x2204
-#define MV64360_ETH_SIZE_REG_1 0x220c
-#define MV64360_ETH_SIZE_REG_2 0x2214
-#define MV64360_ETH_SIZE_REG_3 0x221c
-#define MV64360_ETH_SIZE_REG_4 0x2224
-#define MV64360_ETH_SIZE_REG_5 0x222c
-#define MV64360_ETH_HEADERS_RETARGET_BASE_REG 0x2230
-#define MV64360_ETH_HEADERS_RETARGET_CONTROL_REG 0x2234
-#define MV64360_ETH_HIGH_ADDR_REMAP_REG_0 0x2280
-#define MV64360_ETH_HIGH_ADDR_REMAP_REG_1 0x2284
-#define MV64360_ETH_HIGH_ADDR_REMAP_REG_2 0x2288
-#define MV64360_ETH_HIGH_ADDR_REMAP_REG_3 0x228c
-#define MV64360_ETH_BASE_ADDR_ENABLE_REG 0x2290
-#define MV64360_ETH_ACCESS_PROTECTION_REG(port) (0x2294 + (port<<2))
-#define MV64360_ETH_MIB_COUNTERS_BASE(port) (0x3000 + (port<<7))
-#define MV64360_ETH_PORT_CONFIG_REG(port) (0x2400 + (port<<10))
-#define MV64360_ETH_PORT_CONFIG_EXTEND_REG(port) (0x2404 + (port<<10))
-#define MV64360_ETH_MII_SERIAL_PARAMETRS_REG(port) (0x2408 + (port<<10))
-#define MV64360_ETH_GMII_SERIAL_PARAMETRS_REG(port) (0x240c + (port<<10))
-#define MV64360_ETH_VLAN_ETHERTYPE_REG(port) (0x2410 + (port<<10))
-#define MV64360_ETH_MAC_ADDR_LOW(port) (0x2414 + (port<<10))
-#define MV64360_ETH_MAC_ADDR_HIGH(port) (0x2418 + (port<<10))
-#define MV64360_ETH_SDMA_CONFIG_REG(port) (0x241c + (port<<10))
-#define MV64360_ETH_DSCP_0(port) (0x2420 + (port<<10))
-#define MV64360_ETH_DSCP_1(port) (0x2424 + (port<<10))
-#define MV64360_ETH_DSCP_2(port) (0x2428 + (port<<10))
-#define MV64360_ETH_DSCP_3(port) (0x242c + (port<<10))
-#define MV64360_ETH_DSCP_4(port) (0x2430 + (port<<10))
-#define MV64360_ETH_DSCP_5(port) (0x2434 + (port<<10))
-#define MV64360_ETH_DSCP_6(port) (0x2438 + (port<<10))
-#define MV64360_ETH_PORT_SERIAL_CONTROL_REG(port) (0x243c + (port<<10))
-#define MV64360_ETH_VLAN_PRIORITY_TAG_TO_PRIORITY(port) (0x2440 + (port<<10))
-#define MV64360_ETH_PORT_STATUS_REG(port) (0x2444 + (port<<10))
-#define MV64360_ETH_TRANSMIT_QUEUE_COMMAND_REG(port) (0x2448 + (port<<10))
-#define MV64360_ETH_TX_QUEUE_FIXED_PRIORITY(port) (0x244c + (port<<10))
-#define MV64360_ETH_PORT_TX_TOKEN_BUCKET_RATE_CONFIG(port) (0x2450 + (port<<10))
-#define MV64360_ETH_MAXIMUM_TRANSMIT_UNIT(port) (0x2458 + (port<<10))
-#define MV64360_ETH_PORT_MAXIMUM_TOKEN_BUCKET_SIZE(port) (0x245c + (port<<10))
-#define MV64360_ETH_INTERRUPT_CAUSE_REG(port) (0x2460 + (port<<10))
-#define MV64360_ETH_INTERRUPT_CAUSE_EXTEND_REG(port) (0x2464 + (port<<10))
-#define MV64360_ETH_INTERRUPT_MASK_REG(port) (0x2468 + (port<<10))
-#define MV64360_ETH_INTERRUPT_EXTEND_MASK_REG(port) (0x246c + (port<<10))
-#define MV64360_ETH_RX_FIFO_URGENT_THRESHOLD_REG(port) (0x2470 + (port<<10))
-#define MV64360_ETH_TX_FIFO_URGENT_THRESHOLD_REG(port) (0x2474 + (port<<10))
-#define MV64360_ETH_RX_MINIMAL_FRAME_SIZE_REG(port) (0x247c + (port<<10))
-#define MV64360_ETH_RX_DISCARDED_FRAMES_COUNTER(port) (0x2484 + (port<<10)
-#define MV64360_ETH_PORT_DEBUG_0_REG(port) (0x248c + (port<<10))
-#define MV64360_ETH_PORT_DEBUG_1_REG(port) (0x2490 + (port<<10))
-#define MV64360_ETH_PORT_INTERNAL_ADDR_ERROR_REG(port) (0x2494 + (port<<10))
-#define MV64360_ETH_INTERNAL_USE_REG(port) (0x24fc + (port<<10))
-#define MV64360_ETH_RECEIVE_QUEUE_COMMAND_REG(port) (0x2680 + (port<<10))
-#define MV64360_ETH_CURRENT_SERVED_TX_DESC_PTR(port) (0x2684 + (port<<10))
-#define MV64360_ETH_RX_CURRENT_QUEUE_DESC_PTR_0(port) (0x260c + (port<<10))
-#define MV64360_ETH_RX_CURRENT_QUEUE_DESC_PTR_1(port) (0x261c + (port<<10))
-#define MV64360_ETH_RX_CURRENT_QUEUE_DESC_PTR_2(port) (0x262c + (port<<10))
-#define MV64360_ETH_RX_CURRENT_QUEUE_DESC_PTR_3(port) (0x263c + (port<<10))
-#define MV64360_ETH_RX_CURRENT_QUEUE_DESC_PTR_4(port) (0x264c + (port<<10))
-#define MV64360_ETH_RX_CURRENT_QUEUE_DESC_PTR_5(port) (0x265c + (port<<10))
-#define MV64360_ETH_RX_CURRENT_QUEUE_DESC_PTR_6(port) (0x266c + (port<<10))
-#define MV64360_ETH_RX_CURRENT_QUEUE_DESC_PTR_7(port) (0x267c + (port<<10))
-#define MV64360_ETH_TX_CURRENT_QUEUE_DESC_PTR_0(port) (0x26c0 + (port<<10))
-#define MV64360_ETH_TX_CURRENT_QUEUE_DESC_PTR_1(port) (0x26c4 + (port<<10))
-#define MV64360_ETH_TX_CURRENT_QUEUE_DESC_PTR_2(port) (0x26c8 + (port<<10))
-#define MV64360_ETH_TX_CURRENT_QUEUE_DESC_PTR_3(port) (0x26cc + (port<<10))
-#define MV64360_ETH_TX_CURRENT_QUEUE_DESC_PTR_4(port) (0x26d0 + (port<<10))
-#define MV64360_ETH_TX_CURRENT_QUEUE_DESC_PTR_5(port) (0x26d4 + (port<<10))
-#define MV64360_ETH_TX_CURRENT_QUEUE_DESC_PTR_6(port) (0x26d8 + (port<<10))
-#define MV64360_ETH_TX_CURRENT_QUEUE_DESC_PTR_7(port) (0x26dc + (port<<10))
-#define MV64360_ETH_TX_QUEUE_0_TOKEN_BUCKET_COUNT(port) (0x2700 + (port<<10))
-#define MV64360_ETH_TX_QUEUE_1_TOKEN_BUCKET_COUNT(port) (0x2710 + (port<<10))
-#define MV64360_ETH_TX_QUEUE_2_TOKEN_BUCKET_COUNT(port) (0x2720 + (port<<10))
-#define MV64360_ETH_TX_QUEUE_3_TOKEN_BUCKET_COUNT(port) (0x2730 + (port<<10))
-#define MV64360_ETH_TX_QUEUE_4_TOKEN_BUCKET_COUNT(port) (0x2740 + (port<<10))
-#define MV64360_ETH_TX_QUEUE_5_TOKEN_BUCKET_COUNT(port) (0x2750 + (port<<10))
-#define MV64360_ETH_TX_QUEUE_6_TOKEN_BUCKET_COUNT(port) (0x2760 + (port<<10))
-#define MV64360_ETH_TX_QUEUE_7_TOKEN_BUCKET_COUNT(port) (0x2770 + (port<<10))
-#define MV64360_ETH_TX_QUEUE_0_TOKEN_BUCKET_CONFIG(port) (0x2704 + (port<<10))
-#define MV64360_ETH_TX_QUEUE_1_TOKEN_BUCKET_CONFIG(port) (0x2714 + (port<<10))
-#define MV64360_ETH_TX_QUEUE_2_TOKEN_BUCKET_CONFIG(port) (0x2724 + (port<<10))
-#define MV64360_ETH_TX_QUEUE_3_TOKEN_BUCKET_CONFIG(port) (0x2734 + (port<<10))
-#define MV64360_ETH_TX_QUEUE_4_TOKEN_BUCKET_CONFIG(port) (0x2744 + (port<<10))
-#define MV64360_ETH_TX_QUEUE_5_TOKEN_BUCKET_CONFIG(port) (0x2754 + (port<<10))
-#define MV64360_ETH_TX_QUEUE_6_TOKEN_BUCKET_CONFIG(port) (0x2764 + (port<<10))
-#define MV64360_ETH_TX_QUEUE_7_TOKEN_BUCKET_CONFIG(port) (0x2774 + (port<<10))
-#define MV64360_ETH_TX_QUEUE_0_ARBITER_CONFIG(port) (0x2708 + (port<<10))
-#define MV64360_ETH_TX_QUEUE_1_ARBITER_CONFIG(port) (0x2718 + (port<<10))
-#define MV64360_ETH_TX_QUEUE_2_ARBITER_CONFIG(port) (0x2728 + (port<<10))
-#define MV64360_ETH_TX_QUEUE_3_ARBITER_CONFIG(port) (0x2738 + (port<<10))
-#define MV64360_ETH_TX_QUEUE_4_ARBITER_CONFIG(port) (0x2748 + (port<<10))
-#define MV64360_ETH_TX_QUEUE_5_ARBITER_CONFIG(port) (0x2758 + (port<<10))
-#define MV64360_ETH_TX_QUEUE_6_ARBITER_CONFIG(port) (0x2768 + (port<<10))
-#define MV64360_ETH_TX_QUEUE_7_ARBITER_CONFIG(port) (0x2778 + (port<<10))
-#define MV64360_ETH_PORT_TX_TOKEN_BUCKET_COUNT(port) (0x2780 + (port<<10))
-#define MV64360_ETH_DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE(port) (0x3400 + (port<<10))
-#define MV64360_ETH_DA_FILTER_OTHER_MULTICAST_TABLE_BASE(port) (0x3500 + (port<<10))
-#define MV64360_ETH_DA_FILTER_UNICAST_TABLE_BASE(port) (0x3600 + (port<<10))
-
-/*******************************************/
-/* CUNIT Registers */
-/*******************************************/
-
- /* Address Decoding Register Map */
-
-#define MV64360_CUNIT_BASE_ADDR_REG0 0xf200
-#define MV64360_CUNIT_BASE_ADDR_REG1 0xf208
-#define MV64360_CUNIT_BASE_ADDR_REG2 0xf210
-#define MV64360_CUNIT_BASE_ADDR_REG3 0xf218
-#define MV64360_CUNIT_SIZE0 0xf204
-#define MV64360_CUNIT_SIZE1 0xf20c
-#define MV64360_CUNIT_SIZE2 0xf214
-#define MV64360_CUNIT_SIZE3 0xf21c
-#define MV64360_CUNIT_HIGH_ADDR_REMAP_REG0 0xf240
-#define MV64360_CUNIT_HIGH_ADDR_REMAP_REG1 0xf244
-#define MV64360_CUNIT_BASE_ADDR_ENABLE_REG 0xf250
-#define MV64360_MPSC0_ACCESS_PROTECTION_REG 0xf254
-#define MV64360_MPSC1_ACCESS_PROTECTION_REG 0xf258
-#define MV64360_CUNIT_INTERNAL_SPACE_BASE_ADDR_REG 0xf25C
-
- /* Error Report Registers */
-
-#define MV64360_CUNIT_INTERRUPT_CAUSE_REG 0xf310
-#define MV64360_CUNIT_INTERRUPT_MASK_REG 0xf314
-#define MV64360_CUNIT_ERROR_ADDR 0xf318
-
- /* Cunit Control Registers */
-
-#define MV64360_CUNIT_ARBITER_CONTROL_REG 0xf300
-#define MV64360_CUNIT_CONFIG_REG 0xb40c
-#define MV64360_CUNIT_CRROSBAR_TIMEOUT_REG 0xf304
-
- /* Cunit Debug Registers */
-
-#define MV64360_CUNIT_DEBUG_LOW 0xf340
-#define MV64360_CUNIT_DEBUG_HIGH 0xf344
-#define MV64360_CUNIT_MMASK 0xf380
-
- /* Cunit Base Address Enable Window Bits*/
-#define MV64360_CUNIT_BASE_ADDR_WIN_0_BIT 0x0
-#define MV64360_CUNIT_BASE_ADDR_WIN_1_BIT 0x1
-#define MV64360_CUNIT_BASE_ADDR_WIN_2_BIT 0x2
-#define MV64360_CUNIT_BASE_ADDR_WIN_3_BIT 0x3
-
- /* MPSCs Clocks Routing Registers */
-
-#define MV64360_MPSC_ROUTING_REG 0xb400
-#define MV64360_MPSC_RX_CLOCK_ROUTING_REG 0xb404
-#define MV64360_MPSC_TX_CLOCK_ROUTING_REG 0xb408
-
- /* MPSCs Interrupts Registers */
-
-#define MV64360_MPSC_CAUSE_REG(port) (0xb804 + (port<<3))
-#define MV64360_MPSC_MASK_REG(port) (0xb884 + (port<<3))
-
-#define MV64360_MPSC_MAIN_CONFIG_LOW(port) (0x8000 + (port<<12))
-#define MV64360_MPSC_MAIN_CONFIG_HIGH(port) (0x8004 + (port<<12))
-#define MV64360_MPSC_PROTOCOL_CONFIG(port) (0x8008 + (port<<12))
-#define MV64360_MPSC_CHANNEL_REG1(port) (0x800c + (port<<12))
-#define MV64360_MPSC_CHANNEL_REG2(port) (0x8010 + (port<<12))
-#define MV64360_MPSC_CHANNEL_REG3(port) (0x8014 + (port<<12))
-#define MV64360_MPSC_CHANNEL_REG4(port) (0x8018 + (port<<12))
-#define MV64360_MPSC_CHANNEL_REG5(port) (0x801c + (port<<12))
-#define MV64360_MPSC_CHANNEL_REG6(port) (0x8020 + (port<<12))
-#define MV64360_MPSC_CHANNEL_REG7(port) (0x8024 + (port<<12))
-#define MV64360_MPSC_CHANNEL_REG8(port) (0x8028 + (port<<12))
-#define MV64360_MPSC_CHANNEL_REG9(port) (0x802c + (port<<12))
-#define MV64360_MPSC_CHANNEL_REG10(port) (0x8030 + (port<<12))
-
- /* MPSC0 Registers */
-
-
-/***************************************/
-/* SDMA Registers */
-/***************************************/
-
-#define MV64360_SDMA_CONFIG_REG(channel) (0x4000 + (channel<<13))
-#define MV64360_SDMA_COMMAND_REG(channel) (0x4008 + (channel<<13))
-#define MV64360_SDMA_CURRENT_RX_DESCRIPTOR_POINTER(channel) (0x4810 + (channel<<13))
-#define MV64360_SDMA_CURRENT_TX_DESCRIPTOR_POINTER(channel) (0x4c10 + (channel<<13))
-#define MV64360_SDMA_FIRST_TX_DESCRIPTOR_POINTER(channel) (0x4c14 + (channel<<13))
-
-#define MV64360_SDMA_CAUSE_REG 0xb800
-#define MV64360_SDMA_MASK_REG 0xb880
-
-
-/****************************************/
-/* SDMA Address Space Targets */
-/****************************************/
-
-#define MV64360_SDMA_DRAM_CS_0_TARGET 0x0e00
-#define MV64360_SDMA_DRAM_CS_1_TARGET 0x0d00
-#define MV64360_SDMA_DRAM_CS_2_TARGET 0x0b00
-#define MV64360_SDMA_DRAM_CS_3_TARGET 0x0700
-
-#define MV64360_SDMA_DEV_CS_0_TARGET 0x1e01
-#define MV64360_SDMA_DEV_CS_1_TARGET 0x1d01
-#define MV64360_SDMA_DEV_CS_2_TARGET 0x1b01
-#define MV64360_SDMA_DEV_CS_3_TARGET 0x1701
-
-#define MV64360_SDMA_BOOT_CS_TARGET 0x0f00
-
-#define MV64360_SDMA_SRAM_TARGET 0x0003
-#define MV64360_SDMA_60X_BUS_TARGET 0x4003
-
-#define MV64360_PCI_0_TARGET 0x0003
-#define MV64360_PCI_1_TARGET 0x0004
-
-
-/* Devices BAR and size registers */
-
-#define MV64360_DEV_CS0_BASE_ADDR 0x028
-#define MV64360_DEV_CS0_SIZE 0x030
-#define MV64360_DEV_CS1_BASE_ADDR 0x228
-#define MV64360_DEV_CS1_SIZE 0x230
-#define MV64360_DEV_CS2_BASE_ADDR 0x248
-#define MV64360_DEV_CS2_SIZE 0x250
-#define MV64360_DEV_CS3_BASE_ADDR 0x038
-#define MV64360_DEV_CS3_SIZE 0x040
-#define MV64360_BOOTCS_BASE_ADDR 0x238
-#define MV64360_BOOTCS_SIZE 0x240
-
-/* SDMA Window access protection */
-#define MV64360_SDMA_WIN_ACCESS_NOT_ALLOWED 0
-#define MV64360_SDMA_WIN_ACCESS_READ_ONLY 1
-#define MV64360_SDMA_WIN_ACCESS_FULL 2
-
-/* BRG Interrupts */
-
-#define MV64360_BRG_CONFIG_REG(brg) (0xb200 + (brg<<3))
-#define MV64360_BRG_BAUDE_TUNING_REG(brg) (0xb204 + (brg<<3))
-#define MV64360_BRG_CAUSE_REG 0xb834
-#define MV64360_BRG_MASK_REG 0xb8b4
-
-/****************************************/
-/* DMA Channel Control */
-/****************************************/
-
-#define MV64360_DMA_CHANNEL0_CONTROL 0x840
-#define MV64360_DMA_CHANNEL0_CONTROL_HIGH 0x880
-#define MV64360_DMA_CHANNEL1_CONTROL 0x844
-#define MV64360_DMA_CHANNEL1_CONTROL_HIGH 0x884
-#define MV64360_DMA_CHANNEL2_CONTROL 0x848
-#define MV64360_DMA_CHANNEL2_CONTROL_HIGH 0x888
-#define MV64360_DMA_CHANNEL3_CONTROL 0x84C
-#define MV64360_DMA_CHANNEL3_CONTROL_HIGH 0x88C
-
-
-/****************************************/
-/* IDMA Registers */
-/****************************************/
-
-#define MV64360_DMA_CHANNEL0_BYTE_COUNT 0x800
-#define MV64360_DMA_CHANNEL1_BYTE_COUNT 0x804
-#define MV64360_DMA_CHANNEL2_BYTE_COUNT 0x808
-#define MV64360_DMA_CHANNEL3_BYTE_COUNT 0x80C
-#define MV64360_DMA_CHANNEL0_SOURCE_ADDR 0x810
-#define MV64360_DMA_CHANNEL1_SOURCE_ADDR 0x814
-#define MV64360_DMA_CHANNEL2_SOURCE_ADDR 0x818
-#define MV64360_DMA_CHANNEL3_SOURCE_ADDR 0x81c
-#define MV64360_DMA_CHANNEL0_DESTINATION_ADDR 0x820
-#define MV64360_DMA_CHANNEL1_DESTINATION_ADDR 0x824
-#define MV64360_DMA_CHANNEL2_DESTINATION_ADDR 0x828
-#define MV64360_DMA_CHANNEL3_DESTINATION_ADDR 0x82C
-#define MV64360_DMA_CHANNEL0_NEXT_DESCRIPTOR_POINTER 0x830
-#define MV64360_DMA_CHANNEL1_NEXT_DESCRIPTOR_POINTER 0x834
-#define MV64360_DMA_CHANNEL2_NEXT_DESCRIPTOR_POINTER 0x838
-#define MV64360_DMA_CHANNEL3_NEXT_DESCRIPTOR_POINTER 0x83C
-#define MV64360_DMA_CHANNEL0_CURRENT_DESCRIPTOR_POINTER 0x870
-#define MV64360_DMA_CHANNEL1_CURRENT_DESCRIPTOR_POINTER 0x874
-#define MV64360_DMA_CHANNEL2_CURRENT_DESCRIPTOR_POINTER 0x878
-#define MV64360_DMA_CHANNEL3_CURRENT_DESCRIPTOR_POINTER 0x87C
-
- /* IDMA Address Decoding Base Address Registers */
-
-#define MV64360_DMA_BASE_ADDR_REG0 0xa00
-#define MV64360_DMA_BASE_ADDR_REG1 0xa08
-#define MV64360_DMA_BASE_ADDR_REG2 0xa10
-#define MV64360_DMA_BASE_ADDR_REG3 0xa18
-#define MV64360_DMA_BASE_ADDR_REG4 0xa20
-#define MV64360_DMA_BASE_ADDR_REG5 0xa28
-#define MV64360_DMA_BASE_ADDR_REG6 0xa30
-#define MV64360_DMA_BASE_ADDR_REG7 0xa38
-
- /* IDMA Address Decoding Size Address Register */
-
-#define MV64360_DMA_SIZE_REG0 0xa04
-#define MV64360_DMA_SIZE_REG1 0xa0c
-#define MV64360_DMA_SIZE_REG2 0xa14
-#define MV64360_DMA_SIZE_REG3 0xa1c
-#define MV64360_DMA_SIZE_REG4 0xa24
-#define MV64360_DMA_SIZE_REG5 0xa2c
-#define MV64360_DMA_SIZE_REG6 0xa34
-#define MV64360_DMA_SIZE_REG7 0xa3C
-
- /* IDMA Address Decoding High Address Remap and Access
- Protection Registers */
-
-#define MV64360_DMA_HIGH_ADDR_REMAP_REG0 0xa60
-#define MV64360_DMA_HIGH_ADDR_REMAP_REG1 0xa64
-#define MV64360_DMA_HIGH_ADDR_REMAP_REG2 0xa68
-#define MV64360_DMA_HIGH_ADDR_REMAP_REG3 0xa6C
-#define MV64360_DMA_BASE_ADDR_ENABLE_REG 0xa80
-#define MV64360_DMA_CHANNEL0_ACCESS_PROTECTION_REG 0xa70
-#define MV64360_DMA_CHANNEL1_ACCESS_PROTECTION_REG 0xa74
-#define MV64360_DMA_CHANNEL2_ACCESS_PROTECTION_REG 0xa78
-#define MV64360_DMA_CHANNEL3_ACCESS_PROTECTION_REG 0xa7c
-#define MV64360_DMA_ARBITER_CONTROL 0x860
-#define MV64360_DMA_CROSS_BAR_TIMEOUT 0x8d0
-
- /* IDMA Headers Retarget Registers */
-
-#define MV64360_DMA_HEADERS_RETARGET_CONTROL 0xa84
-#define MV64360_DMA_HEADERS_RETARGET_BASE 0xa88
-
- /* IDMA Interrupt Register */
-
-#define MV64360_DMA_INTERRUPT_CAUSE_REG 0x8c0
-#define MV64360_DMA_INTERRUPT_CAUSE_MASK 0x8c4
-#define MV64360_DMA_ERROR_ADDR 0x8c8
-#define MV64360_DMA_ERROR_SELECT 0x8cc
-
- /* IDMA Debug Register ( for internal use ) */
-
-#define MV64360_DMA_DEBUG_LOW 0x8e0
-#define MV64360_DMA_DEBUG_HIGH 0x8e4
-#define MV64360_DMA_SPARE 0xA8C
-
-/****************************************/
-/* Timer_Counter */
-/****************************************/
-
-#define MV64360_TIMER_COUNTER0 0x850
-#define MV64360_TIMER_COUNTER1 0x854
-#define MV64360_TIMER_COUNTER2 0x858
-#define MV64360_TIMER_COUNTER3 0x85C
-#define MV64360_TIMER_COUNTER_0_3_CONTROL 0x864
-#define MV64360_TIMER_COUNTER_0_3_INTERRUPT_CAUSE 0x868
-#define MV64360_TIMER_COUNTER_0_3_INTERRUPT_MASK 0x86c
-
-/****************************************/
-/* Watchdog registers */
-/****************************************/
-
-#define MV64360_WATCHDOG_CONFIG_REG 0xb410
-#define MV64360_WATCHDOG_VALUE_REG 0xb414
-
-/****************************************/
-/* I2C Registers */
-/****************************************/
-
-#define MV64360_I2C_SLAVE_ADDR 0xc000
-#define MV64360_I2C_EXTENDED_SLAVE_ADDR 0xc010
-#define MV64360_I2C_DATA 0xc004
-#define MV64360_I2C_CONTROL 0xc008
-#define MV64360_I2C_STATUS_BAUDE_RATE 0xc00C
-#define MV64360_I2C_SOFT_RESET 0xc01c
-
-/****************************************/
-/* GPP Interface Registers */
-/****************************************/
-
-#define MV64360_GPP_IO_CONTROL 0xf100
-#define MV64360_GPP_LEVEL_CONTROL 0xf110
-#define MV64360_GPP_VALUE 0xf104
-#define MV64360_GPP_INTERRUPT_CAUSE 0xf108
-#define MV64360_GPP_INTERRUPT_MASK0 0xf10c
-#define MV64360_GPP_INTERRUPT_MASK1 0xf114
-#define MV64360_GPP_VALUE_SET 0xf118
-#define MV64360_GPP_VALUE_CLEAR 0xf11c
-
-/****************************************/
-/* Interrupt Controller Registers */
-/****************************************/
-
-/****************************************/
-/* Interrupts */
-/****************************************/
-
-#define MV64360_MAIN_INTERRUPT_CAUSE_LOW 0x004
-#define MV64360_MAIN_INTERRUPT_CAUSE_HIGH 0x00c
-#define MV64360_CPU_INTERRUPT0_MASK_LOW 0x014
-#define MV64360_CPU_INTERRUPT0_MASK_HIGH 0x01c
-#define MV64360_CPU_INTERRUPT0_SELECT_CAUSE 0x024
-#define MV64360_CPU_INTERRUPT1_MASK_LOW 0x034
-#define MV64360_CPU_INTERRUPT1_MASK_HIGH 0x03c
-#define MV64360_CPU_INTERRUPT1_SELECT_CAUSE 0x044
-#define MV64360_INTERRUPT0_MASK_0_LOW 0x054
-#define MV64360_INTERRUPT0_MASK_0_HIGH 0x05c
-#define MV64360_INTERRUPT0_SELECT_CAUSE 0x064
-#define MV64360_INTERRUPT1_MASK_0_LOW 0x074
-#define MV64360_INTERRUPT1_MASK_0_HIGH 0x07c
-#define MV64360_INTERRUPT1_SELECT_CAUSE 0x084
-
-/****************************************/
-/* MPP Interface Registers */
-/****************************************/
-
-#define MV64360_MPP_CONTROL0 0xf000
-#define MV64360_MPP_CONTROL1 0xf004
-#define MV64360_MPP_CONTROL2 0xf008
-#define MV64360_MPP_CONTROL3 0xf00c
-
-/****************************************/
-/* Serial Initialization registers */
-/****************************************/
-
-#define MV64360_SERIAL_INIT_LAST_DATA 0xf324
-#define MV64360_SERIAL_INIT_CONTROL 0xf328
-#define MV64360_SERIAL_INIT_STATUS 0xf32c
-
-
-#endif /* __INCgt64360rh */
diff --git a/board/esd/cpci750/pci.c b/board/esd/cpci750/pci.c
deleted file mode 100644
index 3e44fb9737..0000000000
--- a/board/esd/cpci750/pci.c
+++ /dev/null
@@ -1,961 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- */
-/* PCI.c - PCI functions */
-
-
-#include <common.h>
-#ifdef CONFIG_PCI
-#include <pci.h>
-
-#ifdef CONFIG_PCI_PNP
-void pciauto_config_init(struct pci_controller *hose);
-int pciauto_region_allocate(struct pci_region* res, unsigned int size, unsigned int *bar);
-#endif
-
-#include "../../Marvell/include/pci.h"
-
-#undef DEBUG
-#undef IDE_SET_NATIVE_MODE
-static unsigned int local_buses[] = { 0, 0 };
-
-static const unsigned char pci_irq_swizzle[2][PCI_MAX_DEVICES] = {
- {0, 0, 0, 0, 0, 0, 0, 27, 27, [9 ... PCI_MAX_DEVICES - 1] = 0 },
- {0, 0, 0, 0, 0, 0, 0, 29, 29, [9 ... PCI_MAX_DEVICES - 1] = 0 },
-};
-
-
-#ifdef DEBUG
-static const unsigned int pci_bus_list[] = { PCI_0_MODE, PCI_1_MODE };
-static void gt_pci_bus_mode_display (PCI_HOST host)
-{
- unsigned int mode;
-
-
- mode = (GTREGREAD (pci_bus_list[host]) & (BIT4 | BIT5)) >> 4;
- switch (mode) {
- case 0:
- printf ("PCI %d bus mode: Conventional PCI\n", host);
- break;
- case 1:
- printf ("PCI %d bus mode: 66 Mhz PCIX\n", host);
- break;
- case 2:
- printf ("PCI %d bus mode: 100 Mhz PCIX\n", host);
- break;
- case 3:
- printf ("PCI %d bus mode: 133 Mhz PCIX\n", host);
- break;
- default:
- printf ("Unknown BUS %d\n", mode);
- }
-}
-#endif
-
-static const unsigned int pci_p2p_configuration_reg[] = {
- PCI_0P2P_CONFIGURATION, PCI_1P2P_CONFIGURATION
-};
-
-static const unsigned int pci_configuration_address[] = {
- PCI_0CONFIGURATION_ADDRESS, PCI_1CONFIGURATION_ADDRESS
-};
-
-static const unsigned int pci_configuration_data[] = {
- PCI_0CONFIGURATION_DATA_VIRTUAL_REGISTER,
- PCI_1CONFIGURATION_DATA_VIRTUAL_REGISTER
-};
-
-static const unsigned int pci_error_cause_reg[] = {
- PCI_0ERROR_CAUSE, PCI_1ERROR_CAUSE
-};
-
-static const unsigned int pci_arbiter_control[] = {
- PCI_0ARBITER_CONTROL, PCI_1ARBITER_CONTROL
-};
-
-static const unsigned int pci_address_space_en[] = {
- PCI_0_BASE_ADDR_REG_ENABLE, PCI_1_BASE_ADDR_REG_ENABLE
-};
-
-static const unsigned int pci_snoop_control_base_0_low[] = {
- PCI_0SNOOP_CONTROL_BASE_0_LOW, PCI_1SNOOP_CONTROL_BASE_0_LOW
-};
-static const unsigned int pci_snoop_control_top_0[] = {
- PCI_0SNOOP_CONTROL_TOP_0, PCI_1SNOOP_CONTROL_TOP_0
-};
-
-static const unsigned int pci_access_control_base_0_low[] = {
- PCI_0ACCESS_CONTROL_BASE_0_LOW, PCI_1ACCESS_CONTROL_BASE_0_LOW
-};
-static const unsigned int pci_access_control_top_0[] = {
- PCI_0ACCESS_CONTROL_TOP_0, PCI_1ACCESS_CONTROL_TOP_0
-};
-
-static const unsigned int pci_scs_bank_size[2][4] = {
- {PCI_0SCS_0_BANK_SIZE, PCI_0SCS_1_BANK_SIZE,
- PCI_0SCS_2_BANK_SIZE, PCI_0SCS_3_BANK_SIZE},
- {PCI_1SCS_0_BANK_SIZE, PCI_1SCS_1_BANK_SIZE,
- PCI_1SCS_2_BANK_SIZE, PCI_1SCS_3_BANK_SIZE}
-};
-
-static const unsigned int pci_p2p_configuration[] = {
- PCI_0P2P_CONFIGURATION, PCI_1P2P_CONFIGURATION
-};
-
-
-/********************************************************************
-* pciWriteConfigReg - Write to a PCI configuration register
-* - Make sure the GT is configured as a master before writing
-* to another device on the PCI.
-* - The function takes care of Big/Little endian conversion.
-*
-*
-* Inputs: unsigned int regOffset: The register offset as it apears in the GT spec
-* (or any other PCI device spec)
-* pciDevNum: The device number needs to be addressed.
-*
-* Configuration Address 0xCF8:
-*
-* 31 30 24 23 16 15 11 10 8 7 2 0 <=bit Number
-* |congif|Reserved| Bus |Device|Function|Register|00|
-* |Enable| |Number|Number| Number | Number | | <=field Name
-*
-*********************************************************************/
-void pciWriteConfigReg (PCI_HOST host, unsigned int regOffset,
- unsigned int pciDevNum, unsigned int data)
-{
- volatile unsigned int DataForAddrReg;
- unsigned int functionNum;
- unsigned int busNum = 0;
- unsigned int addr;
-
- if (pciDevNum > 32) /* illegal device Number */
- return;
- if (pciDevNum == SELF) { /* configure our configuration space. */
- pciDevNum =
- (GTREGREAD (pci_p2p_configuration_reg[host]) >> 24) &
- 0x1f;
- busNum = GTREGREAD (pci_p2p_configuration_reg[host]) &
- 0xff0000;
- }
- functionNum = regOffset & 0x00000700;
- pciDevNum = pciDevNum << 11;
- regOffset = regOffset & 0xfc;
- DataForAddrReg =
- (regOffset | pciDevNum | functionNum | busNum) | BIT31;
- GT_REG_WRITE (pci_configuration_address[host], DataForAddrReg);
- GT_REG_READ (pci_configuration_address[host], &addr);
- if (addr != DataForAddrReg)
- return;
- GT_REG_WRITE (pci_configuration_data[host], data);
-}
-
-/********************************************************************
-* pciReadConfigReg - Read from a PCI0 configuration register
-* - Make sure the GT is configured as a master before reading
-* from another device on the PCI.
-* - The function takes care of Big/Little endian conversion.
-* INPUTS: regOffset: The register offset as it apears in the GT spec (or PCI
-* spec)
-* pciDevNum: The device number needs to be addressed.
-* RETURNS: data , if the data == 0xffffffff check the master abort bit in the
-* cause register to make sure the data is valid
-*
-* Configuration Address 0xCF8:
-*
-* 31 30 24 23 16 15 11 10 8 7 2 0 <=bit Number
-* |congif|Reserved| Bus |Device|Function|Register|00|
-* |Enable| |Number|Number| Number | Number | | <=field Name
-*
-*********************************************************************/
-unsigned int pciReadConfigReg (PCI_HOST host, unsigned int regOffset,
- unsigned int pciDevNum)
-{
- volatile unsigned int DataForAddrReg;
- unsigned int data;
- unsigned int functionNum;
- unsigned int busNum = 0;
-
- if (pciDevNum > 32) /* illegal device Number */
- return 0xffffffff;
- if (pciDevNum == SELF) { /* configure our configuration space. */
- pciDevNum =
- (GTREGREAD (pci_p2p_configuration_reg[host]) >> 24) &
- 0x1f;
- busNum = GTREGREAD (pci_p2p_configuration_reg[host]) &
- 0xff0000;
- }
- functionNum = regOffset & 0x00000700;
- pciDevNum = pciDevNum << 11;
- regOffset = regOffset & 0xfc;
- DataForAddrReg =
- (regOffset | pciDevNum | functionNum | busNum) | BIT31;
- GT_REG_WRITE (pci_configuration_address[host], DataForAddrReg);
- GT_REG_READ (pci_configuration_address[host], &data);
- if (data != DataForAddrReg)
- return 0xffffffff;
- GT_REG_READ (pci_configuration_data[host], &data);
- return data;
-}
-
-/********************************************************************
-* pciOverBridgeWriteConfigReg - Write to a PCI configuration register where
-* the agent is placed on another Bus. For more
-* information read P2P in the PCI spec.
-*
-* Inputs: unsigned int regOffset - The register offset as it apears in the
-* GT spec (or any other PCI device spec).
-* unsigned int pciDevNum - The device number needs to be addressed.
-* unsigned int busNum - On which bus does the Target agent connect
-* to.
-* unsigned int data - data to be written.
-*
-* Configuration Address 0xCF8:
-*
-* 31 30 24 23 16 15 11 10 8 7 2 0 <=bit Number
-* |congif|Reserved| Bus |Device|Function|Register|01|
-* |Enable| |Number|Number| Number | Number | | <=field Name
-*
-* The configuration Address is configure as type-I (bits[1:0] = '01') due to
-* PCI spec referring to P2P.
-*
-*********************************************************************/
-void pciOverBridgeWriteConfigReg (PCI_HOST host,
- unsigned int regOffset,
- unsigned int pciDevNum,
- unsigned int busNum, unsigned int data)
-{
- unsigned int DataForReg;
- unsigned int functionNum;
-
- functionNum = regOffset & 0x00000700;
- pciDevNum = pciDevNum << 11;
- regOffset = regOffset & 0xff;
- busNum = busNum << 16;
- if (pciDevNum == SELF) { /* This board */
- DataForReg = (regOffset | pciDevNum | functionNum) | BIT0;
- } else {
- DataForReg = (regOffset | pciDevNum | functionNum | busNum) |
- BIT31 | BIT0;
- }
- GT_REG_WRITE (pci_configuration_address[host], DataForReg);
- GT_REG_WRITE (pci_configuration_data[host], data);
-}
-
-
-/********************************************************************
-* pciOverBridgeReadConfigReg - Read from a PCIn configuration register where
-* the agent target locate on another PCI bus.
-* - Make sure the GT is configured as a master
-* before reading from another device on the PCI.
-* - The function takes care of Big/Little endian
-* conversion.
-* INPUTS: regOffset: The register offset as it apears in the GT spec (or PCI
-* spec). (configuration register offset.)
-* pciDevNum: The device number needs to be addressed.
-* busNum: the Bus number where the agent is place.
-* RETURNS: data , if the data == 0xffffffff check the master abort bit in the
-* cause register to make sure the data is valid
-*
-* Configuration Address 0xCF8:
-*
-* 31 30 24 23 16 15 11 10 8 7 2 0 <=bit Number
-* |congif|Reserved| Bus |Device|Function|Register|01|
-* |Enable| |Number|Number| Number | Number | | <=field Name
-*
-*********************************************************************/
-unsigned int pciOverBridgeReadConfigReg (PCI_HOST host,
- unsigned int regOffset,
- unsigned int pciDevNum,
- unsigned int busNum)
-{
- unsigned int DataForReg;
- unsigned int data;
- unsigned int functionNum;
-
- functionNum = regOffset & 0x00000700;
- pciDevNum = pciDevNum << 11;
- regOffset = regOffset & 0xff;
- busNum = busNum << 16;
- if (pciDevNum == SELF) { /* This board */
- DataForReg = (regOffset | pciDevNum | functionNum) | BIT31;
- } else { /* agent on another bus */
-
- DataForReg = (regOffset | pciDevNum | functionNum | busNum) |
- BIT0 | BIT31;
- }
- GT_REG_WRITE (pci_configuration_address[host], DataForReg);
- GT_REG_READ (pci_configuration_data[host], &data);
- return data;
-}
-
-
-/********************************************************************
-* pciGetRegOffset - Gets the register offset for this region config.
-*
-* INPUT: Bus, Region - The bus and region we ask for its base address.
-* OUTPUT: N/A
-* RETURNS: PCI register base address
-*********************************************************************/
-static unsigned int pciGetRegOffset (PCI_HOST host, PCI_REGION region)
-{
- switch (host) {
- case PCI_HOST0:
- switch (region) {
- case PCI_IO:
- return PCI_0I_O_LOW_DECODE_ADDRESS;
- case PCI_REGION0:
- return PCI_0MEMORY0_LOW_DECODE_ADDRESS;
- case PCI_REGION1:
- return PCI_0MEMORY1_LOW_DECODE_ADDRESS;
- case PCI_REGION2:
- return PCI_0MEMORY2_LOW_DECODE_ADDRESS;
- case PCI_REGION3:
- return PCI_0MEMORY3_LOW_DECODE_ADDRESS;
- }
- case PCI_HOST1:
- switch (region) {
- case PCI_IO:
- return PCI_1I_O_LOW_DECODE_ADDRESS;
- case PCI_REGION0:
- return PCI_1MEMORY0_LOW_DECODE_ADDRESS;
- case PCI_REGION1:
- return PCI_1MEMORY1_LOW_DECODE_ADDRESS;
- case PCI_REGION2:
- return PCI_1MEMORY2_LOW_DECODE_ADDRESS;
- case PCI_REGION3:
- return PCI_1MEMORY3_LOW_DECODE_ADDRESS;
- }
- }
- return PCI_0MEMORY0_LOW_DECODE_ADDRESS;
-}
-
-static unsigned int pciGetRemapOffset (PCI_HOST host, PCI_REGION region)
-{
- switch (host) {
- case PCI_HOST0:
- switch (region) {
- case PCI_IO:
- return PCI_0I_O_ADDRESS_REMAP;
- case PCI_REGION0:
- return PCI_0MEMORY0_ADDRESS_REMAP;
- case PCI_REGION1:
- return PCI_0MEMORY1_ADDRESS_REMAP;
- case PCI_REGION2:
- return PCI_0MEMORY2_ADDRESS_REMAP;
- case PCI_REGION3:
- return PCI_0MEMORY3_ADDRESS_REMAP;
- }
- case PCI_HOST1:
- switch (region) {
- case PCI_IO:
- return PCI_1I_O_ADDRESS_REMAP;
- case PCI_REGION0:
- return PCI_1MEMORY0_ADDRESS_REMAP;
- case PCI_REGION1:
- return PCI_1MEMORY1_ADDRESS_REMAP;
- case PCI_REGION2:
- return PCI_1MEMORY2_ADDRESS_REMAP;
- case PCI_REGION3:
- return PCI_1MEMORY3_ADDRESS_REMAP;
- }
- }
- return PCI_0MEMORY0_ADDRESS_REMAP;
-}
-
-/********************************************************************
-* pciGetBaseAddress - Gets the base address of a PCI.
-* - If the PCI size is 0 then this base address has no meaning!!!
-*
-*
-* INPUT: Bus, Region - The bus and region we ask for its base address.
-* OUTPUT: N/A
-* RETURNS: PCI base address.
-*********************************************************************/
-unsigned int pciGetBaseAddress (PCI_HOST host, PCI_REGION region)
-{
- unsigned int regBase;
- unsigned int regEnd;
- unsigned int regOffset = pciGetRegOffset (host, region);
-
- GT_REG_READ (regOffset, &regBase);
- GT_REG_READ (regOffset + 8, &regEnd);
-
- if (regEnd <= regBase)
- return 0xffffffff; /* ERROR !!! */
-
- regBase = regBase << 16;
- return regBase;
-}
-
-bool pciMapSpace (PCI_HOST host, PCI_REGION region, unsigned int remapBase,
- unsigned int bankBase, unsigned int bankLength)
-{
- unsigned int low = 0xfff;
- unsigned int high = 0x0;
- unsigned int regOffset = pciGetRegOffset (host, region);
- unsigned int remapOffset = pciGetRemapOffset (host, region);
-
- if (bankLength != 0) {
- low = (bankBase >> 16) & 0xffff;
- high = ((bankBase + bankLength) >> 16) - 1;
- }
-
- GT_REG_WRITE (regOffset, low | (1 << 24)); /* no swapping */
- GT_REG_WRITE (regOffset + 8, high);
-
- if (bankLength != 0) { /* must do AFTER writing maps */
- GT_REG_WRITE (remapOffset, remapBase >> 16); /* sorry, 32 bits only.
- dont support upper 32
- in this driver */
- }
- return true;
-}
-
-unsigned int pciGetSpaceBase (PCI_HOST host, PCI_REGION region)
-{
- unsigned int low;
- unsigned int regOffset = pciGetRegOffset (host, region);
-
- GT_REG_READ (regOffset, &low);
- return (low & 0xffff) << 16;
-}
-
-unsigned int pciGetSpaceSize (PCI_HOST host, PCI_REGION region)
-{
- unsigned int low, high;
- unsigned int regOffset = pciGetRegOffset (host, region);
-
- GT_REG_READ (regOffset, &low);
- GT_REG_READ (regOffset + 8, &high);
- return ((high & 0xffff) + 1) << 16;
-}
-
-
-/* ronen - 7/Dec/03*/
-/********************************************************************
-* gtPciDisable/EnableInternalBAR - This function enable/disable PCI BARS.
-* Inputs: one of the PCI BAR
-*********************************************************************/
-void gtPciEnableInternalBAR (PCI_HOST host, PCI_INTERNAL_BAR pciBAR)
-{
- RESET_REG_BITS (pci_address_space_en[host], BIT0 << pciBAR);
-}
-
-void gtPciDisableInternalBAR (PCI_HOST host, PCI_INTERNAL_BAR pciBAR)
-{
- SET_REG_BITS (pci_address_space_en[host], BIT0 << pciBAR);
-}
-
-/********************************************************************
-* pciMapMemoryBank - Maps PCI_host memory bank "bank" for the slave.
-*
-* Inputs: base and size of PCI SCS
-*********************************************************************/
-void pciMapMemoryBank (PCI_HOST host, MEMORY_BANK bank,
- unsigned int pciDramBase, unsigned int pciDramSize)
-{
- /*ronen different function for 3rd bank. */
- unsigned int offset = (bank < 2) ? bank * 8 : 0x100 + (bank - 2) * 8;
-
- pciDramBase = pciDramBase & 0xfffff000;
- pciDramBase = pciDramBase | (pciReadConfigReg (host,
- PCI_SCS_0_BASE_ADDRESS
- + offset,
- SELF) & 0x00000fff);
- pciWriteConfigReg (host, PCI_SCS_0_BASE_ADDRESS + offset, SELF,
- pciDramBase);
- if (pciDramSize == 0)
- pciDramSize++;
- GT_REG_WRITE (pci_scs_bank_size[host][bank], pciDramSize - 1);
- gtPciEnableInternalBAR (host, bank);
-}
-
-/********************************************************************
-* pciSetRegionFeatures - This function modifys one of the 8 regions with
-* feature bits given as an input.
-* - Be advised to check the spec before modifying them.
-* Inputs: PCI_PROTECT_REGION region - one of the eight regions.
-* unsigned int features - See file: pci.h there are defintion for those
-* region features.
-* unsigned int baseAddress - The region base Address.
-* unsigned int topAddress - The region top Address.
-* Returns: false if one of the parameters is erroneous true otherwise.
-*********************************************************************/
-bool pciSetRegionFeatures (PCI_HOST host, PCI_ACCESS_REGIONS region,
- unsigned int features, unsigned int baseAddress,
- unsigned int regionLength)
-{
- unsigned int accessLow;
- unsigned int accessHigh;
- unsigned int accessTop = baseAddress + regionLength;
-
- if (regionLength == 0) { /* close the region. */
- pciDisableAccessRegion (host, region);
- return true;
- }
- /* base Address is store is bits [11:0] */
- accessLow = (baseAddress & 0xfff00000) >> 20;
- /* All the features are update according to the defines in pci.h (to be on
- the safe side we disable bits: [11:0] */
- accessLow = accessLow | (features & 0xfffff000);
- /* write to the Low Access Region register */
- GT_REG_WRITE (pci_access_control_base_0_low[host] + 0x10 * region,
- accessLow);
-
- accessHigh = (accessTop & 0xfff00000) >> 20;
-
- /* write to the High Access Region register */
- GT_REG_WRITE (pci_access_control_top_0[host] + 0x10 * region,
- accessHigh - 1);
- return true;
-}
-
-/********************************************************************
-* pciDisableAccessRegion - Disable The given Region by writing MAX size
-* to its low Address and MIN size to its high Address.
-*
-* Inputs: PCI_ACCESS_REGIONS region - The region we to be Disabled.
-* Returns: N/A.
-*********************************************************************/
-void pciDisableAccessRegion (PCI_HOST host, PCI_ACCESS_REGIONS region)
-{
- /* writing back the registers default values. */
- GT_REG_WRITE (pci_access_control_base_0_low[host] + 0x10 * region,
- 0x01001fff);
- GT_REG_WRITE (pci_access_control_top_0[host] + 0x10 * region, 0);
-}
-
-/********************************************************************
-* pciArbiterEnable - Enables PCI-0`s Arbitration mechanism.
-*
-* Inputs: N/A
-* Returns: true.
-*********************************************************************/
-bool pciArbiterEnable (PCI_HOST host)
-{
- unsigned int regData;
-
- GT_REG_READ (pci_arbiter_control[host], &regData);
- GT_REG_WRITE (pci_arbiter_control[host], regData | BIT31);
- return true;
-}
-
-/********************************************************************
-* pciArbiterDisable - Disable PCI-0`s Arbitration mechanism.
-*
-* Inputs: N/A
-* Returns: true
-*********************************************************************/
-bool pciArbiterDisable (PCI_HOST host)
-{
- unsigned int regData;
-
- GT_REG_READ (pci_arbiter_control[host], &regData);
- GT_REG_WRITE (pci_arbiter_control[host], regData & 0x7fffffff);
- return true;
-}
-
-/********************************************************************
-* pciSetArbiterAgentsPriority - Priority setup for the PCI agents (Hi or Low)
-*
-* Inputs: PCI_AGENT_PRIO internalAgent - priotity for internal agent.
-* PCI_AGENT_PRIO externalAgent0 - priotity for external#0 agent.
-* PCI_AGENT_PRIO externalAgent1 - priotity for external#1 agent.
-* PCI_AGENT_PRIO externalAgent2 - priotity for external#2 agent.
-* PCI_AGENT_PRIO externalAgent3 - priotity for external#3 agent.
-* PCI_AGENT_PRIO externalAgent4 - priotity for external#4 agent.
-* PCI_AGENT_PRIO externalAgent5 - priotity for external#5 agent.
-* Returns: true
-*********************************************************************/
-bool pciSetArbiterAgentsPriority (PCI_HOST host, PCI_AGENT_PRIO internalAgent,
- PCI_AGENT_PRIO externalAgent0,
- PCI_AGENT_PRIO externalAgent1,
- PCI_AGENT_PRIO externalAgent2,
- PCI_AGENT_PRIO externalAgent3,
- PCI_AGENT_PRIO externalAgent4,
- PCI_AGENT_PRIO externalAgent5)
-{
- unsigned int regData;
- unsigned int writeData;
-
- GT_REG_READ (pci_arbiter_control[host], &regData);
- writeData = (internalAgent << 7) + (externalAgent0 << 8) +
- (externalAgent1 << 9) + (externalAgent2 << 10) +
- (externalAgent3 << 11) + (externalAgent4 << 12) +
- (externalAgent5 << 13);
- regData = (regData & 0xffffc07f) | writeData;
- GT_REG_WRITE (pci_arbiter_control[host], regData & regData);
- return true;
-}
-
-/********************************************************************
-* pciParkingDisable - Park on last option disable, with this function you can
-* disable the park on last mechanism for each agent.
-* disabling this option for all agents results parking
-* on the internal master.
-*
-* Inputs: PCI_AGENT_PARK internalAgent - parking Disable for internal agent.
-* PCI_AGENT_PARK externalAgent0 - parking Disable for external#0 agent.
-* PCI_AGENT_PARK externalAgent1 - parking Disable for external#1 agent.
-* PCI_AGENT_PARK externalAgent2 - parking Disable for external#2 agent.
-* PCI_AGENT_PARK externalAgent3 - parking Disable for external#3 agent.
-* PCI_AGENT_PARK externalAgent4 - parking Disable for external#4 agent.
-* PCI_AGENT_PARK externalAgent5 - parking Disable for external#5 agent.
-* Returns: true
-*********************************************************************/
-bool pciParkingDisable (PCI_HOST host, PCI_AGENT_PARK internalAgent,
- PCI_AGENT_PARK externalAgent0,
- PCI_AGENT_PARK externalAgent1,
- PCI_AGENT_PARK externalAgent2,
- PCI_AGENT_PARK externalAgent3,
- PCI_AGENT_PARK externalAgent4,
- PCI_AGENT_PARK externalAgent5)
-{
- unsigned int regData;
- unsigned int writeData;
-
- GT_REG_READ (pci_arbiter_control[host], &regData);
- writeData = (internalAgent << 14) + (externalAgent0 << 15) +
- (externalAgent1 << 16) + (externalAgent2 << 17) +
- (externalAgent3 << 18) + (externalAgent4 << 19) +
- (externalAgent5 << 20);
- regData = (regData & ~(0x7f << 14)) | writeData;
- GT_REG_WRITE (pci_arbiter_control[host], regData);
- return true;
-}
-
-/********************************************************************
-* pciEnableBrokenAgentDetection - A master is said to be broken if it fails to
-* respond to grant assertion within a window specified in
-* the input value: 'brokenValue'.
-*
-* Inputs: unsigned char brokenValue - A value which limits the Master to hold the
-* grant without asserting frame.
-* Returns: Error for illegal broken value otherwise true.
-*********************************************************************/
-bool pciEnableBrokenAgentDetection (PCI_HOST host, unsigned char brokenValue)
-{
- unsigned int data;
- unsigned int regData;
-
- if (brokenValue > 0xf)
- return false; /* brokenValue must be 4 bit */
- data = brokenValue << 3;
- GT_REG_READ (pci_arbiter_control[host], &regData);
- regData = (regData & 0xffffff87) | data;
- GT_REG_WRITE (pci_arbiter_control[host], regData | BIT1);
- return true;
-}
-
-/********************************************************************
-* pciDisableBrokenAgentDetection - This function disable the Broken agent
-* Detection mechanism.
-* NOTE: This operation may cause a dead lock on the
-* pci0 arbitration.
-*
-* Inputs: N/A
-* Returns: true.
-*********************************************************************/
-bool pciDisableBrokenAgentDetection (PCI_HOST host)
-{
- unsigned int regData;
-
- GT_REG_READ (pci_arbiter_control[host], &regData);
- regData = regData & 0xfffffffd;
- GT_REG_WRITE (pci_arbiter_control[host], regData);
- return true;
-}
-
-/********************************************************************
-* pciP2PConfig - This function set the PCI_n P2P configurate.
-* For more information on the P2P read PCI spec.
-*
-* Inputs: unsigned int SecondBusLow - Secondery PCI interface Bus Range Lower
-* Boundry.
-* unsigned int SecondBusHigh - Secondry PCI interface Bus Range upper
-* Boundry.
-* unsigned int busNum - The CPI bus number to which the PCI interface
-* is connected.
-* unsigned int devNum - The PCI interface's device number.
-*
-* Returns: true.
-*********************************************************************/
-bool pciP2PConfig (PCI_HOST host, unsigned int SecondBusLow,
- unsigned int SecondBusHigh,
- unsigned int busNum, unsigned int devNum)
-{
- unsigned int regData;
-
- regData = (SecondBusLow & 0xff) | ((SecondBusHigh & 0xff) << 8) |
- ((busNum & 0xff) << 16) | ((devNum & 0x1f) << 24);
- GT_REG_WRITE (pci_p2p_configuration[host], regData);
- return true;
-}
-
-/********************************************************************
-* pciSetRegionSnoopMode - This function modifys one of the 4 regions which
-* supports Cache Coherency in the PCI_n interface.
-* Inputs: region - One of the four regions.
-* snoopType - There is four optional Types:
-* 1. No Snoop.
-* 2. Snoop to WT region.
-* 3. Snoop to WB region.
-* 4. Snoop & Invalidate to WB region.
-* baseAddress - Base Address of this region.
-* regionLength - Region length.
-* Returns: false if one of the parameters is wrong otherwise return true.
-*********************************************************************/
-bool pciSetRegionSnoopMode (PCI_HOST host, PCI_SNOOP_REGION region,
- PCI_SNOOP_TYPE snoopType,
- unsigned int baseAddress,
- unsigned int regionLength)
-{
- unsigned int snoopXbaseAddress;
- unsigned int snoopXtopAddress;
- unsigned int data;
- unsigned int snoopHigh = baseAddress + regionLength;
-
- if ((region > PCI_SNOOP_REGION3) || (snoopType > PCI_SNOOP_WB))
- return false;
- snoopXbaseAddress =
- pci_snoop_control_base_0_low[host] + 0x10 * region;
- snoopXtopAddress = pci_snoop_control_top_0[host] + 0x10 * region;
- if (regionLength == 0) { /* closing the region */
- GT_REG_WRITE (snoopXbaseAddress, 0x0000ffff);
- GT_REG_WRITE (snoopXtopAddress, 0);
- return true;
- }
- baseAddress = baseAddress & 0xfff00000; /* Granularity of 1MByte */
- data = (baseAddress >> 20) | snoopType << 12;
- GT_REG_WRITE (snoopXbaseAddress, data);
- snoopHigh = (snoopHigh & 0xfff00000) >> 20;
- GT_REG_WRITE (snoopXtopAddress, snoopHigh - 1);
- return true;
-}
-
-static int gt_read_config_dword (struct pci_controller *hose,
- pci_dev_t dev, int offset, u32 * value)
-{
- int bus = PCI_BUS (dev);
-
- if ((bus == local_buses[0]) || (bus == local_buses[1])) {
- *value = pciReadConfigReg ((PCI_HOST) hose->cfg_addr, offset,
- PCI_DEV (dev));
- } else {
- *value = pciOverBridgeReadConfigReg ((PCI_HOST) hose->
- cfg_addr, offset,
- PCI_DEV (dev), bus);
- }
-
- return 0;
-}
-
-static int gt_write_config_dword (struct pci_controller *hose,
- pci_dev_t dev, int offset, u32 value)
-{
- int bus = PCI_BUS (dev);
-
- if ((bus == local_buses[0]) || (bus == local_buses[1])) {
- pciWriteConfigReg ((PCI_HOST) hose->cfg_addr, offset,
- PCI_DEV (dev), value);
- } else {
- pciOverBridgeWriteConfigReg ((PCI_HOST) hose->cfg_addr,
- offset, PCI_DEV (dev), bus,
- value);
- }
- return 0;
-}
-
-
-static void gt_setup_ide (struct pci_controller *hose,
- pci_dev_t dev, struct pci_config_table *entry)
-{
- static const int ide_bar[] = { 8, 4, 8, 4, 0, 0 };
- u32 bar_response, bar_value;
- int bar;
-
- for (bar = 0; bar < 6; bar++) {
- /*ronen different function for 3rd bank. */
- unsigned int offset =
- (bar < 2) ? bar * 8 : 0x100 + (bar - 2) * 8;
-
- pci_write_config_dword (dev, PCI_BASE_ADDRESS_0 + offset,
- 0x0);
- pci_read_config_dword (dev, PCI_BASE_ADDRESS_0 + offset,
- &bar_response);
-
- pciauto_region_allocate (bar_response &
- PCI_BASE_ADDRESS_SPACE_IO ? hose->
- pci_io : hose->pci_mem, ide_bar[bar],
- &bar_value);
-
- pci_write_config_dword (dev, PCI_BASE_ADDRESS_0 + bar * 4,
- bar_value);
- }
-}
-
-
-/* TODO BJW: Change this for DB64360. This was pulled from the EV64260 */
-/* and is curently not called *. */
-#if 0
-static void gt_fixup_irq (struct pci_controller *hose, pci_dev_t dev)
-{
- unsigned char pin, irq;
-
- pci_read_config_byte (dev, PCI_INTERRUPT_PIN, &pin);
-
- if (pin == 1) { /* only allow INT A */
- irq = pci_irq_swizzle[(PCI_HOST) hose->
- cfg_addr][PCI_DEV (dev)];
- if (irq)
- pci_write_config_byte (dev, PCI_INTERRUPT_LINE, irq);
- }
-}
-#endif
-
-struct pci_config_table gt_config_table[] = {
- {PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_STORAGE_IDE,
- PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, gt_setup_ide},
-
- {}
-};
-
-struct pci_controller pci0_hose = {
-/* fixup_irq: gt_fixup_irq, */
- config_table:gt_config_table,
-};
-
-struct pci_controller pci1_hose = {
-/* fixup_irq: gt_fixup_irq, */
- config_table:gt_config_table,
-};
-
-void pci_init_board (void)
-{
- unsigned int command;
-#ifdef CONFIG_PCI_PNP
- unsigned int bar;
-#endif
-
-#ifdef DEBUG
- gt_pci_bus_mode_display (PCI_HOST0);
-#endif
-
- pci0_hose.first_busno = 0;
- pci0_hose.last_busno = 0xff;
- local_buses[0] = pci0_hose.first_busno;
-
- /* PCI memory space */
- pci_set_region (pci0_hose.regions + 0,
- CFG_PCI0_0_MEM_SPACE,
- CFG_PCI0_0_MEM_SPACE,
- CFG_PCI0_MEM_SIZE, PCI_REGION_MEM);
-
- /* PCI I/O space */
- pci_set_region (pci0_hose.regions + 1,
- CFG_PCI0_IO_SPACE_PCI,
- CFG_PCI0_IO_SPACE, CFG_PCI0_IO_SIZE, PCI_REGION_IO);
-
- pci_set_ops (&pci0_hose,
- pci_hose_read_config_byte_via_dword,
- pci_hose_read_config_word_via_dword,
- gt_read_config_dword,
- pci_hose_write_config_byte_via_dword,
- pci_hose_write_config_word_via_dword,
- gt_write_config_dword);
- pci0_hose.region_count = 2;
-
- pci0_hose.cfg_addr = (unsigned int *) PCI_HOST0;
-
- pci_register_hose (&pci0_hose);
- pciArbiterEnable (PCI_HOST0);
- pciParkingDisable (PCI_HOST0, 1, 1, 1, 1, 1, 1, 1);
- command = pciReadConfigReg (PCI_HOST0, PCI_COMMAND, SELF);
- command |= PCI_COMMAND_MASTER;
- pciWriteConfigReg (PCI_HOST0, PCI_COMMAND, SELF, command);
- command = pciReadConfigReg (PCI_HOST0, PCI_COMMAND, SELF);
- command |= PCI_COMMAND_MEMORY;
- pciWriteConfigReg (PCI_HOST0, PCI_COMMAND, SELF, command);
-
-#ifdef CONFIG_PCI_PNP
- pciauto_config_init(&pci0_hose);
- pciauto_region_allocate(pci0_hose.pci_io, 0x400, &bar);
-#endif
-#ifdef CONFIG_PCI_SCAN_SHOW
- printf("PCI: Bus Dev VenId DevId Class Int\n");
-#endif
- pci0_hose.last_busno = pci_hose_scan_bus (&pci0_hose, pci0_hose.first_busno);
-
-#ifdef DEBUG
- gt_pci_bus_mode_display (PCI_HOST1);
-#endif
- pci1_hose.first_busno = pci0_hose.last_busno + 1;
- pci1_hose.last_busno = 0xff;
- pci1_hose.current_busno = pci1_hose.first_busno;
- local_buses[1] = pci1_hose.first_busno;
-
- /* PCI memory space */
- pci_set_region (pci1_hose.regions + 0,
- CFG_PCI1_0_MEM_SPACE,
- CFG_PCI1_0_MEM_SPACE,
- CFG_PCI1_MEM_SIZE, PCI_REGION_MEM);
-
- /* PCI I/O space */
- pci_set_region (pci1_hose.regions + 1,
- CFG_PCI1_IO_SPACE_PCI,
- CFG_PCI1_IO_SPACE, CFG_PCI1_IO_SIZE, PCI_REGION_IO);
-
- pci_set_ops (&pci1_hose,
- pci_hose_read_config_byte_via_dword,
- pci_hose_read_config_word_via_dword,
- gt_read_config_dword,
- pci_hose_write_config_byte_via_dword,
- pci_hose_write_config_word_via_dword,
- gt_write_config_dword);
-
- pci1_hose.region_count = 2;
-
- pci1_hose.cfg_addr = (unsigned int *) PCI_HOST1;
-
- pci_register_hose (&pci1_hose);
-
- pciArbiterEnable (PCI_HOST1);
- pciParkingDisable (PCI_HOST1, 1, 1, 1, 1, 1, 1, 1);
-
- command = pciReadConfigReg (PCI_HOST1, PCI_COMMAND, SELF);
- command |= PCI_COMMAND_MASTER;
- pciWriteConfigReg (PCI_HOST1, PCI_COMMAND, SELF, command);
-
-#ifdef CONFIG_PCI_PNP
- pciauto_config_init(&pci1_hose);
- pciauto_region_allocate(pci1_hose.pci_io, 0x400, &bar);
-#endif
- pci1_hose.last_busno = pci_hose_scan_bus (&pci1_hose, pci1_hose.first_busno);
-
- command = pciReadConfigReg (PCI_HOST1, PCI_COMMAND, SELF);
- command |= PCI_COMMAND_MEMORY;
- pciWriteConfigReg (PCI_HOST1, PCI_COMMAND, SELF, command);
-
-}
-#endif /* of CONFIG_PCI */
diff --git a/board/esd/cpci750/sdram_init.c b/board/esd/cpci750/sdram_init.c
deleted file mode 100644
index db545ef68d..0000000000
--- a/board/esd/cpci750/sdram_init.c
+++ /dev/null
@@ -1,1683 +0,0 @@
-/*
- * (C) Copyright 2001
- * Josh Huber <huber@mclx.com>, Mission Critical Linux, Inc.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*************************************************************************
- * adaption for the Marvell DB64360 Board
- * Ingo Assmus (ingo.assmus@keymile.com)
- *
- * adaption for the cpci750 Board
- * Reinhard Arlt (reinhard.arlt@esd-electronics.com)
- *************************************************************************/
-
-
-/* sdram_init.c - automatic memory sizing */
-
-#include <common.h>
-#include <74xx_7xx.h>
-#include "../../Marvell/include/memory.h"
-#include "../../Marvell/include/pci.h"
-#include "../../Marvell/include/mv_gen_reg.h"
-#include <net.h>
-
-#include "eth.h"
-#include "mpsc.h"
-#include "../../Marvell/common/i2c.h"
-#include "64360.h"
-#include "mv_regs.h"
-
-
-#undef DEBUG
-/* #define DEBUG */
-#ifdef CONFIG_PCI
-#define MAP_PCI
-#endif /* of CONFIG_PCI */
-
-#ifdef DEBUG
-#define DP(x) x
-#else
-#define DP(x)
-#endif
-
-int set_dfcdlInit(void); /* setup delay line of Mv64360 */
-
-/* ------------------------------------------------------------------------- */
-
-int
-memory_map_bank(unsigned int bankNo,
- unsigned int bankBase,
- unsigned int bankLength)
-{
-#ifdef MAP_PCI
- PCI_HOST host;
-#endif
-
-
-#ifdef DEBUG
- if (bankLength > 0) {
- printf("mapping bank %d at %08x - %08x\n",
- bankNo, bankBase, bankBase + bankLength - 1);
- } else {
- printf("unmapping bank %d\n", bankNo);
- }
-#endif
-
- memoryMapBank(bankNo, bankBase, bankLength);
-
-#ifdef MAP_PCI
- for (host=PCI_HOST0;host<=PCI_HOST1;host++) {
- const int features=
- PREFETCH_ENABLE |
- DELAYED_READ_ENABLE |
- AGGRESSIVE_PREFETCH |
- READ_LINE_AGGRESSIVE_PREFETCH |
- READ_MULTI_AGGRESSIVE_PREFETCH |
- MAX_BURST_4 |
- PCI_NO_SWAP;
-
- pciMapMemoryBank(host, bankNo, bankBase, bankLength);
-
- pciSetRegionSnoopMode(host, bankNo, PCI_SNOOP_WB, bankBase,
- bankLength);
-
- pciSetRegionFeatures(host, bankNo, features, bankBase, bankLength);
- }
-#endif
- return 0;
-}
-
-#define GB (1 << 30)
-
-/* much of this code is based on (or is) the code in the pip405 port */
-/* thanks go to the authors of said port - Josh */
-
-/* structure to store the relevant information about an sdram bank */
-typedef struct sdram_info {
- uchar drb_size;
- uchar registered, ecc;
- uchar tpar;
- uchar tras_clocks;
- uchar burst_len;
- uchar banks, slot;
-} sdram_info_t;
-
-/* Typedefs for 'gtAuxilGetDIMMinfo' function */
-
-typedef enum _memoryType {SDRAM, DDR} MEMORY_TYPE;
-
-typedef enum _voltageInterface {TTL_5V_TOLERANT, LVTTL, HSTL_1_5V,
- SSTL_3_3V, SSTL_2_5V, VOLTAGE_UNKNOWN,
- } VOLTAGE_INTERFACE;
-
-typedef enum _max_CL_supported_DDR {DDR_CL_1=1, DDR_CL_1_5=2, DDR_CL_2=4, DDR_CL_2_5=8, DDR_CL_3=16, DDR_CL_3_5=32, DDR_CL_FAULT} MAX_CL_SUPPORTED_DDR;
-typedef enum _max_CL_supported_SD {SD_CL_1=1, SD_CL_2, SD_CL_3, SD_CL_4, SD_CL_5, SD_CL_6, SD_CL_7, SD_FAULT} MAX_CL_SUPPORTED_SD;
-
-
-/* SDRAM/DDR information struct */
-typedef struct _gtMemoryDimmInfo
-{
- MEMORY_TYPE memoryType;
- unsigned int numOfRowAddresses;
- unsigned int numOfColAddresses;
- unsigned int numOfModuleBanks;
- unsigned int dataWidth;
- VOLTAGE_INTERFACE voltageInterface;
- unsigned int errorCheckType; /* ECC , PARITY..*/
- unsigned int sdramWidth; /* 4,8,16 or 32 */;
- unsigned int errorCheckDataWidth; /* 0 - no, 1 - Yes */
- unsigned int minClkDelay;
- unsigned int burstLengthSupported;
- unsigned int numOfBanksOnEachDevice;
- unsigned int suportedCasLatencies;
- unsigned int RefreshInterval;
- unsigned int maxCASlatencySupported_LoP; /* LoP left of point (measured in ns) */
- unsigned int maxCASlatencySupported_RoP; /* RoP right of point (measured in ns)*/
- MAX_CL_SUPPORTED_DDR maxClSupported_DDR;
- MAX_CL_SUPPORTED_SD maxClSupported_SD;
- unsigned int moduleBankDensity;
- /* module attributes (true for yes) */
- bool bufferedAddrAndControlInputs;
- bool registeredAddrAndControlInputs;
- bool onCardPLL;
- bool bufferedDQMBinputs;
- bool registeredDQMBinputs;
- bool differentialClockInput;
- bool redundantRowAddressing;
-
- /* module general attributes */
- bool suportedAutoPreCharge;
- bool suportedPreChargeAll;
- bool suportedEarlyRasPreCharge;
- bool suportedWrite1ReadBurst;
- bool suported5PercentLowVCC;
- bool suported5PercentUpperVCC;
- /* module timing parameters */
- unsigned int minRasToCasDelay;
- unsigned int minRowActiveRowActiveDelay;
- unsigned int minRasPulseWidth;
- unsigned int minRowPrechargeTime; /* measured in ns */
-
- int addrAndCommandHoldTime; /* LoP left of point (measured in ns) */
- int addrAndCommandSetupTime; /* (measured in ns/100) */
- int dataInputSetupTime; /* LoP left of point (measured in ns) */
- int dataInputHoldTime; /* LoP left of point (measured in ns) */
-/* tAC times for highest 2nd and 3rd highest CAS Latency values */
- unsigned int clockToDataOut_LoP; /* LoP left of point (measured in ns) */
- unsigned int clockToDataOut_RoP; /* RoP right of point (measured in ns)*/
- unsigned int clockToDataOutMinus1_LoP; /* LoP left of point (measured in ns) */
- unsigned int clockToDataOutMinus1_RoP; /* RoP right of point (measured in ns)*/
- unsigned int clockToDataOutMinus2_LoP; /* LoP left of point (measured in ns) */
- unsigned int clockToDataOutMinus2_RoP; /* RoP right of point (measured in ns)*/
-
- unsigned int minimumCycleTimeAtMaxCasLatancy_LoP; /* LoP left of point (measured in ns) */
- unsigned int minimumCycleTimeAtMaxCasLatancy_RoP; /* RoP right of point (measured in ns)*/
-
- unsigned int minimumCycleTimeAtMaxCasLatancyMinus1_LoP; /* LoP left of point (measured in ns) */
- unsigned int minimumCycleTimeAtMaxCasLatancyMinus1_RoP; /* RoP right of point (measured in ns)*/
-
- unsigned int minimumCycleTimeAtMaxCasLatancyMinus2_LoP; /* LoP left of point (measured in ns) */
- unsigned int minimumCycleTimeAtMaxCasLatancyMinus2_RoP; /* RoP right of point (measured in ns)*/
-
- /* Parameters calculated from
- the extracted DIMM information */
- unsigned int size;
- unsigned int deviceDensity; /* 16,64,128,256 or 512 Mbit */
- unsigned int numberOfDevices;
- uchar drb_size; /* DRAM size in n*64Mbit */
- uchar slot; /* Slot Number this module is inserted in */
- uchar spd_raw_data[128]; /* Content of SPD-EEPROM copied 1:1 */
-#ifdef DEBUG
- uchar manufactura[8]; /* Content of SPD-EEPROM Byte 64-71 */
- uchar modul_id[18]; /* Content of SPD-EEPROM Byte 73-90 */
- uchar vendor_data[27]; /* Content of SPD-EEPROM Byte 99-125 */
- unsigned long modul_serial_no; /* Content of SPD-EEPROM Byte 95-98 */
- unsigned int manufac_date; /* Content of SPD-EEPROM Byte 93-94 */
- unsigned int modul_revision; /* Content of SPD-EEPROM Byte 91-92 */
- uchar manufac_place; /* Content of SPD-EEPROM Byte 72 */
-
-#endif
-} AUX_MEM_DIMM_INFO;
-
-
-/*
- * translate ns.ns/10 coding of SPD timing values
- * into 10 ps unit values
- */
-static inline unsigned short
-NS10to10PS(unsigned char spd_byte)
-{
- unsigned short ns, ns10;
-
- /* isolate upper nibble */
- ns = (spd_byte >> 4) & 0x0F;
- /* isolate lower nibble */
- ns10 = (spd_byte & 0x0F);
-
- return(ns*100 + ns10*10);
-}
-
-/*
- * translate ns coding of SPD timing values
- * into 10 ps unit values
- */
-static inline unsigned short
-NSto10PS(unsigned char spd_byte)
-{
- return(spd_byte*100);
-}
-
-/* This code reads the SPD chip on the sdram and populates
- * the array which is passed in with the relevant information */
-/* static int check_dimm(uchar slot, AUX_MEM_DIMM_INFO *info) */
-static int check_dimm (uchar slot, AUX_MEM_DIMM_INFO * dimmInfo)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- unsigned long spd_checksum;
-
- uchar addr = slot == 0 ? DIMM0_I2C_ADDR : DIMM1_I2C_ADDR;
- int ret;
- unsigned int i, j, density = 1, devicesForErrCheck = 0;
-
-#ifdef DEBUG
- unsigned int k;
-#endif
- unsigned int rightOfPoint = 0, leftOfPoint = 0, mult, div, time_tmp;
- int sign = 1, shift, maskLeftOfPoint, maskRightOfPoint;
- uchar supp_cal, cal_val;
- ulong memclk, tmemclk;
- ulong tmp;
- uchar trp_clocks = 0, trcd_clocks, tras_clocks, trrd_clocks;
- uchar data[128];
-
- memclk = gd->bus_clk;
- tmemclk = 1000000000 / (memclk / 100); /* in 10 ps units */
-
- memset (data, 0, sizeof (data));
-
-
- ret = 0;
-
- DP (puts ("before i2c read\n"));
-
- ret = i2c_read (addr, 0, 2, data, 128);
-
- DP (puts ("after i2c read\n"));
-
- if ((data[64] != 'e') || (data[65] != 's') || (data[66] != 'd')
- || (data[67] != '-') || (data[68] != 'g') || (data[69] != 'm')
- || (data[70] != 'b') || (data[71] != 'h')) {
- ret = -1;
- }
-
- if ((ret != 0) && (slot == 0)) {
- memset (data, 0, sizeof (data));
- data[0] = 0x80;
- data[1] = 0x08;
- data[2] = 0x07;
- data[3] = 0x0c;
- data[4] = 0x09;
- data[5] = 0x01;
- data[6] = 0x48;
- data[7] = 0x00;
- data[8] = 0x04;
- data[9] = 0x75;
- data[10] = 0x80;
- data[11] = 0x02;
- data[12] = 0x80;
- data[13] = 0x10;
- data[14] = 0x08;
- data[15] = 0x01;
- data[16] = 0x0e;
- data[17] = 0x04;
- data[18] = 0x0c;
- data[19] = 0x01;
- data[20] = 0x02;
- data[21] = 0x20;
- data[22] = 0x00;
- data[23] = 0xa0;
- data[24] = 0x80;
- data[25] = 0x00;
- data[26] = 0x00;
- data[27] = 0x50;
- data[28] = 0x3c;
- data[29] = 0x50;
- data[30] = 0x32;
- data[31] = 0x10;
- data[32] = 0xb0;
- data[33] = 0xb0;
- data[34] = 0x60;
- data[35] = 0x60;
- data[64] = 'e';
- data[65] = 's';
- data[66] = 'd';
- data[67] = '-';
- data[68] = 'g';
- data[69] = 'm';
- data[70] = 'b';
- data[71] = 'h';
- ret = 0;
- }
-
- /* zero all the values */
- memset (dimmInfo, 0, sizeof (*dimmInfo));
-
- /* copy the SPD content 1:1 into the dimmInfo structure */
- for (i = 0; i <= 127; i++) {
- dimmInfo->spd_raw_data[i] = data[i];
- }
-
- if (ret) {
- DP (printf ("No DIMM in slot %d [err = %x]\n", slot, ret));
- return 0;
- } else
- dimmInfo->slot = slot; /* start to fill up dimminfo for this "slot" */
-
-#ifdef CFG_DISPLAY_DIMM_SPD_CONTENT
-
- for (i = 0; i <= 127; i++) {
- printf ("SPD-EEPROM Byte %3d = %3x (%3d)\n", i, data[i],
- data[i]);
- }
-
-#endif
-#ifdef DEBUG
- /* find Manufacturer of Dimm Module */
- for (i = 0; i < sizeof (dimmInfo->manufactura); i++) {
- dimmInfo->manufactura[i] = data[64 + i];
- }
- printf ("\nThis RAM-Module is produced by: %s\n",
- dimmInfo->manufactura);
-
- /* find Manul-ID of Dimm Module */
- for (i = 0; i < sizeof (dimmInfo->modul_id); i++) {
- dimmInfo->modul_id[i] = data[73 + i];
- }
- printf ("The Module-ID of this RAM-Module is: %s\n",
- dimmInfo->modul_id);
-
- /* find Vendor-Data of Dimm Module */
- for (i = 0; i < sizeof (dimmInfo->vendor_data); i++) {
- dimmInfo->vendor_data[i] = data[99 + i];
- }
- printf ("Vendor Data of this RAM-Module is: %s\n",
- dimmInfo->vendor_data);
-
- /* find modul_serial_no of Dimm Module */
- dimmInfo->modul_serial_no = (*((unsigned long *) (&data[95])));
- printf ("Serial No. of this RAM-Module is: %ld (%lx)\n",
- dimmInfo->modul_serial_no, dimmInfo->modul_serial_no);
-
- /* find Manufac-Data of Dimm Module */
- dimmInfo->manufac_date = (*((unsigned int *) (&data[93])));
- printf ("Manufactoring Date of this RAM-Module is: %d.%d\n", data[93], data[94]); /*dimmInfo->manufac_date */
-
- /* find modul_revision of Dimm Module */
- dimmInfo->modul_revision = (*((unsigned int *) (&data[91])));
- printf ("Module Revision of this RAM-Module is: %d.%d\n", data[91], data[92]); /* dimmInfo->modul_revision */
-
- /* find manufac_place of Dimm Module */
- dimmInfo->manufac_place = (*((unsigned char *) (&data[72])));
- printf ("manufac_place of this RAM-Module is: %d\n",
- dimmInfo->manufac_place);
-
-#endif
-/*------------------------------------------------------------------------------------------------------------------------------*/
-/* calculate SPD checksum */
-/*------------------------------------------------------------------------------------------------------------------------------*/
- spd_checksum = 0;
-#if 0 /* test-only */
- for (i = 0; i <= 62; i++) {
- spd_checksum += data[i];
- }
-
- if ((spd_checksum & 0xff) != data[63]) {
- printf ("### Error in SPD Checksum !!! Is_value: %2x should value %2x\n", (unsigned int) (spd_checksum & 0xff), data[63]);
- hang ();
- }
-
- else
- printf ("SPD Checksum ok!\n");
-#endif /* test-only */
-
-/*------------------------------------------------------------------------------------------------------------------------------*/
- for (i = 2; i <= 35; i++) {
- switch (i) {
- case 2: /* Memory type (DDR / SDRAM) */
- dimmInfo->memoryType = (data[i] == 0x7) ? DDR : SDRAM;
-#ifdef DEBUG
- if (dimmInfo->memoryType == 0)
- DP (printf
- ("Dram_type in slot %d is: SDRAM\n",
- dimmInfo->slot));
- if (dimmInfo->memoryType == 1)
- DP (printf
- ("Dram_type in slot %d is: DDRAM\n",
- dimmInfo->slot));
-#endif
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 3: /* Number Of Row Addresses */
- dimmInfo->numOfRowAddresses = data[i];
- DP (printf
- ("Module Number of row addresses: %d\n",
- dimmInfo->numOfRowAddresses));
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 4: /* Number Of Column Addresses */
- dimmInfo->numOfColAddresses = data[i];
- DP (printf
- ("Module Number of col addresses: %d\n",
- dimmInfo->numOfColAddresses));
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 5: /* Number Of Module Banks */
- dimmInfo->numOfModuleBanks = data[i];
- DP (printf
- ("Number of Banks on Mod. : %d\n",
- dimmInfo->numOfModuleBanks));
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 6: /* Data Width */
- dimmInfo->dataWidth = data[i];
- DP (printf
- ("Module Data Width: %d\n",
- dimmInfo->dataWidth));
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 8: /* Voltage Interface */
- switch (data[i]) {
- case 0x0:
- dimmInfo->voltageInterface = TTL_5V_TOLERANT;
- DP (printf
- ("Module is TTL_5V_TOLERANT\n"));
- break;
- case 0x1:
- dimmInfo->voltageInterface = LVTTL;
- DP (printf
- ("Module is LVTTL\n"));
- break;
- case 0x2:
- dimmInfo->voltageInterface = HSTL_1_5V;
- DP (printf
- ("Module is TTL_5V_TOLERANT\n"));
- break;
- case 0x3:
- dimmInfo->voltageInterface = SSTL_3_3V;
- DP (printf
- ("Module is HSTL_1_5V\n"));
- break;
- case 0x4:
- dimmInfo->voltageInterface = SSTL_2_5V;
- DP (printf
- ("Module is SSTL_2_5V\n"));
- break;
- default:
- dimmInfo->voltageInterface = VOLTAGE_UNKNOWN;
- DP (printf
- ("Module is VOLTAGE_UNKNOWN\n"));
- break;
- }
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 9: /* Minimum Cycle Time At Max CasLatancy */
- shift = (dimmInfo->memoryType == DDR) ? 4 : 2;
- mult = (dimmInfo->memoryType == DDR) ? 10 : 25;
- maskLeftOfPoint =
- (dimmInfo->memoryType == DDR) ? 0xf0 : 0xfc;
- maskRightOfPoint =
- (dimmInfo->memoryType == DDR) ? 0xf : 0x03;
- leftOfPoint = (data[i] & maskLeftOfPoint) >> shift;
- rightOfPoint = (data[i] & maskRightOfPoint) * mult;
- dimmInfo->minimumCycleTimeAtMaxCasLatancy_LoP =
- leftOfPoint;
- dimmInfo->minimumCycleTimeAtMaxCasLatancy_RoP =
- rightOfPoint;
- DP (printf
- ("Minimum Cycle Time At Max CasLatancy: %d.%d [ns]\n",
- leftOfPoint, rightOfPoint));
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 10: /* Clock To Data Out */
- div = (dimmInfo->memoryType == DDR) ? 100 : 10;
- time_tmp =
- (((data[i] & 0xf0) >> 4) * 10) +
- ((data[i] & 0x0f));
- leftOfPoint = time_tmp / div;
- rightOfPoint = time_tmp % div;
- dimmInfo->clockToDataOut_LoP = leftOfPoint;
- dimmInfo->clockToDataOut_RoP = rightOfPoint;
- DP (printf
- ("Clock To Data Out: %d.%2d [ns]\n",
- leftOfPoint, rightOfPoint));
- /*dimmInfo->clockToDataOut */
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
-#ifdef CONFIG_ECC
- case 11: /* Error Check Type */
- dimmInfo->errorCheckType = data[i];
- DP (printf
- ("Error Check Type (0=NONE): %d\n",
- dimmInfo->errorCheckType));
- break;
-#endif
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 12: /* Refresh Interval */
- dimmInfo->RefreshInterval = data[i];
- DP (printf
- ("RefreshInterval (80= Self refresh Normal, 15.625us) : %x\n",
- dimmInfo->RefreshInterval));
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 13: /* Sdram Width */
- dimmInfo->sdramWidth = data[i];
- DP (printf
- ("Sdram Width: %d\n",
- dimmInfo->sdramWidth));
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 14: /* Error Check Data Width */
- dimmInfo->errorCheckDataWidth = data[i];
- DP (printf
- ("Error Check Data Width: %d\n",
- dimmInfo->errorCheckDataWidth));
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 15: /* Minimum Clock Delay */
- dimmInfo->minClkDelay = data[i];
- DP (printf
- ("Minimum Clock Delay: %d\n",
- dimmInfo->minClkDelay));
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 16: /* Burst Length Supported */
- /******-******-******-*******
- * bit3 | bit2 | bit1 | bit0 *
- *******-******-******-*******
- burst length = * 8 | 4 | 2 | 1 *
- *****************************
-
- If for example bit0 and bit2 are set, the burst
- length supported are 1 and 4. */
-
- dimmInfo->burstLengthSupported = data[i];
-#ifdef DEBUG
- DP (printf
- ("Burst Length Supported: "));
- if (dimmInfo->burstLengthSupported & 0x01)
- DP (printf ("1, "));
- if (dimmInfo->burstLengthSupported & 0x02)
- DP (printf ("2, "));
- if (dimmInfo->burstLengthSupported & 0x04)
- DP (printf ("4, "));
- if (dimmInfo->burstLengthSupported & 0x08)
- DP (printf ("8, "));
- DP (printf (" Bit \n"));
-#endif
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 17: /* Number Of Banks On Each Device */
- dimmInfo->numOfBanksOnEachDevice = data[i];
- DP (printf
- ("Number Of Banks On Each Chip: %d\n",
- dimmInfo->numOfBanksOnEachDevice));
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 18: /* Suported Cas Latencies */
-
- /* DDR:
- *******-******-******-******-******-******-******-*******
- * bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 *
- *******-******-******-******-******-******-******-*******
- CAS = * TBD | TBD | 3.5 | 3 | 2.5 | 2 | 1.5 | 1 *
- *********************************************************
- SDRAM:
- *******-******-******-******-******-******-******-*******
- * bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 *
- *******-******-******-******-******-******-******-*******
- CAS = * TBD | 7 | 6 | 5 | 4 | 3 | 2 | 1 *
- ********************************************************/
- dimmInfo->suportedCasLatencies = data[i];
-#ifdef DEBUG
- DP (printf
- ("Suported Cas Latencies: (CL) "));
- if (dimmInfo->memoryType == 0) { /* SDRAM */
- for (k = 0; k <= 7; k++) {
- if (dimmInfo->
- suportedCasLatencies & (1 << k))
- DP (printf
- ("%d, ",
- k + 1));
- }
-
- } else { /* DDR-RAM */
-
- if (dimmInfo->suportedCasLatencies & 1)
- DP (printf ("1, "));
- if (dimmInfo->suportedCasLatencies & 2)
- DP (printf ("1.5, "));
- if (dimmInfo->suportedCasLatencies & 4)
- DP (printf ("2, "));
- if (dimmInfo->suportedCasLatencies & 8)
- DP (printf ("2.5, "));
- if (dimmInfo->suportedCasLatencies & 16)
- DP (printf ("3, "));
- if (dimmInfo->suportedCasLatencies & 32)
- DP (printf ("3.5, "));
-
- }
- DP (printf ("\n"));
-#endif
- /* Calculating MAX CAS latency */
- for (j = 7; j > 0; j--) {
- if (((dimmInfo->
- suportedCasLatencies >> j) & 0x1) ==
- 1) {
- switch (dimmInfo->memoryType) {
- case DDR:
- /* CAS latency 1, 1.5, 2, 2.5, 3, 3.5 */
- switch (j) {
- case 7:
- DP (printf
- ("Max. Cas Latencies (DDR): ERROR !!!\n"));
- dimmInfo->
- maxClSupported_DDR
- =
- DDR_CL_FAULT;
- hang ();
- break;
- case 6:
- DP (printf
- ("Max. Cas Latencies (DDR): ERROR !!!\n"));
- dimmInfo->
- maxClSupported_DDR
- =
- DDR_CL_FAULT;
- hang ();
- break;
- case 5:
- DP (printf
- ("Max. Cas Latencies (DDR): 3.5 clk's\n"));
- dimmInfo->
- maxClSupported_DDR
- = DDR_CL_3_5;
- break;
- case 4:
- DP (printf
- ("Max. Cas Latencies (DDR): 3 clk's \n"));
- dimmInfo->
- maxClSupported_DDR
- = DDR_CL_3;
- break;
- case 3:
- DP (printf
- ("Max. Cas Latencies (DDR): 2.5 clk's \n"));
- dimmInfo->
- maxClSupported_DDR
- = DDR_CL_2_5;
- break;
- case 2:
- DP (printf
- ("Max. Cas Latencies (DDR): 2 clk's \n"));
- dimmInfo->
- maxClSupported_DDR
- = DDR_CL_2;
- break;
- case 1:
- DP (printf
- ("Max. Cas Latencies (DDR): 1.5 clk's \n"));
- dimmInfo->
- maxClSupported_DDR
- = DDR_CL_1_5;
- break;
- }
- dimmInfo->
- maxCASlatencySupported_LoP
- =
- 1 +
- (int) (5 * j / 10);
- if (((5 * j) % 10) != 0)
- dimmInfo->
- maxCASlatencySupported_RoP
- = 5;
- else
- dimmInfo->
- maxCASlatencySupported_RoP
- = 0;
- DP (printf
- ("Max. Cas Latencies (DDR LoP.RoP Notation): %d.%d \n",
- dimmInfo->
- maxCASlatencySupported_LoP,
- dimmInfo->
- maxCASlatencySupported_RoP));
- break;
- case SDRAM:
- /* CAS latency 1, 2, 3, 4, 5, 6, 7 */
- dimmInfo->maxClSupported_SD = j; /* Cas Latency DDR-RAM Coded */
- DP (printf
- ("Max. Cas Latencies (SD): %d\n",
- dimmInfo->
- maxClSupported_SD));
- dimmInfo->
- maxCASlatencySupported_LoP
- = j;
- dimmInfo->
- maxCASlatencySupported_RoP
- = 0;
- DP (printf
- ("Max. Cas Latencies (DDR LoP.RoP Notation): %d.%d \n",
- dimmInfo->
- maxCASlatencySupported_LoP,
- dimmInfo->
- maxCASlatencySupported_RoP));
- break;
- }
- break;
- }
- }
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 21: /* Buffered Address And Control Inputs */
- DP (printf ("\nModul Attributes (SPD Byte 21): \n"));
- dimmInfo->bufferedAddrAndControlInputs =
- data[i] & BIT0;
- dimmInfo->registeredAddrAndControlInputs =
- (data[i] & BIT1) >> 1;
- dimmInfo->onCardPLL = (data[i] & BIT2) >> 2;
- dimmInfo->bufferedDQMBinputs = (data[i] & BIT3) >> 3;
- dimmInfo->registeredDQMBinputs =
- (data[i] & BIT4) >> 4;
- dimmInfo->differentialClockInput =
- (data[i] & BIT5) >> 5;
- dimmInfo->redundantRowAddressing =
- (data[i] & BIT6) >> 6;
-#ifdef DEBUG
- if (dimmInfo->bufferedAddrAndControlInputs == 1)
- DP (printf
- (" - Buffered Address/Control Input: Yes \n"));
- else
- DP (printf
- (" - Buffered Address/Control Input: No \n"));
-
- if (dimmInfo->registeredAddrAndControlInputs == 1)
- DP (printf
- (" - Registered Address/Control Input: Yes \n"));
- else
- DP (printf
- (" - Registered Address/Control Input: No \n"));
-
- if (dimmInfo->onCardPLL == 1)
- DP (printf
- (" - On-Card PLL (clock): Yes \n"));
- else
- DP (printf
- (" - On-Card PLL (clock): No \n"));
-
- if (dimmInfo->bufferedDQMBinputs == 1)
- DP (printf
- (" - Bufferd DQMB Inputs: Yes \n"));
- else
- DP (printf
- (" - Bufferd DQMB Inputs: No \n"));
-
- if (dimmInfo->registeredDQMBinputs == 1)
- DP (printf
- (" - Registered DQMB Inputs: Yes \n"));
- else
- DP (printf
- (" - Registered DQMB Inputs: No \n"));
-
- if (dimmInfo->differentialClockInput == 1)
- DP (printf
- (" - Differential Clock Input: Yes \n"));
- else
- DP (printf
- (" - Differential Clock Input: No \n"));
-
- if (dimmInfo->redundantRowAddressing == 1)
- DP (printf
- (" - redundant Row Addressing: Yes \n"));
- else
- DP (printf
- (" - redundant Row Addressing: No \n"));
-
-#endif
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 22: /* Suported AutoPreCharge */
- DP (printf ("\nModul Attributes (SPD Byte 22): \n"));
- dimmInfo->suportedEarlyRasPreCharge = data[i] & BIT0;
- dimmInfo->suportedAutoPreCharge =
- (data[i] & BIT1) >> 1;
- dimmInfo->suportedPreChargeAll =
- (data[i] & BIT2) >> 2;
- dimmInfo->suportedWrite1ReadBurst =
- (data[i] & BIT3) >> 3;
- dimmInfo->suported5PercentLowVCC =
- (data[i] & BIT4) >> 4;
- dimmInfo->suported5PercentUpperVCC =
- (data[i] & BIT5) >> 5;
-#ifdef DEBUG
- if (dimmInfo->suportedEarlyRasPreCharge == 1)
- DP (printf
- (" - Early Ras Precharge: Yes \n"));
- else
- DP (printf
- (" - Early Ras Precharge: No \n"));
-
- if (dimmInfo->suportedAutoPreCharge == 1)
- DP (printf
- (" - AutoPreCharge: Yes \n"));
- else
- DP (printf
- (" - AutoPreCharge: No \n"));
-
- if (dimmInfo->suportedPreChargeAll == 1)
- DP (printf
- (" - Precharge All: Yes \n"));
- else
- DP (printf
- (" - Precharge All: No \n"));
-
- if (dimmInfo->suportedWrite1ReadBurst == 1)
- DP (printf
- (" - Write 1/ReadBurst: Yes \n"));
- else
- DP (printf
- (" - Write 1/ReadBurst: No \n"));
-
- if (dimmInfo->suported5PercentLowVCC == 1)
- DP (printf
- (" - lower VCC tolerance: 5 Percent \n"));
- else
- DP (printf
- (" - lower VCC tolerance: 10 Percent \n"));
-
- if (dimmInfo->suported5PercentUpperVCC == 1)
- DP (printf
- (" - upper VCC tolerance: 5 Percent \n"));
- else
- DP (printf
- (" - upper VCC tolerance: 10 Percent \n"));
-
-#endif
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 23: /* Minimum Cycle Time At Maximum Cas Latancy Minus 1 (2nd highest CL) */
- shift = (dimmInfo->memoryType == DDR) ? 4 : 2;
- mult = (dimmInfo->memoryType == DDR) ? 10 : 25;
- maskLeftOfPoint =
- (dimmInfo->memoryType == DDR) ? 0xf0 : 0xfc;
- maskRightOfPoint =
- (dimmInfo->memoryType == DDR) ? 0xf : 0x03;
- leftOfPoint = (data[i] & maskLeftOfPoint) >> shift;
- rightOfPoint = (data[i] & maskRightOfPoint) * mult;
- dimmInfo->minimumCycleTimeAtMaxCasLatancyMinus1_LoP =
- leftOfPoint;
- dimmInfo->minimumCycleTimeAtMaxCasLatancyMinus1_RoP =
- rightOfPoint;
- DP (printf
- ("Minimum Cycle Time At 2nd highest CasLatancy (0 = Not supported): %d.%d [ns]\n",
- leftOfPoint, rightOfPoint));
- /*dimmInfo->minimumCycleTimeAtMaxCasLatancy */
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 24: /* Clock To Data Out 2nd highest Cas Latency Value */
- div = (dimmInfo->memoryType == DDR) ? 100 : 10;
- time_tmp =
- (((data[i] & 0xf0) >> 4) * 10) +
- ((data[i] & 0x0f));
- leftOfPoint = time_tmp / div;
- rightOfPoint = time_tmp % div;
- dimmInfo->clockToDataOutMinus1_LoP = leftOfPoint;
- dimmInfo->clockToDataOutMinus1_RoP = rightOfPoint;
- DP (printf
- ("Clock To Data Out (2nd CL value): %d.%2d [ns]\n",
- leftOfPoint, rightOfPoint));
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 25: /* Minimum Cycle Time At Maximum Cas Latancy Minus 2 (3rd highest CL) */
- shift = (dimmInfo->memoryType == DDR) ? 4 : 2;
- mult = (dimmInfo->memoryType == DDR) ? 10 : 25;
- maskLeftOfPoint =
- (dimmInfo->memoryType == DDR) ? 0xf0 : 0xfc;
- maskRightOfPoint =
- (dimmInfo->memoryType == DDR) ? 0xf : 0x03;
- leftOfPoint = (data[i] & maskLeftOfPoint) >> shift;
- rightOfPoint = (data[i] & maskRightOfPoint) * mult;
- dimmInfo->minimumCycleTimeAtMaxCasLatancyMinus2_LoP =
- leftOfPoint;
- dimmInfo->minimumCycleTimeAtMaxCasLatancyMinus2_RoP =
- rightOfPoint;
- DP (printf
- ("Minimum Cycle Time At 3rd highest CasLatancy (0 = Not supported): %d.%d [ns]\n",
- leftOfPoint, rightOfPoint));
- /*dimmInfo->minimumCycleTimeAtMaxCasLatancy */
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 26: /* Clock To Data Out 3rd highest Cas Latency Value */
- div = (dimmInfo->memoryType == DDR) ? 100 : 10;
- time_tmp =
- (((data[i] & 0xf0) >> 4) * 10) +
- ((data[i] & 0x0f));
- leftOfPoint = time_tmp / div;
- rightOfPoint = time_tmp % div;
- dimmInfo->clockToDataOutMinus2_LoP = leftOfPoint;
- dimmInfo->clockToDataOutMinus2_RoP = rightOfPoint;
- DP (printf
- ("Clock To Data Out (3rd CL value): %d.%2d [ns]\n",
- leftOfPoint, rightOfPoint));
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 27: /* Minimum Row Precharge Time */
- shift = (dimmInfo->memoryType == DDR) ? 2 : 0;
- maskLeftOfPoint =
- (dimmInfo->memoryType == DDR) ? 0xfc : 0xff;
- maskRightOfPoint =
- (dimmInfo->memoryType == DDR) ? 0x03 : 0x00;
- leftOfPoint = ((data[i] & maskLeftOfPoint) >> shift);
- rightOfPoint = (data[i] & maskRightOfPoint) * 25;
-
- dimmInfo->minRowPrechargeTime = ((leftOfPoint * 100) + rightOfPoint); /* measured in n times 10ps Intervals */
- trp_clocks =
- (dimmInfo->minRowPrechargeTime +
- (tmemclk - 1)) / tmemclk;
- DP (printf
- ("*** 1 clock cycle = %ld 10ps intervalls = %ld.%ld ns****\n",
- tmemclk, tmemclk / 100, tmemclk % 100));
- DP (printf
- ("Minimum Row Precharge Time [ns]: %d.%2d = in Clk cycles %d\n",
- leftOfPoint, rightOfPoint, trp_clocks));
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 28: /* Minimum Row Active to Row Active Time */
- shift = (dimmInfo->memoryType == DDR) ? 2 : 0;
- maskLeftOfPoint =
- (dimmInfo->memoryType == DDR) ? 0xfc : 0xff;
- maskRightOfPoint =
- (dimmInfo->memoryType == DDR) ? 0x03 : 0x00;
- leftOfPoint = ((data[i] & maskLeftOfPoint) >> shift);
- rightOfPoint = (data[i] & maskRightOfPoint) * 25;
-
- dimmInfo->minRowActiveRowActiveDelay = ((leftOfPoint * 100) + rightOfPoint); /* measured in 100ns Intervals */
- trrd_clocks =
- (dimmInfo->minRowActiveRowActiveDelay +
- (tmemclk - 1)) / tmemclk;
- DP (printf
- ("Minimum Row Active -To- Row Active Delay [ns]: %d.%2d = in Clk cycles %d\n",
- leftOfPoint, rightOfPoint, trp_clocks));
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 29: /* Minimum Ras-To-Cas Delay */
- shift = (dimmInfo->memoryType == DDR) ? 2 : 0;
- maskLeftOfPoint =
- (dimmInfo->memoryType == DDR) ? 0xfc : 0xff;
- maskRightOfPoint =
- (dimmInfo->memoryType == DDR) ? 0x03 : 0x00;
- leftOfPoint = ((data[i] & maskLeftOfPoint) >> shift);
- rightOfPoint = (data[i] & maskRightOfPoint) * 25;
-
- dimmInfo->minRowActiveRowActiveDelay = ((leftOfPoint * 100) + rightOfPoint); /* measured in 100ns Intervals */
- trcd_clocks =
- (dimmInfo->minRowActiveRowActiveDelay +
- (tmemclk - 1)) / tmemclk;
- DP (printf
- ("Minimum Ras-To-Cas Delay [ns]: %d.%2d = in Clk cycles %d\n",
- leftOfPoint, rightOfPoint, trp_clocks));
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 30: /* Minimum Ras Pulse Width */
- dimmInfo->minRasPulseWidth = data[i];
- tras_clocks =
- (NSto10PS (data[i]) +
- (tmemclk - 1)) / tmemclk;
- DP (printf
- ("Minimum Ras Pulse Width [ns]: %d = in Clk cycles %d\n",
- dimmInfo->minRasPulseWidth, tras_clocks));
-
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 31: /* Module Bank Density */
- dimmInfo->moduleBankDensity = data[i];
- DP (printf
- ("Module Bank Density: %d\n",
- dimmInfo->moduleBankDensity));
-#ifdef DEBUG
- DP (printf
- ("*** Offered Densities (more than 1 = Multisize-Module): "));
- {
- if (dimmInfo->moduleBankDensity & 1)
- DP (printf ("4MB, "));
- if (dimmInfo->moduleBankDensity & 2)
- DP (printf ("8MB, "));
- if (dimmInfo->moduleBankDensity & 4)
- DP (printf ("16MB, "));
- if (dimmInfo->moduleBankDensity & 8)
- DP (printf ("32MB, "));
- if (dimmInfo->moduleBankDensity & 16)
- DP (printf ("64MB, "));
- if (dimmInfo->moduleBankDensity & 32)
- DP (printf ("128MB, "));
- if ((dimmInfo->moduleBankDensity & 64)
- || (dimmInfo->moduleBankDensity & 128)) {
- DP (printf ("ERROR, "));
- hang ();
- }
- }
- DP (printf ("\n"));
-#endif
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 32: /* Address And Command Setup Time (measured in ns/1000) */
- sign = 1;
- switch (dimmInfo->memoryType) {
- case DDR:
- time_tmp =
- (((data[i] & 0xf0) >> 4) * 10) +
- ((data[i] & 0x0f));
- leftOfPoint = time_tmp / 100;
- rightOfPoint = time_tmp % 100;
- break;
- case SDRAM:
- leftOfPoint = (data[i] & 0xf0) >> 4;
- if (leftOfPoint > 7) {
- leftOfPoint = data[i] & 0x70 >> 4;
- sign = -1;
- }
- rightOfPoint = (data[i] & 0x0f);
- break;
- }
- dimmInfo->addrAndCommandSetupTime =
- (leftOfPoint * 100 + rightOfPoint) * sign;
- DP (printf
- ("Address And Command Setup Time [ns]: %d.%d\n",
- sign * leftOfPoint, rightOfPoint));
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 33: /* Address And Command Hold Time */
- sign = 1;
- switch (dimmInfo->memoryType) {
- case DDR:
- time_tmp =
- (((data[i] & 0xf0) >> 4) * 10) +
- ((data[i] & 0x0f));
- leftOfPoint = time_tmp / 100;
- rightOfPoint = time_tmp % 100;
- break;
- case SDRAM:
- leftOfPoint = (data[i] & 0xf0) >> 4;
- if (leftOfPoint > 7) {
- leftOfPoint = data[i] & 0x70 >> 4;
- sign = -1;
- }
- rightOfPoint = (data[i] & 0x0f);
- break;
- }
- dimmInfo->addrAndCommandHoldTime =
- (leftOfPoint * 100 + rightOfPoint) * sign;
- DP (printf
- ("Address And Command Hold Time [ns]: %d.%d\n",
- sign * leftOfPoint, rightOfPoint));
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 34: /* Data Input Setup Time */
- sign = 1;
- switch (dimmInfo->memoryType) {
- case DDR:
- time_tmp =
- (((data[i] & 0xf0) >> 4) * 10) +
- ((data[i] & 0x0f));
- leftOfPoint = time_tmp / 100;
- rightOfPoint = time_tmp % 100;
- break;
- case SDRAM:
- leftOfPoint = (data[i] & 0xf0) >> 4;
- if (leftOfPoint > 7) {
- leftOfPoint = data[i] & 0x70 >> 4;
- sign = -1;
- }
- rightOfPoint = (data[i] & 0x0f);
- break;
- }
- dimmInfo->dataInputSetupTime =
- (leftOfPoint * 100 + rightOfPoint) * sign;
- DP (printf
- ("Data Input Setup Time [ns]: %d.%d\n",
- sign * leftOfPoint, rightOfPoint));
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
-
- case 35: /* Data Input Hold Time */
- sign = 1;
- switch (dimmInfo->memoryType) {
- case DDR:
- time_tmp =
- (((data[i] & 0xf0) >> 4) * 10) +
- ((data[i] & 0x0f));
- leftOfPoint = time_tmp / 100;
- rightOfPoint = time_tmp % 100;
- break;
- case SDRAM:
- leftOfPoint = (data[i] & 0xf0) >> 4;
- if (leftOfPoint > 7) {
- leftOfPoint = data[i] & 0x70 >> 4;
- sign = -1;
- }
- rightOfPoint = (data[i] & 0x0f);
- break;
- }
- dimmInfo->dataInputHoldTime =
- (leftOfPoint * 100 + rightOfPoint) * sign;
- DP (printf
- ("Data Input Hold Time [ns]: %d.%d\n\n",
- sign * leftOfPoint, rightOfPoint));
- break;
-/*------------------------------------------------------------------------------------------------------------------------------*/
- }
- }
- /* calculating the sdram density */
- for (i = 0;
- i < dimmInfo->numOfRowAddresses + dimmInfo->numOfColAddresses;
- i++) {
- density = density * 2;
- }
- dimmInfo->deviceDensity = density * dimmInfo->numOfBanksOnEachDevice *
- dimmInfo->sdramWidth;
- dimmInfo->numberOfDevices =
- (dimmInfo->dataWidth / dimmInfo->sdramWidth) *
- dimmInfo->numOfModuleBanks;
- devicesForErrCheck =
- (dimmInfo->dataWidth - 64) / dimmInfo->sdramWidth;
- if ((dimmInfo->errorCheckType == 0x1)
- || (dimmInfo->errorCheckType == 0x2)
- || (dimmInfo->errorCheckType == 0x3)) {
- dimmInfo->size =
- (dimmInfo->deviceDensity / 8) *
- (dimmInfo->numberOfDevices - devicesForErrCheck);
- } else {
- dimmInfo->size =
- (dimmInfo->deviceDensity / 8) *
- dimmInfo->numberOfDevices;
- }
-
- /* compute the module DRB size */
- tmp = (1 <<
- (dimmInfo->numOfRowAddresses + dimmInfo->numOfColAddresses));
- tmp *= dimmInfo->numOfModuleBanks;
- tmp *= dimmInfo->sdramWidth;
- tmp = tmp >> 24; /* div by 0x4000000 (64M) */
- dimmInfo->drb_size = (uchar) tmp;
- DP (printf ("Module DRB size (n*64Mbit): %d\n", dimmInfo->drb_size));
-
- /* try a CAS latency of 3 first... */
-
- /* bit 1 is CL2, bit 2 is CL3 */
- supp_cal = (dimmInfo->suportedCasLatencies & 0x1c) >> 1;
-
- cal_val = 0;
- if (supp_cal & 8) {
- if (NS10to10PS (data[9]) <= tmemclk)
- cal_val = 6;
- }
- if (supp_cal & 4) {
- if (NS10to10PS (data[9]) <= tmemclk)
- cal_val = 5;
- }
-
- /* then 2... */
- if (supp_cal & 2) {
- if (NS10to10PS (data[23]) <= tmemclk)
- cal_val = 4;
- }
-
- DP (printf ("cal_val = %d\n", cal_val * 5));
-
- /* bummer, did't work... */
- if (cal_val == 0) {
- DP (printf ("Couldn't find a good CAS latency\n"));
- hang ();
- return 0;
- }
-
- return true;
-}
-
-/* sets up the GT properly with information passed in */
-int setup_sdram (AUX_MEM_DIMM_INFO * info)
-{
- ulong tmp, check;
- ulong tmp_sdram_mode = 0; /* 0x141c */
- ulong tmp_dunit_control_low = 0; /* 0x1404 */
- int i;
-
- /* sanity checking */
- if (!info->numOfModuleBanks) {
- printf ("setup_sdram called with 0 banks\n");
- return 1;
- }
-
- /* delay line */
-
- /* Program the GT with the discovered data */
- if (info->registeredAddrAndControlInputs == true)
- DP (printf
- ("Module is registered, but we do not support registered Modules !!!\n"));
-
-
- /* delay line */
- set_dfcdlInit (); /* may be its not needed */
- DP (printf ("Delay line set done\n"));
-
- /* set SDRAM mode NOP */ /* To_do check it */
- GT_REG_WRITE (SDRAM_OPERATION, 0x5);
- while (GTREGREAD (SDRAM_OPERATION) != 0) {
- DP (printf
- ("\n*** SDRAM_OPERATION 1418: Module still busy ... please wait... ***\n"));
- }
-
- /* SDRAM configuration */
- GT_REG_WRITE (SDRAM_CONFIG, 0x58200400);
- DP (printf ("sdram_conf 0x1400: %08x\n", GTREGREAD (SDRAM_CONFIG)));
-
- /* SDRAM open pages controll keep open as much as I can */
- GT_REG_WRITE (SDRAM_OPEN_PAGES_CONTROL, 0x0);
- DP (printf
- ("sdram_open_pages_controll 0x1414: %08x\n",
- GTREGREAD (SDRAM_OPEN_PAGES_CONTROL)));
-
-
- /* SDRAM D_UNIT_CONTROL_LOW 0x1404 */
- tmp = (GTREGREAD (D_UNIT_CONTROL_LOW) & 0x01); /* Clock Domain Sync from power on reset */
- if (tmp == 0)
- DP (printf ("Core Signals are sync (by HW-Setting)!!!\n"));
- else
- DP (printf
- ("Core Signals syncs. are bypassed (by HW-Setting)!!!\n"));
-
- /* SDRAM set CAS Lentency according to SPD information */
- switch (info->memoryType) {
- case SDRAM:
- DP (printf ("### SD-RAM not supported yet !!!\n"));
- hang ();
- /* ToDo fill SD-RAM if needed !!!!! */
- break;
-
- case DDR:
- DP (printf ("### SET-CL for DDR-RAM\n"));
-
- switch (info->maxClSupported_DDR) {
- case DDR_CL_3:
- tmp_dunit_control_low = 0x3c000000; /* Read-Data sampled on falling edge of Clk */
- tmp_sdram_mode = 0x32; /* CL=3 Burstlength = 4 */
- DP (printf
- ("Max. CL is 3 CLKs 0x141c= %08lx, 0x1404 = %08lx\n",
- tmp_sdram_mode, tmp_dunit_control_low));
- break;
-
- case DDR_CL_2_5:
- if (tmp == 1) { /* clocks sync */
- tmp_dunit_control_low = 0x24000000; /* Read-Data sampled on falling edge of Clk */
- tmp_sdram_mode = 0x62; /* CL=2,5 Burstlength = 4 */
- DP (printf
- ("Max. CL is 2,5s CLKs 0x141c= %08lx, 0x1404 = %08lx\n",
- tmp_sdram_mode, tmp_dunit_control_low));
- } else { /* clk sync. bypassed */
-
- tmp_dunit_control_low = 0x03000000; /* Read-Data sampled on rising edge of Clk */
- tmp_sdram_mode = 0x62; /* CL=2,5 Burstlength = 4 */
- DP (printf
- ("Max. CL is 2,5 CLKs 0x141c= %08lx, 0x1404 = %08lx\n",
- tmp_sdram_mode, tmp_dunit_control_low));
- }
- break;
-
- case DDR_CL_2:
- if (tmp == 1) { /* Sync */
- tmp_dunit_control_low = 0x03000000; /* Read-Data sampled on rising edge of Clk */
- tmp_sdram_mode = 0x22; /* CL=2 Burstlength = 4 */
- DP (printf
- ("Max. CL is 2s CLKs 0x141c= %08lx, 0x1404 = %08lx\n",
- tmp_sdram_mode, tmp_dunit_control_low));
- } else { /* Not sync. */
-
- tmp_dunit_control_low = 0x3b000000; /* Read-Data sampled on rising edge of Clk */
- tmp_sdram_mode = 0x22; /* CL=2 Burstlength = 4 */
- DP (printf
- ("Max. CL is 2 CLKs 0x141c= %08lx, 0x1404 = %08lx\n",
- tmp_sdram_mode, tmp_dunit_control_low));
- }
- break;
-
- case DDR_CL_1_5:
- if (tmp == 1) { /* Sync */
- tmp_dunit_control_low = 0x23000000; /* Read-Data sampled on falling edge of Clk */
- tmp_sdram_mode = 0x52; /* CL=1,5 Burstlength = 4 */
- DP (printf
- ("Max. CL is 1,5s CLKs 0x141c= %08lx, 0x1404 = %08lx\n",
- tmp_sdram_mode, tmp_dunit_control_low));
- } else { /* not sync */
-
- tmp_dunit_control_low = 0x1a000000; /* Read-Data sampled on rising edge of Clk */
- tmp_sdram_mode = 0x52; /* CL=1,5 Burstlength = 4 */
- DP (printf
- ("Max. CL is 1,5 CLKs 0x141c= %08lx, 0x1404 = %08lx\n",
- tmp_sdram_mode, tmp_dunit_control_low));
- }
- break;
-
- default:
- printf ("Max. CL is out of range %d\n",
- info->maxClSupported_DDR);
- hang ();
- break;
- }
- break;
- }
-
- /* Write results of CL detection procedure */
- GT_REG_WRITE (SDRAM_MODE, tmp_sdram_mode);
- /* set SDRAM mode SetCommand 0x1418 */
- GT_REG_WRITE (SDRAM_OPERATION, 0x3);
- while (GTREGREAD (SDRAM_OPERATION) != 0) {
- DP (printf
- ("\n*** SDRAM_OPERATION 1418 after SDRAM_MODE: Module still busy ... please wait... ***\n"));
- }
-
-
- /* SDRAM D_UNIT_CONTROL_LOW 0x1404 */
- tmp = (GTREGREAD (D_UNIT_CONTROL_LOW) & 0x01); /* Clock Domain Sync from power on reset */
- if (tmp != 1) { /*clocks are not sync */
- /* asyncmode */
- GT_REG_WRITE (D_UNIT_CONTROL_LOW,
- (GTREGREAD (D_UNIT_CONTROL_LOW) & 0x7F) |
- 0x18110780 | tmp_dunit_control_low);
- } else {
- /* syncmode */
- GT_REG_WRITE (D_UNIT_CONTROL_LOW,
- (GTREGREAD (D_UNIT_CONTROL_LOW) & 0x7F) |
- 0x00110000 | tmp_dunit_control_low);
- }
-
- /* set SDRAM mode SetCommand 0x1418 */
- GT_REG_WRITE (SDRAM_OPERATION, 0x3);
- while (GTREGREAD (SDRAM_OPERATION) != 0) {
- DP (printf
- ("\n*** SDRAM_OPERATION 1418 after D_UNIT_CONTROL_LOW: Module still busy ... please wait... ***\n"));
- }
-
-/*------------------------------------------------------------------------------ */
-
-
- /* bank parameters */
- /* SDRAM address decode register */
- /* program this with the default value */
- tmp = 0x02;
-
-
- DP (printf ("drb_size (n*64Mbit): %d\n", info->drb_size));
- switch (info->drb_size) {
- case 1: /* 64 Mbit */
- case 2: /* 128 Mbit */
- DP (printf ("RAM-Device_size 64Mbit or 128Mbit)\n"));
- tmp |= (0x00 << 4);
- break;
- case 4: /* 256 Mbit */
- case 8: /* 512 Mbit */
- DP (printf ("RAM-Device_size 256Mbit or 512Mbit)\n"));
- tmp |= (0x01 << 4);
- break;
- case 16: /* 1 Gbit */
- case 32: /* 2 Gbit */
- DP (printf ("RAM-Device_size 1Gbit or 2Gbit)\n"));
- tmp |= (0x02 << 4);
- break;
- default:
- printf ("Error in dram size calculation\n");
- DP (printf ("Assume: RAM-Device_size 1Gbit or 2Gbit)\n"));
- tmp |= (0x02 << 4);
- return 1;
- }
-
- /* SDRAM bank parameters */
- /* the param registers for slot 1 (banks 2+3) are offset by 0x8 */
- DP (printf
- ("setting up slot %d config with: %08lx \n", info->slot, tmp));
- GT_REG_WRITE (SDRAM_ADDR_CONTROL, tmp);
-
-/* ------------------------------------------------------------------------------ */
-
- DP (printf
- ("setting up sdram_timing_control_low with: %08x \n",
- 0x11511220));
- GT_REG_WRITE (SDRAM_TIMING_CONTROL_LOW, 0x11511220);
-
-
-/* ------------------------------------------------------------------------------ */
-
- /* SDRAM configuration */
- tmp = GTREGREAD (SDRAM_CONFIG);
-
- if (info->registeredAddrAndControlInputs
- || info->registeredDQMBinputs) {
- tmp |= (1 << 17);
- DP (printf
- ("SPD says: registered Addr. and Cont.: %d; registered DQMBinputs: %d\n",
- info->registeredAddrAndControlInputs,
- info->registeredDQMBinputs));
- }
-
- /* Use buffer 1 to return read data to the CPU
- * Page 426 MV64360 */
- tmp |= (1 << 26);
- DP (printf
- ("Before Buffer assignment - sdram_conf: %08x\n",
- GTREGREAD (SDRAM_CONFIG)));
- DP (printf
- ("After Buffer assignment - sdram_conf: %08x\n",
- GTREGREAD (SDRAM_CONFIG)));
-
- /* SDRAM timing To_do: */
-
-
- tmp = GTREGREAD (SDRAM_TIMING_CONTROL_HIGH);
- DP (printf ("# sdram_timing_control_high is : %08lx \n", tmp));
-
- /* SDRAM address decode register */
- /* program this with the default value */
- tmp = GTREGREAD (SDRAM_ADDR_CONTROL);
- DP (printf
- ("SDRAM address control (before: decode): %08x ",
- GTREGREAD (SDRAM_ADDR_CONTROL)));
- GT_REG_WRITE (SDRAM_ADDR_CONTROL, (tmp | 0x2));
- DP (printf
- ("SDRAM address control (after: decode): %08x\n",
- GTREGREAD (SDRAM_ADDR_CONTROL)));
-
- /* set the SDRAM configuration for each bank */
-
-/* for (i = info->slot * 2; i < ((info->slot * 2) + info->banks); i++) */
- {
- i = info->slot;
- DP (printf
- ("\n*** Running a MRS cycle for bank %d ***\n", i));
-
- /* map the bank */
- memory_map_bank (i, 0, GB / 4);
-#if 1 /* test only */
- /* set SDRAM mode */ /* To_do check it */
- GT_REG_WRITE (SDRAM_OPERATION, 0x3);
- check = GTREGREAD (SDRAM_OPERATION);
- DP (printf
- ("\n*** SDRAM_OPERATION 1418 (0 = Normal Operation) = %08lx ***\n",
- check));
-
-
- /* switch back to normal operation mode */
- GT_REG_WRITE (SDRAM_OPERATION, 0);
- check = GTREGREAD (SDRAM_OPERATION);
- DP (printf
- ("\n*** SDRAM_OPERATION 1418 (0 = Normal Operation) = %08lx ***\n",
- check));
-#endif /* test only */
- /* unmap the bank */
- memory_map_bank (i, 0, 0);
- }
-
- return 0;
-}
-
-/*
- * Check memory range for valid RAM. A simple memory test determines
- * the actually available RAM size between addresses `base' and
- * `base + maxsize'. Some (not all) hardware errors are detected:
- * - short between address lines
- * - short between data lines
- */
-long int
-dram_size(long int *base, long int maxsize)
-{
- volatile long int *addr, *b=base;
- long int cnt, val, save1, save2;
-
-#define STARTVAL (1<<20) /* start test at 1M */
- for (cnt = STARTVAL/sizeof(long); cnt < maxsize/sizeof(long); cnt <<= 1) {
- addr = base + cnt; /* pointer arith! */
-
- save1=*addr; /* save contents of addr */
- save2=*b; /* save contents of base */
-
- *addr=cnt; /* write cnt to addr */
- *b=0; /* put null at base */
-
- /* check at base address */
- if ((*b) != 0) {
- *addr=save1; /* restore *addr */
- *b=save2; /* restore *b */
- return (0);
- }
- val = *addr; /* read *addr */
- val = *addr; /* read *addr */
-
- *addr=save1;
- *b=save2;
-
- if (val != cnt) {
- DP(printf("Found %08x at Address %08x (failure)\n", (unsigned int)val, (unsigned int) addr));
- /* fix boundary condition.. STARTVAL means zero */
- if(cnt==STARTVAL/sizeof(long)) cnt=0;
- return (cnt * sizeof(long));
- }
- }
- return maxsize;
-}
-
-/* ------------------------------------------------------------------------- */
-
-/* ppcboot interface function to SDRAM init - this is where all the
- * controlling logic happens */
-long int
-initdram(int board_type)
-{
- int s0 = 0, s1 = 0;
- int checkbank[4] = { [0 ... 3] = 0 };
- ulong bank_no, realsize, total, check;
- AUX_MEM_DIMM_INFO dimmInfo1;
- AUX_MEM_DIMM_INFO dimmInfo2;
- int nhr;
-
- /* first, use the SPD to get info about the SDRAM/ DDRRAM */
-
- /* check the NHR bit and skip mem init if it's already done */
- nhr = get_hid0() & (1 << 16);
-
- if (nhr) {
- printf("Skipping SD- DDRRAM setup due to NHR bit being set\n");
- } else {
- /* DIMM0 */
- s0 = check_dimm(0, &dimmInfo1);
-
- /* DIMM1 */
- s1 = check_dimm(1, &dimmInfo2);
-
- memory_map_bank(0, 0, 0);
- memory_map_bank(1, 0, 0);
- memory_map_bank(2, 0, 0);
- memory_map_bank(3, 0, 0);
-
- if (dimmInfo1.numOfModuleBanks && setup_sdram(&dimmInfo1)) {
- printf("Setup for DIMM1 failed.\n");
- }
-
- if (dimmInfo2.numOfModuleBanks && setup_sdram(&dimmInfo2)) {
- printf("Setup for DIMM2 failed.\n");
- }
-
- /* set the NHR bit */
- set_hid0(get_hid0() | (1 << 16));
- }
- /* next, size the SDRAM banks */
-
- realsize = total = 0;
- check = GB/4;
- if (dimmInfo1.numOfModuleBanks > 0) {checkbank[0] = 1; printf("-- DIMM1 has 1 bank\n");}
- if (dimmInfo1.numOfModuleBanks > 1) {checkbank[1] = 1; printf("-- DIMM1 has 2 banks\n");}
- if (dimmInfo1.numOfModuleBanks > 2)
- printf("Error, SPD claims DIMM1 has >2 banks\n");
-
- if (dimmInfo2.numOfModuleBanks > 0) {checkbank[2] = 1; printf("-- DIMM2 has 1 bank\n");}
- if (dimmInfo2.numOfModuleBanks > 1) {checkbank[3] = 1; printf("-- DIMM2 has 2 banks\n");}
- if (dimmInfo2.numOfModuleBanks > 2)
- printf("Error, SPD claims DIMM2 has >2 banks\n");
-
- for (bank_no = 0; bank_no < CFG_DRAM_BANKS; bank_no++) {
- /* skip over banks that are not populated */
- if (! checkbank[bank_no])
- continue;
-
- if ((total + check) > CFG_GT_REGS)
- check = CFG_GT_REGS - total;
-
- memory_map_bank(bank_no, total, check);
- realsize = dram_size((long int *)total, check);
- memory_map_bank(bank_no, total, realsize);
-
- total += realsize;
- }
-
-/* Setup Ethernet DMA Adress window to DRAM Area */
- return(total);
-}
-
-/* ***************************************************************************************
-! * SDRAM INIT *
-! * This procedure detect all Sdram types: 64, 128, 256, 512 Mbit, 1Gbit and 2Gb *
-! * This procedure fits only the Atlantis *
-! * *
-! *************************************************************************************** */
-
-
-/* ***************************************************************************************
-! * DFCDL initialize MV643xx Design Considerations *
-! * *
-! *************************************************************************************** */
-int set_dfcdlInit (void)
-{
- int i;
- unsigned int dfcdl_word = 0x0000014f;
-
- for (i = 0; i < 64; i++) {
- GT_REG_WRITE (SRAM_DATA0, dfcdl_word);
- }
- GT_REG_WRITE (DFCDL_CONFIG0, 0x00300000); /* enable dynamic delay line updating */
-
-
- return (0);
-}
diff --git a/board/esd/cpci750/serial.c b/board/esd/cpci750/serial.c
deleted file mode 100644
index 44de052566..0000000000
--- a/board/esd/cpci750/serial.c
+++ /dev/null
@@ -1,110 +0,0 @@
-/*
- * (C) Copyright 2001
- * Josh Huber <huber@mclx.com>, Mission Critical Linux, Inc.
- *
- * modified for marvell db64360 eval board by
- * Ingo Assmus <ingo.assmus@keymile.com>
- *
- * modified for cpci750 board by
- * Reinhard Arlt <reinhard.arlt@esd-electronics.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * serial.c - serial support for esd cpci750 board
- */
-
-/* supports the MPSC */
-
-#include <common.h>
-#include <command.h>
-#include "../../Marvell/include/memory.h"
-#include "serial.h"
-
-
-#include "mpsc.h"
-
-int serial_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- mpsc_init (gd->baudrate);
-
- return (0);
-}
-
-void serial_putc (const char c)
-{
- if (c == '\n')
- mpsc_putchar ('\r');
-
- mpsc_putchar (c);
-}
-
-int serial_getc (void)
-{
- return mpsc_getchar ();
-}
-
-int serial_tstc (void)
-{
- return mpsc_test_char ();
-}
-
-void serial_setbrg (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- galbrg_set_baudrate (CONFIG_MPSC_PORT, gd->baudrate);
-}
-
-
-void serial_puts (const char *s)
-{
- while (*s) {
- serial_putc (*s++);
- }
-}
-
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
-void kgdb_serial_init (void)
-{
-}
-
-void putDebugChar (int c)
-{
- serial_putc (c);
-}
-
-void putDebugStr (const char *str)
-{
- serial_puts (str);
-}
-
-int getDebugChar (void)
-{
- return serial_getc ();
-}
-
-void kgdb_interruptible (int yes)
-{
- return;
-}
-#endif /* CFG_CMD_KGDB */
diff --git a/board/esd/cpci750/serial.h b/board/esd/cpci750/serial.h
deleted file mode 100644
index c7fc8c162d..0000000000
--- a/board/esd/cpci750/serial.h
+++ /dev/null
@@ -1,89 +0,0 @@
-/*
- * (C) Copyright 2001
- * Josh Huber <huber@mclx.com>, Mission Critical Linux, Inc.
- *
- * modified for marvell db64360 eval board by
- * Ingo Assmus <ingo.assmus@keymile.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/* serial.h - mostly useful for DUART serial_init in serial.c */
-
-#ifndef __SERIAL_H__
-#define __SERIAL_H__
-
-#if 0
-
-#define B230400 1
-#define B115200 2
-#define B57600 4
-#define B38400 82
-#define B19200 163
-#define B9600 24
-#define B4800 651
-#define B2400 1302
-#define B1200 2604
-#define B600 5208
-#define B300 10417
-#define B150 20833
-#define B110 28409
-#define BDEFAULT B115200
-
- /* this stuff is important to initialize
- the DUART channels */
-
-#define Scale 0x01L /* distance between port addresses */
-#define COM1 0x000003f8 /* Keyboard */
-#define COM2 0x000002f8 /* Host */
-
-
-/* Port Definitions relative to base COM port addresses */
-#define DataIn (0x00*Scale) /* data input port */
-#define DataOut (0x00*Scale) /* data output port */
-#define BaudLsb (0x00*Scale) /* baud rate divisor least significant byte */
-#define BaudMsb (0x01*Scale) /* baud rate divisor most significant byte */
-#define Ier (0x01*Scale) /* interrupt enable register */
-#define Iir (0x02*Scale) /* interrupt identification register */
-#define Lcr (0x03*Scale) /* line control register */
-#define Mcr (0x04*Scale) /* modem control register */
-#define Lsr (0x05*Scale) /* line status register */
-#define Msr (0x06*Scale) /* modem status register */
-
-/* Bit Definitions for above ports */
-#define LcrDlab 0x80 /* b7: enable baud rate divisor registers */
-#define LcrDflt 0x03 /* b6-0: no parity, 1 stop, 8 data */
-
-#define McrRts 0x02 /* b1: request to send (I am ready to xmit) */
-#define McrDtr 0x01 /* b0: data terminal ready (I am alive ready to rcv) */
-#define McrDflt (McrRts|McrDtr)
-
-#define LsrTxD 0x6000 /* b5: transmit holding register empty (i.e. xmit OK!)*/
- /* b6: transmitter empty */
-#define LsrRxD 0x0100 /* b0: received data ready (i.e. got a byte!) */
-
-#define MsrRi 0x0040 /* b6: ring indicator (other guy is ready to rcv) */
-#define MsrDsr 0x0020 /* b5: data set ready (other guy is alive ready to rcv */
-#define MsrCts 0x0010 /* b4: clear to send (other guy is ready to rcv) */
-
-#define IerRda 0xf /* b0: Enable received data available interrupt */
-
-#endif
-
-#endif /* __SERIAL_H__ */
diff --git a/board/esd/cpci750/strataflash.c b/board/esd/cpci750/strataflash.c
deleted file mode 100644
index c22fe5df1d..0000000000
--- a/board/esd/cpci750/strataflash.c
+++ /dev/null
@@ -1,763 +0,0 @@
-/*
- * (C) Copyright 2002
- * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/processor.h>
-#include <asm/cache.h>
-
-#undef DEBUG_FLASH
-/*
- * This file implements a Common Flash Interface (CFI) driver for U-Boot.
- * The width of the port and the width of the chips are determined at initialization.
- * These widths are used to calculate the address for access CFI data structures.
- * It has been tested on an Intel Strataflash implementation.
- *
- * References
- * JEDEC Standard JESD68 - Common Flash Interface (CFI)
- * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
- * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
- * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
- *
- * TODO
- * Use Primary Extended Query table (PRI) and Alternate Algorithm Query Table (ALT) to determine if protection is available
- * Add support for other command sets Use the PRI and ALT to determine command set
- * Verify erase and program timeouts.
- */
-
-#define FLASH_CMD_CFI 0x98
-#define FLASH_CMD_READ_ID 0x90
-#define FLASH_CMD_RESET 0xff
-#define FLASH_CMD_BLOCK_ERASE 0x20
-#define FLASH_CMD_ERASE_CONFIRM 0xD0
-#define FLASH_CMD_WRITE 0x40
-#define FLASH_CMD_PROTECT 0x60
-#define FLASH_CMD_PROTECT_SET 0x01
-#define FLASH_CMD_PROTECT_CLEAR 0xD0
-#define FLASH_CMD_CLEAR_STATUS 0x50
-#define FLASH_CMD_WRITE_TO_BUFFER 0xE8
-#define FLASH_CMD_WRITE_BUFFER_CONFIRM 0xD0
-
-#define FLASH_STATUS_DONE 0x80
-#define FLASH_STATUS_ESS 0x40
-#define FLASH_STATUS_ECLBS 0x20
-#define FLASH_STATUS_PSLBS 0x10
-#define FLASH_STATUS_VPENS 0x08
-#define FLASH_STATUS_PSS 0x04
-#define FLASH_STATUS_DPS 0x02
-#define FLASH_STATUS_R 0x01
-#define FLASH_STATUS_PROTECT 0x01
-
-#define FLASH_OFFSET_CFI 0x55
-#define FLASH_OFFSET_CFI_RESP 0x10
-#define FLASH_OFFSET_WTOUT 0x1F
-#define FLASH_OFFSET_WBTOUT 0x20
-#define FLASH_OFFSET_ETOUT 0x21
-#define FLASH_OFFSET_CETOUT 0x22
-#define FLASH_OFFSET_WMAX_TOUT 0x23
-#define FLASH_OFFSET_WBMAX_TOUT 0x24
-#define FLASH_OFFSET_EMAX_TOUT 0x25
-#define FLASH_OFFSET_CEMAX_TOUT 0x26
-#define FLASH_OFFSET_SIZE 0x27
-#define FLASH_OFFSET_INTERFACE 0x28
-#define FLASH_OFFSET_BUFFER_SIZE 0x2A
-#define FLASH_OFFSET_NUM_ERASE_REGIONS 0x2C
-#define FLASH_OFFSET_ERASE_REGIONS 0x2D
-#define FLASH_OFFSET_PROTECT 0x02
-#define FLASH_OFFSET_USER_PROTECTION 0x85
-#define FLASH_OFFSET_INTEL_PROTECTION 0x81
-
-
-#define FLASH_MAN_CFI 0x01000000
-
-
-typedef union {
- unsigned char c;
- unsigned short w;
- unsigned long l;
-} cfiword_t;
-
-typedef union {
- unsigned char * cp;
- unsigned short *wp;
- unsigned long *lp;
-} cfiptr_t;
-
-#define NUM_ERASE_REGIONS 4
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-
-
-static void flash_add_byte(flash_info_t *info, cfiword_t * cword, uchar c);
-static void flash_make_cmd(flash_info_t * info, uchar cmd, void * cmdbuf);
-static void flash_write_cmd(flash_info_t * info, int sect, uchar offset, uchar cmd);
-static int flash_isequal(flash_info_t * info, int sect, uchar offset, uchar cmd);
-static int flash_isset(flash_info_t * info, int sect, uchar offset, uchar cmd);
-static int flash_detect_cfi(flash_info_t * info);
-static ulong flash_get_size (ulong base, int banknum);
-static int flash_write_cfiword (flash_info_t *info, ulong dest, cfiword_t cword);
-static int flash_full_status_check(flash_info_t * info, ulong sector, ulong tout, char * prompt);
-#ifdef CFG_FLASH_USE_BUFFER_WRITE
-static int flash_write_cfibuffer(flash_info_t * info, ulong dest, uchar * cp, int len);
-#endif
-/*-----------------------------------------------------------------------
- * create an address based on the offset and the port width
- */
-inline uchar * flash_make_addr(flash_info_t * info, int sect, int offset)
-{
- return ((uchar *)(info->start[sect] + (offset * info->portwidth)));
-}
-/*-----------------------------------------------------------------------
- * read a character at a port width address
- */
-inline uchar flash_read_uchar(flash_info_t * info, uchar offset)
-{
- uchar *cp;
- cp = flash_make_addr(info, 0, offset);
- return (cp[info->portwidth - 1]);
-}
-
-/*-----------------------------------------------------------------------
- * read a short word by swapping for ppc format.
- */
-ushort flash_read_ushort(flash_info_t * info, int sect, uchar offset)
-{
- uchar * addr;
-
- addr = flash_make_addr(info, sect, offset);
- return ((addr[(2*info->portwidth) - 1] << 8) | addr[info->portwidth - 1]);
-
-}
-
-/*-----------------------------------------------------------------------
- * read a long word by picking the least significant byte of each maiximum
- * port size word. Swap for ppc format.
- */
-ulong flash_read_long(flash_info_t * info, int sect, uchar offset)
-{
- uchar * addr;
-
- addr = flash_make_addr(info, sect, offset);
- return ( (addr[(2*info->portwidth) - 1] << 24 ) | (addr[(info->portwidth) -1] << 16) |
- (addr[(4*info->portwidth) - 1] << 8) | addr[(3*info->portwidth) - 1]);
-
-}
-
-/*-----------------------------------------------------------------------
- */
-unsigned long flash_init (void)
-{
- unsigned long size;
- int i;
- unsigned long address;
-
-
- /* The flash is positioned back to back, with the demultiplexing of the chip
- * based on the A24 address line.
- *
- */
-
- address = CFG_FLASH_BASE;
- size = 0;
-
- /* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- size += flash_info[i].size = flash_get_size(address, i);
- address += CFG_FLASH_INCREMENT;
- if (flash_info[i].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n",i,
- flash_info[0].size, flash_info[i].size<<20);
- }
- }
-
-#if 0 /* test-only */
- /* Monitor protection ON by default */
-#if (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
- for(i=0; flash_info[0].start[i] < CFG_MONITOR_BASE+monitor_flash_len-1; i++)
- (void)flash_real_protect(&flash_info[0], i, 1);
-#endif
-#endif
-
- return (size);
-}
-
-/*-----------------------------------------------------------------------
- */
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- int rcode = 0;
- int prot;
- int sect;
-
- if( info->flash_id != FLASH_MAN_CFI) {
- printf ("Can't erase unknown flash type - aborted\n");
- return 1;
- }
- if ((s_first < 0) || (s_first > s_last)) {
- printf ("- no sectors to erase\n");
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
-
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- flash_write_cmd(info, sect, 0, FLASH_CMD_CLEAR_STATUS);
- flash_write_cmd(info, sect, 0, FLASH_CMD_BLOCK_ERASE);
- flash_write_cmd(info, sect, 0, FLASH_CMD_ERASE_CONFIRM);
-
- if(flash_full_status_check(info, sect, info->erase_blk_tout, "erase")) {
- rcode = 1;
- } else
- printf(".");
- }
- }
- printf (" done\n");
- return rcode;
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t *info)
-{
- int i;
-
- if (info->flash_id != FLASH_MAN_CFI) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- printf("CFI conformant FLASH (%d x %d)",
- (info->portwidth << 3 ), (info->chipwidth << 3 ));
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
- printf(" Erase timeout %ld ms, write timeout %ld ms, buffer write timeout %ld ms, buffer size %d\n",
- info->erase_blk_tout, info->write_tout, info->buffer_write_tout, info->buffer_size);
-
- printf (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n");
- printf (" %08lX%5s",
- info->start[i],
- info->protect[i] ? " (RO)" : " "
- );
- }
- printf ("\n");
- return;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong wp;
- ulong cp;
- int aln;
- cfiword_t cword;
- int i, rc;
-
- /* get lower aligned address */
- wp = (addr & ~(info->portwidth - 1));
-
- /* handle unaligned start */
- if((aln = addr - wp) != 0) {
- cword.l = 0;
- cp = wp;
- for(i=0;i<aln; ++i, ++cp)
- flash_add_byte(info, &cword, (*(uchar *)cp));
-
- for(; (i< info->portwidth) && (cnt > 0) ; i++) {
- flash_add_byte(info, &cword, *src++);
- cnt--;
- cp++;
- }
- for(; (cnt == 0) && (i < info->portwidth); ++i, ++cp)
- flash_add_byte(info, &cword, (*(uchar *)cp));
- if((rc = flash_write_cfiword(info, wp, cword)) != 0)
- return rc;
- wp = cp;
- }
-
-#ifdef CFG_FLASH_USE_BUFFER_WRITE
- while(cnt >= info->portwidth) {
- i = info->buffer_size > cnt? cnt: info->buffer_size;
- if((rc = flash_write_cfibuffer(info, wp, src,i)) != ERR_OK)
- return rc;
- wp += i;
- src += i;
- cnt -=i;
- }
-#else
- /* handle the aligned part */
- while(cnt >= info->portwidth) {
- cword.l = 0;
- for(i = 0; i < info->portwidth; i++) {
- flash_add_byte(info, &cword, *src++);
- }
- if((rc = flash_write_cfiword(info, wp, cword)) != 0)
- return rc;
- wp += info->portwidth;
- cnt -= info->portwidth;
- }
-#endif /* CFG_FLASH_USE_BUFFER_WRITE */
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- cword.l = 0;
- for (i=0, cp=wp; (i<info->portwidth) && (cnt>0); ++i, ++cp) {
- flash_add_byte(info, &cword, *src++);
- --cnt;
- }
- for (; i<info->portwidth; ++i, ++cp) {
- flash_add_byte(info, & cword, (*(uchar *)cp));
- }
-
- return flash_write_cfiword(info, wp, cword);
-}
-
-/*-----------------------------------------------------------------------
- */
-int flash_real_protect(flash_info_t *info, long sector, int prot)
-{
- int retcode = 0;
-
- flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
- flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT);
- if(prot)
- flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT_SET);
- else
- flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
-
- if((retcode = flash_full_status_check(info, sector, info->erase_blk_tout,
- prot?"protect":"unprotect")) == 0) {
-
- info->protect[sector] = prot;
- /* Intel's unprotect unprotects all locking */
- if(prot == 0) {
- int i;
- for(i = 0 ; i<info->sector_count; i++) {
- if(info->protect[i])
- flash_real_protect(info, i, 1);
- }
- }
- }
-
- return retcode;
-}
-/*-----------------------------------------------------------------------
- * wait for XSR.7 to be set. Time out with an error if it does not.
- * This routine does not set the flash to read-array mode.
- */
-static int flash_status_check(flash_info_t * info, ulong sector, ulong tout, char * prompt)
-{
- ulong start;
-
- /* Wait for command completion */
- start = get_timer (0);
- while(!flash_isset(info, sector, 0, FLASH_STATUS_DONE)) {
- if (get_timer(start) > info->erase_blk_tout) {
- printf("Flash %s timeout at address %lx\n", prompt, info->start[sector]);
- flash_write_cmd(info, sector, 0, FLASH_CMD_RESET);
- return ERR_TIMOUT;
- }
- }
- return ERR_OK;
-}
-/*-----------------------------------------------------------------------
- * Wait for XSR.7 to be set, if it times out print an error, otherwise do a full status check.
- * This routine sets the flash to read-array mode.
- */
-static int flash_full_status_check(flash_info_t * info, ulong sector, ulong tout, char * prompt)
-{
- int retcode;
- retcode = flash_status_check(info, sector, tout, prompt);
- if((retcode == ERR_OK) && !flash_isequal(info,sector, 0, FLASH_STATUS_DONE)) {
- retcode = ERR_INVAL;
- printf("Flash %s error at address %lx\n", prompt,info->start[sector]);
- if(flash_isset(info, sector, 0, FLASH_STATUS_ECLBS | FLASH_STATUS_PSLBS)){
- printf("Command Sequence Error.\n");
- } else if(flash_isset(info, sector, 0, FLASH_STATUS_ECLBS)){
- printf("Block Erase Error.\n");
- retcode = ERR_NOT_ERASED;
- } else if (flash_isset(info, sector, 0, FLASH_STATUS_PSLBS)) {
- printf("Locking Error\n");
- }
- if(flash_isset(info, sector, 0, FLASH_STATUS_DPS)){
- printf("Block locked.\n");
- retcode = ERR_PROTECTED;
- }
- if(flash_isset(info, sector, 0, FLASH_STATUS_VPENS))
- printf("Vpp Low Error.\n");
- }
- flash_write_cmd(info, sector, 0, FLASH_CMD_RESET);
- return retcode;
-}
-/*-----------------------------------------------------------------------
- */
-static void flash_add_byte(flash_info_t *info, cfiword_t * cword, uchar c)
-{
- switch(info->portwidth) {
- case FLASH_CFI_8BIT:
- cword->c = c;
- break;
- case FLASH_CFI_16BIT:
- cword->w = (cword->w << 8) | c;
- break;
- case FLASH_CFI_32BIT:
- cword->l = (cword->l << 8) | c;
- }
-}
-
-
-/*-----------------------------------------------------------------------
- * make a proper sized command based on the port and chip widths
- */
-static void flash_make_cmd(flash_info_t * info, uchar cmd, void * cmdbuf)
-{
- int i;
- uchar *cp = (uchar *)cmdbuf;
- for(i=0; i< info->portwidth; i++)
- *cp++ = ((i+1) % info->chipwidth) ? '\0':cmd;
-}
-
-/*
- * Write a proper sized command to the correct address
- */
-static void flash_write_cmd(flash_info_t * info, int sect, uchar offset, uchar cmd)
-{
-
- volatile cfiptr_t addr;
- cfiword_t cword;
- addr.cp = flash_make_addr(info, sect, offset);
- flash_make_cmd(info, cmd, &cword);
- switch(info->portwidth) {
- case FLASH_CFI_8BIT:
- *addr.cp = cword.c;
- break;
- case FLASH_CFI_16BIT:
- *addr.wp = cword.w;
- break;
- case FLASH_CFI_32BIT:
- *addr.lp = cword.l;
- break;
- }
-}
-
-/*-----------------------------------------------------------------------
- */
-static int flash_isequal(flash_info_t * info, int sect, uchar offset, uchar cmd)
-{
- cfiptr_t cptr;
- cfiword_t cword;
- int retval;
- cptr.cp = flash_make_addr(info, sect, offset);
- flash_make_cmd(info, cmd, &cword);
- switch(info->portwidth) {
- case FLASH_CFI_8BIT:
- retval = (cptr.cp[0] == cword.c);
- break;
- case FLASH_CFI_16BIT:
- retval = (cptr.wp[0] == cword.w);
- break;
- case FLASH_CFI_32BIT:
- retval = (cptr.lp[0] == cword.l);
- break;
- default:
- retval = 0;
- break;
- }
- return retval;
-}
-/*-----------------------------------------------------------------------
- */
-static int flash_isset(flash_info_t * info, int sect, uchar offset, uchar cmd)
-{
- cfiptr_t cptr;
- cfiword_t cword;
- int retval;
- cptr.cp = flash_make_addr(info, sect, offset);
- flash_make_cmd(info, cmd, &cword);
- switch(info->portwidth) {
- case FLASH_CFI_8BIT:
- retval = ((cptr.cp[0] & cword.c) == cword.c);
- break;
- case FLASH_CFI_16BIT:
- retval = ((cptr.wp[0] & cword.w) == cword.w);
- break;
- case FLASH_CFI_32BIT:
- retval = ((cptr.lp[0] & cword.l) == cword.l);
- break;
- default:
- retval = 0;
- break;
- }
- return retval;
-}
-
-/*-----------------------------------------------------------------------
- * detect if flash is compatible with the Common Flash Interface (CFI)
- * http://www.jedec.org/download/search/jesd68.pdf
- *
- */
-static int flash_detect_cfi(flash_info_t * info)
-{
-
- for(info->portwidth=FLASH_CFI_8BIT; info->portwidth <= FLASH_CFI_32BIT;
- info->portwidth <<= 1) {
- for(info->chipwidth =FLASH_CFI_BY8;
- info->chipwidth <= info->portwidth;
- info->chipwidth <<= 1) {
- flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
- flash_write_cmd(info, 0, FLASH_OFFSET_CFI, FLASH_CMD_CFI);
- if(flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP,'Q') &&
- flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R') &&
- flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y'))
- return 1;
- }
- }
- return 0;
-}
-/*
- * The following code cannot be run from FLASH!
- *
- */
-static ulong flash_get_size (ulong base, int banknum)
-{
- flash_info_t * info = &flash_info[banknum];
- int i, j;
- int sect_cnt;
- unsigned long sector;
- unsigned long tmp;
- int size_ratio = 0;
- uchar num_erase_regions;
- int erase_region_size;
- int erase_region_count;
-
- info->start[0] = base;
-
- invalidate_dcache_range(base, base+0x400);
-
- if(flash_detect_cfi(info)){
-
- size_ratio = info->portwidth / info->chipwidth;
- num_erase_regions = flash_read_uchar(info, FLASH_OFFSET_NUM_ERASE_REGIONS);
-
- sect_cnt = 0;
- sector = base;
- for(i = 0 ; i < num_erase_regions; i++) {
- if(i > NUM_ERASE_REGIONS) {
- printf("%d erase regions found, only %d used\n",
- num_erase_regions, NUM_ERASE_REGIONS);
- break;
- }
- tmp = flash_read_long(info, 0, FLASH_OFFSET_ERASE_REGIONS);
- erase_region_size = (tmp & 0xffff)? ((tmp & 0xffff) * 256): 128;
- tmp >>= 16;
- erase_region_count = (tmp & 0xffff) +1;
- for(j = 0; j< erase_region_count; j++) {
- info->start[sect_cnt] = sector;
- sector += (erase_region_size * size_ratio);
- info->protect[sect_cnt] = flash_isset(info, sect_cnt, FLASH_OFFSET_PROTECT, FLASH_STATUS_PROTECT);
- sect_cnt++;
- }
- }
-
- info->sector_count = sect_cnt;
- /* multiply the size by the number of chips */
- info->size = (1 << flash_read_uchar(info, FLASH_OFFSET_SIZE)) * size_ratio;
- info->buffer_size = (1 << flash_read_ushort(info, 0, FLASH_OFFSET_BUFFER_SIZE));
- tmp = 1 << flash_read_uchar(info, FLASH_OFFSET_ETOUT);
- info->erase_blk_tout = (tmp * (1 << flash_read_uchar(info, FLASH_OFFSET_EMAX_TOUT)));
- tmp = 1 << flash_read_uchar(info, FLASH_OFFSET_WBTOUT);
- info->buffer_write_tout = (tmp * (1 << flash_read_uchar(info, FLASH_OFFSET_WBMAX_TOUT)));
- tmp = 1 << flash_read_uchar(info, FLASH_OFFSET_WTOUT);
- info->write_tout = (tmp * (1 << flash_read_uchar(info, FLASH_OFFSET_WMAX_TOUT)))/ 1000;
- info->flash_id = FLASH_MAN_CFI;
- }
-
- flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
-#ifdef DEBUG_FLASH
- printf("portwidth=%d chipwidth=%d\n", info->portwidth, info->chipwidth); /* test-only */
-#endif
-#ifdef DEBUG_FLASH
- printf("found %d erase regions\n", num_erase_regions);
-#endif
-#ifdef DEBUG_FLASH
- printf("size=%08x sectors=%08x \n", info->size, info->sector_count);
-#endif
- return(info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-static int flash_write_cfiword (flash_info_t *info, ulong dest, cfiword_t cword)
-{
-
- cfiptr_t ctladdr;
- cfiptr_t cptr;
- int flag;
-
- ctladdr.cp = flash_make_addr(info, 0, 0);
- cptr.cp = (uchar *)dest;
-
-
- /* Check if Flash is (sufficiently) erased */
- switch(info->portwidth) {
- case FLASH_CFI_8BIT:
- flag = ((cptr.cp[0] & cword.c) == cword.c);
- break;
- case FLASH_CFI_16BIT:
- flag = ((cptr.wp[0] & cword.w) == cword.w);
- break;
- case FLASH_CFI_32BIT:
- flag = ((cptr.lp[0] & cword.l) == cword.l);
- break;
- default:
- return 2;
- }
- if(!flag)
- return 2;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- flash_write_cmd(info, 0, 0, FLASH_CMD_CLEAR_STATUS);
- flash_write_cmd(info, 0, 0, FLASH_CMD_WRITE);
-
- switch(info->portwidth) {
- case FLASH_CFI_8BIT:
- cptr.cp[0] = cword.c;
- break;
- case FLASH_CFI_16BIT:
- cptr.wp[0] = cword.w;
- break;
- case FLASH_CFI_32BIT:
- cptr.lp[0] = cword.l;
- break;
- }
-
- /* re-enable interrupts if necessary */
- if(flag)
- enable_interrupts();
-
- return flash_full_status_check(info, 0, info->write_tout, "write");
-}
-
-#ifdef CFG_FLASH_USE_BUFFER_WRITE
-
-/* loop through the sectors from the highest address
- * when the passed address is greater or equal to the sector address
- * we have a match
- */
-static int find_sector(flash_info_t *info, ulong addr)
-{
- int sector;
- for(sector = info->sector_count - 1; sector >= 0; sector--) {
- if(addr >= info->start[sector])
- break;
- }
- return sector;
-}
-
-static int flash_write_cfibuffer(flash_info_t * info, ulong dest, uchar * cp, int len)
-{
-
- int sector;
- int cnt;
- int retcode;
- volatile cfiptr_t src;
- volatile cfiptr_t dst;
-
- src.cp = cp;
- dst.cp = (uchar *)dest;
- sector = find_sector(info, dest);
- flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
- flash_write_cmd(info, sector, 0, FLASH_CMD_WRITE_TO_BUFFER);
- if((retcode = flash_status_check(info, sector, info->buffer_write_tout,
- "write to buffer")) == ERR_OK) {
- switch(info->portwidth) {
- case FLASH_CFI_8BIT:
- cnt = len;
- break;
- case FLASH_CFI_16BIT:
- cnt = len >> 1;
- break;
- case FLASH_CFI_32BIT:
- cnt = len >> 2;
- break;
- default:
- return ERR_INVAL;
- break;
- }
- flash_write_cmd(info, sector, 0, (uchar)cnt-1);
- while(cnt-- > 0) {
- switch(info->portwidth) {
- case FLASH_CFI_8BIT:
- *dst.cp++ = *src.cp++;
- break;
- case FLASH_CFI_16BIT:
- *dst.wp++ = *src.wp++;
- break;
- case FLASH_CFI_32BIT:
- *dst.lp++ = *src.lp++;
- break;
- default:
- return ERR_INVAL;
- break;
- }
- }
- flash_write_cmd(info, sector, 0, FLASH_CMD_WRITE_BUFFER_CONFIRM);
- retcode = flash_full_status_check(info, sector, info->buffer_write_tout,
- "buffer write");
- }
- flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
- return retcode;
-}
-#endif /* CFG_USE_FLASH_BUFFER_WRITE */
diff --git a/board/esd/cpci750/u-boot.lds b/board/esd/cpci750/u-boot.lds
deleted file mode 100644
index d89eb6cff2..0000000000
--- a/board/esd/cpci750/u-boot.lds
+++ /dev/null
@@ -1,138 +0,0 @@
-/*
- * (C) Copyright 2001
- * Josh Huber <huber@mclx.com>, Mission Critical Linux, Inc.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * u-boot.lds - linker script for U-Boot on the Galileo Eval Board.
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/74xx_7xx/start.o (.text)
-
-/* store the environment in a seperate sector in the boot flash */
-/* . = env_offset; */
-/* common/environment.o(.text) */
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/esd/cpciiser4/Makefile b/board/esd/cpciiser4/Makefile
deleted file mode 100644
index a60495a59a..0000000000
--- a/board/esd/cpciiser4/Makefile
+++ /dev/null
@@ -1,46 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o ../common/misc.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/esd/cpciiser4/config.mk b/board/esd/cpciiser4/config.mk
deleted file mode 100644
index 58574cb042..0000000000
--- a/board/esd/cpciiser4/config.mk
+++ /dev/null
@@ -1,30 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# esd CPCIISER4 boards
-#
-
-#TEXT_BASE = 0xFFFE0000
-#TEXT_BASE = 0xFFFD0000
-TEXT_BASE = 0xFFFC0000
diff --git a/board/esd/cpciiser4/cpciiser4.c b/board/esd/cpciiser4/cpciiser4.c
deleted file mode 100644
index 7bf7bb5a5e..0000000000
--- a/board/esd/cpciiser4/cpciiser4.c
+++ /dev/null
@@ -1,204 +0,0 @@
-/*
- * (C) Copyright 2000
- * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include "cpciiser4.h"
-#include <asm/processor.h>
-#include <command.h>
-
-/*cmd_boot.c*/
-
-extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
-extern void lxt971_no_sleep(void);
-
-
-/* ------------------------------------------------------------------------- */
-
-#if 0
-#define FPGA_DEBUG
-#endif
-
-#if 0
-#define FPGA_DEBUG2
-#endif
-
-/* fpga configuration data - generated by bin2cc */
-const unsigned char fpgadata[] = {
-#include "fpgadata.c"
-};
-
-/*
- * include common fpga code (for esd boards)
- */
-#include "../common/fpga.c"
-
-
-int board_early_init_f (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- int index, len, i;
- volatile unsigned char dummy;
- int status;
-
-#ifdef FPGA_DEBUG
- /* set up serial port with default baudrate */
- (void) get_clocks ();
- gd->baudrate = CONFIG_BAUDRATE;
- serial_init ();
- console_init_f ();
-#endif
-
- /*
- * Boot onboard FPGA
- */
- status = fpga_boot ((unsigned char *) fpgadata, sizeof (fpgadata));
- if (status != 0) {
- /* booting FPGA failed */
-#ifndef FPGA_DEBUG
- /* set up serial port with default baudrate */
- (void) get_clocks ();
- gd->baudrate = CONFIG_BAUDRATE;
- serial_init ();
- console_init_f ();
-#endif
- printf ("\nFPGA: Booting failed ");
- switch (status) {
- case ERROR_FPGA_PRG_INIT_LOW:
- printf ("(Timeout: INIT not low after asserting PROGRAM*)\n ");
- break;
- case ERROR_FPGA_PRG_INIT_HIGH:
- printf ("(Timeout: INIT not high after deasserting PROGRAM*)\n ");
- break;
- case ERROR_FPGA_PRG_DONE:
- printf ("(Timeout: DONE not high after programming FPGA)\n ");
- break;
- }
-
- /* display infos on fpgaimage */
- index = 15;
- for (i = 0; i < 4; i++) {
- len = fpgadata[index];
- printf ("FPGA: %s\n", &(fpgadata[index + 1]));
- index += len + 3;
- }
- putc ('\n');
- /* delayed reboot */
- for (i = 20; i > 0; i--) {
- printf ("Rebooting in %2d seconds \r", i);
- for (index = 0; index < 1000; index++)
- udelay (1000);
- }
- putc ('\n');
- do_reset (NULL, 0, 0, NULL);
- }
-
- /*
- * Init FPGA via RESET (read access on CS3)
- */
- dummy = *(unsigned char *) 0xf0200000;
-
- /*
- * IRQ 0-15 405GP internally generated; active high; level sensitive
- * IRQ 16 405GP internally generated; active low; level sensitive
- * IRQ 17-24 RESERVED
- * IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive
- * IRQ 26 (EXT IRQ 1) CAN1; active low; level sensitive
- * IRQ 27 (EXT IRQ 2) PCI SLOT 0; active low; level sensitive
- * IRQ 28 (EXT IRQ 3) PCI SLOT 1; active low; level sensitive
- * IRQ 29 (EXT IRQ 4) PCI SLOT 2; active low; level sensitive
- * IRQ 30 (EXT IRQ 5) PCI SLOT 3; active low; level sensitive
- * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
- */
- mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
- mtdcr (uicer, 0x00000000); /* disable all ints */
- mtdcr (uiccr, 0x00000000); /* set all to be non-critical */
- /* mtdcr(uicpr, 0xFFFFFF81); / set int polarities */
- mtdcr (uicpr, 0xFFFFFF80); /* set int polarities */
- mtdcr (uictr, 0x10000000); /* set int trigger levels */
- mtdcr (uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority */
- mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
-
- return 0;
-}
-
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Check Board Identity:
- */
-
-int checkboard (void)
-{
- int index;
- int len;
- char str[64];
- int i = getenv_r ("serial#", str, sizeof (str));
-
- puts ("Board: ");
-
- if (i == -1) {
- puts ("### No HW ID - assuming AR405");
- } else {
- puts(str);
- }
-
- puts ("\nFPGA: ");
-
- /* display infos on fpgaimage */
- index = 15;
- for (i = 0; i < 4; i++) {
- len = fpgadata[index];
- printf ("%s ", &(fpgadata[index + 1]));
- index += len + 3;
- }
-
- putc ('\n');
-
- /*
- * Disable sleep mode in LXT971
- */
- lxt971_no_sleep();
-
- return 0;
-}
-
-/* ------------------------------------------------------------------------- */
-
-long int initdram (int board_type)
-{
- return (16 * 1024 * 1024);
-}
-
-/* ------------------------------------------------------------------------- */
-
-int testdram (void)
-{
- /* TODO: XXX XXX XXX */
- printf ("test: 16 MB - ok\n");
-
- return (0);
-}
-
-/* ------------------------------------------------------------------------- */
diff --git a/board/esd/cpciiser4/cpciiser4.h b/board/esd/cpciiser4/cpciiser4.h
deleted file mode 100644
index 5fc313a258..0000000000
--- a/board/esd/cpciiser4/cpciiser4.h
+++ /dev/null
@@ -1,44 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/****************************************************************************
- * FLASH Memory Map as used by TQ Monitor:
- *
- * Start Address Length
- * +-----------------------+ 0x4000_0000 Start of Flash -----------------
- * | MON8xx code | 0x4000_0100 Reset Vector
- * +-----------------------+ 0x400?_????
- * | (unused) |
- * +-----------------------+ 0x4001_FF00
- * | Ethernet Addresses | 0x78
- * +-----------------------+ 0x4001_FF78
- * | (Reserved for MON8xx) | 0x44
- * +-----------------------+ 0x4001_FFBC
- * | Lock Address | 0x04
- * +-----------------------+ 0x4001_FFC0 ^
- * | Hardware Information | 0x40 | MON8xx
- * +=======================+ 0x4002_0000 (sector border) -----------------
- * | Autostart Header | | Applications
- * | ... | v
- *
- *****************************************************************************/
diff --git a/board/esd/cpciiser4/flash.c b/board/esd/cpciiser4/flash.c
deleted file mode 100644
index de847f9bea..0000000000
--- a/board/esd/cpciiser4/flash.c
+++ /dev/null
@@ -1,84 +0,0 @@
-/*
- * (C) Copyright 2001
- * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <ppc4xx.h>
-#include <asm/processor.h>
-
-/*
- * include common flash code (for esd boards)
- */
-#include "../common/flash.c"
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (vu_long *addr, flash_info_t *info);
-static void flash_get_offsets (ulong base, flash_info_t *info);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- unsigned long size_b0;
- int i;
- uint pbcr;
- unsigned long base_b0;
-
- /* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* Static FLASH Bank configuration here - FIXME XXX */
-
- size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size_b0, size_b0<<20);
- }
-
- /* Setup offsets */
- flash_get_offsets (-size_b0, &flash_info[0]);
-
- /* Re-do sizing to get full correct info */
- mtdcr(ebccfga, pb0cr);
- pbcr = mfdcr(ebccfgd);
- mtdcr(ebccfga, pb0cr);
- base_b0 = -size_b0;
- pbcr = (pbcr & 0x0001ffff) | base_b0 | (((size_b0/1024/1024)-1)<<17);
- mtdcr(ebccfgd, pbcr);
- /* printf("pb1cr = %x\n", pbcr); */
-
- /* Monitor protection ON by default */
- (void)flash_protect(FLAG_PROTECT_SET,
- -monitor_flash_len,
- 0xffffffff,
- &flash_info[0]);
-
- flash_info[0].size = size_b0;
-
- return (size_b0);
-}
diff --git a/board/esd/cpciiser4/fpgadata.c b/board/esd/cpciiser4/fpgadata.c
deleted file mode 100644
index 5e020979e3..0000000000
--- a/board/esd/cpciiser4/fpgadata.c
+++ /dev/null
@@ -1,2068 +0,0 @@
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- 0x02,0x02,0xe5,0x01,0x02,0x02,0xe5,0xe6,0x01,0x03,0x02,0x96,0x02,0x02,0x40,0x25,
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- 0x9e,0xe5,0xe7,0x3e,0x01,0x27,0x02,0x06,0x02,0x06,0x02,0x06,0x02,0x01,0x01,0xe5,
- 0x9f,0xe6,0x66,0x09,0x05,0x03,0x05,0x03,0x05,0x09,0x98,0xe8,0x76,0xe5,0x07,0xe5,
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- 0x09,0x09,0x04,0x01,0xe5,0xe5,0x05,0xe5,0xe5,0x03,0x01,0xe5,0xe5,0x05,0x02,0x0b,
- 0x09,0x09,0x09,0x09,0x09,0x09,0x09,0x09,0x09,0x09,0x09,0x09,0x09,0x0d,0xe5,0x01,
- 0xe5,0x01,0x6d,0xe5,0xe5,0x04,0xe6,0xe5,0x05,0xe5,0xe5,0x04,0xe5,0x9b,0x02,0x01,
- 0x01,0x6d,0x06,0x04,0x04,0x02,0x06,0x04,0xa0,0x03,0x01,0x74,0x01,0x07,0x01,0x07,
- 0x09,0x97,0x01,0x02,0xe5,0x27,0x42,0x09,0x09,0x09,0x09,0x9a,0x03,0x71,0x05,0x03,
- 0x09,0x06,0xa1,0xe6,0xe5,0x14,0xe5,0x07,0xe5,0x07,0xe5,0x07,0xe5,0x07,0xe5,0x07,
- 0xe5,0x07,0xe5,0x07,0xe5,0x07,0xe5,0x07,0xe5,0x01,0x05,0xe5,0x01,0x05,0xe5,0x01,
- 0x05,0xe5,0x07,0xe5,0x09,0xe5,0x07,0xe5,0x07,0xe5,0x07,0xe5,0x07,0xe5,0x07,0xe5,
- 0x07,0xe5,0x07,0xe5,0x07,0xe5,0x07,0xe5,0x07,0xe5,0x07,0xe5,0x07,0xe5,0x07,0xe5,
- 0x06,0xe5,0x01,0x71,0x09,0x09,0x09,0x9e,0xe8,0x72,0x09,0x09,0x09,0x9c,0x03,0x91,
- 0x08,0x93,0x02,0xe5,0x2d,0x3d,0x09,0x09,0x09,0x04,0x04,0x9a,0xe5,0xe5,0x66,0x01,
- 0xe5,0x05,0x09,0x01,0xe5,0x05,0x09,0x12,0x8b,0xe5,0xe6,0xe5,0x0e,0x01,0x07,0x01,
- 0x07,0x01,0x07,0x01,0x07,0x01,0x07,0x01,0x07,0x01,0x06,0xe5,0xe5,0x06,0x01,0x04,
- 0x02,0x01,0x04,0x02,0xe8,0x01,0x02,0x01,0xe5,0x02,0x02,0x01,0x02,0xe5,0x02,0x01,
- 0x04,0x04,0x01,0xe5,0x05,0x01,0xe5,0x05,0x01,0xe5,0x05,0x01,0x07,0x01,0x07,0x01,
- 0x07,0x01,0x07,0x01,0x07,0x01,0x07,0x01,0x07,0x01,0x07,0x01,0x07,0x01,0x07,0x01,
- 0x08,0x01,0xe6,0xe5,0x3c,0x35,0x01,0x09,0x0e,0x9f,0x01,0xe7,0x36,0xe3,0x12,0xe5,
- 0xe7,0x46,0x13,0x17,0x25,0x8a,0x0a,0xe5,0xe5,0x1c,0x48,0x0c,0x09,0x07,0xe5,0x07,
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- 0xe5,0x10,0x16,0xe5,0x05,0x6d,0x07,0xe5,0x01,0x63,0x21,0x13,0x15,0x7e,0x02,0xe5,
- 0x61,0x13,0x01,0x0c,0x13,0x11,0x05,0x7d,0xe5,0xe5,0x91,0x06,0x94,0xe5,0x01,0x8a,
- 0x0d,0xe5,0x93,0x02,0xe5,0x61,0x24,0x12,0x06,0x05,0x27,0x09,0x57,0xe6,0x37,0x32,
- 0x1b,0x1d,0xe5,0x24,0x01,0x08,0x54,0xe5,0x01,0xe5,0x3a,0x49,0x21,0x25,0x60,0xe5,
- 0xe6,0x02,0x09,0xe7,0x07,0xe5,0x07,0xe5,0x07,0xe5,0x07,0xe5,0x07,0xe5,0x07,0xe5,
- 0x03,0xe5,0x01,0xe5,0x07,0xe5,0x05,0xe7,0x07,0xe5,0x07,0xe5,0x07,0xe5,0x05,0xe7,
- 0x09,0xe5,0x07,0xe5,0x07,0xe5,0x07,0xe5,0x07,0xe5,0x07,0xe5,0x07,0xe5,0x07,0xe5,
- 0x07,0xe5,0x07,0xe5,0x07,0xe5,0x07,0xe5,0x07,0xe5,0x07,0xe5,0x01,0x09,0xe5,0x01,
- 0xe5,0x0d,0x01,0x09,0x09,0x09,0x09,0x02,0x06,0x02,0x06,0x07,0x01,0x09,0x07,0x01,
- 0x05,0x03,0x09,0x09,0x07,0x01,0x0b,0x09,0x09,0x09,0x09,0x09,0x09,0x09,0x09,0x09,
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- 0xe5,0x05,0xe5,0xe5,0x05,0xe5,0xe5,0x05,0xe5,0xe5,0x05,0xe5,0xe5,0x05,0xe5,0xe5,
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- 0x09,0x13,0x13,0x05,0x03,0x09,0x09,0x09,0x09,0x08,0x02,0x09,0x09,0x09,0x09,0x09,
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- 0x09,0x13,0x42,0xe5,0x8e,0x04,0xe7,0x3f,0x13,0x44,0x90,0x03,0xe6,0xe5,0x8f,0x9d,
- 0x03,0x13,0x09,0x09,0x09,0x1d,0x09,0x0c,0x06,0x09,0x09,0x36,0x06,0x09,0x09,0x09,
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- 0x97,0x06,0x02,0xe5,0x98,0x8e,0x05,0x03,0xe3,0x50,0x14,0x09,0x09,0x09,0x09,0x09,
- 0x09,0x09,0x09,0x09,0x09,0x09,0x09,0x02,0xe5,0x04,0xe6,0x01,0xe5,0x04,0x09,0xe8,
- 0x04,0x09,0x09,0x09,0x09,0x09,0x03,0x05,0x09,0x09,0x09,0x09,0x09,0x09,0x03,0x0f,
- 0x09,0x09,0x09,0x09,0x09,0x09,0x09,0x09,0x03,0x05,0x09,0x09,0x08,0xe5,0x06,0xe6,
- 0x05,0xe5,0xe7,0x07,0xe5,0x05,0xe7,0x08,0x09,0x08,0xe5,0x07,0xe5,0x08,0x07,0xe6,
- 0x08,0x09,0x09,0x09,0x09,0x0f,0x01,0xe5,0x38,0x09,0x13,0x0a,0x36,0x95,0x02,0x0d,
- 0x09,0x09,0x09,0x09,0x04,0x04,0x03,0xe5,0x03,0x09,0x03,0x05,0x04,0x04,0x09,0x09,
- 0x11,0x09,0x0b,0x09,0x09,0x01,0x09,0x1d,0x0b,0x07,0x09,0x09,0x09,0x09,0x0f,0x01,
- 0xe7,0x0a,0x02,0x07,0x01,0x07,0x01,0x07,0x01,0x07,0x03,0x02,0x02,0x03,0x01,0xe5,
- 0x01,0x01,0x07,0x03,0x05,0x01,0x04,0x02,0x01,0x07,0x01,0x07,0x01,0x07,0x02,0x04,
- 0x15,0x04,0x0e,0x03,0x07,0x01,0x07,0x02,0x06,0x02,0x06,0x01,0x07,0x09,0x01,0x07,
- 0x01,0x07,0x01,0x07,0x01,0x07,0x01,0x07,0x05,0xe6,0xe5,0xe5,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
diff --git a/board/esd/cpciiser4/u-boot.lds b/board/esd/cpciiser4/u-boot.lds
deleted file mode 100644
index f7a20d1da2..0000000000
--- a/board/esd/cpciiser4/u-boot.lds
+++ /dev/null
@@ -1,150 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- .resetvec 0xFFFFFFFC :
- {
- *(.resetvec)
- } = 0xffff
-
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/ppc4xx/start.o (.text)
- cpu/ppc4xx/traps.o (.text)
- cpu/ppc4xx/interrupts.o (.text)
- cpu/ppc4xx/serial.o (.text)
- cpu/ppc4xx/cpu_init.o (.text)
- cpu/ppc4xx/speed.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/extable.o (.text)
- lib_generic/zlib.o (.text)
-
-/* . = env_offset;*/
-/* common/environment.o(.text)*/
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/esd/dasa_sim/Makefile b/board/esd/dasa_sim/Makefile
deleted file mode 100644
index e3b1c872b0..0000000000
--- a/board/esd/dasa_sim/Makefile
+++ /dev/null
@@ -1,47 +0,0 @@
-
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o cmd_dasa_sim.o eeprom.o ../common/pci.o
-
-$(LIB): $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/esd/dasa_sim/cmd_dasa_sim.c b/board/esd/dasa_sim/cmd_dasa_sim.c
deleted file mode 100644
index 89a4aaf80a..0000000000
--- a/board/esd/dasa_sim/cmd_dasa_sim.c
+++ /dev/null
@@ -1,235 +0,0 @@
-/*
- * (C) Copyright 2001
- * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- */
-
-#include <common.h>
-#include <command.h>
-#include <pci.h>
-
-#define OK 0
-#define ERROR (-1)
-
-#define TRUE 1
-#define FALSE 0
-
-
-extern u_long pci9054_iobase;
-
-
-/***************************************************************************
- *
- * Routines for PLX PCI9054 eeprom access
- *
- */
-
-static unsigned int PciEepromReadLongVPD (int offs)
-{
- unsigned int value;
- unsigned int ret;
- int count;
-
- pci_write_config_dword (CFG_PCI9054_DEV_FN, 0x4c,
- (offs << 16) | 0x0003);
- count = 0;
-
- for (;;) {
- udelay (10 * 1000);
- pci_read_config_dword (CFG_PCI9054_DEV_FN, 0x4c, &ret);
- if ((ret & 0x80000000) != 0) {
- break;
- } else {
- count++;
- if (count > 10) {
- printf ("\nTimeout: ret=%08x - Please try again!\n", ret);
- break;
- }
- }
- }
-
- pci_read_config_dword (CFG_PCI9054_DEV_FN, 0x50, &value);
-
- return value;
-}
-
-
-static int PciEepromWriteLongVPD (int offs, unsigned int value)
-{
- unsigned int ret;
- int count;
-
- pci_write_config_dword (CFG_PCI9054_DEV_FN, 0x50, value);
- pci_write_config_dword (CFG_PCI9054_DEV_FN, 0x4c,
- (offs << 16) | 0x80000003);
- count = 0;
-
- for (;;) {
- udelay (10 * 1000);
- pci_read_config_dword (CFG_PCI9054_DEV_FN, 0x4c, &ret);
- if ((ret & 0x80000000) == 0) {
- break;
- } else {
- count++;
- if (count > 10) {
- printf ("\nTimeout: ret=%08x - Please try again!\n", ret);
- break;
- }
- }
- }
-
- return TRUE;
-}
-
-
-static void showPci9054 (void)
-{
- int val;
- int l, i;
-
- /* read 9054-values */
- for (l = 0; l < 6; l++) {
- printf ("%02x: ", l * 0x10);
- for (i = 0; i < 4; i++) {
- pci_read_config_dword (CFG_PCI9054_DEV_FN,
- l * 16 + i * 4,
- (unsigned int *)&val);
- printf ("%08x ", val);
- }
- printf ("\n");
- }
- printf ("\n");
-
- for (l = 0; l < 7; l++) {
- printf ("%02x: ", l * 0x10);
- for (i = 0; i < 4; i++)
- printf ("%08x ",
- PciEepromReadLongVPD ((i + l * 4) * 4));
- printf ("\n");
- }
- printf ("\n");
-}
-
-
-static void updatePci9054 (void)
-{
- int val;
-
- /*
- * Set EEPROM write-protect register to 0
- */
- out32 (pci9054_iobase + 0x0c,
- in32 (pci9054_iobase + 0x0c) & 0xffff00ff);
-
- /* Long Serial EEPROM Load Registers... */
- val = PciEepromWriteLongVPD (0x00, 0x905410b5);
- val = PciEepromWriteLongVPD (0x04, 0x09800001); /* other input controller */
- val = PciEepromWriteLongVPD (0x08, 0x28140100);
-
- val = PciEepromWriteLongVPD (0x0c, 0x00000000); /* MBOX0... */
- val = PciEepromWriteLongVPD (0x10, 0x00000000);
-
- /* las0: fpga access (0x0000.0000 ... 0x0003.ffff) */
- val = PciEepromWriteLongVPD (0x14, 0xfffc0000); /* LAS0RR... */
- val = PciEepromWriteLongVPD (0x18, 0x00000001); /* LAS0BA */
-
- val = PciEepromWriteLongVPD (0x1c, 0x00200000); /* MARBR... */
- val = PciEepromWriteLongVPD (0x20, 0x00300500); /* LMISC/BIGEND */
-
- val = PciEepromWriteLongVPD (0x24, 0x00000000); /* EROMRR... */
- val = PciEepromWriteLongVPD (0x28, 0x00000000); /* EROMBA */
-
- val = PciEepromWriteLongVPD (0x2c, 0x43030000); /* LBRD0... */
-
- val = PciEepromWriteLongVPD (0x30, 0x00000000); /* DMRR... */
- val = PciEepromWriteLongVPD (0x34, 0x00000000);
- val = PciEepromWriteLongVPD (0x38, 0x00000000);
-
- val = PciEepromWriteLongVPD (0x3c, 0x00000000); /* DMPBAM... */
- val = PciEepromWriteLongVPD (0x40, 0x00000000);
-
- /* Extra Long Serial EEPROM Load Registers... */
- val = PciEepromWriteLongVPD (0x44, 0x010212fe); /* PCISID... */
-
- /* las1: 505-sram access (0x0004.0000 ... 0x001f.ffff) */
- /* Offset to LAS1: Group 1: 0x00040000 */
- /* Group 2: 0x00080000 */
- /* Group 3: 0x000c0000 */
- val = PciEepromWriteLongVPD (0x48, 0xffe00000); /* LAS1RR */
- val = PciEepromWriteLongVPD (0x4c, 0x00040001); /* LAS1BA */
- val = PciEepromWriteLongVPD (0x50, 0x00000208); /* LBRD1 */ /* so wars bisher */
-
- val = PciEepromWriteLongVPD (0x54, 0x00004c06); /* HotSwap... */
-
- printf ("Finished writing defaults into PLX PCI9054 EEPROM!\n");
-}
-
-
-static void clearPci9054 (void)
-{
- int val;
-
- /*
- * Set EEPROM write-protect register to 0
- */
- out32 (pci9054_iobase + 0x0c,
- in32 (pci9054_iobase + 0x0c) & 0xffff00ff);
-
- /* Long Serial EEPROM Load Registers... */
- val = PciEepromWriteLongVPD (0x00, 0xffffffff);
- val = PciEepromWriteLongVPD (0x04, 0xffffffff); /* other input controller */
-
- printf ("Finished clearing PLX PCI9054 EEPROM!\n");
-}
-
-
-/* ------------------------------------------------------------------------- */
-int do_pci9054 (cmd_tbl_t * cmdtp, int flag, int argc,
- char *argv[])
-{
- if (strcmp (argv[1], "info") == 0) {
- showPci9054 ();
- return 0;
- }
-
- if (strcmp (argv[1], "update") == 0) {
- updatePci9054 ();
- return 0;
- }
-
- if (strcmp (argv[1], "clear") == 0) {
- clearPci9054 ();
- return 0;
- }
-
- printf ("Usage:\n%s\n", cmdtp->usage);
- return 1;
-
-}
-
-U_BOOT_CMD(
- pci9054, 3, 1, do_pci9054,
- "pci9054 - PLX PCI9054 EEPROM access\n",
- "pci9054 info - print EEPROM values\n"
- "pci9054 update - updates EEPROM with default values\n"
-);
-
-/* ------------------------------------------------------------------------- */
diff --git a/board/esd/dasa_sim/config.mk b/board/esd/dasa_sim/config.mk
deleted file mode 100644
index 747f29f77e..0000000000
--- a/board/esd/dasa_sim/config.mk
+++ /dev/null
@@ -1,33 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# esd ADCIOP boards
-#
-
-# FLASH:
-#TEXT_BASE = 0xFFFE0000
-TEXT_BASE = 0xFFFD0000
-
-# SDRAM:
-#TEXT_BASE = 0x00FE0000
diff --git a/board/esd/dasa_sim/dasa_sim.c b/board/esd/dasa_sim/dasa_sim.c
deleted file mode 100644
index 2f8ab1a478..0000000000
--- a/board/esd/dasa_sim/dasa_sim.c
+++ /dev/null
@@ -1,224 +0,0 @@
-/*
- * (C) Copyright 2001
- * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include "dasa_sim.h"
-
-/* ------------------------------------------------------------------------- */
-
-#undef FPGA_DEBUG
-
-#define _NOT_USED_ 0xFFFFFFFF
-
-/* ------------------------------------------------------------------------- */
-
-/* fpga configuration data - generated by bit2inc */
-static unsigned char fpgadata[] = {
-#include "fpgadata.c"
-};
-
-#define FPGA_PRG_SLEEP 32 /* fpga program sleep-time */
-#define LOAD_LONG(a) a
-
-
-/******************************************************************************
- *
- * sysFpgaBoot - Load fpga-image into fpga
- *
- */
-static int fpgaBoot (void)
-{
- int i, j, index, len;
- unsigned char b;
- int imageSize;
-
- imageSize = sizeof (fpgadata);
-
- /* display infos on fpgaimage */
- index = 15;
- for (i = 0; i < 4; i++) {
- len = fpgadata[index];
- index += len + 3;
- }
-
- /* search for preamble 0xFF2X */
- for (index = 0; index < imageSize - 1; index++) {
- if ((fpgadata[index] == 0xff)
- && ((fpgadata[index + 1] & 0xf0) == 0x20))
- break;
- }
-
- /* enable cs1 instead of user0... */
- *(unsigned long *) 0x50000084 &= ~0x00000002;
-
-#ifdef FPGA_DEBUG
- printf ("%s\n",
- ((in32 (0x50000084) & 0x00010000) == 0) ? "NOT DONE" : "DONE");
-#endif
-
- /* init fpga by asserting and deasserting PROGRAM* (USER2)... */
- *(unsigned long *) 0x50000084 &= ~0x00000400;
- udelay (FPGA_PRG_SLEEP * 1000);
-
- *(unsigned long *) 0x50000084 |= 0x00000400;
- udelay (FPGA_PRG_SLEEP * 1000);
-
-#ifdef FPGA_DEBUG
- printf ("%s\n",
- ((in32 (0x50000084) & 0x00010000) == 0) ? "NOT DONE" : "DONE");
-#endif
-
- /* cs1: disable burst, disable ready */
- *(unsigned long *) 0x50000114 &= ~0x00000300;
-
- /* cs1: set write timing */
- *(unsigned long *) 0x50000118 |= 0x00010900;
-
- /* write configuration-data into fpga... */
- for (i = index; i < imageSize; i++) {
- b = fpgadata[i];
- for (j = 0; j < 8; j++) {
- *(unsigned long *) 0x30000000 =
- ((b & 0x80) == 0x80)
- ? LOAD_LONG (0x03030101)
- : LOAD_LONG (0x02020000);
- b <<= 1;
- }
- }
-
-#ifdef FPGA_DEBUG
- printf ("%s\n",
- ((in32 (0x50000084) & 0x00010000) == 0) ? "NOT DONE" : "DONE");
-#endif
-
- /* set cs1 to 32 bit data-width, disable burst, enable ready */
- *(unsigned long *) 0x50000114 |= 0x00000202;
- *(unsigned long *) 0x50000114 &= ~0x00000100;
-
- /* cs1: set iop access to little endian */
- *(unsigned long *) 0x50000114 &= ~0x00000010;
-
- /* cs1: set read and write timing */
- *(unsigned long *) 0x50000118 = 0x00010000;
- *(unsigned long *) 0x5000011c = 0x00010001;
-
-#ifdef FPGA_DEBUG
- printf ("%s\n",
- ((in32 (0x50000084) & 0x00010000) == 0) ? "NOT DONE" : "DONE");
-#endif
-
- /* wait for 30 ms... */
- udelay (30 * 1000);
- /* check if fpga's DONE signal - correctly booted ? */
- if ((*(unsigned long *) 0x50000084 & 0x00010000) == 0)
- return -1;
-
- return 0;
-}
-
-
-int board_early_init_f (void)
-{
- /*
- * Init pci regs
- */
- *(unsigned long *) 0x50000304 = 0x02900007; /* enable mem/io/master bits */
- *(unsigned long *) 0x500001b4 = 0x00000000; /* disable pci interrupt output enable */
- *(unsigned long *) 0x50000354 = 0x00c05800; /* disable emun interrupt output enable */
- *(unsigned long *) 0x50000344 = 0x00000000; /* disable pme interrupt output enable */
- *(unsigned long *) 0x50000310 = 0x00000000; /* pcibar0 */
- *(unsigned long *) 0x50000314 = 0x00000000; /* pcibar1 */
- *(unsigned long *) 0x50000318 = 0x00000000; /* pcibar2 */
-
- return 0;
-}
-
-
-/*
- * Check Board Identity:
- */
-
-int checkboard (void)
-{
- int index;
- int len;
- char str[64];
- int i = getenv_r ("serial#", str, sizeof (str));
- int fpga;
- unsigned short val;
-
- puts ("Board: ");
-
- /*
- * Boot onboard FPGA
- */
- fpga = fpgaBoot ();
-
- if (!i || strncmp (str, "DASA_SIM", 8)) {
- puts ("### No HW ID - assuming DASA_SIM");
- }
-
- puts (str);
-
- if (fpga == 0) {
- val = *(unsigned short *) 0x30000202;
- printf (" (Id=%d Version=%d Revision=%d)",
- (val & 0x07f8) >> 3, val & 0x0001, (val & 0x0006) >> 1);
-
- puts ("\nFPGA: ");
-
- /* display infos on fpgaimage */
- index = 15;
- for (i = 0; i < 4; i++) {
- len = fpgadata[index];
- printf ("%s ", &(fpgadata[index + 1]));
- index += len + 3;
- }
- } else {
- puts ("\nFPGA: Booting failed!");
- }
-
- putc ('\n');
-
- return 0;
-}
-
-
-/* ------------------------------------------------------------------------- */
-
-long int initdram (int board_type)
-{
- return (16 * 1024 * 1024);
-}
-
-/* ------------------------------------------------------------------------- */
-
-int testdram (void)
-{
- /* TODO: XXX XXX XXX */
- printf ("test: 16 MB - ok\n");
-
- return (0);
-}
-
-/* ------------------------------------------------------------------------- */
diff --git a/board/esd/dasa_sim/dasa_sim.h b/board/esd/dasa_sim/dasa_sim.h
deleted file mode 100644
index 5fc313a258..0000000000
--- a/board/esd/dasa_sim/dasa_sim.h
+++ /dev/null
@@ -1,44 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/****************************************************************************
- * FLASH Memory Map as used by TQ Monitor:
- *
- * Start Address Length
- * +-----------------------+ 0x4000_0000 Start of Flash -----------------
- * | MON8xx code | 0x4000_0100 Reset Vector
- * +-----------------------+ 0x400?_????
- * | (unused) |
- * +-----------------------+ 0x4001_FF00
- * | Ethernet Addresses | 0x78
- * +-----------------------+ 0x4001_FF78
- * | (Reserved for MON8xx) | 0x44
- * +-----------------------+ 0x4001_FFBC
- * | Lock Address | 0x04
- * +-----------------------+ 0x4001_FFC0 ^
- * | Hardware Information | 0x40 | MON8xx
- * +=======================+ 0x4002_0000 (sector border) -----------------
- * | Autostart Header | | Applications
- * | ... | v
- *
- *****************************************************************************/
diff --git a/board/esd/dasa_sim/eeprom.c b/board/esd/dasa_sim/eeprom.c
deleted file mode 100644
index 1b4c7b34f7..0000000000
--- a/board/esd/dasa_sim/eeprom.c
+++ /dev/null
@@ -1,181 +0,0 @@
-/*
- * (C) Copyright 2001
- * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- */
-
-#include <common.h>
-#include <command.h>
-
-
-#define EEPROM_CAP 0x50000358
-#define EEPROM_DATA 0x5000035c
-
-
-unsigned int eepromReadLong(int offs)
-{
- unsigned int value;
- volatile unsigned short ret;
- int count;
-
- *(unsigned short *)EEPROM_CAP = offs;
-
- count = 0;
-
- for (;;)
- {
- count++;
- ret = *(unsigned short *)EEPROM_CAP;
-
- if ((ret & 0x8000) != 0)
- break;
- }
-
- value = *(unsigned long *)EEPROM_DATA;
-
- return value;
-}
-
-
-unsigned char eepromReadByte(int offs)
-{
- unsigned int valueLong;
- unsigned char *ptr;
-
- valueLong = eepromReadLong(offs & ~3);
- ptr = (unsigned char *)&valueLong;
-
- return ptr[offs & 3];
-}
-
-
-void eepromWriteLong(int offs, unsigned int value)
-{
- volatile unsigned short ret;
- int count;
-
- count = 0;
-
- *(unsigned long *)EEPROM_DATA = value;
- *(unsigned short *)EEPROM_CAP = 0x8000 + offs;
-
- for (;;)
- {
- count++;
- ret = *(unsigned short *)EEPROM_CAP;
-
- if ((ret & 0x8000) == 0)
- break;
- }
-}
-
-
-void eepromWriteByte(int offs, unsigned char valueByte)
-{
- unsigned int valueLong;
- unsigned char *ptr;
-
- valueLong = eepromReadLong(offs & ~3);
- ptr = (unsigned char *)&valueLong;
-
- ptr[offs & 3] = valueByte;
-
- eepromWriteLong(offs & ~3, valueLong);
-}
-
-
-void i2c_read (uchar *addr, int alen, uchar *buffer, int len)
-{
- int i;
- int len2, ptr;
-
- /* printf("\naddr=%x alen=%x buffer=%x len=%x", addr[0], addr[1], *(short *)addr, alen, buffer, len); /###* test-only */
-
- ptr = *(short *)addr;
-
- /*
- * Read till lword boundary
- */
- len2 = 4 - (*(short *)addr & 0x0003);
- for (i=0; i<len2; i++)
- {
- *buffer++ = eepromReadByte(ptr++);
- }
-
- /*
- * Read all lwords
- */
- len2 = (len - len2) >> 2;
- for (i=0; i<len2; i++)
- {
- *(unsigned int *)buffer = eepromReadLong(ptr);
- buffer += 4;
- ptr += 4;
- }
-
- /*
- * Read last bytes
- */
- len2 = (*(short *)addr + len) & 0x0003;
- for (i=0; i<len2; i++)
- {
- *buffer++ = eepromReadByte(ptr++);
- }
-}
-
-void i2c_write (uchar *addr, int alen, uchar *buffer, int len)
-{
- int i;
- int len2, ptr;
-
- /* printf("\naddr=%x alen=%x buffer=%x len=%x", addr[0], addr[1], *(short *)addr, alen, buffer, len); /###* test-only */
-
- ptr = *(short *)addr;
-
- /*
- * Write till lword boundary
- */
- len2 = 4 - (*(short *)addr & 0x0003);
- for (i=0; i<len2; i++)
- {
- eepromWriteByte(ptr++, *buffer++);
- }
-
- /*
- * Write all lwords
- */
- len2 = (len - len2) >> 2;
- for (i=0; i<len2; i++)
- {
- eepromWriteLong(ptr, *(unsigned int *)buffer);
- buffer += 4;
- ptr += 4;
- }
-
- /*
- * Write last bytes
- */
- len2 = (*(short *)addr + len) & 0x0003;
- for (i=0; i<len2; i++)
- {
- eepromWriteByte(ptr++, *buffer++);
- }
-}
diff --git a/board/esd/dasa_sim/flash.c b/board/esd/dasa_sim/flash.c
deleted file mode 100644
index d2ac13fcd8..0000000000
--- a/board/esd/dasa_sim/flash.c
+++ /dev/null
@@ -1,77 +0,0 @@
-/*
- * (C) Copyright 2001
- * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <ppc4xx.h>
-#include <asm/processor.h>
-
-/*
- * include common flash code (for esd boards)
- */
-#include "../common/flash.c"
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (vu_long *addr, flash_info_t *info);
-static void flash_get_offsets (ulong base, flash_info_t *info);
-
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- unsigned long size_b0;
- int i;
- unsigned long base_b0;
-
- /* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* Static FLASH Bank configuration here - FIXME XXX */
-
- size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size_b0, size_b0<<20);
- }
-
- /* Setup offsets */
- flash_get_offsets (-size_b0, &flash_info[0]);
-
- base_b0 = -size_b0;
-
- /* Monitor protection ON by default */
- (void)flash_protect(FLAG_PROTECT_SET,
- -monitor_flash_len,
- 0xffffffff,
- &flash_info[0]);
-
- flash_info[0].size = size_b0;
-
- return (size_b0);
-}
diff --git a/board/esd/dasa_sim/fpgadata.c b/board/esd/dasa_sim/fpgadata.c
deleted file mode 100644
index 1106d3270e..0000000000
--- a/board/esd/dasa_sim/fpgadata.c
+++ /dev/null
@@ -1,1952 +0,0 @@
- 0x00,0x09,0x0f,0xf0,0x0f,0xf0,0x0f,0xf0,0x0f,0xf0,0x00,0x00,0x01,0x61,0x00,0x0d,
- 0x61,0x63,0x6d,0x30,0x30,0x30,0x35,0x64,0x2e,0x6e,0x63,0x64,0x00,0x62,0x00,0x0b,
- 0x73,0x33,0x30,0x78,0x6c,0x74,0x71,0x31,0x34,0x34,0x00,0x63,0x00,0x0b,0x32,0x30,
- 0x30,0x30,0x2f,0x30,0x37,0x2f,0x31,0x30,0x00,0x64,0x00,0x09,0x31,0x39,0x3a,0x32,
- 0x37,0x3a,0x33,0x38,0x00,0x65,0x00,0x00,0x79,0xaa,0xff,0x20,0x3c,0xd4,0x9f,0x5b,
- 0xff,0x7e,0xde,0xee,0xbd,0xaa,0xfe,0xbf,0x9e,0xff,0xfb,0xfe,0x5f,0xbf,0xed,0xab,
- 0xdb,0xbe,0xe5,0xfb,0xfe,0xfb,0x9f,0xeb,0xfa,0xfe,0x5f,0xb6,0xef,0xfb,0xfe,0xfe,
- 0xaf,0xff,0xff,0xff,0xfb,0xfe,0xef,0xbf,0xef,0xff,0xba,0xff,0xbb,0xfe,0xfb,0xbe,
- 0xff,0xee,0xeb,0xff,0xef,0xbb,0xef,0xff,0xbe,0xff,0xbf,0xff,0xfb,0xfe,0xff,0xbb,
- 0xff,0xe1,0xff,0xff,0xff,0xff,0xff,0xbd,0xff,0xff,0xff,0xff,0xbc,0xff,0xbf,0xff,
- 0xfb,0xfd,0xff,0xdf,0xf7,0xff,0xff,0xbf,0xdf,0xff,0xff,0xff,0xff,0xdf,0xf7,0xfd,
- 0xff,0xff,0xfe,0x3f,0xff,0xbf,0xef,0xfb,0xfe,0xff,0xbf,0xef,0xe3,0xf6,0xff,0xbf,
- 0xef,0xfb,0xfe,0xff,0xef,0xdb,0xfe,0xff,0xbf,0xef,0xe3,0xfe,0xff,0xbf,0xef,0xfb,
- 0xfe,0xfe,0x3f,0xff,0xf7,0xff,0xef,0xbb,0xe7,0xf9,0xbe,0x7f,0xbf,0xec,0xf8,0xfe,
- 0xff,0xbb,0xef,0xfb,0xbe,0x7b,0xe3,0xfb,0xbe,0xff,0xbf,0xec,0xfb,0xfe,0xff,0xbb,
- 0xee,0xfb,0xfe,0xcf,0xbf,0xf6,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xbf,
- 0xbf,0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xfd,0x17,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xf7,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf7,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0x7f,0xff,0x93,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xef,0xfb,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf3,0x7f,0xff,0xf7,0xff,0xff,0xdf,
- 0xf7,0xf5,0xfd,0xff,0xdf,0xf7,0xff,0xfd,0xff,0xdf,0xf5,0xff,0x7f,0xff,0xdf,0xfd,
- 0xff,0xff,0x7f,0xd7,0xf7,0xfd,0x7f,0xdf,0xd7,0xf7,0xff,0x6f,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0xff,0xff,0xff,0xfb,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xbf,0xfd,0xff,0xff,0xff,0xff,0xef,0xff,0xfe,0xdf,0xff,0xcd,0x7f,0xff,0xff,
- 0xff,0xff,0x4f,0xdf,0xff,0xff,0xff,0x7f,0xff,0xff,0xff,0xff,0xff,0xdf,0xfd,0xff,
- 0xef,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0xff,0x7f,0xff,0xff,0xfb,0x3f,0xff,
- 0xff,0xff,0xff,0xfb,0xff,0xfe,0xff,0xff,0xff,0xff,0xff,0x7f,0xff,0xff,0xfc,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xf7,0xfb,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x57,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xdf,0xff,0xfe,0xff,0x7f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0xff,0xff,0xff,
- 0xec,0xff,0xff,0x7f,0xdf,0xf7,0xfd,0xff,0x3f,0xdf,0xf7,0xfd,0x7f,0x7f,0xcf,0xf3,
- 0xfc,0xff,0xdf,0x73,0xdd,0xff,0x7f,0xdf,0xf7,0xfd,0xff,0x7f,0xcf,0xf7,0xfd,0xff,
- 0x7f,0xfc,0x9f,0xff,0xef,0xbb,0xfe,0xbf,0xdf,0xef,0xbb,0xfe,0xfb,0xbf,0xef,0xfa,
- 0xee,0xff,0xff,0xfb,0xfe,0xff,0xbf,0xef,0xfa,0xee,0xff,0xbe,0xef,0xbb,0xfe,0xff,
- 0xbf,0xef,0xf7,0xeb,0xff,0xe7,0xf9,0xfe,0x7a,0x9d,0xe7,0xf9,0x7c,0x7e,0x9e,0xe7,
- 0x59,0xf6,0x7e,0x9f,0xe9,0x22,0x7f,0x9b,0xe6,0xb9,0xfe,0x4f,0x9f,0xe6,0xf9,0xfe,
- 0x7b,0x9d,0xe6,0xfe,0xfe,0x7e,0xff,0xbf,0xef,0xfb,0xee,0xff,0xbf,0xe7,0xf9,0xfe,
- 0xff,0x9f,0xef,0xfb,0xfe,0xfd,0xdf,0xfb,0xee,0xfb,0xbf,0xef,0xfb,0xee,0xf7,0xbf,
- 0xef,0xf7,0xfe,0xff,0x7f,0x5f,0x0f,0x9f,0x9b,0xe7,0xf9,0xfe,0x7f,0x9f,0xe7,0xf9,
- 0xfe,0x7f,0x9f,0x66,0xf9,0xfe,0x7f,0xe7,0xf9,0xee,0x77,0x9f,0xe7,0xf9,0xde,0x7d,
- 0x9d,0xe7,0xf9,0xee,0x7f,0x9f,0xed,0xc9,0xff,0xfd,0xff,0x7f,0xdf,0xfd,0xfd,0xff,
- 0x7f,0xdf,0xf7,0xfd,0xff,0x7f,0xdf,0xfd,0xff,0xdf,0xdf,0xf7,0xfd,0xff,0x7f,0xdf,
- 0xf7,0xfd,0xff,0x7f,0xff,0xf7,0xff,0xff,0xfc,0xb7,0xfe,0xff,0xbf,0xef,0xfa,0xfe,
- 0xff,0xbf,0xef,0xfb,0xfc,0xfd,0xbd,0x6f,0xba,0xee,0xb5,0xef,0xfb,0xfe,0xff,0xbf,
- 0xef,0xfb,0xfa,0xff,0xbf,0xef,0xfb,0xfe,0xff,0xff,0x65,0xaf,0xdb,0xd6,0xfd,0xbf,
- 0x7f,0xdb,0xf6,0xfd,0xbf,0x6f,0xfb,0xf6,0xf9,0xae,0xf7,0xd4,0x79,0xbf,0x6f,0xdb,
- 0xb6,0x7d,0xbf,0x6f,0xdb,0xf6,0xfd,0xbd,0x6f,0xdb,0xf7,0xe8,0xef,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfb,0xe7,0xfb,0xf7,0x7c,0xfd,0xff,0xf7,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xbf,0xff,0xff,0x9d,0x9e,0xff,0xff,
- 0xff,0xbf,0x7f,0xff,0xfb,0xff,0xff,0x9f,0xfe,0xff,0xff,0xff,0xfb,0xbb,0xff,0xfd,
- 0xff,0xff,0xfb,0xff,0x7f,0xdb,0xe7,0xff,0xbe,0xff,0xff,0xff,0xfb,0xfe,0xe3,0xff,
- 0xff,0xff,0xdf,0xfb,0xef,0xff,0xf7,0xfd,0xff,0xff,0xef,0xff,0xff,0xff,0xcf,0x77,
- 0xdf,0xff,0xff,0xdf,0xd7,0xff,0xff,0xff,0xff,0xdf,0xf7,0xf4,0x7f,0xff,0xff,0xfd,
- 0x7b,0xff,0xff,0xfc,0xff,0xfb,0xff,0xff,0xff,0xef,0xff,0xf7,0xff,0xbf,0xf7,0xff,
- 0x4f,0xff,0xff,0xff,0x7f,0xff,0xff,0xff,0xff,0xff,0xfe,0xff,0xff,0x7f,0xff,0xfe,
- 0xfe,0xad,0xff,0xf7,0xfd,0xff,0x7f,0xdf,0xf7,0xfd,0xff,0x7f,0xdf,0xf7,0xfd,0xff,
- 0x79,0xdf,0x5d,0xff,0x7d,0xdf,0xf7,0xfc,0xff,0x7f,0xdf,0xf7,0xfd,0xff,0x7f,0xdf,
- 0xf7,0xff,0xed,0xff,0xbf,0xff,0xff,0x2f,0xd3,0xff,0xff,0xff,0xff,0xff,0xff,0x7f,
- 0xff,0xff,0xdb,0xff,0xfb,0xfb,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf7,
- 0xff,0xff,0xf7,0xfd,0xbf,0xff,0xff,0xff,0xf7,0xfd,0xbf,0xfe,0xff,0xff,0xef,0xfb,
- 0xff,0xff,0xfe,0xfb,0xdb,0xfb,0xbf,0xef,0xfb,0xff,0xff,0xff,0xff,0xff,0xfe,0xff,
- 0xff,0xff,0xff,0xff,0xf7,0x97,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xef,0xff,0xef,0x7f,0xff,0xcf,0xdb,0xfd,0xff,0xef,0xff,0xfe,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xea,0xff,0xff,0xf7,0xff,0xfd,0xff,0xff,0xff,0xfe,
- 0xff,0xff,0xff,0xff,0xfd,0xfb,0x7d,0xf5,0xff,0x7f,0xdf,0xff,0xf7,0xfd,0xff,0x7f,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xbf,0xfd,0xdf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xf7,0xdf,0xff,0x7e,0xdf,0x7f,0xfe,0xff,0xdf,0xdf,0xff,0xff,0xff,0xdf,
- 0xff,0xff,0xff,0xff,0xbf,0xef,0xff,0xff,0xff,0xb3,0xff,0xe3,0xf9,0xff,0xff,0xaf,
- 0xff,0xff,0xff,0xfd,0xfd,0xfd,0xfa,0x7f,0xfd,0xab,0xfa,0x7d,0xfe,0x9f,0x7f,0xbf,
- 0xff,0xfe,0xff,0xff,0xfa,0xfe,0xbf,0xff,0xfd,0xff,0xf7,0x7f,0xfe,0xff,0xff,0xff,
- 0xf6,0xff,0xff,0xff,0xff,0xff,0xff,0xef,0xdf,0xff,0xf6,0xfe,0xdd,0xff,0xff,0xf7,
- 0xff,0xff,0xff,0x7f,0xbf,0xff,0xee,0xfb,0xff,0xff,0xff,0xfe,0x8f,0xff,0xff,0xff,
- 0xff,0x77,0xef,0xfd,0xff,0xff,0xef,0x3f,0xfe,0xad,0x7f,0xfb,0xff,0xcf,0xf7,0xff,
- 0xff,0xff,0xfd,0x7f,0xff,0xff,0xff,0xef,0x7b,0xfd,0xff,0xff,0xff,0xd1,0xff,0xff,
- 0xff,0xff,0xff,0xbf,0xff,0xff,0xff,0xff,0xfb,0xfe,0xff,0xff,0xed,0xfb,0xff,0xef,
- 0xef,0xfb,0xfe,0xff,0xdf,0xff,0xfb,0xff,0xdf,0xff,0xff,0xff,0xff,0xff,0xf9,0x3f,
- 0xff,0xff,0xff,0xff,0xff,0xcf,0xff,0xff,0xff,0xff,0xef,0xff,0xff,0xfe,0xff,0xd7,
- 0x7f,0xff,0xff,0xff,0xf7,0xff,0xff,0xff,0xff,0xff,0xff,0x3f,0xff,0xff,0xff,0xff,
- 0x46,0xff,0xff,0xff,0xff,0xfb,0xff,0xff,0xff,0xff,0xff,0xff,0xfd,0xff,0xf8,0x7e,
- 0xbf,0xff,0xff,0xfd,0xfb,0xff,0xfe,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xe2,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xf7,0xfd,0xf7,0xf7,0xfe,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0x9f,0xf3,0xfc,0xff,0xfd,0xff,0x7f,0xff,0xff,0xff,0xbf,0xff,0xfd,
- 0xff,0xff,0xbb,0xf1,0xf3,0xbf,0xff,0xff,0xf7,0xff,0xdf,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xbb,0xff,0xff,0xff,0xfe,0x3d,0xcd,0xff,0x7f,0xdf,0xff,0xfd,
- 0xff,0xff,0xef,0xef,0xff,0xfa,0xff,0xf7,0xfb,0xff,0x7f,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xf5,0x7f,0xef,0xff,0xff,0xff,0xfb,0x5f,0xff,0xff,0xfc,
- 0xff,0xff,0xff,0xff,0xff,0x7f,0xff,0x7f,0xff,0xff,0xdf,0xff,0xff,0xff,0xff,0xfb,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xc3,0xff,0xff,0xfc,0x7f,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xf7,0xfd,0xff,0x3f,0xf9,0xfc,0xff,0xff,0xcc,0xf5,0xff,0xcf,0xe7,
- 0xff,0xff,0x3f,0xff,0x7f,0xff,0xbf,0xff,0x29,0xaf,0xff,0xff,0xdf,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x2f,0xff,0x9f,0xff,0xff,0xff,0xff,0xfc,0xef,
- 0xfe,0x7f,0xff,0xff,0xff,0xff,0xff,0xf7,0xff,0x5f,0x3d,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xf9,0xaf,0xfb,0xca,0xff,0xfb,0x2b,0xd2,0xbf,0xff,
- 0xef,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0xff,0xef,0xa6,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf5,0xfd,0xff,0x5f,0xff,0xe5,0x7f,0x5f,
- 0xff,0xf7,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xdf,0xff,0x74,0xfb,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xeb,0xff,0xff,0xff,0xef,0x5f,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xbd,0x7f,0xff,0xff,0xff,0xff,0xff,0xff,0xfb,0xff,0xff,0x5b,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfd,0x5f,0xff,0xfd,0xf7,0x7f,0xdf,0xff,
- 0xff,0x7f,0xdf,0xff,0xdd,0xaf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x77,0xfd,0x89,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xaf,0xff,0xd2,0xc7,0xbf,0xaf,
- 0xff,0xfe,0xbf,0xaf,0xff,0xd6,0xff,0xff,0xff,0xff,0xff,0xff,0xfd,0x7f,0xef,0xff,
- 0xe0,0x7f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf5,0xff,0xfb,0x5f,0xdf,
- 0xf5,0xff,0xff,0xd7,0xf5,0xff,0xff,0x7f,0xff,0xff,0xff,0xff,0xff,0xff,0x3f,0xfd,
- 0xff,0xf2,0x6f,0xfb,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf9,0xff,0xbf,
- 0x9f,0xff,0xff,0xff,0xff,0xef,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x9f,0xff,
- 0xff,0xff,0xff,0xed,0xff,0x8f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xbf,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xbf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfb,
- 0xff,0xff,0xff,0xff,0xf8,0x1f,0xff,0xbf,0xef,0xfb,0xfe,0xff,0xbf,0xef,0xfb,0xfe,
- 0xfb,0xbf,0xef,0xfb,0xfe,0xff,0xef,0xfb,0x7e,0xff,0xbf,0xef,0xfb,0xf6,0xff,0xbf,
- 0xee,0xfb,0xfe,0xff,0xb7,0xfe,0xe6,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfc,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x7c,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
- 0x7f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfd,0x57,0xff,0xff,0xff,0xfd,0xff,0x7f,
- 0xff,0xff,0xff,0xfd,0x7f,0xff,0xd7,0xe5,0xff,0xff,0xf7,0xf5,0xff,0xfb,0xff,0xd7,
- 0xff,0xef,0x7f,0xff,0xd7,0xff,0xff,0xff,0x5f,0xfe,0x9b,0xff,0xff,0xff,0xff,0x9f,
- 0xe7,0xff,0xff,0xff,0xff,0xa7,0xff,0xfa,0x7e,0x9f,0xff,0xde,0x7e,0x9d,0xff,0xff,
- 0xfa,0x77,0xff,0xb7,0xff,0xfa,0x7f,0xff,0xff,0xe9,0xff,0xff,0x7f,0xff,0xff,0xff,
- 0xb7,0xfd,0xff,0xff,0xff,0xff,0xbf,0xff,0xff,0xff,0xd7,0xff,0xef,0xdf,0xff,0xff,
- 0xdf,0xff,0x5f,0xff,0xfd,0xff,0xfb,0xff,0xff,0xff,0xfd,0x7f,0xfe,0x8f,0xff,0xff,
- 0x9f,0xe6,0xe9,0xbc,0x7f,0x9f,0xe7,0xf9,0xfe,0x7f,0x9f,0xc2,0xf9,0xfe,0x7b,0xe7,
- 0xf9,0xfe,0x7f,0x8b,0xe7,0xf8,0xfe,0x7f,0x9f,0xe7,0xf9,0xfe,0x2f,0x9f,0xe1,0xff,
- 0xff,0xff,0xff,0xdf,0xf7,0xaf,0xff,0xff,0xff,0xd3,0xff,0xfd,0x7a,0xff,0xfb,0xff,
- 0x3f,0x5f,0xfb,0xff,0xff,0xff,0xff,0xf7,0xff,0xfd,0x7f,0xff,0xff,0xff,0xff,0xfd,
- 0x3f,0xff,0xff,0xff,0xfb,0xee,0xff,0xff,0xff,0xff,0xfa,0xff,0xff,0xaf,0xff,0xff,
- 0x7f,0xef,0xeb,0xff,0xff,0xff,0xff,0xff,0xfb,0xff,0xff,0xaf,0xff,0xff,0xff,0xff,
- 0xff,0xc7,0xff,0xff,0xff,0xff,0x77,0xdf,0xff,0xff,0xff,0xff,0xef,0xff,0xff,0xff,
- 0xff,0xff,0xfc,0xff,0xff,0xef,0xff,0xff,0xff,0xff,0xdf,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xe4,0xff,0xff,0xff,0xff,0xee,0xfb,0xdf,0xff,0xff,0xff,0xfd,0xff,0xff,
- 0xff,0xff,0xfd,0xff,0x9f,0xff,0xfd,0xff,0x7f,0xff,0xf7,0xed,0xff,0xff,0xdf,0xff,
- 0xff,0xff,0xff,0xfe,0xdf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfd,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xbf,0xff,0xff,0xff,0xbf,0xff,0xfd,0xff,0xff,
- 0xff,0xff,0xff,0x2f,0xff,0x8b,0xff,0xfe,0xbf,0xaf,0xeb,0xfa,0xfe,0xbf,0xa7,0xe9,
- 0xfa,0xfe,0xbf,0xa7,0xc8,0xfa,0x7f,0xa3,0xe9,0xfa,0xbe,0xbf,0xab,0xea,0xfa,0xbe,
- 0xaf,0xad,0xeb,0xfa,0xfe,0xbf,0xd5,0x7b,0xff,0xff,0xdf,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xfc,0xff,0xff,0xff,0xff,0x7f,0xfb,0xcd,0xff,0xfc,0xcf,0xfe,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xfe,0xff,0xff,0x47,0xff,0xff,0xfb,0xf7,0xff,0xff,0xff,
- 0xff,0xff,0xff,0x77,0xff,0xbf,0xff,0xfd,0xff,0xef,0xbf,0xba,0xbf,0xff,0xff,0xff,
- 0xff,0xdf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xb5,0xff,0xdf,0x7f,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xaf,0xef,0xfb,0xff,0xf7,0xff,0xf6,0xff,0xef,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xdf,0xef,0xfb,0xff,0xff,0xff,0xff,0xff,0x9f,0xff,0xff,0xfe,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xdf,0xff,0xdf,0xf7,0x5d,0xff,0x7e,0x76,0xff,0xff,0xff,
- 0xff,0x8f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0x3f,0xff,0x17,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfa,0xff,0xff,0xff,0xff,0xff,0x5f,0xff,0xfd,
- 0xff,0x7f,0xf7,0xff,0xf7,0xff,0xff,0xff,0xff,0xff,0xff,0xdd,0xff,0xea,0x7f,0xff,
- 0xff,0xef,0xfe,0xff,0xff,0xf7,0xff,0xff,0xfd,0xff,0xfd,0xd7,0xfd,0xff,0xf9,0xfb,
- 0xfe,0xff,0xff,0xff,0xfb,0xff,0xff,0xef,0xfd,0xff,0x7f,0xff,0xbf,0xff,0xfe,0x1f,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xfb,0xff,0xbe,0xff,0xff,0xef,0xff,0xbf,0xff,0xbf,
- 0x7b,0xfe,0xfd,0xaf,0xed,0xf9,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xbb,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf7,0xff,0xff,0xdf,0xef,0xff,
- 0x7f,0xe7,0xdf,0xff,0xbd,0xff,0xff,0xff,0xff,0xff,0xff,0xef,0xf7,0xff,0xff,0xff,
- 0xff,0xf7,0x7f,0xff,0xff,0xfd,0xff,0xfe,0xff,0xff,0xff,0xff,0xbf,0x7f,0xef,0xff,
- 0xff,0x76,0xfd,0xff,0xc7,0x3f,0xff,0xff,0xf7,0xff,0xff,0xff,0xff,0xf7,0xc7,0xff,
- 0xff,0xdf,0xfe,0x4f,0xff,0xff,0xff,0xdf,0xff,0xff,0xff,0xff,0xff,0xef,0xff,0xff,
- 0xfe,0x7f,0xfe,0xff,0x9f,0xfe,0xff,0xff,0xff,0xff,0xff,0xff,0xef,0xff,0xff,0xfe,
- 0xff,0xff,0xff,0xff,0xd5,0xff,0xdf,0xff,0xff,0xff,0xfd,0xff,0xff,0xff,0xdf,0xfd,
- 0x3f,0x4f,0xff,0xfd,0xff,0xff,0xf7,0xf9,0xf7,0x7f,0xdf,0xdf,0xff,0xff,0xff,0xbf,
- 0xff,0xff,0xff,0xff,0x7f,0xf8,0x3f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf7,
- 0xff,0xff,0xff,0xff,0x9f,0x7f,0x7f,0xff,0xff,0xfe,0xbf,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0xa7,0xff,0xff,0xff,0xef,0xff,0xff,0xff,0xff,
- 0xdf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xef,0xff,0xff,0x3f,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x6e,0x0f,0xfb,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xc1,0xb3,0xff,0xff,0x3f,0xc7,0xf1,0xfc,0xff,0xfd,0x31,0x5c,0xff,0x7f,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x7f,0xf2,0x5b,0xff,0x7f,0xff,0xff,0xff,
- 0xff,0xfe,0x7f,0x97,0x3f,0xff,0xf7,0xfd,0xf3,0x7c,0xaf,0xff,0x97,0xe7,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x3b,0xf5,0x9b,0x7f,0xef,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xbe,0xf7,0xff,0x2b,0x4a,0xdf,0xbf,0xef,0x3a,0xfe,0xed,0x6a,
- 0x6b,0x7f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfb,0xfe,0xf4,0x2d,0xfd,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xdf,0xff,0xed,0x73,0x5f,0xdf,0xf7,0xcf,0x5f,0xdf,
- 0xf7,0xfd,0x7f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfd,0xff,0xf7,0x23,0xff,
- 0xbf,0xff,0xff,0xff,0xff,0xff,0xff,0xfb,0xff,0xfe,0xff,0xff,0xfe,0xf5,0xbd,0x7f,
- 0xfb,0xfe,0xfb,0x7f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xef,0x5f,0xd8,
- 0xbf,0xf7,0x7f,0xff,0xff,0xff,0xff,0xff,0xff,0x77,0xff,0xff,0x7f,0xdf,0x77,0x9d,
- 0x6f,0xdf,0x77,0xdd,0xef,0x7f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf7,0x6b,
- 0xd9,0x37,0xfe,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xef,0xff,0xf6,0xb9,0xaf,0xfb,
- 0xc6,0xff,0xaf,0xef,0xfa,0xda,0xb5,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xb5,0x7e,0xf3,0xff,0xdf,0xff,0xff,0xff,0xff,0xff,0xff,0xfd,0xff,0xfc,0x57,0xa5,
- 0xfd,0xfb,0x7e,0xb5,0xfd,0xff,0x7f,0xd7,0x1f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xdf,0x3f,0xe8,0xff,0xb7,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xbf,0xff,0xff,0xff,0xff,0xb7,0xff,0xff,0xff,0xff,0xff,0xff,0xfb,
- 0xff,0xff,0xbf,0xff,0xff,0xdf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfb,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xff,0x8f,0xff,0xfa,0xff,0xff,0xf9,0xff,0xfb,0xfe,0xff,0xbf,0xef,0xfb,0xfe,0xff,
- 0xbf,0xef,0xfb,0xfe,0xfd,0xbf,0x6f,0xfe,0xd5,0xb7,0xef,0xbb,0xf6,0xff,0xbf,0xef,
- 0xfb,0xfe,0xff,0xbf,0xef,0xbb,0xff,0xee,0x7f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xfd,0xbf,0x6f,0xff,0xff,0xff,0xef,0xff,0xf6,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf6,0xcf,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xdf,0xf7,0xff,0xff,0xff,0xef,0xff,0xff,0x7f,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xcd,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xde,0xff,0xe5,0xf9,0x7f,0xdf,0xf7,0xfd,0x7b,0xdf,0xd7,0xf5,
- 0xeb,0x7f,0xff,0xff,0xff,0xfd,0x7f,0xff,0xd7,0xff,0xef,0xf9,0x3f,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0x79,0xf7,0x7e,0x9f,0xa7,0x6d,0xd3,0x77,0xa7,0xed,0xf2,
- 0x7e,0x9f,0xb7,0xff,0xff,0xff,0xff,0xa7,0x7f,0xfa,0x7f,0xff,0xff,0x33,0xfd,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x77,0xfe,0xd7,0x75,0xfb,0x7f,0xdd,0xf5,0xff,
- 0x7f,0xdf,0xd7,0x7d,0xff,0xff,0xff,0xff,0xef,0xff,0xff,0xff,0xff,0xff,0xc4,0xff,
- 0xff,0xf9,0xfe,0x7f,0x9f,0xe7,0xf9,0xfe,0x6f,0x9f,0xe2,0xf8,0xbe,0x3f,0x8f,0xe6,
- 0xbe,0x3f,0x9f,0xe2,0xf8,0xfe,0x7f,0x9f,0xe7,0xf9,0xfe,0x7f,0x9f,0xe7,0xf9,0xff,
- 0x1f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfd,0xff,0x9f,0xe7,0xff,0xfc,0x7f,
- 0x1f,0xfb,0xfc,0xff,0x3f,0xff,0xf3,0xff,0xff,0xff,0xff,0xd7,0xfe,0xfd,0x7f,0xff,
- 0xff,0xe3,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xbf,0xff,0xff,0xff,0xfe,
- 0xff,0xbf,0xff,0x7e,0xdf,0xff,0xff,0xfb,0xff,0xff,0xff,0xff,0xfa,0xff,0xdf,0xaf,
- 0xff,0xff,0xfd,0x3f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf7,0xff,0xff,0xff,
- 0xff,0xf7,0xfd,0xff,0xff,0xf7,0xfc,0xff,0xff,0xcf,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xfe,0x4f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0x7f,0xdf,
- 0xf7,0xff,0xfb,0x7e,0xdf,0xfd,0xfb,0x7f,0xdf,0xff,0xed,0xff,0xff,0xff,0xff,0xff,
- 0xff,0x7f,0xff,0xff,0xff,0xe5,0xdf,0xf4,0xff,0xdf,0xff,0xff,0xdf,0xff,0xff,0xef,
- 0xff,0xff,0xbf,0xff,0xff,0xff,0xff,0xff,0x2b,0xc9,0xdf,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xfa,0x3f,0xfe,0xeb,0xfa,0xfe,0xaf,0xaf,0xeb,0xfa,
- 0xfe,0xaf,0x25,0xe8,0xfa,0x3e,0xaf,0x2b,0xfa,0xf6,0xaf,0xab,0xeb,0xfa,0xfe,0xaf,
- 0xaf,0xea,0xfa,0xfe,0xbf,0xaf,0xeb,0xfd,0x87,0xff,0xbf,0xef,0xff,0xff,0xff,0xff,
- 0xff,0xfd,0x3f,0xff,0xf3,0xfd,0xdf,0xb7,0xff,0xff,0xdf,0xff,0x87,0xff,0x7f,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf8,0x4f,0x7f,0xff,0xff,0x7f,0xff,
- 0xff,0xf7,0xff,0x6f,0xdf,0xbe,0xff,0xbb,0x56,0xdf,0xb7,0xe9,0xff,0xf3,0xf7,0x37,
- 0xff,0xff,0xdf,0xff,0xfd,0xff,0xff,0xff,0xff,0xfd,0xfa,0x5f,0x7f,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0x76,0xfb,0xec,0x6f,0xff,0x7f,0xff,0xf5,0x7f,0xee,0xdf,0xf7,
- 0xfb,0xbf,0xef,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0xf1,0xff,0xff,0xbf,
- 0xff,0xff,0xff,0xfd,0xdf,0xff,0xed,0xff,0xef,0xde,0xf7,0xfe,0xff,0xea,0x7f,0xde,
- 0x8f,0xab,0xff,0x3f,0xff,0x7f,0xff,0xbf,0xff,0xff,0xff,0xff,0xff,0xfc,0x7f,0xf7,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x9f,0xbf,0xbf,0xdf,0xfd,0xdb,
- 0xff,0xa7,0xfa,0xbf,0xff,0xff,0xff,0xff,0xff,0xff,0x7f,0xff,0xff,0xdf,0xfe,0x47,
- 0xff,0xff,0xff,0xfe,0xff,0xff,0xff,0xff,0xef,0xef,0xff,0xfe,0xfb,0xfc,0xaf,0xbb,
- 0x8b,0xde,0x1f,0xbb,0xee,0xfd,0x7f,0xff,0xaf,0xff,0xfd,0xff,0xff,0xff,0xff,0xff,
- 0xe5,0xff,0xff,0xff,0xfe,0x2f,0xff,0xfe,0xff,0xff,0xff,0xfb,0xf6,0xfc,0xbb,0xef,
- 0xcf,0xf7,0xbf,0xff,0xcb,0xf2,0xff,0xff,0xff,0xcf,0xff,0xfd,0xf7,0xff,0xff,0xff,
- 0x7f,0xf8,0xbf,0xff,0xf7,0xff,0xfb,0xff,0xff,0xff,0xfd,0x7f,0x7f,0xd6,0xf5,0xec,
- 0xfe,0x5e,0xcc,0x75,0x7d,0xdb,0xdf,0xbf,0xff,0xff,0xfe,0xff,0xff,0xef,0x7f,0xff,
- 0xfb,0xff,0xff,0xe7,0x7f,0xff,0xff,0xdc,0xff,0xff,0xff,0xf1,0xfe,0xff,0xf7,0xaf,
- 0xf7,0xca,0xfe,0x7f,0xdb,0xf9,0xff,0xbf,0xdf,0xf1,0xfd,0x7f,0xfd,0xcf,0xff,0xff,
- 0xff,0xff,0x7f,0xff,0xe4,0xef,0xff,0xff,0xff,0xef,0xff,0xff,0xff,0xdf,0xf3,0xfe,
- 0xfd,0xfe,0xff,0xdf,0xef,0x59,0x7f,0x3b,0xf7,0xe3,0xef,0xbf,0xff,0xff,0xfe,0xff,
- 0xff,0xff,0xfe,0xff,0xff,0xfd,0x9f,0x7f,0xff,0xff,0xf9,0xff,0xff,0xff,0xff,0xff,
- 0xeb,0xff,0xcf,0xb3,0xed,0xeb,0x7f,0xff,0xbf,0xfb,0xff,0xef,0xd7,0xff,0xff,0xfd,
- 0xbf,0xff,0xff,0xff,0xff,0xff,0xff,0xb9,0xf5,0xff,0xff,0xfe,0xaf,0xff,0xff,0xff,
- 0xff,0xff,0xf9,0xe3,0xf8,0xfe,0x3e,0x8f,0xda,0xda,0x96,0xad,0xeb,0xfe,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xfb,0xff,0xff,0xea,0x7d,0xff,0xef,0xff,0xdf,0x7f,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xdb,0xff,0xff,0xbf,0xff,0xff,0xbf,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x41,0xff,0xff,0xfc,0xff,0x3f,
- 0xff,0xff,0xfc,0xfb,0xff,0xcf,0xff,0x3f,0xff,0xff,0xff,0xff,0xff,0xdf,0xf9,0xff,
- 0xef,0xff,0xff,0xff,0xf1,0xff,0xff,0xff,0xf9,0xf3,0xff,0x1d,0xaf,0xff,0xff,0xdf,
- 0xef,0xff,0xf3,0xfc,0xcf,0x7f,0xfd,0xff,0xe7,0xff,0xff,0xff,0xff,0xff,0xfc,0xff,
- 0x3f,0xfd,0xff,0xff,0xff,0xfe,0xff,0xff,0x3b,0xff,0xaf,0xff,0x5f,0x35,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xbf,0xef,0xef,0xfb,0xf5,0x79,0xdf,0x37,0xcd,0xff,0xdf,0x57,
- 0xd5,0xff,0x7f,0xbf,0xff,0xff,0xff,0xff,0xff,0xfb,0xd2,0xff,0xef,0xef,0x86,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xdf,0xf7,0xfd,0xf3,0x7e,0xff,0x9f,0xe7,0xf9,0xfe,0xff,
- 0xe7,0xf9,0xfe,0xff,0xf7,0xff,0xff,0xff,0xff,0xff,0xfd,0xff,0x5f,0xff,0xff,0x60,
- 0x3f,0xb7,0xff,0xff,0xaf,0xff,0xfe,0xff,0xbf,0xbf,0xfb,0xa7,0xed,0xf5,0x7f,0x5f,
- 0xef,0xf7,0xfd,0x5f,0x47,0xfe,0xff,0xff,0xeb,0xff,0xfe,0xbf,0xef,0x5f,0xff,0xff,
- 0xfd,0x5b,0xff,0xff,0xff,0xf5,0x7f,0xff,0x77,0xdd,0xa7,0x7d,0xda,0xff,0xbe,0xff,
- 0xff,0xff,0xfe,0xff,0xbb,0xee,0xff,0xdd,0xff,0xfd,0x5f,0xff,0xd5,0xf7,0x6b,0xdf,
- 0xff,0xfd,0x8b,0x7f,0xff,0xff,0xfe,0xbf,0xff,0xfb,0xfe,0xde,0xff,0xaf,0x77,0xed,
- 0xff,0x7d,0xdc,0x7d,0xff,0x7e,0xdf,0xb7,0xfb,0xff,0xff,0xaf,0xff,0xfa,0xff,0xbf,
- 0xaf,0xff,0x7f,0xec,0x7f,0xff,0xff,0xff,0xd7,0xff,0xfd,0xff,0x7f,0xdf,0xf7,0xc7,
- 0xff,0xff,0xff,0x1f,0xeb,0xfc,0xff,0xff,0xff,0xff,0x7f,0xff,0xf5,0xff,0xff,0x5f,
- 0xdf,0xf5,0xff,0xff,0xfe,0x87,0xfb,0x7f,0xff,0xff,0xff,0xff,0xfe,0xff,0xff,0xe7,
- 0xfb,0x6f,0xfb,0xbe,0xe7,0xbf,0xfb,0xb6,0xef,0xbb,0xee,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xd1,0xff,0x9f,0xff,0xff,0xff,0xff,0xff,0xeb,0xff,
- 0xfe,0xff,0xff,0x6f,0xfa,0xf6,0xfd,0xff,0xfb,0xfe,0xbf,0x8f,0x63,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf9,0x1f,0xff,0xbf,0xef,0xfb,0xfe,0xff,0xb3,
- 0xef,0xfb,0xb6,0xfd,0xbc,0x6f,0x1b,0xb6,0xfd,0xee,0xdb,0xe6,0xfd,0xbf,0xef,0xfb,
- 0xfe,0xdf,0xbf,0xef,0xfb,0xfe,0xff,0xbf,0xfe,0xa7,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xfd,0xff,0x7f,0xef,0xfb,0xf7,0xff,0x7f,0xf3,0xfc,0xfd,0xbf,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x78,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0xf7,0xbd,0xef,0xfb,0xff,0xbb,0xee,0xfb,0xbe,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0x1f,0xff,0xff,0xff,
- 0xfd,0xff,0xff,0x5f,0xd7,0xf5,0xef,0x7f,0xff,0xff,0xff,0xef,0xfb,0xff,0xbf,0xff,
- 0xff,0xff,0xf7,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0x8b,0xff,0xff,
- 0xff,0xff,0x9f,0xff,0xe9,0xf2,0x7e,0x9f,0xa7,0xfe,0x9f,0xbf,0xeb,0xfa,0xff,0xbf,
- 0xef,0xfb,0x7e,0xb6,0x7f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf9,0x7f,
- 0xff,0xff,0xff,0xf7,0x7f,0xfb,0xff,0x5f,0xff,0xfd,0xdf,0xff,0xff,0xff,0xff,0xff,
- 0xfd,0xff,0xbf,0xff,0xff,0xde,0xff,0xff,0xff,0xf7,0xff,0xff,0xff,0xff,0xf7,0xfe,
- 0x67,0xff,0xff,0x9f,0xe6,0xf1,0xfe,0x7f,0x8b,0xe7,0xf9,0xbe,0x7f,0x9f,0xe7,0xf9,
- 0xfe,0x7f,0xe7,0xf9,0xfe,0x7f,0x9b,0xe7,0xf9,0xfe,0x7f,0x9f,0xc7,0xf9,0xfe,0x7f,
- 0x9f,0xe9,0xff,0xff,0xff,0xff,0xde,0xbf,0xf5,0xff,0xbf,0x4f,0xf1,0xfe,0xff,0xff,
- 0xe7,0xf9,0xff,0x9f,0xef,0xff,0xff,0xff,0x3f,0xef,0xff,0xff,0xff,0xfa,0xff,0xff,
- 0xff,0xff,0xff,0x3f,0xff,0xff,0xff,0xfb,0xff,0xfe,0xbf,0xf7,0xe9,0xfb,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xe7,0xfd,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0x57,0xff,0xff,0xff,0xff,0x7f,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xfb,0xff,0xff,0xff,0xff,0xef,0xff,0xbf,0xff,0xff,0xfd,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xc4,0xff,0xff,0xff,0xff,0xef,0x7f,0xff,0xff,0xdf,0xf7,
- 0xfd,0xff,0xdf,0xf7,0xfd,0xff,0x7f,0xf7,0xfd,0xff,0x7f,0xdf,0x9f,0xf7,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xdc,0xcf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xf7,0xf5,0xef,0x7b,0xdf,0xf2,0xfc,0xbf,0xcb,0xf2,0xfd,0x2f,0x7f,0xf2,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfb,0xff,0xfe,0xbf,0xaf,0xeb,0xfa,0xfe,
- 0xbf,0xaf,0xea,0xda,0xbc,0x97,0xab,0x6a,0xda,0xb5,0xab,0x69,0xda,0x76,0xaf,0x2f,
- 0xea,0xfa,0xfe,0xb7,0xaf,0xeb,0xfa,0xfe,0xaf,0xf5,0x7f,0xff,0xff,0xcf,0xff,0xff,
- 0xff,0xff,0xcf,0xee,0xfe,0xfa,0x3f,0xbd,0xfd,0x7f,0xff,0xfd,0xf3,0x7f,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf6,0x07,0xff,0xff,0xeb,0xf7,
- 0xf7,0xff,0xff,0xab,0xff,0xfc,0xcb,0xe6,0xbd,0xf7,0xef,0xfb,0x7f,0xb5,0xe5,0xfd,
- 0xfd,0xdf,0xff,0xff,0xff,0xff,0xff,0xff,0xfb,0xff,0xff,0xff,0x89,0x7f,0xff,0xff,
- 0xff,0xf7,0xbf,0xcf,0xff,0xdf,0xf7,0xbf,0xe7,0xeb,0xf6,0xfb,0xff,0xb7,0xef,0xdf,
- 0xff,0x7e,0x7b,0xff,0xfd,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfc,0x1f,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0x8f,0xdf,0xfe,0xf6,0xbf,0xaf,0x49,0xba,0x7b,0xa7,
- 0x89,0xda,0xfd,0xb7,0xf7,0xdf,0xff,0xff,0xfb,0xff,0x7f,0xff,0xff,0xff,0xff,0xe7,
- 0xff,0x7f,0xff,0x7f,0xff,0xfb,0xff,0xfb,0xff,0xff,0x7b,0xd7,0xd5,0xfd,0x7a,0x5b,
- 0x95,0xed,0x5d,0x5f,0xef,0xff,0xff,0xfd,0xff,0x7f,0xff,0xf7,0xff,0xff,0xfe,0xff,
- 0xec,0x7f,0xff,0xff,0xff,0xfe,0xff,0xfe,0xff,0xfc,0xfe,0xf3,0xfc,0xdf,0x3b,0xce,
- 0xf3,0xfb,0x3f,0xce,0xf3,0xff,0xef,0xfb,0xfd,0xfd,0x7f,0xff,0xf7,0xff,0xff,0xbf,
- 0xff,0xfd,0x5f,0xff,0xff,0xff,0xff,0xff,0xcf,0x5b,0xfe,0xef,0xfd,0x7f,0x5f,0xd3,
- 0xf6,0xfd,0xb7,0x5b,0xd6,0xfd,0xbf,0xff,0xfb,0x7f,0xff,0xff,0xff,0xff,0xff,0x7f,
- 0xff,0xff,0xff,0xe2,0xff,0xff,0x7f,0xff,0xff,0xff,0xfd,0xff,0xcf,0xff,0xff,0xff,
- 0xdf,0xd6,0xed,0xef,0x46,0xd7,0xb7,0xbf,0xfe,0xff,0xdf,0xfe,0xff,0xff,0xff,0xf7,
- 0xff,0xff,0xff,0xff,0xfe,0x7e,0xff,0xff,0xfd,0xff,0xff,0xde,0xff,0xbf,0xfc,0xff,
- 0xf9,0x7e,0x7f,0xbf,0xee,0xdd,0x3d,0xc7,0xf3,0xfb,0xf6,0x1f,0x3f,0xcf,0xdb,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xae,0xff,0xff,0xff,0xff,0xff,0xff,0xf7,0xfd,0xd7,
- 0xf9,0xf5,0xff,0xef,0xff,0xff,0xf7,0xbb,0xfd,0xfe,0xdf,0xff,0xfd,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xd5,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xeb,
- 0xbf,0xec,0xff,0x7f,0xcb,0xf2,0xfc,0xbf,0x3e,0xf3,0xfe,0xbe,0xa5,0xe7,0xff,0xff,
- 0xff,0xfe,0xff,0xff,0xff,0xff,0xff,0xff,0xfb,0x1f,0xff,0xff,0xff,0xff,0xdf,0xf7,
- 0xfd,0xff,0xff,0xde,0xf6,0xbf,0xad,0xeb,0x6a,0xff,0x2d,0x6b,0x7a,0xff,0xb7,0xff,
- 0xfe,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0x77,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xaf,0x7f,0xde,0xbf,0xfd,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf7,
- 0xff,0x7f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xee,0x3f,0xff,0x1f,0xd7,
- 0xff,0xff,0xff,0x3e,0xdf,0xf7,0xff,0x7f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
- 0x7f,0x3f,0xcf,0xff,0x3c,0x7f,0x3f,0xff,0xff,0xff,0xff,0xff,0xf1,0x5a,0xff,0xf7,
- 0xff,0xff,0xfc,0xef,0xef,0xdf,0xff,0xff,0xff,0xff,0xff,0x9f,0xff,0xff,0xff,0x3f,
- 0xff,0xf9,0xff,0xcb,0xff,0xe7,0xff,0xf7,0xff,0xff,0xff,0xff,0xff,0xf5,0xe3,0xdf,
- 0xff,0xff,0xf2,0xbf,0xef,0xff,0xfb,0xff,0xf1,0xd6,0x75,0xfd,0x67,0x5f,0xd6,0x7d,
- 0x67,0x5d,0x57,0xfe,0xfe,0xe6,0xbf,0xfb,0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0xf6,
- 0x6f,0xff,0xff,0xff,0xd7,0xf7,0xff,0xff,0x7f,0xff,0x3f,0x7f,0xd3,0xf4,0xfb,0x3f,
- 0x7f,0xff,0xfb,0xbf,0x7f,0xff,0x7c,0xd7,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xf6,0xcf,0xff,0xff,0xff,0xff,0xff,0xbb,0x2f,0xef,0xff,0xff,0xfb,0x7c,0xdf,0xff,
- 0xd5,0xfb,0x7e,0xb7,0xf1,0xff,0xff,0xfb,0xf7,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xcd,0xbf,0xff,0xff,0xff,0xf7,0xdd,0xf5,0x7d,0xdf,0xf7,0xff,0xef,0xbb,
- 0xfa,0xfb,0xff,0xef,0xfe,0xfd,0xbf,0xaf,0x7d,0xdc,0xf7,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xde,0x1f,0xff,0xfd,0xfd,0x4b,0xfe,0xfe,0xb7,0xbe,0x7f,0x55,0xf1,
- 0x76,0xdd,0xf7,0xfd,0xf1,0xde,0x37,0x7d,0xff,0xff,0xed,0x0b,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xfe,0x17,0xff,0xff,0x1f,0xcd,0x7f,0x7f,0xd7,0xf7,0xef,0xfb,
- 0xff,0xff,0xff,0xff,0xff,0xfe,0xff,0xff,0xff,0xff,0xff,0xf7,0xe9,0x7f,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xea,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfe,
- 0xff,0xbb,0xfe,0xff,0xbb,0xee,0x7b,0xef,0xbb,0x6e,0xfb,0xbf,0xff,0xff,0xff,0xff,
- 0xff,0xef,0xff,0xff,0xff,0xff,0xff,0x7d,0xdf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xdf,0xff,0xfd,0xaf,0xef,0xdf,0xfd,0xbf,0x6b,0xd8,0xff,0xff,0xff,
- 0xff,0xff,0xfe,0xbf,0xff,0xff,0xff,0xff,0xfd,0xc0,0xff,0xfb,0xfe,0xff,0xbf,0xef,
- 0xfb,0x7e,0xff,0xb7,0x6f,0xdb,0xd6,0xf1,0xbb,0xef,0xde,0xed,0xbe,0x6f,0xfb,0xfe,
- 0xdf,0xbf,0x6f,0xfb,0xee,0xff,0xbf,0xef,0xfb,0xf7,0xe5,0x6f,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xdf,0xf7,0xfe,0xff,0xbf,0xef,0xf7,0xff,0x3f,0xcf,0xff,
- 0xff,0xff,0xff,0xcf,0xff,0xff,0xff,0xff,0xff,0xff,0xf6,0xf7,0xcf,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xbf,0xef,0x7b,0xde,0xef,0xbf,0xfb,0xbe,0xef,
- 0xbf,0xff,0xff,0xff,0xf7,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x7f,0xe9,0x7f,0xbf,
- 0xff,0xff,0xff,0xff,0xf5,0xfd,0x7f,0x5f,0xff,0xbf,0xff,0xff,0xff,0xff,0xbf,0xfb,
- 0xff,0xff,0xad,0xf9,0x7f,0x5f,0xf7,0xf5,0xff,0xff,0xff,0xff,0xff,0xff,0xe8,0x37,
- 0xff,0xff,0xff,0xff,0xff,0xfe,0x9f,0xa7,0xe9,0xff,0xaf,0xef,0xfa,0xfe,0xff,0xaf,
- 0xfa,0xfe,0x9f,0xaf,0x9d,0xa7,0xe9,0xfb,0x7e,0x9f,0xff,0xff,0xff,0xff,0xff,0xff,
- 0x27,0xff,0xff,0xff,0xff,0xff,0xff,0xd7,0xf5,0xe9,0x7f,0xff,0xff,0xff,0xef,0xfb,
- 0xfd,0xff,0xdf,0xff,0xff,0xf7,0xf5,0xfd,0x7f,0xdf,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xfe,0xff,0xff,0xf9,0xfe,0x7f,0x9f,0xe2,0xf8,0xbe,0x2f,0x9f,0xe7,0xf9,0xfe,
- 0x7f,0x9f,0xe7,0xfe,0x7f,0x9f,0xe6,0xf8,0xbe,0x2f,0x8f,0xe7,0xf9,0xfe,0x7f,0x9f,
- 0xe7,0xf9,0xfe,0x57,0xff,0xe7,0xff,0xff,0xff,0xff,0xff,0xfb,0xfe,0xff,0x9f,0xef,
- 0xfb,0xfe,0xff,0x9f,0xfb,0xfe,0xff,0xbf,0xcf,0xf9,0xff,0xff,0x7f,0x5f,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xeb,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x7f,0xff,0xff,
- 0xfd,0xff,0x7f,0xff,0xff,0xff,0x7f,0xdf,0xf7,0xfb,0xff,0xff,0xff,0xbf,0xeb,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xfb,0x7f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfb,
- 0xff,0xff,0xff,0xff,0xfb,0xff,0xfe,0xff,0xff,0xff,0xff,0x3f,0xff,0xff,0xfd,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0xaf,0xff,0xf7,0xff,0xff,0xff,0xff,0xf7,0xfd,
- 0xff,0x7f,0xf7,0xfd,0xff,0x7f,0xdf,0xf7,0xff,0x7f,0xdf,0xf7,0xe7,0xfd,0xff,0xfe,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf9,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
- 0x7c,0x8f,0xfb,0xfa,0xf2,0xff,0xbf,0x2f,0xfa,0xfc,0xbf,0xef,0xca,0xff,0xff,0xff,
- 0xff,0xfd,0xff,0xff,0xff,0xff,0xff,0xdf,0xef,0xf3,0x2f,0xff,0xeb,0xfa,0xfe,0x9f,
- 0xa7,0xeb,0xfa,0xde,0xbf,0xae,0xca,0xfa,0x6c,0x1f,0xaf,0x38,0xbe,0xbb,0xa3,0xe8,
- 0xfa,0x3e,0x9f,0xaf,0xeb,0x7a,0xbe,0xbf,0xab,0xeb,0xff,0x56,0x7f,0xf3,0xff,0xff,
- 0xfd,0xfb,0xff,0xfb,0xff,0x3e,0x57,0xfb,0xf5,0xdf,0xaf,0x7f,0xff,0xfd,0xff,0xff,
- 0xf7,0xff,0xff,0xff,0xff,0xfb,0xff,0xff,0xff,0xff,0xff,0xff,0xf0,0x7f,0xff,0xff,
- 0xff,0x7f,0xbf,0xf7,0xed,0xda,0xff,0x7f,0xdb,0xdf,0xff,0x37,0x7f,0xef,0xff,0xff,
- 0xbd,0xff,0xfd,0xf7,0xf8,0xbf,0xeb,0xff,0xff,0xff,0xdf,0xff,0xdd,0xfa,0x9f,0xff,
- 0x5f,0xff,0xff,0xff,0xef,0xfa,0xff,0x35,0xba,0xff,0xff,0xef,0xff,0xfb,0xba,0x7f,
- 0x6e,0xeb,0xbf,0xdb,0xfb,0xef,0xfb,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x8b,
- 0xff,0xff,0xff,0xef,0xfd,0xf7,0x69,0xfb,0xfe,0x5f,0xa7,0xcb,0xfa,0xf6,0xb5,0xa7,
- 0xfa,0xfe,0xbf,0xaf,0x3d,0xdf,0xb6,0x3f,0xfe,0xff,0xff,0xf7,0xff,0xff,0xff,0xff,
- 0xac,0x7f,0xf7,0xff,0xff,0xff,0xff,0xff,0x79,0xee,0xff,0x95,0xad,0x7d,0x5d,0xd5,
- 0xdd,0xf5,0xde,0xf6,0xfd,0xbf,0xff,0xff,0x5f,0xdf,0xf7,0xff,0xf7,0x7f,0xff,0xff,
- 0xff,0xfe,0x8f,0xff,0xfd,0xff,0xff,0xef,0xff,0x8e,0xf3,0x6c,0xff,0xb7,0xee,0x7b,
- 0xee,0xee,0xbb,0x8b,0xbb,0xf6,0xbf,0xce,0xff,0xff,0xfd,0xf7,0xfe,0xff,0x7f,0xff,
- 0xff,0xff,0xff,0x99,0xff,0x7f,0xff,0xff,0xff,0xff,0xf5,0xfd,0x7f,0x4f,0x9e,0xf6,
- 0xfd,0xff,0x6f,0xdb,0xf4,0x3f,0x4f,0xaf,0xfe,0xff,0xe7,0xef,0x7f,0xbf,0xff,0xff,
- 0xff,0xff,0xff,0x7f,0xfe,0x3f,0xff,0xff,0xff,0xfe,0xff,0xdf,0xfe,0xff,0xff,0x7e,
- 0x3f,0x95,0x65,0xd9,0x7e,0x3e,0xfe,0x7f,0xff,0xff,0xff,0xfd,0xff,0xff,0xff,0xff,
- 0xff,0x7f,0xff,0xff,0xff,0xff,0x25,0xff,0xff,0xff,0xdf,0xff,0xff,0xcc,0xc3,0x38,
- 0xf7,0x38,0x4f,0x73,0xdc,0xff,0xbd,0x9e,0xf8,0x3e,0xff,0xff,0x73,0xdf,0xff,0x3d,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0xff,
- 0xb7,0xef,0xbb,0x76,0xff,0xbf,0x9f,0xfd,0xfb,0xff,0xef,0xff,0xdf,0xfe,0xaf,0xff,
- 0xe6,0xff,0xbf,0xff,0xff,0xff,0xff,0xff,0xfc,0xd5,0xff,0xff,0xff,0xff,0xff,0xfb,
- 0x9f,0xa7,0xe8,0xde,0x77,0x8c,0xe5,0x9d,0xfb,0x63,0xf7,0xfd,0x1b,0xbe,0xda,0xff,
- 0xbe,0xef,0xff,0xf7,0x7f,0xff,0xff,0xff,0xff,0xff,0x21,0xff,0xff,0xdf,0xff,0xff,
- 0xfb,0xe9,0xea,0xfe,0xb7,0xaf,0xeb,0x72,0x7e,0xbf,0xaf,0xfe,0xe7,0xbf,0xfd,0xfb,
- 0xff,0xdf,0xe7,0xfd,0xff,0xff,0xff,0xff,0xff,0xff,0xbf,0xf0,0x7f,0xff,0xff,0xff,
- 0xbf,0xff,0xfd,0xdf,0x77,0xdf,0xf7,0xfd,0xff,0x7f,0xdf,0xf7,0xff,0x5e,0xd7,0xff,
- 0xfc,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xe3,0xff,0xff,
- 0xff,0xff,0x3f,0xd9,0xff,0x3f,0xff,0xff,0xff,0xff,0xff,0xff,0xf3,0xff,0xfc,0x7f,
- 0xff,0xcf,0xff,0xfc,0xfb,0x3f,0xcf,0xff,0x3f,0xff,0xfe,0xff,0xff,0xff,0x31,0xaf,
- 0xff,0xff,0xff,0xf6,0xbf,0x3f,0xe7,0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0xbf,0x9f,
- 0xef,0x7e,0xbd,0xff,0xff,0xdf,0x77,0xcb,0xff,0xbf,0xff,0xff,0xdf,0xff,0xff,0x5a,
- 0x3d,0xff,0xff,0xff,0xff,0xff,0xc7,0x79,0xdf,0xf7,0x9d,0xf3,0x7f,0xde,0x75,0xfd,
- 0x75,0xbb,0x3f,0x1f,0xf3,0xf5,0x2f,0xef,0x7e,0xe6,0xbf,0xff,0xff,0xfb,0xff,0xff,
- 0xef,0xa6,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x3f,0xe7,0xf3,0xfe,0x7f,0x3f,0xcf,
- 0xf3,0xef,0xf7,0xcd,0xff,0x7e,0x77,0xb5,0xfd,0xff,0x7e,0x57,0xff,0xff,0xff,0x7f,
- 0xff,0xff,0x6c,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xdf,0xfb,0x7e,0xdf,0xff,0xf5,
- 0xfd,0x7b,0x5f,0x57,0xbf,0xff,0xf9,0xf7,0x71,0xff,0xbf,0xfb,0xff,0xff,0xff,0xff,
- 0xef,0xff,0xff,0x7f,0x9b,0xff,0xff,0xff,0xff,0xff,0xdf,0xfb,0xff,0xef,0xfb,0xff,
- 0xff,0xbf,0xef,0xdb,0xee,0xdd,0xa7,0x6b,0x38,0xef,0xbd,0xf7,0x7d,0xdf,0xf7,0xff,
- 0xff,0xfd,0xdf,0xff,0xfd,0x89,0xff,0xff,0xff,0xff,0xff,0xff,0x77,0xfd,0xfb,0x7e,
- 0xdf,0xf7,0xcd,0xfb,0x7d,0xdf,0xba,0xfe,0xbf,0xff,0xff,0xea,0xde,0xff,0xef,0xeb,
- 0xdf,0xff,0xff,0xbf,0xff,0xff,0xe2,0x7f,0xff,0xff,0xff,0xff,0xff,0xe3,0xff,0xff,
- 0xff,0xff,0xff,0xfd,0xfc,0xff,0x8f,0xff,0x7e,0xd7,0xff,0xeb,0xff,0x5f,0xdf,0xf7,
- 0xfd,0x79,0xff,0xff,0xf7,0xff,0xff,0xf7,0xef,0xff,0xff,0xff,0xff,0xff,0xff,0xee,
- 0x7b,0xfe,0xff,0xbf,0xef,0xfb,0xbe,0xe7,0xbf,0xff,0xaf,0xff,0xdf,0xf7,0xff,0xff,
- 0xff,0xf9,0xff,0xbf,0xff,0xff,0xff,0xff,0xfe,0xed,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xe7,0xdf,0xf6,0xfd,0xff,0x7f,0xda,0xf6,0xff,0xff,0xfe,0xfe,0xff,0xff,0xe7,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfb,0x1f,0xff,0xbf,0xef,0xfb,
- 0xfe,0xdd,0xbf,0xef,0xdb,0xee,0xfd,0xbd,0x6f,0x1b,0xbe,0xfd,0xef,0xfb,0xe6,0x5f,
- 0x9f,0xef,0xfb,0xfe,0xdf,0xbf,0xef,0xfb,0xfe,0xdf,0xbf,0xfe,0x66,0xff,0xff,0xff,
- 0xff,0xff,0xff,0x7f,0xff,0xf7,0xff,0xfd,0xff,0xef,0xfb,0xfe,0xff,0x3f,0xfb,0xf7,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x72,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xfe,0xff,0xbf,0xef,0xfb,0xfe,0xf7,0xbd,0xef,0xbb,0xdf,0xfe,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x97,
- 0xff,0xff,0xff,0xf5,0xff,0xff,0xff,0xff,0xff,0xff,0xfb,0xff,0xff,0xff,0xff,0xff,
- 0xf7,0xf5,0xff,0x9f,0xef,0xd7,0xfd,0xed,0x7f,0x5f,0xff,0xff,0xff,0xff,0xff,0xfe,
- 0xcb,0xff,0xff,0xff,0xfe,0x9f,0xff,0x7e,0xff,0xaf,0xeb,0xfa,0xfe,0xbf,0xaf,0xeb,
- 0xfb,0xfa,0x7e,0x9f,0xff,0xff,0xfa,0x7f,0x9f,0x27,0xe9,0xdf,0xff,0xff,0xff,0xff,
- 0xff,0xfc,0x7f,0xff,0xff,0xff,0xd7,0xff,0xdf,0xfb,0xff,0xff,0xff,0xff,0xff,0xfc,
- 0xff,0x7f,0xef,0xde,0xb7,0xbf,0xff,0x7a,0x5f,0xb7,0xff,0xfd,0x7f,0xff,0xff,0xff,
- 0xff,0xff,0xff,0x6f,0xff,0xff,0x9f,0xe2,0xf9,0xfe,0x7f,0x9f,0xe7,0xf9,0xfe,0x7f,
- 0x9f,0xe7,0xf9,0xfe,0x6f,0xe7,0xf9,0xde,0x6f,0x0b,0xe6,0xe9,0xfe,0x2f,0x9f,0xe7,
- 0xf9,0xfe,0x7f,0x9f,0xd5,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf9,
- 0xfe,0x7f,0x9f,0xef,0xfb,0xff,0x1f,0xcf,0xd9,0xf5,0xfb,0xbf,0xdf,0xd3,0xfe,0x7f,
- 0xff,0xff,0xff,0xff,0xff,0xfe,0x3f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xfd,0xff,0x7f,0xef,0xfd,0xfe,0xfe,0xbf,0xf7,0xfb,0xaa,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x17,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xef,0xff,0x7f,0x7f,0xff,0xbf,0xff,0x7f,
- 0xef,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xee,0xff,0xff,0xff,0xff,0xff,0xfd,0xff,
- 0xdf,0xf7,0xfd,0xff,0x7f,0xdf,0xf7,0xfd,0xff,0x7f,0xdf,0xf7,0xf9,0xff,0xf7,0xdf,
- 0xe6,0xfd,0xff,0x7f,0xdf,0xff,0xff,0xff,0xff,0xfc,0xdf,0xff,0xff,0xff,0xff,0xbf,
- 0xef,0xab,0xeb,0xfa,0xfe,0xbf,0xaf,0xe9,0xfa,0xfe,0xaf,0xdb,0xd7,0xf5,0xff,0x2f,
- 0xff,0xfa,0xff,0xff,0xff,0xff,0xff,0xfc,0x9f,0xff,0xff,0xba,0xff,0xfe,0xbf,0xaf,
- 0xe9,0xfa,0x7e,0x0f,0xa3,0xe8,0xfa,0xfe,0xb7,0xab,0xeb,0xfa,0xf7,0xaf,0x63,0xfa,
- 0x76,0xaf,0xab,0xea,0xfa,0xbe,0xbf,0xab,0xea,0xfa,0xfe,0xbf,0x5f,0x7f,0xef,0xed,
- 0xff,0xf3,0xef,0x7f,0xff,0xfb,0xfd,0xff,0xdf,0xef,0xf5,0xff,0x6f,0x7f,0x3f,0xff,
- 0xba,0xff,0x33,0xcf,0xf3,0x7d,0xbf,0xdc,0xff,0xff,0xfb,0xff,0xff,0xde,0xa7,0xff,
- 0xff,0xdf,0xb2,0xff,0xfa,0xff,0xff,0xf7,0x7d,0xff,0x7d,0xbf,0x77,0xff,0xf7,0x7e,
- 0xdf,0xf4,0xdf,0x5e,0xcf,0xff,0xfd,0xff,0xff,0x7f,0x7f,0xfd,0xff,0xff,0x7f,0x85,
- 0x5f,0xff,0xff,0xff,0xff,0xfe,0xff,0xbb,0xff,0xff,0xfe,0xef,0xfb,0xfe,0xff,0xbb,
- 0xf3,0xaf,0xff,0xfb,0x6b,0xfa,0xfe,0x5f,0xb7,0xef,0xdb,0xff,0xff,0xff,0xff,0xff,
- 0xfd,0x3f,0xff,0xfd,0xf7,0xf8,0xd7,0x76,0x9d,0xa6,0x4b,0xda,0x76,0x9d,0xa7,0x69,
- 0xda,0xdb,0xbf,0xad,0xfa,0xfe,0xb7,0xa7,0x7d,0xff,0x7e,0x3f,0xff,0x3f,0xff,0xff,
- 0xff,0xff,0xc7,0xff,0x7f,0xff,0xf5,0xdf,0xff,0xa7,0xd9,0xfe,0x7e,0x9f,0x67,0xd9,
- 0xf6,0x7f,0x9f,0xde,0xbf,0x7f,0xeb,0x7b,0x7e,0x57,0xfd,0xff,0x5f,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xfa,0xff,0xff,0xff,0xff,0xfe,0xff,0xfe,0xef,0xab,0xef,0xfa,0xfe,
- 0x3f,0xbf,0xef,0xfe,0xfb,0xb9,0xe9,0xa8,0xfa,0xfe,0xbf,0xee,0xfb,0xfe,0xff,0xfb,
- 0xef,0xff,0x7f,0xff,0xed,0x9f,0xef,0xfd,0xfb,0xde,0x7d,0x3f,0x6f,0xdb,0xe6,0xfd,
- 0xbf,0x7f,0xdb,0xd6,0xf9,0x3d,0x6b,0xfb,0xfe,0xff,0xbb,0xee,0xfa,0xfe,0xbf,0xb7,
- 0xfb,0xf5,0xff,0xff,0xff,0xff,0xbb,0xbf,0xff,0xff,0xfb,0xfb,0xfd,0xf9,0x9e,0x77,
- 0x9f,0xe3,0xf9,0xde,0x57,0x9d,0xfe,0xef,0xef,0xf6,0xff,0x5f,0xdf,0x9f,0xff,0x7f,
- 0x7f,0xff,0xf7,0xdf,0xff,0xff,0xff,0xf3,0x7f,0xff,0xff,0x7c,0xcd,0xff,0xfd,0xf7,
- 0xf8,0xd7,0xf1,0x9f,0xe7,0x1f,0xc7,0xfe,0xf5,0x3f,0xcf,0x71,0xdc,0x36,0x3d,0x8f,
- 0xff,0xdf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x8f,0xff,0xff,0xef,0xfa,0xff,0xff,
- 0xbd,0xff,0xff,0xd7,0xbf,0xff,0xfd,0xfe,0xfb,0xff,0xbb,0x5e,0xff,0xdf,0xf7,0xfb,
- 0xfe,0xff,0xf7,0xfb,0xff,0xff,0xff,0xff,0xff,0xff,0xc1,0xff,0xff,0xff,0xff,0xff,
- 0xf7,0xfd,0x7f,0x36,0xdd,0xf7,0x3c,0xcf,0x7b,0xda,0xff,0xfa,0x7e,0x9c,0xb3,0x3d,
- 0xbe,0x7d,0x9f,0xf7,0xed,0xff,0xff,0xff,0xff,0xff,0xff,0xfd,0x9f,0xff,0xff,0xff,
- 0xfe,0x7a,0x5e,0xbf,0x2f,0xeb,0xaa,0xdc,0xbf,0xae,0xab,0xff,0xff,0xaf,0xab,0x7a,
- 0xdc,0xbf,0xad,0xeb,0x7a,0xfe,0xb7,0xff,0xff,0xff,0xff,0xff,0xfa,0x67,0xdf,0xff,
- 0xff,0xff,0xff,0x7f,0xdf,0xf7,0xfd,0xf7,0x77,0xdf,0xf7,0xfd,0xff,0xff,0xf7,0xf9,
- 0xdf,0x7f,0xdf,0x77,0xfd,0xff,0x7f,0xdf,0xef,0xbf,0xff,0xff,0xff,0xff,0xe8,0xbf,
- 0xff,0xff,0xff,0xfe,0x7f,0xff,0xdf,0xfc,0xfd,0xff,0xd7,0xff,0xff,0xff,0xed,0x9f,
- 0xf7,0xff,0xff,0xff,0xdf,0xff,0xfd,0xff,0x9f,0xff,0xff,0xff,0xfd,0xff,0xff,0xf1,
- 0xca,0xff,0xff,0xff,0xff,0xab,0xff,0xff,0xff,0x9f,0xff,0xf9,0xfe,0x7f,0xff,0xfd,
- 0xe3,0xff,0xff,0xcf,0xf3,0xff,0xff,0xff,0xff,0xfa,0xff,0xce,0xff,0xff,0xff,0xff,
- 0xf5,0xab,0xdf,0xff,0xff,0xff,0xfc,0xd6,0x75,0x9d,0x7f,0x59,0xd7,0x35,0xfd,0xe7,
- 0x79,0xaf,0x5d,0xf5,0x7c,0xd7,0x55,0xd5,0xff,0x7d,0x57,0xf5,0xfe,0xff,0xff,0xff,
- 0xff,0xfe,0xf0,0x6f,0xff,0xff,0xff,0xff,0x9f,0x7f,0xd3,0xfe,0xfb,0x3f,0xe7,0xf9,
- 0xfc,0xff,0x35,0xe7,0xfe,0x7f,0xbe,0xe7,0xbb,0xfe,0xff,0x3f,0x6f,0xbf,0x7f,0xff,
- 0xff,0xff,0xff,0xf7,0x47,0xff,0xff,0xff,0xff,0xff,0xf5,0x7f,0xde,0xe7,0xd5,0xe3,
- 0x7a,0xdf,0xff,0xfc,0xbf,0x7f,0xff,0xf9,0xff,0x7c,0x9f,0xef,0xcd,0xf6,0x7f,0xfb,
- 0xf2,0xff,0xff,0xff,0xff,0xd1,0xbf,0xff,0xff,0xff,0xf7,0xfe,0xff,0xe3,0xf4,0xfa,
- 0xbe,0xff,0xff,0xfe,0xfd,0x1d,0x4f,0xfa,0xfd,0x3f,0x4f,0xab,0xfa,0xfb,0xbe,0x4f,
- 0xe9,0xdc,0x57,0xff,0xff,0xff,0xd8,0x9f,0xff,0xff,0xff,0xff,0xfd,0xff,0x7f,0xdf,
- 0x77,0xfd,0xf7,0x7d,0xdf,0xb7,0xd2,0xf7,0xdf,0xf7,0x7d,0xff,0x7f,0xdf,0xf7,0xc5,
- 0xf7,0x77,0xef,0xab,0xff,0xf5,0xfd,0x7e,0xe6,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xe7,0xff,0xfe,0x7f,0x1f,0xff,0xf3,0x5e,0x7f,0xff,0xfa,0xff,0xff,0xff,0xeb,
- 0xfb,0xfe,0x7f,0xf7,0xfd,0x7f,0xff,0xff,0xff,0xe6,0x5f,0xff,0xff,0xff,0xff,0xfb,
- 0x9e,0xe7,0xbe,0xee,0xdb,0xee,0xff,0xbb,0xee,0x7f,0xef,0xbf,0xee,0xfb,0xbe,0xef,
- 0xb9,0xef,0xbb,0xee,0xff,0xff,0xff,0xff,0xff,0xff,0x7f,0x1b,0xff,0xff,0xff,0xff,
- 0xff,0xf9,0xf6,0x7d,0xff,0xef,0xff,0xf7,0xfd,0xaf,0x6f,0xf9,0xfd,0xff,0x6b,0xd8,
- 0xfe,0x3d,0xff,0xef,0xff,0xf6,0xff,0xff,0xff,0xff,0xff,0xff,0xb1,0xff,0xfb,0xfe,
- 0xff,0xbf,0x6f,0xdb,0xfe,0xfd,0xbb,0x6f,0xdb,0xd6,0xf1,0xbb,0x6f,0xfe,0xfd,0xbe,
- 0x6f,0xdb,0xf6,0xfd,0xbe,0x6f,0xdb,0xee,0xff,0xbf,0xef,0xfb,0xff,0xe5,0x6f,0xff,
- 0xff,0xff,0xff,0xdf,0xf7,0xff,0xff,0x7f,0x6f,0xdf,0xfe,0xff,0xbf,0x6f,0xff,0xff,
- 0x3f,0xcf,0xdb,0xfd,0xfd,0xff,0xdf,0xf7,0xff,0xff,0xff,0xff,0xff,0xff,0xf6,0x8f,
- 0xff,0xff,0xff,0xff,0xff,0xbf,0xef,0xfb,0xfe,0xf7,0xbf,0xef,0x7b,0xde,0xfb,0xff,
- 0xfb,0xbe,0xef,0xbb,0xef,0xfb,0xfe,0xff,0xbf,0xef,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xfd,0xff,0xf5,0xff,0xff,0x5f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xef,0xff,0xff,
- 0xd7,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0xff,0xff,0xff,0xff,0xff,0xff,0xbf,
- 0xff,0xeb,0xbf,0xfc,0x9f,0xff,0xe9,0xff,0xbf,0xeb,0xfa,0x7e,0xff,0xbf,0xeb,0xfa,
- 0x7e,0xba,0x7f,0xfa,0xfe,0x9f,0xaf,0xed,0xfa,0xfe,0xff,0xbf,0xeb,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xb3,0xff,0xd7,0xff,0xfd,0x7f,0xfd,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xf7,0xdd,0xff,0xef,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xfd,0xf8,0xff,0xfa,0xf9,0xfe,0x2f,0x9f,0xe7,0xf9,0xfe,0x7f,0x9f,
- 0xe7,0xf9,0xfe,0x7f,0x8b,0xc7,0xfe,0x7f,0x9f,0xe7,0xf9,0xfe,0x7f,0x9f,0xc7,0xf9,
- 0xfe,0x7f,0x1f,0xe7,0xf9,0xff,0x9f,0xff,0xff,0xfb,0xfe,0xff,0xff,0xef,0xfb,0xfe,
- 0xff,0xbf,0xff,0xff,0xfe,0x7d,0x7a,0xff,0xfe,0x7f,0xbf,0xef,0xf9,0xfe,0x7f,0x9e,
- 0xef,0xff,0xff,0xeb,0xff,0xe7,0xff,0x83,0xff,0xff,0xff,0x7f,0xdf,0xff,0xfd,0xff,
- 0xff,0xdf,0xf7,0xff,0xff,0xff,0xff,0xaf,0xff,0xff,0xff,0xf7,0xfd,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfb,0x7f,0xbf,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xef,0xff,0xff,0xff,0xff,0xff,0xff,0xfd,0xfe,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xef,0xbf,0xff,0xff,0xff,0xff,0xff,0xff,0xef,0xff,0xff,0xfd,0xff,0x7f,
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- 0xbf,0x3f,0xfb,0xff,0xff,0xff,0xff,0xfe,0xff,0xf6,0xff,0xfb,0xc7,0xb7,0xff,0xfb,
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- 0xaf,0xbf,0xfb,0xff,0xff,0xf7,0xfb,0xff,0xdf,0xff,0xfc,0x1f,0xff,0x3f,0xff,0x7f,
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- 0xa7,0xf9,0xfe,0xff,0xbf,0x7f,0xdb,0xfe,0xff,0x8f,0xfb,0xff,0xff,0xff,0xff,0xac,
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- 0xbf,0xff,0xfe,0xff,0xef,0xfd,0xff,0xdf,0xff,0xfe,0xff,0xff,0xc1,0x76,0xff,0x7c,
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- 0xff,0xef,0xd0,0x7f,0x3f,0xff,0xb3,0xff,0xef,0xff,0xff,0xff,0xff,0xfc,0x3e,0xff,
- 0xff,0xdc,0xe7,0xdf,0xef,0x7d,0xf7,0x77,0xed,0xf7,0x79,0xdf,0xf7,0xfb,0xff,0xdf,
- 0xf7,0xdf,0xff,0xff,0xde,0x0d,0xff,0xfd,0xbf,0xff,0xff,0xff,0xff,0xff,0xff,0x07,
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- 0xfd,0xff,0x3f,0x2e,0x7f,0xdf,0xff,0xbf,0xd7,0xf7,0xf2,0xff,0xef,0xff,0xff,0xff,
- 0xff,0xdb,0x97,0xff,0xff,0xff,0xfb,0xfe,0xff,0xd3,0xff,0xff,0xff,0x7f,0xff,0xef,
- 0xf5,0x7d,0xff,0xef,0xff,0xff,0xff,0xff,0xd7,0xff,0xff,0xff,0xfb,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xa8,0xff,0xfd,0xfb,0xff,0xdd,0x73,0xff,0x1f,0x35,0xcf,0xbf,0xff,
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- 0xdf,0xff,0xff,0xff,0xc4,0x4b,0xfc,0xff,0xbf,0xff,0xa7,0xfd,0xff,0xff,0xe7,0xf7,
- 0xfc,0xf3,0x3f,0xf5,0x9e,0xff,0xff,0xff,0x91,0xff,0xff,0x9f,0xfb,0xff,0xff,0x39,
- 0x7f,0xff,0xff,0xff,0xff,0xd7,0x4d,0x7f,0xef,0xeb,0xd7,0xc7,0xef,0xae,0x7e,0x1e,
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- 0xfd,0xef,0xff,0xff,0xff,0xff,0xfb,0xed,0xbf,0xf7,0xcd,0x7b,0xff,0xff,0xf5,0xff,
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- 0xff,0xbe,0xdd,0xfb,0xfe,0xbf,0xa7,0xfd,0xff,0x7f,0xa5,0xff,0xfa,0xff,0xff,0xff,
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- 0x9f,0xe3,0xff,0xff,0xff,0x9f,0xfe,0xff,0xfd,0x5f,0xff,0xff,0xf9,0x93,0xff,0x7e,
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- 0xe7,0xe6,0x7d,0xbf,0xef,0xf9,0xfe,0xbf,0xbf,0xff,0xfb,0xff,0xff,0xff,0xff,0xff,
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- 0xff,0xff,0xff,0xfd,0xff,0x57,0xfe,0xff,0xfd,0xff,0x7f,0xff,0xdf,0xbf,0xff,0xdf,
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- 0xff,0x7e,0xfd,0x77,0x5f,0xff,0xb5,0x6f,0xff,0x9d,0xbd,0xfd,0x7f,0xff,0xf7,0xff,
- 0xed,0x7f,0x7e,0xff,0xff,0xff,0xff,0xff,0xff,0xe3,0xfe,0xff,0xe7,0xf9,0xfe,0x7f,
- 0x1f,0xe7,0xf9,0xfe,0x6f,0x8b,0xe7,0x78,0xfe,0x7f,0x9f,0xf9,0xbe,0x2f,0x9f,0xe6,
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- 0x1f,0x4f,0xff,0xfc,0xfd,0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0x0f,0xff,0xff,0xff,
- 0xff,0x7f,0xbf,0xef,0xe9,0xff,0xff,0xbf,0xaf,0xfb,0xfa,0xff,0xff,0xff,0xfe,0xfe,
- 0xbf,0xaf,0xe9,0xff,0xfe,0xbf,0xbf,0xff,0xff,0xff,0xff,0xff,0xff,0xc4,0xff,0xfe,
- 0xff,0xff,0xff,0xff,0xbd,0xff,0x7f,0x7f,0xf7,0xfd,0xff,0xff,0x5f,0xdf,0xfb,0xff,
- 0xcf,0xdf,0xff,0xff,0x7f,0xff,0xf3,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf8,0xbf,
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- 0xfd,0xff,0x7e,0x7f,0xdf,0xe7,0xef,0xfa,0x7e,0xff,0xf7,0xff,0xff,0xff,0xff,0xff,
- 0x77,0xff,0xff,0xf4,0xfd,0x3f,0xcf,0xda,0xf7,0xff,0x3d,0x7f,0xdb,0xf2,0x7d,0xff,
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- 0xdf,0x77,0xff,0xba,0xfe,0xdf,0xfc,0xff,0xff,0xff,0xef,0xff,0x7b,0xae,0xbf,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xea,0x5b,0xbd,0x5f,0xff,0xfe,0xff,0xfb,0xff,0xfd,0xff,
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- 0xef,0xff,0xff,0xff,0xff,0xff,0xfe,0xef,0xff,0xff,0xef,0xfb,0x7c,0xd9,0xa7,0xcf,
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- 0xcf,0xff,0xff,0xff,0xff,0xff,0xfd,0x44,0xf7,0xfe,0xf4,0xbd,0x7d,0xeb,0xd2,0xfe,
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- 0xe3,0xf8,0xbe,0x2f,0x8f,0xe7,0xf9,0xbe,0x37,0x8f,0xe2,0x79,0xff,0x9f,0xe7,0xf8,
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- 0xff,0xbf,0xdf,0xf7,0xf4,0xff,0xff,0xff,0xd3,0xfe,0xfd,0x7f,0xc7,0xfe,0xff,0xff,
- 0x7f,0xf3,0xfd,0xff,0xff,0x5f,0xdf,0xf5,0xff,0xff,0xff,0xff,0xff,0xe6,0xff,0xfa,
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- 0xff,0xff,0xfb,0xfe,0xbf,0xff,0xeb,0xfb,0xfe,0xbf,0xff,0xff,0xff,0xff,0xfd,0xcf,
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- 0x9f,0xff,0xff,0xff,0xcf,0xf7,0xf7,0xff,0x7f,0xff,0xf7,0xff,0xff,0xff,0xff,0xff,
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- 0xed,0xff,0x7f,0xf7,0xf7,0xef,0x7b,0xdf,0xff,0xb7,0xff,0x7a,0xff,0xff,0xff,0xff,
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- 0xff,0xf6,0xff,0x67,0xfe,0xf7,0xff,0xff,0x2e,0xdf,0xff,0xff,0xbf,0xf7,0xff,0xff,
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- 0xf6,0xb7,0xab,0xe9,0xde,0xbf,0xaf,0xeb,0xf8,0xae,0x3b,0xaf,0xeb,0x7a,0xfe,0xbf,
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- 0x7f,0xff,0x7f,0xfd,0xcd,0x6c,0xdf,0xff,0xef,0xfc,0xbf,0xfb,0xff,0xff,0xf7,0xff,
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- 0xf7,0xff,0xfe,0xef,0xff,0xf7,0xff,0xff,0xde,0xb7,0xf7,0x2f,0xff,0xff,0x77,0xfb,
- 0xff,0x3f,0xff,0xff,0xfd,0xff,0x7e,0x37,0xbf,0xff,0xff,0x7f,0xdf,0xff,0xfd,0xff,
- 0xff,0xef,0xbf,0xff,0xbf,0xef,0xef,0xff,0xde,0xeb,0xfb,0xe5,0xff,0xff,0xfb,0xdb,
- 0xf7,0xff,0xbd,0xff,0xff,0xff,0xff,0xff,0xe4,0x1f,0xff,0xf7,0xff,0xaf,0xeb,0xb8,
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- 0xbf,0xeb,0xfb,0xfe,0xbc,0xff,0xff,0xff,0xff,0xfe,0x9f,0xff,0xff,0xff,0xfa,0xfd,
- 0x77,0xbf,0xdf,0xdf,0xff,0xed,0xff,0xff,0x67,0xff,0xf7,0xfb,0x7e,0xfe,0x77,0xf9,
- 0xef,0xde,0x5f,0x75,0xef,0xb7,0xff,0xff,0xff,0xff,0xbd,0x99,0xfe,0xff,0xbc,0xfb,
- 0x3e,0xef,0xbf,0xfc,0x7e,0xfb,0xff,0xff,0xbf,0xff,0x3b,0xbf,0x8f,0xff,0xfe,0xcf,
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- 0x7b,0xd7,0xd3,0xff,0xbf,0x5f,0xfd,0xff,0xdf,0xff,0x7e,0xff,0xff,0xfd,0x7f,0xfe,
- 0xe7,0xfd,0xdf,0x6f,0xc7,0xfe,0xff,0xff,0x3f,0xff,0xff,0xff,0xff,0xfe,0x0d,0xff,
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- 0xff,0xff,0xbf,0xe7,0xee,0xff,0xff,0xfd,0xfd,0xbb,0xff,0xff,0xff,0xff,0xff,0xc5,
- 0xde,0xef,0xff,0xff,0xff,0xff,0xbf,0xfc,0xf7,0xff,0xcf,0xe3,0x7f,0xff,0x3f,0xcf,
- 0xf4,0xfd,0x3f,0xfd,0xff,0xbc,0xff,0xff,0xef,0x67,0xf0,0xff,0xff,0xff,0xff,0xff,
- 0xfa,0xbb,0xff,0xff,0xff,0xff,0xdf,0xff,0xff,0xdf,0xff,0xfd,0xdf,0x7f,0xfb,0xf6,
- 0xbd,0xfe,0xdf,0xeb,0xef,0xdd,0xfe,0x5f,0x7f,0xfd,0xfc,0xff,0xdf,0xff,0xff,0xff,
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- 0xdc,0x7b,0x8c,0xa9,0xdf,0x6f,0xdb,0xf7,0xfb,0xdf,0x7a,0x5f,0xd7,0xf1,0xff,0xff,
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- 0xef,0x3f,0xee,0xdf,0xbf,0xf7,0xcd,0xfb,0xbe,0xff,0xff,0x0e,0xdb,0xfe,0xbf,0xbf,
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- 0xff,0xff,0xf7,0xfd,0xfd,0xdf,0x9f,0xfd,0x7c,0xff,0x57,0xfd,0xff,0xff,0x77,0xbf,
- 0xf7,0xff,0xff,0xff,0xff,0xbf,0xc2,0xff,0xef,0xd7,0x1f,0xff,0xff,0x3c,0xff,0xe7,
- 0xcf,0xff,0xff,0xff,0x3e,0xff,0xb7,0xfb,0xdf,0xff,0xf3,0xef,0xff,0xff,0xff,0xbf,
- 0x3f,0xfb,0xdf,0xff,0xff,0xff,0xff,0xca,0x2e,0xfd,0xf9,0xfb,0xff,0xff,0xbf,0xdf,
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- 0xaf,0x5b,0xfe,0xdf,0xff,0xff,0x3f,0xca,0xfe,0xfc,0xff,0xff,0xff,0xbf,0xaf,0xff,
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- 0xe7,0xf3,0xfe,0xc7,0x3a,0xfd,0xff,0xff,0xff,0xff,0xff,0xd8,0x9f,0xfe,0xfe,0xff,
- 0xdf,0xa6,0xf5,0xdf,0xae,0xd9,0xff,0xdf,0xf7,0xf6,0x89,0x73,0x7f,0xbf,0xff,0xfb,
- 0xfe,0x9f,0x75,0xfb,0xa2,0x3e,0xdf,0xac,0xdf,0xff,0xff,0xff,0xff,0x22,0xdf,0xdd,
- 0xff,0x53,0xd6,0xf5,0xbd,0xf5,0xf9,0xdf,0xff,0xff,0xfd,0xe9,0x78,0x7f,0xf7,0xff,
- 0xff,0x77,0xd3,0xde,0x1b,0xd6,0x77,0x9d,0xf7,0xbf,0xff,0xff,0xff,0xff,0x6c,0x7f,
- 0xfb,0xff,0xff,0xff,0xff,0xfa,0xfe,0xbe,0xef,0xff,0xff,0xe7,0xff,0xaf,0xef,0xd6,
- 0xf7,0xff,0xfb,0xfa,0xff,0xff,0xff,0xeb,0xca,0xfe,0xbf,0xff,0xff,0xff,0xff,0xf9,
- 0x4f,0xff,0x7f,0xdf,0xf7,0xff,0xff,0x4f,0xd7,0xf6,0xff,0xdf,0xf7,0xff,0xf5,0x7d,
- 0xff,0xdf,0xff,0xff,0x7f,0x4f,0xdb,0xff,0xfd,0x31,0x4f,0xdf,0xff,0xff,0xff,0xff,
- 0xff,0xb3,0xff,0xff,0xff,0xe7,0xfb,0x7e,0xfd,0xb7,0xcd,0xd9,0xf5,0xfd,0x7f,0xed,
- 0xf3,0x77,0xff,0xcd,0xfb,0xff,0xfd,0xff,0x5f,0xff,0xf6,0xfd,0xb7,0xdf,0xff,0xff,
- 0xff,0xff,0xf3,0x7f,0xff,0xff,0xff,0xff,0xbf,0xeb,0xbf,0xf6,0x7b,0xfe,0x7f,0x9f,
- 0xff,0xfe,0xbe,0x6f,0xf2,0xff,0xaf,0xef,0xfb,0xf6,0x7f,0xbf,0xfb,0xfb,0xff,0xff,
- 0xff,0xff,0xff,0xff,0x67,0xff,0xed,0xfb,0xf6,0xf9,0xbb,0x67,0xfb,0xfe,0x7f,0x9f,
- 0xe7,0xfb,0xd6,0xfb,0x8e,0xfb,0xe6,0xed,0xbe,0x67,0x18,0xf6,0xed,0x9f,0xe6,0xfb,
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- 0xfe,0xff,0xbf,0xff,0xff,0xfe,0xff,0xe6,0xfd,0xff,0x7f,0xff,0xe6,0xff,0x3f,0xef,
- 0xfb,0xef,0xff,0xff,0xff,0xff,0xdc,0xbf,0xff,0xfd,0xff,0xbf,0xdf,0xfb,0xfb,0xff,
- 0xff,0xff,0xbf,0xef,0xff,0xff,0xff,0xff,0xff,0x7f,0xff,0xff,0xff,0xff,0xbf,0xef,
- 0xfb,0xfe,0xff,0xff,0xff,0xff,0xff,0xff,0xa7,0xff,0xff,0xed,0xff,0x7f,0xff,0xd1,
- 0xf7,0xfd,0x1f,0xee,0xf9,0xfe,0xff,0x3f,0xcf,0xe7,0xff,0x7f,0x7f,0xd3,0xb4,0xff,
- 0xff,0xc7,0xf1,0xb7,0xff,0xff,0xff,0xff,0xff,0xae,0xff,0xff,0xff,0xdf,0xf7,0xdd,
- 0xf2,0xff,0xab,0xaf,0xfe,0xff,0xbf,0xff,0xeb,0xfa,0xfe,0xe9,0xf7,0xfd,0xfa,0xfc,
- 0x8f,0xf7,0xfb,0xfe,0xfe,0xef,0xff,0xff,0xff,0xff,0xfc,0x9f,0xff,0xff,0xff,0xef,
- 0xff,0xff,0x5f,0xd7,0xf5,0xff,0xf7,0xff,0xf7,0xf5,0xff,0x7b,0xbf,0xff,0xff,0xf7,
- 0x5f,0xf7,0xef,0xff,0x3f,0xcf,0xd7,0xff,0xff,0xff,0xff,0xff,0xd1,0xff,0xff,0xe7,
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- 0xfb,0xf7,0xfd,0x7f,0x5f,0xff,0xfd,0xff,0x7f,0xff,0xff,0xff,0xff,0xff,0xfe,0xcf,
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- 0xef,0xff,0x7f,0xbf,0xaf,0xeb,0xfe,0xff,0xbf,0xef,0xff,0xff,0xff,0xff,0xff,0xff,
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- 0xff,0xff,0xff,0x77,0xff,0xeb,0xb6,0xff,0xfb,0x77,0xff,0xff,0xff,0xdf,0xff,0xff,
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- 0x7f,0xff,0xff,0xff,0xff,0xff,0xff,0xd1,0x7d,0xdf,0xff,0xfd,0xff,0xff,0xbf,0xdf,
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- 0xbf,0x8d,0xfd,0xfe,0xff,0xff,0xff,0xff,0xff,0xff,0xee,0xef,0xba,0xfe,0x3f,0x9f,
- 0xff,0xe8,0xff,0xbf,0xbf,0xe3,0xdf,0xff,0xff,0xff,0xff,0xdd,0xff,0xff,0xf5,0x7f,
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- 0xbf,0xff,0x2f,0xc3,0xeb,0xbf,0xe3,0x3b,0xce,0xff,0xff,0xef,0xff,0xff,0xd7,0xff,
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- 0xdb,0xbf,0xe9,0x3e,0xdf,0xff,0xfd,0xed,0xff,0xfb,0xdf,0xef,0xff,0xff,0xff,0xff,
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- 0xdf,0xf7,0xdf,0xed,0xff,0xef,0xae,0xff,0x7d,0xfb,0x7f,0xf7,0xdf,0xfd,0xff,0xff,
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- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0x8f,0xff,0xff,0xff,0xff,0xff,0xfe,0xf9,
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- 0xff,0xfe,0xff,0xff,0xff,0xff,0xff,0xff,0xfc,0x36,0xbf,0xff,0xf7,0xff,0xff,0x3f,
- 0xcf,0x93,0xfc,0xff,0xff,0xdf,0xff,0xff,0x69,0xbf,0xf3,0xcd,0xea,0xfb,0xcb,0xff,
- 0xff,0xff,0xfb,0xcf,0xff,0xff,0xff,0xff,0xff,0xfd,0x7c,0xf7,0xff,0xff,0xf9,0xaf,
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- 0xf3,0xf7,0xef,0xff,0xd2,0xf5,0xbf,0xff,0xff,0xff,0xff,0xbc,0x9b,0xff,0xfe,0x7f,
- 0x95,0xfd,0xf3,0x5f,0xcf,0xf7,0xff,0xff,0x7e,0xd7,0x9f,0xff,0xf9,0xd7,0xff,0xcf,
- 0xf9,0x5e,0x7f,0xb7,0xff,0xf9,0x5e,0xdf,0xff,0xff,0xff,0xff,0xff,0xeb,0xff,0xff,
- 0xff,0xf4,0xff,0xac,0xc9,0xd2,0x6c,0xbb,0x7f,0xef,0xef,0xff,0xff,0x7d,0x5b,0xdd,
- 0xff,0xff,0xe9,0xff,0xf0,0xb3,0x77,0xe9,0xe2,0xf5,0xff,0xff,0xff,0xff,0xf7,0x6f,
- 0xff,0xff,0xf5,0x9f,0xf7,0xa9,0x3e,0x47,0x9f,0xff,0xfd,0xdf,0xf7,0xfd,0x4d,0x7f,
- 0x5a,0x3d,0x6f,0x79,0x3e,0xf7,0x96,0xaf,0xfd,0x34,0x5d,0xbf,0xff,0xff,0xff,0xf7,
- 0xe7,0xff,0xff,0xff,0xfa,0xfe,0xb7,0xaf,0xa9,0xea,0xdf,0xff,0xbf,0xeb,0xff,0xff,
- 0xff,0xeb,0xff,0xff,0xfe,0xaf,0xbf,0xea,0xff,0xfd,0x2f,0xeb,0xff,0xff,0xff,0xff,
- 0xfe,0xe9,0xbf,0xff,0xff,0xff,0x5f,0xdf,0xf4,0xfd,0x3b,0x7f,0xff,0xf7,0xfd,0x7f,
- 0xff,0xf5,0xfd,0x7f,0xff,0xdf,0xf4,0xfd,0xff,0x5f,0xfb,0xa4,0xfd,0x7f,0xff,0xff,
- 0xff,0xff,0xf9,0x2e,0xff,0xff,0xff,0xff,0x7f,0xc7,0xdf,0xf7,0xbf,0x7f,0xff,0xfb,
- 0x7f,0xff,0xbf,0x5f,0xfc,0xff,0x9f,0xef,0xdb,0x7e,0xdf,0x7f,0x6f,0xdb,0x7d,0xff,
- 0xff,0xff,0xff,0xdf,0x17,0xfe,0xff,0xff,0xef,0xdb,0xfe,0xff,0xff,0xef,0xdb,0xff,
- 0xff,0xff,0xff,0xfe,0xe7,0xff,0x2b,0xff,0xff,0xbf,0xff,0xff,0xff,0xee,0xbf,0xbf,
- 0x6f,0xff,0xff,0xff,0xff,0xe6,0x7f,0xee,0xfd,0xbc,0x6e,0xdb,0xb6,0x7f,0xb3,0x6f,
- 0xbb,0xfe,0xdf,0xb7,0xed,0xf9,0xd7,0xbb,0xef,0xdb,0xd6,0x7f,0xbf,0x6f,0xf9,0xbe,
- 0x6f,0xbe,0xef,0xfb,0xfe,0xfd,0xfa,0x9b,0xff,0xff,0x7f,0xef,0x9b,0xe6,0xff,0xff,
- 0xdf,0xbf,0xff,0xff,0xff,0xff,0xff,0xef,0xfc,0xef,0xf7,0xfe,0xff,0xff,0x6f,0xbb,
- 0xfe,0xff,0xbe,0xff,0xff,0xff,0xfd,0xbd,0x9b,0xff,0xff,0xff,0xfb,0xfd,0xff,0x7f,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfb,0xf7,0xef,0xff,0xff,0xbf,0xff,0xf7,
- 0xfe,0xfe,0xff,0xdf,0xff,0xff,0xff,0xff,0xef,0xfa,0x5f,0xff,0xfb,0x7f,0xdf,0xff,
- 0xfd,0x3f,0xff,0xdf,0xff,0xfd,0x7f,0xff,0xd7,0xb4,0x6f,0xdf,0xf7,0xfd,0xfd,0x3f,
- 0xdf,0xff,0xf4,0x7d,0x3b,0xff,0xff,0xff,0xff,0xfa,0xff,0x6f,0xff,0xff,0xdd,0xfe,
- 0xae,0xef,0xaf,0x7f,0xde,0xaf,0xff,0xa7,0xff,0xfa,0x7e,0x8f,0xfc,0xb3,0x7f,0xdf,
- 0xaf,0xfd,0xfe,0xb6,0xbf,0xaf,0xfe,0xbf,0xff,0xff,0xff,0xff,0xd1,0xff,0xff,0xff,
- 0xff,0xfd,0xd7,0xf5,0xfb,0xff,0x5e,0xff,0xff,0xff,0xfe,0x5e,0xb7,0xfb,0xff,0xde,
- 0xff,0xf5,0xdb,0xfb,0x5d,0xd3,0xf5,0xef,0x7f,0xff,0xff,0xff,0xff,0xf7,0x3f,0xff,
- 0xfe,0x7f,0x9f,0xe2,0xf8,0xbe,0x7f,0x9b,0xe7,0xf9,0xfc,0x7f,0x8b,0xe6,0x79,0xff,
- 0x8b,0xe7,0xf8,0xbe,0x7f,0x8b,0xe2,0xf8,0xbe,0x6f,0x9f,0xe7,0xf9,0xfe,0x7f,0xb7,
- 0xff,0xff,0xfe,0xfd,0x7f,0xff,0xf7,0xfe,0x7f,0xff,0xef,0xd7,0xef,0xfd,0x3f,0x4f,
- 0xff,0xff,0x7f,0xef,0xd7,0xfe,0xff,0xff,0x47,0xd7,0xfd,0xff,0xff,0xff,0xff,0xff,
- 0xea,0xff,0xff,0xff,0xff,0xef,0xef,0xfa,0xff,0xff,0xff,0xfd,0xfa,0xff,0xff,0xa7,
- 0xeb,0xff,0xff,0xbf,0xfd,0xfa,0xff,0xdf,0xef,0xeb,0xfa,0xfe,0xff,0xff,0xff,0xff,
- 0xff,0xf6,0xdf,0xfe,0xff,0xfb,0xfd,0xff,0xff,0xdf,0xdf,0xfd,0xff,0xff,0xfe,0xff,
- 0xfd,0xff,0x3f,0xbf,0xfd,0xff,0xff,0xdf,0xff,0xff,0xff,0x7f,0xdf,0xf7,0xff,0xff,
- 0xff,0xff,0xff,0x9b,0xff,0xff,0xff,0x7f,0xb7,0xbd,0xeb,0xfb,0x7f,0xb7,0xf7,0xff,
- 0xdf,0xff,0x9f,0xed,0xff,0xde,0xff,0xf7,0xeb,0xff,0x7f,0xb7,0xa7,0xef,0xfa,0xdf,
- 0xff,0xff,0xff,0xff,0xfb,0x2f,0xff,0xff,0xaf,0xfb,0xff,0xfc,0xbf,0x7f,0xd9,0xff,
- 0x7d,0x1f,0xff,0xdf,0xfc,0xff,0x2f,0xd3,0xf6,0xbc,0xbf,0x6f,0xff,0xff,0xfc,0x9d,
- 0xff,0xff,0xff,0xff,0xff,0xfd,0xef,0xfb,0xfa,0xfe,0xbf,0xaf,0xeb,0xba,0xb6,0xbf,
- 0xaf,0xeb,0xda,0xfe,0xad,0x8b,0xe3,0x4e,0xb7,0xad,0xeb,0x58,0xd6,0xbf,0xab,0xeb,
- 0xba,0xfe,0xbf,0xaf,0xeb,0xfa,0xff,0xc9,0xff,0xff,0xff,0x3f,0x7f,0xff,0xef,0xfb,
- 0x3e,0x37,0xbf,0xff,0xff,0xf7,0xf7,0xf3,0xbf,0xf7,0xbf,0xcf,0xff,0xfd,0xff,0xf7,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf7,0xf9,0x1f,0xff,0xfd,0xbf,0x7f,0xff,0x7f,
- 0xff,0xaf,0xff,0x7f,0xff,0xff,0xff,0xfe,0x7a,0xfb,0xfe,0xbf,0xb7,0xaf,0xfe,0xff,
- 0x7f,0xff,0xff,0xff,0x7f,0xff,0xff,0xfd,0xff,0xde,0x85,0xfb,0xff,0xfd,0xff,0xff,
- 0xff,0xfa,0xff,0xff,0xff,0xff,0xff,0xff,0xf7,0xdd,0xef,0xbf,0x3f,0xff,0xf3,0xff,
- 0xff,0x2f,0xff,0xff,0xff,0xff,0xdf,0xff,0xff,0xff,0xbf,0xec,0x7f,0xff,0xff,0xbf,
- 0xaf,0xeb,0xfe,0xfe,0x79,0xef,0xff,0xff,0xff,0xff,0xbf,0x7f,0xfe,0x3d,0xaf,0x68,
- 0xcb,0x3a,0x5f,0xee,0xab,0xfb,0xfa,0x7f,0xff,0xff,0xff,0xff,0xf8,0x9f,0xff,0xff,
- 0x5f,0xf5,0xdf,0x77,0xbf,0xff,0xfb,0xff,0xf7,0xff,0xff,0xfd,0xff,0xdf,0x1f,0xdd,
- 0xdf,0x76,0xed,0xff,0xef,0xfd,0x7e,0xdd,0xfe,0xff,0xff,0xff,0xff,0xff,0x91,0xff,
- 0xff,0xbf,0xff,0xdf,0xbf,0xf3,0xfe,0xef,0xbb,0xfb,0xff,0xff,0x7f,0xbf,0xcd,0xee,
- 0xfe,0x3f,0x8f,0xfb,0xfe,0xee,0xbb,0xff,0xff,0xff,0xff,0xff,0xfe,0xff,0xff,0xe3,
- 0x7f,0xff,0xff,0xff,0xff,0xb6,0xfd,0xbf,0x3f,0xcf,0xff,0xff,0xff,0xff,0xdb,0xf7,
- 0xfd,0x7d,0xff,0xf5,0xfc,0xff,0x17,0xce,0xf7,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xff,0x6f,0xbf,0xff,0xff,0xbf,0xff,0xbd,0xef,0xfb,0xf6,0xff,0xf3,0xff,0xff,0x5e,
- 0x6f,0xad,0xb9,0xbf,0xff,0xff,0xef,0xff,0xbb,0xfd,0xbf,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xd5,0xf7,0xff,0xfc,0xbf,0xff,0xdf,0xff,0xf8,0xfb,0xff,0xff,0xfe,0x5f,
- 0xff,0xfb,0xfb,0xf7,0xce,0x1f,0xfb,0xe2,0xdf,0xef,0xb9,0xfe,0xfe,0x7f,0xf7,0xff,
- 0xff,0xff,0xff,0xfd,0xbe,0xff,0xff,0xdf,0xff,0xfb,0xf9,0xff,0x9f,0xff,0xff,0xff,
- 0xff,0xff,0xfe,0xff,0xfa,0xff,0xfb,0xff,0xe7,0xdf,0x7f,0x77,0xff,0xfb,0xfb,0xff,
- 0xff,0xff,0xff,0xff,0xff,0x83,0xbf,0xff,0xfb,0xff,0xf7,0xfd,0x33,0xff,0xfd,0x7f,
- 0xff,0xff,0xff,0xff,0xff,0xdf,0xff,0xff,0x7f,0xdb,0xc7,0x5d,0x7f,0x1b,0xf7,0xf3,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xf6,0xbf,0xff,0xdf,0xff,0xff,0xfe,0xfa,0xff,0xf9,
- 0xeb,0xff,0xff,0xdf,0xf7,0xff,0xfb,0xff,0xf7,0xcd,0x79,0xee,0xf6,0x3f,0xf7,0xff,
- 0xfe,0xff,0xff,0xff,0xff,0xff,0xff,0xf8,0x5f,0xef,0xff,0xff,0xff,0x7f,0xd7,0x7f,
- 0xff,0xfb,0xff,0xff,0xff,0xff,0xff,0xfc,0xff,0xfd,0xfd,0xfc,0xdf,0xdd,0xfd,0xf7,
- 0xff,0xff,0x5f,0xff,0xff,0xff,0xff,0xff,0xff,0xd8,0xff,0xff,0xff,0xff,0xff,0xff,
- 0x3f,0xff,0xff,0xdf,0xf3,0xfd,0xff,0xff,0xff,0xf3,0xff,0xff,0xff,0xff,0xff,0xff,
- 0x3f,0xff,0xbf,0x3f,0xfb,0xff,0xff,0xff,0xff,0xff,0xc9,0x6b,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0x7f,0xff,0xff,0xff,0x9f,0xbf,0xff,0xfe,0xff,0xff,
- 0xff,0xef,0xdf,0xf3,0xfc,0xff,0x7f,0xff,0xff,0xff,0xff,0xd7,0x6f,0x7f,0xff,0xff,
- 0xff,0xff,0xfc,0xb7,0xff,0xff,0xf4,0xbf,0xff,0xff,0xff,0xff,0xef,0xff,0x9f,0xe7,
- 0xff,0xff,0x5b,0xff,0xfe,0xbd,0x27,0xef,0xff,0xff,0xff,0xff,0xfb,0xd1,0xbf,0xff,
- 0xff,0xff,0xff,0xff,0x36,0xff,0xff,0xfe,0xd7,0xff,0xff,0xff,0xfc,0xff,0xff,0xff,
- 0xfc,0xff,0xff,0xef,0xff,0x7e,0xd7,0xb6,0xfd,0xff,0xff,0xff,0xff,0xff,0xd9,0xb7,
- 0xff,0xff,0xff,0xff,0xfa,0xfe,0xb7,0xaf,0xeb,0xef,0xff,0xff,0xff,0xeb,0xff,0x7f,
- 0xaf,0xfb,0xff,0xf5,0xfe,0x7f,0xeb,0x42,0x79,0xbb,0x3f,0xff,0xff,0xff,0xff,0xff,
- 0x46,0xff,0xff,0xff,0xff,0xff,0x57,0xd6,0xf5,0x7d,0x5f,0xf7,0xff,0xff,0xfd,0x5f,
- 0x7e,0xb5,0x7f,0xde,0xf7,0xfd,0x8f,0x69,0x6e,0x4d,0x1f,0xf7,0x7f,0xff,0xff,0xff,
- 0xff,0x7a,0xdf,0xff,0xff,0xff,0xff,0xeb,0xfa,0xfe,0xbf,0xaf,0xeb,0xff,0xf5,0xff,
- 0xaf,0xff,0xde,0xbf,0xff,0xbf,0xff,0xff,0xf7,0xad,0xab,0xfa,0xfe,0xff,0xff,0xff,
- 0xff,0xff,0xfa,0x1f,0xff,0xff,0xff,0xff,0xfd,0x7f,0x5f,0xd7,0xf5,0xe9,0x7f,0xff,
- 0xff,0xf5,0xff,0xf1,0xd7,0xff,0xfd,0xff,0x7f,0xff,0xa5,0xfd,0x3f,0x7f,0xdf,0xff,
- 0xff,0xff,0xff,0xff,0xf3,0xfe,0xdf,0xff,0xff,0xff,0xff,0xff,0x7f,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xfe,0xdf,0xe7,0xff,0xff,0xff,0xbf,0xef,0xf7,0xf7,0xff,0x7f,
- 0xff,0xff,0xff,0xff,0xff,0xfd,0x7f,0xff,0xff,0xff,0xff,0xff,0xff,0xf9,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xef,0xfe,0x7f,0xbf,0xff,0xfa,0xff,0xbf,0xbf,0xff,
- 0xdf,0xff,0xff,0xff,0xff,0xff,0xfe,0x87,0xff,0xef,0xfb,0xfe,0xff,0xbf,0x6f,0xfb,
- 0x7e,0xff,0xb7,0xef,0xfb,0xfe,0xff,0xbc,0x7b,0xf6,0xef,0xbf,0xee,0xdb,0xf6,0xf9,
- 0x9f,0xef,0xfb,0x7e,0xff,0xbf,0xef,0xff,0x89,0xbf,0xff,0xff,0xff,0xff,0xff,0xcf,
- 0xbf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xef,0xfc,0xff,0xbf,0xef,0xf3,0xfc,
- 0xf9,0xff,0xef,0xbf,0xff,0xff,0xff,0xff,0xff,0xda,0xbf,0xff,0xff,0xff,0xff,0xff,
- 0xfb,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xef,0xff,0xbf,0xdf,0xf7,0xfe,
- 0xff,0xbf,0xff,0xfb,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x25,0xff,0xff,0xbf,0xff,
- 0xff,0xfe,0xff,0xff,0xef,0x7f,0xff,0xff,0xff,0xff,0xfe,0xcf,0xef,0xff,0xfb,0xde,
- 0xb7,0xff,0xff,0xff,0x4f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xbe,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xdb,0xbf,0xff,0xe7,0xff,0xff,0xff,0xff,0xff,0xfb,0xf7,0xdf,0xf7,
- 0xfd,0xdf,0x7d,0xdf,0xbb,0xeb,0xdf,0xaf,0xff,0xff,0xff,0xff,0xff,0xff,0x5f,0xff,
- 0xff,0xff,0xff,0xff,0xfb,0xff,0xff,0xfd,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x9f,
- 0xaf,0xff,0xfe,0xff,0xff,0xbf,0xfd,0x7b,0xdf,0xff,0xff,0xff,0xff,0xff,0xff,0xa3,
- 0xff,0xff,0xe7,0xf9,0xfe,0x7f,0x8f,0xe7,0xf9,0xbe,0x7f,0x9f,0xe7,0xf9,0xfe,0x7f,
- 0x9e,0xf9,0xfe,0x7f,0x9f,0xe7,0xf8,0xfe,0x2f,0x1b,0xe7,0xf9,0xfe,0x7f,0x9f,0xe7,
- 0xf5,0x7f,0xff,0xff,0xef,0xff,0xfe,0xfd,0x7f,0xef,0xf3,0xff,0xff,0xff,0xff,0xfb,
- 0xfc,0x7f,0xff,0xfb,0xfe,0x7f,0xbf,0xe7,0xd7,0xfd,0xeb,0x7f,0xff,0xff,0xff,0xff,
- 0xff,0xde,0x6f,0xff,0xff,0xfd,0xff,0xff,0xdf,0xaf,0xfd,0xfe,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xbf,0xff,0xff,0x7f,0xff,0xf7,0xef,0xfa,0xfe,0xff,0xbf,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xcd,0xff,0xef,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xcf,0xff,0xff,
- 0xff,0xff,0xef,0xff,0xf9,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf7,0xfd,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xbf,0xff,0xff,0xf7,0xff,0xff,0x7e,0xf7,0xf7,0xf9,0xff,
- 0xff,0xff,0xff,0xfd,0xff,0x7f,0xef,0xed,0xff,0x7f,0xdf,0xf7,0xef,0x7b,0xf6,0xb7,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xf3,0xff,0xff,0xff,0xff,0xfd,0xff,0xfd,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0x6f,0xff,0xfd,0xaf,0x7f,0xdf,0xf6,0x7c,0xbf,0x73,
- 0xdb,0xf4,0xff,0xff,0xff,0xff,0xff,0xec,0xfd,0xff,0xab,0xeb,0xfa,0xbe,0xbf,0xaf,
- 0xeb,0xfa,0xfe,0xbf,0xaf,0xeb,0xfa,0xfe,0xad,0xeb,0x7a,0xde,0xbd,0xae,0xcb,0x32,
- 0xf4,0xb7,0xaf,0xeb,0xfa,0xfe,0xbf,0xaf,0xf5,0x1b,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xfd,0xff,0x3f,0xff,0xff,0xfc,0x78,0xdf,0xff,0xf3,0xfe,0xff,0xff,0x9d,
- 0xff,0xff,0xff,0x3f,0xef,0xff,0xff,0xff,0xff,0xfd,0xc9,0xfd,0xff,0xf7,0xfd,0xff,
- 0xff,0xff,0xf7,0xff,0xaf,0xff,0xff,0xff,0xfe,0xbf,0xf9,0xdf,0x7f,0xff,0xff,0xff,
- 0xff,0xef,0xf9,0xfe,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xe2,0x5f,0xff,0xfd,0xf7,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xf5,0xff,0xff,0xef,0xff,0xff,0xdc,0xef,0xbf,0xbe,
- 0xbf,0xdf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfb,0xa7,0xff,0xff,
- 0xff,0xff,0xff,0xdf,0xa7,0xfd,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfb,0xff,0xfe,
- 0xfe,0xaf,0xef,0xa7,0xf8,0xfe,0x3f,0xef,0xff,0xff,0xff,0xff,0xff,0xff,0xe1,0xff,
- 0xff,0xf7,0xff,0xff,0xff,0xf5,0xdf,0xff,0xfd,0xff,0xff,0xff,0xff,0xff,0xfd,0x7b,
- 0xf5,0xbd,0xfb,0x7f,0xbf,0xff,0xbf,0xef,0x7f,0xdf,0xff,0xff,0xff,0xff,0xfb,0xfe,
- 0x1f,0xdf,0xff,0xfe,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xeb,0xff,0xff,0xff,
- 0xfa,0xff,0xff,0xfa,0xfe,0xbf,0xef,0x7a,0xff,0xbe,0xef,0xfb,0xff,0xff,0xef,0xff,
- 0xff,0x96,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfa,0xff,0xff,0xff,0xfb,
- 0xff,0xfb,0xdf,0x77,0xff,0x6f,0x9e,0xf3,0xfc,0xef,0x5f,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xf4,0xfb,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x7f,0xff,
- 0xff,0xff,0xff,0xab,0xf7,0xff,0xed,0xfb,0x6f,0xbf,0xeb,0xff,0xff,0xdf,0xff,0xff,
- 0xff,0xff,0xf3,0xfd,0x5f,0x7f,0xff,0xff,0xff,0xef,0xff,0x3f,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xbf,0x8f,0x7f,0xbf,0xff,0xff,0xfd,0x4f,0xf3,0xfc,0xfd,0x3f,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xbb,0xef,0xff,0xff,0xff,0xff,0xff,0xf7,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xdf,0xff,0xff,0xef,0xbf,0xff,0xfb,0xff,0xfd,0xff,0x7d,0xdd,0xf7,
- 0xff,0xff,0xff,0xff,0x7f,0xff,0xf0,0x7f,0xff,0xff,0xff,0xff,0xff,0xee,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x5d,0xff,0xaf,0xe3,0xff,0x1f,0xc7,0xf9,
- 0xfe,0xdf,0xff,0xff,0xff,0xff,0xff,0xff,0x07,0xfb,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xca,0xbf,0xfb,0xbf,0xef,0xfb,0xfe,
- 0xff,0x3b,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xb1,0xfb,0xff,0xff,0xff,0xff,0xfd,
- 0xbf,0xff,0xdf,0xff,0xff,0xff,0xff,0xfe,0xf7,0xff,0xff,0xf7,0xff,0xef,0xfb,0xfe,
- 0xdf,0xd7,0xf7,0xff,0xff,0xff,0xff,0xff,0xff,0xef,0xfe,0x0b,0xff,0xff,0xbf,0xff,
- 0xff,0xff,0xdf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xe7,
- 0xff,0xff,0xff,0x7f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0xd4,0xff,0xff,0xf7,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xfe,0xbf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfd,0xe6,0xd7,0xff,
- 0xfe,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0xbf,
- 0xff,0xff,0x9f,0xff,0xbc,0xaf,0x4b,0xff,0xff,0xff,0xff,0xff,0xff,0xf3,0xbe,0xcb,
- 0xff,0xff,0xdf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf3,
- 0xd7,0xff,0xff,0xff,0xfe,0x5f,0xb5,0xfd,0x7f,0xff,0xff,0xff,0xff,0xff,0xfe,0x7d,
- 0xd9,0x7f,0xff,0xfb,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xbf,0x4f,0xd2,0xc9,0xbd,0x3d,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xea,0x2d,0xff,0xff,0x77,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xf7,0xff,0xff,0x7b,0xdf,0x5a,0x9f,0xa7,0xbf,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xf7,0x4d,0xff,0xff,0xef,0xff,0xff,0xff,0xff,0x5f,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xeb,0xff,0xff,0xfe,0xff,0xeb,0xfa,0xde,0xbf,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0x80,0xff,0xff,0xfd,0xff,0xff,0xff,0xff,0xcf,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xfd,0x7f,0xff,0xff,0xff,0xfd,0x7f,0x5f,0xd7,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xfc,0xbf,0xef,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfc,0xff,0x3f,0xc7,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0x07,0xff,0xbf,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0x7f,0xff,0xfb,0xde,
- 0xfe,0x7f,0xff,0xff,0xff,0xff,0xff,0xff,0xe8,0x7f,0xfe,0xff,0xbf,0xef,0xfb,0xfe,
- 0xff,0xbf,0xef,0xfb,0xfe,0xff,0xbf,0xef,0xfb,0xff,0xbf,0xef,0x5b,0xf6,0xfd,0xbf,
- 0x6f,0xdb,0xfe,0xff,0xbf,0xef,0xfb,0xfe,0xff,0xfb,0xdf,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf7,0xfd,
- 0xfe,0xdf,0x9b,0xef,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xd3,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xfd,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfc,0x7f,0xff,0xff,
- 0xff,0xff,0xff,0xef,0xff,0xff,0xff,0xf5,0xff,0xff,0xff,0xff,0xff,0xff,0xdf,0xff,
- 0xff,0xff,0xff,0x7f,0xdf,0xff,0xef,0xff,0xff,0xff,0xff,0xff,0xfb,0xff,0xaf,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0x9f,0xff,0xff,0xff,0xff,0xff,0xf9,
- 0xff,0xfd,0xdd,0x77,0x6a,0xfb,0xae,0xef,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xec,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xd7,0xff,0xff,0xff,0xff,0xff,
- 0xef,0x7f,0xff,0xff,0xff,0xfd,0xf3,0xfd,0xd7,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xf3,0x3f,0xff,0xfe,0x7f,0x9f,0xe7,0xf9,0xfe,0x7f,0x9f,0xe2,0xe9,0xfe,0x7f,0x9f,
- 0xe7,0xf9,0xef,0x9f,0xe6,0xe9,0xbe,0x6f,0x1f,0xe2,0xe9,0xfe,0x7f,0x9f,0xe7,0xf9,
- 0xfe,0x7f,0x67,0xff,0xff,0xff,0xff,0xff,0xff,0xfb,0xff,0xff,0xff,0xfd,0xff,0xff,
- 0xff,0xff,0xff,0xfd,0xff,0xff,0xff,0xff,0xf7,0xf9,0x7f,0xff,0xfb,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xe8,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x7f,0xff,0xff,0xff,0xef,
- 0xff,0xff,0xff,0xff,0xff,0xbf,0xff,0xff,0xef,0xfe,0xfd,0xbf,0xef,0xef,0x7f,0xff,
- 0xff,0xff,0xff,0xff,0xff,0x1f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xb7,0xff,0xff,0xf7,0xff,0xff,0xfd,0xff,0xf7,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0x3b,0xfe,0xff,0xff,0xff,0xff,0xff,0xfd,0xff,0xff,
- 0xff,0xfe,0xff,0xff,0xff,0xff,0xff,0xfe,0xff,0xff,0xfe,0xfd,0xff,0xd6,0xf7,0xbd,
- 0xfd,0xff,0xff,0xff,0xff,0xff,0xff,0xf4,0x3f,0xff,0xff,0x4f,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xef,0xfe,0xff,0xf2,0xfd,0xff,0xff,0xff,
- 0xf2,0xf7,0xff,0xff,0xff,0xff,0xff,0xff,0xee,0x8f,0xff,0xfa,0xfe,0xbf,0xab,0xeb,
- 0xfa,0xbe,0xbf,0xab,0xcb,0xfa,0xbe,0xbf,0xaf,0xeb,0xde,0xaf,0xaf,0xeb,0xda,0xde,
- 0xaf,0xae,0xea,0xfa,0xde,0xbf,0xaf,0xeb,0xfa,0xff,0xc5,0xff,0xff,0xfa,0xfd,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x7f,0xff,0xff,0xff,0xef,0xef,
- 0xff,0xdd,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xef,0xff,0xf8,0x9f,0xff,0xff,0xff,
- 0xdf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xef,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xfd,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x7e,0x65,0xff,0xff,
- 0xff,0xff,0xf7,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xdf,0xff,0xff,0xff,0xdf,0xff,
- 0xff,0xfd,0xff,0xff,0xf7,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfb,0xf2,0x7f,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xe3,0xff,0xff,0xfe,0xfd,0xff,0x7f,
- 0xdf,0xf7,0xe3,0xfe,0x7f,0x9f,0xae,0xed,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
- 0x9f,0xff,0xfb,0x7f,0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0xff,0xff,0xff,0xff,0x7f,
- 0xff,0x7d,0xdf,0xdd,0xff,0xbf,0x7f,0xea,0xff,0xbf,0xff,0xff,0xff,0xbf,0xff,0xff,
- 0xff,0xe1,0xff,0xfd,0xff,0xff,0xff,0xff,0xff,0xff,0x7f,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xe7,0xef,0xff,0xff,0xff,0xff,0xfb,0x7f,0xdf,0xff,0xff,0xff,0xff,0xff,0xfe,
- 0xff,0xff,0xf1,0x7f,0xdf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xef,0xff,0xff,
- 0xff,0xd7,0xfb,0x7d,0xff,0xfd,0xff,0xfb,0xff,0xff,0xff,0xff,0xff,0xff,0x5f,0xff,
- 0xff,0xff,0xff,0xff,0xcf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xfb,0x9f,0x7f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfd,0xff,
- 0xff,0xff,0xfe,0xff,0xff,0xd5,0xff,0xbf,0xbf,0xff,0xbf,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xf4,0xff,0xff,0xc7,0xdf,0xff,0xfb,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xef,0xfd,0xbf,0xff,0xff,0xff,0xf7,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0x7f,0xfe,0xf7,0xff,0xfe,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xb7,0xff,0xff,0xbf,0xf7,0xff,0xff,0xfe,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf3,0xeb,0xff,0xff,0xff,0xfd,0xdf,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xdf,0xff,0xff,0xff,0xfe,0x7f,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfb,0xff,0xef,0xf7,0xfd,0xff,0x7f,0xdf,
- 0xf7,0xfd,0xff,0x7f,0xdf,0xf7,0xfb,0xff,0xff,0xf7,0xfa,0xdf,0xef,0xff,0xff,0xbf,
- 0xff,0xff,0xff,0xfe,0xff,0xff,0xff,0xff,0xff,0xff,0xdf,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xdf,0xdf,0xff,0xff,0xff,0xdf,0xff,0xff,0xff,0xb0,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xe7,0xf9,0xff,0xff,0xf5,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0xff,0xff,0xff,0xff,0xc6,0x6b,0xfc,
- 0xff,0x3b,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0xbf,0xaf,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xdf,0xff,0xff,0xff,0xd7,0xcf,
- 0x7f,0xef,0xfb,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfb,0xff,0xff,0xff,0xfb,
- 0xfd,0xbf,0xf7,0xfd,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x7f,0xff,0xff,
- 0xff,0xdb,0x37,0xff,0xbd,0x6f,0xdf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xeb,0xfa,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xaf,0xef,0xff,
- 0xff,0xff,0xbf,0xa6,0xff,0xdd,0xa7,0x77,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xfd,0x5f,0x57,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf5,0x7d,
- 0xdf,0xff,0xff,0xff,0x7a,0xdf,0xfe,0xff,0xbf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xaf,0xeb,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfe,
- 0xbf,0xbf,0xff,0xff,0xff,0xf8,0xdf,0xff,0x7f,0xdf,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xf5,0xfd,0x7f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xd7,0xf7,0xff,0xff,0xff,0xff,0xd3,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfb,0x7e,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf9,0xf5,0x7f,0xef,0xf9,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x9f,0xeb,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xbe,0x07,0xfe,0xed,0xfb,0xfe,0xff,
- 0xbf,0xef,0xfb,0xfe,0xff,0xbf,0xef,0xfb,0xfe,0xff,0xb7,0xfb,0xfe,0xff,0xbe,0xef,
- 0xfb,0xfe,0xff,0xbf,0xef,0xfb,0xfe,0xff,0xbf,0xef,0xff,0xb1,0xbf,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xde,0xbf,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xd5,0xff,
- 0xd7,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xed,0x7f,0x5f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x5f,0xff,0xff,0xf4,
- 0xff,0xfa,0x7f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xa7,0xe9,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xe9,0xff,0xff,
- 0xff,0x1f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xef,0xfb,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfd,0x7f,
- 0xff,0xff,0xeb,0xff,0xff,0xe7,0xf9,0xfe,0x7f,0x9f,0xe7,0xf9,0xfe,0x7f,0x9f,0xe7,
- 0xf9,0xfe,0x7f,0x9f,0xf9,0xfe,0x7f,0x1f,0xe7,0xf9,0xfe,0x7f,0x9f,0xe7,0xe9,0xfe,
- 0x2f,0x9f,0xe7,0xe3,0x7f,0xfd,0x7f,0xff,0xfb,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xef,0xd7,0xf4,0xfb,0xff,0xff,0xff,0xff,0xff,0xff,0xfd,
- 0xff,0xff,0xff,0xff,0xfe,0x4f,0xff,0xaf,0xff,0xff,0x7f,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xfd,0xfa,0xfe,0x9d,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xef,0xff,0xff,0xff,0xff,0xed,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfb,0x3f,0xfd,0xff,0xff,0xfd,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xfd,0xff,0x7f,0xf7,0xfd,0xff,0x77,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x83,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xf7,0xff,0xff,0xff,0xff,0xef,0xfb,0xf7,0xff,0xff,0xf9,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xf5,0xff,0xff,0xff,0xff,0xc0,0xdd,0xff,0xad,0xeb,0x7a,
- 0xfe,0xbf,0xad,0xeb,0xfa,0xfe,0xbf,0xaf,0xeb,0xfa,0xfe,0x8f,0xe9,0x7a,0xbe,0xaf,
- 0xaf,0xea,0xfa,0xfe,0xbf,0x2b,0xeb,0xda,0xfe,0xbf,0xaf,0xfd,0x5f,0xfd,0xff,0xff,
- 0xff,0xff,0xfd,0xff,0xff,0xff,0xff,0xfd,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xfd,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf9,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0xff,0xff,0xff,0xff,0xff,0xfd,0xff,0xff,
- 0xff,0xf7,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf7,0xff,0xff,0xff,0xa9,0x5f,
- 0xff,0xff,0xff,0xfe,0xff,0xff,0xff,0xff,0xff,0x7f,0xf7,0xff,0xff,0xff,0xff,0xfd,
- 0xfb,0xff,0xff,0xdf,0xff,0xf7,0xbf,0xef,0xf3,0xff,0xff,0xff,0xff,0xff,0xf9,0xff,
- 0x47,0xfd,0xf7,0xfd,0xff,0xff,0xf7,0xfe,0xff,0xff,0xff,0xdf,0xff,0xdf,0xff,0xff,
- 0xff,0xbf,0xaf,0xbf,0xff,0xfd,0xff,0xff,0xff,0xef,0xff,0xff,0xff,0xfe,0xbf,0xff,
- 0xff,0xc1,0xff,0xff,0xe7,0xf5,0xff,0xfd,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xf3,0xff,0xff,0xff,0xff,0xbf,0xfd,0xff,0xff,0xff,0xff,0xff,0xff,0xeb,
- 0xff,0xfb,0xdf,0x1f,0xfd,0xdf,0xff,0xf3,0xff,0xff,0xff,0xef,0xf3,0xfc,0xff,0xfb,
- 0xff,0xfb,0xf6,0xfe,0xef,0xff,0xff,0xff,0xfd,0x7f,0x5b,0xff,0xff,0xff,0xff,0xff,
- 0xff,0x7f,0xff,0xff,0x97,0xff,0xd7,0x75,0x7d,0xbf,0x7f,0xfb,0xfb,0xfd,0xff,0xff,
- 0xd3,0xff,0xfd,0xbf,0x2f,0xc4,0xff,0xbf,0xff,0xfb,0x7f,0xbc,0xff,0xef,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xbe,0xff,0xff,0xff,0xff,0xef,0xfb,0xff,0xff,0xff,0xef,
- 0xff,0xff,0xff,0xff,0xe7,0x6f,0xf9,0xdf,0xff,0xff,0xff,0xff,0xff,0xef,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xfc,0x5f,0xf7,0xf7,0xfe,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xb5,0x7f,0xff,0x7f,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xdf,0xff,0xdf,0xfb,0xff,0xff,0x7f,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xef,0xff,0xff,0xef,0xff,0xff,0xfb,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xdf,0xff,0xff,0xff,0xff,0xff,0xff,0x7d,0xff,0x5f,0x5f,0xd7,0xff,
- 0xff,0xff,0xff,0xd6,0x75,0x5f,0xf7,0xde,0xff,0xff,0xff,0xdf,0xfd,0x3f,0xdf,0xf7,
- 0x5d,0xf7,0xdd,0xff,0xff,0x5f,0xff,0xff,0x7f,0xff,0xde,0xe7,0xdf,0x8f,0xfb,0xff,
- 0x7f,0xff,0xff,0xff,0xfe,0xff,0xff,0xff,0xeb,0xfe,0xdf,0xbf,0xf7,0xfe,0xff,0xbf,
- 0xff,0xff,0xfc,0xff,0xbf,0xff,0xfb,0xff,0xff,0xbf,0xff,0xff,0x95,0xf7,0xff,0xff,
- 0x7f,0xff,0xff,0xff,0xff,0xff,0xdf,0xff,0xff,0xfd,0xfb,0xb3,0xf7,0x6f,0xff,0xbf,
- 0xf7,0xbf,0xff,0xff,0xdf,0xd7,0xff,0xff,0x77,0xff,0xef,0xbf,0xfb,0xfc,0xbb,0xff,
- 0x8f,0xe7,0xf9,0x7e,0x7f,0x9b,0xe7,0xf9,0xfe,0x7f,0x9f,0xe7,0xf9,0xfe,0x7f,0xe7,
- 0xf9,0xf6,0x5f,0x9f,0xe7,0xf9,0xfe,0x7f,0x9f,0xe7,0xf9,0xfe,0x7f,0x9f,0xfc,0x16,
- 0xff,0xf3,0xfa,0xff,0xb7,0xed,0xfb,0x7e,0xff,0xbf,0xcf,0xfb,0x7a,0xfe,0xbf,0xcf,
- 0xfe,0xfe,0xbd,0xcf,0xfb,0xfe,0xff,0xbf,0xcf,0xfb,0xfe,0xff,0xbf,0xef,0xfb,0xff,
- 0xa4,0xcf,0xfe,0x7f,0x9d,0xe7,0xfb,0xfe,0xff,0xbf,0xe7,0xb9,0xfe,0xff,0xbf,0xe7,
- 0x78,0xfd,0x9f,0x67,0xfb,0xf8,0xf5,0xaf,0x67,0xdb,0xfe,0xff,0xbf,0xef,0xeb,0xac,
- 0xff,0xfe,0x9f,0xff,0xdf,0xff,0xff,0xff,0xff,0xfe,0xff,0xff,0xff,0xff,0xff,0xfe,
- 0xff,0xff,0xef,0xff,0xff,0xbf,0xf7,0x7f,0xff,0xff,0xbf,0xbf,0xff,0xff,0xff,0xfd,
- 0xfd,0xff,0xfd,0xc3,0xff,0xfb,0xde,0xf7,0xbf,0xef,0xfb,0xbe,0xff,0xae,0xe7,0xfb,
- 0xfe,0xff,0xbd,0xe7,0xfe,0xbd,0xbf,0xe7,0xfb,0xfe,0xef,0xbd,0xef,0xfb,0xfe,0xff,
- 0xbf,0xef,0xfb,0xff,0xfa,0x7f,0xfc,0xff,0x37,0xcf,0xf3,0xfc,0xff,0x3f,0xcf,0xd3,
- 0x7c,0xff,0x3f,0xcf,0xf3,0xff,0x3f,0xcf,0xf3,0xfe,0xef,0x3f,0xcf,0xf3,0xfc,0xff,
- 0x3f,0xcf,0xfb,0xf6,0xef,0xfe,0x0f,0xff,0xb7,0xed,0xfb,0x7e,0xff,0xbf,0x6f,0xfb,
- 0x7e,0xdb,0xbf,0xef,0xfb,0x7a,0xdf,0xed,0xeb,0x7e,0xff,0xbe,0xef,0xdb,0x7e,0xff,
- 0xbf,0xcf,0xfb,0xfe,0xff,0xbf,0xfb,0xe5,0xff,0xfb,0xfe,0xff,0xbf,0xe5,0xf9,0x7e,
- 0x5f,0xbf,0xef,0xf9,0x7e,0x5f,0xbf,0xef,0xfa,0xff,0xbf,0xe5,0xf9,0x7e,0xdf,0xbf,
- 0xe5,0xf9,0x7e,0x5f,0x97,0xed,0xf9,0x7f,0xf9,0xbf,0xff,0x5b,0xd7,0xf5,0xfd,0xff,
- 0x7d,0xdf,0xf5,0xfd,0x7f,0x7f,0xdb,0xf5,0xfd,0x37,0xd7,0xf5,0x7d,0xf7,0x7f,0xd7,
- 0xf5,0xfd,0xef,0x7b,0xdf,0xf7,0xfd,0x7f,0x7f,0xff,0x97,0xff,0xf7,0xfd,0xff,0x7f,
- 0xff,0xff,0xbf,0xff,0x7f,0xdf,0xff,0xff,0xff,0x7f,0xdf,0xbd,0xff,0x7f,0xff,0xff,
- 0xfd,0xff,0x7f,0xff,0xff,0xff,0xff,0xff,0xdf,0xff,0xfb,0xf0,0xff,0xed,0xff,0x6f,
- 0xdb,0xf6,0xfd,0xb7,0xed,0xdf,0xf7,0xfd,0xff,0x7f,0xde,0xf5,0xfb,0x6f,0xdb,0xf7,
- 0xfd,0xbf,0x7d,0xdb,0xf7,0xff,0xff,0x6f,0xfb,0xf7,0xfd,0xff,0x7e,0xdf,0xff,0xf7,
- 0xff,0xff,0xff,0xff,0xff,0xef,0xff,0xff,0xdf,0xfb,0xff,0xff,0xff,0xff,0x7f,0xff,
- 0xfb,0xff,0xff,0xbf,0xff,0xff,0xff,0xbf,0xff,0xff,0xff,0xff,0xff,0xff,0xdb,0xfd,
- 0xfd,0xff,0x7f,0xdf,0xf7,0xfd,0xff,0x7f,0xd7,0xf7,0xfd,0xff,0x7d,0xdf,0xf7,0xff,
- 0x7f,0xdf,0xf7,0xfd,0xff,0x7f,0xdf,0xf7,0xfd,0xff,0x7f,0xdf,0xf7,0xfd,0xff,0xf5,
- 0x7b,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xbf,0xff,0xff,0xff,0xfe,0xff,0xff,0xdf,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xbf,0xff,0xfc,0xff,0xff,0xdf,0xff,0xff,0xff,
- 0xff,0xaf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfd,0xff,0xff,0xff,0xf7,
- 0xfb,0xff,0xb7,0xff,0xff,0xfe,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x7f,
- 0xff,0xff,0xfd,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xbf,0xef,0xff,0xff,
- 0xff,0xff,0x7f,0xf4,0xff,0xff,0xef,0xff,0xff,0xfe,0xff,0xef,0xff,0xfe,0xff,0xff,
- 0xcf,0xfb,0xff,0xbe,0x3f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0x57,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x7f,0xff,0xff,
- 0xff,0xff,0xff,0xdf,0xff,0xff,0xff,0xff,0xff,0xfd,0xff,0x7f,0xdf,0xff,0xfd,0xff,
- 0x7f,0xdf,0xf7,0xff,0xff,0xff,0xee,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfb,0xff,0xff,0xff,0xef,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0xfe,0x9f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x7f,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xef,0x8b,0xdf,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf5,0x7f,0xff,0xfb,0xfe,0xff,
- 0xbf,0xef,0xfb,0xfe,0xff,0xbf,0xef,0xfb,0xfe,0xff,0xbf,0xef,0xfe,0xff,0xbf,0xef,
- 0xfb,0xfe,0xff,0xbf,0xef,0xfb,0xfe,0xff,0xbf,0xef,0xfb,0xfe,0xcf,0xff,0xcf,0xf3,
- 0xfc,0xff,0xbf,0xef,0xfb,0xfc,0xff,0x3f,0xef,0xf3,0xfc,0xff,0x3f,0xb3,0xfc,0xff,
- 0x3f,0xef,0xf3,0xfc,0xff,0x3f,0xef,0xf3,0xfe,0xff,0x3f,0xef,0xff,0xfd,0xff,0xff,
- 0xbf,0xef,0xff,0xff,0xef,0xff,0xfe,0xff,0xff,0xff,0xfb,0xff,0xfb,0xff,0xf7,0xff,
- 0xfb,0xff,0xff,0xff,0xff,0xfb,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf8,0x3f,
- 0xfe,0xfe,0xbb,0xaf,0xeb,0xfa,0xff,0xbf,0xae,0xeb,0xba,0xfe,0xfb,0xee,0xeb,0xfb,
- 0xbb,0xae,0xef,0xbe,0xff,0xbb,0xee,0xef,0xbe,0xff,0xfb,0xef,0xfb,0xbe,0xef,0xff,
- 0x17,0xff,0x75,0xad,0xab,0x4a,0xba,0xef,0xeb,0xaf,0x6a,0xda,0xae,0xb5,0xfb,0x7a,
- 0xd2,0xbd,0xab,0x7a,0x5f,0xaf,0xed,0x7b,0x7a,0x5f,0xaf,0xe5,0xfa,0xfe,0xdb,0xbf,
- 0xe2,0xd4,0xff,0xff,
diff --git a/board/esd/dasa_sim/u-boot.lds b/board/esd/dasa_sim/u-boot.lds
deleted file mode 100644
index fef5b52433..0000000000
--- a/board/esd/dasa_sim/u-boot.lds
+++ /dev/null
@@ -1,165 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- .resetvec 0xFFFFFFFC :
- {
- *(.resetvec)
- } = 0xffff
-
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/ppc4xx/start.o (.text)
- cpu/ppc4xx/traps.o (.text)
- cpu/ppc4xx/interrupts.o (.text)
- cpu/ppc4xx/serial.o (.text)
- cpu/ppc4xx/cpu_init.o (.text)
- cpu/ppc4xx/speed.o (.text)
- common/dlmalloc.o (.text)
- lib_ppc/extable.o (.text)
- lib_ppc/board.o (.text)
- lib_generic/zlib.o (.text)
- lib_generic/crc32.o (.text)
-
- common/cmd_boot.o (.text)
- common/cmd_bootm.o (.text)
- common/cmd_flash.o (.text)
- common/cmd_mem.o (.text)
- common/cmd_nvedit.o (.text)
- common/console.o (.text)
- common/lists.o (.text)
- common/main.o (.text)
-
- board/esd/dasa_sim/flash.o (.text)
- common/cmd_nvedit.o (.text)
- board/esd/dasa_sim/cmd_dasa_sim.o (.text)
- net/bootp.o (.text)
-
- . = env_offset;
- common/environment.o(.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/esd/dp405/Makefile b/board/esd/dp405/Makefile
deleted file mode 100644
index a11ee82aa2..0000000000
--- a/board/esd/dp405/Makefile
+++ /dev/null
@@ -1,51 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-# Objects for Xilinx JTAG programming (CPLD)
-CPLD = ../common/xilinx_jtag/lenval.o \
- ../common/xilinx_jtag/micro.o \
- ../common/xilinx_jtag/ports.o
-
-OBJS = $(BOARD).o flash.o ../common/misc.o $(CPLD)
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/esd/dp405/config.mk b/board/esd/dp405/config.mk
deleted file mode 100644
index 3041b772d2..0000000000
--- a/board/esd/dp405/config.mk
+++ /dev/null
@@ -1,29 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# esd VOH405 boards
-#
-
-TEXT_BASE = 0xFFFC0000
-#TEXT_BASE = 0x00FC0000
diff --git a/board/esd/dp405/dp405.c b/board/esd/dp405/dp405.c
deleted file mode 100644
index fd51f7f343..0000000000
--- a/board/esd/dp405/dp405.c
+++ /dev/null
@@ -1,149 +0,0 @@
-/*
- * (C) Copyright 2001-2003
- * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/processor.h>
-#include <command.h>
-#include <malloc.h>
-
-
-/* fpga configuration data - not compressed, generated by bin2c */
-const unsigned char fpgadata[] =
-{
-#include "fpgadata.c"
-};
-int filesize = sizeof(fpgadata);
-
-
-int board_early_init_f (void)
-{
- /*
- * IRQ 0-15 405GP internally generated; active high; level sensitive
- * IRQ 16 405GP internally generated; active low; level sensitive
- * IRQ 17-24 RESERVED
- * IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive
- * IRQ 26 (EXT IRQ 1) SER0 ; active low; level sensitive
- * IRQ 27 (EXT IRQ 2) SER1; active low; level sensitive
- * IRQ 28 (EXT IRQ 3) FPGA 0; active low; level sensitive
- * IRQ 29 (EXT IRQ 4) FPGA 1; active low; level sensitive
- * IRQ 30 (EXT IRQ 5) PCI INTA; active low; level sensitive
- * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
- */
- mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
- mtdcr(uicer, 0x00000000); /* disable all ints */
- mtdcr(uiccr, 0x00000000); /* set all to be non-critical*/
- mtdcr(uicpr, 0xFFFFFF80); /* set int polarities */
- mtdcr(uictr, 0x10000000); /* set int trigger levels */
- mtdcr(uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority*/
- mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
-
- /*
- * EBC Configuration Register: set ready timeout to 512 ebc-clks -> ca. 15 us
- */
- mtebc (epcr, 0xa8400000); /* ebc always driven */
-
- /*
- * Reset CPLD via GPIO13 (CS4) pin
- */
- out32(GPIO0_OR, in32(GPIO0_OR) & ~(0x80000000 >> 13));
- udelay(1000); /* wait 1ms */
- out32(GPIO0_OR, in32(GPIO0_OR) | (0x80000000 >> 13));
- udelay(1000); /* wait 1ms */
-
- return 0;
-}
-
-
-/* ------------------------------------------------------------------------- */
-
-int misc_init_f (void)
-{
- return 0; /* dummy implementation */
-}
-
-
-int misc_init_r (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- /* adjust flash start and offset */
- gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize;
- gd->bd->bi_flashoffset = 0;
-
- return (0);
-}
-
-
-/*
- * Check Board Identity:
- */
-
-int checkboard (void)
-{
- char str[64];
- int i = getenv_r ("serial#", str, sizeof(str));
- unsigned char trans[16] = {0x0,0x8,0x4,0xc,0x2,0xa,0x6,0xe,
- 0x1,0x9,0x5,0xd,0x3,0xb,0x7,0xf};
- unsigned char id1, id2;
-
- puts ("Board: ");
-
- if (i == -1) {
- puts ("### No HW ID - assuming DP405");
- } else {
- puts(str);
- }
-
- id1 = trans[(~(in32(GPIO0_IR) >> 5)) & 0x0000000f];
- id2 = trans[(~(in32(GPIO0_IR) >> 9)) & 0x0000000f];
- printf(" (ID=0x%1X%1X, PLD=0x%02X)\n", id2, id1, in8(0xf0001000));
-
- return 0;
-}
-
-/* ------------------------------------------------------------------------- */
-
-long int initdram (int board_type)
-{
- unsigned long val;
-
- mtdcr(memcfga, mem_mb0cf);
- val = mfdcr(memcfgd);
-
-#if 0
- printf("\nmb0cf=%x\n", val); /* test-only */
- printf("strap=%x\n", mfdcr(strap)); /* test-only */
-#endif
-
- return (4*1024*1024 << ((val & 0x000e0000) >> 17));
-}
-
-/* ------------------------------------------------------------------------- */
-
-int testdram (void)
-{
- /* TODO: XXX XXX XXX */
- printf ("test: 16 MB - ok\n");
-
- return (0);
-}
diff --git a/board/esd/dp405/flash.c b/board/esd/dp405/flash.c
deleted file mode 100644
index 89af1190a8..0000000000
--- a/board/esd/dp405/flash.c
+++ /dev/null
@@ -1,101 +0,0 @@
-/*
- * (C) Copyright 2001
- * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <ppc4xx.h>
-#include <asm/processor.h>
-
-/*
- * include common flash code (for esd boards)
- */
-#include "../common/flash.c"
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (vu_long * addr, flash_info_t * info);
-static void flash_get_offsets (ulong base, flash_info_t * info);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- unsigned long size_b0;
- int i;
- uint pbcr;
- unsigned long base_b0;
- int size_val = 0;
-
- /* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* Static FLASH Bank configuration here - FIXME XXX */
-
- size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size_b0, size_b0<<20);
- }
-
- /* Setup offsets */
- flash_get_offsets (-size_b0, &flash_info[0]);
-
- /* Re-do sizing to get full correct info */
- mtdcr(ebccfga, pb0cr);
- pbcr = mfdcr(ebccfgd);
- mtdcr(ebccfga, pb0cr);
- base_b0 = -size_b0;
- switch (size_b0) {
- case 1 << 20:
- size_val = 0;
- break;
- case 2 << 20:
- size_val = 1;
- break;
- case 4 << 20:
- size_val = 2;
- break;
- case 8 << 20:
- size_val = 3;
- break;
- case 16 << 20:
- size_val = 4;
- break;
- }
- pbcr = (pbcr & 0x0001ffff) | base_b0 | (size_val << 17);
- mtdcr(ebccfgd, pbcr);
-
- /* Monitor protection ON by default */
- (void)flash_protect(FLAG_PROTECT_SET,
- -CFG_MONITOR_LEN,
- 0xffffffff,
- &flash_info[0]);
-
- flash_info[0].size = size_b0;
-
- return (size_b0);
-}
diff --git a/board/esd/dp405/fpgadata.c b/board/esd/dp405/fpgadata.c
deleted file mode 100644
index eae8457ca2..0000000000
--- a/board/esd/dp405/fpgadata.c
+++ /dev/null
@@ -1,1812 +0,0 @@
- 0x07,0x20,0x12,0x00,0x12,0x01,0x04,0x00,0x00,0x00,0x00,0x02,0x08,0xff,0x02,0x08,
- 0xfe,0x08,0x00,0x00,0x00,0x20,0x01,0x0f,0xff,0xff,0xff,0x09,0x00,0x00,0x00,0x00,
- 0xf9,0x60,0x40,0x93,0x02,0x08,0xff,0x02,0x08,0xff,0x02,0x08,0xe8,0x08,0x00,0x00,
- 0x00,0x06,0x01,0x00,0x09,0x05,0x00,0x02,0x08,0xed,0x04,0x00,0x03,0x0d,0x40,0x08,
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- 0x00,0x00,0x03,0x09,0x03,0xff,0xfd,0x03,0xff,0xfd,0x04,0x00,0x00,0x00,0x00,0x02,
- 0x08,0xea,0x08,0x00,0x00,0x00,0x32,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x09,
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- 0x01,0x09,0x00,0x00,0x24,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,
- 0x09,0x00,0x00,0x28,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,
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- 0x40,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0x44,
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- 0x40,0x00,0x21,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0x4c,0x00,0x80,
- 0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x04,0x00,0x00,0x4e,0x20,0x01,0x00,
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- 0xa0,0x00,0x00,0x20,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0xa4,
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- 0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0xc0,0x00,0x00,0x00,0x01,
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- 0x00,0x00,0x00,0x01,0x04,0x00,0x00,0x4e,0x20,0x01,0x00,0x00,0x00,0x00,0x00,0x00,
- 0x00,0x09,0x00,0x00,0xd0,0x00,0x00,0x00,0x03,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x09,0x00,0x01,0x00,0x00,0x00,0x00,0x01,
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- 0x20,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x09,0x00,0x34,0xd0,0x00,0x00,0x00,
- 0x03,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x03,
- 0x09,0x00,0x35,0x00,0x00,0x80,0x00,0x29,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x01,
- 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x04,0x00,0x00,0x00,0x00,0x09,0x00,0x35,0x04,
- 0x00,0x00,0x04,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,
- 0x00,0x00,0x00,0x09,0x00,0x35,0x08,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,
- 0x00,0x01,0x09,0x00,0x35,0x0c,0x00,0x00,0xf4,0xc1,0x00,0x00,0x00,0x00,0x00,0x00,
- 0x01,0x09,0x00,0x35,0x10,0x00,0x00,0xc4,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,
- 0x09,0x00,0x35,0x20,0x00,0x1c,0x40,0x99,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,
- 0x00,0x35,0x24,0x00,0x00,0x80,0x05,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,
- 0x35,0x28,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,
- 0x2c,0x00,0x00,0xa0,0x41,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0x30,
- 0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0x40,0x00,
- 0x00,0x00,0x65,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0x44,0x00,0x00,
- 0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0x48,0x00,0x00,0x00,
- 0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0x4c,0x00,0x00,0x60,0x81,
- 0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x04,0x00,0x00,0x4e,0x20,0x01,0x00,0x00,0x00,
- 0x00,0x00,0x00,0x00,0x09,0x00,0x35,0x50,0x00,0x00,0x40,0x03,0x00,0x00,0x00,0x00,
- 0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x09,0x00,0x35,0x80,0x20,
- 0x00,0xcc,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x01,0x00,0x00,0x00,0x00,0x00,
- 0x00,0x00,0x04,0x00,0x00,0x00,0x00,0x09,0x00,0x35,0x84,0x20,0x00,0xc8,0x01,0x00,
- 0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x09,0x00,
- 0x35,0x88,0x20,0x00,0x08,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,
- 0x8c,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0x90,
- 0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0xa0,0xc0,
- 0x80,0x14,0x05,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0xa4,0xc0,0x80,
- 0x54,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0xa8,0xc0,0x00,0x94,
- 0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0xac,0x00,0x00,0x40,0x01,
- 0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0xb0,0x00,0x00,0x40,0x01,0x00,
- 0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0xc0,0x08,0x00,0xc4,0x09,0x00,0x00,
- 0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0xc4,0x08,0x00,0xc4,0x01,0x00,0x00,0x00,
- 0x00,0x00,0x00,0x01,0x09,0x00,0x35,0xc8,0x08,0x00,0x00,0x01,0x00,0x00,0x00,0x00,
- 0x00,0x00,0x01,0x09,0x00,0x35,0xcc,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,
- 0x00,0x01,0x04,0x00,0x00,0x4e,0x20,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x09,
- 0x00,0x35,0xd0,0x00,0x00,0x80,0x03,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,
- 0x00,0x00,0x00,0x00,0x00,0x03,0x09,0x00,0x35,0xd0,0x00,0x00,0x80,0x01,0x00,0x00,
- 0x00,0x00,0x00,0x00,0x01,0x04,0x00,0x00,0x00,0x00,0x02,0x08,0xff,0x04,0x00,0x00,
- 0x00,0x64,0x02,0x08,0xf0,0x04,0x00,0x00,0x00,0x00,0x02,0x08,0xff,0x02,0x08,0xff,
- 0x08,0x00,0x00,0x00,0x01,0x01,0x00,0x09,0x00,0x00,0x00,
diff --git a/board/esd/dp405/u-boot.lds b/board/esd/dp405/u-boot.lds
deleted file mode 100644
index 43f776579e..0000000000
--- a/board/esd/dp405/u-boot.lds
+++ /dev/null
@@ -1,151 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- .resetvec 0xFFFFFFFC :
- {
- *(.resetvec)
- } = 0xffff
-
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/ppc4xx/start.o (.text)
- cpu/ppc4xx/traps.o (.text)
- cpu/ppc4xx/interrupts.o (.text)
- cpu/ppc4xx/serial.o (.text)
- cpu/ppc4xx/cpu_init.o (.text)
- cpu/ppc4xx/speed.o (.text)
- cpu/ppc4xx/4xx_enet.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/extable.o (.text)
- lib_generic/zlib.o (.text)
-
-/* . = env_offset;*/
-/* common/environment.o(.text)*/
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/esd/du405/Makefile b/board/esd/du405/Makefile
deleted file mode 100644
index 5ec4a4fd49..0000000000
--- a/board/esd/du405/Makefile
+++ /dev/null
@@ -1,46 +0,0 @@
-#
-# (C) Copyright 2000, 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o ../common/misc.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/esd/du405/config.mk b/board/esd/du405/config.mk
deleted file mode 100644
index d091d96ecd..0000000000
--- a/board/esd/du405/config.mk
+++ /dev/null
@@ -1,30 +0,0 @@
-#
-# (C) Copyright 2000, 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# esd CPCIISER4 boards
-#
-
-#TEXT_BASE = 0xFFFE0000
-TEXT_BASE = 0xFFFD0000
-#TEXT_BASE = 0xFFFC0000
diff --git a/board/esd/du405/du405.c b/board/esd/du405/du405.c
deleted file mode 100644
index 26e834196b..0000000000
--- a/board/esd/du405/du405.c
+++ /dev/null
@@ -1,215 +0,0 @@
-/*
- * (C) Copyright 2000, 2001
- * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include "du405.h"
-#include <asm/processor.h>
-#include <ppc4xx.h>
-#include <405gp_i2c.h>
-#include <command.h>
-
-/*cmd_boot.c*/
-
-extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
-extern void lxt971_no_sleep(void);
-
-
-#if 0
-#define FPGA_DEBUG
-#endif
-
-#if 0
-#define FPGA_DEBUG2
-#endif
-
-/* fpga configuration data - generated by bin2cc */
-const unsigned char fpgadata[] = {
-#include "fpgadata.c"
-};
-
-/*
- * include common fpga code (for esd boards)
- */
-#include "../common/fpga.c"
-
-
-int board_early_init_f (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- int index, len, i;
- int status;
-
-#ifdef FPGA_DEBUG
- /* set up serial port with default baudrate */
- (void) get_clocks ();
- gd->baudrate = CONFIG_BAUDRATE;
- serial_init ();
- console_init_f ();
-#endif
-
- /*
- * Boot onboard FPGA
- */
- status = fpga_boot ((unsigned char *) fpgadata, sizeof (fpgadata));
- if (status != 0) {
- /* booting FPGA failed */
-#ifndef FPGA_DEBUG
- /* set up serial port with default baudrate */
- (void) get_clocks ();
- gd->baudrate = CONFIG_BAUDRATE;
- serial_init ();
- console_init_f ();
-#endif
- printf ("\nFPGA: Booting failed ");
- switch (status) {
- case ERROR_FPGA_PRG_INIT_LOW:
- printf ("(Timeout: INIT not low after asserting PROGRAM*)\n ");
- break;
- case ERROR_FPGA_PRG_INIT_HIGH:
- printf ("(Timeout: INIT not high after deasserting PROGRAM*)\n ");
- break;
- case ERROR_FPGA_PRG_DONE:
- printf ("(Timeout: DONE not high after programming FPGA)\n ");
- break;
- }
-
- /* display infos on fpgaimage */
- index = 15;
- for (i = 0; i < 4; i++) {
- len = fpgadata[index];
- printf ("FPGA: %s\n", &(fpgadata[index + 1]));
- index += len + 3;
- }
- putc ('\n');
- /* delayed reboot */
- for (i = 20; i > 0; i--) {
- printf ("Rebooting in %2d seconds \r", i);
- for (index = 0; index < 1000; index++)
- udelay (1000);
- }
- putc ('\n');
- do_reset (NULL, 0, 0, NULL);
- }
-
- /*
- * IRQ 0-15 405GP internally generated; active high; level sensitive
- * IRQ 16 405GP internally generated; active low; level sensitive
- * IRQ 17-24 RESERVED
- * IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive
- * IRQ 26 (EXT IRQ 1) DUART_A; active high; level sensitive
- * IRQ 27 (EXT IRQ 2) DUART_B; active high; level sensitive
- * IRQ 28 (EXT IRQ 3) unused; active low; level sensitive
- * IRQ 29 (EXT IRQ 4) unused; active low; level sensitive
- * IRQ 30 (EXT IRQ 5) unused; active low; level sensitive
- * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
- */
- mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
- mtdcr (uicer, 0x00000000); /* disable all ints */
- mtdcr (uiccr, 0x00000000); /* set all to be non-critical */
- mtdcr (uicpr, 0xFFFFFFB1); /* set int polarities */
- mtdcr (uictr, 0x10000000); /* set int trigger levels */
- mtdcr (uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority */
- mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
-
- /*
- * EBC Configuration Register: set ready timeout to 100 us
- */
- mtebc (epcr, 0xb8400000);
-
- return 0;
-}
-
-
-int misc_init_r (void)
-{
- unsigned long cntrl0Reg;
-
- /*
- * Setup UART1 handshaking: use CTS instead of DSR
- */
- cntrl0Reg = mfdcr(cntrl0);
- mtdcr(cntrl0, cntrl0Reg | 0x00001000);
-
- return (0);
-}
-
-
-/*
- * Check Board Identity:
- */
-int checkboard (void)
-{
- int index;
- int len;
- char str[64];
- int i = getenv_r ("serial#", str, sizeof (str));
-
- puts ("Board: ");
-
- if (i == -1) {
- puts ("### No HW ID - assuming DU405");
- } else {
- puts (str);
- }
-
- puts ("\nFPGA: ");
-
- /* display infos on fpgaimage */
- index = 15;
- for (i = 0; i < 4; i++) {
- len = fpgadata[index];
- printf ("%s ", &(fpgadata[index + 1]));
- index += len + 3;
- }
-
- putc ('\n');
-
- /*
- * Reset external DUART via FPGA
- */
- *(volatile unsigned char *) FPGA_MODE_REG = 0xff; /* reset high active */
- *(volatile unsigned char *) FPGA_MODE_REG = 0x00; /* low again */
-
- /*
- * Disable sleep mode in LXT971
- */
- lxt971_no_sleep();
-
- return 0;
-}
-
-
-long int initdram (int board_type)
-{
- return (16 * 1024 * 1024);
-}
-
-
-int testdram (void)
-{
- /* TODO: XXX XXX XXX */
- printf ("test: 16 MB - ok\n");
-
- return (0);
-}
diff --git a/board/esd/du405/du405.h b/board/esd/du405/du405.h
deleted file mode 100644
index 768e84380c..0000000000
--- a/board/esd/du405/du405.h
+++ /dev/null
@@ -1,44 +0,0 @@
-/*
- * (C) Copyright 2000, 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/****************************************************************************
- * FLASH Memory Map as used by TQ Monitor:
- *
- * Start Address Length
- * +-----------------------+ 0x4000_0000 Start of Flash -----------------
- * | MON8xx code | 0x4000_0100 Reset Vector
- * +-----------------------+ 0x400?_????
- * | (unused) |
- * +-----------------------+ 0x4001_FF00
- * | Ethernet Addresses | 0x78
- * +-----------------------+ 0x4001_FF78
- * | (Reserved for MON8xx) | 0x44
- * +-----------------------+ 0x4001_FFBC
- * | Lock Address | 0x04
- * +-----------------------+ 0x4001_FFC0 ^
- * | Hardware Information | 0x40 | MON8xx
- * +=======================+ 0x4002_0000 (sector border) -----------------
- * | Autostart Header | | Applications
- * | ... | v
- *
- *****************************************************************************/
diff --git a/board/esd/du405/flash.c b/board/esd/du405/flash.c
deleted file mode 100644
index 14549c0147..0000000000
--- a/board/esd/du405/flash.c
+++ /dev/null
@@ -1,123 +0,0 @@
-/*
- * (C) Copyright 2001
- * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <ppc4xx.h>
-#include <asm/processor.h>
-
-/*
- * include common flash code (for esd boards)
- */
-#include "../common/flash.c"
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (vu_long * addr, flash_info_t * info);
-static void flash_get_offsets (ulong base, flash_info_t * info);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- unsigned long size_b0, size_b1;
- int i;
- uint pbcr;
- unsigned long base_b0, base_b1;
-
- /* Init: no FLASHes known */
- for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* Static FLASH Bank configuration here - FIXME XXX */
-
- base_b0 = FLASH_BASE0_PRELIM;
- size_b0 = flash_get_size ((vu_long *) base_b0, &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size_b0, size_b0 << 20);
- }
-
- base_b1 = FLASH_BASE1_PRELIM;
- size_b1 = flash_get_size ((vu_long *) base_b1, &flash_info[1]);
-
- /* Re-do sizing to get full correct info */
-
- if (size_b1) {
- mtdcr (ebccfga, pb0cr);
- pbcr = mfdcr (ebccfgd);
- mtdcr (ebccfga, pb0cr);
- base_b1 = -size_b1;
- pbcr = (pbcr & 0x0001ffff) | base_b1 |
- (((size_b1 / 1024 / 1024) - 1) << 17);
- mtdcr (ebccfgd, pbcr);
- /* printf("pb1cr = %x\n", pbcr); */
- }
-
- if (size_b0) {
- mtdcr (ebccfga, pb1cr);
- pbcr = mfdcr (ebccfgd);
- mtdcr (ebccfga, pb1cr);
- base_b0 = base_b1 - size_b0;
- pbcr = (pbcr & 0x0001ffff) | base_b0 |
- (((size_b0 / 1024 / 1024) - 1) << 17);
- mtdcr (ebccfgd, pbcr);
- /* printf("pb0cr = %x\n", pbcr); */
- }
-
- size_b0 = flash_get_size ((vu_long *) base_b0, &flash_info[0]);
-
- flash_get_offsets (base_b0, &flash_info[0]);
-
- /* monitor protection ON by default */
- flash_protect (FLAG_PROTECT_SET,
- base_b0 + size_b0 - monitor_flash_len,
- base_b0 + size_b0 - 1, &flash_info[0]);
-
- if (size_b1) {
- /* Re-do sizing to get full correct info */
- size_b1 = flash_get_size ((vu_long *) base_b1, &flash_info[1]);
-
- flash_get_offsets (base_b1, &flash_info[1]);
-
- /* monitor protection ON by default */
- flash_protect (FLAG_PROTECT_SET,
- base_b1 + size_b1 - monitor_flash_len,
- base_b1 + size_b1 - 1, &flash_info[1]);
- /* monitor protection OFF by default (one is enough) */
- flash_protect (FLAG_PROTECT_CLEAR,
- base_b0 + size_b0 - monitor_flash_len,
- base_b0 + size_b0 - 1, &flash_info[0]);
- } else {
- flash_info[1].flash_id = FLASH_UNKNOWN;
- flash_info[1].sector_count = -1;
- }
-
- flash_info[0].size = size_b0;
- flash_info[1].size = size_b1;
-
- return (size_b0 + size_b1);
-}
diff --git a/board/esd/du405/fpgadata.c b/board/esd/du405/fpgadata.c
deleted file mode 100644
index fd80d2cd86..0000000000
--- a/board/esd/du405/fpgadata.c
+++ /dev/null
@@ -1,703 +0,0 @@
- 0x00,0x09,0x0f,0xf0,0x0f,0xf0,0x0f,0xf0,0x0f,0xf0,0x00,0x00,0x01,0x61,0x00,0x0d,
- 0x64,0x75,0x72,0x61,0x67,0x34,0x30,0x35,0x2e,0x6e,0x63,0x64,0x00,0x62,0x00,0x0b,
- 0x73,0x32,0x30,0x78,0x6c,0x74,0x71,0x31,0x34,0x34,0x00,0x63,0x00,0x0b,0x32,0x30,
- 0x30,0x32,0x2f,0x30,0x32,0x2f,0x32,0x31,0x00,0x64,0x00,0x09,0x31,0x32,0x3a,0x35,
- 0x31,0x3a,0x30,0x38,0x00,0x65,0xe2,0x01,0x00,0x00,0x2b,0x98,0xff,0x30,0xe6,0xe5,
- 0xe5,0x02,0x04,0x01,0xe6,0x04,0x01,0x0d,0x04,0x04,0x02,0x01,0x04,0x04,0x03,0x07,
- 0x01,0x03,0x01,0x04,0x11,0x01,0x06,0x02,0x15,0x09,0x02,0x05,0x07,0x02,0x02,0x01,
- 0x09,0x03,0x07,0x01,0x03,0x01,0x0b,0x05,0x03,0x01,0x07,0x08,0xe5,0xe5,0x24,0x05,
- 0x09,0x11,0x01,0x03,0x03,0x05,0x0d,0x09,0x0b,0x09,0x01,0x1d,0x09,0x13,0x03,0x05,
- 0x12,0xe6,0x11,0x01,0x03,0x02,0x02,0x03,0x03,0x01,0x15,0x01,0x02,0x28,0x01,0x05,
- 0x02,0xe5,0xe5,0x02,0x02,0x02,0x0d,0x02,0x02,0x03,0x02,0xe5,0xe5,0x14,0x01,0x02,
- 0xe5,0x12,0x0b,0x03,0x0f,0x09,0x09,0x09,0x09,0x09,0x04,0x01,0x02,0x06,0x02,0x09,
- 0x06,0xe7,0x05,0x04,0x06,0x02,0x06,0x02,0x09,0x07,0xe6,0x08,0x09,0x07,0xe6,0x08,
- 0x09,0x0e,0xe5,0xe6,0x0d,0x05,0xe5,0x01,0x05,0xe5,0x01,0x05,0xe5,0x07,0x09,0xe5,
- 0x01,0x05,0xe5,0x07,0xe6,0xe5,0x04,0x03,0x05,0xe8,0x04,0xe6,0x02,0x05,0xe6,0xe5,
- 0x04,0xe6,0x06,0x03,0x05,0xe5,0xe6,0x04,0xe5,0x07,0x09,0xe5,0xe6,0x04,0x09,0x09,
- 0x09,0xe8,0x46,0x09,0x14,0xe5,0x06,0x0b,0x09,0x15,0x1d,0x24,0x02,0xe5,0xe5,0x45,
- 0x08,0x15,0x33,0x1d,0x28,0x70,0xe5,0x09,0x09,0x14,0x42,0x02,0xe5,0x30,0x27,0x01,
- 0x15,0x1b,0x1d,0x32,0x01,0x01,0x5b,0x0c,0x51,0x24,0x01,0xe5,0xe5,0x28,0xe5,0x1c,
- 0x25,0x53,0x19,0xe5,0x01,0x2b,0x45,0x6c,0xe5,0xe6,0x35,0x09,0x07,0x01,0x09,0x09,
- 0x12,0x63,0x09,0x02,0x03,0x0c,0x09,0x09,0x09,0x09,0x09,0x09,0x07,0x01,0x09,0x01,
- 0x07,0x0b,0x09,0x09,0x09,0x09,0x09,0x09,0x09,0x09,0x09,0x0d,0x02,0xe5,0x02,0x0c,
- 0x09,0x09,0x09,0x06,0x02,0x05,0xe5,0x01,0x07,0x01,0x05,0x03,0x07,0x01,0x09,0x0b,
- 0x09,0x09,0x09,0x09,0x09,0x09,0x09,0x09,0x09,0x0d,0xe5,0x01,0x05,0x07,0xe5,0x05,
- 0x01,0xe5,0x07,0xe5,0x07,0xe5,0x07,0x03,0x05,0xe5,0x07,0x09,0xe5,0x07,0x09,0xe5,
- 0x07,0x01,0xe5,0x07,0xe5,0x07,0xe5,0x07,0xe5,0x07,0xe5,0x07,0xe5,0x07,0xe5,0x07,
- 0xe5,0x07,0xe5,0x04,0x02,0xe5,0x12,0x04,0x0b,0x05,0x02,0xe5,0x07,0xe5,0x08,0x09,
- 0x08,0xe5,0x08,0x09,0x09,0x09,0x06,0x03,0xe5,0x07,0xe5,0x08,0x08,0xe5,0x07,0xe5,
- 0x08,0x09,0x04,0x03,0xe5,0x08,0x09,0x0d,0x01,0xe6,0x05,0x06,0xe5,0x07,0xe5,0xe5,
- 0x05,0xe5,0xe5,0x01,0x03,0xe5,0x14,0x06,0x09,0x13,0xe5,0x09,0xe5,0xe5,0x05,0xe5,
- 0xe5,0x05,0xe5,0x07,0xe5,0xe5,0x05,0xe5,0xe5,0x05,0xe5,0x07,0xe5,0x07,0xe5,0xe5,
- 0x05,0xe5,0x07,0xe5,0x07,0x02,0x03,0xe8,0x0e,0x01,0x09,0x09,0x07,0x08,0xe5,0x07,
- 0x09,0xe5,0x07,0xe5,0x07,0xe5,0x08,0x01,0x0b,0x09,0x07,0x0b,0x09,0x07,0x09,0x13,
- 0x09,0x0e,0x02,0xe5,0x0c,0x09,0x03,0x05,0x09,0x12,0x09,0xe5,0x08,0x13,0x09,0x01,
- 0x09,0x09,0x09,0x09,0x09,0x09,0x07,0x01,0x09,0x09,0x10,0xe8,0x03,0x08,0x02,0x03,
- 0x02,0x02,0x06,0x02,0x03,0x02,0x02,0x06,0x02,0x09,0x06,0x02,0x06,0x02,0x06,0x02,
- 0x06,0x02,0x04,0x01,0x01,0x02,0x06,0x02,0x06,0x02,0x06,0x02,0xe5,0x04,0x02,0x06,
- 0x02,0x06,0x02,0x06,0x02,0x03,0x02,0x02,0x06,0x02,0x0d,0x01,0x01,0x03,0xe5,0x09,
- 0x09,0x09,0xe5,0x0f,0xe5,0x25,0x0b,0x04,0xe5,0x01,0x02,0x06,0x02,0x13,0x09,0x36,
- 0x0d,0x23,0x35,0x82,0x01,0x03,0x10,0x09,0x02,0x06,0x11,0x09,0x1c,0xe5,0x0a,0x03,
- 0xe6,0xe5,0x02,0x03,0x05,0x0d,0x05,0x03,0x05,0x17,0x27,0x02,0xe5,0x29,0x50,0x27,
- 0x11,0x28,0xe5,0x01,0x10,0x09,0x09,0x09,0x09,0x04,0x04,0xe5,0x07,0xe5,0x07,0x09,
- 0x09,0x0b,0x09,0x09,0x09,0x09,0x09,0x09,0x09,0x09,0x09,0x0e,0xe7,0x0e,0xe5,0x02,
- 0x02,0x02,0x06,0x02,0x10,0xe5,0xe5,0x38,0x1e,0x06,0x02,0x13,0x01,0xe5,0x2c,0xe6,
- 0x17,0x09,0x06,0x09,0x01,0x10,0x19,0x24,0x13,0x13,0x02,0x11,0x16,0x05,0x02,0x03,
- 0x01,0x10,0xe5,0x08,0x70,0x09,0x3f,0x01,0x02,0xe5,0x02,0x26,0x11,0x09,0x28,0x02,
- 0x6c,0xe5,0xe5,0x13,0xca,0x02,0x0d,0x01,0x07,0x01,0x07,0x1d,0x01,0x04,0x0e,0x07,
- 0x01,0x13,0x01,0x07,0xe6,0x10,0xe5,0x03,0x46,0x01,0x01,0x0d,0x01,0x07,0x02,0x03,
- 0x05,0x1d,0x10,0x09,0x02,0x0e,0x02,0xe5,0x01,0x07,0x35,0x29,0xe6,0xe5,0x18,0x12,
- 0xe5,0x10,0x08,0x1a,0x2c,0x09,0x43,0xe5,0xe6,0x14,0x01,0xe6,0x04,0x04,0x23,0x04,
- 0x12,0x0b,0x09,0x63,0x03,0x02,0xe5,0x71,0x30,0x3c,0x01,0x17,0xe5,0xe5,0x29,0x35,
- 0x5e,0x03,0x03,0x09,0x0f,0x0b,0x20,0x27,0x71,0x01,0x0f,0x04,0x03,0x05,0x02,0x01,
- 0x04,0x09,0x09,0x32,0x02,0x65,0x01,0x03,0x01,0xe6,0x0d,0xe5,0x10,0x01,0x27,0x02,
- 0x09,0x89,0x0e,0x03,0x33,0x03,0x03,0x29,0x03,0x04,0x2c,0x2f,0xe6,0xe7,0xd9,0xe7,
- 0xe6,0x01,0x01,0x23,0xe5,0xae,0x01,0x03,0x02,0x04,0xd4,0x08,0x02,0xd8,0x03,0x01,
- 0xe5,0x16,0x01,0x11,0x01,0xb2,0x01,0x01,0x15,0x01,0x01,0x0f,0x01,0x01,0xab,0x06,
- 0x17,0x01,0x11,0x01,0xaf,0xe5,0xe5,0xe5,0x16,0x01,0x11,0x01,0xb1,0x02,0x4f,0xe5,
- 0x86,0x06,0x01,0xe5,0x4f,0xe5,0x8b,0x03,0xe5,0x0d,0x09,0x09,0x09,0x09,0x09,0x06,
- 0x02,0x09,0x09,0x09,0x0b,0x09,0x09,0x09,0x09,0x09,0x09,0x09,0x09,0x09,0x0d,0x02,
- 0xe6,0x01,0x44,0xe5,0x91,0x03,0x01,0xe5,0x44,0x9a,0x01,0x0f,0x13,0x24,0xe5,0xe5,
- 0x91,0xe5,0x01,0x0f,0xe5,0x11,0xe5,0x23,0x01,0xe5,0x92,0xe7,0x0d,0x13,0x25,0x01,
- 0x91,0xe6,0x01,0x09,0x05,0x03,0xe7,0x05,0xe7,0x01,0x04,0xe6,0x05,0xe7,0x07,0xe5,
- 0x07,0xe6,0xe5,0x04,0xe5,0x07,0xe5,0x07,0xe5,0x07,0xe5,0x09,0xe5,0x07,0xe5,0x07,
- 0xe5,0x07,0xe5,0x07,0xe5,0x07,0xe5,0x07,0xe5,0x07,0xe5,0x07,0xe5,0x07,0xe5,0x07,
- 0x01,0xe5,0x0e,0x04,0x05,0x03,0x04,0x04,0x08,0x17,0x01,0x92,0x02,0xe5,0x0e,0x06,
- 0x03,0x02,0x02,0x02,0x06,0x07,0x01,0x16,0x8b,0x05,0xe5,0x01,0xe6,0x0d,0x03,0x01,
- 0x09,0x03,0x05,0x09,0x15,0x28,0x64,0x04,0xe7,0x01,0x03,0x0b,0x03,0xe7,0x02,0x02,
- 0x01,0xe5,0x01,0x03,0xe7,0x02,0x03,0xe6,0x13,0x01,0x90,0x04,0xe5,0xd9,0x03,0xe5,
- 0xe6,0x10,0x01,0xe5,0x05,0x01,0x07,0x01,0x07,0x01,0x07,0x01,0x07,0x01,0x07,0x01,
- 0x07,0x01,0x07,0x01,0x01,0x05,0x01,0x04,0x04,0x01,0x01,0x05,0x01,0x07,0x01,0x01,
- 0x05,0x01,0x07,0x01,0x01,0x05,0x01,0x07,0x01,0x02,0x04,0x01,0x07,0x01,0x07,0x01,
- 0x0b,0xe7,0x4e,0x8e,0xe6,0xe6,0x12,0x3c,0x1e,0x0b,0x13,0x09,0x19,0x16,0x11,0xe9,
- 0x03,0x19,0x32,0x0a,0x09,0x09,0xe5,0x4f,0x09,0x08,0xe5,0x01,0x08,0xe6,0x46,0x01,
- 0x26,0x08,0x5d,0x08,0x4a,0xe5,0x01,0x22,0x37,0x03,0x0a,0x21,0x04,0xe5,0xe6,0x08,
- 0x0b,0x03,0x15,0x40,0x3f,0x2d,0x02,0x0c,0x36,0x2d,0xe5,0x08,0x32,0xe5,0x2f,0xe5,
- 0x45,0x28,0x01,0x3d,0x30,0xe6,0x04,0x04,0x66,0x01,0xe5,0x05,0x62,0xe8,0x70,0x03,
- 0x68,0x03,0x72,0x01,0x3a,0x01,0x2c,0x01,0x01,0xb3,0x20,0x08,0xe5,0x02,0x05,0x6c,
- 0x06,0x0c,0x2e,0x28,0x01,0xe6,0xe5,0xd9,0xe6,0xe5,0xe5,0xe5,0x01,0xd4,0x01,0x02,
- 0x01,0x01,0x04,0xa7,0xe5,0x2a,0x04,0xe5,0xe6,0x01,0xa9,0xe5,0xe5,0x2a,0x02,0x02,
- 0xe6,0x0a,0xa2,0x01,0x25,0x06,0x02,0xe5,0xe5,0x07,0xe6,0xa1,0x01,0x01,0x02,0x01,
- 0x23,0x04,0xe5,0x4f,0x01,0x5c,0x01,0x2c,0x01,0x01,0xaf,0x01,0x2d,0xe8,0xe0,0xe0,
- 0x01,0xe5,0x0d,0x09,0x09,0x09,0x09,0x09,0x09,0x09,0x09,0x09,0x0b,0x09,0x09,0x09,
- 0x09,0x09,0x09,0x09,0x09,0x09,0x06,0x06,0xe5,0xe5,0xe5,0xd2,0x02,0x04,0x05,0xe5,
- 0xd4,0x09,0x02,0x46,0x6a,0x2c,0x02,0xe5,0xae,0x01,0xe5,0x2a,0x01,0x01,0xe5,0xaf,
- 0x2d,0xe5,0xe5,0x08,0x0b,0xe5,0x07,0xe5,0x07,0xe5,0x07,0xe5,0x07,0xe5,0x07,0xe5,
- 0x07,0xe5,0x07,0xe5,0x07,0xe5,0x07,0xe5,0x09,0xe5,0x07,0xe5,0x07,0xe5,0x07,0xe5,
- 0x07,0xe5,0x07,0xe6,0xe5,0x04,0xe5,0x07,0xe5,0x07,0xe5,0x07,0xe5,0x05,0xe5,0xe7,
- 0x4b,0xe5,0x27,0x3a,0x2c,0xe8,0x75,0x38,0x01,0x2d,0x01,0xe6,0xaf,0x2c,0x02,0xe5,
- 0x02,0x48,0x29,0x38,0x01,0x2c,0xe5,0x01,0xaf,0x2d,0xe6,0xe6,0x09,0x06,0x01,0x01,
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- 0x87,0x01,0xe6,0x18,0x03,0x05,0x09,0x09,0x09,0x09,0x09,0x13,0x0b,0x09,0x04,0x04,
- 0x09,0x04,0x04,0x02,0x06,0x09,0x09,0x09,0x09,0x0e,0x01,0x01,0x0d,0xe5,0x07,0xe6,
- 0x06,0xe6,0x06,0xe5,0x07,0xe5,0x07,0xe6,0x06,0xe6,0x06,0xe5,0x07,0xe5,0x07,0xe5,
- 0x01,0x03,0x03,0xe5,0x07,0xe5,0x07,0xe5,0x07,0xe5,0x07,0xe5,0x07,0xe5,0x07,0xe5,
- 0x07,0xe5,0x07,0xe5,0x07,0xe5,0x0e,0xe8,0x02,0x05,0x03,0x09,0x01,0x04,0x02,0x01,
- 0x07,0x09,0x09,0x01,0x07,0x01,0x07,0x09,0x07,0x01,0x0b,0x09,0x09,0x09,0x09,0x09,
- 0x09,0x09,0x09,0x09,0x14,0x0e,0x09,0x09,0x09,0xe5,0xe5,0x05,0xe5,0xe5,0x05,0x09,
- 0x09,0xe5,0xe5,0x05,0x09,0xe5,0xe5,0x07,0xe5,0xe5,0x05,0xe5,0xe5,0x05,0xe5,0xe5,
- 0x05,0xe5,0xe5,0x05,0xe5,0xe5,0x05,0xe5,0xe5,0x05,0xe5,0xe5,0x05,0xe5,0xe5,0x05,
- 0xe5,0xe5,0x05,0xe5,0xe5,0x0f,0x0e,0x09,0x01,0x07,0x09,0x09,0x09,0x09,0x09,0x09,
- 0x01,0x07,0x0b,0x09,0x09,0x09,0x09,0x09,0x09,0x09,0x09,0x09,0x0f,0x01,0xe6,0x47,
- 0x11,0x76,0x0c,0x01,0x01,0x0e,0x05,0x03,0x05,0x03,0x09,0x05,0x03,0x09,0x09,0x09,
- 0x09,0x09,0x06,0x01,0x02,0x05,0x03,0x09,0x09,0x09,0x09,0x09,0x09,0x09,0x09,0x0f,
- 0xe8,0x0f,0x13,0x1d,0x09,0x24,0x70,0x10,0x09,0x09,0x09,0x09,0x09,0x09,0x05,0x03,
- 0x09,0x09,0x0b,0x09,0x09,0x09,0x09,0x09,0x09,0x09,0x09,0x09,0x0e,0x01,0xe5,0x46,
- 0x96,0x02,0xe5,0x70,0x6e,0x01,0x22,0x1d,0x09,0x13,0x11,0xe5,0x67,0x06,0xe5,0x06,
- 0x06,0x06,0x02,0x06,0x02,0x06,0x16,0x06,0x02,0x13,0x06,0x79,0xe5,0xe5,0x3a,0x1d,
- 0x33,0x1d,0x09,0x2a,0xe6,0x06,0x05,0x08,0xe5,0x07,0xe5,0x07,0x14,0x08,0xe5,0x12,
- 0x08,0x0a,0x65,0x06,0x03,0x71,0x66,0x05,0xe5,0xe6,0xdd,0xe5,0xe6,0x0c,0xe5,0x04,
- 0xe8,0x04,0xe8,0x04,0xe6,0x06,0x09,0x02,0xe5,0x04,0xe8,0x04,0x09,0x02,0xe5,0x04,
- 0xe6,0x06,0x0b,0x09,0x09,0x09,0x09,0x09,0x09,0x09,0x09,0x09,0x09,0x01,0xe6,0x0c,
- 0xe6,0x05,0xe7,0x05,0xe7,0x05,0x01,0xe5,0x08,0x07,0xe6,0x05,0xe7,0x08,0x07,0xe6,
- 0x05,0x02,0x07,0x03,0x09,0x09,0x09,0x09,0x09,0x09,0x09,0x08,0xe5,0x07,0xe5,0x0e,
- 0xe5,0xe5,0x33,0x2d,0x0e,0x10,0x13,0x48,0x02,0x11,0x03,0x05,0x03,0x05,0x03,0x05,
- 0x03,0x01,0x0d,0x03,0x05,0x03,0x01,0x0d,0x03,0x01,0x03,0x07,0x09,0x09,0x09,0x09,
- 0x03,0x05,0x09,0x09,0x11,0x13,0x01,0xe5,0x0a,0x06,0x09,0x09,0x04,0x01,0x02,0x01,
- 0x03,0x07,0x05,0x09,0x01,0x03,0x07,0x0e,0xe5,0x02,0x06,0xe5,0x02,0x04,0x04,0x01,
- 0x07,0x04,0x04,0x05,0x03,0x01,0x07,0x01,0x07,0x01,0x03,0x03,0x02,0x04,0x04,0x06,
- 0x01,0x03,0xe5,0xe5,0xe6,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,
diff --git a/board/esd/du405/u-boot.lds b/board/esd/du405/u-boot.lds
deleted file mode 100644
index 1cf375fef5..0000000000
--- a/board/esd/du405/u-boot.lds
+++ /dev/null
@@ -1,150 +0,0 @@
-/*
- * (C) Copyright 2000, 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- .resetvec 0xFFFFFFFC :
- {
- *(.resetvec)
- } = 0xffff
-
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/ppc4xx/start.o (.text)
- cpu/ppc4xx/traps.o (.text)
- cpu/ppc4xx/interrupts.o (.text)
- cpu/ppc4xx/serial.o (.text)
- cpu/ppc4xx/cpu_init.o (.text)
- cpu/ppc4xx/speed.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/extable.o (.text)
- lib_generic/zlib.o (.text)
-
-/* . = env_offset;*/
-/* common/environment.o(.text)*/
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/esd/hh405/Makefile b/board/esd/hh405/Makefile
deleted file mode 100644
index 9340a32a5f..0000000000
--- a/board/esd/hh405/Makefile
+++ /dev/null
@@ -1,46 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o ../common/misc.o ../common/auto_update.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/esd/hh405/config.mk b/board/esd/hh405/config.mk
deleted file mode 100644
index 7129ad568b..0000000000
--- a/board/esd/hh405/config.mk
+++ /dev/null
@@ -1,31 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# esd VOH405 boards
-#
-
-#TEXT_BASE = 0xFFF00000
-TEXT_BASE = 0xFFF80000
-#TEXT_BASE = 0xFFFC0000
-#TEXT_BASE = 0x00FC0000
diff --git a/board/esd/hh405/flash.c b/board/esd/hh405/flash.c
deleted file mode 100644
index 89af1190a8..0000000000
--- a/board/esd/hh405/flash.c
+++ /dev/null
@@ -1,101 +0,0 @@
-/*
- * (C) Copyright 2001
- * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <ppc4xx.h>
-#include <asm/processor.h>
-
-/*
- * include common flash code (for esd boards)
- */
-#include "../common/flash.c"
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (vu_long * addr, flash_info_t * info);
-static void flash_get_offsets (ulong base, flash_info_t * info);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- unsigned long size_b0;
- int i;
- uint pbcr;
- unsigned long base_b0;
- int size_val = 0;
-
- /* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* Static FLASH Bank configuration here - FIXME XXX */
-
- size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size_b0, size_b0<<20);
- }
-
- /* Setup offsets */
- flash_get_offsets (-size_b0, &flash_info[0]);
-
- /* Re-do sizing to get full correct info */
- mtdcr(ebccfga, pb0cr);
- pbcr = mfdcr(ebccfgd);
- mtdcr(ebccfga, pb0cr);
- base_b0 = -size_b0;
- switch (size_b0) {
- case 1 << 20:
- size_val = 0;
- break;
- case 2 << 20:
- size_val = 1;
- break;
- case 4 << 20:
- size_val = 2;
- break;
- case 8 << 20:
- size_val = 3;
- break;
- case 16 << 20:
- size_val = 4;
- break;
- }
- pbcr = (pbcr & 0x0001ffff) | base_b0 | (size_val << 17);
- mtdcr(ebccfgd, pbcr);
-
- /* Monitor protection ON by default */
- (void)flash_protect(FLAG_PROTECT_SET,
- -CFG_MONITOR_LEN,
- 0xffffffff,
- &flash_info[0]);
-
- flash_info[0].size = size_b0;
-
- return (size_b0);
-}
diff --git a/board/esd/hh405/fpgadata.c b/board/esd/hh405/fpgadata.c
deleted file mode 100644
index 58ee3a846f..0000000000
--- a/board/esd/hh405/fpgadata.c
+++ /dev/null
@@ -1,2520 +0,0 @@
- 0x1f,0x8b,0x08,0x08,0x9c,0xc4,0xe8,0x42,0x00,0x03,0x68,0x68,0x34,0x30,0x35,0x5f,
- 0x31,0x5f,0x30,0x35,0x2e,0x62,0x69,0x74,0x00,0xec,0xfd,0x0f,0x78,0x14,0xd7,0x91,
- 0x2f,0x0c,0x57,0x9f,0x6e,0x89,0xa3,0xe9,0x91,0xa6,0x91,0x84,0x57,0xb6,0x31,0x6e,
- 0x8d,0x04,0x1e,0x94,0x91,0x18,0x46,0x58,0xc8,0x42,0x8c,0x5a,0x23,0xd9,0x19,0x1b,
- 0x6c,0x26,0x8e,0x93,0x65,0x77,0xfd,0xe5,0x0e,0x84,0x64,0x95,0xbc,0xc4,0x2b,0x3b,
- 0xb9,0x7b,0x49,0xd6,0xeb,0x1c,0x8d,0x04,0x8c,0x90,0x0c,0x03,0x28,0x31,0x4e,0x58,
- 0x6f,0x23,0x64,0x5b,0x38,0x24,0x3b,0x08,0x0c,0x02,0x1c,0xdc,0xc2,0xb2,0x2d,0xfe,
- 0x18,0x2b,0x0e,0xeb,0xe0,0x3f,0x71,0x06,0x47,0x26,0xb2,0x23,0xdb,0x32,0xc6,0x8e,
- 0x04,0x02,0xde,0x3a,0x3d,0x92,0xa6,0x47,0x64,0xf7,0xe6,0xbe,0xf7,0xf9,0xde,0x6f,
- 0x9f,0xe7,0xbb,0xf2,0xf3,0xec,0x9e,0xb4,0x8e,0x9a,0xee,0xd3,0xe7,0x54,0xfd,0xaa,
- 0xea,0x57,0x55,0x90,0xe1,0x18,0x4e,0xfc,0x07,0x20,0xac,0x00,0x47,0x5d,0xdd,0x02,
- 0xcf,0xad,0xff,0x6d,0xfe,0x7f,0xf3,0xdc,0x5a,0xf2,0xc0,0xd7,0x57,0xc1,0x4a,0x90,
- 0xbd,0xdf,0xbd,0xd5,0xf3,0x8d,0xef,0x3d,0x38,0x7f,0xc1,0x02,0xf8,0x3a,0xfe,0x2f,
- 0x8f,0xe7,0xd6,0x79,0x9e,0x85,0xf3,0xbc,0xe5,0xb0,0x0a,0x32,0xe6,0x97,0x56,0x2c,
- 0xf0,0x56,0x78,0x3d,0xf0,0x0d,0x10,0x4a,0x3b,0xae,0xe2,0xcf,0x33,0x8f,0x7f,0xe5,
- 0x9b,0x1e,0x60,0x02,0x00,0x4c,0xf3,0x08,0x21,0xfe,0xff,0x65,0x8f,0xa0,0x0a,0xc0,
- 0xaa,0x8a,0x3d,0x60,0xf0,0xff,0x0d,0xe3,0xbf,0xcf,0xf0,0x80,0x6a,0xfd,0xdf,0x82,
- 0x07,0x34,0x08,0x82,0xd6,0xca,0xb2,0xe1,0x2f,0xf8,0xa1,0x12,0x9b,0x18,0xfe,0x45,
- 0xf3,0x61,0x72,0xfe,0xd5,0xe3,0xec,0x3f,0x9c,0x94,0xfc,0xa9,0x3a,0xaf,0x8f,0x8f,
- 0x18,0xf1,0xfc,0xcf,0xa7,0x0b,0x01,0x98,0xb8,0xeb,0x0f,0xdf,0xfc,0x4b,0xee,0xbf,
- 0xf0,0xf3,0x89,0xfb,0xff,0xaf,0xce,0x07,0xe5,0x2f,0x98,0x8e,0xef,0x3b,0x31,0xf8,
- 0xa1,0x22,0x68,0xb0,0x1c,0xd2,0x41,0x60,0x10,0x82,0xbc,0xff,0x60,0xb0,0xb0,0x77,
- 0x62,0xfe,0xd1,0xb4,0x31,0xef,0x29,0x71,0x61,0x7e,0xd6,0xe7,0x62,0x25,0xbc,0x0a,
- 0x0b,0x8c,0xcc,0x11,0xf1,0x0a,0x8c,0x42,0x45,0x9f,0x3d,0x2e,0x8e,0xc1,0xc7,0x50,
- 0x05,0x77,0xb3,0x1c,0x0f,0xd4,0x8f,0xcf,0x37,0xf2,0x9e,0x57,0x8e,0xab,0x5e,0x95,
- 0x7e,0x4e,0x7e,0x01,0x2d,0xe0,0x8c,0xdb,0xbb,0xc9,0x47,0xd0,0xad,0x16,0xbc,0x69,
- 0xef,0xc4,0xc1,0x06,0x56,0xa2,0xd2,0x08,0x89,0x49,0x13,0xab,0xd8,0x27,0xed,0x86,
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diff --git a/board/esd/hh405/hh405.c b/board/esd/hh405/hh405.c
deleted file mode 100644
index 3158803f0c..0000000000
--- a/board/esd/hh405/hh405.c
+++ /dev/null
@@ -1,877 +0,0 @@
-/*
- * (C) Copyright 2001-2004
- * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
- *
- * (C) Copyright 2005
- * Stefan Roese, DENX Software Engineering, sr@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/processor.h>
-#include <command.h>
-#include <malloc.h>
-#include <pci.h>
-#include <sm501.h>
-
-
-#ifdef CONFIG_VIDEO_SM501
-
-#define SWAP32(x) ((((x) & 0x000000ff) << 24) | (((x) & 0x0000ff00) << 8)|\
- (((x) & 0x00ff0000) >> 8) | (((x) & 0xff000000) >> 24) )
-
-#ifdef CONFIG_VIDEO_SM501_8BPP
-#error CONFIG_VIDEO_SM501_8BPP not supported.
-#endif /* CONFIG_VIDEO_SM501_8BPP */
-
-#ifdef CONFIG_VIDEO_SM501_16BPP
-#define BPP 16
-
-/*
- * 800x600 display B084SN03: PCLK = 40MHz
- * => 2*PCLK = 80MHz
- * 336/4 = 84MHz
- * => PCLK = 84MHz
- */
-static const SMI_REGS init_regs_800x600 [] =
-{
-#if 1 /* test-only */
- {0x0005c, SWAP32(0xffffffff)}, /* set endianess to big endian */
-#else
- {0x0005c, SWAP32(0x00000000)}, /* set endianess to little endian */
-#endif
- {0x00004, SWAP32(0x00000000)},
- /* clocks for pm1... */
- {0x00048, SWAP32(0x00021807)},
- {0x0004C, SWAP32(0x221a0a01)},
- {0x00054, SWAP32(0x00000001)},
- /* clocks for pm0... */
- {0x00040, SWAP32(0x00021807)},
- {0x00044, SWAP32(0x221a0a01)},
- {0x00054, SWAP32(0x00000000)},
- /* panel control regs... */
- {0x80000, SWAP32(0x0f013105)}, /* panel display control: 16-bit RGB 5:6:5 mode */
- {0x80004, SWAP32(0xc428bb17)}, /* panel panning control ??? */
- {0x8000C, SWAP32(0x00000000)}, /* panel fb address */
- {0x80010, SWAP32(0x06400640)}, /* panel fb offset/window width */
- {0x80014, SWAP32(0x03200000)}, /* panel fb width (0x320=800) */
- {0x80018, SWAP32(0x02580000)}, /* panel fb height (0x258=600) */
- {0x8001C, SWAP32(0x00000000)}, /* panel plane tl location */
- {0x80020, SWAP32(0x02580320)}, /* panel plane br location */
- {0x80024, SWAP32(0x041f031f)}, /* panel horizontal total */
- {0x80028, SWAP32(0x00800347)}, /* panel horizontal sync */
- {0x8002C, SWAP32(0x02730257)}, /* panel vertical total */
- {0x80030, SWAP32(0x00040258)}, /* panel vertical sync */
- {0x80200, SWAP32(0x00010000)}, /* crt display control */
- {0, 0}
-};
-
-/*
- * 1024x768 display G150XG02: PCLK = 65MHz
- * => 2*PCLK = 130MHz
- * 288/2 = 144MHz
- * => PCLK = 72MHz
- */
-static const SMI_REGS init_regs_1024x768 [] =
-{
- {0x00004, SWAP32(0x00000000)},
- /* clocks for pm1... */
- {0x00048, SWAP32(0x00021807)},
- {0x0004C, SWAP32(0x011a0a01)},
- {0x00054, SWAP32(0x00000001)},
- /* clocks for pm0... */
- {0x00040, SWAP32(0x00021807)},
- {0x00044, SWAP32(0x011a0a01)},
- {0x00054, SWAP32(0x00000000)},
- /* panel control regs... */
- {0x80000, SWAP32(0x0f013105)}, /* panel display control: 16-bit RGB 5:6:5 mode */
- {0x80004, SWAP32(0xc428bb17)}, /* panel panning control ??? */
- {0x8000C, SWAP32(0x00000000)}, /* panel fb address */
- {0x80010, SWAP32(0x08000800)}, /* panel fb offset/window width */
- {0x80014, SWAP32(0x04000000)}, /* panel fb width (0x400=1024) */
- {0x80018, SWAP32(0x03000000)}, /* panel fb height (0x300=768) */
- {0x8001C, SWAP32(0x00000000)}, /* panel plane tl location */
- {0x80020, SWAP32(0x03000400)}, /* panel plane br location */
- {0x80024, SWAP32(0x053f03ff)}, /* panel horizontal total */
- {0x80028, SWAP32(0x0140040f)}, /* panel horizontal sync */
- {0x8002C, SWAP32(0x032502ff)}, /* panel vertical total */
- {0x80030, SWAP32(0x00260301)}, /* panel vertical sync */
- {0x80200, SWAP32(0x00010000)}, /* crt display control */
- {0, 0}
-};
-
-#endif /* CONFIG_VIDEO_SM501_16BPP */
-
-#ifdef CONFIG_VIDEO_SM501_32BPP
-#define BPP 32
-
-/*
- * 800x600 display B084SN03: PCLK = 40MHz
- * => 2*PCLK = 80MHz
- * 336/4 = 84MHz
- * => PCLK = 84MHz
- */
-static const SMI_REGS init_regs_800x600 [] =
-{
-#if 0 /* test-only */
- {0x0005c, SWAP32(0xffffffff)}, /* set endianess to big endian */
-#else
- {0x0005c, SWAP32(0x00000000)}, /* set endianess to little endian */
-#endif
- {0x00004, SWAP32(0x00000000)},
- /* clocks for pm1... */
- {0x00048, SWAP32(0x00021807)},
- {0x0004C, SWAP32(0x221a0a01)},
- {0x00054, SWAP32(0x00000001)},
- /* clocks for pm0... */
- {0x00040, SWAP32(0x00021807)},
- {0x00044, SWAP32(0x221a0a01)},
- {0x00054, SWAP32(0x00000000)},
- /* panel control regs... */
- {0x80000, SWAP32(0x0f013106)}, /* panel display control: 32-bit RGB 8:8:8 mode */
- {0x80004, SWAP32(0xc428bb17)}, /* panel panning control ??? */
- {0x8000C, SWAP32(0x00000000)}, /* panel fb address */
- {0x80010, SWAP32(0x0c800c80)}, /* panel fb offset/window width */
- {0x80014, SWAP32(0x03200000)}, /* panel fb width (0x320=800) */
- {0x80018, SWAP32(0x02580000)}, /* panel fb height (0x258=600) */
- {0x8001C, SWAP32(0x00000000)}, /* panel plane tl location */
- {0x80020, SWAP32(0x02580320)}, /* panel plane br location */
- {0x80024, SWAP32(0x041f031f)}, /* panel horizontal total */
- {0x80028, SWAP32(0x00800347)}, /* panel horizontal sync */
- {0x8002C, SWAP32(0x02730257)}, /* panel vertical total */
- {0x80030, SWAP32(0x00040258)}, /* panel vertical sync */
- {0x80200, SWAP32(0x00010000)}, /* crt display control */
- {0, 0}
-};
-
-/*
- * 1024x768 display G150XG02: PCLK = 65MHz
- * => 2*PCLK = 130MHz
- * 288/2 = 144MHz
- * => PCLK = 72MHz
- */
-static const SMI_REGS init_regs_1024x768 [] =
-{
- {0x00004, SWAP32(0x00000000)},
- /* clocks for pm1... */
- {0x00048, SWAP32(0x00021807)},
- {0x0004C, SWAP32(0x011a0a01)},
- {0x00054, SWAP32(0x00000001)},
- /* clocks for pm0... */
- {0x00040, SWAP32(0x00021807)},
- {0x00044, SWAP32(0x011a0a01)},
- {0x00054, SWAP32(0x00000000)},
- /* panel control regs... */
- {0x80000, SWAP32(0x0f013106)}, /* panel display control: 32-bit RGB 8:8:8 mode */
- {0x80004, SWAP32(0xc428bb17)}, /* panel panning control ??? */
- {0x8000C, SWAP32(0x00000000)}, /* panel fb address */
- {0x80010, SWAP32(0x10001000)}, /* panel fb offset/window width */
- {0x80014, SWAP32(0x04000000)}, /* panel fb width (0x400=1024) */
- {0x80018, SWAP32(0x03000000)}, /* panel fb height (0x300=768) */
- {0x8001C, SWAP32(0x00000000)}, /* panel plane tl location */
- {0x80020, SWAP32(0x03000400)}, /* panel plane br location */
- {0x80024, SWAP32(0x053f03ff)}, /* panel horizontal total */
- {0x80028, SWAP32(0x0140040f)}, /* panel horizontal sync */
- {0x8002C, SWAP32(0x032502ff)}, /* panel vertical total */
- {0x80030, SWAP32(0x00260301)}, /* panel vertical sync */
- {0x80200, SWAP32(0x00010000)}, /* crt display control */
- {0, 0}
-};
-
-#endif /* CONFIG_VIDEO_SM501_32BPP */
-
-#endif /* CONFIG_VIDEO_SM501 */
-
-#if 0
-#define FPGA_DEBUG
-#endif
-
-extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
-extern void lxt971_no_sleep(void);
-
-/* fpga configuration data - gzip compressed and generated by bin2c */
-const unsigned char fpgadata[] =
-{
-#include "fpgadata.c"
-};
-
-/*
- * include common fpga code (for esd boards)
- */
-#include "../common/fpga.c"
-
-
-/* Prototypes */
-int gunzip(void *, int, unsigned char *, unsigned long *);
-
-
-/* logo bitmap data - gzip compressed and generated by bin2c */
-unsigned char logo_bmp_320[] =
-{
-#include "logo_320_240_4bpp.c"
-};
-
-unsigned char logo_bmp_320_8bpp[] =
-{
-#include "logo_320_240_8bpp.c"
-};
-
-unsigned char logo_bmp_640[] =
-{
-#include "logo_640_480_24bpp.c"
-};
-
-unsigned char logo_bmp_1024[] =
-{
-#include "logo_1024_768_8bpp.c"
-};
-
-
-/*
- * include common lcd code (for esd boards)
- */
-#include "../common/lcd.c"
-
-#include "../common/s1d13704_320_240_4bpp.h"
-#include "../common/s1d13705_320_240_8bpp.h"
-#include "../common/s1d13806_640_480_16bpp.h"
-#include "../common/s1d13806_1024_768_8bpp.h"
-
-
-/*
- * include common auto-update code (for esd boards)
- */
-#include "../common/auto_update.h"
-
-au_image_t au_image[] = {
- {"hh405/preinst.img", 0, -1, AU_SCRIPT},
- {"hh405/u-boot.img", 0xfff80000, 0x00080000, AU_FIRMWARE},
- {"hh405/pImage_${bd_type}", 0x00000000, 0x00100000, AU_NAND},
- {"hh405/pImage.initrd", 0x00100000, 0x00200000, AU_NAND},
- {"hh405/yaffsmt2.img", 0x00300000, 0x01c00000, AU_NAND},
- {"hh405/postinst.img", 0, 0, AU_SCRIPT},
-};
-
-int N_AU_IMAGES = (sizeof(au_image) / sizeof(au_image[0]));
-
-
-int board_revision(void)
-{
- unsigned long osrh_reg;
- unsigned long isr1h_reg;
- unsigned long tcr_reg;
- unsigned long value;
-
- /*
- * Get version of HH405 board from GPIO's
- */
-
- /*
- * Setup GPIO pins (BLAST/GPIO0 and GPIO9 as GPIO)
- */
- osrh_reg = in32(GPIO0_OSRH);
- isr1h_reg = in32(GPIO0_ISR1H);
- tcr_reg = in32(GPIO0_TCR);
- out32(GPIO0_OSRH, osrh_reg & ~0xC0003000); /* output select */
- out32(GPIO0_ISR1H, isr1h_reg | 0xC0003000); /* input select */
- out32(GPIO0_TCR, tcr_reg & ~0x80400000); /* select input */
-
- udelay(1000); /* wait some time before reading input */
- value = in32(GPIO0_IR) & 0x80400000; /* get config bits */
-
- /*
- * Restore GPIO settings
- */
- out32(GPIO0_OSRH, osrh_reg); /* output select */
- out32(GPIO0_ISR1H, isr1h_reg); /* input select */
- out32(GPIO0_TCR, tcr_reg); /* enable output driver for outputs */
-
- if (value & 0x80000000) {
- /* Revision 1.0 or 1.1 detected */
- return 0x0101;
- } else {
- if (value & 0x00400000) {
- /* unused */
- return 0x0103;
- } else {
- /* Revision >= 2.0 detected */
- /* rev. 2.x uses four SM501 GPIOs for revision coding */
- return 0x0200;
- }
- }
-}
-
-
-int board_early_init_f (void)
-{
- /*
- * IRQ 0-15 405GP internally generated; active high; level sensitive
- * IRQ 16 405GP internally generated; active low; level sensitive
- * IRQ 17-24 RESERVED
- * IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive
- * IRQ 26 (EXT IRQ 1) SER0 ; active low; level sensitive
- * IRQ 27 (EXT IRQ 2) SER1; active low; level sensitive
- * IRQ 28 (EXT IRQ 3) FPGA 0; active low; level sensitive
- * IRQ 29 (EXT IRQ 4) FPGA 1; active low; level sensitive
- * IRQ 30 (EXT IRQ 5) PCI INTA; active low; level sensitive
- * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
- */
- mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
- mtdcr(uicer, 0x00000000); /* disable all ints */
- mtdcr(uiccr, 0x00000000); /* set all to be non-critical*/
- mtdcr(uicpr, CFG_UIC0_POLARITY);/* set int polarities */
- mtdcr(uictr, 0x10000000); /* set int trigger levels */
- mtdcr(uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority*/
- mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
-
- /*
- * EBC Configuration Register: set ready timeout to 512 ebc-clks -> ca. 15 us
- */
- mtebc (epcr, 0xa8400000); /* ebc always driven */
-
- return 0;
-}
-
-
-int misc_init_r (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- volatile unsigned short *fpga_ctrl =
- (unsigned short *)((ulong)CFG_FPGA_BASE_ADDR + CFG_FPGA_CTRL);
- volatile unsigned short *lcd_contrast =
- (unsigned short *)((ulong)CFG_FPGA_BASE_ADDR + CFG_FPGA_CTRL + 4);
- volatile unsigned short *lcd_backlight =
- (unsigned short *)((ulong)CFG_FPGA_BASE_ADDR + CFG_FPGA_CTRL + 6);
- unsigned char *dst;
- ulong len = sizeof(fpgadata);
- int status;
- int index;
- int i;
- char *str;
- unsigned long contrast0 = 0xffffffff;
-
- dst = malloc(CFG_FPGA_MAX_SIZE);
- if (gunzip (dst, CFG_FPGA_MAX_SIZE, (uchar *)fpgadata, &len) != 0) {
- printf ("GUNZIP ERROR - must RESET board to recover\n");
- do_reset (NULL, 0, 0, NULL);
- }
-
- status = fpga_boot(dst, len);
- if (status != 0) {
- printf("\nFPGA: Booting failed ");
- switch (status) {
- case ERROR_FPGA_PRG_INIT_LOW:
- printf("(Timeout: INIT not low after asserting PROGRAM*)\n ");
- break;
- case ERROR_FPGA_PRG_INIT_HIGH:
- printf("(Timeout: INIT not high after deasserting PROGRAM*)\n ");
- break;
- case ERROR_FPGA_PRG_DONE:
- printf("(Timeout: DONE not high after programming FPGA)\n ");
- break;
- }
-
- /* display infos on fpgaimage */
- index = 15;
- for (i=0; i<4; i++) {
- len = dst[index];
- printf("FPGA: %s\n", &(dst[index+1]));
- index += len+3;
- }
- putc ('\n');
- /* delayed reboot */
- for (i=20; i>0; i--) {
- printf("Rebooting in %2d seconds \r",i);
- for (index=0;index<1000;index++)
- udelay(1000);
- }
- putc ('\n');
- do_reset(NULL, 0, 0, NULL);
- }
-
- puts("FPGA: ");
-
- /* display infos on fpgaimage */
- index = 15;
- for (i=0; i<4; i++) {
- len = dst[index];
- printf("%s ", &(dst[index+1]));
- index += len+3;
- }
- putc ('\n');
-
- free(dst);
-
- /*
- * Reset FPGA via FPGA_INIT pin
- */
- out32(GPIO0_TCR, in32(GPIO0_TCR) | FPGA_INIT); /* setup FPGA_INIT as output */
- out32(GPIO0_OR, in32(GPIO0_OR) & ~FPGA_INIT); /* reset low */
- udelay(1000); /* wait 1ms */
- out32(GPIO0_OR, in32(GPIO0_OR) | FPGA_INIT); /* reset high */
- udelay(1000); /* wait 1ms */
-
- /*
- * Write Board revision into FPGA
- */
- *fpga_ctrl |= gd->board_type & 0x0003;
- if (gd->board_type >= 0x0200) {
- *fpga_ctrl |= CFG_FPGA_CTRL_CF_BUS_EN;
- }
-
- /*
- * Setup and enable EEPROM write protection
- */
- out32(GPIO0_OR, in32(GPIO0_OR) | CFG_EEPROM_WP);
-
- /*
- * Set NAND-FLASH GPIO signals to default
- */
- out32(GPIO0_OR, in32(GPIO0_OR) & ~(CFG_NAND_CLE | CFG_NAND_ALE));
- out32(GPIO0_OR, in32(GPIO0_OR) | CFG_NAND_CE);
-
- /*
- * Reset touch-screen controller
- */
- out32(GPIO0_OR, in32(GPIO0_OR) & ~CFG_TOUCH_RST);
- udelay(1000);
- out32(GPIO0_OR, in32(GPIO0_OR) | CFG_TOUCH_RST);
-
- /*
- * Enable power on PS/2 interface (with reset)
- */
- *fpga_ctrl &= ~(CFG_FPGA_CTRL_PS2_PWR);
- for (i=0;i<500;i++)
- udelay(1000);
- *fpga_ctrl |= (CFG_FPGA_CTRL_PS2_PWR);
-
- /*
- * Get contrast value from environment variable
- */
- str = getenv("contrast0");
- if (str) {
- contrast0 = simple_strtol(str, NULL, 16);
- if (contrast0 > 255) {
- printf("ERROR: contrast0 value too high (0x%lx)!\n", contrast0);
- contrast0 = 0;
- }
- }
-
- /*
- * Init lcd interface and display logo
- */
-
- str = getenv("bd_type");
- if (strcmp(str, "ppc230") == 0) {
- /*
- * Switch backlight on
- */
- *fpga_ctrl |= CFG_FPGA_CTRL_VGA0_BL;
- *lcd_backlight = 0x0000;
-
- lcd_setup(1, 0);
- lcd_init((uchar *)CFG_LCD_BIG_REG, (uchar *)CFG_LCD_BIG_MEM,
- regs_13806_1024_768_8bpp,
- sizeof(regs_13806_1024_768_8bpp)/sizeof(regs_13806_1024_768_8bpp[0]),
- logo_bmp_1024, sizeof(logo_bmp_1024));
- } else if (strcmp(str, "ppc220") == 0) {
- /*
- * Switch backlight on
- */
- *fpga_ctrl &= ~CFG_FPGA_CTRL_VGA0_BL;
- *lcd_backlight = 0x0000;
-
- lcd_setup(1, 0);
- lcd_init((uchar *)CFG_LCD_BIG_REG, (uchar *)CFG_LCD_BIG_MEM,
- regs_13806_640_480_16bpp,
- sizeof(regs_13806_640_480_16bpp)/sizeof(regs_13806_640_480_16bpp[0]),
- logo_bmp_640, sizeof(logo_bmp_640));
- } else if (strcmp(str, "ppc215") == 0) {
- /*
- * Set default display contrast voltage
- */
- if (contrast0 == 0xffffffff) {
- *lcd_contrast = 0x0082;
- } else {
- *lcd_contrast = contrast0;
- }
- *lcd_backlight = 0xffff;
- /*
- * Switch backlight on
- */
- *fpga_ctrl |= CFG_FPGA_CTRL_VGA0_BL | CFG_FPGA_CTRL_VGA0_BL_MODE;
- /*
- * Set lcd clock (small epson)
- */
- *fpga_ctrl |= LCD_CLK_06250;
- udelay(100); /* wait for 100 us */
-
- lcd_setup(0, 1);
- lcd_init((uchar *)CFG_LCD_SMALL_REG, (uchar *)CFG_LCD_SMALL_MEM,
- regs_13705_320_240_8bpp,
- sizeof(regs_13705_320_240_8bpp)/sizeof(regs_13705_320_240_8bpp[0]),
- logo_bmp_320_8bpp, sizeof(logo_bmp_320_8bpp));
- } else if (strcmp(str, "ppc210") == 0) {
- /*
- * Set default display contrast voltage
- */
- if (contrast0 == 0xffffffff) {
- *lcd_contrast = 0x0060;
- } else {
- *lcd_contrast = contrast0;
- }
- *lcd_backlight = 0xffff;
- /*
- * Switch backlight on
- */
- *fpga_ctrl |= CFG_FPGA_CTRL_VGA0_BL | CFG_FPGA_CTRL_VGA0_BL_MODE;
- /*
- * Set lcd clock (small epson)
- */
- *fpga_ctrl |= LCD_CLK_08330;
-
- lcd_setup(0, 1);
- lcd_init((uchar *)CFG_LCD_SMALL_REG, (uchar *)CFG_LCD_SMALL_MEM,
- regs_13704_320_240_4bpp,
- sizeof(regs_13704_320_240_4bpp)/sizeof(regs_13704_320_240_4bpp[0]),
- logo_bmp_320, sizeof(logo_bmp_320));
-#ifdef CONFIG_VIDEO_SM501
- } else {
- pci_dev_t devbusfn;
-
- /*
- * Is SM501 connected (ppc221/ppc231)?
- */
- devbusfn = pci_find_device(PCI_VENDOR_SM, PCI_DEVICE_SM501, 0);
- if (devbusfn != -1) {
- puts("VGA: SM501 with 8 MB ");
- if (strcmp(str, "ppc221") == 0) {
- printf("(800*600, %dbpp)\n", BPP);
- } else if (strcmp(str, "ppc231") == 0) {
- printf("(1024*768, %dbpp)\n", BPP);
- } else {
- printf("Unsupported bd_type defined (%s) -> No display configured!\n", str);
- return 0;
- }
- } else {
- printf("Unsupported bd_type defined (%s) -> No display configured!\n", str);
- return 0;
- }
-#endif /* CONFIG_VIDEO_SM501 */
- }
-
- return (0);
-}
-
-
-/*
- * Check Board Identity:
- */
-
-int checkboard (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- unsigned char str[64];
- int i = getenv_r ("serial#", str, sizeof(str));
-
- puts ("Board: ");
-
- if (i == -1) {
- puts ("### No HW ID - assuming HH405");
- } else {
- puts(str);
- }
-
- if (getenv_r("bd_type", str, sizeof(str)) != -1) {
- printf(" (%s", str);
- } else {
- puts(" (Missing bd_type!");
- }
-
- gd->board_type = board_revision();
- printf(", Rev %ld.%ld)\n",
- (gd->board_type >> 8) & 0xff,
- gd->board_type & 0xff);
-
- /*
- * Disable sleep mode in LXT971
- */
- lxt971_no_sleep();
-
- return 0;
-}
-
-
-long int initdram (int board_type)
-{
- unsigned long val;
-
- mtdcr(memcfga, mem_mb0cf);
- val = mfdcr(memcfgd);
-
-#if 0
- printf("\nmb0cf=%x\n", val); /* test-only */
- printf("strap=%x\n", mfdcr(strap)); /* test-only */
-#endif
-
- return (4*1024*1024 << ((val & 0x000e0000) >> 17));
-}
-
-
-int testdram (void)
-{
- /* TODO: XXX XXX XXX */
- printf ("test: 16 MB - ok\n");
-
- return (0);
-}
-
-
-#ifdef CONFIG_IDE_RESET
-void ide_set_reset(int on)
-{
- volatile unsigned short *fpga_mode =
- (unsigned short *)((ulong)CFG_FPGA_BASE_ADDR + CFG_FPGA_CTRL);
-
- /*
- * Assert or deassert CompactFlash Reset Pin
- */
- if (on) { /* assert RESET */
- *fpga_mode &= ~(CFG_FPGA_CTRL_CF_RESET);
- } else { /* release RESET */
- *fpga_mode |= CFG_FPGA_CTRL_CF_RESET;
- }
-}
-#endif /* CONFIG_IDE_RESET */
-
-
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
-#include <linux/mtd/nand.h>
-extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
-
-void nand_init(void)
-{
- nand_probe(CFG_NAND_BASE);
- if (nand_dev_desc[0].ChipID != NAND_ChipID_UNKNOWN) {
- print_size(nand_dev_desc[0].totlen, "\n");
- }
-}
-#endif
-
-
-#if defined(CFG_EEPROM_WREN)
-/* Input: <dev_addr> I2C address of EEPROM device to enable.
- * <state> -1: deliver current state
- * 0: disable write
- * 1: enable write
- * Returns: -1: wrong device address
- * 0: dis-/en- able done
- * 0/1: current state if <state> was -1.
- */
-int eeprom_write_enable (unsigned dev_addr, int state)
-{
- if (CFG_I2C_EEPROM_ADDR != dev_addr) {
- return -1;
- } else {
- switch (state) {
- case 1:
- /* Enable write access, clear bit GPIO_SINT2. */
- out32(GPIO0_OR, in32(GPIO0_OR) & ~CFG_EEPROM_WP);
- state = 0;
- break;
- case 0:
- /* Disable write access, set bit GPIO_SINT2. */
- out32(GPIO0_OR, in32(GPIO0_OR) | CFG_EEPROM_WP);
- state = 0;
- break;
- default:
- /* Read current status back. */
- state = (0 == (in32(GPIO0_OR) & CFG_EEPROM_WP));
- break;
- }
- }
- return state;
-}
-
-int do_eep_wren (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- int query = argc == 1;
- int state = 0;
-
- if (query) {
- /* Query write access state. */
- state = eeprom_write_enable (CFG_I2C_EEPROM_ADDR, -1);
- if (state < 0) {
- puts ("Query of write access state failed.\n");
- } else {
- printf ("Write access for device 0x%0x is %sabled.\n",
- CFG_I2C_EEPROM_ADDR, state ? "en" : "dis");
- state = 0;
- }
- } else {
- if ('0' == argv[1][0]) {
- /* Disable write access. */
- state = eeprom_write_enable (CFG_I2C_EEPROM_ADDR, 0);
- } else {
- /* Enable write access. */
- state = eeprom_write_enable (CFG_I2C_EEPROM_ADDR, 1);
- }
- if (state < 0) {
- puts ("Setup of write access state failed.\n");
- }
- }
-
- return state;
-}
-
-U_BOOT_CMD(eepwren, 2, 0, do_eep_wren,
- "eepwren - Enable / disable / query EEPROM write access\n",
- NULL);
-#endif /* #if defined(CFG_EEPROM_WREN) */
-
-
-#ifdef CONFIG_VIDEO_SM501
-#ifdef CONFIG_CONSOLE_EXTRA_INFO
-/*
- * Return text to be printed besides the logo.
- */
-void video_get_info_str (int line_number, char *info)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- char str[64];
- char str2[64];
- int i = getenv_r("serial#", str2, sizeof(str));
-
- if (line_number == 1) {
- sprintf(str, " Board: ");
-
- if (i == -1) {
- strcat(str, "### No HW ID - assuming HH405");
- } else {
- strcat(str, str2);
- }
-
- if (getenv_r("bd_type", str2, sizeof(str2)) != -1) {
- strcat(str, " (");
- strcat(str, str2);
- } else {
- strcat(str, " (Missing bd_type!");
- }
-
- sprintf(str2, ", Rev %ld.%ld)",
- (gd->board_type >> 8) & 0xff, gd->board_type & 0xff);
- strcat(str, str2);
- strcpy(info, str);
- } else {
- info [0] = '\0';
- }
-}
-#endif /* CONFIG_CONSOLE_EXTRA_INFO */
-
-/*
- * Returns SM501 register base address. First thing called in the driver.
- */
-unsigned int board_video_init (void)
-{
- pci_dev_t devbusfn;
- u32 addr;
-
- /*
- * Is SM501 connected (ppc221/ppc231)?
- */
- devbusfn = pci_find_device(PCI_VENDOR_SM, PCI_DEVICE_SM501, 0);
- if (devbusfn != -1) {
- pci_read_config_dword(devbusfn, PCI_BASE_ADDRESS_1, (u32 *)&addr);
- return (addr & 0xfffffffe);
- }
-
- return 0;
-}
-
-/*
- * Returns SM501 framebuffer address
- */
-unsigned int board_video_get_fb (void)
-{
- pci_dev_t devbusfn;
- u32 addr;
-
- /*
- * Is SM501 connected (ppc221/ppc231)?
- */
- devbusfn = pci_find_device(PCI_VENDOR_SM, PCI_DEVICE_SM501, 0);
- if (devbusfn != -1) {
- pci_read_config_dword(devbusfn, PCI_BASE_ADDRESS_0, (u32 *)&addr);
- return (addr & 0xfffffffe);
- }
-
- return 0;
-}
-
-/*
- * Called after initializing the SM501 and before clearing the screen.
- */
-void board_validate_screen (unsigned int base)
-{
-}
-
-/*
- * Return a pointer to the initialization sequence.
- */
-const SMI_REGS *board_get_regs (void)
-{
- char *str;
-
- str = getenv("bd_type");
- if (strcmp(str, "ppc221") == 0) {
- return init_regs_800x600;
- } else {
- return init_regs_1024x768;
- }
-}
-
-int board_get_width (void)
-{
- char *str;
-
- str = getenv("bd_type");
- if (strcmp(str, "ppc221") == 0) {
- return 800;
- } else {
- return 1024;
- }
-}
-
-int board_get_height (void)
-{
- char *str;
-
- str = getenv("bd_type");
- if (strcmp(str, "ppc221") == 0) {
- return 600;
- } else {
- return 768;
- }
-}
-
-#endif /* CONFIG_VIDEO_SM501 */
diff --git a/board/esd/hh405/logo_1024_768_8bpp.c b/board/esd/hh405/logo_1024_768_8bpp.c
deleted file mode 100644
index 2195547db0..0000000000
--- a/board/esd/hh405/logo_1024_768_8bpp.c
+++ /dev/null
@@ -1,2544 +0,0 @@
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diff --git a/board/esd/hh405/logo_320_240_4bpp.c b/board/esd/hh405/logo_320_240_4bpp.c
deleted file mode 100644
index ddf0d0bec5..0000000000
--- a/board/esd/hh405/logo_320_240_4bpp.c
+++ /dev/null
@@ -1,227 +0,0 @@
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diff --git a/board/esd/hh405/logo_320_240_8bpp.c b/board/esd/hh405/logo_320_240_8bpp.c
deleted file mode 100644
index c2c59c6eb2..0000000000
--- a/board/esd/hh405/logo_320_240_8bpp.c
+++ /dev/null
@@ -1,521 +0,0 @@
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diff --git a/board/esd/hh405/logo_640_480_24bpp.c b/board/esd/hh405/logo_640_480_24bpp.c
deleted file mode 100644
index c042b6b7de..0000000000
--- a/board/esd/hh405/logo_640_480_24bpp.c
+++ /dev/null
@@ -1,4209 +0,0 @@
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- 0x42,0x84,0x82,0x02,0x49,0x41,0x31,0x74,0x25,0x05,0x85,0x00,0xe2,0x7c,0xe8,0x16,
- 0xe5,0x49,0x0a,0xfe,0x5f,0x7b,0x75,0xd0,0xda,0x36,0x0c,0x05,0x00,0xf8,0xff,0xff,
- 0x9d,0xb6,0x89,0x65,0x99,0x30,0x56,0x76,0x18,0x8c,0x41,0x21,0xb1,0xc7,0x0e,0xa3,
- 0xb0,0xc3,0x60,0x3b,0xb4,0x30,0x36,0x12,0xb7,0x39,0x4c,0xb6,0xec,0xd4,0x49,0x9b,
- 0xac,0x2b,0xec,0xb0,0xf1,0xc1,0x87,0x78,0xcf,0x96,0xf4,0x9e,0x8c,0x42,0xe6,0xa1,
- 0xea,0xd2,0xb2,0x0b,0xba,0xb1,0x9b,0x56,0xe5,0xb7,0xc3,0xcc,0x9d,0xfe,0xe1,0xbc,
- 0x7f,0xd8,0xab,0xc6,0x27,0x0f,0xe3,0x64,0xfe,0x41,0x1a,0xc7,0x85,0xd5,0x64,0x61,
- 0x9c,0x96,0x18,0xf6,0xcc,0x0b,0x63,0xdf,0x4f,0xd8,0x6f,0x26,0xe6,0x69,0x0f,0x75,
- 0x73,0xcf,0x2f,0xae,0x9b,0xaa,0x4c,0xd2,0x45,0xf7,0xf6,0x79,0x75,0x9f,0x3a,0x42,
- 0x5a,0x3b,0x49,0xc3,0x70,0xae,0xa1,0xee,0x7e,0x57,0xbb,0x53,0xe7,0x93,0xfe,0xc5,
- 0xf3,0x9e,0xac,0xbb,0xdb,0x6d,0x5a,0x77,0x3e,0xf6,0x3f,0x96,0x1b,0xda,0xc8,0x77,
- 0x63,0xd8,0x27,0x2e,0x0e,0xae,0xca,0x6f,0xee,0xc6,0xee,0x6d,0x7c,0x5e,0x1b,0xf1,
- 0x78,0xa1,0x93,0x75,0x0f,0x0a,0xbd,0xb0,0xc9,0xa7,0xee,0xe4,0xa3,0x9d,0x4f,0x7d,
- 0xe7,0x3f,0xbb,0xfc,0x63,0x9a,0x82,0xd0,0x5f,0xa1,0xfd,0xdf,0xc2,0xfe,0x45,0x0a,
- 0xe5,0x5e,0xcf,0x47,0x26,0x1f,0xab,0x7b,0x70,0xde,0xe9,0x27,0x9d,0x85,0xd0,0xf7,
- 0x50,0x85,0xf8,0xaa,0x5a,0x5c,0xc6,0xd7,0xef,0xc2,0x65,0x1d,0xdf,0x5e,0x97,0xef,
- 0xbf,0xce,0xae,0x6e,0x8b,0xe5,0x8f,0x62,0xb5,0x2e,0x9a,0x76,0x5e,0xb7,0x65,0xbd,
- 0x99,0x37,0x6d,0xfc,0xd0,0x05,0x5d,0x5c,0xb7,0x29,0xcd,0xf1,0x2c,0x8d,0xcd,0x26,
- 0xc7,0x65,0x8e,0xff,0xcd,0x34,0x9f,0xa8,0x48,0x67,0x4c,0xc1,0xa3,0xf4,0x60,0xf2,
- 0xc5,0x6a,0x7d,0xd1,0x7f,0x96,0x21,0xad,0xdb,0x62,0xd5,0x8d,0xf9,0xe1,0xf9,0x18,
- 0x9c,0xad,0xfa,0xa0,0xe9,0x82,0x59,0xdd,0x86,0x26,0x8d,0xc3,0xce,0x39,0x0d,0xcb,
- 0xf5,0x59,0x5a,0xdb,0xb4,0xe7,0xcb,0x4d,0x1a,0xfb,0x1d,0xd2,0x3e,0x9b,0xf4,0xa9,
- 0xdf,0x7c,0x6a,0xaf,0x3e,0xdf,0x7d,0xfc,0x76,0x7f,0x7d,0xb3,0xfd,0xf2,0x7d,0x7b,
- 0xfb,0xf3,0x7e,0x7d,0xb7,0x4d,0xb6,0xfe,0x73,0x01,0x00,0x00,0x00,0x00,0x00,0x00,
- 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0x00,0x00,0x00,0x00,0x00,0xfe,0x6b,0xbf,0x00,0xff,0xcf,0xfd,0x4c,0x36,0x10,0x0e,
- 0x00,
diff --git a/board/esd/hh405/u-boot.lds b/board/esd/hh405/u-boot.lds
deleted file mode 100644
index f7a20d1da2..0000000000
--- a/board/esd/hh405/u-boot.lds
+++ /dev/null
@@ -1,150 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- .resetvec 0xFFFFFFFC :
- {
- *(.resetvec)
- } = 0xffff
-
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/ppc4xx/start.o (.text)
- cpu/ppc4xx/traps.o (.text)
- cpu/ppc4xx/interrupts.o (.text)
- cpu/ppc4xx/serial.o (.text)
- cpu/ppc4xx/cpu_init.o (.text)
- cpu/ppc4xx/speed.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/extable.o (.text)
- lib_generic/zlib.o (.text)
-
-/* . = env_offset;*/
-/* common/environment.o(.text)*/
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/esd/hub405/Makefile b/board/esd/hub405/Makefile
deleted file mode 100644
index a60495a59a..0000000000
--- a/board/esd/hub405/Makefile
+++ /dev/null
@@ -1,46 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o ../common/misc.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/esd/hub405/config.mk b/board/esd/hub405/config.mk
deleted file mode 100644
index a6d31aad2b..0000000000
--- a/board/esd/hub405/config.mk
+++ /dev/null
@@ -1,28 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# esd HUB405 boards
-#
-
-TEXT_BASE = 0xFFFC0000
diff --git a/board/esd/hub405/flash.c b/board/esd/hub405/flash.c
deleted file mode 100644
index 89af1190a8..0000000000
--- a/board/esd/hub405/flash.c
+++ /dev/null
@@ -1,101 +0,0 @@
-/*
- * (C) Copyright 2001
- * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <ppc4xx.h>
-#include <asm/processor.h>
-
-/*
- * include common flash code (for esd boards)
- */
-#include "../common/flash.c"
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (vu_long * addr, flash_info_t * info);
-static void flash_get_offsets (ulong base, flash_info_t * info);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- unsigned long size_b0;
- int i;
- uint pbcr;
- unsigned long base_b0;
- int size_val = 0;
-
- /* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* Static FLASH Bank configuration here - FIXME XXX */
-
- size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size_b0, size_b0<<20);
- }
-
- /* Setup offsets */
- flash_get_offsets (-size_b0, &flash_info[0]);
-
- /* Re-do sizing to get full correct info */
- mtdcr(ebccfga, pb0cr);
- pbcr = mfdcr(ebccfgd);
- mtdcr(ebccfga, pb0cr);
- base_b0 = -size_b0;
- switch (size_b0) {
- case 1 << 20:
- size_val = 0;
- break;
- case 2 << 20:
- size_val = 1;
- break;
- case 4 << 20:
- size_val = 2;
- break;
- case 8 << 20:
- size_val = 3;
- break;
- case 16 << 20:
- size_val = 4;
- break;
- }
- pbcr = (pbcr & 0x0001ffff) | base_b0 | (size_val << 17);
- mtdcr(ebccfgd, pbcr);
-
- /* Monitor protection ON by default */
- (void)flash_protect(FLAG_PROTECT_SET,
- -CFG_MONITOR_LEN,
- 0xffffffff,
- &flash_info[0]);
-
- flash_info[0].size = size_b0;
-
- return (size_b0);
-}
diff --git a/board/esd/hub405/hub405.c b/board/esd/hub405/hub405.c
deleted file mode 100644
index e77dba8a86..0000000000
--- a/board/esd/hub405/hub405.c
+++ /dev/null
@@ -1,278 +0,0 @@
-/*
- * (C) Copyright 2001-2003
- * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/processor.h>
-#include <command.h>
-#include <malloc.h>
-
-
-extern void lxt971_no_sleep(void);
-
-
-int board_revision(void)
-{
- unsigned long osrl_reg;
- unsigned long isr1l_reg;
- unsigned long tcr_reg;
- unsigned long value;
-
- /*
- * Get version of HUB405 board from GPIO's
- */
-
- /*
- * Setup GPIO pin(s) (IRQ6/GPIO23)
- */
- osrl_reg = in32(GPIO0_OSRH);
- isr1l_reg = in32(GPIO0_ISR1H);
- tcr_reg = in32(GPIO0_TCR);
- out32(GPIO0_OSRH, osrl_reg & ~0x00030000); /* output select */
- out32(GPIO0_ISR1H, isr1l_reg | 0x00030000); /* input select */
- out32(GPIO0_TCR, tcr_reg & ~0x00000100); /* select input */
-
- udelay(1000); /* wait some time before reading input */
- value = in32(GPIO0_IR) & 0x00000100; /* get config bits */
-
- /*
- * Restore GPIO settings
- */
- out32(GPIO0_OSRH, osrl_reg); /* output select */
- out32(GPIO0_ISR1H, isr1l_reg); /* input select */
- out32(GPIO0_TCR, tcr_reg); /* enable output driver for outputs */
-
- if (value & 0x00000100) {
- /* Revision 1.1 or 1.2 detected */
- return 1;
- }
-
- /* Revision 1.0 */
- return 0;
-}
-
-
-int board_early_init_f (void)
-{
- /*
- * IRQ 0-15 405GP internally generated; active high; level sensitive
- * IRQ 16 405GP internally generated; active low; level sensitive
- * IRQ 17-24 RESERVED
- * IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive
- * IRQ 26 (EXT IRQ 1) SER0 ; active low; level sensitive
- * IRQ 27 (EXT IRQ 2) SER1; active low; level sensitive
- * IRQ 28 (EXT IRQ 3) FPGA 0; active low; level sensitive
- * IRQ 29 (EXT IRQ 4) FPGA 1; active low; level sensitive
- * IRQ 30 (EXT IRQ 5) PCI INTA; active low; level sensitive
- * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
- */
- mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
- mtdcr(uicer, 0x00000000); /* disable all ints */
- mtdcr(uiccr, 0x00000000); /* set all to be non-critical*/
- mtdcr(uicpr, 0xFFFFFF9F); /* set int polarities */
- mtdcr(uictr, 0x10000000); /* set int trigger levels */
- mtdcr(uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority*/
- mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
-
- /*
- * EBC Configuration Register: set ready timeout to 512 ebc-clks -> ca. 15 us
- */
- mtebc (epcr, 0xa8400000); /* ebc always driven */
-
- return 0;
-}
-
-
-int misc_init_f (void)
-{
- return 0; /* dummy implementation */
-}
-
-
-int misc_init_r (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- volatile unsigned char *duart0_mcr = (unsigned char *)((ulong)DUART0_BA + 4);
- volatile unsigned char *duart1_mcr = (unsigned char *)((ulong)DUART1_BA + 4);
- volatile unsigned char *duart2_mcr = (unsigned char *)((ulong)DUART2_BA + 4);
- volatile unsigned char *duart3_mcr = (unsigned char *)((ulong)DUART3_BA + 4);
- volatile unsigned char *led_reg = (unsigned char *)((ulong)DUART0_BA + 0x20);
- unsigned long val;
- int delay, flashcnt;
- char *str;
- char hw_rev[4];
-
- /*
- * Enable interrupts in exar duart mcr[3]
- */
- *duart0_mcr = 0x08;
- *duart1_mcr = 0x08;
- *duart2_mcr = 0x08;
- *duart3_mcr = 0x08;
-
- /*
- * Set RS232/RS422 control (RS232 = high on GPIO)
- */
- val = in32(GPIO0_OR);
- val &= ~(CFG_UART2_RS232 | CFG_UART3_RS232 | CFG_UART4_RS232 | CFG_UART5_RS232);
-
- str = getenv("phys0");
- if (!str || (str && (str[0] == '0')))
- val |= CFG_UART2_RS232;
-
- str = getenv("phys1");
- if (!str || (str && (str[0] == '0')))
- val |= CFG_UART3_RS232;
-
- str = getenv("phys2");
- if (!str || (str && (str[0] == '0')))
- val |= CFG_UART4_RS232;
-
- str = getenv("phys3");
- if (!str || (str && (str[0] == '0')))
- val |= CFG_UART5_RS232;
-
- out32(GPIO0_OR, val);
-
- /*
- * Set NAND-FLASH GPIO signals to default
- */
- out32(GPIO0_OR, in32(GPIO0_OR) & ~(CFG_NAND_CLE | CFG_NAND_ALE));
- out32(GPIO0_OR, in32(GPIO0_OR) | CFG_NAND_CE);
-
- /*
- * check board type and setup AP power
- */
- str = getenv("bd_type"); /* this is only set on non prototype hardware */
- if (str != NULL) {
- if ((strcmp(str, "swch405") == 0) || ((!strcmp(str, "hub405") && (gd->board_type >= 1)))) {
- unsigned char led_reg_default = 0;
- str = getenv("ap_pwr");
- if (!str || (str && (str[0] == '1')))
- led_reg_default = 0x04 | 0x02 ; /* U2_LED | AP_PWR */
-
- /*
- * Flash LEDs
- */
- for (flashcnt = 0; flashcnt < 3; flashcnt++) {
- *led_reg = led_reg_default; /* LED_A..D off */
- for (delay = 0; delay < 100; delay++)
- udelay(1000);
- *led_reg = led_reg_default | 0xf0; /* LED_A..D on */
- for (delay = 0; delay < 50; delay++)
- udelay(1000);
- }
- *led_reg = led_reg_default;
- }
- }
-
- /*
- * Reset external DUARTs
- */
- out32(GPIO0_OR, in32(GPIO0_OR) | CFG_DUART_RST); /* set reset to high */
- udelay(10); /* wait 10us */
- out32(GPIO0_OR, in32(GPIO0_OR) & ~CFG_DUART_RST); /* set reset to low */
- udelay(1000); /* wait 1ms */
-
- /*
- * Store hardware revision in environment for further processing
- */
- sprintf(hw_rev, "1.%ld", gd->board_type);
- setenv("hw_rev", hw_rev);
- return (0);
-}
-
-
-/*
- * Check Board Identity:
- */
-int checkboard (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- char str[64];
- int i = getenv_r ("serial#", str, sizeof(str));
-
- puts ("Board: ");
-
- if (i == -1) {
- puts ("### No HW ID - assuming HUB405");
- } else {
- puts(str);
- }
-
- if (getenv_r("bd_type", str, sizeof(str)) != -1) {
- printf(" (%s", str);
- } else {
- puts(" (Missing bd_type!");
- }
-
- gd->board_type = board_revision();
- printf(", Rev 1.%ld)\n", gd->board_type);
-
- /*
- * Disable sleep mode in LXT971
- */
- lxt971_no_sleep();
-
- return 0;
-}
-
-
-long int initdram (int board_type)
-{
- unsigned long val;
-
- mtdcr(memcfga, mem_mb0cf);
- val = mfdcr(memcfgd);
-
-#if 0
- printf("\nmb0cf=%x\n", val); /* test-only */
- printf("strap=%x\n", mfdcr(strap)); /* test-only */
-#endif
-
- return (4*1024*1024 << ((val & 0x000e0000) >> 17));
-}
-
-
-int testdram (void)
-{
- /* TODO: XXX XXX XXX */
- printf ("test: 16 MB - ok\n");
-
- return (0);
-}
-
-
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
-#include <linux/mtd/nand.h>
-extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
-
-void nand_init(void)
-{
- nand_probe(CFG_NAND_BASE);
- if (nand_dev_desc[0].ChipID != NAND_ChipID_UNKNOWN) {
- print_size(nand_dev_desc[0].totlen, "\n");
- }
-}
-#endif
diff --git a/board/esd/hub405/u-boot.lds b/board/esd/hub405/u-boot.lds
deleted file mode 100644
index 98338e9351..0000000000
--- a/board/esd/hub405/u-boot.lds
+++ /dev/null
@@ -1,150 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- .resetvec 0xFFFFFFFC :
- {
- *(.resetvec)
- } = 0xffff
-
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/ppc4xx/start.o (.text)
- cpu/ppc4xx/traps.o (.text)
- cpu/ppc4xx/interrupts.o (.text)
- cpu/ppc4xx/serial.o (.text)
- cpu/ppc4xx/cpu_init.o (.text)
- cpu/ppc4xx/speed.o (.text)
- cpu/ppc4xx/4xx_enet.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/extable.o (.text)
- lib_generic/zlib.o (.text)
-
-/* . = env_offset;*/
-/* common/environment.o(.text)*/
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/esd/ocrtc/Makefile b/board/esd/ocrtc/Makefile
deleted file mode 100644
index b3039c6348..0000000000
--- a/board/esd/ocrtc/Makefile
+++ /dev/null
@@ -1,46 +0,0 @@
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o ../common/misc.o cmd_ocrtc.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/esd/ocrtc/cmd_ocrtc.c b/board/esd/ocrtc/cmd_ocrtc.c
deleted file mode 100644
index ffbb4adddc..0000000000
--- a/board/esd/ocrtc/cmd_ocrtc.c
+++ /dev/null
@@ -1,84 +0,0 @@
-/*
- * (C) Copyright 2003
- * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <command.h>
-#include <pci.h>
-#include <pci_ids.h>
-#include <405gp_pci.h>
-
-
-#if (CONFIG_COMMANDS & CFG_CMD_BSP)
-
-/*
- * Set device number on pci board
- */
-int do_setdevice(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- int idx = 1; /* start at 1 (skip device 0) */
- pci_dev_t bdf = 0;
- u32 addr;
-
- while (bdf >= 0) {
- if ((bdf = pci_find_device(PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_405GP, idx++)) < 0) {
- break;
- }
- printf("Found device nr %d at %x!\n", idx-1, bdf);
- pci_read_config_dword(bdf, PCI_BASE_ADDRESS_1, &addr);
- addr &= ~0xf;
- *(u32 *)addr = (bdf & 0x0000f800) >> 11;
- printf("Wrote %x at %x!\n", (bdf & 0x0000f800) >> 11, addr);
- }
-
- return 0;
-}
-U_BOOT_CMD(
- setdevice, 1, 1, do_setdevice,
- "setdevice - Set device number on pci adapter boards\n",
- NULL
-);
-
-
-/*
- * Get device number on pci board
- */
-int do_getdevice(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- u32 device;
- char str[32];
-
- device = *(u32 *)0x0;
- device = 0x16 - device; /* calculate vxworks bp slot id */
- sprintf(str, "%d", device);
- setenv("slot", str);
- printf("Variabel slot set to %x\n", device);
-
- return 0;
-}
-U_BOOT_CMD(
- getdevice, 1, 1, do_getdevice,
- "getdevice - Get device number and set slot env variable\n",
- NULL
-);
-
-#endif
diff --git a/board/esd/ocrtc/config.mk b/board/esd/ocrtc/config.mk
deleted file mode 100644
index f123319943..0000000000
--- a/board/esd/ocrtc/config.mk
+++ /dev/null
@@ -1,29 +0,0 @@
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# esd ADCIOP boards
-#
-
-#TEXT_BASE = 0xFFFE0000
-TEXT_BASE = 0xFFFD0000
diff --git a/board/esd/ocrtc/flash.c b/board/esd/ocrtc/flash.c
deleted file mode 100644
index c3d8bec913..0000000000
--- a/board/esd/ocrtc/flash.c
+++ /dev/null
@@ -1,156 +0,0 @@
-/*
- * (C) Copyright 2001
- * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <ppc4xx.h>
-#include <asm/processor.h>
-
-/*
- * include common flash code (for esd boards)
- */
-#include "../common/flash.c"
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (vu_long * addr, flash_info_t * info);
-static void flash_get_offsets (ulong base, flash_info_t * info);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- unsigned long size_b0, size_b1;
- int i;
- uint pbcr;
- unsigned long base_b0, base_b1;
- int size_val = 0;
-
- /* Init: no FLASHes known */
- for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* Static FLASH Bank configuration here - FIXME XXX */
-
- base_b0 = FLASH_BASE0_PRELIM;
- size_b0 = flash_get_size ((vu_long *) base_b0, &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size_b0, size_b0 << 20);
- }
-
- base_b1 = FLASH_BASE1_PRELIM;
- size_b1 = flash_get_size ((vu_long *) base_b1, &flash_info[1]);
-
- /* Re-do sizing to get full correct info */
-
- if (size_b1) {
- mtdcr (ebccfga, pb0cr);
- pbcr = mfdcr (ebccfgd);
- mtdcr (ebccfga, pb0cr);
- base_b1 = -size_b1;
- switch (size_b1) {
- case 1 << 20:
- size_val = 0;
- break;
- case 2 << 20:
- size_val = 1;
- break;
- case 4 << 20:
- size_val = 2;
- break;
- case 8 << 20:
- size_val = 3;
- break;
- case 16 << 20:
- size_val = 4;
- break;
- }
- pbcr = (pbcr & 0x0001ffff) | base_b1 | (size_val << 17);
- mtdcr (ebccfgd, pbcr);
- /* printf("pb1cr = %x\n", pbcr); */
- }
-
- if (size_b0) {
- mtdcr (ebccfga, pb1cr);
- pbcr = mfdcr (ebccfgd);
- mtdcr (ebccfga, pb1cr);
- base_b0 = base_b1 - size_b0;
- switch (size_b1) {
- case 1 << 20:
- size_val = 0;
- break;
- case 2 << 20:
- size_val = 1;
- break;
- case 4 << 20:
- size_val = 2;
- break;
- case 8 << 20:
- size_val = 3;
- break;
- case 16 << 20:
- size_val = 4;
- break;
- }
- pbcr = (pbcr & 0x0001ffff) | base_b0 | (size_val << 17);
- mtdcr (ebccfgd, pbcr);
- /* printf("pb0cr = %x\n", pbcr); */
- }
-
- size_b0 = flash_get_size ((vu_long *) base_b0, &flash_info[0]);
-
- flash_get_offsets (base_b0, &flash_info[0]);
-
- /* monitor protection ON by default */
- flash_protect (FLAG_PROTECT_SET,
- base_b0 + size_b0 - monitor_flash_len,
- base_b0 + size_b0 - 1, &flash_info[0]);
-
- if (size_b1) {
- /* Re-do sizing to get full correct info */
- size_b1 = flash_get_size ((vu_long *) base_b1, &flash_info[1]);
-
- flash_get_offsets (base_b1, &flash_info[1]);
-
- /* monitor protection ON by default */
- flash_protect (FLAG_PROTECT_SET,
- base_b1 + size_b1 - monitor_flash_len,
- base_b1 + size_b1 - 1, &flash_info[1]);
- /* monitor protection OFF by default (one is enough) */
- flash_protect (FLAG_PROTECT_CLEAR,
- base_b0 + size_b0 - monitor_flash_len,
- base_b0 + size_b0 - 1, &flash_info[0]);
- } else {
- flash_info[1].flash_id = FLASH_UNKNOWN;
- flash_info[1].sector_count = -1;
- }
-
- flash_info[0].size = size_b0;
- flash_info[1].size = size_b1;
-
- return (size_b0 + size_b1);
-}
diff --git a/board/esd/ocrtc/ocrtc.c b/board/esd/ocrtc/ocrtc.c
deleted file mode 100644
index 261b8a54d0..0000000000
--- a/board/esd/ocrtc/ocrtc.c
+++ /dev/null
@@ -1,126 +0,0 @@
-/*
- * (C) Copyright 2001
- * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include "ocrtc.h"
-#include <asm/processor.h>
-#include <i2c.h>
-#include <command.h>
-
-
-extern void lxt971_no_sleep(void);
-
-
-int board_early_init_f (void)
-{
- /*
- * IRQ 0-15 405GP internally generated; active high; level sensitive
- * IRQ 16 405GP internally generated; active low; level sensitive
- * IRQ 17-24 RESERVED
- * IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive
- * IRQ 26 (EXT IRQ 1) CAN1; active low; level sensitive
- * IRQ 27 (EXT IRQ 2) PCI SLOT 0; active low; level sensitive
- * IRQ 28 (EXT IRQ 3) PCI SLOT 1; active low; level sensitive
- * IRQ 29 (EXT IRQ 4) PCI SLOT 2; active low; level sensitive
- * IRQ 30 (EXT IRQ 5) PCI SLOT 3; active low; level sensitive
- * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
- */
- mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
- mtdcr (uicer, 0x00000000); /* disable all ints */
- mtdcr (uiccr, 0x00000000); /* set all to be non-critical */
- mtdcr (uicpr, 0xFFFFFF81); /* set int polarities */
- mtdcr (uictr, 0x10000000); /* set int trigger levels */
- mtdcr (uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority */
- mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
-
- /*
- * EBC Configuration Register: clear EBTC -> high-Z ebc signals between
- * transfers, set device-paced timeout to 256 cycles
- */
- mtebc (epcr, 0x20400000);
-
- return 0;
-}
-
-
-int misc_init_f (void)
-{
- return 0; /* dummy implementation */
-}
-
-
-/*
- * Check Board Identity:
- */
-int checkboard (void)
-{
- char str[64];
- int i = getenv_r ("serial#", str, sizeof (str));
-
- puts ("Board: ");
-
- if (i == -1) {
-#ifdef CONFIG_OCRTC
- puts ("### No HW ID - assuming OCRTC");
-#endif
-#ifdef CONFIG_ORSG
- puts ("### No HW ID - assuming ORSG");
-#endif
- } else {
- puts (str);
- }
-
- putc ('\n');
-
- /*
- * Disable sleep mode in LXT971
- */
- lxt971_no_sleep();
-
- return (0);
-}
-
-
-long int initdram (int board_type)
-{
- unsigned long val;
-
- mtdcr (memcfga, mem_mb0cf);
- val = mfdcr (memcfgd);
-
-#if 0
- printf ("\nmb0cf=%x\n", val); /* test-only */
- printf ("strap=%x\n", mfdcr (strap)); /* test-only */
-#endif
-
- return (4 * 1024 * 1024 << ((val & 0x000e0000) >> 17));
-}
-
-
-int testdram (void)
-{
- /* TODO: XXX XXX XXX */
- printf ("test: 16 MB - ok\n");
-
- return (0);
-}
diff --git a/board/esd/ocrtc/ocrtc.h b/board/esd/ocrtc/ocrtc.h
deleted file mode 100644
index b50d521d95..0000000000
--- a/board/esd/ocrtc/ocrtc.h
+++ /dev/null
@@ -1,44 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/****************************************************************************
- * FLASH Memory Map as used by TQ Monitor:
- *
- * Start Address Length
- * +-----------------------+ 0x4000_0000 Start of Flash -----------------
- * | MON8xx code | 0x4000_0100 Reset Vector
- * +-----------------------+ 0x400?_????
- * | (unused) |
- * +-----------------------+ 0x4001_FF00
- * | Ethernet Addresses | 0x78
- * +-----------------------+ 0x4001_FF78
- * | (Reserved for MON8xx) | 0x44
- * +-----------------------+ 0x4001_FFBC
- * | Lock Address | 0x04
- * +-----------------------+ 0x4001_FFC0 ^
- * | Hardware Information | 0x40 | MON8xx
- * +=======================+ 0x4002_0000 (sector border) -----------------
- * | Autostart Header | | Applications
- * | ... | v
- *
- *****************************************************************************/
diff --git a/board/esd/ocrtc/u-boot.lds b/board/esd/ocrtc/u-boot.lds
deleted file mode 100644
index 476b4a0550..0000000000
--- a/board/esd/ocrtc/u-boot.lds
+++ /dev/null
@@ -1,150 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- .resetvec 0xFFFFFFFC :
- {
- *(.resetvec)
- } = 0xffff
-
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/ppc4xx/start.o (.text)
- cpu/ppc4xx/traps.o (.text)
- cpu/ppc4xx/interrupts.o (.text)
- cpu/ppc4xx/serial.o (.text)
- cpu/ppc4xx/cpu_init.o (.text)
- cpu/ppc4xx/speed.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/extable.o (.text)
- lib_generic/zlib.o (.text)
-
-/* . = env_offset;*/
-/* common/environment.o(.text)*/
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/esd/pci405/Makefile b/board/esd/pci405/Makefile
deleted file mode 100644
index 6db564f86e..0000000000
--- a/board/esd/pci405/Makefile
+++ /dev/null
@@ -1,48 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o ../common/misc.o cmd_pci405.o
-SOBJS = writeibm.o
-
-$(LIB): $(OBJS) $(SOBJS)
-# $(AR) crv $@ $(OBJS)
- $(AR) crv $@ $(OBJS) $(SOBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/esd/pci405/cmd_pci405.c b/board/esd/pci405/cmd_pci405.c
deleted file mode 100644
index 0315c3d97b..0000000000
--- a/board/esd/pci405/cmd_pci405.c
+++ /dev/null
@@ -1,985 +0,0 @@
-/*
- * (C) Copyright 2002-2004
- * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <command.h>
-#include <malloc.h>
-#include <net.h>
-#include <asm/io.h>
-#include <pci.h>
-#include <405gp_pci.h>
-#include <asm/processor.h>
-
-#include "pci405.h"
-
-
-#if (CONFIG_COMMANDS & CFG_CMD_BSP)
-
-extern int do_bootm (cmd_tbl_t *, int, int, char *[]);
-extern int do_bootvx (cmd_tbl_t *, int, int, char *[]);
-unsigned long get_dcr(unsigned short);
-
-
-/*
- * Command loadpci: wait for signal from host and boot image.
- */
-int do_loadpci(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- unsigned int *ptr = 0;
- int count = 0;
- int count2 = 0;
- int status;
- int i;
- char addr[16];
- char str[] = "\\|/-";
- char *local_args[2];
-
- /*
- * Mark sync address
- */
- ptr = 0;
- *ptr = 0xffffffff;
- puts("\nWaiting for image from pci host -");
-
- /*
- * Wait for host to write the start address
- */
- while (*ptr == 0xffffffff) {
- count++;
- if (!(count % 100)) {
- count2++;
- putc(0x08); /* backspace */
- putc(str[count2 % 4]);
- }
-
- /* Abort if ctrl-c was pressed */
- if (ctrlc()) {
- puts("\nAbort\n");
- return 0;
- }
-
- udelay(1000);
- }
-
- if (*ptr == PCI_RECONFIG_MAGIC) {
- /*
- * Save own pci configuration in PRAM
- */
- memset((char *)PCI_REGS_ADDR, 0, PCI_REGS_LEN);
- ptr = (unsigned int *)PCI_REGS_ADDR + 1;
- for (i=0; i<0x40; i+=4) {
- pci_read_config_dword(PCIDEVID_405GP, i, ptr++);
- }
- ptr = (unsigned int *)PCI_REGS_ADDR;
- *ptr = crc32(0, (uchar *)PCI_REGS_ADDR+4, PCI_REGS_LEN-4);
-
- printf("\nStoring PCI Configuration Regs...\n");
- } else {
- sprintf(addr, "%08x", *ptr);
-
-#if 0
- /*
- * Boot image
- */
- if (*ptr & 0x00000001) {
- /*
- * Boot VxWorks image via bootvx
- */
- addr[strlen(addr)-1] = '0';
- printf("\nBooting VxWorks-Image at addr 0x%s ...\n", addr);
- setenv("loadaddr", addr);
-
- local_args[0] = argv[0];
- local_args[1] = NULL;
- status = do_bootvx (cmdtp, 0, 1, local_args);
- } else {
- /*
- * Boot image via bootm (normally Linux)
- */
- printf("\nBooting Image at addr 0x%s ...\n", addr);
- setenv("loadaddr", addr);
-
- local_args[0] = argv[0];
- local_args[1] = NULL;
- status = do_bootm (cmdtp, 0, 1, local_args);
- }
-#else
- /*
- * Boot image via bootm
- */
- printf("\nBooting Image at addr 0x%s ...\n", addr);
- setenv("loadaddr", addr);
-
- local_args[0] = argv[0];
- local_args[1] = NULL;
- status = do_bootm (cmdtp, 0, 1, local_args);
-#endif
- }
-
- return 0;
-}
-U_BOOT_CMD(
- loadpci, 1, 1, do_loadpci,
- "loadpci - Wait for pci-image and boot it\n",
- NULL
-);
-
-#endif
-
-#if 1 /* test-only */
-int do_getpci(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- unsigned int val;
- int i;
-
- printf("\nPCI Configuration Regs for PPC405GP:");
- for (i=0; i<0x64; i+=4) {
- pci_read_config_dword(PCIDEVID_405GP, i, &val);
- if (!(i % 0x10)) {
- printf("\n%02x: ", i);
- }
- printf("%08x ", val);
- }
- printf("\n");
-
- return 0;
-}
-U_BOOT_CMD(
- getpci, 1, 1, do_getpci,
- "getpci - Print own pci configuration registers\n",
- NULL
-);
-
-int do_setpci(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- unsigned int addr;
- unsigned int val;
-
- addr = simple_strtol (argv[1], NULL, 16);
- val = simple_strtol (argv[2], NULL, 16);
-
- printf("\nWriting %08x to PCI reg %08x.\n", val, addr);
- pci_write_config_dword(PCIDEVID_405GP, addr, val);
-
- return 0;
-}
-U_BOOT_CMD(
- setpci, 3, 1, do_setpci,
- "setpci - Set one pci configuration lword\n",
- "<addr> <val>\n"
- " - Write pci configuration lword <val> to <addr>.\n"
-);
-
-int do_dumpdcr(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- int i;
-
- printf("\nDevice Configuration Registers (DCR's) for PPC405GP:");
- for (i=0; i<=0x1e0; i++) {
- if (!(i % 0x8)) {
- printf("\n%04x ", i);
- }
- printf("%08lx ", get_dcr(i));
- }
- printf("\n");
-
- return 0;
-}
-U_BOOT_CMD(
- dumpdcr, 1, 1, do_dumpdcr,
- "dumpdcr - Dump all DCR registers\n",
- NULL
-);
-
-
-int do_dumpspr(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- printf("\nSpecial Purpose Registers (SPR's) for PPC405GP:");
- printf("\n%04x %08x ", 947, mfspr(947));
- printf("\n%04x %08x ", 9, mfspr(9));
- printf("\n%04x %08x ", 1014, mfspr(1014));
- printf("\n%04x %08x ", 1015, mfspr(1015));
- printf("\n%04x %08x ", 1010, mfspr(1010));
- printf("\n%04x %08x ", 957, mfspr(957));
- printf("\n%04x %08x ", 1008, mfspr(1008));
- printf("\n%04x %08x ", 1018, mfspr(1018));
- printf("\n%04x %08x ", 954, mfspr(954));
- printf("\n%04x %08x ", 950, mfspr(950));
- printf("\n%04x %08x ", 951, mfspr(951));
- printf("\n%04x %08x ", 981, mfspr(981));
- printf("\n%04x %08x ", 980, mfspr(980));
- printf("\n%04x %08x ", 982, mfspr(982));
- printf("\n%04x %08x ", 1012, mfspr(1012));
- printf("\n%04x %08x ", 1013, mfspr(1013));
- printf("\n%04x %08x ", 948, mfspr(948));
- printf("\n%04x %08x ", 949, mfspr(949));
- printf("\n%04x %08x ", 1019, mfspr(1019));
- printf("\n%04x %08x ", 979, mfspr(979));
- printf("\n%04x %08x ", 8, mfspr(8));
- printf("\n%04x %08x ", 945, mfspr(945));
- printf("\n%04x %08x ", 987, mfspr(987));
- printf("\n%04x %08x ", 287, mfspr(287));
- printf("\n%04x %08x ", 953, mfspr(953));
- printf("\n%04x %08x ", 955, mfspr(955));
- printf("\n%04x %08x ", 272, mfspr(272));
- printf("\n%04x %08x ", 273, mfspr(273));
- printf("\n%04x %08x ", 274, mfspr(274));
- printf("\n%04x %08x ", 275, mfspr(275));
- printf("\n%04x %08x ", 260, mfspr(260));
- printf("\n%04x %08x ", 276, mfspr(276));
- printf("\n%04x %08x ", 261, mfspr(261));
- printf("\n%04x %08x ", 277, mfspr(277));
- printf("\n%04x %08x ", 262, mfspr(262));
- printf("\n%04x %08x ", 278, mfspr(278));
- printf("\n%04x %08x ", 263, mfspr(263));
- printf("\n%04x %08x ", 279, mfspr(279));
- printf("\n%04x %08x ", 26, mfspr(26));
- printf("\n%04x %08x ", 27, mfspr(27));
- printf("\n%04x %08x ", 990, mfspr(990));
- printf("\n%04x %08x ", 991, mfspr(991));
- printf("\n%04x %08x ", 956, mfspr(956));
- printf("\n%04x %08x ", 284, mfspr(284));
- printf("\n%04x %08x ", 285, mfspr(285));
- printf("\n%04x %08x ", 986, mfspr(986));
- printf("\n%04x %08x ", 984, mfspr(984));
- printf("\n%04x %08x ", 256, mfspr(256));
- printf("\n%04x %08x ", 1, mfspr(1));
- printf("\n%04x %08x ", 944, mfspr(944));
- printf("\n");
-
- return 0;
-}
-U_BOOT_CMD(
- dumpspr, 1, 1, do_dumpspr,
- "dumpspr - Dump all SPR registers\n",
- NULL
-);
-
-
-#define PCI0_BRDGOPT1 0x4a
-#define plb0_acr 0x87
-
-int do_getplb(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- unsigned short val;
-
- printf("PLB0_ACR=%08lx\n", get_dcr(0x87));
- pci_read_config_word(PCIDEVID_405GP, PCI0_BRDGOPT1, &val);
- printf("PCI0_BRDGOPT1=%04x\n", val);
- printf("CCR0=%08x\n", mfspr(ccr0));
-
- return 0;
-}
-U_BOOT_CMD(
- getplb, 1, 1, do_getplb,
- "getplb - Dump all plb arbiter registers\n",
- NULL
-);
-
-int do_setplb(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- unsigned int my_acr;
- unsigned int my_brdgopt1;
- unsigned int my_ccr0;
-
- my_acr = simple_strtol (argv[1], NULL, 16);
- my_brdgopt1 = simple_strtol (argv[2], NULL, 16);
- my_ccr0 = simple_strtol (argv[3], NULL, 16);
-
- mtdcr(plb0_acr, my_acr);
- pci_write_config_word(PCIDEVID_405GP, PCI0_BRDGOPT1, my_brdgopt1);
- mtspr(ccr0, my_ccr0);
-
- return 0;
-}
-U_BOOT_CMD(
- setplb, 4, 1, do_setplb,
- "setplb - Set all plb arbiter registers\n",
- "PLB0_ACR PCI0_BRDGOPT1 CCR0\n"
- " - Set all plb arbiter registers\n"
-);
-
-
-/***********************************************************************
- *
- * The following code is only for test purposes!!!!
- * Please ignore this ugly stuff!!!!!!!!!!!!!!!!!!!
- *
- ***********************************************************************/
-
-#define PCI_ADDR 0xc0000000
-
-int do_writepci(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- unsigned int addr;
- unsigned int size;
- unsigned int countmax;
- int i;
- int max;
- volatile unsigned long *ptr;
- volatile unsigned long val;
- int loopcount = 0;
- int test_pci_read = 0;
- int test_pci_cfg_write = 0;
- int test_sync = 0;
- int test_pci_pre_read = 0;
-
- addr = simple_strtol (argv[1], NULL, 16);
- size = simple_strtol (argv[2], NULL, 16);
- countmax = simple_strtol (argv[3], NULL, 16);
- if (countmax == 0)
- countmax = 1000;
-
- do_getplb(NULL, 0, 0, NULL);
-
-#if 0
- out32r(PMM0LA, 0);
- out32r(PMM0PCILA, 0);
- out32r(PMM0PCIHA, 0);
- out32r(PMM0MA, 0);
- out32r(PMM1LA, PCI_ADDR);
- out32r(PMM1PCILA, addr & 0xff000000);
- out32r(PMM1PCIHA, 0x00000000);
- out32r(PMM1MA, 0xff000001);
-#endif
-
- printf("PMM1LA =%08lx\n", in32r(PMM1LA));
- printf("PMM1MA =%08lx\n", in32r(PMM1MA));
- printf("PMM1PCILA =%08lx\n", in32r(PMM1PCILA));
- printf("PMM1PCIHA =%08lx\n", in32r(PMM1PCIHA));
-
- addr = PCI_ADDR | (addr & 0x00ffffff);
- printf("\nWriting at addr %08x, size %08x (countmax=%x)\n", addr, size, countmax);
-
- max = size >> 2;
-
- pci_write_config_word(PCIDEVID_405GP, 0x04, 0x0106); /* write command reg */
-
- val = *(ulong *)0x00000000;
- if (val & 0x00000008) {
- test_pci_pre_read = 1;
- printf("Running test with pre pci-memory-read access!\n");
- }
- if (val & 0x00000004) {
- test_sync = 1;
- printf("Running test with sync instruction!\n");
- }
- if (val & 0x00000001) {
- test_pci_read = 1;
- printf("Running test with pci-memory-read access!\n");
- }
- if (val & 0x00000002) {
- test_pci_cfg_write = 1;
- printf("Running test with pci-config-write access!\n");
- }
-
- while (1) {
-
- if (test_pci_pre_read) {
- /*
- * Read one value back
- */
- ptr = (volatile unsigned long *)addr;
- val = *ptr;
- }
-
- /*
- * Write some values to host via pci busmastering
- */
- ptr = (volatile unsigned long *)addr;
- for (i=0; i<max; i++) {
- *ptr++ = i;
- }
-
- if (test_sync) {
- /*
- * Sync previous writes
- */
- ppcSync();
- }
-
- if (test_pci_read) {
- /*
- * Read one value back
- */
- ptr = (volatile unsigned long *)addr;
- val = *ptr;
- }
-
- if (test_pci_cfg_write) {
- /*
- * Generate IRQ to host via config regs
- */
- pci_write_config_byte(PCIDEVID_405GP, 0x44, 0x00);
- }
-
- if (loopcount++ > countmax) {
- /* Abort if ctrl-c was pressed */
- if (ctrlc()) {
- puts("\nAbort\n");
- return 0;
- }
-
- putc('.');
-
- loopcount = 0;
- }
- }
-
- return 0;
-}
-U_BOOT_CMD(
- writepci, 4, 1, do_writepci,
- "writepci - Write some data to pcibus\n",
- "<addr> <size>\n"
- " - Write some data to pcibus.\n"
-);
-
-#define PCI_CFGADDR 0xeec00000
-#define PCI_CFGDATA 0xeec00004
-
-int ibmPciConfigWrite
-(
- int offset, /* offset into the configuration space */
- int width, /* data width */
- unsigned int data /* data to be written */
- )
-{
- /*
- * Write config register address to the PCI config address register
- * bit 31 must be 1 and bits 1:0 must be 0 (note LE bit notation)
- */
- out32r(PCI_CFGADDR, 0x80000000 | (offset & 0xFFFFFFFC));
-
-#if 0 /* test-only */
- ppcSync();
-#endif
-
- /*
- * Write value to be written to the PCI config data register
- */
- switch ( width ) {
- case 1: out32r(PCI_CFGDATA | (offset & 0x3), (unsigned char)(data & 0xFF));
- break;
- case 2: out32r(PCI_CFGDATA | (offset & 0x3), (unsigned short)(data & 0xFFFF));
- break;
- case 4: out32r(PCI_CFGDATA | (offset & 0x3), data);
- break;
- }
-
- return (0);
-}
-
-int do_writepci2(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- unsigned int addr;
- unsigned int size;
- unsigned int countmax;
- int max;
- volatile unsigned long *ptr;
- volatile unsigned long val;
- int loopcount = 0;
-
- addr = simple_strtol (argv[1], NULL, 16);
- size = simple_strtol (argv[2], NULL, 16);
- countmax = simple_strtol (argv[3], NULL, 16);
- if (countmax == 0)
- countmax = 1000;
-
- do_getplb(NULL, 0, 0, NULL);
-
-#if 0
- out32r(PMM0LA, 0);
- out32r(PMM0PCILA, 0);
- out32r(PMM0PCIHA, 0);
- out32r(PMM0MA, 0);
- out32r(PMM1LA, PCI_ADDR);
- out32r(PMM1PCILA, addr & 0xff000000);
- out32r(PMM1PCIHA, 0x00000000);
- out32r(PMM1MA, 0xff000001);
-#endif
-
- printf("PMM1LA =%08lx\n", in32r(PMM1LA));
- printf("PMM1MA =%08lx\n", in32r(PMM1MA));
- printf("PMM1PCILA =%08lx\n", in32r(PMM1PCILA));
- printf("PMM1PCIHA =%08lx\n", in32r(PMM1PCIHA));
-
- addr = PCI_ADDR | (addr & 0x00ffffff);
- printf("\nWriting at addr %08x, size %08x (countmax=%x)\n", addr, size, countmax);
-
- max = size >> 2;
-
- pci_write_config_word(PCIDEVID_405GP, 0x04, 0x0106); /* write command reg */
-
- while (1) {
-
- /*
- * Write one values to host via pci busmastering
- */
- ptr = (volatile unsigned long *)addr;
- *ptr = 0x01234567;
-
- /*
- * Read one value back
- */
- ptr = (volatile unsigned long *)addr;
- val = *ptr;
-
- /*
- * One pci config write
- */
-/* pci_write_config_byte(PCIDEVID_405GP, 0x44, 0x00); */
-/* ibmPciConfigWrite(0x44, 1, 0x00); */
- ibmPciConfigWrite(0x2e, 2, 0x1234); /* subsystem id */
-
- if (loopcount++ > countmax) {
- /* Abort if ctrl-c was pressed */
- if (ctrlc()) {
- puts("\nAbort\n");
- return 0;
- }
-
- putc('.');
-
- loopcount = 0;
- }
- }
-
- return 0;
-}
-U_BOOT_CMD(
- writepci2, 4, 1, do_writepci2,
- "writepci2- Write some data to pcibus\n",
- "<addr> <size>\n"
- " - Write some data to pcibus.\n"
-);
-
-int do_writepci22(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- unsigned int addr;
- unsigned int size;
- unsigned int countmax = 0;
- volatile unsigned long *ptr;
- volatile unsigned long val;
-
- addr = simple_strtol (argv[1], NULL, 16);
- size = simple_strtol (argv[2], NULL, 16);
-
- addr = PCI_ADDR | (addr & 0x00ffffff);
- printf("\nWriting at addr %08x, size %08x (countmax=%x)\n", addr, size, countmax);
- pci_write_config_word(PCIDEVID_405GP, 0x04, 0x0106); /* write command reg */
-
- while (1) {
-
- /*
- * Write one values to host via pci busmastering
- */
- ptr = (volatile unsigned long *)addr;
- *ptr = 0x01234567;
-
- /*
- * Read one value back
- */
- ptr = (volatile unsigned long *)addr;
- val = *ptr;
-
- /*
- * One pci config write
- */
- ibmPciConfigWrite(0x2e, 2, 0x1234); /* subsystem id */
- }
-
- return 0;
-}
-U_BOOT_CMD(
- writepci22, 4, 1, do_writepci22,
- "writepci22- Write some data to pcibus\n",
- "<addr> <size>\n"
- " - Write some data to pcibus.\n"
-);
-
-int ibmPciConfigWrite3
-(
- int offset, /* offset into the configuration space */
- int width, /* data width */
- unsigned int data /* data to be written */
- )
-{
- /*
- * Write config register address to the PCI config address register
- * bit 31 must be 1 and bits 1:0 must be 0 (note LE bit notation)
- */
- out32r(PCI_CFGADDR, 0x80000000 | (offset & 0xFFFFFFFC));
-
-#if 1 /* test-only */
- ppcSync();
-#endif
-
- /*
- * Write value to be written to the PCI config data register
- */
- switch ( width ) {
- case 1: out32r(PCI_CFGDATA | (offset & 0x3), (unsigned char)(data & 0xFF));
- break;
- case 2: out32r(PCI_CFGDATA | (offset & 0x3), (unsigned short)(data & 0xFFFF));
- break;
- case 4: out32r(PCI_CFGDATA | (offset & 0x3), data);
- break;
- }
-
- return (0);
-}
-
-int do_writepci3(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- unsigned int addr;
- unsigned int size;
- unsigned int countmax;
- int max;
- volatile unsigned long *ptr;
- volatile unsigned long val;
- int loopcount = 0;
-
- addr = simple_strtol (argv[1], NULL, 16);
- size = simple_strtol (argv[2], NULL, 16);
- countmax = simple_strtol (argv[3], NULL, 16);
- if (countmax == 0)
- countmax = 1000;
-
- do_getplb(NULL, 0, 0, NULL);
-
-#if 0
- out32r(PMM0LA, 0);
- out32r(PMM0PCILA, 0);
- out32r(PMM0PCIHA, 0);
- out32r(PMM0MA, 0);
- out32r(PMM1LA, PCI_ADDR);
- out32r(PMM1PCILA, addr & 0xff000000);
- out32r(PMM1PCIHA, 0x00000000);
- out32r(PMM1MA, 0xff000001);
-#endif
-
- printf("PMM1LA =%08lx\n", in32r(PMM1LA));
- printf("PMM1MA =%08lx\n", in32r(PMM1MA));
- printf("PMM1PCILA =%08lx\n", in32r(PMM1PCILA));
- printf("PMM1PCIHA =%08lx\n", in32r(PMM1PCIHA));
-
- addr = PCI_ADDR | (addr & 0x00ffffff);
- printf("\nWriting at addr %08x, size %08x (countmax=%x)\n", addr, size, countmax);
-
- max = size >> 2;
-
- pci_write_config_word(PCIDEVID_405GP, 0x04, 0x0106); /* write command reg */
-
- while (1) {
-
- /*
- * Write one values to host via pci busmastering
- */
- ptr = (volatile unsigned long *)addr;
- *ptr = 0x01234567;
-
- /*
- * Read one value back
- */
- ptr = (volatile unsigned long *)addr;
- val = *ptr;
-
- /*
- * One pci config write
- */
-/* pci_write_config_byte(PCIDEVID_405GP, 0x44, 0x00); */
-/* ibmPciConfigWrite(0x44, 1, 0x00); */
- ibmPciConfigWrite3(0x2e, 2, 0x1234); /* subsystem id */
-
- if (loopcount++ > countmax) {
- /* Abort if ctrl-c was pressed */
- if (ctrlc()) {
- puts("\nAbort\n");
- return 0;
- }
-
- putc('.');
-
- loopcount = 0;
- }
- }
-
- return 0;
-}
-U_BOOT_CMD(
- writepci3, 4, 1, do_writepci3,
- "writepci3- Write some data to pcibus\n",
- "<addr> <size>\n"
- " - Write some data to pcibus.\n"
-);
-
-
-#define SECTOR_SIZE 32 /* 32 byte cache line */
-#define SECTOR_MASK 0x1F
-
-void my_flush_dcache(ulong lcl_addr, ulong count)
-{
- unsigned int lcl_target;
-
- /* promote to nearest cache sector */
- lcl_target = (lcl_addr + count + SECTOR_SIZE - 1) & ~SECTOR_MASK;
- lcl_addr &= ~SECTOR_MASK;
- while (lcl_addr != lcl_target)
- {
- /* ppcDcbf((void *)lcl_addr);*/
- __asm__("dcbf 0,%0": :"r" (lcl_addr));
- lcl_addr += SECTOR_SIZE;
- }
- __asm__("sync"); /* Always flush prefetch queue in any case */
-}
-
-int do_writepci_cache(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- unsigned int addr;
- unsigned int size;
- unsigned int countmax;
- int i;
- volatile unsigned long *ptr;
- volatile unsigned long val;
- int loopcount = 0;
-
- addr = simple_strtol (argv[1], NULL, 16);
- size = simple_strtol (argv[2], NULL, 16);
- countmax = simple_strtol (argv[3], NULL, 16);
- if (countmax == 0)
- countmax = 1000;
-
- do_getplb(NULL, 0, 0, NULL);
-
-#if 0
- out32r(PMM0LA, 0);
- out32r(PMM0PCILA, 0);
- out32r(PMM0PCIHA, 0);
- out32r(PMM0MA, 0);
- out32r(PMM1LA, PCI_ADDR);
- out32r(PMM1PCILA, addr & 0xff000000);
- out32r(PMM1PCIHA, 0x00000000);
- out32r(PMM1MA, 0xff000001);
-#endif
-
- printf("PMM1LA =%08lx\n", in32r(PMM1LA));
- printf("PMM1MA =%08lx\n", in32r(PMM1MA));
- printf("PMM1PCILA =%08lx\n", in32r(PMM1PCILA));
- printf("PMM1PCIHA =%08lx\n", in32r(PMM1PCIHA));
-
- addr = PCI_ADDR | (addr & 0x00ffffff);
- printf("\nWriting at addr %08x, size %08x (countmax=%x)\n", addr, size, countmax);
-
- pci_write_config_word(PCIDEVID_405GP, 0x04, 0x0106); /* write command reg */
-
- i = 0;
-
- /*
- * Set pci region as cachable
- */
- ppcSync();
- __asm__ volatile (" addis 4,0,0x0000 ");
- __asm__ volatile (" addi 4,4,0x0080 ");
- __asm__ volatile (" mtdccr 4 ");
- ppcSync();
-
- while (1) {
-
- /*
- * Write one values to host via pci busmastering
- */
- ptr = (volatile unsigned long *)addr;
- printf("A\n"); /* test-only */
- *ptr++ = i++;
- *ptr++ = i++;
- *ptr++ = i++;
- *ptr++ = i++;
- *ptr++ = i++;
- *ptr++ = i++;
- *ptr++ = i++;
- *ptr++ = i++;
- printf("B\n"); /* test-only */
- my_flush_dcache(addr, 32);
- printf("C\n"); /* test-only */
-
- /*
- * Read one value back
- */
- ptr = (volatile unsigned long *)addr;
- val = *ptr;
- printf("D\n"); /* test-only */
-
- /*
- * One pci config write
- */
-/* pci_write_config_byte(PCIDEVID_405GP, 0x44, 0x00); */
-/* ibmPciConfigWrite(0x44, 1, 0x00); */
- ibmPciConfigWrite3(0x2e, 2, 0x1234); /* subsystem id */
- printf("E\n"); /* test-only */
-
- if (loopcount++ > countmax) {
- /* Abort if ctrl-c was pressed */
- if (ctrlc()) {
- puts("\nAbort\n");
- return 0;
- }
-
- putc('.');
-
- loopcount = 0;
- }
- }
-
- return 0;
-}
-U_BOOT_CMD(
- writepci_cache, 4, 1, do_writepci_cache,
- "writepci_cache - Write some data to pcibus\n",
- "<addr> <size>\n"
- " - Write some data to pcibus.\n"
-);
-
-int do_savepci(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- unsigned int *ptr;
- int i;
-
- /*
- * Save own pci configuration in PRAM
- */
- memset((char *)PCI_REGS_ADDR, 0, PCI_REGS_LEN);
- ptr = (unsigned int *)PCI_REGS_ADDR + 1;
- for (i=0; i<0x40; i+=4) {
- pci_read_config_dword(PCIDEVID_405GP, i, ptr++);
- }
- ptr = (unsigned int *)PCI_REGS_ADDR;
- *ptr = crc32(0, (uchar *)PCI_REGS_ADDR+4, PCI_REGS_LEN-4);
-
- printf("\nStoring PCI Configuration Regs...\n");
-
- return 0;
-}
-U_BOOT_CMD(
- savepci, 4, 1, do_savepci,
- "savepci - Save all pci regs\n",
- "<addr> <size>\n"
- " - Write some data to pcibus.\n"
-);
-
-int do_restorepci(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- unsigned int *ptr;
- int i;
-
- /*
- * Rewrite pci config regs (only after soft-reset with magic set)
- */
- ptr = (unsigned int *)PCI_REGS_ADDR;
- if (crc32(0, (uchar *)PCI_REGS_ADDR+4, PCI_REGS_LEN-4) == *ptr) {
- puts("Restoring PCI Configurations Regs!\n");
- ptr = (unsigned int *)PCI_REGS_ADDR + 1;
- for (i=0; i<0x40; i+=4) {
- pci_write_config_dword(PCIDEVID_405GP, i, *ptr++);
- }
- }
- mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
-
- return 0;
-}
-U_BOOT_CMD(
- restorepci, 4, 1, do_restorepci,
- "restorepci - Restore all pci regs\n",
- "<addr> <size>\n"
- " - Write some data to pcibus.\n"
-);
-
-
-extern void write_without_sync(void);
-extern void write_with_sync(void);
-extern void write_with_less_sync(void);
-extern void write_with_more_sync(void);
-
-/*
- * code from IBM-PPCSUPP
- */
-int do_writeibm1(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- pci_write_config_word(PCIDEVID_405GP, 0x04, 0x0106); /* write command reg */
-
- write_without_sync();
-
- return 0;
-}
-U_BOOT_CMD(
- writeibm1, 4, 1, do_writeibm1,
- "writeibm1- Write some data to pcibus (without sync)\n",
- "<addr> <size>\n"
- " - Write some data to pcibus.\n"
-);
-
-int do_writeibm2(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- pci_write_config_word(PCIDEVID_405GP, 0x04, 0x0106); /* write command reg */
-
- write_with_sync();
-
- return 0;
-}
-U_BOOT_CMD(
- writeibm2, 4, 1, do_writeibm2,
- "writeibm2- Write some data to pcibus (with sync)\n",
- "<addr> <size>\n"
- " - Write some data to pcibus.\n"
-);
-
-int do_writeibm22(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- pci_write_config_word(PCIDEVID_405GP, 0x04, 0x0106); /* write command reg */
-
- write_with_less_sync();
-
- return 0;
-}
-U_BOOT_CMD(
- writeibm22, 4, 1, do_writeibm22,
- "writeibm22- Write some data to pcibus (with less sync)\n",
- "<addr> <size>\n"
- " - Write some data to pcibus.\n"
-);
-
-int do_writeibm3(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- pci_write_config_word(PCIDEVID_405GP, 0x04, 0x0106); /* write command reg */
-
- write_with_more_sync();
-
- return 0;
-}
-U_BOOT_CMD(
- writeibm3, 4, 1, do_writeibm3,
- "writeibm3- Write some data to pcibus (with more sync)\n",
- "<addr> <size>\n"
- " - Write some data to pcibus.\n"
-);
-#endif
diff --git a/board/esd/pci405/config.mk b/board/esd/pci405/config.mk
deleted file mode 100644
index 83f07fe79e..0000000000
--- a/board/esd/pci405/config.mk
+++ /dev/null
@@ -1,29 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# esd ADCIOP boards
-#
-
-#TEXT_BASE = 0xFFFE0000
-TEXT_BASE = 0xFFFD0000
diff --git a/board/esd/pci405/flash.c b/board/esd/pci405/flash.c
deleted file mode 100644
index 3b21781d7d..0000000000
--- a/board/esd/pci405/flash.c
+++ /dev/null
@@ -1,101 +0,0 @@
-/*
- * (C) Copyright 2001
- * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <ppc4xx.h>
-#include <asm/processor.h>
-
-/*
- * include common flash code (for esd boards)
- */
-#include "../common/flash.c"
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (vu_long * addr, flash_info_t * info);
-static void flash_get_offsets (ulong base, flash_info_t * info);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- unsigned long size_b0;
- int i;
- uint pbcr;
- unsigned long base_b0;
- int size_val = 0;
-
- /* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* Static FLASH Bank configuration here - FIXME XXX */
-
- size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size_b0, size_b0<<20);
- }
-
- /* Setup offsets */
- flash_get_offsets (-size_b0, &flash_info[0]);
-
- /* Re-do sizing to get full correct info */
- mtdcr(ebccfga, pb0cr);
- pbcr = mfdcr(ebccfgd);
- mtdcr(ebccfga, pb0cr);
- base_b0 = -size_b0;
- switch (size_b0) {
- case 1 << 20:
- size_val = 0;
- break;
- case 2 << 20:
- size_val = 1;
- break;
- case 4 << 20:
- size_val = 2;
- break;
- case 8 << 20:
- size_val = 3;
- break;
- case 16 << 20:
- size_val = 4;
- break;
- }
- pbcr = (pbcr & 0x0001ffff) | base_b0 | (size_val << 17);
- mtdcr(ebccfgd, pbcr);
-
- /* Monitor protection ON by default */
- (void)flash_protect(FLAG_PROTECT_SET,
- -monitor_flash_len,
- 0xffffffff,
- &flash_info[0]);
-
- flash_info[0].size = size_b0;
-
- return (size_b0);
-}
diff --git a/board/esd/pci405/fpgadata.c b/board/esd/pci405/fpgadata.c
deleted file mode 100644
index c64ad95ece..0000000000
--- a/board/esd/pci405/fpgadata.c
+++ /dev/null
@@ -1,746 +0,0 @@
- 0x1f,0x8b,0x08,0x08,0xcd,0x78,0x61,0x3f,0x00,0x03,0x70,0x63,0x69,0x34,0x30,0x35,
- 0x5f,0x31,0x5f,0x30,0x34,0x2e,0x62,0x69,0x74,0x00,0xed,0x9c,0x7f,0x78,0x14,0xc7,
- 0x99,0xe7,0xdf,0xae,0xee,0x11,0x2d,0xcd,0x88,0x69,0x89,0x11,0x1e,0x3b,0x32,0xdb,
- 0x1a,0x09,0x3c,0xc1,0x23,0x69,0x18,0x61,0x85,0x60,0x79,0xd4,0x8c,0x04,0x19,0x1b,
- 0xd9,0x4c,0x6c,0x27,0x61,0xf3,0xf8,0xc9,0x8e,0x1d,0x92,0x23,0x59,0x92,0x47,0x90,
- 0xdc,0x2e,0x49,0x9c,0x6c,0x8d,0x24,0xd0,0x00,0xb2,0x19,0x30,0x97,0xb0,0x59,0xce,
- 0x3b,0x60,0x12,0x0b,0x9b,0x64,0x07,0x61,0x1b,0x61,0x88,0xdd,0x92,0x85,0x23,0x40,
- 0x06,0x85,0xf5,0x79,0xb1,0xcd,0xe2,0xc1,0x91,0xbd,0xb2,0x23,0x63,0x19,0xb3,0x8e,
- 0x00,0x19,0xdd,0x5b,0xdd,0x3d,0xdd,0x2d,0xe1,0xfd,0x71,0xb7,0xf7,0xdc,0xde,0xf3,
- 0x9c,0xdb,0x7f,0xb8,0x50,0xa9,0xba,0xab,0xab,0xde,0xfa,0xd4,0xf7,0x7d,0xdf,0x6a,
- 0x41,0xbe,0x7b,0x54,0xff,0x0f,0x80,0xbb,0x1f,0xa4,0xe6,0xaf,0x7f,0x6b,0x7e,0xf0,
- 0x96,0x3f,0x9b,0xf7,0x67,0xc1,0xf9,0x55,0xdf,0xfd,0xfa,0x0a,0x78,0x00,0x0a,0x42,
- 0xdf,0x9b,0x77,0xcb,0xf7,0x57,0xcf,0x9b,0x3f,0x1f,0xbe,0x0e,0xce,0x50,0x30,0x58,
- 0x53,0x1d,0x5c,0x50,0x1d,0xba,0x05,0x56,0x40,0xfe,0xbc,0x05,0x0b,0x83,0xb7,0x2c,
- 0x9c,0x57,0x03,0xdf,0x00,0x88,0x27,0x27,0xf0,0x7a,0xe2,0xaf,0xbf,0xf4,0xcd,0x20,
- 0x50,0x0e,0x00,0xa6,0x05,0xb9,0x38,0xfb,0x7f,0x5e,0x90,0x93,0x39,0xa0,0xf5,0x95,
- 0x41,0x50,0xd9,0xbf,0xc1,0xa8,0xcf,0x0f,0x82,0x6c,0xff,0x37,0x17,0x04,0x05,0x62,
- 0xe0,0xf9,0x0e,0x14,0x4b,0x30,0xe5,0xe2,0x14,0x81,0xea,0xa5,0x7f,0xad,0x8e,0x4c,
- 0xad,0x62,0xd7,0xbf,0xa3,0xae,0xf8,0x13,0xaa,0x84,0xff,0x58,0xdd,0x84,0x04,0x71,
- 0xf0,0x42,0x1e,0x70,0xd4,0x2c,0xd4,0xf7,0xe9,0x75,0xaa,0x63,0x5c,0x7e,0xbd,0x68,
- 0x46,0x9f,0xbb,0x9f,0x8c,0xd3,0x93,0x05,0x3e,0xa5,0x70,0x8c,0x0f,0x42,0xb3,0xde,
- 0x23,0xe9,0x3d,0xba,0x59,0x29,0xff,0x47,0x67,0x92,0x5c,0x8d,0x6c,0x96,0x7d,0x59,
- 0x31,0x58,0x20,0x0b,0x41,0xad,0x2e,0xe9,0x18,0x96,0x1f,0x89,0x77,0xf6,0x3b,0x81,
- 0x74,0xc0,0x63,0xa2,0x4f,0xc9,0x0f,0x92,0x5d,0x9c,0xde,0x4e,0x2d,0xe9,0x74,0x3c,
- 0x29,0xcc,0x55,0x9d,0x69,0x18,0x11,0x9e,0x04,0xd6,0x8e,0x64,0x84,0xb8,0xde,0xa7,
- 0x92,0x63,0xf0,0xba,0xb0,0x50,0x75,0xb7,0xf1,0x7b,0xe1,0x0f,0x10,0x6a,0x2e,0xcc,
- 0xf0,0x54,0xd0,0xdb,0x65,0xb9,0x27,0x94,0xd7,0xe1,0x73,0x3d,0xee,0x97,0x1b,0x46,
- 0xe0,0x1f,0xe0,0x79,0xd5,0x3d,0xca,0xaf,0x05,0xbd,0x9d,0x22,0xed,0x26,0xc7,0x21,
- 0xa4,0xba,0x93,0xfc,0x00,0x1c,0x87,0xae,0xd8,0xf4,0x0c,0x2f,0x09,0xb2,0x56,0xd7,
- 0xef,0xa8,0xfb,0xb6,0x9b,0x94,0xab,0xce,0xa7,0xc8,0x55,0x79,0x33,0xc8,0xaa,0x98,
- 0x21,0x21,0x9c,0x3f,0xed,0x9e,0x8e,0x3b,0xc9,0x26,0xfc,0x91,0x33,0xd8,0x32,0x00,
- 0x8f,0x80,0x4c,0x0b,0x82,0x64,0x01,0xce,0x2c,0xbb,0xe2,0xdc,0xac,0xb6,0x76,0x5a,
- 0x96,0x75,0xfe,0x29,0x39,0x0b,0x3f,0xa3,0xe5,0x9d,0xe2,0x5a,0xe2,0x35,0xda,0x45,
- 0x45,0x11,0x5e,0x68,0x09,0x1e,0x75,0xcf,0xe7,0x07,0x92,0xaf,0xd3,0xe0,0xf0,0x5d,
- 0x41,0x67,0xb1,0x31,0x6f,0xca,0x8d,0xdd,0xf4,0x7d,0x8e,0x75,0xaf,0x61,0x5c,0x7e,
- 0x1f,0x6e,0xa3,0xee,0x0f,0xf8,0xc1,0x3c,0xbd,0x9f,0x9d,0xdc,0xb0,0xe0,0xfc,0x76,
- 0x78,0x60,0x73,0x95,0x33,0x90,0xbe,0x22,0x97,0x52,0x57,0x86,0x7f,0xd7,0x18,0xcf,
- 0x68,0xd1,0xc6,0x64,0xbb,0x5c,0x39,0xe0,0x8c,0xb5,0x94,0xc2,0x81,0x95,0x95,0x54,
- 0x6c,0x26,0xa7,0x8c,0x71,0xa1,0xf0,0xa8,0xf2,0xf8,0xb6,0xca,0xec,0xa6,0xe1,0xbc,
- 0x59,0x70,0x80,0x56,0xa7,0xb1,0x2f,0x59,0x30,0xde,0x4f,0x3a,0x91,0x78,0x0c,0x56,
- 0xa9,0xce,0xd0,0xcc,0x26,0xd8,0x0f,0x81,0x14,0x8e,0xe7,0x05,0x63,0x1e,0x86,0x4b,
- 0x0e,0xb5,0xbc,0x0b,0x61,0xea,0x4e,0xf3,0x7e,0xb8,0x0c,0xf5,0x89,0x1d,0x69,0xfe,
- 0xb2,0x71,0xcf,0x28,0x8e,0xe8,0x69,0x78,0x10,0x70,0xac,0xd3,0x30,0x06,0x61,0x52,
- 0xdf,0xc6,0x9f,0x02,0xbd,0x9d,0x28,0x1d,0x81,0xa3,0x10,0x52,0x2a,0xbb,0xf8,0x21,
- 0xe1,0x28,0xd4,0xad,0x3c,0x91,0x2a,0xef,0x35,0xee,0x49,0x85,0x6f,0x8a,0xac,0x4e,
- 0xdc,0xe6,0xeb,0x53,0x36,0x40,0x55,0x5c,0xfc,0x29,0xf6,0x45,0xb7,0x75,0xaf,0xa3,
- 0x02,0xb6,0x80,0x6f,0x91,0xb8,0x2d,0x6f,0x08,0x36,0xc0,0x77,0x55,0x48,0x91,0x17,
- 0x8d,0x31,0x13,0x85,0x42,0x92,0x50,0xe4,0x2f,0x8a,0x52,0xde,0x8b,0x90,0x50,0x56,
- 0x2d,0x12,0x3d,0xa4,0x97,0xd3,0xc7,0xac,0xbb,0x30,0x4e,0xfa,0xb9,0x10,0xb8,0x28,
- 0x9f,0x25,0xfd,0x10,0x86,0x2a,0xca,0x9f,0xe7,0xf5,0x79,0xd8,0x7e,0xe3,0x3f,0xc3,
- 0x3b,0xca,0xb3,0x31,0x77,0x6a,0xc6,0x5b,0x70,0x49,0xa9,0xc7,0x02,0xff,0x76,0x9e,
- 0x3e,0x66,0xdb,0x1d,0xaf,0xc0,0xab,0x10,0x56,0x02,0x29,0x7e,0x08,0x2e,0x49,0xf5,
- 0x77,0xb8,0x07,0xf9,0x39,0xc6,0x78,0x2e,0x90,0x7e,0xff,0x66,0x52,0xae,0x12,0x45,
- 0x8a,0xdd,0xeb,0xf6,0x54,0x49,0xce,0x16,0x32,0xdd,0x78,0x07,0xd1,0xd1,0xe7,0xdc,
- 0x19,0x0d,0xdc,0x1d,0x95,0x48,0x9f,0xb2,0x8f,0x0b,0x64,0x9d,0x52,0x4b,0x8b,0x61,
- 0x9f,0xde,0x92,0x5f,0x90,0x3d,0x10,0x50,0xc4,0x54,0xde,0x08,0x77,0x10,0xaa,0x14,
- 0x67,0x8a,0xac,0x37,0xc6,0x2c,0x5d,0xf4,0xb6,0xe7,0x92,0x10,0x56,0x5c,0xf8,0x3c,
- 0xe9,0x12,0x84,0xb1,0x2f,0xce,0x4e,0xc3,0xce,0xfc,0xdc,0xe3,0x70,0x3d,0x84,0x17,
- 0xb9,0xbb,0xf8,0x11,0xc0,0x3a,0x65,0x5a,0x8a,0xbf,0xc3,0x98,0x23,0xbf,0x44,0xd9,
- 0x10,0x83,0xbb,0x85,0x97,0xe5,0x31,0xe8,0x02,0x57,0x92,0x3f,0x96,0x6b,0xe7,0x58,
- 0xa8,0x6c,0xe4,0xaa,0xa8,0x73,0x37,0xff,0x2d,0xcf,0xb3,0xe0,0xa3,0xe2,0x30,0x39,
- 0x66,0x2c,0x51,0xbf,0x63,0x19,0xd7,0x0a,0x01,0xb4,0x4f,0x52,0x88,0x73,0x2b,0x2b,
- 0x62,0x37,0xd6,0xe9,0xe3,0x92,0xe6,0x4a,0xe5,0xf6,0xda,0xca,0x7e,0xe7,0x18,0xb9,
- 0x0f,0x6d,0xa2,0x3c,0xee,0x6f,0x6e,0xe9,0x37,0xc6,0xba,0x53,0x9c,0x05,0xff,0x44,
- 0x7f,0x7c,0xd9,0x3d,0x7c,0xdd,0x2c,0xf8,0x50,0x9d,0x17,0x77,0xad,0xe5,0x8f,0x19,
- 0xf6,0x29,0x16,0xee,0x26,0x7f,0xa8,0x08,0x9f,0x76,0xaf,0xff,0xc2,0x5b,0xe9,0x2b,
- 0x2b,0xeb,0x14,0x77,0x86,0xef,0x35,0xec,0x53,0x71,0x5c,0x90,0x4e,0xaa,0x37,0x0f,
- 0x09,0xe3,0x0d,0x0b,0x61,0x82,0xd6,0xc7,0x5d,0x63,0xbc,0x64,0x8c,0x67,0x67,0x51,
- 0x86,0x6c,0xce,0x94,0xab,0xe2,0xb7,0xf8,0xe5,0xd8,0x97,0xca,0x95,0xe2,0xa8,0x6f,
- 0xae,0x31,0x2e,0xc5,0x90,0x8a,0xff,0x5d,0xf1,0xfd,0x6a,0xb4,0xb9,0xc5,0x0b,0x07,
- 0xa0,0xb2,0x49,0x8c,0x13,0x81,0xea,0xef,0x17,0x97,0xfa,0x0b,0x1e,0x83,0xb4,0xda,
- 0x29,0x10,0x45,0x44,0xfb,0x8c,0x8b,0x69,0xe2,0x6d,0xd3,0xe7,0xa1,0xb3,0xe4,0xd7,
- 0xe4,0x7d,0xa8,0x51,0x5d,0xdb,0xf8,0x0a,0x98,0xe0,0xea,0xd4,0x8e,0x94,0xb3,0xaa,
- 0x4d,0xbf,0x67,0x0a,0xde,0x83,0xbf,0x87,0x9f,0xa8,0x38,0xdd,0x23,0x70,0x05,0x66,
- 0x0d,0x60,0x21,0x6b,0xd8,0x67,0x42,0x1a,0x87,0x93,0x30,0x4f,0xed,0x18,0x69,0xbd,
- 0x40,0xeb,0xd1,0x18,0x5d,0x83,0xbc,0xdc,0xa8,0xd7,0xad,0x13,0x16,0x93,0x4d,0x42,
- 0x48,0xf5,0x27,0x23,0xbf,0x87,0x43,0xe0,0x8b,0x8b,0x29,0x52,0xa1,0xe8,0xf6,0x49,
- 0x1d,0x15,0xf2,0x26,0xf0,0xa9,0xf8,0xa3,0x21,0x7c,0x07,0x5f,0xa3,0xd8,0x45,0x64,
- 0x63,0x3c,0x45,0x01,0xa0,0x35,0x88,0x78,0x20,0x64,0x00,0xeb,0x1e,0x68,0xc2,0x75,
- 0x44,0x0c,0xfb,0xa4,0x85,0x71,0xf1,0xa4,0xbf,0x46,0x15,0xbb,0x5a,0xb3,0x30,0xa1,
- 0x74,0x29,0xae,0x34,0x2f,0x13,0x63,0x1e,0x6e,0x1c,0x13,0xae,0xc8,0xb7,0xaa,0x6e,
- 0xe0,0x47,0x61,0xc2,0x1f,0x5e,0xee,0xce,0xf2,0xc3,0xd3,0x0c,0xd6,0x39,0xc6,0xc9,
- 0x49,0x39,0x2c,0xbb,0x2f,0xf0,0x21,0xe5,0x64,0x4b,0x38,0x1b,0x18,0xc3,0x5f,0xca,
- 0xf1,0x73,0x42,0xd8,0x1c,0xac,0x2a,0x70,0x7e,0x44,0xfc,0x74,0x13,0xad,0xca,0xe2,
- 0xdc,0x66,0x4d,0x7e,0xbe,0x84,0xd8,0x5c,0x45,0x9d,0xf3,0x5a,0x28,0x7d,0x0c,0x0d,
- 0x00,0xfb,0xf2,0xa6,0xc9,0xcf,0xbd,0xf0,0x24,0x54,0x25,0x9d,0x19,0x5f,0x27,0x2b,
- 0x30,0x9e,0x8d,0x9a,0xfc,0x1c,0x41,0x6c,0xe2,0xf3,0x32,0xce,0x5f,0xf8,0xb0,0xa0,
- 0x22,0x5f,0x54,0x93,0x9f,0x87,0xe1,0x0d,0xa8,0x97,0x91,0x4b,0x3f,0x66,0x05,0xc6,
- 0xcf,0x31,0x93,0x9f,0x7b,0x71,0x88,0x71,0x18,0x33,0xb8,0x8e,0xae,0x40,0xb8,0x67,
- 0x73,0x86,0x1f,0x34,0xf9,0x59,0x2a,0xd4,0xc3,0x2e,0x05,0xa7,0x7b,0x04,0xc7,0x13,
- 0x8d,0x31,0x43,0x2e,0x98,0xfc,0x6c,0x12,0xf7,0x0b,0x15,0x8a,0x98,0x51,0xb2,0x8c,
- 0x3d,0xcc,0x50,0xc7,0x8c,0xf1,0x94,0x39,0x44,0xd5,0xb6,0x9b,0x56,0x46,0x7f,0x40,
- 0x5e,0x81,0x03,0xe9,0xca,0xac,0x73,0x2d,0xe9,0x37,0xf9,0x39,0x1d,0x1f,0x33,0x7f,
- 0xcc,0x15,0xe4,0x55,0xf8,0x30,0x5d,0x97,0x75,0x07,0xf9,0x53,0x26,0x3f,0x0f,0xc3,
- 0x44,0xf4,0xf3,0x7d,0xd5,0xa3,0x5a,0x5f,0xb4,0x7e,0x9a,0xfc,0x74,0x0c,0xc8,0xc7,
- 0x69,0xed,0x76,0xf7,0xf3,0x4b,0xfd,0xf4,0x0a,0xd4,0x65,0x27,0xf1,0x73,0x07,0xb4,
- 0x42,0x59,0xeb,0xd2,0xd5,0xa4,0x54,0xf9,0x19,0x54,0xa2,0x31,0xda,0xf9,0xa9,0x3e,
- 0x4e,0x59,0x17,0x8a,0xbf,0x5a,0x76,0x00,0x0b,0x76,0x7e,0x7a,0x06,0xb0,0x9d,0xff,
- 0x02,0x76,0xfd,0x2e,0xdc,0x03,0x02,0xaa,0xd7,0xce,0xcf,0x4e,0x62,0xf0,0xf3,0xcf,
- 0x91,0x9f,0x61,0x1a,0x98,0xc4,0x4f,0x61,0x0c,0x6a,0x05,0x37,0x9d,0x91,0x96,0xb5,
- 0xc5,0x4d,0x4d,0x7e,0x26,0xa5,0x3e,0xc6,0x25,0xb4,0x5d,0xa2,0xb3,0x00,0x6d,0xf7,
- 0x4d,0x93,0x9f,0x2b,0xc4,0x0d,0xa4,0x6a,0x91,0x33,0x55,0x3c,0x04,0x06,0x5f,0xec,
- 0xfc,0xfc,0x6b,0xfd,0x47,0x66,0x9d,0xc5,0x4f,0x01,0xb1,0x19,0x88,0x2d,0xf5,0x2c,
- 0x39,0x02,0xfb,0x10,0x50,0x4e,0xc9,0xce,0x4f,0x38,0xcd,0xba,0x00,0xb8,0x44,0x8c,
- 0xbe,0x58,0xfc,0x64,0xd8,0xac,0x52,0xdc,0xdb,0x18,0x23,0xf5,0xbe,0xe4,0xf8,0xe9,
- 0x75,0x5c,0x4c,0x5f,0x82,0xda,0x98,0x6b,0x8b,0x56,0x57,0xcf,0xea,0x5e,0x34,0xf9,
- 0x79,0xce,0x95,0x91,0x11,0x47,0xeb,0x8a,0xb3,0xb4,0x1b,0xef,0xb9,0x94,0x92,0x13,
- 0x16,0x3f,0x61,0x5f,0x14,0x6d,0xa2,0x98,0xf4,0x95,0x99,0x7d,0x31,0xee,0x59,0xb4,
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- 0x2c,0x70,0xdb,0xd4,0x5b,0x82,0xa2,0xed,0x9e,0x8e,0x35,0xdc,0x7d,0xf4,0x2b,0xf2,
- 0xf5,0xfd,0x5a,0xe1,0x2f,0x91,0x59,0x66,0x1d,0x8f,0x50,0x91,0x82,0x82,0x8b,0x63,
- 0x85,0xa2,0x90,0xe0,0x2a,0xb2,0xee,0x59,0x3f,0xb1,0x6c,0xe2,0xef,0x27,0x2e,0x4e,
- 0x7c,0x6c,0x16,0xe0,0xdf,0x75,0x85,0xdf,0x58,0x76,0xb5,0xf7,0xa5,0xcc,0xfe,0x1f,
- 0x87,0x5f,0x77,0xd6,0xb2,0xc2,0x2a,0xdb,0x3d,0xeb,0x97,0x4d,0xcc,0xa8,0xe9,0x1b,
- 0xf8,0xb8,0xbe,0xae,0xe9,0x24,0x2b,0x7c,0x60,0xab,0xf3,0x46,0xcf,0x16,0xcf,0x6b,
- 0xeb,0xf8,0xc1,0xad,0xde,0xe8,0x8b,0x33,0x0e,0x60,0xc1,0xaa,0x9b,0x06,0xab,0x95,
- 0x1d,0xb1,0x9b,0x3c,0xf9,0x47,0x48,0xb3,0x52,0x2a,0xdd,0x24,0xe4,0x5b,0xef,0x20,
- 0x98,0x9c,0x77,0xac,0xe6,0x74,0xce,0x9b,0x75,0x1a,0xe7,0xe3,0xc5,0x5e,0x61,0xbd,
- 0xc9,0x79,0xab,0x5d,0xfc,0x7e,0xed,0xef,0xa9,0x08,0x16,0xaf,0xad,0x31,0x13,0xd6,
- 0x24,0x4a,0xd5,0x2f,0xc8,0x45,0xfd,0xc2,0x1a,0xae,0x94,0x62,0xc1,0xba,0x27,0x00,
- 0xb6,0x93,0xf3,0x44,0xdb,0x1f,0x64,0x31,0x6b,0x24,0x61,0x0e,0x97,0x4f,0x23,0xcd,
- 0xd2,0xcf,0x85,0xd9,0x9c,0x48,0x19,0xe7,0xcd,0xba,0x32,0x58,0x9a,0x28,0x4e,0x37,
- 0x76,0x16,0x55,0x09,0x51,0xaa,0x15,0xcc,0xa7,0xa9,0x55,0xb8,0x66,0x3d,0xd4,0x11,
- 0xe4,0xee,0x82,0x7b,0x70,0xcd,0x62,0xc1,0xd8,0x52,0xd9,0x81,0x5a,0xe1,0x16,0x28,
- 0x52,0x84,0xe5,0x9c,0x07,0xbe,0x40,0xd9,0x82,0xe2,0x8c,0x6d,0x1a,0xdb,0x29,0x44,
- 0x62,0xa7,0xde,0xd8,0x01,0x32,0x30,0x0a,0x56,0x9d,0xc0,0x00,0x88,0xcb,0x80,0x62,
- 0x61,0x3b,0x5b,0x0f,0xd4,0xa8,0x93,0x38,0x05,0x55,0xc7,0x76,0x98,0x03,0xf9,0x94,
- 0x3c,0x80,0xef,0x80,0x85,0x16,0xe3,0x71,0xca,0xe2,0xbb,0xf3,0xe2,0xc8,0xf9,0x06,
- 0x51,0xea,0x15,0x82,0x7a,0x21,0xc7,0x10,0x05,0x6f,0x2f,0x1b,0x78,0xc7,0xe7,0x18,
- 0x05,0xa3,0x1d,0x38,0x21,0x48,0xd9,0xfe,0x00,0xbd,0x10,0xec,0xd1,0x0a,0x66,0xdd,
- 0xe2,0x06,0xa1,0x19,0x31,0xbd,0x44,0x44,0xbe,0xc4,0x7b,0xb4,0x02,0xcd,0xdd,0x93,
- 0x63,0x9c,0x17,0x91,0x75,0xc0,0xf6,0x29,0x17,0x2b,0xe4,0xc6,0x2c,0xc6,0x21,0x97,
- 0xcc,0x76,0xd8,0x17,0xd6,0xce,0xbc,0xa7,0x82,0xef,0xe1,0x81,0xc5,0x6c,0x6c,0x70,
- 0x0b,0x64,0x85,0x88,0x71,0xcf,0x28,0x4e,0xca,0x22,0x2a,0xc5,0x05,0xaf,0x90,0x2b,
- 0x98,0xec,0x89,0x6a,0xe7,0x6c,0x10,0xef,0xa2,0x80,0xee,0x9b,0x5e,0x00,0xf3,0x9e,
- 0x8c,0xf3,0x0c,0xef,0xf9,0x4b,0x8c,0x42,0xa1,0xc9,0x3a,0x6e,0x89,0xb0,0x3a,0x51,
- 0x1a,0xff,0x82,0xb7,0xe8,0x45,0x61,0xf5,0xba,0x1d,0xac,0x60,0xbe,0x1f,0x8e,0xf2,
- 0x6a,0xba,0x23,0x7e,0x93,0x37,0xff,0x45,0xb2,0x9a,0xde,0xc7,0x0a,0xb9,0xba,0x18,
- 0xe3,0x3c,0x6e,0x0b,0xb8,0x3f,0xbc,0xe8,0x60,0x37,0xc0,0x42,0xaf,0x39,0x9e,0xc5,
- 0x50,0x41,0x6f,0x97,0x8b,0xa3,0xc2,0x56,0xae,0x82,0x36,0xd9,0xed,0x53,0xc1,0x77,
- 0x28,0xa3,0xde,0x78,0x9e,0x97,0x5b,0x0f,0xf7,0x27,0xb4,0x82,0x69,0x4b,0x8b,0xe3,
- 0x8e,0x05,0xdc,0x2c,0x34,0x87,0xa2,0xac,0xb0,0x56,0x2f,0x98,0x73,0xc4,0xdd,0x0d,
- 0x2b,0xe8,0xf5,0x72,0x5e,0x94,0xdb,0x8a,0x05,0xc3,0x50,0x73,0xfd,0x64,0xe3,0xc9,
- 0xf6,0x00,0xa9,0x25,0x57,0xb0,0xc6,0x33,0x02,0x31,0x44,0x7f,0xa3,0x58,0x44,0x04,
- 0x85,0x6a,0x05,0x30,0xfb,0x49,0x20,0x86,0x7b,0x80,0xc3,0xc5,0x35,0xe4,0x0a,0x8a,
- 0xd9,0x4f,0x51,0x78,0x00,0x72,0xba,0x46,0x2f,0x58,0xe3,0x19,0x21,0x40,0x0d,0xce,
- 0x1b,0x05,0xf3,0x9e,0x9c,0x52,0x11,0x77,0x78,0x61,0x92,0x7d,0x9a,0xfd,0x54,0x80,
- 0xfd,0xa5,0x85,0x39,0x4a,0x7e,0x8a,0xac,0x80,0x52,0xcd,0x50,0xcd,0x7b,0xc6,0xe7,
- 0xf8,0xb9,0xe9,0xd0,0x40,0xa5,0xac,0xb0,0x80,0xbb,0x81,0x15,0x72,0xef,0x1e,0xc3,
- 0xa5,0x51,0xa6,0xb8,0x62,0xbc,0x07,0x8e,0xd0,0x79,0x8a,0x28,0xf1,0x82,0xcd,0x3e,
- 0x05,0x98,0xad,0x14,0x4a,0xfc,0xbd,0xf0,0x3b,0x98,0xbf,0x48,0xfb,0xa5,0x5e,0xab,
- 0x9f,0xc2,0xfd,0x3d,0xde,0xe0,0x92,0xd2,0xa2,0x56,0x66,0x9f,0xc1,0x25,0x2e,0x9b,
- 0x7d,0x2a,0x68,0xea,0xb6,0xf5,0x65,0xe3,0xbc,0xc2,0x45,0x1b,0x43,0x0c,0xef,0x65,
- 0x45,0x1d,0x8d,0x0f,0x5c,0xaf,0x15,0x6c,0xf6,0xa9,0x4a,0x3f,0xf0,0xcc,0x5a,0x5c,
- 0xb4,0x45,0x69,0x8c,0xc5,0x3c,0xc2,0x62,0xae,0x48,0xb1,0xd6,0x11,0x1b,0x7a,0x22,
- 0x94,0x25,0xc4,0xb8,0xa2,0x4f,0x06,0x98,0x57,0x0e,0xef,0x42,0x01,0x67,0x14,0xac,
- 0xf1,0xbc,0x93,0xbf,0x47,0x79,0x79,0xf0,0x96,0xf9,0x85,0x66,0xc1,0xbc,0x27,0x17,
- 0xad,0x58,0x53,0x58,0x4a,0xbe,0x50,0x56,0xa4,0x36,0xae,0xc9,0xdf,0x31,0x99,0x59,
- 0x33,0x6c,0x9c,0xef,0x29,0x0a,0x35,0x36,0x6d,0xb1,0x9e,0xf7,0xbf,0xcb,0xf9,0x4a,
- 0x5b,0xbb,0xab,0x53,0x38,0x5f,0x63,0xbf,0xe7,0x14,0xce,0xdf,0xea,0xbd,0xeb,0x8d,
- 0x47,0x0e,0x0c,0xbd,0x77,0xe9,0xd6,0x9f,0xdc,0x75,0x76,0x06,0x2b,0x58,0x75,0xe8,
- 0xc3,0xec,0x04,0xbf,0x52,0x50,0xda,0x6b,0x14,0x24,0xab,0x4e,0x23,0x1f,0x8e,0x9d,
- 0x64,0x15,0xac,0x4b,0x8b,0x38,0x31,0x1a,0x9a,0x85,0x6b,0xda,0x95,0xaa,0xd7,0xb6,
- 0x63,0xd9,0x67,0x48,0xea,0x21,0x1f,0xbd,0x60,0xd6,0x4c,0x99,0x71,0xa3,0x60,0xd4,
- 0x5d,0xdb,0xce,0x56,0x77,0x4d,0x4b,0xeb,0x4f,0x86,0x15,0xb4,0x87,0x76,0x42,0xa7,
- 0x32,0x57,0x2a,0x68,0x23,0x5a,0xa1,0xb4,0xd7,0x6c,0xa7,0xf5,0x73,0x12,0x99,0xac,
- 0x7b,0x5e,0xfb,0x7e,0x66,0x9d,0xc4,0xfe,0x3e,0xda,0x40,0xee,0xfd,0x06,0xe0,0x7b,
- 0x50,0xda,0x6b,0x5a,0x8c,0xfe,0x27,0x34,0x14,0x52,0xaa,0x1a,0x05,0xc9,0xea,0x0b,
- 0x11,0x58,0x0c,0x96,0x7d,0x6f,0x6d,0x14,0xec,0x93,0xab,0x3d,0x06,0x72,0xcf,0xb3,
- 0xff,0xd1,0x33,0x89,0xf2,0x41,0x18,0xc8,0xfd,0x4b,0x2f,0x18,0xbe,0xf6,0xbf,0x76,
- 0xd5,0xd5,0x5d,0xfb,0x33,0xb7,0xfb,0xdf,0x6c,0xf6,0x1f,0xb8,0xea,0x27,0x26,0x26,
- 0xd4,0x49,0x85,0xff,0x37,0xeb,0x72,0x36,0x2f,0x91,0xff,0xf3,0x36,0xff,0x49,0xed,
- 0xa6,0xda,0xae,0x35,0xb7,0xff,0x97,0x6c,0xde,0x6e,0xd7,0xd6,0x26,0xfc,0xbf,0x6c,
- 0xf3,0x80,0xa6,0xae,0xbd,0xdf,0x54,0x9b,0xff,0x17,0xdb,0xc1,0x27,0xbc,0x9f,0xed,
- 0xfa,0x17,0xde,0x1c,0x98,0xcd,0xc3,0x35,0xd7,0xa7,0x36,0xff,0x1f,0xa8,0xfb,0x97,
- 0x2f,0xf6,0xb7,0x1c,0x89,0xf6,0xff,0x45,0xbf,0xfd,0xf7,0xb6,0xf9,0xf4,0xfa,0xf4,
- 0xfa,0xf4,0xfa,0xf4,0xfa,0xf4,0xfa,0xf4,0xfa,0xff,0xe5,0xd2,0xf6,0x49,0xa2,0xed,
- 0x93,0xea,0x7f,0x76,0x5f,0x3e,0xbd,0x3e,0xbd,0x3e,0xbd,0x3e,0xbd,0x3e,0xbd,0x3e,
- 0xbd,0xfe,0x33,0xae,0x20,0xfb,0x73,0x09,0x50,0xf9,0x6b,0xe3,0xef,0xff,0xf3,0x41,
- 0x50,0xa6,0xfd,0xeb,0xbf,0xaf,0xfd,0x9e,0x23,0x08,0x69,0xce,0x6a,0xbf,0x3b,0x35,
- 0xb5,0xaf,0xff,0x13,0x87,0x7b,0xf6,0xdd,0xd4,0x60,0x00,0x00,
diff --git a/board/esd/pci405/pci405.c b/board/esd/pci405/pci405.c
deleted file mode 100644
index 4be4d7e7d9..0000000000
--- a/board/esd/pci405/pci405.c
+++ /dev/null
@@ -1,440 +0,0 @@
-/*
- * (C) Copyright 2001-2004
- * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/processor.h>
-#include <command.h>
-#include <malloc.h>
-#include <pci.h>
-#include <405gp_pci.h>
-
-#include "pci405.h"
-
-
-/* Prototypes */
-int gunzip(void *, int, unsigned char *, unsigned long *);
-int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);/*cmd_boot.c*/
-unsigned long fpga_done_state(void);
-unsigned long fpga_init_state(void);
-
-#if 0
-#define FPGA_DEBUG
-#endif
-
-/* predefine these here */
-#define FPGA_DONE_STATE (fpga_done_state())
-#define FPGA_INIT_STATE (fpga_init_state())
-
-/* fpga configuration data - generated by bin2cc */
-const unsigned char fpgadata[] =
-{
-#include "fpgadata.c"
-};
-
-/*
- * include common fpga code (for esd boards)
- */
-#include "../common/fpga.c"
-
-#define FPGA_DONE_STATE_V11 (in32(GPIO0_IR) & CFG_FPGA_DONE)
-#define FPGA_DONE_STATE_V12 (in32(GPIO0_IR) & CFG_FPGA_DONE_V12)
-
-#define FPGA_INIT_STATE_V11 (in32(GPIO0_IR) & CFG_FPGA_INIT)
-#define FPGA_INIT_STATE_V12 (in32(GPIO0_IR) & CFG_FPGA_INIT_V12)
-
-
-int board_revision(void)
-{
- unsigned long cntrl0Reg;
- unsigned long value;
-
- /*
- * Get version of PCI405 board from GPIO's
- */
-
- /*
- * Setup GPIO pins (CS2/GPIO11 and CS3/GPIO12 as GPIO)
- */
- cntrl0Reg = mfdcr(cntrl0);
- mtdcr(cntrl0, cntrl0Reg | 0x03000000);
- out32(GPIO0_ODR, in32(GPIO0_ODR) & ~0x00100200);
- out32(GPIO0_TCR, in32(GPIO0_TCR) & ~0x00100200);
- udelay(1000); /* wait some time before reading input */
- value = in32(GPIO0_IR) & 0x00100200; /* get config bits */
-
- /*
- * Restore GPIO settings
- */
- mtdcr(cntrl0, cntrl0Reg);
-
- switch (value) {
- case 0x00100200:
- /* CS2==1 && IRQ5==1 -> version 1.0 and 1.1 */
- return 1;
- case 0x00000200:
- /* CS2==0 && IRQ5==1 -> version 1.2 */
- return 2;
- case 0x00000000:
- /* CS2==0 && IRQ5==0 -> version 1.3 */
- return 3;
-#if 0 /* not yet manufactured ! */
- case 0x00100000:
- /* CS2==1 && IRQ5==0 -> version 1.4 */
- return 4;
-#endif
- default:
- /* should not be reached! */
- return 0;
- }
-}
-
-
-unsigned long fpga_done_state(void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- if (gd->board_type < 2) {
- return FPGA_DONE_STATE_V11;
- } else {
- return FPGA_DONE_STATE_V12;
- }
-}
-
-
-unsigned long fpga_init_state(void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- if (gd->board_type < 2) {
- return FPGA_INIT_STATE_V11;
- } else {
- return FPGA_INIT_STATE_V12;
- }
-}
-
-
-int board_early_init_f (void)
-{
- unsigned long cntrl0Reg;
-
- /*
- * First pull fpga-prg pin low, to disable fpga logic (on version 1.2 board)
- */
- out32(GPIO0_ODR, 0x00000000); /* no open drain pins */
- out32(GPIO0_TCR, CFG_FPGA_PRG); /* setup for output */
- out32(GPIO0_OR, CFG_FPGA_PRG); /* set output pins to high */
- out32(GPIO0_OR, 0); /* pull prg low */
-
- /*
- * IRQ 0-15 405GP internally generated; active high; level sensitive
- * IRQ 16 405GP internally generated; active low; level sensitive
- * IRQ 17-24 RESERVED
- * IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive
- * IRQ 26 (EXT IRQ 1) CAN1; active low; level sensitive
- * IRQ 27 (EXT IRQ 2) CAN2; active low; level sensitive
- * IRQ 28 (EXT IRQ 3) CAN3; active low; level sensitive
- * IRQ 29 (EXT IRQ 4) unused; active low; level sensitive
- * IRQ 30 (EXT IRQ 5) FPGA Timestamp; active low; level sensitive
- * IRQ 31 (EXT IRQ 6) PCI Reset; active low; level sensitive
- */
- mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
- mtdcr(uicer, 0x00000000); /* disable all ints */
- mtdcr(uiccr, 0x00000000); /* set all to be non-critical*/
- mtdcr(uicpr, 0xFFFFFF80); /* set int polarities */
- mtdcr(uictr, 0x10000000); /* set int trigger levels */
- mtdcr(uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority*/
- mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
-
- /*
- * Setup GPIO pins (IRQ4/GPIO21 as GPIO)
- */
- cntrl0Reg = mfdcr(cntrl0);
- mtdcr(cntrl0, cntrl0Reg | 0x00008000);
-
- /*
- * Setup GPIO pins (CS6+CS7 as GPIO)
- */
- mtdcr(cntrl0, cntrl0Reg | 0x00300000);
-
- /*
- * EBC Configuration Register: set ready timeout to 512 ebc-clks -> ca. 25 us
- */
- mtebc (epcr, 0xa8400000); /* ebc always driven */
-
- return 0;
-}
-
-
-/* ------------------------------------------------------------------------- */
-
-int misc_init_f (void)
-{
- return 0; /* dummy implementation */
-}
-
-
-int misc_init_r (void)
-{
- unsigned char *dst;
- ulong len = sizeof(fpgadata);
- int status;
- int index;
- int i;
- unsigned int *ptr;
- unsigned int *magic;
-
- /*
- * On PCI-405 the environment is saved in eeprom!
- * FPGA can be gzip compressed (malloc) and booted this late.
- */
-
- dst = malloc(CFG_FPGA_MAX_SIZE);
- if (gunzip (dst, CFG_FPGA_MAX_SIZE, (uchar *)fpgadata, &len) != 0) {
- printf ("GUNZIP ERROR - must RESET board to recover\n");
- do_reset (NULL, 0, 0, NULL);
- }
-
- status = fpga_boot(dst, len);
- if (status != 0) {
- printf("\nFPGA: Booting failed ");
- switch (status) {
- case ERROR_FPGA_PRG_INIT_LOW:
- printf("(Timeout: INIT not low after asserting PROGRAM*)\n ");
- break;
- case ERROR_FPGA_PRG_INIT_HIGH:
- printf("(Timeout: INIT not high after deasserting PROGRAM*)\n ");
- break;
- case ERROR_FPGA_PRG_DONE:
- printf("(Timeout: DONE not high after programming FPGA)\n ");
- break;
- }
-
- /* display infos on fpgaimage */
- index = 15;
- for (i=0; i<4; i++) {
- len = dst[index];
- printf("FPGA: %s\n", &(dst[index+1]));
- index += len+3;
- }
- putc ('\n');
- /* delayed reboot */
- for (i=20; i>0; i--) {
- printf("Rebooting in %2d seconds \r",i);
- for (index=0;index<1000;index++)
- udelay(1000);
- }
- putc ('\n');
- do_reset(NULL, 0, 0, NULL);
- }
-
- puts("FPGA: ");
-
- /* display infos on fpgaimage */
- index = 15;
- for (i=0; i<4; i++) {
- len = dst[index];
- printf("%s ", &(dst[index+1]));
- index += len+3;
- }
- putc ('\n');
-
- /*
- * Reset FPGA via FPGA_DATA pin
- */
- SET_FPGA(FPGA_PRG | FPGA_CLK);
- udelay(1000); /* wait 1ms */
- SET_FPGA(FPGA_PRG | FPGA_CLK | FPGA_DATA);
- udelay(1000); /* wait 1ms */
-
- /*
- * Check if magic for pci reconfig is written
- */
- magic = (unsigned int *)0x00000004;
- if (*magic == PCI_RECONFIG_MAGIC) {
- /*
- * Rewrite pci config regs (only after soft-reset with magic set)
- */
- ptr = (unsigned int *)PCI_REGS_ADDR;
- if (crc32(0, (uchar *)PCI_REGS_ADDR+4, PCI_REGS_LEN-4) == *ptr) {
- puts("Restoring PCI Configurations Regs!\n");
- ptr = (unsigned int *)PCI_REGS_ADDR + 1;
- for (i=0; i<0x40; i+=4) {
- pci_write_config_dword(PCIDEVID_405GP, i, *ptr++);
- }
- }
- mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
-
- *magic = 0; /* clear pci reconfig magic again */
- }
-
-#if 1 /* test-only */
- /*
- * Decrease PLB latency timeout and reduce priority of the PCI bridge master
- */
-#define PCI0_BRDGOPT1 0x4a
- pci_write_config_word(PCIDEVID_405GP, PCI0_BRDGOPT1, 0x3f20);
-/* pci_write_config_word(PCIDEVID_405GP, PCI0_BRDGOPT1, 0x3f60); */
-
-#define plb0_acr 0x87
- /*
- * Enable fairness and high bus utilization
- */
- mtdcr(plb0_acr, 0x98000000);
-
-#if 0 /* test-only */
- printf("CCR0=%08x\n", mfspr(ccr0)); /* test-only */
-/* mtspr(ccr0, (mfspr(ccr0) & 0xff8fffff) | 0x00100000); */
- mtspr(ccr0, (mfspr(ccr0) & 0xff8fffff) | 0x00000000);
-#endif
-/* printf("CCR0=%08x\n", mfspr(ccr0)); */ /* test-only */
-#endif
-
- free(dst);
- return (0);
-}
-
-
-/*
- * Check Board Identity:
- */
-
-int checkboard (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- char str[64];
- int i = getenv_r ("serial#", str, sizeof(str));
-
- puts ("Board: ");
-
- if (i == -1) {
- puts ("### No HW ID - assuming PCI405");
- } else {
- puts (str);
- }
-
- gd->board_type = board_revision();
- printf(" (Rev 1.%ld", gd->board_type);
-
- if (gd->board_type >= 2) {
- unsigned long cntrl0Reg;
- unsigned long value;
-
- /*
- * Setup GPIO pins (Trace/GPIO1 to GPIO)
- */
- cntrl0Reg = mfdcr(cntrl0);
- mtdcr(cntrl0, cntrl0Reg & ~0x08000000);
- out32(GPIO0_ODR, in32(GPIO0_ODR) & ~0x40000000);
- out32(GPIO0_TCR, in32(GPIO0_TCR) & ~0x40000000);
- udelay(1000); /* wait some time before reading input */
- value = in32(GPIO0_IR) & 0x40000000; /* get config bits */
- if (value) {
- puts(", 33 MHz PCI");
- } else {
- puts(", 66 Mhz PCI");
- }
- }
-
- puts(")\n");
-
- return 0;
-}
-
-/* ------------------------------------------------------------------------- */
-
-long int initdram (int board_type)
-{
- unsigned long val;
-
- mtdcr(memcfga, mem_mb0cf);
- val = mfdcr(memcfgd);
-
-#if 0
- printf("\nmb0cf=%x\n", val); /* test-only */
- printf("strap=%x\n", mfdcr(strap)); /* test-only */
-#endif
-
-#if 0 /* test-only: all PCI405 version must report 16mb */
- return (4*1024*1024 << ((val & 0x000e0000) >> 17));
-#else
- return (16*1024*1024);
-#endif
-}
-
-/* ------------------------------------------------------------------------- */
-
-int testdram (void)
-{
- /* TODO: XXX XXX XXX */
- printf ("test: 16 MB - ok\n");
-
- return (0);
-}
-
-/* ------------------------------------------------------------------------- */
-int wpeeprom(int wp)
-{
- int wp_state = wp;
- volatile unsigned char *uart1_mcr = (volatile unsigned char *)0xef600404;
-
- if (wp == 1) {
- *uart1_mcr &= ~0x02;
- } else if (wp == 0) {
- *uart1_mcr |= 0x02;
- } else {
- if (*uart1_mcr & 0x02) {
- wp_state = 0;
- } else {
- wp_state = 1;
- }
- }
- return wp_state;
-}
-
-int do_wpeeprom(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- int wp = -1;
- if (argc >= 2) {
- if (argv[1][0] == '1') {
- wp = 1;
- } else if (argv[1][0] == '0') {
- wp = 0;
- }
- }
-
- wp = wpeeprom(wp);
- printf("EEPROM write protection %s\n", wp ? "ENABLED" : "DISABLED");
- return 0;
-}
-
-U_BOOT_CMD(
- wpeeprom, 2, 1, do_wpeeprom,
- "wpeeprom - Check/Enable/Disable I2C EEPROM write protection\n",
- "wpeeprom\n"
- " - check I2C EEPROM write protection state\n"
- "wpeeprom 1\n"
- " - enable I2C EEPROM write protection\n"
- "wpeeprom 0\n"
- " - disable I2C EEPROM write protection\n"
- );
diff --git a/board/esd/pci405/pci405.h b/board/esd/pci405/pci405.h
deleted file mode 100644
index c11a20f6ee..0000000000
--- a/board/esd/pci405/pci405.h
+++ /dev/null
@@ -1,32 +0,0 @@
-/*
- * (C) Copyright 2003
- * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef _PCI405_H_
-#define _PCI405_H_
-
-#define PCI_REGS_LEN 0x100
-#define PCI_REGS_ADDR ((unsigned long)0x01000000 - PCI_REGS_LEN)
-
-#define PCI_RECONFIG_MAGIC 0x07081967
-
-#endif /* _PCI405_H_ */
diff --git a/board/esd/pci405/u-boot.lds b/board/esd/pci405/u-boot.lds
deleted file mode 100644
index f7a20d1da2..0000000000
--- a/board/esd/pci405/u-boot.lds
+++ /dev/null
@@ -1,150 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- .resetvec 0xFFFFFFFC :
- {
- *(.resetvec)
- } = 0xffff
-
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/ppc4xx/start.o (.text)
- cpu/ppc4xx/traps.o (.text)
- cpu/ppc4xx/interrupts.o (.text)
- cpu/ppc4xx/serial.o (.text)
- cpu/ppc4xx/cpu_init.o (.text)
- cpu/ppc4xx/speed.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/extable.o (.text)
- lib_generic/zlib.o (.text)
-
-/* . = env_offset;*/
-/* common/environment.o(.text)*/
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/esd/pci405/writeibm.S b/board/esd/pci405/writeibm.S
deleted file mode 100644
index 9f5c35b587..0000000000
--- a/board/esd/pci405/writeibm.S
+++ /dev/null
@@ -1,223 +0,0 @@
-/*------------------------------------------------------------------------------+ */
-/* */
-/* This source code has been made available to you by IBM on an AS-IS */
-/* basis. Anyone receiving this source is licensed under IBM */
-/* copyrights to use it in any way he or she deems fit, including */
-/* copying it, modifying it, compiling it, and redistributing it either */
-/* with or without modifications. No license under IBM patents or */
-/* patent applications is to be implied by the copyright license. */
-/* */
-/* Any user of this software should understand that IBM cannot provide */
-/* technical support for this software and will not be responsible for */
-/* any consequences resulting from the use of this software. */
-/* */
-/* Any person who transfers this source code or any derivative work */
-/* must include the IBM copyright notice, this paragraph, and the */
-/* preceding two paragraphs in the transferred software. */
-/* */
-/* COPYRIGHT I B M CORPORATION 1995 */
-/* LICENSED MATERIAL - PROGRAM PROPERTY OF I B M */
-/*------------------------------------------------------------------------------- */
-
-/*----------------------------------------------------------------------------- */
-/* Function: ext_bus_cntlr_init */
-/* Description: Initializes the External Bus Controller for the external */
-/* peripherals. IMPORTANT: For pass1 this code must run from */
-/* cache since you can not reliably change a peripheral banks */
-/* timing register (pbxap) while running code from that bank. */
-/* For ex., since we are running from ROM on bank 0, we can NOT */
-/* execute the code that modifies bank 0 timings from ROM, so */
-/* we run it from cache. */
-/* Bank 0 - Flash and SRAM */
-/* Bank 1 - NVRAM/RTC */
-/* Bank 2 - Keyboard/Mouse controller */
-/* Bank 3 - IR controller */
-/* Bank 4 - not used */
-/* Bank 5 - not used */
-/* Bank 6 - not used */
-/* Bank 7 - FPGA registers */
-/*----------------------------------------------------------------------------- */
-#include <ppc4xx.h>
-
-#include <ppc_asm.tmpl>
-#include <ppc_defs.h>
-
-#include <asm/cache.h>
-#include <asm/mmu.h>
-
-
- .globl write_without_sync
-write_without_sync:
- /*
- * Write one values to host via pci busmastering
- * ptr = 0xc0000000 -> 0x01000000 (PCI)
- * *ptr = 0x01234567;
- */
- addi r31,0,0
- lis r31,0xc000
-
-start1:
- lis r0,0x0123
- ori r0,r0,0x4567
- stw r0,0(r31)
-
- /*
- * Read one value back
- * ptr = (volatile unsigned long *)addr;
- * val = *ptr;
- */
-
- lwz r0,0(r31)
-
- /*
- * One pci config write
- * ibmPciConfigWrite(0x2e, 2, 0x1234);
- */
- /* subsystem id */
-
- li r4,0x002C
- oris r4,r4,0x8000
- lis r3,0xEEC0
- stwbrx r4,0,r3
-
- li r5,0x1234
- ori r3,r3,0x4
- stwbrx r5,0,r3
-
- b start1
-
- blr /* never reached !!!! */
-
- .globl write_with_sync
-write_with_sync:
- /*
- * Write one values to host via pci busmastering
- * ptr = 0xc0000000 -> 0x01000000 (PCI)
- * *ptr = 0x01234567;
- */
- addi r31,0,0
- lis r31,0xc000
-
-start2:
- lis r0,0x0123
- ori r0,r0,0x4567
- stw r0,0(r31)
-
- /*
- * Read one value back
- * ptr = (volatile unsigned long *)addr;
- * val = *ptr;
- */
-
- lwz r0,0(r31)
-
- /*
- * One pci config write
- * ibmPciConfigWrite(0x2e, 2, 0x1234);
- */
- /* subsystem id */
-
- li r4,0x002C
- oris r4,r4,0x8000
- lis r3,0xEEC0
- stwbrx r4,0,r3
- sync
-
- li r5,0x1234
- ori r3,r3,0x4
- stwbrx r5,0,r3
- sync
-
- b start2
-
- blr /* never reached !!!! */
-
- .globl write_with_less_sync
-write_with_less_sync:
- /*
- * Write one values to host via pci busmastering
- * ptr = 0xc0000000 -> 0x01000000 (PCI)
- * *ptr = 0x01234567;
- */
- addi r31,0,0
- lis r31,0xc000
-
-start2b:
- lis r0,0x0123
- ori r0,r0,0x4567
- stw r0,0(r31)
-
- /*
- * Read one value back
- * ptr = (volatile unsigned long *)addr;
- * val = *ptr;
- */
-
- lwz r0,0(r31)
-
- /*
- * One pci config write
- * ibmPciConfigWrite(0x2e, 2, 0x1234);
- */
- /* subsystem id */
-
- li r4,0x002C
- oris r4,r4,0x8000
- lis r3,0xEEC0
- stwbrx r4,0,r3
- sync
-
- li r5,0x1234
- ori r3,r3,0x4
- stwbrx r5,0,r3
-/* sync */
-
- b start2b
-
- blr /* never reached !!!! */
-
- .globl write_with_more_sync
-write_with_more_sync:
- /*
- * Write one values to host via pci busmastering
- * ptr = 0xc0000000 -> 0x01000000 (PCI)
- * *ptr = 0x01234567;
- */
- addi r31,0,0
- lis r31,0xc000
-
-start3:
- lis r0,0x0123
- ori r0,r0,0x4567
- stw r0,0(r31)
- sync
-
- /*
- * Read one value back
- * ptr = (volatile unsigned long *)addr;
- * val = *ptr;
- */
-
- lwz r0,0(r31)
- sync
-
- /*
- * One pci config write
- * ibmPciConfigWrite(0x2e, 2, 0x1234);
- */
- /* subsystem id (PCIC0_SBSYSVID)*/
-
- li r4,0x002C
- oris r4,r4,0x8000
- lis r3,0xEEC0
- stwbrx r4,0,r3
- sync
-
- li r5,0x1234
- ori r3,r3,0x4
- stwbrx r5,0,r3
- sync
-
- b start3
-
- blr /* never reached !!!! */
diff --git a/board/esd/pf5200/Makefile b/board/esd/pf5200/Makefile
deleted file mode 100644
index 603bbe283c..0000000000
--- a/board/esd/pf5200/Makefile
+++ /dev/null
@@ -1,53 +0,0 @@
-
-#
-# (C) Copyright 2003
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-# Objects for Xilinx JTAG programming (CPLD)
-# CPLD = ../common/xilinx_jtag/lenval.o \
-# ../common/xilinx_jtag/micro.o \
-# ../common/xilinx_jtag/ports.o
-
-# OBJS = $(BOARD).o flash.o $(CPLD)
-OBJS = $(BOARD).o flash.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/esd/pf5200/config.mk b/board/esd/pf5200/config.mk
deleted file mode 100644
index 07b5de1881..0000000000
--- a/board/esd/pf5200/config.mk
+++ /dev/null
@@ -1,44 +0,0 @@
-#
-# (C) Copyright 2003
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# IceCube board:
-#
-# Valid values for TEXT_BASE are:
-#
-# 0xFFF00000 boot high (standard configuration)
-# 0xFF000000 boot low for 16 MiB boards
-# 0xFF800000 boot low for 8 MiB boards
-# 0x00100000 boot from RAM (for testing only)
-#
-
-sinclude $(TOPDIR)/board/$(BOARDDIR)/config.tmp
-
-ifndef TEXT_BASE
-## Standard: boot high
-TEXT_BASE = 0xFFF00000
-## For testing: boot from RAM
-# TEXT_BASE = 0x00100000
-endif
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
diff --git a/board/esd/pf5200/flash.c b/board/esd/pf5200/flash.c
deleted file mode 100644
index 53afbc0b92..0000000000
--- a/board/esd/pf5200/flash.c
+++ /dev/null
@@ -1,461 +0,0 @@
-/*
- * (C) Copyright 2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-typedef unsigned short FLASH_PORT_WIDTH;
-typedef volatile unsigned short FLASH_PORT_WIDTHV;
-
-#define FLASH_ID_MASK 0x00FF
-
-#define FPW FLASH_PORT_WIDTH
-#define FPWV FLASH_PORT_WIDTHV
-
-#define FLASH_CYCLE1 0x0555
-#define FLASH_CYCLE2 0x0aaa
-#define FLASH_ID1 0x00
-#define FLASH_ID2 0x01
-#define FLASH_ID3 0x0E
-#define FLASH_ID4 0x0F
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size(FPWV * addr, flash_info_t * info);
-static void flash_reset(flash_info_t * info);
-static int write_word_amd(flash_info_t * info, FPWV * dest, FPW data);
-static flash_info_t *flash_get_info(ulong base);
-
-/*-----------------------------------------------------------------------
- * flash_init()
- *
- * sets up flash_info and returns size of FLASH (bytes)
- */
-unsigned long flash_init(void)
-{
- unsigned long size = 0;
- int i = 0;
- extern void flash_preinit(void);
- extern void flash_afterinit(uint, ulong, ulong);
-
- ulong flashbase = CFG_FLASH_BASE;
-
- flash_preinit();
-
- /* There is only ONE FLASH device */
- memset(&flash_info[i], 0, sizeof(flash_info_t));
- flash_info[i].size = flash_get_size((FPW *) flashbase, &flash_info[i]);
- size += flash_info[i].size;
-
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
- /* monitor protection ON by default */
- flash_protect(FLAG_PROTECT_SET, CFG_MONITOR_BASE,
- CFG_MONITOR_BASE + monitor_flash_len - 1,
- flash_get_info(CFG_MONITOR_BASE));
-#endif
-
-#ifdef CFG_ENV_IS_IN_FLASH
- /* ENV protection ON by default */
- flash_protect(FLAG_PROTECT_SET, CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1,
- flash_get_info(CFG_ENV_ADDR));
-#endif
-
- flash_afterinit(i, flash_info[i].start[0], flash_info[i].size);
- return size ? size : 1;
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_reset(flash_info_t * info) {
- FPWV *base = (FPWV *) (info->start[0]);
-
- /* Put FLASH back in read mode */
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
- *base = (FPW) 0x00FF00FF; /* Intel Read Mode */
- } else if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD) {
- *base = (FPW) 0x00F000F0; /* AMD Read Mode */
- }
-}
-
-/*-----------------------------------------------------------------------
- */
-
-static flash_info_t *flash_get_info(ulong base) {
- int i;
- flash_info_t *info;
-
- for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
- info = &flash_info[i];
- if ((info->size) && (info->start[0] <= base)
- && (base <= info->start[0] + info->size - 1)) {
- break;
- }
- }
- return (i == CFG_MAX_FLASH_BANKS ? 0 : info);
-}
-
-/*-----------------------------------------------------------------------
- */
-
-void flash_print_info(flash_info_t * info) {
- int i;
- char *fmt;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD:
- printf("AMD ");
- break;
- default:
- printf("Unknown Vendor ");
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AMLV256U:
- fmt = "29LV256M (256 Mbit)\n";
- break;
- default:
- fmt = "Unknown Chip Type\n";
- break;
- }
-
- printf(fmt);
- printf(" Size: %ld MB in %d Sectors\n", info->size >> 20,
- info->sector_count);
- printf(" Sector Start Addresses:");
-
- for (i = 0; i < info->sector_count; ++i) {
- ulong size;
- int erased;
- ulong *flash = (unsigned long *)info->start[i];
-
- if ((i % 5) == 0) {
- printf("\n ");
- }
-
- /*
- * Check if whole sector is erased
- */
- size =
- (i !=
- (info->sector_count - 1)) ? (info->start[i + 1] -
- info->start[i]) >> 2 : (info->
- start
- [0] +
- info->
- size -
- info->
- start
- [i])
- >> 2;
-
- for (flash = (unsigned long *)info->start[i], erased = 1;
- (flash != (unsigned long *)info->start[i] + size)
- && erased; flash++) {
- erased = *flash == ~0x0UL;
- }
- printf(" %08lX %s %s", info->start[i], erased ? "E" : " ",
- info->protect[i] ? "(RO)" : " ");
- }
-
- printf("\n");
-}
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-
-ulong flash_get_size(FPWV * addr, flash_info_t * info) {
- int i;
-
- /* Write auto select command: read Manufacturer ID */
- /* Write auto select command sequence and test FLASH answer */
- addr[FLASH_CYCLE1] = (FPW) 0x00AA00AA; /* for AMD, Intel ignores this */
- addr[FLASH_CYCLE2] = (FPW) 0x00550055; /* for AMD, Intel ignores this */
- addr[FLASH_CYCLE1] = (FPW) 0x00900090; /* selects Intel or AMD */
-
- /* The manufacturer codes are only 1 byte, so just use 1 byte. */
- /* This works for any bus width and any FLASH device width. */
- udelay(100);
- switch (addr[FLASH_ID1] & 0x00ff) {
- case (uchar) AMD_MANUFACT:
- info->flash_id = FLASH_MAN_AMD;
- break;
- default:
- printf("unknown vendor=%x ", addr[FLASH_ID1] & 0xff);
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- break;
- }
-
- /* Check 16 bits or 32 bits of ID so work on 32 or 16 bit bus. */
- if (info->flash_id != FLASH_UNKNOWN) {
- switch ((FPW) addr[FLASH_ID2]) {
- case (FPW) AMD_ID_MIRROR:
- /* MIRROR BIT FLASH, read more ID bytes */
- if ((FPW) addr[FLASH_ID3] == (FPW) AMD_ID_LV256U_2
- && (FPW) addr[FLASH_ID4] == (FPW) AMD_ID_LV256U_3) {
- /* attention: only the first 16 MB will be used in u-boot */
- info->flash_id += FLASH_AMLV256U;
- info->sector_count = 512;
- info->size = 0x02000000;
- for (i = 0; i < info->sector_count; i++) {
- info->start[i] =
- (ulong) addr + 0x10000 * i;
- }
- break;
- }
- /* fall thru to here ! */
- default:
- printf("unknown AMD device=%x %x %x",
- (FPW) addr[FLASH_ID2], (FPW) addr[FLASH_ID3],
- (FPW) addr[FLASH_ID4]);
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0x800000;
- break;
- }
-
- /* Put FLASH back in read mode */
- flash_reset(info);
- }
- return (info->size);
-}
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase(flash_info_t * info, int s_first, int s_last) {
- FPWV *addr;
- int flag, prot, sect;
- int intel = (info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL;
- ulong start, now, last;
- int rcode = 0;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf("- missing\n");
- } else {
- printf("- no sectors to erase\n");
- }
- return 1;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AMLV256U:
- break;
- case FLASH_UNKNOWN:
- default:
- printf("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- return 1;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf("\n");
- }
-
- last = get_timer(0);
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect <= s_last && rcode == 0; sect++) {
- if (info->protect[sect] != 0) { /* protected, skip it */
- continue;
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr = (FPWV *) (info->start[sect]);
- if (intel) {
- *addr = (FPW) 0x00500050; /* clear status register */
- *addr = (FPW) 0x00200020; /* erase setup */
- *addr = (FPW) 0x00D000D0; /* erase confirm */
- } else {
- /* must be AMD style if not Intel */
- FPWV *base; /* first address in bank */
-
- base = (FPWV *) (info->start[0]);
- base[FLASH_CYCLE1] = (FPW) 0x00AA00AA; /* unlock */
- base[FLASH_CYCLE2] = (FPW) 0x00550055; /* unlock */
- base[FLASH_CYCLE1] = (FPW) 0x00800080; /* erase mode */
- base[FLASH_CYCLE1] = (FPW) 0x00AA00AA; /* unlock */
- base[FLASH_CYCLE2] = (FPW) 0x00550055; /* unlock */
- *addr = (FPW) 0x00300030; /* erase sector */
- }
-
- /* re-enable interrupts if necessary */
- if (flag) {
- enable_interrupts();
- }
- start = get_timer(0);
-
- /* wait at least 50us for AMD, 80us for Intel. */
- /* Let's wait 1 ms. */
- udelay(1000);
-
- while ((*addr & (FPW) 0x00800080) != (FPW) 0x00800080) {
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf("Timeout\n");
- if (intel) {
- /* suspend erase */
- *addr = (FPW) 0x00B000B0;
- }
- flash_reset(info); /* reset to read mode */
- rcode = 1; /* failed */
- break;
- }
- /* show that we're waiting */
- if ((get_timer(last)) > CFG_HZ) {
- /* every second */
- putc('.');
- last = get_timer(0);
- }
- }
- /* show that we're waiting */
- if ((get_timer(last)) > CFG_HZ) {
- /* every second */
- putc('.');
- last = get_timer(0);
- }
- flash_reset(info); /* reset to read mode */
- }
- printf(" done\n");
- return (rcode);
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-int write_buff(flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- FPW data = 0; /* 16 or 32 bit word, matches flash bus width on MPC8XX */
- int bytes; /* number of bytes to program in current word */
- int left; /* number of bytes left to program */
- int i, res;
-
- for (left = cnt, res = 0;
- left > 0 && res == 0;
- addr += sizeof(data), left -= sizeof(data) - bytes) {
-
- bytes = addr & (sizeof(data) - 1);
- addr &= ~(sizeof(data) - 1);
-
- /* combine source and destination data so can program
- * an entire word of 16 or 32 bits
- */
- for (i = 0; i < sizeof(data); i++) {
- data <<= 8;
- if (i < bytes || i - bytes >= left)
- data += *((uchar *) addr + i);
- else
- data += *src++;
- }
-
- /* write one word to the flash */
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD:
- res = write_word_amd(info, (FPWV *) addr, data);
- break;
- default:
- /* unknown flash type, error! */
- printf("missing or unknown FLASH type\n");
- res = 1; /* not really a timeout, but gives error */
- break;
- }
- }
- return (res);
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash for AMD FLASH
- * A word is 16 or 32 bits, whichever the bus width of the flash bank
- * (not an individual chip) is.
- *
- * returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word_amd(flash_info_t * info, FPWV * dest, FPW data) {
- ulong start;
- int flag;
- int res = 0; /* result, assume success */
- FPWV *base; /* first address in flash bank */
-
- /* Check if Flash is (sufficiently) erased */
- if ((*dest & data) != data) {
- return (2);
- }
-
- base = (FPWV *) (info->start[0]);
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- base[FLASH_CYCLE1] = (FPW) 0x00AA00AA; /* unlock */
- base[FLASH_CYCLE2] = (FPW) 0x00550055; /* unlock */
- base[FLASH_CYCLE1] = (FPW) 0x00A000A0; /* selects program mode */
-
- *dest = data; /* start programming the data */
-
- /* re-enable interrupts if necessary */
- if (flag) {
- enable_interrupts();
- }
- start = get_timer(0);
-
- /* data polling for D7 */
- while (res == 0
- && (*dest & (FPW) 0x00800080) != (data & (FPW) 0x00800080)) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- *dest = (FPW) 0x00F000F0; /* reset bank */
- res = 1;
- }
- }
- return (res);
-}
diff --git a/board/esd/pf5200/mt46v16m16-75.h b/board/esd/pf5200/mt46v16m16-75.h
deleted file mode 100644
index 22d0a55444..0000000000
--- a/board/esd/pf5200/mt46v16m16-75.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/*
- * (C) Copyright 2004
- * Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#define SDRAM_DDR 1 /* is DDR */
-
-#if defined(CONFIG_MPC5200)
-/* Settings for XLB = 132 MHz */
-#define SDRAM_MODE 0x018D0000
-#define SDRAM_EMODE 0x40090000
-#define SDRAM_CONTROL 0x705f0f00
-#define SDRAM_CONFIG1 0x73722930
-#define SDRAM_CONFIG2 0x47770000
-#define SDRAM_TAPDELAY 0x10000000
-
-#else
-#error CONFIG_MPC5200 not defined
-#endif
diff --git a/board/esd/pf5200/pf5200.c b/board/esd/pf5200/pf5200.c
deleted file mode 100644
index 2b47012cfa..0000000000
--- a/board/esd/pf5200/pf5200.c
+++ /dev/null
@@ -1,370 +0,0 @@
-/*
- * (C) Copyright 2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2004
- * Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * pf5200.c - main board support/init for the esd pf5200.
- */
-
-#include <common.h>
-#include <mpc5xxx.h>
-#include <pci.h>
-#include <command.h>
-
-#include "mt46v16m16-75.h"
-
-void init_power_switch(void);
-
-static void sdram_start(int hi_addr)
-{
- long hi_addr_bit = hi_addr ? 0x01000000 : 0;
-
- /* unlock mode register */
- *(vu_long *) MPC5XXX_SDRAM_CTRL =
- SDRAM_CONTROL | 0x80000000 | hi_addr_bit;
- __asm__ volatile ("sync");
-
- /* precharge all banks */
- *(vu_long *) MPC5XXX_SDRAM_CTRL =
- SDRAM_CONTROL | 0x80000002 | hi_addr_bit;
- __asm__ volatile ("sync");
-
- /* set mode register: extended mode */
- *(vu_long *) MPC5XXX_SDRAM_MODE = SDRAM_EMODE;
- __asm__ volatile ("sync");
-
- /* set mode register: reset DLL */
- *(vu_long *) MPC5XXX_SDRAM_MODE = SDRAM_MODE | 0x04000000;
- __asm__ volatile ("sync");
-
- /* precharge all banks */
- *(vu_long *) MPC5XXX_SDRAM_CTRL =
- SDRAM_CONTROL | 0x80000002 | hi_addr_bit;
- __asm__ volatile ("sync");
-
- /* auto refresh */
- *(vu_long *) MPC5XXX_SDRAM_CTRL =
- SDRAM_CONTROL | 0x80000004 | hi_addr_bit;
- __asm__ volatile ("sync");
-
- /* set mode register */
- *(vu_long *) MPC5XXX_SDRAM_MODE = SDRAM_MODE;
- __asm__ volatile ("sync");
-
- /* normal operation */
- *(vu_long *) MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | hi_addr_bit;
- __asm__ volatile ("sync");
-}
-
-/*
- * ATTENTION: Although partially referenced initdram does NOT make real use
- * use of CFG_SDRAM_BASE. The code does not work if CFG_SDRAM_BASE
- * is something else than 0x00000000.
- */
-
-long int initdram(int board_type)
-{
- ulong dramsize = 0;
- ulong test1, test2;
-
- /* setup SDRAM chip selects */
- *(vu_long *) MPC5XXX_SDRAM_CS0CFG = 0x0000001e; /* 2G at 0x0 */
- *(vu_long *) MPC5XXX_SDRAM_CS1CFG = 0x80000000; /* disabled */
- __asm__ volatile ("sync");
-
- /* setup config registers */
- *(vu_long *) MPC5XXX_SDRAM_CONFIG1 = SDRAM_CONFIG1;
- *(vu_long *) MPC5XXX_SDRAM_CONFIG2 = SDRAM_CONFIG2;
- __asm__ volatile ("sync");
-
- /* set tap delay */
- *(vu_long *) MPC5XXX_CDM_PORCFG = SDRAM_TAPDELAY;
- __asm__ volatile ("sync");
-
- /* find RAM size using SDRAM CS0 only */
- sdram_start(0);
- test1 = get_ram_size((long *) CFG_SDRAM_BASE, 0x80000000);
- sdram_start(1);
- test2 = get_ram_size((long *) CFG_SDRAM_BASE, 0x80000000);
-
- if (test1 > test2) {
- sdram_start(0);
- dramsize = test1;
- } else {
- dramsize = test2;
- }
-
- /* memory smaller than 1MB is impossible */
- if (dramsize < (1 << 20)) {
- dramsize = 0;
- }
-
- /* set SDRAM CS0 size according to the amount of RAM found */
- if (dramsize > 0) {
- *(vu_long *) MPC5XXX_SDRAM_CS0CFG =
- 0x13 + __builtin_ffs(dramsize >> 20) - 1;
- /* let SDRAM CS1 start right after CS0 */
- *(vu_long *) MPC5XXX_SDRAM_CS1CFG = dramsize + 0x0000001e; /* 2G */
- } else {
-#if 0
- *(vu_long *) MPC5XXX_SDRAM_CS0CFG = 0; /* disabled */
- /* let SDRAM CS1 start right after CS0 */
- *(vu_long *) MPC5XXX_SDRAM_CS1CFG = dramsize + 0x0000001e; /* 2G */
-#else
- *(vu_long *) MPC5XXX_SDRAM_CS0CFG =
- 0x13 + __builtin_ffs(0x08000000 >> 20) - 1;
- /* let SDRAM CS1 start right after CS0 */
- *(vu_long *) MPC5XXX_SDRAM_CS1CFG = 0x08000000 + 0x0000001e; /* 2G */
-#endif
- }
-
-#if 0
- /* find RAM size using SDRAM CS1 only */
- sdram_start(0);
- get_ram_size((ulong *) (CFG_SDRAM_BASE + dramsize), 0x80000000);
- sdram_start(1);
- get_ram_size((ulong *) (CFG_SDRAM_BASE + dramsize), 0x80000000);
- sdram_start(0);
-#endif
- /* set SDRAM CS1 size according to the amount of RAM found */
-
- *(vu_long *) MPC5XXX_SDRAM_CS1CFG = dramsize; /* disabled */
-
- init_power_switch();
- return (dramsize);
-}
-
-int checkboard(void)
-{
- puts("Board: esd ParaFinder (pf5200)\n");
- return 0;
-}
-
-void flash_preinit(void)
-{
- /*
- * Now, when we are in RAM, enable flash write
- * access for detection process.
- * Note that CS_BOOT cannot be cleared when
- * executing in flash.
- */
- *(vu_long *) MPC5XXX_BOOTCS_CFG &= ~0x1; /* clear RO */
-}
-
-void flash_afterinit(ulong size)
-{
- if (size == 0x02000000) {
- /* adjust mapping */
- *(vu_long *) MPC5XXX_BOOTCS_START =
- *(vu_long *) MPC5XXX_CS0_START =
- START_REG(CFG_BOOTCS_START | size);
- *(vu_long *) MPC5XXX_BOOTCS_STOP =
- *(vu_long *) MPC5XXX_CS0_STOP =
- STOP_REG(CFG_BOOTCS_START | size, size);
- }
-}
-
-#ifdef CONFIG_PCI
-static struct pci_controller hose;
-
-extern void pci_mpc5xxx_init(struct pci_controller *);
-
-void pci_init_board(void
- ) {
- pci_mpc5xxx_init(&hose);
-}
-#endif
-
-#if defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET)
-
-#define GPIO_PSC1_4 0x01000000UL
-
-void init_ide_reset(void)
-{
- debug("init_ide_reset\n");
-
- /* Configure PSC1_4 as GPIO output for ATA reset */
- *(vu_long *) MPC5XXX_WU_GPIO_ENABLE |= GPIO_PSC1_4;
- *(vu_long *) MPC5XXX_WU_GPIO_DIR |= GPIO_PSC1_4;
-}
-
-void ide_set_reset(int idereset)
-{
- debug("ide_reset(%d)\n", idereset);
-
- if (idereset) {
- *(vu_long *) MPC5XXX_WU_GPIO_DATA &= ~GPIO_PSC1_4;
- } else {
- *(vu_long *) MPC5XXX_WU_GPIO_DATA |= GPIO_PSC1_4;
- }
-}
-#endif /* defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET) */
-
-#define MPC5XXX_SIMPLEIO_GPIO_ENABLE (MPC5XXX_GPIO + 0x0004)
-#define MPC5XXX_SIMPLEIO_GPIO_DIR (MPC5XXX_GPIO + 0x000C)
-#define MPC5XXX_SIMPLEIO_GPIO_DATA_OUTPUT (MPC5XXX_GPIO + 0x0010)
-#define MPC5XXX_SIMPLEIO_GPIO_DATA_INPUT (MPC5XXX_GPIO + 0x0014)
-
-#define MPC5XXX_INTERRUPT_GPIO_ENABLE (MPC5XXX_GPIO + 0x0020)
-#define MPC5XXX_INTERRUPT_GPIO_DIR (MPC5XXX_GPIO + 0x0028)
-#define MPC5XXX_INTERRUPT_GPIO_DATA_OUTPUT (MPC5XXX_GPIO + 0x002C)
-#define MPC5XXX_INTERRUPT_GPIO_STATUS (MPC5XXX_GPIO + 0x003C)
-
-#define GPIO_WU6 0x40000000UL
-#define GPIO_USB0 0x00010000UL
-#define GPIO_USB9 0x08000000UL
-#define GPIO_USB9S 0x00080000UL
-
-void init_power_switch(void)
-{
- debug("init_power_switch\n");
-
- /* Configure GPIO_WU6 as GPIO output for ATA reset */
- *(vu_long *) MPC5XXX_WU_GPIO_DATA |= GPIO_WU6;
- *(vu_long *) MPC5XXX_WU_GPIO_ENABLE |= GPIO_WU6;
- *(vu_long *) MPC5XXX_WU_GPIO_DIR |= GPIO_WU6;
- __asm__ volatile ("sync");
-
- *(vu_long *) MPC5XXX_SIMPLEIO_GPIO_DATA_OUTPUT &= ~GPIO_USB0;
- *(vu_long *) MPC5XXX_SIMPLEIO_GPIO_ENABLE |= GPIO_USB0;
- *(vu_long *) MPC5XXX_SIMPLEIO_GPIO_DIR |= GPIO_USB0;
- __asm__ volatile ("sync");
-
- *(vu_long *) MPC5XXX_INTERRUPT_GPIO_DATA_OUTPUT &= ~GPIO_USB9;
- *(vu_long *) MPC5XXX_INTERRUPT_GPIO_ENABLE &= ~GPIO_USB9;
- __asm__ volatile ("sync");
-
- if ((*(vu_long *) MPC5XXX_INTERRUPT_GPIO_STATUS & GPIO_USB9S) == 0) {
- *(vu_long *) MPC5XXX_SIMPLEIO_GPIO_DATA_OUTPUT |= GPIO_USB0;
- __asm__ volatile ("sync");
- }
- *(vu_char *) CFG_CS1_START = 0x02; /* Red Power LED on */
- __asm__ volatile ("sync");
-
- *(vu_char *) (CFG_CS1_START + 1) = 0x02; /* Disable driver for KB11 */
- __asm__ volatile ("sync");
-}
-
-void power_set_reset(int power)
-{
- debug("ide_set_reset(%d)\n", power);
-
- if (power) {
- *(vu_long *) MPC5XXX_WU_GPIO_DATA &= ~GPIO_WU6;
- *(vu_long *) MPC5XXX_INTERRUPT_GPIO_DATA_OUTPUT &= ~GPIO_USB9;
- } else {
- *(vu_long *) MPC5XXX_WU_GPIO_DATA |= GPIO_WU6;
- if ((*(vu_long *) MPC5XXX_INTERRUPT_GPIO_STATUS & GPIO_USB9S) ==
- 0) {
- *(vu_long *) MPC5XXX_SIMPLEIO_GPIO_DATA_OUTPUT |=
- GPIO_USB0;
- }
-
- }
-}
-
-int do_poweroff(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
-{
- power_set_reset(1);
- return (0);
-}
-
-U_BOOT_CMD(poweroff, 1, 1, do_poweroff, "poweroff- Switch off power\n", NULL);
-
-int phypower(int flag)
-{
- u32 addr;
- vu_long *reg;
- int status;
- pci_dev_t dev;
-
- dev = PCI_BDF(0, 0x18, 0);
- status = pci_read_config_dword(dev, PCI_BASE_ADDRESS_1, &addr);
- if (status == 0) {
- reg = (vu_long *) (addr + 0x00000040);
- *reg |= 0x40000000;
- __asm__ volatile ("sync");
-
- reg = (vu_long *) (addr + 0x001000c);
- *reg |= 0x20000000;
- __asm__ volatile ("sync");
-
- reg = (vu_long *) (addr + 0x0010004);
- if (flag != 0) {
- *reg &= ~0x20000000;
- } else {
- *reg |= 0x20000000;
- }
- __asm__ volatile ("sync");
- }
- return (status);
-}
-
-int do_phypower(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
-{
- int status;
-
- if (argv[1][0] == '0') {
- status = phypower(0);
- } else {
- status = phypower(1);
- }
- return (0);
-}
-
-U_BOOT_CMD(phypower, 2, 2, do_phypower,
- "phypower- Switch power of ethernet phy\n", NULL);
-
-int do_writepci(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
-{
- unsigned int addr;
- unsigned int size;
- int i;
- volatile unsigned long *ptr;
-
- addr = simple_strtol(argv[1], NULL, 16);
- size = simple_strtol(argv[2], NULL, 16);
-
- printf("\nWriting at addr %08x, size %08x.\n", addr, size);
-
- while (1) {
- ptr = (volatile unsigned long *)addr;
- for (i = 0; i < (size >> 2); i++) {
- *ptr++ = i;
- }
-
- /* Abort if ctrl-c was pressed */
- if (ctrlc()) {
- puts("\nAbort\n");
- return 0;
- }
- putc('.');
- }
- return 0;
-}
-
-U_BOOT_CMD(writepci, 3, 1, do_writepci,
- "writepci- Write some data to pcibus\n",
- "<addr> <size>\n" " - Write some data to pcibus.\n");
diff --git a/board/esd/pf5200/u-boot.lds b/board/esd/pf5200/u-boot.lds
deleted file mode 100644
index f23432ecfa..0000000000
--- a/board/esd/pf5200/u-boot.lds
+++ /dev/null
@@ -1,125 +0,0 @@
-/*
- * (C) Copyright 2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc5xxx/start.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/esd/plu405/Makefile b/board/esd/plu405/Makefile
deleted file mode 100644
index 9340a32a5f..0000000000
--- a/board/esd/plu405/Makefile
+++ /dev/null
@@ -1,46 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o ../common/misc.o ../common/auto_update.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/esd/plu405/config.mk b/board/esd/plu405/config.mk
deleted file mode 100644
index 25b2105799..0000000000
--- a/board/esd/plu405/config.mk
+++ /dev/null
@@ -1,29 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# esd PLU405 boards
-#
-
-TEXT_BASE = 0xFFFC0000
-#TEXT_BASE = 0x00FC0000
diff --git a/board/esd/plu405/flash.c b/board/esd/plu405/flash.c
deleted file mode 100644
index 89af1190a8..0000000000
--- a/board/esd/plu405/flash.c
+++ /dev/null
@@ -1,101 +0,0 @@
-/*
- * (C) Copyright 2001
- * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <ppc4xx.h>
-#include <asm/processor.h>
-
-/*
- * include common flash code (for esd boards)
- */
-#include "../common/flash.c"
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (vu_long * addr, flash_info_t * info);
-static void flash_get_offsets (ulong base, flash_info_t * info);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- unsigned long size_b0;
- int i;
- uint pbcr;
- unsigned long base_b0;
- int size_val = 0;
-
- /* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* Static FLASH Bank configuration here - FIXME XXX */
-
- size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size_b0, size_b0<<20);
- }
-
- /* Setup offsets */
- flash_get_offsets (-size_b0, &flash_info[0]);
-
- /* Re-do sizing to get full correct info */
- mtdcr(ebccfga, pb0cr);
- pbcr = mfdcr(ebccfgd);
- mtdcr(ebccfga, pb0cr);
- base_b0 = -size_b0;
- switch (size_b0) {
- case 1 << 20:
- size_val = 0;
- break;
- case 2 << 20:
- size_val = 1;
- break;
- case 4 << 20:
- size_val = 2;
- break;
- case 8 << 20:
- size_val = 3;
- break;
- case 16 << 20:
- size_val = 4;
- break;
- }
- pbcr = (pbcr & 0x0001ffff) | base_b0 | (size_val << 17);
- mtdcr(ebccfgd, pbcr);
-
- /* Monitor protection ON by default */
- (void)flash_protect(FLAG_PROTECT_SET,
- -CFG_MONITOR_LEN,
- 0xffffffff,
- &flash_info[0]);
-
- flash_info[0].size = size_b0;
-
- return (size_b0);
-}
diff --git a/board/esd/plu405/fpgadata.c b/board/esd/plu405/fpgadata.c
deleted file mode 100644
index f6656c1504..0000000000
--- a/board/esd/plu405/fpgadata.c
+++ /dev/null
@@ -1,1160 +0,0 @@
- 0x1f,0x8b,0x08,0x08,0x9d,0x76,0x5c,0x3f,0x00,0x03,0x70,0x6c,0x75,0x34,0x30,0x35,
- 0x5f,0x31,0x5f,0x30,0x30,0x2e,0x62,0x69,0x74,0x00,0x94,0x9b,0x7f,0x6c,0x1d,0x55,
- 0x76,0xc7,0xcf,0xfc,0xb0,0x3d,0xf6,0x7b,0xf1,0x9b,0x24,0x76,0xeb,0x6e,0x82,0x33,
- 0xfe,0x41,0xf4,0x48,0x9f,0x5f,0x5e,0x9c,0x1f,0x18,0x63,0xec,0x89,0x13,0xed,0x5a,
- 0x4b,0xda,0x58,0x2a,0xad,0x56,0x15,0x62,0x0d,0x9b,0xad,0xa2,0xca,0x44,0xa6,0xdb,
- 0x56,0x51,0xba,0x0d,0xd7,0x71,0x20,0x06,0x7b,0x89,0xa1,0x48,0x04,0x9a,0xd2,0x17,
- 0x88,0x84,0x05,0xd6,0xea,0xe5,0x47,0x89,0x21,0x29,0x4c,0x8c,0x81,0x07,0x4d,0x83,
- 0x9b,0xa0,0x2a,0x1b,0x68,0x78,0x50,0x2f,0x98,0x10,0xb2,0xce,0x8f,0x06,0x93,0x38,
- 0x71,0xef,0x9d,0x99,0x7b,0xe7,0xce,0xaf,0x67,0xaf,0xf7,0x8f,0x3d,0x99,0x77,0x35,
- 0xdc,0x73,0xde,0x9d,0x73,0x3e,0xf3,0x3d,0xe7,0x41,0x71,0x6c,0xd2,0xfa,0x1f,0x80,
- 0xf0,0x20,0xa8,0x5d,0x9d,0x7f,0xb7,0x2a,0xb5,0xfa,0xa7,0x2b,0x7e,0x9a,0x4a,0x25,
- 0xb7,0xfc,0x6c,0x13,0x3c,0x04,0x91,0xfa,0x5f,0xac,0x4e,0xfd,0xfc,0x6f,0x1f,0x59,
- 0xb1,0x6a,0x15,0xfc,0x0c,0xff,0x2b,0x95,0x5a,0xb9,0x3c,0x75,0xd7,0xf2,0x54,0x03,
- 0x6c,0x82,0xe2,0x15,0xab,0x1a,0x57,0xae,0x68,0xac,0x5f,0x05,0x3f,0x07,0x61,0xe5,
- 0xfe,0x19,0xfc,0xf7,0xea,0xf3,0x7f,0xfe,0x57,0x29,0x40,0x02,0x00,0x14,0xa5,0x84,
- 0x0e,0xf2,0xff,0x91,0x94,0xa0,0x09,0x80,0x5a,0xea,0x52,0x60,0x90,0x7f,0x83,0xfd,
- 0x79,0x71,0x0a,0x34,0xfe,0xdf,0x42,0x0a,0x74,0x68,0x07,0xbd,0x1f,0x16,0xa8,0x30,
- 0xeb,0x9f,0xa0,0xcb,0x88,0xda,0xbf,0xe7,0xfa,0x99,0x0f,0x51,0xe8,0x32,0xe7,0xaf,
- 0xe5,0x72,0x9a,0x9a,0x62,0x6a,0x2e,0xf7,0x07,0x76,0xff,0xb3,0x73,0xba,0xff,0x35,
- 0x7a,0xff,0xdf,0x77,0x3d,0x2c,0x98,0xc3,0x72,0x00,0x99,0xed,0xc7,0x0a,0x8f,0x0c,
- 0x78,0x87,0x1d,0xa0,0x42,0x21,0x08,0xc4,0xa8,0x00,0xd1,0x75,0xff,0x51,0xba,0xfe,
- 0x78,0xc1,0x2d,0x98,0x41,0x2d,0xe3,0xa5,0x5b,0xa5,0x2d,0xea,0x0d,0xf4,0x07,0xb9,
- 0xd8,0x94,0x84,0xaf,0xec,0x6c,0xb1,0x8c,0xcf,0x90,0x69,0x4c,0xca,0x5d,0xf6,0xfa,
- 0x91,0x8a,0x8b,0x70,0x14,0x25,0x0d,0x65,0x8f,0x98,0x94,0xb1,0xf1,0x79,0xdf,0xb0,
- 0x68,0x5e,0xc9,0x45,0x1c,0x43,0xca,0xc8,0x34,0x8a,0x59,0xe8,0x87,0x43,0x10,0xcf,
- 0xfe,0x20,0x25,0x9e,0xc0,0x46,0xad,0xb1,0xc8,0x32,0x12,0x46,0x84,0x18,0xff,0x64,
- 0x19,0x97,0x05,0x7a,0x7f,0x03,0x86,0xe0,0x28,0xbe,0xa8,0x0c,0x8b,0xc4,0x48,0x1a,
- 0x91,0x8c,0x78,0xc1,0x6d,0xf4,0x65,0x60,0x12,0xbb,0x64,0xfd,0xad,0x2d,0xbf,0x00,
- 0x37,0xa0,0xd1,0x28,0xcd,0x48,0xc4,0x58,0x63,0xc4,0x2c,0xa3,0xd9,0x32,0x3e,0xb1,
- 0x8c,0x31,0xa0,0xf7,0x4f,0x0b,0xc7,0x60,0x06,0x5a,0x8c,0xd8,0xa4,0xf4,0x4b,0x6a,
- 0x4c,0xfb,0x8c,0x41,0x76,0x7f,0x43,0x1d,0x32,0xef,0x16,0x7d,0x53,0x4a,0x10,0xe3,
- 0x38,0x7f,0x5b,0xfa,0x1f,0x5a,0x78,0x15,0x34,0xba,0xbe,0x20,0x61,0x6e,0x52,0x59,
- 0x05,0x09,0xf8,0x46,0xb4,0xb7,0x7d,0xb7,0xc7,0x91,0xcb,0xf8,0xf4,0xdb,0xeb,0xe5,
- 0x0d,0x66,0x34,0x8a,0xcb,0xc4,0xa8,0x2f,0x2c,0x2c,0x50,0x53,0x72,0xbb,0xbd,0x7e,
- 0x4a,0x7d,0x00,0x8e,0xa0,0xba,0x5c,0xf1,0x4f,0xc4,0x4a,0x78,0x05,0xd5,0x4d,0x44,
- 0xb6,0x8a,0xe7,0x10,0xb9,0x42,0x0c,0xb0,0x8d,0x5b,0xec,0xfe,0x6d,0xca,0x06,0xb8,
- 0x82,0x37,0x39,0x4f,0x95,0x4a,0x8d,0x2b,0xdd,0x4d,0x13,0xb1,0x54,0xcd,0x49,0x38,
- 0x0d,0x4d,0x46,0x2c,0x25,0x9d,0xc0,0x1f,0x35,0x8d,0x62,0xe3,0x14,0x3b,0x1d,0x7a,
- 0xf9,0x31,0x99,0x04,0x21,0x99,0x21,0xd1,0x50,0x5b,0x46,0x63,0x97,0x2c,0xc3,0x15,
- 0x9f,0xb1,0x42,0x1a,0x1f,0x45,0xb6,0xe2,0x13,0x1b,0xa8,0x21,0xd1,0x48,0x7a,0xe2,
- 0x6f,0x1b,0xe7,0x59,0xfc,0x4f,0x54,0xec,0x85,0x23,0x50,0x67,0x44,0xba,0xc4,0x4f,
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- 0xbc,0xbc,0xf7,0xa6,0x15,0xd3,0x57,0xaf,0x3c,0xbe,0xf3,0x95,0x39,0x3f,0xa9,0x9c,
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- 0x5c,0x99,0xb8,0x74,0x61,0xd9,0xb7,0xef,0xb9,0xc2,0xc0,0x25,0xf8,0x5f,0x7c,0x96,
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- 0xd4,0xde,0xd1,0xc7,0x6a,0x13,0xe5,0x87,0x1b,0x19,0x3f,0x54,0x95,0xdd,0x78,0x0e,
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- 0x53,0xb4,0xc0,0x4a,0x62,0x00,0x6e,0xf4,0xc5,0x19,0x50,0x07,0x89,0xe3,0xd2,0x2e,
- 0xa8,0xa1,0x46,0x2b,0x71,0x1c,0x9c,0xdd,0xc6,0x00,0x28,0xc1,0x80,0xe6,0xfe,0x41,
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- 0x16,0x88,0xa2,0x62,0xf3,0x4d,0x55,0xb1,0x5e,0x30,0xf3,0xe2,0x2b,0x27,0xd7,0x5f,
- 0xc3,0xba,0x69,0x2d,0x99,0xa1,0x4f,0x51,0x8b,0x8f,0x88,0xd5,0x12,0x77,0x81,0xd3,
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- 0x58,0x2d,0x83,0xce,0xf0,0x35,0xc6,0x0f,0x29,0x29,0x6a,0x5f,0x45,0xf7,0x3b,0x9b,
- 0x16,0x52,0xb0,0xc3,0xe1,0x87,0x0c,0xb8,0xfb,0x29,0xbb,0x73,0x3f,0x3f,0x5c,0x60,
- 0x01,0xcd,0x69,0x71,0xae,0x4f,0xef,0x29,0x6d,0xb1,0x35,0x1b,0x1c,0x66,0xd9,0x3c,
- 0x4d,0x60,0xb5,0xb8,0x7c,0x83,0x8d,0xc7,0xe0,0x6f,0x74,0x77,0xb6,0x40,0x9c,0x82,
- 0x11,0x1b,0x98,0x2d,0x2e,0x3f,0xd4,0x90,0x9f,0x1f,0x32,0x50,0x2f,0xb4,0xb8,0xeb,
- 0x21,0x8b,0xec,0xeb,0x03,0x7f,0x7d,0xba,0xad,0x0b,0xd7,0xe7,0xe6,0x47,0xc3,0x59,
- 0x94,0x80,0x2e,0x4a,0xfd,0x2d,0x10,0xa7,0x00,0x3a,0x0d,0x30,0xc7,0x6a,0xc9,0x38,
- 0xe3,0xe9,0xa1,0xeb,0xb6,0x9d,0xd4,0xeb,0x52,0x8a,0x3e,0x1d,0x9b,0x89,0x42,0xf9,
- 0x21,0x62,0x2d,0x22,0x70,0x97,0x4f,0x0f,0x0b,0x29,0xa1,0xbf,0xb9,0x29,0x61,0x10,
- 0xba,0x5e,0x8c,0x77,0xa5,0x9c,0xf9,0xd2,0x24,0x19,0xfc,0x50,0xee,0x04,0x6e,0x3c,
- 0xeb,0x29,0x1b,0xcc,0xeb,0xd7,0x65,0x61,0x3d,0x25,0x8a,0xbf,0x36,0x68,0xa1,0xc3,
- 0x0f,0x91,0xcd,0x0f,0xdd,0xfd,0x1d,0x75,0xe3,0xcd,0x94,0xa4,0x6d,0x48,0xc5,0x8f,
- 0x1a,0xe0,0x8e,0x20,0xc0,0xfd,0x5e,0xa8,0x3b,0xb2,0x99,0xec,0xd1,0xaf,0x4f,0x55,
- 0x1e,0x35,0xc0,0xad,0x26,0xa8,0x77,0x5b,0xae,0x4f,0x71,0xfb,0x7b,0xd6,0xe6,0x87,
- 0x29,0x8b,0x1f,0xae,0x31,0x69,0xe7,0x0e,0x7d,0x83,0x09,0xd8,0x57,0x89,0xc3,0xdc,
- 0xfa,0xa9,0x45,0x06,0x3f,0xa4,0xbb,0x27,0xb5,0x36,0x2b,0xd4,0x99,0xcc,0x10,0xcd,
- 0xa1,0x3f,0x53,0x6d,0x0f,0x2e,0x18,0xf6,0x47,0x61,0xfc,0xd0,0x5d,0x3f,0x73,0x29,
- 0x2d,0x4c,0xe9,0x15,0xbb,0xe1,0x47,0x14,0x5c,0x43,0xf9,0x21,0x62,0x44,0x51,0xb6,
- 0x41,0x8a,0x01,0xb7,0x3f,0xe5,0xf3,0x78,0x2b,0xaa,0x81,0x8e,0x41,0x18,0xce,0x2f,
- 0x41,0xb3,0xa1,0x83,0xc4,0xc7,0x69,0xcb,0x6c,0xb8,0x83,0x03,0xdc,0x7a,0x46,0xab,
- 0x41,0x67,0xfc,0x70,0x25,0xec,0x24,0x2a,0xb9,0x3a,0x1d,0x61,0xb4,0xb0,0x9f,0xd1,
- 0xc2,0x1e,0xb4,0xd3,0x26,0x8a,0xdc,0x78,0xe8,0xfa,0x51,0x73,0xa9,0x66,0xca,0x0f,
- 0xb7,0xb3,0x65,0x33,0xdc,0x2d,0xf0,0x43,0x0b,0xf0,0xeb,0x27,0x83,0xb5,0xb7,0x12,
- 0x0b,0xba,0x64,0x25,0x82,0xb3,0x39,0x25,0xdd,0x25,0xc7,0x23,0x58,0xa3,0xcf,0x7d,
- 0xa7,0x01,0x72,0x06,0x00,0x6e,0x7e,0xa8,0x7d,0x2e,0x26,0xd2,0xf4,0xcd,0xe3,0x31,
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- 0x8d,0x9b,0x1f,0x19,0x14,0x93,0x1f,0x82,0x46,0xdf,0x46,0x01,0x19,0xfc,0x10,0x99,
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- 0x1d,0x72,0x61,0x50,0xc7,0x4f,0xc3,0x5f,0x99,0xf6,0x47,0x66,0x66,0xa7,0xe0,0x58,
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- 0x66,0x6d,0xf4,0x49,0xf8,0xa1,0x99,0xe6,0x15,0xc3,0x08,0x05,0x32,0x03,0x6f,0x52,
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- 0x11,0xb8,0xeb,0xa7,0xc7,0xe6,0x87,0xf9,0x4e,0xca,0x06,0x71,0x45,0x43,0x7c,0xa8,
- 0xd3,0xa2,0x85,0xbb,0xb1,0x8f,0x1f,0x52,0xfb,0xd3,0xb9,0x36,0x9e,0xec,0xec,0x6a,
- 0x57,0x94,0xfe,0x6c,0x3c,0x81,0x25,0x14,0xd7,0x3a,0xb3,0x4a,0x02,0x9b,0x86,0x88,
- 0xb6,0x74,0xd1,0x16,0x77,0x3c,0x98,0x2d,0x40,0x47,0x77,0x50,0x06,0xbb,0xe8,0x92,
- 0x04,0x73,0x6d,0x22,0x07,0xb8,0x8f,0x0b,0x60,0x46,0x0b,0x81,0xf2,0x43,0xa8,0x02,
- 0xc6,0x06,0xa1,0x99,0xb5,0xe4,0x18,0xe8,0x74,0x18,0x23,0x35,0x7e,0xce,0x78,0xee,
- 0x8a,0xae,0xd1,0xf2,0xc7,0x1b,0x6e,0x81,0xbb,0x22,0x75,0xda,0x09,0x0a,0xaa,0xef,
- 0x42,0x6b,0x28,0x98,0x4f,0x41,0x94,0x81,0x45,0xb7,0x70,0xf6,0x87,0xde,0xaf,0xb6,
- 0xa5,0xbd,0xbe,0x70,0x47,0x63,0xfc,0xad,0x4e,0x97,0x06,0x50,0xb0,0x81,0x02,0x70,
- 0xf8,0x80,0xbb,0xa2,0x6f,0xb4,0xf9,0xe1,0xf4,0x95,0x2b,0x19,0x3f,0xfc,0xc9,0x7d,
- 0x37,0x1a,0xfc,0x70,0xaf,0xc1,0x0f,0x7f,0xc3,0xc0,0x8a,0xff,0x69,0xdf,0xfe,0x51,
- 0x10,0x86,0xa1,0x38,0x8e,0x47,0xfc,0x83,0x83,0x9b,0xbb,0x8b,0x1e,0x20,0xce,0x1d,
- 0x2a,0x38,0xb9,0xd4,0xdd,0xbb,0x68,0x3d,0x82,0x78,0x01,0x3d,0x8d,0x17,0x10,0x5c,
- 0x45,0x70,0xd0,0xbd,0x20,0x0e,0x52,0xfb,0x5e,0x5b,0x6d,0x1d,0x0a,0xed,0xa0,0x20,
- 0xdf,0xcf,0xd2,0x10,0x92,0xf0,0x96,0xc0,0xef,0x51,0x92,0xa9,0xdf,0xb8,0x69,0x3e,
- 0x74,0xfc,0xa9,0xe4,0xc3,0xf0,0xe1,0x6a,0x30,0x0b,0xe2,0x7c,0xb8,0x0f,0x83,0x30,
- 0x97,0xc7,0xca,0xd2,0x58,0x78,0x5d,0x45,0xc7,0xde,0x93,0xa0,0x38,0xd8,0x4c,0x64,
- 0xa0,0xf9,0x50,0x67,0xe6,0xd9,0xf5,0x1a,0x0b,0x6f,0x67,0x29,0x23,0x0d,0x8a,0xbe,
- 0x0e,0xe2,0x7c,0x28,0x33,0xb9,0xbc,0xea,0xa4,0xf9,0xb0,0xdf,0xf3,0x8e,0xeb,0xa1,
- 0xac,0x5f,0x78,0xbb,0xae,0x6c,0x7c,0x45,0xcd,0xea,0xd5,0xdb,0xa8,0xc5,0x8a,0xae,
- 0x75,0xf4,0x1d,0x77,0xaa,0x9f,0x02,0x00,0x00,0x00,0xe0,0xdf,0x69,0xef,0xd0,0xa0,
- 0x77,0x00,0x00,0x00,0x00,0x50,0x4c,0x7b,0x87,0x16,0xbd,0x03,0x00,0x00,0x00,0x80,
- 0x62,0xda,0x3b,0xb4,0xb5,0x77,0xf8,0x75,0x29,0x00,0x00,0x00,0x00,0xbe,0xc8,0xca,
- 0xfb,0x38,0x73,0xb8,0x58,0xb3,0x94,0x57,0x2b,0x75,0x6b,0x46,0xa5,0xff,0x27,0x24,
- 0x7b,0x9b,0xd6,0x6c,0x6b,0xef,0x33,0x4f,0xb3,0xcf,0x75,0x4f,0xaa,0x75,0xf0,0xc5,
- 0xf1,0x33,0x01,0x00,
diff --git a/board/esd/plu405/plu405.c b/board/esd/plu405/plu405.c
deleted file mode 100644
index 5b9d0631f8..0000000000
--- a/board/esd/plu405/plu405.c
+++ /dev/null
@@ -1,294 +0,0 @@
-/*
- * (C) Copyright 2001-2003
- * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/processor.h>
-#include <command.h>
-#include <malloc.h>
-
-
-#if 0
-#define FPGA_DEBUG
-#endif
-
-extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
-extern void lxt971_no_sleep(void);
-
-/* fpga configuration data - gzip compressed and generated by bin2c */
-const unsigned char fpgadata[] =
-{
-#include "fpgadata.c"
-};
-
-/*
- * include common fpga code (for esd boards)
- */
-#include "../common/fpga.c"
-
-
-/*
- * include common auto-update code (for esd boards)
- */
-#include "../common/auto_update.h"
-
-au_image_t au_image[] = {
- {"plu405/preinst.img", 0, -1, AU_SCRIPT},
- {"plu405/u-boot.img", 0xfffc0000, 0x00040000, AU_FIRMWARE},
- {"plu405/pImage_${bd_type}", 0x00000000, 0x00100000, AU_NAND},
- {"plu405/pImage.initrd", 0x00100000, 0x00200000, AU_NAND},
- {"plu405/yaffsmt2.img", 0x00300000, 0x01c00000, AU_NAND},
- {"plu405/postinst.img", 0, 0, AU_SCRIPT},
-};
-
-int N_AU_IMAGES = (sizeof(au_image) / sizeof(au_image[0]));
-
-
-/* Prototypes */
-int gunzip(void *, int, unsigned char *, unsigned long *);
-
-
-int board_early_init_f (void)
-{
- /*
- * IRQ 0-15 405GP internally generated; active high; level sensitive
- * IRQ 16 405GP internally generated; active low; level sensitive
- * IRQ 17-24 RESERVED
- * IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive
- * IRQ 26 (EXT IRQ 1) SER0 ; active low; level sensitive
- * IRQ 27 (EXT IRQ 2) SER1; active low; level sensitive
- * IRQ 28 (EXT IRQ 3) FPGA 0; active low; level sensitive
- * IRQ 29 (EXT IRQ 4) FPGA 1; active low; level sensitive
- * IRQ 30 (EXT IRQ 5) PCI INTA; active low; level sensitive
- * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
- */
- mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
- mtdcr(uicer, 0x00000000); /* disable all ints */
- mtdcr(uiccr, 0x00000000); /* set all to be non-critical*/
- mtdcr(uicpr, 0xFFFFFF99); /* set int polarities */
- mtdcr(uictr, 0x10000000); /* set int trigger levels */
- mtdcr(uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority*/
- mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
-
- /*
- * EBC Configuration Register: set ready timeout to 512 ebc-clks -> ca. 15 us
- */
- mtebc (epcr, 0xa8400000); /* ebc always driven */
-
- return 0;
-}
-
-
-int misc_init_f (void)
-{
- return 0; /* dummy implementation */
-}
-
-
-int misc_init_r (void)
-{
- volatile unsigned char *duart0_mcr = (unsigned char *)((ulong)DUART0_BA + 4);
- volatile unsigned char *duart1_mcr = (unsigned char *)((ulong)DUART1_BA + 4);
- unsigned char *dst;
- ulong len = sizeof(fpgadata);
- int status;
- int index;
- int i;
-
- dst = malloc(CFG_FPGA_MAX_SIZE);
- if (gunzip (dst, CFG_FPGA_MAX_SIZE, (uchar *)fpgadata, &len) != 0) {
- printf ("GUNZIP ERROR - must RESET board to recover\n");
- do_reset (NULL, 0, 0, NULL);
- }
-
- status = fpga_boot(dst, len);
- if (status != 0) {
- printf("\nFPGA: Booting failed ");
- switch (status) {
- case ERROR_FPGA_PRG_INIT_LOW:
- printf("(Timeout: INIT not low after asserting PROGRAM*)\n ");
- break;
- case ERROR_FPGA_PRG_INIT_HIGH:
- printf("(Timeout: INIT not high after deasserting PROGRAM*)\n ");
- break;
- case ERROR_FPGA_PRG_DONE:
- printf("(Timeout: DONE not high after programming FPGA)\n ");
- break;
- }
-
- /* display infos on fpgaimage */
- index = 15;
- for (i=0; i<4; i++) {
- len = dst[index];
- printf("FPGA: %s\n", &(dst[index+1]));
- index += len+3;
- }
- putc ('\n');
- /* delayed reboot */
- for (i=20; i>0; i--) {
- printf("Rebooting in %2d seconds \r",i);
- for (index=0;index<1000;index++)
- udelay(1000);
- }
- putc ('\n');
- do_reset(NULL, 0, 0, NULL);
- }
-
- puts("FPGA: ");
-
- /* display infos on fpgaimage */
- index = 15;
- for (i=0; i<4; i++) {
- len = dst[index];
- printf("%s ", &(dst[index+1]));
- index += len+3;
- }
- putc ('\n');
-
- free(dst);
-
- /*
- * Reset FPGA via FPGA_DATA pin
- */
- SET_FPGA(FPGA_PRG | FPGA_CLK);
- udelay(1000); /* wait 1ms */
- SET_FPGA(FPGA_PRG | FPGA_CLK | FPGA_DATA);
- udelay(1000); /* wait 1ms */
-
- /*
- * Reset external DUARTs
- */
- out32(GPIO0_OR, in32(GPIO0_OR) | CFG_DUART_RST); /* set reset to high */
- udelay(10); /* wait 10us */
- out32(GPIO0_OR, in32(GPIO0_OR) & ~CFG_DUART_RST); /* set reset to low */
- udelay(1000); /* wait 1ms */
-
- /*
- * Set NAND-FLASH GPIO signals to default
- */
- out32(GPIO0_OR, in32(GPIO0_OR) & ~(CFG_NAND_CLE | CFG_NAND_ALE));
- out32(GPIO0_OR, in32(GPIO0_OR) | CFG_NAND_CE);
-
- /*
- * Enable interrupts in exar duart mcr[3]
- */
- *duart0_mcr = 0x08;
- *duart1_mcr = 0x08;
-
- return (0);
-}
-
-
-/*
- * Check Board Identity:
- */
-int checkboard (void)
-{
- char str[64];
- int i = getenv_r ("serial#", str, sizeof(str));
-
- puts ("Board: ");
-
- if (i == -1) {
- puts ("### No HW ID - assuming PLU405");
- } else {
- puts(str);
- }
-
- putc ('\n');
-
- /*
- * Disable sleep mode in LXT971
- */
- lxt971_no_sleep();
-
- return 0;
-}
-
-
-long int initdram (int board_type)
-{
- unsigned long val;
-
- mtdcr(memcfga, mem_mb0cf);
- val = mfdcr(memcfgd);
-
-#if 0
- printf("\nmb0cf=%x\n", val); /* test-only */
- printf("strap=%x\n", mfdcr(strap)); /* test-only */
-#endif
-
- return (4*1024*1024 << ((val & 0x000e0000) >> 17));
-}
-
-
-int testdram (void)
-{
- /* TODO: XXX XXX XXX */
- printf ("test: 16 MB - ok\n");
-
- return (0);
-}
-
-
-#ifdef CONFIG_IDE_RESET
-void ide_set_reset(int on)
-{
- volatile unsigned short *fpga_mode =
- (unsigned short *)((ulong)CFG_FPGA_BASE_ADDR + CFG_FPGA_CTRL);
-
- /*
- * Assert or deassert CompactFlash Reset Pin
- */
- if (on) { /* assert RESET */
- *fpga_mode &= ~(CFG_FPGA_CTRL_CF_RESET);
- } else { /* release RESET */
- *fpga_mode |= CFG_FPGA_CTRL_CF_RESET;
- }
-}
-#endif /* CONFIG_IDE_RESET */
-
-
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
-#include <linux/mtd/nand.h>
-extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
-
-void nand_init(void)
-{
- nand_probe(CFG_NAND_BASE);
- if (nand_dev_desc[0].ChipID != NAND_ChipID_UNKNOWN) {
- print_size(nand_dev_desc[0].totlen, "\n");
- }
-}
-#endif
-
-
-#ifdef CONFIG_AUTO_UPDATE_SHOW
-void board_auto_update_show(int au_active)
-{
- if (au_active) {
- printf("\n Dies ist die board-funktion: Updating!!!\n");
- } else {
- printf("\n Dies ist die board-funktion: Updating done!!!\n");
- }
-}
-#endif
diff --git a/board/esd/plu405/u-boot.lds b/board/esd/plu405/u-boot.lds
deleted file mode 100644
index 43f776579e..0000000000
--- a/board/esd/plu405/u-boot.lds
+++ /dev/null
@@ -1,151 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- .resetvec 0xFFFFFFFC :
- {
- *(.resetvec)
- } = 0xffff
-
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/ppc4xx/start.o (.text)
- cpu/ppc4xx/traps.o (.text)
- cpu/ppc4xx/interrupts.o (.text)
- cpu/ppc4xx/serial.o (.text)
- cpu/ppc4xx/cpu_init.o (.text)
- cpu/ppc4xx/speed.o (.text)
- cpu/ppc4xx/4xx_enet.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/extable.o (.text)
- lib_generic/zlib.o (.text)
-
-/* . = env_offset;*/
-/* common/environment.o(.text)*/
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/esd/pmc405/Makefile b/board/esd/pmc405/Makefile
deleted file mode 100644
index 1281be70be..0000000000
--- a/board/esd/pmc405/Makefile
+++ /dev/null
@@ -1,51 +0,0 @@
-#
-# (C) Copyright 2000, 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-# Objects for Xilinx JTAG programming (CPLD)
-CPLD = ../common/xilinx_jtag/lenval.o \
- ../common/xilinx_jtag/micro.o \
- ../common/xilinx_jtag/ports.o
-
-OBJS = $(BOARD).o ../common/misc.o $(CPLD)
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/esd/pmc405/config.mk b/board/esd/pmc405/config.mk
deleted file mode 100644
index fc2794dbb2..0000000000
--- a/board/esd/pmc405/config.mk
+++ /dev/null
@@ -1,28 +0,0 @@
-#
-# (C) Copyright 2000, 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# esd PMC405 boards
-#
-
-TEXT_BASE = 0xFFFC0000
diff --git a/board/esd/pmc405/fpgadata.c b/board/esd/pmc405/fpgadata.c
deleted file mode 100644
index ebdf71dc78..0000000000
--- a/board/esd/pmc405/fpgadata.c
+++ /dev/null
@@ -1,2472 +0,0 @@
- 0x07,0x20,0x12,0x00,0x12,0x01,0x04,0x00,0x00,0x00,0x00,0x02,0x08,0xff,0x02,0x08,
- 0xfe,0x08,0x00,0x00,0x00,0x20,0x01,0x0f,0xff,0xff,0xff,0x09,0x00,0x00,0x00,0x00,
- 0xf9,0x60,0x20,0x93,0x02,0x08,0xff,0x02,0x08,0xff,0x02,0x08,0xe8,0x08,0x00,0x00,
- 0x00,0x06,0x01,0x00,0x09,0x05,0x00,0x02,0x08,0xed,0x04,0x00,0x03,0x0d,0x40,0x08,
- 0x00,0x00,0x00,0x12,0x01,0x00,0x00,0x00,0x09,0x03,0xff,0xff,0x00,0x00,0x00,0x01,
- 0x00,0x00,0x03,0x09,0x03,0xff,0xfd,0x03,0xff,0xfd,0x04,0x00,0x00,0x00,0x00,0x02,
- 0x08,0xea,0x08,0x00,0x00,0x00,0x22,0x01,0x00,0x00,0x00,0x00,0x00,0x09,0x00,0x00,
- 0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x09,0x00,
- 0x00,0x04,0x38,0x01,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0x08,0x00,0x01,0x00,
- 0x00,0x00,0x00,0x01,0x09,0x00,0x00,0x0c,0x00,0x01,0x00,0x00,0x00,0x00,0x01,0x09,
- 0x00,0x00,0x10,0x00,0x01,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0x20,0x00,0x01,
- 0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0x24,0x38,0x01,0x00,0x00,0x00,0x00,0x01,
- 0x09,0x00,0x00,0x28,0x00,0x01,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0x2c,0x00,
- 0x01,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0x30,0x00,0x01,0x00,0x00,0x00,0x00,
- 0x01,0x09,0x00,0x00,0x40,0x00,0x01,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0x44,
- 0x14,0x01,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0x48,0x00,0x01,0x00,0x00,0x00,
- 0x00,0x01,0x09,0x00,0x00,0x4c,0x00,0x01,0x00,0x00,0x00,0x00,0x01,0x04,0x00,0x00,
- 0x4e,0x20,0x01,0x00,0x00,0x00,0x00,0x00,0x09,0x00,0x00,0x50,0x00,0x03,0x00,0x00,
- 0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x03,0x09,0x00,0x00,0x80,0x00,0x01,0x00,
- 0x00,0x00,0x00,0x01,0x01,0x00,0x00,0x00,0x00,0x00,0x04,0x00,0x00,0x00,0x00,0x09,
- 0x00,0x00,0x84,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,
- 0x09,0x00,0x00,0x88,0x00,0x01,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0x8c,0x00,
- 0x01,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0x90,0x00,0x01,0x00,0x00,0x00,0x00,
- 0x01,0x09,0x00,0x00,0xa0,0x00,0x01,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0xa4,
- 0x00,0x01,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0xa8,0x00,0x01,0x00,0x00,0x00,
- 0x00,0x01,0x09,0x00,0x00,0xac,0x00,0x01,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,
- 0xb0,0x00,0x01,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0xc0,0x00,0x01,0x00,0x00,
- 0x00,0x00,0x01,0x09,0x00,0x00,0xc4,0x00,0x01,0x00,0x00,0x00,0x00,0x01,0x09,0x00,
- 0x00,0xc8,0x00,0x01,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0xcc,0x00,0x01,0x00,
- 0x00,0x00,0x00,0x01,0x04,0x00,0x00,0x4e,0x20,0x01,0x00,0x00,0x00,0x00,0x00,0x09,
- 0x00,0x00,0xd0,0x00,0x03,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x03,
- 0x09,0x00,0x01,0x00,0x01,0x01,0x00,0x00,0x00,0x00,0x01,0x01,0x00,0x00,0x00,0x00,
- 0x00,0x04,0x00,0x00,0x00,0x00,0x09,0x00,0x01,0x04,0x00,0x01,0x00,0x00,0x00,0x00,
- 0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x09,0x00,0x01,0x08,0x01,0x01,0x00,0x00,0x00,
- 0x00,0x01,0x09,0x00,0x01,0x0c,0x00,0x01,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x01,
- 0x10,0x00,0x01,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x01,0x20,0x00,0x01,0x00,0x00,
- 0x00,0x00,0x01,0x09,0x00,0x01,0x24,0x00,0x01,0x00,0x00,0x00,0x00,0x01,0x09,0x00,
- 0x01,0x28,0x00,0x01,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x01,0x2c,0x00,0x01,0x00,
- 0x00,0x00,0x00,0x01,0x09,0x00,0x01,0x30,0x00,0x01,0x00,0x00,0x00,0x00,0x01,0x09,
- 0x00,0x01,0x40,0x00,0x01,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x01,0x44,0x00,0x01,
- 0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x01,0x48,0x00,0x01,0x00,0x00,0x00,0x00,0x01,
- 0x09,0x00,0x01,0x4c,0x00,0x01,0x00,0x00,0x00,0x00,0x01,0x04,0x00,0x00,0x4e,0x20,
- 0x01,0x00,0x00,0x00,0x00,0x00,0x09,0x00,0x01,0x50,0x00,0x03,0x00,0x00,0x00,0x00,
- 0x00,0x01,0x00,0x00,0x00,0x00,0x03,0x09,0x00,0x01,0x80,0x00,0x01,0x00,0x00,0x00,
- 0x00,0x01,0x01,0x00,0x00,0x00,0x00,0x00,0x04,0x00,0x00,0x00,0x00,0x09,0x00,0x01,
- 0x84,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x09,0x00,
- 0x01,0x88,0x00,0x01,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x01,0x8c,0x00,0x01,0x00,
- 0x00,0x00,0x00,0x01,0x09,0x00,0x01,0x90,0x00,0x01,0x00,0x00,0x00,0x00,0x01,0x09,
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- 0x20,0x00,0x03,0x00,0x33,0x10,0x00,0x01,0x09,0x00,0x33,0x24,0x00,0x03,0x00,0x33,
- 0x20,0x00,0x01,0x09,0x00,0x33,0x28,0x00,0x03,0x00,0x33,0x24,0x00,0x01,0x09,0x00,
- 0x33,0x2c,0x00,0x03,0x00,0x33,0x28,0x00,0x01,0x09,0x00,0x33,0x30,0x00,0x03,0x00,
- 0x33,0x2c,0x00,0x01,0x09,0x00,0x33,0x40,0x00,0x03,0x00,0x33,0x30,0x00,0x01,0x09,
- 0x00,0x33,0x44,0x00,0x03,0x00,0x33,0x40,0x00,0x01,0x09,0x00,0x33,0x48,0x00,0x03,
- 0x00,0x33,0x44,0x00,0x01,0x09,0x00,0x33,0x4c,0x00,0x03,0x00,0x33,0x48,0x00,0x01,
- 0x09,0x00,0x33,0x50,0x00,0x03,0x00,0x33,0x4c,0x00,0x01,0x09,0x00,0x33,0x80,0x00,
- 0x03,0x00,0x33,0x50,0x00,0x01,0x09,0x00,0x33,0x84,0x00,0x03,0x00,0x33,0x80,0x00,
- 0x01,0x09,0x00,0x33,0x88,0x00,0x03,0x00,0x33,0x84,0x00,0x01,0x09,0x00,0x33,0x8c,
- 0x00,0x03,0x00,0x33,0x88,0x00,0x01,0x09,0x00,0x33,0x90,0x00,0x03,0x00,0x33,0x8c,
- 0x00,0x01,0x09,0x00,0x33,0xa0,0x00,0x03,0x00,0x33,0x90,0x00,0x01,0x09,0x00,0x33,
- 0xa4,0x00,0x03,0x00,0x33,0xa0,0x00,0x01,0x09,0x00,0x33,0xa8,0x00,0x03,0x00,0x33,
- 0xa4,0x00,0x01,0x09,0x00,0x33,0xac,0x00,0x03,0x00,0x33,0xa8,0x00,0x01,0x09,0x00,
- 0x33,0xb0,0x00,0x03,0x00,0x33,0xac,0x00,0x01,0x09,0x00,0x33,0xc0,0x00,0x03,0x00,
- 0x33,0xb0,0x00,0x01,0x09,0x00,0x33,0xc4,0x00,0x03,0x00,0x33,0xc0,0x00,0x01,0x09,
- 0x00,0x33,0xc8,0x00,0x03,0x00,0x33,0xc4,0x00,0x01,0x09,0x00,0x33,0xcc,0x00,0x03,
- 0x00,0x33,0xc8,0x00,0x01,0x09,0x00,0x33,0xd0,0x00,0x03,0x00,0x33,0xcc,0x00,0x01,
- 0x09,0x00,0x34,0x00,0x00,0x03,0x00,0x33,0xd0,0x00,0x01,0x09,0x00,0x34,0x04,0x00,
- 0x03,0x00,0x34,0x00,0x00,0x01,0x09,0x00,0x34,0x08,0x00,0x03,0x00,0x34,0x04,0x00,
- 0x01,0x09,0x00,0x34,0x0c,0x00,0x03,0x00,0x34,0x08,0x00,0x01,0x09,0x00,0x34,0x10,
- 0x00,0x03,0x00,0x34,0x0c,0x00,0x01,0x09,0x00,0x34,0x20,0x00,0x03,0x00,0x34,0x10,
- 0x00,0x01,0x09,0x00,0x34,0x24,0x00,0x03,0x00,0x34,0x20,0x00,0x01,0x09,0x00,0x34,
- 0x28,0x00,0x03,0x00,0x34,0x24,0x00,0x01,0x09,0x00,0x34,0x2c,0x00,0x03,0x00,0x34,
- 0x28,0x00,0x01,0x09,0x00,0x34,0x30,0x00,0x03,0x00,0x34,0x2c,0x00,0x01,0x09,0x00,
- 0x34,0x40,0x00,0x03,0x00,0x34,0x30,0x00,0x01,0x09,0x00,0x34,0x44,0x00,0x03,0x00,
- 0x34,0x40,0x00,0x01,0x09,0x00,0x34,0x48,0x00,0x03,0x00,0x34,0x44,0x00,0x01,0x09,
- 0x00,0x34,0x4c,0x00,0x03,0x00,0x34,0x48,0x00,0x01,0x09,0x00,0x34,0x50,0x00,0x03,
- 0x00,0x34,0x4c,0x00,0x01,0x09,0x00,0x34,0x80,0x00,0x03,0x00,0x34,0x50,0x00,0x01,
- 0x09,0x00,0x34,0x84,0x00,0x03,0x00,0x34,0x80,0x00,0x01,0x09,0x00,0x34,0x88,0x00,
- 0x03,0x00,0x34,0x84,0x00,0x01,0x09,0x00,0x34,0x8c,0x00,0x03,0x00,0x34,0x88,0x00,
- 0x01,0x09,0x00,0x34,0x90,0x00,0x03,0x00,0x34,0x8c,0x00,0x01,0x09,0x00,0x34,0xa0,
- 0x00,0x03,0x00,0x34,0x90,0x00,0x01,0x09,0x00,0x34,0xa4,0x00,0x03,0x00,0x34,0xa0,
- 0x00,0x01,0x09,0x00,0x34,0xa8,0x00,0x03,0x00,0x34,0xa4,0x00,0x01,0x09,0x00,0x34,
- 0xac,0x00,0x03,0x00,0x34,0xa8,0x00,0x01,0x09,0x00,0x34,0xb0,0x00,0x03,0x00,0x34,
- 0xac,0x00,0x01,0x09,0x00,0x34,0xc0,0x00,0x03,0x00,0x34,0xb0,0x00,0x01,0x09,0x00,
- 0x34,0xc4,0x00,0x03,0x00,0x34,0xc0,0x00,0x01,0x09,0x00,0x34,0xc8,0x00,0x03,0x00,
- 0x34,0xc4,0x00,0x01,0x09,0x00,0x34,0xcc,0x00,0x03,0x00,0x34,0xc8,0x00,0x01,0x09,
- 0x00,0x34,0xd0,0x00,0x03,0x00,0x34,0xcc,0x00,0x01,0x09,0x00,0x35,0x00,0x00,0x03,
- 0x00,0x34,0xd0,0x00,0x01,0x09,0x00,0x35,0x04,0x00,0x03,0x00,0x35,0x00,0x00,0x01,
- 0x09,0x00,0x35,0x08,0x00,0x03,0x00,0x35,0x04,0x00,0x01,0x09,0x00,0x35,0x0c,0x00,
- 0x03,0x00,0x35,0x08,0x00,0x01,0x09,0x00,0x35,0x10,0x00,0x03,0x00,0x35,0x0c,0x00,
- 0x01,0x09,0x00,0x35,0x20,0x00,0x03,0x00,0x35,0x10,0x00,0x01,0x09,0x00,0x35,0x24,
- 0x00,0x03,0x00,0x35,0x20,0x00,0x01,0x09,0x00,0x35,0x28,0x00,0x03,0x00,0x35,0x24,
- 0x00,0x01,0x09,0x00,0x35,0x2c,0x00,0x03,0x00,0x35,0x28,0x00,0x01,0x09,0x00,0x35,
- 0x30,0x00,0x03,0x00,0x35,0x2c,0x00,0x01,0x09,0x00,0x35,0x40,0x00,0x03,0x00,0x35,
- 0x30,0x00,0x01,0x09,0x00,0x35,0x44,0x00,0x03,0x00,0x35,0x40,0x00,0x01,0x09,0x00,
- 0x35,0x48,0x00,0x03,0x00,0x35,0x44,0x00,0x01,0x09,0x00,0x35,0x4c,0x00,0x03,0x00,
- 0x35,0x48,0x00,0x01,0x09,0x00,0x35,0x50,0x00,0x03,0x00,0x35,0x4c,0x00,0x01,0x09,
- 0x00,0x35,0x80,0x00,0x03,0x00,0x35,0x50,0x00,0x01,0x09,0x00,0x35,0x84,0x00,0x03,
- 0x00,0x35,0x80,0x00,0x01,0x09,0x00,0x35,0x88,0x00,0x03,0x00,0x35,0x84,0x00,0x01,
- 0x09,0x00,0x35,0x8c,0x00,0x03,0x00,0x35,0x88,0x00,0x01,0x09,0x00,0x35,0x90,0x00,
- 0x03,0x00,0x35,0x8c,0x00,0x01,0x09,0x00,0x35,0xa0,0x00,0x03,0x00,0x35,0x90,0x00,
- 0x01,0x09,0x00,0x35,0xa4,0x00,0x03,0x00,0x35,0xa0,0x00,0x01,0x09,0x00,0x35,0xa8,
- 0x00,0x03,0x00,0x35,0xa4,0x00,0x01,0x09,0x00,0x35,0xac,0x00,0x03,0x00,0x35,0xa8,
- 0x00,0x01,0x09,0x00,0x35,0xb0,0x00,0x03,0x00,0x35,0xac,0x00,0x01,0x09,0x00,0x35,
- 0xc0,0x00,0x03,0x00,0x35,0xb0,0x00,0x01,0x09,0x00,0x35,0xc4,0x00,0x03,0x00,0x35,
- 0xc0,0x00,0x01,0x09,0x00,0x35,0xc8,0x00,0x03,0x00,0x35,0xc4,0x00,0x01,0x09,0x00,
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- 0x35,0xcc,0x00,0x01,0x09,0x00,0x35,0xd0,0x00,0x03,0x00,0x35,0xd0,0x00,0x01,0x04,
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- 0x00,0x00,
diff --git a/board/esd/pmc405/pmc405.c b/board/esd/pmc405/pmc405.c
deleted file mode 100644
index 33b5f774d5..0000000000
--- a/board/esd/pmc405/pmc405.c
+++ /dev/null
@@ -1,197 +0,0 @@
-/*
- * (C) Copyright 2001-2003
- * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/processor.h>
-#include <command.h>
-#include <malloc.h>
-
-
-extern void lxt971_no_sleep(void);
-
-
-/* fpga configuration data - not compressed, generated by bin2c */
-const unsigned char fpgadata[] =
-{
-#include "fpgadata.c"
-};
-int filesize = sizeof(fpgadata);
-
-
-int board_early_init_f (void)
-{
- /*
- * IRQ 0-15 405GP internally generated; active high; level sensitive
- * IRQ 16 405GP internally generated; active low; level sensitive
- * IRQ 17-24 RESERVED
- * IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive
- * IRQ 26 (EXT IRQ 1) SER0 ; active low; level sensitive
- * IRQ 27 (EXT IRQ 2) SER1; active low; level sensitive
- * IRQ 28 (EXT IRQ 3) FPGA 0; active low; level sensitive
- * IRQ 29 (EXT IRQ 4) FPGA 1; active low; level sensitive
- * IRQ 30 (EXT IRQ 5) PCI INTA; active low; level sensitive
- * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
- */
- mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
- mtdcr(uicer, 0x00000000); /* disable all ints */
- mtdcr(uiccr, 0x00000000); /* set all to be non-critical*/
- mtdcr(uicpr, 0xFFFFFF81); /* set int polarities */
- mtdcr(uictr, 0x10000000); /* set int trigger levels */
- mtdcr(uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority*/
- mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
-
- /*
- * EBC Configuration Register: set ready timeout to 512 ebc-clks -> ca. 15 us
- */
- mtebc (epcr, 0xa8400000);
-
- /*
- * Setup GPIO pins (CS6+CS7 as GPIO)
- */
- mtdcr(cntrl0, mfdcr(cntrl0) | 0x00300000);
-
- /*
- * Configure GPIO pins
- */
- out32(GPIO0_ODR, 0x00000000); /* no open drain pins */
- out32(GPIO0_TCR, CFG_FPGA_PRG | CFG_FPGA_CLK | CFG_FPGA_DATA); /* setup for output */
- out32(GPIO0_OR, 0); /* outputs -> low */
-
- return 0;
-}
-
-
-/* ------------------------------------------------------------------------- */
-
-int misc_init_f (void)
-{
- return 0; /* dummy implementation */
-}
-
-
-int misc_init_r (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- /* adjust flash start and offset */
- gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize;
- gd->bd->bi_flashoffset = 0;
-
- return (0);
-}
-
-
-/*
- * Check Board Identity:
- */
-
-int checkboard (void)
-{
- char str[64];
- int i = getenv_r ("serial#", str, sizeof(str));
-
- puts ("Board: ");
-
- if (i == -1) {
- puts ("### No HW ID - assuming PMC405");
- } else {
- puts(str);
- }
-
- putc ('\n');
-
- /*
- * Disable sleep mode in LXT971
- */
- lxt971_no_sleep();
-
- return 0;
-}
-
-/* ------------------------------------------------------------------------- */
-
-long int initdram (int board_type)
-{
- unsigned long val;
-
- mtdcr(memcfga, mem_mb0cf);
- val = mfdcr(memcfgd);
-
-#if 0
- printf("\nmb0cf=%x\n", val); /* test-only */
- printf("strap=%x\n", mfdcr(strap)); /* test-only */
-#endif
-
- return (4*1024*1024 << ((val & 0x000e0000) >> 17));
-}
-
-/* ------------------------------------------------------------------------- */
-
-int testdram (void)
-{
- /* TODO: XXX XXX XXX */
- printf ("test: 16 MB - ok\n");
-
- return (0);
-}
-
-/* ------------------------------------------------------------------------- */
-
-int do_cantest(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- ulong addr;
- volatile uchar *ptr;
- volatile uchar val;
- int i;
-
- addr = simple_strtol (argv[1], NULL, 16) + 0x16;
-
- i = 0;
- for (;;) {
- ptr = (uchar *)addr;
- for (i=0; i<8; i++) {
- *ptr = i;
- val = *ptr;
-
- if (val != i) {
- printf("ERROR: addr=%p write=0x%02X, read=0x%02X\n", ptr, i, val);
- return 0;
- }
-
- /* Abort if ctrl-c was pressed */
- if (ctrlc()) {
- puts("\nAbort\n");
- return 0;
- }
-
- ptr++;
- }
- }
-
- return 0;
-}
-U_BOOT_CMD(
- cantest, 3, 1, do_cantest,
- "cantest - Test CAN controller",
- NULL
- );
diff --git a/board/esd/pmc405/u-boot.lds b/board/esd/pmc405/u-boot.lds
deleted file mode 100644
index e84d69ebb7..0000000000
--- a/board/esd/pmc405/u-boot.lds
+++ /dev/null
@@ -1,149 +0,0 @@
-/*
- * (C) Copyright 2000, 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- .resetvec 0xFFFFFFFC :
- {
- *(.resetvec)
- } = 0xffff
-
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/ppc4xx/start.o (.text)
- cpu/ppc4xx/traps.o (.text)
- cpu/ppc4xx/interrupts.o (.text)
- cpu/ppc4xx/serial.o (.text)
- cpu/ppc4xx/cpu_init.o (.text)
- cpu/ppc4xx/speed.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/extable.o (.text)
- lib_generic/zlib.o (.text)
-
-/* . = env_offset;*/
-/* common/environment.o(.text)*/
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/esd/tasreg/Makefile b/board/esd/tasreg/Makefile
deleted file mode 100644
index e5d8446313..0000000000
--- a/board/esd/tasreg/Makefile
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# (C) Copyright 2000-2003
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/esd/tasreg/config.mk b/board/esd/tasreg/config.mk
deleted file mode 100644
index 69fd8b6b7c..0000000000
--- a/board/esd/tasreg/config.mk
+++ /dev/null
@@ -1,25 +0,0 @@
-#
-# (C) Copyright 2000-2003
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-# Coldfire contribution by Bernhard Kuhn <bkuhn@metrowerks.com>
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-TEXT_BASE = 0xffc00000
diff --git a/board/esd/tasreg/flash.c b/board/esd/tasreg/flash.c
deleted file mode 100644
index 13c07d2d33..0000000000
--- a/board/esd/tasreg/flash.c
+++ /dev/null
@@ -1,75 +0,0 @@
-/*
- * (C) Copyright 2001
- * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-/*#include <ppc4xx.h>*/
-#include <asm/processor.h>
-
-/*
- * include common flash code (for esd boards)
- */
-#include "../common/flash.c"
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (vu_long * addr, flash_info_t * info);
-static void flash_get_offsets (ulong base, flash_info_t * info);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- unsigned long size_b0;
- int i;
-
- /* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* Static FLASH Bank configuration here - FIXME XXX */
-
- size_b0 = flash_get_size((vu_long *)CFG_FLASH_BASE, &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size_b0, size_b0<<20);
- }
-
- /* Setup offsets */
- flash_get_offsets (-size_b0, &flash_info[0]);
-
- /* test-only: todo: Re-do sizing to get full correct info */
-
- /* Monitor protection ON by default */
- (void)flash_protect(FLAG_PROTECT_SET,
- CFG_FLASH_BASE,
- CFG_FLASH_BASE+CFG_MONITOR_LEN-1,
- &flash_info[0]);
-
- flash_info[0].size = size_b0;
-
- return (size_b0);
-}
diff --git a/board/esd/tasreg/fpgadata.c b/board/esd/tasreg/fpgadata.c
deleted file mode 100644
index 611b521e72..0000000000
--- a/board/esd/tasreg/fpgadata.c
+++ /dev/null
@@ -1,5331 +0,0 @@
- 0x1f,0x8b,0x08,0x08,0x5a,0x90,0xc1,0x41,0x00,0x03,0x72,0x61,0x73,0x72,0x65,0x67,
- 0x2e,0x62,0x69,0x74,0x00,0xac,0xfd,0x7d,0x78,0x14,0xd7,0x95,0x2e,0x8a,0xaf,0xde,
- 0xd5,0x88,0x52,0x57,0x4b,0x5d,0x96,0x48,0x0e,0xb1,0x19,0x5c,0x6a,0x09,0xd2,0xe0,
- 0x96,0xd4,0x6e,0xb0,0x90,0x65,0xd1,0x2a,0x04,0x33,0xa3,0x00,0x13,0x34,0x9e,0xdc,
- 0xf3,0x78,0xe6,0xe4,0xe6,0xd7,0xf6,0x90,0x0c,0x93,0x43,0x3c,0xc4,0xf1,0x9d,0x4b,
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- 0xab,0xa1,0xf8,0xf6,0x85,0x0d,0x0b,0x23,0x0d,0x0b,0xa3,0xf0,0x55,0x60,0x9b,0x97,
- 0x5d,0xc3,0x7f,0x9e,0x7d,0xea,0xff,0xfa,0x5a,0x04,0xb8,0x07,0x00,0xa6,0x47,0x3c,
- 0x71,0xfa,0xff,0x9b,0x22,0x1e,0xc3,0x03,0xbc,0xa9,0x3a,0x02,0x16,0xfd,0x37,0xd8,
- 0xd7,0x8b,0x23,0x60,0xb8,0xff,0xdb,0x13,0x01,0x13,0x5a,0xe1,0xa9,0x57,0xa0,0xcc,
- 0x80,0xff,0x9d,0x7f,0x3c,0xe0,0xe5,0xc2,0xf8,0x3f,0xf5,0x1c,0xf6,0xbf,0xf5,0x18,
- 0xfa,0x27,0xf5,0x7f,0xe8,0x39,0xfc,0xff,0xe8,0x73,0xca,0xff,0xb7,0x9f,0x63,0x89,
- 0x7f,0x97,0xfd,0xef,0x3e,0xc6,0xcb,0xe9,0xdf,0xd7,0xca,0xc0,0x07,0xf7,0x71,0x3d,
- 0x5d,0x14,0xf2,0xfc,0x00,0xbe,0xc6,0x3f,0x97,0x2e,0x5a,0x63,0x1b,0xde,0x35,0xee,
- 0x96,0x22,0xfe,0xb9,0xac,0x77,0x0d,0xcc,0x86,0x3f,0xe7,0x9e,0x34,0xac,0x97,0x46,
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- 0x93,0xd0,0x05,0x61,0x53,0x8d,0x30,0x30,0xba,0xf1,0x59,0x1a,0x30,0x0e,0x69,0x33,
- 0xa4,0xfb,0xb6,0x32,0x3f,0x7f,0x12,0xc2,0xd6,0x8a,0x08,0x3b,0x69,0xee,0xd6,0xc3,
- 0xd0,0xe1,0xc5,0xc1,0xe5,0x66,0xc8,0x3b,0xdf,0x43,0x06,0x18,0xfd,0xaa,0xde,0x1c,
- 0xf4,0x88,0xef,0x63,0x7d,0x66,0x1f,0x7d,0x9f,0xde,0x0e,0x68,0x0e,0xeb,0x3d,0x50,
- 0x63,0x6a,0x99,0xe0,0x3e,0x78,0x0e,0xe6,0x5b,0x2c,0xad,0x86,0x41,0x83,0x52,0x4b,
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- 0x6e,0x89,0x59,0xf8,0x45,0x42,0xc6,0x18,0xc4,0x58,0x80,0x2b,0x69,0x18,0x86,0x06,
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- 0x62,0xd7,0x61,0x34,0x77,0x1d,0xfc,0x7d,0xc9,0x0d,0x36,0xa2,0x03,0x46,0x58,0x2d,
- 0xe2,0x98,0x2e,0x85,0x0d,0x26,0x56,0x8b,0xfd,0x99,0xf8,0x1f,0x39,0xfa,0x9f,0xfd,
- 0x46,0xf6,0xf7,0x91,0x3d,0xed,0xe2,0x16,0xb2,0xdd,0x98,0xae,0xfd,0x69,0x86,0x28,
- 0xd8,0xbf,0x6b,0xfc,0x32,0xfd,0xef,0x18,0xce,0xfc,0x7c,0xd2,0xfd,0xf3,0x49,0x06,
- 0xb1,0xef,0x9f,0x49,0x21,0xe1,0x28,0xf9,0x47,0x32,0xd9,0xfc,0x93,0x8c,0x83,0xf2,
- 0x7f,0xe5,0xfb,0x4c,0x36,0xed,0x16,0x31,0x73,0x23,0xfe,0x09,0xb7,0x8d,0xe6,0xb4,
- 0x64,0x3e,0x7f,0xca,0xcd,0xa7,0x65,0xdf,0x85,0x38,0x3f,0xe6,0x1f,0x7b,0x59,0x7e,
- 0xdc,0xc7,0x9b,0xf9,0x2b,0x9e,0x1f,0x15,0xfa,0x53,0xae,0x92,0x75,0x45,0x83,0xfd,
- 0x2f,0xa4,0xff,0x57,0xaf,0x63,0x4d,0xd1,0x24,0xf3,0xbf,0x78,0x21,0x61,0xf8,0xbf,
- 0x78,0x81,0xff,0x43,0x9f,0xfa,0x2b,0x57,0xae,0x98,0x7f,0xba,0xf1,0xe9,0x75,0xfe,
- 0x5f,0xbe,0xce,0x04,0xdb,0xf1,0xff,0x8e,0xe1,0x5c,0xe7,0xbf,0xf8,0x5e,0xcd,0x5c,
- 0x67,0xdc,0x9e,0xfb,0x31,0x86,0x6b,0xa7,0x9e,0xe0,0xbd,0x4a,0xc8,0x7f,0xfe,0x5f,
- 0xb7,0x5c,0x08,0x32,0xd1,0xbe,0xfc,0xdf,0xb2,0x9b,0xfe,0xf7,0xee,0xcb,0xce,0x56,
- 0x3b,0x76,0x83,0xfe,0x24,0x23,0xeb,0xfb,0xfc,0x89,0x6f,0xfa,0xb1,0xfb,0x32,0xc1,
- 0x1d,0xf6,0xe8,0xf6,0x7f,0x9c,0x70,0xf3,0x5d,0x15,0x86,0x2e,0x97,0x31,0xf9,0x30,
- 0xeb,0x72,0x0f,0xce,0xfc,0xae,0xff,0xbe,0x7d,0x59,0xff,0xb8,0x5d,0x8f,0x4e,0xdc,
- 0x45,0xc6,0xdf,0x3f,0x0a,0xdb,0x97,0xc9,0xb8,0x3d,0x97,0xb7,0xb0,0x9b,0x64,0x7c,
- 0x97,0xc1,0xbb,0xfe,0x1b,0xf6,0xe5,0x8c,0xf1,0x5f,0xdb,0x97,0x33,0xc6,0x7f,0xf3,
- 0xfd,0x4c,0x32,0x01,0x91,0x3f,0xf1,0xc3,0xf3,0xe7,0xff,0xbb,0x3e,0x75,0x75,0xff,
- 0xc5,0x0b,0xf8,0x7c,0xff,0x2d,0xdf,0xe3,0xff,0xbb,0x9f,0xff,0xaf,0xed,0x3b,0x9f,
- 0x5e,0xe7,0x8f,0x5f,0xe7,0xbf,0xe7,0x13,0x22,0xba,0x20,0xb2,0xff,0x37,0x6d,0xf8,
- 0x3f,0x70,0xf9,0x4f,0x3f,0x9f,0x7e,0x3e,0xfd,0x7c,0xfa,0xf9,0xf4,0xf3,0xe9,0xe7,
- 0xd3,0xcf,0xa7,0x9f,0x4f,0x3f,0x9f,0x7e,0x3e,0xfd,0x7c,0xfa,0xf9,0xf4,0xf3,0xe9,
- 0xe7,0xd3,0xcf,0xa7,0x9f,0x4f,0x3f,0xff,0x7f,0xf8,0x61,0x67,0x4a,0x22,0x3b,0x53,
- 0xa2,0xff,0xbf,0xfe,0x2e,0x9f,0x7e,0x3e,0xfd,0x7c,0xfa,0xf9,0xf4,0xf3,0xe9,0xe7,
- 0xd3,0xcf,0xa7,0x9f,0x4f,0x3f,0x9f,0x7e,0x3e,0xfd,0x7c,0xfa,0xf9,0xf4,0xf3,0xe9,
- 0xe7,0xd3,0xcf,0xa7,0x9f,0x4f,0x3f,0x9f,0x7e,0xfe,0xcf,0x7e,0x42,0x04,0x53,0x21,
- 0x3d,0x7f,0x15,0x22,0x14,0x0b,0x2c,0xa4,0x10,0x31,0x8a,0xfe,0xfb,0xae,0xcd,0xae,
- 0x99,0x13,0x22,0x49,0x21,0xf3,0x6f,0xcd,0xbe,0x3c,0x76,0xdc,0xff,0x03,0xe6,0xeb,
- 0xaf,0xb2,0x8c,0x8c,0x02,0x00,
diff --git a/board/esd/tasreg/tasreg.c b/board/esd/tasreg/tasreg.c
deleted file mode 100644
index 16724005b7..0000000000
--- a/board/esd/tasreg/tasreg.c
+++ /dev/null
@@ -1,449 +0,0 @@
-/*
- * (C) Copyright 2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <command.h>
-#include <malloc.h>
-#include <asm/m5249.h>
-
-
-/* Prototypes */
-int gunzip(void *, int, unsigned char *, unsigned long *);
-int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
-int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len);
-int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len);
-
-
-#if 0
-#define FPGA_DEBUG
-#endif
-
-/* predefine these here for FPGA programming (before including fpga.c) */
-#define SET_FPGA(data) mbar2_writeLong(MCFSIM_GPIO1_OUT, data)
-#define FPGA_DONE_STATE (mbar2_readLong(MCFSIM_GPIO1_READ) & CFG_FPGA_DONE)
-#define FPGA_INIT_STATE (mbar2_readLong(MCFSIM_GPIO1_READ) & CFG_FPGA_INIT)
-#define FPGA_PROG_ACTIVE_HIGH /* on this platform is PROG active high! */
-#define out32(a,b) /* nothing to do (gpio already configured) */
-
-
-/* fpga configuration data - generated by bin2cc */
-const unsigned char fpgadata[] =
-{
-#include "fpgadata.c"
-};
-
-/*
- * include common fpga code (for esd boards)
- */
-#include "../common/fpga.c"
-
-
-int checkboard (void) {
- ulong val;
- uchar val8;
-
- puts ("Board: ");
- puts("esd TASREG");
- val8 = ((uchar)~((uchar)mbar2_readLong(MCFSIM_GPIO1_READ) >> 4)) & 0xf;
- printf(" (Switch=%1X)\n", val8);
-
- /*
- * Set LED on
- */
- val = mbar2_readLong(MCFSIM_GPIO1_OUT) & ~CFG_GPIO1_LED;
- mbar2_writeLong(MCFSIM_GPIO1_OUT, val); /* Set LED on */
-
- return 0;
-};
-
-
-long int initdram (int board_type) {
- unsigned long junk = 0xa5a59696;
-
- /*
- * Note:
- * RC = ([(RefreshTime/#rows) / (1/BusClk)] / 16) - 1
- */
-
-#ifdef CFG_FAST_CLK
- /*
- * Busclk=70MHz, RefreshTime=64ms, #rows=4096 (4K)
- * SO=1, NAM=0, COC=0, RTIM=01 (6clk refresh), RC=39
- */
- mbar_writeShort(MCFSIM_DCR, 0x8239);
-#elif CFG_PLL_BYPASS
- /*
- * Busclk=5.6448MHz, RefreshTime=64ms, #rows=8192 (8K)
- * SO=1, NAM=0, COC=0, RTIM=01 (6clk refresh), RC=02
- */
- mbar_writeShort(MCFSIM_DCR, 0x8202);
-#else
- /*
- * Busclk=36MHz, RefreshTime=64ms, #rows=4096 (4K)
- * SO=1, NAM=0, COC=0, RTIM=01 (6clk refresh), RC=22 (562 bus clock cycles)
- */
- mbar_writeShort(MCFSIM_DCR, 0x8222);
-#endif
-
- /*
- * SDRAM starts at 0x0000_0000, CASL=10, CBM=010, PS=10 (16bit port),
- * PM=1 (continuous page mode)
- */
-
- /* RE=0 (keep auto-refresh disabled while setting up registers) */
- mbar_writeLong(MCFSIM_DACR0, 0x00003324);
-
- /* BAM=007c (bits 22,21 are bank selects; 256kB blocks) */
- mbar_writeLong(MCFSIM_DMR0, 0x01fc0001);
-
- /** Precharge sequence **/
- mbar_writeLong(MCFSIM_DACR0, 0x0000332c); /* Set DACR0[IP] (bit 3) */
- *((volatile unsigned long *) 0x00) = junk; /* write to a memory location to init. precharge */
- udelay(0x10); /* Allow several Precharge cycles */
-
- /** Refresh Sequence **/
- mbar_writeLong(MCFSIM_DACR0, 0x0000b324); /* Enable the refresh bit, DACR0[RE] (bit 15) */
- udelay(0x7d0); /* Allow gobs of refresh cycles */
-
- /** Mode Register initialization **/
- mbar_writeLong(MCFSIM_DACR0, 0x0000b364); /* Enable DACR0[IMRS] (bit 6); RE remains enabled */
- *((volatile unsigned long *) 0x800) = junk; /* Access RAM to initialize the mode register */
-
- return CFG_SDRAM_SIZE * 1024 * 1024;
-};
-
-
-int testdram (void) {
- /* TODO: XXX XXX XXX */
- printf ("DRAM test not implemented!\n");
-
- return (0);
-}
-
-
-int misc_init_r (void)
-{
- unsigned char *dst;
- ulong len = sizeof(fpgadata);
- int status;
- int index;
- int i;
- uchar buf[8];
-
- dst = malloc(CFG_FPGA_MAX_SIZE);
- if (gunzip (dst, CFG_FPGA_MAX_SIZE, (uchar *)fpgadata, &len) != 0) {
- printf ("GUNZIP ERROR - must RESET board to recover\n");
- do_reset (NULL, 0, 0, NULL);
- }
-
- status = fpga_boot(dst, len);
- if (status != 0) {
- printf("\nFPGA: Booting failed ");
- switch (status) {
- case ERROR_FPGA_PRG_INIT_LOW:
- printf("(Timeout: INIT not low after asserting PROGRAM*)\n ");
- break;
- case ERROR_FPGA_PRG_INIT_HIGH:
- printf("(Timeout: INIT not high after deasserting PROGRAM*)\n ");
- break;
- case ERROR_FPGA_PRG_DONE:
- printf("(Timeout: DONE not high after programming FPGA)\n ");
- break;
- }
-
- /* display infos on fpgaimage */
- index = 15;
- for (i=0; i<4; i++) {
- len = dst[index];
- printf("FPGA: %s\n", &(dst[index+1]));
- index += len+3;
- }
- putc ('\n');
- /* delayed reboot */
- for (i=20; i>0; i--) {
- printf("Rebooting in %2d seconds \r",i);
- for (index=0;index<1000;index++)
- udelay(1000);
- }
- putc ('\n');
- do_reset(NULL, 0, 0, NULL);
- }
-
- puts("FPGA: ");
-
- /* display infos on fpgaimage */
- index = 15;
- for (i=0; i<4; i++) {
- len = dst[index];
- printf("%s ", &(dst[index+1]));
- index += len+3;
- }
- putc ('\n');
-
- free(dst);
-
- /*
- *
- */
- buf[0] = 0x00;
- buf[1] = 0x32;
- buf[2] = 0x3f;
- i2c_write(0x38, 0, 0, buf, 3);
-
- return (0);
-}
-
-
-#if 1 /* test-only: board specific test commands */
-int i2c_probe(uchar addr);
-
-/*
- */
-int do_iploop(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- ulong addr;
-
- if (argc < 2) {
- puts("ERROR!\n");
- return -1;
- }
-
- addr = simple_strtol (argv[1], NULL, 16);
-
- printf("iprobe looping on addr 0x%lx (cntrl-c aborts)...\n", addr);
-
- for (;;) {
- i2c_probe(addr);
-
- /* Abort if ctrl-c was pressed */
- if (ctrlc()) {
- puts("\nAbort\n");
- return 0;
- }
-
- udelay(1000);
- }
-
- return 0;
-}
-U_BOOT_CMD(
- iploop, 2, 1, do_iploop,
- "iploop - iprobe loop <addr>\n",
- NULL
- );
-
-/*
- */
-int do_codec(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- uchar buf[8];
-
- *(volatile ushort *)0xe0000000 = 0x4000;
-
- udelay(5000); /* wait for 5ms */
-
- buf[0] = 0x10;
- buf[1] = 0x07;
- buf[2] = 0x03;
- i2c_write(0x10, 0, 0, buf, 3);
-
- buf[0] = 0x10;
- buf[1] = 0x01;
- buf[2] = 0x80;
- i2c_write(0x10, 0, 0, buf, 3);
-
- buf[0] = 0x10;
- buf[1] = 0x02;
- buf[2] = 0x03;
- i2c_write(0x10, 0, 0, buf, 3);
-
- buf[0] = 0x10;
- buf[1] = 0x03;
- buf[2] = 0x29;
- i2c_write(0x10, 0, 0, buf, 3);
-
- buf[0] = 0x10;
- buf[1] = 0x04;
- buf[2] = 0x00;
- i2c_write(0x10, 0, 0, buf, 3);
-
- buf[0] = 0x10;
- buf[1] = 0x05;
- buf[2] = 0x00;
- i2c_write(0x10, 0, 0, buf, 3);
-
- buf[0] = 0x10;
- buf[1] = 0x07;
- buf[2] = 0x02;
- i2c_write(0x10, 0, 0, buf, 3);
-
- return 0;
-}
-U_BOOT_CMD(
- codec, 1, 1, do_codec,
- "codec - Enable codec\n",
- NULL
- );
-
-/*
- */
-int do_saa(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- ulong addr;
- ulong instr;
- ulong cntrl;
- ulong data;
- uchar buf[8];
-
- if (argc < 5) {
- puts("ERROR!\n");
- return -1;
- }
-
- addr = simple_strtol (argv[1], NULL, 16);
- instr = simple_strtol (argv[2], NULL, 16);
- cntrl = simple_strtol (argv[3], NULL, 16);
- data = simple_strtol (argv[4], NULL, 16);
-
- buf[0] = (uchar)instr;
- buf[1] = (uchar)cntrl;
- buf[2] = (uchar)data;
- i2c_write(addr, 0, 0, buf, 3);
-
- return 0;
-}
-U_BOOT_CMD(
- saa, 5, 1, do_saa,
- "saa - Write to SAA1064 <addr> <instr> <cntrl> <data>\n",
- NULL
- );
-
-/*
- */
-int do_iwrite(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- ulong addr;
- ulong data0;
- ulong data1;
- ulong data2;
- ulong data3;
- uchar buf[8];
- int cnt;
-
- if (argc < 3) {
- puts("ERROR!\n");
- return -1;
- }
-
- addr = simple_strtol (argv[1], NULL, 16);
- cnt = simple_strtol (argv[2], NULL, 16);
- data0 = simple_strtol (argv[3], NULL, 16);
- data1 = simple_strtol (argv[4], NULL, 16);
- data2 = simple_strtol (argv[5], NULL, 16);
- data3 = simple_strtol (argv[6], NULL, 16);
-
- printf("Writing %d bytes to device %lx!\n", cnt, addr);
- buf[0] = (uchar)data0;
- buf[1] = (uchar)data1;
- buf[2] = (uchar)data2;
- buf[3] = (uchar)data3;
- i2c_write(addr, 0, 0, buf, cnt);
-
- return 0;
-}
-U_BOOT_CMD(
- iwrite, 6, 1, do_iwrite,
- "iwrite - Write n bytes to I2C-device\n",
- "addr cnt data0 ... datan\n"
- );
-
-/*
- */
-int do_iread(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- ulong addr;
- ulong cnt;
- uchar buf[32];
- int i;
-
- if (argc < 3) {
- puts("ERROR!\n");
- return -1;
- }
-
- addr = simple_strtol (argv[1], NULL, 16);
- cnt = simple_strtol (argv[2], NULL, 16);
-
- i2c_read(addr, 0, 0, buf, cnt);
- printf("I2C Data:");
- for (i=0; i<cnt; i++) {
- printf(" %02X", buf[i]);
- }
- printf("\n");
-
- return 0;
-}
-U_BOOT_CMD(
- iread, 3, 1, do_iread,
- "iread - Read from I2C <addr> <cnt>\n",
- NULL
- );
-
-/*
- */
-int do_ireadl(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- ulong addr;
- uchar buf[32];
- int cnt;
-
- if (argc < 2) {
- puts("ERROR!\n");
- return -1;
- }
-
- addr = simple_strtol (argv[1], NULL, 16);
- cnt = 1;
-
- printf("iread looping on addr 0x%lx (cntrl-c aborts)...\n", addr);
-
- for (;;) {
- i2c_read(addr, 0, 0, buf, cnt);
-
- /* Abort if ctrl-c was pressed */
- if (ctrlc()) {
- puts("\nAbort\n");
- return 0;
- }
-
- udelay(3000);
- }
-
- return 0;
-}
-U_BOOT_CMD(
- ireadl, 2, 1, do_ireadl,
- "ireadl - Read-loop from I2C <addr>\n",
- NULL
- );
-#endif
diff --git a/board/esd/tasreg/u-boot.lds b/board/esd/tasreg/u-boot.lds
deleted file mode 100644
index a803b1cbad..0000000000
--- a/board/esd/tasreg/u-boot.lds
+++ /dev/null
@@ -1,146 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(m68k)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mcf52x2/start.o (.text)
- lib_m68k/traps.o (.text)
- cpu/mcf52x2/interrupts.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/zlib.o (.text)
-
- . = DEFINED(env_offset) ? env_offset : .;
- common/environment.o (.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
-
- .reloc :
- {
- __got_start = .;
- *(.got)
- __got_end = .;
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- _sbss = .;
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- . = ALIGN(4);
- _ebss = .;
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/esd/voh405/Makefile b/board/esd/voh405/Makefile
deleted file mode 100644
index a60495a59a..0000000000
--- a/board/esd/voh405/Makefile
+++ /dev/null
@@ -1,46 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o ../common/misc.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/esd/voh405/config.mk b/board/esd/voh405/config.mk
deleted file mode 100644
index 219a4eba15..0000000000
--- a/board/esd/voh405/config.mk
+++ /dev/null
@@ -1,28 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# esd VOH405 boards
-#
-
-TEXT_BASE = 0xFFF80000
diff --git a/board/esd/voh405/flash.c b/board/esd/voh405/flash.c
deleted file mode 100644
index 89af1190a8..0000000000
--- a/board/esd/voh405/flash.c
+++ /dev/null
@@ -1,101 +0,0 @@
-/*
- * (C) Copyright 2001
- * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <ppc4xx.h>
-#include <asm/processor.h>
-
-/*
- * include common flash code (for esd boards)
- */
-#include "../common/flash.c"
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (vu_long * addr, flash_info_t * info);
-static void flash_get_offsets (ulong base, flash_info_t * info);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- unsigned long size_b0;
- int i;
- uint pbcr;
- unsigned long base_b0;
- int size_val = 0;
-
- /* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* Static FLASH Bank configuration here - FIXME XXX */
-
- size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size_b0, size_b0<<20);
- }
-
- /* Setup offsets */
- flash_get_offsets (-size_b0, &flash_info[0]);
-
- /* Re-do sizing to get full correct info */
- mtdcr(ebccfga, pb0cr);
- pbcr = mfdcr(ebccfgd);
- mtdcr(ebccfga, pb0cr);
- base_b0 = -size_b0;
- switch (size_b0) {
- case 1 << 20:
- size_val = 0;
- break;
- case 2 << 20:
- size_val = 1;
- break;
- case 4 << 20:
- size_val = 2;
- break;
- case 8 << 20:
- size_val = 3;
- break;
- case 16 << 20:
- size_val = 4;
- break;
- }
- pbcr = (pbcr & 0x0001ffff) | base_b0 | (size_val << 17);
- mtdcr(ebccfgd, pbcr);
-
- /* Monitor protection ON by default */
- (void)flash_protect(FLAG_PROTECT_SET,
- -CFG_MONITOR_LEN,
- 0xffffffff,
- &flash_info[0]);
-
- flash_info[0].size = size_b0;
-
- return (size_b0);
-}
diff --git a/board/esd/voh405/fpgadata.c b/board/esd/voh405/fpgadata.c
deleted file mode 100644
index 02c94a24b4..0000000000
--- a/board/esd/voh405/fpgadata.c
+++ /dev/null
@@ -1,2011 +0,0 @@
- 0x1f,0x8b,0x08,0x08,0x38,0x6c,0x35,0x42,0x00,0x03,0x76,0x6f,0x68,0x34,0x30,0x35,
- 0x5f,0x31,0x5f,0x30,0x33,0x2e,0x62,0x69,0x74,0x00,0xed,0xfd,0x7d,0x7c,0x1c,0xd5,
- 0x91,0x2f,0x8c,0x57,0x9f,0x6e,0xc9,0xad,0xe9,0x91,0xa6,0xf5,0x62,0x22,0x40,0x98,
- 0xd6,0x48,0x98,0x41,0x19,0x49,0x63,0xc9,0x18,0x63,0xcc,0xa8,0x2d,0x09,0x22,0x6c,
- 0x07,0x4f,0x80,0xcd,0xfa,0x66,0xb9,0xd9,0x31,0xf1,0x66,0xbd,0xfb,0x73,0xb8,0x82,
- 0xe4,0xd9,0x75,0x72,0xb3,0xe4,0x68,0x24,0xdb,0x23,0xcb,0xc1,0x83,0x71,0x88,0x20,
- 0xde,0xec,0xd8,0x78,0x89,0x21,0x4e,0xee,0x58,0x36,0x20,0x63,0x16,0x5a,0x46,0x80,
- 0x6c,0x8c,0x51,0x58,0x27,0xeb,0x10,0x42,0xc6,0x44,0x21,0x82,0x18,0x22,0x8c,0x49,
- 0xe4,0xf7,0xe7,0xd4,0xe9,0x97,0xe9,0x99,0x91,0xd9,0xcd,0xbd,0xf7,0x79,0xee,0x7e,
- 0x7e,0x8f,0x27,0x7f,0xa4,0xe8,0x39,0x6e,0xf5,0xa9,0x39,0x5d,0xf5,0x3d,0x55,0xdf,
- 0xaa,0x03,0x45,0xbe,0x09,0xf3,0x7f,0x00,0xc2,0x32,0x50,0xff,0xee,0xbf,0xad,0x98,
- 0x1d,0xba,0xf6,0x2f,0x67,0xfd,0x65,0xa8,0xb9,0xe1,0xee,0x2f,0x2d,0x87,0xbb,0x40,
- 0x69,0xfa,0xea,0xb5,0xa1,0xbf,0xfa,0xda,0x3d,0xb3,0x66,0xcf,0x86,0x2f,0xb1,0xff,
- 0x0a,0x85,0xae,0x6d,0x0c,0x35,0x37,0xce,0x9a,0x0d,0xcb,0xa1,0x68,0xd6,0xac,0x79,
- 0xb3,0xaf,0x9f,0xd7,0x34,0x17,0xfe,0x0a,0x84,0xe6,0x6d,0xe7,0xd9,0xe7,0x89,0x87,
- 0xff,0xec,0xcb,0x21,0xa0,0x02,0x00,0x4c,0x0b,0x09,0x51,0xfc,0x7f,0x25,0x24,0x68,
- 0x02,0xd0,0x96,0xfa,0x10,0x18,0xf8,0xdf,0x60,0x7d,0x5f,0x14,0x02,0xcd,0xfd,0xdf,
- 0x42,0x08,0x74,0x88,0x80,0xbe,0x5e,0x2d,0x83,0x7f,0xff,0x23,0xe8,0x12,0xb5,0xe5,
- 0x3f,0x71,0xfc,0xf9,0x03,0xf4,0x82,0xc3,0x32,0x9f,0x96,0xe3,0x49,0x4b,0x52,0x49,
- 0xe8,0x3f,0x72,0x7f,0xb0,0xef,0xfa,0xfb,0x37,0xfe,0x43,0xf7,0xff,0x83,0x7d,0xff,
- 0x3f,0x75,0x3c,0xa8,0xff,0x81,0xe1,0x00,0x92,0xf3,0x3c,0xaa,0xa0,0x41,0x07,0x14,
- 0x82,0x40,0x21,0x0a,0x95,0x17,0x10,0x5a,0x86,0xed,0xf1,0x86,0x70,0x0e,0xce,0xd3,
- 0x96,0x03,0xbe,0x81,0xee,0x7b,0xe1,0x1c,0x84,0xf5,0xe2,0x09,0xf1,0x3e,0xf5,0x4d,
- 0xb5,0x45,0xf3,0xbd,0x24,0x1e,0x87,0x33,0xb4,0xb9,0xd2,0xbb,0x4f,0x0c,0x41,0xa7,
- 0x3d,0x3e,0xfe,0x63,0xd8,0x4b,0x1b,0x26,0x94,0x13,0x7d,0x7e,0x58,0x67,0x34,0xec,
- 0xf3,0x9c,0x28,0xab,0xad,0xe8,0x8d,0x34,0x68,0x4a,0x8c,0xbc,0x03,0x83,0xd4,0x2f,
- 0xcb,0xb1,0x7d,0xa1,0x5a,0x5b,0x8b,0x23,0xd2,0x7a,0xd8,0x05,0x41,0x43,0x69,0x22,
- 0x00,0x03,0x0b,0x82,0x23,0x97,0xce,0x22,0x2b,0x20,0xa1,0xad,0xd4,0x94,0x42,0x62,
- 0xc0,0x20,0x68,0x95,0x72,0x39,0x69,0x02,0xcd,0xbe,0xbf,0xb4,0x03,0xf6,0x42,0x83,
- 0xa1,0xa4,0x88,0x46,0xd7,0x91,0x86,0xb4,0x27,0x45,0x02,0x6a,0x3c,0x7e,0xab,0xae,
- 0xc4,0x49,0x5a,0xdf,0x43,0xfd,0x9a,0xdc,0x4f,0x42,0x92,0xfd,0x3c,0x37,0x4d,0x3f,
- 0x06,0xa7,0xd9,0x78,0x5f,0xaa,0xcd,0x0f,0xa7,0x92,0xe1,0x0f,0x8b,0x53,0x0b,0x16,
- 0xc3,0x11,0x63,0x86,0xe0,0x7b,0x44,0x4c,0xc3,0x84,0x36,0xb0,0xc2,0xbb,0x5e,0x54,
- 0xdb,0xed,0xf1,0x49,0xe1,0x59,0x78,0x1e,0xae,0x64,0xe3,0xd9,0x77,0x1f,0x24,0xc2,
- 0x86,0x38,0xe1,0x3f,0xc1,0xee,0xd0,0xa2,0xfa,0xa8,0x78,0x02,0x35,0x00,0xbe,0x44,
- 0xdb,0x38,0xd3,0x94,0xf9,0x19,0x55,0x77,0xb0,0x6f,0xc3,0x86,0x2f,0x24,0x26,0xd5,
- 0x53,0xd0,0x34,0x5a,0x9c,0x12,0x8f,0xc1,0x49,0x68,0xea,0xf2,0x25,0x6f,0x0f,0x56,
- 0x8f,0xab,0xe1,0x98,0x77,0x4b,0x77,0x48,0xb2,0x9f,0x7f,0xa4,0x20,0xa8,0xee,0x85,
- 0x46,0x43,0x99,0x28,0x9b,0x16,0x5f,0x07,0x73,0x0c,0x79,0x82,0x1c,0x83,0x3d,0x11,
- 0xbf,0xa1,0xac,0xf6,0x37,0xb0,0xaf,0x1a,0x64,0x39,0x41,0xe6,0xb0,0xd5,0x6f,0xcf,
- 0x77,0x31,0x3c,0x08,0xb5,0x86,0x12,0x22,0x14,0x06,0x88,0xdf,0x90,0x53,0x64,0x31,
- 0x0c,0xa8,0x01,0x43,0x09,0x10,0x05,0x1e,0x1d,0x69,0x48,0xca,0xdb,0x0b,0x57,0xb1,
- 0x77,0xc5,0xfc,0x4c,0xc0,0x17,0xe1,0x69,0x5a,0x9f,0x56,0x56,0x91,0x32,0xf8,0x76,
- 0xe2,0xaa,0xb4,0xbc,0xaa,0xf0,0x67,0xb0,0x1b,0xaf,0x2c,0x25,0x33,0x54,0xf6,0x55,
- 0x54,0x5e,0x4a,0xee,0x73,0xee,0xdf,0x01,0x8b,0xd5,0x8f,0x60,0xbe,0xe1,0x9b,0x2b,
- 0x52,0xf8,0x50,0x0d,0x4d,0x7a,0x43,0xe2,0x08,0x9d,0x60,0x8a,0xf7,0x95,0xf6,0x41,
- 0xf2,0x2e,0x98,0xaf,0x7b,0x0b,0xc5,0xdb,0x88,0xbd,0x90,0xf4,0x2b,0x9e,0x85,0xf3,
- 0xd0,0xc2,0xf4,0xd3,0x35,0xaa,0x7f,0x58,0x1a,0x8e,0x97,0xec,0x14,0x27,0xe1,0x8c,
- 0xda,0x7c,0x87,0xef,0x27,0xe2,0x04,0x7e,0xd5,0xbe,0x61,0x54,0x4c,0x14,0xda,0xfa,
- 0x91,0x81,0xeb,0x67,0xcc,0x3b,0xd0,0x0d,0xf0,0x06,0x0d,0xa5,0xbd,0xbb,0xbb,0x83,
- 0x6c,0x58,0xd3,0x88,0x6f,0x42,0x7c,0x0f,0xf6,0xb7,0x37,0x1a,0xde,0xb4,0xe8,0x71,
- 0x7e,0xdf,0x91,0xca,0xcd,0xf0,0x34,0xd4,0x8f,0x14,0xdf,0x2b,0x26,0xe0,0xa7,0x50,
- 0x6d,0x14,0xfc,0x9d,0x78,0x07,0xfb,0x45,0xaa,0x47,0x94,0x08,0x79,0xd3,0xf8,0xc1,
- 0x8a,0x46,0x5d,0x1e,0x25,0x4d,0x8e,0x3e,0x35,0xf8,0x3e,0x9b,0x6f,0x30,0x5d,0xf4,
- 0x0d,0xcf,0x57,0xe1,0x01,0x5a,0x93,0xee,0x58,0x55,0xf8,0x45,0x78,0x92,0x56,0x6f,
- 0x63,0x1a,0x38,0xb7,0xa0,0x27,0x5e,0x9f,0x8e,0xaf,0x20,0xaa,0x73,0xff,0x15,0xd6,
- 0x7a,0x2b,0x4a,0x91,0x0d,0xf0,0x80,0xa0,0x19,0x0f,0xa7,0xc8,0x57,0xe8,0x9e,0x94,
- 0x96,0x56,0xfe,0x91,0x1c,0xa4,0x8f,0x42,0xf0,0x2e,0xf9,0x32,0x4f,0x99,0x73,0xff,
- 0xf1,0xe9,0xe3,0xc2,0x29,0x08,0xd3,0xe2,0xa4,0xb8,0x0a,0xde,0x92,0x76,0xd1,0x91,
- 0xa4,0xf8,0x75,0x38,0xa7,0x0f,0xc4,0x7c,0x63,0xe2,0x7b,0xda,0x01,0x68,0x19,0x0c,
- 0xbe,0x27,0xce,0x93,0xec,0xf9,0x76,0x08,0x49,0x98,0x84,0xb0,0xe0,0xa3,0x35,0x28,
- 0xdc,0xe7,0xf5,0xd1,0xdb,0xd3,0x15,0x93,0x7a,0x58,0xf5,0xad,0xa9,0x39,0x5a,0x39,
- 0xd9,0x1a,0x86,0x0d,0x3d,0xe2,0xeb,0x60,0xaf,0x7f,0x59,0xdd,0xc6,0x56,0x4b,0x58,
- 0xf7,0x25,0xca,0x67,0x26,0x2d,0xa1,0x16,0xf6,0x43,0x53,0x74,0x43,0x7f,0x73,0xad,
- 0x7a,0x12,0xe6,0x47,0xbd,0xa5,0x22,0x91,0xec,0xf1,0x54,0x5a,0xce,0xc6,0x37,0xe8,
- 0x8b,0x12,0xa4,0xa7,0xac,0x97,0x09,0x25,0x09,0xb2,0x0d,0x7a,0x75,0xff,0x4b,0x4a,
- 0xbf,0x27,0x48,0xf7,0xea,0x0d,0x2b,0xd8,0xfa,0xd7,0x1c,0xb3,0x30,0xb7,0xa0,0x16,
- 0x1e,0x66,0xc3,0x2e,0x4f,0x90,0xab,0xc8,0xe3,0x4c,0x50,0x12,0x85,0xb5,0xd0,0x1b,
- 0xdd,0xaa,0x2b,0x0f,0x90,0xda,0xf8,0x1e,0xda,0x70,0x13,0x5b,0x6f,0x85,0xce,0x7a,
- 0xd0,0x2a,0x24,0xd8,0x02,0x41,0x5d,0xa9,0xf0,0x6c,0x83,0x2e,0x08,0x46,0x94,0x8a,
- 0xc2,0xd5,0xd0,0xb5,0x40,0xd3,0x95,0xd9,0x4d,0x12,0xec,0x64,0x57,0xe4,0xd9,0x04,
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- 0x02,0x6d,0x1a,0x19,0x81,0x26,0xf0,0xd1,0x36,0x0d,0x98,0xea,0x20,0x48,0x95,0x19,
- 0xa2,0xbd,0x3e,0xfb,0xa7,0xf3,0xf9,0x46,0x7c,0x9b,0xca,0x4f,0xc0,0xd9,0xd6,0x96,
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diff --git a/board/esd/voh405/logo_320_240_4bpp.c b/board/esd/voh405/logo_320_240_4bpp.c
deleted file mode 100644
index e9f8cb4002..0000000000
--- a/board/esd/voh405/logo_320_240_4bpp.c
+++ /dev/null
@@ -1,77 +0,0 @@
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diff --git a/board/esd/voh405/logo_640_480_24bpp.c b/board/esd/voh405/logo_640_480_24bpp.c
deleted file mode 100644
index 7d3c7a3a94..0000000000
--- a/board/esd/voh405/logo_640_480_24bpp.c
+++ /dev/null
@@ -1,1722 +0,0 @@
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- 0xb6,0xcd,0x09,0x36,0x05,0xbd,0xe6,0x21,0xd3,0x4b,0x04,0x00,0x00,0x00,0x42,0x07,
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- 0x0f,0x36,0x10,0x0e,0x00,
diff --git a/board/esd/voh405/u-boot.lds b/board/esd/voh405/u-boot.lds
deleted file mode 100644
index 43f776579e..0000000000
--- a/board/esd/voh405/u-boot.lds
+++ /dev/null
@@ -1,151 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- .resetvec 0xFFFFFFFC :
- {
- *(.resetvec)
- } = 0xffff
-
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/ppc4xx/start.o (.text)
- cpu/ppc4xx/traps.o (.text)
- cpu/ppc4xx/interrupts.o (.text)
- cpu/ppc4xx/serial.o (.text)
- cpu/ppc4xx/cpu_init.o (.text)
- cpu/ppc4xx/speed.o (.text)
- cpu/ppc4xx/4xx_enet.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/extable.o (.text)
- lib_generic/zlib.o (.text)
-
-/* . = env_offset;*/
-/* common/environment.o(.text)*/
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/esd/voh405/voh405.c b/board/esd/voh405/voh405.c
deleted file mode 100644
index eda3fd9d9d..0000000000
--- a/board/esd/voh405/voh405.c
+++ /dev/null
@@ -1,356 +0,0 @@
-/*
- * (C) Copyright 2001-2004
- * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/processor.h>
-#include <command.h>
-#include <malloc.h>
-
-/* ------------------------------------------------------------------------- */
-
-#if 0
-#define FPGA_DEBUG
-#endif
-
-extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
-extern void lxt971_no_sleep(void);
-
-/* fpga configuration data - gzip compressed and generated by bin2c */
-const unsigned char fpgadata[] =
-{
-#include "fpgadata.c"
-};
-
-/*
- * include common fpga code (for esd boards)
- */
-#include "../common/fpga.c"
-
-
-/* Prototypes */
-int gunzip(void *, int, unsigned char *, unsigned long *);
-
-
-/* logo bitmap data - gzip compressed and generated by bin2c */
-unsigned char logo_bmp_320[] =
-{
-#include "logo_320_240_4bpp.c"
-};
-
-unsigned char logo_bmp_640[] =
-{
-#include "logo_640_480_24bpp.c"
-};
-
-
-/*
- * include common lcd code (for esd boards)
- */
-#include "../common/lcd.c"
-
-#include "../common/s1d13704_320_240_4bpp.h"
-#include "../common/s1d13806_320_240_4bpp.h"
-#include "../common/s1d13806_640_480_16bpp.h"
-
-
-int board_early_init_f (void)
-{
- /*
- * IRQ 0-15 405GP internally generated; active high; level sensitive
- * IRQ 16 405GP internally generated; active low; level sensitive
- * IRQ 17-24 RESERVED
- * IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive
- * IRQ 26 (EXT IRQ 1) SER0 ; active low; level sensitive
- * IRQ 27 (EXT IRQ 2) SER1; active low; level sensitive
- * IRQ 28 (EXT IRQ 3) FPGA 0; active low; level sensitive
- * IRQ 29 (EXT IRQ 4) FPGA 1; active low; level sensitive
- * IRQ 30 (EXT IRQ 5) PCI INTA; active low; level sensitive
- * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
- */
- mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
- mtdcr(uicer, 0x00000000); /* disable all ints */
- mtdcr(uiccr, 0x00000000); /* set all to be non-critical*/
- mtdcr(uicpr, 0xFFFFFFB5); /* set int polarities */
- mtdcr(uictr, 0x10000000); /* set int trigger levels */
- mtdcr(uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority*/
- mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
-
- /*
- * EBC Configuration Register: set ready timeout to 512 ebc-clks -> ca. 15 us
- */
- mtebc (epcr, 0xa8400000); /* ebc always driven */
-
- return 0;
-}
-
-
-int misc_init_f (void)
-{
- return 0; /* dummy implementation */
-}
-
-
-int misc_init_r (void)
-{
- volatile unsigned char *duart0_mcr = (unsigned char *)((ulong)DUART0_BA + 4);
- volatile unsigned char *duart1_mcr = (unsigned char *)((ulong)DUART1_BA + 4);
- volatile unsigned short *lcd_contrast =
- (unsigned short *)((ulong)CFG_FPGA_BASE_ADDR + CFG_FPGA_CTRL + 4);
- volatile unsigned short *lcd_backlight =
- (unsigned short *)((ulong)CFG_FPGA_BASE_ADDR + CFG_FPGA_CTRL + 6);
- unsigned char *dst;
- ulong len = sizeof(fpgadata);
- int status;
- int index;
- int i;
- char *str;
-
- dst = malloc(CFG_FPGA_MAX_SIZE);
- if (gunzip (dst, CFG_FPGA_MAX_SIZE, (uchar *)fpgadata, &len) != 0) {
- printf ("GUNZIP ERROR - must RESET board to recover\n");
- do_reset (NULL, 0, 0, NULL);
- }
-
- status = fpga_boot(dst, len);
- if (status != 0) {
- printf("\nFPGA: Booting failed ");
- switch (status) {
- case ERROR_FPGA_PRG_INIT_LOW:
- printf("(Timeout: INIT not low after asserting PROGRAM*)\n ");
- break;
- case ERROR_FPGA_PRG_INIT_HIGH:
- printf("(Timeout: INIT not high after deasserting PROGRAM*)\n ");
- break;
- case ERROR_FPGA_PRG_DONE:
- printf("(Timeout: DONE not high after programming FPGA)\n ");
- break;
- }
-
- /* display infos on fpgaimage */
- index = 15;
- for (i=0; i<4; i++) {
- len = dst[index];
- printf("FPGA: %s\n", &(dst[index+1]));
- index += len+3;
- }
- putc ('\n');
- /* delayed reboot */
- for (i=20; i>0; i--) {
- printf("Rebooting in %2d seconds \r",i);
- for (index=0;index<1000;index++)
- udelay(1000);
- }
- putc ('\n');
- do_reset(NULL, 0, 0, NULL);
- }
-
- puts("FPGA: ");
-
- /* display infos on fpgaimage */
- index = 15;
- for (i=0; i<4; i++) {
- len = dst[index];
- printf("%s ", &(dst[index+1]));
- index += len+3;
- }
- putc ('\n');
-
- free(dst);
-
- /*
- * Reset FPGA via FPGA_INIT pin
- */
- out32(GPIO0_TCR, in32(GPIO0_TCR) | FPGA_INIT); /* setup FPGA_INIT as output */
- out32(GPIO0_OR, in32(GPIO0_OR) & ~FPGA_INIT); /* reset low */
- udelay(1000); /* wait 1ms */
- out32(GPIO0_OR, in32(GPIO0_OR) | FPGA_INIT); /* reset high */
- udelay(1000); /* wait 1ms */
-
- /*
- * Reset external DUARTs
- */
- out32(GPIO0_OR, in32(GPIO0_OR) | CFG_DUART_RST); /* set reset to high */
- udelay(10); /* wait 10us */
- out32(GPIO0_OR, in32(GPIO0_OR) & ~CFG_DUART_RST); /* set reset to low */
- udelay(1000); /* wait 1ms */
-
- /*
- * Set NAND-FLASH GPIO signals to default
- */
- out32(GPIO0_OR, in32(GPIO0_OR) & ~(CFG_NAND_CLE | CFG_NAND_ALE));
- out32(GPIO0_OR, in32(GPIO0_OR) | CFG_NAND_CE);
-
- /*
- * Enable interrupts in exar duart mcr[3]
- */
- *duart0_mcr = 0x08;
- *duart1_mcr = 0x08;
-
- /*
- * Init lcd interface and display logo
- */
- str = getenv("bd_type");
- if (strcmp(str, "voh405_bw") == 0) {
- lcd_setup(0, 1);
- lcd_init((uchar *)CFG_LCD_SMALL_REG, (uchar *)CFG_LCD_SMALL_MEM,
- regs_13704_320_240_4bpp,
- sizeof(regs_13704_320_240_4bpp)/sizeof(regs_13704_320_240_4bpp[0]),
- logo_bmp_320, sizeof(logo_bmp_320));
- } else if (strcmp(str, "voh405_bwbw") == 0) {
- lcd_setup(0, 1);
- lcd_init((uchar *)CFG_LCD_SMALL_REG, (uchar *)CFG_LCD_SMALL_MEM,
- regs_13704_320_240_4bpp,
- sizeof(regs_13704_320_240_4bpp)/sizeof(regs_13704_320_240_4bpp[0]),
- logo_bmp_320, sizeof(logo_bmp_320));
- lcd_setup(1, 1);
- lcd_init((uchar *)CFG_LCD_BIG_REG, (uchar *)CFG_LCD_BIG_MEM,
- regs_13806_320_240_4bpp,
- sizeof(regs_13806_320_240_4bpp)/sizeof(regs_13806_320_240_4bpp[0]),
- logo_bmp_320, sizeof(logo_bmp_320));
- } else if (strcmp(str, "voh405_bwc") == 0) {
- lcd_setup(0, 1);
- lcd_init((uchar *)CFG_LCD_SMALL_REG, (uchar *)CFG_LCD_SMALL_MEM,
- regs_13704_320_240_4bpp,
- sizeof(regs_13704_320_240_4bpp)/sizeof(regs_13704_320_240_4bpp[0]),
- logo_bmp_320, sizeof(logo_bmp_320));
- lcd_setup(1, 0);
- lcd_init((uchar *)CFG_LCD_BIG_REG, (uchar *)CFG_LCD_BIG_MEM,
- regs_13806_640_480_16bpp,
- sizeof(regs_13806_640_480_16bpp)/sizeof(regs_13806_640_480_16bpp[0]),
- logo_bmp_640, sizeof(logo_bmp_640));
- } else {
- printf("Unsupported bd_type defined (%s) -> No display configured!\n", str);
- return 0;
- }
-
- /*
- * Set invert bit in small lcd controller
- */
- *(unsigned char *)(CFG_LCD_SMALL_REG + 2) |= 0x01;
-
- /*
- * Set default contrast voltage on epson vga controller
- */
- *lcd_contrast = 0x4646;
-
- /*
- * Enable backlight
- */
- *lcd_backlight = 0xffff;
-
- return (0);
-}
-
-
-/*
- * Check Board Identity:
- */
-
-int checkboard (void)
-{
- char str[64];
- int i = getenv_r ("serial#", str, sizeof(str));
-
- puts ("Board: ");
-
- if (i == -1) {
- puts ("### No HW ID - assuming VOH405");
- } else {
- puts(str);
- }
-
- if (getenv_r("bd_type", str, sizeof(str)) != -1) {
- printf(" (%s)", str);
- } else {
- puts(" (Missing bd_type!)");
- }
-
- putc ('\n');
-
- /*
- * Disable sleep mode in LXT971
- */
- lxt971_no_sleep();
-
- return 0;
-}
-
-/* ------------------------------------------------------------------------- */
-
-long int initdram (int board_type)
-{
- unsigned long val;
-
- mtdcr(memcfga, mem_mb0cf);
- val = mfdcr(memcfgd);
-
-#if 0
- printf("\nmb0cf=%x\n", val); /* test-only */
- printf("strap=%x\n", mfdcr(strap)); /* test-only */
-#endif
-
- return (4*1024*1024 << ((val & 0x000e0000) >> 17));
-}
-
-/* ------------------------------------------------------------------------- */
-
-int testdram (void)
-{
- /* TODO: XXX XXX XXX */
- printf ("test: 16 MB - ok\n");
-
- return (0);
-}
-
-/* ------------------------------------------------------------------------- */
-
-#ifdef CONFIG_IDE_RESET
-void ide_set_reset(int on)
-{
- volatile unsigned short *fpga_mode =
- (unsigned short *)((ulong)CFG_FPGA_BASE_ADDR + CFG_FPGA_CTRL);
-
- /*
- * Assert or deassert CompactFlash Reset Pin
- */
- if (on) { /* assert RESET */
- *fpga_mode &= ~(CFG_FPGA_CTRL_CF_RESET);
- } else { /* release RESET */
- *fpga_mode |= CFG_FPGA_CTRL_CF_RESET;
- }
-}
-#endif /* CONFIG_IDE_RESET */
-
-
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
-#include <linux/mtd/nand.h>
-extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
-
-void nand_init(void)
-{
- nand_probe(CFG_NAND_BASE);
- if (nand_dev_desc[0].ChipID != NAND_ChipID_UNKNOWN) {
- print_size(nand_dev_desc[0].totlen, "\n");
- }
-}
-#endif
diff --git a/board/esd/vom405/Makefile b/board/esd/vom405/Makefile
deleted file mode 100644
index a11ee82aa2..0000000000
--- a/board/esd/vom405/Makefile
+++ /dev/null
@@ -1,51 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-# Objects for Xilinx JTAG programming (CPLD)
-CPLD = ../common/xilinx_jtag/lenval.o \
- ../common/xilinx_jtag/micro.o \
- ../common/xilinx_jtag/ports.o
-
-OBJS = $(BOARD).o flash.o ../common/misc.o $(CPLD)
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/esd/vom405/config.mk b/board/esd/vom405/config.mk
deleted file mode 100644
index 3041b772d2..0000000000
--- a/board/esd/vom405/config.mk
+++ /dev/null
@@ -1,29 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# esd VOH405 boards
-#
-
-TEXT_BASE = 0xFFFC0000
-#TEXT_BASE = 0x00FC0000
diff --git a/board/esd/vom405/flash.c b/board/esd/vom405/flash.c
deleted file mode 100644
index 89af1190a8..0000000000
--- a/board/esd/vom405/flash.c
+++ /dev/null
@@ -1,101 +0,0 @@
-/*
- * (C) Copyright 2001
- * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <ppc4xx.h>
-#include <asm/processor.h>
-
-/*
- * include common flash code (for esd boards)
- */
-#include "../common/flash.c"
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (vu_long * addr, flash_info_t * info);
-static void flash_get_offsets (ulong base, flash_info_t * info);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- unsigned long size_b0;
- int i;
- uint pbcr;
- unsigned long base_b0;
- int size_val = 0;
-
- /* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* Static FLASH Bank configuration here - FIXME XXX */
-
- size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size_b0, size_b0<<20);
- }
-
- /* Setup offsets */
- flash_get_offsets (-size_b0, &flash_info[0]);
-
- /* Re-do sizing to get full correct info */
- mtdcr(ebccfga, pb0cr);
- pbcr = mfdcr(ebccfgd);
- mtdcr(ebccfga, pb0cr);
- base_b0 = -size_b0;
- switch (size_b0) {
- case 1 << 20:
- size_val = 0;
- break;
- case 2 << 20:
- size_val = 1;
- break;
- case 4 << 20:
- size_val = 2;
- break;
- case 8 << 20:
- size_val = 3;
- break;
- case 16 << 20:
- size_val = 4;
- break;
- }
- pbcr = (pbcr & 0x0001ffff) | base_b0 | (size_val << 17);
- mtdcr(ebccfgd, pbcr);
-
- /* Monitor protection ON by default */
- (void)flash_protect(FLAG_PROTECT_SET,
- -CFG_MONITOR_LEN,
- 0xffffffff,
- &flash_info[0]);
-
- flash_info[0].size = size_b0;
-
- return (size_b0);
-}
diff --git a/board/esd/vom405/fpgadata.c b/board/esd/vom405/fpgadata.c
deleted file mode 100644
index 1c3a963892..0000000000
--- a/board/esd/vom405/fpgadata.c
+++ /dev/null
@@ -1,1812 +0,0 @@
- 0x07,0x20,0x12,0x00,0x12,0x01,0x04,0x00,0x00,0x00,0x00,0x02,0x08,0xff,0x02,0x08,
- 0xfe,0x08,0x00,0x00,0x00,0x20,0x01,0x0f,0xff,0xff,0xff,0x09,0x00,0x00,0x00,0x00,
- 0xf9,0x60,0x40,0x93,0x02,0x08,0xff,0x02,0x08,0xff,0x02,0x08,0xe8,0x08,0x00,0x00,
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- 0x2c,0xc0,0x00,0x14,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0x30,
- 0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0x40,0x08,
- 0x00,0x04,0x09,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0x44,0x80,0x00,
- 0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0x48,0x00,0x00,0x00,
- 0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0x4c,0x88,0x00,0x84,0x01,
- 0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x04,0x00,0x00,0x4e,0x20,0x01,0x00,0x00,0x00,
- 0x00,0x00,0x00,0x00,0x09,0x00,0x35,0x50,0x00,0x00,0x00,0x03,0x00,0x00,0x00,0x00,
- 0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x09,0x00,0x35,0x80,0x00,
- 0x00,0x30,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x01,0x00,0x00,0x00,0x00,0x00,
- 0x00,0x00,0x04,0x00,0x00,0x00,0x00,0x09,0x00,0x35,0x84,0x00,0x00,0x00,0x01,0x00,
- 0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x09,0x00,
- 0x35,0x88,0x20,0x80,0x08,0x21,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,
- 0x8c,0x40,0x00,0xc0,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0x90,
- 0xa0,0x00,0x08,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0xa0,0x00,
- 0x00,0x20,0x0d,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0xa4,0x00,0x80,
- 0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0xa8,0xc0,0x1c,0x14,
- 0x85,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0xac,0x00,0x00,0x48,0x01,
- 0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0xb0,0xc0,0x00,0x14,0x01,0x00,
- 0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0xc0,0x80,0x00,0x80,0x01,0x00,0x00,
- 0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0xc4,0x00,0x00,0x80,0x09,0x00,0x00,0x00,
- 0x00,0x00,0x00,0x01,0x09,0x00,0x35,0xc8,0x08,0x00,0x04,0x61,0x00,0x00,0x00,0x00,
- 0x00,0x00,0x01,0x09,0x00,0x35,0xcc,0x40,0x00,0x48,0x01,0x00,0x00,0x00,0x00,0x00,
- 0x00,0x01,0x04,0x00,0x00,0x4e,0x20,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x09,
- 0x00,0x35,0xd0,0x88,0x00,0x04,0x03,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,
- 0x00,0x00,0x00,0x00,0x00,0x03,0x09,0x00,0x35,0xd0,0x88,0x00,0x04,0x01,0x00,0x00,
- 0x00,0x00,0x00,0x00,0x01,0x04,0x00,0x00,0x00,0x00,0x02,0x08,0xff,0x04,0x00,0x00,
- 0x00,0x64,0x02,0x08,0xf0,0x04,0x00,0x00,0x00,0x00,0x02,0x08,0xff,0x02,0x08,0xff,
- 0x08,0x00,0x00,0x00,0x01,0x01,0x00,0x09,0x00,0x00,0x00,
diff --git a/board/esd/vom405/u-boot.lds b/board/esd/vom405/u-boot.lds
deleted file mode 100644
index f7a20d1da2..0000000000
--- a/board/esd/vom405/u-boot.lds
+++ /dev/null
@@ -1,150 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- .resetvec 0xFFFFFFFC :
- {
- *(.resetvec)
- } = 0xffff
-
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/ppc4xx/start.o (.text)
- cpu/ppc4xx/traps.o (.text)
- cpu/ppc4xx/interrupts.o (.text)
- cpu/ppc4xx/serial.o (.text)
- cpu/ppc4xx/cpu_init.o (.text)
- cpu/ppc4xx/speed.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/extable.o (.text)
- lib_generic/zlib.o (.text)
-
-/* . = env_offset;*/
-/* common/environment.o(.text)*/
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/esd/vom405/vom405.c b/board/esd/vom405/vom405.c
deleted file mode 100644
index 445b8fc576..0000000000
--- a/board/esd/vom405/vom405.c
+++ /dev/null
@@ -1,160 +0,0 @@
-/*
- * (C) Copyright 2001-2004
- * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/processor.h>
-#include <command.h>
-#include <malloc.h>
-
-
-extern void lxt971_no_sleep(void);
-
-
-/* fpga configuration data - not compressed, generated by bin2c */
-const unsigned char fpgadata[] =
-{
-#include "fpgadata.c"
-};
-int filesize = sizeof(fpgadata);
-
-
-int board_early_init_f (void)
-{
- /*
- * IRQ 0-15 405GP internally generated; active high; level sensitive
- * IRQ 16 405GP internally generated; active low; level sensitive
- * IRQ 17-24 RESERVED
- * IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive
- * IRQ 26 (EXT IRQ 1) SER0 ; active low; level sensitive
- * IRQ 27 (EXT IRQ 2) SER1; active low; level sensitive
- * IRQ 28 (EXT IRQ 3) FPGA 0; active low; level sensitive
- * IRQ 29 (EXT IRQ 4) FPGA 1; active low; level sensitive
- * IRQ 30 (EXT IRQ 5) PCI INTA; active low; level sensitive
- * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
- */
- mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
- mtdcr(uicer, 0x00000000); /* disable all ints */
- mtdcr(uiccr, 0x00000000); /* set all to be non-critical*/
- mtdcr(uicpr, 0xFFFFFF80); /* set int polarities */
- mtdcr(uictr, 0x10000000); /* set int trigger levels */
- mtdcr(uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority*/
- mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
-
- /*
- * EBC Configuration Register: set ready timeout to 512 ebc-clks -> ca. 15 us
- */
- mtebc (epcr, 0xa8400000); /* ebc always driven */
-
- /*
- * Reset CPLD via GPIO12 (CS3) pin
- */
- out32(GPIO0_OR, in32(GPIO0_OR) & ~(0x80000000 >> 12));
- udelay(1000); /* wait 1ms */
- out32(GPIO0_OR, in32(GPIO0_OR) | (0x80000000 >> 12));
- udelay(1000); /* wait 1ms */
-
- return 0;
-}
-
-
-/* ------------------------------------------------------------------------- */
-
-int misc_init_r (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- /* adjust flash start and offset */
- gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize;
- gd->bd->bi_flashoffset = 0;
-
- return (0);
-}
-
-
-/*
- * Check Board Identity:
- */
-
-int checkboard (void)
-{
- unsigned char str[64];
- int i = getenv_r ("serial#", str, sizeof(str));
- int flashcnt;
- int delay;
- volatile unsigned char *led_reg = (unsigned char *)((ulong)CAN_BA + 0x1000);
-
- puts ("Board: ");
-
- if (i == -1) {
- puts ("### No HW ID - assuming VOM405");
- } else {
- puts(str);
- }
-
- printf(" (PLD-Version=%02d)\n", *led_reg);
-
- /*
- * Flash LEDs
- */
- for (flashcnt = 0; flashcnt < 3; flashcnt++) {
- *led_reg = 0x40; /* LED_B..D off */
- for (delay = 0; delay < 100; delay++)
- udelay(1000);
- *led_reg = 0x47; /* LED_B..D on */
- for (delay = 0; delay < 50; delay++)
- udelay(1000);
- }
- *led_reg = 0x40;
-
- return 0;
-}
-
-/* ------------------------------------------------------------------------- */
-
-long int initdram (int board_type)
-{
- unsigned long val;
-
- mtdcr(memcfga, mem_mb0cf);
- val = mfdcr(memcfgd);
-
-#if 0
- printf("\nmb0cf=%x\n", val); /* test-only */
- printf("strap=%x\n", mfdcr(strap)); /* test-only */
-#endif
-
- return (4*1024*1024 << ((val & 0x000e0000) >> 17));
-}
-
-/* ------------------------------------------------------------------------- */
-
-void reset_phy(void)
-{
-#ifdef CONFIG_LXT971_NO_SLEEP
-
- /*
- * Disable sleep mode in LXT971
- */
- lxt971_no_sleep();
-#endif
-}
diff --git a/board/esd/wuh405/Makefile b/board/esd/wuh405/Makefile
deleted file mode 100644
index a60495a59a..0000000000
--- a/board/esd/wuh405/Makefile
+++ /dev/null
@@ -1,46 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o ../common/misc.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/esd/wuh405/config.mk b/board/esd/wuh405/config.mk
deleted file mode 100644
index 1d743a9f87..0000000000
--- a/board/esd/wuh405/config.mk
+++ /dev/null
@@ -1,28 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# esd ASH405 boards
-#
-
-TEXT_BASE = 0xFFFC0000
diff --git a/board/esd/wuh405/flash.c b/board/esd/wuh405/flash.c
deleted file mode 100644
index 89af1190a8..0000000000
--- a/board/esd/wuh405/flash.c
+++ /dev/null
@@ -1,101 +0,0 @@
-/*
- * (C) Copyright 2001
- * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <ppc4xx.h>
-#include <asm/processor.h>
-
-/*
- * include common flash code (for esd boards)
- */
-#include "../common/flash.c"
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (vu_long * addr, flash_info_t * info);
-static void flash_get_offsets (ulong base, flash_info_t * info);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- unsigned long size_b0;
- int i;
- uint pbcr;
- unsigned long base_b0;
- int size_val = 0;
-
- /* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* Static FLASH Bank configuration here - FIXME XXX */
-
- size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size_b0, size_b0<<20);
- }
-
- /* Setup offsets */
- flash_get_offsets (-size_b0, &flash_info[0]);
-
- /* Re-do sizing to get full correct info */
- mtdcr(ebccfga, pb0cr);
- pbcr = mfdcr(ebccfgd);
- mtdcr(ebccfga, pb0cr);
- base_b0 = -size_b0;
- switch (size_b0) {
- case 1 << 20:
- size_val = 0;
- break;
- case 2 << 20:
- size_val = 1;
- break;
- case 4 << 20:
- size_val = 2;
- break;
- case 8 << 20:
- size_val = 3;
- break;
- case 16 << 20:
- size_val = 4;
- break;
- }
- pbcr = (pbcr & 0x0001ffff) | base_b0 | (size_val << 17);
- mtdcr(ebccfgd, pbcr);
-
- /* Monitor protection ON by default */
- (void)flash_protect(FLAG_PROTECT_SET,
- -CFG_MONITOR_LEN,
- 0xffffffff,
- &flash_info[0]);
-
- flash_info[0].size = size_b0;
-
- return (size_b0);
-}
diff --git a/board/esd/wuh405/fpgadata.c b/board/esd/wuh405/fpgadata.c
deleted file mode 100644
index fdc02e3ef9..0000000000
--- a/board/esd/wuh405/fpgadata.c
+++ /dev/null
@@ -1,1818 +0,0 @@
- 0x1f,0x8b,0x08,0x08,0xe2,0x44,0xc5,0x42,0x00,0x03,0x77,0x75,0x68,0x34,0x30,0x35,
- 0x5f,0x31,0x2e,0x62,0x69,0x74,0x00,0xec,0xbd,0x0d,0x74,0x14,0xd7,0x95,0x2e,0xba,
- 0xeb,0x54,0x49,0x94,0xba,0x5b,0xea,0x42,0x48,0x1e,0xd9,0x60,0x5c,0x6a,0x09,0xd2,
- 0x28,0x8d,0x68,0x24,0x47,0x60,0x21,0x4b,0x45,0x8b,0x78,0x14,0x20,0x41,0xe3,0x78,
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- 0x3b,0x7f,0xfc,0xed,0xd3,0x27,0x5b,0xd2,0xdc,0x79,0xfa,0xc9,0xd6,0xe0,0xa7,0xc7,
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- 0x7e,0x74,0x7e,0xf1,0xf8,0x8e,0x5b,0x1e,0x16,0xeb,0x22,0x71,0x58,0xf2,0x81,0x1b,
- 0x35,0xc5,0x93,0xbb,0x39,0xab,0x8b,0x9a,0xa5,0x18,0x1e,0xda,0xd5,0xbf,0x3e,0xec,
- 0x32,0xd1,0xbb,0x98,0xf1,0x6d,0x9e,0x68,0x80,0x09,0x0d,0x4d,0x3b,0x6f,0xf6,0xb7,
- 0x08,0x8b,0x05,0xe2,0x8b,0x32,0x82,0xcc,0x84,0xc1,0xd1,0xbb,0x0f,0xd3,0xa2,0x45,
- 0xfc,0xea,0xf1,0x34,0xdc,0x80,0x83,0x1e,0x89,0x9e,0x28,0xb0,0x3a,0x1f,0x66,0x0b,
- 0xb8,0xdf,0x49,0x50,0x2c,0xe0,0xb6,0xe8,0xff,0x58,0x80,0x62,0x65,0xb5,0x47,0x1e,
- 0x32,0x2b,0xb5,0xe6,0xef,0x43,0x32,0xf8,0x77,0x3e,0xe4,0xac,0x81,0x85,0x4d,0xd3,
- 0xfc,0x7b,0x11,0x0c,0xd3,0xa3,0x2f,0x21,0xcd,0x9a,0xad,0x1b,0xf8,0x90,0xd6,0xcd,
- 0x6a,0xd8,0x92,0xb2,0x6a,0x56,0x14,0x0f,0x13,0xfc,0xe6,0x8d,0xe0,0x4d,0x17,0x06,
- 0x90,0xdf,0x7e,0x28,0x2e,0xd3,0x93,0xd7,0xcb,0xf0,0xd0,0x04,0xb5,0x79,0x14,0x0f,
- 0xf9,0x2c,0x3e,0xf4,0x9f,0x69,0xa9,0x35,0x2b,0xda,0x22,0x19,0x0e,0xcf,0x2f,0x78,
- 0x38,0x34,0xb6,0xb8,0xf0,0xba,0x11,0x2d,0xb8,0xbf,0x47,0xf3,0x53,0xc4,0x53,0x24,
- 0x0e,0xe4,0xd1,0xd7,0x8d,0x8d,0x37,0xb5,0x6e,0x1a,0x87,0x86,0x9b,0xfb,0x69,0x01,
- 0x07,0x3c,0xc3,0x9d,0xc0,0x70,0x89,0x58,0x17,0x56,0x40,0x85,0xc9,0x3c,0x63,0xa2,
- 0xe9,0x53,0x00,0x31,0xf3,0x4d,0x9c,0x05,0x8e,0x88,0x96,0xd5,0x6b,0xa5,0x72,0xc3,
- 0x84,0x2d,0xa0,0xc4,0x33,0x85,0x34,0x58,0x0e,0x3a,0x4f,0xb9,0x53,0x08,0x8a,0x7f,
- 0x0a,0xd2,0xae,0xd1,0x00,0xc5,0x54,0x93,0x18,0x15,0x5e,0x25,0x82,0xdf,0x3a,0x82,
- 0xa3,0x96,0xb3,0x26,0xcd,0x9b,0x56,0xfb,0x5a,0xe2,0xbb,0x04,0x5b,0x8a,0xce,0x3a,
- 0x96,0x96,0x1d,0xec,0xe8,0xa9,0x43,0xca,0xf5,0x92,0x84,0x73,0x81,0x77,0x04,0xbd,
- 0x2e,0x59,0x8b,0x5d,0xe0,0x4b,0x68,0x92,0x6b,0x20,0x4c,0x1b,0x9a,0xd8,0x85,0x92,
- 0x68,0x51,0xf2,0x49,0x31,0x3f,0x22,0xe9,0xf1,0x0d,0xd7,0x8c,0xf8,0x90,0x0e,0x94,
- 0xcf,0x04,0x6d,0xa7,0xd2,0x0f,0xc9,0x85,0x2b,0x02,0x1d,0xed,0xd5,0x66,0x3c,0x0c,
- 0xa1,0x57,0xa6,0x1d,0xe4,0x73,0x34,0xa3,0x21,0x16,0xce,0xf0,0xdd,0x15,0xab,0x12,
- 0x0f,0xce,0x64,0x4c,0x32,0x41,0x62,0x11,0x6e,0xa1,0xf9,0x4a,0x80,0x69,0xe7,0x1d,
- 0x2a,0x5b,0xd0,0x84,0x87,0x5c,0x75,0x3f,0xcd,0x07,0x70,0x89,0xec,0x87,0xec,0x2c,
- 0x3c,0x2a,0x1f,0x21,0x07,0x20,0xcb,0xed,0x47,0xf4,0x12,0x9a,0xa3,0x68,0x7a,0x2e,
- 0x81,0x34,0x11,0x1f,0x32,0x32,0x01,0xde,0x32,0xf2,0x21,0xc6,0xc3,0x3d,0xde,0xee,
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- 0xb7,0x9b,0x72,0xfe,0xfc,0xa4,0x8c,0x34,0x58,0xc5,0x32,0x6a,0xb6,0xdc,0xe0,0xc3,
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- 0x79,0x13,0x59,0x8a,0xa1,0xc9,0xa1,0xa1,0xa1,0xc9,0x44,0x3c,0xc6,0x18,0x96,0x94,
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- 0x82,0x06,0xea,0x86,0x91,0x28,0x1e,0x93,0xfa,0xb6,0xe4,0x43,0xce,0xba,0x30,0xdb,
- 0xc4,0x91,0x0f,0x59,0x1d,0x0b,0x9b,0x06,0x94,0xf5,0x35,0xec,0xb5,0x96,0x78,0xd5,
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- 0x9d,0x37,0xd7,0x17,0xf6,0xe7,0xd3,0xd0,0x0e,0x89,0x8c,0x59,0xe1,0x01,0xdc,0x88,
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- 0x9b,0xe3,0x53,0xc4,0xf2,0xfb,0x9b,0xc1,0xfe,0x53,0xf1,0x05,0xf8,0x05,0xf8,0x2c,
- 0x65,0xc5,0x29,0x7c,0x88,0xb9,0x53,0x9a,0x95,0x46,0x8b,0x7a,0xbf,0x28,0x0c,0xb0,
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- 0x15,0x43,0xc3,0x52,0x13,0x71,0xc7,0x5a,0x25,0x56,0x33,0x9e,0x2c,0x0d,0x56,0x5c,
- 0x7f,0xc4,0x85,0x1f,0x95,0x99,0x30,0xa6,0x7d,0x2d,0x6c,0x49,0xd9,0xd7,0x21,0x58,
- 0x29,0x08,0xc3,0x2d,0x65,0x7c,0xa0,0x1b,0xb3,0xb4,0xfa,0xf2,0xe4,0xee,0x67,0xbc,
- 0xd7,0x8a,0xd6,0x57,0xa1,0xc1,0x87,0x3c,0x77,0x4e,0x98,0x4e,0xeb,0x63,0xe4,0x43,
- 0x4b,0x60,0xe1,0x22,0x9c,0xb3,0xcd,0x90,0x0f,0x9b,0xe3,0x99,0x67,0xb9,0xd7,0xed,
- 0xb4,0x93,0xcf,0xf3,0x13,0xd3,0x45,0xdb,0x31,0xf2,0xc4,0x62,0x0c,0xd3,0x8e,0x81,
- 0xf9,0x27,0x07,0xd8,0x42,0xf3,0x40,0xa2,0xf5,0x8e,0xf3,0x21,0xac,0x8c,0xbb,0x64,
- 0xe6,0xb3,0x66,0x0d,0x39,0x37,0x41,0x14,0x31,0xc4,0xac,0xd7,0x0b,0x25,0x88,0x78,
- 0x5e,0xf0,0x21,0x87,0x2a,0x43,0x1a,0xa4,0xb1,0x32,0x43,0x50,0xa4,0x2a,0x28,0x86,
- 0x26,0xea,0xcd,0xf2,0xaf,0x91,0x49,0x46,0x1f,0x9c,0x7d,0xc5,0x6d,0x49,0xb4,0xb1,
- 0xf5,0x07,0x9d,0x87,0x53,0x2d,0xf1,0x49,0x34,0x03,0x87,0x8d,0xd7,0xea,0x46,0xc9,
- 0x3f,0x78,0xbd,0x3d,0x17,0x33,0x4b,0xc8,0x87,0xef,0xfe,0xbe,0x47,0xec,0xfe,0x7b,
- 0xbc,0x74,0x2d,0x31,0x23,0x79,0xa0,0xbd,0x01,0x06,0x4a,0xfe,0x01,0xf8,0xda,0x5b,
- 0x23,0x0f,0xdf,0xbd,0xbd,0xfc,0x9d,0x1b,0x2f,0xbe,0x35,0x26,0xf8,0xf0,0xfd,0x3a,
- 0x1f,0x2e,0x47,0x7c,0xb8,0xeb,0x19,0xf7,0x50,0xc4,0x87,0xc7,0x05,0x1f,0xee,0xd4,
- 0xf9,0xf0,0x69,0xc4,0x87,0xbb,0x78,0xec,0xf3,0xea,0xab,0x02,0x0b,0xff,0x5a,0xd9,
- 0xd9,0x1e,0xda,0xaa,0x83,0x22,0x12,0xe3,0x73,0xf8,0x50,0xfe,0xf4,0xbf,0x6f,0x62,
- 0xff,0x4f,0x1b,0xa0,0x78,0xf9,0x79,0x7c,0x38,0xd8,0xe0,0xc3,0xee,0x03,0xe3,0x1b,
- 0xf3,0xfd,0x9b,0x4f,0x1e,0x0f,0x5d,0x7a,0xa6,0xff,0xe3,0x2f,0x1e,0xbd,0x0f,0x1e,
- 0x11,0x2f,0x28,0x7c,0xc8,0xa6,0xbe,0xf8,0x59,0xb4,0xb4,0xb4,0xb4,0xb4,0xb4,0xb4,
- 0xb4,0xb4,0xb4,0xb4,0xfe,0xdf,0x25,0x6b,0x07,0xaa,0x6b,0x07,0x2d,0x2d,0x2d,0x2d,
- 0x2d,0x2d,0x2d,0x2d,0x2d,0x2d,0xad,0xe7,0x4b,0xd6,0x0e,0x09,0x5d,0x3b,0x68,0x69,
- 0x69,0x69,0x69,0x69,0x69,0x69,0x69,0x69,0x69,0x3d,0x5f,0xb2,0x76,0x30,0x65,0xed,
- 0xf0,0xbf,0x0e,0x45,0x4b,0x4b,0x4b,0x4b,0x4b,0x4b,0x4b,0x4b,0x4b,0x4b,0xeb,0xbf,
- 0x28,0x5f,0xfc,0xd1,0x24,0xf8,0xe7,0x79,0x1f,0xb8,0xf8,0xce,0x53,0xdc,0x07,0xf6,
- 0xb9,0xdf,0x27,0xd4,0x3f,0x6b,0xf8,0x50,0x25,0xd1,0x39,0x1f,0x9f,0x7e,0xb6,0xdf,
- 0xbf,0x00,0x34,0x34,0xbf,0x69,0xee,0x33,0x01,0x00,
diff --git a/board/esd/wuh405/u-boot.lds b/board/esd/wuh405/u-boot.lds
deleted file mode 100644
index 95854f2932..0000000000
--- a/board/esd/wuh405/u-boot.lds
+++ /dev/null
@@ -1,149 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- .resetvec 0xFFFFFFFC :
- {
- *(.resetvec)
- } = 0xffff
-
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/ppc4xx/start.o (.text)
- cpu/ppc4xx/traps.o (.text)
- cpu/ppc4xx/interrupts.o (.text)
- cpu/ppc4xx/serial.o (.text)
- cpu/ppc4xx/cpu_init.o (.text)
- cpu/ppc4xx/speed.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/extable.o (.text)
- lib_generic/zlib.o (.text)
-
-/* . = env_offset;*/
-/* common/environment.o(.text)*/
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/esd/wuh405/wuh405.c b/board/esd/wuh405/wuh405.c
deleted file mode 100644
index db24122c5e..0000000000
--- a/board/esd/wuh405/wuh405.c
+++ /dev/null
@@ -1,252 +0,0 @@
-/*
- * (C) Copyright 2001-2003
- * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/processor.h>
-#include <command.h>
-#include <malloc.h>
-
-/* ------------------------------------------------------------------------- */
-
-#if 0
-#define FPGA_DEBUG
-#endif
-
-extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
-
-/* fpga configuration data - gzip compressed and generated by bin2c */
-const unsigned char fpgadata[] =
-{
-#include "fpgadata.c"
-};
-
-/*
- * include common fpga code (for esd boards)
- */
-#include "../common/fpga.c"
-
-
-/* Prototypes */
-int gunzip(void *, int, unsigned char *, unsigned long *);
-
-
-int board_early_init_f (void)
-{
- /*
- * IRQ 0-15 405GP internally generated; active high; level sensitive
- * IRQ 16 405GP internally generated; active low; level sensitive
- * IRQ 17-24 RESERVED
- * IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive
- * IRQ 26 (EXT IRQ 1) SER0 ; active low; level sensitive
- * IRQ 27 (EXT IRQ 2) SER1; active low; level sensitive
- * IRQ 28 (EXT IRQ 3) FPGA 0; active low; level sensitive
- * IRQ 29 (EXT IRQ 4) FPGA 1; active low; level sensitive
- * IRQ 30 (EXT IRQ 5) PCI INTA; active low; level sensitive
- * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
- */
- mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
- mtdcr(uicer, 0x00000000); /* disable all ints */
- mtdcr(uiccr, 0x00000000); /* set all to be non-critical*/
- mtdcr(uicpr, 0xFFFFFF9F); /* set int polarities */
- mtdcr(uictr, 0x10000000); /* set int trigger levels */
- mtdcr(uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority*/
- mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
-
- /*
- * EBC Configuration Register: set ready timeout to 512 ebc-clks -> ca. 15 us
- */
- mtebc (epcr, 0xa8400000); /* ebc always driven */
-
- return 0;
-}
-
-
-/* ------------------------------------------------------------------------- */
-
-int misc_init_f (void)
-{
- return 0; /* dummy implementation */
-}
-
-
-int misc_init_r (void)
-{
- volatile unsigned char *duart0_mcr = (unsigned char *)((ulong)DUART0_BA + 4);
- volatile unsigned char *duart1_mcr = (unsigned char *)((ulong)DUART1_BA + 4);
- volatile unsigned char *duart2_mcr = (unsigned char *)((ulong)DUART2_BA + 4);
- volatile unsigned char *duart3_mcr = (unsigned char *)((ulong)DUART3_BA + 4);
- unsigned char *dst;
- ulong len = sizeof(fpgadata);
- int status;
- int index;
- int i;
-
- dst = malloc(CFG_FPGA_MAX_SIZE);
- if (gunzip (dst, CFG_FPGA_MAX_SIZE, (uchar *)fpgadata, &len) != 0) {
- printf ("GUNZIP ERROR - must RESET board to recover\n");
- do_reset (NULL, 0, 0, NULL);
- }
-
- status = fpga_boot(dst, len);
- if (status != 0) {
- printf("\nFPGA: Booting failed ");
- switch (status) {
- case ERROR_FPGA_PRG_INIT_LOW:
- printf("(Timeout: INIT not low after asserting PROGRAM*)\n ");
- break;
- case ERROR_FPGA_PRG_INIT_HIGH:
- printf("(Timeout: INIT not high after deasserting PROGRAM*)\n ");
- break;
- case ERROR_FPGA_PRG_DONE:
- printf("(Timeout: DONE not high after programming FPGA)\n ");
- break;
- }
-
- /* display infos on fpgaimage */
- index = 15;
- for (i=0; i<4; i++) {
- len = dst[index];
- printf("FPGA: %s\n", &(dst[index+1]));
- index += len+3;
- }
- putc ('\n');
- /* delayed reboot */
- for (i=20; i>0; i--) {
- printf("Rebooting in %2d seconds \r",i);
- for (index=0;index<1000;index++)
- udelay(1000);
- }
- putc ('\n');
- do_reset(NULL, 0, 0, NULL);
- }
-
- puts("FPGA: ");
-
- /* display infos on fpgaimage */
- index = 15;
- for (i=0; i<4; i++) {
- len = dst[index];
- printf("%s ", &(dst[index+1]));
- index += len+3;
- }
- putc ('\n');
-
- free(dst);
-
- /*
- * Reset FPGA via FPGA_DATA pin
- */
- SET_FPGA(FPGA_PRG | FPGA_CLK);
- udelay(1000); /* wait 1ms */
- SET_FPGA(FPGA_PRG | FPGA_CLK | FPGA_DATA);
- udelay(1000); /* wait 1ms */
-
- /*
- * Reset external DUARTs
- */
- out32(GPIO0_OR, in32(GPIO0_OR) | CFG_DUART_RST); /* set reset to high */
- udelay(10); /* wait 10us */
- out32(GPIO0_OR, in32(GPIO0_OR) & ~CFG_DUART_RST); /* set reset to low */
- udelay(1000); /* wait 1ms */
-
- /*
- * Set NAND-FLASH GPIO signals to default
- */
- out32(GPIO0_OR, in32(GPIO0_OR) & ~(CFG_NAND_CLE | CFG_NAND_ALE));
- out32(GPIO0_OR, in32(GPIO0_OR) | CFG_NAND_CE);
-
- /*
- * Enable interrupts in exar duart mcr[3]
- */
- *duart0_mcr = 0x08;
- *duart1_mcr = 0x08;
- *duart2_mcr = 0x08;
- *duart3_mcr = 0x08;
-
- return (0);
-}
-
-
-/*
- * Check Board Identity:
- */
-
-int checkboard (void)
-{
- char str[64];
- int i = getenv_r ("serial#", str, sizeof(str));
-
- puts ("Board: ");
-
- if (i == -1) {
- puts ("### No HW ID - assuming WUH405");
- } else {
- puts(str);
- }
-
- putc ('\n');
-
- return 0;
-}
-
-/* ------------------------------------------------------------------------- */
-
-long int initdram (int board_type)
-{
- unsigned long val;
-
- mtdcr(memcfga, mem_mb0cf);
- val = mfdcr(memcfgd);
-
-#if 0
- printf("\nmb0cf=%x\n", val); /* test-only */
- printf("strap=%x\n", mfdcr(strap)); /* test-only */
-#endif
-
- return (4*1024*1024 << ((val & 0x000e0000) >> 17));
-}
-
-/* ------------------------------------------------------------------------- */
-
-int testdram (void)
-{
- /* TODO: XXX XXX XXX */
- printf ("test: 16 MB - ok\n");
-
- return (0);
-}
-
-/* ------------------------------------------------------------------------- */
-
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
-#include <linux/mtd/nand.h>
-extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
-
-void nand_init(void)
-{
- nand_probe(CFG_NAND_BASE);
- if (nand_dev_desc[0].ChipID != NAND_ChipID_UNKNOWN) {
- print_size(nand_dev_desc[0].totlen, "\n");
- }
-}
-#endif
diff --git a/board/esteem192e/Makefile b/board/esteem192e/Makefile
deleted file mode 100644
index 13ce9fc9d2..0000000000
--- a/board/esteem192e/Makefile
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/esteem192e/config.mk b/board/esteem192e/config.mk
deleted file mode 100644
index 9d6080b84a..0000000000
--- a/board/esteem192e/config.mk
+++ /dev/null
@@ -1,28 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# TQM8xxL boards
-#
-
-TEXT_BASE = 0x40000000
diff --git a/board/esteem192e/esteem192e.c b/board/esteem192e/esteem192e.c
deleted file mode 100644
index 3959eead27..0000000000
--- a/board/esteem192e/esteem192e.c
+++ /dev/null
@@ -1,243 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- *
- * Modified By Conn Clark to work with Esteem 192E 7/31/00
- *
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-
-/* ------------------------------------------------------------------------- */
-
-#define _NOT_USED_ 0xFFFFFFFF
-
-const uint sdram_table[] = {
- /*
- * Single Read. (Offset 0 in UPMA RAM)
- *
- * active, NOP, read, precharge, NOP */
- 0x0F27CC04, 0x0EAECC04, 0x00B98C04, 0x00F74C00,
- 0x11FFCC05, /* last */
- /*
- * SDRAM Initialization (offset 5 in UPMA RAM)
- *
- * This is no UPM entry point. The following definition uses
- * the remaining space to establish an initialization
- * sequence, which is executed by a RUN command.
- * NOP, Program
- */
- 0x0F0A8C34, 0x1F354C37, /* last */
-
- _NOT_USED_, /* Not used */
-
- /*
- * Burst Read. (Offset 8 in UPMA RAM)
- * active, NOP, read, NOP, NOP, NOP, NOP, NOP */
- 0x0F37CC04, 0x0EFECC04, 0x00FDCC04, 0x00FFCC00,
- 0x00FFCC00, 0x01FFCC00, 0x0FFFCC00, 0x1FFFCC05, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Single Write. (Offset 18 in UPMA RAM)
- * active, NOP, write, NOP, precharge, NOP */
- 0x0F27CC04, 0x0EAE8C00, 0x01BD4C04, 0x0FFB8C04,
- 0x0FF74C04, 0x1FFFCC05, /* last */
- _NOT_USED_, _NOT_USED_,
- /*
- * Burst Write. (Offset 20 in UPMA RAM)
- * active, NOP, write, NOP, NOP, NOP, NOP, NOP */
- 0x0F37CC04, 0x0EFE8C00, 0x00FD4C00, 0x00FFCC00,
- 0x00FFCC00, 0x01FFCC04, 0x0FFFCC04, 0x1FFFCC05, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Refresh (Offset 30 in UPMA RAM)
- * precharge, NOP, auto_ref, NOP, NOP, NOP */
- 0x0FF74C34, 0x0FFACCB4, 0x0FF5CC34, 0x0FFFCC34,
- 0x0FFFCCB4, 0x1FFFCC35, /* last */
- _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Exception. (Offset 3c in UPMA RAM)
- */
- 0x0FFB8C00, 0x1FF74C03, /* last */
- _NOT_USED_, _NOT_USED_
-};
-
-/* ------------------------------------------------------------------------- */
-
-
-/*
- * Check Board Identity:
- */
-
-int checkboard (void)
-{
- puts ("Board: Esteem 192E\n");
- return (0);
-}
-
-/* ------------------------------------------------------------------------- */
-
-
-long int initdram (int board_type)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- long int size_b0, size_b1;
-
- /*
- * Explain frequency of refresh here
- */
-
- memctl->memc_mptpr = 0x0200; /* divide by 32 */
-
- memctl->memc_mamr = 0x18003112; /*CFG_MAMR_8COL; */ /* 0x18005112 TODO: explain here */
-
- upmconfig (UPMA, (uint *) sdram_table,
- sizeof (sdram_table) / sizeof (uint));
-
- /*
- * Map cs 2 and 3 to the SDRAM banks 0 and 1 at
- * preliminary addresses - these have to be modified after the
- * SDRAM size has been determined.
- */
-
- memctl->memc_or2 = CFG_OR2_PRELIM; /* not defined yet */
- memctl->memc_br2 = CFG_BR2_PRELIM;
-
- memctl->memc_or3 = CFG_OR3_PRELIM;
- memctl->memc_br3 = CFG_BR3_PRELIM;
-
-
- /* perform SDRAM initializsation sequence */
- memctl->memc_mar = 0x00000088;
- memctl->memc_mcr = 0x80004830; /* SDRAM bank 0 execute 8 refresh */
- memctl->memc_mcr = 0x80004105; /* SDRAM bank 0 */
-
- memctl->memc_mcr = 0x80006830; /* SDRAM bank 1 execute 8 refresh */
- memctl->memc_mcr = 0x80006105; /* SDRAM bank 1 */
-
- memctl->memc_mamr = CFG_MAMR_8COL; /* 0x18803112 start refresh timer TODO: explain here */
-
-/* printf ("banks 0 and 1 are programed\n"); */
-
- /*
- * Check Bank 0 Memory Size for re-configuration
- *
- */
- size_b0 = get_ram_size ( (long *)SDRAM_BASE2_PRELIM, SDRAM_MAX_SIZE);
- size_b1 = get_ram_size ( (long *)SDRAM_BASE3_PRELIM, SDRAM_MAX_SIZE);
-
- printf ("\nbank 0 size %lu\nbank 1 size %lu\n", size_b0, size_b1);
-
-/* printf ("bank 1 size %u\n",size_b1); */
-
- if (size_b1 == 0) {
- /*
- * Adjust refresh rate if bank 0 isn't stuffed
- */
- memctl->memc_mptpr = 0x0400; /* divide by 64 */
- memctl->memc_br3 &= 0x0FFFFFFFE;
-
- /*
- * Adjust OR2 for size of bank 0
- */
- memctl->memc_or2 |= 7 * size_b0;
- } else {
- if (size_b0 < size_b1) {
- memctl->memc_br2 &= 0x00007FFE;
- memctl->memc_br3 &= 0x00007FFF;
-
- /*
- * Adjust OR3 for size of bank 1
- */
- memctl->memc_or3 |= 15 * size_b1;
-
- /*
- * Adjust OR2 for size of bank 0
- */
- memctl->memc_or2 |= 15 * size_b0;
- memctl->memc_br2 += (size_b1 + 1);
- } else {
- memctl->memc_br3 &= 0x00007FFE;
-
- /*
- * Adjust OR2 for size of bank 0
- */
- memctl->memc_or2 |= 15 * size_b0;
-
- /*
- * Adjust OR3 for size of bank 1
- */
- memctl->memc_or3 |= 15 * size_b1;
- memctl->memc_br3 += (size_b0 + 1);
- }
- }
-
- /* before leaving set all unused i/o pins to outputs */
-
- /*
- * --*Unused Pin List*--
- *
- * group/port bit number
- * IP_B 0,1,3,4,5 Taken care of in pcmcia-cs-x.x.xx
- * PA 5,7,8,9,14,15
- * PB 22,23,31
- * PC 4,5,6,7,10,11,12,13,14,15
- * PD 5,6,7
- *
- */
-
- /*
- * --*Pin Used for I/O List*--
- *
- * port input bit number output bit number either
- * PB 18,26,27
- * PD 3,4 8,9,10,11,12,13,14,15
- *
- */
-
- immap->im_ioport.iop_papar &= ~0x05C3; /* set pins as io */
- immap->im_ioport.iop_padir |= 0x05C3; /* set pins as output */
- immap->im_ioport.iop_paodr &= 0x0008; /* config pins 9 & 14 as normal outputs */
- immap->im_ioport.iop_padat |= 0x05C3; /* set unused pins as high */
-
- immap->im_cpm.cp_pbpar &= ~0x00001331; /* set unused port b pins as io */
- immap->im_cpm.cp_pbdir |= 0x00001331; /* set unused port b pins as output */
- immap->im_cpm.cp_pbodr &= ~0x00001331; /* config bits 18,22,23,26,27 & 31 as normal outputs */
- immap->im_cpm.cp_pbdat |= 0x00001331; /* set T/E LED, /NV_CS, & /POWER_ADJ_CS and the rest to a high */
-
- immap->im_ioport.iop_pcpar &= ~0x0F3F; /* set unused port c pins as io */
- immap->im_ioport.iop_pcdir |= 0x0F3F; /* set unused port c pins as output */
- immap->im_ioport.iop_pcso &= ~0x0F3F; /* clear special purpose bit for unused port c pins for clarity */
- immap->im_ioport.iop_pcdat |= 0x0F3F; /* set unused port c pins high */
-
- immap->im_ioport.iop_pdpar &= 0xE000; /* set pins as io */
- immap->im_ioport.iop_pddir &= 0xE000; /* set bit 3 & 4 as inputs */
- immap->im_ioport.iop_pddir |= 0x07FF; /* set bits 5 - 15 as outputs */
- immap->im_ioport.iop_pddat = 0x0055; /* set alternating pattern on test port */
-
- return (size_b0 + size_b1);
-}
diff --git a/board/esteem192e/flash.c b/board/esteem192e/flash.c
deleted file mode 100644
index 5465deaf97..0000000000
--- a/board/esteem192e/flash.c
+++ /dev/null
@@ -1,1095 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-#ifdef CONFIG_FLASH_16BIT
-#define FLASH_WORD_SIZE unsigned short
-#define FLASH_ID_MASK 0xFFFF
-#else
-#define FLASH_WORD_SIZE unsigned long
-#define FLASH_ID_MASK 0xFFFFFFFF
-#endif
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-
-ulong flash_get_size (volatile FLASH_WORD_SIZE *addr, flash_info_t *info);
-#ifndef CONFIG_FLASH_16BIT
-static int write_word (flash_info_t *info, ulong dest, ulong data);
-#else
-static int write_short (flash_info_t *info, ulong dest, ushort data);
-#endif
-/*int flash_write (uchar *, ulong, ulong); */
-/*flash_info_t *addr2info (ulong); */
-
-static void flash_get_offsets (ulong base, flash_info_t *info);
-
-/*-----------------------------------------------------------------------
- */
-unsigned long flash_init (void)
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- unsigned long size_b0, size_b1;
- int i;
-
- /* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* Static FLASH Bank configuration here - FIXME XXX */
-
- size_b0 = flash_get_size((volatile FLASH_WORD_SIZE *)FLASH_BASE0_PRELIM,
- &flash_info[0]);
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size_b0, size_b0<<20);
- }
-
- size_b1 = flash_get_size((volatile FLASH_WORD_SIZE *)FLASH_BASE1_PRELIM,
- &flash_info[1]);
-
- if (size_b1 > size_b0) {
- printf ("## ERROR: "
- "Bank 1 (0x%08lx = %ld MB) > Bank 0 (0x%08lx = %ld MB)\n",
- size_b1, size_b1<<20,
- size_b0, size_b0<<20
- );
- flash_info[0].flash_id = FLASH_UNKNOWN;
- flash_info[1].flash_id = FLASH_UNKNOWN;
- flash_info[0].sector_count = -1;
- flash_info[1].sector_count = -1;
- flash_info[0].size = 0;
- flash_info[1].size = 0;
- return (0);
- }
-
- /* Remap FLASH according to real size */
- memctl->memc_or0 = CFG_OR_TIMING_FLASH | (-size_b0 & 0xFFFF8000);
- memctl->memc_br0 = CFG_FLASH_BASE | 0x00000801; /* (CFG_FLASH_BASE & BR_BA_MSK) | BR_MS_GPCM | BR_V;*/
-
- /* Re-do sizing to get full correct info */
-
- size_b0 = flash_get_size((volatile FLASH_WORD_SIZE *)CFG_FLASH_BASE,
- &flash_info[0]);
- flash_get_offsets (CFG_FLASH_BASE, &flash_info[0]);
-
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
- /* monitor protection ON by default */
- (void)flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+monitor_flash_len-1,
- &flash_info[0]);
-#endif
-
- if (size_b1) {
- memctl->memc_or1 = CFG_OR_TIMING_FLASH | (-size_b1 & 0xFFFF8000);
- memctl->memc_br1 = (CFG_FLASH_BASE | 0x00000801) + (size_b0 & BR_BA_MSK);
- /*((CFG_FLASH_BASE + size_b0) & BR_BA_MSK) |
- BR_MS_GPCM | BR_V;*/
-
- /* Re-do sizing to get full correct info */
- size_b1 = flash_get_size((volatile FLASH_WORD_SIZE *)(CFG_FLASH_BASE + size_b0),
- &flash_info[1]);
-
- flash_get_offsets (CFG_FLASH_BASE + size_b0, &flash_info[1]);
-
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
- /* monitor protection ON by default */
- (void)flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+monitor_flash_len-1,
- &flash_info[1]);
-#endif
- } else {
- memctl->memc_br1 = 0; /* invalidate bank */
-
- flash_info[1].flash_id = FLASH_UNKNOWN;
- flash_info[1].sector_count = -1;
- }
-
- flash_info[0].size = size_b0;
- flash_info[1].size = size_b1;
-
- return (size_b0 + size_b1);
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_get_offsets (ulong base, flash_info_t *info)
-{
- int i;
-
- /* set up sector start adress table */
- if (info->flash_id & FLASH_BTYPE) {
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
-
-#ifndef CONFIG_FLASH_16BIT
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00004000;
- info->start[2] = base + 0x00008000;
- info->start[3] = base + 0x0000C000;
- info->start[4] = base + 0x00010000;
- info->start[5] = base + 0x00014000;
- info->start[6] = base + 0x00018000;
- info->start[7] = base + 0x0001C000;
- for (i = 8; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00020000) - 0x000E0000;
- }
- }
- else {
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00008000;
- info->start[2] = base + 0x0000C000;
- info->start[3] = base + 0x00010000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00020000) - 0x00060000;
- }
- }
-#else
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00002000;
- info->start[2] = base + 0x00004000;
- info->start[3] = base + 0x00006000;
- info->start[4] = base + 0x00008000;
- info->start[5] = base + 0x0000A000;
- info->start[6] = base + 0x0000C000;
- info->start[7] = base + 0x0000E000;
- for (i = 8; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00010000) - 0x00070000;
- }
- }
- else {
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00004000;
- info->start[2] = base + 0x00006000;
- info->start[3] = base + 0x00008000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00010000) - 0x00030000;
- }
- }
-#endif
- } else {
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
-
-#ifndef CONFIG_FLASH_16BIT
- info->start[i--] = base + info->size - 0x00004000;
- info->start[i--] = base + info->size - 0x00008000;
- info->start[i--] = base + info->size - 0x0000C000;
- info->start[i--] = base + info->size - 0x00010000;
- info->start[i--] = base + info->size - 0x00014000;
- info->start[i--] = base + info->size - 0x00018000;
- info->start[i--] = base + info->size - 0x0001C000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00020000;
- }
-
- } else {
-
- info->start[i--] = base + info->size - 0x00008000;
- info->start[i--] = base + info->size - 0x0000C000;
- info->start[i--] = base + info->size - 0x00010000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00020000;
- }
- }
-#else
- info->start[i--] = base + info->size - 0x00002000;
- info->start[i--] = base + info->size - 0x00004000;
- info->start[i--] = base + info->size - 0x00006000;
- info->start[i--] = base + info->size - 0x00008000;
- info->start[i--] = base + info->size - 0x0000A000;
- info->start[i--] = base + info->size - 0x0000C000;
- info->start[i--] = base + info->size - 0x0000E000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00010000;
- }
-
- } else {
-
- info->start[i--] = base + info->size - 0x00004000;
- info->start[i--] = base + info->size - 0x00006000;
- info->start[i--] = base + info->size - 0x00008000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00010000;
- }
- }
-#endif
- }
-
-
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t *info)
-{
- int i;
- uchar *boottype;
- uchar botboot[]=", bottom boot sect)\n";
- uchar topboot[]=", top boot sector)\n";
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD: printf ("AMD "); break;
- case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
- case FLASH_MAN_SST: printf ("SST "); break;
- case FLASH_MAN_STM: printf ("STM "); break;
- case FLASH_MAN_INTEL: printf ("INTEL "); break;
- default: printf ("Unknown Vendor "); break;
- }
-
- if (info->flash_id & 0x0001 ) {
- boottype = botboot;
- } else {
- boottype = topboot;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM400B: printf ("AM29LV400B (4 Mbit%s",boottype);
- break;
- case FLASH_AM400T: printf ("AM29LV400T (4 Mbit%s",boottype);
- break;
- case FLASH_AM800B: printf ("AM29LV800B (8 Mbit%s",boottype);
- break;
- case FLASH_AM800T: printf ("AM29LV800T (8 Mbit%s",boottype);
- break;
- case FLASH_AM160B: printf ("AM29LV160B (16 Mbit%s",boottype);
- break;
- case FLASH_AM160T: printf ("AM29LV160T (16 Mbit%s",boottype);
- break;
- case FLASH_AM320B: printf ("AM29LV320B (32 Mbit%s",boottype);
- break;
- case FLASH_AM320T: printf ("AM29LV320T (32 Mbit%s",boottype);
- break;
- case FLASH_INTEL800B: printf ("INTEL28F800B (8 Mbit%s",boottype);
- break;
- case FLASH_INTEL800T: printf ("INTEL28F800T (8 Mbit%s",boottype);
- break;
- case FLASH_INTEL160B: printf ("INTEL28F160B (16 Mbit%s",boottype);
- break;
- case FLASH_INTEL160T: printf ("INTEL28F160T (16 Mbit%s",boottype);
- break;
- case FLASH_INTEL320B: printf ("INTEL28F320B (32 Mbit%s",boottype);
- break;
- case FLASH_INTEL320T: printf ("INTEL28F320T (32 Mbit%s",boottype);
- break;
-
-#if 0 /* enable when devices are available */
-
- case FLASH_INTEL640B: printf ("INTEL28F640B (64 Mbit%s",boottype);
- break;
- case FLASH_INTEL640T: printf ("INTEL28F640T (64 Mbit%s",boottype);
- break;
-#endif
-
- default: printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " "
- );
- }
- printf ("\n");
- return;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-ulong flash_get_size (volatile FLASH_WORD_SIZE *addr, flash_info_t *info)
-{
- short i;
- ulong base = (ulong)addr;
- FLASH_WORD_SIZE value;
-
- /* Write auto select command: read Manufacturer ID */
-
-
-#ifndef CONFIG_FLASH_16BIT
-
- /*
- * Note: if it is an AMD flash and the word at addr[0000]
- * is 0x00890089 this routine will think it is an Intel
- * flash device and may(most likely) cause trouble.
- */
-
- addr[0x0000] = 0x00900090;
- if(addr[0x0000] != 0x00890089){
- addr[0x0555] = 0x00AA00AA;
- addr[0x02AA] = 0x00550055;
- addr[0x0555] = 0x00900090;
-#else
-
- /*
- * Note: if it is an AMD flash and the word at addr[0000]
- * is 0x0089 this routine will think it is an Intel
- * flash device and may(most likely) cause trouble.
- */
-
- addr[0x0000] = 0x0090;
-
- if(addr[0x0000] != 0x0089){
- addr[0x0555] = 0x00AA;
- addr[0x02AA] = 0x0055;
- addr[0x0555] = 0x0090;
-#endif
- }
- value = addr[0];
-
- switch (value) {
- case (AMD_MANUFACT & FLASH_ID_MASK):
- info->flash_id = FLASH_MAN_AMD;
- break;
- case (FUJ_MANUFACT & FLASH_ID_MASK):
- info->flash_id = FLASH_MAN_FUJ;
- break;
- case (STM_MANUFACT & FLASH_ID_MASK):
- info->flash_id = FLASH_MAN_STM;
- break;
- case (SST_MANUFACT & FLASH_ID_MASK):
- info->flash_id = FLASH_MAN_SST;
- break;
- case (INTEL_MANUFACT & FLASH_ID_MASK):
- info->flash_id = FLASH_MAN_INTEL;
- break;
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- return (0); /* no or unknown flash */
-
- }
-
- value = addr[1]; /* device ID */
-
- switch (value) {
-
- case (AMD_ID_LV400T & FLASH_ID_MASK):
- info->flash_id += FLASH_AM400T;
- info->sector_count = 11;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case (AMD_ID_LV400B & FLASH_ID_MASK):
- info->flash_id += FLASH_AM400B;
- info->sector_count = 11;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case (AMD_ID_LV800T & FLASH_ID_MASK):
- info->flash_id += FLASH_AM800T;
- info->sector_count = 19;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case (AMD_ID_LV800B & FLASH_ID_MASK):
- info->flash_id += FLASH_AM800B;
- info->sector_count = 19;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case (AMD_ID_LV160T & FLASH_ID_MASK):
- info->flash_id += FLASH_AM160T;
- info->sector_count = 35;
- info->size = 0x00400000;
- break; /* => 4 MB */
-
- case (AMD_ID_LV160B & FLASH_ID_MASK):
- info->flash_id += FLASH_AM160B;
- info->sector_count = 35;
- info->size = 0x00400000;
- break; /* => 4 MB */
-#if 0 /* enable when device IDs are available */
- case (AMD_ID_LV320T & FLASH_ID_MASK):
- info->flash_id += FLASH_AM320T;
- info->sector_count = 67;
- info->size = 0x00800000;
- break; /* => 8 MB */
-
- case (AMD_ID_LV320B & FLASH_ID_MASK):
- info->flash_id += FLASH_AM320B;
- info->sector_count = 67;
- info->size = 0x00800000;
- break; /* => 8 MB */
-#endif
-
- case (INTEL_ID_28F800B3T & FLASH_ID_MASK):
- info->flash_id += FLASH_INTEL800T;
- info->sector_count = 23;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case (INTEL_ID_28F800B3B & FLASH_ID_MASK):
- info->flash_id += FLASH_INTEL800B;
- info->sector_count = 23;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case (INTEL_ID_28F160B3T & FLASH_ID_MASK):
- info->flash_id += FLASH_INTEL160T;
- info->sector_count = 39;
- info->size = 0x00400000;
- break; /* => 4 MB */
-
- case (INTEL_ID_28F160B3B & FLASH_ID_MASK):
- info->flash_id += FLASH_INTEL160B;
- info->sector_count = 39;
- info->size = 0x00400000;
- break; /* => 4 MB */
-
- case (INTEL_ID_28F320B3T & FLASH_ID_MASK):
- info->flash_id += FLASH_INTEL320T;
- info->sector_count = 71;
- info->size = 0x00800000;
- break; /* => 8 MB */
-
- case (INTEL_ID_28F320B3B & FLASH_ID_MASK):
- info->flash_id += FLASH_AM320B;
- info->sector_count = 71;
- info->size = 0x00800000;
- break; /* => 8 MB */
-
-#if 0 /* enable when devices are available */
- case (INTEL_ID_28F320B3T & FLASH_ID_MASK):
- info->flash_id += FLASH_INTEL320T;
- info->sector_count = 135;
- info->size = 0x01000000;
- break; /* => 16 MB */
-
- case (INTEL_ID_28F320B3B & FLASH_ID_MASK):
- info->flash_id += FLASH_AM320B;
- info->sector_count = 135;
- info->size = 0x01000000;
- break; /* => 16 MB */
-#endif
- default:
- info->flash_id = FLASH_UNKNOWN;
- return (0); /* => no or unknown flash */
-
- }
-
- /* set up sector start adress table */
- if (info->flash_id & FLASH_BTYPE) {
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
-
-#ifndef CONFIG_FLASH_16BIT
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00004000;
- info->start[2] = base + 0x00008000;
- info->start[3] = base + 0x0000C000;
- info->start[4] = base + 0x00010000;
- info->start[5] = base + 0x00014000;
- info->start[6] = base + 0x00018000;
- info->start[7] = base + 0x0001C000;
- for (i = 8; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00020000) - 0x000E0000;
- }
- }
- else {
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00008000;
- info->start[2] = base + 0x0000C000;
- info->start[3] = base + 0x00010000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00020000) - 0x00060000;
- }
- }
-#else
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00002000;
- info->start[2] = base + 0x00004000;
- info->start[3] = base + 0x00006000;
- info->start[4] = base + 0x00008000;
- info->start[5] = base + 0x0000A000;
- info->start[6] = base + 0x0000C000;
- info->start[7] = base + 0x0000E000;
- for (i = 8; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00010000) - 0x00070000;
- }
- }
- else {
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00004000;
- info->start[2] = base + 0x00006000;
- info->start[3] = base + 0x00008000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00010000) - 0x00030000;
- }
- }
-#endif
- } else {
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
-
-#ifndef CONFIG_FLASH_16BIT
- info->start[i--] = base + info->size - 0x00004000;
- info->start[i--] = base + info->size - 0x00008000;
- info->start[i--] = base + info->size - 0x0000C000;
- info->start[i--] = base + info->size - 0x00010000;
- info->start[i--] = base + info->size - 0x00014000;
- info->start[i--] = base + info->size - 0x00018000;
- info->start[i--] = base + info->size - 0x0001C000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00020000;
- }
-
- } else {
-
- info->start[i--] = base + info->size - 0x00008000;
- info->start[i--] = base + info->size - 0x0000C000;
- info->start[i--] = base + info->size - 0x00010000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00020000;
- }
- }
-#else
- info->start[i--] = base + info->size - 0x00002000;
- info->start[i--] = base + info->size - 0x00004000;
- info->start[i--] = base + info->size - 0x00006000;
- info->start[i--] = base + info->size - 0x00008000;
- info->start[i--] = base + info->size - 0x0000A000;
- info->start[i--] = base + info->size - 0x0000C000;
- info->start[i--] = base + info->size - 0x0000E000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00010000;
- }
-
- } else {
-
- info->start[i--] = base + info->size - 0x00004000;
- info->start[i--] = base + info->size - 0x00006000;
- info->start[i--] = base + info->size - 0x00008000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00010000;
- }
- }
-#endif
- }
-
- /* check for protected sectors */
- for (i = 0; i < info->sector_count; i++) {
- /* read sector protection at sector address, (A7 .. A0) = 0x02 */
- /* D0 = 1 if protected */
- addr = (volatile FLASH_WORD_SIZE *)(info->start[i]);
- info->protect[i] = addr[2] & 1;
- }
-
- /*
- * Prevent writes to uninitialized FLASH.
- */
- if (info->flash_id != FLASH_UNKNOWN) {
- addr = (volatile FLASH_WORD_SIZE *)info->start[0];
- if( (info->flash_id & 0xFF00) == FLASH_MAN_INTEL){
- *addr = (0x00F000F0 & FLASH_ID_MASK); /* reset bank */
- } else {
- *addr = (0x00FF00FF & FLASH_ID_MASK); /* reset bank */
- }
- }
-
- return (info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
-
- volatile FLASH_WORD_SIZE *addr=(volatile FLASH_WORD_SIZE*)(info->start[0]);
- int flag, prot, sect, l_sect, barf;
- ulong start, now, last;
- int rcode = 0;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- if ((info->flash_id == FLASH_UNKNOWN) ||
- ((info->flash_id > FLASH_AMD_COMP) &&
- ( (info->flash_id & FLASH_VENDMASK) != FLASH_MAN_INTEL ) ) ){
- printf ("Can't erase unknown flash type - aborted\n");
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- l_sect = -1;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
- if(info->flash_id < FLASH_AMD_COMP) {
-#ifndef CONFIG_FLASH_16BIT
- addr[0x0555] = 0x00AA00AA;
- addr[0x02AA] = 0x00550055;
- addr[0x0555] = 0x00800080;
- addr[0x0555] = 0x00AA00AA;
- addr[0x02AA] = 0x00550055;
-#else
- addr[0x0555] = 0x00AA;
- addr[0x02AA] = 0x0055;
- addr[0x0555] = 0x0080;
- addr[0x0555] = 0x00AA;
- addr[0x02AA] = 0x0055;
-#endif
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr = (volatile FLASH_WORD_SIZE *)(info->start[sect]);
- addr[0] = (0x00300030 & FLASH_ID_MASK);
- l_sect = sect;
- }
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- /*
- * We wait for the last triggered sector
- */
- if (l_sect < 0)
- goto DONE;
-
- start = get_timer (0);
- last = start;
- addr = (volatile FLASH_WORD_SIZE*)(info->start[l_sect]);
- while ((addr[0] & (0x00800080&FLASH_ID_MASK)) !=
- (0x00800080&FLASH_ID_MASK) )
- {
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- return 1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- serial_putc ('.');
- last = now;
- }
- }
-
-DONE:
- /* reset to read mode */
- addr = (volatile FLASH_WORD_SIZE *)info->start[0];
- addr[0] = (0x00F000F0 & FLASH_ID_MASK); /* reset bank */
- } else {
-
-
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- barf = 0;
-#ifndef CONFIG_FLASH_16BIT
- addr = (vu_long*)(info->start[sect]);
- addr[0] = 0x00200020;
- addr[0] = 0x00D000D0;
- while(!(addr[0] & 0x00800080)); /* wait for error or finish */
- if( addr[0] & 0x003A003A) { /* check for error */
- barf = addr[0] & 0x003A0000;
- if( barf ) {
- barf >>=16;
- } else {
- barf = addr[0] & 0x0000003A;
- }
- }
-#else
- addr = (vu_short*)(info->start[sect]);
- addr[0] = 0x0020;
- addr[0] = 0x00D0;
- while(!(addr[0] & 0x0080)); /* wait for error or finish */
- if( addr[0] & 0x003A) /* check for error */
- barf = addr[0] & 0x003A;
-#endif
- if(barf) {
- printf("\nFlash error in sector at %lx\n",(unsigned long)addr);
- if(barf & 0x0002) printf("Block locked, not erased.\n");
- if((barf & 0x0030) == 0x0030)
- printf("Command Sequence error.\n");
- if((barf & 0x0030) == 0x0020)
- printf("Block Erase error.\n");
- if(barf & 0x0008) printf("Vpp Low error.\n");
- rcode = 1;
- } else printf(".");
- l_sect = sect;
- }
- addr = (volatile FLASH_WORD_SIZE *)info->start[0];
- addr[0] = (0x00FF00FF & FLASH_ID_MASK); /* reset bank */
-
- }
-
- }
- printf (" done\n");
- return rcode;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
-#ifndef CONFIG_FLASH_16BIT
- ulong cp, wp, data;
- int l;
-#else
- ulong cp, wp;
- ushort data;
-#endif
- int i, rc;
-
-#ifndef CONFIG_FLASH_16BIT
-
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
- for (; i<4 && cnt>0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = 0;
- for (i=0; i<4; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- return (write_word(info, wp, data));
-
-#else
- wp = (addr & ~1); /* get lower word aligned address */
-
- /*
- * handle unaligned start byte
- */
- if (addr - wp) {
- data = 0;
- data = (data << 8) | *src++;
- --cnt;
- if ((rc = write_short(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 2;
- }
-
- /*
- * handle word aligned part
- */
-/* l = 0; used for debuging */
- while (cnt >= 2) {
- data = 0;
- for (i=0; i<2; ++i) {
- data = (data << 8) | *src++;
- }
-
-/* if(!l){
- printf("%x",data);
- l = 1;
- } used for debuging */
-
- if ((rc = write_short(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 2;
- cnt -= 2;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<2 && cnt>0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i<2; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- return (write_short(info, wp, data));
-
-
-#endif
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-#ifndef CONFIG_FLASH_16BIT
-static int write_word (flash_info_t *info, ulong dest, ulong data)
-{
- vu_long *addr = (vu_long*)(info->start[0]);
- ulong start,barf;
- int flag;
-
-
- /* Check if Flash is (sufficiently) erased */
- if ((*((vu_long *)dest) & data) != data) {
- return (2);
- }
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- if(info->flash_id > FLASH_AMD_COMP) {
- /* AMD stuff */
- addr[0x0555] = 0x00AA00AA;
- addr[0x02AA] = 0x00550055;
- addr[0x0555] = 0x00A000A0;
- } else {
- /* intel stuff */
- *addr = 0x00400040;
- }
- *((vu_long *)dest) = data;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* data polling for D7 */
- start = get_timer (0);
-
- if(info->flash_id > FLASH_AMD_COMP) {
-
- while ((*((vu_long *)dest) & 0x00800080) != (data & 0x00800080)) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- return (1);
- }
- }
-
- } else {
-
- while(!(addr[0] & 0x00800080)){ /* wait for error or finish */
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- return (1);
- }
-
- if( addr[0] & 0x003A003A) { /* check for error */
- barf = addr[0] & 0x003A0000;
- if( barf ) {
- barf >>=16;
- } else {
- barf = addr[0] & 0x0000003A;
- }
- printf("\nFlash write error at address %lx\n",(unsigned long)dest);
- if(barf & 0x0002) printf("Block locked, not erased.\n");
- if(barf & 0x0010) printf("Programming error.\n");
- if(barf & 0x0008) printf("Vpp Low error.\n");
- return(2);
- }
-
-
- }
-
- return (0);
-
-}
-
-#else
-
-static int write_short (flash_info_t *info, ulong dest, ushort data)
-{
- vu_short *addr = (vu_short*)(info->start[0]);
- ulong start,barf;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*((vu_short *)dest) & data) != data) {
- return (2);
- }
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- if(info->flash_id < FLASH_AMD_COMP) {
- /* AMD stuff */
- addr[0x0555] = 0x00AA;
- addr[0x02AA] = 0x0055;
- addr[0x0555] = 0x00A0;
- } else {
- /* intel stuff */
- *addr = 0x00D0;
- *addr = 0x0040;
- }
- *((vu_short *)dest) = data;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* data polling for D7 */
- start = get_timer (0);
-
- if(info->flash_id < FLASH_AMD_COMP) {
- /* AMD stuff */
- while ((*((vu_short *)dest) & 0x0080) != (data & 0x0080)) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- return (1);
- }
- }
-
- } else {
- /* intel stuff */
- while(!(addr[0] & 0x0080)){ /* wait for error or finish */
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) return (1);
- }
-
- if( addr[0] & 0x003A) { /* check for error */
- barf = addr[0] & 0x003A;
- printf("\nFlash write error at address %lx\n",(unsigned long)dest);
- if(barf & 0x0002) printf("Block locked, not erased.\n");
- if(barf & 0x0010) printf("Programming error.\n");
- if(barf & 0x0008) printf("Vpp Low error.\n");
- return(2);
- }
- *addr = 0x00B0;
- *addr = 0x0070;
- while(!(addr[0] & 0x0080)){ /* wait for error or finish */
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) return (1);
- }
-
- *addr = 0x00FF;
-
- }
-
- return (0);
-
-}
-
-
-#endif
-
-/*-----------------------------------------------------------------------
- */
diff --git a/board/esteem192e/u-boot.lds b/board/esteem192e/u-boot.lds
deleted file mode 100644
index 4c541bf5c2..0000000000
--- a/board/esteem192e/u-boot.lds
+++ /dev/null
@@ -1,141 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc8xx/start.o (.text)
- common/dlmalloc.o (.text)
- lib_ppc/ppcstring.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
- lib_generic/zlib.o (.text)
-
- . = env_offset;
- common/environment.o(.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/etin/debris/Makefile b/board/etin/debris/Makefile
deleted file mode 100644
index 305a1bfeb0..0000000000
--- a/board/etin/debris/Makefile
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o phantom.o
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/etin/debris/config.mk b/board/etin/debris/config.mk
deleted file mode 100644
index 64debf5ef8..0000000000
--- a/board/etin/debris/config.mk
+++ /dev/null
@@ -1,31 +0,0 @@
-#
-# (C) Copyright 2000, 2001
-# Sangmoon, Etin Systems, dogoil@etinsys.com.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# Debris boards
-#
-
-#TEXT_BASE = 0x00090000
-TEXT_BASE = 0xFFF00000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE)
diff --git a/board/etin/debris/debris.c b/board/etin/debris/debris.c
deleted file mode 100644
index 93c502c9de..0000000000
--- a/board/etin/debris/debris.c
+++ /dev/null
@@ -1,179 +0,0 @@
-/*
- * (C) Copyright 2000
- * Sangmoon Kim, Etin Systems. dogoil@etinsys.com.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc824x.h>
-#include <pci.h>
-#include <i2c.h>
-
-int checkboard (void)
-{
- /*TODO: Check processor type */
-
- puts ( "Board: Debris "
-#ifdef CONFIG_MPC8240
- "8240"
-#endif
-#ifdef CONFIG_MPC8245
- "8245"
-#endif
- " ##Test not implemented yet##\n");
- return 0;
-}
-
-#if 0 /* NOT USED */
-int checkflash (void)
-{
- /* TODO: XXX XXX XXX */
- printf ("## Test not implemented yet ##\n");
-
- return (0);
-}
-#endif
-
-long int initdram (int board_type)
-{
- int m, row, col, bank, i;
- unsigned long start, end;
- uint32_t mccr1;
- uint32_t mear1 = 0, emear1 = 0, msar1 = 0, emsar1 = 0;
- uint32_t mear2 = 0, emear2 = 0, msar2 = 0, emsar2 = 0;
- uint8_t mber = 0;
-
- i2c_init(CFG_I2C_SPEED, CFG_I2C_SLAVE);
-
- if (i2c_reg_read (0x50, 2) != 0x04) return 0; /* Memory type */
- m = i2c_reg_read (0x50, 5); /* # of physical banks */
- row = i2c_reg_read (0x50, 3); /* # of rows */
- col = i2c_reg_read (0x50, 4); /* # of columns */
- bank = i2c_reg_read (0x50, 17); /* # of logical banks */
-
- CONFIG_READ_WORD(MCCR1, mccr1);
- mccr1 &= 0xffff0000;
-
- start = CFG_SDRAM_BASE;
- end = start + (1 << (col + row + 3) ) * bank - 1;
-
- for (i = 0; i < m; i++) {
- mccr1 |= ((row == 13)? 2 : (bank == 4)? 0 : 3) << i * 2;
- if (i < 4) {
- msar1 |= ((start >> 20) & 0xff) << i * 8;
- emsar1 |= ((start >> 28) & 0xff) << i * 8;
- mear1 |= ((end >> 20) & 0xff) << i * 8;
- emear1 |= ((end >> 28) & 0xff) << i * 8;
- } else {
- msar2 |= ((start >> 20) & 0xff) << (i-4) * 8;
- emsar2 |= ((start >> 28) & 0xff) << (i-4) * 8;
- mear2 |= ((end >> 20) & 0xff) << (i-4) * 8;
- emear2 |= ((end >> 28) & 0xff) << (i-4) * 8;
- }
- mber |= 1 << i;
- start += (1 << (col + row + 3) ) * bank;
- end += (1 << (col + row + 3) ) * bank;
- }
- for (; i < 8; i++) {
- if (i < 4) {
- msar1 |= 0xff << i * 8;
- emsar1 |= 0x30 << i * 8;
- mear1 |= 0xff << i * 8;
- emear1 |= 0x30 << i * 8;
- } else {
- msar2 |= 0xff << (i-4) * 8;
- emsar2 |= 0x30 << (i-4) * 8;
- mear2 |= 0xff << (i-4) * 8;
- emear2 |= 0x30 << (i-4) * 8;
- }
- }
-
- CONFIG_WRITE_WORD(MCCR1, mccr1);
- CONFIG_WRITE_WORD(MSAR1, msar1);
- CONFIG_WRITE_WORD(EMSAR1, emsar1);
- CONFIG_WRITE_WORD(MEAR1, mear1);
- CONFIG_WRITE_WORD(EMEAR1, emear1);
- CONFIG_WRITE_WORD(MSAR2, msar2);
- CONFIG_WRITE_WORD(EMSAR2, emsar2);
- CONFIG_WRITE_WORD(MEAR2, mear2);
- CONFIG_WRITE_WORD(EMEAR2, emear2);
- CONFIG_WRITE_BYTE(MBER, mber);
-
- return (1 << (col + row + 3) ) * bank * m;
-}
-
-/*
- * Initialize PCI Devices, report devices found.
- */
-#ifndef CONFIG_PCI_PNP
-static struct pci_config_table pci_debris_config_table[] = {
- { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x0f, PCI_ANY_ID,
- pci_cfgfunc_config_device, { PCI_ENET0_IOADDR,
- PCI_ENET0_MEMADDR,
- PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }},
- { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x10, PCI_ANY_ID,
- pci_cfgfunc_config_device, { PCI_ENET1_IOADDR,
- PCI_ENET1_MEMADDR,
- PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }},
- { }
-};
-#endif
-
-struct pci_controller hose = {
-#ifndef CONFIG_PCI_PNP
- config_table: pci_debris_config_table,
-#endif
-};
-
-void pci_init_board(void)
-{
- pci_mpc824x_init(&hose);
-}
-
-void *nvram_read(void *dest, const long src, size_t count)
-{
- volatile uchar *d = (volatile uchar*) dest;
- volatile uchar *s = (volatile uchar*) src;
- while(count--) {
- *d++ = *s++;
- asm volatile("sync");
- }
- return dest;
-}
-
-void nvram_write(long dest, const void *src, size_t count)
-{
- volatile uchar *d = (volatile uchar*)dest;
- volatile uchar *s = (volatile uchar*)src;
- while(count--) {
- *d++ = *s++;
- asm volatile("sync");
- }
-}
-
-int misc_init_r(void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- /* Write ethernet addr in NVRAM for VxWorks */
- nvram_write(CFG_ENV_ADDR + CFG_NVRAM_VXWORKS_OFFS,
- (char*)&gd->bd->bi_enetaddr[0], 6);
- return 0;
-}
diff --git a/board/etin/debris/flash.c b/board/etin/debris/flash.c
deleted file mode 100644
index a4100e57b6..0000000000
--- a/board/etin/debris/flash.c
+++ /dev/null
@@ -1,720 +0,0 @@
-/*
- * board/eva/flash.c
- *
- * (C) Copyright 2002
- * Sangmoon Kim, Etin Systems, dogoil@etinsys.com.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/processor.h>
-#include <asm/pci_io.h>
-#include <mpc824x.h>
-
-int (*do_flash_erase)(flash_info_t*, uint32_t, uint32_t);
-int (*write_dword)(flash_info_t*, ulong, uint64_t);
-
-typedef uint64_t cfi_word;
-
-#define cfi_read(flash, addr) *((volatile cfi_word*)(flash->start[0] + addr))
-
-#define cfi_write(flash, val, addr) \
- move64((cfi_word*)&val, \
- (cfi_word*)(flash->start[0] + addr))
-
-#define CMD(x) ((((cfi_word)x)<<48)|(((cfi_word)x)<<32)|(((cfi_word)x)<<16)|(((cfi_word)x)))
-
-static void write32(unsigned long addr, uint32_t value)
-{
- *(volatile uint32_t*)(addr) = value;
- asm volatile("sync");
-}
-
-static uint32_t read32(unsigned long addr)
-{
- uint32_t value;
- value = *(volatile uint32_t*)addr;
- asm volatile("sync");
- return value;
-}
-
-static cfi_word cfi_cmd(flash_info_t *flash, uint8_t cmd, uint32_t addr)
-{
- uint32_t base = flash->start[0];
- uint32_t val=(cmd << 16) | cmd;
- addr <<= 3;
- write32(base + addr, val);
- return addr;
-}
-
-static uint16_t cfi_read_query(flash_info_t *flash, uint32_t addr)
-{
- uint32_t base = flash->start[0];
- addr <<= 3;
- return (uint16_t)read32(base + addr);
-}
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-static void move64(uint64_t *src, uint64_t *dest)
-{
- asm volatile("lfd 0, 0(3)\n\t" /* fpr0 = *scr */
- "stfd 0, 0(4)" /* *dest = fpr0 */
- : : : "fr0" ); /* Clobbers fr0 */
- return;
-}
-
-static int cfi_write_dword(flash_info_t *flash, ulong dest, cfi_word data)
-{
- unsigned long start;
- cfi_word status = 0;
-
- status = cfi_read(flash, dest);
- data &= status;
-
- cfi_cmd(flash, 0x40, 0);
- cfi_write(flash, data, dest);
-
- udelay(10);
- start = get_timer (0);
- for(;;) {
- status = cfi_read(flash, dest);
- status &= CMD(0x80);
- if(status == CMD(0x80))
- break;
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- cfi_cmd(flash, 0xff, 0);
- return 1;
- }
- udelay(1);
- }
- cfi_cmd(flash, 0xff, 0);
-
- return 0;
-}
-
-static int jedec_write_dword (flash_info_t *flash, ulong dest, cfi_word data)
-{
- ulong start;
- cfi_word status = 0;
-
- status = cfi_read(flash, dest);
- if(status != CMD(0xffff)) return 2;
-
- cfi_cmd(flash, 0xaa, 0x555);
- cfi_cmd(flash, 0x55, 0x2aa);
- cfi_cmd(flash, 0xa0, 0x555);
-
- cfi_write(flash, data, dest);
-
- udelay(10);
- start = get_timer (0);
- status = ~data;
- while(status != data) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT)
- return 1;
- status = cfi_read(flash, dest);
- udelay(1);
- }
- return 0;
-}
-
-static __inline__ unsigned long get_msr(void)
-{
- unsigned long msr;
- __asm__ __volatile__ ("mfmsr %0" : "=r" (msr) :);
- return msr;
-}
-
-static __inline__ void set_msr(unsigned long msr)
-{
- __asm__ __volatile__ ("mtmsr %0" : : "r" (msr));
-}
-
-int write_buff (flash_info_t *flash, uchar *src, ulong addr, ulong cnt)
-{
- ulong wp;
- int i, s, l, rc;
- cfi_word data;
- uint8_t *t = (uint8_t*)&data;
- unsigned long base = flash->start[0];
- uint32_t msr;
-
- if (flash->flash_id == FLASH_UNKNOWN)
- return 4;
-
- if (cnt == 0)
- return 0;
-
- addr -= base;
-
- msr = get_msr();
- set_msr(msr|MSR_FP);
-
- wp = (addr & ~7); /* get lower word aligned address */
-
- if((addr-wp) != 0) {
- data = cfi_read(flash, wp);
- s = addr & 7;
- l = ( cnt < (8-s) ) ? cnt : (8-s);
- for(i = 0; i < l; i++)
- t[s+i] = *src++;
- if ((rc = write_dword(flash, wp, data)) != 0)
- goto DONE;
- wp += 8;
- cnt -= l;
- }
-
- while (cnt >= 8) {
- for (i = 0; i < 8; i++)
- t[i] = *src++;
- if ((rc = write_dword(flash, wp, data)) != 0)
- goto DONE;
- wp += 8;
- cnt -= 8;
- }
-
- if (cnt == 0) {
- rc = 0;
- goto DONE;
- }
-
- data = cfi_read(flash, wp);
- for(i = 0; i < cnt; i++)
- t[i] = *src++;
- rc = write_dword(flash, wp, data);
-DONE:
- set_msr(msr);
- return rc;
-}
-
-static int cfi_erase_oneblock(flash_info_t *flash, uint32_t sect)
-{
- int sa;
- int flag;
- ulong start, last, now;
- cfi_word status;
-
- flag = disable_interrupts();
-
- sa = (flash->start[sect] - flash->start[0]);
- write32(flash->start[sect], 0x00200020);
- write32(flash->start[sect], 0x00d000d0);
-
- if (flag)
- enable_interrupts();
-
- udelay(1000);
- start = get_timer (0);
- last = start;
-
- for (;;) {
- status = cfi_read(flash, sa);
- status &= CMD(0x80);
- if (status == CMD(0x80))
- break;
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- cfi_cmd(flash, 0xff, 0);
- printf ("Timeout\n");
- return ERR_TIMOUT;
- }
-
- if ((now - last) > 1000) {
- serial_putc ('.');
- last = now;
- }
- udelay(10);
- }
- cfi_cmd(flash, 0xff, 0);
- return ERR_OK;
-}
-
-static int cfi_erase(flash_info_t *flash, uint32_t s_first, uint32_t s_last)
-{
- int sect;
- int rc = ERR_OK;
-
- for (sect = s_first; sect <= s_last; sect++) {
- if (flash->protect[sect] == 0) {
- rc = cfi_erase_oneblock(flash, sect);
- if (rc != ERR_OK) break;
- }
- }
- printf (" done\n");
- return rc;
-}
-
-static int jedec_erase(flash_info_t *flash, uint32_t s_first, uint32_t s_last)
-{
- int sect;
- cfi_word status;
- int sa = -1;
- int flag;
- ulong start, last, now;
-
- flag = disable_interrupts();
-
- cfi_cmd(flash, 0xaa, 0x555);
- cfi_cmd(flash, 0x55, 0x2aa);
- cfi_cmd(flash, 0x80, 0x555);
- cfi_cmd(flash, 0xaa, 0x555);
- cfi_cmd(flash, 0x55, 0x2aa);
- for ( sect = s_first; sect <= s_last; sect++) {
- if (flash->protect[sect] == 0) {
- sa = flash->start[sect] - flash->start[0];
- write32(flash->start[sect], 0x00300030);
- }
- }
- if (flag)
- enable_interrupts();
-
- if (sa < 0)
- goto DONE;
-
- udelay (1000);
- start = get_timer (0);
- last = start;
- for(;;) {
- status = cfi_read(flash, sa);
- if (status == CMD(0xffff))
- break;
-
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- return ERR_TIMOUT;
- }
-
- if ((now - last) > 1000) {
- serial_putc ('.');
- last = now;
- }
- udelay(10);
- }
-DONE:
- cfi_cmd(flash, 0xf0, 0);
-
- printf (" done\n");
-
- return ERR_OK;
-}
-
-int flash_erase (flash_info_t *flash, int s_first, int s_last)
-{
- int sect;
- int prot;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (flash->flash_id == FLASH_UNKNOWN)
- printf ("- missing\n");
- else
- printf ("- no sectors to erase\n");
- return ERR_NOT_ERASED;
- }
- if (flash->flash_id == FLASH_UNKNOWN) {
- printf ("Can't erase unknown flash type - aborted\n");
- return ERR_NOT_ERASED;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; sect++)
- if (flash->protect[sect]) prot++;
-
- if (prot)
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- else
- printf ("\n");
-
- return do_flash_erase(flash, s_first, s_last);
-}
-
-struct jedec_flash_info {
- const uint16_t mfr_id;
- const uint16_t dev_id;
- const char *name;
- const int DevSize;
- const int InterfaceDesc;
- const int NumEraseRegions;
- const ulong regions[4];
-};
-
-#define ERASEINFO(size,blocks) (size<<8)|(blocks-1)
-
-#define SIZE_1MiB 20
-#define SIZE_2MiB 21
-#define SIZE_4MiB 22
-
-static const struct jedec_flash_info jedec_table[] = {
- {
- mfr_id: (uint16_t)AMD_MANUFACT,
- dev_id: (uint16_t)AMD_ID_LV800T,
- name: "AMD AM29LV800T",
- DevSize: SIZE_1MiB,
- NumEraseRegions: 4,
- regions: {ERASEINFO(0x10000,15),
- ERASEINFO(0x08000,1),
- ERASEINFO(0x02000,2),
- ERASEINFO(0x04000,1)
- }
- }, {
- mfr_id: (uint16_t)AMD_MANUFACT,
- dev_id: (uint16_t)AMD_ID_LV800B,
- name: "AMD AM29LV800B",
- DevSize: SIZE_1MiB,
- NumEraseRegions: 4,
- regions: {ERASEINFO(0x10000,15),
- ERASEINFO(0x08000,1),
- ERASEINFO(0x02000,2),
- ERASEINFO(0x04000,1)
- }
- }, {
- mfr_id: (uint16_t)AMD_MANUFACT,
- dev_id: (uint16_t)AMD_ID_LV160T,
- name: "AMD AM29LV160T",
- DevSize: SIZE_2MiB,
- NumEraseRegions: 4,
- regions: {ERASEINFO(0x10000,31),
- ERASEINFO(0x08000,1),
- ERASEINFO(0x02000,2),
- ERASEINFO(0x04000,1)
- }
- }, {
- mfr_id: (uint16_t)AMD_MANUFACT,
- dev_id: (uint16_t)AMD_ID_LV160B,
- name: "AMD AM29LV160B",
- DevSize: SIZE_2MiB,
- NumEraseRegions: 4,
- regions: {ERASEINFO(0x04000,1),
- ERASEINFO(0x02000,2),
- ERASEINFO(0x08000,1),
- ERASEINFO(0x10000,31)
- }
- }, {
- mfr_id: (uint16_t)AMD_MANUFACT,
- dev_id: (uint16_t)AMD_ID_LV320T,
- name: "AMD AM29LV320T",
- DevSize: SIZE_4MiB,
- NumEraseRegions: 2,
- regions: {ERASEINFO(0x10000,63),
- ERASEINFO(0x02000,8)
- }
-
- }, {
- mfr_id: (uint16_t)AMD_MANUFACT,
- dev_id: (uint16_t)AMD_ID_LV320B,
- name: "AMD AM29LV320B",
- DevSize: SIZE_4MiB,
- NumEraseRegions: 2,
- regions: {ERASEINFO(0x02000,8),
- ERASEINFO(0x10000,63)
- }
- }
-};
-
-static ulong cfi_init(uint32_t base, flash_info_t *flash)
-{
- int sector;
- int block;
- int block_count;
- int offset = 0;
- int reverse = 0;
- int primary;
- int mfr_id;
- int dev_id;
-
- flash->start[0] = base;
- cfi_cmd(flash, 0xF0, 0);
- cfi_cmd(flash, 0x98, 0);
- if ( !( cfi_read_query(flash, 0x10) == 'Q' &&
- cfi_read_query(flash, 0x11) == 'R' &&
- cfi_read_query(flash, 0x12) == 'Y' )) {
- cfi_cmd(flash, 0xff, 0);
- return 0;
- }
-
- flash->size = 1 << cfi_read_query(flash, 0x27);
- flash->size *= 4;
- block_count = cfi_read_query(flash, 0x2c);
- primary = cfi_read_query(flash, 0x15);
- if ( cfi_read_query(flash, primary + 4) == 0x30)
- reverse = (cfi_read_query(flash, 0x1) & 0x01);
- else
- reverse = (cfi_read_query(flash, primary+15) == 3);
-
- flash->sector_count = 0;
-
- for ( block = reverse ? block_count - 1 : 0;
- reverse ? block >= 0 : block < block_count;
- reverse ? block-- : block ++) {
- int sector_size =
- (cfi_read_query(flash, 0x2d + block*4+2) |
- (cfi_read_query(flash, 0x2d + block*4+3) << 8)) << 8;
- int sector_count =
- (cfi_read_query(flash, 0x2d + block*4+0) |
- (cfi_read_query(flash, 0x2d + block*4+1) << 8)) + 1;
- for(sector = 0; sector < sector_count; sector++) {
- flash->start[flash->sector_count++] = base + offset;
- offset += sector_size * 4;
- }
- }
- mfr_id = cfi_read_query(flash, 0x00);
- dev_id = cfi_read_query(flash, 0x01);
-
- cfi_cmd(flash, 0xff, 0);
-
- flash->flash_id = (mfr_id << 16) | dev_id;
-
- for (sector = 0; sector < flash->sector_count; sector++) {
- write32(flash->start[sector], 0x00600060);
- write32(flash->start[sector], 0x00d000d0);
- }
- cfi_cmd(flash, 0xff, 0);
-
- for (sector = 0; sector < flash->sector_count; sector++)
- flash->protect[sector] = 0;
-
- do_flash_erase = cfi_erase;
- write_dword = cfi_write_dword;
-
- return flash->size;
-}
-
-static ulong jedec_init(unsigned long base, flash_info_t *flash)
-{
- int i;
- int block, block_count;
- int sector, offset;
- int mfr_id, dev_id;
- flash->start[0] = base;
- cfi_cmd(flash, 0xF0, 0x000);
- cfi_cmd(flash, 0xAA, 0x555);
- cfi_cmd(flash, 0x55, 0x2AA);
- cfi_cmd(flash, 0x90, 0x555);
- mfr_id = cfi_read_query(flash, 0x000);
- dev_id = cfi_read_query(flash, 0x0001);
- cfi_cmd(flash, 0xf0, 0x000);
-
- for(i=0; i<sizeof(jedec_table)/sizeof(struct jedec_flash_info); i++) {
- if((jedec_table[i].mfr_id == mfr_id) &&
- (jedec_table[i].dev_id == dev_id)) {
-
- flash->flash_id = (mfr_id << 16) | dev_id;
- flash->size = 1 << jedec_table[0].DevSize;
- flash->size *= 4;
- block_count = jedec_table[i].NumEraseRegions;
- offset = 0;
- flash->sector_count = 0;
- for (block = 0; block < block_count; block++) {
- int sector_size = jedec_table[i].regions[block];
- int sector_count = (sector_size & 0xff) + 1;
- sector_size >>= 8;
- for (sector=0; sector<sector_count; sector++) {
- flash->start[flash->sector_count++] =
- base + offset;
- offset += sector_size * 4;
- }
- }
- break;
- }
- }
-
- for (sector = 0; sector < flash->sector_count; sector++)
- flash->protect[sector] = 0;
-
- do_flash_erase = jedec_erase;
- write_dword = jedec_write_dword;
-
- return flash->size;
-}
-
-inline void mtibat1u(unsigned int x)
-{
- __asm__ __volatile__ ("mtspr 530, %0" :: "r" (x));
-}
-
-inline void mtibat1l(unsigned int x)
-{
- __asm__ __volatile__ ("mtspr 531, %0" :: "r" (x));
-}
-
-inline void mtdbat1u(unsigned int x)
-{
- __asm__ __volatile__ ("mtspr 538, %0" :: "r" (x));
-}
-
-inline void mtdbat1l(unsigned int x)
-{
- __asm__ __volatile__ ("mtspr 539, %0" :: "r" (x));
-}
-
-unsigned long flash_init (void)
-{
- unsigned long size = 0;
- int i;
- unsigned int msr;
-
- /* BAT1 */
- CONFIG_WRITE_WORD(ERCR3, 0x0C00000C);
- CONFIG_WRITE_WORD(ERCR4, 0x0800000C);
- msr = get_msr();
- set_msr(msr & ~(MSR_IR | MSR_DR));
- mtibat1l(0x70000000 | BATL_PP_10 | BATL_CACHEINHIBIT);
- mtibat1u(0x70000000 | BATU_BL_256M | BATU_VS | BATU_VP);
- mtdbat1l(0x70000000 | BATL_PP_10 | BATL_CACHEINHIBIT);
- mtdbat1u(0x70000000 | BATU_BL_256M | BATU_VS | BATU_VP);
- set_msr(msr);
-
- for (i = 0; i < CFG_MAX_FLASH_BANKS; i++)
- flash_info[i].flash_id = FLASH_UNKNOWN;
- size = cfi_init(FLASH_BASE0_PRELIM, &flash_info[0]);
- if (!size)
- size = jedec_init(FLASH_BASE0_PRELIM, &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN)
- printf ("# Unknown FLASH on Bank 1 - Size = 0x%08lx = %ld MB\n",
- size, size<<20);
-
- return size;
-}
-
-void flash_print_info (flash_info_t *flash)
-{
- int i;
- int k;
- int size;
- int erased;
- volatile unsigned long *p;
-
- if (flash->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- flash_init();
- }
-
- if (flash->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (((flash->flash_id) >> 16) & 0xff) {
- case 0x01:
- printf ("AMD ");
- break;
- case 0x04:
- printf("FUJITSU ");
- break;
- case 0x20:
- printf("STM ");
- break;
- case 0xBF:
- printf("SST ");
- break;
- case 0x89:
- case 0xB0:
- printf("INTEL ");
- break;
- default:
- printf ("Unknown Vendor ");
- break;
- }
-
- switch ((flash->flash_id) & 0xffff) {
- case (uint16_t)AMD_ID_LV800T:
- printf ("AM29LV800T\n");
- break;
- case (uint16_t)AMD_ID_LV800B:
- printf ("AM29LV800B\n");
- break;
- case (uint16_t)AMD_ID_LV160T:
- printf ("AM29LV160T\n");
- break;
- case (uint16_t)AMD_ID_LV160B:
- printf ("AM29LV160B\n");
- break;
- case (uint16_t)AMD_ID_LV320T:
- printf ("AM29LV320T\n");
- break;
- case (uint16_t)AMD_ID_LV320B:
- printf ("AM29LV320B\n");
- break;
- case (uint16_t)INTEL_ID_28F800C3T:
- printf ("28F800C3T\n");
- break;
- case (uint16_t)INTEL_ID_28F800C3B:
- printf ("28F800C3B\n");
- break;
- case (uint16_t)INTEL_ID_28F160C3T:
- printf ("28F160C3T\n");
- break;
- case (uint16_t)INTEL_ID_28F160C3B:
- printf ("28F160C3B\n");
- break;
- case (uint16_t)INTEL_ID_28F320C3T:
- printf ("28F320C3T\n");
- break;
- case (uint16_t)INTEL_ID_28F320C3B:
- printf ("28F320C3B\n");
- break;
- case (uint16_t)INTEL_ID_28F640C3T:
- printf ("28F640C3T\n");
- break;
- case (uint16_t)INTEL_ID_28F640C3B:
- printf ("28F640C3B\n");
- break;
- default:
- printf ("Unknown Chip Type\n");
- break;
- }
-
- if (flash->size >= (1 << 20)) {
- printf (" Size: %ld MB in %d Sectors\n",
- flash->size >> 20, flash->sector_count);
- } else {
- printf (" Size: %ld kB in %d Sectors\n",
- flash->size >> 10, flash->sector_count);
- }
-
- printf (" Sector Start Addresses:");
- for (i = 0; i < flash->sector_count; ++i) {
- /* Check if whole sector is erased*/
- if (i != (flash->sector_count-1))
- size = flash->start[i+1] - flash->start[i];
- else
- size = flash->start[0] + flash->size - flash->start[i];
-
- erased = 1;
- p = (volatile unsigned long *)flash->start[i];
- size = size >> 2; /* divide by 4 for longword access */
- for (k=0; k<size; k++) {
- if (*p++ != 0xffffffff) {
- erased = 0;
- break;
- }
- }
-
- if ((i % 5) == 0)
- printf ("\n ");
-
- printf (" %08lX%s%s",
- flash->start[i],
- erased ? " E" : " ",
- flash->protect[i] ? "RO " : " ");
- }
- printf ("\n");
-}
diff --git a/board/etin/debris/phantom.c b/board/etin/debris/phantom.c
deleted file mode 100644
index 0b81fc0c3a..0000000000
--- a/board/etin/debris/phantom.c
+++ /dev/null
@@ -1,310 +0,0 @@
-/*
- * board/eva/phantom.c
- *
- * Phantom RTC device driver for EVA
- *
- * Author: Sangmoon Kim
- * dogoil@etinsys.com
- *
- * Copyright 2002 Etinsys Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-
-#include <common.h>
-#include <command.h>
-#include <rtc.h>
-
-#if (CONFIG_COMMANDS & CFG_CMD_DATE)
-
-#define RTC_BASE (CFG_NVRAM_BASE_ADDR + 0x7fff8)
-
-#define RTC_YEAR ( RTC_BASE + 7 )
-#define RTC_MONTH ( RTC_BASE + 6 )
-#define RTC_DAY_OF_MONTH ( RTC_BASE + 5 )
-#define RTC_DAY_OF_WEEK ( RTC_BASE + 4 )
-#define RTC_HOURS ( RTC_BASE + 3 )
-#define RTC_MINUTES ( RTC_BASE + 2 )
-#define RTC_SECONDS ( RTC_BASE + 1 )
-#define RTC_CENTURY ( RTC_BASE + 0 )
-
-#define RTC_CONTROLA RTC_CENTURY
-#define RTC_CONTROLB RTC_SECONDS
-#define RTC_CONTROLC RTC_DAY_OF_WEEK
-
-#define RTC_CA_WRITE 0x80
-#define RTC_CA_READ 0x40
-
-#define RTC_CB_OSC_DISABLE 0x80
-
-#define RTC_CC_BATTERY_FLAG 0x80
-#define RTC_CC_FREQ_TEST 0x40
-
-
-static int phantom_flag = -1;
-static int century_flag = -1;
-
-static uchar rtc_read(unsigned int addr)
-{
- return *(volatile unsigned char *)(addr);
-}
-
-static void rtc_write(unsigned int addr, uchar val)
-{
- *(volatile unsigned char *)(addr) = val;
-}
-
-static unsigned char phantom_rtc_sequence[] = {
- 0xc5, 0x3a, 0xa3, 0x5c, 0xc5, 0x3a, 0xa3, 0x5c
-};
-
-static unsigned char* phantom_rtc_read(int addr, unsigned char rtc[8])
-{
- int i, j;
- unsigned char v;
- unsigned char save = rtc_read(addr);
-
- for (j = 0; j < 8; j++) {
- v = phantom_rtc_sequence[j];
- for (i = 0; i < 8; i++) {
- rtc_write(addr, v & 1);
- v >>= 1;
- }
- }
- for (j = 0; j < 8; j++) {
- v = 0;
- for (i = 0; i < 8; i++) {
- if(rtc_read(addr) & 1)
- v |= 1 << i;
- }
- rtc[j] = v;
- }
- rtc_write(addr, save);
- return rtc;
-}
-
-static void phantom_rtc_write(int addr, unsigned char rtc[8])
-{
- int i, j;
- unsigned char v;
- unsigned char save = rtc_read(addr);
- for (j = 0; j < 8; j++) {
- v = phantom_rtc_sequence[j];
- for (i = 0; i < 8; i++) {
- rtc_write(addr, v & 1);
- v >>= 1;
- }
- }
- for (j = 0; j < 8; j++) {
- v = rtc[j];
- for (i = 0; i < 8; i++) {
- rtc_write(addr, v & 1);
- v >>= 1;
- }
- }
- rtc_write(addr, save);
-}
-
-static int get_phantom_flag(void)
-{
- int i;
- unsigned char rtc[8];
-
- phantom_rtc_read(RTC_BASE, rtc);
-
- for(i = 1; i < 8; i++) {
- if (rtc[i] != rtc[0])
- return 1;
- }
- return 0;
-}
-
-void rtc_reset(void)
-{
- if (phantom_flag < 0)
- phantom_flag = get_phantom_flag();
-
- if (phantom_flag) {
- unsigned char rtc[8];
- phantom_rtc_read(RTC_BASE, rtc);
- if(rtc[4] & 0x30) {
- printf( "real-time-clock was stopped. Now starting...\n" );
- rtc[4] &= 0x07;
- phantom_rtc_write(RTC_BASE, rtc);
- }
- } else {
- uchar reg_a, reg_b, reg_c;
- reg_a = rtc_read( RTC_CONTROLA );
- reg_b = rtc_read( RTC_CONTROLB );
-
- if ( reg_b & RTC_CB_OSC_DISABLE )
- {
- printf( "real-time-clock was stopped. Now starting...\n" );
- reg_a |= RTC_CA_WRITE;
- reg_b &= ~RTC_CB_OSC_DISABLE;
- rtc_write( RTC_CONTROLA, reg_a );
- rtc_write( RTC_CONTROLB, reg_b );
- }
-
- /* make sure read/write clock register bits are cleared */
- reg_a &= ~( RTC_CA_WRITE | RTC_CA_READ );
- rtc_write( RTC_CONTROLA, reg_a );
-
- reg_c = rtc_read( RTC_CONTROLC );
- if (( reg_c & RTC_CC_BATTERY_FLAG ) == 0 )
- printf( "RTC battery low. Clock setting may not be reliable.\n");
- }
-}
-
-inline unsigned bcd2bin (uchar n)
-{
- return ((((n >> 4) & 0x0F) * 10) + (n & 0x0F));
-}
-
-inline unsigned char bin2bcd (unsigned int n)
-{
- return (((n / 10) << 4) | (n % 10));
-}
-
-static int get_century_flag(void)
-{
- int flag = 0;
- int bcd, century;
- bcd = rtc_read( RTC_CENTURY );
- century = bcd2bin( bcd & 0x3F );
- rtc_write( RTC_CENTURY, bin2bcd(century+1));
- if (bcd == rtc_read( RTC_CENTURY ))
- flag = 1;
- rtc_write( RTC_CENTURY, bcd);
- return flag;
-}
-
-void rtc_get( struct rtc_time *tmp)
-{
- if (phantom_flag < 0)
- phantom_flag = get_phantom_flag();
-
- if (phantom_flag)
- {
- unsigned char rtc[8];
-
- phantom_rtc_read(RTC_BASE, rtc);
-
- tmp->tm_sec = bcd2bin(rtc[1] & 0x7f);
- tmp->tm_min = bcd2bin(rtc[2] & 0x7f);
- tmp->tm_hour = bcd2bin(rtc[3] & 0x1f);
- tmp->tm_wday = bcd2bin(rtc[4] & 0x7);
- tmp->tm_mday = bcd2bin(rtc[5] & 0x3f);
- tmp->tm_mon = bcd2bin(rtc[6] & 0x1f);
- tmp->tm_year = bcd2bin(rtc[7]) + 1900;
- tmp->tm_yday = 0;
- tmp->tm_isdst = 0;
-
- if( (rtc[3] & 0x80) && (rtc[3] & 0x40) ) tmp->tm_hour += 12;
- if (tmp->tm_year < 1970) tmp->tm_year += 100;
- } else {
- uchar sec, min, hour;
- uchar mday, wday, mon, year;
-
- int century;
-
- uchar reg_a;
-
- if (century_flag < 0)
- century_flag = get_century_flag();
-
- reg_a = rtc_read( RTC_CONTROLA );
- /* lock clock registers for read */
- rtc_write( RTC_CONTROLA, ( reg_a | RTC_CA_READ ));
-
- sec = rtc_read( RTC_SECONDS );
- min = rtc_read( RTC_MINUTES );
- hour = rtc_read( RTC_HOURS );
- mday = rtc_read( RTC_DAY_OF_MONTH );
- wday = rtc_read( RTC_DAY_OF_WEEK );
- mon = rtc_read( RTC_MONTH );
- year = rtc_read( RTC_YEAR );
- century = rtc_read( RTC_CENTURY );
-
- /* unlock clock registers after read */
- rtc_write( RTC_CONTROLA, ( reg_a & ~RTC_CA_READ ));
-
- tmp->tm_sec = bcd2bin( sec & 0x7F );
- tmp->tm_min = bcd2bin( min & 0x7F );
- tmp->tm_hour = bcd2bin( hour & 0x3F );
- tmp->tm_mday = bcd2bin( mday & 0x3F );
- tmp->tm_mon = bcd2bin( mon & 0x1F );
- tmp->tm_wday = bcd2bin( wday & 0x07 );
-
- if (century_flag) {
- tmp->tm_year = bcd2bin( year ) +
- ( bcd2bin( century & 0x3F ) * 100 );
- } else {
- tmp->tm_year = bcd2bin( year ) + 1900;
- if (tmp->tm_year < 1970) tmp->tm_year += 100;
- }
-
- tmp->tm_yday = 0;
- tmp->tm_isdst= 0;
- }
-}
-
-void rtc_set( struct rtc_time *tmp )
-{
- if (phantom_flag < 0)
- phantom_flag = get_phantom_flag();
-
- if (phantom_flag) {
- uint year;
- unsigned char rtc[8];
-
- year = tmp->tm_year;
- year -= (year < 2000) ? 1900 : 2000;
-
- rtc[0] = bin2bcd(0);
- rtc[1] = bin2bcd(tmp->tm_sec);
- rtc[2] = bin2bcd(tmp->tm_min);
- rtc[3] = bin2bcd(tmp->tm_hour);
- rtc[4] = bin2bcd(tmp->tm_wday);
- rtc[5] = bin2bcd(tmp->tm_mday);
- rtc[6] = bin2bcd(tmp->tm_mon);
- rtc[7] = bin2bcd(year);
-
- phantom_rtc_write(RTC_BASE, rtc);
- } else {
- uchar reg_a;
- if (century_flag < 0)
- century_flag = get_century_flag();
-
- /* lock clock registers for write */
- reg_a = rtc_read( RTC_CONTROLA );
- rtc_write( RTC_CONTROLA, ( reg_a | RTC_CA_WRITE ));
-
- rtc_write( RTC_MONTH, bin2bcd( tmp->tm_mon ));
-
- rtc_write( RTC_DAY_OF_WEEK, bin2bcd( tmp->tm_wday ));
- rtc_write( RTC_DAY_OF_MONTH, bin2bcd( tmp->tm_mday ));
- rtc_write( RTC_HOURS, bin2bcd( tmp->tm_hour ));
- rtc_write( RTC_MINUTES, bin2bcd( tmp->tm_min ));
- rtc_write( RTC_SECONDS, bin2bcd( tmp->tm_sec ));
-
- /* break year up into century and year in century */
- if (century_flag) {
- rtc_write( RTC_YEAR, bin2bcd( tmp->tm_year % 100 ));
- rtc_write( RTC_CENTURY, bin2bcd( tmp->tm_year / 100 ));
- reg_a &= 0xc0;
- reg_a |= bin2bcd( tmp->tm_year / 100 );
- } else {
- rtc_write(RTC_YEAR, bin2bcd(tmp->tm_year -
- ((tmp->tm_year < 2000) ? 1900 : 2000)));
- }
-
- /* unlock clock registers after read */
- rtc_write( RTC_CONTROLA, ( reg_a & ~RTC_CA_WRITE ));
- }
-}
-
-#endif
diff --git a/board/etin/debris/speed.h b/board/etin/debris/speed.h
deleted file mode 100644
index b66393bec5..0000000000
--- a/board/etin/debris/speed.h
+++ /dev/null
@@ -1,54 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*-----------------------------------------------------------------------
- * Timer value for timer 2, ICLK = 10
- *
- * SPEED_FCOUNT2 = GCLK / (16 * (TIMER_TMR_PS + 1))
- * SPEED_TMR3_PS = (GCLK / (16 * SPEED_FCOUNT3)) - 1
- *
- * SPEED_FCOUNT2 timer 2 counting frequency
- * GCLK CPU clock
- * SPEED_TMR2_PS prescaler
- */
-#define SPEED_TMR2_PS (250 - 1) /* divide by 250 */
-
-/*-----------------------------------------------------------------------
- * Timer value for PIT
- *
- * PIT_TIME = SPEED_PITC / PITRTCLK
- * PITRTCLK = 8192
- */
-#define SPEED_PITC (82 << 16) /* start counting from 82 */
-
-/*
- * The new value for PTA is calculated from
- *
- * PTA = (gclk * Trefresh) / (2 ^ (2 * DFBRG) * PTP * NCS)
- *
- * gclk CPU clock (not bus clock !)
- * Trefresh Refresh cycle * 4 (four word bursts used)
- * DFBRG For normal mode (no clock reduction) always 0
- * PTP Prescaler (already adjusted for no. of banks and 4K / 8K refresh)
- * NCS Number of SDRAM banks (chip selects) on this UPM.
- */
diff --git a/board/etin/debris/u-boot.lds b/board/etin/debris/u-boot.lds
deleted file mode 100644
index c742bcd247..0000000000
--- a/board/etin/debris/u-boot.lds
+++ /dev/null
@@ -1,132 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc824x/start.o (.text)
- lib_ppc/board.o (.text)
- lib_ppc/ppcstring.o (.text)
-
- . = DEFINED(env_offset) ? env_offset : .;
- common/environment.o (.text)
-
- *(.text)
-
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
-
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/etx094/Makefile b/board/etx094/Makefile
deleted file mode 100644
index 13ce9fc9d2..0000000000
--- a/board/etx094/Makefile
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/etx094/config.mk b/board/etx094/config.mk
deleted file mode 100644
index 655c2db456..0000000000
--- a/board/etx094/config.mk
+++ /dev/null
@@ -1,28 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# ETX_094 Boards
-#
-
-TEXT_BASE = 0x40000000
diff --git a/board/etx094/etx094.c b/board/etx094/etx094.c
deleted file mode 100644
index dba3c1181e..0000000000
--- a/board/etx094/etx094.c
+++ /dev/null
@@ -1,386 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-
-/* ------------------------------------------------------------------------- */
-
-static long int dram_size (long int, long int *, long int);
-static void read_hw_vers (void);
-
-/* ------------------------------------------------------------------------- */
-
-#define _NOT_USED_ 0xFFFFFFFF
-
-const uint sdram_table[] = {
-
- /* single read (offset 0x00 in upm ram) */
-
- 0xEECEFC24, 0x100DFC24, 0xE02FBC04, 0x01AA7C04,
- 0x1FB5FC00, 0xFFFFFC05, _NOT_USED_, _NOT_USED_,
-
- /* burst read (offset 0x08 in upm ram) */
-
- 0xEECEFC24, 0x100DFC24, 0xE0FFBC04, 0x10FF7C04,
- 0xF0FFFC00, 0xF0FFFC00, 0xF0FFFC00, 0xFFFFFC00,
- 0xFFFFFC05, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /* single write (offset 0x18 in upm ram) */
-
- 0xEECEFC24, 0x100DFC24, 0xE02BBC04, 0x01A27C00,
- 0xEFAAFC04, 0x1FB5FC05, _NOT_USED_, _NOT_USED_,
-
- /* burst write (offset 0x20 in upm ram) */
-
- 0xEECEFC24, 0x103DFC24, 0xE0FBBC00, 0x10F77C00,
- 0xF0FFFC00, 0xF0FFFC00, 0xF0FFFC04, 0xFFFFFC05,
-
- /* init part1 (offset 0x28 in upm ram) */
-
- 0xEFFAFC3C, 0x1FF4FC34, 0xEFFCBC34, 0x1FFC3C34,
- 0xFFFC3C35, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /* refresh (offset 0x30 in upm ram) */
-
- 0xEFFEBC0C, 0x1FFD7C04, 0xFFFFFC04, 0xFFFFFC05,
-
- /* init part2 (offset 0x34 in upm ram) */
-
- 0xFFFEBC04, 0xEFFC3CB4, 0x1FFC3C34, 0xFFFC3C34,
- 0xFFFC3C34, 0xEFE83CB4, 0x1FB57C35, _NOT_USED_,
-
- /* exception (offset 0x3C in upm ram) */
-
- 0xFFFFFC05, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
-};
-
-/* ------------------------------------------------------------------------- */
-
-
-/*
- * Check Board Identity:
- *
- * Test ETX ID string (ETX_xxx...)
- *
- * Return 1 always.
- */
-
-int checkboard (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- char *s = getenv ("serial#");
- char *e;
-
- puts ("Board: ");
-
-#ifdef SB_ETX094
- gd->board_type = 0; /* 0 = 2SDRAM-Device */
-#else
- gd->board_type = 1; /* 1 = 1SDRAM-Device */
-#endif
-
- if (!s || strncmp (s, "ETX_", 4)) {
- puts ("### No HW ID - assuming ETX_094\n");
- read_hw_vers ();
- return (0);
- }
-
- for (e = s; *e; ++e) {
- if (*e == ' ')
- break;
- }
-
- for (; s < e; ++s) {
- putc (*s);
- }
- putc ('\n');
-
- read_hw_vers ();
- return (0);
-}
-
-/* ------------------------------------------------------------------------- */
-
-long int initdram (int board_type)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- long int size_b0, size_b1, size8, size9;
-
- upmconfig (UPMA, (uint *) sdram_table,
- sizeof (sdram_table) / sizeof (uint));
-
- /*
- * Preliminary prescaler for refresh (depends on number of
- * banks): This value is selected for four cycles every 62.4 us
- * with two SDRAM banks or four cycles every 31.2 us with one
- * bank. It will be adjusted after memory sizing.
- */
- memctl->memc_mptpr = CFG_MPTPR_1BK_4K; /* MPTPR_PTP_DIV32 0x0200 */
-
- /* A3(SDRAM)=0 => Bursttype = Sequential
- * A2-A0(SDRAM)=010 => Burst length = 4
- * A4-A6(SDRAM)=010 => CasLat=2
- */
- memctl->memc_mar = 0x00000088;
-
- /*
- * Map controller banks 2 and 3 to the SDRAM banks 2 and 3 at
- * preliminary addresses - these have to be modified after the
- * SDRAM size has been determined.
- */
- memctl->memc_or2 = CFG_OR2_PRELIM;
- memctl->memc_br2 = CFG_BR2_PRELIM;
-
- if (board_type == 0) { /* "L" type boards have only one bank SDRAM */
- memctl->memc_or3 = CFG_OR3_PRELIM;
- memctl->memc_br3 = CFG_BR3_PRELIM;
- }
-
- memctl->memc_mamr = CFG_MAMR_8COL & (~(MAMR_PTAE)); /* no refresh yet */
-
- udelay (200);
-
- /* perform SDRAM initializsation sequence */
-
- memctl->memc_mcr = 0x80004128; /* SDRAM bank 0 (CS2) - Init Part 1 */
- memctl->memc_mcr = 0x80004734; /* SDRAM bank 0 (CS2) - Init Part 2 */
- udelay (1);
-
- if (board_type == 0) { /* "L" type boards have only one bank SDRAM */
- memctl->memc_mcr = 0x80006128; /* SDRAM bank 1 (CS3) - Init Part 1 */
- memctl->memc_mcr = 0x80006734; /* SDRAM bank 1 (CS3) - Init Part 2 */
- udelay (1);
- }
-
- memctl->memc_mamr |= MAMR_PTAE; /* enable refresh */
-
- udelay (1000);
-
- /*
- * Check Bank 0 Memory Size for re-configuration
- *
- * try 8 column mode
- */
- size8 = dram_size (CFG_MAMR_8COL, (long *) SDRAM_BASE2_PRELIM,
- SDRAM_MAX_SIZE);
-
- udelay (1000);
-
- /*
- * try 9 column mode
- */
- size9 = dram_size (CFG_MAMR_9COL, (long *) SDRAM_BASE2_PRELIM,
- SDRAM_MAX_SIZE);
-
- if (size8 < size9) { /* leave configuration at 9 columns */
- size_b0 = size9;
-/* debug ("SDRAM Bank 0 in 9 column mode: %ld MB\n", size >> 20); */
- } else { /* back to 8 columns */
- size_b0 = size8;
- memctl->memc_mamr = CFG_MAMR_8COL;
- udelay (500);
-/* debug ("SDRAM Bank 0 in 8 column mode: %ld MB\n", size >> 20); */
- }
-
- if (board_type == 0) { /* "L" type boards have only one bank SDRAM */
- /*
- * Check Bank 1 Memory Size
- * use current column settings
- * [9 column SDRAM may also be used in 8 column mode,
- * but then only half the real size will be used.]
- */
- size_b1 =
- dram_size (memctl->memc_mamr, (long *) SDRAM_BASE3_PRELIM,
- SDRAM_MAX_SIZE);
-/* debug ("SDRAM Bank 1: %ld MB\n", size8 >> 20); */
- } else {
- size_b1 = 0;
- }
-
- udelay (1000);
-
- /*
- * Adjust refresh rate depending on SDRAM type, both banks
- * For types > 128 MBit leave it at the current (fast) rate
- */
- if ((size_b0 < 0x02000000) && (size_b1 < 0x02000000)) {
- /* reduce to 15.6 us (62.4 us / quad) */
- memctl->memc_mptpr = CFG_MPTPR_2BK_4K; /*DIV16 */
- udelay (1000);
- }
-
- /*
- * Final mapping: map bigger bank first
- */
- if (size_b1 > size_b0) { /* SDRAM Bank 1 is bigger - map first */
-
- memctl->memc_or3 = ((-size_b1) & 0xFFFF0000) | CFG_OR_TIMING_SDRAM;
- memctl->memc_br3 =
- (CFG_SDRAM_BASE & BR_BA_MSK) | BR_MS_UPMA | BR_V;
-
- if (size_b0 > 0) {
- /*
- * Position Bank 0 immediately above Bank 1
- */
- memctl->memc_or2 =
- ((-size_b0) & 0xFFFF0000) | CFG_OR_TIMING_SDRAM;
- memctl->memc_br2 =
- ((CFG_SDRAM_BASE & BR_BA_MSK) | BR_MS_UPMA | BR_V)
- + size_b1;
- } else {
- unsigned long reg;
-
- /*
- * No bank 0
- *
- * invalidate bank
- */
- memctl->memc_br2 = 0;
-
- /* adjust refresh rate depending on SDRAM type, one bank */
- reg = memctl->memc_mptpr;
- reg >>= 1; /* reduce to CFG_MPTPR_1BK_8K / _4K */
- memctl->memc_mptpr = reg;
- }
-
- } else { /* SDRAM Bank 0 is bigger - map first */
-
- memctl->memc_or2 = ((-size_b0) & 0xFFFF0000) | CFG_OR_TIMING_SDRAM;
- memctl->memc_br2 =
- (CFG_SDRAM_BASE & BR_BA_MSK) | BR_MS_UPMA | BR_V;
-
- if (size_b1 > 0) {
- /*
- * Position Bank 1 immediately above Bank 0
- */
- memctl->memc_or3 =
- ((-size_b1) & 0xFFFF0000) | CFG_OR_TIMING_SDRAM;
- memctl->memc_br3 =
- ((CFG_SDRAM_BASE & BR_BA_MSK) | BR_MS_UPMA | BR_V)
- + size_b0;
- } else {
- unsigned long reg;
-
- /*
- * No bank 1
- *
- * invalidate bank
- */
- memctl->memc_br3 = 0;
-
- /* adjust refresh rate depending on SDRAM type, one bank */
- reg = memctl->memc_mptpr;
- reg >>= 1; /* reduce to CFG_MPTPR_1BK_8K / _4K */
- memctl->memc_mptpr = reg;
- }
- }
-
- udelay (10000);
-
- return (size_b0 + size_b1);
-}
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Check memory range for valid RAM. A simple memory test determines
- * the actually available RAM size between addresses `base' and
- * `base + maxsize'. Some (not all) hardware errors are detected:
- * - short between address lines
- * - short between data lines
- */
-
-static long int dram_size (long int mamr_value, long int *base,
- long int maxsize)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
-
- memctl->memc_mamr = mamr_value;
-
- return (get_ram_size(base, maxsize));
-}
-
-/* ------------------------------------------------------------------------- */
-
-/* HW-ID Table (Bits: 2^9;2^7;2^5) */
-#define HW_ID_0 0x0000
-#define HW_ID_1 0x0020
-#define HW_ID_2 0x0080
-#define HW_ID_3 0x00a0
-#define HW_ID_4 0x0200
-#define HW_ID_5 0x0220
-#define HW_ID_6 0x0280
-#define HW_ID_7 0x02a0
-
-void read_hw_vers ()
-{
- unsigned short rd_msk = 0x02A0;
-
- /* HW-ID pin-definition */
- volatile immap_t *immr = (immap_t *) CFG_IMMR;
-
- immr->im_ioport.iop_pddir &= ~(rd_msk);
- immr->im_ioport.iop_pdpar &= ~(rd_msk);
-
- /* debug printf("State of PD: %x\n",immr->im_ioport.iop_pddat); */
-
- /* Check the HW-ID */
- printf ("HW-Version: ");
- switch (immr->im_ioport.iop_pddat & rd_msk) {
- case HW_ID_0:
- printf ("V0.1 - V0.3 / W97238-Q3162-A1-1-2\n");
- break;
- case HW_ID_1:
- printf ("V0.9 / W50037-Q1-D6-1\n");
- break;
- case HW_ID_2:
- printf ("NOT USED - assuming ID#2\n");
- break;
- case HW_ID_3:
- printf ("NOT USED - assuming ID#3\n");
- break;
- case HW_ID_4:
- printf ("NOT USED - assuming ID#4\n");
- break;
- case HW_ID_5:
- printf ("NOT USED - assuming ID#5\n");
- break;
- case HW_ID_6:
- printf ("NOT USED - assuming ID#6\n");
- break;
- case HW_ID_7:
- printf ("NOT USED - assuming ID#7\n");
- break;
- default:
- printf ("###Error###\n");
- break;
- }
-}
-
-/* ------------------------------------------------------------------------- */
diff --git a/board/etx094/flash.c b/board/etx094/flash.c
deleted file mode 100644
index 98a7c0c8d7..0000000000
--- a/board/etx094/flash.c
+++ /dev/null
@@ -1,744 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (vu_long *addr, flash_info_t *info);
-static int write_word (flash_info_t *info, ulong dest, ulong data);
-static void flash_get_offsets (ulong base, flash_info_t *info);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- unsigned long size_b0, size_b1;
- int i;
-
- /* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* Static FLASH Bank configuration here - FIXME XXX */
-
- size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size_b0, size_b0<<20);
- }
-
- size_b1 = flash_get_size((vu_long *)FLASH_BASE1_PRELIM, &flash_info[1]);
-
- if (size_b1 > size_b0) {
- printf ("## ERROR: "
- "Bank 1 (0x%08lx = %ld MB) > Bank 0 (0x%08lx = %ld MB)\n",
- size_b1, size_b1<<20,
- size_b0, size_b0<<20
- );
- flash_info[0].flash_id = FLASH_UNKNOWN;
- flash_info[1].flash_id = FLASH_UNKNOWN;
- flash_info[0].sector_count = -1;
- flash_info[1].sector_count = -1;
- flash_info[0].size = 0;
- flash_info[1].size = 0;
- return (0);
- }
-
- /* Remap FLASH according to real size */
- memctl->memc_or0 = CFG_OR_TIMING_FLASH | (-size_b0 & 0xFFFF8000);
-#ifdef CONFIG_FLASH_16BIT
- memctl->memc_br0 = (CFG_FLASH_BASE & BR_BA_MSK) | BR_MS_GPCM | BR_V | BR_PS_16; /* 16 Bit data port */
-#else
- memctl->memc_br0 = (CFG_FLASH_BASE & BR_BA_MSK) | BR_MS_GPCM | BR_V;
-#endif
-
- /* Re-do sizing to get full correct info */
- size_b0 = flash_get_size((vu_long *)CFG_FLASH_BASE, &flash_info[0]);
-
- flash_get_offsets (CFG_FLASH_BASE, &flash_info[0]);
-
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
- /* monitor protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+monitor_flash_len-1,
- &flash_info[0]);
-#endif
-
- if (size_b1) {
- memctl->memc_or1 = CFG_OR_TIMING_FLASH | (-size_b1 & 0xFFFF8000);
-#ifdef CONFIG_FLASH_16BIT
- memctl->memc_br1 = ((CFG_FLASH_BASE + size_b0) & BR_BA_MSK) |
- BR_MS_GPCM | BR_V | BR_PS_16;
-#else
- memctl->memc_br1 = ((CFG_FLASH_BASE + size_b0) & BR_BA_MSK) |
- BR_MS_GPCM | BR_V;
-#endif
-
- /* Re-do sizing to get full correct info */
- size_b1 = flash_get_size((vu_long *)(CFG_FLASH_BASE + size_b0),
- &flash_info[1]);
-
- flash_get_offsets (CFG_FLASH_BASE + size_b0, &flash_info[1]);
-
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
- /* monitor protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+monitor_flash_len-1,
- &flash_info[1]);
-#endif
- } else {
- memctl->memc_br1 = 0; /* invalidate bank */
-
- flash_info[1].flash_id = FLASH_UNKNOWN;
- flash_info[1].sector_count = -1;
- }
-
- flash_info[0].size = size_b0;
- flash_info[1].size = size_b1;
-
- return (size_b0 + size_b1);
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_get_offsets (ulong base, flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- return;
- }
-
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) {
- for (i = 0; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00002000);
- }
- return;
- }
-
- /* set up sector start address table */
- if (info->flash_id & FLASH_BTYPE) {
- /* set sector offsets for bottom boot block type */
-#ifdef CONFIG_FLASH_16BIT
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00004000;
- info->start[2] = base + 0x00006000;
- info->start[3] = base + 0x00008000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00010000) - 0x00030000;
-#else
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00008000;
- info->start[2] = base + 0x0000C000;
- info->start[3] = base + 0x00010000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00020000) - 0x00060000;
-#endif
- }
- } else {
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- info->start[i--] = base + info->size - 0x00008000;
- info->start[i--] = base + info->size - 0x0000C000;
- info->start[i--] = base + info->size - 0x00010000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00020000;
- }
- }
-
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD: printf ("AMD "); break;
- case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
- case FLASH_MAN_SST: printf ("SST "); break;
- case FLASH_MAN_STM: printf ("STM "); break;
- default: printf ("Unknown Vendor "); break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM400B: printf ("AM29LV400B (4 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM400T: printf ("AM29LV400T (4 Mbit, top boot sector)\n");
- break;
- case FLASH_AM800B: printf ("AM29LV800B (8 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM800T: printf ("AM29LV800T (8 Mbit, top boot sector)\n");
- break;
- case FLASH_AM160B: printf ("AM29LV160B (16 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM160T: printf ("AM29LV160T (16 Mbit, top boot sector)\n");
- break;
- case FLASH_AM320B: printf ("AM29LV320B (32 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM320T: printf ("AM29LV320T (32 Mbit, top boot sector)\n");
- break;
- case FLASH_SST200A: printf ("39xF200A (2M = 128K x 16)\n");
- break;
- case FLASH_SST400A: printf ("39xF400A (4M = 256K x 16)\n");
- break;
- case FLASH_SST800A: printf ("39xF800A (8M = 512K x 16)\n");
- break;
- case FLASH_STM800AB: printf ("M29W800AB (8M = 512K x 16)\n");
- break;
- default: printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " "
- );
- }
- printf ("\n");
- return;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-
-static ulong flash_get_size (vu_long *addr, flash_info_t *info)
-{
- short i;
- ulong value;
- ulong base = (ulong)addr;
-
- /* Write auto select command: read Manufacturer ID */
-#ifdef CONFIG_FLASH_16BIT
- vu_short *s_addr = (vu_short*)addr;
- s_addr[0x5555] = 0x00AA;
- s_addr[0x2AAA] = 0x0055;
- s_addr[0x5555] = 0x0090;
- value = s_addr[0];
- value = value|(value<<16);
-#else
- addr[0x5555] = 0x00AA00AA;
- addr[0x2AAA] = 0x00550055;
- addr[0x5555] = 0x00900090;
- value = addr[0];
-#endif
-
- switch (value) {
- case AMD_MANUFACT:
- info->flash_id = FLASH_MAN_AMD;
- break;
- case FUJ_MANUFACT:
- info->flash_id = FLASH_MAN_FUJ;
- break;
- case SST_MANUFACT:
- info->flash_id = FLASH_MAN_SST;
- break;
- case STM_MANUFACT:
- info->flash_id = FLASH_MAN_STM;
- break;
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- return (0); /* no or unknown flash */
- }
-#ifdef CONFIG_FLASH_16BIT
- value = s_addr[1];
- value = value|(value<<16);
-#else
- value = addr[1]; /* device ID */
-#endif
-
- switch (value) {
- case AMD_ID_LV400T:
- info->flash_id += FLASH_AM400T;
- info->sector_count = 11;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case AMD_ID_LV400B:
- info->flash_id += FLASH_AM400B;
- info->sector_count = 11;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case AMD_ID_LV800T:
- info->flash_id += FLASH_AM800T;
- info->sector_count = 19;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case AMD_ID_LV800B:
- info->flash_id += FLASH_AM800B;
-#ifdef CONFIG_FLASH_16BIT
- info->sector_count = 19;
- info->size = 0x00100000; /* => 1 MB */
-#else
- info->sector_count = 19;
- info->size = 0x00200000; /* => 2 MB */
-#endif
- break;
-
- case AMD_ID_LV160T:
- info->flash_id += FLASH_AM160T;
- info->sector_count = 35;
- info->size = 0x00400000;
- break; /* => 4 MB */
-
- case AMD_ID_LV160B:
- info->flash_id += FLASH_AM160B;
-#ifdef CONFIG_FLASH_16BIT
- info->sector_count = 35;
- info->size = 0x00200000; /* => 2 MB */
-#else
- info->sector_count = 35;
- info->size = 0x00400000; /* => 4 MB */
-#endif
-
- break;
-#if 0 /* enable when device IDs are available */
- case AMD_ID_LV320T:
- info->flash_id += FLASH_AM320T;
- info->sector_count = 67;
- info->size = 0x00800000;
- break; /* => 8 MB */
-
- case AMD_ID_LV320B:
- info->flash_id += FLASH_AM320B;
- info->sector_count = 67;
- info->size = 0x00800000;
- break; /* => 8 MB */
-#endif
- case SST_ID_xF200A:
- info->flash_id += FLASH_SST200A;
- info->sector_count = 64; /* 39xF200A ID ( 2M = 128K x 16 ) */
- info->size = 0x00080000;
- break;
- case SST_ID_xF400A:
- info->flash_id += FLASH_SST400A;
- info->sector_count = 128; /* 39xF400A ID ( 4M = 256K x 16 ) */
- info->size = 0x00100000;
- break;
- case SST_ID_xF800A:
- info->flash_id += FLASH_SST800A;
- info->sector_count = 256; /* 39xF800A ID ( 8M = 512K x 16 ) */
- info->size = 0x00200000;
- break; /* => 2 MB */
- case STM_ID_x800AB:
- info->flash_id += FLASH_STM800AB;
- info->sector_count = 19;
- info->size = 0x00200000;
- break; /* => 2 MB */
- default:
- info->flash_id = FLASH_UNKNOWN;
- return (0); /* => no or unknown flash */
-
- }
-
- if (info->sector_count > CFG_MAX_FLASH_SECT) {
- printf ("** ERROR: sector count %d > max (%d) **\n",
- info->sector_count, CFG_MAX_FLASH_SECT);
- info->sector_count = CFG_MAX_FLASH_SECT;
- }
-
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) {
- for (i = 0; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00002000);
- }
- } else { /* AMD and Fujitsu types */
- /* set up sector start address table */
- if (info->flash_id & FLASH_BTYPE) {
- /* set sector offsets for bottom boot block type */
-#ifdef CONFIG_FLASH_16BIT
-
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00004000;
- info->start[2] = base + 0x00006000;
- info->start[3] = base + 0x00008000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00010000) - 0x00030000;
-#else
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00008000;
- info->start[2] = base + 0x0000C000;
- info->start[3] = base + 0x00010000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00020000) - 0x00060000;
-#endif
- }
- } else {
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- info->start[i--] = base + info->size - 0x00008000;
- info->start[i--] = base + info->size - 0x0000C000;
- info->start[i--] = base + info->size - 0x00010000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00020000;
- }
- }
-
- /* check for protected sectors */
- for (i = 0; i < info->sector_count; i++) {
- /* read sector protection at sector address:
- * (A7 .. A0) = 0x02
- * D0 = 1 if protected
- */
-#ifdef CONFIG_FLASH_16BIT
- s_addr = (volatile unsigned short *)(info->start[i]);
- info->protect[i] = s_addr[2] & 1;
-#else
- addr = (volatile unsigned long *)(info->start[i]);
- info->protect[i] = addr[2] & 1;
-#endif
- }
- }
-
- /*
- * Prevent writes to uninitialized FLASH.
- */
- if (info->flash_id != FLASH_UNKNOWN) {
-#ifdef CONFIG_FLASH_16BIT
- s_addr = (volatile unsigned short *)(info->start[0]);
- *s_addr = 0x00F0; /* reset bank */
-#else
- addr = (volatile unsigned long *)info->start[0];
- *addr = 0x00F000F0; /* reset bank */
-#endif
-
- }
- return (info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- vu_long *addr = (vu_long*)(info->start[0]);
- int flag, prot, sect;
- ulong start, now, last;
-#ifdef CONFIG_FLASH_16BIT
- vu_short *s_addr = (vu_short*)addr;
-#endif
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-/*#ifndef CONFIG_FLASH_16BIT
- ulong type;
- type = (info->flash_id & FLASH_VENDMASK);
- if ((type != FLASH_MAN_SST) && (type != FLASH_MAN_STM)) {
- printf ("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- return;
- }
-#endif*/
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- start = get_timer (0);
- last = start;
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
-#ifdef CONFIG_FLASH_16BIT
- vu_short *s_sect_addr = (vu_short*)(info->start[sect]);
-#else
- vu_long *sect_addr = (vu_long*)(info->start[sect]);
-#endif
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
-#ifdef CONFIG_FLASH_16BIT
-
- /*printf("\ns_sect_addr=%x",s_sect_addr);*/
- s_addr[0x5555] = 0x00AA;
- s_addr[0x2AAA] = 0x0055;
- s_addr[0x5555] = 0x0080;
- s_addr[0x5555] = 0x00AA;
- s_addr[0x2AAA] = 0x0055;
- s_sect_addr[0] = 0x0030;
-#else
- addr[0x5555] = 0x00AA00AA;
- addr[0x2AAA] = 0x00550055;
- addr[0x5555] = 0x00800080;
- addr[0x5555] = 0x00AA00AA;
- addr[0x2AAA] = 0x00550055;
- sect_addr[0] = 0x00300030;
-#endif
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
-#ifdef CONFIG_FLASH_16BIT
- while ((s_sect_addr[0] & 0x0080) != 0x0080) {
-#else
- while ((sect_addr[0] & 0x00800080) != 0x00800080) {
-#endif
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- return 1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- }
- }
- }
-
- /* reset to read mode */
- addr = (volatile unsigned long *)info->start[0];
-#ifdef CONFIG_FLASH_16BIT
- s_addr[0] = 0x00F0; /* reset bank */
-#else
- addr[0] = 0x00F000F0; /* reset bank */
-#endif
-
- printf (" done\n");
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- * 4 - Flash not identified
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int i, l, rc;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- return 4;
- }
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
- for (; i<4 && cnt>0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = 0;
- for (i=0; i<4; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- return (write_word(info, wp, data));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word (flash_info_t *info, ulong dest, ulong data)
-{
- vu_long *addr = (vu_long*)(info->start[0]);
-
-#ifdef CONFIG_FLASH_16BIT
- vu_short high_data;
- vu_short low_data;
- vu_short *s_addr = (vu_short*)addr;
-#endif
- ulong start;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*((vu_long *)dest) & data) != data) {
- return (2);
- }
-
-#ifdef CONFIG_FLASH_16BIT
- /* Write the 16 higher-bits */
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- high_data = ((data>>16) & 0x0000ffff);
-
- s_addr[0x5555] = 0x00AA;
- s_addr[0x2AAA] = 0x0055;
- s_addr[0x5555] = 0x00A0;
-
- *((vu_short *)dest) = high_data;
-
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* data polling for D7 */
- start = get_timer (0);
- while ((*((vu_short *)dest) & 0x0080) != (high_data & 0x0080)) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- return (1);
- }
- }
-
-
- /* Write the 16 lower-bits */
-#endif
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-#ifdef CONFIG_FLASH_16BIT
- dest += 0x2;
- low_data = (data & 0x0000ffff);
-
- s_addr[0x5555] = 0x00AA;
- s_addr[0x2AAA] = 0x0055;
- s_addr[0x5555] = 0x00A0;
- *((vu_short *)dest) = low_data;
-
-#else
- addr[0x5555] = 0x00AA00AA;
- addr[0x2AAA] = 0x00550055;
- addr[0x5555] = 0x00A000A0;
- *((vu_long *)dest) = data;
-#endif
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* data polling for D7 */
- start = get_timer (0);
-
-#ifdef CONFIG_FLASH_16BIT
- while ((*((vu_short *)dest) & 0x0080) != (low_data & 0x0080)) {
-#else
- while ((*((vu_long *)dest) & 0x00800080) != (data & 0x00800080)) {
-#endif
-
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- return (1);
- }
- }
- return (0);
-}
-
-/*-----------------------------------------------------------------------
- */
diff --git a/board/etx094/u-boot.lds b/board/etx094/u-boot.lds
deleted file mode 100644
index c50db8f8c8..0000000000
--- a/board/etx094/u-boot.lds
+++ /dev/null
@@ -1,143 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc8xx/start.o (.text)
- cpu/mpc8xx/traps.o (.text)
- cpu/mpc8xx/interrupts.o (.text)
- cpu/mpc8xx/serial.o (.text)
- cpu/mpc8xx/cpu_init.o (.text)
- cpu/mpc8xx/speed.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/crc32.o (.text)
- lib_generic/zlib.o (.text)
-
- . = env_offset;
- common/environment.o(.text)
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/etx094/u-boot.lds.debug b/board/etx094/u-boot.lds.debug
deleted file mode 100644
index e4d8b10913..0000000000
--- a/board/etx094/u-boot.lds.debug
+++ /dev/null
@@ -1,144 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc8xx/start.o (.text)
- cpu/mpc8xx/traps.o (.text)
- cpu/mpc8xx/interrupts.o (.text)
- cpu/mpc8xx/cpu.o (.text)
- cpu/mpc8xx/cpu_init.o (.text)
- cpu/mpc8xx/speed.o (.text)
- cpu/mpc8xx/serial.o (.text)
- lib_ppc/extable.o (.text)
- lib_ppc/ppcstring.o (.text)
- lib_generic/string.o (.text)
- lib_generic/crc32.o (.text)
- common/dlmalloc.o (.text)
- . = env_offset;
- common/environment.o(.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/evb4510/Makefile b/board/evb4510/Makefile
deleted file mode 100644
index 10850a95e4..0000000000
--- a/board/evb4510/Makefile
+++ /dev/null
@@ -1,47 +0,0 @@
-#
-# (C) Copyright 2000-2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := evb4510.o flash.o
-SOBJS := lowlevel_init.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $^
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/evb4510/config.mk b/board/evb4510/config.mk
deleted file mode 100644
index 4d1a019c2c..0000000000
--- a/board/evb4510/config.mk
+++ /dev/null
@@ -1,27 +0,0 @@
-#
-# Copyright (c) 2004 Cucy Systems (http://www.cucy.com)
-# Curt Brune <curt@cucy.com>
-#
-# (C) Copyright 2000-2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-TEXT_BASE = 0x007d0000
diff --git a/board/evb4510/evb4510.c b/board/evb4510/evb4510.c
deleted file mode 100644
index 0008e5a000..0000000000
--- a/board/evb4510/evb4510.c
+++ /dev/null
@@ -1,65 +0,0 @@
-/*
- * Copyright (c) 2004 Cucy Systems (http://www.cucy.com)
- * Curt Brune <curt@cucy.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/hardware.h>
-#include <command.h>
-
-#ifdef CONFIG_EVB4510
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Miscelaneous platform dependent initialisations
- */
-
-int board_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- icache_enable();
-
- /* address for the kernel command line */
- gd->bd->bi_boot_params = 0x800;
-
- /* enable board LEDs for output */
- PUT_REG( REG_IOPDATA, 0x0);
- PUT_REG( REG_IOPMODE, 0xFFFF);
- PUT_REG( REG_IOPDATA, 0xFF);
-
- return 0;
-}
-
-int dram_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
-#if CONFIG_NR_DRAM_BANKS == 2
- gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
- gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
-#endif
- return 0;
-}
-
-#endif
diff --git a/board/evb4510/flash.c b/board/evb4510/flash.c
deleted file mode 100644
index aff92f95e9..0000000000
--- a/board/evb4510/flash.c
+++ /dev/null
@@ -1,539 +0,0 @@
-/*
- *
- * Copyright (c) 2004 Cucy Systems (http://www.cucy.com)
- * Curt Brune <curt@cucy.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/hardware.h>
-#include <flash.h>
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
-
-typedef enum {
- FLASH_DEV_U9_512KB = 0,
- FLASH_DEV_U7_2MB = 1
-} FLASH_DEV;
-
-#define FLASH_DQ7 (0x80)
-#define FLASH_DQ5 (0x20)
-
-#define PROG_ADDR (0xAAA)
-#define SETUP_ADDR (0xAAA)
-#define ID_ADDR (0xAAA)
-#define UNLOCK_ADDR1 (0xAAA)
-#define UNLOCK_ADDR2 (0x555)
-
-#define UNLOCK_CMD1 (0xAA)
-#define UNLOCK_CMD2 (0x55)
-#define ERASE_SUSPEND_CMD (0xB0)
-#define ERASE_RESUME_CMD (0x30)
-#define RESET_CMD (0xF0)
-#define ID_CMD (0x90)
-#define SELECT_CMD (0x90)
-#define CHIPERASE_CMD (0x10)
-#define BYPASS_CMD (0x20)
-#define SECERASE_CMD (0x30)
-#define PROG_CMD (0xa0)
-#define SETUP_CMD (0x80)
-
-#if 0
-#define WRITE_UNLOCK(addr) { \
- PUT__U8( addr + UNLOCK_ADDR1, UNLOCK_CMD1); \
- PUT__U8( addr + UNLOCK_ADDR2, UNLOCK_CMD2); \
-}
-
-/* auto select command */
-#define CMD_ID(addr) WRITE_UNLOCK(addr); { \
- PUT__U8( addr + ID_ADDR, ID_CMD); \
-}
-
-#define CMD_RESET(addr) WRITE_UNLOCK(addr); { \
- PUT__U8( addr + ID_ADDR, RESET_CMD); \
-}
-
-#define CMD_ERASE_SEC(base, addr) WRITE_UNLOCK(base); \
- PUT__U8( base + SETUP_ADDR, SETUP_CMD); \
- WRITE_UNLOCK(base); \
- PUT__U8( addr, SECERASE_CMD);
-
-#define CMD_ERASE_CHIP(base) WRITE_UNLOCK(base); \
- PUT__U8( base + SETUP_ADDR, SETUP_CMD); \
- WRITE_UNLOCK(base); \
- PUT__U8( base + SETUP_ADDR, CHIPERASE_CMD);
-
-/* prepare for bypass programming */
-#define CMD_UNLOCK_BYPASS(addr) WRITE_UNLOCK(addr); { \
- PUT__U8( addr + ID_ADDR, 0x20); \
-}
-
-/* terminate bypass programming */
-#define CMD_BYPASS_RESET(addr) { \
- PUT__U8(addr, 0x90); \
- PUT__U8(addr, 0x00); \
-}
-#endif
-
-inline static void FLASH_CMD_UNLOCK (FLASH_DEV dev, u32 base)
-{
- switch (dev) {
- case FLASH_DEV_U7_2MB:
- PUT__U8 (base + 0xAAA, 0xAA);
- PUT__U8 (base + 0x555, 0x55);
- break;
- case FLASH_DEV_U9_512KB:
- PUT__U8 (base + 0x555, 0xAA);
- PUT__U8 (base + 0x2AA, 0x55);
- break;
- }
-}
-
-inline static void FLASH_CMD_SELECT (FLASH_DEV dev, u32 base)
-{
- switch (dev) {
- case FLASH_DEV_U7_2MB:
- FLASH_CMD_UNLOCK (dev, base);
- PUT__U8 (base + 0xAAA, SELECT_CMD);
- break;
- case FLASH_DEV_U9_512KB:
- FLASH_CMD_UNLOCK (dev, base);
- PUT__U8 (base + 0x555, SELECT_CMD);
- break;
- }
-}
-
-inline static void FLASH_CMD_RESET (FLASH_DEV dev, u32 base)
-{
- switch (dev) {
- case FLASH_DEV_U7_2MB:
- FLASH_CMD_UNLOCK (dev, base);
- PUT__U8 (base + 0xAAA, RESET_CMD);
- break;
- case FLASH_DEV_U9_512KB:
- FLASH_CMD_UNLOCK (dev, base);
- PUT__U8 (base + 0x555, RESET_CMD);
- break;
- }
-}
-
-inline static void FLASH_CMD_ERASE_SEC (FLASH_DEV dev, u32 base, u32 addr)
-{
- switch (dev) {
- case FLASH_DEV_U7_2MB:
- FLASH_CMD_UNLOCK (dev, base);
- PUT__U8 (base + 0xAAA, SETUP_CMD);
- FLASH_CMD_UNLOCK (dev, base);
- PUT__U8 (addr, SECERASE_CMD);
- break;
- case FLASH_DEV_U9_512KB:
- FLASH_CMD_UNLOCK (dev, base);
- PUT__U8 (base + 0x555, SETUP_CMD);
- FLASH_CMD_UNLOCK (dev, base);
- PUT__U8 (addr, SECERASE_CMD);
- break;
- }
-}
-
-inline static void FLASH_CMD_ERASE_CHIP (FLASH_DEV dev, u32 base)
-{
- switch (dev) {
- case FLASH_DEV_U7_2MB:
- FLASH_CMD_UNLOCK (dev, base);
- PUT__U8 (base + 0xAAA, SETUP_CMD);
- FLASH_CMD_UNLOCK (dev, base);
- PUT__U8 (base, CHIPERASE_CMD);
- break;
- case FLASH_DEV_U9_512KB:
- FLASH_CMD_UNLOCK (dev, base);
- PUT__U8 (base + 0x555, SETUP_CMD);
- FLASH_CMD_UNLOCK (dev, base);
- PUT__U8 (base, CHIPERASE_CMD);
- break;
- }
-}
-
-inline static void FLASH_CMD_UNLOCK_BYPASS (FLASH_DEV dev, u32 base)
-{
- switch (dev) {
- case FLASH_DEV_U7_2MB:
- FLASH_CMD_UNLOCK (dev, base);
- PUT__U8 (base + 0xAAA, BYPASS_CMD);
- break;
- case FLASH_DEV_U9_512KB:
- FLASH_CMD_UNLOCK (dev, base);
- PUT__U8 (base + 0x555, BYPASS_CMD);
- break;
- }
-}
-
-inline static void FLASH_CMD_BYPASS_RESET (FLASH_DEV dev, u32 base)
-{
- PUT__U8 (base, SELECT_CMD);
- PUT__U8 (base, 0x0);
-}
-
-/* poll for flash command completion */
-static u16 _flash_poll (FLASH_DEV dev, u32 addr, u16 data, ulong timeOut)
-{
- u32 done = 0;
- ulong t0;
-
- u16 error = 0;
- volatile u16 flashData;
-
- data = data & 0xFF;
- t0 = get_timer (0);
- while (get_timer (t0) < timeOut) {
- /* for( i = 0; i < POLL_LOOPS; i++) { */
- /* Read the Data */
- flashData = GET__U8 (addr);
-
- /* FLASH_DQ7 = Data? */
- if ((flashData & FLASH_DQ7) == (data & FLASH_DQ7)) {
- done = 1;
- break;
- }
-
- /* Check Timeout (FLASH_DQ5==1) */
- if (flashData & FLASH_DQ5) {
- /* Read the Data */
- flashData = GET__U8 (addr);
-
- /* FLASH_DQ7 = Data? */
- if (!((flashData & FLASH_DQ7) == (data & FLASH_DQ7))) {
- printf ("_flash_poll(): FLASH_DQ7 & flashData not equal to write value\n");
- error = ERR_PROG_ERROR;
- }
- FLASH_CMD_RESET (dev, addr);
- done = 1;
- break;
- }
- /* spin delay */
- udelay (10);
- }
-
-
- /* error update */
- if (!done) {
- printf ("_flash_poll(): Timeout\n");
- error = ERR_TIMOUT;
- }
-
- /* Check the data */
- if (!error) {
- /* Read the Data */
- flashData = GET__U8 (addr);
- if (flashData != data) {
- error = ERR_PROG_ERROR;
- printf ("_flash_poll(): flashData(0x%04x) not equal to data(0x%04x)\n",
- flashData, data);
- }
- }
-
- return error;
-}
-
-/*-----------------------------------------------------------------------
- */
-static int _flash_check_protection (flash_info_t * info, int s_first, int s_last)
-{
- int sect, prot = 0;
-
- for (sect = s_first; sect <= s_last; sect++)
- if (info->protect[sect]) {
- printf (" Flash sector %d protected.\n", sect);
- prot++;
- }
- return prot;
-}
-
-static int _detectFlash (FLASH_DEV dev, u32 base, u8 venId, u8 devId)
-{
-
- u32 baseAddr = base | CACHE_DISABLE_MASK;
- u8 vendorId, deviceId;
-
- /* printf(__FUNCTION__"(): detecting flash @ 0x%08x\n", base); */
-
- /* Send auto select command and read manufacturer info */
- FLASH_CMD_SELECT (dev, baseAddr);
- vendorId = GET__U8 (baseAddr);
- FLASH_CMD_RESET (dev, baseAddr);
-
- /* Send auto select command and read device info */
- FLASH_CMD_SELECT (dev, baseAddr);
-
- if (dev == FLASH_DEV_U7_2MB) {
- deviceId = GET__U8 (baseAddr + 2);
- } else if (dev == FLASH_DEV_U9_512KB) {
- deviceId = GET__U8 (baseAddr + 1);
- } else {
- return 0;
- }
-
- FLASH_CMD_RESET (dev, baseAddr);
-
- /* printf (__FUNCTION__"(): found vendorId 0x%04x, deviceId 0x%04x\n",
- vendorId, deviceId);
- */
-
- return (vendorId == venId) && (deviceId == devId);
-
-}
-
-/******************************************************************************
- *
- * Public u-boot interface functions below
- *
- *****************************************************************************/
-
-/***************************************************************************
- *
- * Flash initialization
- *
- * This board has two banks of flash, but the base addresses depend on
- * how the board is jumpered.
- *
- * The two flash types are:
- *
- * AMD Am29LV160DB (2MB) sectors layout 16KB, 2x8KB, 32KB, 31x64KB
- *
- * AMD Am29LV040B (512KB) sectors: 8x64KB
- *****************************************************************************/
-
-unsigned long flash_init (void)
-{
- flash_info_t *info;
- u16 i;
- u32 flashtest;
- s16 amd160 = -1;
- u32 amd160base = 0;
-
-#if CFG_MAX_FLASH_BANKS == 2
- s16 amd040 = -1;
- u32 amd040base = 0;
-#endif
-
- /* configure PHYS_FLASH_1 */
- if (_detectFlash (FLASH_DEV_U7_2MB, PHYS_FLASH_1, 0x1, 0x49)) {
- amd160 = 0;
- amd160base = PHYS_FLASH_1;
-#if CFG_MAX_FLASH_BANKS == 1
- }
-#else
- if (_detectFlash
- (FLASH_DEV_U9_512KB, PHYS_FLASH_2, 0x1, 0x4F)) {
- amd040 = 1;
- amd040base = PHYS_FLASH_2;
- } else {
- printf (__FUNCTION__
- "(): Unable to detect PHYS_FLASH_2: 0x%08x\n",
- PHYS_FLASH_2);
- }
- } else if (_detectFlash (FLASH_DEV_U9_512KB, PHYS_FLASH_1, 0x1, 0x4F)) {
- amd040 = 0;
- amd040base = PHYS_FLASH_1;
- if (_detectFlash (FLASH_DEV_U7_2MB, PHYS_FLASH_2, 0x1, 0x49)) {
- amd160 = 1;
- amd160base = PHYS_FLASH_2;
- } else {
- printf (__FUNCTION__
- "(): Unable to detect PHYS_FLASH_2: 0x%08x\n",
- PHYS_FLASH_2);
- }
- }
-#endif
- else {
- printf ("flash_init(): Unable to detect PHYS_FLASH_1: 0x%08x\n",
- PHYS_FLASH_1);
- }
-
- /* Configure AMD Am29LV160DB (2MB) */
- info = &flash_info[amd160];
- info->flash_id = FLASH_DEV_U7_2MB;
- info->sector_count = 35;
- info->size = 2 * 1024 * 1024; /* 2MB */
- /* 1*16K Boot Block
- 2*8K Parameter Block
- 1*32K Small Main Block */
- info->start[0] = amd160base;
- info->start[1] = amd160base + 0x4000;
- info->start[2] = amd160base + 0x6000;
- info->start[3] = amd160base + 0x8000;
- for (i = 1; i < info->sector_count; i++)
- info->start[3 + i] = amd160base + i * (64 * 1024);
-
- for (i = 0; i < info->sector_count; i++) {
- /* Write auto select command sequence and query sector protection */
- FLASH_CMD_SELECT (info->flash_id,
- info->start[i] | CACHE_DISABLE_MASK);
- flashtest =
- GET__U8 (((info->start[i] + 4) | CACHE_DISABLE_MASK));
- FLASH_CMD_RESET (info->flash_id,
- amd160base | CACHE_DISABLE_MASK);
- info->protect[i] = (flashtest & 0x0001);
- }
-
- /*
- * protect monitor and environment sectors in 2MB flash
- */
- flash_protect (FLAG_PROTECT_SET,
- amd160base, amd160base + monitor_flash_len - 1, info);
-
- flash_protect (FLAG_PROTECT_SET,
- CFG_ENV_ADDR, CFG_ENV_ADDR + CFG_ENV_SIZE - 1, info);
-
-#if CFG_MAX_FLASH_BANKS == 2
- /* Configure AMD Am29LV040B (512KB) */
- info = &flash_info[amd040];
- info->flash_id = FLASH_DEV_U9_512KB;
- info->sector_count = 8;
- info->size = 512 * 1024; /* 512KB, 8 x 64KB */
- for (i = 0; i < info->sector_count; i++) {
- info->start[i] = amd040base + i * (64 * 1024);
- /* Write auto select command sequence and query sector protection */
- FLASH_CMD_SELECT (info->flash_id,
- info->start[i] | CACHE_DISABLE_MASK);
- flashtest =
- GET__U8 (((info->start[i] + 2) | CACHE_DISABLE_MASK));
- FLASH_CMD_RESET (info->flash_id,
- amd040base | CACHE_DISABLE_MASK);
- info->protect[i] = (flashtest & 0x0001);
- }
-#endif
-
- return flash_info[0].size
-#if CFG_MAX_FLASH_BANKS == 2
- + flash_info[1].size
-#endif
- ;
-}
-
-void flash_print_info (flash_info_t * info)
-{
- int i;
-
- if (info->flash_id == FLASH_DEV_U7_2MB) {
- printf ("AMD Am29LV160DB (2MB) 16KB,2x8KB,32KB,31x64KB\n");
- } else if (info->flash_id == FLASH_DEV_U9_512KB) {
- printf ("AMD Am29LV040B (512KB) 8x64KB\n");
- } else {
- printf ("Unknown flash_id ...\n");
- return;
- }
-
- printf (" Size: %ld KB in %d Sectors\n",
- info->size >> 10, info->sector_count);
- printf (" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; i++) {
- if ((i % 4) == 0)
- printf ("\n ");
- printf (" S%02d @ 0x%08lX%s", i,
- info->start[i], info->protect[i] ? " !" : " ");
- }
- printf ("\n");
-}
-
-int flash_erase (flash_info_t * info, int s_first, int s_last)
-{
- u16 i, error = 0;
-
- printf ("\n");
-
- /* check flash protection bits */
- if (_flash_check_protection (info, s_first, s_last)) {
- printf (" Flash erase aborted due to protected sectors\n");
- return ERR_PROTECTED;
- }
-
- if ((s_first < info->sector_count) && (s_first <= s_last)) {
- for (i = s_first; i <= s_last && !error; i++) {
- printf (" Erasing Sector %d @ 0x%08lx ... ", i,
- info->start[i]);
- /* bypass the cache to access the flash memory */
- FLASH_CMD_ERASE_SEC (info->flash_id,
- (info->
- start[0] | CACHE_DISABLE_MASK),
- (info->
- start[i] | CACHE_DISABLE_MASK));
- /* look for sector to become 0xFF after erase */
- error = _flash_poll (info->flash_id,
- info->
- start[i] | CACHE_DISABLE_MASK,
- 0xFF, CFG_FLASH_ERASE_TOUT);
- FLASH_CMD_RESET (info->flash_id,
- (info->
- start[0] | CACHE_DISABLE_MASK));
- printf ("done\n");
- if (error) {
- break;
- }
- }
- } else
- error = ERR_INVAL;
-
- return error;
-}
-
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- u16 error = 0, i;
- u32 n;
- u8 *bp, *bps;
-
- /* Write Setup */
- /* bypass the cache to access the flash memory */
- FLASH_CMD_UNLOCK_BYPASS (info->flash_id,
- (info->start[0] | CACHE_DISABLE_MASK));
-
- /* Write the Data to Flash */
-
- bp = (u8 *) (addr | CACHE_DISABLE_MASK);
- bps = (u8 *) src;
-
- for (n = 0; n < cnt && !error; n++, bp++, bps++) {
-
- if (!(n % (cnt / 15))) {
- printf (".");
- }
-
- /* write the flash command for flash memory */
- *bp = 0xA0;
-
- /* Write the data */
- *bp = *bps;
-
- /* Check if the write is done */
- for (i = 0; i < 0xff; i++);
- error = _flash_poll (info->flash_id, (u32) bp, *bps,
- CFG_FLASH_WRITE_TOUT);
- if (error) {
- return error;
- }
- }
-
- /* Reset the Flash Mode to read */
- FLASH_CMD_BYPASS_RESET (info->flash_id, info->start[0]);
-
- printf (" ");
-
- return error;
-}
diff --git a/board/evb4510/lowlevel_init.S b/board/evb4510/lowlevel_init.S
deleted file mode 100644
index 7184d7259a..0000000000
--- a/board/evb4510/lowlevel_init.S
+++ /dev/null
@@ -1,157 +0,0 @@
-/*
- * Copyright (c) 2004 Cucy Systems (http://www.cucy.com)
- * Curt Brune <curt@cucy.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-
-#include <config.h>
-#include <version.h>
-#include <asm/hardware.h>
-
-/***********************************************************************
- * Configure Memory Map
- *
- * This memory map allows us to relocate from FLASH to SRAM. After
- * power-on reset the CPU only knows about the FLASH memory at address
- * 0x00000000. After lowlevel_init completes the memory map will be:
- *
- * Memory Addr
- * 0x00000000
- * to 8MB SRAM (U5) -- 8MB Map
- * 0x00800000
- *
- * 0x01000000
- * to 2MB Flash @ 0x00000000 (U7) -- 2MB Map
- * 0x01200000
- *
- * 0x02000000
- * to 512KB Flash @ 0x02000000 (U9) -- 2MB Map
- * 0x02080000
- *
- * Load all 12 memory registers with the STMIA instruction since
- * memory access is disabled once these registers are written. The
- * last register written re-enables memory access. For more info see
- * the user's manual for the S3C4510B, available from Samsung's web
- * site. Search for part number "S3C4510B".
- *
- ***********************************************************************/
-
-.globl lowlevel_init
-lowlevel_init:
-
- /* preserve the temp register (r12 AKA ip) and remap it. */
- ldr r1, =SRAM_BASE+0xC
- add r0, r12, #0x01000000
- str r0, [r1]
-
- /* remap the link register for when we return */
- add lr, lr, #0x01000000
-
- /* store a short program in the on chip SRAM, which is
- * unaffected when remapping memory. Note the cache must be
- * disabled for the on chip SRAM to be available.
- */
- ldr r1, =SRAM_BASE
- ldr r0, =0xe8801ffe /* stmia r0, {r1-r12} */
- str r0, [r1]
- add r1, r1, #4
- ldr r0, =0xe59fc000 /* ldr r12, [pc, #0] */
- str r0, [r1]
- add r1, r1, #4
- ldr r0, =0xe1a0f00e /* mov pc, lr */
- str r0, [r1]
-
- adr r0, memory_map_data
- ldmia r0, {r1-r12}
- ldr r0, =REG_EXTDBWTH
-
- ldr pc, =SRAM_BASE
-
-.globl reset_cpu
-reset_cpu:
- /*
- * reset the cpu by re-mapping FLASH 0 to 0x0 and jumping to
- * address 0x0. We accomplish this by storing a few
- * instructions into the on chip SRAM (8KB) and run from
- * there. Note the cache must be disabled for the on chip
- * SRAM to be available.
- *
- * load r2 with REG_ROMCON0
- * load r3 with 0x12040060 configure FLASH bank 0 @ 0x00000000
- * load r4 with REG_DRAMCON0
- * load r5 with 0x08000380 configure RAM bank 0 @ 0x01000000
- * load r6 with REG_REFEXTCON
- * load r7 with 0x9c218360
- * load r8 with 0x0
- * store str r3,[r2] @ SRAM_BASE
- * store str r5,[r4] @ SRAM_BASE + 0x4
- * store str r7,[r6] @ SRAM_BASE + 0x8
- * store mov pc,r8 @ SRAM_BASE + 0xC
- * mov pc, SRAM_BASE
- *
- */
-
- /* disable cache */
- ldr r0, =REG_SYSCFG
- ldr r1, =0x83ffffa0 /* cache-disabled */
- str r1, [r0]
-
- ldr r2, =REG_ROMCON0
- ldr r3, =0x02000060 /* Bank0 2MB FLASH @ 0x00000000 */
- ldr r4, =REG_DRAMCON0
- ldr r5, =0x18040380 /* DRAM0 8MB SRAM @ 0x01000000 */
- ldr r6, =REG_REFEXTCON
- ldr r7, =0xce278360
- ldr r8, =0x00000000
- ldr r1, =SRAM_BASE
- ldr r0, =0xe5823000 /* str r3, [r2] */
- str r0, [r1]
- ldr r1, =SRAM_BASE+4
- ldr r0, =0xe5845000 /* str r5, [r4] */
- str r0, [r1]
- ldr r1, =SRAM_BASE+8
- ldr r0, =0xe5867000 /* str r7, [r6] */
- str r0, [r1]
- ldr r1, =SRAM_BASE+0xC
- ldr r0, =0xe1a0f008 /* mov pc, r8 */
- str r0, [r1]
- ldr r1, =SRAM_BASE
- mov pc, r1
-
- /* never return */
-
-/************************************************************************
- * Below are twelve 32-bit values for the twelve memory registers of
- * the system manager, starting with register REG_EXTDBWTH.
- ***********************************************************************/
-memory_map_data:
- .long 0x00f03005 /* memory widths */
- .long 0x12040060 /* Bank0 2MB FLASH @ 0x01000000 */
- .long 0x22080060 /* Bank1 512KB FLASH @ 0x02000000 */
- .long 0x00000000
- .long 0x00000000
- .long 0x00000000
- .long 0x00000000
- .long 0x08000380 /* DRAM0 8MB SRAM @ 0x00000000 */
- .long 0x00000000
- .long 0x00000000
- .long 0x00000000
- .long 0x9c218360 /* enable memory */
diff --git a/board/evb4510/u-boot.lds b/board/evb4510/u-boot.lds
deleted file mode 100644
index 5b70a40aab..0000000000
--- a/board/evb4510/u-boot.lds
+++ /dev/null
@@ -1,69 +0,0 @@
-/*
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-ENTRY(_start)
-SECTIONS
-{
- . = 0x00000000;
-
- . = ALIGN(4);
- .text :
- {
- cpu/arm720t/start.o (.text)
- *(.text)
- }
-
- . = ALIGN(4);
- .rodata : { *(.rodata) }
-
- . = ALIGN(4);
- .data : { *(.data) }
-
- . = ALIGN(4);
- .got : { *(.got) }
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = ALIGN(4);
- __bss_start = .;
- .bss : { *(.bss) }
- _end = .;
- /* Stabs debugging sections. */
- .stab 0 : { *(.stab) }
- .stabstr 0 : { *(.stabstr) }
- .stab.excl 0 : { *(.stab.excl) }
- .stab.exclstr 0 : { *(.stab.exclstr) }
- .stab.index 0 : { *(.stab.index) }
- .stab.indexstr 0 : { *(.stab.indexstr) }
- .comment 0 : { *(.comment) }
- .debug_abbrev 0 : { *(.debug_abbrev) }
- .debug_info 0 : { *(.debug_info) }
- .debug_line 0 : { *(.debug_line) }
- .debug_pubnames 0 : { *(.debug_pubnames) }
- .debug_aranges 0 : { *(.debug_aranges) }
-}
diff --git a/board/evb64260/64260.h b/board/evb64260/64260.h
deleted file mode 100644
index d106ced3c2..0000000000
--- a/board/evb64260/64260.h
+++ /dev/null
@@ -1,31 +0,0 @@
-#ifndef __64260_H__
-#define __64260_H__
-
-/* CPU Configuration bits */
-#define CPU_CONF_ADDR_MISS_EN (1 << 8)
-#define CPU_CONF_AACK_DELAY (1 << 11)
-#define CPU_CONF_ENDIANESS (1 << 12)
-#define CPU_CONF_PIPELINE (1 << 13)
-#define CPU_CONF_TA_DELAY (1 << 15)
-#define CPU_CONF_RD_OOO (1 << 16)
-#define CPU_CONF_STOP_RETRY (1 << 17)
-#define CPU_CONF_MULTI_DECODE (1 << 18)
-#define CPU_CONF_DP_VALID (1 << 19)
-#define CPU_CONF_PERR_PROP (1 << 22)
-#define CPU_CONF_FAST_CLK (1 << 23)
-#define CPU_CONF_AACK_DELAY_2 (1 << 25)
-#define CPU_CONF_AP_VALID (1 << 26)
-#define CPU_CONF_REMAP_WR_DIS (1 << 27)
-#define CPU_CONF_CONF_SB_DIS (1 << 28)
-#define CPU_CONF_IO_SB_DIS (1 << 29)
-#define CPU_CONF_CLK_SYNC (1 << 30)
-
-/* CPU Master Control bits */
-#define CPU_MAST_CTL_ARB_EN (1 << 8)
-#define CPU_MAST_CTL_MASK_BR_1 (1 << 9)
-#define CPU_MAST_CTL_M_WR_TRIG (1 << 10)
-#define CPU_MAST_CTL_M_RD_TRIG (1 << 11)
-#define CPU_MAST_CTL_CLEAN_BLK (1 << 12)
-#define CPU_MAST_CTL_FLUSH_BLK (1 << 13)
-
-#endif /* __64260_H__ */
diff --git a/board/evb64260/Makefile b/board/evb64260/Makefile
deleted file mode 100644
index c493d6cf9d..0000000000
--- a/board/evb64260/Makefile
+++ /dev/null
@@ -1,44 +0,0 @@
-#
-# (C) Copyright 2001
-# Josh Huber <huber@mclx.com>, Mission Critical Linux, Inc.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-SOBJS = misc.o
-OBJS = $(BOARD).o flash.o serial.o memory.o pci.o \
- eth.o eth_addrtbl.o mpsc.o i2c.o \
- sdram_init.o zuma_pbb.o intel_flash.o zuma_pbb_mbox.o
-
-
-$(LIB): .depend $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS) $(SOBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/evb64260/bootseq.txt b/board/evb64260/bootseq.txt
deleted file mode 100644
index 391d49a119..0000000000
--- a/board/evb64260/bootseq.txt
+++ /dev/null
@@ -1,94 +0,0 @@
-(cpu/mpc7xxx/start.S)
-
-start:
- b boot_cold
-
-start_warm:
- b boot_warm
-
-
-boot_cold:
-boot_warm:
- clear bats
- init l2 (if enabled)
- init altivec (if enabled)
- invalidate l2 (if enabled)
- setup bats (from defines in config_EVB)
- enable_addr_trans: (if MMU enabled)
- enable MSR_IR and MSR_DR
- jump to in_flash
-
-in_flash:
- enable l1 dcache
- gal_low_init: (board/evb64260/sdram_init.S)
- config SDRAM (CFG, TIMING, DECODE)
- init scratch regs (810 + 814)
-
- detect DIMM0 (bank 0 only)
- config SDRAM_PARA0 to 256/512Mbit
- bl sdram_op_mode
- detect bank0 width
- write scratch reg 810
- config SDRAM_PARA0 with results
- config SDRAM_PARA1 with results
-
- detect DIMM1 (bank 2 only)
- config SDRAM_PARA2 to 256/512Mbit
- detect bank2 width
- write scratch reg 814
- config SDRAM_PARA2 with results
- config SDRAM_PARA3 with results
-
- setup device bus timings/width
- setup boot device timings/width
-
- setup CPU_CONF (0x0)
- setup cpu master control register 0x160
- setup PCI0 TIMEOUT
- setup PCI1 TIMEOUT
- setup PCI0 BAR
- setup PCI1 BAR
-
- setup MPP control 0-3
- setup GPP level control
- setup Serial ports multiplex
-
- setup stack pointer (r1)
- setup GOT
- call cpu_init_f
- debug leds
- board_init_f: (common/board.c)
- board_early_init_f:
- remap gt regs?
- map PCI mem/io
- map device space
- clear out interupts
- init_timebase
- env_init
- serial_init
- console_init_f
- display_options
- initdram: (board/evb64260/evb64260.c)
- detect memory
- for each bank:
- dram_size()
- setup PCI slave memory mappings
- setup SCS
- setup monitor
- alloc board info struct
- init bd struct
- relocate_code: (cpu/mpc7xxx/start.S)
- copy,got,clearbss
- board_init_r(bd, dest_addr) (common/board.c)
- setup bd function pointers
- trap_init
- flash_init: (board/evb64260/flash.c)
- setup bd flash info
- cpu_init_r: (cpu/mpc7xxx/cpu_init.c)
- nothing
- mem_malloc_init
- malloc_bin_reloc
- spi_init (r or f)??? (CFG_ENV_IS_IN_EEPROM)
- env_relocated
- misc_init_r(bd): (board/evb64260/evb64260.c)
- mpsc_init2
diff --git a/board/evb64260/config.mk b/board/evb64260/config.mk
deleted file mode 100644
index 0646a3eb58..0000000000
--- a/board/evb64260/config.mk
+++ /dev/null
@@ -1,28 +0,0 @@
-#
-# (C) Copyright 2001
-# Josh Huber <huber@mclx.com>, Mission Critical Linux, Inc.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# EVB64260 boards
-#
-
-TEXT_BASE = 0xfff00000
diff --git a/board/evb64260/ecctest.c b/board/evb64260/ecctest.c
deleted file mode 100644
index 5d3679aa93..0000000000
--- a/board/evb64260/ecctest.c
+++ /dev/null
@@ -1,111 +0,0 @@
-indent: Standard input:27: Warning:old style assignment ambiguity in "=*". Assuming "= *"
-
-#ifdef ECC_TEST
-static inline void ecc_off (void)
-{
- *(volatile int *) (INTERNAL_REG_BASE_ADDR + 0x4b4) &= ~0x00200000;
-}
-
-static inline void ecc_on (void)
-{
- *(volatile int *) (INTERNAL_REG_BASE_ADDR + 0x4b4) |= 0x00200000;
-}
-
-static int putshex (const char *buf, int len)
-{
- int i;
-
- for (i = 0; i < len; i++) {
- printf ("%02x", buf[i]);
- }
- return 0;
-}
-
-static int char_memcpy (void *d, const void *s, int len)
-{
- int i;
- char *cd = d;
- const char *cs = s;
-
- for (i = 0; i < len; i++) {
- *(cd++) = *(cs++);
- }
- return 0;
-}
-
-static int memory_test (char *buf)
-{
- const char src[][16] = {
- {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
- {0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
- 0x01, 0x01, 0x01, 0x01, 0x01, 0x01},
- {0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02,
- 0x02, 0x02, 0x02, 0x02, 0x02, 0x02},
- {0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04,
- 0x04, 0x04, 0x04, 0x04, 0x04, 0x04},
- {0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08,
- 0x08, 0x08, 0x08, 0x08, 0x08, 0x08},
- {0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10,
- 0x10, 0x10, 0x10, 0x10, 0x10, 0x10},
- {0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
- 0x20, 0x20, 0x20, 0x20, 0x20, 0x20},
- {0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40,
- 0x40, 0x40, 0x40, 0x40, 0x40, 0x40},
- {0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80,
- 0x80, 0x80, 0x80, 0x80, 0x80, 0x80},
- {0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55,
- 0x55, 0x55, 0x55, 0x55, 0x55, 0x55},
- {0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
- 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa},
- {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}
- };
- const int foo[] = { 0 };
- int i, j, a;
-
- printf ("\ntest @ %d %p\n", foo[0], buf);
- for (i = 0; i < 12; i++) {
- for (a = 0; a < 8; a++) {
- const char *s = src[i] + a;
- int align = (unsigned) (s) & 0x7;
-
- /* ecc_off(); */
- memcpy (buf, s, 8);
- /* ecc_on(); */
- putshex (s, 8);
- if (memcmp (buf, s, 8)) {
- putc ('\n');
- putshex (buf, 8);
- printf (" [FAIL] (%p) align=%d\n", s, align);
- for (j = 0; j < 8; j++) {
- s[j] == buf[j] ? puts (" ") :
- printf ("%02x",
- (s[j]) ^ (buf[j]));
- }
- putc ('\n');
- } else {
- printf (" [PASS] (%p) align=%d\n", s, align);
- }
- /* ecc_off(); */
- char_memcpy (buf, s, 8);
- /* ecc_on(); */
- putshex (s, 8);
- if (memcmp (buf, s, 8)) {
- putc ('\n');
- putshex (buf, 8);
- printf (" [FAIL] (%p) align=%d\n", s, align);
- for (j = 0; j < 8; j++) {
- s[j] == buf[j] ? puts (" ") :
- printf ("%02x",
- (s[j]) ^ (buf[j]));
- }
- putc ('\n');
- } else {
- printf (" [PASS] (%p) align=%d\n", s, align);
- }
- }
- }
-
- return 0;
-}
-#endif
diff --git a/board/evb64260/eth.c b/board/evb64260/eth.c
deleted file mode 100644
index eafa48bc6e..0000000000
--- a/board/evb64260/eth.c
+++ /dev/null
@@ -1,807 +0,0 @@
-/**************************************************************************
-Etherboot - BOOTP/TFTP Bootstrap Program
-Skeleton NIC driver for Etherboot
-***************************************************************************/
-
-/*
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2, or (at
- * your option) any later version.
- */
-
-/*
- * This file is a modified version from the Galileo polled mode
- * network driver for the ethernet contained within the GT64260
- * chip. It has been modified to fit into the U-Boot framework, from
- * the original (etherboot) setup. Also, additional cleanup and features
- * were added.
- *
- * - Josh Huber <huber@mclx.com>
- */
-
-#include <common.h>
-#include <malloc.h>
-#include <galileo/gt64260R.h>
-#include <galileo/core.h>
-#include <asm/cache.h>
-#include <miiphy.h>
-#include <net.h>
-
-#include "eth.h"
-#include "eth_addrtbl.h"
-
-#if (CONFIG_COMMANDS & CFG_CMD_NET) && defined(CONFIG_NET_MULTI)
-
-#define GT6426x_ETH_BUF_SIZE 1536
-
-/* if you like verbose output, turn this on! */
-#undef DEBUG
-
-/* Restart autoneg if we detect link is up on phy init. */
-
-/*
- * The GT doc's say that after Rst is deasserted, and the PHY
- * reports autoneg complete, it runs through its autoneg
- * procedures. This doesn't seem to be the case for MII
- * PHY's. To work around this check for link up && autoneg
- * complete when initilizing the port. If they are both set,
- * then restart PHY autoneg. Of course, it may be something
- * completly different.
- */
-#ifdef CONFIG_ETHER_PORT_MII
-# define RESTART_AUTONEG
-#endif
-
-/* do this if you dont want to use snooping */
-#define USE_SOFTWARE_CACHE_MANAGEMENT
-
-#ifdef USE_SOFTWARE_CACHE_MANAGEMENT
-#define FLUSH_DCACHE(a,b) if(dcache_status()){clean_dcache_range((u32)(a),(u32)(b));}
-#define FLUSH_AND_INVALIDATE_DCACHE(a,b) if(dcache_status()){flush_dcache_range((u32)(a),(u32)(b));}
-#define INVALIDATE_DCACHE(a,b) if(dcache_status()){invalidate_dcache_range((u32)(a),(u32)(b));}
-#else
-/* bummer - w/o flush, nothing works, even with snooping - FIXME */
-/* #define FLUSH_DCACHE(a,b) */
-#define FLUSH_DCACHE(a,b) if(dcache_status()){clean_dcache_range((u32)(a),(u32)(b));}
-#define FLUSH_AND_INVALIDATE_DCACHE(a,b)
-#define INVALIDATE_DCACHE(a,b)
-#endif
-struct eth_dev_s {
- eth0_tx_desc_single *eth_tx_desc;
- eth0_rx_desc_single *eth_rx_desc;
- char *eth_tx_buffer;
- char *eth_rx_buffer[NR];
- int tdn, rdn;
- int dev;
- unsigned int reg_base;
-};
-
-
-#ifdef CONFIG_INTEL_LXT97X
-/* for intel LXT972 */
-static const char ether_port_phy_addr[3]={0,1,2};
-#else
-static const char ether_port_phy_addr[3]={4,5,6};
-#endif
-
-/* MII PHY access routines are common for all i/f, use gal_ent0 */
-#define GT6426x_MII_DEVNAME "gal_enet0"
-
-int gt6426x_miiphy_read(char *devname, unsigned char phy,
- unsigned char reg, unsigned short *val);
-
-static inline unsigned short
-miiphy_read_ret(unsigned short phy, unsigned short reg)
-{
- unsigned short val;
- gt6426x_miiphy_read(GT6426x_MII_DEVNAME,phy,reg,&val);
- return val;
-}
-
-
-/**************************************************************************
-RESET - Reset adapter
-***************************************************************************/
-void
-gt6426x_eth_reset(void *v)
-{
- /* we should do something here...
- struct eth_device *wp = (struct eth_device *)v;
- struct eth_dev_s *p = wp->priv;
- */
-
- printf ("RESET\n");
- /* put the card in its initial state */
-}
-
-static void gt6426x_handle_SMI(struct eth_dev_s *p, unsigned int icr)
-{
-#ifdef DEBUG
- printf("SMI interrupt: ");
-
- if(icr&0x20000000) {
- printf("SMI done\n");
- }
-#endif
-
- if(icr&0x10000000) {
- unsigned int psr;
- psr=GTREGREAD(ETHERNET0_PORT_STATUS_REGISTER + p->reg_base);
-#ifdef DEBUG
- printf("PHY state change:\n"
- " GT:%s:%s:%s:%s\n",
- psr&1?"100":" 10",
- psr&8?" Link":"nLink",
- psr&2?"FD":"HD",
- psr&4?" FC":"nFC");
-
-#ifdef CONFIG_INTEL_LXT97X /* non-standard mii reg (intel lxt972a) */
- {
- unsigned short mii_11;
- mii_11=miiphy_read_ret(ether_port_phy_addr[p->dev],0x11);
-
- printf(" mii:%s:%s:%s:%s %s:%s %s\n",
- mii_11&(1<<14)?"100":" 10",
- mii_11&(1<<10)?" Link":"nLink",
- mii_11&(1<<9)?"FD":"HD",
- mii_11&(1<<4)?" FC":"nFC",
-
- mii_11&(1<<7)?"ANc":"ANnc",
- mii_11&(1<<8)?"AN":"Manual",
- ""
- );
- }
-#endif /* CONFIG_INTEL_LXT97X */
-#endif /* DEBUG */
- }
-}
-
-static int
-gt6426x_eth_receive(struct eth_dev_s *p,unsigned int icr)
-{
- int eth_len=0;
- char *eth_data;
-
- eth0_rx_desc_single *rx=&p->eth_rx_desc[(p->rdn)];
-
- INVALIDATE_DCACHE((unsigned int)rx,(unsigned int)(rx+1));
-
- if (rx->command_status & 0x80000000) {
- return 0; /* No packet received */
- }
-
- eth_len = (unsigned int)
- (rx->buff_size_byte_count) & 0x0000ffff;
- eth_data = (char *) p->eth_rx_buffer[p->rdn];
-
-#ifdef DEBUG
- if (eth_len) {
- printf ("%s: Recived %d byte Packet @ 0x%p\n",
- __FUNCTION__, eth_len, eth_data);
- }
-#endif
- /*
- * packet is now in:
- * eth0_rx_buffer[RDN_ETH0];
- */
-
- /* let the upper layer handle the packet */
- NetReceive ((uchar *)eth_data, eth_len);
-
- rx->buff_size_byte_count = GT6426x_ETH_BUF_SIZE<<16;
-
-
- /* GT96100 Owner */
- rx->command_status = 0x80000000;
-
- FLUSH_DCACHE((unsigned int)rx,(unsigned int)(rx+1));
-
- p->rdn ++;
- if (p->rdn == NR) {p->rdn = 0;}
-
- sync();
-
- /* Start Rx*/
- GT_REG_WRITE (ETHERNET0_SDMA_COMMAND_REGISTER + p->reg_base, 0x00000080);
-
-#ifdef DEBUG
- {
- int i;
- for (i=0;i<12;i++) {
- printf(" %02x", eth_data[i]);
- }
- }
- printf(": %d bytes\n", eth_len);
-#endif
- INVALIDATE_DCACHE((unsigned int)eth_data,
- (unsigned int)eth_data+eth_len);
- return eth_len;
-}
-
-/**************************************************************************
-POLL - look for an rx frame, handle other conditions
-***************************************************************************/
-int
-gt6426x_eth_poll(void *v)
-{
- struct eth_device *wp = (struct eth_device *)v;
- struct eth_dev_s *p = wp->priv;
- unsigned int icr=GTREGREAD(ETHERNET0_INTERRUPT_CAUSE_REGISTER + p->reg_base);
-
- if(icr) {
- GT_REG_WRITE(ETHERNET0_INTERRUPT_CAUSE_REGISTER +p->reg_base, 0);
-#ifdef DEBUG
- printf("poll got ICR %08x\n", icr);
-#endif
- /* SMI done or PHY state change*/
- if(icr&0x30000000) gt6426x_handle_SMI(p, icr);
- }
- /* always process. We aren't using RX interrupts */
- return gt6426x_eth_receive(p, icr);
-}
-
-/**************************************************************************
-TRANSMIT - Transmit a frame
-***************************************************************************/
-int
-gt6426x_eth_transmit(void *v, volatile char *p, unsigned int s)
-{
- struct eth_device *wp = (struct eth_device *)v;
- struct eth_dev_s *dev = (struct eth_dev_s *)wp->priv;
-#ifdef DEBUG
- unsigned int old_command_stat,old_psr;
-#endif
- eth0_tx_desc_single *tx=&dev->eth_tx_desc[dev->tdn];
-
- /* wait for tx to be ready */
- INVALIDATE_DCACHE((unsigned int)tx,(unsigned int)(tx+1));
- while (tx->command_status & 0x80000000) {
- int i;
- for(i=0;i<1000;i++);
- INVALIDATE_DCACHE((unsigned int)tx,(unsigned int)(tx+1));
- }
-
- GT_REG_WRITE (ETHERNET0_CURRENT_TX_DESCRIPTOR_POINTER0 + dev->reg_base,
- (unsigned int)tx);
-
-#ifdef DEBUG
- printf("copying to tx_buffer [%p], length %x, desc = %p\n",
- dev->eth_tx_buffer, s, dev->eth_tx_desc);
-#endif
- memcpy(dev->eth_tx_buffer, (char *) p, s);
-
- tx->buff_pointer = (uchar *)dev->eth_tx_buffer;
- tx->bytecount_reserved = ((__u16)s) << 16;
-
- /* 31 - own
- * 22 - gencrc
- * 18:16 - pad, last, first */
- tx->command_status = (1<<31) | (1<<22) | (7<<16);
-#if 0
- /* FEr #18 */
- tx->next_desc = NULL;
-#else
- tx->next_desc =
- (struct eth0_tx_desc_struct *)
- &dev->eth_tx_desc[(dev->tdn+1)%NT].bytecount_reserved;
-
- /* cpu owned */
- dev->eth_tx_desc[(dev->tdn+1)%NT].command_status = (7<<16); /* pad, last, first */
-#endif
-
-#ifdef DEBUG
- old_command_stat=tx->command_status,
- old_psr=GTREGREAD(ETHERNET0_PORT_STATUS_REGISTER + dev->reg_base);
-#endif
-
- FLUSH_DCACHE((unsigned int)tx,
- (unsigned int)&dev->eth_tx_desc[(dev->tdn+2)%NT]);
-
- FLUSH_DCACHE((unsigned int)dev->eth_tx_buffer,(unsigned int)dev->eth_tx_buffer+s);
-
- GT_REG_WRITE(ETHERNET0_SDMA_COMMAND_REGISTER + dev->reg_base, 0x01000000);
-
-#ifdef DEBUG
- {
- unsigned int command_stat=0;
- printf("cmd_stat: %08x PSR: %08x\n", old_command_stat, old_psr);
- /* wait for tx to be ready */
- do {
- unsigned int psr=GTREGREAD(ETHERNET0_PORT_STATUS_REGISTER + dev->reg_base);
- command_stat=tx->command_status;
- if(command_stat!=old_command_stat || psr !=old_psr) {
- printf("cmd_stat: %08x PSR: %08x\n", command_stat, psr);
- old_command_stat = command_stat;
- old_psr = psr;
- }
- /* gt6426x_eth0_poll(); */
- } while (command_stat & 0x80000000);
-
- printf("sent %d byte frame\n", s);
-
- if((command_stat & (3<<15)) == 3) {
- printf("frame had error (stat=%08x)\n", command_stat);
- }
- }
-#endif
- return 0;
-}
-
-/**************************************************************************
-DISABLE - Turn off ethernet interface
-***************************************************************************/
-void
-gt6426x_eth_disable(void *v)
-{
- struct eth_device *wp = (struct eth_device *)v;
- struct eth_dev_s *p = (struct eth_dev_s *)wp->priv;
-
- GT_REG_WRITE(ETHERNET0_SDMA_COMMAND_REGISTER + p->reg_base, 0x80008000);
-}
-
-/**************************************************************************
-MII utilities - write: write to an MII register via SMI
-***************************************************************************/
-int
-gt6426x_miiphy_write(char *devname, unsigned char phy,
- unsigned char reg, unsigned short data)
-{
- unsigned int temp= (reg<<21) | (phy<<16) | data;
-
- while(GTREGREAD(ETHERNET_SMI_REGISTER) & (1<<28)); /* wait for !Busy */
-
- GT_REG_WRITE(ETHERNET_SMI_REGISTER, temp);
- return 0;
-}
-
-/**************************************************************************
-MII utilities - read: read from an MII register via SMI
-***************************************************************************/
-int
-gt6426x_miiphy_read(char *devname, unsigned char phy,
- unsigned char reg, unsigned short *val)
-{
- unsigned int temp= (reg<<21) | (phy<<16) | 1<<26;
-
- while(GTREGREAD(ETHERNET_SMI_REGISTER) & (1<<28)); /* wait for !Busy */
-
- GT_REG_WRITE(ETHERNET_SMI_REGISTER, temp);
-
- while(1) {
- temp=GTREGREAD(ETHERNET_SMI_REGISTER);
- if(temp & (1<<27)) break; /* wait for ReadValid */
- }
- *val = temp & 0xffff;
-
- return 0;
-}
-
-#ifdef DEBUG
-/**************************************************************************
-MII utilities - dump mii registers
-***************************************************************************/
-static void
-gt6426x_dump_mii(bd_t *bis, unsigned short phy)
-{
- printf("mii reg 0 - 3: %04x %04x %04x %04x\n",
- miiphy_read_ret(phy, 0x0),
- miiphy_read_ret(phy, 0x1),
- miiphy_read_ret(phy, 0x2),
- miiphy_read_ret(phy, 0x3)
- );
- printf(" 4 - 7: %04x %04x %04x %04x\n",
- miiphy_read_ret(phy, 0x4),
- miiphy_read_ret(phy, 0x5),
- miiphy_read_ret(phy, 0x6),
- miiphy_read_ret(phy, 0x7)
- );
- printf(" 8: %04x\n",
- miiphy_read_ret(phy, 0x8)
- );
- printf(" 16-19: %04x %04x %04x %04x\n",
- miiphy_read_ret(phy, 0x10),
- miiphy_read_ret(phy, 0x11),
- miiphy_read_ret(phy, 0x12),
- miiphy_read_ret(phy, 0x13)
- );
- printf(" 20,30: %04x %04x\n",
- miiphy_read_ret(phy, 20),
- miiphy_read_ret(phy, 30)
- );
-}
-#endif
-
-#ifdef RESTART_AUTONEG
-
-/* If link is up && autoneg compleate, and if
- * GT and PHY disagree about link capabilitys,
- * restart autoneg - something screwy with FD/HD
- * unless we do this. */
-static void
-check_phy_state(struct eth_dev_s *p)
-{
- int bmsr = miiphy_read_ret(ether_port_phy_addr[p->dev], PHY_BMSR);
- int psr = GTREGREAD(ETHERNET0_PORT_STATUS_REGISTER + p->reg_base);
-
- if ((psr & 1<<3) && (bmsr & PHY_BMSR_LS)) {
- int nego = miiphy_read_ret(ether_port_phy_addr[p->dev], PHY_ANAR) &
- miiphy_read_ret(ether_port_phy_addr[p->dev], PHY_ANLPAR);
- int want;
-
- if (nego & PHY_ANLPAR_TXFD) {
- want = 0x3;
- printf("MII: 100Base-TX, Full Duplex\n");
- } else if (nego & PHY_ANLPAR_TX) {
- want = 0x1;
- printf("MII: 100Base-TX, Half Duplex\n");
- } else if (nego & PHY_ANLPAR_10FD) {
- want = 0x2;
- printf("MII: 10Base-T, Full Duplex\n");
- } else if (nego & PHY_ANLPAR_10) {
- want = 0x0;
- printf("MII: 10Base-T, Half Duplex\n");
- } else {
- printf("MII: Unknown link-foo! %x\n", nego);
- return;
- }
-
- if ((psr & 0x3) != want) {
- printf("MII: GT thinks %x, PHY thinks %x, restarting autoneg..\n",
- psr & 0x3, want);
- miiphy_write(GT6426x_MII_DEVNAME,ether_port_phy_addr[p->dev],0,
- miiphy_read_ret(ether_port_phy_addr[p->dev],0) | (1<<9));
- udelay(10000); /* the EVB's GT takes a while to notice phy
- went down and up */
- }
- }
-}
-#endif
-
-/**************************************************************************
-PROBE - Look for an adapter, this routine's visible to the outside
-***************************************************************************/
-int
-gt6426x_eth_probe(void *v, bd_t *bis)
-{
- struct eth_device *wp = (struct eth_device *)v;
- struct eth_dev_s *p = (struct eth_dev_s *)wp->priv;
- int dev = p->dev;
- unsigned int reg_base = p->reg_base;
- unsigned long temp;
- int i;
-
- if (( dev < 0 ) || ( dev >= GAL_ETH_DEVS ))
- { /* This should never happen */
- printf("%s: Invalid device %d\n", __FUNCTION__, dev );
- return 0;
- }
-
-#ifdef DEBUG
- printf ("%s: initializing %s\n", __FUNCTION__, wp->name );
- printf ("\nCOMM_CONTROL = %08x , COMM_CONF = %08x\n",
- GTREGREAD(COMM_UNIT_ARBITER_CONTROL),
- GTREGREAD(COMM_UNIT_ARBITER_CONFIGURATION_REGISTER));
-#endif
-
- /* clear MIB counters */
- for(i=0;i<255; i++)
- temp=GTREGREAD(ETHERNET0_MIB_COUNTER_BASE + reg_base +i);
-
-#ifdef CONFIG_INTEL_LXT97X
- /* for intel LXT972 */
-
- /* led 1: 0x1=txact
- led 2: 0xc=link/rxact
- led 3: 0x2=rxact (N/C)
- strch: 0,2=30 ms, enable */
- miiphy_write(GT6426x_MII_DEVNAME,ether_port_phy_addr[p->dev], 20, 0x1c22);
-
- /* 2.7ns port rise time */
- /*miiphy_write(ether_port_phy_addr[p->dev], 30, 0x0<<10); */
-#else
- /* already set up in mpsc.c */
- /*GT_REG_WRITE(MAIN_ROUTING_REGISTER, 0x7ffe38); / b400 */
-
- /* already set up in sdram_init.S... */
- /* MPSC0, MPSC1, RMII */
- /*GT_REG_WRITE(SERIAL_PORT_MULTIPLEX, 0x1102); / f010 */
-#endif
- GT_REG_WRITE(ETHERNET_PHY_ADDRESS_REGISTER,
- ether_port_phy_addr[0] |
- (ether_port_phy_addr[1]<<5) |
- (ether_port_phy_addr[2]<<10)); /* 2000 */
-
- /* 13:12 - 10: 4x64bit burst (cache line size = 32 bytes)
- * 9 - 1: RIFB - interrupt on frame boundaries only
- * 6:7 - 00: big endian rx and tx
- * 5:2 - 1111: 15 retries */
- GT_REG_WRITE(ETHERNET0_SDMA_CONFIGURATION_REGISTER + reg_base,
- (2<<12) | (1<<9) | (0xf<<2) ); /* 2440 */
-
-#ifndef USE_SOFTWARE_CACHE_MANAGEMENT
- /* enable rx/tx desc/buffer cache snoop */
- GT_REG_READ(ETHERNET_0_ADDRESS_CONTROL_LOW + dev*0x20,
- &temp); /* f200 */
- temp|= (1<<6)| (1<<14)| (1<<22)| (1<<30);
- GT_REG_WRITE(ETHERNET_0_ADDRESS_CONTROL_LOW + dev*0x20,
- temp);
-#endif
-
- /* 31 28 27 24 23 20 19 16
- * 0000 0000 0000 0000 [0004]
- * 15 12 11 8 7 4 3 0
- * 1000 1101 0000 0000 [4d00]
- * 20 - 0=MII 1=RMII
- * 19 - 0=speed autoneg
- * 15:14 - framesize 1536 (GT6426x_ETH_BUF_SIZE)
- * 11 - no force link pass
- * 10 - 1=disable fctl autoneg
- * 8 - override prio ?? */
- temp = 0x00004d00;
-#ifndef CONFIG_ETHER_PORT_MII
- temp |= (1<<20); /* RMII */
-#endif
- /* set En */
- GT_REG_WRITE(ETHERNET0_PORT_CONFIGURATION_EXTEND_REGISTER + reg_base,
- temp); /* 2408 */
-
- /* hardcode E1 also? */
- /* -- according to dox, this is safer due to extra pulldowns? */
- if (dev<2) {
- GT_REG_WRITE(ETHERNET0_PORT_CONFIGURATION_EXTEND_REGISTER + (dev+1) * 0x400,
- temp); /* 2408 */
- }
-
- /* wake up MAC */ /* 2400 */
- GT_REG_READ(ETHERNET0_PORT_CONFIGURATION_REGISTER + reg_base, &temp);
- temp |= (1<<7); /* enable port */
-#ifdef CONFIG_GT_USE_MAC_HASH_TABLE
- temp |= (1<<12); /* hash size 1/2k */
-#else
- temp |= 1; /* promisc */
-#endif
- GT_REG_WRITE(ETHERNET0_PORT_CONFIGURATION_REGISTER + reg_base, temp);
- /* 2400 */
-
-#ifdef RESTART_AUTONEG
- check_phy_state(p);
-#endif
-
- printf("%s: Waiting for link up..\n", wp->name);
- temp = 10 * 1000;
- /* wait for link back up */
- while(!(GTREGREAD(ETHERNET0_PORT_STATUS_REGISTER + reg_base) & 8)
- && (--temp > 0)){
- udelay(1000); /* wait 1 ms */
- }
- if ( temp == 0) {
- printf("%s: Failed!\n", wp->name);
- return (0);
- }
-
- printf("%s: OK!\n", wp->name);
-
- p->tdn = 0;
- p->rdn = 0;
- p->eth_tx_desc[p->tdn].command_status = 0;
-
- /* Initialize Rx Side */
- for (temp = 0; temp < NR; temp++) {
- p->eth_rx_desc[temp].buff_pointer = (uchar *)p->eth_rx_buffer[temp];
- p->eth_rx_desc[temp].buff_size_byte_count = GT6426x_ETH_BUF_SIZE<<16;
-
- /* GT96100 Owner */
- p->eth_rx_desc[temp].command_status = 0x80000000;
- p->eth_rx_desc[temp].next_desc =
- (struct eth0_rx_desc_struct *)
- &p->eth_rx_desc[(temp+1)%NR].buff_size_byte_count;
- }
-
- FLUSH_DCACHE((unsigned int)&p->eth_tx_desc[0],
- (unsigned int)&p->eth_tx_desc[NR]);
- FLUSH_DCACHE((unsigned int)&p->eth_rx_desc[0],
- (unsigned int)&p->eth_rx_desc[NR]);
-
- GT_REG_WRITE(ETHERNET0_CURRENT_TX_DESCRIPTOR_POINTER0 + reg_base,
- (unsigned int) p->eth_tx_desc);
- GT_REG_WRITE(ETHERNET0_FIRST_RX_DESCRIPTOR_POINTER0 + reg_base,
- (unsigned int) p->eth_rx_desc);
- GT_REG_WRITE(ETHERNET0_CURRENT_RX_DESCRIPTOR_POINTER0 + reg_base,
- (unsigned int) p->eth_rx_desc);
-
-#ifdef DEBUG
- printf ("\nRx descriptor pointer is %08x %08x\n",
- GTREGREAD(ETHERNET0_FIRST_RX_DESCRIPTOR_POINTER0 + reg_base),
- GTREGREAD(ETHERNET0_CURRENT_RX_DESCRIPTOR_POINTER0 + reg_base));
- printf ("\n\n%08x %08x\n",
- (unsigned int)p->eth_rx_desc,p->eth_rx_desc[0].command_status);
-
- printf ("Descriptor dump:\n");
- printf ("cmd status: %08x\n",p->eth_rx_desc[0].command_status);
- printf ("byte_count: %08x\n",p->eth_rx_desc[0].buff_size_byte_count);
- printf ("buff_ptr: %08x\n",(unsigned int)p->eth_rx_desc[0].buff_pointer);
- printf ("next_desc: %08x\n\n",(unsigned int)p->eth_rx_desc[0].next_desc);
- printf ("%08x\n",*(unsigned int *) ((unsigned int)p->eth_rx_desc + 0x0));
- printf ("%08x\n",*(unsigned int *) ((unsigned int)p->eth_rx_desc + 0x4));
- printf ("%08x\n",*(unsigned int *) ((unsigned int)p->eth_rx_desc + 0x8));
- printf ("%08x\n\n",
- *(unsigned int *) ((unsigned int)p->eth_rx_desc + 0xc));
-#endif
-
-#ifdef DEBUG
- gt6426x_dump_mii(bis,ether_port_phy_addr[p->dev]);
-#endif
-
-#ifdef CONFIG_GT_USE_MAC_HASH_TABLE
- {
- unsigned int hashtable_base;
- u8 *b = (u8 *)(wp->enetaddr);
- u32 macH, macL;
-
- /* twist the MAC up into the way the discovery wants it */
- macH= (b[0]<<8) | b[1];
- macL= (b[2]<<24) | (b[3]<<16) | (b[4]<<8) | b[5];
-
- /* mode 0, size 0x800 */
- hashtable_base =initAddressTable(dev,0,1);
-
- if(!hashtable_base) {
- printf("initAddressTable failed\n");
- return 0;
- }
-
- addAddressTableEntry(dev, macH, macL, 1, 0);
- GT_REG_WRITE(ETHERNET0_HASH_TABLE_POINTER_REGISTER + reg_base,
- hashtable_base);
- }
-#endif
-
- /* Start Rx*/
- GT_REG_WRITE(ETHERNET0_SDMA_COMMAND_REGISTER + reg_base, 0x00000080);
- printf("%s: gt6426x eth device %d init success \n", wp->name, dev );
- return 1;
-}
-
-/* enter all the galileo ethernet devs into MULTI-BOOT */
-void
-gt6426x_eth_initialize(bd_t *bis)
-{
- struct eth_device *dev;
- struct eth_dev_s *p;
- int devnum, x, temp;
- char *s, *e, buf[64];
-
-#ifdef DEBUG
- printf( "\n%s\n", __FUNCTION );
-#endif
-
- for (devnum = 0; devnum < GAL_ETH_DEVS; devnum++) {
- dev = calloc(sizeof(*dev), 1);
- if (!dev) {
- printf( "%s: gal_enet%d allocation failure, %s\n",
- __FUNCTION__, devnum, "eth_device structure");
- return;
- }
-
- /* must be less than NAMESIZE (16) */
- sprintf(dev->name, "gal_enet%d", devnum);
-
-#ifdef DEBUG
- printf( "Initializing %s\n", dev->name );
-#endif
-
- /* Extract the MAC address from the environment */
- switch (devnum)
- {
- case 0: s = "ethaddr"; break;
-#if (GAL_ETH_DEVS > 1)
- case 1: s = "eth1addr"; break;
-#endif
-#if (GAL_ETH_DEVS > 2)
- case 2: s = "eth2addr"; break;
-#endif
- default: /* this should never happen */
- printf( "%s: Invalid device number %d\n",
- __FUNCTION__, devnum );
- return;
- }
-
- temp = getenv_r (s, buf, sizeof(buf));
- s = (temp > 0) ? buf : NULL;
-
-#ifdef DEBUG
- printf ("Setting MAC %d to %s\n", devnum, s );
-#endif
- for (x = 0; x < 6; ++x) {
- dev->enetaddr[x] = s ? simple_strtoul(s, &e, 16) : 0;
- if (s)
- s = (*e) ? e+1 : e;
- }
-
- dev->init = (void*)gt6426x_eth_probe;
- dev->halt = (void*)gt6426x_eth_reset;
- dev->send = (void*)gt6426x_eth_transmit;
- dev->recv = (void*)gt6426x_eth_poll;
-
- p = calloc( sizeof(*p), 1 );
- dev->priv = (void*)p;
- if (!p)
- {
- printf( "%s: %s allocation failure, %s\n",
- __FUNCTION__, dev->name, "Private Device Structure");
- free(dev);
- return;
- }
-
- p->dev = devnum;
- p->tdn=0;
- p->rdn=0;
- p->reg_base = devnum * ETHERNET_PORTS_DIFFERENCE_OFFSETS;
-
- p->eth_tx_desc =
- (eth0_tx_desc_single *)
- (((unsigned int) malloc(sizeof (eth0_tx_desc_single) *
- (NT+1)) & 0xfffffff0) + 0x10);
- if (!p)
- {
- printf( "%s: %s allocation failure, %s\n",
- __FUNCTION__, dev->name, "Tx Descriptor");
- free(dev);
- return;
- }
-
- p->eth_rx_desc =
- (eth0_rx_desc_single *)
- (((unsigned int) malloc(sizeof (eth0_rx_desc_single) *
- (NR+1)) & 0xfffffff0) + 0x10);
- if (!p->eth_rx_desc)
- {
- printf( "%s: %s allocation failure, %s\n",
- __FUNCTION__, dev->name, "Rx Descriptor");
- free(dev);
- free(p);
- return;
- }
-
- p->eth_tx_buffer =
- (char *) (((unsigned int) malloc(GT6426x_ETH_BUF_SIZE) & 0xfffffff0) + 0x10);
- if (!p->eth_tx_buffer)
- {
- printf( "%s: %s allocation failure, %s\n",
- __FUNCTION__, dev->name, "Tx Bufffer");
- free(dev);
- free(p);
- free(p->eth_rx_desc);
- return;
- }
-
- for (temp = 0 ; temp < NR ; temp ++) {
- p->eth_rx_buffer[temp] =
- (char *)
- (((unsigned int) malloc(GT6426x_ETH_BUF_SIZE) & 0xfffffff0) + 0x10);
- if (!p->eth_rx_buffer[temp])
- {
- printf( "%s: %s allocation failure, %s\n",
- __FUNCTION__, dev->name, "Rx Buffers");
- free(dev);
- free(p);
- free(p->eth_tx_buffer);
- free(p->eth_rx_desc);
- free(p->eth_tx_desc);
- while (temp >= 0)
- free(p->eth_rx_buffer[--temp]);
- return;
- }
- }
-
-
- eth_register(dev);
-#if defined(CONFIG_MII) || (CONFIG_COMMANDS & CFG_CMD_MII)
- miiphy_register(dev->name,
- gt6426x_miiphy_read, gt6426x_miiphy_write);
-#endif
- }
-
-}
-#endif /* CFG_CMD_NET && CONFIG_NET_MULTI */
diff --git a/board/evb64260/eth.h b/board/evb64260/eth.h
deleted file mode 100644
index beb6db16df..0000000000
--- a/board/evb64260/eth.h
+++ /dev/null
@@ -1,75 +0,0 @@
-/*
- * (C) Copyright 2001
- * Josh Huber <huber@mclx.com>, Mission Critical Linux, Inc.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * eth.h - header file for the polled mode GT ethernet driver
- */
-
-#ifndef __GT6426x_ETH_H__
-#define __GT6426x_ETH_H__
-
-#include <asm/types.h>
-#include <asm/io.h>
-#include <asm/byteorder.h>
-#include <common.h>
-
-typedef struct eth0_tx_desc_struct {
- volatile __u32 bytecount_reserved;
- volatile __u32 command_status;
- volatile struct eth0_tx_desc_struct * next_desc;
- /* Note - the following will not work for 64 bit addressing */
- volatile unsigned char * buff_pointer;
-} __attribute__ ((packed)) eth0_tx_desc_single;
-
-typedef struct eth0_rx_desc_struct {
- volatile __u32 buff_size_byte_count;
- volatile __u32 command_status;
- volatile struct eth0_rx_desc_struct * next_desc;
- volatile unsigned char * buff_pointer;
-} __attribute__ ((packed)) eth0_rx_desc_single;
-
-#define NT 20 /* Number of Transmit buffers */
-#define NR 20 /* Number of Receive buffers */
-#define MAX_BUFF_SIZE (1536+2*CACHE_LINE_SIZE) /* 1600 */
-#define ETHERNET_PORTS_DIFFERENCE_OFFSETS 0x400
-
-unsigned long TDN_ETH0 , RDN_ETH0; /* Rx/Tx current Descriptor Number*/
-unsigned int EVB64260_ETH0_irq;
-
-#define CLOSED 0
-#define OPENED 1
-
-#define PORT_ETH0 0
-
-extern eth0_tx_desc_single *eth0_tx_desc;
-extern eth0_rx_desc_single *eth0_rx_desc;
-extern char *eth0_tx_buffer;
-extern char *eth0_rx_buffer[NR];
-extern char *eth_data;
-
-extern int gt6426x_eth_poll(void *v);
-extern int gt6426x_eth_transmit(void *v, volatile char *p, unsigned int s);
-extern void gt6426x_eth_disable(void *v);
-extern int gt6426x_eth_probe(void *v, bd_t *bis);
-
-#endif /* __GT64260x_ETH_H__ */
diff --git a/board/evb64260/eth_addrtbl.c b/board/evb64260/eth_addrtbl.c
deleted file mode 100644
index e8ef0e3e52..0000000000
--- a/board/evb64260/eth_addrtbl.c
+++ /dev/null
@@ -1,221 +0,0 @@
-#include <common.h>
-#include <malloc.h>
-#include <galileo/gt64260R.h>
-#include <galileo/core.h>
-#include <asm/cache.h>
-#include "eth.h"
-#include "eth_addrtbl.h"
-
-#define TRUE 1
-#define FALSE 0
-
-#define PRINTF printf
-
-#ifdef CONFIG_GT_USE_MAC_HASH_TABLE
-
-static u32 addressTableHashMode[GAL_ETH_DEVS] = { 0, };
-static u32 addressTableHashSize[GAL_ETH_DEVS] = { 0, };
-static addrTblEntry *addressTableBase[GAL_ETH_DEVS] = { 0, };
-static void *realAddrTableBase[GAL_ETH_DEVS] = { 0, };
-
-static const u32 hashLength[2] = {
- (0x8000), /* 8K * 4 entries */
- (0x8000 / 16), /* 512 * 4 entries */
-};
-
-/* Initialize the address table for a port, if needed */
-unsigned int initAddressTable (u32 port, u32 hashMode, u32 hashSizeSelector)
-{
- unsigned int tableBase;
-
- if (port < 0 || port >= GAL_ETH_DEVS) {
- printf ("%s: Invalid port number %d\n", __FUNCTION__, port);
- return 0;
- }
-
- if (hashMode > 1) {
- printf ("%s: Invalid Hash Mode %d\n", __FUNCTION__, port);
- return 0;
- }
-
- if (realAddrTableBase[port] &&
- (addressTableHashSize[port] != hashSizeSelector)) {
- /* we have been here before,
- * but now we want a different sized table
- */
- free (realAddrTableBase[port]);
- realAddrTableBase[port] = 0;
- addressTableBase[port] = 0;
-
- }
-
- tableBase = (unsigned int) addressTableBase[port];
- /* we get called for every probe, so only do this once */
- if (!tableBase) {
- int bytes =
- hashLength[hashSizeSelector] * sizeof (addrTblEntry);
-
- realAddrTableBase[port] =
- malloc (bytes + 64);
- tableBase = (unsigned int)realAddrTableBase;
-
- if (!tableBase) {
- printf ("%s: alloc memory failed \n", __FUNCTION__);
- return 0;
- }
-
- /* align to octal byte */
- if (tableBase & 63)
- tableBase = (tableBase + 63) & ~63;
-
- addressTableHashMode[port] = hashMode;
- addressTableHashSize[port] = hashSizeSelector;
- addressTableBase[port] = (addrTblEntry *) tableBase;
-
- memset ((void *) tableBase, 0, bytes);
- }
-
- return tableBase;
-}
-
-/*
- * ----------------------------------------------------------------------------
- * This function will calculate the hash function of the address.
- * depends on the hash mode and hash size.
- * Inputs
- * macH - the 2 most significant bytes of the MAC address.
- * macL - the 4 least significant bytes of the MAC address.
- * hashMode - hash mode 0 or hash mode 1.
- * hashSizeSelector - indicates number of hash table entries (0=0x8000,1=0x800)
- * Outputs
- * return the calculated entry.
- */
-u32 hashTableFunction (u32 macH, u32 macL, u32 HashSize, u32 hash_mode)
-{
- u32 hashResult;
- u32 addrH;
- u32 addrL;
- u32 addr0;
- u32 addr1;
- u32 addr2;
- u32 addr3;
- u32 addrHSwapped;
- u32 addrLSwapped;
-
-
- addrH = NIBBLE_SWAPPING_16_BIT (macH);
- addrL = NIBBLE_SWAPPING_32_BIT (macL);
-
- addrHSwapped = FLIP_4_BITS (addrH & 0xf)
- + ((FLIP_4_BITS ((addrH >> 4) & 0xf)) << 4)
- + ((FLIP_4_BITS ((addrH >> 8) & 0xf)) << 8)
- + ((FLIP_4_BITS ((addrH >> 12) & 0xf)) << 12);
-
- addrLSwapped = FLIP_4_BITS (addrL & 0xf)
- + ((FLIP_4_BITS ((addrL >> 4) & 0xf)) << 4)
- + ((FLIP_4_BITS ((addrL >> 8) & 0xf)) << 8)
- + ((FLIP_4_BITS ((addrL >> 12) & 0xf)) << 12)
- + ((FLIP_4_BITS ((addrL >> 16) & 0xf)) << 16)
- + ((FLIP_4_BITS ((addrL >> 20) & 0xf)) << 20)
- + ((FLIP_4_BITS ((addrL >> 24) & 0xf)) << 24)
- + ((FLIP_4_BITS ((addrL >> 28) & 0xf)) << 28);
-
- addrH = addrHSwapped;
- addrL = addrLSwapped;
-
- if (hash_mode == 0) {
- addr0 = (addrL >> 2) & 0x03f;
- addr1 = (addrL & 0x003) | ((addrL >> 8) & 0x7f) << 2;
- addr2 = (addrL >> 15) & 0x1ff;
- addr3 = ((addrL >> 24) & 0x0ff) | ((addrH & 1) << 8);
- } else {
- addr0 = FLIP_6_BITS (addrL & 0x03f);
- addr1 = FLIP_9_BITS (((addrL >> 6) & 0x1ff));
- addr2 = FLIP_9_BITS ((addrL >> 15) & 0x1ff);
- addr3 = FLIP_9_BITS ((((addrL >> 24) & 0x0ff) |
- ((addrH & 0x1) << 8)));
- }
-
- hashResult = (addr0 << 9) | (addr1 ^ addr2 ^ addr3);
-
- if (HashSize == _8K_TABLE) {
- hashResult = hashResult & 0xffff;
- } else {
- hashResult = hashResult & 0x07ff;
- }
-
- return (hashResult);
-}
-
-
-/*
- * ----------------------------------------------------------------------------
- * This function will add an entry to the address table.
- * depends on the hash mode and hash size that was initialized.
- * Inputs
- * port - ETHERNET port number.
- * macH - the 2 most significant bytes of the MAC address.
- * macL - the 4 least significant bytes of the MAC address.
- * skip - if 1, skip this address.
- * rd - the RD field in the address table.
- * Outputs
- * address table entry is added.
- * TRUE if success.
- * FALSE if table full
- */
-int addAddressTableEntry (u32 port, u32 macH, u32 macL, u32 rd, u32 skip)
-{
- addrTblEntry *entry;
- u32 newHi;
- u32 newLo;
- u32 i;
-
- newLo = (((macH >> 4) & 0xf) << 15)
- | (((macH >> 0) & 0xf) << 11)
- | (((macH >> 12) & 0xf) << 7)
- | (((macH >> 8) & 0xf) << 3)
- | (((macL >> 20) & 0x1) << 31)
- | (((macL >> 16) & 0xf) << 27)
- | (((macL >> 28) & 0xf) << 23)
- | (((macL >> 24) & 0xf) << 19)
- | (skip << SKIP_BIT) | (rd << 2) | VALID;
-
- newHi = (((macL >> 4) & 0xf) << 15)
- | (((macL >> 0) & 0xf) << 11)
- | (((macL >> 12) & 0xf) << 7)
- | (((macL >> 8) & 0xf) << 3)
- | (((macL >> 21) & 0x7) << 0);
-
- /*
- * Pick the appropriate table, start scanning for free/reusable
- * entries at the index obtained by hashing the specified MAC address
- */
- entry = addressTableBase[port];
- entry += hashTableFunction (macH, macL, addressTableHashSize[port],
- addressTableHashMode[port]);
- for (i = 0; i < HOP_NUMBER; i++, entry++) {
- if (!(entry->lo & VALID) /*|| (entry->lo & SKIP) */ ) {
- break;
- } else { /* if same address put in same position */
- if (((entry->lo & 0xfffffff8) == (newLo & 0xfffffff8))
- && (entry->hi == newHi)) {
- break;
- }
- }
- }
-
- if (i == HOP_NUMBER) {
- PRINTF ("addGT64260addressTableEntry: table section is full\n");
- return (FALSE);
- }
-
- /*
- * Update the selected entry
- */
- entry->hi = newHi;
- entry->lo = newLo;
- DCACHE_FLUSH_N_SYNC ((u32) entry, MAC_ENTRY_SIZE);
- return (TRUE);
-}
-
-#endif /* CONFIG_GT_USE_MAC_HASH_TABLE */
diff --git a/board/evb64260/eth_addrtbl.h b/board/evb64260/eth_addrtbl.h
deleted file mode 100644
index 5a62c67e18..0000000000
--- a/board/evb64260/eth_addrtbl.h
+++ /dev/null
@@ -1,83 +0,0 @@
-#ifndef _ADDRESS_TABLE_H
-#define _ADDRESS_TABLE_H 1
-
-/*
- * ----------------------------------------------------------------------------
- * addressTable.h - this file has all the declarations of the address table
- */
-
-#define _8K_TABLE 0
-#define ADDRESS_TABLE_ALIGNMENT 8
-#define HASH_DEFAULT_MODE 14
-#define HASH_MODE 13
-#define HASH_SIZE 12
-#define HOP_NUMBER 12
-#define MAC_ADDRESS_STRING_SIZE 12
-#define MAC_ENTRY_SIZE sizeof(addrTblEntry)
-#define MAX_NUMBER_OF_ADDRESSES_TO_STORE 1000
-#define PROMISCUOUS_MODE 0
-#define SKIP 1<<1
-#define SKIP_BIT 1
-#define VALID 1
-
-/*
- * ----------------------------------------------------------------------------
- * XXX_MIKE - potential sign-extension bugs lurk here...
- */
-#define NIBBLE_SWAPPING_32_BIT(X) ( (((X) & 0xf0f0f0f0) >> 4) \
- | (((X) & 0x0f0f0f0f) << 4) )
-
-#define NIBBLE_SWAPPING_16_BIT(X) ( (((X) & 0x0000f0f0) >> 4) \
- | (((X) & 0x00000f0f) << 4) )
-
-#define FLIP_4_BITS(X) ( (((X) & 0x01) << 3) | (((X) & 0x002) << 1) \
- | (((X) & 0x04) >> 1) | (((X) & 0x008) >> 3) )
-
-#define FLIP_6_BITS(X) ( (((X) & 0x01) << 5) | (((X) & 0x020) >> 5) \
- | (((X) & 0x02) << 3) | (((X) & 0x010) >> 3) \
- | (((X) & 0x04) << 1) | (((X) & 0x008) >> 1) )
-
-#define FLIP_9_BITS(X) ( (((X) & 0x01) << 8) | (((X) & 0x100) >> 8) \
- | (((X) & 0x02) << 6) | (((X) & 0x080) >> 6) \
- | (((X) & 0x04) << 4) | (((X) & 0x040) >> 4) \
- | ((X) & 0x10) | (((X) & 0x08) << 2) | (((X) & 0x020) >> 2) )
-
-/*
- * V: value we're operating on
- * O: offset of rightmost bit in field
- * W: width of field to shift
- * S: distance to shift left
- */
-#define MASK( fieldWidth ) ((1 << (fieldWidth)) - 1)
-#define leftShiftedBitfield( V,O,W,S) (((V) & (MASK(W) << (O))) << (S))
-#define rightShiftedBitfield(V,O,W,S) (((u32)((V) & (MASK(W) << (O)))) >> (S))
-
-
-/*
- * Push to main memory all cache lines associated with
- * the specified range of virtual memory addresses
- *
- * A: Address of first byte in range to flush
- * N: Number of bytes to flush
- * Note - flush_dcache_range() does a "sync", does NOT invalidate
- */
-#define DCACHE_FLUSH_N_SYNC( A, N ) flush_dcache_range( (A), ((A)+(N)) )
-
-
-typedef struct addressTableEntryStruct {
- u32 hi;
- u32 lo;
-} addrTblEntry;
-
-u32
-uncachedPages( u32 pages );
-u32
-hashTableFunction( u32 macH, u32 macL, u32 HashSize, u32 hash_mode );
-
-unsigned int
-initAddressTable( u32 port, u32 hashMode, u32 hashSize );
-
-int
-addAddressTableEntry( u32 port, u32 macH, u32 macL, u32 rd, u32 skip );
-
-#endif /* #ifndef _ADDRESS_TABLE_H */
diff --git a/board/evb64260/evb64260.c b/board/evb64260/evb64260.c
deleted file mode 100644
index 6a9d164569..0000000000
--- a/board/evb64260/evb64260.c
+++ /dev/null
@@ -1,444 +0,0 @@
-/*
- * (C) Copyright 2001
- * Josh Huber <huber@mclx.com>, Mission Critical Linux, Inc.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * evb64260.c - main board support/init for the Galileo Eval board.
- */
-
-#include <common.h>
-#include <74xx_7xx.h>
-#include <galileo/memory.h>
-#include <galileo/pci.h>
-#include <galileo/gt64260R.h>
-#include <net.h>
-
-#include <asm/io.h>
-#include "eth.h"
-#include "mpsc.h"
-#include "i2c.h"
-#include "64260.h"
-#ifdef CONFIG_ZUMA_V2
-extern void zuma_mbox_init(void);
-#endif
-
-#undef DEBUG
-#define MAP_PCI
-
-#ifdef DEBUG
-#define DP(x) x
-#else
-#define DP(x)
-#endif
-
-/* ------------------------------------------------------------------------- */
-
-/* this is the current GT register space location */
-/* it starts at CFG_DFL_GT_REGS but moves later to CFG_GT_REGS */
-
-/* Unfortunately, we cant change it while we are in flash, so we initialize it
- * to the "final" value. This means that any debug_led calls before
- * board_early_init_f wont work right (like in cpu_init_f).
- * See also my_remap_gt_regs below. (NTL)
- */
-
-unsigned int INTERNAL_REG_BASE_ADDR = CFG_GT_REGS;
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * This is a version of the GT register space remapping function that
- * doesn't touch globals (meaning, it's ok to run from flash.)
- *
- * Unfortunately, this has the side effect that a writable
- * INTERNAL_REG_BASE_ADDR is impossible. Oh well.
- */
-
-void
-my_remap_gt_regs(u32 cur_loc, u32 new_loc)
-{
- u32 temp;
-
- /* check and see if it's already moved */
- temp = in_le32((u32 *)(new_loc + INTERNAL_SPACE_DECODE));
- if ((temp & 0xffff) == new_loc >> 20)
- return;
-
- temp = (in_le32((u32 *)(cur_loc + INTERNAL_SPACE_DECODE)) &
- 0xffff0000) | (new_loc >> 20);
-
- out_le32((u32 *)(cur_loc + INTERNAL_SPACE_DECODE), temp);
-
- while (GTREGREAD(INTERNAL_SPACE_DECODE) != temp);
-}
-
-static void
-gt_pci_config(void)
-{
- /* move PCI stuff out of the way - NTL */
- /* map PCI Host 0 */
- pciMapSpace(PCI_HOST0, PCI_REGION0, CFG_PCI0_0_MEM_SPACE,
- CFG_PCI0_0_MEM_SPACE, CFG_PCI0_MEM_SIZE);
-
- pciMapSpace(PCI_HOST0, PCI_REGION1, 0, 0, 0);
- pciMapSpace(PCI_HOST0, PCI_REGION2, 0, 0, 0);
- pciMapSpace(PCI_HOST0, PCI_REGION3, 0, 0, 0);
-
- pciMapSpace(PCI_HOST0, PCI_IO, CFG_PCI0_IO_SPACE_PCI,
- CFG_PCI0_IO_SPACE, CFG_PCI0_IO_SIZE);
-
- /* map PCI Host 1 */
- pciMapSpace(PCI_HOST1, PCI_REGION0, CFG_PCI1_0_MEM_SPACE,
- CFG_PCI1_0_MEM_SPACE, CFG_PCI1_MEM_SIZE);
-
- pciMapSpace(PCI_HOST1, PCI_REGION1, 0, 0, 0);
- pciMapSpace(PCI_HOST1, PCI_REGION2, 0, 0, 0);
- pciMapSpace(PCI_HOST1, PCI_REGION3, 0, 0, 0);
-
- pciMapSpace(PCI_HOST1, PCI_IO, CFG_PCI1_IO_SPACE_PCI,
- CFG_PCI1_IO_SPACE, CFG_PCI1_IO_SIZE);
-
- /* PCI interface settings */
- GT_REG_WRITE(PCI_0TIMEOUT_RETRY, 0xffff);
- GT_REG_WRITE(PCI_1TIMEOUT_RETRY, 0xffff);
- GT_REG_WRITE(PCI_0BASE_ADDRESS_REGISTERS_ENABLE, 0xfffff80e);
- GT_REG_WRITE(PCI_1BASE_ADDRESS_REGISTERS_ENABLE, 0xfffff80e);
-
-
-}
-
-/* Setup CPU interface paramaters */
-static void
-gt_cpu_config(void)
-{
- cpu_t cpu = get_cpu_type();
- ulong tmp;
-
- /* cpu configuration register */
- tmp = GTREGREAD(CPU_CONFIGURATION);
-
- /* set the AACK delay bit
- * see Res#14 */
- tmp |= CPU_CONF_AACK_DELAY;
- tmp &= ~CPU_CONF_AACK_DELAY_2; /* New RGF */
-
- /* Galileo claims this is necessary for all busses >= 100 MHz */
- tmp |= CPU_CONF_FAST_CLK;
-
- if (cpu == CPU_750CX) {
- tmp &= ~CPU_CONF_DP_VALID; /* Safer, needed for CXe. RGF */
- tmp &= ~CPU_CONF_AP_VALID;
- } else {
- tmp |= CPU_CONF_DP_VALID;
- tmp |= CPU_CONF_AP_VALID;
- }
-
- /* this only works with the MPX bus */
- tmp &= ~CPU_CONF_RD_OOO; /* Safer RGF */
- tmp |= CPU_CONF_PIPELINE;
- tmp |= CPU_CONF_TA_DELAY;
-
- GT_REG_WRITE(CPU_CONFIGURATION, tmp);
-
- /* CPU master control register */
- tmp = GTREGREAD(CPU_MASTER_CONTROL);
-
- tmp |= CPU_MAST_CTL_ARB_EN;
-
- if ((cpu == CPU_7400) ||
- (cpu == CPU_7410) ||
- (cpu == CPU_7450)) {
-
- tmp |= CPU_MAST_CTL_CLEAN_BLK;
- tmp |= CPU_MAST_CTL_FLUSH_BLK;
-
- } else {
- /* cleanblock must be cleared for CPUs
- * that do not support this command
- * see Res#1 */
- tmp &= ~CPU_MAST_CTL_CLEAN_BLK;
- tmp &= ~CPU_MAST_CTL_FLUSH_BLK;
- }
- GT_REG_WRITE(CPU_MASTER_CONTROL, tmp);
-}
-
-/*
- * board_early_init_f.
- *
- * set up gal. device mappings, etc.
- */
-int board_early_init_f (void)
-{
- uchar sram_boot = 0;
-
- /*
- * set up the GT the way the kernel wants it
- * the call to move the GT register space will obviously
- * fail if it has already been done, but we're going to assume
- * that if it's not at the power-on location, it's where we put
- * it last time. (huber)
- */
- my_remap_gt_regs(CFG_DFL_GT_REGS, CFG_GT_REGS);
-
- gt_pci_config();
-
- /* mask all external interrupt sources */
- GT_REG_WRITE(CPU_INTERRUPT_MASK_REGISTER_LOW, 0);
- GT_REG_WRITE(CPU_INTERRUPT_MASK_REGISTER_HIGH, 0);
- GT_REG_WRITE(PCI_0INTERRUPT_CAUSE_MASK_REGISTER_LOW, 0);
- GT_REG_WRITE(PCI_0INTERRUPT_CAUSE_MASK_REGISTER_HIGH, 0);
- GT_REG_WRITE(PCI_1INTERRUPT_CAUSE_MASK_REGISTER_LOW, 0);
- GT_REG_WRITE(PCI_1INTERRUPT_CAUSE_MASK_REGISTER_HIGH, 0);
- GT_REG_WRITE(CPU_INT_0_MASK, 0);
- GT_REG_WRITE(CPU_INT_1_MASK, 0);
- GT_REG_WRITE(CPU_INT_2_MASK, 0);
- GT_REG_WRITE(CPU_INT_3_MASK, 0);
-
- /* now, onto the configuration */
- GT_REG_WRITE(SDRAM_CONFIGURATION, CFG_SDRAM_CONFIG);
-
- /* ----- DEVICE BUS SETTINGS ------ */
-
- /*
- * EVB
- * 0 - SRAM
- * 1 - RTC
- * 2 - UART
- * 3 - Flash
- * boot - BootCS
- *
- * Zuma
- * 0 - Flash
- * boot - BootCS
- */
-
- /*
- * the dual 7450 module requires burst access to the boot
- * device, so the serial rom copies the boot device to the
- * on-board sram on the eval board, and updates the correct
- * registers to boot from the sram. (device0)
- */
-#if defined(CONFIG_ZUMA_V2) || defined(CONFIG_P3G4)
- /* Zuma has no SRAM */
- sram_boot = 0;
-#else
- if (memoryGetDeviceBaseAddress(DEVICE0) && 0xfff00000 == CFG_MONITOR_BASE)
- sram_boot = 1;
-#endif
-
- if (!sram_boot)
- memoryMapDeviceSpace(DEVICE0, CFG_DEV0_SPACE, CFG_DEV0_SIZE);
-
- memoryMapDeviceSpace(DEVICE1, CFG_DEV1_SPACE, CFG_DEV1_SIZE);
- memoryMapDeviceSpace(DEVICE2, CFG_DEV2_SPACE, CFG_DEV2_SIZE);
- memoryMapDeviceSpace(DEVICE3, CFG_DEV3_SPACE, CFG_DEV3_SIZE);
-
- /* configure device timing */
-#ifdef CFG_DEV0_PAR
- if (!sram_boot)
- GT_REG_WRITE(DEVICE_BANK0PARAMETERS, CFG_DEV0_PAR);
-#endif
-
-#ifdef CFG_DEV1_PAR
- GT_REG_WRITE(DEVICE_BANK1PARAMETERS, CFG_DEV1_PAR);
-#endif
-#ifdef CFG_DEV2_PAR
- GT_REG_WRITE(DEVICE_BANK2PARAMETERS, CFG_DEV2_PAR);
-#endif
-
-#ifdef CONFIG_EVB64260
-#ifdef CFG_32BIT_BOOT_PAR
- /* detect if we are booting from the 32 bit flash */
- if (GTREGREAD(DEVICE_BOOT_BANK_PARAMETERS) & (0x3 << 20)) {
- /* 32 bit boot flash */
- GT_REG_WRITE(DEVICE_BANK3PARAMETERS, CFG_8BIT_BOOT_PAR);
- GT_REG_WRITE(DEVICE_BOOT_BANK_PARAMETERS, CFG_32BIT_BOOT_PAR);
- } else {
- /* 8 bit boot flash */
- GT_REG_WRITE(DEVICE_BANK3PARAMETERS, CFG_32BIT_BOOT_PAR);
- GT_REG_WRITE(DEVICE_BOOT_BANK_PARAMETERS, CFG_8BIT_BOOT_PAR);
- }
-#else
- /* 8 bit boot flash only */
- GT_REG_WRITE(DEVICE_BOOT_BANK_PARAMETERS, CFG_8BIT_BOOT_PAR);
-#endif
-#else /* CONFIG_EVB64260 not defined */
- /* We are booting from 16-bit flash.
- */
- GT_REG_WRITE(DEVICE_BOOT_BANK_PARAMETERS, CFG_16BIT_BOOT_PAR);
-#endif
-
- gt_cpu_config();
-
- /* MPP setup */
- GT_REG_WRITE(MPP_CONTROL0, CFG_MPP_CONTROL_0);
- GT_REG_WRITE(MPP_CONTROL1, CFG_MPP_CONTROL_1);
- GT_REG_WRITE(MPP_CONTROL2, CFG_MPP_CONTROL_2);
- GT_REG_WRITE(MPP_CONTROL3, CFG_MPP_CONTROL_3);
-
- GT_REG_WRITE(GPP_LEVEL_CONTROL, CFG_GPP_LEVEL_CONTROL);
- GT_REG_WRITE(SERIAL_PORT_MULTIPLEX, CFG_SERIAL_PORT_MUX);
-
- return 0;
-}
-
-/* various things to do after relocation */
-
-int misc_init_r (void)
-{
- icache_enable();
-#ifdef CFG_L2
- l2cache_enable();
-#endif
-
-#ifdef CONFIG_MPSC
- mpsc_init2();
-#endif
-
-#ifdef CONFIG_ZUMA_V2
- zuma_mbox_init();
-#endif
- return (0);
-}
-
-void
-after_reloc(ulong dest_addr)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- /* check to see if we booted from the sram. If so, move things
- * back to the way they should be. (we're running from main
- * memory at this point now */
-
- if (memoryGetDeviceBaseAddress(DEVICE0) == CFG_MONITOR_BASE) {
- memoryMapDeviceSpace(DEVICE0, CFG_DEV0_SPACE, CFG_DEV0_SIZE);
- memoryMapDeviceSpace(BOOT_DEVICE, CFG_FLASH_BASE, _1M);
- }
-
- /* now, jump to the main U-Boot board init code */
- board_init_r ((gd_t *)gd, dest_addr);
-
- /* NOTREACHED */
-}
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Check Board Identity:
- */
-
-int
-checkboard (void)
-{
- puts ("Board: " CFG_BOARD_NAME "\n");
- return (0);
-}
-
-/* utility functions */
-void
-debug_led(int led, int mode)
-{
-#if !defined(CONFIG_ZUMA_V2) && !defined(CONFIG_P3G4)
- volatile int *addr = NULL;
- int dummy;
-
- if (mode == 1) {
- switch (led) {
- case 0:
- addr = (int *)((unsigned int)CFG_DEV1_SPACE | 0x08000);
- break;
-
- case 1:
- addr = (int *)((unsigned int)CFG_DEV1_SPACE | 0x0c000);
- break;
-
- case 2:
- addr = (int *)((unsigned int)CFG_DEV1_SPACE | 0x10000);
- break;
- }
- } else if (mode == 0) {
- switch (led) {
- case 0:
- addr = (int *)((unsigned int)CFG_DEV1_SPACE | 0x14000);
- break;
-
- case 1:
- addr = (int *)((unsigned int)CFG_DEV1_SPACE | 0x18000);
- break;
-
- case 2:
- addr = (int *)((unsigned int)CFG_DEV1_SPACE | 0x1c000);
- break;
- }
- }
- WRITE_CHAR(addr, 0);
- dummy = *addr;
-#endif /* CONFIG_ZUMA_V2 */
-}
-
-void
-display_mem_map(void)
-{
- int i,j;
- unsigned int base,size,width;
- /* SDRAM */
- printf("SDRAM\n");
- for(i=0;i<=BANK3;i++) {
- base = memoryGetBankBaseAddress(i);
- size = memoryGetBankSize(i);
- if(size !=0)
- {
- printf("BANK%d: base - 0x%08x\tsize - %dM bytes\n",i,base,size>>20);
- }
- }
-
- /* CPU's PCI windows */
- for(i=0;i<=PCI_HOST1;i++) {
- printf("\nCPU's PCI %d windows\n", i);
- base=pciGetSpaceBase(i,PCI_IO);
- size=pciGetSpaceSize(i,PCI_IO);
- printf(" IO: base - 0x%08x\tsize - %dM bytes\n",base,size>>20);
- for(j=0;j<=PCI_REGION3;j++) {
- base = pciGetSpaceBase(i,j);
- size = pciGetSpaceSize(i,j);
- printf("MEMORY %d: base - 0x%08x\tsize - %dM bytes\n",j,base,
- size>>20);
- }
- }
-
- /* Devices */
- printf("\nDEVICES\n");
- for(i=0;i<=DEVICE3;i++) {
- base = memoryGetDeviceBaseAddress(i);
- size = memoryGetDeviceSize(i);
- width= memoryGetDeviceWidth(i) * 8;
- printf("DEV %d: base - 0x%08x\tsize - %dM bytes\twidth - %d bits\n",
- i, base, size>>20, width);
- }
-
- /* Bootrom */
- base = memoryGetDeviceBaseAddress(BOOT_DEVICE); /* Boot */
- size = memoryGetDeviceSize(BOOT_DEVICE);
- width= memoryGetDeviceWidth(BOOT_DEVICE) * 8;
- printf(" BOOT: base - 0x%08x\tsize - %dM bytes\twidth - %d bits\n",
- base, size>>20, width);
-}
diff --git a/board/evb64260/flash.c b/board/evb64260/flash.c
deleted file mode 100644
index 6ab23dce2f..0000000000
--- a/board/evb64260/flash.c
+++ /dev/null
@@ -1,854 +0,0 @@
-/*
- * (C) Copyright 2001
- * Josh Huber <huber@mclx.com>, Mission Critical Linux, Inc.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * flash.c - flash support for the 512k, 8bit boot flash on the GEVB
- * most of this file was based on the existing U-Boot
- * flash drivers.
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-#include <galileo/gt64260R.h>
-#include <galileo/memory.h>
-#include "intel_flash.h"
-
-#define FLASH_ROM 0xFFFD /* unknown flash type */
-#define FLASH_RAM 0xFFFE /* unknown flash type */
-#define FLASH_MAN_UNKNOWN 0xFFFF0000
-
-/* #define DEBUG */
-/* #define FLASH_ID_OVERRIDE */ /* Hack to set type to 040B if ROM emulator is installed.
- * Can be used to program a ROM in circuit if a programmer
- * is not available by swapping the rom out. */
-
-/* Intel flash commands */
-int flash_erase_intel(flash_info_t *info, int s_first, int s_last);
-int write_word_intel(bank_addr_t addr, bank_word_t value);
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (int portwidth, vu_long *addr, flash_info_t *info);
-static int write_word (flash_info_t *info, ulong dest, ulong data);
-static void flash_get_offsets (ulong base, flash_info_t *info);
-static flash_info_t *flash_get_info(ulong base);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long
-flash_init (void)
-{
- unsigned int i;
- unsigned long size_b0 = 0, size_b1 = 0;
- unsigned long base, flash_size;
-
- /* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* the boot flash */
- base = CFG_FLASH_BASE;
-#ifndef CFG_BOOT_FLASH_WIDTH
-#define CFG_BOOT_FLASH_WIDTH 1
-#endif
- size_b0 = flash_get_size(CFG_BOOT_FLASH_WIDTH, (vu_long *)base,
- &flash_info[0]);
-
-#ifndef CONFIG_P3G4
- printf("[");
- print_size (size_b0, "");
- printf("@%08lX] ", base);
-#endif
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH at %08lx: Size = 0x%08lx = %ld MB\n",
- base, size_b0, size_b0<<20);
- }
-
- base = memoryGetDeviceBaseAddress(CFG_EXTRA_FLASH_DEVICE);
- for(i=1;i<CFG_MAX_FLASH_BANKS;i++) {
- unsigned long size = flash_get_size(CFG_EXTRA_FLASH_WIDTH, (vu_long *)base, &flash_info[i]);
-
-#ifndef CONFIG_P3G4
- printf("[");
- print_size (size, "");
- printf("@%08lX] ", base);
-#endif
-
- if (flash_info[i].flash_id == FLASH_UNKNOWN) {
- if(i==1) {
- printf ("## Unknown FLASH at %08lx: Size = 0x%08lx = %ld MB\n",
- base, size_b1, size_b1<<20);
- }
- break;
- }
- size_b1+=size;
- base+=size;
- }
-
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
- /* monitor protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE + monitor_flash_len - 1,
- flash_get_info(CFG_MONITOR_BASE));
-#endif
-
-#ifdef CFG_ENV_IS_IN_FLASH
- /* ENV protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1,
- flash_get_info(CFG_ENV_ADDR));
-#endif
-
- flash_size = size_b0 + size_b1;
- return flash_size;
-}
-
-/*-----------------------------------------------------------------------
- */
-static void
-flash_get_offsets (ulong base, flash_info_t *info)
-{
- int i;
- int sector_size;
-
- if(!info->sector_count) return;
-
- /* set up sector start address table */
- switch(info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM040:
- case FLASH_28F128J3A:
- case FLASH_28F640J3A:
- case FLASH_RAM:
- /* this chip has uniformly spaced sectors */
- sector_size=info->size/info->sector_count;
- for (i = 0; i < info->sector_count; i++)
- info->start[i] = base + (i * sector_size);
- break;
- default:
- if (info->flash_id & FLASH_BTYPE) {
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00008000;
- info->start[2] = base + 0x0000C000;
- info->start[3] = base + 0x00010000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00020000) - 0x00060000;
- }
- } else {
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- info->start[i--] = base + info->size - 0x00008000;
- info->start[i--] = base + info->size - 0x0000C000;
- info->start[i--] = base + info->size - 0x00010000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00020000;
- }
- }
- }
-}
-
-/*-----------------------------------------------------------------------
- */
-
-static flash_info_t *flash_get_info(ulong base)
-{
- int i;
- flash_info_t * info;
-
- for (i = 0; i < CFG_MAX_FLASH_BANKS; i ++) {
- info = & flash_info[i];
- if (info->start[0] <= base && base <= info->start[0] + info->size - 1)
- break;
- }
-
- return i == CFG_MAX_FLASH_BANKS ? 0 : info;
-}
-
-/*-----------------------------------------------------------------------
- */
-void
-flash_print_info (flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD: printf ("AMD "); break;
- case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
- case FLASH_MAN_INTEL: printf ("INTEL "); break;
- default: printf ("Unknown Vendor "); break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM040:
- printf ("AM29LV040B (4 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM400B:
- printf ("AM29LV400B (4 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM400T:
- printf ("AM29LV400T (4 Mbit, top boot sector)\n");
- break;
- case FLASH_AM800B:
- printf ("AM29LV800B (8 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM800T:
- printf ("AM29LV800T (8 Mbit, top boot sector)\n");
- break;
- case FLASH_AM160B:
- printf ("AM29LV160B (16 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM160T:
- printf ("AM29LV160T (16 Mbit, top boot sector)\n");
- break;
- case FLASH_AM320B:
- printf ("AM29LV320B (32 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM320T:
- printf ("AM29LV320T (32 Mbit, top boot sector)\n");
- break;
- case FLASH_28F640J3A:
- printf ("28F640J3A (64 Mbit)\n");
- break;
- case FLASH_28F128J3A:
- printf ("28F128J3A (128 Mbit)\n");
- break;
- case FLASH_ROM:
- printf ("ROM\n");
- break;
- case FLASH_RAM:
- printf ("RAM\n");
- break;
- default:
- printf ("Unknown Chip Type\n");
- break;
- }
-
- puts (" Size: ");
- print_size (info->size, "");
- printf (" in %d Sectors\n", info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " "
- );
- }
- printf ("\n");
- return;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-
-static inline void flash_cmd(int width, volatile unsigned char *addr, int offset, unsigned char cmd)
-{
- /* supports 1x8, 1x16, and 2x16 */
- /* 2x8 and 4x8 are not supported */
- if(width==4) {
- /* assuming chips are in 16 bit mode */
- /* 2x16 */
- unsigned long cmd32=(cmd<<16)|cmd;
- *(volatile unsigned long *)(addr+offset*2)=cmd32;
- } else if (width == 2) {
- /* 1x16 */
- *(volatile unsigned short *)((unsigned short*)addr+offset)=cmd;
- } else {
- /* 1x8 */
- *(volatile unsigned char *)(addr+offset)=cmd;
- }
-}
-
-static ulong
-flash_get_size (int portwidth, vu_long *addr, flash_info_t *info)
-{
- short i;
- volatile unsigned char *caddr = (unsigned char *)addr;
- volatile unsigned short *saddr = (unsigned short *)addr;
- volatile unsigned long *laddr = (unsigned long *)addr;
- char old[2], save;
- ulong id, manu, base = (ulong)addr;
-
- info->portwidth=portwidth;
-
- save = *caddr;
-
- flash_cmd(portwidth,caddr,0,0xf0);
- flash_cmd(portwidth,caddr,0,0xf0);
-
- udelay(10);
-
- old[0] = caddr[0];
- old[1] = caddr[1];
-
-
- if(old[0]!=0xf0) {
- flash_cmd(portwidth,caddr,0,0xf0);
- flash_cmd(portwidth,caddr,0,0xf0);
-
- udelay(10);
-
- if(*caddr==0xf0) {
- /* this area is ROM */
- *caddr=save;
-#ifndef FLASH_ID_OVERRIDE
- info->flash_id = FLASH_ROM + FLASH_MAN_UNKNOWN;
- info->sector_count = 8;
- info->size = 0x80000;
-#else
- info->flash_id = FLASH_MAN_AMD + FLASH_AM040;
- info->sector_count = 8;
- info->size = 0x80000;
- info->chipwidth=1;
-#endif
- flash_get_offsets(base, info);
- return info->size;
- }
- } else {
- *caddr=0;
-
- udelay(10);
-
- if(*caddr==0) {
- /* this area is RAM */
- *caddr=save;
- info->flash_id = FLASH_RAM + FLASH_MAN_UNKNOWN;
- info->sector_count = 8;
- info->size = 0x80000;
- flash_get_offsets(base, info);
- return info->size;
- }
- flash_cmd(portwidth,caddr,0,0xf0);
-
- udelay(10);
- }
-
- /* Write auto select command: read Manufacturer ID */
- flash_cmd(portwidth,caddr,0x555,0xAA);
- flash_cmd(portwidth,caddr,0x2AA,0x55);
- flash_cmd(portwidth,caddr,0x555,0x90);
-
- udelay(10);
-
- if ((caddr[0] == old[0]) &&
- (caddr[1] == old[1])) {
-
- /* this area is ROM */
-#ifndef FLASH_ID_OVERRIDE
- info->flash_id = FLASH_ROM + FLASH_MAN_UNKNOWN;
- info->sector_count = 8;
- info->size = 0x80000;
-#else
- info->flash_id = FLASH_MAN_AMD + FLASH_AM040;
- info->sector_count = 8;
- info->size = 0x80000;
- info->chipwidth=1;
-#endif
- flash_get_offsets(base, info);
- return info->size;
-#ifdef DEBUG
- } else {
- printf("%px%d: %02x:%02x -> %02x:%02x\n",
- caddr, portwidth, old[0], old[1],
- caddr[0], caddr[1]);
-#endif
- }
-
- switch(portwidth) {
- case 1:
- manu = caddr[0];
- manu |= manu<<16;
- id = caddr[1];
- break;
- case 2:
- manu = saddr[0];
- manu |= manu<<16;
- id = saddr[1];
- id |= id<<16;
- break;
- case 4:
- manu = laddr[0];
- id = laddr[1];
- break;
- default:
- id = manu = -1;
- break;
- }
-
-#ifdef DEBUG
- printf("\n%08lx:%08lx:%08lx\n", base, manu, id);
- printf("%08lx %08lx %08lx %08lx\n",
- laddr[0],laddr[1],laddr[2],laddr[3]);
-#endif
-
- switch (manu) {
- case AMD_MANUFACT:
- info->flash_id = FLASH_MAN_AMD;
- break;
- case FUJ_MANUFACT:
- info->flash_id = FLASH_MAN_FUJ;
- break;
- case INTEL_MANUFACT:
- info->flash_id = FLASH_MAN_INTEL;
- break;
- default:
- printf("Unknown Mfr [%08lx]:%08lx\n", manu, id);
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- return (0); /* no or unknown flash */
- }
-
- switch (id) {
- case AMD_ID_LV400T:
- info->flash_id += FLASH_AM400T;
- info->sector_count = 11;
- info->size = 0x00100000;
- info->chipwidth=1;
- break; /* => 1 MB */
-
- case AMD_ID_LV400B:
- info->flash_id += FLASH_AM400B;
- info->sector_count = 11;
- info->size = 0x00100000;
- info->chipwidth=1;
- break; /* => 1 MB */
-
- case AMD_ID_LV800T:
- info->flash_id += FLASH_AM800T;
- info->sector_count = 19;
- info->size = 0x00200000;
- info->chipwidth=1;
- break; /* => 2 MB */
-
- case AMD_ID_LV800B:
- info->flash_id += FLASH_AM800B;
- info->sector_count = 19;
- info->size = 0x00200000;
- info->chipwidth=1;
- break; /* => 2 MB */
-
- case AMD_ID_LV160T:
- info->flash_id += FLASH_AM160T;
- info->sector_count = 35;
- info->size = 0x00400000;
- info->chipwidth=1;
- break; /* => 4 MB */
-
- case AMD_ID_LV160B:
- info->flash_id += FLASH_AM160B;
- info->sector_count = 35;
- info->size = 0x00400000;
- info->chipwidth=1;
- break; /* => 4 MB */
-#if 0 /* enable when device IDs are available */
- case AMD_ID_LV320T:
- info->flash_id += FLASH_AM320T;
- info->sector_count = 67;
- info->size = 0x00800000;
- break; /* => 8 MB */
-
- case AMD_ID_LV320B:
- info->flash_id += FLASH_AM320B;
- info->sector_count = 67;
- info->size = 0x00800000;
- break; /* => 8 MB */
-#endif
- case AMD_ID_LV040B:
- info->flash_id += FLASH_AM040;
- info->sector_count = 8;
- info->size = 0x80000;
- info->chipwidth=1;
- break;
-
- case INTEL_ID_28F640J3A:
- info->flash_id += FLASH_28F640J3A;
- info->sector_count = 64;
- info->size = 128*1024 * 64; /* 128kbytes x 64 blocks */
- info->chipwidth=2;
- if(portwidth==4) info->size*=2; /* 2x16 */
- break;
-
- case INTEL_ID_28F128J3A:
- info->flash_id += FLASH_28F128J3A;
- info->sector_count = 128;
- info->size = 128*1024 * 128; /* 128kbytes x 128 blocks */
- info->chipwidth=2;
- if(portwidth==4) info->size*=2; /* 2x16 */
- break;
-
- default:
- printf("Unknown id %lx:[%lx]\n", manu, id);
- info->flash_id = FLASH_UNKNOWN;
- info->chipwidth=1;
- return (0); /* => no or unknown flash */
-
- }
-
- flash_get_offsets(base, info);
-
-#if 0
- /* set up sector start address table */
- if (info->flash_id & FLASH_AM040) {
- /* this chip has uniformly spaced sectors */
- for (i = 0; i < info->sector_count; i++)
- info->start[i] = base + (i * 0x00010000);
-
- } else if (info->flash_id & FLASH_BTYPE) {
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00008000;
- info->start[2] = base + 0x0000C000;
- info->start[3] = base + 0x00010000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00020000) - 0x00060000;
- }
- } else {
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- info->start[i--] = base + info->size - 0x00008000;
- info->start[i--] = base + info->size - 0x0000C000;
- info->start[i--] = base + info->size - 0x00010000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00020000;
- }
- }
-#endif
-
- /* check for protected sectors */
- for (i = 0; i < info->sector_count; i++) {
- /* read sector protection at sector address, (A7 .. A0)=0x02 */
- /* D0 = 1 if protected */
- caddr = (volatile unsigned char *)(info->start[i]);
- saddr = (volatile unsigned short *)(info->start[i]);
- laddr = (volatile unsigned long *)(info->start[i]);
- if(portwidth==1)
- info->protect[i] = caddr[2] & 1;
- else if(portwidth==2)
- info->protect[i] = saddr[2] & 1;
- else
- info->protect[i] = laddr[2] & 1;
- }
-
- /*
- * Prevent writes to uninitialized FLASH.
- */
- if (info->flash_id != FLASH_UNKNOWN) {
- caddr = (volatile unsigned char *)info->start[0];
-
- flash_cmd(portwidth,caddr,0,0xF0); /* reset bank */
- }
-
- return (info->size);
-}
-
-/* TODO: 2x16 unsupported */
-int
-flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- volatile unsigned char *addr = (uchar *)(info->start[0]);
- int flag, prot, sect, l_sect;
- ulong start, now, last;
-
- /* TODO: 2x16 unsupported */
- if(info->portwidth==4) return 1;
-
- if((info->flash_id & FLASH_TYPEMASK) == FLASH_ROM) return 1;
- if((info->flash_id & FLASH_TYPEMASK) == FLASH_RAM) {
- for (sect = s_first; sect<=s_last; sect++) {
- int sector_size=info->size/info->sector_count;
- addr = (uchar *)(info->start[sect]);
- memset((void *)addr, 0, sector_size);
- }
- return 0;
- }
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- if ((info->flash_id&FLASH_VENDMASK) == FLASH_MAN_INTEL) {
- return flash_erase_intel(info,
- (unsigned short)s_first,
- (unsigned short)s_last);
- }
-
-#if 0
- if ((info->flash_id == FLASH_UNKNOWN) ||
- (info->flash_id > FLASH_AMD_COMP)) {
- printf ("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- return 1;
- }
-#endif
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- l_sect = -1;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- flash_cmd(info->portwidth,addr,0x555,0xAA);
- flash_cmd(info->portwidth,addr,0x2AA,0x55);
- flash_cmd(info->portwidth,addr,0x555,0x80);
- flash_cmd(info->portwidth,addr,0x555,0xAA);
- flash_cmd(info->portwidth,addr,0x2AA,0x55);
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr = (uchar *)(info->start[sect]);
- flash_cmd(info->portwidth,addr,0,0x30);
- l_sect = sect;
- }
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- /*
- * We wait for the last triggered sector
- */
- if (l_sect < 0)
- goto DONE;
-
- start = get_timer (0);
- last = start;
- addr = (volatile unsigned char *)(info->start[l_sect]);
- /* broken for 2x16: TODO */
- while ((addr[0] & 0x80) != 0x80) {
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- return 1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- }
-
-DONE:
- /* reset to read mode */
- addr = (volatile unsigned char *)info->start[0];
- flash_cmd(info->portwidth,addr,0,0xf0);
- flash_cmd(info->portwidth,addr,0,0xf0);
-
- printf (" done\n");
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-/* broken for 2x16: TODO */
-int
-write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int i, l, rc;
-
- if(info->portwidth==4) return 1;
-
- if((info->flash_id & FLASH_TYPEMASK) == FLASH_ROM) return 0;
- if((info->flash_id & FLASH_TYPEMASK) == FLASH_RAM) {
- memcpy((void *)addr, src, cnt);
- return 0;
- }
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
- for (; i<4 && cnt>0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = 0;
- for (i=0; i<4; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- return (write_word(info, wp, data));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-/* broken for 2x16: TODO */
-static int
-write_word (flash_info_t *info, ulong dest, ulong data)
-{
- volatile unsigned char *addr = (uchar *)(info->start[0]);
- ulong start;
- int flag, i;
-
- if(info->portwidth==4) return 1;
-
- if((info->flash_id & FLASH_TYPEMASK) == FLASH_ROM) return 1;
- if((info->flash_id & FLASH_TYPEMASK) == FLASH_RAM) {
- *(unsigned long *)dest=data;
- return 0;
- }
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
- unsigned short low = data & 0xffff;
- unsigned short hi = (data >> 16) & 0xffff;
- int ret = write_word_intel((bank_addr_t)dest, hi);
-
- if (!ret) ret = write_word_intel((bank_addr_t)(dest+2), low);
-
- return ret;
- }
-
- /* Check if Flash is (sufficiently) erased */
- if ((*((vu_long *)dest) & data) != data) {
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- /* first, perform an unlock bypass command to speed up flash writes */
- addr[0x555] = 0xAA;
- addr[0x2AA] = 0x55;
- addr[0x555] = 0x20;
-
- /* write each byte out */
- for (i = 0; i < 4; i++) {
- char *data_ch = (char *)&data;
- addr[0] = 0xA0;
- *(((char *)dest)+i) = data_ch[i];
- udelay(10); /* XXX */
- }
-
- /* we're done, now do an unlock bypass reset */
- addr[0] = 0x90;
- addr[0] = 0x00;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* data polling for D7 */
- start = get_timer (0);
- while ((*((vu_long *)dest) & 0x00800080) != (data & 0x00800080)) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- return (1);
- }
- }
- return (0);
-}
diff --git a/board/evb64260/i2c.c b/board/evb64260/i2c.c
deleted file mode 100644
index c62b64729c..0000000000
--- a/board/evb64260/i2c.c
+++ /dev/null
@@ -1,315 +0,0 @@
-#include <common.h>
-#include <mpc8xx.h>
-#include <malloc.h>
-#include <galileo/gt64260R.h>
-#include <galileo/core.h>
-
-#define MAX_I2C_RETRYS 10
-#define I2C_DELAY 1000 /* Should be at least the # of MHz of Tclk */
-#undef DEBUG_I2C
-
-#ifdef DEBUG_I2C
-#define DP(x) x
-#else
-#define DP(x)
-#endif
-
-/* Assuming that there is only one master on the bus (us) */
-
-static void
-i2c_init(int speed, int slaveaddr)
-{
- unsigned int n, m, freq, margin, power;
- unsigned int actualFreq, actualN=0, actualM=0;
- unsigned int control, status;
- unsigned int minMargin = 0xffffffff;
- unsigned int tclk = 125000000;
-
- DP(puts("i2c_init\n"));
-
- for(n = 0 ; n < 8 ; n++)
- {
- for(m = 0 ; m < 16 ; m++)
- {
- power = 2<<n; /* power = 2^(n+1) */
- freq = tclk/(10*(m+1)*power);
- if (speed > freq)
- margin = speed - freq;
- else
- margin = freq - speed;
- if(margin < minMargin)
- {
- minMargin = margin;
- actualFreq = freq;
- actualN = n;
- actualM = m;
- }
- }
- }
-
- DP(puts("setup i2c bus\n"));
-
- /* Setup bus */
-
- GT_REG_WRITE(I2C_SOFT_RESET, 0);
-
- DP(puts("udelay...\n"));
-
- udelay(I2C_DELAY);
-
- DP(puts("set baudrate\n"));
-
- GT_REG_WRITE(I2C_STATUS_BAUDE_RATE, (actualM << 3) | actualN);
- GT_REG_WRITE(I2C_CONTROL, (0x1 << 2) | (0x1 << 6));
-
- udelay(I2C_DELAY * 10);
-
- DP(puts("read control, baudrate\n"));
-
- GT_REG_READ(I2C_STATUS_BAUDE_RATE, &status);
- GT_REG_READ(I2C_CONTROL, &control);
-}
-
-static uchar
-i2c_start(void)
-{
- unsigned int control, status;
- int count = 0;
-
- DP(puts("i2c_start\n"));
-
- /* Set the start bit */
-
- GT_REG_READ(I2C_CONTROL, &control);
- control |= (0x1 << 5);
- GT_REG_WRITE(I2C_CONTROL, control);
-
- GT_REG_READ(I2C_STATUS_BAUDE_RATE, &status);
-
- count = 0;
- while ((status & 0xff) != 0x08) {
- udelay(I2C_DELAY);
- if (count > 20) {
- GT_REG_WRITE(I2C_CONTROL, (0x1 << 4)); /*stop*/
- return (status);
- }
- GT_REG_READ(I2C_STATUS_BAUDE_RATE, &status);
- count++;
- }
-
- return (0);
-}
-
-static uchar
-i2c_select_device(uchar dev_addr, uchar read, int ten_bit)
-{
- unsigned int status, data, bits = 7;
- int count = 0;
-
- DP(puts("i2c_select_device\n"));
-
- /* Output slave address */
-
- if (ten_bit) {
- bits = 10;
- }
-
- data = (dev_addr << 1);
- /* set the read bit */
- data |= read;
- GT_REG_WRITE(I2C_DATA, data);
- /* assert the address */
- RESET_REG_BITS(I2C_CONTROL, BIT3);
-
- udelay(I2C_DELAY);
-
- GT_REG_READ(I2C_STATUS_BAUDE_RATE, &status);
- count = 0;
- while (((status & 0xff) != 0x40) && ((status & 0xff) != 0x18)) {
- udelay(I2C_DELAY);
- if (count > 20) {
- GT_REG_WRITE(I2C_CONTROL, (0x1 << 4)); /*stop*/
- return(status);
- }
- GT_REG_READ(I2C_STATUS_BAUDE_RATE, &status);
- count++;
- }
-
- if (bits == 10) {
- printf("10 bit I2C addressing not yet implemented\n");
- return (0xff);
- }
-
- return (0);
-}
-
-static uchar
-i2c_get_data(uchar* return_data, int len) {
-
- unsigned int data, status = 0;
- int count = 0;
-
- DP(puts("i2c_get_data\n"));
-
- while (len) {
-
- /* Get and return the data */
-
- RESET_REG_BITS(I2C_CONTROL, (0x1 << 3));
-
- udelay(I2C_DELAY * 5);
-
- GT_REG_READ(I2C_STATUS_BAUDE_RATE, &status);
- count++;
- while ((status & 0xff) != 0x50) {
- udelay(I2C_DELAY);
- if(count > 2) {
- GT_REG_WRITE(I2C_CONTROL, (0x1 << 4)); /*stop*/
- return 0;
- }
- GT_REG_READ(I2C_STATUS_BAUDE_RATE, &status);
- count++;
- }
- GT_REG_READ(I2C_DATA, &data);
- len--;
- *return_data = (uchar)data;
- return_data++;
- }
- RESET_REG_BITS(I2C_CONTROL, BIT2|BIT3);
- while ((status & 0xff) != 0x58) {
- udelay(I2C_DELAY);
- if(count > 200) {
- GT_REG_WRITE(I2C_CONTROL, (0x1 << 4)); /*stop*/
- return (status);
- }
- GT_REG_READ(I2C_STATUS_BAUDE_RATE, &status);
- count++;
- }
- GT_REG_WRITE(I2C_CONTROL, (0x1 << 4)); /* stop */
-
- return (0);
-}
-
-static uchar
-i2c_write_data(unsigned int data, int len)
-{
- unsigned int status;
- int count = 0;
-
- DP(puts("i2c_write_data\n"));
-
- if (len > 4)
- return -1;
-
- while (len) {
- /* Set and assert the data */
-
- GT_REG_WRITE(I2C_DATA, (unsigned int)data);
- RESET_REG_BITS(I2C_CONTROL, (0x1 << 3));
-
- udelay(I2C_DELAY);
-
- GT_REG_READ(I2C_STATUS_BAUDE_RATE, &status);
- count++;
- while ((status & 0xff) != 0x28) {
- udelay(I2C_DELAY);
- if(count > 20) {
- GT_REG_WRITE(I2C_CONTROL, (0x1 << 4)); /*stop*/
- return (status);
- }
- GT_REG_READ(I2C_STATUS_BAUDE_RATE, &status);
- count++;
- }
- len--;
- }
- GT_REG_WRITE(I2C_CONTROL, (0x1 << 3) | (0x1 << 4));
- GT_REG_WRITE(I2C_CONTROL, (0x1 << 4));
-
- udelay(I2C_DELAY * 10);
-
- return (0);
-}
-
-static uchar
-i2c_set_dev_offset(uchar dev_addr, unsigned int offset, int ten_bit)
-{
- uchar status;
-
- DP(puts("i2c_set_dev_offset\n"));
-
- status = i2c_select_device(dev_addr, 0, ten_bit);
- if (status) {
-#ifdef DEBUG_I2C
- printf("Failed to select device setting offset: 0x%02x\n",
- status);
-#endif
- return status;
- }
-
- status = i2c_write_data(offset, 1);
- if (status) {
-#ifdef DEBUG_I2C
- printf("Failed to write data: 0x%02x\n", status);
-#endif
- return status;
- }
-
- return (0);
-}
-
-uchar
-i2c_read(uchar dev_addr, unsigned int offset, int len, uchar* data,
- int ten_bit)
-{
- uchar status = 0;
- unsigned int i2cFreq = 400000;
-
- DP(puts("i2c_read\n"));
-
- i2c_init(i2cFreq,0);
-
- status = i2c_start();
-
- if (status) {
-#ifdef DEBUG_I2C
- printf("Transaction start failed: 0x%02x\n", status);
-#endif
- return status;
- }
-
- status = i2c_set_dev_offset(dev_addr, 0, 0);
- if (status) {
-#ifdef DEBUG_I2C
- printf("Failed to set offset: 0x%02x\n", status);
-#endif
- return status;
- }
-
- i2c_init(i2cFreq,0);
-
- status = i2c_start();
- if (status) {
-#ifdef DEBUG_I2C
- printf("Transaction restart failed: 0x%02x\n", status);
-#endif
- return status;
- }
-
- status = i2c_select_device(dev_addr, 1, ten_bit);
- if (status) {
-#ifdef DEBUG_I2C
- printf("Address not acknowledged: 0x%02x\n", status);
-#endif
- return status;
- }
-
- status = i2c_get_data(data, len);
- if (status) {
-#ifdef DEBUG_I2C
- printf("Data not recieved: 0x%02x\n", status);
-#endif
- return status;
- }
-
- return 0;
-}
diff --git a/board/evb64260/i2c.h b/board/evb64260/i2c.h
deleted file mode 100644
index 9c21992524..0000000000
--- a/board/evb64260/i2c.h
+++ /dev/null
@@ -1,7 +0,0 @@
-#ifndef __I2C_H__
-#define __I2C_H__
-
-/* function declarations */
-uchar i2c_read(uchar, unsigned int, int, uchar*, int);
-
-#endif
diff --git a/board/evb64260/intel_flash.c b/board/evb64260/intel_flash.c
deleted file mode 100644
index ed6a2a0292..0000000000
--- a/board/evb64260/intel_flash.c
+++ /dev/null
@@ -1,277 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- * Hacked for the Hymod board by Murray.Jensen@cmst.csiro.au, 20-Oct-00
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-#include <galileo/gt64260R.h>
-#include <galileo/memory.h>
-#include "intel_flash.h"
-
-
-/*-----------------------------------------------------------------------
- * Protection Flags:
- */
-#define FLAG_PROTECT_SET 0x01
-#define FLAG_PROTECT_CLEAR 0x02
-
-static void
-bank_reset(flash_info_t *info, int sect)
-{
- bank_addr_t addrw, eaddrw;
-
- addrw = (bank_addr_t)info->start[sect];
- eaddrw = BANK_ADDR_NEXT_WORD(addrw);
-
- while (addrw < eaddrw) {
-#ifdef FLASH_DEBUG
- printf(" writing reset cmd to addr 0x%08lx\n",
- (unsigned long)addrw);
-#endif
- *addrw = BANK_CMD_RST;
- addrw++;
- }
-}
-
-static void
-bank_erase_init(flash_info_t *info, int sect)
-{
- bank_addr_t addrw, saddrw, eaddrw;
- int flag;
-
-#ifdef FLASH_DEBUG
- printf("0x%08x BANK_CMD_PROG\n", BANK_CMD_PROG);
- printf("0x%08x BANK_CMD_ERASE1\n", BANK_CMD_ERASE1);
- printf("0x%08x BANK_CMD_ERASE2\n", BANK_CMD_ERASE2);
- printf("0x%08x BANK_CMD_CLR_STAT\n", BANK_CMD_CLR_STAT);
- printf("0x%08x BANK_CMD_RST\n", BANK_CMD_RST);
- printf("0x%08x BANK_STAT_RDY\n", BANK_STAT_RDY);
- printf("0x%08x BANK_STAT_ERR\n", BANK_STAT_ERR);
-#endif
-
- saddrw = (bank_addr_t)info->start[sect];
- eaddrw = BANK_ADDR_NEXT_WORD(saddrw);
-
-#ifdef FLASH_DEBUG
- printf("erasing sector %d, start addr = 0x%08lx "
- "(bank next word addr = 0x%08lx)\n", sect,
- (unsigned long)saddrw, (unsigned long)eaddrw);
-#endif
-
- /* Disable intrs which might cause a timeout here */
- flag = disable_interrupts();
-
- for (addrw = saddrw; addrw < eaddrw; addrw++) {
-#ifdef FLASH_DEBUG
- printf(" writing erase cmd to addr 0x%08lx\n",
- (unsigned long)addrw);
-#endif
- *addrw = BANK_CMD_ERASE1;
- *addrw = BANK_CMD_ERASE2;
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-}
-
-static int
-bank_erase_poll(flash_info_t *info, int sect)
-{
- bank_addr_t addrw, saddrw, eaddrw;
- int sectdone, haderr;
-
- saddrw = (bank_addr_t)info->start[sect];
- eaddrw = BANK_ADDR_NEXT_WORD(saddrw);
-
- sectdone = 1;
- haderr = 0;
-
- for (addrw = saddrw; addrw < eaddrw; addrw++) {
- bank_word_t stat = *addrw;
-
-#ifdef FLASH_DEBUG
- printf(" checking status at addr "
- "0x%08x [0x%08x]\n",
- (unsigned long)addrw, stat);
-#endif
- if ((stat & BANK_STAT_RDY) != BANK_STAT_RDY)
- sectdone = 0;
- else if ((stat & BANK_STAT_ERR) != 0) {
- printf(" failed on sector %d "
- "(stat = 0x%08x) at "
- "address 0x%p\n",
- sect, stat, addrw);
- *addrw = BANK_CMD_CLR_STAT;
- haderr = 1;
- }
- }
-
- if (haderr)
- return (-1);
- else
- return (sectdone);
-}
-
-int
-write_word_intel(bank_addr_t addr, bank_word_t value)
-{
- bank_word_t stat;
- ulong start;
- int flag, retval;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- *addr = BANK_CMD_PROG;
-
- *addr = value;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- retval = 0;
-
- /* data polling for D7 */
- start = get_timer (0);
- do {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- retval = 1;
- goto done;
- }
- stat = *addr;
- } while ((stat & BANK_STAT_RDY) != BANK_STAT_RDY);
-
- if ((stat & BANK_STAT_ERR) != 0) {
- printf("flash program failed (stat = 0x%08lx) "
- "at address 0x%08lx\n", (ulong)stat, (ulong)addr);
- *addr = BANK_CMD_CLR_STAT;
- retval = 3;
- }
-
-done:
- /* reset to read mode */
- *addr = BANK_CMD_RST;
-
- return (retval);
-}
-
-/*-----------------------------------------------------------------------
- */
-
-int
-flash_erase_intel(flash_info_t *info, int s_first, int s_last)
-{
- int prot, sect, haderr;
- ulong start, now, last;
-
-#ifdef FLASH_DEBUG
- printf("\nflash_erase: erase %d sectors (%d to %d incl.) from\n"
- " Bank # %d: ", s_last - s_first + 1, s_first, s_last,
- (info - flash_info) + 1);
- flash_print_info(info);
-#endif
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf("- Warning: %d protected sector%s will not be erased!\n",
- prot, (prot > 1 ? "s" : ""));
- }
-
- start = get_timer (0);
- last = 0;
- haderr = 0;
-
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- ulong estart;
- int sectdone;
-
- bank_erase_init(info, sect);
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- estart = get_timer(start);
-
- do {
- now = get_timer(start);
-
- if (now - estart > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout (sect %d)\n", sect);
- haderr = 1;
- break;
- }
-
-#ifndef FLASH_DEBUG
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
-#endif
-
- sectdone = bank_erase_poll(info, sect);
-
- if (sectdone < 0) {
- haderr = 1;
- break;
- }
-
- } while (!sectdone);
-
- if (haderr)
- break;
- }
- }
-
- if (haderr > 0)
- printf (" failed\n");
- else
- printf (" done\n");
-
- /* reset to read mode */
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- bank_reset(info, sect);
- }
- }
- return haderr;
-}
diff --git a/board/evb64260/intel_flash.h b/board/evb64260/intel_flash.h
deleted file mode 100644
index dc2aa0008e..0000000000
--- a/board/evb64260/intel_flash.h
+++ /dev/null
@@ -1,160 +0,0 @@
-/*************** DEFINES for Intel StrataFlash FLASH chip ********************/
-
-/*
- * acceptable chips types are:
- *
- * 28F320J5, 28F640J5, 28F320J3A, 28F640J3A and 28F128J3A
- */
-
-/* register addresses, valid only following an CHIP_CMD_RD_ID command */
-#define CHIP_ADDR_REG_MAN 0x000000 /* manufacturer's id */
-#define CHIP_ADDR_REG_DEV 0x000001 /* device id */
-#define CHIP_ADDR_REG_CFGM 0x000003 /* master lock config */
-#define CHIP_ADDR_REG_CFG(b) (((b)<<16)|2) /* lock config for block b */
-
-/* Commands */
-#define CHIP_CMD_RST 0xFF /* reset flash */
-#define CHIP_CMD_RD_ID 0x90 /* read the id and lock bits */
-#define CHIP_CMD_RD_QUERY 0x98 /* read device capabilities */
-#define CHIP_CMD_RD_STAT 0x70 /* read the status register */
-#define CHIP_CMD_CLR_STAT 0x50 /* clear the staus register */
-#define CHIP_CMD_WR_BUF 0xE8 /* clear the staus register */
-#define CHIP_CMD_PROG 0x40 /* program word command */
-#define CHIP_CMD_ERASE1 0x20 /* 1st word for block erase */
-#define CHIP_CMD_ERASE2 0xD0 /* 2nd word for block erase */
-#define CHIP_CMD_ERASE_SUSP 0xB0 /* suspend block erase */
-#define CHIP_CMD_LOCK 0x60 /* 1st word for all lock cmds */
-#define CHIP_CMD_SET_LOCK_BLK 0x01 /* 2nd wrd set block lock bit */
-#define CHIP_CMD_SET_LOCK_MSTR 0xF1 /* 2nd wrd set master lck bit */
-#define CHIP_CMD_CLR_LOCK_BLK 0xD0 /* 2nd wrd clear blk lck bit */
-
-/* status register bits */
-#define CHIP_STAT_DPS 0x02 /* Device Protect Status */
-#define CHIP_STAT_VPPS 0x08 /* VPP Status */
-#define CHIP_STAT_PSLBS 0x10 /* Program+Set Lock Bit Stat */
-#define CHIP_STAT_ECLBS 0x20 /* Erase+Clr Lock Bit Stat */
-#define CHIP_STAT_ESS 0x40 /* Erase Suspend Status */
-#define CHIP_STAT_RDY 0x80 /* WSM Mach Status, 1=rdy */
-
-#define CHIP_STAT_ERR (CHIP_STAT_VPPS | CHIP_STAT_DPS | \
- CHIP_STAT_ECLBS | CHIP_STAT_PSLBS)
-
-/* ID and Lock Configuration */
-#define CHIP_RD_ID_LOCK 0x01 /* Bit 0 of each byte */
-#define CHIP_RD_ID_MAN 0x89 /* Manufacturer code = 0x89 */
-#define CHIP_RD_ID_DEV CFG_FLASH_ID
-
-/* dimensions */
-#define CHIP_WIDTH 2 /* chips are in 16 bit mode */
-#define CHIP_WSHIFT 1 /* (log2 of CHIP_WIDTH) */
-#define CHIP_NBLOCKS 128
-#define CHIP_BLKSZ (128 * 1024) /* of 128Kbytes each */
-#define CHIP_SIZE (CHIP_BLKSZ * CHIP_NBLOCKS)
-
-/********************** DEFINES for Hymod Flash ******************************/
-
-/*
- * The hymod board has 2 x 28F320J5 chips running in
- * 16 bit mode, for a 32 bit wide bank.
- */
-
-typedef unsigned short bank_word_t; /* 8/16/32/64bit unsigned int */
-typedef volatile bank_word_t *bank_addr_t;
-typedef unsigned long bank_size_t; /* want this big - >= 32 bit */
-
-#define BANK_CHIP_WIDTH 1 /* each bank is 1 chip wide */
-#define BANK_CHIP_WSHIFT 0 /* (log2 of BANK_CHIP_WIDTH) */
-
-#define BANK_WIDTH (CHIP_WIDTH * BANK_CHIP_WIDTH)
-#define BANK_WSHIFT (CHIP_WSHIFT + BANK_CHIP_WSHIFT)
-#define BANK_NBLOCKS CHIP_NBLOCKS
-#define BANK_BLKSZ (CHIP_BLKSZ * BANK_CHIP_WIDTH)
-#define BANK_SIZE (CHIP_SIZE * BANK_CHIP_WIDTH)
-
-#define MAX_BANKS 1 /* only one bank possible */
-
-/* align bank addresses and sizes to bank word boundaries */
-#define BANK_ADDR_WORD_ALIGN(a) ((bank_addr_t)((bank_size_t)(a) \
- & ~(BANK_WIDTH - 1)))
-#define BANK_SIZE_WORD_ALIGN(s) ((bank_size_t)BANK_ADDR_WORD_ALIGN( \
- (bank_size_t)(s) + (BANK_WIDTH - 1)))
-
-/* align bank addresses and sizes to bank block boundaries */
-#define BANK_ADDR_BLK_ALIGN(a) ((bank_addr_t)((bank_size_t)(a) \
- & ~(BANK_BLKSZ - 1)))
-#define BANK_SIZE_BLK_ALIGN(s) ((bank_size_t)BANK_ADDR_BLK_ALIGN( \
- (bank_size_t)(s) + (BANK_BLKSZ - 1)))
-
-/* align bank addresses and sizes to bank boundaries */
-#define BANK_ADDR_BANK_ALIGN(a) ((bank_addr_t)((bank_size_t)(a) \
- & ~(BANK_SIZE - 1)))
-#define BANK_SIZE_BANK_ALIGN(s) ((bank_size_t)BANK_ADDR_BANK_ALIGN( \
- (bank_size_t)(s) + (BANK_SIZE - 1)))
-
-/* add an offset to a bank address */
-#define BANK_ADDR_OFFSET(a, o) (bank_addr_t)((bank_size_t)(a) + \
- (bank_size_t)(o))
-
-/* get base address of bank b, given flash base address a */
-#define BANK_ADDR_BASE(a, b) BANK_ADDR_OFFSET(BANK_ADDR_BANK_ALIGN(a), \
- (bank_size_t)(b) * BANK_SIZE)
-
-/* adjust a bank address to start of next word, block or bank */
-#define BANK_ADDR_NEXT_WORD(a) BANK_ADDR_OFFSET(BANK_ADDR_WORD_ALIGN(a), \
- BANK_WIDTH)
-#define BANK_ADDR_NEXT_BLK(a) BANK_ADDR_OFFSET(BANK_ADDR_BLK_ALIGN(a), \
- BANK_BLKSZ)
-#define BANK_ADDR_NEXT_BANK(a) BANK_ADDR_OFFSET(BANK_ADDR_BANK_ALIGN(a), \
- BANK_SIZE)
-
-/* get bank address of chip register r given a bank base address a */
-#define BANK_ADDR_REG(a, r) BANK_ADDR_OFFSET(BANK_ADDR_BANK_ALIGN(a), \
- ((bank_size_t)(r) << BANK_WSHIFT))
-
-/* make a bank address for each chip register address */
-
-#define BANK_ADDR_REG_MAN(a) BANK_ADDR_REG((a), CHIP_ADDR_REG_MAN)
-#define BANK_ADDR_REG_DEV(a) BANK_ADDR_REG((a), CHIP_ADDR_REG_DEV)
-#define BANK_ADDR_REG_CFGM(a) BANK_ADDR_REG((a), CHIP_ADDR_REG_CFGM)
-#define BANK_ADDR_REG_CFG(b,a) BANK_ADDR_REG((a), CHIP_ADDR_REG_CFG(b))
-
-/*
- * replicate a chip cmd/stat/rd value into each byte position within a word
- * so that multiple chips are accessed in a single word i/o operation
- *
- * this must be as wide as the bank_word_t type, and take into account the
- * chip width and bank layout
- */
-
-#define BANK_FILL_WORD(o) ((bank_word_t)(o))
-
-/* make a bank word value for each chip cmd/stat/rd value */
-
-/* Commands */
-#define BANK_CMD_RST BANK_FILL_WORD(CHIP_CMD_RST)
-#define BANK_CMD_RD_ID BANK_FILL_WORD(CHIP_CMD_RD_ID)
-#define BANK_CMD_RD_STAT BANK_FILL_WORD(CHIP_CMD_RD_STAT)
-#define BANK_CMD_CLR_STAT BANK_FILL_WORD(CHIP_CMD_CLR_STAT)
-#define BANK_CMD_ERASE1 BANK_FILL_WORD(CHIP_CMD_ERASE1)
-#define BANK_CMD_ERASE2 BANK_FILL_WORD(CHIP_CMD_ERASE2)
-#define BANK_CMD_PROG BANK_FILL_WORD(CHIP_CMD_PROG)
-#define BANK_CMD_LOCK BANK_FILL_WORD(CHIP_CMD_LOCK)
-#define BANK_CMD_SET_LOCK_BLK BANK_FILL_WORD(CHIP_CMD_SET_LOCK_BLK)
-#define BANK_CMD_SET_LOCK_MSTR BANK_FILL_WORD(CHIP_CMD_SET_LOCK_MSTR)
-#define BANK_CMD_CLR_LOCK_BLK BANK_FILL_WORD(CHIP_CMD_CLR_LOCK_BLK)
-
-/* status register bits */
-#define BANK_STAT_DPS BANK_FILL_WORD(CHIP_STAT_DPS)
-#define BANK_STAT_PSS BANK_FILL_WORD(CHIP_STAT_PSS)
-#define BANK_STAT_VPPS BANK_FILL_WORD(CHIP_STAT_VPPS)
-#define BANK_STAT_PSLBS BANK_FILL_WORD(CHIP_STAT_PSLBS)
-#define BANK_STAT_ECLBS BANK_FILL_WORD(CHIP_STAT_ECLBS)
-#define BANK_STAT_ESS BANK_FILL_WORD(CHIP_STAT_ESS)
-#define BANK_STAT_RDY BANK_FILL_WORD(CHIP_STAT_RDY)
-
-#define BANK_STAT_ERR BANK_FILL_WORD(CHIP_STAT_ERR)
-
-/* ID and Lock Configuration */
-#define BANK_RD_ID_LOCK BANK_FILL_WORD(CHIP_RD_ID_LOCK)
-#define BANK_RD_ID_MAN BANK_FILL_WORD(CHIP_RD_ID_MAN)
-#define BANK_RD_ID_DEV BANK_FILL_WORD(CHIP_RD_ID_DEV)
diff --git a/board/evb64260/local.h b/board/evb64260/local.h
deleted file mode 100644
index 3d9b443e7b..0000000000
--- a/board/evb64260/local.h
+++ /dev/null
@@ -1,62 +0,0 @@
-/*
- * include/local.h - local configuration options, board specific
- */
-
-#ifndef __LOCAL_H
-#define __LOCAL_H
-
-/*
- * High Level Configuration Options
- * (easy to change)
- */
-
-/* This tells U-Boot that the config options are compiled in */
-/* #undef ENV_IS_EMBEDDED */
-/* Don't touch this! U-Boot figures this out based on other
- * magic. */
-
-/* Uncomment and define any of the below options */
-
-/* #define CONFIG_750CX */ /* The 750CX doesn't support as many things in L2CR */
- /* Note: If you defined CONFIG_EVB64260_750CX this */
- /* gets defined automatically. */
-
-/* These want string arguments */
-/* #define CONFIG_BOOTARGS */
-/* #define CONFIG_BOOTCOMMAND */
-/* #define CONFIG_RAMBOOTCOMMAND */
-/* #define CONFIG_NFSBOOTCOMMAND */
-/* #define CFG_AUTOLOAD */
-/* #define CONFIG_PREBOOT */
-
-/* These don't */
-
-/* #define CONFIG_BOOTDELAY */
-/* #define CONFIG_BAUDRATE */
-/* #define CONFIG_LOADS_ECHO */
-/* #define CONFIG_ETHADDR */
-/* #define CONFIG_ETH2ADDR */
-/* #define CONFIG_ETH3ADDR */
-/* #define CONFIG_IPADDR */
-/* #define CONFIG_SERVERIP */
-/* #define CONFIG_ROOTPATH */
-/* #define CONFIG_GATEWAYIP */
-/* #define CONFIG_NETMASK */
-/* #define CONFIG_HOSTNAME */
-/* #define CONFIG_BOOTFILE */
-/* #define CONFIG_LOADADDR */
-
-/* these hardware addresses are pretty bogus, please change them to
- suit your needs */
-
-/* first ethernet */
-#define CONFIG_ETHADDR 00:11:22:33:44:55
-
-/* next two ethernet hwaddrs */
-#define CONFIG_HAS_ETH1
-#define CONFIG_ETH1ADDR 00:11:22:33:44:66
-#define CONFIG_HAS_ETH2
-#define CONFIG_ETH2ADDR 00:11:22:33:44:77
-
-#define CONFIG_ENV_OVERWRITE
-#endif /* __CONFIG_H */
diff --git a/board/evb64260/memory.c b/board/evb64260/memory.c
deleted file mode 100644
index e339854453..0000000000
--- a/board/evb64260/memory.c
+++ /dev/null
@@ -1,457 +0,0 @@
-/* Memory.c - Memory mappings and remapping functions */
-
-/* Copyright - Galileo technology. */
-
-/* modified by Josh Huber to clean some things up, and
- * fit it into the U-Boot framework */
-
-#include <galileo/core.h>
-#include <galileo/memory.h>
-
-/********************************************************************
-* memoryGetBankBaseAddress - Gets the base address of a memory bank
-* - If the memory bank size is 0 then this base address has no meaning!!!
-*
-*
-* INPUTS: MEMORY_BANK bank - The bank we ask for its base Address.
-* OUTPUT: N/A
-* RETURNS: Memory bank base address.
-*********************************************************************/
-static unsigned long memoryGetBankRegOffset(MEMORY_BANK bank)
-{
- switch (bank)
- {
- case BANK0:
- return SCS_0_LOW_DECODE_ADDRESS;
- case BANK1:
- return SCS_1_LOW_DECODE_ADDRESS;
- case BANK2:
- return SCS_2_LOW_DECODE_ADDRESS;
- case BANK3:
- return SCS_3_LOW_DECODE_ADDRESS;
- }
- return SCS_0_LOW_DECODE_ADDRESS; /* default value */
-}
-
-unsigned int memoryGetBankBaseAddress(MEMORY_BANK bank)
-{
- unsigned int base;
- unsigned int regOffset=memoryGetBankRegOffset(bank);
-
- GT_REG_READ(regOffset,&base);
- base = base << 20;
- return base;
-}
-
-/********************************************************************
-* memoryGetDeviceBaseAddress - Gets the base address of a device.
-* - If the device size is 0 then this base address has no meaning!!!
-*
-*
-* INPUT: DEVICE device - The device we ask for its base address.
-* OUTPUT: N/A
-* RETURNS: Device base address.
-*********************************************************************/
-static unsigned int memoryGetDeviceRegOffset(DEVICE device)
-{
- switch (device)
- {
- case DEVICE0:
- return CS_0_LOW_DECODE_ADDRESS;
- case DEVICE1:
- return CS_1_LOW_DECODE_ADDRESS;
- case DEVICE2:
- return CS_2_LOW_DECODE_ADDRESS;
- case DEVICE3:
- return CS_3_LOW_DECODE_ADDRESS;
- case BOOT_DEVICE:
- return BOOTCS_LOW_DECODE_ADDRESS;
- }
- return CS_0_LOW_DECODE_ADDRESS; /* default value */
-}
-
-unsigned int memoryGetDeviceBaseAddress(DEVICE device)
-{
- unsigned int regBase;
- unsigned int regEnd;
- unsigned int regOffset=memoryGetDeviceRegOffset(device);
-
- GT_REG_READ(regOffset, &regBase);
- GT_REG_READ(regOffset+8, &regEnd);
-
- if(regEnd<=regBase) return 0xffffffff; /* ERROR !!! */
-
- regBase = regBase << 20;
- return regBase;
-}
-
-/********************************************************************
-* memoryGetBankSize - Returns the size of a memory bank.
-*
-*
-* INPUT: MEMORY_BANK bank - The bank we ask for its size.
-* OUTPUT: N/A
-* RETURNS: Memory bank size.
-*********************************************************************/
-unsigned int memoryGetBankSize(MEMORY_BANK bank)
-{
- unsigned int size,base;
- unsigned int highValue;
- unsigned int highAddress=memoryGetBankRegOffset(bank)+8;
-
- base = memoryGetBankBaseAddress(bank);
- GT_REG_READ(highAddress,&highValue);
- highValue = (highValue + 1) << 20;
- if(base > highValue)
- size=0;
- else
- size = highValue - base;
- return size;
-}
-
-/********************************************************************
-* memoryGetDeviceSize - Returns the size of a device memory space
-*
-*
-* INPUT: DEVICE device - The device we ask for its base address.
-* OUTPUT: N/A
-* RETURNS: Size of a device memory space.
-*********************************************************************/
-unsigned int memoryGetDeviceSize(DEVICE device)
-{
- unsigned int size,base;
- unsigned int highValue;
- unsigned int highAddress=memoryGetDeviceRegOffset(device)+8;
-
- base = memoryGetDeviceBaseAddress(device);
- GT_REG_READ(highAddress,&highValue);
- if (highValue == 0xfff)
- {
- size = (~base) + 1; /* what the heck is this? */
- return size;
- }
- else
- highValue = (highValue + 1) << 20;
-
- if(base > highValue)
- size=0;
- else
- size = highValue - base;
- return size;
-}
-
-/********************************************************************
-* memoryGetDeviceWidth - A device can be with: 1,2,4 or 8 Bytes data width.
-* The width is determine in registers: 'Device Parameters'
-* registers (0x45c, 0x460, 0x464, 0x468, 0x46c - for each device.
-* at bits: [21:20].
-*
-* INPUT: DEVICE device - Device number
-* OUTPUT: N/A
-* RETURNS: Device width in Bytes (1,2,4 or 8), 0 if error had occurred.
-*********************************************************************/
-unsigned int memoryGetDeviceWidth(DEVICE device)
-{
- unsigned int width;
- unsigned int regValue;
-
- GT_REG_READ(DEVICE_BANK0PARAMETERS + device*4,&regValue);
- width = (regValue & 0x00300000) >> 20;
- switch (width)
- {
- case 0:
- return 1;
- case 1:
- return 2;
- case 2:
- return 4;
- case 3:
- return 8;
- default:
- return 0;
- }
-}
-
-bool memoryMapBank(MEMORY_BANK bank, unsigned int bankBase,unsigned int bankLength)
-{
- unsigned int low=0xfff;
- unsigned int high=0x0;
- unsigned int regOffset=memoryGetBankRegOffset(bank);
-
- if(bankLength!=0) {
- low = (bankBase >> 20) & 0xffff;
- high=((bankBase+bankLength)>>20)-1;
- }
-
-#ifdef DEBUG
- {
- unsigned int oldLow, oldHigh;
- GT_REG_READ(regOffset,&oldLow);
- GT_REG_READ(regOffset+8,&oldHigh);
-
- printf("b%d %x-%x->%x-%x\n", bank, oldLow, oldHigh, low, high);
- }
-#endif
-
- GT_REG_WRITE(regOffset,low);
- GT_REG_WRITE(regOffset+8,high);
-
- return true;
-}
-bool memoryMapDeviceSpace(DEVICE device, unsigned int deviceBase,unsigned int deviceLength)
-{
- /* TODO: what are appropriate "unmapped" values? */
- unsigned int low=0xfff;
- unsigned int high=0x0;
- unsigned int regOffset=memoryGetDeviceRegOffset(device);
-
- if(deviceLength != 0) {
- low=deviceBase>>20;
- high=((deviceBase+deviceLength)>>20)-1;
- } else {
- /* big problems in here... */
- /* this will HANG */
- }
-
- GT_REG_WRITE(regOffset,low);
- GT_REG_WRITE(regOffset+8,high);
-
- return true;
-}
-
-
-/********************************************************************
-* memoryMapInternalRegistersSpace - Sets new base address for the internals
-* registers.
-*
-* INPUTS: unsigned int internalRegBase - The new base address.
-* RETURNS: true on success, false on failure
-*********************************************************************/
-bool memoryMapInternalRegistersSpace(unsigned int internalRegBase)
-{
- unsigned int currentValue;
- unsigned int internalValue = internalRegBase;
-
- internalRegBase = (internalRegBase >> 20);
- GT_REG_READ(INTERNAL_SPACE_DECODE,&currentValue);
- internalRegBase = (currentValue & 0xffff0000) | internalRegBase;
- GT_REG_WRITE(INTERNAL_SPACE_DECODE,internalRegBase);
- INTERNAL_REG_BASE_ADDR = internalValue;
- return true;
-}
-
-/********************************************************************
-* memoryGetInternalRegistersSpace - Gets internal registers Base Address.
-*
-* INPUTS: unsigned int internalRegBase - The new base address.
-* RETURNS: true on success, false on failure
-*********************************************************************/
-unsigned int memoryGetInternalRegistersSpace(void)
-{
- return INTERNAL_REG_BASE_ADDR;
-}
-
-/********************************************************************
-* memorySetProtectRegion - This function modifys one of the 8 regions with
-* one of the three protection mode.
-* - Be advised to check the spec before modifying them.
-*
-*
-* Inputs: CPU_PROTECT_REGION - one of the eight regions.
-* CPU_ACCESS - general access.
-* CPU_WRITE - read only access.
-* CPU_CACHE_PROTECT - chache access.
-* we defining CPU because there is another protect from the pci SIDE.
-* Returns: false if one of the parameters is wrong and true else
-*********************************************************************/
-bool memorySetProtectRegion(MEMORY_PROTECT_REGION region,
- MEMORY_ACCESS memAccess,
- MEMORY_ACCESS_WRITE memWrite,
- MEMORY_CACHE_PROTECT cacheProtection,
- unsigned int baseAddress,
- unsigned int regionLength)
-{
- unsigned int protectHigh = baseAddress + regionLength;
-
- if(regionLength == 0) /* closing the region */
- {
- GT_REG_WRITE(CPU_LOW_PROTECT_ADDRESS_0 + 0x10*region,0x0000ffff);
- GT_REG_WRITE(CPU_HIGH_PROTECT_ADDRESS_0 + 0x10*region,0);
- return true;
- }
- baseAddress = (baseAddress & 0xfff00000) >> 20;
- baseAddress = baseAddress | memAccess << 16 | memWrite << 17
- | cacheProtection << 18;
- GT_REG_WRITE(CPU_LOW_PROTECT_ADDRESS_0 + 0x10*region,baseAddress);
- protectHigh = (protectHigh & 0xfff00000) >> 20;
- GT_REG_WRITE(CPU_HIGH_PROTECT_ADDRESS_0 + 0x10*region,protectHigh - 1);
- return true;
-}
-
-/********************************************************************
-* memorySetRegionSnoopMode - This function modifys one of the 4 regions which
-* supports Cache Coherency.
-*
-*
-* Inputs: SNOOP_REGION region - One of the four regions.
-* SNOOP_TYPE snoopType - There is four optional Types:
-* 1. No Snoop.
-* 2. Snoop to WT region.
-* 3. Snoop to WB region.
-* 4. Snoop & Invalidate to WB region.
-* unsigned int baseAddress - Base Address of this region.
-* unsigned int topAddress - Top Address of this region.
-* Returns: false if one of the parameters is wrong and true else
-*********************************************************************/
-bool memorySetRegionSnoopMode(MEMORY_SNOOP_REGION region,
- MEMORY_SNOOP_TYPE snoopType,
- unsigned int baseAddress,
- unsigned int regionLength)
-{
- unsigned int snoopXbaseAddress;
- unsigned int snoopXtopAddress;
- unsigned int data;
- unsigned int snoopHigh = baseAddress + regionLength;
-
- if( (region > MEM_SNOOP_REGION3) || (snoopType > MEM_SNOOP_WB) )
- return false;
- snoopXbaseAddress = SNOOP_BASE_ADDRESS_0 + 0x10 * region;
- snoopXtopAddress = SNOOP_TOP_ADDRESS_0 + 0x10 * region;
- if(regionLength == 0) /* closing the region */
- {
- GT_REG_WRITE(snoopXbaseAddress,0x0000ffff);
- GT_REG_WRITE(snoopXtopAddress,0);
- return true;
- }
- baseAddress = baseAddress & 0xffff0000;
- data = (baseAddress >> 16) | snoopType << 16;
- GT_REG_WRITE(snoopXbaseAddress,data);
- snoopHigh = (snoopHigh & 0xfff00000) >> 20;
- GT_REG_WRITE(snoopXtopAddress,snoopHigh - 1);
- return true;
-}
-
-/********************************************************************
-* memoryRemapAddress - This fubction used for address remapping.
-*
-*
-* Inputs: regOffset: remap register
-* remapValue :
-* Returns: false if one of the parameters is erroneous,true otherwise.
-*********************************************************************/
-bool memoryRemapAddress(unsigned int remapReg, unsigned int remapValue)
-{
- unsigned int valueForReg;
- valueForReg = (remapValue & 0xfff00000) >> 20;
- GT_REG_WRITE(remapReg, valueForReg);
- return true;
-}
-
-/********************************************************************
-* memoryGetDeviceParam - This function used for getting device parameters from
-* DEVICE BANK PARAMETERS REGISTER
-*
-*
-* Inputs: - deviceParam: STRUCT with paramiters for DEVICE BANK
-* PARAMETERS REGISTER
-* - deviceNum : number of device
-* Returns: false if one of the parameters is erroneous,true otherwise.
-*********************************************************************/
-bool memoryGetDeviceParam(DEVICE_PARAM *deviceParam, DEVICE deviceNum)
-{
- unsigned int valueOfReg;
- unsigned int calcData;
-
- GT_REG_READ(DEVICE_BANK0PARAMETERS + 4 * deviceNum, &valueOfReg);
- calcData = (0x7 & valueOfReg) + ((0x400000 & valueOfReg) >> 19);
- deviceParam -> turnOff = calcData; /* Turn Off */
-
- calcData = ((0x78 & valueOfReg) >> 3) + ((0x800000 & valueOfReg) >> 19);
- deviceParam -> acc2First = calcData; /* Access To First */
-
- calcData = ((0x780 & valueOfReg) >> 7) + ((0x1000000 & valueOfReg) >> 20);
- deviceParam -> acc2Next = calcData; /* Access To Next */
-
- calcData = ((0x3800 & valueOfReg) >> 11) + ((0x2000000 & valueOfReg) >> 22);
- deviceParam -> ale2Wr = calcData; /* Ale To Write */
-
- calcData = ((0x1c000 & valueOfReg) >> 14) + ((0x4000000 & valueOfReg) >> 23);
- deviceParam -> wrLow = calcData; /* Write Active */
-
- calcData = ((0xe0000 & valueOfReg) >> 17) + ((0x8000000 & valueOfReg) >> 24);
- deviceParam -> wrHigh = calcData; /* Write High */
-
- calcData = ((0x300000 & valueOfReg) >> 20);
- switch (calcData)
- {
- case 0:
- deviceParam -> deviceWidth = 1; /* one Byte - 8-bit */
- break;
- case 1:
- deviceParam -> deviceWidth = 2; /* two Bytes - 16-bit */
- break;
- case 2:
- deviceParam -> deviceWidth = 4; /* four Bytes - 32-bit */
- break;
- case 3:
- deviceParam -> deviceWidth = 8; /* eight Bytes - 64-bit */
- break;
- default:
- deviceParam -> deviceWidth = 1;
- break;
- }
- return true;
-}
-
-/********************************************************************
-* memorySetDeviceParam - This function used for setting device parameters to
-* DEVICE BANK PARAMETERS REGISTER
-*
-*
-* Inputs: - deviceParam: STRUCT for store paramiters from DEVICE BANK
-* PARAMETERS REGISTER
-* - deviceNum : number of device
-* Returns: false if one of the parameters is erroneous,true otherwise.
-*********************************************************************/
-bool memorySetDeviceParam(DEVICE_PARAM *deviceParam, DEVICE deviceNum)
-{
- unsigned int valueForReg;
-
- if((deviceParam -> turnOff >= 0xf) || (deviceParam -> acc2First >= 0x1f) ||
- (deviceParam -> acc2Next >= 0x1f) || (deviceParam -> ale2Wr >= 0xf) ||
- (deviceParam -> wrLow >= 0xf) || (deviceParam -> wrHigh >= 0xf))
- return false;
- valueForReg = (((deviceParam -> turnOff) & 0x7) |
- (((deviceParam -> turnOff) & 0x8) << 19) |
- (((deviceParam -> acc2First) & 0xf) << 3) |
- (((deviceParam -> acc2First) & 0x10) << 19) |
- (((deviceParam -> acc2Next) & 0xf) << 7) |
- (((deviceParam -> acc2Next) & 0x10) << 20) |
- (((deviceParam -> ale2Wr) & 0x7) << 11) |
- (((deviceParam -> ale2Wr) & 0xf) << 22) |
- (((deviceParam -> wrLow) & 0x7) << 14) |
- (((deviceParam -> wrLow) & 0xf) << 23) |
- (((deviceParam -> wrHigh) & 0x7) << 17) |
- (((deviceParam -> wrHigh) & 0xf) << 24));
- /* insert the device width: */
- switch(deviceParam->deviceWidth)
- {
- case 1:
- valueForReg = valueForReg | _8BIT;
- break;
- case 2:
- valueForReg = valueForReg | _16BIT;
- break;
- case 4:
- valueForReg = valueForReg | _32BIT;
- break;
- case 8:
- valueForReg = valueForReg | _64BIT;
- break;
- default:
- valueForReg = valueForReg | _8BIT;
- break;
- }
- GT_REG_WRITE(DEVICE_BANK0PARAMETERS + 4 * deviceNum, valueForReg);
- return true;
-}
diff --git a/board/evb64260/misc.S b/board/evb64260/misc.S
deleted file mode 100644
index 438dea6126..0000000000
--- a/board/evb64260/misc.S
+++ /dev/null
@@ -1,182 +0,0 @@
-#include <config.h>
-#include <74xx_7xx.h>
-#include <version.h>
-
-#include <ppc_asm.tmpl>
-#include <ppc_defs.h>
-
-#include <asm/cache.h>
-#include <asm/mmu.h>
-
-#include <galileo/gt64260R.h>
-
-#ifdef CONFIG_ECC
- /* Galileo specific asm code for initializing ECC */
- .globl board_relocate_rom
-board_relocate_rom:
- mflr r7
- /* update the location of the GT registers */
- lis r11, CFG_GT_REGS@h
- /* if we're using ECC, we must use the DMA engine to copy ourselves */
- bl start_idma_transfer_0
- bl wait_for_idma_0
- bl stop_idma_engine_0
-
- mtlr r7
- blr
-
- .globl board_init_ecc
-board_init_ecc:
- mflr r7
- /* NOTE: r10 still contains the location we've been relocated to
- * which happens to be TOP_OF_RAM - CFG_MONITOR_LEN */
-
- /* now that we're running from ram, init the rest of main memory
- * for ECC use */
- lis r8, CFG_MONITOR_LEN@h
- ori r8, r8, CFG_MONITOR_LEN@l
-
- divw r3, r10, r8
-
- /* set up the counter, and init the starting address */
- mtctr r3
- li r12, 0
-
- /* bytes per transfer */
- mr r5, r8
-about_to_init_ecc:
-1: mr r3, r12
- mr r4, r12
- bl start_idma_transfer_0
- bl wait_for_idma_0
- bl stop_idma_engine_0
- add r12, r12, r8
- bdnz 1b
-
- mtlr r7
- blr
-
- /* r3: dest addr
- * r4: source addr
- * r5: byte count
- * r11: gt regbase
- * trashes: r6, r5
- */
-start_idma_transfer_0:
- /* set the byte count, including the OWN bit */
- mr r6, r11
- ori r6, r6, CHANNEL0_DMA_BYTE_COUNT
- stwbrx r5, 0, (r6)
-
- /* set the source address */
- mr r6, r11
- ori r6, r6, CHANNEL0_DMA_SOURCE_ADDRESS
- stwbrx r4, 0, (r6)
-
- /* set the dest address */
- mr r6, r11
- ori r6, r6, CHANNEL0_DMA_DESTINATION_ADDRESS
- stwbrx r3, 0, (r6)
-
- /* set the next record pointer */
- li r5, 0
- mr r6, r11
- ori r6, r6, CHANNEL0NEXT_RECORD_POINTER
- stwbrx r5, 0, (r6)
-
- /* set the low control register */
- /* bit 9 is NON chained mode, bit 31 is new style descriptors.
- bit 12 is channel enable */
- ori r5, r5, (1 << 12) | (1 << 12) | (1 << 11)
- /* 15 shifted by 16 (oris) == bit 31 */
- oris r5, r5, (1 << 15)
- mr r6, r11
- ori r6, r6, CHANNEL0CONTROL
- stwbrx r5, 0, (r6)
-
- blr
-
- /* this waits for the bytecount to return to zero, indicating
- * that the trasfer is complete */
-wait_for_idma_0:
- mr r5, r11
- lis r6, 0xff
- ori r6, r6, 0xffff
- ori r5, r5, CHANNEL0_DMA_BYTE_COUNT
-1: lwbrx r4, 0, (r5)
- and. r4, r4, r6
- bne 1b
-
- blr
-
- /* this turns off channel 0 of the idma engine */
-stop_idma_engine_0:
- /* shut off the DMA engine */
- li r5, 0
- mr r6, r11
- ori r6, r6, CHANNEL0CONTROL
- stwbrx r5, 0, (r6)
-
- blr
-#endif
-
-#ifdef CFG_BOARD_ASM_INIT
- /* NOTE: trashes r3-r7 */
- .globl board_asm_init
-board_asm_init:
- /* just move the GT registers to where they belong */
- lis r3, CFG_DFL_GT_REGS@h
- ori r3, r3, CFG_DFL_GT_REGS@l
- lis r4, CFG_GT_REGS@h
- ori r4, r4, CFG_GT_REGS@l
- li r5, INTERNAL_SPACE_DECODE
-
- /* test to see if we've already moved */
- lwbrx r6, r5, r4
- andi. r6, r6, 0xffff
- rlwinm r7, r4, 12, 16, 31
- cmp cr0, r7, r6
- beqlr
-
- /* nope, have to move the registers */
- lwbrx r6, r5, r3
- andis. r6, r6, 0xffff
- or r6, r6, r7
- stwbrx r6, r5, r3
-
- /* now, poll for the change */
-1: lwbrx r7, r5, r4
- cmp cr0, r7, r6
- bne 1b
-
- /* done! */
- blr
-#endif
-
-/* For use of the debug LEDs */
- .global led_on0
-led_on0:
- xor r18, r18, r18
- lis r18, 0x1c80
- ori r18, r18, 0x8000
- stw r18, 0x0(r18)
- sync
- blr
-
- .global led_on1
-led_on1:
- xor r18, r18, r18
- lis r18, 0x1c80
- ori r18, r18, 0xc000
- stw r18, 0x0(r18)
- sync
- blr
-
- .global led_on2
-led_on2:
- xor r18, r18, r18
- lis r18, 0x1c81
- ori r18, r18, 0x0000
- stw r18, 0x0(r18)
- sync
- blr
diff --git a/board/evb64260/mpsc.c b/board/evb64260/mpsc.c
deleted file mode 100644
index ee623ca569..0000000000
--- a/board/evb64260/mpsc.c
+++ /dev/null
@@ -1,868 +0,0 @@
-/*
- * (C) Copyright 2001
- * John Clemens <clemens@mclx.com>, Mission Critical Linux, Inc.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * mpsc.c - driver for console over the MPSC.
- */
-
-#include <common.h>
-#include <config.h>
-#include <asm/cache.h>
-
-#include <malloc.h>
-#include "mpsc.h"
-
-int (*mpsc_putchar)(char ch) = mpsc_putchar_early;
-
-static volatile unsigned int *rx_desc_base=NULL;
-static unsigned int rx_desc_index=0;
-static volatile unsigned int *tx_desc_base=NULL;
-static unsigned int tx_desc_index=0;
-
-/* local function declarations */
-static int galmpsc_connect(int channel, int connect);
-static int galmpsc_route_serial(int channel, int connect);
-static int galmpsc_route_rx_clock(int channel, int brg);
-static int galmpsc_route_tx_clock(int channel, int brg);
-static int galmpsc_write_config_regs(int mpsc, int mode);
-static int galmpsc_config_channel_regs(int mpsc);
-static int galmpsc_set_char_length(int mpsc, int value);
-static int galmpsc_set_stop_bit_length(int mpsc, int value);
-static int galmpsc_set_parity(int mpsc, int value);
-static int galmpsc_enter_hunt(int mpsc);
-static int galmpsc_set_brkcnt(int mpsc, int value);
-static int galmpsc_set_tcschar(int mpsc, int value);
-static int galmpsc_set_snoop(int mpsc, int value);
-static int galmpsc_shutdown(int mpsc);
-
-static int galsdma_set_RFT(int channel);
-static int galsdma_set_SFM(int channel);
-static int galsdma_set_rxle(int channel);
-static int galsdma_set_txle(int channel);
-static int galsdma_set_burstsize(int channel, unsigned int value);
-static int galsdma_set_RC(int channel, unsigned int value);
-
-static int galbrg_set_CDV(int channel, int value);
-static int galbrg_enable(int channel);
-static int galbrg_disable(int channel);
-static int galbrg_set_clksrc(int channel, int value);
-static int galbrg_set_CUV(int channel, int value);
-
-static void galsdma_enable_rx(void);
-
-/* static int galbrg_reset(int channel); */
-
-#define SOFTWARE_CACHE_MANAGEMENT
-
-#ifdef SOFTWARE_CACHE_MANAGEMENT
-#define FLUSH_DCACHE(a,b) if(dcache_status()){clean_dcache_range((u32)(a),(u32)(b));}
-#define FLUSH_AND_INVALIDATE_DCACHE(a,b) if(dcache_status()){flush_dcache_range((u32)(a),(u32)(b));}
-#define INVALIDATE_DCACHE(a,b) if(dcache_status()){invalidate_dcache_range((u32)(a),(u32)(b));}
-#else
-#define FLUSH_DCACHE(a,b)
-#define FLUSH_AND_INVALIDATE_DCACHE(a,b)
-#define INVALIDATE_DCACHE(a,b)
-#endif
-
-
-/* GT64240A errata: cant read MPSC/BRG registers... so make mirrors in ram for read/modify write */
-#define MIRROR_HACK ((struct _tag_mirror_hack *)&(gd->mirror_hack))
-
-#define GT_REG_WRITE_MIRROR_G(a,d) {MIRROR_HACK->a ## _M = d; GT_REG_WRITE(a,d);}
-#define GTREGREAD_MIRROR_G(a) (MIRROR_HACK->a ## _M)
-
-#define GT_REG_WRITE_MIRROR(a,i,g,d) {MIRROR_HACK->a ## _M[i] = d; GT_REG_WRITE(a + (i*g),d);}
-#define GTREGREAD_MIRROR(a,i,g) (MIRROR_HACK->a ## _M[i])
-
-/* make sure this isn't bigger than 16 long words (u-boot.h) */
-struct _tag_mirror_hack {
- unsigned GALMPSC_PROTOCONF_REG_M[2]; /* 8008 */
- unsigned GALMPSC_CHANNELREG_1_M[2]; /* 800c */
- unsigned GALMPSC_CHANNELREG_2_M[2]; /* 8010 */
- unsigned GALBRG_0_CONFREG_M[2]; /* b200 */
-
- unsigned GALMPSC_ROUTING_REGISTER_M; /* b400 */
- unsigned GALMPSC_RxC_ROUTE_M; /* b404 */
- unsigned GALMPSC_TxC_ROUTE_M; /* b408 */
-
- unsigned int baudrate; /* current baudrate, for tsc delay calc */
-};
-
-/* static struct _tag_mirror_hack *mh = NULL; */
-
-/* special function for running out of flash. doesn't modify any
- * global variables [josh] */
-int
-mpsc_putchar_early(char ch)
-{
- DECLARE_GLOBAL_DATA_PTR;
- int mpsc=CHANNEL;
- int temp=GTREGREAD_MIRROR(GALMPSC_CHANNELREG_2,mpsc,GALMPSC_REG_GAP);
- galmpsc_set_tcschar(mpsc,ch);
- GT_REG_WRITE(GALMPSC_CHANNELREG_2+(mpsc*GALMPSC_REG_GAP), temp|0x200);
-
-#define MAGIC_FACTOR (10*1000000)
-
- udelay(MAGIC_FACTOR / MIRROR_HACK->baudrate);
- return 0;
-}
-
-/* This is used after relocation, see serial.c and mpsc_init2 */
-static int
-mpsc_putchar_sdma(char ch)
-{
- volatile unsigned int *p;
- unsigned int temp;
-
-
- /* align the descriptor */
- p = tx_desc_base;
- memset((void *)p, 0, 8 * sizeof(unsigned int));
-
- /* fill one 64 bit buffer */
- /* word swap, pad with 0 */
- p[4] = 0; /* x */
- p[5] = (unsigned int)ch; /* x */
-
- /* CHANGED completely according to GT64260A dox - NTL */
- p[0] = 0x00010001; /* 0 */
- p[1] = DESC_OWNER | DESC_FIRST | DESC_LAST; /* 4 */
- p[2] = 0; /* 8 */
- p[3] = (unsigned int)&p[4]; /* c */
-
-#if 0
- p[9] = DESC_FIRST | DESC_LAST;
- p[10] = (unsigned int)&p[0];
- p[11] = (unsigned int)&p[12];
-#endif
-
- FLUSH_DCACHE(&p[0], &p[8]);
-
- GT_REG_WRITE(GALSDMA_0_CUR_TX_PTR+(CHANNEL*GALSDMA_REG_DIFF),
- (unsigned int)&p[0]);
- GT_REG_WRITE(GALSDMA_0_FIR_TX_PTR+(CHANNEL*GALSDMA_REG_DIFF),
- (unsigned int)&p[0]);
-
- temp = GTREGREAD(GALSDMA_0_COM_REG+(CHANNEL*GALSDMA_REG_DIFF));
- temp |= (TX_DEMAND | TX_STOP);
- GT_REG_WRITE(GALSDMA_0_COM_REG+(CHANNEL*GALSDMA_REG_DIFF), temp);
-
- INVALIDATE_DCACHE(&p[1], &p[2]);
-
- while(p[1] & DESC_OWNER) {
- udelay(100);
- INVALIDATE_DCACHE(&p[1], &p[2]);
- }
-
- return 0;
-}
-
-char
-mpsc_getchar(void)
-{
- DECLARE_GLOBAL_DATA_PTR;
- static unsigned int done = 0;
- volatile char ch;
- unsigned int len=0, idx=0, temp;
-
- volatile unsigned int *p;
-
-
- do {
- p=&rx_desc_base[rx_desc_index*8];
-
- INVALIDATE_DCACHE(&p[0], &p[1]);
- /* Wait for character */
- while (p[1] & DESC_OWNER){
- udelay(100);
- INVALIDATE_DCACHE(&p[0], &p[1]);
- }
-
- /* Handle error case */
- if (p[1] & (1<<15)) {
- printf("oops, error: %08x\n", p[1]);
-
- temp = GTREGREAD_MIRROR(GALMPSC_CHANNELREG_2,CHANNEL,GALMPSC_REG_GAP);
- temp |= (1 << 23);
- GT_REG_WRITE_MIRROR(GALMPSC_CHANNELREG_2, CHANNEL,GALMPSC_REG_GAP, temp);
-
- /* Can't poll on abort bit, so we just wait. */
- udelay(100);
-
- galsdma_enable_rx();
- }
-
- /* Number of bytes left in this descriptor */
- len = p[0] & 0xffff;
-
- if (len) {
- /* Where to look */
- idx = 5;
- if (done > 3) idx = 4;
- if (done > 7) idx = 7;
- if (done > 11) idx = 6;
-
- INVALIDATE_DCACHE(&p[idx], &p[idx+1]);
- ch = p[idx] & 0xff;
- done++;
- }
-
- if (done < len) {
- /* this descriptor has more bytes still
- * shift down the char we just read, and leave the
- * buffer in place for the next time around
- */
- p[idx] = p[idx] >> 8;
- FLUSH_DCACHE(&p[idx], &p[idx+1]);
- }
-
- if (done == len) {
- /* nothing left in this descriptor.
- * go to next one
- */
- p[1] = DESC_OWNER | DESC_FIRST | DESC_LAST;
- p[0] = 0x00100000;
- FLUSH_DCACHE(&p[0], &p[1]);
- /* Next descriptor */
- rx_desc_index = (rx_desc_index + 1) % RX_DESC;
- done = 0;
- }
- } while (len==0); /* galileo bug.. len might be zero */
-
- return ch;
-}
-
-int
-mpsc_test_char(void)
-{
- volatile unsigned int *p=&rx_desc_base[rx_desc_index*8];
-
- INVALIDATE_DCACHE(&p[1], &p[2]);
-
- if (p[1] & DESC_OWNER) return 0;
- else return 1;
-}
-
-int
-mpsc_init(int baud)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- memset(MIRROR_HACK, 0, sizeof(struct _tag_mirror_hack));
- MIRROR_HACK->GALMPSC_ROUTING_REGISTER_M=0x3fffffff;
-
- /* BRG CONFIG */
- galbrg_set_baudrate(CHANNEL, baud);
-#if defined(CONFIG_ZUMA_V2) || defined(CONFIG_P3G4)
- galbrg_set_clksrc(CHANNEL,0x8); /* connect TCLK -> BRG */
-#else
- galbrg_set_clksrc(CHANNEL,0);
-#endif
- galbrg_set_CUV(CHANNEL, 0);
- galbrg_enable(CHANNEL);
-
- /* Set up clock routing */
- galmpsc_connect(CHANNEL, GALMPSC_CONNECT);
- galmpsc_route_serial(CHANNEL, GALMPSC_CONNECT);
- galmpsc_route_rx_clock(CHANNEL, CHANNEL);
- galmpsc_route_tx_clock(CHANNEL, CHANNEL);
-
- /* reset MPSC state */
- galmpsc_shutdown(CHANNEL);
-
- /* SDMA CONFIG */
- galsdma_set_burstsize(CHANNEL, L1_CACHE_BYTES/8); /* in 64 bit words (8 bytes) */
- galsdma_set_txle(CHANNEL);
- galsdma_set_rxle(CHANNEL);
- galsdma_set_RC(CHANNEL, 0xf);
- galsdma_set_SFM(CHANNEL);
- galsdma_set_RFT(CHANNEL);
-
- /* MPSC CONFIG */
- galmpsc_write_config_regs(CHANNEL, GALMPSC_UART);
- galmpsc_config_channel_regs(CHANNEL);
- galmpsc_set_char_length(CHANNEL, GALMPSC_CHAR_LENGTH_8); /* 8 */
- galmpsc_set_parity(CHANNEL, GALMPSC_PARITY_NONE); /* N */
- galmpsc_set_stop_bit_length(CHANNEL, GALMPSC_STOP_BITS_1); /* 1 */
-
- /* COMM_MPSC CONFIG */
-#ifdef SOFTWARE_CACHE_MANAGEMENT
- galmpsc_set_snoop(CHANNEL, 0); /* disable snoop */
-#else
- galmpsc_set_snoop(CHANNEL, 1); /* enable snoop */
-#endif
-
- return 0;
-}
-
-void
-mpsc_init2(void)
-{
- int i;
-
- mpsc_putchar = mpsc_putchar_sdma;
-
- /* RX descriptors */
- rx_desc_base = (unsigned int *)malloc(((RX_DESC+1)*8) *
- sizeof(unsigned int));
-
- /* align descriptors */
- rx_desc_base = (unsigned int *)
- (((unsigned int)rx_desc_base+32) & 0xFFFFFFF0);
-
- rx_desc_index = 0;
-
- memset((void *)rx_desc_base, 0, (RX_DESC*8)*sizeof(unsigned int));
-
- for (i = 0; i < RX_DESC; i++) {
- rx_desc_base[i*8 + 3] = (unsigned int)&rx_desc_base[i*8 + 4]; /* Buffer */
- rx_desc_base[i*8 + 2] = (unsigned int)&rx_desc_base[(i+1)*8]; /* Next descriptor */
- rx_desc_base[i*8 + 1] = DESC_OWNER | DESC_FIRST | DESC_LAST; /* Command & control */
- rx_desc_base[i*8] = 0x00100000;
- }
- rx_desc_base[(i-1)*8 + 2] = (unsigned int)&rx_desc_base[0];
-
- FLUSH_DCACHE(&rx_desc_base[0], &rx_desc_base[RX_DESC*8]);
- GT_REG_WRITE(GALSDMA_0_CUR_RX_PTR+(CHANNEL*GALSDMA_REG_DIFF),
- (unsigned int)&rx_desc_base[0]);
-
- /* TX descriptors */
- tx_desc_base = (unsigned int *)malloc(((TX_DESC+1)*8) *
- sizeof(unsigned int));
-
- /* align descriptors */
- tx_desc_base = (unsigned int *)
- (((unsigned int)tx_desc_base+32) & 0xFFFFFFF0);
-
- tx_desc_index = -1;
-
- memset((void *)tx_desc_base, 0, (TX_DESC*8)*sizeof(unsigned int));
-
- for (i = 0; i < TX_DESC; i++) {
- tx_desc_base[i*8 + 5] = (unsigned int)0x23232323;
- tx_desc_base[i*8 + 4] = (unsigned int)0x23232323;
- tx_desc_base[i*8 + 3] = (unsigned int)&tx_desc_base[i*8 + 4];
- tx_desc_base[i*8 + 2] = (unsigned int)&tx_desc_base[(i+1)*8];
- tx_desc_base[i*8 + 1] = DESC_OWNER | DESC_FIRST | DESC_LAST;
-
- /* set sbytecnt and shadow byte cnt to 1 */
- tx_desc_base[i*8] = 0x00010001;
- }
- tx_desc_base[(i-1)*8 + 2] = (unsigned int)&tx_desc_base[0];
-
- FLUSH_DCACHE(&tx_desc_base[0], &tx_desc_base[TX_DESC*8]);
-
- udelay(100);
-
- galsdma_enable_rx();
-
- return;
-}
-
-int
-galbrg_set_baudrate(int channel, int rate)
-{
- DECLARE_GLOBAL_DATA_PTR;
- int clock;
-
- galbrg_disable(channel);
-
-#if defined(CONFIG_ZUMA_V2) || defined(CONFIG_P3G4)
- /* from tclk */
- clock = (CFG_BUS_HZ/(16*rate)) - 1;
-#else
- clock = (3686400/(16*rate)) - 1;
-#endif
-
- galbrg_set_CDV(channel, clock);
-
- galbrg_enable(channel);
-
- MIRROR_HACK->baudrate = rate;
-
- return 0;
-}
-
-/* ------------------------------------------------------------------ */
-
-/* Below are all the private functions that no one else needs */
-
-static int
-galbrg_set_CDV(int channel, int value)
-{
- DECLARE_GLOBAL_DATA_PTR;
- unsigned int temp;
-
- temp = GTREGREAD_MIRROR(GALBRG_0_CONFREG, channel, GALBRG_REG_GAP);
- temp &= 0xFFFF0000;
- temp |= (value & 0x0000FFFF);
- GT_REG_WRITE_MIRROR(GALBRG_0_CONFREG,channel,GALBRG_REG_GAP, temp);
-
- return 0;
-}
-
-static int
-galbrg_enable(int channel)
-{
- DECLARE_GLOBAL_DATA_PTR;
- unsigned int temp;
-
- temp = GTREGREAD_MIRROR(GALBRG_0_CONFREG, channel, GALBRG_REG_GAP);
- temp |= 0x00010000;
- GT_REG_WRITE_MIRROR(GALBRG_0_CONFREG, channel, GALBRG_REG_GAP,temp);
-
- return 0;
-}
-
-static int
-galbrg_disable(int channel)
-{
- DECLARE_GLOBAL_DATA_PTR;
- unsigned int temp;
-
- temp = GTREGREAD_MIRROR(GALBRG_0_CONFREG, channel, GALBRG_REG_GAP);
- temp &= 0xFFFEFFFF;
- GT_REG_WRITE_MIRROR(GALBRG_0_CONFREG, channel, GALBRG_REG_GAP,temp);
-
- return 0;
-}
-
-static int
-galbrg_set_clksrc(int channel, int value)
-{
- DECLARE_GLOBAL_DATA_PTR;
- unsigned int temp;
-
- temp = GTREGREAD_MIRROR(GALBRG_0_CONFREG,channel, GALBRG_REG_GAP);
- temp &= 0xFF83FFFF;
- temp |= (value << 18);
- GT_REG_WRITE_MIRROR(GALBRG_0_CONFREG,channel, GALBRG_REG_GAP,temp);
-
- return 0;
-}
-
-static int
-galbrg_set_CUV(int channel, int value)
-{
- GT_REG_WRITE(GALBRG_0_BTREG + (channel * GALBRG_REG_GAP), value);
-
- return 0;
-}
-
-#if 0
-static int
-galbrg_reset(int channel)
-{
- unsigned int temp;
-
- temp = GTREGREAD(GALBRG_0_CONFREG + (channel * GALBRG_REG_GAP));
- temp |= 0x20000;
- GT_REG_WRITE(GALBRG_0_CONFREG + (channel * GALBRG_REG_GAP), temp);
-
- return 0;
-}
-#endif
-
-static int
-galsdma_set_RFT(int channel)
-{
- unsigned int temp;
-
- temp = GTREGREAD(GALSDMA_0_CONF_REG+(channel*GALSDMA_REG_DIFF));
- temp |= 0x00000001;
- GT_REG_WRITE(GALSDMA_0_CONF_REG+(channel*GALSDMA_REG_DIFF), temp);
-
- return 0;
-}
-
-static int
-galsdma_set_SFM(int channel)
-{
- unsigned int temp;
-
- temp = GTREGREAD(GALSDMA_0_CONF_REG+(channel*GALSDMA_REG_DIFF));
- temp |= 0x00000002;
- GT_REG_WRITE(GALSDMA_0_CONF_REG+(channel*GALSDMA_REG_DIFF), temp);
-
- return 0;
-}
-
-static int
-galsdma_set_rxle(int channel)
-{
- unsigned int temp;
-
- temp = GTREGREAD(GALSDMA_0_CONF_REG+(channel*GALSDMA_REG_DIFF));
- temp |= 0x00000040;
- GT_REG_WRITE(GALSDMA_0_CONF_REG+(channel*GALSDMA_REG_DIFF), temp);
-
- return 0;
-}
-
-static int
-galsdma_set_txle(int channel)
-{
- unsigned int temp;
-
- temp = GTREGREAD(GALSDMA_0_CONF_REG+(channel*GALSDMA_REG_DIFF));
- temp |= 0x00000080;
- GT_REG_WRITE(GALSDMA_0_CONF_REG+(channel*GALSDMA_REG_DIFF), temp);
-
- return 0;
-}
-
-static int
-galsdma_set_RC(int channel, unsigned int value)
-{
- unsigned int temp;
-
- temp = GTREGREAD(GALSDMA_0_CONF_REG+(channel*GALSDMA_REG_DIFF));
- temp &= ~0x0000003c;
- temp |= (value << 2);
- GT_REG_WRITE(GALSDMA_0_CONF_REG+(channel*GALSDMA_REG_DIFF), temp);
-
- return 0;
-}
-
-static int
-galsdma_set_burstsize(int channel, unsigned int value)
-{
- unsigned int temp;
-
- temp = GTREGREAD(GALSDMA_0_CONF_REG+(channel*GALSDMA_REG_DIFF));
- temp &= 0xFFFFCFFF;
- switch (value) {
- case 8:
- GT_REG_WRITE(GALSDMA_0_CONF_REG+(channel*GALSDMA_REG_DIFF),
- (temp | (0x3 << 12)));
- break;
-
- case 4:
- GT_REG_WRITE(GALSDMA_0_CONF_REG+(channel*GALSDMA_REG_DIFF),
- (temp | (0x2 << 12)));
- break;
-
- case 2:
- GT_REG_WRITE(GALSDMA_0_CONF_REG+(channel*GALSDMA_REG_DIFF),
- (temp | (0x1 << 12)));
- break;
-
- case 1:
- GT_REG_WRITE(GALSDMA_0_CONF_REG+(channel*GALSDMA_REG_DIFF),
- (temp | (0x0 << 12)));
- break;
-
- default:
- return -1;
- break;
- }
-
- return 0;
-}
-
-static int
-galmpsc_connect(int channel, int connect)
-{
- DECLARE_GLOBAL_DATA_PTR;
- unsigned int temp;
-
- temp = GTREGREAD_MIRROR_G(GALMPSC_ROUTING_REGISTER);
-
- if ((channel == 0) && connect)
- temp &= ~0x00000007;
- else if ((channel == 1) && connect)
- temp &= ~(0x00000007 << 6);
- else if ((channel == 0) && !connect)
- temp |= 0x00000007;
- else
- temp |= (0x00000007 << 6);
-
- /* Just in case... */
- temp &= 0x3fffffff;
-
- GT_REG_WRITE_MIRROR_G(GALMPSC_ROUTING_REGISTER, temp);
-
- return 0;
-}
-
-static int
-galmpsc_route_serial(int channel, int connect)
-{
- unsigned int temp;
-
- temp = GTREGREAD(GALMPSC_SERIAL_MULTIPLEX);
-
- if ((channel == 0) && connect)
- temp |= 0x00000100;
- else if ((channel == 1) && connect)
- temp |= 0x00001000;
- else if ((channel == 0) && !connect)
- temp &= ~0x00000100;
- else
- temp &= ~0x00001000;
-
- GT_REG_WRITE(GALMPSC_SERIAL_MULTIPLEX,temp);
-
- return 0;
-}
-
-static int
-galmpsc_route_rx_clock(int channel, int brg)
-{
- DECLARE_GLOBAL_DATA_PTR;
- unsigned int temp;
-
- temp = GTREGREAD_MIRROR_G(GALMPSC_RxC_ROUTE);
-
- if (channel == 0)
- temp |= brg;
- else
- temp |= (brg << 8);
-
- GT_REG_WRITE_MIRROR_G(GALMPSC_RxC_ROUTE,temp);
-
- return 0;
-}
-
-static int
-galmpsc_route_tx_clock(int channel, int brg)
-{
- DECLARE_GLOBAL_DATA_PTR;
- unsigned int temp;
-
- temp = GTREGREAD_MIRROR_G(GALMPSC_TxC_ROUTE);
-
- if (channel == 0)
- temp |= brg;
- else
- temp |= (brg << 8);
-
- GT_REG_WRITE_MIRROR_G(GALMPSC_TxC_ROUTE,temp);
-
- return 0;
-}
-
-static int
-galmpsc_write_config_regs(int mpsc, int mode)
-{
- if (mode == GALMPSC_UART) {
- /* Main config reg Low (Null modem, Enable Tx/Rx, UART mode) */
- GT_REG_WRITE(GALMPSC_MCONF_LOW + (mpsc*GALMPSC_REG_GAP),
- 0x000004c4);
-
- /* Main config reg High (32x Rx/Tx clock mode, width=8bits */
- GT_REG_WRITE(GALMPSC_MCONF_HIGH +(mpsc*GALMPSC_REG_GAP),
- 0x024003f8);
- /* 22 2222 1111 */
- /* 54 3210 9876 */
- /* 0000 0010 0000 0000 */
- /* 1 */
- /* 098 7654 3210 */
- /* 0000 0011 1111 1000 */
- } else
- return -1;
-
- return 0;
-}
-
-static int
-galmpsc_config_channel_regs(int mpsc)
-{
- DECLARE_GLOBAL_DATA_PTR;
- GT_REG_WRITE_MIRROR(GALMPSC_CHANNELREG_1,mpsc,GALMPSC_REG_GAP, 0);
- GT_REG_WRITE_MIRROR(GALMPSC_CHANNELREG_2,mpsc,GALMPSC_REG_GAP, 0);
- GT_REG_WRITE(GALMPSC_CHANNELREG_3+(mpsc*GALMPSC_REG_GAP), 1);
- GT_REG_WRITE(GALMPSC_CHANNELREG_4+(mpsc*GALMPSC_REG_GAP), 0);
- GT_REG_WRITE(GALMPSC_CHANNELREG_5+(mpsc*GALMPSC_REG_GAP), 0);
- GT_REG_WRITE(GALMPSC_CHANNELREG_6+(mpsc*GALMPSC_REG_GAP), 0);
- GT_REG_WRITE(GALMPSC_CHANNELREG_7+(mpsc*GALMPSC_REG_GAP), 0);
- GT_REG_WRITE(GALMPSC_CHANNELREG_8+(mpsc*GALMPSC_REG_GAP), 0);
- GT_REG_WRITE(GALMPSC_CHANNELREG_9+(mpsc*GALMPSC_REG_GAP), 0);
- GT_REG_WRITE(GALMPSC_CHANNELREG_10+(mpsc*GALMPSC_REG_GAP), 0);
-
- galmpsc_set_brkcnt(mpsc, 0x3);
- galmpsc_set_tcschar(mpsc, 0xab);
-
- return 0;
-}
-
-static int
-galmpsc_set_brkcnt(int mpsc, int value)
-{
- DECLARE_GLOBAL_DATA_PTR;
- unsigned int temp;
-
- temp = GTREGREAD_MIRROR(GALMPSC_CHANNELREG_1,mpsc,GALMPSC_REG_GAP);
- temp &= 0x0000FFFF;
- temp |= (value << 16);
- GT_REG_WRITE_MIRROR(GALMPSC_CHANNELREG_1,mpsc,GALMPSC_REG_GAP, temp);
-
- return 0;
-}
-
-static int
-galmpsc_set_tcschar(int mpsc, int value)
-{
- DECLARE_GLOBAL_DATA_PTR;
- unsigned int temp;
-
- temp = GTREGREAD_MIRROR(GALMPSC_CHANNELREG_1,mpsc,GALMPSC_REG_GAP);
- temp &= 0xFFFF0000;
- temp |= value;
- GT_REG_WRITE_MIRROR(GALMPSC_CHANNELREG_1,mpsc,GALMPSC_REG_GAP, temp);
-
- return 0;
-}
-
-static int
-galmpsc_set_char_length(int mpsc, int value)
-{
- DECLARE_GLOBAL_DATA_PTR;
- unsigned int temp;
-
- temp = GTREGREAD_MIRROR(GALMPSC_PROTOCONF_REG,mpsc,GALMPSC_REG_GAP);
- temp &= 0xFFFFCFFF;
- temp |= (value << 12);
- GT_REG_WRITE_MIRROR(GALMPSC_PROTOCONF_REG,mpsc,GALMPSC_REG_GAP, temp);
-
- return 0;
-}
-
-static int
-galmpsc_set_stop_bit_length(int mpsc, int value)
-{
- DECLARE_GLOBAL_DATA_PTR;
- unsigned int temp;
-
- temp = GTREGREAD_MIRROR(GALMPSC_PROTOCONF_REG,mpsc,GALMPSC_REG_GAP);
- temp |= (value << 14);
- GT_REG_WRITE_MIRROR(GALMPSC_PROTOCONF_REG,mpsc,GALMPSC_REG_GAP,temp);
-
- return 0;
-}
-
-static int
-galmpsc_set_parity(int mpsc, int value)
-{
- DECLARE_GLOBAL_DATA_PTR;
- unsigned int temp;
-
- temp = GTREGREAD_MIRROR(GALMPSC_CHANNELREG_2,mpsc,GALMPSC_REG_GAP);
- if (value != -1) {
- temp &= 0xFFF3FFF3;
- temp |= ((value << 18) | (value << 2));
- temp |= ((value << 17) | (value << 1));
- } else {
- temp &= 0xFFF1FFF1;
- }
-
- GT_REG_WRITE_MIRROR(GALMPSC_CHANNELREG_2,mpsc,GALMPSC_REG_GAP, temp);
-
- return 0;
-}
-
-static int
-galmpsc_enter_hunt(int mpsc)
-{
- DECLARE_GLOBAL_DATA_PTR;
- int temp;
-
- temp = GTREGREAD_MIRROR(GALMPSC_CHANNELREG_2,mpsc,GALMPSC_REG_GAP);
- temp |= 0x80000000;
- GT_REG_WRITE_MIRROR(GALMPSC_CHANNELREG_2,mpsc,GALMPSC_REG_GAP, temp);
-
- /* Should Poll on Enter Hunt bit, but the register is write-only */
- /* errata suggests pausing 100 system cycles */
- udelay(100);
-
- return 0;
-}
-
-
-static int
-galmpsc_shutdown(int mpsc)
-{
- DECLARE_GLOBAL_DATA_PTR;
-#if 0
- unsigned int temp;
-
- /* cause RX abort (clears RX) */
- temp = GTREGREAD_MIRROR(GALMPSC_CHANNELREG_2,mpsc,GALMPSC_REG_GAP);
- temp |= MPSC_RX_ABORT | MPSC_TX_ABORT;
- temp &= ~MPSC_ENTER_HUNT;
- GT_REG_WRITE_MIRROR(GALMPSC_CHANNELREG_2,mpsc,GALMPSC_REG_GAP,temp);
-#endif
-
- GT_REG_WRITE(GALSDMA_0_COM_REG + CHANNEL * GALSDMA_REG_DIFF, 0);
- GT_REG_WRITE(GALSDMA_0_COM_REG + CHANNEL * GALSDMA_REG_DIFF,
- SDMA_TX_ABORT | SDMA_RX_ABORT);
-
- /* shut down the MPSC */
- GT_REG_WRITE(GALMPSC_MCONF_LOW, 0);
- GT_REG_WRITE(GALMPSC_MCONF_HIGH, 0);
- GT_REG_WRITE_MIRROR(GALMPSC_PROTOCONF_REG, mpsc, GALMPSC_REG_GAP,0);
-
- udelay(100);
-
- /* shut down the sdma engines. */
- /* reset config to default */
- GT_REG_WRITE(GALSDMA_0_CONF_REG + CHANNEL * GALSDMA_REG_DIFF,
- 0x000000fc);
-
- udelay(100);
-
- /* clear the SDMA current and first TX and RX pointers */
- GT_REG_WRITE(GALSDMA_0_CUR_RX_PTR + CHANNEL * GALSDMA_REG_DIFF, 0);
- GT_REG_WRITE(GALSDMA_0_CUR_TX_PTR + CHANNEL * GALSDMA_REG_DIFF, 0);
- GT_REG_WRITE(GALSDMA_0_FIR_TX_PTR + CHANNEL * GALSDMA_REG_DIFF, 0);
-
- udelay(100);
-
- return 0;
-}
-
-static void
-galsdma_enable_rx(void)
-{
- int temp;
-
- /* Enable RX processing */
- temp = GTREGREAD(GALSDMA_0_COM_REG+(CHANNEL*GALSDMA_REG_DIFF));
- temp |= RX_ENABLE;
- GT_REG_WRITE(GALSDMA_0_COM_REG+(CHANNEL*GALSDMA_REG_DIFF), temp);
-
- galmpsc_enter_hunt(CHANNEL);
-}
-
-static int
-galmpsc_set_snoop(int mpsc, int value)
-{
- int reg = mpsc ? MPSC_1_ADDRESS_CONTROL_LOW : MPSC_0_ADDRESS_CONTROL_LOW;
- int temp=GTREGREAD(reg);
- if(value)
- temp |= (1<< 6) | (1<<14) | (1<<22) | (1<<30);
- else
- temp &= ~((1<< 6) | (1<<14) | (1<<22) | (1<<30));
- GT_REG_WRITE(reg, temp);
- return 0;
-}
diff --git a/board/evb64260/mpsc.h b/board/evb64260/mpsc.h
deleted file mode 100644
index 54b642a83d..0000000000
--- a/board/evb64260/mpsc.h
+++ /dev/null
@@ -1,142 +0,0 @@
-/*
- * (C) Copyright 2001
- * John Clemens <clemens@mclx.com>, Mission Critical Linux, Inc.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * mpsc.h - header file for MPSC in uart mode (console driver)
- */
-
-#ifndef __MPSC_H__
-#define __MPSC_H__
-
-/* include actual Galileo defines */
-#include <galileo/gt64260R.h>
-
-/* driver related defines */
-
-int mpsc_init(int baud);
-void mpsc_init2(void);
-char mpsc_getchar(void);
-int mpsc_test_char(void);
-int galbrg_set_baudrate(int channel, int rate);
-
-int mpsc_putchar_early(char ch);
-extern int (*mpsc_putchar)(char ch);
-
-#define CHANNEL CONFIG_MPSC_PORT
-
-#define TX_DESC 5
-#define RX_DESC 20
-
-#define DESC_FIRST 0x00010000
-#define DESC_LAST 0x00020000
-#define DESC_OWNER 0x80000000
-
-#define TX_DEMAND 0x00800000
-#define TX_STOP 0x00010000
-#define RX_ENABLE 0x00000080
-
-#define SDMA_RX_ABORT (1 << 15)
-#define SDMA_TX_ABORT (1 << 31)
-#define MPSC_TX_ABORT (1 << 7)
-#define MPSC_RX_ABORT (1 << 23)
-#define MPSC_ENTER_HUNT (1 << 31)
-
-/* MPSC defines */
-
-#define GALMPSC_CONNECT 0x1
-#define GALMPSC_DISCONNECT 0x0
-
-#define GALMPSC_UART 0x1
-
-#define GALMPSC_STOP_BITS_1 0x0
-#define GALMPSC_STOP_BITS_2 0x1
-#define GALMPSC_CHAR_LENGTH_8 0x3
-#define GALMPSC_CHAR_LENGTH_7 0x2
-
-#define GALMPSC_PARITY_ODD 0x0
-#define GALMPSC_PARITY_EVEN 0x2
-#define GALMPSC_PARITY_MARK 0x3
-#define GALMPSC_PARITY_SPACE 0x1
-#define GALMPSC_PARITY_NONE -1
-
-#define GALMPSC_SERIAL_MULTIPLEX SERIAL_PORT_MULTIPLEX /* 0xf010 */
-#define GALMPSC_ROUTING_REGISTER MAIN_ROUTING_REGISTER /* 0xb400 */
-#define GALMPSC_RxC_ROUTE RECEIVE_CLOCK_ROUTING_REGISTER /* 0xb404 */
-#define GALMPSC_TxC_ROUTE TRANSMIT_CLOCK_ROUTING_REGISTER /* 0xb408 */
-#define GALMPSC_MCONF_LOW MPSC0_MAIN_CONFIGURATION_LOW /* 0x8000 */
-#define GALMPSC_MCONF_HIGH MPSC0_MAIN_CONFIGURATION_HIGH /* 0x8004 */
-#define GALMPSC_PROTOCONF_REG MPSC0_PROTOCOL_CONFIGURATION /* 0x8008 */
-
-#define GALMPSC_REG_GAP 0x1000
-
-#define GALMPSC_MCONF_CHREG_BASE CHANNEL0_REGISTER1 /* 0x800c */
-#define GALMPSC_CHANNELREG_1 CHANNEL0_REGISTER1 /* 0x800c */
-#define GALMPSC_CHANNELREG_2 CHANNEL0_REGISTER2 /* 0x8010 */
-#define GALMPSC_CHANNELREG_3 CHANNEL0_REGISTER3 /* 0x8014 */
-#define GALMPSC_CHANNELREG_4 CHANNEL0_REGISTER4 /* 0x8018 */
-#define GALMPSC_CHANNELREG_5 CHANNEL0_REGISTER5 /* 0x801c */
-#define GALMPSC_CHANNELREG_6 CHANNEL0_REGISTER6 /* 0x8020 */
-#define GALMPSC_CHANNELREG_7 CHANNEL0_REGISTER7 /* 0x8024 */
-#define GALMPSC_CHANNELREG_8 CHANNEL0_REGISTER8 /* 0x8028 */
-#define GALMPSC_CHANNELREG_9 CHANNEL0_REGISTER9 /* 0x802c */
-#define GALMPSC_CHANNELREG_10 CHANNEL0_REGISTER10 /* 0x8030 */
-#define GALMPSC_CHANNELREG_11 CHANNEL0_REGISTER11 /* 0x8034 */
-
-#define GALSDMA_COMMAND_FIRST (1 << 16)
-#define GALSDMA_COMMAND_LAST (1 << 17)
-#define GALSDMA_COMMAND_ENABLEINT (1 << 23)
-#define GALSDMA_COMMAND_AUTO (1 << 30)
-#define GALSDMA_COMMAND_OWNER (1 << 31)
-
-#define GALSDMA_RX 0
-#define GALSDMA_TX 1
-
-/* CHANNEL2 should be CHANNEL1, according to documentation,
- * but to work with the current GTREGS file...
- */
-#define GALSDMA_0_CONF_REG CHANNEL0_CONFIGURATION_REGISTER /* 0x4000 */
-#define GALSDMA_1_CONF_REG CHANNEL2_CONFIGURATION_REGISTER /* 0x6000 */
-#define GALSDMA_0_COM_REG CHANNEL0_COMMAND_REGISTER /* 0x4008 */
-#define GALSDMA_1_COM_REG CHANNEL2_COMMAND_REGISTER /* 0x6008 */
-#define GALSDMA_0_CUR_RX_PTR CHANNEL0_CURRENT_RX_DESCRIPTOR_POINTER /* 0x4810 */
-#define GALSDMA_0_CUR_TX_PTR CHANNEL0_CURRENT_TX_DESCRIPTOR_POINTER /* 0x4c10 */
-#define GALSDMA_0_FIR_TX_PTR CHANNEL0_FIRST_TX_DESCRIPTOR_POINTER /* 0x4c14 */
-#define GALSDMA_1_CUR_RX_PTR CHANNEL2_CURRENT_RX_DESCRIPTOR_POINTER /* 0x6810 */
-#define GALSDMA_1_CUR_TX_PTR CHANNEL2_CURRENT_TX_DESCRIPTOR_POINTER /* 0x6c10 */
-#define GALSDMA_1_FIR_TX_PTR CHANNEL2_FIRST_TX_DESCRIPTOR_POINTER /* 0x6c14 */
-#define GALSDMA_REG_DIFF 0x2000
-
-/* WRONG in gt64260R.h */
-#define GALSDMA_INT_CAUSE 0xb800 /* SDMA_CAUSE */
-#define GALSDMA_INT_MASK 0xb880 /* SDMA_MASK */
-
-#define GALSDMA_MODE_UART 0
-#define GALSDMA_MODE_BISYNC 1
-#define GALSDMA_MODE_HDLC 2
-#define GALSDMA_MODE_TRANSPARENT 3
-
-#define GALBRG_0_CONFREG BRG0_CONFIGURATION_REGISTER /* 0xb200 */
-#define GALBRG_REG_GAP 0x0008
-#define GALBRG_0_BTREG BRG0_BAUDE_TUNING_REGISTER /* 0xb204 */
-
-#endif /* __MPSC_H__ */
diff --git a/board/evb64260/pci.c b/board/evb64260/pci.c
deleted file mode 100644
index 59b9acb2f7..0000000000
--- a/board/evb64260/pci.c
+++ /dev/null
@@ -1,760 +0,0 @@
-/* PCI.c - PCI functions */
-
-/* Copyright - Galileo technology. */
-
-#include <common.h>
-#include <pci.h>
-
-#include <galileo/pci.h>
-
-static const unsigned char pci_irq_swizzle[2][PCI_MAX_DEVICES] = {
-#ifdef CONFIG_ZUMA_V2
- {0, 0, 0, 0, 0, 0, 0, 29,[8 ... PCI_MAX_DEVICES - 1] = 0},
- {0, 0, 0, 0, 0, 0, 0, 28,[8 ... PCI_MAX_DEVICES - 1] = 0}
-#else /* EVB??? This is a guess */
- {0, 0, 0, 0, 0, 0, 0, 27, 27,[9 ... PCI_MAX_DEVICES - 1] = 0},
- {0, 0, 0, 0, 0, 0, 0, 29, 29,[9 ... PCI_MAX_DEVICES - 1] = 0}
-#endif
-};
-
-static const unsigned int pci_p2p_configuration_reg[] = {
- PCI_0P2P_CONFIGURATION, PCI_1P2P_CONFIGURATION
-};
-
-static const unsigned int pci_configuration_address[] = {
- PCI_0CONFIGURATION_ADDRESS, PCI_1CONFIGURATION_ADDRESS
-};
-
-static const unsigned int pci_configuration_data[] = {
- PCI_0CONFIGURATION_DATA_VIRTUAL_REGISTER,
- PCI_1CONFIGURATION_DATA_VIRTUAL_REGISTER
-};
-
-static const unsigned int pci_error_cause_reg[] = {
- PCI_0ERROR_CAUSE, PCI_1ERROR_CAUSE
-};
-
-static const unsigned int pci_arbiter_control[] = {
- PCI_0ARBITER_CONTROL, PCI_1ARBITER_CONTROL
-};
-
-static const unsigned int pci_snoop_control_base_0_low[] = {
- PCI_0SNOOP_CONTROL_BASE_0_LOW, PCI_1SNOOP_CONTROL_BASE_0_LOW
-};
-static const unsigned int pci_snoop_control_top_0[] = {
- PCI_0SNOOP_CONTROL_TOP_0, PCI_1SNOOP_CONTROL_TOP_0
-};
-
-static const unsigned int pci_access_control_base_0_low[] = {
- PCI_0ACCESS_CONTROL_BASE_0_LOW, PCI_1ACCESS_CONTROL_BASE_0_LOW
-};
-static const unsigned int pci_access_control_top_0[] = {
- PCI_0ACCESS_CONTROL_TOP_0, PCI_1ACCESS_CONTROL_TOP_0
-};
-
-static const unsigned int pci_scs_bank_size[2][4] = {
- {PCI_0SCS_0_BANK_SIZE, PCI_0SCS_1_BANK_SIZE,
- PCI_0SCS_2_BANK_SIZE, PCI_0SCS_3_BANK_SIZE},
- {PCI_1SCS_0_BANK_SIZE, PCI_1SCS_1_BANK_SIZE,
- PCI_1SCS_2_BANK_SIZE, PCI_1SCS_3_BANK_SIZE}
-};
-
-static const unsigned int pci_p2p_configuration[] = {
- PCI_0P2P_CONFIGURATION, PCI_1P2P_CONFIGURATION
-};
-
-static unsigned int local_buses[] = { 0, 0 };
-
-/********************************************************************
-* pciWriteConfigReg - Write to a PCI configuration register
-* - Make sure the GT is configured as a master before writing
-* to another device on the PCI.
-* - The function takes care of Big/Little endian conversion.
-*
-*
-* Inputs: unsigned int regOffset: The register offset as it apears in the GT spec
-* (or any other PCI device spec)
-* pciDevNum: The device number needs to be addressed.
-*
-* Configuration Address 0xCF8:
-*
-* 31 30 24 23 16 15 11 10 8 7 2 0 <=bit Number
-* |congif|Reserved| Bus |Device|Function|Register|00|
-* |Enable| |Number|Number| Number | Number | | <=field Name
-*
-*********************************************************************/
-void pciWriteConfigReg (PCI_HOST host, unsigned int regOffset,
- unsigned int pciDevNum, unsigned int data)
-{
- volatile unsigned int DataForAddrReg;
- unsigned int functionNum;
- unsigned int busNum = PCI_BUS (pciDevNum);
- unsigned int addr;
-
- if (pciDevNum > 32) /* illegal device Number */
- return;
- if (pciDevNum == SELF) { /* configure our configuration space. */
- pciDevNum =
- (GTREGREAD (pci_p2p_configuration_reg[host]) >> 24) &
- 0x1f;
- busNum = GTREGREAD (pci_p2p_configuration_reg[host]) &
- 0xff0000;
- }
- functionNum = regOffset & 0x00000700;
- pciDevNum = pciDevNum << 11;
- regOffset = regOffset & 0xfc;
- DataForAddrReg =
- (regOffset | pciDevNum | functionNum | busNum) | BIT31;
- GT_REG_WRITE (pci_configuration_address[host], DataForAddrReg);
- GT_REG_READ (pci_configuration_address[host], &addr);
- if (addr != DataForAddrReg)
- return;
- GT_REG_WRITE (pci_configuration_data[host], data);
-}
-
-/********************************************************************
-* pciReadConfigReg - Read from a PCI0 configuration register
-* - Make sure the GT is configured as a master before reading
-* from another device on the PCI.
-* - The function takes care of Big/Little endian conversion.
-* INPUTS: regOffset: The register offset as it apears in the GT spec (or PCI
-* spec)
-* pciDevNum: The device number needs to be addressed.
-* RETURNS: data , if the data == 0xffffffff check the master abort bit in the
-* cause register to make sure the data is valid
-*
-* Configuration Address 0xCF8:
-*
-* 31 30 24 23 16 15 11 10 8 7 2 0 <=bit Number
-* |congif|Reserved| Bus |Device|Function|Register|00|
-* |Enable| |Number|Number| Number | Number | | <=field Name
-*
-*********************************************************************/
-unsigned int pciReadConfigReg (PCI_HOST host, unsigned int regOffset,
- unsigned int pciDevNum)
-{
- volatile unsigned int DataForAddrReg;
- unsigned int data;
- unsigned int functionNum;
- unsigned int busNum = PCI_BUS (pciDevNum);
-
- if (pciDevNum > 32) /* illegal device Number */
- return 0xffffffff;
- if (pciDevNum == SELF) { /* configure our configuration space. */
- pciDevNum =
- (GTREGREAD (pci_p2p_configuration_reg[host]) >> 24) &
- 0x1f;
- busNum = GTREGREAD (pci_p2p_configuration_reg[host]) &
- 0xff0000;
- }
- functionNum = regOffset & 0x00000700;
- pciDevNum = pciDevNum << 11;
- regOffset = regOffset & 0xfc;
- DataForAddrReg =
- (regOffset | pciDevNum | functionNum | busNum) | BIT31;
- GT_REG_WRITE (pci_configuration_address[host], DataForAddrReg);
- GT_REG_READ (pci_configuration_address[host], &data);
- if (data != DataForAddrReg)
- return 0xffffffff;
- GT_REG_READ (pci_configuration_data[host], &data);
- return data;
-}
-
-/********************************************************************
-* pciOverBridgeWriteConfigReg - Write to a PCI configuration register where
-* the agent is placed on another Bus. For more
-* information read P2P in the PCI spec.
-*
-* Inputs: unsigned int regOffset - The register offset as it apears in the
-* GT spec (or any other PCI device spec).
-* unsigned int pciDevNum - The device number needs to be addressed.
-* unsigned int busNum - On which bus does the Target agent connect
-* to.
-* unsigned int data - data to be written.
-*
-* Configuration Address 0xCF8:
-*
-* 31 30 24 23 16 15 11 10 8 7 2 0 <=bit Number
-* |congif|Reserved| Bus |Device|Function|Register|01|
-* |Enable| |Number|Number| Number | Number | | <=field Name
-*
-* The configuration Address is configure as type-I (bits[1:0] = '01') due to
-* PCI spec referring to P2P.
-*
-*********************************************************************/
-void pciOverBridgeWriteConfigReg (PCI_HOST host,
- unsigned int regOffset,
- unsigned int pciDevNum,
- unsigned int busNum, unsigned int data)
-{
- unsigned int DataForReg;
- unsigned int functionNum;
-
- functionNum = regOffset & 0x00000700;
- pciDevNum = pciDevNum << 11;
- regOffset = regOffset & 0xff;
- busNum = busNum << 16;
- if (pciDevNum == SELF) { /* This board */
- DataForReg = (regOffset | pciDevNum | functionNum) | BIT0;
- } else {
- DataForReg = (regOffset | pciDevNum | functionNum | busNum) |
- BIT31 | BIT0;
- }
- GT_REG_WRITE (pci_configuration_address[host], DataForReg);
- if (pciDevNum == SELF) { /* This board */
- GT_REG_WRITE (pci_configuration_data[host], data);
- } else { /* configuration Transaction over the pci. */
-
- /* The PCI is working in LE Mode So it swap the Data. */
- GT_REG_WRITE (pci_configuration_data[host], WORD_SWAP (data));
- }
-}
-
-
-/********************************************************************
-* pciOverBridgeReadConfigReg - Read from a PCIn configuration register where
-* the agent target locate on another PCI bus.
-* - Make sure the GT is configured as a master
-* before reading from another device on the PCI.
-* - The function takes care of Big/Little endian
-* conversion.
-* INPUTS: regOffset: The register offset as it apears in the GT spec (or PCI
-* spec). (configuration register offset.)
-* pciDevNum: The device number needs to be addressed.
-* busNum: the Bus number where the agent is place.
-* RETURNS: data , if the data == 0xffffffff check the master abort bit in the
-* cause register to make sure the data is valid
-*
-* Configuration Address 0xCF8:
-*
-* 31 30 24 23 16 15 11 10 8 7 2 0 <=bit Number
-* |congif|Reserved| Bus |Device|Function|Register|01|
-* |Enable| |Number|Number| Number | Number | | <=field Name
-*
-*********************************************************************/
-unsigned int pciOverBridgeReadConfigReg (PCI_HOST host,
- unsigned int regOffset,
- unsigned int pciDevNum,
- unsigned int busNum)
-{
- unsigned int DataForReg;
- unsigned int data;
- unsigned int functionNum;
-
- functionNum = regOffset & 0x00000700;
- pciDevNum = pciDevNum << 11;
- regOffset = regOffset & 0xff;
- busNum = busNum << 16;
- if (pciDevNum == SELF) { /* This board */
- DataForReg = (regOffset | pciDevNum | functionNum) | BIT31;
- } else { /* agent on another bus */
-
- DataForReg = (regOffset | pciDevNum | functionNum | busNum) |
- BIT0 | BIT31;
- }
- GT_REG_WRITE (pci_configuration_address[host], DataForReg);
- if (pciDevNum == SELF) { /* This board */
- GT_REG_READ (pci_configuration_data[host], &data);
- return data;
- } else { /* The PCI is working in LE Mode So it swap the Data. */
-
- GT_REG_READ (pci_configuration_data[host], &data);
- return WORD_SWAP (data);
- }
-}
-
-/********************************************************************
-* pciGetRegOffset - Gets the register offset for this region config.
-*
-* INPUT: Bus, Region - The bus and region we ask for its base address.
-* OUTPUT: N/A
-* RETURNS: PCI register base address
-*********************************************************************/
-static unsigned int pciGetRegOffset (PCI_HOST host, PCI_REGION region)
-{
- switch (host) {
- case PCI_HOST0:
- switch (region) {
- case PCI_IO:
- return PCI_0I_O_LOW_DECODE_ADDRESS;
- case PCI_REGION0:
- return PCI_0MEMORY0_LOW_DECODE_ADDRESS;
- case PCI_REGION1:
- return PCI_0MEMORY1_LOW_DECODE_ADDRESS;
- case PCI_REGION2:
- return PCI_0MEMORY2_LOW_DECODE_ADDRESS;
- case PCI_REGION3:
- return PCI_0MEMORY3_LOW_DECODE_ADDRESS;
- }
- case PCI_HOST1:
- switch (region) {
- case PCI_IO:
- return PCI_1I_O_LOW_DECODE_ADDRESS;
- case PCI_REGION0:
- return PCI_1MEMORY0_LOW_DECODE_ADDRESS;
- case PCI_REGION1:
- return PCI_1MEMORY1_LOW_DECODE_ADDRESS;
- case PCI_REGION2:
- return PCI_1MEMORY2_LOW_DECODE_ADDRESS;
- case PCI_REGION3:
- return PCI_1MEMORY3_LOW_DECODE_ADDRESS;
- }
- }
- return PCI_0MEMORY0_LOW_DECODE_ADDRESS;
-}
-
-static unsigned int pciGetRemapOffset (PCI_HOST host, PCI_REGION region)
-{
- switch (host) {
- case PCI_HOST0:
- switch (region) {
- case PCI_IO:
- return PCI_0I_O_ADDRESS_REMAP;
- case PCI_REGION0:
- return PCI_0MEMORY0_ADDRESS_REMAP;
- case PCI_REGION1:
- return PCI_0MEMORY1_ADDRESS_REMAP;
- case PCI_REGION2:
- return PCI_0MEMORY2_ADDRESS_REMAP;
- case PCI_REGION3:
- return PCI_0MEMORY3_ADDRESS_REMAP;
- }
- case PCI_HOST1:
- switch (region) {
- case PCI_IO:
- return PCI_1I_O_ADDRESS_REMAP;
- case PCI_REGION0:
- return PCI_1MEMORY0_ADDRESS_REMAP;
- case PCI_REGION1:
- return PCI_1MEMORY1_ADDRESS_REMAP;
- case PCI_REGION2:
- return PCI_1MEMORY2_ADDRESS_REMAP;
- case PCI_REGION3:
- return PCI_1MEMORY3_ADDRESS_REMAP;
- }
- }
- return PCI_0MEMORY0_ADDRESS_REMAP;
-}
-
-bool pciMapSpace (PCI_HOST host, PCI_REGION region, unsigned int remapBase,
- unsigned int bankBase, unsigned int bankLength)
-{
- unsigned int low = 0xfff;
- unsigned int high = 0x0;
- unsigned int regOffset = pciGetRegOffset (host, region);
- unsigned int remapOffset = pciGetRemapOffset (host, region);
-
- if (bankLength != 0) {
- low = (bankBase >> 20) & 0xfff;
- high = ((bankBase + bankLength) >> 20) - 1;
- }
-
- GT_REG_WRITE (regOffset, low | (1 << 24)); /* no swapping */
- GT_REG_WRITE (regOffset + 8, high);
-
- if (bankLength != 0) { /* must do AFTER writing maps */
- GT_REG_WRITE (remapOffset, remapBase >> 20); /* sorry, 32 bits only.
- dont support upper 32
- in this driver */
- }
- return true;
-}
-
-unsigned int pciGetSpaceBase (PCI_HOST host, PCI_REGION region)
-{
- unsigned int low;
- unsigned int regOffset = pciGetRegOffset (host, region);
-
- GT_REG_READ (regOffset, &low);
- return (low & 0xfff) << 20;
-}
-
-unsigned int pciGetSpaceSize (PCI_HOST host, PCI_REGION region)
-{
- unsigned int low, high;
- unsigned int regOffset = pciGetRegOffset (host, region);
-
- GT_REG_READ (regOffset, &low);
- GT_REG_READ (regOffset + 8, &high);
- high &= 0xfff;
- low &= 0xfff;
- if (high <= low)
- return 0;
- return (high + 1 - low) << 20;
-}
-
-/********************************************************************
-* pciMapMemoryBank - Maps PCI_host memory bank "bank" for the slave.
-*
-* Inputs: base and size of PCI SCS
-*********************************************************************/
-void pciMapMemoryBank (PCI_HOST host, MEMORY_BANK bank,
- unsigned int pciDramBase, unsigned int pciDramSize)
-{
- pciDramBase = pciDramBase & 0xfffff000;
- pciDramBase = pciDramBase | (pciReadConfigReg (host,
- PCI_SCS_0_BASE_ADDRESS
- + 4 * bank,
- SELF) & 0x00000fff);
- pciWriteConfigReg (host, PCI_SCS_0_BASE_ADDRESS + 4 * bank, SELF,
- pciDramBase);
- if (pciDramSize == 0)
- pciDramSize++;
- GT_REG_WRITE (pci_scs_bank_size[host][bank], pciDramSize - 1);
-}
-
-
-/********************************************************************
-* pciSetRegionFeatures - This function modifys one of the 8 regions with
-* feature bits given as an input.
-* - Be advised to check the spec before modifying them.
-* Inputs: PCI_PROTECT_REGION region - one of the eight regions.
-* unsigned int features - See file: pci.h there are defintion for those
-* region features.
-* unsigned int baseAddress - The region base Address.
-* unsigned int topAddress - The region top Address.
-* Returns: false if one of the parameters is erroneous true otherwise.
-*********************************************************************/
-bool pciSetRegionFeatures (PCI_HOST host, PCI_ACCESS_REGIONS region,
- unsigned int features, unsigned int baseAddress,
- unsigned int regionLength)
-{
- unsigned int accessLow;
- unsigned int accessHigh;
- unsigned int accessTop = baseAddress + regionLength;
-
- if (regionLength == 0) { /* close the region. */
- pciDisableAccessRegion (host, region);
- return true;
- }
- /* base Address is store is bits [11:0] */
- accessLow = (baseAddress & 0xfff00000) >> 20;
- /* All the features are update according to the defines in pci.h (to be on
- the safe side we disable bits: [11:0] */
- accessLow = accessLow | (features & 0xfffff000);
- /* write to the Low Access Region register */
- GT_REG_WRITE (pci_access_control_base_0_low[host] + 0x10 * region,
- accessLow);
-
- accessHigh = (accessTop & 0xfff00000) >> 20;
-
- /* write to the High Access Region register */
- GT_REG_WRITE (pci_access_control_top_0[host] + 0x10 * region,
- accessHigh - 1);
- return true;
-}
-
-/********************************************************************
-* pciDisableAccessRegion - Disable The given Region by writing MAX size
-* to its low Address and MIN size to its high Address.
-*
-* Inputs: PCI_ACCESS_REGIONS region - The region we to be Disabled.
-* Returns: N/A.
-*********************************************************************/
-void pciDisableAccessRegion (PCI_HOST host, PCI_ACCESS_REGIONS region)
-{
- /* writing back the registers default values. */
- GT_REG_WRITE (pci_access_control_base_0_low[host] + 0x10 * region,
- 0x01001fff);
- GT_REG_WRITE (pci_access_control_top_0[host] + 0x10 * region, 0);
-}
-
-/********************************************************************
-* pciArbiterEnable - Enables PCI-0`s Arbitration mechanism.
-*
-* Inputs: N/A
-* Returns: true.
-*********************************************************************/
-bool pciArbiterEnable (PCI_HOST host)
-{
- unsigned int regData;
-
- GT_REG_READ (pci_arbiter_control[host], &regData);
- GT_REG_WRITE (pci_arbiter_control[host], regData | BIT31);
- return true;
-}
-
-/********************************************************************
-* pciArbiterDisable - Disable PCI-0`s Arbitration mechanism.
-*
-* Inputs: N/A
-* Returns: true
-*********************************************************************/
-bool pciArbiterDisable (PCI_HOST host)
-{
- unsigned int regData;
-
- GT_REG_READ (pci_arbiter_control[host], &regData);
- GT_REG_WRITE (pci_arbiter_control[host], regData & 0x7fffffff);
- return true;
-}
-
-/********************************************************************
-* pciParkingDisable - Park on last option disable, with this function you can
-* disable the park on last mechanism for each agent.
-* disabling this option for all agents results parking
-* on the internal master.
-*
-* Inputs: PCI_AGENT_PARK internalAgent - parking Disable for internal agent.
-* PCI_AGENT_PARK externalAgent0 - parking Disable for external#0 agent.
-* PCI_AGENT_PARK externalAgent1 - parking Disable for external#1 agent.
-* PCI_AGENT_PARK externalAgent2 - parking Disable for external#2 agent.
-* PCI_AGENT_PARK externalAgent3 - parking Disable for external#3 agent.
-* PCI_AGENT_PARK externalAgent4 - parking Disable for external#4 agent.
-* PCI_AGENT_PARK externalAgent5 - parking Disable for external#5 agent.
-* Returns: true
-*********************************************************************/
-bool pciParkingDisable (PCI_HOST host, PCI_AGENT_PARK internalAgent,
- PCI_AGENT_PARK externalAgent0,
- PCI_AGENT_PARK externalAgent1,
- PCI_AGENT_PARK externalAgent2,
- PCI_AGENT_PARK externalAgent3,
- PCI_AGENT_PARK externalAgent4,
- PCI_AGENT_PARK externalAgent5)
-{
- unsigned int regData;
- unsigned int writeData;
-
- GT_REG_READ (pci_arbiter_control[host], &regData);
- writeData = (internalAgent << 14) + (externalAgent0 << 15) +
- (externalAgent1 << 16) + (externalAgent2 << 17) +
- (externalAgent3 << 18) + (externalAgent4 << 19) +
- (externalAgent5 << 20);
- regData = (regData & ~(0x7f << 14)) | writeData;
- GT_REG_WRITE (pci_arbiter_control[host], regData);
- return true;
-}
-
-/********************************************************************
-* pciSetRegionSnoopMode - This function modifys one of the 4 regions which
-* supports Cache Coherency in the PCI_n interface.
-* Inputs: region - One of the four regions.
-* snoopType - There is four optional Types:
-* 1. No Snoop.
-* 2. Snoop to WT region.
-* 3. Snoop to WB region.
-* 4. Snoop & Invalidate to WB region.
-* baseAddress - Base Address of this region.
-* regionLength - Region length.
-* Returns: false if one of the parameters is wrong otherwise return true.
-*********************************************************************/
-bool pciSetRegionSnoopMode (PCI_HOST host, PCI_SNOOP_REGION region,
- PCI_SNOOP_TYPE snoopType,
- unsigned int baseAddress,
- unsigned int regionLength)
-{
- unsigned int snoopXbaseAddress;
- unsigned int snoopXtopAddress;
- unsigned int data;
- unsigned int snoopHigh = baseAddress + regionLength;
-
- if ((region > PCI_SNOOP_REGION3) || (snoopType > PCI_SNOOP_WB))
- return false;
- snoopXbaseAddress =
- pci_snoop_control_base_0_low[host] + 0x10 * region;
- snoopXtopAddress = pci_snoop_control_top_0[host] + 0x10 * region;
- if (regionLength == 0) { /* closing the region */
- GT_REG_WRITE (snoopXbaseAddress, 0x0000ffff);
- GT_REG_WRITE (snoopXtopAddress, 0);
- return true;
- }
- baseAddress = baseAddress & 0xfff00000; /* Granularity of 1MByte */
- data = (baseAddress >> 20) | snoopType << 12;
- GT_REG_WRITE (snoopXbaseAddress, data);
- snoopHigh = (snoopHigh & 0xfff00000) >> 20;
- GT_REG_WRITE (snoopXtopAddress, snoopHigh - 1);
- return true;
-}
-
-/*
- *
- */
-
-static int gt_read_config_dword (struct pci_controller *hose,
- pci_dev_t dev, int offset, u32 * value)
-{
- int bus = PCI_BUS (dev);
-
- if ((bus == local_buses[0]) || (bus == local_buses[1])) {
- *value = pciReadConfigReg ((PCI_HOST) hose->cfg_addr, offset,
- PCI_DEV (dev));
- } else {
- *value = pciOverBridgeReadConfigReg ((PCI_HOST) hose->
- cfg_addr, offset,
- PCI_DEV (dev), bus);
- }
- return 0;
-}
-
-static int gt_write_config_dword (struct pci_controller *hose,
- pci_dev_t dev, int offset, u32 value)
-{
- int bus = PCI_BUS (dev);
-
- if ((bus == local_buses[0]) || (bus == local_buses[1])) {
- pciWriteConfigReg ((PCI_HOST) hose->cfg_addr, offset,
- PCI_DEV (dev), value);
- } else {
- pciOverBridgeWriteConfigReg ((PCI_HOST) hose->cfg_addr,
- offset, PCI_DEV (dev), value,
- bus);
- }
- return 0;
-}
-
-/*
- *
- */
-
-static void gt_setup_ide (struct pci_controller *hose,
- pci_dev_t dev, struct pci_config_table *entry)
-{
- static const int ide_bar[] = { 8, 4, 8, 4, 0, 0 };
- u32 bar_response, bar_value;
- int bar;
-
- for (bar = 0; bar < 6; bar++) {
- pci_write_config_dword (dev, PCI_BASE_ADDRESS_0 + bar * 4,
- 0x0);
- pci_read_config_dword (dev, PCI_BASE_ADDRESS_0 + bar * 4,
- &bar_response);
-
- pciauto_region_allocate (bar_response &
- PCI_BASE_ADDRESS_SPACE_IO ? hose->
- pci_io : hose->pci_mem, ide_bar[bar],
- &bar_value);
-
- pci_write_config_dword (dev, PCI_BASE_ADDRESS_0 + bar * 4,
- bar_value);
- }
-}
-
-#ifndef CONFIG_P3G4
-static void gt_fixup_irq (struct pci_controller *hose, pci_dev_t dev)
-{
- unsigned char pin, irq;
-
- pci_read_config_byte (dev, PCI_INTERRUPT_PIN, &pin);
-
- if (pin == 1) { /* only allow INT A */
- irq = pci_irq_swizzle[(PCI_HOST) hose->
- cfg_addr][PCI_DEV (dev)];
- if (irq)
- pci_write_config_byte (dev, PCI_INTERRUPT_LINE, irq);
- }
-}
-#endif
-
-struct pci_config_table gt_config_table[] = {
- {PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_STORAGE_IDE,
- PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, gt_setup_ide},
-
- {}
-};
-
-struct pci_controller pci0_hose = {
-#ifndef CONFIG_P3G4
- fixup_irq:gt_fixup_irq,
-#endif
- config_table:gt_config_table,
-};
-
-struct pci_controller pci1_hose = {
-#ifndef CONFIG_P3G4
- fixup_irq:gt_fixup_irq,
-#endif
- config_table:gt_config_table,
-};
-
-void pci_init_board (void)
-{
- unsigned int command;
-
- pci0_hose.first_busno = 0;
- pci0_hose.last_busno = 0xff;
- local_buses[0] = pci0_hose.first_busno;
- /* PCI memory space */
- pci_set_region (pci0_hose.regions + 0,
- CFG_PCI0_0_MEM_SPACE,
- CFG_PCI0_0_MEM_SPACE,
- CFG_PCI0_MEM_SIZE, PCI_REGION_MEM);
-
- /* PCI I/O space */
- pci_set_region (pci0_hose.regions + 1,
- CFG_PCI0_IO_SPACE_PCI,
- CFG_PCI0_IO_SPACE, CFG_PCI0_IO_SIZE, PCI_REGION_IO);
-
- pci_set_ops (&pci0_hose,
- pci_hose_read_config_byte_via_dword,
- pci_hose_read_config_word_via_dword,
- gt_read_config_dword,
- pci_hose_write_config_byte_via_dword,
- pci_hose_write_config_word_via_dword,
- gt_write_config_dword);
-
- pci0_hose.region_count = 2;
-
- pci0_hose.cfg_addr = (unsigned int *) PCI_HOST0;
-
- pci_register_hose (&pci0_hose);
-
-#ifndef CONFIG_P3G4
- pciArbiterEnable (PCI_HOST0);
- pciParkingDisable (PCI_HOST0, 1, 1, 1, 1, 1, 1, 1);
-#endif
-
- command = pciReadConfigReg (PCI_HOST0, PCI_COMMAND, SELF);
- command |= PCI_COMMAND_MASTER;
- pciWriteConfigReg (PCI_HOST0, PCI_COMMAND, SELF, command);
-
- pci0_hose.last_busno = pci_hose_scan (&pci0_hose);
-
- command = pciReadConfigReg (PCI_HOST0, PCI_COMMAND, SELF);
- command |= PCI_COMMAND_MEMORY;
- pciWriteConfigReg (PCI_HOST0, PCI_COMMAND, SELF, command);
-
- pci1_hose.first_busno = pci0_hose.last_busno + 1;
- pci1_hose.last_busno = 0xff;
- pci1_hose.current_busno = pci0_hose.current_busno;
- local_buses[1] = pci1_hose.first_busno;
-
- /* PCI memory space */
- pci_set_region (pci1_hose.regions + 0,
- CFG_PCI1_0_MEM_SPACE,
- CFG_PCI1_0_MEM_SPACE,
- CFG_PCI1_MEM_SIZE, PCI_REGION_MEM);
-
- /* PCI I/O space */
- pci_set_region (pci1_hose.regions + 1,
- CFG_PCI1_IO_SPACE_PCI,
- CFG_PCI1_IO_SPACE, CFG_PCI1_IO_SIZE, PCI_REGION_IO);
-
- pci_set_ops (&pci1_hose,
- pci_hose_read_config_byte_via_dword,
- pci_hose_read_config_word_via_dword,
- gt_read_config_dword,
- pci_hose_write_config_byte_via_dword,
- pci_hose_write_config_word_via_dword,
- gt_write_config_dword);
-
- pci1_hose.region_count = 2;
-
- pci1_hose.cfg_addr = (unsigned int *) PCI_HOST1;
-
- pci_register_hose (&pci1_hose);
-
-#ifndef CONFIG_P3G4
- pciArbiterEnable (PCI_HOST1);
- pciParkingDisable (PCI_HOST1, 1, 1, 1, 1, 1, 1, 1);
-#endif
-
- command = pciReadConfigReg (PCI_HOST1, PCI_COMMAND, SELF);
- command |= PCI_COMMAND_MASTER;
- pciWriteConfigReg (PCI_HOST1, PCI_COMMAND, SELF, command);
-
- pci1_hose.last_busno = pci_hose_scan (&pci1_hose);
-
- command = pciReadConfigReg (PCI_HOST1, PCI_COMMAND, SELF);
- command |= PCI_COMMAND_MEMORY;
- pciWriteConfigReg (PCI_HOST1, PCI_COMMAND, SELF, command);
-}
diff --git a/board/evb64260/sdram_init.c b/board/evb64260/sdram_init.c
deleted file mode 100644
index 8d63c6fa2a..0000000000
--- a/board/evb64260/sdram_init.c
+++ /dev/null
@@ -1,662 +0,0 @@
-/*
- * (C) Copyright 2001
- * Josh Huber <huber@mclx.com>, Mission Critical Linux, Inc.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/* sdram_init.c - automatic memory sizing */
-
-#include <common.h>
-#include <74xx_7xx.h>
-#include <galileo/memory.h>
-#include <galileo/pci.h>
-#include <galileo/gt64260R.h>
-#include <net.h>
-
-#include "eth.h"
-#include "mpsc.h"
-#include "i2c.h"
-#include "64260.h"
-
-/* #define DEBUG */
-#define MAP_PCI
-
-#ifdef DEBUG
-#define DP(x) x
-#else
-#define DP(x)
-#endif
-
-#define GB (1 << 30)
-
-/* structure to store the relevant information about an sdram bank */
-typedef struct sdram_info {
- uchar drb_size;
- uchar registered, ecc;
- uchar tpar;
- uchar tras_clocks;
- uchar burst_len;
- uchar banks, slot;
- int size; /* detected size, not from I2C but from dram_size() */
-} sdram_info_t;
-
-#ifdef DEBUG
-void dump_dimm_info (struct sdram_info *d)
-{
- static const char *ecc_legend[] = { "", " Parity", " ECC" };
-
- printf ("dimm%s %sDRAM: %dMibytes:\n",
- ecc_legend[d->ecc],
- d->registered ? "R" : "", (d->size >> 20));
- printf (" drb=%d tpar=%d tras=%d burstlen=%d banks=%d slot=%d\n",
- d->drb_size, d->tpar, d->tras_clocks, d->burst_len,
- d->banks, d->slot);
-}
-#endif
-
-static int
-memory_map_bank (unsigned int bankNo,
- unsigned int bankBase, unsigned int bankLength)
-{
-#ifdef DEBUG
- if (bankLength > 0) {
- printf ("mapping bank %d at %08x - %08x\n",
- bankNo, bankBase, bankBase + bankLength - 1);
- } else {
- printf ("unmapping bank %d\n", bankNo);
- }
-#endif
-
- memoryMapBank (bankNo, bankBase, bankLength);
-
- return 0;
-}
-
-#ifdef MAP_PCI
-static int
-memory_map_bank_pci (unsigned int bankNo,
- unsigned int bankBase, unsigned int bankLength)
-{
- PCI_HOST host;
-
- for (host = PCI_HOST0; host <= PCI_HOST1; host++) {
- const int features =
- PREFETCH_ENABLE |
- DELAYED_READ_ENABLE |
- AGGRESSIVE_PREFETCH |
- READ_LINE_AGGRESSIVE_PREFETCH |
- READ_MULTI_AGGRESSIVE_PREFETCH |
- MAX_BURST_4 | PCI_NO_SWAP;
-
- pciMapMemoryBank (host, bankNo, bankBase, bankLength);
-
- pciSetRegionSnoopMode (host, bankNo, PCI_SNOOP_WB, bankBase,
- bankLength);
-
- pciSetRegionFeatures (host, bankNo, features, bankBase,
- bankLength);
- }
- return 0;
-}
-#endif
-
-/* ------------------------------------------------------------------------- */
-
-/* much of this code is based on (or is) the code in the pip405 port */
-/* thanks go to the authors of said port - Josh */
-
-
-/*
- * translate ns.ns/10 coding of SPD timing values
- * into 10 ps unit values
- */
-static inline unsigned short NS10to10PS (unsigned char spd_byte)
-{
- unsigned short ns, ns10;
-
- /* isolate upper nibble */
- ns = (spd_byte >> 4) & 0x0F;
- /* isolate lower nibble */
- ns10 = (spd_byte & 0x0F);
-
- return (ns * 100 + ns10 * 10);
-}
-
-/*
- * translate ns coding of SPD timing values
- * into 10 ps unit values
- */
-static inline unsigned short NSto10PS (unsigned char spd_byte)
-{
- return (spd_byte * 100);
-}
-
-#ifdef CONFIG_ZUMA_V2
-static int check_dimm (uchar slot, sdram_info_t * info)
-{
- /* assume 2 dimms, 2 banks each 256M - we dont have an
- * dimm i2c so rely on the detection routines later */
-
- memset (info, 0, sizeof (*info));
-
- info->slot = slot;
- info->banks = 2; /* Detect later */
- info->registered = 0;
- info->drb_size = 32; /* 16 - 256MBit, 32 - 512MBit
- but doesn't matter, both do same
- thing in setup_sdram() */
- info->tpar = 3;
- info->tras_clocks = 5;
- info->burst_len = 4;
-#ifdef CONFIG_ECC
- info->ecc = 0; /* Detect later */
-#endif /* CONFIG_ECC */
- return 0;
-}
-
-#elif defined(CONFIG_P3G4)
-
-static int check_dimm (uchar slot, sdram_info_t * info)
-{
- memset (info, 0, sizeof (*info));
-
- if (slot)
- return 0;
-
- info->slot = slot;
- info->banks = 1;
- info->registered = 0;
- info->drb_size = 4;
- info->tpar = 3;
- info->tras_clocks = 6;
- info->burst_len = 4;
-#ifdef CONFIG_ECC
- info->ecc = 2;
-#endif
- return 0;
-}
-
-#else /* ! CONFIG_ZUMA_V2 && ! CONFIG_P3G4 */
-
-/* This code reads the SPD chip on the sdram and populates
- * the array which is passed in with the relevant information */
-static int check_dimm (uchar slot, sdram_info_t * info)
-{
- DECLARE_GLOBAL_DATA_PTR;
- uchar addr = slot == 0 ? DIMM0_I2C_ADDR : DIMM1_I2C_ADDR;
- int ret;
- uchar rows, cols, sdram_banks, supp_cal, width, cal_val;
- ulong tmemclk;
- uchar trp_clocks, trcd_clocks;
- uchar data[128];
-
- get_clocks ();
-
- tmemclk = 1000000000 / (gd->bus_clk / 100); /* in 10 ps units */
-
-#ifdef CONFIG_EVB64260_750CX
- if (0 != slot) {
- printf ("check_dimm: The EVB-64260-750CX only has 1 DIMM,");
- printf (" called with slot=%d insetad!\n", slot);
- return 0;
- }
-#endif
- DP (puts ("before i2c read\n"));
-
- ret = i2c_read (addr, 0, 128, data, 0);
-
- DP (puts ("after i2c read\n"));
-
- /* zero all the values */
- memset (info, 0, sizeof (*info));
-
- if (ret) {
- DP (printf ("No DIMM in slot %d [err = %x]\n", slot, ret));
- return 0;
- }
-
- /* first, do some sanity checks */
- if (data[2] != 0x4) {
- printf ("Not SDRAM in slot %d\n", slot);
- return 0;
- }
-
- /* get various information */
- rows = data[3];
- cols = data[4];
- info->banks = data[5];
- sdram_banks = data[17];
- width = data[13] & 0x7f;
-
- DP (printf
- ("sdram_banks: %d, banks: %d\n", sdram_banks, info->banks));
-
- /* check if the memory is registered */
- if (data[21] & (BIT1 | BIT4))
- info->registered = 1;
-
-#ifdef CONFIG_ECC
- /* check for ECC/parity [0 = none, 1 = parity, 2 = ecc] */
- info->ecc = (data[11] & 2) >> 1;
-#endif
-
- /* bit 1 is CL2, bit 2 is CL3 */
- supp_cal = (data[18] & 0x6) >> 1;
-
- /* compute the relevant clock values */
- trp_clocks = (NSto10PS (data[27]) + (tmemclk - 1)) / tmemclk;
- trcd_clocks = (NSto10PS (data[29]) + (tmemclk - 1)) / tmemclk;
- info->tras_clocks = (NSto10PS (data[30]) + (tmemclk - 1)) / tmemclk;
-
- DP (printf ("trp = %d\ntrcd_clocks = %d\ntras_clocks = %d\n",
- trp_clocks, trcd_clocks, info->tras_clocks));
-
- /* try a CAS latency of 3 first... */
- cal_val = 0;
- if (supp_cal & 3) {
- if (NS10to10PS (data[9]) <= tmemclk)
- cal_val = 3;
- }
-
- /* then 2... */
- if (supp_cal & 2) {
- if (NS10to10PS (data[23]) <= tmemclk)
- cal_val = 2;
- }
-
- DP (printf ("cal_val = %d\n", cal_val));
-
- /* bummer, did't work... */
- if (cal_val == 0) {
- DP (printf ("Couldn't find a good CAS latency\n"));
- return 0;
- }
-
- /* get the largest delay -- these values need to all be the same
- * see Res#6 */
- info->tpar = cal_val;
- if (trp_clocks > info->tpar)
- info->tpar = trp_clocks;
- if (trcd_clocks > info->tpar)
- info->tpar = trcd_clocks;
-
- DP (printf ("tpar set to: %d\n", info->tpar));
-
-#ifdef CFG_BROKEN_CL2
- if (info->tpar == 2) {
- info->tpar = 3;
- DP (printf ("tpar fixed-up to: %d\n", info->tpar));
- }
-#endif
- /* compute the module DRB size */
- info->drb_size =
- (((1 << (rows + cols)) * sdram_banks) * width) / _16M;
-
- DP (printf ("drb_size set to: %d\n", info->drb_size));
-
- /* find the burst len */
- info->burst_len = data[16] & 0xf;
- if ((info->burst_len & 8) == 8) {
- info->burst_len = 1;
- } else if ((info->burst_len & 4) == 4) {
- info->burst_len = 0;
- } else {
- return 0;
- }
-
- info->slot = slot;
- return 0;
-}
-#endif /* ! CONFIG_ZUMA_V2 */
-
-static int setup_sdram_common (sdram_info_t info[2])
-{
- ulong tmp;
- int tpar = 2, tras_clocks = 5, registered = 1, ecc = 2;
-
- if (!info[0].banks && !info[1].banks)
- return 0;
-
- if (info[0].banks) {
- if (info[0].tpar > tpar)
- tpar = info[0].tpar;
- if (info[0].tras_clocks > tras_clocks)
- tras_clocks = info[0].tras_clocks;
- if (!info[0].registered)
- registered = 0;
- if (info[0].ecc != 2)
- ecc = 0;
- }
-
- if (info[1].banks) {
- if (info[1].tpar > tpar)
- tpar = info[1].tpar;
- if (info[1].tras_clocks > tras_clocks)
- tras_clocks = info[1].tras_clocks;
- if (!info[1].registered)
- registered = 0;
- if (info[1].ecc != 2)
- ecc = 0;
- }
-
- /* SDRAM configuration */
- tmp = GTREGREAD (SDRAM_CONFIGURATION);
-
- /* Turn on physical interleave if both DIMMs
- * have even numbers of banks. */
- if ((info[0].banks == 0 || info[0].banks == 2) &&
- (info[1].banks == 0 || info[1].banks == 2)) {
- /* physical interleave on */
- tmp &= ~(1 << 15);
- } else {
- /* physical interleave off */
- tmp |= (1 << 15);
- }
-
- tmp |= (registered << 17);
-
- /* Use buffer 1 to return read data to the CPU
- * See Res #12 */
- tmp |= (1 << 26);
-
- GT_REG_WRITE (SDRAM_CONFIGURATION, tmp);
- DP (printf ("SDRAM config: %08x\n", GTREGREAD (SDRAM_CONFIGURATION)));
-
- /* SDRAM timing */
- tmp = (((tpar == 3) ? 2 : 1) |
- (((tpar == 3) ? 2 : 1) << 2) |
- (((tpar == 3) ? 2 : 1) << 4) | (tras_clocks << 8));
-
-#ifdef CONFIG_ECC
- /* Setup ECC */
- if (ecc == 2)
- tmp |= 1 << 13;
-#endif /* CONFIG_ECC */
-
- GT_REG_WRITE (SDRAM_TIMING, tmp);
- DP (printf ("SDRAM timing: %08x (%d,%d,%d,%d)\n",
- GTREGREAD (SDRAM_TIMING), tpar, tpar, tpar, tras_clocks));
-
- /* SDRAM address decode register */
- /* program this with the default value */
- GT_REG_WRITE (SDRAM_ADDRESS_DECODE, 0x2);
- DP (printf ("SDRAM decode: %08x\n",
- GTREGREAD (SDRAM_ADDRESS_DECODE)));
-
- return 0;
-}
-
-/* sets up the GT properly with information passed in */
-static int setup_sdram (sdram_info_t * info)
-{
- ulong tmp, check;
- ulong *addr = 0;
- int i;
-
- /* sanity checking */
- if (!info->banks)
- return 0;
-
- /* ---------------------------- */
- /* Program the GT with the discovered data */
-
- /* bank parameters */
- tmp = (0xf << 16); /* leave all virt bank pages open */
-
- DP (printf ("drb_size: %d\n", info->drb_size));
- switch (info->drb_size) {
- case 1:
- tmp |= (1 << 14);
- break;
- case 4:
- case 8:
- tmp |= (2 << 14);
- break;
- case 16:
- case 32:
- tmp |= (3 << 14);
- break;
- default:
- printf ("Error in dram size calculation\n");
- return 1;
- }
-
- /* SDRAM bank parameters */
- /* the param registers for slot 1 (banks 2+3) are offset by 0x8 */
- GT_REG_WRITE (SDRAM_BANK0PARAMETERS + (info->slot * 0x8), tmp);
- GT_REG_WRITE (SDRAM_BANK1PARAMETERS + (info->slot * 0x8), tmp);
- DP (printf
- ("SDRAM bankparam slot %d (bank %d+%d): %08lx\n", info->slot,
- info->slot * 2, (info->slot * 2) + 1, tmp));
-
- /* set the SDRAM configuration for each bank */
- for (i = info->slot * 2; i < ((info->slot * 2) + info->banks); i++) {
- DP (printf ("*** Running a MRS cycle for bank %d ***\n", i));
-
- /* map the bank */
- memory_map_bank (i, 0, GB / 4);
-
- /* set SDRAM mode */
- GT_REG_WRITE (SDRAM_OPERATION_MODE, 0x3);
- check = GTREGREAD (SDRAM_OPERATION_MODE);
-
- /* dummy write */
- *addr = 0;
-
- /* wait for the command to complete */
- while ((GTREGREAD (SDRAM_OPERATION_MODE) & (1 << 31)) == 0);
-
- /* switch back to normal operation mode */
- GT_REG_WRITE (SDRAM_OPERATION_MODE, 0);
- check = GTREGREAD (SDRAM_OPERATION_MODE);
-
- /* unmap the bank */
- memory_map_bank (i, 0, 0);
- DP (printf ("*** MRS cycle for bank %d done ***\n", i));
- }
-
- return 0;
-}
-
-/*
- * Check memory range for valid RAM. A simple memory test determines
- * the actually available RAM size between addresses `base' and
- * `base + maxsize'. Some (not all) hardware errors are detected:
- * - short between address lines
- * - short between data lines
- */
-static long int dram_size (long int *base, long int maxsize)
-{
- volatile long int *addr, *b = base;
- long int cnt, val, save1, save2;
-
-#define STARTVAL (1<<20) /* start test at 1M */
- for (cnt = STARTVAL / sizeof (long); cnt < maxsize / sizeof (long);
- cnt <<= 1) {
- addr = base + cnt; /* pointer arith! */
-
- save1 = *addr; /* save contents of addr */
- save2 = *b; /* save contents of base */
-
- *addr = cnt; /* write cnt to addr */
- *b = 0; /* put null at base */
-
- /* check at base address */
- if ((*b) != 0) {
- *addr = save1; /* restore *addr */
- *b = save2; /* restore *b */
- return (0);
- }
- val = *addr; /* read *addr */
-
- *addr = save1;
- *b = save2;
-
- if (val != cnt) {
- /* fix boundary condition.. STARTVAL means zero */
- if (cnt == STARTVAL / sizeof (long))
- cnt = 0;
- return (cnt * sizeof (long));
- }
- }
- return maxsize;
-}
-
-/* ------------------------------------------------------------------------- */
-
-/* U-Boot interface function to SDRAM init - this is where all the
- * controlling logic happens */
-long int initdram (int board_type)
-{
- ulong checkbank[4] = {[0 ... 3] = 0 };
- int bank_no;
- ulong total;
- int nhr;
- sdram_info_t dimm_info[2];
-
-
- /* first, use the SPD to get info about the SDRAM */
-
- /* check the NHR bit and skip mem init if it's already done */
- nhr = get_hid0 () & (1 << 16);
-
- if (nhr) {
- printf ("Skipping SDRAM setup due to NHR bit being set\n");
- } else {
- /* DIMM0 */
- check_dimm (0, &dimm_info[0]);
-
- /* DIMM1 */
-#ifndef CONFIG_EVB64260_750CX /* EVB64260_750CX has only 1 DIMM */
- check_dimm (1, &dimm_info[1]);
-#else /* CONFIG_EVB64260_750CX */
- memset (&dimm_info[1], 0, sizeof (sdram_info_t));
-#endif
-
- /* unmap all banks */
- memory_map_bank (0, 0, 0);
- memory_map_bank (1, 0, 0);
- memory_map_bank (2, 0, 0);
- memory_map_bank (3, 0, 0);
-
- /* Now, program the GT with the correct values */
- if (setup_sdram_common (dimm_info)) {
- printf ("Setup common failed.\n");
- }
-
- if (setup_sdram (&dimm_info[0])) {
- printf ("Setup for DIMM1 failed.\n");
- }
-
- if (setup_sdram (&dimm_info[1])) {
- printf ("Setup for DIMM2 failed.\n");
- }
-
- /* set the NHR bit */
- set_hid0 (get_hid0 () | (1 << 16));
- }
- /* next, size the SDRAM banks */
-
- total = 0;
- if (dimm_info[0].banks > 0)
- checkbank[0] = 1;
- if (dimm_info[0].banks > 1)
- checkbank[1] = 1;
- if (dimm_info[0].banks > 2)
- printf ("Error, SPD claims DIMM1 has >2 banks\n");
-
- if (dimm_info[1].banks > 0)
- checkbank[2] = 1;
- if (dimm_info[1].banks > 1)
- checkbank[3] = 1;
- if (dimm_info[1].banks > 2)
- printf ("Error, SPD claims DIMM2 has >2 banks\n");
-
- /* Generic dram sizer: works even if we don't have i2c DIMMs,
- * as long as the timing settings are more or less correct */
-
- /*
- * pass 1: size all the banks, using first bat (0-256M)
- * limitation: we only support 256M per bank due to
- * us only having 1 BAT for all DRAM
- */
- for (bank_no = 0; bank_no < CFG_DRAM_BANKS; bank_no++) {
- /* skip over banks that are not populated */
- if (!checkbank[bank_no])
- continue;
-
- DP (printf ("checking bank %d\n", bank_no));
-
- memory_map_bank (bank_no, 0, GB / 4);
- checkbank[bank_no] = dram_size (NULL, GB / 4);
- memory_map_bank (bank_no, 0, 0);
-
- DP (printf ("bank %d %08lx\n", bank_no, checkbank[bank_no]));
- }
-
- /*
- * pass 2: contiguously map each bank into physical address
- * space.
- */
- dimm_info[0].banks = dimm_info[1].banks = 0;
- for (bank_no = 0; bank_no < CFG_DRAM_BANKS; bank_no++) {
- if (!checkbank[bank_no])
- continue;
-
- dimm_info[bank_no / 2].banks++;
- dimm_info[bank_no / 2].size += checkbank[bank_no];
-
- memory_map_bank (bank_no, total, checkbank[bank_no]);
-#ifdef MAP_PCI
- memory_map_bank_pci (bank_no, total, checkbank[bank_no]);
-#endif
- total += checkbank[bank_no];
- }
-
-#ifdef CONFIG_ECC
-#ifdef CONFIG_ZUMA_V2
- /*
- * We always enable ECC when bank 2 and 3 are unpopulated
- * If we 2 or 3 are populated, we CAN'T support ECC.
- * (Zuma boards only support ECC in banks 0 and 1; assume that
- * in that configuration, ECC chips are mounted, even for stacked
- * chips)
- */
- if (checkbank[2] == 0 && checkbank[3] == 0) {
- dimm_info[0].ecc = 2;
- GT_REG_WRITE (SDRAM_TIMING,
- GTREGREAD (SDRAM_TIMING) | (1 << 13));
- /* TODO: do we have to run MRS cycles again? */
- }
-#endif /* CONFIG_ZUMA_V2 */
-
- if (GTREGREAD (SDRAM_TIMING) & (1 << 13)) {
- puts ("[ECC] ");
- }
-#endif /* CONFIG_ECC */
-
-#ifdef DEBUG
- dump_dimm_info (&dimm_info[0]);
- dump_dimm_info (&dimm_info[1]);
-#endif
- /* TODO: return at MOST 256M? */
- /* return total > GB/4 ? GB/4 : total; */
- return total;
-}
diff --git a/board/evb64260/serial.c b/board/evb64260/serial.c
deleted file mode 100644
index d9c7a157c1..0000000000
--- a/board/evb64260/serial.c
+++ /dev/null
@@ -1,191 +0,0 @@
-/*
- * (C) Copyright 2001
- * Josh Huber <huber@mclx.com>, Mission Critical Linux, Inc.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * serial.c - serial support for the gal ev board
- */
-
-/* supports both the 16650 duart and the MPSC */
-
-#include <common.h>
-#include <command.h>
-#include <galileo/memory.h>
-
-#if (defined CFG_INIT_CHAN1) || (defined CFG_INIT_CHAN2)
-#include <ns16550.h>
-#endif
-
-#include "serial.h"
-
-#include "mpsc.h"
-
-#if (defined CFG_INIT_CHAN1) || (defined CFG_INIT_CHAN2)
-const NS16550_t COM_PORTS[] = { (NS16550_t) CFG_NS16550_COM1,
- (NS16550_t) CFG_NS16550_COM2 };
-#endif
-
-#ifdef CONFIG_MPSC
-
-int serial_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
-#if (defined CFG_INIT_CHAN1) || (defined CFG_INIT_CHAN2)
- int clock_divisor = CFG_NS16550_CLK / 16 / gd->baudrate;
-#endif
-
- mpsc_init(gd->baudrate);
-
- /* init the DUART chans so that KGDB in the kernel can use them */
-#ifdef CFG_INIT_CHAN1
- NS16550_reinit(COM_PORTS[0], clock_divisor);
-#endif
-#ifdef CFG_INIT_CHAN2
- NS16550_reinit(COM_PORTS[1], clock_divisor);
-#endif
- return (0);
-}
-
-void
-serial_putc(const char c)
-{
- if (c == '\n')
- mpsc_putchar('\r');
-
- mpsc_putchar(c);
-}
-
-int
-serial_getc(void)
-{
- return mpsc_getchar();
-}
-
-int
-serial_tstc(void)
-{
- return mpsc_test_char();
-}
-
-void
-serial_setbrg (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- galbrg_set_baudrate(CONFIG_MPSC_PORT, gd->baudrate);
-}
-
-#else /* ! CONFIG_MPSC */
-
-int serial_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- int clock_divisor = CFG_NS16550_CLK / 16 / gd->baudrate;
-
-#ifdef CFG_INIT_CHAN1
- (void)NS16550_init(COM_PORTS[0], clock_divisor);
-#endif
-#ifdef CFG_INIT_CHAN2
- (void)NS16550_init(COM_PORTS[1], clock_divisor);
-#endif
-
- return (0);
-}
-
-void
-serial_putc(const char c)
-{
- if (c == '\n')
- NS16550_putc(COM_PORTS[CFG_DUART_CHAN], '\r');
-
- NS16550_putc(COM_PORTS[CFG_DUART_CHAN], c);
-}
-
-int
-serial_getc(void)
-{
- return NS16550_getc(COM_PORTS[CFG_DUART_CHAN]);
-}
-
-int
-serial_tstc(void)
-{
- return NS16550_tstc(COM_PORTS[CFG_DUART_CHAN]);
-}
-
-void
-serial_setbrg (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- int clock_divisor = CFG_NS16550_CLK / 16 / gd->baudrate;
-
-#ifdef CFG_INIT_CHAN1
- NS16550_reinit(COM_PORTS[0], clock_divisor);
-#endif
-#ifdef CFG_INIT_CHAN2
- NS16550_reinit(COM_PORTS[1], clock_divisor);
-#endif
-}
-
-#endif /* CONFIG_MPSC */
-
-void
-serial_puts (const char *s)
-{
- while (*s) {
- serial_putc (*s++);
- }
-}
-
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
-void
-kgdb_serial_init(void)
-{
-}
-
-void
-putDebugChar (int c)
-{
- serial_putc (c);
-}
-
-void
-putDebugStr (const char *str)
-{
- serial_puts (str);
-}
-
-int
-getDebugChar (void)
-{
- return serial_getc();
-}
-
-void
-kgdb_interruptible (int yes)
-{
- return;
-}
-#endif /* CFG_CMD_KGDB */
diff --git a/board/evb64260/serial.h b/board/evb64260/serial.h
deleted file mode 100644
index bac9253852..0000000000
--- a/board/evb64260/serial.h
+++ /dev/null
@@ -1,63 +0,0 @@
-/* serial.h - mostly useful for DUART serial_init in serial.c */
-
-#ifndef __SERIAL_H__
-#define __SERIAL_H__
-
-#if 0
-
-#define B230400 1
-#define B115200 2
-#define B57600 4
-#define B38400 82
-#define B19200 163
-#define B9600 24
-#define B4800 651
-#define B2400 1302
-#define B1200 2604
-#define B600 5208
-#define B300 10417
-#define B150 20833
-#define B110 28409
-#define BDEFAULT B115200
-
- /* this stuff is important to initialize
- the DUART channels */
-
-#define Scale 0x01L /* distance between port addresses */
-#define COM1 0x000003f8 /* Keyboard */
-#define COM2 0x000002f8 /* Host */
-
-
-/* Port Definitions relative to base COM port addresses */
-#define DataIn (0x00*Scale) /* data input port */
-#define DataOut (0x00*Scale) /* data output port */
-#define BaudLsb (0x00*Scale) /* baud rate divisor least significant byte */
-#define BaudMsb (0x01*Scale) /* baud rate divisor most significant byte */
-#define Ier (0x01*Scale) /* interrupt enable register */
-#define Iir (0x02*Scale) /* interrupt identification register */
-#define Lcr (0x03*Scale) /* line control register */
-#define Mcr (0x04*Scale) /* modem control register */
-#define Lsr (0x05*Scale) /* line status register */
-#define Msr (0x06*Scale) /* modem status register */
-
-/* Bit Definitions for above ports */
-#define LcrDlab 0x80 /* b7: enable baud rate divisor registers */
-#define LcrDflt 0x03 /* b6-0: no parity, 1 stop, 8 data */
-
-#define McrRts 0x02 /* b1: request to send (I am ready to xmit) */
-#define McrDtr 0x01 /* b0: data terminal ready (I am alive ready to rcv) */
-#define McrDflt (McrRts|McrDtr)
-
-#define LsrTxD 0x6000 /* b5: transmit holding register empty (i.e. xmit OK!)*/
- /* b6: transmitter empty */
-#define LsrRxD 0x0100 /* b0: received data ready (i.e. got a byte!) */
-
-#define MsrRi 0x0040 /* b6: ring indicator (other guy is ready to rcv) */
-#define MsrDsr 0x0020 /* b5: data set ready (other guy is alive ready to rcv */
-#define MsrCts 0x0010 /* b4: clear to send (other guy is ready to rcv) */
-
-#define IerRda 0xf /* b0: Enable received data available interrupt */
-
-#endif
-
-#endif /* __SERIAL_H__ */
diff --git a/board/evb64260/u-boot.lds b/board/evb64260/u-boot.lds
deleted file mode 100644
index d89eb6cff2..0000000000
--- a/board/evb64260/u-boot.lds
+++ /dev/null
@@ -1,138 +0,0 @@
-/*
- * (C) Copyright 2001
- * Josh Huber <huber@mclx.com>, Mission Critical Linux, Inc.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * u-boot.lds - linker script for U-Boot on the Galileo Eval Board.
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/74xx_7xx/start.o (.text)
-
-/* store the environment in a seperate sector in the boot flash */
-/* . = env_offset; */
-/* common/environment.o(.text) */
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/evb64260/zuma_pbb.c b/board/evb64260/zuma_pbb.c
deleted file mode 100644
index d64025afd7..0000000000
--- a/board/evb64260/zuma_pbb.c
+++ /dev/null
@@ -1,220 +0,0 @@
-#include <common.h>
-#include <malloc.h>
-
-#if (CONFIG_COMMANDS & CFG_CMD_BSP)
-#include <command.h>
-#endif
-
-#include <pci.h>
-#include <galileo/pci.h>
-#include "zuma_pbb.h"
-
-#undef DEBUG
-
-#define PAT_LO 0x00010203
-#define PAT_HI 0x04050607
-
-static PBB_DMA_REG_MAP *zuma_pbb_reg = NULL;
-static char test_buf1[2048];
-static char test_buf2[2048];
-void zuma_init_pbb(void);
-int zuma_mbox_init(void);
-int zuma_test_dma(int cmd, int size);
-
-int zuma_test_dma (int cmd, int size)
-{
- static const char *const test_legend[] = {
- "write", "verify",
- "copy", "compare",
- "write inc", "verify inc"
- };
- register int i, j;
- unsigned int p1 = ((unsigned int) test_buf1 + 0xff) & (~0xff);
- unsigned int p2 = ((unsigned int) test_buf2 + 0xff) & (~0xff);
- volatile unsigned int *ps = (unsigned int *) p1;
- volatile unsigned int *pd = (unsigned int *) p2;
- unsigned int funct, pat_lo = PAT_LO, pat_hi = PAT_HI;
- DMA_INT_STATUS stat;
- int ret = 0;
-
- if (!zuma_pbb_reg) {
- printf ("not initted\n");
- return -1;
- }
-
- if (cmd < 0 || cmd > 5) {
- printf ("inv cmd %d\n", cmd);
- return -1;
- }
-
- if (cmd == 2 || cmd == 3) {
- /* not implemented */
- return 0;
- }
-
- if (size <= 0 || size > 1024)
- size = 1024;
-
- size &= (~7); /* throw away bottom 3 bits */
-
- p1 = ((unsigned int) test_buf1 + 0xff) & (~0xff);
- p2 = ((unsigned int) test_buf2 + 0xff) & (~0xff);
-
- memset ((void *) p1, 0, size);
- memset ((void *) p2, 0, size);
-
- for (i = 0; i < size / 4; i += 2) {
- ps[i] = pat_lo;
- ps[i + 1] = pat_hi;
- if (cmd == 4 || cmd == 5) {
- unsigned char *pl = (unsigned char *) &pat_lo;
- unsigned char *ph = (unsigned char *) &pat_hi;
-
- for (j = 0; j < 4; j++) {
- pl[j] += 8;
- ph[j] += 8;
- }
- }
- }
-
- funct = (1 << 31) | (cmd << 24) | (size);
-
- zuma_pbb_reg->int_mask.pci_bits.chan0 =
- EOF_RX_FLAG | EOF_TX_FLAG | EOB_TX_FLAG;
-
- zuma_pbb_reg->debug_57 = PAT_LO; /* patl */
- zuma_pbb_reg->debug_58 = PAT_HI; /* path */
-
- zuma_pbb_reg->debug_54 = cpu_to_le32 (p1); /* src 0x01b0 */
- zuma_pbb_reg->debug_55 = cpu_to_le32 (p2); /* dst 0x01b8 */
- zuma_pbb_reg->debug_56 = cpu_to_le32 (funct); /* func, 0x01c0 */
-
- /* give DMA time to chew on things.. dont use DRAM or PCI */
- /* if you can avoid it. */
- do {
- for (i = 0; i < 1000 * 10; i++);
- } while (le32_to_cpu (zuma_pbb_reg->debug_56) & (1 << 31));
-
- stat.word = zuma_pbb_reg->status.word;
- zuma_pbb_reg->int_mask.word = 0;
-
- printf ("stat: %08x (%x)\n", stat.word, stat.pci_bits.chan0);
-
- printf ("func: %08x\n", le32_to_cpu (zuma_pbb_reg->debug_56));
- printf ("src @%08x: %08x %08x %08x %08x\n", p1, ps[0], ps[1], ps[2],
- ps[3]);
- printf ("dst @%08x: %08x %08x %08x %08x\n", p2, pd[0], pd[1], pd[2],
- pd[3]);
- printf ("func: %08x\n", le32_to_cpu (zuma_pbb_reg->debug_56));
-
-
- if (cmd == 0 || cmd == 4) {
- /* this is a write */
- if (!(stat.pci_bits.chan0 & EOF_RX_FLAG) || /* not done */
- (memcmp ((void *) ps, (void *) pd, size) != 0)) { /* cmp error */
- for (i = 0; i < size / 4; i += 2) {
- if ((ps[i] != pd[i]) || (ps[i + 1] != pd[i + 1])) {
- printf ("s @%p:%08x %08x\n", &ps[i], ps[i], ps[i + 1]);
- printf ("d @%p:%08x %08x\n", &pd[i], pd[i], pd[i + 1]);
- }
- }
- ret = -1;
- }
- } else {
- /* this is a verify */
- if (!(stat.pci_bits.chan0 & EOF_TX_FLAG) || /* not done */
- (stat.pci_bits.chan0 & EOB_TX_FLAG)) { /* cmp error */
- printf ("%08x: %08x %08x\n",
- le32_to_cpu (zuma_pbb_reg->debug_63),
- zuma_pbb_reg->debug_61, zuma_pbb_reg->debug_62);
- ret = -1;
- }
- }
-
- printf ("%s cmd %d, %d bytes: %s!\n", test_legend[cmd], cmd, size,
- (ret == 0) ? "PASSED" : "FAILED");
- return 0;
-}
-
-void zuma_init_pbb (void)
-{
- unsigned int iobase;
- pci_dev_t dev =
- pci_find_device (VENDOR_ID_ZUMA, DEVICE_ID_ZUMA_PBB, 0);
-
- if (dev == -1) {
- printf ("no zuma pbb\n");
- return;
- }
-
- pci_read_config_dword (dev, PCI_BASE_ADDRESS_0, &iobase);
-
- zuma_pbb_reg =
- (PBB_DMA_REG_MAP *) (iobase & PCI_BASE_ADDRESS_MEM_MASK);
-
- if (!zuma_pbb_reg) {
- printf ("zuma pbb bar none! (hah hah, get it?)\n");
- return;
- }
-
- zuma_pbb_reg->int_mask.word = 0;
-
- printf ("pbb @ %p v%d.%d, timestamp %08x\n", zuma_pbb_reg,
- zuma_pbb_reg->version.pci_bits.rev_major,
- zuma_pbb_reg->version.pci_bits.rev_minor,
- zuma_pbb_reg->timestamp);
-
-}
-
-#if (CONFIG_COMMANDS & CFG_CMD_BSP)
-
-static int last_cmd = 4; /* write increment */
-static int last_size = 64;
-
-int
-do_zuma_init_pbb (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- zuma_init_pbb ();
- return 0;
-}
-
-int
-do_zuma_test_dma (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- if (argc > 1) {
- last_cmd = simple_strtoul (argv[1], NULL, 10);
- }
- if (argc > 2) {
- last_size = simple_strtoul (argv[2], NULL, 10);
- }
- zuma_test_dma (last_cmd, last_size);
- return 0;
-}
-
-int
-do_zuma_init_mbox (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- zuma_mbox_init ();
- return 0;
-}
-
-U_BOOT_CMD(
- zinit, 1, 0, do_zuma_init_pbb,
- "zinit - init zuma pbb\n",
- "\n"
- " - init zuma pbb\n"
-);
-U_BOOT_CMD(
- zdtest, 3, 1, do_zuma_test_dma,
- "zdtest - run dma test\n",
- "[cmd [count]]\n"
- " - run dma cmd (w=0,v=1,cp=2,cmp=3,wi=4,vi=5), count bytes\n"
-);
-U_BOOT_CMD(
- zminit, 1, 0, do_zuma_init_mbox,
- "zminit - init zuma mbox\n",
- "\n"
- " - init zuma mbox\n"
-);
-
-#endif /* CFG_CMD_BSP */
diff --git a/board/evb64260/zuma_pbb.h b/board/evb64260/zuma_pbb.h
deleted file mode 100644
index 300b2fe8cc..0000000000
--- a/board/evb64260/zuma_pbb.h
+++ /dev/null
@@ -1,346 +0,0 @@
-#ifndef ZUMA_PBB_H
-#define ZUMA_PBB_H
-
-#define MAX_NUM_BUFFER_PER_RING 32
-
-#ifdef __BIG_ENDIAN
-#define cpu_bits _be_s_bits /* use with le32_to_cpu only */
-#define pci_bits _be_bits /* may contain swapped bytes,
- but dont need le32_to_cpu */
-#endif
-
-#ifdef __LITTLE_ENDIAN
-#define cpu_bits _le_bits
-#define pci_bits _le_bits
-#endif
-
-#define VENDOR_ID_ZUMA 0x1172
-#define DEVICE_ID_ZUMA_PBB 0x0004
-
-#define RXDBP(chan) (&sip->rx_desc[chan].base) /* ch*8 */
-#define RXDP(chan) (&sip->rx_desc[chan].current) /* ch*8 + 4 */
-#define TXDBP(chan) (&sip->tx_desc[chan].base) /* ch*8 + 64 */
-#define TXDP(chan) (&sip->tx_desc[chan].current) /* ch*8 + 68 */
-
-#define PBB_DMA_OWN_BIT 0x80000000
-#define PBB_DMA_LAST_BIT 0x40000000
-
-#define EOF_RX_FLAG 1 /* bit 0 */
-#define EOB_RX_FLAG 2 /* bit 1 */
-#define EOF_TX_FLAG 4 /* bit 2 */
-#define EOB_TX_FLAG 8 /* bit 3 */
-
-#define TX_MODE(m) (((m)&7) << 16)
-
-#define RX_DESC(i) (cs->rx_desc[i])
-#define TX_DESC(i) (cs->tx_desc[i])
-
-#define RX_CONTROL(i) (RX_DESC(i).control.word)
-#define RX_CONTROL_SIZE(i) (RX_DESC(i).control.rx.size)
-#define TX_CONTROL(i) (TX_DESC(i).control.word)
-
-#define RX_DATA_P(i) (&RX_DESC(i).ptr)
-#define TX_DATA_P(i) (&TX_DESC(i).ptr)
-
-typedef volatile unsigned char V8;
-typedef volatile unsigned short V16;
-typedef volatile unsigned int V32;
-
-/* RAM descriptor layout */
-typedef struct _tag_dma_descriptor {
- V32 ptr;
- union {
- struct {
- V32 owner:1;
- V32 last:1;
- V32 reserved0: 10;
- V32 tx_mode: 4;
-
- V32 reserved1: 5;
- V32 size: 11;
- } tx;
- struct {
- V32 owner:1;
- V32 last:1;
- V32 reserved0: 14;
-
- V32 reserved1: 5;
- V32 size: 11;
- } rx;
- V32 word;
- } control;
-} DMA_DESCRIPTOR;
-
-/*
- * NOTE: DO NOT USE structure to write non-word values... all registers
- * MUST be written 4 bytes at a time in SI version 0.
- * Non-word writes will result in "unaccessed" bytes written as zero.
- *
- * Byte reads are allowed.
- *
- * V32 pads are because the registers are spaced every 8 bytes (64 bits)
- *
- */
-
-/* NOTE!!! 4 dwords */
-typedef struct _tag_dma_descriptor_ring {
- DMA_DESCRIPTOR *base;
- V32 pad1; /* skip high dword */
- volatile DMA_DESCRIPTOR *current;
- V32 pad3; /* skip high dword */
-} DMA_DESCRIPTOR_RING;
-
-/* 1 dword */
-typedef union _tag_dma_generic {
- struct { /* byte 3 2 1 0 */
- V32 chan7:4; /* bits 31-28 */
- V32 chan6:4; /* bits 27-24 */
- V32 chan5:4; /* bits 23-20 */
- V32 chan4:4; /* bits 19-16 */
- V32 chan3:4; /* bits 15-12 */
- V32 chan2:4; /* bits 11-8 */
- V32 chan1:4; /* bits 7-4 */
- V32 chan0:4; /* bits 3-0 */
- } _be_s_bits;
- struct { /* byte 0 1 2 3 */
- V32 chan1:4; /* bits 7-4 */
- V32 chan0:4; /* bits 3-0 */
- V32 chan3:4; /* bits 15-12 */
- V32 chan2:4; /* bits 11-8 */
- V32 chan5:4; /* bits 23-20 */
- V32 chan4:4; /* bits 19-16 */
- V32 chan7:4; /* bits 31-28 */
- V32 chan6:4; /* bits 27-24 */
- } _be_bits;
- struct { /* byte 0 1 2 3 */
- V32 chan0:4; /* bits 0-3 */
- V32 chan1:4; /* bits 4-7 */
- V32 chan2:4; /* bits 8-11 */
- V32 chan3:4; /* bits 12-15 */
- V32 chan4:4; /* bits 16-19 */
- V32 chan5:4; /* bits 20-23 */
- V32 chan6:4; /* bits 24-27 */
- V32 chan7:4; /* bits 28-31 */
- } _le_bits;
- V8 byte[4];
- V32 word;
-} DMA_RXTX_ENABLE, DMA_RX_DELETE,
- DMA_INT_STATUS, DMA_INT_MASK,
- DMA_RX_LEVEL_STATUS, DMA_RX_LEVEL_INT_MASK;
-
-/* 1 dword */
-typedef union _tag_dma_rx_timer{
- struct {
- V32 res0:8; /* bits 32-24 */
- V32 res1:7; /* bits 23-17 */
- V32 enable:1; /* bit 16 */
- V32 value:16; /* bits 15-0 */
- } _be_s_bits;
- struct {
- /* crosses byte boundary. must use swap. */
- V32 s_value:16; /* bits 7-0,15-8 */
- V32 enable:1; /* bit 16 */
- V32 res1:7; /* bits 23-17 */
- V32 res0:8; /* bits 32-24 */
- } _be_bits;
- struct {
- V32 value:16; /* bits 0-15 */
- V32 enable:1; /* bit 16 */
- V32 res1:7; /* bits 17-23 */
- V32 res0:8; /* bits 24-32 */
- } _le_bits;
- V8 byte[4];
- V32 word;
-} DMA_RX_TIMER;
-
-/* NOTE!!!: 2 dwords */
-typedef struct _tag_dma_desc_level{
- union {
- struct {
- V32 res1:8; /* bits 31-24 */
- V32 res0:7; /* bits 23-17 */
- V32 write:1; /* bit 16 */
- V32 thresh:8; /* bits 15-8 */
- V32 level:8; /* bits 7-0 */
- } _be_s_bits;
- struct {
- V32 level:8; /* bits 7-0 */
- V32 thresh:8; /* bits 15-8 */
- V32 res0:7; /* bits 30-17 */
- V32 write:1; /* bit 16 */
- V32 res1:8; /* bits 31-24 */
- } _be_bits;
- struct {
- V32 level:8; /* bits 0-7 */
- V32 thresh:8; /* bits 8-15 */
- V32 write:1; /* bit 16 */
- V32 res0:7; /* bit 17-30 */
- V32 res1:8; /* bits 24-31 */
- } _le_bits;
- V8 byte[4];
- V32 word;
- } desc;
- V32 pad1;
-} DMA_DESC_LEVEL;
-
-typedef struct _tag_pbb_dma_reg_map {
- /* 0-15 (0x000-0x078) */
- DMA_DESCRIPTOR_RING rx_desc[8]; /* 4 dwords each, 128 bytes tot. */
-
- /* 16-31 (0x080-0x0f8) */
- DMA_DESCRIPTOR_RING tx_desc[8]; /* 4 dwords each, 128 bytes tot. */
-
- /* 32/33 (0x100/0x108) */
- V32 reserved_32;
- V32 pad_32;
- V32 reserved_33;
- V32 pad_33;
-
- /* 34 (0x110) */
- DMA_RXTX_ENABLE rxtx_enable;
- V32 pad_34;
-
- /* 35 (0x118) */
- DMA_RX_DELETE rx_delete;
- V32 pad_35;
-
- /* 36-38 (0x120-0x130) */
- DMA_INT_STATUS status;
- V32 pad_36;
- DMA_INT_STATUS last_status;
- V32 pad_37;
- DMA_INT_MASK int_mask;
- V32 pad_38;
-
- /* 39/40 (0x138/0x140) */
- union {
- /* NOTE!! 4 dwords */
- struct {
- V32 channel_3:8;
- V32 channel_2:8;
- V32 channel_1:8;
- V32 channel_0:8;
- V32 pad1;
- V32 channel_7:8;
- V32 channel_6:8;
- V32 channel_5:8;
- V32 channel_4:8;
- V32 pad3;
- } _be_s_bits;
- struct {
- V32 channel_0:8;
- V32 channel_1:8;
- V32 channel_2:8;
- V32 channel_3:8;
- V32 pad1;
- V32 channel_4:8;
- V32 channel_5:8;
- V32 channel_6:8;
- V32 channel_7:8;
- V32 pad3;
- } _be_bits, _le_bits;
- V8 byte[16];
- V32 word[4];
- } rx_size;
-
- /* 41/42 (0x148/0x150) */
- V32 reserved_41;
- V32 pad_41;
- V32 reserved_42;
- V32 pad_42;
-
- /* 43/44 (0x158/0x160) */
- DMA_RX_LEVEL_STATUS rx_level_status;
- V32 pad_43;
- DMA_RX_LEVEL_INT_MASK rx_level_int_mask;
- V32 pad_44;
-
- /* 45 (0x168) */
- DMA_RX_TIMER rx_timer;
- V32 pad_45;
-
- /* 46 (0x170) */
- V32 reserved_46;
- V32 pad_46;
-
- /* 47 (0x178) */
- V32 mbox_status;
- V32 pad_47;
-
- /* 48/49 (0x180/0x188) */
- V32 mbox_out;
- V32 pad_48;
- V32 mbox_in;
- V32 pad_49;
-
- /* 50 (0x190) */
- V32 config;
- V32 pad_50;
-
- /* 51/52 (0x198/0x1a0) */
- V32 c2a_ctr;
- V32 pad_51;
- V32 a2c_ctr;
- V32 pad_52;
-
- /* 53 (0x1a8) */
- union {
- struct {
- V32 rev_major:8; /* bits 31-24 */
- V32 rev_minor:8; /* bits 23-16 */
- V32 reserved:16; /* bits 15-0 */
- } _be_s_bits;
- struct {
- V32 s_reserved:16; /* bits 7-0, 15-8 */
- V32 rev_minor:8; /* bits 23-16 */
- V32 rev_major:8; /* bits 31-24 */
- } _be_bits;
- struct {
- V32 reserved:16; /* bits 0-15 */
- V32 rev_minor:8; /* bits 16-23 */
- V32 rev_major:8; /* bits 24-31 */
- } _le_bits;
- V8 byte[4];
- V32 word;
- } version;
- V32 pad_53;
-
- /* 54-59 (0x1b0-0x1d8) */
- V32 debug_54;
- V32 pad_54;
- V32 debug_55;
- V32 pad_55;
- V32 debug_56;
- V32 pad_56;
- V32 debug_57;
- V32 pad_57;
- V32 debug_58;
- V32 pad_58;
- V32 debug_59;
- V32 pad_59;
-
- /* 60 (0x1e0) */
- V32 timestamp;
- V32 pad_60;
-
- /* 61-63 (0x1e8-0x1f8) */
- V32 debug_61;
- V32 pad_61;
- V32 debug_62;
- V32 pad_62;
- V32 debug_63;
- V32 pad_63;
-
- /* 64-71 (0x200 - 0x238) */
- DMA_DESC_LEVEL rx_desc_level[8]; /* 2 dwords each, 32 bytes tot. */
-
- /* 72-98 (0x240 - 0x2f8) */
- /* reserved */
-
- /* 96-127 (0x300 - 0x3f8) */
- /* mirrors (0x100 - 0x1f8) */
-
-} PBB_DMA_REG_MAP;
-
-
-#endif /* ZUMA_PBB_H */
diff --git a/board/evb64260/zuma_pbb_mbox.c b/board/evb64260/zuma_pbb_mbox.c
deleted file mode 100644
index 2b9a469f8d..0000000000
--- a/board/evb64260/zuma_pbb_mbox.c
+++ /dev/null
@@ -1,187 +0,0 @@
-#include <common.h>
-#include <galileo/pci.h>
-#include <net.h>
-#include <pci.h>
-
-#include "zuma_pbb.h"
-#include "zuma_pbb_mbox.h"
-
-
-struct _zuma_mbox_dev zuma_mbox_dev;
-
-
-static int zuma_mbox_write(struct _zuma_mbox_dev *dev, unsigned int data)
-{
- unsigned int status, count = 0, i;
-
- status = (volatile int)le32_to_cpu(dev->sip->mbox_status);
-
- while((status & OUT_PENDING) && count < 1000) {
- count++;
- for(i=0;i<1000;i++);
- status = (volatile int)le32_to_cpu(dev->sip->mbox_status);
- }
- if(count < 1000) {
- /* if SET it means msg pending */
- /* printf("mbox real write %08x\n",data); */
- dev->sip->mbox_out = cpu_to_le32(data);
- return 4;
- }
-
- printf("mbox tx timeout\n");
- return 0;
-}
-
-static int zuma_mbox_read(struct _zuma_mbox_dev *dev, unsigned int *data)
-{
- unsigned int status, count = 0, i;
-
- status = (volatile int)le32_to_cpu(dev->sip->mbox_status);
-
- while(!(status & IN_VALID) && count < 1000) {
- count++;
- for(i=0;i<1000;i++);
- status = (volatile int)le32_to_cpu(dev->sip->mbox_status);
- }
- if(count < 1000) {
- /* if SET it means msg pending */
- *data=le32_to_cpu(dev->sip->mbox_in);
- /*printf("mbox real read %08x\n", *data); */
- return 4;
- }
- printf("mbox rx timeout\n");
- return 0;
-}
-
-static int zuma_mbox_do_one_mailbox(unsigned int out, unsigned int *in)
-{
- int ret;
- ret=zuma_mbox_write(&zuma_mbox_dev,out);
- /*printf("write 0x%08x (%d bytes)\n", out, ret); */
- if(ret!=4) return -1;
- ret=zuma_mbox_read(&zuma_mbox_dev,in);
- /*printf("read 0x%08x (%d bytes)\n", *in, ret); */
- if(ret!=4) return -1;
- return 0;
-}
-
-
-#define RET_IF_FAILED(x) if ((x) == -1) return -1
-
-static int zuma_mbox_do_all_mailbox(void)
-{
- unsigned int data_in;
- unsigned short sdata_in;
-
- RET_IF_FAILED(zuma_mbox_do_one_mailbox(ZUMA_MBOXMSG_START, &data_in));
-
- RET_IF_FAILED(zuma_mbox_do_one_mailbox(ZUMA_MBOXMSG_MACL, &data_in));
- memcpy(zuma_acc_mac+2,&data_in,4);
- RET_IF_FAILED(zuma_mbox_do_one_mailbox(ZUMA_MBOXMSG_MACH, &data_in));
- sdata_in=data_in&0xffff;
- memcpy(zuma_acc_mac,&sdata_in,2);
-
- RET_IF_FAILED(zuma_mbox_do_one_mailbox(ZUMA_MBOXMSG_IP, &data_in));
- zuma_ip=data_in;
-
- RET_IF_FAILED(zuma_mbox_do_one_mailbox(ZUMA_MBOXMSG_SLOT, &data_in));
- zuma_slot_bac=data_in>>3;
-
- RET_IF_FAILED(zuma_mbox_do_one_mailbox(ZUMA_MBOXMSG_BAUD, &data_in));
- zuma_console_baud = data_in & 0xffff;
- zuma_debug_baud = data_in >> 16;
-
- RET_IF_FAILED(zuma_mbox_do_one_mailbox(ZUMA_MBOXMSG_ENG_PRV_MACL, &data_in));
- memcpy(zuma_prv_mac+2,&data_in,4);
- RET_IF_FAILED(zuma_mbox_do_one_mailbox(ZUMA_MBOXMSG_ENG_PRV_MACH, &data_in));
- sdata_in=data_in&0xffff;
- memcpy(zuma_prv_mac,&sdata_in,2);
-
- RET_IF_FAILED(zuma_mbox_do_one_mailbox(ZUMA_MBOXMSG_DONE, &data_in));
-
- return 0;
-}
-
-
-static void
-zuma_mbox_dump(void)
-{
- printf("ACC MAC=%04x%08x\n",*(unsigned short *)(&zuma_acc_mac),*(unsigned int *)((char *)&zuma_acc_mac+2));
- printf("PRV MAC=%04x%08x\n",*(unsigned short *)(&zuma_prv_mac),*(unsigned int *)((char *)&zuma_prv_mac+2));
- printf("slot:bac=%d:%d\n",(zuma_slot_bac>>2)&0xf, zuma_slot_bac & 0x3);
- printf("BAUD1=%d BAUD2=%d\n",zuma_console_baud,zuma_debug_baud);
-}
-
-
-static void
-zuma_mbox_setenv(void)
-{
- char *data, buf[32];
- unsigned char save = 0;
-
- data = getenv("baudrate");
-
- if(!data || (zuma_console_baud != simple_strtoul(data, NULL, 10))) {
- sprintf(buf, "%6d", zuma_console_baud);
- setenv("baudrate", buf);
- save=1;
- printf("baudrate doesn't match from mbox\n");
- }
-
- ip_to_string(zuma_ip, buf);
- setenv("ipaddr", buf);
-
- sprintf(buf,"%02x:%02x:%02x:%02x:%02x:%02x",
- zuma_prv_mac[0],
- zuma_prv_mac[1],
- zuma_prv_mac[2],
- zuma_prv_mac[3],
- zuma_prv_mac[4],
- zuma_prv_mac[5]);
- setenv("ethaddr", buf);
-
- sprintf(buf,"%02x",zuma_slot_bac);
- setenv("bacslot", buf);
-
- if(save)
- saveenv();
-}
-
-/**
- * zuma_mbox_init:
- */
-
-int zuma_mbox_init(void)
-{
- unsigned int iobase;
- memset(&zuma_mbox_dev, 0, sizeof(struct _zuma_mbox_dev));
-
- zuma_mbox_dev.dev = pci_find_device(VENDOR_ID_ZUMA, DEVICE_ID_ZUMA_PBB, 0);
-
- if(zuma_mbox_dev.dev == -1) {
- printf("no zuma pbb\n");
- return -1;
- }
-
- pci_read_config_dword(zuma_mbox_dev.dev, PCI_BASE_ADDRESS_0, &iobase);
-
- zuma_mbox_dev.sip = (PBB_DMA_REG_MAP *) (iobase & PCI_BASE_ADDRESS_MEM_MASK);
-
- zuma_mbox_dev.sip->int_mask.word=0;
-
- printf("pbb @ %p v%d.%d, timestamp %08x\n", zuma_mbox_dev.sip,
- zuma_mbox_dev.sip->version.pci_bits.rev_major,
- zuma_mbox_dev.sip->version.pci_bits.rev_minor,
- zuma_mbox_dev.sip->timestamp);
-
- if (zuma_mbox_do_all_mailbox() == -1) {
- printf("mailbox failed.. no ACC?\n");
- return -1;
- }
-
- zuma_mbox_dump();
-
- zuma_mbox_setenv();
-
- return 0;
-}
diff --git a/board/evb64260/zuma_pbb_mbox.h b/board/evb64260/zuma_pbb_mbox.h
deleted file mode 100644
index b4a4c0cf7e..0000000000
--- a/board/evb64260/zuma_pbb_mbox.h
+++ /dev/null
@@ -1,43 +0,0 @@
-#define IN_VALID 1
-#define OUT_PENDING 2
-
-enum {
- ZUMA_MBOXMSG_DONE,
- ZUMA_MBOXMSG_MACL,
- ZUMA_MBOXMSG_MACH,
- ZUMA_MBOXMSG_IP,
- ZUMA_MBOXMSG_SLOT,
- ZUMA_MBOXMSG_RESET,
- ZUMA_MBOXMSG_BAUD,
- ZUMA_MBOXMSG_START,
- ZUMA_MBOXMSG_ENG_PRV_MACL,
- ZUMA_MBOXMSG_ENG_PRV_MACH,
-
- MBOXMSG_LAST
-};
-
-struct zuma_mailbox_info {
- unsigned char acc_mac[6];
- unsigned char prv_mac[6];
- unsigned int ip;
- unsigned int slot_bac;
- unsigned int console_baud;
- unsigned int debug_baud;
-};
-
-struct _zuma_mbox_dev {
- pci_dev_t dev;
- PBB_DMA_REG_MAP *sip;
- struct zuma_mailbox_info mailbox;
-};
-
-#define zuma_prv_mac zuma_mbox_dev.mailbox.prv_mac
-#define zuma_acc_mac zuma_mbox_dev.mailbox.acc_mac
-#define zuma_ip zuma_mbox_dev.mailbox.ip
-#define zuma_slot_bac zuma_mbox_dev.mailbox.slot_bac
-#define zuma_console_baud zuma_mbox_dev.mailbox.console_baud
-#define zuma_debug_baud zuma_mbox_dev.mailbox.debug_baud
-
-
-extern struct _zuma_mbox_dev zuma_mbox_dev;
-extern int zuma_mbox_init (void);
diff --git a/board/exbitgen/Makefile b/board/exbitgen/Makefile
deleted file mode 100644
index 34bd4b2090..0000000000
--- a/board/exbitgen/Makefile
+++ /dev/null
@@ -1,49 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o
-
-SOBJS = init.o
-
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $^
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/exbitgen/config.mk b/board/exbitgen/config.mk
deleted file mode 100644
index 42ea0c6d78..0000000000
--- a/board/exbitgen/config.mk
+++ /dev/null
@@ -1,33 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# ExbitGen board
-#
-
-LDFLAGS += $(LINKER_UNDEFS)
-
-TEXT_BASE := 0xFFF80000
-#TEXT_BASE := 0x00100000
-
-PLATFORM_RELFLAGS := $(PLATFORM_RELFLAGS)
diff --git a/board/exbitgen/exbitgen.c b/board/exbitgen/exbitgen.c
deleted file mode 100644
index 39a97225f8..0000000000
--- a/board/exbitgen/exbitgen.c
+++ /dev/null
@@ -1,117 +0,0 @@
-#include <asm/u-boot.h>
-#include <asm/processor.h>
-#include <common.h>
-#include "exbitgen.h"
-
-/* ************************************************************************ */
-int board_early_init_f (void)
-/* ------------------------------------------------------------------------ --
- * Purpose :
- * Remarks :
- * Restrictions:
- * See also :
- * Example :
- * ************************************************************************ */
-{
- unsigned long i;
-
- /*-------------------------------------------------------------------------+
- | Interrupt controller setup for the Walnut board.
- | Note: IRQ 0-15 405GP internally generated; active high; level sensitive
- | IRQ 16 405GP internally generated; active low; level sensitive
- | IRQ 17-24 RESERVED
- | IRQ 25 (EXT IRQ 0) FPGA; active high; level sensitive
- | IRQ 26 (EXT IRQ 1) SMI; active high; level sensitive
- | IRQ 27 (EXT IRQ 2) Not Used
- | IRQ 28 (EXT IRQ 3) PCI SLOT 3; active low; level sensitive
- | IRQ 29 (EXT IRQ 4) PCI SLOT 2; active low; level sensitive
- | IRQ 30 (EXT IRQ 5) PCI SLOT 1; active low; level sensitive
- | IRQ 31 (EXT IRQ 6) PCI SLOT 0; active low; level sensitive
- | Note for Walnut board:
- | An interrupt taken for the FPGA (IRQ 25) indicates that either
- | the Mouse, Keyboard, IRDA, or External Expansion caused the
- | interrupt. The FPGA must be read to determine which device
- | caused the interrupt. The default setting of the FPGA clears
- |
- +-------------------------------------------------------------------------*/
-
- mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
- mtdcr (uicer, 0x00000000); /* disable all ints */
- mtdcr (uiccr, 0x00000020); /* set all but FPGA SMI to be non-critical */
- mtdcr (uicpr, 0xFFFFFF90); /* set int polarities */
- mtdcr (uictr, 0x10000000); /* set int trigger levels */
- mtdcr (uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority */
- mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
-
- /* Perform reset of PHY connected to PPC via register in CPLD */
- out8 (PHY_CTRL_ADDR, 0x2e); /* activate nRESET,FDX,F100,ANEN, enable output */
- for (i = 0; i < 10000000; i++) {
- ;
- }
- out8 (PHY_CTRL_ADDR, 0x2f); /* deactivate nRESET */
-
- return 0;
-}
-
-
-/* ************************************************************************ */
-int checkboard (void)
-/* ------------------------------------------------------------------------ --
- * Purpose :
- * Remarks :
- * Restrictions:
- * See also :
- * Example :
- * ************************************************************************ */
-{
- printf ("Exbit H/W id: %d\n", in8 (HW_ID_ADDR));
- return (0);
-}
-
-/* ************************************************************************ */
-long int initdram (int board_type)
-/* ------------------------------------------------------------------------ --
- * Purpose : Determines size of mounted DRAM.
- * Remarks : Size is determined by reading SDRAM configuration registers as
- * set up by sdram_init.
- * Restrictions:
- * See also :
- * Example :
- * ************************************************************************ */
-{
- ulong tot_size;
- ulong bank_size;
- ulong tmp;
-
- tot_size = 0;
-
- mtdcr (memcfga, mem_mb0cf);
- tmp = mfdcr (memcfgd);
- if (tmp & 0x00000001) {
- bank_size = 0x00400000 << ((tmp >> 17) & 0x7);
- tot_size += bank_size;
- }
-
- mtdcr (memcfga, mem_mb1cf);
- tmp = mfdcr (memcfgd);
- if (tmp & 0x00000001) {
- bank_size = 0x00400000 << ((tmp >> 17) & 0x7);
- tot_size += bank_size;
- }
-
- mtdcr (memcfga, mem_mb2cf);
- tmp = mfdcr (memcfgd);
- if (tmp & 0x00000001) {
- bank_size = 0x00400000 << ((tmp >> 17) & 0x7);
- tot_size += bank_size;
- }
-
- mtdcr (memcfga, mem_mb3cf);
- tmp = mfdcr (memcfgd);
- if (tmp & 0x00000001) {
- bank_size = 0x00400000 << ((tmp >> 17) & 0x7);
- tot_size += bank_size;
- }
-
- return tot_size;
-}
diff --git a/board/exbitgen/exbitgen.h b/board/exbitgen/exbitgen.h
deleted file mode 100644
index 058ad48ea2..0000000000
--- a/board/exbitgen/exbitgen.h
+++ /dev/null
@@ -1,52 +0,0 @@
-/*
- * (C) Copyright 2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#define GPIO_CPU_LED GPIO_3
-
-
-#define CPLD_BASE 0x10000000 /* t.b.m. */
-#define DEBUG_LEDS_ADDR CPLD_BASE + 0x01
-#define HW_ID_ADDR CPLD_BASE + 0x02
-#define DIP_SWITCH_ADDR CPLD_BASE + 0x04
-#define PHY_CTRL_ADDR CPLD_BASE + 0x05
-#define SPI_OUT_ADDR CPLD_BASE + 0x07
-#define SPI_IN_ADDR CPLD_BASE + 0x08
-#define MDIO_OUT_ADDR CPLD_BASE + 0x09
-#define MDIO_IN_ADDR CPLD_BASE + 0x0A
-#define MISC_OUT_ADDR CPLD_BASE + 0x0B
-
-/* Addresses used on I2C bus */
-#define LM75_CHIP_ADDR 0x9C
-#define LM75_CPU_ADDR 0x9E
-#define SDRAM_SPD_ADDR 0xA0
-
-#define SDRAM_SPD_WRITE_ADDRESS (SDRAM_SPD_ADDR)
-#define SDRAM_SPD_READ_ADDRESS (SDRAM_SPD_ADDR+1)
-
-#ifndef FALSE
-#define FALSE 0
-#endif
-
-#ifndef TRUE
-#define TRUE 1
-#endif
diff --git a/board/exbitgen/flash.c b/board/exbitgen/flash.c
deleted file mode 100644
index ae88994b2c..0000000000
--- a/board/exbitgen/flash.c
+++ /dev/null
@@ -1,597 +0,0 @@
-/*
- * (C) Copyright 2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * Modified 4/5/2001
- * Wait for completion of each sector erase command issued
- * 4/5/2001
- * Chris Hallinan - DS4.COM, Inc. - clh@net1plus.com
- */
-
-#include <asm/u-boot.h>
-#include <asm/processor.h>
-#include <ppc4xx.h>
-#include <common.h>
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (vu_long *addr, flash_info_t *info);
-static int write_word (flash_info_t *info, ulong dest, ulong data);
-
-#ifdef MEIGSBOARD_ONBOARD_FLASH /* onboard = 2MB */
-# ifdef CONFIG_EXBITGEN
-# define FLASH_WORD_SIZE unsigned long
-# endif
-#else /* Meigsboard socket flash = 512KB */
-# ifdef CONFIG_EXBITGEN
-# define FLASH_WORD_SIZE unsigned char
-# endif
-#endif
-
-#ifdef CONFIG_EXBITGEN
-#define ADDR0 0x5555
-#define ADDR1 0x2aaa
-#define FLASH_WORD_SIZE unsigned char
-#endif
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- unsigned long bank_size;
- unsigned long tot_size;
- unsigned long bank_addr;
- int i;
-
- /* Init: no FLASHes known */
- for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- flash_info[i].size = 0;
- }
-
- tot_size = 0;
-
- /* Detect Boot Flash */
- bank_addr = CFG_FLASH0_BASE;
- bank_size = flash_get_size((vu_long *)bank_addr, &flash_info[0]);
- if (bank_size > 0) {
- (void)flash_protect(FLAG_PROTECT_CLEAR,
- bank_addr,
- bank_addr + bank_size - 1,
- &flash_info[0]);
- }
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Boot Flash Bank\n");
- }
- flash_info[0].size = bank_size;
- tot_size += bank_size;
-
- /* Detect Application Flash */
- bank_addr = CFG_FLASH1_BASE;
- for (i = 1; i < CFG_MAX_FLASH_BANKS; ++i) {
- bank_size = flash_get_size((vu_long *)bank_addr, &flash_info[i]);
- if (flash_info[i].flash_id == FLASH_UNKNOWN) {
- break;
- }
- if (bank_size > 0) {
- (void)flash_protect(FLAG_PROTECT_CLEAR,
- bank_addr,
- bank_addr + bank_size - 1,
- &flash_info[i]);
- }
- flash_info[i].size = bank_size;
- tot_size += bank_size;
- bank_addr += bank_size;
- }
- if (flash_info[1].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Application Flash Bank\n");
- }
-
- /* Protect monitor and environment sectors */
-#if CFG_MONITOR_BASE >= CFG_FLASH0_BASE
- flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE + monitor_flash_len - 1,
- &flash_info[0]);
-#if 0xfffffffc >= CFG_FLASH0_BASE
-#if 0xfffffffc <= CFG_FLASH0_BASE + CFG_FLASH0_SIZE - 1
- flash_protect(FLAG_PROTECT_SET,
- 0xfffffffc, 0xffffffff,
- &flash_info[0]);
-#endif
-#endif
-#endif
-
-#if (CFG_ENV_IS_IN_FLASH == 1) && defined(CFG_ENV_ADDR)
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1,
- &flash_info[0]);
-#endif
-
- return tot_size;
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD: printf ("AMD "); break;
- case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
- case FLASH_MAN_SST: printf ("SST "); break;
- default: printf ("Unknown Vendor "); break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM040: printf ("AM29F040 (512 Kbit, uniform sector size)\n");
- break;
- case FLASH_AM400B: printf ("AM29LV400B (4 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM400T: printf ("AM29LV400T (4 Mbit, top boot sector)\n");
- break;
- case FLASH_AM800B: printf ("AM29LV800B (8 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM800T: printf ("AM29LV800T (8 Mbit, top boot sector)\n");
- break;
- case FLASH_AM160B: printf ("AM29LV160B (16 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM160T: printf ("AM29LV160T (16 Mbit, top boot sector)\n");
- break;
- case FLASH_AM320B: printf ("AM29LV320B (32 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM320T: printf ("AM29LV320T (32 Mbit, top boot sector)\n");
- break;
- case FLASH_AMDLV033C: printf ("AM29LV033C (32 Mbit, uniform sector size)\n");
- break;
- case FLASH_AMDLV065D: printf ("AM29LV065D (64 Mbit, uniform sector size)\n");
- break;
- case FLASH_SST800A: printf ("SST39LF/VF800 (8 Mbit, uniform sector size)\n");
- break;
- case FLASH_SST160A: printf ("SST39LF/VF160 (16 Mbit, uniform sector size)\n");
- break;
- case FLASH_SST040: printf ("SST39LF/VF040 (4 Mbit, uniform sector size)\n");
- break;
- default: printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld KB in %d Sectors\n",
- info->size >> 10, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " "
- );
- }
- printf ("\n");
-}
-
-/*-----------------------------------------------------------------------
- */
-
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-static ulong flash_get_size (vu_long *addr, flash_info_t *info)
-{
- short i;
- FLASH_WORD_SIZE value;
- ulong base = (ulong)addr;
- volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *)addr;
-
- /* Write auto select command: read Manufacturer ID */
- addr2[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
- addr2[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
- addr2[ADDR0] = (FLASH_WORD_SIZE)0x00900090;
-
- value = addr2[0];
-
- switch (value) {
- case (FLASH_WORD_SIZE)AMD_MANUFACT:
- info->flash_id = FLASH_MAN_AMD;
- break;
- case (FLASH_WORD_SIZE)FUJ_MANUFACT:
- info->flash_id = FLASH_MAN_FUJ;
- break;
- case (FLASH_WORD_SIZE)SST_MANUFACT:
- info->flash_id = FLASH_MAN_SST;
- break;
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- return (0); /* no or unknown flash */
- }
-
- value = addr2[1]; /* device ID */
-
- switch (value) {
- case (FLASH_WORD_SIZE)AMD_ID_F040B:
- info->flash_id += FLASH_AM040;
- info->sector_count = 8;
- info->size = 0x0080000; /* => 512 ko */
- break;
- case (FLASH_WORD_SIZE)AMD_ID_LV400T:
- info->flash_id += FLASH_AM400T;
- info->sector_count = 11;
- info->size = 0x00080000;
- break; /* => 0.5 MB */
-
- case (FLASH_WORD_SIZE)AMD_ID_LV400B:
- info->flash_id += FLASH_AM400B;
- info->sector_count = 11;
- info->size = 0x00080000;
- break; /* => 0.5 MB */
-
- case (FLASH_WORD_SIZE)AMD_ID_LV800T:
- info->flash_id += FLASH_AM800T;
- info->sector_count = 19;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case (FLASH_WORD_SIZE)AMD_ID_LV800B:
- info->flash_id += FLASH_AM800B;
- info->sector_count = 19;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case (FLASH_WORD_SIZE)AMD_ID_LV160T:
- info->flash_id += FLASH_AM160T;
- info->sector_count = 35;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case (FLASH_WORD_SIZE)AMD_ID_LV160B:
- info->flash_id += FLASH_AM160B;
- info->sector_count = 35;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case (FLASH_WORD_SIZE)AMD_ID_LV033C:
- info->flash_id += FLASH_AMDLV033C;
- info->sector_count = 64;
- info->size = 0x00400000;
- break; /* => 4 MB */
-
- case (FLASH_WORD_SIZE)AMD_ID_LV065D:
- info->flash_id += FLASH_AMDLV065D;
- info->sector_count = 128;
- info->size = 0x00800000;
- break; /* => 8 MB */
-
- case (FLASH_WORD_SIZE)AMD_ID_LV320T:
- info->flash_id += FLASH_AM320T;
- info->sector_count = 67;
- info->size = 0x00400000;
- break; /* => 4 MB */
-
- case (FLASH_WORD_SIZE)AMD_ID_LV320B:
- info->flash_id += FLASH_AM320B;
- info->sector_count = 67;
- info->size = 0x00400000;
- break; /* => 4 MB */
-
- case (FLASH_WORD_SIZE)SST_ID_xF800A:
- info->flash_id += FLASH_SST800A;
- info->sector_count = 16;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case (FLASH_WORD_SIZE)SST_ID_xF160A:
- info->flash_id += FLASH_SST160A;
- info->sector_count = 32;
- info->size = 0x00200000;
- break; /* => 2 MB */
- case (FLASH_WORD_SIZE)SST_ID_xF040:
- info->flash_id += FLASH_SST040;
- info->sector_count = 128;
- info->size = 0x00080000;
- break; /* => 512KB */
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- return (0); /* => no or unknown flash */
-
- }
-
- /* set up sector start address table */
- if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) ||
- (info->flash_id == FLASH_AM040) ||
- (info->flash_id == FLASH_AMDLV033C) ||
- (info->flash_id == FLASH_AMDLV065D)) {
- ulong sectsize = info->size / info->sector_count;
- for (i = 0; i < info->sector_count; i++)
- info->start[i] = base + (i * sectsize);
- } else {
- if (info->flash_id & FLASH_BTYPE) {
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00004000;
- info->start[2] = base + 0x00006000;
- info->start[3] = base + 0x00008000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00010000) - 0x00030000;
- }
- } else {
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- info->start[i--] = base + info->size - 0x00004000;
- info->start[i--] = base + info->size - 0x00006000;
- info->start[i--] = base + info->size - 0x00008000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00010000;
- }
- }
- }
-
- /* check for protected sectors */
- for (i = 0; i < info->sector_count; i++) {
- /* read sector protection at sector address, (A7 .. A0) = 0x02 */
- /* D0 = 1 if protected */
-
- addr2 = (volatile FLASH_WORD_SIZE *)(info->start[i]);
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST)
- info->protect[i] = 0;
- else
- info->protect[i] = addr2[2] & 1;
- }
-
- /* switch to the read mode */
- if (info->flash_id != FLASH_UNKNOWN) {
- addr2 = (FLASH_WORD_SIZE *)info->start[0];
- *addr2 = (FLASH_WORD_SIZE)0x00F000F0; /* reset bank */
- }
-
- return (info->size);
-}
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[0]);
- volatile FLASH_WORD_SIZE *addr2;
- int flag, prot, sect;
- ulong start, now, last;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("Can't erase unknown flash type - aborted\n");
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- start = get_timer (0);
- last = start;
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr2 = (FLASH_WORD_SIZE *)(info->start[sect]);
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
- addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
- addr[ADDR0] = (FLASH_WORD_SIZE)0x00800080;
- addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
- addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
- addr2[0] = (FLASH_WORD_SIZE)0x00300030;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- while ((addr2[0] & 0x00800080) !=
- (FLASH_WORD_SIZE) 0x00800080) {
- if ((now=get_timer(start)) >
- CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- addr[0] = (FLASH_WORD_SIZE)0x00F000F0;
- return 1;
- }
-
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- }
-
- addr[0] = (FLASH_WORD_SIZE)0x00F000F0;
- }
- }
-
- printf (" done\n");
-
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int i, l, rc;
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
- for (; i<4 && cnt>0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = 0;
- for (i=0; i<4; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- return (write_word(info, wp, data));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word (flash_info_t *info, ulong dest, ulong data)
-{
- volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *)(info->start[0]);
- volatile FLASH_WORD_SIZE *dest2 = (FLASH_WORD_SIZE *)dest;
- volatile FLASH_WORD_SIZE *data2 = (FLASH_WORD_SIZE *)&data;
- ulong start;
- int flag;
- int i;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*((volatile ulong *)dest) & data) != data) {
- printf("dest = %08lx, *dest = %08lx, data = %08lx\n",
- dest, *(volatile ulong *)dest, data);
- return 2;
- }
-
- for (i=0; i < 4/sizeof(FLASH_WORD_SIZE); i++) {
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr2[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
- addr2[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
- addr2[ADDR0] = (FLASH_WORD_SIZE)0x00A000A0;
- dest2[i] = data2[i];
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* data polling for D7 */
- start = get_timer (0);
- while ((dest2[i] & 0x00800080) != (data2[i] & 0x00800080)) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- addr2[0] = (FLASH_WORD_SIZE)0x00F000F0;
- return (1);
- }
- }
- }
-
- addr2[0] = (FLASH_WORD_SIZE)0x00F000F0;
-
- return (0);
-}
-
-/*-----------------------------------------------------------------------
- */
diff --git a/board/exbitgen/init.S b/board/exbitgen/init.S
deleted file mode 100644
index 0e6cd04ba8..0000000000
--- a/board/exbitgen/init.S
+++ /dev/null
@@ -1,1009 +0,0 @@
-/*----------------------------------------------------------------------+
- *
- * This source code has been made available to you by IBM on an AS-IS
- * basis. Anyone receiving this source is licensed under IBM
- * copyrights to use it in any way he or she deems fit, including
- * copying it, modifying it, compiling it, and redistributing it either
- * with or without modifications. No license under IBM patents or
- * patent applications is to be implied by the copyright license.
- *
- * Any user of this software should understand that IBM cannot provide
- * technical support for this software and will not be responsible for
- * any consequences resulting from the use of this software.
- *
- * Any person who transfers this source code or any derivative work
- * must include the IBM copyright notice, this paragraph, and the
- * preceding two paragraphs in the transferred software.
- *
- * COPYRIGHT I B M CORPORATION 1995
- * LICENSED MATERIAL - PROGRAM PROPERTY OF I B M
- *-----------------------------------------------------------------------
- */
-
-#include <config.h>
-#include <ppc4xx.h>
-#include "config.h"
-
-#define _LINUX_CONFIG_H 1 /* avoid reading Linux autoconf.h file */
-#define FPGA_BRDC 0xF0300004
-
-#include <ppc_asm.tmpl>
-#include <ppc_defs.h>
-
-#include <asm/cache.h>
-#include <asm/mmu.h>
-
-#include "exbitgen.h"
-
-/* IIC declarations (This is an extract from 405gp_i2c.h, which also contains some */
-/* c-code declarations and consequently can't be included here). */
-/* (Possibly to be solved somehow else). */
-/*--------------------------------------------------------------------- */
-#define I2C_REGISTERS_BASE_ADDRESS 0xEF600500
-#define IIC_MDBUF (I2C_REGISTERS_BASE_ADDRESS+IICMDBUF)
-#define IIC_SDBUF (I2C_REGISTERS_BASE_ADDRESS+IICSDBUF)
-#define IIC_LMADR (I2C_REGISTERS_BASE_ADDRESS+IICLMADR)
-#define IIC_HMADR (I2C_REGISTERS_BASE_ADDRESS+IICHMADR)
-#define IIC_CNTL (I2C_REGISTERS_BASE_ADDRESS+IICCNTL)
-#define IIC_MDCNTL (I2C_REGISTERS_BASE_ADDRESS+IICMDCNTL)
-#define IIC_STS (I2C_REGISTERS_BASE_ADDRESS+IICSTS)
-#define IIC_EXTSTS (I2C_REGISTERS_BASE_ADDRESS+IICEXTSTS)
-#define IIC_LSADR (I2C_REGISTERS_BASE_ADDRESS+IICLSADR)
-#define IIC_HSADR (I2C_REGISTERS_BASE_ADDRESS+IICHSADR)
-#define IIC_CLKDIV (I2C_REGISTERS_BASE_ADDRESS+IICCLKDIV)
-#define IIC_INTRMSK (I2C_REGISTERS_BASE_ADDRESS+IICINTRMSK)
-#define IIC_XFRCNT (I2C_REGISTERS_BASE_ADDRESS+IICXFRCNT)
-#define IIC_XTCNTLSS (I2C_REGISTERS_BASE_ADDRESS+IICXTCNTLSS)
-#define IIC_DIRECTCNTL (I2C_REGISTERS_BASE_ADDRESS+IICDIRECTCNTL)
-
-/* MDCNTL Register Bit definition */
-#define IIC_MDCNTL_HSCL 0x01
-#define IIC_MDCNTL_EUBS 0x02
-#define IIC_MDCNTL_FMDB 0x40
-#define IIC_MDCNTL_FSDB 0x80
-
-/* CNTL Register Bit definition */
-#define IIC_CNTL_PT 0x01
-#define IIC_CNTL_READ 0x02
-#define IIC_CNTL_CHT 0x04
-
-/* STS Register Bit definition */
-#define IIC_STS_PT 0X01
-#define IIC_STS_ERR 0X04
-#define IIC_STS_MDBS 0X20
-
-/* EXTSTS Register Bit definition */
-#define IIC_EXTSTS_XFRA 0X01
-#define IIC_EXTSTS_ICT 0X02
-#define IIC_EXTSTS_LA 0X04
-
-/* LED codes used for inditing progress and errors during read of DIMM SPD. */
-/*--------------------------------------------------------------------- */
-#define LED_SDRAM_CODE_1 0xef
-#define LED_SDRAM_CODE_2 0xee
-#define LED_SDRAM_CODE_3 0xed
-#define LED_SDRAM_CODE_4 0xec
-#define LED_SDRAM_CODE_5 0xeb
-#define LED_SDRAM_CODE_6 0xea
-#define LED_SDRAM_CODE_7 0xe9
-#define LED_SDRAM_CODE_8 0xe8
-#define LED_SDRAM_CODE_9 0xe7
-#define LED_SDRAM_CODE_10 0xe6
-#define LED_SDRAM_CODE_11 0xe5
-#define LED_SDRAM_CODE_12 0xe4
-#define LED_SDRAM_CODE_13 0xe3
-#define LED_SDRAM_CODE_14 0xe2
-#define LED_SDRAM_CODE_15 0xe1
-#define LED_SDRAM_CODE_16 0xe0
-
-
-#define TIMEBASE_10PS (1000000000 / CONFIG_SYS_CLK_FREQ) * 100
-
-#define FLASH_8bit_AP 0x9B015480
-#define FLASH_8bit_CR 0xFFF18000 /* 1MB(min), 8bit, R/W */
-
-#define FLASH_32bit_AP 0x9B015480
-#define FLASH_32bit_CR 0xFFE3C000 /* 2MB, 32bit, R/W */
-
-
-#define WDCR_EBC(reg,val) addi r4,0,reg;\
- mtdcr ebccfga,r4;\
- addis r4,0,val@h;\
- ori r4,r4,val@l;\
- mtdcr ebccfgd,r4
-
-/*---------------------------------------------------------------------
- * Function: ext_bus_cntlr_init
- * Description: Initializes the External Bus Controller for the external
- * peripherals. IMPORTANT: For pass1 this code must run from
- * cache since you can not reliably change a peripheral banks
- * timing register (pbxap) while running code from that bank.
- * For ex., since we are running from ROM on bank 0, we can NOT
- * execute the code that modifies bank 0 timings from ROM, so
- * we run it from cache.
- * Bank 0 - Boot flash
- * Bank 1-4 - application flash
- * Bank 5 - CPLD
- * Bank 6 - not used
- * Bank 7 - Heathrow chip
- *---------------------------------------------------------------------
- */
- .globl ext_bus_cntlr_init
-ext_bus_cntlr_init:
- mflr r4 /* save link register */
- bl ..getAddr
-..getAddr:
- mflr r3 /* get address of ..getAddr */
- mtlr r4 /* restore link register */
- addi r4,0,14 /* set ctr to 10; used to prefetch */
- mtctr r4 /* 10 cache lines to fit this function */
- /* in cache (gives us 8x10=80 instrctns) */
-..ebcloop:
- icbt r0,r3 /* prefetch cache line for addr in r3 */
- addi r3,r3,32 /* move to next cache line */
- bdnz ..ebcloop /* continue for 10 cache lines */
-
- mflr r31 /* save link register */
-
- /*-----------------------------------------------------------
- * Delay to ensure all accesses to ROM are complete before changing
- * bank 0 timings. 200usec should be enough.
- * 200,000,000 (cycles/sec) X .000200 (sec) = 0x9C40 cycles
- *-----------------------------------------------------------
- */
-
- addis r3,0,0x0
- ori r3,r3,0xA000 /* ensure 200usec have passed since reset */
- mtctr r3
-..spinlp:
- bdnz ..spinlp /* spin loop */
-
- /*---------------------------------------------------------------
- * Memory Bank 0 (Boot Flash) initialization
- *---------------------------------------------------------------
- */
- WDCR_EBC(pb0ap, FLASH_32bit_AP)
- WDCR_EBC(pb0cr, 0xffe38000)
-/*pnc WDCR_EBC(pb0cr, FLASH_32bit_CR) */
-
- /*---------------------------------------------------------------
- * Memory Bank 5 (CPLD) initialization
- *---------------------------------------------------------------
- */
- WDCR_EBC(pb5ap, 0x01010040)
-/*jsa recommendation: WDCR_EBC(pb5ap, 0x00010040) */
- WDCR_EBC(pb5cr, 0x10038000)
-
- /*--------------------------------------------------------------- */
- /* Memory Bank 6 (not used) initialization */
- /*--------------------------------------------------------------- */
- WDCR_EBC(pb6cr, 0x00000000)
-
- /* Read HW ID to determine whether old H2 board or new generic CPU board */
- addis r3, 0, HW_ID_ADDR@h
- ori r3, r3, HW_ID_ADDR@l
- lbz r3,0x0000(r3)
- cmpi 0, r3, 1 /* if (HW_ID==1) */
- beq setup_h2evalboard /* then jump */
- cmpi 0, r3, 2 /* if (HW_ID==2) */
- beq setup_genieboard /* then jump */
- cmpi 0, r3, 3 /* if (HW_ID==3) */
- beq setup_genieboard /* then jump */
-
-setup_genieboard:
- /*--------------------------------------------------------------- */
- /* Memory Bank 1 (Application Flash) initialization for generic CPU board */
- /*--------------------------------------------------------------- */
-/* WDCR_EBC(pb1ap, 0x7b015480) /###* T.B.M. */
-/* WDCR_EBC(pb1ap, 0x7F8FFE80) /###* T.B.M. */
- WDCR_EBC(pb1ap, 0x9b015480) /* hlb-20020207: burst 8 bit 6 cycles */
-
-/* WDCR_EBC(pb1cr, 0x20098000) /###* 16 MB */
- WDCR_EBC(pb1cr, 0x200B8000) /* 32 MB */
-
- /*--------------------------------------------------------------- */
- /* Memory Bank 4 (Onboard FPGA) initialization for generic CPU board */
- /*--------------------------------------------------------------- */
- WDCR_EBC(pb4ap, 0x01010000) /* */
- WDCR_EBC(pb4cr, 0x1021c000) /* */
-
- /*--------------------------------------------------------------- */
- /* Memory Bank 7 (Heathrow chip on Reference board) initialization */
- /*--------------------------------------------------------------- */
- WDCR_EBC(pb7ap, 0x200ffe80) /* No Ready, many wait states (let reflections die out) */
- WDCR_EBC(pb7cr, 0X4001A000)
-
- bl setup_continue
-
-
-setup_h2evalboard:
- /*--------------------------------------------------------------- */
- /* Memory Bank 1 (Application Flash) initialization */
- /*--------------------------------------------------------------- */
- WDCR_EBC(pb1ap, 0x7b015480) /* T.B.M. */
-/*3010 WDCR_EBC(pb1ap, 0x7F8FFE80) /###* T.B.M. */
- WDCR_EBC(pb1cr, 0x20058000)
-
- /*--------------------------------------------------------------- */
- /* Memory Bank 2 (Application Flash) initialization */
- /*--------------------------------------------------------------- */
- WDCR_EBC(pb2ap, 0x7b015480) /* T.B.M. */
-/*3010 WDCR_EBC(pb2ap, 0x7F8FFE80) /###* T.B.M. */
- WDCR_EBC(pb2cr, 0x20458000)
-
- /*--------------------------------------------------------------- */
- /* Memory Bank 3 (Application Flash) initialization */
- /*--------------------------------------------------------------- */
- WDCR_EBC(pb3ap, 0x7b015480) /* T.B.M. */
-/*3010 WDCR_EBC(pb3ap, 0x7F8FFE80) /###* T.B.M. */
- WDCR_EBC(pb3cr, 0x20858000)
-
- /*--------------------------------------------------------------- */
- /* Memory Bank 4 (Application Flash) initialization */
- /*--------------------------------------------------------------- */
- WDCR_EBC(pb4ap, 0x7b015480) /* T.B.M. */
-/*3010 WDCR_EBC(pb4ap, 0x7F8FFE80) /###* T.B.M. */
- WDCR_EBC(pb4cr, 0x20C58000)
-
- /*--------------------------------------------------------------- */
- /* Memory Bank 7 (Heathrow chip) initialization */
- /*--------------------------------------------------------------- */
- WDCR_EBC(pb7ap, 0x02000280) /* No Ready, 4 wait states */
- WDCR_EBC(pb7cr, 0X4001A000)
-
-setup_continue:
-
-
- mtlr r31 /* restore lr */
- nop /* pass2 DCR errata #8 */
- blr
-
-/*--------------------------------------------------------------------- */
-/* Function: sdram_init */
-/* Description: Configures SDRAM memory banks. */
-/*--------------------------------------------------------------------- */
- .globl sdram_init
-
-sdram_init:
-#if CFG_MONITOR_BASE < CFG_FLASH_BASE
- blr
-#else
- mflr r31
-
- /* output SDRAM code on LEDs */
- addi r4, 0, LED_SDRAM_CODE_1
- addis r5, 0, 0x1000
- ori r5, r5, 0x0001
- stb r4,0(r5)
- eieio
-
- /* Read contents of spd */
- /*--------------------- */
- bl read_spd
-
- /*----------------------------------------------------------- */
- /* */
- /* */
- /* Update SDRAM timing register */
- /* */
- /* */
- /*----------------------------------------------------------- */
-
- /* Read PLL feedback divider and calculate clock period of local bus in */
- /* granularity of 10 ps. Save clock period in r30 */
- /*-------------------------------------------------------------- */
- mfdcr r4, pllmd
- addi r9, 0, 25
- srw r4, r4, r9
- andi. r4, r4, 0x07
- addis r5, 0, TIMEBASE_10PS@h
- ori r5, r5, TIMEBASE_10PS@l
- divwu r30, r5, r4
-
- /* Determine CASL */
- /*--------------- */
- bl find_casl /* Returns CASL in r3 */
-
- /* Calc trp_clocks = (trp * 100 + (clk - 1)) / clk */
- /* (trp read from byte 27 in granularity of 1 ns) */
- /*------------------------------------------------ */
- mulli r16, r16, 100
- add r16, r16, r30
- addi r6, 0, 1
- subf r16, r6, r16
- divwu r16, r16, r30
-
- /* Calc trcd_clocks = (trcd * 100 + (clk - 1) ) / clk */
- /* (trcd read from byte 29 in granularity of 1 ns) */
- /*--------------------------------------------------- */
- mulli r17, r17, 100
- add r17, r17, r30
- addi r6, 0, 1
- subf r17, r6, r17
- divwu r17, r17, r30
-
- /* Calc tras_clocks = (tras * 100 + (clk - 1) ) / clk */
- /* (tras read from byte 30 in granularity of 1 ns) */
- /*--------------------------------------------------- */
- mulli r18, r18, 100
- add r18, r18, r30
- addi r6, 0, 1
- subf r18, r6, r18
- divwu r18, r18, r30
-
- /* Calc trc_clocks = trp_clocks + tras_clocks */
- /*------------------------------------------- */
- add r18, r18, r16
-
- /* CASL value */
- /*----------- */
- addi r9, 0, 23
- slw r4, r3, r9
-
- /* PTA = trp_clocks - 1 */
- /*--------------------- */
- addi r6, 0, 1
- subf r5, r6, r16
- addi r9, 0, 18
- slw r5, r5, r9
- or r4, r4, r5
-
- /* CTP = trc_clocks - trp_clocks - trcd_clocks - 1 */
- /*------------------------------------------------ */
- addi r5, r18, 0
- subf r5, r16, r5
- subf r5, r17, r5
- addi r6, 0, 1
- subf r5, r6, r5
- addi r9, 0, 16
- slw r5, r5, r9
- or r4, r4, r5
-
- /* LDF = 1 */
- /*-------- */
- ori r4, r4, 0x4000
-
- /* RFTA = trc_clocks - 4 */
- /*---------------------- */
- addi r6, 0, 4
- subf r5, r6, r18
- addi r9, 0, 2
- slw r5, r5, r9
- or r4, r4, r5
-
- /* RCD = trcd_clocks - 1 */
- /*---------------------- */
- addi r6, 0, 1
- subf r5, r6, r17
- or r4, r4, r5
-
- /*----------------------------------------------------------- */
- /* Set SDTR1 */
- /*----------------------------------------------------------- */
- addi r5,0,mem_sdtr1
- mtdcr memcfga,r5
- mtdcr memcfgd,r4
-
- /*----------------------------------------------------------- */
- /* */
- /* */
- /* Update memory bank 0-3 configuration registers */
- /* */
- /* */
- /*----------------------------------------------------------- */
-
- /* Build contents of configuration register for bank 0 into r6 */
- /*------------------------------------------------------------ */
- bl find_mode /* returns addressing mode in r3 */
- addi r29, r3, 0 /* save mode temporarily in r29 */
- bl find_size_code /* returns size code in r3 */
- addi r9, 0, 17 /* bit offset of size code in configuration register */
- slw r3, r3, r9 /* */
- addi r9, 0, 13 /* bit offset of addressing mode in configuration register */
- slw r29, r29, r9 /* */
- or r3, r29, r3 /* merge size code and addressing mode */
- ori r6, r3, CFG_SDRAM_BASE + 1 /* insert base address and enable bank */
-
- /* Calculate banksize r15 = (density << 22) / 2 */
- /*--------------------------------------------- */
- addi r9, 0, 21
- slw r15, r15, r9
-
- /* Set SDRAM bank 0 register and adjust r6 for next bank */
- /*------------------------------------------------------ */
- addi r7,0,mem_mb0cf
- mtdcr memcfga,r7
- mtdcr memcfgd,r6
-
- add r6, r6, r15 /* add bank size to base address for next bank */
-
- /* If two rows/banks then set SDRAM bank 1 register and adjust r6 for next bank */
- /*---------------------------------------------------------------------------- */
- cmpi 0, r12, 2
- bne b1skip
-
- addi r7,0,mem_mb1cf
- mtdcr memcfga,r7
- mtdcr memcfgd,r6
-
- add r6, r6, r15 /* add bank size to base address for next bank */
-
- /* Set SDRAM bank 2 register and adjust r6 for next bank */
- /*------------------------------------------------------ */
-b1skip: addi r7,0,mem_mb2cf
- mtdcr memcfga,r7
- mtdcr memcfgd,r6
-
- add r6, r6, r15 /* add bank size to base address for next bank */
-
- /* If two rows/banks then set SDRAM bank 3 register */
- /*------------------------------------------------ */
- cmpi 0, r12, 2
- bne b3skip
-
- addi r7,0,mem_mb3cf
- mtdcr memcfga,r7
- mtdcr memcfgd,r6
-b3skip:
-
- /*----------------------------------------------------------- */
- /* Set RTR */
- /*----------------------------------------------------------- */
- cmpi 0, r30, 1600
- bge rtr_1
- addis r7, 0, 0x05F0 /* RTR value for 100Mhz */
- bl rtr_2
-rtr_1: addis r7, 0, 0x03F8
-rtr_2: addi r4,0,mem_rtr
- mtdcr memcfga,r4
- mtdcr memcfgd,r7
-
- /*----------------------------------------------------------- */
- /* Delay to ensure 200usec have elapsed since reset. Assume worst */
- /* case that the core is running 200Mhz: */
- /* 200,000,000 (cycles/sec) X .000200 (sec) = 0x9C40 cycles */
- /*----------------------------------------------------------- */
- addis r3,0,0x0000
- ori r3,r3,0xA000 /* ensure 200usec have passed since reset */
- mtctr r3
-..spinlp2:
- bdnz ..spinlp2 /* spin loop */
-
- /*----------------------------------------------------------- */
- /* Set memory controller options reg, MCOPT1. */
- /* Set DC_EN to '1' and BRD_PRF to '01' for 16 byte PLB Burst */
- /* read/prefetch. */
- /*----------------------------------------------------------- */
- addi r4,0,mem_mcopt1
- mtdcr memcfga,r4
- addis r4,0,0x80C0 /* set DC_EN=1 */
- ori r4,r4,0x0000
- mtdcr memcfgd,r4
-
-
- /*----------------------------------------------------------- */
- /* Delay to ensure 10msec have elapsed since reset. This is */
- /* required for the MPC952 to stabalize. Assume worst */
- /* case that the core is running 200Mhz: */
- /* 200,000,000 (cycles/sec) X .010 (sec) = 0x1E8480 cycles */
- /* This delay should occur before accessing SDRAM. */
- /*----------------------------------------------------------- */
- addis r3,0,0x001E
- ori r3,r3,0x8480 /* ensure 10msec have passed since reset */
- mtctr r3
-..spinlp3:
- bdnz ..spinlp3 /* spin loop */
-
- /* output SDRAM code on LEDs */
- addi r4, 0, LED_SDRAM_CODE_16
- addis r5, 0, 0x1000
- ori r5, r5, 0x0001
- stb r4,0(r5)
- eieio
-
- mtlr r31 /* restore lr */
- blr
-
-/*--------------------------------------------------------------------- */
-/* Function: read_spd */
-/* Description: Reads contents of SPD and saves parameters to be used for */
-/* configuration in dedicated registers (see code below). */
-/*--------------------------------------------------------------------- */
-
-#define WRITE_I2C(reg,val) \
- addi r3,0,val;\
- addis r4, 0, 0xef60;\
- ori r4, r4, 0x0500 + reg;\
- stb r3, 0(r4);\
- eieio
-
-#define READ_I2C(reg) \
- addis r3, 0, 0xef60;\
- ori r3, r3, 0x0500 + reg;\
- lbz r3, 0x0000(r3);\
- eieio
-
-read_spd:
-
- mflr r5
-
- /* Initialize i2c */
- /*--------------- */
- WRITE_I2C(IICLMADR, 0x00) /* clear lo master address */
- WRITE_I2C(IICHMADR, 0x00) /* clear hi master address */
- WRITE_I2C(IICLSADR, 0x00) /* clear lo slave address */
- WRITE_I2C(IICHSADR, 0x00) /* clear hi slave address */
- WRITE_I2C(IICSTS, 0x08) /* update status register */
- WRITE_I2C(IICEXTSTS, 0x8f)
- WRITE_I2C(IICCLKDIV, 0x05)
- WRITE_I2C(IICINTRMSK, 0x00) /* no interrupts */
- WRITE_I2C(IICXFRCNT, 0x00) /* clear transfer count */
- WRITE_I2C(IICXTCNTLSS, 0xf0) /* clear extended control & stat */
- WRITE_I2C(IICMDCNTL, IIC_MDCNTL_FSDB | IIC_MDCNTL_FMDB) /* mode control */
- READ_I2C(IICMDCNTL)
- ori r3, r3, IIC_MDCNTL_EUBS | IIC_MDCNTL_HSCL
- WRITE_I2C(IICMDCNTL, r3) /* mode control */
- WRITE_I2C(IICCNTL, 0x00) /* clear control reg */
-
- /* Wait until initialization completed */
- /*------------------------------------ */
- bl wait_i2c_transfer_done
-
- WRITE_I2C(IICHMADR, 0x00) /* 7-bit addressing */
- WRITE_I2C(IICLMADR, SDRAM_SPD_WRITE_ADDRESS)
-
- /* Write 0 into buffer(start address) */
- /*----------------------------------- */
- WRITE_I2C(IICMDBUF, 0x00);
-
- /* Wait a little */
- /*-------------- */
- addis r3,0,0x0000
- ori r3,r3,0xA000
- mtctr r3
-in02: bdnz in02
-
- /* Issue write command */
- /*-------------------- */
- WRITE_I2C(IICCNTL, IIC_CNTL_PT)
- bl wait_i2c_transfer_done
-
- /* Read 128 bytes */
- /*--------------- */
- addi r7, 0, 0 /* byte counter in r7 */
- addi r8, 0, 0 /* checksum in r8 */
-rdlp:
- /* issue read command */
- /*------------------- */
- cmpi 0, r7, 127
- blt rd01
- WRITE_I2C(IICCNTL, IIC_CNTL_READ | IIC_CNTL_PT)
- bl rd02
-rd01: WRITE_I2C(IICCNTL, IIC_CNTL_READ | IIC_CNTL_CHT | IIC_CNTL_PT)
-rd02: bl wait_i2c_transfer_done
-
- /* Fetch byte from buffer */
- /*----------------------- */
- READ_I2C(IICMDBUF)
-
- /* Retrieve parameters that are going to be used during configuration. */
- /* Save them in dedicated registers. */
- /*------------------------------------------------------------ */
- cmpi 0, r7, 3 /* Save byte 3 in r10 */
- bne rd10
- addi r10, r3, 0
-rd10: cmpi 0, r7, 4 /* Save byte 4 in r11 */
- bne rd11
- addi r11, r3, 0
-rd11: cmpi 0, r7, 5 /* Save byte 5 in r12 */
- bne rd12
- addi r12, r3, 0
-rd12: cmpi 0, r7, 17 /* Save byte 17 in r13 */
- bne rd13
- addi r13, r3, 0
-rd13: cmpi 0, r7, 18 /* Save byte 18 in r14 */
- bne rd14
- addi r14, r3, 0
-rd14: cmpi 0, r7, 31 /* Save byte 31 in r15 */
- bne rd15
- addi r15, r3, 0
-rd15: cmpi 0, r7, 27 /* Save byte 27 in r16 */
- bne rd16
- addi r16, r3, 0
-rd16: cmpi 0, r7, 29 /* Save byte 29 in r17 */
- bne rd17
- addi r17, r3, 0
-rd17: cmpi 0, r7, 30 /* Save byte 30 in r18 */
- bne rd18
- addi r18, r3, 0
-rd18: cmpi 0, r7, 9 /* Save byte 9 in r19 */
- bne rd19
- addi r19, r3, 0
-rd19: cmpi 0, r7, 23 /* Save byte 23 in r20 */
- bne rd20
- addi r20, r3, 0
-rd20: cmpi 0, r7, 25 /* Save byte 25 in r21 */
- bne rd21
- addi r21, r3, 0
-rd21:
-
- /* Calculate checksum of the first 63 bytes */
- /*----------------------------------------- */
- cmpi 0, r7, 63
- bgt rd31
- beq rd30
- add r8, r8, r3
- bl rd31
-
- /* Verify checksum at byte 63 */
- /*--------------------------- */
-rd30: andi. r8, r8, 0xff /* use only 8 bits */
- cmp 0, r8, r3
- beq rd31
- addi r4, 0, LED_SDRAM_CODE_8
- addis r5, 0, 0x1000
- ori r5, r5, 0x0001
- stb r4,0(r5)
- eieio
-rderr: bl rderr
-
-rd31:
-
- /* Increment byte counter and check whether all bytes have been read. */
- /*------------------------------------------------------------------- */
- addi r7, r7, 1
- cmpi 0, r7, 127
- bgt rd05
- bl rdlp
-rd05:
- mtlr r5 /* restore lr */
- blr
-
-wait_i2c_transfer_done:
- mflr r6
-wt01: READ_I2C(IICSTS)
- andi. r4, r3, IIC_STS_PT
- cmpi 0, r4, IIC_STS_PT
- beq wt01
- mtlr r6 /* restore lr */
- blr
-
-/*--------------------------------------------------------------------- */
-/* Function: find_mode */
-/* Description: Determines addressing mode to be used dependent on */
-/* number of rows (r10 = byte 3 from SPD), number of columns (r11 = */
-/* byte 4 from SPD) and number of banks (r13 = byte 17 from SPD). */
-/* mode is returned in r3. */
-/* (It would be nicer having a table, pnc). */
-/*--------------------------------------------------------------------- */
-find_mode:
-
- mflr r5
-
- cmpi 0, r10, 11
- bne fm01
- cmpi 0, r11, 9
- bne fm01
- cmpi 0, r13, 2
- bne fm01
- addi r3, 0, 1
- bl fmfound
-
-fm01: cmpi 0, r10, 11
- bne fm02
- cmpi 0, r11, 10
- bne fm02
- cmpi 0, r13, 2
- bne fm02
- addi r3, 0, 1
- bl fmfound
-
-fm02: cmpi 0, r10, 12
- bne fm03
- cmpi 0, r11, 9
- bne fm03
- cmpi 0, r13, 4
- bne fm03
- addi r3, 0, 2
- bl fmfound
-
-fm03: cmpi 0, r10, 12
- bne fm04
- cmpi 0, r11, 10
- bne fm04
- cmpi 0, r13, 4
- bne fm04
- addi r3, 0, 2
- bl fmfound
-
-fm04: cmpi 0, r10, 13
- bne fm05
- cmpi 0, r11, 9
- bne fm05
- cmpi 0, r13, 4
- bne fm05
- addi r3, 0, 3
- bl fmfound
-
-fm05: cmpi 0, r10, 13
- bne fm06
- cmpi 0, r11, 10
- bne fm06
- cmpi 0, r13, 4
- bne fm06
- addi r3, 0, 3
- bl fmfound
-
-fm06: cmpi 0, r10, 13
- bne fm07
- cmpi 0, r11, 11
- bne fm07
- cmpi 0, r13, 4
- bne fm07
- addi r3, 0, 3
- bl fmfound
-
-fm07: cmpi 0, r10, 12
- bne fm08
- cmpi 0, r11, 8
- bne fm08
- cmpi 0, r13, 2
- bne fm08
- addi r3, 0, 4
- bl fmfound
-
-fm08: cmpi 0, r10, 12
- bne fm09
- cmpi 0, r11, 8
- bne fm09
- cmpi 0, r13, 4
- bne fm09
- addi r3, 0, 4
- bl fmfound
-
-fm09: cmpi 0, r10, 11
- bne fm10
- cmpi 0, r11, 8
- bne fm10
- cmpi 0, r13, 2
- bne fm10
- addi r3, 0, 5
- bl fmfound
-
-fm10: cmpi 0, r10, 11
- bne fm11
- cmpi 0, r11, 8
- bne fm11
- cmpi 0, r13, 4
- bne fm11
- addi r3, 0, 5
- bl fmfound
-
-fm11: cmpi 0, r10, 13
- bne fm12
- cmpi 0, r11, 8
- bne fm12
- cmpi 0, r13, 2
- bne fm12
- addi r3, 0, 6
- bl fmfound
-
-fm12: cmpi 0, r10, 13
- bne fm13
- cmpi 0, r11, 8
- bne fm13
- cmpi 0, r13, 4
- bne fm13
- addi r3, 0, 6
- bl fmfound
-
-fm13: cmpi 0, r10, 13
- bne fm14
- cmpi 0, r11, 9
- bne fm14
- cmpi 0, r13, 2
- bne fm14
- addi r3, 0, 7
- bl fmfound
-
-fm14: cmpi 0, r10, 13
- bne fm15
- cmpi 0, r11, 10
- bne fm15
- cmpi 0, r13, 2
- bne fm15
- addi r3, 0, 7
- bl fmfound
-
-fm15:
- /* not found, error code to be issued on LEDs */
- addi r7, 0, LED_SDRAM_CODE_2
- addis r6, 0, 0x1000
- ori r6, r6, 0x0001
- stb r7,0(r6)
- eieio
-fmerr: bl fmerr
-
-fmfound:addi r6, 0, 1
- subf r3, r6, r3
-
- mtlr r5 /* restore lr */
- blr
-
-/*--------------------------------------------------------------------- */
-/* Function: find_size_code */
-/* Description: Determines size code to be used in configuring SDRAM controller */
-/* dependent on density (r15 = byte 31 from SPD) */
-/*--------------------------------------------------------------------- */
-find_size_code:
-
- mflr r5
-
- addi r3, r15, 0 /* density */
- addi r7, 0, 0
-fs01: andi. r6, r3, 0x01
- cmpi 0, r6, 1
- beq fs04
-
- addi r7, r7, 1
- cmpi 0, r7, 7
- bge fs02
- addi r9, 0, 1
- srw r3, r3, r9
- bl fs01
-
- /* not found, error code to be issued on LEDs */
-fs02: addi r4, 0, LED_SDRAM_CODE_3
- addis r8, 0, 0x1000
- ori r8, r8, 0x0001
- stb r4,0(r8)
- eieio
-fs03: bl fs03
-
-fs04: addi r3, r7, 0
- cmpi 0, r3, 0
- beq fs05
- addi r6, 0, 1
- subf r3, r6, r3
-fs05:
- mtlr r5 /* restore lr */
- blr
-
-/*--------------------------------------------------------------------- */
-/* Function: find_casl */
-/* Description: Determines CAS latency */
-/*--------------------------------------------------------------------- */
-find_casl:
-
- mflr r5
-
- andi. r14, r14, 0x7f /* r14 holds supported CAS latencies */
- addi r3, 0, 0xff /* preset determined CASL */
- addi r4, 0, 6 /* Start at bit 6 of supported CAS latencies */
- addi r2, 0, 0 /* Start finding highest CAS latency */
-
-fc01: srw r6, r14, r4 /* */
- andi. r6, r6, 0x01 /* */
- cmpi 0, r6, 1 /* Check bit for current latency */
- bne fc06 /* If not supported, go to next */
-
- cmpi 0, r2, 2 /* Check if third-highest latency */
- bge fc04 /* If so, go calculate with another format */
-
- cmpi 0, r2, 0 /* Check if highest latency */
- bgt fc02 /* */
- addi r7, r19, 0 /* SDRAM cycle time for highest CAS latenty */
-
- bl fc03
-fc02:
- addi r7, r20, 0 /* SDRAM cycle time for next-highest CAS latenty */
-fc03:
- addi r8, r7, 0
- addi r9, 0, 4
- srw r7, r7, r9
- andi. r7, r7, 0x0f
- mulli r7, r7, 100
- andi. r8, r8, 0x0f
- mulli r8, r8, 10
- add r7, r7, r8
- cmp 0, r7, r30
- bgt fc05
- addi r3, r2, 0
- bl fc05
-fc04:
- addi r7, r21, 0 /* SDRAM cycle time for third-highest CAS latenty */
- addi r8, r7, 0
- addi r9, 0, 2
- srw r7, r7, r9
- andi. r7, r7, 0x3f
- mulli r7, r7, 100
- andi. r8, r8, 0x03
- mulli r8, r8, 25
- add r7, r7, r8
-
- cmp 0, r7, r30
- bgt fc05
- addi r3, r2, 0
-
-fc05: addi r2, r2, 1 /* next latency */
- cmpi 0, r2, 3
- bge fc07
-fc06: addi r6, 0, 1
- subf r4, r6, r4
- cmpi 0, r4, 0
- bne fc01
-
-fc07:
-
- mtlr r5 /* restore lr */
- blr
-#endif
-
-
-/* Peripheral Bank 1 Access Parameters */
-/* 0 BME = 1 ; burstmode enabled */
-/* " 1:8" TWT=00110110 ;Transfer wait (details below) */
-/* 1:5 FWT=00110 ; first wait = 6 cycles */
-/* 6:8 BWT=110 ; burst wait = 6 cycles */
-/* 9:11 000 ; reserved */
-/* 12:13 CSN=00 ; chip select on timing = 0 */
-/* 14:15 OEN=01 ; output enable */
-/* 16:17 WBN=01 ; write byte enable on timing 1 cycle */
-/* 18:19 WBF=01 ; write byte enable off timing 1 cycle */
-/* 20:22 TH=010 ; transfer hold = 2 cycles */
-/* 23 RE=0 ; ready enable = disabled */
-/* 24 SOR=1 ; sample on ready = same PerClk */
-/* 25 BEM=0 ; byte enable mode = only for write cycles */
-/* 26 PEN=0 ; parity enable = disable */
-/* 27:31 00000 ;reserved */
-/* */
-/* 1 + 00110 + 110 + 000 + 00 + 01 + 01 + 01 + 010 + 0 + 1 + 0 + 0 + 00000 = 0x9b015480 */
-/* */
-/* */
-/* Code for BDI probe: */
-/* */
-/* WDCR 18 0x00000011 ;Select PB1AP */
-/* WDCR 19 0x1b015480 ;PB1AP: Flash */
-/* */
-/* Peripheral Bank 0 Access Parameters */
-/* 0:11 BAS=0x200 ; base address select = 0x200 * 0x100000 (1MB) = */
-/* 12:14 BS=100 ; bank size = 16MB (100) / 32MB (101) */
-/* 15:16 BU=11 ; bank usage = read/write */
-/* 17:18 BW=00 ; bus width = 8-bit */
-/* 19:31 ; reserved */
-/* */
-/* 0x200 + 100 + 11 + 00 + 0 0000 0000 0000 = 0x20098000 */
-/* WDCR 18 0x00000001 ;Select PB1CR */
-/* WDCR 19 0x20098000 ;PB1CR: 1MB at 0x00100000, r/w, 8bit */
-
-/* For CPLD */
-/* 0 + 00000 + 010 + 000 + 00 + 01 + 00 + 00 + 000 + 0 + 0 + 1 + 0 + 00000 */
-/* WDCR_EBC(pb5ap, 0x01010040) */
-/*jsa recommendation: WDCR_EBC(pb5ap, 0x00010040) */
-/* WDCR_EBC(pb5cr, 0X10018000) */
-/* Access parms */
-/* 100 3 8 0 0 0 */
-/* 0x100 + 001 + 11 + 00 + 0 0000 0000 0000 = 0x10038000 */
-/* Address : 0x10000000 */
-/* Size: 2 MB */
-/* Usage: read/write */
-/* Width: 32 bit */
-
-/* For Genie onboard fpga 32 bit interface */
-/* 0 1 0 1 0 0 0 0 */
-/* 0 + 00000 + 010 + 000 + 00 + 01 + 00 + 00 + 000 + 0 + 0 + 0 + 0 + 00000 */
-/* 0x01010000 */
-/* Access parms */
-/* 102 1 c 0 0 0 */
-/* 0x102 + 000 + 11 + 10 + 0 0000 0000 0000 = 0x1021c000 */
-/* Address : 0x10200000 */
-/* Size: 2 MB */
-/* Usage: read/write */
-/* Width: 32 bit */
-
-/* Walnut fpga pb7ap */
-/* 0 1 8 1 5 2 8 0 */
-/* 0 + 00000 + 011 + 000 + 00 + 01 + 01 + 01 + 001 + 0 + 1 + 0 + 0 + 00000 */
-/* Walnut fpga pb7cr */
-/* 0xF0318000 */
-/* */
diff --git a/board/exbitgen/u-boot.lds b/board/exbitgen/u-boot.lds
deleted file mode 100644
index d5dea8238e..0000000000
--- a/board/exbitgen/u-boot.lds
+++ /dev/null
@@ -1,152 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- .resetvec 0xFFFFFFFC :
- {
- *(.resetvec)
- } = 0xffff
-
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/ppc4xx/start.o (.text)
- board/exbitgen/init.o (.text)
- cpu/ppc4xx/kgdb.o (.text)
- cpu/ppc4xx/traps.o (.text)
- cpu/ppc4xx/interrupts.o (.text)
- cpu/ppc4xx/serial.o (.text)
- cpu/ppc4xx/cpu_init.o (.text)
- cpu/ppc4xx/speed.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/extable.o (.text)
- lib_generic/zlib.o (.text)
-
-/* . = env_offset;*/
- common/environment.o(.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- . = ALIGN(4);
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/fads/Makefile b/board/fads/Makefile
deleted file mode 100644
index baa6c2e40b..0000000000
--- a/board/fads/Makefile
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o lamp.o
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/fads/config.mk b/board/fads/config.mk
deleted file mode 100644
index 621b9a2493..0000000000
--- a/board/fads/config.mk
+++ /dev/null
@@ -1,34 +0,0 @@
-#
-# (C) Copyright 2000-2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# Modified by, Yuli Barcohen, Arabella Software Ltd., yuli@arabellasw.com
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# Motorola old MPC821/860ADS, MPC8xxFADS, new MPC866ADS, and
-# MPC885ADS boards
-#
-
-TEXT_BASE = 0xFE000000
-PLATFORM_CPPFLAGS += -I$(TOPDIR)/board/fads
-HOST_CFLAGS += -I$(TOPDIR)/board/fads
-HOST_ENVIRO_CFLAGS += -I$(TOPDIR)/board/fads
diff --git a/board/fads/fads.c b/board/fads/fads.c
deleted file mode 100644
index 013b3cb155..0000000000
--- a/board/fads/fads.c
+++ /dev/null
@@ -1,953 +0,0 @@
-/*
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * Modified by, Yuli Barcohen, Arabella Software Ltd., yuli@arabellasw.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <config.h>
-#include <common.h>
-#include <mpc8xx.h>
-#include <pcmcia.h>
-
-#define _NOT_USED_ 0xFFFFFFFF
-
-/* ========================================================================= */
-
-#ifndef CONFIG_MPC885ADS /* No old DRAM on MPC885ADS */
-
-#if defined(CONFIG_DRAM_50MHZ)
-/* 50MHz tables */
-static const uint dram_60ns[] =
-{ 0x8fffec24, 0x0fffec04, 0x0cffec04, 0x00ffec04,
- 0x00ffec00, 0x37ffec47, _NOT_USED_, _NOT_USED_,
- 0x8fffec24, 0x0fffec04, 0x08ffec04, 0x00ffec0c,
- 0x03ffec00, 0x00ffec44, 0x00ffcc08, 0x0cffcc44,
- 0x00ffec0c, 0x03ffec00, 0x00ffec44, 0x00ffcc00,
- 0x3fffc847, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- 0x8fafcc24, 0x0fafcc04, 0x0cafcc00, 0x11bfcc47,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- 0x8fafcc24, 0x0fafcc04, 0x0cafcc00, 0x03afcc4c,
- 0x0cafcc00, 0x03afcc4c, 0x0cafcc00, 0x03afcc4c,
- 0x0cafcc00, 0x33bfcc4f, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- 0xc0ffcc84, 0x00ffcc04, 0x07ffcc04, 0x3fffcc06,
- 0xffffcc85, 0xffffcc05, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- 0x33ffcc07, _NOT_USED_, _NOT_USED_, _NOT_USED_ };
-
-static const uint dram_70ns[] =
-{ 0x8fffcc24, 0x0fffcc04, 0x0cffcc04, 0x00ffcc04,
- 0x00ffcc00, 0x37ffcc47, _NOT_USED_, _NOT_USED_,
- 0x8fffcc24, 0x0fffcc04, 0x0cffcc04, 0x00ffcc04,
- 0x00ffcc08, 0x0cffcc44, 0x00ffec0c, 0x03ffec00,
- 0x00ffec44, 0x00ffcc08, 0x0cffcc44, 0x00ffec04,
- 0x00ffec00, 0x3fffec47, _NOT_USED_, _NOT_USED_,
- 0x8fafcc24, 0x0fafcc04, 0x0cafcc00, 0x11bfcc47,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- 0x8fafcc24, 0x0fafcc04, 0x0cafcc00, 0x03afcc4c,
- 0x0cafcc00, 0x03afcc4c, 0x0cafcc00, 0x03afcc4c,
- 0x0cafcc00, 0x33bfcc4f, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- 0xe0ffcc84, 0x00ffcc04, 0x00ffcc04, 0x0fffcc04,
- 0x7fffcc06, 0xffffcc85, 0xffffcc05, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- 0x33ffcc07, _NOT_USED_, _NOT_USED_, _NOT_USED_ };
-
-static const uint edo_60ns[] =
-{ 0x8ffbec24, 0x0ff3ec04, 0x0cf3ec04, 0x00f3ec04,
- 0x00f3ec00, 0x37f7ec47, _NOT_USED_, _NOT_USED_,
- 0x8fffec24, 0x0ffbec04, 0x0cf3ec04, 0x00f3ec0c,
- 0x0cf3ec00, 0x00f3ec4c, 0x0cf3ec00, 0x00f3ec4c,
- 0x0cf3ec00, 0x00f3ec44, 0x03f3ec00, 0x3ff7ec47,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- 0x8fffcc24, 0x0fefcc04, 0x0cafcc00, 0x11bfcc47,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- 0x8fffcc24, 0x0fefcc04, 0x0cafcc00, 0x03afcc4c,
- 0x0cafcc00, 0x03afcc4c, 0x0cafcc00, 0x03afcc4c,
- 0x0cafcc00, 0x33bfcc4f, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- 0xc0ffcc84, 0x00ffcc04, 0x07ffcc04, 0x3fffcc06,
- 0xffffcc85, 0xffffcc05, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- 0x33ffcc07, _NOT_USED_, _NOT_USED_, _NOT_USED_ };
-
-static const uint edo_70ns[] =
-{ 0x8ffbcc24, 0x0ff3cc04, 0x0cf3cc04, 0x00f3cc04,
- 0x00f3cc00, 0x37f7cc47, _NOT_USED_, _NOT_USED_,
- 0x8fffcc24, 0x0ffbcc04, 0x0cf3cc04, 0x00f3cc0c,
- 0x03f3cc00, 0x00f3cc44, 0x00f3ec0c, 0x0cf3ec00,
- 0x00f3ec4c, 0x03f3ec00, 0x00f3ec44, 0x00f3cc00,
- 0x33f7cc47, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- 0x8fffcc24, 0x0fefcc04, 0x0cafcc00, 0x11bfcc47,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- 0x8fffcc24, 0x0fefcc04, 0x0cafcc00, 0x03afcc4c,
- 0x0cafcc00, 0x03afcc4c, 0x0cafcc00, 0x03afcc4c,
- 0x0cafcc00, 0x33bfcc47, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- 0xe0ffcc84, 0x00ffcc04, 0x00ffcc04, 0x0fffcc04,
- 0x7fffcc04, 0xffffcc86, 0xffffcc05, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- 0x33ffcc07, _NOT_USED_, _NOT_USED_, _NOT_USED_ };
-
-#elif defined(CONFIG_DRAM_25MHZ)
-
-/* 25MHz tables */
-
-static const uint dram_60ns[] =
-{ 0x0fffcc04, 0x08ffcc00, 0x33ffcc47, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- 0x0fffcc24, 0x0fffcc04, 0x08ffcc00, 0x03ffcc4c,
- 0x08ffcc00, 0x03ffcc4c, 0x08ffcc00, 0x03ffcc4c,
- 0x08ffcc00, 0x33ffcc47, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- 0x0fafcc04, 0x08afcc00, 0x3fbfcc47, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- 0x0fafcc04, 0x0cafcc00, 0x01afcc4c, 0x0cafcc00,
- 0x01afcc4c, 0x0cafcc00, 0x01afcc4c, 0x0cafcc00,
- 0x31bfcc43, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- 0x80ffcc84, 0x13ffcc04, 0xffffcc87, 0xffffcc05,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- 0x33ffcc07, _NOT_USED_, _NOT_USED_, _NOT_USED_ };
-
-static const uint dram_70ns[] =
-{ 0x0fffec04, 0x08ffec04, 0x00ffec00, 0x3fffcc47,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- 0x0fffcc24, 0x0fffcc04, 0x08ffcc00, 0x03ffcc4c,
- 0x08ffcc00, 0x03ffcc4c, 0x08ffcc00, 0x03ffcc4c,
- 0x08ffcc00, 0x33ffcc47, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- 0x0fafcc04, 0x08afcc00, 0x3fbfcc47, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- 0x0fafcc04, 0x0cafcc00, 0x01afcc4c, 0x0cafcc00,
- 0x01afcc4c, 0x0cafcc00, 0x01afcc4c, 0x0cafcc00,
- 0x31bfcc43, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- 0xc0ffcc84, 0x01ffcc04, 0x7fffcc86, 0xffffcc05,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- 0x33ffcc07, _NOT_USED_, _NOT_USED_, _NOT_USED_ };
-
-static const uint edo_60ns[] =
-{ 0x0ffbcc04, 0x0cf3cc04, 0x00f3cc00, 0x33f7cc47,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- 0x0ffbcc04, 0x09f3cc0c, 0x09f3cc0c, 0x09f3cc0c,
- 0x08f3cc00, 0x3ff7cc47, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- 0x0fefcc04, 0x08afcc04, 0x00afcc00, 0x3fbfcc47,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- 0x0fefcc04, 0x08afcc00, 0x07afcc48, 0x08afcc48,
- 0x08afcc48, 0x39bfcc47, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- 0x80ffcc84, 0x13ffcc04, 0xffffcc87, 0xffffcc05,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- 0x33ffcc07, _NOT_USED_, _NOT_USED_, _NOT_USED_ };
-
-static const uint edo_70ns[] =
-{ 0x0ffbcc04, 0x0cf3cc04, 0x00f3cc00, 0x33f7cc47,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- 0x0ffbec04, 0x08f3ec04, 0x03f3ec48, 0x08f3cc00,
- 0x0ff3cc4c, 0x08f3cc00, 0x0ff3cc4c, 0x08f3cc00,
- 0x3ff7cc47, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- 0x0fefcc04, 0x08afcc04, 0x00afcc00, 0x3fbfcc47,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- 0x0fefcc04, 0x08afcc00, 0x07afcc4c, 0x08afcc00,
- 0x07afcc4c, 0x08afcc00, 0x07afcc4c, 0x08afcc00,
- 0x37bfcc47, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- 0xc0ffcc84, 0x01ffcc04, 0x7fffcc86, 0xffffcc05,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- 0x33ffcc07, _NOT_USED_, _NOT_USED_, _NOT_USED_ };
-#else
-#error dram not correctly defined - use CONFIG_DRAM_25MHZ or CONFIG_DRAM_50MHZ
-#endif
-
-/* ------------------------------------------------------------------------- */
-static int _draminit (uint base, uint noMbytes, uint edo, uint delay)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
-
- /* init upm */
-
- switch (delay) {
- case 70:
- if (edo) {
- upmconfig (UPMA, (uint *) edo_70ns,
- sizeof (edo_70ns) / sizeof (uint));
- } else {
- upmconfig (UPMA, (uint *) dram_70ns,
- sizeof (dram_70ns) / sizeof (uint));
- }
-
- break;
-
- case 60:
- if (edo) {
- upmconfig (UPMA, (uint *) edo_60ns,
- sizeof (edo_60ns) / sizeof (uint));
- } else {
- upmconfig (UPMA, (uint *) dram_60ns,
- sizeof (dram_60ns) / sizeof (uint));
- }
-
- break;
-
- default:
- return -1;
- }
-
- memctl->memc_mptpr = 0x0400; /* divide by 16 */
-
- switch (noMbytes) {
- case 4: /* 4 Mbyte uses only CS2 */
-#ifdef CONFIG_ADS
- memctl->memc_mamr = 0xc0a21114;
-#else
- memctl->memc_mamr = 0x13a01114; /* PTA 0x13 AMA 010 */
-#endif
- memctl->memc_or2 = 0xffc00800; /* 4M */
- break;
-
- case 8: /* 8 Mbyte uses both CS3 and CS2 */
- memctl->memc_mamr = 0x13a01114; /* PTA 0x13 AMA 010 */
- memctl->memc_or3 = 0xffc00800; /* 4M */
- memctl->memc_br3 = 0x00400081 + base;
- memctl->memc_or2 = 0xffc00800; /* 4M */
- break;
-
- case 16: /* 16 Mbyte uses only CS2 */
-#ifdef CONFIG_ADS /* XXX: why PTA=0x60 only in 16M case? - NTL */
- memctl->memc_mamr = 0x60b21114; /* PTA 0x60 AMA 011 */
-#else
- memctl->memc_mamr = 0x13b01114; /* PTA 0x13 AMA 011 */
-#endif
- memctl->memc_or2 = 0xff000800; /* 16M */
- break;
-
- case 32: /* 32 Mbyte uses both CS3 and CS2 */
- memctl->memc_mamr = 0x13b01114; /* PTA 0x13 AMA 011 */
- memctl->memc_or3 = 0xff000800; /* 16M */
- memctl->memc_br3 = 0x01000081 + base;
- memctl->memc_or2 = 0xff000800; /* 16M */
- break;
-
- default:
- return -1;
- }
-
- memctl->memc_br2 = 0x81 + base; /* use upma */
-
- *((uint *) BCSR1) &= ~BCSR1_DRAM_EN; /* enable dram */
-
- /* if no dimm is inserted, noMbytes is still detected as 8m, so
- * sanity check top and bottom of memory */
-
- /* check bytes / 2 because get_ram_size tests at base+bytes, which
- * is not mapped */
- if (noMbytes == 8)
- if (get_ram_size ((long *) base, noMbytes << 19) != noMbytes << 19) {
- *((uint *) BCSR1) |= BCSR1_DRAM_EN; /* disable dram */
- return -1;
- }
-
- return 0;
-}
-
-/* ------------------------------------------------------------------------- */
-
-static void _dramdisable(void)
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
-
- memctl->memc_br2 = 0x00000000;
- memctl->memc_br3 = 0x00000000;
-
- /* maybe we should turn off upma here or something */
-}
-#endif /* !CONFIG_MPC885ADS */
-
-/* ========================================================================= */
-
-#ifdef CONFIG_FADS /* SDRAM exists on FADS and newer boards */
-
-#if defined(CONFIG_SDRAM_100MHZ)
-
-/* ------------------------------------------------------------------------- */
-/* sdram table by Dan Malek */
-
-/* This has the stretched early timing so the 50 MHz
- * processor can make the 100 MHz timing. This will
- * work at all processor speeds.
- */
-
-#ifdef SDRAM_ALT_INIT_SEQENCE
-# define SDRAM_MBMRVALUE0 0xc3802114 /* PTx=195,PTxE,AMx=0,DSx=1,A11,RLFx=1,WLFx=1,TLFx=4 */
-#define SDRAM_MBMRVALUE1 SDRAM_MBMRVALUE0
-# define SDRAM_MCRVALUE0 0x80808111 /* run upmb cs4 loop 1 addr 0x11 MRS */
-# define SDRAM_MCRVALUE1 SDRAM_MCRVALUE0 /* ??? why not 0x80808130? */
-#else
-# define SDRAM_MxMR_PTx 195
-# define UPM_MRS_ADDR 0x11
-# define UPM_REFRESH_ADDR 0x30 /* or 0x11 if we want to be like above? */
-#endif /* !SDRAM_ALT_INIT_SEQUENCE */
-
-static const uint sdram_table[] =
-{
- /* single read. (offset 0 in upm RAM) */
- 0xefebfc24, 0x1f07fc24, 0xeeaefc04, 0x11adfc04,
- 0xefbbbc00, 0x1ff77c45, _NOT_USED_, _NOT_USED_,
-
- /* burst read. (offset 8 in upm RAM) */
- 0xefebfc24, 0x1f07fc24, 0xeeaefc04, 0x10adfc04,
- 0xf0affc00, 0xf0affc00, 0xf1affc00, 0xefbbbc00,
- 0x1ff77c45,
-
- /* precharge + MRS. (offset 11 in upm RAM) */
- 0xeffbbc04, 0x1ff77c34, 0xefeabc34,
- 0x1fb57c35, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /* single write. (offset 18 in upm RAM) */
- 0xefebfc24, 0x1f07fc24, 0xeeaebc00, 0x01b93c04,
- 0x1ff77c45, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /* burst write. (offset 20 in upm RAM) */
- 0xefebfc24, 0x1f07fc24, 0xeeaebc00, 0x10ad7c00,
- 0xf0affc00, 0xf0affc00, 0xe1bbbc04, 0x1ff77c45,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /* refresh. (offset 30 in upm RAM) */
- 0xeffafc84, 0x1ff5fc04, 0xfffffc04, 0xfffffc04,
- 0xfffffc84, 0xfffffc07, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /* exception. (offset 3c in upm RAM) */
- 0xeffffc06, 0x1ffffc07, _NOT_USED_, _NOT_USED_ };
-
-#elif defined(CONFIG_SDRAM_50MHZ)
-
-/* ------------------------------------------------------------------------- */
-/* sdram table stolen from the fads manual */
-/* for chip MB811171622A-100 */
-
-/* this table is for 32-50MHz operation */
-#ifdef SDRAM_ALT_INIT_SEQENCE
-# define SDRAM_MBMRVALUE0 0x80802114 /* PTx=128,PTxE,AMx=0,DSx=1,A11,RLFx=1,WLFx=1,TLFx=4 */
-# define SDRAM_MBMRVALUE1 0x80802118 /* PTx=128,PTxE,AMx=0,DSx=1,A11,RLFx=1,WLFx=1,TLFx=8 */
-# define SDRAM_MCRVALUE0 0x80808105 /* run upmb cs4 loop 1 addr 0x5 MRS */
-# define SDRAM_MCRVALUE1 0x80808130 /* run upmb cs4 loop 1 addr 0x30 REFRESH */
-# define SDRAM_MPTRVALUE 0x400
-#define SDRAM_MARVALUE 0x88
-#else
-# define SDRAM_MxMR_PTx 128
-# define UPM_MRS_ADDR 0x5
-# define UPM_REFRESH_ADDR 0x30
-#endif /* !SDRAM_ALT_INIT_SEQUENCE */
-
-static const uint sdram_table[] =
-{
- /* single read. (offset 0 in upm RAM) */
- 0x1f07fc04, 0xeeaefc04, 0x11adfc04, 0xefbbbc00,
- 0x1ff77c47,
-
- /* precharge + MRS. (offset 5 in upm RAM) */
- 0x1ff77c34, 0xefeabc34, 0x1fb57c35,
-
- /* burst read. (offset 8 in upm RAM) */
- 0x1f07fc04, 0xeeaefc04, 0x10adfc04, 0xf0affc00,
- 0xf0affc00, 0xf1affc00, 0xefbbbc00, 0x1ff77c47,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /* single write. (offset 18 in upm RAM) */
- 0x1f27fc04, 0xeeaebc00, 0x01b93c04, 0x1ff77c47,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /* burst write. (offset 20 in upm RAM) */
- 0x1f07fc04, 0xeeaebc00, 0x10ad7c00, 0xf0affc00,
- 0xf0affc00, 0xe1bbbc04, 0x1ff77c47, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /* refresh. (offset 30 in upm RAM) */
- 0x1ff5fc84, 0xfffffc04, 0xfffffc04, 0xfffffc04,
- 0xfffffc84, 0xfffffc07, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /* exception. (offset 3c in upm RAM) */
- 0x7ffffc07, _NOT_USED_, _NOT_USED_, _NOT_USED_ };
-
-/* ------------------------------------------------------------------------- */
-#else
-#error SDRAM not correctly configured
-#endif
-/* ------------------------------------------------------------------------- */
-
-/*
- * Memory Periodic Timer Prescaler
- */
-
-#define SDRAM_OR4VALUE 0x00000a00 /* SAM,GL5A/S=01,addr mask or'ed on later */
-#define SDRAM_BR4VALUE 0x000000c1 /* UPMB,base addr or'ed on later */
-
-/* ------------------------------------------------------------------------- */
-#ifdef SDRAM_ALT_INIT_SEQENCE
-/* ------------------------------------------------------------------------- */
-
-static int _initsdram(uint base, uint noMbytes)
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
-
- upmconfig(UPMB, (uint *)sdram_table,sizeof(sdram_table)/sizeof(uint));
-
- memctl->memc_mptpr = SDRAM_MPTPRVALUE;
-
- /* Configure the refresh (mostly). This needs to be
- * based upon processor clock speed and optimized to provide
- * the highest level of performance. For multiple banks,
- * this time has to be divided by the number of banks.
- * Although it is not clear anywhere, it appears the
- * refresh steps through the chip selects for this UPM
- * on each refresh cycle.
- * We have to be careful changing
- * UPM registers after we ask it to run these commands.
- */
-
- memctl->memc_mbmr = SDRAM_MBMRVALUE0; /* TLF 4 */
- memctl->memc_mar = SDRAM_MARVALUE; /* MRS code */
-
- udelay(200);
-
- /* Now run the precharge/nop/mrs commands.
- */
-
- memctl->memc_mcr = 0x80808111; /* run umpb cs4 1 count 1, addr 0x11 ??? (50Mhz) */
- /* run umpb cs4 1 count 1, addr 0x11 precharge+MRS (100Mhz) */
- udelay(200);
-
- /* Run 8 refresh cycles */
-
- memctl->memc_mcr = SDRAM_MCRVALUE0; /* run upmb cs4 loop 1 addr 0x5 precharge+MRS (50 Mhz)*/
- /* run upmb cs4 loop 1 addr 0x11 precharge+MRS (100MHz) */
-
- udelay(200);
-
- memctl->memc_mbmr = SDRAM_MBMRVALUE1; /* TLF 4 (100 Mhz) or TLF 8 (50MHz) */
- memctl->memc_mcr = SDRAM_MCRVALUE1; /* run upmb cs4 loop 1 addr 0x30 refr (50 Mhz) */
- /* run upmb cs4 loop 1 addr 0x11 precharge+MRS ??? (100MHz) */
-
- udelay(200);
-
- memctl->memc_mbmr = SDRAM_MBMRVALUE0; /* TLF 4 */
-
- memctl->memc_or4 = SDRAM_OR4VALUE | ~((noMbytes<<20)-1);
- memctl->memc_br4 = SDRAM_BR4VALUE | base;
-
- return 0;
-}
-
-/* ------------------------------------------------------------------------- */
-#else /* !SDRAM_ALT_INIT_SEQUENCE */
-/* ------------------------------------------------------------------------- */
-
-/* refresh rate 15.6 us (= 64 ms / 4K = 62.4 / quad bursts) for <= 128 MBit */
-# define MPTPR_2BK_4K MPTPR_PTP_DIV16 /* setting for 2 banks */
-# define MPTPR_1BK_4K MPTPR_PTP_DIV32 /* setting for 1 bank */
-
-/* refresh rate 7.8 us (= 64 ms / 8K = 31.2 / quad bursts) for 256 MBit */
-# define MPTPR_2BK_8K MPTPR_PTP_DIV8 /* setting for 2 banks */
-# define MPTPR_1BK_8K MPTPR_PTP_DIV16 /* setting for 1 bank */
-
-/*
- * MxMR settings for SDRAM
- */
-
-/* 8 column SDRAM */
-# define SDRAM_MxMR_8COL ((SDRAM_MxMR_PTx << MBMR_PTB_SHIFT) | MBMR_PTBE | \
- MBMR_AMB_TYPE_0 | MBMR_DSB_1_CYCL | MBMR_G0CLB_A11 | \
- MBMR_RLFB_1X | MBMR_WLFB_1X | MBMR_TLFB_4X)
-/* 9 column SDRAM */
-# define SDRAM_MxMR_9COL ((SDRAM_MxMR_PTx << MBMR_PTB_SHIFT) | MBMR_PTAE | \
- MBMR_AMB_TYPE_1 | MBMR_DSB_1_CYCL | MBMR_G0CLB_A10 | \
- MBMR_RLFB_1X | MBMR_WLFB_1X | MBMR_TLFB_4X)
-
-static int _initsdram(uint base, uint noMbytes)
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
-
- upmconfig(UPMB, (uint *)sdram_table,sizeof(sdram_table)/sizeof(uint));
-
- memctl->memc_mptpr = MPTPR_2BK_4K;
- memctl->memc_mbmr = SDRAM_MxMR_8COL & (~(MBMR_PTBE)); /* no refresh yet */
-
- /* map CS 4 */
- memctl->memc_or4 = SDRAM_OR4VALUE | ~((noMbytes<<20)-1);
- memctl->memc_br4 = SDRAM_BR4VALUE | base;
-
- /* Perform SDRAM initilization */
-# ifdef UPM_NOP_ADDR /* not currently in UPM table */
- /* step 1: nop */
- memctl->memc_mar = 0x00000000;
- memctl->memc_mcr = MCR_UPM_B | MCR_OP_RUN | MCR_MB_CS4 |
- MCR_MLCF(0) | UPM_NOP_ADDR;
-# endif
-
- /* step 2: delay */
- udelay(200);
-
-# ifdef UPM_PRECHARGE_ADDR /* merged with MRS in UPM table */
- /* step 3: precharge */
- memctl->memc_mar = 0x00000000;
- memctl->memc_mcr = MCR_UPM_B | MCR_OP_RUN | MCR_MB_CS4 |
- MCR_MLCF(4) | UPM_PRECHARGE_ADDR;
-# endif
-
- /* step 4: refresh */
- memctl->memc_mar = 0x00000000;
- memctl->memc_mcr = MCR_UPM_B | MCR_OP_RUN | MCR_MB_CS4 |
- MCR_MLCF(2) | UPM_REFRESH_ADDR;
-
- /*
- * note: for some reason, the UPM values we are using include
- * precharge with MRS
- */
-
- /* step 5: mrs */
- memctl->memc_mar = 0x00000088;
- memctl->memc_mcr = MCR_UPM_B | MCR_OP_RUN | MCR_MB_CS4 |
- MCR_MLCF(1) | UPM_MRS_ADDR;
-
-# ifdef UPM_NOP_ADDR
- memctl->memc_mar = 0x00000000;
- memctl->memc_mcr = MCR_UPM_B | MCR_OP_RUN | MCR_MB_CS4 |
- MCR_MLCF(0) | UPM_NOP_ADDR;
-# endif
- /*
- * Enable refresh
- */
-
- memctl->memc_mbmr |= MBMR_PTBE;
- return 0;
-}
-#endif /* !SDRAM_ALT_INIT_SEQUENCE */
-
-/* ------------------------------------------------------------------------- */
-
-static void _sdramdisable(void)
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
-
- memctl->memc_br4 = 0x00000000;
-
- /* maybe we should turn off upmb here or something */
-}
-
-/* ------------------------------------------------------------------------- */
-
-static int initsdram(uint base, uint *noMbytes)
-{
- uint m = CFG_SDRAM_SIZE>>20;
-
- /* _initsdram needs access to sdram */
- *((uint *)BCSR1) |= BCSR1_SDRAM_EN; /* enable sdram */
-
- if(!_initsdram(base, m))
- {
- *noMbytes += m;
- return 0;
- }
- else
- {
- *((uint *)BCSR1) &= ~BCSR1_SDRAM_EN; /* disable sdram */
-
- _sdramdisable();
-
- return -1;
- }
-}
-
-#endif /* CONFIG_FADS */
-
-/* ========================================================================= */
-
-long int initdram (int board_type)
-{
- uint sdramsz = 0; /* size of sdram in Mbytes */
- uint base = 0; /* base of dram in bytes */
- uint m = 0; /* size of dram in Mbytes */
-#ifndef CONFIG_MPC885ADS
- uint k, s;
-#endif
-
-#ifdef CONFIG_FADS
- if (!initsdram (0x00000000, &sdramsz)) {
- base = sdramsz << 20;
- printf ("(%u MB SDRAM) ", sdramsz);
- }
-#endif
-#ifndef CONFIG_MPC885ADS /* No old DRAM on MPC885ADS */
- k = (*((uint *) BCSR2) >> 23) & 0x0f;
-
- switch (k & 0x3) {
- /* "MCM36100 / MT8D132X" */
- case 0x00:
- m = 4;
- break;
-
- /* "MCM36800 / MT16D832X" */
- case 0x01:
- m = 32;
- break;
- /* "MCM36400 / MT8D432X" */
- case 0x02:
- m = 16;
- break;
- /* "MCM36200 / MT16D832X ?" */
- case 0x03:
- m = 8;
- break;
-
- }
-
- switch (k >> 2) {
- case 0x02:
- k = 70;
- break;
-
- case 0x03:
- k = 60;
- break;
-
- default:
- printf ("unknown dramdelay (0x%x) - defaulting to 70 ns", k);
- k = 70;
- }
-
-#ifdef CONFIG_FADS
- /* the FADS is missing this bit, all rams treated as non-edo */
- s = 0;
-#else
- s = (*((uint *) BCSR2) >> 27) & 0x01;
-#endif
-
- if (!_draminit (base, m, s, k)) {
- printf ("%dM %dns %sDRAM: ", m, k, s ? "EDO " : "");
- } else {
- _dramdisable ();
- m = 0;
- }
-#endif /* !CONFIG_MPC885ADS */
- m += sdramsz; /* add sdram size to total */
-
- return (m << 20);
-}
-
-/* ------------------------------------------------------------------------- */
-
-int testdram (void)
-{
- /* TODO: XXX XXX XXX */
- printf ("test: 16 MB - ok\n");
-
- return (0);
-}
-
-/* ========================================================================= */
-
-/*
- * Check Board Identity:
- */
-
-#if defined(CONFIG_FADS) && defined(CFG_DAUGHTERBOARD)
-static void checkdboard(void)
-{
- /* get db type from BCSR 3 */
- uint k = (*((uint *)BCSR3) >> 24) & 0x3f;
-
- puts (" with db ");
-
- switch(k) {
- case 0x03 :
- puts ("MPC823");
- break;
- case 0x20 :
- puts ("MPC801");
- break;
- case 0x21 :
- puts ("MPC850");
- break;
- case 0x22 :
- puts ("MPC821, MPC860 / MPC860SAR / MPC860T");
- break;
- case 0x23 :
- puts ("MPC860SAR");
- break;
- case 0x24 :
- case 0x2A :
- puts ("MPC860T");
- break;
- case 0x3F :
- puts ("MPC850SAR");
- break;
- default : printf("0x%x", k);
- }
-}
-#endif /* defined(CONFIG_FADS) && defined(CFG_DAUGHTERBOARD) */
-
-int checkboard (void)
-{
- /* get revision from BCSR 3 */
- uint r = (((*((uint *) BCSR3) >> 23) & 1) << 3)
- | (((*((uint *) BCSR3) >> 19) & 1) << 2)
- | (((*((uint *) BCSR3) >> 16) & 3));
-
- puts ("Board: ");
-
-#if defined(CONFIG_MPC86xADS)
- puts ("MPC86xADS");
-#elif defined(CONFIG_MPC885ADS)
- puts ("MPC885ADS");
- r = 0; /* I've got NR (No Revision) board */
-#elif defined(CONFIG_FADS)
- puts ("FADS");
- checkdboard ();
-#else
- puts ("ADS");
-#endif
- puts (" rev ");
-
- switch (r) {
-#if defined(CONFIG_ADS)
- case 0x00:
- puts ("ENG - this board sucks, check the errata, not supported\n");
- return -1;
- case 0x01:
- puts ("PILOT - warning, read errata \n");
- break;
- case 0x02:
- puts ("A - warning, read errata \n");
- break;
- case 0x03:
- puts ("B \n");
- break;
-#elif defined(CONFIG_MPC885ADS)
- case 0x00:
- puts ("NR\n");
- break;
-#else /* FADS and newer */
- case 0x00:
- puts ("ENG\n");
- break;
- case 0x01:
- puts ("PILOT\n");
- break;
-#endif /* CONFIG_ADS */
- default:
- printf ("unknown (0x%x)\n", r);
- return -1;
- }
-
- return 0;
-}
-
-/* ========================================================================= */
-
-#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
-
-#ifdef CFG_PCMCIA_MEM_ADDR
-volatile unsigned char *pcmcia_mem = (unsigned char*)CFG_PCMCIA_MEM_ADDR;
-#endif
-
-int pcmcia_init(void)
-{
- volatile pcmconf8xx_t *pcmp;
- uint v, slota = 0, slotb = 0;
-
- /*
- ** Enable the PCMCIA for a Flash card.
- */
- pcmp = (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
-
-#if 0
- pcmp->pcmc_pbr0 = CFG_PCMCIA_MEM_ADDR;
- pcmp->pcmc_por0 = 0xc00ff05d;
-#endif
-
- /* Set all slots to zero by default. */
- pcmp->pcmc_pgcra = 0;
- pcmp->pcmc_pgcrb = 0;
-#ifdef CONFIG_PCMCIA_SLOT_A
- pcmp->pcmc_pgcra = 0x40;
-#endif
-#ifdef CONFIG_PCMCIA_SLOT_B
- pcmp->pcmc_pgcrb = 0x40;
-#endif
-
- /* enable PCMCIA buffers */
- *((uint *)BCSR1) &= ~BCSR1_PCCEN;
-
- /* Check if any PCMCIA card is plugged in. */
-
-#ifdef CONFIG_PCMCIA_SLOT_A
- slota = (pcmp->pcmc_pipr & 0x18000000) == 0 ;
-#endif
-#ifdef CONFIG_PCMCIA_SLOT_B
- slotb = (pcmp->pcmc_pipr & 0x00001800) == 0 ;
-#endif
-
- if (!(slota || slotb)) {
- printf("No card present\n");
- pcmp->pcmc_pgcra = 0;
- pcmp->pcmc_pgcrb = 0;
- return -1;
- }
- else
- printf("Card present (");
-
- v = 0;
-
- /* both the ADS and the FADS have a 5V keyed pcmcia connector (?)
- **
- ** Paolo - Yes, but i have to insert some 3.3V card in that slot on
- ** my FADS... :-)
- */
-
-#if defined(CONFIG_MPC86x)
- switch ((pcmp->pcmc_pipr >> 30) & 3)
-#elif defined(CONFIG_MPC823) || defined(CONFIG_MPC850)
- switch ((pcmp->pcmc_pipr >> 14) & 3)
-#endif
- {
- case 0x00 :
- printf("5V");
- v = 5;
- break;
- case 0x01 :
- printf("5V and 3V");
-#ifdef CONFIG_FADS
- v = 3; /* User lower voltage if supported! */
-#else
- v = 5;
-#endif
- break;
- case 0x03 :
- printf("5V, 3V and x.xV");
-#ifdef CONFIG_FADS
- v = 3; /* User lower voltage if supported! */
-#else
- v = 5;
-#endif
- break;
- }
-
- switch (v) {
-#ifdef CONFIG_FADS
- case 3:
- printf("; using 3V");
- /*
- ** Enable 3 volt Vcc.
- */
- *((uint *)BCSR1) &= ~BCSR1_PCCVCC1;
- *((uint *)BCSR1) |= BCSR1_PCCVCC0;
- break;
-#endif
- case 5:
- printf("; using 5V");
-#ifdef CONFIG_ADS
- /*
- ** Enable 5 volt Vcc.
- */
- *((uint *)BCSR1) &= ~BCSR1_PCCVCCON;
-#endif
-#ifdef CONFIG_FADS
- /*
- ** Enable 5 volt Vcc.
- */
- *((uint *)BCSR1) &= ~BCSR1_PCCVCC0;
- *((uint *)BCSR1) |= BCSR1_PCCVCC1;
-#endif
- break;
-
- default:
- *((uint *)BCSR1) |= BCSR1_PCCEN; /* disable pcmcia */
-
- printf("; unknown voltage");
- return -1;
- }
- printf(")\n");
- /* disable pcmcia reset after a while */
-
- udelay(20);
-
-#ifdef CONFIG_PCMCIA_SLOT_A
- pcmp->pcmc_pgcra = 0;
-#endif
-#ifdef CONFIG_PCMCIA_SLOT_B
- pcmp->pcmc_pgcrb = 0;
-#endif
-
- /* If you using a real hd you should give a short
- * spin-up time. */
-#ifdef CONFIG_DISK_SPINUP_TIME
- udelay(CONFIG_DISK_SPINUP_TIME);
-#endif
-
- return 0;
-}
-
-#endif /* CFG_CMD_PCMCIA */
-
-/* ========================================================================= */
-
-#ifdef CFG_PC_IDE_RESET
-
-void ide_set_reset(int on)
-{
- volatile immap_t *immr = (immap_t *)CFG_IMMR;
-
- /*
- * Configure PC for IDE Reset Pin
- */
- if (on) { /* assert RESET */
- immr->im_ioport.iop_pcdat &= ~(CFG_PC_IDE_RESET);
- } else { /* release RESET */
- immr->im_ioport.iop_pcdat |= CFG_PC_IDE_RESET;
- }
-
- /* program port pin as GPIO output */
- immr->im_ioport.iop_pcpar &= ~(CFG_PC_IDE_RESET);
- immr->im_ioport.iop_pcso &= ~(CFG_PC_IDE_RESET);
- immr->im_ioport.iop_pcdir |= CFG_PC_IDE_RESET;
-}
-
-#endif /* CFG_PC_IDE_RESET */
diff --git a/board/fads/fads.h b/board/fads/fads.h
deleted file mode 100644
index 1127c7ff72..0000000000
--- a/board/fads/fads.h
+++ /dev/null
@@ -1,514 +0,0 @@
-/*
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * Derived from FADS860T definitions by Magnus Damm, Helmut Buchsbaum,
- * and Dan Malek
- *
- * Modified by, Yuli Barcohen, Arabella Software Ltd., yuli@arabellasw.com
- *
- * This header file contains values common to all FADS family boards.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/****************************************************************************
- * Flash Memory Map as used by U-Boot:
- *
- * Start Address Length
- * +-----------------------+ 0xFE00_0000 Start of Flash -----------------
- * | | 0xFE00_0100 Reset Vector
- * + + 0xFE0?_????
- * | U-Boot code |
- * | |
- * +-----------------------+ 0xFE04_0000 (sector border)
- * | |
- * | |
- * | U-Boot environment |
- * | | ^
- * | | | U-Boot
- * +=======================+ 0xFE08_0000 (sector border) -----------------
- * | Available | | Applications
- * | ... | v
- *
- *****************************************************************************/
-
-#if 0
-#define CONFIG_BOOTDELAY -1 /* autoboot disabled */
-#else
-#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
-#endif
-
-#undef CONFIG_BOOTARGS
-#define CONFIG_BOOTCOMMAND \
- "dhcp;" \
- "setenv bootargs root=/dev/nfs rw nfsroot=${serverip}:${rootpath} " \
- "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off;" \
- "bootm"
-
-#undef CONFIG_WATCHDOG /* watchdog disabled */
-#define CONFIG_BZIP2 /* include support for bzip2 compressed images */
-
-/*
- * New MPC86xADS and Duet provide two Ethernet connectivity options:
- * 10Mbit/s on SCC and 100Mbit/s on FEC. FADS provides SCC Ethernet on
- * motherboard and FEC Ethernet on daughterboard. All new PQ1 chips have
- * got FEC so FEC is the default.
- */
-#ifndef CONFIG_ADS
-#undef CONFIG_SCC1_ENET /* Disable SCC1 ethernet */
-#define CONFIG_FEC_ENET /* Use FEC ethernet */
-#else /* Old ADS has not got FEC option */
-#define CONFIG_SCC1_ENET /* Use SCC1 ethernet */
-#undef CONFIG_FEC_ENET /* No FEC ethernet */
-#endif /* !CONFIG_ADS */
-
-#if defined(CONFIG_SCC1_ENET) && defined(CONFIG_FEC_ENET)
-#error Both CONFIG_SCC1_ENET and CONFIG_FEC_ENET configured
-#endif
-
-#ifdef CONFIG_FEC_ENET
-#define CFG_DISCOVER_PHY
-#endif
-
-#ifndef CONFIG_COMMANDS
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL \
- | CFG_CMD_DHCP \
- | CFG_CMD_IMMAP \
- | CFG_CMD_JFFS2 \
- | CFG_CMD_MII \
- | CFG_CMD_PCMCIA \
- | CFG_CMD_PING \
- )
-#endif /* !CONFIG_COMMANDS */
-
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
-
-/*
- * Miscellaneous configurable options
- */
-#undef CFG_LONGHELP /* undef to save memory */
-#define CFG_PROMPT "=>" /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
-#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
-#else
-#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
-#endif
-#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
-#define CFG_MAXARGS 16 /* max number of command args */
-#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
-
-#define CFG_LOAD_ADDR 0x00100000
-
-#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
-
-#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
-
-/*
- * Low Level Configuration Settings
- * (address mappings, register initial values, etc.)
- * You should know what you are doing if you make changes here.
- */
-/*-----------------------------------------------------------------------
- * Internal Memory Mapped Register
- */
-#define CFG_IMMR 0xFF000000
-
-/*-----------------------------------------------------------------------
- * Definitions for initial stack pointer and data area (in DPRAM)
- */
-#define CFG_INIT_RAM_ADDR CFG_IMMR
-#define CFG_INIT_RAM_END 0x2F00 /* End of used area in DPRAM */
-#define CFG_GBL_DATA_SIZE 64 /* size in bytes reserved for initial data */
-#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
-#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
-
-/*-----------------------------------------------------------------------
- * Start addresses for the final memory configuration
- * (Set up by the startup code)
- * Please note that CFG_SDRAM_BASE _must_ start at 0
- */
-#define CFG_SDRAM_BASE 0x00000000
-#if defined(CONFIG_MPC86xADS) || defined(CONFIG_MPC885ADS) /* New ADS or Duet */
-#define CFG_SDRAM_SIZE 0x00800000 /* 8 Mbyte */
-#elif defined(CONFIG_FADS) /* Old/new FADS */
-#define CFG_SDRAM_SIZE 0x00400000 /* 4 Mbyte */
-#else /* Old ADS */
-#define CFG_SDRAM_SIZE 0x00000000 /* No SDRAM */
-#endif
-
-#define CFG_MEMTEST_START 0x0100000 /* memtest works on */
-#if (CFG_SDRAM_SIZE)
-#define CFG_MEMTEST_END CFG_SDRAM_SIZE /* 1 ... SDRAM_SIZE */
-#else
-#define CFG_MEMTEST_END 0x0400000 /* 1 ... 4 MB in DRAM */
-#endif /* CFG_SDRAM_SIZE */
-
-/*
- * For booting Linux, the board info and command line data
- * have to be in the first 8 MB of memory, since this is
- * the maximum mapped by the Linux kernel during initialization.
- */
-#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
-
-#define CFG_MONITOR_BASE TEXT_BASE
-#define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 KB for monitor */
-
-#ifdef CONFIG_BZIP2
-#define CFG_MALLOC_LEN (2500 << 10) /* Reserve ~2.5 MB for malloc() */
-#else
-#define CFG_MALLOC_LEN (384 << 10) /* Reserve 384 kB for malloc() */
-#endif /* CONFIG_BZIP2 */
-
-/*-----------------------------------------------------------------------
- * Flash organization
- */
-#define CFG_FLASH_BASE CFG_MONITOR_BASE
-#define CFG_FLASH_SIZE ((uint)(8 * 1024 * 1024)) /* max 8Mbyte */
-
-#define CFG_MAX_FLASH_BANKS 4 /* max number of memory banks */
-#define CFG_MAX_FLASH_SECT 8 /* max number of sectors on one chip */
-
-#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
-#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
-
-#define CFG_ENV_IS_IN_FLASH 1
-#define CFG_ENV_SECT_SIZE 0x40000 /* see README - env sector total size */
-#define CFG_ENV_OFFSET CFG_ENV_SECT_SIZE
-#define CFG_ENV_SIZE 0x4000 /* Total Size of Environment */
-
-#define CFG_DIRECT_FLASH_TFTP
-
-#if (CONFIG_COMMANDS & CFG_CMD_JFFS2)
-
-/*
- * JFFS2 partitions
- *
- */
-/* No command line, one static partition, whole device */
-#undef CONFIG_JFFS2_CMDLINE
-#define CONFIG_JFFS2_DEV "nor0"
-#define CONFIG_JFFS2_PART_SIZE 0xFFFFFFFF
-#define CONFIG_JFFS2_PART_OFFSET 0x00000000
-
-/* mtdparts command line support */
-/* Note: fake mtd_id used, no linux mtd map file */
-/*
-#define CONFIG_JFFS2_CMDLINE
-#define MTDIDS_DEFAULT "nor0=fads0,nor1=fads-1,nor2=fads-2,nor3=fads-3"
-#define MTDPARTS_DEFAULT "mtdparts=fads-0:-@1m(user1),fads-1:-(user2),fads-2:-(user3),fads-3:-(user4)"
-*/
-
-#define CFG_JFFS2_SORT_FRAGMENTS
-#endif /* CFG_CMD_JFFS2 */
-
-/*-----------------------------------------------------------------------
- * Cache Configuration
- */
-#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
-#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
-#endif
-
-/*-----------------------------------------------------------------------
- * I2C configuration
- */
-#if (CONFIG_COMMANDS & CFG_CMD_I2C)
-#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
-#define CFG_I2C_SPEED 400000 /* I2C speed and slave address defaults */
-#define CFG_I2C_SLAVE 0x7F
-#endif
-
-/*-----------------------------------------------------------------------
- * SYPCR - System Protection Control 11-9
- * SYPCR can only be written once after reset!
- *-----------------------------------------------------------------------
- * Software & Bus Monitor Timer max, Bus Monitor enable, SW Watchdog freeze
- */
-#if defined(CONFIG_WATCHDOG)
-#define CFG_SYPCR (SYPCR_SWTC | SYPCR_BMT | SYPCR_BME | SYPCR_SWF | \
- SYPCR_SWE | SYPCR_SWRI| SYPCR_SWP)
-#else
-#define CFG_SYPCR (SYPCR_SWTC | SYPCR_BMT | SYPCR_BME | SYPCR_SWF | SYPCR_SWP)
-#endif
-
-/*-----------------------------------------------------------------------
- * SIUMCR - SIU Module Configuration 11-6
- *-----------------------------------------------------------------------
- * PCMCIA config., multi-function pin tri-state
- */
-#define CFG_SIUMCR (SIUMCR_DBGC00 | SIUMCR_DBPC00 | SIUMCR_MLRC01)
-
-/*-----------------------------------------------------------------------
- * TBSCR - Time Base Status and Control 11-26
- *-----------------------------------------------------------------------
- * Clear Reference Interrupt Status, Timebase freezing enabled
- */
-#define CFG_TBSCR (TBSCR_REFA | TBSCR_REFB | TBSCR_TBE)
-
-/*-----------------------------------------------------------------------
- * PISCR - Periodic Interrupt Status and Control 11-31
- *-----------------------------------------------------------------------
- * Clear Periodic Interrupt Status, Interrupt Timer freezing enabled
- */
-#define CFG_PISCR (PISCR_PS | PISCR_PITF)
-
-/*-----------------------------------------------------------------------
- * SCCR - System Clock and reset Control Register 15-27
- *-----------------------------------------------------------------------
- * Set clock output, timebase and RTC source and divider,
- * power management and some other internal clocks
- */
-#define SCCR_MASK SCCR_EBDF11
-#define CFG_SCCR (SCCR_TBS|SCCR_COM00|SCCR_DFSYNC00|SCCR_DFBRG00|SCCR_DFNL000|SCCR_DFNH000|SCCR_DFLCD000|SCCR_DFALCD00)
-
-/*-----------------------------------------------------------------------
- * PLPRCR - PLL, Low-Power, and Reset Control Register 14-22
- *-----------------------------------------------------------------------
- * set the PLL, the low-power modes and the reset control
- */
-#ifndef CFG_PLPRCR
-#define CFG_PLPRCR PLPRCR_TEXPS
-#endif
-
-/*-----------------------------------------------------------------------
- *
- *-----------------------------------------------------------------------
- *
- */
-#define CFG_DER 0
-
-/* Because of the way the 860 starts up and assigns CS0 the
-* entire address space, we have to set the memory controller
-* differently. Normally, you write the option register
-* first, and then enable the chip select by writing the
-* base register. For CS0, you must write the base register
-* first, followed by the option register.
-*/
-
-/*
- * Init Memory Controller:
- *
- * BR0/OR0 (Flash)
- * BR1/OR1 (BCSR)
- */
-/* the other CS:s are determined by looking at parameters in BCSRx */
-
-#define BCSR_ADDR ((uint) 0xFF080000)
-
-#define CFG_PRELIM_OR_AM 0xFF800000 /* OR addr mask */
-
-/* FLASH timing: ACS = 10, TRLX = 1, CSNT = 1, SCY = 3, EHTR = 0 */
-#define CFG_OR_TIMING_FLASH (OR_CSNT_SAM | OR_ACS_DIV4 | OR_BI | OR_SCY_3_CLK | OR_TRLX)
-
-#define CFG_OR0_PRELIM (CFG_PRELIM_OR_AM | CFG_OR_TIMING_FLASH) /* 8 Mbyte until detected */
-#define CFG_BR0_PRELIM ((CFG_FLASH_BASE & BR_BA_MSK) | BR_V )
-
-/* BCSRx - Board Control and Status Registers */
-#define CFG_OR1_PRELIM 0xFFFF8110 /* 64Kbyte address space */
-#define CFG_BR1_PRELIM ((BCSR_ADDR) | BR_V)
-
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
-/* values according to the manual */
-
-#define PCMCIA_MEM_ADDR ((uint)0xFF020000)
-#define PCMCIA_MEM_SIZE ((uint)(64 * 1024))
-
-#define BCSR0 ((uint) (BCSR_ADDR + 0x00))
-#define BCSR1 ((uint) (BCSR_ADDR + 0x04))
-#define BCSR2 ((uint) (BCSR_ADDR + 0x08))
-#define BCSR3 ((uint) (BCSR_ADDR + 0x0c))
-#define BCSR4 ((uint) (BCSR_ADDR + 0x10))
-
-/*
- * (F)ADS bitvalues by Helmut Buchsbaum
- *
- * See User's Manual for a proper
- * description of the following structures
- */
-
-#define BCSR0_ERB ((uint)0x80000000)
-#define BCSR0_IP ((uint)0x40000000)
-#define BCSR0_BDIS ((uint)0x10000000)
-#define BCSR0_BPS_MASK ((uint)0x0C000000)
-#define BCSR0_ISB_MASK ((uint)0x01800000)
-#define BCSR0_DBGC_MASK ((uint)0x00600000)
-#define BCSR0_DBPC_MASK ((uint)0x00180000)
-#define BCSR0_EBDF_MASK ((uint)0x00060000)
-
-#define BCSR1_FLASH_EN ((uint)0x80000000)
-#define BCSR1_DRAM_EN ((uint)0x40000000)
-#define BCSR1_ETHEN ((uint)0x20000000)
-#define BCSR1_IRDEN ((uint)0x10000000)
-#define BCSR1_FLASH_CFG_EN ((uint)0x08000000)
-#define BCSR1_CNT_REG_EN_PROTECT ((uint)0x04000000)
-#define BCSR1_BCSR_EN ((uint)0x02000000)
-#define BCSR1_RS232EN_1 ((uint)0x01000000)
-#define BCSR1_PCCEN ((uint)0x00800000)
-#define BCSR1_PCCVCC0 ((uint)0x00400000)
-#define BCSR1_PCCVPP_MASK ((uint)0x00300000)
-#define BCSR1_DRAM_HALF_WORD ((uint)0x00080000)
-#define BCSR1_RS232EN_2 ((uint)0x00040000)
-#define BCSR1_SDRAM_EN ((uint)0x00020000)
-#define BCSR1_PCCVCC1 ((uint)0x00010000)
-
-#define BCSR1_PCCVCCON BCSR1_PCCVCC0
-
-#define BCSR2_FLASH_PD_MASK ((uint)0xF0000000)
-#define BCSR2_FLASH_PD_SHIFT 28
-#define BCSR2_DRAM_PD_MASK ((uint)0x07800000)
-#define BCSR2_DRAM_PD_SHIFT 23
-#define BCSR2_EXTTOLI_MASK ((uint)0x00780000)
-#define BCSR2_DBREVNR_MASK ((uint)0x00030000)
-
-#define BCSR3_DBID_MASK ((ushort)0x3800)
-#define BCSR3_CNT_REG_EN_PROTECT ((ushort)0x0400)
-#define BCSR3_BREVNR0 ((ushort)0x0080)
-#define BCSR3_FLASH_PD_MASK ((ushort)0x0070)
-#define BCSR3_BREVN1 ((ushort)0x0008)
-#define BCSR3_BREVN2_MASK ((ushort)0x0003)
-
-#define BCSR4_ETHLOOP ((uint)0x80000000)
-#define BCSR4_TFPLDL ((uint)0x40000000)
-#define BCSR4_TPSQEL ((uint)0x20000000)
-#define BCSR4_SIGNAL_LAMP ((uint)0x10000000)
-#define BCSR4_FETH_EN ((uint)0x08000000)
-#define BCSR4_FETHCFG0 ((uint)0x04000000)
-#define BCSR4_FETHFDE ((uint)0x02000000)
-#define BCSR4_FETHCFG1 ((uint)0x00400000)
-#define BCSR4_FETHRST ((uint)0x00200000)
-
-#ifdef CONFIG_MPC823
-#define BCSR4_USB_EN ((uint)0x08000000)
-#endif /* CONFIG_MPC823 */
-#ifdef CONFIG_MPC860SAR
-#define BCSR4_UTOPIA_EN ((uint)0x08000000)
-#endif /* CONFIG_MPC860SAR */
-#ifdef CONFIG_MPC860T
-#define BCSR4_FETH_EN ((uint)0x08000000)
-#endif /* CONFIG_MPC860T */
-#ifdef CONFIG_MPC823
-#define BCSR4_USB_SPEED ((uint)0x04000000)
-#endif /* CONFIG_MPC823 */
-#ifdef CONFIG_MPC860T
-#define BCSR4_FETHCFG0 ((uint)0x04000000)
-#endif /* CONFIG_MPC860T */
-#ifdef CONFIG_MPC823
-#define BCSR4_VCCO ((uint)0x02000000)
-#endif /* CONFIG_MPC823 */
-#ifdef CONFIG_MPC860T
-#define BCSR4_FETHFDE ((uint)0x02000000)
-#endif /* CONFIG_MPC860T */
-#ifdef CONFIG_MPC823
-#define BCSR4_VIDEO_ON ((uint)0x00800000)
-#endif /* CONFIG_MPC823 */
-#ifdef CONFIG_MPC823
-#define BCSR4_VDO_EKT_CLK_EN ((uint)0x00400000)
-#endif /* CONFIG_MPC823 */
-#ifdef CONFIG_MPC860T
-#define BCSR4_FETHCFG1 ((uint)0x00400000)
-#endif /* CONFIG_MPC860T */
-#ifdef CONFIG_MPC823
-#define BCSR4_VIDEO_RST ((uint)0x00200000)
-#endif /* CONFIG_MPC823 */
-#ifdef CONFIG_MPC860T
-#define BCSR4_FETHRST ((uint)0x00200000)
-#endif /* CONFIG_MPC860T */
-#ifdef CONFIG_MPC823
-#define BCSR4_MODEM_EN ((uint)0x00100000)
-#endif /* CONFIG_MPC823 */
-#ifdef CONFIG_MPC823
-#define BCSR4_DATA_VOICE ((uint)0x00080000)
-#endif /* CONFIG_MPC823 */
-#ifdef CONFIG_MPC850
-#define BCSR4_DATA_VOICE ((uint)0x00080000)
-#endif /* CONFIG_MPC850 */
-
-/* BSCR5 exists on MPC86xADS and Duet ADS only */
-
-#define CFG_PHYDEV_ADDR (BCSR_ADDR + 0x20000)
-
-#define BCSR5 (CFG_PHYDEV_ADDR + 0x300)
-
-#define BCSR5_MII2_EN 0x40
-#define BCSR5_MII2_RST 0x20
-#define BCSR5_T1_RST 0x10
-#define BCSR5_ATM155_RST 0x08
-#define BCSR5_ATM25_RST 0x04
-#define BCSR5_MII1_EN 0x02
-#define BCSR5_MII1_RST 0x01
-
-/* We don't use the 8259.
-*/
-#define NR_8259_INTS 0
-
-/* Machine type
-*/
-#define _MACH_8xx (_MACH_fads)
-
-/*-----------------------------------------------------------------------
- * PCMCIA stuff
- *-----------------------------------------------------------------------
- */
-#define CFG_PCMCIA_MEM_ADDR (0xE0000000)
-#define CFG_PCMCIA_MEM_SIZE ( 64 << 20 )
-#define CFG_PCMCIA_DMA_ADDR (0xE4000000)
-#define CFG_PCMCIA_DMA_SIZE ( 64 << 20 )
-#define CFG_PCMCIA_ATTRB_ADDR (0xE8000000)
-#define CFG_PCMCIA_ATTRB_SIZE ( 64 << 20 )
-#define CFG_PCMCIA_IO_ADDR (0xEC000000)
-#define CFG_PCMCIA_IO_SIZE ( 64 << 20 )
-
-/*-----------------------------------------------------------------------
- * IDE/ATA stuff
- *-----------------------------------------------------------------------
- */
-#define CONFIG_MAC_PARTITION 1
-#define CONFIG_DOS_PARTITION 1
-#define CONFIG_ISO_PARTITION 1
-
-#undef CONFIG_ATAPI
-#define CONFIG_IDE_8xx_PCCARD 1 /* Use IDE with PC Card Adapter */
-#undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */
-#undef CONFIG_IDE_LED /* LED for ide not supported */
-#undef CONFIG_IDE_RESET /* reset for ide not supported */
-
-#define CFG_IDE_MAXBUS 1 /* max. 2 IDE busses */
-#define CFG_IDE_MAXDEVICE (CFG_IDE_MAXBUS*2) /* max. 2 drives per IDE bus */
-
-#define CFG_ATA_BASE_ADDR CFG_PCMCIA_MEM_ADDR
-#define CFG_ATA_IDE0_OFFSET 0x0000
-
-/* Offset for data I/O */
-#define CFG_ATA_DATA_OFFSET (CFG_PCMCIA_MEM_SIZE + 0x320)
-/* Offset for normal register accesses */
-#define CFG_ATA_REG_OFFSET (2 * CFG_PCMCIA_MEM_SIZE + 0x320)
-/* Offset for alternate registers */
-#define CFG_ATA_ALT_OFFSET 0x0000
-
-#define CONFIG_DISK_SPINUP_TIME 1000000
-#undef CONFIG_DISK_SPINUP_TIME /* usin´ Compact Flash */
diff --git a/board/fads/flash.c b/board/fads/flash.c
deleted file mode 100644
index f0fb621271..0000000000
--- a/board/fads/flash.c
+++ /dev/null
@@ -1,560 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-#if defined(CFG_ENV_IS_IN_FLASH)
-# ifndef CFG_ENV_ADDR
-# define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_ENV_OFFSET)
-# endif
-# ifndef CFG_ENV_SIZE
-# define CFG_ENV_SIZE CFG_ENV_SECT_SIZE
-# endif
-# ifndef CFG_ENV_SECT_SIZE
-# define CFG_ENV_SECT_SIZE CFG_ENV_SIZE
-# endif
-#endif
-
-#define QUAD_ID(id) ((((ulong)(id) & 0xFF) << 24) | \
- (((ulong)(id) & 0xFF) << 16) | \
- (((ulong)(id) & 0xFF) << 8) | \
- (((ulong)(id) & 0xFF) << 0) \
- )
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (vu_long * addr, flash_info_t * info);
-static int write_word (flash_info_t * info, ulong dest, ulong data);
-
-/*-----------------------------------------------------------------------
- */
-unsigned long flash_init (void)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- vu_long *bcsr = (vu_long *)BCSR_ADDR;
- unsigned long pd_size, total_size, bsize, or_am;
- int i;
-
- /* Init: no FLASHes known */
- for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- flash_info[i].size = 0;
- flash_info[i].sector_count = 0;
- flash_info[i].start[0] = 0xFFFFFFFF; /* For TFTP */
- }
-
- switch ((bcsr[2] & BCSR2_FLASH_PD_MASK) >> BCSR2_FLASH_PD_SHIFT) {
- case 2:
- case 4:
- case 6:
- pd_size = 0x800000;
- or_am = 0xFF800000;
- break;
-
- case 5:
- case 7:
- pd_size = 0x400000;
- or_am = 0xFFC00000;
- break;
-
- case 8:
- pd_size = 0x200000;
- or_am = 0xFFE00000;
- break;
-
- default:
- pd_size = 0;
- or_am = 0xFFE00000;
- printf("## Unsupported flash detected by BCSR: 0x%08X\n", bcsr[2]);
- }
-
- total_size = 0;
- for (i = 0; i < CFG_MAX_FLASH_BANKS && total_size < pd_size; ++i) {
- bsize = flash_get_size((vu_long *)(CFG_FLASH_BASE + total_size),
- &flash_info[i]);
-
- if (flash_info[i].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n",
- i, bsize, bsize >> 20);
- }
-
- total_size += bsize;
- }
-
- if (total_size != pd_size) {
- printf("## Detected flash size %lu conflicts with PD data %lu\n",
- total_size, pd_size);
- }
-
- /* Remap FLASH according to real size */
- memctl->memc_or0 = or_am | CFG_OR_TIMING_FLASH;
-
- for (i = 0; i < CFG_MAX_FLASH_BANKS && flash_info[i].size != 0; ++i) {
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
- /* monitor protection ON by default */
- if (CFG_MONITOR_BASE >= flash_info[i].start[0])
- flash_protect (FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE + monitor_flash_len - 1,
- &flash_info[i]);
-#endif
-
-#ifdef CFG_ENV_IS_IN_FLASH
- /* ENV protection ON by default */
- if (CFG_ENV_ADDR >= flash_info[i].start[0])
- flash_protect (FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1,
- &flash_info[i]);
-#endif
- }
-
- return total_size;
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t * info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD:
- printf ("AMD ");
- break;
- case FLASH_MAN_FUJ:
- printf ("FUJITSU ");
- break;
- case FLASH_MAN_BM:
- printf ("BRIGHT MICRO ");
- break;
- default:
- printf ("Unknown Vendor ");
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM040:
- printf ("29F040 or 29LV040 (4 Mbit, uniform sectors)\n");
- break;
- case FLASH_AM080:
- printf ("29F080 or 29LV080 (8 Mbit, uniform sectors)\n");
- break;
- case FLASH_AM400B:
- printf ("AM29LV400B (4 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM400T:
- printf ("AM29LV400T (4 Mbit, top boot sector)\n");
- break;
- case FLASH_AM800B:
- printf ("AM29LV800B (8 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM800T:
- printf ("AM29LV800T (8 Mbit, top boot sector)\n");
- break;
- case FLASH_AM160B:
- printf ("AM29LV160B (16 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM160T:
- printf ("AM29LV160T (16 Mbit, top boot sector)\n");
- break;
- case FLASH_AM320B:
- printf ("AM29LV320B (32 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM320T:
- printf ("AM29LV320T (32 Mbit, top boot sector)\n");
- break;
- default:
- printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n", info->size >> 20,
- info->sector_count);
-
- printf (" Sector Start Addresses:");
-
- for (i = 0; i < info->sector_count; ++i) {
- if ((i % 5) == 0) {
- printf ("\n ");
- }
-
- printf (" %08lX%s",
- info->start[i], info->protect[i] ? " (RO)" : " ");
- }
-
- printf ("\n");
-}
-
-/*-----------------------------------------------------------------------
- * The following code can not run from flash!
- */
-static ulong flash_get_size (vu_long * addr, flash_info_t * info)
-{
- short i;
-
- /* Write auto select command: read Manufacturer ID */
- addr[0x0555] = 0xAAAAAAAA;
- addr[0x02AA] = 0x55555555;
- addr[0x0555] = 0x90909090;
-
- switch (addr[0]) {
- case QUAD_ID(AMD_MANUFACT):
- info->flash_id = FLASH_MAN_AMD;
- break;
-
- case QUAD_ID(FUJ_MANUFACT):
- info->flash_id = FLASH_MAN_FUJ;
- break;
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- break;
- }
-
- switch (addr[1]) { /* device ID */
- case QUAD_ID(AMD_ID_F040B):
- case QUAD_ID(AMD_ID_LV040B):
- info->flash_id += FLASH_AM040;
- info->sector_count = 8;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case QUAD_ID(AMD_ID_F080B):
- info->flash_id += FLASH_AM080;
- info->sector_count = 16;
- info->size = 0x00400000;
- break; /* => 4 MB */
-#if 0
- case AMD_ID_LV400T:
- info->flash_id += FLASH_AM400T;
- info->sector_count = 11;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case AMD_ID_LV400B:
- info->flash_id += FLASH_AM400B;
- info->sector_count = 11;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case AMD_ID_LV800T:
- info->flash_id += FLASH_AM800T;
- info->sector_count = 19;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case AMD_ID_LV800B:
- info->flash_id += FLASH_AM800B;
- info->sector_count = 19;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case AMD_ID_LV160T:
- info->flash_id += FLASH_AM160T;
- info->sector_count = 35;
- info->size = 0x00400000;
- break; /* => 4 MB */
-
- case AMD_ID_LV160B:
- info->flash_id += FLASH_AM160B;
- info->sector_count = 35;
- info->size = 0x00400000;
- break; /* => 4 MB */
-
- case AMD_ID_LV320T:
- info->flash_id += FLASH_AM320T;
- info->sector_count = 67;
- info->size = 0x00800000;
- break; /* => 8 MB */
-
- case AMD_ID_LV320B:
- info->flash_id += FLASH_AM320B;
- info->sector_count = 67;
- info->size = 0x00800000;
- break; /* => 8 MB */
-#endif /* 0 */
- default:
- info->flash_id = FLASH_UNKNOWN;
- return (0); /* => no or unknown flash */
- }
-
-#if 0
- /* set up sector start address table */
- if (info->flash_id & FLASH_BTYPE) {
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00008000;
- info->start[2] = base + 0x0000C000;
- info->start[3] = base + 0x00010000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00020000) - 0x00060000;
- }
- } else {
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- info->start[i--] = base + info->size - 0x00008000;
- info->start[i--] = base + info->size - 0x0000C000;
- info->start[i--] = base + info->size - 0x00010000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00020000;
- }
- }
-#else
- /* set sector offsets for uniform sector type */
- for (i = 0; i < info->sector_count; i++)
- info->start[i] = (ulong)addr + (i * 0x00040000);
-#endif
-
- /* check for protected sectors */
- for (i = 0; i < info->sector_count; i++) {
- /* read sector protection at sector address, (A7 .. A0) = 0x02 */
- /* D0 = 1 if protected */
- addr = (volatile unsigned long *) (info->start[i]);
- info->protect[i] = addr[2] & 1;
- }
-
- if (info->flash_id != FLASH_UNKNOWN) {
- addr = (volatile unsigned long *) info->start[0];
- *addr = 0xF0F0F0F0; /* reset bank */
- }
-
- return (info->size);
-}
-
-/*-----------------------------------------------------------------------
- */
-int flash_erase (flash_info_t * info, int s_first, int s_last)
-{
- vu_long *addr = (vu_long *) (info->start[0]);
- int flag, prot, sect, l_sect;
- ulong start, now, last;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return ERR_INVAL;
- }
-
- if ((info->flash_id == FLASH_UNKNOWN) ||
- (info->flash_id > FLASH_AMD_COMP)) {
- printf ("Can't erase unknown flash type - aborted\n");
- return ERR_UNKNOWN_FLASH_TYPE;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n", prot);
- } else {
- printf ("\n");
- }
-
- l_sect = -1;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
-
- addr[0x0555] = 0xAAAAAAAA;
- addr[0x02AA] = 0x55555555;
- addr[0x0555] = 0x80808080;
- addr[0x0555] = 0xAAAAAAAA;
- addr[0x02AA] = 0x55555555;
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr = (vu_long *) (info->start[sect]);
- addr[0] = 0x30303030;
- l_sect = sect;
- }
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts ();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- /*
- * We wait for the last triggered sector
- */
- if (l_sect < 0)
- goto DONE;
-
- start = get_timer (0);
- last = start;
- addr = (vu_long *) (info->start[l_sect]);
- while ((addr[0] & 0xFFFFFFFF) != 0xFFFFFFFF)
- {
- if ((now = get_timer (start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- return ERR_TIMOUT;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- }
-
- DONE:
- /* reset to read mode */
- addr = (volatile unsigned long *) info->start[0];
- addr[0] = 0xF0F0F0F0; /* reset bank */
-
- printf (" done\n");
-
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int i, l, rc;
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i = 0, cp = wp; i < l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
- for (; i < 4 && cnt > 0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt == 0 && i < 4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
-
- if ((rc = write_word (info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = 0;
- for (i = 0; i < 4; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_word (info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i = 0, cp = wp; i < 4 && cnt > 0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i < 4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
-
- return (write_word (info, wp, data));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word (flash_info_t * info, ulong dest, ulong data)
-{
- vu_long *addr = (vu_long *) (info->start[0]);
- ulong start;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*((vu_long *) dest) & data) != data) {
- return ERR_NOT_ERASED;
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
-
- addr[0x0555] = 0xAAAAAAAA;
- addr[0x02AA] = 0x55555555;
- addr[0x0555] = 0xA0A0A0A0;
-
- *((vu_long *) dest) = data;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts ();
-
- /* data polling for D7 */
- start = get_timer (0);
- while ((*((vu_long *) dest) & 0x80808080) != (data & 0x80808080))
- {
- if (get_timer (start) > CFG_FLASH_WRITE_TOUT) {
- return ERR_TIMOUT;
- }
- }
- return (0);
-}
diff --git a/board/fads/lamp.c b/board/fads/lamp.c
deleted file mode 100644
index 4e58291c06..0000000000
--- a/board/fads/lamp.c
+++ /dev/null
@@ -1,47 +0,0 @@
-#include <config.h>
-
-#ifndef CONFIG_ADS /* Old ADS has not got any user-controllable LED */
-
-#include <common.h>
-
-void
-signal_delay(unsigned int n)
-{
- while (n--);
-}
-
-void
-signal_on(void)
-{
- *((volatile uint *)BCSR4) &= ~(1<<(31-3)); /* led on */
-}
-
-void
-signal_off(void)
-{
- *((volatile uint *)BCSR4) |= (1<<(31-3)); /* led off */
-}
-
-void
-slow_blink(unsigned int n)
-{
- while (n--) {
- signal_on();
- signal_delay(0x00400000);
- signal_off();
- signal_delay(0x00400000);
- }
-}
-
-void
-fast_blink(unsigned int n)
-{
- while (n--) {
- signal_on();
- signal_delay(0x00100000);
- signal_off();
- signal_delay(0x00100000);
- }
-}
-
-#endif /* !CONFIG_ADS */
diff --git a/board/fads/u-boot.lds b/board/fads/u-boot.lds
deleted file mode 100644
index 21a2d9e32a..0000000000
--- a/board/fads/u-boot.lds
+++ /dev/null
@@ -1,131 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc8xx/start.o (.text)
-
- /*. = DEFINED(env_offset) ? env_offset : .;*/
- common/environment.o (.ppcenv)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
-ENTRY(_start)
diff --git a/board/fads/u-boot.lds.debug b/board/fads/u-boot.lds.debug
deleted file mode 100644
index 650572d4d0..0000000000
--- a/board/fads/u-boot.lds.debug
+++ /dev/null
@@ -1,138 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc8xx/start.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/extable.o (.text)
-
- . = env_offset;
- common/environment.o(.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/flagadm/Makefile b/board/flagadm/Makefile
deleted file mode 100644
index 7a2014d466..0000000000
--- a/board/flagadm/Makefile
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/flagadm/config.mk b/board/flagadm/config.mk
deleted file mode 100644
index 9c72c79d3b..0000000000
--- a/board/flagadm/config.mk
+++ /dev/null
@@ -1,28 +0,0 @@
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# TQM8xxL boards
-#
-
-TEXT_BASE = 0x40000000
diff --git a/board/flagadm/flagadm.c b/board/flagadm/flagadm.c
deleted file mode 100644
index 9c553676ec..0000000000
--- a/board/flagadm/flagadm.c
+++ /dev/null
@@ -1,150 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-
-#define _NOT_USED_ 0xFFFFFFFF
-
-/*Orginal table, GPL4 disabled*/
-const uint sdram_table[] =
-{
- /* single read (offset 0x00 in upm ram) */
- 0x1f07cc04, 0xeeaeec04, 0x11adcc04, 0xefbbac00,
- 0x1ff74c47,
- /* Precharge */
- 0x1FF74C05,
- _NOT_USED_,
- _NOT_USED_,
- /* burst read (offset 0x08 in upm ram) */
- 0x1f07cc04, 0xeeaeec04, 0x00adcc04, 0x00afcc00,
- 0x00afcc00, 0x01afcc00, 0x0fbb8c00, 0x1ff74c47,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /* single write (offset 0x18 in upm ram) */
- 0x1f27cc04, 0xeeaeac00, 0x01b90c04, 0x1ff74c47,
- /* Load moderegister */
- 0x1FF74C34, /*Precharge*/
- 0xEFEA8C34, /*NOP*/
- 0x1FB54C35, /*Load moderegister*/
- _NOT_USED_,
-
- /* burst write (offset 0x20 in upm ram) */
- 0x1f07cc04, 0xeeaeac00, 0x00ad4c00, 0x00afcc00,
- 0x00afcc00, 0x01bb8c04, 0x1ff74c47, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /* refresh (offset 0x30 in upm ram) */
- 0x1ff5cc84, 0xffffec04, 0xffffec04, 0xffffec04,
- 0xffffec84, 0xffffec07, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /* exception (offset 0x3C in upm ram) */
- 0x7fffec07, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-};
-
-/* GPL5 driven every cycle */
-/* the display and the DSP */
-const uint dsp_disp_table[] =
-{
- /* single read (offset 0x00 in upm ram) */
- 0xffffc80c, 0xffffc004, 0x0fffc004, 0x0fffd004,
- 0x0fffc000, 0x0fffc004, 0x3fffc004, 0xffffcc05,
- /* burst read (offset 0x08 in upm ram) */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /* single write (offset 0x18 in upm ram) */
- 0xffffcc0c, 0xffffc004, 0x0fffc004, 0x0fffd004,
- 0x0fffc000, 0x0fffc004, 0x7fffc004, 0xfffffc05,
- /* burst write (offset 0x20 in upm ram) */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /* refresh (offset 0x30 in upm ram) */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /* exception (offset 0x3C in upm ram) */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-};
-
-int checkboard (void)
-{
- puts ("Board: FlagaDM V3.0\n");
- return 0;
-}
-
-long int initdram (int board_type)
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- long int size_b0;
-
- memctl->memc_or2 = CFG_OR2;
- memctl->memc_br2 = CFG_BR2;
-
- udelay(100);
- upmconfig(UPMA, (uint *)sdram_table, sizeof(sdram_table)/sizeof(uint));
-
- memctl->memc_mptpr = MPTPR_PTP_DIV16;
- memctl->memc_mamr = CFG_MAMR_48_SDR | MAMR_TLFA_1X;
-
- /*Do the initialization of the SDRAM*/
- /*Start with the precharge cycle*/
- memctl->memc_mcr = (MCR_OP_RUN | MCR_UPM_A | MCR_MB_CS2 | \
- MCR_MLCF(1) | MCR_MAD(0x5));
-
- /*Then we need two refresh cycles*/
- memctl->memc_mamr = CFG_MAMR_48_SDR | MAMR_TLFA_2X;
- memctl->memc_mcr = (MCR_OP_RUN | MCR_UPM_A | MCR_MB_CS2 | \
- MCR_MLCF(2) | MCR_MAD(0x30));
-
- /*Mode register programming*/
- memctl->memc_mar = 0x00000088; /*CAS Latency = 2 and burst length = 4*/
- memctl->memc_mcr = (MCR_OP_RUN | MCR_UPM_A | MCR_MB_CS2 | \
- MCR_MLCF(1) | MCR_MAD(0x1C));
-
- /* That should do it, just enable the periodic refresh in burst of 4*/
- memctl->memc_mamr = CFG_MAMR_48_SDR | MAMR_TLFA_4X;
- memctl->memc_mamr |= (MAMR_PTAE | MAMR_GPL_A4DIS);
-
- size_b0 = 16*1024*1024;
-
- /*
- * No bank 1 or 3
- * invalidate bank
- */
- memctl->memc_br1 = 0;
- memctl->memc_br3 = 0;
-
- upmconfig(UPMB, (uint *)dsp_disp_table, sizeof(dsp_disp_table)/sizeof(uint));
-
- memctl->memc_mbmr = MBMR_GPL_B4DIS;
-
- memctl->memc_or4 = CFG_OR4;
- memctl->memc_br4 = CFG_BR4;
-
- return (size_b0);
-}
diff --git a/board/flagadm/flash.c b/board/flagadm/flash.c
deleted file mode 100644
index fd0082c135..0000000000
--- a/board/flagadm/flash.c
+++ /dev/null
@@ -1,697 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-#include <flash.h>
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-ulong flash_recognize (vu_long *base);
-int write_word (flash_info_t *info, ulong dest, ulong data);
-void flash_get_geometry (vu_long *base, flash_info_t *info);
-void flash_unprotect(flash_info_t *info);
-int _flash_real_protect(flash_info_t *info, long idx, int on);
-
-
-unsigned long flash_init (void)
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- int i;
- int rec;
-
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- *((vu_short*)CFG_FLASH_BASE) = 0xffff;
-
- flash_get_geometry ((vu_long*)CFG_FLASH_BASE, &flash_info[0]);
-
- /* Remap FLASH according to real size */
- memctl->memc_or0 = CFG_OR_TIMING_FLASH | (-flash_info[0].size & 0xFFFF8000);
- memctl->memc_br0 = (CFG_FLASH_BASE & BR_BA_MSK) |
- (memctl->memc_br0 & ~(BR_BA_MSK));
-
- rec = flash_recognize((vu_long*)CFG_FLASH_BASE);
-
- if (rec == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- flash_info[0].size, flash_info[0].size<<20);
- }
-
-#if CFG_FLASH_PROTECTION
- /*Unprotect all the flash memory*/
- flash_unprotect(&flash_info[0]);
-#endif
-
- *((vu_short*)CFG_FLASH_BASE) = 0xffff;
-
- return (flash_info[0].size);
-
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
- /* monitor protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+monitor_flash_len-1,
- &flash_info[0]);
-#endif
-
-#ifdef CFG_ENV_IS_IN_FLASH
- /* ENV protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_OFFSET,
- CFG_ENV_OFFSET+CFG_ENV_SIZE-1,
- &flash_info[0]);
-#endif
- return (flash_info[0].size);
-}
-
-
-int flash_get_protect_status(flash_info_t * info, long idx)
-{
- vu_short * base;
- ushort res;
-
-#ifdef DEBUG
- printf("\n Attempting to set protection info with %d sectors\n", info->sector_count);
-#endif
-
-
- base = (vu_short*)info->start[idx];
-
- *(base) = 0xffff;
-
- *(base + 0x55) = 0x0098;
- res = base[0x2];
-
- *(base) = 0xffff;
-
- if(res != 0)
- res = 1;
- else
- res = 0;
-
- return res;
-}
-
-void flash_get_geometry (vu_long *base, flash_info_t *info)
-{
- int i,j;
- ulong ner = 0;
- vu_short * sb = (vu_short*)base;
- ulong offset = (ulong)base;
-
- /* Read Device geometry */
-
- *sb = 0xffff;
-
- *sb = 0x0090;
-
- info->flash_id = ((ulong)base[0x0]);
-#ifdef DEBUG
- printf("Id is %x\n", (uint)(ulong)info->flash_id);
-#endif
-
- *sb = 0xffff;
-
- *(sb+0x55) = 0x0098;
-
- info->size = 1 << (sb[0x27]); /* Read flash size */
-
-#ifdef DEBUG
- printf("Size is %x\n", (uint)(ulong)info->size);
-#endif
-
- *sb = 0xffff;
-
- *(sb + 0x55) = 0x0098;
- ner = sb[0x2c] ; /*Number of erase regions*/
-
-#ifdef DEBUG
- printf("Number of erase regions %x\n", (uint)ner);
-#endif
-
- info->sector_count = 0;
-
- for(i = 0; i < ner; i++)
- {
- uint s;
- uint count;
- uint t1,t2,t3,t4;
-
- *sb = 0xffff;
-
- *(sb + 0x55) = 0x0098;
-
- t1 = sb[0x2d + i*4];
- t2 = sb[0x2e + i*4];
- t3 = sb[0x2f + i*4];
- t4 = sb[0x30 + i*4];
-
- count = ((t1 & 0x00ff) | (((t2 & 0x00ff) << 8) & 0xff00) )+ 1; /*sector count*/
- s = ((t3 & 0x00ff) | (((t4 & 0x00ff) << 8) & 0xff00)) * 256;; /*Sector size*/
-
-#ifdef DEBUG
- printf("count and size %x, %x\n", count, s);
- printf("sector count for erase region %d is %d\n", i, count);
-#endif
- for(j = 0; j < count; j++)
- {
-#ifdef DEBUG
- printf("%x, ", (uint)offset);
-#endif
- info->start[ info->sector_count + j] = offset;
- offset += s;
- }
- info->sector_count += count;
- }
-
- if ((offset - (ulong)base) != info->size)
- printf("WARNING reported size %x does not match to calculted size %x.\n"
- , (uint)info->size, (uint)(offset - (ulong)base) );
-
- /* Next check if there are any sectors protected.*/
-
- for(i = 0; i < info->sector_count; i++)
- info->protect[i] = flash_get_protect_status(info, i);
-
- *sb = 0xffff;
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return ;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case INTEL_MANUFACT & FLASH_VENDMASK:
- printf ("Intel ");
- break;
- default:
- printf ("Unknown Vendor ");
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case INTEL_ID_28F320C3B & FLASH_TYPEMASK:
- printf ("28F320RC3(4 MB)\n");
- break;
- case INTEL_ID_28F320J3A:
- printf("28F320J3A (4 MB)\n");
- break;
- default:
- printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
- if ((i % 4) == 0)
- printf ("\n ");
- printf (" %02d %08lX%s",
- i, info->start[i],
- info->protect[i]!=0 ? " (RO)" : " "
- );
- }
- printf ("\n");
- return ;
-}
-
-ulong flash_recognize (vu_long *base)
-{
- ulong id;
- ulong res = FLASH_UNKNOWN;
- vu_short * sb = (vu_short*)base;
-
- *sb = 0xffff;
-
- *sb = 0x0090;
- id = base[0];
-
- switch (id & 0x00FF0000)
- {
- case (MT_MANUFACT & 0x00FF0000): /* MT or => Intel */
- case (INTEL_ALT_MANU & 0x00FF0000):
- res = FLASH_MAN_INTEL;
- break;
- default:
- res = FLASH_UNKNOWN;
- }
-
- *sb = 0xffff;
-
- return res;
-}
-
-/*-----------------------------------------------------------------------*/
-#define INTEL_FLASH_STATUS_BLS 0x02
-#define INTEL_FLASH_STATUS_PSS 0x04
-#define INTEL_FLASH_STATUS_VPPS 0x08
-#define INTEL_FLASH_STATUS_PS 0x10
-#define INTEL_FLASH_STATUS_ES 0x20
-#define INTEL_FLASH_STATUS_ESS 0x40
-#define INTEL_FLASH_STATUS_WSMS 0x80
-
-int flash_decode_status_bits(char status)
-{
- int err = 0;
-
- if(!(status & INTEL_FLASH_STATUS_WSMS)) {
- printf("Busy\n");
- err = -1;
- }
-
- if(status & INTEL_FLASH_STATUS_ESS) {
- printf("Erase suspended\n");
- err = -1;
- }
-
- if(status & INTEL_FLASH_STATUS_ES) {
- printf("Error in block erase\n");
- err = -1;
- }
-
- if(status & INTEL_FLASH_STATUS_PS) {
- printf("Error in programming\n");
- err = -1;
- }
-
- if(status & INTEL_FLASH_STATUS_VPPS) {
- printf("Vpp low, operation aborted\n");
- err = -1;
- }
-
- if(status & INTEL_FLASH_STATUS_PSS) {
- printf("Program is suspended\n");
- err = -1;
- }
-
- if(status & INTEL_FLASH_STATUS_BLS) {
- printf("Attempting to program/erase a locked sector\n");
- err = -1;
- }
-
- if((status & INTEL_FLASH_STATUS_PS) &&
- (status & INTEL_FLASH_STATUS_ES) &&
- (status & INTEL_FLASH_STATUS_ESS)) {
- printf("A command sequence error\n");
- return -1;
- }
-
- return err;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- vu_short *addr;
- int flag, prot, sect;
- ulong start, now;
- int rcode = 0;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- if ((info->flash_id & FLASH_VENDMASK) != (INTEL_MANUFACT & FLASH_VENDMASK)) {
- printf ("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- start = get_timer (0);
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
- char tmp;
-
- if (info->protect[sect] == 0) { /* not protected */
- addr = (vu_short *)(info->start[sect]);
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- /* Single Block Erase Command */
- *addr = 0x0020;
- /* Confirm */
- *addr = 0x00D0;
- /* Resume Command, as per errata update */
- *addr = 0x00D0;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- *addr = 0x70; /*Read status register command*/
- tmp = (short)*addr & 0x00FF; /* Read the status */
- while (!(tmp & INTEL_FLASH_STATUS_WSMS)) {
- if ((now=get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- *addr = 0x0050; /* Reset the status register */
- *addr = 0xffff;
- printf ("Timeout\n");
- return 1;
- }
- /* show that we're waiting */
- if ((now - start) > 1000) { /* every second */
- putc ('.');
- }
- udelay(100000); /* 100 ms */
- *addr = 0x0070; /*Read status register command*/
- tmp = (short)*addr & 0x00FF; /* Read status */
- start = get_timer(0);
- }
- if( tmp & INTEL_FLASH_STATUS_ES )
- flash_decode_status_bits(tmp);
-
- *addr = 0x0050; /* Reset the status register */
- *addr = 0xffff; /* Reset to read mode */
- }
- }
-
-
- printf (" done\n");
- return rcode;
-}
-
-void flash_unprotect (flash_info_t *info)
-{
- /*We can only unprotect the whole flash at once*/
- /*Therefore we must prevent the _flash_real_protect()*/
- /*from re-protecting sectors, that ware protected before */
- /*we called flash_real_protect();*/
-
- int i;
-
- for(i = 0; i < info->sector_count; i++)
- info->protect[i] = 0;
-
-#ifdef CFG_FLASH_PROTECTION
- _flash_real_protect(info, 0, 0);
-#endif
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int i, l, rc;
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
- for (; i<4 && cnt>0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = 0;
- for (i=0; i<4; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- return (write_word(info, wp, data));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-int write_word (flash_info_t *info, ulong dest, ulong da)
-{
- vu_short *addr = (vu_short *)dest;
- ulong start;
- char csr;
- int flag;
- ushort * d = (ushort*)&da;
- int i;
-
- /* Check if Flash is (sufficiently) erased */
- if (((*addr & d[0]) != d[0]) || ((*(addr+1) & d[1]) != d[1])) {
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- for(i = 0; i < 2; i++)
- {
- /* Write Command */
- *addr = 0x0010;
-
- /* Write Data */
- *addr = d[i];
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* data polling for D7 */
- start = get_timer (0);
- flag = 0;
- *addr = 0x0070; /*Read statusregister command */
- while (((csr = *addr) & INTEL_FLASH_STATUS_WSMS)!=INTEL_FLASH_STATUS_WSMS) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- flag = 1;
- break;
- }
- *addr = 0x0070; /*Read statusregister command */
- }
- if (csr & INTEL_FLASH_STATUS_PSS) {
- printf ("CSR indicates write error (%0x) at %08lx\n",
- csr, (ulong)addr);
- flag = 1;
- }
-
- /* Clear Status Registers Command */
- *addr = 0x0050;
- /* Reset to read array mode */
- *addr = 0xffff;
- addr++;
- }
-
- return (flag);
-}
-
-int flash_real_protect(flash_info_t *info, long offset, int prot)
-{
- int i, idx;
-
- for(idx = 0; idx < info->sector_count; idx++)
- if(info->start[idx] == offset)
- break;
-
- if(idx==info->sector_count)
- return -1;
-
- if(prot == 0) {
- /* Unprotect one sector, which means unprotect all flash
- * and reprotect the other protected sectors.
- */
- _flash_real_protect(info, 0, 0); /* Unprotects the whole flash*/
- info->protect[idx] = 0;
-
- for(i = 0; i < info->sector_count; i++)
- if(info->protect[i])
- _flash_real_protect(info, i, 1);
- }
- else {
- /* We can protect individual sectors */
- _flash_real_protect(info, idx, 1);
- }
-
- for( i = 0; i < info->sector_count; i++)
- info->protect[i] = flash_get_protect_status(info, i);
-
- return 0;
-}
-
-int _flash_real_protect(flash_info_t *info, long idx, int prot)
-{
- vu_short *addr;
- int flag;
- ushort cmd;
- ushort tmp;
- ulong now, start;
-
- if ((info->flash_id & FLASH_VENDMASK) != (INTEL_MANUFACT & FLASH_VENDMASK)) {
- printf ("Can't change protection for unknown flash type %08lx - aborted\n",
- info->flash_id);
- return -1;
- }
-
- if(prot == 0) {
- /*Unlock the sector*/
- cmd = 0x00D0;
- }
- else {
- /*Lock the sector*/
- cmd = 0x0001;
- }
-
- addr = (vu_short *)(info->start[idx]);
-
- /* If chip is busy, wait for it */
- start = get_timer(0);
- *addr = 0x0070; /*Read status register command*/
- tmp = ((ushort)(*addr))&0x00ff; /*Read the status*/
- while(!(tmp & INTEL_FLASH_STATUS_WSMS)) {
- /*Write State Machine Busy*/
- /*Wait untill done or timeout.*/
- if ((now=get_timer(start)) > CFG_FLASH_WRITE_TOUT) {
- *addr = 0x0050; /* Reset the status register */
- *addr = 0xffff; /* Reset the chip */
- printf ("TTimeout\n");
- return 1;
- }
- *addr = 0x0070;
- tmp = ((ushort)(*addr))&0x00ff; /*Read the status*/
- start = get_timer(0);
- }
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- /* Unlock block*/
- *addr = 0x0060;
-
- *addr = cmd;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- start = get_timer(0);
- *addr = 0x0070; /*Read status register command*/
- tmp = ((ushort)(*addr)) & 0x00FF; /* Read the status */
- while (!(tmp & INTEL_FLASH_STATUS_WSMS)) {
- /* Write State Machine Busy */
- if ((now=get_timer(start)) > CFG_FLASH_WRITE_TOUT) {
- *addr = 0x0050; /* Reset the status register */
- *addr = 0xffff;
- printf ("Timeout\n");
- return 1;
- }
- /* show that we're waiting */
- if ((now - start) > 1000) { /* every second */
- putc ('.');
- }
- udelay(100000); /* 100 ms */
- *addr = 0x70; /*Read status register command*/
- tmp = (short)*addr & 0x00FF; /* Read status */
- start = get_timer(0);
- }
- if( tmp & INTEL_FLASH_STATUS_PS )
- flash_decode_status_bits(tmp);
-
- *addr =0x0050; /*Clear status register*/
-
- /* reset to read mode */
- *addr = 0xffff;
-
- return 0;
-}
diff --git a/board/flagadm/u-boot.lds b/board/flagadm/u-boot.lds
deleted file mode 100644
index 04995ea756..0000000000
--- a/board/flagadm/u-boot.lds
+++ /dev/null
@@ -1,130 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc8xx/start.o (.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/flagadm/u-boot.lds.debug b/board/flagadm/u-boot.lds.debug
deleted file mode 100644
index 3165d56345..0000000000
--- a/board/flagadm/u-boot.lds.debug
+++ /dev/null
@@ -1,137 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc8xx/start.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
-
- . = env_offset;
- common/environment.o(.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/funkwerk/vovpn-gw/Makefile b/board/funkwerk/vovpn-gw/Makefile
deleted file mode 100644
index f77cc60a94..0000000000
--- a/board/funkwerk/vovpn-gw/Makefile
+++ /dev/null
@@ -1,46 +0,0 @@
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := $(BOARD).o flash.o m88e6060.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/funkwerk/vovpn-gw/config.mk b/board/funkwerk/vovpn-gw/config.mk
deleted file mode 100644
index e59b4831da..0000000000
--- a/board/funkwerk/vovpn-gw/config.mk
+++ /dev/null
@@ -1,21 +0,0 @@
-# (C) Copyright 2004
-# Elmeg Communications Systems GmbH, Juergen Selent (j.selent@elmeg.de)
-#
-# Support for the Elmeg VoVPN Gateway Module
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-
-TEXT_BASE = 0xfff00000
diff --git a/board/funkwerk/vovpn-gw/flash.c b/board/funkwerk/vovpn-gw/flash.c
deleted file mode 100644
index 7dd0d3f234..0000000000
--- a/board/funkwerk/vovpn-gw/flash.c
+++ /dev/null
@@ -1,449 +0,0 @@
-/*
- * (C) Copyright 2004
- * Elmeg Communications Systems GmbH, Juergen Selent (j.selent@elmeg.de)
- *
- * Support for the Elmeg VoVPN Gateway Module
- * ------------------------------------------
- * This is a signle bank flashdriver for INTEL 28F320J3, 28F640J3
- * and 28F128J3A flashs working in 8 Bit mode.
- *
- * Most of this code is taken from existing u-boot source code.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
-
-#define FLASH_CMD_READ_ID 0x90
-#define FLASH_CMD_READ_STATUS 0x70
-#define FLASH_CMD_RESET 0xff
-#define FLASH_CMD_BLOCK_ERASE 0x20
-#define FLASH_CMD_ERASE_CONFIRM 0xd0
-#define FLASH_CMD_CLEAR_STATUS 0x50
-#define FLASH_CMD_SUSPEND_ERASE 0xb0
-#define FLASH_CMD_WRITE 0x40
-#define FLASH_CMD_WRITE_BUFF 0xe8
-#define FLASH_CMD_PROG_RESUME 0xd0
-#define FLASH_CMD_PROTECT 0x60
-#define FLASH_CMD_PROTECT_SET 0x01
-#define FLASH_CMD_PROTECT_CLEAR 0xd0
-#define FLASH_STATUS_DONE 0x80
-
-#define FLASH_WRITE_BUFFER_SIZE 32
-
-#ifdef CFG_FLASH_16BIT
-#define FLASH_WORD_SIZE unsigned short
-#define FLASH_ID_MASK 0xffff
-#define FLASH_CMD_ADDR_SHIFT 0
-#else
-#define FLASH_WORD_SIZE unsigned char
-#define FLASH_ID_MASK 0xff
-/* A0 is not used in either 8x or 16x for READ ID */
-#define FLASH_CMD_ADDR_SHIFT 1
-#endif
-
-
-static unsigned long
-flash_get(volatile FLASH_WORD_SIZE *addr, flash_info_t *info)
-{
- volatile FLASH_WORD_SIZE *p;
- FLASH_WORD_SIZE value;
- int i;
-
- addr[0] = FLASH_CMD_READ_ID;
-
- /* manufactor */
- value = addr[0 << FLASH_CMD_ADDR_SHIFT];
- switch (value) {
- case (INTEL_MANUFACT & FLASH_ID_MASK):
- info->flash_id = FLASH_MAN_INTEL;
- break;
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- *addr = FLASH_CMD_RESET;
- return (0);
-
- }
-
- /* device */
- value = addr[1 << FLASH_CMD_ADDR_SHIFT];
- switch (value) {
- case (INTEL_ID_28F320J3A & FLASH_ID_MASK):
- info->flash_id += FLASH_28F320J3A;
- info->sector_count = 32;
- info->size = 0x00400000;
- break;
- case (INTEL_ID_28F640J3A & FLASH_ID_MASK):
- info->flash_id += FLASH_28F640J3A;
- info->sector_count = 64;
- info->size = 0x00800000;
- break;
- case (INTEL_ID_28F128J3A & FLASH_ID_MASK):
- info->flash_id += FLASH_28F128J3A;
- info->sector_count = 128;
- info->size = 0x01000000;
- break;
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- *addr = FLASH_CMD_RESET;
- return (0);
- }
-
- /* setup sectors */
- for (i = 0; i < info->sector_count; i++) {
- info->start[i] = (unsigned long)addr + (i * info->size/info->sector_count);
- }
-
- /* check protected sectors */
- for (i = 0; i < info->sector_count; i++) {
- p = (volatile FLASH_WORD_SIZE *)(info->start[i]);
- info->protect[i] = p[2 << FLASH_CMD_ADDR_SHIFT] & 1;
- }
-
- /* reset bank */
- *addr = FLASH_CMD_RESET;
- return (info->size);
-}
-
-unsigned long
-flash_init(void)
-{
- unsigned long size;
- int i;
-
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
- size = flash_get((volatile FLASH_WORD_SIZE *)CFG_FLASH_BASE, &flash_info[0]);
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH Size=0x%08lx\n", size);
- return (0);
- }
-
- /* always protect 1 sector containing the HRCW */
- flash_protect(FLAG_PROTECT_SET,
- flash_info[0].start[0],
- flash_info[0].start[1] - 1,
- &flash_info[0]);
-
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
- flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_FLASH,
- CFG_MONITOR_FLASH+CFG_MONITOR_LEN-1,
- &flash_info[0]);
-#endif
-#ifdef CFG_ENV_IS_IN_FLASH
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR+CFG_ENV_SECT_SIZE-1,
- &flash_info[0]);
-#endif
- return (size);
-}
-
-void
-flash_print_info(flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_INTEL: printf ("INTEL "); break;
- default: printf ("Unknown Vendor "); break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_28F320J3A: printf ("28F320JA3 (32 Mbit)\n");
- break;
- case FLASH_28F640J3A: printf ("28F640JA3 (64 Mbit)\n");
- break;
- case FLASH_28F128J3A: printf ("28F128JA3 (128 Mbit)\n");
- break;
- default: printf ("Unknown Chip Type");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " "
- );
- }
- printf ("\n");
-}
-
-int
-flash_erase(flash_info_t *info, int s_first, int s_last)
-{
- unsigned long start, now, last;
- int flag, prot, sect;
- volatile FLASH_WORD_SIZE *addr;
- FLASH_WORD_SIZE status;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return (1);
- }
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("Cannot erase unknown flash - aborted\n");
- return (1);
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n", prot);
- } else {
- printf ("\n");
- }
-
- start = get_timer (0);
- last = start;
-
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect]) {
- continue;
- }
-
- addr = (volatile FLASH_WORD_SIZE *)(info->start[sect]);
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
-#ifdef DEBUG
- printf("Erase sector %d at start addr 0x%08X", sect, (unsigned int)info->start[sect]);
-#endif
-
- *addr = FLASH_CMD_CLEAR_STATUS;
- *addr = FLASH_CMD_BLOCK_ERASE;
- *addr = FLASH_CMD_ERASE_CONFIRM;
-
- /* re-enable interrupts if necessary */
- if (flag) {
- enable_interrupts();
- }
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- while (((status = *addr) & FLASH_STATUS_DONE) != FLASH_STATUS_DONE) {
- if ((now=get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf("Flash erase timeout at address %lx\n", info->start[sect]);
- *addr = FLASH_CMD_SUSPEND_ERASE;
- *addr = FLASH_CMD_RESET;
- return (1);
- }
-
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- }
- *addr = FLASH_CMD_RESET;
- }
- printf (" done\n");
- return (0);
-}
-
-static int
-write_buff2( volatile FLASH_WORD_SIZE *dst,
- volatile FLASH_WORD_SIZE *src,
- unsigned long cnt )
-{
- unsigned long start;
- FLASH_WORD_SIZE status;
- int flag, i;
-
- start = get_timer (0);
- while (1) {
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
- dst[0] = FLASH_CMD_WRITE_BUFF;
- if ((status = *dst) & FLASH_STATUS_DONE) {
- break;
- }
-
- /* re-enable interrupts if necessary */
- if (flag) {
- enable_interrupts();
- }
-
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- return (-1);
- }
- }
- dst[0] = (FLASH_WORD_SIZE)(cnt - 1);
- for (i=0; i<cnt; i++) {
- dst[i] = src[i];
- }
- dst[0] = FLASH_CMD_PROG_RESUME;
-
- if (flag) {
- enable_interrupts();
- }
-
- return( 0 );
-}
-
-static int
-poll_status( volatile FLASH_WORD_SIZE *addr )
-{
- unsigned long start;
-
- start = get_timer (0);
- /* wait for error or finish */
- while (1) {
- if (*addr == FLASH_STATUS_DONE) {
- if (*addr == FLASH_STATUS_DONE) {
- break;
- }
- }
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- *addr = FLASH_CMD_RESET;
- return (-1);
- }
- }
- *addr = FLASH_CMD_RESET;
- return (0);
-}
-
-/*
- * write_buff return values:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- * 4 - Flash not identified
- */
-int
-write_buff(flash_info_t *info, uchar *src, ulong udst, ulong cnt)
-{
- volatile FLASH_WORD_SIZE *addr, *dst;
- unsigned long bcnt;
- int flag, i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- return (4);
- }
-
- addr = (volatile FLASH_WORD_SIZE *)(info->start[0]);
- dst = (volatile FLASH_WORD_SIZE *) udst;
-
-#ifdef CFG_FLASH_16BIT
-#error NYI
-#else
- while (cnt > 0) {
- /* Check if buffer write is possible */
- if (cnt > 1 && (((unsigned long)dst & (FLASH_WRITE_BUFFER_SIZE - 1)) == 0)) {
- bcnt = cnt > FLASH_WRITE_BUFFER_SIZE ? FLASH_WRITE_BUFFER_SIZE : cnt;
- /* Check if Flash is (sufficiently) erased */
- for (i=0; i<bcnt; i++) {
- if ((dst[i] & src[i]) != src[i]) {
- return (2);
- }
- }
- if (write_buff2( dst,src,bcnt ) != 0) {
- addr[0] = FLASH_CMD_READ_STATUS;
- }
- if (poll_status( dst ) != 0) {
- return (1);
- }
- cnt -= bcnt;
- dst += bcnt;
- src += bcnt;
- continue;
- }
-
- /* Check if Flash is (sufficiently) erased */
- if ((*dst & *src) != *src) {
- return (2);
- }
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
- addr[0] = FLASH_CMD_ERASE_CONFIRM;
- addr[0] = FLASH_CMD_WRITE;
- *dst++ = *src++;
- /* re-enable interrupts if necessary */
- if (flag) {
- enable_interrupts();
- }
-
- if (poll_status( dst ) != 0) {
- return (1);
- }
- cnt --;
- }
-#endif
- return (0);
-}
-
-int
-flash_real_protect(flash_info_t *info, long sector, int prot)
-{
- volatile FLASH_WORD_SIZE *addr;
- unsigned long start;
-
- addr = (volatile FLASH_WORD_SIZE *)(info->start[sector]);
- *addr = FLASH_CMD_CLEAR_STATUS;
- *addr = FLASH_CMD_PROTECT;
-
- if(prot) {
- *addr = FLASH_CMD_PROTECT_SET;
- } else {
- *addr = FLASH_CMD_PROTECT_CLEAR;
- }
-
- /* wait for error or finish */
- start = get_timer (0);
- while(!(addr[0] & FLASH_STATUS_DONE)){
- if (get_timer(start) > CFG_FLASH_ERASE_TOUT) {
- printf("Flash protect timeout at address %lx\n", info->start[sector]);
- addr[0] = FLASH_CMD_RESET;
- return (1);
- }
- }
-
- /* Set software protect flag */
- info->protect[sector] = prot;
- *addr = FLASH_CMD_RESET;
- return (0);
-}
diff --git a/board/funkwerk/vovpn-gw/m88e6060.c b/board/funkwerk/vovpn-gw/m88e6060.c
deleted file mode 100644
index 03a03d0af0..0000000000
--- a/board/funkwerk/vovpn-gw/m88e6060.c
+++ /dev/null
@@ -1,262 +0,0 @@
-/*
- * (C) Copyright 2004
- * Elmeg Communications Systems GmbH, Juergen Selent (j.selent@elmeg.de)
- *
- * Support for the Elmeg VoVPN Gateway Module
- * ------------------------------------------
- * Initialize Marvell M88E6060 Switch
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <ioports.h>
-#include <mpc8260.h>
-#include <asm/m8260_pci.h>
-#include <net.h>
-#include <miiphy.h>
-
-#include "m88e6060.h"
-
-#if (CONFIG_COMMANDS & CFG_CMD_NET)
-static int prtTab[M88X_PRT_CNT] = { 8, 9, 10, 11, 12, 13 };
-static int phyTab[M88X_PHY_CNT] = { 0, 1, 2, 3, 4 };
-
-static m88x_regCfg_t prtCfg0[] = {
- { 4, 0x3e7c, 0x8000 },
- { 4, 0x3e7c, 0x8003 },
- { 6, 0x0fc0, 0x001e },
- { -1, 0xffff, 0x0000 }
-};
-
-static m88x_regCfg_t prtCfg1[] = {
- { 4, 0x3e7c, 0x8000 },
- { 4, 0x3e7c, 0x8003 },
- { 6, 0x0fc0, 0x001d },
- { -1, 0xffff, 0x0000 }
-};
-
-static m88x_regCfg_t prtCfg2[] = {
- { 4, 0x3e7c, 0x8000 },
- { 4, 0x3e7c, 0x8003 },
- { 6, 0x0fc0, 0x001b },
- { -1, 0xffff, 0x0000 }
-};
-
-static m88x_regCfg_t prtCfg3[] = {
- { 4, 0x3e7c, 0x8000 },
- { 4, 0x3e7c, 0x8003 },
- { 6, 0x0fc0, 0x0017 },
- { -1, 0xffff, 0x0000 }
-};
-
-static m88x_regCfg_t prtCfg4[] = {
- { 4, 0x3e7c, 0x8000 },
- { 4, 0x3e7c, 0x8003 },
- { 6, 0x0fc0, 0x000f },
- { -1, 0xffff, 0x0000 }
-};
-
-static m88x_regCfg_t *prtCfg[M88X_PRT_CNT] = {
- prtCfg0,prtCfg1,prtCfg2,prtCfg3,prtCfg4,NULL
-};
-
-static m88x_regCfg_t phyCfgX[] = {
- { 4, 0xfa1f, 0x01e0 },
- { 0, 0x213f, 0x1200 },
- { 24, 0x81ff, 0x1200 },
- { -1, 0xffff, 0x0000 }
-};
-
-static m88x_regCfg_t *phyCfg[M88X_PHY_CNT] = {
- phyCfgX,phyCfgX,phyCfgX,phyCfgX,NULL
-};
-
-#if 0
-static void
-m88e6060_dump( int devAddr )
-{
- int i, j;
- unsigned short val[6];
-
- printf( "M88E6060 Register Dump\n" );
- printf( "====================================\n" );
- printf( "PortNo 0 1 2 3 4 5\n" );
- for (i=0; i<6; i++)
- miiphy_read( devAddr+prtTab[i],M88X_PRT_STAT,&val[i] );
- printf( "STAT %04hx %04hx %04hx %04hx %04hx %04hx\n",
- val[0],val[1],val[2],val[3],val[4],val[5] );
-
- for (i=0; i<6; i++)
- miiphy_read( devAddr+prtTab[i],M88X_PRT_ID,&val[i] );
- printf( "ID %04hx %04hx %04hx %04hx %04hx %04hx\n",
- val[0],val[1],val[2],val[3],val[4],val[5] );
-
- for (i=0; i<6; i++)
- miiphy_read( devAddr+prtTab[i],M88X_PRT_CNTL,&val[i] );
- printf( "CNTL %04hx %04hx %04hx %04hx %04hx %04hx\n",
- val[0],val[1],val[2],val[3],val[4],val[5] );
-
- for (i=0; i<6; i++)
- miiphy_read( devAddr+prtTab[i],M88X_PRT_VLAN,&val[i] );
- printf( "VLAN %04hx %04hx %04hx %04hx %04hx %04hx\n",
- val[0],val[1],val[2],val[3],val[4],val[5] );
-
- for (i=0; i<6; i++)
- miiphy_read( devAddr+prtTab[i],M88X_PRT_PAV,&val[i] );
- printf( "PAV %04hx %04hx %04hx %04hx %04hx %04hx\n",
- val[0],val[1],val[2],val[3],val[4],val[5] );
-
- for (i=0; i<6; i++)
- miiphy_read( devAddr+prtTab[i],M88X_PRT_RX,&val[i] );
- printf( "RX %04hx %04hx %04hx %04hx %04hx %04hx\n",
- val[0],val[1],val[2],val[3],val[4],val[5] );
-
- for (i=0; i<6; i++)
- miiphy_read( devAddr+prtTab[i],M88X_PRT_TX,&val[i] );
- printf( "TX %04hx %04hx %04hx %04hx %04hx %04hx\n",
- val[0],val[1],val[2],val[3],val[4],val[5] );
-
- printf( "------------------------------------\n" );
- printf( "PhyNo 0 1 2 3 4\n" );
- for (i=0; i<9; i++) {
- for (j=0; j<5; j++) {
- miiphy_read( devAddr+phyTab[j],i,&val[j] );
- }
- printf( "0x%02x %04hx %04hx %04hx %04hx %04hx\n",
- i,val[0],val[1],val[2],val[3],val[4] );
- }
- for (i=0x10; i<0x1d; i++) {
- for (j=0; j<5; j++) {
- miiphy_read( devAddr+phyTab[j],i,&val[j] );
- }
- printf( "0x%02x %04hx %04hx %04hx %04hx %04hx\n",
- i,val[0],val[1],val[2],val[3],val[4] );
- }
-}
-#endif
-
-int
-m88e6060_initialize( int devAddr )
-{
- static char *_f = "m88e6060_initialize:";
- m88x_regCfg_t *p;
- int err;
- int i;
- unsigned short val;
-
- /*** reset all phys into powerdown ************************************/
- for (i=0, err=0; i<M88X_PHY_CNT; i++) {
- err += bb_miiphy_read(NULL, devAddr+phyTab[i],M88X_PHY_CNTL,&val );
- /* keep SpeedLSB, Duplex */
- val &= 0x2100;
- /* set SWReset, AnegEn, PwrDwn, RestartAneg */
- val |= 0x9a00;
- err += bb_miiphy_write(NULL, devAddr+phyTab[i],M88X_PHY_CNTL,val );
- }
- if (err) {
- printf( "%s [ERR] reset phys\n",_f );
- return( -1 );
- }
-
- /*** disable all ports ************************************************/
- for (i=0, err=0; i<M88X_PRT_CNT; i++) {
- err += bb_miiphy_read(NULL, devAddr+prtTab[i],M88X_PRT_CNTL,&val );
- val &= 0xfffc;
- err += bb_miiphy_write(NULL, devAddr+prtTab[i],M88X_PRT_CNTL,val );
- }
- if (err) {
- printf( "%s [ERR] disable ports\n",_f );
- return( -1 );
- }
-
- /*** initialize switch ************************************************/
- /* set switch mac addr */
-#define ea eth_get_dev()->enetaddr
- val = (ea[4] << 8) | ea[5];
- err = bb_miiphy_write(NULL, devAddr+15,M88X_GLB_MAC45,val );
- val = (ea[2] << 8) | ea[3];
- err += bb_miiphy_write(NULL, devAddr+15,M88X_GLB_MAC23,val );
- val = (ea[0] << 8) | ea[1];
-#undef ea
- val &= 0xfeff; /* clear DiffAddr */
- err += bb_miiphy_write(NULL, devAddr+15,M88X_GLB_MAC01,val );
- if (err) {
- printf( "%s [ERR] switch mac address register\n",_f );
- return( -1 );
- }
-
- /* !DiscardExcessive, MaxFrameSize, CtrMode */
- err = bb_miiphy_read(NULL, devAddr+15,M88X_GLB_CNTL,&val );
- val &= 0xd870;
- val |= 0x0500;
- err += bb_miiphy_write(NULL, devAddr+15,M88X_GLB_CNTL,val );
- if (err) {
- printf( "%s [ERR] switch global control register\n",_f );
- return( -1 );
- }
-
- /* LernDis off, ATUSize 1024, AgeTime 5min */
- err = bb_miiphy_read(NULL, devAddr+15,M88X_ATU_CNTL,&val );
- val &= 0x000f;
- val |= 0x2130;
- err += bb_miiphy_write(NULL, devAddr+15,M88X_ATU_CNTL,val );
- if (err) {
- printf( "%s [ERR] atu control register\n",_f );
- return( -1 );
- }
-
- /*** initialize ports *************************************************/
- for (i=0; i<M88X_PRT_CNT; i++) {
- if ((p = prtCfg[i]) == NULL) {
- continue;
- }
- while (p->reg != -1) {
- err = 0;
- err += bb_miiphy_read(NULL, devAddr+prtTab[i],p->reg,&val );
- val &= p->msk;
- val |= p->val;
- err += bb_miiphy_write(NULL, devAddr+prtTab[i],p->reg,val );
- if (err) {
- printf( "%s [ERR] config port %d register %d\n",_f,i,p->reg );
- /* XXX what todo */
- }
- p++;
- }
- }
-
- /*** initialize phys **************************************************/
- for (i=0; i<M88X_PHY_CNT; i++) {
- if ((p = phyCfg[i]) == NULL) {
- continue;
- }
- while (p->reg != -1) {
- err = 0;
- err += bb_miiphy_read(NULL, devAddr+phyTab[i],p->reg,&val );
- val &= p->msk;
- val |= p->val;
- err += bb_miiphy_write(NULL, devAddr+phyTab[i],p->reg,val );
- if (err) {
- printf( "%s [ERR] config phy %d register %d\n",_f,i,p->reg );
- /* XXX what todo */
- }
- p++;
- }
- }
- udelay(100000);
- return( 0 );
-}
-#endif
diff --git a/board/funkwerk/vovpn-gw/m88e6060.h b/board/funkwerk/vovpn-gw/m88e6060.h
deleted file mode 100644
index 15d458325d..0000000000
--- a/board/funkwerk/vovpn-gw/m88e6060.h
+++ /dev/null
@@ -1,88 +0,0 @@
-/*
- * (C) Copyright 2004
- * Elmeg Communications Systems GmbH, Juergen Selent (j.selent@elmeg.de)
- *
- * Support for the Elmeg VoVPN Gateway Module
- * ------------------------------------------
- * Initialize Marvell M88E6060 Switch
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef _INC_m88e6060_h_
-#define _INC_m88e6060_h_
-
-/* ************************************************************************** */
-/* *** DEFINES ************************************************************** */
-
-/* switch hw */
-#define M88X_PRT_CNT 6
-#define M88X_PHY_CNT 5
-
-/* phy register offsets */
-#define M88X_PHY_CNTL 0x00
-#define M88X_PHY_STAT 0x00
-#define M88X_PHY_ID0 0x02
-#define M88X_PHY_ID1 0x03
-#define M88X_PHY_ANEG_ADV 0x04
-#define M88X_PHY_LPA 0x05
-#define M88X_PHY_ANEG_EXP 0x06
-#define M88X_PHY_NPT 0x07
-#define M88X_PHY_LPNP 0x08
-
-/* port register offsets */
-#define M88X_PRT_STAT 0x00
-#define M88X_PRT_ID 0x03
-#define M88X_PRT_CNTL 0x04
-#define M88X_PRT_VLAN 0x06
-#define M88X_PRT_PAV 0x0b
-#define M88X_PRT_RX 0x10
-#define M88X_PRT_TX 0x11
-
-/* global/atu register offsets */
-#define M88X_GLB_STAT 0x00
-#define M88X_GLB_MAC01 0x01
-#define M88X_GLB_MAC23 0x02
-#define M88X_GLB_MAC45 0x03
-#define M88X_GLB_CNTL 0x04
-#define M88X_ATU_CNTL 0x0a
-#define M88X_ATU_OP 0x0b
-
-/* id0 register - 0x02 */
-#define M88X_PHY_ID0_VALUE 0x0141
-
-/* id1 register - 0x03 */
-#define M88X_PHY_ID1_VALUE 0x0c80 /* without revision ! */
-
-
-/* misc */
-#define M88E6060_ID ((M88X_PHY_ID0_VALUE<<16) | M88X_PHY_ID1_VALUE)
-
-/* ************************************************************************** */
-/* *** TYPEDEFS ************************************************************* */
-
-typedef struct {
- int reg;
- unsigned short msk;
- unsigned short val;
-} m88x_regCfg_t;
-
-/* ************************************************************************** */
-/* *** PROTOTYPES *********************************************************** */
-
-extern int m88e6060_initialize( int );
-
-#endif /* _INC_m88e6060_h_ */
diff --git a/board/funkwerk/vovpn-gw/u-boot.lds b/board/funkwerk/vovpn-gw/u-boot.lds
deleted file mode 100644
index bf8048d27e..0000000000
--- a/board/funkwerk/vovpn-gw/u-boot.lds
+++ /dev/null
@@ -1,125 +0,0 @@
-/*
- * (C) Copyright 2001-2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * Modified by Yuli Barcohen <yuli@arabellasw.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc8260/start.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
-ENTRY(_start)
diff --git a/board/funkwerk/vovpn-gw/vovpn-gw.c b/board/funkwerk/vovpn-gw/vovpn-gw.c
deleted file mode 100644
index 97f81eefcf..0000000000
--- a/board/funkwerk/vovpn-gw/vovpn-gw.c
+++ /dev/null
@@ -1,375 +0,0 @@
-/*
- * (C) Copyright 2004
- * Elmeg Communications Systems GmbH, Juergen Selent (j.selent@elmeg.de)
- *
- * Support for the Elmeg VoVPN Gateway Module
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <ioports.h>
-#include <mpc8260.h>
-#include <asm/m8260_pci.h>
-#include <miiphy.h>
-
-#include "m88e6060.h"
-
-/*
- * I/O Port configuration table
- *
- * if conf is 1, then that port pin will be configured at boot time
- * according to the five values podr/pdir/ppar/psor/pdat for that entry
- */
-
-const iop_conf_t iop_conf_tab[4][32] = {
- /* Port A configuration */
- { /* conf ppar psor pdir podr pdat */
- /* PA31 */ { 1, 0, 0, 1, 0, 0 }, /* GPO TP1252 */
- /* PA30 */ { 1, 0, 0, 0, 0, 0 }, /* GPI BP_RES */
- /* PA29 */ { 1, 0, 0, 1, 0, 0 }, /* GPO TP1253 */
- /* PA28 */ { 1, 1, 1, 1, 0, 0 }, /* FCC1 RMII TX_EN */
- /* PA27 */ { 1, 1, 1, 0, 0, 0 }, /* FCC1 RMII CRS_DV */
- /* PA26 */ { 1, 1, 1, 0, 0, 0 }, /* FCC1 RMII RX_ERR */
- /* PA25 */ { 1, 0, 0, 0, 0, 0 }, /* GPI HWID */
- /* PA24 */ { 1, 0, 0, 0, 0, 0 }, /* GPI HWID */
- /* PA23 */ { 1, 0, 0, 0, 0, 0 }, /* GPI HWID */
- /* PA22 */ { 1, 0, 0, 0, 0, 0 }, /* GPI HWID */
- /* PA21 */ { 1, 0, 0, 0, 0, 0 }, /* GPI HWID */
- /* PA20 */ { 1, 0, 0, 1, 0, 1 }, /* GPO LED STATUS */
- /* PA19 */ { 1, 1, 0, 1, 0, 0 }, /* FCC1 RMII TxD[1] */
- /* PA18 */ { 1, 1, 0, 1, 0, 0 }, /* FCC1 RMII TxD[0] */
- /* PA17 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 RMII RxD[0] */
- /* PA16 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 RMII RxD[1] */
- /* PA15 */ { 1, 0, 0, 1, 0, 0 }, /* GPO TP1255 */
- /* PA14 */ { 1, 0, 0, 1, 0, 0 }, /* GPO TP???? */
- /* PA13 */ { 1, 0, 0, 1, 0, 1 }, /* GPO EN_BCTL1 XXX jse */
- /* PA12 */ { 1, 0, 0, 1, 0, 0 }, /* GPO SWITCH RESET */
- /* PA11 */ { 1, 0, 0, 1, 0, 0 }, /* GPO DSP SL1 RESET */
- /* PA10 */ { 1, 0, 0, 1, 0, 0 }, /* GPO DSP SL2 RESET */
- /* PA9 */ { 1, 1, 0, 1, 0, 0 }, /* SMC2 TXD */
- /* PA8 */ { 1, 1, 0, 0, 0, 0 }, /* SMC2 RXD */
- /* PA7 */ { 0, 0, 0, 0, 0, 0 }, /* pin does not exit */
- /* PA6 */ { 0, 0, 0, 0, 0, 0 }, /* pin does not exit */
- /* PA5 */ { 0, 0, 0, 0, 0, 0 }, /* pin does not exit */
- /* PA4 */ { 0, 0, 0, 0, 0, 0 }, /* pin does not exit */
- /* PA3 */ { 0, 0, 0, 0, 0, 0 }, /* pin does not exit */
- /* PA2 */ { 0, 0, 0, 0, 0, 0 }, /* pin does not exit */
- /* PA1 */ { 0, 0, 0, 0, 0, 0 }, /* pin does not exit */
- /* PA0 */ { 0, 0, 0, 0, 0, 0 } /* pin does not exit */
- },
-
- /* Port B configuration */
- { /* conf ppar psor pdir podr pdat */
- /* PB31 */ { 1, 0, 0, 1, 0, 0 }, /* GPO TP1257 */
- /* PB30 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 RMII CRS_DV */
- /* PB29 */ { 1, 1, 1, 1, 0, 0 }, /* FCC2 RMII TX_EN */
- /* PB28 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 RMII RX_ERR */
- /* PB27 */ { 1, 1, 1, 0, 1, 0 }, /* TDM_B2 L1TXD XXX val=0 */
- /* PB26 */ { 1, 1, 1, 0, 1, 0 }, /* TDM_B2 L1RXD XXX val,dr */
- /* PB25 */ { 1, 0, 0, 1, 0, 0 }, /* GPO TP1259 */
- /* PB24 */ { 1, 1, 1, 0, 0, 0 }, /* TDM_B2 L1RSYNC */
- /* PB23 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 RMII TxD[1] */
- /* PB22 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 RMII TxD[0] */
- /* PB21 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 RMII RxD[0] */
- /* PB20 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 RMII RxD[1] */
- /* PB19 */ { 1, 0, 0, 1, 0, 1 }, /* GPO PHY MDC */
- /* PB18 */ { 1, 0, 0, 0, 0, 0 }, /* GPIO PHY MDIO */
- /* PB17 */ { 0, 0, 0, 0, 0, 0 }, /* pin does not exist */
- /* PB16 */ { 0, 0, 0, 0, 0, 0 }, /* pin does not exist */
- /* PB15 */ { 0, 0, 0, 0, 0, 0 }, /* pin does not exist */
- /* PB14 */ { 0, 0, 0, 0, 0, 0 }, /* pin does not exist */
- /* PB13 */ { 0, 0, 0, 0, 0, 0 }, /* pin does not exist */
- /* PB12 */ { 0, 0, 0, 0, 0, 0 }, /* pin does not exist */
- /* PB11 */ { 0, 0, 0, 0, 0, 0 }, /* pin does not exist */
- /* PB10 */ { 0, 0, 0, 0, 0, 0 }, /* pin does not exist */
- /* PB9 */ { 0, 0, 0, 0, 0, 0 }, /* pin does not exist */
- /* PB8 */ { 0, 0, 0, 0, 0, 0 }, /* pin does not exist */
- /* PB7 */ { 0, 0, 0, 0, 0, 0 }, /* pin does not exist */
- /* PB6 */ { 0, 0, 0, 0, 0, 0 }, /* pin does not exist */
- /* PB5 */ { 0, 0, 0, 0, 0, 0 }, /* pin does not exist */
- /* PB4 */ { 0, 0, 0, 0, 0, 0 }, /* pin does not exist */
- /* PB3 */ { 0, 0, 0, 0, 0, 0 }, /* pin does not exist */
- /* PB2 */ { 0, 0, 0, 0, 0, 0 }, /* pin does not exist */
- /* PB1 */ { 0, 0, 0, 0, 0, 0 }, /* pin does not exist */
- /* PB0 */ { 0, 0, 0, 0, 0, 0 } /* pin does not exist */
- },
-
- /* Port C */
- { /* conf ppar psor pdir podr pdat */
- /* PC31 */ { 0, 0, 0, 0, 0, 0 }, /* pin does not exist */
- /* PC30 */ { 0, 0, 0, 0, 0, 0 }, /* pin does not exist */
- /* PC29 */ { 1, 0, 0, 1, 0, 0 }, /* GPO TP1183 */
- /* PC28 */ { 1, 0, 0, 1, 0, 0 }, /* GPO TP1184 */
- /* PC27 */ { 1, 1, 0, 0, 0, 0 }, /* CLK5 TDM_A1 RX */
- /* PC26 */ { 1, 0, 0, 1, 0, 0 }, /* GPO TP1185 */
- /* PC25 */ { 1, 0, 0, 1, 0, 0 }, /* GPO TP1178 */
- /* PC24 */ { 1, 0, 0, 1, 0, 0 }, /* GPO TP1186 */
- /* PC23 */ { 1, 1, 0, 0, 0, 0 }, /* CLK9 TDM_B2 RX */
- /* PC22 */ { 1, 1, 0, 0, 0, 0 }, /* CLK10 FCC1 RMII REFCLK */
- /* PC21 */ { 1, 0, 0, 1, 0, 0 }, /* GPO TP1187 */
- /* PC20 */ { 1, 0, 0, 1, 0, 0 }, /* GPO TP1182 */
- /* PC19 */ { 1, 0, 0, 1, 0, 0 }, /* GPO TP1188 */
- /* PC18 */ { 1, 0, 0, 1, 0, 0 }, /* GPO HW RESET */
- /* PC17 */ { 1, 1, 0, 1, 0, 0 }, /* BRG8 SWITCH CLKIN */
- /* PC16 */ { 1, 1, 0, 0, 0, 0 }, /* CLK16 FCC2 RMII REFCLK */
- /* PC15 */ { 1, 0, 0, 0, 0, 0 }, /* GPI SL1_MTYPE_3 */
- /* PC14 */ { 1, 0, 0, 0, 0, 0 }, /* GPI SL1_MTYPE_2 */
- /* PC13 */ { 1, 0, 0, 0, 0, 0 }, /* GPI SL1_MTYPE_1 */
- /* PC12 */ { 1, 0, 0, 0, 0, 0 }, /* GPI SL1_MTYPE_0 */
- /* PC11 */ { 1, 0, 0, 1, 0, 0 }, /* GPO TP1176 */
- /* PC10 */ { 1, 0, 0, 1, 0, 0 }, /* GPO TP1177 */
- /* PC9 */ { 1, 0, 0, 0, 0, 0 }, /* GPI SL2_MTYPE_3 */
- /* PC8 */ { 1, 0, 0, 0, 0, 0 }, /* GPI SL2_MTYPE_2 */
- /* PC7 */ { 1, 0, 0, 0, 0, 0 }, /* GPI SL2_MTYPE_1 */
- /* PC6 */ { 1, 0, 0, 0, 0, 0 }, /* GPI SL2_MTYPE_0 */
- /* PC5 */ { 1, 1, 0, 1, 0, 0 }, /* SMC1 TXD */
- /* PC4 */ { 1, 1, 0, 0, 0, 0 }, /* SMC1 RXD */
- /* PC3 */ { 0, 0, 0, 0, 0, 0 }, /* pin does not exist */
- /* PC2 */ { 0, 0, 0, 0, 0, 0 }, /* pin does not exist */
- /* PC1 */ { 1, 0, 0, 1, 0, 0 }, /* GPO TP1192 */
- /* PC0 */ { 1, 0, 0, 0, 0, 0 }, /* GPI RACK */
- },
-
- /* Port D */
- { /* conf ppar psor pdir podr pdat */
- /* PD31 */ { 1, 0, 0, 1, 0, 0 }, /* GPO TP1193 */
- /* PD30 */ { 1, 0, 0, 1, 0, 0 }, /* GPO TP1194 */
- /* PD29 */ { 1, 0, 0, 1, 0, 0 }, /* GPO TP1195 */
- /* PD28 */ { 0, 0, 0, 0, 0, 0 }, /* pin does not exist */
- /* PD27 */ { 0, 0, 0, 0, 0, 0 }, /* pin does not exist */
- /* PD26 */ { 0, 0, 0, 0, 0, 0 }, /* pin does not exist */
- /* PD25 */ { 1, 0, 0, 1, 0, 0 }, /* GPO TP1179 */
- /* PD24 */ { 1, 0, 0, 1, 0, 0 }, /* GPO TP1180 */
- /* PD23 */ { 1, 0, 0, 1, 0, 0 }, /* GPO TP1181 */
- /* PD22 */ { 1, 1, 1, 0, 1, 0 }, /* TDM_A2 L1TXD */
- /* PD21 */ { 1, 1, 1, 0, 1, 0 }, /* TDM_A2 L1RXD */
- /* PD20 */ { 1, 1, 1, 0, 0, 0 }, /* TDM_A2 L1RSYNC */
- /* PD19 */ { 1, 0, 0, 1, 0, 0 }, /* GPO TP1196 */
- /* PD18 */ { 1, 0, 0, 1, 0, 0 }, /* GPO TP1197 */
- /* PD17 */ { 1, 0, 0, 1, 0, 0 }, /* GPO TP1198 */
- /* PD16 */ { 1, 0, 0, 1, 0, 0 }, /* GPO TP1199 */
- /* PD15 */ { 1, 0, 0, 1, 0, 0 }, /* GPO TP1250 */
- /* PD14 */ { 1, 0, 0, 1, 0, 0 }, /* GPO TP1251 */
- /* PD13 */ { 0, 0, 0, 0, 0, 0 }, /* pin does not exist */
- /* PD12 */ { 0, 0, 0, 0, 0, 0 }, /* pin does not exist */
- /* PD11 */ { 0, 0, 0, 0, 0, 0 }, /* pin does not exist */
- /* PD10 */ { 0, 0, 0, 0, 0, 0 }, /* pin does not exist */
- /* PD9 */ { 0, 0, 0, 0, 0, 0 }, /* pin does not exist */
- /* PD8 */ { 0, 0, 0, 0, 0, 0 }, /* pin does not exist */
- /* PD7 */ { 0, 0, 0, 1, 0, 0 }, /* GPO FL_BYTE */
- /* PD6 */ { 0, 0, 0, 0, 0, 0 }, /* pin does not exist */
- /* PD5 */ { 0, 0, 0, 0, 0, 0 }, /* pin does not exist */
- /* PD4 */ { 0, 0, 0, 0, 0, 0 }, /* pin does not exist */
- /* PD3 */ { 0, 0, 0, 0, 0, 0 }, /* pin does not exist */
- /* PD2 */ { 0, 0, 0, 0, 0, 0 }, /* pin does not exist */
- /* PD1 */ { 0, 0, 0, 0, 0, 0 }, /* pin does not exist */
- /* PD0 */ { 0, 0, 0, 0, 0, 0 } /* pin does not exist */
- }
-};
-
-void reset_phy (void)
-{
- volatile ioport_t *iop;
-#if (CONFIG_COMMANDS & CFG_CMD_NET)
- int i;
- unsigned short val;
-#endif
-
- iop = ioport_addr((immap_t *)CFG_IMMR, 0);
-
- /* Reset the PHY */
- iop->pdat &= 0xfff7ffff; /* PA12 = |SWITCH_RESET */
-#if (CONFIG_COMMANDS & CFG_CMD_NET)
- udelay(20000);
- iop->pdat |= 0x00080000;
- for (i=0; i<100; i++) {
- udelay(20000);
- if (bb_miiphy_read("FCC1 ETHERNET", CFG_PHY_ADDR,2,&val ) == 0) {
- break;
- }
- }
- /* initialize switch */
- m88e6060_initialize( CFG_PHY_ADDR );
-#endif
-}
-
-static unsigned long UPMATable[] = {
- 0x8fffec00, 0x0ffcfc00, 0x0ffcfc00, 0x0ffcfc00, /* Words 0 to 3 */
- 0x0ffcfc04, 0x3ffdfc00, 0xfffffc01, 0xfffffc01, /* Words 4 to 7 */
- 0xfffffc00, 0xfffffc04, 0xfffffc01, 0xfffffc00, /* Words 8 to 11 */
- 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, /* Words 12 to 15 */
- 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, /* Words 16 to 19 */
- 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc01, /* Words 20 to 23 */
- 0x8fffec00, 0x00fffc00, 0x00fffc00, 0x00fffc00, /* Words 24 to 27 */
- 0x0ffffc04, 0xfffffc01, 0xfffffc01, 0xfffffc01, /* Words 28 to 31 */
- 0xfffffc00, 0xfffffc01, 0xfffffc01, 0xfffffc00, /* Words 32 to 35 */
- 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, /* Words 36 to 39 */
- 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, /* Words 40 to 43 */
- 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc01, /* Words 44 to 47 */
- 0xfffffc00, 0xfffffc04, 0xfffffc01, 0xfffffc00, /* Words 48 to 51 */
- 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, /* Words 52 to 55 */
- 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc01, /* Words 56 to 59 */
- 0xffffec00, 0xffffec04, 0xffffec00, 0xfffffc01 /* Words 60 to 63 */
-};
-
-int board_early_init_f (void)
-{
- volatile immap_t *immap;
- volatile memctl8260_t *memctl;
- volatile unsigned char *dummy;
- int i;
-
- immap = (immap_t *) CFG_IMMR;
- memctl = &immap->im_memctl;
-
-#if 0
- /* CS2-5 - DSP via UPMA */
- dummy = (volatile unsigned char *) (memctl->memc_br2 & BRx_BA_MSK);
- memctl->memc_mar = 0;
- memctl->memc_mamr = MxMR_OP_WARR;
- for (i = 0; i < 64; i++) {
- memctl->memc_mdr = UPMATable[i];
- *dummy = 0;
- }
- memctl->memc_mamr = 0x00044440;
-#else
- /* CS7 - DPRAM via UPMA */
- dummy = (volatile unsigned char *) (memctl->memc_br7 & BRx_BA_MSK);
- memctl->memc_mar = 0;
- memctl->memc_mamr = MxMR_OP_WARR;
- for (i = 0; i < 64; i++) {
- memctl->memc_mdr = UPMATable[i];
- *dummy = 0;
- }
- memctl->memc_mamr = 0x00044440;
-#endif
- return 0;
-}
-
-int misc_init_r (void)
-{
- volatile ioport_t *iop;
- unsigned char temp;
-#if 0
- /* DUMP UPMA RAM */
- volatile immap_t *immap;
- volatile memctl8260_t *memctl;
- volatile unsigned char *dummy;
- unsigned char c;
- int i;
-
- immap = (immap_t *) CFG_IMMR;
- memctl = &immap->im_memctl;
-
-
- dummy = (volatile unsigned char *) (memctl->memc_br7 & BRx_BA_MSK);
- memctl->memc_mar = 0;
- memctl->memc_mamr = MxMR_OP_RARR;
- for (i = 0; i < 64; i++) {
- c = *dummy;
- printf( "UPMA[%02d]: 0x%08lx,0x%08lx: 0x%08lx\n",i,
- memctl->memc_mamr,
- memctl->memc_mar,
- memctl->memc_mdr );
- }
- memctl->memc_mamr = 0x00044440;
-#endif
- /* enable buffers (DSP, DPRAM) */
- iop = ioport_addr((immap_t *)CFG_IMMR, 0);
- iop->pdat &= 0xfffbffff; /* PA13 = |EN_M_BCTL1 */
-
- /* destroy DPRAM magic */
- *(volatile unsigned char *)0xf0500000 = 0x00;
-
- /* clear any pending DPRAM irq */
- temp = *(volatile unsigned char *)0xf05003ff;
-
- /* write module-id into DPRAM */
- *(volatile unsigned char *)0xf0500201 = 0x50;
-
- return 0;
-}
-
-#if defined(CONFIG_HAVE_OWN_RESET)
-int
-do_reset (void *cmdtp, int flag, int argc, char *argv[])
-{
- volatile ioport_t *iop;
-
- iop = ioport_addr((immap_t *)CFG_IMMR, 2);
- iop->pdat |= 0x00002000; /* PC18 = HW_RESET */
- return 1;
-}
-#endif /* CONFIG_HAVE_OWN_RESET */
-
-#define ns2clk(ns) (ns / (1000000000 / CONFIG_8260_CLKIN) + 1)
-
-long int initdram (int board_type)
-{
-#ifndef CFG_RAMBOOT
- volatile immap_t *immap;
- volatile memctl8260_t *memctl;
- volatile uchar *ramaddr;
- int i;
- uchar c;
-
- immap = (immap_t *) CFG_IMMR;
- memctl = &immap->im_memctl;
- ramaddr = (uchar *) CFG_SDRAM_BASE;
- c = 0xff;
-
- immap->im_siu_conf.sc_ppc_acr = 0x02;
- immap->im_siu_conf.sc_ppc_alrh = 0x01267893;
- immap->im_siu_conf.sc_ppc_alrl = 0x89abcdef;
- immap->im_siu_conf.sc_tescr1 = 0x00000000;
- immap->im_siu_conf.sc_tescr2 = 0x00000000;
-
- memctl->memc_mptpr = CFG_MPTPR;
- memctl->memc_psrt = CFG_PSRT;
- memctl->memc_or1 = CFG_OR1_PRELIM;
- memctl->memc_br1 = CFG_SDRAM_BASE | CFG_BR1_PRELIM;
-
- /* Precharge all banks */
- memctl->memc_psdmr = CFG_PSDMR | 0x28000000;
- *ramaddr = c;
-
- /* CBR refresh */
- memctl->memc_psdmr = CFG_PSDMR | 0x08000000;
- for (i = 0; i < 8; i++)
- *ramaddr = c;
-
- /* Mode Register write */
- memctl->memc_psdmr = CFG_PSDMR | 0x18000000;
- *ramaddr = c;
-
- /* Refresh enable */
- memctl->memc_psdmr = CFG_PSDMR | 0x40000000;
- *ramaddr = c;
-#endif /* CFG_RAMBOOT */
-
- return (CFG_SDRAM_SIZE);
-}
-
-int checkboard (void)
-{
-#ifdef CONFIG_CLKIN_66MHz
- puts ("Board: Elmeg VoVPN Gateway Module (66MHz)\n");
-#else
- puts ("Board: Elmeg VoVPN Gateway Module (100MHz)\n");
-#endif
- return 0;
-}
diff --git a/board/g2000/Makefile b/board/g2000/Makefile
deleted file mode 100644
index 5471d13639..0000000000
--- a/board/g2000/Makefile
+++ /dev/null
@@ -1,46 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o strataflash.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/g2000/config.mk b/board/g2000/config.mk
deleted file mode 100644
index 25b2105799..0000000000
--- a/board/g2000/config.mk
+++ /dev/null
@@ -1,29 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# esd PLU405 boards
-#
-
-TEXT_BASE = 0xFFFC0000
-#TEXT_BASE = 0x00FC0000
diff --git a/board/g2000/g2000.c b/board/g2000/g2000.c
deleted file mode 100644
index 3f7875334d..0000000000
--- a/board/g2000/g2000.c
+++ /dev/null
@@ -1,312 +0,0 @@
-/*
- * (C) Copyright 2004
- * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/processor.h>
-#include <command.h>
-
-#define MEM_MCOPT1_INIT_VAL 0x00800000
-#define MEM_RTR_INIT_VAL 0x04070000
-#define MEM_PMIT_INIT_VAL 0x07c00000
-#define MEM_MB0CF_INIT_VAL 0x00082001
-#define MEM_MB1CF_INIT_VAL 0x04082000
-#define MEM_SDTR1_INIT_VAL 0x00854005
-#define SDRAM0_CFG_ENABLE 0x80000000
-
-#define CFG_SDRAM_SIZE 0x04000000 /* 64 MB */
-
-int board_early_init_f (void)
-{
-#if 0 /* test-only */
- mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
- mtdcr (uicer, 0x00000000); /* disable all ints */
- mtdcr (uiccr, 0x00000010);
- mtdcr (uicpr, 0xFFFF7FF0); /* set int polarities */
- mtdcr (uictr, 0x00000010); /* set int trigger levels */
- mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
-#else
- mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
- mtdcr(uicer, 0x00000000); /* disable all ints */
- mtdcr(uiccr, 0x00000000); /* set all to be non-critical*/
- mtdcr(uicpr, 0xFFFFFFF0); /* set int polarities */
- mtdcr(uictr, 0x10000000); /* set int trigger levels */
- mtdcr(uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority*/
- mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
-#endif
-
-#if 1 /* test-only */
- /*
- * EBC Configuration Register: set ready timeout to 512 ebc-clks -> ca. 15 us
- */
- mtebc (epcr, 0xa8400000); /* ebc always driven */
-#endif
-
- return 0;
-}
-
-
-int misc_init_f (void)
-{
- return 0; /* dummy implementation */
-}
-
-
-int misc_init_r (void)
-{
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
- /*
- * Set NAND-FLASH GPIO signals to default
- */
- out32(GPIO0_OR, in32(GPIO0_OR) & ~(CFG_NAND_CLE | CFG_NAND_ALE));
- out32(GPIO0_OR, in32(GPIO0_OR) | CFG_NAND_CE);
-#endif
-
- return (0);
-}
-
-
-/*
- * Check Board Identity:
- */
-int checkboard (void)
-{
- char str[64];
- int i = getenv_r ("serial#", str, sizeof(str));
-
- puts ("Board: ");
-
- if (i == -1) {
- puts ("### No HW ID - assuming G2000");
- } else {
- puts(str);
- }
-
- putc ('\n');
-
- return 0;
-}
-
-
-/* -------------------------------------------------------------------------
- G2000 rev B is an embeded design. we don't read for spd of this version.
- Doing static SDRAM controller configuration in the following section.
- ------------------------------------------------------------------------- */
-
-long int init_sdram_static_settings(void)
-{
-#define mtsdram0(reg, data) mtdcr(memcfga,reg);mtdcr(memcfgd,data)
- /* disable memcontroller so updates work */
- mtsdram0( mem_mcopt1, MEM_MCOPT1_INIT_VAL );
- mtsdram0( mem_rtr , MEM_RTR_INIT_VAL );
- mtsdram0( mem_pmit , MEM_PMIT_INIT_VAL );
- mtsdram0( mem_mb0cf , MEM_MB0CF_INIT_VAL );
- mtsdram0( mem_mb1cf , MEM_MB1CF_INIT_VAL );
- mtsdram0( mem_sdtr1 , MEM_SDTR1_INIT_VAL );
-
- /* SDRAM have a power on delay, 500 micro should do */
- udelay(500);
- mtsdram0( mem_mcopt1, MEM_MCOPT1_INIT_VAL|SDRAM0_CFG_ENABLE );
-
- return (CFG_SDRAM_SIZE); /* CFG_SDRAM_SIZE is in G2000.h */
- }
-
-
-long int initdram (int board_type)
-{
- long int ret;
-
-/* flzt, we can still turn this on in the future */
-/* #ifdef CONFIG_SPD_EEPROM
- ret = spd_sdram ();
-#else
- ret = init_sdram_static_settings();
-#endif
-*/
-
- ret = init_sdram_static_settings();
-
- return ret;
-}
-
-
-#if 1 /* test-only */
-void sdram_init(void)
-{
- init_sdram_static_settings();
-}
-#endif
-
-
-#if 0 /* test-only */
-long int initdram (int board_type)
-{
- unsigned long val;
-
- mtdcr(memcfga, mem_mb0cf);
- val = mfdcr(memcfgd);
-
-#if 0
- printf("\nmb0cf=%x\n", val); /* test-only */
- printf("strap=%x\n", mfdcr(strap)); /* test-only */
-#endif
-
- return (4*1024*1024 << ((val & 0x000e0000) >> 17));
-}
-#endif
-
-
-int testdram (void)
-{
- /* TODO: XXX XXX XXX */
- printf ("test: 16 MB - ok\n");
-
- return (0);
-}
-
-
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
-#include <linux/mtd/nand.h>
-extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
-
-void nand_init(void)
-{
- nand_probe(CFG_NAND_BASE);
- if (nand_dev_desc[0].ChipID != NAND_ChipID_UNKNOWN) {
- print_size(nand_dev_desc[0].totlen, "\n");
- }
-}
-#endif
-
-
-#if 0 /* test-only !!! */
-int do_dumpebc(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- ulong ap, cr;
-
- printf("\nEBC registers for PPC405GP:\n");
- mfebc(pb0ap, ap); mfebc(pb0cr, cr);
- printf("0: AP=%08lx CP=%08lx\n", ap, cr);
- mfebc(pb1ap, ap); mfebc(pb1cr, cr);
- printf("1: AP=%08lx CP=%08lx\n", ap, cr);
- mfebc(pb2ap, ap); mfebc(pb2cr, cr);
- printf("2: AP=%08lx CP=%08lx\n", ap, cr);
- mfebc(pb3ap, ap); mfebc(pb3cr, cr);
- printf("3: AP=%08lx CP=%08lx\n", ap, cr);
- mfebc(pb4ap, ap); mfebc(pb4cr, cr);
- printf("4: AP=%08lx CP=%08lx\n", ap, cr);
- printf("\n");
-
- return 0;
-}
-U_BOOT_CMD(
- dumpebc, 1, 1, do_dumpebc,
- "dumpebc - Dump all EBC registers\n",
- NULL
-);
-
-
-int do_dumpdcr(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- int i;
-
- printf("\nDevice Configuration Registers (DCR's) for PPC405GP:");
- for (i=0; i<=0x1e0; i++) {
- if (!(i % 0x8)) {
- printf("\n%04x ", i);
- }
- printf("%08lx ", get_dcr(i));
- }
- printf("\n");
-
- return 0;
-}
-U_BOOT_CMD(
- dumpdcr, 1, 1, do_dumpdcr,
- "dumpdcr - Dump all DCR registers\n",
- NULL
-);
-
-
-int do_dumpspr(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- printf("\nSpecial Purpose Registers (SPR's) for PPC405GP:");
- printf("\n%04x %08x ", 947, mfspr(947));
- printf("\n%04x %08x ", 9, mfspr(9));
- printf("\n%04x %08x ", 1014, mfspr(1014));
- printf("\n%04x %08x ", 1015, mfspr(1015));
- printf("\n%04x %08x ", 1010, mfspr(1010));
- printf("\n%04x %08x ", 957, mfspr(957));
- printf("\n%04x %08x ", 1008, mfspr(1008));
- printf("\n%04x %08x ", 1018, mfspr(1018));
- printf("\n%04x %08x ", 954, mfspr(954));
- printf("\n%04x %08x ", 950, mfspr(950));
- printf("\n%04x %08x ", 951, mfspr(951));
- printf("\n%04x %08x ", 981, mfspr(981));
- printf("\n%04x %08x ", 980, mfspr(980));
- printf("\n%04x %08x ", 982, mfspr(982));
- printf("\n%04x %08x ", 1012, mfspr(1012));
- printf("\n%04x %08x ", 1013, mfspr(1013));
- printf("\n%04x %08x ", 948, mfspr(948));
- printf("\n%04x %08x ", 949, mfspr(949));
- printf("\n%04x %08x ", 1019, mfspr(1019));
- printf("\n%04x %08x ", 979, mfspr(979));
- printf("\n%04x %08x ", 8, mfspr(8));
- printf("\n%04x %08x ", 945, mfspr(945));
- printf("\n%04x %08x ", 987, mfspr(987));
- printf("\n%04x %08x ", 287, mfspr(287));
- printf("\n%04x %08x ", 953, mfspr(953));
- printf("\n%04x %08x ", 955, mfspr(955));
- printf("\n%04x %08x ", 272, mfspr(272));
- printf("\n%04x %08x ", 273, mfspr(273));
- printf("\n%04x %08x ", 274, mfspr(274));
- printf("\n%04x %08x ", 275, mfspr(275));
- printf("\n%04x %08x ", 260, mfspr(260));
- printf("\n%04x %08x ", 276, mfspr(276));
- printf("\n%04x %08x ", 261, mfspr(261));
- printf("\n%04x %08x ", 277, mfspr(277));
- printf("\n%04x %08x ", 262, mfspr(262));
- printf("\n%04x %08x ", 278, mfspr(278));
- printf("\n%04x %08x ", 263, mfspr(263));
- printf("\n%04x %08x ", 279, mfspr(279));
- printf("\n%04x %08x ", 26, mfspr(26));
- printf("\n%04x %08x ", 27, mfspr(27));
- printf("\n%04x %08x ", 990, mfspr(990));
- printf("\n%04x %08x ", 991, mfspr(991));
- printf("\n%04x %08x ", 956, mfspr(956));
- printf("\n%04x %08x ", 284, mfspr(284));
- printf("\n%04x %08x ", 285, mfspr(285));
- printf("\n%04x %08x ", 986, mfspr(986));
- printf("\n%04x %08x ", 984, mfspr(984));
- printf("\n%04x %08x ", 256, mfspr(256));
- printf("\n%04x %08x ", 1, mfspr(1));
- printf("\n%04x %08x ", 944, mfspr(944));
- printf("\n");
-
- return 0;
-}
-U_BOOT_CMD(
- dumpspr, 1, 1, do_dumpspr,
- "dumpspr - Dump all SPR registers\n",
- NULL
-);
-#endif
diff --git a/board/g2000/strataflash.c b/board/g2000/strataflash.c
deleted file mode 100644
index 8446e02106..0000000000
--- a/board/g2000/strataflash.c
+++ /dev/null
@@ -1,793 +0,0 @@
-/*
- * (C) Copyright 2002
- * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/processor.h>
-
-#undef DEBUG_FLASH
-/*
- * This file implements a Common Flash Interface (CFI) driver for ppcboot.
- * The width of the port and the width of the chips are determined at initialization.
- * These widths are used to calculate the address for access CFI data structures.
- * It has been tested on an Intel Strataflash implementation.
- *
- * References
- * JEDEC Standard JESD68 - Common Flash Interface (CFI)
- * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
- * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
- * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
- *
- * TODO
- * Use Primary Extended Query table (PRI) and Alternate Algorithm Query Table (ALT) to determine if protection is available
- * Add support for other command sets Use the PRI and ALT to determine command set
- * Verify erase and program timeouts.
- */
-
-#define FLASH_CMD_CFI 0x98
-#define FLASH_CMD_READ_ID 0x90
-#define FLASH_CMD_RESET 0xff
-#define FLASH_CMD_BLOCK_ERASE 0x20
-#define FLASH_CMD_ERASE_CONFIRM 0xD0
-#define FLASH_CMD_WRITE 0x40
-#define FLASH_CMD_PROTECT 0x60
-#define FLASH_CMD_PROTECT_SET 0x01
-#define FLASH_CMD_PROTECT_CLEAR 0xD0
-#define FLASH_CMD_CLEAR_STATUS 0x50
-#define FLASH_CMD_WRITE_TO_BUFFER 0xE8
-#define FLASH_CMD_WRITE_BUFFER_CONFIRM 0xD0
-
-#define FLASH_STATUS_DONE 0x80
-#define FLASH_STATUS_ESS 0x40
-#define FLASH_STATUS_ECLBS 0x20
-#define FLASH_STATUS_PSLBS 0x10
-#define FLASH_STATUS_VPENS 0x08
-#define FLASH_STATUS_PSS 0x04
-#define FLASH_STATUS_DPS 0x02
-#define FLASH_STATUS_R 0x01
-#define FLASH_STATUS_PROTECT 0x01
-
-#define FLASH_OFFSET_CFI 0x55
-#define FLASH_OFFSET_CFI_RESP 0x10
-#define FLASH_OFFSET_WTOUT 0x1F
-#define FLASH_OFFSET_WBTOUT 0x20
-#define FLASH_OFFSET_ETOUT 0x21
-#define FLASH_OFFSET_CETOUT 0x22
-#define FLASH_OFFSET_WMAX_TOUT 0x23
-#define FLASH_OFFSET_WBMAX_TOUT 0x24
-#define FLASH_OFFSET_EMAX_TOUT 0x25
-#define FLASH_OFFSET_CEMAX_TOUT 0x26
-#define FLASH_OFFSET_SIZE 0x27
-#define FLASH_OFFSET_INTERFACE 0x28
-#define FLASH_OFFSET_BUFFER_SIZE 0x2A
-#define FLASH_OFFSET_NUM_ERASE_REGIONS 0x2C
-#define FLASH_OFFSET_ERASE_REGIONS 0x2D
-#define FLASH_OFFSET_PROTECT 0x02
-#define FLASH_OFFSET_USER_PROTECTION 0x85
-#define FLASH_OFFSET_INTEL_PROTECTION 0x81
-
-#define FLASH_MAN_CFI 0x01000000
-
-typedef union {
- unsigned char c;
- unsigned short w;
- unsigned long l;
-} cfiword_t;
-
-typedef union {
- unsigned char * cp;
- unsigned short *wp;
- unsigned long *lp;
-} cfiptr_t;
-
-#define NUM_ERASE_REGIONS 4
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-
-static void flash_add_byte(flash_info_t *info, cfiword_t * cword, uchar c);
-static void flash_make_cmd(flash_info_t * info, uchar cmd, void * cmdbuf);
-static void flash_write_cmd(flash_info_t * info, int sect, uchar offset, uchar cmd);
-static int flash_isequal(flash_info_t * info, int sect, uchar offset, uchar cmd);
-static int flash_isset(flash_info_t * info, int sect, uchar offset, uchar cmd);
-static int flash_detect_cfi(flash_info_t * info);
-static ulong flash_get_size (ulong base, int banknum);
-static int flash_write_cfiword (flash_info_t *info, ulong dest, cfiword_t cword);
-static int flash_full_status_check(flash_info_t * info, ulong sector, ulong tout, char * prompt);
-#ifdef CFG_FLASH_USE_BUFFER_WRITE
-static int flash_write_cfibuffer(flash_info_t * info, ulong dest, uchar * cp, int len);
-#endif
-/*-----------------------------------------------------------------------
- * create an address based on the offset and the port width
- */
-inline uchar * flash_make_addr(flash_info_t * info, int sect, int offset)
-{
- return ((uchar *)(info->start[sect] + (offset * info->portwidth)));
-}
-/*-----------------------------------------------------------------------
- * read a character at a port width address
- */
-inline uchar flash_read_uchar(flash_info_t * info, uchar offset)
-{
- uchar *cp;
- cp = flash_make_addr(info, 0, offset);
- return (cp[info->portwidth - 1]);
-}
-
-/*-----------------------------------------------------------------------
- * read a short word by swapping for ppc format.
- */
-ushort flash_read_ushort(flash_info_t * info, int sect, uchar offset)
-{
- uchar * addr;
-
- addr = flash_make_addr(info, sect, offset);
- return ((addr[(2*info->portwidth) - 1] << 8) | addr[info->portwidth - 1]);
-
-}
-
-/*-----------------------------------------------------------------------
- * read a long word by picking the least significant byte of each maiximum
- * port size word. Swap for ppc format.
- */
-ulong flash_read_long(flash_info_t * info, int sect, uchar offset)
-{
- uchar * addr;
-
- addr = flash_make_addr(info, sect, offset);
- return ( (addr[(2*info->portwidth) - 1] << 24 ) | (addr[(info->portwidth) -1] << 16) |
- (addr[(4*info->portwidth) - 1] << 8) | addr[(3*info->portwidth) - 1]);
-
-}
-
-/*-----------------------------------------------------------------------
- */
-unsigned long flash_init (void)
-{
- unsigned long size;
- int i;
- unsigned long address;
-
-
- /* The flash is positioned back to back, with the demultiplexing of the chip
- * based on the A24 address line.
- *
- */
-
- address = CFG_FLASH_BASE;
- size = 0;
-
- /* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- size += flash_info[i].size = flash_get_size(address, i);
- address += CFG_FLASH_INCREMENT;
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n",i,
- flash_info[0].size, flash_info[i].size<<20);
- }
- }
-
-#if 0 /* test-only */
- /* Monitor protection ON by default */
-#if (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
- for(i=0; flash_info[0].start[i] < CFG_MONITOR_BASE+CFG_MONITOR_LEN-1; i++)
- (void)flash_real_protect(&flash_info[0], i, 1);
-#endif
-#else
- /* monitor protection ON by default */
- flash_protect (FLAG_PROTECT_SET,
- - CFG_MONITOR_LEN,
- - 1, &flash_info[1]);
-#endif
-
- return (size);
-}
-
-/*-----------------------------------------------------------------------
- */
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- int rcode = 0;
- int prot;
- int sect;
-
- if( info->flash_id != FLASH_MAN_CFI) {
- printf ("Can't erase unknown flash type - aborted\n");
- return 1;
- }
- if ((s_first < 0) || (s_first > s_last)) {
- printf ("- no sectors to erase\n");
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
-
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- flash_write_cmd(info, sect, 0, FLASH_CMD_CLEAR_STATUS);
- flash_write_cmd(info, sect, 0, FLASH_CMD_BLOCK_ERASE);
- flash_write_cmd(info, sect, 0, FLASH_CMD_ERASE_CONFIRM);
-
- if(flash_full_status_check(info, sect, info->erase_blk_tout, "erase")) {
- rcode = 1;
- } else
- printf(".");
- }
- }
- printf (" done\n");
- return rcode;
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t *info)
-{
- int i;
-
- if (info->flash_id != FLASH_MAN_CFI) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- printf("CFI conformant FLASH (%d x %d)",
- (info->portwidth << 3 ), (info->chipwidth << 3 ));
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
- printf(" Erase timeout %ld ms, write timeout %ld ms, buffer write timeout %ld ms, buffer size %d\n",
- info->erase_blk_tout, info->write_tout, info->buffer_write_tout, info->buffer_size);
-
- printf (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
-#ifdef CFG_FLASH_EMPTY_INFO
- int k;
- int size;
- int erased;
- volatile unsigned long *flash;
-
- /*
- * Check if whole sector is erased
- */
- if (i != (info->sector_count-1))
- size = info->start[i+1] - info->start[i];
- else
- size = info->start[0] + info->size - info->start[i];
- erased = 1;
- flash = (volatile unsigned long *)info->start[i];
- size = size >> 2; /* divide by 4 for longword access */
- for (k=0; k<size; k++)
- {
- if (*flash++ != 0xffffffff)
- {
- erased = 0;
- break;
- }
- }
-
- if ((i % 5) == 0)
- printf ("\n ");
- /* print empty and read-only info */
- printf (" %08lX%s%s",
- info->start[i],
- erased ? " E" : " ",
- info->protect[i] ? "RO " : " ");
-#else
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " ");
-#endif
- }
- printf ("\n");
- return;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong wp;
- ulong cp;
- int aln;
- cfiword_t cword;
- int i, rc;
-
- /* get lower aligned address */
- wp = (addr & ~(info->portwidth - 1));
-
- /* handle unaligned start */
- if((aln = addr - wp) != 0) {
- cword.l = 0;
- cp = wp;
- for(i=0;i<aln; ++i, ++cp)
- flash_add_byte(info, &cword, (*(uchar *)cp));
-
- for(; (i< info->portwidth) && (cnt > 0) ; i++) {
- flash_add_byte(info, &cword, *src++);
- cnt--;
- cp++;
- }
- for(; (cnt == 0) && (i < info->portwidth); ++i, ++cp)
- flash_add_byte(info, &cword, (*(uchar *)cp));
- if((rc = flash_write_cfiword(info, wp, cword)) != 0)
- return rc;
- wp = cp;
- }
-
-#ifdef CFG_FLASH_USE_BUFFER_WRITE
- while(cnt >= info->portwidth) {
- i = info->buffer_size > cnt? cnt: info->buffer_size;
- if((rc = flash_write_cfibuffer(info, wp, src,i)) != ERR_OK)
- return rc;
- wp += i;
- src += i;
- cnt -=i;
- }
-#else
- /* handle the aligned part */
- while(cnt >= info->portwidth) {
- cword.l = 0;
- for(i = 0; i < info->portwidth; i++) {
- flash_add_byte(info, &cword, *src++);
- }
- if((rc = flash_write_cfiword(info, wp, cword)) != 0)
- return rc;
- wp += info->portwidth;
- cnt -= info->portwidth;
- }
-#endif /* CFG_FLASH_USE_BUFFER_WRITE */
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- cword.l = 0;
- for (i=0, cp=wp; (i<info->portwidth) && (cnt>0); ++i, ++cp) {
- flash_add_byte(info, &cword, *src++);
- --cnt;
- }
- for (; i<info->portwidth; ++i, ++cp) {
- flash_add_byte(info, & cword, (*(uchar *)cp));
- }
-
- return flash_write_cfiword(info, wp, cword);
-}
-
-/*-----------------------------------------------------------------------
- */
-int flash_real_protect(flash_info_t *info, long sector, int prot)
-{
- int retcode = 0;
-
- flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
- flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT);
- if(prot)
- flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT_SET);
- else
- flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
-
- if((retcode = flash_full_status_check(info, sector, info->erase_blk_tout,
- prot?"protect":"unprotect")) == 0) {
-
- info->protect[sector] = prot;
- /* Intel's unprotect unprotects all locking */
- if(prot == 0) {
- int i;
- for(i = 0 ; i<info->sector_count; i++) {
- if(info->protect[i])
- flash_real_protect(info, i, 1);
- }
- }
- }
-
- return retcode;
-}
-/*-----------------------------------------------------------------------
- * wait for XSR.7 to be set. Time out with an error if it does not.
- * This routine does not set the flash to read-array mode.
- */
-static int flash_status_check(flash_info_t * info, ulong sector, ulong tout, char * prompt)
-{
- ulong start;
-
- /* Wait for command completion */
- start = get_timer (0);
- while(!flash_isset(info, sector, 0, FLASH_STATUS_DONE)) {
- if (get_timer(start) > info->erase_blk_tout) {
- printf("Flash %s timeout at address %lx\n", prompt, info->start[sector]);
- flash_write_cmd(info, sector, 0, FLASH_CMD_RESET);
- return ERR_TIMOUT;
- }
- }
- return ERR_OK;
-}
-/*-----------------------------------------------------------------------
- * Wait for XSR.7 to be set, if it times out print an error, otherwise do a full status check.
- * This routine sets the flash to read-array mode.
- */
-static int flash_full_status_check(flash_info_t * info, ulong sector, ulong tout, char * prompt)
-{
- int retcode;
- retcode = flash_status_check(info, sector, tout, prompt);
- if((retcode == ERR_OK) && !flash_isequal(info,sector, 0, FLASH_STATUS_DONE)) {
- retcode = ERR_INVAL;
- printf("Flash %s error at address %lx\n", prompt,info->start[sector]);
- if(flash_isset(info, sector, 0, FLASH_STATUS_ECLBS | FLASH_STATUS_PSLBS)){
- printf("Command Sequence Error.\n");
- } else if(flash_isset(info, sector, 0, FLASH_STATUS_ECLBS)){
- printf("Block Erase Error.\n");
- retcode = ERR_NOT_ERASED;
- } else if (flash_isset(info, sector, 0, FLASH_STATUS_PSLBS)) {
- printf("Locking Error\n");
- }
- if(flash_isset(info, sector, 0, FLASH_STATUS_DPS)){
- printf("Block locked.\n");
- retcode = ERR_PROTECTED;
- }
- if(flash_isset(info, sector, 0, FLASH_STATUS_VPENS))
- printf("Vpp Low Error.\n");
- }
- flash_write_cmd(info, sector, 0, FLASH_CMD_RESET);
- return retcode;
-}
-/*-----------------------------------------------------------------------
- */
-static void flash_add_byte(flash_info_t *info, cfiword_t * cword, uchar c)
-{
- switch(info->portwidth) {
- case FLASH_CFI_8BIT:
- cword->c = c;
- break;
- case FLASH_CFI_16BIT:
- cword->w = (cword->w << 8) | c;
- break;
- case FLASH_CFI_32BIT:
- cword->l = (cword->l << 8) | c;
- }
-}
-
-
-/*-----------------------------------------------------------------------
- * make a proper sized command based on the port and chip widths
- */
-static void flash_make_cmd(flash_info_t * info, uchar cmd, void * cmdbuf)
-{
- int i;
- uchar *cp = (uchar *)cmdbuf;
- for(i=0; i< info->portwidth; i++)
- *cp++ = ((i+1) % info->chipwidth) ? '\0':cmd;
-}
-
-/*
- * Write a proper sized command to the correct address
- */
-static void flash_write_cmd(flash_info_t * info, int sect, uchar offset, uchar cmd)
-{
-
- volatile cfiptr_t addr;
- cfiword_t cword;
- addr.cp = flash_make_addr(info, sect, offset);
- flash_make_cmd(info, cmd, &cword);
- switch(info->portwidth) {
- case FLASH_CFI_8BIT:
- *addr.cp = cword.c;
- break;
- case FLASH_CFI_16BIT:
- *addr.wp = cword.w;
- break;
- case FLASH_CFI_32BIT:
- *addr.lp = cword.l;
- break;
- }
-}
-
-/*-----------------------------------------------------------------------
- */
-static int flash_isequal(flash_info_t * info, int sect, uchar offset, uchar cmd)
-{
- cfiptr_t cptr;
- cfiword_t cword;
- int retval;
- cptr.cp = flash_make_addr(info, sect, offset);
- flash_make_cmd(info, cmd, &cword);
- switch(info->portwidth) {
- case FLASH_CFI_8BIT:
- retval = (cptr.cp[0] == cword.c);
- break;
- case FLASH_CFI_16BIT:
- retval = (cptr.wp[0] == cword.w);
- break;
- case FLASH_CFI_32BIT:
- retval = (cptr.lp[0] == cword.l);
- break;
- default:
- retval = 0;
- break;
- }
- return retval;
-}
-/*-----------------------------------------------------------------------
- */
-static int flash_isset(flash_info_t * info, int sect, uchar offset, uchar cmd)
-{
- cfiptr_t cptr;
- cfiword_t cword;
- int retval;
- cptr.cp = flash_make_addr(info, sect, offset);
- flash_make_cmd(info, cmd, &cword);
- switch(info->portwidth) {
- case FLASH_CFI_8BIT:
- retval = ((cptr.cp[0] & cword.c) == cword.c);
- break;
- case FLASH_CFI_16BIT:
- retval = ((cptr.wp[0] & cword.w) == cword.w);
- break;
- case FLASH_CFI_32BIT:
- retval = ((cptr.lp[0] & cword.l) == cword.l);
- break;
- default:
- retval = 0;
- break;
- }
- return retval;
-}
-
-/*-----------------------------------------------------------------------
- * detect if flash is compatible with the Common Flash Interface (CFI)
- * http://www.jedec.org/download/search/jesd68.pdf
- *
-*/
-static int flash_detect_cfi(flash_info_t * info)
-{
-
- for(info->portwidth=FLASH_CFI_8BIT; info->portwidth <= FLASH_CFI_32BIT;
- info->portwidth <<= 1) {
- for(info->chipwidth =FLASH_CFI_BY8;
- info->chipwidth <= info->portwidth;
- info->chipwidth <<= 1) {
- flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
- flash_write_cmd(info, 0, FLASH_OFFSET_CFI, FLASH_CMD_CFI);
- if(flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP,'Q') &&
- flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R') &&
- flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y'))
- return 1;
- }
- }
- return 0;
-}
-/*
- * The following code cannot be run from FLASH!
- *
- */
-static ulong flash_get_size (ulong base, int banknum)
-{
- flash_info_t * info = &flash_info[banknum];
- int i, j;
- int sect_cnt;
- unsigned long sector;
- unsigned long tmp;
- int size_ratio;
- uchar num_erase_regions;
- int erase_region_size;
- int erase_region_count;
-
- info->start[0] = base;
-
- if(flash_detect_cfi(info)){
-#ifdef DEBUG_FLASH
- printf("portwidth=%d chipwidth=%d\n", info->portwidth, info->chipwidth); /* test-only */
-#endif
- size_ratio = info->portwidth / info->chipwidth;
- num_erase_regions = flash_read_uchar(info, FLASH_OFFSET_NUM_ERASE_REGIONS);
-#ifdef DEBUG_FLASH
- printf("found %d erase regions\n", num_erase_regions);
-#endif
- sect_cnt = 0;
- sector = base;
- for(i = 0 ; i < num_erase_regions; i++) {
- if(i > NUM_ERASE_REGIONS) {
- printf("%d erase regions found, only %d used\n",
- num_erase_regions, NUM_ERASE_REGIONS);
- break;
- }
- tmp = flash_read_long(info, 0, FLASH_OFFSET_ERASE_REGIONS);
- erase_region_size = (tmp & 0xffff)? ((tmp & 0xffff) * 256): 128;
- tmp >>= 16;
- erase_region_count = (tmp & 0xffff) +1;
- for(j = 0; j< erase_region_count; j++) {
- info->start[sect_cnt] = sector;
- sector += (erase_region_size * size_ratio);
- info->protect[sect_cnt] = flash_isset(info, sect_cnt, FLASH_OFFSET_PROTECT, FLASH_STATUS_PROTECT);
- sect_cnt++;
- }
- }
-
- info->sector_count = sect_cnt;
- /* multiply the size by the number of chips */
- info->size = (1 << flash_read_uchar(info, FLASH_OFFSET_SIZE)) * size_ratio;
- info->buffer_size = (1 << flash_read_ushort(info, 0, FLASH_OFFSET_BUFFER_SIZE));
- tmp = 1 << flash_read_uchar(info, FLASH_OFFSET_ETOUT);
- info->erase_blk_tout = (tmp * (1 << flash_read_uchar(info, FLASH_OFFSET_EMAX_TOUT)));
- tmp = 1 << flash_read_uchar(info, FLASH_OFFSET_WBTOUT);
- info->buffer_write_tout = (tmp * (1 << flash_read_uchar(info, FLASH_OFFSET_WBMAX_TOUT)));
- tmp = 1 << flash_read_uchar(info, FLASH_OFFSET_WTOUT);
- info->write_tout = (tmp * (1 << flash_read_uchar(info, FLASH_OFFSET_WMAX_TOUT)))/ 1000;
- info->flash_id = FLASH_MAN_CFI;
- }
-
- flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
- return(info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-static int flash_write_cfiword (flash_info_t *info, ulong dest, cfiword_t cword)
-{
-
- cfiptr_t ctladdr;
- cfiptr_t cptr;
- int flag;
-
- ctladdr.cp = flash_make_addr(info, 0, 0);
- cptr.cp = (uchar *)dest;
-
-
- /* Check if Flash is (sufficiently) erased */
- switch(info->portwidth) {
- case FLASH_CFI_8BIT:
- flag = ((cptr.cp[0] & cword.c) == cword.c);
- break;
- case FLASH_CFI_16BIT:
- flag = ((cptr.wp[0] & cword.w) == cword.w);
- break;
- case FLASH_CFI_32BIT:
- flag = ((cptr.lp[0] & cword.l) == cword.l);
- break;
- default:
- return 2;
- }
- if(!flag)
- return 2;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- flash_write_cmd(info, 0, 0, FLASH_CMD_CLEAR_STATUS);
- flash_write_cmd(info, 0, 0, FLASH_CMD_WRITE);
-
- switch(info->portwidth) {
- case FLASH_CFI_8BIT:
- cptr.cp[0] = cword.c;
- break;
- case FLASH_CFI_16BIT:
- cptr.wp[0] = cword.w;
- break;
- case FLASH_CFI_32BIT:
- cptr.lp[0] = cword.l;
- break;
- }
-
- /* re-enable interrupts if necessary */
- if(flag)
- enable_interrupts();
-
- return flash_full_status_check(info, 0, info->write_tout, "write");
-}
-
-#ifdef CFG_FLASH_USE_BUFFER_WRITE
-
-/* loop through the sectors from the highest address
- * when the passed address is greater or equal to the sector address
- * we have a match
- */
-static int find_sector(flash_info_t *info, ulong addr)
-{
- int sector;
- for(sector = info->sector_count - 1; sector >= 0; sector--) {
- if(addr >= info->start[sector])
- break;
- }
- return sector;
-}
-
-static int flash_write_cfibuffer(flash_info_t * info, ulong dest, uchar * cp, int len)
-{
-
- int sector;
- int cnt;
- int retcode;
- volatile cfiptr_t src;
- volatile cfiptr_t dst;
-
- src.cp = cp;
- dst.cp = (uchar *)dest;
- sector = find_sector(info, dest);
- flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
- flash_write_cmd(info, sector, 0, FLASH_CMD_WRITE_TO_BUFFER);
- if((retcode = flash_status_check(info, sector, info->buffer_write_tout,
- "write to buffer")) == ERR_OK) {
- switch(info->portwidth) {
- case FLASH_CFI_8BIT:
- cnt = len;
- break;
- case FLASH_CFI_16BIT:
- cnt = len >> 1;
- if (len & 0x1) { /* test-only: unaligned size */
- puts("\nUnalgined size!!!\n"); /* test-only */
- cnt++;
- }
- break;
- case FLASH_CFI_32BIT:
- cnt = len >> 2;
- break;
- default:
- return ERR_INVAL;
- break;
- }
- flash_write_cmd(info, sector, 0, (uchar)cnt-1);
- while(cnt-- > 0) {
- switch(info->portwidth) {
- case FLASH_CFI_8BIT:
- *dst.cp++ = *src.cp++;
- break;
- case FLASH_CFI_16BIT:
- *dst.wp++ = *src.wp++;
- break;
- case FLASH_CFI_32BIT:
- *dst.lp++ = *src.lp++;
- break;
- default:
- return ERR_INVAL;
- break;
- }
- }
- flash_write_cmd(info, sector, 0, FLASH_CMD_WRITE_BUFFER_CONFIRM);
- retcode = flash_full_status_check(info, sector, info->buffer_write_tout,
- "buffer write");
- }
- flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
- return retcode;
-}
-#endif /* CFG_USE_FLASH_BUFFER_WRITE */
diff --git a/board/g2000/u-boot.lds b/board/g2000/u-boot.lds
deleted file mode 100644
index 43f776579e..0000000000
--- a/board/g2000/u-boot.lds
+++ /dev/null
@@ -1,151 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- .resetvec 0xFFFFFFFC :
- {
- *(.resetvec)
- } = 0xffff
-
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/ppc4xx/start.o (.text)
- cpu/ppc4xx/traps.o (.text)
- cpu/ppc4xx/interrupts.o (.text)
- cpu/ppc4xx/serial.o (.text)
- cpu/ppc4xx/cpu_init.o (.text)
- cpu/ppc4xx/speed.o (.text)
- cpu/ppc4xx/4xx_enet.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/extable.o (.text)
- lib_generic/zlib.o (.text)
-
-/* . = env_offset;*/
-/* common/environment.o(.text)*/
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/gcplus/Makefile b/board/gcplus/Makefile
deleted file mode 100644
index 1954d661c3..0000000000
--- a/board/gcplus/Makefile
+++ /dev/null
@@ -1,49 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# 2003 (c) MontaVista Software, Inc.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := gcplus.o flash.o
-SOBJS := lowlevel_init.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS) $(SOBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/gcplus/config.mk b/board/gcplus/config.mk
deleted file mode 100644
index 57326b8547..0000000000
--- a/board/gcplus/config.mk
+++ /dev/null
@@ -1,13 +0,0 @@
-#
-# ADS GCPlus board with SA1110 cpu
-#
-# The ADS GCPlus has 2 banks of 16 MiB SDRAM
-#
-# We use the ADS GCPlus Linux boot ROM to load U-Boot into SDRAM
-# at c020'0000 and then move ourself to c8f0'0000. Basically, just
-# install the U-Boot binary as you would the Linux zImage and then
-# reap the benfits of more convenient Linux development cycles, i.e.
-# bootp;tftp;bootm, repeat, etc.,.
-#
-
-TEXT_BASE = 0xc8f00000
diff --git a/board/gcplus/flash.c b/board/gcplus/flash.c
deleted file mode 100644
index 36d7363a80..0000000000
--- a/board/gcplus/flash.c
+++ /dev/null
@@ -1,440 +0,0 @@
-/*
- * (C) Copyright 2001
- * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
- *
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * 2003 (c) MontaVista Software, Inc.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <linux/byteorder/swab.h>
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/* Board support for 1 or 2 flash devices */
-#define FLASH_PORT_WIDTH32
-#undef FLASH_PORT_WIDTH16
-
-#ifdef FLASH_PORT_WIDTH16
-#define FLASH_PORT_WIDTH ushort
-#define FLASH_PORT_WIDTHV vu_short
-#define SWAP(x) __swab16(x)
-#else
-#define FLASH_PORT_WIDTH ulong
-#define FLASH_PORT_WIDTHV vu_long
-#define SWAP(x) __swab32(x)
-#endif
-
-#define FPW FLASH_PORT_WIDTH
-#define FPWV FLASH_PORT_WIDTHV
-
-#define mb() __asm__ __volatile__ ("" : : : "memory")
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size(FPW * addr, flash_info_t * info);
-static int write_data(flash_info_t * info, ulong dest, FPW data);
-static void flash_get_offsets(ulong base, flash_info_t * info);
-void inline spin_wheel(void);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long
-flash_init(void)
-{
- int i;
- ulong size = 0;
-
- for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
- switch (i) {
- case 0:
- flash_get_size((FPW *) PHYS_FLASH_1, &flash_info[i]);
- flash_get_offsets(PHYS_FLASH_1, &flash_info[i]);
- break;
- default:
- panic("configured too many flash banks!\n");
- break;
- }
- size += flash_info[i].size;
- }
-
- /* Protect monitor and environment sectors
- */
- flash_protect(FLAG_PROTECT_SET,
- CFG_FLASH_BASE,
- CFG_FLASH_BASE + monitor_flash_len - 1, &flash_info[0]);
-
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0]);
-
- return size;
-}
-
-/*-----------------------------------------------------------------------
- */
-static void
-flash_get_offsets(ulong base, flash_info_t * info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- return;
- }
-
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
- for (i = 0; i < info->sector_count; i++) {
- info->start[i] = base + (i * PHYS_FLASH_SECT_SIZE);
- info->protect[i] = 0;
- }
- }
-}
-
-/*-----------------------------------------------------------------------
- */
-void
-flash_print_info(flash_info_t * info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_INTEL:
- printf("INTEL ");
- break;
- default:
- printf("Unknown Vendor ");
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_28F128J3A:
- printf("28F128J3A\n");
- break;
- case FLASH_28F640J5:
- printf("28F640J5\n");
- break;
- default:
- printf("Unknown Chip Type\n");
- break;
- }
-
- printf(" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf(" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf("\n ");
- printf(" %08lX%s",
- info->start[i], info->protect[i] ? " (RO)" : " ");
- }
- printf("\n");
- return;
-}
-
-/*
- * The following code cannot be run from FLASH!
- */
-static ulong
-flash_get_size(FPW * addr, flash_info_t * info)
-{
- volatile FPW value;
- /* Write auto select command: read Manufacturer ID */
- addr[0x5555] = (FPW) 0x00AA00AA;
- addr[0x2AAA] = (FPW) 0x00550055;
- addr[0x5555] = (FPW) 0x00900090;
-
- mb();
- value = addr[0];
-
- switch (value) {
-
- case (FPW) INTEL_MANUFACT:
- info->flash_id = FLASH_MAN_INTEL;
- break;
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
- return (0); /* no or unknown flash */
- }
-
- mb();
- value = addr[1]; /* device ID */
- switch (value) {
- case (FPW) INTEL_ID_28F128J3A:
- info->flash_id += FLASH_28F128J3A;
- info->sector_count = 128;
- info->size = 0x02000000;
- break; /* => 16 MB */
- case (FPW) INTEL_ID_28F640J5:
- info->flash_id += FLASH_28F640J5;
- info->sector_count = 64;
- info->size = 0x01000000;
- break; /* => 16 MB */
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- break;
- }
-
- if (info->sector_count > CFG_MAX_FLASH_SECT) {
- printf("** ERROR: sector count %d > max (%d) **\n",
- info->sector_count, CFG_MAX_FLASH_SECT);
- info->sector_count = CFG_MAX_FLASH_SECT;
- }
-
- addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
-
- return (info->size);
-}
-
-/*-----------------------------------------------------------------------
- */
-
-int
-flash_erase(flash_info_t * info, int s_first, int s_last)
-{
- int flag, prot, sect;
- ulong type, start, last;
- int rcode = 0;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf("- missing\n");
- } else {
- printf("- no sectors to erase\n");
- }
- return 1;
- }
-
- type = (info->flash_id & FLASH_VENDMASK);
- if ((type != FLASH_MAN_INTEL)) {
- printf("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- return 1;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf("\n");
- }
-
- start = get_timer(0);
- last = start;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- FPWV *addr = (FPWV *) (info->start[sect]);
- FPW status;
-
- printf("Erasing sector %2d ... ", sect);
-
- /* arm simple, non interrupt dependent timer */
- reset_timer_masked();
-
- *addr = (FPW) 0x00500050; /* clear status register */
- *addr = (FPW) 0x00200020; /* erase setup */
- *addr = (FPW) 0x00D000D0; /* erase confirm */
-
- while (((status =
- *addr) & (FPW) 0x00800080) !=
- (FPW) 0x00800080) {
- if (get_timer_masked() > CFG_FLASH_ERASE_TOUT) {
- printf("Timeout\n");
- *addr = (FPW) 0x00B000B0; /* suspend erase */
- *addr = (FPW) 0x00FF00FF; /* reset to read mode */
- rcode = 1;
- break;
- }
- }
-
- *addr = (FPW) 0x00500050; /* clear status register cmd. */
- *addr = (FPW) 0x00FF00FF; /* resest to read mode */
-
- printf(" done\n");
- }
- }
- return rcode;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- * 4 - Flash not identified
- */
-
-int
-write_buff(flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- ulong cp, wp;
- FPW data;
- int count, i, l, rc, port_width;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- return 4;
- }
-/* get lower word aligned address */
-#ifdef FLASH_PORT_WIDTH16
- wp = (addr & ~1);
- port_width = 2;
-#else
- wp = (addr & ~3);
- port_width = 4;
-#endif
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i = 0, cp = wp; i < l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
- for (; i < port_width && cnt > 0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt == 0 && i < port_width; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
-
- if ((rc = write_data(info, wp, SWAP(data))) != 0) {
- return (rc);
- }
- wp += port_width;
- }
-
- /*
- * handle word aligned part
- */
- count = 0;
- while (cnt >= port_width) {
- data = 0;
- for (i = 0; i < port_width; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_data(info, wp, SWAP(data))) != 0) {
- return (rc);
- }
- wp += port_width;
- cnt -= port_width;
- if (count++ > 0x800) {
- spin_wheel();
- count = 0;
- }
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i < port_width; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
-
- return (write_data(info, wp, SWAP(data)));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word or halfword to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int
-write_data(flash_info_t * info, ulong dest, FPW data)
-{
- FPWV *addr = (FPWV *) dest;
- ulong status;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*addr & data) != data) {
- printf("not erased at %08lX (%lX)\n", (ulong) addr, *addr);
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- *addr = (FPW) 0x00400040; /* write setup */
- *addr = data;
-
- /* arm simple, non interrupt dependent timer */
- reset_timer_masked();
-
- /* wait while polling the status register */
- while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
- if (get_timer_masked() > CFG_FLASH_WRITE_TOUT) {
- *addr = (FPW) 0x00FF00FF; /* restore read mode */
- return (1);
- }
- }
-
- *addr = (FPW) 0x00FF00FF; /* restore read mode */
-
- return (0);
-}
-
-void inline
-spin_wheel(void)
-{
- static int p = 0;
- static char w[] = "\\/-";
-
- printf("\010%c", w[p]);
- (++p == 3) ? (p = 0) : 0;
-}
diff --git a/board/gcplus/gcplus.c b/board/gcplus/gcplus.c
deleted file mode 100644
index 261e894f46..0000000000
--- a/board/gcplus/gcplus.c
+++ /dev/null
@@ -1,73 +0,0 @@
-/*
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * 2003-2004 (c) MontaVista Software, Inc.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <SA-1100.h>
-/* ------------------------------------------------------------------------- */
-
-/*
- * Miscelaneous platform dependent initialisations
- */
-
-int
-board_init(void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- gd->bd->bi_arch_number = MACH_TYPE_GRAPHICSCLIENT;
-
- gd->bd->bi_boot_params = 0xc000003c; /* Weird address? */
-
- /* Most of the ADS GCPlus I/O is connected to Static nCS2.
- * So I'm brute forcing nCS2 timiming here for worst case.
- */
- MSC1 &= ~0xFFFF;
- MSC1 |= 0x8649;
-
- /* Nothing is connected to Static nCS4 or nCS5. But I'm using
- * nCS4 as a paranoia safe guard to force nCS2, nOE; nWE high
- * after accessing I/O via (non-VLIO) nCS2. What can I say, I'm
- * paranoid and lack decent tools to alleviate my fear. I sure
- * do wish I had a logic analyzer. : (
- */
-
- MSC2 = 0xfff9fff9;
-
- return 0;
-}
-
-int
-dram_init(void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
- gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
- gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
-
- return (0);
-}
diff --git a/board/gcplus/lowlevel_init.S b/board/gcplus/lowlevel_init.S
deleted file mode 100644
index f292c4d28a..0000000000
--- a/board/gcplus/lowlevel_init.S
+++ /dev/null
@@ -1,77 +0,0 @@
-/*
- * Memory Setup stuff - taken from blob memsetup.S
- *
- * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) and
- * Jan-Derk Bakker (J.D.Bakker@its.tudelft.nl)
- * 2003-2004 (c) MontaVista Software, Inc.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-
-#include "config.h"
-#include "version.h"
-
-
- .globl lowlevel_init
-lowlevel_init:
- /* The ADS GC+ for Linux Boot Rom Ver. 1.73 does memory init for us.
- * However the darn thing leaves the MMU enabled before handing control
- * over to us. So we need to disable the MMU and we use lowlevel_init
- * to do it.
- */
-
-@ The following code segment was borrowed with gratitude from:
-@ linux-2.4.19-rmk7/arch/arm/boot/compressed/head-sa1100.S
-
- @ Data cache might be active.
- @ Be sure to flush kernel binary out of the cache,
- @ whatever state it is, before it is turned off.
- @ This is done by fetching through currently executed
- @ memory to be sure we hit the same cache.
- bic r2, pc, #0x1f
- add r3, r2, #0x4000 @ 16 kb is quite enough...
-1: ldr r0, [r2], #32
- teq r2, r3
- bne 1b
- mcr p15, 0, r0, c7, c10, 4 @ drain WB
- mcr p15, 0, r0, c7, c7, 0 @ flush I & D caches
-
- @ disabling MMU and caches
- mrc p15, 0, r0, c1, c0, 0 @ read control reg
- bic r0, r0, #0x0d @ clear WB, DC, MMU
- bic r0, r0, #0x1000 @ clear Icache
- mcr p15, 0, r0, c1, c0, 0
-
- nop
- nop
- nop
- nop
- nop
-
- b 2f
-2:
- nop
- nop
- nop
- nop
- nop
-
-
- mov pc, lr
diff --git a/board/gcplus/u-boot.lds b/board/gcplus/u-boot.lds
deleted file mode 100644
index 9900a57c0a..0000000000
--- a/board/gcplus/u-boot.lds
+++ /dev/null
@@ -1,58 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- * 2003 (c) MontaVista Software, Inc.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-ENTRY(_start)
-SECTIONS
-{
- . = 0x00000000;
-
- . = ALIGN(4);
- .text :
- {
- cpu/sa1100/start.o (.text)
- *(.text)
- }
-
- . = ALIGN(4);
- .rodata : { *(.rodata) }
-
- . = ALIGN(4);
- .data : { *(.data) }
-
- . = ALIGN(4);
- .got : { *(.got) }
-
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = ALIGN(4);
- __bss_start = .;
- .bss : { *(.bss) }
- _end = .;
-}
diff --git a/board/gen860t/Makefile b/board/gen860t/Makefile
deleted file mode 100644
index dd7ecf1285..0000000000
--- a/board/gen860t/Makefile
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o beeper.o fpga.o ioport.o
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/gen860t/README b/board/gen860t/README
deleted file mode 100644
index 7205afb4de..0000000000
--- a/board/gen860t/README
+++ /dev/null
@@ -1,146 +0,0 @@
-This directory contains board specific code for a generic MPC860T based
-embedded computer, called 'GEN860T'. The design is generic in the sense that
-common, readily available components are used and that the architecture of the
-system is relatively straightforward:
-
- One eight bit wide boot (FLASH) memory
- 32 bit main memory using SDRAM
- DOC 2000+
- Ethernet PHY
- Some I2C peripheral devices: Atmel AT24C256 EEPROM, Maxim DS1337 RTC.
- Some other miscellaneous peripherals
-
-NOTE: There are references to a XIlinx FPGA and Mil-Std 1553 databus in this
-port. I guess the computer is not as generic as I first said 8) However,
-these extras can be safely ignored.
-
-Given the GEN860T files, it should be pretty easy to reverse engineer the
-hardware configuration, if that's useful to you. Hopefully, this code will
-be useful to someone as a basis for a port to a new system or as a head start
-on a custom design. If you end up using any of this, I would appreciate
-hearing from you, especially if you discover bugs or find ways to improve the
-quality of this U-Boot port.
-
-Here are the salient features of the system:
-Clock : 33.3 Mhz oscillator
-Processor core frequency : 66.6 Mhz if in 1:2:1 mode; can also run 1:1
-Bus frequency : 33.3 Mhz
-
-Main memory:
- Type : SDRAM
- Width : 32 bits
- Size : 64 mibibytes
- Chip : Two Micron MT48LC16M16A2TG-7E
- CS : MPC860T CS1*/UPMA
- UPMA CONNECTIONS:
- SDRAM A10 : GPLA0*
- SDRAM CAS* : GPLA2*
- SDRAM WE* : GPLA3*
- SDRAM RAS* : GPLA4*
-
-Boot memory:
- Type : FLASH
- Width : 8 bits
- Size : 16 mibibytes
- Chip : One Intel 28F128J3A (StrataFlash)
- CS : MPC860T CS0*/GPCM (this is the "boot" chip select)
-
-EEPROM memory:
- Type : Serial I2C EEPROM
- Width : 8 bits
- Size : 32 kibibytes
- Chip : One Atmel AT25C256
- CS : 0x50 (external I2C address pins on device are tied to GND)
-
-Filesystem memory:
- Type : NAND FLASH (Toshiba)
- Width : 8 bits (i.e. interface to DOC is 8 bits)
- Size : 32 mibibytes
- Chip : One DiskOnCHip Millenium Plus (DOC 2000+)
- CS : MPC860T CS2*/GPCM
-
-Network support:
- MAC : MPC86OT FEC (Fast Ethernet Controller)
- PHY : Intel LXT971A
- MII Addr: 0x0 (hardwired on the board)
- MII IRQ :
-
-Console:
- RS-232 on SMC1 (Maxim MAX3232 LVCMOS-RS232 level shifter)
-
-Real Time Clock:
- Type : Low power, I2C interface
- Chip : Maxim DS1337
- CS : Address 0x68 on I2C bus
-
- The MPC860T's internal RTC has a defect in Mask rev D that increases
- the current drain on the KAPWR line to 10 mA. Since this is an
- unreasonable amount of current draw for a RTC, and Motorola does not
- plan to fix this in future mask revisions, a serial (I2C) RTC that
- works has been included instead. NOTE that the DS1337 can be
- configured to output a 32768 Hz clock while the main power is on.
- This clock output has been routed to the MPC860T's EXTAL pin to allow
- the internal RTC to be used. NOTE also that due to yet another
- defect in the rev D mask, the RTC does not operate reliably when the
- internal RTC divisor is set to use a 32768 Hz reference. So just use
- the I2C RTC.
-
-Miscellaneous:
- Xilinx Virtex FPGA on CS3*/GPCM.
- Virtex FPGA slave SelectMap interface on cs4*/UPMB.
- Mil-Std 1553 databus interface on CS5*/GPCM.
- Audio sounder (beeper) with digital volume control connected to SPKROUT.
-
-SC variant:
- A reduced-feature version of the GEN860T port is also supported: GEN860T_SC.
- The 'SC' variant only provides support for the Virtex FPGA, SDRAM main
- memory, EEPROM and flash memory. The system clock frequency is reduced
- to 24 MHz.
-
-Issues:
- The DOC 2000+ returns 0x40 as its device ID when probed using the method
- desxribed in the DOC datasheet. Unfortunately, the U-Boot DOC driver
- does not recognize this device. As of this writing, it seems that MTD
- does not support the DOC 2000+ either.
-
-Status:
- Everything appears to work except DOC support. As of this writing,
- David Woodhouse has stated on the MTD mailing list that he has no
- knowledge of the DOC Millineum Plus and therfore there is no support
- in MTD for this device. I wish I had known this sooner :(
-
-The GEN860T board specific files and configuration is based on the work
-of others who have contributed to U-Boot. The copyright and license notices
-of these authors have been retained wherever their code has been reused.
-All new code to support the GEN860T board is:
-
- (C) Copyright 2001-2003
- Keith Outwater (keith_outwater@mvis.com)
-
-and the following license applies:
-
-This program is free software; you can redistribute it and/or
-modify it under the terms of the GNU General Public License as
-published by the Free Software Foundation; either version 2 of
-the License, or (at your option) any later version.
-
-This program is distributed in the hope that it will be useful,
-WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with this program; if not, write to the Free Software
-Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-MA 02111-1307 USA
-
-Thanks to Wolfgang Denk for a great software package and to everyone
-who contributed to its development.
-
-Keith Outwater
-Sr. Staff Engineer
-Microvision, Inc.
-<keith_outwater@mvis.com>
-<outwater@eskimo.com>
-
-vim: set ts=4 sw=4 tw=78:
diff --git a/board/gen860t/beeper.c b/board/gen860t/beeper.c
deleted file mode 100644
index 46fe66ba61..0000000000
--- a/board/gen860t/beeper.c
+++ /dev/null
@@ -1,213 +0,0 @@
-/*
- * (C) Copyright 2002
- * Keith Outwater, keith_outwater@mvis.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-#include <asm/8xx_immap.h>
-#include <linux/ctype.h>
-
-/*
- * Basic beeper support for the GEN860T board. The GEN860T includes
- * an audio sounder driven by a Phillips TDA8551 amplifier. The
- * TDA8551 features a digital volume control which uses a "trinary"
- * input (high/high-Z/low) to set volume. The 860's SPKROUT pin
- * drives the amplifier input.
- */
-
-
-/*
- * Initialize beeper-related hardware. Initialize timer 1 for use with
- * the beeper. Use 66 Mhz internal clock with prescale of 33 to get
- * 1 uS period per count.
- * FIXME: we should really compute the prescale based on the reported
- * core clock frequency.
- */
-void
-init_beeper(void)
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
-
- immap->im_cpmtimer.cpmt_tgcr &= ~TGCR_RST1 | TGCR_STP1;
- immap->im_cpmtimer.cpmt_tmr1 = ((33 << TMR_PS_SHIFT) & TMR_PS_MSK)
- | TMR_OM | TMR_FRR | TMR_ICLK_IN_GEN;
- immap->im_cpmtimer.cpmt_tcn1 = 0;
- immap->im_cpmtimer.cpmt_ter1 = 0xffff;
- immap->im_cpmtimer.cpmt_tgcr |= TGCR_RST1;
-}
-
-
-/*
- * Set beeper frequency. Max allowed frequency is 2.5 KHz. This limit
- * is mostly arbitrary, but the beeper isn't really much good beyond this
- * frequency.
- */
-void
-set_beeper_frequency(uint frequency)
-{
-#define FREQ_LIMIT 2500
-
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
-
- /*
- * Compute timer ticks given desired frequency. The timer is set up
- * to count 0.5 uS per tick and it takes two ticks per cycle (Hz).
- */
- if (frequency > FREQ_LIMIT) frequency = FREQ_LIMIT;
- frequency = 1000000/frequency;
- immap->im_cpmtimer.cpmt_trr1 = (ushort)frequency;
-}
-
-
-/*
- * Turn the beeper on
- */
-void
-beeper_on(void)
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
-
- immap->im_cpmtimer.cpmt_tgcr &= ~TGCR_STP1;
-}
-
-
-/*
- * Turn the beeper off
- */
-void
-beeper_off(void)
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
-
- immap->im_cpmtimer.cpmt_tgcr |= TGCR_STP1;
-}
-
-
-/*
- * Increase or decrease the beeper volume. Volume can be set
- * from off to full in 64 steps. To increase volume, the output
- * pin is actively driven high, then returned to tristate.
- * To decrease volume, output a low on the port pin (no need to
- * change pin mode to tristate) then output a high to go back to
- * tristate.
- */
-void
-set_beeper_volume(int steps)
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- int i;
-
- if (steps >= 0) {
- for (i = 0; i < (steps >= 64 ? 64 : steps); i++) {
- immap->im_cpm.cp_pbodr &= ~(0x80000000 >> 19);
- udelay(1);
- immap->im_cpm.cp_pbodr |= (0x80000000 >> 19);
- udelay(1);
- }
- }
- else {
- for (i = 0; i > (steps <= -64 ? -64 : steps); i--) {
- immap->im_cpm.cp_pbdat &= ~(0x80000000 >> 19);
- udelay(1);
- immap->im_cpm.cp_pbdat |= (0x80000000 >> 19);
- udelay(1);
- }
- }
-}
-
-
-/*
- * Check the environment to see if the beeper needs beeping.
- * Controlled by a sequence of the form:
- * freq/delta volume/on time/off time;... where:
- * freq = frequency in Hz (0 - 2500)
- * delta volume = volume steps up or down (-64 <= vol <= 64)
- * on time = time in mS
- * off time = time in mS
- *
- * Return 1 on success, 0 on failure
- */
-int
-do_beeper(char *sequence)
-{
-#define DELIMITER ';'
-
-int args[4];
-int i;
-int val;
-char *p = sequence;
-char *tp;
-
- /*
- * Parse the control sequence. This is a really simple parser
- * without any real error checking. You can probably blow it
- * up really easily.
- */
- if (*p == '\0' || !isdigit(*p)) {
- printf("%s:%d: null or invalid string (%s)\n",
- __FILE__, __LINE__, p);
- return 0;
- }
-
- i = 0;
- while (*p != '\0') {
- while (*p != DELIMITER) {
- if (i > 3) i = 0;
- val = (int) simple_strtol(p, &tp, 0);
- if (tp == p) {
- printf("%s:%d: no digits or bad format\n",
- __FILE__,__LINE__);
- return 0;
- }
- else {
- args[i] = val;
- }
-
- i++;
- if (*tp == DELIMITER)
- p = tp;
- else
- p = ++tp;
- }
- p++;
-
- /*
- * Well, we got something that has a chance of being correct
- */
-#if 0
- for (i = 0; i < 4; i++) {
- printf("%s:%d:arg %d = %d\n", __FILE__, __LINE__, i, args[i]);
- }
- printf("\n");
-#endif
-
- set_beeper_frequency(args[0]);
- set_beeper_volume(args[1]);
- beeper_on();
- udelay(1000 * args[2]);
- beeper_off();
- udelay(1000 * args[3]);
- }
- return 1;
-}
-
-/* vim: set ts=4 sw=4 tw=78: */
diff --git a/board/gen860t/beeper.h b/board/gen860t/beeper.h
deleted file mode 100644
index 535ee6c4d6..0000000000
--- a/board/gen860t/beeper.h
+++ /dev/null
@@ -1,31 +0,0 @@
-/*
- * (C) Copyright 2002
- * Keith Outwater, keith_outwater@mvis.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-void init_beeper(void);
-void set_beeper_frequency(uint frequency);
-void beeper_on(void);
-void beeper_off(void);
-void set_beeper_volume(int steps);
-int do_beeper(char *sequence);
-
-/* vim: set ts=4 tw=78 sw=4: */
diff --git a/board/gen860t/config.mk b/board/gen860t/config.mk
deleted file mode 100644
index 7acd90493b..0000000000
--- a/board/gen860t/config.mk
+++ /dev/null
@@ -1,28 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# FLASH base address for GEN860T board
-#
-
-TEXT_BASE = 0x40000000
diff --git a/board/gen860t/flash.c b/board/gen860t/flash.c
deleted file mode 100644
index ec32d07dbf..0000000000
--- a/board/gen860t/flash.c
+++ /dev/null
@@ -1,644 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- * Keith Outwater, keith_outwater@mvsi.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-
-#if defined(CFG_ENV_IS_IN_FLASH)
-# ifndef CFG_ENV_ADDR
-# define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_ENV_OFFSET)
-# endif
-# ifndef CFG_ENV_SIZE
-# define CFG_ENV_SIZE CFG_ENV_SECT_SIZE
-# endif
-# ifndef CFG_ENV_SECT_SIZE
-# define CFG_ENV_SECT_SIZE CFG_ENV_SIZE
-# endif
-#endif
-
-/*
- * Use buffered writes to flash by default - they are about 32x faster than
- * single byte writes.
- */
-#ifndef CFG_GEN860T_FLASH_USE_WRITE_BUFFER
-#define CFG_GEN860T_FLASH_USE_WRITE_BUFFER
-#endif
-
-/*
- * Max time to wait (in mS) for flash device to allocate a write buffer.
- */
-#ifndef CFG_FLASH_ALLOC_BUFFER_TOUT
-#define CFG_FLASH_ALLOC_BUFFER_TOUT 100
-#endif
-
-/*
- * These functions support a single Intel StrataFlash device (28F128J3A)
- * in byte mode only!. The flash routines are very basic and simple
- * since there isn't really any remapping necessary.
- */
-
-/*
- * Intel SCS (Scalable Command Set) command definitions
- * (taken from 28F128J3A datasheet)
- */
-#define SCS_READ_CMD 0xff
-#define SCS_READ_ID_CMD 0x90
-#define SCS_QUERY_CMD 0x98
-#define SCS_READ_STATUS_CMD 0x70
-#define SCS_CLEAR_STATUS_CMD 0x50
-#define SCS_WRITE_BUF_CMD 0xe8
-#define SCS_PROGRAM_CMD 0x40
-#define SCS_BLOCK_ERASE_CMD 0x20
-#define SCS_BLOCK_ERASE_RESUME_CMD 0xd0
-#define SCS_PROGRAM_RESUME_CMD 0xd0
-#define SCS_BLOCK_ERASE_SUSPEND_CMD 0xb0
-#define SCS_SET_BLOCK_LOCK_CMD 0x60
-#define SCS_CLR_BLOCK_LOCK_CMD 0x60
-
-/*
- * SCS status/extended status register bit definitions
- */
-#define SCS_SR7 0x80
-#define SCS_XSR7 0x80
-
-/*---------------------------------------------------------------------*/
-#if 0
-#define DEBUG_FLASH
-#endif
-
-#ifdef DEBUG_FLASH
-#define PRINTF(fmt,args...) printf(fmt ,##args)
-#else
-#define PRINTF(fmt,args...)
-#endif
-/*---------------------------------------------------------------------*/
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (vu_char *addr, flash_info_t *info);
-static int write_data8 (flash_info_t *info, ulong dest, uchar data);
-static void flash_get_offsets (ulong base, flash_info_t *info);
-
-/*-----------------------------------------------------------------------
- * Initialize the flash memory.
- */
-unsigned long
-flash_init (void)
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- unsigned long size_b0;
- int i;
-
- for (i= 0; i < CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /*
- * The gen860t board only has one FLASH memory device, so the
- * FLASH Bank configuration is done statically.
- */
- PRINTF("\n## Get flash bank 1 size @ 0x%08x\n", FLASH_BASE0_PRELIM);
- size_b0 = flash_get_size((vu_char *)FLASH_BASE0_PRELIM, &flash_info[0]);
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank 0: "
- "ID 0x%lx, Size = 0x%08lx = %ld MB\n",
- flash_info[0].flash_id,size_b0, size_b0 << 20);
- }
-
- PRINTF("## Before remap:\n"
- " BR0: 0x%08x OR0: 0x%08x\n BR1: 0x%08x OR1: 0x%08x\n",
- memctl->memc_br0, memctl->memc_or0,
- memctl->memc_br1, memctl->memc_or1);
-
- /*
- * Remap FLASH according to real size
- */
- memctl->memc_or0 |= (-size_b0 & 0xFFFF8000);
- memctl->memc_br0 |= (CFG_FLASH_BASE & BR_BA_MSK);
-
- PRINTF("## After remap:\n"
- " BR0: 0x%08x OR0: 0x%08x\n", memctl->memc_br0, memctl->memc_or0);
-
- /*
- * Re-do sizing to get full correct info
- */
- size_b0 = flash_get_size ((vu_char *)CFG_FLASH_BASE, &flash_info[0]);
- flash_get_offsets (CFG_FLASH_BASE, &flash_info[0]);
- flash_info[0].size = size_b0;
-
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
- /*
- * Monitor protection is ON by default
- */
- flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE + monitor_flash_len - 1,
- &flash_info[0]);
-#endif
-
-#ifdef CFG_ENV_IS_IN_FLASH
- /*
- * Environment protection ON by default
- */
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1,
- &flash_info[0]);
-#endif
-
- PRINTF("## Final Flash bank size: 0x%08lx\n",size_b0);
- return (size_b0);
-}
-
-
-/*-----------------------------------------------------------------------
- * Fill in the FLASH offset table
- */
-static void
-flash_get_offsets (ulong base, flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_INTEL:
- for (i = 0; i < info->sector_count; i++) {
- info->start[i] = base;
- base += 1024 * 128;
- }
- return;
-
- default:
- printf ("Don't know sector offsets for FLASH"
- " type 0x%lx\n", info->flash_id);
- return;
- }
-}
-
-
-/*-----------------------------------------------------------------------
- * Display FLASH device info
- */
-void
-flash_print_info (flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("Missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_INTEL:
- printf ("Intel ");
- break;
- default:
- printf ("Unknown Vendor ");
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_28F128J3A:
- printf ("28F128J3A (128Mbit = 128K x 128)\n");
- break;
- default:
- printf ("Unknown Chip Type\n");
- break;
- }
-
- if (info->size >= (1024 * 1024)) {
- i = 20;
- } else {
- i = 10;
- }
- printf (" Size: %ld %cB in %d Sectors\n",
- info->size >> i,
- (i == 20) ? 'M' : 'k',
- info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " "
- );
- }
- printf ("\n");
- return;
-}
-
-
-/*-----------------------------------------------------------------------
- * Get size and other information for a FLASH device.
- * NOTE: The following code cannot be run from FLASH!
- */
-static
-ulong flash_get_size (vu_char *addr, flash_info_t *info)
-{
-#define NO_FLASH 0
-
- vu_char value[2];
-
- /*
- * Try to read the manufacturer ID
- */
- addr[0] = SCS_READ_CMD;
- addr[0] = SCS_READ_ID_CMD;
- value[0] = addr[0];
- value[1] = addr[2];
- addr[0] = SCS_READ_CMD;
-
- PRINTF("Manuf. ID @ 0x%08lx: 0x%02x\n", (ulong)addr, value[0]);
- switch (value[0]) {
- case (INTEL_MANUFACT & 0xff):
- info->flash_id = FLASH_MAN_INTEL;
- break;
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- return (NO_FLASH);
- }
-
- /*
- * Read the device ID
- */
- PRINTF("Device ID @ 0x%08lx: 0x%02x\n", (ulong)(&addr[2]), value[1]);
- switch (value[1]) {
- case (INTEL_ID_28F128J3A & 0xff):
- info->flash_id += FLASH_28F128J3A;
- info->sector_count = 128;
- info->size = 16 * 1024 * 1024;
- break;
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- return (NO_FLASH);
- }
-
- if (info->sector_count > CFG_MAX_FLASH_SECT) {
- printf ("** ERROR: sector count %d > max (%d) **\n",
- info->sector_count, CFG_MAX_FLASH_SECT);
- info->sector_count = CFG_MAX_FLASH_SECT;
- }
- return (info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- * Erase the specified sectors in the specified FLASH device
- */
-int
-flash_erase(flash_info_t *info, int s_first, int s_last)
-{
- int flag, prot, sect;
- ulong start, now, last;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- if ((info->flash_id & FLASH_VENDMASK) != FLASH_MAN_INTEL) {
- printf ("Can erase only Intel flash types - aborted\n");
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- start = get_timer (0);
- last = start;
-
- /*
- * Start erase on unprotected sectors
- */
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- vu_char *addr = (uchar *)(info->start[sect]);
- vu_char status;
-
- /*
- * Disable interrupts which might cause a timeout
- */
- flag = disable_interrupts();
-
- *addr = SCS_CLEAR_STATUS_CMD;
- *addr = SCS_BLOCK_ERASE_CMD;
- *addr = SCS_BLOCK_ERASE_RESUME_CMD;
-
- /*
- * Re-enable interrupts if necessary
- */
- if (flag)
- enable_interrupts();
-
- /*
- * Wait at least 80us - let's wait 1 ms
- */
- udelay (1000);
-
- while (((status = *addr) & SCS_SR7) != SCS_SR7) {
- if ((now=get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- *addr = SCS_BLOCK_ERASE_SUSPEND_CMD;
- *addr = SCS_READ_CMD;
- return 1;
- }
-
- /*
- * Show that we're waiting
- */
- if ((now - last) > 1000) { /* 1 second */
- putc ('.');
- last = now;
- }
- }
- *addr = SCS_READ_CMD;
- }
- }
- printf (" done\n");
- return 0;
-}
-
-
-#ifdef CFG_GEN860T_FLASH_USE_WRITE_BUFFER
-/*
- * Allocate a flash buffer, fill it with data and write it to the flash.
- * 0 - OK
- * 1 - Timeout on buffer request
- *
- * NOTE: After the last call to this function, WSM status needs to be checked!
- */
-static int
-write_flash_buffer8(flash_info_t *info_p, vu_char *src_p, vu_char *dest_p,
- uint count)
-{
- vu_char *block_addr_p = NULL;
- vu_char *start_addr_p = NULL;
- ulong blocksize = info_p->size / (ulong)info_p->sector_count;
-
- int i;
- uint time = get_timer(0);
-
- PRINTF("%s:%d: src: 0x%p dest: 0x%p count: %d\n",
- __FUNCTION__, __LINE__, src_p, dest_p, count);
-
- /*
- * What block are we in? We already know that the source address is
- * in the flash address range, but we also can't cross a block boundary.
- * We assume that the block does not cross a boundary (we'll check before
- * calling this function).
- */
- for (i = 0; i < info_p->sector_count; ++i) {
- if ( ((ulong)dest_p >= info_p->start[i]) &&
- ((ulong)dest_p < (info_p->start[i] + blocksize)) ) {
- PRINTF("%s:%d: Dest addr 0x%p is in block %d @ 0x%.8lx\n",
- __FUNCTION__, __LINE__, dest_p, i, info_p->start[i]);
- block_addr_p = (vu_char *)info_p->start[i];
- break;
- }
- }
-
- /*
- * Request a buffer
- */
- *block_addr_p = SCS_WRITE_BUF_CMD;
- while ((*block_addr_p & SCS_XSR7) != SCS_XSR7) {
- if (get_timer(time) > CFG_FLASH_ALLOC_BUFFER_TOUT) {
- PRINTF("%s:%d: Buffer allocation timeout @ 0x%p (waited %d mS)\n",
- __FUNCTION__, __LINE__, block_addr_p,
- CFG_FLASH_ALLOC_BUFFER_TOUT);
- return 1;
- }
- *block_addr_p = SCS_WRITE_BUF_CMD;
- }
-
- /*
- * Fill the buffer with data
- */
- start_addr_p = dest_p;
- *block_addr_p = count - 1; /* flash device wants count - 1 */
- PRINTF("%s:%d: Fill buffer at block addr 0x%p\n",
- __FUNCTION__, __LINE__, block_addr_p);
- for (i = 0; i < count; i++) {
- *start_addr_p++ = *src_p++;
- }
-
- /*
- * Flush buffer to flash
- */
- *block_addr_p = SCS_PROGRAM_RESUME_CMD;
-#if 1
- time = get_timer(0);
- while ((*block_addr_p & SCS_SR7) != SCS_SR7) {
- if (get_timer(time) > CFG_FLASH_WRITE_TOUT) {
- PRINTF("%s:%d: Write timeout @ 0x%p (waited %d mS)\n",
- __FUNCTION__, __LINE__, block_addr_p, CFG_FLASH_WRITE_TOUT);
- return 1;
- }
- }
-
-#endif
- return 0;
-}
-#endif
-
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- * 4 - Flash not identified
- */
-int
-write_buff(flash_info_t *info_p, uchar *src_p, ulong addr, ulong count)
-{
- int rc = 0;
-#ifdef CFG_GEN860T_FLASH_USE_WRITE_BUFFER
-#define FLASH_WRITE_BUF_SIZE 0x00000020 /* 32 bytes */
- int i;
- uint bufs;
- ulong buf_count;
- vu_char *sp;
- vu_char *dp;
-#else
- ulong wp;
-#endif
-
- PRINTF("\n%s:%d: src: 0x%.8lx dest: 0x%.8lx size: %d (0x%.8lx)\n",
- __FUNCTION__, __LINE__, (ulong)src_p, addr, (uint)count, count);
-
- if (info_p->flash_id == FLASH_UNKNOWN) {
- return 4;
- }
-
-#ifdef CFG_GEN860T_FLASH_USE_WRITE_BUFFER
- sp = src_p;
- dp = (uchar *)addr;
-
- /*
- * For maximum performance, we want to align the start address to
- * the beginning of a write buffer boundary (i.e. A4-A0 of the
- * start address = 0). See how many bytes are required to get to a
- * write-buffer-aligned address. If that number is non-zero, do
- * non buffered writes of the non-aligned data. By doing non-buffered
- * writes, we avoid the problem of crossing a block (sector) boundary
- * with buffered writes.
- */
- buf_count = FLASH_WRITE_BUF_SIZE - (addr & (FLASH_WRITE_BUF_SIZE - 1));
- if (buf_count == FLASH_WRITE_BUF_SIZE) { /* already on a boundary */
- buf_count = 0;
- }
- if (buf_count > count) { /* not a full buffers worth of data to write */
- buf_count = count;
- }
- count -= buf_count;
-
- PRINTF("%s:%d: Write buffer alignment count = %ld\n",
- __FUNCTION__, __LINE__, buf_count);
- while (buf_count-- >= 1) {
- if ((rc = write_data8(info_p, (ulong)dp++, *sp++)) != 0) {
- return (rc);
- }
- }
-
- PRINTF("%s:%d: count = %ld\n", __FUNCTION__, __LINE__, count);
- if (count == 0) { /* all done */
- PRINTF("%s:%d: Less than 1 buffer (%d) worth of bytes\n",
- __FUNCTION__, __LINE__, FLASH_WRITE_BUF_SIZE);
- return (rc);
- }
-
- /*
- * Now that we are write buffer aligned, write full or partial buffers.
- * The fact that we are write buffer aligned automatically avoids
- * crossing a block address during a write buffer operation.
- */
- bufs = count / FLASH_WRITE_BUF_SIZE;
- PRINTF("%s:%d: %d (0x%x) buffers to write\n", __FUNCTION__, __LINE__,
- bufs, bufs);
- while (bufs >= 1) {
- rc = write_flash_buffer8(info_p, sp, dp, FLASH_WRITE_BUF_SIZE);
- if (rc != 0) {
- PRINTF("%s:%d: ** Error writing buf %d\n",
- __FUNCTION__, __LINE__, bufs);
- return (rc);
- }
- bufs--;
- sp += FLASH_WRITE_BUF_SIZE;
- dp += FLASH_WRITE_BUF_SIZE;
- }
-
- /*
- * Do the leftovers
- */
- i = count % FLASH_WRITE_BUF_SIZE;
- PRINTF("%s:%d: %d (0x%x) leftover bytes\n", __FUNCTION__, __LINE__, i, i);
- if (i > 0) {
- rc = write_flash_buffer8(info_p, sp, dp, i);
- }
-
- sp = (vu_char*)info_p->start[0];
- *sp = SCS_READ_CMD;
- return (rc);
-
-#else
- wp = addr;
- while (count-- >= 1) {
- if((rc = write_data8(info_p, wp++, *src_p++)) != 0)
- return (rc);
- }
- return 0;
-#endif
-}
-
-
-/*-----------------------------------------------------------------------
- * Write a byte to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int
-write_data8 (flash_info_t *info, ulong dest, uchar data)
-{
- vu_char *addr = (vu_char *)dest;
- vu_char status;
- ulong start;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*addr & data) != data) {
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- *addr = SCS_PROGRAM_CMD;
- *addr = data;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- start = get_timer (0);
-
- while (((status = *addr) & SCS_SR7) != SCS_SR7) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- *addr = SCS_READ_CMD;
- return (1);
- }
- }
- *addr = SCS_READ_CMD;
- return (0);
-}
-
-/* vim: set ts=4 sw=4 tw=78: */
diff --git a/board/gen860t/fpga.c b/board/gen860t/fpga.c
deleted file mode 100644
index 37788d5396..0000000000
--- a/board/gen860t/fpga.c
+++ /dev/null
@@ -1,380 +0,0 @@
-/*
- * (C) Copyright 2002
- * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
- * Keith Outwater, keith_outwater@mvis.com.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- */
-
-/*
- * Virtex2 FPGA configuration support for the GEN860T computer
- */
-
-#include <common.h>
-#include <virtex2.h>
-#include <command.h>
-#include "fpga.h"
-
-#if (CONFIG_FPGA)
-
-#if 0
-#define GEN860T_FPGA_DEBUG
-#endif
-
-#ifdef GEN860T_FPGA_DEBUG
-#define PRINTF(fmt,args...) printf (fmt ,##args)
-#else
-#define PRINTF(fmt,args...)
-#endif
-
-/*
- * Port bit numbers for the Selectmap controls
- */
-#define FPGA_INIT_BIT_NUM 22 /* PB22 */
-#define FPGA_RESET_BIT_NUM 11 /* PC11 */
-#define FPGA_DONE_BIT_NUM 16 /* PB16 */
-#define FPGA_PROGRAM_BIT_NUM 7 /* PA7 */
-
-/* Note that these are pointers to code that is in Flash. They will be
- * relocated at runtime.
- */
-Xilinx_Virtex2_Slave_SelectMap_fns fpga_fns = {
- fpga_pre_config_fn,
- fpga_pgm_fn,
- fpga_init_fn,
- fpga_err_fn,
- fpga_done_fn,
- fpga_clk_fn,
- fpga_cs_fn,
- fpga_wr_fn,
- fpga_read_data_fn,
- fpga_write_data_fn,
- fpga_busy_fn,
- fpga_abort_fn,
- fpga_post_config_fn
-};
-
-Xilinx_desc fpga[CONFIG_FPGA_COUNT] = {
- {Xilinx_Virtex2,
- slave_selectmap,
- XILINX_XC2V3000_SIZE,
- (void *) &fpga_fns,
- 0}
-};
-
-/*
- * Display FPGA revision information
- */
-void print_fpga_revision (void)
-{
- vu_long *rev_p = (vu_long *) 0x60000008;
-
- printf ("FPGA Revision 0x%.8lx"
- " (Date %.2lx/%.2lx/%.2lx, Status \"%.1lx\", Version %.3lu)\n",
- *rev_p,
- ((*rev_p >> 28) & 0xf),
- ((*rev_p >> 20) & 0xff),
- ((*rev_p >> 12) & 0xff),
- ((*rev_p >> 8) & 0xf), (*rev_p & 0xff));
-}
-
-
-/*
- * Perform a simple test of the FPGA to processor interface using the FPGA's
- * inverting bus test register. The great thing about doing a read/write
- * test on a register that inverts it's contents is that you avoid any
- * problems with bus charging.
- * Return 0 on failure, 1 on success.
- */
-int test_fpga_ibtr (void)
-{
- vu_long *ibtr_p = (vu_long *) 0x60000010;
- vu_long readback;
- vu_long compare;
- int i;
- int j;
- int k;
- int pass = 1;
-
- static const ulong bitpattern[] = {
- 0xdeadbeef, /* magic ID pattern for debug */
- 0x00000001, /* single bit */
- 0x00000003, /* two adjacent bits */
- 0x00000007, /* three adjacent bits */
- 0x0000000F, /* four adjacent bits */
- 0x00000005, /* two non-adjacent bits */
- 0x00000015, /* three non-adjacent bits */
- 0x00000055, /* four non-adjacent bits */
- 0xaaaaaaaa, /* alternating 1/0 */
- };
-
- for (i = 0; i < 1024; i++) {
- for (j = 0; j < 31; j++) {
- for (k = 0;
- k < sizeof (bitpattern) / sizeof (bitpattern[0]);
- k++) {
- *ibtr_p = compare = (bitpattern[k] << j);
- readback = *ibtr_p;
- if (readback != ~compare) {
- printf ("%s:%d: FPGA test fail: expected 0x%.8lx" " actual 0x%.8lx\n", __FUNCTION__, __LINE__, ~compare, readback);
- pass = 0;
- break;
- }
- }
- if (!pass)
- break;
- }
- if (!pass)
- break;
- }
- if (pass) {
- printf ("FPGA inverting bus test passed\n");
- print_fpga_revision ();
- } else {
- printf ("** FPGA inverting bus test failed\n");
- }
- return pass;
-}
-
-
-/*
- * Set the active-low FPGA reset signal.
- */
-void fpga_reset (int assert)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
-
- PRINTF ("%s:%d: RESET ", __FUNCTION__, __LINE__);
- if (assert) {
- immap->im_ioport.iop_pcdat &= ~(0x8000 >> FPGA_RESET_BIT_NUM);
- PRINTF ("asserted\n");
- } else {
- immap->im_ioport.iop_pcdat |= (0x8000 >> FPGA_RESET_BIT_NUM);
- PRINTF ("deasserted\n");
- }
-}
-
-
-/*
- * Initialize the SelectMap interface. We assume that the mode and the
- * initial state of all of the port pins have already been set!
- */
-void fpga_selectmap_init (void)
-{
- PRINTF ("%s:%d: Initialize SelectMap interface\n", __FUNCTION__,
- __LINE__);
- fpga_pgm_fn (FALSE, FALSE, 0); /* make sure program pin is inactive */
-}
-
-
-/*
- * Initialize the fpga. Return 1 on success, 0 on failure.
- */
-int gen860t_init_fpga (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- int i;
-
- PRINTF ("%s:%d: Initialize FPGA interface (relocation offset = 0x%.8lx)\n", __FUNCTION__, __LINE__, gd->reloc_off);
- fpga_init (gd->reloc_off);
- fpga_selectmap_init ();
-
- for (i = 0; i < CONFIG_FPGA_COUNT; i++) {
- PRINTF ("%s:%d: Adding fpga %d\n", __FUNCTION__, __LINE__, i);
- fpga_add (fpga_xilinx, &fpga[i]);
- }
- return 1;
-}
-
-
-/*
- * Set the FPGA's active-low SelectMap program line to the specified level
- */
-int fpga_pgm_fn (int assert, int flush, int cookie)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
-
- PRINTF ("%s:%d: FPGA PROGRAM ", __FUNCTION__, __LINE__);
-
- if (assert) {
- immap->im_ioport.iop_padat &=
- ~(0x8000 >> FPGA_PROGRAM_BIT_NUM);
- PRINTF ("asserted\n");
- } else {
- immap->im_ioport.iop_padat |=
- (0x8000 >> FPGA_PROGRAM_BIT_NUM);
- PRINTF ("deasserted\n");
- }
- return assert;
-}
-
-
-/*
- * Test the state of the active-low FPGA INIT line. Return 1 on INIT
- * asserted (low).
- */
-int fpga_init_fn (int cookie)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
-
- PRINTF ("%s:%d: INIT check... ", __FUNCTION__, __LINE__);
- if (immap->im_cpm.cp_pbdat & (0x80000000 >> FPGA_INIT_BIT_NUM)) {
- PRINTF ("high\n");
- return 0;
- } else {
- PRINTF ("low\n");
- return 1;
- }
-}
-
-
-/*
- * Test the state of the active-high FPGA DONE pin
- */
-int fpga_done_fn (int cookie)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
-
- PRINTF ("%s:%d: DONE check... ", __FUNCTION__, __LINE__);
- if (immap->im_cpm.cp_pbdat & (0x80000000 >> FPGA_DONE_BIT_NUM)) {
- PRINTF ("high\n");
- return FPGA_SUCCESS;
- } else {
- PRINTF ("low\n");
- return FPGA_FAIL;
- }
-}
-
-
-/*
- * Read FPGA SelectMap data.
- */
-int fpga_read_data_fn (unsigned char *data, int cookie)
-{
- vu_char *p = (vu_char *) SELECTMAP_BASE;
-
- *data = *p;
-#if 0
- PRINTF ("%s: Read 0x%x into 0x%p\n", __FUNCTION__, (int) data, data);
-#endif
- return (int) data;
-}
-
-
-/*
- * Write data to the FPGA SelectMap port
- */
-int fpga_write_data_fn (unsigned char data, int flush, int cookie)
-{
- vu_char *p = (vu_char *) SELECTMAP_BASE;
-
-#if 0
- PRINTF ("%s: Write Data 0x%x\n", __FUNCTION__, (int) data);
-#endif
- *p = data;
- return (int) data;
-}
-
-
-/*
- * Abort and FPGA operation
- */
-int fpga_abort_fn (int cookie)
-{
- PRINTF ("%s:%d: FPGA program sequence aborted\n",
- __FUNCTION__, __LINE__);
- return FPGA_FAIL;
-}
-
-
-/*
- * FPGA pre-configuration function. Just make sure that
- * FPGA reset is asserted to keep the FPGA from starting up after
- * configuration.
- */
-int fpga_pre_config_fn (int cookie)
-{
- PRINTF ("%s:%d: FPGA pre-configuration\n", __FUNCTION__, __LINE__);
- fpga_reset (TRUE);
- return 0;
-}
-
-
-/*
- * FPGA post configuration function. Blip the FPGA reset line and then see if
- * the FPGA appears to be running.
- */
-int fpga_post_config_fn (int cookie)
-{
- int rc;
-
- PRINTF ("%s:%d: FPGA post configuration\n", __FUNCTION__, __LINE__);
- fpga_reset (TRUE);
- udelay (1000);
- fpga_reset (FALSE);
- udelay (1000);
-
- /*
- * Use the FPGA,s inverting bus test register to do a simple test of the
- * processor interface.
- */
- rc = test_fpga_ibtr ();
- return rc;
-}
-
-
-/*
- * Clock, chip select and write signal assert functions and error check
- * and busy functions. These are only stubs because the GEN860T selectmap
- * interface handles sequencing of control signals automatically (it uses
- * a memory-mapped interface to the FPGA SelectMap port). The design of
- * the interface guarantees that the SelectMap port cannot be overrun so
- * no busy check is needed. A configuration error is signalled by INIT
- * going low during configuration, so there is no need for a separate error
- * function.
- */
-int fpga_clk_fn (int assert_clk, int flush, int cookie)
-{
- return assert_clk;
-}
-
-int fpga_cs_fn (int assert_cs, int flush, int cookie)
-{
- return assert_cs;
-}
-
-int fpga_wr_fn (int assert_write, int flush, int cookie)
-{
- return assert_write;
-}
-
-int fpga_err_fn (int cookie)
-{
- return 0;
-}
-
-int fpga_busy_fn (int cookie)
-{
- return 0;
-}
-#endif
-
-/* vim: set ts=4 tw=78 sw=4: */
diff --git a/board/gen860t/fpga.h b/board/gen860t/fpga.h
deleted file mode 100644
index 01967a42fd..0000000000
--- a/board/gen860t/fpga.h
+++ /dev/null
@@ -1,45 +0,0 @@
-/*
- * (C) Copyright 2002
- * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
- * Keith Outwater, keith_outwater@mvis.com.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- */
-
-/*
- * Virtex2 FPGA configuration support for the GEN860T computer
- */
-
-extern int gen860t_init_fpga(void);
-extern int fpga_pgm_fn(int assert_pgm, int flush, int cookie);
-extern int fpga_init_fn(int cookie);
-extern int fpga_err_fn(int cookie);
-extern int fpga_done_fn(int cookie);
-extern int fpga_clk_fn(int assert_clk, int flush, int cookie);
-extern int fpga_cs_fn(int assert_cs, int flush, int cookie);
-extern int fpga_wr_fn(int assert_write, int flush, int cookie);
-extern int fpga_read_data_fn(unsigned char *data, int cookie);
-extern int fpga_write_data_fn(unsigned char data, int flush, int cookie);
-extern int fpga_busy_fn(int cookie);
-extern int fpga_abort_fn(int cookie );
-extern int fpga_pre_config_fn(int cookie );
-extern int fpga_post_config_fn(int cookie );
-
-/* vim: set ts=4 sw=4 tw=78: */
diff --git a/board/gen860t/gen860t.c b/board/gen860t/gen860t.c
deleted file mode 100644
index b7a1b56437..0000000000
--- a/board/gen860t/gen860t.c
+++ /dev/null
@@ -1,309 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- * Keith Outwater, keith_outwater@mvis.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <virtex2.h>
-#include <common.h>
-#include <mpc8xx.h>
-#include <asm/8xx_immap.h>
-#include "beeper.h"
-#include "fpga.h"
-#include "ioport.h"
-
-#ifdef CONFIG_STATUS_LED
-#include <status_led.h>
-#endif
-
-#if defined(CFG_CMD_MII) && defined(CONFIG_MII)
-#include <net.h>
-#endif
-
-#if 0
-#define GEN860T_DEBUG
-#endif
-
-#ifdef GEN860T_DEBUG
-#define PRINTF(fmt,args...) printf (fmt ,##args)
-#else
-#define PRINTF(fmt,args...)
-#endif
-
-/*
- * The following UPM init tables were generated automatically by
- * Motorola's MCUINIT program. See the README file for UPM to
- * SDRAM pin assignments if you want to type this data into
- * MCUINIT in order to reverse engineer the waveforms.
- */
-
-/*
- * UPM initialization tables for MICRON MT48LC16M16A2TG SDRAM devices
- * (UPMA) and Virtex FPGA SelectMap interface (UPMB).
- * NOTE that unused areas of the table are used to hold NOP, precharge
- * and mode register set sequences.
- *
- */
-#define UPMA_NOP_ADDR 0x5
-#define UPMA_PRECHARGE_ADDR 0x6
-#define UPMA_MRS_ADDR 0x12
-
-#define UPM_SINGLE_READ_ADDR 0x00
-#define UPM_BURST_READ_ADDR 0x08
-#define UPM_SINGLE_WRITE_ADDR 0x18
-#define UPM_BURST_WRITE_ADDR 0x20
-#define UPM_REFRESH_ADDR 0x30
-
-const uint sdram_upm_table[] = {
- /* single read (offset 0x00 in upm ram) */
- 0x0e0fdc04, 0x01adfc04, 0x0fbffc00, 0x1fff5c05,
- 0xffffffff, 0x0fffffcd, 0x0fff0fce, 0xefcfffff,
- /* burst read (offset 0x08 in upm ram) */
- 0x0f0fdc04, 0x00fdfc04, 0xf0fffc00, 0xf0fffc00,
- 0xf1fffc00, 0xfffffc00, 0xfffffc05, 0xffffffff,
- 0xffffffff, 0xffffffff, 0x0ffffff4, 0x1f3d5ff4,
- 0xfffffff4, 0xfffffff5, 0xffffffff, 0xffffffff,
- /* single write (offset 0x18 in upm ram) */
- 0x0f0fdc04, 0x00ad3c00, 0x1fff5c05, 0xffffffff,
- 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
- /* burst write (offset 0x20 in upm ram) */
- 0x0f0fdc00, 0x10fd7c00, 0xf0fffc00, 0xf0fffc00,
- 0xf1fffc04, 0xfffffc05, 0xffffffff, 0xffffffff,
- 0xffffffff, 0xffffffff, 0xffffffff, 0xfffff7ff,
- 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
- /* refresh (offset 0x30 in upm ram) */
- 0x1ffddc84, 0xfffffc04, 0xfffffc04, 0xfffffc84,
- 0xfffffc05, 0xffffffff, 0xffffffff, 0xffffffff,
- 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
- /* exception (offset 0x3C in upm ram) */
-};
-
-const uint selectmap_upm_table[] = {
- /* single read (offset 0x00 in upm ram) */
- 0x88fffc06, 0x00fff404, 0x00fffc04, 0x33fffc00,
- 0xfffffc05, 0xffffffff, 0xffffffff, 0xffffffff,
- /* burst read (offset 0x08 in upm ram) */
- 0xfffffc04, 0xfffffc05, 0xffffffff, 0xffffffff,
- 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
- 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
- 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
- /* single write (offset 0x18 in upm ram) */
- 0x88fffc04, 0x00fff400, 0x77fffc05, 0xffffffff,
- 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
- /* burst write (offset 0x20 in upm ram) */
- 0xfffffc04, 0xfffffc05, 0xffffffff, 0xffffffff,
- 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
- 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
- 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
- /* refresh (offset 0x30 in upm ram) */
- 0xfffffc04, 0xfffffc05, 0xffffffff, 0xffffffff,
- 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
- 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
- /* exception (offset 0x3C in upm ram) */
- 0xfffffc05, 0xffffffff, 0xffffffff, 0xffffffff
-};
-
-/*
- * Check board identity. Always successful (gives information only)
- */
-int checkboard (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- char *s;
- char buf[64];
- int i;
-
- i = getenv_r ("board_id", buf, sizeof (buf));
- s = (i > 0) ? buf : NULL;
-
- if (s) {
- printf ("%s ", s);
- } else {
- printf ("<unknown> ");
- }
-
- i = getenv_r ("serial#", buf, sizeof (buf));
- s = (i > 0) ? buf : NULL;
-
- if (s) {
- printf ("S/N %s\n", s);
- } else {
- printf ("S/N <unknown>\n");
- }
-
- printf ("CPU at %s MHz, ", strmhz (buf, gd->cpu_clk));
- printf ("local bus at %s MHz\n", strmhz (buf, gd->bus_clk));
- return (0);
-}
-
-/*
- * Initialize SDRAM
- */
-long int initdram (int board_type)
-{
- volatile immap_t *immr = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immr->im_memctl;
-
- upmconfig (UPMA,
- (uint *) sdram_upm_table,
- sizeof (sdram_upm_table) / sizeof (uint)
- );
-
- /*
- * Setup MAMR register
- */
- memctl->memc_mptpr = CFG_MPTPR_1BK_8K;
- memctl->memc_mamr = CFG_MAMR_8COL & (~(MAMR_PTAE)); /* no refresh yet */
-
- /*
- * Map CS1* to SDRAM bank
- */
- memctl->memc_or1 = CFG_OR1;
- memctl->memc_br1 = CFG_BR1;
-
- /*
- * Perform SDRAM initialization sequence:
- * 1. Apply at least one NOP command
- * 2. 100 uS delay (JEDEC standard says 200 uS)
- * 3. Issue 4 precharge commands
- * 4. Perform two refresh cycles
- * 5. Program mode register
- *
- * Program SDRAM for standard operation, sequential burst, burst length
- * of 4, CAS latency of 2.
- */
- memctl->memc_mar = 0x00000000;
- memctl->memc_mcr = MCR_UPM_A | MCR_OP_RUN | MCR_MB_CS1 |
- MCR_MLCF (0) | UPMA_NOP_ADDR;
- udelay (200);
- memctl->memc_mar = 0x00000000;
- memctl->memc_mcr = MCR_UPM_A | MCR_OP_RUN | MCR_MB_CS1 |
- MCR_MLCF (4) | UPMA_PRECHARGE_ADDR;
-
- memctl->memc_mar = 0x00000000;
- memctl->memc_mcr = MCR_UPM_A | MCR_OP_RUN | MCR_MB_CS1 |
- MCR_MLCF (2) | UPM_REFRESH_ADDR;
-
- memctl->memc_mar = 0x00000088;
- memctl->memc_mcr = MCR_UPM_A | MCR_OP_RUN | MCR_MB_CS1 |
- MCR_MLCF (1) | UPMA_MRS_ADDR;
-
- memctl->memc_mar = 0x00000000;
- memctl->memc_mcr = MCR_UPM_A | MCR_OP_RUN | MCR_MB_CS1 |
- MCR_MLCF (0) | UPMA_NOP_ADDR;
- /*
- * Enable refresh
- */
- memctl->memc_mamr |= MAMR_PTAE;
-
- return (SDRAM_SIZE);
-}
-
-/*
- * Disk On Chip (DOC) Millenium initialization.
- * The DOC lives in the CS2* space
- */
-#if (CONFIG_COMMANDS & CFG_CMD_DOC)
-extern void doc_probe (ulong physadr);
-
-void doc_init (void)
-{
- printf ("Probing at 0x%.8x: ", DOC_BASE);
- doc_probe (DOC_BASE);
-}
-#endif
-
-/*
- * Miscellaneous intialization
- */
-int misc_init_r (void)
-{
- volatile immap_t *immr = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immr->im_memctl;
-
- /*
- * Set up UPMB to handle the Virtex FPGA SelectMap interface
- */
- upmconfig (UPMB, (uint *) selectmap_upm_table,
- sizeof (selectmap_upm_table) / sizeof (uint));
-
- memctl->memc_mbmr = 0x0;
-
- config_mpc8xx_ioports (immr);
-
-#if (CONFIG_COMMANDS & CFG_CMD_MII)
- mii_init ();
-#endif
-
-#if (CONFIG_FPGA)
- gen860t_init_fpga ();
-#endif
- return 0;
-}
-
-/*
- * Final init hook before entering command loop.
- */
-int last_stage_init (void)
-{
-#if !defined(CONFIG_SC)
- char buf[256];
- int i;
-
- /*
- * Turn the beeper volume all the way down in case this is a warm boot.
- */
- set_beeper_volume (-64);
- init_beeper ();
-
- /*
- * Read the environment to see what to do with the beeper
- */
- i = getenv_r ("beeper", buf, sizeof (buf));
- if (i > 0) {
- do_beeper (buf);
- }
-#endif
- return 0;
-}
-
-/*
- * Stub to make POST code happy. Can't self-poweroff, so just hang.
- */
-void board_poweroff (void)
-{
- puts ("### Please power off the board ###\n");
- while (1);
-}
-
-#ifdef CONFIG_POST
-/*
- * Returns 1 if keys pressed to start the power-on long-running tests
- * Called from board_init_f().
- */
-int post_hotkeys_pressed (void)
-{
- return 0; /* No hotkeys supported */
-}
-#endif
-
-/* vim: set ts=4 sw=4 tw=78 : */
diff --git a/board/gen860t/ioport.c b/board/gen860t/ioport.c
deleted file mode 100644
index 1fc95455ae..0000000000
--- a/board/gen860t/ioport.c
+++ /dev/null
@@ -1,347 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-#include <asm/8xx_immap.h>
-#include "ioport.h"
-
-#if 0
-#define IOPORT_DEBUG
-#endif
-
-#ifdef IOPORT_DEBUG
-#define PRINTF(fmt,args...) printf (fmt ,##args)
-#else
-#define PRINTF(fmt,args...)
-#endif
-
-/*
- * The ioport configuration table.
- */
-const mpc8xx_iop_conf_t iop_conf_tab[NUM_PORTS][PORT_BITS] = {
- /*
- * Port A configuration
- * Pin Signal Type Active Initial state
- * PA7 fpgaProgramLowOut Out Low High
- * PA1 fpgaCoreVoltageFailLow In Low N/A
- */
- { /* conf ppar psor pdir podr pdat pint function */
- /* N/A */ { 0, 0, 0, 0, 0, 0, 0 }, /* No pin */
- /* N/A */ { 0, 0, 0, 0, 0, 0, 0 }, /* No pin */
- /* PA15 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
- /* PA14 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
- /* PA13 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
- /* PA12 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
- /* PA11 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
- /* PA10 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
- /* PA9 */ { 1, 0, 0, 1, 0, 0, 0 }, /* grn bicolor LED 1*/
- /* PA8 */ { 1, 0, 0, 1, 0, 0, 0 }, /* red bicolor LED 1*/
- /* PA7 */ { 1, 0, 0, 1, 0, 1, 0 }, /* fpgaProgramLow */
- /* PA6 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
- /* PA5 */ { 1, 0, 0, 1, 0, 0, 0 }, /* grn bicolor LED 0*/
- /* PA4 */ { 1, 0, 0, 1, 0, 0, 0 }, /* red bicolor LED 0*/
- /* PA3 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
- /* PA2 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
-#if !defined(CONFIG_SC)
- /* PA1 */ { 1, 0, 0, 0, 0, 0, 0 }, /* fpgaCoreVoltageFail*/
-#else
- /* PA1 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
-#endif
- /* PA0 */ { 0, 0, 0, 0, 0, 0, 0 } /* */
- },
-
- /*
- * Port B configuration
- * Pin Signal Type Active Initial state
- * PB14 docBusyLowIn In Low X
- * PB15 gpio1Sig Out High Low
- * PB16 fpgaDoneBi In High X
- * PB17 swBitOkLowOut Out Low High
- * PB19 speakerVolSig Out/Hi-Z High/Low High (Hi-Z)
- * PB22 fpgaInitLowBi In Low X
- * PB23 batteryOkSig In High X
- * PB31 pulseCatcherClr Out High 0
- */
- { /* conf ppar psor pdir podr pdat pint function */
-#if !defined(CONFIG_SC)
- /* PB31 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
-#else
- /* PB31 */ { 1, 0, 0, 1, 0, 0, 0 }, /* pulseCatcherClr */
-#endif
- /* PB30 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
- /* PB29 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
- /* PB28 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
- /* PB27 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
- /* PB26 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
- /* PB25 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
- /* PB24 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
-#if !defined(CONFIG_SC)
- /* PB23 */ { 1, 0, 0, 0, 0, 0, 0 }, /* batteryOk */
-#else
- /* PB23 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
-#endif
- /* PB22 */ { 1, 0, 0, 0, 0, 0, 0 }, /* fpgaInitLowBi */
- /* PB21 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
- /* PB20 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
-#if !defined(CONFIG_SC)
- /* PB19 */ { 1, 0, 0, 1, 1, 1, 0 }, /* speakerVol */
-#else
- /* PB19 */ { 0, 0, 0, 1, 1, 1, 0 }, /* */
-#endif
- /* PB18 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
- /* PB17 */ { 1, 0, 0, 1, 0, 1, 0 }, /* swBitOkLow */
- /* PB16 */ { 1, 0, 0, 0, 0, 0, 0 }, /* fpgaDone */
- /* PB15 */ { 1, 0, 0, 1, 0, 0, 0 }, /* gpio1 */
-#if !defined(CONFIG_SC)
- /* PB14 */ { 1, 0, 0, 0, 0, 0, 0 } /* docBusyLow */
-#else
- /* PB14 */ { 0, 0, 0, 0, 0, 0, 0 } /* */
-#endif
- },
-
- /*
- * Port C configuration
- * Pin Signal Type Active Initial state
- * PC4 i2cBus1EnSig Out High High
- * PC5 i2cBus2EnSig Out High High
- * PC6 gpio0Sig Out High Low
- * PC8 i2cBus3EnSig Out High High
- * PC10 i2cBus4EnSig Out High High
- * PC11 fpgaResetLowOut Out Low High
- * PC12 systemBitOkIn In High X
- * PC15 selfDreqLow In Low X
- */
- { /* conf ppar psor pdir podr pdat pint function */
- /* N/A */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
- /* N/A */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
- /* PC15 */ { 1, 0, 0, 0, 0, 0, 0 }, /* selfDreqLowIn */
- /* PC14 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
- /* PC13 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
-#if !defined(CONFIG_SC)
- /* PC12 */ { 1, 0, 0, 0, 0, 0, 0 }, /* systemBitOkIn */
-#else
- /* PC12 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
-#endif
- /* PC11 */ { 1, 0, 0, 1, 0, 1, 0 }, /* fpgaResetLowOut */
-#if !defined(CONFIG_SC)
- /* PC10 */ { 1, 0, 0, 1, 0, 1, 0 }, /* i2cBus4EnSig */
-#else
- /* PC10 */ { 0, 0, 0, 1, 0, 1, 0 }, /* */
-#endif
- /* PC9 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
-#if !defined(CONFIG_SC)
- /* PC8 */ { 1, 0, 0, 1, 0, 1, 0 }, /* i2cBus3EnSig */
-#else
- /* PC8 */ { 0, 0, 0, 1, 0, 1, 0 }, /* */
-#endif
- /* PC7 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
- /* PC6 */ { 1, 0, 0, 1, 0, 1, 0 }, /* gpio0 */
-#if !defined(CONFIG_SC)
- /* PC5 */ { 1, 0, 0, 1, 0, 1, 0 }, /* i2cBus2EnSig */
- /* PC4 */ { 1, 0, 0, 1, 0, 1, 0 }, /* i2cBus1EnSig */
-#else
- /* PC5 */ { 0, 0, 0, 1, 0, 1, 0 }, /* */
- /* PC4 */ { 0, 0, 0, 1, 0, 1, 0 }, /* */
-#endif
- /* N/A */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
- /* N/A */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
- /* N/A */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
- /* N/A */ { 0, 0, 0, 0, 0, 0, 0 } /* */
- },
-
- /*
- * Port D configuration
- */
- { /* conf ppar psor pdir podr pdat pint function */
- /* N/A */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
- /* N/A */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
- /* PD15 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
- /* PD14 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
- /* PD13 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
- /* PD12 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
- /* PD11 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
- /* PD10 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
- /* PD9 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
- /* PD8 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
- /* PD7 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
- /* PD6 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
- /* PD5 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
- /* PD4 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
- /* PD3 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
- /* N/A */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
- /* N/A */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
- /* N/A */ { 0, 0, 0, 0, 0, 0, 0 } /* */
- }
-};
-
-/*
- * Configure the MPC8XX I/O ports per the ioport configuration table
- * (taken from ./cpu/mpc8260/cpu_init.c)
- */
-void config_mpc8xx_ioports (volatile immap_t * immr)
-{
- int portnum;
-
- for (portnum = 0; portnum < NUM_PORTS; portnum++) {
- uint pmsk = 0, ppar = 0, psor = 0, pdir = 0;
- uint podr = 0, pdat = 0, pint = 0;
- uint msk = 1;
- mpc8xx_iop_conf_t *iopc =
- (mpc8xx_iop_conf_t *) & iop_conf_tab[portnum][0];
- mpc8xx_iop_conf_t *eiopc = iopc + PORT_BITS;
-
- /*
- * For all ports except port B, ignore the two don't care entries
- * in the configuration tables.
- */
- if (portnum != 1) {
- iopc = (mpc8xx_iop_conf_t *) &
- iop_conf_tab[portnum][2];
- }
-
- /*
- * NOTE: index 0 refers to pin 17, index 17 refers to pin 0
- */
- while (iopc < eiopc) {
- if (iopc->conf) {
- pmsk |= msk;
- if (iopc->ppar)
- ppar |= msk;
- if (iopc->psor)
- psor |= msk;
- if (iopc->pdir)
- pdir |= msk;
- if (iopc->podr)
- podr |= msk;
- if (iopc->pdat)
- pdat |= msk;
- if (iopc->pint)
- pint |= msk;
- }
- msk <<= 1;
- iopc++;
- }
-
- PRINTF ("%s:%d:\n portnum=%d ", __FUNCTION__, __LINE__,
- portnum);
-#ifdef IOPORT_DEBUG
- switch (portnum) {
- case 0:
- printf ("(A)\n");
- break;
- case 1:
- printf ("(B)\n");
- break;
- case 2:
- printf ("(C)\n");
- break;
- case 3:
- printf ("(D)\n");
- break;
- default:
- printf ("(?)\n");
- break;
- }
-#endif
- PRINTF (" ppar=0x%.8x pdir=0x%.8x podr=0x%.8x\n"
- " pdat=0x%.8x psor=0x%.8x pint=0x%.8x pmsk=0x%.8x\n",
- ppar, pdir, podr, pdat, psor, pint, pmsk);
-
- /*
- * Have to handle the ioports on a port-by-port basis since there
- * are three different flavors.
- */
- if (pmsk != 0) {
- uint tpmsk = ~pmsk;
-
- if (0 == portnum) { /* port A */
- immr->im_ioport.iop_papar &= tpmsk;
- immr->im_ioport.iop_padat =
- (immr->im_ioport.
- iop_padat & tpmsk) | pdat;
- immr->im_ioport.iop_padir =
- (immr->im_ioport.
- iop_padir & tpmsk) | pdir;
- immr->im_ioport.iop_paodr =
- (immr->im_ioport.
- iop_paodr & tpmsk) | podr;
- immr->im_ioport.iop_papar |= ppar;
- } else if (1 == portnum) { /* port B */
- immr->im_cpm.cp_pbpar &= tpmsk;
- immr->im_cpm.cp_pbdat =
- (immr->im_cpm.
- cp_pbdat & tpmsk) | pdat;
- immr->im_cpm.cp_pbdir =
- (immr->im_cpm.
- cp_pbdir & tpmsk) | pdir;
- immr->im_cpm.cp_pbodr =
- (immr->im_cpm.
- cp_pbodr & tpmsk) | podr;
- immr->im_cpm.cp_pbpar |= ppar;
- } else if (2 == portnum) { /* port C */
- immr->im_ioport.iop_pcpar &= tpmsk;
- immr->im_ioport.iop_pcdat =
- (immr->im_ioport.
- iop_pcdat & tpmsk) | pdat;
- immr->im_ioport.iop_pcdir =
- (immr->im_ioport.
- iop_pcdir & tpmsk) | pdir;
- immr->im_ioport.iop_pcint =
- (immr->im_ioport.
- iop_pcint & tpmsk) | pint;
- immr->im_ioport.iop_pcso =
- (immr->im_ioport.
- iop_pcso & tpmsk) | psor;
- immr->im_ioport.iop_pcpar |= ppar;
- } else if (3 == portnum) { /* port D */
- immr->im_ioport.iop_pdpar &= tpmsk;
- immr->im_ioport.iop_pddat =
- (immr->im_ioport.
- iop_pddat & tpmsk) | pdat;
- immr->im_ioport.iop_pddir =
- (immr->im_ioport.
- iop_pddir & tpmsk) | pdir;
- immr->im_ioport.iop_pdpar |= ppar;
- }
- }
- }
-
- PRINTF ("%s:%d: Port A:\n papar=0x%.4x padir=0x%.4x"
- " paodr=0x%.4x\n padat=0x%.4x\n", __FUNCTION__, __LINE__,
- immr->im_ioport.iop_papar, immr->im_ioport.iop_padir,
- immr->im_ioport.iop_paodr, immr->im_ioport.iop_padat);
- PRINTF ("%s:%d: Port B:\n pbpar=0x%.8x pbdir=0x%.8x"
- " pbodr=0x%.8x\n pbdat=0x%.8x\n", __FUNCTION__, __LINE__,
- immr->im_cpm.cp_pbpar, immr->im_cpm.cp_pbdir,
- immr->im_cpm.cp_pbodr, immr->im_cpm.cp_pbdat);
- PRINTF ("%s:%d: Port C:\n pcpar=0x%.4x pcdir=0x%.4x"
- " pcdat=0x%.4x\n pcso=0x%.4x pcint=0x%.4x\n ",
- __FUNCTION__, __LINE__, immr->im_ioport.iop_pcpar,
- immr->im_ioport.iop_pcdir, immr->im_ioport.iop_pcdat,
- immr->im_ioport.iop_pcso, immr->im_ioport.iop_pcint);
- PRINTF ("%s:%d: Port D:\n pdpar=0x%.4x pddir=0x%.4x"
- " pddat=0x%.4x\n", __FUNCTION__, __LINE__,
- immr->im_ioport.iop_pdpar, immr->im_ioport.iop_pddir,
- immr->im_ioport.iop_pddat);
-}
diff --git a/board/gen860t/ioport.h b/board/gen860t/ioport.h
deleted file mode 100644
index 34a2d7b1d9..0000000000
--- a/board/gen860t/ioport.h
+++ /dev/null
@@ -1,44 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- * Keith Outwater, keith_outwater@mvis.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#define NUM_PORTS 4
-#define PORT_BITS 18
-
-/*
- * This structure provides configuration information for one port pin.
- * We include all fields needed to initialize any of the ioports.
- */
-typedef struct {
- unsigned char conf:1; /* If 1, configure this port */
- unsigned char ppar:1; /* Port Pin Assignment Register */
- unsigned char psor:1; /* Port Special Options Register */
- unsigned char pdir:1; /* Port Data Direction Register */
- unsigned char podr:1; /* Port Open Drain Register */
- unsigned char pdat:1; /* Port Data Register */
- unsigned char pint:1; /* Port Interrupt Register */
-} mpc8xx_iop_conf_t;
-
-extern void config_mpc8xx_ioports(volatile immap_t *immr);
-
-/* vim: set ts=4 tw=78 sw=4: */
diff --git a/board/gen860t/u-boot-flashenv.lds b/board/gen860t/u-boot-flashenv.lds
deleted file mode 100644
index 7926a2e09d..0000000000
--- a/board/gen860t/u-boot-flashenv.lds
+++ /dev/null
@@ -1,139 +0,0 @@
-/*
- * Linker command file for the GEN860T board when the environment is
- * stored in flash memory.
- *
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-SECTIONS
-{
- /*
- * Read-only sections, merged into text segment:
- */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc8xx/start.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /*
- * Read-write section, merged into data segment:
- */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data:
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
-
- _end = . ;
- PROVIDE (end = .);
-
- .ppcenv:
- {
- . = env_offset;
- common/environment.o
- }
-}
diff --git a/board/gen860t/u-boot.lds b/board/gen860t/u-boot.lds
deleted file mode 100644
index 1df481751c..0000000000
--- a/board/gen860t/u-boot.lds
+++ /dev/null
@@ -1,133 +0,0 @@
-/*
- * Linker command file for the GEN860T board.
- *
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-SECTIONS
-{
- /*
- * Read-only sections, merged into text segment:
- */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc8xx/start.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /*
- * Read-write section, merged into data segment:
- */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/genietv/Makefile b/board/genietv/Makefile
deleted file mode 100644
index 13ce9fc9d2..0000000000
--- a/board/genietv/Makefile
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/genietv/config.mk b/board/genietv/config.mk
deleted file mode 100644
index 69ab21fcf0..0000000000
--- a/board/genietv/config.mk
+++ /dev/null
@@ -1,25 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-TEXT_BASE = 0x00000000
-OBJCFLAGS = --set-section-flags=.ppcenv=contents,alloc,load,data
diff --git a/board/genietv/flash.c b/board/genietv/flash.c
deleted file mode 100644
index 1c1728bb49..0000000000
--- a/board/genietv/flash.c
+++ /dev/null
@@ -1,469 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (vu_long *addr, flash_info_t *info);
-static int write_word (flash_info_t *info, ulong dest, ulong data);
-static void flash_get_offsets (ulong base, flash_info_t *info);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- unsigned long size_b0, size_b1;
- int i;
-
- /* Init: no FLASHes known */
- for (i=0; i < CFG_MAX_FLASH_BANKS; ++i)
- flash_info[i].flash_id = FLASH_UNKNOWN;
-
- /* Detect size */
- size_b0 = flash_get_size((vu_long *)CFG_FLASH_BASE, &flash_info[0]);
-
- /* Setup offsets */
- flash_get_offsets (CFG_FLASH_BASE, &flash_info[0]);
-
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
- /* Monitor protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+monitor_flash_len-1,
- &flash_info[0]);
-#endif
-
- size_b1 = 0 ;
-
- flash_info[1].flash_id = FLASH_UNKNOWN;
- flash_info[1].sector_count = -1;
-
- flash_info[0].size = size_b0;
- flash_info[1].size = size_b1;
-
- return (size_b0 + size_b1);
-}
-
-/*-----------------------------------------------------------------------
- * Fix this to support variable sector sizes
-*/
-static void flash_get_offsets (ulong base, flash_info_t *info)
-{
- int i;
-
- /* set up sector start address table */
- if ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM040) {
- /* set sector offsets for bottom boot block type */
- for (i = 0; i < info->sector_count; i++)
- info->start[i] = base + (i * 0x00010000);
- }
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN)
- {
- puts ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK)
- {
- case FLASH_MAN_AMD: printf ("AMD "); break;
- case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
- case FLASH_MAN_BM: printf ("BRIGHT MICRO "); break;
- default: printf ("Unknown Vendor "); break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK)
- {
- case FLASH_AM040: printf ("29F040 or 29LV040 (4 Mbit, uniform sectors)\n");
- break;
- case FLASH_AM400B: printf ("AM29LV400B (4 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM400T: printf ("AM29LV400T (4 Mbit, top boot sector)\n");
- break;
- case FLASH_AM800B: printf ("AM29LV800B (8 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM800T: printf ("AM29LV800T (8 Mbit, top boot sector)\n");
- break;
- case FLASH_AM160B: printf ("AM29LV160B (16 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM160T: printf ("AM29LV160T (16 Mbit, top boot sector)\n");
- break;
- case FLASH_AM320B: printf ("AM29LV320B (32 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM320T: printf ("AM29LV320T (32 Mbit, top boot sector)\n");
- break;
- default: printf ("Unknown Chip Type\n");
- break;
- }
-
- if (info->size >> 20) {
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20,
- info->sector_count);
- } else {
- printf (" Size: %ld KB in %d Sectors\n",
- info->size >> 10,
- info->sector_count);
- }
-
- puts (" Sector Start Addresses:");
-
- for (i=0; i<info->sector_count; ++i)
- {
- if ((i % 5) == 0)
- {
- puts ("\n ");
- }
-
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " ");
- }
-
- putc ('\n');
- return;
-}
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-
-static ulong flash_get_size (vu_long *addr, flash_info_t *info)
-{
- short i;
- volatile unsigned char *caddr;
- char value;
-
- caddr = (volatile unsigned char *)addr ;
-
- /* Write auto select command: read Manufacturer ID */
-
-#if 0
- printf("Base address is: %08x\n", caddr);
-#endif
-
- caddr[0x0555] = 0xAA;
- caddr[0x02AA] = 0x55;
- caddr[0x0555] = 0x90;
-
- value = caddr[0];
-
-#if 0
- printf("Manufact ID: %02x\n", value);
-#endif
- switch (value)
- {
- case 0x1: /* AMD_MANUFACT */
- info->flash_id = FLASH_MAN_AMD;
- break;
-
- case 0x4: /* FUJ_MANUFACT */
- info->flash_id = FLASH_MAN_FUJ;
- break;
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- break;
- }
-
- value = caddr[1]; /* device ID */
-#if 0
- printf("Device ID: %02x\n", value);
-#endif
- switch (value)
- {
- case AMD_ID_LV040B:
- info->flash_id += FLASH_AM040;
- info->sector_count = 8;
- info->size = 0x00080000;
- break; /* => 512Kb */
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- return (0); /* => no or unknown flash */
-
- }
-
- flash_get_offsets ((ulong)addr, &flash_info[0]);
-
- /* check for protected sectors */
- for (i = 0; i < info->sector_count; i++)
- {
- /* read sector protection at sector address, (A7 .. A0) = 0x02 */
- /* D0 = 1 if protected */
- caddr = (volatile unsigned char *)(info->start[i]);
- info->protect[i] = caddr[2] & 1;
- }
-
- /*
- * Prevent writes to uninitialized FLASH.
- */
- if (info->flash_id != FLASH_UNKNOWN)
- {
- caddr = (volatile unsigned char *)info->start[0];
- *caddr = 0xF0; /* reset bank */
- }
-
- return (info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- volatile unsigned char *addr = (volatile unsigned char *)(info->start[0]);
- int flag, prot, sect, l_sect;
- ulong start, now, last;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- if ((info->flash_id == FLASH_UNKNOWN) ||
- (info->flash_id > FLASH_AMD_COMP)) {
- printf ("Can't erase unknown flash type - aborted\n");
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- l_sect = -1;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[0x0555] = 0xAA;
- addr[0x02AA] = 0x55;
- addr[0x0555] = 0x80;
- addr[0x0555] = 0xAA;
- addr[0x02AA] = 0x55;
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr = (volatile unsigned char *)(info->start[sect]);
- addr[0] = 0x30;
- l_sect = sect;
- }
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- /*
- * We wait for the last triggered sector
- */
- if (l_sect < 0)
- goto DONE;
-
- start = get_timer (0);
- last = start;
- addr = (volatile unsigned char *)(info->start[l_sect]);
-
- while ((addr[0] & 0xFF) != 0xFF)
- {
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- return 1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- }
-
-DONE:
- /* reset to read mode */
- addr = (volatile unsigned char *)info->start[0];
-
- addr[0] = 0xF0; /* reset bank */
-
- printf (" done\n");
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int i, l, rc;
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
- for (; i<4 && cnt>0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = 0;
- for (i=0; i<4; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- return (write_word(info, wp, data));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word (flash_info_t *info, ulong dest, ulong data)
-{
- volatile unsigned char *addr = (volatile unsigned char*)(info->start[0]),
- *cdest,*cdata;
- ulong start;
- int flag, count = 4 ;
-
- cdest = (volatile unsigned char *)dest ;
- cdata = (volatile unsigned char *)&data ;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*((vu_long *)dest) & data) != data) {
- return (2);
- }
-
- while(count--)
- {
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[0x0555] = 0xAA;
- addr[0x02AA] = 0x55;
- addr[0x0555] = 0xA0;
-
- *cdest = *cdata;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* data polling for D7 */
- start = get_timer (0);
- while ((*cdest ^ *cdata) & 0x80)
- {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- return (1);
- }
- }
-
- cdata++ ;
- cdest++ ;
- }
- return (0);
-}
-
-/*-----------------------------------------------------------------------
- */
diff --git a/board/genietv/genietv.c b/board/genietv/genietv.c
deleted file mode 100644
index 5f8c8997e5..0000000000
--- a/board/genietv/genietv.c
+++ /dev/null
@@ -1,360 +0,0 @@
-/*
- * genietv/genietv.c
- *
- * The GENIETV is using the following physical memorymap (copied from
- * the FADS configuration):
- *
- * ff020000 -> ff02ffff : pcmcia
- * ff010000 -> ff01ffff : BCSR connected to CS1, setup by 8xxROM
- * ff000000 -> ff00ffff : IMAP internal in the cpu
- * 02800000 -> 0287ffff : flash connected to CS0
- * 00000000 -> nnnnnnnn : sdram setup by U-Boot
- *
- * CS pins are connected as follows:
- *
- * CS0 -512Kb boot flash
- * CS1 - SDRAM #1
- * CS2 - SDRAM #2
- * CS3 - Flash #1
- * CS4 - Flash #2
- * CS5 - LON (if present)
- * CS6 - PCMCIA #1
- * CS7 - PCMCIA #2
- *
- * Ports are configured as follows:
- *
- * PA7 - SDRAM banks enable
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-
-#define CFG_PA7 0x0100
-
-/* ------------------------------------------------------------------------- */
-
-static long int dram_size (long int, long int *, long int);
-
-/* ------------------------------------------------------------------------- */
-
-#define _NOT_USED_ 0xFFFFFFFF
-
-const uint sdram_table[] = {
- /*
- * Single Read. (Offset 0 in UPMB RAM)
- */
- 0x1F0DFC04, 0xEEAFBC04, 0x11AF7C04, 0xEFBEEC00,
- 0x1FFDDC47, /* last */
- /*
- * SDRAM Initialization (offset 5 in UPMB RAM)
- *
- * This is no UPM entry point. The following definition uses
- * the remaining space to establish an initialization
- * sequence, which is executed by a RUN command.
- *
- */
- 0x1FFDDC34, 0xEFEEAC34, 0x1FBD5C35, /* last */
- /*
- * Burst Read. (Offset 8 in UPMB RAM)
- */
- 0x1F0DFC04, 0xEEAFBC04, 0x10AF7C04, 0xF0AFFC00,
- 0xF0AFFC00, 0xF1AFFC00, 0xEFBEEC00, 0x1FFDDC47, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Single Write. (Offset 18 in UPMB RAM)
- */
- 0x1F2DFC04, 0xEEAFAC00, 0x01BE4C04, 0x1FFDDC47, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Burst Write. (Offset 20 in UPMB RAM)
- */
- 0x1F0DFC04, 0xEEAFAC00, 0x10AF5C00, 0xF0AFFC00,
- 0xF0AFFC00, 0xE1BEEC04, 0x1FFDDC47, /* last */
- _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Refresh (Offset 30 in UPMB RAM)
- */
- 0x1FFD7C84, 0xFFFFFC04, 0xFFFFFC04, 0xFFFFFC04,
- 0xFFFFFC84, 0xFFFFFC07, /* last */
- _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Exception. (Offset 3c in UPMB RAM)
- */
- 0x7FFFFC07, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_,
-};
-
-/* ------------------------------------------------------------------------- */
-
-
-/*
- * Check Board Identity
- */
-
-int checkboard (void)
-{
- puts ("Board: GenieTV\n");
- return 0;
-}
-
-#if 0
-static void PrintState (void)
-{
- volatile immap_t *im = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &im->im_memctl;
-
- printf ("\n0 - FLASH: B=%08x O=%08x", memctl->memc_br0,
- memctl->memc_or0);
- printf ("\n1 - SDRAM: B=%08x O=%08x", memctl->memc_br1,
- memctl->memc_or1);
- printf ("\n2 - SDRAM: B=%08x O=%08x", memctl->memc_br2,
- memctl->memc_or2);
-}
-#endif
-
-/* ------------------------------------------------------------------------- */
-
-long int initdram (int board_type)
-{
- volatile immap_t *im = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &im->im_memctl;
- long int size_b0, size_b1, size8;
-
- /* Enable SDRAM */
-
- /* Configuring PA7 for general purpouse output pin */
- im->im_ioport.iop_papar &= ~CFG_PA7; /* 0 = general purpouse */
- im->im_ioport.iop_padir |= CFG_PA7; /* 1 = output */
-
- /* Enable SDRAM - PA7 = 1 */
- im->im_ioport.iop_padat |= CFG_PA7; /* value of PA7 */
-
- /*
- * Preliminary prescaler for refresh (depends on number of
- * banks): This value is selected for four cycles every 62.4 us
- * with two SDRAM banks or four cycles every 31.2 us with one
- * bank. It will be adjusted after memory sizing.
- */
- memctl->memc_mptpr = CFG_MPTPR_2BK_4K;
-
- memctl->memc_mbmr = CFG_MBMR_8COL;
-
- upmconfig (UPMB, (uint *) sdram_table,
- sizeof (sdram_table) / sizeof (uint));
-
- /*
- * Map controller banks 1 and 2 to the SDRAM banks 1 and 2 at
- * preliminary addresses - these have to be modified after the
- * SDRAM size has been determined.
- */
-
- memctl->memc_or1 = 0xF0000000 | CFG_OR_TIMING_SDRAM;
- memctl->memc_br1 =
- ((SDRAM_BASE1_PRELIM & BR_BA_MSK) | BR_MS_UPMB | BR_V);
-
- memctl->memc_or2 = 0xF0000000 | CFG_OR_TIMING_SDRAM;
- memctl->memc_br2 =
- ((SDRAM_BASE2_PRELIM & BR_BA_MSK) | BR_MS_UPMB | BR_V);
-
- /* perform SDRAM initialization sequence */
- memctl->memc_mar = 0x00000088;
-
- memctl->memc_mcr = 0x80802105; /* SDRAM bank 0 */
-
- memctl->memc_mcr = 0x80804105; /* SDRAM bank 1 */
-
- /* Execute refresh 8 times */
- memctl->memc_mbmr = (CFG_MBMR_8COL & ~MBMR_TLFB_MSK) | MBMR_TLFB_8X;
-
- memctl->memc_mcr = 0x80802130; /* SDRAM bank 0 - execute twice */
-
- memctl->memc_mcr = 0x80804130; /* SDRAM bank 1 - execute twice */
-
- /* Execute refresh 4 times */
- memctl->memc_mbmr = CFG_MBMR_8COL;
-
- /*
- * Check Bank 0 Memory Size for re-configuration
- *
- * try 8 column mode
- */
-
-#if 0
- PrintState ();
-#endif
-/* printf ("\nChecking bank1..."); */
- size8 = dram_size (CFG_MBMR_8COL, (long *) SDRAM_BASE1_PRELIM,
- SDRAM_MAX_SIZE);
-
- size_b0 = size8;
-
-/* printf ("\nChecking bank2..."); */
- size_b1 =
- dram_size (memctl->memc_mbmr, (long *) SDRAM_BASE2_PRELIM,
- SDRAM_MAX_SIZE);
-
- /*
- * Final mapping: map bigger bank first
- */
-
- memctl->memc_or1 = ((-size_b0) & 0xFFFF0000) | CFG_OR_TIMING_SDRAM;
- memctl->memc_br1 = (CFG_SDRAM_BASE & BR_BA_MSK) | BR_MS_UPMB | BR_V;
-
- if (size_b1 > 0) {
- /*
- * Position Bank 1 immediately above Bank 0
- */
- memctl->memc_or2 =
- ((-size_b1) & 0xFFFF0000) | CFG_OR_TIMING_SDRAM;
- memctl->memc_br2 =
- ((CFG_SDRAM_BASE & BR_BA_MSK) | BR_MS_UPMB | BR_V) +
- (size_b0 & BR_BA_MSK);
- } else {
- /*
- * No bank 1
- *
- * invalidate bank
- */
- memctl->memc_br2 = 0;
- /* adjust refresh rate depending on SDRAM type, one bank */
- memctl->memc_mptpr = CFG_MPTPR_1BK_4K;
- }
-
- /* If no memory detected, disable SDRAM */
- if ((size_b0 + size_b1) == 0) {
- printf ("disabling SDRAM!\n");
- /* Disable SDRAM - PA7 = 1 */
- im->im_ioport.iop_padat &= ~CFG_PA7; /* value of PA7 */
- }
-/* else */
-/* printf("done! (%08lx)\n", size_b0 + size_b1); */
-
-#if 0
- PrintState ();
-#endif
- return (size_b0 + size_b1);
-}
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Check memory range for valid RAM. A simple memory test determines
- * the actually available RAM size between addresses `base' and
- * `base + maxsize'. Some (not all) hardware errors are detected:
- * - short between address lines
- * - short between data lines
- */
-
-static long int dram_size (long int mbmr_value, long int *base,
- long int maxsize)
-{
- long size;
-
- /*memctl->memc_mbmr = mbmr_value; */
-
- size = get_ram_size (base, maxsize);
-
- if (size) {
-/* printf("(%08lx)", size); */
- } else {
- printf ("(0)");
- }
-
- return (size);
-}
-
-#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
-
-#ifdef CFG_PCMCIA_MEM_ADDR
-volatile unsigned char *pcmcia_mem = (unsigned char *) CFG_PCMCIA_MEM_ADDR;
-#endif
-
-int pcmcia_init (void)
-{
- volatile pcmconf8xx_t *pcmp;
- uint v, slota, slotb;
-
- /*
- ** Enable the PCMCIA for a Flash card.
- */
- pcmp = (pcmconf8xx_t *) (&(((immap_t *) CFG_IMMR)->im_pcmcia));
-
-#if 0
- pcmp->pcmc_pbr0 = CFG_PCMCIA_MEM_ADDR;
- pcmp->pcmc_por0 = 0xc00ff05d;
-#endif
-
- /* Set all slots to zero by default. */
- pcmp->pcmc_pgcra = 0;
- pcmp->pcmc_pgcrb = 0;
-#ifdef PCMCIA_SLOT_A
- pcmp->pcmc_pgcra = 0x40;
-#endif
-#ifdef PCMCIA_SLOT_B
- pcmp->pcmc_pgcrb = 0x40;
-#endif
-
- /* Check if any PCMCIA card is luged in. */
- slota = (pcmp->pcmc_pipr & 0x18000000) == 0;
- slotb = (pcmp->pcmc_pipr & 0x00001800) == 0;
-
- if (!(slota || slotb)) {
- printf ("No card present\n");
-#ifdef PCMCIA_SLOT_A
- pcmp->pcmc_pgcra = 0;
-#endif
-#ifdef PCMCIA_SLOT_B
- pcmp->pcmc_pgcrb = 0;
-#endif
- return -1;
- } else
- printf ("Unknown card (");
-
- v = 0;
-
- switch ((pcmp->pcmc_pipr >> 14) & 3) {
- case 0x00:
- printf ("5V");
- v = 5;
- break;
- case 0x01:
- printf ("5V and 3V");
- v = 3;
- break;
- case 0x03:
- printf ("5V, 3V and x.xV");
- v = 3;
- break;
- }
-
- switch (v) {
- case 3:
- printf ("; using 3V");
- /* Enable 3 volt Vcc. */
-
- break;
-
- default:
- printf ("; unknown voltage");
- return -1;
- }
- printf (")\n");
- /* disable pcmcia reset after a while */
-
- udelay (20);
-
- pcmp->pcmc_pgcrb = 0;
-
- /* If you using a real hd you should give a short
- * spin-up time. */
-#ifdef CONFIG_DISK_SPINUP_TIME
- udelay (CONFIG_DISK_SPINUP_TIME);
-#endif
-
- return 0;
-}
-#endif /* CFG_CMD_PCMCIA */
diff --git a/board/genietv/genietv.h b/board/genietv/genietv.h
deleted file mode 100644
index 7c95b566f9..0000000000
--- a/board/genietv/genietv.h
+++ /dev/null
@@ -1,25 +0,0 @@
-/*
- * The GENIETV is using the following physical memorymap (copied from
- * the FADS configuration):
- *
- * ff020000 -> ff02ffff : pcmcia
- * ff010000 -> ff01ffff : BCSR connected to CS1, setup by 8xxROM
- * ff000000 -> ff00ffff : IMAP internal in the cpu
- * 02800000 -> 0287ffff : flash connected to CS0
- * 00000000 -> nnnnnnnn : sdram setup by U-Boot
- *
- * CS pins are connected as follows:
- *
- * CS0 -512Kb boot flash
- * CS1 - SDRAM #1
- * CS2 - SDRAM #2
- * CS3 - Flash #1
- * CS4 - Flash #2
- * CS5 - LON (if present)
- * CS6 - PCMCIA #1
- * CS7 - PCMCIA #2
- *
- * Ports are configured as follows:
- *
- * PA7 - SDRAM banks enable
- */
diff --git a/board/genietv/u-boot.lds b/board/genietv/u-boot.lds
deleted file mode 100644
index f48b9ad2a1..0000000000
--- a/board/genietv/u-boot.lds
+++ /dev/null
@@ -1,145 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc8xx/start.o (.text)
- common/dlmalloc.o (.text)
- lib_ppc/ppcstring.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
- lib_generic/zlib.o (.text)
-
- . = env_offset;
- common/environment.o(.text)
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- . = ALIGN(256 * 1024);
- .ppcenv :
- {
- common/environment.o (.ppcenv)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/genietv/u-boot.lds.debug b/board/genietv/u-boot.lds.debug
deleted file mode 100644
index e843df6a02..0000000000
--- a/board/genietv/u-boot.lds.debug
+++ /dev/null
@@ -1,143 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc8xx/start.o (.text)
- common/dlmalloc.o (.text)
- lib_ppc/ppcstring.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
- lib_generic/zlib.o (.text)
-
- . = env_offset;
- common/environment.o(.text)
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- . = ALIGN(256 * 1024);
- .ppcenv :
- {
- common/environment.o (.ppcenv)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/gth/Makefile b/board/gth/Makefile
deleted file mode 100644
index e14c12e4aa..0000000000
--- a/board/gth/Makefile
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# (C) Copyright 2000, 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o ee_access.o
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/gth/README b/board/gth/README
deleted file mode 100644
index 241c70b69b..0000000000
--- a/board/gth/README
+++ /dev/null
@@ -1,18 +0,0 @@
-Written by Thomas.Lange@corelatus.com 010805
-
-To make a system for gth that actually works ;-)
-the variable TBASE needs to be set to 0,1 or 2
-depending on location where image is supposed to
-be started from.
-E.g. make TBASE=1
-
-0: Start from RAM, base 0
-
-1: Start from flash_base + 0x10070
-
-2: Start from flash_base + 0x30070
-
-When using 1 or 2, the image is supposed to be launched
-from miniboot that boots the first U-Boot image found in
-flash.
-For miniboot code, description, see www.opensource.se
diff --git a/board/gth/config.mk b/board/gth/config.mk
deleted file mode 100644
index 3c80156c3f..0000000000
--- a/board/gth/config.mk
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# (C) Copyright 2000, 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-ifeq ($(TBASE),0)
-TEXT_BASE = 0
-else
-ifeq ($(TBASE),1)
-TEXT_BASE = 0x80010070
-else
-ifeq ($(TBASE),2)
-TEXT_BASE = 0x80030070
-else
-## Only to make ordinary make work
-TEXT_BASE = 0x90000000
-endif
-endif
-endif
-
-OBJCFLAGS = --set-section-flags=.ppcenv=contents,alloc,load,data
diff --git a/board/gth/ee_access.c b/board/gth/ee_access.c
deleted file mode 100644
index 716c90ed62..0000000000
--- a/board/gth/ee_access.c
+++ /dev/null
@@ -1,335 +0,0 @@
-/* Module for handling DALLAS DS2438, smart battery monitor
- Chip can store up to 40 bytes of user data in EEPROM,
- perform temp, voltage and current measurements.
- Chip also contains a unique serial number.
-
- Always read/write LSb first
-
- For documentaion, see data sheet for DS2438, 2438.pdf
-
- By Thomas.Lange@corelatus.com 001025 */
-
-#include <common.h>
-#include <config.h>
-#include <mpc8xx.h>
-
-#include <../board/gth/ee_dev.h>
-
-/* We dont have kernel functions */
-#define printk printf
-#define KERN_DEBUG
-#define KERN_ERR
-#define EIO 1
-
-static int Debug = 0;
-
-#ifndef TRUE
-#define TRUE 1
-#endif
-#ifndef FALSE
-#define FALSE 0
-#endif
-
-/*
- * lookup table ripped from DS app note 17, understanding and using
- * cyclic redundancy checks...
- */
-
-static u8 crc_lookup[256] = {
- 0, 94, 188, 226, 97, 63, 221, 131,
- 194, 156, 126, 32, 163, 253, 31, 65,
- 157, 195, 33, 127, 252, 162, 64, 30,
- 95, 1, 227, 189, 62, 96, 130, 220,
- 35, 125, 159, 193, 66, 28, 254, 160,
- 225, 191, 93, 3, 128, 222, 60, 98,
- 190, 224, 2, 92, 223, 129, 99, 61,
- 124, 34, 192, 158, 29, 67, 161, 255,
- 70, 24, 250, 164, 39, 121, 155, 197,
- 132, 218, 56, 102, 229, 187, 89, 7,
- 219, 133, 103, 57, 186, 228, 6, 88,
- 25, 71, 165, 251, 120, 38, 196, 154,
- 101, 59, 217, 135, 4, 90, 184, 230,
- 167, 249, 27, 69, 198, 152, 122, 36,
- 248, 166, 68, 26, 153, 199, 37, 123,
- 58, 100, 134, 216, 91, 5, 231, 185,
- 140, 210, 48, 110, 237, 179, 81, 15,
- 78, 16, 242, 172, 47, 113, 147, 205,
- 17, 79, 173, 243, 112, 46, 204, 146,
- 211, 141, 111, 49, 178, 236, 14, 80,
- 175, 241, 19, 77, 206, 144, 114, 44,
- 109, 51, 209, 143, 12, 82, 176, 238,
- 50, 108, 142, 208, 83, 13, 239, 177,
- 240, 174, 76, 18, 145, 207, 45, 115,
- 202, 148, 118, 40, 171, 245, 23, 73,
- 8, 86, 180, 234, 105, 55, 213, 139,
- 87, 9, 235, 181, 54, 104, 138, 212,
- 149, 203, 41, 119, 244, 170, 72, 22,
- 233, 183, 85, 11, 136, 214, 52, 106,
- 43, 117, 151, 201, 74, 20, 246, 168,
- 116, 42, 200, 150, 21, 75, 169, 247,
- 182, 232, 10, 84, 215, 137, 107, 53
-};
-
-static u8 make_new_crc( u8 Old_crc, u8 New_value ){
- /* Compute a new checksum with new byte, using previous checksum as input
- See DS app note 17, understanding and using cyclic redundancy checks...
- Also see DS2438, page 11 */
- return( crc_lookup[Old_crc ^ New_value ]);
-}
-
-int ee_crc_ok( u8 *Buffer, int Len, u8 Crc ){
- /* Check if the checksum for this buffer is correct */
- u8 Curr_crc=0;
- int i;
- u8 *Curr_byte = Buffer;
-
- for(i=0;i<Len;i++){
- Curr_crc = make_new_crc( Curr_crc, *Curr_byte);
- Curr_byte++;
- }
- E_DEBUG("Calculated CRC = 0x%x, read = 0x%x\n", Curr_crc, Crc);
-
- if(Curr_crc == Crc){
- /* Good */
- return(TRUE);
- }
- printk(KERN_ERR"EE checksum error, Calculated CRC = 0x%x, read = 0x%x\n",
- Curr_crc, Crc);
- return(FALSE);
-}
-
-static void
-set_idle(void){
- /* Send idle and keep start time
- Continous 1 is idle */
- WRITE_PORT(1);
-}
-
-static int
-do_reset(void){
- /* Release reset and verify that chip responds with presence pulse */
- int Retries = 0;
- while(Retries<5){
- udelay(RESET_LOW_TIME);
-
- /* Send reset */
- WRITE_PORT(0);
- udelay(RESET_LOW_TIME);
-
- /* Release reset */
- WRITE_PORT(1);
-
- /* Wait for EEPROM to drive output */
- udelay(PRESENCE_TIMEOUT);
- if(!READ_PORT){
- /* Ok, EEPROM is driving a 0 */
- E_DEBUG("Presence detected\n");
- if(Retries){
- E_DEBUG("Retries %d\n",Retries);
- }
- /* Make sure chip releases pin */
- udelay(PRESENCE_LOW_TIME);
- return 0;
- }
- Retries++;
- }
-
- printk(KERN_ERR"EEPROM did not respond when releasing reset\n");
-
- /* Make sure chip releases pin */
- udelay(PRESENCE_LOW_TIME);
-
- /* Set to idle again */
- set_idle();
-
- return(-EIO);
-}
-
-static u8
-read_byte(void){
- /* Read a single byte from EEPROM
- Read LSb first */
- int i;
- int Value;
- u8 Result=0;
-#ifndef CFG_IMMR
- u32 Flags;
-#endif
-
- E_DEBUG("Reading byte\n");
-
- for(i=0;i<8;i++){
- /* Small delay between pulses */
- udelay(1);
-
-#ifndef CFG_IMMR
- /* Disable irq */
- save_flags(Flags);
- cli();
-#endif
-
- /* Pull down pin short time to start read
- See page 26 in data sheet */
-
- WRITE_PORT(0);
- udelay(READ_LOW);
- WRITE_PORT(1);
-
- /* Wait for chip to drive pin */
- udelay(READ_TIMEOUT);
-
- Value = READ_PORT;
- if(Value)
- Value=1;
-
-#ifndef CFG_IMMR
- /* Enable irq */
- restore_flags(Flags);
-#endif
-
- /* Wait for chip to release pin */
- udelay(TOTAL_READ_LOW-READ_TIMEOUT);
-
- /* LSb first */
- Result|=Value<<i;
- }
-
- E_DEBUG("Read byte 0x%x\n",Result);
-
- return(Result);
-}
-
-static void
-write_byte(u8 Byte){
- /* Write a single byte to EEPROM
- Write LSb first */
- int i;
- int Value;
-#ifndef CFG_IMMR
- u32 Flags;
-#endif
-
- E_DEBUG("Writing byte 0x%x\n",Byte);
-
- for(i=0;i<8;i++){
- /* Small delay between pulses */
- udelay(1);
- Value = Byte&1;
-
-#ifndef CFG_IMMR
- /* Disable irq */
- save_flags(Flags);
- cli();
-#endif
-
- /* Pull down pin short time for a 1, long time for a 0
- See page 26 in data sheet */
-
- WRITE_PORT(0);
- if(Value){
- /* Write a 1 */
- udelay(WRITE_1_LOW);
- }
- else{
- /* Write a 0 */
- udelay(WRITE_0_LOW);
- }
-
- WRITE_PORT(1);
-
-#ifndef CFG_IMMR
- /* Enable irq */
- restore_flags(Flags);
-#endif
-
- if(Value)
- /* Wait for chip to read the 1 */
- udelay(TOTAL_WRITE_LOW-WRITE_1_LOW);
- Byte>>=1;
- }
-}
-
-int ee_do_command( u8 *Tx, int Tx_len, u8 *Rx, int Rx_len, int Send_skip ){
- /* Execute this command string, including
- giving reset and setting to idle after command
- if Rx_len is set, we read out data from EEPROM */
- int i;
-
- E_DEBUG("Command, Tx_len %d, Rx_len %d\n", Tx_len, Rx_len );
-
- if(do_reset()){
- /* Failed! */
- return(-EIO);
- }
-
- if(Send_skip)
- /* Always send SKIP_ROM first to tell chip we are sending a command,
- except when we read out rom data for chip */
- write_byte(SKIP_ROM);
-
- /* Always have Tx data */
- for(i=0;i<Tx_len;i++){
- write_byte(Tx[i]);
- }
-
- if(Rx_len){
- for(i=0;i<Rx_len;i++){
- Rx[i]=read_byte();
- }
- }
-
- set_idle();
-
- E_DEBUG("Command done\n");
-
- return(0);
-}
-
-int ee_init_data(void){
- int i;
- u8 Tx[10];
- int tmp;
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
-
- while(0){
- tmp = 1-tmp;
- if(tmp)
- immap->im_ioport.iop_padat &= ~PA_FRONT_LED;
- else
- immap->im_ioport.iop_padat |= PA_FRONT_LED;
- udelay(1);
- }
-
- /* Set port to open drain to be able to read data from
- port without setting it to input */
- PORT_B_PAR &= ~PB_EEPROM;
- PORT_B_ODR |= PB_EEPROM;
- SET_PORT_B_OUTPUT(PB_EEPROM);
-
- /* Set idle mode */
- set_idle();
-
- /* Copy all User EEPROM data to scratchpad */
- for(i=0;i<USER_PAGES;i++){
- Tx[0]=RECALL_MEMORY;
- Tx[1]=EE_USER_PAGE_0+i;
- if(ee_do_command(Tx,2,NULL,0,TRUE)) return(-EIO);
- }
-
- /* Make sure chip doesnt store measurements in NVRAM */
- Tx[0]=WRITE_SCRATCHPAD;
- Tx[1]=0; /* Page */
- Tx[2]=9;
- if(ee_do_command(Tx,3,NULL,0,TRUE)) return(-EIO);
-
- Tx[0]=COPY_SCRATCHPAD;
- if(ee_do_command(Tx,2,NULL,0,TRUE)) return(-EIO);
-
- /* FIXME check status bit instead
- Could take 10 ms to store in EEPROM */
- for(i=0;i<10;i++){
- udelay(1000);
- }
-
- return(0);
-}
diff --git a/board/gth/ee_access.h b/board/gth/ee_access.h
deleted file mode 100644
index e847f2c58b..0000000000
--- a/board/gth/ee_access.h
+++ /dev/null
@@ -1,16 +0,0 @@
-/* By Thomas.Lange@Corelatus.com 001025
-
- Definitions for EEPROM/VOLT METER DS2438 */
-
-#ifndef INCeeaccessh
-#define INCeeaccessh
-
-int ee_do_command( u8 *Tx, int Tx_len, u8 *Rx, int Rx_len, int Send_skip );
-int ee_init_data(void);
-int ee_crc_ok( u8 *Buffer, int Len, u8 Crc );
-
-#ifndef TRUE
-#define TRUE 1
-#endif
-
-#endif /* INCeeaccessh */
diff --git a/board/gth/ee_dev.h b/board/gth/ee_dev.h
deleted file mode 100644
index 417c7b675c..0000000000
--- a/board/gth/ee_dev.h
+++ /dev/null
@@ -1,85 +0,0 @@
-/* By Thomas.Lange@Corelatus.com 001025
- $Revision: 1.6 $
-
- Definitions for EEPROM/VOLT METER DS2438
- Copyright (C) 2000-2001 Corelatus AB */
-
-#ifndef INCeedevh
-#define INCeedevh
-
-#define E_DEBUG(fmt,args...) if( Debug ) printk(KERN_DEBUG"EE: " fmt, ##args)
-
-#define PORT_B_PAR ((volatile immap_t *)CFG_IMMR)->im_cpm.cp_pbpar
-#define PORT_B_ODR ((volatile immap_t *)CFG_IMMR)->im_cpm.cp_pbodr
-#define PORT_B_DIR ((volatile immap_t *)CFG_IMMR)->im_cpm.cp_pbdir
-#define PORT_B_DAT ((volatile immap_t *)CFG_IMMR)->im_cpm.cp_pbdat
-
-#define SET_PORT_B_INPUT(Mask) PORT_B_DIR &= ~(Mask)
-#define SET_PORT_B_OUTPUT(Mask) PORT_B_DIR |= Mask
-
-#define WRITE_PORT_B(Mask,Value) { \
- if (Value) PORT_B_DAT |= Mask; \
- else PORT_B_DAT &= ~(Mask); \
- }
-#define WRITE_PORT(Value) WRITE_PORT_B(PB_EEPROM,Value)
-
-#define READ_PORT (PORT_B_DAT&PB_EEPROM)
-
-/* 64 bytes chip */
-#define EE_CHIP_SIZE 64
-
-/* We use this resistor for measuring the current drain on 3.3V */
-#define CURRENT_RESISTOR 0.022
-
-/* microsecs
- Pull line down at least this long for reset pulse */
-#define RESET_LOW_TIME 490
-
-/* Read presence pulse after we release reset pulse */
-#define PRESENCE_TIMEOUT 100
-#define PRESENCE_LOW_TIME 200
-
-#define WRITE_0_LOW 80
-#define WRITE_1_LOW 2
-#define TOTAL_WRITE_LOW 80
-
-#define READ_LOW 2
-#define READ_TIMEOUT 10
-#define TOTAL_READ_LOW 80
-
-/*** Rom function commands ***/
-#define READ_ROM 0x33
-#define MATCH_ROM 0x55
-#define SKIP_ROM 0xCC
-#define SEARCH_ROM 0xF0
-
-
-/*** Memory_command_function ***/
-#define WRITE_SCRATCHPAD 0x4E
-#define READ_SCRATCHPAD 0xBE
-#define COPY_SCRATCHPAD 0x48
-#define RECALL_MEMORY 0xB8
-#define CONVERT_TEMP 0x44
-#define CONVERT_VOLTAGE 0xB4
-
-/* Chip is divided in 8 pages, 8 bytes each */
-
-#define EE_PAGE_SIZE 8
-
-/* All chip data we want are in page 0 */
-
-/* Bytes in page 0 */
-#define EE_P0_STATUS 0
-#define EE_P0_TEMP_LSB 1
-#define EE_P0_TEMP_MSB 2
-#define EE_P0_VOLT_LSB 3
-#define EE_P0_VOLT_MSB 4
-#define EE_P0_CURRENT_LSB 5
-#define EE_P0_CURRENT_MSB 6
-
-
-/* 40 byte user data is located at page 3-7 */
-#define EE_USER_PAGE_0 3
-#define USER_PAGES 5
-
-#endif /* INCeedevh */
diff --git a/board/gth/flash.c b/board/gth/flash.c
deleted file mode 100644
index 41a5c50b0f..0000000000
--- a/board/gth/flash.c
+++ /dev/null
@@ -1,649 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (vu_long *addr, flash_info_t *info);
-static int write_word (flash_info_t *info, ulong dest, ulong data);
-static void flash_get_offsets (ulong base, flash_info_t *info);
-
-/*-----------------------------------------------------------------------
- * Protection Flags:
- */
-#define FLAG_PROTECT_SET 0x01
-#define FLAG_PROTECT_CLEAR 0x02
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- unsigned long size_b0, size_b1;
- int i;
-
- /*printf("faking");*/
-
- return(0x1fffff);
-
- /* Init: no FLASHes known */
- for (i=0; i < CFG_MAX_FLASH_BANKS; ++i)
- {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* Static FLASH Bank configuration here - FIXME XXX */
-
- size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN)
- {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size_b0, size_b0<<20);
- }
-
-#if 0
- if (FLASH_BASE1_PRELIM != 0x0) {
- size_b1 = flash_get_size((vu_long *)FLASH_BASE1_PRELIM, &flash_info[1]);
-
- if (size_b1 > size_b0) {
- printf ("## ERROR: Bank 1 (0x%08lx = %ld MB) > Bank 0 (0x%08lx = %ld MB)\n",
- size_b1, size_b1<<20,size_b0, size_b0<<20);
-
- flash_info[0].flash_id = FLASH_UNKNOWN;
- flash_info[1].flash_id = FLASH_UNKNOWN;
- flash_info[0].sector_count = -1;
- flash_info[1].sector_count = -1;
- flash_info[0].size = 0;
- flash_info[1].size = 0;
- return (0);
- }
- } else {
-#endif
- size_b1 = 0;
-
- /* Remap FLASH according to real size */
- memctl->memc_or0 = CFG_OR0_PRELIM;
- memctl->memc_br0 = CFG_BR0_PRELIM;
-
- /* Re-do sizing to get full correct info */
- size_b0 = flash_get_size((vu_long *)CFG_FLASH_BASE, &flash_info[0]);
-
- flash_get_offsets (CFG_FLASH_BASE, &flash_info[0]);
-
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
- /* monitor protection ON by default */
- (void)flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+monitor_flash_len-1,
- &flash_info[0]);
-#endif
-
- if (size_b1)
- {
- /* memctl->memc_or1 = CFG_OR1_PRELIM;
- memctl->memc_br1 = CFG_BR1_PRELIM; */
-
- /* Re-do sizing to get full correct info */
- size_b1 = flash_get_size((vu_long *)(CFG_FLASH_BASE + size_b0),
- &flash_info[1]);
-
- flash_get_offsets (CFG_FLASH_BASE + size_b0, &flash_info[1]);
-
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
- /* monitor protection ON by default */
- (void)flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+monitor_flash_len-1,
- &flash_info[1]);
-#endif
- }
- else
- {
-/* memctl->memc_or1 = CFG_OR1_PRELIM;
- FIXME memctl->memc_br1 = CFG_BR1_PRELIM; */
-
- flash_info[1].flash_id = FLASH_UNKNOWN;
- flash_info[1].sector_count = -1;
- }
-
- flash_info[0].size = size_b0;
- flash_info[1].size = size_b1;
-
- return (size_b0 + size_b1);
-}
-
-
-static void flash_get_offsets (ulong base, flash_info_t *info)
-{
- int i;
-
- /* set up sector start adress table */
- if (info->flash_id & FLASH_BTYPE)
- {
- /* set sector offsets for bottom boot block type */
- for (i = 0; i < info->sector_count; i++)
- {
- info->start[i] = base + (i * 0x00040000);
- }
- }
- else
- {
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- for (; i >= 0; i--)
- {
- info->start[i] = base + i * 0x00040000;
- }
- }
-
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD: printf ("AMD "); break;
- case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
- default: printf ("Unknown Vendor "); break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
-
-#if 0
- case FLASH_AM040B:
- printf ("AM29F040B (4 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM040T:
- printf ("AM29F040T (4 Mbit, top boot sect)\n");
- break;
-#endif
- case FLASH_AM400B:
- printf ("AM29LV400B (4 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM400T:
- printf ("AM29LV400T (4 Mbit, top boot sector)\n");
- break;
- case FLASH_AM800B:
- printf ("AM29LV800B (8 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM800T:
- printf ("AM29LV800T (8 Mbit, top boot sector)\n");
- break;
- case FLASH_AM160B:
- printf ("AM29LV160B (16 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM160T:
- printf ("AM29LV160T (16 Mbit, top boot sector)\n");
- break;
- case FLASH_AM320B:
- printf ("AM29LV320B (32 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM320T:
- printf ("AM29LV320T (32 Mbit, top boot sector)\n");
- break;
- default:
- printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20,
- info->sector_count);
-
- printf (" Sector Start Addresses:");
-
- for (i=0; i<info->sector_count; ++i)
- {
- if ((i % 5) == 0)
- {
- printf ("\n ");
- }
-
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " ");
- }
-
- printf ("\n");
- return;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-
-static ulong flash_get_size (vu_long *addr, flash_info_t *info)
-{
- short i;
-#if 0
- ulong base = (ulong)addr;
-#endif
- ulong value;
-
- /* Write auto select command: read Manufacturer ID */
-#if 0
- addr[0x0555] = 0x00AA00AA;
- addr[0x02AA] = 0x00550055;
- addr[0x0555] = 0x00900090;
-#else
- addr[0x0555] = 0xAAAAAAAA;
- addr[0x02AA] = 0x55555555;
- addr[0x0555] = 0x90909090;
-#endif
-
- value = addr[0];
-
- switch (value)
- {
- case AMD_MANUFACT:
- info->flash_id = FLASH_MAN_AMD;
- break;
-
- case FUJ_MANUFACT:
- info->flash_id = FLASH_MAN_FUJ;
- break;
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- break;
- }
-
- value = addr[1]; /* device ID */
-
- switch (value)
- {
-#if 0
- case AMD_ID_F040B:
- info->flash_id += FLASH_AM040B;
- info->sector_count = 8;
- info->size = 0x00200000;
- break; /* => 2 MB */
-#endif
- case AMD_ID_LV400T:
- info->flash_id += FLASH_AM400T;
- info->sector_count = 11;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case AMD_ID_LV400B:
- info->flash_id += FLASH_AM400B;
- info->sector_count = 11;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case AMD_ID_LV800T:
- info->flash_id += FLASH_AM800T;
- info->sector_count = 19;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case AMD_ID_LV800B:
- info->flash_id += FLASH_AM800B;
- info->sector_count = 19;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case AMD_ID_LV160T:
- info->flash_id += FLASH_AM160T;
- info->sector_count = 35;
- info->size = 0x00400000;
- break; /* => 4 MB */
-
- case AMD_ID_LV160B:
- info->flash_id += FLASH_AM160B;
- info->sector_count = 35;
- info->size = 0x00400000;
- break; /* => 4 MB */
-#if 0 /* enable when device IDs are available */
- case AMD_ID_LV320T:
- info->flash_id += FLASH_AM320T;
- info->sector_count = 67;
- info->size = 0x00800000;
- break; /* => 8 MB */
-
- case AMD_ID_LV320B:
- info->flash_id += FLASH_AM320B;
- info->sector_count = 67;
- info->size = 0x00800000;
- break; /* => 8 MB */
-#endif
- default:
- info->flash_id = FLASH_UNKNOWN;
- return (0); /* => no or unknown flash */
-
- }
-
-#if 0
- /* set up sector start adress table */
- if (info->flash_id & FLASH_BTYPE) {
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00008000;
- info->start[2] = base + 0x0000C000;
- info->start[3] = base + 0x00010000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00020000) - 0x00060000;
- }
- } else {
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- info->start[i--] = base + info->size - 0x00008000;
- info->start[i--] = base + info->size - 0x0000C000;
- info->start[i--] = base + info->size - 0x00010000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00020000;
- }
- }
-#else
- flash_get_offsets ((ulong)addr, &flash_info[0]);
-#endif
-
- /* check for protected sectors */
- for (i = 0; i < info->sector_count; i++)
- {
- /* read sector protection at sector address, (A7 .. A0) = 0x02 */
- /* D0 = 1 if protected */
- addr = (volatile unsigned long *)(info->start[i]);
- info->protect[i] = addr[2] & 1;
- }
-
- /*
- * Prevent writes to uninitialized FLASH.
- */
- if (info->flash_id != FLASH_UNKNOWN)
- {
- addr = (volatile unsigned long *)info->start[0];
-#if 0
- *addr = 0x00F000F0; /* reset bank */
-#else
- *addr = 0xF0F0F0F0; /* reset bank */
-#endif
- }
-
- return (info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- vu_long *addr = (vu_long*)(info->start[0]);
- int flag, prot, sect, l_sect;
- ulong start, now, last;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- if ((info->flash_id == FLASH_UNKNOWN) ||
- (info->flash_id > FLASH_AMD_COMP)) {
- printf ("Can't erase unknown flash type - aborted\n");
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- l_sect = -1;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
-#if 0
- addr[0x0555] = 0x00AA00AA;
- addr[0x02AA] = 0x00550055;
- addr[0x0555] = 0x00800080;
- addr[0x0555] = 0x00AA00AA;
- addr[0x02AA] = 0x00550055;
-#else
- addr[0x0555] = 0xAAAAAAAA;
- addr[0x02AA] = 0x55555555;
- addr[0x0555] = 0x80808080;
- addr[0x0555] = 0xAAAAAAAA;
- addr[0x02AA] = 0x55555555;
-#endif
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr = (vu_long*)(info->start[sect]);
-#if 0
- addr[0] = 0x00300030;
-#else
- addr[0] = 0x30303030;
-#endif
- l_sect = sect;
- }
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- /*
- * We wait for the last triggered sector
- */
- if (l_sect < 0)
- goto DONE;
-
- start = get_timer (0);
- last = start;
- addr = (vu_long*)(info->start[l_sect]);
-#if 0
- while ((addr[0] & 0x00800080) != 0x00800080)
-#else
- while ((addr[0] & 0xFFFFFFFF) != 0xFFFFFFFF)
-#endif
- {
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- return 1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- }
-
-DONE:
- /* reset to read mode */
- addr = (volatile unsigned long *)info->start[0];
-#if 0
- addr[0] = 0x00F000F0; /* reset bank */
-#else
- addr[0] = 0xF0F0F0F0; /* reset bank */
-#endif
-
- printf (" done\n");
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int i, l, rc;
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
- for (; i<4 && cnt>0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = 0;
- for (i=0; i<4; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- return (write_word(info, wp, data));
-}
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word (flash_info_t *info, ulong dest, ulong data)
-{
- vu_long *addr = (vu_long*)(info->start[0]);
- ulong start;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*((vu_long *)dest) & data) != data) {
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
-#if 0
- addr[0x0555] = 0x00AA00AA;
- addr[0x02AA] = 0x00550055;
- addr[0x0555] = 0x00A000A0;
-#else
- addr[0x0555] = 0xAAAAAAAA;
- addr[0x02AA] = 0x55555555;
- addr[0x0555] = 0xA0A0A0A0;
-#endif
-
- *((vu_long *)dest) = data;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* data polling for D7 */
- start = get_timer (0);
-#if 0
- while ((*((vu_long *)dest) & 0x00800080) != (data & 0x00800080))
-#else
- while ((*((vu_long *)dest) & 0x80808080) != (data & 0x80808080))
-#endif
- {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- return (1);
- }
- }
- return (0);
-}
-
-/*-----------------------------------------------------------------------
- */
diff --git a/board/gth/gth.c b/board/gth/gth.c
deleted file mode 100644
index b1fcbf5cc3..0000000000
--- a/board/gth/gth.c
+++ /dev/null
@@ -1,595 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * Adapted from FADS and other board config files to GTH by thomas@corelatus.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <config.h>
-#include <watchdog.h>
-#include <mpc8xx.h>
-#include "ee_access.h"
-#include "ee_dev.h"
-
-#ifdef CONFIG_BDM
-#undef printf
-#define printf(a,...) /* nothing */
-#endif
-
-
-int checkboard (void)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- int Id = 0;
- int Rev = 0;
- u32 Pbdat;
-
- puts ("Board: ");
-
- /* Turn on leds and setup for reading rev and id */
-
-#define PB_OUTS (PB_BLUE_LED|PB_ID_GND)
-#define PB_INS (PB_ID_0|PB_ID_1|PB_ID_2|PB_ID_3|PB_REV_1|PB_REV_0)
-
- immap->im_cpm.cp_pbpar &= ~(PB_OUTS | PB_INS);
-
- immap->im_cpm.cp_pbdir &= ~PB_INS;
-
- immap->im_cpm.cp_pbdir |= PB_OUTS;
- immap->im_cpm.cp_pbodr |= PB_OUTS;
- immap->im_cpm.cp_pbdat &= ~PB_OUTS;
-
- /* Hold 100 Mbit in reset until fpga is loaded */
- immap->im_ioport.iop_pcpar &= ~PC_ENET100_RESET;
- immap->im_ioport.iop_pcdir |= PC_ENET100_RESET;
- immap->im_ioport.iop_pcso &= ~PC_ENET100_RESET;
- immap->im_ioport.iop_pcdat &= ~PC_ENET100_RESET;
-
- /* Turn on front led to show that we are alive */
- immap->im_ioport.iop_papar &= ~PA_FRONT_LED;
- immap->im_ioport.iop_padir |= PA_FRONT_LED;
- immap->im_ioport.iop_paodr |= PA_FRONT_LED;
- immap->im_ioport.iop_padat &= ~PA_FRONT_LED;
-
- Pbdat = immap->im_cpm.cp_pbdat;
-
- if (!(Pbdat & PB_ID_0))
- Id += 1;
- if (!(Pbdat & PB_ID_1))
- Id += 2;
- if (!(Pbdat & PB_ID_2))
- Id += 4;
- if (!(Pbdat & PB_ID_3))
- Id += 8;
-
- if (Pbdat & PB_REV_0)
- Rev += 1;
- if (Pbdat & PB_REV_1)
- Rev += 2;
-
- /* Turn ID off since we dont need it anymore */
- immap->im_cpm.cp_pbdat |= PB_ID_GND;
-
- printf ("GTH board, rev %d, id=0x%01x\n", Rev, Id);
- return 0;
-}
-
-#define _NOT_USED_ 0xffffffff
-const uint sdram_table[] = {
- /* Single read, offset 0 */
- 0x0f3dfc04, 0x0eefbc04, 0x01bf7c04, 0x0feafc00,
- 0x1fb5fc45, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /* Burst read, Offset 0x8, 4 reads */
- 0x0f3dfc04, 0x0eefbc04, 0x00bf7c04, 0x00ffec00,
- 0x00fffc00, 0x01eafc00, 0x1fb5fc00, 0xfffffc45,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /* Not used part of burst read is used for MRS, Offset 0x14 */
- 0xefeabc34, 0x1fb57c34, 0xfffffc05, _NOT_USED_,
- /* _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, */
-
- /* Single write, Offset 0x18 */
- 0x0f3dfc04, 0x0eebbc00, 0x01a27c04, 0x1fb5fc45,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /* Burst write, Offset 0x20. 4 writes */
- 0x0f3dfc04, 0x0eebbc00, 0x00b77c00, 0x00fffc00,
- 0x00fffc00, 0x01eafc04, 0x1fb5fc45, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /* Not used part of burst write is used for precharge, Offset 0x2C */
- 0x0ff5fc04, 0xfffffc05, _NOT_USED_, _NOT_USED_,
- /* _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, */
-
- /* Period timer service. Offset 0x30. Refresh. Wait at least 70 ns after refresh command */
- 0x1ffd7c04, 0xfffffc04, 0xfffffc04, 0xfffffc05,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /* Exception, Offset 0x3C */
- 0xfffffc04, 0xfffffc05, _NOT_USED_, _NOT_USED_
-};
-
-const uint fpga_table[] = {
- /* Single read, offset 0 */
- 0x0cffec04, 0x00ffec04, 0x00ffec04, 0x00ffec04,
- 0x00fffc04, 0x00fffc00, 0x00ffec04, 0xffffec05,
-
- /* Burst read, Offset 0x8 */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /* Single write, Offset 0x18 */
- 0x0cffec04, 0x00ffec04, 0x00ffec04, 0x00ffec04,
- 0x00fffc04, 0x00fffc00, 0x00ffec04, 0xffffec05,
-
- /* Burst write, Offset 0x20. */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /* Period timer service. Offset 0x30. */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /* Exception, Offset 0x3C */
- 0xfffffc04, 0xfffffc05, _NOT_USED_, _NOT_USED_
-};
-
-int _initsdram (uint base, uint * noMbytes)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *mc = &immap->im_memctl;
- volatile u32 *memptr;
-
- mc->memc_mptpr = MPTPR_PTP_DIV16; /* (16-17) */
-
- /* SDRAM in UPMA
-
- GPL_0 is connected instead of A19 to SDRAM.
- According to table 16-17, AMx should be 001, i.e. type 1
- and GPL_0 should hold address A10 when multiplexing */
-
- mc->memc_mamr = (0x2E << MAMR_PTA_SHIFT) | MAMR_PTAE | MAMR_AMA_TYPE_1 | MAMR_G0CLA_A10 | MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_1X; /* (16-13) */
-
- upmconfig (UPMA, (uint *) sdram_table,
- sizeof (sdram_table) / sizeof (uint));
-
- /* Perform init of sdram ( Datasheet Page 9 )
- Precharge */
- mc->memc_mcr = 0x8000212C; /* run upm a at 0x2C (16-15) */
-
- /* Run 2 refresh cycles */
- mc->memc_mcr = 0x80002130; /* run upm a at 0x30 (16-15) */
- mc->memc_mcr = 0x80002130; /* run upm a at 0x30 (16-15) */
-
- /* Set Mode register */
- mc->memc_mar = 0x00000088; /* set mode register (address) to 0x022 (16-17) */
- /* Lower 2 bits are not connected to chip */
- mc->memc_mcr = 0x80002114; /* run upm a at 0x14 (16-15) */
-
- /* CS1, base 0x0000000 - 64 Mbyte, use UPM A */
- mc->memc_or1 = 0xfc000000 | OR_CSNT_SAM;
- mc->memc_br1 = BR_MS_UPMA | BR_V; /* SDRAM base always 0 */
-
- /* Test if we really have 64 MB SDRAM */
- memptr = (u32 *) 0;
- *memptr = 0;
-
- memptr = (u32 *) 0x2000000; /* First u32 in upper 32 MB */
- *memptr = 0x12345678;
-
- memptr = (u32 *) 0;
- if (*memptr == 0x12345678) {
- /* Wrapped, only have 32 MB */
- mc->memc_or1 = 0xfe000000 | OR_CSNT_SAM;
- *noMbytes = 32;
- } else {
- /* 64 MB */
- *noMbytes = 64;
- }
-
- /* Setup FPGA in UPMB */
- upmconfig (UPMB, (uint *) fpga_table,
- sizeof (fpga_table) / sizeof (uint));
-
- /* Enable UPWAITB */
- mc->memc_mbmr = MBMR_GPL_B4DIS; /* (16-13) */
-
- /* CS2, base FPGA_2_BASE - 4 MByte, use UPM B 32 Bit */
- mc->memc_or2 = 0xffc00000 | OR_BI;
- mc->memc_br2 = FPGA_2_BASE | BR_MS_UPMB | BR_V;
-
- /* CS3, base FPGA_3_BASE - 4 MByte, use UPM B 16 bit */
- mc->memc_or3 = 0xffc00000 | OR_BI;
- mc->memc_br3 = FPGA_3_BASE | BR_MS_UPMB | BR_V | BR_PS_16;
-
- return 0;
-}
-
-/* ------------------------------------------------------------------------- */
-
-void _sdramdisable (void)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
-
- memctl->memc_br1 = 0x00000000;
-
- /* maybe we should turn off upmb here or something */
-}
-
-/* ------------------------------------------------------------------------- */
-
-int initsdram (uint base, uint * noMbytes)
-{
- *noMbytes = 32;
-
-#ifdef CONFIG_START_IN_RAM
- /* SDRAM is already setup. Dont touch it */
- return 0;
-#else
-
- if (!_initsdram (base, noMbytes)) {
-
- return 0;
- } else {
- _sdramdisable ();
-
- return -1;
- }
-#endif
-}
-
-long int initdram (int board_type)
-{
- u32 *i;
- u32 j;
- u32 k;
-
- /* GTH only have SDRAM */
- uint sdramsz;
-
- if (!initsdram (0x00000000, &sdramsz)) {
- printf ("(%u MB SDRAM) ", sdramsz);
- } else {
- /********************************
- *SDRAM ERROR, HALT PROCESSOR
- *********************************/
- printf ("SDRAM ERROR\n");
- while (1);
- }
-
-#ifndef CONFIG_START_IN_RAM
-
-#define U32_S ((sdramsz<<18)-1)
-
-#if 1
- /* Do a simple memory test */
- for (i = (u32 *) 0, j = 0; (u32) i < U32_S; i += 2, j += 2) {
- *i = j + (j << 17);
- *(i + 1) = ~(j + (j << 18));
- }
-
- WATCHDOG_RESET ();
-
- printf (".");
-
- for (i = (u32 *) 0, j = 0; (u32) i < U32_S; i += 2, j += 2) {
- k = *i;
- if (k != (j + (j << 17))) {
- printf ("Mem test error, i=0x%x, 0x%x\n, 0x%x", (u32) i, j, k);
- while (1);
- }
- k = *(i + 1);
- if (k != ~(j + (j << 18))) {
- printf ("Mem test error(+1), i=0x%x, 0x%x\n, 0x%x",
- (u32) i + 1, j, k);
- while (1);
- }
- }
-#endif
-
- WATCHDOG_RESET ();
-
- /* Clear memory */
- for (i = (u32 *) 0; (u32) i < U32_S; i++) {
- *i = 0;
- }
-#endif /* !start in ram */
-
- WATCHDOG_RESET ();
-
- return (sdramsz << 20);
-}
-
-#define POWER_OFFSET 0xF0000
-#define SW_WATCHDOG_REASON 13
-
-#define BOOTDATA_OFFSET 0xF8000
-#define MAX_ATTEMPTS 5
-
-#define FAILSAFE_BOOT 1
-#define SYSTEM_BOOT 2
-
-#define WRITE_FLASH16(a, d) \
-do \
-{ \
- *((volatile u16 *) (a)) = (d);\
- } while(0)
-
-static void write_bootdata (volatile u16 * addr, u8 System, u8 Count)
-{
- u16 data;
- volatile u16 *flash = (u16 *) (CFG_FLASH_BASE);
-
- if ((System != FAILSAFE_BOOT) & (System != SYSTEM_BOOT)) {
- printf ("Invalid system data %u, setting failsafe\n", System);
- System = FAILSAFE_BOOT;
- }
-
- if ((Count < 1) | (Count > MAX_ATTEMPTS)) {
- printf ("Invalid boot count %u, setting 1\n", Count);
- Count = 1;
- }
-
- if (System == FAILSAFE_BOOT) {
- printf ("Setting failsafe boot in flash\n");
- } else {
- printf ("Setting system boot in flash\n");
- }
- printf ("Boot attempt %d\n", Count);
-
- data = (System << 8) | Count;
- /* AMD 16 bit */
- WRITE_FLASH16 (&flash[0x555], 0xAAAA);
- WRITE_FLASH16 (&flash[0x2AA], 0x5555);
- WRITE_FLASH16 (&flash[0x555], 0xA0A0);
-
- WRITE_FLASH16 (addr, data);
-}
-
-static void maybe_update_restart_reason (volatile u32 * addr32)
-{
- /* Update addr if sw wd restart */
- volatile u16 *flash = (u16 *) (CFG_FLASH_BASE);
- volatile u16 *addr_16 = (u16 *) addr32;
- u32 rsr;
-
- /* Dont reset register now */
- rsr = ((volatile immap_t *) CFG_IMMR)->im_clkrst.car_rsr;
-
- rsr >>= 24;
-
- if (rsr & 0x10) {
- /* Was really a sw wd restart, update reason */
-
- printf ("Last restart by software watchdog\n");
-
- /* AMD 16 bit */
- WRITE_FLASH16 (&flash[0x555], 0xAAAA);
- WRITE_FLASH16 (&flash[0x2AA], 0x5555);
- WRITE_FLASH16 (&flash[0x555], 0xA0A0);
-
- WRITE_FLASH16 (addr_16, 0);
-
- udelay (1000);
-
- WATCHDOG_RESET ();
-
- /* AMD 16 bit */
- WRITE_FLASH16 (&flash[0x555], 0xAAAA);
- WRITE_FLASH16 (&flash[0x2AA], 0x5555);
- WRITE_FLASH16 (&flash[0x555], 0xA0A0);
-
- WRITE_FLASH16 (addr_16 + 1, SW_WATCHDOG_REASON);
-
- }
-}
-
-static void check_restart_reason (void)
-{
- /* Update restart reason if sw watchdog was
- triggered */
-
- int i;
- volatile u32 *raddr;
-
- raddr = (u32 *) (CFG_FLASH_BASE + POWER_OFFSET);
-
- if (*raddr == 0xFFFFFFFF) {
- /* Nothing written */
- maybe_update_restart_reason (raddr);
- } else {
- /* Search for latest written reason */
- i = 0;
- while ((*(raddr + 2) != 0xFFFFFFFF) & (i < 2000)) {
- raddr += 2;
- i++;
- }
- if (i >= 2000) {
- /* Whoa, dont write any more */
- printf ("*** No free restart reason found ***\n");
- } else {
- /* Check if written */
- if (*raddr == 0) {
- /* Erased by kernel, no new reason written */
- maybe_update_restart_reason (raddr + 2);
- }
- }
- }
-}
-
-static void check_boot_tries (void)
-{
- /* Count the number of boot attemps
- switch system if too many */
-
- int i;
- volatile u16 *addr;
- volatile u16 data;
- int failsafe = 1;
- u8 system;
- u8 count;
-
- addr = (u16 *) (CFG_FLASH_BASE + BOOTDATA_OFFSET);
-
- if (*addr == 0xFFFF) {
- printf ("*** No bootdata exists. ***\n");
- write_bootdata (addr, FAILSAFE_BOOT, 1);
- } else {
- /* Search for latest written bootdata */
- i = 0;
- while ((*(addr + 1) != 0xFFFF) & (i < 8000)) {
- addr++;
- i++;
- }
- if (i >= 8000) {
- /* Whoa, dont write any more */
- printf ("*** No bootdata found. Not updating flash***\n");
- } else {
- /* See how many times we have tried to boot real system */
- data = *addr;
- system = data >> 8;
- count = data & 0xFF;
- if ((system != SYSTEM_BOOT) & (system != FAILSAFE_BOOT)) {
- printf ("*** Wrong system %d\n", system);
- system = FAILSAFE_BOOT;
- count = 1;
- } else {
- switch (count) {
- case 0:
- case 1:
- case 2:
- case 3:
- case 4:
- /* Try same system again if needed */
- count++;
- break;
-
- case 5:
- /* Switch system and reset tries */
- count = 1;
- system = 3 - system;
- printf ("***Too many boot attempts, switching system***\n");
- break;
- default:
- /* Switch system, start over and hope it works */
- printf ("***Unexpected data on addr 0x%x, %u***\n",
- (u32) addr, data);
- count = 1;
- system = 3 - system;
- }
- }
- write_bootdata (addr + 1, system, count);
- if (system == SYSTEM_BOOT) {
- failsafe = 0;
- }
- }
- }
- if (failsafe) {
- printf ("Booting failsafe system\n");
- setenv ("bootargs", "panic=1 root=/dev/hda7");
- setenv ("bootcmd", "disk 100000 0:5;bootm 100000");
- } else {
- printf ("Using normal system\n");
- setenv ("bootargs", "panic=1 root=/dev/hda4");
- setenv ("bootcmd", "disk 100000 0:2;bootm 100000");
- }
-}
-
-int misc_init_r (void)
-{
- u8 Rx[80];
- u8 Tx[5];
- int page;
- int read = 0;
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
-
- /* Kill fpga */
- immap->im_ioport.iop_papar &= ~(PA_FL_CONFIG | PA_FL_CE);
- immap->im_ioport.iop_padir |= (PA_FL_CONFIG | PA_FL_CE);
- immap->im_ioport.iop_paodr &= ~(PA_FL_CONFIG | PA_FL_CE);
-
- /* Enable fpga, active low */
- immap->im_ioport.iop_padat &= ~PA_FL_CE;
-
- /* Start configuration */
- immap->im_ioport.iop_padat &= ~PA_FL_CONFIG;
- udelay (2);
-
- immap->im_ioport.iop_padat |= (PA_FL_CONFIG | PA_FL_CE);
-
- /* Check if we need to boot failsafe system */
- check_boot_tries ();
-
- /* Check if we need to update restart reason */
- check_restart_reason ();
-
- if (ee_init_data ()) {
- printf ("EEPROM init failed\n");
- return (0);
- }
-
- /* Read the pages where ethernet address is stored */
-
- for (page = EE_USER_PAGE_0; page <= EE_USER_PAGE_0 + 2; page++) {
- /* Copy from nvram to scratchpad */
- Tx[0] = RECALL_MEMORY;
- Tx[1] = page;
- if (ee_do_command (Tx, 2, NULL, 0, TRUE)) {
- printf ("EE user page %d recall failed\n", page);
- return (0);
- }
-
- Tx[0] = READ_SCRATCHPAD;
- if (ee_do_command (Tx, 2, Rx + read, 9, TRUE)) {
- printf ("EE user page %d read failed\n", page);
- return (0);
- }
- /* Crc in 9:th byte */
- if (!ee_crc_ok (Rx + read, 8, *(Rx + read + 8))) {
- printf ("EE read failed, page %d. CRC error\n", page);
- return (0);
- }
- read += 8;
- }
-
- /* Add eos after eth addr */
- Rx[17] = 0;
-
- printf ("Ethernet addr read from eeprom: %s\n\n", Rx);
-
- if ((Rx[2] != ':') |
- (Rx[5] != ':') |
- (Rx[8] != ':') | (Rx[11] != ':') | (Rx[14] != ':')) {
- printf ("*** ethernet addr invalid, using default ***\n");
- } else {
- setenv ("ethaddr", (char *)Rx);
- }
- return (0);
-}
diff --git a/board/gth/u-boot.lds b/board/gth/u-boot.lds
deleted file mode 100644
index 8ac4bdad07..0000000000
--- a/board/gth/u-boot.lds
+++ /dev/null
@@ -1,130 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc8xx/start.o(.text)
- *(.text)
- common/environment.o(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/gw8260/Makefile b/board/gw8260/Makefile
deleted file mode 100644
index 827a6ac5f4..0000000000
--- a/board/gw8260/Makefile
+++ /dev/null
@@ -1,47 +0,0 @@
-#
-# (C) Copyright 2000, 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := gw8260.o flash.o
-SOBJS :=
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/gw8260/config.mk b/board/gw8260/config.mk
deleted file mode 100644
index ca0540d701..0000000000
--- a/board/gw8260/config.mk
+++ /dev/null
@@ -1,34 +0,0 @@
-#
-# (C) Copyright 2000
-# Sysgo Real-Time Solutions, GmbH <www.elinos.com>
-# Marius Groeger <mgroeger@sysgo.de>
-#
-# (C) Copyright 2000, 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# MBX8xx boards
-#
-
-TEXT_BASE = 0x40000000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
diff --git a/board/gw8260/flash.c b/board/gw8260/flash.c
deleted file mode 100644
index 5620a1d8b7..0000000000
--- a/board/gw8260/flash.c
+++ /dev/null
@@ -1,523 +0,0 @@
-/*
- * (C) Copyright 2000
- * Marius Groeger <mgroeger@sysgo.de>
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- *
- * (C) Copyright 2000, 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2001
- * Advent Networks, Inc. <http://www.adventnetworks.com>
- * Oliver Brown <oliverb@alumni.utexas.net>
- *
- *--------------------------------------------------------------------
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*********************************************************************/
-/* DESCRIPTION:
- * This file contains the flash routines for the GW8260 board.
- *
- *
- *
- * MODULE DEPENDENCY:
- * None
- *
- *
- * RESTRICTIONS/LIMITATIONS:
- *
- * Only supports the following flash devices:
- * AMD 29F080B
- * AMD 29F016D
- *
- * Copyright (c) 2001, Advent Networks, Inc.
- *
- */
-/*********************************************************************/
-
-#include <common.h>
-#include <mpc8260.h>
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
-
-static ulong flash_get_size (vu_long *addr, flash_info_t *info);
-static int write_word (flash_info_t *info, ulong dest, ulong data);
-
-/*********************************************************************/
-/* functions */
-/*********************************************************************/
-
-/*********************************************************************/
-/* NAME: flash_init() - initializes flash banks */
-/* */
-/* DESCRIPTION: */
-/* This function initializes the flash bank(s). */
-/* */
-/* RETURNS: */
-/* The size in bytes of the flash */
-/* */
-/* RESTRICTIONS/LIMITATIONS: */
-/* */
-/* */
-/*********************************************************************/
-unsigned long flash_init (void)
-{
- unsigned long size;
- int i;
-
- /* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* for now, only support the 4 MB Flash SIMM */
- size = flash_get_size((vu_long *)CFG_FLASH0_BASE, &flash_info[0]);
-
- /*
- * protect monitor and environment sectors
- */
-
-#if CFG_MONITOR_BASE >= CFG_FLASH0_BASE
- flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+monitor_flash_len-1,
- &flash_info[0]);
-#endif
-
-#if (CFG_ENV_IS_IN_FLASH == 1) && defined(CFG_ENV_ADDR)
-# ifndef CFG_ENV_SIZE
-# define CFG_ENV_SIZE CFG_ENV_SECT_SIZE
-# endif
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1,
- &flash_info[0]);
-#endif
-
- return (CFG_FLASH0_SIZE * 1024 * 1024); /*size*/
-}
-
-/*********************************************************************/
-/* NAME: flash_print_info() - prints flash imformation */
-/* */
-/* DESCRIPTION: */
-/* This function prints the flash information. */
-/* */
-/* INPUTS: */
-/* flash_info_t *info - flash information structure */
-/* */
-/* OUTPUTS: */
-/* Displays flash information to console */
-/* */
-/* RETURNS: */
-/* None */
-/* */
-/* RESTRICTIONS/LIMITATIONS: */
-/* */
-/* */
-/*********************************************************************/
-void flash_print_info (flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch ((info->flash_id >> 16) & 0xff) {
- case 0x1:
- printf ("AMD ");
- break;
- default:
- printf ("Unknown Vendor ");
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case AMD_ID_F040B:
- printf ("AM29F040B (4 Mbit)\n");
- break;
- case AMD_ID_F080B:
- printf ("AM29F080B (8 Mbit)\n");
- break;
- case AMD_ID_F016D:
- printf ("AM29F016D (16 Mbit)\n");
- break;
- default:
- printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " "
- );
- }
- printf ("\n");
- return;
-}
-
-/*********************************************************************/
-/* The following code cannot be run from FLASH! */
-/*********************************************************************/
-
-/*********************************************************************/
-/* NAME: flash_get_size() - detects the flash size */
-/* */
-/* DESCRIPTION: */
-/* 1) Reads vendor ID and devices ID from the flash devices. */
-/* 2) Initializes flash info struct. */
-/* 3) Return the flash size */
-/* */
-/* INPUTS: */
-/* vu_long *addr - pointer to start of flash */
-/* flash_info_t *info - flash information structure */
-/* */
-/* OUTPUTS: */
-/* None */
-/* */
-/* RETURNS: */
-/* Size of the flash in bytes, or 0 if device id is unknown. */
-/* */
-/* RESTRICTIONS/LIMITATIONS: */
-/* Only supports the following devices: */
-/* AM29F080D */
-/* AM29F016D */
-/* */
-/*********************************************************************/
-static ulong flash_get_size (vu_long *addr, flash_info_t *info)
-{
- short i;
- vu_long vendor, devid;
- ulong base = (ulong)addr;
-
- /*printf("addr = %08lx\n", (unsigned long)addr); */
-
- /* Reset and Write auto select command: read Manufacturer ID */
- addr[0x0000] = 0xf0f0f0f0;
- addr[0x0555] = 0xAAAAAAAA;
- addr[0x02AA] = 0x55555555;
- addr[0x0555] = 0x90909090;
- udelay (1000);
-
- vendor = addr[0];
- /*printf("vendor = %08lx\n", vendor); */
- if (vendor != 0x01010101) {
- info->size = 0;
- goto out;
- }
-
- devid = addr[1];
- /*printf("devid = %08lx\n", devid); */
-
- if ((devid & 0xff) == AMD_ID_F080B) {
- info->flash_id = (vendor & 0xff) << 16 | AMD_ID_F080B;
- /* we have 16 sectors with 64KB each x 4 */
- info->sector_count = 16;
- info->size = 4 * info->sector_count * 64*1024;
- } else if ((devid & 0xff) == AMD_ID_F016D){
- info->flash_id = (vendor & 0xff) << 16 | AMD_ID_F016D;
- /* we have 32 sectors with 64KB each x 4 */
- info->sector_count = 32;
- info->size = 4 * info->sector_count * 64*1024;
- } else {
- info->size = 0;
- goto out;
- }
- /*printf("sector count = %08x\n", info->sector_count); */
- /* check for protected sectors */
- for (i = 0; i < info->sector_count; i++) {
- /* sector base address */
- info->start[i] = base + i * (info->size / info->sector_count);
- /* read sector protection at sector address, (A7 .. A0) = 0x02 */
- /* D0 = 1 if protected */
- addr = (volatile unsigned long *)(info->start[i]);
- info->protect[i] = addr[2] & 1;
- }
-
- /* reset command */
- addr = (vu_long *)info->start[0];
-
- out:
- addr[0] = 0xf0f0f0f0;
-
- /*printf("size = %08x\n", info->size); */
- return info->size;
-}
-
-/*********************************************************************/
-/* NAME: flash_erase() - erases flash by sector */
-/* */
-/* DESCRIPTION: */
-/* This function erases flash sectors starting for s_first to */
-/* s_last. */
-/* */
-/* INPUTS: */
-/* flash_info_t *info - flash information structure */
-/* int s_first - first sector to erase */
-/* int s_last - last sector to erase */
-/* */
-/* OUTPUTS: */
-/* None */
-/* */
-/* RETURNS: */
-/* Returns 0 for success, 1 for failure. */
-/* */
-/* RESTRICTIONS/LIMITATIONS: */
-/* */
-/*********************************************************************/
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- vu_long *addr = (vu_long*)(info->start[0]);
- int flag, prot, sect, l_sect;
- ulong start, now, last;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- l_sect = -1;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[0x0555] = 0xAAAAAAAA;
- addr[0x02AA] = 0x55555555;
- addr[0x0555] = 0x80808080;
- addr[0x0555] = 0xAAAAAAAA;
- addr[0x02AA] = 0x55555555;
- udelay (100);
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr = (vu_long*)(info->start[sect]);
- addr[0] = 0x30303030;
- l_sect = sect;
- }
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- /*
- * We wait for the last triggered sector
- */
- if (l_sect < 0)
- goto DONE;
-
- start = get_timer (0);
- last = start;
- addr = (vu_long*)(info->start[l_sect]);
- while ((addr[0] & 0x80808080) != 0x80808080) {
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- return 1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- serial_putc ('.');
- last = now;
- }
- }
-
- DONE:
- /* reset to read mode */
- addr = (volatile unsigned long *)info->start[0];
- addr[0] = 0xF0F0F0F0; /* reset bank */
-
- printf (" done\n");
- return 0;
-}
-
-/*********************************************************************/
-/* NAME: write_buff() - writes a buffer to flash */
-/* */
-/* DESCRIPTION: */
-/* This function copies a buffer, *src, to flash. */
-/* */
-/* INPUTS: */
-/* flash_info_t *info - flash information structure */
-/* uchar *src - pointer to buffer to write to flash */
-/* ulong addr - address to start write at */
-/* ulong cnt - number of bytes to write to flash */
-/* */
-/* OUTPUTS: */
-/* None */
-/* */
-/* RETURNS: */
-/* 0 - OK */
-/* 1 - write timeout */
-/* 2 - Flash not erased */
-/* */
-/* RESTRICTIONS/LIMITATIONS: */
-/* */
-/*********************************************************************/
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int i, l, rc;
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i = 0, cp = wp; i < l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
- for (; (i < 4) && (cnt > 0); ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; (cnt == 0) && (i < 4); ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = 0;
- for (i = 0; i < 4; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i = 0, cp = wp; (i < 4) && (cnt > 0); ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; (i < 4); ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- return (write_word(info, wp, data));
-}
-
-/*********************************************************************/
-/* NAME: write_word() - writes a word to flash */
-/* */
-/* DESCRIPTION: */
-/* This writes a single word to flash. */
-/* */
-/* INPUTS: */
-/* flash_info_t *info - flash information structure */
-/* ulong dest - address to write */
-/* ulong data - data to write */
-/* */
-/* OUTPUTS: */
-/* None */
-/* */
-/* RETURNS: */
-/* 0 - OK */
-/* 1 - write timeout */
-/* 2 - Flash not erased */
-/* */
-/* RESTRICTIONS/LIMITATIONS: */
-/* */
-/*********************************************************************/
-static int write_word (flash_info_t *info, ulong dest, ulong data)
-{
- vu_long *addr = (vu_long*)(info->start[0]);
- ulong start;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*((vu_long *)dest) & data) != data) {
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[0x0555] = 0xAAAAAAAA;
- addr[0x02AA] = 0x55555555;
- addr[0x0555] = 0xA0A0A0A0;
-
- *((vu_long *)dest) = data;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* data polling for D7 */
- start = get_timer (0);
- while ((*((vu_long *)dest) & 0x80808080) != (data & 0x80808080)) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- return (1);
- }
- }
- return (0);
-}
-/*********************************************************************/
-/* End of flash.c */
-/*********************************************************************/
diff --git a/board/gw8260/gw8260.c b/board/gw8260/gw8260.c
deleted file mode 100644
index 2719a9585f..0000000000
--- a/board/gw8260/gw8260.c
+++ /dev/null
@@ -1,659 +0,0 @@
-/*
- * (C) Copyright 2000
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * (C) Copyright 2001
- * Advent Networks, Inc. <http://www.adventnetworks.com>
- * Jay Monkman <jtm@smoothsmoothie.com>
- *
- * (C) Copyright 2001
- * Advent Networks, Inc. <http://www.adventnetworks.com>
- * Oliver Brown <oliverb@alumni.utexas.net>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*********************************************************************/
-/* DESCRIPTION:
- * This file contains the board routines for the GW8260 board.
- *
- * MODULE DEPENDENCY:
- * None
- *
- * RESTRICTIONS/LIMITATIONS:
- * None
- *
- * Copyright (c) 2001, Advent Networks, Inc.
- */
-/*********************************************************************/
-
-#include <common.h>
-#include <ioports.h>
-#include <mpc8260.h>
-
-/*
- * I/O Port configuration table
- *
- */
-const iop_conf_t iop_conf_tab[4][32] = {
-
- /* Port A configuration */
- { /* conf ppar psor pdir podr pdat */
- /* PA31 */ { 1, 0, 0, 1, 0, 0 }, /* TP14 */
- /* PA30 */ { 1, 1, 1, 1, 0, 0 }, /* US_RTS */
- /* PA29 */ { 1, 0, 0, 1, 0, 1 }, /* LSSI_DATA */
- /* PA28 */ { 1, 0, 0, 1, 0, 1 }, /* LSSI_CLK */
- /* PA27 */ { 1, 0, 0, 1, 0, 0 }, /* TP12 */
- /* PA26 */ { 1, 0, 0, 0, 0, 0 }, /* IO_STATUS */
- /* PA25 */ { 1, 0, 0, 0, 0, 0 }, /* IO_CLOCK */
- /* PA24 */ { 1, 0, 0, 0, 0, 0 }, /* IO_CONFIG */
- /* PA23 */ { 1, 0, 0, 0, 0, 0 }, /* IO_DONE */
- /* PA22 */ { 1, 0, 0, 0, 0, 0 }, /* IO_DATA */
- /* PA21 */ { 1, 1, 0, 1, 0, 0 }, /* US_TXD3 */
- /* PA20 */ { 1, 1, 0, 1, 0, 0 }, /* US_TXD2 */
- /* PA19 */ { 1, 1, 0, 1, 0, 0 }, /* US_TXD1 */
- /* PA18 */ { 1, 1, 0, 1, 0, 0 }, /* US_TXD0 */
- /* PA17 */ { 1, 1, 0, 0, 0, 0 }, /* DS_RXD0 */
- /* PA16 */ { 1, 1, 0, 0, 0, 0 }, /* DS_RXD1 */
- /* PA15 */ { 1, 1, 0, 0, 0, 0 }, /* DS_RXD2 */
- /* PA14 */ { 1, 1, 0, 0, 0, 0 }, /* DS_RXD3 */
- /* PA13 */ { 1, 0, 0, 1, 0, 0 }, /* SPARE7 */
- /* PA12 */ { 1, 0, 0, 1, 0, 0 }, /* SPARE6 */
- /* PA11 */ { 1, 0, 0, 1, 0, 0 }, /* SPARE5 */
- /* PA10 */ { 1, 0, 0, 1, 0, 0 }, /* SPARE4 */
- /* PA9 */ { 1, 0, 0, 1, 0, 0 }, /* SPARE3 */
- /* PA8 */ { 1, 0, 0, 1, 0, 0 }, /* SPARE2 */
- /* PA7 */ { 1, 0, 0, 0, 0, 0 }, /* LSSI_IN */
- /* PA6 */ { 1, 0, 0, 1, 0, 0 }, /* SPARE0 */
- /* PA5 */ { 1, 0, 0, 1, 0, 0 }, /* DEMOD_RESET_ */
- /* PA4 */ { 1, 0, 0, 1, 0, 0 }, /* MOD_RESET_ */
- /* PA3 */ { 1, 0, 0, 1, 0, 0 }, /* IO_RESET */
- /* PA2 */ { 1, 0, 0, 1, 0, 0 }, /* TX_ENABLE */
- /* PA1 */ { 1, 0, 0, 0, 0, 0 }, /* RX_LOCK */
- /* PA0 */ { 1, 0, 0, 1, 0, 1 } /* MPC_RESET_ */
- },
-
- /* Port B configuration */
- { /* conf ppar psor pdir podr pdat */
- /* PB31 */ { 1, 1, 0, 1, 0, 0 }, /* FETH0_TX_ER */
- /* PB30 */ { 1, 1, 0, 0, 0, 0 }, /* FETH0_RX_DV */
- /* PB29 */ { 1, 1, 1, 1, 0, 0 }, /* FETH0_TX_EN */
- /* PB28 */ { 1, 1, 0, 0, 0, 0 }, /* FETH0_RX_ER */
- /* PB27 */ { 1, 1, 0, 0, 0, 0 }, /* FETH0_COL */
- /* PB26 */ { 1, 1, 0, 0, 0, 0 }, /* FETH0_CRS */
- /* PB25 */ { 1, 1, 0, 1, 0, 0 }, /* FETH0_TXD3 */
- /* PB24 */ { 1, 1, 0, 1, 0, 0 }, /* FETH0_TXD2 */
- /* PB23 */ { 1, 1, 0, 1, 0, 0 }, /* FETH0_TXD1 */
- /* PB22 */ { 1, 1, 0, 1, 0, 0 }, /* FETH0_TXD0 */
- /* PB21 */ { 1, 1, 0, 0, 0, 0 }, /* FETH0_RXD0 */
- /* PB20 */ { 1, 1, 0, 0, 0, 0 }, /* FETH0_RXD1 */
- /* PB19 */ { 1, 1, 0, 0, 0, 0 }, /* FETH0_RXD2 */
- /* PB18 */ { 1, 1, 0, 0, 0, 0 }, /* FETH0_RXD3 */
- /* PB17 */ { 1, 1, 0, 0, 0, 0 }, /* FETH1_RX_DV */
- /* PB16 */ { 1, 1, 0, 0, 0, 0 }, /* FETH1_RX_ER */
- /* PB15 */ { 1, 1, 0, 1, 0, 0 }, /* FETH1_TX_ER */
- /* PB14 */ { 1, 1, 0, 1, 0, 0 }, /* FETH1_TX_EN */
- /* PB13 */ { 1, 1, 0, 0, 0, 0 }, /* FETH1_COL */
- /* PB12 */ { 1, 1, 0, 0, 0, 0 }, /* FETH1_CRS */
- /* PB11 */ { 1, 1, 0, 0, 0, 0 }, /* FETH1_RXD3 */
- /* PB10 */ { 1, 1, 0, 0, 0, 0 }, /* FETH1_RXD2 */
- /* PB9 */ { 1, 1, 0, 0, 0, 0 }, /* FETH1_RXD1 */
- /* PB8 */ { 1, 1, 0, 0, 0, 0 }, /* FETH1_RXD0 */
- /* PB7 */ { 1, 1, 0, 1, 0, 0 }, /* FETH1_TXD0 */
- /* PB6 */ { 1, 1, 0, 1, 0, 0 }, /* FETH1_TXD1 */
- /* PB5 */ { 1, 1, 0, 1, 0, 0 }, /* FETH1_TXD2 */
- /* PB4 */ { 1, 1, 0, 1, 0, 0 }, /* FETH1_TXD3 */
- /* PB3 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PB2 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PB1 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PB0 */ { 0, 0, 0, 0, 0, 0 } /* pin doesn't exist */
- },
-
- /* Port C */
- { /* conf ppar psor pdir podr pdat */
- /* PC31 */ { 1, 0, 0, 1, 0, 1 }, /* FAST_RESET_ */
- /* PC30 */ { 1, 0, 0, 1, 0, 1 }, /* FAST_PAUSE_ */
- /* PC29 */ { 1, 0, 0, 1, 0, 0 }, /* FAST_SLEW1 */
- /* PC28 */ { 1, 0, 0, 1, 0, 0 }, /* FAST_SLEW0 */
- /* PC27 */ { 1, 0, 0, 1, 0, 0 }, /* TP13 */
- /* PC26 */ { 1, 0, 0, 0, 0, 0 }, /* RXDECDFLG */
- /* PC25 */ { 1, 0, 0, 0, 0, 0 }, /* RXACQFAIL */
- /* PC24 */ { 1, 0, 0, 0, 0, 0 }, /* RXACQFLG */
- /* PC23 */ { 1, 0, 0, 1, 0, 0 }, /* WD_TCL */
- /* PC22 */ { 1, 0, 0, 1, 0, 0 }, /* WD_EN */
- /* PC21 */ { 1, 0, 0, 1, 0, 0 }, /* US_TXCLK */
- /* PC20 */ { 1, 0, 0, 0, 0, 0 }, /* DS_RXCLK */
- /* PC19 */ { 1, 1, 0, 0, 0, 0 }, /* FETH0_RX_CLK */
- /* PC18 */ { 1, 1, 0, 0, 0, 0 }, /* FETH0_TX_CLK */
- /* PC17 */ { 1, 1, 0, 0, 0, 0 }, /* FETH1_RX_CLK */
- /* PC16 */ { 1, 1, 0, 0, 0, 0 }, /* FETH1_TX_CLK */
- /* PC15 */ { 1, 0, 0, 1, 0, 0 }, /* TX_SHUTDOWN_ */
- /* PC14 */ { 1, 0, 0, 0, 0, 0 }, /* RS_232_DTR_ */
- /* PC13 */ { 1, 0, 0, 0, 0, 0 }, /* TXERR */
- /* PC12 */ { 1, 0, 0, 1, 0, 1 }, /* FETH1_MDDIS */
- /* PC11 */ { 1, 0, 0, 1, 0, 1 }, /* FETH0_MDDIS */
- /* PC10 */ { 1, 0, 0, 1, 0, 0 }, /* MDC */
- /* PC9 */ { 1, 0, 0, 1, 1, 1 }, /* MDIO */
- /* PC8 */ { 1, 0, 0, 1, 1, 1 }, /* SER_NUM */
- /* PC7 */ { 1, 1, 0, 0, 0, 0 }, /* US_CTS */
- /* PC6 */ { 1, 1, 0, 0, 0, 0 }, /* DS_CD_ */
- /* PC5 */ { 1, 0, 0, 1, 0, 0 }, /* FETH1_PWRDWN */
- /* PC4 */ { 1, 0, 0, 1, 0, 0 }, /* FETH0_PWRDWN */
- /* PC3 */ { 1, 0, 0, 1, 0, 0 }, /* MPULED3 */
- /* PC2 */ { 1, 0, 0, 1, 0, 0 }, /* MPULED2 */
- /* PC1 */ { 1, 0, 0, 1, 0, 0 }, /* MPULED1 */
- /* PC0 */ { 1, 0, 0, 1, 0, 1 }, /* MPULED0 */
- },
-
- /* Port D */
- { /* conf ppar psor pdir podr pdat */
- /* PD31 */ { 1, 0, 0, 0, 0, 0 }, /* not used */
- /* PD30 */ { 1, 0, 0, 0, 0, 0 }, /* not used */
- /* PD29 */ { 1, 0, 0, 0, 0, 0 }, /* not used */
- /* PD28 */ { 1, 0, 0, 0, 0, 0 }, /* not used */
- /* PD27 */ { 1, 0, 0, 0, 0, 0 }, /* not used */
- /* PD26 */ { 1, 0, 0, 0, 0, 0 }, /* not used */
- /* PD25 */ { 1, 0, 0, 0, 0, 0 }, /* not used */
- /* PD24 */ { 1, 0, 0, 0, 0, 0 }, /* not used */
- /* PD23 */ { 1, 0, 0, 0, 0, 0 }, /* not used */
- /* PD22 */ { 1, 0, 0, 0, 0, 0 }, /* not used */
- /* PD21 */ { 1, 0, 0, 0, 0, 0 }, /* not used */
- /* PD20 */ { 1, 0, 0, 0, 0, 0 }, /* not used */
- /* PD19 */ { 1, 1, 1, 0, 0, 0 }, /* not used */
- /* PD18 */ { 1, 1, 1, 0, 0, 0 }, /* not used */
- /* PD17 */ { 1, 1, 1, 0, 0, 0 }, /* not used */
- /* PD16 */ { 1, 1, 1, 0, 0, 0 }, /* not used */
- /* PD15 */ { 1, 1, 1, 0, 1, 1 }, /* SDRAM_SDA */
- /* PD14 */ { 1, 1, 1, 0, 1, 1 }, /* SDRAM_SCL */
- /* PD13 */ { 1, 0, 0, 1, 0, 0 }, /* MPULED7 */
- /* PD12 */ { 1, 0, 0, 1, 0, 0 }, /* MPULED6 */
- /* PD11 */ { 1, 0, 0, 1, 0, 0 }, /* MPULED5 */
- /* PD10 */ { 1, 0, 0, 1, 0, 0 }, /* MPULED4 */
- /* PD9 */ { 1, 1, 0, 1, 0, 0 }, /* RS232_TXD */
- /* PD8 */ { 1, 1, 0, 0, 0, 0 }, /* RD232_RXD */
- /* PD7 */ { 1, 0, 0, 0, 0, 0 }, /* not used */
- /* PD6 */ { 1, 0, 0, 0, 0, 0 }, /* not used */
- /* PD5 */ { 1, 0, 0, 0, 0, 0 }, /* not used */
- /* PD4 */ { 1, 0, 0, 0, 0, 0 }, /* not used */
- /* PD3 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PD2 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PD1 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PD0 */ { 0, 0, 0, 0, 0, 0 } /* pin doesn't exist */
- }
-};
-
-/*********************************************************************/
-/* NAME: checkboard() - Displays the board type and serial number */
-/* */
-/* OUTPUTS: */
-/* Displays the board type and serial number */
-/* */
-/* RETURNS: */
-/* Always returns 1 */
-/* */
-/* RESTRICTIONS/LIMITATIONS: */
-/* */
-/* */
-/*********************************************************************/
-int checkboard (void)
-{
- char *str;
-
- puts ("Board: Advent Networks gw8260\n");
-
- str = getenv ("serial#");
- if (str != NULL) {
- printf ("SN: %s\n", str);
- }
- return 0;
-}
-
-
-#if defined (CFG_DRAM_TEST)
-/*********************************************************************/
-/* NAME: move64() - moves a double word (64-bit) */
-/* */
-/* DESCRIPTION: */
-/* this function performs a double word move from the data at */
-/* the source pointer to the location at the destination pointer. */
-/* */
-/* INPUTS: */
-/* unsigned long long *src - pointer to data to move */
-/* */
-/* OUTPUTS: */
-/* unsigned long long *dest - pointer to locate to move data */
-/* */
-/* RETURNS: */
-/* None */
-/* */
-/* RESTRICTIONS/LIMITATIONS: */
-/* May cloober fr0. */
-/* */
-/*********************************************************************/
-static void move64 (unsigned long long *src, unsigned long long *dest)
-{
- asm ("lfd 0, 0(3)\n\t" /* fpr0 = *scr */
- "stfd 0, 0(4)" /* *dest = fpr0 */
- : : : "fr0"); /* Clobbers fr0 */
- return;
-}
-
-
-#if defined (CFG_DRAM_TEST_DATA)
-
-unsigned long long pattern[] = {
- 0xaaaaaaaaaaaaaaaaULL,
- 0xccccccccccccccccULL,
- 0xf0f0f0f0f0f0f0f0ULL,
- 0xff00ff00ff00ff00ULL,
- 0xffff0000ffff0000ULL,
- 0xffffffff00000000ULL,
- 0x00000000ffffffffULL,
- 0x0000ffff0000ffffULL,
- 0x00ff00ff00ff00ffULL,
- 0x0f0f0f0f0f0f0f0fULL,
- 0x3333333333333333ULL,
- 0x5555555555555555ULL,
-};
-
-/*********************************************************************/
-/* NAME: mem_test_data() - test data lines for shorts and opens */
-/* */
-/* DESCRIPTION: */
-/* Tests data lines for shorts and opens by forcing adjacent data */
-/* to opposite states. Because the data lines could be routed in */
-/* an arbitrary manner the must ensure test patterns ensure that */
-/* every case is tested. By using the following series of binary */
-/* patterns every combination of adjacent bits is test regardless */
-/* of routing. */
-/* */
-/* ...101010101010101010101010 */
-/* ...110011001100110011001100 */
-/* ...111100001111000011110000 */
-/* ...111111110000000011111111 */
-/* */
-/* Carrying this out, gives us six hex patterns as follows: */
-/* */
-/* 0xaaaaaaaaaaaaaaaa */
-/* 0xcccccccccccccccc */
-/* 0xf0f0f0f0f0f0f0f0 */
-/* 0xff00ff00ff00ff00 */
-/* 0xffff0000ffff0000 */
-/* 0xffffffff00000000 */
-/* */
-/* The number test patterns will always be given by: */
-/* */
-/* log(base 2)(number data bits) = log2 (64) = 6 */
-/* */
-/* To test for short and opens to other signals on our boards. we */
-/* simply */
-/* test with the 1's complemnt of the paterns as well. */
-/* */
-/* OUTPUTS: */
-/* Displays failing test pattern */
-/* */
-/* RETURNS: */
-/* 0 - Passed test */
-/* 1 - Failed test */
-/* */
-/* RESTRICTIONS/LIMITATIONS: */
-/* Assumes only one one SDRAM bank */
-/* */
-/*********************************************************************/
-int mem_test_data (void)
-{
- unsigned long long *pmem = (unsigned long long *) CFG_SDRAM_BASE;
- unsigned long long temp64 = 0;
- int num_patterns = sizeof (pattern) / sizeof (pattern[0]);
- int i;
- unsigned int hi, lo;
-
- for (i = 0; i < num_patterns; i++) {
- move64 (&(pattern[i]), pmem);
- move64 (pmem, &temp64);
-
- /* hi = (temp64>>32) & 0xffffffff; */
- /* lo = temp64 & 0xffffffff; */
- /* printf("\ntemp64 = 0x%08x%08x", hi, lo); */
-
- hi = (pattern[i] >> 32) & 0xffffffff;
- lo = pattern[i] & 0xffffffff;
- /* printf("\npattern[%d] = 0x%08x%08x", i, hi, lo); */
-
- if (temp64 != pattern[i]) {
- printf ("\n Data Test Failed, pattern 0x%08x%08x",
- hi, lo);
- return 1;
- }
- }
-
- return 0;
-}
-#endif /* CFG_DRAM_TEST_DATA */
-
-#if defined (CFG_DRAM_TEST_ADDRESS)
-/*********************************************************************/
-/* NAME: mem_test_address() - test address lines */
-/* */
-/* DESCRIPTION: */
-/* This function performs a test to verify that each word im */
-/* memory is uniquly addressable. The test sequence is as follows: */
-/* */
-/* 1) write the address of each word to each word. */
-/* 2) verify that each location equals its address */
-/* */
-/* OUTPUTS: */
-/* Displays failing test pattern and address */
-/* */
-/* RETURNS: */
-/* 0 - Passed test */
-/* 1 - Failed test */
-/* */
-/* RESTRICTIONS/LIMITATIONS: */
-/* */
-/* */
-/*********************************************************************/
-int mem_test_address (void)
-{
- volatile unsigned int *pmem =
- (volatile unsigned int *) CFG_SDRAM_BASE;
- const unsigned int size = (CFG_SDRAM_SIZE * 1024 * 1024) / 4;
- unsigned int i;
-
- /* write address to each location */
- for (i = 0; i < size; i++) {
- pmem[i] = i;
- }
-
- /* verify each loaction */
- for (i = 0; i < size; i++) {
- if (pmem[i] != i) {
- printf ("\n Address Test Failed at 0x%x", i);
- return 1;
- }
- }
- return 0;
-}
-#endif /* CFG_DRAM_TEST_ADDRESS */
-
-#if defined (CFG_DRAM_TEST_WALK)
-/*********************************************************************/
-/* NAME: mem_march() - memory march */
-/* */
-/* DESCRIPTION: */
-/* Marches up through memory. At each location verifies rmask if */
-/* read = 1. At each location write wmask if write = 1. Displays */
-/* failing address and pattern. */
-/* */
-/* INPUTS: */
-/* volatile unsigned long long * base - start address of test */
-/* unsigned int size - number of dwords(64-bit) to test */
-/* unsigned long long rmask - read verify mask */
-/* unsigned long long wmask - wrtie verify mask */
-/* short read - verifies rmask if read = 1 */
-/* short write - writes wmask if write = 1 */
-/* */
-/* OUTPUTS: */
-/* Displays failing test pattern and address */
-/* */
-/* RETURNS: */
-/* 0 - Passed test */
-/* 1 - Failed test */
-/* */
-/* RESTRICTIONS/LIMITATIONS: */
-/* */
-/* */
-/*********************************************************************/
-int mem_march (volatile unsigned long long *base,
- unsigned int size,
- unsigned long long rmask,
- unsigned long long wmask, short read, short write)
-{
- unsigned int i;
- unsigned long long temp = 0;
- unsigned int hitemp, lotemp, himask, lomask;
-
- for (i = 0; i < size; i++) {
- if (read != 0) {
- /* temp = base[i]; */
- move64 ((unsigned long long *) &(base[i]), &temp);
- if (rmask != temp) {
- hitemp = (temp >> 32) & 0xffffffff;
- lotemp = temp & 0xffffffff;
- himask = (rmask >> 32) & 0xffffffff;
- lomask = rmask & 0xffffffff;
-
- printf ("\n Walking one's test failed: address = 0x%08x," "\n\texpected 0x%08x%08x, found 0x%08x%08x", i << 3, himask, lomask, hitemp, lotemp);
- return 1;
- }
- }
- if (write != 0) {
- /* base[i] = wmask; */
- move64 (&wmask, (unsigned long long *) &(base[i]));
- }
- }
- return 0;
-}
-#endif /* CFG_DRAM_TEST_WALK */
-
-/*********************************************************************/
-/* NAME: mem_test_walk() - a simple walking ones test */
-/* */
-/* DESCRIPTION: */
-/* Performs a walking ones through entire physical memory. The */
-/* test uses as series of memory marches, mem_march(), to verify */
-/* and write the test patterns to memory. The test sequence is as */
-/* follows: */
-/* 1) march writing 0000...0001 */
-/* 2) march verifying 0000...0001 , writing 0000...0010 */
-/* 3) repeat step 2 shifting masks left 1 bit each time unitl */
-/* the write mask equals 1000...0000 */
-/* 4) march verifying 1000...0000 */
-/* The test fails if any of the memory marches return a failure. */
-/* */
-/* OUTPUTS: */
-/* Displays which pass on the memory test is executing */
-/* */
-/* RETURNS: */
-/* 0 - Passed test */
-/* 1 - Failed test */
-/* */
-/* RESTRICTIONS/LIMITATIONS: */
-/* */
-/* */
-/*********************************************************************/
-int mem_test_walk (void)
-{
- unsigned long long mask;
- volatile unsigned long long *pmem =
- (volatile unsigned long long *) CFG_SDRAM_BASE;
- const unsigned long size = (CFG_SDRAM_SIZE * 1024 * 1024) / 8;
-
- unsigned int i;
-
- mask = 0x01;
-
- printf ("Initial Pass");
- mem_march (pmem, size, 0x0, 0x1, 0, 1);
-
- printf ("\b\b\b\b\b\b\b\b\b\b\b\b");
- printf (" ");
- printf ("\b\b\b\b\b\b\b\b\b\b\b\b");
-
- for (i = 0; i < 63; i++) {
- printf ("Pass %2d", i + 2);
- if (mem_march (pmem, size, mask, mask << 1, 1, 1) != 0) {
- /*printf("mask: 0x%x, pass: %d, ", mask, i); */
- return 1;
- }
- mask = mask << 1;
- printf ("\b\b\b\b\b\b\b");
- }
-
- printf ("Last Pass");
- if (mem_march (pmem, size, 0, mask, 0, 1) != 0) {
- /* printf("mask: 0x%x", mask); */
- return 1;
- }
- printf ("\b\b\b\b\b\b\b\b\b");
- printf (" ");
- printf ("\b\b\b\b\b\b\b\b\b");
-
- return 0;
-}
-
-/*********************************************************************/
-/* NAME: testdram() - calls any enabled memory tests */
-/* */
-/* DESCRIPTION: */
-/* Runs memory tests if the environment test variables are set to */
-/* 'y'. */
-/* */
-/* INPUTS: */
-/* testdramdata - If set to 'y', data test is run. */
-/* testdramaddress - If set to 'y', address test is run. */
-/* testdramwalk - If set to 'y', walking ones test is run */
-/* */
-/* OUTPUTS: */
-/* None */
-/* */
-/* RETURNS: */
-/* 0 - Passed test */
-/* 1 - Failed test */
-/* */
-/* RESTRICTIONS/LIMITATIONS: */
-/* */
-/* */
-/*********************************************************************/
-int testdram (void)
-{
- char *s;
- int rundata, runaddress, runwalk;
-
- s = getenv ("testdramdata");
- rundata = (s && (*s == 'y')) ? 1 : 0;
- s = getenv ("testdramaddress");
- runaddress = (s && (*s == 'y')) ? 1 : 0;
- s = getenv ("testdramwalk");
- runwalk = (s && (*s == 'y')) ? 1 : 0;
-
- if ((rundata == 1) || (runaddress == 1) || (runwalk == 1)) {
- printf ("Testing RAM ... ");
- }
-#ifdef CFG_DRAM_TEST_DATA
- if (rundata == 1) {
- if (mem_test_data () == 1) {
- return 1;
- }
- }
-#endif
-#ifdef CFG_DRAM_TEST_ADDRESS
- if (runaddress == 1) {
- if (mem_test_address () == 1) {
- return 1;
- }
- }
-#endif
-#ifdef CFG_DRAM_TEST_WALK
- if (runwalk == 1) {
- if (mem_test_walk () == 1) {
- return 1;
- }
- }
-#endif
- if ((rundata == 1) || (runaddress == 1) || (runwalk == 1)) {
- printf ("passed");
- }
- return 0;
-
-}
-#endif /* CFG_DRAM_TEST */
-
-/*********************************************************************/
-/* NAME: initdram() - initializes SDRAM controller */
-/* */
-/* DESCRIPTION: */
-/* Initializes the MPC8260's SDRAM controller. */
-/* */
-/* INPUTS: */
-/* CFG_IMMR - MPC8260 Internal memory map */
-/* CFG_SDRAM_BASE - Physical start address of SDRAM */
-/* CFG_PSDMR - SDRAM mode register */
-/* CFG_MPTPR - Memory refresh timer prescaler register */
-/* CFG_SDRAM0_SIZE - SDRAM size */
-/* */
-/* RETURNS: */
-/* SDRAM size in bytes */
-/* */
-/* RESTRICTIONS/LIMITATIONS: */
-/* */
-/* */
-/*********************************************************************/
-long int initdram (int board_type)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8260_t *memctl = &immap->im_memctl;
- volatile uchar c = 0, *ramaddr = (uchar *) (CFG_SDRAM_BASE + 0x8);
- ulong psdmr = CFG_PSDMR;
- int i;
-
- /*
- * Quote from 8260 UM (10.4.2 SDRAM Power-On Initialization, 10-35):
- *
- * "At system reset, initialization software must set up the
- * programmable parameters in the memory controller banks registers
- * (ORx, BRx, P/LSDMR). After all memory parameters are configured,
- * system software should execute the following initialization sequence
- * for each SDRAM device.
- *
- * 1. Issue a PRECHARGE-ALL-BANKS command
- * 2. Issue eight CBR REFRESH commands
- * 3. Issue a MODE-SET command to initialize the mode register
- *
- * The initial commands are executed by setting P/LSDMR[OP] and
- * accessing the SDRAM with a single-byte transaction."
- *
- * The appropriate BRx/ORx registers have already been set when we
- * get here. The SDRAM can be accessed at the address CFG_SDRAM_BASE.
- */
-
- memctl->memc_psrt = CFG_PSRT;
- memctl->memc_mptpr = CFG_MPTPR;
-
- memctl->memc_psdmr = psdmr | PSDMR_OP_PREA;
- *ramaddr = c;
-
- memctl->memc_psdmr = psdmr | PSDMR_OP_CBRR;
- for (i = 0; i < 8; i++) {
- *ramaddr = c;
- }
- memctl->memc_psdmr = psdmr | PSDMR_OP_MRW;
- *ramaddr = c;
-
- memctl->memc_psdmr = psdmr | PSDMR_OP_NORM | PSDMR_RFEN;
- *ramaddr = c;
-
- /* return total ram size */
- return (CFG_SDRAM0_SIZE * 1024 * 1024);
-}
-
-/*********************************************************************/
-/* End of gw8260.c */
-/*********************************************************************/
diff --git a/board/gw8260/u-boot.lds b/board/gw8260/u-boot.lds
deleted file mode 100644
index ab65cb11fc..0000000000
--- a/board/gw8260/u-boot.lds
+++ /dev/null
@@ -1,125 +0,0 @@
-/*
- * (C) Copyright 2000, 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc8260/start.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/hermes/Makefile b/board/hermes/Makefile
deleted file mode 100644
index 13ce9fc9d2..0000000000
--- a/board/hermes/Makefile
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/hermes/config.mk b/board/hermes/config.mk
deleted file mode 100644
index 008165fa67..0000000000
--- a/board/hermes/config.mk
+++ /dev/null
@@ -1,28 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# Multidata HERMES-PRO ISDN Routers
-#
-
-TEXT_BASE = 0xFE000000
diff --git a/board/hermes/flash.c b/board/hermes/flash.c
deleted file mode 100644
index 799fe83f3e..0000000000
--- a/board/hermes/flash.c
+++ /dev/null
@@ -1,460 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (vu_long *addr, flash_info_t *info);
-static int write_byte (flash_info_t *info, ulong dest, uchar data);
-static void flash_get_offsets (ulong base, flash_info_t *info);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- unsigned long size;
- int i;
-
- /* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* Static FLASH Bank configuration here - FIXME XXX */
-
- size = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size, size<<20);
- }
-
- /* Remap FLASH according to real size */
- memctl->memc_or0 = CFG_OR_TIMING_FLASH | (-size & 0xFFFF8000);
- memctl->memc_br0 = (CFG_FLASH_BASE & BR_BA_MSK) |
- (memctl->memc_br0 & ~(BR_BA_MSK));
-
- /* Re-do sizing to get full correct info */
- size = flash_get_size((vu_long *)CFG_FLASH_BASE, &flash_info[0]);
-
- flash_get_offsets (CFG_FLASH_BASE, &flash_info[0]);
-
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
- /* monitor protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+monitor_flash_len-1,
- &flash_info[0]);
-#endif
-
- flash_info[0].size = size;
-
- return (size);
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_get_offsets (ulong base, flash_info_t *info)
-{
- int i;
-
- /* set up sector start address table */
- if (info->flash_id & FLASH_BTYPE) {
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00004000;
- info->start[2] = base + 0x00006000;
- info->start[3] = base + 0x00008000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00010000) - 0x00030000;
- }
- } else {
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- info->start[i--] = base + info->size - 0x00004000;
- info->start[i--] = base + info->size - 0x00006000;
- info->start[i--] = base + info->size - 0x00008000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00010000;
- }
- }
-
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD: printf ("AMD "); break;
- case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
- default: printf ("Unknown Vendor "); break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM400B: printf ("AM29LV400B (4 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM400T: printf ("AM29LV400T (4 Mbit, top boot sector)\n");
- break;
- case FLASH_AM800B: printf ("AM29LV800B (8 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM800T: printf ("AM29LV800T (8 Mbit, top boot sector)\n");
- break;
- case FLASH_AM160B: printf ("AM29LV160B (16 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM160T: printf ("AM29LV160T (16 Mbit, top boot sector)\n");
- break;
- case FLASH_AM320B: printf ("AM29LV320B (32 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM320T: printf ("AM29LV320T (32 Mbit, top boot sector)\n");
- break;
- default: printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " "
- );
- }
- printf ("\n");
- return;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-
-static ulong flash_get_size (vu_long *addr, flash_info_t *info)
-{
- short i;
- uchar value;
- vu_char *caddr = (vu_char *)addr;
- ulong base = (ulong)addr;
-
-
- /* Write auto select command: read Manufacturer ID */
- caddr[0x0AAA] = 0xAA;
- caddr[0x0555] = 0x55;
- caddr[0x0AAA] = 0x90;
-
- value = caddr[0];
- switch (value) {
- case (AMD_MANUFACT & 0xFF):
- info->flash_id = FLASH_MAN_AMD;
- break;
- case (FUJ_MANUFACT & 0xFF):
- info->flash_id = FLASH_MAN_FUJ;
- break;
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- return (0); /* no or unknown flash */
- }
-
- value = caddr[2]; /* device ID */
-
- switch (value) {
- case (AMD_ID_LV400T & 0xFF):
- info->flash_id += FLASH_AM400T;
- info->sector_count = 11;
- info->size = 0x00080000;
- break; /* => 512 kB */
-
- case (AMD_ID_LV400B & 0xFF):
- info->flash_id += FLASH_AM400B;
- info->sector_count = 11;
- info->size = 0x00080000;
- break; /* => 512 kB */
-
- case (AMD_ID_LV800T & 0xFF):
- info->flash_id += FLASH_AM800T;
- info->sector_count = 19;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case (AMD_ID_LV800B & 0xFF):
- info->flash_id += FLASH_AM800B;
- info->sector_count = 19;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case (AMD_ID_LV160T & 0xFF):
- info->flash_id += FLASH_AM160T;
- info->sector_count = 35;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case (AMD_ID_LV160B & 0xFF):
- info->flash_id += FLASH_AM160B;
- info->sector_count = 35;
- info->size = 0x00200000;
- break; /* => 2 MB */
-#if 0 /* enable when device IDs are available */
- case (AMD_ID_LV320T & 0xFF):
- info->flash_id += FLASH_AM320T;
- info->sector_count = 67;
- info->size = 0x00400000;
- break; /* => 4 MB */
-
- case (AMD_ID_LV320B & 0xFF):
- info->flash_id += FLASH_AM320B;
- info->sector_count = 67;
- info->size = 0x00400000;
- break; /* => 4 MB */
-#endif
- default:
- info->flash_id = FLASH_UNKNOWN;
- return (0); /* => no or unknown flash */
-
- }
-
- /* set up sector start address table */
- if (info->flash_id & FLASH_BTYPE) {
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00004000;
- info->start[2] = base + 0x00006000;
- info->start[3] = base + 0x00008000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00010000) - 0x00030000;
- }
- } else {
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- info->start[i--] = base + info->size - 0x00004000;
- info->start[i--] = base + info->size - 0x00006000;
- info->start[i--] = base + info->size - 0x00008000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00010000;
- }
- }
-
- /* check for protected sectors */
- for (i = 0; i < info->sector_count; i++) {
- /* read sector protection: D0 = 1 if protected */
- caddr = (volatile unsigned char *)(info->start[i]);
- info->protect[i] = caddr[4] & 1;
- }
-
- /*
- * Prevent writes to uninitialized FLASH.
- */
- if (info->flash_id != FLASH_UNKNOWN) {
- caddr = (vu_char *)info->start[0];
-
- *caddr = 0xF0; /* reset bank */
- }
-
- return (info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- vu_char *addr = (vu_char*)(info->start[0]);
- int flag, prot, sect, l_sect;
- ulong start, now, last;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- if ((info->flash_id == FLASH_UNKNOWN) ||
- (info->flash_id > FLASH_AMD_COMP)) {
- printf ("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- l_sect = -1;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[0x0AAA] = 0xAA;
- addr[0x0555] = 0x55;
- addr[0x0AAA] = 0x80;
- addr[0x0AAA] = 0xAA;
- addr[0x0555] = 0x55;
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr = (vu_char*)(info->start[sect]);
- addr[0] = 0x30;
- l_sect = sect;
- }
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- /*
- * We wait for the last triggered sector
- */
- if (l_sect < 0)
- goto DONE;
-
- start = get_timer (0);
- last = start;
- addr = (vu_char*)(info->start[l_sect]);
- while ((addr[0] & 0x80) != 0x80) {
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- return 1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- }
-
-DONE:
- /* reset to read mode */
- addr = (vu_char *)info->start[0];
- addr[0] = 0xF0; /* reset bank */
-
- printf (" done\n");
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- int rc;
-
- while (cnt > 0) {
- if ((rc = write_byte(info, addr++, *src++)) != 0) {
- return (rc);
- }
- --cnt;
- }
-
- return (0);
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_byte (flash_info_t *info, ulong dest, uchar data)
-{
- vu_char *addr = (vu_char*)(info->start[0]);
- ulong start;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*((vu_char *)dest) & data) != data) {
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[0x0AAA] = 0xAA;
- addr[0x0555] = 0x55;
- addr[0x0AAA] = 0xA0;
-
- *((vu_char *)dest) = data;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* data polling for D7 */
- start = get_timer (0);
- while ((*((vu_char *)dest) & 0x80) != (data & 0x80)) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- return (1);
- }
- }
- return (0);
-}
-
-/*-----------------------------------------------------------------------
- */
diff --git a/board/hermes/hermes.c b/board/hermes/hermes.c
deleted file mode 100644
index e95d9ee332..0000000000
--- a/board/hermes/hermes.c
+++ /dev/null
@@ -1,605 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <commproc.h>
-#include <mpc8xx.h>
-
-#ifdef CONFIG_SHOW_BOOT_PROGRESS
-# include <status_led.h>
-# define SHOW_BOOT_PROGRESS(arg) show_boot_progress(arg)
-#else
-# define SHOW_BOOT_PROGRESS(arg)
-#endif
-
-/* ------------------------------------------------------------------------- */
-
-static long int dram_size (long int, long int *, long int);
-static ulong board_init (void);
-static void send_smi_frame (volatile scc_t * sp, volatile cbd_t * bd,
- uchar * msg);
-
-/* ------------------------------------------------------------------------- */
-
-#define _NOT_USED_ 0xFFFFFFFF
-
-const uint sdram_table[] = {
- /*
- * Single Read. (Offset 0 in UPMA RAM)
- */
- 0x1f07fc04, 0xeeaefc04, 0x11adfc04, 0xefbbbc00,
- 0x1ff77c47, /* last */
- /*
- * SDRAM Initialization (offset 5 in UPMA RAM)
- *
- * This is no UPM entry point. The following definition uses
- * the remaining space to establish an initialization
- * sequence, which is executed by a RUN command.
- *
- */
- 0x1fe77c35, 0xffaffc34, 0x1fa57c35, /* last */
- /*
- * Burst Read. (Offset 8 in UPMA RAM)
- */
- 0x1f07fc04, 0xeeaefc04, 0x10adfc04, 0xf0affc00,
- 0xf0affc00, 0xf1affc00, 0xefbbbc00, 0x1ff77c47, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Single Write. (Offset 18 in UPMA RAM)
- */
- 0x1f27fc04, 0xeeaebc00, 0x01b93c04, 0x1ff77c47, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Burst Write. (Offset 20 in UPMA RAM)
- */
- 0x1f07fc04, 0xeeaebc00, 0x10ad4c00, 0xf0afcc00,
- 0xf0afcc00, 0xe1bb8c06, 0x1ff77c47, /* last */
- _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Refresh (Offset 30 in UPMA RAM)
- */
- 0x1ff5fc84, 0xfffffc04, 0xfffffc04, 0xfffffc04,
- 0xfffffc84, 0xfffffc07, /* last */
- _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Exception. (Offset 3c in UPMA RAM)
- */
- 0x7ffffc07, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_,
-};
-
-/* ------------------------------------------------------------------------- */
-
-
-/*
- * Check Board Identity:
- *
- * Test ID string (HERMES...)
- *
- * Return code for board revision and network speed
- */
-
-int checkboard (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- char *s = getenv ("serial#");
- char *e;
-
- puts ("Board: ");
-
- if (!s || strncmp (s, "HERMES", 6)) {
- puts ("### No HW ID - assuming HERMES-PRO");
- } else {
- for (e = s; *e; ++e) {
- if (*e == ' ')
- break;
- }
-
- for (; s < e; ++s) {
- putc (*s);
- }
- }
-
- gd->board_type = board_init ();
-
- printf (" Rev. %ld.x\n", (gd->board_type >> 16));
-
- return (0);
-}
-
-/* ------------------------------------------------------------------------- */
-
-long int initdram (int board_type)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- long int size, size8, size9;
-
- upmconfig (UPMA, (uint *) sdram_table,
- sizeof (sdram_table) / sizeof (uint));
-
- /*
- * Preliminary prescaler for refresh
- */
- memctl->memc_mptpr = 0x0400;
-
- memctl->memc_mar = 0x00000088;
-
- /*
- * Map controller banks 1 to the SDRAM banks at preliminary address
- */
- memctl->memc_or1 = CFG_OR1_PRELIM;
- memctl->memc_br1 = CFG_BR1_PRELIM;
-
- /* HERMES-PRO boards have only one bank SDRAM */
-
-
- udelay (200);
-
- /* perform SDRAM initializsation sequence */
-
- memctl->memc_mamr = 0xD0802114;
- memctl->memc_mcr = 0x80002105;
- udelay (1);
- memctl->memc_mamr = 0xD0802118;
- memctl->memc_mcr = 0x80002130;
- udelay (1);
- memctl->memc_mamr = 0xD0802114;
- memctl->memc_mcr = 0x80002106;
-
- udelay (1000);
-
- /*
- * Check Bank 0 Memory Size for re-configuration
- *
- * try 8 column mode
- */
- size8 = dram_size (CFG_MAMR_8COL, (long *) SDRAM_BASE_PRELIM,
- SDRAM_MAX_SIZE);
-
- udelay (1000);
-
- /*
- * try 9 column mode
- */
- size9 = dram_size (CFG_MAMR_9COL, (long *) SDRAM_BASE_PRELIM,
- SDRAM_MAX_SIZE);
-
- if (size8 < size9) { /* leave configuration at 9 columns */
- size = size9;
-/* debug ("SDRAM Bank 0 in 9 column mode: %ld MB\n", size >> 20); */
- } else { /* back to 8 columns */
- size = size8;
- memctl->memc_mamr = CFG_MAMR_8COL;
- udelay (500);
-/* debug ("SDRAM Bank 0 in 8 column mode: %ld MB\n", size >> 20); */
- }
-
- udelay (1000);
-
- memctl->memc_or1 = ((-size) & 0xFFFF0000) | SDRAM_TIMING;
- memctl->memc_br1 = (CFG_SDRAM_BASE & BR_BA_MSK) | BR_MS_UPMA | BR_V;
-
- udelay (10000);
-
- return (size);
-}
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Check memory range for valid RAM. A simple memory test determines
- * the actually available RAM size between addresses `base' and
- * `base + maxsize'. Some (not all) hardware errors are detected:
- * - short between address lines
- * - short between data lines
- */
-
-static long int dram_size (long int mamr_value, long int *base,
- long int maxsize)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
-
- memctl->memc_mamr = mamr_value;
-
- return (get_ram_size(base, maxsize));
-}
-
-/* ------------------------------------------------------------------------- */
-
-#define PB_LED_3 0x00020000 /* Status LED's */
-#define PB_LED_2 0x00010000
-#define PB_LED_1 0x00008000
-#define PB_LED_0 0x00004000
-
-#define PB_LED_ALL (PB_LED_0 | PB_LED_1 | PB_LED_2 | PB_LED_3)
-
-#define PC_REP_SPD1 0x00000800
-#define PC_REP_SPD0 0x00000400
-
-#define PB_RESET_2081 0x00000020 /* Reset PEB2081 */
-
-#define PB_MAI_4 0x00000010 /* Configuration */
-#define PB_MAI_3 0x00000008
-#define PB_MAI_2 0x00000004
-#define PB_MAI_1 0x00000002
-#define PB_MAI_0 0x00000001
-
-#define PB_MAI_ALL (PB_MAI_0 | PB_MAI_1 | PB_MAI_2 | PB_MAI_3 | PB_MAI_4)
-
-
-#define PC_REP_MGRPRS 0x0200
-#define PC_REP_SPD 0x0040 /* Select 100 Mbps */
-#define PC_REP_RES 0x0004
-#define PC_BIT14 0x0002 /* ??? */
-#define PC_BIT15 0x0001 /* ??? ENDSL ?? */
-
-/* ------------------------------------------------------------------------- */
-
-static ulong board_init (void)
-{
- volatile immap_t *immr = (immap_t *) CFG_IMMR;
- ulong reg, revision, speed = 100;
- int ethspeed;
- char *s;
-
- if ((s = getenv ("ethspeed")) != NULL) {
- if (strcmp (s, "100") == 0) {
- ethspeed = 100;
- } else if (strcmp (s, "10") == 0) {
- ethspeed = 10;
- } else {
- ethspeed = 0;
- }
- } else {
- ethspeed = 0;
- }
-
- /* Configure Port B Output Pins => 0x0003cc3F */
- reg = PB_LED_ALL | PC_REP_SPD1 | PC_REP_SPD0 | PB_RESET_2081 |
- PB_MAI_ALL;
- immr->im_cpm.cp_pbpar &= ~reg;
- immr->im_cpm.cp_pbodr &= ~reg;
- immr->im_cpm.cp_pbdat &= ~reg; /* all 0 */
- immr->im_cpm.cp_pbdir |= reg;
-
- /* Check hardware revision */
- if ((immr->im_ioport.iop_pcdat & 0x0003) == 0x0003) {
- /*
- * Revision 3.x hardware
- */
- revision = 3;
-
- immr->im_ioport.iop_pcdat = 0x0240;
- immr->im_ioport.iop_pcdir = (PC_REP_MGRPRS | PC_REP_SPD | PC_REP_RES | PC_BIT14); /* = 0x0246 */
- immr->im_ioport.iop_pcdat |= PC_REP_RES;
- } else {
- immr->im_ioport.iop_pcdat = 0x0002;
- immr->im_ioport.iop_pcdir = (PC_REP_MGRPRS | PC_REP_RES | PC_BIT14 | PC_BIT15); /* = 0x0207 */
-
- if ((immr->im_ioport.iop_pcdat & PC_REP_SPD) == 0) {
- /*
- * Revision 2.x hardware: PC9 connected to PB21
- */
- revision = 2;
-
- if (ethspeed == 0) {
- /* both 10 and 100 Mbps allowed:
- * select 10 Mbps and autonegotiation
- */
- puts (" [10+100]");
- immr->im_cpm.cp_pbdat = 0; /* SPD1:SPD0 = 0:0 - autonegot. */
- speed = 10;
- } else if (ethspeed == 10) {
- /* we are asked for 10 Mbps,
- * so select 10 Mbps
- */
- puts (" [10]");
- immr->im_cpm.cp_pbdat = 0; /* ??? */
- speed = 10;
- } else {
- /* anything else:
- * select 100 Mbps
- */
- puts (" [100]");
- immr->im_cpm.cp_pbdat = PC_REP_SPD0 | PC_REP_SPD1;
- /* SPD1:SPD0 = 1:1 - 100 Mbps */
- speed = 100;
- }
- immr->im_ioport.iop_pcdat |= (PC_REP_RES | PC_BIT14);
-
- /* must be run from RAM */
- /* start_lxt980 (speed); */
- /*************************/
- } else {
- /*
- * Revision 1.x hardware
- */
- revision = 1;
-
- immr->im_ioport.iop_pcdat = PC_REP_MGRPRS | PC_BIT14; /* = 0x0202 */
- immr->im_ioport.iop_pcdir = (PC_REP_MGRPRS | PC_REP_SPD | PC_REP_RES | PC_BIT14 | PC_BIT15); /* = 0x0247 */
-
- if (ethspeed == 0) {
- /* both 10 and 100 Mbps allowed:
- * select 100 Mbps and autonegotiation
- */
- puts (" [10+100]");
- immr->im_cpm.cp_pbdat = 0; /* SPD1:SPD0 = 0:0 - autonegot. */
- immr->im_ioport.iop_pcdat |= PC_REP_SPD;
- } else if (ethspeed == 10) {
- /* we are asked for 10 Mbps,
- * so select 10 Mbps
- */
- puts (" [10]");
- immr->im_cpm.cp_pbdat = PC_REP_SPD0; /* SPD1:SPD0 = 0:1 - 10 Mbps */
- } else {
- /* anything else:
- * select 100 Mbps
- */
- puts (" [100]");
- immr->im_cpm.cp_pbdat = PC_REP_SPD0 | PC_REP_SPD1;
- /* SPD1:SPD0 = 1:1 - 100 Mbps */
- immr->im_ioport.iop_pcdat |= PC_REP_SPD;
- }
-
- immr->im_ioport.iop_pcdat |= PC_REP_RES;
- }
- }
- SHOW_BOOT_PROGRESS (0x00);
-
- return ((revision << 16) | (speed & 0xFFFF));
-}
-
-/* ------------------------------------------------------------------------- */
-
-#define SCC_SM 1 /* Index => SCC2 */
-#define PROFF PROFF_SCC2
-
-#define SMI_MSGLEN 8 /* Length of SMI Messages */
-
-#define PHYGPCR_ADDR 0x109 /* Port Enable */
-#define PHYPCR_ADDR 0x132 /* PHY Port Control Reg. (port 1) */
-#define LEDPCR_ADDR 0x141 /* LED Port Control Reg. */
-#define RPRESET_ADDR 0x144 /* Repeater Reset */
-
-#define PHYPCR_SPEED 0x2000 /* on for 100 Mbps, off for 10 Mbps */
-#define PHYPCR_AN 0x1000 /* on to enable Auto-Negotiation */
-#define PHYPCR_REST_AN 0x0200 /* on to restart Auto-Negotiation */
-#define PHYPCR_FDX 0x0100 /* on for Full Duplex, off for HDX */
-#define PHYPCR_COLT 0x0080 /* on to enable COL signal test */
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Must run from RAM:
- * uses parameter RAM area which is used for stack while running from ROM
- */
-void hermes_start_lxt980 (int speed)
-{
- volatile immap_t *immr = (immap_t *) CFG_IMMR;
- volatile cpm8xx_t *cp = (cpm8xx_t *) & (immr->im_cpm);
- volatile scc_t *sp = (scc_t *) & (cp->cp_scc[SCC_SM]);
- volatile cbd_t *bd;
- volatile hdlc_pram_t *hp;
- uchar smimsg[SMI_MSGLEN];
- ushort phypcrval;
- uint bd_off;
- int pnr;
-
- printf ("LXT9880: %3d Mbps\n", speed);
-
- immr->im_ioport.iop_paodr |= 0x0008; /* init PAODR: PA12 (TXD2) open drain */
- immr->im_ioport.iop_papar |= 0x400c; /* init PAPAR: TXD2, RXD2, BRGO4 */
- immr->im_ioport.iop_padir &= 0xbff3; /* init PADIR: BRGO4 */
- immr->im_ioport.iop_padir |= 0x4000;
-
- /* get temporary BD; no need for permanent alloc */
- bd_off = dpram_base_align (8);
-
- bd = (cbd_t *) (immr->im_cpm.cp_dpmem + bd_off);
-
- bd->cbd_bufaddr = 0;
- bd->cbd_datlen = 0;
- bd->cbd_sc = BD_SC_WRAP | BD_SC_LAST | BD_SC_INTRPT | BD_SC_TC;
-
- /* init. baudrate generator BRG4 */
- cp->cp_brgc4 = (0x00010000 | (50 << 1)); /* output 1 MHz */
-
- cp->cp_sicr &= 0xFFFF00FF; /* SICR: mask SCC2 */
- cp->cp_sicr |= 0x00001B00; /* SICR: SCC2 clk BRG4 */
-
- /* init SCC_SM register */
- sp->scc_psmr = 0x0000; /* init PSMR: no additional flags */
- sp->scc_todr = 0x0000;
- sp->scc_dsr = 0x7e7e;
-
- /* init. SCC_SM parameter area */
- hp = (hdlc_pram_t *) & cp->cp_dparam[PROFF];
-
- hp->tbase = bd_off; /* offset from beginning of DPRAM */
-
- hp->rfcr = 0x18;
- hp->tfcr = 0x18;
- hp->mrblr = 10;
-
- hp->c_mask = 0x0000f0b8;
- hp->c_pres = 0x0000ffff;
-
- hp->disfc = 0;
- hp->crcec = 0;
- hp->abtsc = 0;
- hp->nmarc = 0;
- hp->retrc = 0;
-
- hp->mflr = 10;
-
- hp->rfthr = 1;
-
- hp->hmask = 0;
- hp->haddr1 = 0;
- hp->haddr2 = 0;
- hp->haddr3 = 0;
- hp->haddr4 = 0;
-
- cp->cp_cpcr = SCC_SM << 6 | 0x0001; /* SCC_SM: init TX/RX params */
- while (cp->cp_cpcr & CPM_CR_FLG);
-
- /* clear all outstanding SCC events */
- sp->scc_scce = ~0;
-
- /* enable transmitter: GSMR_L: TPL=2(16bits), TPP=3(all ones), ENT */
- sp->scc_gsmrh = 0;
- sp->scc_gsmrl |= SCC_GSMRL_TPL_16 | SCC_GSMRL_TPP_ALL1 |
- SCC_GSMRL_ENT | SCC_GSMRL_MODE_HDLC;
-
-#if 0
- smimsg[0] = 0x00; /* CHIP/HUB ID */
- smimsg[1] = 0x38; /* WRITE CMD */
- smimsg[2] = (RPRESET_ADDR << 4) & 0xf0;
- smimsg[3] = RPRESET_ADDR >> 4;
- smimsg[4] = 0x01;
- smimsg[5] = 0x00;
- smimsg[6] = 0x00;
- smimsg[7] = 0x00;
-
- send_smi_frame (sp, bd, smimsg);
-#endif
-
- smimsg[0] = 0x7f; /* BROADCAST */
- smimsg[1] = 0x34; /* ASSIGN HUB ID */
- smimsg[2] = 0x00;
- smimsg[3] = 0x00;
- smimsg[4] = 0x00; /* HUB ID = 0 */
- smimsg[5] = 0x00;
- smimsg[6] = 0x00;
- smimsg[7] = 0x00;
-
- send_smi_frame (sp, bd, smimsg);
-
- smimsg[0] = 0x7f; /* BROADCAST */
- smimsg[1] = 0x3c; /* SET ARBOUT TO 0 */
- smimsg[2] = 0x00; /* ADDRESS = 0 */
- smimsg[3] = 0x00;
- smimsg[4] = 0x00; /* DATA = 0 */
- smimsg[5] = 0x00;
- smimsg[6] = 0x00;
- smimsg[7] = 0x00;
-
- send_smi_frame (sp, bd, smimsg);
-
- if (speed == 100) {
- phypcrval = PHYPCR_SPEED; /* 100 MBIT, disable autoneg. */
- } else {
- phypcrval = 0; /* 10 MBIT, disable autoneg. */
- }
-
- /* send MSGs */
- for (pnr = 0; pnr < 8; pnr++) {
- smimsg[0] = 0x00; /* CHIP/HUB ID */
- smimsg[1] = 0x38; /* WRITE CMD */
- smimsg[2] = ((PHYPCR_ADDR + pnr) << 4) & 0xf0;
- smimsg[3] = (PHYPCR_ADDR + pnr) >> 4;
- smimsg[4] = (unsigned char) (phypcrval & 0xff);
- smimsg[5] = (unsigned char) (phypcrval >> 8);
- smimsg[6] = 0x00;
- smimsg[7] = 0x00;
-
- send_smi_frame (sp, bd, smimsg);
- }
-
- smimsg[0] = 0x00; /* CHIP/HUB ID */
- smimsg[1] = 0x38; /* WRITE CMD */
- smimsg[2] = (PHYGPCR_ADDR << 4) & 0xf0;
- smimsg[3] = PHYGPCR_ADDR >> 4;
- smimsg[4] = 0xff; /* enable port 1-8 */
- smimsg[5] = 0x01; /* enable MII1 (0x01) */
- smimsg[6] = 0x00;
- smimsg[7] = 0x00;
-
- send_smi_frame (sp, bd, smimsg);
-
- smimsg[0] = 0x00; /* CHIP/HUB ID */
- smimsg[1] = 0x38; /* WRITE CMD */
- smimsg[2] = (LEDPCR_ADDR << 4) & 0xf0;
- smimsg[3] = LEDPCR_ADDR >> 4;
- smimsg[4] = 0xaa; /* Port 1-8 Conf.bits = 10 (Hardware control) */
- smimsg[5] = 0xaa;
- smimsg[6] = 0x00;
- smimsg[7] = 0x00;
-
- send_smi_frame (sp, bd, smimsg);
-
- /*
- * Disable Transmitter (so that we can free the BD, too)
- */
- sp->scc_gsmrl &= ~SCC_GSMRL_ENT;
-}
-
-/* ------------------------------------------------------------------------- */
-
-static void send_smi_frame (volatile scc_t * sp, volatile cbd_t * bd,
- uchar * msg)
-{
-#ifdef DEBUG
- unsigned hub, chip, cmd, length, addr;
-
- hub = msg[0] & 0x1F;
- chip = msg[0] >> 5;
- cmd = msg[1] & 0x1F;
- length = (msg[1] >> 5) | ((msg[2] & 0x0F) << 3);
- addr = (msg[2] >> 4) | (msg[3] << 4);
-
- printf ("SMI send: Hub %02x Chip %x Cmd %02x Len %d Addr %03x: "
- "%02x %02x %02x %02x\n",
- hub, chip, cmd, length, addr, msg[4], msg[5], msg[6], msg[7]);
-#endif /* DEBUG */
-
- bd->cbd_bufaddr = (uint) msg;
- bd->cbd_datlen = SMI_MSGLEN;
- bd->cbd_sc |= BD_SC_READY;
-
- /* wait for msg transmitted */
- while ((sp->scc_scce & 0x0002) == 0);
- /* clear all events */
- sp->scc_scce = ~0;
-}
-
-/* ------------------------------------------------------------------------- */
-
-void show_boot_progress (int status)
-{
- volatile immap_t *immr = (immap_t *) CFG_IMMR;
-
- status ^= 0x0F;
- status = (status & 0x0F) << 14;
- immr->im_cpm.cp_pbdat = (immr->im_cpm.cp_pbdat & ~PB_LED_ALL) | status;
-}
-
-/* ------------------------------------------------------------------------- */
diff --git a/board/hermes/u-boot.lds b/board/hermes/u-boot.lds
deleted file mode 100644
index ef53ab7a0a..0000000000
--- a/board/hermes/u-boot.lds
+++ /dev/null
@@ -1,141 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc8xx/start.o (.text)
- common/dlmalloc.o (.text)
- cpu/mpc8xx/interrupts.o (.text)
- lib_ppc/time.o (.text)
- lib_ppc/ticks.o (.text)
- lib_ppc/cache.o (.text)
- lib_generic/crc32.o (.text)
- . = env_offset;
- common/environment.o(.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/hermes/u-boot.lds.debug b/board/hermes/u-boot.lds.debug
deleted file mode 100644
index a961fa47ba..0000000000
--- a/board/hermes/u-boot.lds.debug
+++ /dev/null
@@ -1,137 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc8xx/start.o (.text)
- lib_ppc/ppcstring.o (.text)
- cpu/mpc8xx/interrupts.o (.text)
- lib_ppc/time.o (.text)
- lib_ppc/ticks.o (.text)
- . = env_offset;
- common/environment.o(.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/hidden_dragon/Makefile b/board/hidden_dragon/Makefile
deleted file mode 100644
index b9f1df685e..0000000000
--- a/board/hidden_dragon/Makefile
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# (C) Copyright 2000-2005
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/hidden_dragon/README b/board/hidden_dragon/README
deleted file mode 100644
index 529fe2be0e..0000000000
--- a/board/hidden_dragon/README
+++ /dev/null
@@ -1,60 +0,0 @@
-U-Boot for Hidden Dragon board
-------------------------------
-
-Hidden Dragon is a MPC824x-based board by Motorola. For the most
-part it is similar to Sandpoint8245 board. So unless otherwise
-mentioned, the codes in this directory are adapted from ../sandpoint
-directory.
-
-Apparently there are very few of this board out there. Even Motorola
-website does not have any info on it.
-
-RAM:
- start = 0x0000 0000
- size = 0x0200 0000 (32 MB)
-
-Flash:
- BANK ONE:
- start = 0xFFE0 0000
- size = 0x0020 0000 (2 MB)
- flash chip = 29LV160TE (1x16 Mbits or 2x8 Mbits)
- flash sectors = 16K, 2x8K, 32K, 31x64K
-
- BANK TWO:
- NONE
-
-The processor interrupt vectors reside on the first 256 bytes
-starting from address 0xFFF00000. The "reset vector" (first
-instruction executed after reset) is located on 0xFFF0 0100.
-
-U-Boot is configured to reside in flash starting at the address of
-0xFFF00000. The environment space is located in flash separately from
-U-Boot, at the second sector of the first flash bank, starting from
-0xFFE04000 until 0xFFE06000 (8KB).
-
-Network:
- - RTL8139 chip on the base board (SUPPORTED)
- - RTL8129 chip on the processor board (NOT SUPPORTED)
-
-Serial:
- - Two NS16550 compatible UART on the processor board (SUPPORTED)
- - One NS16550 compatible UART on the base board (UNTESTED)
-
-Misc:
- VIA686A PCI SuperIO peripheral controller
- - 2 USB ports (UNTESTED)
- - 2 PS2 ports (UNTESTED)
- - Parallel port (UNTESTED)
- - IDE & floppy interface (UNTESTED)
-
- S3 Savage4 video card (UNTESTED)
-
-TODO:
------
-- Support for the VIA686A based peripherals
-- The RTL8139 driver frequently gives rx error.
-- Support for RTL8129 network controller. (Why is the support removed from
- rtl8139.c driver?)
-
-(C) Copyright 2004
-Yusdi Santoso, Adaptec Inc., yusdi_santoso@adaptec.com
diff --git a/board/hidden_dragon/config.mk b/board/hidden_dragon/config.mk
deleted file mode 100644
index 5c36d05feb..0000000000
--- a/board/hidden_dragon/config.mk
+++ /dev/null
@@ -1,30 +0,0 @@
-#
-# (C) Copyright 2000-2005
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# Hidden Dragon boards
-#
-
-TEXT_BASE = 0xFFF00000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE)
diff --git a/board/hidden_dragon/early_init.S b/board/hidden_dragon/early_init.S
deleted file mode 100644
index 07dafb716f..0000000000
--- a/board/hidden_dragon/early_init.S
+++ /dev/null
@@ -1,152 +0,0 @@
-/*
- * (C) Copyright 2001
- * Thomas Koeller, tkoeller@gmx.net
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef __ASSEMBLY__
-#define __ASSEMBLY__ 1
-#endif
-
-#include <config.h>
-#include <asm/processor.h>
-#include <mpc824x.h>
-#include <ppc_asm.tmpl>
-
-#if defined(USE_DINK32)
- /* We are running from RAM, so do not clear the MCCR1_MEMGO bit! */
- #define MCCR1VAL ((CFG_ROMNAL << MCCR1_ROMNAL_SHIFT) | (CFG_ROMFAL << MCCR1_ROMFAL_SHIFT) | MCCR1_MEMGO)
-#else
- #define MCCR1VAL (CFG_ROMNAL << MCCR1_ROMNAL_SHIFT) | (CFG_ROMFAL << MCCR1_ROMFAL_SHIFT)
-#endif
-
- .text
-
- /* Values to program into memory controller registers */
-tbl: .long MCCR1, MCCR1VAL
- .long MCCR2, CFG_REFINT << MCCR2_REFINT_SHIFT
- .long MCCR3
- .long (((CFG_BSTOPRE & 0x000000f0) >> 4) << MCCR3_BSTOPRE2TO5_SHIFT) | \
- (CFG_REFREC << MCCR3_REFREC_SHIFT) | \
- (CFG_RDLAT << MCCR3_RDLAT_SHIFT)
- .long MCCR4
- .long (CFG_PRETOACT << MCCR4_PRETOACT_SHIFT) | (CFG_ACTTOPRE << MCCR4_ACTTOPRE_SHIFT) | \
- (CFG_REGISTERD_TYPE_BUFFER << 20) | \
- (((CFG_BSTOPRE & 0x00000300) >> 8) << MCCR4_BSTOPRE0TO1_SHIFT ) | \
- ((CFG_SDMODE_CAS_LAT << 4) | (CFG_SDMODE_WRAP << 3) | \
- (CFG_SDMODE_BURSTLEN) << MCCR4_SDMODE_SHIFT) | \
- (CFG_ACTTORW << MCCR4_ACTTORW_SHIFT) | \
- ((CFG_BSTOPRE & 0x0000000f) << MCCR4_BSTOPRE6TO9_SHIFT )
- .long MSAR1
- .long (((CFG_BANK0_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 0) | \
- (((CFG_BANK1_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 8) | \
- (((CFG_BANK2_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 16) | \
- (((CFG_BANK3_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 24)
- .long EMSAR1
- .long (((CFG_BANK0_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 0) | \
- (((CFG_BANK1_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 8) | \
- (((CFG_BANK2_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 16) | \
- (((CFG_BANK3_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 24)
- .long MSAR2
- .long (((CFG_BANK4_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 0) | \
- (((CFG_BANK5_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 8) | \
- (((CFG_BANK6_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 16) | \
- (((CFG_BANK7_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 24)
- .long EMSAR2
- .long (((CFG_BANK4_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 0) | \
- (((CFG_BANK5_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 8) | \
- (((CFG_BANK6_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 16) | \
- (((CFG_BANK7_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 24)
- .long MEAR1
- .long (((CFG_BANK0_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 0) | \
- (((CFG_BANK1_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 8) | \
- (((CFG_BANK2_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 16) | \
- (((CFG_BANK3_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 24)
- .long EMEAR1
- .long (((CFG_BANK0_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 0) | \
- (((CFG_BANK1_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 8) | \
- (((CFG_BANK2_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 16) | \
- (((CFG_BANK3_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 24)
- .long MEAR2
- .long (((CFG_BANK4_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 0) | \
- (((CFG_BANK5_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 8) | \
- (((CFG_BANK6_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 16) | \
- (((CFG_BANK7_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 24)
- .long EMEAR2
- .long (((CFG_BANK4_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 0) | \
- (((CFG_BANK5_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 8) | \
- (((CFG_BANK6_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 16) | \
- (((CFG_BANK7_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 24)
- .long 0
-
-
- /*
- * Early CPU initialization. Set up memory controller, so we can access any RAM at all. This
- * must be done in assembly, since we have no stack at this point.
- */
- .global early_init_f
-early_init_f:
- mflr r10
-
- /* basic memory controller configuration */
- lis r3, CONFIG_ADDR_HIGH
- lis r4, CONFIG_DATA_HIGH
- bl lab
-lab: mflr r5
- lwzu r0, tbl - lab(r5)
-loop: lwz r1, 4(r5)
- stwbrx r0, 0, r3
- eieio
- stwbrx r1, 0, r4
- eieio
- lwzu r0, 8(r5)
- cmpli cr0, 0, r0, 0
- bne cr0, loop
-
- /* set bank enable bits */
- lis r0, MBER@h
- ori r0, 0, MBER@l
- li r1, CFG_BANK_ENABLE
- stwbrx r0, 0, r3
- eieio
- stb r1, 0(r4)
- eieio
-
- /* delay loop */
- lis r0, 0x0003
- mtctr r0
-delay: bdnz delay
-
- /* enable memory controller */
- lis r0, MCCR1@h
- ori r0, 0, MCCR1@l
- stwbrx r0, 0, r3
- eieio
- lwbrx r0, 0, r4
- oris r0, 0, MCCR1_MEMGO@h
- stwbrx r0, 0, r4
- eieio
-
- /* set up stack pointer */
- lis r1, CFG_INIT_SP_OFFSET@h
- ori r1, r1, CFG_INIT_SP_OFFSET@l
-
- mtlr r10
- blr
diff --git a/board/hidden_dragon/flash.c b/board/hidden_dragon/flash.c
deleted file mode 100644
index 21c5a01c16..0000000000
--- a/board/hidden_dragon/flash.c
+++ /dev/null
@@ -1,575 +0,0 @@
-/*
- * (C) Copyright 2004
- * Yusdi Santoso, Adaptec Inc., yusdi_santoso@adaptec.com
- *
- * (C) Copyright 2000-2005
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc824x.h>
-#include <asm/processor.h>
-#include <asm/pci_io.h>
-#include <w83c553f.h>
-
-#define ROM_CS0_START 0xFF800000
-#define ROM_CS1_START 0xFF000000
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-#if defined(CFG_ENV_IS_IN_FLASH)
-# ifndef CFG_ENV_ADDR
-# define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_ENV_OFFSET)
-# endif
-# ifndef CFG_ENV_SIZE
-# define CFG_ENV_SIZE CFG_ENV_SECT_SIZE
-# endif
-# ifndef CFG_ENV_SECT_SIZE
-# define CFG_ENV_SECT_SIZE CFG_ENV_SIZE
-# endif
-#endif
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static int write_word (flash_info_t *info, ulong dest, ulong data);
-
-/*flash command address offsets*/
-
-#define ADDR0 (0xAAA)
-#define ADDR1 (0x555)
-#define ADDR3 (0x001)
-
-#define FLASH_WORD_SIZE unsigned char
-
-/*-----------------------------------------------------------------------
- */
-
-static unsigned long flash_id (unsigned char mfct, unsigned char chip)
- __attribute__ ((const));
-
-typedef struct {
- FLASH_WORD_SIZE extval;
- unsigned short intval;
-} map_entry;
-
-static unsigned long flash_id (unsigned char mfct, unsigned char chip)
-{
- static const map_entry mfct_map[] = {
- {(FLASH_WORD_SIZE) AMD_MANUFACT,
- (unsigned short) ((unsigned long) FLASH_MAN_AMD >> 16)},
- {(FLASH_WORD_SIZE) FUJ_MANUFACT,
- (unsigned short) ((unsigned long) FLASH_MAN_FUJ >> 16)},
- {(FLASH_WORD_SIZE) STM_MANUFACT,
- (unsigned short) ((unsigned long) FLASH_MAN_STM >> 16)},
- {(FLASH_WORD_SIZE) MT_MANUFACT,
- (unsigned short) ((unsigned long) FLASH_MAN_MT >> 16)},
- {(FLASH_WORD_SIZE) INTEL_MANUFACT,
- (unsigned short) ((unsigned long) FLASH_MAN_INTEL >> 16)},
- {(FLASH_WORD_SIZE) INTEL_ALT_MANU,
- (unsigned short) ((unsigned long) FLASH_MAN_INTEL >> 16)}
- };
-
- static const map_entry chip_map[] = {
- {AMD_ID_F040B, FLASH_AM040},
- {(FLASH_WORD_SIZE) STM_ID_x800AB, FLASH_STM800AB}
- };
-
- const map_entry *p;
- unsigned long result = FLASH_UNKNOWN;
-
- /* find chip id */
- for (p = &chip_map[0];
- p < &chip_map[sizeof chip_map / sizeof chip_map[0]]; p++)
- if (p->extval == chip) {
- result = FLASH_VENDMASK | p->intval;
- break;
- }
-
- /* find vendor id */
- for (p = &mfct_map[0];
- p < &mfct_map[sizeof mfct_map / sizeof mfct_map[0]]; p++)
- if (p->extval == mfct) {
- result &= ~FLASH_VENDMASK;
- result |= (unsigned long) p->intval << 16;
- break;
- }
-
- return result;
-}
-
-unsigned long flash_init (void)
-{
- unsigned long i;
- unsigned char j;
- static const ulong flash_banks[] = CFG_FLASH_BANKS;
-
- /* Init: no FLASHes known */
- for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
- flash_info_t *const pflinfo = &flash_info[i];
-
- pflinfo->flash_id = FLASH_UNKNOWN;
- pflinfo->size = 0;
- pflinfo->sector_count = 0;
- }
-
- /* Enable writes to Hidden Dragon flash */
- {
- register unsigned char temp;
-
- CONFIG_READ_BYTE (CFG_WINBOND_ISA_CFG_ADDR + WINBOND_CSCR,
- temp);
- temp &= ~0x20; /* clear BIOSWP bit */
- CONFIG_WRITE_BYTE (CFG_WINBOND_ISA_CFG_ADDR + WINBOND_CSCR,
- temp);
- }
-
- for (i = 0; i < sizeof flash_banks / sizeof flash_banks[0]; i++) {
- flash_info_t *const pflinfo = &flash_info[i];
- const unsigned long base_address = flash_banks[i];
- volatile FLASH_WORD_SIZE *const flash =
- (FLASH_WORD_SIZE *) base_address;
-
- flash[0xAAA << (3 * i)] = 0xaa;
- flash[0x555 << (3 * i)] = 0x55;
- flash[0xAAA << (3 * i)] = 0x90;
- __asm__ __volatile__ ("sync");
-
- pflinfo->flash_id =
- flash_id (flash[0x0], flash[0x2 + 14 * i]);
-
- switch (pflinfo->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM040:
- pflinfo->size = 0x00080000;
- pflinfo->sector_count = 8;
- for (j = 0; j < 8; j++) {
- pflinfo->start[j] =
- base_address + 0x00010000 * j;
- pflinfo->protect[j] = flash[(j << 16) | 0x2];
- }
- break;
- case FLASH_STM800AB:
- pflinfo->size = 0x00100000;
- pflinfo->sector_count = 19;
- pflinfo->start[0] = base_address;
- pflinfo->start[1] = base_address + 0x4000;
- pflinfo->start[2] = base_address + 0x6000;
- pflinfo->start[3] = base_address + 0x8000;
- for (j = 1; j < 16; j++) {
- pflinfo->start[j + 3] =
- base_address + 0x00010000 * j;
- }
- break;
- default:
- /* The chip used is not listed in flash_id
- TODO: Change this to explicitly detect the flash type
- */
- {
- int sector_addr = base_address;
-
- pflinfo->size = 0x00200000;
- pflinfo->sector_count = 35;
- pflinfo->start[0] = sector_addr;
- sector_addr += 0x4000; /* 16K */
- pflinfo->start[1] = sector_addr;
- sector_addr += 0x2000; /* 8K */
- pflinfo->start[2] = sector_addr;
- sector_addr += 0x2000; /* 8K */
- pflinfo->start[3] = sector_addr;
- sector_addr += 0x8000; /* 32K */
-
- for (j = 4; j < 35; j++) {
- pflinfo->start[j] = sector_addr;
- sector_addr += 0x10000; /* 64K */
- }
- }
- break;
- }
- /* Protect monitor and environment sectors
- */
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
- flash_protect (FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE + monitor_flash_len - 1,
- &flash_info[0]);
-#endif
-
-#if (CFG_ENV_IS_IN_FLASH == 1) && defined(CFG_ENV_ADDR)
- flash_protect (FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1,
- &flash_info[0]);
-#endif
-
- /* reset device to read mode */
- flash[0x0000] = 0xf0;
- __asm__ __volatile__ ("sync");
- }
-
- /* only have 1 bank */
- return flash_info[0].size;
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t * info)
-{
- static const char unk[] = "Unknown";
- const char *mfct = unk, *type = unk;
- unsigned int i;
-
- if (info->flash_id != FLASH_UNKNOWN) {
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD:
- mfct = "AMD";
- break;
- case FLASH_MAN_FUJ:
- mfct = "FUJITSU";
- break;
- case FLASH_MAN_STM:
- mfct = "STM";
- break;
- case FLASH_MAN_SST:
- mfct = "SST";
- break;
- case FLASH_MAN_BM:
- mfct = "Bright Microelectonics";
- break;
- case FLASH_MAN_INTEL:
- mfct = "Intel";
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM040:
- type = "AM29F040B (512K * 8, uniform sector size)";
- break;
- case FLASH_AM400B:
- type = "AM29LV400B (4 Mbit, bottom boot sect)";
- break;
- case FLASH_AM400T:
- type = "AM29LV400T (4 Mbit, top boot sector)";
- break;
- case FLASH_AM800B:
- type = "AM29LV800B (8 Mbit, bottom boot sect)";
- break;
- case FLASH_AM800T:
- type = "AM29LV800T (8 Mbit, top boot sector)";
- break;
- case FLASH_AM160T:
- type = "AM29LV160T (16 Mbit, top boot sector)";
- break;
- case FLASH_AM320B:
- type = "AM29LV320B (32 Mbit, bottom boot sect)";
- break;
- case FLASH_AM320T:
- type = "AM29LV320T (32 Mbit, top boot sector)";
- break;
- case FLASH_STM800AB:
- type = "M29W800AB (8 Mbit, bottom boot sect)";
- break;
- case FLASH_SST800A:
- type = "SST39LF/VF800 (8 Mbit, uniform sector size)";
- break;
- case FLASH_SST160A:
- type = "SST39LF/VF160 (16 Mbit, uniform sector size)";
- break;
- }
- }
-
- printf ("\n Brand: %s Type: %s\n"
- " Size: %lu KB in %d Sectors\n",
- mfct, type, info->size >> 10, info->sector_count);
-
- printf (" Sector Start Addresses:");
-
- for (i = 0; i < info->sector_count; i++) {
- unsigned long size;
- unsigned int erased;
- unsigned long *flash = (unsigned long *) info->start[i];
-
- /*
- * Check if whole sector is erased
- */
- size = (i != (info->sector_count - 1)) ?
- (info->start[i + 1] - info->start[i]) >> 2 :
- (info->start[0] + info->size - info->start[i]) >> 2;
-
- for (flash = (unsigned long *) info->start[i], erased = 1;
- (flash != (unsigned long *) info->start[i] + size)
- && erased; flash++)
- erased = *flash == ~0x0UL;
-
- printf ("%s %08lX %s %s",
- (i % 5) ? "" : "\n ",
- info->start[i],
- erased ? "E" : " ", info->protect[i] ? "RO" : " ");
- }
-
- puts ("\n");
- return;
-}
-
-int flash_erase (flash_info_t * info, int s_first, int s_last)
-{
- volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *) (info->start[0]);
- int flag, prot, sect, l_sect;
- ulong start, now, last;
- unsigned char sh8b;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- if ((info->flash_id == FLASH_UNKNOWN) ||
- (info->flash_id > (FLASH_MAN_STM | FLASH_AMD_COMP))) {
- printf ("Can't erase unknown flash type - aborted\n");
- return 1;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n", prot);
- } else {
- printf ("\n");
- }
-
- l_sect = -1;
-
- /* Check the ROM CS */
- if ((info->start[0] >= ROM_CS1_START)
- && (info->start[0] < ROM_CS0_START))
- sh8b = 3;
- else
- sh8b = 0;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
-
- addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE) 0x00AA00AA;
- addr[ADDR1 << sh8b] = (FLASH_WORD_SIZE) 0x00550055;
- addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE) 0x00800080;
- addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE) 0x00AA00AA;
- addr[ADDR1 << sh8b] = (FLASH_WORD_SIZE) 0x00550055;
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr = (FLASH_WORD_SIZE *) (info->start[0] +
- ((info->start[sect] -
- info->start[0]) << sh8b));
- if (info->flash_id & FLASH_MAN_SST) {
- addr[ADDR0 << sh8b] =
- (FLASH_WORD_SIZE) 0x00AA00AA;
- addr[ADDR1 << sh8b] =
- (FLASH_WORD_SIZE) 0x00550055;
- addr[ADDR0 << sh8b] =
- (FLASH_WORD_SIZE) 0x00800080;
- addr[ADDR0 << sh8b] =
- (FLASH_WORD_SIZE) 0x00AA00AA;
- addr[ADDR1 << sh8b] =
- (FLASH_WORD_SIZE) 0x00550055;
- addr[0] = (FLASH_WORD_SIZE) 0x00500050; /* block erase */
- udelay (30000); /* wait 30 ms */
- } else
- addr[0] = (FLASH_WORD_SIZE) 0x00300030; /* sector erase */
- l_sect = sect;
- }
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts ();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- /*
- * We wait for the last triggered sector
- */
- if (l_sect < 0)
- goto DONE;
-
- start = get_timer (0);
- last = start;
- addr = (FLASH_WORD_SIZE *) (info->start[0] + ((info->start[l_sect] -
- info->
- start[0]) << sh8b));
- while ((addr[0] & (FLASH_WORD_SIZE) 0x00800080) !=
- (FLASH_WORD_SIZE) 0x00800080) {
- if ((now = get_timer (start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- return 1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- serial_putc ('.');
- last = now;
- }
- }
-
- DONE:
- /* reset to read mode */
- addr = (FLASH_WORD_SIZE *) info->start[0];
- addr[0] = (FLASH_WORD_SIZE) 0x00F000F0; /* reset bank */
-
- printf (" done\n");
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int i, l, rc;
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i = 0, cp = wp; i < l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
- for (; i < 4 && cnt > 0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt == 0 && i < 4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
-
- if ((rc = write_word (info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = 0;
- for (i = 0; i < 4; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_word (info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i = 0, cp = wp; i < 4 && cnt > 0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i < 4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
-
- return (write_word (info, wp, data));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word (flash_info_t * info, ulong dest, ulong data)
-{
- volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *) info->start[0];
- volatile FLASH_WORD_SIZE *dest2;
- volatile FLASH_WORD_SIZE *data2 = (FLASH_WORD_SIZE *) & data;
- ulong start;
- int flag;
- int i;
- unsigned char sh8b;
-
- /* Check the ROM CS */
- if ((info->start[0] >= ROM_CS1_START)
- && (info->start[0] < ROM_CS0_START))
- sh8b = 3;
- else
- sh8b = 0;
-
- dest2 = (FLASH_WORD_SIZE *) (((dest - info->start[0]) << sh8b) +
- info->start[0]);
-
- /* Check if Flash is (sufficiently) erased */
- if ((*dest2 & (FLASH_WORD_SIZE) data) != (FLASH_WORD_SIZE) data) {
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
-
- for (i = 0; i < 4 / sizeof (FLASH_WORD_SIZE); i++) {
- addr2[ADDR0 << sh8b] = (FLASH_WORD_SIZE) 0x00AA00AA;
- addr2[ADDR1 << sh8b] = (FLASH_WORD_SIZE) 0x00550055;
- addr2[ADDR0 << sh8b] = (FLASH_WORD_SIZE) 0x00A000A0;
-
- dest2[i << sh8b] = data2[i];
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts ();
-
- /* data polling for D7 */
- start = get_timer (0);
- while ((dest2[i << sh8b] & (FLASH_WORD_SIZE) 0x00800080) !=
- (data2[i] & (FLASH_WORD_SIZE) 0x00800080)) {
- if (get_timer (start) > CFG_FLASH_WRITE_TOUT) {
- return (1);
- }
- }
- }
-
- return (0);
-}
diff --git a/board/hidden_dragon/hidden_dragon.c b/board/hidden_dragon/hidden_dragon.c
deleted file mode 100644
index daab8334ee..0000000000
--- a/board/hidden_dragon/hidden_dragon.c
+++ /dev/null
@@ -1,95 +0,0 @@
-/*
- * (C) Copyright 2004
- * Yusdi Santoso, Adaptec Inc., yusdi_santoso@adaptec.com
- *
- * (C) Copyright 2000
- * Rob Taylor, Flying Pig Systems. robt@flyingpig.com.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc824x.h>
-#include <pci.h>
-
-int checkboard (void)
-{
- /*TODO: Check processor type */
-
- puts ( "Board: Hidden Dragon "
-#ifdef CONFIG_MPC8240
- "8240"
-#endif
-#ifdef CONFIG_MPC8245
- "8245"
-#endif
- " ##Test not implemented yet##\n");
- /* TODO: Implement board test */
- return 0;
-}
-
-long int initdram (int board_type)
-{
- long size;
- long new_bank0_end;
- long mear1;
- long emear1;
-
- size = get_ram_size(CFG_SDRAM_BASE, CFG_MAX_RAM_SIZE);
-
- new_bank0_end = size - 1;
- mear1 = mpc824x_mpc107_getreg(MEAR1);
- emear1 = mpc824x_mpc107_getreg(EMEAR1);
- mear1 = (mear1 & 0xFFFFFF00) |
- ((new_bank0_end & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT);
- emear1 = (emear1 & 0xFFFFFF00) |
- ((new_bank0_end & MICR_ADDR_MASK) >> MICR_EADDR_SHIFT);
- mpc824x_mpc107_setreg(MEAR1, mear1);
- mpc824x_mpc107_setreg(EMEAR1, emear1);
-
- return (size);
-}
-
-/*
- * Initialize PCI Devices, report devices found.
- */
-#ifndef CONFIG_PCI_PNP
-static struct pci_config_table pci_hidden_dragon_config_table[] = {
- { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x0f, PCI_ANY_ID,
- pci_cfgfunc_config_device, { PCI_ENET0_IOADDR,
- PCI_ENET0_MEMADDR,
- PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }},
- { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x10, PCI_ANY_ID,
- pci_cfgfunc_config_device, { PCI_ENET1_IOADDR,
- PCI_ENET1_MEMADDR,
- PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }},
- { }
-};
-#endif
-
-struct pci_controller hose = {
-#ifndef CONFIG_PCI_PNP
- config_table: pci_hidden_dragon_config_table,
-#endif
-};
-
-void pci_init_board(void)
-{
- pci_mpc824x_init(&hose);
-}
diff --git a/board/hidden_dragon/speed.h b/board/hidden_dragon/speed.h
deleted file mode 100644
index b66393bec5..0000000000
--- a/board/hidden_dragon/speed.h
+++ /dev/null
@@ -1,54 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*-----------------------------------------------------------------------
- * Timer value for timer 2, ICLK = 10
- *
- * SPEED_FCOUNT2 = GCLK / (16 * (TIMER_TMR_PS + 1))
- * SPEED_TMR3_PS = (GCLK / (16 * SPEED_FCOUNT3)) - 1
- *
- * SPEED_FCOUNT2 timer 2 counting frequency
- * GCLK CPU clock
- * SPEED_TMR2_PS prescaler
- */
-#define SPEED_TMR2_PS (250 - 1) /* divide by 250 */
-
-/*-----------------------------------------------------------------------
- * Timer value for PIT
- *
- * PIT_TIME = SPEED_PITC / PITRTCLK
- * PITRTCLK = 8192
- */
-#define SPEED_PITC (82 << 16) /* start counting from 82 */
-
-/*
- * The new value for PTA is calculated from
- *
- * PTA = (gclk * Trefresh) / (2 ^ (2 * DFBRG) * PTP * NCS)
- *
- * gclk CPU clock (not bus clock !)
- * Trefresh Refresh cycle * 4 (four word bursts used)
- * DFBRG For normal mode (no clock reduction) always 0
- * PTP Prescaler (already adjusted for no. of banks and 4K / 8K refresh)
- * NCS Number of SDRAM banks (chip selects) on this UPM.
- */
diff --git a/board/hidden_dragon/u-boot.lds b/board/hidden_dragon/u-boot.lds
deleted file mode 100644
index 2a5cd2ebd9..0000000000
--- a/board/hidden_dragon/u-boot.lds
+++ /dev/null
@@ -1,133 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc824x/start.o (.text)
- lib_ppc/board.o (.text)
- lib_ppc/ppcstring.o (.text)
-
- . = DEFINED(env_offset) ? env_offset : .;
- common/environment.o (.text)
-
- *(.text)
-
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
-
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/hmi1001/Makefile b/board/hmi1001/Makefile
deleted file mode 100644
index ed36ea717e..0000000000
--- a/board/hmi1001/Makefile
+++ /dev/null
@@ -1,46 +0,0 @@
-#
-# (C) Copyright 2003-2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := $(BOARD).o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/hmi1001/config.mk b/board/hmi1001/config.mk
deleted file mode 100644
index 51e8e84c5c..0000000000
--- a/board/hmi1001/config.mk
+++ /dev/null
@@ -1,41 +0,0 @@
-#
-# (C) Copyright 2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# INKA 4X0 board:
-#
-# Valid values for TEXT_BASE are:
-#
-# 0xFFE00000 boot high
-#
-# 0x00100000 boot from RAM (for testing only)
-#
-
-ifndef TEXT_BASE
-## Standard: boot high
-TEXT_BASE = 0xFFF00000
-## For testing: boot from RAM
-#TEXT_BASE = 0x00100000
-endif
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
diff --git a/board/hmi1001/hmi1001.c b/board/hmi1001/hmi1001.c
deleted file mode 100644
index 237e863165..0000000000
--- a/board/hmi1001/hmi1001.c
+++ /dev/null
@@ -1,297 +0,0 @@
-/*
- * (C) Copyright 2003-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2004
- * Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com.
- *
- * (C) Copyright 2004
- * Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc5xxx.h>
-#include <pci.h>
-#include <malloc.h>
-
-#ifndef CFG_RAMBOOT
-static void sdram_start (int hi_addr)
-{
- long hi_addr_bit = hi_addr ? 0x01000000 : 0;
-
- /* unlock mode register */
- *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000000 | hi_addr_bit;
- __asm__ volatile ("sync");
-
- /* precharge all banks */
- *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000002 | hi_addr_bit;
- __asm__ volatile ("sync");
-
-#if SDRAM_DDR
- /* set mode register: extended mode */
- *(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_EMODE;
- __asm__ volatile ("sync");
-
- /* set mode register: reset DLL */
- *(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_MODE | 0x04000000;
- __asm__ volatile ("sync");
-#endif
-
- /* precharge all banks */
- *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000002 | hi_addr_bit;
- __asm__ volatile ("sync");
-
- /* auto refresh */
- *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000004 | hi_addr_bit;
- __asm__ volatile ("sync");
-
- /* set mode register */
- *(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_MODE;
- __asm__ volatile ("sync");
-
- /* normal operation */
- *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | hi_addr_bit;
- __asm__ volatile ("sync");
-}
-#endif
-
-/*
- * ATTENTION: Although partially referenced initdram does NOT make real use
- * use of CFG_SDRAM_BASE. The code does not work if CFG_SDRAM_BASE
- * is something else than 0x00000000.
- */
-
-long int initdram (int board_type)
-{
- ulong dramsize = 0;
-#ifndef CFG_RAMBOOT
- ulong test1, test2;
-
- /* setup SDRAM chip selects */
- *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x0000001c; /* 512MB at 0x0 */
- *(vu_long *)MPC5XXX_SDRAM_CS1CFG = 0x40000000; /* disabled */
- __asm__ volatile ("sync");
-
- /* setup config registers */
- *(vu_long *)MPC5XXX_SDRAM_CONFIG1 = SDRAM_CONFIG1;
- *(vu_long *)MPC5XXX_SDRAM_CONFIG2 = SDRAM_CONFIG2;
- __asm__ volatile ("sync");
-
-#if SDRAM_DDR
- /* set tap delay */
- *(vu_long *)MPC5XXX_CDM_PORCFG = SDRAM_TAPDELAY;
- __asm__ volatile ("sync");
-#endif
-
- /* find RAM size using SDRAM CS0 only */
- sdram_start(0);
- test1 = get_ram_size((ulong *)CFG_SDRAM_BASE, 0x20000000);
- sdram_start(1);
- test2 = get_ram_size((ulong *)CFG_SDRAM_BASE, 0x20000000);
- if (test1 > test2) {
- sdram_start(0);
- dramsize = test1;
- } else {
- dramsize = test2;
- }
-
- /* memory smaller than 1MB is impossible */
- if (dramsize < (1 << 20)) {
- dramsize = 0;
- }
-
- /* set SDRAM CS0 size according to the amount of RAM found */
- if (dramsize > 0) {
- *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x13 +
- __builtin_ffs(dramsize >> 20) - 1;
- } else {
- *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0; /* disabled */
- }
-
- *(vu_long *)MPC5XXX_SDRAM_CS1CFG = dramsize; /* disabled */
-#else /* CFG_RAMBOOT */
-
- /* retrieve size of memory connected to SDRAM CS0 */
- dramsize = *(vu_long *)MPC5XXX_SDRAM_CS0CFG & 0xFF;
- if (dramsize >= 0x13) {
- dramsize = (1 << (dramsize - 0x13)) << 20;
- } else {
- dramsize = 0;
- }
-
- /* retrieve size of memory connected to SDRAM CS1 */
- dramsize2 = *(vu_long *)MPC5XXX_SDRAM_CS1CFG & 0xFF;
- if (dramsize2 >= 0x13) {
- dramsize2 = (1 << (dramsize2 - 0x13)) << 20;
- } else {
- dramsize2 = 0;
- }
-
-#endif /* CFG_RAMBOOT */
-
-/* return dramsize + dramsize2; */
- return dramsize;
-}
-
-int checkboard (void)
-{
- puts ("Board: HMI1001\n");
- return 0;
-}
-
-#ifdef CONFIG_PREBOOT
-
-static uchar kbd_magic_prefix[] = "key_magic";
-static uchar kbd_command_prefix[] = "key_cmd";
-
-#define S1_ROT 0xf0
-#define S2_Q 0x40
-#define S2_M 0x20
-
-struct kbd_data_t {
- char s1;
- char s2;
-};
-
-struct kbd_data_t* get_keys (struct kbd_data_t *kbd_data)
-{
- kbd_data->s1 = *((volatile uchar*)(CFG_STATUS1_BASE));
- kbd_data->s2 = *((volatile uchar*)(CFG_STATUS2_BASE));
-
- return kbd_data;
-}
-
-static int compare_magic (const struct kbd_data_t *kbd_data, uchar *str)
-{
- char s1 = str[0];
- char s2;
-
- if (s1 >= '0' && s1 <= '9')
- s1 -= '0';
- else if (s1 >= 'a' && s1 <= 'f')
- s1 = s1 - 'a' + 10;
- else if (s1 >= 'A' && s1 <= 'F')
- s1 = s1 - 'A' + 10;
- else
- return -1;
-
- if (((S1_ROT & kbd_data->s1) >> 4) != s1)
- return -1;
-
- s2 = (S2_Q | S2_M) & kbd_data->s2;
-
- switch (str[1]) {
- case 'q':
- case 'Q':
- if (s2 == S2_Q)
- return -1;
- break;
- case 'm':
- case 'M':
- if (s2 == S2_M)
- return -1;
- break;
- case '\0':
- if (s2 == (S2_Q | S2_M))
- return 0;
- default:
- return -1;
- }
-
- if (str[2])
- return -1;
-
- return 0;
-}
-
-static uchar *key_match (const struct kbd_data_t *kbd_data)
-{
- uchar magic[sizeof (kbd_magic_prefix) + 1];
- uchar *suffix;
- uchar *kbd_magic_keys;
-
- /*
- * The following string defines the characters that can be appended
- * to "key_magic" to form the names of environment variables that
- * hold "magic" key codes, i. e. such key codes that can cause
- * pre-boot actions. If the string is empty (""), then only
- * "key_magic" is checked (old behaviour); the string "125" causes
- * checks for "key_magic1", "key_magic2" and "key_magic5", etc.
- */
- if ((kbd_magic_keys = getenv ("magic_keys")) == NULL)
- kbd_magic_keys = "";
-
- /* loop over all magic keys;
- * use '\0' suffix in case of empty string
- */
- for (suffix = kbd_magic_keys; *suffix ||
- suffix == kbd_magic_keys; ++suffix) {
- sprintf (magic, "%s%c", kbd_magic_prefix, *suffix);
-
- if (compare_magic(kbd_data, getenv(magic)) == 0) {
- uchar cmd_name[sizeof (kbd_command_prefix) + 1];
- char *cmd;
-
- sprintf (cmd_name, "%s%c", kbd_command_prefix, *suffix);
- cmd = getenv (cmd_name);
-
- return (cmd);
- }
- }
-
- return (NULL);
-}
-
-#endif /* CONFIG_PREBOOT */
-
-int misc_init_r (void)
-{
-#ifdef CONFIG_PREBOOT
- struct kbd_data_t kbd_data;
- /* Decode keys */
- uchar *str = strdup (key_match (get_keys (&kbd_data)));
- /* Set or delete definition */
- setenv ("preboot", str);
- free (str);
-#endif /* CONFIG_PREBOOT */
-
- return 0;
-}
-
-int board_early_init_r (void)
-{
- *(vu_long *)MPC5XXX_BOOTCS_CFG &= ~0x1; /* clear RO */
- *(vu_long *)MPC5XXX_BOOTCS_START =
- *(vu_long *)MPC5XXX_CS0_START = START_REG(CFG_FLASH_BASE);
- *(vu_long *)MPC5XXX_BOOTCS_STOP =
- *(vu_long *)MPC5XXX_CS0_STOP = STOP_REG(CFG_FLASH_BASE, CFG_FLASH_SIZE);
- return 0;
-}
-#ifdef CONFIG_PCI
-static struct pci_controller hose;
-
-extern void pci_mpc5xxx_init(struct pci_controller *);
-
-void pci_init_board(void)
-{
- pci_mpc5xxx_init(&hose);
-}
-#endif
diff --git a/board/hmi1001/u-boot.lds b/board/hmi1001/u-boot.lds
deleted file mode 100644
index 123a14c5aa..0000000000
--- a/board/hmi1001/u-boot.lds
+++ /dev/null
@@ -1,136 +0,0 @@
-/*
- * (C) Copyright 2003-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc5xxx/start.o (.text)
- cpu/mpc5xxx/traps.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/cache.o (.text)
- lib_ppc/time.o (.text)
-
- . = DEFINED(env_offset) ? env_offset : .;
- common/environment.o (.ppcenv)
-
- *(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/hymod/Makefile b/board/hymod/Makefile
deleted file mode 100644
index b52af9a716..0000000000
--- a/board/hymod/Makefile
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o bsp.o eeprom.o fetch.o input.o env.o
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/hymod/bsp.c b/board/hymod/bsp.c
deleted file mode 100644
index 0596fa4aad..0000000000
--- a/board/hymod/bsp.c
+++ /dev/null
@@ -1,407 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- * hacked for Hymod FPGA support by Murray.Jensen@csiro.au, 29-Jan-01
- */
-
-#include <common.h>
-#include <command.h>
-#include <net.h>
-#include <asm/iopin_8260.h>
-
-/*-----------------------------------------------------------------------
- * Board Special Commands: FPGA load/store, EEPROM erase
- */
-
-#if (CONFIG_COMMANDS & CFG_CMD_BSP)
-
-#define LOAD_SUCCESS 0
-#define LOAD_FAIL_NOCONF 1
-#define LOAD_FAIL_NOINIT 2
-#define LOAD_FAIL_NODONE 3
-
-#define STORE_SUCCESS 0
-
-/*
- * Programming the Hymod FPGAs
- *
- * The 8260 io port config table is set up so that the INIT pin is
- * held Low (Open Drain output 0) - this will delay the automatic
- * Power-On config until INIT is released (by making it an input).
- *
- * If the FPGA has been programmed before, then the assertion of PROGRAM
- * will initiate configuration (i.e. it begins clearing the RAM).
- *
- * When the FPGA is ready to receive configuration data (either after
- * releasing INIT after Power-On, or after asserting PROGRAM), it will
- * pull INIT high.
- *
- * Notes from Paul Dunn:
- *
- * 1. program pin should be forced low for >= 300ns
- * (about 20 bus clock cycles minimum).
- *
- * 2. then wait for init to go high, which signals
- * that the FPGA has cleared its internal memory
- * and is ready to load
- *
- * 3. perform load writes of entire config file
- *
- * 4. wait for done to go high, which should be
- * within a few bus clock cycles. If done has not
- * gone high after reasonable period, then load
- * has not worked (wait several ms?)
- */
-
-int
-fpga_load (int mezz, uchar *addr, ulong size)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- hymod_conf_t *cp = &gd->bd->bi_hymod_conf;
- xlx_info_t *fp;
- xlx_iopins_t *fpgaio;
- volatile uchar *fpgabase;
- volatile uint cnt;
- uchar *eaddr = addr + size;
- int result;
-
- if (mezz)
- fp = &cp->mezz.xlx[0];
- else
- fp = &cp->main.xlx[0];
-
- if (!fp->mmap.prog.exists)
- return (LOAD_FAIL_NOCONF);
-
- fpgabase = (uchar *)fp->mmap.prog.base;
- fpgaio = &fp->iopins;
-
- /* set enable HIGH if required */
- if (fpgaio->enable_pin.flag)
- iopin_set_high (&fpgaio->enable_pin);
-
- /* ensure INIT is released (set it to be an input) */
- iopin_set_in (&fpgaio->init_pin);
-
- /* toggle PROG Low then High (will already be Low after Power-On) */
- iopin_set_low (&fpgaio->prog_pin);
- udelay (1); /* minimum 300ns - 1usec should do it */
- iopin_set_high (&fpgaio->prog_pin);
-
- /* wait for INIT High */
- cnt = 0;
- while (!iopin_is_high (&fpgaio->init_pin))
- if (++cnt == 10000000) {
- result = LOAD_FAIL_NOINIT;
- goto done;
- }
-
- /* write configuration data */
- while (addr < eaddr)
- *fpgabase = *addr++;
-
- /* wait for DONE High */
- cnt = 0;
- while (!iopin_is_high (&fpgaio->done_pin))
- if (++cnt == 100000000) {
- result = LOAD_FAIL_NODONE;
- goto done;
- }
-
- /* success */
- result = LOAD_SUCCESS;
-
- done:
-
- if (fpgaio->enable_pin.flag)
- iopin_set_low (&fpgaio->enable_pin);
-
- return (result);
-}
-
-/* ------------------------------------------------------------------------- */
-int
-do_fpga (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
-{
- uchar *addr, *save_addr;
- ulong size;
- int mezz, arg, result;
-
- switch (argc) {
-
- case 0:
- case 1:
- break;
-
- case 2:
- if (strcmp (argv[1], "info") == 0) {
- printf ("\nHymod FPGA Info...\n");
- printf ("\t\t\t\tAddress\t\tSize\n");
- printf ("\tMain Configuration:\t0x%08x\t%d\n",
- FPGA_MAIN_CFG_BASE, FPGA_MAIN_CFG_SIZE);
- printf ("\tMain Register:\t\t0x%08x\t%d\n",
- FPGA_MAIN_REG_BASE, FPGA_MAIN_REG_SIZE);
- printf ("\tMain Port:\t\t0x%08x\t%d\n",
- FPGA_MAIN_PORT_BASE, FPGA_MAIN_PORT_SIZE);
- printf ("\tMezz Configuration:\t0x%08x\t%d\n",
- FPGA_MEZZ_CFG_BASE, FPGA_MEZZ_CFG_SIZE);
- return 0;
- }
- break;
-
- case 3:
- if (strcmp (argv[1], "store") == 0) {
- addr = (uchar *) simple_strtoul (argv[2], NULL, 16);
-
- save_addr = addr;
-#if 0
- /* fpga readback unimplemented */
- while (more readback data)
- *addr++ = *fpga;
- result = error ? STORE_FAIL_XXX : STORE_SUCCESS;
-#else
- result = STORE_SUCCESS;
-#endif
-
- if (result == STORE_SUCCESS) {
- printf ("SUCCEEDED (%d bytes)\n",
- addr - save_addr);
- return 0;
- } else
- printf ("FAILED (%d bytes)\n",
- addr - save_addr);
- return 1;
- }
- break;
-
- case 4:
- if (strcmp (argv[1], "tftp") == 0) {
- copy_filename (BootFile, argv[2], sizeof (BootFile));
- load_addr = simple_strtoul (argv[3], NULL, 16);
- NetBootFileXferSize = 0;
-
- if (NetLoop (TFTP) <= 0) {
- printf ("tftp transfer failed - aborting "
- "fgpa load\n");
- return 1;
- }
-
- if (NetBootFileXferSize == 0) {
- printf ("can't determine file size - "
- "aborting fpga load\n");
- return 1;
- }
-
- printf ("File transfer succeeded - "
- "beginning fpga load...");
-
- result = fpga_load (0, (uchar *) load_addr,
- NetBootFileXferSize);
-
- if (result == LOAD_SUCCESS) {
- printf ("SUCCEEDED\n");
- return 0;
- } else if (result == LOAD_FAIL_NOCONF)
- printf ("FAILED (no CONF)\n");
- else if (result == LOAD_FAIL_NOINIT)
- printf ("FAILED (no INIT)\n");
- else
- printf ("FAILED (no DONE)\n");
- return 1;
-
- }
- /* fall through ... */
-
- case 5:
- if (strcmp (argv[1], "load") == 0) {
- if (argc == 5) {
- if (strcmp (argv[2], "main") == 0)
- mezz = 0;
- else if (strcmp (argv[2], "mezz") == 0)
- mezz = 1;
- else {
- printf ("FPGA type must be either "
- "`main' or `mezz'\n");
- return 1;
- }
- arg = 3;
- } else {
- mezz = 0;
- arg = 2;
- }
-
- addr = (uchar *) simple_strtoul (argv[arg++], NULL, 16);
- size = (ulong) simple_strtoul (argv[arg], NULL, 16);
-
- result = fpga_load (mezz, addr, size);
-
- if (result == LOAD_SUCCESS) {
- printf ("SUCCEEDED\n");
- return 0;
- } else if (result == LOAD_FAIL_NOCONF)
- printf ("FAILED (no CONF)\n");
- else if (result == LOAD_FAIL_NOINIT)
- printf ("FAILED (no INIT)\n");
- else
- printf ("FAILED (no DONE)\n");
- return 1;
- }
- break;
-
- default:
- break;
- }
-
- printf ("Usage:\n%s\n", cmdtp->usage);
- return 1;
-}
-U_BOOT_CMD(
- fpga, 6, 1, do_fpga,
- "fpga - FPGA sub-system\n",
- "load [type] addr size\n"
- " - write the configuration data at memory address `addr',\n"
- " size `size' bytes, into the FPGA of type `type' (either\n"
- " `main' or `mezz', default `main'). e.g.\n"
- " `fpga load 100000 7d8f'\n"
- " loads the main FPGA with config data at address 100000\n"
- " HEX, size 7d8f HEX (32143 DEC) bytes\n"
- "fpga tftp file addr\n"
- " - transfers `file' from the tftp server into memory at\n"
- " address `addr', then writes the entire file contents\n"
- " into the main FPGA\n"
- "fpga store addr\n"
- " - read configuration data from the main FPGA (the mezz\n"
- " FPGA is write-only), into address `addr'. There must be\n"
- " enough memory available at `addr' to hold all the config\n"
- " data - the size of which is determined by VC:???\n"
- "fpga info\n"
- " - print information about the Hymod FPGA, namely the\n"
- " memory addresses at which the four FPGA local bus\n"
- " address spaces appear in the physical address space\n"
-);
-/* ------------------------------------------------------------------------- */
-int
-do_eecl (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
-{
- uchar data[HYMOD_EEPROM_SIZE];
- uint addr = CFG_I2C_EEPROM_ADDR;
-
- switch (argc) {
-
- case 1:
- addr |= HYMOD_EEOFF_MAIN;
- break;
-
- case 2:
- if (strcmp (argv[1], "main") == 0) {
- addr |= HYMOD_EEOFF_MAIN;
- break;
- }
- if (strcmp (argv[1], "mezz") == 0) {
- addr |= HYMOD_EEOFF_MEZZ;
- break;
- }
- /* fall through ... */
-
- default:
- printf ("Usage:\n%s\n", cmdtp->usage);
- return 1;
- }
-
- memset (data, 0, HYMOD_EEPROM_SIZE);
-
- eeprom_write (addr, 0, data, HYMOD_EEPROM_SIZE);
-
- return 0;
-}
-U_BOOT_CMD(
- eeclear, 1, 0, do_eecl,
- "eeclear - Clear the eeprom on a Hymod board \n",
- "[type]\n"
- " - write zeroes into the EEPROM on the board of type `type'\n"
- " (`type' is either `main' or `mezz' - default `main')\n"
- " Note: the EEPROM write enable jumper must be installed\n"
-);
-
-/* ------------------------------------------------------------------------- */
-
-int
-do_htest (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
-#if 0
- int rc;
-#endif
-#ifdef CONFIG_ETHER_LOOPBACK_TEST
- extern void eth_loopback_test (void);
-#endif /* CONFIG_ETHER_LOOPBACK_TEST */
-
- printf ("HYMOD tests - ensure loopbacks etc. are connected\n\n");
-
-#if 0
- /* Load FPGA with test program */
-
- printf ("Loading test FPGA program ...");
-
- rc = fpga_load (0, test_bitfile, sizeof (test_bitfile));
-
- switch (rc) {
-
- case LOAD_SUCCESS:
- printf (" SUCCEEDED\n");
- break;
-
- case LOAD_FAIL_NOCONF:
- printf (" FAILED (no configuration space defined)\n");
- return 1;
-
- case LOAD_FAIL_NOINIT:
- printf (" FAILED (timeout - no INIT signal seen)\n");
- return 1;
-
- case LOAD_FAIL_NODONE:
- printf (" FAILED (timeout - no DONE signal seen)\n");
- return 1;
-
- default:
- printf (" FAILED (unknown return code from fpga_load\n");
- return 1;
- }
-
- /* run Local Bus <=> Xilinx tests */
-
- /* tell Xilinx to run ZBT Ram, High Speed serial and Mezzanine tests */
-
- /* run SDRAM test */
-#endif
-
-#ifdef CONFIG_ETHER_LOOPBACK_TEST
- /* run Ethernet test */
- eth_loopback_test ();
-#endif /* CONFIG_ETHER_LOOPBACK_TEST */
-
- return 0;
-}
-
-#endif /* CFG_CMD_BSP */
-
-/* ------------------------------------------------------------------------- */
diff --git a/board/hymod/config.mk b/board/hymod/config.mk
deleted file mode 100644
index 0a9985f337..0000000000
--- a/board/hymod/config.mk
+++ /dev/null
@@ -1,32 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# HYMOD boards
-#
-
-TEXT_BASE = 0x40000000
-
-PLATFORM_CPPFLAGS += -I$(TOPDIR)
-
-OBJCFLAGS = --remove-section=.ppcenv
diff --git a/board/hymod/eeprom.c b/board/hymod/eeprom.c
deleted file mode 100644
index c9b9b18110..0000000000
--- a/board/hymod/eeprom.c
+++ /dev/null
@@ -1,694 +0,0 @@
-/*
- * (C) Copyright 2001
- * Murray Jensen, CSIRO-MIT, <Murray.Jensen@csiro.au>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc8260.h>
-
-/* imports from fetch.c */
-extern int fetch_and_parse (char *, ulong, int (*)(uchar *, uchar *));
-
-/* imports from input.c */
-extern int hymod_get_serno (const char *);
-
-/* this is relative to the root of the server's tftp directory */
-static char *def_bddb_cfgdir = "/hymod/bddb";
-
-static int
-hymod_eeprom_load (int which, hymod_eeprom_t *ep)
-{
- unsigned dev_addr = CFG_I2C_EEPROM_ADDR | \
- (which ? HYMOD_EEOFF_MEZZ : HYMOD_EEOFF_MAIN);
- unsigned offset = 0;
- uchar data[HYMOD_EEPROM_MAXLEN], *dp, *edp;
- hymod_eehdr_t hdr;
- ulong len, crc;
-
- memset (ep, 0, sizeof *ep);
-
- eeprom_read (dev_addr, offset, (uchar *)&hdr, sizeof (hdr));
- offset += sizeof (hdr);
-
- if (hdr.id != HYMOD_EEPROM_ID || hdr.ver > HYMOD_EEPROM_VER ||
- (len = hdr.len) > HYMOD_EEPROM_MAXLEN)
- return (0);
-
- eeprom_read (dev_addr, offset, data, len);
- offset += len;
-
- eeprom_read (dev_addr, offset, (uchar *)&crc, sizeof (ulong));
- offset += sizeof (ulong);
-
- if (crc32 (crc32 (0, (uchar *)&hdr, sizeof hdr), data, len) != crc)
- return (0);
-
- ep->ver = hdr.ver;
- dp = data; edp = dp + len;
-
- for (;;) {
- ulong rtyp;
- uchar rlen, *rdat;
-
- rtyp = *dp++;
- if ((rtyp & 0x80) == 0)
- rlen = *dp++;
- else {
- uchar islarge = rtyp & 0x40;
-
- rtyp = ((rtyp & 0x3f) << 8) | *dp++;
- if (islarge) {
- rtyp = (rtyp << 8) | *dp++;
- rtyp = (rtyp << 8) | *dp++;
- }
-
- rlen = *dp++;
- rlen = (rlen << 8) | *dp++;
- if (islarge) {
- rlen = (rlen << 8) | *dp++;
- rlen = (rlen << 8) | *dp++;
- }
- }
-
- if (rtyp == 0)
- break;
-
- rdat = dp;
- dp += rlen;
-
- if (dp > edp) /* error? */
- break;
-
- switch (rtyp) {
-
- case HYMOD_EEREC_SERNO: /* serial number */
- if (rlen == sizeof (ulong))
- ep->serno = \
- ((ulong)rdat[0] << 24) | \
- ((ulong)rdat[1] << 16) | \
- ((ulong)rdat[2] << 8) | \
- (ulong)rdat[3];
- break;
-
- case HYMOD_EEREC_DATE: /* date */
- if (rlen == sizeof (hymod_date_t)) {
- ep->date.year = ((ushort)rdat[0] << 8) | \
- (ushort)rdat[1];
- ep->date.month = rdat[2];
- ep->date.day = rdat[3];
- }
- break;
-
- case HYMOD_EEREC_BATCH: /* batch */
- if (rlen <= HYMOD_MAX_BATCH)
- memcpy (ep->batch, rdat, ep->batchlen = rlen);
- break;
-
- case HYMOD_EEREC_TYPE: /* board type */
- if (rlen == 1)
- ep->bdtype = *rdat;
- break;
-
- case HYMOD_EEREC_REV: /* board revision */
- if (rlen == 1)
- ep->bdrev = *rdat;
- break;
-
- case HYMOD_EEREC_SDRAM: /* sdram size(s) */
- if (rlen > 0 && rlen <= HYMOD_MAX_SDRAM) {
- int i;
-
- for (i = 0; i < rlen; i++)
- ep->sdramsz[i] = rdat[i];
- ep->nsdram = rlen;
- }
- break;
-
- case HYMOD_EEREC_FLASH: /* flash size(s) */
- if (rlen > 0 && rlen <= HYMOD_MAX_FLASH) {
- int i;
-
- for (i = 0; i < rlen; i++)
- ep->flashsz[i] = rdat[i];
- ep->nflash = rlen;
- }
- break;
-
- case HYMOD_EEREC_ZBT: /* zbt ram size(s) */
- if (rlen > 0 && rlen <= HYMOD_MAX_ZBT) {
- int i;
-
- for (i = 0; i < rlen; i++)
- ep->zbtsz[i] = rdat[i];
- ep->nzbt = rlen;
- }
- break;
-
- case HYMOD_EEREC_XLXTYP: /* xilinx fpga type(s) */
- if (rlen > 0 && rlen <= HYMOD_MAX_XLX) {
- int i;
-
- for (i = 0; i < rlen; i++)
- ep->xlx[i].type = rdat[i];
- ep->nxlx = rlen;
- }
- break;
-
- case HYMOD_EEREC_XLXSPD: /* xilinx fpga speed(s) */
- if (rlen > 0 && rlen <= HYMOD_MAX_XLX) {
- int i;
-
- for (i = 0; i < rlen; i++)
- ep->xlx[i].speed = rdat[i];
- }
- break;
-
- case HYMOD_EEREC_XLXTMP: /* xilinx fpga temperature(s) */
- if (rlen > 0 && rlen <= HYMOD_MAX_XLX) {
- int i;
-
- for (i = 0; i < rlen; i++)
- ep->xlx[i].temp = rdat[i];
- }
- break;
-
- case HYMOD_EEREC_XLXGRD: /* xilinx fpga grade(s) */
- if (rlen > 0 && rlen <= HYMOD_MAX_XLX) {
- int i;
-
- for (i = 0; i < rlen; i++)
- ep->xlx[i].grade = rdat[i];
- }
- break;
-
- case HYMOD_EEREC_CPUTYP: /* CPU type */
- if (rlen == 1)
- ep->mpc.type = *rdat;
- break;
-
- case HYMOD_EEREC_CPUSPD: /* CPU speed */
- if (rlen == 1)
- ep->mpc.cpuspd = *rdat;
- break;
-
- case HYMOD_EEREC_CPMSPD: /* CPM speed */
- if (rlen == 1)
- ep->mpc.cpmspd = *rdat;
- break;
-
- case HYMOD_EEREC_BUSSPD: /* bus speed */
- if (rlen == 1)
- ep->mpc.busspd = *rdat;
- break;
-
- case HYMOD_EEREC_HSTYPE: /* hs-serial chip type */
- if (rlen == 1)
- ep->hss.type = *rdat;
- break;
-
- case HYMOD_EEREC_HSCHIN: /* num hs-serial input chans */
- if (rlen == 1)
- ep->hss.nchin = *rdat;
- break;
-
- case HYMOD_EEREC_HSCHOUT: /* num hs-serial output chans */
- if (rlen == 1)
- ep->hss.nchout = *rdat;
- break;
-
- default: /* ignore */
- break;
- }
- }
-
- return (1);
-}
-
-/* maps an ascii "name=value" into a binary eeprom data record */
-typedef
- struct _eerec_map {
- char *name;
- uint type;
- uchar *(*handler) \
- (struct _eerec_map *, uchar *, uchar *, uchar *);
- uint length;
- uint maxlen;
- }
-eerec_map_t;
-
-static uchar *
-uint_handler (eerec_map_t *rp, uchar *val, uchar *dp, uchar *edp)
-{
- char *eval;
- ulong lval;
-
- lval = simple_strtol ((char *)val, &eval, 10);
-
- if ((uchar *)eval == val || *eval != '\0') {
- printf ("%s rec (%s) is not a valid uint\n", rp->name, val);
- return (NULL);
- }
-
- if (dp + 2 + rp->length > edp) {
- printf ("can't fit %s rec into eeprom\n", rp->name);
- return (NULL);
- }
-
- *dp++ = rp->type;
- *dp++ = rp->length;
-
- switch (rp->length) {
-
- case 1:
- if (lval >= 256) {
- printf ("%s rec value (%lu) out of range (0-255)\n",
- rp->name, lval);
- return (NULL);
- }
- *dp++ = lval;
- break;
-
- case 2:
- if (lval >= 65536) {
- printf ("%s rec value (%lu) out of range (0-65535)\n",
- rp->name, lval);
- return (NULL);
- }
- *dp++ = lval >> 8;
- *dp++ = lval;
- break;
-
- case 4:
- *dp++ = lval >> 24;
- *dp++ = lval >> 16;
- *dp++ = lval >> 8;
- *dp++ = lval;
- break;
-
- default:
- printf ("huh? rp->length not 1, 2 or 4! (%d)\n", rp->length);
- return (NULL);
- }
-
- return (dp);
-}
-
-static uchar *
-date_handler (eerec_map_t *rp, uchar *val, uchar *dp, uchar *edp)
-{
- hymod_date_t date;
- char *p = (char *)val;
- char *ep;
- ulong lval;
-
- lval = simple_strtol (p, &ep, 10);
- if (ep == p || *ep++ != '-') {
-bad_date:
- printf ("%s rec (%s) is not a valid date\n", rp->name, val);
- return (NULL);
- }
- if (lval >= 65536)
- goto bad_date;
- date.year = lval;
-
- lval = simple_strtol (p = ep, &ep, 10);
- if (ep == p || *ep++ != '-' || lval == 0 || lval > 12)
- goto bad_date;
- date.month = lval;
-
- lval = simple_strtol (p = ep, &ep, 10);
- if (ep == p || *ep != '\0' || lval == 0 || lval > 31)
- goto bad_date;
- date.day = lval;
-
- if (dp + 2 + rp->length > edp) {
- printf ("can't fit %s rec into eeprom\n", rp->name);
- return (NULL);
- }
-
- *dp++ = rp->type;
- *dp++ = rp->length;
- *dp++ = date.year >> 8;
- *dp++ = date.year;
- *dp++ = date.month;
- *dp++ = date.day;
-
- return (dp);
-}
-
-static uchar *
-string_handler (eerec_map_t *rp, uchar *val, uchar *dp, uchar *edp)
-{
- uint len;
-
- if ((len = strlen ((char *)val)) > rp->maxlen) {
- printf ("%s rec (%s) string is too long (%d>%d)\n",
- rp->name, val, len, rp->maxlen);
- return (NULL);
- }
-
- if (dp + 2 + len > edp) {
- printf ("can't fit %s rec into eeprom\n", rp->name);
- return (NULL);
- }
-
- *dp++ = rp->type;
- *dp++ = len;
- memcpy (dp, val, len);
- dp += len;
-
- return (dp);
-}
-
-static uchar *
-bytes_handler (eerec_map_t *rp, uchar *val, uchar *dp, uchar *edp)
-{
- uchar bytes[HYMOD_MAX_BYTES], nbytes, *p;
- char *ep;
-
- for (nbytes = 0, p = val; *p != '\0'; p = (uchar *)ep) {
- ulong lval;
-
- lval = simple_strtol ((char *)p, &ep, 10);
- if ((uchar *)ep == p || (*ep != '\0' && *ep != ',') || \
- lval >= 256) {
- printf ("%s rec (%s) byte array has invalid uint\n",
- rp->name, val);
- return (NULL);
- }
- if (nbytes >= HYMOD_MAX_BYTES) {
- printf ("%s rec (%s) byte array too long\n",
- rp->name, val);
- return (NULL);
- }
- bytes[nbytes++] = lval;
-
- if (*ep != '\0')
- ep++;
- }
-
- if (dp + 2 + nbytes > edp) {
- printf ("can't fit %s rec into eeprom\n", rp->name);
- return (NULL);
- }
-
- *dp++ = rp->type;
- *dp++ = nbytes;
- memcpy (dp, bytes, nbytes);
- dp += nbytes;
-
- return (dp);
-}
-
-static eerec_map_t eerec_map[] = {
- /* name type handler len max */
- { "serno", HYMOD_EEREC_SERNO, uint_handler, 4, 0 },
- { "date", HYMOD_EEREC_DATE, date_handler, 4, 0 },
- { "batch", HYMOD_EEREC_BATCH, string_handler, 0, HYMOD_MAX_BATCH },
- { "type", HYMOD_EEREC_TYPE, uint_handler, 1, 0 },
- { "rev", HYMOD_EEREC_REV, uint_handler, 1, 0 },
- { "sdram", HYMOD_EEREC_SDRAM, bytes_handler, 0, HYMOD_MAX_SDRAM },
- { "flash", HYMOD_EEREC_FLASH, bytes_handler, 0, HYMOD_MAX_FLASH },
- { "zbt", HYMOD_EEREC_ZBT, bytes_handler, 0, HYMOD_MAX_ZBT },
- { "xlxtyp", HYMOD_EEREC_XLXTYP, bytes_handler, 0, HYMOD_MAX_XLX },
- { "xlxspd", HYMOD_EEREC_XLXSPD, bytes_handler, 0, HYMOD_MAX_XLX },
- { "xlxtmp", HYMOD_EEREC_XLXTMP, bytes_handler, 0, HYMOD_MAX_XLX },
- { "xlxgrd", HYMOD_EEREC_XLXGRD, bytes_handler, 0, HYMOD_MAX_XLX },
- { "cputyp", HYMOD_EEREC_CPUTYP, uint_handler, 1, 0 },
- { "cpuspd", HYMOD_EEREC_CPUSPD, uint_handler, 1, 0 },
- { "cpmspd", HYMOD_EEREC_CPMSPD, uint_handler, 1, 0 },
- { "busspd", HYMOD_EEREC_BUSSPD, uint_handler, 1, 0 },
- { "hstype", HYMOD_EEREC_HSTYPE, uint_handler, 1, 0 },
- { "hschin", HYMOD_EEREC_HSCHIN, uint_handler, 1, 0 },
- { "hschout", HYMOD_EEREC_HSCHOUT, uint_handler, 1, 0 },
-};
-
-static int neerecs = sizeof eerec_map / sizeof eerec_map[0];
-
-static uchar data[HYMOD_EEPROM_SIZE], *sdp, *dp, *edp;
-
-static int
-eerec_callback (uchar *name, uchar *val)
-{
- eerec_map_t *rp;
-
- for (rp = eerec_map; rp < &eerec_map[neerecs]; rp++)
- if (strcmp ((char *)name, rp->name) == 0)
- break;
-
- if (rp >= &eerec_map[neerecs])
- return (0);
-
- if ((dp = (*rp->handler) (rp, val, dp, edp)) == NULL)
- return (0);
-
- return (1);
-}
-
-static int
-hymod_eeprom_fetch(int which, char *filename, ulong addr)
-{
- unsigned dev_addr = CFG_I2C_EEPROM_ADDR | \
- (which ? HYMOD_EEOFF_MEZZ : HYMOD_EEOFF_MAIN);
- hymod_eehdr_t *hp = (hymod_eehdr_t *)&data[0];
- ulong crc;
-
- memset (hp, 0, sizeof *hp);
- hp->id = HYMOD_EEPROM_ID;
- hp->ver = HYMOD_EEPROM_VER;
-
- dp = sdp = (uchar *)(hp + 1);
- edp = dp + HYMOD_EEPROM_MAXLEN;
-
- if (fetch_and_parse (filename, addr, eerec_callback) == 0)
- return (0);
-
- hp->len = dp - sdp;
-
- crc = crc32 (0, data, dp - data);
- memcpy (dp, &crc, sizeof (ulong));
- dp += sizeof (ulong);
-
- eeprom_write (dev_addr, 0, data, dp - data);
-
- return (1);
-}
-
-static char *type_vals[] = {
- "NONE", "IO", "CLP", "DSP", "INPUT", "ALT-INPUT", "DISPLAY"
-};
-
-static char *xlxtyp_vals[] = {
- "NONE", "XCV300E", "XCV400E", "XCV600E"
-};
-
-static char *xlxspd_vals[] = {
- "NONE", "6", "7", "8"
-};
-
-static char *xlxtmp_vals[] = {
- "NONE", "COM", "IND"
-};
-
-static char *xlxgrd_vals[] = {
- "NONE", "NORMAL", "ENGSAMP"
-};
-
-static char *cputyp_vals[] = {
- "NONE", "MPC8260"
-};
-
-static char *clk_vals[] = {
- "NONE", "33", "66", "100", "133", "166", "200"
-};
-
-static char *hstype_vals[] = {
- "NONE", "AMCC-S2064A"
-};
-
-static void
-print_mem (char *l, char *s, uchar n, uchar a[])
-{
- if (n > 0) {
- if (n == 1)
- printf ("%s%dMB %s", s, 1 << (a[0] - 20), l);
- else {
- ulong t = 0;
- int i;
-
- for (i = 0; i < n; i++)
- t += 1 << (a[i] - 20);
-
- printf ("%s%luMB %s (%d banks:", s, t, l, n);
-
- for (i = 0; i < n; i++)
- printf ("%dMB%s",
- 1 << (a[i] - 20),
- (i == n - 1) ? ")" : ",");
- }
- }
- else
- printf ("%sNO %s", s, l);
-}
-
-void
-hymod_eeprom_print (hymod_eeprom_t *ep)
-{
- int i;
-
- printf (" Hymod %s board, rev %03d\n",
- type_vals[ep->bdtype], ep->bdrev);
-
- printf (" serial #: %010lu, date %04d-%02d-%02d",
- ep->serno, ep->date.year, ep->date.month, ep->date.day);
- if (ep->batchlen > 0)
- printf (", batch \"%.*s\"", ep->batchlen, ep->batch);
- puts ("\n");
-
- switch (ep->bdtype) {
-
- case HYMOD_BDTYPE_IO:
- case HYMOD_BDTYPE_CLP:
- case HYMOD_BDTYPE_DSP:
- printf (" Motorola %s CPU, speeds: %s/%s/%s",
- cputyp_vals[ep->mpc.type], clk_vals[ep->mpc.cpuspd],
- clk_vals[ep->mpc.cpmspd], clk_vals[ep->mpc.busspd]);
-
- print_mem ("SDRAM", ", ", ep->nsdram, ep->sdramsz);
-
- print_mem ("FLASH", ", ", ep->nflash, ep->flashsz);
-
- puts ("\n");
-
- print_mem ("ZBT", " ", ep->nzbt, ep->zbtsz);
-
- if (ep->nxlx > 0) {
- hymod_xlx_t *xp;
-
- if (ep->nxlx == 1) {
- xp = &ep->xlx[0];
- printf (", Xilinx %s FPGA (%s/%s/%s)",
- xlxtyp_vals[xp->type],
- xlxspd_vals[xp->speed],
- xlxtmp_vals[xp->temp],
- xlxgrd_vals[xp->grade]);
- }
- else {
- printf (", %d Xilinx FPGAs (", ep->nxlx);
- for (i = 0; i < ep->nxlx; i++) {
- xp = &ep->xlx[i];
- printf ("%s[%s/%s/%s]%s",
- xlxtyp_vals[xp->type],
- xlxspd_vals[xp->speed],
- xlxtmp_vals[xp->temp],
- xlxgrd_vals[xp->grade],
- (i == ep->nxlx - 1) ? ")" : ", ");
- }
- }
- }
- else
- puts(", NO FPGAs");
-
- puts ("\n");
-
- if (ep->hss.type > 0)
- printf (" High Speed Serial: "
- "%s, %d input%s, %d output%s\n",
- hstype_vals[ep->hss.type],
- ep->hss.nchin,
- (ep->hss.nchin == 1 ? "" : "s"),
- ep->hss.nchout,
- (ep->hss.nchout == 1 ? "" : "s"));
- break;
-
- case HYMOD_BDTYPE_INPUT:
- case HYMOD_BDTYPE_ALTINPUT:
- case HYMOD_BDTYPE_DISPLAY:
- break;
-
- default:
- /* crap! */
- printf (" UNKNOWN BOARD TYPE: %d\n", ep->bdtype);
- break;
- }
-}
-
-int
-hymod_eeprom_read (int which, hymod_eeprom_t *ep)
-{
- char *label = which ? "mezzanine" : "main";
- unsigned dev_addr = CFG_I2C_EEPROM_ADDR | \
- (which ? HYMOD_EEOFF_MEZZ : HYMOD_EEOFF_MAIN);
- char filename[50], prompt[50], *dir;
- int serno, count = 0, rc;
-
- rc = eeprom_probe (dev_addr, 0);
-
- if (rc > 0) {
- printf ("*** probe for eeprom failed with code %d\n", rc);
- return (0);
- }
-
- if (rc < 0)
- return (rc);
-
- sprintf (prompt, "Enter %s board serial number: ", label);
-
- if ((dir = getenv ("bddb_cfgdir")) == NULL)
- dir = def_bddb_cfgdir;
-
- for (;;) {
- int rc;
-
- if (hymod_eeprom_load (which, ep))
- return (1);
-
- printf ("*** %s board EEPROM contents are %sinvalid\n",
- label, count == 0 ? "" : "STILL ");
-
- puts ("*** will fetch from server (Ctrl-C to abort)\n");
-
- serno = hymod_get_serno (prompt);
-
- if (serno < 0) {
- if (serno == -1)
- puts ("\n*** interrupted!");
- else
- puts ("\n*** timeout!");
- puts (" - ignoring eeprom contents\n");
- return (0);
- }
-
- sprintf (filename, "%s/%010d.cfg", dir, serno);
-
- printf ("*** fetching %s board EEPROM contents from server\n",
- label);
-
- rc = hymod_eeprom_fetch (which, filename, CFG_LOAD_ADDR);
-
- if (rc == 0) {
- puts ("*** fetch failed - ignoring eeprom contents\n");
- return (0);
- }
-
- count++;
- }
-}
diff --git a/board/hymod/env.c b/board/hymod/env.c
deleted file mode 100644
index f9e14213ce..0000000000
--- a/board/hymod/env.c
+++ /dev/null
@@ -1,236 +0,0 @@
-/*
- * (C) Copyright 2003
- * Murray Jensen, CSIRO-MIT, <Murray.Jensen@csiro.au>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-
-/* imports from fetch.c */
-extern int fetch_and_parse (char *, ulong, int (*)(uchar *, uchar *));
-
-/* this is relative to the root of the server's tftp directory */
-static char *def_global_env_path = "/hymod/global_env";
-
-static int
-env_callback (uchar *name, uchar *value)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- hymod_conf_t *cp = &gd->bd->bi_hymod_conf;
- char ov[CFG_CBSIZE], nv[CFG_CBSIZE], *p, *q, *nn, c, *curver, *newver;
- int override = 1, append = 0, remove = 0, nnl, ovl, nvl;
-
- nn = (char *)name;
-
- if (*nn == '-') {
- override = 0;
- nn++;
- }
-
- while (*nn == ' ' || *nn == '\t')
- nn++;
-
- if ((nnl = strlen (nn)) == 0) {
- printf ("Empty name in global env file\n");
- return (0);
- }
-
- if ((c = nn[nnl - 1]) == '+' || c == '-') {
- if (c == '+')
- append = 1;
- else
- remove = 1;
- nn[--nnl] = '\0';
- }
-
- while (nnl > 0 && ((c = nn[nnl - 1]) == ' ' || c == '\t'))
- nn[--nnl] = '\0';
- if (nnl == 0) {
- printf ("Empty name in global env file\n");
- return (0);
- }
-
- p = (char *)value;
- q = nv;
-
- while ((c = *p) == ' ' || c == '\t')
- p++;
-
- nvl = strlen (p);
- while (nvl > 0 && ((c = p[nvl - 1]) == ' ' || c == '\t'))
- p[--nvl] = '\0';
-
- while ((*q = *p++) != '\0') {
- if (*q == '%') {
- switch (*p++) {
-
- case '\0': /* whoops - back up */
- p--;
- break;
-
- case '%': /* a single percent character */
- q++;
- break;
-
- case 's': /* main board serial number as string */
- q += sprintf (q, "%010lu",
- cp->main.eeprom.serno);
- break;
-
- case 'S': /* main board serial number as number */
- q += sprintf (q, "%lu", cp->main.eeprom.serno);
- break;
-
- default: /* ignore any others */
- break;
- }
- }
- else
- q++;
- }
-
- if ((nvl = q - nv) == 0) {
- setenv (nn, NULL);
- return (1);
- }
-
- if ((curver = getenv ("global_env_version")) == NULL)
- curver = "unknown";
-
- if ((newver = getenv ("new_genv_version")) == NULL || \
- strcmp (curver, newver) == 0) {
- if (strcmp (nn, "version") == 0)
- setenv ("new_genv_version", nv);
- return (1);
- }
-
- if ((p = getenv (nn)) != NULL) {
-
- strcpy (ov, p);
- ovl = strlen (ov);
-
- if (append) {
-
- if (strstr (ov, nv) == NULL) {
-
- printf ("Appending '%s' to env var '%s'\n",
- nv, nn);
-
- while (nvl >= 0) {
- nv[ovl + 1 + nvl] = nv[nvl];
- nvl--;
- }
-
- nv[ovl] = ' ';
-
- while (--ovl >= 0)
- nv[ovl] = ov[ovl];
-
- setenv (nn, nv);
- }
-
- return (1);
- }
-
- if (remove) {
-
- if (strstr (ov, nv) != NULL) {
-
- printf ("Removing '%s' from env var '%s'\n",
- nv, nn);
-
- while ((p = strstr (ov, nv)) != NULL) {
- q = p + nvl;
- if (*q == ' ')
- q++;
- strcpy(p, q);
- }
-
- setenv (nn, ov);
- }
-
- return (1);
- }
-
- if (!override || strcmp (ov, nv) == 0)
- return (1);
-
- printf ("Re-setting env cmd '%s' from '%s' to '%s'\n",
- nn, ov, nv);
- }
- else
- printf ("Setting env cmd '%s' to '%s'\n", nn, nv);
-
- setenv (nn, nv);
- return (1);
-}
-
-void
-hymod_check_env (void)
-{
- char *p, *path, *curver, *newver;
- int firsttime = 0, needsave = 0;
-
- if (getenv ("global_env_loaded") == NULL) {
- puts ("*** global environment has never been loaded\n");
- puts ("*** fetching from server");
- firsttime = 1;
- }
- else if ((p = getenv ("always_check_env")) != NULL &&
- strcmp (p, "yes") == 0)
- puts ("*** checking for updated global environment");
- else
- return;
-
- puts (" (Control-C to Abort)\n");
-
- if ((path = getenv ("global_env_path")) == NULL || *path == '\0')
- path = def_global_env_path;
-
- if (fetch_and_parse (path, CFG_LOAD_ADDR, env_callback) == 0) {
- puts ("*** Fetch of global environment failed!\n");
- return;
- }
-
- if ((newver = getenv ("new_genv_version")) == NULL) {
- puts ("*** Version number not set - contents ignored!\n");
- return;
- }
-
- if ((curver = getenv ("global_env_version")) == NULL || \
- strcmp (curver, newver) != 0) {
- setenv ("global_env_version", newver);
- needsave = 1;
- }
- else
- printf ("*** Global environment up-to-date (ver %s)\n", curver);
-
- setenv ("new_genv_version", NULL);
-
- if (firsttime) {
- setenv ("global_env_loaded", "yes");
- needsave = 1;
- }
-
- if (needsave)
- puts ("\n*** Remember to run the 'saveenv' "
- "command to save the changes\n\n");
-}
diff --git a/board/hymod/fetch.c b/board/hymod/fetch.c
deleted file mode 100644
index e121d5565e..0000000000
--- a/board/hymod/fetch.c
+++ /dev/null
@@ -1,107 +0,0 @@
-/*
- * (C) Copyright 2001
- * Murray Jensen, CSIRO-MIT, <Murray.Jensen@csiro.au>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <net.h>
-
-/* imports from input.c */
-extern int hymod_get_ethaddr (void);
-
-int
-fetch_and_parse (char *fn, ulong addr, int (*cback)(uchar *, uchar *))
-{
- char *ethaddr;
- uchar *fp, *efp;
- int rc, count = 0;
-
- while ((ethaddr = getenv ("ethaddr")) == NULL || *ethaddr == '\0') {
-
- printf ("*** Ethernet address is%s not set\n",
- count == 0 ? "" : " STILL");
-
- if ((rc = hymod_get_ethaddr ()) < 0) {
- if (rc == -1)
- puts ("\n*** interrupted!");
- else
- puts ("\n*** timeout!");
- printf (" - fetch of '%s' aborted\n", fn);
- return (0);
- }
-
- count++;
- }
-
- copy_filename (BootFile, fn, sizeof (BootFile));
- load_addr = addr;
- NetBootFileXferSize = 0;
-
- if (NetLoop (TFTP) == 0) {
- printf ("tftp transfer of file '%s' failed\n", fn);
- return (0);
- }
-
- if (NetBootFileXferSize == 0) {
- printf ("can't determine size of file '%s'\n", fn);
- return (0);
- }
-
- fp = (uchar *)load_addr;
- efp = fp + NetBootFileXferSize;
-
- do {
- uchar *name, *value;
-
- if (*fp == '#' || *fp == '\n') {
- /* skip this line */
- while (fp < efp && *fp++ != '\n')
- ;
- continue;
- }
-
- name = fp;
-
- while (fp < efp && *fp != '=' && *fp != '\n')
- fp++;
- if (fp >= efp)
- break;
- if (*fp == '\n') {
- fp++;
- continue;
- }
- *fp++ = '\0';
-
- value = fp;
-
- while (fp < efp && *fp != '\n')
- fp++;
- if (fp[-1] == '\r')
- fp[-1] = '\0';
- *fp++ = '\0'; /* ok if we go off the end here */
-
- if ((*cback)(name, value) == 0)
- return (0);
-
- } while (fp < efp);
-
- return (1);
-}
diff --git a/board/hymod/flash.c b/board/hymod/flash.c
deleted file mode 100644
index ad0a229d9f..0000000000
--- a/board/hymod/flash.c
+++ /dev/null
@@ -1,506 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- * Hacked for the Hymod board by Murray.Jensen@csiro.au, 20-Oct-00
- */
-
-#include <common.h>
-#include <mpc8260.h>
-#include <board/hymod/flash.h>
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/*-----------------------------------------------------------------------
- * Protection Flags:
- */
-#define FLAG_PROTECT_SET 0x01
-#define FLAG_PROTECT_CLEAR 0x02
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * probe for flash bank at address "base" and store info about it
- * in the flash_info entry "fip". Fatal error if nothing there.
- */
-static void
-bank_probe (flash_info_t *fip, volatile bank_addr_t base)
-{
- volatile bank_addr_t addr;
- bank_word_t word;
- int i;
-
- /* reset the flash */
- *base = BANK_CMD_RST;
-
- /* put flash into read id mode */
- *base = BANK_CMD_RD_ID;
-
- /* check the manufacturer id - must be intel */
- word = *BANK_REG_MAN_CODE (base);
- if (word != BANK_FILL_WORD (INTEL_MANUFACT&0xff))
- panic ("\nbad manufacturer's code (0x%08lx) at addr 0x%08lx",
- (unsigned long)word, (unsigned long)base);
-
- /* check the device id */
- word = *BANK_REG_DEV_CODE (base);
- switch (word) {
-
- case BANK_FILL_WORD (INTEL_ID_28F320J5&0xff):
- fip->flash_id = FLASH_MAN_INTEL | FLASH_28F320J5;
- fip->sector_count = 32;
- break;
-
- case BANK_FILL_WORD (INTEL_ID_28F640J5&0xff):
- fip->flash_id = FLASH_MAN_INTEL | FLASH_28F640J5;
- fip->sector_count = 64;
- break;
-
- case BANK_FILL_WORD (INTEL_ID_28F320J3A&0xff):
- fip->flash_id = FLASH_MAN_INTEL | FLASH_28F320J3A;
- fip->sector_count = 32;
- break;
-
- case BANK_FILL_WORD (INTEL_ID_28F640J3A&0xff):
- fip->flash_id = FLASH_MAN_INTEL | FLASH_28F640J3A;
- fip->sector_count = 64;
- break;
-
- case BANK_FILL_WORD (INTEL_ID_28F128J3A&0xff):
- fip->flash_id = FLASH_MAN_INTEL | FLASH_28F128J3A;
- fip->sector_count = 128;
- break;
-
- default:
- panic ("\nbad device code (0x%08lx) at addr 0x%08lx",
- (unsigned long)word, (unsigned long)base);
- }
-
- if (fip->sector_count >= CFG_MAX_FLASH_SECT)
- panic ("\ntoo many sectors (%d) in flash at address 0x%08lx",
- fip->sector_count, (unsigned long)base);
-
- addr = base;
- for (i = 0; i < fip->sector_count; i++) {
- fip->start[i] = (unsigned long)addr;
- fip->protect[i] = 0;
- addr = BANK_ADDR_NEXT_BLK (addr);
- }
-
- fip->size = (bank_size_t)addr - (bank_size_t)base;
-
- /* reset the flash */
- *base = BANK_CMD_RST;
-}
-
-static void
-bank_reset (flash_info_t *info, int sect)
-{
- volatile bank_addr_t addr = (bank_addr_t)info->start[sect];
-
-#ifdef FLASH_DEBUG
- printf ("writing reset cmd to addr 0x%08lx\n", (unsigned long)addr);
-#endif
-
- *addr = BANK_CMD_RST;
-}
-
-static void
-bank_erase_init (flash_info_t *info, int sect)
-{
- volatile bank_addr_t addr = (bank_addr_t)info->start[sect];
- int flag;
-
-#ifdef FLASH_DEBUG
- printf ("erasing sector %d, addr = 0x%08lx\n",
- sect, (unsigned long)addr);
-#endif
-
- /* Disable intrs which might cause a timeout here */
- flag = disable_interrupts ();
-
-#ifdef FLASH_DEBUG
- printf ("writing erase cmd to addr 0x%08lx\n", (unsigned long)addr);
-#endif
- *addr = BANK_CMD_ERASE1;
- *addr = BANK_CMD_ERASE2;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts ();
-}
-
-static int
-bank_erase_poll (flash_info_t *info, int sect)
-{
- volatile bank_addr_t addr = (bank_addr_t)info->start[sect];
- bank_word_t stat = *addr;
-
-#ifdef FLASH_DEBUG
- printf ("checking status at addr 0x%08lx [0x%08lx]\n",
- (unsigned long)addr, (unsigned long)stat);
-#endif
-
- if ((stat & BANK_STAT_RDY) == BANK_STAT_RDY) {
- if ((stat & BANK_STAT_ERR) != 0) {
- printf ("failed on sector %d [0x%08lx] at "
- "address 0x%08lx\n", sect,
- (unsigned long)stat, (unsigned long)addr);
- *addr = BANK_CMD_CLR_STAT;
- return (-1);
- }
- else
- return (1);
- }
- else
- return (0);
-}
-
-static int
-bank_write_word (volatile bank_addr_t addr, bank_word_t value)
-{
- bank_word_t stat;
- ulong start;
- int flag, retval;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
-
- *addr = BANK_CMD_PROG;
-
- *addr = value;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts ();
-
- retval = 0;
-
- /* data polling for D7 */
- start = get_timer (0);
- do {
- if (get_timer (start) > CFG_FLASH_WRITE_TOUT) {
- retval = 1;
- goto done;
- }
- stat = *addr;
- } while ((stat & BANK_STAT_RDY) != BANK_STAT_RDY);
-
- if ((stat & BANK_STAT_ERR) != 0) {
- printf ("flash program failed [0x%08lx] at address 0x%08lx\n",
- (unsigned long)stat, (unsigned long)addr);
- *addr = BANK_CMD_CLR_STAT;
- retval = 3;
- }
-
-done:
- /* reset to read mode */
- *addr = BANK_CMD_RST;
-
- return (retval);
-}
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long
-flash_init (void)
-{
- int i;
-
- /* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- bank_probe (&flash_info[0], (bank_addr_t)CFG_FLASH_BASE);
-
- /*
- * protect monitor and environment sectors
- */
-
-#if CFG_MONITOR_BASE == CFG_FLASH_BASE
- (void)flash_protect (FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+monitor_flash_len-1,
- &flash_info[0]);
-#endif
-
-#if defined(CFG_FLASH_ENV_ADDR)
- (void)flash_protect (FLAG_PROTECT_SET,
- CFG_FLASH_ENV_ADDR,
-#if defined(CFG_FLASH_ENV_BUF)
- CFG_FLASH_ENV_ADDR + CFG_FLASH_ENV_BUF - 1,
-#else
- CFG_FLASH_ENV_ADDR + CFG_FLASH_ENV_SIZE - 1,
-#endif
- &flash_info[0]);
-#endif
-
- return flash_info[0].size;
-}
-
-/*-----------------------------------------------------------------------
- */
-void
-flash_print_info (flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_INTEL: printf ("INTEL "); break;
- default: printf ("Unknown Vendor "); break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_28F320J5: printf ("28F320J5 (32 Mbit, 2 x 16bit)\n");
- break;
- case FLASH_28F640J5: printf ("28F640J5 (64 Mbit, 2 x 16bit)\n");
- break;
- case FLASH_28F320J3A: printf ("28F320J3A (32 Mbit, 2 x 16bit)\n");
- break;
- case FLASH_28F640J3A: printf ("28F640J3A (64 Mbit, 2 x 16bit)\n");
- break;
- case FLASH_28F128J3A: printf ("28F320J3A (128 Mbit, 2 x 16bit)\n");
- break;
- default: printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " "
- );
- }
- printf ("\n");
- return;
-}
-
-/*
- * The following code cannot be run from FLASH!
- */
-
-/*-----------------------------------------------------------------------
- */
-
-int
-flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- int prot, sect, haderr;
- ulong start, now, last;
- int rcode = 0;
-
-#ifdef FLASH_DEBUG
- printf ("\nflash_erase: erase %d sectors (%d to %d incl.) from\n"
- " Bank # %d: ", s_last - s_first + 1, s_first, s_last,
- (info - flash_info) + 1);
- flash_print_info (info);
-#endif
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sector%s will not be erased\n",
- prot, (prot > 1 ? "s" : ""));
- }
-
- start = get_timer (0);
- last = 0;
- haderr = 0;
-
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- ulong estart;
- int sectdone;
-
- bank_erase_init (info, sect);
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- estart = get_timer (start);
-
- do {
- now = get_timer (start);
-
- if (now - estart > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout (sect %d)\n", sect);
- haderr = 1;
- rcode = 1;
- break;
- }
-
-#ifndef FLASH_DEBUG
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
-#endif
-
- sectdone = bank_erase_poll (info, sect);
-
- if (sectdone < 0) {
- haderr = 1;
- rcode = 1;
- break;
- }
-
- } while (!sectdone);
-
- if (haderr)
- break;
- }
- }
-
- if (haderr > 0)
- printf (" failed\n");
- else
- printf (" done\n");
-
- /* reset to read mode */
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- bank_reset (info, sect);
- }
- }
- return rcode;
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- * 3 - Program failed
- */
-static int
-write_word (flash_info_t *info, ulong dest, ulong data)
-{
- /* Check if Flash is (sufficiently) erased */
- if ((*(ulong *)dest & data) != data)
- return (2);
-
- return (bank_write_word ((bank_addr_t)dest, (bank_word_t)data));
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- * 3 - Program failed
- */
-
-int
-write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int i, l, rc;
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
- for (; i<4 && cnt>0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- if ((rc = write_word (info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = 0;
- for (i=0; i<4; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_word (info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- return (write_word (info, wp, data));
-}
-
-/*-----------------------------------------------------------------------
- */
diff --git a/board/hymod/flash.h b/board/hymod/flash.h
deleted file mode 100644
index ee047fe6e1..0000000000
--- a/board/hymod/flash.h
+++ /dev/null
@@ -1,156 +0,0 @@
-/*
- * (C) Copyright 2000
- * Murray Jensen, CSIRO-MIT, <Murray.Jensen@csiro.au>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*************** DEFINES for Intel StrataFlash FLASH chip ********************/
-
-/* Commands */
-#define ISF_CMD_RST 0xFF /* reset flash */
-#define ISF_CMD_RD_ID 0x90 /* read the id and lock bits */
-#define ISF_CMD_RD_QUERY 0x98 /* read device capabilities */
-#define ISF_CMD_RD_STAT 0x70 /* read the status register */
-#define ISF_CMD_CLR_STAT 0x50 /* clear the staus register */
-#define ISF_CMD_WR_BUF 0xE8 /* clear the staus register */
-#define ISF_CMD_PROG 0x40 /* program word command */
-#define ISF_CMD_ERASE1 0x20 /* 1st word for block erase */
-#define ISF_CMD_ERASE2 0xD0 /* 2nd word for block erase */
-#define ISF_CMD_ERASE_SUSP 0xB0 /* suspend block erase */
-#define ISF_CMD_LOCK 0x60 /* 1st word for all lock cmds */
-#define ISF_CMD_SET_LOCK_BLK 0x01 /* 2nd wrd set block lock bit */
-#define ISF_CMD_SET_LOCK_MSTR 0xF1 /* 2nd wrd set master lck bit */
-#define ISF_CMD_CLR_LOCK_BLK 0xD0 /* 2nd wrd clear blk lck bit */
-
-/* status register bits */
-#define ISF_STAT_DPS 0x02 /* Device Protect Status */
-#define ISF_STAT_VPPS 0x08 /* VPP Status */
-#define ISF_STAT_PSLBS 0x10 /* Program+Set Lock Bit Stat */
-#define ISF_STAT_ECLBS 0x20 /* Erase+Clr Lock Bit Stat */
-#define ISF_STAT_ESS 0x40 /* Erase Suspend Status */
-#define ISF_STAT_RDY 0x80 /* WSM Mach Status, 1=rdy */
-
-#define ISF_STAT_ERR (ISF_STAT_VPPS | ISF_STAT_DPS | \
- ISF_STAT_ECLBS | ISF_STAT_PSLBS)
-
-/* register addresses, valid only following an ISF_CMD_RD_ID command */
-#define ISF_REG_MAN_CODE 0x00 /* manufacturer code */
-#define ISF_REG_DEV_CODE 0x01 /* device code */
-#define ISF_REG_BLK_LCK 0x02 /* block lock configuration */
-#define ISF_REG_MST_LCK 0x03 /* master lock configuration */
-
-/********************** DEFINES for Hymod Flash ******************************/
-
-/*
- * this code requires that the flash on any Hymod board appear as a bank
- * of two (identical) 16bit Intel StrataFlash chips with 64Kword erase
- * sectors (or blocks), running in x16 bit mode and connected side-by-side
- * to make a 32-bit wide bus.
- */
-
-typedef unsigned long bank_word_t;
-typedef bank_word_t bank_blk_t[64 * 1024];
-
-#define BANK_FILL_WORD(b) (((bank_word_t)(b) << 16) | (bank_word_t)(b))
-
-#ifdef EXAMPLE
-
-/* theoretically the following examples should also work */
-
-/* one flash chip in x8 mode with 128Kword sectors and 8bit bus */
-typedef unsigned char bank_word_t;
-typedef bank_word_t bank_blk_t[128 * 1024];
-#define BANK_FILL_WORD(b) ((bank_word_t)(b))
-
-/* four flash chips in x16 mode with 32Kword sectors and 64bit bus */
-typedef unsigned long long bank_word_t;
-typedef bank_word_t bank_blk_t[32 * 1024];
-#define BANK_FILL_WORD(b) ( \
- ((bank_word_t)(b) << 48) \
- ((bank_word_t)(b) << 32) \
- ((bank_word_t)(b) << 16) \
- ((bank_word_t)(b) << 0) \
- )
-
-#endif /* EXAMPLE */
-
-/* the sizes of these two types should probably be the same */
-typedef bank_word_t *bank_addr_t;
-typedef unsigned long bank_size_t;
-
-/* align bank addresses and sizes to bank word boundaries */
-#define BANK_ADDR_WORD_ALIGN(a) ((bank_addr_t)((bank_size_t)(a) \
- & ~(sizeof (bank_word_t) - 1)))
-#define BANK_SIZE_WORD_ALIGN(s) (((bank_size_t)(s) + sizeof (bank_word_t) - 1) \
- & ~(sizeof (bank_word_t) - 1))
-
-/* align bank addresses and sizes to bank block boundaries */
-#define BANK_ADDR_BLK_ALIGN(a) ((bank_addr_t)((bank_size_t)(a) \
- & ~(sizeof (bank_blk_t) - 1)))
-#define BANK_SIZE_BLK_ALIGN(s) (((bank_size_t)(s) + sizeof (bank_blk_t) - 1) \
- & ~(sizeof (bank_blk_t) - 1))
-
-/* add an offset to a bank address */
-#define BANK_ADDR_OFFSET(a, o) ((bank_addr_t)((bank_size_t)(a) + \
- (bank_size_t)(o)))
-
-/* adjust a bank address to start of next word, block or bank */
-#define BANK_ADDR_NEXT_WORD(a) BANK_ADDR_OFFSET(BANK_ADDR_WORD_ALIGN(a), \
- sizeof (bank_word_t))
-#define BANK_ADDR_NEXT_BLK(a) BANK_ADDR_OFFSET(BANK_ADDR_BLK_ALIGN(a), \
- sizeof (bank_blk_t))
-
-/* get bank address of register r given a bank base address a and block num b */
-#define BANK_ADDR_REG(a, b, r) BANK_ADDR_OFFSET(BANK_ADDR_OFFSET((a), \
- (bank_size_t)(b) * sizeof (bank_blk_t)), \
- (bank_size_t)(r) * sizeof (bank_word_t))
-
-/* make a bank word value for each StrataFlash value */
-
-/* Commands */
-#define BANK_CMD_RST BANK_FILL_WORD(ISF_CMD_RST)
-#define BANK_CMD_RD_ID BANK_FILL_WORD(ISF_CMD_RD_ID)
-#define BANK_CMD_RD_STAT BANK_FILL_WORD(ISF_CMD_RD_STAT)
-#define BANK_CMD_CLR_STAT BANK_FILL_WORD(ISF_CMD_CLR_STAT)
-#define BANK_CMD_ERASE1 BANK_FILL_WORD(ISF_CMD_ERASE1)
-#define BANK_CMD_ERASE2 BANK_FILL_WORD(ISF_CMD_ERASE2)
-#define BANK_CMD_PROG BANK_FILL_WORD(ISF_CMD_PROG)
-#define BANK_CMD_LOCK BANK_FILL_WORD(ISF_CMD_LOCK)
-#define BANK_CMD_SET_LOCK_BLK BANK_FILL_WORD(ISF_CMD_SET_LOCK_BLK)
-#define BANK_CMD_SET_LOCK_MSTR BANK_FILL_WORD(ISF_CMD_SET_LOCK_MSTR)
-#define BANK_CMD_CLR_LOCK_BLK BANK_FILL_WORD(ISF_CMD_CLR_LOCK_BLK)
-
-/* status register bits */
-#define BANK_STAT_DPS BANK_FILL_WORD(ISF_STAT_DPS)
-#define BANK_STAT_PSS BANK_FILL_WORD(ISF_STAT_PSS)
-#define BANK_STAT_VPPS BANK_FILL_WORD(ISF_STAT_VPPS)
-#define BANK_STAT_PSLBS BANK_FILL_WORD(ISF_STAT_PSLBS)
-#define BANK_STAT_ECLBS BANK_FILL_WORD(ISF_STAT_ECLBS)
-#define BANK_STAT_ESS BANK_FILL_WORD(ISF_STAT_ESS)
-#define BANK_STAT_RDY BANK_FILL_WORD(ISF_STAT_RDY)
-
-#define BANK_STAT_ERR BANK_FILL_WORD(ISF_STAT_ERR)
-
-/* make a bank register address for each StrataFlash register address */
-
-#define BANK_REG_MAN_CODE(a) BANK_ADDR_REG((a), 0, ISF_REG_MAN_CODE)
-#define BANK_REG_DEV_CODE(a) BANK_ADDR_REG((a), 0, ISF_REG_DEV_CODE)
-#define BANK_REG_BLK_LCK(a, b) BANK_ADDR_REG((a), (b), ISF_REG_BLK_LCK)
-#define BANK_REG_MST_LCK(a) BANK_ADDR_REG((a), 0, ISF_REG_MST_LCK)
diff --git a/board/hymod/global_env b/board/hymod/global_env
deleted file mode 100644
index f61d0807df..0000000000
--- a/board/hymod/global_env
+++ /dev/null
@@ -1,161 +0,0 @@
-# DONT FORGET TO CHANGE THE "version" VAR BELOW IF YOU MAKE CHANGES TO THIS FILE
-
-# (C) Copyright 2001
-# Murray Jensen, CSIRO-MIT, <Murray.Jensen@csiro.au>
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-
-#
-# global_env
-#
-# file used by Hymod boards to initialise the u-boot non-volatile
-# environment when u-boot is first run (it determines this by the
-# absence of the environment variable "global_env_loaded")
-#
-# format of this file is:
-#
-# 1. blank lines and lines beginning with '#' are ignored
-# 2. all other lines must have the form <name>=<value>
-# 3. if a percent appears anywhere, it is replaced like so:
-#
-# %s serial number of the main board (10 digit zero filled)
-# %S serial number of the main board (plain number)
-# %% a percentage character
-# ... otherwise the %x is discarded
-#
-# if first character in <name> is a dash ('-'), then an existing env var
-# will not be overwritten (the dash is removed). i.e. it is only set if
-# it does not exist
-#
-# if last character in <name> is a plus ('+'), then <value> will be appended
-# to any existing env var (the plus is ignored). Duplicates of <value> are
-# removed.
-#
-# similarly, if the last character in <name> is a minus ('-'), then any
-# occurences of <value> in the current value of <name> will removed (the
-# minus is ignored).
-#
-# leading and trailing whitespace is removed in both <name> and <value>
-# (after processing any initial or final plus/minus in <name>).
-#
-
-# MISCELLANEOUS PARAMETERS
-
-# version must always come first
-version=4
-
-# set the ip address based on the main board serial number
-ipaddr=192.168.1.%S
-serverip=192.168.1.254
-
-# stop auto execute after tftp (not a very good name really)
-autostart=no
-
-# setting this to "yes" forces the global_env file to be loaded and processed
-# if the current version is different to the version in the file
-always_check_env=no
-
-# BOOTING COMMANDS AND PARAMETERS
-
-# command to run when "auto-booting"
-bootcmd=bootm 40080000
-
-# how long the "countdown" to automatically running "bootcmd" is
-bootdelay=2
-
-# how long before it "times out" console input and attempts to run "bootcmd"
-bootretry=5
-
-# arguments passed to the boot program (i.e. linux kernel) via register 6
-# the linux kernel (v2.4) uses the following registers:
-# r3 - address of board information structure
-# r4 - address of initial ramdisk image (0 means no initrd)
-# r5 - size of initial ramdisk image
-# r6 - address of command line string
--bootargs=root=/dev/mtdblock5 rootfstype=squashfs ro
-
-# these four are for hymod linux integrated into our Sun network
-bootargs+=serialno=%S
-bootargs+=nisclient nisdomain=mlb.dmt.csiro.au nissrvadr=138.194.112.4
-bootargs+=nfsclient
-bootargs+=automount
-
-# start a web server by default
-bootargs+=webserver
-
-# give negotiation time to finish
-bootargs+=netsleep=5
-
-# then our ciscos don't pass packets for 25-30 secs after that, so
-# pinging the server until it responds prevents network connections
-# from failing...
-bootargs+=netping
-
-# these are old bootargs - we don't need them anymore
-bootargs-=preload=unix,i2c-cpm,i2c-dev
-bootargs-=ramdisk_size=32768
-bootargs-=ramdisk_size=24576
-
-# FLASH MANIPULATION COMMANDS
-
-#
-# 16M flash, 64 x 256K sectors, mapped at address 0x40000000
-#
-# Sector(s) Address Size Description
-#
-# 0 - 0 0x40000000 256K boot code
-# 1 - 1 0x40040000 256K non volatile environment
-# 2 - 4 0x40080000 768K linux kernel image
-# 5 - 7 0x40140000 768K alternate linux kernel image
-# 8 - 47 0x40200000 10M linux initial ramdisk image
-# 48 - 63 0x40c00000 4M ramdisk image for applications
-#
-
-fetchboot=tftp 100000 /hymod/u-boot.bin
-eraseboot=protect off 1:0 ; erase 1:0 ; protect on 1:0
-copyboot=protect off 1:0 ; cp.b 100000 40000000 40000 ; protect on 1:0
-cmpboot=cmp.b 100000 40000000 40000
-newboot=run fetchboot eraseboot copyboot cmpboot
-
-fetchlinux=tftp 100000 /hymod/linux.bin
-eraselinux=erase 1:2-4
-copylinux=cp.b 100000 40080000 ${filesize}
-cmplinux=cmp.b 100000 40080000 ${filesize}
-newlinux=run fetchlinux eraselinux copylinux cmplinux
-
-fetchaltlinux=tftp 100000 /hymod/altlinux.bin
-erasealtlinux=erase 1:5-7
-copyaltlinux=cp.b 100000 40140000 ${filesize}
-cmpaltlinux=cmp.b 100000 40140000 ${filesize}
-newaltlinux=run fetchaltlinux erasealtlinux copyaltlinux cmpaltlinux
-
-fetchroot=tftp 100000 /hymod/root.bin
-eraseroot=erase 1:8-47
-copyroot=cp.b 100000 40200000 ${filesize}
-cmproot=cmp.b 100000 40200000 ${filesize}
-newroot=run fetchroot eraseroot copyroot cmproot
-
-fetchard=tftp 100000 /hymod/apprd.bin
-eraseard=erase 1:48-63
-copyard=cp.b 100000 40c00000 ${filesize}
-cmpard=cmp.b 100000 40c00000 ${filesize}
-newapprd=run fetchard eraseard copyard cmpard
-
-# pass above map to linux mtd driver
-bootargs+=mtdparts=phys:256k(u-boot),256k(u-boot-env),768k(linux),768k(altlinux),10m(root),4m(hymod)
diff --git a/board/hymod/hymod.c b/board/hymod/hymod.c
deleted file mode 100644
index dea0a70a23..0000000000
--- a/board/hymod/hymod.c
+++ /dev/null
@@ -1,537 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- * Hacked for the Hymod board by Murray.Jensen@csiro.au, 20-Oct-00
- */
-
-#include <common.h>
-#include <mpc8260.h>
-#include <mpc8260_irq.h>
-#include <ioports.h>
-#include <i2c.h>
-#include <asm/iopin_8260.h>
-
-/* ------------------------------------------------------------------------- */
-
-/* imports from eeprom.c */
-extern int hymod_eeprom_read (int, hymod_eeprom_t *);
-extern void hymod_eeprom_print (hymod_eeprom_t *);
-
-/* imports from env.c */
-extern void hymod_check_env (void);
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * I/O Port configuration table
- *
- * if conf is 1, then that port pin will be configured at boot time
- * according to the five values podr/pdir/ppar/psor/pdat for that entry
- */
-
-const iop_conf_t iop_conf_tab[4][32] = {
-
- /* Port A configuration */
- {
- /* cnf par sor dir odr dat */
- { 1, 1, 1, 0, 0, 0 }, /* PA31: FCC1 MII COL */
- { 1, 1, 1, 0, 0, 0 }, /* PA30: FCC1 MII CRS */
- { 1, 1, 1, 1, 0, 0 }, /* PA29: FCC1 MII TX_ER */
- { 1, 1, 1, 1, 0, 0 }, /* PA28: FCC1 MII TX_EN */
- { 1, 1, 1, 0, 0, 0 }, /* PA27: FCC1 MII RX_DV */
- { 1, 1, 1, 0, 0, 0 }, /* PA26: FCC1 MII RX_ER */
- { 1, 0, 0, 1, 0, 0 }, /* PA25: FCC2 MII MDIO */
- { 1, 0, 0, 1, 0, 0 }, /* PA24: FCC2 MII MDC */
- { 1, 0, 0, 1, 0, 0 }, /* PA23: FCC3 MII MDIO */
- { 1, 0, 0, 1, 0, 0 }, /* PA22: FCC3 MII MDC */
- { 1, 1, 0, 1, 0, 0 }, /* PA21: FCC1 MII TxD[3] */
- { 1, 1, 0, 1, 0, 0 }, /* PA20: FCC1 MII TxD[2] */
- { 1, 1, 0, 1, 0, 0 }, /* PA19: FCC1 MII TxD[1] */
- { 1, 1, 0, 1, 0, 0 }, /* PA18: FCC1 MII TxD[0] */
- { 1, 1, 0, 0, 0, 0 }, /* PA17: FCC1 MII RxD[3] */
- { 1, 1, 0, 0, 0, 0 }, /* PA16: FCC1 MII RxD[2] */
- { 1, 1, 0, 0, 0, 0 }, /* PA15: FCC1 MII RxD[1] */
- { 1, 1, 0, 0, 0, 0 }, /* PA14: FCC1 MII RxD[0] */
- { 1, 0, 0, 1, 0, 0 }, /* PA13: FCC1 MII MDIO */
- { 1, 0, 0, 1, 0, 0 }, /* PA12: FCC1 MII MDC */
- { 1, 0, 0, 1, 0, 0 }, /* PA11: SEL_CD */
- { 1, 0, 0, 0, 0, 0 }, /* PA10: FLASH STS1 */
- { 1, 0, 0, 0, 0, 0 }, /* PA09: FLASH STS0 */
- { 1, 0, 0, 0, 0, 0 }, /* PA08: FLASH ~PE */
- { 1, 0, 0, 0, 0, 0 }, /* PA07: WATCH ~HRESET */
- { 1, 0, 0, 0, 1, 0 }, /* PA06: VC DONE */
- { 1, 0, 0, 1, 1, 0 }, /* PA05: VC INIT */
- { 1, 0, 0, 1, 0, 0 }, /* PA04: VC ~PROG */
- { 1, 0, 0, 1, 0, 0 }, /* PA03: VM ENABLE */
- { 1, 0, 0, 0, 1, 0 }, /* PA02: VM DONE */
- { 1, 0, 0, 1, 1, 0 }, /* PA01: VM INIT */
- { 1, 0, 0, 1, 0, 0 } /* PA00: VM ~PROG */
- },
-
- /* Port B configuration */
- {
- /* cnf par sor dir odr dat */
- { 1, 1, 0, 1, 0, 0 }, /* PB31: FCC2 MII TX_ER */
- { 1, 1, 0, 0, 0, 0 }, /* PB30: FCC2 MII RX_DV */
- { 1, 1, 1, 1, 0, 0 }, /* PB29: FCC2 MII TX_EN */
- { 1, 1, 0, 0, 0, 0 }, /* PB28: FCC2 MII RX_ER */
- { 1, 1, 0, 0, 0, 0 }, /* PB27: FCC2 MII COL */
- { 1, 1, 0, 0, 0, 0 }, /* PB26: FCC2 MII CRS */
- { 1, 1, 0, 1, 0, 0 }, /* PB25: FCC2 MII TxD[3] */
- { 1, 1, 0, 1, 0, 0 }, /* PB24: FCC2 MII TxD[2] */
- { 1, 1, 0, 1, 0, 0 }, /* PB23: FCC2 MII TxD[1] */
- { 1, 1, 0, 1, 0, 0 }, /* PB22: FCC2 MII TxD[0] */
- { 1, 1, 0, 0, 0, 0 }, /* PB21: FCC2 MII RxD[0] */
- { 1, 1, 0, 0, 0, 0 }, /* PB20: FCC2 MII RxD[1] */
- { 1, 1, 0, 0, 0, 0 }, /* PB19: FCC2 MII RxD[2] */
- { 1, 1, 0, 0, 0, 0 }, /* PB18: FCC2 MII RxD[3] */
- { 1, 1, 0, 0, 0, 0 }, /* PB17: FCC3 MII RX_DV */
- { 1, 1, 0, 0, 0, 0 }, /* PB16: FCC3 MII RX_ER */
- { 1, 1, 0, 1, 0, 0 }, /* PB15: FCC3 MII TX_ER */
- { 1, 1, 0, 1, 0, 0 }, /* PB14: FCC3 MII TX_EN */
- { 1, 1, 0, 0, 0, 0 }, /* PB13: FCC3 MII COL */
- { 1, 1, 0, 0, 0, 0 }, /* PB12: FCC3 MII CRS */
- { 1, 1, 0, 0, 0, 0 }, /* PB11: FCC3 MII RxD[3] */
- { 1, 1, 0, 0, 0, 0 }, /* PB10: FCC3 MII RxD[2] */
- { 1, 1, 0, 0, 0, 0 }, /* PB09: FCC3 MII RxD[1] */
- { 1, 1, 0, 0, 0, 0 }, /* PB08: FCC3 MII RxD[0] */
- { 1, 1, 0, 1, 0, 0 }, /* PB07: FCC3 MII TxD[3] */
- { 1, 1, 0, 1, 0, 0 }, /* PB06: FCC3 MII TxD[2] */
- { 1, 1, 0, 1, 0, 0 }, /* PB05: FCC3 MII TxD[1] */
- { 1, 1, 0, 1, 0, 0 }, /* PB04: FCC3 MII TxD[0] */
- { 0, 0, 0, 0, 0, 0 }, /* PB03: pin doesn't exist */
- { 0, 0, 0, 0, 0, 0 }, /* PB02: pin doesn't exist */
- { 0, 0, 0, 0, 0, 0 }, /* PB01: pin doesn't exist */
- { 0, 0, 0, 0, 0, 0 } /* PB00: pin doesn't exist */
- },
-
- /* Port C configuration */
- {
- /* cnf par sor dir odr dat */
- { 1, 0, 0, 0, 0, 0 }, /* PC31: MEZ ~IACK */
- { 0, 0, 0, 0, 0, 0 }, /* PC30: ? */
- { 1, 1, 0, 0, 0, 0 }, /* PC29: CLK SCCx */
- { 1, 1, 0, 0, 0, 0 }, /* PC28: CLK4 */
- { 1, 1, 0, 0, 0, 0 }, /* PC27: CLK SCCF */
- { 1, 1, 0, 0, 0, 0 }, /* PC26: CLK 32K */
- { 1, 1, 0, 0, 0, 0 }, /* PC25: BRG4/CLK7 */
- { 0, 0, 0, 0, 0, 0 }, /* PC24: ? */
- { 1, 1, 0, 0, 0, 0 }, /* PC23: CLK SCCx */
- { 1, 1, 0, 0, 0, 0 }, /* PC22: FCC1 MII RX_CLK */
- { 1, 1, 0, 0, 0, 0 }, /* PC21: FCC1 MII TX_CLK */
- { 1, 1, 0, 0, 0, 0 }, /* PC20: CLK SCCF */
- { 1, 1, 0, 0, 0, 0 }, /* PC19: FCC2 MII RX_CLK */
- { 1, 1, 0, 0, 0, 0 }, /* PC18: FCC2 MII TX_CLK */
- { 1, 1, 0, 0, 0, 0 }, /* PC17: FCC3 MII RX_CLK */
- { 1, 1, 0, 0, 0, 0 }, /* PC16: FCC3 MII TX_CLK */
- { 1, 0, 0, 0, 0, 0 }, /* PC15: SCC1 UART ~CTS */
- { 1, 0, 0, 0, 0, 0 }, /* PC14: SCC1 UART ~CD */
- { 1, 0, 0, 0, 0, 0 }, /* PC13: SCC2 UART ~CTS */
- { 1, 0, 0, 0, 0, 0 }, /* PC12: SCC2 UART ~CD */
- { 1, 0, 0, 1, 0, 0 }, /* PC11: SCC1 UART ~DTR */
- { 1, 0, 0, 1, 0, 0 }, /* PC10: SCC1 UART ~DSR */
- { 1, 0, 0, 1, 0, 0 }, /* PC09: SCC2 UART ~DTR */
- { 1, 0, 0, 1, 0, 0 }, /* PC08: SCC2 UART ~DSR */
- { 1, 0, 0, 0, 0, 0 }, /* PC07: TEMP ~ALERT */
- { 1, 0, 0, 0, 0, 0 }, /* PC06: FCC3 INT */
- { 1, 0, 0, 0, 0, 0 }, /* PC05: FCC2 INT */
- { 1, 0, 0, 0, 0, 0 }, /* PC04: FCC1 INT */
- { 0, 1, 1, 1, 0, 0 }, /* PC03: SDMA IDMA2 ~DACK */
- { 0, 1, 1, 0, 0, 0 }, /* PC02: SDMA IDMA2 ~DONE */
- { 0, 1, 0, 0, 0, 0 }, /* PC01: SDMA IDMA2 ~DREQ */
- { 1, 1, 0, 1, 0, 0 } /* PC00: BRG7 */
- },
-
- /* Port D configuration */
- {
- /* cnf par sor dir odr dat */
- { 1, 1, 0, 0, 0, 0 }, /* PD31: SCC1 UART RxD */
- { 1, 1, 1, 1, 0, 0 }, /* PD30: SCC1 UART TxD */
- { 1, 0, 0, 1, 0, 0 }, /* PD29: SCC1 UART ~RTS */
- { 1, 1, 0, 0, 0, 0 }, /* PD28: SCC2 UART RxD */
- { 1, 1, 0, 1, 0, 0 }, /* PD27: SCC2 UART TxD */
- { 1, 0, 0, 1, 0, 0 }, /* PD26: SCC2 UART ~RTS */
- { 1, 0, 0, 0, 0, 0 }, /* PD25: SCC1 UART ~RI */
- { 1, 0, 0, 0, 0, 0 }, /* PD24: SCC2 UART ~RI */
- { 1, 0, 0, 1, 0, 0 }, /* PD23: CLKGEN PD */
- { 1, 0, 0, 0, 0, 0 }, /* PD22: USER3 */
- { 1, 0, 0, 0, 0, 0 }, /* PD21: USER2 */
- { 1, 0, 0, 0, 0, 0 }, /* PD20: USER1 */
- { 1, 1, 1, 0, 0, 0 }, /* PD19: SPI ~SEL */
- { 1, 1, 1, 0, 0, 0 }, /* PD18: SPI CLK */
- { 1, 1, 1, 0, 0, 0 }, /* PD17: SPI MOSI */
- { 1, 1, 1, 0, 0, 0 }, /* PD16: SPI MISO */
- { 1, 1, 1, 0, 1, 0 }, /* PD15: I2C SDA */
- { 1, 1, 1, 0, 1, 0 }, /* PD14: I2C SCL */
- { 1, 0, 0, 1, 0, 1 }, /* PD13: TEMP ~STDBY */
- { 1, 0, 0, 1, 0, 1 }, /* PD12: FCC3 ~RESET */
- { 1, 0, 0, 1, 0, 1 }, /* PD11: FCC2 ~RESET */
- { 1, 0, 0, 1, 0, 1 }, /* PD10: FCC1 ~RESET */
- { 1, 0, 0, 0, 0, 0 }, /* PD09: PD9 */
- { 1, 0, 0, 0, 0, 0 }, /* PD08: PD8 */
- { 1, 0, 0, 1, 0, 1 }, /* PD07: PD7 */
- { 1, 0, 0, 1, 0, 1 }, /* PD06: PD6 */
- { 1, 0, 0, 1, 0, 1 }, /* PD05: PD5 */
- { 1, 0, 0, 1, 0, 1 }, /* PD04: PD4 */
- { 0, 0, 0, 0, 0, 0 }, /* PD03: pin doesn't exist */
- { 0, 0, 0, 0, 0, 0 }, /* PD02: pin doesn't exist */
- { 0, 0, 0, 0, 0, 0 }, /* PD01: pin doesn't exist */
- { 0, 0, 0, 0, 0, 0 } /* PD00: pin doesn't exist */
- }
-};
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * AMI FS6377 Clock Generator configuration table
- *
- * the "fs6377_regs[]" table entries correspond to FS6377 registers
- * 0 - 15 (total of 16 bytes).
- *
- * the data is written to the FS6377 via the i2c bus using address in
- * "fs6377_addr" (address is 7 bits - R/W bit not included).
- *
- * The fs6377 has four clock outputs: A, B, C and D.
- *
- * Outputs C and D can each provide two different clock outputs C1/D1 or
- * C2/D2 depending on the state of the SEL_CD input which is connected to
- * the MPC8260 I/O port pin PA11. PA11 output (SEL_CD input) low (or 0)
- * selects C1/D1 and PA11 output (SEL_CD input) high (or 1) selects C2/D2.
- *
- * PA11 defaults to output low (or 0) in the i/o port config table above.
- *
- * Output A provides a 100MHz for the High Speed Serial chips. Output B
- * provides a 3.6864MHz clock for more accurate asynchronous serial bit
- * rates. Output C is routed to the mezzanine connector but is currently
- * unused - both C1 and C2 are set to 16MHz. Output D is used by both the
- * alt-input and display mezzanine boards for their video chips. The
- * alt-input board requires a clock of 24.576MHz and this is available on
- * D1 (PA11=SEL_CD=0). The display board requires a clock of 27MHz and this
- * is available on D2 (PA11=SEL_CD=1).
- *
- * So the default is a clock suitable for the alt-input board. PA11 is toggled
- * later in misc_init_r(), if a display board is detected.
- */
-
-uchar fs6377_addr = 0x5c;
-
-uchar fs6377_regs[16] = {
- 12, 75, 64, 25, 144, 128, 25, 192,
- 0, 16, 135, 192, 224, 64, 64, 192
-};
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * special board initialisation, after clocks and timebase have been
- * set up but before environment and serial are initialised.
- *
- * added so that very early initialisations can be done using the i2c
- * driver (which requires the clocks, to calculate the dividers, and
- * the timebase, for udelay())
- */
-
-int
-board_postclk_init (void)
-{
- i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
-
- /*
- * Initialise the FS6377 clock chip
- *
- * the secondary address is the register number from where to
- * start the write - I want to write all the registers
- *
- * don't bother checking return status - we have no console yet
- * to print it on, nor any RAM to store it in - it will be obvious
- * if this doesn't work
- */
- (void) i2c_write (fs6377_addr, 0, 1, fs6377_regs,
- sizeof (fs6377_regs));
-
- return (0);
-}
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Check Board Identity: Hardwired to HYMOD
- */
-
-int
-checkboard (void)
-{
- puts ("Board: HYMOD\n");
- return (0);
-}
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * miscellaneous (early - while running in flash) initialisations.
- */
-
-#define _NOT_USED_ 0xFFFFFFFF
-
-uint upmb_table[] = {
- /* Read Single Beat (RSS) - offset 0x00 */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /* Read Burst (RBS) - offset 0x08 */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /* Write Single Beat (WSS) - offset 0x18 */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /* Write Burst (WSS) - offset 0x20 */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /* Refresh Timer (PTS) - offset 0x30 */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /* Exception Condition (EXS) - offset 0x3c */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_
-};
-
-uint upmc_table[] = {
- /* Read Single Beat (RSS) - offset 0x00 */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /* Read Burst (RBS) - offset 0x08 */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /* Write Single Beat (WSS) - offset 0x18 */
- 0xF0E00000, 0xF0A00000, 0x00A00000, 0x30A00000,
- 0xF0F40007, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /* Write Burst (WSS) - offset 0x20 */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /* Refresh Timer (PTS) - offset 0x30 */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /* Exception Condition (EXS) - offset 0x3c */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_
-};
-
-int
-misc_init_f (void)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8260_t *memctl = &immap->im_memctl;
-
- printf ("UPMs: ");
-
- upmconfig (UPMB, upmb_table, sizeof upmb_table / sizeof upmb_table[0]);
- memctl->memc_mbmr = CFG_MBMR;
-
- upmconfig (UPMC, upmc_table, sizeof upmc_table / sizeof upmc_table[0]);
- memctl->memc_mcmr = CFG_MCMR;
-
- printf ("configured\n");
- return (0);
-}
-
-/* ------------------------------------------------------------------------- */
-
-long
-initdram (int board_type)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8260_t *memctl = &immap->im_memctl;
- volatile uchar c = 0, *ramaddr = (uchar *) (CFG_SDRAM_BASE + 0x8);
- ulong psdmr = CFG_PSDMR;
- int i;
-
- /*
- * Quote from 8260 UM (10.4.2 SDRAM Power-On Initialization, 10-35):
- *
- * "At system reset, initialization software must set up the
- * programmable parameters in the memory controller banks registers
- * (ORx, BRx, P/LSDMR). After all memory parameters are conÞgured,
- * system software should execute the following initialization sequence
- * for each SDRAM device.
- *
- * 1. Issue a PRECHARGE-ALL-BANKS command
- * 2. Issue eight CBR REFRESH commands
- * 3. Issue a MODE-SET command to initialize the mode register
- *
- * The initial commands are executed by setting P/LSDMR[OP] and
- * accessing the SDRAM with a single-byte transaction."
- *
- * The appropriate BRx/ORx registers have already been set when we
- * get here. The SDRAM can be accessed at the address CFG_SDRAM_BASE.
- */
-
- memctl->memc_psrt = CFG_PSRT;
- memctl->memc_mptpr = CFG_MPTPR;
-
- memctl->memc_psdmr = psdmr | PSDMR_OP_PREA;
- *ramaddr = c;
-
- memctl->memc_psdmr = psdmr | PSDMR_OP_CBRR;
- for (i = 0; i < 8; i++)
- *ramaddr = c;
-
- memctl->memc_psdmr = psdmr | PSDMR_OP_MRW;
- *ramaddr = c;
-
- memctl->memc_psdmr = psdmr | PSDMR_OP_NORM | PSDMR_RFEN;
- *ramaddr = c;
-
- return (CFG_SDRAM_SIZE << 20);
-}
-
-/* ------------------------------------------------------------------------- */
-/* miscellaneous initialisations after relocation into ram (misc_init_r) */
-/* */
-/* loads the data in the main board and mezzanine board eeproms into */
-/* the hymod configuration struct stored in the board information area. */
-/* */
-/* if the contents of either eeprom is invalid, prompts for a serial */
-/* number (and an ethernet address if required) then fetches a file */
-/* containing information to be stored in the eeprom from the tftp server */
-/* (the file name is based on the serial number and a built-in path) */
-
-int
-last_stage_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- hymod_conf_t *cp = &gd->bd->bi_hymod_conf;
- int rc;
-
-#ifdef CONFIG_BOOT_RETRY_TIME
- /*
- * we use the readline () function, but we also want
- * command timeout enabled
- */
- init_cmd_timeout ();
-#endif
-
- memset ((void *) cp, 0, sizeof (*cp));
-
- /* set up main board config info */
-
- rc = hymod_eeprom_read (0, &cp->main.eeprom);
-
- puts ("EEPROM:main...");
- if (rc < 0)
- puts ("NOT PRESENT\n");
- else if (rc == 0)
- puts ("INVALID\n");
- else {
- cp->main.eeprom.valid = 1;
-
- printf ("OK (ver %u)\n", cp->main.eeprom.ver);
- hymod_eeprom_print (&cp->main.eeprom);
-
- /*
- * hard-wired assumption here: all hymod main boards will have
- * one xilinx fpga, with the interrupt line connected to IRQ2
- *
- * One day, this might be based on the board type
- */
-
- cp->main.xlx[0].mmap.prog.exists = 1;
- cp->main.xlx[0].mmap.prog.size = FPGA_MAIN_CFG_SIZE;
- cp->main.xlx[0].mmap.prog.base = FPGA_MAIN_CFG_BASE;
-
- cp->main.xlx[0].mmap.reg.exists = 1;
- cp->main.xlx[0].mmap.reg.size = FPGA_MAIN_REG_SIZE;
- cp->main.xlx[0].mmap.reg.base = FPGA_MAIN_REG_BASE;
-
- cp->main.xlx[0].mmap.port.exists = 1;
- cp->main.xlx[0].mmap.port.size = FPGA_MAIN_PORT_SIZE;
- cp->main.xlx[0].mmap.port.base = FPGA_MAIN_PORT_BASE;
-
- cp->main.xlx[0].iopins.prog_pin.port = FPGA_MAIN_PROG_PORT;
- cp->main.xlx[0].iopins.prog_pin.pin = FPGA_MAIN_PROG_PIN;
- cp->main.xlx[0].iopins.prog_pin.flag = 1;
- cp->main.xlx[0].iopins.init_pin.port = FPGA_MAIN_INIT_PORT;
- cp->main.xlx[0].iopins.init_pin.pin = FPGA_MAIN_INIT_PIN;
- cp->main.xlx[0].iopins.init_pin.flag = 1;
- cp->main.xlx[0].iopins.done_pin.port = FPGA_MAIN_DONE_PORT;
- cp->main.xlx[0].iopins.done_pin.pin = FPGA_MAIN_DONE_PIN;
- cp->main.xlx[0].iopins.done_pin.flag = 1;
-#ifdef FPGA_MAIN_ENABLE_PORT
- cp->main.xlx[0].iopins.enable_pin.port = FPGA_MAIN_ENABLE_PORT;
- cp->main.xlx[0].iopins.enable_pin.pin = FPGA_MAIN_ENABLE_PIN;
- cp->main.xlx[0].iopins.enable_pin.flag = 1;
-#endif
-
- cp->main.xlx[0].irq = FPGA_MAIN_IRQ;
- }
-
- /* set up mezzanine board config info */
-
- rc = hymod_eeprom_read (1, &cp->mezz.eeprom);
-
- puts ("EEPROM:mezz...");
- if (rc < 0)
- puts ("NOT PRESENT\n");
- else if (rc == 0)
- puts ("INVALID\n");
- else {
- cp->main.eeprom.valid = 1;
-
- printf ("OK (ver %u)\n", cp->mezz.eeprom.ver);
- hymod_eeprom_print (&cp->mezz.eeprom);
- }
-
- cp->crc = crc32 (0, (unsigned char *)cp, offsetof (hymod_conf_t, crc));
-
- hymod_check_env ();
-
- return (0);
-}
-
-#ifdef CONFIG_SHOW_ACTIVITY
-void board_show_activity (ulong timebase)
-{
-#ifdef CFG_HYMOD_DBLEDS
- volatile immap_t *immr = (immap_t *) CFG_IMMR;
- volatile iop8260_t *iop = &immr->im_ioport;
- static int shift = 0;
-
- if ((timestamp % CFG_HZ) == 0) {
- if (++shift > 3)
- shift = 0;
- iop->iop_pdatd =
- (iop->iop_pdatd & ~0x0f000000) | (1 << (24 + shift));
- }
-#endif /* CFG_HYMOD_DBLEDS */
-}
-
-void show_activity(int arg)
-{
-}
-#endif /* CONFIG_SHOW_ACTIVITY */
diff --git a/board/hymod/hymod.h b/board/hymod/hymod.h
deleted file mode 100644
index 9d8d66271f..0000000000
--- a/board/hymod/hymod.h
+++ /dev/null
@@ -1,322 +0,0 @@
-/*
- * (C) Copyright 2001
- * Murray Jensen, CSIRO-MIT, <Murray.Jensen@csiro.au>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef _HYMOD_H_
-#define _HYMOD_H_
-
-#include <linux/config.h>
-#ifdef CONFIG_8260
-#include <asm/iopin_8260.h>
-#endif
-
-/*
- * hymod configuration data - passed by boot code via the board information
- * structure (only U-Boot has support for this at the moment)
- *
- * there are three types of data passed up from the boot monitor. the first
- * (type hymod_eeprom_t) is the eeprom data that was read off both the main
- * (or mother) board and the mezzanine board (if any). this data defines how
- * many Xilinx fpgas are on each board, and their types (among other things).
- * the second type of data (type xlx_mmap_t, one per Xilinx fpga) defines where
- * in the physical address space the various Xilinx fpga access regions have
- * been mapped by the boot rom. the third type of data (type xlx_iopins_t,
- * one per Xilinx fpga) defines which io port pins are connected to the various
- * signals required to program a Xilinx fpga.
- *
- * A ram/flash "bank" refers to memory controlled by the same chip select.
- *
- * the eeprom contents are defined as in technical note #2 - basically,
- * a header, zero or more records in no particular order, and a 32 bit crc
- * a record is 1 or more type bytes, a length byte and "length" bytes.
- */
-
-#define HYMOD_EEPROM_ID 0xAA /* eeprom id byte */
-#define HYMOD_EEPROM_VER 1 /* eeprom contents version (0-127) */
-#define HYMOD_EEPROM_SIZE 256 /* number of bytes in the eeprom */
-
-/* eeprom header */
-typedef
- struct {
- unsigned char id; /* eeprom id byte */
- unsigned char :1;
- unsigned char ver:7; /* eeprom contents version number */
- unsigned long len; /* total # of bytes btw hdr and crc */
- }
-hymod_eehdr_t;
-
-/* maximum number of bytes available for eeprom data records */
-#define HYMOD_EEPROM_MAXLEN (HYMOD_EEPROM_SIZE \
- - sizeof (hymod_eehdr_t) \
- - sizeof (unsigned long))
-
-/* eeprom data record */
-typedef
- union {
- struct {
- unsigned char topbit:1;
- unsigned char type:7;
- unsigned char len;
- unsigned char data[1]; /* variable length */
- } small;
- struct {
- unsigned short topbit:1;
- unsigned short nxtbit:1;
- unsigned short type:14;
- unsigned short len;
- unsigned char data[1]; /* variable length */
- } medium;
- struct {
- unsigned long topbit:1;
- unsigned long nxtbit:1;
- unsigned long type:30;
- unsigned long len;
- unsigned char data[1]; /* variable length */
- } large;
- }
-hymod_eerec_t;
-
-#define HYMOD_EEOFF_MAIN 0x00 /* i2c addr offset for main eeprom */
-#define HYMOD_EEOFF_MEZZ 0x04 /* i2c addr offset for mezz eepomr */
-
-/* eeprom record types */
-#define HYMOD_EEREC_SERNO 1 /* serial number */
-#define HYMOD_EEREC_DATE 2 /* date */
-#define HYMOD_EEREC_BATCH 3 /* batch id */
-#define HYMOD_EEREC_TYPE 4 /* board type */
-#define HYMOD_EEREC_REV 5 /* revision number */
-#define HYMOD_EEREC_SDRAM 6 /* sdram sizes */
-#define HYMOD_EEREC_FLASH 7 /* flash sizes */
-#define HYMOD_EEREC_ZBT 8 /* zbt ram sizes */
-#define HYMOD_EEREC_XLXTYP 9 /* Xilinx fpga types */
-#define HYMOD_EEREC_XLXSPD 10 /* Xilinx fpga speeds */
-#define HYMOD_EEREC_XLXTMP 11 /* Xilinx fpga temperatures */
-#define HYMOD_EEREC_XLXGRD 12 /* Xilinx fpga grades */
-#define HYMOD_EEREC_CPUTYP 13 /* Motorola CPU type */
-#define HYMOD_EEREC_CPUSPD 14 /* CPU speed */
-#define HYMOD_EEREC_BUSSPD 15 /* bus speed */
-#define HYMOD_EEREC_CPMSPD 16 /* CPM speed */
-#define HYMOD_EEREC_HSTYPE 17 /* high-speed serial chip type */
-#define HYMOD_EEREC_HSCHIN 18 /* high-speed serial input channels */
-#define HYMOD_EEREC_HSCHOUT 19 /* high-speed serial output channels */
-
-/* some dimensions */
-#define HYMOD_MAX_BATCH 32 /* max no. of bytes in batch id */
-#define HYMOD_MAX_SDRAM 4 /* max sdram "banks" on any board */
-#define HYMOD_MAX_FLASH 4 /* max flash "banks" on any board */
-#define HYMOD_MAX_ZBT 16 /* max ZBT rams on any board */
-#define HYMOD_MAX_XLX 4 /* max Xilinx fpgas on any board */
-
-#define HYMOD_MAX_BYTES 16 /* enough to store any bytes array */
-
-/* board types */
-#define HYMOD_BDTYPE_NONE 0 /* information not present */
-#define HYMOD_BDTYPE_IO 1 /* I/O main board */
-#define HYMOD_BDTYPE_CLP 2 /* CLP main board */
-#define HYMOD_BDTYPE_DSP 3 /* DSP main board */
-#define HYMOD_BDTYPE_INPUT 4 /* video input mezzanine board */
-#define HYMOD_BDTYPE_ALTINPUT 5 /* video input mezzanine board */
-#define HYMOD_BDTYPE_DISPLAY 6 /* video display mezzanine board */
-#define HYMOD_BDTYPE_MAX 7 /* first invalid value */
-
-/* Xilinx fpga types */
-#define HYMOD_XTYP_NONE 0 /* information not present */
-#define HYMOD_XTYP_XCV300E 1 /* Xilinx Virtex 300 */
-#define HYMOD_XTYP_XCV400E 2 /* Xilinx Virtex 400 */
-#define HYMOD_XTYP_XCV600E 3 /* Xilinx Virtex 600 */
-#define HYMOD_XTYP_MAX 4 /* first invalid value */
-
-/* Xilinx fpga speeds */
-#define HYMOD_XSPD_NONE 0 /* information not present */
-#define HYMOD_XSPD_SIX 1
-#define HYMOD_XSPD_SEVEN 2
-#define HYMOD_XSPD_EIGHT 3
-#define HYMOD_XSPD_MAX 4 /* first invalid value */
-
-/* Xilinx fpga temperatures */
-#define HYMOD_XTMP_NONE 0 /* information not present */
-#define HYMOD_XTMP_COM 1
-#define HYMOD_XTMP_IND 2
-#define HYMOD_XTMP_MAX 3 /* first invalid value */
-
-/* Xilinx fpga grades */
-#define HYMOD_XTMP_NONE 0 /* information not present */
-#define HYMOD_XTMP_NORMAL 1
-#define HYMOD_XTMP_ENGSAMP 2
-#define HYMOD_XTMP_MAX 3 /* first invalid value */
-
-/* CPU types */
-#define HYMOD_CPUTYPE_NONE 0 /* information not present */
-#define HYMOD_CPUTYPE_MPC8260 1 /* Motorola MPC8260 embedded powerpc */
-#define HYMOD_CPUTYPE_MAX 2 /* first invalid value */
-
-/* CPU/BUS/CPM clock speeds */
-#define HYMOD_CLKSPD_NONE 0 /* information not present */
-#define HYMOD_CLKSPD_33MHZ 1
-#define HYMOD_CLKSPD_66MHZ 2
-#define HYMOD_CLKSPD_100MHZ 3
-#define HYMOD_CLKSPD_133MHZ 4
-#define HYMOD_CLKSPD_166MHZ 5
-#define HYMOD_CLKSPD_200MHZ 6
-#define HYMOD_CLKSPD_MAX 7 /* first invalid value */
-
-/* high speed serial chip types */
-#define HYMOD_HSSTYPE_NONE 0 /* information not present */
-#define HYMOD_HSSTYPE_AMCC52064 1
-#define HYMOD_HSSTYPE_MAX 2 /* first invalid value */
-
-/* a date (yyyy-mm-dd) */
-typedef
- struct {
- unsigned short year;
- unsigned char month;
- unsigned char day;
- }
-hymod_date_t;
-
-/* describes a Xilinx fpga */
-typedef
- struct {
- unsigned char type; /* chip type */
- unsigned char speed; /* chip speed rating */
- unsigned char temp; /* chip temperature rating */
- unsigned char grade; /* chip grade */
- }
-hymod_xlx_t;
-
-/* describes a Motorola embedded processor */
-typedef
- struct {
- unsigned char type; /* CPU type */
- unsigned char cpuspd; /* speed of the PowerPC core */
- unsigned char busspd; /* speed of the system and 60x bus */
- unsigned char cpmspd; /* speed of the CPM co-processor */
- }
-hymod_mpc_t;
-
-/* info about high-speed (1Gbit) serial interface */
-typedef
- struct {
- unsigned char type; /* high-speed serial chip type */
- unsigned char nchin; /* number of input channels mounted */
- unsigned char nchout; /* number of output channels mounted */
- }
-hymod_hss_t;
-
-/*
- * this defines the contents of the serial eeprom that exists on every
- * hymod board, including mezzanine boards (the serial eeprom will be
- * faked for early development boards that don't have one)
- */
-
-typedef
- struct {
- unsigned char valid:1; /* contents of this struct is valid */
- unsigned char ver:7; /* eeprom contents version */
- unsigned char bdtype; /* board type */
- unsigned char bdrev; /* board revision */
- unsigned char batchlen; /* length of batch string below */
- unsigned long serno; /* serial number */
- hymod_date_t date; /* manufacture date */
- unsigned char batch[32]; /* manufacturer specific batch id */
- unsigned char nsdram; /* # of ram "banks" */
- unsigned char nflash; /* # of flash "banks" */
- unsigned char nzbt; /* # of ZBT rams */
- unsigned char nxlx; /* # of Xilinx fpgas */
- unsigned char sdramsz[HYMOD_MAX_SDRAM]; /* log2 of sdram size */
- unsigned char flashsz[HYMOD_MAX_FLASH]; /* log2 of flash size */
- unsigned char zbtsz[HYMOD_MAX_ZBT]; /* log2 of ZBT ram size */
- hymod_xlx_t xlx[HYMOD_MAX_XLX]; /* Xilinx fpga info */
- hymod_mpc_t mpc; /* Motorola MPC CPU info */
- hymod_hss_t hss; /* high-speed serial info */
- }
-hymod_eeprom_t;
-
-/*
- * this defines a region in the processor's physical address space
- */
-typedef
- struct {
- unsigned long exists:1; /* 1 if the region exists, 0 if not */
- unsigned long size:31; /* size in bytes */
- unsigned long base; /* base address */
- }
-xlx_prgn_t;
-
-/*
- * this defines where the various Xilinx fpga access regions are mapped
- * into the physical address space of the processor
- */
-typedef
- struct {
- xlx_prgn_t prog; /* program access region */
- xlx_prgn_t reg; /* register access region */
- xlx_prgn_t port; /* port access region */
- }
-xlx_mmap_t;
-
-/*
- * this defines which 8260 i/o port pins are connected to the various
- * signals required for programming a Xilinx fpga
- */
-typedef
- struct {
- iopin_t prog_pin; /* assert for >= 300ns to program */
- iopin_t init_pin; /* goes high when fpga is cleared */
- iopin_t done_pin; /* goes high when program is done */
- iopin_t enable_pin; /* some fpgas need enabling */
- }
-xlx_iopins_t;
-
-/* all info about one Xilinx chip */
-typedef
- struct {
- xlx_mmap_t mmap;
- xlx_iopins_t iopins;
- unsigned long irq:8; /* h/w intr req number for this fpga */
- }
-xlx_info_t;
-
-/* all info about one hymod board */
-typedef
- struct {
- hymod_eeprom_t eeprom;
- xlx_info_t xlx[HYMOD_MAX_XLX];
- }
-hymod_board_t;
-
-/*
- * this defines the configuration information of a hymod board-set
- * (main board + possible mezzanine board). In future, there may be
- * more than one mezzanine board (stackable?) - if so, add a "mezz2"
- * field, and so on... or make mezz an array?
- */
-typedef
- struct {
- unsigned long ver:8; /* version control */
- hymod_board_t main; /* main board info */
- hymod_board_t mezz; /* mezzanine board info */
- unsigned long crc; /* ensures kernel and boot prom agree */
- }
-hymod_conf_t;
-
-#endif /* _HYMOD_H_ */
diff --git a/board/hymod/input.c b/board/hymod/input.c
deleted file mode 100644
index 63aa13c4a9..0000000000
--- a/board/hymod/input.c
+++ /dev/null
@@ -1,113 +0,0 @@
-/*
- * (C) Copyright 2003
- * Murray Jensen, CSIRO-MIT, <Murray.Jensen@csiro.au>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-
-/* imports from common/main.c */
-extern char console_buffer[CFG_CBSIZE];
-
-int
-hymod_get_serno (const char *prompt)
-{
- for (;;) {
- int n, serno;
- char *p;
-
-#ifdef CONFIG_BOOT_RETRY_TIME
- reset_cmd_timeout ();
-#endif
-
- n = readline (prompt);
-
- if (n < 0)
- return (n);
-
- if (n == 0)
- continue;
-
- serno = (int) simple_strtol (console_buffer, &p, 10);
-
- if (p > console_buffer && *p == '\0' && serno > 0)
- return (serno);
-
- printf ("Invalid number (%s) - please re-enter\n",
- console_buffer);
- }
-}
-
-int
-hymod_get_ethaddr (void)
-{
- for (;;) {
- int n;
-
-#ifdef CONFIG_BOOT_RETRY_TIME
- reset_cmd_timeout ();
-#endif
-
- n = readline ("Enter board ethernet address: ");
-
- if (n < 0)
- return (n);
-
- if (n == 0)
- continue;
-
- if (n == 17) {
- int i;
- char *p, *q;
- uchar ea[6];
-
- /* see if it looks like an ethernet address */
-
- p = console_buffer;
-
- for (i = 0; i < 6; i++) {
- char term = (i == 5 ? '\0' : ':');
-
- ea[i] = simple_strtol (p, &q, 16);
-
- if ((q - p) != 2 || *q++ != term)
- break;
-
- p = q;
- }
-
- if (i == 6) {
- /* it looks ok - set it */
- printf ("Setting ethernet addr to %s\n",
- console_buffer);
-
- setenv ("ethaddr", console_buffer);
-
- puts ("Remember to do a 'saveenv' to "
- "make it permanent\n");
-
- return (0);
- }
- }
-
- printf ("Invalid ethernet addr (%s) - please re-enter\n",
- console_buffer);
- }
-}
diff --git a/board/hymod/u-boot.lds b/board/hymod/u-boot.lds
deleted file mode 100644
index 337a3954d2..0000000000
--- a/board/hymod/u-boot.lds
+++ /dev/null
@@ -1,148 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc8260/start.o (.text)
-/*
- common/dlmalloc.o (.text)
- lib_ppc/ppcstring.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
- lib_generic/zlib.o (.text)
-
- . = env_offset;
-*/
- common/environment.o(.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- . = ALIGN(256 * 1024);
- .ppcenv :
- {
- common/environment.o (.ppcenv)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/hymod/u-boot.lds.debug b/board/hymod/u-boot.lds.debug
deleted file mode 100644
index ddd4678ee8..0000000000
--- a/board/hymod/u-boot.lds.debug
+++ /dev/null
@@ -1,137 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc8xx/start.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
-
- . = env_offset;
- common/environment.o(.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/icecube/Makefile b/board/icecube/Makefile
deleted file mode 100644
index eb5ed591a9..0000000000
--- a/board/icecube/Makefile
+++ /dev/null
@@ -1,47 +0,0 @@
-
-#
-# (C) Copyright 2003
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := $(BOARD).o flash.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/icecube/config.mk b/board/icecube/config.mk
deleted file mode 100644
index 07b5de1881..0000000000
--- a/board/icecube/config.mk
+++ /dev/null
@@ -1,44 +0,0 @@
-#
-# (C) Copyright 2003
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# IceCube board:
-#
-# Valid values for TEXT_BASE are:
-#
-# 0xFFF00000 boot high (standard configuration)
-# 0xFF000000 boot low for 16 MiB boards
-# 0xFF800000 boot low for 8 MiB boards
-# 0x00100000 boot from RAM (for testing only)
-#
-
-sinclude $(TOPDIR)/board/$(BOARDDIR)/config.tmp
-
-ifndef TEXT_BASE
-## Standard: boot high
-TEXT_BASE = 0xFFF00000
-## For testing: boot from RAM
-# TEXT_BASE = 0x00100000
-endif
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
diff --git a/board/icecube/flash.c b/board/icecube/flash.c
deleted file mode 100644
index 713011c972..0000000000
--- a/board/icecube/flash.c
+++ /dev/null
@@ -1,491 +0,0 @@
-/*
- * (C) Copyright 2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/* NOTE - CONFIG_FLASH_16BIT means the CPU interface is 16-bit, it
- * has nothing to do with the flash chip being 8-bit or 16-bit.
- */
-#ifdef CONFIG_FLASH_16BIT
-typedef unsigned short FLASH_PORT_WIDTH;
-typedef volatile unsigned short FLASH_PORT_WIDTHV;
-#define FLASH_ID_MASK 0xFFFF
-#else
-typedef unsigned char FLASH_PORT_WIDTH;
-typedef volatile unsigned char FLASH_PORT_WIDTHV;
-#define FLASH_ID_MASK 0xFF
-#endif
-
-#define FPW FLASH_PORT_WIDTH
-#define FPWV FLASH_PORT_WIDTHV
-
-#define ORMASK(size) ((-size) & OR_AM_MSK)
-
-#define FLASH_CYCLE1 0x0555
-#define FLASH_CYCLE2 0x02aa
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size(FPWV *addr, flash_info_t *info);
-static void flash_reset(flash_info_t *info);
-static int write_word_amd(flash_info_t *info, FPWV *dest, FPW data);
-static flash_info_t *flash_get_info(ulong base);
-
-/*-----------------------------------------------------------------------
- * flash_init()
- *
- * sets up flash_info and returns size of FLASH (bytes)
- */
-unsigned long flash_init (void)
-{
- unsigned long size = 0;
- int i;
- extern void flash_preinit(void);
- extern void flash_afterinit(ulong);
- ulong flashbase = CFG_FLASH_BASE;
-
- flash_preinit();
-
- /* Init: no FLASHes known */
- for (i=0; i < CFG_MAX_FLASH_BANKS; ++i) {
- memset(&flash_info[i], 0, sizeof(flash_info_t));
-
- flash_info[i].size =
- flash_get_size((FPW *)flashbase, &flash_info[i]);
-
- size += flash_info[i].size;
- flashbase += 0x800000;
- }
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
- /* monitor protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+monitor_flash_len-1,
- flash_get_info(CFG_MONITOR_BASE));
-#endif
-
-#ifdef CFG_ENV_IS_IN_FLASH
- /* ENV protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR+CFG_ENV_SIZE-1,
- flash_get_info(CFG_ENV_ADDR));
-#endif
-
-
- flash_afterinit(size);
- return size ? size : 1;
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_reset(flash_info_t *info)
-{
- FPWV *base = (FPWV *)(info->start[0]);
-
- /* Put FLASH back in read mode */
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL)
- *base = (FPW)0x00FF00FF; /* Intel Read Mode */
- else if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD)
- *base = (FPW)0x00F000F0; /* AMD Read Mode */
-}
-
-/*-----------------------------------------------------------------------
- */
-
-static flash_info_t *flash_get_info(ulong base)
-{
- int i;
- flash_info_t * info;
-
- for (i = 0; i < CFG_MAX_FLASH_BANKS; i ++) {
- info = & flash_info[i];
- if (info->size &&
- info->start[0] <= base && base <= info->start[0] + info->size - 1)
- break;
- }
-
- return i == CFG_MAX_FLASH_BANKS ? 0 : info;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-void flash_print_info (flash_info_t *info)
-{
- int i;
- uchar *boottype;
- uchar *bootletter;
- char *fmt;
- uchar botbootletter[] = "B";
- uchar topbootletter[] = "T";
- uchar botboottype[] = "bottom boot sector";
- uchar topboottype[] = "top boot sector";
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD: printf ("AMD "); break;
- case FLASH_MAN_BM: printf ("BRIGHT MICRO "); break;
- case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
- case FLASH_MAN_SST: printf ("SST "); break;
- case FLASH_MAN_STM: printf ("STM "); break;
- case FLASH_MAN_INTEL: printf ("INTEL "); break;
- default: printf ("Unknown Vendor "); break;
- }
-
- /* check for top or bottom boot, if it applies */
- if (info->flash_id & FLASH_BTYPE) {
- boottype = botboottype;
- bootletter = botbootletter;
- }
- else {
- boottype = topboottype;
- bootletter = topbootletter;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AMDLV065D:
- fmt = "29LV065 (64 Mbit, uniform sectors)\n";
- break;
- default:
- fmt = "Unknown Chip Type\n";
- break;
- }
-
- printf (fmt, bootletter, boottype);
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20,
- info->sector_count);
-
- printf (" Sector Start Addresses:");
-
- for (i=0; i<info->sector_count; ++i) {
- if ((i % 5) == 0) {
- printf ("\n ");
- }
-
- printf (" %08lX%s", info->start[i],
- info->protect[i] ? " (RO)" : " ");
- }
-
- printf ("\n");
-}
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-
-ulong flash_get_size (FPWV *addr, flash_info_t *info)
-{
- int i;
- FPWV* addr2;
-
- /* Write auto select command: read Manufacturer ID */
- /* Write auto select command sequence and test FLASH answer */
- addr[FLASH_CYCLE1] = (FPW)0x00AA00AA; /* for AMD, Intel ignores this */
- addr[FLASH_CYCLE2] = (FPW)0x00550055; /* for AMD, Intel ignores this */
- addr[FLASH_CYCLE1] = (FPW)0x00900090; /* selects Intel or AMD */
-
- /* The manufacturer codes are only 1 byte, so just use 1 byte.
- * This works for any bus width and any FLASH device width.
- */
- udelay(100);
- switch (addr[0] & 0xff) {
-
- case (uchar)AMD_MANUFACT:
- info->flash_id = FLASH_MAN_AMD;
- break;
-
- case (uchar)INTEL_MANUFACT:
- info->flash_id = FLASH_MAN_INTEL;
- break;
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- break;
- }
-
- /* Check 16 bits or 32 bits of ID so work on 32 or 16 bit bus. */
- if (info->flash_id != FLASH_UNKNOWN) switch ((FPW)addr[1]) {
-
- case (FPW)AMD_ID_LV065D:
- info->flash_id += FLASH_AMDLV065D;
- info->sector_count = 128;
- info->size = 0x00800000;
- for( i = 0; i < info->sector_count; i++ )
- info->start[i] = (ulong)addr + (i * 0x10000);
- break; /* => 8 or 16 MB */
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- return (0); /* => no or unknown flash */
- }
-
- /* test for real flash at bank 1 */
- addr2 = (FPW *)((ulong)addr | 0x800000);
- if (addr2 != addr &&
- ((addr2[0] & 0xff) == (addr[0] & 0xff)) && ((FPW)addr2[1] == (FPW)addr[1])) {
- /* Seems 2 banks are the same space (8Mb chip is installed,
- * J24 in default position (CS0)). Disable this (first) bank.
- */
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- }
- /* Put FLASH back in read mode */
- flash_reset(info);
-
- return (info->size);
-}
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- FPWV *addr;
- int flag, prot, sect;
- int intel = (info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL;
- ulong start, now, last;
- int rcode = 0;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AMDLV065D:
- break;
- case FLASH_UNKNOWN:
- default:
- printf ("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- last = get_timer(0);
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last && rcode == 0; sect++) {
-
- if (info->protect[sect] != 0) /* protected, skip it */
- continue;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr = (FPWV *)(info->start[sect]);
- if (intel) {
- *addr = (FPW)0x00500050; /* clear status register */
- *addr = (FPW)0x00200020; /* erase setup */
- *addr = (FPW)0x00D000D0; /* erase confirm */
- }
- else {
- /* must be AMD style if not Intel */
- FPWV *base; /* first address in bank */
-
- base = (FPWV *)(info->start[0]);
- base[FLASH_CYCLE1] = (FPW)0x00AA00AA; /* unlock */
- base[FLASH_CYCLE2] = (FPW)0x00550055; /* unlock */
- base[FLASH_CYCLE1] = (FPW)0x00800080; /* erase mode */
- base[FLASH_CYCLE1] = (FPW)0x00AA00AA; /* unlock */
- base[FLASH_CYCLE2] = (FPW)0x00550055; /* unlock */
- *addr = (FPW)0x00300030; /* erase sector */
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- start = get_timer(0);
-
- /* wait at least 50us for AMD, 80us for Intel.
- * Let's wait 1 ms.
- */
- udelay (1000);
-
- while ((*addr & (FPW)0x00800080) != (FPW)0x00800080) {
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
-
- if (intel) {
- /* suspend erase */
- *addr = (FPW)0x00B000B0;
- }
-
- flash_reset(info); /* reset to read mode */
- rcode = 1; /* failed */
- break;
- }
-
- /* show that we're waiting */
- if ((get_timer(last)) > CFG_HZ) {/* every second */
- putc ('.');
- last = get_timer(0);
- }
- }
-
- /* show that we're waiting */
- if ((get_timer(last)) > CFG_HZ) { /* every second */
- putc ('.');
- last = get_timer(0);
- }
-
- flash_reset(info); /* reset to read mode */
- }
-
- printf (" done\n");
- return rcode;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- FPW data = 0; /* 16 or 32 bit word, matches flash bus width on MPC8XX */
- int bytes; /* number of bytes to program in current word */
- int left; /* number of bytes left to program */
- int i, res;
-
- for (left = cnt, res = 0;
- left > 0 && res == 0;
- addr += sizeof(data), left -= sizeof(data) - bytes) {
-
- bytes = addr & (sizeof(data) - 1);
- addr &= ~(sizeof(data) - 1);
-
- /* combine source and destination data so can program
- * an entire word of 16 or 32 bits
- */
- for (i = 0; i < sizeof(data); i++) {
- data <<= 8;
- if (i < bytes || i - bytes >= left )
- data += *((uchar *)addr + i);
- else
- data += *src++;
- }
-
- /* write one word to the flash */
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD:
- res = write_word_amd(info, (FPWV *)addr, data);
- break;
- default:
- /* unknown flash type, error! */
- printf ("missing or unknown FLASH type\n");
- res = 1; /* not really a timeout, but gives error */
- break;
- }
- }
-
- return (res);
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash for AMD FLASH
- * A word is 16 or 32 bits, whichever the bus width of the flash bank
- * (not an individual chip) is.
- *
- * returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word_amd (flash_info_t *info, FPWV *dest, FPW data)
-{
- ulong start;
- int flag;
- int res = 0; /* result, assume success */
- FPWV *base; /* first address in flash bank */
-
- /* Check if Flash is (sufficiently) erased */
- if ((*dest & data) != data) {
- return (2);
- }
-
-
- base = (FPWV *)(info->start[0]);
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- base[FLASH_CYCLE1] = (FPW)0x00AA00AA; /* unlock */
- base[FLASH_CYCLE2] = (FPW)0x00550055; /* unlock */
- base[FLASH_CYCLE1] = (FPW)0x00A000A0; /* selects program mode */
-
- *dest = data; /* start programming the data */
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- start = get_timer (0);
-
- /* data polling for D7 */
- while (res == 0 && (*dest & (FPW)0x00800080) != (data & (FPW)0x00800080)) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- *dest = (FPW)0x00F000F0; /* reset bank */
- res = 1;
- }
- }
-
- return (res);
-}
diff --git a/board/icecube/icecube.c b/board/icecube/icecube.c
deleted file mode 100644
index 1f1a74ce33..0000000000
--- a/board/icecube/icecube.c
+++ /dev/null
@@ -1,310 +0,0 @@
-/*
- * (C) Copyright 2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2004
- * Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc5xxx.h>
-#include <pci.h>
-
-#if defined(CONFIG_MPC5200_DDR)
-#include "mt46v16m16-75.h"
-#else
-#include "mt48lc16m16a2-75.h"
-#endif
-
-#ifndef CFG_RAMBOOT
-static void sdram_start (int hi_addr)
-{
- long hi_addr_bit = hi_addr ? 0x01000000 : 0;
-
- /* unlock mode register */
- *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000000 | hi_addr_bit;
- __asm__ volatile ("sync");
-
- /* precharge all banks */
- *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000002 | hi_addr_bit;
- __asm__ volatile ("sync");
-
-#if SDRAM_DDR
- /* set mode register: extended mode */
- *(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_EMODE;
- __asm__ volatile ("sync");
-
- /* set mode register: reset DLL */
- *(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_MODE | 0x04000000;
- __asm__ volatile ("sync");
-#endif
-
- /* precharge all banks */
- *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000002 | hi_addr_bit;
- __asm__ volatile ("sync");
-
- /* auto refresh */
- *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000004 | hi_addr_bit;
- __asm__ volatile ("sync");
-
- /* set mode register */
- *(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_MODE;
- __asm__ volatile ("sync");
-
- /* normal operation */
- *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | hi_addr_bit;
- __asm__ volatile ("sync");
-}
-#endif
-
-/*
- * ATTENTION: Although partially referenced initdram does NOT make real use
- * use of CFG_SDRAM_BASE. The code does not work if CFG_SDRAM_BASE
- * is something else than 0x00000000.
- */
-
-#if defined(CONFIG_MPC5200)
-long int initdram (int board_type)
-{
- ulong dramsize = 0;
- ulong dramsize2 = 0;
-#ifndef CFG_RAMBOOT
- ulong test1, test2;
-
- /* setup SDRAM chip selects */
- *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x0000001e;/* 2G at 0x0 */
- *(vu_long *)MPC5XXX_SDRAM_CS1CFG = 0x80000000;/* disabled */
- __asm__ volatile ("sync");
-
- /* setup config registers */
- *(vu_long *)MPC5XXX_SDRAM_CONFIG1 = SDRAM_CONFIG1;
- *(vu_long *)MPC5XXX_SDRAM_CONFIG2 = SDRAM_CONFIG2;
- __asm__ volatile ("sync");
-
-#if SDRAM_DDR
- /* set tap delay */
- *(vu_long *)MPC5XXX_CDM_PORCFG = SDRAM_TAPDELAY;
- __asm__ volatile ("sync");
-#endif
-
- /* find RAM size using SDRAM CS0 only */
- sdram_start(0);
- test1 = get_ram_size((long *)CFG_SDRAM_BASE, 0x80000000);
- sdram_start(1);
- test2 = get_ram_size((long *)CFG_SDRAM_BASE, 0x80000000);
- if (test1 > test2) {
- sdram_start(0);
- dramsize = test1;
- } else {
- dramsize = test2;
- }
-
- /* memory smaller than 1MB is impossible */
- if (dramsize < (1 << 20)) {
- dramsize = 0;
- }
-
- /* set SDRAM CS0 size according to the amount of RAM found */
- if (dramsize > 0) {
- *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x13 + __builtin_ffs(dramsize >> 20) - 1;
- } else {
- *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0; /* disabled */
- }
-
- /* let SDRAM CS1 start right after CS0 */
- *(vu_long *)MPC5XXX_SDRAM_CS1CFG = dramsize + 0x0000001e;/* 2G */
-
- /* find RAM size using SDRAM CS1 only */
- if (!dramsize)
- sdram_start(0);
- test2 = test1 = get_ram_size((long *)(CFG_SDRAM_BASE + dramsize), 0x80000000);
- if (!dramsize) {
- sdram_start(1);
- test2 = get_ram_size((long *)(CFG_SDRAM_BASE + dramsize), 0x80000000);
- }
- if (test1 > test2) {
- sdram_start(0);
- dramsize2 = test1;
- } else {
- dramsize2 = test2;
- }
-
- /* memory smaller than 1MB is impossible */
- if (dramsize2 < (1 << 20)) {
- dramsize2 = 0;
- }
-
- /* set SDRAM CS1 size according to the amount of RAM found */
- if (dramsize2 > 0) {
- *(vu_long *)MPC5XXX_SDRAM_CS1CFG = dramsize
- | (0x13 + __builtin_ffs(dramsize2 >> 20) - 1);
- } else {
- *(vu_long *)MPC5XXX_SDRAM_CS1CFG = dramsize; /* disabled */
- }
-
-#else /* CFG_RAMBOOT */
-
- /* retrieve size of memory connected to SDRAM CS0 */
- dramsize = *(vu_long *)MPC5XXX_SDRAM_CS0CFG & 0xFF;
- if (dramsize >= 0x13) {
- dramsize = (1 << (dramsize - 0x13)) << 20;
- } else {
- dramsize = 0;
- }
-
- /* retrieve size of memory connected to SDRAM CS1 */
- dramsize2 = *(vu_long *)MPC5XXX_SDRAM_CS1CFG & 0xFF;
- if (dramsize2 >= 0x13) {
- dramsize2 = (1 << (dramsize2 - 0x13)) << 20;
- } else {
- dramsize2 = 0;
- }
-
-#endif /* CFG_RAMBOOT */
-
- return dramsize + dramsize2;
-}
-
-#elif defined(CONFIG_MGT5100)
-
-long int initdram (int board_type)
-{
- ulong dramsize = 0;
-#ifndef CFG_RAMBOOT
- ulong test1, test2;
-
- /* setup and enable SDRAM chip selects */
- *(vu_long *)MPC5XXX_SDRAM_START = 0x00000000;
- *(vu_long *)MPC5XXX_SDRAM_STOP = 0x0000ffff;/* 2G */
- *(vu_long *)MPC5XXX_ADDECR |= (1 << 22); /* Enable SDRAM */
- __asm__ volatile ("sync");
-
- /* setup config registers */
- *(vu_long *)MPC5XXX_SDRAM_CONFIG1 = SDRAM_CONFIG1;
- *(vu_long *)MPC5XXX_SDRAM_CONFIG2 = SDRAM_CONFIG2;
-
- /* address select register */
- *(vu_long *)MPC5XXX_SDRAM_XLBSEL = SDRAM_ADDRSEL;
- __asm__ volatile ("sync");
-
- /* find RAM size */
- sdram_start(0);
- test1 = get_ram_size((long *)CFG_SDRAM_BASE, 0x80000000);
- sdram_start(1);
- test2 = get_ram_size((long *)CFG_SDRAM_BASE, 0x80000000);
- if (test1 > test2) {
- sdram_start(0);
- dramsize = test1;
- } else {
- dramsize = test2;
- }
-
- /* set SDRAM end address according to size */
- *(vu_long *)MPC5XXX_SDRAM_STOP = ((dramsize - 1) >> 15);
-
-#else /* CFG_RAMBOOT */
-
- /* Retrieve amount of SDRAM available */
- dramsize = ((*(vu_long *)MPC5XXX_SDRAM_STOP + 1) << 15);
-
-#endif /* CFG_RAMBOOT */
-
- return dramsize;
-}
-
-#else
-#error Neither CONFIG_MPC5200 or CONFIG_MGT5100 defined
-#endif
-
-int checkboard (void)
-{
-#if defined(CONFIG_MPC5200)
- puts ("Board: Motorola MPC5200 (IceCube)\n");
-#elif defined(CONFIG_MGT5100)
- puts ("Board: Motorola MGT5100 (IceCube)\n");
-#endif
- return 0;
-}
-
-void flash_preinit(void)
-{
- /*
- * Now, when we are in RAM, enable flash write
- * access for detection process.
- * Note that CS_BOOT cannot be cleared when
- * executing in flash.
- */
-#if defined(CONFIG_MGT5100)
- *(vu_long *)MPC5XXX_ADDECR &= ~(1 << 25); /* disable CS_BOOT */
- *(vu_long *)MPC5XXX_ADDECR |= (1 << 16); /* enable CS0 */
-#endif
- *(vu_long *)MPC5XXX_BOOTCS_CFG &= ~0x1; /* clear RO */
-}
-
-void flash_afterinit(ulong size)
-{
- if (size == 0x800000) { /* adjust mapping */
- *(vu_long *)MPC5XXX_BOOTCS_START = *(vu_long *)MPC5XXX_CS0_START =
- START_REG(CFG_BOOTCS_START | size);
- *(vu_long *)MPC5XXX_BOOTCS_STOP = *(vu_long *)MPC5XXX_CS0_STOP =
- STOP_REG(CFG_BOOTCS_START | size, size);
- }
-}
-
-#ifdef CONFIG_PCI
-static struct pci_controller hose;
-
-extern void pci_mpc5xxx_init(struct pci_controller *);
-
-void pci_init_board(void)
-{
- pci_mpc5xxx_init(&hose);
-}
-#endif
-
-#if defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET)
-
-#define GPIO_PSC1_4 0x01000000UL
-
-void init_ide_reset (void)
-{
- debug ("init_ide_reset\n");
-
- /* Configure PSC1_4 as GPIO output for ATA reset */
- *(vu_long *) MPC5XXX_WU_GPIO_ENABLE |= GPIO_PSC1_4;
- *(vu_long *) MPC5XXX_WU_GPIO_DIR |= GPIO_PSC1_4;
- /* Deassert reset */
- *(vu_long *) MPC5XXX_WU_GPIO_DATA |= GPIO_PSC1_4;
-}
-
-void ide_set_reset (int idereset)
-{
- debug ("ide_reset(%d)\n", idereset);
-
- if (idereset) {
- *(vu_long *) MPC5XXX_WU_GPIO_DATA &= ~GPIO_PSC1_4;
- /* Make a delay. MPC5200 spec says 25 usec min */
- udelay(500000);
- } else {
- *(vu_long *) MPC5XXX_WU_GPIO_DATA |= GPIO_PSC1_4;
- }
-}
-#endif /* defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET) */
diff --git a/board/icecube/mt46v16m16-75.h b/board/icecube/mt46v16m16-75.h
deleted file mode 100644
index 4c0f9a7406..0000000000
--- a/board/icecube/mt46v16m16-75.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/*
- * (C) Copyright 2004
- * Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#define SDRAM_DDR 1 /* is DDR */
-
-#if defined(CONFIG_MPC5200)
-/* Settings for XLB = 132 MHz */
-#define SDRAM_MODE 0x018D0000
-#define SDRAM_EMODE 0x40090000
-#define SDRAM_CONTROL 0x705f0f00
-#define SDRAM_CONFIG1 0x73722930
-#define SDRAM_CONFIG2 0x47770000
-#define SDRAM_TAPDELAY 0x10000000
-
-#else
-#error CONFIG_MPC5200 not defined
-#endif
diff --git a/board/icecube/mt48lc16m16a2-75.h b/board/icecube/mt48lc16m16a2-75.h
deleted file mode 100644
index ffdf0396a5..0000000000
--- a/board/icecube/mt48lc16m16a2-75.h
+++ /dev/null
@@ -1,43 +0,0 @@
-/*
- * (C) Copyright 2004
- * Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#define SDRAM_DDR 0 /* is SDR */
-
-#if defined(CONFIG_MPC5200)
-/* Settings for XLB = 132 MHz */
-#define SDRAM_MODE 0x00CD0000
-#define SDRAM_CONTROL 0x504F0000
-#define SDRAM_CONFIG1 0xD2322800
-#define SDRAM_CONFIG2 0x8AD70000
-
-#elif defined(CONFIG_MGT5100)
-/* Settings for XLB = 66 MHz */
-#define SDRAM_MODE 0x008D0000
-#define SDRAM_CONTROL 0x504F0000
-#define SDRAM_CONFIG1 0xC2222600
-#define SDRAM_CONFIG2 0x88B70004
-#define SDRAM_ADDRSEL 0x02000000
-
-#else
-#error Neither CONFIG_MPC5200 or CONFIG_MGT5100 defined
-#endif
diff --git a/board/icecube/u-boot.lds b/board/icecube/u-boot.lds
deleted file mode 100644
index f23432ecfa..0000000000
--- a/board/icecube/u-boot.lds
+++ /dev/null
@@ -1,125 +0,0 @@
-/*
- * (C) Copyright 2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc5xxx/start.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/icu862/Makefile b/board/icu862/Makefile
deleted file mode 100644
index 7a2014d466..0000000000
--- a/board/icu862/Makefile
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/icu862/config.mk b/board/icu862/config.mk
deleted file mode 100644
index 315e70d764..0000000000
--- a/board/icu862/config.mk
+++ /dev/null
@@ -1,29 +0,0 @@
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# ICU862 boards
-#
-
-TEXT_BASE = 0x40F00000
-OBJCFLAGS = --set-section-flags=.ppcenv=contents,alloc,load,data
diff --git a/board/icu862/flash.c b/board/icu862/flash.c
deleted file mode 100644
index ca5bcf31af..0000000000
--- a/board/icu862/flash.c
+++ /dev/null
@@ -1,617 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-#if defined(CFG_ENV_IS_IN_FLASH)
-# ifndef CFG_ENV_ADDR
-# define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_ENV_OFFSET)
-# endif
-# ifndef CFG_ENV_SIZE
-# define CFG_ENV_SIZE CFG_ENV_SECT_SIZE
-# endif
-# ifndef CFG_ENV_SECT_SIZE
-# define CFG_ENV_SECT_SIZE CFG_ENV_SIZE
-# endif
-#endif
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (vu_long *addr, flash_info_t *info);
-static int write_word (flash_info_t *info, ulong dest, ulong data);
-static void flash_get_offsets (ulong base, flash_info_t *info);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- unsigned long size_b0, size_b1;
- int i;
-
- /* Init: no FLASHes known */
- for (i=0; i < CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* Static FLASH Bank configuration here - FIXME XXX */
-
- size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size_b0,
- size_b0 >> 20);
- }
-
- if (FLASH_BASE1_PRELIM != 0x0) {
- size_b1 = flash_get_size((vu_long *)FLASH_BASE1_PRELIM, &flash_info[1]);
-
- if (size_b1 > size_b0) {
- printf ("## ERROR: Bank 1 (0x%08lx = %ld MB)"
- " > Bank 0 (0x%08lx = %ld MB)\n",
- size_b1, size_b1 >> 20,
- size_b0, size_b0 >> 20);
-
- flash_info[0].flash_id = FLASH_UNKNOWN;
- flash_info[1].flash_id = FLASH_UNKNOWN;
- flash_info[0].sector_count = -1;
- flash_info[1].sector_count = -1;
- flash_info[0].size = 0;
- flash_info[1].size = 0;
- return (0);
- }
- } else {
- size_b1 = 0;
- }
-
- /* Remap FLASH according to real size */
- memctl->memc_or0 = CFG_OR_TIMING_FLASH | (-size_b0 & OR_AM_MSK);
- memctl->memc_br0 = (CFG_FLASH_BASE & BR_BA_MSK) | BR_MS_GPCM | BR_V;
-
- /* Re-do sizing to get full correct info */
- size_b0 = flash_get_size((vu_long *)CFG_FLASH_BASE, &flash_info[0]);
-
- flash_get_offsets (CFG_FLASH_BASE, &flash_info[0]);
-
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
- /* monitor protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+monitor_flash_len-1,
- &flash_info[0]);
-#endif
-
-#ifdef CFG_ENV_IS_IN_FLASH
- /* ENV protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR+CFG_ENV_SIZE-1,
- &flash_info[0]);
-#endif
-
- /* ICU862 Board has only one Flash Bank */
- flash_info[1].flash_id = FLASH_UNKNOWN;
- flash_info[1].sector_count = -1;
-
- flash_info[0].size = size_b0;
- flash_info[1].size = size_b1;
-
- return (size_b0 + size_b1);
-
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_get_offsets (ulong base, flash_info_t *info)
-{
- int i;
-
- /* set up sector start address table */
- if (((info->flash_id & FLASH_TYPEMASK) == FLASH_AM040) ||
- ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM033C)) {
- /* set sector offsets for uniform sector type */
- for (i = 0; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00040000);
- }
- }
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- puts ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD: puts ("AMD "); break;
- case FLASH_MAN_FUJ: puts ("FUJITSU "); break;
- case FLASH_MAN_BM: puts ("BRIGHT MICRO "); break;
- default: puts ("Unknown Vendor "); break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM040: puts ("29F040/29LV040 (4 Mbit, uniform sectors)\n");
- break;
- case FLASH_AM400B: puts ("AM29LV400B (4 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM400T: puts ("AM29LV400T (4 Mbit, top boot sector)\n");
- break;
- case FLASH_AM800B: puts ("AM29LV800B (8 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM800T: puts ("AM29LV800T (8 Mbit, top boot sector)\n");
- break;
- case FLASH_AM160B: puts ("AM29LV160B (16 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM160T: puts ("AM29LV160T (16 Mbit, top boot sector)\n");
- break;
- case FLASH_AM320B: puts ("AM29LV320B (32 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM320T: puts ("AM29LV320T (32 Mbit, top boot sector)\n");
- break;
- case FLASH_AM033C: puts ("AM29LV033C (32 Mbit)\n");
- break;
- default: puts ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- puts (" Sector Start Addresses:");
-
- for (i=0; i<info->sector_count; ++i) {
- if ((i % 5) == 0) {
- puts ("\n ");
- }
-
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " "
- );
- }
-
- puts ("\n");
-}
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-
-static ulong flash_get_size (vu_long *addr, flash_info_t *info)
-{
- short i;
-#if 0
- ulong base = (ulong)addr;
-#endif
- uchar value;
-
- /* Write auto select command: read Manufacturer ID */
-#if 0
- addr[0x0555] = 0x00AA00AA;
- addr[0x02AA] = 0x00550055;
- addr[0x0555] = 0x00900090;
-#else
- addr[0x0555] = 0xAAAAAAAA;
- addr[0x02AA] = 0x55555555;
- addr[0x0555] = 0x90909090;
-#endif
-
- value = addr[0];
-
- switch (value + (value << 16)) {
- case AMD_MANUFACT:
- info->flash_id = FLASH_MAN_AMD;
- break;
-
- case FUJ_MANUFACT:
- info->flash_id = FLASH_MAN_FUJ;
- break;
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- break;
- }
-
- value = addr[1]; /* device ID */
-
- switch ((unsigned long)value) {
- case AMD_ID_F040B:
- info->flash_id += FLASH_AM040;
- info->sector_count = 8;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case AMD_ID_LV400T:
- info->flash_id += FLASH_AM400T;
- info->sector_count = 11;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case AMD_ID_LV400B:
- info->flash_id += FLASH_AM400B;
- info->sector_count = 11;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case AMD_ID_LV800T:
- info->flash_id += FLASH_AM800T;
- info->sector_count = 19;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case AMD_ID_LV800B:
- info->flash_id += FLASH_AM800B;
- info->sector_count = 19;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case AMD_ID_LV160T:
- info->flash_id += FLASH_AM160T;
- info->sector_count = 35;
- info->size = 0x00400000;
- break; /* => 4 MB */
-
- case AMD_ID_LV160B:
- info->flash_id += FLASH_AM160B;
- info->sector_count = 35;
- info->size = 0x00400000;
- break; /* => 4 MB */
-#if 0 /* enable when device IDs are available */
- case AMD_ID_LV320T:
- info->flash_id += FLASH_AM320T;
- info->sector_count = 67;
- info->size = 0x00800000;
- break; /* => 8 MB */
-
- case AMD_ID_LV320B:
- info->flash_id += FLASH_AM320B;
- info->sector_count = 67;
- info->size = 0x00800000;
- break; /* => 8 MB */
-#endif
- case AMD_ID_LV033C:
- info->flash_id += FLASH_AM033C;
- info->sector_count = 64;
- info->size = 0x01000000;
- break; /* => 16Mb */
- default:
- info->flash_id = FLASH_UNKNOWN;
- return (0); /* => no or unknown flash */
-
- }
-
-#if 0
- /* set up sector start address table */
- if (info->flash_id & FLASH_BTYPE) {
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00008000;
- info->start[2] = base + 0x0000C000;
- info->start[3] = base + 0x00010000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00020000) - 0x00060000;
- }
- } else {
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- info->start[i--] = base + info->size - 0x00008000;
- info->start[i--] = base + info->size - 0x0000C000;
- info->start[i--] = base + info->size - 0x00010000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00020000;
- }
- }
-#else
- flash_get_offsets ((ulong)addr, &flash_info[0]);
-#endif
-
- /* check for protected sectors */
- for (i = 0; i < info->sector_count; i++) {
- /* read sector protection at sector address, (A7 .. A0) = 0x02 */
- /* D0 = 1 if protected */
- addr = (volatile unsigned long *)(info->start[i]);
-#if 1
- /* We don't know why it happens, but on ICU Board *
- * for AMD29033C flash we need to resend the command of *
- * reading flash protection for upper 8 Mb of flash */
- if ( i == 32 ) {
- addr[0x0555] = 0xAAAAAAAA;
- addr[0x02AA] = 0x55555555;
- addr[0x0555] = 0x90909090;
- }
-#endif
- info->protect[i] = addr[2] & 1;
- }
-
- /*
- * Prevent writes to uninitialized FLASH.
- */
- if (info->flash_id != FLASH_UNKNOWN) {
- addr = (volatile unsigned long *)info->start[0];
-#if 0
- *addr = 0x00F000F0; /* reset bank */
-#else
- *addr = 0xF0F0F0F0; /* reset bank */
-#endif
- }
-
- return (info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- vu_long *addr = (vu_long*)(info->start[0]);
- int flag, prot, sect, l_sect;
- ulong start, now, last;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- puts ("- missing\n");
- } else {
- puts ("- no sectors to erase\n");
- }
- return 1;
- }
-
- if ((info->flash_id == FLASH_UNKNOWN) ||
- (info->flash_id > FLASH_AMD_COMP)) {
- puts ("Can't erase unknown flash type - aborted\n");
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- puts ("\n");
- }
-
- l_sect = -1;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
-#if 0
- addr[0x0555] = 0x00AA00AA;
- addr[0x02AA] = 0x00550055;
- addr[0x0555] = 0x00800080;
- addr[0x0555] = 0x00AA00AA;
- addr[0x02AA] = 0x00550055;
-#else
- addr[0x0555] = 0xAAAAAAAA;
- addr[0x02AA] = 0x55555555;
- addr[0x0555] = 0x80808080;
- addr[0x0555] = 0xAAAAAAAA;
- addr[0x02AA] = 0x55555555;
-#endif
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr = (vu_long*)(info->start[sect]);
-#if 0
- addr[0] = 0x00300030;
-#else
- addr[0] = 0x30303030;
-#endif
- l_sect = sect;
- }
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- /*
- * We wait for the last triggered sector
- */
- if (l_sect < 0)
- goto DONE;
-
- start = get_timer (0);
- last = start;
- addr = (vu_long*)(info->start[l_sect]);
-#if 0
- while ((addr[0] & 0x00800080) != 0x00800080)
-#else
- while ((addr[0] & 0xFFFFFFFF) != 0xFFFFFFFF)
-#endif
- {
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- puts ("Timeout\n");
- return 1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- }
-
-DONE:
- /* reset to read mode */
- addr = (volatile unsigned long *)info->start[0];
-#if 0
- addr[0] = 0x00F000F0; /* reset bank */
-#else
- addr[0] = 0xF0F0F0F0; /* reset bank */
-#endif
-
- puts (" done\n");
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int i, l, rc;
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
- for (; i<4 && cnt>0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = 0;
- for (i=0; i<4; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- return (write_word(info, wp, data));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word (flash_info_t *info, ulong dest, ulong data)
-{
- vu_long *addr = (vu_long*)(info->start[0]);
- ulong start;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*((vu_long *)dest) & data) != data) {
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
-#if 0
- addr[0x0555] = 0x00AA00AA;
- addr[0x02AA] = 0x00550055;
- addr[0x0555] = 0x00A000A0;
-#else
- addr[0x0555] = 0xAAAAAAAA;
- addr[0x02AA] = 0x55555555;
- addr[0x0555] = 0xA0A0A0A0;
-#endif
-
- *((vu_long *)dest) = data;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* data polling for D7 */
- start = get_timer (0);
-#if 0
- while ((*((vu_long *)dest) & 0x00800080) != (data & 0x00800080))
-#else
- while ((*((vu_long *)dest) & 0x80808080) != (data & 0x80808080))
-#endif
- {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- return (1);
- }
- }
- return (0);
-}
-
-/*-----------------------------------------------------------------------
- */
diff --git a/board/icu862/icu862.c b/board/icu862/icu862.c
deleted file mode 100644
index 8da9d1c9a4..0000000000
--- a/board/icu862/icu862.c
+++ /dev/null
@@ -1,215 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <config.h>
-#include <mpc8xx.h>
-
-/*
- * Memory Controller Using
- *
- * CS0 - Flash memory (0x40000000)
- * CS1 - SDRAM (0x00000000}
- * CS2 - S/UNI Ultra ATM155
- * CS3 - IDT 77106 ATM25
- * CS4 - DSP HPI
- * CS5 - E1/T1 Interface device
- * CS6 - PCMCIA device
- * CS7 - PCMCIA device
- */
-
-/* ------------------------------------------------------------------------- */
-
-#define _not_used_ 0xffffffff
-
-const uint sdram_table[] = {
- /* single read. (offset 0 in upm RAM) */
- 0x1f07fc04, 0xeeaefc04, 0x11adfc04, 0xefbbbc00,
- 0x1ff77c47,
-
- /* MRS initialization (offset 5) */
-
- 0x1ff77c34, 0xefeabc34, 0x1fb57c35,
-
- /* burst read. (offset 8 in upm RAM) */
- 0x1f07fc04, 0xeeaefc04, 0x10adfc04, 0xf0affc00,
- 0xf0affc00, 0xf1affc00, 0xefbbbc00, 0x1ff77c47,
- _not_used_, _not_used_, _not_used_, _not_used_,
- _not_used_, _not_used_, _not_used_, _not_used_,
-
- /* single write. (offset 18 in upm RAM) */
- 0x1f27fc04, 0xeeaebc00, 0x01b93c04, 0x1ff77c47,
- _not_used_, _not_used_, _not_used_, _not_used_,
-
- /* burst write. (offset 20 in upm RAM) */
- 0x1f07fc04, 0xeeaebc00, 0x10ad7c00, 0xf0affc00,
- 0xf0affc00, 0xe1bbbc04, 0x1ff77c47, _not_used_,
- _not_used_, _not_used_, _not_used_, _not_used_,
- _not_used_, _not_used_, _not_used_, _not_used_,
-
- /* refresh. (offset 30 in upm RAM) */
- 0x1ff5fc84, 0xfffffc04, 0xfffffc04, 0xfffffc04,
- 0xfffffc84, 0xfffffc07, _not_used_, _not_used_,
- _not_used_, _not_used_, _not_used_, _not_used_,
-
- /* exception. (offset 3c in upm RAM) */
- 0x7ffffc07, _not_used_, _not_used_, _not_used_
-};
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Check Board Identity:
- */
-
-int checkboard (void)
-{
- puts ("Board: ICU862 Board\n");
- return 0;
-}
-
-/* ------------------------------------------------------------------------- */
-
-static long int dram_size (long int, long int *, long int);
-
-/* ------------------------------------------------------------------------- */
-
-long int initdram (int board_type)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- long int size8, size9;
- long int size_b0 = 0;
- unsigned long reg;
-
- upmconfig (UPMA, (uint *) sdram_table,
- sizeof (sdram_table) / sizeof (uint));
-
- /*
- * Preliminary prescaler for refresh (depends on number of
- * banks): This value is selected for four cycles every 62.4 us
- * with two SDRAM banks or four cycles every 31.2 us with one
- * bank. It will be adjusted after memory sizing.
- */
- memctl->memc_mptpr = CFG_MPTPR_2BK_8K;
-
- memctl->memc_mar = 0x00000088;
-
- /*
- * Map controller bank 1 to the SDRAM bank at
- * preliminary address - these have to be modified after the
- * SDRAM size has been determined.
- */
- memctl->memc_or1 = CFG_OR1_PRELIM;
- memctl->memc_br1 = CFG_BR1_PRELIM;
-
- memctl->memc_mamr = CFG_MAMR_8COL & (~(MAMR_PTAE)); /* no refresh yet */
-
- udelay (200);
-
- /* perform SDRAM initializsation sequence */
-
- memctl->memc_mcr = 0x80002105; /* SDRAM bank 0 */
- udelay (200);
- memctl->memc_mcr = 0x80002230; /* SDRAM bank 0 - execute twice */
- udelay (200);
-
- memctl->memc_mamr |= MAMR_PTAE; /* enable refresh */
-
- udelay (1000);
-
- /*
- * Check Bank 0 Memory Size for re-configuration
- *
- * try 8 column mode
- */
- size8 = dram_size (CFG_MAMR_8COL, SDRAM_BASE1_PRELIM,
- SDRAM_MAX_SIZE);
-
- udelay (1000);
-
- /*
- * try 9 column mode
- */
- size9 = dram_size (CFG_MAMR_9COL, SDRAM_BASE1_PRELIM,
- SDRAM_MAX_SIZE);
-
- if (size8 < size9) { /* leave configuration at 9 columns */
- size_b0 = size9;
-/* debug ("SDRAM Bank 0 in 9 column mode: %ld MB\n", size >> 20); */
- } else { /* back to 8 columns */
- size_b0 = size8;
- memctl->memc_mamr = CFG_MAMR_8COL;
- udelay (500);
-/* debug ("SDRAM Bank 0 in 8 column mode: %ld MB\n", size >> 20); */
- }
-
- udelay (1000);
-
- /*
- * Adjust refresh rate depending on SDRAM type, both banks
- * For types > 128 MBit leave it at the current (fast) rate
- */
- if ((size_b0 < 0x02000000)) {
- /* reduce to 15.6 us (62.4 us / quad) */
- memctl->memc_mptpr = CFG_MPTPR_2BK_4K;
- udelay (1000);
- }
-
- /*
- * Final mapping
- */
-
- memctl->memc_or1 = ((-size_b0) & 0xFFFF0000) | CFG_OR_TIMING_SDRAM;
- memctl->memc_br1 = (CFG_SDRAM_BASE & BR_BA_MSK) | BR_MS_UPMA | BR_V;
-
- /* adjust refresh rate depending on SDRAM type, one bank */
- reg = memctl->memc_mptpr;
- reg >>= 1; /* reduce to CFG_MPTPR_1BK_8K / _4K */
- memctl->memc_mptpr = reg;
-
- udelay (10000);
-
- return (size_b0);
-}
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Check memory range for valid RAM. A simple memory test determines
- * the actually available RAM size between addresses `base' and
- * `base + maxsize'. Some (not all) hardware errors are detected:
- * - short between address lines
- * - short between data lines
- */
-
-static long int dram_size (long int mamr_value, long int *base,
- long int maxsize)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
-
- memctl->memc_mamr = mamr_value;
-
- return (get_ram_size(base, maxsize));
-}
diff --git a/board/icu862/u-boot.lds b/board/icu862/u-boot.lds
deleted file mode 100644
index 4bc50c50cb..0000000000
--- a/board/icu862/u-boot.lds
+++ /dev/null
@@ -1,144 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc8xx/start.o (.text)
-/*
- cpu/mpc8xx/start.o (.text)
- common/dlmalloc.o (.text)
- lib_ppc/ppcstring.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
- lib_generic/zlib.o (.text)
-
- . = env_offset;
- common/environment.o(.text)
-*/
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/icu862/u-boot.lds.debug b/board/icu862/u-boot.lds.debug
deleted file mode 100644
index 87f228beed..0000000000
--- a/board/icu862/u-boot.lds.debug
+++ /dev/null
@@ -1,138 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc8xx/start.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/extable.o (.text)
-
- . = env_offset;
- common/environment.o(.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/ids8247/Makefile b/board/ids8247/Makefile
deleted file mode 100644
index cfef750ec6..0000000000
--- a/board/ids8247/Makefile
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# (C) Copyright 2005
-# Heiko Schocher, DENX Software Engineering, <hs@denx.de>
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/ids8247/config.mk b/board/ids8247/config.mk
deleted file mode 100644
index 136cdb8641..0000000000
--- a/board/ids8247/config.mk
+++ /dev/null
@@ -1,34 +0,0 @@
-#
-# (C) Copyright 2005
-# Heiko Schocher, DENX Software Engineering, <hs@denx.de>
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# IDS 8247 Board
-#
-
-# This should be equal to the CFG_FLASH_BASE define in config_IDS8247.h
-# for the "final" configuration, with U-Boot in flash, or the address
-# in RAM where U-Boot is loaded at for debugging.
-#
-TEXT_BASE = 0xfff00000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)
diff --git a/board/ids8247/flash.c b/board/ids8247/flash.c
deleted file mode 100644
index 4eba4b9687..0000000000
--- a/board/ids8247/flash.c
+++ /dev/null
@@ -1,484 +0,0 @@
-/*
- * (C) Copyright 2005
- * Heiko Schocher, DENX Software Engineering, <hs@denx.de>
- *
- * (C) Copyright 2001
- * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
- *
- * (C) Copyright 2001-2005
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#undef DEBUG
-
-#include <common.h>
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-#if defined(CFG_ENV_IS_IN_FLASH)
-# ifndef CFG_ENV_ADDR
-# define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_ENV_OFFSET)
-# endif
-# ifndef CFG_ENV_SIZE
-# define CFG_ENV_SIZE CFG_ENV_SECT_SIZE
-# endif
-# ifndef CFG_ENV_SECT_SIZE
-# define CFG_ENV_SECT_SIZE CFG_ENV_SIZE
-# endif
-#endif
-
-/*-----------------------------------------------------------------------
- * Protection Flags:
- */
-#define FLAG_PROTECT_SET 0x01
-#define FLAG_PROTECT_CLEAR 0x02
-
-/* Board support for 1 or 2 flash devices */
-#undef FLASH_PORT_WIDTH32
-#undef FLASH_PORT_WIDTH16
-#define FLASH_PORT_WIDTH8
-
-#ifdef FLASH_PORT_WIDTH16
-#define FLASH_PORT_WIDTH ushort
-#define FLASH_PORT_WIDTHV vu_short
-#elif FLASH_PORT_WIDTH32
-#define FLASH_PORT_WIDTH ulong
-#define FLASH_PORT_WIDTHV vu_long
-#else /* FLASH_PORT_WIDTH8 */
-#define FLASH_PORT_WIDTH uchar
-#define FLASH_PORT_WIDTHV vu_char
-#endif
-
-#define FPW FLASH_PORT_WIDTH
-#define FPWV FLASH_PORT_WIDTHV
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (FPWV * addr, flash_info_t * info);
-static int write_data (flash_info_t * info, ulong dest, FPW data);
-static void flash_get_offsets (ulong base, flash_info_t * info);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- unsigned long size_b0;
- int i;
- volatile immap_t * immr = (immap_t *)CFG_IMMR;
- volatile memctl8260_t *memctl = &immr->im_memctl;
-
- /* Init: no FLASHes known */
- for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* Static FLASH Bank configuration here - FIXME XXX */
- size_b0 = flash_get_size ((FPW *) CFG_FLASH0_BASE, &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size_b0, size_b0 << 20);
- }
-
- memctl->memc_or0 = 0xff800060;
- memctl->memc_br0 = 0xff800801;
-
- flash_get_offsets (0xff800000, &flash_info[0]);
-
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
- /* monitor protection ON by default */
- (void) flash_protect (FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE + monitor_flash_len - 1,
- &flash_info[0]);
-#endif
-
-#ifdef CFG_ENV_IS_IN_FLASH
- /* ENV protection ON by default */
- flash_protect (FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1,
- &flash_info[0]);
-#endif
-
- flash_info[0].size = size_b0;
-
- return (size_b0);
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_get_offsets (ulong base, flash_info_t * info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- return;
- }
-
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
- for (i = 0; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00020000);
- }
- }
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t * info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_INTEL:
- printf ("INTEL ");
- break;
- default:
- printf ("Unknown Vendor ");
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_28F320J3A:
- printf ("28F320J3A\n");
- break;
- case FLASH_28F640J3A:
- printf ("28F640J3A\n");
- break;
- case FLASH_28F128J3A:
- printf ("28F128J3A\n");
- break;
- default:
- printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " ");
- }
- printf ("\n");
- return;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-
-static ulong flash_get_size (FPWV * addr, flash_info_t * info)
-{
- FPW value;
-
- addr[0] = (FPW) 0x00900090;
-
- value = addr[0];
-
- debug ("Manuf. ID @ 0x%08lx: 0x%08lx\n", (ulong)addr, value);
-
- switch (value) {
- case (FPW) INTEL_MANUFACT:
- info->flash_id = FLASH_MAN_INTEL;
- break;
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
- return (0); /* no or unknown flash */
- }
-
-#ifdef FLASH_PORT_WIDTH8
- value = addr[2]; /* device ID */
-#else
- value = addr[1]; /* device ID */
-#endif
-
- debug ("Device ID @ 0x%08lx: 0x%08lx\n", (ulong)(&addr[1]), value);
-
- switch (value) {
- case (FPW) INTEL_ID_28F320J3A:
- info->flash_id += FLASH_28F320J3A;
- info->sector_count = 32;
- info->size = 0x00400000;
- break; /* => 4 MB */
-
- case (FPW) INTEL_ID_28F640J3A:
- info->flash_id += FLASH_28F640J3A;
- info->sector_count = 64;
- info->size = 0x00800000;
- break; /* => 8 MB */
-
- case (FPW) INTEL_ID_28F128J3A:
- info->flash_id += FLASH_28F128J3A;
- info->sector_count = 128;
- info->size = 0x01000000;
- break; /* => 16 MB */
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- break;
- }
-
- if (info->sector_count > CFG_MAX_FLASH_SECT) {
- printf ("** ERROR: sector count %d > max (%d) **\n",
- info->sector_count, CFG_MAX_FLASH_SECT);
- info->sector_count = CFG_MAX_FLASH_SECT;
- }
-
- addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
-
- return (info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t * info, int s_first, int s_last)
-{
- int flag, prot, sect;
- ulong type, start, now, last;
- int rcode = 0;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- type = (info->flash_id & FLASH_VENDMASK);
- if ((type != FLASH_MAN_INTEL)) {
- printf ("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- return 1;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- start = get_timer (0);
- last = start;
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- FPWV *addr = (FPWV *) (info->start[sect]);
- FPW status;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
-
- *addr = (FPW) 0x00500050; /* clear status register */
- *addr = (FPW) 0x00200020; /* erase setup */
- *addr = (FPW) 0x00D000D0; /* erase confirm */
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts ();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
- if ((now = get_timer (start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- *addr = (FPW) 0x00B000B0; /* suspend erase */
- *addr = (FPW) 0x00FF00FF; /* reset to read mode */
- rcode = 1;
- break;
- }
-
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- }
-
- *addr = (FPW) 0x00FF00FF; /* reset to read mode */
- }
- }
- printf (" done\n");
- return rcode;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- * 4 - Flash not identified
- */
-
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- ulong cp, wp;
- FPW data;
-
- int i, l, rc, port_width;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- return 4;
- }
-/* get lower word aligned address */
-#ifdef FLASH_PORT_WIDTH16
- wp = (addr & ~1);
- port_width = 2;
-#elif defined(FLASH_PORT_WIDTH32)
- wp = (addr & ~3);
- port_width = 4;
-#else
- wp = addr;
- port_width = 1;
-#endif
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i = 0, cp = wp; i < l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
- for (; i < port_width && cnt > 0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt == 0 && i < port_width; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
-
- if ((rc = write_data (info, wp, data)) != 0) {
- return (rc);
- }
- wp += port_width;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= port_width) {
- data = 0;
- for (i = 0; i < port_width; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_data (info, wp, data)) != 0) {
- return (rc);
- }
- wp += port_width;
- cnt -= port_width;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i < port_width; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
-
- return (write_data (info, wp, data));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word or halfword to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_data (flash_info_t * info, ulong dest, FPW data)
-{
- FPWV *addr = (FPWV *) dest;
- ulong status;
- ulong start;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*addr & data) != data) {
- printf ("not erased at %08lx (%x)\n", (ulong) addr, *addr);
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
-
- *addr = (FPW) 0x00400040; /* write setup */
- *addr = data;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts ();
-
- start = get_timer (0);
-
- while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
- if (get_timer (start) > CFG_FLASH_WRITE_TOUT) {
- *addr = (FPW) 0x00FF00FF; /* restore read mode */
- return (1);
- }
- }
-
- *addr = (FPW) 0x00FF00FF; /* restore read mode */
-
- return (0);
-}
diff --git a/board/ids8247/ids8247.c b/board/ids8247/ids8247.c
deleted file mode 100644
index 081ef658e0..0000000000
--- a/board/ids8247/ids8247.c
+++ /dev/null
@@ -1,318 +0,0 @@
-/*
- * (C) Copyright 2005
- * Heiko Schocher, DENX Software Engineering, <hs@denx.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <ioports.h>
-#include <mpc8260.h>
-
-/*
- * I/O Port configuration table
- *
- * if conf is 1, then that port pin will be configured at boot time
- * according to the five values podr/pdir/ppar/psor/pdat for that entry
- */
-
-const iop_conf_t iop_conf_tab[4][32] = {
-
- /* Port A configuration */
- { /* conf ppar psor pdir podr pdat */
- /* PA31 */ { 0, 1, 1, 0, 0, 0 }, /* FCC1 COL */
- /* PA30 */ { 0, 1, 1, 0, 0, 0 }, /* FCC1 CRS */
- /* PA29 */ { 0, 1, 1, 1, 0, 0 }, /* FCC1 TXER */
- /* PA28 */ { 0, 1, 1, 1, 0, 0 }, /* FCC1 TXEN */
- /* PA27 */ { 0, 1, 1, 0, 0, 0 }, /* FCC1 RXDV */
- /* PA26 */ { 0, 1, 1, 0, 0, 0 }, /* FCC1 RXER */
- /* PA25 */ { 0, 0, 0, 0, 1, 0 }, /* 8247_P0 */
-#if defined(CONFIG_SOFT_I2C)
- /* PA24 */ { 1, 0, 0, 0, 1, 1 }, /* I2C_SDA2 */
- /* PA23 */ { 1, 0, 0, 1, 1, 1 }, /* I2C_SCL2 */
-#else /* normal I/O port pins */
- /* PA24 */ { 0, 0, 0, 1, 0, 0 }, /* PA24 */
- /* PA23 */ { 0, 0, 0, 1, 0, 0 }, /* PA23 */
-#endif
- /* PA22 */ { 0, 0, 0, 0, 1, 0 }, /* SMC2_DCD */
- /* PA21 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 TXD3 */
- /* PA20 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 TXD2 */
- /* PA19 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 TXD1 */
- /* PA18 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 TXD0 */
- /* PA17 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 RXD0 */
- /* PA16 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 RXD1 */
- /* PA15 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 RXD2 */
- /* PA14 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 RXD3 */
- /* PA13 */ { 0, 0, 0, 1, 1, 0 }, /* SMC2_RTS */
- /* PA12 */ { 0, 0, 0, 0, 1, 0 }, /* SMC2_CTS */
- /* PA11 */ { 0, 0, 0, 1, 1, 0 }, /* SMC2_DTR */
- /* PA10 */ { 0, 0, 0, 0, 1, 0 }, /* SMC2_DSR */
- /* PA9 */ { 0, 1, 0, 1, 0, 0 }, /* SMC2 TXD */
- /* PA8 */ { 0, 1, 0, 0, 0, 0 }, /* SMC2 RXD */
- /* PA7 */ { 0, 0, 0, 1, 0, 0 }, /* PA7 */
- /* PA6 */ { 0, 0, 0, 1, 0, 0 }, /* PA6 */
- /* PA5 */ { 0, 0, 0, 1, 0, 0 }, /* PA5 */
- /* PA4 */ { 0, 0, 0, 1, 0, 0 }, /* PA4 */
- /* PA3 */ { 0, 0, 0, 1, 0, 0 }, /* PA3 */
- /* PA2 */ { 0, 0, 0, 1, 0, 0 }, /* PA2 */
- /* PA1 */ { 0, 0, 0, 1, 0, 0 }, /* PA1 */
- /* PA0 */ { 0, 0, 0, 1, 0, 0 } /* PA0 */
- },
-
- /* Port B configuration */
- { /* conf ppar psor pdir podr pdat */
- /* PB31 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TX_ER */
- /* PB30 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_DV */
- /* PB29 */ { 1, 1, 1, 1, 0, 0 }, /* FCC2 MII TX_EN */
- /* PB28 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_ER */
- /* PB27 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII COL */
- /* PB26 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII CRS */
- /* PB25 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[3] */
- /* PB24 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[2] */
- /* PB23 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[1] */
- /* PB22 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[0] */
- /* PB21 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[0] */
- /* PB20 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[1] */
- /* PB19 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[2] */
- /* PB18 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[3] */
- /* PB17 */ { 0, 0, 0, 0, 0, 0 }, /* PB17 */
- /* PB16 */ { 0, 0, 0, 0, 0, 0 }, /* PB16 */
- /* PB15 */ { 0, 0, 0, 0, 0, 0 }, /* PB15 */
- /* PB14 */ { 0, 0, 0, 0, 0, 0 }, /* PB14 */
- /* PB13 */ { 0, 0, 0, 0, 0, 0 }, /* PB13 */
- /* PB12 */ { 0, 0, 0, 0, 0, 0 }, /* PB12 */
- /* PB11 */ { 0, 0, 0, 0, 0, 0 }, /* PB11 */
- /* PB10 */ { 0, 0, 0, 0, 0, 0 }, /* PB10 */
- /* PB9 */ { 0, 0, 0, 0, 0, 0 }, /* PB9 */
- /* PB8 */ { 0, 0, 0, 0, 0, 0 }, /* PB8 */
- /* PB7 */ { 0, 0, 0, 0, 0, 0 }, /* PB7 */
- /* PB6 */ { 0, 0, 0, 0, 0, 0 }, /* PB6 */
- /* PB5 */ { 0, 0, 0, 0, 0, 0 }, /* PB5 */
- /* PB4 */ { 0, 0, 0, 0, 0, 0 }, /* PB4 */
- /* PB3 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PB2 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PB1 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PB0 */ { 0, 0, 0, 0, 0, 0 } /* pin doesn't exist */
- },
-
- /* Port C */
- { /* conf ppar psor pdir podr pdat */
- /* PC31 */ { 0, 0, 0, 1, 0, 0 }, /* PC31 */
- /* PC30 */ { 0, 0, 0, 1, 0, 0 }, /* PC30 */
- /* PC29 */ { 0, 1, 0, 0, 0, 0 }, /* SCC1 EN *CLSN */
- /* PC28 */ { 0, 1, 1, 0, 0, 0 }, /* SYNC_OUT */
- /* PC27 */ { 0, 0, 0, 1, 0, 0 }, /* PC27 */
- /* PC26 */ { 0, 0, 0, 1, 0, 0 }, /* PC26 */
- /* PC25 */ { 0, 1, 1, 0, 0, 0 }, /* SYNC_IN */
- /* PC24 */ { 0, 0, 0, 1, 0, 0 }, /* PC24 */
- /* PC23 */ { 0, 1, 0, 1, 0, 0 }, /* ATMTFCLK */
- /* PC22 */ { 0, 1, 0, 0, 0, 0 }, /* ATMRFCLK */
- /* PC21 */ { 0, 1, 0, 0, 0, 0 }, /* SCC1 EN RXCLK */
- /* PC20 */ { 0, 1, 0, 0, 0, 0 }, /* SCC1 EN TXCLK */
- /* PC19 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_CLK */
- /* PC18 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII TX_CLK */
- /* PC17 */ { 0, 0, 0, 1, 0, 0 }, /* PC17 */
- /* PC16 */ { 0, 0, 0, 1, 0, 0 }, /* PC16 */
- /* PC15 */ { 0, 0, 0, 1, 0, 0 }, /* PC15 */
- /* PC14 */ { 0, 1, 0, 0, 0, 0 }, /* SCC1 EN *CD */
- /* PC13 */ { 0, 0, 0, 1, 0, 0 }, /* PC13 */
- /* PC12 */ { 0, 0, 0, 1, 0, 0 }, /* PC12 */
- /* PC11 */ { 0, 0, 0, 1, 0, 0 }, /* PC11 */
- /* PC10 */ { 0, 0, 0, 1, 0, 0 }, /* FCC2 MDC */
- /* PC9 */ { 0, 0, 0, 1, 0, 0 }, /* FCC2 MDIO */
- /* PC8 */ { 0, 0, 0, 1, 0, 0 }, /* PC8 */
- /* PC7 */ { 0, 0, 0, 1, 0, 0 }, /* PC7 */
- /* PC6 */ { 0, 0, 0, 1, 0, 0 }, /* PC6 */
- /* PC5 */ { 0, 0, 0, 1, 0, 0 }, /* PC5 */
- /* PC4 */ { 0, 0, 0, 1, 0, 0 }, /* PC4 */
- /* PC3 */ { 0, 0, 0, 1, 0, 0 }, /* PC3 */
- /* PC2 */ { 0, 0, 0, 1, 0, 1 }, /* ENET FDE */
- /* PC1 */ { 0, 0, 0, 1, 0, 0 }, /* ENET DSQE */
- /* PC0 */ { 0, 0, 0, 1, 0, 0 }, /* ENET LBK */
- },
-
- /* Port D */
- { /* conf ppar psor pdir podr pdat */
- /* PD31 */ { 0, 1, 0, 0, 0, 0 }, /* SCC1 EN RxD */
- /* PD30 */ { 0, 1, 1, 1, 0, 0 }, /* SCC1 EN TxD */
- /* PD29 */ { 0, 1, 0, 1, 0, 0 }, /* SCC1 EN TENA */
- /* PD28 */ { 0, 0, 0, 1, 0, 0 }, /* PD28 */
- /* PD27 */ { 0, 0, 0, 1, 0, 0 }, /* PD27 */
- /* PD26 */ { 0, 0, 0, 1, 0, 0 }, /* PD26 */
- /* PD25 */ { 0, 1, 0, 0, 0, 0 }, /* SCC3_RX */
- /* PD24 */ { 0, 1, 0, 1, 0, 0 }, /* SCC3_TX */
- /* PD23 */ { 0, 1, 0, 1, 0, 0 }, /* SCC3_RTS */
- /* PD22 */ { 0, 1, 0, 0, 0, 0 }, /* SCC4_RXD */
- /* PD21 */ { 0, 1, 0, 1, 0, 0 }, /* SCC4_TXD */
- /* PD20 */ { 0, 1, 0, 1, 0, 0 }, /* SCC4_RTS */
- /* PD19 */ { 0, 1, 1, 0, 0, 0 }, /* SPI_SEL */
- /* PD18 */ { 0, 1, 1, 0, 0, 0 }, /* SPI_CLK */
- /* PD17 */ { 0, 1, 1, 0, 0, 0 }, /* SPI_MOSI */
- /* PD16 */ { 0, 1, 1, 0, 0, 0 }, /* SPI_MISO */
-#if defined(CONFIG_HARD_I2C)
- /* PD15 */ { 1, 1, 1, 0, 1, 0 }, /* I2C SDA1 */
- /* PD14 */ { 1, 1, 1, 0, 1, 0 }, /* I2C SCL1 */
-#else /* normal I/O port pins */
- /* PD15 */ { 0, 1, 1, 0, 1, 0 }, /* PD15 */
- /* PD14 */ { 0, 1, 1, 0, 1, 0 }, /* PD14 */
-#endif
- /* PD13 */ { 0, 0, 0, 0, 0, 0 }, /* PD13 */
- /* PD12 */ { 0, 0, 0, 0, 0, 0 }, /* PD12 */
- /* PD11 */ { 0, 0, 0, 0, 0, 0 }, /* PD11 */
- /* PD10 */ { 0, 0, 0, 0, 0, 0 }, /* PD10 */
- /* PD9 */ { 0, 0, 0, 0, 0, 0 }, /* PD9 */
- /* PD8 */ { 0, 0, 0, 0, 0, 0 }, /* PD8 */
- /* PD7 */ { 0, 0, 0, 1, 0, 1 }, /* MII_MDIO */
- /* PD6 */ { 0, 0, 0, 1, 0, 1 }, /* PD6 */
- /* PD5 */ { 0, 0, 0, 1, 0, 1 }, /* PD5 */
- /* PD4 */ { 0, 0, 0, 1, 0, 1 }, /* PD4 */
- /* PD3 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PD2 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PD1 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PD0 */ { 0, 0, 0, 0, 0, 0 } /* pin doesn't exist */
- }
-};
-
-/* ------------------------------------------------------------------------- */
-
-/* Check Board Identity:
- */
-int checkboard (void)
-{
- puts ("Board: IDS 8247\n");
- return 0;
-}
-
-/* ------------------------------------------------------------------------- */
-
-/* Try SDRAM initialization with P/LSDMR=sdmr and ORx=orx
- *
- * This routine performs standard 8260 initialization sequence
- * and calculates the available memory size. It may be called
- * several times to try different SDRAM configurations on both
- * 60x and local buses.
- */
-static long int try_init (volatile memctl8260_t * memctl, ulong sdmr,
- ulong orx, volatile uchar * base)
-{
- volatile uchar c = 0xff;
- volatile uint *sdmr_ptr;
- volatile uint *orx_ptr;
- ulong maxsize, size;
- int i;
-
- /* We must be able to test a location outsize the maximum legal size
- * to find out THAT we are outside; but this address still has to be
- * mapped by the controller. That means, that the initial mapping has
- * to be (at least) twice as large as the maximum expected size.
- */
- maxsize = (1 + (~orx | 0x7fff)) / 2;
-
- sdmr_ptr = &memctl->memc_psdmr;
- orx_ptr = &memctl->memc_or2;
-
- *orx_ptr = orx;
-
- /*
- * Quote from 8260 UM (10.4.2 SDRAM Power-On Initialization, 10-35):
- *
- * "At system reset, initialization software must set up the
- * programmable parameters in the memory controller banks registers
- * (ORx, BRx, P/LSDMR). After all memory parameters are configured,
- * system software should execute the following initialization sequence
- * for each SDRAM device.
- *
- * 1. Issue a PRECHARGE-ALL-BANKS command
- * 2. Issue eight CBR REFRESH commands
- * 3. Issue a MODE-SET command to initialize the mode register
- *
- * The initial commands are executed by setting P/LSDMR[OP] and
- * accessing the SDRAM with a single-byte transaction."
- *
- * The appropriate BRx/ORx registers have already been set when we
- * get here. The SDRAM can be accessed at the address CFG_SDRAM_BASE.
- */
-
- *sdmr_ptr = sdmr | PSDMR_OP_PREA;
- *base = c;
-
- *sdmr_ptr = sdmr | PSDMR_OP_CBRR;
- for (i = 0; i < 8; i++)
- *base = c;
-
- *sdmr_ptr = sdmr | PSDMR_OP_MRW;
- *(base + CFG_MRS_OFFS) = c; /* setting MR on address lines */
-
- *sdmr_ptr = sdmr | PSDMR_OP_NORM | PSDMR_RFEN;
- *base = c;
-
- size = get_ram_size((long *)base, maxsize);
- *orx_ptr = orx | ~(size - 1);
-
- return (size);
-}
-
-long int initdram (int board_type)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8260_t *memctl = &immap->im_memctl;
-
- long psize, lsize;
-
- psize = 16 * 1024 * 1024;
- lsize = 0;
-
- memctl->memc_psrt = CFG_PSRT;
- memctl->memc_mptpr = CFG_MPTPR;
-
-#ifndef CFG_RAMBOOT
- /* 60x SDRAM setup:
- */
- psize = try_init (memctl, CFG_PSDMR, CFG_OR2,
- (uchar *) CFG_SDRAM_BASE);
-#endif /* CFG_RAMBOOT */
-
- icache_enable ();
-
- return (psize);
-}
-
-int misc_init_r (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- gd->bd->bi_flashstart = 0xff800000;
-}
-
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
-extern ulong
-nand_probe (ulong physadr);
-
-void
-nand_init (void)
-{
- ulong totlen = 0;
-
- debug ("Probing at 0x%.8x\n", CFG_NAND0_BASE);
- totlen += nand_probe (CFG_NAND0_BASE);
-
- printf ("%4lu MB\n", totlen >>20);
-}
-
-#endif /* CFG_CMD_NAND */
diff --git a/board/ids8247/u-boot.lds b/board/ids8247/u-boot.lds
deleted file mode 100644
index 788aed3c6f..0000000000
--- a/board/ids8247/u-boot.lds
+++ /dev/null
@@ -1,126 +0,0 @@
-/*
- * (C) Copyright 2001
- * Heiko Schocher, DENX Software Engineering, <hs@denx.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc8260/start.o (.text)
- *(.text)
- common/environment.o(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/impa7/Makefile b/board/impa7/Makefile
deleted file mode 100644
index 08543f94f2..0000000000
--- a/board/impa7/Makefile
+++ /dev/null
@@ -1,47 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := impa7.o flash.o
-SOBJS := lowlevel_init.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS) $(SOBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/impa7/config.mk b/board/impa7/config.mk
deleted file mode 100644
index 417d6a8e2c..0000000000
--- a/board/impa7/config.mk
+++ /dev/null
@@ -1,28 +0,0 @@
-#
-# (C) Copyright 2000
-# Sysgo Real-Time Solutions, GmbH <www.elinos.com>
-# Marius Groeger <mgroeger@sysgo.de>
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-TEXT_BASE = 0xc1780000
diff --git a/board/impa7/flash.c b/board/impa7/flash.c
deleted file mode 100644
index ca76fe8327..0000000000
--- a/board/impa7/flash.c
+++ /dev/null
@@ -1,357 +0,0 @@
-/*
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-
-#define FLASH_BANK_SIZE 0x800000
-#define MAIN_SECT_SIZE 0x20000
-#define PARAM_SECT_SIZE 0x4000
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
-
-
-/*-----------------------------------------------------------------------
- */
-
-ulong flash_init (void)
-{
- int i, j;
- ulong size = 0;
-
- for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
- ulong flashbase = 0;
-
- flash_info[i].flash_id =
- (INTEL_MANUFACT & FLASH_VENDMASK) |
- (INTEL_ID_28F320B3T & FLASH_TYPEMASK);
- flash_info[i].size = FLASH_BANK_SIZE;
- flash_info[i].sector_count = CFG_MAX_FLASH_SECT;
- memset (flash_info[i].protect, 0, CFG_MAX_FLASH_SECT);
- if (i == 0)
- flashbase = PHYS_FLASH_1;
- else if (i == 1)
- flashbase = PHYS_FLASH_2;
- else
- panic ("configured too many flash banks!\n");
- for (j = 0; j < flash_info[i].sector_count; j++) {
- if (j <= 7) {
- flash_info[i].start[j] =
- flashbase + j * PARAM_SECT_SIZE;
- } else {
- flash_info[i].start[j] =
- flashbase + (j - 7) * MAIN_SECT_SIZE;
- }
- }
- size += flash_info[i].size;
- }
-
- /* Protect monitor and environment sectors
- */
- flash_protect (FLAG_PROTECT_SET,
- CFG_FLASH_BASE,
- CFG_FLASH_BASE + monitor_flash_len - 1,
- &flash_info[0]);
-
- flash_protect (FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0]);
-
- return size;
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t * info)
-{
- int i;
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case (INTEL_MANUFACT & FLASH_VENDMASK):
- printf ("Intel: ");
- break;
- default:
- printf ("Unknown Vendor ");
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case (INTEL_ID_28F320B3T & FLASH_TYPEMASK):
- printf ("28F320F3B (16Mbit)\n");
- break;
- default:
- printf ("Unknown Chip Type\n");
- goto Done;
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; i++) {
- if ((i % 5) == 0) {
- printf ("\n ");
- }
- printf (" %08lX%s", info->start[i],
- info->protect[i] ? " (RO)" : " ");
- }
- printf ("\n");
-
- Done:;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t * info, int s_first, int s_last)
-{
- int flag, prot, sect;
- int rc = ERR_OK;
-
- if (info->flash_id == FLASH_UNKNOWN)
- return ERR_UNKNOWN_FLASH_TYPE;
-
- if ((s_first < 0) || (s_first > s_last)) {
- return ERR_INVAL;
- }
-
- if ((info->flash_id & FLASH_VENDMASK) !=
- (INTEL_MANUFACT & FLASH_VENDMASK)) {
- return ERR_UNKNOWN_FLASH_VENDOR;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
- if (prot)
- return ERR_PROTECTED;
-
- /*
- * Disable interrupts which might cause a timeout
- * here. Remember that our exception vectors are
- * at address 0 in the flash, and we don't want a
- * (ticker) exception to happen while the flash
- * chip is in programming mode.
- */
- flag = disable_interrupts ();
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect <= s_last && !ctrlc (); sect++) {
-
- printf ("Erasing sector %2d ... ", sect);
-
- /* arm simple, non interrupt dependent timer */
- reset_timer_masked ();
-
- if (info->protect[sect] == 0) { /* not protected */
- vu_long *addr = (vu_long *) (info->start[sect]);
-
- *addr = 0x00200020; /* erase setup */
- *addr = 0x00D000D0; /* erase confirm */
-
- while ((*addr & 0x00800080) != 0x00800080) {
- if (get_timer_masked () >
- CFG_FLASH_ERASE_TOUT) {
- *addr = 0x00B000B0; /* suspend erase */
- *addr = 0x00FF00FF; /* reset to read mode */
- rc = ERR_TIMOUT;
- goto outahere;
- }
- }
-
- *addr = 0x00FF00FF; /* reset to read mode */
- }
- printf ("ok.\n");
- }
- if (ctrlc ())
- printf ("User Interrupt!\n");
-
- outahere:
-
- /* allow flash to settle - wait 10 ms */
- udelay_masked (10000);
-
- if (flag)
- enable_interrupts ();
-
- return rc;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash
- */
-
-static int write_word (flash_info_t * info, ulong dest, ulong data)
-{
- vu_long *addr = (vu_long *) dest;
- ulong barf;
- int rc = ERR_OK;
- int flag;
-
- /* Check if Flash is (sufficiently) erased
- */
- if ((*addr & data) != data)
- return ERR_NOT_ERASED;
-
- /*
- * Disable interrupts which might cause a timeout
- * here. Remember that our exception vectors are
- * at address 0 in the flash, and we don't want a
- * (ticker) exception to happen while the flash
- * chip is in programming mode.
- */
- flag = disable_interrupts ();
-
- /* clear status register command */
- *addr = 0x00500050;
-
- /* program set-up command */
- *addr = 0x00400040;
-
- /* latch address/data */
- *addr = data;
-
- /* arm simple, non interrupt dependent timer */
- reset_timer_masked ();
-
- /* read status register command */
- *addr = 0x00700070;
-
- /* wait while polling the status register */
- while ((*addr & 0x00800080) != 0x00800080) {
- if (get_timer_masked () > CFG_FLASH_WRITE_TOUT) {
- rc = ERR_TIMOUT;
- /* suspend program command */
- *addr = 0x00B000B0;
- goto outahere;
- }
-
- if (*addr & 0x003A003A) { /* check for error */
- barf = *addr;
- if (barf & 0x003A0000) {
- barf >>= 16;
- } else {
- barf &= 0x0000003A;
- }
- printf ("\nFlash write error %02lx at address %08lx\n", barf, (unsigned long) dest);
- if (barf & 0x0002) {
- printf ("Block locked, not erased.\n");
- rc = ERR_NOT_ERASED;
- goto outahere;
- }
- if (barf & 0x0010) {
- printf ("Programming error.\n");
- rc = ERR_PROG_ERROR;
- goto outahere;
- }
- if (barf & 0x0008) {
- printf ("Vpp Low error.\n");
- rc = ERR_PROG_ERROR;
- goto outahere;
- }
- rc = ERR_PROG_ERROR;
- goto outahere;
- }
- }
-
-
- outahere:
- /* read array command */
- *addr = 0x00FF00FF;
-
- if (flag)
- enable_interrupts ();
-
- return rc;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash.
- */
-
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int l;
- int i, rc;
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i = 0, cp = wp; i < l; ++i, ++cp) {
- data = (data >> 8) | (*(uchar *) cp << 24);
- }
- for (; i < 4 && cnt > 0; ++i) {
- data = (data >> 8) | (*src++ << 24);
- --cnt;
- ++cp;
- }
- for (; cnt == 0 && i < 4; ++i, ++cp) {
- data = (data >> 8) | (*(uchar *) cp << 24);
- }
-
- if ((rc = write_word (info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = *((vu_long *) src);
- if ((rc = write_word (info, wp, data)) != 0) {
- return (rc);
- }
- src += 4;
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return ERR_OK;
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i = 0, cp = wp; i < 4 && cnt > 0; ++i, ++cp) {
- data = (data >> 8) | (*src++ << 24);
- --cnt;
- }
- for (; i < 4; ++i, ++cp) {
- data = (data >> 8) | (*(uchar *) cp << 24);
- }
-
- return write_word (info, wp, data);
-}
diff --git a/board/impa7/impa7.c b/board/impa7/impa7.c
deleted file mode 100644
index e496923282..0000000000
--- a/board/impa7/impa7.c
+++ /dev/null
@@ -1,61 +0,0 @@
-/*
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <clps7111.h>
-
-/* ------------------------------------------------------------------------- */
-
-
-/*
- * Miscelaneous platform dependent initialisations
- */
-
-int board_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- /* Activate LED flasher */
- IO_LEDFLSH = 0x40;
-
- /* arch number of EP7111 */
- gd->bd->bi_arch_number = MACH_TYPE_EDB7211;
-
- /* location of boot parameters for EP7111 */
- gd->bd->bi_boot_params = 0xc0020100;
-
- return 0;
-}
-
-int dram_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
- gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
- gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
-
- return (0);
-}
diff --git a/board/impa7/lowlevel_init.S b/board/impa7/lowlevel_init.S
deleted file mode 100644
index 7ce10a2019..0000000000
--- a/board/impa7/lowlevel_init.S
+++ /dev/null
@@ -1,85 +0,0 @@
-/*
- * Memory Setup stuff - taken from ???
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-
-#include <config.h>
-#include <version.h>
-
-
-/* some parameters for the board */
-
-SYSCON2: .long 0x80001100
-MEMCFG1: .long 0x80000180
-MEMCFG2: .long 0x800001C0
-DRFPR: .long 0x80000200
-
-syscon2_mask: .long 0x00000004
-memcfg1_val: .long 0x160c1414
-memcfg2_mask: .long 0x0000ffff @ only set lower 16 bits
-memcfg2_val: .long 0x00000000 @ upper 16 bits are reserved for CS7 + CS6
-drfpr_val: .long 0x00000081
-/* setting up the memory */
-
-.globl lowlevel_init
-lowlevel_init:
- /*
- * DRFPR
- * 64kHz DRAM refresh
- */
- ldr r0, DRFPR
- ldr r1, drfpr_val
- str r1, [r0]
-
- /*
- * SYSCON2: clear bit 2, DRAM is 32 bits wide
- */
- ldr r0, SYSCON2
- ldr r2, [r0]
- ldr r1, syscon2_mask
- bic r2, r2, r1
- str r2, [r0]
-
- /*
- * MEMCFG1
- * Setting up Keyboard at CS3, 8 Bit, 3 Waitstates
- * Setting up CS8900 (Ethernet) at CS2, 32 Bit, 5 Waitstates
- * Setting up flash at CS0 and CS1, 32 Bit, 3 Waitstates
- */
- ldr r0, MEMCFG1
- ldr r1, memcfg1_val
- str r1, [r0]
-
- /*
- * MEMCFG2
- * Setting up ? with 0
- *
- */
- ldr r0, MEMCFG2
- ldr r2, [r0]
- ldr r1, memcfg2_mask
- bic r2, r2, r1
- ldr r1, memcfg2_val
- orr r2, r2, r1
- str r2, [r0]
-
- /* everything is fine now */
- mov pc, lr
diff --git a/board/impa7/u-boot.lds b/board/impa7/u-boot.lds
deleted file mode 100644
index 1122d7521c..0000000000
--- a/board/impa7/u-boot.lds
+++ /dev/null
@@ -1,56 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-ENTRY(_start)
-SECTIONS
-{
- . = 0x00000000;
-
- . = ALIGN(4);
- .text :
- {
- cpu/arm720t/start.o (.text)
- *(.text)
- }
-
- . = ALIGN(4);
- .rodata : { *(.rodata) }
-
- . = ALIGN(4);
- .data : { *(.data) }
-
- . = ALIGN(4);
- .got : { *(.got) }
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = ALIGN(4);
- __bss_start = .;
- .bss : { *(.bss) }
- _end = .;
-}
diff --git a/board/incaip/Makefile b/board/incaip/Makefile
deleted file mode 100644
index d9b0e2d258..0000000000
--- a/board/incaip/Makefile
+++ /dev/null
@@ -1,41 +0,0 @@
-#
-# (C) Copyright 2003
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o
-SOBJS = lowlevel_init.o
-
-$(LIB): .depend $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS) $(SOBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/incaip/config.mk b/board/incaip/config.mk
deleted file mode 100644
index 0cecc011e3..0000000000
--- a/board/incaip/config.mk
+++ /dev/null
@@ -1,32 +0,0 @@
-#
-# (C) Copyright 2003
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# INCA-IP board with MIPS 4Kc CPU core
-#
-
-# ROM version
-TEXT_BASE = 0xB0000000
-
-# RAM version
-#TEXT_BASE = 0x80100000
diff --git a/board/incaip/flash.c b/board/incaip/flash.c
deleted file mode 100644
index 520514dea3..0000000000
--- a/board/incaip/flash.c
+++ /dev/null
@@ -1,671 +0,0 @@
-/*
- * (C) Copyright 2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/inca-ip.h>
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/* NOTE - CONFIG_FLASH_16BIT means the CPU interface is 16-bit, it
- * has nothing to do with the flash chip being 8-bit or 16-bit.
- */
-#ifdef CONFIG_FLASH_16BIT
-typedef unsigned short FLASH_PORT_WIDTH;
-typedef volatile unsigned short FLASH_PORT_WIDTHV;
-#define FLASH_ID_MASK 0xFFFF
-#else
-typedef unsigned long FLASH_PORT_WIDTH;
-typedef volatile unsigned long FLASH_PORT_WIDTHV;
-#define FLASH_ID_MASK 0xFFFFFFFF
-#endif
-
-#define FPW FLASH_PORT_WIDTH
-#define FPWV FLASH_PORT_WIDTHV
-
-#define ORMASK(size) ((-size) & OR_AM_MSK)
-
-#if 0
-#define FLASH_CYCLE1 0x0555
-#define FLASH_CYCLE2 0x02aa
-#else
-#define FLASH_CYCLE1 0x0554
-#define FLASH_CYCLE2 0x02ab
-#endif
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size(FPWV *addr, flash_info_t *info);
-static void flash_reset(flash_info_t *info);
-static int write_word_intel(flash_info_t *info, FPWV *dest, FPW data);
-static int write_word_amd(flash_info_t *info, FPWV *dest, FPW data);
-static void flash_get_offsets(ulong base, flash_info_t *info);
-static flash_info_t *flash_get_info(ulong base);
-
-/*-----------------------------------------------------------------------
- * flash_init()
- *
- * sets up flash_info and returns size of FLASH (bytes)
- */
-unsigned long flash_init (void)
-{
- unsigned long size = 0;
- int i;
-
- /* Init: no FLASHes known */
- for (i=0; i < CFG_MAX_FLASH_BANKS; ++i) {
- ulong flashbase = (i == 0) ? PHYS_FLASH_1 : PHYS_FLASH_2;
- ulong * buscon = (ulong *)
- ((i == 0) ? INCA_IP_EBU_EBU_BUSCON0 : INCA_IP_EBU_EBU_BUSCON2);
-
- /* Disable write protection */
- *buscon &= ~INCA_IP_EBU_EBU_BUSCON1_WRDIS;
-
-#if 1
- memset(&flash_info[i], 0, sizeof(flash_info_t));
-#endif
-
- flash_info[i].size =
- flash_get_size((FPW *)flashbase, &flash_info[i]);
-
- if (flash_info[i].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx\n",
- i, flash_info[i].size);
- }
-
- size += flash_info[i].size;
- }
-
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
- /* monitor protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+monitor_flash_len-1,
- flash_get_info(CFG_MONITOR_BASE));
-#endif
-
-#ifdef CFG_ENV_IS_IN_FLASH
- /* ENV protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR+CFG_ENV_SIZE-1,
- flash_get_info(CFG_ENV_ADDR));
-#endif
-
-
- return size;
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_reset(flash_info_t *info)
-{
- FPWV *base = (FPWV *)(info->start[0]);
-
- /* Put FLASH back in read mode */
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL)
- *base = (FPW)0x00FF00FF; /* Intel Read Mode */
- else if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD)
- *base = (FPW)0x00F000F0; /* AMD Read Mode */
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_get_offsets (ulong base, flash_info_t *info)
-{
- int i;
-
- /* set up sector start address table */
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL
- && (info->flash_id & FLASH_BTYPE)) {
- int bootsect_size; /* number of bytes/boot sector */
- int sect_size; /* number of bytes/regular sector */
-
- bootsect_size = 0x00002000 * (sizeof(FPW)/2);
- sect_size = 0x00010000 * (sizeof(FPW)/2);
-
- /* set sector offsets for bottom boot block type */
- for (i = 0; i < 8; ++i) {
- info->start[i] = base + (i * bootsect_size);
- }
- for (i = 8; i < info->sector_count; i++) {
- info->start[i] = base + ((i - 7) * sect_size);
- }
- }
- else if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD
- && (info->flash_id & FLASH_TYPEMASK) == FLASH_AM640U) {
-
- int sect_size; /* number of bytes/sector */
-
- sect_size = 0x00010000 * (sizeof(FPW)/2);
-
- /* set up sector start address table (uniform sector type) */
- for( i = 0; i < info->sector_count; i++ )
- info->start[i] = base + (i * sect_size);
- }
-}
-
-/*-----------------------------------------------------------------------
- */
-
-static flash_info_t *flash_get_info(ulong base)
-{
- int i;
- flash_info_t * info;
-
- for (i = 0; i < CFG_MAX_FLASH_BANKS; i ++) {
- info = & flash_info[i];
- if (info->start[0] <= base && base < info->start[0] + info->size)
- break;
- }
-
- return i == CFG_MAX_FLASH_BANKS ? 0 : info;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-void flash_print_info (flash_info_t *info)
-{
- int i;
- uchar *boottype;
- uchar *bootletter;
- char *fmt;
- uchar botbootletter[] = "B";
- uchar topbootletter[] = "T";
- uchar botboottype[] = "bottom boot sector";
- uchar topboottype[] = "top boot sector";
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD: printf ("AMD "); break;
- case FLASH_MAN_BM: printf ("BRIGHT MICRO "); break;
- case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
- case FLASH_MAN_SST: printf ("SST "); break;
- case FLASH_MAN_STM: printf ("STM "); break;
- case FLASH_MAN_INTEL: printf ("INTEL "); break;
- default: printf ("Unknown Vendor "); break;
- }
-
- /* check for top or bottom boot, if it applies */
- if (info->flash_id & FLASH_BTYPE) {
- boottype = botboottype;
- bootletter = botbootletter;
- }
- else {
- boottype = topboottype;
- bootletter = topbootletter;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM640U:
- fmt = "29LV641D (64 Mbit, uniform sectors)\n";
- break;
- case FLASH_28F800C3B:
- case FLASH_28F800C3T:
- fmt = "28F800C3%s (8 Mbit, %s)\n";
- break;
- case FLASH_INTEL800B:
- case FLASH_INTEL800T:
- fmt = "28F800B3%s (8 Mbit, %s)\n";
- break;
- case FLASH_28F160C3B:
- case FLASH_28F160C3T:
- fmt = "28F160C3%s (16 Mbit, %s)\n";
- break;
- case FLASH_INTEL160B:
- case FLASH_INTEL160T:
- fmt = "28F160B3%s (16 Mbit, %s)\n";
- break;
- case FLASH_28F320C3B:
- case FLASH_28F320C3T:
- fmt = "28F320C3%s (32 Mbit, %s)\n";
- break;
- case FLASH_INTEL320B:
- case FLASH_INTEL320T:
- fmt = "28F320B3%s (32 Mbit, %s)\n";
- break;
- case FLASH_28F640C3B:
- case FLASH_28F640C3T:
- fmt = "28F640C3%s (64 Mbit, %s)\n";
- break;
- case FLASH_INTEL640B:
- case FLASH_INTEL640T:
- fmt = "28F640B3%s (64 Mbit, %s)\n";
- break;
- default:
- fmt = "Unknown Chip Type\n";
- break;
- }
-
- printf (fmt, bootletter, boottype);
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20,
- info->sector_count);
-
- printf (" Sector Start Addresses:");
-
- for (i=0; i<info->sector_count; ++i) {
- if ((i % 5) == 0) {
- printf ("\n ");
- }
-
- printf (" %08lX%s", info->start[i],
- info->protect[i] ? " (RO)" : " ");
- }
-
- printf ("\n");
-}
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-
-ulong flash_get_size (FPWV *addr, flash_info_t *info)
-{
- /* Write auto select command: read Manufacturer ID */
-
- /* Write auto select command sequence and test FLASH answer */
- addr[FLASH_CYCLE1] = (FPW)0x00AA00AA; /* for AMD, Intel ignores this */
- addr[FLASH_CYCLE2] = (FPW)0x00550055; /* for AMD, Intel ignores this */
- addr[FLASH_CYCLE1] = (FPW)0x00900090; /* selects Intel or AMD */
-
- /* The manufacturer codes are only 1 byte, so just use 1 byte.
- * This works for any bus width and any FLASH device width.
- */
- switch (addr[1] & 0xff) {
-
- case (uchar)AMD_MANUFACT:
- info->flash_id = FLASH_MAN_AMD;
- break;
-
- case (uchar)INTEL_MANUFACT:
- info->flash_id = FLASH_MAN_INTEL;
- break;
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- break;
- }
-
- /* Check 16 bits or 32 bits of ID so work on 32 or 16 bit bus. */
- if (info->flash_id != FLASH_UNKNOWN) switch (addr[0]) {
-
- case (FPW)AMD_ID_LV640U: /* 29LV640 and 29LV641 have same ID */
- info->flash_id += FLASH_AM640U;
- info->sector_count = 128;
- info->size = 0x00800000 * (sizeof(FPW)/2);
- break; /* => 8 or 16 MB */
-
- case (FPW)INTEL_ID_28F800C3B:
- info->flash_id += FLASH_28F800C3B;
- info->sector_count = 23;
- info->size = 0x00100000 * (sizeof(FPW)/2);
- break; /* => 1 or 2 MB */
-
- case (FPW)INTEL_ID_28F800B3B:
- info->flash_id += FLASH_INTEL800B;
- info->sector_count = 23;
- info->size = 0x00100000 * (sizeof(FPW)/2);
- break; /* => 1 or 2 MB */
-
- case (FPW)INTEL_ID_28F160C3B:
- info->flash_id += FLASH_28F160C3B;
- info->sector_count = 39;
- info->size = 0x00200000 * (sizeof(FPW)/2);
- break; /* => 2 or 4 MB */
-
- case (FPW)INTEL_ID_28F160B3B:
- info->flash_id += FLASH_INTEL160B;
- info->sector_count = 39;
- info->size = 0x00200000 * (sizeof(FPW)/2);
- break; /* => 2 or 4 MB */
-
- case (FPW)INTEL_ID_28F320C3B:
- info->flash_id += FLASH_28F320C3B;
- info->sector_count = 71;
- info->size = 0x00400000 * (sizeof(FPW)/2);
- break; /* => 4 or 8 MB */
-
- case (FPW)INTEL_ID_28F320B3B:
- info->flash_id += FLASH_INTEL320B;
- info->sector_count = 71;
- info->size = 0x00400000 * (sizeof(FPW)/2);
- break; /* => 4 or 8 MB */
-
- case (FPW)INTEL_ID_28F640C3B:
- info->flash_id += FLASH_28F640C3B;
- info->sector_count = 135;
- info->size = 0x00800000 * (sizeof(FPW)/2);
- break; /* => 8 or 16 MB */
-
- case (FPW)INTEL_ID_28F640B3B:
- info->flash_id += FLASH_INTEL640B;
- info->sector_count = 135;
- info->size = 0x00800000 * (sizeof(FPW)/2);
- break; /* => 8 or 16 MB */
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- return (0); /* => no or unknown flash */
- }
-
- flash_get_offsets((ulong)addr, info);
-
- /* Put FLASH back in read mode */
- flash_reset(info);
-
- return (info->size);
-}
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- FPWV *addr;
- int flag, prot, sect;
- int intel = (info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL;
- ulong start, now, last;
- int rcode = 0;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_INTEL800B:
- case FLASH_INTEL160B:
- case FLASH_INTEL320B:
- case FLASH_INTEL640B:
- case FLASH_28F800C3B:
- case FLASH_28F160C3B:
- case FLASH_28F320C3B:
- case FLASH_28F640C3B:
- case FLASH_AM640U:
- break;
- case FLASH_UNKNOWN:
- default:
- printf ("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- last = get_timer(0);
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last && rcode == 0; sect++) {
-
- if (info->protect[sect] != 0) /* protected, skip it */
- continue;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr = (FPWV *)(info->start[sect]);
- if (intel) {
- *addr = (FPW)0x00500050; /* clear status register */
- *addr = (FPW)0x00200020; /* erase setup */
- *addr = (FPW)0x00D000D0; /* erase confirm */
- }
- else {
- /* must be AMD style if not Intel */
- FPWV *base; /* first address in bank */
-
- base = (FPWV *)(info->start[0]);
- base[FLASH_CYCLE1] = (FPW)0x00AA00AA; /* unlock */
- base[FLASH_CYCLE2] = (FPW)0x00550055; /* unlock */
- base[FLASH_CYCLE1] = (FPW)0x00800080; /* erase mode */
- base[FLASH_CYCLE1] = (FPW)0x00AA00AA; /* unlock */
- base[FLASH_CYCLE2] = (FPW)0x00550055; /* unlock */
- *addr = (FPW)0x00300030; /* erase sector */
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- start = get_timer(0);
-
- /* wait at least 50us for AMD, 80us for Intel.
- * Let's wait 1 ms.
- */
- udelay (1000);
-
- while ((*addr & (FPW)0x00800080) != (FPW)0x00800080) {
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
-
- if (intel) {
- /* suspend erase */
- *addr = (FPW)0x00B000B0;
- }
-
- flash_reset(info); /* reset to read mode */
- rcode = 1; /* failed */
- break;
- }
-
- /* show that we're waiting */
- if ((get_timer(last)) > CFG_HZ) {/* every second */
- putc ('.');
- last = get_timer(0);
- }
- }
-
- /* show that we're waiting */
- if ((get_timer(last)) > CFG_HZ) { /* every second */
- putc ('.');
- last = get_timer(0);
- }
-
- flash_reset(info); /* reset to read mode */
- }
-
- printf (" done\n");
- return rcode;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- FPW data = 0; /* 16 or 32 bit word, matches flash bus width on MPC8XX */
- int bytes; /* number of bytes to program in current word */
- int left; /* number of bytes left to program */
- int i, res;
-
- for (left = cnt, res = 0;
- left > 0 && res == 0;
- addr += sizeof(data), left -= sizeof(data) - bytes) {
-
- bytes = addr & (sizeof(data) - 1);
- addr &= ~(sizeof(data) - 1);
-
- /* combine source and destination data so can program
- * an entire word of 16 or 32 bits
- */
- for (i = 0; i < sizeof(data); i++) {
- data <<= 8;
- if (i < bytes || i - bytes >= left )
- data += *((uchar *)addr + i);
- else
- data += *src++;
- }
-
- /* write one word to the flash */
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD:
- res = write_word_amd(info, (FPWV *)addr, data);
- break;
- case FLASH_MAN_INTEL:
- res = write_word_intel(info, (FPWV *)addr, data);
- break;
- default:
- /* unknown flash type, error! */
- printf ("missing or unknown FLASH type\n");
- res = 1; /* not really a timeout, but gives error */
- break;
- }
- }
-
- return (res);
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash for AMD FLASH
- * A word is 16 or 32 bits, whichever the bus width of the flash bank
- * (not an individual chip) is.
- *
- * returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word_amd (flash_info_t *info, FPWV *dest, FPW data)
-{
- ulong start;
- int flag;
- int res = 0; /* result, assume success */
- FPWV *base; /* first address in flash bank */
-
- /* Check if Flash is (sufficiently) erased */
- if ((*dest & data) != data) {
- return (2);
- }
-
-
- base = (FPWV *)(info->start[0]);
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- base[FLASH_CYCLE1] = (FPW)0x00AA00AA; /* unlock */
- base[FLASH_CYCLE2] = (FPW)0x00550055; /* unlock */
- base[FLASH_CYCLE1] = (FPW)0x00A000A0; /* selects program mode */
-
- *dest = data; /* start programming the data */
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- start = get_timer (0);
-
- /* data polling for D7 */
- while (res == 0 && (*dest & (FPW)0x00800080) != (data & (FPW)0x00800080)) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- *dest = (FPW)0x00F000F0; /* reset bank */
- res = 1;
- }
- }
-
- return (res);
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash for Intel FLASH
- * A word is 16 or 32 bits, whichever the bus width of the flash bank
- * (not an individual chip) is.
- *
- * returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word_intel (flash_info_t *info, FPWV *dest, FPW data)
-{
- ulong start;
- int flag;
- int res = 0; /* result, assume success */
-
- /* Check if Flash is (sufficiently) erased */
- if ((*dest & data) != data) {
- return (2);
- }
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- *dest = (FPW)0x00500050; /* clear status register */
- *dest = (FPW)0x00FF00FF; /* make sure in read mode */
- *dest = (FPW)0x00400040; /* program setup */
-
- *dest = data; /* start programming the data */
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- start = get_timer (0);
-
- while (res == 0 && (*dest & (FPW)0x00800080) != (FPW)0x00800080) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- *dest = (FPW)0x00B000B0; /* Suspend program */
- res = 1;
- }
- }
-
- if (res == 0 && (*dest & (FPW)0x00100010))
- res = 1; /* write failed, time out error is close enough */
-
- *dest = (FPW)0x00500050; /* clear status register */
- *dest = (FPW)0x00FF00FF; /* make sure in read mode */
-
- return (res);
-}
diff --git a/board/incaip/incaip.c b/board/incaip/incaip.c
deleted file mode 100644
index b5d9e00492..0000000000
--- a/board/incaip/incaip.c
+++ /dev/null
@@ -1,111 +0,0 @@
-/*
- * (C) Copyright 2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <command.h>
-#include <asm/addrspace.h>
-#include <asm/inca-ip.h>
-
-
-extern uint incaip_get_cpuclk(void);
-
-static ulong max_sdram_size(void)
-{
- /* The only supported SDRAM data width is 16bit.
- */
-#define CFG_DW 2
-
- /* The only supported number of SDRAM banks is 4.
- */
-#define CFG_NB 4
-
- ulong cfgpb0 = *INCA_IP_SDRAM_MC_CFGPB0;
- int cols = cfgpb0 & 0xF;
- int rows = (cfgpb0 & 0xF0) >> 4;
- ulong size = (1 << (rows + cols)) * CFG_DW * CFG_NB;
-
- return size;
-}
-
-long int initdram(int board_type)
-{
- int rows, cols, best_val = *INCA_IP_SDRAM_MC_CFGPB0;
- ulong size, max_size = 0;
- ulong our_address;
-
- asm volatile ("move %0, $25" : "=r" (our_address) :);
-
- /* Can't probe for RAM size unless we are running from Flash.
- */
- if (PHYSADDR(our_address) < PHYSADDR(PHYS_FLASH_1))
- {
- return max_sdram_size();
- }
-
- for (cols = 0x8; cols <= 0xC; cols++)
- {
- for (rows = 0xB; rows <= 0xD; rows++)
- {
- *INCA_IP_SDRAM_MC_CFGPB0 = (0x14 << 8) |
- (rows << 4) | cols;
- size = get_ram_size((long *)CFG_SDRAM_BASE,
- max_sdram_size());
-
- if (size > max_size)
- {
- best_val = *INCA_IP_SDRAM_MC_CFGPB0;
- max_size = size;
- }
- }
- }
-
- *INCA_IP_SDRAM_MC_CFGPB0 = best_val;
- return max_size;
-}
-
-int checkboard (void)
-{
-
- unsigned long chipid = *INCA_IP_WDT_CHIPID;
- int part_num;
-
- puts ("Board: INCA-IP ");
- part_num = (chipid >> 12) & 0xffff;
- switch (part_num) {
- case 0xc0:
- printf ("Standard Version, ");
- break;
- case 0xc1:
- printf ("Basic Version, ");
- break;
- default:
- printf ("Unknown Part Number 0x%x ", part_num);
- break;
- }
-
- printf ("Chip V1.%ld, ", (chipid >> 28));
-
- printf("CPU Speed %d MHz\n", incaip_get_cpuclk()/1000000);
-
- return 0;
-}
diff --git a/board/incaip/lowlevel_init.S b/board/incaip/lowlevel_init.S
deleted file mode 100644
index 14d738aa1a..0000000000
--- a/board/incaip/lowlevel_init.S
+++ /dev/null
@@ -1,298 +0,0 @@
-/*
- * Memory sub-system initialization code for INCA-IP development board.
- *
- * Copyright (c) 2003 Wolfgang Denk <wd@denx.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <config.h>
-#include <version.h>
-#include <asm/regdef.h>
-
-
-#define EBU_MODUL_BASE 0xB8000200
-#define EBU_CLC(value) 0x0000(value)
-#define EBU_CON(value) 0x0010(value)
-#define EBU_ADDSEL0(value) 0x0020(value)
-#define EBU_ADDSEL1(value) 0x0024(value)
-#define EBU_ADDSEL2(value) 0x0028(value)
-#define EBU_BUSCON0(value) 0x0060(value)
-#define EBU_BUSCON1(value) 0x0064(value)
-#define EBU_BUSCON2(value) 0x0068(value)
-
-#define MC_MODUL_BASE 0xBF800000
-#define MC_ERRCAUSE(value) 0x0100(value)
-#define MC_ERRADDR(value) 0x0108(value)
-#define MC_IOGP(value) 0x0800(value)
-#define MC_SELFRFSH(value) 0x0A00(value)
-#define MC_CTRLENA(value) 0x1000(value)
-#define MC_MRSCODE(value) 0x1008(value)
-#define MC_CFGDW(value) 0x1010(value)
-#define MC_CFGPB0(value) 0x1018(value)
-#define MC_LATENCY(value) 0x1038(value)
-#define MC_TREFRESH(value) 0x1040(value)
-
-#define CGU_MODUL_BASE 0xBF107000
-#define CGU_PLL1CR(value) 0x0008(value)
-#define CGU_DIVCR(value) 0x0010(value)
-#define CGU_MUXCR(value) 0x0014(value)
-#define CGU_PLL1SR(value) 0x000C(value)
-
- .set noreorder
-
-
-/*
- * void ebu_init(long)
- *
- * a0 has the clock value we are going to run at
- */
- .globl ebu_init
- .ent ebu_init
-ebu_init:
-__ebu_init:
-
- li t1, EBU_MODUL_BASE
- li t2, 0xA0000041
- sw t2, EBU_ADDSEL0(t1)
- li t2, 0xA0800041
- sw t2, EBU_ADDSEL2(t1)
- li t2, 0xBE0000F1
- sw t2, EBU_ADDSEL1(t1)
-
- li t3, 100000000
- beq a0, t3, 1f
- nop
- li t3, 133000000
- beq a0, t3, 2f
- nop
- li t3, 150000000
- beq a0, t3, 2f
- nop
- b 3f
- nop
-
- /* 100 MHz */
-1:
- li t2, 0x8841417D
- sw t2, EBU_BUSCON0(t1)
- sw t2, EBU_BUSCON2(t1)
- li t2, 0x684142BD
- b 3f
- sw t2, EBU_BUSCON1(t1) /* delay slot */
-
- /* 133 or 150 MHz */
-2:
- li t2, 0x8841417E
- sw t2, EBU_BUSCON0(t1)
- sw t2, EBU_BUSCON2(t1)
- li t2, 0x684143FD
- sw t2, EBU_BUSCON1(t1)
-3:
- j ra
- nop
-
- .end ebu_init
-
-
-/*
- * void cgu_init(long)
- *
- * a0 has the clock value
- */
- .globl cgu_init
- .ent cgu_init
-cgu_init:
-__cgu_init:
-
- li t1, CGU_MODUL_BASE
-
- li t3, 100000000
- beq a0, t3, 1f
- nop
- li t3, 133000000
- beq a0, t3, 2f
- nop
- li t3, 150000000
- beq a0, t3, 3f
- nop
- b 5f
- nop
-
- /* 100 MHz clock */
-1:
- li t2, 0x80000014
- sw t2, CGU_DIVCR(t1)
- li t2, 0x80000000
- sw t2, CGU_MUXCR(t1)
- li t2, 0x800B0001
- b 5f
- sw t2, CGU_PLL1CR(t1) /* delay slot */
-
- /* 133 MHz clock */
-2:
- li t2, 0x80000054
- sw t2, CGU_DIVCR(t1)
- li t2, 0x80000000
- sw t2, CGU_MUXCR(t1)
- li t2, 0x800B0001
- b 5f
- sw t2, CGU_PLL1CR(t1) /* delay slot */
-
- /* 150 MHz clock */
-3:
- li t2, 0x80000017
- sw t2, CGU_DIVCR(t1)
- li t2, 0xC00B0001
- sw t2, CGU_PLL1CR(t1)
- li t3, 0x80000000
-4:
- lw t2, CGU_PLL1SR(t1)
- and t2, t2, t3
- beq t2, zero, 4b
- nop
- li t2, 0x80000001
- sw t2, CGU_MUXCR(t1)
-5:
- j ra
- nop
-
- .end cgu_init
-
-
-/*
- * void sdram_init(long)
- *
- * a0 has the clock value
- */
- .globl sdram_init
- .ent sdram_init
-sdram_init:
-__sdram_init:
-
- li t1, MC_MODUL_BASE
-
-#if 0
- /* Disable memory controller before changing any of its registers */
- sw zero, MC_CTRLENA(t1)
-#endif
-
- li t2, 100000000
- beq a0, t2, 1f
- nop
- li t2, 133000000
- beq a0, t2, 2f
- nop
- li t2, 150000000
- beq a0, t2, 3f
- nop
- b 5f
- nop
-
- /* 100 MHz clock */
-1:
- /* Set clock ratio (clkrat=1:1, rddel=3) */
- li t2, 0x00000003
- sw t2, MC_IOGP(t1)
-
- /* Set sdram refresh rate (4K/64ms @ 100MHz) */
- li t2, 0x0000061A
- b 4f
- sw t2, MC_TREFRESH(t1)
-
- /* 133 MHz clock */
-2:
- /* Set clock ratio (clkrat=1:1, rddel=3) */
- li t2, 0x00000003
- sw t2, MC_IOGP(t1)
-
- /* Set sdram refresh rate (4K/64ms @ 133MHz) */
- li t2, 0x00000822
- b 4f
- sw t2, MC_TREFRESH(t1)
-
- /* 150 MHz clock */
-3:
- /* Set clock ratio (clkrat=3:2, rddel=4) */
- li t2, 0x00000014
- sw t2, MC_IOGP(t1)
-
- /* Set sdram refresh rate (4K/64ms @ 150MHz) */
- li t2, 0x00000927
- sw t2, MC_TREFRESH(t1)
-
-4:
- /* Clear Error log registers */
- sw zero, MC_ERRCAUSE(t1)
- sw zero, MC_ERRADDR(t1)
-
- /* Clear Power-down registers */
- sw zero, MC_SELFRFSH(t1)
-
- /* Set CAS Latency */
- li t2, 0x00000020 /* CL = 2 */
- sw t2, MC_MRSCODE(t1)
-
- /* Set word width to 16 bit */
- li t2, 0x2
- sw t2, MC_CFGDW(t1)
-
- /* Set CS0 to SDRAM parameters */
- li t2, 0x000014C9
- sw t2, MC_CFGPB0(t1)
-
- /* Set SDRAM latency parameters */
- li t2, 0x00026325 /* BC PC100 */
- sw t2, MC_LATENCY(t1)
-
-5:
- /* Finally enable the controller */
- li t2, 0x00000001
- sw t2, MC_CTRLENA(t1)
-
- j ra
- nop
-
- .end sdram_init
-
-
- .globl lowlevel_init
- .ent lowlevel_init
-lowlevel_init:
-
- /* EBU, CGU and SDRAM Initialization.
- */
- li a0, CPU_CLOCK_RATE
- move t0, ra
-
- /* We rely on the fact that neither ebu_init() nor cgu_init() nor sdram_init()
- * modify t0 and a0.
- */
- bal __cgu_init
- nop
- bal __ebu_init
- nop
- bal __sdram_init
- nop
- move ra, t0
-
- j ra
- nop
-
- .end lowlevel_init
diff --git a/board/incaip/u-boot.lds b/board/incaip/u-boot.lds
deleted file mode 100644
index 10c9917986..0000000000
--- a/board/incaip/u-boot.lds
+++ /dev/null
@@ -1,69 +0,0 @@
-/*
- * (C) Copyright 2003
- * Wolfgang Denk Engineering, <wd@denx.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
-OUTPUT_FORMAT("elf32-bigmips", "elf32-bigmips", "elf32-bigmips")
-*/
-OUTPUT_FORMAT("elf32-tradbigmips", "elf32-tradbigmips", "elf32-tradbigmips")
-OUTPUT_ARCH(mips)
-ENTRY(_start)
-SECTIONS
-{
- . = 0x00000000;
-
- . = ALIGN(4);
- .text :
- {
- *(.text)
- }
-
- . = ALIGN(4);
- .rodata : { *(.rodata) }
-
- . = ALIGN(4);
- .data : { *(.data) }
-
- . = ALIGN(4);
- .sdata : { *(.sdata) }
-
- _gp = ALIGN(16);
-
- __got_start = .;
- .got : { *(.got) }
- __got_end = .;
-
- .sdata : { *(.sdata) }
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- uboot_end_data = .;
- num_got_entries = (__got_end - __got_start) >> 2;
-
- . = ALIGN(4);
- .sbss : { *(.sbss) }
- .bss : { *(.bss) }
- uboot_end = .;
-}
diff --git a/board/inka4x0/Makefile b/board/inka4x0/Makefile
deleted file mode 100644
index bf832927ce..0000000000
--- a/board/inka4x0/Makefile
+++ /dev/null
@@ -1,46 +0,0 @@
-#
-# (C) Copyright 2003-2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := $(BOARD).o flash.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/inka4x0/config.mk b/board/inka4x0/config.mk
deleted file mode 100644
index cb19a7daef..0000000000
--- a/board/inka4x0/config.mk
+++ /dev/null
@@ -1,41 +0,0 @@
-#
-# (C) Copyright 2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# INKA 4X0 board:
-#
-# Valid values for TEXT_BASE are:
-#
-# 0xFFE00000 boot low
-#
-# 0x00100000 boot from RAM (for testing only)
-#
-
-ifndef TEXT_BASE
-## Standard: boot low
-TEXT_BASE = 0xFFE00000
-## For testing: boot from RAM
-#TEXT_BASE = 0x00100000
-endif
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
diff --git a/board/inka4x0/flash.c b/board/inka4x0/flash.c
deleted file mode 100644
index b13865530a..0000000000
--- a/board/inka4x0/flash.c
+++ /dev/null
@@ -1,432 +0,0 @@
-/*
- * (C) Copyright 2003-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2004
- * Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/*
- * CPU to flash interface is 8-bit, so make declaration accordingly
- */
-typedef unsigned char FLASH_PORT_WIDTH;
-typedef volatile unsigned char FLASH_PORT_WIDTHV;
-
-#define FPW FLASH_PORT_WIDTH
-#define FPWV FLASH_PORT_WIDTHV
-
-#define FLASH_CYCLE1 0x0555
-#define FLASH_CYCLE2 0x02aa
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size(FPWV *addr, flash_info_t *info);
-static void flash_reset(flash_info_t *info);
-static int write_word_amd(flash_info_t *info, FPWV *dest, FPW data);
-static flash_info_t *flash_get_info(ulong base);
-
-/*-----------------------------------------------------------------------
- * flash_init()
- *
- * sets up flash_info and returns size of FLASH (bytes)
- */
-unsigned long flash_init (void)
-{
- unsigned long size = 0;
- extern void flash_preinit(void);
- ulong flashbase = CFG_FLASH_BASE;
-
- flash_preinit();
-
- /* Init: no FLASHes known */
- memset(&flash_info[0], 0, sizeof(flash_info_t));
-
- flash_info[0].size =
- flash_get_size((FPW *)flashbase, &flash_info[0]);
-
- size = flash_info[0].size;
-
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
- /* monitor protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+monitor_flash_len-1,
- flash_get_info(CFG_MONITOR_BASE));
-#endif
-
-#ifdef CFG_ENV_IS_IN_FLASH
- /* ENV protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR+CFG_ENV_SIZE-1,
- flash_get_info(CFG_ENV_ADDR));
-#endif
-
- return size ? size : 1;
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_reset(flash_info_t *info)
-{
- FPWV *base = (FPWV *)(info->start[0]);
-
- /* Put FLASH back in read mode */
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL)
- *base = (FPW)0x00FF00FF; /* Intel Read Mode */
- else if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD)
- *base = (FPW)0x00F000F0; /* AMD Read Mode */
-}
-
-/*-----------------------------------------------------------------------
- */
-
-static flash_info_t *flash_get_info(ulong base)
-{
- int i;
- flash_info_t * info;
-
- for (i = 0; i < CFG_MAX_FLASH_BANKS; i ++) {
- info = & flash_info[i];
- if (info->size && info->start[0] <= base &&
- base <= info->start[0] + info->size - 1)
- break;
- }
-
- return i == CFG_MAX_FLASH_BANKS ? 0 : info;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-void flash_print_info (flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD: printf ("AMD "); break;
- case FLASH_MAN_BM: printf ("BRIGHT MICRO "); break;
- case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
- case FLASH_MAN_SST: printf ("SST "); break;
- case FLASH_MAN_STM: printf ("STM "); break;
- case FLASH_MAN_INTEL: printf ("INTEL "); break;
- default: printf ("Unknown Vendor "); break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM116DB:
- printf ("AM29LV116DB (16Mbit, bottom boot sect)\n");
- break;
- case FLASH_AMLV128U:
- printf ("AM29LV128ML (128Mbit, uniform sector size)\n");
- break;
- case FLASH_AM160B:
- printf ("AM29LV160B (16 Mbit, bottom boot sect)\n");
- break;
- default:
- printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20,
- info->sector_count);
-
- printf (" Sector Start Addresses:");
-
- for (i=0; i<info->sector_count; ++i) {
- if ((i % 5) == 0) {
- printf ("\n ");
- }
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " ");
- }
- printf ("\n");
- return;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-
-ulong flash_get_size (FPWV *addr, flash_info_t *info)
-{
- int i;
- ulong base = (ulong)addr;
-
- /* Write auto select command: read Manufacturer ID */
- /* Write auto select command sequence and test FLASH answer */
- addr[FLASH_CYCLE1] = (FPW)0x00AA00AA; /* for AMD, Intel ignores this */
- addr[FLASH_CYCLE2] = (FPW)0x00550055; /* for AMD, Intel ignores this */
- addr[FLASH_CYCLE1] = (FPW)0x00900090; /* selects Intel or AMD */
-
- /* The manufacturer codes are only 1 byte, so just use 1 byte.
- * This works for any bus width and any FLASH device width.
- */
- udelay(100);
- switch (addr[0] & 0xff) {
-
- case (uchar)AMD_MANUFACT:
- debug ("Manufacturer: AMD (Spansion)\n");
- info->flash_id = FLASH_MAN_AMD;
- break;
-
- case (uchar)INTEL_MANUFACT:
- debug ("Manufacturer: Intel (not supported yet)\n");
- info->flash_id = FLASH_MAN_INTEL;
- break;
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- break;
- }
-
- /* Check 16 bits or 32 bits of ID so work on 32 or 16 bit bus. */
- if (info->flash_id != FLASH_UNKNOWN) switch ((FPW)addr[1]) {
-
- case (uchar)AMD_ID_LV116DB:
- debug ("Chip: AM29LV116DB\n");
- info->flash_id += FLASH_AM116DB;
- info->sector_count = 35;
- info->size = 0x00200000;
- /*
- * The first 4 sectors are 16 kB, 8 kB, 8 kB and 32 kB, all
- * the other ones are 64 kB
- */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00004000;
- info->start[2] = base + 0x00006000;
- info->start[3] = base + 0x00008000;
- for( i = 4; i < info->sector_count; i++ )
- info->start[i] =
- base + (i * (64 << 10)) - 0x00030000;
- break; /* => 2 MB */
-
- case (FPW)AMD_ID_LV160B:
- debug ("Chip: AM29LV160MB\n");
- info->flash_id += FLASH_AM160B;
- info->sector_count = 35;
- info->size = 0x00400000;
- /*
- * The first 4 sectors are 16 kB, 8 kB, 8 kB and 32 kB, all
- * the other ones are 64 kB
- */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00008000;
- info->start[2] = base + 0x0000C000;
- info->start[3] = base + 0x00010000;
- for( i = 4; i < info->sector_count; i++ )
- info->start[i] =
- base + (i * 2 * (64 << 10)) - 0x00060000;
- break; /* => 4 MB */
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- }
-
- /* Put FLASH back in read mode */
- flash_reset(info);
-
- return (info->size);
-}
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- FPWV *addr = (FPWV*)(info->start[0]);
- int flag, prot, sect, l_sect;
- ulong start, now, last;
-
- debug ("flash_erase: first: %d last: %d\n", s_first, s_last);
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- if ((info->flash_id == FLASH_UNKNOWN) ||
- (info->flash_id > FLASH_AMD_COMP)) {
- printf ("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- l_sect = -1;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[0x0555] = (FPW)0x00AA00AA;
- addr[0x02AA] = (FPW)0x00550055;
- addr[0x0555] = (FPW)0x00800080;
- addr[0x0555] = (FPW)0x00AA00AA;
- addr[0x02AA] = (FPW)0x00550055;
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr = (FPWV*)(info->start[sect]);
- addr[0] = (FPW)0x00300030;
- l_sect = sect;
- }
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- /*
- * We wait for the last triggered sector
- */
- if (l_sect < 0)
- goto DONE;
-
- start = get_timer (0);
- last = start;
- addr = (FPWV*)(info->start[l_sect]);
- while ((addr[0] & (FPW)0x00800080) != (FPW)0x00800080) {
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- return 1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- }
-
-DONE:
- /* reset to read mode */
- addr = (FPWV*)info->start[0];
- addr[0] = (FPW)0x00F000F0; /* reset bank */
-
- printf (" done\n");
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- int i, rc = 0;
-
- for (i = 0; i < cnt; i++)
- if ((rc = write_word_amd(info, (FPW *)(addr+i), src[i])) != 0) {
- return (rc);
- }
-
- return rc;
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash for AMD FLASH
- * A word is 16 or 32 bits, whichever the bus width of the flash bank
- * (not an individual chip) is.
- *
- * returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word_amd (flash_info_t *info, FPWV *dest, FPW data)
-{
- ulong start;
- int flag;
- FPWV *base; /* first address in flash bank */
-
- /* Check if Flash is (sufficiently) erased */
- if ((*dest & data) != data) {
- return (2);
- }
-
- base = (FPWV *)(info->start[0]);
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- base[FLASH_CYCLE1] = (FPW)0x00AA00AA; /* unlock */
- base[FLASH_CYCLE2] = (FPW)0x00550055; /* unlock */
- base[FLASH_CYCLE1] = (FPW)0x00A000A0; /* selects program mode */
-
- *dest = data; /* start programming the data */
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- start = get_timer (0);
-
- /* data polling for D7 */
- while ((*dest & (FPW)0x00800080) != (data & (FPW)0x00800080)) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- *dest = (FPW)0x00F000F0; /* reset bank */
- return (1);
- }
- }
- return (0);
-}
diff --git a/board/inka4x0/inka4x0.c b/board/inka4x0/inka4x0.c
deleted file mode 100644
index 29878f9b44..0000000000
--- a/board/inka4x0/inka4x0.c
+++ /dev/null
@@ -1,269 +0,0 @@
-/*
- * (C) Copyright 2003-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2004
- * Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com.
- *
- * (C) Copyright 2004
- * Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc5xxx.h>
-#include <pci.h>
-
-#if defined(CONFIG_MPC5200_DDR)
-#include "mt46v16m16-75.h"
-#else
-#include "mt48lc16m16a2-75.h"
-#endif
-
-#ifndef CFG_RAMBOOT
-static void sdram_start (int hi_addr)
-{
- long hi_addr_bit = hi_addr ? 0x01000000 : 0;
-
- /* unlock mode register */
- *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000000 | hi_addr_bit;
- __asm__ volatile ("sync");
-
- /* precharge all banks */
- *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000002 | hi_addr_bit;
- __asm__ volatile ("sync");
-
-#if SDRAM_DDR
- /* set mode register: extended mode */
- *(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_EMODE;
- __asm__ volatile ("sync");
-
- /* set mode register: reset DLL */
- *(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_MODE | 0x04000000;
- __asm__ volatile ("sync");
-#endif
-
- /* precharge all banks */
- *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000002 | hi_addr_bit;
- __asm__ volatile ("sync");
-
- /* auto refresh */
- *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000004 | hi_addr_bit;
- __asm__ volatile ("sync");
-
- /* set mode register */
- *(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_MODE;
- __asm__ volatile ("sync");
-
- /* normal operation */
- *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | hi_addr_bit;
- __asm__ volatile ("sync");
-}
-#endif
-
-/*
- * ATTENTION: Although partially referenced initdram does NOT make real use
- * use of CFG_SDRAM_BASE. The code does not work if CFG_SDRAM_BASE
- * is something else than 0x00000000.
- */
-
-long int initdram (int board_type)
-{
- ulong dramsize = 0;
-#ifndef CFG_RAMBOOT
- ulong test1, test2;
-
- /* setup SDRAM chip selects */
- *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x0000001c; /* 512MB at 0x0 */
- *(vu_long *)MPC5XXX_SDRAM_CS1CFG = 0x40000000; /* disabled */
- __asm__ volatile ("sync");
-
- /* setup config registers */
- *(vu_long *)MPC5XXX_SDRAM_CONFIG1 = SDRAM_CONFIG1;
- *(vu_long *)MPC5XXX_SDRAM_CONFIG2 = SDRAM_CONFIG2;
- __asm__ volatile ("sync");
-
-#if SDRAM_DDR
- /* set tap delay */
- *(vu_long *)MPC5XXX_CDM_PORCFG = SDRAM_TAPDELAY;
- __asm__ volatile ("sync");
-#endif
-
- /* find RAM size using SDRAM CS0 only */
- sdram_start(0);
- test1 = get_ram_size((ulong *)CFG_SDRAM_BASE, 0x20000000);
- sdram_start(1);
- test2 = get_ram_size((ulong *)CFG_SDRAM_BASE, 0x20000000);
- if (test1 > test2) {
- sdram_start(0);
- dramsize = test1;
- } else {
- dramsize = test2;
- }
-
- /* memory smaller than 1MB is impossible */
- if (dramsize < (1 << 20)) {
- dramsize = 0;
- }
-
- /* set SDRAM CS0 size according to the amount of RAM found */
- if (dramsize > 0) {
- *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x13 +
- __builtin_ffs(dramsize >> 20) - 1;
- } else {
- *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0; /* disabled */
- }
-
- *(vu_long *)MPC5XXX_SDRAM_CS1CFG = dramsize; /* disabled */
-#else /* CFG_RAMBOOT */
-
- /* retrieve size of memory connected to SDRAM CS0 */
- dramsize = *(vu_long *)MPC5XXX_SDRAM_CS0CFG & 0xFF;
- if (dramsize >= 0x13) {
- dramsize = (1 << (dramsize - 0x13)) << 20;
- } else {
- dramsize = 0;
- }
-
- /* retrieve size of memory connected to SDRAM CS1 */
- dramsize2 = *(vu_long *)MPC5XXX_SDRAM_CS1CFG & 0xFF;
- if (dramsize2 >= 0x13) {
- dramsize2 = (1 << (dramsize2 - 0x13)) << 20;
- } else {
- dramsize2 = 0;
- }
-
-#endif /* CFG_RAMBOOT */
-
-/* return dramsize + dramsize2; */
- return dramsize;
-}
-
-int checkboard (void)
-{
- puts ("Board: INKA 4X0\n");
- return 0;
-}
-
-void flash_preinit(void)
-{
- /*
- * Now, when we are in RAM, enable flash write
- * access for detection process.
- * Note that CS_BOOT cannot be cleared when
- * executing in flash.
- */
- *(vu_long *)MPC5XXX_BOOTCS_CFG &= ~0x1; /* clear RO */
-}
-
-#define GPIO_WKUP_7 0x80000000UL
-#define GPIO_PSC3_9 0x04000000UL
-
-int misc_init_f (void)
-{
- uchar tmp[10];
- int i, br;
-
- i = getenv_r("brightness", tmp, sizeof(tmp));
- br = (i > 0)
- ? (int) simple_strtoul (tmp, NULL, 10)
- : CFG_BRIGHTNESS;
- if (br > 255)
- br = 255;
-
- /* Initialize GPIO output pins.
- */
- /* Configure GPT as GPIO output (and set them as they control low-active LEDs */
- *(vu_long *)MPC5XXX_GPT0_ENABLE =
- *(vu_long *)MPC5XXX_GPT1_ENABLE =
- *(vu_long *)MPC5XXX_GPT2_ENABLE =
- *(vu_long *)MPC5XXX_GPT3_ENABLE =
- *(vu_long *)MPC5XXX_GPT4_ENABLE =
- *(vu_long *)MPC5XXX_GPT5_ENABLE = 0x34;
-
- /* Configure GPT7 as PWM timer, 1kHz, no ints. */
- *(vu_long *)MPC5XXX_GPT7_ENABLE = 0;/* Disable */
- *(vu_long *)MPC5XXX_GPT7_COUNTER = 0x020000fe;
- *(vu_long *)MPC5XXX_GPT7_PWMCFG = (br << 16);
- *(vu_long *)MPC5XXX_GPT7_ENABLE = 0x3;/* Enable PWM mode and start */
-
- /* Configure PSC3_6,7 as GPIO output */
- *(vu_long *)MPC5XXX_GPIO_ENABLE |= 0x00003000;
- *(vu_long *)MPC5XXX_GPIO_DIR |= 0x00003000;
-
- /* Configure PSC3_8 as GPIO output, no interrupt */
- *(vu_long *)MPC5XXX_GPIO_SI_ENABLE |= 0x04000000;
- *(vu_long *)MPC5XXX_GPIO_SI_DIR |= 0x04000000;
- *(vu_long *)MPC5XXX_GPIO_SI_IEN &= ~0x04000000;
-
- /* Configure PSC3_9 and GPIO_WKUP6,7 as GPIO output */
- *(vu_long *)MPC5XXX_WU_GPIO_ENABLE |= 0xc4000000;
- *(vu_long *)MPC5XXX_WU_GPIO_DIR |= 0xc4000000;
-
- /* Set LR mirror bit because it is low-active */
- *(vu_long *)MPC5XXX_WU_GPIO_DATA |= GPIO_WKUP_7;
- /*
- * Reset Coral-P graphics controller
- */
- *(vu_long *) MPC5XXX_WU_GPIO_ENABLE |= GPIO_PSC3_9;
- *(vu_long *) MPC5XXX_WU_GPIO_DIR |= GPIO_PSC3_9;
- *(vu_long *) MPC5XXX_WU_GPIO_DATA |= GPIO_PSC3_9;
- return 0;
-}
-
-#ifdef CONFIG_PCI
-static struct pci_controller hose;
-
-extern void pci_mpc5xxx_init(struct pci_controller *);
-
-void pci_init_board(void)
-{
- pci_mpc5xxx_init(&hose);
-}
-#endif
-
-#if defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET)
-
-#define GPIO_PSC1_4 0x01000000UL
-
-void init_ide_reset (void)
-{
- debug ("init_ide_reset\n");
-
- /* Configure PSC1_4 as GPIO output for ATA reset */
- *(vu_long *) MPC5XXX_WU_GPIO_ENABLE |= GPIO_PSC1_4;
- *(vu_long *) MPC5XXX_WU_GPIO_DIR |= GPIO_PSC1_4;
- /* Deassert reset */
- *(vu_long *) MPC5XXX_WU_GPIO_DATA |= GPIO_PSC1_4;
-}
-
-void ide_set_reset (int idereset)
-{
- debug ("ide_reset(%d)\n", idereset);
-
- if (idereset) {
- *(vu_long *) MPC5XXX_WU_GPIO_DATA &= ~GPIO_PSC1_4;
- /* Make a delay. MPC5200 spec says 25 usec min */
- udelay(500000);
- } else {
- *(vu_long *) MPC5XXX_WU_GPIO_DATA |= GPIO_PSC1_4;
- }
-}
-#endif /* defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET) */
diff --git a/board/inka4x0/mt46v16m16-75.h b/board/inka4x0/mt46v16m16-75.h
deleted file mode 100644
index f650faaa10..0000000000
--- a/board/inka4x0/mt46v16m16-75.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/*
- * (C) Copyright 2004
- * Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#define SDRAM_DDR 1 /* is DDR */
-
-#if defined(CONFIG_MPC5200)
-/* Settings for XLB = 132 MHz */
-#define SDRAM_MODE 0x018D0000
-#define SDRAM_EMODE 0x40090000
-#define SDRAM_CONTROL 0x714f0f00
-#define SDRAM_CONFIG1 0x73722930
-#define SDRAM_CONFIG2 0x47770000
-#define SDRAM_TAPDELAY 0x10000000
-
-#else
-#error CONFIG_MPC5200 not defined
-#endif
diff --git a/board/inka4x0/mt48lc16m16a2-75.h b/board/inka4x0/mt48lc16m16a2-75.h
deleted file mode 100644
index 13a97ac462..0000000000
--- a/board/inka4x0/mt48lc16m16a2-75.h
+++ /dev/null
@@ -1,47 +0,0 @@
-/*
- * (C) Copyright 2004
- * Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#define SDRAM_DDR 1 /* is SDR */
-
-#if defined(CONFIG_MPC5200)
-/* Settings for XLB = 132 MHz */
-#define SDRAM_MODE 0x00CD0000
-/* #define SDRAM_MODE 0x008D0000 */ /* CAS latency 2 */
-#define SDRAM_CONTROL 0x504F0000
-#define SDRAM_CONFIG1 0xD2322800
-/* #define SDRAM_CONFIG1 0xD2222800 */ /* CAS latency 2 */
-/*#define SDRAM_CONFIG1 0xD7322800 */ /* SDRAM controller bug workaround */
-#define SDRAM_CONFIG2 0x8AD70000
-/*#define SDRAM_CONFIG2 0xDDD70000 */ /* SDRAM controller bug workaround */
-
-#elif defined(CONFIG_MGT5100)
-/* Settings for XLB = 66 MHz */
-#define SDRAM_MODE 0x008D0000
-#define SDRAM_CONTROL 0x504F0000
-#define SDRAM_CONFIG1 0xC2222600
-#define SDRAM_CONFIG2 0x88B70004
-#define SDRAM_ADDRSEL 0x02000000
-
-#else
-#error Neither CONFIG_MPC5200 or CONFIG_MGT5100 defined
-#endif
diff --git a/board/inka4x0/u-boot.lds b/board/inka4x0/u-boot.lds
deleted file mode 100644
index 123a14c5aa..0000000000
--- a/board/inka4x0/u-boot.lds
+++ /dev/null
@@ -1,136 +0,0 @@
-/*
- * (C) Copyright 2003-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc5xxx/start.o (.text)
- cpu/mpc5xxx/traps.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/cache.o (.text)
- lib_ppc/time.o (.text)
-
- . = DEFINED(env_offset) ? env_offset : .;
- common/environment.o (.ppcenv)
-
- *(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/innokom/Makefile b/board/innokom/Makefile
deleted file mode 100644
index 73f6a74427..0000000000
--- a/board/innokom/Makefile
+++ /dev/null
@@ -1,47 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := innokom.o flash.o
-SOBJS := lowlevel_init.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS) $(SOBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/innokom/config.mk b/board/innokom/config.mk
deleted file mode 100644
index 23543920c3..0000000000
--- a/board/innokom/config.mk
+++ /dev/null
@@ -1,15 +0,0 @@
-#
-# Linux-Kernel is expected to be at c000'8000, entry c000'8000
-#
-# we load ourself to c170'0000, the upper 1 MB of second bank
-#
-# download areas is c800'0000
-#
-
-# This is the address where U-Boot lives in flash:
-#TEXT_BASE = 0
-
-# FIXME: armboot does only work correctly when being compiled
-# for the addresses _after_ relocation to RAM!! Otherwhise the
-# .bss segment is assumed in flash...
-TEXT_BASE = 0xa1fe0000
diff --git a/board/innokom/flash.c b/board/innokom/flash.c
deleted file mode 100644
index 298acc86a3..0000000000
--- a/board/innokom/flash.c
+++ /dev/null
@@ -1,419 +0,0 @@
-/*
- * (C) Copyright 2002
- * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
- *
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * (C) Copyright 2002
- * Robert Schwebel, Pengutronix, <r.schwebel@pengutronix.de>
- *
- * (C) Copyright 2002
- * Auerswald GmbH & Co KG, Germany
- * Kai-Uwe Bloem <kai-uwe.bloem@auerswald.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/arch/pxa-regs.h>
-
-/* Debugging macros ------------------------------------------------------ */
-
-#undef FLASH_DEBUG
-
-/* Some debug macros */
-#if (FLASH_DEBUG > 2 )
-#define PRINTK3(args...) printf(args)
-#else
-#define PRINTK3(args...)
-#endif
-
-#if FLASH_DEBUG > 1
-#define PRINTK2(args...) printf(args)
-#else
-#define PRINTK2(args...)
-#endif
-
-#ifdef FLASH_DEBUG
-#define PRINTK(args...) printf(args)
-#else
-#define PRINTK(args...)
-#endif
-
-/* ------------------------------------------------------------------------ */
-
-/* Development system: we have only 16 MB Flash */
-#ifdef CONFIG_MTD_INNOKOM_16MB
-#define FLASH_BANK_SIZE 0x01000000 /* 16 MB (during development) */
-#define MAIN_SECT_SIZE 0x00020000 /* 128k per sector */
-#endif
-
-/* Production system: we have 64 MB Flash */
-#ifdef CONFIG_MTD_INNOKOM_64MB
-#define FLASH_BANK_SIZE 0x04000000 /* 64 MB */
-#define MAIN_SECT_SIZE 0x00020000 /* 128k per sector */
-#endif
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
-
-/**
- * flash_init: - initialize data structures for flash chips
- *
- * @return: size of the flash
- */
-
-ulong flash_init(void)
-{
- int i, j;
- ulong size = 0;
-
- for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
- ulong flashbase = 0;
- flash_info[i].flash_id =
- (INTEL_MANUFACT & FLASH_VENDMASK) |
- (INTEL_ID_28F128J3 & FLASH_TYPEMASK);
- flash_info[i].size = FLASH_BANK_SIZE;
- flash_info[i].sector_count = CFG_MAX_FLASH_SECT;
- memset(flash_info[i].protect, 0, CFG_MAX_FLASH_SECT);
-
- switch (i) {
- case 0:
- flashbase = PHYS_FLASH_1;
- break;
- default:
- panic("configured too many flash banks!\n");
- break;
- }
- for (j = 0; j < flash_info[i].sector_count; j++) {
- flash_info[i].start[j] = flashbase + j*MAIN_SECT_SIZE;
- }
- size += flash_info[i].size;
- }
-
- /* Protect u-boot sectors */
- flash_protect(FLAG_PROTECT_SET,
- CFG_FLASH_BASE,
- CFG_FLASH_BASE + (256*1024) - 1,
- &flash_info[0]);
-
-#ifdef CFG_ENV_IS_IN_FLASH
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1,
- &flash_info[0]);
-#endif
-
- return size;
-}
-
-
-/**
- * flash_print_info: - print information about the flash situation
- *
- * @param info:
- */
-
-void flash_print_info (flash_info_t *info)
-{
- int i, j;
-
- for (j=0; j<CFG_MAX_FLASH_BANKS; j++) {
-
- switch (info->flash_id & FLASH_VENDMASK) {
-
- case (INTEL_MANUFACT & FLASH_VENDMASK):
- printf("Intel: ");
- break;
- default:
- printf("Unknown Vendor ");
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
-
- case (INTEL_ID_28F128J3 & FLASH_TYPEMASK):
- printf("28F128J3 (128Mbit)\n");
- break;
- default:
- printf("Unknown Chip Type\n");
- return;
- }
-
- printf(" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf(" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; i++) {
- if ((i % 5) == 0) printf ("\n ");
-
- printf (" %08lX%s", info->start[i],
- info->protect[i] ? " (RO)" : " ");
- }
- printf ("\n");
- info++;
- }
-}
-
-
-/**
- * flash_erase: - erase flash sectors
- *
- */
-
-int flash_erase(flash_info_t *info, int s_first, int s_last)
-{
- int flag, prot, sect;
- int rc = ERR_OK;
-
- if (info->flash_id == FLASH_UNKNOWN)
- return ERR_UNKNOWN_FLASH_TYPE;
-
- if ((s_first < 0) || (s_first > s_last)) {
- return ERR_INVAL;
- }
-
- if ((info->flash_id & FLASH_VENDMASK) != (INTEL_MANUFACT & FLASH_VENDMASK))
- return ERR_UNKNOWN_FLASH_VENDOR;
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) prot++;
- }
-
- if (prot) return ERR_PROTECTED;
-
- /*
- * Disable interrupts which might cause a timeout
- * here. Remember that our exception vectors are
- * at address 0 in the flash, and we don't want a
- * (ticker) exception to happen while the flash
- * chip is in programming mode.
- */
-
- flag = disable_interrupts();
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last && !ctrlc(); sect++) {
-
- printf("Erasing sector %2d ... ", sect);
-
- PRINTK("\n");
-
- /* arm simple, non interrupt dependent timer */
- reset_timer_masked();
-
- if (info->protect[sect] == 0) { /* not protected */
- u16 * volatile addr = (u16 * volatile)(info->start[sect]);
-
- PRINTK("unlocking sector\n");
- *addr = 0x0060;
- *addr = 0x00d0;
- *addr = 0x00ff;
-
- PRINTK("erasing sector\n");
- *addr = 0x0020;
- PRINTK("confirming erase\n");
- *addr = 0x00D0;
-
- while ((*addr & 0x0080) != 0x0080) {
- PRINTK(".");
- if (get_timer_masked() > CFG_FLASH_ERASE_TOUT) {
- *addr = 0x00B0; /* suspend erase*/
- *addr = 0x00FF; /* read mode */
- rc = ERR_TIMOUT;
- goto outahere;
- }
- }
-
- PRINTK("clearing status register\n");
- *addr = 0x0050;
- PRINTK("resetting to read mode");
- *addr = 0x00FF;
- }
-
- printf("ok.\n");
- }
-
- if (ctrlc()) printf("User Interrupt!\n");
-
- outahere:
-
- /* allow flash to settle - wait 10 ms */
- udelay_masked(10000);
-
- if (flag) enable_interrupts();
-
- return rc;
-}
-
-
-/**
- * write_word: - copy memory to flash
- *
- * @param info:
- * @param dest:
- * @param data:
- * @return:
- */
-
-static int write_word (flash_info_t *info, ulong dest, ushort data)
-{
- volatile u16 *addr = (u16 *)dest, val;
- int rc = ERR_OK;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*addr & data) != data) return ERR_NOT_ERASED;
-
- /*
- * Disable interrupts which might cause a timeout
- * here. Remember that our exception vectors are
- * at address 0 in the flash, and we don't want a
- * (ticker) exception to happen while the flash
- * chip is in programming mode.
- */
- flag = disable_interrupts();
-
- /* clear status register command */
- *addr = 0x50;
-
- /* program set-up command */
- *addr = 0x40;
-
- /* latch address/data */
- *addr = data;
-
- /* arm simple, non interrupt dependent timer */
- reset_timer_masked();
-
- /* wait while polling the status register */
- while(((val = *addr) & 0x80) != 0x80) {
- if (get_timer_masked() > CFG_FLASH_WRITE_TOUT) {
- rc = ERR_TIMOUT;
- *addr = 0xB0; /* suspend program command */
- goto outahere;
- }
- }
-
- if(val & 0x1A) { /* check for error */
- printf("\nFlash write error %02x at address %08lx\n",
- (int)val, (unsigned long)dest);
- if(val & (1<<3)) {
- printf("Voltage range error.\n");
- rc = ERR_PROG_ERROR;
- goto outahere;
- }
- if(val & (1<<1)) {
- printf("Device protect error.\n");
- rc = ERR_PROTECTED;
- goto outahere;
- }
- if(val & (1<<4)) {
- printf("Programming error.\n");
- rc = ERR_PROG_ERROR;
- goto outahere;
- }
- rc = ERR_PROG_ERROR;
- goto outahere;
- }
-
- outahere:
-
- *addr = 0xFF; /* read array command */
- if (flag) enable_interrupts();
-
- return rc;
-}
-
-
-/**
- * write_buf: - Copy memory to flash.
- *
- * @param info:
- * @param src: source of copy transaction
- * @param addr: where to copy to
- * @param cnt: number of bytes to copy
- *
- * @return error code
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp;
- ushort data;
- int l;
- int i, rc;
-
- wp = (addr & ~1); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data >> 8) | (*(uchar *)cp << 8);
- }
- for (; i<2 && cnt>0; ++i) {
- data = (data >> 8) | (*src++ << 8);
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<2; ++i, ++cp) {
- data = (data >> 8) | (*(uchar *)cp << 8);
- }
-
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 2;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 2) {
- /* data = *((vushort*)src); */
- data = *((ushort*)src);
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- src += 2;
- wp += 2;
- cnt -= 2;
- }
-
- if (cnt == 0) return ERR_OK;
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<2 && cnt>0; ++i, ++cp) {
- data = (data >> 8) | (*src++ << 8);
- --cnt;
- }
- for (; i<2; ++i, ++cp) {
- data = (data >> 8) | (*(uchar *)cp << 8);
- }
-
- return write_word(info, wp, data);
-}
diff --git a/board/innokom/innokom.c b/board/innokom/innokom.c
deleted file mode 100644
index ae5402e843..0000000000
--- a/board/innokom/innokom.c
+++ /dev/null
@@ -1,186 +0,0 @@
-/*
- * (C) Copyright 2002
- * Robert Schwebel, Pengutronix, r.schwebel@pengutronix.de
- * Kyle Harris, Nexus Technologies, Inc., kharris@nexus-tech.net
- * Marius Groeger, Sysgo Real-Time Solutions GmbH, mgroeger@sysgo.de
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/arch/pxa-regs.h>
-#include <asm/mach-types.h>
-
-#ifdef CONFIG_SHOW_BOOT_PROGRESS
-# define SHOW_BOOT_PROGRESS(arg) show_boot_progress(arg)
-#else
-# define SHOW_BOOT_PROGRESS(arg)
-#endif
-
-/**
- * i2c_init_board - reset i2c bus. When the board is powercycled during a
- * bus transfer it might hang; for details see doc/I2C_Edge_Conditions.
- * The Innokom board has GPIO70 connected to SCLK which can be toggled
- * until all chips think that their current cycles are finished.
- */
-int i2c_init_board(void)
-{
- int i, icr;
-
- /* disable I2C controller first, otherwhise it thinks we want to */
- /* talk to the slave port... */
- icr = ICR; ICR &= ~(ICR_SCLE | ICR_IUE);
-
- /* set gpio pin low _before_ we change direction to output */
- GPCR(70) = GPIO_bit(70);
-
- /* now toggle between output=low and high-impedance */
- for (i = 0; i < 20; i++) {
- GPDR(70) |= GPIO_bit(70); /* output */
- udelay(10);
- GPDR(70) &= ~GPIO_bit(70); /* input */
- udelay(10);
- }
-
- ICR = icr;
-
- return 0;
-}
-
-
-/**
- * misc_init_r: - misc initialisation routines
- */
-
-int misc_init_r(void)
-{
- uchar *str;
-
- /* determine if the software update key is pressed during startup */
- if (GPLR0 & 0x00000800) {
- printf("using bootcmd_normal (sw-update button not pressed)\n");
- str = getenv("bootcmd_normal");
- } else {
- printf("using bootcmd_update (sw-update button pressed)\n");
- str = getenv("bootcmd_update");
- }
-
- setenv("bootcmd",str);
-
- return 0;
-}
-
-
-/**
- * board_init: - setup some data structures
- *
- * @return: 0 in case of success
- */
-
-int board_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- /* memory and cpu-speed are setup before relocation */
- /* so we do _nothing_ here */
-
- gd->bd->bi_arch_number = MACH_TYPE_INNOKOM;
- gd->bd->bi_boot_params = 0xa0000100;
- gd->bd->bi_baudrate = CONFIG_BAUDRATE;
-
- return 0;
-}
-
-
-/**
- * dram_init: - setup dynamic RAM
- *
- * @return: 0 in case of success
- */
-
-int dram_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
-
- return 0;
-}
-
-
-/**
- * innokom_set_led: - switch LEDs on or off
- *
- * @param led: LED to switch (0,1,2)
- * @param state: switch on (1) or off (0)
- */
-
-void innokom_set_led(int led, int state)
-{
- switch(led) {
-/*
- case 0: if (state==1) {
- GPCR0 |= CSB226_USER_LED0;
- } else if (state==0) {
- GPSR0 |= CSB226_USER_LED0;
- }
- break;
-
- case 1: if (state==1) {
- GPCR0 |= CSB226_USER_LED1;
- } else if (state==0) {
- GPSR0 |= CSB226_USER_LED1;
- }
- break;
-
- case 2: if (state==1) {
- GPCR0 |= CSB226_USER_LED2;
- } else if (state==0) {
- GPSR0 |= CSB226_USER_LED2;
- }
- break;
-*/
- }
-
- return;
-}
-
-
-/**
- * show_boot_progress: - indicate state of the boot process
- *
- * @param status: Status number - see README for details.
- *
- * The CSB226 does only have 3 LEDs, so we switch them on at the most
- * important states (1, 5, 15).
- */
-
-void show_boot_progress (int status)
-{
- switch(status) {
-/*
- case 1: csb226_set_led(0,1); break;
- case 5: csb226_set_led(1,1); break;
- case 15: csb226_set_led(2,1); break;
-*/
- }
-
- return;
-}
diff --git a/board/innokom/lowlevel_init.S b/board/innokom/lowlevel_init.S
deleted file mode 100644
index aa9dcba6fc..0000000000
--- a/board/innokom/lowlevel_init.S
+++ /dev/null
@@ -1,437 +0,0 @@
-/*
- * Most of this taken from Redboot hal_platform_setup.h with cleanup
- *
- * NOTE: I haven't clean this up considerably, just enough to get it
- * running. See hal_platform_setup.h for the source. See
- * board/cradle/lowlevel_init.S for another PXA250 setup that is
- * much cleaner.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <config.h>
-#include <version.h>
-#include <asm/arch/pxa-regs.h>
-
-DRAM_SIZE: .long CFG_DRAM_SIZE
-
-/* wait for coprocessor write complete */
- .macro CPWAIT reg
- mrc p15,0,\reg,c2,c0,0
- mov \reg,\reg
- sub pc,pc,#4
- .endm
-
-_TEXT_BASE:
- .word TEXT_BASE
-
-
-/*
- * Memory setup
- */
-
-.globl lowlevel_init
-lowlevel_init:
-
- mov r10, lr
-
- /* Set up GPIO pins first ----------------------------------------- */
-
- ldr r0, =GPSR0
- ldr r1, =CFG_GPSR0_VAL
- str r1, [r0]
-
- ldr r0, =GPSR1
- ldr r1, =CFG_GPSR1_VAL
- str r1, [r0]
-
- ldr r0, =GPSR2
- ldr r1, =CFG_GPSR2_VAL
- str r1, [r0]
-
- ldr r0, =GPCR0
- ldr r1, =CFG_GPCR0_VAL
- str r1, [r0]
-
- ldr r0, =GPCR1
- ldr r1, =CFG_GPCR1_VAL
- str r1, [r0]
-
- ldr r0, =GPCR2
- ldr r1, =CFG_GPCR2_VAL
- str r1, [r0]
-
- ldr r0, =GPDR0
- ldr r1, =CFG_GPDR0_VAL
- str r1, [r0]
-
- ldr r0, =GPDR1
- ldr r1, =CFG_GPDR1_VAL
- str r1, [r0]
-
- ldr r0, =GPDR2
- ldr r1, =CFG_GPDR2_VAL
- str r1, [r0]
-
- ldr r0, =GAFR0_L
- ldr r1, =CFG_GAFR0_L_VAL
- str r1, [r0]
-
- ldr r0, =GAFR0_U
- ldr r1, =CFG_GAFR0_U_VAL
- str r1, [r0]
-
- ldr r0, =GAFR1_L
- ldr r1, =CFG_GAFR1_L_VAL
- str r1, [r0]
-
- ldr r0, =GAFR1_U
- ldr r1, =CFG_GAFR1_U_VAL
- str r1, [r0]
-
- ldr r0, =GAFR2_L
- ldr r1, =CFG_GAFR2_L_VAL
- str r1, [r0]
-
- ldr r0, =GAFR2_U
- ldr r1, =CFG_GAFR2_U_VAL
- str r1, [r0]
-
- ldr r0, =PSSR /* enable GPIO pins */
- ldr r1, =CFG_PSSR_VAL
- str r1, [r0]
-
-/* ldr r3, =MSC1 / low - bank 2 Lubbock Registers / SRAM */
-/* ldr r2, =CFG_MSC1_VAL / high - bank 3 Ethernet Controller */
-/* str r2, [r3] / need to set MSC1 before trying to write to the HEX LEDs */
-/* ldr r2, [r3] / need to read it back to make sure the value latches (see MSC section of manual) */
-/* */
-/* ldr r1, =LED_BLANK */
-/* mov r0, #0xFF */
-/* str r0, [r1] / turn on hex leds */
-/* */
-/*loop: */
-/* */
-/* ldr r0, =0xB0070001 */
-/* ldr r1, =_LED */
-/* str r0, [r1] / hex display */
-
-
- /* ---------------------------------------------------------------- */
- /* Enable memory interface */
- /* */
- /* The sequence below is based on the recommended init steps */
- /* detailed in the Intel PXA250 Operating Systems Developers Guide, */
- /* Chapter 10. */
- /* ---------------------------------------------------------------- */
-
- /* ---------------------------------------------------------------- */
- /* Step 1: Wait for at least 200 microsedonds to allow internal */
- /* clocks to settle. Only necessary after hard reset... */
- /* FIXME: can be optimized later */
- /* ---------------------------------------------------------------- */
-
- ldr r3, =OSCR /* reset the OS Timer Count to zero */
- mov r2, #0
- str r2, [r3]
- ldr r4, =0x300 /* really 0x2E1 is about 200usec, */
- /* so 0x300 should be plenty */
-1:
- ldr r2, [r3]
- cmp r4, r2
- bgt 1b
-
-mem_init:
-
- ldr r1, =MEMC_BASE /* get memory controller base addr. */
-
- /* ---------------------------------------------------------------- */
- /* Step 2a: Initialize Asynchronous static memory controller */
- /* ---------------------------------------------------------------- */
-
- /* MSC registers: timing, bus width, mem type */
-
- /* MSC0: nCS(0,1) */
- ldr r2, =CFG_MSC0_VAL
- str r2, [r1, #MSC0_OFFSET]
- ldr r2, [r1, #MSC0_OFFSET] /* read back to ensure */
- /* that data latches */
- /* MSC1: nCS(2,3) */
- ldr r2, =CFG_MSC1_VAL
- str r2, [r1, #MSC1_OFFSET]
- ldr r2, [r1, #MSC1_OFFSET]
-
- /* MSC2: nCS(4,5) */
- ldr r2, =CFG_MSC2_VAL
- str r2, [r1, #MSC2_OFFSET]
- ldr r2, [r1, #MSC2_OFFSET]
-
- /* ---------------------------------------------------------------- */
- /* Step 2b: Initialize Card Interface */
- /* ---------------------------------------------------------------- */
-
- /* MECR: Memory Expansion Card Register */
- ldr r2, =CFG_MECR_VAL
- str r2, [r1, #MECR_OFFSET]
- ldr r2, [r1, #MECR_OFFSET]
-
- /* MCMEM0: Card Interface slot 0 timing */
- ldr r2, =CFG_MCMEM0_VAL
- str r2, [r1, #MCMEM0_OFFSET]
- ldr r2, [r1, #MCMEM0_OFFSET]
-
- /* MCMEM1: Card Interface slot 1 timing */
- ldr r2, =CFG_MCMEM1_VAL
- str r2, [r1, #MCMEM1_OFFSET]
- ldr r2, [r1, #MCMEM1_OFFSET]
-
- /* MCATT0: Card Interface Attribute Space Timing, slot 0 */
- ldr r2, =CFG_MCATT0_VAL
- str r2, [r1, #MCATT0_OFFSET]
- ldr r2, [r1, #MCATT0_OFFSET]
-
- /* MCATT1: Card Interface Attribute Space Timing, slot 1 */
- ldr r2, =CFG_MCATT1_VAL
- str r2, [r1, #MCATT1_OFFSET]
- ldr r2, [r1, #MCATT1_OFFSET]
-
- /* MCIO0: Card Interface I/O Space Timing, slot 0 */
- ldr r2, =CFG_MCIO0_VAL
- str r2, [r1, #MCIO0_OFFSET]
- ldr r2, [r1, #MCIO0_OFFSET]
-
- /* MCIO1: Card Interface I/O Space Timing, slot 1 */
- ldr r2, =CFG_MCIO1_VAL
- str r2, [r1, #MCIO1_OFFSET]
- ldr r2, [r1, #MCIO1_OFFSET]
-
- /* ---------------------------------------------------------------- */
- /* Step 2c: Write FLYCNFG FIXME: what's that??? */
- /* ---------------------------------------------------------------- */
-
- /* test if we run from flash or RAM - RAM/BDI: don't setup RAM */
- adr r3, mem_init /* r0 <- current position of code */
- ldr r2, =mem_init
- cmp r3, r2 /* skip init if in place */
- beq initirqs
-
-
- /* ---------------------------------------------------------------- */
- /* Step 2d: Initialize Timing for Sync Memory (SDCLK0) */
- /* ---------------------------------------------------------------- */
-
- /* Before accessing MDREFR we need a valid DRI field, so we set */
- /* this to power on defaults + DRI field. */
-
- ldr r3, =CFG_MDREFR_VAL
- ldr r2, =0xFFF
- and r3, r3, r2
- ldr r4, =0x03ca4000
- orr r4, r4, r3
-
- str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */
- ldr r4, [r1, #MDREFR_OFFSET]
-
-
- /* ---------------------------------------------------------------- */
- /* Step 3: Initialize Synchronous Static Memory (Flash/Peripherals) */
- /* ---------------------------------------------------------------- */
-
- /* Initialize SXCNFG register. Assert the enable bits */
-
- /* Write SXMRS to cause an MRS command to all enabled banks of */
- /* synchronous static memory. Note that SXLCR need not be written */
- /* at this time. */
-
- /* FIXME: we use async mode for now */
-
-
- /* ---------------------------------------------------------------- */
- /* Step 4: Initialize SDRAM */
- /* ---------------------------------------------------------------- */
-
- /* Step 4a: assert MDREFR:K?RUN and configure */
- /* MDREFR:K1DB2 and MDREFR:K2DB2 as desired. */
-
- ldr r4, =CFG_MDREFR_VAL
- str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */
- ldr r4, [r1, #MDREFR_OFFSET]
-
- /* Step 4b: de-assert MDREFR:SLFRSH. */
-
- bic r4, r4, #(MDREFR_SLFRSH)
-
- str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */
- ldr r4, [r1, #MDREFR_OFFSET]
-
-
- /* Step 4c: assert MDREFR:E1PIN and E0PIO */
-
- orr r4, r4, #(MDREFR_E1PIN|MDREFR_E0PIN)
-
- str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */
- ldr r4, [r1, #MDREFR_OFFSET]
-
-
- /* Step 4d: write MDCNFG with MDCNFG:DEx deasserted (set to 0), to */
- /* configure but not enable each SDRAM partition pair. */
-
- ldr r4, =CFG_MDCNFG_VAL
- bic r4, r4, #(MDCNFG_DE0|MDCNFG_DE1)
-
- str r4, [r1, #MDCNFG_OFFSET] /* write back MDCNFG */
- ldr r4, [r1, #MDCNFG_OFFSET]
-
-
- /* Step 4e: Wait for the clock to the SDRAMs to stabilize, */
- /* 100..200 µsec. */
-
- ldr r3, =OSCR /* reset the OS Timer Count to zero */
- mov r2, #0
- str r2, [r3]
- ldr r4, =0x300 /* really 0x2E1 is about 200usec, */
- /* so 0x300 should be plenty */
-1:
- ldr r2, [r3]
- cmp r4, r2
- bgt 1b
-
-
- /* Step 4f: Trigger a number (usually 8) refresh cycles by */
- /* attempting non-burst read or write accesses to disabled */
- /* SDRAM, as commonly specified in the power up sequence */
- /* documented in SDRAM data sheets. The address(es) used */
- /* for this purpose must not be cacheable. */
-
- /* There should 9 writes, since the first write doesn't */
- /* trigger a refresh cycle on PXA250. See Intel PXA250 and */
- /* PXA210 Processors Specification Update, */
- /* Jan 2003, Errata #116, page 30. */
-
-
- ldr r3, =CFG_DRAM_BASE
- str r2, [r3]
- str r2, [r3]
- str r2, [r3]
- str r2, [r3]
- str r2, [r3]
- str r2, [r3]
- str r2, [r3]
- str r2, [r3]
- str r2, [r3]
-
- /* Step 4g: Write MDCNFG with enable bits asserted */
- /* (MDCNFG:DEx set to 1). */
-
- ldr r3, [r1, #MDCNFG_OFFSET]
- orr r3, r3, #(MDCNFG_DE0|MDCNFG_DE1)
- str r3, [r1, #MDCNFG_OFFSET]
-
- /* Step 4h: Write MDMRS. */
-
- ldr r2, =CFG_MDMRS_VAL
- str r2, [r1, #MDMRS_OFFSET]
-
-
- /* We are finished with Intel's memory controller initialisation */
-
- /* ---------------------------------------------------------------- */
- /* Disable (mask) all interrupts at interrupt controller */
- /* ---------------------------------------------------------------- */
-
-initirqs:
-
- mov r1, #0 /* clear int. level register (IRQ, not FIQ) */
- ldr r2, =ICLR
- str r1, [r2]
-
- ldr r2, =ICMR /* mask all interrupts at the controller */
- str r1, [r2]
-
-
- /* ---------------------------------------------------------------- */
- /* Clock initialisation */
- /* ---------------------------------------------------------------- */
-
-initclks:
-
- /* Disable the peripheral clocks, and set the core clock frequency */
- /* (hard-coding at 398.12MHz for now). */
-
- /* Turn Off ALL on-chip peripheral clocks for re-configuration */
- /* Note: See label 'ENABLECLKS' for the re-enabling */
- ldr r1, =CKEN
- mov r2, #0
- str r2, [r1]
-
-
- /* default value in case no valid rotary switch setting is found */
- ldr r2, =(CCCR_L27|CCCR_M2|CCCR_N10) /* DEFAULT: {200/200/100} */
-
- /* ... and write the core clock config register */
- ldr r1, =CCCR
- str r2, [r1]
-
- /* enable the 32Khz oscillator for RTC and PowerManager */
-/*
- ldr r1, =OSCC
- mov r2, #OSCC_OON
- str r2, [r1]
-*/
- /* NOTE: spin here until OSCC.OOK get set, meaning the PLL */
- /* has settled. */
-60:
- ldr r2, [r1]
- ands r2, r2, #1
- beq 60b
-
- /* ---------------------------------------------------------------- */
- /* */
- /* ---------------------------------------------------------------- */
-
- /* Save SDRAM size */
- ldr r1, =DRAM_SIZE
- str r8, [r1]
-
- /* Interrupt init: Mask all interrupts */
- ldr r0, =ICMR /* enable no sources */
- mov r1, #0
- str r1, [r0]
-
- /* FIXME */
-
-#ifndef DEBUG
- /*Disable software and data breakpoints */
- mov r0,#0
- mcr p15,0,r0,c14,c8,0 /* ibcr0 */
- mcr p15,0,r0,c14,c9,0 /* ibcr1 */
- mcr p15,0,r0,c14,c4,0 /* dbcon */
-
- /*Enable all debug functionality */
- mov r0,#0x80000000
- mcr p14,0,r0,c10,c0,0 /* dcsr */
-#endif
-
- /* ---------------------------------------------------------------- */
- /* End lowlevel_init */
- /* ---------------------------------------------------------------- */
-
-endlowlevel_init:
-
- mov pc, lr
diff --git a/board/innokom/u-boot.lds b/board/innokom/u-boot.lds
deleted file mode 100644
index f0102391b3..0000000000
--- a/board/innokom/u-boot.lds
+++ /dev/null
@@ -1,56 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-ENTRY(_start)
-SECTIONS
-{
- . = 0x00000000;
-
- . = ALIGN(4);
- .text :
- {
- cpu/pxa/start.o (.text)
- *(.text)
- }
-
- . = ALIGN(4);
- .rodata : { *(.rodata) }
-
- . = ALIGN(4);
- .data : { *(.data) }
-
- . = ALIGN(4);
- .got : { *(.got) }
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = ALIGN(4);
- __bss_start = .;
- .bss : { *(.bss) }
- _end = .;
-}
diff --git a/board/integratorap/Makefile b/board/integratorap/Makefile
deleted file mode 100644
index 358df62519..0000000000
--- a/board/integratorap/Makefile
+++ /dev/null
@@ -1,51 +0,0 @@
-#
-# (C) Copyright 2000-2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# (C) Copyright 2004
-# ARM Ltd.
-# Philippe Robin, <philippe.robin@arm.com>
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := integratorap.o flash.o
-SOBJS := lowlevel_init.o memsetup.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $^
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/integratorap/config.mk b/board/integratorap/config.mk
deleted file mode 100644
index 25b79b3e79..0000000000
--- a/board/integratorap/config.mk
+++ /dev/null
@@ -1,5 +0,0 @@
-#
-# image should be loaded at 0x01000000
-#
-
-TEXT_BASE = 0x01000000
diff --git a/board/integratorap/flash.c b/board/integratorap/flash.c
deleted file mode 100644
index b120d63eb9..0000000000
--- a/board/integratorap/flash.c
+++ /dev/null
@@ -1,473 +0,0 @@
-/*
- * (C) Copyright 2001
- * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
- *
- * (C) Copyright 2001-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2003
- * Texas Instruments, <www.ti.com>
- * Kshitij Gupta <Kshitij@ti.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <linux/byteorder/swab.h>
-
-#define PHYS_FLASH_SECT_SIZE 0x00020000 /* 256 KB sectors (x2) */
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/* Board support for 1 or 2 flash devices */
-#undef FLASH_PORT_WIDTH32
-#define FLASH_PORT_WIDTH16
-
-#ifdef FLASH_PORT_WIDTH16
-#define FLASH_PORT_WIDTH ushort
-#define FLASH_PORT_WIDTHV vu_short
-#define SWAP(x) __swab16(x)
-#else
-#define FLASH_PORT_WIDTH ulong
-#define FLASH_PORT_WIDTHV vu_long
-#define SWAP(x) __swab32(x)
-#endif
-
-#define FPW FLASH_PORT_WIDTH
-#define FPWV FLASH_PORT_WIDTHV
-
-#define mb() __asm__ __volatile__ ("" : : : "memory")
-
-
-/* Flash Organization Structure */
-typedef struct OrgDef {
- unsigned int sector_number;
- unsigned int sector_size;
-} OrgDef;
-
-
-/* Flash Organizations */
-OrgDef OrgIntel_28F256L18T[] = {
- {4, 32 * 1024}, /* 4 * 32kBytes sectors */
- {255, 128 * 1024}, /* 255 * 128kBytes sectors */
-};
-
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-unsigned long flash_init (void);
-static ulong flash_get_size (FPW * addr, flash_info_t * info);
-static int write_data (flash_info_t * info, ulong dest, FPW data);
-static void flash_get_offsets (ulong base, flash_info_t * info);
-void inline spin_wheel (void);
-void flash_print_info (flash_info_t * info);
-void flash_unprotect_sectors (FPWV * addr);
-int flash_erase (flash_info_t * info, int s_first, int s_last);
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- int i;
- ulong size = 0;
- for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
- switch (i) {
- case 0:
- flash_get_size ((FPW *) PHYS_FLASH_1, &flash_info[i]);
- flash_get_offsets (PHYS_FLASH_1, &flash_info[i]);
- break;
- default:
- panic ("configured too many flash banks!\n");
- break;
- }
- size += flash_info[i].size;
- }
-
- /* Protect monitor and environment sectors
- */
- flash_protect (FLAG_PROTECT_SET,
- CFG_FLASH_BASE,
- CFG_FLASH_BASE + monitor_flash_len - 1, &flash_info[0]);
-
- return size;
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_get_offsets (ulong base, flash_info_t * info)
-{
- int i;
- OrgDef *pOrgDef;
-
- pOrgDef = OrgIntel_28F256L18T;
- if (info->flash_id == FLASH_UNKNOWN) {
- return;
- }
-
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
- for (i = 0; i < info->sector_count; i++) {
- if (i > 255) {
- info->start[i] = base + (i * 0x8000);
- info->protect[i] = 0;
- } else {
- info->start[i] = base +
- (i * PHYS_FLASH_SECT_SIZE);
- info->protect[i] = 0;
- }
- }
- }
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t * info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_INTEL:
- printf ("INTEL ");
- break;
- default:
- printf ("Unknown Vendor ");
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_28F256L18T:
- printf ("FLASH 28F256L18T\n");
- break;
- default:
- printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i], info->protect[i] ? " (RO)" : " ");
- }
- printf ("\n");
- return;
-}
-
-/*
- * The following code cannot be run from FLASH!
- */
-static ulong flash_get_size (FPW * addr, flash_info_t * info)
-{
- volatile FPW value;
-
- /* Write auto select command: read Manufacturer ID */
- addr[0x5555] = (FPW) 0x00AA00AA;
- addr[0x2AAA] = (FPW) 0x00550055;
- addr[0x5555] = (FPW) 0x00900090;
-
- mb ();
- value = addr[0];
-
- switch (value) {
-
- case (FPW) INTEL_MANUFACT:
- info->flash_id = FLASH_MAN_INTEL;
- break;
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
- return (0); /* no or unknown flash */
- }
-
- mb ();
- value = addr[1]; /* device ID */
- switch (value) {
-
- case (FPW) (INTEL_ID_28F256L18T):
- info->flash_id += FLASH_28F256L18T;
- info->sector_count = 259;
- info->size = 0x02000000;
- break; /* => 32 MB */
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- break;
- }
-
- if (info->sector_count > CFG_MAX_FLASH_SECT) {
- printf ("** ERROR: sector count %d > max (%d) **\n",
- info->sector_count, CFG_MAX_FLASH_SECT);
- info->sector_count = CFG_MAX_FLASH_SECT;
- }
-
- addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
-
- return (info->size);
-}
-
-
-/* unprotects a sector for write and erase
- * on some intel parts, this unprotects the entire chip, but it
- * wont hurt to call this additional times per sector...
- */
-void flash_unprotect_sectors (FPWV * addr)
-{
-#define PD_FINTEL_WSMS_READY_MASK 0x0080
-
- *addr = (FPW) 0x00500050; /* clear status register */
-
- /* this sends the clear lock bit command */
- *addr = (FPW) 0x00600060;
- *addr = (FPW) 0x00D000D0;
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t * info, int s_first, int s_last)
-{
- int flag, prot, sect;
- ulong type, start, last;
- int rcode = 0;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- type = (info->flash_id & FLASH_VENDMASK);
- if ((type != FLASH_MAN_INTEL)) {
- printf ("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- return 1;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
-
- start = get_timer (0);
- last = start;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- FPWV *addr = (FPWV *) (info->start[sect]);
- FPW status;
-
- printf ("Erasing sector %2d ... ", sect);
-
- flash_unprotect_sectors (addr);
-
- /* arm simple, non interrupt dependent timer */
- reset_timer_masked ();
-
- *addr = (FPW) 0x00500050;/* clear status register */
- *addr = (FPW) 0x00200020;/* erase setup */
- *addr = (FPW) 0x00D000D0;/* erase confirm */
-
- while (((status =
- *addr) & (FPW) 0x00800080) !=
- (FPW) 0x00800080) {
- if (get_timer_masked () >
- CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- /* suspend erase */
- *addr = (FPW) 0x00B000B0;
- /* reset to read mode */
- *addr = (FPW) 0x00FF00FF;
- rcode = 1;
- break;
- }
- }
-
- /* clear status register cmd. */
- *addr = (FPW) 0x00500050;
- *addr = (FPW) 0x00FF00FF;/* resest to read mode */
- printf (" done\n");
- }
- }
- return rcode;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- * 4 - Flash not identified
- */
-
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- ulong cp, wp;
- FPW data;
- int count, i, l, rc, port_width;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- return 4;
- }
-/* get lower word aligned address */
-#ifdef FLASH_PORT_WIDTH16
- wp = (addr & ~1);
- port_width = 2;
-#else
- wp = (addr & ~3);
- port_width = 4;
-#endif
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i = 0, cp = wp; i < l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
- for (; i < port_width && cnt > 0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt == 0 && i < port_width; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
-
- if ((rc = write_data (info, wp, SWAP (data))) != 0) {
- return (rc);
- }
- wp += port_width;
- }
-
- /*
- * handle word aligned part
- */
- count = 0;
- while (cnt >= port_width) {
- data = 0;
- for (i = 0; i < port_width; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_data (info, wp, SWAP (data))) != 0) {
- return (rc);
- }
- wp += port_width;
- cnt -= port_width;
- if (count++ > 0x800) {
- spin_wheel ();
- count = 0;
- }
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i < port_width; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
-
- return (write_data (info, wp, SWAP (data)));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word or halfword to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_data (flash_info_t * info, ulong dest, FPW data)
-{
- FPWV *addr = (FPWV *) dest;
- ulong status;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*addr & data) != data) {
- printf ("not erased at %08lx (%x)\n", (ulong) addr, *addr);
- return (2);
- }
- flash_unprotect_sectors (addr);
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
- *addr = (FPW) 0x00400040; /* write setup */
- *addr = data;
-
- /* arm simple, non interrupt dependent timer */
- reset_timer_masked ();
-
- /* wait while polling the status register */
- while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
- if (get_timer_masked () > CFG_FLASH_WRITE_TOUT) {
- *addr = (FPW) 0x00FF00FF; /* restore read mode */
- return (1);
- }
- }
- *addr = (FPW) 0x00FF00FF; /* restore read mode */
- return (0);
-}
-
-void inline spin_wheel (void)
-{
- static int p = 0;
- static char w[] = "\\/-";
-
- printf ("\010%c", w[p]);
- (++p == 3) ? (p = 0) : 0;
-}
diff --git a/board/integratorap/integratorap.c b/board/integratorap/integratorap.c
deleted file mode 100644
index d4f61d6403..0000000000
--- a/board/integratorap/integratorap.c
+++ /dev/null
@@ -1,651 +0,0 @@
-/*
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * (C) Copyright 2002
- * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
- *
- * (C) Copyright 2003
- * Texas Instruments, <www.ti.com>
- * Kshitij Gupta <Kshitij@ti.com>
- *
- * (C) Copyright 2004
- * ARM Ltd.
- * Philippe Robin, <philippe.robin@arm.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-
-#ifdef CONFIG_PCI
-#include <pci.h>
-#endif
-
-void flash__init (void);
-void ether__init (void);
-void peripheral_power_enable (void);
-
-#if defined(CONFIG_SHOW_BOOT_PROGRESS)
-void show_boot_progress(int progress)
-{
- printf("Boot reached stage %d\n", progress);
-}
-#endif
-
-#define COMP_MODE_ENABLE ((unsigned int)0x0000EAEF)
-
-static inline void delay (unsigned long loops)
-{
- __asm__ volatile ("1:\n"
- "subs %0, %1, #1\n"
- "bne 1b":"=r" (loops):"0" (loops));
-}
-
-/*
- * Miscellaneous platform dependent initialisations
- */
-
-int board_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- /* arch number of Integrator Board */
- gd->bd->bi_arch_number = MACH_TYPE_INTEGRATOR;
-
- /* adress of boot parameters */
- gd->bd->bi_boot_params = 0x00000100;
-
- gd->flags = 0;
-
-#ifdef CONFIG_CM_REMAP
-extern void cm_remap(void);
- cm_remap(); /* remaps writeable memory to 0x00000000 */
-#endif
-
- icache_enable ();
-
- flash__init ();
- return 0;
-}
-
-
-int misc_init_r (void)
-{
-#ifdef CONFIG_PCI
- pci_init();
-#endif
- setenv("verify", "n");
- return (0);
-}
-
-/*
- * Initialize PCI Devices, report devices found.
- */
-#ifdef CONFIG_PCI
-
-#ifndef CONFIG_PCI_PNP
-
-static struct pci_config_table pci_integrator_config_table[] = {
- { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x0f, PCI_ANY_ID,
- pci_cfgfunc_config_device, { PCI_ENET0_IOADDR,
- PCI_ENET0_MEMADDR,
- PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }},
- { }
-};
-#endif
-
-/* V3 access routines */
-#define _V3Write16(o,v) (*(volatile unsigned short *)(PCI_V3_BASE + (unsigned int)(o)) = (unsigned short)(v))
-#define _V3Read16(o) (*(volatile unsigned short *)(PCI_V3_BASE + (unsigned int)(o)))
-
-#define _V3Write32(o,v) (*(volatile unsigned int *)(PCI_V3_BASE + (unsigned int)(o)) = (unsigned int)(v))
-#define _V3Read32(o) (*(volatile unsigned int *)(PCI_V3_BASE + (unsigned int)(o)))
-
-/* Compute address necessary to access PCI config space for the given */
-/* bus and device. */
-#define PCI_CONFIG_ADDRESS( __bus, __devfn, __offset ) ({ \
- unsigned int __address, __devicebit; \
- unsigned short __mapaddress; \
- unsigned int __dev = PCI_DEV (__devfn); /* FIXME to check!! (slot?) */ \
- \
- if (__bus == 0) { \
- /* local bus segment so need a type 0 config cycle */ \
- /* build the PCI configuration "address" with one-hot in A31-A11 */ \
- __address = PCI_CONFIG_BASE; \
- __address |= ((__devfn & 0x07) << 8); \
- __address |= __offset & 0xFF; \
- __mapaddress = 0x000A; /* 101=>config cycle, 0=>A1=A0=0 */ \
- __devicebit = (1 << (__dev + 11)); \
- \
- if ((__devicebit & 0xFF000000) != 0) { \
- /* high order bits are handled by the MAP register */ \
- __mapaddress |= (__devicebit >> 16); \
- } else { \
- /* low order bits handled directly in the address */ \
- __address |= __devicebit; \
- } \
- } else { /* bus !=0 */ \
- /* not the local bus segment so need a type 1 config cycle */ \
- /* A31-A24 are don't care (so clear to 0) */ \
- __mapaddress = 0x000B; /* 101=>config cycle, 1=>A1&A0 from PCI_CFG */ \
- __address = PCI_CONFIG_BASE; \
- __address |= ((__bus & 0xFF) << 16); /* bits 23..16 = bus number */ \
- __address |= ((__dev & 0x1F) << 11); /* bits 15..11 = device number */ \
- __address |= ((__devfn & 0x07) << 8); /* bits 10..8 = function number */ \
- __address |= __offset & 0xFF; /* bits 7..0 = register number */ \
- } \
- _V3Write16 (V3_LB_MAP1, __mapaddress); \
- __address; \
-})
-
-/* _V3OpenConfigWindow - open V3 configuration window */
-#define _V3OpenConfigWindow() { \
- /* Set up base0 to see all 512Mbytes of memory space (not */ \
- /* prefetchable), this frees up base1 for re-use by configuration*/ \
- /* memory */ \
- \
- _V3Write32 (V3_LB_BASE0, ((INTEGRATOR_PCI_BASE & 0xFFF00000) | \
- 0x90 | V3_LB_BASE_M_ENABLE)); \
- /* Set up base1 to point into configuration space, note that MAP1 */ \
- /* register is set up by pciMakeConfigAddress(). */ \
- \
- _V3Write32 (V3_LB_BASE1, ((CPU_PCI_CNFG_ADRS & 0xFFF00000) | \
- 0x40 | V3_LB_BASE_M_ENABLE)); \
-}
-
-/* _V3CloseConfigWindow - close V3 configuration window */
-#define _V3CloseConfigWindow() { \
- /* Reassign base1 for use by prefetchable PCI memory */ \
- _V3Write32 (V3_LB_BASE1, (((INTEGRATOR_PCI_BASE + 0x10000000) & 0xFFF00000) \
- | 0x84 | V3_LB_BASE_M_ENABLE)); \
- _V3Write16 (V3_LB_MAP1, \
- (((INTEGRATOR_PCI_BASE + 0x10000000) & 0xFFF00000) >> 16) | 0x0006); \
- \
- /* And shrink base0 back to a 256M window (NOTE: MAP0 already correct) */ \
- \
- _V3Write32 (V3_LB_BASE0, ((INTEGRATOR_PCI_BASE & 0xFFF00000) | \
- 0x80 | V3_LB_BASE_M_ENABLE)); \
-}
-
-static int pci_integrator_read_byte (struct pci_controller *hose, pci_dev_t dev,
- int offset, unsigned char *val)
-{
- _V3OpenConfigWindow ();
- *val = *(volatile unsigned char *) PCI_CONFIG_ADDRESS (PCI_BUS (dev),
- PCI_FUNC (dev),
- offset);
- _V3CloseConfigWindow ();
-
- return 0;
-}
-
-static int pci_integrator_read__word (struct pci_controller *hose,
- pci_dev_t dev, int offset,
- unsigned short *val)
-{
- _V3OpenConfigWindow ();
- *val = *(volatile unsigned short *) PCI_CONFIG_ADDRESS (PCI_BUS (dev),
- PCI_FUNC (dev),
- offset);
- _V3CloseConfigWindow ();
-
- return 0;
-}
-
-static int pci_integrator_read_dword (struct pci_controller *hose,
- pci_dev_t dev, int offset,
- unsigned int *val)
-{
- _V3OpenConfigWindow ();
- *val = *(volatile unsigned short *) PCI_CONFIG_ADDRESS (PCI_BUS (dev),
- PCI_FUNC (dev),
- offset);
- *val |= (*(volatile unsigned int *)
- PCI_CONFIG_ADDRESS (PCI_BUS (dev), PCI_FUNC (dev),
- (offset + 2))) << 16;
- _V3CloseConfigWindow ();
-
- return 0;
-}
-
-static int pci_integrator_write_byte (struct pci_controller *hose,
- pci_dev_t dev, int offset,
- unsigned char val)
-{
- _V3OpenConfigWindow ();
- *(volatile unsigned char *) PCI_CONFIG_ADDRESS (PCI_BUS (dev),
- PCI_FUNC (dev),
- offset) = val;
- _V3CloseConfigWindow ();
-
- return 0;
-}
-
-static int pci_integrator_write_word (struct pci_controller *hose,
- pci_dev_t dev, int offset,
- unsigned short val)
-{
- _V3OpenConfigWindow ();
- *(volatile unsigned short *) PCI_CONFIG_ADDRESS (PCI_BUS (dev),
- PCI_FUNC (dev),
- offset) = val;
- _V3CloseConfigWindow ();
-
- return 0;
-}
-
-static int pci_integrator_write_dword (struct pci_controller *hose,
- pci_dev_t dev, int offset,
- unsigned int val)
-{
- _V3OpenConfigWindow ();
- *(volatile unsigned short *) PCI_CONFIG_ADDRESS (PCI_BUS (dev),
- PCI_FUNC (dev),
- offset) = (val & 0xFFFF);
- *(volatile unsigned short *) PCI_CONFIG_ADDRESS (PCI_BUS (dev),
- PCI_FUNC (dev),
- (offset + 2)) = ((val >> 16) & 0xFFFF);
- _V3CloseConfigWindow ();
-
- return 0;
-}
-/******************************
- * PCI initialisation
- ******************************/
-
-struct pci_controller integrator_hose = {
-#ifndef CONFIG_PCI_PNP
- config_table: pci_integrator_config_table,
-#endif
-};
-
-void pci_init_board (void)
-{
- volatile int i, j;
- struct pci_controller *hose = &integrator_hose;
-
- /* setting this register will take the V3 out of reset */
-
- *(volatile unsigned int *) (INTEGRATOR_SC_PCIENABLE) = 1;
-
- /* wait a few usecs to settle the device and the PCI bus */
-
- for (i = 0; i < 100; i++)
- j = i + 1;
-
- /* Now write the Base I/O Address Word to V3_BASE + 0x6C */
-
- *(volatile unsigned short *) (V3_BASE + V3_LB_IO_BASE) =
- (unsigned short) (V3_BASE >> 16);
-
- do {
- *(volatile unsigned char *) (V3_BASE + V3_MAIL_DATA) = 0xAA;
- *(volatile unsigned char *) (V3_BASE + V3_MAIL_DATA + 4) =
- 0x55;
- } while (*(volatile unsigned char *) (V3_BASE + V3_MAIL_DATA) != 0xAA
- || *(volatile unsigned char *) (V3_BASE + V3_MAIL_DATA +
- 4) != 0x55);
-
- /* Make sure that V3 register access is not locked, if it is, unlock it */
-
- if ((*(volatile unsigned short *) (V3_BASE + V3_SYSTEM) &
- V3_SYSTEM_M_LOCK)
- == V3_SYSTEM_M_LOCK)
- *(volatile unsigned short *) (V3_BASE + V3_SYSTEM) = 0xA05F;
-
- /* Ensure that the slave accesses from PCI are disabled while we */
- /* setup windows */
-
- *(volatile unsigned short *) (V3_BASE + V3_PCI_CMD) &=
- ~(V3_COMMAND_M_MEM_EN | V3_COMMAND_M_IO_EN);
-
- /* Clear RST_OUT to 0; keep the PCI bus in reset until we've finished */
-
- *(volatile unsigned short *) (V3_BASE + V3_SYSTEM) &=
- ~V3_SYSTEM_M_RST_OUT;
-
- /* Make all accesses from PCI space retry until we're ready for them */
-
- *(volatile unsigned short *) (V3_BASE + V3_PCI_CFG) |=
- V3_PCI_CFG_M_RETRY_EN;
-
- /* Set up any V3 PCI Configuration Registers that we absolutely have to */
- /* LB_CFG controls Local Bus protocol. */
- /* Enable LocalBus byte strobes for READ accesses too. */
- /* set bit 7 BE_IMODE and bit 6 BE_OMODE */
-
- *(volatile unsigned short *) (V3_BASE + V3_LB_CFG) |= 0x0C0;
-
- /* PCI_CMD controls overall PCI operation. */
- /* Enable PCI bus master. */
-
- *(volatile unsigned short *) (V3_BASE + V3_PCI_CMD) |= 0x04;
-
- /* PCI_MAP0 controls where the PCI to CPU memory window is on Local Bus */
-
- *(volatile unsigned int *) (V3_BASE + V3_PCI_MAP0) =
- (INTEGRATOR_BOOT_ROM_BASE) | (V3_PCI_MAP_M_ADR_SIZE_512M |
- V3_PCI_MAP_M_REG_EN |
- V3_PCI_MAP_M_ENABLE);
-
- /* PCI_BASE0 is the PCI address of the start of the window */
-
- *(volatile unsigned int *) (V3_BASE + V3_PCI_BASE0) =
- INTEGRATOR_BOOT_ROM_BASE;
-
- /* PCI_MAP1 is LOCAL address of the start of the window */
-
- *(volatile unsigned int *) (V3_BASE + V3_PCI_MAP1) =
- (INTEGRATOR_HDR0_SDRAM_BASE) | (V3_PCI_MAP_M_ADR_SIZE_1024M |
- V3_PCI_MAP_M_REG_EN |
- V3_PCI_MAP_M_ENABLE);
-
- /* PCI_BASE1 is the PCI address of the start of the window */
-
- *(volatile unsigned int *) (V3_BASE + V3_PCI_BASE1) =
- INTEGRATOR_HDR0_SDRAM_BASE;
-
- /* Set up the windows from local bus memory into PCI configuration, */
- /* I/O and Memory. */
- /* PCI I/O, LB_BASE2 and LB_MAP2 are used exclusively for this. */
-
- *(volatile unsigned short *) (V3_BASE + V3_LB_BASE2) =
- ((CPU_PCI_IO_ADRS >> 24) << 8) | V3_LB_BASE_M_ENABLE;
- *(volatile unsigned short *) (V3_BASE + V3_LB_MAP2) = 0;
-
- /* PCI Configuration, use LB_BASE1/LB_MAP1. */
-
- /* PCI Memory use LB_BASE0/LB_MAP0 and LB_BASE1/LB_MAP1 */
- /* Map first 256Mbytes as non-prefetchable via BASE0/MAP0 */
- /* (INTEGRATOR_PCI_BASE == PCI_MEM_BASE) */
-
- *(volatile unsigned int *) (V3_BASE + V3_LB_BASE0) =
- INTEGRATOR_PCI_BASE | (0x80 | V3_LB_BASE_M_ENABLE);
-
- *(volatile unsigned short *) (V3_BASE + V3_LB_MAP0) =
- ((INTEGRATOR_PCI_BASE >> 20) << 0x4) | 0x0006;
-
- /* Map second 256 Mbytes as prefetchable via BASE1/MAP1 */
-
- *(volatile unsigned int *) (V3_BASE + V3_LB_BASE1) =
- INTEGRATOR_PCI_BASE | (0x84 | V3_LB_BASE_M_ENABLE);
-
- *(volatile unsigned short *) (V3_BASE + V3_LB_MAP1) =
- (((INTEGRATOR_PCI_BASE + 0x10000000) >> 20) << 4) | 0x0006;
-
- /* Allow accesses to PCI Configuration space */
- /* and set up A1, A0 for type 1 config cycles */
-
- *(volatile unsigned short *) (V3_BASE + V3_PCI_CFG) =
- ((*(volatile unsigned short *) (V3_BASE + V3_PCI_CFG)) &
- ~(V3_PCI_CFG_M_RETRY_EN | V3_PCI_CFG_M_AD_LOW1)) |
- V3_PCI_CFG_M_AD_LOW0;
-
- /* now we can allow in PCI MEMORY accesses */
-
- *(volatile unsigned short *) (V3_BASE + V3_PCI_CMD) =
- (*(volatile unsigned short *) (V3_BASE + V3_PCI_CMD)) |
- V3_COMMAND_M_MEM_EN;
-
- /* Set RST_OUT to take the PCI bus is out of reset, PCI devices can */
- /* initialise and lock the V3 system register so that no one else */
- /* can play with it */
-
- *(volatile unsigned short *) (V3_BASE + V3_SYSTEM) =
- (*(volatile unsigned short *) (V3_BASE + V3_SYSTEM)) |
- V3_SYSTEM_M_RST_OUT;
-
- *(volatile unsigned short *) (V3_BASE + V3_SYSTEM) =
- (*(volatile unsigned short *) (V3_BASE + V3_SYSTEM)) |
- V3_SYSTEM_M_LOCK;
-
- /*
- * Register the hose
- */
- hose->first_busno = 0;
- hose->last_busno = 0xff;
-
- /* System memory space */
- pci_set_region (hose->regions + 0,
- 0x00000000, 0x40000000, 0x01000000,
- PCI_REGION_MEM | PCI_REGION_MEMORY);
-
- /* PCI Memory - config space */
- pci_set_region (hose->regions + 1,
- 0x00000000, 0x62000000, 0x01000000, PCI_REGION_MEM);
-
- /* PCI V3 regs */
- pci_set_region (hose->regions + 2,
- 0x00000000, 0x61000000, 0x00080000, PCI_REGION_MEM);
-
- /* PCI I/O space */
- pci_set_region (hose->regions + 3,
- 0x00000000, 0x60000000, 0x00010000, PCI_REGION_IO);
-
- pci_set_ops (hose,
- pci_integrator_read_byte,
- pci_integrator_read__word,
- pci_integrator_read_dword,
- pci_integrator_write_byte,
- pci_integrator_write_word, pci_integrator_write_dword);
-
- hose->region_count = 4;
-
- pci_register_hose (hose);
-
- pciauto_config_init (hose);
- pciauto_config_device (hose, 0);
-
- hose->last_busno = pci_hose_scan (hose);
-}
-#endif
-
-/******************************
- Routine:
- Description:
-******************************/
-void flash__init (void)
-{
-}
-/*************************************************************
- Routine:ether__init
- Description: take the Ethernet controller out of reset and wait
- for the EEPROM load to complete.
-*************************************************************/
-void ether__init (void)
-{
-}
-
-/******************************
- Routine:
- Description:
-******************************/
-int dram_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
-
-#ifdef CONFIG_CM_SPD_DETECT
- {
-extern void dram_query(void);
- unsigned long cm_reg_sdram;
- unsigned long sdram_shift;
-
- dram_query(); /* Assembler accesses to CM registers */
- /* Queries the SPD values */
-
- /* Obtain the SDRAM size from the CM SDRAM register */
-
- cm_reg_sdram = *(volatile ulong *)(CM_BASE + OS_SDRAM);
- /* Register SDRAM size
- *
- * 0xXXXXXXbbb000bb 16 MB
- * 0xXXXXXXbbb001bb 32 MB
- * 0xXXXXXXbbb010bb 64 MB
- * 0xXXXXXXbbb011bb 128 MB
- * 0xXXXXXXbbb100bb 256 MB
- *
- */
- sdram_shift = ((cm_reg_sdram & 0x0000001C)/4)%4;
- gd->bd->bi_dram[0].size = 0x01000000 << sdram_shift;
-
- }
-#endif /* CM_SPD_DETECT */
-
- return 0;
-}
-
-/* The Integrator/AP timer1 is clocked at 24MHz
- * can be divided by 16 or 256
- * and is a 16-bit counter
- */
-/* U-Boot expects a 32 bit timer running at CFG_HZ*/
-static ulong timestamp; /* U-Boot ticks since startup */
-static ulong total_count = 0; /* Total timer count */
-static ulong lastdec; /* Timer reading at last call */
-static ulong div_clock = 256; /* Divisor applied to the timer clock */
-static ulong div_timer = 1; /* Divisor to convert timer reading
- * change to U-Boot ticks
- */
-/* CFG_HZ = CFG_HZ_CLOCK/(div_clock * div_timer) */
-
-#define TIMER_LOAD_VAL 0x0000FFFFL
-#define READ_TIMER ((*(volatile ulong *)(CFG_TIMERBASE+4)) & 0x0000FFFFL)
-
-/* all function return values in U-Boot ticks i.e. (1/CFG_HZ) sec
- * - unless otherwise stated
- */
-
-/* starts a counter
- * - the Integrator/AP timer issues an interrupt
- * each time it reaches zero
- */
-int interrupt_init (void)
-{
- /* Load timer with initial value */
- *(volatile ulong *)(CFG_TIMERBASE + 0) = TIMER_LOAD_VAL;
- /* Set timer to be
- * enabled 1
- * free-running 0
- * XX 00
- * divider 256 10
- * XX 00
- */
- *(volatile ulong *)(CFG_TIMERBASE + 8) = 0x00000088;
- total_count = 0;
- /* init the timestamp and lastdec value */
- reset_timer_masked();
-
- div_timer = CFG_HZ_CLOCK / CFG_HZ;
- div_timer /= div_clock;
-
- return (0);
-}
-
-/*
- * timer without interrupts
- */
-void reset_timer (void)
-{
- reset_timer_masked ();
-}
-
-ulong get_timer (ulong base_ticks)
-{
- return get_timer_masked () - base_ticks;
-}
-
-void set_timer (ulong ticks)
-{
- timestamp = ticks;
- total_count = ticks * div_timer;
- reset_timer_masked();
-}
-
-/* delay x useconds */
-void udelay (unsigned long usec)
-{
- ulong tmo, tmp;
-
- /* Convert to U-Boot ticks */
- tmo = usec * CFG_HZ;
- tmo /= (1000000L);
-
- tmp = get_timer_masked(); /* get current timestamp */
- tmo += tmp; /* wake up timestamp */
-
- while (get_timer_masked () < tmo) { /* loop till event */
- /*NOP*/;
- }
-}
-
-void reset_timer_masked (void)
-{
- /* reset time */
- lastdec = READ_TIMER; /* capture current decrementer value */
- timestamp = 0; /* start "advancing" time stamp from 0 */
-}
-
-/* converts the timer reading to U-Boot ticks */
-/* the timestamp is the number of ticks since reset */
-/* This routine does not detect wraps unless called regularly
- ASSUMES a call at least every 16 seconds to detect every reload */
-ulong get_timer_masked (void)
-{
- ulong now = READ_TIMER; /* current count */
-
- if (now > lastdec) {
- /* Must have wrapped */
- total_count += lastdec + TIMER_LOAD_VAL + 1 - now;
- } else {
- total_count += lastdec - now;
- }
- lastdec = now;
- timestamp = total_count/div_timer;
-
- return timestamp;
-}
-
-/* waits specified delay value and resets timestamp */
-void udelay_masked (unsigned long usec)
-{
- udelay(usec);
-}
-
-/*
- * This function is derived from PowerPC code (read timebase as long long).
- * On ARM it just returns the timer value.
- */
-unsigned long long get_ticks(void)
-{
- return get_timer(0);
-}
-
-/*
- * Return the timebase clock frequency
- * i.e. how often the timer decrements
- */
-ulong get_tbclk (void)
-{
- return CFG_HZ_CLOCK/div_clock;
-}
diff --git a/board/integratorap/lowlevel_init.S b/board/integratorap/lowlevel_init.S
deleted file mode 100644
index ab9589c95c..0000000000
--- a/board/integratorap/lowlevel_init.S
+++ /dev/null
@@ -1,213 +0,0 @@
-/*
- * Board specific setup info
- *
- * (C) Copyright 2004, ARM Ltd.
- * Philippe Robin, <philippe.robin@arm.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <config.h>
-#include <version.h>
-
- /* Reset using CM control register */
-.global reset_cpu
-reset_cpu:
- mov r0, #CM_BASE
- ldr r1,[r0,#OS_CTRL]
- orr r1,r1,#CMMASK_RESET
- str r1,[r0,#OS_CTRL]
-
-reset_failed:
- b reset_failed
-
-/* Set up the platform, once the cpu has been initialized */
-.globl lowlevel_init
-lowlevel_init:
- /* If U-Boot has been run after the ARM boot monitor
- * then all the necessary actions have been done
- * otherwise we are running from user flash mapped to 0x00000000
- * --- DO NOT REMAP BEFORE THE CODE HAS BEEN RELOCATED --
- * Changes to the (possibly soft) reset defaults of the processor
- * itself should be performed in cpu/arm<>/start.S
- * This function affects only the core module or board settings
- */
-
-#ifdef CONFIG_CM_INIT
- /* CM has an initialization register
- * - bits in it are wired into test-chip pins to force
- * reset defaults
- * - may need to change its contents for U-Boot
- */
-
- /* set the desired CM specific value */
- mov r2,#CMMASK_LOWVEC /* Vectors at 0x00000000 for all */
-
-#if defined (CONFIG_CM10200E) || defined (CONFIG_CM10220E)
- orr r2,r2,#CMMASK_INIT_102
-#else
-
-#if !defined (CONFIG_CM920T) && !defined (CONFIG_CM920T_ETM) && \
- !defined (CONFIG_CM940T)
-
-#ifdef CONFIG_CM_MULTIPLE_SSRAM
- /* set simple mapping */
- and r2,r2,#CMMASK_MAP_SIMPLE
-#endif /* #ifdef CONFIG_CM_MULTIPLE_SSRAM */
-
-#ifdef CONFIG_CM_TCRAM
- /* disable TCRAM */
- and r2,r2,#CMMASK_TCRAM_DISABLE
-#endif /* #ifdef CONFIG_CM_TCRAM */
-
-#if defined (CONFIG_CM926EJ_S) || defined (CONFIG_CM1026EJ_S) || \
- defined (CONFIG_CM1136JF_S)
-
- and r2,r2,#CMMASK_LE
-
-#endif /* cpu with little endian initialization */
-
- orr r2,r2,#CMMASK_CMxx6_COMMON
-
-#endif /* CMxx6 code */
-
-#endif /* ARM102xxE value */
-
- /* read CM_INIT */
- mov r0, #CM_BASE
- ldr r1, [r0, #OS_INIT]
- /* check against desired bit setting */
- and r3,r1,r2
- cmp r3,r2
- beq init_reg_OK
-
- /* lock for change */
- mov r3, #CMVAL_LOCK1
- add r3,r3,#CMVAL_LOCK2
- str r3, [r0, #OS_LOCK]
- /* set desired value */
- orr r1,r1,r2
- /* write & relock CM_INIT */
- str r1, [r0, #OS_INIT]
- mov r1, #CMVAL_UNLOCK
- str r1, [r0, #OS_LOCK]
-
- /* soft reset so new values used */
- b reset_cpu
-
-init_reg_OK:
-
-#endif /* CONFIG_CM_INIT */
-
- mov pc, lr
-
-#ifdef CONFIG_CM_SPD_DETECT
- /* Fast memory is available for the DRAM data
- * - ensure it has been transferred, then summarize the data
- * into a CM register
- */
-.globl dram_query
-dram_query:
- stmfd r13!,{r4-r6,lr}
- /* set up SDRAM info */
- /* - based on example code from the CM User Guide */
- mov r0, #CM_BASE
-
-readspdbit:
- ldr r1, [r0, #OS_SDRAM] /* read the SDRAM register */
- and r1, r1, #0x20 /* mask SPD bit (5) */
- cmp r1, #0x20 /* test if set */
- bne readspdbit
-
-setupsdram:
- add r0, r0, #OS_SPD /* address the copy of the SDP data */
- ldrb r1, [r0, #3] /* number of row address lines */
- ldrb r2, [r0, #4] /* number of column address lines */
- ldrb r3, [r0, #5] /* number of banks */
- ldrb r4, [r0, #31] /* module bank density */
- mul r5, r4, r3 /* size of SDRAM (MB divided by 4) */
- mov r5, r5, ASL#2 /* size in MB */
- mov r0, #CM_BASE /* reload for later code */
- cmp r5, #0x10 /* is it 16MB? */
- bne not16
- mov r6, #0x2 /* store size and CAS latency of 2 */
- b writesize
-
-not16:
- cmp r5, #0x20 /* is it 32MB? */
- bne not32
- mov r6, #0x6
- b writesize
-
-not32:
- cmp r5, #0x40 /* is it 64MB? */
- bne not64
- mov r6, #0xa
- b writesize
-
-not64:
- cmp r5, #0x80 /* is it 128MB? */
- bne not128
- mov r6, #0xe
- b writesize
-
-not128:
- /* if it is none of these sizes then it is either 256MB, or
- * there is no SDRAM fitted so default to 256MB
- */
- mov r6, #0x12
-
-writesize:
- mov r1, r1, ASL#8 /* row addr lines from SDRAM reg */
- orr r2, r1, r2, ASL#12 /* OR in column address lines */
- orr r3, r2, r3, ASL#16 /* OR in number of banks */
- orr r6, r6, r3 /* OR in size and CAS latency */
- str r6, [r0, #OS_SDRAM] /* store SDRAM parameters */
-
-#endif /* #ifdef CONFIG_CM_SPD_DETECT */
-
- ldmfd r13!,{r4-r6,pc} /* back to caller */
-
-#ifdef CONFIG_CM_REMAP
- /* CM remap bit is operational
- * - use it to map writeable memory at 0x00000000, in place of flash
- */
-.globl cm_remap
-cm_remap:
- stmfd r13!,{r4-r10,lr}
-
- mov r0, #CM_BASE
- ldr r1, [r0, #OS_CTRL]
- orr r1, r1, #CMMASK_REMAP /* set remap and led bits */
- str r1, [r0, #OS_CTRL]
-
- /* Now 0x00000000 is writeable, replace the vectors */
- ldr r0, =_start /* r0 <- start of vectors */
- ldr r2, =_armboot_start /* r2 <- past vectors */
- sub r1,r1,r1 /* destination 0x00000000 */
-
-copy_vec:
- ldmia r0!, {r3-r10} /* copy from source address [r0] */
- stmia r1!, {r3-r10} /* copy to target address [r1] */
- cmp r0, r2 /* until source end address [r2] */
- ble copy_vec
-
- ldmfd r13!,{r4-r10,pc} /* back to caller */
-
-#endif /* #ifdef CONFIG_CM_REMAP */
diff --git a/board/integratorap/memsetup.S b/board/integratorap/memsetup.S
deleted file mode 100644
index dfdc7848fd..0000000000
--- a/board/integratorap/memsetup.S
+++ /dev/null
@@ -1,29 +0,0 @@
-/*
- * Memory setup for integratorAP
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-/*
- * Memory setup
- * - the reset defaults are assumed sufficient
- */
-
-.globl memsetup
-memsetup:
- mov pc,lr
diff --git a/board/integratorap/split_by_variant.sh b/board/integratorap/split_by_variant.sh
deleted file mode 100755
index 9f71babf35..0000000000
--- a/board/integratorap/split_by_variant.sh
+++ /dev/null
@@ -1,116 +0,0 @@
-#!/bin/sh
-# ---------------------------------------------------------
-# Set the platform defines
-# ---------------------------------------------------------
-echo -n "/* Integrator configuration implied " > tmp.fil
-echo " by Makefile target */" >> tmp.fil
-echo -n "#define CONFIG_INTEGRATOR" >> tmp.fil
-echo " /* Integrator board */" >> tmp.fil
-echo -n "#define CONFIG_ARCH_INTEGRATOR" >> tmp.fil
-echo " 1 /* Integrator/AP */" >> tmp.fil
-# ---------------------------------------------------------
-# Set the core module defines according to Core Module
-# ---------------------------------------------------------
-cpu="arm_intcm"
-variant="unknown core module"
-
-if [ "$1" == "" ]
-then
- echo "$0:: No parameters - using arm_intcm"
-else
- case "$1" in
- ap7_config)
- cpu="arm_intcm"
- variant="unported core module CM7TDMI"
- ;;
-
- ap966)
- cpu="arm_intcm"
- variant="unported core module CM966E-S"
- ;;
-
- ap922_config)
- cpu="arm_intcm"
- variant="unported core module CM922T"
- ;;
-
- integratorap_config | \
- ap_config)
- cpu="arm_intcm"
- variant="unspecified core module"
- ;;
-
- ap720t_config)
- cpu="arm720t"
- echo -n "#define CONFIG_CM720T" >> tmp.fil
- echo " 1 /* CPU core is ARM720T */ " >> tmp.fil
- variant="Core module CM720T"
- ;;
-
- ap922_XA10_config)
- cpu="arm_intcm"
- variant="unported core module CM922T_XA10"
- echo -n "#define CONFIG_CM922T_XA10" >> tmp.fil
- echo " 1 /* CPU core is ARM922T_XA10 */" >> tmp.fil
- ;;
-
- ap920t_config)
- cpu="arm920t"
- variant="Core module CM920T"
- echo -n "#define CONFIG_CM920T" >> tmp.fil
- echo " 1 /* CPU core is ARM920T */" >> tmp.fil
- ;;
-
- ap926ejs_config)
- cpu="arm926ejs"
- variant="Core module CM926EJ-S"
- echo -n "#define CONFIG_CM926EJ_S" >> tmp.fil
- echo " 1 /* CPU core is ARM926EJ-S */ " >> tmp.fil
- ;;
-
- ap946es_config)
- cpu="arm946es"
- variant="Core module CM946E-S"
- echo -n "#define CONFIG_CM946E_S" >> tmp.fil
- echo " 1 /* CPU core is ARM946E-S */ " >> tmp.fil
- ;;
-
- *)
- echo "$0:: Unknown core module"
- variant="unknown core module"
- cpu="arm_intcm"
- ;;
-
- esac
-fi
-
-if [ "$cpu" == "arm_intcm" ]
-then
- echo "/* Core module undefined/not ported */" >> tmp.fil
- echo "#define CONFIG_ARM_INTCM 1" >> tmp.fil
- echo -n "#undef CONFIG_CM_MULTIPLE_SSRAM" >> tmp.fil
- echo -n " /* CM may not have " >> tmp.fil
- echo "multiple SSRAM mapping */" >> tmp.fil
- echo -n "#undef CONFIG_CM_SPD_DETECT " >> tmp.fil
- echo -n " /* CM may not support SPD " >> tmp.fil
- echo "query */" >> tmp.fil
- echo -n "#undef CONFIG_CM_REMAP " >> tmp.fil
- echo -n " /* CM may not support " >> tmp.fil
- echo "remapping */" >> tmp.fil
- echo -n "#undef CONFIG_CM_INIT " >> tmp.fil
- echo -n " /* CM may not have " >> tmp.fil
- echo "initialization reg */" >> tmp.fil
- echo -n "#undef CONFIG_CM_TCRAM " >> tmp.fil
- echo " /* CM may not have TCRAM */" >> tmp.fil
-fi
-mv tmp.fil ./include/config.h
-# ---------------------------------------------------------
-# Ensure correct core object loaded first in U-Boot image
-# ---------------------------------------------------------
-sed -r 's/CPU_FILE/cpu\/'$cpu'\/start.o/; s/#.*//' board/integratorap/u-boot.lds.template > board/integratorap/u-boot.lds
-# ---------------------------------------------------------
-# Complete the configuration
-# ---------------------------------------------------------
-./mkconfig -a integratorap arm $cpu integratorap;
-echo "Variant:: $variant with core $cpu"
-
diff --git a/board/integratorap/u-boot.lds.template b/board/integratorap/u-boot.lds.template
deleted file mode 100644
index 0ec8087258..0000000000
--- a/board/integratorap/u-boot.lds.template
+++ /dev/null
@@ -1,53 +0,0 @@
-/*
- * (C) Copyright 2002
- * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-# Template used during configuration to emsure the core module processor code,
-# from CPU_FILE, is placed at the start of the image */
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-ENTRY(_start)
-SECTIONS
-{
- . = 0x00000000;
- . = ALIGN(4);
- .text :
- {
- CPU_FILE (.text)
- *(.text)
- }
- .rodata : { *(.rodata) }
- . = ALIGN(4);
- .data : { *(.data) }
- . = ALIGN(4);
- .got : { *(.got) }
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = ALIGN(4);
- __bss_start = .;
- .bss : { *(.bss) }
- _end = .;
-}
diff --git a/board/integratorcp/Makefile b/board/integratorcp/Makefile
deleted file mode 100644
index 3d589fcd5a..0000000000
--- a/board/integratorcp/Makefile
+++ /dev/null
@@ -1,47 +0,0 @@
-#
-# (C) Copyright 2000-2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := integratorcp.o flash.o
-SOBJS := lowlevel_init.o memsetup.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $^
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/integratorcp/config.mk b/board/integratorcp/config.mk
deleted file mode 100644
index 25b79b3e79..0000000000
--- a/board/integratorcp/config.mk
+++ /dev/null
@@ -1,5 +0,0 @@
-#
-# image should be loaded at 0x01000000
-#
-
-TEXT_BASE = 0x01000000
diff --git a/board/integratorcp/flash.c b/board/integratorcp/flash.c
deleted file mode 100644
index 4d6eff0bf1..0000000000
--- a/board/integratorcp/flash.c
+++ /dev/null
@@ -1,564 +0,0 @@
-/*
- * (C) Copyright 2004
- * Xiaogeng (Shawn) Jin, Agilent Technologies, xiaogeng_jin@agilent.com
- *
- * (C) Copyright 2001
- * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
- *
- * (C) Copyright 2001-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2003
- * Texas Instruments, <www.ti.com>
- * Kshitij Gupta <Kshitij@ti.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <linux/byteorder/swab.h>
-
-#define DEBUG
-
-#define PHYS_FLASH_SECT_SIZE 0x00040000 /* 256 KB sectors (x2) */
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/* Board support for 1 or 2 flash devices */
-#define FLASH_PORT_WIDTH32
-#undef FLASH_PORT_WIDTH16
-
-#ifdef FLASH_PORT_WIDTH16
-#define FLASH_PORT_WIDTH ushort
-#define FLASH_PORT_WIDTHV vu_short
-#define SWAP(x) __swab16(x)
-#else
-#define FLASH_PORT_WIDTH ulong
-#define FLASH_PORT_WIDTHV vu_long
-#define SWAP(x) __swab32(x)
-#endif
-
-#define FPW FLASH_PORT_WIDTH
-#define FPWV FLASH_PORT_WIDTHV
-
-#define mb() __asm__ __volatile__ ("" : : : "memory")
-
-
-/* Flash Organization Structure */
-typedef struct OrgDef {
- unsigned int sector_number;
- unsigned int sector_size;
-} OrgDef;
-
-
-/* Flash Organizations */
-OrgDef OrgIntel_28F256L18T[] = {
- {4, 32 * 1024}, /* 4 * 32kBytes sectors */
- {255, 128 * 1024}, /* 255 * 128kBytes sectors */
-};
-
-/* CP control register base address */
-#define CPCR_BASE 0xCB000000
-#define CPCR_EXTRABANK 0x8
-#define CPCR_FLASHSIZE 0x4
-#define CPCR_FLWREN 0x2
-#define CPCR_FLVPPEN 0x1
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-unsigned long flash_init (void);
-static ulong flash_get_size (FPW * addr, flash_info_t * info);
-static int write_data (flash_info_t * info, ulong dest, FPW data);
-static void flash_get_offsets (ulong base, flash_info_t * info);
-void inline spin_wheel (void);
-void flash_print_info (flash_info_t * info);
-void flash_unprotect_sectors (FPWV * addr);
-int flash_erase (flash_info_t * info, int s_first, int s_last);
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt);
-
-/*-----------------------------------------------------------------------
- */
-unsigned long flash_init (void)
-{
- int i, nbanks;
- ulong size = 0;
- vu_long *cpcr = (vu_long *)CPCR_BASE;
-
- /* Check if there is an extra bank of flash */
- if (cpcr[1] & CPCR_EXTRABANK)
- nbanks = 2;
- else
- nbanks = 1;
-
- if (nbanks > CFG_MAX_FLASH_BANKS)
- nbanks = CFG_MAX_FLASH_BANKS;
-
- /* Enable flash write */
- cpcr[1] |= 3;
-
- for (i = 0; i < nbanks; i++) {
- flash_get_size ((FPW *)(CFG_FLASH_BASE + size), &flash_info[i]);
- flash_get_offsets (CFG_FLASH_BASE + size, &flash_info[i]);
- size += flash_info[i].size;
- }
-
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
- /* monitor protection */
- flash_protect (FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE + monitor_flash_len - 1, &flash_info[0]);
-#endif
-
-#ifdef CFG_ENV_IS_IN_FLASH
- /* ENV protection ON */
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1,
- &flash_info[0]);
-#endif
-
- /* Protect SIB (0x24800000) and bootMonitor (0x24c00000) */
- flash_protect (FLAG_PROTECT_SET,
- flash_info[0].start[62],
- flash_info[0].start[63] + PHYS_FLASH_SECT_SIZE - 1,
- &flash_info[0]);
-
- return size;
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_get_offsets (ulong base, flash_info_t * info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- return;
- }
-
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
- for (i = 0; i < info->sector_count; i++) {
- info->start[i] = base + (i * PHYS_FLASH_SECT_SIZE);
- info->protect[i] = 0;
- }
- }
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t * info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_INTEL:
- printf ("INTEL ");
- break;
- default:
- printf ("Unknown Vendor ");
- break;
- }
-
- /* Integrator CP board uses 28F640J3C or 28F128J3C parts,
- * which have the same device id numbers as 28F640J3A or
- * 28F128J3A
- */
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_28F256L18T:
- printf ("FLASH 28F256L18T\n");
- break;
- case FLASH_28F640J3A:
- printf ("FLASH 28F640J3C\n");
- break;
- case FLASH_28F128J3A:
- printf ("FLASH 28F128J3C\n");
- break;
- default:
- printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i], info->protect[i] ? " (RO)" : " ");
- }
- printf ("\n");
- return;
-}
-
-/*
- * The following code cannot be run from FLASH!
- */
-static ulong flash_get_size (FPW * addr, flash_info_t * info)
-{
- volatile FPW value;
- vu_long *cpcr = (vu_long *)CPCR_BASE;
- int nsects;
-
- /* Check the flash size */
- if (cpcr[1] & CPCR_FLASHSIZE)
- nsects = 128;
- else
- nsects = 64;
-
- if (nsects > CFG_MAX_FLASH_SECT)
- nsects = CFG_MAX_FLASH_SECT;
-
- /* Write auto select command: read Manufacturer ID */
- addr[0x5555] = (FPW) 0x00AA00AA;
- addr[0x2AAA] = (FPW) 0x00550055;
- addr[0x5555] = (FPW) 0x00900090;
-
- mb ();
- value = addr[0];
-
- switch (value) {
-
- case (FPW) INTEL_MANUFACT:
- info->flash_id = FLASH_MAN_INTEL;
- break;
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
- return (0); /* no or unknown flash */
- }
-
- mb ();
- value = addr[1]; /* device ID */
- switch (value) {
-
- case (FPW) (INTEL_ID_28F256L18T):
- info->flash_id += FLASH_28F256L18T;
- info->sector_count = 259;
- info->size = 0x02000000;
- break; /* => 32 MB */
-
- case (FPW) (INTEL_ID_28F640J3A):
- info->flash_id += FLASH_28F640J3A;
- info->sector_count = nsects;
- info->size = nsects * PHYS_FLASH_SECT_SIZE;
- break;
-
- case (FPW) (INTEL_ID_28F128J3A):
- info->flash_id += FLASH_28F128J3A;
- info->sector_count = nsects;
- info->size = nsects * PHYS_FLASH_SECT_SIZE;
- break;
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- break;
- }
-
- if (info->sector_count > CFG_MAX_FLASH_SECT) {
- printf ("** ERROR: sector count %d > max (%d) **\n",
- info->sector_count, CFG_MAX_FLASH_SECT);
- info->sector_count = CFG_MAX_FLASH_SECT;
- }
-
- addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
-
- return (info->size);
-}
-
-
-/* unprotects a sector for write and erase
- * on some intel parts, this unprotects the entire chip, but it
- * wont hurt to call this additional times per sector...
- */
-void flash_unprotect_sectors (FPWV * addr)
-{
- FPW status;
-
- *addr = (FPW) 0x00500050; /* clear status register */
-
- /* this sends the clear lock bit command */
- *addr = (FPW) 0x00600060;
- *addr = (FPW) 0x00D000D0;
-
- reset_timer_masked();
- while (((status = *addr) & (FPW)0x00800080) != 0x00800080) {
- if (get_timer_masked() > CFG_FLASH_ERASE_TOUT) {
- printf("Timeout");
- break;
- }
- }
-
- *addr = (FPW) 0x00FF00FF;
-}
-
-
-/*-----------------------------------------------------------------------
- */
-int flash_erase (flash_info_t * info, int s_first, int s_last)
-{
- int flag, prot, sect;
- ulong type;
- int rcode = 0;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- type = (info->flash_id & FLASH_VENDMASK);
- if ((type != FLASH_MAN_INTEL)) {
- printf ("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- return 1;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- FPWV *addr = (FPWV *) (info->start[sect]);
- FPW status;
-
- printf ("Erasing sector %2d ... ", sect);
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
-
- /* flash_unprotect_sectors (addr); */
-
- /* arm simple, non interrupt dependent timer */
- reset_timer_masked ();
-
- *addr = (FPW) 0x00500050; /* clear status register */
- *addr = (FPW) 0x00200020; /* erase setup */
- *addr = (FPW) 0x00D000D0; /* erase confirm */
- mb();
-
- udelay(1000); /* Let's wait 1 ms */
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
- if (get_timer_masked () > CFG_FLASH_ERASE_TOUT) {
- *addr = (FPW)0x00700070;
- status = *addr;
- if ((status & (FPW) 0x00400040) == (FPW) 0x00400040) {
- /* erase suspended? Resume it */
- reset_timer_masked();
- *addr = (FPW) 0x00D000D0;
- } else {
-#ifdef DEBUG
- printf ("Timeout,0x%08x\n", status);
-#else
- printf("Timeout\n");
-#endif
-
- *addr = (FPW) 0x00500050;
- *addr = (FPW) 0x00FF00FF; /* reset to read mode */
- rcode = 1;
- break;
- }
- }
- }
-
- *addr = (FPW) 0x00FF00FF; /* resest to read mode */
- printf (" done\n");
- }
- }
-
- return rcode;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- * 4 - Flash not identified
- */
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- ulong cp, wp;
- FPW data;
- int count, i, l, rc, port_width;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- return 4;
- }
-/* get lower word aligned address */
-#ifdef FLASH_PORT_WIDTH16
- wp = (addr & ~1);
- port_width = 2;
-#else
- wp = (addr & ~3);
- port_width = 4;
-#endif
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i = 0, cp = wp; i < l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
- for (; i < port_width && cnt > 0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt == 0 && i < port_width; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
-
- if ((rc = write_data (info, wp, SWAP (data))) != 0) {
- return (rc);
- }
- wp += port_width;
- }
-
- /*
- * handle word aligned part
- */
- count = 0;
- while (cnt >= port_width) {
- data = 0;
- for (i = 0; i < port_width; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_data (info, wp, SWAP (data))) != 0) {
- return (rc);
- }
- wp += port_width;
- cnt -= port_width;
- if (count++ > 0x800) {
- spin_wheel ();
- count = 0;
- }
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i < port_width; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
-
- return (write_data (info, wp, SWAP (data)));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word or halfword to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_data (flash_info_t * info, ulong dest, FPW data)
-{
- FPWV *addr = (FPWV *) dest;
- ulong status;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*addr & data) != data) {
- printf ("not erased at %08lx (%x)\n", (ulong) addr, *addr);
- return (2);
- }
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
-
- /* flash_unprotect_sectors (addr); */
-
- *addr = (FPW) 0x00400040; /* write setup */
- *addr = data;
-
- mb();
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* arm simple, non interrupt dependent timer */
- reset_timer_masked ();
-
- /* wait while polling the status register */
- while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
- if (get_timer_masked () > CFG_FLASH_WRITE_TOUT) {
-#ifdef DEBUG
- *addr = (FPW) 0x00700070;
- status = *addr;
- printf("## status=0x%08x, addr=0x%08x\n", status, addr);
-#endif
- *addr = (FPW) 0x00500050; /* clear status register cmd */
- *addr = (FPW) 0x00FF00FF; /* restore read mode */
- return (1);
- }
- }
-
- *addr = (FPW) 0x00FF00FF; /* restore read mode */
- return (0);
-}
-
-void inline spin_wheel (void)
-{
- static int p = 0;
- static char w[] = "\\/-";
-
- printf ("\010%c", w[p]);
- (++p == 3) ? (p = 0) : 0;
-}
diff --git a/board/integratorcp/integratorcp.c b/board/integratorcp/integratorcp.c
deleted file mode 100644
index 216876b469..0000000000
--- a/board/integratorcp/integratorcp.c
+++ /dev/null
@@ -1,276 +0,0 @@
-/*
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * (C) Copyright 2002
- * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
- *
- * (C) Copyright 2003
- * Texas Instruments, <www.ti.com>
- * Kshitij Gupta <Kshitij@ti.com>
- *
- * (C) Copyright 2004
- * ARM Ltd.
- * Philippe Robin, <philippe.robin@arm.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-
-void flash__init (void);
-void ether__init (void);
-void peripheral_power_enable (void);
-
-#if defined(CONFIG_SHOW_BOOT_PROGRESS)
-void show_boot_progress(int progress)
-{
- printf("Boot reached stage %d\n", progress);
-}
-#endif
-
-#define COMP_MODE_ENABLE ((unsigned int)0x0000EAEF)
-
-/*
- * Miscellaneous platform dependent initialisations
- */
-
-int board_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- /* arch number of Integrator Board */
- gd->bd->bi_arch_number = MACH_TYPE_CINTEGRATOR;
-
- /* adress of boot parameters */
- gd->bd->bi_boot_params = 0x00000100;
-
- gd->flags = 0;
-
-#ifdef CONFIG_CM_REMAP
-extern void cm_remap(void);
- cm_remap(); /* remaps writeable memory to 0x00000000 */
-#endif
-
- icache_enable ();
-
- flash__init ();
- ether__init ();
- return 0;
-}
-
-
-int misc_init_r (void)
-{
- setenv("verify", "n");
- return (0);
-}
-
-/******************************
- Routine:
- Description:
-******************************/
-void flash__init (void)
-{
-}
-/*************************************************************
- Routine:ether__init
- Description: take the Ethernet controller out of reset and wait
- for the EEPROM load to complete.
-*************************************************************/
-void ether__init (void)
-{
-}
-
-/******************************
- Routine:
- Description:
-******************************/
-int dram_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
-
-#ifdef CONFIG_CM_SPD_DETECT
- {
-extern void dram_query(void);
- unsigned long cm_reg_sdram;
- unsigned long sdram_shift;
-
- dram_query(); /* Assembler accesses to CM registers */
- /* Queries the SPD values */
-
- /* Obtain the SDRAM size from the CM SDRAM register */
-
- cm_reg_sdram = *(volatile ulong *)(CM_BASE + OS_SDRAM);
- /* Register SDRAM size
- *
- * 0xXXXXXXbbb000bb 16 MB
- * 0xXXXXXXbbb001bb 32 MB
- * 0xXXXXXXbbb010bb 64 MB
- * 0xXXXXXXbbb011bb 128 MB
- * 0xXXXXXXbbb100bb 256 MB
- *
- */
- sdram_shift = ((cm_reg_sdram & 0x0000001C)/4)%4;
- gd->bd->bi_dram[0].size = 0x01000000 << sdram_shift;
-
- }
-#endif /* CM_SPD_DETECT */
-
- return 0;
-}
-
-/* The Integrator/CP timer1 is clocked at 1MHz
- * can be divided by 16 or 256
- * and can be set up as a 32-bit timer
- */
-/* U-Boot expects a 32 bit timer, running at CFG_HZ */
-/* Keep total timer count to avoid losing decrements < div_timer */
-static unsigned long long total_count = 0;
-static unsigned long long lastdec; /* Timer reading at last call */
-static unsigned long long div_clock = 1; /* Divisor applied to timer clock */
-static unsigned long long div_timer = 1; /* Divisor to convert timer reading
- * change to U-Boot ticks
- */
-/* CFG_HZ = CFG_HZ_CLOCK/(div_clock * div_timer) */
-static ulong timestamp; /* U-Boot ticks since startup */
-
-#define TIMER_LOAD_VAL ((ulong)0xFFFFFFFF)
-#define READ_TIMER (*(volatile ulong *)(CFG_TIMERBASE+4))
-
-/* all function return values in U-Boot ticks i.e. (1/CFG_HZ) sec
- * - unless otherwise stated
- */
-
-/* starts up a counter
- * - the Integrator/CP timer can be set up to issue an interrupt */
-int interrupt_init (void)
-{
- /* Load timer with initial value */
- *(volatile ulong *)(CFG_TIMERBASE + 0) = TIMER_LOAD_VAL;
- /* Set timer to be
- * enabled 1
- * periodic 1
- * no interrupts 0
- * X 0
- * divider 1 00 == less rounding error
- * 32 bit 1
- * wrapping 0
- */
- *(volatile ulong *)(CFG_TIMERBASE + 8) = 0x000000C2;
- /* init the timestamp */
- total_count = 0ULL;
- reset_timer_masked();
-
- div_timer = (unsigned long long)(CFG_HZ_CLOCK / CFG_HZ);
- div_timer /= div_clock;
-
- return (0);
-}
-
-/*
- * timer without interrupts
- */
-void reset_timer (void)
-{
- reset_timer_masked ();
-}
-
-ulong get_timer (ulong base_ticks)
-{
- return get_timer_masked () - base_ticks;
-}
-
-void set_timer (ulong ticks)
-{
- timestamp = ticks;
- total_count = (unsigned long long)ticks * div_timer;
-}
-
-/* delay usec useconds */
-void udelay (unsigned long usec)
-{
- ulong tmo, tmp;
-
- /* Convert to U-Boot ticks */
- tmo = usec * CFG_HZ;
- tmo /= (1000000L);
-
- tmp = get_timer_masked(); /* get current timestamp */
- tmo += tmp; /* form target timestamp */
-
- while (get_timer_masked () < tmo) {/* loop till event */
- /*NOP*/;
- }
-}
-
-void reset_timer_masked (void)
-{
- /* capure current decrementer value */
- lastdec = (unsigned long long)READ_TIMER;
- /* start "advancing" time stamp from 0 */
- timestamp = 0L;
-}
-
-/* converts the timer reading to U-Boot ticks */
-/* the timestamp is the number of ticks since reset */
-ulong get_timer_masked (void)
-{
- /* get current count */
- unsigned long long now = (unsigned long long)READ_TIMER;
-
- if(now > lastdec) {
- /* Must have wrapped */
- total_count += lastdec + TIMER_LOAD_VAL + 1 - now;
- } else {
- total_count += lastdec - now;
- }
- lastdec = now;
- timestamp = (ulong)(total_count/div_timer);
-
- return timestamp;
-}
-
-/* waits specified delay value and resets timestamp */
-void udelay_masked (unsigned long usec)
-{
- udelay(usec);
-}
-
-/*
- * This function is derived from PowerPC code (read timebase as long long).
- * On ARM it just returns the timer value.
- */
-unsigned long long get_ticks(void)
-{
- return (unsigned long long)get_timer(0);
-}
-
-/*
- * Return the timebase clock frequency
- * i.e. how often the timer decrements
- */
-ulong get_tbclk (void)
-{
- return (ulong)(((unsigned long long)CFG_HZ_CLOCK)/div_clock);
-}
diff --git a/board/integratorcp/lowlevel_init.S b/board/integratorcp/lowlevel_init.S
deleted file mode 100644
index 18f7d2eaeb..0000000000
--- a/board/integratorcp/lowlevel_init.S
+++ /dev/null
@@ -1,214 +0,0 @@
-/*
- * Board specific setup info
- *
- * (C) Copyright 2003, ARM Ltd.
- * Philippe Robin, <philippe.robin@arm.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <config.h>
-#include <version.h>
-
-/* Reset using CM control register */
-.global reset_cpu
-reset_cpu:
- mov r0, #CM_BASE
- ldr r1,[r0,#OS_CTRL]
- orr r1,r1,#CMMASK_RESET
- str r1,[r0,#OS_CTRL]
-
-reset_failed:
- b reset_failed
-
-/* Set up the platform, once the cpu has been initialized */
-.globl lowlevel_init
-lowlevel_init:
- /* If U-Boot has been run after the ARM boot monitor
- * then all the necessary actions have been done
- * otherwise we are running from user flash mapped to 0x00000000
- * --- DO NOT REMAP BEFORE THE CODE HAS BEEN RELOCATED --
- * Changes to the (possibly soft) reset defaults of the processor
- * itself should be performed in cpu/arm<>/start.S
- * This function affects only the core module or board settings
- */
-
-#ifdef CONFIG_CM_INIT
- /* CM has an initialization register
- * - bits in it are wired into test-chip pins to force
- * reset defaults
- * - may need to change its contents for U-Boot
- */
-
- /* set the desired CM specific value */
- mov r2,#CMMASK_LOWVEC /* Vectors at 0x00000000 for all */
-
-#if defined (CONFIG_CM10200E) || defined (CONFIG_CM10220E)
- orr r2,r2,#CMMASK_INIT_102
-#else
-
-#if !defined (CONFIG_CM920T) && !defined (CONFIG_CM920T_ETM) && \
- !defined (CONFIG_CM940T)
- /* CMxx6 code */
-
-#ifdef CONFIG_CM_MULTIPLE_SSRAM
- /* set simple mapping */
- and r2,r2,#CMMASK_MAP_SIMPLE
-#endif /* #ifdef CONFIG_CM_MULTIPLE_SSRAM */
-
-#ifdef CONFIG_CM_TCRAM
- /* disable TCRAM */
- and r2,r2,#CMMASK_TCRAM_DISABLE
-#endif /* #ifdef CONFIG_CM_TCRAM */
-
-#if defined (CONFIG_CM926EJ_S) || defined (CONFIG_CM1026EJ_S) || \
- defined (CONFIG_CM1136JF_S)
-
- and r2,r2,#CMMASK_LE
-
-#endif /* cpu with little endian initialization */
-
- orr r2,r2,#CMMASK_CMxx6_COMMON
-
-#endif /* CMxx6 code */
-
-#endif /* ARM102xxE value */
-
- /* read CM_INIT */
- mov r0, #CM_BASE
- ldr r1, [r0, #OS_INIT]
- /* check against desired bit setting */
- and r3,r1,r2
- cmp r3,r2
- beq init_reg_OK
-
- /* lock for change */
- mov r3, #CMVAL_LOCK1
- and r3, r3, #CMVAL_LOCK2
- str r3, [r0, #OS_LOCK]
- /* set desired value */
- orr r1,r1,r2
- /* write & relock CM_INIT */
- str r1, [r0, #OS_INIT]
- mov r1, #CMVAL_UNLOCK
- str r1, [r0, #OS_LOCK]
-
- /* soft reset so new values used */
- b reset_cpu
-
-init_reg_OK:
-
-#endif /* CONFIG_CM_INIT */
-
- mov pc, lr
-
-#ifdef CONFIG_CM_SPD_DETECT
- /* Fast memory is available for the DRAM data
- * - ensure it has been transferred, then summarize the data
- * into a CM register
- */
-.globl dram_query
-dram_query:
- stmfd r13!,{r4-r6,lr}
- /* set up SDRAM info */
- /* - based on example code from the CM User Guide */
- mov r0, #CM_BASE
-
-readspdbit:
- ldr r1, [r0, #OS_SDRAM] /* read the SDRAM register */
- and r1, r1, #0x20 /* mask SPD bit (5) */
- cmp r1, #0x20 /* test if set */
- bne readspdbit
-
-setupsdram:
- add r0, r0, #OS_SPD /* address the copy of the SDP data */
- ldrb r1, [r0, #3] /* number of row address lines */
- ldrb r2, [r0, #4] /* number of column address lines */
- ldrb r3, [r0, #5] /* number of banks */
- ldrb r4, [r0, #31] /* module bank density */
- mul r5, r4, r3 /* size of SDRAM (MB divided by 4) */
- mov r5, r5, ASL#2 /* size in MB */
- mov r0, #CM_BASE /* reload for later code */
- cmp r5, #0x10 /* is it 16MB? */
- bne not16
- mov r6, #0x2 /* store size and CAS latency of 2 */
- b writesize
-
-not16:
- cmp r5, #0x20 /* is it 32MB? */
- bne not32
- mov r6, #0x6
- b writesize
-
-not32:
- cmp r5, #0x40 /* is it 64MB? */
- bne not64
- mov r6, #0xa
- b writesize
-
-not64:
- cmp r5, #0x80 /* is it 128MB? */
- bne not128
- mov r6, #0xe
- b writesize
-
-not128:
- /* if it is none of these sizes then it is either 256MB, or
- * there is no SDRAM fitted so default to 256MB
- */
- mov r6, #0x12
-
-writesize:
- mov r1, r1, ASL#8 /* row addr lines from SDRAM reg */
- orr r2, r1, r2, ASL#12 /* OR in column address lines */
- orr r3, r2, r3, ASL#16 /* OR in number of banks */
- orr r6, r6, r3 /* OR in size and CAS latency */
- str r6, [r0, #OS_SDRAM] /* store SDRAM parameters */
-
-#endif /* #ifdef CONFIG_CM_SPD_DETECT */
-
- ldmfd r13!,{r4-r6,pc} /* back to caller */
-
-#ifdef CONFIG_CM_REMAP
- /* CM remap bit is operational
- * - use it to map writeable memory at 0x00000000, in place of flash
- */
-.globl cm_remap
-cm_remap:
- stmfd r13!,{r4-r10,lr}
-
- mov r0, #CM_BASE
- ldr r1, [r0, #OS_CTRL]
- orr r1, r1, #CMMASK_REMAP /* set remap and led bits */
- str r1, [r0, #OS_CTRL]
-
- /* Now 0x00000000 is writeable, replace the vectors */
- ldr r0, =_start /* r0 <- start of vectors */
- ldr r2, =_armboot_start /* r2 <- past vectors */
- sub r1,r1,r1 /* destination 0x00000000 */
-
-copy_vec:
- ldmia r0!, {r3-r10} /* copy from source address [r0] */
- stmia r1!, {r3-r10} /* copy to target address [r1] */
- cmp r0, r2 /* until source end address [r2] */
- ble copy_vec
-
- ldmfd r13!,{r4-r10,pc} /* back to caller */
-
-#endif /* #ifdef CONFIG_CM_REMAP */
diff --git a/board/integratorcp/memsetup.S b/board/integratorcp/memsetup.S
deleted file mode 100644
index dfdc7848fd..0000000000
--- a/board/integratorcp/memsetup.S
+++ /dev/null
@@ -1,29 +0,0 @@
-/*
- * Memory setup for integratorAP
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-/*
- * Memory setup
- * - the reset defaults are assumed sufficient
- */
-
-.globl memsetup
-memsetup:
- mov pc,lr
diff --git a/board/integratorcp/split_by_variant.sh b/board/integratorcp/split_by_variant.sh
deleted file mode 100755
index 3a354339d7..0000000000
--- a/board/integratorcp/split_by_variant.sh
+++ /dev/null
@@ -1,111 +0,0 @@
-#!/bin/sh
-# ---------------------------------------------------------
-# Set the platform defines
-# ---------------------------------------------------------
-echo -n "/* Integrator configuration implied " > tmp.fil
-echo " by Makefile target */" >> tmp.fil
-echo -n "#define CONFIG_INTEGRATOR" >> tmp.fil
-echo " /* Integrator board */" >> tmp.fil
-echo -n "#define CONFIG_ARCH_CINTEGRATOR" >> tmp.fil
-echo " 1 /* Integrator/CP */" >> tmp.fil
-
-cpu="arm_intcm"
-variant="unknown core module"
-
-if [ "$1" == "" ]
-then
- echo "$0:: No parameters - using arm_intcm"
-else
- case "$1" in
- ap966)
- cpu="arm_intcm"
- variant="unported core module CM966E-S"
- ;;
-
- ap922_config)
- cpu="arm_intcm"
- variant="unported core module CM922T"
- ;;
-
- integratorcp_config | \
- cp_config)
- cpu="arm_intcm"
- variant="unspecified core module"
- ;;
-
- cp922_XA10_config)
- cpu="arm_intcm"
- variant="unported core module CM922T_XA10"
- echo -n "#define CONFIG_CM922T_XA10" >> tmp.fil
- echo " 1 /* CPU core is ARM922T_XA10 */" >> tmp.fil
- ;;
-
- cp920t_config)
- cpu="arm920t"
- variant="Core module CM920T"
- echo -n "#define CONFIG_CM920T" >> tmp.fil
- echo " 1 /* CPU core is ARM920T */" >> tmp.fil
- ;;
-
- cp926ejs_config)
- cpu="arm926ejs"
- variant="Core module CM926EJ-S"
- echo -n "#define CONFIG_CM926EJ_S" >> tmp.fil
- echo " 1 /* CPU core is ARM926EJ-S */ " >> tmp.fil
- ;;
-
-
- cp946es_config)
- cpu="arm946es"
- variant="Core module CM946E-S"
- echo -n "#define CONFIG_CM946E_S" >> tmp.fil
- echo " 1 /* CPU core is ARM946E-S */ " >> tmp.fil
- ;;
-
- cp1136_config)
- cpu="arm1136"
- variant="Core module CM1136EJF-S"
- echo -n "#define CONFIG_CM1136EJF_S" >> tmp.fil
- echo " 1 /* CPU core is ARM1136JF-S */ " >> tmp.fil
- ;;
-
- *)
- echo "$0:: Unknown core module"
- variant="unknown core module"
- cpu="arm_intcm"
- ;;
-
- esac
-
-fi
-
-if [ "$cpu" == "arm_intcm" ]
-then
- echo "/* Core module undefined/not ported */" >> tmp.fil
- echo "#define CONFIG_ARM_INTCM 1" >> tmp.fil
- echo -n "#undef CONFIG_CM_MULTIPLE_SSRAM" >> tmp.fil
- echo -n " /* CM may not have " >> tmp.fil
- echo "multiple SSRAM mapping */" >> tmp.fil
- echo -n "#undef CONFIG_CM_SPD_DETECT " >> tmp.fil
- echo -n " /* CM may not support SPD " >> tmp.fil
- echo "query */" >> tmp.fil
- echo -n "#undef CONFIG_CM_REMAP " >> tmp.fil
- echo -n " /* CM may not support " >> tmp.fil
- echo "remapping */" >> tmp.fil
- echo -n "#undef CONFIG_CM_INIT " >> tmp.fil
- echo -n " /* CM may not have " >> tmp.fil
- echo "initialization reg */" >> tmp.fil
- echo -n "#undef CONFIG_CM_TCRAM " >> tmp.fil
- echo " /* CM may not have TCRAM */" >> tmp.fil
-fi
-mv tmp.fil ./include/config.h
-# ---------------------------------------------------------
-# Ensure correct core object loaded first in U-Boot image
-# ---------------------------------------------------------
-sed -r 's/CPU_FILE/cpu\/'$cpu'\/start.o/; s/#.*//' board/integratorcp/u-boot.lds.template > board/integratorcp/u-boot.lds
-# ---------------------------------------------------------
-# Complete the configuration
-# ---------------------------------------------------------
-./mkconfig -a integratorcp arm $cpu integratorcp;
-echo "Variant:: $variant with core $cpu"
-
diff --git a/board/integratorcp/u-boot.lds.template b/board/integratorcp/u-boot.lds.template
deleted file mode 100644
index 0ec8087258..0000000000
--- a/board/integratorcp/u-boot.lds.template
+++ /dev/null
@@ -1,53 +0,0 @@
-/*
- * (C) Copyright 2002
- * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-# Template used during configuration to emsure the core module processor code,
-# from CPU_FILE, is placed at the start of the image */
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-ENTRY(_start)
-SECTIONS
-{
- . = 0x00000000;
- . = ALIGN(4);
- .text :
- {
- CPU_FILE (.text)
- *(.text)
- }
- .rodata : { *(.rodata) }
- . = ALIGN(4);
- .data : { *(.data) }
- . = ALIGN(4);
- .got : { *(.got) }
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = ALIGN(4);
- __bss_start = .;
- .bss : { *(.bss) }
- _end = .;
-}
diff --git a/board/ip860/Makefile b/board/ip860/Makefile
deleted file mode 100644
index 13ce9fc9d2..0000000000
--- a/board/ip860/Makefile
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/ip860/config.mk b/board/ip860/config.mk
deleted file mode 100644
index ea3b8735ef..0000000000
--- a/board/ip860/config.mk
+++ /dev/null
@@ -1,28 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# MicroSys IP860 VMEBus Systems
-#
-
-TEXT_BASE = 0x10000000
diff --git a/board/ip860/flash.c b/board/ip860/flash.c
deleted file mode 100644
index 2cf23b3e8c..0000000000
--- a/board/ip860/flash.c
+++ /dev/null
@@ -1,456 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-#if defined(CFG_ENV_IS_IN_FLASH)
-# ifndef CFG_ENV_ADDR
-# define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_ENV_OFFSET)
-# endif
-# ifndef CFG_ENV_SIZE
-# define CFG_ENV_SIZE CFG_ENV_SECT_SIZE
-# endif
-# ifndef CFG_ENV_SECT_SIZE
-# define CFG_ENV_SECT_SIZE CFG_ENV_SIZE
-# endif
-#endif
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (vu_long *addr, flash_info_t *info);
-static int write_word (flash_info_t *info, ulong dest, ulong data);
-static void flash_get_offsets (ulong base, flash_info_t *info);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- volatile ip860_bcsr_t *bcsr = (ip860_bcsr_t *)BCSR_BASE;
- unsigned long size;
- int i;
-
- /* Init: enable write,
- * or we cannot even write flash commands
- */
- bcsr->bd_ctrl |= BD_CTRL_FLWE;
-
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* Static FLASH Bank configuration here - FIXME XXX */
-
- size = flash_get_size((vu_long *)FLASH_BASE, &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size, size<<20);
- }
-
- /* Remap FLASH according to real size */
- memctl->memc_or1 = CFG_OR_TIMING_FLASH | (-size & 0xFFFF8000);
- memctl->memc_br1 = (CFG_FLASH_BASE & BR_BA_MSK) |
- (memctl->memc_br1 & ~(BR_BA_MSK));
-
- /* Re-do sizing to get full correct info */
- size = flash_get_size((vu_long *)CFG_FLASH_BASE, &flash_info[0]);
-
- flash_get_offsets (CFG_FLASH_BASE, &flash_info[0]);
-
- flash_info[0].size = size;
-
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
- /* monitor protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+monitor_flash_len-1,
- &flash_info[0]);
-#endif
-
-#ifdef CFG_ENV_IS_IN_FLASH
- /* ENV protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR+CFG_ENV_SECT_SIZE-1,
- &flash_info[0]);
-#endif
- return (size);
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_get_offsets (ulong base, flash_info_t *info)
-{
- int i;
-
- /* all possible flash types
- * (28F016SV, 28F160S3, 28F320S3)
- * have the same erase block size: 64 kB per chip,
- * of 128 kB per bank
- */
-
- /* set up sector start address table */
- for (i = 0; i < info->sector_count; i++) {
- info->start[i] = base;
- base += 0x00020000;
- }
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_INTEL: printf ("Intel "); break;
- default: printf ("Unknown Vendor "); break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_28F016SV: printf ("28F016SV (16 Mbit, 32 x 64k)\n");
- break;
- case FLASH_28F160S3: printf ("28F160S3 (16 Mbit, 32 x 512K)\n");
- break;
- case FLASH_28F320S3: printf ("28F320S3 (32 Mbit, 64 x 512K)\n");
- break;
- default: printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " "
- );
- }
- printf ("\n");
- return;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-
-static ulong flash_get_size (vu_long *addr, flash_info_t *info)
-{
- short i;
- ulong value;
- ulong base = (ulong)addr;
-
- /* Write "Intelligent Identifier" command: read Manufacturer ID */
- *addr = 0x90909090;
-
- value = addr[0];
- switch (value) {
- case (MT_MANUFACT & 0x00FF00FF): /* MT or => Intel */
- case (INTEL_ALT_MANU & 0x00FF00FF):
- info->flash_id = FLASH_MAN_INTEL;
- break;
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- return (0); /* no or unknown flash */
- }
-
- value = addr[1]; /* device ID */
-
- switch (value) {
- case (INTEL_ID_28F016S):
- info->flash_id += FLASH_28F016SV;
- info->sector_count = 32;
- info->size = 0x00400000;
- break; /* => 2x2 MB */
-
- case (INTEL_ID_28F160S3):
- info->flash_id += FLASH_28F160S3;
- info->sector_count = 32;
- info->size = 0x00400000;
- break; /* => 2x2 MB */
-
- case (INTEL_ID_28F320S3):
- info->flash_id += FLASH_28F320S3;
- info->sector_count = 64;
- info->size = 0x00800000;
- break; /* => 2x4 MB */
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- return (0); /* => no or unknown flash */
-
- }
-
- /* set up sector start address table */
- for (i = 0; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00020000);
- /* don't know how to check sector protection */
- info->protect[i] = 0;
- }
-
- /*
- * Prevent writes to uninitialized FLASH.
- */
- if (info->flash_id != FLASH_UNKNOWN) {
- addr = (vu_long *)info->start[0];
-
- *addr = 0xFFFFFF; /* reset bank to read array mode */
- }
-
- return (info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- int flag, prot, sect;
- ulong start, now, last;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- if ((info->flash_id & FLASH_VENDMASK) != FLASH_MAN_INTEL) {
- printf ("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- start = get_timer (0);
- last = start;
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- vu_long *addr = (vu_long *)(info->start[sect]);
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- /* Single Block Erase Command */
- *addr = 0x20202020;
- /* Confirm */
- *addr = 0xD0D0D0D0;
- /* Resume Command, as per errata update */
- *addr = 0xD0D0D0D0;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- while ((*addr & 0x00800080) != 0x00800080) {
- if ((now=get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- *addr = 0xFFFFFFFF; /* reset bank */
- return 1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- }
-
- /* reset to read mode */
- *addr = 0xFFFFFFFF;
- }
- }
-
- printf (" done\n");
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int i, l, rc;
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
- for (; i<4 && cnt>0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = 0;
- for (i=0; i<4; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- return (write_word(info, wp, data));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word (flash_info_t *info, ulong dest, ulong data)
-{
- vu_long *addr = (vu_long *)dest;
- ulong start, csr;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*addr & data) != data) {
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- /* Write Command */
- *addr = 0x10101010;
-
- /* Write Data */
- *addr = data;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* data polling for D7 */
- start = get_timer (0);
- flag = 0;
- while (((csr = *addr) & 0x00800080) != 0x00800080) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- flag = 1;
- break;
- }
- }
- if (csr & 0x00400040) {
-printf ("CSR indicates write error (%08lx) at %08lx\n", csr, (ulong)addr);
- flag = 1;
- }
-
- /* Clear Status Registers Command */
- *addr = 0x50505050;
- /* Reset to read array mode */
- *addr = 0xFFFFFFFF;
-
- return (flag);
-}
-
-/*-----------------------------------------------------------------------
- */
diff --git a/board/ip860/ip860.c b/board/ip860/ip860.c
deleted file mode 100644
index 9dd809b678..0000000000
--- a/board/ip860/ip860.c
+++ /dev/null
@@ -1,356 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <commproc.h>
-#include <mpc8xx.h>
-
-/* ------------------------------------------------------------------------- */
-
-static long int dram_size (long int, long int *, long int);
-unsigned long ip860_get_dram_size(void);
-unsigned long ip860_get_clk_freq (void);
-/* ------------------------------------------------------------------------- */
-
-#define _NOT_USED_ 0xFFFFFFFF
-
-const uint sdram_table[] = {
- /*
- * Single Read. (Offset 0 in UPMA RAM)
- */
- 0x1f07fc04, 0xeeaefc04, 0x11adfc04, 0xefbbbc00,
- 0x1ff77c47, /* last */
- /*
- * SDRAM Initialization (offset 5 in UPMA RAM)
- *
- * This is no UPM entry point. The following definition uses
- * the remaining space to establish an initialization
- * sequence, which is executed by a RUN command.
- *
- */
- 0x1ff77c34, 0xefeabc34, 0x1fb57c35, /* last */
- /*
- * Burst Read. (Offset 8 in UPMA RAM)
- */
- 0x1f07fc04, 0xeeaefc04, 0x10adfc04, 0xf0affc00,
- 0xf0affc00, 0xf1affc00, 0xefbbbc00, 0x1ff77c47, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Single Write. (Offset 18 in UPMA RAM)
- */
- 0x1f27fc04, 0xeeaebc00, 0x01b93c04, 0x1ff77c47, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Burst Write. (Offset 20 in UPMA RAM)
- */
- 0x1f07fc04, 0xeeaebc00, 0x10ad7c00, 0xf0affc00,
- 0xf0affc00, 0xe1bbbc04, 0x1ff77c47, /* last */
- _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Refresh (Offset 30 in UPMA RAM)
- */
- 0x1ff5fc84, 0xfffffc04, 0xfffffc04, 0xfffffc04,
- 0xfffffc84, 0xfffffc07, /* last */
- _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Exception. (Offset 3c in UPMA RAM)
- */
- 0x7ffffc07, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_,
-};
-
-
-/* ------------------------------------------------------------------------- */
-int board_early_init_f(void)
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
-
-/* init BCSR chipselect line for ip860_get_clk_freq() and ip860_get_dram_size() */
- memctl->memc_or4 = CFG_OR4;
- memctl->memc_br4 = CFG_BR4;
-
- return 0;
-}
-
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Check Board Identity:
- *
- * Test ID string (IP860...)
- */
-
-int checkboard (void)
-{
- unsigned char *s, *e;
- unsigned char buf[64];
- int i;
-
- puts ("Board: ");
-
- i = getenv_r ("serial#", (char *)buf, sizeof (buf));
- s = (i > 0) ? buf : NULL;
-
- if (!s || strncmp ((char *)s, "IP860", 5)) {
- puts ("### No HW ID - assuming IP860");
- } else {
- for (e = s; *e; ++e) {
- if (*e == ' ')
- break;
- }
-
- for (; s < e; ++s) {
- putc (*s);
- }
- }
-
- putc ('\n');
-
- return (0);
-}
-
-/* ------------------------------------------------------------------------- */
-
-long int initdram (int board_type)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- long int size;
- ulong refresh_val;
-
- upmconfig (UPMA, (uint *) sdram_table,
- sizeof (sdram_table) / sizeof (uint));
-
- /*
- * Preliminary prescaler for refresh
- */
- if (ip860_get_clk_freq() == 50000000)
- {
- memctl->memc_mptpr = 0x0400;
- refresh_val = 0xC3000000;
- }
- else
- {
- memctl->memc_mptpr = 0x0200;
- refresh_val = 0x9C000000;
- }
-
-
- memctl->memc_mar = 0x00000088;
-
- /*
- * Map controller banks 2 to the SDRAM address
- */
- memctl->memc_or2 = CFG_OR2;
- memctl->memc_br2 = CFG_BR2;
-
- /* IP860 boards have only one bank SDRAM */
-
-
- udelay (200);
-
- /* perform SDRAM initializsation sequence */
-
- memctl->memc_mamr = 0x00804114 | refresh_val;
- memctl->memc_mcr = 0x80004105; /* run precharge pattern from loc 5 */
- udelay(1);
- memctl->memc_mamr = 0x00804118 | refresh_val;
- memctl->memc_mcr = 0x80004130; /* run refresh pattern 8 times */
-
-
- udelay (1000);
-
- /*
- * Check SDRAM Memory Size
- */
- if (ip860_get_dram_size() == 16)
- size = dram_size (refresh_val | 0x00804114, SDRAM_BASE, SDRAM_MAX_SIZE);
- else
- size = dram_size (refresh_val | 0x00906114, SDRAM_BASE, SDRAM_MAX_SIZE);
-
- udelay (1000);
-
- memctl->memc_or2 = ((-size) & 0xFFFF0000) | SDRAM_TIMING;
- memctl->memc_br2 = (CFG_SDRAM_BASE & BR_BA_MSK) | BR_MS_UPMA | BR_V;
-
- udelay (10000);
-
- /*
- * Also, map other memory to correct position
- */
-
-#if (defined(CFG_OR1) && defined(CFG_BR1_PRELIM))
- memctl->memc_or1 = CFG_OR1;
- memctl->memc_br1 = CFG_BR1;
-#endif
-
-#if defined(CFG_OR3) && defined(CFG_BR3)
- memctl->memc_or3 = CFG_OR3;
- memctl->memc_br3 = CFG_BR3;
-#endif
-
-#if defined(CFG_OR4) && defined(CFG_BR4)
- memctl->memc_or4 = CFG_OR4;
- memctl->memc_br4 = CFG_BR4;
-#endif
-
-#if defined(CFG_OR5) && defined(CFG_BR5)
- memctl->memc_or5 = CFG_OR5;
- memctl->memc_br5 = CFG_BR5;
-#endif
-
-#if defined(CFG_OR6) && defined(CFG_BR6)
- memctl->memc_or6 = CFG_OR6;
- memctl->memc_br6 = CFG_BR6;
-#endif
-
-#if defined(CFG_OR7) && defined(CFG_BR7)
- memctl->memc_or7 = CFG_OR7;
- memctl->memc_br7 = CFG_BR7;
-#endif
-
- return (size);
-}
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Check memory range for valid RAM. A simple memory test determines
- * the actually available RAM size between addresses `base' and
- * `base + maxsize'. Some (not all) hardware errors are detected:
- * - short between address lines
- * - short between data lines
- */
-
-static long int dram_size (long int mamr_value, long int *base,
- long int maxsize)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
-
- memctl->memc_mamr = mamr_value;
-
- return (get_ram_size(base, maxsize));
-}
-
-/* ------------------------------------------------------------------------- */
-
-void reset_phy (void)
-{
- volatile immap_t *immr = (immap_t *) CFG_IMMR;
- ulong mask = PB_ENET_RESET | PB_ENET_JABD;
- ulong reg;
-
- /* Make sure PHY is not in low-power mode */
- immr->im_cpm.cp_pbpar &= ~(mask); /* GPIO */
- immr->im_cpm.cp_pbodr &= ~(mask); /* active output */
-
- /* Set JABD low (no JABber Disable),
- * and RESET high (Reset PHY)
- */
- reg = immr->im_cpm.cp_pbdat;
- reg = (reg & ~PB_ENET_JABD) | PB_ENET_RESET;
- immr->im_cpm.cp_pbdat = reg;
-
- /* now drive outputs */
- immr->im_cpm.cp_pbdir |= mask; /* output */
- udelay (1000);
- /*
- * Release RESET signal
- */
- immr->im_cpm.cp_pbdat &= ~(PB_ENET_RESET);
- udelay (1000);
-}
-
-/* ------------------------------------------------------------------------- */
-
-unsigned long ip860_get_clk_freq(void)
-{
- volatile ip860_bcsr_t *bcsr = (ip860_bcsr_t *)BCSR_BASE;
- ulong temp;
- uchar sysclk;
-
- if ((bcsr->bd_status & 0x80) == 0x80) /* bd_rev valid ? */
- sysclk = (bcsr->bd_rev & 0x18) >> 3;
- else
- sysclk = 0x00;
-
- switch (sysclk)
- {
- case 0x00:
- temp = 50000000;
- break;
-
- case 0x01:
- temp = 80000000;
- break;
-
- default:
- temp = 50000000;
- break;
- }
-
- return (temp);
-
-}
-
-
-/* ------------------------------------------------------------------------- */
-
-unsigned long ip860_get_dram_size(void)
-{
- volatile ip860_bcsr_t *bcsr = (ip860_bcsr_t *)BCSR_BASE;
- ulong temp;
- uchar dram_size;
-
- if ((bcsr->bd_status & 0x80) == 0x80) /* bd_rev valid ? */
- dram_size = (bcsr->bd_rev & 0xE0) >> 5;
- else
- dram_size = 0x00; /* default is 16 MB */
-
- switch (dram_size)
- {
- case 0x00:
- temp = 16;
- break;
-
- case 0x01:
- temp = 32;
- break;
-
- default:
- temp = 16;
- break;
- }
-
- return (temp);
-
-}
-
-/* ------------------------------------------------------------------------- */
diff --git a/board/ip860/u-boot.lds b/board/ip860/u-boot.lds
deleted file mode 100644
index 8cb2504435..0000000000
--- a/board/ip860/u-boot.lds
+++ /dev/null
@@ -1,141 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc8xx/start.o (.text)
- common/dlmalloc.o (.text)
- lib_ppc/ppcstring.o (.text)
- cpu/mpc8xx/interrupts.o (.text)
- lib_ppc/time.o (.text)
- lib_ppc/ticks.o (.text)
-/**
- . = env_offset;
- common/environment.o(.text)
-**/
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/ip860/u-boot.lds.debug b/board/ip860/u-boot.lds.debug
deleted file mode 100644
index 43d2b3bd60..0000000000
--- a/board/ip860/u-boot.lds.debug
+++ /dev/null
@@ -1,138 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc8xx/start.o (.text)
- lib_ppc/ppcstring.o (.text)
- cpu/mpc8xx/interrupts.o (.text)
- lib_ppc/time.o (.text)
- lib_ppc/ticks.o (.text)
-/**
- . = env_offset;
- common/environment.o(.text)
-**/
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/iphase4539/Makefile b/board/iphase4539/Makefile
deleted file mode 100644
index 19da5d065b..0000000000
--- a/board/iphase4539/Makefile
+++ /dev/null
@@ -1,45 +0,0 @@
-#
-# (C) Copyright 2002 Wolfgang Grandegger <wg@denx.de>
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := $(BOARD).o flash.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/iphase4539/config.mk b/board/iphase4539/config.mk
deleted file mode 100644
index 632c1d2ac6..0000000000
--- a/board/iphase4539/config.mk
+++ /dev/null
@@ -1,29 +0,0 @@
-#
-# (C) Copyright 2002 Wolfgang Grandegger <wg@denx.de>
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# iphase4539 board
-#
-
-TEXT_BASE = 0xffb00000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
diff --git a/board/iphase4539/flash.c b/board/iphase4539/flash.c
deleted file mode 100644
index 4eca46720c..0000000000
--- a/board/iphase4539/flash.c
+++ /dev/null
@@ -1,490 +0,0 @@
-/*
- * (C) Copyright 2001
- * Josh Huber <huber@mclx.com>, Mission Critical Linux, Inc.
- *
- * (C) Copyright 2002
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * Adapted for Interphase 4539 by Wolfgang Grandegger <wg@denx.de>.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <config.h>
-#include <common.h>
-#include <flash.h>
-#include <asm/io.h>
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
-
-extern int hwc_flash_size(void);
-static ulong flash_get_size (u32 addr, flash_info_t *info);
-static int flash_get_offsets (u32 base, flash_info_t *info);
-static int write_word (flash_info_t *info, ulong dest, ulong data);
-static void flash_reset (u32 addr);
-
-#define out8(a,v) *(volatile unsigned char*)(a) = v
-#define in8(a) *(volatile unsigned char*)(a)
-#define in32(a) *(volatile unsigned long*)(a)
-#define iobarrier_rw() eieio()
-
-unsigned long flash_init (void)
-{
- unsigned int i;
- unsigned long flash_size = 0;
- unsigned long bank_size;
- unsigned int bank = 0;
-
- /* Init: no FLASHes known */
- for (i=0; i < CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- flash_info[i].sector_count = 0;
- flash_info[i].size = 0;
- }
-
- /* Initialise the BOOT Flash */
- if (bank == CFG_MAX_FLASH_BANKS) {
- puts ("Warning: not all Flashes are initialised !");
- return flash_size;
- }
-
- bank_size = flash_get_size (CFG_FLASH_BASE, flash_info + bank);
- if (bank_size) {
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE && \
- CFG_MONITOR_BASE < CFG_FLASH_BASE + CFG_MAX_FLASH_SIZE
- /* monitor protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE + monitor_flash_len - 1,
- flash_info + bank);
-#endif
-
-#ifdef CFG_ENV_IS_IN_FLASH
- /* ENV protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1,
- flash_info + bank);
-#endif
-
- /* HWC protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_FLASH_BASE,
- CFG_FLASH_BASE + 0x10000 - 1,
- flash_info + bank);
-
- flash_size += bank_size;
- bank++;
- } else {
- puts ("Warning: the BOOT Flash is not initialised !");
- }
-
- return flash_size;
-}
-
-/*
- * The following code cannot be run from FLASH!
- */
-static ulong flash_get_size (u32 addr, flash_info_t *info)
-{
- volatile uchar value;
-#if 0
- int i;
-#endif
-
- /* Write auto select command: read Manufacturer ID */
- out8(addr + 0x0555, 0xAA);
- iobarrier_rw();
- udelay(10);
- out8(addr + 0x02AA, 0x55);
- iobarrier_rw();
- udelay(10);
- out8(addr + 0x0555, 0x90);
- iobarrier_rw();
- udelay(10);
-
- value = in8(addr);
- iobarrier_rw();
- udelay(10);
- switch (value | (value << 16)) {
- case AMD_MANUFACT:
- info->flash_id = FLASH_MAN_AMD;
- break;
-
- case FUJ_MANUFACT:
- info->flash_id = FLASH_MAN_FUJ;
- break;
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- flash_reset (addr);
- return 0;
- }
-
- value = in8(addr + 1); /* device ID */
- iobarrier_rw();
-
- switch (value) {
- case AMD_ID_LV033C:
- info->flash_id += FLASH_AM033C;
- info->size = hwc_flash_size();
- if (info->size > CFG_MAX_FLASH_SIZE) {
- printf("U-Boot supports only %d MB\n",
- CFG_MAX_FLASH_SIZE);
- info->size = CFG_MAX_FLASH_SIZE;
- }
- info->sector_count = info->size / 0x10000;
- break; /* => 4 MB */
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- flash_reset (addr);
- return (0); /* => no or unknown flash */
-
- }
-
- if (!flash_get_offsets (addr, info)) {
- flash_reset (addr);
- return 0;
- }
-
-#if 0
- /* check for protected sectors */
- for (i = 0; i < info->sector_count; i++) {
- /* read sector protection at sector address, (A7 .. A0) = 0x02 */
- /* D0 = 1 if protected */
- value = in8(info->start[i] + 2);
- iobarrier_rw();
- info->protect[i] = (value & 1) != 0;
- }
-#endif
-
- /*
- * Reset bank to read mode
- */
- flash_reset (addr);
-
- return (info->size);
-}
-
-static int flash_get_offsets (u32 base, flash_info_t *info)
-{
- unsigned int i, size;
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM033C:
- /* set sector offsets for uniform sector type */
- size = info->size / info->sector_count;
- for (i = 0; i < info->sector_count; i++) {
- info->start[i] = base + i * size;
- }
- break;
- default:
- return 0;
- }
-
- return 1;
-}
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- volatile u32 addr = info->start[0];
- int flag, prot, sect, l_sect;
- ulong start, now, last;
-
- if (s_first < 0 || s_first > s_last) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- if (info->flash_id == FLASH_UNKNOWN ||
- info->flash_id > FLASH_AMD_COMP) {
- printf ("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- l_sect = -1;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- out8(addr + 0x555, 0xAA);
- iobarrier_rw();
- out8(addr + 0x2AA, 0x55);
- iobarrier_rw();
- out8(addr + 0x555, 0x80);
- iobarrier_rw();
- out8(addr + 0x555, 0xAA);
- iobarrier_rw();
- out8(addr + 0x2AA, 0x55);
- iobarrier_rw();
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr = info->start[sect];
- out8(addr, 0x30);
- iobarrier_rw();
- l_sect = sect;
- }
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- /*
- * We wait for the last triggered sector
- */
- if (l_sect < 0)
- goto DONE;
-
- start = get_timer (0);
- last = start;
- addr = info->start[l_sect];
- while ((in8(addr) & 0x80) != 0x80) {
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- return 1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- iobarrier_rw();
- }
-
-DONE:
- /* reset to read mode */
- flash_reset (info->start[0]);
-
- printf (" done\n");
- return 0;
-}
-
-/*
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int i, l, rc;
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
- for (; i<4 && cnt>0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = 0;
- for (i=0; i<4; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- return (write_word(info, wp, data));
-}
-
-/*
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word (flash_info_t *info, ulong dest, ulong data)
-{
- volatile u32 addr = info->start[0];
- ulong start;
- int flag, i;
-
- /* Check if Flash is (sufficiently) erased */
- if ((in32(dest) & data) != data) {
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- /* first, perform an unlock bypass command to speed up flash writes */
- out8(addr + 0x555, 0xAA);
- iobarrier_rw();
- out8(addr + 0x2AA, 0x55);
- iobarrier_rw();
- out8(addr + 0x555, 0x20);
- iobarrier_rw();
-
- /* write each byte out */
- for (i = 0; i < 4; i++) {
- char *data_ch = (char *)&data;
- out8(addr, 0xA0);
- iobarrier_rw();
- out8(dest+i, data_ch[i]);
- iobarrier_rw();
- udelay(10); /* XXX */
- }
-
- /* we're done, now do an unlock bypass reset */
- out8(addr, 0x90);
- iobarrier_rw();
- out8(addr, 0x00);
- iobarrier_rw();
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* data polling for D7 */
- start = get_timer (0);
- while ((in32(dest) & 0x80808080) != (data & 0x80808080)) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- return (1);
- }
- iobarrier_rw();
- }
-
- flash_reset (addr);
-
- return (0);
-}
-
-/*
- * Reset bank to read mode
- */
-static void flash_reset (u32 addr)
-{
- out8(addr, 0xF0); /* reset bank */
- iobarrier_rw();
-}
-
-void flash_print_info (flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD: printf ("AMD "); break;
- case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
- case FLASH_MAN_BM: printf ("BRIGHT MICRO "); break;
- default: printf ("Unknown Vendor "); break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM033C: printf ("AM29LV033C (32 Mbit, uniform sectors)\n");
- break;
- default: printf ("Unknown Chip Type\n");
- break;
- }
-
- if (info->size % 0x100000 == 0) {
- printf (" Size: %ld MB in %d Sectors\n",
- info->size / 0x100000, info->sector_count);
- }
- else if (info->size % 0x400 == 0) {
- printf (" Size: %ld KB in %d Sectors\n",
- info->size / 0x400, info->sector_count);
- }
- else {
- printf (" Size: %ld B in %d Sectors\n",
- info->size, info->sector_count);
- }
-
- printf (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " "
- );
- }
- printf ("\n");
-}
diff --git a/board/iphase4539/iphase4539.c b/board/iphase4539/iphase4539.c
deleted file mode 100644
index 0ca9cf5137..0000000000
--- a/board/iphase4539/iphase4539.c
+++ /dev/null
@@ -1,424 +0,0 @@
-/*
- * (C) Copyright 2002 Wolfgang Grandegger <wg@denx.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <ioports.h>
-#include <mpc8260.h>
-#include <asm/io.h>
-#include <asm/immap_8260.h>
-
-int hwc_flash_size (void);
-int hwc_local_sdram_size (void);
-int hwc_main_sdram_size (void);
-int hwc_serial_number (void);
-int hwc_mac_address (char *str);
-int hwc_manufact_date (char *str);
-int seeprom_read (int addr, uchar * data, int size);
-
-/*
- * I/O Port configuration table
- *
- * if conf is 1, then that port pin will be configured at boot time
- * according to the five values podr/pdir/ppar/psor/pdat for that entry
- *
- * The port definitions are taken from the old firmware (see
- * also SYS/H/4539.H):
- *
- * ppar psor pdir podr pdat
- * PA: 0x02ffffff 0x02c00000 0xfc403fe6 0x00000000 0x02403fc0
- * PB: 0x0fffdeb0 0x000000b0 0x0f032347 0x00000000 0x0f000290
- * PC: 0x030ffa55 0x030f0040 0xbcf005ea 0x00000000 0xc0c0ba7d
- * PD: 0x09c04e3c 0x01000e3c 0x0a7ff1c3 0x00000000 0x00ce0ae9
- */
-const iop_conf_t iop_conf_tab[4][32] = {
-
- /* Port A configuration */
- { /* conf ppar psor pdir podr pdat */
- {0, 1, 0, 0, 0, 0}, /* PA31 FCC1_TXENB SLAVE */
- {0, 1, 0, 1, 0, 0}, /* PA30 FCC1_TXCLAV SLAVE */
- {0, 1, 0, 1, 0, 0}, /* PA29 FCC1_TXSOC */
- {0, 1, 0, 0, 0, 0}, /* PA28 FCC1_RXENB SLAVE */
- {0, 1, 0, 0, 0, 0}, /* PA27 FCC1_RXSOC */
- {0, 1, 0, 1, 0, 0}, /* PA26 FCC1_RXCLAV SLAVE */
- {0, 1, 0, 1, 0, 1}, /* PA25 FCC1_TXD0 */
- {0, 1, 0, 1, 0, 1}, /* PA24 FCC1_TXD1 */
- {0, 1, 0, 1, 0, 1}, /* PA23 FCC1_TXD2 */
- {0, 1, 0, 1, 0, 1}, /* PA22 FCC1_TXD3 */
- {0, 1, 0, 1, 0, 1}, /* PA21 FCC1_TXD4 */
- {0, 1, 0, 1, 0, 1}, /* PA20 FCC1_TXD5 */
- {0, 1, 0, 1, 0, 1}, /* PA19 FCC1_TXD6 */
- {0, 1, 0, 1, 0, 1}, /* PA18 FCC1_TXD7 */
- {0, 1, 0, 0, 0, 0}, /* PA17 FCC1_RXD7 */
- {0, 1, 0, 0, 0, 0}, /* PA16 FCC1_RXD6 */
- {0, 1, 0, 0, 0, 0}, /* PA15 FCC1_RXD5 */
- {0, 1, 0, 0, 0, 0}, /* PA14 FCC1_RXD4 */
- {0, 1, 0, 0, 0, 0}, /* PA13 FCC1_RXD3 */
- {0, 1, 0, 0, 0, 0}, /* PA12 FCC1_RXD2 */
- {0, 1, 0, 0, 0, 0}, /* PA11 FCC1_RXD1 */
- {0, 1, 0, 0, 0, 0}, /* PA10 FCC1_RXD0 */
- {0, 1, 1, 1, 0, 1}, /* PA9 TDMA1_L1TXD */
- {0, 1, 1, 0, 0, 0}, /* PA8 TDMA1_L1RXD */
- {0, 0, 0, 0, 0, 0}, /* PA7 CONFIG0 */
- {0, 1, 1, 0, 0, 1}, /* PA6 TDMA1_L1RSYNC */
- {0, 0, 0, 1, 0, 0}, /* PA5 FCC2:RxAddr[2] */
- {0, 0, 0, 1, 0, 0}, /* PA4 FCC2:RxAddr[1] */
- {0, 0, 0, 1, 0, 0}, /* PA3 FCC2:RxAddr[0] */
- {0, 0, 0, 1, 0, 0}, /* PA2 FCC2:TxAddr[0] */
- {0, 0, 0, 1, 0, 0}, /* PA1 FCC2:TxAddr[1] */
- {0, 0, 0, 1, 0, 0} /* PA0 FCC2:TxAddr[2] */
- },
- /* Port B configuration */
- { /* conf ppar psor pdir podr pdat */
- {0, 0, 0, 1, 0, 0}, /* PB31 FCC2_RXSOC */
- {0, 0, 0, 1, 0, 0}, /* PB30 FCC2_TXSOC */
- {0, 0, 0, 1, 0, 0}, /* PB29 FCC2_RXCLAV */
- {0, 0, 0, 0, 0, 0}, /* PB28 CONFIG2 */
- {0, 1, 1, 0, 0, 1}, /* PB27 FCC2_TXD0 */
- {0, 1, 1, 0, 0, 0}, /* PB26 FCC2_TXD1 */
- {0, 0, 0, 1, 0, 0}, /* PB25 FCC2_TXD4 */
- {0, 1, 1, 0, 0, 1}, /* PB24 FCC2_TXD5 */
- {0, 0, 0, 1, 0, 0}, /* PB23 FCC2_TXD6 */
- {0, 1, 0, 1, 0, 1}, /* PB22 FCC2_TXD7 */
- {0, 1, 0, 0, 0, 0}, /* PB21 FCC2_RXD7 */
- {0, 1, 0, 0, 0, 0}, /* PB20 FCC2_RXD6 */
- {0, 1, 0, 0, 0, 0}, /* PB19 FCC2_RXD5 */
- {0, 0, 0, 1, 0, 0}, /* PB18 FCC2_RXD4 */
- {1, 1, 0, 0, 0, 0}, /* PB17 FCC3_RX_DV */
- {1, 1, 0, 0, 0, 0}, /* PB16 FCC3_RX_ER */
- {1, 1, 0, 1, 0, 0}, /* PB15 FCC3_TX_ER */
- {1, 1, 0, 1, 0, 0}, /* PB14 FCC3_TX_EN */
- {1, 1, 0, 0, 0, 0}, /* PB13 FCC3_COL */
- {1, 1, 0, 0, 0, 0}, /* PB12 FCC3_CRS */
- {1, 1, 0, 0, 0, 0}, /* PB11 FCC3_RXD3 */
- {1, 1, 0, 0, 0, 0}, /* PB10 FCC3_RXD2 */
- {1, 1, 0, 0, 0, 0}, /* PB9 FCC3_RXD1 */
- {1, 1, 0, 0, 0, 0}, /* PB8 FCC3_RXD0 */
- {1, 1, 0, 1, 0, 1}, /* PB7 FCC3_TXD0 */
- {1, 1, 0, 1, 0, 1}, /* PB6 FCC3_TXD1 */
- {1, 1, 0, 1, 0, 1}, /* PB5 FCC3_TXD2 */
- {1, 1, 0, 1, 0, 1}, /* PB4 FCC3_TXD3 */
- {0, 0, 0, 0, 0, 0}, /* PB3 */
- {0, 0, 0, 0, 0, 0}, /* PB2 */
- {0, 0, 0, 0, 0, 0}, /* PB1 */
- {0, 0, 0, 0, 0, 0}, /* PB0 */
- },
- /* Port C configuration */
- { /* conf ppar psor pdir podr pdat */
- {0, 1, 0, 0, 0, 1}, /* PC31 CLK1 */
- {0, 0, 0, 1, 0, 0}, /* PC30 U1MASTER_N */
- {0, 1, 0, 0, 0, 1}, /* PC29 CLK3 */
- {0, 0, 0, 1, 0, 1}, /* PC28 -MT90220_RST */
- {0, 1, 0, 0, 0, 1}, /* PC27 CLK5 */
- {0, 0, 0, 1, 0, 1}, /* PC26 -QUADFALC_RST */
- {0, 1, 1, 1, 0, 1}, /* PC25 BRG4 */
- {1, 0, 0, 1, 0, 0}, /* PC24 MDIO */
- {1, 0, 0, 1, 0, 0}, /* PC23 MDC */
- {0, 1, 0, 0, 0, 1}, /* PC22 CLK10 */
- {0, 0, 0, 1, 0, 0}, /* PC21 */
- {0, 1, 0, 0, 0, 1}, /* PC20 CLK12 */
- {0, 1, 0, 0, 0, 1}, /* PC19 CLK13 */
- {1, 1, 0, 0, 0, 1}, /* PC18 CLK14 */
- {0, 1, 0, 0, 0, 0}, /* PC17 CLK15 */
- {1, 1, 0, 0, 0, 1}, /* PC16 CLK16 */
- {0, 1, 1, 0, 0, 0}, /* PC15 FCC1_TXADDR0 SLAVE */
- {0, 1, 1, 0, 0, 0}, /* PC14 FCC1_RXADDR0 SLAVE */
- {0, 1, 1, 0, 0, 0}, /* PC13 FCC1_TXADDR1 SLAVE */
- {0, 1, 1, 0, 0, 0}, /* PC12 FCC1_RXADDR1 SLAVE */
- {0, 0, 0, 1, 0, 0}, /* PC11 FCC2_RXD2 */
- {0, 0, 0, 1, 0, 0}, /* PC10 FCC2_RXD3 */
- {0, 0, 0, 1, 0, 1}, /* PC9 LTMODE */
- {0, 0, 0, 1, 0, 1}, /* PC8 SELSYNC */
- {0, 1, 1, 0, 0, 0}, /* PC7 FCC1_TXADDR2 SLAVE */
- {0, 1, 1, 0, 0, 0}, /* PC6 FCC1_RXADDR2 SLAVE */
- {0, 0, 0, 1, 0, 0}, /* PC5 FCC2_TXCLAV MASTER */
- {0, 0, 0, 1, 0, 0}, /* PC4 FCC2_RXENB MASTER */
- {0, 0, 0, 1, 0, 0}, /* PC3 FCC2_TXD2 */
- {0, 0, 0, 1, 0, 0}, /* PC2 FCC2_TXD3 */
- {0, 0, 0, 0, 0, 1}, /* PC1 PTMC -PTEENB */
- {0, 0, 0, 1, 0, 1}, /* PC0 COMCLK_N */
- },
- /* Port D configuration */
- { /* conf ppar psor pdir podr pdat */
- {0, 0, 0, 1, 0, 1}, /* PD31 -CAM_RST */
- {0, 0, 0, 1, 0, 0}, /* PD30 FCC2_TXENB */
- {0, 1, 1, 0, 0, 0}, /* PD29 FCC1_RXADDR3 SLAVE */
- {0, 1, 1, 0, 0, 1}, /* PD28 TDMC1_L1TXD */
- {0, 1, 1, 0, 0, 0}, /* PD27 TDMC1_L1RXD */
- {0, 1, 1, 0, 0, 1}, /* PD26 TDMC1_L1RSYNC */
- {0, 0, 0, 1, 0, 1}, /* PD25 LED0 -OFF */
- {0, 0, 0, 1, 0, 1}, /* PD24 LED5 -OFF */
- {1, 0, 0, 1, 0, 1}, /* PD23 -LXT971_RST */
- {0, 1, 1, 0, 0, 1}, /* PD22 TDMA2_L1TXD */
- {0, 1, 1, 0, 0, 0}, /* PD21 TDMA2_L1RXD */
- {0, 1, 1, 0, 0, 1}, /* PD20 TDMA2_L1RSYNC */
- {0, 0, 0, 1, 0, 0}, /* PD19 FCC2_TXADDR3 */
- {0, 0, 0, 1, 0, 0}, /* PD18 FCC2_RXADDR3 */
- {0, 1, 0, 1, 0, 0}, /* PD17 BRG2 */
- {0, 0, 0, 1, 0, 0}, /* PD16 */
- {0, 0, 0, 1, 0, 0}, /* PD15 PT2TO1 */
- {0, 0, 0, 1, 0, 1}, /* PD14 PT4TO3 */
- {0, 0, 0, 1, 0, 1}, /* PD13 -SWMODE */
- {0, 0, 0, 1, 0, 1}, /* PD12 -PTMODE */
- {0, 0, 0, 1, 0, 0}, /* PD11 FCC2_RXD0 */
- {0, 0, 0, 1, 0, 0}, /* PD10 FCC2_RXD1 */
- {1, 1, 0, 1, 0, 1}, /* PD9 SMC1_SMTXD */
- {1, 1, 0, 0, 0, 1}, /* PD8 SMC1_SMRXD */
- {0, 1, 1, 0, 0, 0}, /* PD7 FCC1_TXADDR3 SLAVE */
- {0, 0, 0, 1, 0, 0}, /* PD6 IMAMODE */
- {0, 0, 0, 0, 0, 0}, /* PD5 CONFIG2 */
- {0, 1, 0, 1, 0, 0}, /* PD4 BRG8 */
- {0, 0, 0, 0, 0, 0}, /* PD3 */
- {0, 0, 0, 0, 0, 0}, /* PD2 */
- {0, 0, 0, 0, 0, 0}, /* PD1 */
- {0, 0, 0, 0, 0, 0}, /* PD0 */
- }
-};
-
-long int initdram (int board_type)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8260_t *memctl = &immap->im_memctl;
- volatile uchar *base;
- ulong maxsize;
- int i;
-
- memctl->memc_psrt = CFG_PSRT;
- memctl->memc_mptpr = CFG_MPTPR;
-
-#ifndef CFG_RAMBOOT
- immap->im_siu_conf.sc_ppc_acr = 0x00000026;
- immap->im_siu_conf.sc_ppc_alrh = 0x01276345;
- immap->im_siu_conf.sc_ppc_alrl = 0x89ABCDEF;
- immap->im_siu_conf.sc_lcl_acr = 0x00000000;
- immap->im_siu_conf.sc_lcl_alrh = 0x01234567;
- immap->im_siu_conf.sc_lcl_alrl = 0x89ABCDEF;
- immap->im_siu_conf.sc_tescr1 = 0x00004000;
- immap->im_siu_conf.sc_ltescr1 = 0x00004000;
-
- /* Init Main SDRAM */
-#define OP_VALUE 0x404A241A
-#define OP_VALUE_M (OP_VALUE & 0x87FFFFFF);
- base = (uchar *) CFG_SDRAM_BASE;
- memctl->memc_psdmr = 0x28000000 | OP_VALUE_M;
- *base = 0xFF;
- memctl->memc_psdmr = 0x08000000 | OP_VALUE_M;
- for (i = 0; i < 8; i++)
- *base = 0xFF;
- memctl->memc_psdmr = 0x18000000 | OP_VALUE_M;
- *(base + 0x110) = 0xFF;
- memctl->memc_psdmr = OP_VALUE;
- memctl->memc_lsdmr = 0x4086A522;
- *base = 0xFF;
-
- /* We must be able to test a location outsize the maximum legal size
- * to find out THAT we are outside; but this address still has to be
- * mapped by the controller. That means, that the initial mapping has
- * to be (at least) twice as large as the maximum expected size.
- */
- maxsize = (1 + (~memctl->memc_or1 | 0x7fff)) / 2;
-
- maxsize = get_ram_size((long *)base, maxsize);
-
- memctl->memc_or1 |= ~(maxsize - 1);
-
- if (maxsize != hwc_main_sdram_size ())
- printf ("Oops: memory test has not found all memory!\n");
-#endif
-
- icache_enable ();
- /* return total ram size of SDRAM */
- return (maxsize);
-}
-
-int checkboard (void)
-{
- char string[32];
-
- hwc_manufact_date (string);
-
- printf ("Board: Interphase 4539 (#%d %s)\n",
- hwc_serial_number (),
- string);
-
-#ifdef DEBUG
- printf ("Manufacturing date: %s\n", string);
- printf ("Serial number : %d\n", hwc_serial_number ());
- printf ("FLASH size : %d MB\n", hwc_flash_size () >> 20);
- printf ("Main SDRAM size : %d MB\n", hwc_main_sdram_size () >> 20);
- printf ("Local SDRAM size : %d MB\n", hwc_local_sdram_size () >> 20);
- hwc_mac_address (string);
- printf ("MAC address : %s\n", string);
-#endif
-
- return 0;
-}
-
-int misc_init_r (void)
-{
- char *s, str[32];
- int num;
-
- if ((s = getenv ("serial#")) == NULL &&
- (num = hwc_serial_number ()) != -1) {
- sprintf (str, "%06d", num);
- setenv ("serial#", str);
- }
- if ((s = getenv ("ethaddr")) == NULL && hwc_mac_address (str) == 0) {
- setenv ("ethaddr", str);
- }
- return (0);
-}
-
-/***************************************************************
- * We take some basic Hardware Configuration Parameter from the
- * Serial EEPROM conected to the PSpan bridge. We keep it as
- * simple as possible.
- */
-int hwc_flash_size (void)
-{
- uchar byte;
-
- if (!seeprom_read (0x40, &byte, sizeof (byte))) {
- switch ((byte >> 2) & 0x3) {
- case 0x1:
- return 0x0400000;
- break;
- case 0x2:
- return 0x0800000;
- break;
- case 0x3:
- return 0x1000000;
- default:
- return 0x0100000;
- }
- }
- return -1;
-}
-int hwc_local_sdram_size (void)
-{
- uchar byte;
-
- if (!seeprom_read (0x40, &byte, sizeof (byte))) {
- switch ((byte & 0x03)) {
- case 0x1:
- return 0x0800000;
- case 0x2:
- return 0x1000000;
- default:
- return 0; /* not present */
- }
- }
- return -1;
-}
-int hwc_main_sdram_size (void)
-{
- uchar byte;
-
- if (!seeprom_read (0x41, &byte, sizeof (byte))) {
- return 0x1000000 << ((byte >> 5) & 0x7);
- }
- return -1;
-}
-int hwc_serial_number (void)
-{
- int sn = -1;
-
- if (!seeprom_read (0xa0, (uchar *) &sn, sizeof (sn))) {
- sn = cpu_to_le32 (sn);
- }
- return sn;
-}
-int hwc_mac_address (char *str)
-{
- char mac[6];
-
- if (!seeprom_read (0xb0, (uchar *)mac, sizeof (mac))) {
- sprintf (str, "%02x:%02x:%02x:%02x:%02x:%02x\n",
- mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
- } else {
- strcpy (str, "ERROR");
- return -1;
- }
- return 0;
-}
-int hwc_manufact_date (char *str)
-{
- uchar byte;
- int value;
-
- if (seeprom_read (0x92, &byte, sizeof (byte)))
- goto out;
- value = byte;
- if (seeprom_read (0x93, &byte, sizeof (byte)))
- goto out;
- value += byte << 8;
- sprintf (str, "%02d/%02d/%04d",
- value & 0x1F, (value >> 5) & 0xF,
- 1980 + ((value >> 9) & 0x1FF));
- return 0;
-
- out:
- strcpy (str, "ERROR");
- return -1;
-}
-
-#define PSPAN_ADDR 0xF0020000
-#define EEPROM_REG 0x408
-#define EEPROM_READ_CMD 0xA000
-#define PSPAN_WRITE(a,v) \
- *((volatile unsigned long *)(PSPAN_ADDR+(a))) = v; eieio()
-#define PSPAN_READ(a) \
- *((volatile unsigned long *)(PSPAN_ADDR+(a)))
-
-int seeprom_read (int addr, uchar * data, int size)
-{
- ulong val, cmd;
- int i;
-
- for (i = 0; i < size; i++) {
-
- cmd = EEPROM_READ_CMD;
- cmd |= ((addr + i) << 24) & 0xff000000;
-
- /* Wait for ACT to authorize write */
- while ((val = PSPAN_READ (EEPROM_REG)) & 0x80)
- eieio ();
-
- /* Write command */
- PSPAN_WRITE (EEPROM_REG, cmd);
-
- /* Wait for data to be valid */
- while ((val = PSPAN_READ (EEPROM_REG)) & 0x80)
- eieio ();
- /* Do it twice, first read might be erratic */
- while ((val = PSPAN_READ (EEPROM_REG)) & 0x80)
- eieio ();
-
- /* Read error */
- if (val & 0x00000040) {
- return -1;
- } else {
- data[i] = (val >> 16) & 0xff;
- }
- }
- return 0;
-}
diff --git a/board/iphase4539/u-boot.lds b/board/iphase4539/u-boot.lds
deleted file mode 100644
index 4ea01eab66..0000000000
--- a/board/iphase4539/u-boot.lds
+++ /dev/null
@@ -1,125 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc8260/start.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/ispan/Makefile b/board/ispan/Makefile
deleted file mode 100644
index 9123a8026d..0000000000
--- a/board/ispan/Makefile
+++ /dev/null
@@ -1,46 +0,0 @@
-#
-# Copyright (C) 2004 Arabella Software Ltd.
-# Yuli Barcohen <yuli@arabellasw.com>
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := $(BOARD).o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/ispan/config.mk b/board/ispan/config.mk
deleted file mode 100644
index 4600dbb068..0000000000
--- a/board/ispan/config.mk
+++ /dev/null
@@ -1,29 +0,0 @@
-#
-# Copyright (C) 2004 Arabella Software Ltd.
-# Yuli Barcohen <yuli@arabellasw.com>
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# Interphase iSPAN Communications Controllers
-#
-#TEXT_BASE = 0xFF800000
-#TEXT_BASE = 0xFFBA0000
-TEXT_BASE = 0xFE7A0000
diff --git a/board/ispan/ispan.c b/board/ispan/ispan.c
deleted file mode 100644
index d39b8cd533..0000000000
--- a/board/ispan/ispan.c
+++ /dev/null
@@ -1,464 +0,0 @@
-/*
- * Copyright (C) 2004 Arabella Software Ltd.
- * Yuli Barcohen <yuli@arabellasw.com>
- *
- * Support for Interphase iSPAN Communications Controllers
- * (453x and others). Tested on 4532.
- *
- * Derived from iSPAN 4539 port (iphase4539) by
- * Wolfgang Grandegger <wg@denx.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <ioports.h>
-#include <mpc8260.h>
-#include <asm/io.h>
-
-/*
- * I/O Ports configuration table
- *
- * If conf is 1, then that port pin will be configured at boot time
- * according to the five values podr/pdir/ppar/psor/pdat for that entry
- */
-
-#define CFG_FCC1 (CONFIG_ETHER_INDEX == 1)
-#define CFG_FCC2 (CONFIG_ETHER_INDEX == 2)
-#define CFG_FCC3 (CONFIG_ETHER_INDEX == 3)
-
-const iop_conf_t iop_conf_tab[4][32] = {
- /* Port A */
- { /* conf ppar psor pdir podr pdat */
- /* PA31 */ { CFG_FCC1, 1, 1, 0, 0, 0 }, /* FCC1 MII COL */
- /* PA30 */ { CFG_FCC1, 1, 1, 0, 0, 0 }, /* FCC1 MII CRS */
- /* PA29 */ { CFG_FCC1, 1, 1, 1, 0, 0 }, /* FCC1 MII TX_ER */
- /* PA28 */ { CFG_FCC1, 1, 1, 1, 0, 0 }, /* FCC1 MII TX_EN */
- /* PA27 */ { CFG_FCC1, 1, 1, 0, 0, 0 }, /* FCC1 MII RX_DV */
- /* PA26 */ { CFG_FCC1, 1, 1, 0, 0, 0 }, /* FCC1 MII RX_ER */
- /* PA25 */ { 0, 0, 0, 0, 0, 0 }, /* PA25 */
- /* PA24 */ { 0, 0, 0, 0, 0, 0 }, /* PA24 */
- /* PA23 */ { 0, 0, 0, 0, 0, 0 }, /* PA23 */
- /* PA22 */ { 0, 0, 0, 0, 0, 0 }, /* PA22 */
- /* PA21 */ { CFG_FCC1, 1, 0, 1, 0, 0 }, /* FCC1 MII TxD[3] */
- /* PA20 */ { CFG_FCC1, 1, 0, 1, 0, 0 }, /* FCC1 MII TxD[2] */
- /* PA19 */ { CFG_FCC1, 1, 0, 1, 0, 0 }, /* FCC1 MII TxD[1] */
- /* PA18 */ { CFG_FCC1, 1, 0, 1, 0, 0 }, /* FCC1 MII TxD[0] */
- /* PA17 */ { CFG_FCC1, 1, 0, 0, 0, 0 }, /* FCC1 MII RxD[0] */
- /* PA16 */ { CFG_FCC1, 1, 0, 0, 0, 0 }, /* FCC1 MII RxD[1] */
- /* PA15 */ { CFG_FCC1, 1, 0, 0, 0, 0 }, /* FCC1 MII RxD[2] */
- /* PA14 */ { CFG_FCC1, 1, 0, 0, 0, 0 }, /* FCC1 MII RxD[3] */
- /* PA13 */ { 0, 0, 0, 0, 0, 0 }, /* PA13 */
- /* PA12 */ { 0, 0, 0, 0, 0, 0 }, /* PA12 */
- /* PA11 */ { 0, 0, 0, 0, 0, 0 }, /* PA11 */
- /* PA10 */ { 0, 0, 0, 0, 0, 0 }, /* PA10 */
- /* PA9 */ { 0, 1, 0, 1, 0, 0 }, /* SMC2 SMTXD */
- /* PA8 */ { 0, 1, 0, 0, 0, 0 }, /* SMC2 SMRXD */
- /* PA7 */ { 0, 0, 0, 0, 0, 0 }, /* PA7 */
- /* PA6 */ { 0, 0, 0, 0, 0, 0 }, /* PA6 */
- /* PA5 */ { 0, 0, 0, 0, 0, 0 }, /* PA5 */
- /* PA4 */ { 0, 0, 0, 0, 0, 0 }, /* PA4 */
- /* PA3 */ { 0, 0, 0, 0, 0, 0 }, /* PA3 */
- /* PA2 */ { 0, 0, 0, 0, 0, 0 }, /* PA2 */
- /* PA1 */ { 0, 0, 0, 0, 0, 0 }, /* PA1 */
- /* PA0 */ { 0, 0, 0, 0, 0, 0 } /* PA0 */
- },
-
- /* Port B */
- { /* conf ppar psor pdir podr pdat */
- /* PB31 */ { CFG_FCC2, 1, 0, 1, 0, 0 }, /* FCC2 MII TX_ER */
- /* PB30 */ { CFG_FCC2, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_DV */
- /* PB29 */ { CFG_FCC2, 1, 1, 1, 0, 0 }, /* FCC2 MII TX_EN */
- /* PB28 */ { CFG_FCC2, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_ER */
- /* PB27 */ { CFG_FCC2, 1, 0, 0, 0, 0 }, /* FCC2 MII COL */
- /* PB26 */ { CFG_FCC2, 1, 0, 0, 0, 0 }, /* FCC2 MII CRS */
- /* PB25 */ { CFG_FCC2, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[3] */
- /* PB24 */ { CFG_FCC2, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[2] */
- /* PB23 */ { CFG_FCC2, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[1] */
- /* PB22 */ { CFG_FCC2, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[0] */
- /* PB21 */ { CFG_FCC2, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[0] */
- /* PB20 */ { CFG_FCC2, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[1] */
- /* PB19 */ { CFG_FCC2, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[2] */
- /* PB18 */ { CFG_FCC2, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[3] */
- /* PB17 */ { CFG_FCC3, 1, 0, 0, 0, 0 }, /* FCC3 MII RX_DV */
- /* PB16 */ { CFG_FCC3, 1, 0, 0, 0, 0 }, /* FCC3 MII RX_ER */
- /* PB15 */ { CFG_FCC3, 1, 0, 1, 0, 0 }, /* FCC3 MII TX_ER */
- /* PB14 */ { CFG_FCC3, 1, 0, 1, 0, 0 }, /* FCC3 MII TX_EN */
- /* PB13 */ { CFG_FCC3, 1, 0, 0, 0, 0 }, /* FCC3 MII COL */
- /* PB12 */ { CFG_FCC3, 1, 0, 0, 0, 0 }, /* FCC3 MII CRS */
- /* PB11 */ { CFG_FCC3, 1, 0, 0, 0, 0 }, /* FCC3 MII RxD[3] */
- /* PB10 */ { CFG_FCC3, 1, 0, 0, 0, 0 }, /* FCC3 MII RxD[2] */
- /* PB9 */ { CFG_FCC3, 1, 0, 0, 0, 0 }, /* FCC3 MII RxD[1] */
- /* PB8 */ { CFG_FCC3, 1, 0, 0, 0, 0 }, /* FCC3 MII RxD[0] */
- /* PB7 */ { CFG_FCC3, 1, 0, 1, 0, 0 }, /* FCC3 MII TxD[0] */
- /* PB6 */ { CFG_FCC3, 1, 0, 1, 0, 0 }, /* FCC3 MII TxD[1] */
- /* PB5 */ { CFG_FCC3, 1, 0, 1, 0, 0 }, /* FCC3 MII TxD[2] */
- /* PB4 */ { CFG_FCC3, 1, 0, 1, 0, 0 }, /* FCC3 MII TxD[3] */
- /* PB3 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PB2 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PB1 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PB0 */ { 0, 0, 0, 0, 0, 0 } /* pin doesn't exist */
- },
-
- /* Port C */
- { /* conf ppar psor pdir podr pdat */
- /* PC31 */ { 0, 0, 0, 0, 0, 0 }, /* PC31 */
- /* PC30 */ { 0, 0, 0, 0, 0, 0 }, /* PC30 */
- /* PC29 */ { 0, 0, 0, 0, 0, 0 }, /* PC29 */
- /* PC28 */ { 0, 0, 0, 0, 0, 0 }, /* PC28 */
- /* PC27 */ { 0, 0, 0, 0, 0, 0 }, /* PC27 */
- /* PC26 */ { 0, 0, 0, 0, 0, 0 }, /* PC26 */
- /* PC25 */ { 0, 0, 0, 0, 0, 0 }, /* PC25 */
- /* PC24 */ { 0, 0, 0, 0, 0, 0 }, /* PC24 */
- /* PC23 */ { 0, 0, 0, 0, 0, 0 }, /* PC23 */
- /* PC22 */ { 0, 0, 0, 0, 0, 0 }, /* PC22 */
- /* PC21 */ { 0, 0, 0, 0, 0, 0 }, /* PC21 */
- /* PC20 */ { 0, 0, 0, 0, 0, 0 }, /* PC20 */
- /* PC19 */ { 0, 0, 0, 0, 0, 0 }, /* PC19 */
- /* PC18 */ { CFG_FCC3, 1, 0, 0, 0, 0 }, /* FCC3 MII Rx Clock (CLK14) */
- /* PC17 */ { 0, 0, 0, 0, 0, 0 }, /* PC17 */
- /* PC16 */ { CFG_FCC3, 1, 0, 0, 0, 0 }, /* FCC3 MII Tx Clock (CLK16) */
- /* PC15 */ { 0, 0, 0, 0, 0, 0 }, /* PC15 */
- /* PC14 */ { 0, 0, 0, 0, 0, 0 }, /* PC14 */
- /* PC13 */ { 0, 0, 0, 0, 0, 0 }, /* PC13 */
- /* PC12 */ { 0, 0, 0, 0, 0, 0 }, /* PC12 */
- /* PC11 */ { 0, 0, 0, 0, 0, 0 }, /* PC11 */
- /* PC10 */ { 0, 0, 0, 0, 0, 0 }, /* PC10 */
- /* PC9 */ { 0, 0, 0, 0, 0, 0 }, /* PC9 */
- /* PC8 */ { 0, 0, 0, 0, 0, 0 }, /* PC8 */
- /* PC7 */ { 0, 0, 0, 0, 0, 0 }, /* PC7 */
- /* PC6 */ { 0, 0, 0, 0, 0, 0 }, /* PC6 */
- /* PC5 */ { 0, 0, 0, 0, 0, 0 }, /* PC5 */
- /* PC4 */ { 0, 0, 0, 0, 0, 0 }, /* PC4 */
- /* PC3 */ { 0, 0, 0, 0, 0, 0 }, /* PC3 */
- /* PC2 */ { 0, 0, 0, 0, 0, 0 }, /* PC2 */
- /* PC1 */ { 0, 0, 0, 0, 0, 0 }, /* PC1 */
- /* PC0 */ { 0, 0, 0, 0, 0, 0 } /* PC0 */
- },
-
- /* Port D */
- { /* conf ppar psor pdir podr pdat */
- /* PD31 */ { 0, 0, 0, 0, 0, 0 }, /* PD31 */
- /* PD30 */ { 0, 0, 0, 0, 0, 0 }, /* PD30 */
- /* PD29 */ { 0, 0, 0, 0, 0, 0 }, /* PD29 */
- /* PD28 */ { 0, 0, 0, 0, 0, 0 }, /* PD28 */
- /* PD27 */ { 0, 0, 0, 0, 0, 0 }, /* PD27 */
- /* PD26 */ { 0, 0, 0, 0, 0, 0 }, /* PD26 */
- /* PD25 */ { 0, 0, 0, 0, 0, 0 }, /* PD25 */
- /* PD24 */ { 0, 0, 0, 0, 0, 0 }, /* PD24 */
- /* PD23 */ { 0, 0, 0, 0, 0, 0 }, /* PD23 */
- /* PD22 */ { 0, 0, 0, 0, 0, 0 }, /* PD22 */
- /* PD21 */ { 0, 0, 0, 0, 0, 0 }, /* PD21 */
- /* PD20 */ { 0, 0, 0, 0, 0, 0 }, /* PD20 */
- /* PD19 */ { 0, 0, 0, 0, 0, 0 }, /* PD19 */
- /* PD18 */ { 0, 1, 1, 0, 0, 0 }, /* SPICLK */
- /* PD17 */ { 0, 1, 1, 0, 0, 0 }, /* SPIMOSI */
- /* PD16 */ { 0, 1, 1, 0, 0, 0 }, /* SPIMISO */
- /* PD15 */ { 0, 1, 1, 0, 1, 0 }, /* I2C SDA */
- /* PD14 */ { 0, 1, 1, 0, 1, 0 }, /* I2C SCL */
- /* PD13 */ { 1, 0, 0, 0, 0, 0 }, /* MII MDIO */
- /* PD12 */ { 1, 0, 0, 1, 0, 0 }, /* MII MDC */
- /* PD11 */ { 0, 0, 0, 0, 0, 0 }, /* PD11 */
- /* PD10 */ { 0, 0, 0, 0, 0, 0 }, /* PD10 */
- /* PD9 */ { 1, 1, 0, 1, 0, 0 }, /* SMC1 SMTXD */
- /* PD8 */ { 1, 1, 0, 0, 0, 0 }, /* SMC1 SMRXD */
- /* PD7 */ { 0, 0, 0, 0, 0, 0 }, /* PD7 */
- /* PD6 */ { CFG_FCC3, 0, 0, 1, 0, 1 }, /* MII PHY Reset */
- /* PD5 */ { CFG_FCC3, 0, 0, 1, 0, 0 }, /* MII PHY Enable */
- /* PD4 */ { 0, 0, 0, 0, 0, 0 }, /* PD4 */
- /* PD3 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PD2 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PD1 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PD0 */ { 0, 0, 0, 0, 0, 0 } /* pin doesn't exist */
- }
-};
-
-#define PSPAN_ADDR 0xF0020000
-#define EEPROM_REG 0x408
-#define EEPROM_READ_CMD 0xA000
-#define PSPAN_WRITE(a,v) \
- *((volatile unsigned long *)(PSPAN_ADDR+(a))) = v; eieio()
-#define PSPAN_READ(a) \
- *((volatile unsigned long *)(PSPAN_ADDR+(a)))
-
-static int seeprom_read (int addr, uchar * data, int size)
-{
- ulong val, cmd;
- int i;
-
- for (i = 0; i < size; i++) {
-
- cmd = EEPROM_READ_CMD;
- cmd |= ((addr + i) << 24) & 0xff000000;
-
- /* Wait for ACT to authorize write */
- while ((val = PSPAN_READ (EEPROM_REG)) & 0x80)
- eieio ();
-
- /* Write command */
- PSPAN_WRITE (EEPROM_REG, cmd);
-
- /* Wait for data to be valid */
- while ((val = PSPAN_READ (EEPROM_REG)) & 0x80)
- eieio ();
- /* Do it twice, first read might be erratic */
- while ((val = PSPAN_READ (EEPROM_REG)) & 0x80)
- eieio ();
-
- /* Read error */
- if (val & 0x00000040) {
- return -1;
- } else {
- data[i] = (val >> 16) & 0xff;
- }
- }
- return 0;
-}
-
-/***************************************************************
- * We take some basic Hardware Configuration Parameter from the
- * Serial EEPROM conected to the PSpan bridge. We keep it as
- * simple as possible.
- */
-#ifdef DEBUG
-static int hwc_flash_size (void)
-{
- uchar byte;
-
- if (!seeprom_read (0x40, &byte, sizeof (byte))) {
- switch ((byte >> 2) & 0x3) {
- case 0x1:
- return 0x0400000;
- break;
- case 0x2:
- return 0x0800000;
- break;
- case 0x3:
- return 0x1000000;
- default:
- return 0x0100000;
- }
- }
- return -1;
-}
-
-static int hwc_local_sdram_size (void)
-{
- uchar byte;
-
- if (!seeprom_read (0x40, &byte, sizeof (byte))) {
- switch ((byte & 0x03)) {
- case 0x1:
- return 0x0800000;
- case 0x2:
- return 0x1000000;
- default:
- return 0; /* not present */
- }
- }
- return -1;
-}
-#endif /* DEBUG */
-
-static int hwc_main_sdram_size (void)
-{
- uchar byte;
-
- if (!seeprom_read (0x41, &byte, sizeof (byte))) {
- return 0x1000000 << ((byte >> 5) & 0x7);
- }
- return -1;
-}
-
-static int hwc_serial_number (void)
-{
- int sn = -1;
-
- if (!seeprom_read (0xa0, (uchar *) &sn, sizeof (sn))) {
- sn = cpu_to_le32 (sn);
- }
- return sn;
-}
-
-static int hwc_mac_address (char *str)
-{
- char mac[6];
-
- if (!seeprom_read (0xb0, (uchar *)mac, sizeof (mac))) {
- sprintf (str, "%02X:%02X:%02X:%02X:%02X:%02X",
- mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
- } else {
- strcpy (str, "ERROR");
- return -1;
- }
- return 0;
-}
-
-static int hwc_manufact_date (char *str)
-{
- uchar byte;
- int value;
-
- if (seeprom_read (0x92, &byte, sizeof (byte)))
- goto out;
- value = byte;
- if (seeprom_read (0x93, &byte, sizeof (byte)))
- goto out;
- value += byte << 8;
- sprintf (str, "%02d/%02d/%04d",
- value & 0x1F, (value >> 5) & 0xF,
- 1980 + ((value >> 9) & 0x1FF));
- return 0;
-
-out:
- strcpy (str, "ERROR");
- return -1;
-}
-
-static int hwc_board_type (char **str)
-{
- ushort id = 0;
-
- if (seeprom_read (7, (uchar *) & id, sizeof (id)) == 0) {
- switch (id) {
- case 0x9080:
- *str = "4532-002";
- break;
- case 0x9081:
- *str = "4532-001";
- break;
- case 0x9082:
- *str = "4532-000";
- break;
- default:
- *str = "Unknown";
- }
- } else {
- *str = "Unknown";
- }
-
- return id;
-}
-
-long int initdram (int board_type)
-{
- long maxsize = hwc_main_sdram_size();
-
-#if !defined(CFG_RAMBOOT) && !defined(CFG_USE_FIRMWARE)
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8260_t *memctl = &immap->im_memctl;
- volatile uchar *base;
- int i;
-
- immap->im_siu_conf.sc_ppc_acr = 0x00000026;
- immap->im_siu_conf.sc_ppc_alrh = 0x01276345;
- immap->im_siu_conf.sc_ppc_alrl = 0x89ABCDEF;
- immap->im_siu_conf.sc_lcl_acr = 0x00000000;
- immap->im_siu_conf.sc_lcl_alrh = 0x01234567;
- immap->im_siu_conf.sc_lcl_alrl = 0x89ABCDEF;
- immap->im_siu_conf.sc_tescr1 = 0x00004000;
- immap->im_siu_conf.sc_ltescr1 = 0x00004000;
-
- memctl->memc_mptpr = CFG_MPTPR;
-
- /* Initialise 60x bus SDRAM */
- base = (uchar *)(CFG_SDRAM_BASE | 0x110);
- memctl->memc_psrt = CFG_PSRT;
- memctl->memc_or1 = CFG_60x_OR;
- memctl->memc_br1 = CFG_SDRAM_BASE | CFG_60x_BR;
-
- memctl->memc_psdmr = CFG_PSDMR | 0x28000000;
- *base = 0xFF;
- memctl->memc_psdmr = CFG_PSDMR | 0x08000000;
- for (i = 0; i < 8; i++)
- *base = 0xFF;
- memctl->memc_psdmr = CFG_PSDMR | 0x18000000;
- *base = 0xFF;
- memctl->memc_psdmr = CFG_PSDMR | 0x40000000;
-
- /* Initialise local bus SDRAM */
- base = (uchar *)CFG_LSDRAM_BASE;
- memctl->memc_lsrt = CFG_LSRT;
- memctl->memc_or2 = CFG_LOC_OR;
- memctl->memc_br2 = CFG_LSDRAM_BASE | CFG_LOC_BR;
-
- memctl->memc_lsdmr = CFG_LSDMR | 0x28000000;
- *base = 0xFF;
- memctl->memc_lsdmr = CFG_LSDMR | 0x08000000;
- for (i = 0; i < 8; i++)
- *base = 0xFF;
- memctl->memc_lsdmr = CFG_LSDMR | 0x18000000;
- *base = 0xFF;
- memctl->memc_lsdmr = CFG_LSDMR | 0x40000000;
-
- /* We must be able to test a location outsize the maximum legal size
- * to find out THAT we are outside; but this address still has to be
- * mapped by the controller. That means, that the initial mapping has
- * to be (at least) twice as large as the maximum expected size.
- */
- maxsize = (~(memctl->memc_or1 & BRx_BA_MSK) + 1) / 2;
-
- maxsize = get_ram_size((long *)(memctl->memc_br1 & BRx_BA_MSK), maxsize);
-
- memctl->memc_or1 |= ~(maxsize - 1);
-
- if (maxsize != hwc_main_sdram_size())
- puts("Oops: memory test has not found all memory!\n");
-#endif /* !CFG_RAMBOOT && !CFG_USE_FIRMWARE */
-
- /* Return total RAM size (size of 60x SDRAM) */
- return maxsize;
-}
-
-int checkboard(void)
-{
- char string[32], *id;
-
- hwc_manufact_date(string);
- hwc_board_type(&id);
- printf("Board: Interphase iSPAN %s (#%d %s)\n",
- id, hwc_serial_number(), string);
-#ifdef DEBUG
- printf("Manufacturing date: %s\n", string);
- printf("Serial number : %d\n", hwc_serial_number());
- printf("FLASH size : %d MB\n", hwc_flash_size() >> 20);
- printf("Main SDRAM size : %d MB\n", hwc_main_sdram_size() >> 20);
- printf("Local SDRAM size : %d MB\n", hwc_local_sdram_size() >> 20);
- hwc_mac_address(string);
- printf("MAC address : %s\n", string);
-#endif
- return 0;
-}
-
-int misc_init_r(void)
-{
- char *s, str[32];
- int num;
-
- if ((s = getenv("serial#")) == NULL &&
- (num = hwc_serial_number()) != -1) {
- sprintf(str, "%06d", num);
- setenv("serial#", str);
- }
- if ((s = getenv("ethaddr")) == NULL && hwc_mac_address(str) == 0) {
- setenv("ethaddr", str);
- }
-
- return 0;
-}
diff --git a/board/ispan/u-boot.lds b/board/ispan/u-boot.lds
deleted file mode 100644
index bf8048d27e..0000000000
--- a/board/ispan/u-boot.lds
+++ /dev/null
@@ -1,125 +0,0 @@
-/*
- * (C) Copyright 2001-2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * Modified by Yuli Barcohen <yuli@arabellasw.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc8260/start.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
-ENTRY(_start)
diff --git a/board/ivm/Makefile b/board/ivm/Makefile
deleted file mode 100644
index 13ce9fc9d2..0000000000
--- a/board/ivm/Makefile
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/ivm/config.mk b/board/ivm/config.mk
deleted file mode 100644
index 37e7185735..0000000000
--- a/board/ivm/config.mk
+++ /dev/null
@@ -1,29 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-# Ulrich Lutz, Speech Design GmbH, ulutz@datalab.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# IVM boards
-#
-
-TEXT_BASE = 0xFF000000
diff --git a/board/ivm/flash.c b/board/ivm/flash.c
deleted file mode 100644
index 140ba2d530..0000000000
--- a/board/ivm/flash.c
+++ /dev/null
@@ -1,598 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-#if defined(CFG_ENV_IS_IN_FLASH)
-# ifndef CFG_ENV_ADDR
-# define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_ENV_OFFSET)
-# endif
-# ifndef CFG_ENV_SIZE
-# define CFG_ENV_SIZE CFG_ENV_SECT_SIZE
-# endif
-# ifndef CFG_ENV_SECT_SIZE
-# define CFG_ENV_SECT_SIZE CFG_ENV_SIZE
-# endif
-#endif
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (vu_long *addr, flash_info_t *info);
-static int write_data (flash_info_t *info, ulong dest, ulong data);
-static void flash_get_offsets (ulong base, flash_info_t *info);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- unsigned long size_b0;
- int i;
-
- /* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* Static FLASH Bank configuration here - FIXME XXX */
-
- size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank 0: "
- "ID 0x%lx, Size = 0x%08lx = %ld MB\n",
- flash_info[0].flash_id,
- size_b0, size_b0<<20);
- }
-
- /* Remap FLASH according to real size */
- memctl->memc_or0 = CFG_OR_TIMING_FLASH | (-size_b0 & 0xFFFF8000);
- memctl->memc_br0 = (CFG_FLASH_BASE & BR_BA_MSK) | \
- BR_MS_GPCM | BR_PS_16 | BR_V;
-
- /* Re-do sizing to get full correct info */
- size_b0 = flash_get_size((vu_long *)CFG_FLASH_BASE, &flash_info[0]);
-
- flash_get_offsets (CFG_FLASH_BASE, &flash_info[0]);
-
- flash_info[0].size = size_b0;
-
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
- /* monitor protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+monitor_flash_len-1,
- &flash_info[0]);
-#endif
-
-#ifdef CFG_ENV_IS_IN_FLASH
- /* ENV protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR+CFG_ENV_SECT_SIZE-1,
- &flash_info[0]);
-#endif
-
- return (size_b0);
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_get_offsets (ulong base, flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_MT:
- if (info->flash_id & FLASH_BTYPE) {
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00004000;
- info->start[2] = base + 0x00006000;
- info->start[3] = base + 0x00008000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] = base + ((i-3) * 0x00020000);
- }
- } else {
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- info->start[i--] = base + info->size - 0x00004000;
- info->start[i--] = base + info->size - 0x00006000;
- info->start[i--] = base + info->size - 0x00008000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00020000;
- }
- }
- return;
-
- case FLASH_MAN_SST:
- for (i = 0; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00002000);
- }
- return;
-
- case FLASH_MAN_AMD:
- case FLASH_MAN_FUJ:
-
- /* set up sector start address table */
- if (info->flash_id & FLASH_BTYPE) {
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00008000;
- info->start[2] = base + 0x0000C000;
- info->start[3] = base + 0x00010000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00020000) - 0x00060000;
- }
- } else {
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- info->start[i--] = base + info->size - 0x00008000;
- info->start[i--] = base + info->size - 0x0000C000;
- info->start[i--] = base + info->size - 0x00010000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00020000;
- }
- }
- return;
- default:
- printf ("Don't know sector ofsets for flash type 0x%lx\n",
- info->flash_id);
- return;
- }
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD: printf ("AMD "); break;
- case FLASH_MAN_FUJ: printf ("Fujitsu "); break;
- case FLASH_MAN_SST: printf ("SST "); break;
- case FLASH_MAN_STM: printf ("STM "); break;
- case FLASH_MAN_MT: printf ("MT "); break;
- case FLASH_MAN_INTEL: printf ("Intel "); break;
- default: printf ("Unknown Vendor "); break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM400B: printf ("AM29LV400B (4 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM400T: printf ("AM29LV400T (4 Mbit, top boot sector)\n");
- break;
- case FLASH_AM800B: printf ("AM29LV800B (8 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM800T: printf ("AM29LV800T (8 Mbit, top boot sector)\n");
- break;
- case FLASH_AM160B: printf ("AM29LV160B (16 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM160T: printf ("AM29LV160T (16 Mbit, top boot sector)\n");
- break;
- case FLASH_AM320B: printf ("AM29LV320B (32 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM320T: printf ("AM29LV320T (32 Mbit, top boot sector)\n");
- break;
- case FLASH_SST200A: printf ("39xF200A (2M = 128K x 16)\n");
- break;
- case FLASH_SST400A: printf ("39xF400A (4M = 256K x 16)\n");
- break;
- case FLASH_SST800A: printf ("39xF800A (8M = 512K x 16)\n");
- break;
- case FLASH_STM800AB: printf ("M29W800AB (8M = 512K x 16)\n");
- break;
- case FLASH_28F008S5: printf ("28F008S5 (1M = 64K x 16)\n");
- break;
- case FLASH_28F400_T: printf ("28F400B3 (4Mbit, top boot sector)\n");
- break;
- case FLASH_28F400_B: printf ("28F400B3 (4Mbit, bottom boot sector)\n");
- break;
- default: printf ("Unknown Chip Type\n");
- break;
- }
-
- if (info->size >= (1 << 20)) {
- i = 20;
- } else {
- i = 10;
- }
- printf (" Size: %ld %cB in %d Sectors\n",
- info->size >> i,
- (i == 20) ? 'M' : 'k',
- info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " "
- );
- }
- printf ("\n");
- return;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-
-static ulong flash_get_size (vu_long *addr, flash_info_t *info)
-{
- ushort value;
- vu_short *saddr = (vu_short *)addr;
-
- /* Read Manufacturer ID */
- saddr[0] = 0x0090;
- value = saddr[0];
-
- switch (value) {
- case (AMD_MANUFACT & 0xFFFF):
- info->flash_id = FLASH_MAN_AMD;
- break;
- case (FUJ_MANUFACT & 0xFFFF):
- info->flash_id = FLASH_MAN_FUJ;
- break;
- case (SST_MANUFACT & 0xFFFF):
- info->flash_id = FLASH_MAN_SST;
- break;
- case (STM_MANUFACT & 0xFFFF):
- info->flash_id = FLASH_MAN_STM;
- break;
- case (MT_MANUFACT & 0xFFFF):
- info->flash_id = FLASH_MAN_MT;
- break;
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- saddr[0] = 0x00FF; /* restore read mode */
- return (0); /* no or unknown flash */
- }
-
- value = saddr[1]; /* device ID */
-
- switch (value) {
- case (AMD_ID_LV400T & 0xFFFF):
- info->flash_id += FLASH_AM400T;
- info->sector_count = 11;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case (AMD_ID_LV400B & 0xFFFF):
- info->flash_id += FLASH_AM400B;
- info->sector_count = 11;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case (AMD_ID_LV800T & 0xFFFF):
- info->flash_id += FLASH_AM800T;
- info->sector_count = 19;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case (AMD_ID_LV800B & 0xFFFF):
- info->flash_id += FLASH_AM800B;
- info->sector_count = 19;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case (AMD_ID_LV160T & 0xFFFF):
- info->flash_id += FLASH_AM160T;
- info->sector_count = 35;
- info->size = 0x00400000;
- break; /* => 4 MB */
-
- case (AMD_ID_LV160B & 0xFFFF):
- info->flash_id += FLASH_AM160B;
- info->sector_count = 35;
- info->size = 0x00400000;
- break; /* => 4 MB */
-#if 0 /* enable when device IDs are available */
- case (AMD_ID_LV320T & 0xFFFF):
- info->flash_id += FLASH_AM320T;
- info->sector_count = 67;
- info->size = 0x00800000;
- break; /* => 8 MB */
-
- case (AMD_ID_LV320B & 0xFFFF):
- info->flash_id += FLASH_AM320B;
- info->sector_count = 67;
- info->size = 0x00800000;
- break; /* => 8 MB */
-#endif
- case (SST_ID_xF200A & 0xFFFF):
- info->flash_id += FLASH_SST200A;
- info->sector_count = 64; /* 39xF200A ID ( 2M = 128K x 16 ) */
- info->size = 0x00080000;
- break;
- case (SST_ID_xF400A & 0xFFFF):
- info->flash_id += FLASH_SST400A;
- info->sector_count = 128; /* 39xF400A ID ( 4M = 256K x 16 ) */
- info->size = 0x00100000;
- break;
- case (SST_ID_xF800A & 0xFFFF):
- info->flash_id += FLASH_SST800A;
- info->sector_count = 256; /* 39xF800A ID ( 8M = 512K x 16 ) */
- info->size = 0x00200000;
- break; /* => 2 MB */
- case (STM_ID_x800AB & 0xFFFF):
- info->flash_id += FLASH_STM800AB;
- info->sector_count = 19;
- info->size = 0x00200000;
- break; /* => 2 MB */
- case (MT_ID_28F400_T & 0xFFFF):
- info->flash_id += FLASH_28F400_T;
- info->sector_count = 7;
- info->size = 0x00080000;
- break; /* => 512 kB */
- case (MT_ID_28F400_B & 0xFFFF):
- info->flash_id += FLASH_28F400_B;
- info->sector_count = 7;
- info->size = 0x00080000;
- break; /* => 512 kB */
- default:
- info->flash_id = FLASH_UNKNOWN;
- saddr[0] = 0x00FF; /* restore read mode */
- return (0); /* => no or unknown flash */
-
- }
-
- if (info->sector_count > CFG_MAX_FLASH_SECT) {
- printf ("** ERROR: sector count %d > max (%d) **\n",
- info->sector_count, CFG_MAX_FLASH_SECT);
- info->sector_count = CFG_MAX_FLASH_SECT;
- }
-
- saddr[0] = 0x00FF; /* restore read mode */
-
- return (info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- int flag, prot, sect;
- ulong start, now, last;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- if ((info->flash_id & FLASH_VENDMASK) != FLASH_MAN_MT) {
- printf ("Can erase only MT flash types - aborted\n");
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- start = get_timer (0);
- last = start;
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- vu_short *addr = (vu_short *)(info->start[sect]);
- unsigned short status;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- *addr = 0x0050; /* clear status register */
- *addr = 0x0020; /* erase setup */
- *addr = 0x00D0; /* erase confirm */
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- while (((status = *addr) & 0x0080) != 0x0080) {
- if ((now=get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- *addr = 0x00FF; /* reset to read mode */
- return 1;
- }
-
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- }
-
- *addr = 0x00FF; /* reset to read mode */
- }
- }
- printf (" done\n");
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- * 4 - Flash not identified
- */
-
-#define FLASH_WIDTH 2 /* flash bus width in bytes */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int i, l, rc;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- return 4;
- }
-
- wp = (addr & ~(FLASH_WIDTH-1)); /* get lower FLASH_WIDTH aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
- for (; i<FLASH_WIDTH && cnt>0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<FLASH_WIDTH; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- if ((rc = write_data(info, wp, data)) != 0) {
- return (rc);
- }
- wp += FLASH_WIDTH;
- }
-
- /*
- * handle FLASH_WIDTH aligned part
- */
- while (cnt >= FLASH_WIDTH) {
- data = 0;
- for (i=0; i<FLASH_WIDTH; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_data(info, wp, data)) != 0) {
- return (rc);
- }
- wp += FLASH_WIDTH;
- cnt -= FLASH_WIDTH;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<FLASH_WIDTH && cnt>0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i<FLASH_WIDTH; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- return (write_data(info, wp, data));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_data (flash_info_t *info, ulong dest, ulong data)
-{
- vu_short *addr = (vu_short *)dest;
- ushort sdata = (ushort)data;
- ushort status;
- ulong start;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*addr & sdata) != sdata) {
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- *addr = 0x0040; /* write setup */
- *addr = sdata;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- start = get_timer (0);
-
- while (((status = *addr) & 0x0080) != 0x0080) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- *addr = 0x00FF; /* restore read mode */
- return (1);
- }
- }
-
- *addr = 0x00FF; /* restore read mode */
-
- return (0);
-}
-
-/*-----------------------------------------------------------------------
- */
diff --git a/board/ivm/ivm.c b/board/ivm/ivm.c
deleted file mode 100644
index 7927ea9a50..0000000000
--- a/board/ivm/ivm.c
+++ /dev/null
@@ -1,352 +0,0 @@
-/*
- * (C) Copyright 2000, 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- * Ulrich Lutz, Speech Design GmbH, ulutz@datalab.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-#include <commproc.h>
-
-#ifdef CONFIG_STATUS_LED
-# include <status_led.h>
-#endif
-
-/* ------------------------------------------------------------------------- */
-
-static long int dram_size (long int, long int *, long int);
-
-/* ------------------------------------------------------------------------- */
-
-#define _NOT_USED_ 0xFFFFFFFF
-
-/*
- * 50 MHz SHARC access using UPM A
- */
-const uint sharc_table[] = {
- /*
- * Single Read. (Offset 0 in UPM RAM)
- */
- 0x0FF3FC04, 0x0FF3EC00, 0x7FFFEC04, 0xFFFFEC04,
- 0xFFFFEC05, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Burst Read. (Offset 8 in UPM RAM)
- */
- /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Single Write. (Offset 18 in UPM RAM)
- */
- 0x0FAFFC04, 0x0FAFEC00, 0x7FFFEC04, 0xFFFFEC04,
- 0xFFFFEC05, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Burst Write. (Offset 20 in UPM RAM)
- */
- /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Refresh (Offset 30 in UPM RAM)
- */
- /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Exception. (Offset 3c in UPM RAM)
- */
- 0x7FFFFC07, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_,
-};
-
-
-/*
- * 50 MHz SDRAM access using UPM B
- */
-const uint sdram_table[] = {
- /*
- * Single Read. (Offset 0 in UPM RAM)
- */
- 0x0E26FC04, 0x11ADFC04, 0xEFBBBC00, 0x1FF77C45, /* last */
- _NOT_USED_,
- /*
- * SDRAM Initialization (offset 5 in UPM RAM)
- *
- * This is no UPM entry point. The following definition uses
- * the remaining space to establish an initialization
- * sequence, which is executed by a RUN command.
- *
- */
- 0x1FF77C35, 0xEFEABC34, 0x1FB57C35, /* last */
- /*
- * Burst Read. (Offset 8 in UPM RAM)
- */
- 0x0E26FC04, 0x10ADFC04, 0xF0AFFC00, 0xF0AFFC00,
- 0xF1AFFC00, 0xEFBBBC00, 0x1FF77C45, /* last */
- _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Single Write. (Offset 18 in UPM RAM)
- */
- 0x1F27FC04, 0xEEAEBC04, 0x01B93C00, 0x1FF77C45, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Burst Write. (Offset 20 in UPM RAM)
- */
- 0x0E26BC00, 0x10AD7C00, 0xF0AFFC00, 0xF0AFFC00,
- 0xE1BBBC04, 0x1FF77C45, /* last */
- _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Refresh (Offset 30 in UPM RAM)
- */
- 0x1FF5FC84, 0xFFFFFC04, 0xFFFFFC04, 0xFFFFFC84,
- 0xFFFFFC05, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Exception. (Offset 3c in UPM RAM)
- */
- 0x7FFFFC07, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_,
-};
-
-/* ------------------------------------------------------------------------- */
-
-
-/*
- * Check Board Identity:
- *
- */
-
-int checkboard (void)
-{
-#ifdef CONFIG_IVMS8
- puts ("Board: IVMS8\n");
-#endif
-#ifdef CONFIG_IVML24
- puts ("Board: IVM-L8/24\n");
-#endif
- return (0);
-}
-
-/* ------------------------------------------------------------------------- */
-
-long int initdram (int board_type)
-{
- volatile immap_t *immr = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immr->im_memctl;
- long int size_b0;
-
- /* enable SDRAM clock ("switch on" SDRAM) */
- immr->im_cpm.cp_pbpar &= ~(CFG_PB_SDRAM_CLKE); /* GPIO */
- immr->im_cpm.cp_pbodr &= ~(CFG_PB_SDRAM_CLKE); /* active output */
- immr->im_cpm.cp_pbdir |= CFG_PB_SDRAM_CLKE; /* output */
- immr->im_cpm.cp_pbdat |= CFG_PB_SDRAM_CLKE; /* assert SDRAM CLKE */
- udelay (1);
-
- /*
- * Map controller bank 1 for ELIC SACCO
- */
- memctl->memc_or1 = CFG_OR1;
- memctl->memc_br1 = CFG_BR1;
-
- /*
- * Map controller bank 2 for ELIC EPIC
- */
- memctl->memc_or2 = CFG_OR2;
- memctl->memc_br2 = CFG_BR2;
-
- /*
- * Configure UPMA for SHARC
- */
- upmconfig (UPMA, (uint *) sharc_table,
- sizeof (sharc_table) / sizeof (uint));
-
-#if defined(CONFIG_IVML24)
- /*
- * Map controller bank 4 for HDLC Address space
- */
- memctl->memc_or4 = CFG_OR4;
- memctl->memc_br4 = CFG_BR4;
-#endif
-
- /*
- * Map controller bank 5 for SHARC
- */
- memctl->memc_or5 = CFG_OR5;
- memctl->memc_br5 = CFG_BR5;
-
- memctl->memc_mamr = 0x00001000;
-
- /*
- * Configure UPMB for SDRAM
- */
- upmconfig (UPMB, (uint *) sdram_table,
- sizeof (sdram_table) / sizeof (uint));
-
- memctl->memc_mptpr = CFG_MPTPR_1BK_8K;
-
- memctl->memc_mar = 0x00000088;
-
- /*
- * Map controller bank 3 to the SDRAM bank at preliminary address.
- */
- memctl->memc_or3 = CFG_OR3_PRELIM;
- memctl->memc_br3 = CFG_BR3_PRELIM;
-
- memctl->memc_mbmr = CFG_MBMR_8COL; /* refresh not enabled yet */
-
- udelay (200);
- memctl->memc_mcr = 0x80806105; /* precharge */
- udelay (1);
- memctl->memc_mcr = 0x80806106; /* load mode register */
- udelay (1);
- memctl->memc_mcr = 0x80806130; /* autorefresh */
- udelay (1);
- memctl->memc_mcr = 0x80806130; /* autorefresh */
- udelay (1);
- memctl->memc_mcr = 0x80806130; /* autorefresh */
- udelay (1);
- memctl->memc_mcr = 0x80806130; /* autorefresh */
- udelay (1);
- memctl->memc_mcr = 0x80806130; /* autorefresh */
- udelay (1);
- memctl->memc_mcr = 0x80806130; /* autorefresh */
- udelay (1);
- memctl->memc_mcr = 0x80806130; /* autorefresh */
- udelay (1);
- memctl->memc_mcr = 0x80806130; /* autorefresh */
-
- memctl->memc_mbmr |= MBMR_PTBE; /* refresh enabled */
-
- /*
- * Check Bank 0 Memory Size for re-configuration
- */
- size_b0 =
- dram_size (CFG_MBMR_8COL, (long *) SDRAM_BASE3_PRELIM,
- SDRAM_MAX_SIZE);
-
- memctl->memc_mbmr = CFG_MBMR_8COL | MBMR_PTBE;
-
- return (size_b0);
-}
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Check memory range for valid RAM. A simple memory test determines
- * the actually available RAM size between addresses `base' and
- * `base + maxsize'. Some (not all) hardware errors are detected:
- * - short between address lines
- * - short between data lines
- */
-
-static long int dram_size (long int mamr_value, long int *base,
- long int maxsize)
-{
- volatile immap_t *immr = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immr->im_memctl;
-
- memctl->memc_mbmr = mamr_value;
-
- return (get_ram_size (base, maxsize));
-}
-
-/* ------------------------------------------------------------------------- */
-
-void reset_phy (void)
-{
- immap_t *immr = (immap_t *) CFG_IMMR;
-
- /* De-assert Ethernet Powerdown */
- immr->im_cpm.cp_pbpar &= ~(CFG_PB_ETH_POWERDOWN); /* GPIO */
- immr->im_cpm.cp_pbodr &= ~(CFG_PB_ETH_POWERDOWN); /* active output */
- immr->im_cpm.cp_pbdir |= CFG_PB_ETH_POWERDOWN; /* output */
- immr->im_cpm.cp_pbdat &= ~(CFG_PB_ETH_POWERDOWN); /* Enable PHY power */
- udelay (1000);
-
- /*
- * RESET is implemented by a positive pulse of at least 1 us
- * at the reset pin.
- *
- * Configure RESET pins for NS DP83843 PHY, and RESET chip.
- *
- * Note: The RESET pin is high active, but there is an
- * inverter on the SPD823TS board...
- */
- immr->im_ioport.iop_pcpar &= ~(CFG_PC_ETH_RESET);
- immr->im_ioport.iop_pcdir |= CFG_PC_ETH_RESET;
- /* assert RESET signal of PHY */
- immr->im_ioport.iop_pcdat &= ~(CFG_PC_ETH_RESET);
- udelay (10);
- /* de-assert RESET signal of PHY */
- immr->im_ioport.iop_pcdat |= CFG_PC_ETH_RESET;
- udelay (10);
-}
-
-/* ------------------------------------------------------------------------- */
-
-void show_boot_progress (int status)
-{
-#if defined(CONFIG_STATUS_LED)
-# if defined(STATUS_LED_YELLOW)
- status_led_set (STATUS_LED_YELLOW,
- (status < 0) ? STATUS_LED_ON : STATUS_LED_OFF);
-# endif /* STATUS_LED_YELLOW */
-# if defined(STATUS_LED_BOOT)
- if (status == 6)
- status_led_set (STATUS_LED_BOOT, STATUS_LED_OFF);
-# endif /* STATUS_LED_BOOT */
-#endif /* CONFIG_STATUS_LED */
-}
-
-/* ------------------------------------------------------------------------- */
-
-void ide_set_reset (int on)
-{
- volatile immap_t *immr = (immap_t *) CFG_IMMR;
-
- /*
- * Configure PC for IDE Reset Pin
- */
- if (on) { /* assert RESET */
- immr->im_ioport.iop_pcdat &= ~(CFG_PC_IDE_RESET);
- } else { /* release RESET */
- immr->im_ioport.iop_pcdat |= CFG_PC_IDE_RESET;
- }
-
- /* program port pin as GPIO output */
- immr->im_ioport.iop_pcpar &= ~(CFG_PC_IDE_RESET);
- immr->im_ioport.iop_pcso &= ~(CFG_PC_IDE_RESET);
- immr->im_ioport.iop_pcdir |= CFG_PC_IDE_RESET;
-}
-
-/* ------------------------------------------------------------------------- */
diff --git a/board/ivm/u-boot.lds b/board/ivm/u-boot.lds
deleted file mode 100644
index fdeabc59e7..0000000000
--- a/board/ivm/u-boot.lds
+++ /dev/null
@@ -1,130 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc8xx/start.o (.text)
- common/environment.o(.text)
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/ivm/u-boot.lds.debug b/board/ivm/u-boot.lds.debug
deleted file mode 100644
index 3214f3f0c8..0000000000
--- a/board/ivm/u-boot.lds.debug
+++ /dev/null
@@ -1,138 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc8xx/start.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/extable.o (.text)
-
- . = env_offset;
- common/environment.o(.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/ixdp425/Makefile b/board/ixdp425/Makefile
deleted file mode 100644
index e4282c43a6..0000000000
--- a/board/ixdp425/Makefile
+++ /dev/null
@@ -1,46 +0,0 @@
-#
-# (C) Copyright 2000, 2002
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := ixdp425.o flash.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $^
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/ixdp425/config.mk b/board/ixdp425/config.mk
deleted file mode 100644
index 9f616f3580..0000000000
--- a/board/ixdp425/config.mk
+++ /dev/null
@@ -1,2 +0,0 @@
-#TEXT_BASE = 0x00100000
-TEXT_BASE = 0x00f80000
diff --git a/board/ixdp425/flash.c b/board/ixdp425/flash.c
deleted file mode 100644
index 1d958c8c19..0000000000
--- a/board/ixdp425/flash.c
+++ /dev/null
@@ -1,427 +0,0 @@
-/*
- * (C) Copyright 2001
- * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
- *
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <linux/byteorder/swab.h>
-
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/* Board support for 1 or 2 flash devices */
-#undef FLASH_PORT_WIDTH32
-#define FLASH_PORT_WIDTH16
-
-#ifdef FLASH_PORT_WIDTH16
-#define FLASH_PORT_WIDTH ushort
-#define FLASH_PORT_WIDTHV vu_short
-#define SWAP(x) x
-#else
-#define FLASH_PORT_WIDTH ulong
-#define FLASH_PORT_WIDTHV vu_long
-#define SWAP(x) __swab32(x)
-#endif
-
-#define FPW FLASH_PORT_WIDTH
-#define FPWV FLASH_PORT_WIDTHV
-
-#define mb() __asm__ __volatile__ ("" : : : "memory")
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (FPW * addr, flash_info_t * info);
-static int write_data (flash_info_t * info, ulong dest, FPW data);
-static void flash_get_offsets (ulong base, flash_info_t * info);
-void inline spin_wheel (void);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- int i;
- ulong size = 0;
-
- for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
- switch (i) {
- case 0:
- flash_get_size ((FPW *) PHYS_FLASH_1, &flash_info[i]);
- flash_get_offsets (PHYS_FLASH_1, &flash_info[i]);
- break;
- default:
- panic ("configured too many flash banks!\n");
- break;
- }
- size += flash_info[i].size;
- }
-
- /* Protect monitor and environment sectors
- */
- flash_protect (FLAG_PROTECT_SET,
- CFG_FLASH_BASE,
- CFG_FLASH_BASE + _bss_start - _armboot_start,
- &flash_info[0]);
-
- flash_protect (FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0]);
-
- return size;
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_get_offsets (ulong base, flash_info_t * info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- return;
- }
-
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
- for (i = 0; i < info->sector_count; i++) {
- info->start[i] = base + (i * PHYS_FLASH_SECT_SIZE);
- info->protect[i] = 0;
- }
- }
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t * info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_INTEL:
- printf ("INTEL ");
- break;
- default:
- printf ("Unknown Vendor ");
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_28F128J3A:
- printf ("28F128J3A\n");
- break;
- default:
- printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i], info->protect[i] ? " (RO)" : " ");
- }
- printf ("\n");
- return;
-}
-
-/*
- * The following code cannot be run from FLASH!
- */
-static ulong flash_get_size (FPW * addr, flash_info_t * info)
-{
- volatile FPW value;
-
- /* Write auto select command: read Manufacturer ID */
- addr[0x5555] = (FPW) 0x00AA00AA;
- addr[0x2AAA] = (FPW) 0x00550055;
- addr[0x5555] = (FPW) 0x00900090;
-
- mb ();
- value = addr[0];
-
- switch (value) {
-
- case (FPW) INTEL_MANUFACT:
- info->flash_id = FLASH_MAN_INTEL;
- break;
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
- return (0); /* no or unknown flash */
- }
-
- mb ();
- value = addr[1]; /* device ID */
-
- switch (value) {
-
- case (FPW) INTEL_ID_28F128J3A:
- info->flash_id += FLASH_28F128J3A;
- info->sector_count = 128;
- info->size = 0x02000000;
- break; /* => 16 MB */
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- break;
- }
-
- if (info->sector_count > CFG_MAX_FLASH_SECT) {
- printf ("** ERROR: sector count %d > max (%d) **\n",
- info->sector_count, CFG_MAX_FLASH_SECT);
- info->sector_count = CFG_MAX_FLASH_SECT;
- }
-
- addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
-
- return (info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t * info, int s_first, int s_last)
-{
- int flag, prot, sect;
- ulong type;
- int rcode = 0;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- type = (info->flash_id & FLASH_VENDMASK);
- if ((type != FLASH_MAN_INTEL)) {
- printf ("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- return 1;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n", prot);
- } else {
- printf ("\n");
- }
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- FPWV *addr = (FPWV *) (info->start[sect]);
- FPW status;
-
- printf ("Erasing sector %2d ... ", sect);
-
- /* arm simple, non interrupt dependent timer */
- reset_timer_masked ();
-
- *addr = (FPW) 0x00500050; /* clear status register */
- *addr = (FPW) 0x00200020; /* erase setup */
- *addr = (FPW) 0x00D000D0; /* erase confirm */
-
- while (((status =
- *addr) & (FPW) 0x00800080) !=
- (FPW) 0x00800080) {
- if (get_timer_masked () >
- CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- *addr = (FPW) 0x00B000B0; /* suspend erase */
- *addr = (FPW) 0x00FF00FF; /* reset to read mode */
- rcode = 1;
- break;
- }
- }
-
- *addr = (FPW) 0x00500050; /* clear status register cmd. */
- *addr = (FPW) 0x00FF00FF; /* resest to read mode */
-
- printf (" done\n");
- }
- }
- return rcode;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- * 4 - Flash not identified
- */
-
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- ulong cp, wp;
- FPW data;
- int count, i, l, rc, port_width;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- return 4;
- }
-
-/* get lower word aligned address */
-#ifdef FLASH_PORT_WIDTH16
- wp = (addr & ~1);
- port_width = 2;
-#else
- wp = (addr & ~3);
- port_width = 4;
-#endif
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i = 0, cp = wp; i < l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
- for (; i < port_width && cnt > 0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt == 0 && i < port_width; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
-
- if ((rc = write_data (info, wp, SWAP (data))) != 0) {
- return (rc);
- }
- wp += port_width;
- }
-
- /*
- * handle word aligned part
- */
- count = 0;
- while (cnt >= port_width) {
- data = 0;
- for (i = 0; i < port_width; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_data (info, wp, SWAP (data))) != 0) {
- return (rc);
- }
- wp += port_width;
- cnt -= port_width;
- if (count++ > 0x800) {
- spin_wheel ();
- count = 0;
- }
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i < port_width; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
-
- return (write_data (info, wp, SWAP (data)));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word or halfword to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_data (flash_info_t * info, ulong dest, FPW data)
-{
- FPWV *addr = (FPWV *) dest;
- ulong status;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*addr & data) != data) {
- printf ("not erased at %08lx (%lx)\n", (ulong) addr,
- (ulong) * addr);
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
-
- *addr = (FPW) 0x00400040; /* write setup */
- *addr = data;
-
- /* arm simple, non interrupt dependent timer */
- reset_timer_masked ();
-
- /* wait while polling the status register */
- while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
- if (get_timer_masked () > CFG_FLASH_WRITE_TOUT) {
- *addr = (FPW) 0x00FF00FF; /* restore read mode */
- return (1);
- }
- }
-
- *addr = (FPW) 0x00FF00FF; /* restore read mode */
-
- return (0);
-}
-
-void inline spin_wheel (void)
-{
- static int p = 0;
- static char w[] = "\\/-";
-
- printf ("\010%c", w[p]);
- (++p == 3) ? (p = 0) : 0;
-}
diff --git a/board/ixdp425/ixdp425.c b/board/ixdp425/ixdp425.c
deleted file mode 100644
index c04626a346..0000000000
--- a/board/ixdp425/ixdp425.c
+++ /dev/null
@@ -1,85 +0,0 @@
-/*
- * (C) Copyright 2002
- * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
- *
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <asm/arch/ixp425.h>
-#include <common.h>
-
-/* ------------------------------------------------------------------------- */
-
-
-/* local prototypes */
-
-
-/*
- * Miscelaneous platform dependent initialisations
- */
-
-/**********************************************************/
-
-int board_post_init (void)
-{
- return (0);
-}
-
-/**********************************************************/
-
-int board_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- /* arch number of IXDP */
- gd->bd->bi_arch_number = MACH_TYPE_IXDP425;
-
- /* adress of boot parameters */
- gd->bd->bi_boot_params = 0x00000100;
-
- return 0;
-}
-
-/**********************************************************/
-
-int dram_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
-
- return (0);
-}
-
-/**********************************************************/
-
-extern struct pci_controller hose;
-extern void pci_ixp_init(struct pci_controller * hose);
-
-void pci_init_board(void)
-{
- extern void pci_ixp_init (struct pci_controller *hose);
-
- pci_ixp_init(&hose);
-}
diff --git a/board/ixdp425/u-boot.lds b/board/ixdp425/u-boot.lds
deleted file mode 100644
index e2ceac7227..0000000000
--- a/board/ixdp425/u-boot.lds
+++ /dev/null
@@ -1,56 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT("elf32-bigarm", "elf32-bigarm", "elf32-bigarm")
-OUTPUT_ARCH(arm)
-ENTRY(_start)
-SECTIONS
-{
- . = 0x00000000;
-
- . = ALIGN(4);
- .text :
- {
- cpu/ixp/start.o (.text)
- *(.text)
- }
-
- . = ALIGN(4);
- .rodata : { *(.rodata) }
-
- . = ALIGN(4);
- .data : { *(.data) }
-
- . = ALIGN(4);
- .got : { *(.got) }
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = ALIGN(4);
- __bss_start = .;
- .bss : { *(.bss) }
- _end = .;
-}
diff --git a/board/jse/Makefile b/board/jse/Makefile
deleted file mode 100644
index 0da27b6968..0000000000
--- a/board/jse/Makefile
+++ /dev/null
@@ -1,44 +0,0 @@
-#
-# Copyright 2004 Picture Elements, Inc.
-# Stephen Williams <steve@icarus.com>
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o sdram.o flash.o host_bridge.o
-SOBJS = init.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/jse/README.txt b/board/jse/README.txt
deleted file mode 100644
index 84497db70f..0000000000
--- a/board/jse/README.txt
+++ /dev/null
@@ -1,48 +0,0 @@
-JSE Configuration Details
-
-Memory Bank 0 -- Flash chip
----------------------------
-
-0xfff00000 - 0xffffffff
-
-The flash chip is really only 512Kbytes, but the high address bit of
-the 1Meg region is ignored, so the flash is replicated through the
-region. Thus, this is consistent with a flash base address 0xfff80000.
-
-The placement at the end is to be consistent with reset behavior,
-where the processor itself initially uses this bus to load the branch
-vector and start running.
-
-On-Chip Memory
---------------
-
-0xf4000000 - 0xf4000fff
-
-The 405GPr includes a 4K on-chip memory that can be placed however
-software chooses. I choose to place the memory at this address, to
-keep it out of the cachable areas.
-
-
-Memory Bank 1 -- SystemACE Controller
--------------------------------------
-
-0xf0000000 - 0xf00fffff
-
-The SystemACE chip is along on peripheral bank CS#1. We don't need
-much space, but 1Meg is the smallest we can configure the chip to
-allocate. We need it far away from the flash region, because this
-region is set to be non-cached.
-
-
-Internal Peripherals
---------------------
-
-0xef600300 - 0xef6008ff
-
-These are scattered various peripherals internal to the PPC405GPr
-chip.
-
-SDRAM
------
-
-0x00000000 - 0x07ffffff (128 MBytes)
diff --git a/board/jse/config.mk b/board/jse/config.mk
deleted file mode 100644
index 03ec085010..0000000000
--- a/board/jse/config.mk
+++ /dev/null
@@ -1,24 +0,0 @@
-#
-# (C) Copyright 2003 Picture Elements, Inc.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# Picture Elements, Inc. JSE boards
-#
-
-TEXT_BASE = 0xFFF80000
diff --git a/board/jse/flash.c b/board/jse/flash.c
deleted file mode 100644
index c462fe0315..0000000000
--- a/board/jse/flash.c
+++ /dev/null
@@ -1,520 +0,0 @@
-/*
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * Modified 4/5/2001
- * Wait for completion of each sector erase command issued
- * 4/5/2001
- * Chris Hallinan - DS4.COM, Inc. - clh@net1plus.com
- */
-
-#include <common.h>
-#include <ppc4xx.h>
-#include <asm/processor.h>
-
-#if CFG_MAX_FLASH_BANKS != 1
-#error "CFG_MAX_FLASH_BANKS must be 1"
-#endif
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (vu_long * addr, flash_info_t * info);
-static int write_word (flash_info_t * info, ulong dest, ulong data);
-static void flash_get_offsets (ulong base, flash_info_t * info);
-
-#define ADDR0 0x5555
-#define ADDR1 0x2aaa
-#define FLASH_WORD_SIZE unsigned char
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- unsigned long size_b0;
-
- /* Init: no FLASHes known */
- flash_info[0].flash_id = FLASH_UNKNOWN;
-
- /* Static FLASH Bank configuration here - FIXME XXX */
-
- size_b0 = flash_get_size ((vu_long *) FLASH_BASE0_PRELIM, &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size_b0, size_b0 << 20);
- }
-
- /* Only one bank */
- /* Setup offsets */
- flash_get_offsets (FLASH_BASE0_PRELIM, &flash_info[0]);
-
- /* Monitor protection ON by default */
- (void) flash_protect (FLAG_PROTECT_SET,
- FLASH_BASE0_PRELIM,
- FLASH_BASE0_PRELIM + monitor_flash_len - 1,
- &flash_info[0]);
- flash_info[0].size = size_b0;
-
- return size_b0;
-}
-
-
-/*-----------------------------------------------------------------------
- */
-/*
- * This implementation assumes that the flash chips are uniform sector
- * devices. This is true for all likely JSE devices.
- */
-static void flash_get_offsets (ulong base, flash_info_t * info)
-{
- unsigned idx;
- unsigned long sector_size = info->size / info->sector_count;
-
- for (idx = 0; idx < info->sector_count; idx += 1) {
- info->start[idx] = base + (idx * sector_size);
- }
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t * info)
-{
- int i;
- int k;
- int size;
- int erased;
- volatile unsigned long *flash;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD:
- printf ("AMD ");
- break;
- case FLASH_MAN_FUJ:
- printf ("FUJITSU ");
- break;
- case FLASH_MAN_SST:
- printf ("SST ");
- break;
- case FLASH_MAN_STM:
- printf ("ST Micro ");
- break;
- default:
- printf ("Unknown Vendor ");
- break;
- }
-
- /* (Reduced table of only parts expected in JSE boards.) */
- switch (info->flash_id) {
- case FLASH_MAN_AMD | FLASH_AM040:
- printf ("AM29F040 (512 Kbit, uniform sector size)\n");
- break;
- case FLASH_MAN_STM | FLASH_AM040:
- printf ("MM29W040W (512 Kbit, uniform sector size)\n");
- break;
- default:
- printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld KB in %d Sectors\n",
- info->size >> 10, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; ++i) {
- /*
- * Check if whole sector is erased
- */
- if (i != (info->sector_count - 1))
- size = info->start[i + 1] - info->start[i];
- else
- size = info->start[0] + info->size - info->start[i];
- erased = 1;
- flash = (volatile unsigned long *) info->start[i];
- size = size >> 2; /* divide by 4 for longword access */
- for (k = 0; k < size; k++) {
- if (*flash++ != 0xffffffff) {
- erased = 0;
- break;
- }
- }
-
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s%s",
- info->start[i],
- erased ? " E" : " ", info->protect[i] ? "RO " : " "
- );
- }
- printf ("\n");
- return;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-static ulong flash_get_size (vu_long * addr, flash_info_t * info)
-{
- short i;
- FLASH_WORD_SIZE value;
- ulong base = (ulong) addr;
- volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *) addr;
-
- /* Write auto select command: read Manufacturer ID */
- addr2[ADDR0] = (FLASH_WORD_SIZE) 0x00AA00AA;
- addr2[ADDR1] = (FLASH_WORD_SIZE) 0x00550055;
- addr2[ADDR0] = (FLASH_WORD_SIZE) 0x00900090;
-
- value = addr2[0];
-
- switch (value) {
- case (FLASH_WORD_SIZE) AMD_MANUFACT:
- info->flash_id = FLASH_MAN_AMD;
- break;
- case (FLASH_WORD_SIZE) FUJ_MANUFACT:
- info->flash_id = FLASH_MAN_FUJ;
- break;
- case (FLASH_WORD_SIZE) SST_MANUFACT:
- info->flash_id = FLASH_MAN_SST;
- break;
- case (FLASH_WORD_SIZE)STM_MANUFACT:
- info->flash_id = FLASH_MAN_STM;
- break;
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- printf("Unknown flash manufacturer code: 0x%x\n", value);
- return (0); /* no or unknown flash */
- }
-
- value = addr2[1]; /* device ID */
-
- switch (value) {
- case (FLASH_WORD_SIZE) AMD_ID_F040B:
- info->flash_id += FLASH_AM040;
- info->sector_count = 8;
- info->size = 0x0080000; /* => 512 ko */
- break;
- case (FLASH_WORD_SIZE) AMD_ID_LV040B:
- info->flash_id += FLASH_AM040;
- info->sector_count = 8;
- info->size = 0x0080000; /* => 512 ko */
- break;
- case (FLASH_WORD_SIZE)STM_ID_M29W040B: /* most likele JSE chip */
- info->flash_id += FLASH_AM040;
- info->sector_count = 8;
- info->size = 0x0080000; /* => 512 ko */
- break;
- default:
- info->flash_id = FLASH_UNKNOWN;
- return (0); /* => no or unknown flash */
-
- }
-
- /* Calculate the sector offsets (Use JSE Optimized code). */
- flash_get_offsets(base, info);
-
- /* check for protected sectors */
- for (i = 0; i < info->sector_count; i++) {
- /* read sector protection at sector address, (A7 .. A0) = 0x02 */
- /* D0 = 1 if protected */
- addr2 = (volatile FLASH_WORD_SIZE *) (info->start[i]);
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST)
- info->protect[i] = 0;
- else
- info->protect[i] = addr2[2] & 1;
- }
-
- /*
- * Prevent writes to uninitialized FLASH.
- */
- if (info->flash_id != FLASH_UNKNOWN) {
- addr2 = (FLASH_WORD_SIZE *) info->start[0];
- *addr2 = (FLASH_WORD_SIZE) 0x00F000F0; /* reset bank */
- }
-
- return (info->size);
-}
-
-int wait_for_DQ7 (flash_info_t * info, int sect)
-{
- ulong start, now, last;
- volatile FLASH_WORD_SIZE *addr =
- (FLASH_WORD_SIZE *) (info->start[sect]);
-
- start = get_timer (0);
- last = start;
- while ((addr[0] & (FLASH_WORD_SIZE) 0x00800080) !=
- (FLASH_WORD_SIZE) 0x00800080) {
- if ((now = get_timer (start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- return -1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- }
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t * info, int s_first, int s_last)
-{
- volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *) (info->start[0]);
- volatile FLASH_WORD_SIZE *addr2;
- int flag, prot, sect, l_sect;
- int i;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("Can't erase unknown flash type - aborted\n");
- return 1;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n", prot);
- } else {
- printf ("\n");
- }
-
- l_sect = -1;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr2 = (FLASH_WORD_SIZE *) (info->start[sect]);
- printf ("Erasing sector %p\n", addr2); /* CLH */
-
- if ((info->flash_id & FLASH_VENDMASK) ==
- FLASH_MAN_SST) {
- addr[ADDR0] = (FLASH_WORD_SIZE) 0x00AA00AA;
- addr[ADDR1] = (FLASH_WORD_SIZE) 0x00550055;
- addr[ADDR0] = (FLASH_WORD_SIZE) 0x00800080;
- addr[ADDR0] = (FLASH_WORD_SIZE) 0x00AA00AA;
- addr[ADDR1] = (FLASH_WORD_SIZE) 0x00550055;
- addr2[0] = (FLASH_WORD_SIZE) 0x00500050; /* block erase */
- for (i = 0; i < 50; i++)
- udelay (1000); /* wait 1 ms */
- } else {
- addr[ADDR0] = (FLASH_WORD_SIZE) 0x00AA00AA;
- addr[ADDR1] = (FLASH_WORD_SIZE) 0x00550055;
- addr[ADDR0] = (FLASH_WORD_SIZE) 0x00800080;
- addr[ADDR0] = (FLASH_WORD_SIZE) 0x00AA00AA;
- addr[ADDR1] = (FLASH_WORD_SIZE) 0x00550055;
- addr2[0] = (FLASH_WORD_SIZE) 0x00300030; /* sector erase */
- }
- l_sect = sect;
- /*
- * Wait for each sector to complete, it's more
- * reliable. According to AMD Spec, you must
- * issue all erase commands within a specified
- * timeout. This has been seen to fail, especially
- * if printf()s are included (for debug)!!
- */
- wait_for_DQ7 (info, sect);
- }
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts ();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
-#if 0
- /*
- * We wait for the last triggered sector
- */
- if (l_sect < 0)
- goto DONE;
- wait_for_DQ7 (info, l_sect);
-
-DONE:
-#endif
- /* reset to read mode */
- addr = (FLASH_WORD_SIZE *) info->start[0];
- addr[0] = (FLASH_WORD_SIZE) 0x00F000F0; /* reset bank */
-
- printf (" done\n");
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int i, l, rc;
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i = 0, cp = wp; i < l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
- for (; i < 4 && cnt > 0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt == 0 && i < 4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
-
- if ((rc = write_word (info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = 0;
- for (i = 0; i < 4; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_word (info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i = 0, cp = wp; i < 4 && cnt > 0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i < 4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
-
- return (write_word (info, wp, data));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word (flash_info_t * info, ulong dest, ulong data)
-{
- volatile FLASH_WORD_SIZE *addr2 =
- (FLASH_WORD_SIZE *) (info->start[0]);
- volatile FLASH_WORD_SIZE *dest2 = (FLASH_WORD_SIZE *) dest;
- volatile FLASH_WORD_SIZE *data2 = (FLASH_WORD_SIZE *) & data;
- ulong start;
- int i;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*((volatile FLASH_WORD_SIZE *) dest) &
- (FLASH_WORD_SIZE) data) != (FLASH_WORD_SIZE) data) {
- return (2);
- }
-
- for (i = 0; i < 4 / sizeof (FLASH_WORD_SIZE); i++) {
- int flag;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
-
- addr2[ADDR0] = (FLASH_WORD_SIZE) 0x00AA00AA;
- addr2[ADDR1] = (FLASH_WORD_SIZE) 0x00550055;
- addr2[ADDR0] = (FLASH_WORD_SIZE) 0x00A000A0;
-
- dest2[i] = data2[i];
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts ();
-
- /* data polling for D7 */
- start = get_timer (0);
- while ((dest2[i] & (FLASH_WORD_SIZE) 0x00800080) !=
- (data2[i] & (FLASH_WORD_SIZE) 0x00800080)) {
-
- if (get_timer (start) > CFG_FLASH_WRITE_TOUT) {
- return (1);
- }
- }
- }
-
- return (0);
-}
diff --git a/board/jse/host_bridge.c b/board/jse/host_bridge.c
deleted file mode 100644
index 363be97a59..0000000000
--- a/board/jse/host_bridge.c
+++ /dev/null
@@ -1,90 +0,0 @@
-/*
- * Copyright (c) 2004 Picture Elements, Inc.
- * Stephen Williams (steve@icarus.com)
- *
- * This source code is free software; you can redistribute it
- * and/or modify it in source code form under the terms of the GNU
- * General Public License as published by the Free Software
- * Foundation; either version 2 of the License, or (at your option)
- * any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
- */
-#ident "$Id:$"
-
-# include <common.h>
-# include <pci.h>
-# include "jse_priv.h"
-
-/*
- * The JSE board has an Intel 21555 non-transparent bridge for
- * communication with the host. We need to render it harmless on the
- * JSE side, but leave it alone on the host (primary) side. Normally,
- * this will all be done before the host BIOS can gain access to the
- * board, due to the Primary Access Lockout bit.
- *
- * The host_bridge_init function is called as a late initialization
- * function, after most of the board is set up, including a PCI scan.
- */
-
-void host_bridge_init (void)
-{
- /* The bridge chip is at a fixed location. */
- pci_dev_t dev = PCI_BDF (0, 10, 0);
-
- /* Set PCI Class code --
- The primary side sees this class code at 0x08 in the
- primary config space. This must be something other then a
- bridge, or MS Windows starts doing weird stuff to me. */
- pci_write_config_dword (dev, 0x48, 0x04800000);
-
- /* Set subsystem ID --
- The primary side sees this value at 0x2c. We set it here so
- that the host can tell what sort of device this is:
- We are a Picture Elements [0x12c5] JSE [0x008a]. */
- pci_write_config_dword (dev, 0x6c, 0x008a12c5);
-
- /* Downstream (Primary-to-Secondary) BARs are set up mostly
- off. We need only the Memory-0 Bar so that the host can get
- at the CSR region to set up tables and the lot. */
-
- /* Downstream Memory 0 setup (4K for CSR) */
- pci_write_config_dword (dev, 0xac, 0xfffff000);
- /* Downstream Memory 1 setup (off) */
- pci_write_config_dword (dev, 0xb0, 0x00000000);
- /* Downstream Memory 2 setup (off) */
- pci_write_config_dword (dev, 0xb4, 0x00000000);
- /* Downstream Memory 3 setup (off) */
- pci_write_config_dword (dev, 0xb8, 0x00000000);
-
- /* Upstream (Secondary-to-Primary) BARs are used to get at
- host memory from the JSE card. Create two regions: a small
- one to manage individual word reads/writes, and a larger
- one for doing bulk frame moves. */
-
- /* Upstream Memory 0 Setup -- (BAR2) 4K non-prefetchable */
- pci_write_config_dword (dev, 0xc4, 0xfffff000);
- /* Upstream Memory 1 setup -- (BAR3) 4K non-prefetchable */
- pci_write_config_dword (dev, 0xc8, 0xfffff000);
-
- /* Upstream Memory 2 (BAR4) uses page translation, and is set
- up in CCR1. Configure for 4K pages. */
-
- /* Set CCR1,0 reigsters. This clears the Primary PCI Lockout
- bit as well, so we are done configuring after this
- point. Therefore, this must be the last step.
-
- CC1[15:12]= 0 (disable I2O message unit)
- CC1[11:8] = 0x5 (4K page size)
- CC0[11] = 1 (Secondary Clock Disable: disable clock)
- CC0[10] = 0 (Primary Access Lockout: allow primary access)
- */
- pci_write_config_dword (dev, 0xcc, 0x05000800);
-}
diff --git a/board/jse/init.S b/board/jse/init.S
deleted file mode 100644
index 231cd1caf5..0000000000
--- a/board/jse/init.S
+++ /dev/null
@@ -1,105 +0,0 @@
-/*------------------------------------------------------------------------+ */
-/* */
-/* This source code has been made available to you by IBM on an AS-IS */
-/* basis. Anyone receiving this source is licensed under IBM */
-/* copyrights to use it in any way he or she deems fit, including */
-/* copying it, modifying it, compiling it, and redistributing it either */
-/* with or without modifications. No license under IBM patents or */
-/* patent applications is to be implied by the copyright license. */
-/* */
-/* Any user of this software should understand that IBM cannot provide */
-/* technical support for this software and will not be responsible for */
-/* any consequences resulting from the use of this software. */
-/* */
-/* Any person who transfers this source code or any derivative work */
-/* must include the IBM copyright notice, this paragraph, and the */
-/* preceding two paragraphs in the transferred software. */
-/* */
-/* COPYRIGHT I B M CORPORATION 1995 */
-/* LICENSED MATERIAL - PROGRAM PROPERTY OF I B M */
-/*------------------------------------------------------------------------- */
-
-/*------------------------------------------------------------------------- */
-/* Function: ext_bus_cntlr_init */
-/* Description: Initializes the External Bus Controller for the external */
-/* peripherals. IMPORTANT: For pass1 this code must run from */
-/* cache since you can not reliably change a peripheral banks */
-/* timing register (pbxap) while running code from that bank. */
-/* For ex., since we are running from ROM on bank 0, we can NOT */
-/* execute the code that modifies bank 0 timings from ROM, so */
-/* we run it from cache. */
-/* */
-/* */
-/* The layout for the PEI JSE board: */
-/* Bank 0 - Flash and SRAM */
-/* Bank 1 - SystemACE */
-/* Bank 2 - not used */
-/* Bank 3 - not used */
-/* Bank 4 - not used */
-/* Bank 5 - not used */
-/* Bank 6 - not used */
-/* Bank 7 - not used */
-/*------------------------------------------------------------------------- */
-#include <ppc4xx.h>
-
-#include <ppc_asm.tmpl>
-#include <ppc_defs.h>
-
-#include <asm/cache.h>
-#include <asm/mmu.h>
-
-#define cpc0_cr0 0xB1
-
- .globl ext_bus_cntlr_init
-ext_bus_cntlr_init:
- mflr r4 /* save link register */
- bl ..getAddr
-..getAddr:
- mflr r3 /* get address of ..getAddr */
- mtlr r4 /* restore link register */
- addi r4,0,14 /* set ctr to 10; used to prefetch */
- mtctr r4 /* 10 cache lines to fit this function */
- /* in cache (gives us 8x10=80 instrctns) */
-..ebcloop:
- icbt r0,r3 /* prefetch cache line for addr in r3 */
- addi r3,r3,32 /* move to next cache line */
- bdnz ..ebcloop /* continue for 10 cache lines */
-
- /*----------------------------------------------------------------- */
- /* Delay to ensure all accesses to ROM are complete before changing */
- /* bank 0 timings. 200usec should be enough. */
- /* 200,000,000 (cycles/sec) X .000200 (sec) = 0x9C40 cycles */
- /*----------------------------------------------------------------- */
- addis r3,0,0x0
- ori r3,r3,0xA000 /* ensure 200usec have passed since reset */
- mtctr r3
-..spinlp:
- bdnz ..spinlp /* spin loop */
-
- /*----------------------------------------------------------------- */
- /* Memory Bank 0 (Flash) initialization */
- /*----------------------------------------------------------------- */
-
- addi r4,0,pb0ap
- mtdcr ebccfga,r4
- addis r4,0,0x9B01
- ori r4,r4,0x5480
- mtdcr ebccfgd,r4
-
- addi r4,0,pb0cr
- mtdcr ebccfga,r4
- addis r4,0,0xFFF1 /* BAS=0xFFF,BS=0x0(1MB),BU=0x3(R/W), */
- ori r4,r4,0x8000 /* BW=0x0( 8 bits) */
- mtdcr ebccfgd,r4
-
- blr
-
-
-/*----------------------------------------------------------------------- */
-/* Function: sdram_init */
-/* Description: This function is called by cpu/ppc4xx/start.S code */
-/* to get the SDRAM initialized. */
-/*----------------------------------------------------------------------- */
- .globl sdram_init
-sdram_init:
- blr
diff --git a/board/jse/jse.c b/board/jse/jse.c
deleted file mode 100644
index 9290814685..0000000000
--- a/board/jse/jse.c
+++ /dev/null
@@ -1,160 +0,0 @@
-/*
- * Copyright (c) 2004 Picture Elements, Inc.
- * Stephen Williams (steve@icarus.com)
- *
- * This source code is free software; you can redistribute it
- * and/or modify it in source code form under the terms of the GNU
- * General Public License as published by the Free Software
- * Foundation; either version 2 of the License, or (at your option)
- * any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
- */
-
-# include <common.h>
-# include <ppc4xx.h>
-# include <asm/processor.h>
-# include <asm/io.h>
-# include "jse_priv.h"
-
-/*
- * This function is run very early, out of flash, and before devices are
- * initialized. It is called by lib_ppc/board.c:board_init_f by virtue
- * of being in the init_sequence array.
- *
- * The SDRAM has been initialized already -- start.S:start called
- * init.S:init_sdram early on -- but it is not yet being used for
- * anything, not even stack. So be careful.
- */
-int board_early_init_f (void)
-{
- /*-------------------------------------------------------------------------+
- | Interrupt controller setup for the JSE board.
- | Note: IRQ 0-15 405GP internally generated; active high; level sensitive
- | IRQ 16 405GP internally generated; active low; level sensitive
- | IRQ 17-24 RESERVED/UNUSED
- | IRQ 25 (EXT IRQ 0) PCI SLOT 0; active low; level sensitive
- | IRQ 26 (EXT IRQ 1) PCI SLOT 1; active low; level sensitive
- | IRQ 27 (EXT IRQ 2) JP2C CHIP ; active low; level sensitive
- | IRQ 28 (EXT IRQ 3) PCI bridge; active low; level sensitive
- | IRQ 29 (EXT IRQ 4) SystemACE IRQ; active high
- | IRQ 30 (EXT IRQ 5) SystemACE BRdy (unused)
- | IRQ 31 (EXT IRQ 6) (unused)
- +-------------------------------------------------------------------------*/
- mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
- mtdcr (uicer, 0x00000000); /* disable all ints */
- mtdcr (uiccr, 0x00000000); /* set all to be non-critical */
- mtdcr (uicpr, 0xFFFFFF87); /* set int polarities */
- mtdcr (uictr, 0x10000000); /* set int trigger levels */
- mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
-
- /* Configure the interface to the SystemACE MCU port.
- The SystemACE is fast, but there is no reason to have
- excessivly tight timings. So the settings are slightly
- generous. */
-
- /* EBC0_B1AP: BME=1, TWT=2, CSN=0, OEN=1,
- WBN=0, WBF=1, TH=0, RE=0, SOR=0, BEM=0, PEN=0 */
- mtdcr (ebccfga, pb1ap);
- mtdcr (ebccfgd, 0x01011000);
-
- /* EBC0_B1CR: BAS=x, BS=0(1MB), BU=3(R/W), BW=0(8bits) */
- mtdcr (ebccfga, pb1cr);
- mtdcr (ebccfgd, CFG_SYSTEMACE_BASE | 0x00018000);
-
- /* Enable the /PerWE output as /PerWE, instead of /PCIINT. */
- /* CPC0_CR1 |= PCIPW */
- mtdcr (0xb2, mfdcr (0xb2) | 0x00004000);
-
- return 0;
-}
-
-#ifdef CONFIG_BOARD_PRE_INIT
-int board_pre_init (void)
-{
- return board_early_init_f ();
-}
-
-#endif
-
-/*
- * This function is also called by lib_ppc/board.c:board_init_f (it is
- * also in the init_sequence array) but later. Many more things are
- * configured, but we are still running from flash.
- */
-int checkboard (void)
-{
- unsigned vers, status;
-
- /* check that the SystemACE chip is alive. */
- printf ("ACE: ");
- vers = readw (CFG_SYSTEMACE_BASE + 0x16);
- printf ("SystemACE %u.%u (build %u)",
- (vers >> 12) & 0x0f, (vers >> 8) & 0x0f, vers & 0xff);
-
- status = readl (CFG_SYSTEMACE_BASE + 0x04);
-#ifdef DEBUG
- printf (" STATUS=0x%08x", status);
-#endif
- /* If the flash card is present and there is an initial error,
- then force a restart of the program. */
- if (status & 0x00000010) {
- printf (" CFDETECT");
-
- if (status & 0x04) {
- /* CONTROLREG = CFGPROG */
- writew (0x1000, CFG_SYSTEMACE_BASE + 0x18);
- udelay (500);
- /* CONTROLREG = CFGRESET */
- writew (0x0080, CFG_SYSTEMACE_BASE + 0x18);
- udelay (500);
- writew (0x0000, CFG_SYSTEMACE_BASE + 0x18);
- /* CONTROLREG = CFGSTART */
- writew (0x0020, CFG_SYSTEMACE_BASE + 0x18);
-
- status = readl (CFG_SYSTEMACE_BASE + 0x04);
- }
- }
-
- /* Wait for the SystemACE to program its chain of devices. */
- while ((status & 0x84) == 0x00) {
- udelay (500);
- status = readl (CFG_SYSTEMACE_BASE + 0x04);
- }
-
- if (status & 0x04)
- printf (" CFG-ERROR");
- if (status & 0x80)
- printf (" CFGDONE");
-
- printf ("\n");
-
- /* Force /RTS to active. The board it not wired quite
- correctly to use cts/rtc flow control, so just force the
- /RST active and forget about it. */
- writeb (readb (0xef600404) | 0x03, 0xef600404);
-
- printf ("JSE: ready\n");
-
- return 0;
-}
-
-/* **** No more functions called by board_init_f. **** */
-
-/*
- * This function is called by lib_ppc/board.c:board_init_r. At this
- * point, basic setup is done, U-Boot has been moved into SDRAM and
- * PCI has been set up. From here we done late setup.
- */
-int misc_init_r (void)
-{
- host_bridge_init ();
- return 0;
-}
diff --git a/board/jse/jse_priv.h b/board/jse/jse_priv.h
deleted file mode 100644
index ed4894b939..0000000000
--- a/board/jse/jse_priv.h
+++ /dev/null
@@ -1,25 +0,0 @@
-#ifndef __jse_priv_H
-#define __jse_prov_H
-/*
- * Copyright (c) 2004 Picture Elements, Inc.
- * Stephen Williams (steve@icarus.com)
- *
- * This source code is free software; you can redistribute it
- * and/or modify it in source code form under the terms of the GNU
- * General Public License as published by the Free Software
- * Foundation; either version 2 of the License, or (at your option)
- * any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
- */
-
-extern void host_bridge_init(void);
-
-#endif
diff --git a/board/jse/sdram.c b/board/jse/sdram.c
deleted file mode 100644
index 9060d979d0..0000000000
--- a/board/jse/sdram.c
+++ /dev/null
@@ -1,182 +0,0 @@
-/*
- * Copyright (c) 2004 Picture Elements, Inc.
- * Stephen Williams (steve@icarus.com)
- *
- * This source code is free software; you can redistribute it
- * and/or modify it in source code form under the terms of the GNU
- * General Public License as published by the Free Software
- * Foundation; either version 2 of the License, or (at your option)
- * any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
- */
-
-#include <common.h>
-#include <ppc4xx.h>
-#include <asm/processor.h>
-
-# define SDRAM_LEN 0x08000000
-
-/*
- * this is even after checkboard. It returns the size of the SDRAM
- * that we have installed. This function is called by board_init_f
- * in lib_ppc/board.c to initialize the memory and return what I
- * found.
- */
-long int initdram (int board_type)
-{
- /* Configure the SDRAMS */
-
- /* disable memory controller */
- mtdcr (memcfga, mem_mcopt1);
- mtdcr (memcfgd, 0x00000000);
-
- udelay (500);
-
- /* Clear SDRAM0_BESR0 (Bus Error Syndrome Register) */
- mtdcr (memcfga, mem_besra);
- mtdcr (memcfgd, 0xffffffff);
-
- /* Clear SDRAM0_BESR1 (Bus Error Syndrome Register) */
- mtdcr (memcfga, mem_besrb);
- mtdcr (memcfgd, 0xffffffff);
-
- /* Clear SDRAM0_ECCCFG (disable ECC) */
- mtdcr (memcfga, mem_ecccf);
- mtdcr (memcfgd, 0x00000000);
-
- /* Clear SDRAM0_ECCESR (ECC Error Syndrome Register) */
- mtdcr (memcfga, mem_eccerr);
- mtdcr (memcfgd, 0xffffffff);
-
- /* Timing register: CASL=2, PTA=2, CTP=2, LDF=1, RFTA=5, RCD=2 */
- mtdcr (memcfga, mem_sdtr1);
- mtdcr (memcfgd, 0x010a4016);
-
- /* Memory Bank 0 Config == BA=0x00000000, SZ=64M, AM=3, BE=1 */
- mtdcr (memcfga, mem_mb0cf);
- mtdcr (memcfgd, 0x00084001);
-
- /* Memory Bank 1 Config == BA=0x04000000, SZ=64M, AM=3, BE=1 */
- mtdcr (memcfga, mem_mb1cf);
- mtdcr (memcfgd, 0x04084001);
-
- /* Memory Bank 2 Config == BE=0 */
- mtdcr (memcfga, mem_mb2cf);
- mtdcr (memcfgd, 0x00000000);
-
- /* Memory Bank 3 Config == BE=0 */
- mtdcr (memcfga, mem_mb3cf);
- mtdcr (memcfgd, 0x00000000);
-
- /* refresh timer = 0x400 */
- mtdcr (memcfga, mem_rtr);
- mtdcr (memcfgd, 0x04000000);
-
- /* Power management idle timer set to the default. */
- mtdcr (memcfga, mem_pmit);
- mtdcr (memcfgd, 0x07c00000);
-
- udelay (500);
-
- /* Enable banks (DCE=1, BPRF=1, ECCDD=1, EMDUL=1) */
- mtdcr (memcfga, mem_mcopt1);
- mtdcr (memcfgd, 0x80e00000);
-
- return SDRAM_LEN;
-}
-
-/*
- * The U-Boot core, as part of the initialization to prepare for
- * loading the monitor into SDRAM, requests of this function that the
- * memory be tested. Return 0 if the memory tests OK.
- */
-int testdram (void)
-{
- unsigned long idx;
- unsigned val;
- unsigned errors;
- volatile unsigned long *sdram;
-
-#ifdef DEBUG
- printf ("SDRAM Controller Registers --\n");
-
- mtdcr (memcfga, mem_mcopt1);
- val = mfdcr (memcfgd);
- printf (" SDRAM0_CFG : 0x%08x\n", val);
-
- mtdcr (memcfga, 0x24);
- val = mfdcr (memcfgd);
- printf (" SDRAM0_STATUS: 0x%08x\n", val);
-
- mtdcr (memcfga, mem_mb0cf);
- val = mfdcr (memcfgd);
- printf (" SDRAM0_B0CR : 0x%08x\n", val);
-
- mtdcr (memcfga, mem_mb1cf);
- val = mfdcr (memcfgd);
- printf (" SDRAM0_B1CR : 0x%08x\n", val);
-
- mtdcr (memcfga, mem_sdtr1);
- val = mfdcr (memcfgd);
- printf (" SDRAM0_TR : 0x%08x\n", val);
-
- mtdcr (memcfga, mem_rtr);
- val = mfdcr (memcfgd);
- printf (" SDRAM0_RTR : 0x%08x\n", val);
-#endif
-
- /* Wait for memory to be ready by testing MRSCMPbit
- bit. Really, there should already have been plenty of time,
- given it was started long ago. But, best to check. */
- for (idx = 0; idx < 1000000; idx += 1) {
- mtdcr (memcfga, 0x24);
- val = mfdcr (memcfgd);
- if (val & 0x80000000)
- break;
- }
-
- if (!(val & 0x80000000)) {
- printf ("SDRAM ERROR: SDRAM0_STATUS never set!\n");
- return 1;
- }
-
- /* Start memory test. */
- printf ("test: %u MB - ", SDRAM_LEN / 1048576);
-
- sdram = (unsigned long *) CFG_SDRAM_BASE;
-
- printf ("write - ");
- for (idx = 2; idx < SDRAM_LEN / 4; idx += 2) {
- sdram[idx + 0] = idx;
- sdram[idx + 1] = ~idx;
- }
-
- printf ("read - ");
- errors = 0;
- for (idx = 2; idx < SDRAM_LEN / 4; idx += 2) {
- if (sdram[idx + 0] != idx)
- errors += 1;
- if (sdram[idx + 1] != ~idx)
- errors += 1;
- if (errors > 0)
- break;
- }
-
- if (errors > 0) {
- printf ("NOT OK\n");
- printf ("FIRST ERROR at %p: 0x%08lx:0x%08lx != 0x%08lx:0x%08lx\n",
- sdram + idx, sdram[idx + 0], sdram[idx + 1], idx, ~idx);
- return 1;
- }
-
- printf ("ok\n");
- return 0;
-}
diff --git a/board/jse/u-boot.lds b/board/jse/u-boot.lds
deleted file mode 100644
index 60c111539d..0000000000
--- a/board/jse/u-boot.lds
+++ /dev/null
@@ -1,143 +0,0 @@
-/*
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- .resetvec 0xFFFFFFFC :
- {
- *(.resetvec)
- } = 0xffff
-
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text : {
- /* The start.o file includes the initial jump vector that
- must be located in the beginning. It is the basic run-
- time function that calls all other functions. */
- cpu/ppc4xx/start.o (.text)
-
- board/jse/init.o (.text)
- cpu/ppc4xx/kgdb.o (.text)
-
-/* . = env_offset;*/
-/* common/environment.o(.text)*/
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/kb9202/Makefile b/board/kb9202/Makefile
deleted file mode 100644
index f36d88dc3f..0000000000
--- a/board/kb9202/Makefile
+++ /dev/null
@@ -1,49 +0,0 @@
-#
-# (C) Copyright 2003
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-# Adapted for KwikByte KB920x boards - APR2005
-#
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := kb9202.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS) $(SOBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/kb9202/config.mk b/board/kb9202/config.mk
deleted file mode 100644
index 9ce161e55f..0000000000
--- a/board/kb9202/config.mk
+++ /dev/null
@@ -1 +0,0 @@
-TEXT_BASE = 0x21f00000
diff --git a/board/kb9202/kb9202.c b/board/kb9202/kb9202.c
deleted file mode 100644
index 4a7cf77ba5..0000000000
--- a/board/kb9202/kb9202.c
+++ /dev/null
@@ -1,97 +0,0 @@
-/*
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * Adapted for KwikByte KB920x board from at91rm9200dk.c: 22APR2005
- */
-
-#include <common.h>
-#include <asm/arch/AT91RM9200.h>
-#include <at91rm9200_net.h>
-#include <lxt971a.h>
-
-/* ------------------------------------------------------------------------- */
-/*
- * Miscelaneous platform dependent initialisations
- */
-
-void lowlevel_init(void) {
- /* Required by assembly functions - do nothing */
-}
-
-int board_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- /* Enable Ctrlc */
- console_init_f ();
-
- /* memory and cpu-speed are setup before relocation */
- /* so we do _nothing_ here */
-
- gd->bd->bi_arch_number = MACH_TYPE_KB9200;
-
- /* adress of boot parameters */
- gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
-
- return 0;
-}
-
-int dram_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- gd->bd->bi_dram[0].start = PHYS_SDRAM;
- gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
- return 0;
-}
-
-#ifdef CONFIG_DRIVER_ETHER
-#if (CONFIG_COMMANDS & CFG_CMD_NET)
-
-unsigned int lxt972_IsPhyConnected (AT91PS_EMAC p_mac);
-UCHAR lxt972_GetLinkSpeed (AT91PS_EMAC p_mac);
-UCHAR lxt972_InitPhy (AT91PS_EMAC p_mac);
-UCHAR lxt972_AutoNegotiate (AT91PS_EMAC p_mac, int *status);
-
-/*
- * Name:
- * at91rm9200_GetPhyInterface
- * Description:
- * Initialise the interface functions to the PHY
- * Arguments:
- * None
- * Return value:
- * None
- */
-void at91rm9200_GetPhyInterface(AT91PS_PhyOps p_phyops)
-{
- p_phyops->Init = lxt972_InitPhy;
- p_phyops->IsPhyConnected = lxt972_IsPhyConnected;
- p_phyops->GetLinkSpeed = lxt972_GetLinkSpeed;
- p_phyops->AutoNegotiate = lxt972_AutoNegotiate;
-}
-
-#endif /* CONFIG_COMMANDS & CFG_CMD_NET */
-#endif /* CONFIG_DRIVER_ETHER */
diff --git a/board/kb9202/u-boot.lds b/board/kb9202/u-boot.lds
deleted file mode 100644
index 76df6b2af1..0000000000
--- a/board/kb9202/u-boot.lds
+++ /dev/null
@@ -1,56 +0,0 @@
-/*
- * (C) Copyright 2002
- * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-/*OUTPUT_FORMAT("elf32-arm", "elf32-arm", "elf32-arm")*/
-OUTPUT_ARCH(arm)
-ENTRY(_start)
-SECTIONS
-{
- . = 0x00000000;
-
- . = ALIGN(4);
- .text :
- {
- cpu/arm920t/start.o (.text)
- *(.text)
- }
-
- . = ALIGN(4);
- .rodata : { *(.rodata) }
-
- . = ALIGN(4);
- .data : { *(.data) }
-
- . = ALIGN(4);
- .got : { *(.got) }
-
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = ALIGN(4);
- __bss_start = .;
- .bss : { *(.bss) }
- _end = .;
-}
diff --git a/board/kup/Makefile b/board/kup/Makefile
deleted file mode 100644
index 071f0d2ac5..0000000000
--- a/board/kup/Makefile
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# (C) Copyright 2000-2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o kup.o
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/kup/common/flash.c b/board/kup/common/flash.c
deleted file mode 100644
index 903c88f06c..0000000000
--- a/board/kup/common/flash.c
+++ /dev/null
@@ -1,515 +0,0 @@
-/*
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-
-#ifndef CFG_ENV_ADDR
-#define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_ENV_OFFSET)
-#endif
-
-#define CONFIG_FLASH_16BIT
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (vu_long *addr, flash_info_t *info);
-static int write_word (flash_info_t *info, ulong dest, ulong data);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- unsigned long size_b0;
- int i;
-
- /* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* Static FLASH Bank configuration here - FIXME XXX */
-
- size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size_b0, size_b0<<20);
- }
-
-
- /* Remap FLASH according to real size */
- memctl->memc_or0 = CFG_OR_TIMING_FLASH | (-size_b0 & OR_AM_MSK);
- memctl->memc_br0 = (CFG_FLASH_BASE & BR_BA_MSK) | BR_MS_GPCM | BR_V | BR_PS_16;
-
- /* Re-do sizing to get full correct info */
- size_b0 = flash_get_size((vu_long *)CFG_FLASH_BASE, &flash_info[0]);
-
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
- /* monitor protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+monitor_flash_len-1,
- &flash_info[0]);
-#endif
-
-#ifdef CFG_ENV_IS_IN_FLASH
- /* ENV protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR+CFG_ENV_SIZE-1,
- &flash_info[0]);
-#endif
-
- flash_info[0].size = size_b0;
-
- return (size_b0);
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD: printf ("AMD "); break;
- case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
- default: printf ("Unknown Vendor "); break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM400B: printf ("AM29LV400B (4 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM400T: printf ("AM29LV400T (4 Mbit, top boot sector)\n");
- break;
- case FLASH_AM800B: printf ("AM29LV800B (8 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM800T: printf ("AM29LV800T (8 Mbit, top boot sector)\n");
- break;
- case FLASH_AM160B: printf ("AM29LV160B (16 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM160T: printf ("AM29LV160T (16 Mbit, top boot sector)\n");
- break;
- case FLASH_AM320B: printf ("AM29LV320B (32 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM320T: printf ("AM29LV320T (32 Mbit, top boot sector)\n");
- break;
- default: printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " "
- );
- }
- printf ("\n");
- return;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-
-static ulong flash_get_size (vu_long *addr, flash_info_t *info)
-{
- short i;
- ulong value;
- ulong base = (ulong)addr;
-
- /* Write auto select command: read Manufacturer ID */
- vu_short *s_addr=(vu_short*)addr;
- s_addr[0x5555] = 0x00AA;
- s_addr[0x2AAA] = 0x0055;
- s_addr[0x5555] = 0x0090;
-
- value = s_addr[0];
- value = value|(value<<16);
-
- switch (value) {
- case AMD_MANUFACT:
- info->flash_id = FLASH_MAN_AMD;
- break;
- case FUJ_MANUFACT:
- info->flash_id = FLASH_MAN_FUJ;
- break;
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- return (0); /* no or unknown flash */
- }
-
- value = s_addr[1];
- value = value|(value<<16);
-
- switch (value) {
- case FUJI_ID_29F800BA:
- info->flash_id += FLASH_AM400T;
- info->sector_count = 19;
- info->size = 0x00100000;
- break; /* => 1 MB */
- case AMD_ID_LV800T:
- info->flash_id += FLASH_AM800T;
- info->sector_count = 19;
- info->size = 0x00100000;
- break; /* => 1 MB */
- case AMD_ID_LV800B:
- info->flash_id += FLASH_AM800B;
- info->sector_count = 19;
- info->size = 0x00100000;
- break; /* => 1 MB */
- default:
- info->flash_id = FLASH_UNKNOWN;
- return (0); /* => no or unknown flash */
- }
-
- /* set up sector start address table */
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00004000;
- info->start[2] = base + 0x00006000;
- info->start[3] = base + 0x00008000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00010000) - 0x00030000;
- }
-
-
- /* check for protected sectors */
- for (i = 0; i < info->sector_count; i++) {
- /* read sector protection at sector address, (A7 .. A0) = 0x02 */
- /* D0 = 1 if protected */
- s_addr = (volatile unsigned short *)(info->start[i]);
- info->protect[i] = s_addr[2] & 1;
- }
-
- /*
- * Prevent writes to uninitialized FLASH.
- */
- if (info->flash_id != FLASH_UNKNOWN) {
- s_addr = (volatile unsigned short *)info->start[0];
- *s_addr = 0x00F0; /* reset bank */
- }
- return (info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- vu_long *addr = (vu_long*)(info->start[0]);
- int flag, prot, sect;
- ulong start, now, last;
-#ifdef CONFIG_FLASH_16BIT
- vu_short *s_addr = (vu_short*)addr;
-#endif
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-/*#ifndef CONFIG_FLASH_16BIT
- ulong type;
- type = (info->flash_id & FLASH_VENDMASK);
- if ((type != FLASH_MAN_SST) && (type != FLASH_MAN_STM)) {
- printf ("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- return;
- }
-#endif*/
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- start = get_timer (0);
- last = start;
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
-#ifdef CONFIG_FLASH_16BIT
- vu_short *s_sect_addr = (vu_short*)(info->start[sect]);
-#else
- vu_long *sect_addr = (vu_long*)(info->start[sect]);
-#endif
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
-#ifdef CONFIG_FLASH_16BIT
-
- /*printf("\ns_sect_addr=%x",s_sect_addr);*/
- s_addr[0x5555] = 0x00AA;
- s_addr[0x2AAA] = 0x0055;
- s_addr[0x5555] = 0x0080;
- s_addr[0x5555] = 0x00AA;
- s_addr[0x2AAA] = 0x0055;
- s_sect_addr[0] = 0x0030;
-#else
- addr[0x5555] = 0x00AA00AA;
- addr[0x2AAA] = 0x00550055;
- addr[0x5555] = 0x00800080;
- addr[0x5555] = 0x00AA00AA;
- addr[0x2AAA] = 0x00550055;
- sect_addr[0] = 0x00300030;
-#endif
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
-#ifdef CONFIG_FLASH_16BIT
- while ((s_sect_addr[0] & 0x0080) != 0x0080) {
-#else
- while ((sect_addr[0] & 0x00800080) != 0x00800080) {
-#endif
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- return 1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- }
- }
- }
-
- /* reset to read mode */
- addr = (volatile unsigned long *)info->start[0];
-#ifdef CONFIG_FLASH_16BIT
- s_addr[0] = 0x00F0; /* reset bank */
-#else
- addr[0] = 0x00F000F0; /* reset bank */
-#endif
-
- printf (" done\n");
- return 0;
-}
-
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int i, l, rc;
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
- for (; i<4 && cnt>0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = 0;
- for (i=0; i<4; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- return (write_word(info, wp, data));
-}
-
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word (flash_info_t *info, ulong dest, ulong data)
-{
- vu_long *addr = (vu_long*)(info->start[0]);
-
-#ifdef CONFIG_FLASH_16BIT
- vu_short high_data;
- vu_short low_data;
- vu_short *s_addr = (vu_short*)addr;
-#endif
- ulong start;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*((vu_long *)dest) & data) != data) {
- return (2);
- }
-
-#ifdef CONFIG_FLASH_16BIT
- /* Write the 16 higher-bits */
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- high_data = ((data>>16) & 0x0000ffff);
-
- s_addr[0x5555] = 0x00AA;
- s_addr[0x2AAA] = 0x0055;
- s_addr[0x5555] = 0x00A0;
-
- *((vu_short *)dest) = high_data;
-
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* data polling for D7 */
- start = get_timer (0);
- while ((*((vu_short *)dest) & 0x0080) != (high_data & 0x0080)) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- return (1);
- }
- }
-
-
- /* Write the 16 lower-bits */
-#endif
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-#ifdef CONFIG_FLASH_16BIT
- dest += 0x2;
- low_data = (data & 0x0000ffff);
-
- s_addr[0x5555] = 0x00AA;
- s_addr[0x2AAA] = 0x0055;
- s_addr[0x5555] = 0x00A0;
- *((vu_short *)dest) = low_data;
-
-#else
- addr[0x5555] = 0x00AA00AA;
- addr[0x2AAA] = 0x00550055;
- addr[0x5555] = 0x00A000A0;
- *((vu_long *)dest) = data;
-#endif
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* data polling for D7 */
- start = get_timer (0);
-
-#ifdef CONFIG_FLASH_16BIT
- while ((*((vu_short *)dest) & 0x0080) != (low_data & 0x0080)) {
-#else
- while ((*((vu_long *)dest) & 0x00800080) != (data & 0x00800080)) {
-#endif
-
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- return (1);
- }
- }
- return (0);
-}
diff --git a/board/kup/common/kup.c b/board/kup/common/kup.c
deleted file mode 100644
index d018e3cc5d..0000000000
--- a/board/kup/common/kup.c
+++ /dev/null
@@ -1,83 +0,0 @@
-/*
- * (C) Copyright 2004
- * Klaus Heydeck, Kieback & Peter GmbH & Co KG, heydeck@kieback-peter.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-#include "kup.h"
-
-int misc_init_f (void)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile sysconf8xx_t *siu = &immap->im_siu_conf;
-
- while (siu->sc_sipend & 0x20000000) {
- /* printf("waiting for 5V VCC\n"); */
- ;
- }
-
- /* RS232 / RS485 default is RS232 */
- immap->im_ioport.iop_padat &= ~(PA_RS485);
- immap->im_ioport.iop_papar &= ~(PA_RS485);
- immap->im_ioport.iop_paodr &= ~(PA_RS485);
- immap->im_ioport.iop_padir |= (PA_RS485);
- return (0);
-}
-
-
-#ifdef CONFIG_IDE_LED
-void ide_led (uchar led, uchar status)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
-
- /* We have one led for both pcmcia slots */
- if (status) { /* led on */
- immap->im_ioport.iop_padat &= ~(PA_LED_YELLOW);
- } else {
- immap->im_ioport.iop_padat |= (PA_LED_YELLOW);
- }
-}
-#endif
-
-void poweron_key (void)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
-
- immap->im_ioport.iop_pcpar &= ~(PC_SWITCH1);
- immap->im_ioport.iop_pcdir &= ~(PC_SWITCH1);
-
- if (immap->im_ioport.iop_pcdat & (PC_SWITCH1))
- setenv ("key1", "off");
- else
- setenv ("key1", "on");
-}
-
-#ifdef CONFIG_POST
-/*
- * Returns 1 if keys pressed to start the power-on long-running tests
- * Called from board_init_f().
- */
-int post_hotkeys_pressed (void)
-{
- return (0);
-}
-#endif
diff --git a/board/kup/common/kup.h b/board/kup/common/kup.h
deleted file mode 100644
index 70d7f01e68..0000000000
--- a/board/kup/common/kup.h
+++ /dev/null
@@ -1,44 +0,0 @@
-/*
- * (C) Copyright 2004
- * Klaus Heydeck, Kieback & Peter GmbH & Co KG, heydeck@kieback-peter.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef __KUP_H
-#define __KUP_H
-
-#define PA_8 0x0080
-#define PA_11 0x0010
-#define PA_12 0x0008
-
-#define PB_14 0x00020000
-#define PB_17 0x00004000
-
-#define PC_9 0x0040
-
-#define PA_RS485 PA_11 /* SCC1: 0=RS232 1=RS485 */
-#define PA_LED_YELLOW PA_8
-#define BP_USB_VCC PB_14 /* VCC for USB devices 0=vcc on, 1=vcc off*/
-#define PB_LCD_PWM PB_17 /* PB 17 */
-#define PC_SWITCH1 PC_9 /* Reboot switch */
-
-extern void poweron_key (void);
-
-#endif /* __KUP_H */
diff --git a/board/kup/common/load_sernum_ethaddr.c b/board/kup/common/load_sernum_ethaddr.c
deleted file mode 100644
index b7b7499857..0000000000
--- a/board/kup/common/load_sernum_ethaddr.c
+++ /dev/null
@@ -1,94 +0,0 @@
-/*
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-
-/*-----------------------------------------------------------------------
- * Process Hardware Information Block:
- *
- * If we boot on a system fresh from factory, check if the Hardware
- * Information Block exists and save the information it contains.
- *
- * The KUP Hardware Information Block is defined as
- * follows:
- * - located in first flash bank
- * - starts at offset CFG_HWINFO_OFFSET
- * - size CFG_HWINFO_SIZE
- *
- * Internal structure:
- * - sequence of ASCII character lines
- * - fields separated by <CR><LF>
- * - last field terminated by NUL character (0x00)
- *
- * Fields in Hardware Information Block:
- * 1) Module Type
- * 2) MAC Address
- * 3) ....
- */
-
-
-#define ETHADDR_TOKEN "ethaddr="
-#define LCD_TOKEN "lcd="
-
-void load_sernum_ethaddr (void)
-{
- unsigned char *hwi;
- char *var;
- unsigned char hwi_stack[CFG_HWINFO_SIZE];
- char *p;
-
- hwi = (unsigned char *) (CFG_FLASH_BASE + CFG_HWINFO_OFFSET);
- if (*((unsigned long *) hwi) != (unsigned long) CFG_HWINFO_MAGIC) {
- printf ("HardwareInfo not found!\n");
- return;
- }
- memcpy (hwi_stack, hwi, CFG_HWINFO_SIZE);
-
- /*
- ** ethaddr
- */
- var = strstr ((char *)hwi_stack, ETHADDR_TOKEN);
- if (var) {
- var += sizeof (ETHADDR_TOKEN) - 1;
- p = strchr (var, '\r');
- if ((unsigned char *)p < hwi + CFG_HWINFO_SIZE) {
- *p = '\0';
- setenv ("ethaddr", var);
- *p = '\r';
- }
- }
- /*
- ** lcd
- */
- var = strstr ((char *)hwi_stack, LCD_TOKEN);
- if (var) {
- var += sizeof (LCD_TOKEN) - 1;
- p = strchr (var, '\r');
- if ((unsigned char *)p < hwi + CFG_HWINFO_SIZE) {
- *p = '\0';
- setenv ("lcd", var);
- *p = '\r';
- }
- }
-}
diff --git a/board/kup/kup4k/Makefile b/board/kup/kup4k/Makefile
deleted file mode 100644
index 62d289b436..0000000000
--- a/board/kup/kup4k/Makefile
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# (C) Copyright 2000-2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o ../common/flash.o ../common/kup.o ../common/load_sernum_ethaddr.o
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/kup/kup4k/config.mk b/board/kup/kup4k/config.mk
deleted file mode 100644
index 22e30b2cac..0000000000
--- a/board/kup/kup4k/config.mk
+++ /dev/null
@@ -1,28 +0,0 @@
-#
-# (C) Copyright 2000-2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# KUP4K board
-#
-
-TEXT_BASE = 0x40000000
diff --git a/board/kup/kup4k/kup4k.c b/board/kup/kup4k/kup4k.c
deleted file mode 100644
index e621c436ff..0000000000
--- a/board/kup/kup4k/kup4k.c
+++ /dev/null
@@ -1,459 +0,0 @@
-/*
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- * Klaus Heydeck, Kieback & Peter GmbH & Co KG, heydeck@kieback-peter.de
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-#include "../common/kup.h"
-#ifdef CONFIG_KUP4K_LOGO
- #include "s1d13706.h"
-#endif
-
-#undef DEBUG
-#ifdef DEBUG
-# define debugk(fmt,args...) printf(fmt ,##args)
-#else
-# define debugk(fmt,args...)
-#endif
-
-typedef struct {
- volatile unsigned char *VmemAddr;
- volatile unsigned char *RegAddr;
-} FB_INFO_S1D13xxx;
-
-
-/* ------------------------------------------------------------------------- */
-
-#if 0
-static long int dram_size (long int, long int *, long int);
-#endif
-
-#ifdef CONFIG_KUP4K_LOGO
-void lcd_logo(bd_t *bd);
-#endif
-
-
-/* ------------------------------------------------------------------------- */
-
-#define _NOT_USED_ 0xFFFFFFFF
-
-const uint sdram_table[] = {
- /*
- * Single Read. (Offset 0 in UPMA RAM)
- */
- 0x1F07FC04, 0xEEAEFC04, 0x11ADFC04, 0xEFBBBC00,
- 0x1FF77C47, /* last */
-
- /*
- * SDRAM Initialization (offset 5 in UPMA RAM)
- *
- * This is no UPM entry point. The following definition uses
- * the remaining space to establish an initialization
- * sequence, which is executed by a RUN command.
- *
- */
- 0x1FF77C35, 0xEFEABC34, 0x1FB57C35, /* last */
-
- /*
- * Burst Read. (Offset 8 in UPMA RAM)
- */
- 0x1F07FC04, 0xEEAEFC04, 0x10ADFC04, 0xF0AFFC00,
- 0xF0AFFC00, 0xF1AFFC00, 0xEFBBBC00, 0x1FF77C47, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /*
- * Single Write. (Offset 18 in UPMA RAM)
- */
- 0x1F27FC04, 0xEEAEBC00, 0x01B93C04, 0x1FF77C47, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /*
- * Burst Write. (Offset 20 in UPMA RAM)
- */
- 0x1F07FC04, 0xEEAEBC00, 0x10AD7C00, 0xF0AFFC00,
- 0xF0AFFC00, 0xE1BBBC04, 0x1FF77C47, /* last */
- _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /*
- * Refresh (Offset 30 in UPMA RAM)
- */
- 0x1FF5FC84, 0xFFFFFC04, 0xFFFFFC04, 0xFFFFFC04,
- 0xFFFFFC84, 0xFFFFFC07, /* last */
- _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /*
- * Exception. (Offset 3c in UPMA RAM)
- */
- 0x7FFFFC07, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_,
-};
-
-/* ------------------------------------------------------------------------- */
-
-
-/*
- * Check Board Identity:
- */
-
-int checkboard (void)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- uchar *latch,rev,mod;
-
- /*
- * Init ChipSelect #4 (CAN + HW-Latch)
- */
- immap->im_memctl.memc_or4 = 0xFFFF8926;
- immap->im_memctl.memc_br4 = 0x90000401;
- __asm__ ("eieio");
- latch=(uchar *)0x90000200;
- rev = (*latch & 0xF8) >> 3;
- mod=(*latch & 0x03);
- printf ("Board: KUP4K Rev %d.%d\n",rev,mod);
- return (0);
-}
-
-/* ------------------------------------------------------------------------- */
-
-long int initdram (int board_type)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- long int size_b0 = 0;
- long int size_b1 = 0;
- long int size_b2 = 0;
-
- upmconfig (UPMA, (uint *) sdram_table,
- sizeof (sdram_table) / sizeof (uint));
-
- /*
- * Preliminary prescaler for refresh (depends on number of
- * banks): This value is selected for four cycles every 62.4 us
- * with two SDRAM banks or four cycles every 31.2 us with one
- * bank. It will be adjusted after memory sizing.
- */
- memctl->memc_mptpr = CFG_MPTPR;
-
- memctl->memc_mar = 0x00000088;
-
- /*
- * Map controller banks 1 and 2 to the SDRAM banks 2 and 3 at
- * preliminary addresses - these have to be modified after the
- * SDRAM size has been determined.
- */
-/* memctl->memc_or1 = CFG_OR1_PRELIM; */
-/* memctl->memc_br1 = CFG_BR1_PRELIM; */
-
-/* memctl->memc_or2 = CFG_OR2_PRELIM; */
-/* memctl->memc_br2 = CFG_BR2_PRELIM; */
-
-
- memctl->memc_mamr = CFG_MAMR & (~(MAMR_PTAE)); /* no refresh yet */
-
- udelay (200);
-
- /* perform SDRAM initializsation sequence */
-
- memctl->memc_mcr = 0x80002105; /* SDRAM bank 0 */
- udelay (1);
- memctl->memc_mcr = 0x80002830; /* SDRAM bank 0 - execute twice */
- udelay (1);
- memctl->memc_mcr = 0x80002106; /* SDRAM bank 0 - RUN MRS Pattern from loc 6 */
- udelay (1);
-
- memctl->memc_mcr = 0x80004105; /* SDRAM bank 1 */
- udelay (1);
- memctl->memc_mcr = 0x80004830; /* SDRAM bank 1 - execute twice */
- udelay (1);
- memctl->memc_mcr = 0x80004106; /* SDRAM bank 1 - RUN MRS Pattern from loc 6 */
- udelay (1);
-
- memctl->memc_mcr = 0x80006105; /* SDRAM bank 2 */
- udelay (1);
- memctl->memc_mcr = 0x80006830; /* SDRAM bank 2 - execute twice */
- udelay (1);
- memctl->memc_mcr = 0x80006106; /* SDRAM bank 2 - RUN MRS Pattern from loc 6 */
- udelay (1);
-
- memctl->memc_mamr |= MAMR_PTAE; /* enable refresh */
- udelay (1000);
-
-#if 0 /* 3 x 8MB */
- size_b0 = 0x00800000;
- size_b1 = 0x00800000;
- size_b2 = 0x00800000;
- memctl->memc_mptpr = CFG_MPTPR;
- udelay (1000);
- memctl->memc_or1 = 0xFF800A00;
- memctl->memc_br1 = 0x00000081;
- memctl->memc_or2 = 0xFF000A00;
- memctl->memc_br2 = 0x00800081;
- memctl->memc_or3 = 0xFE000A00;
- memctl->memc_br3 = 0x01000081;
-#else /* 3 x 16 MB */
- size_b0 = 0x01000000;
- size_b1 = 0x01000000;
- size_b2 = 0x01000000;
- memctl->memc_mptpr = CFG_MPTPR;
- udelay (1000);
- memctl->memc_or1 = 0xFF000A00;
- memctl->memc_br1 = 0x00000081;
- memctl->memc_or2 = 0xFE000A00;
- memctl->memc_br2 = 0x01000081;
- memctl->memc_or3 = 0xFC000A00;
- memctl->memc_br3 = 0x02000081;
-#endif
-
- udelay (10000);
-
- return (size_b0 + size_b1 + size_b2);
-}
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Check memory range for valid RAM. A simple memory test determines
- * the actually available RAM size between addresses `base' and
- * `base + maxsize'. Some (not all) hardware errors are detected:
- * - short between address lines
- * - short between data lines
- */
-#if 0
-static long int dram_size (long int mamr_value, long int *base,
- long int maxsize)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- volatile long int *addr;
- ulong cnt, val;
- ulong save[32]; /* to make test non-destructive */
- unsigned char i = 0;
-
- memctl->memc_mamr = mamr_value;
-
- for (cnt = maxsize / sizeof (long); cnt > 0; cnt >>= 1) {
- addr = base + cnt; /* pointer arith! */
-
- save[i++] = *addr;
- *addr = ~cnt;
- }
-
- /* write 0 to base address */
- addr = base;
- save[i] = *addr;
- *addr = 0;
-
- /* check at base address */
- if ((val = *addr) != 0) {
- *addr = save[i];
- return (0);
- }
-
- for (cnt = 1; cnt <= maxsize / sizeof (long); cnt <<= 1) {
- addr = base + cnt; /* pointer arith! */
-
- val = *addr;
- *addr = save[--i];
-
- if (val != (~cnt)) {
- return (cnt * sizeof (long));
- }
- }
- return (maxsize);
-}
-#endif
-
-int misc_init_r (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
-#ifdef CONFIG_STATUS_LED
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
-#endif
-#ifdef CONFIG_KUP4K_LOGO
- bd_t *bd = gd->bd;
-
- lcd_logo (bd);
-#endif /* CONFIG_KUP4K_LOGO */
-#ifdef CONFIG_IDE_LED
- /* Configure PA8 as output port */
- immap->im_ioport.iop_padir |= 0x80;
- immap->im_ioport.iop_paodr |= 0x80;
- immap->im_ioport.iop_papar &= ~0x80;
- immap->im_ioport.iop_padat |= 0x80; /* turn it off */
-#endif
- setenv("hw","4k");
- poweron_key();
- return (0);
-}
-
-#ifdef CONFIG_KUP4K_LOGO
-
-
-void lcd_logo (bd_t * bd)
-{
- FB_INFO_S1D13xxx fb_info;
- S1D_INDEX s1dReg;
- S1D_VALUE s1dValue;
- volatile immap_t *immr = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl;
- ushort i;
- uchar *fb;
- int rs, gs, bs;
- int r = 8, g = 8, b = 4;
- int r1, g1, b1;
- int n;
- char tmp[64]; /* long enough for environment variables */
- int tft = 0;
-
- immr->im_cpm.cp_pbpar &= ~(PB_LCD_PWM);
- immr->im_cpm.cp_pbodr &= ~(PB_LCD_PWM);
- immr->im_cpm.cp_pbdat &= ~(PB_LCD_PWM); /* set to 0 = enabled */
- immr->im_cpm.cp_pbdir |= (PB_LCD_PWM);
-
-/*----------------------------------------------------------------------------- */
-/* Initialize the chip and the frame buffer driver. */
-/*----------------------------------------------------------------------------- */
- memctl = &immr->im_memctl;
-
-
- /*
- * Init ChipSelect #5 (S1D13768)
- */
- memctl->memc_or5 = 0xFFC007F0; /* 4 MB 17 WS or externel TA */
- memctl->memc_br5 = 0x80080801; /* Start at 0x80080000 */
- __asm__ ("eieio");
-
- fb_info.VmemAddr = (unsigned char *) (S1D_PHYSICAL_VMEM_ADDR);
- fb_info.RegAddr = (unsigned char *) (S1D_PHYSICAL_REG_ADDR);
-
- if ((((S1D_VALUE *) fb_info.RegAddr)[0] != 0x28)
- || (((S1D_VALUE *) fb_info.RegAddr)[1] != 0x14)) {
- printf ("Warning:LCD Controller S1D13706 not found\n");
- setenv ("lcd", "none");
- return;
- }
-
-
- for (i = 0; i < sizeof(aS1DRegs_prelimn) / sizeof(aS1DRegs_prelimn[0]); i++) {
- s1dReg = aS1DRegs_prelimn[i].Index;
- s1dValue = aS1DRegs_prelimn[i].Value;
- debugk ("s13768 reg: %02x value: %02x\n",
- aS1DRegs_prelimn[i].Index, aS1DRegs_prelimn[i].Value);
- ((S1D_VALUE *) fb_info.RegAddr)[s1dReg / sizeof (S1D_VALUE)] =
- s1dValue;
- }
-
-
- n = getenv_r ("lcd", tmp, sizeof (tmp));
- if (n > 0) {
- if (!strcmp ("tft", tmp))
- tft = 1;
- else
- tft = 0;
- }
-#if 0
- if (((S1D_VALUE *) fb_info.RegAddr)[0xAC] & 0x04)
- tft = 0;
- else
- tft = 1;
-#endif
-
- debugk ("Port=0x%02x -> TFT=%d\n", tft,
- ((S1D_VALUE *) fb_info.RegAddr)[0xAC]);
-
- /* init controller */
- if (!tft) {
- for (i = 0; i < sizeof(aS1DRegs_stn) / sizeof(aS1DRegs_stn[0]); i++) {
- s1dReg = aS1DRegs_stn[i].Index;
- s1dValue = aS1DRegs_stn[i].Value;
- debugk ("s13768 reg: %02x value: %02x\n",
- aS1DRegs_stn[i].Index,
- aS1DRegs_stn[i].Value);
- ((S1D_VALUE *) fb_info.RegAddr)[s1dReg / sizeof(S1D_VALUE)] =
- s1dValue;
- }
- n = getenv_r ("contrast", tmp, sizeof (tmp));
- ((S1D_VALUE *) fb_info.RegAddr)[0xB3] =
- (n > 0) ? (uchar) simple_strtoul (tmp, NULL, 10) * 255 / 100 : 0xA0;
- switch (bd->bi_busfreq) {
- case 40000000:
- ((S1D_VALUE *) fb_info.RegAddr)[0x05] = 0x32;
- ((S1D_VALUE *) fb_info.RegAddr)[0x12] = 0x41;
- break;
- case 48000000:
- ((S1D_VALUE *) fb_info.RegAddr)[0x05] = 0x22;
- ((S1D_VALUE *) fb_info.RegAddr)[0x12] = 0x34;
- break;
- default:
- printf ("KUP4K S1D1: unknown busfrequency: %ld assuming 64 MHz\n", bd->bi_busfreq);
- case 64000000:
- ((S1D_VALUE *) fb_info.RegAddr)[0x05] = 0x32;
- ((S1D_VALUE *) fb_info.RegAddr)[0x12] = 0x66;
- break;
- }
- /* setenv("lcd","stn"); */
- } else {
- for (i = 0; i < sizeof(aS1DRegs_tft) / sizeof(aS1DRegs_tft[0]); i++) {
- s1dReg = aS1DRegs_tft[i].Index;
- s1dValue = aS1DRegs_tft[i].Value;
- debugk ("s13768 reg: %02x value: %02x\n",
- aS1DRegs_tft[i].Index,
- aS1DRegs_tft[i].Value);
- ((S1D_VALUE *) fb_info.RegAddr)[s1dReg / sizeof (S1D_VALUE)] =
- s1dValue;
- }
-
- switch (bd->bi_busfreq) {
- default:
- printf ("KUP4K S1D1: unknown busfrequency: %ld assuming 64 MHz\n", bd->bi_busfreq);
- case 40000000:
- ((S1D_VALUE *) fb_info.RegAddr)[0x05] = 0x42;
- ((S1D_VALUE *) fb_info.RegAddr)[0x12] = 0x30;
- break;
- }
- /* setenv("lcd","tft"); */
- }
-
- /* create and set colormap */
- rs = 256 / (r - 1);
- gs = 256 / (g - 1);
- bs = 256 / (b - 1);
- for (i = 0; i < 256; i++) {
- r1 = (rs * ((i / (g * b)) % r)) * 255;
- g1 = (gs * ((i / b) % g)) * 255;
- b1 = (bs * ((i) % b)) * 255;
- debugk ("%d %04x %04x %04x\n", i, r1 >> 4, g1 >> 4, b1 >> 4);
- S1D_WRITE_PALETTE (fb_info.RegAddr, i, (r1 >> 4), (g1 >> 4),
- (b1 >> 4));
- }
-
- /* copy bitmap */
- fb = (uchar *) (fb_info.VmemAddr);
- memcpy (fb, (uchar *) CONFIG_KUP4K_LOGO, 320 * 240);
-}
-#endif /* CONFIG_KUP4K_LOGO */
diff --git a/board/kup/kup4k/s1d13706.h b/board/kup/kup4k/s1d13706.h
deleted file mode 100644
index cd5eccc6f5..0000000000
--- a/board/kup/kup4k/s1d13706.h
+++ /dev/null
@@ -1,174 +0,0 @@
-/*---------------------------------------------------------------------------- */
-/* */
-/* File generated by S1D13706CFG.EXE */
-/* */
-/* Copyright (c) 2000,2001 Epson Research and Development, Inc. */
-/* All rights reserved. */
-/* */
-/*---------------------------------------------------------------------------- */
-
-/* Panel: 320x240x8bpp 70Hz Color Single STN 8-bit (PCLK=6.250MHz) (Format 2) */
-
-#define S1D_DISPLAY_WIDTH 320
-#define S1D_DISPLAY_HEIGHT 240
-#define S1D_DISPLAY_BPP 8
-#define S1D_DISPLAY_SCANLINE_BYTES 320
-#define S1D_PHYSICAL_VMEM_ADDR 0x800A0000L
-#define S1D_PHYSICAL_VMEM_SIZE 0x14000L
-#define S1D_PHYSICAL_REG_ADDR 0x80080000L
-#define S1D_PHYSICAL_REG_SIZE 0x100
-#define S1D_DISPLAY_PCLK 6250
-#define S1D_PALETTE_SIZE 256
-#define S1D_REGDELAYOFF 0xFFFE
-#define S1D_REGDELAYON 0xFFFF
-
-#define S1D_WRITE_PALETTE(p,i,r,g,b) \
-{ \
- ((volatile S1D_VALUE*)(p))[0x0A/sizeof(S1D_VALUE)] = (S1D_VALUE)((r)>>4); \
- ((volatile S1D_VALUE*)(p))[0x09/sizeof(S1D_VALUE)] = (S1D_VALUE)((g)>>4); \
- ((volatile S1D_VALUE*)(p))[0x08/sizeof(S1D_VALUE)] = (S1D_VALUE)((b)>>4); \
- ((volatile S1D_VALUE*)(p))[0x0B/sizeof(S1D_VALUE)] = (S1D_VALUE)(i); \
-}
-
-#define S1D_READ_PALETTE(p,i,r,g,b) \
-{ \
- ((volatile S1D_VALUE*)(p))[0x0F/sizeof(S1D_VALUE)] = (S1D_VALUE)(i); \
- r = ((volatile S1D_VALUE*)(p))[0x0E/sizeof(S1D_VALUE)]; \
- g = ((volatile S1D_VALUE*)(p))[0x0D/sizeof(S1D_VALUE)]; \
- b = ((volatile S1D_VALUE*)(p))[0x0C/sizeof(S1D_VALUE)]; \
-}
-
-typedef unsigned short S1D_INDEX;
-typedef unsigned char S1D_VALUE;
-
-
-typedef struct
-{
- S1D_INDEX Index;
- S1D_VALUE Value;
-} S1D_REGS;
-
-
-static S1D_REGS aS1DRegs_prelimn[] =
-{
- {0x10,0x00}, /* PANEL Type Register */
- {0xA8,0x00}, /* GPIO Config Register 0 */
- {0xA9,0x80}, /* GPIO Config Register 1 */
-
-};
-
-static S1D_REGS aS1DRegs_stn[] =
-{
- {0x04,0x10}, /* BUSCLK MEMCLK Config Register */
- {0x10,0xD0}, /* PANEL Type Register */
- {0x11,0x00}, /* MOD Rate Register */
- {0x14,0x27}, /* Horizontal Display Period Register */
- {0x16,0x00}, /* Horizontal Display Period Start Pos Register 0 */
- {0x17,0x00}, /* Horizontal Display Period Start Pos Register 1 */
- {0x18,0xF0}, /* Vertical Total Register 0 */
- {0x19,0x00}, /* Vertical Total Register 1 */
- {0x1C,0xEF}, /* Vertical Display Period Register 0 */
- {0x1D,0x00}, /* Vertical Display Period Register 1 */
- {0x1E,0x00}, /* Vertical Display Period Start Pos Register 0 */
- {0x1F,0x00}, /* Vertical Display Period Start Pos Register 1 */
- {0x20,0x87}, /* Horizontal Sync Pulse Width Register */
- {0x22,0x00}, /* Horizontal Sync Pulse Start Pos Register 0 */
- {0x23,0x00}, /* Horizontal Sync Pulse Start Pos Register 1 */
- {0x24,0x80}, /* Vertical Sync Pulse Width Register */
- {0x26,0x01}, /* Vertical Sync Pulse Start Pos Register 0 */
- {0x27,0x00}, /* Vertical Sync Pulse Start Pos Register 1 */
- {0x70,0x83}, /* Display Mode Register */
- {0x71,0x00}, /* Special Effects Register */
- {0x74,0x00}, /* Main Window Display Start Address Register 0 */
- {0x75,0x00}, /* Main Window Display Start Address Register 1 */
- {0x76,0x00}, /* Main Window Display Start Address Register 2 */
- {0x78,0x50}, /* Main Window Address Offset Register 0 */
- {0x79,0x00}, /* Main Window Address Offset Register 1 */
- {0x7C,0x00}, /* Sub Window Display Start Address Register 0 */
- {0x7D,0x00}, /* Sub Window Display Start Address Register 1 */
- {0x7E,0x00}, /* Sub Window Display Start Address Register 2 */
- {0x80,0x50}, /* Sub Window Address Offset Register 0 */
- {0x81,0x00}, /* Sub Window Address Offset Register 1 */
- {0x84,0x00}, /* Sub Window X Start Pos Register 0 */
- {0x85,0x00}, /* Sub Window X Start Pos Register 1 */
- {0x88,0x00}, /* Sub Window Y Start Pos Register 0 */
- {0x89,0x00}, /* Sub Window Y Start Pos Register 1 */
- {0x8C,0x4F}, /* Sub Window X End Pos Register 0 */
- {0x8D,0x00}, /* Sub Window X End Pos Register 1 */
- {0x90,0xEF}, /* Sub Window Y End Pos Register 0 */
- {0x91,0x00}, /* Sub Window Y End Pos Register 1 */
- {0xA0,0x00}, /* Power Save Config Register */
- {0xA1,0x00}, /* CPU Access Control Register */
- {0xA2,0x00}, /* Software Reset Register */
- {0xA3,0x00}, /* BIG Endian Support Register */
- {0xA4,0x00}, /* Scratch Pad Register 0 */
- {0xA5,0x00}, /* Scratch Pad Register 1 */
- {0xA8,0x01}, /* GPIO Config Register 0 */
- {0xA9,0x80}, /* GPIO Config Register 1 */
- {0xAC,0x01}, /* GPIO Status Control Register 0 */
- {0xAD,0x00}, /* GPIO Status Control Register 1 */
- {0xB0,0x10}, /* PWM CV Clock Control Register */
- {0xB1,0x80}, /* PWM CV Clock Config Register */
- {0xB2,0x00}, /* CV Clock Burst Length Register */
- {0xAD,0x80}, /* reset seq */
- {0x70,0x03},
-};
-
-static S1D_REGS aS1DRegs_tft[] =
-{
- {0x04,0x10}, /* BUSCLK MEMCLK Config Register */
- {0x05,0x42}, /* PCLK Config Register */
- {0x10,0x61}, /* PANEL Type Register */
- {0x11,0x00}, /* MOD Rate Register */
- {0x12,0x30}, /* Horizontal Total Register */
- {0x14,0x27}, /* Horizontal Display Period Register */
- {0x16,0x11}, /* Horizontal Display Period Start Pos Register 0 */
- {0x17,0x00}, /* Horizontal Display Period Start Pos Register 1 */
- {0x18,0xFA}, /* Vertical Total Register 0 */
- {0x19,0x00}, /* Vertical Total Register 1 */
- {0x1C,0xEF}, /* Vertical Display Period Register 0 */
- {0x1D,0x00}, /* Vertical Display Period Register 1 */
- {0x1E,0x00}, /* Vertical Display Period Start Pos Register 0 */
- {0x1F,0x00}, /* Vertical Display Period Start Pos Register 1 */
- {0x20,0x07}, /* Horizontal Sync Pulse Width Register */
- {0x22,0x00}, /* Horizontal Sync Pulse Start Pos Register 0 */
- {0x23,0x00}, /* Horizontal Sync Pulse Start Pos Register 1 */
- {0x24,0x00}, /* Vertical Sync Pulse Width Register */
- {0x26,0x00}, /* Vertical Sync Pulse Start Pos Register 0 */
- {0x27,0x00}, /* Vertical Sync Pulse Start Pos Register 1 */
- {0x70,0x03}, /* Display Mode Register */
- {0x71,0x00}, /* Special Effects Register */
- {0x74,0x00}, /* Main Window Display Start Address Register 0 */
- {0x75,0x00}, /* Main Window Display Start Address Register 1 */
- {0x76,0x00}, /* Main Window Display Start Address Register 2 */
- {0x78,0x50}, /* Main Window Address Offset Register 0 */
- {0x79,0x00}, /* Main Window Address Offset Register 1 */
- {0x7C,0x00}, /* Sub Window Display Start Address Register 0 */
- {0x7D,0x00}, /* Sub Window Display Start Address Register 1 */
- {0x7E,0x00}, /* Sub Window Display Start Address Register 2 */
- {0x80,0x50}, /* Sub Window Address Offset Register 0 */
- {0x81,0x00}, /* Sub Window Address Offset Register 1 */
- {0x84,0x00}, /* Sub Window X Start Pos Register 0 */
- {0x85,0x00}, /* Sub Window X Start Pos Register 1 */
- {0x88,0x00}, /* Sub Window Y Start Pos Register 0 */
- {0x89,0x00}, /* Sub Window Y Start Pos Register 1 */
- {0x8C,0x4F}, /* Sub Window X End Pos Register 0 */
- {0x8D,0x00}, /* Sub Window X End Pos Register 1 */
- {0x90,0xEF}, /* Sub Window Y End Pos Register 0 */
- {0x91,0x00}, /* Sub Window Y End Pos Register 1 */
- {0xA0,0x00}, /* Power Save Config Register */
- {0xA1,0x00}, /* CPU Access Control Register */
- {0xA2,0x00}, /* Software Reset Register */
- {0xA3,0x00}, /* BIG Endian Support Register */
- {0xA4,0x00}, /* Scratch Pad Register 0 */
- {0xA5,0x00}, /* Scratch Pad Register 1 */
- {0xA8,0x01}, /* GPIO Config Register 0 */
- {0xA9,0x80}, /* GPIO Config Register 1 */
- {0xAC,0x01}, /* GPIO Status Control Register 0 */
- {0xAD,0x00}, /* GPIO Status Control Register 1 */
- {0xB0,0x10}, /* PWM CV Clock Control Register */
- {0xB1,0x80}, /* PWM CV Clock Config Register */
- {0xB2,0x00}, /* CV Clock Burst Length Register */
- {0xAD,0x80}, /* reset seq */
- {0x70,0x03},
-};
diff --git a/board/kup/kup4k/u-boot.lds b/board/kup/kup4k/u-boot.lds
deleted file mode 100644
index 8625999df4..0000000000
--- a/board/kup/kup4k/u-boot.lds
+++ /dev/null
@@ -1,144 +0,0 @@
-/*
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc8xx/start.o (.text)
-/*
- cpu/mpc8xx/start.o (.text)
- common/dlmalloc.o (.text)
- lib_ppc/ppcstring.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
- lib_generic/zlib.o (.text)
-
- . = env_offset;
- common/environment.o(.text)
-*/
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/kup/kup4k/u-boot.lds.debug b/board/kup/kup4k/u-boot.lds.debug
deleted file mode 100644
index c0cf1cb747..0000000000
--- a/board/kup/kup4k/u-boot.lds.debug
+++ /dev/null
@@ -1,137 +0,0 @@
-/*
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc8xx/start.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
-
- . = env_offset;
- common/environment.o(.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/kup/kup4x/Makefile b/board/kup/kup4x/Makefile
deleted file mode 100644
index 62d289b436..0000000000
--- a/board/kup/kup4x/Makefile
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# (C) Copyright 2000-2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o ../common/flash.o ../common/kup.o ../common/load_sernum_ethaddr.o
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/kup/kup4x/config.mk b/board/kup/kup4x/config.mk
deleted file mode 100644
index 61d4e09f64..0000000000
--- a/board/kup/kup4x/config.mk
+++ /dev/null
@@ -1,28 +0,0 @@
-#
-# (C) Copyright 2000-2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# KUP4X board
-#
-
-TEXT_BASE = 0x40000000
diff --git a/board/kup/kup4x/kup4x.c b/board/kup/kup4x/kup4x.c
deleted file mode 100644
index cd9ed13d6d..0000000000
--- a/board/kup/kup4x/kup4x.c
+++ /dev/null
@@ -1,312 +0,0 @@
-/*
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- * Klaus Heydeck, Kieback & Peter GmbH & Co KG, heydeck@kieback-peter.de
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-#include <post.h>
-#include "../common/kup.h"
-#ifdef CONFIG_KUP4K_LOGO
-/* #include "s1d13706.h" */
-#endif
-
-#define KUP4X_USB
-
-
-typedef struct {
- volatile unsigned char *VmemAddr;
- volatile unsigned char *RegAddr;
-} FB_INFO_S1D13xxx;
-
-/* ------------------------------------------------------------------------- */
-
-int usb_init_kup4x (void);
-
-
-#ifdef CONFIG_KUP4K_LOGO
-void lcd_logo (bd_t * bd);
-#endif
-
-/* ------------------------------------------------------------------------- */
-
-#define _NOT_USED_ 0xFFFFFFFF
-
-const uint sdram_table[] = {
- /*
- * Single Read. (Offset 0 in UPMA RAM)
- */
- 0x1F07FC04, 0xEEAEFC04, 0x11ADFC04, 0xEFBBBC00,
- 0x1FF77C47, /* last */
-
- /*
- * SDRAM Initialization (offset 5 in UPMA RAM)
- *
- * This is no UPM entry point. The following definition uses
- * the remaining space to establish an initialization
- * sequence, which is executed by a RUN command.
- *
- */
- 0x1FF77C35, 0xEFEABC34, 0x1FB57C35, /* last */
-
- /*
- * Burst Read. (Offset 8 in UPMA RAM)
- */
- 0x1F07FC04, 0xEEAEFC04, 0x10ADFC04, 0xF0AFFC00,
- 0xF0AFFC00, 0xF1AFFC00, 0xEFBBBC00, 0x1FF77C47, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /*
- * Single Write. (Offset 18 in UPMA RAM)
- */
- 0x1F27FC04, 0xEEAEBC00, 0x01B93C04, 0x1FF77C47, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /*
- * Burst Write. (Offset 20 in UPMA RAM)
- */
- 0x1F07FC04, 0xEEAEBC00, 0x10AD7C00, 0xF0AFFC00,
- 0xF0AFFC00, 0xE1BBBC04, 0x1FF77C47, /* last */
- _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /*
- * Refresh (Offset 30 in UPMA RAM)
- */
- 0x1FF5FC84, 0xFFFFFC04, 0xFFFFFC04, 0xFFFFFC04,
- 0xFFFFFC84, 0xFFFFFC07, /* last */
- _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /*
- * Exception. (Offset 3c in UPMA RAM)
- */
- 0x7FFFFC07, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_,
-};
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Check Board Identity:
- */
-
-int checkboard (void)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- volatile uchar *latch;
- uchar rev, mod;
-
- /*
- * Init ChipSelect #4 (CAN + HW-Latch)
- */
- memctl->memc_or4 = 0xFFFF8926;
- memctl->memc_br4 = 0x90000401;
- __asm__ ("eieio");
- latch = (volatile uchar *) 0x90000200;
- rev = (*latch & 0xF8) >> 3;
- mod = (*latch & 0x03);
- printf ("Board: KUP4X Rev %d.%d\n",rev,mod);
- return (0);
-}
-
-/* ------------------------------------------------------------------------- */
-
-long int initdram (int board_type)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- long int size_b0 = 0;
- long int size_b1 = 0;
- long int size_b2 = 0;
- long int size_b3 = 0;
-
- upmconfig (UPMA, (uint *) sdram_table,
- sizeof (sdram_table) / sizeof (uint));
- /*
- * Preliminary prescaler for refresh (depends on number of
- * banks): This value is selected for four cycles every 62.4 us
- * with two SDRAM banks or four cycles every 31.2 us with one
- * bank. It will be adjusted after memory sizing.
- */
- memctl->memc_mptpr = CFG_MPTPR;
-
- memctl->memc_mar = 0x00000088;
-
- /*
- * Map controller banks 1 and 2 to the SDRAM banks 2 and 3 at
- * preliminary addresses - these have to be modified after the
- * SDRAM size has been determined.
- */
-/* memctl->memc_or1 = CFG_OR1_PRELIM; */
-/* memctl->memc_br1 = CFG_BR1_PRELIM; */
-
-/* memctl->memc_or2 = CFG_OR2_PRELIM; */
-/* memctl->memc_br2 = CFG_BR2_PRELIM; */
-
- memctl->memc_mamr = CFG_MAMR & (~(MAMR_PTAE)); /* no refresh yet */
-
- udelay (200);
-
- /* perform SDRAM initializsation sequence */
-
- memctl->memc_mcr = 0x80002105; /* SDRAM bank 0 */
- udelay (1);
- memctl->memc_mcr = 0x80002830; /* SDRAM bank 0 - execute twice */
- udelay (1);
- memctl->memc_mcr = 0x80002106; /* SDRAM bank 0 - RUN MRS Pattern from loc 6 */
- udelay (1);
-
- memctl->memc_mcr = 0x80004105; /* SDRAM bank 1 */
- udelay (1);
- memctl->memc_mcr = 0x80004830; /* SDRAM bank 1 - execute twice */
- udelay (1);
- memctl->memc_mcr = 0x80004106; /* SDRAM bank 1 - RUN MRS Pattern from loc 6 */
- udelay (1);
-
- memctl->memc_mcr = 0x80006105; /* SDRAM bank 2 */
- udelay (1);
- memctl->memc_mcr = 0x80006830; /* SDRAM bank 2 - execute twice */
- udelay (1);
- memctl->memc_mcr = 0x80006106; /* SDRAM bank 2 - RUN MRS Pattern from loc 6 */
- udelay (1);
-
- memctl->memc_mcr = 0x8000C105; /* SDRAM bank 2 */
- udelay (1);
- memctl->memc_mcr = 0x8000C830; /* SDRAM bank 2 - execute twice */
- udelay (1);
- memctl->memc_mcr = 0x8000C106; /* SDRAM bank 2 - RUN MRS Pattern from loc 6 */
- udelay (1);
-
- memctl->memc_mamr |= MAMR_PTAE; /* enable refresh */
- udelay (1000);
-#if 0 /* 4 x 8MB */
- size_b0 = 0x00800000;
- size_b1 = 0x00800000;
- size_b2 = 0x00800000;
- size_b3 = 0x00800000;
- memctl->memc_mptpr = CFG_MPTPR;
- udelay (1000);
- memctl->memc_or1 = 0xFF800A00;
- memctl->memc_br1 = 0x00000081;
- memctl->memc_or2 = 0xFF000A00;
- memctl->memc_br2 = 0x00800081;
- memctl->memc_or3 = 0xFE000A00;
- memctl->memc_br3 = 0x01000081;
- memctl->memc_or6 = 0xFE000A00;
- memctl->memc_br6 = 0x01800081;
-#else /* 4 x 16 MB */
- size_b0 = 0x01000000;
- size_b1 = 0x01000000;
- size_b2 = 0x01000000;
- size_b3 = 0x01000000;
- memctl->memc_mptpr = CFG_MPTPR;
- udelay (1000);
- memctl->memc_or1 = 0xFF000A00;
- memctl->memc_br1 = 0x00000081;
- memctl->memc_or2 = 0xFE000A00;
- memctl->memc_br2 = 0x01000081;
- memctl->memc_or3 = 0xFD000A00;
- memctl->memc_br3 = 0x02000081;
- memctl->memc_or6 = 0xFC000A00;
- memctl->memc_br6 = 0x03000081;
-#endif
- udelay (10000);
-
- return (size_b0 + size_b1 + size_b2 + size_b3);
-}
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Check memory range for valid RAM. A simple memory test determines
- * the actually available RAM size between addresses `base' and
- * `base + maxsize'. Some (not all) hardware errors are detected:
- * - short between address lines
- * - short between data lines
- */
-#if 0
-static long int dram_size (long int mamr_value, long int *base,
- long int maxsize)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- volatile long int *addr;
- ulong cnt, val;
- ulong save[32]; /* to make test non-destructive */
- unsigned char i = 0;
-
- memctl->memc_mamr = mamr_value;
-
- for (cnt = maxsize / sizeof (long); cnt > 0; cnt >>= 1) {
- addr = base + cnt; /* pointer arith! */
-
- save[i++] = *addr;
- *addr = ~cnt;
- }
-
- /* write 0 to base address */
- addr = base;
- save[i] = *addr;
- *addr = 0;
-
- /* check at base address */
- if ((val = *addr) != 0) {
- *addr = save[i];
- return (0);
- }
-
- for (cnt = 1; cnt <= maxsize / sizeof (long); cnt <<= 1) {
- addr = base + cnt; /* pointer arith! */
-
- val = *addr;
- *addr = save[--i];
-
- if (val != (~cnt)) {
- return (cnt * sizeof (long));
- }
- }
- return (maxsize);
-}
-#endif
-
-int misc_init_r (void)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
-
-#ifdef CONFIG_IDE_LED
- /* Configure PA8 as output port */
- immap->im_ioport.iop_padir |= 0x80;
- immap->im_ioport.iop_paodr |= 0x80;
- immap->im_ioport.iop_papar &= ~0x80;
- immap->im_ioport.iop_padat |= 0x80; /* turn it off */
-#endif
-#ifdef KUP4X_USB
- usb_init_kup4x ();
-#endif
- setenv ("hw", "4x");
- poweron_key ();
- return (0);
-}
diff --git a/board/kup/kup4x/u-boot.lds b/board/kup/kup4x/u-boot.lds
deleted file mode 100644
index 8625999df4..0000000000
--- a/board/kup/kup4x/u-boot.lds
+++ /dev/null
@@ -1,144 +0,0 @@
-/*
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc8xx/start.o (.text)
-/*
- cpu/mpc8xx/start.o (.text)
- common/dlmalloc.o (.text)
- lib_ppc/ppcstring.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
- lib_generic/zlib.o (.text)
-
- . = env_offset;
- common/environment.o(.text)
-*/
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/kup/kup4x/u-boot.lds.debug b/board/kup/kup4x/u-boot.lds.debug
deleted file mode 100644
index c0cf1cb747..0000000000
--- a/board/kup/kup4x/u-boot.lds.debug
+++ /dev/null
@@ -1,137 +0,0 @@
-/*
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc8xx/start.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
-
- . = env_offset;
- common/environment.o(.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/lantec/Makefile b/board/lantec/Makefile
deleted file mode 100644
index 7a2014d466..0000000000
--- a/board/lantec/Makefile
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/lantec/config.mk b/board/lantec/config.mk
deleted file mode 100644
index 05ea3b9140..0000000000
--- a/board/lantec/config.mk
+++ /dev/null
@@ -1,28 +0,0 @@
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# Lantec board (based on TQM8xxL config).
-#
-
-TEXT_BASE = 0x40000000
diff --git a/board/lantec/flash.c b/board/lantec/flash.c
deleted file mode 100644
index 0faa82cba4..0000000000
--- a/board/lantec/flash.c
+++ /dev/null
@@ -1,625 +0,0 @@
-/*
- * (C) Copyright 2000, 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * Derived from ../tqm8xx/flash.c
- * [Torsten Stevens, FHG IMS; Bruno Achauer, Exet AG]
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-
-#if defined(CFG_ENV_IS_IN_FLASH)
-# ifndef CFG_ENV_ADDR
-# define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_ENV_OFFSET)
-# endif
-# ifndef CFG_ENV_SIZE
-# define CFG_ENV_SIZE CFG_ENV_SECT_SIZE
-# endif
-# ifndef CFG_ENV_SECT_SIZE
-# define CFG_ENV_SECT_SIZE CFG_ENV_SIZE
-# endif
-#endif
-
-/*---------------------------------------------------------------------*/
-#undef DEBUG_FLASH
-
-#ifdef DEBUG_FLASH
-#define DEBUGF(fmt,args...) printf(fmt ,##args)
-#else
-#define DEBUGF(fmt,args...)
-#endif
-/*---------------------------------------------------------------------*/
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (vu_long *addr, flash_info_t *info);
-static int write_word (flash_info_t *info, ulong dest, ulong data);
-static void flash_get_offsets (ulong base, flash_info_t *info);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- unsigned long size_b0, size_b1;
- int i;
-
- /* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* Static FLASH Bank configuration here - FIXME XXX */
-
- DEBUGF("\n## Get flash bank 1 size @ 0x%08x\n",FLASH_BASE0_PRELIM);
-
- size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank 0: "
- "ID 0x%lx, Size = 0x%08lx = %ld MB\n",
- flash_info[0].flash_id,
- size_b0, size_b0<<20);
- }
-
- DEBUGF("## Get flash bank 2 size @ 0x%08x\n",FLASH_BASE5_PRELIM);
-
- size_b1 = flash_get_size((vu_long *)FLASH_BASE5_PRELIM, &flash_info[1]);
-
- DEBUGF("## Prelim. Flash bank sizes: %08lx + 0x%08lx\n",size_b0,size_b1);
-
- if (size_b1 > size_b0) {
- printf ("## ERROR: "
- "Bank 1 (0x%08lx = %ld MB) > Bank 0 (0x%08lx = %ld MB)\n",
- size_b1, size_b1<<20,
- size_b0, size_b0<<20
- );
- flash_info[0].flash_id = FLASH_UNKNOWN;
- flash_info[1].flash_id = FLASH_UNKNOWN;
- flash_info[0].sector_count = -1;
- flash_info[1].sector_count = -1;
- flash_info[0].size = 0;
- flash_info[1].size = 0;
- return (0);
- }
-
- DEBUGF ("## Before remap: "
- "BR0: 0x%08x OR0: 0x%08x "
- "BR1: 0x%08x OR1: 0x%08x\n",
- memctl->memc_br0, memctl->memc_or0,
- memctl->memc_br1, memctl->memc_or1);
-
- /* Remap FLASH according to real size */
- memctl->memc_or0 = CFG_OR_TIMING_FLASH | (-size_b0 & 0xFFFF8000);
- memctl->memc_br0 = (CFG_FLASH_BASE & BR_BA_MSK) | \
- BR_MS_GPCM | BR_PS_32 | BR_V;
-
- DEBUGF("## BR0: 0x%08x OR0: 0x%08x\n",
- memctl->memc_br0, memctl->memc_or0);
-
- /* Re-do sizing to get full correct info */
- size_b0 = flash_get_size((vu_long *)CFG_FLASH_BASE, &flash_info[0]);
-
- flash_get_offsets (CFG_FLASH_BASE, &flash_info[0]);
-
- flash_info[0].size = size_b0;
-
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
- /* monitor protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+monitor_flash_len-1,
- &flash_info[0]);
-#endif
-
-#ifdef CFG_ENV_IS_IN_FLASH
- /* ENV protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR+CFG_ENV_SECT_SIZE-1,
- &flash_info[0]);
-#endif
-
- if (size_b1) {
- memctl->memc_or5 = CFG_OR_TIMING_FLASH | (-size_b1 & 0xFFFF8000);
- memctl->memc_br5 = ((CFG_FLASH_BASE + size_b0) & BR_BA_MSK) |
- BR_MS_GPCM | BR_PS_32 | BR_V;
-
- DEBUGF("## BR5: 0x%08x OR5: 0x%08x\n",
- memctl->memc_br5, memctl->memc_or5);
-
- /* Re-do sizing to get full correct info */
- size_b1 = flash_get_size((vu_long *)(CFG_FLASH_BASE + size_b0),
- &flash_info[1]);
-
- flash_info[1].size = size_b1;
-
- flash_get_offsets (CFG_FLASH_BASE + size_b0, &flash_info[1]);
-
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
- /* monitor protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+monitor_flash_len-1,
- &flash_info[1]);
-#endif
-
-#ifdef CFG_ENV_IS_IN_FLASH
- /* ENV protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR+CFG_ENV_SECT_SIZE-1,
- &flash_info[1]);
-#endif
- } else {
- memctl->memc_br5 = 0; /* invalidate bank */
- memctl->memc_or5 = 0; /* invalidate bank */
-
- DEBUGF("## DISABLE BR5: 0x%08x OR5: 0x%08x\n",
- memctl->memc_br5, memctl->memc_or5);
-
- flash_info[1].flash_id = FLASH_UNKNOWN;
- flash_info[1].sector_count = -1;
- flash_info[1].size = 0;
- }
-
- DEBUGF("## Final Flash bank sizes: %08lx + 0x%08lx\n",size_b0,size_b1);
-
- return (size_b0 + size_b1);
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_get_offsets (ulong base, flash_info_t *info)
-{
- int i;
-
- /* set up sector start address table */
- if (info->flash_id & FLASH_BTYPE) {
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00008000;
- info->start[2] = base + 0x0000C000;
- info->start[3] = base + 0x00010000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00020000) - 0x00060000;
- }
- } else {
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- info->start[i--] = base + info->size - 0x00008000;
- info->start[i--] = base + info->size - 0x0000C000;
- info->start[i--] = base + info->size - 0x00010000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00020000;
- }
- }
-
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD: printf ("AMD "); break;
- case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
- default: printf ("Unknown Vendor "); break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM400B: printf ("AM29LV400B (4 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM400T: printf ("AM29LV400T (4 Mbit, top boot sector)\n");
- break;
- case FLASH_AM800B: printf ("AM29LV800B (8 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM800T: printf ("AM29LV800T (8 Mbit, top boot sector)\n");
- break;
- case FLASH_AM160B: printf ("AM29LV160B (16 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM160T: printf ("AM29LV160T (16 Mbit, top boot sector)\n");
- break;
- case FLASH_AM320B: printf ("AM29LV320B (32 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM320T: printf ("AM29LV320T (32 Mbit, top boot sector)\n");
- break;
- default: printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " "
- );
- }
- printf ("\n");
- return;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-
-static ulong flash_get_size (vu_long *addr, flash_info_t *info)
-{
- short i;
- ulong value;
- ulong base = (ulong)addr;
-
-
- /* Write auto select command: read Manufacturer ID */
- addr[0x0555] = 0x00AA00AA;
- addr[0x02AA] = 0x00550055;
- addr[0x0555] = 0x00900090;
-
- value = addr[0];
-
- switch (value) {
- case AMD_MANUFACT:
- info->flash_id = FLASH_MAN_AMD;
- break;
- case FUJ_MANUFACT:
- info->flash_id = FLASH_MAN_FUJ;
- break;
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- return (0); /* no or unknown flash */
- }
-
- value = addr[1]; /* device ID */
-
- switch (value) {
- case AMD_ID_LV400T:
- info->flash_id += FLASH_AM400T;
- info->sector_count = 11;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case AMD_ID_LV400B:
- info->flash_id += FLASH_AM400B;
- info->sector_count = 11;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case AMD_ID_LV800T:
- info->flash_id += FLASH_AM800T;
- info->sector_count = 19;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case AMD_ID_LV800B:
- info->flash_id += FLASH_AM800B;
- info->sector_count = 19;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case AMD_ID_LV160T:
- info->flash_id += FLASH_AM160T;
- info->sector_count = 35;
- info->size = 0x00400000;
- break; /* => 4 MB */
-
- case AMD_ID_LV160B:
- info->flash_id += FLASH_AM160B;
- info->sector_count = 35;
- info->size = 0x00400000;
- break; /* => 4 MB */
-#if 0 /* enable when device IDs are available */
- case AMD_ID_LV320T:
- info->flash_id += FLASH_AM320T;
- info->sector_count = 67;
- info->size = 0x00800000;
- break; /* => 8 MB */
-
- case AMD_ID_LV320B:
- info->flash_id += FLASH_AM320B;
- info->sector_count = 67;
- info->size = 0x00800000;
- break; /* => 8 MB */
-#endif
- default:
- info->flash_id = FLASH_UNKNOWN;
- return (0); /* => no or unknown flash */
-
- }
-
- /* set up sector start address table */
- if (info->flash_id & FLASH_BTYPE) {
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00008000;
- info->start[2] = base + 0x0000C000;
- info->start[3] = base + 0x00010000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00020000) - 0x00060000;
- }
- } else {
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- info->start[i--] = base + info->size - 0x00008000;
- info->start[i--] = base + info->size - 0x0000C000;
- info->start[i--] = base + info->size - 0x00010000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00020000;
- }
- }
-
- /* check for protected sectors */
- for (i = 0; i < info->sector_count; i++) {
- /* read sector protection at sector address, (A7 .. A0) = 0x02 */
- /* D0 = 1 if protected */
- addr = (volatile unsigned long *)(info->start[i]);
- info->protect[i] = addr[2] & 1;
- }
-
- /*
- * Prevent writes to uninitialized FLASH.
- */
- if (info->flash_id != FLASH_UNKNOWN) {
- addr = (volatile unsigned long *)info->start[0];
-
- *addr = 0x00F000F0; /* reset bank */
- }
-
- return (info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- vu_long *addr = (vu_long*)(info->start[0]);
- int flag, prot, sect, l_sect;
- ulong start, now, last;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- if ((info->flash_id == FLASH_UNKNOWN) ||
- (info->flash_id > FLASH_AMD_COMP)) {
- printf ("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- l_sect = -1;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[0x0555] = 0x00AA00AA;
- addr[0x02AA] = 0x00550055;
- addr[0x0555] = 0x00800080;
- addr[0x0555] = 0x00AA00AA;
- addr[0x02AA] = 0x00550055;
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr = (vu_long*)(info->start[sect]);
- addr[0] = 0x00300030;
- l_sect = sect;
- }
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- /*
- * We wait for the last triggered sector
- */
- if (l_sect < 0)
- goto DONE;
-
- start = get_timer (0);
- last = start;
- addr = (vu_long*)(info->start[l_sect]);
- while ((addr[0] & 0x00800080) != 0x00800080) {
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- return 1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- }
-
-DONE:
- /* reset to read mode */
- addr = (volatile unsigned long *)info->start[0];
- addr[0] = 0x00F000F0; /* reset bank */
-
- printf (" done\n");
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int i, l, rc;
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
- for (; i<4 && cnt>0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = 0;
- for (i=0; i<4; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- return (write_word(info, wp, data));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word (flash_info_t *info, ulong dest, ulong data)
-{
- vu_long *addr = (vu_long*)(info->start[0]);
- ulong start;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*((vu_long *)dest) & data) != data) {
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[0x0555] = 0x00AA00AA;
- addr[0x02AA] = 0x00550055;
- addr[0x0555] = 0x00A000A0;
-
- *((vu_long *)dest) = data;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* data polling for D7 */
- start = get_timer (0);
- while ((*((vu_long *)dest) & 0x00800080) != (data & 0x00800080)) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- return (1);
- }
- }
- return (0);
-}
-
-/*-----------------------------------------------------------------------
- */
diff --git a/board/lantec/lantec.c b/board/lantec/lantec.c
deleted file mode 100644
index 417dbbb05b..0000000000
--- a/board/lantec/lantec.c
+++ /dev/null
@@ -1,208 +0,0 @@
-/*
- * (C) Copyright 2000, 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- * (C) Copyright 2001
- * Torsten Stevens, FHG IMS, stevens@ims.fhg.de
- * Bruno Achauer, Exet AG, bruno@exet-ag.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * Derived from ../tqm8xx/tqm8xx.c
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-
-/* ------------------------------------------------------------------------- */
-
-static long int dram_size (long int, long int *, long int);
-
-/* ------------------------------------------------------------------------- */
-
-#define _NOT_USED_ 0xFFFFFFFF
-
-const uint sdram_table[] = {
- /*
- * Single Read. (Offset 0 in UPMA RAM)
- */
- 0x1f07fc04, 0xeeaefc04, 0x11adfc04, 0xefbbbc00,
- 0x1ff77c47, /* last */
- /*
- * SDRAM Initialization (offset 5 in UPMA RAM)
- *
- * This is no UPM entry point. The following definition uses
- * the remaining space to establish an initialization
- * sequence, which is executed by a RUN command.
- *
- */
- 0x1ff77c35, 0xefeabc34, 0x1fb57c35, /* last */
- /*
- * Burst Read. (Offset 8 in UPMA RAM)
- */
- 0x1f07fc04, 0xeeaefc04, 0x10adfc04, 0xf0affc00,
- 0xf0affc00, 0xf1affc00, 0xefbbbc00, 0x1ff77c47, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Single Write. (Offset 18 in UPMA RAM)
- */
- 0x1f27fc04, 0xeeaebc00, 0x01b93c04, 0x1ff77c47, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Burst Write. (Offset 20 in UPMA RAM)
- */
- 0x1f07fc04, 0xeeaebc00, 0x10ad7c00, 0xf0affc00,
- 0xf0affc00, 0xe1bbbc04, 0x1ff77c47, /* last */
- _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Refresh (Offset 30 in UPMA RAM)
- */
- 0x1ff5fc84, 0xfffffc04, 0xfffffc04, 0xfffffc04,
- 0xfffffc84, 0xfffffc07, 0xfffffc07, /* last */
- _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Exception. (Offset 3c in UPMA RAM)
- */
- 0x7ffffc07, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_,
-};
-
-/* ------------------------------------------------------------------------- */
-
-
-/*
- * Check Board Identity:
- *
- * Test TQ ID string (TQM8xx...)
- * If present, check for "L" type (no second DRAM bank),
- * otherwise "L" type is assumed as default.
- *
- * Return 1 for "L" type, 0 else.
- */
-
-int checkboard (void)
-{
- printf ("Board: Lantec special edition rev.%d\n", CONFIG_LANTEC);
- return 0;
-}
-
-/* ------------------------------------------------------------------------- */
-
-long int initdram (int board_type)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- long int size_b0;
- int i;
-
- /*
- * Configure UPMA for SDRAM
- */
- upmconfig (UPMA, (uint *) sdram_table,
- sizeof (sdram_table) / sizeof (uint));
-
- memctl->memc_mptpr = CFG_MPTPR_1BK_8K /* XXX CFG_MPTPR XXX */ ;
-
- /* burst length=4, burst type=sequential, CAS latency=2 */
- memctl->memc_mar = 0x00000088;
-
- /*
- * Map controller bank 3 to the SDRAM bank at preliminary address.
- */
- memctl->memc_or3 = CFG_OR3_PRELIM;
- memctl->memc_br3 = CFG_BR3_PRELIM;
-
- /* initialize memory address register */
- memctl->memc_mamr = CFG_MAMR_8COL; /* refresh not enabled yet */
-
- /* mode initialization (offset 5) */
- udelay (200); /* 0x80006105 */
- memctl->memc_mcr =
- MCR_OP_RUN | MCR_MB_CS3 | MCR_MLCF (1) | MCR_MAD (0x05);
-
- /* run 2 refresh sequence with 4-beat refresh burst (offset 0x30) */
- udelay (1); /* 0x80006130 */
- memctl->memc_mcr =
- MCR_OP_RUN | MCR_MB_CS3 | MCR_MLCF (1) | MCR_MAD (0x30);
- udelay (1); /* 0x80006130 */
- memctl->memc_mcr =
- MCR_OP_RUN | MCR_MB_CS3 | MCR_MLCF (1) | MCR_MAD (0x30);
-
- udelay (1); /* 0x80006106 */
- memctl->memc_mcr =
- MCR_OP_RUN | MCR_MB_CS3 | MCR_MLCF (1) | MCR_MAD (0x06);
-
- memctl->memc_mamr |= MAMR_PTAE; /* refresh enabled */
-
- udelay (200);
-
- /* Need at least 10 DRAM accesses to stabilize */
- for (i = 0; i < 10; ++i) {
- volatile unsigned long *addr =
- (volatile unsigned long *) SDRAM_BASE3_PRELIM;
- unsigned long val;
-
- val = *(addr + i);
- *(addr + i) = val;
- }
-
- /*
- * Check Bank 0 Memory Size for re-configuration
- */
- size_b0 = dram_size (CFG_MAMR_8COL,
- (long *) SDRAM_BASE3_PRELIM, SDRAM_MAX_SIZE);
-
- memctl->memc_mamr = CFG_MAMR_8COL | MAMR_PTAE;
-
- /*
- * Final mapping:
- */
-
- memctl->memc_or3 = ((-size_b0) & 0xFFFF0000) | CFG_OR_TIMING_SDRAM;
- memctl->memc_br3 = (CFG_SDRAM_BASE & BR_BA_MSK) | BR_MS_UPMA | BR_V;
- udelay (1000);
-
- return (size_b0);
-}
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Check memory range for valid RAM. A simple memory test determines
- * the actually available RAM size between addresses `base' and
- * `base + maxsize'. Some (not all) hardware errors are detected:
- * - short between address lines
- * - short between data lines
- */
-
-static long int dram_size (long int mamr_value, long int *base,
- long int maxsize)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
-
- memctl->memc_mamr = mamr_value;
-
- return (get_ram_size (base, maxsize));
-}
diff --git a/board/lantec/u-boot.lds b/board/lantec/u-boot.lds
deleted file mode 100644
index 29ecabd9b3..0000000000
--- a/board/lantec/u-boot.lds
+++ /dev/null
@@ -1,141 +0,0 @@
-/*
- * (C) Copyright 2000, 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc8xx/start.o (.text)
- common/dlmalloc.o (.text)
- lib_ppc/ppcstring.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
- lib_generic/zlib.o (.text)
-
- . = env_offset;
- common/environment.o(.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/lantec/u-boot.lds.debug b/board/lantec/u-boot.lds.debug
deleted file mode 100644
index 65b25b926a..0000000000
--- a/board/lantec/u-boot.lds.debug
+++ /dev/null
@@ -1,137 +0,0 @@
-/*
- * (C) Copyright 2000, 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc8xx/start.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
-
- . = env_offset;
- common/environment.o(.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/lart/Makefile b/board/lart/Makefile
deleted file mode 100644
index 550aa1dac3..0000000000
--- a/board/lart/Makefile
+++ /dev/null
@@ -1,47 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := lart.o flash.o
-SOBJS := flashasm.o lowlevel_init.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS) $(SOBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/lart/config.mk b/board/lart/config.mk
deleted file mode 100644
index 3033c4fba6..0000000000
--- a/board/lart/config.mk
+++ /dev/null
@@ -1,23 +0,0 @@
-#
-# LART board with SA1100 cpu
-#
-# see http://www.lart.tudelft.nl/ for more information on LART
-#
-
-#
-# LART has 4 banks of 8 MB DRAM
-#
-# c000'0000
-# c100'0000
-# c800'0000
-# c900'0000
-#
-# Linux-Kernel is expected to be at c000'8000, entry c000'8000
-#
-# we load ourself to c178'0000, the upper 1 MB of second bank
-#
-# download areas is c800'0000
-#
-
-
-TEXT_BASE = 0xc1780000
diff --git a/board/lart/flash.c b/board/lart/flash.c
deleted file mode 100644
index 5232ed2586..0000000000
--- a/board/lart/flash.c
+++ /dev/null
@@ -1,474 +0,0 @@
-/*
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-
-ulong myflush(void);
-
-
-#define FLASH_BANK_SIZE 0x800000
-#define MAIN_SECT_SIZE 0x20000
-#define PARAM_SECT_SIZE 0x4000
-
-/* puzzle magic for lart
- * data_*_flash are def'd in flashasm.S
- */
-
-extern u32 data_from_flash(u32);
-extern u32 data_to_flash(u32);
-
-#define PUZZLE_FROM_FLASH(x) data_from_flash((x))
-#define PUZZLE_TO_FLASH(x) data_to_flash((x))
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
-
-
-#define CMD_READ_ARRAY 0x00FF00FF
-#define CMD_IDENTIFY 0x00900090
-#define CMD_ERASE_SETUP 0x00200020
-#define CMD_ERASE_CONFIRM 0x00D000D0
-#define CMD_PROGRAM 0x00400040
-#define CMD_RESUME 0x00D000D0
-#define CMD_SUSPEND 0x00B000B0
-#define CMD_STATUS_READ 0x00700070
-#define CMD_STATUS_RESET 0x00500050
-
-#define BIT_BUSY 0x00800080
-#define BIT_ERASE_SUSPEND 0x00400040
-#define BIT_ERASE_ERROR 0x00200020
-#define BIT_PROGRAM_ERROR 0x00100010
-#define BIT_VPP_RANGE_ERROR 0x00080008
-#define BIT_PROGRAM_SUSPEND 0x00040004
-#define BIT_PROTECT_ERROR 0x00020002
-#define BIT_UNDEFINED 0x00010001
-
-#define BIT_SEQUENCE_ERROR 0x00300030
-#define BIT_TIMEOUT 0x80000000
-
-/*-----------------------------------------------------------------------
- */
-
-ulong flash_init(void)
-{
- int i, j;
- ulong size = 0;
-
- for (i = 0; i < CFG_MAX_FLASH_BANKS; i++)
- {
- ulong flashbase = 0;
- flash_info[i].flash_id =
- (INTEL_MANUFACT & FLASH_VENDMASK) |
- (INTEL_ID_28F160F3B & FLASH_TYPEMASK);
- flash_info[i].size = FLASH_BANK_SIZE;
- flash_info[i].sector_count = CFG_MAX_FLASH_SECT;
- memset(flash_info[i].protect, 0, CFG_MAX_FLASH_SECT);
- if (i == 0)
- flashbase = PHYS_FLASH_1;
- else
- panic("configured too many flash banks!\n");
- for (j = 0; j < flash_info[i].sector_count; j++)
- {
- if (j <= 7)
- {
- flash_info[i].start[j] = flashbase + j * PARAM_SECT_SIZE;
- }
- else
- {
- flash_info[i].start[j] = flashbase + (j - 7)*MAIN_SECT_SIZE;
- }
- }
- size += flash_info[i].size;
- }
-
- /* Protect monitor and environment sectors
- */
- flash_protect(FLAG_PROTECT_SET,
- CFG_FLASH_BASE,
- CFG_FLASH_BASE + monitor_flash_len - 1,
- &flash_info[0]);
-
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1,
- &flash_info[0]);
-
- return size;
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t *info)
-{
- int i;
-
- switch (info->flash_id & FLASH_VENDMASK)
- {
- case (INTEL_MANUFACT & FLASH_VENDMASK):
- printf("Intel: ");
- break;
- default:
- printf("Unknown Vendor ");
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK)
- {
- case (INTEL_ID_28F160F3B & FLASH_TYPEMASK):
- printf("2x 28F160F3B (16Mbit)\n");
- break;
- default:
- printf("Unknown Chip Type\n");
- goto Done;
- break;
- }
-
- printf(" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf(" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; i++)
- {
- if ((i % 5) == 0)
- {
- printf ("\n ");
- }
- printf (" %08lX%s", info->start[i],
- info->protect[i] ? " (RO)" : " ");
- }
- printf ("\n");
-
-Done:
- ;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_error (ulong code)
-{
- /* Check bit patterns */
- /* SR.7=0 is busy, SR.7=1 is ready */
- /* all other flags indicate error on 1 */
- /* SR.0 is undefined */
- /* Timeout is our faked flag */
-
- /* sequence is described in Intel 290644-005 document */
-
- /* check Timeout */
- if (code & BIT_TIMEOUT)
- {
- printf ("Timeout\n");
- return ERR_TIMOUT;
- }
-
- /* check Busy, SR.7 */
- if (~code & BIT_BUSY)
- {
- printf ("Busy\n");
- return ERR_PROG_ERROR;
- }
-
- /* check Vpp low, SR.3 */
- if (code & BIT_VPP_RANGE_ERROR)
- {
- printf ("Vpp range error\n");
- return ERR_PROG_ERROR;
- }
-
- /* check Device Protect Error, SR.1 */
- if (code & BIT_PROTECT_ERROR)
- {
- printf ("Device protect error\n");
- return ERR_PROG_ERROR;
- }
-
- /* check Command Seq Error, SR.4 & SR.5 */
- if (code & BIT_SEQUENCE_ERROR)
- {
- printf ("Command seqence error\n");
- return ERR_PROG_ERROR;
- }
-
- /* check Block Erase Error, SR.5 */
- if (code & BIT_ERASE_ERROR)
- {
- printf ("Block erase error\n");
- return ERR_PROG_ERROR;
- }
-
- /* check Program Error, SR.4 */
- if (code & BIT_PROGRAM_ERROR)
- {
- printf ("Program error\n");
- return ERR_PROG_ERROR;
- }
-
- /* check Block Erase Suspended, SR.6 */
- if (code & BIT_ERASE_SUSPEND)
- {
- printf ("Block erase suspended\n");
- return ERR_PROG_ERROR;
- }
-
- /* check Program Suspended, SR.2 */
- if (code & BIT_PROGRAM_SUSPEND)
- {
- printf ("Program suspended\n");
- return ERR_PROG_ERROR;
- }
-
- /* OK, no error */
- return ERR_OK;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- ulong result;
- int iflag, cflag, prot, sect;
- int rc = ERR_OK;
-
- /* first look for protection bits */
-
- if (info->flash_id == FLASH_UNKNOWN)
- return ERR_UNKNOWN_FLASH_TYPE;
-
- if ((s_first < 0) || (s_first > s_last)) {
- return ERR_INVAL;
- }
-
- if ((info->flash_id & FLASH_VENDMASK) !=
- (INTEL_MANUFACT & FLASH_VENDMASK)) {
- return ERR_UNKNOWN_FLASH_VENDOR;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
- if (prot)
- return ERR_PROTECTED;
-
- /*
- * Disable interrupts which might cause a timeout
- * here. Remember that our exception vectors are
- * at address 0 in the flash, and we don't want a
- * (ticker) exception to happen while the flash
- * chip is in programming mode.
- */
- cflag = icache_status();
- icache_disable();
- iflag = disable_interrupts();
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last && !ctrlc(); sect++)
- {
- printf("Erasing sector %2d ... ", sect);
-
- /* arm simple, non interrupt dependent timer */
- reset_timer_masked();
-
- if (info->protect[sect] == 0)
- { /* not protected */
- vu_long *addr = (vu_long *)(info->start[sect]);
-
- *addr = PUZZLE_TO_FLASH(CMD_STATUS_RESET);
- *addr = PUZZLE_TO_FLASH(CMD_ERASE_SETUP);
- *addr = PUZZLE_TO_FLASH(CMD_ERASE_CONFIRM);
-
- /* wait until flash is ready */
- do
- {
- /* check timeout */
- if (get_timer_masked() > CFG_FLASH_ERASE_TOUT)
- {
- *addr = PUZZLE_TO_FLASH(CMD_SUSPEND);
- result = BIT_TIMEOUT;
- break;
- }
-
- result = PUZZLE_FROM_FLASH(*addr);
- } while (~result & BIT_BUSY);
-
- *addr = PUZZLE_TO_FLASH(CMD_READ_ARRAY);
-
- if ((rc = flash_error(result)) != ERR_OK)
- goto outahere;
-
- printf("ok.\n");
- }
- else /* it was protected */
- {
- printf("protected!\n");
- }
- }
-
- if (ctrlc())
- printf("User Interrupt!\n");
-
-outahere:
- /* allow flash to settle - wait 10 ms */
- udelay_masked(10000);
-
- if (iflag)
- enable_interrupts();
-
- if (cflag)
- icache_enable();
-
- return rc;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash
- */
-
-volatile static int write_word (flash_info_t *info, ulong dest, ulong data)
-{
- vu_long *addr = (vu_long *)dest;
- ulong result;
- int rc = ERR_OK;
- int cflag, iflag;
-
- /* Check if Flash is (sufficiently) erased
- */
- result = PUZZLE_FROM_FLASH(*addr);
- if ((result & data) != data)
- return ERR_NOT_ERASED;
-
- /*
- * Disable interrupts which might cause a timeout
- * here. Remember that our exception vectors are
- * at address 0 in the flash, and we don't want a
- * (ticker) exception to happen while the flash
- * chip is in programming mode.
- */
- cflag = icache_status();
- icache_disable();
- iflag = disable_interrupts();
-
- *addr = PUZZLE_TO_FLASH(CMD_STATUS_RESET);
- *addr = PUZZLE_TO_FLASH(CMD_PROGRAM);
- *addr = data;
-
- /* arm simple, non interrupt dependent timer */
- reset_timer_masked();
-
- /* wait until flash is ready */
- do
- {
- /* check timeout */
- if (get_timer_masked() > CFG_FLASH_ERASE_TOUT)
- {
- *addr = PUZZLE_TO_FLASH(CMD_SUSPEND);
- result = BIT_TIMEOUT;
- break;
- }
-
- result = PUZZLE_FROM_FLASH(*addr);
- } while (~result & BIT_BUSY);
-
- *addr = PUZZLE_TO_FLASH(CMD_READ_ARRAY);
-
- rc = flash_error(result);
-
- if (iflag)
- enable_interrupts();
-
- if (cflag)
- icache_enable();
-
- return rc;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash.
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int l;
- int i, rc;
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data >> 8) | (*(uchar *)cp << 24);
- }
- for (; i<4 && cnt>0; ++i) {
- data = (data >> 8) | (*src++ << 24);
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<4; ++i, ++cp) {
- data = (data >> 8) | (*(uchar *)cp << 24);
- }
-
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = *((vu_long*)src);
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- src += 4;
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return ERR_OK;
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
- data = (data >> 8) | (*src++ << 24);
- --cnt;
- }
- for (; i<4; ++i, ++cp) {
- data = (data >> 8) | (*(uchar *)cp << 24);
- }
-
- return write_word(info, wp, data);
-}
diff --git a/board/lart/flashasm.S b/board/lart/flashasm.S
deleted file mode 100644
index 9021972cb4..0000000000
--- a/board/lart/flashasm.S
+++ /dev/null
@@ -1,177 +0,0 @@
-/*
- * flashasm.S: flash magic for LART
- *
- * Copyright (C) 1999 2000 2001 Jan-Derk bakker (J.D.Bakker@its.tudelft.nl)
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- *
- */
-
-.text
-
-
-.globl data_to_flash
-.globl data_from_flash
- /* Subroutine that takes data in r0 and formats it so it will be in */
- /* the correct order for the internal flash */
- /* used for LART only */
-data_to_flash:
- mov r1, #0x0
-
- tst r0, #0x00000001
- orrne r1, r1, #0x00001000
- tst r0, #0x00000002
- orrne r1, r1, #0x00004000
- tst r0, #0x00000004
- orrne r1, r1, #0x00000800
- tst r0, #0x00000008
- orrne r1, r1, #0x00000200
- tst r0, #0x00000010
- orrne r1, r1, #0x00000001
- tst r0, #0x00000020
- orrne r1, r1, #0x00000004
- tst r0, #0x00000040
- orrne r1, r1, #0x00000080
- tst r0, #0x00000080
- orrne r1, r1, #0x00000020
-
- tst r0, #0x00000100
- orrne r1, r1, #0x00002000
- tst r0, #0x00000200
- orrne r1, r1, #0x00008000
- tst r0, #0x00000400
- orrne r1, r1, #0x00000400
- tst r0, #0x00000800
- orrne r1, r1, #0x00000100
- tst r0, #0x00001000
- orrne r1, r1, #0x00000002
- tst r0, #0x00002000
- orrne r1, r1, #0x00000008
- tst r0, #0x00004000
- orrne r1, r1, #0x00000040
- tst r0, #0x00008000
- orrne r1, r1, #0x00000010
-
- tst r0, #0x00010000
- orrne r1, r1, #0x00100000
- tst r0, #0x00020000
- orrne r1, r1, #0x00400000
- tst r0, #0x00040000
- orrne r1, r1, #0x00080000
- tst r0, #0x00080000
- orrne r1, r1, #0x00020000
- tst r0, #0x00100000
- orrne r1, r1, #0x01000000
- tst r0, #0x00200000
- orrne r1, r1, #0x04000000
- tst r0, #0x00400000
- orrne r1, r1, #0x80000000
- tst r0, #0x00800000
- orrne r1, r1, #0x20000000
-
- tst r0, #0x01000000
- orrne r1, r1, #0x00200000
- tst r0, #0x02000000
- orrne r1, r1, #0x00800000
- tst r0, #0x04000000
- orrne r1, r1, #0x00040000
- tst r0, #0x08000000
- orrne r1, r1, #0x00010000
- tst r0, #0x10000000
- orrne r1, r1, #0x02000000
- tst r0, #0x20000000
- orrne r1, r1, #0x08000000
- tst r0, #0x40000000
- orrne r1, r1, #0x40000000
- tst r0, #0x80000000
- orrne r1, r1, #0x10000000
-
- mov r0, r1
- mov pc, lr
-
- /* Takes data received from the flash, and unshuffles it. */
-data_from_flash:
- mov r1, #0x00
-
- tst r0, #0x00000001
- orrne r1, r1, #0x00000010
- tst r0, #0x00000002
- orrne r1, r1, #0x00001000
- tst r0, #0x00000004
- orrne r1, r1, #0x00000020
- tst r0, #0x00000008
- orrne r1, r1, #0x00002000
- tst r0, #0x00000010
- orrne r1, r1, #0x00008000
- tst r0, #0x00000020
- orrne r1, r1, #0x00000080
- tst r0, #0x00000040
- orrne r1, r1, #0x00004000
- tst r0, #0x00000080
- orrne r1, r1, #0x00000040
-
- tst r0, #0x00000100
- orrne r1, r1, #0x00000800
- tst r0, #0x00000200
- orrne r1, r1, #0x00000008
- tst r0, #0x00000400
- orrne r1, r1, #0x00000400
- tst r0, #0x00000800
- orrne r1, r1, #0x00000004
- tst r0, #0x00001000
- orrne r1, r1, #0x00000001
- tst r0, #0x00002000
- orrne r1, r1, #0x00000100
- tst r0, #0x00004000
- orrne r1, r1, #0x00000002
- tst r0, #0x00008000
- orrne r1, r1, #0x00000200
-
- tst r0, #0x00010000
- orrne r1, r1, #0x08000000
- tst r0, #0x00020000
- orrne r1, r1, #0x00080000
- tst r0, #0x00040000
- orrne r1, r1, #0x04000000
- tst r0, #0x00080000
- orrne r1, r1, #0x00040000
- tst r0, #0x00100000
- orrne r1, r1, #0x00010000
- tst r0, #0x00200000
- orrne r1, r1, #0x01000000
- tst r0, #0x00400000
- orrne r1, r1, #0x00020000
- tst r0, #0x00800000
- orrne r1, r1, #0x02000000
-
- tst r0, #0x01000000
- orrne r1, r1, #0x00100000
- tst r0, #0x02000000
- orrne r1, r1, #0x10000000
- tst r0, #0x04000000
- orrne r1, r1, #0x00200000
- tst r0, #0x08000000
- orrne r1, r1, #0x20000000
- tst r0, #0x10000000
- orrne r1, r1, #0x80000000
- tst r0, #0x20000000
- orrne r1, r1, #0x00800000
- tst r0, #0x40000000
- orrne r1, r1, #0x40000000
- tst r0, #0x80000000
- orrne r1, r1, #0x00400000
-
- mov r0, r1
- mov pc, lr
diff --git a/board/lart/lart.c b/board/lart/lart.c
deleted file mode 100644
index 66b730dba7..0000000000
--- a/board/lart/lart.c
+++ /dev/null
@@ -1,65 +0,0 @@
-/*
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-
-/* ------------------------------------------------------------------------- */
-
-
-/*
- * Miscelaneous platform dependent initialisations
- */
-
-int board_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- /* memory and cpu-speed are setup before relocation */
- /* so we do _nothing_ here */
-
- /* arch number of LART-Board */
- gd->bd->bi_arch_number = MACH_TYPE_LART;
-
- /* adress of boot parameters */
- gd->bd->bi_boot_params = 0xc0000100;
-
- return 0;
-}
-
-int dram_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
- bd_t *bd = gd->bd;
-
- bd->bi_dram[0].start = PHYS_SDRAM_1;
- bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
- bd->bi_dram[1].start = PHYS_SDRAM_2;
- bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
- bd->bi_dram[2].start = PHYS_SDRAM_3;
- bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE;
- bd->bi_dram[3].start = PHYS_SDRAM_4;
- bd->bi_dram[3].size = PHYS_SDRAM_4_SIZE;
-
- return (0);
-}
diff --git a/board/lart/lowlevel_init.S b/board/lart/lowlevel_init.S
deleted file mode 100644
index db9fd63def..0000000000
--- a/board/lart/lowlevel_init.S
+++ /dev/null
@@ -1,94 +0,0 @@
-/*
- * Memory Setup stuff - taken from blob memsetup.S
- *
- * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) and
- * Jan-Derk Bakker (J.D.Bakker@its.tudelft.nl)
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-
-#include <config.h>
-#include <version.h>
-
-
-/* some parameters for the board */
-
-MEM_BASE: .long 0xa0000000
-MEM_START: .long 0xc0000000
-
-#define MDCNFG 0x00
-#define MDCAS0 0x04
-#define MDCAS1 0x08
-#define MDCAS2 0x0c
-#define MSC0 0x10
-#define MSC1 0x14
-#define MECR 0x18
-
-mdcas0: .long 0xc71c703f
-mdcas1: .long 0xffc71c71
-mdcas2: .long 0xffffffff
-/* mdcnfg: .long 0x0bb2bcbf */
-mdcnfg: .long 0x0334b22f @ alt
-/* mcs0: .long 0xfff8fff8 */
-msc0: .long 0xad8c4888 @ alt
-mecr: .long 0x00060006
-/* mecr: .long 0x994a994a @ alt */
-
-/* setting up the memory */
-
-.globl lowlevel_init
-lowlevel_init:
- ldr r0, MEM_BASE
-
- /* Setup the flash memory */
- ldr r1, msc0
- str r1, [r0, #MSC0]
-
- /* Set up the DRAM */
-
- /* MDCAS0 */
- ldr r1, mdcas0
- str r1, [r0, #MDCAS0]
-
- /* MDCAS1 */
- ldr r1, mdcas1
- str r1, [r0, #MDCAS1]
-
- /* MDCAS2 */
- ldr r1, mdcas2
- str r1, [r0, #MDCAS2]
-
- /* MDCNFG */
- ldr r1, mdcnfg
- str r1, [r0, #MDCNFG]
-
- /* Set up PCMCIA space */
- ldr r1, mecr
- str r1, [r0, #MECR]
-
- /* Load something to activate bank */
- ldr r1, MEM_START
-
-.rept 8
- ldr r0, [r1]
-.endr
-
- /* everything is fine now */
- mov pc, lr
diff --git a/board/lart/u-boot.lds b/board/lart/u-boot.lds
deleted file mode 100644
index 258bece23c..0000000000
--- a/board/lart/u-boot.lds
+++ /dev/null
@@ -1,56 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-ENTRY(_start)
-SECTIONS
-{
- . = 0x00000000;
-
- . = ALIGN(4);
- .text :
- {
- cpu/sa1100/start.o (.text)
- *(.text)
- }
-
- . = ALIGN(4);
- .rodata : { *(.rodata) }
-
- . = ALIGN(4);
- .data : { *(.data) }
-
- . = ALIGN(4);
- .got : { *(.got) }
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = ALIGN(4);
- __bss_start = .;
- .bss : { *(.bss) }
- _end = .;
-}
diff --git a/board/logodl/Makefile b/board/logodl/Makefile
deleted file mode 100644
index c7cde7d579..0000000000
--- a/board/logodl/Makefile
+++ /dev/null
@@ -1,47 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := logodl.o flash.o
-SOBJS := lowlevel_init.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $^
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/logodl/config.mk b/board/logodl/config.mk
deleted file mode 100644
index 76c382d57c..0000000000
--- a/board/logodl/config.mk
+++ /dev/null
@@ -1,15 +0,0 @@
-#
-# Linux-Kernel is expected to be at c000'8000, entry c000'8000
-#
-# we load ourself to c170'0000, the upper 1 MB of second bank
-#
-# download areas is c800'0000
-#
-
-#TEXT_BASE = 0
-
-# FIXME: armboot does only work correctly when being compiled
-# # for the addresses _after_ relocation to RAM!! Otherwhise the
-# # .bss segment is assumed in flash...
-#
-TEXT_BASE = 0x083E0000
diff --git a/board/logodl/flash.c b/board/logodl/flash.c
deleted file mode 100644
index a9477314dc..0000000000
--- a/board/logodl/flash.c
+++ /dev/null
@@ -1,829 +0,0 @@
-/*
- * (C) 2000 Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- * (C) 2003 August Hoeraendl, Logotronic GmbH
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#undef CONFIG_FLASH_16BIT
-
-#include <common.h>
-
-#define FLASH_BANK_SIZE 0x1000000
-#define MAIN_SECT_SIZE 0x20000 /* 2x64k = 128k per sector */
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/* NOTE - CONFIG_FLASH_16BIT means the CPU interface is 16-bit, it
- * has nothing to do with the flash chip being 8-bit or 16-bit.
- */
-#ifdef CONFIG_FLASH_16BIT
-typedef unsigned short FLASH_PORT_WIDTH;
-typedef volatile unsigned short FLASH_PORT_WIDTHV;
-
-#define FLASH_ID_MASK 0xFFFF
-#else
-typedef unsigned long FLASH_PORT_WIDTH;
-typedef volatile unsigned long FLASH_PORT_WIDTHV;
-
-#define FLASH_ID_MASK 0xFFFFFFFF
-#endif
-
-#define FPW FLASH_PORT_WIDTH
-#define FPWV FLASH_PORT_WIDTHV
-
-#define ORMASK(size) ((-size) & OR_AM_MSK)
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size(FPWV *addr, flash_info_t *info);
-static void flash_reset(flash_info_t *info);
-static int write_word_intel(flash_info_t *info, FPWV *dest, FPW data);
-static int write_word_amd(flash_info_t *info, FPWV *dest, FPW data);
-#define write_word(in, de, da) write_word_amd(in, de, da)
-static void flash_get_offsets(ulong base, flash_info_t *info);
-#ifdef CFG_FLASH_PROTECTION
-static void flash_sync_real_protect(flash_info_t *info);
-#endif
-
-/*-----------------------------------------------------------------------
- * flash_init()
- *
- * sets up flash_info and returns size of FLASH (bytes)
- */
-ulong flash_init(void)
-{
- int i, j;
- ulong size = 0;
-
- for (i = 0; i < CFG_MAX_FLASH_BANKS; i++)
- {
- ulong flashbase = 0;
- flash_info[i].flash_id =
- (FLASH_MAN_AMD & FLASH_VENDMASK) |
- (FLASH_AM640U & FLASH_TYPEMASK);
- flash_info[i].size = FLASH_BANK_SIZE;
- flash_info[i].sector_count = CFG_MAX_FLASH_SECT;
- memset(flash_info[i].protect, 0, CFG_MAX_FLASH_SECT);
- switch (i)
- {
- case 0:
- flashbase = PHYS_FLASH_1;
- break;
- case 1:
- flashbase = PHYS_FLASH_2;
- break;
- default:
- panic("configured too many flash banks!\n");
- break;
- }
- for (j = 0; j < flash_info[i].sector_count; j++)
- {
- flash_info[i].start[j] = flashbase + j*MAIN_SECT_SIZE;
- }
- size += flash_info[i].size;
- }
-
- /* Protect monitor and environment sectors
- */
- flash_protect(FLAG_PROTECT_SET,
- CFG_FLASH_BASE,
- CFG_FLASH_BASE + _bss_start - _armboot_start,
- &flash_info[0]);
-
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1,
- &flash_info[0]);
-
- return size;
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_reset(flash_info_t *info)
-{
- FPWV *base = (FPWV *)(info->start[0]);
-
- /* Put FLASH back in read mode */
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL)
- *base = (FPW)0x00FF00FF; /* Intel Read Mode */
- else if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD)
- *base = (FPW)0x00F000F0; /* AMD Read Mode */
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_get_offsets (ulong base, flash_info_t *info)
-{
- int i;
-
- /* set up sector start address table */
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL
- && (info->flash_id & FLASH_BTYPE)) {
- int bootsect_size; /* number of bytes/boot sector */
- int sect_size; /* number of bytes/regular sector */
-
- bootsect_size = 0x00002000 * (sizeof(FPW)/2);
- sect_size = 0x00010000 * (sizeof(FPW)/2);
-
- /* set sector offsets for bottom boot block type */
- for (i = 0; i < 8; ++i) {
- info->start[i] = base + (i * bootsect_size);
- }
- for (i = 8; i < info->sector_count; i++) {
- info->start[i] = base + ((i - 7) * sect_size);
- }
- }
- else if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD
- && (info->flash_id & FLASH_TYPEMASK) == FLASH_AM640U) {
-
- int sect_size; /* number of bytes/sector */
-
- sect_size = 0x00010000 * (sizeof(FPW)/2);
-
- /* set up sector start address table (uniform sector type) */
- for( i = 0; i < info->sector_count; i++ )
- info->start[i] = base + (i * sect_size);
- }
-}
-
-/*-----------------------------------------------------------------------
- */
-
-void flash_print_info (flash_info_t *info)
-{
- int i;
- uchar *boottype;
- uchar *bootletter;
- uchar *fmt;
- uchar botbootletter[] = "B";
- uchar topbootletter[] = "T";
- uchar botboottype[] = "bottom boot sector";
- uchar topboottype[] = "top boot sector";
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD: printf ("AMD "); break;
- case FLASH_MAN_BM: printf ("BRIGHT MICRO "); break;
- case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
- case FLASH_MAN_SST: printf ("SST "); break;
- case FLASH_MAN_STM: printf ("STM "); break;
- case FLASH_MAN_INTEL: printf ("INTEL "); break;
- default: printf ("Unknown Vendor "); break;
- }
-
- /* check for top or bottom boot, if it applies */
- if (info->flash_id & FLASH_BTYPE) {
- boottype = botboottype;
- bootletter = botbootletter;
- }
- else {
- boottype = topboottype;
- bootletter = topbootletter;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM640U:
- fmt = "29LV641D (64 Mbit, uniform sectors)\n";
- break;
- case FLASH_28F800C3B:
- case FLASH_28F800C3T:
- fmt = "28F800C3%s (8 Mbit, %s)\n";
- break;
- case FLASH_INTEL800B:
- case FLASH_INTEL800T:
- fmt = "28F800B3%s (8 Mbit, %s)\n";
- break;
- case FLASH_28F160C3B:
- case FLASH_28F160C3T:
- fmt = "28F160C3%s (16 Mbit, %s)\n";
- break;
- case FLASH_INTEL160B:
- case FLASH_INTEL160T:
- fmt = "28F160B3%s (16 Mbit, %s)\n";
- break;
- case FLASH_28F320C3B:
- case FLASH_28F320C3T:
- fmt = "28F320C3%s (32 Mbit, %s)\n";
- break;
- case FLASH_INTEL320B:
- case FLASH_INTEL320T:
- fmt = "28F320B3%s (32 Mbit, %s)\n";
- break;
- case FLASH_28F640C3B:
- case FLASH_28F640C3T:
- fmt = "28F640C3%s (64 Mbit, %s)\n";
- break;
- case FLASH_INTEL640B:
- case FLASH_INTEL640T:
- fmt = "28F640B3%s (64 Mbit, %s)\n";
- break;
- default:
- fmt = "Unknown Chip Type\n";
- break;
- }
-
- printf (fmt, bootletter, boottype);
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20,
- info->sector_count);
-
- printf (" Sector Start Addresses:");
-
- for (i=0; i<info->sector_count; ++i) {
- if ((i % 5) == 0) {
- printf ("\n ");
- }
-
- printf (" %08lX%s", info->start[i],
- info->protect[i] ? " (RO)" : " ");
- }
-
- printf ("\n");
-}
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-
-ulong flash_get_size (FPWV *addr, flash_info_t *info)
-{
- /* Write auto select command: read Manufacturer ID */
-
- /* Write auto select command sequence and test FLASH answer */
- addr[0x0555] = (FPW)0x00AA00AA; /* for AMD, Intel ignores this */
- addr[0x02AA] = (FPW)0x00550055; /* for AMD, Intel ignores this */
- addr[0x0555] = (FPW)0x00900090; /* selects Intel or AMD */
-
- /* The manufacturer codes are only 1 byte, so just use 1 byte.
- * This works for any bus width and any FLASH device width.
- */
- switch (addr[0] & 0xff) {
-
- case (uchar)AMD_MANUFACT:
- info->flash_id = FLASH_MAN_AMD;
- break;
-
- case (uchar)INTEL_MANUFACT:
- info->flash_id = FLASH_MAN_INTEL;
- break;
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- break;
- }
-
- /* Check 16 bits or 32 bits of ID so work on 32 or 16 bit bus. */
- if (info->flash_id != FLASH_UNKNOWN) switch (addr[1]) {
-
- case (FPW)AMD_ID_LV640U: /* 29LV640 and 29LV641 have same ID */
- info->flash_id += FLASH_AM640U;
- info->sector_count = 128;
- info->size = 0x00800000 * (sizeof(FPW)/2);
- break; /* => 8 or 16 MB */
-
- case (FPW)INTEL_ID_28F800C3B:
- info->flash_id += FLASH_28F800C3B;
- info->sector_count = 23;
- info->size = 0x00100000 * (sizeof(FPW)/2);
- break; /* => 1 or 2 MB */
-
- case (FPW)INTEL_ID_28F800B3B:
- info->flash_id += FLASH_INTEL800B;
- info->sector_count = 23;
- info->size = 0x00100000 * (sizeof(FPW)/2);
- break; /* => 1 or 2 MB */
-
- case (FPW)INTEL_ID_28F160C3B:
- info->flash_id += FLASH_28F160C3B;
- info->sector_count = 39;
- info->size = 0x00200000 * (sizeof(FPW)/2);
- break; /* => 2 or 4 MB */
-
- case (FPW)INTEL_ID_28F160B3B:
- info->flash_id += FLASH_INTEL160B;
- info->sector_count = 39;
- info->size = 0x00200000 * (sizeof(FPW)/2);
- break; /* => 2 or 4 MB */
-
- case (FPW)INTEL_ID_28F320C3B:
- info->flash_id += FLASH_28F320C3B;
- info->sector_count = 71;
- info->size = 0x00400000 * (sizeof(FPW)/2);
- break; /* => 4 or 8 MB */
-
- case (FPW)INTEL_ID_28F320B3B:
- info->flash_id += FLASH_INTEL320B;
- info->sector_count = 71;
- info->size = 0x00400000 * (sizeof(FPW)/2);
- break; /* => 4 or 8 MB */
-
- case (FPW)INTEL_ID_28F640C3B:
- info->flash_id += FLASH_28F640C3B;
- info->sector_count = 135;
- info->size = 0x00800000 * (sizeof(FPW)/2);
- break; /* => 8 or 16 MB */
-
- case (FPW)INTEL_ID_28F640B3B:
- info->flash_id += FLASH_INTEL640B;
- info->sector_count = 135;
- info->size = 0x00800000 * (sizeof(FPW)/2);
- break; /* => 8 or 16 MB */
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- return (0); /* => no or unknown flash */
- }
-
- flash_get_offsets((ulong)addr, info);
-
- /* Put FLASH back in read mode */
- flash_reset(info);
-
- return (info->size);
-}
-
-#ifdef CFG_FLASH_PROTECTION
-/*-----------------------------------------------------------------------
- */
-
-static void flash_sync_real_protect(flash_info_t *info)
-{
- FPWV *addr = (FPWV *)(info->start[0]);
- FPWV *sect;
- int i;
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_28F800C3B:
- case FLASH_28F800C3T:
- case FLASH_28F160C3B:
- case FLASH_28F160C3T:
- case FLASH_28F320C3B:
- case FLASH_28F320C3T:
- case FLASH_28F640C3B:
- case FLASH_28F640C3T:
- /* check for protected sectors */
- *addr = (FPW)0x00900090;
- for (i = 0; i < info->sector_count; i++) {
- /* read sector protection at sector address, (A7 .. A0) = 0x02.
- * D0 = 1 for each device if protected.
- * If at least one device is protected the sector is marked
- * protected, but mixed protected and unprotected devices
- * within a sector should never happen.
- */
- sect = (FPWV *)(info->start[i]);
- info->protect[i] = (sect[2] & (FPW)(0x00010001)) ? 1 : 0;
- }
-
- /* Put FLASH back in read mode */
- flash_reset(info);
- break;
-
- case FLASH_AM640U:
- default:
- /* no hardware protect that we support */
- break;
- }
-}
-#endif
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- FPWV *addr;
- int flag, prot, sect;
- int intel = (info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL;
- ulong start, now, last;
- int rcode = 0;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_INTEL800B:
- case FLASH_INTEL160B:
- case FLASH_INTEL320B:
- case FLASH_INTEL640B:
- case FLASH_28F800C3B:
- case FLASH_28F160C3B:
- case FLASH_28F320C3B:
- case FLASH_28F640C3B:
- case FLASH_AM640U:
- break;
- case FLASH_UNKNOWN:
- default:
- printf ("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- start = get_timer(0);
- last = start;
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last && rcode == 0; sect++) {
-
- if (info->protect[sect] != 0) /* protected, skip it */
- continue;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr = (FPWV *)(info->start[sect]);
- if (intel) {
- *addr = (FPW)0x00500050; /* clear status register */
- *addr = (FPW)0x00200020; /* erase setup */
- *addr = (FPW)0x00D000D0; /* erase confirm */
- }
- else {
- /* must be AMD style if not Intel */
- FPWV *base; /* first address in bank */
-
- base = (FPWV *)(info->start[0]);
- base[0x0555] = (FPW)0x00AA00AA; /* unlock */
- base[0x02AA] = (FPW)0x00550055; /* unlock */
- base[0x0555] = (FPW)0x00800080; /* erase mode */
- base[0x0555] = (FPW)0x00AA00AA; /* unlock */
- base[0x02AA] = (FPW)0x00550055; /* unlock */
- *addr = (FPW)0x00300030; /* erase sector */
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 50us for AMD, 80us for Intel.
- * Let's wait 1 ms.
- */
- udelay (1000);
-
- while ((*addr & (FPW)0x00800080) != (FPW)0x00800080) {
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
-
- if (intel) {
- /* suspend erase */
- *addr = (FPW)0x00B000B0;
- }
-
- flash_reset(info); /* reset to read mode */
- rcode = 1; /* failed */
- break;
- }
-
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- }
-
- flash_reset(info); /* reset to read mode */
- }
-
- printf (" done\n");
- return rcode;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-int bad_write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- FPW data = 0; /* 16 or 32 bit word, matches flash bus width on MPC8XX */
- int bytes; /* number of bytes to program in current word */
- int left; /* number of bytes left to program */
- int i, res;
-
- for (left = cnt, res = 0;
- left > 0 && res == 0;
- addr += sizeof(data), left -= sizeof(data) - bytes) {
-
- bytes = addr & (sizeof(data) - 1);
- addr &= ~(sizeof(data) - 1);
-
- /* combine source and destination data so can program
- * an entire word of 16 or 32 bits
- */
- for (i = 0; i < sizeof(data); i++) {
- data <<= 8;
- if (i < bytes || i - bytes >= left )
- data += *((uchar *)addr + i);
- else
- data += *src++;
- }
-
- /* write one word to the flash */
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD:
- res = write_word_amd(info, (FPWV *)addr, data);
- break;
- case FLASH_MAN_INTEL:
- res = write_word_intel(info, (FPWV *)addr, data);
- break;
- default:
- /* unknown flash type, error! */
- printf ("missing or unknown FLASH type\n");
- res = 1; /* not really a timeout, but gives error */
- break;
- }
- }
-
- return (res);
-}
-
-/**
- * write_buf: - Copy memory to flash.
- *
- * @param info:
- * @param src: source of copy transaction
- * @param addr: where to copy to
- * @param cnt: number of bytes to copy
- *
- * @return error code
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp;
- FPW data;
- int l;
- int i, rc;
-
- wp = (addr & ~1); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data >> 8) | (*(uchar *)cp << 8);
- }
- for (; i<2 && cnt>0; ++i) {
- data = (data >> 8) | (*src++ << 8);
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<2; ++i, ++cp) {
- data = (data >> 8) | (*(uchar *)cp << 8);
- }
-
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 2;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 2) {
- /* data = *((vushort*)src); */
- data = *((FPW*)src);
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- src += sizeof(FPW);
- wp += sizeof(FPW);
- cnt -= sizeof(FPW);
- }
-
- if (cnt == 0) return ERR_OK;
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<2 && cnt>0; ++i, ++cp) {
- data = (data >> 8) | (*src++ << 8);
- --cnt;
- }
- for (; i<2; ++i, ++cp) {
- data = (data >> 8) | (*(uchar *)cp << 8);
- }
-
- return write_word(info, wp, data);
-}
-
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash for AMD FLASH
- * A word is 16 or 32 bits, whichever the bus width of the flash bank
- * (not an individual chip) is.
- *
- * returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word_amd (flash_info_t *info, FPWV *dest, FPW data)
-{
- ulong start;
- int flag;
- int res = 0; /* result, assume success */
- FPWV *base; /* first address in flash bank */
-
- /* Check if Flash is (sufficiently) erased */
- if ((*dest & data) != data) {
- return (2);
- }
-
-
- base = (FPWV *)(info->start[0]);
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- base[0x0555] = (FPW)0x00AA00AA; /* unlock */
- base[0x02AA] = (FPW)0x00550055; /* unlock */
- base[0x0555] = (FPW)0x00A000A0; /* selects program mode */
-
- *dest = data; /* start programming the data */
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- start = get_timer (0);
-
- /* data polling for D7 */
- while (res == 0 && (*dest & (FPW)0x00800080) != (data & (FPW)0x00800080)) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- *dest = (FPW)0x00F000F0; /* reset bank */
- res = 1;
- }
- }
-
- return (res);
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash for Intel FLASH
- * A word is 16 or 32 bits, whichever the bus width of the flash bank
- * (not an individual chip) is.
- *
- * returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word_intel (flash_info_t *info, FPWV *dest, FPW data)
-{
- ulong start;
- int flag;
- int res = 0; /* result, assume success */
-
- /* Check if Flash is (sufficiently) erased */
- if ((*dest & data) != data) {
- return (2);
- }
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- *dest = (FPW)0x00500050; /* clear status register */
- *dest = (FPW)0x00FF00FF; /* make sure in read mode */
- *dest = (FPW)0x00400040; /* program setup */
-
- *dest = data; /* start programming the data */
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- start = get_timer (0);
-
- while (res == 0 && (*dest & (FPW)0x00800080) != (FPW)0x00800080) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- *dest = (FPW)0x00B000B0; /* Suspend program */
- res = 1;
- }
- }
-
- if (res == 0 && (*dest & (FPW)0x00100010))
- res = 1; /* write failed, time out error is close enough */
-
- *dest = (FPW)0x00500050; /* clear status register */
- *dest = (FPW)0x00FF00FF; /* make sure in read mode */
-
- return (res);
-}
-
-#ifdef CFG_FLASH_PROTECTION
-/*-----------------------------------------------------------------------
- */
-int flash_real_protect (flash_info_t * info, long sector, int prot)
-{
- int rcode = 0; /* assume success */
- FPWV *addr; /* address of sector */
- FPW value;
-
- addr = (FPWV *) (info->start[sector]);
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_28F800C3B:
- case FLASH_28F800C3T:
- case FLASH_28F160C3B:
- case FLASH_28F160C3T:
- case FLASH_28F320C3B:
- case FLASH_28F320C3T:
- case FLASH_28F640C3B:
- case FLASH_28F640C3T:
- flash_reset (info); /* make sure in read mode */
- *addr = (FPW) 0x00600060L; /* lock command setup */
- if (prot)
- *addr = (FPW) 0x00010001L; /* lock sector */
- else
- *addr = (FPW) 0x00D000D0L; /* unlock sector */
- flash_reset (info); /* reset to read mode */
-
- /* now see if it really is locked/unlocked as requested */
- *addr = (FPW) 0x00900090;
- /* read sector protection at sector address, (A7 .. A0) = 0x02.
- * D0 = 1 for each device if protected.
- * If at least one device is protected the sector is marked
- * protected, but return failure. Mixed protected and
- * unprotected devices within a sector should never happen.
- */
- value = addr[2] & (FPW) 0x00010001;
- if (value == 0)
- info->protect[sector] = 0;
- else if (value == (FPW) 0x00010001)
- info->protect[sector] = 1;
- else {
- /* error, mixed protected and unprotected */
- rcode = 1;
- info->protect[sector] = 1;
- }
- if (info->protect[sector] != prot)
- rcode = 1; /* failed to protect/unprotect as requested */
-
- /* reload all protection bits from hardware for now */
- flash_sync_real_protect (info);
- break;
-
- case FLASH_AM640U:
- default:
- /* no hardware protect that we support */
- info->protect[sector] = prot;
- break;
- }
-
- return rcode;
-}
-#endif
diff --git a/board/logodl/logodl.c b/board/logodl/logodl.c
deleted file mode 100644
index 95634ac004..0000000000
--- a/board/logodl/logodl.c
+++ /dev/null
@@ -1,123 +0,0 @@
-/*
- * (C) 2002 Kyle Harris <kharris@nexus-tech.net>, Nexus Technologies, Inc.
- * (C) 2002 Marius Groeger <mgroeger@sysgo.de>, Sysgo GmbH
- * (C) 2003 Robert Schwebel <r.schwebel@pengutronix.de>, Pengutronix
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/arch/pxa-regs.h>
-
-/**
- * board_init: - setup some data structures
- *
- * @return: 0 in case of success
- */
-
-int board_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- /* memory and cpu-speed are setup before relocation */
- /* so we do _nothing_ here */
-
- gd->bd->bi_arch_number = MACH_TYPE_LOGODL;
- gd->bd->bi_boot_params = 0x08000100;
- gd->bd->bi_baudrate = CONFIG_BAUDRATE;
-
- (*((volatile short*)0x14800000)) = 0xff; /* power on eth0 */
- (*((volatile short*)0x14000000)) = 0xff; /* power on uart */
-
- return 0;
-}
-
-
-/**
- * dram_init: - setup dynamic RAM
- *
- * @return: 0 in case of success
- */
-
-int dram_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
-
- return 0;
-}
-
-
-/**
- * logodl_set_led: - switch LEDs on or off
- *
- * @param led: LED to switch (0,1)
- * @param state: switch on (1) or off (0)
- */
-
-void logodl_set_led(int led, int state)
-{
- switch(led) {
-
- case 0:
- if (state==1) {
- CFG_LED_A_CR = CFG_LED_A_BIT;
- } else if (state==0) {
- CFG_LED_A_SR = CFG_LED_A_BIT;
- }
- break;
-
- case 1:
- if (state==1) {
- CFG_LED_B_CR = CFG_LED_B_BIT;
- } else if (state==0) {
- CFG_LED_B_SR = CFG_LED_B_BIT;
- }
- break;
- }
-
- return;
-}
-
-
-/**
- * show_boot_progress: - indicate state of the boot process
- *
- * @param status: Status number - see README for details.
- *
- * The LOGOTRONIC does only have 2 LEDs, so we switch them on at the most
- * important states (1, 5, 15).
- */
-
-void show_boot_progress (int status)
-{
- /*
- switch(status) {
- case 1: logodl_set_led(0,1); break;
- case 5: logodl_set_led(1,1); break;
- case 15: logodl_set_led(2,1); break;
- }
- */
- logodl_set_led(0, (status & 1)==1);
- logodl_set_led(1, (status & 2)==2);
-
- return;
-}
diff --git a/board/logodl/lowlevel_init.S b/board/logodl/lowlevel_init.S
deleted file mode 100644
index aa9dcba6fc..0000000000
--- a/board/logodl/lowlevel_init.S
+++ /dev/null
@@ -1,437 +0,0 @@
-/*
- * Most of this taken from Redboot hal_platform_setup.h with cleanup
- *
- * NOTE: I haven't clean this up considerably, just enough to get it
- * running. See hal_platform_setup.h for the source. See
- * board/cradle/lowlevel_init.S for another PXA250 setup that is
- * much cleaner.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <config.h>
-#include <version.h>
-#include <asm/arch/pxa-regs.h>
-
-DRAM_SIZE: .long CFG_DRAM_SIZE
-
-/* wait for coprocessor write complete */
- .macro CPWAIT reg
- mrc p15,0,\reg,c2,c0,0
- mov \reg,\reg
- sub pc,pc,#4
- .endm
-
-_TEXT_BASE:
- .word TEXT_BASE
-
-
-/*
- * Memory setup
- */
-
-.globl lowlevel_init
-lowlevel_init:
-
- mov r10, lr
-
- /* Set up GPIO pins first ----------------------------------------- */
-
- ldr r0, =GPSR0
- ldr r1, =CFG_GPSR0_VAL
- str r1, [r0]
-
- ldr r0, =GPSR1
- ldr r1, =CFG_GPSR1_VAL
- str r1, [r0]
-
- ldr r0, =GPSR2
- ldr r1, =CFG_GPSR2_VAL
- str r1, [r0]
-
- ldr r0, =GPCR0
- ldr r1, =CFG_GPCR0_VAL
- str r1, [r0]
-
- ldr r0, =GPCR1
- ldr r1, =CFG_GPCR1_VAL
- str r1, [r0]
-
- ldr r0, =GPCR2
- ldr r1, =CFG_GPCR2_VAL
- str r1, [r0]
-
- ldr r0, =GPDR0
- ldr r1, =CFG_GPDR0_VAL
- str r1, [r0]
-
- ldr r0, =GPDR1
- ldr r1, =CFG_GPDR1_VAL
- str r1, [r0]
-
- ldr r0, =GPDR2
- ldr r1, =CFG_GPDR2_VAL
- str r1, [r0]
-
- ldr r0, =GAFR0_L
- ldr r1, =CFG_GAFR0_L_VAL
- str r1, [r0]
-
- ldr r0, =GAFR0_U
- ldr r1, =CFG_GAFR0_U_VAL
- str r1, [r0]
-
- ldr r0, =GAFR1_L
- ldr r1, =CFG_GAFR1_L_VAL
- str r1, [r0]
-
- ldr r0, =GAFR1_U
- ldr r1, =CFG_GAFR1_U_VAL
- str r1, [r0]
-
- ldr r0, =GAFR2_L
- ldr r1, =CFG_GAFR2_L_VAL
- str r1, [r0]
-
- ldr r0, =GAFR2_U
- ldr r1, =CFG_GAFR2_U_VAL
- str r1, [r0]
-
- ldr r0, =PSSR /* enable GPIO pins */
- ldr r1, =CFG_PSSR_VAL
- str r1, [r0]
-
-/* ldr r3, =MSC1 / low - bank 2 Lubbock Registers / SRAM */
-/* ldr r2, =CFG_MSC1_VAL / high - bank 3 Ethernet Controller */
-/* str r2, [r3] / need to set MSC1 before trying to write to the HEX LEDs */
-/* ldr r2, [r3] / need to read it back to make sure the value latches (see MSC section of manual) */
-/* */
-/* ldr r1, =LED_BLANK */
-/* mov r0, #0xFF */
-/* str r0, [r1] / turn on hex leds */
-/* */
-/*loop: */
-/* */
-/* ldr r0, =0xB0070001 */
-/* ldr r1, =_LED */
-/* str r0, [r1] / hex display */
-
-
- /* ---------------------------------------------------------------- */
- /* Enable memory interface */
- /* */
- /* The sequence below is based on the recommended init steps */
- /* detailed in the Intel PXA250 Operating Systems Developers Guide, */
- /* Chapter 10. */
- /* ---------------------------------------------------------------- */
-
- /* ---------------------------------------------------------------- */
- /* Step 1: Wait for at least 200 microsedonds to allow internal */
- /* clocks to settle. Only necessary after hard reset... */
- /* FIXME: can be optimized later */
- /* ---------------------------------------------------------------- */
-
- ldr r3, =OSCR /* reset the OS Timer Count to zero */
- mov r2, #0
- str r2, [r3]
- ldr r4, =0x300 /* really 0x2E1 is about 200usec, */
- /* so 0x300 should be plenty */
-1:
- ldr r2, [r3]
- cmp r4, r2
- bgt 1b
-
-mem_init:
-
- ldr r1, =MEMC_BASE /* get memory controller base addr. */
-
- /* ---------------------------------------------------------------- */
- /* Step 2a: Initialize Asynchronous static memory controller */
- /* ---------------------------------------------------------------- */
-
- /* MSC registers: timing, bus width, mem type */
-
- /* MSC0: nCS(0,1) */
- ldr r2, =CFG_MSC0_VAL
- str r2, [r1, #MSC0_OFFSET]
- ldr r2, [r1, #MSC0_OFFSET] /* read back to ensure */
- /* that data latches */
- /* MSC1: nCS(2,3) */
- ldr r2, =CFG_MSC1_VAL
- str r2, [r1, #MSC1_OFFSET]
- ldr r2, [r1, #MSC1_OFFSET]
-
- /* MSC2: nCS(4,5) */
- ldr r2, =CFG_MSC2_VAL
- str r2, [r1, #MSC2_OFFSET]
- ldr r2, [r1, #MSC2_OFFSET]
-
- /* ---------------------------------------------------------------- */
- /* Step 2b: Initialize Card Interface */
- /* ---------------------------------------------------------------- */
-
- /* MECR: Memory Expansion Card Register */
- ldr r2, =CFG_MECR_VAL
- str r2, [r1, #MECR_OFFSET]
- ldr r2, [r1, #MECR_OFFSET]
-
- /* MCMEM0: Card Interface slot 0 timing */
- ldr r2, =CFG_MCMEM0_VAL
- str r2, [r1, #MCMEM0_OFFSET]
- ldr r2, [r1, #MCMEM0_OFFSET]
-
- /* MCMEM1: Card Interface slot 1 timing */
- ldr r2, =CFG_MCMEM1_VAL
- str r2, [r1, #MCMEM1_OFFSET]
- ldr r2, [r1, #MCMEM1_OFFSET]
-
- /* MCATT0: Card Interface Attribute Space Timing, slot 0 */
- ldr r2, =CFG_MCATT0_VAL
- str r2, [r1, #MCATT0_OFFSET]
- ldr r2, [r1, #MCATT0_OFFSET]
-
- /* MCATT1: Card Interface Attribute Space Timing, slot 1 */
- ldr r2, =CFG_MCATT1_VAL
- str r2, [r1, #MCATT1_OFFSET]
- ldr r2, [r1, #MCATT1_OFFSET]
-
- /* MCIO0: Card Interface I/O Space Timing, slot 0 */
- ldr r2, =CFG_MCIO0_VAL
- str r2, [r1, #MCIO0_OFFSET]
- ldr r2, [r1, #MCIO0_OFFSET]
-
- /* MCIO1: Card Interface I/O Space Timing, slot 1 */
- ldr r2, =CFG_MCIO1_VAL
- str r2, [r1, #MCIO1_OFFSET]
- ldr r2, [r1, #MCIO1_OFFSET]
-
- /* ---------------------------------------------------------------- */
- /* Step 2c: Write FLYCNFG FIXME: what's that??? */
- /* ---------------------------------------------------------------- */
-
- /* test if we run from flash or RAM - RAM/BDI: don't setup RAM */
- adr r3, mem_init /* r0 <- current position of code */
- ldr r2, =mem_init
- cmp r3, r2 /* skip init if in place */
- beq initirqs
-
-
- /* ---------------------------------------------------------------- */
- /* Step 2d: Initialize Timing for Sync Memory (SDCLK0) */
- /* ---------------------------------------------------------------- */
-
- /* Before accessing MDREFR we need a valid DRI field, so we set */
- /* this to power on defaults + DRI field. */
-
- ldr r3, =CFG_MDREFR_VAL
- ldr r2, =0xFFF
- and r3, r3, r2
- ldr r4, =0x03ca4000
- orr r4, r4, r3
-
- str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */
- ldr r4, [r1, #MDREFR_OFFSET]
-
-
- /* ---------------------------------------------------------------- */
- /* Step 3: Initialize Synchronous Static Memory (Flash/Peripherals) */
- /* ---------------------------------------------------------------- */
-
- /* Initialize SXCNFG register. Assert the enable bits */
-
- /* Write SXMRS to cause an MRS command to all enabled banks of */
- /* synchronous static memory. Note that SXLCR need not be written */
- /* at this time. */
-
- /* FIXME: we use async mode for now */
-
-
- /* ---------------------------------------------------------------- */
- /* Step 4: Initialize SDRAM */
- /* ---------------------------------------------------------------- */
-
- /* Step 4a: assert MDREFR:K?RUN and configure */
- /* MDREFR:K1DB2 and MDREFR:K2DB2 as desired. */
-
- ldr r4, =CFG_MDREFR_VAL
- str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */
- ldr r4, [r1, #MDREFR_OFFSET]
-
- /* Step 4b: de-assert MDREFR:SLFRSH. */
-
- bic r4, r4, #(MDREFR_SLFRSH)
-
- str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */
- ldr r4, [r1, #MDREFR_OFFSET]
-
-
- /* Step 4c: assert MDREFR:E1PIN and E0PIO */
-
- orr r4, r4, #(MDREFR_E1PIN|MDREFR_E0PIN)
-
- str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */
- ldr r4, [r1, #MDREFR_OFFSET]
-
-
- /* Step 4d: write MDCNFG with MDCNFG:DEx deasserted (set to 0), to */
- /* configure but not enable each SDRAM partition pair. */
-
- ldr r4, =CFG_MDCNFG_VAL
- bic r4, r4, #(MDCNFG_DE0|MDCNFG_DE1)
-
- str r4, [r1, #MDCNFG_OFFSET] /* write back MDCNFG */
- ldr r4, [r1, #MDCNFG_OFFSET]
-
-
- /* Step 4e: Wait for the clock to the SDRAMs to stabilize, */
- /* 100..200 µsec. */
-
- ldr r3, =OSCR /* reset the OS Timer Count to zero */
- mov r2, #0
- str r2, [r3]
- ldr r4, =0x300 /* really 0x2E1 is about 200usec, */
- /* so 0x300 should be plenty */
-1:
- ldr r2, [r3]
- cmp r4, r2
- bgt 1b
-
-
- /* Step 4f: Trigger a number (usually 8) refresh cycles by */
- /* attempting non-burst read or write accesses to disabled */
- /* SDRAM, as commonly specified in the power up sequence */
- /* documented in SDRAM data sheets. The address(es) used */
- /* for this purpose must not be cacheable. */
-
- /* There should 9 writes, since the first write doesn't */
- /* trigger a refresh cycle on PXA250. See Intel PXA250 and */
- /* PXA210 Processors Specification Update, */
- /* Jan 2003, Errata #116, page 30. */
-
-
- ldr r3, =CFG_DRAM_BASE
- str r2, [r3]
- str r2, [r3]
- str r2, [r3]
- str r2, [r3]
- str r2, [r3]
- str r2, [r3]
- str r2, [r3]
- str r2, [r3]
- str r2, [r3]
-
- /* Step 4g: Write MDCNFG with enable bits asserted */
- /* (MDCNFG:DEx set to 1). */
-
- ldr r3, [r1, #MDCNFG_OFFSET]
- orr r3, r3, #(MDCNFG_DE0|MDCNFG_DE1)
- str r3, [r1, #MDCNFG_OFFSET]
-
- /* Step 4h: Write MDMRS. */
-
- ldr r2, =CFG_MDMRS_VAL
- str r2, [r1, #MDMRS_OFFSET]
-
-
- /* We are finished with Intel's memory controller initialisation */
-
- /* ---------------------------------------------------------------- */
- /* Disable (mask) all interrupts at interrupt controller */
- /* ---------------------------------------------------------------- */
-
-initirqs:
-
- mov r1, #0 /* clear int. level register (IRQ, not FIQ) */
- ldr r2, =ICLR
- str r1, [r2]
-
- ldr r2, =ICMR /* mask all interrupts at the controller */
- str r1, [r2]
-
-
- /* ---------------------------------------------------------------- */
- /* Clock initialisation */
- /* ---------------------------------------------------------------- */
-
-initclks:
-
- /* Disable the peripheral clocks, and set the core clock frequency */
- /* (hard-coding at 398.12MHz for now). */
-
- /* Turn Off ALL on-chip peripheral clocks for re-configuration */
- /* Note: See label 'ENABLECLKS' for the re-enabling */
- ldr r1, =CKEN
- mov r2, #0
- str r2, [r1]
-
-
- /* default value in case no valid rotary switch setting is found */
- ldr r2, =(CCCR_L27|CCCR_M2|CCCR_N10) /* DEFAULT: {200/200/100} */
-
- /* ... and write the core clock config register */
- ldr r1, =CCCR
- str r2, [r1]
-
- /* enable the 32Khz oscillator for RTC and PowerManager */
-/*
- ldr r1, =OSCC
- mov r2, #OSCC_OON
- str r2, [r1]
-*/
- /* NOTE: spin here until OSCC.OOK get set, meaning the PLL */
- /* has settled. */
-60:
- ldr r2, [r1]
- ands r2, r2, #1
- beq 60b
-
- /* ---------------------------------------------------------------- */
- /* */
- /* ---------------------------------------------------------------- */
-
- /* Save SDRAM size */
- ldr r1, =DRAM_SIZE
- str r8, [r1]
-
- /* Interrupt init: Mask all interrupts */
- ldr r0, =ICMR /* enable no sources */
- mov r1, #0
- str r1, [r0]
-
- /* FIXME */
-
-#ifndef DEBUG
- /*Disable software and data breakpoints */
- mov r0,#0
- mcr p15,0,r0,c14,c8,0 /* ibcr0 */
- mcr p15,0,r0,c14,c9,0 /* ibcr1 */
- mcr p15,0,r0,c14,c4,0 /* dbcon */
-
- /*Enable all debug functionality */
- mov r0,#0x80000000
- mcr p14,0,r0,c10,c0,0 /* dcsr */
-#endif
-
- /* ---------------------------------------------------------------- */
- /* End lowlevel_init */
- /* ---------------------------------------------------------------- */
-
-endlowlevel_init:
-
- mov pc, lr
diff --git a/board/logodl/u-boot.lds b/board/logodl/u-boot.lds
deleted file mode 100644
index f0102391b3..0000000000
--- a/board/logodl/u-boot.lds
+++ /dev/null
@@ -1,56 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-ENTRY(_start)
-SECTIONS
-{
- . = 0x00000000;
-
- . = ALIGN(4);
- .text :
- {
- cpu/pxa/start.o (.text)
- *(.text)
- }
-
- . = ALIGN(4);
- .rodata : { *(.rodata) }
-
- . = ALIGN(4);
- .data : { *(.data) }
-
- . = ALIGN(4);
- .got : { *(.got) }
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = ALIGN(4);
- __bss_start = .;
- .bss : { *(.bss) }
- _end = .;
-}
diff --git a/board/lpd7a40x/Makefile b/board/lpd7a40x/Makefile
deleted file mode 100644
index ebe14df1b6..0000000000
--- a/board/lpd7a40x/Makefile
+++ /dev/null
@@ -1,47 +0,0 @@
-#
-# (C) Copyright 2000, 2001, 2002
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := lpd7a40x.o flash.o
-SOBJS := lowlevel_init.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS) $(SOBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/lpd7a40x/config.mk b/board/lpd7a40x/config.mk
deleted file mode 100644
index bc03874a47..0000000000
--- a/board/lpd7a40x/config.mk
+++ /dev/null
@@ -1,38 +0,0 @@
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-# Logic ZOOM LH7A400 SDK board w/Logic LH7A400-10 card engine
-# w/Sharp LH7A400 SoC (ARM920T) cpu
-#
-
-#
-# 32 or 64 MB SDRAM on SDCSC0 @ 0xc0000000
-#
-# Linux-Kernel is @ 0xC0008000, entry 0xc0008000
-# params @ 0xc0000100
-# optionally with a ramdisk at 0xc0300000
-#
-# we load ourself to 0xc1fc0000 (32M - 256K)
-#
-# download area is 0xc0f00000
-#
-
-TEXT_BASE = 0xc1fc0000
-#TEXT_BASE = 0x00000000
diff --git a/board/lpd7a40x/flash.c b/board/lpd7a40x/flash.c
deleted file mode 100644
index 2dfe37656f..0000000000
--- a/board/lpd7a40x/flash.c
+++ /dev/null
@@ -1,489 +0,0 @@
-/*
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * (C) Copyright 2002
- * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/* #define DEBUG */
-
-#include <common.h>
-#include <environment.h>
-
-#define FLASH_BANK_SIZE 0x1000000 /* 16MB (2 x 8 MB) */
-#define MAIN_SECT_SIZE 0x40000 /* 256KB (2 x 128kB) */
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
-
-
-#define CMD_READ_ARRAY 0x00FF00FF
-#define CMD_IDENTIFY 0x00900090
-#define CMD_ERASE_SETUP 0x00200020
-#define CMD_ERASE_CONFIRM 0x00D000D0
-#define CMD_PROGRAM 0x00400040
-#define CMD_RESUME 0x00D000D0
-#define CMD_SUSPEND 0x00B000B0
-#define CMD_STATUS_READ 0x00700070
-#define CMD_STATUS_RESET 0x00500050
-
-#define BIT_BUSY 0x00800080
-#define BIT_ERASE_SUSPEND 0x00400040
-#define BIT_ERASE_ERROR 0x00200020
-#define BIT_PROGRAM_ERROR 0x00100010
-#define BIT_VPP_RANGE_ERROR 0x00080008
-#define BIT_PROGRAM_SUSPEND 0x00040004
-#define BIT_PROTECT_ERROR 0x00020002
-#define BIT_UNDEFINED 0x00010001
-
-#define BIT_SEQUENCE_ERROR 0x00300030
-#define BIT_TIMEOUT 0x80000000
-
-/*-----------------------------------------------------------------------
- */
-
-ulong flash_init (void)
-{
- int i, j;
- ulong size = 0;
-
- for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
- ulong flashbase = 0;
-
- flash_info[i].flash_id =
- (INTEL_MANUFACT & FLASH_VENDMASK) |
- (INTEL_ID_28F640J3A & FLASH_TYPEMASK);
- flash_info[i].size = FLASH_BANK_SIZE;
- flash_info[i].sector_count = CFG_MAX_FLASH_SECT;
- memset (flash_info[i].protect, 0, CFG_MAX_FLASH_SECT);
- if (i == 0)
- flashbase = CFG_FLASH_BASE;
- else
- panic ("configured too many flash banks!\n");
- for (j = 0; j < flash_info[i].sector_count; j++) {
- flash_info[i].start[j] = flashbase;
-
- /* uniform sector size */
- flashbase += MAIN_SECT_SIZE;
- }
- size += flash_info[i].size;
- }
-
- /*
- * Protect monitor and environment sectors
- */
- flash_protect ( FLAG_PROTECT_SET,
- CFG_FLASH_BASE,
- CFG_FLASH_BASE + monitor_flash_len - 1,
- &flash_info[0]);
-
- flash_protect ( FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0]);
-
-#ifdef CFG_ENV_ADDR_REDUND
- flash_protect ( FLAG_PROTECT_SET,
- CFG_ENV_ADDR_REDUND,
- CFG_ENV_ADDR_REDUND + CFG_ENV_SIZE_REDUND - 1,
- &flash_info[0]);
-#endif
-
- return size;
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t * info)
-{
- int i;
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case (INTEL_MANUFACT & FLASH_VENDMASK):
- printf ("Intel: ");
- break;
- default:
- printf ("Unknown Vendor ");
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case (INTEL_ID_28F640J3A & FLASH_TYPEMASK):
- printf ("2x 28F640J3A (64Mbit)\n");
- break;
- default:
- printf ("Unknown Chip Type\n");
- return;
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; i++) {
- if ((i % 5) == 0) {
- printf ("\n ");
- }
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " ");
- }
- printf ("\n");
-}
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_error (ulong code)
-{
- /* Check bit patterns */
- /* SR.7=0 is busy, SR.7=1 is ready */
- /* all other flags indicate error on 1 */
- /* SR.0 is undefined */
- /* Timeout is our faked flag */
-
- /* sequence is described in Intel 290644-005 document */
-
- /* check Timeout */
- if (code & BIT_TIMEOUT) {
- puts ("Timeout\n");
- return ERR_TIMOUT;
- }
-
- /* check Busy, SR.7 */
- if (~code & BIT_BUSY) {
- puts ("Busy\n");
- return ERR_PROG_ERROR;
- }
-
- /* check Vpp low, SR.3 */
- if (code & BIT_VPP_RANGE_ERROR) {
- puts ("Vpp range error\n");
- return ERR_PROG_ERROR;
- }
-
- /* check Device Protect Error, SR.1 */
- if (code & BIT_PROTECT_ERROR) {
- puts ("Device protect error\n");
- return ERR_PROG_ERROR;
- }
-
- /* check Command Seq Error, SR.4 & SR.5 */
- if (code & BIT_SEQUENCE_ERROR) {
- puts ("Command seqence error\n");
- return ERR_PROG_ERROR;
- }
-
- /* check Block Erase Error, SR.5 */
- if (code & BIT_ERASE_ERROR) {
- puts ("Block erase error\n");
- return ERR_PROG_ERROR;
- }
-
- /* check Program Error, SR.4 */
- if (code & BIT_PROGRAM_ERROR) {
- puts ("Program error\n");
- return ERR_PROG_ERROR;
- }
-
- /* check Block Erase Suspended, SR.6 */
- if (code & BIT_ERASE_SUSPEND) {
- puts ("Block erase suspended\n");
- return ERR_PROG_ERROR;
- }
-
- /* check Program Suspended, SR.2 */
- if (code & BIT_PROGRAM_SUSPEND) {
- puts ("Program suspended\n");
- return ERR_PROG_ERROR;
- }
-
- /* OK, no error */
- return ERR_OK;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t * info, int s_first, int s_last)
-{
- ulong result, result1;
- int iflag, prot, sect;
- int rc = ERR_OK;
-
-#ifdef USE_920T_MMU
- int cflag;
-#endif
-
- debug ("flash_erase: s_first %d s_last %d\n", s_first, s_last);
-
- /* first look for protection bits */
-
- if (info->flash_id == FLASH_UNKNOWN)
- return ERR_UNKNOWN_FLASH_TYPE;
-
- if ((s_first < 0) || (s_first > s_last)) {
- return ERR_INVAL;
- }
-
- if ((info->flash_id & FLASH_VENDMASK) !=
- (INTEL_MANUFACT & FLASH_VENDMASK)) {
- return ERR_UNKNOWN_FLASH_VENDOR;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- /*
- * Disable interrupts which might cause a timeout
- * here. Remember that our exception vectors are
- * at address 0 in the flash, and we don't want a
- * (ticker) exception to happen while the flash
- * chip is in programming mode.
- */
-#ifdef USE_920T_MMU
- cflag = dcache_status ();
- dcache_disable ();
-#endif
- iflag = disable_interrupts ();
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect <= s_last && !ctrlc (); sect++) {
-
- debug ("Erasing sector %2d @ %08lX... ",
- sect, info->start[sect]);
-
- /* arm simple, non interrupt dependent timer */
- reset_timer_masked();
-
- if (info->protect[sect] == 0) { /* not protected */
- vu_long *addr = (vu_long *) (info->start[sect]);
- ulong bsR7, bsR7_2, bsR5, bsR5_2;
-
- /* *addr = CMD_STATUS_RESET; */
- *addr = CMD_ERASE_SETUP;
- *addr = CMD_ERASE_CONFIRM;
-
- /* wait until flash is ready */
- do {
- /* check timeout */
- if (get_timer_masked () > CFG_FLASH_ERASE_TOUT) {
- *addr = CMD_STATUS_RESET;
- result = BIT_TIMEOUT;
- break;
- }
-
- *addr = CMD_STATUS_READ;
- result = *addr;
- bsR7 = result & (1 << 7);
- bsR7_2 = result & (1 << 23);
- } while (!bsR7 | !bsR7_2);
-
- *addr = CMD_STATUS_READ;
- result1 = *addr;
- bsR5 = result1 & (1 << 5);
- bsR5_2 = result1 & (1 << 21);
-#ifdef SAMSUNG_FLASH_DEBUG
- printf ("bsR5 %lx bsR5_2 %lx\n", bsR5, bsR5_2);
- if (bsR5 != 0 && bsR5_2 != 0)
- printf ("bsR5 %lx bsR5_2 %lx\n", bsR5, bsR5_2);
-#endif
-
- *addr = CMD_READ_ARRAY;
- *addr = CMD_RESUME;
-
- if ((rc = flash_error (result)) != ERR_OK)
- goto outahere;
-#if 0
- printf ("ok.\n");
- } else { /* it was protected */
-
- printf ("protected!\n");
-#endif
- }
- }
-
-outahere:
- /* allow flash to settle - wait 10 ms */
- udelay_masked (10000);
-
- if (iflag)
- enable_interrupts ();
-
-#ifdef USE_920T_MMU
- if (cflag)
- dcache_enable ();
-#endif
- return rc;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash
- */
-
-volatile static int write_word (flash_info_t * info, ulong dest,
- ulong data)
-{
- vu_long *addr = (vu_long *) dest;
- ulong result;
- int rc = ERR_OK;
- int iflag;
-
-#ifdef USE_920T_MMU
- int cflag;
-#endif
-
- /*
- * Check if Flash is (sufficiently) erased
- */
- result = *addr;
- if ((result & data) != data)
- return ERR_NOT_ERASED;
-
- /*
- * Disable interrupts which might cause a timeout
- * here. Remember that our exception vectors are
- * at address 0 in the flash, and we don't want a
- * (ticker) exception to happen while the flash
- * chip is in programming mode.
- */
-#ifdef USE_920T_MMU
- cflag = dcache_status ();
- dcache_disable ();
-#endif
- iflag = disable_interrupts ();
-
- /* *addr = CMD_STATUS_RESET; */
- *addr = CMD_PROGRAM;
- *addr = data;
-
- /* arm simple, non interrupt dependent timer */
- reset_timer_masked ();
-
- /* wait until flash is ready */
- do {
- /* check timeout */
- if (get_timer_masked () > CFG_FLASH_ERASE_TOUT) {
- *addr = CMD_SUSPEND;
- result = BIT_TIMEOUT;
- break;
- }
-
- *addr = CMD_STATUS_READ;
- result = *addr;
- } while (~result & BIT_BUSY);
-
- /* *addr = CMD_READ_ARRAY; */
- *addr = CMD_STATUS_READ;
- result = *addr;
-
- rc = flash_error (result);
-
- if (iflag)
- enable_interrupts ();
-
-#ifdef USE_920T_MMU
- if (cflag)
- dcache_enable ();
-#endif
- *addr = CMD_READ_ARRAY;
- *addr = CMD_RESUME;
- return rc;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash.
- */
-
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int l;
- int i, rc;
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i = 0, cp = wp; i < l; ++i, ++cp) {
- data = (data >> 8) | (*(uchar *) cp << 24);
- }
- for (; i < 4 && cnt > 0; ++i) {
- data = (data >> 8) | (*src++ << 24);
- --cnt;
- ++cp;
- }
- for (; cnt == 0 && i < 4; ++i, ++cp) {
- data = (data >> 8) | (*(uchar *) cp << 24);
- }
-
- if ((rc = write_word (info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = *((vu_long *) src);
- if ((rc = write_word (info, wp, data)) != 0) {
- return (rc);
- }
- src += 4;
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return ERR_OK;
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i = 0, cp = wp; i < 4 && cnt > 0; ++i, ++cp) {
- data = (data >> 8) | (*src++ << 24);
- --cnt;
- }
- for (; i < 4; ++i, ++cp) {
- data = (data >> 8) | (*(uchar *) cp << 24);
- }
-
- return write_word (info, wp, data);
-}
diff --git a/board/lpd7a40x/lowlevel_init.S b/board/lpd7a40x/lowlevel_init.S
deleted file mode 100644
index b3ed55ce35..0000000000
--- a/board/lpd7a40x/lowlevel_init.S
+++ /dev/null
@@ -1,212 +0,0 @@
-/*
- * Memory Setup - initialize memory controller(s) for devices required
- * to boot and relocate
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-
-#include <config.h>
-#include <version.h>
-
-
-/* memory controller */
-#define BCRX_DEFAULT (0x0000fbe0)
-#define BCRX_MW_8 (0x00000000)
-#define BCRX_MW_16 (0x10000000)
-#define BCRX_MW_32 (0x20000000)
-#define BCRX_PME (0x08000000)
-#define BCRX_WP (0x04000000)
-#define BCRX_WST2_SHIFT (11)
-#define BCRX_WST1_SHIFT (5)
-#define BCRX_IDCY_SHIFT (0)
-
-/* Bank0 Async Flash */
-#define BCR0 (0x80002000)
-#define BCR0_FLASH (BCRX_MW_32 | (0x08<<BCRX_WST2_SHIFT) | (0x0E<<BCRX_WST1_SHIFT))
-
-/* Bank1 Open */
-#define BCR1 (0x80002004)
-
-/* Bank2 Not used (EEPROM?) */
-#define BCR2 (0x80002008)
-
-/* Bank3 Not used */
-#define BCR3 (0x8000200C)
-
-/* Bank4 PC Card1 */
-
-/* Bank5 PC Card2 */
-
-/* Bank6 CPLD IO Controller Peripherals (slow) */
-#define BCR6 (0x80002018)
-#define BCR6_CPLD_SLOW (BCRX_DEFAULT | BCRX_MW_16)
-
-/* Bank7 CPLD IO Controller Peripherals (fast) */
-#define BCR7 (0x8000201C)
-#define BCR7_CPLD_FAST (BCRX_MW_16 | (0x16<<BCRX_WST2_SHIFT) | (0x16<<BCRX_WST1_SHIFT) | (0x2<<BCRX_IDCY_SHIFT))
-
-/* SDRAM */
-#define GBLCNFG (0x80002404)
-#define GC_CKE (0x80000000)
-#define GC_CKSD (0x40000000)
-#define GC_LCR (0x00000040)
-#define GC_SMEMBURST (0x00000020)
-#define GC_MRS (0x00000002)
-#define GC_INIT (0x00000001)
-
-#define GC_CMD_NORMAL (GC_CKE)
-#define GC_CMD_MODE (GC_CKE | GC_MRS)
-#define GC_CMD_SYNCFLASH_LOAD (GC_CKE | GC_MRS | GC_LCR)
-#define GC_CMD_PRECHARGEALL (GC_CKE | GC_INIT)
-#define GC_CMD_NOP (GC_CKE | GC_INIT | GC_MRS)
-
-#define RFSHTMR (0x80002408)
-#define RFSHTMR_INIT (10) /* period=100 ns, HCLK=100Mhz, (2048+1-15.6*66) */
-#define RFSHTMR_NORMAL (1500) /* period=15.6 us, HCLK=100Mhz, (2048+1-15.6*66) */
-
-#define SDCSCX_BASE (0x80002410)
-#define SDCSCX_DEFAULT (0x01220008)
-#define SDCSCX_AUTOPC (0x01000000)
-#define SDCSCX_RAS2CAS_2 (0x00200000)
-#define SDCSCX_RAS2CAS_3 (0x00300000)
-#define SDCSCX_WBL (0x00080000)
-#define SDCSCX_CASLAT_8 (0x00070000)
-#define SDCSCX_CASLAT_7 (0x00060000)
-#define SDCSCX_CASLAT_6 (0x00050000)
-#define SDCSCX_CASLAT_5 (0x00040000)
-#define SDCSCX_CASLAT_4 (0x00030000)
-#define SDCSCX_CASLAT_3 (0x00020000)
-#define SDCSCX_CASLAT_2 (0x00010000)
-#define SDCSCX_2KPAGE (0x00000040)
-#define SDCSCX_SROMLL (0x00000020)
-#define SDCSCX_SROM512 (0x00000010)
-#define SDCSCX_4BNK (0x00000008)
-#define SDCSCX_2BNK (0x00000000)
-#define SDCSCX_EBW_16 (0x00000004)
-#define SDCSCX_EBW_32 (0x00000000)
-
-#define SDRAM_BASE (0xC0000000)
-#define SDCSC_BANK_OFFSET (0x10000000)
-
-/*
- * The SDRAM DEVICE MODE PROGRAMMING VALUE
- */
-#define BURST_LENGTH_4 (2 << 10)
-#define BURST_LENGTH_8 (3 << 10)
-#define WBURST_LENGTH_BL (0 << 19)
-#define WBURST_LENGTH_SINGLE (1 << 19)
-#define CAS_2 (2 << 14)
-#define CAS_3 (3 << 14)
-#define BAT_SEQUENTIAL (0 << 13)
-#define BAT_INTERLEAVED (1 << 13)
-#define OPM_NORMAL (0 << 17)
-#define SDRAM_DEVICE_MODE (WBURST_LENGTH_BL|OPM_NORMAL|CAS_3|BAT_SEQUENTIAL|BURST_LENGTH_4)
-
-
-#define TIMER1_BASE (0x80000C00)
-
-/*
- * special lookup flags
- */
-#define DO_MEM_DELAY 1
-#define DO_MEM_READ 2
-
-_TEXT_BASE:
- .word TEXT_BASE
-
-.globl lowlevel_init
-lowlevel_init:
- mov r9, lr @ save return address
-
- /* memory control configuration */
- /* make r0 relative the current location so that it */
- /* reads INITMEM_DATA out of FLASH rather than memory ! */
- /* r0 = current word pointer */
- /* r1 = end word location, one word past last actual word */
- /* r3 = address for writes, special lookup flags */
- /* r4 = value for writes, delay constants, or read addresses */
- /* r2 = location for mem reads */
-
- ldr r0, =INITMEM_DATA
- ldr r1, _TEXT_BASE
- sub r0, r0, r1
- add r1, r0, #112
-
-mem_loop:
- cmp r1, r0
- moveq pc, r9 @ Done
-
- ldr r3, [r0], #4 @ Fetch Destination Register Address, or 1 for delay
- ldr r4, [r0], #4 @ value
-
- cmp r3, #DO_MEM_DELAY
- bleq mem_delay
- beq mem_loop
- cmp r3, #DO_MEM_READ
- ldreq r2, [r4]
- beq mem_loop
- str r4, [r3] @ normal register/ram store
- b mem_loop
-
-mem_delay:
- ldr r5, =TIMER1_BASE
- mov r6, r4, LSR #1 @ timer resolution is ~2us
- str r6, [r5]
- mov r6, #0x88 @ using 508.469KHz clock, enable
- str r6, [r5, #8]
-0: ldr r6, [r5, #4] @ timer value
- cmp r6, #0
- bne 0b
- mov r6, #0 @ disable timer
- str r6, [r5, #8]
- mov pc, lr
-
- .ltorg
-/* the literal pools origin */
-
-INITMEM_DATA:
- .word BCR0
- .word BCR0_FLASH
- .word BCR6
- .word BCR6_CPLD_SLOW
- .word BCR7
- .word BCR7_CPLD_FAST
- .word SDCSCX_BASE
- .word (SDCSCX_RAS2CAS_3 | SDCSCX_CASLAT_3 | SDCSCX_SROMLL | SDCSCX_4BNK | SDCSCX_EBW_32)
- .word GBLCNFG
- .word GC_CMD_NOP
- .word DO_MEM_DELAY
- .word 200
- .word GBLCNFG
- .word GC_CMD_PRECHARGEALL
- .word RFSHTMR
- .word RFSHTMR_INIT
- .word DO_MEM_DELAY
- .word 8
- .word RFSHTMR
- .word RFSHTMR_NORMAL
- .word GBLCNFG
- .word GC_CMD_MODE
- .word DO_MEM_READ
- .word (SDRAM_BASE | SDRAM_DEVICE_MODE)
- .word GBLCNFG
- .word GC_CMD_NORMAL
- .word SDCSCX_BASE
- .word (SDCSCX_AUTOPC | SDCSCX_RAS2CAS_3 | SDCSCX_CASLAT_3 | SDCSCX_SROMLL | SDCSCX_4BNK | SDCSCX_EBW_32)
diff --git a/board/lpd7a40x/lpd7a40x.c b/board/lpd7a40x/lpd7a40x.c
deleted file mode 100644
index 4c373eead5..0000000000
--- a/board/lpd7a40x/lpd7a40x.c
+++ /dev/null
@@ -1,83 +0,0 @@
-/*
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * (C) Copyright 2002
- * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#if defined(CONFIG_LH7A400)
-#include <lh7a400.h>
-#elif defined(CONFIG_LH7A404)
-#include <lh7a404.h>
-#else
-#error "No CPU defined!"
-#endif
-#include <asm/mach-types.h>
-
-#include <lpd7a400_cpld.h>
-
-/*
- * Miscellaneous platform dependent initialisations
- */
-
-int board_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- /* set up the I/O ports */
-
- /* enable flash programming */
- *(LPD7A400_CPLD_REGPTR(LPD7A400_CPLD_FLASH_REG)) |= FLASH_FPEN;
-
- /* Auto wakeup, LCD disable, WLAN enable */
- *(LPD7A400_CPLD_REGPTR(LPD7A400_CPLD_CECTL_REG)) &=
- ~(CECTL_AWKP|CECTL_LCDV|CECTL_WLPE);
-
- /* Status LED 2 on (leds are active low) */
- *(LPD7A400_CPLD_REGPTR(LPD7A400_CPLD_EXTGPIO_REG)) =
- (EXTGPIO_STATUS1|EXTGPIO_GPIO1) & ~(EXTGPIO_STATUS2);
-
-#if defined(CONFIG_LH7A400)
- /* arch number of Logic-Board - MACH_TYPE_LPD7A400 */
- gd->bd->bi_arch_number = MACH_TYPE_LPD7A400;
-#elif defined(CONFIG_LH7A404)
- /* arch number of Logic-Board - MACH_TYPE_LPD7A400 */
- gd->bd->bi_arch_number = MACH_TYPE_LPD7A404;
-#endif
-
- /* adress of boot parameters */
- gd->bd->bi_boot_params = 0xc0000100;
-
- return 0;
-}
-
-int dram_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
-
- return 0;
-}
diff --git a/board/lpd7a40x/u-boot.lds b/board/lpd7a40x/u-boot.lds
deleted file mode 100644
index 156b871e57..0000000000
--- a/board/lpd7a40x/u-boot.lds
+++ /dev/null
@@ -1,57 +0,0 @@
-/*
- * (C) Copyright 2002
- * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-/*OUTPUT_FORMAT("elf32-arm", "elf32-arm", "elf32-arm")*/
-OUTPUT_ARCH(arm)
-ENTRY(_start)
-SECTIONS
-{
- . = 0x00000000;
-
- . = ALIGN(4);
- .text :
- {
- cpu/lh7a40x/start.o (.text)
- *(.text)
- }
-
- . = ALIGN(4);
- .rodata : { *(.rodata) }
-
- . = ALIGN(4);
- .data : { *(.data) }
-
- . = ALIGN(4);
- .got : { *(.got) }
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = ALIGN(4);
- __bss_start = .;
- .bss : { *(.bss) }
- _end = .;
-}
diff --git a/board/lubbock/Makefile b/board/lubbock/Makefile
deleted file mode 100644
index 106622cf58..0000000000
--- a/board/lubbock/Makefile
+++ /dev/null
@@ -1,48 +0,0 @@
-
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := lubbock.o flash.o
-SOBJS := lowlevel_init.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS) $(SOBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/lubbock/config.mk b/board/lubbock/config.mk
deleted file mode 100644
index 55c8b270a1..0000000000
--- a/board/lubbock/config.mk
+++ /dev/null
@@ -1,3 +0,0 @@
-#TEXT_BASE = 0xa1700000
-TEXT_BASE = 0xa3080000
-#TEXT_BASE = 0
diff --git a/board/lubbock/flash.c b/board/lubbock/flash.c
deleted file mode 100644
index ba82892dde..0000000000
--- a/board/lubbock/flash.c
+++ /dev/null
@@ -1,431 +0,0 @@
-/*
- * (C) Copyright 2001
- * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
- *
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <linux/byteorder/swab.h>
-
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/* Board support for 1 or 2 flash devices */
-#define FLASH_PORT_WIDTH32
-#undef FLASH_PORT_WIDTH16
-
-#ifdef FLASH_PORT_WIDTH16
-#define FLASH_PORT_WIDTH ushort
-#define FLASH_PORT_WIDTHV vu_short
-#define SWAP(x) __swab16(x)
-#else
-#define FLASH_PORT_WIDTH ulong
-#define FLASH_PORT_WIDTHV vu_long
-#define SWAP(x) __swab32(x)
-#endif
-
-#define FPW FLASH_PORT_WIDTH
-#define FPWV FLASH_PORT_WIDTHV
-
-#define mb() __asm__ __volatile__ ("" : : : "memory")
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (FPW *addr, flash_info_t *info);
-static int write_data (flash_info_t *info, ulong dest, FPW data);
-static void flash_get_offsets (ulong base, flash_info_t *info);
-void inline spin_wheel (void);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- int i;
- ulong size = 0;
-
- for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
- switch (i) {
- case 0:
- flash_get_size ((FPW *) PHYS_FLASH_1, &flash_info[i]);
- flash_get_offsets (PHYS_FLASH_1, &flash_info[i]);
- break;
- case 1:
- flash_get_size ((FPW *) PHYS_FLASH_2, &flash_info[i]);
- flash_get_offsets (PHYS_FLASH_2, &flash_info[i]);
- break;
- default:
- panic ("configured too many flash banks!\n");
- break;
- }
- size += flash_info[i].size;
- }
-
- /* Protect monitor and environment sectors
- */
- flash_protect ( FLAG_PROTECT_SET,
- CFG_FLASH_BASE,
- CFG_FLASH_BASE + monitor_flash_len - 1,
- &flash_info[0] );
-
- flash_protect ( FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0] );
-
- return size;
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_get_offsets (ulong base, flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- return;
- }
-
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
- for (i = 0; i < info->sector_count; i++) {
- info->start[i] = base + (i * PHYS_FLASH_SECT_SIZE);
- info->protect[i] = 0;
- }
- }
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_INTEL:
- printf ("INTEL ");
- break;
- default:
- printf ("Unknown Vendor ");
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_28F128J3A:
- printf ("28F128J3A\n");
- break;
- default:
- printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " ");
- }
- printf ("\n");
- return;
-}
-
-/*
- * The following code cannot be run from FLASH!
- */
-static ulong flash_get_size (FPW *addr, flash_info_t *info)
-{
- volatile FPW value;
-
- /* Write auto select command: read Manufacturer ID */
- addr[0x5555] = (FPW) 0x00AA00AA;
- addr[0x2AAA] = (FPW) 0x00550055;
- addr[0x5555] = (FPW) 0x00900090;
-
- mb ();
- value = addr[0];
-
- switch (value) {
-
- case (FPW) INTEL_MANUFACT:
- info->flash_id = FLASH_MAN_INTEL;
- break;
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
- return (0); /* no or unknown flash */
- }
-
- mb ();
- value = addr[1]; /* device ID */
-
- switch (value) {
-
- case (FPW) INTEL_ID_28F128J3A:
- info->flash_id += FLASH_28F128J3A;
- info->sector_count = 128;
- info->size = 0x02000000;
- break; /* => 16 MB */
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- break;
- }
-
- if (info->sector_count > CFG_MAX_FLASH_SECT) {
- printf ("** ERROR: sector count %d > max (%d) **\n",
- info->sector_count, CFG_MAX_FLASH_SECT);
- info->sector_count = CFG_MAX_FLASH_SECT;
- }
-
- addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
-
- return (info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- int flag, prot, sect;
- ulong type, start, last;
- int rcode = 0;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- type = (info->flash_id & FLASH_VENDMASK);
- if ((type != FLASH_MAN_INTEL)) {
- printf ("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- return 1;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- start = get_timer (0);
- last = start;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- FPWV *addr = (FPWV *) (info->start[sect]);
- FPW status;
-
- printf ("Erasing sector %2d ... ", sect);
-
- /* arm simple, non interrupt dependent timer */
- reset_timer_masked ();
-
- *addr = (FPW) 0x00500050; /* clear status register */
- *addr = (FPW) 0x00200020; /* erase setup */
- *addr = (FPW) 0x00D000D0; /* erase confirm */
-
- while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
- if (get_timer_masked () > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- *addr = (FPW) 0x00B000B0; /* suspend erase */
- *addr = (FPW) 0x00FF00FF; /* reset to read mode */
- rcode = 1;
- break;
- }
- }
-
- *addr = 0x00500050; /* clear status register cmd. */
- *addr = 0x00FF00FF; /* resest to read mode */
-
- printf (" done\n");
- }
- }
- return rcode;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- * 4 - Flash not identified
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp;
- FPW data;
- int count, i, l, rc, port_width;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- return 4;
- }
-/* get lower word aligned address */
-#ifdef FLASH_PORT_WIDTH16
- wp = (addr & ~1);
- port_width = 2;
-#else
- wp = (addr & ~3);
- port_width = 4;
-#endif
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i = 0, cp = wp; i < l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
- for (; i < port_width && cnt > 0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt == 0 && i < port_width; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
-
- if ((rc = write_data (info, wp, SWAP (data))) != 0) {
- return (rc);
- }
- wp += port_width;
- }
-
- /*
- * handle word aligned part
- */
- count = 0;
- while (cnt >= port_width) {
- data = 0;
- for (i = 0; i < port_width; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_data (info, wp, SWAP (data))) != 0) {
- return (rc);
- }
- wp += port_width;
- cnt -= port_width;
- if (count++ > 0x800) {
- spin_wheel ();
- count = 0;
- }
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i < port_width; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
-
- return (write_data (info, wp, SWAP (data)));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word or halfword to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_data (flash_info_t *info, ulong dest, FPW data)
-{
- FPWV *addr = (FPWV *) dest;
- ulong status;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*addr & data) != data) {
- printf ("not erased at %08lx (%lx)\n", (ulong) addr, *addr);
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
-
- *addr = (FPW) 0x00400040; /* write setup */
- *addr = data;
-
- /* arm simple, non interrupt dependent timer */
- reset_timer_masked ();
-
- /* wait while polling the status register */
- while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
- if (get_timer_masked () > CFG_FLASH_WRITE_TOUT) {
- *addr = (FPW) 0x00FF00FF; /* restore read mode */
- return (1);
- }
- }
-
- *addr = (FPW) 0x00FF00FF; /* restore read mode */
-
- return (0);
-}
-
-void inline spin_wheel (void)
-{
- static int p = 0;
- static char w[] = "\\/-";
-
- printf ("\010%c", w[p]);
- (++p == 3) ? (p = 0) : 0;
-}
diff --git a/board/lubbock/lowlevel_init.S b/board/lubbock/lowlevel_init.S
deleted file mode 100644
index 15276e89d0..0000000000
--- a/board/lubbock/lowlevel_init.S
+++ /dev/null
@@ -1,411 +0,0 @@
-/*
- * Most of this taken from Redboot hal_platform_setup.h with cleanup
- *
- * NOTE: I haven't clean this up considerably, just enough to get it
- * running. See hal_platform_setup.h for the source. See
- * board/cradle/lowlevel_init.S for another PXA250 setup that is
- * much cleaner.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <config.h>
-#include <version.h>
-#include <asm/arch/pxa-regs.h>
-
-DRAM_SIZE: .long CFG_DRAM_SIZE
-
-/* wait for coprocessor write complete */
- .macro CPWAIT reg
- mrc p15,0,\reg,c2,c0,0
- mov \reg,\reg
- sub pc,pc,#4
- .endm
-
-
-/*
- * Memory setup
- */
-
-.globl lowlevel_init
-lowlevel_init:
-
- mov r10, lr
-
- /* Set up GPIO pins first ----------------------------------------- */
-
- ldr r0, =GPSR0
- ldr r1, =CFG_GPSR0_VAL
- str r1, [r0]
-
- ldr r0, =GPSR1
- ldr r1, =CFG_GPSR1_VAL
- str r1, [r0]
-
- ldr r0, =GPSR2
- ldr r1, =CFG_GPSR2_VAL
- str r1, [r0]
-
- ldr r0, =GPCR0
- ldr r1, =CFG_GPCR0_VAL
- str r1, [r0]
-
- ldr r0, =GPCR1
- ldr r1, =CFG_GPCR1_VAL
- str r1, [r0]
-
- ldr r0, =GPCR2
- ldr r1, =CFG_GPCR2_VAL
- str r1, [r0]
-
- ldr r0, =GPDR0
- ldr r1, =CFG_GPDR0_VAL
- str r1, [r0]
-
- ldr r0, =GPDR1
- ldr r1, =CFG_GPDR1_VAL
- str r1, [r0]
-
- ldr r0, =GPDR2
- ldr r1, =CFG_GPDR2_VAL
- str r1, [r0]
-
- ldr r0, =GAFR0_L
- ldr r1, =CFG_GAFR0_L_VAL
- str r1, [r0]
-
- ldr r0, =GAFR0_U
- ldr r1, =CFG_GAFR0_U_VAL
- str r1, [r0]
-
- ldr r0, =GAFR1_L
- ldr r1, =CFG_GAFR1_L_VAL
- str r1, [r0]
-
- ldr r0, =GAFR1_U
- ldr r1, =CFG_GAFR1_U_VAL
- str r1, [r0]
-
- ldr r0, =GAFR2_L
- ldr r1, =CFG_GAFR2_L_VAL
- str r1, [r0]
-
- ldr r0, =GAFR2_U
- ldr r1, =CFG_GAFR2_U_VAL
- str r1, [r0]
-
- ldr r0, =PSSR /* enable GPIO pins */
- ldr r1, =CFG_PSSR_VAL
- str r1, [r0]
-
- /* ---------------------------------------------------------------- */
- /* Enable memory interface */
- /* */
- /* The sequence below is based on the recommended init steps */
- /* detailed in the Intel PXA250 Operating Systems Developers Guide, */
- /* Chapter 10. */
- /* ---------------------------------------------------------------- */
-
- /* ---------------------------------------------------------------- */
- /* Step 1: Wait for at least 200 microsedonds to allow internal */
- /* clocks to settle. Only necessary after hard reset... */
- /* FIXME: can be optimized later */
- /* ---------------------------------------------------------------- */
-
- ldr r3, =OSCR /* reset the OS Timer Count to zero */
- mov r2, #0
- str r2, [r3]
- ldr r4, =0x300 /* really 0x2E1 is about 200usec, */
- /* so 0x300 should be plenty */
-1:
- ldr r2, [r3]
- cmp r4, r2
- bgt 1b
-
-mem_init:
-
- ldr r1, =MEMC_BASE /* get memory controller base addr. */
-
- /* ---------------------------------------------------------------- */
- /* Step 2a: Initialize Asynchronous static memory controller */
- /* ---------------------------------------------------------------- */
-
- /* MSC registers: timing, bus width, mem type */
-
- /* MSC0: nCS(0,1) */
- ldr r2, =CFG_MSC0_VAL
- str r2, [r1, #MSC0_OFFSET]
- ldr r2, [r1, #MSC0_OFFSET] /* read back to ensure */
- /* that data latches */
- /* MSC1: nCS(2,3) */
- ldr r2, =CFG_MSC1_VAL
- str r2, [r1, #MSC1_OFFSET]
- ldr r2, [r1, #MSC1_OFFSET]
-
- /* MSC2: nCS(4,5) */
- ldr r2, =CFG_MSC2_VAL
- str r2, [r1, #MSC2_OFFSET]
- ldr r2, [r1, #MSC2_OFFSET]
-
- /* ---------------------------------------------------------------- */
- /* Step 2b: Initialize Card Interface */
- /* ---------------------------------------------------------------- */
-
- /* MECR: Memory Expansion Card Register */
- ldr r2, =CFG_MECR_VAL
- str r2, [r1, #MECR_OFFSET]
- ldr r2, [r1, #MECR_OFFSET]
-
- /* MCMEM0: Card Interface slot 0 timing */
- ldr r2, =CFG_MCMEM0_VAL
- str r2, [r1, #MCMEM0_OFFSET]
- ldr r2, [r1, #MCMEM0_OFFSET]
-
- /* MCMEM1: Card Interface slot 1 timing */
- ldr r2, =CFG_MCMEM1_VAL
- str r2, [r1, #MCMEM1_OFFSET]
- ldr r2, [r1, #MCMEM1_OFFSET]
-
- /* MCATT0: Card Interface Attribute Space Timing, slot 0 */
- ldr r2, =CFG_MCATT0_VAL
- str r2, [r1, #MCATT0_OFFSET]
- ldr r2, [r1, #MCATT0_OFFSET]
-
- /* MCATT1: Card Interface Attribute Space Timing, slot 1 */
- ldr r2, =CFG_MCATT1_VAL
- str r2, [r1, #MCATT1_OFFSET]
- ldr r2, [r1, #MCATT1_OFFSET]
-
- /* MCIO0: Card Interface I/O Space Timing, slot 0 */
- ldr r2, =CFG_MCIO0_VAL
- str r2, [r1, #MCIO0_OFFSET]
- ldr r2, [r1, #MCIO0_OFFSET]
-
- /* MCIO1: Card Interface I/O Space Timing, slot 1 */
- ldr r2, =CFG_MCIO1_VAL
- str r2, [r1, #MCIO1_OFFSET]
- ldr r2, [r1, #MCIO1_OFFSET]
-
- /* ---------------------------------------------------------------- */
- /* Step 2c: Write FLYCNFG FIXME: what's that??? */
- /* ---------------------------------------------------------------- */
-
-
- /* ---------------------------------------------------------------- */
- /* Step 2d: Initialize Timing for Sync Memory (SDCLK0) */
- /* ---------------------------------------------------------------- */
-
- /* Before accessing MDREFR we need a valid DRI field, so we set */
- /* this to power on defaults + DRI field. */
-
- ldr r3, =CFG_MDREFR_VAL
- ldr r2, =0xFFF
- and r3, r3, r2
- ldr r4, =0x03ca4000
- orr r4, r4, r3
- str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */
- ldr r4, [r1, #MDREFR_OFFSET]
-
- /* Note: preserve the mdrefr value in r4 */
-
-
- /* ---------------------------------------------------------------- */
- /* Step 3: Initialize Synchronous Static Memory (Flash/Peripherals) */
- /* ---------------------------------------------------------------- */
-
- /* Initialize SXCNFG register. Assert the enable bits */
-
- /* Write SXMRS to cause an MRS command to all enabled banks of */
- /* synchronous static memory. Note that SXLCR need not be written */
- /* at this time. */
-
- /* FIXME: we use async mode for now */
-
-
- /* ---------------------------------------------------------------- */
- /* Step 4: Initialize SDRAM */
- /* ---------------------------------------------------------------- */
-
- /* set MDREFR according to user define with exception of a few bits */
-
- ldr r4, =CFG_MDREFR_VAL
- orr r4, r4, #(MDREFR_SLFRSH)
- bic r4, r4, #(MDREFR_E1PIN|MDREFR_E0PIN)
- str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */
- ldr r4, [r1, #MDREFR_OFFSET]
-
- /* Step 4b: de-assert MDREFR:SLFRSH. */
-
- bic r4, r4, #(MDREFR_SLFRSH)
- str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */
- ldr r4, [r1, #MDREFR_OFFSET]
-
-
- /* Step 4c: assert MDREFR:E1PIN and E0PIO as desired */
-
- ldr r4, =CFG_MDREFR_VAL
- str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */
- ldr r4, [r1, #MDREFR_OFFSET]
-
-
- /* Step 4d: write MDCNFG with MDCNFG:DEx deasserted (set to 0), to */
- /* configure but not enable each SDRAM partition pair. */
-
- ldr r4, =CFG_MDCNFG_VAL
- bic r4, r4, #(MDCNFG_DE0|MDCNFG_DE1)
-
- str r4, [r1, #MDCNFG_OFFSET] /* write back MDCNFG */
- ldr r4, [r1, #MDCNFG_OFFSET]
-
-
- /* Step 4e: Wait for the clock to the SDRAMs to stabilize, */
- /* 100..200 µsec. */
-
- ldr r3, =OSCR /* reset the OS Timer Count to zero */
- mov r2, #0
- str r2, [r3]
- ldr r4, =0x300 /* really 0x2E1 is about 200usec, */
- /* so 0x300 should be plenty */
-1:
- ldr r2, [r3]
- cmp r4, r2
- bgt 1b
-
-
- /* Step 4f: Trigger a number (usually 8) refresh cycles by */
- /* attempting non-burst read or write accesses to disabled */
- /* SDRAM, as commonly specified in the power up sequence */
- /* documented in SDRAM data sheets. The address(es) used */
- /* for this purpose must not be cacheable. */
-
- ldr r3, =CFG_DRAM_BASE
- str r2, [r3]
- str r2, [r3]
- str r2, [r3]
- str r2, [r3]
- str r2, [r3]
- str r2, [r3]
- str r2, [r3]
- str r2, [r3]
-
-
- /* Step 4g: Write MDCNFG with enable bits asserted */
- /* (MDCNFG:DEx set to 1). */
-
- ldr r3, [r1, #MDCNFG_OFFSET]
- orr r3, r3, #(MDCNFG_DE0|MDCNFG_DE1)
- str r3, [r1, #MDCNFG_OFFSET]
-
- /* Step 4h: Write MDMRS. */
-
- ldr r2, =CFG_MDMRS_VAL
- str r2, [r1, #MDMRS_OFFSET]
-
-
- /* We are finished with Intel's memory controller initialisation */
-
-
- /* ---------------------------------------------------------------- */
- /* Disable (mask) all interrupts at interrupt controller */
- /* ---------------------------------------------------------------- */
-
-initirqs:
-
- mov r1, #0 /* clear int. level register (IRQ, not FIQ) */
- ldr r2, =ICLR
- str r1, [r2]
-
- ldr r2, =ICMR /* mask all interrupts at the controller */
- str r1, [r2]
-
-
- /* ---------------------------------------------------------------- */
- /* Clock initialisation */
- /* ---------------------------------------------------------------- */
-
-initclks:
-
- /* Disable the peripheral clocks, and set the core clock frequency */
- /* (hard-coding at 398.12MHz for now). */
-
- /* Turn Off ALL on-chip peripheral clocks for re-configuration */
- /* Note: See label 'ENABLECLKS' for the re-enabling */
- ldr r1, =CKEN
- mov r2, #0
- str r2, [r1]
-
-
- /* default value in case no valid rotary switch setting is found */
- ldr r2, =(CCCR_L27|CCCR_M2|CCCR_N10) /* DEFAULT: {200/200/100} */
-
- /* ... and write the core clock config register */
- ldr r1, =CCCR
- str r2, [r1]
-
-#ifdef RTC
- /* enable the 32Khz oscillator for RTC and PowerManager */
-
- ldr r1, =OSCC
- mov r2, #OSCC_OON
- str r2, [r1]
-
- /* NOTE: spin here until OSCC.OOK get set, meaning the PLL */
- /* has settled. */
-60:
- ldr r2, [r1]
- ands r2, r2, #1
- beq 60b
-#endif
-
- /* ---------------------------------------------------------------- */
- /* */
- /* ---------------------------------------------------------------- */
-
- /* Save SDRAM size */
- ldr r1, =DRAM_SIZE
- str r8, [r1]
-
- /* Interrupt init: Mask all interrupts */
- ldr r0, =ICMR /* enable no sources */
- mov r1, #0
- str r1, [r0]
-
- /* FIXME */
-
-#define NODEBUG
-#ifdef NODEBUG
- /*Disable software and data breakpoints */
- mov r0,#0
- mcr p15,0,r0,c14,c8,0 /* ibcr0 */
- mcr p15,0,r0,c14,c9,0 /* ibcr1 */
- mcr p15,0,r0,c14,c4,0 /* dbcon */
-
- /*Enable all debug functionality */
- mov r0,#0x80000000
- mcr p14,0,r0,c10,c0,0 /* dcsr */
-
-#endif
-
- /* ---------------------------------------------------------------- */
- /* End lowlevel_init */
- /* ---------------------------------------------------------------- */
-
-endlowlevel_init:
-
- mov pc, lr
diff --git a/board/lubbock/lubbock.c b/board/lubbock/lubbock.c
deleted file mode 100644
index e618ab96a1..0000000000
--- a/board/lubbock/lubbock.c
+++ /dev/null
@@ -1,75 +0,0 @@
-/*
- * (C) Copyright 2002
- * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
- *
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-
-/* ------------------------------------------------------------------------- */
-
-
-/*
- * Miscelaneous platform dependent initialisations
- */
-
-int board_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- /* memory and cpu-speed are setup before relocation */
- /* so we do _nothing_ here */
-
- /* arch number of Lubbock-Board */
- gd->bd->bi_arch_number = MACH_TYPE_LUBBOCK;
-
- /* adress of boot parameters */
- gd->bd->bi_boot_params = 0xa0000100;
-
- return 0;
-}
-
-int board_late_init(void)
-{
- setenv("stdout", "serial");
- setenv("stderr", "serial");
- return 0;
-}
-
-
-int dram_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
- gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
- gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
- gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
- gd->bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE;
- gd->bd->bi_dram[3].start = PHYS_SDRAM_4;
- gd->bd->bi_dram[3].size = PHYS_SDRAM_4_SIZE;
-
- return 0;
-}
diff --git a/board/lubbock/u-boot.lds b/board/lubbock/u-boot.lds
deleted file mode 100644
index f0102391b3..0000000000
--- a/board/lubbock/u-boot.lds
+++ /dev/null
@@ -1,56 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-ENTRY(_start)
-SECTIONS
-{
- . = 0x00000000;
-
- . = ALIGN(4);
- .text :
- {
- cpu/pxa/start.o (.text)
- *(.text)
- }
-
- . = ALIGN(4);
- .rodata : { *(.rodata) }
-
- . = ALIGN(4);
- .data : { *(.data) }
-
- . = ALIGN(4);
- .got : { *(.got) }
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = ALIGN(4);
- __bss_start = .;
- .bss : { *(.bss) }
- _end = .;
-}
diff --git a/board/lwmon/Makefile b/board/lwmon/Makefile
deleted file mode 100644
index 7a2014d466..0000000000
--- a/board/lwmon/Makefile
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/lwmon/README.keybd b/board/lwmon/README.keybd
deleted file mode 100644
index 54f0aeb81f..0000000000
--- a/board/lwmon/README.keybd
+++ /dev/null
@@ -1,126 +0,0 @@
-
-Tastaturabfrage:
-
-Die Implementierung / Decodierung beruht auf den Angaben aus dem Do-
-kument "PIC LWE-Tastatur" in der Fassung vom 9. 3. 2001, insbesonde-
-re Tabelle 3 im Kapitel 4.3 Tastencodes. In U-Boot werden die vom
-Keyboard-Controller gelesenen Daten hexadezimal codiert in der auto-
-matisch angelegten Environment-Variablen "keybd" übergeben. Ist kei-
-ne Taste gedrückt worden, steht dort:
-
- keybd=000000000000000000
-
-Der decodierte Tastencode ("keybd") kann mit den "bootargs" an den
-Linux-Kernel übergeben und dort z. B. in einem Device-Treiber oder
-einer Applikation ausgewertet werden.
-
-
-Sonderfunktionen beim Booten:
-
-Es lassen sich eine oder mehrere (beliebig viele) Tasten oder Tasten-
-kombinationen definieren, die Sonderfunktionen auslösen, wenn diese
-Tasten beim Booten (Reset) gedrückt sind.
-
-Wird eine eingestellte Taste bzw. Tastenkombination erkannt, so wird
-in U-Boot noch vor dem Start des "Countdown" und somit vor jedem an-
-deren Kommando der Inhalt einer dieser Taste bzw. Tastenkombination
-zugeordneten Environment-Variablen ausführen.
-
-
-Die Environment-Variable "magic_keys" wird als Liste von Zeichen ver-
-standen, die als Suffix an den Namen "key_magic" angefügt werden und
-so die Namen der Environment-Variablen definieren, mit denen die
-Tasten (-kombinationen) festgelegt werden:
-
-Ist "magic_keys" NICHT definiert, so wird nur die in der Environment-
-Variablen "key_magic" codierte Tasten (-kombination) geprüft, und
-ggf. der Inhalt der Environment-Variablen "key_cmd" ausgeführt (ge-
-nauer: der Inhalt von "key_cmd" wird der Variablen "preboot" zugewie-
-sen, die ausgeführt wird, unmittelbar bevor die interaktive Kommando-
-interpretation beginnt).
-
-Enthält "magic_keys" z. B. die Zeichenkette "0123CB*", so werden
-nacheinander folgende Aktionen ausgeführt:
-
- prüfe Tastencode ggf. führe aus Kommando
- in Variable in Variable
- -----------------------------------
- key_magic0 ==> key_cmd0
- key_magic1 ==> key_cmd1
- key_magic2 ==> key_cmd2
- key_magic3 ==> key_cmd3
- key_magicC ==> key_cmdC
- key_magicB ==> key_cmdB
- key_magicA ==> key_cmdA
- key_magic* ==> key_cmd*
-
-Hinweis: sobald ein aktivierter Tastencode erkannt wurde, wird die
-Bearbeitung abgebrochen; es wird daher höchstens eines der definier-
-ten Kommandos ausgeführt, wobei die Priorität durch die Suchreihen-
-folge festgelegt wird, also durch die Reihenfolge der Zeichen in der
-Varuiablen "magic_keys".
-
-
-Die Codierung der Tasten, die beim Booten gedrückt werden müssen, um
-eine Funktion auszulösen, erfolgt nach der Tastaturtabelle.
-
-Die Definitionen
-
- => setenv key_magic0 3a+3b
- => setenv key_cmd0 setenv bootdelay 30
-
-bedeuten dementsprechend, daß die Tasten mit den Codes 0x3A (Taste
-"F1") und 0x3B (Taste "F2") gleichzeitig gedrückt werden müssen. Sie
-können dort eine beliebige Tastenkombination eintragen (jeweils 2
-Zeichen für die Hex-Codes der Tasten, und '+' als Trennzeichen).
-
-Wird die eingestellte Tastenkombination erkannt, so wird in U-Boot
-noch vor dem Start des "Countdown" und somit vor jedem anderen Kom-
-mando das angebene Kommando ausgeführt und somit ein langes Boot-
-Delay eingetragen.
-
-Praktisch könnten Sie also in U-Boot "bootdelay" auf 0 setzen und
-somit stets ohne jede User-Interaktion automatisch booten, außer,
-wenn die beiden Tasten "F1" und "F2" beim Booten gedrückt werden:
-dann würde ein Boot-Delay von 30 Sekunden eingefügt.
-
-
-Hinweis: dem Zeichen '#' kommt innerhalb von "magic_keys" eine beson-
-dere Bedeutung zu: die dadurch definierte Key-Sequenz schaltet den
-Monitor in den "Debug-Modus" - das bedeutet zunächst, daß alle weite-
-ren Meldungen von U-Boot über das LCD-Display ausgegeben werden;
-außerdem kann man durch das mit dieser Tastenkombination verknüpfte
-Kommando z. B. die Linux-Bootmeldungen ebenfalls auf das LCD-Display
-legen, so daß der Boot-Vorgang direkt und ohne weitere Hilfsmittel
-analysiert werden kann.
-
-Beispiel:
-
-In U-Boot werden folgende Environment-Variablen gesetzt und abgespei-
-chert:
-
-(1) => setenv magic_keys 01234#X
-(2) => setenv key_cmd# setenv addfb setenv bootargs \\${bootargs} console=tty0 console=ttyS1,\\${baudrate}
-(3) => setenv nfsargs setenv bootargs root=/dev/nfs rw nfsroot=\${serverip}:\${rootpath}
-(4) => setenv addip setenv bootargs \${bootargs} ip=\${ipaddr}:\${serverip}:\${gatewayip}:\${netmask}:\${hostname}::off panic=1
-(5) => setenv addfb setenv bootargs \${bootargs} console=ttyS1,\${baudrate}
-(6) => setenv bootcmd bootp\;run nfsargs\;run addip\;run addfb\;bootm
-
-Hierbei wird die Linux Commandline (in der Variablen "bootargs") im
-Boot-Kommando "bootcmd" (6) schrittweise zusammengesetzt: zunächst
-werden die für Root-Filesystem über NFS erforderlichen Optionen ge-
-setzt ("run nfsargs", vgl. (3)), dann die Netzwerkkonfiguration an-
-gefügt ("run addip", vgl. (4)), und schließlich die Systemconsole
-definiert ("run addfb").
-
-Dabei wird im Normalfall die Definition (5) verwendt; wurde aller-
-dings beim Reset die entsprechende Taste gedrückt gehalten, so wird
-diese Definition bei der Ausführung des in (2) definierten Kommandos
-überschrieben, so daß Linux die Bootmeldungen auch über das Frame-
-buffer-Device (=LCD-Display) ausgibt.
-
-Beachten Sie die Verdoppelung der '\'-Escapes in der Definition von
-"key_cmd#" - diese ist erforderlich, weil der String _zweimal_ inter-
-pretiert wird: das erste Mal bei der Eingabe von "key_cmd#", das
-zweite Mal, wenn der String (als Inhalt von "preboot") ausgeführt
-wird.
diff --git a/board/lwmon/config.mk b/board/lwmon/config.mk
deleted file mode 100644
index dfa952add0..0000000000
--- a/board/lwmon/config.mk
+++ /dev/null
@@ -1,30 +0,0 @@
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-# Ulrich Lutz, Speech Design GmbH, ulutz@datalab.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# LWE Monitorcontroller Litronic LCD IV boards
-#
-
-TEXT_BASE = 0x40000000
-#TEXT_BASE = 0x41000000
diff --git a/board/lwmon/flash.c b/board/lwmon/flash.c
deleted file mode 100644
index b894887c93..0000000000
--- a/board/lwmon/flash.c
+++ /dev/null
@@ -1,648 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/* #define DEBUG */
-
-#include <common.h>
-#include <mpc8xx.h>
-
-#if defined(CFG_ENV_IS_IN_FLASH)
-# ifndef CFG_ENV_ADDR
-# define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_ENV_OFFSET)
-# endif
-# ifndef CFG_ENV_SIZE
-# define CFG_ENV_SIZE CFG_ENV_SECT_SIZE
-# endif
-# ifndef CFG_ENV_SECT_SIZE
-# define CFG_ENV_SECT_SIZE CFG_ENV_SIZE
-# endif
-#endif
-
-/*---------------------------------------------------------------------*/
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (vu_long *addr, flash_info_t *info);
-static int write_data (flash_info_t *info, ulong dest, ulong data);
-#ifdef CFG_FLASH_USE_BUFFER_WRITE
-static int write_data_buf (flash_info_t * info, ulong dest, uchar * cp, int len);
-#endif
-static void flash_get_offsets (ulong base, flash_info_t *info);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- unsigned long size_b0, size_b1;
- int i;
-
- /* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* Static FLASH Bank configuration here - FIXME XXX */
-
- debug ("\n## Get flash bank 1 size @ 0x%08x\n",FLASH_BASE0_PRELIM);
-
- size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank 0: "
- "ID 0x%lx, Size = 0x%08lx = %ld MB\n",
- flash_info[0].flash_id,
- size_b0, size_b0<<20);
- }
-
- debug ("## Get flash bank 2 size @ 0x%08x\n",FLASH_BASE1_PRELIM);
-
- size_b1 = flash_get_size((vu_long *)FLASH_BASE1_PRELIM, &flash_info[1]);
-
- debug ("## Prelim. Flash bank sizes: %08lx + 0x%08lx\n",size_b0,size_b1);
-
- if (size_b1 > size_b0) {
- printf ("## ERROR: "
- "Bank 1 (0x%08lx = %ld MB) > Bank 0 (0x%08lx = %ld MB)\n",
- size_b1, size_b1<<20,
- size_b0, size_b0<<20
- );
- flash_info[0].flash_id = FLASH_UNKNOWN;
- flash_info[1].flash_id = FLASH_UNKNOWN;
- flash_info[0].sector_count = -1;
- flash_info[1].sector_count = -1;
- flash_info[0].size = 0;
- flash_info[1].size = 0;
- return (0);
- }
-
- debug ("## Before remap: "
- "BR0: 0x%08x OR0: 0x%08x "
- "BR1: 0x%08x OR1: 0x%08x\n",
- memctl->memc_br0, memctl->memc_or0,
- memctl->memc_br1, memctl->memc_or1);
-
- /* Remap FLASH according to real size */
- memctl->memc_or0 = (-size_b0 & 0xFFFF8000) | CFG_OR_TIMING_FLASH |
- OR_CSNT_SAM | OR_ACS_DIV1;
- memctl->memc_br0 = (CFG_FLASH_BASE & BR_BA_MSK) | BR_PS_32 | BR_V;
-
- debug ("## BR0: 0x%08x OR0: 0x%08x\n",
- memctl->memc_br0, memctl->memc_or0);
-
- /* Re-do sizing to get full correct info */
- size_b0 = flash_get_size((vu_long *)CFG_FLASH_BASE, &flash_info[0]);
-
- flash_get_offsets (CFG_FLASH_BASE, &flash_info[0]);
-
- flash_info[0].size = size_b0;
-
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
- /* monitor protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+monitor_flash_len-1,
- &flash_info[0]);
-#endif
-
-#ifdef CFG_ENV_IS_IN_FLASH
- /* ENV protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR+CFG_ENV_SECT_SIZE-1,
- &flash_info[0]);
-#endif
-
- if (size_b1) {
- memctl->memc_or1 = (-size_b1 & 0xFFFF8000) | CFG_OR_TIMING_FLASH |
- OR_CSNT_SAM | OR_ACS_DIV1;
- memctl->memc_br1 = ((CFG_FLASH_BASE + size_b0) & BR_BA_MSK) |
- BR_PS_32 | BR_V;
-
- debug ("## BR1: 0x%08x OR1: 0x%08x\n",
- memctl->memc_br1, memctl->memc_or1);
-
- /* Re-do sizing to get full correct info */
- size_b1 = flash_get_size((vu_long *)(CFG_FLASH_BASE + size_b0),
- &flash_info[1]);
-
- flash_info[1].size = size_b1;
-
- flash_get_offsets (CFG_FLASH_BASE + size_b0, &flash_info[1]);
-
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
- /* monitor protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+monitor_flash_len-1,
- &flash_info[1]);
-#endif
-
-#ifdef CFG_ENV_IS_IN_FLASH
- /* ENV protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR+CFG_ENV_SECT_SIZE-1,
- &flash_info[1]);
-#endif
- } else {
- memctl->memc_br1 = 0; /* invalidate bank */
- memctl->memc_or1 = 0; /* invalidate bank */
-
- debug ("## DISABLE BR1: 0x%08x OR1: 0x%08x\n",
- memctl->memc_br1, memctl->memc_or1);
-
- flash_info[1].flash_id = FLASH_UNKNOWN;
- flash_info[1].sector_count = -1;
- flash_info[1].size = 0;
- }
-
- debug ("## Final Flash bank sizes: %08lx + 0x%08lx\n",size_b0,size_b1);
-
- return (size_b0 + size_b1);
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_get_offsets (ulong base, flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_INTEL:
- for (i = 0; i < info->sector_count; i++) {
- info->start[i] = base;
- base += 0x00020000 * 2; /* 128k * 2 chips per bank */
- }
- return;
-
- default:
- printf ("Don't know sector ofsets for flash type 0x%lx\n",
- info->flash_id);
- return;
- }
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD: printf ("AMD "); break;
- case FLASH_MAN_FUJ: printf ("Fujitsu "); break;
- case FLASH_MAN_SST: printf ("SST "); break;
- case FLASH_MAN_STM: printf ("STM "); break;
- case FLASH_MAN_INTEL: printf ("Intel "); break;
- case FLASH_MAN_MT: printf ("MT "); break;
- default: printf ("Unknown Vendor "); break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_28F320J3A: printf ("28F320J3A (32Mbit = 128K x 32)\n");
- break;
- case FLASH_28F640J3A: printf ("28F640J3A (64Mbit = 128K x 64)\n");
- break;
- case FLASH_28F128J3A: printf ("28F128J3A (128Mbit = 128K x 128)\n");
- break;
- default: printf ("Unknown Chip Type\n");
- break;
- }
-
- if (info->size >= (1 << 20)) {
- i = 20;
- } else {
- i = 10;
- }
- printf (" Size: %ld %cB in %d Sectors\n",
- info->size >> i,
- (i == 20) ? 'M' : 'k',
- info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " "
- );
- }
- printf ("\n");
- return;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-
-static ulong flash_get_size (vu_long *addr, flash_info_t *info)
-{
- ulong value;
-
- /* Read Manufacturer ID */
- addr[0] = 0x00900090;
- value = addr[0];
-
- debug ("Manuf. ID @ 0x%08lx: 0x%08lx\n", (ulong)addr, value);
-
- switch (value) {
- case AMD_MANUFACT:
- info->flash_id = FLASH_MAN_AMD;
- break;
- case FUJ_MANUFACT:
- info->flash_id = FLASH_MAN_FUJ;
- break;
- case SST_MANUFACT:
- info->flash_id = FLASH_MAN_SST;
- break;
- case STM_MANUFACT:
- info->flash_id = FLASH_MAN_STM;
- break;
- case INTEL_MANUFACT:
- info->flash_id = FLASH_MAN_INTEL;
- break;
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- addr[0] = 0x00FF00FF; /* restore read mode */
- return (0); /* no or unknown flash */
- }
-
- value = addr[1]; /* device ID */
-
- debug ("Device ID @ 0x%08lx: 0x%08lx\n", (ulong)(&addr[1]), value);
-
- switch (value) {
- case INTEL_ID_28F320J3A:
- info->flash_id += FLASH_28F320J3A;
- info->sector_count = 32;
- info->size = 0x00400000 * 2;
- break; /* => 8 MB */
-
- case INTEL_ID_28F640J3A:
- info->flash_id += FLASH_28F640J3A;
- info->sector_count = 64;
- info->size = 0x00800000 * 2;
- break; /* => 16 MB */
-
- case INTEL_ID_28F128J3A:
- info->flash_id += FLASH_28F128J3A;
- info->sector_count = 128;
- info->size = 0x01000000 * 2;
- break; /* => 32 MB */
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- addr[0] = 0x00FF00FF; /* restore read mode */
- return (0); /* => no or unknown flash */
-
- }
-
- if (info->sector_count > CFG_MAX_FLASH_SECT) {
- printf ("** ERROR: sector count %d > max (%d) **\n",
- info->sector_count, CFG_MAX_FLASH_SECT);
- info->sector_count = CFG_MAX_FLASH_SECT;
- }
-
- addr[0] = 0x00FF00FF; /* restore read mode */
-
- return (info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- int flag, prot, sect;
- ulong start, now, last;
-
- debug ("flash_erase: first: %d last: %d\n", s_first, s_last);
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- if ((info->flash_id & FLASH_VENDMASK) != FLASH_MAN_INTEL) {
- printf ("Can erase only Intel flash types - aborted\n");
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- start = get_timer (0);
- last = start;
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- vu_long *addr = (vu_long *)(info->start[sect]);
- unsigned long status;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- *addr = 0x00600060; /* clear lock bit setup */
- *addr = 0x00D000D0; /* clear lock bit confirm */
-
- udelay (1000);
- /* This takes awfully long - up to 50 ms and more */
- while (((status = *addr) & 0x00800080) != 0x00800080) {
- if ((now=get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- *addr = 0x00FF00FF; /* reset to read mode */
- return 1;
- }
-
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- udelay (1000); /* to trigger the watchdog */
- }
-
- *addr = 0x00500050; /* clear status register */
- *addr = 0x00200020; /* erase setup */
- *addr = 0x00D000D0; /* erase confirm */
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- while (((status = *addr) & 0x00800080) != 0x00800080) {
- if ((now=get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- *addr = 0x00B000B0; /* suspend erase */
- *addr = 0x00FF00FF; /* reset to read mode */
- return 1;
- }
-
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- udelay (1000); /* to trigger the watchdog */
- }
-
- *addr = 0x00FF00FF; /* reset to read mode */
- }
- }
- printf (" done\n");
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- * 4 - Flash not identified
- */
-
-#define FLASH_WIDTH 4 /* flash bus width in bytes */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int i, l, rc;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- return 4;
- }
-
- wp = (addr & ~(FLASH_WIDTH-1)); /* get lower FLASH_WIDTH aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
- for (; i<FLASH_WIDTH && cnt>0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<FLASH_WIDTH; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- if ((rc = write_data(info, wp, data)) != 0) {
- return (rc);
- }
- wp += FLASH_WIDTH;
- }
-
- /*
- * handle FLASH_WIDTH aligned part
- */
-#ifdef CFG_FLASH_USE_BUFFER_WRITE
- while(cnt >= FLASH_WIDTH) {
- i = CFG_FLASH_BUFFER_SIZE > cnt ?
- (cnt & ~(FLASH_WIDTH - 1)) : CFG_FLASH_BUFFER_SIZE;
- if((rc = write_data_buf(info, wp, src,i)) != 0)
- return rc;
- wp += i;
- src += i;
- cnt -=i;
- }
-#else
- while (cnt >= FLASH_WIDTH) {
- data = 0;
- for (i=0; i<FLASH_WIDTH; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_data(info, wp, data)) != 0) {
- return (rc);
- }
- wp += FLASH_WIDTH;
- cnt -= FLASH_WIDTH;
- }
-#endif /* CFG_FLASH_USE_BUFFER_WRITE */
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<FLASH_WIDTH && cnt>0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i<FLASH_WIDTH; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- return (write_data(info, wp, data));
-}
-
-/*-----------------------------------------------------------------------
- * Check flash status, returns:
- * 0 - OK
- * 1 - timeout
- */
-static int flash_status_check(vu_long *addr, ulong tout, char * prompt)
-{
- ulong status;
- ulong start;
-
- /* Wait for command completion */
- start = get_timer (0);
- while(((status = *addr) & 0x00800080) != 0x00800080) {
- if (get_timer(start) > tout) {
- printf("Flash %s timeout at address %p\n", prompt, addr);
- *addr = 0x00FF00FF; /* restore read mode */
- return (1);
- }
- }
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_data (flash_info_t *info, ulong dest, ulong data)
-{
- vu_long *addr = (vu_long *)dest;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*addr & data) != data) {
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- *addr = 0x00400040; /* write setup */
- *addr = data;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- if (flash_status_check(addr, CFG_FLASH_WRITE_TOUT, "write") != 0) {
- return (1);
- }
-
- *addr = 0x00FF00FF; /* restore read mode */
-
- return (0);
-}
-
-#ifdef CFG_FLASH_USE_BUFFER_WRITE
-/*-----------------------------------------------------------------------
- * Write a buffer to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- */
-static int write_data_buf(flash_info_t * info, ulong dest, uchar * cp, int len)
-{
- vu_long *addr = (vu_long *)dest;
- int sector;
- int cnt;
- int retcode;
- vu_long * src = (vu_long *)cp;
- vu_long * dst = (vu_long *)dest;
-
- /* find sector */
- for(sector = info->sector_count - 1; sector >= 0; sector--) {
- if(dest >= info->start[sector])
- break;
- }
-
- *addr = 0x00500050; /* clear status */
- *addr = 0x00e800e8; /* write buffer */
-
- if((retcode = flash_status_check(addr, CFG_FLASH_BUFFER_WRITE_TOUT,
- "write to buffer")) == 0) {
- cnt = len / FLASH_WIDTH;
- *addr = (cnt-1) | ((cnt-1) << 16);
- while(cnt-- > 0) {
- *dst++ = *src++;
- }
- *addr = 0x00d000d0; /* write buffer confirm */
- retcode = flash_status_check(addr, CFG_FLASH_BUFFER_WRITE_TOUT,
- "buffer write");
- }
- *addr = 0x00FF00FF; /* restore read mode */
- *addr = 0x00500050; /* clear status */
- return retcode;
-}
-#endif /* CFG_USE_FLASH_BUFFER_WRITE */
-
-/*-----------------------------------------------------------------------
- */
diff --git a/board/lwmon/lwmon.c b/board/lwmon/lwmon.c
deleted file mode 100644
index a174b57b70..0000000000
--- a/board/lwmon/lwmon.c
+++ /dev/null
@@ -1,1068 +0,0 @@
-/***********************************************************************
- *
-M* Modul: lwmon.c
-M*
-M* Content: LWMON specific U-Boot commands.
- *
- * (C) Copyright 2001, 2002
- * DENX Software Engineering
- * Wolfgang Denk, wd@denx.de
- * All rights reserved.
- *
-D* Design: wd@denx.de
-C* Coding: wd@denx.de
-V* Verification: dzu@denx.de
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- ***********************************************************************/
-
-/*---------------------------- Headerfiles ----------------------------*/
-#include <common.h>
-#include <mpc8xx.h>
-#include <commproc.h>
-#include <i2c.h>
-#include <command.h>
-#include <malloc.h>
-#include <post.h>
-#include <serial.h>
-
-#include <linux/types.h>
-#include <linux/string.h> /* for strdup */
-
-/*------------------------ Local prototypes ---------------------------*/
-static long int dram_size (long int, long int *, long int);
-static void kbd_init (void);
-static int compare_magic (uchar *kbd_data, uchar *str);
-
-
-/*--------------------- Local macros and constants --------------------*/
-#define _NOT_USED_ 0xFFFFFFFF
-
-#ifdef CONFIG_MODEM_SUPPORT
-static int key_pressed(void);
-extern void disable_putc(void);
-#endif /* CONFIG_MODEM_SUPPORT */
-
-/*
- * 66 MHz SDRAM access using UPM A
- */
-const uint sdram_table[] =
-{
-#if defined(CFG_MEMORY_75) || defined(CFG_MEMORY_8E)
- /*
- * Single Read. (Offset 0 in UPM RAM)
- */
- 0x1F0DFC04, 0xEEAFBC04, 0x11AF7C04, 0xEFBAFC00,
- 0x1FF5FC47, /* last */
- /*
- * SDRAM Initialization (offset 5 in UPM RAM)
- *
- * This is no UPM entry point. The following definition uses
- * the remaining space to establish an initialization
- * sequence, which is executed by a RUN command.
- *
- */
- 0x1FF5FC34, 0xEFEABC34, 0x1FB57C35, /* last */
- /*
- * Burst Read. (Offset 8 in UPM RAM)
- */
- 0x1F0DFC04, 0xEEAFBC04, 0x10AF7C04, 0xF0AFFC00,
- 0xF0AFFC00, 0xF1AFFC00, 0xEFBAFC00, 0x1FF5FC47, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Single Write. (Offset 18 in UPM RAM)
- */
- 0x1F2DFC04, 0xEEABBC00, 0x01B27C04, 0x1FF5FC47, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Burst Write. (Offset 20 in UPM RAM)
- */
- 0x1F0DFC04, 0xEEABBC00, 0x10A77C00, 0xF0AFFC00,
- 0xF0AFFC00, 0xE1BAFC04, 0x01FF5FC47, /* last */
- _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Refresh (Offset 30 in UPM RAM)
- */
- 0x1FFD7C84, 0xFFFFFC04, 0xFFFFFC04, 0xFFFFFC04,
- 0xFFFFFC84, 0xFFFFFC07, /* last */
- _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Exception. (Offset 3c in UPM RAM)
- */
- 0x7FFFFC07, /* last */
- 0xFFFFFCFF, 0xFFFFFCFF, 0xFFFFFCFF,
-#endif
-#ifdef CFG_MEMORY_7E
- /*
- * Single Read. (Offset 0 in UPM RAM)
- */
- 0x0E2DBC04, 0x11AF7C04, 0xEFBAFC00, 0x1FF5FC47, /* last */
- _NOT_USED_,
- /*
- * SDRAM Initialization (offset 5 in UPM RAM)
- *
- * This is no UPM entry point. The following definition uses
- * the remaining space to establish an initialization
- * sequence, which is executed by a RUN command.
- *
- */
- 0x1FF5FC34, 0xEFEABC34, 0x1FB57C35, /* last */
- /*
- * Burst Read. (Offset 8 in UPM RAM)
- */
- 0x0E2DBC04, 0x10AF7C04, 0xF0AFFC00, 0xF0AFFC00,
- 0xF1AFFC00, 0xEFBAFC00, 0x1FF5FC47, /* last */
- _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Single Write. (Offset 18 in UPM RAM)
- */
- 0x0E29BC04, 0x01B27C04, 0x1FF5FC47, /* last */
- _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Burst Write. (Offset 20 in UPM RAM)
- */
- 0x0E29BC04, 0x10A77C00, 0xF0AFFC00, 0xF0AFFC00,
- 0xE1BAFC04, 0x1FF5FC47, /* last */
- _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Refresh (Offset 30 in UPM RAM)
- */
- 0x1FFD7C84, 0xFFFFFC04, 0xFFFFFC04, 0xFFFFFC04,
- 0xFFFFFC84, 0xFFFFFC07, /* last */
- _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Exception. (Offset 3c in UPM RAM)
- */
- 0x7FFFFC07, /* last */
- 0xFFFFFCFF, 0xFFFFFCFF, 0xFFFFFCFF,
-#endif
-};
-
-/*
- * Check Board Identity:
- *
- */
-
-/***********************************************************************
-F* Function: int checkboard (void) P*A*Z*
- *
-P* Parameters: none
-P*
-P* Returnvalue: int - 0 is always returned
- *
-Z* Intention: This function is the checkboard() method implementation
-Z* for the lwmon board. Only a standard message is printed.
- *
-D* Design: wd@denx.de
-C* Coding: wd@denx.de
-V* Verification: dzu@denx.de
- ***********************************************************************/
-int checkboard (void)
-{
- puts ("Board: LICCON Konsole LCD3\n");
- return (0);
-}
-
-/***********************************************************************
-F* Function: long int initdram (int board_type) P*A*Z*
- *
-P* Parameters: int board_type
-P* - Usually type of the board - ignored here.
-P*
-P* Returnvalue: long int
-P* - Size of initialized memory
- *
-Z* Intention: This function is the initdram() method implementation
-Z* for the lwmon board.
-Z* The memory controller is initialized to access the
-Z* DRAM.
- *
-D* Design: wd@denx.de
-C* Coding: wd@denx.de
-V* Verification: dzu@denx.de
- ***********************************************************************/
-long int initdram (int board_type)
-{
- volatile immap_t *immr = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immr->im_memctl;
- long int size_b0;
- long int size8, size9;
- int i;
-
- /*
- * Configure UPMA for SDRAM
- */
- upmconfig (UPMA, (uint *)sdram_table, sizeof(sdram_table)/sizeof(uint));
-
- memctl->memc_mptpr = CFG_MPTPR;
-
- /* burst length=4, burst type=sequential, CAS latency=2 */
- memctl->memc_mar = CFG_MAR;
-
- /*
- * Map controller bank 3 to the SDRAM bank at preliminary address.
- */
- memctl->memc_or3 = CFG_OR3_PRELIM;
- memctl->memc_br3 = CFG_BR3_PRELIM;
-
- /* initialize memory address register */
- memctl->memc_mamr = CFG_MAMR_8COL; /* refresh not enabled yet */
-
- /* mode initialization (offset 5) */
- udelay (200); /* 0x80006105 */
- memctl->memc_mcr = MCR_OP_RUN | MCR_MB_CS3 | MCR_MLCF (1) | MCR_MAD (0x05);
-
- /* run 2 refresh sequence with 4-beat refresh burst (offset 0x30) */
- udelay (1); /* 0x80006130 */
- memctl->memc_mcr = MCR_OP_RUN | MCR_MB_CS3 | MCR_MLCF (1) | MCR_MAD (0x30);
- udelay (1); /* 0x80006130 */
- memctl->memc_mcr = MCR_OP_RUN | MCR_MB_CS3 | MCR_MLCF (1) | MCR_MAD (0x30);
-
- udelay (1); /* 0x80006106 */
- memctl->memc_mcr = MCR_OP_RUN | MCR_MB_CS3 | MCR_MLCF (1) | MCR_MAD (0x06);
-
- memctl->memc_mamr |= MAMR_PTAE; /* refresh enabled */
-
- udelay (200);
-
- /* Need at least 10 DRAM accesses to stabilize */
- for (i = 0; i < 10; ++i) {
- volatile unsigned long *addr =
- (volatile unsigned long *) SDRAM_BASE3_PRELIM;
- unsigned long val;
-
- val = *(addr + i);
- *(addr + i) = val;
- }
-
- /*
- * Check Bank 0 Memory Size for re-configuration
- *
- * try 8 column mode
- */
- size8 = dram_size (CFG_MAMR_8COL, (long *)SDRAM_BASE3_PRELIM, SDRAM_MAX_SIZE);
-
- udelay (1000);
-
- /*
- * try 9 column mode
- */
- size9 = dram_size (CFG_MAMR_9COL, (long *)SDRAM_BASE3_PRELIM, SDRAM_MAX_SIZE);
-
- if (size8 < size9) { /* leave configuration at 9 columns */
- size_b0 = size9;
- memctl->memc_mamr = CFG_MAMR_9COL | MAMR_PTAE;
- udelay (500);
- } else { /* back to 8 columns */
- size_b0 = size8;
- memctl->memc_mamr = CFG_MAMR_8COL | MAMR_PTAE;
- udelay (500);
- }
-
- /*
- * Final mapping:
- */
-
- memctl->memc_or3 = ((-size_b0) & 0xFFFF0000) |
- OR_CSNT_SAM | OR_G5LS | SDRAM_TIMING;
- memctl->memc_br3 = (CFG_SDRAM_BASE & BR_BA_MSK) | BR_MS_UPMA | BR_V;
- udelay (1000);
-
- return (size_b0);
-}
-
-/***********************************************************************
-F* Function: static long int dram_size (long int mamr_value,
-F* long int *base,
-F* long int maxsize) P*A*Z*
- *
-P* Parameters: long int mamr_value
-P* - Value for MAMR for the test
-P* long int *base
-P* - Base address for the test
-P* long int maxsize
-P* - Maximum size to test for
-P*
-P* Returnvalue: long int
-P* - Size of probed memory
- *
-Z* Intention: Check memory range for valid RAM. A simple memory test
-Z* determines the actually available RAM size between
-Z* addresses `base' and `base + maxsize'. Some (not all)
-Z* hardware errors are detected:
-Z* - short between address lines
-Z* - short between data lines
- *
-D* Design: wd@denx.de
-C* Coding: wd@denx.de
-V* Verification: dzu@denx.de
- ***********************************************************************/
-static long int dram_size (long int mamr_value, long int *base, long int maxsize)
-{
- volatile immap_t *immr = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immr->im_memctl;
-
- memctl->memc_mamr = mamr_value;
-
- return (get_ram_size(base, maxsize));
-}
-
-/* ------------------------------------------------------------------------- */
-
-#ifndef PB_ENET_TENA
-# define PB_ENET_TENA ((uint)0x00002000) /* PB 18 */
-#endif
-
-/***********************************************************************
-F* Function: int board_early_init_f (void) P*A*Z*
- *
-P* Parameters: none
-P*
-P* Returnvalue: int
-P* - 0 is always returned.
- *
-Z* Intention: This function is the board_early_init_f() method implementation
-Z* for the lwmon board.
-Z* Disable Ethernet TENA on Port B.
- *
-D* Design: wd@denx.de
-C* Coding: wd@denx.de
-V* Verification: dzu@denx.de
- ***********************************************************************/
-int board_early_init_f (void)
-{
- volatile immap_t *immr = (immap_t *) CFG_IMMR;
-
- /* Disable Ethernet TENA on Port B
- * Necessary because of pull up in COM3 port.
- *
- * This is just a preliminary fix, intended to turn off TENA
- * as soon as possible to avoid noise on the network. Once
- * I²C is running we will make sure the interface is
- * correctly initialized.
- */
- immr->im_cpm.cp_pbpar &= ~PB_ENET_TENA;
- immr->im_cpm.cp_pbodr &= ~PB_ENET_TENA;
- immr->im_cpm.cp_pbdat &= ~PB_ENET_TENA; /* set to 0 = disabled */
- immr->im_cpm.cp_pbdir |= PB_ENET_TENA;
-
- return (0);
-}
-
-/* ------------------------------------------------------------------------- */
-
-/***********************************************************************
-F* Function: void reset_phy (void) P*A*Z*
- *
-P* Parameters: none
-P*
-P* Returnvalue: none
- *
-Z* Intention: Reset the PHY. In the lwmon case we do this by the
-Z* signaling the PIC I/O expander.
- *
-D* Design: wd@denx.de
-C* Coding: wd@denx.de
-V* Verification: dzu@denx.de
- ***********************************************************************/
-void reset_phy (void)
-{
- uchar c;
-
-#ifdef DEBUG
- printf ("### Switch on Ethernet for SCC2 ###\n");
-#endif
- c = pic_read (0x61);
-#ifdef DEBUG
- printf ("Old PIC read: reg_61 = 0x%02x\n", c);
-#endif
- c |= 0x40; /* disable COM3 */
- c &= ~0x80; /* enable Ethernet */
- pic_write (0x61, c);
-#ifdef DEBUG
- c = pic_read (0x61);
- printf ("New PIC read: reg_61 = 0x%02x\n", c);
-#endif
- udelay (1000);
-}
-
-
-/*------------------------- Keyboard controller -----------------------*/
-/* command codes */
-#define KEYBD_CMD_READ_KEYS 0x01
-#define KEYBD_CMD_READ_VERSION 0x02
-#define KEYBD_CMD_READ_STATUS 0x03
-#define KEYBD_CMD_RESET_ERRORS 0x10
-
-/* status codes */
-#define KEYBD_STATUS_MASK 0x3F
-#define KEYBD_STATUS_H_RESET 0x20
-#define KEYBD_STATUS_BROWNOUT 0x10
-#define KEYBD_STATUS_WD_RESET 0x08
-#define KEYBD_STATUS_OVERLOAD 0x04
-#define KEYBD_STATUS_ILLEGAL_WR 0x02
-#define KEYBD_STATUS_ILLEGAL_RD 0x01
-
-/* Number of bytes returned from Keyboard Controller */
-#define KEYBD_VERSIONLEN 2 /* version information */
-#define KEYBD_DATALEN 9 /* normal key scan data */
-
-/* maximum number of "magic" key codes that can be assigned */
-
-static uchar kbd_addr = CFG_I2C_KEYBD_ADDR;
-
-static uchar *key_match (uchar *);
-
-#define KEYBD_SET_DEBUGMODE '#' /* Magic key to enable debug output */
-
-/***********************************************************************
-F* Function: int board_postclk_init (void) P*A*Z*
- *
-P* Parameters: none
-P*
-P* Returnvalue: int
-P* - 0 is always returned.
- *
-Z* Intention: This function is the board_postclk_init() method implementation
-Z* for the lwmon board.
- *
- ***********************************************************************/
-int board_postclk_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- kbd_init();
-
-#ifdef CONFIG_MODEM_SUPPORT
- if (key_pressed()) {
- disable_putc(); /* modem doesn't understand banner etc */
- gd->do_mdm_init = 1;
- }
-#endif
-
- return (0);
-}
-
-struct serial_device * default_serial_console (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- return gd->do_mdm_init ? &serial_scc_device : &serial_smc_device;
-}
-
-static void kbd_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- uchar kbd_data[KEYBD_DATALEN];
- uchar tmp_data[KEYBD_DATALEN];
- uchar val, errcd;
- int i;
-
- i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
-
- gd->kbd_status = 0;
-
- /* Forced by PIC. Delays <= 175us loose */
- udelay(1000);
-
- /* Read initial keyboard error code */
- val = KEYBD_CMD_READ_STATUS;
- i2c_write (kbd_addr, 0, 0, &val, 1);
- i2c_read (kbd_addr, 0, 0, &errcd, 1);
- /* clear unused bits */
- errcd &= KEYBD_STATUS_MASK;
- /* clear "irrelevant" bits. Recommended by Martin Rajek, LWN */
- errcd &= ~(KEYBD_STATUS_H_RESET|KEYBD_STATUS_BROWNOUT);
- if (errcd) {
- gd->kbd_status |= errcd << 8;
- }
- /* Reset error code and verify */
- val = KEYBD_CMD_RESET_ERRORS;
- i2c_write (kbd_addr, 0, 0, &val, 1);
- udelay(1000); /* delay NEEDED by keyboard PIC !!! */
-
- val = KEYBD_CMD_READ_STATUS;
- i2c_write (kbd_addr, 0, 0, &val, 1);
- i2c_read (kbd_addr, 0, 0, &val, 1);
-
- val &= KEYBD_STATUS_MASK; /* clear unused bits */
- if (val) { /* permanent error, report it */
- gd->kbd_status |= val;
- return;
- }
-
- /*
- * Read current keyboard state.
- *
- * After the error reset it may take some time before the
- * keyboard PIC picks up a valid keyboard scan - the total
- * scan time is approx. 1.6 ms (information by Martin Rajek,
- * 28 Sep 2002). We read a couple of times for the keyboard
- * to stabilize, using a big enough delay.
- * 10 times should be enough. If the data is still changing,
- * we use what we get :-(
- */
-
- memset (tmp_data, 0xFF, KEYBD_DATALEN); /* impossible value */
- for (i=0; i<10; ++i) {
- val = KEYBD_CMD_READ_KEYS;
- i2c_write (kbd_addr, 0, 0, &val, 1);
- i2c_read (kbd_addr, 0, 0, kbd_data, KEYBD_DATALEN);
-
- if (memcmp(kbd_data, tmp_data, KEYBD_DATALEN) == 0) {
- /* consistent state, done */
- break;
- }
- /* remeber last state, delay, and retry */
- memcpy (tmp_data, kbd_data, KEYBD_DATALEN);
- udelay (5000);
- }
-}
-
-/***********************************************************************
-F* Function: int misc_init_r (void) P*A*Z*
- *
-P* Parameters: none
-P*
-P* Returnvalue: int
-P* - 0 is always returned, even in the case of a keyboard
-P* error.
- *
-Z* Intention: This function is the misc_init_r() method implementation
-Z* for the lwmon board.
-Z* The keyboard controller is initialized and the result
-Z* of a read copied to the environment variable "keybd".
-Z* If KEYBD_SET_DEBUGMODE is defined, a check is made for
-Z* this key, and if found display to the LCD will be enabled.
-Z* The keys in "keybd" are checked against the magic
-Z* keycommands defined in the environment.
-Z* See also key_match().
- *
-D* Design: wd@denx.de
-C* Coding: wd@denx.de
-V* Verification: dzu@denx.de
- ***********************************************************************/
-int misc_init_r (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- uchar kbd_data[KEYBD_DATALEN];
- char keybd_env[2 * KEYBD_DATALEN + 1];
- uchar kbd_init_status = gd->kbd_status >> 8;
- uchar kbd_status = gd->kbd_status;
- uchar val;
- char *str;
- int i;
-
- if (kbd_init_status) {
- printf ("KEYBD: Error %02X\n", kbd_init_status);
- }
- if (kbd_status) { /* permanent error, report it */
- printf ("*** Keyboard error code %02X ***\n", kbd_status);
- sprintf (keybd_env, "%02X", kbd_status);
- setenv ("keybd", keybd_env);
- return 0;
- }
-
- /*
- * Now we know that we have a working keyboard, so disable
- * all output to the LCD except when a key press is detected.
- */
-
- if ((console_assign (stdout, "serial") < 0) ||
- (console_assign (stderr, "serial") < 0)) {
- printf ("Can't assign serial port as output device\n");
- }
-
- /* Read Version */
- val = KEYBD_CMD_READ_VERSION;
- i2c_write (kbd_addr, 0, 0, &val, 1);
- i2c_read (kbd_addr, 0, 0, kbd_data, KEYBD_VERSIONLEN);
- printf ("KEYBD: Version %d.%d\n", kbd_data[0], kbd_data[1]);
-
- /* Read current keyboard state */
- val = KEYBD_CMD_READ_KEYS;
- i2c_write (kbd_addr, 0, 0, &val, 1);
- i2c_read (kbd_addr, 0, 0, kbd_data, KEYBD_DATALEN);
-
- for (i = 0; i < KEYBD_DATALEN; ++i) {
- sprintf (keybd_env + i + i, "%02X", kbd_data[i]);
- }
- setenv ("keybd", keybd_env);
-
- str = strdup ((char *)key_match (kbd_data)); /* decode keys */
-#ifdef KEYBD_SET_DEBUGMODE
- if (kbd_data[0] == KEYBD_SET_DEBUGMODE) { /* set debug mode */
- if ((console_assign (stdout, "lcd") < 0) ||
- (console_assign (stderr, "lcd") < 0)) {
- printf ("Can't assign LCD display as output device\n");
- }
- }
-#endif /* KEYBD_SET_DEBUGMODE */
-#ifdef CONFIG_PREBOOT /* automatically configure "preboot" command on key match */
- setenv ("preboot", str); /* set or delete definition */
-#endif /* CONFIG_PREBOOT */
- if (str != NULL) {
- free (str);
- }
- return (0);
-}
-
-#ifdef CONFIG_PREBOOT
-
-static uchar kbd_magic_prefix[] = "key_magic";
-static uchar kbd_command_prefix[] = "key_cmd";
-
-static int compare_magic (uchar *kbd_data, uchar *str)
-{
- uchar compare[KEYBD_DATALEN-1];
- char *nxt;
- int i;
-
- /* Don't include modifier byte */
- memcpy (compare, kbd_data+1, KEYBD_DATALEN-1);
-
- for (; str != NULL; str = (*nxt) ? (uchar *)(nxt+1) : (uchar *)nxt) {
- uchar c;
- int k;
-
- c = (uchar) simple_strtoul ((char *)str, (char **) (&nxt), 16);
-
- if (str == (uchar *)nxt) { /* invalid character */
- break;
- }
-
- /*
- * Check if this key matches the input.
- * Set matches to zero, so they match only once
- * and we can find duplicates or extra keys
- */
- for (k = 0; k < sizeof(compare); ++k) {
- if (compare[k] == '\0') /* only non-zero entries */
- continue;
- if (c == compare[k]) { /* found matching key */
- compare[k] = '\0';
- break;
- }
- }
- if (k == sizeof(compare)) {
- return -1; /* unmatched key */
- }
- }
-
- /*
- * A full match leaves no keys in the `compare' array,
- */
- for (i = 0; i < sizeof(compare); ++i) {
- if (compare[i])
- {
- return -1;
- }
- }
-
- return 0;
-}
-
-/***********************************************************************
-F* Function: static uchar *key_match (uchar *kbd_data) P*A*Z*
- *
-P* Parameters: uchar *kbd_data
-P* - The keys to match against our magic definitions
-P*
-P* Returnvalue: uchar *
-P* - != NULL: Pointer to the corresponding command(s)
-P* NULL: No magic is about to happen
- *
-Z* Intention: Check if pressed key(s) match magic sequence,
-Z* and return the command string associated with that key(s).
-Z*
-Z* If no key press was decoded, NULL is returned.
-Z*
-Z* Note: the first character of the argument will be
-Z* overwritten with the "magic charcter code" of the
-Z* decoded key(s), or '\0'.
-Z*
-Z* Note: the string points to static environment data
-Z* and must be saved before you call any function that
-Z* modifies the environment.
- *
-D* Design: wd@denx.de
-C* Coding: wd@denx.de
-V* Verification: dzu@denx.de
- ***********************************************************************/
-static uchar *key_match (uchar *kbd_data)
-{
- char magic[sizeof (kbd_magic_prefix) + 1];
- uchar *suffix;
- char *kbd_magic_keys;
-
- /*
- * The following string defines the characters that can pe appended
- * to "key_magic" to form the names of environment variables that
- * hold "magic" key codes, i. e. such key codes that can cause
- * pre-boot actions. If the string is empty (""), then only
- * "key_magic" is checked (old behaviour); the string "125" causes
- * checks for "key_magic1", "key_magic2" and "key_magic5", etc.
- */
- if ((kbd_magic_keys = getenv ("magic_keys")) == NULL)
- kbd_magic_keys = "";
-
- /* loop over all magic keys;
- * use '\0' suffix in case of empty string
- */
- for (suffix=(uchar *)kbd_magic_keys; *suffix || suffix==(uchar *)kbd_magic_keys; ++suffix) {
- sprintf (magic, "%s%c", kbd_magic_prefix, *suffix);
-#if 0
- printf ("### Check magic \"%s\"\n", magic);
-#endif
- if (compare_magic(kbd_data, (uchar *)getenv(magic)) == 0) {
- char cmd_name[sizeof (kbd_command_prefix) + 1];
- char *cmd;
-
- sprintf (cmd_name, "%s%c", kbd_command_prefix, *suffix);
-
- cmd = getenv (cmd_name);
-#if 0
- printf ("### Set PREBOOT to $(%s): \"%s\"\n",
- cmd_name, cmd ? cmd : "<<NULL>>");
-#endif
- *kbd_data = *suffix;
- return ((uchar *)cmd);
- }
- }
-#if 0
- printf ("### Delete PREBOOT\n");
-#endif
- *kbd_data = '\0';
- return (NULL);
-}
-#endif /* CONFIG_PREBOOT */
-
-/*---------------Board Special Commands: PIC read/write ---------------*/
-
-#if (CONFIG_COMMANDS & CFG_CMD_BSP)
-/***********************************************************************
-F* Function: int do_pic (cmd_tbl_t *cmdtp, int flag,
-F* int argc, char *argv[]) P*A*Z*
- *
-P* Parameters: cmd_tbl_t *cmdtp
-P* - Pointer to our command table entry
-P* int flag
-P* - If the CMD_FLAG_REPEAT bit is set, then this call is
-P* a repetition
-P* int argc
-P* - Argument count
-P* char *argv[]
-P* - Array of the actual arguments
-P*
-P* Returnvalue: int
-P* - 0 The command was handled successfully
-P* 1 An error occurred
- *
-Z* Intention: Implement the "pic [read|write]" commands.
-Z* The read subcommand takes one argument, the register,
-Z* whereas the write command takes two, the register and
-Z* the new value.
- *
-D* Design: wd@denx.de
-C* Coding: wd@denx.de
-V* Verification: dzu@denx.de
- ***********************************************************************/
-int do_pic (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- uchar reg, val;
-
- switch (argc) {
- case 3: /* PIC read reg */
- if (strcmp (argv[1], "read") != 0)
- break;
-
- reg = simple_strtoul (argv[2], NULL, 16);
-
- printf ("PIC read: reg %02x: %02x\n\n", reg, pic_read (reg));
-
- return 0;
- case 4: /* PIC write reg val */
- if (strcmp (argv[1], "write") != 0)
- break;
-
- reg = simple_strtoul (argv[2], NULL, 16);
- val = simple_strtoul (argv[3], NULL, 16);
-
- printf ("PIC write: reg %02x val 0x%02x: %02x => ",
- reg, val, pic_read (reg));
- pic_write (reg, val);
- printf ("%02x\n\n", pic_read (reg));
- return 0;
- default:
- break;
- }
- printf ("Usage:\n%s\n", cmdtp->usage);
- return 1;
-}
-U_BOOT_CMD(
- pic, 4, 1, do_pic,
- "pic - read and write PIC registers\n",
- "read reg - read PIC register `reg'\n"
- "pic write reg val - write value `val' to PIC register `reg'\n"
-);
-
-/***********************************************************************
-F* Function: int do_kbd (cmd_tbl_t *cmdtp, int flag,
-F* int argc, char *argv[]) P*A*Z*
- *
-P* Parameters: cmd_tbl_t *cmdtp
-P* - Pointer to our command table entry
-P* int flag
-P* - If the CMD_FLAG_REPEAT bit is set, then this call is
-P* a repetition
-P* int argc
-P* - Argument count
-P* char *argv[]
-P* - Array of the actual arguments
-P*
-P* Returnvalue: int
-P* - 0 is always returned.
- *
-Z* Intention: Implement the "kbd" command.
-Z* The keyboard status is read. The result is printed on
-Z* the console and written into the "keybd" environment
-Z* variable.
- *
-D* Design: wd@denx.de
-C* Coding: wd@denx.de
-V* Verification: dzu@denx.de
- ***********************************************************************/
-int do_kbd (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- uchar kbd_data[KEYBD_DATALEN];
- char keybd_env[2 * KEYBD_DATALEN + 1];
- uchar val;
- int i;
-
-#if 0 /* Done in kbd_init */
- i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
-#endif
-
- /* Read keys */
- val = KEYBD_CMD_READ_KEYS;
- i2c_write (kbd_addr, 0, 0, &val, 1);
- i2c_read (kbd_addr, 0, 0, kbd_data, KEYBD_DATALEN);
-
- puts ("Keys:");
- for (i = 0; i < KEYBD_DATALEN; ++i) {
- sprintf (keybd_env + i + i, "%02X", kbd_data[i]);
- printf (" %02x", kbd_data[i]);
- }
- putc ('\n');
- setenv ("keybd", keybd_env);
- return 0;
-}
-
-U_BOOT_CMD(
- kbd, 1, 1, do_kbd,
- "kbd - read keyboard status\n",
- NULL
-);
-
-/* Read and set LSB switch */
-#define CFG_PC_TXD1_ENA 0x0008 /* PC.12 */
-
-/***********************************************************************
-F* Function: int do_lsb (cmd_tbl_t *cmdtp, int flag,
-F* int argc, char *argv[]) P*A*Z*
- *
-P* Parameters: cmd_tbl_t *cmdtp
-P* - Pointer to our command table entry
-P* int flag
-P* - If the CMD_FLAG_REPEAT bit is set, then this call is
-P* a repetition
-P* int argc
-P* - Argument count
-P* char *argv[]
-P* - Array of the actual arguments
-P*
-P* Returnvalue: int
-P* - 0 The command was handled successfully
-P* 1 An error occurred
- *
-Z* Intention: Implement the "lsb [on|off]" commands.
-Z* The lsb is switched according to the first parameter by
-Z* by signaling the PIC I/O expander.
-Z* Called with no arguments, the current setting is
-Z* printed.
- *
-D* Design: wd@denx.de
-C* Coding: wd@denx.de
-V* Verification: dzu@denx.de
- ***********************************************************************/
-int do_lsb (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- uchar val;
- immap_t *immr = (immap_t *) CFG_IMMR;
-
- switch (argc) {
- case 1: /* lsb - print setting */
- val = pic_read (0x60);
- printf ("LSB is o%s\n", (val & 0x20) ? "n" : "ff");
- return 0;
- case 2: /* lsb on or lsb off - set switch */
- val = pic_read (0x60);
-
- if (strcmp (argv[1], "on") == 0) {
- val |= 0x20;
- immr->im_ioport.iop_pcpar &= ~(CFG_PC_TXD1_ENA);
- immr->im_ioport.iop_pcdat |= CFG_PC_TXD1_ENA;
- immr->im_ioport.iop_pcdir |= CFG_PC_TXD1_ENA;
- } else if (strcmp (argv[1], "off") == 0) {
- val &= ~0x20;
- immr->im_ioport.iop_pcpar &= ~(CFG_PC_TXD1_ENA);
- immr->im_ioport.iop_pcdat &= ~(CFG_PC_TXD1_ENA);
- immr->im_ioport.iop_pcdir |= CFG_PC_TXD1_ENA;
- } else {
- break;
- }
- pic_write (0x60, val);
- return 0;
- default:
- break;
- }
- printf ("Usage:\n%s\n", cmdtp->usage);
- return 1;
-}
-
-U_BOOT_CMD(
- lsb, 2, 1, do_lsb,
- "lsb - check and set LSB switch\n",
- "on - switch LSB on\n"
- "lsb off - switch LSB off\n"
- "lsb - print current setting\n"
-);
-
-#endif /* CFG_CMD_BSP */
-
-/*----------------------------- Utilities -----------------------------*/
-/***********************************************************************
-F* Function: uchar pic_read (uchar reg) P*A*Z*
- *
-P* Parameters: uchar reg
-P* - Register to read
-P*
-P* Returnvalue: uchar
-P* - Value read from register
- *
-Z* Intention: Read a register from the PIC I/O expander.
- *
-D* Design: wd@denx.de
-C* Coding: wd@denx.de
-V* Verification: dzu@denx.de
- ***********************************************************************/
-uchar pic_read (uchar reg)
-{
- return (i2c_reg_read (CFG_I2C_PICIO_ADDR, reg));
-}
-
-/***********************************************************************
-F* Function: void pic_write (uchar reg, uchar val) P*A*Z*
- *
-P* Parameters: uchar reg
-P* - Register to read
-P* uchar val
-P* - Value to write
-P*
-P* Returnvalue: none
- *
-Z* Intention: Write to a register on the PIC I/O expander.
- *
-D* Design: wd@denx.de
-C* Coding: wd@denx.de
-V* Verification: dzu@denx.de
- ***********************************************************************/
-void pic_write (uchar reg, uchar val)
-{
- i2c_reg_write (CFG_I2C_PICIO_ADDR, reg, val);
-}
-
-/*---------------------- Board Control Functions ----------------------*/
-/***********************************************************************
-F* Function: void board_poweroff (void) P*A*Z*
- *
-P* Parameters: none
-P*
-P* Returnvalue: none
- *
-Z* Intention: Turn off the battery power and loop endless, so this
-Z* should better be the last function you call...
- *
-D* Design: wd@denx.de
-C* Coding: wd@denx.de
-V* Verification: dzu@denx.de
- ***********************************************************************/
-void board_poweroff (void)
-{
- /* Turn battery off */
- ((volatile immap_t *)CFG_IMMR)->im_ioport.iop_pcdat &= ~(1 << (31 - 13));
-
- while (1);
-}
-
-#ifdef CONFIG_MODEM_SUPPORT
-static int key_pressed(void)
-{
- uchar kbd_data[KEYBD_DATALEN];
- uchar val;
-
- /* Read keys */
- val = KEYBD_CMD_READ_KEYS;
- i2c_write (kbd_addr, 0, 0, &val, 1);
- i2c_read (kbd_addr, 0, 0, kbd_data, KEYBD_DATALEN);
-
- return (compare_magic(kbd_data, (uchar *)CONFIG_MODEM_KEY_MAGIC) == 0);
-}
-#endif /* CONFIG_MODEM_SUPPORT */
-
-#ifdef CONFIG_POST
-/*
- * Returns 1 if keys pressed to start the power-on long-running tests
- * Called from board_init_f().
- */
-int post_hotkeys_pressed(void)
-{
- uchar kbd_data[KEYBD_DATALEN];
- uchar val;
-
- /* Read keys */
- val = KEYBD_CMD_READ_KEYS;
- i2c_write (kbd_addr, 0, 0, &val, 1);
- i2c_read (kbd_addr, 0, 0, kbd_data, KEYBD_DATALEN);
-
- return (compare_magic(kbd_data, (uchar *)CONFIG_POST_KEY_MAGIC) == 0);
-}
-#endif
diff --git a/board/lwmon/u-boot.lds b/board/lwmon/u-boot.lds
deleted file mode 100644
index 6505d45561..0000000000
--- a/board/lwmon/u-boot.lds
+++ /dev/null
@@ -1,130 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc8xx/start.o (.text)
- common/environment.o(.text)
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/lwmon/u-boot.lds.debug b/board/lwmon/u-boot.lds.debug
deleted file mode 100644
index 828afbbced..0000000000
--- a/board/lwmon/u-boot.lds.debug
+++ /dev/null
@@ -1,138 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc8xx/start.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/extable.o (.text)
-
- . = env_offset;
- common/environment.o(.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/m5272c3/Makefile b/board/m5272c3/Makefile
deleted file mode 100644
index e5d8446313..0000000000
--- a/board/m5272c3/Makefile
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# (C) Copyright 2000-2003
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/m5272c3/config.mk b/board/m5272c3/config.mk
deleted file mode 100644
index ccb2cf735d..0000000000
--- a/board/m5272c3/config.mk
+++ /dev/null
@@ -1,25 +0,0 @@
-#
-# (C) Copyright 2000-2003
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-# Coldfire contribution by Bernhard Kuhn <bkuhn@metrowerks.com>
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-TEXT_BASE = 0xffe00000
diff --git a/board/m5272c3/flash.c b/board/m5272c3/flash.c
deleted file mode 100644
index fb918435c8..0000000000
--- a/board/m5272c3/flash.c
+++ /dev/null
@@ -1,378 +0,0 @@
-/*
- * (C) Copyright 2000-2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-
-#define PHYS_FLASH_1 CFG_FLASH_BASE
-#define FLASH_BANK_SIZE 0x200000
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
-
-void flash_print_info (flash_info_t * info)
-{
- int i;
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case (AMD_MANUFACT & FLASH_VENDMASK):
- printf ("AMD: ");
- break;
- default:
- printf ("Unknown Vendor ");
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case (AMD_ID_PL160CB & FLASH_TYPEMASK):
- printf ("AM29PL160CB (16Mbit)\n");
- break;
- default:
- printf ("Unknown Chip Type\n");
- goto Done;
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; i++) {
- if ((i % 5) == 0) {
- printf ("\n ");
- }
- printf (" %08lX%s", info->start[i],
- info->protect[i] ? " (RO)" : " ");
- }
- printf ("\n");
-
- Done:
-}
-
-
-unsigned long flash_init (void)
-{
- int i, j;
- ulong size = 0;
-
- for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
- ulong flashbase = 0;
-
- flash_info[i].flash_id =
- (AMD_MANUFACT & FLASH_VENDMASK) |
- (AMD_ID_PL160CB & FLASH_TYPEMASK);
- flash_info[i].size = FLASH_BANK_SIZE;
- flash_info[i].sector_count = CFG_MAX_FLASH_SECT;
- memset (flash_info[i].protect, 0, CFG_MAX_FLASH_SECT);
- if (i == 0)
- flashbase = PHYS_FLASH_1;
- else
- panic ("configured to many flash banks!\n");
-
- for (j = 0; j < flash_info[i].sector_count; j++) {
- if (j == 0) {
- /* 1st is 16 KiB */
- flash_info[i].start[j] = flashbase;
- }
- if ((j >= 1) && (j <= 2)) {
- /* 2nd and 3rd are 8 KiB */
- flash_info[i].start[j] =
- flashbase + 0x4000 + 0x2000 * (j - 1);
- }
- if (j == 3) {
- /* 4th is 224 KiB */
- flash_info[i].start[j] = flashbase + 0x8000;
- }
- if ((j >= 4) && (j <= 10)) {
- /* rest is 256 KiB */
- flash_info[i].start[j] =
- flashbase + 0x40000 + 0x40000 * (j -
- 4);
- }
- }
- size += flash_info[i].size;
- }
-
- flash_protect (FLAG_PROTECT_SET,
- CFG_FLASH_BASE,
- CFG_FLASH_BASE + 0x3ffff, &flash_info[0]);
-
- return size;
-}
-
-
-#define CMD_READ_ARRAY 0x00F0
-#define CMD_UNLOCK1 0x00AA
-#define CMD_UNLOCK2 0x0055
-#define CMD_ERASE_SETUP 0x0080
-#define CMD_ERASE_CONFIRM 0x0030
-#define CMD_PROGRAM 0x00A0
-#define CMD_UNLOCK_BYPASS 0x0020
-
-#define MEM_FLASH_ADDR1 (*(volatile u16 *)(CFG_FLASH_BASE + (0x00000555<<1)))
-#define MEM_FLASH_ADDR2 (*(volatile u16 *)(CFG_FLASH_BASE + (0x000002AA<<1)))
-
-#define BIT_ERASE_DONE 0x0080
-#define BIT_RDY_MASK 0x0080
-#define BIT_PROGRAM_ERROR 0x0020
-#define BIT_TIMEOUT 0x80000000 /* our flag */
-
-#define READY 1
-#define ERR 2
-#define TMO 4
-
-
-int flash_erase (flash_info_t * info, int s_first, int s_last)
-{
- ulong result;
- int iflag, cflag, prot, sect;
- int rc = ERR_OK;
- int chip1;
-
- /* first look for protection bits */
-
- if (info->flash_id == FLASH_UNKNOWN)
- return ERR_UNKNOWN_FLASH_TYPE;
-
- if ((s_first < 0) || (s_first > s_last)) {
- return ERR_INVAL;
- }
-
- if ((info->flash_id & FLASH_VENDMASK) !=
- (AMD_MANUFACT & FLASH_VENDMASK)) {
- return ERR_UNKNOWN_FLASH_VENDOR;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
- if (prot)
- return ERR_PROTECTED;
-
- /*
- * Disable interrupts which might cause a timeout
- * here. Remember that our exception vectors are
- * at address 0 in the flash, and we don't want a
- * (ticker) exception to happen while the flash
- * chip is in programming mode.
- */
-
- cflag = icache_status ();
- icache_disable ();
- iflag = disable_interrupts ();
-
- printf ("\n");
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect <= s_last && !ctrlc (); sect++) {
- printf ("Erasing sector %2d ... ", sect);
-
- /* arm simple, non interrupt dependent timer */
- set_timer (0);
-
- if (info->protect[sect] == 0) { /* not protected */
- volatile u16 *addr =
- (volatile u16 *) (info->start[sect]);
-
- MEM_FLASH_ADDR1 = CMD_UNLOCK1;
- MEM_FLASH_ADDR2 = CMD_UNLOCK2;
- MEM_FLASH_ADDR1 = CMD_ERASE_SETUP;
-
- MEM_FLASH_ADDR1 = CMD_UNLOCK1;
- MEM_FLASH_ADDR2 = CMD_UNLOCK2;
- *addr = CMD_ERASE_CONFIRM;
-
- /* wait until flash is ready */
- chip1 = 0;
-
- do {
- result = *addr;
-
- /* check timeout */
- if (get_timer (0) > CFG_FLASH_ERASE_TOUT) {
- MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
- chip1 = TMO;
- break;
- }
-
- if (!chip1
- && (result & 0xFFFF) & BIT_ERASE_DONE)
- chip1 = READY;
-
- } while (!chip1);
-
- MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
-
- if (chip1 == ERR) {
- rc = ERR_PROG_ERROR;
- goto outahere;
- }
- if (chip1 == TMO) {
- rc = ERR_TIMOUT;
- goto outahere;
- }
-
- printf ("ok.\n");
- } else { /* it was protected */
-
- printf ("protected!\n");
- }
- }
-
- if (ctrlc ())
- printf ("User Interrupt!\n");
-
- outahere:
- /* allow flash to settle - wait 10 ms */
- udelay (10000);
-
- if (iflag)
- enable_interrupts ();
-
- if (cflag)
- icache_enable ();
-
- return rc;
-}
-
-
-volatile static int write_word (flash_info_t * info, ulong dest, ulong data)
-{
- volatile u16 *addr = (volatile u16 *) dest;
- ulong result;
- int rc = ERR_OK;
- int cflag, iflag;
- int chip1;
-
- /*
- * Check if Flash is (sufficiently) erased
- */
- result = *addr;
- if ((result & data) != data)
- return ERR_NOT_ERASED;
-
-
- /*
- * Disable interrupts which might cause a timeout
- * here. Remember that our exception vectors are
- * at address 0 in the flash, and we don't want a
- * (ticker) exception to happen while the flash
- * chip is in programming mode.
- */
-
- cflag = icache_status ();
- icache_disable ();
- iflag = disable_interrupts ();
-
- MEM_FLASH_ADDR1 = CMD_UNLOCK1;
- MEM_FLASH_ADDR2 = CMD_UNLOCK2;
- MEM_FLASH_ADDR1 = CMD_PROGRAM;
- *addr = data;
-
- /* arm simple, non interrupt dependent timer */
- set_timer (0);
-
- /* wait until flash is ready */
- chip1 = 0;
- do {
- result = *addr;
-
- /* check timeout */
- if (get_timer (0) > CFG_FLASH_ERASE_TOUT) {
- chip1 = ERR | TMO;
- break;
- }
- if (!chip1 && ((result & 0x80) == (data & 0x80)))
- chip1 = READY;
-
- } while (!chip1);
-
- *addr = CMD_READ_ARRAY;
-
- if (chip1 == ERR || *addr != data)
- rc = ERR_PROG_ERROR;
-
- if (iflag)
- enable_interrupts ();
-
- if (cflag)
- icache_enable ();
-
- return rc;
-}
-
-
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- ulong wp, data;
- int rc;
-
- if (addr & 1) {
- printf ("unaligned destination not supported\n");
- return ERR_ALIGN;
- }
-
-#if 0
- if (cnt & 1) {
- printf ("odd transfer sizes not supported\n");
- return ERR_ALIGN;
- }
-#endif
-
- wp = addr;
-
- if (addr & 1) {
- data = (*((volatile u8 *) addr) << 8) | *((volatile u8 *)
- src);
- if ((rc = write_word (info, wp - 1, data)) != 0) {
- return (rc);
- }
- src += 1;
- wp += 1;
- cnt -= 1;
- }
-
- while (cnt >= 2) {
- data = *((volatile u16 *) src);
- if ((rc = write_word (info, wp, data)) != 0) {
- return (rc);
- }
- src += 2;
- wp += 2;
- cnt -= 2;
- }
-
- if (cnt == 1) {
- data = (*((volatile u8 *) src) << 8) |
- *((volatile u8 *) (wp + 1));
- if ((rc = write_word (info, wp, data)) != 0) {
- return (rc);
- }
- src += 1;
- wp += 1;
- cnt -= 1;
- }
-
- return ERR_OK;
-}
diff --git a/board/m5272c3/m5272c3.c b/board/m5272c3/m5272c3.c
deleted file mode 100644
index 0dfeaf24f5..0000000000
--- a/board/m5272c3/m5272c3.c
+++ /dev/null
@@ -1,52 +0,0 @@
-/*
- * (C) Copyright 2000-2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/m5272.h>
-#include <asm/immap_5272.h>
-
-
-int checkboard (void) {
- puts ("Board: ");
- puts("MOTOROLA MCF5272C3 EVB\n");
- return 0;
- };
-
-long int initdram (int board_type) {
- volatile sdramctrl_t * sdp = (sdramctrl_t *)(CFG_MBAR + MCFSIM_SDCR);
-
- sdp->sdram_sdtr = 0xf539;
- sdp->sdram_sdcr = 0x4211;
-
- /* Dummy write to start SDRAM */
- *((volatile unsigned long *)0) = 0;
-
- return CFG_SDRAM_SIZE * 1024 * 1024;
- };
-
-int testdram (void) {
- /* TODO: XXX XXX XXX */
- printf ("DRAM test not implemented!\n");
-
- return (0);
-}
diff --git a/board/m5272c3/u-boot.lds b/board/m5272c3/u-boot.lds
deleted file mode 100644
index f7dc070904..0000000000
--- a/board/m5272c3/u-boot.lds
+++ /dev/null
@@ -1,144 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(m68k)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mcf52x2/start.o (.text)
- lib_m68k/traps.o (.text)
- cpu/mcf52x2/interrupts.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/zlib.o (.text)
-
- . = DEFINED(env_offset) ? env_offset : .;
- common/environment.o (.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
-
- .reloc :
- {
- __got_start = .;
- *(.got)
- __got_end = .;
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- _sbss = .;
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- . = ALIGN(4);
- _ebss = .;
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/m5282evb/Makefile b/board/m5282evb/Makefile
deleted file mode 100644
index e5d8446313..0000000000
--- a/board/m5282evb/Makefile
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# (C) Copyright 2000-2003
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/m5282evb/config.mk b/board/m5282evb/config.mk
deleted file mode 100644
index 848430736b..0000000000
--- a/board/m5282evb/config.mk
+++ /dev/null
@@ -1,25 +0,0 @@
-#
-# (C) Copyright 2000-2003
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-# Coldfire contribution by Bernhard Kuhn <bkuhn@metrowerks.com>
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-TEXT_BASE = 0x20000
diff --git a/board/m5282evb/flash.c b/board/m5282evb/flash.c
deleted file mode 100644
index ff70783bda..0000000000
--- a/board/m5282evb/flash.c
+++ /dev/null
@@ -1,378 +0,0 @@
-/*
- * (C) Copyright 2000-2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-
-#define PHYS_FLASH_1 CFG_FLASH_BASE
-#define FLASH_BANK_SIZE 0x200000
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
-
-void flash_print_info (flash_info_t * info)
-{
- int i;
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case (AMD_MANUFACT & FLASH_VENDMASK):
- printf ("AMD: ");
- break;
- default:
- printf ("Unknown Vendor ");
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case (AMD_ID_PL160CB & FLASH_TYPEMASK):
- printf ("AM29PL160CB (16Mbit)\n");
- break;
- default:
- printf ("Unknown Chip Type\n");
- goto Done;
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; i++) {
- if ((i % 5) == 0) {
- printf ("\n ");
- }
- printf (" %08lX%s", info->start[i],
- info->protect[i] ? " (RO)" : " ");
- }
- printf ("\n");
-
- Done:
-}
-
-
-unsigned long flash_init (void)
-{
- int i, j;
- ulong size = 0;
-
- for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
- ulong flashbase = 0;
-
- flash_info[i].flash_id =
- (AMD_MANUFACT & FLASH_VENDMASK) |
- (AMD_ID_PL160CB & FLASH_TYPEMASK);
- flash_info[i].size = FLASH_BANK_SIZE;
- flash_info[i].sector_count = CFG_MAX_FLASH_SECT;
- memset (flash_info[i].protect, 0, CFG_MAX_FLASH_SECT);
- if (i == 0)
- flashbase = PHYS_FLASH_1;
- else
- panic ("configured to many flash banks!\n");
-
- for (j = 0; j < flash_info[i].sector_count; j++) {
- if (j == 0) {
- /* 1st is 16 KiB */
- flash_info[i].start[j] = flashbase;
- }
- if ((j >= 1) && (j <= 2)) {
- /* 2nd and 3rd are 8 KiB */
- flash_info[i].start[j] =
- flashbase + 0x4000 + 0x2000 * (j - 1);
- }
- if (j == 3) {
- /* 4th is 32 KiB */
- flash_info[i].start[j] = flashbase + 0x8000;
- }
- if ((j >= 4) && (j <= 34)) {
- /* rest is 256 KiB */
- flash_info[i].start[j] =
- flashbase + 0x10000 + 0x10000 * (j -
- 4);
- }
- }
- size += flash_info[i].size;
- }
-
- flash_protect (FLAG_PROTECT_SET,
- CFG_FLASH_BASE,
- CFG_FLASH_BASE + 0xffff, &flash_info[0]);
-
- return size;
-}
-
-
-#define CMD_READ_ARRAY 0x00F0
-#define CMD_UNLOCK1 0x00AA
-#define CMD_UNLOCK2 0x0055
-#define CMD_ERASE_SETUP 0x0080
-#define CMD_ERASE_CONFIRM 0x0030
-#define CMD_PROGRAM 0x00A0
-#define CMD_UNLOCK_BYPASS 0x0020
-
-#define MEM_FLASH_ADDR1 (*(volatile u16 *)(CFG_FLASH_BASE + (0x00000555<<1)))
-#define MEM_FLASH_ADDR2 (*(volatile u16 *)(CFG_FLASH_BASE + (0x000002AA<<1)))
-
-#define BIT_ERASE_DONE 0x0080
-#define BIT_RDY_MASK 0x0080
-#define BIT_PROGRAM_ERROR 0x0020
-#define BIT_TIMEOUT 0x80000000 /* our flag */
-
-#define READY 1
-#define ERR 2
-#define TMO 4
-
-
-int flash_erase (flash_info_t * info, int s_first, int s_last)
-{
- ulong result;
- int iflag, cflag, prot, sect;
- int rc = ERR_OK;
- int chip1;
-
- /* first look for protection bits */
-
- if (info->flash_id == FLASH_UNKNOWN)
- return ERR_UNKNOWN_FLASH_TYPE;
-
- if ((s_first < 0) || (s_first > s_last)) {
- return ERR_INVAL;
- }
-
- if ((info->flash_id & FLASH_VENDMASK) !=
- (AMD_MANUFACT & FLASH_VENDMASK)) {
- return ERR_UNKNOWN_FLASH_VENDOR;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
- if (prot)
- return ERR_PROTECTED;
-
- /*
- * Disable interrupts which might cause a timeout
- * here. Remember that our exception vectors are
- * at address 0 in the flash, and we don't want a
- * (ticker) exception to happen while the flash
- * chip is in programming mode.
- */
-
- cflag = icache_status ();
- icache_disable ();
- iflag = disable_interrupts ();
-
- printf ("\n");
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect <= s_last && !ctrlc (); sect++) {
- printf ("Erasing sector %2d ... ", sect);
-
- /* arm simple, non interrupt dependent timer */
- set_timer (0);
-
- if (info->protect[sect] == 0) { /* not protected */
- volatile u16 *addr =
- (volatile u16 *) (info->start[sect]);
-
- MEM_FLASH_ADDR1 = CMD_UNLOCK1;
- MEM_FLASH_ADDR2 = CMD_UNLOCK2;
- MEM_FLASH_ADDR1 = CMD_ERASE_SETUP;
-
- MEM_FLASH_ADDR1 = CMD_UNLOCK1;
- MEM_FLASH_ADDR2 = CMD_UNLOCK2;
- *addr = CMD_ERASE_CONFIRM;
-
- /* wait until flash is ready */
- chip1 = 0;
-
- do {
- result = *addr;
-
- /* check timeout */
- if (get_timer (0) > CFG_FLASH_ERASE_TOUT) {
- MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
- chip1 = TMO;
- break;
- }
-
- if (!chip1
- && (result & 0xFFFF) & BIT_ERASE_DONE)
- chip1 = READY;
-
- } while (!chip1);
-
- MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
-
- if (chip1 == ERR) {
- rc = ERR_PROG_ERROR;
- goto outahere;
- }
- if (chip1 == TMO) {
- rc = ERR_TIMOUT;
- goto outahere;
- }
-
- printf ("ok.\n");
- } else { /* it was protected */
-
- printf ("protected!\n");
- }
- }
-
- if (ctrlc ())
- printf ("User Interrupt!\n");
-
- outahere:
- /* allow flash to settle - wait 10 ms */
- udelay (10000);
-
- if (iflag)
- enable_interrupts ();
-
- if (cflag)
- icache_enable ();
-
- return rc;
-}
-
-
-volatile static int write_word (flash_info_t * info, ulong dest, ulong data)
-{
- volatile u16 *addr = (volatile u16 *) dest;
- ulong result;
- int rc = ERR_OK;
- int cflag, iflag;
- int chip1;
-
- /*
- * Check if Flash is (sufficiently) erased
- */
- result = *addr;
- if ((result & data) != data)
- return ERR_NOT_ERASED;
-
-
- /*
- * Disable interrupts which might cause a timeout
- * here. Remember that our exception vectors are
- * at address 0 in the flash, and we don't want a
- * (ticker) exception to happen while the flash
- * chip is in programming mode.
- */
-
- cflag = icache_status ();
- icache_disable ();
- iflag = disable_interrupts ();
-
- MEM_FLASH_ADDR1 = CMD_UNLOCK1;
- MEM_FLASH_ADDR2 = CMD_UNLOCK2;
- MEM_FLASH_ADDR1 = CMD_PROGRAM;
- *addr = data;
-
- /* arm simple, non interrupt dependent timer */
- set_timer (0);
-
- /* wait until flash is ready */
- chip1 = 0;
- do {
- result = *addr;
-
- /* check timeout */
- if (get_timer (0) > CFG_FLASH_ERASE_TOUT) {
- chip1 = ERR | TMO;
- break;
- }
- if (!chip1 && ((result & 0x80) == (data & 0x80)))
- chip1 = READY;
-
- } while (!chip1);
-
- *addr = CMD_READ_ARRAY;
-
- if (chip1 == ERR || *addr != data)
- rc = ERR_PROG_ERROR;
-
- if (iflag)
- enable_interrupts ();
-
- if (cflag)
- icache_enable ();
-
- return rc;
-}
-
-
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- ulong wp, data;
- int rc;
-
- if (addr & 1) {
- printf ("unaligned destination not supported\n");
- return ERR_ALIGN;
- }
-
-#if 0
- if (cnt & 1) {
- printf ("odd transfer sizes not supported\n");
- return ERR_ALIGN;
- }
-#endif
-
- wp = addr;
-
- if (addr & 1) {
- data = (*((volatile u8 *) addr) << 8) | *((volatile u8 *)
- src);
- if ((rc = write_word (info, wp - 1, data)) != 0) {
- return (rc);
- }
- src += 1;
- wp += 1;
- cnt -= 1;
- }
-
- while (cnt >= 2) {
- data = *((volatile u16 *) src);
- if ((rc = write_word (info, wp, data)) != 0) {
- return (rc);
- }
- src += 2;
- wp += 2;
- cnt -= 2;
- }
-
- if (cnt == 1) {
- data = (*((volatile u8 *) src) << 8) |
- *((volatile u8 *) (wp + 1));
- if ((rc = write_word (info, wp, data)) != 0) {
- return (rc);
- }
- src += 1;
- wp += 1;
- cnt -= 1;
- }
-
- return ERR_OK;
-}
diff --git a/board/m5282evb/m5282evb.c b/board/m5282evb/m5282evb.c
deleted file mode 100644
index a08af68ae3..0000000000
--- a/board/m5282evb/m5282evb.c
+++ /dev/null
@@ -1,35 +0,0 @@
-/*
- * (C) Copyright 2000-2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-
-int checkboard (void)
-{
- puts ("MOTOROLA M5272EVB Evaluation Board\n");
- return 0;
-}
-
-long int initdram (int board_type)
-{
- return 0x1000000;
-}
diff --git a/board/m5282evb/u-boot.lds b/board/m5282evb/u-boot.lds
deleted file mode 100644
index c461d20e51..0000000000
--- a/board/m5282evb/u-boot.lds
+++ /dev/null
@@ -1,143 +0,0 @@
-/*
- * (C) Copyright 2000-2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(m68k)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mcf52x2/start.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/string.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
- lib_generic/zlib.o (.text)
-
-/* . = env_offset; */
- common/environment.o(.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- __got_start = .;
- *(.got)
- __got_end = .;
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- _sbss = .;
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- . = ALIGN(4);
- _ebss = .;
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/mbx8xx/Makefile b/board/mbx8xx/Makefile
deleted file mode 100644
index 3e8376cc0d..0000000000
--- a/board/mbx8xx/Makefile
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o vpd.o
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/mbx8xx/config.mk b/board/mbx8xx/config.mk
deleted file mode 100644
index d5e8ed264c..0000000000
--- a/board/mbx8xx/config.mk
+++ /dev/null
@@ -1,33 +0,0 @@
-#
-# (C) Copyright 2000
-# Sysgo Real-Time Solutions, GmbH <www.elinos.com>
-# Marius Groeger <mgroeger@sysgo.de>
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# MBX8xx boards
-#
-
-TEXT_BASE = 0xfe000000
-/*TEXT_BASE = 0x00200000 */
diff --git a/board/mbx8xx/csr.h b/board/mbx8xx/csr.h
deleted file mode 100644
index 832e9241f7..0000000000
--- a/board/mbx8xx/csr.h
+++ /dev/null
@@ -1,60 +0,0 @@
-#ifndef __csr_h
-#define __csr_h
-
-/*
- * (C) Copyright 2000
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * Control and Status Register definitions for the MBX
- *
- *--------------------------------------------------------------------
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/* bits for control register #1 / status register #1 */
-#define CSR1_ETEN 0x80 /* Ethernet Transceiver Enabled */
-#define CSR1_ELEN 0x40 /* Ethernet XCVR in Internal Loopback */
-#define CSR1_EAEN 0x20 /* Auto selection TP/AUI Enabled */
-#define CSR1_TPEN 0x10 /* TP manually selected */
-#define CSR1_FDDIS 0x08 /* Full Duplex Mode disabled */
-#define CSR1_FCTEN 0x04 /* Collision Testing of XCVR disabled */
-#define CSR1_COM1EN 0x02 /* COM1 signals routed to RS232 Transceiver */
-#define CSR1_XCVRDIS 0x01 /* Onboard RS232 Transceiver Disabled */
-
-/* bits for control register #2 */
-#define CR2_VDDSEL 0xC0 /* PCMCIA Supply Voltage */
-#define CR2_VPPSEL 0x30 /* PCMCIA Programming Voltage */
-#define CR2_BRDFAIL 0x08 /* Board fail */
-#define CR2_SWS1 0x04 /* Software Status #2 LED */
-#define CR2_SWS2 0x02 /* Software Status #2 LED */
-#define CR2_QSPANRST 0x01 /* Reset QSPAN */
-
-/* bits for status register #2 */
-#define SR2_VDDSEL 0xC0 /* PCMCIA Supply Voltage */
-#define SR2_VPPSEL 0x30 /* PCMCIA Programming Voltage */
-#define SR2_BATGD 0x08 /* Low Voltage indication for onboard bat */
-#define SR2_NVBATGD 0x04 /* Low Voltage indication for NVRAM */
-#define SR2_RDY 0x02 /* Flash programming status bit */
-#define SR2_FT 0x01 /* Reserved for Factory test purposes */
-
-#define MBX_CSR1 (*((uchar *)CFG_CSR_BASE))
-#define MBX_CSR2 (*((uchar *)CFG_CSR_BASE + 1))
-
-#endif /* __csr_h */
diff --git a/board/mbx8xx/dimm.h b/board/mbx8xx/dimm.h
deleted file mode 100644
index b40f112356..0000000000
--- a/board/mbx8xx/dimm.h
+++ /dev/null
@@ -1,98 +0,0 @@
-#ifndef __dimm_h
-#define __dimm_h
-
-/*
- * Module name: %M%
- * Description:
- * Serial Presence Detect Definitions Module
- * SCCS identification: %I%
- * Branch: %B%
- * Sequence: %S%
- * Date newest applied delta was created (MM/DD/YY): %G%
- * Time newest applied delta was created (HH:MM:SS): %U%
- * SCCS file name %F%
- * Fully qualified SCCS file name:
- * %P%
- * Copyright:
- * (C) COPYRIGHT MOTOROLA, INC. 1996
- * ALL RIGHTS RESERVED
- * Notes:
- * 1. All data was taken from an IBM application note titled
- * "Serial Presence Detect Definitions".
- * History:
- * Date Who
- *
- * 10/24/96 Rob Baxter
- * Initial release.
- *
- */
-
-/*
- * serial PD byte assignment address map (256 byte EEPROM)
- */
-typedef struct dimm
-{
- uchar n_bytes; /* 00 number of bytes written/used */
- uchar t_bytes; /* 01 total number of bytes in serial PD device */
- uchar fmt; /* 02 fundamental memory type (FPM/EDO/SDRAM) */
- uchar n_row; /* 03 number of rows */
- uchar n_col; /* 04 number of columns */
- uchar n_banks; /* 05 number of banks */
- uchar data_w_lo; /* 06 data width */
- uchar data_w_hi; /* 07 data width */
- uchar ifl; /* 08 interface levels */
- uchar a_ras; /* 09 RAS access */
- uchar a_cas; /* 0A CAS access */
- uchar ct; /* 0B configuration type (non-parity/parity/ECC) */
- uchar refresh_rt; /* 0C refresh rate/type */
- uchar p_dram_o; /* 0D primary DRAM organization */
- uchar s_dram_o; /* 0E secondary DRAM organization (parity/ECC-checkbits) */
- uchar reserved[17]; /* 0F reserved fields for future offerings */
- uchar ss_info[32]; /* 20 superset information (may be used in the future) */
- uchar m_info[64]; /* 40 manufacturer information (optional) */
- uchar unused[128]; /* 80 unused storage locations */
-} dimm_t;
-
-/*
- * memory type definitions
- */
-#define DIMM_MT_FPM 1 /* standard FPM (fast page mode) DRAM */
-#define DIMM_MT_EDO 2 /* EDO (extended data out) */
-#define DIMM_MT_PN 3 /* pipelined nibble */
-#define DIMM_MT_SDRAM 4 /* SDRAM (synchronous DRAM) */
-
-/*
- * row addresses definitions
- */
-#define DIMM_RA_RDNDNT (1<<7) /* redundant addressing */
-#define DIMM_RA_MASK 0x7f /* number of row addresses mask */
-
-/*
- * module interface levels definitions
- */
-#define DIMM_IFL_TTL 0 /* TTL/5V tolerant */
-#define DIMM_IFL_LVTTL 1 /* LVTTL (not 5V tolerant) */
-#define DIMM_IFL_HSTL15 2 /* HSTL 1.5 */
-#define DIMM_IFL_SSTL33 3 /* SSTL 3.3 */
-#define DIMM_IFL_SSTL25 4 /* SSTL 2.5 */
-
-/*
- * DIMM configuration type definitions
- */
-#define DIMM_CT_NONE 0 /* none */
-#define DIMM_CT_PARITY 1 /* parity */
-#define DIMM_CT_ECC 2 /* ECC */
-
-/*
- * row addresses definitions
- */
-#define DIMM_RRT_SR (1<<7) /* self refresh flag */
-#define DIMM_RRT_MASK 0x7f /* refresh rate mask */
-#define DIMM_RRT_NRML 0x00 /* normal (15.625us) */
-#define DIMM_RRT_R_3_9 0x01 /* reduced .25x (3.9us) */
-#define DIMM_RRT_R_7_8 0x02 /* reduced .5x (7.8us) */
-#define DIMM_RRT_E_31_3 0x03 /* extended 2x (31.3us) */
-#define DIMM_RRT_E_62_5 0x04 /* extended 4x (62.5us) */
-#define DIMM_RRT_E_125 0x05 /* extended 8x (125us) */
-
-#endif /* __dimm_h */
diff --git a/board/mbx8xx/flash.c b/board/mbx8xx/flash.c
deleted file mode 100644
index a491f7bf0b..0000000000
--- a/board/mbx8xx/flash.c
+++ /dev/null
@@ -1,408 +0,0 @@
-/*
- * (C) Copyright 2000
- * Marius Groeger <mgroeger@sysgo.de>
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- *
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * Flash Routines for AM290[48]0B devices
- *
- *--------------------------------------------------------------------
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-#include "vpd.h"
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-
-static ulong flash_get_size (vu_long *addr, flash_info_t *info);
-static int write_word (flash_info_t *info, ulong dest, ulong data);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- unsigned long size, totsize;
- int i;
- ulong addr;
-
- /* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- totsize = 0;
- addr = 0xfc000000;
- for(i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
- size = flash_get_size((vu_long *)addr, &flash_info[i]);
- if (flash_info[i].flash_id == FLASH_UNKNOWN)
- break;
- totsize += size;
- addr += size;
- }
-
- addr = 0xfe000000;
- for(i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
-
- size = flash_get_size((vu_long *)addr, &flash_info[i]);
- if (flash_info[i].flash_id == FLASH_UNKNOWN)
- break;
- totsize += size;
- addr += size;
- }
-
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
- /* monitor protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+monitor_flash_len-1,
- &flash_info[0]);
-#endif
-
- return (totsize);
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id >> 16) {
- case 0x1:
- printf ("AMD ");
- break;
- default:
- printf ("Unknown Vendor ");
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case AMD_ID_F040B:
- printf ("AM29F040B (4 Mbit)\n");
- break;
- case AMD_ID_F080B:
- printf ("AM29F080B (8 Mbit)\n");
- break;
- case AMD_ID_F016D:
- printf ("AM29F016D (16 Mbit)\n");
- break;
- default:
- printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " "
- );
- }
- printf ("\n");
- return;
-}
-
-/*
- * The following code cannot be run from FLASH!
- */
-
-static ulong flash_get_size (vu_long *addr, flash_info_t *info)
-{
- short i;
- ulong vendor, devid;
- ulong base = (ulong)addr;
-
- /* Write auto select command: read Manufacturer ID */
- addr[0x0555] = 0xAAAAAAAA;
- addr[0x02AA] = 0x55555555;
- addr[0x0555] = 0x90909090;
-
- vendor = addr[0];
- devid = addr[1] & 0xff;
-
- /* only support AMD */
- if (vendor != 0x01010101) {
- return 0;
- }
-
- vendor &= 0xf;
- devid &= 0xff;
-
- if (devid == AMD_ID_F040B) {
- info->flash_id = vendor << 16 | devid;
- info->sector_count = 8;
- info->size = info->sector_count * 0x10000;
- }
- else if (devid == AMD_ID_F080B) {
- info->flash_id = vendor << 16 | devid;
- info->sector_count = 16;
- info->size = 4 * info->sector_count * 0x10000;
- }
- else if (devid == AMD_ID_F016D) {
- info->flash_id = vendor << 16 | devid;
- info->sector_count = 32;
- info->size = 4 * info->sector_count * 0x10000;
- }
- else {
- printf ("## Unknown Flash Type: %08lx\n", devid);
- return 0;
- }
-
- /* check for protected sectors */
- for (i = 0; i < info->sector_count; i++) {
- /* sector base address */
- info->start[i] = base + i * (info->size / info->sector_count);
- /* read sector protection at sector address, (A7 .. A0) = 0x02 */
- /* D0 = 1 if protected */
- addr = (volatile unsigned long *)(info->start[i]);
- info->protect[i] = addr[2] & 1;
- }
-
- /*
- * Prevent writes to uninitialized FLASH.
- */
- if (info->flash_id != FLASH_UNKNOWN) {
- addr = (vu_long *)info->start[0];
- addr[0] = 0xF0; /* reset bank */
- }
-
- return (info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- vu_long *addr = (vu_long*)(info->start[0]);
- int flag, prot, sect, l_sect;
- ulong start, now, last;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- l_sect = -1;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[0x0555] = 0XAAAAAAAA;
- addr[0x02AA] = 0x55555555;
- addr[0x0555] = 0x80808080;
- addr[0x0555] = 0XAAAAAAAA;
- addr[0x02AA] = 0x55555555;
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr = (vu_long*)(info->start[sect]);
- addr[0] = 0x30303030;
- l_sect = sect;
- }
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- /*
- * We wait for the last triggered sector
- */
- if (l_sect < 0)
- goto DONE;
-
- start = get_timer (0);
- last = start;
- addr = (vu_long*)(info->start[l_sect]);
- while ((addr[0] & 0x80808080) != 0x80808080) {
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- return 1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- serial_putc ('.');
- last = now;
- }
- }
-
- DONE:
- /* reset to read mode */
- addr = (volatile unsigned long *)info->start[0];
- addr[0] = 0xF0F0F0F0; /* reset bank */
-
- printf (" done\n");
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int i, l, rc;
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
- for (; i<4 && cnt>0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = 0;
- for (i=0; i<4; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- return (write_word(info, wp, data));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word (flash_info_t *info, ulong dest, ulong data)
-{
- vu_long *addr = (vu_long*)(info->start[0]);
- ulong start;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*((vu_long *)dest) & data) != data) {
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[0x0555] = 0xAAAAAAAA;
- addr[0x02AA] = 0x55555555;
- addr[0x0555] = 0xA0A0A0A0;
-
- *((vu_long *)dest) = data;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* data polling for D7 */
- start = get_timer (0);
- while ((*((vu_long *)dest) & 0x80808080) != (data & 0x80808080)) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- return (1);
- }
- }
- return (0);
-}
-
-/*-----------------------------------------------------------------------
- */
diff --git a/board/mbx8xx/mbx8xx.c b/board/mbx8xx/mbx8xx.c
deleted file mode 100644
index 9a9bf809ea..0000000000
--- a/board/mbx8xx/mbx8xx.c
+++ /dev/null
@@ -1,379 +0,0 @@
-/*
- * (C) Copyright 2000
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * Board specific routines for the MBX
- *
- * - initialisation
- * - interface to VPD data (mac address, clock speeds)
- * - memory controller
- * - serial io initialisation
- * - ethernet io initialisation
- *
- * -----------------------------------------------------------------
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <commproc.h>
-#include <mpc8xx.h>
-#include "dimm.h"
-#include "vpd.h"
-#include "csr.h"
-
-/* ------------------------------------------------------------------------- */
-
-static const uint sdram_table_40[] = {
- /* DRAM - single read. (offset 0 in upm RAM)
- */
- 0xCFAFC004, 0x0FAFC404, 0x0CAF0C04, 0x30AF0C00,
- 0xF1BF4805, 0xFFFFC005, 0xFFFFC005, 0xFFFFC005,
-
- /* DRAM - burst read. (offset 8 in upm RAM)
- */
- 0xCFAFC004, 0x0FAFC404, 0x0CAF0C04, 0x03AF0C08,
- 0x0CAF0C04, 0x03AF0C08, 0x0CAF0C04, 0x03AF0C08,
- 0x0CAF0C04, 0x30AF0C00, 0xF3BF4805, 0xFFFFC005,
- 0xFFFFC005, 0xFFFFC005, 0xFFFFC005, 0xFFFFC005,
-
- /* DRAM - single write. (offset 18 in upm RAM)
- */
- 0xCFFF0004, 0x0FFF0404, 0x0CFF0C00, 0x33FF4804,
- 0xFFFFC005, 0xFFFFC005, 0xFFFFC005, 0xFFFFC005,
-
- /* DRAM - burst write. (offset 20 in upm RAM)
- */
- 0xCFFF0004, 0x0FFF0404, 0x0CFF0C00, 0x03FF0C0C,
- 0x0CFF0C00, 0x03FF0C0C, 0x0CFF0C00, 0x03FF0C0C,
- 0x0CFF0C00, 0x33FF4804, 0xFFFFC005, 0xFFFFC005,
- 0xFFFFC005, 0xFFFFC005, 0xFFFFC005, 0xFFFFC005,
-
- /* refresh (offset 30 in upm RAM)
- */
- 0xFCFFC004, 0xC0FFC004, 0x01FFC004, 0x0FFFC004,
- 0x3FFFC004, 0xFFFFC005, 0xFFFFC005, 0xFFFFC005,
- 0xFFFFC005, 0xFFFFC005, 0xFFFFC005, 0xFFFFC005,
-
- /* exception. (offset 3c in upm RAM)
- */
- 0xFFFFC007, 0xFFFFC007, 0xFFFFC007, 0xFFFFC007,
-};
-
-static const uint sdram_table_50[] = {
- /* DRAM - single read. (offset 0 in upm RAM)
- */
- 0xCFAFC004, 0x0FAFC404, 0x0CAF8C04, 0x10AF0C04,
- 0xF0AF0C00, 0xF3BF4805, 0xFFFFC005, 0xFFFFC005,
-
- /* DRAM - burst read. (offset 8 in upm RAM)
- */
- 0xCFAFC004, 0X0FAFC404, 0X0CAF8C04, 0X00AF0C04,
- /* 0X07AF0C08, 0X0CAF0C04, 0X01AF0C04, 0X0FAF0C04, */
- 0X07AF0C08, 0X0CAF0C04, 0X01AF0C04, 0X0FAF0C08,
- 0X0CAF0C04, 0X01AF0C04, 0X0FAF0C08, 0X0CAF0C04,
- /* 0X10AF0C04, 0XF0AFC000, 0XF3FF4805, 0XFFFFC005, */
- 0X10AF0C04, 0XF0AFC000, 0XF3BF4805, 0XFFFFC005,
-
- /* DRAM - single write. (offset 18 in upm RAM)
- */
- 0xCFFF0004, 0x0FFF0404, 0x0CFF0C00, 0x13FF4804,
- 0xFFFFC004, 0xFFFFC005, 0xFFFFC005, 0xFFFFC005,
-
- /* DRAM - burst write. (offset 20 in upm RAM)
- */
- 0xCFFF0004, 0x0FFF0404, 0x0CFF0C00, 0x03FF0C0C,
- 0x0CFF0C00, 0x03FF0C0C, 0x0CFF0C00, 0x03FF0C0C,
- 0x0CFF0C00, 0x13FF4804, 0xFFFFC004, 0xFFFFC005,
- 0xFFFFC005, 0xFFFFC005, 0xFFFFC005, 0xFFFFC005,
-
- /* refresh (offset 30 in upm RAM)
- */
- 0xFCFFC004, 0xC0FFC004, 0x01FFC004, 0x0FFFC004,
- 0x1FFFC004, 0xFFFFC004, 0xFFFFC005, 0xFFFFC005,
- 0xFFFFC005, 0xFFFFC005, 0xFFFFC005, 0xFFFFC005,
-
- /* exception. (offset 3c in upm RAM)
- */
- 0xFFFFC007, 0xFFFFC007, 0xFFFFC007, 0xFFFFC007,
-};
-
-/* ------------------------------------------------------------------------- */
-
-static unsigned int get_reffreq(void);
-static unsigned int board_get_cpufreq(void);
-
-void mbx_init (void)
-{
- volatile immap_t *immr = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immr->im_memctl;
- ulong speed, refclock, plprcr, sccr;
- ulong br0_32 = memctl->memc_br0 & 0x400;
-
- /* real-time clock status and control register */
- immr->im_sitk.sitk_rtcsck = KAPWR_KEY;
- immr->im_sit.sit_rtcsc = 0x00C3;
-
- /* SIEL and SIMASK Registers (see MBX PRG 2-3) */
- immr->im_siu_conf.sc_simask = 0x00000000;
- immr->im_siu_conf.sc_siel = 0xAAAA0000;
- immr->im_siu_conf.sc_tesr = 0xFFFFFFFF;
-
- /*
- * Prepare access to i2c bus. The MBX offers 3 devices on the i2c bus:
- * 1. Vital Product Data (contains clock speeds, MAC address etc, see vpd.h)
- * 2. RAM Specs (see dimm.h)
- * 2. DIMM Specs (see dimm.h)
- */
- vpd_init ();
-
- /* system clock and reset control register */
- immr->im_clkrstk.cark_sccrk = KAPWR_KEY;
- sccr = immr->im_clkrst.car_sccr;
- sccr &= SCCR_MASK;
- sccr |= CFG_SCCR;
- immr->im_clkrst.car_sccr = sccr;
-
- speed = board_get_cpufreq ();
- refclock = get_reffreq ();
-
-#if ((CFG_PLPRCR & PLPRCR_MF_MSK) != 0)
- plprcr = CFG_PLPRCR;
-#else
- plprcr = immr->im_clkrst.car_plprcr;
- plprcr &= PLPRCR_MF_MSK; /* isolate MF field */
- plprcr |= CFG_PLPRCR; /* reset control bits */
-#endif
-
-#ifdef CFG_USE_OSCCLK /* See doc/README.MBX ! */
- plprcr |= ((speed + refclock / 2) / refclock - 1) << 20;
-#endif
-
- immr->im_clkrstk.cark_plprcrk = KAPWR_KEY;
- immr->im_clkrst.car_plprcr = plprcr;
-
- /*
- * preliminary setup of memory controller:
- * - map Flash, otherwise configuration/status
- * registers won't be accessible when read
- * by board_init_f.
- * - map NVRAM and configuation/status registers.
- * - map pci registers.
- * - DON'T map ram yet, this is done in initdram().
- */
- switch (speed / 1000000) {
- case 40:
- memctl->memc_br0 = 0xFE000000 | br0_32 | 1;
- memctl->memc_or0 = 0xFF800930;
- memctl->memc_or4 = CFG_NVRAM_OR | 0x920;
- memctl->memc_br4 = CFG_NVRAM_BASE | 0x401;
- break;
- case 50:
- memctl->memc_br0 = 0xFE000000 | br0_32 | 1;
- memctl->memc_or0 = 0xFF800940;
- memctl->memc_or4 = CFG_NVRAM_OR | 0x930;
- memctl->memc_br4 = CFG_NVRAM_BASE | 0x401;
- break;
- default:
- hang ();
- break;
- }
-#ifdef CONFIG_USE_PCI
- memctl->memc_or5 = CFG_PCIMEM_OR;
- memctl->memc_br5 = CFG_PCIMEM_BASE | 0x001;
- memctl->memc_or6 = CFG_PCIBRIDGE_OR;
- memctl->memc_br6 = CFG_PCIBRIDGE_BASE | 0x001;
-#endif
- /*
- * FIXME: I do not understand why I have to call this to
- * initialise the control register here before booting from
- * the PCMCIA card but if I do not the Linux kernel falls
- * over in a big heap. If you can answer this question I
- * would like to know about it.
- */
- board_ether_init();
-}
-
-void board_serial_init (void)
-{
- MBX_CSR1 &= ~(CSR1_COM1EN | CSR1_XCVRDIS);
-}
-
-void board_ether_init (void)
-{
- MBX_CSR1 &= ~(CSR1_EAEN | CSR1_ELEN);
- MBX_CSR1 |= CSR1_ETEN | CSR1_TPEN | CSR1_FDDIS;
-}
-
-static unsigned int board_get_cpufreq (void)
-{
-#ifndef CONFIG_8xx_GCLK_FREQ
- vpd_packet_t *packet;
-
- packet = vpd_find_packet (VPD_PID_ICS);
- return *((ulong *) packet->data);
-#else
- return((unsigned int)CONFIG_8xx_GCLK_FREQ );
-#endif /* CONFIG_8xx_GCLK_FREQ */
-}
-
-static unsigned int get_reffreq (void)
-{
- vpd_packet_t *packet;
-
- packet = vpd_find_packet (VPD_PID_RCS);
- return *((ulong *) packet->data);
-}
-
-void board_get_enetaddr (uchar * addr)
-{
- int i;
- vpd_packet_t *packet;
-
- packet = vpd_find_packet (VPD_PID_EA);
- for (i = 0; i < 6; i++)
- addr[i] = packet->data[i];
-}
-
-/*
- * Check Board Identity:
- */
-
-int checkboard (void)
-{
- vpd_packet_t *packet;
- int i;
- const char *const fmt =
- "\n *** Warning: Low Battery Status - %s Battery ***";
-
- puts ("Board: ");
-
- packet = vpd_find_packet (VPD_PID_PID);
- for (i = 0; i < packet->size; i++) {
- serial_putc (packet->data[i]);
- }
- packet = vpd_find_packet (VPD_PID_MT);
- for (i = 0; i < packet->size; i++) {
- serial_putc (packet->data[i]);
- }
- serial_putc ('(');
- packet = vpd_find_packet (VPD_PID_FAN);
- for (i = 0; i < packet->size; i++) {
- serial_putc (packet->data[i]);
- }
- serial_putc (')');
-
- if (!(MBX_CSR2 & SR2_BATGD))
- printf (fmt, "On-Board");
- if (!(MBX_CSR2 & SR2_NVBATGD))
- printf (fmt, "NVRAM");
-
- serial_putc ('\n');
-
- return (0);
-}
-
-/* ------------------------------------------------------------------------- */
-
-static ulong get_ramsize (dimm_t * dimm)
-{
- ulong size = 0;
-
- if (dimm->fmt == 1 || dimm->fmt == 2 || dimm->fmt == 3
- || dimm->fmt == 4) {
- size = (1 << (dimm->n_row + dimm->n_col)) * dimm->n_banks *
- ((dimm->data_w_hi << 8 | dimm->data_w_lo) / 8);
- }
-
- return size;
-}
-
-long int initdram (int board_type)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- unsigned long ram_sz = 0;
- unsigned long dimm_sz = 0;
- dimm_t vpd_dimm, vpd_dram;
- unsigned int speed = board_get_cpufreq () / 1000000;
-
- if (vpd_read (0xa2, (uchar *) & vpd_dimm, sizeof (vpd_dimm), 0) > 0) {
- dimm_sz = get_ramsize (&vpd_dimm);
- }
- if (vpd_read (0xa6, (uchar *) & vpd_dram, sizeof (vpd_dram), 0) > 0) {
- ram_sz = get_ramsize (&vpd_dram);
- }
-
- /*
- * Only initialize memory controller when running from FLASH.
- * When running from RAM, don't touch it.
- */
- if ((ulong) initdram & 0xff000000) {
- ulong dimm_bank;
- ulong br0_32 = memctl->memc_br0 & 0x400;
-
- switch (speed) {
- case 40:
- upmconfig (UPMA, (uint *) sdram_table_40,
- sizeof (sdram_table_40) / sizeof (uint));
- memctl->memc_mptpr = 0x0200;
- memctl->memc_mamr = dimm_sz ? 0x06801000 : 0x13801000;
- memctl->memc_or7 = 0xff800930;
- memctl->memc_br7 = 0xfc000000 | (br0_32 ^ br0_32) | 1;
- break;
- case 50:
- upmconfig (UPMA, (uint *) sdram_table_50,
- sizeof (sdram_table_50) / sizeof (uint));
- memctl->memc_mptpr = 0x0200;
- memctl->memc_mamr = dimm_sz ? 0x08801000 : 0x1880100;
- memctl->memc_or7 = 0xff800940;
- memctl->memc_br7 = 0xfc000000 | (br0_32 ^ br0_32) | 1;
- break;
- default:
- hang ();
- break;
- }
-
- /* now map ram and dimm, largest one first */
- dimm_bank = dimm_sz / 2;
- if (!dimm_sz) {
- memctl->memc_or1 = ~(ram_sz - 1) | 0x400;
- memctl->memc_br1 = CFG_SDRAM_BASE | 0x81;
- memctl->memc_br2 = 0;
- memctl->memc_br3 = 0;
- } else if (ram_sz > dimm_bank) {
- memctl->memc_or1 = ~(ram_sz - 1) | 0x400;
- memctl->memc_br1 = CFG_SDRAM_BASE | 0x81;
- memctl->memc_or2 = ~(dimm_bank - 1) | 0x400;
- memctl->memc_br2 = (CFG_SDRAM_BASE + ram_sz) | 0x81;
- memctl->memc_or3 = ~(dimm_bank - 1) | 0x400;
- memctl->memc_br3 = (CFG_SDRAM_BASE + ram_sz + dimm_bank) \
- | 0x81;
- } else {
- memctl->memc_or2 = ~(dimm_bank - 1) | 0x400;
- memctl->memc_br2 = CFG_SDRAM_BASE | 0x81;
- memctl->memc_or3 = ~(dimm_bank - 1) | 0x400;
- memctl->memc_br3 = (CFG_SDRAM_BASE + dimm_bank) | 0x81;
- memctl->memc_or1 = ~(ram_sz - 1) | 0x400;
- memctl->memc_br1 = (CFG_SDRAM_BASE + dimm_sz) | 0x81;
- }
- }
-
- return ram_sz + dimm_sz;
-}
diff --git a/board/mbx8xx/u-boot.lds b/board/mbx8xx/u-boot.lds
deleted file mode 100644
index 1400cea157..0000000000
--- a/board/mbx8xx/u-boot.lds
+++ /dev/null
@@ -1,130 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc8xx/start.o (.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/mbx8xx/u-boot.lds.debug b/board/mbx8xx/u-boot.lds.debug
deleted file mode 100644
index 650572d4d0..0000000000
--- a/board/mbx8xx/u-boot.lds.debug
+++ /dev/null
@@ -1,138 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc8xx/start.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/extable.o (.text)
-
- . = env_offset;
- common/environment.o(.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/mbx8xx/vpd.c b/board/mbx8xx/vpd.c
deleted file mode 100644
index 6f883520cd..0000000000
--- a/board/mbx8xx/vpd.c
+++ /dev/null
@@ -1,196 +0,0 @@
-/*
- * (C) Copyright 2000
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * Code in faintly related to linux/arch/ppc/8xx_io:
- * MPC8xx CPM I2C interface. Copyright (c) 1999 Dan Malek (dmalek@jlc.net).
- *
- * This file implements functions to read the MBX's Vital Product Data
- * (VPD). I can't use the more general i2c code in mpc8xx/... since I need
- * the VPD at a time where there is no RAM available yet. Hence the VPD is
- * read into a special area in the DPRAM (see config_MBX.h::CFG_DPRAMVPD).
- *
- * -----------------------------------------------------------------
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#ifdef CONFIG_8xx
-#include <commproc.h>
-#endif
-#include "vpd.h"
-
-/* Location of receive/transmit buffer descriptors
- * Allocate one transmit bd and one receive bd.
- * IIC_BD_FREE points to free bd space which we'll use as tx buffer.
- */
-#define IIC_BD_TX1 (BD_IIC_START + 0*sizeof(cbd_t))
-#define IIC_BD_TX2 (BD_IIC_START + 1*sizeof(cbd_t))
-#define IIC_BD_RX (BD_IIC_START + 2*sizeof(cbd_t))
-#define IIC_BD_FREE (BD_IIC_START + 3*sizeof(cbd_t))
-
-/* FIXME -- replace 0x2000 with offsetof */
-#define VPD_P ((vpd_t *)(CFG_IMMR + 0x2000 + CFG_DPRAMVPD))
-
-/* transmit/receive buffers */
-#define IIC_RX_LENGTH 128
-
-#define WITH_MICROCODE_PATCH
-
-vpd_packet_t * vpd_find_packet(u_char ident)
-{
- vpd_packet_t *packet;
- vpd_t *vpd = VPD_P;
-
- packet = (vpd_packet_t *)&vpd->packets;
- while ((packet->identifier != ident) && packet->identifier != 0xFF)
- {
- packet = (vpd_packet_t *)((char *)packet + packet->size + 2);
- }
- return packet;
-}
-
-void vpd_init(void)
-{
- volatile immap_t *im = (immap_t *)CFG_IMMR;
- volatile cpm8xx_t *cp = &(im->im_cpm);
- volatile i2c8xx_t *i2c = (i2c8xx_t *)&(im->im_i2c);
- volatile iic_t *iip;
-#ifdef WITH_MICROCODE_PATCH
- ulong reloc = 0;
-#endif
-
- iip = (iic_t *)&cp->cp_dparam[PROFF_IIC];
-
- /*
- * kludge: when running from flash, no microcode patch can be
- * installed. However, the DPMEM usually contains non-zero
- * garbage at the relocatable patch base location, so lets clear
- * it now. This way the rest of the code can support the microcode
- * patch dynamically.
- */
- if ((ulong)vpd_init & 0xff000000)
- iip->iic_rpbase = 0;
-
-#ifdef WITH_MICROCODE_PATCH
- /* Check for and use a microcode relocation patch. */
- if ((reloc = iip->iic_rpbase))
- iip = (iic_t *)&cp->cp_dpmem[iip->iic_rpbase];
-#endif
- /* Initialize Port B IIC pins */
- cp->cp_pbpar |= 0x00000030;
- cp->cp_pbdir |= 0x00000030;
- cp->cp_pbodr |= 0x00000030;
-
- i2c->i2c_i2mod = 0x04; /* filter clock */
- i2c->i2c_i2add = 0x34; /* select an arbitrary (unique) address */
- i2c->i2c_i2brg = 0x07; /* make clock run maximum slow */
- i2c->i2c_i2cmr = 0x00; /* disable interrupts */
- i2c->i2c_i2cer = 0x1f; /* clear events */
- i2c->i2c_i2com = 0x01; /* configure i2c to work as master */
-
- if (vpd_read(0xa4, (uchar*)VPD_P, VPD_EEPROM_SIZE, 0) != VPD_EEPROM_SIZE)
- {
- hang();
- }
-}
-
-
-/* Read from I2C.
- * This is a two step process. First, we send the "dummy" write
- * to set the device offset for the read. Second, we perform
- * the read operation.
- */
-int vpd_read(uint iic_device, uchar *buf, int count, int offset)
-{
- volatile immap_t *im = (immap_t *)CFG_IMMR;
- volatile cpm8xx_t *cp = &(im->im_cpm);
- volatile i2c8xx_t *i2c = (i2c8xx_t *)&(im->im_i2c);
- volatile iic_t *iip;
- volatile cbd_t *tbdf1, *tbdf2, *rbdf;
- uchar *tb;
- uchar event;
-#ifdef WITH_MICROCODE_PATCH
- ulong reloc = 0;
-#endif
-
- iip = (iic_t *)&cp->cp_dparam[PROFF_IIC];
-#ifdef WITH_MICROCODE_PATCH
- /* Check for and use a microcode relocation patch. */
- if ((reloc = iip->iic_rpbase))
- iip = (iic_t *)&cp->cp_dpmem[iip->iic_rpbase];
-#endif
- tbdf1 = (cbd_t *)&cp->cp_dpmem[IIC_BD_TX1];
- tbdf2 = (cbd_t *)&cp->cp_dpmem[IIC_BD_TX2];
- rbdf = (cbd_t *)&cp->cp_dpmem[IIC_BD_RX];
-
- /* Send a "dummy write" operation. This is a write request with
- * only the offset sent, followed by another start condition.
- * This will ensure we start reading from the first location
- * of the EEPROM.
- */
- tb = (uchar*)&cp->cp_dpmem[IIC_BD_FREE];
- tb[0] = iic_device & 0xfe; /* device address */
- tb[1] = offset; /* offset */
- tbdf1->cbd_bufaddr = (uint)tb;
- tbdf1->cbd_datlen = 2;
- tbdf1->cbd_sc = 0x8400;
-
- tb += 2;
- tb[0] = iic_device | 1; /* device address */
- tbdf2->cbd_bufaddr = (uint)tb;
- tbdf2->cbd_datlen = count+1;
- tbdf2->cbd_sc = 0xbc00;
-
- rbdf->cbd_bufaddr = (uint)buf;
- rbdf->cbd_datlen = 0;
- rbdf->cbd_sc = 0xb000;
-
- iip->iic_tbase = IIC_BD_TX1;
- iip->iic_tbptr = IIC_BD_TX1;
- iip->iic_rbase = IIC_BD_RX;
- iip->iic_rbptr = IIC_BD_RX;
- iip->iic_rfcr = 0x15;
- iip->iic_tfcr = 0x15;
- iip->iic_mrblr = count;
- iip->iic_rstate = 0;
- iip->iic_tstate = 0;
-
- i2c->i2c_i2cer = 0x1f; /* clear event mask */
- i2c->i2c_i2mod |= 1; /* enable iic operation */
- i2c->i2c_i2com |= 0x80; /* start master */
-
- /* wait for IIC transfer */
- do {
- __asm__ volatile ("eieio");
- event = i2c->i2c_i2cer;
- } while (event == 0);
-
- if ((event & 0x10) || (event & 0x04)) {
- count = -1;
- goto bailout;
- }
-
-bailout:
- i2c->i2c_i2mod &= ~1; /* turn off iic operation */
- i2c->i2c_i2cer = 0x1f; /* clear event mask */
-
- return count;
-}
diff --git a/board/mbx8xx/vpd.h b/board/mbx8xx/vpd.h
deleted file mode 100644
index 1d9eb7fe20..0000000000
--- a/board/mbx8xx/vpd.h
+++ /dev/null
@@ -1,119 +0,0 @@
-#ifndef __vpd_h
-#define __vpd_h
-
-/*
- * Module name: %M%
- * Description:
- * Vital Product Data (VPD) Header Module
- * SCCS identification: %I%
- * Branch: %B%
- * Sequence: %S%
- * Date newest applied delta was created (MM/DD/YY): %G%
- * Time newest applied delta was created (HH:MM:SS): %U%
- * SCCS file name %F%
- * Fully qualified SCCS file name:
- * %P%
- * Copyright:
- * (C) COPYRIGHT MOTOROLA, INC. 1996
- * ALL RIGHTS RESERVED
- * Notes:
- * History:
- * Date Who
- *
- * 10/24/96 Rob Baxter
- * Initial release.
- *
- */
-
-#define VPD_EEPROM_SIZE 256 /* EEPROM size in bytes */
-
-/*
- * packet tuple identifiers
- *
- * 0x0D - 0xBF reserved
- * 0xC0 - 0xFE user defined
- */
-#define VPD_PID_GI 0x00 /* guaranteed illegal */
-#define VPD_PID_PID 0x01 /* product identifier (ASCII) */
-#define VPD_PID_FAN 0x02 /* factory assembly-number (ASCII) */
-#define VPD_PID_SN 0x03 /* serial-number (ASCII) */
-#define VPD_PID_PCO 0x04 /* product configuration options(binary) */
-#define VPD_PID_ICS 0x05 /* internal clock speed in HZ (integer) */
-#define VPD_PID_ECS 0x06 /* external clock speed in HZ (integer) */
-#define VPD_PID_RCS 0x07 /* reference clock speed in HZ(integer) */
-#define VPD_PID_EA 0x08 /* ethernet address (binary) */
-#define VPD_PID_MT 0x09 /* microprocessor type (ASCII) */
-#define VPD_PID_CRC 0x0A /* EEPROM CRC (integer) */
-#define VPD_PID_FMC 0x0B /* FLASH memory configuration (binary) */
-#define VPD_PID_VLSI 0x0C /* VLSI revisions/versions (binary) */
-#define VPD_PID_TERM 0xFF /* termination */
-
-/*
- * VPD structure (format)
- */
-#define VPD_EYE_SIZE 8 /* eyecatcher size */
-typedef struct vpd_header
-{
- uchar eyecatcher[VPD_EYE_SIZE]; /* eyecatcher - "MOTOROLA" */
- ushort size; /* size of EEPROM */
-} vpd_header_t;
-
-#define VPD_DATA_SIZE (VPD_EEPROM_SIZE-sizeof(vpd_header_t))
-typedef struct vpd
-{
- vpd_header_t header; /* header */
- uchar packets[VPD_DATA_SIZE]; /* data */
-} vpd_t;
-
-/*
- * packet tuple structure (format)
- */
-typedef struct vpd_packet
-{
- uchar identifier; /* identifier (PIDs above) */
- uchar size; /* size of the following data area */
- uchar data[1]; /* data (size is dependent upon PID) */
-} vpd_packet_t;
-
-/*
- * MBX product configuration options bit definitions
- *
- * Notes:
- * 1. The bit numbering is reversed in perspective with the C compiler.
- */
-#define PCO_BBRAM (1<<0) /* battery-backed RAM (BBRAM) and socket */
-#define PCO_BOOTROM (1<<1) /* boot ROM and socket (i.e., socketed FLASH) */
-#define PCO_KAPWR (1<<2) /* keep alive power source (lithium battey) and control circuit */
-#define PCO_ENET_TP (1<<3) /* ethernet twisted pair (TP) connector (RJ45) */
-#define PCO_ENET_AUI (1<<4) /* ethernet attachment unit interface (AUI) header */
-#define PCO_PCMCIA (1<<5) /* PCMCIA socket */
-#define PCO_DIMM (1<<6) /* DIMM module socket */
-#define PCO_DTT (1<<7) /* digital thermometer and thermostat (DTT) device */
-#define PCO_LCD (1<<8) /* liquid crystal display (LCD) device */
-#define PCO_PCI (1<<9) /* PCI-Bus bridge device (QSpan) and ISA-Bus bridge device (Winbond) */
-#define PCO_PCIO (1<<10) /* PC I/O (COM1, COM2, FDC, LPT, Keyboard/Mouse) */
-#define PCO_EIDE (1<<11) /* enhanced IDE (EIDE) header */
-#define PCO_FDC (1<<12) /* floppy disk controller (FDC) header */
-#define PCO_LPT_8XX (1<<13) /* parallel port header via MPC8xx */
-#define PCO_LPT_PCIO (1<<14) /* parallel port header via PC I/O */
-
-/*
- * FLASH memory configuration packet data
- */
-typedef struct vpd_fmc
-{
- ushort mid; /* manufacturer's idenitfier */
- ushort did; /* manufacturer's device idenitfier */
- uchar ddw; /* device data width (e.g., 8-bits, 16-bits) */
- uchar nod; /* number of devices present */
- uchar noc; /* number of columns */
- uchar cw; /* column width in bits */
- uchar wedw; /* write/erase data width */
-} vpd_fmc_t;
-
-/* function prototypes */
-extern void vpd_init(void);
-extern int vpd_read(uint iic_device, uchar *buf, int count, int offset);
-extern vpd_packet_t *vpd_find_packet(u_char ident);
-
-#endif /* __vpd_h */
diff --git a/board/ml2/Makefile b/board/ml2/Makefile
deleted file mode 100644
index 40c60b1b34..0000000000
--- a/board/ml2/Makefile
+++ /dev/null
@@ -1,47 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o serial.o
-SOBJS = init.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/ml2/config.mk b/board/ml2/config.mk
deleted file mode 100644
index 41118d5529..0000000000
--- a/board/ml2/config.mk
+++ /dev/null
@@ -1,29 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# esd ADCIOP boards
-#
-
-#TEXT_BASE = 0xFFFE0000
-TEXT_BASE = 0x18000000
diff --git a/board/ml2/flash.c b/board/ml2/flash.c
deleted file mode 100644
index 87cb1ff18e..0000000000
--- a/board/ml2/flash.c
+++ /dev/null
@@ -1,300 +0,0 @@
-/*
- * flash.c: Support code for the flash chips on the Xilinx ML2 board
- *
- * Copyright 2002 Mind NV
- *
- * http://www.mind.be/
- *
- * Author : Peter De Schrijver (p2@mind.be)
- *
- * This software may be used and distributed according to the terms of
- * the GNU General Public License (GPL) version 2, incorporated herein by
- * reference. Drivers based on or derived from this code fall under the GPL
- * and must retain the authorship, copyright and this license notice. This
- * file is not a complete program and may only be used when the entire program
- * is licensed under the GPL.
- *
- */
-
-#include <common.h>
-#include <asm/u-boot.h>
-#include <configs/ML2.h>
-
-#define FLASH_BANK_SIZE (64*1024*1024)
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
-
-#define SECT_SIZE (512*1024)
-
-#define CMD_READ_ARRAY 0x00FF00FF00FF00FULL
-#define CMD_IDENTIFY 0x0090009000900090ULL
-#define CMD_ERASE_SETUP 0x0020002000200020ULL
-#define CMD_ERASE_CONFIRM 0x00D000D000D000D0ULL
-#define CMD_PROGRAM 0x0040004000400040ULL
-#define CMD_RESUME 0x00D000D000D000D0ULL
-#define CMD_SUSPEND 0x00B000B000B000B0ULL
-#define CMD_STATUS_READ 0x0070007000700070ULL
-#define CMD_STATUS_RESET 0x0050005000500050ULL
-
-#define BIT_BUSY 0x0080008000800080ULL
-#define BIT_ERASE_SUSPEND 0x004000400400040ULL
-#define BIT_ERASE_ERROR 0x0020002000200020ULL
-#define BIT_PROGRAM_ERROR 0x0010001000100010ULL
-#define BIT_VPP_RANGE_ERROR 0x0008000800080008ULL
-#define BIT_PROGRAM_SUSPEND 0x0004000400040004ULL
-#define BIT_PROTECT_ERROR 0x0002000200020002ULL
-#define BIT_UNDEFINED 0x0001000100010001ULL
-
-#define BIT_SEQUENCE_ERROR 0x0030003000300030ULL
-
-#define BIT_TIMEOUT 0x80000000
-
-
-inline void eieio(void) {
-
- __asm__ __volatile__ ("eieio" : : : "memory");
-
-}
-
-ulong flash_init(void) {
-
- int i, j;
- ulong size = 0;
-
- for(i=0;i<CFG_MAX_FLASH_BANKS;i++) {
- ulong flashbase = 0;
-
- flash_info[i].flash_id = (INTEL_MANUFACT & FLASH_VENDMASK) |
- (INTEL_ID_28F128J3A & FLASH_TYPEMASK);
- flash_info[i].size = FLASH_BANK_SIZE;
- flash_info[i].sector_count = CFG_MAX_FLASH_SECT;
- memset(flash_info[i].protect, 0, CFG_MAX_FLASH_SECT);
- if (i==0)
- flashbase = CFG_FLASH_BASE;
- else
- panic("configured too many flash banks!\n");
- for (j = 0; j < flash_info[i].sector_count; j++)
- flash_info[i].start[j]=flashbase + j * SECT_SIZE;
-
- size += flash_info[i].size;
- }
-
- return size;
-}
-
-void flash_print_info (flash_info_t *info) {
-
- int i;
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case (INTEL_MANUFACT & FLASH_VENDMASK):
- printf("Intel: ");
- break;
- default:
- printf("Unknown Vendor ");
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case (INTEL_ID_28F128J3A & FLASH_TYPEMASK):
- printf("4x 28F128J3A (128Mbit)\n");
- break;
- default:
- printf("Unknown Chip Type\n");
- break;
- }
-
- printf(" Size: %ld MB in %d Sectors\n", info->size >> 20, info->sector_count);
- printf(" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; i++) {
- if ((i % 5) == 0)
- printf("\n ");
- printf (" %08lX%s", info->start[i],
- info->protect[i] ? " (RO)" : " ");
- }
- printf ("\n");
-}
-
-int flash_error (unsigned long long code) {
-
- if (code & BIT_TIMEOUT) {
- printf ("Timeout\n");
- return ERR_TIMOUT;
- }
-
- if (~code & BIT_BUSY) {
- printf ("Busy\n");
- return ERR_PROG_ERROR;
- }
-
- if (code & BIT_VPP_RANGE_ERROR) {
- printf ("Vpp range error\n");
- return ERR_PROG_ERROR;
- }
-
- if (code & BIT_PROTECT_ERROR) {
- printf ("Device protect error\n");
- return ERR_PROG_ERROR;
- }
-
- if (code & BIT_SEQUENCE_ERROR) {
- printf ("Command seqence error\n");
- return ERR_PROG_ERROR;
- }
-
- if (code & BIT_ERASE_ERROR) {
- printf ("Block erase error\n");
- return ERR_PROG_ERROR;
- }
-
- if (code & BIT_PROGRAM_ERROR) {
- printf ("Program error\n");
- return ERR_PROG_ERROR;
- }
-
- if (code & BIT_ERASE_SUSPEND) {
- printf ("Block erase suspended\n");
- return ERR_PROG_ERROR;
- }
-
- if (code & BIT_PROGRAM_SUSPEND) {
- printf ("Program suspended\n");
- return ERR_PROG_ERROR;
- }
-
- return ERR_OK;
-
-}
-
-int flash_erase (flash_info_t *info, int s_first, int s_last) {
-
- int rc = ERR_OK;
- int sect;
- unsigned long long result;
-
- if (info->flash_id == FLASH_UNKNOWN)
- return ERR_UNKNOWN_FLASH_TYPE;
-
- if ((s_first < 0) || (s_first > s_last))
- return ERR_INVAL;
-
- if ((info->flash_id & FLASH_VENDMASK) != (INTEL_MANUFACT & FLASH_VENDMASK))
- return ERR_UNKNOWN_FLASH_VENDOR;
-
- for (sect=s_first; sect<=s_last; ++sect)
- if (info->protect[sect])
- return ERR_PROTECTED;
-
- for (sect = s_first; sect<=s_last && !ctrlc(); sect++) {
- volatile unsigned long long *addr=
- (unsigned long long *)(info->start[sect]);
-
- printf("Erasing sector %2d ... ", sect);
-
- *addr=CMD_STATUS_RESET;
- eieio();
- *addr=CMD_ERASE_SETUP;
- eieio();
- *addr=CMD_ERASE_CONFIRM;
- eieio();
-
- do {
- result = *addr;
- } while(~result & BIT_BUSY);
-
- *addr=CMD_READ_ARRAY;
-
- if ((rc = flash_error(result)) == ERR_OK)
- printf("ok.\n");
- else
- break;
- }
-
- if (ctrlc())
- printf("User Interrupt!\n");
-
- return rc;
-}
-
-static int write_word (flash_info_t *info, ulong dest, unsigned long long data) {
-
- volatile unsigned long long *addr=(unsigned long long *)dest;
- unsigned long long result;
- int rc = ERR_OK;
-
- result=*addr;
- if ((result & data) != data)
- return ERR_NOT_ERASED;
-
- *addr=CMD_STATUS_RESET;
- eieio();
- *addr=CMD_PROGRAM;
- eieio();
- *addr=data;
- eieio();
-
- do {
- result=*addr;
- } while(~result & BIT_BUSY);
-
- *addr=CMD_READ_ARRAY;
-
- rc = flash_error(result);
-
- return rc;
-
-}
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) {
-
- ulong cp, wp;
- unsigned long long data;
- int l;
- int i,rc;
-
- wp=(addr & ~7);
-
- if((l=addr-wp) != 0) {
- data=0;
- for(i=0,cp=wp;i<l;++i,++cp)
- data = (data >> 8) | (*(uchar *)cp << 24);
-
- for (; i<8 && cnt>0; ++i) {
- data = (data >> 8) | (*src++ << 24);
- --cnt;
- ++cp;
- }
-
- for (; i<8; ++i, ++cp)
- data = (data >> 8) | (*(uchar *)cp << 24);
-
- if ((rc = write_word(info, wp, data)) != 0)
- return rc;
-
- wp+=8;
- }
-
- while(cnt>=8) {
- data=*((unsigned long long *)src);
- if ((rc = write_word(info, wp, data)) != 0)
- return rc;
- src+=8;
- wp+=8;
- cnt-=8;
- }
-
- if(cnt == 0)
- return ERR_OK;
-
- data = 0;
- for (i=0, cp=wp; i<8 && cnt>0; ++i, ++cp) {
- data = (data >> 8) | (*src++ << 24);
- --cnt;
- }
- for (; i<8; ++i, ++cp) {
- data = (data >> 8) | (*(uchar *)cp << 24);
- }
-
- return write_word(info, wp, data);
-
-}
diff --git a/board/ml2/init.S b/board/ml2/init.S
deleted file mode 100644
index 80f98c5bd9..0000000000
--- a/board/ml2/init.S
+++ /dev/null
@@ -1,34 +0,0 @@
-/*
- * init.S: Stubs for U-Boot initialization
- *
- * Copyright 2002 Mind NV
- *
- * http://www.mind.be/
- *
- * Author : Peter De Schrijver (p2@mind.be)
- *
- * This software may be used and distributed according to the terms of
- * the GNU General Public License (GPL) version 2, incorporated herein by
- * reference. Drivers based on or derived from this code fall under the GPL
- * and must retain the authorship, copyright and this license notice. This
- * file is not a complete program and may only be used when the entire
- * program is licensed under the GPL.
- *
- */
-
-#include <ppc4xx.h>
-
-#include <ppc_asm.tmpl>
-#include <ppc_defs.h>
-
-#include <asm/cache.h>
-#include <asm/mmu.h>
-
-
- .globl ext_bus_cntlr_init
-ext_bus_cntlr_init:
- blr
-
- .globl sdram_init
-sdram_init:
- blr
diff --git a/board/ml2/ml2.c b/board/ml2/ml2.c
deleted file mode 100644
index f32e512d4f..0000000000
--- a/board/ml2/ml2.c
+++ /dev/null
@@ -1,66 +0,0 @@
-/*
- * ml2.c: U-Boot platform support for Xilinx ML2 board
- *
- * Copyright 2002 Mind NV
- *
- * http://www.mind.be/
- *
- * Author : Peter De Schrijver (p2@mind.be)
- *
- * Derived from : Other platform support files in this tree
- *
- * This software may be used and distributed according to the terms of
- * the GNU General Public License (GPL) version 2, incorporated herein by
- * reference. Drivers based on or derived from this code fall under the GPL
- * and must retain the authorship, copyright and this license notice. This
- * file is not a complete program and may only be used when the entire
- * program is licensed under the GPL.
- *
- */
-
-#include <common.h>
-#include <asm/processor.h>
-
-
-int board_early_init_f (void)
-{
- return 0;
-}
-
-
-int checkboard (void)
-{
- char *s = getenv ("serial#");
- char *e;
-
- if (!s || strncmp (s, "ML2", 9)) {
- printf ("### No HW ID - assuming ML2");
- } else {
- for (e = s; *e; ++e) {
- if (*e == ' ')
- break;
- }
-
- for (; s < e; ++s) {
- putc (*s);
- }
- }
-
-
- putc ('\n');
-
- return (0);
-}
-
-
-long int initdram (int board_type)
-{
- return 32 * 1024 * 1024;
-}
-
-int testdram (void)
-{
- printf ("test: xxx MB - ok\n");
-
- return (0);
-}
diff --git a/board/ml2/serial.c b/board/ml2/serial.c
deleted file mode 100644
index 92baba9275..0000000000
--- a/board/ml2/serial.c
+++ /dev/null
@@ -1,131 +0,0 @@
-/*
- * (C) Copyright 2002
- * Peter De Schrijver (p2@mind.be), Mind Linux Solutions, NV.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- */
-
-#include <asm/u-boot.h>
-#include <asm/processor.h>
-#include <common.h>
-#include <command.h>
-#include <configs/ML2.h>
-
-#if (defined CFG_INIT_CHAN1) || (defined CFG_INIT_CHAN2)
-#include <ns16550.h>
-#endif
-
-#if 0
-#include "serial.h"
-#endif
-
-#if (defined CFG_INIT_CHAN1) || (defined CFG_INIT_CHAN2)
-const NS16550_t COM_PORTS[] = { (NS16550_t) CFG_NS16550_COM1,
- (NS16550_t) CFG_NS16550_COM2 };
-#endif
-
-int
-serial_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- int clock_divisor = CFG_NS16550_CLK / 16 / gd->baudrate;
-
-#ifdef CFG_INIT_CHAN1
- (void)NS16550_init(COM_PORTS[0], clock_divisor);
-#endif
-#ifdef CFG_INIT_CHAN2
- (void)NS16550_init(COM_PORTS[1], clock_divisor);
-#endif
- return 0;
-
-}
-
-void
-serial_putc(const char c)
-{
- if (c == '\n')
- NS16550_putc(COM_PORTS[CFG_DUART_CHAN], '\r');
-
- NS16550_putc(COM_PORTS[CFG_DUART_CHAN], c);
-}
-
-int
-serial_getc(void)
-{
- return NS16550_getc(COM_PORTS[CFG_DUART_CHAN]);
-}
-
-int
-serial_tstc(void)
-{
- return NS16550_tstc(COM_PORTS[CFG_DUART_CHAN]);
-}
-
-void
-serial_setbrg (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- int clock_divisor = CFG_NS16550_CLK / 16 / gd->baudrate;
-
-#ifdef CFG_INIT_CHAN1
- NS16550_reinit(COM_PORTS[0], clock_divisor);
-#endif
-#ifdef CFG_INIT_CHAN2
- NS16550_reinit(COM_PORTS[1], clock_divisor);
-#endif
-}
-
-void
-serial_puts (const char *s)
-{
- while (*s) {
- serial_putc (*s++);
- }
-}
-
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
-void
-kgdb_serial_init(void)
-{
-}
-
-void
-putDebugChar (int c)
-{
- serial_putc (c);
-}
-
-void
-putDebugStr (const char *str)
-{
- serial_puts (str);
-}
-
-int
-getDebugChar (void)
-{
- return serial_getc();
-}
-
-void
-kgdb_interruptible (int yes)
-{
- return;
-}
-#endif /* CFG_CMD_KGDB */
diff --git a/board/ml2/u-boot.lds b/board/ml2/u-boot.lds
deleted file mode 100644
index f8e9e33748..0000000000
--- a/board/ml2/u-boot.lds
+++ /dev/null
@@ -1,148 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/ppc4xx/start.o (.text)
- board/ml2/init.o (.text)
- cpu/ppc4xx/kgdb.o (.text)
- cpu/ppc4xx/traps.o (.text)
- cpu/ppc4xx/interrupts.o (.text)
- cpu/ppc4xx/serial.o (.text)
- cpu/ppc4xx/cpu_init.o (.text)
- cpu/ppc4xx/speed.o (.text)
- cpu/ppc4xx/4xx_enet.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/extable.o (.text)
- lib_generic/zlib.o (.text)
-
-/* . = env_offset;*/
-/* common/environment.o(.text)*/
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/ml2/u-boot.lds.debug b/board/ml2/u-boot.lds.debug
deleted file mode 100644
index 1608f8cdaa..0000000000
--- a/board/ml2/u-boot.lds.debug
+++ /dev/null
@@ -1,137 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- mpc8xx/start.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/extable.o (.text)
-
- common/environment.o(.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/modnet50/Makefile b/board/modnet50/Makefile
deleted file mode 100644
index ab2c376ff4..0000000000
--- a/board/modnet50/Makefile
+++ /dev/null
@@ -1,47 +0,0 @@
-#
-# (C) Copyright 2000-2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := modnet50.o flash.o
-SOBJS := lowlevel_init.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $^
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/modnet50/config.mk b/board/modnet50/config.mk
deleted file mode 100644
index 49d4836c0a..0000000000
--- a/board/modnet50/config.mk
+++ /dev/null
@@ -1,29 +0,0 @@
-#
-# (C) Copyright 2000
-# Sysgo Real-Time Solutions, GmbH <www.elinos.com>
-# Marius Groeger <mgroeger@sysgo.de>
-#
-# (C) Copyright 2000-2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-TEXT_BASE = 0x00f00000
-#CROSS_COMPILE = arm-elf-
diff --git a/board/modnet50/flash.c b/board/modnet50/flash.c
deleted file mode 100644
index a50639e09b..0000000000
--- a/board/modnet50/flash.c
+++ /dev/null
@@ -1,536 +0,0 @@
-/*
- * (C) Copyright 2002
- * MAZeT GmbH <www.mazet.de>
- * Stephan Linz <linz@mazet.de>, <linz@li-pro.net>
- *
- * The most stuff comes from PPCBoot and Linux.
- *
- * IMMS gGmbH <www.imms.de>
- * Thomas Elste <info@elste.org>
- *
- * Modifications for ModNET50 Board
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/arch/netarm_registers.h>
-
-#define SCR (*(volatile unsigned int *)(NETARM_GEN_MODULE_BASE + NETARM_GEN_SYSTEM_CONTROL))
-
-#define ALIGN_ABORT_OFF SCR = SCR & ~NETARM_GEN_SYS_CFG_ALIGN_ABORT
-#define ALIGN_ABORT_ON SCR = SCR | NETARM_GEN_SYS_CFG_ALIGN_ABORT
-
-#define PROG_ADDR (0x555*2)
-#define SETUP_ADDR (0x555*2)
-#define ID_ADDR (0x555*2)
-#define UNLOCK_ADDR1 (0x555*2)
-#define UNLOCK_ADDR2 (0x2AA*2)
-
-#define UNLOCK_CMD1 (0xAA)
-#define UNLOCK_CMD2 (0x55)
-#define ERASE_SUSPEND_CMD (0xB0)
-#define ERASE_RESUME_CMD (0x30)
-#define RESET_CMD (0xF0)
-#define ID_CMD (0x90)
-#define SECERASE_CMD (0x30)
-#define CHIPERASE_CMD (0x10)
-#define PROG_CMD (0xa0)
-#define SETUP_CMD (0x80)
-
-#define DQ2 (0x04)
-#define DQ3 (DQ2*2)
-#define DQ5 (DQ3*4)
-#define DQ6 (DQ5*2)
-
-#define WRITE_UNLOCK(addr) { \
- *(volatile __u16*)(addr + UNLOCK_ADDR1) = (__u16)UNLOCK_CMD1; \
- *(volatile __u16*)(addr + UNLOCK_ADDR2) = (__u16)UNLOCK_CMD2; \
-}
-
-#define CONFIG_AM29_RESERVED (0)
-#define K (1024)
-#define MB (4)
-
-#define CELL_SIZE (64*K)
-#define DEVICE_SIZE (MB*K*K)
-#define CELLS_PER_DEVICE (DEVICE_SIZE/CELL_SIZE)
-#define RESERVED_CELLS (CONFIG_AM29_RESERVED*K)/CELL_SIZE
-#define MAX_FLASH_DEVICES (1)
-#define AVAIL_SIZE (DEVICE_SIZE*MAX_FLASH_DEVICES - RESERVED_CELLS*CELL_SIZE)
-
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
-static __u16 toggling_bits;
-
-
-/*-----------------------------------------------------------------------
- */
-ulong flash_get_size (ulong baseaddr, flash_info_t * info)
-{
- short i;
- __u16 flashtest;
-
- /* Write auto select command sequence and test FLASH answer */
- WRITE_UNLOCK (baseaddr);
- *(volatile __u16 *) (baseaddr + ID_ADDR) = (__u16) ID_CMD;
- flashtest /* manufacturer ID */ = *(volatile __u16 *) (baseaddr);
- *(volatile __u16 *) (baseaddr + ID_ADDR) = (__u16) RESET_CMD;
-
- switch ((__u32) ((flashtest << 16) + flashtest)) {
- case AMD_MANUFACT:
- info->flash_id = FLASH_MAN_AMD & FLASH_VENDMASK;
- break;
- case FUJ_MANUFACT:
- info->flash_id = FLASH_MAN_FUJ & FLASH_VENDMASK;
- break;
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- return (0); /* no or unknown flash */
- }
-
- /* Write auto select command sequence and test FLASH answer */
- WRITE_UNLOCK (baseaddr);
- *(volatile __u16 *) (baseaddr + ID_ADDR) = (__u16) ID_CMD;
- flashtest /* device ID */ = *(volatile __u16 *) (baseaddr + 2);
- *(volatile __u16 *) (baseaddr + ID_ADDR) = (__u16) RESET_CMD;
-
- /* toggling_bits = (flashtest == TOSHIBA)?(DQ6):(DQ2|DQ6); */
- toggling_bits = (DQ2 | DQ6);
-
- switch ((__u32) ((flashtest << 16) + flashtest)) {
- case AMD_ID_LV160B:
- info->flash_id +=
- (FLASH_AM160LV | FLASH_AM160B) & FLASH_TYPEMASK;
- info->sector_count = CFG_MAX_FLASH_SECT;
- info->size = CFG_FLASH_SIZE;
- /* 1*16K Boot Block
- 2*8K Parameter Block
- 1*32K Small Main Block */
- info->start[0] = baseaddr;
- info->start[1] = baseaddr + 0x4000;
- info->start[2] = baseaddr + 0x6000;
- info->start[3] = baseaddr + 0x8000;
- for (i = 1; i < info->sector_count; i++)
- info->start[3 + i] = baseaddr + i * CFG_MAIN_SECT_SIZE;
- break;
- default:
- info->flash_id = FLASH_UNKNOWN;
- return (0); /* no or unknown flash */
- }
-
- for (i = 0; i < info->sector_count; i++) {
- /* Write auto select command sequence and test FLASH answer */
- WRITE_UNLOCK (info->start[i]);
- *(volatile __u16 *) (info->start[i] + ID_ADDR) = (__u16) ID_CMD;
- flashtest /* protected verify */ = *(volatile __u16 *) (info->start[i] + 4);
- *(volatile __u16 *) (info->start[i] + ID_ADDR) = (__u16) RESET_CMD;
- if (flashtest & 0x0001) {
- info->protect[i] = 1; /* D0 = 1 if protected */
- } else {
- info->protect[i] = 0;
- }
- }
- return (info->size);
-}
-
-/*-----------------------------------------------------------------------
- */
-ulong flash_init (void)
-{
- ulong size = 0;
- int i;
-
- /* Init: no FLASHes known */
- for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* Static FLASH Bank configuration here (only one bank) */
- size = flash_get_size (CFG_FLASH_BASE, &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN || size == 0) {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size, size >> 20);
- }
-
- /*
- * protect monitor and environment sectors
- */
- flash_protect (FLAG_PROTECT_SET,
- CFG_FLASH_BASE,
- CFG_FLASH_BASE + monitor_flash_len - 1,
- &flash_info[0]);
-
- flash_protect (FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0]);
-
- return size;
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t * info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD:
- printf ("AMD ");
- break;
- case FLASH_MAN_FUJ:
- printf ("Fujitsu ");
- break;
- default:
- printf ("Unknown Vendor ");
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AMDL323B:
- printf ("29DL323B (32 M, bottom sector)\n");
- break;
- case (FLASH_AM160LV | FLASH_AM160B):
- printf ("29LV160BE (1M x 16, bottom sector)\n");
- break;
- default:
- printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
- printf (" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; i++) {
- if ((i % 4) == 0)
- printf ("\n ");
- printf (" S%02d @ 0x%08lX%s", i,
- info->start[i], info->protect[i] ? " !" : " ");
- }
- printf ("\n");
- return;
-}
-
-/*-----------------------------------------------------------------------
- */
-int flash_check_protection (flash_info_t * info, int s_first, int s_last)
-{
- int sect, prot = 0;
-
- for (sect = s_first; sect <= s_last; sect++)
- if (info->protect[sect])
- prot++;
- if (prot)
- printf ("- can't erase %d protected sectors\n", prot);
- return prot;
-}
-
-/*-----------------------------------------------------------------------
- */
-int flash_check_erase_amd (ulong start)
-{
- __u16 v1, v2;
-
- v1 = *(volatile __u16 *) (start);
- v2 = *(volatile __u16 *) (start);
-
- if (((v1 ^ v2) & toggling_bits) == toggling_bits) {
- if (((v1 | v2) & DQ5) == DQ5) {
- printf ("[DQ5] ");
- /* OOPS: exceeded timing limits */
-
- v1 = *(volatile __u16 *) (start);
- v2 = *(volatile __u16 *) (start);
-
- if (((v1 ^ v2) & toggling_bits) == toggling_bits) {
-
- printf ("[%s] ",
- ((toggling_bits & (DQ2 | DQ6)) ==
- (DQ2 | DQ6)) ? "DQ2,DQ6" : "DQ6");
-
- /* OOPS: there is an erasure in progress,
- * try to reset chip */
- *(volatile __u16 *) (start) =
- (__u16) RESET_CMD;
-
- return 1; /* still busy */
- }
- }
- return 1; /* still busy */
- }
- return 0; /* be free */
-}
-
-/*-----------------------------------------------------------------------
- */
-int flash_erase (flash_info_t * info, int s_first, int s_last)
-{
- int flag, sect, setup_offset = 0;
- int rc = ERR_OK;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- return ERR_UNKNOWN_FLASH_TYPE;
- }
-
- if ((s_first < 0) || (s_first > s_last)) {
- printf ("- no sectors to erase\n");
- return ERR_INVAL;
- }
-
- if (flash_check_protection (info, s_first, s_last))
- return ERR_PROTECTED;
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_FUJ:
- case FLASH_MAN_AMD:
- switch (info->flash_id & FLASH_TYPEMASK) {
- case (FLASH_AM160LV | FLASH_AM160B):
- setup_offset = UNLOCK_ADDR1; /* just the adress for setup_cmd differs */
- case FLASH_AMDL323B:
- /*
- * Disable interrupts which might cause a timeout
- * here. Remember that our exception vectors are
- * at address 0 in the flash, and we don't want a
- * (ticker) exception to happen while the flash
- * chip is in programming mode.
- */
- flag = disable_interrupts ();
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect <= s_last && !ctrlc ();
- sect++) {
- printf ("Erasing sector %2d ... ", sect);
-
- if (info->protect[sect] == 0) {
- /* not protected */
- /* Write sector erase command sequence */
- WRITE_UNLOCK (info->start[0]);
- *(volatile __u16 *) (info->start[0] +
- setup_offset) =
- (__u16) SETUP_CMD;
- WRITE_UNLOCK (info->start[0]);
- *(volatile __u16 *) (info->
- start[sect]) =
- (__u16) SECERASE_CMD;
-
- /* wait some time */
- reset_timer_masked ();
- while (get_timer_masked () < 1000) {
- }
-
- /* arm simple, non interrupt dependent timer */
- reset_timer_masked ();
- while (flash_check_erase_amd (info->start[sect])) {
- if (get_timer_masked () > CFG_FLASH_ERASE_TOUT) {
- printf ("timeout!\n");
- /* OOPS: reach timeout,
- * try to reset chip
- */
- *(volatile __u16 *) (info-> start[sect]) = (__u16) RESET_CMD;
- rc = ERR_TIMOUT;
- goto outahere_323B;
- }
- }
- printf ("ok.\n");
- } else {
- printf ("protected!\n");
- }
- }
- if (ctrlc ())
- printf ("User Interrupt!\n");
-outahere_323B:
- /* allow flash to settle - wait 10 ms */
- udelay_masked (10000);
- if (flag)
- enable_interrupts ();
- return rc;
- default:
- printf ("- unknown chip type\n");
- return ERR_UNKNOWN_FLASH_TYPE;
- }
- break;
- default:
- printf ("- unknown vendor ");
- return ERR_UNKNOWN_FLASH_VENDOR;
- }
-}
-
-/*-----------------------------------------------------------------------
- */
-int flash_check_write_amd (ulong dest)
-{
- __u16 v1, v2;
-
- v1 = *(volatile __u16 *) (dest);
- v2 = *(volatile __u16 *) (dest);
-
- /* DQ6 toggles during write */
- if (((v1 ^ v2) & DQ6) == DQ6) {
- if (((v1 | v2) & DQ5) == DQ5) {
- printf ("[DQ5] @ %08lX\n", dest);
-
- /* OOPS: exceeded timing limits,
- * try to reset chip */
- *(volatile __u16 *) (dest) = (__u16) RESET_CMD;
- return 0; /* be free */
- }
- return 1; /* still busy */
- }
-
- return 0; /* be free */
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash
- */
-static int write_word (flash_info_t * info, ulong dest, ushort data)
-{
- int rc = ERR_OK;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*(__u16 *) (dest) & data) != data)
- return ERR_NOT_ERASED;
-
- /*
- * Disable interrupts which might cause a timeout
- * here. Remember that our exception vectors are
- * at address 0 in the flash, and we don't want a
- * (ticker) exception to happen while the flash
- * chip is in programming mode.
- */
- flag = disable_interrupts ();
-
- /* Write program command sequence */
- WRITE_UNLOCK (info->start[0]);
-
- /* Flash dependend program seqence */
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_FUJ:
- case FLASH_MAN_AMD:
- switch (info->flash_id & FLASH_TYPEMASK) {
- case (FLASH_AM160LV | FLASH_AM160B):
- *(volatile __u16 *) (info->start[0] + UNLOCK_ADDR1) =
- (__u16) PROG_CMD;
- *(volatile __u16 *) (dest) = (__u16) data;
- break;
- case FLASH_AMDL323B:
- *(volatile __u16 *) (dest) = (__u16) PROG_CMD;
- *(volatile __u16 *) (dest) = (__u16) data;
- break;
- }
- }
-
- /* arm simple, non interrupt dependent timer */
- reset_timer_masked ();
-
- while (flash_check_write_amd (dest)) {
- if (get_timer_masked () > CFG_FLASH_WRITE_TOUT) {
- printf ("timeout! @ %08lX\n", dest);
- /* OOPS: reach timeout,
- * try to reset chip */
- *(volatile __u16 *) (dest) = (__u16) RESET_CMD;
-
- rc = ERR_TIMOUT;
- goto outahere_323B;
- }
- }
-
- /* Check if Flash was (accurately) written */
- if (*(__u16 *) (dest) != data)
- rc = ERR_PROG_ERROR;
-
-outahere_323B:
- if (flag)
- enable_interrupts ();
- return rc;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash.
- */
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- ulong cp, wp;
- ushort data;
- int l;
- int i, rc;
-
- wp = (addr & ~1); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i = 0, cp = wp; i < l; ++i, ++cp) {
- data = (data >> 8) | (*(uchar *) cp << 8);
- }
- for (; i < 2 && cnt > 0; ++i) {
- data = (data >> 8) | (*src++ << 8);
- --cnt;
- ++cp;
- }
- for (; cnt == 0 && i < 2; ++i, ++cp) {
- data = (data >> 8) | (*(uchar *) cp << 8);
- }
-
- if ((rc = write_word (info, wp, data)) != 0) {
- return (rc);
- }
- wp += 2;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 2) {
- data = *((ushort *) src);
- if ((rc = write_word (info, wp, data)) != 0)
- return (rc);
- src += 2;
- wp += 2;
- cnt -= 2;
- }
-
- if (cnt == 0)
- return ERR_OK;
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i = 0, cp = wp; i < 2 && cnt > 0; ++i, ++cp) {
- data = (data >> 8) | (*src++ << 8);
- --cnt;
- }
- for (; i < 2; ++i, ++cp) {
- data = (data >> 8) | (*(uchar *) cp << 8);
- }
-
- return write_word (info, wp, data);
-}
diff --git a/board/modnet50/lowlevel_init.S b/board/modnet50/lowlevel_init.S
deleted file mode 100644
index c98c155458..0000000000
--- a/board/modnet50/lowlevel_init.S
+++ /dev/null
@@ -1,204 +0,0 @@
-/*
- * Memory Setup stuff - taken from Linux
- *
- * Copyright (c) 2002 Stephan Linz <linz@mazet.de>, <linz@li-pro.net>
- * (c) 2004 IMMS gGmbH <www.imms.de>, Thomas Elste <info@elste.org>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-
-#include <config.h>
-#include <version.h>
-#include <asm/arch/netarm_registers.h>
-
-
-/* some parameters for the board */
-#define FLASH_90ns_WAIT_STATES ((NETARM_PLL_COUNT_VAL + 2) / 3)
-#define FLASH_70ns_WAIT_STATES 4
-
-#define NETARM_MMAP_CS0_BASE (PHYS_FLASH_1)
-#if 1
-#define NETARM_MMAP_CS0_MASK (~(PHYS_FLASH_1_SIZE - 1))
-#else
-#define NETARM_MMAP_CS0_MASK (~(1000000 - 1))
-#endif
-#define NETARM_MMAP_CS1_BASE (PHYS_SDRAM_1)
-#define NETARM_MMAP_CS1_MASK (~(PHYS_SDRAM_1_SIZE - 1))
-#define NETARM_MMAP_CS2_BASE (PHYS_SDRAM_2)
-#define NETARM_MMAP_CS2_MASK (~(PHYS_SDRAM_2_SIZE - 1))
-#if defined(CONFIG_NETARM_EEPROM) && defined(PHYS_NVRAM_1) && defined(PHYS_NVRAM_SIZE)
-#define NETARM_MMAP_CS3_BASE (PHYS_NVRAM_1)
-#define NETARM_MMAP_CS3_MASK (~(PHYS_NVRAM_SIZE - 1))
-#endif
-#define NETARM_MMAP_CS4_BASE (PHYS_EXT_1)
-#define NETARM_MMAP_CS4_MASK (~(PHYS_EXT_SIZE - 1))
-
-/* setting up the memory */
-.globl lowlevel_init
-lowlevel_init:
-
-#if defined(CONFIG_MODNET50)
- ldr pc, =(_jump_to_high + NETARM_MMAP_CS0_BASE - TEXT_BASE)
-
-_jump_to_high:
- /*
- * MEM Config Reg
- * ---------------------------------------------------
- */
- ldr r0, =NETARM_MEM_MODULE_BASE
- ldr r1, =( NETARM_MEM_REFR_PERIOD_USEC(16) | \
- NETARM_MEM_CFG_REFRESH_EN | \
- NETARM_MEM_CFG_REFR_CYCLE_5CLKS )
- str r1, [r0, #+NETARM_MEM_MODULE_CONFIG]
-
-
-memsetup_cs0:
- /*
- * Base Addr / Option Reg 0 (Flash)
- * ---------------------------------------------------
- */
- ldr r1, =( NETARM_MEM_BAR_BASE(NETARM_MMAP_CS0_BASE) | \
- NETARM_MEM_BAR_DRAM_FP | \
- NETARM_MEM_BAR_DRAM_MUX_INT | \
- NETARM_MEM_BAR_DRAM_MUX_BAL | \
- NETARM_MEM_BAR_VALID )
- str r1, [r0, #+NETARM_MEM_CS0_BASE_ADDR]
-
- /* trust that the bus size for flash was strapped correctly */
- /* this saves the bus width in r2 and then ORs it back in */
- /* it's pretty safe assumption, otherwise it wouldn't boot */
- ldr r2, [r0, #+NETARM_MEM_CS0_OPTIONS]
- and r2, r2, #NETARM_MEM_OPT_BUS_SIZE_MASK
-
-/* just a test: assume 32 bit flash mem */
-/* mov r2, #NETARM_MEM_OPT_32BIT */
-
- ldr r1, =( NETARM_MEM_OPT_BASE_USE(NETARM_MMAP_CS0_MASK) | \
- NETARM_MEM_OPT_WAIT_STATES(FLASH_70ns_WAIT_STATES) | \
- NETARM_MEM_OPT_BCYC_4 | \
- NETARM_MEM_OPT_BSIZE_16 | \
- NETARM_MEM_OPT_16BIT | \
- NETARM_MEM_OPT_READ_ASYNC | \
- NETARM_MEM_OPT_WRITE_ASYNC )
-
- orr r1, r1, r2
- str r1, [r0, #+NETARM_MEM_CS0_OPTIONS]
-
-
-memsetup_cs1:
- /*
- * Base Addr / Option Reg 1 (DRAM #1)
- * ---------------------------------------------------
- */
-#ifdef CONFIG_NETARM_NET40_REV2
- /* we have to config SDRAM in burst mode */
- ldr r1, =( NETARM_MEM_OPT_BASE_USE(NETARM_MMAP_CS1_MASK) | \
- NETARM_MEM_OPT_BCYC_2 | \
- NETARM_MEM_OPT_BSIZE_16 | \
- NETARM_MEM_OPT_WAIT_STATES(0) | \
- NETARM_MEM_OPT_32BIT | \
- NETARM_MEM_OPT_READ_ASYNC | \
- NETARM_MEM_OPT_WRITE_ASYNC )
- str r1, [r0, #+NETARM_MEM_CS1_OPTIONS]
-
- ldr r1, =( NETARM_MEM_BAR_BASE(NETARM_MMAP_CS1_BASE) | \
- NETARM_MEM_BAR_DRAM_SYNC | \
- NETARM_MEM_BAR_DRAM_MUX_INT | \
- NETARM_MEM_BAR_DRAM_MUX_UNBAL | \
- NETARM_MEM_BAR_DRAM_SEL | \
- NETARM_MEM_BAR_BURST_EN | \
- NETARM_MEM_BAR_VALID )
- str r1, [r0, #+NETARM_MEM_CS1_BASE_ADDR]
-#else
- /* we have to config FPDRAM in burst mode with smaller burst access size */
- ldr r1, =( NETARM_MEM_OPT_BASE_USE(NETARM_MMAP_CS1_MASK) | \
- NETARM_MEM_OPT_BCYC_2 | \
- NETARM_MEM_OPT_BSIZE_16 | \
- NETARM_MEM_OPT_WAIT_STATES(0) | \
- NETARM_MEM_OPT_32BIT | \
- NETARM_MEM_OPT_READ_ASYNC | \
- NETARM_MEM_OPT_WRITE_ASYNC )
- str r1, [r0, #+NETARM_MEM_CS1_OPTIONS]
-
- ldr r1, =( NETARM_MEM_BAR_BASE(NETARM_MMAP_CS1_BASE) | \
- NETARM_MEM_BAR_DRAM_SYNC | \
- NETARM_MEM_BAR_DRAM_MUX_INT | \
- NETARM_MEM_BAR_DRAM_MUX_UNBAL | \
- NETARM_MEM_BAR_DRAM_SEL | \
- NETARM_MEM_BAR_BURST_EN | \
- NETARM_MEM_BAR_VALID )
- str r1, [r0, #+NETARM_MEM_CS1_BASE_ADDR]
-
-#endif /* CONFIG_NETARM_NET40_REV2 */
-
-
-memsetup_cs3:
- /*
- * Base Addr / Option Reg 3 (EEPROM, NVRAM)
- * ---------------------------------------------------
- */
-#if defined(CONFIG_NETARM_EEPROM) && defined(PHYS_NVRAM_1) && defined(PHYS_NVRAM_SIZE)
- ldr r1, =( NETARM_MEM_OPT_BASE_USE(NETARM_MMAP_CS3_MASK) | \
- NETARM_MEM_OPT_BCYC_3 | \
- NETARM_MEM_OPT_BSIZE_2 | \
- NETARM_MEM_OPT_WAIT_STATES(10) | \
- NETARM_MEM_OPT_8BIT | \
- NETARM_MEM_OPT_READ_ASYNC | \
- NETARM_MEM_OPT_WRITE_ASYNC )
- str r1, [r0, #+NETARM_MEM_CS3_OPTIONS]
-
- ldr r1, =( NETARM_MEM_BAR_BASE(NETARM_MMAP_CS3_BASE) | \
- NETARM_MEM_BAR_DRAM_FP | \
- NETARM_MEM_BAR_DRAM_MUX_INT | \
- NETARM_MEM_BAR_DRAM_MUX_BAL | \
- NETARM_MEM_BAR_VALID )
- str r1, [r0, #+NETARM_MEM_CS3_BASE_ADDR]
-#else
- /* we don't need EEPROM --> no config */
- ldr r1, =( 0 )
- str r1, [r0, #+NETARM_MEM_CS3_OPTIONS]
-
- ldr r1, =( 0 )
- str r1, [r0, #+NETARM_MEM_CS3_BASE_ADDR]
-#endif
-
-
-#else
-/*
-#error "missing CONFIG_MODNET50 (see your config.h)"
-*/
-#endif /* CONFIG_MODNET50 */
-
-
-lowlevel_init_end:
- /*
- * manipulate address in lr and ip to match new
- * address space
- */
- ldr r3, =(NETARM_MMAP_CS0_BASE)
- mov r0, lr
- add r0, r3, r0
- mov lr, r0
- mov r0, ip
- add r0, r3, r0
- mov ip, r0
-
- /* everything is fine now */
- mov pc, lr
diff --git a/board/modnet50/modnet50.c b/board/modnet50/modnet50.c
deleted file mode 100644
index 448c6233e9..0000000000
--- a/board/modnet50/modnet50.c
+++ /dev/null
@@ -1,52 +0,0 @@
-/*
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-
-/* ------------------------------------------------------------------------- */
-
-
-/*
- * Miscelaneous platform dependent initialisations
- */
-
-int board_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
- /* address for the kernel command line */
- gd->bd->bi_boot_params = 0x800;
- return 0;
-}
-
-int dram_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
- if (CONFIG_NR_DRAM_BANKS == 2) {
- gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
- gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
- }
- return (0);
-}
diff --git a/board/modnet50/u-boot.lds b/board/modnet50/u-boot.lds
deleted file mode 100644
index 5b70a40aab..0000000000
--- a/board/modnet50/u-boot.lds
+++ /dev/null
@@ -1,69 +0,0 @@
-/*
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-ENTRY(_start)
-SECTIONS
-{
- . = 0x00000000;
-
- . = ALIGN(4);
- .text :
- {
- cpu/arm720t/start.o (.text)
- *(.text)
- }
-
- . = ALIGN(4);
- .rodata : { *(.rodata) }
-
- . = ALIGN(4);
- .data : { *(.data) }
-
- . = ALIGN(4);
- .got : { *(.got) }
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = ALIGN(4);
- __bss_start = .;
- .bss : { *(.bss) }
- _end = .;
- /* Stabs debugging sections. */
- .stab 0 : { *(.stab) }
- .stabstr 0 : { *(.stabstr) }
- .stab.excl 0 : { *(.stab.excl) }
- .stab.exclstr 0 : { *(.stab.exclstr) }
- .stab.index 0 : { *(.stab.index) }
- .stab.indexstr 0 : { *(.stab.indexstr) }
- .comment 0 : { *(.comment) }
- .debug_abbrev 0 : { *(.debug_abbrev) }
- .debug_info 0 : { *(.debug_info) }
- .debug_line 0 : { *(.debug_line) }
- .debug_pubnames 0 : { *(.debug_pubnames) }
- .debug_aranges 0 : { *(.debug_aranges) }
-}
diff --git a/board/mousse/Makefile b/board/mousse/Makefile
deleted file mode 100644
index ddc5546e7f..0000000000
--- a/board/mousse/Makefile
+++ /dev/null
@@ -1,41 +0,0 @@
-
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o m48t59y.o pci.o flash.o
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/mousse/README b/board/mousse/README
deleted file mode 100644
index d5dda7a8e7..0000000000
--- a/board/mousse/README
+++ /dev/null
@@ -1,346 +0,0 @@
-
-U-Boot for MOUSSE/MPC8240 (KAHLUA)
-----------------------------------
-James Dougherty (jfd@broadcom.com), 09/10/01
-
-The Broadcom/Vooha Mousse board is a 3U Compact PCI system board
-which uses the MPC8240, a 64MB SDRAM SIMM, and has onboard
-DEC 21143, NS16550 UART, an SGS M48T59Y TOD, and 4MB FLASH.
-See also: http://www.vooha.com/
-
-* NVRAM setenv/printenv/savenv supported.
-* Date Command
-* Serial Console support
-* Network support
-* FLASH of kernel images is supported.
-* FLASH of U-Boot to onboard and PLCC boot region.
-* Kernel command line options from NVRAM is supported.
-* IP PNP options supported.
-
-U-Boot Loading...
-
-
-U-Boot 1.0.5 (Sep 10 2001 - 00:22:25)
-
-CPU: MPC8240 Revision 1.1 at 198 MHz: 16 kB I-Cache 16 kB D-Cache
-Board: MOUSSE MPC8240/KAHLUA - CHRP (MAP B)
-Built: Sep 10 2001 at 01:01:50
-MPLD: Revision 127
-Local Bus: 33 MHz
-RTC: M48T589 TOD/NVRAM (8176) bytes
- Current date/time: 9/10/2001 0:18:52
-DRAM: 64 MB
-FLASH: 1.960 MB
-PCI: scanning bus0 ...
- bus dev fn venID devID class rev MBAR0 MBAR1 IPIN ILINE
- 00 00 00 1057 0003 060000 11 00000008 00000000 01 00
- 00 0d 00 1011 0019 020000 41 80000001 80000000 01 01
- 00 0e 00 105a 4d38 018000 01 a0000001 a0001001 01 03
-In: serial
-Out: serial
-Err: serial
-
-Hit any key to stop autoboot: 0
-=>
-
-I. Root FileSystem/IP Configuration
-
-bootcmd=tftp 100000 vmlinux.img;bootm
-bootdelay=3
-baudrate=9600
-ipaddr=<IP ADDRESS>
-netmask=<NETMASK>
-hostname=<NAME>
-serverip=<NFS SERVER IP ADDRESS>
-ethaddr=00:00:10:20:30:44
-nfsroot=<NFS SERVER IP ADDRESS>:/boot/root-fs
-gateway=<IP ADDRESS>
-root=/dev/nfs
-stdin=serial
-stdout=serial
-stderr=serial
-
-NVRAM environment variables.
-
-use the command:
-
-setenv <attribute> <value>
-
-type "saveenv" to write to NVRAM.
-
-
-II. To boot from a hard drive:
-
-setenv root /dev/hda1
-
-
-III. IP options which configure the network:
-
-ipaddr=<IP ADDRESS OF MACHINE>
-netmask=<NETMASK>
-hostname=mousse
-ethaddr=00:00:10:20:30:44
-gateway=<IP ADDRESS OF GATEWAY/ROUTER>
-
-
-IV. IP Options which configure NFS Root/Boot Support
-
-root=/dev/nfs
-serverip=<NFS SERVER IP ADDRESS>
-nfsroot=<NFS SERVER IP ADDRESS>:/boot/root-fs
-
-V. U-Boot Image Support
-
-The U-Boot boot loader assumes that after you build
-your kernel (vmlinux), you will create a U-Boot image
-using the following commands or script:
-
-#!/bin/csh
-/bin/touch vmlinux.img
-/bin/rm vmlinux.img
-set path=($TOOLBASE/bin $path)
-set path=($U_BOOT/tools $path)
-powerpc-linux-objcopy -S -O binary vmlinux vmlinux.bin
-gzip -vf vmlinux.bin
-mkimage -A ppc -O linux -T kernel -C gzip -a 0 -e 0 -n vmlinux.bin.gz -d vmlinux.bin.gz vmlinux.img
-ls -l vmlinux.img
-
-
-VI. ONBOARD FLASH Support
-
-FLASH support is provided for the onboard FLASH chip Bootrom area.
-U-Boot is loaded into either the ROM boot region of the FLASH chip,
-after first being boot-strapped from a pre-progammed AMD29F040 PLCC
-bootrom. The PLCC needs to be programmed with a ROM burner using
-AMD 29F040 ROM parts and the u-boot.bin or u-boot.hex (S-Record)
-images.
-
-The PLCC overlays this same region of flash as the onboard FLASH,
-the jumper J100 is a chip-select for which flash chip you want to
-progam. When jumper J100 is connected to pins 2-3, you boot from
-PLCC FLASH.
-
-To bringup a system, simply flash a flash an AMD29F040 PLCC
-bootrom, and put this in the PLCC socket. Move jumper J100 to
-pins 2-3 and boot from the PLCC.
-
-
-Now, while the system is running, move Jumper J100 to
-pins 1-2 and follow the procedure below to FLASH a bootrom
-(u-boot.bin) image into the onboard bootrom region (AMD29LV160DB):
-
-tftp 100000 u-boot.bin
-protect off FFF00000 FFF7FFFF
-erase FFF00000 FFF7FFFF
-cp.b 100000 FFF00000 \${filesize}\
-
-
-Here is an example:
-
-=>tftp 100000 u-boot.bin
-eth_halt
-eth0: DC21143 Ethernet adapter(bus=0, device=13, func=0)
-DEC Ethernet iobase=0x80000000
-ARP broadcast 1
-Filename 'u-boot.bin'.
-Load address: 0x100000
-Loading: #########################
-done
-Bytes transferred = 123220 (1e154 hex)
-eth_halt
-=>protect off FFF00000 FFF7FFFF
-Un-Protected 8 sectors
-=>erase FFF00000 FFF7FFFF
-Erase Flash from 0xfff00000 to 0xfff7ffff
-Erase FLASH[PLCC_BOOT] -8 sectors:........ done
-Erased 8 sectors
-=>cp.b 100000 FFF00000 1e154
-Copy to Flash... FLASH[PLCC_BOOT]:..done
-=>
-
-
-B. FLASH RAMDISK REGION
-
-FLASH support is provided for an Onboard 512K RAMDISK region.
-
-TThe following commands will FLASH a bootrom (u-boot.bin) image
-into the onboard FLASH region (AMD29LV160DB 2MB FLASH):
-
-tftp 100000 u-boot.bin
-protect off FFF80000 FFFFFFFF
-erase FFF80000 FFFFFFFF
-cp.b 100000 FFF80000 \${filesize}\
-
-
-C. FLASH KERNEL REGION (960KB)
-
-FLASH support is provided for the 960KB onboard FLASH1 segment.
-This allows flashing of kernel images which U-Boot can load
-and run (standalone) from the onboard FLASH chip. It also assumes
-
-The following commands will FLASH a kernel image to 0xffe10000
-
-tftp 100000 vmlinux.img
-protect off FFE10000 FFEFFFFF
-erase FFE10000 FFEFFFFF
-cp.b 100000 FFE10000 \${filesize}\
-reset
-
-Here is an example:
-
-
-=>tftp 100000 vmlinux.img
-eth_halt
-eth0: DC21143 Ethernet adapter(bus=0, device=13, func=0)
-DEC Ethernet iobase=0x80000000
-ARP broadcast 1
-TFTP from server 209.128.93.133; our IP address is 209.128.93.138
-Filename 'vmlinux.img'.
-Load address: 0x100000
-Loading: #####################################################################################################################################################
-done
-Bytes transferred = 760231 (b99a7 hex)
-eth_halt
-=>protect off FFE10000 FFEFFFFF
-Un-Protected 15 sectors
-=>erase FFE10000 FFEFFFFF
-Erase Flash from 0xffe10000 to 0xffefffff
-Erase FLASH[F0_SA3(KERNEL)] -15 sectors:............... done
-Erased 15 sectors
-=>cp.b 100000 FFE10000 b99a7
-Copy to Flash... FLASH[F0_SA3(KERNEL)]:............done
-=>
-
-
-When finished, use the command:
-
-bootm ffe10000
-
-to start the kernel.
-
-Finally, to make this the default boot command, use
-the following commands:
-
-setenv bootcmd bootm ffe10000
-savenv
-
-to make it automatically boot the kernel from FLASH.
-
-
-To go back to development mode (NFS boot)
-
-setenv bootcmd tftp 100000 vmlinux.img\;bootm
-savenv
-
-
-=>tftp 100000 vmlinux.img
-eth0: DC21143 Ethernet adapter(bus=0, device=13, func=0)
-DEC Ethernet iobase=0x80000000
-ARP broadcast 1
-Filename 'vmlinux.img'.
-Load address: 0x100000
-Loading: ####################################################################################################################################################
-done
-Bytes transferred = 752717 (b7c4d hex)
-eth_halt
-=>protect off FFE10000 FFEFFFFF
-Un-Protected 15 sectors
-=>erase FFE10000 FFEFFFFF
-Erase Flash from 0xffe10000 to 0xffefffff
-Erase FLASH[F0_SA3(KERNEL)] -15 sectors:............... done
-Erased 15 sectors
-=>cp.b 100000 FFE10000 b7c4d
-Copy to Flash... FLASH[F0_SA3(KERNEL)]:............done
-=>bootm ffe10000
-## Booting image at ffe10000 ...
- Image Name: vmlinux.bin.gz
- Image Type: PowerPC Linux Kernel Image (gzip compressed)
- Data Size: 752653 Bytes = 735 kB = 0 MB
- Load Address: 00000000
- Entry Point: 00000000
- Verifying Checksum ... OK
- Uncompressing Kernel Image ... OK
-Total memory = 64MB; using 0kB for hash table (at 00000000)
-Linux version 2.4.2_hhl20 (jfd@atlantis) (gcc version 2.95.2 19991024 (release)) #597 Wed Sep 5 23:23:23 PDT 2001
-cpu0: MPC8240/KAHLUA : MOUSSE Platform : 64MB RAM: MPLD Rev. 7f
-Sandpoint port (C) 2000, 2001 MontaVista Software, Inc. (source@mvista.com)
-IP PNP: 802.3 Ethernet Address=<0:0:10:20:30:44>
-NOTICE: mounting root file system via NFS
-On node 0 totalpages: 16384
-zone(0): 16384 pages.
-zone(1): 0 pages.
-zone(2): 0 pages.
-time_init: decrementer frequency = 16.665914 MHz
-time_init: MPC8240 PCI Bus frequency = 33.331828 MHz
-Calibrating delay loop... 133.12 BogoMIPS
-Memory: 62436k available (1336k kernel code, 500k data, 88k init, 0k highmem)
-Dentry-cache hash table entries: 8192 (order: 4, 65536 bytes)
-Buffer-cache hash table entries: 4096 (order: 2, 16384 bytes)
-Page-cache hash table entries: 16384 (order: 4, 65536 bytes)
-Inode-cache hash table entries: 4096 (order: 3, 32768 bytes)
-POSIX conformance testing by UNIFIX
-PCI: Probing PCI hardware
-Linux NET4.0 for Linux 2.4
-Based upon Swansea University Computer Society NET3.039
-Initializing RT netlink socket
-Starting kswapd v1.8
-pty: 256 Unix98 ptys configured
-block: queued sectors max/low 41394kB/13798kB, 128 slots per queue
-Uniform Multi-Platform E-IDE driver Revision: 6.31
-ide: Assuming 33MHz system bus speed for PIO modes; override with idebus=xx
-PDC20262: IDE controller on PCI bus 00 dev 70
-PDC20262: chipset revision 1
-PDC20262: not 100% native mode: will probe irqs later
-PDC20262: ROM enabled at 0x000d0000
-PDC20262: (U)DMA Burst Bit DISABLED Primary PCI Mode Secondary PCI Mode.
-PDC20262: FORCING BURST BIT 0x00 -> 0x01 ACTIVE
-PDC20262: irq=3 dev->irq=3
- ide0: BM-DMA at 0xbfff00-0xbfff07, BIOS settings: hda:DMA, hdb:DMA
- ide1: BM-DMA at 0xbfff08-0xbfff0f, BIOS settings: hdc:pio, hdd:pio
-hda: WDC WD300AB-00BVA0, ATA DISK drive
-hdc: SONY CD-RW CRX160E, ATAPI CD/DVD-ROM drive
-ide0 at 0xbfff78-0xbfff7f,0xbfff76 on irq 3
-ide1 at 0xbfff68-0xbfff6f,0xbfff66 on irq 3
-hda: 58633344 sectors (30020 MB) w/2048KiB Cache, CHS=58168/16/63, UDMA(66)
-hdc: ATAPI 32X CD-ROM CD-R/RW drive, 4096kB Cache
-Uniform CD-ROM driver Revision: 3.12
-Partition check:
- /dev/ide/host0/bus0/target0/lun0: p1 p2
-hd: unable to get major 3 for hard disk
-udf: registering filesystem
-loop: loaded (max 8 devices)
-Serial driver version 5.02 (2000-08-09) with MANY_PORTS SHARE_IRQ SERIAL_PCI enabled
-ttyS00 at 0xffe08080 (irq = 4) is a ST16650
-Linux Tulip driver version 0.9.13a (January 20, 2001)
-eth0: Digital DS21143 Tulip rev 65 at 0xbfff80, EEPROM not present, 00:00:10:20:30:44, IRQ 1.
-eth0: MII transceiver #0 config 3000 status 7829 advertising 01e1.
-NET4: Linux TCP/IP 1.0 for NET4.0
-IP Protocols: ICMP, UDP, TCP
-IP: routing cache hash table of 512 buckets, 4Kbytes
-TCP: Hash tables configured (established 4096 bind 4096)
-NET4: Unix domain sockets 1.0/SMP for Linux NET4.0.
-devfs: v0.102 (20000622) Richard Gooch (rgooch@atnf.csiro.au)
-devfs: boot_options: 0x0
-VFS: Mounted root (nfs filesystem).
-Mounted devfs on /dev
-Freeing unused kernel memory: 88k init 4k openfirmware
-eth0: Setting full-duplex based on MII#0 link partner capability of 45e1.
-INIT: version 2.78 booting
-INIT: Entering runlevel: 2
-
-
-Welcome to Linux/PPC
-MPC8240/MOUSSE
-
-
-mousse login: root
-Password:
-PAM_unix[13]: (login) session opened for user root by LOGIN(uid=0)
-Last login: Thu Sep 6 00:16:51 2001 on console
-
-
-Welcome to Linux/PPC
-MPC8240/MOUSSE
-
-
-mousse#
diff --git a/board/mousse/config.mk b/board/mousse/config.mk
deleted file mode 100644
index 64cffa4ee2..0000000000
--- a/board/mousse/config.mk
+++ /dev/null
@@ -1,28 +0,0 @@
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# MOUSSE boards
-#
-TEXT_BASE = 0xFFF00000
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE)
diff --git a/board/mousse/flash.c b/board/mousse/flash.c
deleted file mode 100644
index 2c32b8ffaa..0000000000
--- a/board/mousse/flash.c
+++ /dev/null
@@ -1,939 +0,0 @@
-/*
- * MOUSSE/MPC8240 Board definitions.
- * Flash Routines for MOUSSE onboard AMD29LV106DB devices
- *
- * (C) Copyright 2000
- * Marius Groeger <mgroeger@sysgo.de>
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- *
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 1999, by Curt McDowell, 08-06-99, Broadcom Corp.
- * (C) Copyright 2001, James Dougherty, 07/18/01, Broadcom Corp.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-#include <malloc.h>
-#include "mousse.h"
-#include "flash.h"
-
-int flashLibDebug = 0;
-int flashLibInited = 0;
-
-#define OK 0
-#define ERROR -1
-#define STATUS int
-#define PRINTF if (flashLibDebug) printf
-#if 0
-#define PRIVATE static
-#else
-#define PRIVATE
-#endif
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
-
-#define SLEEP_DELAY 166
-#define FLASH_SECTOR_SIZE (64*1024)
-/***********************************************************************
- *
- * Virtual Flash Devices on Mousse board
- *
- * These must be kept in sync with the definitions in flashLib.h.
- *
- ***********************************************************************/
-
-PRIVATE flash_dev_t flashDev[] = {
- /* Bank 0 sector SA0 (16 kB) */
- { "SA0",FLASH0_BANK, FLASH0_SEG0_START, 1, 14,
- FLASH0_VENDOR_ID, FLASH0_DEVICE_ID
- },
- /* Bank 0 sector SA1 (8 kB) */
- { "SA1", FLASH0_BANK, FLASH0_SEG0_START + 0x4000, 1, 13,
- FLASH0_VENDOR_ID, FLASH0_DEVICE_ID
- },
- /* Bank 0 sector SA2 (8 kB) */
- { "SA2", FLASH0_BANK, FLASH0_SEG0_START + 0x6000, 1, 13,
- FLASH0_VENDOR_ID, FLASH0_DEVICE_ID
- },
- /* Bank 0 sector SA3 is occluded by Mousse I/O devices */
- /* Bank 0 sectors SA4-SA18, after Mousse devices up to PLCC (960 kB) */
- { "KERNEL", FLASH0_BANK, FLASH0_SEG1_START, 15, 16,
- FLASH0_VENDOR_ID, FLASH0_DEVICE_ID
- },
- /* Bank 0 sectors SA19-SA26, jumper can occlude this by PLCC (512 kB) */
- /* This is where the Kahlua boot vector and boot ROM code resides. */
- { "BOOT",FLASH0_BANK, FLASH0_SEG2_START, 8, 16,
- FLASH0_VENDOR_ID, FLASH0_DEVICE_ID
- },
- /* Bank 0 sectors SA27-SA34 (512 kB) */
- { "RAMDISK",FLASH0_BANK, FLASH0_SEG3_START, 8, 16,
- FLASH0_VENDOR_ID, FLASH0_DEVICE_ID
- },
-};
-
-int flashDevCount = (sizeof (flashDev) / sizeof (flashDev[0]));
-
-#define DEV(no) (&flashDev[no])
-#define DEV_NO(dev) ((dev) - flashDev)
-
-/***********************************************************************
- *
- * Private Flash Routines
- *
- ***********************************************************************/
-
-/*
- * The convention is:
- *
- * "addr" is always the PROM raw address, which is the address of an
- * 8-bit quantity for flash 0 and 16-bit quantity for flash 1.
- *
- * "pos" is always a logical byte position from the PROM beginning.
- */
-
-#define FLASH0_ADDR(dev, addr) \
- ((unsigned char *) ((dev)->base + (addr)))
-
-#define FLASH0_WRITE(dev, addr, value) \
- (*FLASH0_ADDR(dev, addr) = (value))
-
-#define FLASH0_READ(dev, addr) \
- (*FLASH0_ADDR(dev, addr))
-
-PRIVATE int flashCheck (flash_dev_t * dev)
-{
- if (!flashLibInited) {
- printf ("flashCheck: flashLib not initialized\n");
- return ERROR;
- }
-
- if (dev < &flashDev[0] || dev >= &flashDev[flashDevCount]) {
- printf ("flashCheck: Bad dev parameter\n");
- return ERROR;
- }
-
- if (!dev->found) {
- printf ("flashCheck: Device %d not available\n", DEV_NO (dev));
- return ERROR;
- }
-
- return OK;
-}
-
-PRIVATE void flashReset (flash_dev_t * dev)
-{
- PRINTF ("flashReset: dev=%d\n", DEV_NO (dev));
-
- if (dev->bank == FLASH0_BANK) {
- FLASH0_WRITE (dev, 0x555, 0xaa);
- FLASH0_WRITE (dev, 0xaaa, 0x55);
- FLASH0_WRITE (dev, 0x555, 0xf0);
- }
-
- udelay (SLEEP_DELAY);
-
- PRINTF ("flashReset: done\n");
-}
-
-PRIVATE int flashProbe (flash_dev_t * dev)
-{
- int rv, deviceID, vendorID;
-
- PRINTF ("flashProbe: dev=%d\n", DEV_NO (dev));
-
- if (dev->bank != FLASH0_BANK) {
- rv = ERROR;
- goto DONE;
- }
-
- FLASH0_WRITE (dev, 0xaaa, 0xaa);
- FLASH0_WRITE (dev, 0x555, 0x55);
- FLASH0_WRITE (dev, 0xaaa, 0x90);
-
- udelay (SLEEP_DELAY);
-
- vendorID = FLASH0_READ (dev, 0);
- deviceID = FLASH0_READ (dev, 2);
-
- FLASH0_WRITE (dev, 0, 0xf0);
-
- PRINTF ("flashProbe: vendor=0x%x device=0x%x\n", vendorID, deviceID);
-
- if (vendorID == dev->vendorID && deviceID == dev->deviceID)
- rv = OK;
- else
- rv = ERROR;
-
- DONE:
- PRINTF ("flashProbe: rv=%d\n", rv);
-
- return rv;
-}
-
-PRIVATE int flashWait (flash_dev_t * dev, int addr, int expect, int erase)
-{
- int rv = ERROR;
- int i, data;
- int polls;
-
-#if 0
- PRINTF ("flashWait: dev=%d addr=0x%x expect=0x%x erase=%d\n",
- DEV_NO (dev), addr, expect, erase);
-#endif
-
- if (dev->bank != FLASH0_BANK) {
- rv = ERROR;
- goto done;
- }
-
- if (erase)
- polls = FLASH_ERASE_SECTOR_TIMEOUT; /* Ticks */
- else
- polls = FLASH_PROGRAM_POLLS; /* Loops */
-
- for (i = 0; i < polls; i++) {
- if (erase)
- udelay (SLEEP_DELAY);
-
- data = FLASH0_READ (dev, addr);
-
- if (((data ^ expect) & 0x80) == 0) {
- rv = OK;
- goto done;
- }
-
- if (data & 0x20) {
- /*
- * If the 0x20 bit has come on, it could actually be because
- * the operation succeeded, so check the done bit again.
- */
-
- data = FLASH0_READ (dev, addr);
-
- if (((data ^ expect) & 0x80) == 0) {
- rv = OK;
- goto done;
- }
-
- printf ("flashWait: Program error (dev: %d, addr: 0x%x)\n",
- DEV_NO (dev), addr);
-
- flashReset (dev);
- rv = ERROR;
- goto done;
- }
- }
-
- printf ("flashWait: Timeout %s (dev: %d, addr: 0x%x)\n",
- erase ? "erasing sector" : "programming byte",
- DEV_NO (dev), addr);
-
- done:
-
-#if 0
- PRINTF ("flashWait: rv=%d\n", rv);
-#endif
-
- return rv;
-}
-
-/***********************************************************************
- *
- * Public Flash Routines
- *
- ***********************************************************************/
-
-STATUS flashLibInit (void)
-{
- int i;
-
- PRINTF ("flashLibInit: devices=%d\n", flashDevCount);
-
- for (i = 0; i < flashDevCount; i++) {
- flash_dev_t *dev = &flashDev[i];
-
- /*
- * For bank 1, probe both without and with byte swappage,
- * so that this module works on both old and new Mousse boards.
- */
-
- flashReset (dev);
-
- if (flashProbe (dev) != ERROR)
- dev->found = 1;
-
- flashReset (dev);
-
- if (flashProbe (dev) != ERROR)
- dev->found = 1;
-
- dev->swap = 0;
-
- if (dev->found) {
- PRINTF ("\n FLASH %s[%d]: iobase=0x%x - %d sectors %d KB",
- flashDev[i].name, i, flashDev[i].base,
- flashDev[i].sectors,
- (flashDev[i].sectors * FLASH_SECTOR_SIZE) / 1024);
-
- }
- }
-
- flashLibInited = 1;
-
- PRINTF ("flashLibInit: done\n");
-
- return OK;
-}
-
-STATUS flashEraseSector (flash_dev_t * dev, int sector)
-{
- int pos, addr;
-
- PRINTF ("flashErasesector: dev=%d sector=%d\n", DEV_NO (dev), sector);
-
- if (flashCheck (dev) == ERROR)
- return ERROR;
-
- if (sector < 0 || sector >= dev->sectors) {
- printf ("flashEraseSector: Sector out of range (dev: %d, sector: %d)\n", DEV_NO (dev), sector);
- return ERROR;
- }
-
- pos = FLASH_SECTOR_POS (dev, sector);
-
- if (dev->bank != FLASH0_BANK) {
- return ERROR;
- }
-
- addr = pos;
-
- FLASH0_WRITE (dev, 0xaaa, 0xaa);
- FLASH0_WRITE (dev, 0x555, 0x55);
- FLASH0_WRITE (dev, 0xaaa, 0x80);
- FLASH0_WRITE (dev, 0xaaa, 0xaa);
- FLASH0_WRITE (dev, 0x555, 0x55);
- FLASH0_WRITE (dev, addr, 0x30);
-
- return flashWait (dev, addr, 0xff, 1);
-}
-
-/*
- * Note: it takes about as long to flash all sectors together with Chip
- * Erase as it does to flash them one at a time (about 30 seconds for 2
- * MB). Also since we want to be able to treat subsets of sectors as if
- * they were complete devices, we don't use Chip Erase.
- */
-
-STATUS flashErase (flash_dev_t * dev)
-{
- int sector;
-
- PRINTF ("flashErase: dev=%d sectors=%d\n", DEV_NO (dev), dev->sectors);
-
- if (flashCheck (dev) == ERROR)
- return ERROR;
-
- for (sector = 0; sector < dev->sectors; sector++) {
- if (flashEraseSector (dev, sector) == ERROR)
- return ERROR;
- }
- return OK;
-}
-
-/*
- * Read and write bytes
- */
-
-STATUS flashRead (flash_dev_t * dev, int pos, char *buf, int len)
-{
- int addr, words;
-
- PRINTF ("flashRead: dev=%d pos=0x%x buf=0x%x len=0x%x\n",
- DEV_NO (dev), pos, (int) buf, len);
-
- if (flashCheck (dev) == ERROR)
- return ERROR;
-
- if (pos < 0 || len < 0 || pos + len > FLASH_MAX_POS (dev)) {
- printf ("flashRead: Position out of range "
- "(dev: %d, pos: 0x%x, len: 0x%x)\n",
- DEV_NO (dev), pos, len);
- return ERROR;
- }
-
- if (len == 0)
- return OK;
-
- if (dev->bank == FLASH0_BANK) {
- addr = pos;
- words = len;
-
- PRINTF ("flashRead: memcpy(0x%x, 0x%x, 0x%x)\n",
- (int) buf, (int) FLASH0_ADDR (dev, pos), len);
-
- memcpy (buf, FLASH0_ADDR (dev, addr), words);
-
- }
- PRINTF ("flashRead: rv=OK\n");
-
- return OK;
-}
-
-STATUS flashWrite (flash_dev_t * dev, int pos, char *buf, int len)
-{
- int addr, words;
-
- PRINTF ("flashWrite: dev=%d pos=0x%x buf=0x%x len=0x%x\n",
- DEV_NO (dev), pos, (int) buf, len);
-
- if (flashCheck (dev) == ERROR)
- return ERROR;
-
- if (pos < 0 || len < 0 || pos + len > FLASH_MAX_POS (dev)) {
- printf ("flashWrite: Position out of range "
- "(dev: %d, pos: 0x%x, len: 0x%x)\n",
- DEV_NO (dev), pos, len);
- return ERROR;
- }
-
- if (len == 0)
- return OK;
-
- if (dev->bank == FLASH0_BANK) {
- unsigned char tmp;
-
- addr = pos;
- words = len;
-
- while (words--) {
- tmp = *buf;
- if (~FLASH0_READ (dev, addr) & tmp) {
- printf ("flashWrite: Attempt to program 0 to 1 "
- "(dev: %d, addr: 0x%x, data: 0x%x)\n",
- DEV_NO (dev), addr, tmp);
- return ERROR;
- }
- FLASH0_WRITE (dev, 0xaaa, 0xaa);
- FLASH0_WRITE (dev, 0x555, 0x55);
- FLASH0_WRITE (dev, 0xaaa, 0xa0);
- FLASH0_WRITE (dev, addr, tmp);
- if (flashWait (dev, addr, tmp, 0) < 0)
- return ERROR;
- buf++;
- addr++;
- }
- }
-
- PRINTF ("flashWrite: rv=OK\n");
-
- return OK;
-}
-
-/*
- * flashWritable returns TRUE if a range contains all F's.
- */
-
-STATUS flashWritable (flash_dev_t * dev, int pos, int len)
-{
- int addr, words;
- int rv = ERROR;
-
- PRINTF ("flashWritable: dev=%d pos=0x%x len=0x%x\n",
- DEV_NO (dev), pos, len);
-
- if (flashCheck (dev) == ERROR)
- goto done;
-
- if (pos < 0 || len < 0 || pos + len > FLASH_MAX_POS (dev)) {
- printf ("flashWritable: Position out of range "
- "(dev: %d, pos: 0x%x, len: 0x%x)\n",
- DEV_NO (dev), pos, len);
- goto done;
- }
-
- if (len == 0) {
- rv = 1;
- goto done;
- }
-
- if (dev->bank == FLASH0_BANK) {
- addr = pos;
- words = len;
-
- while (words--) {
- if (FLASH0_READ (dev, addr) != 0xff) {
- rv = 0;
- goto done;
- }
- addr++;
- }
- }
-
- rv = 1;
-
- done:
- PRINTF ("flashWrite: rv=%d\n", rv);
- return rv;
-}
-
-
-/*
- * NOTE: the below code cannot run from FLASH!!!
- */
-/***********************************************************************
- *
- * Flash Diagnostics
- *
- ***********************************************************************/
-
-STATUS flashDiag (flash_dev_t * dev)
-{
- unsigned int *buf = 0;
- int i, len, sector;
- int rv = ERROR;
-
- if (flashCheck (dev) == ERROR)
- return ERROR;
-
- printf ("flashDiag: Testing device %d, "
- "base: 0x%x, %d sectors @ %d kB = %d kB\n",
- DEV_NO (dev), dev->base,
- dev->sectors,
- 1 << (dev->lgSectorSize - 10),
- dev->sectors << (dev->lgSectorSize - 10));
-
- len = 1 << dev->lgSectorSize;
-
- printf ("flashDiag: Erasing\n");
-
- if (flashErase (dev) == ERROR) {
- printf ("flashDiag: Erase failed\n");
- goto done;
- }
- printf ("%d bytes requested ...\n", len);
- buf = malloc (len);
- printf ("allocated %d bytes ...\n", len);
- if (buf == 0) {
- printf ("flashDiag: Out of memory\n");
- goto done;
- }
-
- /*
- * Write unique counting pattern to each sector
- */
-
- for (sector = 0; sector < dev->sectors; sector++) {
- printf ("flashDiag: Write sector %d\n", sector);
-
- for (i = 0; i < len / 4; i++)
- buf[i] = sector << 24 | i;
-
- if (flashWrite (dev,
- sector << dev->lgSectorSize,
- (char *) buf, len) == ERROR) {
- printf ("flashDiag: Write failed (dev: %d, sector: %d)\n",
- DEV_NO (dev), sector);
- goto done;
- }
- }
-
- /*
- * Verify
- */
-
- for (sector = 0; sector < dev->sectors; sector++) {
- printf ("flashDiag: Verify sector %d\n", sector);
-
- if (flashRead (dev,
- sector << dev->lgSectorSize,
- (char *) buf, len) == ERROR) {
- printf ("flashDiag: Read failed (dev: %d, sector: %d)\n",
- DEV_NO (dev), sector);
- goto done;
- }
-
- for (i = 0; i < len / 4; i++) {
- if (buf[i] != (sector << 24 | i)) {
- printf ("flashDiag: Verify error "
- "(dev: %d, sector: %d, offset: 0x%x)\n",
- DEV_NO (dev), sector, i);
- printf ("flashDiag: Expected 0x%08x, got 0x%08x\n",
- sector << 24 | i, buf[i]);
-
- goto done;
- }
- }
- }
-
- printf ("flashDiag: Erasing\n");
-
- if (flashErase (dev) == ERROR) {
- printf ("flashDiag: Final erase failed\n");
- goto done;
- }
-
- rv = OK;
-
- done:
- if (buf)
- free (buf);
-
- if (rv == OK)
- printf ("flashDiag: Device %d passed\n", DEV_NO (dev));
- else
- printf ("flashDiag: Device %d failed\n", DEV_NO (dev));
-
- return rv;
-}
-
-STATUS flashDiagAll (void)
-{
- int i;
- int rv = OK;
-
- PRINTF ("flashDiagAll: devices=%d\n", flashDevCount);
-
- for (i = 0; i < flashDevCount; i++) {
- flash_dev_t *dev = &flashDev[i];
-
- if (dev->found && flashDiag (dev) == ERROR)
- rv = ERROR;
- }
-
- if (rv == OK)
- printf ("flashDiagAll: Passed\n");
- else
- printf ("flashDiagAll: Failed because of earlier errors\n");
-
- return OK;
-}
-
-
-/*-----------------------------------------------------------------------
- */
-unsigned long flash_init (void)
-{
- unsigned long size = 0;
- flash_dev_t *dev = NULL;
-
- flashLibInit ();
-
- /*
- * Provide info for FLASH (up to 960K) of Kernel Image data.
- */
- dev = FLASH_DEV_BANK0_LOW;
- flash_info[FLASH_BANK_KERNEL].flash_id =
- (dev->vendorID << 16) | dev->deviceID;
- flash_info[FLASH_BANK_KERNEL].sector_count = dev->sectors;
- flash_info[FLASH_BANK_KERNEL].size =
- flash_info[FLASH_BANK_KERNEL].sector_count * FLASH_SECTOR_SIZE;
- flash_info[FLASH_BANK_KERNEL].start[FIRST_SECTOR] = dev->base;
- size += flash_info[FLASH_BANK_KERNEL].size;
-
- /*
- * Provide info for 512K PLCC FLASH ROM (U-Boot)
- */
- dev = FLASH_DEV_BANK0_BOOT;
- flash_info[FLASH_BANK_BOOT].flash_id =
- (dev->vendorID << 16) | dev->deviceID;
- flash_info[FLASH_BANK_BOOT].sector_count = dev->sectors;
- flash_info[FLASH_BANK_BOOT].size =
- flash_info[FLASH_BANK_BOOT].sector_count * FLASH_SECTOR_SIZE;
- flash_info[FLASH_BANK_BOOT].start[FIRST_SECTOR] = dev->base;
- size += flash_info[FLASH_BANK_BOOT].size;
-
-
- /*
- * Provide info for 512K FLASH0 segment (U-Boot)
- */
- dev = FLASH_DEV_BANK0_HIGH;
- flash_info[FLASH_BANK_AUX].flash_id =
- (dev->vendorID << 16) | dev->deviceID;
- flash_info[FLASH_BANK_AUX].sector_count = dev->sectors;
- flash_info[FLASH_BANK_AUX].size =
- flash_info[FLASH_BANK_AUX].sector_count * FLASH_SECTOR_SIZE;
- flash_info[FLASH_BANK_AUX].start[FIRST_SECTOR] = dev->base;
- size += flash_info[FLASH_BANK_AUX].size;
-
-
- return size;
-}
-
-/*
- * Get flash device from U-Boot flash info.
- */
-flash_dev_t *getFlashDevFromInfo (flash_info_t * info)
-{
- int i;
-
- if (!info)
- return NULL;
-
- for (i = 0; i < flashDevCount; i++) {
- flash_dev_t *dev = &flashDev[i];
-
- if (dev->found && (dev->base == info->start[0]))
- return dev;
- }
- printf ("ERROR: notice, no FLASH mapped at address 0x%x\n",
- (unsigned int) info->start[0]);
- return NULL;
-}
-
-ulong flash_get_size (vu_long * addr, flash_info_t * info)
-{
- int i;
-
- for (i = 0; i < flashDevCount; i++) {
- flash_dev_t *dev = &flashDev[i];
-
- if (dev->found) {
- if (dev->base == (unsigned int) addr) {
- info->flash_id = (dev->vendorID << 16) | dev->deviceID;
- info->sector_count = dev->sectors;
- info->size = info->sector_count * FLASH_SECTOR_SIZE;
- return dev->sectors * FLASH_SECTOR_SIZE;
- }
- }
- }
- return 0;
-}
-
-void flash_print_info (flash_info_t * info)
-{
- int i;
- unsigned int chip;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch ((info->flash_id >> 16) & 0xff) {
- case 0x1:
- printf ("AMD ");
- break;
- default:
- printf ("Unknown Vendor ");
- break;
- }
- chip = (unsigned int) info->flash_id & 0x000000ff;
-
- switch (chip) {
-
- case AMD_ID_F040B:
- printf ("AM29F040B (4 Mbit)\n");
- break;
-
- case AMD_ID_LV160B:
- case FLASH_AM160LV:
- case 0x49:
- printf ("AM29LV160B (16 Mbit / 2M x 8bit)\n");
- break;
-
- default:
- printf ("Unknown Chip Type:0x%x\n", chip);
- break;
- }
-
- printf (" Size: %ld bytes in %d Sectors\n",
- info->size, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[FIRST_SECTOR] + i * FLASH_SECTOR_SIZE,
- info->protect[i] ? " (RO)" : " ");
- }
- printf ("\n");
-}
-
-
-/*
- * Erase a range of flash sectors.
- */
-int flash_erase (flash_info_t * info, int s_first, int s_last)
-{
- vu_long *addr = (vu_long *) (info->start[0]);
- int prot, sect, l_sect;
- flash_dev_t *dev = NULL;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- l_sect = -1;
-
- /* Start erase on unprotected sectors */
- dev = getFlashDevFromInfo (info);
- if (dev) {
- printf ("Erase FLASH[%s] -%d sectors:", dev->name, dev->sectors);
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr = (vu_long *) (dev->base);
- /* printf("erase_sector: sector=%d, addr=0x%x\n",
- sect, addr); */
- printf (".");
- if (ERROR == flashEraseSector (dev, sect)) {
- printf ("ERROR: could not erase sector %d on FLASH[%s]\n", sect, dev->name);
- return 1;
- }
- }
- }
- }
- printf (" done\n");
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word (flash_info_t * info, ulong dest, ulong data)
-{
-
- flash_dev_t *dev = getFlashDevFromInfo (info);
- int addr = dest - info->start[0];
-
- if (!dev)
- return 1;
-
- if (OK != flashWrite (dev, addr, (char *) &data, sizeof (ulong))) {
- printf ("ERROR: could not write to addr=0x%x, data=0x%x\n",
- (unsigned int) addr, (unsigned) data);
- return 1;
- }
-
- if ((addr % FLASH_SECTOR_SIZE) == 0)
- printf (".");
-
-
- PRINTF ("write_word:0x%x, base=0x%x, addr=0x%x, data=0x%x\n",
- (unsigned) info->start[0],
- (unsigned) dest,
- (unsigned) (dest - info->start[0]), (unsigned) data);
-
- return (0);
-}
-
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int i, l, rc;
- flash_dev_t *dev = getFlashDevFromInfo (info);
-
- if (dev) {
- printf ("FLASH[%s]:", dev->name);
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i = 0, cp = wp; i < l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
- for (; i < 4 && cnt > 0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt == 0 && i < 4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
- if ((rc = write_word (info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = 0;
- for (i = 0; i < 4; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_word (info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i = 0, cp = wp; i < 4 && cnt > 0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i < 4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
-
- return (write_word (info, wp, data));
- }
- return 1;
-}
-
-/*-----------------------------------------------------------------------
- */
diff --git a/board/mousse/flash.h b/board/mousse/flash.h
deleted file mode 100644
index b7e4619c01..0000000000
--- a/board/mousse/flash.h
+++ /dev/null
@@ -1,78 +0,0 @@
-#ifndef FLASH_LIB_H
-#define FLASH_LIB_H
-
-#include <common.h>
-
-/* PIO operations max */
-#define FLASH_PROGRAM_POLLS 100000
-
-/* 10 Seconds default */
-#define FLASH_ERASE_SECTOR_TIMEOUT (10*1000 /*SEC*/ )
-
-/* Flash device info structure */
-typedef struct flash_dev_s {
- char name[24]; /* Bank Name */
- int bank; /* Bank 0 or 1 */
- unsigned int base; /* Base address */
- int sectors; /* Sector count */
- int lgSectorSize; /* Log2(usable bytes/sector) */
- int vendorID; /* Expected vendor ID */
- int deviceID; /* Expected device ID */
- int found; /* Set if found by flashLibInit */
- int swap; /* Set for bank 1 if byte swap req'd */
-} flash_dev_t;
-
-#define FLASH_MAX_POS(dev) \
- ((dev)->sectors << (dev)->lgSectorSize)
-
-#define FLASH_SECTOR_POS(dev, sector) \
- ((sector) << (dev)->lgSectorSize)
-
-/* AMD 29F040 */
-#define FLASH0_BANK 0
-#define FLASH0_VENDOR_ID 0x01
-#define FLASH0_DEVICE_ID 0x49
-
-/* AMD29LV160DB */
-#define FLASH1_BANK 1
-#define FLASH1_VENDOR_ID 0x0001
-#define FLASH1_DEVICE_ID 0x2249
-
-extern flash_dev_t flashDev[];
-extern int flashDevCount;
-
-/*
- * Device pointers
- *
- * These must be kept in sync with the table in flashLib.c.
- */
-#define FLASH_DEV_BANK0_SA0 (&flashDev[0])
-#define FLASH_DEV_BANK0_SA1 (&flashDev[1])
-#define FLASH_DEV_BANK0_SA2 (&flashDev[2])
-#define FLASH_DEV_BANK0_LOW (&flashDev[3]) /* 960K */
-#define FLASH_DEV_BANK0_BOOT (&flashDev[4]) /* PLCC */
-#define FLASH_DEV_BANK0_HIGH (&flashDev[5]) /* 512K PLCC shadow */
-
-unsigned long flash_init(void);
-int flashEraseSector(flash_dev_t *dev, int sector);
-int flashErase(flash_dev_t *dev);
-int flashRead(flash_dev_t *dev, int pos, char *buf, int len);
-int flashWrite(flash_dev_t *dev, int pos, char *buf, int len);
-int flashWritable(flash_dev_t *dev, int pos, int len);
-int flashDiag(flash_dev_t *dev);
-int flashDiagAll(void);
-
-ulong flash_get_size (vu_long *addr, flash_info_t *info);
-void flash_print_info (flash_info_t *info);
-int flash_erase (flash_info_t *info, int s_first, int s_last);
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt);
-
-/*
- * Flash info indices.
- */
-#define FLASH_BANK_KERNEL 0
-#define FLASH_BANK_BOOT 1
-#define FLASH_BANK_AUX 2
-#define FIRST_SECTOR 0
-
-#endif /* !FLASH_LIB_H */
diff --git a/board/mousse/m48t59y.c b/board/mousse/m48t59y.c
deleted file mode 100644
index 37a6244198..0000000000
--- a/board/mousse/m48t59y.c
+++ /dev/null
@@ -1,322 +0,0 @@
-/*
- * SGS M48-T59Y TOD/NVRAM Driver
- *
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 1999, by Curt McDowell, 08-06-99, Broadcom Corp.
- *
- * (C) Copyright 2001, James Dougherty, 07/18/01, Broadcom Corp.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * SGS M48-T59Y TOD/NVRAM Driver
- *
- * The SGS M48 an 8K NVRAM starting at offset M48_BASE_ADDR and
- * continuing for 8176 bytes. After that starts the Time-Of-Day (TOD)
- * registers which are used to set/get the internal date/time functions.
- *
- * This module implements Y2K compliance by taking full year numbers
- * and translating back and forth from the TOD 2-digit year.
- *
- * NOTE: for proper interaction with an operating system, the TOD should
- * be used to store Universal Coordinated Time (GMT) and timezone
- * conversions should be used.
- *
- * Here is a diagram of the memory layout:
- *
- * +---------------------------------------------+ 0xffe0a000
- * | Non-volatile memory | .
- * | | .
- * | (8176 bytes of Non-volatile memory) | .
- * | | .
- * +---------------------------------------------+ 0xffe0bff0
- * | Flags |
- * +---------------------------------------------+ 0xffe0bff1
- * | Unused |
- * +---------------------------------------------+ 0xffe0bff2
- * | Alarm Seconds |
- * +---------------------------------------------+ 0xffe0bff3
- * | Alarm Minutes |
- * +---------------------------------------------+ 0xffe0bff4
- * | Alarm Date |
- * +---------------------------------------------+ 0xffe0bff5
- * | Interrupts |
- * +---------------------------------------------+ 0xffe0bff6
- * | WatchDog |
- * +---------------------------------------------+ 0xffe0bff7
- * | Calibration |
- * +---------------------------------------------+ 0xffe0bff8
- * | Seconds |
- * +---------------------------------------------+ 0xffe0bff9
- * | Minutes |
- * +---------------------------------------------+ 0xffe0bffa
- * | Hours |
- * +---------------------------------------------+ 0xffe0bffb
- * | Day |
- * +---------------------------------------------+ 0xffe0bffc
- * | Date |
- * +---------------------------------------------+ 0xffe0bffd
- * | Month |
- * +---------------------------------------------+ 0xffe0bffe
- * | Year (2 digits only) |
- * +---------------------------------------------+ 0xffe0bfff
- */
-#include <common.h>
-#include <rtc.h>
-#include "mousse.h"
-
-/*
- * Imported from mousse.h:
- *
- * TOD_REG_BASE Base of m48t59y TOD registers
- * SYS_TOD_UNPROTECT() Disable NVRAM write protect
- * SYS_TOD_PROTECT() Re-enable NVRAM write protect
- */
-
-#define YEAR 0xf
-#define MONTH 0xe
-#define DAY 0xd
-#define DAY_OF_WEEK 0xc
-#define HOUR 0xb
-#define MINUTE 0xa
-#define SECOND 0x9
-#define CONTROL 0x8
-#define WATCH 0x7
-#define INTCTL 0x6
-#define WD_DATE 0x5
-#define WD_HOUR 0x4
-#define WD_MIN 0x3
-#define WD_SEC 0x2
-#define _UNUSED 0x1
-#define FLAGS 0x0
-
-#define M48_ADDR ((volatile unsigned char *) TOD_REG_BASE)
-
-int m48_tod_init(void)
-{
- SYS_TOD_UNPROTECT();
-
- M48_ADDR[CONTROL] = 0;
- M48_ADDR[WATCH] = 0;
- M48_ADDR[INTCTL] = 0;
-
- /*
- * If the oscillator is currently stopped (as on a new part shipped
- * from the factory), start it running.
- *
- * Here is an example of the TOD bytes on a brand new M48T59Y part:
- * 00 00 00 00 00 00 00 00 00 88 8c c3 bf c8 f5 01
- */
-
- if (M48_ADDR[SECOND] & 0x80)
- M48_ADDR[SECOND] = 0;
-
- /* Is battery low */
- if ( M48_ADDR[FLAGS] & 0x10) {
- printf("NOTICE: Battery low on Real-Time Clock (replace SNAPHAT).\n");
- }
-
- SYS_TOD_PROTECT();
-
- return 0;
-}
-
-/*
- * m48_tod_set
- */
-
-static int to_bcd(int value)
-{
- return value / 10 * 16 + value % 10;
-}
-
-static int from_bcd(int value)
-{
- return value / 16 * 10 + value % 16;
-}
-
-static int day_of_week(int y, int m, int d) /* 0-6 ==> Sun-Sat */
-{
- static int t[] = {0, 3, 2, 5, 0, 3, 5, 1, 4, 6, 2, 4};
- y -= m < 3;
- return (y + y/4 - y/100 + y/400 + t[m-1] + d) % 7;
-}
-
-/*
- * Note: the TOD should store the current GMT
- */
-
-int m48_tod_set(int year, /* 1980-2079 */
- int month, /* 01-12 */
- int day, /* 01-31 */
- int hour, /* 00-23 */
- int minute, /* 00-59 */
- int second) /* 00-59 */
-
-{
- SYS_TOD_UNPROTECT();
-
- M48_ADDR[CONTROL] |= 0x80; /* Set WRITE bit */
-
- M48_ADDR[YEAR] = to_bcd(year % 100);
- M48_ADDR[MONTH] = to_bcd(month);
- M48_ADDR[DAY] = to_bcd(day);
- M48_ADDR[DAY_OF_WEEK] = day_of_week(year, month, day) + 1;
- M48_ADDR[HOUR] = to_bcd(hour);
- M48_ADDR[MINUTE] = to_bcd(minute);
- M48_ADDR[SECOND] = to_bcd(second);
-
- M48_ADDR[CONTROL] &= ~0x80; /* Clear WRITE bit */
-
- SYS_TOD_PROTECT();
-
- return 0;
-}
-
-/*
- * Note: the TOD should store the current GMT
- */
-
-int m48_tod_get(int *year, /* 1980-2079 */
- int *month, /* 01-12 */
- int *day, /* 01-31 */
- int *hour, /* 00-23 */
- int *minute, /* 00-59 */
- int *second) /* 00-59 */
-{
- int y;
-
- SYS_TOD_UNPROTECT();
-
- M48_ADDR[CONTROL] |= 0x40; /* Set READ bit */
-
- y = from_bcd(M48_ADDR[YEAR]);
- *year = y < 80 ? 2000 + y : 1900 + y;
- *month = from_bcd(M48_ADDR[MONTH]);
- *day = from_bcd(M48_ADDR[DAY]);
- /* day_of_week = M48_ADDR[DAY_OF_WEEK] & 0xf; */
- *hour = from_bcd(M48_ADDR[HOUR]);
- *minute = from_bcd(M48_ADDR[MINUTE]);
- *second = from_bcd(M48_ADDR[SECOND] & 0x7f);
-
- M48_ADDR[CONTROL] &= ~0x40; /* Clear READ bit */
-
- SYS_TOD_PROTECT();
-
- return 0;
-}
-
-int m48_tod_get_second(void)
-{
- return from_bcd(M48_ADDR[SECOND] & 0x7f);
-}
-
-/*
- * Watchdog function
- *
- * If usec is 0, the watchdog timer is disarmed.
- *
- * If usec is non-zero, the watchdog timer is armed (or re-armed) for
- * approximately usec microseconds (if the exact requested usec is
- * not supported by the chip, the next higher available value is used).
- *
- * Minimum watchdog timeout = 62500 usec
- * Maximum watchdog timeout = 124 sec (124000000 usec)
- */
-
-void m48_watchdog_arm(int usec)
-{
- int mpy, res;
-
- SYS_TOD_UNPROTECT();
-
- if (usec == 0) {
- res = 0;
- mpy = 0;
- } else if (usec < 2000000) { /* Resolution: 1/16s if below 2s */
- res = 0;
- mpy = (usec + 62499) / 62500;
- } else if (usec < 8000000) { /* Resolution: 1/4s if below 8s */
- res = 1;
- mpy = (usec + 249999) / 250000;
- } else if (usec < 32000000) { /* Resolution: 1s if below 32s */
- res = 2;
- mpy = (usec + 999999) / 1000000;
- } else { /* Resolution: 4s up to 124s */
- res = 3;
- mpy = (usec + 3999999) / 4000000;
- if (mpy > 31)
- mpy = 31;
- }
-
- M48_ADDR[WATCH] = (0x80 | /* Steer to RST signal (IRQ = N/C) */
- mpy << 2 |
- res);
-
- SYS_TOD_PROTECT();
-}
-
-/*
- * U-Boot RTC support.
- */
-void
-rtc_get( struct rtc_time *tmp )
-{
- m48_tod_get(&tmp->tm_year,
- &tmp->tm_mon,
- &tmp->tm_mday,
- &tmp->tm_hour,
- &tmp->tm_min,
- &tmp->tm_sec);
- tmp->tm_yday = 0;
- tmp->tm_isdst= 0;
-
-#ifdef RTC_DEBUG
- printf( "Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
- tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
- tmp->tm_hour, tmp->tm_min, tmp->tm_sec );
-#endif
-}
-
-void
-rtc_set( struct rtc_time *tmp )
-{
- m48_tod_set(tmp->tm_year, /* 1980-2079 */
- tmp->tm_mon, /* 01-12 */
- tmp->tm_mday, /* 01-31 */
- tmp->tm_hour, /* 00-23 */
- tmp->tm_min, /* 00-59 */
- tmp->tm_sec); /* 00-59 */
-
-#ifdef RTC_DEBUG
- printf( "Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
- tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
- tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
-#endif
-
-}
-
-void
-rtc_reset (void)
-{
- m48_tod_init();
-}
diff --git a/board/mousse/m48t59y.h b/board/mousse/m48t59y.h
deleted file mode 100644
index 717300d957..0000000000
--- a/board/mousse/m48t59y.h
+++ /dev/null
@@ -1,57 +0,0 @@
-/*
- * SGS M48-T59Y TOD/NVRAM Driver
- *
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 1999, by Curt McDowell, 08-06-99, Broadcom Corp.
- *
- * (C) Copyright 2001, James Dougherty, 07/18/01, Broadcom Corp.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef __M48_T59_Y_H
-#define __M48_T59_Y_H
-
-/*
- * M48 T59Y -Timekeeping Battery backed SRAM.
- */
-
-int m48_tod_init(void);
-
-int m48_tod_set(int year,
- int month,
- int day,
- int hour,
- int minute,
- int second);
-
-int m48_tod_get(int *year,
- int *month,
- int *day,
- int *hour,
- int *minute,
- int *second);
-
-int m48_tod_get_second(void);
-
-void m48_watchdog_arm(int usec);
-
-#endif /*!__M48_T59_Y_H */
diff --git a/board/mousse/mousse.c b/board/mousse/mousse.c
deleted file mode 100644
index 7208a17c1a..0000000000
--- a/board/mousse/mousse.c
+++ /dev/null
@@ -1,86 +0,0 @@
-/*
- * MOUSSE Board Support
- *
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2001
- * James Dougherty, jfd@cs.stanford.edu
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc824x.h>
-#include <asm/processor.h>
-
-#include "mousse.h"
-#include "m48t59y.h"
-#include <pci.h>
-
-
-int checkboard (void)
-{
- ulong busfreq = get_bus_freq (0);
- char buf[32];
-
- puts ("Board: MOUSSE MPC8240/KAHLUA - CHRP (MAP B)\n");
- printf ("Built: %s at %s\n", __DATE__, __TIME__);
- printf ("MPLD: Revision %d\n", SYS_REVID_GET ());
- printf ("Local Bus: %s MHz\n", strmhz (buf, busfreq));
-
- return 0;
-}
-
-int checkflash (void)
-{
- printf ("checkflash\n");
- flash_init ();
- return 0;
-}
-
-long int initdram (int board_type)
-{
- return CFG_RAM_SIZE;
-}
-
-
-void get_tod (void)
-{
- int year, month, day, hour, minute, second;
-
- m48_tod_get (&year, &month, &day, &hour, &minute, &second);
-
- printf (" Current date/time: %d/%d/%d %d:%d:%d \n",
- month, day, year, hour, minute, second);
-
-}
-
-/*
- * EPIC, PCI, and I/O devices.
- * Initialize Mousse Platform, probe for PCI devices,
- * Query configuration parameters if not set.
- */
-int misc_init_f (void)
-{
- m48_tod_init (); /* Init SGS M48T59Y TOD/NVRAM */
- printf ("RTC: M48T589 TOD/NVRAM (%d) bytes\n", TOD_NVRAM_SIZE);
- get_tod ();
- return 0;
-}
diff --git a/board/mousse/mousse.h b/board/mousse/mousse.h
deleted file mode 100644
index 5468314eb7..0000000000
--- a/board/mousse/mousse.h
+++ /dev/null
@@ -1,259 +0,0 @@
-/*
- * MOUSSE/MPC8240 Board definitions.
- * For more info, see http://www.vooha.com/
- *
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2001
- * James Dougherty (jfd@cs.stanford.edu)
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef __MOUSSE_H
-#define __MOUSSE_H
-
-/* System addresses */
-
-#define PCI_SPECIAL_BASE 0xfe000000
-#define PCI_SPECIAL_SIZE 0x01000000
-
-/* PORTX Device Addresses for Mousse */
-
-#define PORTX_DEV_BASE 0xff000000
-#define PORTX_DEV_SIZE 0x01000000
-
-#define ENET_DEV_BASE 0x80000000
-
-#define PLD_REG_BASE (PORTX_DEV_BASE | 0xe09000)
-#define PLD_REG(off) (*(volatile unsigned char *) \
- (PLD_REG_BASE + (off)))
-
-#define PLD_REVID_B1 0x7f
-#define PLD_REVID_B2 0x01
-
-/* MPLD */
-#define SYS_HARD_RESET() { for (;;) PLD_REG(0) = 0; } /* clr 0x80 bit */
-#define SYS_REVID_GET() ((int) PLD_REG(0) & 0x7f)
-#define SYS_LED_OFF() (PLD_REG(1) |= 0x80)
-#define SYS_LED_ON() (PLD_REG(1) &= ~0x80)
-#define SYS_WATCHDOG_IRQ3() (PLD_REG(2) |= 0x80)
-#define SYS_WATCHDOG_RESET() (PLD_REG(2) &= ~0x80)
-#define SYS_TOD_PROTECT() (PLD_REG(3) |= 0x80)
-#define SYS_TOD_UNPROTECT() (PLD_REG(3) &= ~0x80)
-
-/* SGS M48T59Y */
-#define TOD_BASE (PORTX_DEV_BASE | 0xe0a000)
-#define TOD_REG_BASE (TOD_BASE | 0x1ff0)
-#define TOD_NVRAM_BASE TOD_BASE
-#define TOD_NVRAM_SIZE 0x1ff0
-#define TOD_NVRAM_LIMIT (TOD_NVRAM_BASE + TOD_NVRAM_SIZE)
-
-/* NS16552 SIO */
-#define SERIAL_BASE(_x) (PORTX_DEV_BASE | 0xe08000 | ((_x) ? 0 : 0x80))
-#define N_SIO_CHANNELS 2
-#define N_COM_PORTS N_SIO_CHANNELS
-
-/*
- * On-board Dec21143 PCI Ethernet
- * Note: The PCI MBAR chosen here was used from MPC8240UM which states
- * that PCI memory is at: 0x80000 - 0xFDFFFFFF, if AMBOR[CPU_FD_ALIAS]
- * is set, then PCI memory maps 1-1 with this address range in the
- * correct byte order.
- */
-#define PCI_ENET_IOADDR 0x80000000
-#define PCI_ENET_MEMADDR 0x80000000
-
-/*
- * Flash Memory Layout
- *
- * 2 MB Flash Bank 0 runs in 8-bit mode. In Flash Bank 0, the 32 kB
- * sector SA3 is obscured by the 32 kB serial/TOD access space, and
- * the 64 kB sectors SA19-SA26 are obscured by the 512 kB PLCC
- * containing the fixed boot ROM. (If the 512 kB PLCC is
- * deconfigured by jumper, this window to Flash Bank 0 becomes
- * visible, but it still contains the fixed boot code and should be
- * considered read-only). Flash Bank 0 sectors SA0 (16 kB), SA1 (8
- * kB), and SA2 (8 kB) are currently unused.
- *
- * 2 MB Flash Bank 1 runs in 16-bit mode. Flash Bank 1 is fully
- * usable, but it's a 16-bit wide device on a 64-bit bus. Therefore
- * 16-bit words only exist at addresses that are multiples of 8. All
- * PROM data and control addresses must be multiplied by 8.
- *
- * See flashMap.c for description of flash filesystem layout.
- */
-
-/*
- * FLASH memory address space: 8-bit wide FLASH memory spaces.
- */
-#define FLASH0_SEG0_START 0xffe00000 /* Baby 32Kb segment */
-#define FLASH0_SEG0_END 0xffe07fff /* 16 kB + 8 kB + 8 kB */
-#define FLASH0_SEG0_SIZE 0x00008000 /* (sectors SA0-SA2) */
-
-#define FLASH0_SEG1_START 0xffe10000 /* 1MB - 64Kb FLASH0 seg */
-#define FLASH0_SEG1_END 0xffefffff /* 960 kB */
-#define FLASH0_SEG1_SIZE 0x000f0000
-
-#define FLASH0_SEG2_START 0xfff00000 /* Boot Loader stored here */
-#define FLASH0_SEG2_END 0xfff7ffff /* 512 kB FLASH0/PLCC seg */
-#define FLASH0_SEG2_SIZE 0x00080000
-
-#define FLASH0_SEG3_START 0xfff80000 /* 512 kB FLASH0 seg */
-#define FLASH0_SEG3_END 0xffffffff
-#define FLASH0_SEG3_SIZE 0x00080000
-
-/* Where Kahlua starts */
-#define FLASH_RESET_VECT 0xfff00100
-
-/*
- * CHRP / PREP (MAP A/B) definitions.
- */
-
-#define PREP_REG_ADDR 0x80000cf8 /* MPC107 Config, Map A */
-#define PREP_REG_DATA 0x80000cfc /* MPC107 Config, Map A */
-/* MPC107 (MPC8240 internal EUMBBAR mapped) */
-#define CHRP_REG_ADDR 0xfec00000 /* MPC106 Config, Map B */
-#define CHRP_REG_DATA 0xfee00000 /* MPC106 Config, Map B */
-
-/*
- * Mousse PCI IDSEL Assignments (Device Number)
- */
-#define MOUSSE_IDSEL_ENET 13 /* On-board 21143 Ethernet */
-#define MOUSSE_IDSEL_LPCI 14 /* On-board PCI slot */
-#define MOUSSE_IDSEL_82371 15 /* That other thing */
-#define MOUSSE_IDSEL_CPCI2 31 /* CPCI slot 2 */
-#define MOUSSE_IDSEL_CPCI3 30 /* CPCI slot 3 */
-#define MOUSSE_IDSEL_CPCI4 29 /* CPCI slot 4 */
-#define MOUSSE_IDSEL_CPCI5 28 /* CPCI slot 5 */
-#define MOUSSE_IDSEL_CPCI6 27 /* CPCI slot 6 */
-
-/*
- * Mousse Interrupt Mapping:
- *
- * IRQ1 Enet (intA|intB|intC|intD)
- * IRQ2 CPCI intA (See below)
- * IRQ3 Local PCI slot intA|intB|intC|intD
- * IRQ4 COM1 Serial port (Actually higher addressed port on duart)
- *
- * PCI Interrupt Mapping in CPCI chassis:
- *
- * | CPCI Slot
- * | 1 (CPU) 2 3 4 5 6
- * -----------+--------+-------+-------+-------+-------+-------+
- * intA | X X X
- * intB | X X X
- * intC | X X X
- * intD | X X X
- */
-
-
-#define EPIC_VECTOR_EXT0 0
-#define EPIC_VECTOR_EXT1 1
-#define EPIC_VECTOR_EXT2 2
-#define EPIC_VECTOR_EXT3 3
-#define EPIC_VECTOR_EXT4 4
-#define EPIC_VECTOR_TM0 16
-#define EPIC_VECTOR_TM1 17
-#define EPIC_VECTOR_TM2 18
-#define EPIC_VECTOR_TM3 19
-#define EPIC_VECTOR_I2C 20
-#define EPIC_VECTOR_DMA0 21
-#define EPIC_VECTOR_DMA1 22
-#define EPIC_VECTOR_I2O 23
-
-
-#define INT_VEC_IRQ0 0
-#define INT_NUM_IRQ0 INT_VEC_IRQ0
-#define MOUSSE_IRQ_ENET EPIC_VECTOR_EXT1 /* Hardwired */
-#define MOUSSE_IRQ_CPCI EPIC_VECTOR_EXT2 /* Hardwired */
-#define MOUSSE_IRQ_LPCI EPIC_VECTOR_EXT3 /* Hardwired */
-#define MOUSSE_IRQ_DUART EPIC_VECTOR_EXT4 /* Hardwired */
-
-/* Onboard DEC 21143 Ethernet */
-#define PCI_ENET_MEMADDR 0x80000000
-#define PCI_ENET_IOADDR 0x80000000
-
-/* Some other PCI device */
-#define PCI_SLOT_MEMADDR 0x81000000
-#define PCI_SLOT_IOADDR 0x81000000
-
-/* Promise ATA66 PCI Device (ATA controller) */
-#define PROMISE_MBAR0 0xa0000000
-#define PROMISE_MBAR1 (PROMISE_MBAR0 + 0x1000)
-#define PROMISE_MBAR2 (PROMISE_MBAR0 + 0x2000)
-#define PROMISE_MBAR3 (PROMISE_MBAR0 + 0x3000)
-#define PROMISE_MBAR4 (PROMISE_MBAR0 + 0x4000)
-#define PROMISE_MBAR5 (PROMISE_MBAR0 + 0x5000)
-
-/* ATA/66 Controller offsets */
-#define CFG_ATA_BASE_ADDR PROMISE_MBAR0
-#define CFG_IDE_MAXBUS 2 /* ide0/ide1 */
-#define CFG_IDE_MAXDEVICE 2 /* 2 drives per controller */
-#define CFG_ATA_IDE0_OFFSET 0
-#define CFG_ATA_IDE1_OFFSET 0x3000
-/*
- * Definitions for accessing IDE controller registers
- */
-#define CFG_ATA_DATA_OFFSET 0
-#define CFG_ATA_REG_OFFSET 0
-#define CFG_ATA_ALT_OFFSET (0x1000)
-
-/*
- * The constants ROM_TEXT_ADRS, ROM_SIZE, RAM_HIGH_ADRS, and RAM_LOW_ADRS
- * are defined in config.h and Makefile.
- * All definitions for these constants must be identical.
- */
-#define ROM_BASE_ADRS 0xfff00000 /* base address of ROM */
-#define ROM_TEXT_ADRS (ROM_BASE_ADRS+0x0100) /* with PC & SP */
-#define ROM_WARM_ADRS (ROM_TEXT_ADRS+0x0004) /* warm reboot entry */
-#define ROM_SIZE 0x00080000 /* 512KB ROM space */
-#define RAM_LOW_ADRS 0x00010000 /* RAM address for vxWorks */
-#define RAM_HIGH_ADRS 0x00c00000 /* RAM address for bootrom */
-
-/*
- * NVRAM configuration
- * NVRAM is implemented via the SGS Thomson M48T59Y
- * 64Kbit (8Kbx8) Timekeeper SRAM.
- * This 8KB NVRAM also has a TOD. See m48t59y.{h,c} for more information.
- */
-
-#define NV_RAM_ADRS TOD_NVRAM_BASE
-#define NV_RAM_INTRVL 1
-#define NV_RAM_WR_ENBL SYS_TOD_UNPROTECT()
-#define NV_RAM_WR_DSBL SYS_TOD_PROTECT()
-
-#define NV_OFF_BOOT0 0x0000 /* Boot string 0 (256b) */
-#define NV_OFF_BOOT1 0x0100 /* Boot string 1 (256b) */
-#define NV_OFF_BOOT2 0x0200 /* Boot string 2 (256b)*/
-#define NV_OFF_MACADDR 0x0400 /* 21143 MAC address (6b) */
-#define NV_OFF_ACTIVEBOOT 0x0406 /* Active boot string, 0 to 2 (1b) */
-#define NV_OFF_UNUSED1 0x0407 /* Unused (1b) */
-#define NV_OFF_BINDFIX 0x0408 /* See sysLib.c:sysBindFix() (1b) */
-#define NV_OFF_UNUSED2 0x0409 /* Unused (7b) */
-#define NV_OFF_TIMEZONE 0x0410 /* TIMEZONE env var (64b) */
-#define NV_OFF_VXWORKS_END 0x07FF /* 2047 VxWorks Total */
-#define NV_OFF_U_BOOT 0x0800 /* 2048 U-Boot boot-loader */
-#define NV_OFF_U_BOOT_ADDR (TOD_BASE + NV_OFF_U_BOOT) /* sysaddr*/
-#define NV_U_BOOT_ENV_SIZE 2048 /* 2K - U-Boot Total */
-#define NV_OFF__next_free (NV_U_BOOT_ENVSIZE +1)
-#define NV_RAM_SIZE 8176 /* NVRAM End */
-
-#endif /* __MOUSSE_H */
diff --git a/board/mousse/pci.c b/board/mousse/pci.c
deleted file mode 100644
index 4f393984ca..0000000000
--- a/board/mousse/pci.c
+++ /dev/null
@@ -1,283 +0,0 @@
-/*
- *
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2001
- * James Dougherty (jfd@cs.stanford.edu)
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * PCI Configuration space access support for MPC824x/MPC107 PCI Bridge
- */
-#include <common.h>
-#include <mpc824x.h>
-#include <pci.h>
-
-#include "mousse.h"
-
-/*
- * Promise ATA/66 support.
- */
-#define XFER_PIO_4 0x0C /* 0000|1100 */
-#define XFER_PIO_3 0x0B /* 0000|1011 */
-#define XFER_PIO_2 0x0A /* 0000|1010 */
-#define XFER_PIO_1 0x09 /* 0000|1001 */
-#define XFER_PIO_0 0x08 /* 0000|1000 */
-#define XFER_PIO_SLOW 0x00 /* 0000|0000 */
-
-/* Promise Regs */
-#define REG_A 0x01
-#define REG_B 0x02
-#define REG_C 0x04
-#define REG_D 0x08
-
-void
-pdc202xx_decode_registers (unsigned char registers, unsigned char value)
-{
- unsigned char bit = 0, bit1 = 0, bit2 = 0;
- switch(registers) {
- case REG_A:
- bit2 = 0;
- printf(" A Register ");
- if (value & 0x80) printf("SYNC_IN ");
- if (value & 0x40) printf("ERRDY_EN ");
- if (value & 0x20) printf("IORDY_EN ");
- if (value & 0x10) printf("PREFETCH_EN ");
- if (value & 0x08) { printf("PA3 ");bit2 |= 0x08; }
- if (value & 0x04) { printf("PA2 ");bit2 |= 0x04; }
- if (value & 0x02) { printf("PA1 ");bit2 |= 0x02; }
- if (value & 0x01) { printf("PA0 ");bit2 |= 0x01; }
- printf("PIO(A) = %d ", bit2);
- break;
- case REG_B:
- bit1 = 0;bit2 = 0;
- printf(" B Register ");
- if (value & 0x80) { printf("MB2 ");bit1 |= 0x80; }
- if (value & 0x40) { printf("MB1 ");bit1 |= 0x40; }
- if (value & 0x20) { printf("MB0 ");bit1 |= 0x20; }
- printf("DMA(B) = %d ", bit1 >> 5);
- if (value & 0x10) printf("PIO_FORCED/PB4 ");
- if (value & 0x08) { printf("PB3 ");bit2 |= 0x08; }
- if (value & 0x04) { printf("PB2 ");bit2 |= 0x04; }
- if (value & 0x02) { printf("PB1 ");bit2 |= 0x02; }
- if (value & 0x01) { printf("PB0 ");bit2 |= 0x01; }
- printf("PIO(B) = %d ", bit2);
- break;
- case REG_C:
- bit2 = 0;
- printf(" C Register ");
- if (value & 0x80) printf("DMARQp ");
- if (value & 0x40) printf("IORDYp ");
- if (value & 0x20) printf("DMAR_EN ");
- if (value & 0x10) printf("DMAW_EN ");
-
- if (value & 0x08) { printf("MC3 ");bit2 |= 0x08; }
- if (value & 0x04) { printf("MC2 ");bit2 |= 0x04; }
- if (value & 0x02) { printf("MC1 ");bit2 |= 0x02; }
- if (value & 0x01) { printf("MC0 ");bit2 |= 0x01; }
- printf("DMA(C) = %d ", bit2);
- break;
- case REG_D:
- printf(" D Register ");
- break;
- default:
- return;
- }
- printf("\n %s ", (registers & REG_D) ? "DP" :
- (registers & REG_C) ? "CP" :
- (registers & REG_B) ? "BP" :
- (registers & REG_A) ? "AP" : "ERROR");
- for (bit=128;bit>0;bit/=2)
- printf("%s", (value & bit) ? "1" : "0");
- printf("\n");
-}
-
-/*
- * Promise ATA/66 Support: configure Promise ATA66 card in specified mode.
- */
-int
-pdc202xx_tune_chipset (pci_dev_t dev, int drive, unsigned char speed)
-{
- unsigned short drive_conf;
- int err = 0;
- unsigned char drive_pci, AP, BP, CP, DP;
- unsigned char TA = 0, TB = 0;
-
- switch (drive) {
- case 0: drive_pci = 0x60; break;
- case 1: drive_pci = 0x64; break;
- case 2: drive_pci = 0x68; break;
- case 3: drive_pci = 0x6c; break;
- default: return -1;
- }
-
- pci_read_config_word(dev, drive_pci, &drive_conf);
- pci_read_config_byte(dev, (drive_pci), &AP);
- pci_read_config_byte(dev, (drive_pci)|0x01, &BP);
- pci_read_config_byte(dev, (drive_pci)|0x02, &CP);
- pci_read_config_byte(dev, (drive_pci)|0x03, &DP);
-
- if ((AP & 0x0F) || (BP & 0x07)) {
- /* clear PIO modes of lower 8421 bits of A Register */
- pci_write_config_byte(dev, (drive_pci), AP & ~0x0F);
- pci_read_config_byte(dev, (drive_pci), &AP);
-
- /* clear PIO modes of lower 421 bits of B Register */
- pci_write_config_byte(dev, (drive_pci)|0x01, BP & ~0x07);
- pci_read_config_byte(dev, (drive_pci)|0x01, &BP);
-
- pci_read_config_byte(dev, (drive_pci), &AP);
- pci_read_config_byte(dev, (drive_pci)|0x01, &BP);
- }
-
- pci_read_config_byte(dev, (drive_pci), &AP);
- pci_read_config_byte(dev, (drive_pci)|0x01, &BP);
- pci_read_config_byte(dev, (drive_pci)|0x02, &CP);
-
- switch(speed) {
- case XFER_PIO_4: TA = 0x01; TB = 0x04; break;
- case XFER_PIO_3: TA = 0x02; TB = 0x06; break;
- case XFER_PIO_2: TA = 0x03; TB = 0x08; break;
- case XFER_PIO_1: TA = 0x05; TB = 0x0C; break;
- case XFER_PIO_0:
- default: TA = 0x09; TB = 0x13; break;
- }
-
- pci_write_config_byte(dev, (drive_pci), AP|TA);
- pci_write_config_byte(dev, (drive_pci)|0x01, BP|TB);
-
- pci_read_config_byte(dev, (drive_pci), &AP);
- pci_read_config_byte(dev, (drive_pci)|0x01, &BP);
- pci_read_config_byte(dev, (drive_pci)|0x02, &CP);
- pci_read_config_byte(dev, (drive_pci)|0x03, &DP);
-
-
-#ifdef PDC202XX_DEBUG
- pdc202xx_decode_registers(REG_A, AP);
- pdc202xx_decode_registers(REG_B, BP);
- pdc202xx_decode_registers(REG_C, CP);
- pdc202xx_decode_registers(REG_D, DP);
-#endif
- return err;
-}
-/*
- * Show/Init PCI devices on the specified bus number.
- */
-
-void pci_mousse_fixup_irq(struct pci_controller *hose, pci_dev_t dev)
-{
- unsigned int line;
-
- switch(PCI_DEV(dev)) {
- case 0x0d:
- line = 0x00000101;
- break;
-
- case 0x0e:
- default:
- line = 0x00000303;
- break;
- }
-
- pci_write_config_dword(dev, PCI_INTERRUPT_LINE, line);
-}
-
-void pci_mousse_setup_pdc202xx(struct pci_controller *hose, pci_dev_t dev,
- struct pci_config_table *_)
-{
- unsigned short vendorId;
- unsigned int mbar0, cmd;
- int bar, a;
-
- pci_read_config_word(dev, PCI_VENDOR_ID, &vendorId);
-
- if(vendorId == PCI_VENDOR_ID_PROMISE || vendorId == PCI_VENDOR_ID_CMD){
- /* PDC 202xx card is handled differently, it is a bootable
- * device and needs all 5 MBAR's configured
- */
- for(bar = 0; bar < 5; bar++){
- pci_read_config_dword(dev, PCI_BASE_ADDRESS_0+bar*4, &mbar0);
- pci_write_config_dword(dev, PCI_BASE_ADDRESS_0+bar*4, ~0);
- pci_read_config_dword(dev, PCI_BASE_ADDRESS_0+bar*4, &mbar0);
-#ifdef DEBUG
- printf(" ATA_bar[%d] = %dbytes\n", bar,
- ~(mbar0 & PCI_BASE_ADDRESS_MEM_MASK) + 1);
-#endif
- }
-
- /* Program all BAR's */
- pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, PROMISE_MBAR0);
- pci_write_config_dword(dev, PCI_BASE_ADDRESS_1, PROMISE_MBAR1);
- pci_write_config_dword(dev, PCI_BASE_ADDRESS_2, PROMISE_MBAR2);
- pci_write_config_dword(dev, PCI_BASE_ADDRESS_3, PROMISE_MBAR3);
- pci_write_config_dword(dev, PCI_BASE_ADDRESS_4, PROMISE_MBAR4);
- pci_write_config_dword(dev, PCI_BASE_ADDRESS_5, PROMISE_MBAR5);
-
- for(bar = 0; bar < 5; bar++){
- pci_read_config_dword(dev, PCI_BASE_ADDRESS_0+bar*4, &mbar0);
-#ifdef DEBUG
- printf(" ATA_bar[%d]@0x%x\n", bar, mbar0);
-#endif
- }
-
- /* Enable ROM Expansion base */
- pci_write_config_dword(dev, PCI_ROM_ADDRESS, PROMISE_MBAR5|1);
-
- /* Io enable, Memory enable, master enable */
- pci_read_config_dword(dev, PCI_COMMAND, &cmd);
- cmd &= ~0xffff0000;
- cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY | PCI_COMMAND_IO;
- pci_write_config_dword(dev, PCI_COMMAND, cmd);
-
- /* Breath some life into the controller */
- for( a = 0; a < 4; a++)
- pdc202xx_tune_chipset(dev, a, XFER_PIO_0);
- }
-}
-
-static struct pci_config_table pci_sandpoint_config_table[] = {
- { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x00, 0x0e, 0x00,
- pci_mousse_setup_pdc202xx },
-#ifndef CONFIG_PCI_PNP
- { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x00, 0x0d, 0x00,
- pci_cfgfunc_config_device, {PCI_ENET_IOADDR,
- PCI_ENET_MEMADDR,
- PCI_COMMAND_MEMORY |
- PCI_COMMAND_MASTER}},
- { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
- pci_cfgfunc_config_device, {PCI_SLOT_IOADDR,
- PCI_SLOT_MEMADDR,
- PCI_COMMAND_MEMORY |
- PCI_COMMAND_MASTER}},
-#endif
- { }
-};
-
-struct pci_controller hose = {
- config_table: pci_sandpoint_config_table,
- fixup_irq: pci_mousse_fixup_irq,
-};
-
-void pci_init_board(void)
-{
- pci_mpc824x_init(&hose);
-}
diff --git a/board/mousse/u-boot.lds b/board/mousse/u-boot.lds
deleted file mode 100644
index 57358b8a49..0000000000
--- a/board/mousse/u-boot.lds
+++ /dev/null
@@ -1,131 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc824x/start.o (.text)
- lib_ppc/board.o (.text)
- lib_ppc/ppcstring.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
- lib_generic/zlib.o (.text)
-
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
-
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/mousse/u-boot.lds.ram b/board/mousse/u-boot.lds.ram
deleted file mode 100644
index eb47ae670d..0000000000
--- a/board/mousse/u-boot.lds.ram
+++ /dev/null
@@ -1,105 +0,0 @@
-/*
- * (C) Copyright 2000
- * Rob Taylor, Flying Pig Systems Ltd. robt@flyingpig.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-
-MEMORY {
- ram (!rx) : org = 0x00000000 , LENGTH = 8M
- code (!rx) : org = 0x00002000 , LENGTH = (4M - 0x2000)
- rom (rx) : org = 0xfff00000 , LENGTH = 512K
-}
-
-SECTIONS
-{
- _f_init = .;
- PROVIDE(_f_init = .);
- _f_init_rom = .;
- PROVIDE(_f_init_rom = .);
-
- .init : {
- cpu/mpc824x/start.o (.text)
- *(.init)
- } > ram
- _init_size = SIZEOF(.init);
- PROVIDE(_init_size = SIZEOF(.init));
-
- ENTRY(_start)
-
-/* _ftext = .;
- _ftext_rom = .;
- _text_size = SIZEOF(.text);
- */
- .text : {
- *(.text)
- *(.got1)
- } > ram
- .rodata : { *(.rodata) } > ram
- .dtors : { *(.dtors) } > ram
- .data : { *(.data) } > ram
- .sdata : { *(.sdata) } > ram
- .sdata2 : { *(.sdata2)
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- } > ram
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .sbss : { *(.sbss) } > ram
- .sbss2 : { *(.sbss2) } > ram
- .bss : { *(.bss) } > ram
- .debug : { *(.debug) } > ram
- .line : { *(.line) } > ram
- .symtab : { *(.symtab) } > ram
- .shrstrtab : { *(.shstrtab) } > ram
- .strtab : { *(.strtab) } > ram
- /* .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- } > ram
- */
-
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- __start___ex_table = .;
- __ex_table : { *(__ex_table) } > ram
- __stop___ex_table = .;
-
-
- .ppcenv :
- {
- common/environment.o (.ppcenv)
- } > ram
-
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/mousse/u-boot.lds.rom b/board/mousse/u-boot.lds.rom
deleted file mode 100644
index 5a5722e81a..0000000000
--- a/board/mousse/u-boot.lds.rom
+++ /dev/null
@@ -1,133 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc824x/start.o (.text)
- common/board.o (.text)
- lib_ppc/ppcstring.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
- lib_generic/zlib.o (.text)
-
- . = env_offset;
- common/environment.o (.text)
-
- *(.text)
-
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
-
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/mp2usb/Makefile b/board/mp2usb/Makefile
deleted file mode 100644
index b6ea3cf473..0000000000
--- a/board/mp2usb/Makefile
+++ /dev/null
@@ -1,46 +0,0 @@
-#
-# (C) Copyright 2003
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := mp2usb.o flash.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS) $(SOBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/mp2usb/config.mk b/board/mp2usb/config.mk
deleted file mode 100644
index e299bfd5ef..0000000000
--- a/board/mp2usb/config.mk
+++ /dev/null
@@ -1,3 +0,0 @@
-TEXT_BASE = 0x27F00000
-## For testing: load at 0x20100000 and "go" at 0x201000A4
-#TEXT_BASE = 0x20100000
diff --git a/board/mp2usb/flash.c b/board/mp2usb/flash.c
deleted file mode 100644
index 89ced163bb..0000000000
--- a/board/mp2usb/flash.c
+++ /dev/null
@@ -1,552 +0,0 @@
-/*
- * (C) Copyright 2001
- * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
- *
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * Modified for the MP2USB by (C) Copyright 2005 Eric Benard
- * ebenard@eukrea.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <linux/byteorder/swab.h>
-
-#define CFG_MAX_FLASH_BANKS 1
-#define PHYS_FLASH_SECT_SIZE 0x00020000 /* 128 KB sectors (x1) */
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-#define FLASH_PORT_WIDTH ushort
-#define FLASH_PORT_WIDTHV vu_short
-#define SWAP(x) __swab16(x)
-
-#define FPW FLASH_PORT_WIDTH
-#define FPWV FLASH_PORT_WIDTHV
-
-#define mb() __asm__ __volatile__ ("" : : : "memory")
-
-/* Intel-compatible flash commands */
-#define INTEL_PROGRAM 0x00100010
-#define INTEL_ERASE 0x00200020
-#define INTEL_PROG 0x00400040
-#define INTEL_CLEAR 0x00500050
-#define INTEL_LOCKBIT 0x00600060
-#define INTEL_PROTECT 0x00010001
-#define INTEL_STATUS 0x00700070
-#define INTEL_READID 0x00900090
-#define INTEL_SUSPEND 0x00B000B0
-#define INTEL_CONFIRM 0x00D000D0
-#define INTEL_RESET 0xFFFFFFFF
-
-/* Intel-compatible flash status bits */
-#define INTEL_FINISHED 0x00800080
-#define INTEL_OK 0x00800080
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (FPW *addr, flash_info_t *info);
-static int write_data (flash_info_t *info, ulong dest, FPW data);
-static void flash_get_offsets (ulong base, flash_info_t *info);
-void inline spin_wheel (void);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- int i;
- ulong size = 0;
-
- for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
- switch (i) {
- case 0:
- flash_get_size ((FPW *) PHYS_FLASH_1, &flash_info[i]);
- flash_get_offsets (PHYS_FLASH_1, &flash_info[i]);
- break;
- default:
- panic ("configured too many flash banks!\n");
- break;
- }
- size += flash_info[i].size;
- }
-
- /* Protect monitor and environment sectors
- */
- flash_protect ( FLAG_PROTECT_SET,
- CFG_FLASH_BASE,
- CFG_FLASH_BASE + monitor_flash_len - 1,
- &flash_info[0] );
-
- flash_protect ( FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0] );
-
- return size;
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_get_offsets (ulong base, flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- return;
- }
-
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
- for (i = 0; i < info->sector_count; i++) {
- info->start[i] = base + (i * PHYS_FLASH_SECT_SIZE);
- info->protect[i] = 0;
- }
- }
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_INTEL:
- printf ("INTEL ");
- break;
- default:
- printf ("Unknown Vendor ");
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_28F640J3A:
- printf ("28F640J3A\n");
- break;
- case FLASH_28F128J3A:
- printf ("28F128J3A\n");
- break;
- default:
- printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " ");
- }
- printf ("\n");
- return;
-}
-
-/*
- * The following code cannot be run from FLASH!
- */
-static ulong flash_get_size (FPW *addr, flash_info_t *info)
-{
- volatile FPW value;
-
- /* Write auto select command: read Manufacturer ID */
- addr[0x5555] = (FPW) 0x00AA00AA;
- addr[0x2AAA] = (FPW) 0x00550055;
- addr[0x5555] = (FPW) 0x00900090;
-
- mb ();
- value = addr[0];
-
- switch (value) {
-
- case (FPW) INTEL_MANUFACT:
- info->flash_id = FLASH_MAN_INTEL;
- break;
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- addr[0] = (FPW) INTEL_RESET; /* restore read mode */
- return (0); /* no or unknown flash */
- }
-
- mb ();
- value = addr[1]; /* device ID */
-
- switch (value) {
-
- case (FPW) INTEL_ID_28F640J3A:
- info->flash_id += FLASH_28F640J3A;
- info->sector_count = 64;
- info->size = 0x00800000;
- break; /* => 8 MB */
-
- case (FPW) INTEL_ID_28F128J3A:
- info->flash_id += FLASH_28F128J3A;
- info->sector_count = 128;
- info->size = 0x01000000;
- break; /* => 16 MB */
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- break;
- }
-
- if (info->sector_count > CFG_MAX_FLASH_SECT) {
- printf ("** ERROR: sector count %d > max (%d) **\n",
- info->sector_count, CFG_MAX_FLASH_SECT);
- info->sector_count = CFG_MAX_FLASH_SECT;
- }
-
- addr[0] = (FPW) INTEL_RESET; /* restore read mode */
-
- return (info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- int prot, sect;
- ulong type, start, last;
- int rcode = 0;
- int cflag, iflag;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- type = (info->flash_id & FLASH_VENDMASK);
- if ((type != FLASH_MAN_INTEL)) {
- printf ("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- return 1;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- start = get_timer (0);
- last = start;
-
- /*
- * Disable interrupts which might cause a timeout
- * here. Remember that our exception vectors are
- * at address 0 in the flash, and we don't want a
- * (ticker) exception to happen while the flash
- * chip is in programming mode.
- */
- cflag = icache_status ();
- icache_disable ();
- /* Disable interrupts which might cause a timeout here */
- iflag = disable_interrupts ();
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- FPWV *addr = (FPWV *) (info->start[sect]);
- FPW status;
-
- printf ("Erasing sector %2d ... ", sect);
-
- /* arm simple, non interrupt dependent timer */
- reset_timer_masked ();
-
- *addr = (FPW) INTEL_CLEAR; /* clear status register */
- *addr = (FPW) INTEL_ERASE; /* erase setup */
- *addr = (FPW) INTEL_CONFIRM; /* erase confirm */
-
- while (((status = *addr) & (FPW) INTEL_FINISHED) != (FPW) INTEL_FINISHED) {
- if (get_timer_masked () > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- *addr = (FPW) INTEL_SUSPEND; /* suspend erase */
- *addr = (FPW) INTEL_RESET; /* reset to read mode */
- rcode = 1;
- break;
- }
- }
-
- *addr = (FPWV)INTEL_CLEAR; /* clear status register cmd. */
- *addr = (FPWV)INTEL_RESET; /* resest to read mode */
-
- printf (" done\n");
- }
- }
-
- if (iflag)
- enable_interrupts ();
-
- if (cflag)
- icache_enable ();
-
- return rcode;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- * 4 - Flash not identified
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp;
- FPW data;
- int count, i, l, rc, port_width;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- return 4;
- }
-
- /* get lower word aligned address */
- wp = (addr & ~1);
- port_width = 2;
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i = 0, cp = wp; i < l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
- for (; i < port_width && cnt > 0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt == 0 && i < port_width; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
-
- if ((rc = write_data (info, wp, SWAP (data))) != 0) {
- return (rc);
- }
- wp += port_width;
- }
-
- /*
- * handle word aligned part
- */
- count = 0;
- while (cnt >= port_width) {
- data = 0;
- for (i = 0; i < port_width; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_data (info, wp, SWAP (data))) != 0) {
- return (rc);
- }
- wp += port_width;
- cnt -= port_width;
- if (count++ > 0x800) {
- spin_wheel ();
- count = 0;
- }
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i < port_width; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
-
- return (write_data (info, wp, SWAP (data)));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word or halfword to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_data (flash_info_t *info, ulong dest, FPW data)
-{
- FPWV *addr = (FPWV *) dest;
- ulong status;
- int cflag, iflag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*addr & data) != data) {
- printf ("not erased at %08lx (%lx)\n", (ulong) addr, *addr);
- return (2);
- }
- /*
- * Disable interrupts which might cause a timeout
- * here. Remember that our exception vectors are
- * at address 0 in the flash, and we don't want a
- * (ticker) exception to happen while the flash
- * chip is in programming mode.
- */
- cflag = icache_status ();
- icache_disable ();
- /* Disable interrupts which might cause a timeout here */
- iflag = disable_interrupts ();
-
- *addr = (FPW) INTEL_PROG; /* write setup */
- *addr = data;
-
- /* arm simple, non interrupt dependent timer */
- reset_timer_masked ();
-
- /* wait while polling the status register */
- while (((status = *addr) & (FPW) INTEL_FINISHED) != (FPW) INTEL_FINISHED) {
- if (get_timer_masked () > CFG_FLASH_WRITE_TOUT) {
- *addr = (FPW) INTEL_RESET; /* restore read mode */
- return (1);
- }
- }
-
- *addr = (FPW) INTEL_RESET; /* restore read mode */
-
- if (iflag)
- enable_interrupts ();
-
- if (cflag)
- icache_enable ();
-
- return (0);
-}
-
-void inline spin_wheel (void)
-{
- static int p = 0;
- static char w[] = "\\/-";
-
- printf ("\010%c", w[p]);
- (++p == 3) ? (p = 0) : 0;
-}
-
-/*-----------------------------------------------------------------------
- * Set/Clear sector's lock bit, returns:
- * 0 - OK
- * 1 - Error (timeout, voltage problems, etc.)
- */
-int flash_real_protect(flash_info_t *info, long sector, int prot)
-{
- int i;
- int rc = 0;
- FPWV *addr = (FPWV *)(info->start[sector]);
- int flag = disable_interrupts();
-
- *addr = (FPW) INTEL_CLEAR; /* Clear status register */
- if (prot) { /* Set sector lock bit */
- *addr = (FPW) INTEL_LOCKBIT; /* Sector lock bit */
- *addr = (FPW) INTEL_PROTECT; /* set */
- }
- else { /* Clear sector lock bit */
- *addr = (FPW) INTEL_LOCKBIT; /* All sectors lock bits */
- *addr = (FPW) INTEL_CONFIRM; /* clear */
- }
-
- reset_timer_masked ();
-
- while ((*addr & (FPW) INTEL_FINISHED) != (FPW) INTEL_FINISHED) {
- if (get_timer_masked () > CFG_FLASH_UNLOCK_TOUT) {
- printf("Flash lock bit operation timed out\n");
- rc = 1;
- break;
- }
- }
-
- if (*addr != (FPW) INTEL_OK) {
- printf("Flash lock bit operation failed at %08X, CSR=%08X\n",
- (uint)addr, (uint)*addr);
- rc = 1;
- }
-
- if (!rc)
- info->protect[sector] = prot;
-
- /*
- * Clear lock bit command clears all sectors lock bits, so
- * we have to restore lock bits of protected sectors.
- */
- if (!prot)
- {
- for (i = 0; i < info->sector_count; i++)
- {
- if (info->protect[i])
- {
- reset_timer_masked ();
- addr = (FPWV *) (info->start[i]);
- *addr = (FPW) INTEL_LOCKBIT; /* Sector lock bit */
- *addr = (FPW) INTEL_PROTECT; /* set */
- while ((*addr & (FPW) INTEL_FINISHED) != (FPW) INTEL_FINISHED)
- {
- if (get_timer_masked () > CFG_FLASH_UNLOCK_TOUT)
- {
- printf("Flash lock bit operation timed out\n");
- rc = 1;
- break;
- }
- }
- }
- }
- }
-
- if (flag)
- enable_interrupts();
-
- *addr = (FPW) INTEL_RESET; /* Reset to read array mode */
-
- return rc;
-}
diff --git a/board/mp2usb/mp2usb.c b/board/mp2usb/mp2usb.c
deleted file mode 100644
index e75be1e3aa..0000000000
--- a/board/mp2usb/mp2usb.c
+++ /dev/null
@@ -1,88 +0,0 @@
-/*
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * Modified for the MP2USB by (C) Copyright 2005 Eric Benard
- * ebenard@eukrea.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/arch/AT91RM9200.h>
-#include <at91rm9200_net.h>
-#include <dm9161.h>
-#include <asm/mach-types.h>
-
-/* ------------------------------------------------------------------------- */
-/*
- * Miscelaneous platform dependent initialisations
- */
-
-int board_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- /* Enable Ctrlc */
- console_init_f ();
-
- /* memory and cpu-speed are setup before relocation */
- /* so we do _nothing_ here */
-
- /* arch number of MP2USB-Board. */
- gd->bd->bi_arch_number = MACH_TYPE_MP2USB;
- /* adress of boot parameters */
- gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
-
- return 0;
-}
-
-int dram_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- gd->bd->bi_dram[0].start = PHYS_SDRAM;
- gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
- return 0;
-}
-
-#ifdef CONFIG_DRIVER_ETHER
-#if (CONFIG_COMMANDS & CFG_CMD_NET)
-
-/*
- * Name:
- * at91rm9200_GetPhyInterface
- * Description:
- * Initialise the interface functions to the PHY
- * Arguments:
- * None
- * Return value:
- * None
- */
-void at91rm9200_GetPhyInterface(AT91PS_PhyOps p_phyops)
-{
- p_phyops->Init = dm9161_InitPhy;
- p_phyops->IsPhyConnected = dm9161_IsPhyConnected;
- p_phyops->GetLinkSpeed = dm9161_GetLinkSpeed;
- p_phyops->AutoNegotiate = dm9161_AutoNegotiate;
-}
-
-#endif /* CONFIG_COMMANDS & CFG_CMD_NET */
-#endif /* CONFIG_DRIVER_ETHER */
diff --git a/board/mp2usb/u-boot.lds b/board/mp2usb/u-boot.lds
deleted file mode 100644
index 76df6b2af1..0000000000
--- a/board/mp2usb/u-boot.lds
+++ /dev/null
@@ -1,56 +0,0 @@
-/*
- * (C) Copyright 2002
- * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-/*OUTPUT_FORMAT("elf32-arm", "elf32-arm", "elf32-arm")*/
-OUTPUT_ARCH(arm)
-ENTRY(_start)
-SECTIONS
-{
- . = 0x00000000;
-
- . = ALIGN(4);
- .text :
- {
- cpu/arm920t/start.o (.text)
- *(.text)
- }
-
- . = ALIGN(4);
- .rodata : { *(.rodata) }
-
- . = ALIGN(4);
- .data : { *(.data) }
-
- . = ALIGN(4);
- .got : { *(.got) }
-
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = ALIGN(4);
- __bss_start = .;
- .bss : { *(.bss) }
- _end = .;
-}
diff --git a/board/mpc8260ads/Makefile b/board/mpc8260ads/Makefile
deleted file mode 100644
index cc519d1e27..0000000000
--- a/board/mpc8260ads/Makefile
+++ /dev/null
@@ -1,47 +0,0 @@
-
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := $(BOARD).o flash.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/mpc8260ads/config.mk b/board/mpc8260ads/config.mk
deleted file mode 100644
index eb6f7c9d1f..0000000000
--- a/board/mpc8260ads/config.mk
+++ /dev/null
@@ -1,37 +0,0 @@
-#
-# (C) Copyright 2001-2003
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# Modified by, Stuart Hughes, Lineo Inc, stuarth@lineo.com
-#
-# Modified by, Yuli Barcohen, Arabella Software Ltd., yuli@arabellasw.com
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# MPC8260ADS, MPC8266ADS, and PQ2FADS-ZU/VR boards
-#
-
-sinclude $(TOPDIR)/board/$(BOARDDIR)/config.tmp
-
-ifndef TEXT_BASE
-## Standard: boot high
-TEXT_BASE = 0xFFF00000
-endif
diff --git a/board/mpc8260ads/flash.c b/board/mpc8260ads/flash.c
deleted file mode 100644
index 59997aac4f..0000000000
--- a/board/mpc8260ads/flash.c
+++ /dev/null
@@ -1,492 +0,0 @@
-/*
- * (C) Copyright 2000, 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2001, Stuart Hughes, Lineo Inc, stuarth@lineo.com
- * Add support the Sharp chips on the mpc8260ads.
- * I started with board/ip860/flash.c and made changes I found in
- * the MTD project by David Schleef.
- *
- * (C) Copyright 2003 Arabella Software Ltd.
- * Yuli Barcohen <yuli@arabellasw.com>
- * Re-written to support multi-bank flash SIMMs.
- * Added support for real protection and JFFS2.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-
-/* Intel-compatible flash ID */
-#define INTEL_COMPAT 0x89898989
-#define INTEL_ALT 0xB0B0B0B0
-
-/* Intel-compatible flash commands */
-#define INTEL_PROGRAM 0x10101010
-#define INTEL_ERASE 0x20202020
-#define INTEL_CLEAR 0x50505050
-#define INTEL_LOCKBIT 0x60606060
-#define INTEL_PROTECT 0x01010101
-#define INTEL_STATUS 0x70707070
-#define INTEL_READID 0x90909090
-#define INTEL_CONFIRM 0xD0D0D0D0
-#define INTEL_RESET 0xFFFFFFFF
-
-/* Intel-compatible flash status bits */
-#define INTEL_FINISHED 0x80808080
-#define INTEL_OK 0x80808080
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/*-----------------------------------------------------------------------
- * This board supports 32-bit wide flash SIMMs (4x8-bit configuration.)
- * Up to 32MB of flash supported (up to 4 banks.)
- * BCSR is used for flash presence detect (page 4-65 of the User's Manual)
- *
- * The following code can not run from flash!
- */
-unsigned long flash_init (void)
-{
- ulong size = 0, sect_start, sect_size = 0, bank_size;
- ushort sect_count = 0;
- int i, j, nbanks;
- vu_long *addr = (vu_long *)CFG_FLASH_BASE;
- vu_long *bcsr = (vu_long *)CFG_BCSR;
-
- switch (bcsr[2] & 0xF) {
- case 0:
- nbanks = 4;
- break;
- case 1:
- nbanks = 2;
- break;
- case 2:
- nbanks = 1;
- break;
- default: /* Unsupported configurations */
- nbanks = CFG_MAX_FLASH_BANKS;
- }
-
- if (nbanks > CFG_MAX_FLASH_BANKS)
- nbanks = CFG_MAX_FLASH_BANKS;
-
- for (i = 0; i < nbanks; i++) {
- *addr = INTEL_READID; /* Read Intelligent Identifier */
- if ((addr[0] == INTEL_COMPAT) || (addr[0] == INTEL_ALT)) {
- switch (addr[1]) {
- case SHARP_ID_28F016SCL:
- case SHARP_ID_28F016SCZ:
- flash_info[i].flash_id = FLASH_MAN_SHARP | FLASH_LH28F016SCT;
- sect_count = 32;
- sect_size = 0x40000;
- break;
- default:
- flash_info[i].flash_id = FLASH_UNKNOWN;
- sect_count = CFG_MAX_FLASH_SECT;
- sect_size =
- CFG_FLASH_SIZE / CFG_MAX_FLASH_BANKS / CFG_MAX_FLASH_SECT;
- }
- }
- else
- flash_info[i].flash_id = FLASH_UNKNOWN;
- if (flash_info[i].flash_id == FLASH_UNKNOWN) {
- printf("### Unknown flash ID %08lX %08lX at address %08lX ###\n",
- addr[0], addr[1], (ulong)addr);
- size = 0;
- *addr = INTEL_RESET; /* Reset bank to Read Array mode */
- break;
- }
- flash_info[i].sector_count = sect_count;
- flash_info[i].size = bank_size = sect_size * sect_count;
- size += bank_size;
- sect_start = (ulong)addr;
- for (j = 0; j < sect_count; j++) {
- addr = (vu_long *)sect_start;
- flash_info[i].start[j] = sect_start;
- flash_info[i].protect[j] = (addr[2] == 0x01010101);
- sect_start += sect_size;
- }
- *addr = INTEL_RESET; /* Reset bank to Read Array mode */
- addr = (vu_long *)sect_start;
- }
-
- if (size == 0) { /* Unknown flash, fill with hard-coded values */
- sect_start = CFG_FLASH_BASE;
- for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- flash_info[i].size = CFG_FLASH_SIZE / CFG_MAX_FLASH_BANKS;
- flash_info[i].sector_count = sect_count;
- for (j = 0; j < sect_count; j++) {
- flash_info[i].start[j] = sect_start;
- flash_info[i].protect[j] = 0;
- sect_start += sect_size;
- }
- }
- size = CFG_FLASH_SIZE;
- }
- else
- for (i = nbanks; i < CFG_MAX_FLASH_BANKS; i++) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- flash_info[i].size = 0;
- flash_info[i].sector_count = 0;
- }
-
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
- /* monitor protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+monitor_flash_len-1,
- &flash_info[0]);
-#endif
-
-#ifdef CFG_ENV_IS_IN_FLASH
- /* ENV protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR+CFG_ENV_SECT_SIZE-1,
- &flash_info[0]);
-#endif
- return (size);
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_INTEL: printf ("Intel "); break;
- case FLASH_MAN_SHARP: printf ("Sharp "); break;
- default: printf ("Unknown Vendor "); break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_28F016SV: printf ("28F016SV (16 Mbit, 32 x 64k)\n");
- break;
- case FLASH_28F160S3: printf ("28F160S3 (16 Mbit, 32 x 512K)\n");
- break;
- case FLASH_28F320S3: printf ("28F320S3 (32 Mbit, 64 x 512K)\n");
- break;
- case FLASH_LH28F016SCT: printf ("28F016SC (16 Mbit, 32 x 64K)\n");
- break;
- default: printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " "
- );
- }
- printf ("\n");
-}
-
-/*-----------------------------------------------------------------------
- */
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- int flag, prot, sect;
- ulong start, now, last;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- if ( ((info->flash_id & FLASH_VENDMASK) != FLASH_MAN_INTEL)
- && ((info->flash_id & FLASH_VENDMASK) != FLASH_MAN_SHARP) ) {
- printf ("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- vu_long *addr = (vu_long *)(info->start[sect]);
-
- last = start = get_timer (0);
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- /* Clear Status Register */
- *addr = INTEL_CLEAR;
- /* Single Block Erase Command */
- *addr = INTEL_ERASE;
- /* Confirm */
- *addr = INTEL_CONFIRM;
-
- if((info->flash_id & FLASH_TYPEMASK) != FLASH_LH28F016SCT) {
- /* Resume Command, as per errata update */
- *addr = INTEL_CONFIRM;
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- while ((*addr & INTEL_FINISHED) != INTEL_FINISHED) {
- if ((now=get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- *addr = INTEL_RESET; /* reset bank */
- return 1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- }
-
- if (*addr != INTEL_OK) {
- printf("Block erase failed at %08X, CSR=%08X\n",
- (uint)addr, (uint)*addr);
- *addr = INTEL_RESET; /* reset bank */
- return 1;
- }
-
- /* reset to read mode */
- *addr = INTEL_RESET;
- }
- }
-
- printf (" done\n");
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word (flash_info_t *info, ulong dest, ulong data)
-{
- ulong start;
- int rc = 0;
- int flag;
- vu_long *addr = (vu_long *)dest;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*addr & data) != data) {
- return (2);
- }
-
- *addr = INTEL_CLEAR; /* Clear status register */
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- /* Write Command */
- *addr = INTEL_PROGRAM;
-
- /* Write Data */
- *addr = data;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* data polling for D7 */
- start = get_timer (0);
- while ((*addr & INTEL_FINISHED) != INTEL_FINISHED) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- printf("Write timed out\n");
- rc = 1;
- break;
- }
- }
- if (*addr != INTEL_OK) {
- printf ("Write failed at %08X, CSR=%08X\n", (uint)addr, (uint)*addr);
- rc = 1;
- }
-
- *addr = INTEL_RESET; /* Reset to read array mode */
-
- return rc;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int i, l, rc;
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- *(vu_long *)wp = INTEL_RESET; /* Reset to read array mode */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
- for (; i<4 && cnt>0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = 0;
- for (i=0; i<4; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- rc = write_word(info, wp, data);
-
- return rc;
-}
-
-/*-----------------------------------------------------------------------
- * Set/Clear sector's lock bit, returns:
- * 0 - OK
- * 1 - Error (timeout, voltage problems, etc.)
- */
-int flash_real_protect(flash_info_t *info, long sector, int prot)
-{
- ulong start;
- int i;
- int rc = 0;
- vu_long *addr = (vu_long *)(info->start[sector]);
- int flag = disable_interrupts();
-
- *addr = INTEL_CLEAR; /* Clear status register */
- if (prot) { /* Set sector lock bit */
- *addr = INTEL_LOCKBIT; /* Sector lock bit */
- *addr = INTEL_PROTECT; /* set */
- }
- else { /* Clear sector lock bit */
- *addr = INTEL_LOCKBIT; /* All sectors lock bits */
- *addr = INTEL_CONFIRM; /* clear */
- }
-
- start = get_timer(0);
- while ((*addr & INTEL_FINISHED) != INTEL_FINISHED) {
- if (get_timer(start) > CFG_FLASH_UNLOCK_TOUT) {
- printf("Flash lock bit operation timed out\n");
- rc = 1;
- break;
- }
- }
-
- if (*addr != INTEL_OK) {
- printf("Flash lock bit operation failed at %08X, CSR=%08X\n",
- (uint)addr, (uint)*addr);
- rc = 1;
- }
-
- if (!rc)
- info->protect[sector] = prot;
-
- /*
- * Clear lock bit command clears all sectors lock bits, so
- * we have to restore lock bits of protected sectors.
- */
- if (!prot)
- for (i = 0; i < info->sector_count; i++)
- if (info->protect[i]) {
- addr = (vu_long *)(info->start[i]);
- *addr = INTEL_LOCKBIT; /* Sector lock bit */
- *addr = INTEL_PROTECT; /* set */
- udelay(CFG_FLASH_LOCK_TOUT * 1000);
- }
-
- if (flag)
- enable_interrupts();
-
- *addr = INTEL_RESET; /* Reset to read array mode */
-
- return rc;
-}
diff --git a/board/mpc8260ads/mpc8260ads.c b/board/mpc8260ads/mpc8260ads.c
deleted file mode 100644
index 93550e2ad0..0000000000
--- a/board/mpc8260ads/mpc8260ads.c
+++ /dev/null
@@ -1,546 +0,0 @@
-/*
- * (C) Copyright 2001-2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * Modified during 2001 by
- * Advanced Communications Technologies (Australia) Pty. Ltd.
- * Howard Walker, Tuong Vu-Dinh
- *
- * (C) Copyright 2001, Stuart Hughes, Lineo Inc, stuarth@lineo.com
- * Added support for the 16M dram simm on the 8260ads boards
- *
- * (C) Copyright 2003-2004 Arabella Software Ltd.
- * Yuli Barcohen <yuli@arabellasw.com>
- * Added support for SDRAM DIMMs SPD EEPROM, MII, Ethernet PHY init.
- *
- * Copyright (c) 2005 MontaVista Software, Inc.
- * Vitaly Bordug <vbordug@ru.mvista.com>
- * Added support for PCI.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <ioports.h>
-#include <mpc8260.h>
-#include <asm/m8260_pci.h>
-#include <i2c.h>
-#include <spd.h>
-#include <miiphy.h>
-#ifdef CONFIG_PCI
-#include <pci.h>
-#endif
-
-/*
- * I/O Port configuration table
- *
- * if conf is 1, then that port pin will be configured at boot time
- * according to the five values podr/pdir/ppar/psor/pdat for that entry
- */
-
-#define CFG_FCC1 (CONFIG_ETHER_INDEX == 1)
-#define CFG_FCC2 (CONFIG_ETHER_INDEX == 2)
-#define CFG_FCC3 (CONFIG_ETHER_INDEX == 3)
-
-const iop_conf_t iop_conf_tab[4][32] = {
-
- /* Port A configuration */
- { /* conf ppar psor pdir podr pdat */
- /* PA31 */ { CFG_FCC1, 1, 1, 0, 0, 0 }, /* FCC1 MII COL */
- /* PA30 */ { CFG_FCC1, 1, 1, 0, 0, 0 }, /* FCC1 MII CRS */
- /* PA29 */ { CFG_FCC1, 1, 1, 1, 0, 0 }, /* FCC1 MII TX_ER */
- /* PA28 */ { CFG_FCC1, 1, 1, 1, 0, 0 }, /* FCC1 MII TX_EN */
- /* PA27 */ { CFG_FCC1, 1, 1, 0, 0, 0 }, /* FCC1 MII RX_DV */
- /* PA26 */ { CFG_FCC1, 1, 1, 0, 0, 0 }, /* FCC1 MII RX_ER */
- /* PA25 */ { 0, 0, 0, 0, 0, 0 }, /* PA25 */
- /* PA24 */ { 0, 0, 0, 0, 0, 0 }, /* PA24 */
- /* PA23 */ { 0, 0, 0, 0, 0, 0 }, /* PA23 */
- /* PA22 */ { 0, 0, 0, 0, 0, 0 }, /* PA22 */
- /* PA21 */ { CFG_FCC1, 1, 0, 1, 0, 0 }, /* FCC1 MII TxD[3] */
- /* PA20 */ { CFG_FCC1, 1, 0, 1, 0, 0 }, /* FCC1 MII TxD[2] */
- /* PA19 */ { CFG_FCC1, 1, 0, 1, 0, 0 }, /* FCC1 MII TxD[1] */
- /* PA18 */ { CFG_FCC1, 1, 0, 1, 0, 0 }, /* FCC1 MII TxD[0] */
- /* PA17 */ { CFG_FCC1, 1, 0, 0, 0, 0 }, /* FCC1 MII RxD[0] */
- /* PA16 */ { CFG_FCC1, 1, 0, 0, 0, 0 }, /* FCC1 MII RxD[1] */
- /* PA15 */ { CFG_FCC1, 1, 0, 0, 0, 0 }, /* FCC1 MII RxD[2] */
- /* PA14 */ { CFG_FCC1, 1, 0, 0, 0, 0 }, /* FCC1 MII RxD[3] */
- /* PA13 */ { 0, 0, 0, 0, 0, 0 }, /* PA13 */
- /* PA12 */ { 0, 0, 0, 0, 0, 0 }, /* PA12 */
- /* PA11 */ { 0, 0, 0, 0, 0, 0 }, /* PA11 */
- /* PA10 */ { 0, 0, 0, 0, 0, 0 }, /* PA10 */
- /* PA9 */ { 0, 0, 0, 0, 0, 0 }, /* PA9 */
- /* PA8 */ { 0, 0, 0, 0, 0, 0 }, /* PA8 */
- /* PA7 */ { 0, 0, 0, 1, 0, 0 }, /* PA7 */
- /* PA6 */ { 0, 0, 0, 0, 0, 0 }, /* PA6 */
- /* PA5 */ { 0, 0, 0, 1, 0, 0 }, /* PA5 */
- /* PA4 */ { 0, 0, 0, 1, 0, 0 }, /* PA4 */
- /* PA3 */ { 0, 0, 0, 1, 0, 0 }, /* PA3 */
- /* PA2 */ { 0, 0, 0, 1, 0, 0 }, /* PA2 */
- /* PA1 */ { 0, 0, 0, 0, 0, 0 }, /* PA1 */
- /* PA0 */ { 0, 0, 0, 1, 0, 0 } /* PA0 */
- },
-
- /* Port B configuration */
- { /* conf ppar psor pdir podr pdat */
- /* PB31 */ { CFG_FCC2, 1, 0, 1, 0, 0 }, /* FCC2 MII TX_ER */
- /* PB30 */ { CFG_FCC2, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_DV */
- /* PB29 */ { CFG_FCC2, 1, 1, 1, 0, 0 }, /* FCC2 MII TX_EN */
- /* PB28 */ { CFG_FCC2, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_ER */
- /* PB27 */ { CFG_FCC2, 1, 0, 0, 0, 0 }, /* FCC2 MII COL */
- /* PB26 */ { CFG_FCC2, 1, 0, 0, 0, 0 }, /* FCC2 MII CRS */
- /* PB25 */ { CFG_FCC2, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[3] */
- /* PB24 */ { CFG_FCC2, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[2] */
- /* PB23 */ { CFG_FCC2, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[1] */
- /* PB22 */ { CFG_FCC2, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[0] */
- /* PB21 */ { CFG_FCC2, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[0] */
- /* PB20 */ { CFG_FCC2, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[1] */
- /* PB19 */ { CFG_FCC2, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[2] */
- /* PB18 */ { CFG_FCC2, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[3] */
- /* PB17 */ { CFG_FCC3, 1, 0, 0, 0, 0 }, /* FCC3:RX_DIV */
- /* PB16 */ { CFG_FCC3, 1, 0, 0, 0, 0 }, /* FCC3:RX_ERR */
- /* PB15 */ { CFG_FCC3, 1, 0, 1, 0, 0 }, /* FCC3:TX_ERR */
- /* PB14 */ { CFG_FCC3, 1, 0, 1, 0, 0 }, /* FCC3:TX_EN */
- /* PB13 */ { CFG_FCC3, 1, 0, 0, 0, 0 }, /* FCC3:COL */
- /* PB12 */ { CFG_FCC3, 1, 0, 0, 0, 0 }, /* FCC3:CRS */
- /* PB11 */ { CFG_FCC3, 1, 0, 0, 0, 0 }, /* FCC3:RXD */
- /* PB10 */ { CFG_FCC3, 1, 0, 0, 0, 0 }, /* FCC3:RXD */
- /* PB9 */ { CFG_FCC3, 1, 0, 0, 0, 0 }, /* FCC3:RXD */
- /* PB8 */ { CFG_FCC3, 1, 0, 0, 0, 0 }, /* FCC3:RXD */
- /* PB7 */ { CFG_FCC3, 1, 0, 1, 0, 0 }, /* FCC3:TXD */
- /* PB6 */ { CFG_FCC3, 1, 0, 1, 0, 0 }, /* FCC3:TXD */
- /* PB5 */ { CFG_FCC3, 1, 0, 1, 0, 0 }, /* FCC3:TXD */
- /* PB4 */ { CFG_FCC3, 1, 0, 1, 0, 0 }, /* FCC3:TXD */
- /* PB3 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PB2 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PB1 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PB0 */ { 0, 0, 0, 0, 0, 0 } /* pin doesn't exist */
- },
-
- /* Port C */
- { /* conf ppar psor pdir podr pdat */
- /* PC31 */ { 0, 0, 0, 0, 0, 0 }, /* PC31 */
- /* PC30 */ { 0, 0, 0, 0, 0, 0 }, /* PC30 */
- /* PC29 */ { 0, 0, 0, 0, 0, 0 }, /* PC29 */
- /* PC28 */ { 0, 0, 0, 0, 0, 0 }, /* PC28 */
- /* PC27 */ { 0, 0, 0, 0, 0, 0 }, /* PC27 */
- /* PC26 */ { 0, 0, 0, 0, 0, 0 }, /* PC26 */
- /* PC25 */ { 0, 0, 0, 0, 0, 0 }, /* PC25 */
- /* PC24 */ { 0, 0, 0, 0, 0, 0 }, /* PC24 */
- /* PC23 */ { 0, 0, 0, 0, 0, 0 }, /* PC23 */
- /* PC22 */ { CFG_FCC1, 1, 0, 0, 0, 0 }, /* FCC1 MII Tx Clock (CLK10) */
- /* PC21 */ { CFG_FCC1, 1, 0, 0, 0, 0 }, /* FCC1 MII Rx Clock (CLK11) */
- /* PC20 */ { 0, 0, 0, 0, 0, 0 }, /* PC20 */
-#if CONFIG_ADSTYPE == CFG_8272ADS
- /* PC19 */ { 1, 0, 0, 1, 0, 0 }, /* FETHMDC */
- /* PC18 */ { 1, 0, 0, 0, 0, 0 }, /* FETHMDIO */
- /* PC17 */ { CFG_FCC2, 1, 0, 0, 0, 0 }, /* FCC2 MII Rx Clock (CLK15) */
- /* PC16 */ { CFG_FCC2, 1, 0, 0, 0, 0 }, /* FCC2 MII Tx Clock (CLK16) */
-#else
- /* PC19 */ { CFG_FCC2, 1, 0, 0, 0, 0 }, /* FCC2 MII Rx Clock (CLK13) */
- /* PC18 */ { CFG_FCC2, 1, 0, 0, 0, 0 }, /* FCC2 MII Tx Clock (CLK14) */
- /* PC17 */ { 0, 0, 0, 0, 0, 0 }, /* PC17 */
- /* PC16 */ { 0, 0, 0, 0, 0, 0 }, /* PC16 */
-#endif /* CONFIG_ADSTYPE == CFG_8272ADS */
- /* PC15 */ { 0, 0, 0, 0, 0, 0 }, /* PC15 */
- /* PC14 */ { 0, 0, 0, 0, 0, 0 }, /* PC14 */
- /* PC13 */ { 0, 0, 0, 0, 0, 0 }, /* PC13 */
- /* PC12 */ { 0, 0, 0, 0, 0, 0 }, /* PC12 */
- /* PC11 */ { 0, 0, 0, 0, 0, 0 }, /* PC11 */
-#if CONFIG_ADSTYPE == CFG_8272ADS
- /* PC10 */ { 0, 0, 0, 0, 0, 0 }, /* PC10 */
- /* PC9 */ { 0, 0, 0, 0, 0, 0 }, /* PC9 */
-#else
- /* PC10 */ { 1, 0, 0, 1, 0, 0 }, /* FETHMDC */
- /* PC9 */ { 1, 0, 0, 0, 0, 0 }, /* FETHMDIO */
-#endif /* CONFIG_ADSTYPE == CFG_8272ADS */
- /* PC8 */ { 0, 0, 0, 0, 0, 0 }, /* PC8 */
- /* PC7 */ { 0, 0, 0, 0, 0, 0 }, /* PC7 */
- /* PC6 */ { 0, 0, 0, 0, 0, 0 }, /* PC6 */
- /* PC5 */ { 0, 0, 0, 0, 0, 0 }, /* PC5 */
- /* PC4 */ { 0, 0, 0, 0, 0, 0 }, /* PC4 */
- /* PC3 */ { 0, 0, 0, 0, 0, 0 }, /* PC3 */
- /* PC2 */ { 0, 0, 0, 0, 0, 0 }, /* PC2 */
- /* PC1 */ { 0, 0, 0, 0, 0, 0 }, /* PC1 */
- /* PC0 */ { 0, 0, 0, 0, 0, 0 }, /* PC0 */
- },
-
- /* Port D */
- { /* conf ppar psor pdir podr pdat */
- /* PD31 */ { 1, 1, 0, 0, 0, 0 }, /* SCC1 UART RxD */
- /* PD30 */ { 1, 1, 1, 1, 0, 0 }, /* SCC1 UART TxD */
- /* PD29 */ { 0, 0, 0, 0, 0, 0 }, /* PD29 */
- /* PD28 */ { 0, 1, 0, 0, 0, 0 }, /* PD28 */
- /* PD27 */ { 0, 1, 1, 1, 0, 0 }, /* PD27 */
- /* PD26 */ { 0, 0, 0, 1, 0, 0 }, /* PD26 */
- /* PD25 */ { 0, 0, 0, 1, 0, 0 }, /* PD25 */
- /* PD24 */ { 0, 0, 0, 1, 0, 0 }, /* PD24 */
- /* PD23 */ { 0, 0, 0, 1, 0, 0 }, /* PD23 */
- /* PD22 */ { 0, 0, 0, 1, 0, 0 }, /* PD22 */
- /* PD21 */ { 0, 0, 0, 1, 0, 0 }, /* PD21 */
- /* PD20 */ { 0, 0, 0, 1, 0, 0 }, /* PD20 */
- /* PD19 */ { 0, 0, 0, 1, 0, 0 }, /* PD19 */
- /* PD18 */ { 0, 0, 0, 1, 0, 0 }, /* PD18 */
- /* PD17 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXPRTY */
- /* PD16 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXPRTY */
- /* PD15 */ { 1, 1, 1, 0, 1, 0 }, /* I2C SDA */
- /* PD14 */ { 1, 1, 1, 0, 1, 0 }, /* I2C SCL */
- /* PD13 */ { 0, 0, 0, 0, 0, 0 }, /* PD13 */
- /* PD12 */ { 0, 0, 0, 0, 0, 0 }, /* PD12 */
- /* PD11 */ { 0, 0, 0, 0, 0, 0 }, /* PD11 */
- /* PD10 */ { 0, 0, 0, 0, 0, 0 }, /* PD10 */
- /* PD9 */ { 0, 1, 0, 1, 0, 0 }, /* SMC1 TXD */
- /* PD8 */ { 0, 1, 0, 0, 0, 0 }, /* SMC1 RXD */
- /* PD7 */ { 0, 0, 0, 1, 0, 1 }, /* PD7 */
- /* PD6 */ { 0, 0, 0, 1, 0, 1 }, /* PD6 */
- /* PD5 */ { 0, 0, 0, 1, 0, 1 }, /* PD5 */
- /* PD4 */ { 0, 0, 0, 1, 0, 1 }, /* PD4 */
- /* PD3 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PD2 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PD1 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PD0 */ { 0, 0, 0, 0, 0, 0 } /* pin doesn't exist */
- }
-};
-
-void reset_phy (void)
-{
- vu_long *bcsr = (vu_long *)CFG_BCSR;
-
- /* Reset the PHY */
-#if CFG_PHY_ADDR == 0
- bcsr[1] &= ~(FETHIEN1 | FETH1_RST);
- udelay(2);
- bcsr[1] |= FETH1_RST;
-#else
- bcsr[3] &= ~(FETHIEN2 | FETH2_RST);
- udelay(2);
- bcsr[3] |= FETH2_RST;
-#endif /* CFG_PHY_ADDR == 0 */
- udelay(1000);
-#ifdef CONFIG_MII
-#if CONFIG_ADSTYPE >= CFG_PQ2FADS
- /*
- * Do not bypass Rx/Tx (de)scrambler (fix configuration error)
- * Enable autonegotiation.
- */
- bb_miiphy_write(NULL, CFG_PHY_ADDR, 16, 0x610);
- bb_miiphy_write(NULL, CFG_PHY_ADDR, PHY_BMCR,
- PHY_BMCR_AUTON | PHY_BMCR_RST_NEG);
-#else
- /*
- * Ethernet PHY is configured (by means of configuration pins)
- * to work at 10Mb/s only. We reconfigure it using MII
- * to advertise all capabilities, including 100Mb/s, and
- * restart autonegotiation.
- */
-
- /* Advertise all capabilities */
- bb_miiphy_write(NULL, CFG_PHY_ADDR, PHY_ANAR, 0x01E1);
-
- /* Do not bypass Rx/Tx (de)scrambler */
- bb_miiphy_write(NULL, CFG_PHY_ADDR, PHY_DCR, 0x0000);
-
- bb_miiphy_write(NULL, CFG_PHY_ADDR, PHY_BMCR,
- PHY_BMCR_AUTON | PHY_BMCR_RST_NEG);
-#endif /* CONFIG_ADSTYPE == CFG_PQ2FADS */
-#endif /* CONFIG_MII */
-}
-
-#ifdef CONFIG_PCI
-typedef struct pci_ic_s {
- unsigned long pci_int_stat;
- unsigned long pci_int_mask;
-}pci_ic_t;
-#endif
-
-int board_early_init_f (void)
-{
- vu_long *bcsr = (vu_long *)CFG_BCSR;
-
-#ifdef CONFIG_PCI
- volatile pci_ic_t* pci_ic = (pci_ic_t *) CFG_PCI_INT;
-
- /* mask alll the PCI interrupts */
- pci_ic->pci_int_mask |= 0xfff00000;
-#endif
-#if (CONFIG_CONS_INDEX == 1) || (CONFIG_KGDB_INDEX == 1)
- bcsr[1] &= ~RS232EN_1;
-#endif
-#if (CONFIG_CONS_INDEX > 1) || (CONFIG_KGDB_INDEX > 1)
- bcsr[1] &= ~RS232EN_2;
-#endif
-
-#if CONFIG_ADSTYPE != CFG_8260ADS /* PCI mode can be selected */
-#if CONFIG_ADSTYPE == CFG_PQ2FADS
- if ((bcsr[3] & BCSR_PCI_MODE) == 0) /* PCI mode selected by JP9 */
-#endif /* CONFIG_ADSTYPE == CFG_PQ2FADS */
- {
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
-
- immap->im_clkrst.car_sccr |= M826X_SCCR_PCI_MODE_EN;
- immap->im_siu_conf.sc_siumcr =
- (immap->im_siu_conf.sc_siumcr & ~SIUMCR_LBPC11)
- | SIUMCR_LBPC01;
- }
-#endif /* CONFIG_ADSTYPE != CFG_8260ADS */
-
- return 0;
-}
-
-#define ns2clk(ns) (ns / (1000000000 / CONFIG_8260_CLKIN) + 1)
-
-long int initdram (int board_type)
-{
-#if CONFIG_ADSTYPE == CFG_PQ2FADS
- long int msize = 32;
-#elif CONFIG_ADSTYPE == CFG_8272ADS
- long int msize = 64;
-#else
- long int msize = 16;
-#endif
-
-#ifndef CFG_RAMBOOT
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8260_t *memctl = &immap->im_memctl;
- volatile uchar *ramaddr, c = 0xff;
- uint or;
- uint psdmr;
- uint psrt;
-
- int i;
-
- immap->im_siu_conf.sc_ppc_acr = 0x00000002;
- immap->im_siu_conf.sc_ppc_alrh = 0x01267893;
- immap->im_siu_conf.sc_tescr1 = 0x00004000;
-
- memctl->memc_mptpr = CFG_MPTPR;
-#ifdef CFG_LSDRAM_BASE
- /*
- Initialise local bus SDRAM only if the pins
- are configured as local bus pins and not as PCI.
- The configuration is determined by the HRCW.
- */
- if ((immap->im_siu_conf.sc_siumcr & SIUMCR_LBPC11) == SIUMCR_LBPC00) {
- memctl->memc_lsrt = CFG_LSRT;
-#if CONFIG_ADSTYPE == CFG_PQ2FADS /* CS3 */
- memctl->memc_or3 = 0xFF803280;
- memctl->memc_br3 = CFG_LSDRAM_BASE | 0x00001861;
-#else /* CS4 */
- memctl->memc_or4 = 0xFFC01480;
- memctl->memc_br4 = CFG_LSDRAM_BASE | 0x00001861;
-#endif /* CONFIG_ADSTYPE == CFG_PQ2FADS */
- memctl->memc_lsdmr = CFG_LSDMR | 0x28000000;
- ramaddr = (uchar *) CFG_LSDRAM_BASE;
- *ramaddr = c;
- memctl->memc_lsdmr = CFG_LSDMR | 0x08000000;
- for (i = 0; i < 8; i++)
- *ramaddr = c;
- memctl->memc_lsdmr = CFG_LSDMR | 0x18000000;
- *ramaddr = c;
- memctl->memc_lsdmr = CFG_LSDMR | 0x40000000;
- }
-#endif /* CFG_LSDRAM_BASE */
-
- /* Init 60x bus SDRAM */
-#ifdef CONFIG_SPD_EEPROM
- {
- spd_eeprom_t spd;
- uint pbi, bsel, rowst, lsb, tmp;
-
- i2c_read (CONFIG_SPD_ADDR, 0, 1, (uchar *) & spd, sizeof (spd));
-
- /* Bank-based interleaving is not supported for physical bank
- sizes greater than 128MB which is encoded as 0x20 in SPD
- */
- pbi = (spd.row_dens > 32) ? 1 : CONFIG_SDRAM_PBI;
- msize = spd.nrows * (4 * spd.row_dens); /* Mixed size not supported */
- or = ~(msize - 1) << 20; /* SDAM */
- switch (spd.nbanks) { /* BPD */
- case 2:
- bsel = 1;
- break;
- case 4:
- bsel = 2;
- or |= 0x00002000;
- break;
- case 8:
- bsel = 3;
- or |= 0x00004000;
- break;
- }
- lsb = 3; /* For 64-bit port, lsb is 3 bits */
-
- if (pbi) { /* Bus partition depends on interleaving */
- rowst = 32 - (spd.nrow_addr + spd.ncol_addr + bsel + lsb);
- or |= (rowst << 9); /* ROWST */
- } else {
- rowst = 32 - (spd.nrow_addr + spd.ncol_addr + lsb);
- or |= ((rowst * 2 - 12) << 9); /* ROWST */
- }
- or |= ((spd.nrow_addr - 9) << 6); /* NUMR */
-
- psdmr = (pbi << 31); /* PBI */
- /* Bus multiplexing parameters */
- tmp = 32 - (lsb + spd.nrow_addr); /* Tables 10-19 and 10-20 */
- psdmr |= ((tmp - (rowst - 5) - 13) << 24); /* SDAM */
- psdmr |= ((tmp - 3 - 12) << 21); /* BSMA */
-
- tmp = (31 - lsb - 10) - tmp;
- /* Pin connected to SDA10 is (31 - lsb - 10).
- rowst is multiplexed over (32 - (lsb + spd.nrow_addr)),
- so (rowst + tmp) alternates with AP.
- */
- if (pbi) /* Table 10-7 */
- psdmr |= ((10 - (rowst + tmp)) << 18); /* SDA10 */
- else
- psdmr |= ((12 - (rowst + tmp)) << 18); /* SDA10 */
-
- /* SDRAM device-specific parameters */
- tmp = ns2clk (70); /* Refresh recovery is not in SPD, so assume 70ns */
- switch (tmp) { /* RFRC */
- case 1:
- case 2:
- psdmr |= (1 << 15);
- break;
- case 3:
- case 4:
- case 5:
- case 6:
- case 7:
- case 8:
- psdmr |= ((tmp - 2) << 15);
- break;
- default:
- psdmr |= (7 << 15);
- }
- psdmr |= (ns2clk (spd.trp) % 8 << 12); /* PRETOACT */
- psdmr |= (ns2clk (spd.trcd) % 8 << 9); /* ACTTORW */
- /* BL=0 because for 64-bit SDRAM burst length must be 4 */
- /* LDOTOPRE ??? */
- for (i = 0, tmp = spd.write_lat; (i < 4) && ((tmp & 1) == 0); i++)
- tmp >>= 1;
- switch (i) { /* WRC */
- case 0:
- case 1:
- psdmr |= (1 << 4);
- break;
- case 2:
- case 3:
- psdmr |= (i << 4);
- break;
- }
- /* EAMUX=0 - no external address multiplexing */
- /* BUFCMD=0 - no external buffers */
- for (i = 1, tmp = spd.cas_lat; (i < 3) && ((tmp & 1) == 0); i++)
- tmp >>= 1;
- psdmr |= i; /* CL */
-
- switch (spd.refresh & 0x7F) {
- case 1:
- tmp = 3900;
- break;
- case 2:
- tmp = 7800;
- break;
- case 3:
- tmp = 31300;
- break;
- case 4:
- tmp = 62500;
- break;
- case 5:
- tmp = 125000;
- break;
- default:
- tmp = 15625;
- }
- psrt = tmp / (1000000000 / CONFIG_8260_CLKIN *
- ((memctl->memc_mptpr >> 8) + 1)) - 1;
-#ifdef SPD_DEBUG
- printf ("\nDIMM type: %-18.18s\n", spd.mpart);
- printf ("SPD size: %d\n", spd.info_size);
- printf ("EEPROM size: %d\n", 1 << spd.chip_size);
- printf ("Memory type: %d\n", spd.mem_type);
- printf ("Row addr: %d\n", spd.nrow_addr);
- printf ("Column addr: %d\n", spd.ncol_addr);
- printf ("# of rows: %d\n", spd.nrows);
- printf ("Row density: %d\n", spd.row_dens);
- printf ("# of banks: %d\n", spd.nbanks);
- printf ("Data width: %d\n",
- 256 * spd.dataw_msb + spd.dataw_lsb);
- printf ("Chip width: %d\n", spd.primw);
- printf ("Refresh rate: %02X\n", spd.refresh);
- printf ("CAS latencies: %02X\n", spd.cas_lat);
- printf ("Write latencies: %02X\n", spd.write_lat);
- printf ("tRP: %d\n", spd.trp);
- printf ("tRCD: %d\n", spd.trcd);
-
- printf ("OR=%X, PSDMR=%08X, PSRT=%0X\n", or, psdmr, psrt);
-#endif /* SPD_DEBUG */
- }
-#else /* !CONFIG_SPD_EEPROM */
- or = CFG_OR2;
- psdmr = CFG_PSDMR;
- psrt = CFG_PSRT;
-#endif /* CONFIG_SPD_EEPROM */
- memctl->memc_psrt = psrt;
- memctl->memc_or2 = or;
- memctl->memc_br2 = CFG_SDRAM_BASE | 0x00000041;
- ramaddr = (uchar *) CFG_SDRAM_BASE;
- memctl->memc_psdmr = psdmr | 0x28000000; /* Precharge all banks */
- *ramaddr = c;
- memctl->memc_psdmr = psdmr | 0x08000000; /* CBR refresh */
- for (i = 0; i < 8; i++)
- *ramaddr = c;
-
- memctl->memc_psdmr = psdmr | 0x18000000; /* Mode Register write */
- *ramaddr = c;
- memctl->memc_psdmr = psdmr | 0x40000000; /* Refresh enable */
- *ramaddr = c;
-#endif /* CFG_RAMBOOT */
-
- /* return total 60x bus SDRAM size */
- return (msize * 1024 * 1024);
-}
-
-int checkboard (void)
-{
-#if CONFIG_ADSTYPE == CFG_8260ADS
- puts ("Board: Motorola MPC8260ADS\n");
-#elif CONFIG_ADSTYPE == CFG_8266ADS
- puts ("Board: Motorola MPC8266ADS\n");
-#elif CONFIG_ADSTYPE == CFG_PQ2FADS
- puts ("Board: Motorola PQ2FADS-ZU\n");
-#elif CONFIG_ADSTYPE == CFG_8272ADS
- puts ("Board: Motorola MPC8272ADS\n");
-#else
- puts ("Board: unknown\n");
-#endif
- return 0;
-}
-
-#ifdef CONFIG_PCI
-struct pci_controller hose;
-
-extern void pci_mpc8250_init(struct pci_controller *);
-
-void pci_init_board(void)
-{
- pci_mpc8250_init(&hose);
-}
-#endif
diff --git a/board/mpc8260ads/u-boot.lds b/board/mpc8260ads/u-boot.lds
deleted file mode 100644
index bf8048d27e..0000000000
--- a/board/mpc8260ads/u-boot.lds
+++ /dev/null
@@ -1,125 +0,0 @@
-/*
- * (C) Copyright 2001-2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * Modified by Yuli Barcohen <yuli@arabellasw.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc8260/start.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
-ENTRY(_start)
diff --git a/board/mpc8266ads/Makefile b/board/mpc8266ads/Makefile
deleted file mode 100644
index cd0f40bcdf..0000000000
--- a/board/mpc8266ads/Makefile
+++ /dev/null
@@ -1,46 +0,0 @@
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := $(BOARD).o flash.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/mpc8266ads/config.mk b/board/mpc8266ads/config.mk
deleted file mode 100644
index ecc2a7db61..0000000000
--- a/board/mpc8266ads/config.mk
+++ /dev/null
@@ -1,32 +0,0 @@
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# Modified by, Stuart Hughes, Lineo Inc, stuarth@lineo.com
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# mpc8260ads board
-#
-
-TEXT_BASE = 0xfe000000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
diff --git a/board/mpc8266ads/flash.c b/board/mpc8266ads/flash.c
deleted file mode 100644
index 9512c72a0b..0000000000
--- a/board/mpc8266ads/flash.c
+++ /dev/null
@@ -1,509 +0,0 @@
-/*
- * (C) Copyright 2000, 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2001, Stuart Hughes, Lineo Inc, stuarth@lineo.com
- * Add support the Sharp chips on the mpc8260ads.
- * I started with board/ip860/flash.c and made changes I found in
- * the MTD project by David Schleef.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-#if defined(CFG_ENV_IS_IN_FLASH)
-# ifndef CFG_ENV_ADDR
-# define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_ENV_OFFSET)
-# endif
-# ifndef CFG_ENV_SIZE
-# define CFG_ENV_SIZE CFG_ENV_SECT_SIZE
-# endif
-# ifndef CFG_ENV_SECT_SIZE
-# define CFG_ENV_SECT_SIZE CFG_ENV_SIZE
-# endif
-#endif
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (vu_long *addr, flash_info_t *info);
-static int write_word (flash_info_t *info, ulong dest, ulong data);
-static int clear_block_lock_bit(vu_long * addr);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
-#ifndef CONFIG_MPC8266ADS
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- volatile ip860_bcsr_t *bcsr = (ip860_bcsr_t *)BCSR_BASE;
-#endif
- unsigned long size;
- int i;
-
- /* Init: enable write,
- * or we cannot even write flash commands
- */
-#ifndef CONFIG_MPC8266ADS
- bcsr->bd_ctrl |= BD_CTRL_FLWE;
-#endif
-
-
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
-
- /* set the default sector offset */
- }
-
- /* Static FLASH Bank configuration here - FIXME XXX */
-
- size = flash_get_size((vu_long *)FLASH_BASE, &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size, size<<20);
- }
-
-#ifndef CONFIG_MPC8266ADS
- /* Remap FLASH according to real size */
- memctl->memc_or1 = CFG_OR_TIMING_FLASH | (-size & 0xFFFF8000);
- memctl->memc_br1 = (CFG_FLASH_BASE & BR_BA_MSK) |
- (memctl->memc_br1 & ~(BR_BA_MSK));
-#endif
- /* Re-do sizing to get full correct info */
- size = flash_get_size((vu_long *)CFG_FLASH_BASE, &flash_info[0]);
-
- flash_info[0].size = size;
-
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
- /* monitor protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+monitor_flash_len-1,
- &flash_info[0]);
-#endif
-
-#ifdef CFG_ENV_IS_IN_FLASH
- /* ENV protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR+CFG_ENV_SECT_SIZE-1,
- &flash_info[0]);
-#endif
- return (size);
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_INTEL: printf ("Intel "); break;
- case FLASH_MAN_SHARP: printf ("Sharp "); break;
- default: printf ("Unknown Vendor "); break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_28F016SV: printf ("28F016SV (16 Mbit, 32 x 64k)\n");
- break;
- case FLASH_28F160S3: printf ("28F160S3 (16 Mbit, 32 x 512K)\n");
- break;
- case FLASH_28F320S3: printf ("28F320S3 (32 Mbit, 64 x 512K)\n");
- break;
- case FLASH_LH28F016SCT: printf ("28F016SC (16 Mbit, 32 x 64K)\n");
- break;
- default: printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " "
- );
- }
- printf ("\n");
-}
-
-/*-----------------------------------------------------------------------
- */
-
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-
-static ulong flash_get_size (vu_long *addr, flash_info_t *info)
-{
- short i;
- ulong value;
- ulong base = (ulong)addr;
- ulong sector_offset;
-
- /* Write "Intelligent Identifier" command: read Manufacturer ID */
- *addr = 0x90909090;
-
- value = addr[0] & 0x00FF00FF;
- switch (value) {
- case MT_MANUFACT: /* SHARP, MT or => Intel */
- case INTEL_ALT_MANU:
- info->flash_id = FLASH_MAN_INTEL;
- break;
- default:
- printf("unknown manufacturer: %x\n", (unsigned int)value);
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- return (0); /* no or unknown flash */
- }
-
- value = addr[1]; /* device ID */
-
- switch (value) {
- case (INTEL_ID_28F016S):
- info->flash_id += FLASH_28F016SV;
- info->sector_count = 32;
- info->size = 0x00400000;
- sector_offset = 0x20000;
- break; /* => 2x2 MB */
-
- case (INTEL_ID_28F160S3):
- info->flash_id += FLASH_28F160S3;
- info->sector_count = 32;
- info->size = 0x00400000;
- sector_offset = 0x20000;
- break; /* => 2x2 MB */
-
- case (INTEL_ID_28F320S3):
- info->flash_id += FLASH_28F320S3;
- info->sector_count = 64;
- info->size = 0x00800000;
- sector_offset = 0x20000;
- break; /* => 2x4 MB */
-
- case SHARP_ID_28F016SCL:
- case SHARP_ID_28F016SCZ:
- info->flash_id = FLASH_MAN_SHARP | FLASH_LH28F016SCT;
- info->sector_count = 32;
- info->size = 0x00800000;
- sector_offset = 0x40000;
- break; /* => 4x2 MB */
-
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- return (0); /* => no or unknown flash */
-
- }
-
- /* set up sector start address table */
- for (i = 0; i < info->sector_count; i++) {
- info->start[i] = base;
- base += sector_offset;
- /* don't know how to check sector protection */
- info->protect[i] = 0;
- }
-
- /*
- * Prevent writes to uninitialized FLASH.
- */
- if (info->flash_id != FLASH_UNKNOWN) {
- addr = (vu_long *)info->start[0];
-
- *addr = 0xFFFFFF; /* reset bank to read array mode */
- }
-
- return (info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- int flag, prot, sect;
- ulong start, now, last;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- if ( ((info->flash_id & FLASH_VENDMASK) != FLASH_MAN_INTEL)
- && ((info->flash_id & FLASH_VENDMASK) != FLASH_MAN_SHARP) ) {
- printf ("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- /* Make Sure Block Lock Bit is not set. */
- if(clear_block_lock_bit((vu_long *)(info->start[s_first]))){
- return 1;
- }
-
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- vu_long *addr = (vu_long *)(info->start[sect]);
-
- last = start = get_timer (0);
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- /* Reset Array */
- *addr = 0xffffffff;
- /* Clear Status Register */
- *addr = 0x50505050;
- /* Single Block Erase Command */
- *addr = 0x20202020;
- /* Confirm */
- *addr = 0xD0D0D0D0;
-
- if((info->flash_id & FLASH_TYPEMASK) != FLASH_LH28F016SCT) {
- /* Resume Command, as per errata update */
- *addr = 0xD0D0D0D0;
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
- while ((*addr & 0x80808080) != 0x80808080) {
- if(*addr & 0x20202020){
- printf("Error in Block Erase - Lock Bit may be set!\n");
- printf("Status Register = 0x%X\n", (uint)*addr);
- *addr = 0xFFFFFFFF; /* reset bank */
- return 1;
- }
- if ((now=get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- *addr = 0xFFFFFFFF; /* reset bank */
- return 1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- }
-
- /* reset to read mode */
- *addr = 0xFFFFFFFF;
- }
- }
-
- printf (" done\n");
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int i, l, rc;
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
- for (; i<4 && cnt>0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = 0;
- for (i=0; i<4; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- return (write_word(info, wp, data));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word (flash_info_t *info, ulong dest, ulong data)
-{
- vu_long *addr = (vu_long *)dest;
- ulong start, csr;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*addr & data) != data) {
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- /* Write Command */
- *addr = 0x10101010;
-
- /* Write Data */
- *addr = data;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* data polling for D7 */
- start = get_timer (0);
- flag = 0;
- while (((csr = *addr) & 0x80808080) != 0x80808080) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- flag = 1;
- break;
- }
- }
- if (csr & 0x40404040) {
- printf ("CSR indicates write error (%08lx) at %08lx\n", csr, (ulong)addr);
- flag = 1;
- }
-
- /* Clear Status Registers Command */
- *addr = 0x50505050;
- /* Reset to read array mode */
- *addr = 0xFFFFFFFF;
-
- return (flag);
-}
-
-/*-----------------------------------------------------------------------
- * Clear Block Lock Bit, returns:
- * 0 - OK
- * 1 - Timeout
- */
-
-static int clear_block_lock_bit(vu_long * addr)
-{
- ulong start, now;
-
- /* Reset Array */
- *addr = 0xffffffff;
- /* Clear Status Register */
- *addr = 0x50505050;
-
- *addr = 0x60606060;
- *addr = 0xd0d0d0d0;
-
- start = get_timer (0);
- while(*addr != 0x80808080){
- if ((now=get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout on clearing Block Lock Bit\n");
- *addr = 0xFFFFFFFF; /* reset bank */
- return 1;
- }
- }
- return 0;
-}
diff --git a/board/mpc8266ads/mpc8266ads.c b/board/mpc8266ads/mpc8266ads.c
deleted file mode 100644
index 8f7273c41d..0000000000
--- a/board/mpc8266ads/mpc8266ads.c
+++ /dev/null
@@ -1,586 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * Modified during 2001 by
- * Advanced Communications Technologies (Australia) Pty. Ltd.
- * Howard Walker, Tuong Vu-Dinh
- *
- * (C) Copyright 2001, Stuart Hughes, Lineo Inc, stuarth@lineo.com
- * Added support for the 16M dram simm on the 8260ads boards
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <ioports.h>
-#include <i2c.h>
-#include <mpc8260.h>
-#include <pci.h>
-
-/*
- * PBI Page Based Interleaving
- * PSDMR_PBI page based interleaving
- * 0 bank based interleaving
- * External Address Multiplexing (EAMUX) adds a clock to address cycles
- * (this can help with marginal board layouts)
- * PSDMR_EAMUX adds a clock
- * 0 no extra clock
- * Buffer Command (BUFCMD) adds a clock to command cycles.
- * PSDMR_BUFCMD adds a clock
- * 0 no extra clock
- */
-#define CONFIG_PBI 0
-#define PESSIMISTIC_SDRAM 0
-#define EAMUX 0 /* EST requires EAMUX */
-#define BUFCMD 0
-
-
-/*
- * I/O Port configuration table
- *
- * if conf is 1, then that port pin will be configured at boot time
- * according to the five values podr/pdir/ppar/psor/pdat for that entry
- */
-
-const iop_conf_t iop_conf_tab[4][32] = {
-
- /* Port A configuration */
- { /* conf ppar psor pdir podr pdat */
- /* PA31 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 TxENB */
- /* PA30 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 TxClav */
- /* PA29 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 TxSOC */
- /* PA28 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 RxENB */
- /* PA27 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 RxSOC */
- /* PA26 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 RxClav */
- /* PA25 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[0] */
- /* PA24 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[1] */
- /* PA23 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[2] */
- /* PA22 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[3] */
- /* PA21 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[4] */
- /* PA20 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[5] */
- /* PA19 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[6] */
- /* PA18 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[7] */
- /* PA17 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[7] */
- /* PA16 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[6] */
- /* PA15 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[5] */
- /* PA14 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[4] */
- /* PA13 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[3] */
- /* PA12 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[2] */
- /* PA11 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[1] */
- /* PA10 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[0] */
- /* PA9 */ { 0, 1, 1, 1, 0, 0 }, /* FCC1 L1TXD */
- /* PA8 */ { 0, 1, 1, 0, 0, 0 }, /* FCC1 L1RXD */
- /* PA7 */ { 0, 0, 0, 1, 0, 0 }, /* PA7 */
- /* PA6 */ { 1, 1, 1, 1, 0, 0 }, /* TDM A1 L1RSYNC */
- /* PA5 */ { 0, 0, 0, 1, 0, 0 }, /* PA5 */
- /* PA4 */ { 0, 0, 0, 1, 0, 0 }, /* PA4 */
- /* PA3 */ { 0, 0, 0, 1, 0, 0 }, /* PA3 */
- /* PA2 */ { 0, 0, 0, 1, 0, 0 }, /* PA2 */
- /* PA1 */ { 1, 0, 0, 0, 0, 0 }, /* FREERUN */
- /* PA0 */ { 0, 0, 0, 1, 0, 0 } /* PA0 */
- },
-
- /* Port B configuration */
- { /* conf ppar psor pdir podr pdat */
- /* PB31 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TX_ER */
- /* PB30 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_DV */
- /* PB29 */ { 1, 1, 1, 1, 0, 0 }, /* FCC2 MII TX_EN */
- /* PB28 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_ER */
- /* PB27 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII COL */
- /* PB26 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII CRS */
- /* PB25 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[3] */
- /* PB24 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[2] */
- /* PB23 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[1] */
- /* PB22 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[0] */
- /* PB21 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[0] */
- /* PB20 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[1] */
- /* PB19 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[2] */
- /* PB18 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[3] */
- /* PB17 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:RX_DIV */
- /* PB16 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:RX_ERR */
- /* PB15 */ { 0, 1, 0, 1, 0, 0 }, /* FCC3:TX_ERR */
- /* PB14 */ { 0, 1, 0, 1, 0, 0 }, /* FCC3:TX_EN */
- /* PB13 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:COL */
- /* PB12 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:CRS */
- /* PB11 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:RXD */
- /* PB10 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:RXD */
- /* PB9 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:RXD */
- /* PB8 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:RXD */
- /* PB7 */ { 0, 1, 0, 1, 0, 0 }, /* FCC3:TXD */
- /* PB6 */ { 0, 1, 0, 1, 0, 0 }, /* FCC3:TXD */
- /* PB5 */ { 0, 1, 0, 1, 0, 0 }, /* FCC3:TXD */
- /* PB4 */ { 0, 1, 0, 1, 0, 0 }, /* FCC3:TXD */
- /* PB3 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PB2 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PB1 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PB0 */ { 0, 0, 0, 0, 0, 0 } /* pin doesn't exist */
- },
-
- /* Port C */
- { /* conf ppar psor pdir podr pdat */
- /* PC31 */ { 0, 0, 0, 1, 0, 0 }, /* PC31 */
- /* PC30 */ { 0, 0, 0, 1, 0, 0 }, /* PC30 */
- /* PC29 */ { 0, 1, 1, 0, 0, 0 }, /* SCC1 EN *CLSN */
- /* PC28 */ { 0, 0, 0, 1, 0, 0 }, /* PC28 */
- /* PC27 */ { 0, 0, 0, 1, 0, 0 }, /* UART Clock in */
- /* PC26 */ { 0, 0, 0, 1, 0, 0 }, /* PC26 */
- /* PC25 */ { 0, 0, 0, 1, 0, 0 }, /* PC25 */
- /* PC24 */ { 0, 0, 0, 1, 0, 0 }, /* PC24 */
- /* PC23 */ { 0, 1, 0, 1, 0, 0 }, /* ATMTFCLK */
- /* PC22 */ { 0, 1, 0, 0, 0, 0 }, /* ATMRFCLK */
- /* PC21 */ { 0, 1, 0, 0, 0, 0 }, /* SCC1 EN RXCLK */
- /* PC20 */ { 0, 1, 0, 0, 0, 0 }, /* SCC1 EN TXCLK */
- /* PC19 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_CLK CLK13 */
- /* PC18 */ { 1, 1, 0, 0, 0, 0 }, /* FCC Tx Clock (CLK14) */
- /* PC17 */ { 0, 0, 0, 1, 0, 0 }, /* PC17 */
- /* PC16 */ { 0, 1, 0, 0, 0, 0 }, /* FCC Tx Clock (CLK16) */
- /* PC15 */ { 0, 0, 0, 1, 0, 0 }, /* PC15 */
- /* PC14 */ { 0, 1, 0, 0, 0, 0 }, /* SCC1 EN *CD */
- /* PC13 */ { 0, 0, 0, 1, 0, 0 }, /* PC13 */
- /* PC12 */ { 0, 1, 0, 1, 0, 0 }, /* PC12 */
- /* PC11 */ { 0, 0, 0, 1, 0, 0 }, /* LXT971 transmit control */
- /* PC10 */ { 1, 0, 0, 1, 0, 0 }, /* LXT970 FETHMDC */
- /* PC9 */ { 1, 0, 0, 0, 0, 0 }, /* LXT970 FETHMDIO */
- /* PC8 */ { 0, 0, 0, 1, 0, 0 }, /* PC8 */
- /* PC7 */ { 0, 0, 0, 1, 0, 0 }, /* PC7 */
- /* PC6 */ { 0, 0, 0, 1, 0, 0 }, /* PC6 */
- /* PC5 */ { 0, 0, 0, 1, 0, 0 }, /* PC5 */
- /* PC4 */ { 0, 0, 0, 1, 0, 0 }, /* PC4 */
- /* PC3 */ { 0, 0, 0, 1, 0, 0 }, /* PC3 */
- /* PC2 */ { 0, 0, 0, 1, 0, 1 }, /* ENET FDE */
- /* PC1 */ { 0, 0, 0, 1, 0, 0 }, /* ENET DSQE */
- /* PC0 */ { 0, 0, 0, 1, 0, 0 }, /* ENET LBK */
- },
-
- /* Port D */
- { /* conf ppar psor pdir podr pdat */
- /* PD31 */ { 1, 1, 0, 0, 0, 0 }, /* SCC1 EN RxD */
- /* PD30 */ { 1, 1, 1, 1, 0, 0 }, /* SCC1 EN TxD */
- /* PD29 */ { 0, 1, 0, 1, 0, 0 }, /* SCC1 EN TENA */
- /* PD28 */ { 0, 1, 0, 0, 0, 0 }, /* PD28 */
- /* PD27 */ { 0, 1, 1, 1, 0, 0 }, /* PD27 */
- /* PD26 */ { 0, 0, 0, 1, 0, 0 }, /* PD26 */
- /* PD25 */ { 0, 0, 0, 1, 0, 0 }, /* PD25 */
- /* PD24 */ { 0, 0, 0, 1, 0, 0 }, /* PD24 */
- /* PD23 */ { 0, 0, 0, 1, 0, 0 }, /* PD23 */
- /* PD22 */ { 0, 0, 0, 1, 0, 0 }, /* PD22 */
- /* PD21 */ { 0, 0, 0, 1, 0, 0 }, /* PD21 */
- /* PD20 */ { 0, 0, 0, 1, 0, 0 }, /* PD20 */
- /* PD19 */ { 0, 0, 0, 1, 0, 0 }, /* PD19 */
- /* PD18 */ { 0, 0, 0, 1, 0, 0 }, /* PD18 */
- /* PD17 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXPRTY */
- /* PD16 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXPRTY */
- /* PD15 */ { 1, 1, 1, 0, 1, 0 }, /* I2C SDA */
- /* PD14 */ { 1, 1, 1, 0, 1, 0 }, /* I2C SCL */
- /* PD13 */ { 0, 0, 0, 0, 0, 0 }, /* PD13 */
- /* PD12 */ { 0, 0, 0, 0, 0, 0 }, /* PD12 */
- /* PD11 */ { 0, 0, 0, 0, 0, 0 }, /* PD11 */
- /* PD10 */ { 0, 0, 0, 0, 0, 0 }, /* PD10 */
- /* PD9 */ { 1, 1, 0, 1, 0, 0 }, /* SMC1 TXD */
- /* PD8 */ { 1, 1, 0, 0, 0, 0 }, /* SMC1 RXD */
- /* PD7 */ { 0, 0, 0, 1, 0, 1 }, /* PD7 */
- /* PD6 */ { 0, 0, 0, 1, 0, 1 }, /* PD6 */
- /* PD5 */ { 0, 0, 0, 1, 0, 1 }, /* PD5 */
- /* PD4 */ { 0, 0, 0, 1, 0, 1 }, /* PD4 */
- /* PD3 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PD2 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PD1 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PD0 */ { 0, 0, 0, 0, 0, 0 } /* pin doesn't exist */
- }
-};
-
-typedef struct bscr_ {
- unsigned long bcsr0;
- unsigned long bcsr1;
- unsigned long bcsr2;
- unsigned long bcsr3;
- unsigned long bcsr4;
- unsigned long bcsr5;
- unsigned long bcsr6;
- unsigned long bcsr7;
-} bcsr_t;
-
-typedef struct pci_ic_s {
- unsigned long pci_int_stat;
- unsigned long pci_int_mask;
-} pci_ic_t;
-
-void reset_phy(void)
-{
- volatile bcsr_t *bcsr = (bcsr_t *)CFG_BCSR;
-
- /* reset the FEC port */
- bcsr->bcsr1 &= ~FETH_RST;
- bcsr->bcsr1 |= FETH_RST;
-}
-
-
-int board_early_init_f (void)
-{
- volatile bcsr_t *bcsr = (bcsr_t *)CFG_BCSR;
- volatile pci_ic_t *pci_ic = (pci_ic_t *) CFG_PCI_INT;
-
- bcsr->bcsr1 = ~FETHIEN & ~RS232EN_1 & ~RS232EN_2;
-
- /* mask all PCI interrupts */
- pci_ic->pci_int_mask |= 0xfff00000;
-
- return 0;
-}
-
-int checkboard(void)
-{
- puts ("Board: Motorola MPC8266ADS\n");
- return 0;
-}
-
-long int initdram(int board_type)
-{
- /* Autoinit part stolen from board/sacsng/sacsng.c */
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile memctl8260_t *memctl = &immap->im_memctl;
- volatile uchar c = 0xff;
- volatile uchar *ramaddr = (uchar *)(CFG_SDRAM_BASE + 0x8);
- uint psdmr = CFG_PSDMR;
- int i;
-
- uint psrt = 0x21; /* for no SPD */
- uint chipselects = 1; /* for no SPD */
- uint sdram_size = CFG_SDRAM_SIZE * 1024 * 1024; /* for no SPD */
- uint or = CFG_OR2_PRELIM; /* for no SPD */
- uint data_width;
- uint rows;
- uint banks;
- uint cols;
- uint caslatency;
- uint width;
- uint rowst;
- uint sdam;
- uint bsma;
- uint sda10;
- u_char spd_size;
- u_char data;
- u_char cksum;
- int j;
-
- /* Keep the compiler from complaining about potentially uninitialized vars */
- data_width = rows = banks = cols = caslatency = 0;
-
- /*
- * Read the SDRAM SPD EEPROM via I2C.
- */
- i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
-
- i2c_read(SDRAM_SPD_ADDR, 0, 1, &data, 1);
- spd_size = data;
- cksum = data;
- for(j = 1; j < 64; j++)
- { /* read only the checksummed bytes */
- /* note: the I2C address autoincrements when alen == 0 */
- i2c_read(SDRAM_SPD_ADDR, 0, 0, &data, 1);
- /*printf("addr %d = 0x%02x\n", j, data);*/
- if(j == 5) chipselects = data & 0x0F;
- else if(j == 6) data_width = data;
- else if(j == 7) data_width |= data << 8;
- else if(j == 3) rows = data & 0x0F;
- else if(j == 4) cols = data & 0x0F;
- else if(j == 12)
- {
- /*
- * Refresh rate: this assumes the prescaler is set to
- * approximately 0.39uSec per tick and the target refresh period
- * is about 85% of maximum.
- */
- switch(data & 0x7F)
- {
- default:
- case 0: psrt = 0x21; /* 15.625uS */ break;
- case 1: psrt = 0x07; /* 3.9uS */ break;
- case 2: psrt = 0x0F; /* 7.8uS */ break;
- case 3: psrt = 0x43; /* 31.3uS */ break;
- case 4: psrt = 0x87; /* 62.5uS */ break;
- case 5: psrt = 0xFF; /* 125uS */ break;
- }
- }
- else if(j == 17) banks = data;
- else if(j == 18)
- {
- caslatency = 3; /* default CL */
-# if(PESSIMISTIC_SDRAM)
- if((data & 0x04) != 0) caslatency = 3;
- else if((data & 0x02) != 0) caslatency = 2;
- else if((data & 0x01) != 0) caslatency = 1;
-# else
- if((data & 0x01) != 0) caslatency = 1;
- else if((data & 0x02) != 0) caslatency = 2;
- else if((data & 0x04) != 0) caslatency = 3;
-# endif
- else
- {
- printf ("WARNING: Unknown CAS latency 0x%02X, using 3\n",
- data);
- }
- }
- else if(j == 63)
- {
- if(data != cksum)
- {
- printf ("WARNING: Configuration data checksum failure:"
- " is 0x%02x, calculated 0x%02x\n",
- data, cksum);
- }
- }
- cksum += data;
- }
-
- /* We don't trust CL less than 2 (only saw it on an old 16MByte DIMM) */
- if(caslatency < 2) {
- printf("CL was %d, forcing to 2\n", caslatency);
- caslatency = 2;
- }
- if(rows > 14) {
- printf("This doesn't look good, rows = %d, should be <= 14\n", rows);
- rows = 14;
- }
- if(cols > 11) {
- printf("This doesn't look good, columns = %d, should be <= 11\n", cols);
- cols = 11;
- }
-
- if((data_width != 64) && (data_width != 72))
- {
- printf("WARNING: SDRAM width unsupported, is %d, expected 64 or 72.\n",
- data_width);
- }
- width = 3; /* 2^3 = 8 bytes = 64 bits wide */
- /*
- * Convert banks into log2(banks)
- */
- if (banks == 2) banks = 1;
- else if(banks == 4) banks = 2;
- else if(banks == 8) banks = 3;
-
-
- sdram_size = 1 << (rows + cols + banks + width);
- /* hack for high density memory (512MB per CS) */
- /* !!!!! Will ONLY work with Page Based Interleave !!!!!
- ( PSDMR[PBI] = 1 )
- */
- /* mamory actually has 11 column addresses, but the memory controller
- doesn't really care.
- the calculations that follow will however move the rows so that
- they are muxed one bit off if you use 11 bit columns.
- The solution is to tell the memory controller the correct size of the memory
- but change the number of columns to 10 afterwards.
- The 11th column addre will still be mucxed correctly onto the bus.
-
- Also be aware that the MPC8266ADS board Rev B has not connected
- Row addres 13 to anything.
-
- The fix is to connect ADD16 (from U37-47) to SADDR12 (U28-126)
- */
- if (cols > 10)
- cols = 10;
-
-#if(CONFIG_PBI == 0) /* bank-based interleaving */
- rowst = ((32 - 6) - (rows + cols + width)) * 2;
-#else
- rowst = 32 - (rows + banks + cols + width);
-#endif
-
- or = ~(sdram_size - 1) | /* SDAM address mask */
- ((banks-1) << 13) | /* banks per device */
- (rowst << 9) | /* rowst */
- ((rows - 9) << 6); /* numr */
-
-
- /*printf("memctl->memc_or2 = 0x%08x\n", or);*/
-
- /*
- * SDAM specifies the number of columns that are multiplexed
- * (reference AN2165/D), defined to be (columns - 6) for page
- * interleave, (columns - 8) for bank interleave.
- *
- * BSMA is 14 - max(rows, cols). The bank select lines come
- * into play above the highest "address" line going into the
- * the SDRAM.
- */
-#if(CONFIG_PBI == 0) /* bank-based interleaving */
- sdam = cols - 8;
- bsma = ((31 - width) - 14) - ((rows > cols) ? rows : cols);
- sda10 = sdam + 2;
-#else
- sdam = cols + banks - 8;
- bsma = ((31 - width) - 14) - ((rows > cols) ? rows : cols);
- sda10 = sdam;
-#endif
-#if(PESSIMISTIC_SDRAM)
- psdmr = (CONFIG_PBI |\
- PSDMR_RFEN |\
- PSDMR_RFRC_16_CLK |\
- PSDMR_PRETOACT_8W |\
- PSDMR_ACTTORW_8W |\
- PSDMR_WRC_4C |\
- PSDMR_EAMUX |\
- PSDMR_BUFCMD) |\
- caslatency |\
- ((caslatency - 1) << 6) | /* LDOTOPRE is CL - 1 */ \
- (sdam << 24) |\
- (bsma << 21) |\
- (sda10 << 18);
-#else
- psdmr = (CONFIG_PBI |\
- PSDMR_RFEN |\
- PSDMR_RFRC_7_CLK |\
- PSDMR_PRETOACT_3W | /* 1 for 7E parts (fast PC-133) */ \
- PSDMR_ACTTORW_2W | /* 1 for 7E parts (fast PC-133) */ \
- PSDMR_WRC_1C | /* 1 clock + 7nSec */
- EAMUX |\
- BUFCMD) |\
- caslatency |\
- ((caslatency - 1) << 6) | /* LDOTOPRE is CL - 1 */ \
- (sdam << 24) |\
- (bsma << 21) |\
- (sda10 << 18);
-#endif
- /*printf("psdmr = 0x%08x\n", psdmr);*/
-
- /*
- * Quote from 8260 UM (10.4.2 SDRAM Power-On Initialization, 10-35):
- *
- * "At system reset, initialization software must set up the
- * programmable parameters in the memory controller banks registers
- * (ORx, BRx, P/LSDMR). After all memory parameters are configured,
- * system software should execute the following initialization sequence
- * for each SDRAM device.
- *
- * 1. Issue a PRECHARGE-ALL-BANKS command
- * 2. Issue eight CBR REFRESH commands
- * 3. Issue a MODE-SET command to initialize the mode register
- *
- * Quote from Micron MT48LC8M16A2 data sheet:
- *
- * "...the SDRAM requires a 100uS delay prior to issuing any
- * command other than a COMMAND INHIBIT or NOP. Starting at some
- * point during this 100uS period and continuing at least through
- * the end of this period, COMMAND INHIBIT or NOP commands should
- * be applied."
- *
- * "Once the 100uS delay has been satisfied with at least one COMMAND
- * INHIBIT or NOP command having been applied, a /PRECHARGE command/
- * should be applied. All banks must then be precharged, thereby
- * placing the device in the all banks idle state."
- *
- * "Once in the idle state, /two/ AUTO REFRESH cycles must be
- * performed. After the AUTO REFRESH cycles are complete, the
- * SDRAM is ready for mode register programming."
- *
- * (/emphasis/ mine, gvb)
- *
- * The way I interpret this, Micron start up sequence is:
- * 1. Issue a PRECHARGE-BANK command (initial precharge)
- * 2. Issue a PRECHARGE-ALL-BANKS command ("all banks ... precharged")
- * 3. Issue two (presumably, doing eight is OK) CBR REFRESH commands
- * 4. Issue a MODE-SET command to initialize the mode register
- *
- * --------
- *
- * The initial commands are executed by setting P/LSDMR[OP] and
- * accessing the SDRAM with a single-byte transaction."
- *
- * The appropriate BRx/ORx registers have already been set when we
- * get here. The SDRAM can be accessed at the address CFG_SDRAM_BASE.
- */
-
- memctl->memc_mptpr = CFG_MPTPR;
- memctl->memc_psrt = psrt;
-
- memctl->memc_br2 = CFG_BR2_PRELIM;
- memctl->memc_or2 = or;
-
- memctl->memc_psdmr = psdmr | PSDMR_OP_PREA;
- *ramaddr = c;
-
- memctl->memc_psdmr = psdmr | PSDMR_OP_CBRR;
- for (i = 0; i < 8; i++)
- *ramaddr = c;
-
- memctl->memc_psdmr = psdmr | PSDMR_OP_MRW;
- *ramaddr = c;
-
- memctl->memc_psdmr = psdmr | PSDMR_OP_NORM | PSDMR_RFEN;
- *ramaddr = c;
-
- /*
- * Do it a second time for the second set of chips if the DIMM has
- * two chip selects (double sided).
- */
- if(chipselects > 1)
- {
- ramaddr += sdram_size;
-
- memctl->memc_br3 = CFG_BR3_PRELIM + sdram_size;
- memctl->memc_or3 = or;
-
- memctl->memc_psdmr = psdmr | PSDMR_OP_PREA;
- *ramaddr = c;
-
- memctl->memc_psdmr = psdmr | PSDMR_OP_CBRR;
- for (i = 0; i < 8; i++)
- *ramaddr = c;
-
- memctl->memc_psdmr = psdmr | PSDMR_OP_MRW;
- *ramaddr = c;
-
- memctl->memc_psdmr = psdmr | PSDMR_OP_NORM | PSDMR_RFEN;
- *ramaddr = c;
- }
-
- /* print info */
- printf("SDRAM configuration read from SPD\n");
- printf("\tSize per side = %dMB\n", sdram_size >> 20);
- printf("\tOrganization: %d sides, %d banks, %d Columns, %d Rows, Data width = %d bits\n", chipselects, 1<<(banks), cols, rows, data_width);
- printf("\tRefresh rate = %d, CAS latency = %d", psrt, caslatency);
-#if(CONFIG_PBI == 0) /* bank-based interleaving */
- printf(", Using Bank Based Interleave\n");
-#else
- printf(", Using Page Based Interleave\n");
-#endif
- printf("\tTotal size: ");
-
- /* this delay only needed for original 16MB DIMM...
- * Not needed for any other memory configuration */
- if ((sdram_size * chipselects) == (16 *1024 *1024))
- udelay (250000);
- return (sdram_size * chipselects);
- /*return (16 * 1024 * 1024);*/
-}
-
-
-#ifdef CONFIG_PCI
-struct pci_controller hose;
-
-extern void pci_mpc8250_init(struct pci_controller *);
-
-void pci_init_board(void)
-{
- pci_mpc8250_init(&hose);
-}
-#endif
diff --git a/board/mpc8266ads/u-boot.lds b/board/mpc8266ads/u-boot.lds
deleted file mode 100644
index 2220758cb9..0000000000
--- a/board/mpc8266ads/u-boot.lds
+++ /dev/null
@@ -1,124 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc8260/start.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/mpc8349ads/Makefile b/board/mpc8349ads/Makefile
deleted file mode 100644
index 4327b0d3ef..0000000000
--- a/board/mpc8349ads/Makefile
+++ /dev/null
@@ -1,45 +0,0 @@
-#
-# Copyright 2004 Freescale Semiconductor, Inc.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := $(BOARD).o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/mpc8349ads/config.mk b/board/mpc8349ads/config.mk
deleted file mode 100644
index 4602169ecb..0000000000
--- a/board/mpc8349ads/config.mk
+++ /dev/null
@@ -1,27 +0,0 @@
-#
-# Copyright 2004 Freescale Semiconductor, Inc.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# MPC83xxADS
-#
-
-TEXT_BASE = 0xFE700000
diff --git a/board/mpc8349ads/mpc8349ads.c b/board/mpc8349ads/mpc8349ads.c
deleted file mode 100644
index da8d3d7e81..0000000000
--- a/board/mpc8349ads/mpc8349ads.c
+++ /dev/null
@@ -1,276 +0,0 @@
-/*
- * Copyright Freescale Semiconductor, Inc.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- * Change log:
- * 20050101: Eran Liberty (liberty@freescale.com)
- * Initial file creating (porting from 85XX & 8260)
- */
-
-#include <common.h>
-#include <ioports.h>
-#include <mpc83xx.h>
-#include <asm/mpc8349_pci.h>
-#include <i2c.h>
-#include <spd.h>
-#include <miiphy.h>
-#if defined(CONFIG_PCI)
-#include <pci.h>
-#endif
-#if defined(CONFIG_SPD_EEPROM)
-#include <spd_sdram.h>
-#endif
-int fixed_sdram(void);
-void sdram_init(void);
-
-int board_early_init_f (void)
-{
- volatile u8* bcsr = (volatile u8*)CFG_BCSR;
-
- /* Enable flash write */
- bcsr[1] &= ~0x01;
-
- return 0;
-}
-
-
-#define ns2clk(ns) (ns / (1000000000 / CONFIG_8349_CLKIN) + 1)
-
-long int initdram (int board_type)
-{
- volatile immap_t *im = (immap_t *)CFG_IMMRBAR;
- u32 msize = 0;
-
- if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32)im)
- return -1;
-
- /* DDR SDRAM - Main SODIMM */
- im->sysconf.ddrlaw[0].bar = CFG_DDR_BASE & LAWBAR_BAR;
-#if defined(CONFIG_SPD_EEPROM)
- msize = spd_sdram(NULL);
-#else
- msize = fixed_sdram();
-#endif
- /*
- * Initialize SDRAM if it is on local bus.
- */
- sdram_init();
- puts(" DDR RAM: ");
- /* return total bus SDRAM size(bytes) -- DDR */
- return (msize * 1024 * 1024);
-}
-
-
-#if !defined(CONFIG_SPD_EEPROM)
-/*************************************************************************
- * fixed sdram init -- doesn't use serial presence detect.
- ************************************************************************/
-int fixed_sdram(void)
-{
- volatile immap_t *im = (immap_t *)CFG_IMMRBAR;
- u32 msize = 0;
- u32 ddr_size;
- u32 ddr_size_log2;
-
- msize = CFG_DDR_SIZE;
- for (ddr_size = msize << 20, ddr_size_log2 = 0;
- (ddr_size > 1);
- ddr_size = ddr_size>>1, ddr_size_log2++) {
- if (ddr_size & 1) {
- return -1;
- }
- }
- im->sysconf.ddrlaw[0].ar = LAWAR_EN | ((ddr_size_log2 - 1) & LAWAR_SIZE);
-#if (CFG_DDR_SIZE != 256)
-#warning Currenly any ddr size other than 256 is not supported
-#endif
-
- im->ddr.csbnds[0].csbnds = 0x00100017;
- im->ddr.csbnds[1].csbnds = 0x0018001f;
- im->ddr.csbnds[2].csbnds = 0x00000007;
- im->ddr.csbnds[3].csbnds = 0x0008000f;
- im->ddr.cs_config[0] = CFG_DDR_CONFIG;
- im->ddr.cs_config[1] = CFG_DDR_CONFIG;
- im->ddr.cs_config[2] = CFG_DDR_CONFIG;
- im->ddr.cs_config[3] = CFG_DDR_CONFIG;
- im->ddr.timing_cfg_1 =
- 3 << TIMING_CFG1_PRETOACT_SHIFT |
- 7 << TIMING_CFG1_ACTTOPRE_SHIFT |
- 3 << TIMING_CFG1_ACTTORW_SHIFT |
- 4 << TIMING_CFG1_CASLAT_SHIFT |
- 3 << TIMING_CFG1_REFREC_SHIFT |
- 3 << TIMING_CFG1_WRREC_SHIFT |
- 2 << TIMING_CFG1_ACTTOACT_SHIFT |
- 1 << TIMING_CFG1_WRTORD_SHIFT;
- im->ddr.timing_cfg_2 = 2 << TIMING_CFG2_WR_DATA_DELAY_SHIFT;
- im->ddr.sdram_cfg =
- SDRAM_CFG_SREN
-#if defined(CONFIG_DDR_2T_TIMING)
- | SDRAM_CFG_2T_EN
-#endif
- | 2 << SDRAM_CFG_SDRAM_TYPE_SHIFT;
- im->ddr.sdram_mode =
- 0x2000 << SDRAM_MODE_ESD_SHIFT |
- 0x0162 << SDRAM_MODE_SD_SHIFT;
-
- im->ddr.sdram_interval = 0x045B << SDRAM_INTERVAL_REFINT_SHIFT |
- 0x0100 << SDRAM_INTERVAL_BSTOPRE_SHIFT;
- udelay(200);
-
- im->ddr.sdram_cfg |= SDRAM_CFG_MEM_EN;
-
- return msize;
-}
-#endif/*!CFG_SPD_EEPROM*/
-
-
-int checkboard (void)
-{
- puts("Board: Freescale MPC8349ADS\n");
- return 0;
-}
-
-#if defined(CONFIG_PCI)
-/*
- * Initialize PCI Devices, report devices found
- */
-#ifndef CONFIG_PCI_PNP
-static struct pci_config_table pci_mpc83xxads_config_table[] = {
- {PCI_ANY_ID,PCI_ANY_ID,PCI_ANY_ID,PCI_ANY_ID,
- pci_cfgfunc_config_device, {PCI_ENET0_IOADDR,
- PCI_ENET0_MEMADDR,
- PCI_COMMON_MEMORY | PCI_COMMAND_MASTER
- } },
- {}
-}
-#endif
-
-
-volatile static struct pci_controller hose[] = {
- {
-#ifndef CONFIG_PCI_PNP
- config_table:pci_mpc83xxads_config_table,
-#endif
- },
- {
-#ifndef CONFIG_PCI_PNP
- config_table:pci_mpc83xxads_config_table,
-#endif
- }
-};
-#endif /* CONFIG_PCI */
-
-
-void
-pci_init_board(void)
-{
-#ifdef CONFIG_PCI
- extern void pci_mpc83xx_init(volatile struct pci_controller *hose);
-
- pci_mpc83xx_init(hose);
-#endif /* CONFIG_PCI */
-}
-
-/*
- * if MPC8349ADS is soldered with SDRAM
- */
-#if defined(CFG_BR2_PRELIM) \
- && defined(CFG_OR2_PRELIM) \
- && defined(CFG_LBLAWBAR2_PRELIM) \
- && defined(CFG_LBLAWAR2_PRELIM)
-/*
- * Initialize SDRAM memory on the Local Bus.
- */
-
-void
-sdram_init(void)
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMRBAR;
- volatile lbus8349_t *lbc= &immap->lbus;
- uint *sdram_addr = (uint *)CFG_LBC_SDRAM_BASE;
-
- puts("\n SDRAM on Local Bus: ");
- print_size (CFG_LBC_SDRAM_SIZE * 1024 * 1024, "\n");
-
- /*
- * Setup SDRAM Base and Option Registers, already done in cpu_init.c
- */
-
- /*setup mtrpt, lsrt and lbcr for LB bus*/
- lbc->lbcr = CFG_LBC_LBCR;
- lbc->mrtpr = CFG_LBC_MRTPR;
- lbc->lsrt = CFG_LBC_LSRT;
- asm("sync");
-
- /*
- * Configure the SDRAM controller Machine Mode Register.
- */
- lbc->lsdmr = CFG_LBC_LSDMR_5; /* 0x40636733; normal operation*/
-
- lbc->lsdmr = CFG_LBC_LSDMR_1; /*0x68636733;precharge all the banks*/
- asm("sync");
- *sdram_addr = 0xff;
- udelay(100);
-
- lbc->lsdmr = CFG_LBC_LSDMR_2;/*0x48636733;auto refresh*/
- asm("sync");
- /*1 times*/
- *sdram_addr = 0xff;
- udelay(100);
- /*2 times*/
- *sdram_addr = 0xff;
- udelay(100);
- /*3 times*/
- *sdram_addr = 0xff;
- udelay(100);
- /*4 times*/
- *sdram_addr = 0xff;
- udelay(100);
- /*5 times*/
- *sdram_addr = 0xff;
- udelay(100);
- /*6 times*/
- *sdram_addr = 0xff;
- udelay(100);
- /*7 times*/
- *sdram_addr = 0xff;
- udelay(100);
- /*8 times*/
- *sdram_addr = 0xff;
- udelay(100);
-
- /* 0x58636733;mode register write operation */
- lbc->lsdmr = CFG_LBC_LSDMR_4;
- asm("sync");
- *sdram_addr = 0xff;
- udelay(100);
-
- lbc->lsdmr = CFG_LBC_LSDMR_5; /*0x40636733;normal operation*/
- asm("sync");
- *sdram_addr = 0xff;
- udelay(100);
-}
-#else
-void
-sdram_init(void)
-{
- put("SDRAM on Local Bus is NOT available!\n");
-}
-#endif
diff --git a/board/mpc8349ads/u-boot.lds b/board/mpc8349ads/u-boot.lds
deleted file mode 100644
index 020cfa66f8..0000000000
--- a/board/mpc8349ads/u-boot.lds
+++ /dev/null
@@ -1,122 +0,0 @@
-/*
- * Copyright 2004 Freescale Semiconductor, Inc.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc83xx/start.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
-ENTRY(_start)
diff --git a/board/mpc8540ads/Makefile b/board/mpc8540ads/Makefile
deleted file mode 100644
index 5d8ea34946..0000000000
--- a/board/mpc8540ads/Makefile
+++ /dev/null
@@ -1,48 +0,0 @@
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := $(BOARD).o
-SOBJS := init.o
-#SOBJS :=
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(OBJS) $(SOBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/mpc8540ads/config.mk b/board/mpc8540ads/config.mk
deleted file mode 100644
index 92f8931979..0000000000
--- a/board/mpc8540ads/config.mk
+++ /dev/null
@@ -1,33 +0,0 @@
-# Copyright 2004 Freescale Semiconductor.
-# Modified by Xianghua Xiao, X.Xiao@motorola.com
-# (C) Copyright 2002,Motorola Inc.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# mpc8540ads board
-# default CCARBAR is at 0xff700000
-# assume U-Boot is less than 0.5MB
-#
-TEXT_BASE = 0xfff80000
-
-PLATFORM_CPPFLAGS += -DCONFIG_MPC85xx=1
-PLATFORM_CPPFLAGS += -DCONFIG_MPC8540=1
-PLATFORM_CPPFLAGS += -DCONFIG_E500=1
diff --git a/board/mpc8540ads/init.S b/board/mpc8540ads/init.S
deleted file mode 100644
index 242cb9fbc1..0000000000
--- a/board/mpc8540ads/init.S
+++ /dev/null
@@ -1,280 +0,0 @@
-/*
- * Copyright 2004 Freescale Semiconductor.
- * Copyright (C) 2002,2003, Motorola Inc.
- * Xianghua Xiao <X.Xiao@motorola.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <ppc_asm.tmpl>
-#include <ppc_defs.h>
-#include <asm/cache.h>
-#include <asm/mmu.h>
-#include <config.h>
-#include <mpc85xx.h>
-
-
-/*
- * TLB0 and TLB1 Entries
- *
- * Out of reset, TLB1's Entry 0 maps the highest 4K for CCSRBAR.
- * However, CCSRBAR is then relocated to CFG_CCSRBAR right after
- * these TLB entries are established.
- *
- * The TLB entries for DDR are dynamically setup in spd_sdram()
- * and use TLB1 Entries 8 through 15 as needed according to the
- * size of DDR memory.
- *
- * MAS0: tlbsel, esel, nv
- * MAS1: valid, iprot, tid, ts, tsize
- * MAS2: epn, sharen, x0, x1, w, i, m, g, e
- * MAS3: rpn, u0-u3, ux, sx, uw, sw, ur, sr
- */
-
-#define entry_start \
- mflr r1 ; \
- bl 0f ;
-
-#define entry_end \
-0: mflr r0 ; \
- mtlr r1 ; \
- blr ;
-
-
- .section .bootpg, "ax"
- .globl tlb1_entry
-tlb1_entry:
- entry_start
-
- /*
- * Number of TLB0 and TLB1 entries in the following table
- */
- .long 13
-
-#if (CFG_CCSRBAR_DEFAULT != CFG_CCSRBAR)
- /*
- * TLB0 4K Non-cacheable, guarded
- * 0xff700000 4K Initial CCSRBAR mapping
- *
- * This ends up at a TLB0 Index==0 entry, and must not collide
- * with other TLB0 Entries.
- */
- .long TLB1_MAS0(0, 0, 0)
- .long TLB1_MAS1(1, 0, 0, 0, 0)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_CCSRBAR_DEFAULT), 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_CCSRBAR_DEFAULT), 0,0,0,0,0,1,0,1,0,1)
-#else
-#error("Update the number of table entries in tlb1_entry")
-#endif
-
- /*
- * TLB0 16K Cacheable, non-guarded
- * 0xd001_0000 16K Temporary Global data for initialization
- *
- * Use four 4K TLB0 entries. These entries must be cacheable
- * as they provide the bootstrap memory before the memory
- * controler and real memory have been configured.
- *
- * These entries end up at TLB0 Indicies 0x10, 0x14, 0x18 and 0x1c,
- * and must not collide with other TLB0 entries.
- */
- .long TLB1_MAS0(0, 0, 0)
- .long TLB1_MAS1(1, 0, 0, 0, 0)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_INIT_RAM_ADDR),
- 0,0,0,0,0,0,0,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_INIT_RAM_ADDR),
- 0,0,0,0,0,1,0,1,0,1)
-
- .long TLB1_MAS0(0, 0, 0)
- .long TLB1_MAS1(1, 0, 0, 0, 0)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_INIT_RAM_ADDR + 4 * 1024),
- 0,0,0,0,0,0,0,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_INIT_RAM_ADDR + 4 * 1024),
- 0,0,0,0,0,1,0,1,0,1)
-
- .long TLB1_MAS0(0, 0, 0)
- .long TLB1_MAS1(1, 0, 0, 0, 0)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_INIT_RAM_ADDR + 8 * 1024),
- 0,0,0,0,0,0,0,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_INIT_RAM_ADDR + 8 * 1024),
- 0,0,0,0,0,1,0,1,0,1)
-
- .long TLB1_MAS0(0, 0, 0)
- .long TLB1_MAS1(1, 0, 0, 0, 0)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_INIT_RAM_ADDR + 12 * 1024),
- 0,0,0,0,0,0,0,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_INIT_RAM_ADDR + 12 * 1024),
- 0,0,0,0,0,1,0,1,0,1)
-
-
- /*
- * TLB 0: 16M Non-cacheable, guarded
- * 0xff000000 16M FLASH
- * Out of reset this entry is only 4K.
- */
- .long TLB1_MAS0(1, 0, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_16M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_FLASH_BASE), 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_FLASH_BASE), 0,0,0,0,0,1,0,1,0,1)
-
- /*
- * TLB 1: 256M Non-cacheable, guarded
- * 0x80000000 256M PCI1 MEM First half
- */
- .long TLB1_MAS0(1, 1, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_PCI1_MEM_BASE), 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_PCI1_MEM_BASE), 0,0,0,0,0,1,0,1,0,1)
-
- /*
- * TLB 2: 256M Non-cacheable, guarded
- * 0x90000000 256M PCI1 MEM Second half
- */
- .long TLB1_MAS0(1, 2, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_PCI1_MEM_BASE + 0x10000000),
- 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_PCI1_MEM_BASE + 0x10000000),
- 0,0,0,0,0,1,0,1,0,1)
-
- /*
- * TLB 3: 256M Non-cacheable, guarded
- * 0xc0000000 256M Rapid IO MEM First half
- */
- .long TLB1_MAS0(1, 3, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_RIO_MEM_BASE), 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_RIO_MEM_BASE), 0,0,0,0,0,1,0,1,0,1)
-
- /*
- * TLB 4: 256M Non-cacheable, guarded
- * 0xd0000000 256M Rapid IO MEM Second half
- */
- .long TLB1_MAS0(1, 4, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_RIO_MEM_BASE + 0x10000000),
- 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_RIO_MEM_BASE + 0x10000000),
- 0,0,0,0,0,1,0,1,0,1)
-
- /*
- * TLB 5: 64M Non-cacheable, guarded
- * 0xe000_0000 1M CCSRBAR
- * 0xe200_0000 16M PCI1 IO
- */
- .long TLB1_MAS0(1, 5, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_64M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_CCSRBAR), 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_CCSRBAR), 0,0,0,0,0,1,0,1,0,1)
-
- /*
- * TLB 6: 64M Cacheable, non-guarded
- * 0xf000_0000 64M LBC SDRAM
- */
- .long TLB1_MAS0(1, 6, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_64M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_LBC_SDRAM_BASE), 0,0,0,0,0,0,0,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_LBC_SDRAM_BASE), 0,0,0,0,0,1,0,1,0,1)
-
- /*
- * TLB 7: 16K Non-cacheable, guarded
- * 0xf8000000 16K BCSR registers
- */
- .long TLB1_MAS0(1, 7, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_16K)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_BCSR), 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_BCSR), 0,0,0,0,0,1,0,1,0,1)
-
-#if !defined(CONFIG_SPD_EEPROM)
- /*
- * TLB 8, 9: 128M DDR
- * 0x00000000 64M DDR System memory
- * 0x04000000 64M DDR System memory
- * Without SPD EEPROM configured DDR, this must be setup manually.
- * Make sure the TLB count at the top of this table is correct.
- * Likely it needs to be increased by two for these entries.
- */
-#error("Update the number of table entries in tlb1_entry")
- .long TLB1_MAS0(1, 8, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_64M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_DDR_SDRAM_BASE), 0,0,0,0,0,0,0,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_DDR_SDRAM_BASE), 0,0,0,0,0,1,0,1,0,1)
-
- .long TLB1_MAS0(1, 9, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_64M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_DDR_SDRAM_BASE + 0x4000000),
- 0,0,0,0,0,0,0,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_DDR_SDRAM_BASE + 0x4000000),
- 0,0,0,0,0,1,0,1,0,1)
-#endif
-
- entry_end
-
-/*
- * LAW(Local Access Window) configuration:
- *
- * 0x0000_0000 0x7fff_ffff DDR 2G
- * 0x8000_0000 0x9fff_ffff PCI1 MEM 512M
- * 0xc000_0000 0xdfff_ffff RapidIO 512M
- * 0xe000_0000 0xe000_ffff CCSR 1M
- * 0xe200_0000 0xe2ff_ffff PCI1 IO 16M
- * 0xf000_0000 0xf7ff_ffff SDRAM 128M
- * 0xf800_0000 0xf80f_ffff BCSR 1M
- * 0xff00_0000 0xffff_ffff FLASH (boot bank) 16M
- *
- * Notes:
- * CCSRBAR and L2-as-SRAM don't need a configured Local Access Window.
- * If flash is 8M at default position (last 8M), no LAW needed.
- */
-
-#if !defined(CONFIG_SPD_EEPROM)
-#define LAWBAR0 ((CFG_DDR_SDRAM_BASE>>12) & 0xfffff)
-#define LAWAR0 (LAWAR_EN | LAWAR_TRGT_IF_DDR | (LAWAR_SIZE & LAWAR_SIZE_128M))
-#else
-#define LAWBAR0 0
-#define LAWAR0 ((LAWAR_TRGT_IF_DDR | (LAWAR_SIZE & LAWAR_SIZE_128M)) & ~LAWAR_EN)
-#endif
-
-#define LAWBAR1 ((CFG_PCI1_MEM_BASE>>12) & 0xfffff)
-#define LAWAR1 (LAWAR_EN | LAWAR_TRGT_IF_PCIX | (LAWAR_SIZE & LAWAR_SIZE_512M))
-
-/*
- * This is not so much the SDRAM map as it is the whole localbus map.
- */
-#define LAWBAR2 ((CFG_LBC_SDRAM_BASE>>12) & 0xfffff)
-#define LAWAR2 (LAWAR_EN | LAWAR_TRGT_IF_LBC | (LAWAR_SIZE & LAWAR_SIZE_256M))
-
-#define LAWBAR3 ((CFG_PCI1_IO_BASE>>12) & 0xfffff)
-#define LAWAR3 (LAWAR_EN | LAWAR_TRGT_IF_PCIX | (LAWAR_SIZE & LAWAR_SIZE_16M))
-
-/*
- * Rapid IO at 0xc000_0000 for 512 M
- */
-#define LAWBAR4 ((CFG_RIO_MEM_BASE>>12) & 0xfffff)
-#define LAWAR4 (LAWAR_EN | LAWAR_TRGT_IF_RIO | (LAWAR_SIZE & LAWAR_SIZE_512M))
-
-
- .section .bootpg, "ax"
- .globl law_entry
-law_entry:
- entry_start
- .long 0x05
- .long LAWBAR0,LAWAR0,LAWBAR1,LAWAR1,LAWBAR2,LAWAR2,LAWBAR3,LAWAR3
- .long LAWBAR4,LAWAR4
- entry_end
diff --git a/board/mpc8540ads/mpc8540ads.c b/board/mpc8540ads/mpc8540ads.c
deleted file mode 100644
index d0eb6904ad..0000000000
--- a/board/mpc8540ads/mpc8540ads.c
+++ /dev/null
@@ -1,344 +0,0 @@
- /*
- * Copyright 2004 Freescale Semiconductor.
- * (C) Copyright 2002,2003, Motorola Inc.
- * Xianghua Xiao, (X.Xiao@motorola.com)
- *
- * (C) Copyright 2002 Scott McNutt <smcnutt@artesyncp.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-
-#include <common.h>
-#include <pci.h>
-#include <asm/processor.h>
-#include <asm/immap_85xx.h>
-#include <spd.h>
-
-#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
-extern void ddr_enable_ecc(unsigned int dram_size);
-#endif
-
-extern long int spd_sdram(void);
-
-void local_bus_init(void);
-void sdram_init(void);
-long int fixed_sdram(void);
-
-
-int board_early_init_f (void)
-{
- return 0;
-}
-
-int checkboard (void)
-{
- puts("Board: ADS\n");
-
-#ifdef CONFIG_PCI
- printf(" PCI1: 32 bit, %d MHz (compiled)\n",
- CONFIG_SYS_CLK_FREQ / 1000000);
-#else
- printf(" PCI1: disabled\n");
-#endif
-
- /*
- * Initialize local bus.
- */
- local_bus_init();
-
- return 0;
-}
-
-
-long int
-initdram(int board_type)
-{
- long dram_size = 0;
- extern long spd_sdram (void);
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
-
- puts("Initializing\n");
-
-#if defined(CONFIG_DDR_DLL)
- {
- volatile ccsr_gur_t *gur= &immap->im_gur;
- uint temp_ddrdll = 0;
-
- /*
- * Work around to stabilize DDR DLL
- */
- temp_ddrdll = gur->ddrdllcr;
- gur->ddrdllcr = ((temp_ddrdll & 0xff) << 16) | 0x80000000;
- asm("sync;isync;msync");
- }
-#endif
-
-#if defined(CONFIG_SPD_EEPROM)
- dram_size = spd_sdram ();
-#else
- dram_size = fixed_sdram ();
-#endif
-
-#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
- /*
- * Initialize and enable DDR ECC.
- */
- ddr_enable_ecc(dram_size);
-#endif
-
- /*
- * Initialize SDRAM.
- */
- sdram_init();
-
- puts(" DDR: ");
- return dram_size;
-}
-
-
-/*
- * Initialize Local Bus
- */
-
-void
-local_bus_init(void)
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile ccsr_gur_t *gur = &immap->im_gur;
- volatile ccsr_lbc_t *lbc = &immap->im_lbc;
-
- uint clkdiv;
- uint lbc_hz;
- sys_info_t sysinfo;
-
- /*
- * Errata LBC11.
- * Fix Local Bus clock glitch when DLL is enabled.
- *
- * If localbus freq is < 66Mhz, DLL bypass mode must be used.
- * If localbus freq is > 133Mhz, DLL can be safely enabled.
- * Between 66 and 133, the DLL is enabled with an override workaround.
- */
-
- get_sys_info(&sysinfo);
- clkdiv = lbc->lcrr & 0x0f;
- lbc_hz = sysinfo.freqSystemBus / 1000000 / clkdiv;
-
- if (lbc_hz < 66) {
- lbc->lcrr = CFG_LBC_LCRR | 0x80000000; /* DLL Bypass */
-
- } else if (lbc_hz >= 133) {
- lbc->lcrr = CFG_LBC_LCRR & (~0x80000000); /* DLL Enabled */
-
- } else {
- /*
- * On REV1 boards, need to change CLKDIV before enable DLL.
- * Default CLKDIV is 8, change it to 4 temporarily.
- */
- uint pvr = get_pvr();
- uint temp_lbcdll = 0;
-
- if (pvr == PVR_85xx_REV1) {
- /* FIXME: Justify the high bit here. */
- lbc->lcrr = 0x10000004;
- }
-
- lbc->lcrr = CFG_LBC_LCRR & (~0x80000000); /* DLL Enabled */
- udelay(200);
-
- /*
- * Sample LBC DLL ctrl reg, upshift it to set the
- * override bits.
- */
- temp_lbcdll = gur->lbcdllcr;
- gur->lbcdllcr = (((temp_lbcdll & 0xff) << 16) | 0x80000000);
- asm("sync;isync;msync");
- }
-}
-
-
-/*
- * Initialize SDRAM memory on the Local Bus.
- */
-
-void
-sdram_init(void)
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile ccsr_lbc_t *lbc= &immap->im_lbc;
- uint *sdram_addr = (uint *)CFG_LBC_SDRAM_BASE;
-
- puts(" SDRAM: ");
- print_size (CFG_LBC_SDRAM_SIZE * 1024 * 1024, "\n");
-
- /*
- * Setup SDRAM Base and Option Registers
- */
- lbc->or2 = CFG_OR2_PRELIM;
- lbc->br2 = CFG_BR2_PRELIM;
- lbc->lbcr = CFG_LBC_LBCR;
- asm("msync");
-
- lbc->lsrt = CFG_LBC_LSRT;
- lbc->mrtpr = CFG_LBC_MRTPR;
- asm("sync");
-
- /*
- * Configure the SDRAM controller.
- */
- lbc->lsdmr = CFG_LBC_LSDMR_1;
- asm("sync");
- *sdram_addr = 0xff;
- ppcDcbf((unsigned long) sdram_addr);
- udelay(100);
-
- lbc->lsdmr = CFG_LBC_LSDMR_2;
- asm("sync");
- *sdram_addr = 0xff;
- ppcDcbf((unsigned long) sdram_addr);
- udelay(100);
-
- lbc->lsdmr = CFG_LBC_LSDMR_3;
- asm("sync");
- *sdram_addr = 0xff;
- ppcDcbf((unsigned long) sdram_addr);
- udelay(100);
-
- lbc->lsdmr = CFG_LBC_LSDMR_4;
- asm("sync");
- *sdram_addr = 0xff;
- ppcDcbf((unsigned long) sdram_addr);
- udelay(100);
-
- lbc->lsdmr = CFG_LBC_LSDMR_5;
- asm("sync");
- *sdram_addr = 0xff;
- ppcDcbf((unsigned long) sdram_addr);
- udelay(100);
-}
-
-
-#if defined(CFG_DRAM_TEST)
-int testdram (void)
-{
- uint *pstart = (uint *) CFG_MEMTEST_START;
- uint *pend = (uint *) CFG_MEMTEST_END;
- uint *p;
-
- printf("SDRAM test phase 1:\n");
- for (p = pstart; p < pend; p++)
- *p = 0xaaaaaaaa;
-
- for (p = pstart; p < pend; p++) {
- if (*p != 0xaaaaaaaa) {
- printf ("SDRAM test fails at: %08x\n", (uint) p);
- return 1;
- }
- }
-
- printf("SDRAM test phase 2:\n");
- for (p = pstart; p < pend; p++)
- *p = 0x55555555;
-
- for (p = pstart; p < pend; p++) {
- if (*p != 0x55555555) {
- printf ("SDRAM test fails at: %08x\n", (uint) p);
- return 1;
- }
- }
-
- printf("SDRAM test passed.\n");
- return 0;
-}
-#endif
-
-
-#if !defined(CONFIG_SPD_EEPROM)
-/*************************************************************************
- * fixed sdram init -- doesn't use serial presence detect.
- ************************************************************************/
-long int fixed_sdram (void)
-{
- #ifndef CFG_RAMBOOT
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile ccsr_ddr_t *ddr= &immap->im_ddr;
-
- ddr->cs0_bnds = CFG_DDR_CS0_BNDS;
- ddr->cs0_config = CFG_DDR_CS0_CONFIG;
- ddr->timing_cfg_1 = CFG_DDR_TIMING_1;
- ddr->timing_cfg_2 = CFG_DDR_TIMING_2;
- ddr->sdram_mode = CFG_DDR_MODE;
- ddr->sdram_interval = CFG_DDR_INTERVAL;
- #if defined (CONFIG_DDR_ECC)
- ddr->err_disable = 0x0000000D;
- ddr->err_sbe = 0x00ff0000;
- #endif
- asm("sync;isync;msync");
- udelay(500);
- #if defined (CONFIG_DDR_ECC)
- /* Enable ECC checking */
- ddr->sdram_cfg = (CFG_DDR_CONTROL | 0x20000000);
- #else
- ddr->sdram_cfg = CFG_DDR_CONTROL;
- #endif
- asm("sync; isync; msync");
- udelay(500);
- #endif
- return CFG_SDRAM_SIZE * 1024 * 1024;
-}
-#endif /* !defined(CONFIG_SPD_EEPROM) */
-
-
-#if defined(CONFIG_PCI)
-/*
- * Initialize PCI Devices, report devices found.
- */
-
-#ifndef CONFIG_PCI_PNP
-static struct pci_config_table pci_mpc85xxads_config_table[] = {
- { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
- PCI_IDSEL_NUMBER, PCI_ANY_ID,
- pci_cfgfunc_config_device, { PCI_ENET0_IOADDR,
- PCI_ENET0_MEMADDR,
- PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER
- } },
- { }
-};
-#endif
-
-
-static struct pci_controller hose = {
-#ifndef CONFIG_PCI_PNP
- config_table: pci_mpc85xxads_config_table,
-#endif
-};
-
-#endif /* CONFIG_PCI */
-
-
-void
-pci_init_board(void)
-{
-#ifdef CONFIG_PCI
- extern void pci_mpc85xx_init(struct pci_controller *hose);
-
- pci_mpc85xx_init(&hose);
-#endif /* CONFIG_PCI */
-}
diff --git a/board/mpc8540ads/u-boot.lds b/board/mpc8540ads/u-boot.lds
deleted file mode 100644
index e7a88cfa44..0000000000
--- a/board/mpc8540ads/u-boot.lds
+++ /dev/null
@@ -1,150 +0,0 @@
-/*
- * (C) Copyright 2002,2003, Motorola,Inc.
- * Xianghua Xiao, X.Xiao@motorola.com.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- .resetvec 0xFFFFFFFC :
- {
- *(.resetvec)
- } = 0xffff
-
- .bootpg 0xFFFFF000 :
- {
- cpu/mpc85xx/start.o (.bootpg)
- board/mpc8540ads/init.o (.bootpg)
- } = 0xffff
-
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc85xx/start.o (.text)
- board/mpc8540ads/init.o (.text)
- cpu/mpc85xx/traps.o (.text)
- cpu/mpc85xx/interrupts.o (.text)
- cpu/mpc85xx/cpu_init.o (.text)
- cpu/mpc85xx/cpu.o (.text)
- cpu/mpc85xx/speed.o (.text)
- cpu/mpc85xx/pci.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/extable.o (.text)
- lib_generic/zlib.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/mpc8540eval/Makefile b/board/mpc8540eval/Makefile
deleted file mode 100644
index 6f1995e082..0000000000
--- a/board/mpc8540eval/Makefile
+++ /dev/null
@@ -1,49 +0,0 @@
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := $(BOARD).o flash.o
-#OBJS := $(BOARD).o flash.o $(BOARD)_slave.o
-SOBJS := init.o
-#SOBJS :=
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(OBJS) $(SOBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/mpc8540eval/config.mk b/board/mpc8540eval/config.mk
deleted file mode 100644
index 68271bd700..0000000000
--- a/board/mpc8540eval/config.mk
+++ /dev/null
@@ -1,34 +0,0 @@
-# Modified by Xianghua Xiao, X.Xiao@motorola.com
-# (C) Copyright 2002,Motorola Inc.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# gda8540 board
-# default CCARBAR is at 0xff700000
-# assume U-Boot is less than 0.5MB
-#
-#TEXT_BASE = 0x1000000
-TEXT_BASE = 0xfff80000
-
-
-PLATFORM_CPPFLAGS += -DCONFIG_MPC85xx=1
-PLATFORM_CPPFLAGS += -DCONFIG_MPC8540=1
-PLATFORM_CPPFLAGS += -DCONFIG_E500=1
diff --git a/board/mpc8540eval/flash.c b/board/mpc8540eval/flash.c
deleted file mode 100644
index 7300a041a2..0000000000
--- a/board/mpc8540eval/flash.c
+++ /dev/null
@@ -1,892 +0,0 @@
-/*
- * (C) Copyright 2003 Motorola Inc.
- * Xianghua Xiao,(X.Xiao@motorola.com)
- *
- * (C) Copyright 2000, 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2001, Stuart Hughes, Lineo Inc, stuarth@lineo.com
- * Add support the Sharp chips on the mpc8260ads.
- * I started with board/ip860/flash.c and made changes I found in
- * the MTD project by David Schleef.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-
-#if !defined(CFG_NO_FLASH)
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-#if defined(CFG_ENV_IS_IN_FLASH)
-# ifndef CFG_ENV_ADDR
-# define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_ENV_OFFSET)
-# endif
-# ifndef CFG_ENV_SIZE
-# define CFG_ENV_SIZE CFG_ENV_SECT_SIZE
-# endif
-# ifndef CFG_ENV_SECT_SIZE
-# define CFG_ENV_SECT_SIZE CFG_ENV_SIZE
-# endif
-#endif
-
-/*
- * The variable should be in the flash info structure. Since it
- * is only used in this board specific file it is declared here.
- * In the future I think an endian flag should be part of the
- * flash_info_t structure. (Ron Alder)
- */
-static ulong big_endian = 0;
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (vu_long *addr, flash_info_t *info);
-static int write_block (flash_info_t *info, uchar * src, ulong dest, ulong cnt);
-static int write_short (flash_info_t *info, ulong dest, ushort data);
-static int write_word (flash_info_t *info, ulong dest, ulong data);
-static int clear_block_lock_bit(flash_info_t *info, vu_long * addr);
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- unsigned long size;
- int i;
-
- /* Init: enable write,
- * or we cannot even write flash commands
- */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
-
- /* set the default sector offset */
- }
-
- /* Static FLASH Bank configuration here - FIXME XXX */
-
- size = flash_get_size((vu_long *)CFG_FLASH_BASE, &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size, size<<20);
- }
-
- /* Re-do sizing to get full correct info */
- size = flash_get_size((vu_long *)CFG_FLASH_BASE, &flash_info[0]);
-
- flash_info[0].size = size;
-
-#if !defined(CONFIG_RAM_AS_FLASH)
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
- /* monitor protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+monitor_flash_len-1,
- &flash_info[0]);
-#endif
-
-#ifdef CFG_ENV_IS_IN_FLASH
- /* ENV protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR+CFG_ENV_SECT_SIZE-1,
- &flash_info[0]);
-#endif
-#endif
- return (size);
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_INTEL: printf ("Intel "); break;
- case FLASH_MAN_SHARP: printf ("Sharp "); break;
- default: printf ("Unknown Vendor "); break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_28F016SV: printf ("28F016SV (16 Mbit, 32 x 64k)\n");
- break;
- case FLASH_28F160S3: printf ("28F160S3 (16 Mbit, 32 x 512K)\n");
- break;
- case FLASH_28F320S3: printf ("28F320S3 (32 Mbit, 64 x 512K)\n");
- break;
- case FLASH_LH28F016SCT: printf ("28F016SC (16 Mbit, 32 x 64K)\n");
- break;
- case FLASH_28F640J3A: printf ("28F640J3A (64 Mbit, 64 x 128K)\n");
- break;
- default: printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " "
- );
- }
- printf ("\n");
-}
-
- /* only deal with 16 bit and 32 bit port width, 16bit chip */
-static ulong flash_get_size (vu_long *addr, flash_info_t *info)
-{
- short i;
- ulong value,va,vb,vc,vd;
- ulong base = (ulong)addr;
- ulong sector_offset;
-
-#ifdef DEBUG
- printf("Check flash at 0x%08x\n",(uint)addr);
-#endif
- /* Write "Intelligent Identifier" command: read Manufacturer ID */
- *addr = 0x90909090;
- udelay(20);
- asm("sync");
-
-#ifndef CFG_FLASH_CFI
- printf("Not define CFG_FLASH_CFI\n");
- return (0);
-#else
- value = addr[0];
- va=(value & 0xFF000000)>>24;
- vb=(value & 0x00FF0000)>>16;
- vc=(value & 0x0000FF00)>>8;
- vd=(value & 0x000000FF);
- if ((va==0) && (vb==0)) {
- printf("cannot identify Flash\n");
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- return (0); /* no or unknown flash */
- }
- else if ((va==0) && (vb!=0)) {
- big_endian = 1;
- info->chipwidth = FLASH_CFI_BY16;
- if(vb == vd) info->portwidth = FLASH_CFI_32BIT;
- else info->portwidth = FLASH_CFI_16BIT;
- }
- else if ((va!=0) && (vb==0)) {
- big_endian = 0;
- info->chipwidth = FLASH_CFI_BY16;
- if(va == vc) info->portwidth = FLASH_CFI_32BIT;
- else info->portwidth = FLASH_CFI_16BIT;
- }
- else if ((va!=0) && (vb!=0)) {
- big_endian = 1; /* no meaning for 8bit chip */
- info->chipwidth = FLASH_CFI_BY8;
- if(va == vb) info->portwidth = FLASH_CFI_16BIT;
- else info->portwidth = FLASH_CFI_8BIT;
- }
-#ifdef DEBUG
- switch (info->portwidth) {
- case FLASH_CFI_8BIT:
- printf("port width is 8 bit.\n");
- break;
- case FLASH_CFI_16BIT:
- printf("port width is 16 bit, ");
- break;
- case FLASH_CFI_32BIT:
- printf("port width is 32 bit, ");
- break;
- }
- switch (info->chipwidth) {
- case FLASH_CFI_BY16:
- printf("chip width is 16 bit, ");
- switch (big_endian) {
- case 0:
- printf("Little Endian.\n");
- break;
- case 1:
- printf("Big Endian.\n");
- break;
- }
- break;
- }
-#endif
-#endif /*#ifdef CFG_FLASH_CFI*/
-
- if (big_endian==0) value = (addr[0] & 0xFF000000) >>8;
- else value = (addr[0] & 0x00FF0000);
-#ifdef DEBUG
- printf("manufacturer=0x%x\n",(uint)(value>>16));
-#endif
- switch (value) {
- case MT_MANUFACT & 0xFFFF0000: /* SHARP, MT or => Intel */
- case INTEL_ALT_MANU & 0xFFFF0000:
- info->flash_id = FLASH_MAN_INTEL;
- break;
- default:
- printf("unknown manufacturer: %x\n", (unsigned int)value);
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- return (0); /* no or unknown flash */
- }
-
- if (info->portwidth==FLASH_CFI_16BIT) {
- switch (big_endian) {
- case 0:
- value = (addr[0] & 0x0000FF00)>>8;
- break;
- case 1:
- value = (addr[0] & 0x000000FF);
- break;
- }
- }
- else if (info->portwidth == FLASH_CFI_32BIT) {
- switch (big_endian) {
- case 0:
- value = (addr[1] & 0x0000FF00)>>8;
- break;
- case 1:
- value = (addr[1] & 0x000000FF);
- break;
- }
- }
-
-#ifdef DEBUG
- printf("deviceID=0x%x\n",(uint)value);
-#endif
- switch (value) {
- case (INTEL_ID_28F016S & 0x0000FFFF):
- info->flash_id += FLASH_28F016SV;
- info->sector_count = 32;
- sector_offset = 0x10000;
- break; /* => 2 MB */
-
- case (INTEL_ID_28F160S3 & 0x0000FFFF):
- info->flash_id += FLASH_28F160S3;
- info->sector_count = 32;
- sector_offset = 0x10000;
- break; /* => 2 MB */
-
- case (INTEL_ID_28F320S3 & 0x0000FFFF):
- info->flash_id += FLASH_28F320S3;
- info->sector_count = 64;
- sector_offset = 0x10000;
- break; /* => 4 MB */
-
- case (INTEL_ID_28F640J3A & 0x0000FFFF):
- info->flash_id += FLASH_28F640J3A;
- info->sector_count = 64;
- sector_offset = 0x20000;
- break; /* => 8 MB */
-
- case SHARP_ID_28F016SCL & 0x0000FFFF:
- case SHARP_ID_28F016SCZ & 0x0000FFFF:
- info->flash_id = FLASH_MAN_SHARP | FLASH_LH28F016SCT;
- info->sector_count = 32;
- sector_offset = 0x10000;
- break; /* => 2 MB */
-
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- return (0); /* => no or unknown flash */
-
- }
-
- sector_offset = sector_offset * (info->portwidth / info->chipwidth);
- info->size = info->sector_count * sector_offset;
-
- /* set up sector start address table */
- for (i = 0; i < info->sector_count; i++) {
- info->start[i] = base;
- base += sector_offset;
- /* don't know how to check sector protection */
- info->protect[i] = 0;
- }
-
- /*
- * Prevent writes to uninitialized FLASH.
- */
- if (info->flash_id != FLASH_UNKNOWN) {
- addr = (vu_long *)info->start[0];
- *addr = 0xFFFFFF; /* reset bank to read array mode */
- asm("sync");
- }
-
- return (info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- int flag, prot, sect;
- ulong start, now, last, ready, erase_err_status;
-
- if (big_endian == 1) {
- ready = 0x0080;
- erase_err_status = 0x00a0;
- }
- else {
- ready = 0x8000;
- erase_err_status = 0xa000;
- }
- if ((info->portwidth / info->chipwidth)==2) {
- ready += (ready <<16);
- erase_err_status += (erase_err_status <<16);
- }
-
-#ifdef DEBUG
- printf ("\nReady flag is 0x%lx\nErase error flag is 0x%lx", ready, erase_err_status);
-#endif
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- if ( ((info->flash_id & FLASH_VENDMASK) != FLASH_MAN_INTEL)
- && ((info->flash_id & FLASH_VENDMASK) != FLASH_MAN_SHARP) ) {
- printf ("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
-#ifdef DEBUG
- printf("\nFlash Erase:\n");
-#endif
- /* Make Sure Block Lock Bit is not set. */
- if(clear_block_lock_bit(info, (vu_long *)(info->start[s_first]))){
- return 1;
- }
-
- /* Start erase on unprotected sectors */
-#if defined(DEBUG)
- printf("Begin to erase now,s_first=0x%x s_last=0x%x...\n",s_first,s_last);
-#endif
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- vu_short *addr16 = (vu_short *)(info->start[sect]);
- vu_long *addr = (vu_long *)(info->start[sect]);
- printf(".");
- switch (info->portwidth) {
- case FLASH_CFI_16BIT:
- asm("sync");
- last = start = get_timer (0);
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
- /* Reset Array */
- *addr16 = 0xffff;
- asm("sync");
- /* Clear Status Register */
- *addr16 = 0x5050;
- asm("sync");
- /* Single Block Erase Command */
- *addr16 = 0x2020;
- asm("sync");
- /* Confirm */
- *addr16 = 0xD0D0;
- asm("sync");
- if((info->flash_id & FLASH_TYPEMASK) != FLASH_LH28F016SCT) {
- /* Resume Command, as per errata update */
- *addr16 = 0xD0D0;
- asm("sync");
- }
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
- /* wait at least 80us - let's wait 1 ms */
- *addr16 = 0x7070;
- udelay (1000);
- while ((*addr16 & ready) != ready) {
- if((*addr16 & erase_err_status)== erase_err_status){
- printf("Error in Block Erase - Lock Bit may be set!\n");
- printf("Status Register = 0x%X\n", (uint)*addr16);
- *addr16 = 0xFFFF; /* reset bank */
- asm("sync");
- return 1;
- }
- if ((now=get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- *addr16 = 0xFFFF; /* reset bank */
- asm("sync");
- return 1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- }
- /* reset to read mode */
- *addr16 = 0xFFFF;
- asm("sync");
- break;
- case FLASH_CFI_32BIT:
- asm("sync");
- last = start = get_timer (0);
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
- /* Reset Array */
- *addr = 0xffffffff;
- asm("sync");
- /* Clear Status Register */
- *addr = 0x50505050;
- asm("sync");
- /* Single Block Erase Command */
- *addr = 0x20202020;
- asm("sync");
- /* Confirm */
- *addr = 0xD0D0D0D0;
- asm("sync");
- if((info->flash_id & FLASH_TYPEMASK) != FLASH_LH28F016SCT) {
- /* Resume Command, as per errata update */
- *addr = 0xD0D0D0D0;
- asm("sync");
- }
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
- /* wait at least 80us - let's wait 1 ms */
- *addr = 0x70707070;
- udelay (1000);
- while ((*addr & ready) != ready) {
- if((*addr & erase_err_status)==erase_err_status){
- printf("Error in Block Erase - Lock Bit may be set!\n");
- printf("Status Register = 0x%X\n", (uint)*addr);
- *addr = 0xFFFFFFFF; /* reset bank */
- asm("sync");
- return 1;
- }
- if ((now=get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- *addr = 0xFFFFFFFF; /* reset bank */
- asm("sync");
- return 1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- }
- /* reset to read mode */
- *addr = 0xFFFFFFFF;
- asm("sync");
- break;
- } /* end switch */
- } /* end if */
- } /* end for */
-
- printf ("flash erase done\n");
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-#define FLASH_BLOCK_SIZE 32
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data, count, temp;
-/* ulong temp[FLASH_BLOCK_SIZE/4];*/
- int i, l, rc;
-
- count = cnt;
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
- for (; i<4 && cnt>0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- cp = wp;
- /* handle unaligned block bytes , flash block size = 16bytes */
- wp = (cp+FLASH_BLOCK_SIZE-1) & ~(FLASH_BLOCK_SIZE-1);
- if ((wp-cp)>=cnt) {
- if ((rc = write_block(info,src,cp,wp-cp)) !=0)
- return (rc);
- src += wp-cp;
- cnt -= wp-cp;
- }
- /* handle aligned block bytes */
- temp = 0;
- printf("\n");
- while ( cnt >= FLASH_BLOCK_SIZE) {
- if ((rc = write_block(info,src,cp,FLASH_BLOCK_SIZE)) !=0) {
- return (rc);
- }
- src += FLASH_BLOCK_SIZE;
- cp += FLASH_BLOCK_SIZE;
- cnt -= FLASH_BLOCK_SIZE;
- if (((count-cnt)>>10)>temp) {
- temp=(count-cnt)>>10;
- printf("\r%d KB",temp);
- }
- }
- printf("\n");
- wp = cp;
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = 0;
- for (i=0; i<4; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- return (write_word(info, wp, data));
-}
-#undef FLASH_BLOCK_SIZE
-
-/*-----------------------------------------------------------------------
- * Write block to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- * -1 Error
- */
-static int write_block(flash_info_t *info, uchar * src, ulong dest, ulong cnt)
-{
- vu_short *baddr, *addr = (vu_short *)dest;
- ushort data;
- ulong start, now, xsr,csr, ready;
- int flag;
-
- if (cnt==0) return 0;
- else if(cnt != (cnt& ~1)) return -1;
-
- /* Check if Flash is (sufficiently) erased */
- data = * src;
- data = (data<<8) | *(src+1);
- if ((*addr & data) != data) {
- return (2);
- }
- if (big_endian == 1) {
- ready = 0x0080;
- }
- else {
- ready = 0x8000;
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- do {
- /* Write Command */
- *addr = 0xe8e8;
- asm("sync");
- xsr = *addr;
- asm("sync");
- } while (!(xsr & ready)); /*wait until read */
- /*write count=BLOCK SIZE -1 */
- data=(cnt>>1)-1;
- data=(data<<8)|data;
- *addr = data; /* word mode, cnt/2 */
- asm("sync");
- baddr = addr;
- while(cnt) {
- data = * src++;
- data = (data<<8) | *src++;
- asm("sync");
- *baddr = data;
- asm("sync");
- ++baddr;
- cnt = cnt -2;
- }
- *addr = 0xd0d0; /* confirm write */
- start = get_timer(0);
- asm("sync");
- if (flag)
- enable_interrupts();
- /* data polling for D7 */
- flag = 0;
- while (((csr = *addr) & ready) != ready) {
- if ((now=get_timer(start)) > CFG_FLASH_WRITE_TOUT) {
- flag = 1;
- break;
- }
- }
- if (csr & 0x4040) {
- printf ("CSR indicates write error (%04x) at %08lx\n", csr, (ulong)addr);
- flag = 1;
- }
- /* Clear Status Registers Command */
- *addr = 0x5050;
- asm("sync");
- /* Reset to read array mode */
- *addr = 0xFFFF;
- asm("sync");
- return (flag);
-}
-
-
-/*-----------------------------------------------------------------------
- * Write a short word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_short (flash_info_t *info, ulong dest, ushort data)
-{
- vu_short *addr = (vu_short *)dest;
- ulong start, now, csr, ready;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*addr & data) != data) {
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- /* Write Command */
- *addr = 0x1010;
- start = get_timer (0);
- asm("sync");
- /* Write Data */
- *addr = data;
- asm("sync");
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
- if (big_endian == 1) {
- ready = 0x0080;
- }
- else {
- ready = 0x8000;
- }
- /* data polling for D7 */
- flag = 0;
- while (((csr = *addr) & ready) != ready) {
- if ((now=get_timer(start)) > CFG_FLASH_WRITE_TOUT) {
- flag = 1;
- break;
- }
- }
- if (csr & 0x4040) {
- printf ("CSR indicates write error (%04x) at %08lx\n", csr, (ulong)addr);
- flag = 1;
- }
- /* Clear Status Registers Command */
- *addr = 0x5050;
- asm("sync");
- /* Reset to read array mode */
- *addr = 0xFFFF;
- asm("sync");
- return (flag);
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word (flash_info_t *info, ulong dest, ulong data)
-{
- vu_long *addr = (vu_long *)dest;
- ulong start, csr, ready;
- int flag=0;
-
- switch (info->portwidth) {
- case FLASH_CFI_32BIT:
- /* Check if Flash is (sufficiently) erased */
- if ((*addr & data) != data) {
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- if (big_endian == 1) {
- ready = 0x0080;
- }
- else {
- ready = 0x8000;
- }
- if ((info->portwidth / info->chipwidth)==2) {
- ready += (ready <<16);
- }
- else {
- ready = ready << 16;
- }
- /* Write Command */
- *addr = 0x10101010;
- asm("sync");
- /* Write Data */
- *addr = data;
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
- /* data polling for D7 */
- start = get_timer (0);
- flag = 0;
- while (((csr = *addr) & ready) != ready) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- flag = 1;
- break;
- }
- }
- if (csr & 0x40404040) {
- printf ("CSR indicates write error (%08lx) at %08lx\n", csr, (ulong)addr);
- flag = 1;
- }
- /* Clear Status Registers Command */
- *addr = 0x50505050;
- asm("sync");
- /* Reset to read array mode */
- *addr = 0xFFFFFFFF;
- asm("sync");
- break;
- case FLASH_CFI_16BIT:
- flag = write_short (info, dest, (unsigned short) (data>>16));
- if (flag == 0)
- flag = write_short (info, dest+2, (unsigned short) (data));
- break;
- }
- return (flag);
-}
-
-/*-----------------------------------------------------------------------
- * Clear Block Lock Bit, returns:
- * 0 - OK
- * 1 - Timeout
- */
-
-static int clear_block_lock_bit(flash_info_t * info, vu_long * addr)
-{
- ulong start, now, ready;
-
- /* Reset Array */
- *addr = 0xffffffff;
- asm("sync");
- /* Clear Status Register */
- *addr = 0x50505050;
- asm("sync");
-
- *addr = 0x60606060;
- asm("sync");
- *addr = 0xd0d0d0d0;
- asm("sync");
-
-
- if (big_endian == 1) {
- ready = 0x0080;
- }
- else {
- ready = 0x8000;
- }
- if ((info->portwidth / info->chipwidth)==2) {
- ready += (ready <<16);
- }
- else {
- ready = ready << 16;
- }
-#ifdef DEBUG
- printf ("%s: Ready flag is 0x%8lx\n", __FUNCTION__, ready);
-#endif
- *addr = 0x70707070; /* read status */
- start = get_timer (0);
- while((*addr & ready) != ready){
- if ((now=get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout on clearing Block Lock Bit\n");
- *addr = 0xFFFFFFFF; /* reset bank */
- asm("sync");
- return 1;
- }
- }
- return 0;
-}
-
-#endif /* !CFG_NO_FLASH */
diff --git a/board/mpc8540eval/init.S b/board/mpc8540eval/init.S
deleted file mode 100644
index 8c2ca65a91..0000000000
--- a/board/mpc8540eval/init.S
+++ /dev/null
@@ -1,178 +0,0 @@
-/*
-* Copyright (C) 2002,2003, Motorola Inc.
-* Xianghua Xiao <X.Xiao@motorola.com>
-*
-* See file CREDITS for list of people who contributed to this
-* project.
-*
-* This program is free software; you can redistribute it and/or
-* modify it under the terms of the GNU General Public License as
-* published by the Free Software Foundation; either version 2 of
-* the License, or (at your option) any later version.
-*
-* This program is distributed in the hope that it will be useful,
-* but WITHOUT ANY WARRANTY; without even the implied warranty of
-* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-* GNU General Public License for more details.
-*
-* You should have received a copy of the GNU General Public License
-* along with this program; if not, write to the Free Software
-* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-* MA 02111-1307 USA
-*/
-
-#include <ppc_asm.tmpl>
-#include <ppc_defs.h>
-#include <asm/cache.h>
-#include <asm/mmu.h>
-#include <config.h>
-#include <mpc85xx.h>
-
-#define entry_start \
- mflr r1 ; \
- bl 0f ;
-
-#define entry_end \
-0: mflr r0 ; \
- mtlr r1 ; \
- blr ;
-
-/* TLB1 entries configuration: */
-
- .section .bootpg, "ax"
- .globl tlb1_entry
-tlb1_entry:
- entry_start
-
- .long 0x0a /* the following data table uses a few of 16 TLB entries */
-
- .long TLB1_MAS0(1,1,0)
- .long TLB1_MAS1(1,1,0,0,BOOKE_PAGESZ_1M)
- .long TLB1_MAS2(((CFG_CCSRBAR>>12) & 0xfffff),0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(((CFG_CCSRBAR>>12) & 0xfffff),0,0,0,0,0,1,0,1,0,1)
-
- #if defined(CFG_FLASH_PORT_WIDTH_16)
- .long TLB1_MAS0(1,2,0)
- .long TLB1_MAS1(1,1,0,0,BOOKE_PAGESZ_4M)
- .long TLB1_MAS2(((CFG_FLASH_BASE>>12) & 0xfffff),0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(((CFG_FLASH_BASE>>12) & 0xfffff),0,0,0,0,0,1,0,1,0,1)
-
- .long TLB1_MAS0(1,3,0)
- .long TLB1_MAS1(1,1,0,0,BOOKE_PAGESZ_4M)
- .long TLB1_MAS2((((CFG_FLASH_BASE+0x400000)>>12)&0xfffff),0,0,0,0,1,0,1,0)
- .long TLB1_MAS3((((CFG_FLASH_BASE+0x400000)>>12)&0xfffff),0,0,0,0,0,1,0,1,0,1)
- #else
- .long TLB1_MAS0(1,2,0)
- .long TLB1_MAS1(1,1,0,0,BOOKE_PAGESZ_16M)
- .long TLB1_MAS2(((CFG_FLASH_BASE>>12) & 0xfffff),0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(((CFG_FLASH_BASE>>12) & 0xfffff),0,0,0,0,0,1,0,1,0,1)
-
- .long TLB1_MAS0(1,3,0)
- .long TLB1_MAS1(0,0,0,0,BOOKE_PAGESZ_1M)
- .long TLB1_MAS2(0,0,0,0,0,0,0,0,0)
- .long TLB1_MAS3(0,0,0,0,0,0,1,0,1,0,1)
- #endif
-
- #if !defined(CONFIG_SPD_EEPROM)
- .long TLB1_MAS0(1,4,0)
- .long TLB1_MAS1(1,1,0,0,BOOKE_PAGESZ_64M)
- .long TLB1_MAS2(((CFG_DDR_SDRAM_BASE>>12) & 0xfffff),0,0,0,0,0,0,0,0)
- .long TLB1_MAS3(((CFG_DDR_SDRAM_BASE>>12) & 0xfffff),0,0,0,0,0,1,0,1,0,1)
-
- .long TLB1_MAS0(1,5,0)
- .long TLB1_MAS1(1,1,0,0,BOOKE_PAGESZ_64M)
- .long TLB1_MAS2((((CFG_DDR_SDRAM_BASE+0x4000000)>>12) & 0xfffff),0,0,0,0,0,0,0,0)
- .long TLB1_MAS3((((CFG_DDR_SDRAM_BASE+0x4000000)>>12) & 0xfffff),0,0,0,0,0,1,0,1,0,1)
- #else
- .long TLB1_MAS0(1,4,0)
- .long TLB1_MAS1(0,0,0,0,BOOKE_PAGESZ_1M)
- .long TLB1_MAS2(0,0,0,0,0,0,0,0,0)
- .long TLB1_MAS3(0,0,0,0,0,0,1,0,1,0,1)
-
- .long TLB1_MAS0(1,5,0)
- .long TLB1_MAS1(0,0,0,0,BOOKE_PAGESZ_1M)
- .long TLB1_MAS2(0,0,0,0,0,0,0,0,0)
- .long TLB1_MAS3(0,0,0,0,0,0,1,0,1,0,1)
- #endif
-
- .long TLB1_MAS0(1,6,0)
- .long TLB1_MAS1(1,1,0,0,BOOKE_PAGESZ_64M)
- #if defined(CONFIG_RAM_AS_FLASH)
- .long TLB1_MAS2(((CFG_LBC_SDRAM_BASE>>12) & 0xfffff),0,0,0,0,1,0,1,0)
- #else
- .long TLB1_MAS2(((CFG_LBC_SDRAM_BASE>>12) & 0xfffff),0,0,0,0,0,0,0,0)
- #endif
- .long TLB1_MAS3(((CFG_LBC_SDRAM_BASE>>12) & 0xfffff),0,0,0,0,0,1,0,1,0,1)
-
- .long TLB1_MAS0(1,7,0)
- .long TLB1_MAS1(1,1,0,0,BOOKE_PAGESZ_16K)
- #ifdef CONFIG_L2_INIT_RAM
- .long TLB1_MAS2(((CFG_INIT_RAM_ADDR>>12) & 0xfffff),0,0,0,1,0,0,0,0)
- #else
- .long TLB1_MAS2(((CFG_INIT_RAM_ADDR>>12) & 0xfffff),0,0,0,0,0,0,0,0)
- #endif
- .long TLB1_MAS3(((CFG_INIT_RAM_ADDR>>12) & 0xfffff),0,0,0,0,0,1,0,1,0,1)
-
- .long TLB1_MAS0(1,8,0)
- .long TLB1_MAS1(1,1,0,0,BOOKE_PAGESZ_256M)
- .long TLB1_MAS2(((CFG_PCI_MEM_BASE>>12) & 0xfffff),0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(((CFG_PCI_MEM_BASE>>12) & 0xfffff),0,0,0,0,0,1,0,1,0,1)
-
- .long TLB1_MAS0(1,9,0)
- .long TLB1_MAS1(1,1,0,0,BOOKE_PAGESZ_16K)
- .long TLB1_MAS2(((CFG_BCSR>>12) & 0xfffff),0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(((CFG_BCSR>>12) & 0xfffff),0,0,0,0,0,1,0,1,0,1)
-
- #if (CFG_CCSRBAR_DEFAULT != CFG_CCSRBAR)
- .long TLB1_MAS0(1,15,0)
- .long TLB1_MAS1(1,1,0,0,BOOKE_PAGESZ_1M)
- .long TLB1_MAS2(((CFG_CCSRBAR_DEFAULT>>12) & 0xfffff),0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(((CFG_CCSRBAR_DEFAULT>>12) & 0xfffff),0,0,0,0,0,1,0,1,0,1)
- #else
- .long TLB1_MAS0(1,15,0)
- .long TLB1_MAS1(0,0,0,0,BOOKE_PAGESZ_1M)
- .long TLB1_MAS2(0,0,0,0,0,0,0,0,0)
- .long TLB1_MAS3(0,0,0,0,0,0,1,0,1,0,1)
- #endif
- entry_end
-
-/* LAW(Local Access Window) configuration:
- * 0000_0000-0800_0000: DDR(128M) -or- larger
- * f000_0000-f3ff_ffff: PCI(256M)
- * f400_0000-f7ff_ffff: RapidIO(128M)
- * f800_0000-ffff_ffff: localbus(128M)
- * f800_0000-fbff_ffff: LBC SDRAM(64M)
- * fc00_0000-fdef_ffff: LBC BCSR,RTC,etc(31M)
- * fdf0_0000-fdff_ffff: CCSRBAR(1M)
- * fe00_0000-ffff_ffff: Flash(32M)
- * Note: CCSRBAR and L2-as-SRAM don't need configure Local Access
- * Window.
- * Note: If flash is 8M at default position(last 8M),no LAW needed.
- */
-
-#if !defined(CONFIG_SPD_EEPROM)
-#define LAWBAR0 ((CFG_DDR_SDRAM_BASE>>12) & 0xfffff)
-#define LAWAR0 (LAWAR_EN | LAWAR_TRGT_IF_DDR | (LAWAR_SIZE & LAWAR_SIZE_128M))
-#else
-#define LAWBAR0 0
-#define LAWAR0 ((LAWAR_TRGT_IF_DDR | (LAWAR_SIZE & LAWAR_SIZE_128M)) & ~LAWAR_EN)
-#endif
-
-#define LAWBAR1 ((CFG_PCI_MEM_BASE>>12) & 0xfffff)
-#define LAWAR1 (LAWAR_EN | LAWAR_TRGT_IF_PCIX | (LAWAR_SIZE & LAWAR_SIZE_256M))
-
-#if !defined(CONFIG_RAM_AS_FLASH)
-#define LAWBAR2 ((CFG_LBC_SDRAM_BASE>>12) & 0xfffff)
-#define LAWAR2 (LAWAR_EN | LAWAR_TRGT_IF_LBC | (LAWAR_SIZE & LAWAR_SIZE_128M))
-#else
-#define LAWBAR2 0
-#define LAWAR2 ((LAWAR_TRGT_IF_LBC | (LAWAR_SIZE & LAWAR_SIZE_128M)) & ~LAWAR_EN)
-#endif
-
- .section .bootpg, "ax"
- .globl law_entry
-law_entry:
- entry_start
- .long 0x03
- .long LAWBAR0,LAWAR0,LAWBAR1,LAWAR1,LAWBAR2,LAWAR2
- entry_end
diff --git a/board/mpc8540eval/mpc8540eval.c b/board/mpc8540eval/mpc8540eval.c
deleted file mode 100644
index 3b3c8ed26d..0000000000
--- a/board/mpc8540eval/mpc8540eval.c
+++ /dev/null
@@ -1,251 +0,0 @@
-/*
- * (C) Copyright 2002,2003, Motorola Inc.
- * Xianghua Xiao, (X.Xiao@motorola.com)
- *
- * (C) Copyright 2002 Scott McNutt <smcnutt@artesyncp.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/processor.h>
-#include <asm/immap_85xx.h>
-#include <spd.h>
-
-extern long int spd_sdram (void);
-
-long int fixed_sdram (void);
-
-int board_pre_init (void)
-{
-#if defined(CONFIG_PCI)
- volatile immap_t *immr = (immap_t *)CFG_IMMR;
- volatile ccsr_pcix_t *pci = &immr->im_pcix;
-
- pci->peer &= 0xffffffdf; /* disable master abort */
-#endif
- return 0;
-}
-
-int checkboard (void)
-{
- sys_info_t sysinfo;
-
- get_sys_info (&sysinfo);
-
- printf ("Board: Freescale MPC8540EVAL Board\n");
- printf ("\tCPU: %lu MHz\n", sysinfo.freqProcessor / 1000000);
- printf ("\tCCB: %lu MHz\n", sysinfo.freqSystemBus / 1000000);
- printf ("\tDDR: %lu MHz\n", sysinfo.freqSystemBus / 2000000);
- if((CFG_LBC_LCRR & 0x0f) == 2 || (CFG_LBC_LCRR & 0x0f) == 4 \
- || (CFG_LBC_LCRR & 0x0f) == 8) {
- printf ("\tLBC: %lu MHz\n",
- sysinfo.freqSystemBus / 1000000/(CFG_LBC_LCRR & 0x0f));
- } else {
- printf("\tLBC: unknown\n");
- }
- printf("L1 D-cache 32KB, L1 I-cache 32KB enabled.\n");
- return (0);
-}
-
-long int initdram (int board_type)
-{
- long dram_size = 0;
- extern long spd_sdram (void);
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
-#if !defined(CONFIG_RAM_AS_FLASH)
- volatile ccsr_lbc_t *lbc= &immap->im_lbc;
- sys_info_t sysinfo;
- uint temp_lbcdll = 0;
-#endif
-#if !defined(CONFIG_RAM_AS_FLASH) || defined(CONFIG_DDR_DLL)
- volatile ccsr_gur_t *gur= &immap->im_gur;
-#endif
-
-#if defined(CONFIG_DDR_DLL)
- uint temp_ddrdll = 0;
-
- /* Work around to stabilize DDR DLL */
- temp_ddrdll = gur->ddrdllcr;
- gur->ddrdllcr = ((temp_ddrdll & 0xff) << 16) | 0x80000000;
- asm("sync;isync;msync");
-#endif
-
-#if defined(CONFIG_SPD_EEPROM)
- dram_size = spd_sdram ();
-#else
- dram_size = fixed_sdram ();
-#endif
-
-#if defined(CFG_RAMBOOT)
- return dram_size;
-#endif
-
-#if !defined(CONFIG_RAM_AS_FLASH) /* LocalBus is not emulating flash */
- get_sys_info(&sysinfo);
- /* if localbus freq is less than 66Mhz,we use bypass mode,otherwise use DLL */
- if(sysinfo.freqSystemBus/(CFG_LBC_LCRR & 0x0f) < 66000000) {
- lbc->lcrr = (CFG_LBC_LCRR & 0x0fffffff)| 0x80000000;
- } else {
- lbc->lcrr = CFG_LBC_LCRR & 0x7fffffff;
- udelay(200);
- temp_lbcdll = gur->lbcdllcr;
- gur->lbcdllcr = ((temp_lbcdll & 0xff) << 16 ) | 0x80000000;
- asm("sync;isync;msync");
- }
- lbc->or2 = CFG_OR2_PRELIM; /* 64MB SDRAM */
- lbc->br2 = CFG_BR2_PRELIM;
- lbc->lbcr = CFG_LBC_LBCR;
- lbc->lsdmr = CFG_LBC_LSDMR_1;
- asm("sync");
- * (ulong *)0 = 0x000000ff;
- lbc->lsdmr = CFG_LBC_LSDMR_2;
- asm("sync");
- * (ulong *)0 = 0x000000ff;
- lbc->lsdmr = CFG_LBC_LSDMR_3;
- asm("sync");
- * (ulong *)0 = 0x000000ff;
- lbc->lsdmr = CFG_LBC_LSDMR_4;
- asm("sync");
- * (ulong *)0 = 0x000000ff;
- lbc->lsdmr = CFG_LBC_LSDMR_5;
- asm("sync");
- lbc->lsrt = CFG_LBC_LSRT;
- asm("sync");
- lbc->mrtpr = CFG_LBC_MRTPR;
- asm("sync");
-#endif
-
-#if defined(CONFIG_DDR_ECC)
- {
- /* Initialize all of memory for ECC, then
- * enable errors */
- uint *p = 0;
- uint i = 0;
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile ccsr_ddr_t *ddr= &immap->im_ddr;
- dma_init();
- for (*p = 0; p < (uint *)(8 * 1024); p++) {
- if (((unsigned int)p & 0x1f) == 0) { dcbz(p); }
- *p = (unsigned int)0xdeadbeef;
- if (((unsigned int)p & 0x1c) == 0x1c) { dcbf(p); }
- }
-
- /* 8K */
- dma_xfer((uint *)0x2000,0x2000,(uint *)0);
- /* 16K */
- dma_xfer((uint *)0x4000,0x4000,(uint *)0);
- /* 32K */
- dma_xfer((uint *)0x8000,0x8000,(uint *)0);
- /* 64K */
- dma_xfer((uint *)0x10000,0x10000,(uint *)0);
- /* 128k */
- dma_xfer((uint *)0x20000,0x20000,(uint *)0);
- /* 256k */
- dma_xfer((uint *)0x40000,0x40000,(uint *)0);
- /* 512k */
- dma_xfer((uint *)0x80000,0x80000,(uint *)0);
- /* 1M */
- dma_xfer((uint *)0x100000,0x100000,(uint *)0);
- /* 2M */
- dma_xfer((uint *)0x200000,0x200000,(uint *)0);
- /* 4M */
- dma_xfer((uint *)0x400000,0x400000,(uint *)0);
-
- for (i = 1; i < dram_size / 0x800000; i++) {
- dma_xfer((uint *)(0x800000*i),0x800000,(uint *)0);
- }
-
- /* Enable errors for ECC */
- ddr->err_disable = 0x00000000;
- asm("sync;isync;msync");
- }
-#endif
-
- return dram_size;
-}
-
-#if defined(CFG_DRAM_TEST)
-int testdram (void)
-{
- uint *pstart = (uint *) CFG_MEMTEST_START;
- uint *pend = (uint *) CFG_MEMTEST_END;
- uint *p;
-
- printf("SDRAM test phase 1:\n");
- for (p = pstart; p < pend; p++)
- *p = 0xaaaaaaaa;
-
- for (p = pstart; p < pend; p++) {
- if (*p != 0xaaaaaaaa) {
- printf ("SDRAM test fails at: %08x\n", (uint) p);
- return 1;
- }
- }
-
- printf("SDRAM test phase 2:\n");
- for (p = pstart; p < pend; p++)
- *p = 0x55555555;
-
- for (p = pstart; p < pend; p++) {
- if (*p != 0x55555555) {
- printf ("SDRAM test fails at: %08x\n", (uint) p);
- return 1;
- }
- }
-
- printf("SDRAM test passed.\n");
- return 0;
-}
-#endif
-
-#if !defined(CONFIG_SPD_EEPROM)
-/*************************************************************************
- * fixed sdram init -- doesn't use serial presence detect.
- ************************************************************************/
-long int fixed_sdram (void)
-{
-#ifndef CFG_RAMBOOT
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile ccsr_ddr_t *ddr= &immap->im_ddr;
-
- ddr->cs0_bnds = CFG_DDR_CS0_BNDS;
- ddr->cs0_config = CFG_DDR_CS0_CONFIG;
- ddr->timing_cfg_1 = CFG_DDR_TIMING_1;
- ddr->timing_cfg_2 = CFG_DDR_TIMING_2;
- ddr->sdram_mode = CFG_DDR_MODE;
- ddr->sdram_interval = CFG_DDR_INTERVAL;
-#if defined (CONFIG_DDR_ECC)
- ddr->err_disable = 0x0000000D;
- ddr->err_sbe = 0x00ff0000;
-#endif
- asm("sync;isync;msync");
- udelay(500);
-#if defined (CONFIG_DDR_ECC)
- /* Enable ECC checking */
- ddr->sdram_cfg = (CFG_DDR_CONTROL | 0x20000000);
-#else
- ddr->sdram_cfg = CFG_DDR_CONTROL;
-#endif
- asm("sync; isync; msync");
- udelay(500);
-#endif
- return (CFG_SDRAM_SIZE * 1024 * 1024);
-}
-#endif /* !defined(CONFIG_SPD_EEPROM) */
diff --git a/board/mpc8540eval/u-boot.lds b/board/mpc8540eval/u-boot.lds
deleted file mode 100644
index 0755d0166b..0000000000
--- a/board/mpc8540eval/u-boot.lds
+++ /dev/null
@@ -1,155 +0,0 @@
-/*
- * (C) Copyright 2002,2003, Motorola,Inc.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/* Assumes that the size of u-boot is less than 512K and the
- * start address is aligned on a 512K block.
- * Boot page and reset vector is put at that end of the 512K block. */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc85xx/start.o (.text)
- board/mpc8540eval/init.o (.text)
- cpu/mpc85xx/traps.o (.text)
- cpu/mpc85xx/interrupts.o (.text)
- cpu/mpc85xx/cpu_init.o (.text)
- cpu/mpc85xx/cpu.o (.text)
- cpu/mpc85xx/speed.o (.text)
- cpu/mpc85xx/pci.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/extable.o (.text)
- lib_generic/zlib.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-
- . = (. & 0xFFF80000) + 0x0007F000;
- .bootpg :
- {
- cpu/mpc85xx/start.o (.bootpg)
- board/mpc8540eval/init.o (.bootpg)
- } = 0xffff
-
- . = (. & 0xFFF80000) + 0x0007FFFC;
- .resetvec :
- {
- *(.resetvec)
- } = 0xffff
-
-}
diff --git a/board/mpc8560ads/Makefile b/board/mpc8560ads/Makefile
deleted file mode 100644
index 5d8ea34946..0000000000
--- a/board/mpc8560ads/Makefile
+++ /dev/null
@@ -1,48 +0,0 @@
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := $(BOARD).o
-SOBJS := init.o
-#SOBJS :=
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(OBJS) $(SOBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/mpc8560ads/config.mk b/board/mpc8560ads/config.mk
deleted file mode 100644
index 9aef2bb163..0000000000
--- a/board/mpc8560ads/config.mk
+++ /dev/null
@@ -1,32 +0,0 @@
-# Copyright 2004 Freescale Semiconductor.
-# Modified by Xianghua Xiao, X.Xiao@motorola.com
-# (C) Copyright 2002,2003 Motorola Inc.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# mpc8560ads board
-# default CCARBAR is at 0xff700000
-# assume U-Boot is less than 0.5MB
-#
-TEXT_BASE = 0xfff80000
-
-PLATFORM_CPPFLAGS += -DCONFIG_MPC85xx=1
-PLATFORM_CPPFLAGS += -DCONFIG_E500=1
diff --git a/board/mpc8560ads/init.S b/board/mpc8560ads/init.S
deleted file mode 100644
index 242cb9fbc1..0000000000
--- a/board/mpc8560ads/init.S
+++ /dev/null
@@ -1,280 +0,0 @@
-/*
- * Copyright 2004 Freescale Semiconductor.
- * Copyright (C) 2002,2003, Motorola Inc.
- * Xianghua Xiao <X.Xiao@motorola.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <ppc_asm.tmpl>
-#include <ppc_defs.h>
-#include <asm/cache.h>
-#include <asm/mmu.h>
-#include <config.h>
-#include <mpc85xx.h>
-
-
-/*
- * TLB0 and TLB1 Entries
- *
- * Out of reset, TLB1's Entry 0 maps the highest 4K for CCSRBAR.
- * However, CCSRBAR is then relocated to CFG_CCSRBAR right after
- * these TLB entries are established.
- *
- * The TLB entries for DDR are dynamically setup in spd_sdram()
- * and use TLB1 Entries 8 through 15 as needed according to the
- * size of DDR memory.
- *
- * MAS0: tlbsel, esel, nv
- * MAS1: valid, iprot, tid, ts, tsize
- * MAS2: epn, sharen, x0, x1, w, i, m, g, e
- * MAS3: rpn, u0-u3, ux, sx, uw, sw, ur, sr
- */
-
-#define entry_start \
- mflr r1 ; \
- bl 0f ;
-
-#define entry_end \
-0: mflr r0 ; \
- mtlr r1 ; \
- blr ;
-
-
- .section .bootpg, "ax"
- .globl tlb1_entry
-tlb1_entry:
- entry_start
-
- /*
- * Number of TLB0 and TLB1 entries in the following table
- */
- .long 13
-
-#if (CFG_CCSRBAR_DEFAULT != CFG_CCSRBAR)
- /*
- * TLB0 4K Non-cacheable, guarded
- * 0xff700000 4K Initial CCSRBAR mapping
- *
- * This ends up at a TLB0 Index==0 entry, and must not collide
- * with other TLB0 Entries.
- */
- .long TLB1_MAS0(0, 0, 0)
- .long TLB1_MAS1(1, 0, 0, 0, 0)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_CCSRBAR_DEFAULT), 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_CCSRBAR_DEFAULT), 0,0,0,0,0,1,0,1,0,1)
-#else
-#error("Update the number of table entries in tlb1_entry")
-#endif
-
- /*
- * TLB0 16K Cacheable, non-guarded
- * 0xd001_0000 16K Temporary Global data for initialization
- *
- * Use four 4K TLB0 entries. These entries must be cacheable
- * as they provide the bootstrap memory before the memory
- * controler and real memory have been configured.
- *
- * These entries end up at TLB0 Indicies 0x10, 0x14, 0x18 and 0x1c,
- * and must not collide with other TLB0 entries.
- */
- .long TLB1_MAS0(0, 0, 0)
- .long TLB1_MAS1(1, 0, 0, 0, 0)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_INIT_RAM_ADDR),
- 0,0,0,0,0,0,0,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_INIT_RAM_ADDR),
- 0,0,0,0,0,1,0,1,0,1)
-
- .long TLB1_MAS0(0, 0, 0)
- .long TLB1_MAS1(1, 0, 0, 0, 0)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_INIT_RAM_ADDR + 4 * 1024),
- 0,0,0,0,0,0,0,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_INIT_RAM_ADDR + 4 * 1024),
- 0,0,0,0,0,1,0,1,0,1)
-
- .long TLB1_MAS0(0, 0, 0)
- .long TLB1_MAS1(1, 0, 0, 0, 0)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_INIT_RAM_ADDR + 8 * 1024),
- 0,0,0,0,0,0,0,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_INIT_RAM_ADDR + 8 * 1024),
- 0,0,0,0,0,1,0,1,0,1)
-
- .long TLB1_MAS0(0, 0, 0)
- .long TLB1_MAS1(1, 0, 0, 0, 0)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_INIT_RAM_ADDR + 12 * 1024),
- 0,0,0,0,0,0,0,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_INIT_RAM_ADDR + 12 * 1024),
- 0,0,0,0,0,1,0,1,0,1)
-
-
- /*
- * TLB 0: 16M Non-cacheable, guarded
- * 0xff000000 16M FLASH
- * Out of reset this entry is only 4K.
- */
- .long TLB1_MAS0(1, 0, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_16M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_FLASH_BASE), 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_FLASH_BASE), 0,0,0,0,0,1,0,1,0,1)
-
- /*
- * TLB 1: 256M Non-cacheable, guarded
- * 0x80000000 256M PCI1 MEM First half
- */
- .long TLB1_MAS0(1, 1, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_PCI1_MEM_BASE), 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_PCI1_MEM_BASE), 0,0,0,0,0,1,0,1,0,1)
-
- /*
- * TLB 2: 256M Non-cacheable, guarded
- * 0x90000000 256M PCI1 MEM Second half
- */
- .long TLB1_MAS0(1, 2, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_PCI1_MEM_BASE + 0x10000000),
- 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_PCI1_MEM_BASE + 0x10000000),
- 0,0,0,0,0,1,0,1,0,1)
-
- /*
- * TLB 3: 256M Non-cacheable, guarded
- * 0xc0000000 256M Rapid IO MEM First half
- */
- .long TLB1_MAS0(1, 3, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_RIO_MEM_BASE), 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_RIO_MEM_BASE), 0,0,0,0,0,1,0,1,0,1)
-
- /*
- * TLB 4: 256M Non-cacheable, guarded
- * 0xd0000000 256M Rapid IO MEM Second half
- */
- .long TLB1_MAS0(1, 4, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_RIO_MEM_BASE + 0x10000000),
- 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_RIO_MEM_BASE + 0x10000000),
- 0,0,0,0,0,1,0,1,0,1)
-
- /*
- * TLB 5: 64M Non-cacheable, guarded
- * 0xe000_0000 1M CCSRBAR
- * 0xe200_0000 16M PCI1 IO
- */
- .long TLB1_MAS0(1, 5, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_64M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_CCSRBAR), 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_CCSRBAR), 0,0,0,0,0,1,0,1,0,1)
-
- /*
- * TLB 6: 64M Cacheable, non-guarded
- * 0xf000_0000 64M LBC SDRAM
- */
- .long TLB1_MAS0(1, 6, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_64M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_LBC_SDRAM_BASE), 0,0,0,0,0,0,0,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_LBC_SDRAM_BASE), 0,0,0,0,0,1,0,1,0,1)
-
- /*
- * TLB 7: 16K Non-cacheable, guarded
- * 0xf8000000 16K BCSR registers
- */
- .long TLB1_MAS0(1, 7, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_16K)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_BCSR), 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_BCSR), 0,0,0,0,0,1,0,1,0,1)
-
-#if !defined(CONFIG_SPD_EEPROM)
- /*
- * TLB 8, 9: 128M DDR
- * 0x00000000 64M DDR System memory
- * 0x04000000 64M DDR System memory
- * Without SPD EEPROM configured DDR, this must be setup manually.
- * Make sure the TLB count at the top of this table is correct.
- * Likely it needs to be increased by two for these entries.
- */
-#error("Update the number of table entries in tlb1_entry")
- .long TLB1_MAS0(1, 8, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_64M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_DDR_SDRAM_BASE), 0,0,0,0,0,0,0,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_DDR_SDRAM_BASE), 0,0,0,0,0,1,0,1,0,1)
-
- .long TLB1_MAS0(1, 9, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_64M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_DDR_SDRAM_BASE + 0x4000000),
- 0,0,0,0,0,0,0,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_DDR_SDRAM_BASE + 0x4000000),
- 0,0,0,0,0,1,0,1,0,1)
-#endif
-
- entry_end
-
-/*
- * LAW(Local Access Window) configuration:
- *
- * 0x0000_0000 0x7fff_ffff DDR 2G
- * 0x8000_0000 0x9fff_ffff PCI1 MEM 512M
- * 0xc000_0000 0xdfff_ffff RapidIO 512M
- * 0xe000_0000 0xe000_ffff CCSR 1M
- * 0xe200_0000 0xe2ff_ffff PCI1 IO 16M
- * 0xf000_0000 0xf7ff_ffff SDRAM 128M
- * 0xf800_0000 0xf80f_ffff BCSR 1M
- * 0xff00_0000 0xffff_ffff FLASH (boot bank) 16M
- *
- * Notes:
- * CCSRBAR and L2-as-SRAM don't need a configured Local Access Window.
- * If flash is 8M at default position (last 8M), no LAW needed.
- */
-
-#if !defined(CONFIG_SPD_EEPROM)
-#define LAWBAR0 ((CFG_DDR_SDRAM_BASE>>12) & 0xfffff)
-#define LAWAR0 (LAWAR_EN | LAWAR_TRGT_IF_DDR | (LAWAR_SIZE & LAWAR_SIZE_128M))
-#else
-#define LAWBAR0 0
-#define LAWAR0 ((LAWAR_TRGT_IF_DDR | (LAWAR_SIZE & LAWAR_SIZE_128M)) & ~LAWAR_EN)
-#endif
-
-#define LAWBAR1 ((CFG_PCI1_MEM_BASE>>12) & 0xfffff)
-#define LAWAR1 (LAWAR_EN | LAWAR_TRGT_IF_PCIX | (LAWAR_SIZE & LAWAR_SIZE_512M))
-
-/*
- * This is not so much the SDRAM map as it is the whole localbus map.
- */
-#define LAWBAR2 ((CFG_LBC_SDRAM_BASE>>12) & 0xfffff)
-#define LAWAR2 (LAWAR_EN | LAWAR_TRGT_IF_LBC | (LAWAR_SIZE & LAWAR_SIZE_256M))
-
-#define LAWBAR3 ((CFG_PCI1_IO_BASE>>12) & 0xfffff)
-#define LAWAR3 (LAWAR_EN | LAWAR_TRGT_IF_PCIX | (LAWAR_SIZE & LAWAR_SIZE_16M))
-
-/*
- * Rapid IO at 0xc000_0000 for 512 M
- */
-#define LAWBAR4 ((CFG_RIO_MEM_BASE>>12) & 0xfffff)
-#define LAWAR4 (LAWAR_EN | LAWAR_TRGT_IF_RIO | (LAWAR_SIZE & LAWAR_SIZE_512M))
-
-
- .section .bootpg, "ax"
- .globl law_entry
-law_entry:
- entry_start
- .long 0x05
- .long LAWBAR0,LAWAR0,LAWBAR1,LAWAR1,LAWBAR2,LAWAR2,LAWBAR3,LAWAR3
- .long LAWBAR4,LAWAR4
- entry_end
diff --git a/board/mpc8560ads/mpc8560ads.c b/board/mpc8560ads/mpc8560ads.c
deleted file mode 100644
index 25f69a0bf5..0000000000
--- a/board/mpc8560ads/mpc8560ads.c
+++ /dev/null
@@ -1,546 +0,0 @@
-/*
- * Copyright 2004 Freescale Semiconductor.
- * (C) Copyright 2003,Motorola Inc.
- * Xianghua Xiao, (X.Xiao@motorola.com)
- *
- * (C) Copyright 2002 Scott McNutt <smcnutt@artesyncp.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-
-#include <common.h>
-#include <pci.h>
-#include <asm/processor.h>
-#include <asm/immap_85xx.h>
-#include <ioports.h>
-#include <spd.h>
-#include <miiphy.h>
-
-#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
-extern void ddr_enable_ecc(unsigned int dram_size);
-#endif
-
-extern long int spd_sdram(void);
-
-void local_bus_init(void);
-void sdram_init(void);
-long int fixed_sdram(void);
-
-
-/*
- * I/O Port configuration table
- *
- * if conf is 1, then that port pin will be configured at boot time
- * according to the five values podr/pdir/ppar/psor/pdat for that entry
- */
-
-const iop_conf_t iop_conf_tab[4][32] = {
-
- /* Port A configuration */
- { /* conf ppar psor pdir podr pdat */
- /* PA31 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 TxENB */
- /* PA30 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 TxClav */
- /* PA29 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 TxSOC */
- /* PA28 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 RxENB */
- /* PA27 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 RxSOC */
- /* PA26 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 RxClav */
- /* PA25 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[0] */
- /* PA24 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[1] */
- /* PA23 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[2] */
- /* PA22 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[3] */
- /* PA21 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[4] */
- /* PA20 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[5] */
- /* PA19 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[6] */
- /* PA18 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[7] */
- /* PA17 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[7] */
- /* PA16 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[6] */
- /* PA15 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[5] */
- /* PA14 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[4] */
- /* PA13 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[3] */
- /* PA12 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[2] */
- /* PA11 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[1] */
- /* PA10 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[0] */
- /* PA9 */ { 0, 1, 1, 1, 0, 0 }, /* FCC1 L1TXD */
- /* PA8 */ { 0, 1, 1, 0, 0, 0 }, /* FCC1 L1RXD */
- /* PA7 */ { 0, 0, 0, 1, 0, 0 }, /* PA7 */
- /* PA6 */ { 0, 1, 1, 1, 0, 0 }, /* TDM A1 L1RSYNC */
- /* PA5 */ { 0, 0, 0, 1, 0, 0 }, /* PA5 */
- /* PA4 */ { 0, 0, 0, 1, 0, 0 }, /* PA4 */
- /* PA3 */ { 0, 0, 0, 1, 0, 0 }, /* PA3 */
- /* PA2 */ { 0, 0, 0, 1, 0, 0 }, /* PA2 */
- /* PA1 */ { 1, 0, 0, 0, 0, 0 }, /* FREERUN */
- /* PA0 */ { 0, 0, 0, 1, 0, 0 } /* PA0 */
- },
-
- /* Port B configuration */
- { /* conf ppar psor pdir podr pdat */
- /* PB31 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TX_ER */
- /* PB30 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_DV */
- /* PB29 */ { 1, 1, 1, 1, 0, 0 }, /* FCC2 MII TX_EN */
- /* PB28 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_ER */
- /* PB27 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII COL */
- /* PB26 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII CRS */
- /* PB25 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[3] */
- /* PB24 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[2] */
- /* PB23 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[1] */
- /* PB22 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[0] */
- /* PB21 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[0] */
- /* PB20 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[1] */
- /* PB19 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[2] */
- /* PB18 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[3] */
- /* PB17 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:RX_DIV */
- /* PB16 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:RX_ERR */
- /* PB15 */ { 0, 1, 0, 1, 0, 0 }, /* FCC3:TX_ERR */
- /* PB14 */ { 0, 1, 0, 1, 0, 0 }, /* FCC3:TX_EN */
- /* PB13 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:COL */
- /* PB12 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:CRS */
- /* PB11 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:RXD */
- /* PB10 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:RXD */
- /* PB9 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:RXD */
- /* PB8 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:RXD */
- /* PB7 */ { 0, 1, 0, 1, 0, 0 }, /* FCC3:TXD */
- /* PB6 */ { 0, 1, 0, 1, 0, 0 }, /* FCC3:TXD */
- /* PB5 */ { 0, 1, 0, 1, 0, 0 }, /* FCC3:TXD */
- /* PB4 */ { 0, 1, 0, 1, 0, 0 }, /* FCC3:TXD */
- /* PB3 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PB2 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PB1 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PB0 */ { 0, 0, 0, 0, 0, 0 } /* pin doesn't exist */
- },
-
- /* Port C */
- { /* conf ppar psor pdir podr pdat */
- /* PC31 */ { 0, 0, 0, 1, 0, 0 }, /* PC31 */
- /* PC30 */ { 0, 0, 0, 1, 0, 0 }, /* PC30 */
- /* PC29 */ { 0, 1, 1, 0, 0, 0 }, /* SCC1 EN *CLSN */
- /* PC28 */ { 0, 0, 0, 1, 0, 0 }, /* PC28 */
- /* PC27 */ { 0, 0, 0, 1, 0, 0 }, /* UART Clock in */
- /* PC26 */ { 0, 0, 0, 1, 0, 0 }, /* PC26 */
- /* PC25 */ { 0, 0, 0, 1, 0, 0 }, /* PC25 */
- /* PC24 */ { 0, 0, 0, 1, 0, 0 }, /* PC24 */
- /* PC23 */ { 0, 1, 0, 1, 0, 0 }, /* ATMTFCLK */
- /* PC22 */ { 0, 1, 0, 0, 0, 0 }, /* ATMRFCLK */
- /* PC21 */ { 0, 1, 0, 0, 0, 0 }, /* SCC1 EN RXCLK */
- /* PC20 */ { 0, 1, 0, 0, 0, 0 }, /* SCC1 EN TXCLK */
- /* PC19 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_CLK CLK13 */
- /* PC18 */ { 1, 1, 0, 0, 0, 0 }, /* FCC Tx Clock (CLK14) */
- /* PC17 */ { 0, 0, 0, 1, 0, 0 }, /* PC17 */
- /* PC16 */ { 0, 1, 0, 0, 0, 0 }, /* FCC Tx Clock (CLK16) */
- /* PC15 */ { 1, 1, 0, 0, 0, 0 }, /* PC15 */
- /* PC14 */ { 0, 1, 0, 0, 0, 0 }, /* SCC1 EN *CD */
- /* PC13 */ { 0, 0, 0, 1, 0, 0 }, /* PC13 */
- /* PC12 */ { 0, 1, 0, 1, 0, 0 }, /* PC12 */
- /* PC11 */ { 0, 0, 0, 1, 0, 0 }, /* LXT971 transmit control */
- /* PC10 */ { 1, 0, 0, 1, 0, 0 }, /* FETHMDC */
- /* PC9 */ { 1, 0, 0, 0, 0, 0 }, /* FETHMDIO */
- /* PC8 */ { 0, 0, 0, 1, 0, 0 }, /* PC8 */
- /* PC7 */ { 0, 0, 0, 1, 0, 0 }, /* PC7 */
- /* PC6 */ { 0, 0, 0, 1, 0, 0 }, /* PC6 */
- /* PC5 */ { 0, 0, 0, 1, 0, 0 }, /* PC5 */
- /* PC4 */ { 0, 0, 0, 1, 0, 0 }, /* PC4 */
- /* PC3 */ { 0, 0, 0, 1, 0, 0 }, /* PC3 */
- /* PC2 */ { 0, 0, 0, 1, 0, 1 }, /* ENET FDE */
- /* PC1 */ { 0, 0, 0, 1, 0, 0 }, /* ENET DSQE */
- /* PC0 */ { 0, 0, 0, 1, 0, 0 }, /* ENET LBK */
- },
-
- /* Port D */
- { /* conf ppar psor pdir podr pdat */
- /* PD31 */ { 1, 1, 0, 0, 0, 0 }, /* SCC1 EN RxD */
- /* PD30 */ { 1, 1, 1, 1, 0, 0 }, /* SCC1 EN TxD */
- /* PD29 */ { 1, 1, 0, 1, 0, 0 }, /* SCC1 EN TENA */
- /* PD28 */ { 0, 1, 0, 0, 0, 0 }, /* PD28 */
- /* PD27 */ { 0, 1, 1, 1, 0, 0 }, /* PD27 */
- /* PD26 */ { 0, 0, 0, 1, 0, 0 }, /* PD26 */
- /* PD25 */ { 0, 0, 0, 1, 0, 0 }, /* PD25 */
- /* PD24 */ { 0, 0, 0, 1, 0, 0 }, /* PD24 */
- /* PD23 */ { 0, 0, 0, 1, 0, 0 }, /* PD23 */
- /* PD22 */ { 0, 0, 0, 1, 0, 0 }, /* PD22 */
- /* PD21 */ { 0, 0, 0, 1, 0, 0 }, /* PD21 */
- /* PD20 */ { 0, 0, 0, 1, 0, 0 }, /* PD20 */
- /* PD19 */ { 0, 0, 0, 1, 0, 0 }, /* PD19 */
- /* PD18 */ { 0, 0, 0, 1, 0, 0 }, /* PD18 */
- /* PD17 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXPRTY */
- /* PD16 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXPRTY */
- /* PD15 */ { 0, 1, 1, 0, 1, 0 }, /* I2C SDA */
- /* PD14 */ { 0, 0, 0, 1, 0, 0 }, /* LED */
- /* PD13 */ { 0, 0, 0, 0, 0, 0 }, /* PD13 */
- /* PD12 */ { 0, 0, 0, 0, 0, 0 }, /* PD12 */
- /* PD11 */ { 0, 0, 0, 0, 0, 0 }, /* PD11 */
- /* PD10 */ { 0, 0, 0, 0, 0, 0 }, /* PD10 */
- /* PD9 */ { 0, 1, 0, 1, 0, 0 }, /* SMC1 TXD */
- /* PD8 */ { 0, 1, 0, 0, 0, 0 }, /* SMC1 RXD */
- /* PD7 */ { 0, 0, 0, 1, 0, 1 }, /* PD7 */
- /* PD6 */ { 0, 0, 0, 1, 0, 1 }, /* PD6 */
- /* PD5 */ { 0, 0, 0, 1, 0, 1 }, /* PD5 */
- /* PD4 */ { 0, 0, 0, 1, 0, 1 }, /* PD4 */
- /* PD3 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PD2 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PD1 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PD0 */ { 0, 0, 0, 0, 0, 0 } /* pin doesn't exist */
- }
-};
-
-
-/*
- * MPC8560ADS Board Status & Control Registers
- */
-typedef struct bcsr_ {
- volatile unsigned char bcsr0;
- volatile unsigned char bcsr1;
- volatile unsigned char bcsr2;
- volatile unsigned char bcsr3;
- volatile unsigned char bcsr4;
- volatile unsigned char bcsr5;
-} bcsr_t;
-
-
-int board_early_init_f (void)
-{
- return 0;
-}
-
-void reset_phy (void)
-{
-#if defined(CONFIG_ETHER_ON_FCC) /* avoid compile warnings for now */
- volatile bcsr_t *bcsr = (bcsr_t *) CFG_BCSR;
-#endif
- /* reset Giga bit Ethernet port if needed here */
-
- /* reset the CPM FEC port */
-#if (CONFIG_ETHER_INDEX == 2)
- bcsr->bcsr2 &= ~FETH2_RST;
- udelay(2);
- bcsr->bcsr2 |= FETH2_RST;
- udelay(1000);
-#elif (CONFIG_ETHER_INDEX == 3)
- bcsr->bcsr3 &= ~FETH3_RST;
- udelay(2);
- bcsr->bcsr3 |= FETH3_RST;
- udelay(1000);
-#endif
-#if defined(CONFIG_MII) && defined(CONFIG_ETHER_ON_FCC)
- /* reset PHY */
- miiphy_reset("FCC1 ETHERNET", 0x0);
-
- /* change PHY address to 0x02 */
- bb_miiphy_write(NULL, 0, PHY_MIPSCR, 0xf028);
-
- bb_miiphy_write(NULL, 0x02, PHY_BMCR,
- PHY_BMCR_AUTON | PHY_BMCR_RST_NEG);
-#endif /* CONFIG_MII */
-}
-
-
-int checkboard (void)
-{
- puts("Board: ADS\n");
-
-#ifdef CONFIG_PCI
- printf(" PCI1: 32 bit, %d MHz (compiled)\n",
- CONFIG_SYS_CLK_FREQ / 1000000);
-#else
- printf(" PCI1: disabled\n");
-#endif
-
- /*
- * Initialize local bus.
- */
- local_bus_init();
-
- return 0;
-}
-
-
-long int
-initdram(int board_type)
-{
- long dram_size = 0;
- extern long spd_sdram (void);
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
-
- puts("Initializing\n");
-
-#if defined(CONFIG_DDR_DLL)
- {
- volatile ccsr_gur_t *gur= &immap->im_gur;
- uint temp_ddrdll = 0;
-
- /*
- * Work around to stabilize DDR DLL
- */
- temp_ddrdll = gur->ddrdllcr;
- gur->ddrdllcr = ((temp_ddrdll & 0xff) << 16) | 0x80000000;
- asm("sync;isync;msync");
- }
-#endif
-
-#if defined(CONFIG_SPD_EEPROM)
- dram_size = spd_sdram ();
-#else
- dram_size = fixed_sdram ();
-#endif
-
-#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
- /*
- * Initialize and enable DDR ECC.
- */
- ddr_enable_ecc(dram_size);
-#endif
-
- /*
- * Initialize SDRAM.
- */
- sdram_init();
-
- puts(" DDR: ");
- return dram_size;
-}
-
-
-/*
- * Initialize Local Bus
- */
-
-void
-local_bus_init(void)
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile ccsr_gur_t *gur = &immap->im_gur;
- volatile ccsr_lbc_t *lbc = &immap->im_lbc;
-
- uint clkdiv;
- uint lbc_hz;
- sys_info_t sysinfo;
-
- /*
- * Errata LBC11.
- * Fix Local Bus clock glitch when DLL is enabled.
- *
- * If localbus freq is < 66Mhz, DLL bypass mode must be used.
- * If localbus freq is > 133Mhz, DLL can be safely enabled.
- * Between 66 and 133, the DLL is enabled with an override workaround.
- */
-
- get_sys_info(&sysinfo);
- clkdiv = lbc->lcrr & 0x0f;
- lbc_hz = sysinfo.freqSystemBus / 1000000 / clkdiv;
-
- if (lbc_hz < 66) {
- lbc->lcrr = CFG_LBC_LCRR | 0x80000000; /* DLL Bypass */
-
- } else if (lbc_hz >= 133) {
- lbc->lcrr = CFG_LBC_LCRR & (~0x80000000); /* DLL Enabled */
-
- } else {
- /*
- * On REV1 boards, need to change CLKDIV before enable DLL.
- * Default CLKDIV is 8, change it to 4 temporarily.
- */
- uint pvr = get_pvr();
- uint temp_lbcdll = 0;
-
- if (pvr == PVR_85xx_REV1) {
- /* FIXME: Justify the high bit here. */
- lbc->lcrr = 0x10000004;
- }
-
- lbc->lcrr = CFG_LBC_LCRR & (~0x80000000);/* DLL Enabled */
- udelay(200);
-
- /*
- * Sample LBC DLL ctrl reg, upshift it to set the
- * override bits.
- */
- temp_lbcdll = gur->lbcdllcr;
- gur->lbcdllcr = (((temp_lbcdll & 0xff) << 16) | 0x80000000);
- asm("sync;isync;msync");
- }
-}
-
-
-/*
- * Initialize SDRAM memory on the Local Bus.
- */
-
-void
-sdram_init(void)
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile ccsr_lbc_t *lbc= &immap->im_lbc;
- uint *sdram_addr = (uint *)CFG_LBC_SDRAM_BASE;
-
- puts(" SDRAM: ");
- print_size (CFG_LBC_SDRAM_SIZE * 1024 * 1024, "\n");
-
- /*
- * Setup SDRAM Base and Option Registers
- */
- lbc->or2 = CFG_OR2_PRELIM;
- lbc->br2 = CFG_BR2_PRELIM;
- lbc->lbcr = CFG_LBC_LBCR;
- asm("msync");
-
- lbc->lsrt = CFG_LBC_LSRT;
- lbc->mrtpr = CFG_LBC_MRTPR;
- asm("sync");
-
- /*
- * Configure the SDRAM controller.
- */
- lbc->lsdmr = CFG_LBC_LSDMR_1;
- asm("sync");
- *sdram_addr = 0xff;
- ppcDcbf((unsigned long) sdram_addr);
- udelay(100);
-
- lbc->lsdmr = CFG_LBC_LSDMR_2;
- asm("sync");
- *sdram_addr = 0xff;
- ppcDcbf((unsigned long) sdram_addr);
- udelay(100);
-
- lbc->lsdmr = CFG_LBC_LSDMR_3;
- asm("sync");
- *sdram_addr = 0xff;
- ppcDcbf((unsigned long) sdram_addr);
- udelay(100);
-
- lbc->lsdmr = CFG_LBC_LSDMR_4;
- asm("sync");
- *sdram_addr = 0xff;
- ppcDcbf((unsigned long) sdram_addr);
- udelay(100);
-
- lbc->lsdmr = CFG_LBC_LSDMR_5;
- asm("sync");
- *sdram_addr = 0xff;
- ppcDcbf((unsigned long) sdram_addr);
- udelay(100);
-}
-
-
-#if defined(CFG_DRAM_TEST)
-int testdram (void)
-{
- uint *pstart = (uint *) CFG_MEMTEST_START;
- uint *pend = (uint *) CFG_MEMTEST_END;
- uint *p;
-
- printf("SDRAM test phase 1:\n");
- for (p = pstart; p < pend; p++)
- *p = 0xaaaaaaaa;
-
- for (p = pstart; p < pend; p++) {
- if (*p != 0xaaaaaaaa) {
- printf ("SDRAM test fails at: %08x\n", (uint) p);
- return 1;
- }
- }
-
- printf("SDRAM test phase 2:\n");
- for (p = pstart; p < pend; p++)
- *p = 0x55555555;
-
- for (p = pstart; p < pend; p++) {
- if (*p != 0x55555555) {
- printf ("SDRAM test fails at: %08x\n", (uint) p);
- return 1;
- }
- }
-
- printf("SDRAM test passed.\n");
- return 0;
-}
-#endif
-
-
-#if !defined(CONFIG_SPD_EEPROM)
-/*************************************************************************
- * fixed sdram init -- doesn't use serial presence detect.
- ************************************************************************/
-long int fixed_sdram (void)
-{
- #ifndef CFG_RAMBOOT
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile ccsr_ddr_t *ddr= &immap->im_ddr;
-
- ddr->cs0_bnds = CFG_DDR_CS0_BNDS;
- ddr->cs0_config = CFG_DDR_CS0_CONFIG;
- ddr->timing_cfg_1 = CFG_DDR_TIMING_1;
- ddr->timing_cfg_2 = CFG_DDR_TIMING_2;
- ddr->sdram_mode = CFG_DDR_MODE;
- ddr->sdram_interval = CFG_DDR_INTERVAL;
- #if defined (CONFIG_DDR_ECC)
- ddr->err_disable = 0x0000000D;
- ddr->err_sbe = 0x00ff0000;
- #endif
- asm("sync;isync;msync");
- udelay(500);
- #if defined (CONFIG_DDR_ECC)
- /* Enable ECC checking */
- ddr->sdram_cfg = (CFG_DDR_CONTROL | 0x20000000);
- #else
- ddr->sdram_cfg = CFG_DDR_CONTROL;
- #endif
- asm("sync; isync; msync");
- udelay(500);
- #endif
- return CFG_SDRAM_SIZE * 1024 * 1024;
-}
-#endif /* !defined(CONFIG_SPD_EEPROM) */
-
-
-#if defined(CONFIG_PCI)
-/*
- * Initialize PCI Devices, report devices found.
- */
-
-#ifndef CONFIG_PCI_PNP
-static struct pci_config_table pci_mpc85xxads_config_table[] = {
- { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
- PCI_IDSEL_NUMBER, PCI_ANY_ID,
- pci_cfgfunc_config_device, { PCI_ENET0_IOADDR,
- PCI_ENET0_MEMADDR,
- PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER
- } },
- { }
-};
-#endif
-
-
-static struct pci_controller hose = {
-#ifndef CONFIG_PCI_PNP
- config_table: pci_mpc85xxads_config_table,
-#endif
-};
-
-#endif /* CONFIG_PCI */
-
-
-void
-pci_init_board(void)
-{
-#ifdef CONFIG_PCI
- extern void pci_mpc85xx_init(struct pci_controller *hose);
-
- pci_mpc85xx_init(&hose);
-#endif /* CONFIG_PCI */
-}
diff --git a/board/mpc8560ads/u-boot.lds b/board/mpc8560ads/u-boot.lds
deleted file mode 100644
index 8dcee1f101..0000000000
--- a/board/mpc8560ads/u-boot.lds
+++ /dev/null
@@ -1,154 +0,0 @@
-/*
- * (C) Copyright 2002,2003,Motorola,Inc.
- * Xianghua Xiao, X.Xiao@motorola.com.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- .resetvec 0xFFFFFFFC :
- {
- *(.resetvec)
- } = 0xffff
-
- .bootpg 0xFFFFF000 :
- {
- cpu/mpc85xx/start.o (.bootpg)
- board/mpc8560ads/init.o (.bootpg)
- } = 0xffff
-
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc85xx/start.o (.text)
- board/mpc8560ads/init.o (.text)
- cpu/mpc85xx/commproc.o (.text)
- cpu/mpc85xx/traps.o (.text)
- cpu/mpc85xx/interrupts.o (.text)
- cpu/mpc85xx/serial_scc.o (.text)
- cpu/mpc85xx/ether_fcc.o (.text)
- cpu/mpc85xx/cpu_init.o (.text)
- cpu/mpc85xx/cpu.o (.text)
- cpu/mpc85xx/speed.o (.text)
- cpu/mpc85xx/i2c.o (.text)
- cpu/mpc85xx/spd_sdram.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/extable.o (.text)
- lib_generic/zlib.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/mpl/common/common_util.c b/board/mpl/common/common_util.c
deleted file mode 100644
index b331d6ec47..0000000000
--- a/board/mpl/common/common_util.c
+++ /dev/null
@@ -1,674 +0,0 @@
-/*
- * (C) Copyright 2001
- * Denis Peter, MPL AG Switzerland, d.peter@mpl.ch
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- */
-
-#include <common.h>
-#include <command.h>
-#include <video_fb.h>
-#include "common_util.h"
-#include <asm/processor.h>
-#include <asm/byteorder.h>
-#include <i2c.h>
-#include <devices.h>
-#include <pci.h>
-#include <malloc.h>
-#include <bzlib.h>
-
-#ifdef CONFIG_PIP405
-#include "../pip405/pip405.h"
-#include <405gp_pci.h>
-#endif
-#ifdef CONFIG_MIP405
-#include "../mip405/mip405.h"
-#include <405gp_pci.h>
-#endif
-#if defined(CONFIG_PATI)
-#define FIRM_START 0xFFF00000
-#endif
-
-extern int gunzip(void *, int, uchar *, unsigned long *);
-extern int mem_test(ulong start, ulong ramsize, int quiet);
-
-#define I2C_BACKUP_ADDR 0x7C00 /* 0x200 bytes for backup */
-#define IMAGE_SIZE CFG_MONITOR_LEN /* ugly, but it works for now */
-
-extern flash_info_t flash_info[]; /* info for FLASH chips */
-
-static image_header_t header;
-
-
-static int
-mpl_prg(uchar *src, ulong size)
-{
- ulong start;
- flash_info_t *info;
- int i, rc;
-#if defined(CONFIG_PATI)
- int start_sect;
-#endif
-#if defined(CONFIG_PIP405) || defined(CONFIG_MIP405) || defined(CONFIG_PATI)
- char *copystr = (char *)src;
- ulong *magic = (ulong *)src;
-#endif
-
- info = &flash_info[0];
-
-#if defined(CONFIG_PIP405) || defined(CONFIG_MIP405) || defined(CONFIG_PATI)
- if (ntohl(magic[0]) != IH_MAGIC) {
- puts("Bad Magic number\n");
- return -1;
- }
- /* some more checks before we delete the Flash... */
- /* Checking the ISO_STRING prevents to program a
- * wrong Firmware Image into the flash.
- */
- i = 4; /* skip Magic number */
- while (1) {
- if (strncmp(&copystr[i], "MEV-", 4) == 0)
- break;
- if (i++ >= 0x100) {
- puts("Firmware Image for unknown Target\n");
- return -1;
- }
- }
- /* we have the ISO STRING, check */
- if (strncmp(&copystr[i], CONFIG_ISO_STRING, sizeof(CONFIG_ISO_STRING)-1) != 0) {
- printf("Wrong Firmware Image: %s\n", &copystr[i]);
- return -1;
- }
-#if !defined(CONFIG_PATI)
- start = 0 - size;
- for (i = info->sector_count-1; i > 0; i--) {
- info->protect[i] = 0; /* unprotect this sector */
- if (start >= info->start[i])
- break;
- }
- /* set-up flash location */
- /* now erase flash */
- printf("Erasing at %lx (sector %d) (start %lx)\n",
- start,i,info->start[i]);
- if ((rc = flash_erase (info, i, info->sector_count-1)) != 0) {
- puts("ERROR ");
- flash_perror(rc);
- return (1);
- }
-
-#else /* #if !defined(CONFIG_PATI */
- start = FIRM_START;
- start_sect = -1;
- for (i = 0; i < info->sector_count; i++) {
- if (start < info->start[i]) {
- start_sect = i - 1;
- break;
- }
- }
-
- info->protect[i - 1] = 0; /* unprotect this sector */
- for (; i < info->sector_count; i++) {
- if ((start + size) < info->start[i])
- break;
- info->protect[i] = 0; /* unprotect this sector */
- }
-
- i--;
- /* set-up flash location */
- /* now erase flash */
- printf ("Erasing at %lx to %lx (sector %d to %d) (%lx to %lx)\n",
- start, start + size, start_sect, i,
- info->start[start_sect], info->start[i]);
- if ((rc = flash_erase (info, start_sect, i)) != 0) {
- puts ("ERROR ");
- flash_perror (rc);
- return (1);
- }
-#endif /* defined(CONFIG_PATI) */
-
-#elif defined(CONFIG_VCMA9)
- start = 0;
- for (i = 0; i <info->sector_count; i++) {
- info->protect[i] = 0; /* unprotect this sector */
- if (size < info->start[i])
- break;
- }
- /* set-up flash location */
- /* now erase flash */
- printf("Erasing at %lx (sector %d) (start %lx)\n",
- start,0,info->start[0]);
- if ((rc = flash_erase (info, 0, i)) != 0) {
- puts("ERROR ");
- flash_perror(rc);
- return (1);
- }
-
-#endif
- printf("flash erased, programming from 0x%lx 0x%lx Bytes\n",
- (ulong)src, size);
- if ((rc = flash_write ((char *)src, start, size)) != 0) {
- puts("ERROR ");
- flash_perror(rc);
- return (1);
- }
- puts("OK programming done\n");
- return 0;
-}
-
-
-static int
-mpl_prg_image(uchar *ld_addr)
-{
- unsigned long len, checksum;
- uchar *data;
- image_header_t *hdr = &header;
- int rc;
-
- /* Copy header so we can blank CRC field for re-calculation */
- memcpy (&header, (char *)ld_addr, sizeof(image_header_t));
- if (ntohl(hdr->ih_magic) != IH_MAGIC) {
- puts("Bad Magic Number\n");
- return 1;
- }
- print_image_hdr(hdr);
- if (hdr->ih_os != IH_OS_U_BOOT) {
- puts("No U-Boot Image\n");
- return 1;
- }
- if (hdr->ih_type != IH_TYPE_FIRMWARE) {
- puts("No Firmware Image\n");
- return 1;
- }
- data = (uchar *)&header;
- len = sizeof(image_header_t);
- checksum = ntohl(hdr->ih_hcrc);
- hdr->ih_hcrc = 0;
- if (crc32 (0, (uchar *)data, len) != checksum) {
- puts("Bad Header Checksum\n");
- return 1;
- }
- data = ld_addr + sizeof(image_header_t);
- len = ntohl(hdr->ih_size);
- puts("Verifying Checksum ... ");
- if (crc32 (0, (uchar *)data, len) != ntohl(hdr->ih_dcrc)) {
- puts("Bad Data CRC\n");
- return 1;
- }
- puts("OK\n");
-
- if (hdr->ih_comp != IH_COMP_NONE) {
- uchar *buf;
- /* reserve space for uncompressed image */
- if ((buf = malloc(IMAGE_SIZE)) == NULL) {
- puts("Insufficient space for decompression\n");
- return 1;
- }
-
- switch (hdr->ih_comp) {
- case IH_COMP_GZIP:
- puts("Uncompressing (GZIP) ... ");
- rc = gunzip ((void *)(buf), IMAGE_SIZE, data, &len);
- if (rc != 0) {
- puts("GUNZIP ERROR\n");
- free(buf);
- return 1;
- }
- puts("OK\n");
- break;
-#ifdef CONFIG_BZIP2
- case IH_COMP_BZIP2:
- puts("Uncompressing (BZIP2) ... ");
- {
- uint retlen = IMAGE_SIZE;
- rc = BZ2_bzBuffToBuffDecompress ((char *)(buf), &retlen,
- (char *)data, len, 0, 0);
- len = retlen;
- }
- if (rc != BZ_OK) {
- printf ("BUNZIP2 ERROR: %d\n", rc);
- free(buf);
- return 1;
- }
- puts("OK\n");
- break;
-#endif
- default:
- printf ("Unimplemented compression type %d\n", hdr->ih_comp);
- free(buf);
- return 1;
- }
-
- rc = mpl_prg(buf, len);
- free(buf);
- } else {
- rc = mpl_prg(data, len);
- }
-
- return(rc);
-}
-
-#if !defined(CONFIG_PATI)
-void get_backup_values(backup_t *buf)
-{
- i2c_read(CFG_DEF_EEPROM_ADDR, I2C_BACKUP_ADDR,2,(void *)buf,sizeof(backup_t));
-}
-
-void set_backup_values(int overwrite)
-{
- backup_t back;
- int i;
-
- get_backup_values(&back);
- if(!overwrite) {
- if(strncmp(back.signature,"MPL\0",4)==0) {
- puts("Not possible to write Backup\n");
- return;
- }
- }
- memcpy(back.signature,"MPL\0",4);
- i = getenv_r("serial#",back.serial_name,16);
- if(i < 0) {
- puts("Not possible to write Backup\n");
- return;
- }
- back.serial_name[16]=0;
- i = getenv_r("ethaddr",back.eth_addr,20);
- if(i < 0) {
- puts("Not possible to write Backup\n");
- return;
- }
- back.eth_addr[20]=0;
- i2c_write(CFG_DEF_EEPROM_ADDR, I2C_BACKUP_ADDR,2,(void *)&back,sizeof(backup_t));
-}
-
-void clear_env_values(void)
-{
- backup_t back;
- unsigned char env_crc[4];
-
- memset(&back,0xff,sizeof(backup_t));
- memset(env_crc,0x00,4);
- i2c_write(CFG_DEF_EEPROM_ADDR,I2C_BACKUP_ADDR,2,(void *)&back,sizeof(backup_t));
- i2c_write(CFG_DEF_EEPROM_ADDR,CFG_ENV_OFFSET,2,(void *)env_crc,4);
-}
-
-/*
- * check crc of "older" environment
- */
-int check_env_old_size(ulong oldsize)
-{
- ulong crc, len, new;
- unsigned off;
- uchar buf[64];
-
- /* read old CRC */
- eeprom_read (CFG_DEF_EEPROM_ADDR,
- CFG_ENV_OFFSET,
- (uchar *)&crc, sizeof(ulong));
-
- new = 0;
- len = oldsize;
- off = sizeof(long);
- len = oldsize-off;
- while (len > 0) {
- int n = (len > sizeof(buf)) ? sizeof(buf) : len;
-
- eeprom_read (CFG_DEF_EEPROM_ADDR, CFG_ENV_OFFSET+off, buf, n);
- new = crc32 (new, buf, n);
- len -= n;
- off += n;
- }
-
- return (crc == new);
-}
-
-static ulong oldsizes[] = {
- 0x200,
- 0x800,
- 0
-};
-
-void copy_old_env(ulong size)
-{
- uchar name_buf[64];
- uchar value_buf[0x800];
- uchar c;
- ulong len;
- unsigned off;
- uchar *name, *value;
-
- name=&name_buf[0];
- value=&value_buf[0];
- len=size;
- off = sizeof(long);
- while (len > off) {
- eeprom_read (CFG_DEF_EEPROM_ADDR, CFG_ENV_OFFSET+off, &c, 1);
- if(c != '=') {
- *name++=c;
- off++;
- }
- else {
- *name++='\0';
- off++;
- do {
- eeprom_read (CFG_DEF_EEPROM_ADDR, CFG_ENV_OFFSET+off, &c, 1);
- *value++=c;
- off++;
- if(c == '\0')
- break;
- } while(len > off);
- name=&name_buf[0];
- value=&value_buf[0];
- if(strncmp((char *)name,"baudrate",8)!=0) {
- setenv((char *)name,(char *)value);
- }
-
- }
- }
-}
-
-
-void check_env(void)
-{
- char *s;
- int i=0;
- char buf[32];
- backup_t back;
-
- s=getenv("serial#");
- if(!s) {
- while(oldsizes[i]) {
- if(check_env_old_size(oldsizes[i]))
- break;
- i++;
- }
- if(!oldsizes[i]) {
- /* no old environment has been found */
- get_backup_values (&back);
- if (strncmp (back.signature, "MPL\0", 4) == 0) {
- sprintf (buf, "%s", back.serial_name);
- setenv ("serial#", buf);
- sprintf (buf, "%s", back.eth_addr);
- setenv ("ethaddr", buf);
- printf ("INFO: serial# and ethaddr recovered, use saveenv\n");
- return;
- }
- }
- else {
- copy_old_env(oldsizes[i]);
- puts("INFO: old environment ajusted, use saveenv\n");
- }
- }
- else {
- /* check if back up is set */
- get_backup_values(&back);
- if(strncmp(back.signature,"MPL\0",4)!=0) {
- set_backup_values(0);
- }
- }
-}
-
-
-extern device_t *stdio_devices[];
-extern char *stdio_names[];
-
-void show_stdio_dev(void)
-{
- /* Print information */
- puts("In: ");
- if (stdio_devices[stdin] == NULL) {
- puts("No input devices available!\n");
- } else {
- printf ("%s\n", stdio_devices[stdin]->name);
- }
-
- puts("Out: ");
- if (stdio_devices[stdout] == NULL) {
- puts("No output devices available!\n");
- } else {
- printf ("%s\n", stdio_devices[stdout]->name);
- }
-
- puts("Err: ");
- if (stdio_devices[stderr] == NULL) {
- puts("No error devices available!\n");
- } else {
- printf ("%s\n", stdio_devices[stderr]->name);
- }
-}
-
-#endif /* #if !defined(CONFIG_PATI) */
-
-int do_mplcommon(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- ulong size,src,ld_addr;
- int result;
-#if !defined(CONFIG_PATI)
- backup_t back;
- src = MULTI_PURPOSE_SOCKET_ADDR;
- size = IMAGE_SIZE;
-#endif
-
- if (strcmp(argv[1], "flash") == 0)
- {
-#if (CONFIG_COMMANDS & CFG_CMD_FDC)
- if (strcmp(argv[2], "floppy") == 0) {
- char *local_args[3];
- extern int do_fdcboot (cmd_tbl_t *, int, int, char *[]);
- puts("\nupdating bootloader image from floppy\n");
- local_args[0] = argv[0];
- if(argc==4) {
- local_args[1] = argv[3];
- local_args[2] = NULL;
- ld_addr=simple_strtoul(argv[3], NULL, 16);
- result=do_fdcboot(cmdtp, 0, 2, local_args);
- }
- else {
- local_args[1] = NULL;
- ld_addr=CFG_LOAD_ADDR;
- result=do_fdcboot(cmdtp, 0, 1, local_args);
- }
- result=mpl_prg_image((uchar *)ld_addr);
- return result;
- }
-#endif /* (CONFIG_COMMANDS & CFG_CMD_FDC) */
- if (strcmp(argv[2], "mem") == 0) {
- if(argc==4) {
- ld_addr=simple_strtoul(argv[3], NULL, 16);
- }
- else {
- ld_addr=load_addr;
- }
- printf ("\nupdating bootloader image from memory at %lX\n",ld_addr);
- result=mpl_prg_image((uchar *)ld_addr);
- return result;
- }
-#if !defined(CONFIG_PATI)
- if (strcmp(argv[2], "mps") == 0) {
- puts("\nupdating bootloader image from MPS\n");
- result=mpl_prg((uchar *)src,size);
- return result;
- }
-#endif /* #if !defined(CONFIG_PATI) */
- }
- if (strcmp(argv[1], "mem") == 0)
- {
- result=0;
- if(argc==3)
- {
- result = (int)simple_strtol(argv[2], NULL, 16);
- }
- src=(unsigned long)&result;
- src-=CFG_MEMTEST_START;
- src-=(100*1024); /* - 100k */
- src&=0xfff00000;
- size=0;
- do {
- size++;
- printf("\n\nPass %ld\n",size);
- mem_test(CFG_MEMTEST_START,src,1);
- if(ctrlc())
- break;
- if(result>0)
- result--;
-
- }while(result);
- return 0;
- }
-#if !defined(CONFIG_PATI)
- if (strcmp(argv[1], "clearenvvalues") == 0)
- {
- if (strcmp(argv[2], "yes") == 0)
- {
- clear_env_values();
- return 0;
- }
- }
- if (strcmp(argv[1], "getback") == 0) {
- get_backup_values(&back);
- back.signature[3]=0;
- back.serial_name[16]=0;
- back.eth_addr[20]=0;
- printf("GetBackUp: signature: %s\n",back.signature);
- printf(" serial#: %s\n",back.serial_name);
- printf(" ethaddr: %s\n",back.eth_addr);
- return 0;
- }
- if (strcmp(argv[1], "setback") == 0) {
- set_backup_values(1);
- return 0;
- }
-#endif
- printf("Usage:\n%s\n", cmdtp->usage);
- return 1;
-}
-
-
-#if (CONFIG_COMMANDS & CFG_CMD_DOC)
-extern void doc_probe(ulong physadr);
-void doc_init (void)
-{
- doc_probe(MULTI_PURPOSE_SOCKET_ADDR);
-}
-#endif
-
-
-#ifdef CONFIG_VIDEO
-/******************************************************
- * Routines to display the Board information
- * to the screen (since the VGA will be initialized as last,
- * we must resend the infos)
- */
-
-#ifdef CONFIG_CONSOLE_EXTRA_INFO
-extern GraphicDevice ctfb;
-extern int get_boot_mode(void);
-
-void video_get_info_str (int line_number, char *info)
-{
- /* init video info strings for graphic console */
- DECLARE_GLOBAL_DATA_PTR;
- PPC405_SYS_INFO sys_info;
- char rev;
- int i,boot;
- unsigned long pvr;
- char buf[64];
- char tmp[16];
- char cpustr[16];
- char *s, *e, bc;
- switch (line_number)
- {
- case 2:
- /* CPU and board infos */
- pvr=get_pvr();
- get_sys_info (&sys_info);
- switch (pvr) {
- case PVR_405GP_RB: rev='B'; break;
- case PVR_405GP_RC: rev='C'; break;
- case PVR_405GP_RD: rev='D'; break;
- case PVR_405GP_RE: rev='E'; break;
- case PVR_405GPR_RB: rev='B'; break;
- default: rev='?'; break;
- }
- if(pvr==PVR_405GPR_RB)
- sprintf(cpustr,"PPC405GPr %c",rev);
- else
- sprintf(cpustr,"PPC405GP %c",rev);
- /* Board info */
- i=0;
- s=getenv ("serial#");
-#ifdef CONFIG_PIP405
- if (!s || strncmp (s, "PIP405", 6)) {
- sprintf(buf,"### No HW ID - assuming PIP405");
- }
-#endif
-#ifdef CONFIG_MIP405
- if (!s || strncmp (s, "MIP405", 6)) {
- sprintf(buf,"### No HW ID - assuming MIP405");
- }
-#endif
- else {
- for (e = s; *e; ++e) {
- if (*e == ' ')
- break;
- }
- for (; s < e; ++s) {
- if (*s == '_') {
- ++s;
- break;
- }
- buf[i++]=*s;
- }
- sprintf(&buf[i]," SN ");
- i+=4;
- for (; s < e; ++s) {
- buf[i++]=*s;
- }
- buf[i++]=0;
- }
- sprintf (info," %s %s %s MHz (%lu/%lu/%lu MHz)",
- buf, cpustr,
- strmhz (tmp, gd->cpu_clk), sys_info.freqPLB / 1000000,
- sys_info.freqPLB / sys_info.pllOpbDiv / 1000000,
- sys_info.freqPLB / sys_info.pllExtBusDiv / 1000000);
- return;
- case 3:
- /* Memory Info */
- boot = get_boot_mode();
- bc = in8 (CONFIG_PORT_ADDR);
- sprintf(info, " %luMB RAM, %luMB Flash Cfg 0x%02X %s %s",
- gd->bd->bi_memsize / 0x100000,
- gd->bd->bi_flashsize / 0x100000,
- bc,
- (boot & BOOT_MPS) ? "MPS boot" : "Flash boot",
- ctfb.modeIdent);
- return;
- case 1:
- sprintf (buf, "%s",CONFIG_IDENT_STRING);
- sprintf (info, " %s", &buf[1]);
- return;
- }
- /* no more info lines */
- *info = 0;
- return;
-}
-#endif /* CONFIG_CONSOLE_EXTRA_INFO */
-
-#endif /* CONFIG_VIDEO */
diff --git a/board/mpl/common/common_util.h b/board/mpl/common/common_util.h
deleted file mode 100644
index 8f2ec03f6e..0000000000
--- a/board/mpl/common/common_util.h
+++ /dev/null
@@ -1,46 +0,0 @@
-/*
- * (C) Copyright 2001
- * Denis Peter, MPL AG Switzerland, d.peter@mpl.ch
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- */
-#ifndef _COMMON_UTIL_H_
-#define _COMMON_UTIL_H_
-
-typedef struct {
- char signature[4];
- char serial_name[17]; /* "MIP405_1000xxxxx" */
- char eth_addr[21]; /* "00:60:C2:0a:00:00" */
-} backup_t;
-
-void get_backup_values(backup_t *buf);
-
-#if defined(CONFIG_PIP405) || defined(CONFIG_MIP405)
-#define BOOT_MPS 0x01
-#define BOOT_PCI 0x02
-#endif
-
-void show_stdio_dev(void);
-void check_env(void);
-#if (CONFIG_COMMANDS & CFG_CMD_DOC)
-void doc_init (void);
-#endif
-
-#endif /* _COMMON_UTIL_H_ */
diff --git a/board/mpl/common/flash.c b/board/mpl/common/flash.c
deleted file mode 100644
index fd430083e2..0000000000
--- a/board/mpl/common/flash.c
+++ /dev/null
@@ -1,882 +0,0 @@
-/*
- * (C) Copyright 2000, 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * Modified 4/5/2001
- * Wait for completion of each sector erase command issued
- * 4/5/2001
- * Chris Hallinan - DS4.COM, Inc. - clh@net1plus.com
- */
-
-/*
- * Modified 3/7/2001
- * - adapted for pip405, Denis Peter, MPL AG Switzerland
- * TODO:
- * clean-up
- */
-
-#include <common.h>
-
-#if !defined(CONFIG_PATI)
-#include <ppc4xx.h>
-#include <asm/processor.h>
-#include "common_util.h"
-#if defined(CONFIG_MIP405)
-#include "../mip405/mip405.h"
-#endif
-#if defined(CONFIG_PIP405)
-#include "../pip405/pip405.h"
-#endif
-#include <405gp_pci.h>
-#else /* defined(CONFIG_PATI) */
-#include <mpc5xx.h>
-#endif
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (vu_long *addr, flash_info_t *info);
-static int write_word (flash_info_t *info, ulong dest, ulong data);
-
-void unlock_intel_sectors(flash_info_t *info,ulong addr,ulong cnt);
-
-#define ADDR0 0x5555
-#define ADDR1 0x2aaa
-#define FLASH_WORD_SIZE unsigned short
-
-#define FALSE 0
-#define TRUE 1
-
-#if !defined(CONFIG_PATI)
-
-/*-----------------------------------------------------------------------
- * Some CS switching routines:
- *
- * On PIP/MIP405 we have 3 (4) possible boot mode
- *
- * - Boot from Flash (Flash CS = CS0, MPS CS = CS1)
- * - Boot from MPS (Flash CS = CS1, MPS CS = CS0)
- * - Boot from PCI with Flash map (Flash CS = CS0, MPS CS = CS1)
- * - Boot from PCI with MPS map (Flash CS = CS1, MPS CS = CS0)
- * The flash init is the first board specific routine which is called
- * after code relocation (running from SDRAM)
- * The first thing we do is to map the Flash CS to the Flash area and
- * the MPS CS to the MPS area. Since the flash size is unknown at this
- * point, we use the max flash size and the lowest flash address as base.
- *
- * After flash detection we adjust the size of the CS area accordingly.
- * The board_init_r will fill in wrong values in the board init structure,
- * but this will be fixed in the misc_init_r routine:
- * bd->bi_flashstart=0-flash_info[0].size
- * bd->bi_flashsize=flash_info[0].size-CFG_MONITOR_LEN
- * bd->bi_flashoffset=0
- *
- */
-int get_boot_mode(void)
-{
- unsigned long pbcr;
- int res = 0;
- pbcr = mfdcr (strap);
- if ((pbcr & PSR_ROM_WIDTH_MASK) == 0)
- /* boot via MPS or MPS mapping */
- res = BOOT_MPS;
- if(pbcr & PSR_ROM_LOC)
- /* boot via PCI.. */
- res |= BOOT_PCI;
- return res;
-}
-
-/* Map the flash high (in boot area)
- This code can only be executed from SDRAM (after relocation).
-*/
-void setup_cs_reloc(void)
-{
- int mode;
- /* Since we are relocated, we can set-up the CS finaly
- * but first of all, switch off PCI mapping (in case it was a PCI boot) */
- out32r(PMM0MA,0L);
- icache_enable (); /* we are relocated */
- /* get boot mode */
- mode=get_boot_mode();
- /* we map the flash high in every case */
- /* first findout on which cs the flash is */
- if(mode & BOOT_MPS) {
- /* map flash high on CS1 and MPS on CS0 */
- mtdcr (ebccfga, pb0ap);
- mtdcr (ebccfgd, MPS_AP);
- mtdcr (ebccfga, pb0cr);
- mtdcr (ebccfgd, MPS_CR);
- /* we use the default values (max values) for the flash
- * because its real size is not yet known */
- mtdcr (ebccfga, pb1ap);
- mtdcr (ebccfgd, FLASH_AP);
- mtdcr (ebccfga, pb1cr);
- mtdcr (ebccfgd, FLASH_CR_B);
- }
- else {
- /* map flash high on CS0 and MPS on CS1 */
- mtdcr (ebccfga, pb1ap);
- mtdcr (ebccfgd, MPS_AP);
- mtdcr (ebccfga, pb1cr);
- mtdcr (ebccfgd, MPS_CR);
- /* we use the default values (max values) for the flash
- * because its real size is not yet known */
- mtdcr (ebccfga, pb0ap);
- mtdcr (ebccfgd, FLASH_AP);
- mtdcr (ebccfga, pb0cr);
- mtdcr (ebccfgd, FLASH_CR_B);
- }
-}
-
-#endif /* #if !defined(CONFIG_PATI) */
-
-unsigned long flash_init (void)
-{
- unsigned long size_b0;
- int i;
-
-#if !defined(CONFIG_PATI)
- unsigned long size_b1,flashcr,size_reg;
- int mode;
- extern char version_string;
- char *p=&version_string;
-
- /* Since we are relocated, we can set-up the CS finally */
- setup_cs_reloc();
- /* get and display boot mode */
- mode=get_boot_mode();
- if(mode & BOOT_PCI)
- printf("(PCI Boot %s Map) ",(mode & BOOT_MPS) ?
- "MPS" : "Flash");
- else
- printf("(%s Boot) ",(mode & BOOT_MPS) ?
- "MPS" : "Flash");
-#endif /* #if !defined(CONFIG_PATI) */
- /* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* Static FLASH Bank configuration here - FIXME XXX */
-
- size_b0 = flash_get_size((vu_long *)CFG_MONITOR_BASE, &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size_b0, size_b0<<20);
- }
- /* protect the bootloader */
- /* Monitor protection ON by default */
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
- flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+monitor_flash_len-1,
- &flash_info[0]);
-#endif
-#if !defined(CONFIG_PATI)
- /* protect reset vector */
- flash_info[0].protect[flash_info[0].sector_count-1] = 1;
- size_b1 = 0 ;
- flash_info[0].size = size_b0;
- /* set up flash cs according to the size */
- size_reg=(flash_info[0].size >>20);
- switch (size_reg) {
- case 0:
- case 1: i=0; break; /* <= 1MB */
- case 2: i=1; break; /* = 2MB */
- case 4: i=2; break; /* = 4MB */
- case 8: i=3; break; /* = 8MB */
- case 16: i=4; break; /* = 16MB */
- case 32: i=5; break; /* = 32MB */
- case 64: i=6; break; /* = 64MB */
- case 128: i=7; break; /*= 128MB */
- default:
- printf("\n #### ERROR, wrong size %ld MByte reset board #####\n",size_reg);
- while(1);
- }
- if(mode & BOOT_MPS) {
- /* flash is on CS1 */
- mtdcr(ebccfga, pb1cr);
- flashcr = mfdcr (ebccfgd);
- /* we map the flash high in every case */
- flashcr&=0x0001FFFF; /* mask out address bits */
- flashcr|= ((0-flash_info[0].size) & 0xFFF00000); /* start addr */
- flashcr|= (i << 17); /* size addr */
- mtdcr(ebccfga, pb1cr);
- mtdcr(ebccfgd, flashcr);
- }
- else {
- /* flash is on CS0 */
- mtdcr(ebccfga, pb0cr);
- flashcr = mfdcr (ebccfgd);
- /* we map the flash high in every case */
- flashcr&=0x0001FFFF; /* mask out address bits */
- flashcr|= ((0-flash_info[0].size) & 0xFFF00000); /* start addr */
- flashcr|= (i << 17); /* size addr */
- mtdcr(ebccfga, pb0cr);
- mtdcr(ebccfgd, flashcr);
- }
-#if 0
- /* enable this (PIP405/MIP405 only) if you want to test if
- the relocation has be done ok.
- This will disable both Chipselects */
- mtdcr (ebccfga, pb0cr);
- mtdcr (ebccfgd, 0L);
- mtdcr (ebccfga, pb1cr);
- mtdcr (ebccfgd, 0L);
- printf("CS0 & CS1 switched off for test\n");
-#endif
- /* patch version_string */
- for(i=0;i<0x100;i++) {
- if(*p=='\n') {
- *p=0;
- break;
- }
- p++;
- }
-#else /* #if !defined(CONFIG_PATI) */
-#ifdef CFG_ENV_IS_IN_FLASH
- /* ENV protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR+CFG_ENV_SECT_SIZE-1,
- &flash_info[0]);
-#endif
-#endif /* #if !defined(CONFIG_PATI) */
- return (size_b0);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t *info)
-{
- int i;
- int k;
- int size;
- int erased;
- volatile unsigned long *flash;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD: printf ("AMD "); break;
- case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
- case FLASH_MAN_SST: printf ("SST "); break;
- case FLASH_MAN_INTEL: printf ("Intel "); break;
- default: printf ("Unknown Vendor "); break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM040: printf ("AM29F040 (512 Kbit, uniform sector size)\n");
- break;
- case FLASH_AM400B: printf ("AM29LV400B (4 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM400T: printf ("AM29LV400T (4 Mbit, top boot sector)\n");
- break;
- case FLASH_AM800B: printf ("AM29LV800B (8 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM800T: printf ("AM29LV800T (8 Mbit, top boot sector)\n");
- break;
- case FLASH_AM160B: printf ("AM29LV160B (16 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM160T: printf ("AM29LV160T (16 Mbit, top boot sector)\n");
- break;
- case FLASH_AM320B: printf ("AM29LV320B (32 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM320T: printf ("AM29LV320T (32 Mbit, top boot sector)\n");
- break;
- case FLASH_SST800A: printf ("SST39LF/VF800 (8 Mbit, uniform sector size)\n");
- break;
- case FLASH_SST160A: printf ("SST39LF/VF160 (16 Mbit, uniform sector size)\n");
- break;
- case FLASH_INTEL320T: printf ("TE28F320C3 (32 Mbit, top sector size)\n");
- break;
- case FLASH_AM640U: printf ("AM29LV640U (64 Mbit, uniform sector size)\n");
- break;
- default: printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld KB in %d Sectors\n",
- info->size >> 10, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
- /*
- * Check if whole sector is erased
- */
- if (i != (info->sector_count-1))
- size = info->start[i+1] - info->start[i];
- else
- size = info->start[0] + info->size - info->start[i];
- erased = 1;
- flash = (volatile unsigned long *)info->start[i];
- size = size >> 2; /* divide by 4 for longword access */
- for (k=0; k<size; k++) {
- if (*flash++ != 0xffffffff) {
- erased = 0;
- break;
- }
- }
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s%s",
- info->start[i],
- erased ? " E" : " ",
- info->protect[i] ? "RO " : " ");
- }
- printf ("\n");
-}
-
-/*-----------------------------------------------------------------------
- */
-
-
-/*-----------------------------------------------------------------------
-
-*/
-
-/*
- * The following code cannot be run from FLASH!
- */
-static ulong flash_get_size (vu_long *addr, flash_info_t *info)
-{
- short i;
- FLASH_WORD_SIZE value;
- ulong base;
- volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *)addr;
-
- /* Write auto select command: read Manufacturer ID */
- addr2[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
- addr2[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
- addr2[ADDR0] = (FLASH_WORD_SIZE)0x00900090;
-
- value = addr2[0];
- /* printf("flash_get_size value: %x\n",value); */
- switch (value) {
- case (FLASH_WORD_SIZE)AMD_MANUFACT:
- info->flash_id = FLASH_MAN_AMD;
- break;
- case (FLASH_WORD_SIZE)FUJ_MANUFACT:
- info->flash_id = FLASH_MAN_FUJ;
- break;
- case (FLASH_WORD_SIZE)INTEL_MANUFACT:
- info->flash_id = FLASH_MAN_INTEL;
- break;
- case (FLASH_WORD_SIZE)SST_MANUFACT:
- info->flash_id = FLASH_MAN_SST;
- break;
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- return (0); /* no or unknown flash */
- }
- value = addr2[1]; /* device ID */
- /* printf("Device value %x\n",value); */
- switch (value) {
- case (FLASH_WORD_SIZE)AMD_ID_F040B:
- info->flash_id += FLASH_AM040;
- info->sector_count = 8;
- info->size = 0x0080000; /* => 512 ko */
- break;
- case (FLASH_WORD_SIZE)AMD_ID_LV400T:
- info->flash_id += FLASH_AM400T;
- info->sector_count = 11;
- info->size = 0x00080000;
- break; /* => 0.5 MB */
-
- case (FLASH_WORD_SIZE)AMD_ID_LV400B:
- info->flash_id += FLASH_AM400B;
- info->sector_count = 11;
- info->size = 0x00080000;
- break; /* => 0.5 MB */
-
- case (FLASH_WORD_SIZE)AMD_ID_LV800T:
- info->flash_id += FLASH_AM800T;
- info->sector_count = 19;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case (FLASH_WORD_SIZE)AMD_ID_LV800B:
- info->flash_id += FLASH_AM800B;
- info->sector_count = 19;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case (FLASH_WORD_SIZE)AMD_ID_LV160T:
- info->flash_id += FLASH_AM160T;
- info->sector_count = 35;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case (FLASH_WORD_SIZE)AMD_ID_LV160B:
- info->flash_id += FLASH_AM160B;
- info->sector_count = 35;
- info->size = 0x00200000;
- break; /* => 2 MB */
- case (FLASH_WORD_SIZE)AMD_ID_LV320T:
- info->flash_id += FLASH_AM320T;
- info->sector_count = 67;
- info->size = 0x00400000;
- break; /* => 4 MB */
- case (FLASH_WORD_SIZE)AMD_ID_LV640U:
- info->flash_id += FLASH_AM640U;
- info->sector_count = 128;
- info->size = 0x00800000;
- break; /* => 8 MB */
-#if 0 /* enable when device IDs are available */
-
- case (FLASH_WORD_SIZE)AMD_ID_LV320B:
- info->flash_id += FLASH_AM320B;
- info->sector_count = 67;
- info->size = 0x00400000;
- break; /* => 4 MB */
-#endif
- case (FLASH_WORD_SIZE)SST_ID_xF800A:
- info->flash_id += FLASH_SST800A;
- info->sector_count = 16;
- info->size = 0x00100000;
- break; /* => 1 MB */
- case (FLASH_WORD_SIZE)INTEL_ID_28F320C3T:
- info->flash_id += FLASH_INTEL320T;
- info->sector_count = 71;
- info->size = 0x00400000;
- break; /* => 4 MB */
-
-
- case (FLASH_WORD_SIZE)SST_ID_xF160A:
- info->flash_id += FLASH_SST160A;
- info->sector_count = 32;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- return (0); /* => no or unknown flash */
-
- }
- /* base address calculation */
- base=0-info->size;
- /* set up sector start address table */
- if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) ||
- (info->flash_id == FLASH_AM040) ||
- (info->flash_id == FLASH_AM640U)){
- for (i = 0; i < info->sector_count; i++)
- info->start[i] = base + (i * 0x00010000);
- }
- else {
- if (info->flash_id & FLASH_BTYPE) {
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00004000;
- info->start[2] = base + 0x00006000;
- info->start[3] = base + 0x00008000;
- for (i = 4; i < info->sector_count; i++)
- info->start[i] = base + (i * 0x00010000) - 0x00030000;
- }
- else {
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- if(info->sector_count==71) {
-
- info->start[i--] = base + info->size - 0x00002000;
- info->start[i--] = base + info->size - 0x00004000;
- info->start[i--] = base + info->size - 0x00006000;
- info->start[i--] = base + info->size - 0x00008000;
- info->start[i--] = base + info->size - 0x0000A000;
- info->start[i--] = base + info->size - 0x0000C000;
- info->start[i--] = base + info->size - 0x0000E000;
- for (; i >= 0; i--)
- info->start[i] = base + i * 0x000010000;
- }
- else {
- info->start[i--] = base + info->size - 0x00004000;
- info->start[i--] = base + info->size - 0x00006000;
- info->start[i--] = base + info->size - 0x00008000;
- for (; i >= 0; i--)
- info->start[i] = base + i * 0x00010000;
- }
- }
- }
-
- /* check for protected sectors */
- for (i = 0; i < info->sector_count; i++) {
- /* read sector protection at sector address, (A7 .. A0) = 0x02 */
- /* D0 = 1 if protected */
- addr2 = (volatile FLASH_WORD_SIZE *)(info->start[i]);
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL)
- info->protect[i] = 0;
- else
- info->protect[i] = addr2[2] & 1;
- }
-
- /*
- * Prevent writes to uninitialized FLASH.
- */
- if (info->flash_id != FLASH_UNKNOWN) {
- addr2 = (FLASH_WORD_SIZE *)info->start[0];
- *addr2 = (FLASH_WORD_SIZE)0x00F000F0; /* reset bank */
- }
- return (info->size);
-}
-
-
-int wait_for_DQ7(flash_info_t *info, int sect)
-{
- ulong start, now, last;
- volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[sect]);
-
- start = get_timer (0);
- last = start;
- while ((addr[0] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080) {
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- return ERR_TIMOUT;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- }
- return ERR_OK;
-}
-
-int intel_wait_for_DQ7(flash_info_t *info, int sect)
-{
- ulong start, now, last, status;
- volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[sect]);
-
- start = get_timer (0);
- last = start;
- while ((addr[0] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080) {
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- return ERR_TIMOUT;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- }
- status = addr[0] & (FLASH_WORD_SIZE)0x00280028;
- /* clear status register */
- addr[0] = (FLASH_WORD_SIZE)0x00500050;
- /* check status for block erase fail and VPP low */
- return (status == 0 ? ERR_OK : ERR_NOT_ERASED);
-}
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[0]);
- volatile FLASH_WORD_SIZE *addr2;
- int flag, prot, sect, l_sect;
- int i, rcode = 0;
-
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("Can't erase unknown flash type - aborted\n");
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- l_sect = -1;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr2 = (FLASH_WORD_SIZE *)(info->start[sect]);
- /* printf("Erasing sector %p\n", addr2); */ /* CLH */
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) {
- addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
- addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
- addr[ADDR0] = (FLASH_WORD_SIZE)0x00800080;
- addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
- addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
- addr2[0] = (FLASH_WORD_SIZE)0x00500050; /* block erase */
- for (i=0; i<50; i++)
- udelay(1000); /* wait 1 ms */
- rcode |= wait_for_DQ7(info, sect);
- }
- else {
- if((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL){
- addr2[0] = (FLASH_WORD_SIZE)0x00600060; /* unlock sector */
- addr2[0] = (FLASH_WORD_SIZE)0x00D000D0; /* sector erase */
- intel_wait_for_DQ7(info, sect);
- addr2[0] = (FLASH_WORD_SIZE)0x00200020; /* sector erase */
- addr2[0] = (FLASH_WORD_SIZE)0x00D000D0; /* sector erase */
- rcode |= intel_wait_for_DQ7(info, sect);
- }
- else {
- addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
- addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
- addr[ADDR0] = (FLASH_WORD_SIZE)0x00800080;
- addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
- addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
- addr2[0] = (FLASH_WORD_SIZE)0x00300030; /* sector erase */
- rcode |= wait_for_DQ7(info, sect);
- }
- }
- l_sect = sect;
- /*
- * Wait for each sector to complete, it's more
- * reliable. According to AMD Spec, you must
- * issue all erase commands within a specified
- * timeout. This has been seen to fail, especially
- * if printf()s are included (for debug)!!
- */
- /* wait_for_DQ7(info, sect); */
- }
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
-#if 0
- /*
- * We wait for the last triggered sector
- */
- if (l_sect < 0)
- goto DONE;
- wait_for_DQ7(info, l_sect);
-
-DONE:
-#endif
- /* reset to read mode */
- addr = (FLASH_WORD_SIZE *)info->start[0];
- addr[0] = (FLASH_WORD_SIZE)0x00F000F0; /* reset bank */
-
- if (!rcode)
- printf (" done\n");
-
- return rcode;
-}
-
-
-void unlock_intel_sectors(flash_info_t *info,ulong addr,ulong cnt)
-{
- int i;
- volatile FLASH_WORD_SIZE *addr2;
- long c;
- c= (long)cnt;
- for(i=info->sector_count-1;i>0;i--)
- {
- if(addr>=info->start[i])
- break;
- }
- do {
- addr2 = (FLASH_WORD_SIZE *)(info->start[i]);
- addr2[0] = (FLASH_WORD_SIZE)0x00600060; /* unlock sector setup */
- addr2[0] = (FLASH_WORD_SIZE)0x00D000D0; /* unlock sector */
- intel_wait_for_DQ7(info, i);
- i++;
- c-=(info->start[i]-info->start[i-1]);
- }while(c>0);
-}
-
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int i, l, rc;
-
- if((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL){
- unlock_intel_sectors(info,addr,cnt);
- }
- wp = (addr & ~3); /* get lower word aligned address */
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
- for (; i<4 && cnt>0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = 0;
- for (i=0; i<4; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- if((wp % 0x10000)==0)
- printf("."); /* show Progress */
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
- rc=write_word(info, wp, data);
- return rc;
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static FLASH_WORD_SIZE *read_val = (FLASH_WORD_SIZE *)0x200000;
-
-static int write_word (flash_info_t *info, ulong dest, ulong data)
-{
- volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *)(info->start[0]);
- volatile FLASH_WORD_SIZE *dest2 = (FLASH_WORD_SIZE *)dest;
- volatile FLASH_WORD_SIZE *data2 = (FLASH_WORD_SIZE *)&data;
- ulong start;
- int flag;
- int i;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*((volatile FLASH_WORD_SIZE *)dest) &
- (FLASH_WORD_SIZE)data) != (FLASH_WORD_SIZE)data) {
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
- for (i=0; i<4/sizeof(FLASH_WORD_SIZE); i++)
- {
- if((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL){
- /* intel style writting */
- dest2[i] = (FLASH_WORD_SIZE)0x00500050;
- dest2[i] = (FLASH_WORD_SIZE)0x00400040;
- *read_val++ = data2[i];
- dest2[i] = data2[i];
- if (flag)
- enable_interrupts();
- /* data polling for D7 */
- start = get_timer (0);
- udelay(10);
- while ((dest2[i] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080)
- {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT)
- return (1);
- }
- dest2[i] = (FLASH_WORD_SIZE)0x00FF00FF; /* return to read mode */
- udelay(10);
- dest2[i] = (FLASH_WORD_SIZE)0x00FF00FF; /* return to read mode */
- if(dest2[i]!=data2[i])
- printf("Error at %p 0x%04X != 0x%04X\n",&dest2[i],dest2[i],data2[i]);
- }
- else {
- addr2[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
- addr2[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
- addr2[ADDR0] = (FLASH_WORD_SIZE)0x00A000A0;
- dest2[i] = data2[i];
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
- /* data polling for D7 */
- start = get_timer (0);
- while ((dest2[i] & (FLASH_WORD_SIZE)0x00800080) !=
- (data2[i] & (FLASH_WORD_SIZE)0x00800080)) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- return (1);
- }
- }
- }
- }
- return (0);
-}
-
-/*-----------------------------------------------------------------------
- */
diff --git a/board/mpl/common/isa.c b/board/mpl/common/isa.c
deleted file mode 100644
index 51b2773c71..0000000000
--- a/board/mpl/common/isa.c
+++ /dev/null
@@ -1,494 +0,0 @@
-/*
- * (C) Copyright 2001
- * Denis Peter, MPL AG Switzerland
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- *
- * TODO: clean-up
- */
-
-#include <common.h>
-#include <asm/processor.h>
-#include <devices.h>
-#include "isa.h"
-#include "piix4_pci.h"
-#include "kbd.h"
-#include "video.h"
-
-
-#undef ISA_DEBUG
-
-#ifdef ISA_DEBUG
-#define PRINTF(fmt,args...) printf (fmt ,##args)
-#else
-#define PRINTF(fmt,args...)
-#endif
-
-#ifndef TRUE
-#define TRUE 1
-#endif
-#ifndef FALSE
-#define FALSE 0
-#endif
-
-#if defined(CONFIG_PIP405)
-
-extern int drv_isa_kbd_init (void);
-
-/* fdc (logical device 0) */
-const SIO_LOGDEV_TABLE sio_fdc[] = {
- {0x60, 3}, /* set IO to FDPort (3F0) */
- {0x61, 0xF0}, /* set IO to FDPort (3F0) */
- {0x70, 06}, /* set IRQ 6 for FDPort */
- {0x74, 02}, /* set DMA 2 for FDPort */
- {0xF0, 0x05}, /* set to PS2 type */
- {0xF1, 0x00}, /* default value */
- {0x30, 1}, /* and activate the device */
- {0xFF, 0} /* end of device table */
-};
-/* paralell port (logical device 3) */
-const SIO_LOGDEV_TABLE sio_pport[] = {
- {0x60, 3}, /* set IO to PPort (378) */
- {0x61, 0x78}, /* set IO to PPort (378) */
- {0x70, 07}, /* set IRQ 7 for PPort */
- {0xF1, 00}, /* set PPort to normal */
- {0x30, 1}, /* and activate the device */
- {0xFF, 0} /* end of device table */
-};
-/* paralell port (logical device 3) Floppy assigned to lpt */
-const SIO_LOGDEV_TABLE sio_pport_fdc[] = {
- {0x60, 3}, /* set IO to PPort (378) */
- {0x61, 0x78}, /* set IO to PPort (378) */
- {0x70, 07}, /* set IRQ 7 for PPort */
- {0xF1, 02}, /* set PPort to Floppy */
- {0x30, 1}, /* and activate the device */
- {0xFF, 0} /* end of device table */
-};
-/* uart 1 (logical device 4) */
-const SIO_LOGDEV_TABLE sio_com1[] = {
- {0x60, 3}, /* set IO to COM1 (3F8) */
- {0x61, 0xF8}, /* set IO to COM1 (3F8) */
- {0x70, 04}, /* set IRQ 4 for COM1 */
- {0x30, 1}, /* and activate the device */
- {0xFF, 0} /* end of device table */
-};
-/* uart 2 (logical device 5) */
-const SIO_LOGDEV_TABLE sio_com2[] = {
- {0x60, 2}, /* set IO to COM2 (2F8) */
- {0x61, 0xF8}, /* set IO to COM2 (2F8) */
- {0x70, 03}, /* set IRQ 3 for COM2 */
- {0x30, 1}, /* and activate the device */
- {0xFF, 0} /* end of device table */
-};
-
-/* keyboard controller (logical device 7) */
-const SIO_LOGDEV_TABLE sio_keyboard[] = {
- {0x70, 1}, /* set IRQ 1 for keyboard */
- {0x72, 12}, /* set IRQ 12 for mouse */
- {0xF0, 0}, /* disable Port92 (this is a PowerPC!!) */
- {0x30, 1}, /* and activate the device */
- {0xFF, 0} /* end of device table */
-};
-
-
-/*******************************************************************************
-* Config SuperIO FDC37C672
-********************************************************************************/
-unsigned char open_cfg_super_IO(int address)
-{
- out8(CFG_ISA_IO_BASE_ADDRESS | address,0x55); /* open config */
- out8(CFG_ISA_IO_BASE_ADDRESS | address,0x20); /* set address to DEV ID */
- if(in8(CFG_ISA_IO_BASE_ADDRESS | address | 0x1)==0x40) /* ok Device ID is correct */
- return TRUE;
- else
- return FALSE;
-}
-
-void close_cfg_super_IO(int address)
-{
- out8(CFG_ISA_IO_BASE_ADDRESS | address,0xAA); /* close config */
-}
-
-
-unsigned char read_cfg_super_IO(int address, unsigned char function, unsigned char regaddr)
-{
- /* assuming config reg is open */
- out8(CFG_ISA_IO_BASE_ADDRESS | address,0x7); /* points to the function reg */
- out8(CFG_ISA_IO_BASE_ADDRESS | address | 1,function); /* set the function no */
- out8(CFG_ISA_IO_BASE_ADDRESS | address,regaddr); /* sets the address in the function */
- return in8(CFG_ISA_IO_BASE_ADDRESS | address | 1);
-}
-
-void write_cfg_super_IO(int address, unsigned char function, unsigned char regaddr, unsigned char data)
-{
- /* assuming config reg is open */
- out8(CFG_ISA_IO_BASE_ADDRESS | address,0x7); /* points to the function reg */
- out8(CFG_ISA_IO_BASE_ADDRESS | address | 1,function); /* set the function no */
- out8(CFG_ISA_IO_BASE_ADDRESS | address,regaddr); /* sets the address in the function */
- out8(CFG_ISA_IO_BASE_ADDRESS | address | 1,data); /* writes the data */
-}
-
-void isa_write_table(SIO_LOGDEV_TABLE *ldt,unsigned char ldev)
-{
- while (ldt->index != 0xFF) {
- write_cfg_super_IO(SIO_CFG_PORT, ldev, ldt->index, ldt->val);
- ldt++;
- } /* endwhile */
-}
-
-void isa_sio_loadtable(void)
-{
- char *s = getenv("floppy");
- /* setup Floppy device 0*/
- isa_write_table((SIO_LOGDEV_TABLE *)&sio_fdc,0);
- /* setup parallel port device 3 */
- if(s && !strncmp(s, "lpt", 3)) {
- printf("SIO: Floppy assigned to LPT\n");
- /* floppy is assigned to the LPT */
- isa_write_table((SIO_LOGDEV_TABLE *)&sio_pport_fdc,3);
- }
- else {
- /*printf("Floppy assigned to internal port\n");*/
- isa_write_table((SIO_LOGDEV_TABLE *)&sio_pport,3);
- }
- /* setup Com1 port device 4 */
- isa_write_table((SIO_LOGDEV_TABLE *)&sio_com1,4);
- /* setup Com2 port device 5 */
- isa_write_table((SIO_LOGDEV_TABLE *)&sio_com2,5);
- /* setup keyboards device 7 */
- isa_write_table((SIO_LOGDEV_TABLE *)&sio_keyboard,7);
-}
-
-
-void isa_sio_setup(void)
-{
- if(open_cfg_super_IO(SIO_CFG_PORT)==TRUE)
- {
- isa_sio_loadtable();
- close_cfg_super_IO(0x3F0);
- }
-}
-#endif
-
-/******************************************************************************
- * IRQ Controller
- * we use the Vector mode
- */
-
-struct isa_irq_action {
- interrupt_handler_t *handler;
- void *arg;
- int count;
-};
-
-static struct isa_irq_action isa_irqs[16];
-
-
-/*
- * This contains the irq mask for both 8259A irq controllers,
- */
-static unsigned int cached_irq_mask = 0xfff9;
-
-#define cached_imr1 (unsigned char)cached_irq_mask
-#define cached_imr2 (unsigned char)(cached_irq_mask>>8)
-#define IMR_1 CFG_ISA_IO_BASE_ADDRESS + PIIX4_ISA_INT1_OCW1
-#define IMR_2 CFG_ISA_IO_BASE_ADDRESS + PIIX4_ISA_INT2_OCW1
-#define ICW1_1 CFG_ISA_IO_BASE_ADDRESS + PIIX4_ISA_INT1_ICW1
-#define ICW1_2 CFG_ISA_IO_BASE_ADDRESS + PIIX4_ISA_INT2_ICW1
-#define ICW2_1 CFG_ISA_IO_BASE_ADDRESS + PIIX4_ISA_INT1_ICW2
-#define ICW2_2 CFG_ISA_IO_BASE_ADDRESS + PIIX4_ISA_INT2_ICW2
-#define ICW3_1 ICW2_1
-#define ICW3_2 ICW2_2
-#define ICW4_1 ICW2_1
-#define ICW4_2 ICW2_2
-#define ISR_1 ICW1_1
-#define ISR_2 ICW1_2
-
-
-void disable_8259A_irq(unsigned int irq)
-{
- unsigned int mask = 1 << irq;
-
- cached_irq_mask |= mask;
- if (irq & 8)
- out8(IMR_2,cached_imr2);
- else
- out8(IMR_1,cached_imr1);
-}
-
-void enable_8259A_irq(unsigned int irq)
-{
- unsigned int mask = ~(1 << irq);
-
- cached_irq_mask &= mask;
- if (irq & 8)
- out8(IMR_2,cached_imr2);
- else
- out8(IMR_1,cached_imr1);
-}
-/*
-int i8259A_irq_pending(unsigned int irq)
-{
- unsigned int mask = 1<<irq;
- int ret;
-
- if (irq < 8)
- ret = inb(0x20) & mask;
- else
- ret = inb(0xA0) & (mask >> 8);
- spin_unlock_irqrestore(&i8259A_lock, flags);
-
- return ret;
-}
-*/
-
-/*
- * This function assumes to be called rarely. Switching between
- * 8259A registers is slow.
- */
-int i8259A_irq_real(unsigned int irq)
-{
- int value;
- int irqmask = 1<<irq;
-
- if (irq < 8) {
- out8(ISR_1,0x0B); /* ISR register */
- value = in8(ISR_1) & irqmask;
- out8(ISR_1,0x0A); /* back to the IRR register */
- return value;
- }
- out8(ISR_2,0x0B); /* ISR register */
- value = in8(ISR_2) & (irqmask >> 8);
- out8(ISR_2,0x0A); /* back to the IRR register */
- return value;
-}
-
-/*
- * Careful! The 8259A is a fragile beast, it pretty
- * much _has_ to be done exactly like this (mask it
- * first, _then_ send the EOI, and the order of EOI
- * to the two 8259s is important!
- */
-void mask_and_ack_8259A(unsigned int irq)
-{
- unsigned int irqmask = 1 << irq;
- unsigned int temp_irqmask = cached_irq_mask;
- /*
- * Lightweight spurious IRQ detection. We do not want
- * to overdo spurious IRQ handling - it's usually a sign
- * of hardware problems, so we only do the checks we can
- * do without slowing down good hardware unnecesserily.
- *
- * Note that IRQ7 and IRQ15 (the two spurious IRQs
- * usually resulting from the 8259A-1|2 PICs) occur
- * even if the IRQ is masked in the 8259A. Thus we
- * can check spurious 8259A IRQs without doing the
- * quite slow i8259A_irq_real() call for every IRQ.
- * This does not cover 100% of spurious interrupts,
- * but should be enough to warn the user that there
- * is something bad going on ...
- */
- if (temp_irqmask & irqmask)
- goto spurious_8259A_irq;
- temp_irqmask |= irqmask;
-
-handle_real_irq:
- if (irq & 8) {
- in8(IMR_2); /* DUMMY - (do we need this?) */
- out8(IMR_2,(unsigned char)(temp_irqmask>>8));
- out8(ISR_2,0x60+(irq&7));/* 'Specific EOI' to slave */
- out8(ISR_1,0x62); /* 'Specific EOI' to master-IRQ2 */
- out8(IMR_2,cached_imr2); /* turn it on again */
- } else {
- in8(IMR_1); /* DUMMY - (do we need this?) */
- out8(IMR_1,(unsigned char)temp_irqmask);
- out8(ISR_1,0x60+irq); /* 'Specific EOI' to master */
- out8(IMR_1,cached_imr1); /* turn it on again */
- }
-
- return;
-
-spurious_8259A_irq:
- /*
- * this is the slow path - should happen rarely.
- */
- if (i8259A_irq_real(irq))
- /*
- * oops, the IRQ _is_ in service according to the
- * 8259A - not spurious, go handle it.
- */
- goto handle_real_irq;
-
- {
- static int spurious_irq_mask;
- /*
- * At this point we can be sure the IRQ is spurious,
- * lets ACK and report it. [once per IRQ]
- */
- if (!(spurious_irq_mask & irqmask)) {
- PRINTF("spurious 8259A interrupt: IRQ%d.\n", irq);
- spurious_irq_mask |= irqmask;
- }
- /* irq_err_count++; */
- /*
- * Theoretically we do not have to handle this IRQ,
- * but in Linux this does not cause problems and is
- * simpler for us.
- */
- goto handle_real_irq;
- }
-}
-
-void init_8259A(void)
-{
- out8(IMR_1,0xff); /* mask all of 8259A-1 */
- out8(IMR_2,0xff); /* mask all of 8259A-2 */
-
- out8(ICW1_1,0x11); /* ICW1: select 8259A-1 init */
- out8(ICW2_1,0x20 + 0); /* ICW2: 8259A-1 IR0-7 mapped to 0x20-0x27 */
- out8(ICW3_1,0x04); /* 8259A-1 (the master) has a slave on IR2 */
- out8(ICW4_1,0x01); /* master expects normal EOI */
- out8(ICW1_2,0x11); /* ICW2: select 8259A-2 init */
- out8(ICW2_2,0x20 + 8); /* ICW2: 8259A-2 IR0-7 mapped to 0x28-0x2f */
- out8(ICW3_2,0x02); /* 8259A-2 is a slave on master's IR2 */
- out8(ICW4_2,0x01); /* (slave's support for AEOI in flat mode
- is to be investigated) */
- udelay(10000); /* wait for 8259A to initialize */
- out8(IMR_1,cached_imr1); /* restore master IRQ mask */
- udelay(10000); /* wait for 8259A to initialize */
- out8(IMR_2,cached_imr2); /* restore slave IRQ mask */
-}
-
-
-#define PCI_INT_ACK_ADDR 0xEED00000
-
-int handle_isa_int(void)
-{
- unsigned long irqack;
- unsigned char isr1,isr2,irq;
- /* first we acknokledge the int via the PCI bus */
- irqack=in32(PCI_INT_ACK_ADDR);
- /* now we get the ISRs */
- isr2=in8(ISR_2);
- isr1=in8(ISR_1);
- irq=(unsigned char)irqack;
- irq-=32;
-/* if((irq==7)&&((isr1&0x80)==0)) {
- PRINTF("IRQ7 detected but not in ISR\n");
- }
- else {
-*/ /* we should handle cascaded interrupts here also */
- {
-/* printf("ISA Irq %d\n",irq); */
- isa_irqs[irq].count++;
- if(irq!=2) { /* just swallow the cascade irq 2 */
- if (isa_irqs[irq].handler != NULL)
- (*isa_irqs[irq].handler)(isa_irqs[irq].arg); /* call isr */
- else {
- PRINTF ("bogus interrupt vector 0x%x\n", irq);
- }
- }
- }
- /* issue EOI instruction to clear the IRQ */
- mask_and_ack_8259A(irq);
- return 0;
-}
-
-
-/******************************************************************
- * Install and free an ISA interrupt handler.
- */
-
-void isa_irq_install_handler(int vec, interrupt_handler_t *handler, void *arg)
-{
- if (isa_irqs[vec].handler != NULL) {
- printf ("ISA Interrupt vector %d: handler 0x%x replacing 0x%x\n",
- vec, (uint)handler, (uint)isa_irqs[vec].handler);
- }
- isa_irqs[vec].handler = handler;
- isa_irqs[vec].arg = arg;
- enable_8259A_irq(vec);
- PRINTF ("Install ISA IRQ %d ==> %p, @ %p mask=%04x\n", vec, handler, &isa_irqs[vec].handler,cached_irq_mask);
-
-}
-
-void isa_irq_free_handler(int vec)
-{
- disable_8259A_irq(vec);
- isa_irqs[vec].handler = NULL;
- isa_irqs[vec].arg = NULL;
- PRINTF ("Free ISA IRQ %d mask=%04x\n", vec, cached_irq_mask);
-
-}
-
-/****************************************************************************/
-void isa_init_irq_contr(void)
-{
- int i;
- /* disable all Interrupts */
- /* first write icws controller 1 */
- for(i=0;i<16;i++)
- {
- isa_irqs[i].handler=NULL;
- isa_irqs[i].arg=NULL;
- isa_irqs[i].count=0;
- }
- init_8259A();
- out8(IMR_2,0xFF);
-}
-/*************************************************************************/
-
-void isa_show_irq(void)
-{
- int vec;
-
- printf ("\nISA Interrupt-Information:\n");
- printf ("Nr Routine Arg Count\n");
-
- for (vec=0; vec<16; vec++) {
- if (isa_irqs[vec].handler != NULL) {
- printf ("%02d %08lx %08lx %d\n",
- vec,
- (ulong)isa_irqs[vec].handler,
- (ulong)isa_irqs[vec].arg,
- isa_irqs[vec].count);
- }
- }
-}
-
-int isa_irq_get_count(int vec)
-{
- return(isa_irqs[vec].count);
-}
-
-/******************************************************************
- * Init the ISA bus and devices.
- */
-
-#if defined(CONFIG_PIP405)
-
-int isa_init(void)
-{
- isa_sio_setup();
- isa_init_irq_contr();
- drv_isa_kbd_init();
- return 0;
-}
-#endif
diff --git a/board/mpl/common/isa.h b/board/mpl/common/isa.h
deleted file mode 100644
index 28ed219153..0000000000
--- a/board/mpl/common/isa.h
+++ /dev/null
@@ -1,57 +0,0 @@
-/*
- * (C) Copyright 2001
- * Denis Peter, MPL AG Switzerland, d.peter@mpl.ch
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef _ISA_H_
-#define _ISA_H_
-/* Super IO */
-#define SIO_CFG_PORT 0x3F0 /* Config Port Address */
-
-#if defined(CONFIG_PIP405)
-/* table fore SIO initialization */
-typedef struct {
- const uchar index;
- const uchar val;
-} SIO_LOGDEV_TABLE;
-
-typedef struct {
- const uchar ldev;
- const SIO_LOGDEV_TABLE *ldev_table;
-} SIO_TABLE;
-
-
-unsigned char open_cfg_super_IO(int address);
-unsigned char read_cfg_super_IO(int address, unsigned char function, unsigned char regaddr);
-void write_cfg_super_IO(int address, unsigned char function, unsigned char regaddr, unsigned char data);
-void close_cfg_super_IO(int address);
-void isa_sio_setup(void);
-#endif
-
-void isa_irq_install_handler(int vec, interrupt_handler_t *handler, void *arg);
-void isa_irq_free_handler(int vec);
-int handle_isa_int(void);
-void isa_init_irq_contr(void);
-void isa_show_irq(void);
-int isa_irq_get_count(int vec);
-
-
-#endif
diff --git a/board/mpl/common/kbd.c b/board/mpl/common/kbd.c
deleted file mode 100644
index 7724e241d1..0000000000
--- a/board/mpl/common/kbd.c
+++ /dev/null
@@ -1,647 +0,0 @@
-/*
- * (C) Copyright 2001
- * Denis Peter, MPL AG Switzerland, d.peter@mpl.ch
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- *
- * Source partly derived from:
- * linux/drivers/char/pc_keyb.c
- *
- *
- */
-#include <common.h>
-#include <asm/processor.h>
-#include <devices.h>
-#include "isa.h"
-#include "kbd.h"
-
-
-unsigned char kbd_read_status(void);
-unsigned char kbd_read_input(void);
-void kbd_send_data(unsigned char data);
-void disable_8259A_irq(unsigned int irq);
-void enable_8259A_irq(unsigned int irq);
-
-/* used only by send_data - set by keyboard_interrupt */
-
-
-#undef KBG_DEBUG
-
-#ifdef KBG_DEBUG
-#define PRINTF(fmt,args...) printf (fmt ,##args)
-#else
-#define PRINTF(fmt,args...)
-#endif
-
-#define KBD_STAT_KOBF 0x01
-#define KBD_STAT_IBF 0x02
-#define KBD_STAT_SYS 0x04
-#define KBD_STAT_CD 0x08
-#define KBD_STAT_LOCK 0x10
-#define KBD_STAT_MOBF 0x20
-#define KBD_STAT_TI_OUT 0x40
-#define KBD_STAT_PARERR 0x80
-
-#define KBD_INIT_TIMEOUT 1000 /* Timeout in ms for initializing the keyboard */
-#define KBC_TIMEOUT 250 /* Timeout in ms for sending to keyboard controller */
-#define KBD_TIMEOUT 2000 /* Timeout in ms for keyboard command acknowledge */
-/*
- * Keyboard Controller Commands
- */
-
-#define KBD_CCMD_READ_MODE 0x20 /* Read mode bits */
-#define KBD_CCMD_WRITE_MODE 0x60 /* Write mode bits */
-#define KBD_CCMD_GET_VERSION 0xA1 /* Get controller version */
-#define KBD_CCMD_MOUSE_DISABLE 0xA7 /* Disable mouse interface */
-#define KBD_CCMD_MOUSE_ENABLE 0xA8 /* Enable mouse interface */
-#define KBD_CCMD_TEST_MOUSE 0xA9 /* Mouse interface test */
-#define KBD_CCMD_SELF_TEST 0xAA /* Controller self test */
-#define KBD_CCMD_KBD_TEST 0xAB /* Keyboard interface test */
-#define KBD_CCMD_KBD_DISABLE 0xAD /* Keyboard interface disable */
-#define KBD_CCMD_KBD_ENABLE 0xAE /* Keyboard interface enable */
-#define KBD_CCMD_WRITE_AUX_OBUF 0xD3 /* Write to output buffer as if
- initiated by the auxiliary device */
-#define KBD_CCMD_WRITE_MOUSE 0xD4 /* Write the following byte to the mouse */
-
-/*
- * Keyboard Commands
- */
-
-#define KBD_CMD_SET_LEDS 0xED /* Set keyboard leds */
-#define KBD_CMD_SET_RATE 0xF3 /* Set typematic rate */
-#define KBD_CMD_ENABLE 0xF4 /* Enable scanning */
-#define KBD_CMD_DISABLE 0xF5 /* Disable scanning */
-#define KBD_CMD_RESET 0xFF /* Reset */
-
-/*
- * Keyboard Replies
- */
-
-#define KBD_REPLY_POR 0xAA /* Power on reset */
-#define KBD_REPLY_ACK 0xFA /* Command ACK */
-#define KBD_REPLY_RESEND 0xFE /* Command NACK, send the cmd again */
-
-/*
- * Status Register Bits
- */
-
-#define KBD_STAT_OBF 0x01 /* Keyboard output buffer full */
-#define KBD_STAT_IBF 0x02 /* Keyboard input buffer full */
-#define KBD_STAT_SELFTEST 0x04 /* Self test successful */
-#define KBD_STAT_CMD 0x08 /* Last write was a command write (0=data) */
-#define KBD_STAT_UNLOCKED 0x10 /* Zero if keyboard locked */
-#define KBD_STAT_MOUSE_OBF 0x20 /* Mouse output buffer full */
-#define KBD_STAT_GTO 0x40 /* General receive/xmit timeout */
-#define KBD_STAT_PERR 0x80 /* Parity error */
-
-#define AUX_STAT_OBF (KBD_STAT_OBF | KBD_STAT_MOUSE_OBF)
-
-/*
- * Controller Mode Register Bits
- */
-
-#define KBD_MODE_KBD_INT 0x01 /* Keyboard data generate IRQ1 */
-#define KBD_MODE_MOUSE_INT 0x02 /* Mouse data generate IRQ12 */
-#define KBD_MODE_SYS 0x04 /* The system flag (?) */
-#define KBD_MODE_NO_KEYLOCK 0x08 /* The keylock doesn't affect the keyboard if set */
-#define KBD_MODE_DISABLE_KBD 0x10 /* Disable keyboard interface */
-#define KBD_MODE_DISABLE_MOUSE 0x20 /* Disable mouse interface */
-#define KBD_MODE_KCC 0x40 /* Scan code conversion to PC format */
-#define KBD_MODE_RFU 0x80
-
-
-#define KDB_DATA_PORT 0x60
-#define KDB_COMMAND_PORT 0x64
-
-#define LED_SCR 0x01 /* scroll lock led */
-#define LED_CAP 0x04 /* caps lock led */
-#define LED_NUM 0x02 /* num lock led */
-
-#define KBD_BUFFER_LEN 0x20 /* size of the keyboardbuffer */
-
-
-static volatile char kbd_buffer[KBD_BUFFER_LEN];
-static volatile int in_pointer = 0;
-static volatile int out_pointer = 0;
-
-
-static unsigned char num_lock = 0;
-static unsigned char caps_lock = 0;
-static unsigned char scroll_lock = 0;
-static unsigned char shift = 0;
-static unsigned char ctrl = 0;
-static unsigned char alt = 0;
-static unsigned char e0 = 0;
-static unsigned char leds = 0;
-
-#define DEVNAME "kbd"
-
-/* Simple translation table for the keys */
-
-static unsigned char kbd_plain_xlate[] = {
- 0xff,0x1b, '1', '2', '3', '4', '5', '6', '7', '8', '9', '0', '-', '=','\b','\t', /* 0x00 - 0x0f */
- 'q', 'w', 'e', 'r', 't', 'y', 'u', 'i', 'o', 'p', '[', ']','\r',0xff, 'a', 's', /* 0x10 - 0x1f */
- 'd', 'f', 'g', 'h', 'j', 'k', 'l', ';','\'', '`',0xff,'\\', 'z', 'x', 'c', 'v', /* 0x20 - 0x2f */
- 'b', 'n', 'm', ',', '.', '/',0xff,0xff,0xff, ' ',0xff,0xff,0xff,0xff,0xff,0xff, /* 0x30 - 0x3f */
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff, '7', '8', '9', '-', '4', '5', '6', '+', '1', /* 0x40 - 0x4f */
- '2', '3', '0', '.',0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, /* 0x50 - 0x5F */
- '\r',0xff,0xff
- };
-
-static unsigned char kbd_shift_xlate[] = {
- 0xff,0x1b, '!', '@', '#', '$', '%', '^', '&', '*', '(', ')', '_', '+','\b','\t', /* 0x00 - 0x0f */
- 'Q', 'W', 'E', 'R', 'T', 'Y', 'U', 'I', 'O', 'P', '{', '}','\r',0xff, 'A', 'S', /* 0x10 - 0x1f */
- 'D', 'F', 'G', 'H', 'J', 'K', 'L', ':', '"', '~',0xff, '|', 'Z', 'X', 'C', 'V', /* 0x20 - 0x2f */
- 'B', 'N', 'M', '<', '>', '?',0xff,0xff,0xff, ' ',0xff,0xff,0xff,0xff,0xff,0xff, /* 0x30 - 0x3f */
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff, '7', '8', '9', '-', '4', '5', '6', '+', '1', /* 0x40 - 0x4f */
- '2', '3', '0', '.',0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, /* 0x50 - 0x5F */
- '\r',0xff,0xff
- };
-
-static unsigned char kbd_ctrl_xlate[] = {
- 0xff,0x1b, '1',0x00, '3', '4', '5',0x1E, '7', '8', '9', '0',0x1F, '=','\b','\t', /* 0x00 - 0x0f */
- 0x11,0x17,0x05,0x12,0x14,0x18,0x15,0x09,0x0f,0x10,0x1b,0x1d,'\n',0xff,0x01,0x13, /* 0x10 - 0x1f */
- 0x04,0x06,0x08,0x09,0x0a,0x0b,0x0c, ';','\'', '~',0x00,0x1c,0x1a,0x18,0x03,0x16, /* 0x20 - 0x2f */
- 0x02,0x0e,0x0d, '<', '>', '?',0xff,0xff,0xff,0x00,0xff,0xff,0xff,0xff,0xff,0xff, /* 0x30 - 0x3f */
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff, '7', '8', '9', '-', '4', '5', '6', '+', '1', /* 0x40 - 0x4f */
- '2', '3', '0', '.',0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, /* 0x50 - 0x5F */
- '\r',0xff,0xff
- };
-
-/******************************************************************
- * Init
- ******************************************************************/
-int isa_kbd_init(void)
-{
- char* result;
- result=kbd_initialize();
- if(result==NULL) {
- PRINTF("AT Keyboard initialized\n");
- irq_install_handler(25, (interrupt_handler_t *)handle_isa_int, NULL);
- isa_irq_install_handler(KBD_INTERRUPT, (interrupt_handler_t *)kbd_interrupt, NULL);
- return (1);
- }
- else {
- printf("%s\n",result);
- return (-1);
- }
-}
-
-#ifdef CFG_CONSOLE_OVERWRITE_ROUTINE
-extern int overwrite_console (void);
-#else
-int overwrite_console (void)
-{
- return (0);
-}
-#endif
-
-int drv_isa_kbd_init (void)
-{
- int error;
- device_t kbddev ;
- char *stdinname = getenv ("stdin");
-
- if(isa_kbd_init()==-1)
- return -1;
- memset (&kbddev, 0, sizeof(kbddev));
- strcpy(kbddev.name, DEVNAME);
- kbddev.flags = DEV_FLAGS_INPUT | DEV_FLAGS_SYSTEM;
- kbddev.putc = NULL ;
- kbddev.puts = NULL ;
- kbddev.getc = kbd_getc ;
- kbddev.tstc = kbd_testc ;
-
- error = device_register (&kbddev);
- if(error==0) {
- /* check if this is the standard input device */
- if(strcmp(stdinname,DEVNAME)==0) {
- /* reassign the console */
- if(overwrite_console()) {
- return 1;
- }
- error=console_assign(stdin,DEVNAME);
- if(error==0)
- return 1;
- else
- return error;
- }
- return 1;
- }
- return error;
-}
-
-/******************************************************************
- * Queue handling
- ******************************************************************/
-/* puts character in the queue and sets up the in and out pointer */
-void kbd_put_queue(char data)
-{
- if((in_pointer+1)==KBD_BUFFER_LEN) {
- if(out_pointer==0) {
- return; /* buffer full */
- } else{
- in_pointer=0;
- }
- } else {
- if((in_pointer+1)==out_pointer)
- return; /* buffer full */
- in_pointer++;
- }
- kbd_buffer[in_pointer]=data;
- return;
-}
-
-/* test if a character is in the queue */
-int kbd_testc(void)
-{
- if(in_pointer==out_pointer)
- return(0); /* no data */
- else
- return(1);
-}
-/* gets the character from the queue */
-int kbd_getc(void)
-{
- char c;
- while(in_pointer==out_pointer);
- if((out_pointer+1)==KBD_BUFFER_LEN)
- out_pointer=0;
- else
- out_pointer++;
- c=kbd_buffer[out_pointer];
- return (int)c;
-
-}
-
-
-/* set LEDs */
-
-void kbd_set_leds(void)
-{
- if(caps_lock==0)
- leds&=~LED_CAP; /* switch caps_lock off */
- else
- leds|=LED_CAP; /* switch on LED */
- if(num_lock==0)
- leds&=~LED_NUM; /* switch LED off */
- else
- leds|=LED_NUM; /* switch on LED */
- if(scroll_lock==0)
- leds&=~LED_SCR; /* switch LED off */
- else
- leds|=LED_SCR; /* switch on LED */
- kbd_send_data(KBD_CMD_SET_LEDS);
- kbd_send_data(leds);
-}
-
-
-void handle_keyboard_event(unsigned char scancode)
-{
- unsigned char keycode;
-
- /* Convert scancode to keycode */
- PRINTF("scancode %x\n",scancode);
- if(scancode==0xe0) {
- e0=1; /* special charakters */
- return;
- }
- if(e0==1) {
- e0=0; /* delete flag */
- if(!( ((scancode&0x7F)==0x38)|| /* the right ctrl key */
- ((scancode&0x7F)==0x1D)|| /* the right alt key */
- ((scancode&0x7F)==0x35)|| /* the right '/' key */
- ((scancode&0x7F)==0x1C) )) /* the right enter key */
- /* we swallow unknown e0 codes */
- return;
- }
- /* special cntrl keys */
- switch(scancode)
- {
- case 0x2A:
- case 0x36: /* shift pressed */
- shift=1;
- return; /* do nothing else */
- case 0xAA:
- case 0xB6: /* shift released */
- shift=0;
- return; /* do nothing else */
- case 0x38: /* alt pressed */
- alt=1;
- return; /* do nothing else */
- case 0xB8: /* alt released */
- alt=0;
- return; /* do nothing else */
- case 0x1d: /* ctrl pressed */
- ctrl=1;
- return; /* do nothing else */
- case 0x9d: /* ctrl released */
- ctrl=0;
- return; /* do nothing else */
- case 0x46: /* scrollock pressed */
- scroll_lock=~scroll_lock;
- kbd_set_leds();
- return; /* do nothing else */
- case 0x3A: /* capslock pressed */
- caps_lock=~caps_lock;
- kbd_set_leds();
- return;
- case 0x45: /* numlock pressed */
- num_lock=~num_lock;
- kbd_set_leds();
- return;
- case 0xC6: /* scroll lock released */
- case 0xC5: /* num lock released */
- case 0xBA: /* caps lock released */
- return; /* just swallow */
- }
- if((scancode&0x80)==0x80) /* key released */
- return;
- /* now, decide which table we need */
- if(scancode > (sizeof(kbd_plain_xlate)/sizeof(kbd_plain_xlate[0]))) { /* scancode not in list */
- PRINTF("unkown scancode %X\n",scancode);
- return; /* swallow it */
- }
- /* setup plain code first */
- keycode=kbd_plain_xlate[scancode];
- if(caps_lock==1) { /* caps_lock is pressed, overwrite plain code */
- if(scancode > (sizeof(kbd_shift_xlate)/sizeof(kbd_shift_xlate[0]))) { /* scancode not in list */
- PRINTF("unkown caps-locked scancode %X\n",scancode);
- return; /* swallow it */
- }
- keycode=kbd_shift_xlate[scancode];
- if(keycode<'A') { /* we only want the alphas capital */
- keycode=kbd_plain_xlate[scancode];
- }
- }
- if(shift==1) { /* shift overwrites caps_lock */
- if(scancode > (sizeof(kbd_shift_xlate)/sizeof(kbd_shift_xlate[0]))) { /* scancode not in list */
- PRINTF("unkown shifted scancode %X\n",scancode);
- return; /* swallow it */
- }
- keycode=kbd_shift_xlate[scancode];
- }
- if(ctrl==1) { /* ctrl overwrites caps_lock and shift */
- if(scancode > (sizeof(kbd_ctrl_xlate)/sizeof(kbd_ctrl_xlate[0]))) { /* scancode not in list */
- PRINTF("unkown ctrl scancode %X\n",scancode);
- return; /* swallow it */
- }
- keycode=kbd_ctrl_xlate[scancode];
- }
- /* check if valid keycode */
- if(keycode==0xff) {
- PRINTF("unkown scancode %X\n",scancode);
- return; /* swallow unknown codes */
- }
-
- kbd_put_queue(keycode);
- PRINTF("%x\n",keycode);
-}
-
-/*
- * This reads the keyboard status port, and does the
- * appropriate action.
- *
- */
-unsigned char handle_kbd_event(void)
-{
- unsigned char status = kbd_read_status();
- unsigned int work = 10000;
-
- while ((--work > 0) && (status & KBD_STAT_OBF)) {
- unsigned char scancode;
-
- scancode = kbd_read_input();
-
- /* Error bytes must be ignored to make the
- Synaptics touchpads compaq use work */
- /* Ignore error bytes */
- if (!(status & (KBD_STAT_GTO | KBD_STAT_PERR)))
- {
- if (status & KBD_STAT_MOUSE_OBF)
- ; /* not supported: handle_mouse_event(scancode); */
- else
- handle_keyboard_event(scancode);
- }
- status = kbd_read_status();
- }
- if (!work)
- PRINTF("pc_keyb: controller jammed (0x%02X).\n", status);
- return status;
-}
-
-
-/******************************************************************************
- * Lowlevel Part of keyboard section
- */
-unsigned char kbd_read_status(void)
-{
- return(in8(CFG_ISA_IO_BASE_ADDRESS + KDB_COMMAND_PORT));
-}
-
-unsigned char kbd_read_input(void)
-{
- return(in8(CFG_ISA_IO_BASE_ADDRESS + KDB_DATA_PORT));
-}
-
-void kbd_write_command(unsigned char cmd)
-{
- out8(CFG_ISA_IO_BASE_ADDRESS + KDB_COMMAND_PORT,cmd);
-}
-
-void kbd_write_output(unsigned char data)
-{
- out8(CFG_ISA_IO_BASE_ADDRESS + KDB_DATA_PORT, data);
-}
-
-int kbd_read_data(void)
-{
- int val;
- unsigned char status;
-
- val=-1;
- status = kbd_read_status();
- if (status & KBD_STAT_OBF) {
- val = kbd_read_input();
- if (status & (KBD_STAT_GTO | KBD_STAT_PERR))
- val = -2;
- }
- return val;
-}
-
-int kbd_wait_for_input(void)
-{
- unsigned long timeout;
- int val;
-
- timeout = KBD_TIMEOUT;
- val=kbd_read_data();
- while(val < 0)
- {
- if(timeout--==0)
- return -1;
- udelay(1000);
- val=kbd_read_data();
- }
- return val;
-}
-
-
-int kb_wait(void)
-{
- unsigned long timeout = KBC_TIMEOUT * 10;
-
- do {
- unsigned char status = handle_kbd_event();
- if (!(status & KBD_STAT_IBF))
- return 0; /* ok */
- udelay(1000);
- timeout--;
- } while (timeout);
- return 1;
-}
-
-void kbd_write_command_w(int data)
-{
- if(kb_wait())
- PRINTF("timeout in kbd_write_command_w\n");
- kbd_write_command(data);
-}
-
-void kbd_write_output_w(int data)
-{
- if(kb_wait())
- PRINTF("timeout in kbd_write_output_w\n");
- kbd_write_output(data);
-}
-
-void kbd_send_data(unsigned char data)
-{
- unsigned char status;
- disable_8259A_irq(1); /* disable interrupt */
- kbd_write_output_w(data);
- status = kbd_wait_for_input();
- if (status == KBD_REPLY_ACK)
- enable_8259A_irq(1); /* enable interrupt */
-}
-
-
-char * kbd_initialize(void)
-{
- int status;
-
- in_pointer = 0; /* delete in Buffer */
- out_pointer = 0;
- /*
- * Test the keyboard interface.
- * This seems to be the only way to get it going.
- * If the test is successful a x55 is placed in the input buffer.
- */
- kbd_write_command_w(KBD_CCMD_SELF_TEST);
- if (kbd_wait_for_input() != 0x55)
- return "Kbd: failed self test";
- /*
- * Perform a keyboard interface test. This causes the controller
- * to test the keyboard clock and data lines. The results of the
- * test are placed in the input buffer.
- */
- kbd_write_command_w(KBD_CCMD_KBD_TEST);
- if (kbd_wait_for_input() != 0x00)
- return "Kbd: interface failed self test";
- /*
- * Enable the keyboard by allowing the keyboard clock to run.
- */
- kbd_write_command_w(KBD_CCMD_KBD_ENABLE);
- status = kbd_wait_for_input();
- /*
- * Reset keyboard. If the read times out
- * then the assumption is that no keyboard is
- * plugged into the machine.
- * This defaults the keyboard to scan-code set 2.
- *
- * Set up to try again if the keyboard asks for RESEND.
- */
- do {
- kbd_write_output_w(KBD_CMD_RESET);
- status = kbd_wait_for_input();
- if (status == KBD_REPLY_ACK)
- break;
- if (status != KBD_REPLY_RESEND)
- {
- PRINTF("status: %X\n",status);
- return "Kbd: reset failed, no ACK";
- }
- } while (1);
- if (kbd_wait_for_input() != KBD_REPLY_POR)
- return "Kbd: reset failed, no POR";
-
- /*
- * Set keyboard controller mode. During this, the keyboard should be
- * in the disabled state.
- *
- * Set up to try again if the keyboard asks for RESEND.
- */
- do {
- kbd_write_output_w(KBD_CMD_DISABLE);
- status = kbd_wait_for_input();
- if (status == KBD_REPLY_ACK)
- break;
- if (status != KBD_REPLY_RESEND)
- return "Kbd: disable keyboard: no ACK";
- } while (1);
-
- kbd_write_command_w(KBD_CCMD_WRITE_MODE);
- kbd_write_output_w(KBD_MODE_KBD_INT
- | KBD_MODE_SYS
- | KBD_MODE_DISABLE_MOUSE
- | KBD_MODE_KCC);
-
- /* AMCC powerpc portables need this to use scan-code set 1 -- Cort */
- kbd_write_command_w(KBD_CCMD_READ_MODE);
- if (!(kbd_wait_for_input() & KBD_MODE_KCC)) {
- /*
- * If the controller does not support conversion,
- * Set the keyboard to scan-code set 1.
- */
- kbd_write_output_w(0xF0);
- kbd_wait_for_input();
- kbd_write_output_w(0x01);
- kbd_wait_for_input();
- }
- kbd_write_output_w(KBD_CMD_ENABLE);
- if (kbd_wait_for_input() != KBD_REPLY_ACK)
- return "Kbd: enable keyboard: no ACK";
-
- /*
- * Finally, set the typematic rate to maximum.
- */
- kbd_write_output_w(KBD_CMD_SET_RATE);
- if (kbd_wait_for_input() != KBD_REPLY_ACK)
- return "Kbd: Set rate: no ACK";
- kbd_write_output_w(0x00);
- if (kbd_wait_for_input() != KBD_REPLY_ACK)
- return "Kbd: Set rate: no ACK";
- return NULL;
-}
-
-void kbd_interrupt(void)
-{
- handle_kbd_event();
-}
diff --git a/board/mpl/common/kbd.h b/board/mpl/common/kbd.h
deleted file mode 100644
index 229ba615f8..0000000000
--- a/board/mpl/common/kbd.h
+++ /dev/null
@@ -1,35 +0,0 @@
-/*
- * (C) Copyright 2001
- * Denis Peter, MPL AG Switzerland, d.peter@mpl.ch
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- */
-
-#ifndef _KBD_H_
-#define _KBD_H_
-
-extern int kbd_testc(void);
-extern int kbd_getc(void);
-extern void kbd_interrupt(void);
-extern char *kbd_initialize(void);
-
-unsigned char kbd_is_init(void);
-#define KBD_INTERRUPT 1
-#endif
diff --git a/board/mpl/common/memtst.c b/board/mpl/common/memtst.c
deleted file mode 100644
index 2c77d375ea..0000000000
--- a/board/mpl/common/memtst.c
+++ /dev/null
@@ -1,590 +0,0 @@
-/*
- * (C) Copyright 2001
- * Denis Peter, MPL AG Switzerland, d.peter@mpl.ch
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- */
-
-/* NOT Used yet...
- add following code to PIP405.c :
-int testdram (void)
-{
- unsigned char s[32];
- int i;
-
- i = getenv_r ("testmem", s, 32);
- if (i != 0) {
- i = (int) simple_strtoul (s, NULL, 10);
- if ((i > 0) && (i < 0xf)) {
- printf ("testing ");
- i = mem_test (0, ramsize, i);
- if (i > 0)
- printf ("ERROR ");
- else
- printf ("Ok ");
- }
- }
- return (1);
-}
-*/
-
-
-#include <common.h>
-#include <asm/processor.h>
-#include <405gp_i2c.h>
-
-#define FALSE 0
-#define TRUE 1
-
-#define TEST_QUIET 8
-#define TEST_SHOW_PROG 4
-#define TEST_SHOW_ERR 2
-#define TEST_SHOW_ALL 1
-
-#define TESTPAT1 0xAA55AA55
-#define TESTPAT2 0x55AA55AA
-#define TEST_PASSED 0
-#define TEST_FAILED 1
-#define MEGABYTE (1024*1024)
-
-
-typedef struct {
- volatile unsigned long pat1;
- volatile unsigned long pat2;
-} RAM_MEMTEST_PATTERN2;
-
-typedef struct {
- volatile unsigned long addr;
-} RAM_MEMTEST_ADDRLINE;
-
-static __inline unsigned long Swap_32 (unsigned long val)
-{
- return (((val << 16) & 0xFFFF0000) | ((val >> 16) & 0x0000FFFF));
-}
-
-void testm_puts (int quiet, char *buf)
-{
- if ((quiet & TEST_SHOW_ALL) == TEST_SHOW_ALL)
- puts (buf);
-}
-
-
-void Write_Error (int mode, unsigned long addr, unsigned long expected,
- unsigned long actual)
-{
-
- char dispbuf[64];
-
- sprintf (dispbuf, "\n ERROR @ 0x%08lX: (exp: 0x%08lX act: 0x%08lX) ",
- addr, expected, actual);
- testm_puts (((mode & TEST_SHOW_ERR) ==
- TEST_SHOW_ERR) ? TEST_SHOW_ALL : mode, dispbuf);
-}
-
-
-/*
- * fills the memblock of <size> bytes from <startaddr> with pat1 and pat2
- */
-
-
-void RAM_MemTest_WritePattern2 (unsigned long startaddr,
- unsigned long size, unsigned long pat1,
- unsigned long pat2)
-{
- RAM_MEMTEST_PATTERN2 *p, *pe;
-
- p = (RAM_MEMTEST_PATTERN2 *) startaddr;
- pe = (RAM_MEMTEST_PATTERN2 *) (startaddr + size);
-
- while (p < pe) {
- p->pat1 = pat1;
- p->pat2 = pat2;
- p++;
- } /* endwhile */
-}
-
-/*
- * checks the memblock of <size> bytes from <startaddr> with pat1 and pat2
- * returns the address of the first error or NULL if all is well
- */
-
-void *RAM_MemTest_CheckPattern2 (int mode, unsigned long startaddr,
- unsigned long size, unsigned long pat1,
- unsigned long pat2)
-{
- RAM_MEMTEST_PATTERN2 *p, *pe;
- unsigned long actual1, actual2;
-
- p = (RAM_MEMTEST_PATTERN2 *) startaddr;
- pe = (RAM_MEMTEST_PATTERN2 *) (startaddr + size);
-
- while (p < pe) {
- actual1 = p->pat1;
- actual2 = p->pat2;
-
- if (actual1 != pat1) {
- Write_Error (mode, (unsigned long) &(p->pat1), pat1, actual1);
- return ((void *) &(p->pat1));
- }
- /* endif */
- if (actual2 != pat2) {
- Write_Error (mode, (unsigned long) &(p->pat2), pat2, actual2);
- return ((void *) &(p->pat2));
- }
- /* endif */
- p++;
- } /* endwhile */
-
- return (NULL);
-}
-
-/*
- * fills the memblock of <size> bytes from <startaddr> with the address
- */
-
-void RAM_MemTest_WriteAddrLine (unsigned long startaddr,
- unsigned long size, int swapped)
-{
- RAM_MEMTEST_ADDRLINE *p, *pe;
-
- p = (RAM_MEMTEST_ADDRLINE *) startaddr;
- pe = (RAM_MEMTEST_ADDRLINE *) (startaddr + size);
-
- if (!swapped) {
- while (p < pe) {
- p->addr = (unsigned long) p;
- p++;
- } /* endwhile */
- } else {
- while (p < pe) {
- p->addr = Swap_32 ((unsigned long) p);
- p++;
- } /* endwhile */
- } /* endif */
-}
-
-/*
- * checks the memblock of <size> bytes from <startaddr>
- * returns the address of the error or NULL if all is well
- */
-
-void *RAM_MemTest_CheckAddrLine (int mode, unsigned long startaddr,
- unsigned long size, int swapped)
-{
- RAM_MEMTEST_ADDRLINE *p, *pe;
- unsigned long actual, expected;
-
- p = (RAM_MEMTEST_ADDRLINE *) startaddr;
- pe = (RAM_MEMTEST_ADDRLINE *) (startaddr + size);
-
- if (!swapped) {
- while (p < pe) {
- actual = p->addr;
- expected = (unsigned long) p;
- if (actual != expected) {
- Write_Error (mode, (unsigned long) &(p->addr), expected,
- actual);
- return ((void *) &(p->addr));
- } /* endif */
- p++;
- } /* endwhile */
- } else {
- while (p < pe) {
- actual = p->addr;
- expected = Swap_32 ((unsigned long) p);
- if (actual != expected) {
- Write_Error (mode, (unsigned long) &(p->addr), expected,
- actual);
- return ((void *) &(p->addr));
- } /* endif */
- p++;
- } /* endwhile */
- } /* endif */
-
- return (NULL);
-}
-
-/*
- * checks the memblock of <size> bytes from <startaddr+size>
- * returns the address of the error or NULL if all is well
- */
-
-void *RAM_MemTest_CheckAddrLineReverse (int mode, unsigned long startaddr,
- unsigned long size, int swapped)
-{
- RAM_MEMTEST_ADDRLINE *p, *pe;
- unsigned long actual, expected;
-
- p = (RAM_MEMTEST_ADDRLINE *) (startaddr + size - sizeof (p->addr));
- pe = (RAM_MEMTEST_ADDRLINE *) startaddr;
-
- if (!swapped) {
- while (p > pe) {
- actual = p->addr;
- expected = (unsigned long) p;
- if (actual != expected) {
- Write_Error (mode, (unsigned long) &(p->addr), expected,
- actual);
- return ((void *) &(p->addr));
- } /* endif */
- p--;
- } /* endwhile */
- } else {
- while (p > pe) {
- actual = p->addr;
- expected = Swap_32 ((unsigned long) p);
- if (actual != expected) {
- Write_Error (mode, (unsigned long) &(p->addr), expected,
- actual);
- return ((void *) &(p->addr));
- } /* endif */
- p--;
- } /* endwhile */
- } /* endif */
-
- return (NULL);
-}
-
-/*
- * fills the memblock of <size> bytes from <startaddr> with walking bit pattern
- */
-
-void RAM_MemTest_WriteWalkBit (unsigned long startaddr, unsigned long size)
-{
- volatile unsigned long *p, *pe;
- unsigned long i;
-
- p = (unsigned long *) startaddr;
- pe = (unsigned long *) (startaddr + size);
- i = 0;
-
- while (p < pe) {
- *p = 1UL << i;
- i = (i + 1 + (((unsigned long) p) >> 7)) % 32;
- p++;
- } /* endwhile */
-}
-
-/*
- * checks the memblock of <size> bytes from <startaddr>
- * returns the address of the error or NULL if all is well
- */
-
-void *RAM_MemTest_CheckWalkBit (int mode, unsigned long startaddr,
- unsigned long size)
-{
- volatile unsigned long *p, *pe;
- unsigned long actual, expected;
- unsigned long i;
-
- p = (unsigned long *) startaddr;
- pe = (unsigned long *) (startaddr + size);
- i = 0;
-
- while (p < pe) {
- actual = *p;
- expected = (1UL << i);
- if (actual != expected) {
- Write_Error (mode, (unsigned long) p, expected, actual);
- return ((void *) p);
- } /* endif */
- i = (i + 1 + (((unsigned long) p) >> 7)) % 32;
- p++;
- } /* endwhile */
-
- return (NULL);
-}
-
-/*
- * fills the memblock of <size> bytes from <startaddr> with "random" pattern
- */
-
-void RAM_MemTest_WriteRandomPattern (unsigned long startaddr,
- unsigned long size,
- unsigned long *pat)
-{
- unsigned long i, p;
-
- p = *pat;
-
- for (i = 0; i < (size / 4); i++) {
- *(unsigned long *) (startaddr + i * 4) = p;
- if ((p % 2) > 0) {
- p ^= i;
- p >>= 1;
- p |= 0x80000000;
- } else {
- p ^= ~i;
- p >>= 1;
- } /* endif */
- } /* endfor */
- *pat = p;
-}
-
-/*
- * checks the memblock of <size> bytes from <startaddr>
- * returns the address of the error or NULL if all is well
- */
-
-void *RAM_MemTest_CheckRandomPattern (int mode, unsigned long startaddr,
- unsigned long size,
- unsigned long *pat)
-{
- void *perr = NULL;
- unsigned long i, p, p1;
-
- p = *pat;
-
- for (i = 0; i < (size / 4); i++) {
- p1 = *(unsigned long *) (startaddr + i * 4);
- if (p1 != p) {
- if (perr == NULL) {
- Write_Error (mode, startaddr + i * 4, p, p1);
- perr = (void *) (startaddr + i * 4);
- } /* endif */
- }
- /* endif */
- if ((p % 2) > 0) {
- p ^= i;
- p >>= 1;
- p |= 0x80000000;
- } else {
- p ^= ~i;
- p >>= 1;
- } /* endif */
- } /* endfor */
-
- *pat = p;
- return (perr);
-}
-
-
-void RAM_MemTest_WriteData1 (unsigned long startaddr, unsigned long size,
- unsigned long *pat)
-{
- RAM_MemTest_WritePattern2 (startaddr, size, TESTPAT1, TESTPAT2);
-}
-
-void *RAM_MemTest_CheckData1 (int mode, unsigned long startaddr,
- unsigned long size, unsigned long *pat)
-{
- return (RAM_MemTest_CheckPattern2
- (mode, startaddr, size, TESTPAT1, TESTPAT2));
-}
-
-void RAM_MemTest_WriteData2 (unsigned long startaddr, unsigned long size,
- unsigned long *pat)
-{
- RAM_MemTest_WritePattern2 (startaddr, size, TESTPAT2, TESTPAT1);
-}
-
-void *RAM_MemTest_CheckData2 (int mode, unsigned long startaddr,
- unsigned long size, unsigned long *pat)
-{
- return (RAM_MemTest_CheckPattern2
- (mode, startaddr, size, TESTPAT2, TESTPAT1));
-}
-
-void RAM_MemTest_WriteAddr1 (unsigned long startaddr, unsigned long size,
- unsigned long *pat)
-{
- RAM_MemTest_WriteAddrLine (startaddr, size, FALSE);
-}
-
-void *RAM_MemTest_Check1Addr1 (int mode, unsigned long startaddr,
- unsigned long size, unsigned long *pat)
-{
- return (RAM_MemTest_CheckAddrLine (mode, startaddr, size, FALSE));
-}
-
-void *RAM_MemTest_Check2Addr1 (int mode, unsigned long startaddr,
- unsigned long size, unsigned long *pat)
-{
- return (RAM_MemTest_CheckAddrLineReverse
- (mode, startaddr, size, FALSE));
-}
-
-void RAM_MemTest_WriteAddr2 (unsigned long startaddr, unsigned long size,
- unsigned long *pat)
-{
- RAM_MemTest_WriteAddrLine (startaddr, size, TRUE);
-}
-
-void *RAM_MemTest_Check1Addr2 (int mode, unsigned long startaddr,
- unsigned long size, unsigned long *pat)
-{
- return (RAM_MemTest_CheckAddrLine (mode, startaddr, size, TRUE));
-}
-
-void *RAM_MemTest_Check2Addr2 (int mode, unsigned long startaddr,
- unsigned long size, unsigned long *pat)
-{
- return (RAM_MemTest_CheckAddrLineReverse
- (mode, startaddr, size, TRUE));
-}
-
-
-typedef struct {
- void (*test_write) (unsigned long startaddr, unsigned long size,
- unsigned long *pat);
- char *test_write_desc;
- void *(*test_check1) (int mode, unsigned long startaddr,
- unsigned long size, unsigned long *pat);
- void *(*test_check2) (int mode, unsigned long startaddr,
- unsigned long size, unsigned long *pat);
-} RAM_MEMTEST_FUNC;
-
-
-#define TEST_STAGES 5
-static RAM_MEMTEST_FUNC test_stage[TEST_STAGES] = {
- {RAM_MemTest_WriteData1, "data test 1...\n", RAM_MemTest_CheckData1,
- NULL},
- {RAM_MemTest_WriteData2, "data test 2...\n", RAM_MemTest_CheckData2,
- NULL},
- {RAM_MemTest_WriteAddr1, "address line test...\n",
- RAM_MemTest_Check1Addr1, RAM_MemTest_Check2Addr1},
- {RAM_MemTest_WriteAddr2, "address line test (swapped)...\n",
- RAM_MemTest_Check1Addr2, RAM_MemTest_Check2Addr2},
- {RAM_MemTest_WriteRandomPattern, "random data test...\n",
- RAM_MemTest_CheckRandomPattern, NULL}
-};
-
-void mem_test_reloc(void)
-{
- DECLARE_GLOBAL_DATA_PTR;
- unsigned long addr;
- int i;
- for (i=0; i< TEST_STAGES; i++) {
- addr = (ulong) (test_stage[i].test_write) + gd->reloc_off;
- test_stage[i].test_write=
- (void (*) (unsigned long startaddr, unsigned long size,
- unsigned long *pat))addr;
- addr = (ulong) (test_stage[i].test_write_desc) + gd->reloc_off;
- test_stage[i].test_write_desc=(char *)addr;
- if(test_stage[i].test_check1) {
- addr = (ulong) (test_stage[i].test_check1) + gd->reloc_off;
- test_stage[i].test_check1=
- (void *(*) (int mode, unsigned long startaddr,
- unsigned long size, unsigned long *pat))addr;
- }
- if(test_stage[i].test_check2) {
- addr = (ulong) (test_stage[i].test_check2) + gd->reloc_off;
- test_stage[i].test_check2=
- (void *(*) (int mode, unsigned long startaddr,
- unsigned long size, unsigned long *pat))addr;
- }
- }
-}
-
-
-int mem_test (unsigned long start, unsigned long ramsize, int quiet)
-{
- unsigned long errors, stage;
- unsigned long startaddr, size, i;
- const unsigned long blocksize = 0x80000; /* check in 512KB blocks */
- unsigned long *perr;
- unsigned long rdatapat;
- char dispbuf[80];
- int status = TEST_PASSED;
- int prog = 0;
-
- errors = 0;
- startaddr = start;
- size = ramsize;
- if ((quiet & TEST_SHOW_PROG) == TEST_SHOW_PROG) {
- prog++;
- printf (".");
- }
- sprintf (dispbuf, "\nMemory Test: addr = 0x%lx size = 0x%lx\n",
- startaddr, size);
- testm_puts (quiet, dispbuf);
- for (stage = 0; stage < TEST_STAGES; stage++) {
- sprintf (dispbuf, test_stage[stage].test_write_desc);
- testm_puts (quiet, dispbuf);
- /* fill SDRAM */
- rdatapat = 0x12345678;
- sprintf (dispbuf, "writing block: ");
- testm_puts (quiet, dispbuf);
- for (i = 0; i < size; i += blocksize) {
- sprintf (dispbuf, "%04lX\b\b\b\b", i / blocksize);
- testm_puts (quiet, dispbuf);
- test_stage[stage].test_write (startaddr + i, blocksize,
- &rdatapat);
- } /* endfor */
- sprintf (dispbuf, "\n");
- testm_puts (quiet, dispbuf);
- if ((quiet & TEST_SHOW_PROG) == TEST_SHOW_PROG) {
- prog++;
- printf (".");
- }
- /* check SDRAM */
- rdatapat = 0x12345678;
- sprintf (dispbuf, "checking block: ");
- testm_puts (quiet, dispbuf);
- for (i = 0; i < size; i += blocksize) {
- sprintf (dispbuf, "%04lX\b\b\b\b", i / blocksize);
- testm_puts (quiet, dispbuf);
- if ((perr =
- test_stage[stage].test_check1 (quiet, startaddr + i,
- blocksize,
- &rdatapat)) != NULL) {
- status = TEST_FAILED;
- } /* endif */
- } /* endfor */
- sprintf (dispbuf, "\n");
- testm_puts (quiet, dispbuf);
- if ((quiet & TEST_SHOW_PROG) == TEST_SHOW_PROG) {
- prog++;
- printf (".");
- }
- if (test_stage[stage].test_check2 != NULL) {
- /* check2 SDRAM */
- sprintf (dispbuf, "2nd checking block: ");
- rdatapat = 0x12345678;
- testm_puts (quiet, dispbuf);
- for (i = 0; i < size; i += blocksize) {
- sprintf (dispbuf, "%04lX\b\b\b\b", i / blocksize);
- testm_puts (quiet, dispbuf);
- if ((perr =
- test_stage[stage].test_check2 (quiet, startaddr + i,
- blocksize,
- &rdatapat)) != NULL) {
- status = TEST_FAILED;
- } /* endif */
- } /* endfor */
- sprintf (dispbuf, "\n");
- testm_puts (quiet, dispbuf);
- if ((quiet & TEST_SHOW_PROG) == TEST_SHOW_PROG) {
- prog++;
- printf (".");
- }
- }
-
- } /* next stage */
- if ((quiet & TEST_SHOW_PROG) == TEST_SHOW_PROG) {
- while (prog-- > 0)
- printf ("\b \b");
- }
-
- if (status == TEST_FAILED)
- errors++;
-
- return (errors);
-}
diff --git a/board/mpl/common/pci.c b/board/mpl/common/pci.c
deleted file mode 100644
index 692930b416..0000000000
--- a/board/mpl/common/pci.c
+++ /dev/null
@@ -1,126 +0,0 @@
-/*-----------------------------------------------------------------------------+
-|
-| This source code has been made available to you by IBM on an AS-IS
-| basis. Anyone receiving this source is licensed under IBM
-| copyrights to use it in any way he or she deems fit, including
-| copying it, modifying it, compiling it, and redistributing it either
-| with or without modifications. No license under IBM patents or
-| patent applications is to be implied by the copyright license.
-|
-| Any user of this software should understand that IBM cannot provide
-| technical support for this software and will not be responsible for
-| any consequences resulting from the use of this software.
-|
-| Any person who transfers this source code or any derivative work
-| must include the IBM copyright notice, this paragraph, and the
-| preceding two paragraphs in the transferred software.
-|
-| COPYRIGHT I B M CORPORATION 1995
-| LICENSED MATERIAL - PROGRAM PROPERTY OF I B M
-+-----------------------------------------------------------------------------*/
-/*
- * Adapted for PIP405 03.07.01
- * Denis Peter, MPL AG Switzerland, d.peter@mpl.ch
- *
- * TODO: Clean-up
- */
-
-#include <common.h>
-#include <pci.h>
-#include "isa.h"
-
-#ifdef CONFIG_405GP
-#ifdef CONFIG_PCI
-
-#undef DEBUG
-
-#include "piix4_pci.h"
-#include "pci_parts.h"
-
-void pci_pip405_write_regs(struct pci_controller *hose, pci_dev_t dev,
- struct pci_config_table *entry)
-{
- struct pci_pip405_config_entry *table;
- int i;
-
- table = (struct pci_pip405_config_entry*) entry->priv[0];
-
- for (i=0; table[i].width; i++)
- {
-#ifdef DEBUG
- printf("Reg 0x%02X Value 0x%08lX Width %02d written\n",
- table[i].index, table[i].val, table[i].width);
-#endif
-
- switch(table[i].width)
- {
- case 1: pci_hose_write_config_byte(hose, dev, table[i].index, table[i].val); break;
- case 2: pci_hose_write_config_word(hose, dev, table[i].index, table[i].val); break;
- case 4: pci_hose_write_config_dword(hose, dev, table[i].index, table[i].val); break;
- }
- }
-}
-
-
-static void pci_pip405_fixup_irq(struct pci_controller *hose, pci_dev_t dev)
-{
- unsigned char int_line = 0xff;
- unsigned char pin;
- /*
- * Write pci interrupt line register
- */
- if(PCI_DEV(dev)==0) /* Device0 = PPC405 -> skip */
- return;
- pci_hose_read_config_byte(hose, dev, PCI_INTERRUPT_PIN, &pin);
- if ((pin == 0) || (pin > 4))
- return;
-
- int_line = ((PCI_DEV(dev) + (pin-1) + 10) % 4) + 28;
- pci_hose_write_config_byte(hose, dev, PCI_INTERRUPT_LINE, int_line);
-#ifdef DEBUG
- printf("Fixup IRQ: dev %d (%x) int line %d 0x%x\n",
- PCI_DEV(dev),dev,int_line,int_line);
-#endif
-}
-
-extern void pci_405gp_init(struct pci_controller *hose);
-
-
-static struct pci_controller hose = {
- config_table: pci_pip405_config_table,
- fixup_irq: pci_pip405_fixup_irq,
-};
-
-
-static void reloc_pci_cfg_table(struct pci_config_table *table)
-{
- DECLARE_GLOBAL_DATA_PTR;
- unsigned long addr;
-
- for (; table && table->vendor; table++) {
- addr = (ulong) (table->config_device) + gd->reloc_off;
-#ifdef DEBUG
- printf ("device \"%d\": 0x%08lx => 0x%08lx\n",
- table->device, (ulong) (table->config_device), addr);
-#endif
- table->config_device =
- (void (*)(struct pci_controller* hose, pci_dev_t dev,
- struct pci_config_table *))addr;
- table->priv[0]+=gd->reloc_off;
- }
-}
-
-void pci_init_board(void)
-{
- /*we want the ptrs to RAM not flash (ie don't use init list)*/
- hose.fixup_irq = pci_pip405_fixup_irq;
- hose.config_table = pci_pip405_config_table;
- reloc_pci_cfg_table(hose.config_table);
-#ifdef DEBUG
- printf("Init PCI: fixup_irq=%p config_table=%p hose=%p\n",pci_pip405_fixup_irq,pci_pip405_config_table,hose);
-#endif
- pci_405gp_init(&hose);
-}
-
-#endif /* CONFIG_PCI */
-#endif /* CONFIG_405GP */
diff --git a/board/mpl/common/pci_parts.h b/board/mpl/common/pci_parts.h
deleted file mode 100644
index 60008e2b24..0000000000
--- a/board/mpl/common/pci_parts.h
+++ /dev/null
@@ -1,193 +0,0 @@
- /*
- * (C) Copyright 2001
- * Denis Peter, MPL AG Switzerland, d.peter@mpl.ch
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- */
-#ifndef _PCI_PARTS_H_
-#define _PCI_PARTS_H_
-
-
-/* Board specific file containing:
- * - PCI Memory Mapping
- * - PCI IO Mapping
- * - PCI Interrupt Mapping
- */
-
-/* PIP405 PCI INT Routing:
- * IRQ0 VECTOR
- * PIXX4 IDSEL = AD16 INTA# 28 (Function 2 USB is INTD# = 31)
- * VGA IDSEL = AD17 INTB# 29
- * SCSI IDSEL = AD18 INTC# 30
- * PC104 IDSEL0 = AD20 INTA# 28
- * PC104 IDSEL1 = AD21 INTB# 29
- * PC104 IDSEL2 = AD22 INTC# 30
- * PC104 IDSEL3 = AD23 INTD# 31
- *
- * busdevfunc = EXXX XXXX BBBB BBBB DDDD DFFF RRRR RR00
- * ^ ^ ^ ^ ^
- * 31 23 15 10 7
- * E = Enabled
- * B = Bussnumber
- * D = Devicenumber (Device0 = AD10)
- * F = Functionnumber
- * R = Registernumber
- *
- * Device = (busdevfunc>>11) + 10
- * Vector = devicenumber % 4 + 28
- *
- */
-#define PCI_HIGHEST_ON_BOARD_ID 19
-/*#define PCI_DEV_NUMBER(x) (((x>>11) & 0x1f) + 10) */
-#define PCI_IRQ_VECTOR(x) ((PCI_DEV(x) + 10) % 4) + 28
-
-
-/* PCI Device List for PIP405 */
-
-/* Mapping:
- * +-------------+------------+------------+--------------------------------+
- * ¦ PCI MemAddr | PCI IOAddr | Local Addr | Device / Function |
- * +-------------+------------+------------+--------------------------------+
- * | 0x00000000 | | 0xA0000000 | ISA Memory (hard wired) |
- * | 0x00FFFFFF | | 0xA0FFFFFF | |
- * +-------------+------------+------------+--------------------------------+
- * | | 0x00000000 | 0xE8000000 | ISA IO (hard wired) |
- * | | 0x0000FFFF | 0xE800FFFF | |
- * +-------------+------------+------------+--------------------------------+
- * | 0x80000000 | | 0x80000000 | VGA Controller Memory |
- * | 0x80FFFFFF | | 0x80FFFFFF | |
- * +-------------+------------+------------+--------------------------------+
- * | 0x81000000 | | 0x81000000 | SCSI Controller Memory |
- * | 0x81FFFFFF | | 0x81FFFFFF | |
- * +-------------+------------+------------+--------------------------------+
- */
-
-struct pci_pip405_config_entry {
- int index; /* address */
- unsigned long val; /* value */
- int width; /* data size */
-};
-
-extern void pci_pip405_write_regs(struct pci_controller *,
- pci_dev_t,
- struct pci_config_table *);
-
-/* PIIX4 ISA Bridge Function 0 */
-static struct pci_pip405_config_entry piix4_isa_bridge_f0[] = {
- {PCI_CFG_PIIX4_SERIRQ, 0xD0, 1}, /* enable Continous SERIRQ Pin */
- {PCI_CFG_PIIX4_GENCFG, 0x00018041, 4}, /* enable SERIRQs, ISA, PNP, GPI11 */
- {PCI_CFG_PIIX4_TOM, 0xFE, 1}, /* Top of Memory */
- {PCI_CFG_PIIX4_XBCS, 0x02C4, 2}, /* disable all peri CS */
- {PCI_CFG_PIIX4_RTCCFG, 0x21, 1}, /* enable RTC */
-#if defined(CONFIG_PIP405)
- {PCI_CFG_PIIX4_MBDMA, 0x82, 1}, /* set MBDMA0 to DMA 2 */
- {PCI_CFG_PIIX4_MBDMA+1, 0x83, 1}, /* set MBDMA1 to DMA 3 */
-#endif
- {PCI_CFG_PIIX4_DLC, 0x0, 1}, /* disable passive release feature */
- { } /* end of device table */
-};
-
-/* PIIX4 IDE Controller Function 1 */
-static struct pci_pip405_config_entry piix4_ide_cntrl_f1[] = {
- {PCI_CFG_PIIX4_BMIBA, 0x0001000, 4}, /* set BMI to a valid address */
- {PCI_COMMAND, 0x0001, 2}, /* enable IO access */
-#if !defined(CONFIG_MIP405T)
- {PCI_CFG_PIIX4_IDETIM, 0x80008000, 4}, /* enable Both IDE channels */
-#else
- {PCI_CFG_PIIX4_IDETIM, 0x00008000, 4}, /* enable IDE channel0 */
-#endif
- { } /* end of device table */
-};
-
-/* PIIX4 USB Controller Function 2 */
-static struct pci_pip405_config_entry piix4_usb_cntrl_f2[] = {
-#if !defined(CONFIG_MIP405T)
- {PCI_INTERRUPT_LINE, 31, 1}, /* Int vector = 31 */
- {PCI_BASE_ADDRESS_4, 0x0000E001, 4}, /* Set IO Address to 0xe000 to 0xe01F */
- {PCI_LATENCY_TIMER, 0x80, 1}, /* Latency Timer 0x80 */
- {0xC0, 0x2000, 2}, /* Legacy support */
- {PCI_COMMAND, 0x0005, 2}, /* enable IO access and Master */
-#endif
- { } /* end of device table */
-};
-
-/* PIIX4 Power Management Function 3 */
-static struct pci_pip405_config_entry piix4_pmm_cntrl_f3[] = {
- {PCI_CFG_PIIX4_PMBA, 0x00004000, 4}, /* set PMBA to "valid" value */
- {PCI_CFG_PIIX4_SMBBA, 0x00005000, 4}, /* set SMBBA to "valid" value */
- {PCI_CFG_PIIX4_PMMISC, 0x01, 1}, /* enable PMBA IO access */
- {PCI_COMMAND, 0x0001, 2}, /* enable IO access */
- { } /* end of device table */
-};
-/* PPC405 Dummy only used to prevent autosetup on this host bridge */
-static struct pci_pip405_config_entry ppc405_dummy[] = {
- { } /* end of device table */
-};
-
-void pci_405gp_setup_vga(struct pci_controller *hose, pci_dev_t dev,
- struct pci_config_table *entry);
-
-
-static struct pci_config_table pci_pip405_config_table[]={
- {PCI_VENDOR_ID_IBM, /* 405 dummy */
- PCI_DEVICE_ID_IBM_405GP,
- PCI_ANY_ID,
- PCI_ANY_ID, PCI_ANY_ID, 0,
- pci_pip405_write_regs, {(unsigned long) ppc405_dummy}},
-
- {PCI_VENDOR_ID_INTEL, /* PIIX4 ISA Bridge Function 0 */
- PCI_DEVICE_ID_INTEL_82371AB_0,
- PCI_ANY_ID,
- PCI_ANY_ID, PCI_ANY_ID, 0,
- pci_pip405_write_regs, {(unsigned long) piix4_isa_bridge_f0}},
-
- {PCI_VENDOR_ID_INTEL, /* PIIX4 IDE Controller Function 1 */
- PCI_DEVICE_ID_INTEL_82371AB,
- PCI_ANY_ID,
- PCI_ANY_ID, PCI_ANY_ID, 1,
- pci_pip405_write_regs, {(unsigned long) piix4_ide_cntrl_f1}},
-
- {PCI_VENDOR_ID_INTEL, /* PIIX4 USB Controller Function 2 */
- PCI_DEVICE_ID_INTEL_82371AB_2,
- PCI_ANY_ID,
- PCI_ANY_ID, PCI_ANY_ID, 2,
- pci_pip405_write_regs, {(unsigned long) piix4_usb_cntrl_f2}},
-
- {PCI_VENDOR_ID_INTEL, /* PIIX4 USB Controller Function 3 */
- PCI_DEVICE_ID_INTEL_82371AB_3,
- PCI_ANY_ID,
- PCI_ANY_ID, PCI_ANY_ID, 3,
- pci_pip405_write_regs, {(unsigned long) piix4_pmm_cntrl_f3}},
-
- {PCI_ANY_ID,
- PCI_ANY_ID,
- PCI_CLASS_DISPLAY_VGA,
- PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
- pci_405gp_setup_vga},
-
- {PCI_ANY_ID,
- PCI_ANY_ID,
- PCI_CLASS_NOT_DEFINED_VGA,
- PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
- pci_405gp_setup_vga},
-
- { }
-};
-#endif /* _PCI_PARTS_H_ */
diff --git a/board/mpl/common/piix4_pci.h b/board/mpl/common/piix4_pci.h
deleted file mode 100644
index 0ff802e749..0000000000
--- a/board/mpl/common/piix4_pci.h
+++ /dev/null
@@ -1,165 +0,0 @@
-/*
- * (C) Copyright 2001
- * Denis Peter, MPL AG Switzerland, d.peter@mpl.ch
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-
-#ifndef _PIIX4_PCI_H
-#define _PIIX4_PCI_H
-
-/***************************************************************************
-* Defines PIIX4 Config Registers
-****************************************************************************/
-
-/* Function 0 ISA Bridge */
-#define PCI_CFG_PIIX4_IORT 0x4C /* 8 bit ISA Recovery Timer Reg (default 0x4D) */
-#define PCI_CFG_PIIX4_XBCS 0x4E /* 16 bit XBus Chip select reg (default 0x0003) */
-#define PCI_CFG_PIIX4_PIRQC 0x60 /* PCI IRQ Route Register 4 x 8bit (default )*/
-#define PCI_CFG_PIIX4_SERIRQ 0x64
-#define PCI_CFG_PIIX4_TOM 0x69
-#define PCI_CFG_PIIX4_MSTAT 0x6A
-#define PCI_CFG_PIIX4_MBDMA 0x76
-#define PCI_CFG_PIIX4_APICBS 0x80
-#define PCI_CFG_PIIX4_DLC 0x82
-#define PCI_CFG_PIIX4_PDMACFG 0x90
-#define PCI_CFG_PIIX4_DDMABS 0x92
-#define PCI_CFG_PIIX4_GENCFG 0xB0
-#define PCI_CFG_PIIX4_RTCCFG 0xCB
-
-/* IO Addresses */
-#define PIIX4_ISA_DMA1_CH0BA 0x00
-#define PIIX4_ISA_DMA1_CH0CA 0x01
-#define PIIX4_ISA_DMA1_CH1BA 0x02
-#define PIIX4_ISA_DMA1_CH1CA 0x03
-#define PIIX4_ISA_DMA1_CH2BA 0x04
-#define PIIX4_ISA_DMA1_CH2CA 0x05
-#define PIIX4_ISA_DMA1_CH3BA 0x06
-#define PIIX4_ISA_DMA1_CH3CA 0x07
-#define PIIX4_ISA_DMA1_CMDST 0x08
-#define PIIX4_ISA_DMA1_REQ 0x09
-#define PIIX4_ISA_DMA1_WSBM 0x0A
-#define PIIX4_ISA_DMA1_CH_MOD 0x0B
-#define PIIX4_ISA_DMA1_CLR_PT 0x0C
-#define PIIX4_ISA_DMA1_M_CLR 0x0D
-#define PIIX4_ISA_DMA1_CLR_M 0x0E
-#define PIIX4_ISA_DMA1_RWAMB 0x0F
-
-#define PIIX4_ISA_DMA2_CH0BA 0xC0
-#define PIIX4_ISA_DMA2_CH0CA 0xC1
-#define PIIX4_ISA_DMA2_CH1BA 0xC2
-#define PIIX4_ISA_DMA2_CH1CA 0xC3
-#define PIIX4_ISA_DMA2_CH2BA 0xC4
-#define PIIX4_ISA_DMA2_CH2CA 0xC5
-#define PIIX4_ISA_DMA2_CH3BA 0xC6
-#define PIIX4_ISA_DMA2_CH3CA 0xC7
-#define PIIX4_ISA_DMA2_CMDST 0xD0
-#define PIIX4_ISA_DMA2_REQ 0xD2
-#define PIIX4_ISA_DMA2_WSBM 0xD4
-#define PIIX4_ISA_DMA2_CH_MOD 0xD6
-#define PIIX4_ISA_DMA2_CLR_PT 0xD8
-#define PIIX4_ISA_DMA2_M_CLR 0xDA
-#define PIIX4_ISA_DMA2_CLR_M 0xDC
-#define PIIX4_ISA_DMA2_RWAMB 0xDE
-
-#define PIIX4_ISA_INT1_ICW1 0x20
-#define PIIX4_ISA_INT1_OCW2 0x20
-#define PIIX4_ISA_INT1_OCW3 0x20
-#define PIIX4_ISA_INT1_ICW2 0x21
-#define PIIX4_ISA_INT1_ICW3 0x21
-#define PIIX4_ISA_INT1_ICW4 0x21
-#define PIIX4_ISA_INT1_OCW1 0x21
-
-#define PIIX4_ISA_INT1_ELCR 0x4D0
-
-#define PIIX4_ISA_INT2_ICW1 0xA0
-#define PIIX4_ISA_INT2_OCW2 0xA0
-#define PIIX4_ISA_INT2_OCW3 0xA0
-#define PIIX4_ISA_INT2_ICW2 0xA1
-#define PIIX4_ISA_INT2_ICW3 0xA1
-#define PIIX4_ISA_INT2_ICW4 0xA1
-#define PIIX4_ISA_INT2_OCW1 0xA1
-#define PIIX4_ISA_INT2_IMR 0xA1 /* read only */
-
-#define PIIX4_ISA_INT2_ELCR 0x4D1
-
-#define PIIX4_ISA_TMR0_CNT_ST 0x40
-#define PIIX4_ISA_TMR1_CNT_ST 0x41
-#define PIIX4_ISA_TMR2_CNT_ST 0x42
-#define PIIX4_ISA_TMR_TCW 0x43
-
-#define PIIX4_ISA_RST_XBUS 0x60
-
-#define PIIX4_ISA_NMI_CNT_ST 0x61
-#define PIIX4_ISA_NMI_ENABLE 0x70
-
-#define PIIX4_ISA_RTC_INDEX 0x70
-#define PIIX4_ISA_RTC_DATA 0x71
-#define PIIX4_ISA_RTCEXT_IND 0x70
-#define PIIX4_ISA_RTCEXT_DATA 0x71
-
-#define PIIX4_ISA_DMA1_CH2LPG 0x81
-#define PIIX4_ISA_DMA1_CH3LPG 0x82
-#define PIIX4_ISA_DMA1_CH1LPG 0x83
-#define PIIX4_ISA_DMA1_CH0LPG 0x87
-#define PIIX4_ISA_DMA2_CH2LPG 0x89
-#define PIIX4_ISA_DMA2_CH3LPG 0x8A
-#define PIIX4_ISA_DMA2_CH1LPG 0x8B
-#define PIIX4_ISA_DMA2_LPGRFR 0x8F
-
-#define PIIX4_ISA_PORT_92 0x92
-
-#define PIIX4_ISA_APM_CONTRL 0xB2
-#define PIIX4_ISA_APM_STATUS 0xB3
-
-#define PIIX4_ISA_COCPU_ERROR 0xF0
-
-/* Function 1 IDE Controller */
-#define PCI_CFG_PIIX4_BMIBA 0x20
-#define PCI_CFG_PIIX4_IDETIM 0x40
-#define PCI_CFG_PIIX4_SIDETIM 0x44
-#define PCI_CFG_PIIX4_UDMACTL 0x48
-#define PCI_CFG_PIIX4_UDMATIM 0x4A
-
-/* Function 2 USB Controller */
-#define PCI_CFG_PIIX4_SBRNUM 0x60
-#define PCI_CFG_PIIX4_LEGSUP 0xC0
-
-/* Function 3 Power Management */
-#define PCI_CFG_PIIX4_PMBA 0x40
-#define PCI_CFG_PIIX4_CNTA 0x44
-#define PCI_CFG_PIIX4_CNTB 0x48
-#define PCI_CFG_PIIX4_GPICTL 0x4C
-#define PCI_CFG_PIIX4_DEVRESD 0x50
-#define PCI_CFG_PIIX4_DEVACTA 0x54
-#define PCI_CFG_PIIX4_DEVACTB 0x58
-#define PCI_CFG_PIIX4_DEVRESA 0x5C
-#define PCI_CFG_PIIX4_DEVRESB 0x60
-#define PCI_CFG_PIIX4_DEVRESC 0x64
-#define PCI_CFG_PIIX4_DEVRESE 0x68
-#define PCI_CFG_PIIX4_DEVRESF 0x6C
-#define PCI_CFG_PIIX4_DEVRESG 0x70
-#define PCI_CFG_PIIX4_DEVRESH 0x74
-#define PCI_CFG_PIIX4_DEVRESI 0x78
-#define PCI_CFG_PIIX4_PMMISC 0x80
-#define PCI_CFG_PIIX4_SMBBA 0x90
-
-
-#endif
diff --git a/board/mpl/common/usb_uhci.c b/board/mpl/common/usb_uhci.c
deleted file mode 100644
index 84c91c44b6..0000000000
--- a/board/mpl/common/usb_uhci.c
+++ /dev/null
@@ -1,1169 +0,0 @@
-/*
- * Part of this code has been derived from linux:
- * Universal Host Controller Interface driver for USB (take II).
- *
- * (c) 1999-2001 Georg Acher, acher@in.tum.de (executive slave) (base guitar)
- * Deti Fliegl, deti@fliegl.de (executive slave) (lead voice)
- * Thomas Sailer, sailer@ife.ee.ethz.ch (chief consultant) (cheer leader)
- * Roman Weissgaerber, weissg@vienna.at (virt root hub) (studio porter)
- * (c) 2000 Yggdrasil Computing, Inc. (port of new PCI interface support
- * from usb-ohci.c by Adam Richter, adam@yggdrasil.com).
- * (C) 2000 David Brownell, david-b@pacbell.net (usb-ohci.c)
- *
- * HW-initalization based on material of
- *
- * (C) Copyright 1999 Linus Torvalds
- * (C) Copyright 1999 Johannes Erdfelt
- * (C) Copyright 1999 Randy Dunlap
- * (C) Copyright 1999 Gregory P. Smith
- *
- *
- * Adapted for U-Boot:
- * (C) Copyright 2001 Denis Peter, MPL AG Switzerland
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- *
- */
-
-/**********************************************************************
- * How it works:
- * -------------
- * The framelist / Transfer descriptor / Queue Heads are similar like
- * in the linux usb_uhci.c.
- *
- * During initialization, the following skeleton is allocated in init_skel:
- *
- * framespecific | common chain
- *
- * framelist[]
- * [ 0 ]-----> TD ---------\
- * [ 1 ]-----> TD ----------> TD ------> QH -------> QH -------> QH ---> NULL
- * ... TD ---------/
- * [1023]-----> TD --------/
- *
- * ^^ ^^ ^^ ^^ ^^
- * 7 TDs for 1 TD for Start of Start of End Chain
- * INT (2-128ms) 1ms-INT CTRL Chain BULK Chain
- *
- *
- * Since this is a bootloader, the isochronous transfer descriptor have been removed.
- *
- * Interrupt Transfers.
- * --------------------
- * For Interupt transfers USB_MAX_TEMP_INT_TD Transfer descriptor are available. They
- * will be inserted after the appropriate (depending the interval setting) skeleton TD.
- * If an interrupt has been detected the dev->irqhandler is called. The status and number
- * of transfered bytes is stored in dev->irq_status resp. dev->irq_act_len. If the
- * dev->irqhandler returns 0, the interrupt TD is removed and disabled. If an 1 is returned,
- * the interrupt TD will be reactivated.
- *
- * Control Transfers
- * -----------------
- * Control Transfers are issued by filling the tmp_td with the appropriate data and connect
- * them to the qh_cntrl queue header. Before other control/bulk transfers can be issued,
- * the programm has to wait for completion. This does not allows asynchronous data transfer.
- *
- * Bulk Transfers
- * --------------
- * Bulk Transfers are issued by filling the tmp_td with the appropriate data and connect
- * them to the qh_bulk queue header. Before other control/bulk transfers can be issued,
- * the programm has to wait for completion. This does not allows asynchronous data transfer.
- *
- *
- */
-
-#include <common.h>
-#include <pci.h>
-
-#ifdef CONFIG_USB_UHCI
-
-#include <usb.h>
-#include "usb_uhci.h"
-
-#define USB_MAX_TEMP_TD 128 /* number of temporary TDs for bulk and control transfers */
-#define USB_MAX_TEMP_INT_TD 32 /* number of temporary TDs for Interrupt transfers */
-
-
-#undef USB_UHCI_DEBUG
-
-#ifdef USB_UHCI_DEBUG
-#define USB_UHCI_PRINTF(fmt,args...) printf (fmt ,##args)
-#else
-#define USB_UHCI_PRINTF(fmt,args...)
-#endif
-
-
-static int irqvec = -1; /* irq vector, if -1 uhci is stopped / reseted */
-unsigned int usb_base_addr; /* base address */
-
-static uhci_td_t td_int[8]; /* Interrupt Transfer descriptors */
-static uhci_qh_t qh_cntrl; /* control Queue Head */
-static uhci_qh_t qh_bulk; /* bulk Queue Head */
-static uhci_qh_t qh_end; /* end Queue Head */
-static uhci_td_t td_last; /* last TD (linked with end chain) */
-
-/* temporary tds */
-static uhci_td_t tmp_td[USB_MAX_TEMP_TD]; /* temporary bulk/control td's */
-static uhci_td_t tmp_int_td[USB_MAX_TEMP_INT_TD]; /* temporary interrupt td's */
-
-static unsigned long framelist[1024] __attribute__ ((aligned (0x1000))); /* frame list */
-
-static struct virt_root_hub rh; /* struct for root hub */
-
-/**********************************************************************
- * some forward decleration
- */
-int uhci_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
- void *buffer, int transfer_len,struct devrequest *setup);
-
-/* fill a td with the approproiate data. Link, status, info and buffer
- * are used by the USB controller itselfes, dev is used to identify the
- * "connected" device
- */
-void usb_fill_td(uhci_td_t* td,unsigned long link,unsigned long status,
- unsigned long info, unsigned long buffer, unsigned long dev)
-{
- td->link=swap_32(link);
- td->status=swap_32(status);
- td->info=swap_32(info);
- td->buffer=swap_32(buffer);
- td->dev_ptr=dev;
-}
-
-/* fill a qh with the approproiate data. Head and element are used by the USB controller
- * itselfes. As soon as a valid dev_ptr is filled, a td chain is connected to the qh.
- * Please note, that after completion of the td chain, the entry element is removed /
- * marked invalid by the USB controller.
- */
-void usb_fill_qh(uhci_qh_t* qh,unsigned long head,unsigned long element)
-{
- qh->head=swap_32(head);
- qh->element=swap_32(element);
- qh->dev_ptr=0L;
-}
-
-/* get the status of a td->status
- */
-unsigned long usb_uhci_td_stat(unsigned long status)
-{
- unsigned long result=0;
- result |= (status & TD_CTRL_NAK) ? USB_ST_NAK_REC : 0;
- result |= (status & TD_CTRL_STALLED) ? USB_ST_STALLED : 0;
- result |= (status & TD_CTRL_DBUFERR) ? USB_ST_BUF_ERR : 0;
- result |= (status & TD_CTRL_BABBLE) ? USB_ST_BABBLE_DET : 0;
- result |= (status & TD_CTRL_CRCTIMEO) ? USB_ST_CRC_ERR : 0;
- result |= (status & TD_CTRL_BITSTUFF) ? USB_ST_BIT_ERR : 0;
- result |= (status & TD_CTRL_ACTIVE) ? USB_ST_NOT_PROC : 0;
- return result;
-}
-
-/* get the status and the transfered len of a td chain.
- * called from the completion handler
- */
-int usb_get_td_status(uhci_td_t *td,struct usb_device *dev)
-{
- unsigned long temp,info;
- unsigned long stat;
- uhci_td_t *mytd=td;
-
- if(dev->devnum==rh.devnum)
- return 0;
- dev->act_len=0;
- stat=0;
- do {
- temp=swap_32((unsigned long)mytd->status);
- stat=usb_uhci_td_stat(temp);
- info=swap_32((unsigned long)mytd->info);
- if(((info & 0xff)!= USB_PID_SETUP) &&
- (((info >> 21) & 0x7ff)!= 0x7ff) &&
- (temp & 0x7FF)!=0x7ff)
- { /* if not setup and not null data pack */
- dev->act_len+=(temp & 0x7FF) + 1; /* the transfered len is act_len + 1 */
- }
- if(stat) { /* status no ok */
- dev->status=stat;
- return -1;
- }
- temp=swap_32((unsigned long)mytd->link);
- mytd=(uhci_td_t *)(temp & 0xfffffff0);
- }while((temp & 0x1)==0); /* process all TDs */
- dev->status=stat;
- return 0; /* Ok */
-}
-
-
-/*-------------------------------------------------------------------
- * LOW LEVEL STUFF
- * assembles QHs und TDs for control, bulk and iso
- *-------------------------------------------------------------------*/
-
-/* Submits a control message. That is a Setup, Data and Status transfer.
- * Routine does not wait for completion.
- */
-int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
- int transfer_len,struct devrequest *setup)
-{
- unsigned long destination, status;
- int maxsze = usb_maxpacket(dev, pipe);
- unsigned long dataptr;
- int len;
- int pktsze;
- int i=0;
-
- if (!maxsze) {
- USB_UHCI_PRINTF("uhci_submit_control_urb: pipesize for pipe %lx is zero\n", pipe);
- return -1;
- }
- if(((pipe>>8)&0x7f)==rh.devnum) {
- /* this is the root hub -> redirect it */
- return uhci_submit_rh_msg(dev,pipe,buffer,transfer_len,setup);
- }
- USB_UHCI_PRINTF("uhci_submit_control start len %x, maxsize %x\n",transfer_len,maxsze);
- /* The "pipe" thing contains the destination in bits 8--18 */
- destination = (pipe & PIPE_DEVEP_MASK) | USB_PID_SETUP; /* Setup stage */
- /* 3 errors */
- status = (pipe & TD_CTRL_LS) | TD_CTRL_ACTIVE | (3 << 27);
- /* (urb->transfer_flags & USB_DISABLE_SPD ? 0 : TD_CTRL_SPD); */
- /* Build the TD for the control request, try forever, 8 bytes of data */
- usb_fill_td(&tmp_td[i],UHCI_PTR_TERM ,status, destination | (7 << 21),(unsigned long)setup,(unsigned long)dev);
-#if 0
- {
- char *sp=(char *)setup;
- printf("SETUP to pipe %lx: %x %x %x %x %x %x %x %x\n", pipe,
- sp[0],sp[1],sp[2],sp[3],sp[4],sp[5],sp[6],sp[7]);
- }
-#endif
- dataptr = (unsigned long)buffer;
- len=transfer_len;
-
- /* If direction is "send", change the frame from SETUP (0x2D)
- to OUT (0xE1). Else change it from SETUP to IN (0x69). */
- destination = (pipe & PIPE_DEVEP_MASK) | ((pipe & USB_DIR_IN)==0 ? USB_PID_OUT : USB_PID_IN);
- while (len > 0) {
- /* data stage */
- pktsze = len;
- i++;
- if (pktsze > maxsze)
- pktsze = maxsze;
- destination ^= 1 << TD_TOKEN_TOGGLE; /* toggle DATA0/1 */
- usb_fill_td(&tmp_td[i],UHCI_PTR_TERM, status, destination | ((pktsze - 1) << 21),dataptr,(unsigned long)dev); /* Status, pktsze bytes of data */
- tmp_td[i-1].link=swap_32((unsigned long)&tmp_td[i]);
-
- dataptr += pktsze;
- len -= pktsze;
- }
-
- /* Build the final TD for control status */
- /* It's only IN if the pipe is out AND we aren't expecting data */
-
- destination &= ~UHCI_PID;
- if (((pipe & USB_DIR_IN)==0) || (transfer_len == 0))
- destination |= USB_PID_IN;
- else
- destination |= USB_PID_OUT;
- destination |= 1 << TD_TOKEN_TOGGLE; /* End in Data1 */
- i++;
- status &=~TD_CTRL_SPD;
- /* no limit on errors on final packet , 0 bytes of data */
- usb_fill_td(&tmp_td[i],UHCI_PTR_TERM, status | TD_CTRL_IOC, destination | (UHCI_NULL_DATA_SIZE << 21),0,(unsigned long)dev);
- tmp_td[i-1].link=swap_32((unsigned long)&tmp_td[i]); /* queue status td */
- /* usb_show_td(i+1);*/
- USB_UHCI_PRINTF("uhci_submit_control end (%d tmp_tds used)\n",i);
- /* first mark the control QH element terminated */
- qh_cntrl.element=0xffffffffL;
- /* set qh active */
- qh_cntrl.dev_ptr=(unsigned long)dev;
- /* fill in tmp_td_chain */
- qh_cntrl.element=swap_32((unsigned long)&tmp_td[0]);
- return 0;
-}
-
-/*-------------------------------------------------------------------
- * Prepare TDs for bulk transfers.
- */
-int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,int transfer_len)
-{
- unsigned long destination, status,info;
- unsigned long dataptr;
- int maxsze = usb_maxpacket(dev, pipe);
- int len;
- int i=0;
-
- if(transfer_len < 0) {
- printf("Negative transfer length in submit_bulk\n");
- return -1;
- }
- if (!maxsze)
- return -1;
- /* The "pipe" thing contains the destination in bits 8--18. */
- destination = (pipe & PIPE_DEVEP_MASK) | usb_packetid (pipe);
- /* 3 errors */
- status = (pipe & TD_CTRL_LS) | TD_CTRL_ACTIVE | (3 << 27);
- /* ((urb->transfer_flags & USB_DISABLE_SPD) ? 0 : TD_CTRL_SPD) | (3 << 27); */
- /* Build the TDs for the bulk request */
- len = transfer_len;
- dataptr = (unsigned long)buffer;
- do {
- int pktsze = len;
- if (pktsze > maxsze)
- pktsze = maxsze;
- /* pktsze bytes of data */
- info = destination | (((pktsze - 1)&UHCI_NULL_DATA_SIZE) << 21) |
- (usb_gettoggle (dev, usb_pipeendpoint (pipe), usb_pipeout (pipe)) << TD_TOKEN_TOGGLE);
-
- if((len-pktsze)==0)
- status |= TD_CTRL_IOC; /* last one generates INT */
-
- usb_fill_td(&tmp_td[i],UHCI_PTR_TERM, status, info,dataptr,(unsigned long)dev); /* Status, pktsze bytes of data */
- if(i>0)
- tmp_td[i-1].link=swap_32((unsigned long)&tmp_td[i]);
- i++;
- dataptr += pktsze;
- len -= pktsze;
- usb_dotoggle (dev, usb_pipeendpoint (pipe), usb_pipeout (pipe));
- } while (len > 0);
- /* first mark the bulk QH element terminated */
- qh_bulk.element=0xffffffffL;
- /* set qh active */
- qh_bulk.dev_ptr=(unsigned long)dev;
- /* fill in tmp_td_chain */
- qh_bulk.element=swap_32((unsigned long)&tmp_td[0]);
- return 0;
-}
-
-
-/* search a free interrupt td
- */
-uhci_td_t *uhci_alloc_int_td(void)
-{
- int i;
- for(i=0;i<USB_MAX_TEMP_INT_TD;i++) {
- if(tmp_int_td[i].dev_ptr==0) /* no device assigned -> free TD */
- return &tmp_int_td[i];
- }
- return NULL;
-}
-
-#if 0
-void uhci_show_temp_int_td(void)
-{
- int i;
- for(i=0;i<USB_MAX_TEMP_INT_TD;i++) {
- if((tmp_int_td[i].dev_ptr&0x01)!=0x1L) /* no device assigned -> free TD */
- printf("temp_td %d is assigned to dev %lx\n",i,tmp_int_td[i].dev_ptr);
- }
- printf("all others temp_tds are free\n");
-}
-#endif
-/*-------------------------------------------------------------------
- * submits USB interrupt (ie. polling ;-)
- */
-int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,int transfer_len, int interval)
-{
- int nint, n;
- unsigned long status, destination;
- unsigned long info,tmp;
- uhci_td_t *mytd;
- if (interval < 0 || interval >= 256)
- return -1;
-
- if (interval == 0)
- nint = 0;
- else {
- for (nint = 0, n = 1; nint <= 8; nint++, n += n) /* round interval down to 2^n */
- {
- if(interval < n) {
- interval = n / 2;
- break;
- }
- }
- nint--;
- }
-
- USB_UHCI_PRINTF("Rounded interval to %i, chain %i\n", interval, nint);
- mytd=uhci_alloc_int_td();
- if(mytd==NULL) {
- printf("No free INT TDs found\n");
- return -1;
- }
- status = (pipe & TD_CTRL_LS) | TD_CTRL_ACTIVE | TD_CTRL_IOC | (3 << 27);
-/* (urb->transfer_flags & USB_DISABLE_SPD ? 0 : TD_CTRL_SPD) | (3 << 27);
-*/
-
- destination =(pipe & PIPE_DEVEP_MASK) | usb_packetid (pipe) | (((transfer_len - 1) & 0x7ff) << 21);
-
- info = destination | (usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe)) << TD_TOKEN_TOGGLE);
- tmp = swap_32(td_int[nint].link);
- usb_fill_td(mytd,tmp,status, info,(unsigned long)buffer,(unsigned long)dev);
- /* Link it */
- tmp = swap_32((unsigned long)mytd);
- td_int[nint].link=tmp;
-
- usb_dotoggle (dev, usb_pipeendpoint (pipe), usb_pipeout (pipe));
-
- return 0;
-}
-
-/**********************************************************************
- * Low Level functions
- */
-
-
-void reset_hc(void)
-{
-
- /* Global reset for 100ms */
- out16r( usb_base_addr + USBPORTSC1,0x0204);
- out16r( usb_base_addr + USBPORTSC2,0x0204);
- out16r( usb_base_addr + USBCMD,USBCMD_GRESET | USBCMD_RS);
- /* Turn off all interrupts */
- out16r(usb_base_addr + USBINTR,0);
- wait_ms(50);
- out16r( usb_base_addr + USBCMD,0);
- wait_ms(10);
-}
-
-void start_hc(void)
-{
- int timeout = 1000;
-
- while(in16r(usb_base_addr + USBCMD) & USBCMD_HCRESET) {
- if (!--timeout) {
- printf("USBCMD_HCRESET timed out!\n");
- break;
- }
- }
- /* Turn on all interrupts */
- out16r(usb_base_addr + USBINTR,USBINTR_TIMEOUT | USBINTR_RESUME | USBINTR_IOC | USBINTR_SP);
- /* Start at frame 0 */
- out16r(usb_base_addr + USBFRNUM,0);
- /* set Framebuffer base address */
- out32r(usb_base_addr+USBFLBASEADD,(unsigned long)&framelist);
- /* Run and mark it configured with a 64-byte max packet */
- out16r(usb_base_addr + USBCMD,USBCMD_RS | USBCMD_CF | USBCMD_MAXP);
-}
-
-/* Initialize the skeleton
- */
-void usb_init_skel(void)
-{
- unsigned long temp;
- int n;
-
- for(n=0;n<USB_MAX_TEMP_INT_TD;n++)
- tmp_int_td[n].dev_ptr=0L; /* no devices connected */
- /* last td */
- usb_fill_td(&td_last,UHCI_PTR_TERM,TD_CTRL_IOC ,0,0,0L);
- /* usb_fill_td(&td_last,UHCI_PTR_TERM,0,0,0); */
- /* End Queue Header */
- usb_fill_qh(&qh_end,UHCI_PTR_TERM,(unsigned long)&td_last);
- /* Bulk Queue Header */
- temp=(unsigned long)&qh_end;
- usb_fill_qh(&qh_bulk,temp | UHCI_PTR_QH,UHCI_PTR_TERM);
- /* Control Queue Header */
- temp=(unsigned long)&qh_bulk;
- usb_fill_qh(&qh_cntrl, temp | UHCI_PTR_QH,UHCI_PTR_TERM);
- /* 1ms Interrupt td */
- temp=(unsigned long)&qh_cntrl;
- usb_fill_td(&td_int[0],temp | UHCI_PTR_QH,0,0,0,0L);
- temp=(unsigned long)&td_int[0];
- for(n=1; n<8; n++)
- usb_fill_td(&td_int[n],temp,0,0,0,0L);
- for (n = 0; n < 1024; n++) {
- /* link all framelist pointers to one of the interrupts */
- int m, o;
- if ((n&127)==127)
- framelist[n]= swap_32((unsigned long)&td_int[0]);
- else
- for (o = 1, m = 2; m <= 128; o++, m += m)
- if ((n & (m - 1)) == ((m - 1) / 2))
- framelist[n]= swap_32((unsigned long)&td_int[o]);
- }
-}
-
-/* check the common skeleton for completed transfers, and update the status
- * of the "connected" device. Called from the IRQ routine.
- */
-void usb_check_skel(void)
-{
- struct usb_device *dev;
- /* start with the control qh */
- if(qh_cntrl.dev_ptr!=0) /* it's a device assigned check if this caused IRQ */
- {
- dev=(struct usb_device *)qh_cntrl.dev_ptr;
- usb_get_td_status(&tmp_td[0],dev); /* update status */
- if(!(dev->status & USB_ST_NOT_PROC)) { /* is not active anymore, disconnect devices */
- qh_cntrl.dev_ptr=0;
- }
- }
- /* now process the bulk */
- if(qh_bulk.dev_ptr!=0) /* it's a device assigned check if this caused IRQ */
- {
- dev=(struct usb_device *)qh_bulk.dev_ptr;
- usb_get_td_status(&tmp_td[0],dev); /* update status */
- if(!(dev->status & USB_ST_NOT_PROC)) { /* is not active anymore, disconnect devices */
- qh_bulk.dev_ptr=0;
- }
- }
-}
-
-/* check the interrupt chain, ubdate the status of the appropriate device,
- * call the appropriate irqhandler and reactivate the TD if the irqhandler
- * returns with 1
- */
-void usb_check_int_chain(void)
-{
- int i,res;
- unsigned long link,status;
- struct usb_device *dev;
- uhci_td_t *td,*prevtd;
-
- for(i=0;i<8;i++) {
- prevtd=&td_int[i]; /* the first previous td is the skeleton td */
- link=swap_32(td_int[i].link) & 0xfffffff0; /* next in chain */
- td=(uhci_td_t *)link; /* assign it */
- /* all interrupt TDs are finally linked to the td_int[0].
- * so we process all until we find the td_int[0].
- * if int0 chain points to a QH, we're also done
- */
- while(((i>0) && (link != (unsigned long)&td_int[0])) ||
- ((i==0) && !(swap_32(td->link) & UHCI_PTR_QH)))
- {
- /* check if a device is assigned with this td */
- status=swap_32(td->status);
- if((td->dev_ptr!=0L) && !(status & TD_CTRL_ACTIVE)) {
- /* td is not active and a device is assigned -> call irqhandler */
- dev=(struct usb_device *)td->dev_ptr;
- dev->irq_act_len=((status & 0x7FF)==0x7FF) ? 0 : (status & 0x7FF) + 1; /* transfered length */
- dev->irq_status=usb_uhci_td_stat(status); /* get status */
- res=dev->irq_handle(dev); /* call irqhandler */
- if(res==1) {
- /* reactivate */
- status|=TD_CTRL_ACTIVE;
- td->status=swap_32(status);
- prevtd=td; /* previous td = this td */
- }
- else {
- prevtd->link=td->link; /* link previous td directly to the nex td -> unlinked */
- /* remove device pointer */
- td->dev_ptr=0L;
- }
- } /* if we call the irq handler */
- link=swap_32(td->link) & 0xfffffff0; /* next in chain */
- td=(uhci_td_t *)link; /* assign it */
- } /* process all td in this int chain */
- } /* next interrupt chain */
-}
-
-
-/* usb interrupt service routine.
- */
-void handle_usb_interrupt(void)
-{
- unsigned short status;
-
- /*
- * Read the interrupt status, and write it back to clear the
- * interrupt cause
- */
-
- status = in16r(usb_base_addr + USBSTS);
-
- if (!status) /* shared interrupt, not mine */
- return;
- if (status != 1) {
- /* remove host controller halted state */
- if ((status&0x20) && ((in16r(usb_base_addr+USBCMD) && USBCMD_RS)==0)) {
- out16r(usb_base_addr + USBCMD, USBCMD_RS | in16r(usb_base_addr + USBCMD));
- }
- }
- usb_check_int_chain(); /* call interrupt handlers for int tds */
- usb_check_skel(); /* call completion handler for common transfer routines */
- out16r(usb_base_addr+USBSTS,status);
-}
-
-
-/* init uhci
- */
-int usb_lowlevel_init(void)
-{
- unsigned char temp;
- int busdevfunc;
-
- busdevfunc=pci_find_device(USB_UHCI_VEND_ID,USB_UHCI_DEV_ID,0); /* get PCI Device ID */
- if(busdevfunc==-1) {
- printf("Error USB UHCI (%04X,%04X) not found\n",USB_UHCI_VEND_ID,USB_UHCI_DEV_ID);
- return -1;
- }
- pci_read_config_byte(busdevfunc,PCI_INTERRUPT_LINE,&temp);
- irqvec = temp;
- irq_free_handler(irqvec);
- USB_UHCI_PRINTF("Interrupt Line = %d, is %d\n",irqvec);
- pci_read_config_byte(busdevfunc,PCI_INTERRUPT_PIN,&temp);
- USB_UHCI_PRINTF("Interrupt Pin = %ld\n",temp);
- pci_read_config_dword(busdevfunc,PCI_BASE_ADDRESS_4,&usb_base_addr);
- USB_UHCI_PRINTF("IO Base Address = 0x%lx\n",usb_base_addr);
- usb_base_addr&=0xFFFFFFF0;
- usb_base_addr+=CFG_ISA_IO_BASE_ADDRESS;
- rh.devnum = 0;
- usb_init_skel();
- reset_hc();
- start_hc();
- irq_install_handler(irqvec, (interrupt_handler_t *)handle_usb_interrupt, NULL);
- return 0;
-}
-
-/* stop uhci
- */
-int usb_lowlevel_stop(void)
-{
- if(irqvec==-1)
- return 1;
- irq_free_handler(irqvec);
- reset_hc();
- irqvec=-1;
- return 0;
-}
-
-/*******************************************************************************************
- * Virtual Root Hub
- * Since the uhci does not have a real HUB, we simulate one ;-)
- */
-#undef USB_RH_DEBUG
-
-#ifdef USB_RH_DEBUG
-#define USB_RH_PRINTF(fmt,args...) printf (fmt ,##args)
-static void usb_display_wValue(unsigned short wValue,unsigned short wIndex);
-static void usb_display_Req(unsigned short req);
-#else
-#define USB_RH_PRINTF(fmt,args...)
-static void usb_display_wValue(unsigned short wValue,unsigned short wIndex) {}
-static void usb_display_Req(unsigned short req) {}
-#endif
-
-static unsigned char root_hub_dev_des[] =
-{
- 0x12, /* __u8 bLength; */
- 0x01, /* __u8 bDescriptorType; Device */
- 0x00, /* __u16 bcdUSB; v1.0 */
- 0x01,
- 0x09, /* __u8 bDeviceClass; HUB_CLASSCODE */
- 0x00, /* __u8 bDeviceSubClass; */
- 0x00, /* __u8 bDeviceProtocol; */
- 0x08, /* __u8 bMaxPacketSize0; 8 Bytes */
- 0x00, /* __u16 idVendor; */
- 0x00,
- 0x00, /* __u16 idProduct; */
- 0x00,
- 0x00, /* __u16 bcdDevice; */
- 0x00,
- 0x01, /* __u8 iManufacturer; */
- 0x00, /* __u8 iProduct; */
- 0x00, /* __u8 iSerialNumber; */
- 0x01 /* __u8 bNumConfigurations; */
-};
-
-
-/* Configuration descriptor */
-static unsigned char root_hub_config_des[] =
-{
- 0x09, /* __u8 bLength; */
- 0x02, /* __u8 bDescriptorType; Configuration */
- 0x19, /* __u16 wTotalLength; */
- 0x00,
- 0x01, /* __u8 bNumInterfaces; */
- 0x01, /* __u8 bConfigurationValue; */
- 0x00, /* __u8 iConfiguration; */
- 0x40, /* __u8 bmAttributes;
- Bit 7: Bus-powered, 6: Self-powered, 5 Remote-wakwup, 4..0: resvd */
- 0x00, /* __u8 MaxPower; */
-
- /* interface */
- 0x09, /* __u8 if_bLength; */
- 0x04, /* __u8 if_bDescriptorType; Interface */
- 0x00, /* __u8 if_bInterfaceNumber; */
- 0x00, /* __u8 if_bAlternateSetting; */
- 0x01, /* __u8 if_bNumEndpoints; */
- 0x09, /* __u8 if_bInterfaceClass; HUB_CLASSCODE */
- 0x00, /* __u8 if_bInterfaceSubClass; */
- 0x00, /* __u8 if_bInterfaceProtocol; */
- 0x00, /* __u8 if_iInterface; */
-
- /* endpoint */
- 0x07, /* __u8 ep_bLength; */
- 0x05, /* __u8 ep_bDescriptorType; Endpoint */
- 0x81, /* __u8 ep_bEndpointAddress; IN Endpoint 1 */
- 0x03, /* __u8 ep_bmAttributes; Interrupt */
- 0x08, /* __u16 ep_wMaxPacketSize; 8 Bytes */
- 0x00,
- 0xff /* __u8 ep_bInterval; 255 ms */
-};
-
-
-static unsigned char root_hub_hub_des[] =
-{
- 0x09, /* __u8 bLength; */
- 0x29, /* __u8 bDescriptorType; Hub-descriptor */
- 0x02, /* __u8 bNbrPorts; */
- 0x00, /* __u16 wHubCharacteristics; */
- 0x00,
- 0x01, /* __u8 bPwrOn2pwrGood; 2ms */
- 0x00, /* __u8 bHubContrCurrent; 0 mA */
- 0x00, /* __u8 DeviceRemovable; *** 7 Ports max *** */
- 0xff /* __u8 PortPwrCtrlMask; *** 7 ports max *** */
-};
-
-static unsigned char root_hub_str_index0[] =
-{
- 0x04, /* __u8 bLength; */
- 0x03, /* __u8 bDescriptorType; String-descriptor */
- 0x09, /* __u8 lang ID */
- 0x04, /* __u8 lang ID */
-};
-
-static unsigned char root_hub_str_index1[] =
-{
- 28, /* __u8 bLength; */
- 0x03, /* __u8 bDescriptorType; String-descriptor */
- 'U', /* __u8 Unicode */
- 0, /* __u8 Unicode */
- 'H', /* __u8 Unicode */
- 0, /* __u8 Unicode */
- 'C', /* __u8 Unicode */
- 0, /* __u8 Unicode */
- 'I', /* __u8 Unicode */
- 0, /* __u8 Unicode */
- ' ', /* __u8 Unicode */
- 0, /* __u8 Unicode */
- 'R', /* __u8 Unicode */
- 0, /* __u8 Unicode */
- 'o', /* __u8 Unicode */
- 0, /* __u8 Unicode */
- 'o', /* __u8 Unicode */
- 0, /* __u8 Unicode */
- 't', /* __u8 Unicode */
- 0, /* __u8 Unicode */
- ' ', /* __u8 Unicode */
- 0, /* __u8 Unicode */
- 'H', /* __u8 Unicode */
- 0, /* __u8 Unicode */
- 'u', /* __u8 Unicode */
- 0, /* __u8 Unicode */
- 'b', /* __u8 Unicode */
- 0, /* __u8 Unicode */
-};
-
-
-/*
- * Root Hub Control Pipe (interrupt Pipes are not supported)
- */
-
-
-int uhci_submit_rh_msg(struct usb_device *dev, unsigned long pipe, void *buffer,int transfer_len,struct devrequest *cmd)
-{
- void *data = buffer;
- int leni = transfer_len;
- int len = 0;
- int status = 0;
- int stat = 0;
- int i;
-
- unsigned short cstatus;
-
- unsigned short bmRType_bReq;
- unsigned short wValue;
- unsigned short wIndex;
- unsigned short wLength;
-
- if ((pipe & PIPE_INTERRUPT) == PIPE_INTERRUPT) {
- printf("Root-Hub submit IRQ: NOT implemented\n");
-#if 0
- uhci->rh.urb = urb;
- uhci->rh.send = 1;
- uhci->rh.interval = urb->interval;
- rh_init_int_timer (urb);
-#endif
- return 0;
- }
- bmRType_bReq = cmd->requesttype | cmd->request << 8;
- wValue = swap_16(cmd->value);
- wIndex = swap_16(cmd->index);
- wLength = swap_16(cmd->length);
- usb_display_Req(bmRType_bReq);
- for (i = 0; i < 8; i++)
- rh.c_p_r[i] = 0;
- USB_RH_PRINTF("Root-Hub: adr: %2x cmd(%1x): %02x%02x %04x %04x %04x\n",
- dev->devnum, 8, cmd->requesttype,cmd->request, wValue, wIndex, wLength);
-
- switch (bmRType_bReq) {
- /* Request Destination:
- without flags: Device,
- RH_INTERFACE: interface,
- RH_ENDPOINT: endpoint,
- RH_CLASS means HUB here,
- RH_OTHER | RH_CLASS almost ever means HUB_PORT here
- */
-
- case RH_GET_STATUS:
- *(unsigned short *) data = swap_16(1);
- len=2;
- break;
- case RH_GET_STATUS | RH_INTERFACE:
- *(unsigned short *) data = swap_16(0);
- len=2;
- break;
- case RH_GET_STATUS | RH_ENDPOINT:
- *(unsigned short *) data = swap_16(0);
- len=2;
- break;
- case RH_GET_STATUS | RH_CLASS:
- *(unsigned long *) data = swap_32(0);
- len=4;
- break; /* hub power ** */
- case RH_GET_STATUS | RH_OTHER | RH_CLASS:
-
- status = in16r(usb_base_addr + USBPORTSC1 + 2 * (wIndex - 1));
- cstatus = ((status & USBPORTSC_CSC) >> (1 - 0)) |
- ((status & USBPORTSC_PEC) >> (3 - 1)) |
- (rh.c_p_r[wIndex - 1] << (0 + 4));
- status = (status & USBPORTSC_CCS) |
- ((status & USBPORTSC_PE) >> (2 - 1)) |
- ((status & USBPORTSC_SUSP) >> (12 - 2)) |
- ((status & USBPORTSC_PR) >> (9 - 4)) |
- (1 << 8) | /* power on ** */
- ((status & USBPORTSC_LSDA) << (-8 + 9));
-
- *(unsigned short *) data = swap_16(status);
- *(unsigned short *) (data + 2) = swap_16(cstatus);
- len=4;
- break;
- case RH_CLEAR_FEATURE | RH_ENDPOINT:
- switch (wValue) {
- case (RH_ENDPOINT_STALL):
- len=0;
- break;
- }
- break;
-
- case RH_CLEAR_FEATURE | RH_CLASS:
- switch (wValue) {
- case (RH_C_HUB_OVER_CURRENT):
- len=0; /* hub power over current ** */
- break;
- }
- break;
-
- case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
- usb_display_wValue(wValue,wIndex);
- switch (wValue) {
- case (RH_PORT_ENABLE):
- status = in16r(usb_base_addr+USBPORTSC1+2*(wIndex-1));
- status = (status & 0xfff5) & ~USBPORTSC_PE;
- out16r(usb_base_addr+USBPORTSC1+2*(wIndex-1),status);
- len=0;
- break;
- case (RH_PORT_SUSPEND):
- status = in16r(usb_base_addr+USBPORTSC1+2*(wIndex-1));
- status = (status & 0xfff5) & ~USBPORTSC_SUSP;
- out16r(usb_base_addr+USBPORTSC1+2*(wIndex-1),status);
- len=0;
- break;
- case (RH_PORT_POWER):
- len=0; /* port power ** */
- break;
- case (RH_C_PORT_CONNECTION):
- status = in16r(usb_base_addr+USBPORTSC1+2*(wIndex-1));
- status = (status & 0xfff5) | USBPORTSC_CSC;
- out16r(usb_base_addr+USBPORTSC1+2*(wIndex-1),status);
- len=0;
- break;
- case (RH_C_PORT_ENABLE):
- status = in16r(usb_base_addr+USBPORTSC1+2*(wIndex-1));
- status = (status & 0xfff5) | USBPORTSC_PEC;
- out16r(usb_base_addr+USBPORTSC1+2*(wIndex-1),status);
- len=0;
- break;
- case (RH_C_PORT_SUSPEND):
-/*** WR_RH_PORTSTAT(RH_PS_PSSC); */
- len=0;
- break;
- case (RH_C_PORT_OVER_CURRENT):
- len=0;
- break;
- case (RH_C_PORT_RESET):
- rh.c_p_r[wIndex - 1] = 0;
- len=0;
- break;
- }
- break;
- case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
- usb_display_wValue(wValue,wIndex);
- switch (wValue) {
- case (RH_PORT_SUSPEND):
- status = in16r(usb_base_addr+USBPORTSC1+2*(wIndex-1));
- status = (status & 0xfff5) | USBPORTSC_SUSP;
- out16r(usb_base_addr+USBPORTSC1+2*(wIndex-1),status);
- len=0;
- break;
- case (RH_PORT_RESET):
- status = in16r(usb_base_addr+USBPORTSC1+2*(wIndex-1));
- status = (status & 0xfff5) | USBPORTSC_PR;
- out16r(usb_base_addr+USBPORTSC1+2*(wIndex-1),status);
- wait_ms(10);
- status = (status & 0xfff5) & ~USBPORTSC_PR;
- out16r(usb_base_addr+USBPORTSC1+2*(wIndex-1),status);
- udelay(10);
- status = (status & 0xfff5) | USBPORTSC_PE;
- out16r(usb_base_addr+USBPORTSC1+2*(wIndex-1),status);
- wait_ms(10);
- status = (status & 0xfff5) | 0xa;
- out16r(usb_base_addr+USBPORTSC1+2*(wIndex-1),status);
- len=0;
- break;
- case (RH_PORT_POWER):
- len=0; /* port power ** */
- break;
- case (RH_PORT_ENABLE):
- status = in16r(usb_base_addr+USBPORTSC1+2*(wIndex-1));
- status = (status & 0xfff5) | USBPORTSC_PE;
- out16r(usb_base_addr+USBPORTSC1+2*(wIndex-1),status);
- len=0;
- break;
- }
- break;
-
- case RH_SET_ADDRESS:
- rh.devnum = wValue;
- len=0;
- break;
- case RH_GET_DESCRIPTOR:
- switch ((wValue & 0xff00) >> 8) {
- case (0x01): /* device descriptor */
- i=sizeof(root_hub_config_des);
- status=i > wLength ? wLength : i;
- len = leni > status ? status : leni;
- memcpy (data, root_hub_dev_des, len);
- break;
- case (0x02): /* configuration descriptor */
- i=sizeof(root_hub_config_des);
- status=i > wLength ? wLength : i;
- len = leni > status ? status : leni;
- memcpy (data, root_hub_config_des, len);
- break;
- case (0x03): /*string descriptors */
- if(wValue==0x0300) {
- i=sizeof(root_hub_str_index0);
- status = i > wLength ? wLength : i;
- len = leni > status ? status : leni;
- memcpy (data, root_hub_str_index0, len);
- break;
- }
- if(wValue==0x0301) {
- i=sizeof(root_hub_str_index1);
- status = i > wLength ? wLength : i;
- len = leni > status ? status : leni;
- memcpy (data, root_hub_str_index1, len);
- break;
- }
- stat = USB_ST_STALLED;
- }
- break;
-
- case RH_GET_DESCRIPTOR | RH_CLASS:
- root_hub_hub_des[2] = 2;
- i=sizeof(root_hub_hub_des);
- status= i > wLength ? wLength : i;
- len = leni > status ? status : leni;
- memcpy (data, root_hub_hub_des, len);
- break;
- case RH_GET_CONFIGURATION:
- *(unsigned char *) data = 0x01;
- len = 1;
- break;
- case RH_SET_CONFIGURATION:
- len=0;
- break;
- default:
- stat = USB_ST_STALLED;
- }
- USB_RH_PRINTF("Root-Hub stat %lx port1: %x port2: %x\n\n",stat,
- in16r(usb_base_addr + USBPORTSC1), in16r(usb_base_addr + USBPORTSC2));
- dev->act_len=len;
- dev->status=stat;
- return stat;
-
-}
-
-/********************************************************************************
- * Some Debug Routines
- */
-
-#ifdef USB_RH_DEBUG
-
-static void usb_display_Req(unsigned short req)
-{
- USB_RH_PRINTF("- Root-Hub Request: ");
- switch (req) {
- case RH_GET_STATUS:
- USB_RH_PRINTF("Get Status ");
- break;
- case RH_GET_STATUS | RH_INTERFACE:
- USB_RH_PRINTF("Get Status Interface ");
- break;
- case RH_GET_STATUS | RH_ENDPOINT:
- USB_RH_PRINTF("Get Status Endpoint ");
- break;
- case RH_GET_STATUS | RH_CLASS:
- USB_RH_PRINTF("Get Status Class");
- break; /* hub power ** */
- case RH_GET_STATUS | RH_OTHER | RH_CLASS:
- USB_RH_PRINTF("Get Status Class Others");
- break;
- case RH_CLEAR_FEATURE | RH_ENDPOINT:
- USB_RH_PRINTF("Clear Feature Endpoint ");
- break;
- case RH_CLEAR_FEATURE | RH_CLASS:
- USB_RH_PRINTF("Clear Feature Class ");
- break;
- case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
- USB_RH_PRINTF("Clear Feature Other Class ");
- break;
- case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
- USB_RH_PRINTF("Set Feature Other Class ");
- break;
- case RH_SET_ADDRESS:
- USB_RH_PRINTF("Set Address ");
- break;
- case RH_GET_DESCRIPTOR:
- USB_RH_PRINTF("Get Descriptor ");
- break;
- case RH_GET_DESCRIPTOR | RH_CLASS:
- USB_RH_PRINTF("Get Descriptor Class ");
- break;
- case RH_GET_CONFIGURATION:
- USB_RH_PRINTF("Get Configuration ");
- break;
- case RH_SET_CONFIGURATION:
- USB_RH_PRINTF("Get Configuration ");
- break;
- default:
- USB_RH_PRINTF("****UNKNOWN**** 0x%04X ",req);
- }
- USB_RH_PRINTF("\n");
-
-}
-
-static void usb_display_wValue(unsigned short wValue,unsigned short wIndex)
-{
- switch (wValue) {
- case (RH_PORT_ENABLE):
- USB_RH_PRINTF("Root-Hub: Enable Port %d\n",wIndex);
- break;
- case (RH_PORT_SUSPEND):
- USB_RH_PRINTF("Root-Hub: Suspend Port %d\n",wIndex);
- break;
- case (RH_PORT_POWER):
- USB_RH_PRINTF("Root-Hub: Port Power %d\n",wIndex);
- break;
- case (RH_C_PORT_CONNECTION):
- USB_RH_PRINTF("Root-Hub: C Port Connection Port %d\n",wIndex);
- break;
- case (RH_C_PORT_ENABLE):
- USB_RH_PRINTF("Root-Hub: C Port Enable Port %d\n",wIndex);
- break;
- case (RH_C_PORT_SUSPEND):
- USB_RH_PRINTF("Root-Hub: C Port Suspend Port %d\n",wIndex);
- break;
- case (RH_C_PORT_OVER_CURRENT):
- USB_RH_PRINTF("Root-Hub: C Port Over Current Port %d\n",wIndex);
- break;
- case (RH_C_PORT_RESET):
- USB_RH_PRINTF("Root-Hub: C Port reset Port %d\n",wIndex);
- break;
- default:
- USB_RH_PRINTF("Root-Hub: unknown %x %x\n",wValue,wIndex);
- break;
- }
-}
-
-#endif
-
-
-#ifdef USB_UHCI_DEBUG
-
-static int usb_display_td(uhci_td_t *td)
-{
- unsigned long tmp;
- int valid;
-
- printf("TD at %p:\n",td);
-
- tmp=swap_32(td->link);
- printf("Link points to 0x%08lX, %s first, %s, %s\n",tmp&0xfffffff0,
- ((tmp & 0x4)==0x4) ? "Depth" : "Breath",
- ((tmp & 0x2)==0x2) ? "QH" : "TD",
- ((tmp & 0x1)==0x1) ? "invalid" : "valid");
- valid=((tmp & 0x1)==0x0);
- tmp=swap_32(td->status);
- printf(" %s %ld Errors %s %s %s \n %s %s %s %s %s %s\n Len 0x%lX\n",
- (((tmp>>29)&0x1)==0x1) ? "SPD Enable" : "SPD Disable",
- ((tmp>>28)&0x3),
- (((tmp>>26)&0x1)==0x1) ? "Low Speed" : "Full Speed",
- (((tmp>>25)&0x1)==0x1) ? "ISO " : "",
- (((tmp>>24)&0x1)==0x1) ? "IOC " : "",
- (((tmp>>23)&0x1)==0x1) ? "Active " : "Inactive ",
- (((tmp>>22)&0x1)==0x1) ? "Stalled" : "",
- (((tmp>>21)&0x1)==0x1) ? "Data Buffer Error" : "",
- (((tmp>>20)&0x1)==0x1) ? "Babble" : "",
- (((tmp>>19)&0x1)==0x1) ? "NAK" : "",
- (((tmp>>18)&0x1)==0x1) ? "Bitstuff Error" : "",
- (tmp&0x7ff));
- tmp=swap_32(td->info);
- printf(" MaxLen 0x%lX\n",((tmp>>21)&0x7FF));
- printf(" %s Endpoint 0x%lX Dev Addr 0x%lX PID 0x%lX\n",((tmp>>19)&0x1)==0x1 ? "TOGGLE" : "",
- ((tmp>>15)&0xF),((tmp>>8)&0x7F),tmp&0xFF);
- tmp=swap_32(td->buffer);
- printf(" Buffer 0x%08lX\n",tmp);
- printf(" DEV %08lX\n",td->dev_ptr);
- return valid;
-}
-
-
-void usb_show_td(int max)
-{
- int i;
- if(max>0) {
- for(i=0;i<max;i++) {
- usb_display_td(&tmp_td[i]);
- }
- }
- else {
- i=0;
- do {
- printf("tmp_td[%d]\n",i);
- }while(usb_display_td(&tmp_td[i++]));
- }
-}
-
-
-#endif
-#endif /* CONFIG_USB_UHCI */
-
-/* EOF */
diff --git a/board/mpl/common/usb_uhci.h b/board/mpl/common/usb_uhci.h
deleted file mode 100644
index af8083751e..0000000000
--- a/board/mpl/common/usb_uhci.h
+++ /dev/null
@@ -1,188 +0,0 @@
-/*
- * (C) Copyright 2001
- * Denis Peter, MPL AG Switzerland
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- * Note: Part of this code has been derived from linux
- *
- */
-#ifndef _USB_UHCI_H_
-#define _USB_UHCI_H_
-
-
-/* Command register */
-#define USBCMD 0
-#define USBCMD_RS 0x0001 /* Run/Stop */
-#define USBCMD_HCRESET 0x0002 /* Host reset */
-#define USBCMD_GRESET 0x0004 /* Global reset */
-#define USBCMD_EGSM 0x0008 /* Global Suspend Mode */
-#define USBCMD_FGR 0x0010 /* Force Global Resume */
-#define USBCMD_SWDBG 0x0020 /* SW Debug mode */
-#define USBCMD_CF 0x0040 /* Config Flag (sw only) */
-#define USBCMD_MAXP 0x0080 /* Max Packet (0 = 32, 1 = 64) */
-
-/* Status register */
-#define USBSTS 2
-#define USBSTS_USBINT 0x0001 /* Interrupt due to IOC */
-#define USBSTS_ERROR 0x0002 /* Interrupt due to error */
-#define USBSTS_RD 0x0004 /* Resume Detect */
-#define USBSTS_HSE 0x0008 /* Host System Error - basically PCI problems */
-#define USBSTS_HCPE 0x0010 /* Host Controller Process Error - the scripts were buggy */
-#define USBSTS_HCH 0x0020 /* HC Halted */
-
-/* Interrupt enable register */
-#define USBINTR 4
-#define USBINTR_TIMEOUT 0x0001 /* Timeout/CRC error enable */
-#define USBINTR_RESUME 0x0002 /* Resume interrupt enable */
-#define USBINTR_IOC 0x0004 /* Interrupt On Complete enable */
-#define USBINTR_SP 0x0008 /* Short packet interrupt enable */
-
-#define USBFRNUM 6
-#define USBFLBASEADD 8
-#define USBSOF 12
-
-/* USB port status and control registers */
-#define USBPORTSC1 16
-#define USBPORTSC2 18
-#define USBPORTSC_CCS 0x0001 /* Current Connect Status ("device present") */
-#define USBPORTSC_CSC 0x0002 /* Connect Status Change */
-#define USBPORTSC_PE 0x0004 /* Port Enable */
-#define USBPORTSC_PEC 0x0008 /* Port Enable Change */
-#define USBPORTSC_LS 0x0030 /* Line Status */
-#define USBPORTSC_RD 0x0040 /* Resume Detect */
-#define USBPORTSC_LSDA 0x0100 /* Low Speed Device Attached */
-#define USBPORTSC_PR 0x0200 /* Port Reset */
-#define USBPORTSC_SUSP 0x1000 /* Suspend */
-
-/* Legacy support register */
-#define USBLEGSUP 0xc0
-#define USBLEGSUP_DEFAULT 0x2000 /* only PIRQ enable set */
-
-#define UHCI_NULL_DATA_SIZE 0x7ff /* for UHCI controller TD */
-#define UHCI_PID 0xff /* PID MASK */
-
-#define UHCI_PTR_BITS 0x000F
-#define UHCI_PTR_TERM 0x0001
-#define UHCI_PTR_QH 0x0002
-#define UHCI_PTR_DEPTH 0x0004
-
-/* for TD <status>: */
-#define TD_CTRL_SPD (1 << 29) /* Short Packet Detect */
-#define TD_CTRL_C_ERR_MASK (3 << 27) /* Error Counter bits */
-#define TD_CTRL_LS (1 << 26) /* Low Speed Device */
-#define TD_CTRL_IOS (1 << 25) /* Isochronous Select */
-#define TD_CTRL_IOC (1 << 24) /* Interrupt on Complete */
-#define TD_CTRL_ACTIVE (1 << 23) /* TD Active */
-#define TD_CTRL_STALLED (1 << 22) /* TD Stalled */
-#define TD_CTRL_DBUFERR (1 << 21) /* Data Buffer Error */
-#define TD_CTRL_BABBLE (1 << 20) /* Babble Detected */
-#define TD_CTRL_NAK (1 << 19) /* NAK Received */
-#define TD_CTRL_CRCTIMEO (1 << 18) /* CRC/Time Out Error */
-#define TD_CTRL_BITSTUFF (1 << 17) /* Bit Stuff Error */
-#define TD_CTRL_ACTLEN_MASK 0x7ff /* actual length, encoded as n - 1 */
-
-#define TD_CTRL_ANY_ERROR (TD_CTRL_STALLED | TD_CTRL_DBUFERR | \
- TD_CTRL_BABBLE | TD_CTRL_CRCTIME | TD_CTRL_BITSTUFF)
-
-#define TD_TOKEN_TOGGLE 19
-
-/* ------------------------------------------------------------------------------------
- Virtual Root HUB
- ------------------------------------------------------------------------------------ */
-/* destination of request */
-#define RH_INTERFACE 0x01
-#define RH_ENDPOINT 0x02
-#define RH_OTHER 0x03
-
-#define RH_CLASS 0x20
-#define RH_VENDOR 0x40
-
-/* Requests: bRequest << 8 | bmRequestType */
-#define RH_GET_STATUS 0x0080
-#define RH_CLEAR_FEATURE 0x0100
-#define RH_SET_FEATURE 0x0300
-#define RH_SET_ADDRESS 0x0500
-#define RH_GET_DESCRIPTOR 0x0680
-#define RH_SET_DESCRIPTOR 0x0700
-#define RH_GET_CONFIGURATION 0x0880
-#define RH_SET_CONFIGURATION 0x0900
-#define RH_GET_STATE 0x0280
-#define RH_GET_INTERFACE 0x0A80
-#define RH_SET_INTERFACE 0x0B00
-#define RH_SYNC_FRAME 0x0C80
-/* Our Vendor Specific Request */
-#define RH_SET_EP 0x2000
-
-/* Hub port features */
-#define RH_PORT_CONNECTION 0x00
-#define RH_PORT_ENABLE 0x01
-#define RH_PORT_SUSPEND 0x02
-#define RH_PORT_OVER_CURRENT 0x03
-#define RH_PORT_RESET 0x04
-#define RH_PORT_POWER 0x08
-#define RH_PORT_LOW_SPEED 0x09
-#define RH_C_PORT_CONNECTION 0x10
-#define RH_C_PORT_ENABLE 0x11
-#define RH_C_PORT_SUSPEND 0x12
-#define RH_C_PORT_OVER_CURRENT 0x13
-#define RH_C_PORT_RESET 0x14
-
-/* Hub features */
-#define RH_C_HUB_LOCAL_POWER 0x00
-#define RH_C_HUB_OVER_CURRENT 0x01
-
-#define RH_DEVICE_REMOTE_WAKEUP 0x00
-#define RH_ENDPOINT_STALL 0x01
-
-/* Our Vendor Specific feature */
-#define RH_REMOVE_EP 0x00
-
-
-#define RH_ACK 0x01
-#define RH_REQ_ERR -1
-#define RH_NACK 0x00
-
-
-/* Transfer descriptor structure */
-typedef struct {
- unsigned long link; /* next td/qh (LE)*/
- unsigned long status; /* status of the td */
- unsigned long info; /* Max Lenght / Endpoint / device address and PID */
- unsigned long buffer; /* pointer to data buffer (LE) */
- unsigned long dev_ptr; /* pointer to the assigned device (BE) */
- unsigned long res[3]; /* reserved (TDs must be 8Byte aligned) */
-} uhci_td_t, *puhci_td_t;
-
-/* Queue Header structure */
-typedef struct {
- unsigned long head; /* Next QH (LE)*/
- unsigned long element; /* Queue element pointer (LE) */
- unsigned long res[5]; /* reserved */
- unsigned long dev_ptr; /* if 0 no tds have been assigned to this qh */
-} uhci_qh_t, *puhci_qh_t;
-
-struct virt_root_hub {
- int devnum; /* Address of Root Hub endpoint */
- int numports; /* number of ports */
- int c_p_r[8]; /* C_PORT_RESET */
-};
-
-
-#endif /* _USB_UHCI_H_ */
diff --git a/board/mpl/mip405/Makefile b/board/mpl/mip405/Makefile
deleted file mode 100644
index 9276f64ff8..0000000000
--- a/board/mpl/mip405/Makefile
+++ /dev/null
@@ -1,49 +0,0 @@
-#
-# (C) Copyright 2000, 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o ../common/flash.o cmd_mip405.o ../common/pci.o \
- ../common/usb_uhci.o ../common/memtst.o ../common/common_util.o
-
-SOBJS = init.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/mpl/mip405/cmd_mip405.c b/board/mpl/mip405/cmd_mip405.c
deleted file mode 100644
index 6fbc5859c0..0000000000
--- a/board/mpl/mip405/cmd_mip405.c
+++ /dev/null
@@ -1,66 +0,0 @@
-/*
- * (C) Copyright 2001
- * Denis Peter, MPL AG Switzerland, d.peter@mpl.ch
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- * hacked for MIP405
- */
-
-#include <common.h>
-#include <command.h>
-#include "mip405.h"
-#include "../common/common_util.h"
-
-
-extern void print_mip405_info(void);
-extern int do_mplcommon(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
-
-
-/* ------------------------------------------------------------------------- */
-
-int do_mip405(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
-
- ulong led_on;
-
- if (strcmp(argv[1], "info") == 0)
- {
- print_mip405_info();
- return 0;
- }
- if (strcmp(argv[1], "led") == 0)
- {
- led_on = (ulong)simple_strtoul(argv[2], NULL, 10);
- user_led0(led_on);
- return 0;
- }
- return (do_mplcommon(cmdtp, flag, argc, argv));
-}
-U_BOOT_CMD(
- mip405, 8, 1, do_mip405,
- "mip405 - MIP405 specific Cmds\n",
- "flash mem [SrcAddr] - updates U-Boot with image in memory\n"
- "mip405 flash mps - updates U-Boot with image from MPS\n"
- "mip405 info - displays board information\n"
- "mip405 led <on> - switches LED on (on=1) or off (on=0)\n"
- "mip405 mem [cnt] - Memory Test <cnt>-times, <cnt> = -1 loop forever\n"
-);
-
-/* ------------------------------------------------------------------------- */
diff --git a/board/mpl/mip405/config.mk b/board/mpl/mip405/config.mk
deleted file mode 100644
index 0f8d153d8e..0000000000
--- a/board/mpl/mip405/config.mk
+++ /dev/null
@@ -1,29 +0,0 @@
-#
-# (C) Copyright 2000, 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# esd ADCIOP boards
-#
-
-#TEXT_BASE = 0xFFFE0000
-TEXT_BASE = 0xFFF80000
diff --git a/board/mpl/mip405/init.S b/board/mpl/mip405/init.S
deleted file mode 100644
index 3351b5b840..0000000000
--- a/board/mpl/mip405/init.S
+++ /dev/null
@@ -1,233 +0,0 @@
-/*------------------------------------------------------------------------------+
- *
- * This source code has been made available to you by IBM on an AS-IS
- * basis. Anyone receiving this source is licensed under IBM
- * copyrights to use it in any way he or she deems fit, including
- * copying it, modifying it, compiling it, and redistributing it either
- * with or without modifications. No license under IBM patents or
- * patent applications is to be implied by the copyright license.
- *
- * Any user of this software should understand that IBM cannot provide
- * technical support for this software and will not be responsible for
- * any consequences resulting from the use of this software.
- *
- * Any person who transfers this source code or any derivative work
- * must include the IBM copyright notice, this paragraph, and the
- * preceding two paragraphs in the transferred software.
- *
- * COPYRIGHT I B M CORPORATION 1995
- * LICENSED MATERIAL - PROGRAM PROPERTY OF I B M
- *-------------------------------------------------------------------------------*/
-
-/*-----------------------------------------------------------------------------
- * Function: ext_bus_cntlr_init
- * Description: Initializes the External Bus Controller for the external
- * peripherals. IMPORTANT: For pass1 this code must run from
- * cache since you can not reliably change a peripheral banks
- * timing register (pbxap) while running code from that bank.
- * For ex., since we are running from ROM on bank 0, we can NOT
- * execute the code that modifies bank 0 timings from ROM, so
- * we run it from cache.
- * Bank 0 - Flash or Multi Purpose Socket
- * Bank 1 - Multi Purpose Socket or Flash (set in C-Code)
- * Bank 2 - UART 1 (set in C-Code)
- * Bank 3 - UART 2 (set in C-Code)
- * Bank 4 - not used
- * Bank 5 - not used
- * Bank 6 - not used
- * Bank 7 - PLD Register
- *-----------------------------------------------------------------------------*/
-#include <ppc4xx.h>
-
-#define _LINUX_CONFIG_H 1 /* avoid reading Linux autoconf.h file */
-
-#include <configs/MIP405.h>
-#include <ppc_asm.tmpl>
-#include <ppc_defs.h>
-
-#include <asm/cache.h>
-#include <asm/mmu.h>
-#include "mip405.h"
-
-
- .globl ext_bus_cntlr_init
-ext_bus_cntlr_init:
- mflr r4 /* save link register */
- mfdcr r3,strap /* get strapping reg */
- andi. r0, r3, PSR_ROM_LOC /* mask out irrelevant bits */
- bnelr /* jump back if PCI boot */
-
- bl ..getAddr
-..getAddr:
- mflr r3 /* get address of ..getAddr */
- mtlr r4 /* restore link register */
- addi r4,0,14 /* set ctr to 14; used to prefetch */
- mtctr r4 /* 14 cache lines to fit this function */
- /* in cache (gives us 8x14=112 instrctns) */
-..ebcloop:
- icbt r0,r3 /* prefetch cache line for addr in r3 */
- addi r3,r3,32 /* move to next cache line */
- bdnz ..ebcloop /* continue for 14 cache lines */
-
- /*-------------------------------------------------------------------
- * Delay to ensure all accesses to ROM are complete before changing
- * bank 0 timings.
- *------------------------------------------------------------------- */
- addis r3,0,0x0
- ori r3,r3,0xA000
- mtctr r3
-..spinlp:
- bdnz ..spinlp /* spin loop */
-
- /*-----------------------------------------------------------------------
- * decide boot up mode
- *----------------------------------------------------------------------- */
- addi r4,0,pb0cr
- mtdcr ebccfga,r4
- mfdcr r4,ebccfgd
-
- andi. r0, r4, 0x2000 /* mask out irrelevant bits */
- beq 0f /* jump if 8 bit bus width */
-
- /* setup 16 bit things
- *-----------------------------------------------------------------------
- * Memory Bank 0 (16 Bit Flash) initialization
- *---------------------------------------------------------------------- */
-
- addi r4,0,pb0ap
- mtdcr ebccfga,r4
- addis r4,0,(FLASH_AP_B)@h
- ori r4,r4,(FLASH_AP_B)@l
- mtdcr ebccfgd,r4
-
- addi r4,0,pb0cr
- mtdcr ebccfga,r4
- /* BS=0x010(4MB),BU=0x3(R/W), */
- addis r4,0,(FLASH_CR_B)@h
- ori r4,r4,(FLASH_CR_B)@l
- mtdcr ebccfgd,r4
- b 1f
-
-0:
-
- /* 8Bit boot mode: */
- /*-----------------------------------------------------------------------
- * Memory Bank 0 Multi Purpose Socket initialization
- *----------------------------------------------------------------------- */
- /* 0x7F8FFE80 slowest boot */
- addi r4,0,pb0ap
- mtdcr ebccfga,r4
- addis r4,0,(MPS_AP_B)@h
- ori r4,r4,(MPS_AP_B)@l
- mtdcr ebccfgd,r4
-
- addi r4,0,pb0cr
- mtdcr ebccfga,r4
- /* BS=0x010(4MB),BU=0x3(R/W), */
- addis r4,0,(MPS_CR_B)@h
- ori r4,r4,(MPS_CR_B)@l
-
- mtdcr ebccfgd,r4
-
-
-1:
- /*-----------------------------------------------------------------------
- * Memory Bank 2-3-4-5-6 (not used) initialization
- *-----------------------------------------------------------------------*/
- addi r4,0,pb1cr
- mtdcr ebccfga,r4
- addis r4,0,0x0000
- ori r4,r4,0x0000
- mtdcr ebccfgd,r4
-
- addi r4,0,pb2cr
- mtdcr ebccfga,r4
- addis r4,0,0x0000
- ori r4,r4,0x0000
- mtdcr ebccfgd,r4
-
- addi r4,0,pb3cr
- mtdcr ebccfga,r4
- addis r4,0,0x0000
- ori r4,r4,0x0000
- mtdcr ebccfgd,r4
-
- addi r4,0,pb4cr
- mtdcr ebccfga,r4
- addis r4,0,0x0000
- ori r4,r4,0x0000
- mtdcr ebccfgd,r4
-
- addi r4,0,pb5cr
- mtdcr ebccfga,r4
- addis r4,0,0x0000
- ori r4,r4,0x0000
- mtdcr ebccfgd,r4
-
- addi r4,0,pb6cr
- mtdcr ebccfga,r4
- addis r4,0,0x0000
- ori r4,r4,0x0000
- mtdcr ebccfgd,r4
-
- addi r4,0,pb7cr
- mtdcr ebccfga,r4
- addis r4,0,0x0000
- ori r4,r4,0x0000
- mtdcr ebccfgd,r4
- nop /* pass2 DCR errata #8 */
- blr
-
-/*-----------------------------------------------------------------------------
- * Function: sdram_init
- * Description: Configures the internal SRAM memory. and setup the
- * Stackpointer in it.
- *----------------------------------------------------------------------------- */
- .globl sdram_init
-
-sdram_init:
-
-
- blr
-
-
-#if defined(CONFIG_BOOT_PCI)
- .section .bootpg,"ax"
- .globl _start_pci
-/*******************************************
- */
-
-_start_pci:
- /* first handle errata #68 / PCI_18 */
- iccci r0, r0 /* invalidate I-cache */
- lis r31, 0
- mticcr r31 /* ICCR = 0 (all uncachable) */
- isync
-
- mfccr0 r28 /* set CCR0[24] = 1 */
- ori r28, r28, 0x0080
- mtccr0 r28
-
- /* setup PMM0MA (0xEF400004) and PMM0PCIHA (0xEF40000C) */
- lis r28, 0xEF40
- addi r28, r28, 0x0004
- stw r31, 0x0C(r28) /* clear PMM0PCIHA */
- lis r29, 0xFFF8 /* open 512 kByte */
- addi r29, r29, 0x0001/* and enable this region */
- stwbrx r29, r0, r28 /* write PMM0MA */
-
- lis r28, 0xEEC0 /* address of PCIC0_CFGADDR */
- addi r29, r28, 4 /* add 4 to r29 -> PCIC0_CFGDATA */
-
- lis r31, 0x8000 /* set en bit bus 0 */
- ori r31, r31, 0x304C/* device 6 func 0 reg 4C (XBCS register) */
- stwbrx r31, r0, r28 /* write it */
-
- lwbrx r31, r0, r29 /* load XBCS register */
- oris r31, r31, 0x02C4/* clear BIOSCS WPE, set lower, extended and 1M extended BIOS enable */
- stwbrx r31, r0, r29 /* write back XBCS register */
-
- nop
- nop
- b _start /* normal start */
-#endif
diff --git a/board/mpl/mip405/mip405.c b/board/mpl/mip405/mip405.c
deleted file mode 100644
index 9c469b09ac..0000000000
--- a/board/mpl/mip405/mip405.c
+++ /dev/null
@@ -1,820 +0,0 @@
-/*
- * (C) Copyright 2001
- * Denis Peter, MPL AG Switzerland, d.peter@mpl.ch
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- *
- * TODO: clean-up
- */
-
-/*
- * How do I program the SDRAM Timing Register (SDRAM0_TR) for a specific SDRAM or DIMM?
- *
- * As an example, consider a case where PC133 memory with CAS Latency equal to 2 is being
- * used with a 200MHz 405GP. For a typical 128Mb, PC133 SDRAM, the relevant minimum
- * parameters from the datasheet are:
- * Tclk = 7.5ns (CL = 2)
- * Trp = 15ns
- * Trc = 60ns
- * Trcd = 15ns
- * Trfc = 66ns
- *
- * If we are operating the 405GP with the MemClk output frequency set to 100 MHZ, the clock
- * period is 10ns and the parameters needed for the Timing Register are:
- * CASL = CL = 2 clock cycles
- * PTA = Trp = 15ns / 10ns = 2 clock cycles
- * CTP = Trc - Trcd - Trp = (60ns - 15ns - 15ns) / 10ns= 3 clock cycles
- * LDF = 2 clock cycles (but can be extended to meet board-level timing)
- * RFTA = Trfc = 66ns / 10ns= 7 clock cycles
- * RCD = Trcd = 15ns / 10ns= 2 clock cycles
- *
- * The actual bit settings in the register would be:
- *
- * CASL = 0b01
- * PTA = 0b01
- * CTP = 0b10
- * LDF = 0b01
- * RFTA = 0b011
- * RCD = 0b01
- *
- * If Trfc is not specified in the datasheet for PC100 or PC133 memory, set RFTA = Trc
- * instead. Figure 24 in the PC SDRAM Specification Rev. 1.7 shows refresh to active delay
- * defined as Trc rather than Trfc.
- * When using DIMM modules, most but not all of the required timing parameters can be read
- * from the Serial Presence Detect (SPD) EEPROM on the module. Specifically, Trc and Trfc
- * are not available from the EEPROM
- */
-
-#include <common.h>
-#include "mip405.h"
-#include <asm/processor.h>
-#include <405gp_i2c.h>
-#include <miiphy.h>
-#include "../common/common_util.h"
-#include <i2c.h>
-#include <rtc.h>
-extern block_dev_desc_t * scsi_get_dev(int dev);
-extern block_dev_desc_t * ide_get_dev(int dev);
-
-#undef SDRAM_DEBUG
-#define ENABLE_ECC /* for ecc boards */
-#define FALSE 0
-#define TRUE 1
-
-/* stdlib.h causes some compatibility problems; should fixe these! -- wd */
-#ifndef __ldiv_t_defined
-typedef struct {
- long int quot; /* Quotient */
- long int rem; /* Remainder */
-} ldiv_t;
-extern ldiv_t ldiv (long int __numer, long int __denom);
-# define __ldiv_t_defined 1
-#endif
-
-
-#define PLD_PART_REG PER_PLD_ADDR + 0
-#define PLD_VERS_REG PER_PLD_ADDR + 1
-#define PLD_BOARD_CFG_REG PER_PLD_ADDR + 2
-#define PLD_IRQ_REG PER_PLD_ADDR + 3
-#define PLD_COM_MODE_REG PER_PLD_ADDR + 4
-#define PLD_EXT_CONF_REG PER_PLD_ADDR + 5
-
-#define MEGA_BYTE (1024*1024)
-
-typedef struct {
- unsigned char boardtype; /* Board revision and Population Options */
- unsigned char cal; /* cas Latency (will be programmend as cal-1) */
- unsigned char trp; /* datain27 in clocks */
- unsigned char trcd; /* datain29 in clocks */
- unsigned char tras; /* datain30 in clocks */
- unsigned char tctp; /* tras - trcd in clocks */
- unsigned char am; /* Address Mod (will be programmed as am-1) */
- unsigned char sz; /* log binary => Size = (4MByte<<sz) 5 = 128, 4 = 64, 3 = 32, 2 = 16, 1=8 */
- unsigned char ecc; /* if true, ecc is enabled */
-} sdram_t;
-#if defined(CONFIG_MIP405T)
-const sdram_t sdram_table[] = {
- { 0x0F, /* MIP405T Rev A, 64MByte -1 Board */
- 3, /* Case Latenty = 3 */
- 3, /* trp 20ns / 7.5 ns datain[27] */
- 3, /* trcd 20ns /7.5 ns (datain[29]) */
- 6, /* tras 44ns /7.5 ns (datain[30]) */
- 4, /* tcpt 44 - 20ns = 24ns */
- 2, /* Address Mode = 2 (12x9x4) */
- 3, /* size value (32MByte) */
- 0}, /* ECC disabled */
- { 0xff, /* terminator */
- 0xff,
- 0xff,
- 0xff,
- 0xff,
- 0xff,
- 0xff,
- 0xff }
-};
-#else
-const sdram_t sdram_table[] = {
- { 0x0f, /* Rev A, 128MByte -1 Board */
- 3, /* Case Latenty = 3 */
- 3, /* trp 20ns / 7.5 ns datain[27] */
- 3, /* trcd 20ns /7.5 ns (datain[29]) */
- 6, /* tras 44ns /7.5 ns (datain[30]) */
- 4, /* tcpt 44 - 20ns = 24ns */
- 3, /* Address Mode = 3 */
- 5, /* size value */
- 1}, /* ECC enabled */
- { 0x07, /* Rev A, 64MByte -2 Board */
- 3, /* Case Latenty = 3 */
- 3, /* trp 20ns / 7.5 ns datain[27] */
- 3, /* trcd 20ns /7.5 ns (datain[29]) */
- 6, /* tras 44ns /7.5 ns (datain[30]) */
- 4, /* tcpt 44 - 20ns = 24ns */
- 2, /* Address Mode = 2 */
- 4, /* size value */
- 1}, /* ECC enabled */
- { 0x03, /* Rev A, 128MByte -4 Board */
- 3, /* Case Latenty = 3 */
- 3, /* trp 20ns / 7.5 ns datain[27] */
- 3, /* trcd 20ns /7.5 ns (datain[29]) */
- 6, /* tras 44ns /7.5 ns (datain[30]) */
- 4, /* tcpt 44 - 20ns = 24ns */
- 3, /* Address Mode = 3 */
- 5, /* size value */
- 1}, /* ECC enabled */
- { 0x1f, /* Rev B, 128MByte -3 Board */
- 3, /* Case Latenty = 3 */
- 3, /* trp 20ns / 7.5 ns datain[27] */
- 3, /* trcd 20ns /7.5 ns (datain[29]) */
- 6, /* tras 44ns /7.5 ns (datain[30]) */
- 4, /* tcpt 44 - 20ns = 24ns */
- 3, /* Address Mode = 3 */
- 5, /* size value */
- 1}, /* ECC enabled */
- { 0x2f, /* Rev C, 128MByte -3 Board */
- 3, /* Case Latenty = 3 */
- 3, /* trp 20ns / 7.5 ns datain[27] */
- 3, /* trcd 20ns /7.5 ns (datain[29]) */
- 6, /* tras 44ns /7.5 ns (datain[30]) */
- 4, /* tcpt 44 - 20ns = 24ns */
- 3, /* Address Mode = 3 */
- 5, /* size value */
- 1}, /* ECC enabled */
- { 0xff, /* terminator */
- 0xff,
- 0xff,
- 0xff,
- 0xff,
- 0xff,
- 0xff,
- 0xff }
-};
-#endif /*CONFIG_MIP405T */
-void SDRAM_err (const char *s)
-{
-#ifndef SDRAM_DEBUG
- DECLARE_GLOBAL_DATA_PTR;
-
- (void) get_clocks ();
- gd->baudrate = 9600;
- serial_init ();
-#endif
- serial_puts ("\n");
- serial_puts (s);
- serial_puts ("\n enable SDRAM_DEBUG for more info\n");
- for (;;);
-}
-
-
-unsigned char get_board_revcfg (void)
-{
- out8 (PER_BOARD_ADDR, 0);
- return (in8 (PER_BOARD_ADDR));
-}
-
-
-#ifdef SDRAM_DEBUG
-
-void write_hex (unsigned char i)
-{
- char cc;
-
- cc = i >> 4;
- cc &= 0xf;
- if (cc > 9)
- serial_putc (cc + 55);
- else
- serial_putc (cc + 48);
- cc = i & 0xf;
- if (cc > 9)
- serial_putc (cc + 55);
- else
- serial_putc (cc + 48);
-}
-
-void write_4hex (unsigned long val)
-{
- write_hex ((unsigned char) (val >> 24));
- write_hex ((unsigned char) (val >> 16));
- write_hex ((unsigned char) (val >> 8));
- write_hex ((unsigned char) val);
-}
-
-#endif
-
-
-int init_sdram (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- unsigned long tmp, baseaddr;
- unsigned short i;
- unsigned char trp_clocks,
- trcd_clocks,
- tras_clocks,
- trc_clocks,
- tctp_clocks;
- unsigned char cal_val;
- unsigned char bc;
- unsigned long sdram_tim, sdram_bank;
-
- /*i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);*/
- (void) get_clocks ();
- gd->baudrate = 9600;
- serial_init ();
- /* set up the pld */
- mtdcr (ebccfga, pb7ap);
- mtdcr (ebccfgd, PLD_AP);
- mtdcr (ebccfga, pb7cr);
- mtdcr (ebccfgd, PLD_CR);
- /* THIS IS OBSOLETE */
- /* set up the board rev reg*/
- mtdcr (ebccfga, pb5ap);
- mtdcr (ebccfgd, BOARD_AP);
- mtdcr (ebccfga, pb5cr);
- mtdcr (ebccfgd, BOARD_CR);
-#ifdef SDRAM_DEBUG
- /* get all informations from PLD */
- serial_puts ("\nPLD Part 0x");
- bc = in8 (PLD_PART_REG);
- write_hex (bc);
- serial_puts ("\nPLD Vers 0x");
- bc = in8 (PLD_VERS_REG);
- write_hex (bc);
- serial_puts ("\nBoard Rev 0x");
- bc = in8 (PLD_BOARD_CFG_REG);
- write_hex (bc);
- serial_puts ("\n");
-#endif
- /* check board */
- bc = in8 (PLD_PART_REG);
-#if defined(CONFIG_MIP405T)
- if((bc & 0x80)==0)
- SDRAM_err ("U-Boot configured for a MIP405T not for a MIP405!!!\n");
-#else
- if((bc & 0x80)==0x80)
- SDRAM_err ("U-Boot configured for a MIP405 not for a MIP405T!!!\n");
-#endif
- /* set-up the chipselect machine */
- mtdcr (ebccfga, pb0cr); /* get cs0 config reg */
- tmp = mfdcr (ebccfgd);
- if ((tmp & 0x00002000) == 0) {
- /* MPS Boot, set up the flash */
- mtdcr (ebccfga, pb1ap);
- mtdcr (ebccfgd, FLASH_AP);
- mtdcr (ebccfga, pb1cr);
- mtdcr (ebccfgd, FLASH_CR);
- } else {
- /* Flash boot, set up the MPS */
- mtdcr (ebccfga, pb1ap);
- mtdcr (ebccfgd, MPS_AP);
- mtdcr (ebccfga, pb1cr);
- mtdcr (ebccfgd, MPS_CR);
- }
- /* set up UART0 (CS2) and UART1 (CS3) */
- mtdcr (ebccfga, pb2ap);
- mtdcr (ebccfgd, UART0_AP);
- mtdcr (ebccfga, pb2cr);
- mtdcr (ebccfgd, UART0_CR);
- mtdcr (ebccfga, pb3ap);
- mtdcr (ebccfgd, UART1_AP);
- mtdcr (ebccfga, pb3cr);
- mtdcr (ebccfgd, UART1_CR);
- bc = in8 (PLD_BOARD_CFG_REG);
-#ifdef SDRAM_DEBUG
- serial_puts ("\nstart SDRAM Setup\n");
- serial_puts ("\nBoard Rev: ");
- write_hex (bc);
- serial_puts ("\n");
-#endif
- i = 0;
- baseaddr = CFG_SDRAM_BASE;
- while (sdram_table[i].sz != 0xff) {
- if (sdram_table[i].boardtype == bc)
- break;
- i++;
- }
- if (sdram_table[i].boardtype != bc)
- SDRAM_err ("No SDRAM table found for this board!!!\n");
-#ifdef SDRAM_DEBUG
- serial_puts (" found table ");
- write_hex (i);
- serial_puts (" \n");
-#endif
- /* since the ECC initialisation needs some time,
- * we show that we're alive
- */
- if (sdram_table[i].ecc)
- serial_puts ("\nInitializing SDRAM, Please stand by");
- cal_val = sdram_table[i].cal - 1; /* Cas Latency */
- trp_clocks = sdram_table[i].trp; /* 20ns / 7.5 ns datain[27] */
- trcd_clocks = sdram_table[i].trcd; /* 20ns /7.5 ns (datain[29]) */
- tras_clocks = sdram_table[i].tras; /* 44ns /7.5 ns (datain[30]) */
- /* ctp = ((trp + tras) - trp - trcd) => tras - trcd */
- tctp_clocks = sdram_table[i].tctp; /* 44 - 20ns = 24ns */
- /* trc_clocks is sum of trp_clocks + tras_clocks */
- trc_clocks = trp_clocks + tras_clocks;
- /* get SDRAM timing register */
- mtdcr (memcfga, mem_sdtr1);
- sdram_tim = mfdcr (memcfgd) & ~0x018FC01F;
- /* insert CASL value */
- sdram_tim |= ((unsigned long) (cal_val)) << 23;
- /* insert PTA value */
- sdram_tim |= ((unsigned long) (trp_clocks - 1)) << 18;
- /* insert CTP value */
- sdram_tim |=
- ((unsigned long) (trc_clocks - trp_clocks -
- trcd_clocks)) << 16;
- /* insert LDF (always 01) */
- sdram_tim |= ((unsigned long) 0x01) << 14;
- /* insert RFTA value */
- sdram_tim |= ((unsigned long) (trc_clocks - 4)) << 2;
- /* insert RCD value */
- sdram_tim |= ((unsigned long) (trcd_clocks - 1)) << 0;
-
- tmp = ((unsigned long) (sdram_table[i].am - 1) << 13); /* AM = 3 */
- /* insert SZ value; */
- tmp |= ((unsigned long) sdram_table[i].sz << 17);
- /* get SDRAM bank 0 register */
- mtdcr (memcfga, mem_mb0cf);
- sdram_bank = mfdcr (memcfgd) & ~0xFFCEE001;
- sdram_bank |= (baseaddr | tmp | 0x01);
-
-#ifdef SDRAM_DEBUG
- serial_puts ("sdtr: ");
- write_4hex (sdram_tim);
- serial_puts ("\n");
-#endif
-
- /* write SDRAM timing register */
- mtdcr (memcfga, mem_sdtr1);
- mtdcr (memcfgd, sdram_tim);
-
-#ifdef SDRAM_DEBUG
- serial_puts ("mb0cf: ");
- write_4hex (sdram_bank);
- serial_puts ("\n");
-#endif
-
- /* write SDRAM bank 0 register */
- mtdcr (memcfga, mem_mb0cf);
- mtdcr (memcfgd, sdram_bank);
-
- if (get_bus_freq (tmp) > 110000000) { /* > 110MHz */
- /* get SDRAM refresh interval register */
- mtdcr (memcfga, mem_rtr);
- tmp = mfdcr (memcfgd) & ~0x3FF80000;
- tmp |= 0x07F00000;
- } else {
- /* get SDRAM refresh interval register */
- mtdcr (memcfga, mem_rtr);
- tmp = mfdcr (memcfgd) & ~0x3FF80000;
- tmp |= 0x05F00000;
- }
- /* write SDRAM refresh interval register */
- mtdcr (memcfga, mem_rtr);
- mtdcr (memcfgd, tmp);
- /* enable ECC if used */
-#if defined(ENABLE_ECC) && !defined(CONFIG_BOOT_PCI)
- if (sdram_table[i].ecc) {
- /* disable checking for all banks */
- unsigned long *p;
-#ifdef SDRAM_DEBUG
- serial_puts ("disable ECC.. ");
-#endif
- mtdcr (memcfga, mem_ecccf);
- tmp = mfdcr (memcfgd);
- tmp &= 0xff0fffff; /* disable all banks */
- mtdcr (memcfga, mem_ecccf);
- /* set up SDRAM Controller with ECC enabled */
-#ifdef SDRAM_DEBUG
- serial_puts ("setup SDRAM Controller.. ");
-#endif
- mtdcr (memcfgd, tmp);
- mtdcr (memcfga, mem_mcopt1);
- tmp = (mfdcr (memcfgd) & ~0xFFE00000) | 0x90800000;
- mtdcr (memcfga, mem_mcopt1);
- mtdcr (memcfgd, tmp);
- udelay (600);
-#ifdef SDRAM_DEBUG
- serial_puts ("fill the memory..\n");
-#endif
- serial_puts (".");
- /* now, fill all the memory */
- tmp = ((4 * MEGA_BYTE) << sdram_table[i].sz);
- p = (unsigned long) 0;
- while ((unsigned long) p < tmp) {
- *p++ = 0L;
- if (!((unsigned long) p % 0x00800000)) /* every 8MByte */
- serial_puts (".");
- }
- /* enable bank 0 */
- serial_puts (".");
-#ifdef SDRAM_DEBUG
- serial_puts ("enable ECC\n");
-#endif
- udelay (400);
- mtdcr (memcfga, mem_ecccf);
- tmp = mfdcr (memcfgd);
- tmp |= 0x00800000; /* enable bank 0 */
- mtdcr (memcfgd, tmp);
- udelay (400);
- } else
-#endif
- {
- /* enable SDRAM controller with no ECC, 32-bit SDRAM width, 16 byte burst */
- mtdcr (memcfga, mem_mcopt1);
- tmp = (mfdcr (memcfgd) & ~0xFFE00000) | 0x80C00000;
- mtdcr (memcfga, mem_mcopt1);
- mtdcr (memcfgd, tmp);
- udelay (400);
- }
- serial_puts ("\n");
- return (0);
-}
-
-int board_early_init_f (void)
-{
- init_sdram ();
-
- /*-------------------------------------------------------------------------+
- | Interrupt controller setup for the PIP405 board.
- | Note: IRQ 0-15 405GP internally generated; active high; level sensitive
- | IRQ 16 405GP internally generated; active low; level sensitive
- | IRQ 17-24 RESERVED
- | IRQ 25 (EXT IRQ 0) SouthBridge; active low; level sensitive
- | IRQ 26 (EXT IRQ 1) NMI: active low; level sensitive
- | IRQ 27 (EXT IRQ 2) SMI: active Low; level sensitive
- | IRQ 28 (EXT IRQ 3) PCI SLOT 3; active low; level sensitive
- | IRQ 29 (EXT IRQ 4) PCI SLOT 2; active low; level sensitive
- | IRQ 30 (EXT IRQ 5) PCI SLOT 1; active low; level sensitive
- | IRQ 31 (EXT IRQ 6) PCI SLOT 0; active low; level sensitive
- | Note for MIP405 board:
- | An interrupt taken for the SouthBridge (IRQ 25) indicates that
- | the Interrupt Controller in the South Bridge has caused the
- | interrupt. The IC must be read to determine which device
- | caused the interrupt.
- |
- +-------------------------------------------------------------------------*/
- mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
- mtdcr (uicer, 0x00000000); /* disable all ints */
- mtdcr (uiccr, 0x00000000); /* set all to be non-critical (for now) */
- mtdcr (uicpr, 0xFFFFFF80); /* set int polarities */
- mtdcr (uictr, 0x10000000); /* set int trigger levels */
- mtdcr (uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority */
- mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
- return 0;
-}
-
-
-/*
- * Get some PLD Registers
- */
-
-unsigned short get_pld_parvers (void)
-{
- unsigned short result;
- unsigned char rc;
-
- rc = in8 (PLD_PART_REG);
- result = (unsigned short) rc << 8;
- rc = in8 (PLD_VERS_REG);
- result |= rc;
- return result;
-}
-
-
-void user_led0 (unsigned char on)
-{
- if (on)
- out8 (PLD_COM_MODE_REG, (in8 (PLD_COM_MODE_REG) | 0x4));
- else
- out8 (PLD_COM_MODE_REG, (in8 (PLD_COM_MODE_REG) & 0xfb));
-}
-
-
-void ide_set_reset (int idereset)
-{
- /* if reset = 1 IDE reset will be asserted */
- if (idereset)
- out8 (PLD_COM_MODE_REG, (in8 (PLD_COM_MODE_REG) | 0x1));
- else {
- udelay (10000);
- out8 (PLD_COM_MODE_REG, (in8 (PLD_COM_MODE_REG) & 0xfe));
- }
-}
-
-
-/* ------------------------------------------------------------------------- */
-
-void get_pcbrev_var(unsigned char *pcbrev, unsigned char *var)
-{
-#if !defined(CONFIG_MIP405T)
- unsigned char bc,rc,tmp;
- int i;
-
- bc = in8 (PLD_BOARD_CFG_REG);
- tmp = ~bc;
- tmp &= 0xf;
- rc = 0;
- for (i = 0; i < 4; i++) {
- rc <<= 1;
- rc += (tmp & 0x1);
- tmp >>= 1;
- }
- rc++;
- if(( (((bc>>4) & 0xf)==0x2) /* Rev C PCB or */
- || (((bc>>4) & 0xf)==0x1)) /* Rev B PCB with */
- && (rc==0x1)) /* Population Option 1 is a -3 */
- rc=3;
- *pcbrev=(bc >> 4) & 0xf;
- *var=rc;
-#else
- unsigned char bc;
- bc = in8 (PLD_BOARD_CFG_REG);
- *pcbrev=(bc >> 4) & 0xf;
- *var=16-(bc & 0xf);
-#endif
-}
-
-/*
- * Check Board Identity:
- */
-/* serial String: "MIP405_1000" OR "MIP405T_1000" */
-#if !defined(CONFIG_MIP405T)
-#define BOARD_NAME "MIP405"
-#else
-#define BOARD_NAME "MIP405T"
-#endif
-
-int checkboard (void)
-{
- char s[50];
- unsigned char bc, var;
- int i;
- backup_t *b = (backup_t *) s;
-
- puts ("Board: ");
- get_pcbrev_var(&bc,&var);
- i = getenv_r ("serial#", (char *)s, 32);
- if ((i == 0) || strncmp ((char *)s, BOARD_NAME,sizeof(BOARD_NAME))) {
- get_backup_values (b);
- if (strncmp (b->signature, "MPL\0", 4) != 0) {
- puts ("### No HW ID - assuming " BOARD_NAME);
- printf ("-%d Rev %c", var, 'A' + bc);
- } else {
- b->serial_name[sizeof(BOARD_NAME)-1] = 0;
- printf ("%s-%d Rev %c SN: %s", b->serial_name, var,
- 'A' + bc, &b->serial_name[sizeof(BOARD_NAME)]);
- }
- } else {
- s[sizeof(BOARD_NAME)-1] = 0;
- printf ("%s-%d Rev %c SN: %s", s, var,'A' + bc,
- &s[sizeof(BOARD_NAME)]);
- }
- bc = in8 (PLD_EXT_CONF_REG);
- printf (" Boot Config: 0x%x\n", bc);
- return (0);
-}
-
-
-/* ------------------------------------------------------------------------- */
-/* ------------------------------------------------------------------------- */
-/*
- initdram(int board_type) reads EEPROM via I2c. EEPROM contains all of
- the necessary info for SDRAM controller configuration
-*/
-/* ------------------------------------------------------------------------- */
-/* ------------------------------------------------------------------------- */
-static int test_dram (unsigned long ramsize);
-
-long int initdram (int board_type)
-{
-
- unsigned long bank_reg[4], tmp, bank_size;
- int i, ds;
- unsigned long TotalSize;
-
- ds = 0;
- /* since the DRAM controller is allready set up, calculate the size with the
- bank registers */
- mtdcr (memcfga, mem_mb0cf);
- bank_reg[0] = mfdcr (memcfgd);
- mtdcr (memcfga, mem_mb1cf);
- bank_reg[1] = mfdcr (memcfgd);
- mtdcr (memcfga, mem_mb2cf);
- bank_reg[2] = mfdcr (memcfgd);
- mtdcr (memcfga, mem_mb3cf);
- bank_reg[3] = mfdcr (memcfgd);
- TotalSize = 0;
- for (i = 0; i < 4; i++) {
- if ((bank_reg[i] & 0x1) == 0x1) {
- tmp = (bank_reg[i] >> 17) & 0x7;
- bank_size = 4 << tmp;
- TotalSize += bank_size;
- } else
- ds = 1;
- }
- mtdcr (memcfga, mem_ecccf);
- tmp = mfdcr (memcfgd);
-
- if (!tmp)
- printf ("No ");
- printf ("ECC ");
-
- test_dram (TotalSize * MEGA_BYTE);
- return (TotalSize * MEGA_BYTE);
-}
-
-/* ------------------------------------------------------------------------- */
-
-
-static int test_dram (unsigned long ramsize)
-{
-#ifdef SDRAM_DEBUG
- mem_test (0L, ramsize, 1);
-#endif
- /* not yet implemented */
- return (1);
-}
-
-/* used to check if the time in RTC is valid */
-static unsigned long start;
-static struct rtc_time tm;
-extern flash_info_t flash_info[]; /* info for FLASH chips */
-
-int misc_init_r (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
- /* adjust flash start and size as well as the offset */
- gd->bd->bi_flashstart=0-flash_info[0].size;
- gd->bd->bi_flashsize=flash_info[0].size-CFG_MONITOR_LEN;
- gd->bd->bi_flashoffset=0;
-
- /* check, if RTC is running */
- rtc_get (&tm);
- start=get_timer(0);
- /* if MIP405 has booted from PCI, reset CCR0[24] as described in errata PCI_18 */
- if (mfdcr(strap) & PSR_ROM_LOC)
- mtspr(ccr0, (mfspr(ccr0) & ~0x80));
-
- return (0);
-}
-
-
-void print_mip405_rev (void)
-{
- unsigned char part, vers, pcbrev, var;
-
- get_pcbrev_var(&pcbrev,&var);
- part = in8 (PLD_PART_REG);
- vers = in8 (PLD_VERS_REG);
- printf ("Rev: " BOARD_NAME "-%d Rev %c PLD %d Vers %d\n",
- var, pcbrev + 'A', part & 0x7F, vers);
-}
-
-
-#ifdef CONFIG_POST
-/*
- * Returns 1 if keys pressed to start the power-on long-running tests
- * Called from board_init_f().
- */
-int post_hotkeys_pressed(void)
-{
- return 0; /* No hotkeys supported */
-}
-#endif
-
-extern void mem_test_reloc(void);
-extern int mk_date (char *, struct rtc_time *);
-
-int last_stage_init (void)
-{
- unsigned long stop;
- struct rtc_time newtm;
- char *s;
- mem_test_reloc();
- /* write correct LED configuration */
- if (miiphy_write("ppc_4xx_eth0", 0x1, 0x14, 0x2402) != 0) {
- printf ("Error writing to the PHY\n");
- }
- /* since LED/CFG2 is not connected on the -2,
- * write to correct capability information */
- if (miiphy_write("ppc_4xx_eth0", 0x1, 0x4, 0x01E1) != 0) {
- printf ("Error writing to the PHY\n");
- }
- print_mip405_rev ();
- show_stdio_dev ();
- check_env ();
- /* check if RTC time is valid */
- stop=get_timer(start);
- while(stop<1200) { /* we wait 1.2 sec to check if the RTC is running */
- udelay(1000);
- stop=get_timer(start);
- }
- rtc_get (&newtm);
- if(tm.tm_sec==newtm.tm_sec) {
- s=getenv("defaultdate");
- if(!s)
- mk_date ("010112001970", &newtm);
- else
- if(mk_date (s, &newtm)!=0) {
- printf("RTC: Bad date format in defaultdate\n");
- return 0;
- }
- rtc_reset ();
- rtc_set(&newtm);
- }
- return 0;
-}
-
-/***************************************************************************
- * some helping routines
- */
-
-int overwrite_console (void)
-{
- return ((in8 (PLD_EXT_CONF_REG) & 0x1)==0); /* return TRUE if console should be overwritten */
-}
-
-
-/************************************************************************
-* Print MIP405 Info
-************************************************************************/
-void print_mip405_info (void)
-{
- unsigned char part, vers, cfg, irq_reg, com_mode, ext;
-
- part = in8 (PLD_PART_REG);
- vers = in8 (PLD_VERS_REG);
- cfg = in8 (PLD_BOARD_CFG_REG);
- irq_reg = in8 (PLD_IRQ_REG);
- com_mode = in8 (PLD_COM_MODE_REG);
- ext = in8 (PLD_EXT_CONF_REG);
-
- printf ("PLD Part %d version %d\n", part & 0x7F, vers);
- printf ("Board Revision %c\n", ((cfg >> 4) & 0xf) + 'A');
- printf ("Population Options %d %d %d %d\n", (cfg) & 0x1,
- (cfg >> 1) & 0x1, (cfg >> 2) & 0x1, (cfg >> 3) & 0x1);
- printf ("User LED %s\n", (com_mode & 0x4) ? "on" : "off");
- printf ("UART Clocks %d\n", (com_mode >> 4) & 0x3);
-#if !defined(CONFIG_MIP405T)
- printf ("User Config Switch %d %d %d %d %d %d %d %d\n",
- (ext) & 0x1, (ext >> 1) & 0x1, (ext >> 2) & 0x1,
- (ext >> 3) & 0x1, (ext >> 4) & 0x1, (ext >> 5) & 0x1,
- (ext >> 6) & 0x1, (ext >> 7) & 0x1);
- printf ("SER1 uses handshakes %s\n",
- (ext & 0x80) ? "DTR/DSR" : "RTS/CTS");
-#else
- printf ("User Config Switch %d %d %d %d %d %d %d %d\n",
- (ext) & 0x1, (ext >> 1) & 0x1, (ext >> 2) & 0x1,
- (ext >> 3) & 0x1, (ext >> 4) & 0x1, (ext >> 5) & 0x1,
- (ext >> 6) & 0x1,(ext >> 7) & 0x1);
-#endif
- printf ("IDE Reset %s\n", (ext & 0x01) ? "asserted" : "not asserted");
- printf ("IRQs:\n");
- printf (" PIIX INTR: %s\n", (irq_reg & 0x80) ? "inactive" : "active");
-#if !defined(CONFIG_MIP405T)
- printf (" UART0 IRQ: %s\n", (irq_reg & 0x40) ? "inactive" : "active");
- printf (" UART1 IRQ: %s\n", (irq_reg & 0x20) ? "inactive" : "active");
-#endif
- printf (" PIIX SMI: %s\n", (irq_reg & 0x10) ? "inactive" : "active");
- printf (" PIIX INIT: %s\n", (irq_reg & 0x8) ? "inactive" : "active");
- printf (" PIIX NMI: %s\n", (irq_reg & 0x4) ? "inactive" : "active");
-}
diff --git a/board/mpl/mip405/mip405.h b/board/mpl/mip405/mip405.h
deleted file mode 100644
index b1d91deece..0000000000
--- a/board/mpl/mip405/mip405.h
+++ /dev/null
@@ -1,183 +0,0 @@
-/*
- * (C) Copyright 2001
- * Denis Peter, MPL AG Switzerland, d.peter@mpl.ch
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- */
- /****************************************************************************
- * Global routines used for MIP405
- *****************************************************************************/
-#ifndef __ASSEMBLY__
-/*int switch_cs(unsigned char boot);*/
-
-extern int mem_test(unsigned long start, unsigned long ramsize,int mode);
-
-void user_led0(unsigned char on);
-
-
-#endif
-/* timings */
-/* PLD (CS7) */
-#define PLD_BME 0 /* Burst disable */
-#define PLD_TWE 5 /* 5 * 30ns 120ns Waitstates (access=TWT+1+TH) */
-#define PLD_CSN 1 /* Chipselect is driven inactive for 1 Cycle BTW transfers */
-#define PLD_OEN 1 /* Cycles from CS low to OE low */
-#define PLD_WBN 1 /* Cycles from CS low to WE low */
-#define PLD_WBF 1 /* Cycles from WE high to CS high */
-#define PLD_TH 2 /* Number of hold cycles after transfer */
-#define PLD_RE 0 /* Ready disabled */
-#define PLD_SOR 1 /* Sample on Ready disabled */
-#define PLD_BEM 0 /* Byte Write only active on Write cycles */
-#define PLD_PEN 0 /* Parity disable */
-#define PLD_AP ((PLD_BME << 31) + (PLD_TWE << 23) + (PLD_CSN << 18) + (PLD_OEN << 16) + (PLD_WBN << 14) + \
- (PLD_WBF << 12) + (PLD_TH << 9) + (PLD_RE << 8) + (PLD_SOR << 7) + (PLD_BEM << 6) + (PLD_PEN << 5))
-
-/* Size: 0=1MB, 1=2MB, 2=4MB, 3=8MB, 4=16MB, 5=32MB, 6=64MB, 7=128MB */
-#define PLD_BS 0 /* 1 MByte */
-/* Usage: 0=disabled, 1=Read only, 2=Write Only, 3=R/W */
-#define PLD_BU 3 /* R/W */
-/* Bus width: 0=8Bit, 1=16Bit, 2=32Bit, 3=Reserved */
-#define PLD_BW 0 /* 16Bit */
-#define PLD_CR ((PER_PLD_ADDR & 0xfff00000) + (PLD_BS << 17) + (PLD_BU << 15) + (PLD_BW << 13))
-
-
-/* timings */
-
-#define PER_BOARD_ADDR (PER_UART1_ADDR+(1024*1024))
-/* Dummy CS to get the board revision */
-#define BOARD_BME 0 /* Burst disable */
-#define BOARD_TWE 255 /* 255 * 30ns 120ns Waitstates (access=TWT+1+TH) */
-#define BOARD_CSN 1 /* Chipselect is driven inactive for 1 Cycle BTW transfers */
-#define BOARD_OEN 1 /* Cycles from CS low to OE low */
-#define BOARD_WBN 1 /* Cycles from CS low to WE low */
-#define BOARD_WBF 1 /* Cycles from WE high to CS high */
-#define BOARD_TH 2 /* Number of hold cycles after transfer */
-#define BOARD_RE 0 /* Ready disabled */
-#define BOARD_SOR 1 /* Sample on Ready disabled */
-#define BOARD_BEM 0 /* Byte Write only active on Write cycles */
-#define BOARD_PEN 0 /* Parity disable */
-#define BOARD_AP ((BOARD_BME << 31) + (BOARD_TWE << 23) + (BOARD_CSN << 18) + (BOARD_OEN << 16) + (BOARD_WBN << 14) + \
- (BOARD_WBF << 12) + (BOARD_TH << 9) + (BOARD_RE << 8) + (BOARD_SOR << 7) + (BOARD_BEM << 6) + (BOARD_PEN << 5))
-
-/* Size: 0=1MB, 1=2MB, 2=4MB, 3=8MB, 4=16MB, 5=32MB, 6=64MB, 7=128MB */
-#define BOARD_BS 0 /* 1 MByte */
-/* Usage: 0=disabled, 1=Read only, 2=Write Only, 3=R/W */
-#define BOARD_BU 3 /* R/W */
-/* Bus width: 0=8Bit, 1=16Bit, 2=32Bit, 3=Reserved */
-#define BOARD_BW 0 /* 16Bit */
-#define BOARD_CR ((PER_BOARD_ADDR & 0xfff00000) + (BOARD_BS << 17) + (BOARD_BU << 15) + (BOARD_BW << 13))
-
-
-/* UART0 CS2 */
-#define UART0_BME 0 /* Burst disable */
-#define UART0_TWE 7 /* 7 * 30ns 210ns Waitstates (access=TWT+1+TH) */
-#define UART0_CSN 1 /* Chipselect is driven inactive for 1 Cycle BTW transfers */
-#define UART0_OEN 1 /* Cycles from CS low to OE low */
-#define UART0_WBN 1 /* Cycles from CS low to WE low */
-#define UART0_WBF 1 /* Cycles from WE high to CS high */
-#define UART0_TH 2 /* Number of hold cycles after transfer */
-#define UART0_RE 0 /* Ready disabled */
-#define UART0_SOR 1 /* Sample on Ready disabled */
-#define UART0_BEM 0 /* Byte Write only active on Write cycles */
-#define UART0_PEN 0 /* Parity disable */
-#define UART0_AP ((UART0_BME << 31) + (UART0_TWE << 23) + (UART0_CSN << 18) + (UART0_OEN << 16) + (UART0_WBN << 14) + \
- (UART0_WBF << 12) + (UART0_TH << 9) + (UART0_RE << 8) + (UART0_SOR << 7) + (UART0_BEM << 6) + (UART0_PEN << 5))
-
-/* Size: 0=1MB, 1=2MB, 2=4MB, 3=8MB, 4=16MB, 5=32MB, 6=64MB, 7=128MB */
-#define UART0_BS 0 /* 1 MByte */
-/* Usage: 0=disabled, 1=Read only, 2=Write Only, 3=R/W */
-#define UART0_BU 3 /* R/W */
-/* Bus width: 0=8Bit, 1=16Bit, 2=32Bit, 3=Reserved */
-#define UART0_BW 0 /* 8Bit */
-#define UART0_CR ((PER_UART0_ADDR & 0xfff00000) + (UART0_BS << 17) + (UART0_BU << 15) + (UART0_BW << 13))
-
-/* UART1 CS3 */
-#define UART1_AP UART0_AP /* same timing as UART0 */
-#define UART1_CR ((PER_UART1_ADDR & 0xfff00000) + (UART0_BS << 17) + (UART0_BU << 15) + (UART0_BW << 13))
-
-
-/* Flash CS0 or CS 1 */
-/* 0x7F8FFE80 slowest timing at all... */
-#define FLASH_BME_B 1 /* Burst enable */
-#define FLASH_FWT_B 0x6 /* 6 * 30ns 210ns First Wait Access */
-#define FLASH_BWT_B 0x6 /* 6 * 30ns 210ns Burst Wait Access */
-#define FLASH_BME 0 /* Burst disable */
-#define FLASH_TWE 0xb/* 11 * 30ns 330ns Waitstates (access=TWT+1+TH) */
-#define FLASH_CSN 0 /* Chipselect is driven inactive for 1 Cycle BTW transfers */
-#define FLASH_OEN 1 /* Cycles from CS low to OE low */
-#define FLASH_WBN 1 /* Cycles from CS low to WE low */
-#define FLASH_WBF 1 /* Cycles from WE high to CS high */
-#define FLASH_TH 2 /* Number of hold cycles after transfer */
-#define FLASH_RE 0 /* Ready disabled */
-#define FLASH_SOR 1 /* Sample on Ready disabled */
-#define FLASH_BEM 0 /* Byte Write only active on Write cycles */
-#define FLASH_PEN 0 /* Parity disable */
-/* Access Parameter Register for non Boot */
-#define FLASH_AP ((FLASH_BME << 31) + (FLASH_TWE << 23) + (FLASH_CSN << 18) + (FLASH_OEN << 16) + (FLASH_WBN << 14) + \
- (FLASH_WBF << 12) + (FLASH_TH << 9) + (FLASH_RE << 8) + (FLASH_SOR << 7) + (FLASH_BEM << 6) + (FLASH_PEN << 5))
-/* Access Parameter Register for Boot */
-#define FLASH_AP_B ((FLASH_BME_B << 31) + (FLASH_FWT_B << 26) + (FLASH_BWT_B << 23) + (FLASH_CSN << 18) + (FLASH_OEN << 16) + (FLASH_WBN << 14) + \
- (FLASH_WBF << 12) + (FLASH_TH << 9) + (FLASH_RE << 8) + (FLASH_SOR << 7) + (FLASH_BEM << 6) + (FLASH_PEN << 5))
-
-/* Size: 0=1MB, 1=2MB, 2=4MB, 3=8MB, 4=16MB, 5=32MB, 6=64MB, 7=128MB */
-#define FLASH_BS FLASH_SIZE_PRELIM /* 4 MByte */
-/* Usage: 0=disabled, 1=Read only, 2=Write Only, 3=R/W */
-#define FLASH_BU 3 /* R/W */
-/* Bus width: 0=8Bit, 1=16Bit, 2=32Bit, 3=Reserved */
-#define FLASH_BW 1 /* 16Bit */
-/* CR register for Boot */
-#define FLASH_CR_B ((FLASH_BASE_PRELIM & 0xfff00000) + (FLASH_BS << 17) + (FLASH_BU << 15) + (FLASH_BW << 13))
-/* CR register for non Boot */
-#define FLASH_CR ((MULTI_PURPOSE_SOCKET_ADDR & 0xfff00000) + (FLASH_BS << 17) + (FLASH_BU << 15) + (FLASH_BW << 13))
-
-/* MPS CS1 or CS0 */
-/* Boot CS: */
-#define MPS_BME_B 1 /* Burst enable */
-#define MPS_FWT_B 0x6/* 6 * 30ns 210ns First Wait Access */
-#define MPS_BWT_B 0x6 /* 6 * 30ns 210ns Burst Wait Access */
-#define MPS_BME 0 /* Burst disable */
-#define MPS_TWE 0xb/* 11 * 30ns 330ns Waitstates (access=TWT+1+TH) */
-#define MPS_CSN 0 /* Chipselect is driven inactive for 1 Cycle BTW transfers */
-#define MPS_OEN 1 /* Cycles from CS low to OE low */
-#define MPS_WBN 1 /* Cycles from CS low to WE low */
-#define MPS_WBF 1 /* Cycles from WE high to CS high */
-#define MPS_TH 2 /* Number of hold cycles after transfer */
-#define MPS_RE 0 /* Ready disabled */
-#define MPS_SOR 1 /* Sample on Ready disabled */
-#define MPS_BEM 0 /* Byte Write only active on Write cycles */
-#define MPS_PEN 0 /* Parity disable */
-/* Access Parameter Register for non Boot */
-#define MPS_AP ((MPS_BME << 31) + (MPS_TWE << 23) + (MPS_CSN << 18) + (MPS_OEN << 16) + (MPS_WBN << 14) + \
- (MPS_WBF << 12) + (MPS_TH << 9) + (MPS_RE << 8) + (MPS_SOR << 7) + (MPS_BEM << 6) + (MPS_PEN << 5))
-/* Access Parameter Register for Boot */
-#define MPS_AP_B ((MPS_BME_B << 31) + (MPS_FWT_B << 26) + (MPS_BWT_B << 23) + (MPS_CSN << 18) + (MPS_OEN << 16) + (MPS_WBN << 14) + \
- (MPS_WBF << 12) + (MPS_TH << 9) + (MPS_RE << 8) + (MPS_SOR << 7) + (MPS_BEM << 6) + (MPS_PEN << 5))
-
-/* Size: 0=1MB, 1=2MB, 2=4MB, 3=8MB, 4=16MB, 5=32MB, 6=64MB, 7=128MB */
-#define MPS_BS 2 /* 4 MByte */
-#define MPS_BS_B FLASH_SIZE_PRELIM /* 1 MByte */
-/* Usage: 0=disabled, 1=Read only, 2=Write Only, 3=R/W */
-#define MPS_BU 3 /* R/W */
-/* Bus width: 0=8Bit, 1=16Bit, 2=32Bit, 3=Reserved */
-#define MPS_BW 0 /* 8Bit */
-/* CR register for Boot */
-#define MPS_CR_B ((FLASH_BASE_PRELIM & 0xfff00000) + (MPS_BS_B << 17) + (MPS_BU << 15) + (MPS_BW << 13))
-/* CR register for non Boot */
-#define MPS_CR ((MULTI_PURPOSE_SOCKET_ADDR & 0xfff00000) + (MPS_BS << 17) + (MPS_BU << 15) + (MPS_BW << 13))
diff --git a/board/mpl/mip405/u-boot.lds b/board/mpl/mip405/u-boot.lds
deleted file mode 100644
index ad5f2739ca..0000000000
--- a/board/mpl/mip405/u-boot.lds
+++ /dev/null
@@ -1,157 +0,0 @@
-/*
- * (C) Copyright 2000, 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- .resetvec 0xFFFFFFFC :
- {
- *(.resetvec)
- } = 0xffff
- .bootpg 0xFFFFF000 :
- {
- board/mpl/mip405/init.o (.bootpg)
- } = 0xffff
-
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/ppc4xx/start.o (.text)
- board/mpl/mip405/init.o (.text)
- cpu/ppc4xx/kgdb.o (.text)
- cpu/ppc4xx/traps.o (.text)
- cpu/ppc4xx/interrupts.o (.text)
- cpu/ppc4xx/serial.o (.text)
- cpu/ppc4xx/cpu_init.o (.text)
- cpu/ppc4xx/speed.o (.text)
- cpu/ppc4xx/4xx_enet.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/extable.o (.text)
- lib_generic/zlib.o (.text)
-
-/* . = env_offset;*/
-/* common/environment.o(.text)*/
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/mpl/pati/Makefile b/board/mpl/pati/Makefile
deleted file mode 100644
index 1a9ce12117..0000000000
--- a/board/mpl/pati/Makefile
+++ /dev/null
@@ -1,48 +0,0 @@
-#
-# (C) Copyright 2001 Wolfgang Denk, DENX Software Engineering, wd@denx.de
-#
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := pati.o ../common/flash.o ../common/memtst.o cmd_pati.o ../common/common_util.o
-#### cmd_pati.o
-SOBJS :=
-
-$(LIB): $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/mpl/pati/cmd_pati.c b/board/mpl/pati/cmd_pati.c
deleted file mode 100644
index 98429c033d..0000000000
--- a/board/mpl/pati/cmd_pati.c
+++ /dev/null
@@ -1,449 +0,0 @@
-/*
- * (C) Copyright 2001
- * Denis Peter, MPL AG Switzerland, d.peter@mpl.ch
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- * Adapted for PATI
- */
-
-#include <common.h>
-#include <command.h>
-#define PLX9056_LOC
-#include "plx9056.h"
-#include "pati.h"
-#include "pci_eeprom.h"
-
-extern void show_pld_regs(void);
-extern int do_mplcommon(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
-
-extern void user_led0(int led_on);
-extern void user_led1(int led_on);
-
-/* ------------------------------------------------------------------------- */
-#if defined(CFG_PCI_CON_DEVICE)
-extern void pci_con_disc(void);
-extern void pci_con_connect(void);
-#endif
-
-/******************************************************************************
- * Eeprom Support
- ******************************************************************************/
-unsigned long get32(unsigned long addr)
-{
- unsigned long *p=(unsigned long *)addr;
- return *p;
-}
-
-void set32(unsigned long addr,unsigned long data)
-{
- unsigned long *p=(unsigned long *)addr;
- *p=data;
-}
-
-#define PCICFG_GET_REG(x) (get32((x) + PCI_CONFIG_BASE))
-#define PCICFG_SET_REG(x,y) (set32((x) + PCI_CONFIG_BASE,(y)))
-
-
-/******************************************************************************
- * reload_pci_eeprom
- ******************************************************************************/
-
-static void reload_pci_eeprom(void)
-{
- unsigned long reg;
- /* Set Bit 29 and clear it again */
- reg=PCICFG_GET_REG(PCI9056_EEPROM_CTRL_STAT);
- udelay(1);
- /* set it*/
- reg|=(1<<29);
- PCICFG_SET_REG(PCI9056_EEPROM_CTRL_STAT,reg);
- /* EECLK @ 33MHz = 125kHz
- * -> extra long load = 32 * 16bit = 512Bit @ 125kHz = 4.1msec
- * use 20msec
- */
- udelay(20000); /* wait 20ms */
- reg &= ~(1<<29); /* set it low */
- PCICFG_SET_REG(PCI9056_EEPROM_CTRL_STAT,reg);
- udelay(1); /* wait some time */
-}
-
-/******************************************************************************
- * clock_pci_eeprom
- ******************************************************************************/
-
-static void clock_pci_eeprom(void)
-{
- unsigned long reg;
- /* clock is low, data is valid */
- reg=PCICFG_GET_REG(PCI9056_EEPROM_CTRL_STAT);
- udelay(1);
- /* set clck high */
- reg|=(1<<24);
- PCICFG_SET_REG(PCI9056_EEPROM_CTRL_STAT,reg);
- udelay(1); /* wait some time */
- reg &= ~(1<<24); /* set clock low */
- PCICFG_SET_REG(PCI9056_EEPROM_CTRL_STAT,reg);
- udelay(1); /* wait some time */
-}
-
-/******************************************************************************
- * send_pci_eeprom_cmd
- ******************************************************************************/
-static void send_pci_eeprom_cmd(unsigned long cmd, unsigned char len)
-{
- unsigned long reg;
- int i;
- reg=PCICFG_GET_REG(PCI9056_EEPROM_CTRL_STAT);
- /* Clear all EEPROM bits */
- reg &= ~(0xF << 24);
- /* Toggle EEPROM's Chip select to get it out of Shift Register Mode */
- PCICFG_SET_REG(PCI9056_EEPROM_CTRL_STAT,reg);
- udelay(1); /* wait some time */
- /* Enable EEPROM Chip Select */
- reg |= (1 << 25);
- PCICFG_SET_REG(PCI9056_EEPROM_CTRL_STAT,reg);
- /* Send EEPROM command - one bit at a time */
- for (i = (int)(len-1); i >= 0; i--) {
- /* Check if current bit is 0 or 1 */
- if (cmd & (1 << i))
- PCICFG_SET_REG(PCI9056_EEPROM_CTRL_STAT,(reg | (1<<26)));
- else
- PCICFG_SET_REG(PCI9056_EEPROM_CTRL_STAT,reg);
- clock_pci_eeprom();
- }
-}
-
-/******************************************************************************
- * write_pci_eeprom_offs
- ******************************************************************************/
-static void write_pci_eeprom_offs(unsigned short offset, unsigned short value)
-{
- unsigned long reg;
- int bitpos, cmdshft, cmdlen, timeout;
- /* we're using the Eeprom 93CS66 */
- cmdshft = 2;
- cmdlen = EE66_CMD_LEN;
- /* Send Write_Enable command to EEPROM */
- send_pci_eeprom_cmd((EE_WREN << cmdshft),cmdlen);
- /* Send EEPROM Write command and offset to EEPROM */
- send_pci_eeprom_cmd((EE_WRITE << cmdshft) | (offset / 2),cmdlen);
- reg=PCICFG_GET_REG(PCI9056_EEPROM_CTRL_STAT);
- /* Clear all EEPROM bits */
- reg &= ~(0xF << 24);
- /* Make sure EEDO Input is disabled for some PLX chips */
- reg &= ~(1 << 31);
- /* Enable EEPROM Chip Select */
- reg |= (1 << 25);
- /* Write 16-bit value to EEPROM - one bit at a time */
- for (bitpos = 15; bitpos >= 0; bitpos--) {
- /* Get bit value and shift into result */
- if (value & (1 << bitpos))
- PCICFG_SET_REG(PCI9056_EEPROM_CTRL_STAT,(reg | (1<<26)));
- else
- PCICFG_SET_REG(PCI9056_EEPROM_CTRL_STAT,reg );
- clock_pci_eeprom();
- } /* for */
- /* Deselect Chip */
- PCICFG_SET_REG(PCI9056_EEPROM_CTRL_STAT,reg & ~(1 << 25));
- /* Re-select Chip */
- PCICFG_SET_REG(PCI9056_EEPROM_CTRL_STAT,reg | (1 << 25));
- /* A small delay is needed to let EEPROM complete */
- timeout = 0;
- do {
- udelay(10);
- reg=PCICFG_GET_REG(PCI9056_EEPROM_CTRL_STAT);
- timeout++;
- } while (((reg & (1 << 27)) == 0) && timeout < 20000);
- /* Send Write_Disable command to EEPROM */
- send_pci_eeprom_cmd((EE_WDS << cmdshft),cmdlen);
- /* Clear Chip Select and all other EEPROM bits */
- PCICFG_SET_REG(PCI9056_EEPROM_CTRL_STAT,reg & ~(0xF << 24));
-}
-
-
-/******************************************************************************
- * read_pci_eeprom_offs
- ******************************************************************************/
-static void read_pci_eeprom_offs(unsigned short offset, unsigned short *pvalue)
-{
- unsigned long reg;
- int bitpos, cmdshft, cmdlen;
- /* we're using the Eeprom 93CS66 */
- cmdshft = 2;
- cmdlen = EE66_CMD_LEN;
- /* Send EEPROM read command and offset to EEPROM */
- send_pci_eeprom_cmd((EE_READ << cmdshft) | (offset / 2),cmdlen);
- /* Set EEPROM write output bit */
- reg=PCICFG_GET_REG(PCI9056_EEPROM_CTRL_STAT);
- /* Set EEDO Input enable */
- reg |= (1 << 31);
- PCICFG_SET_REG(PCI9056_EEPROM_CTRL_STAT,reg | (1 << 26));
- /* Get 16-bit value from EEPROM - one bit at a time */
- for (bitpos = 0; bitpos < 16; bitpos++) {
- clock_pci_eeprom();
- udelay(10);
- reg=PCICFG_GET_REG(PCI9056_EEPROM_CTRL_STAT);
- /* Get bit value and shift into result */
- if (reg & (1 << 27))
- *pvalue = (unsigned short)((*pvalue << 1) | 1);
- else
- *pvalue = (unsigned short)(*pvalue << 1);
- }
- /* Clear EEDO Input enable */
- reg &= ~(1 << 31);
- /* Clear Chip Select and all other EEPROM bits */
- PCICFG_SET_REG(PCI9056_EEPROM_CTRL_STAT,reg & ~(0xF << 24));
-}
-
-
-/******************************************************************************
- * EEPROM read/writes
-******************************************************************************/
-
-#undef EEPROM_DBG
-static int pati_pci_eeprom_erase(void)
-{
- int i;
- printf("Erasing EEPROM ");
- for( i=0; i < PATI_EEPROM_LAST_OFFSET; i+=2) {
- write_pci_eeprom_offs(i,0xffff);
- if((i%0x10))
- printf(".");
- }
- printf("\nDone\n");
- return 0;
-}
-
-static int pati_pci_eeprom_prg(void)
-{
- int i;
- i=0;
- printf("Programming EEPROM ");
- while(pati_eeprom[i].offset<0xffff) {
- write_pci_eeprom_offs(pati_eeprom[i].offset,pati_eeprom[i].value);
- #ifdef EEPROM_DBG
- printf("0x%04X: 0x%04X\n",pati_eeprom[i].offset, pati_eeprom[i].value);
- #else
- if((i%0x10))
- printf(".");
- #endif
- i++;
- }
- printf("\nDone\n");
- return 0;
-}
-
-static int pati_pci_eeprom_write(unsigned short offset, unsigned long addr, unsigned short size)
-{
- int i;
- unsigned short value;
- unsigned short *buffer =(unsigned short *)addr;
- if((offset + size) > PATI_EEPROM_LAST_OFFSET) {
- size = PATI_EEPROM_LAST_OFFSET - offset;
- }
- printf("Write To EEPROM from 0x%lX to 0x%X 0x%X words\n", addr, offset, size/2);
- for( i = offset; i< (offset + size); i+=2) {
- value = *buffer++;
- write_pci_eeprom_offs(i,value);
- #ifdef EEPROM_DBG
- printf("0x%04X: 0x%04X\n",i, value);
- #else
- if((i%0x10))
- printf(".");
- #endif
- }
- printf("\nDone\n");
- return 0;
-}
-
-static int pati_pci_eeprom_read(unsigned short offset, unsigned long addr, unsigned short size)
-{
- int i;
- unsigned short value;
- unsigned short *buffer =(unsigned short *)addr;
- if((offset + size) > PATI_EEPROM_LAST_OFFSET) {
- size = PATI_EEPROM_LAST_OFFSET - offset;
- }
- printf("Read from EEPROM from 0x%X to 0x%lX 0x%X words\n", offset, addr, size/2);
- for( i = offset; i< (offset + size); i+=2) {
- read_pci_eeprom_offs(i,&value);
- *buffer++=value;
- #ifdef EEPROM_DBG
- printf("0x%04X: 0x%04X\n",i, value);
- #else
- if((i%0x10))
- printf(".");
- #endif
- }
- printf("\nDone\n");
- return 0;
-}
-
-/******************************************************************************
- * PCI Bridge Registers Dump
-*******************************************************************************/
-static void display_pci_regs(void)
-{
- printf(" PCI9056_SPACE0_RANGE %08lX\n",PCICFG_GET_REG(PCI9056_SPACE0_RANGE));
- printf(" PCI9056_SPACE0_REMAP %08lX\n",PCICFG_GET_REG(PCI9056_SPACE0_REMAP));
- printf(" PCI9056_LOCAL_DMA_ARBIT %08lX\n",PCICFG_GET_REG(PCI9056_LOCAL_DMA_ARBIT));
- printf(" PCI9056_ENDIAN_DESC %08lX\n",PCICFG_GET_REG(PCI9056_ENDIAN_DESC));
- printf(" PCI9056_EXP_ROM_RANGE %08lX\n",PCICFG_GET_REG(PCI9056_EXP_ROM_RANGE));
- printf(" PCI9056_EXP_ROM_REMAP %08lX\n",PCICFG_GET_REG(PCI9056_EXP_ROM_REMAP));
- printf(" PCI9056_SPACE0_ROM_DESC %08lX\n",PCICFG_GET_REG(PCI9056_SPACE0_ROM_DESC));
- printf(" PCI9056_DM_RANGE %08lX\n",PCICFG_GET_REG(PCI9056_DM_RANGE));
- printf(" PCI9056_DM_MEM_BASE %08lX\n",PCICFG_GET_REG(PCI9056_DM_MEM_BASE));
- printf(" PCI9056_DM_IO_BASE %08lX\n",PCICFG_GET_REG(PCI9056_DM_IO_BASE));
- printf(" PCI9056_DM_PCI_MEM_REMAP %08lX\n",PCICFG_GET_REG(PCI9056_DM_PCI_MEM_REMAP));
- printf(" PCI9056_DM_PCI_IO_CONFIG %08lX\n",PCICFG_GET_REG(PCI9056_DM_PCI_IO_CONFIG));
- printf(" PCI9056_SPACE1_RANGE %08lX\n",PCICFG_GET_REG(PCI9056_SPACE1_RANGE));
- printf(" PCI9056_SPACE1_REMAP %08lX\n",PCICFG_GET_REG(PCI9056_SPACE1_REMAP));
- printf(" PCI9056_SPACE1_DESC %08lX\n",PCICFG_GET_REG(PCI9056_SPACE1_DESC));
- printf(" PCI9056_DM_DAC %08lX\n",PCICFG_GET_REG(PCI9056_DM_DAC));
- printf(" PCI9056_MAILBOX0 %08lX\n",PCICFG_GET_REG(PCI9056_MAILBOX0));
- printf(" PCI9056_MAILBOX1 %08lX\n",PCICFG_GET_REG(PCI9056_MAILBOX1));
- printf(" PCI9056_MAILBOX2 %08lX\n",PCICFG_GET_REG(PCI9056_MAILBOX2));
- printf(" PCI9056_MAILBOX3 %08lX\n",PCICFG_GET_REG(PCI9056_MAILBOX3));
- printf(" PCI9056_MAILBOX4 %08lX\n",PCICFG_GET_REG(PCI9056_MAILBOX4));
- printf(" PCI9056_MAILBOX5 %08lX\n",PCICFG_GET_REG(PCI9056_MAILBOX5));
- printf(" PCI9056_MAILBOX6 %08lX\n",PCICFG_GET_REG(PCI9056_MAILBOX6));
- printf(" PCI9056_MAILBOX7 %08lX\n",PCICFG_GET_REG(PCI9056_MAILBOX7));
- printf(" PCI9056_PCI_TO_LOC_DBELL %08lX\n",PCICFG_GET_REG(PCI9056_PCI_TO_LOC_DBELL));
- printf(" PCI9056_LOC_TO_PCI_DBELL %08lX\n",PCICFG_GET_REG(PCI9056_LOC_TO_PCI_DBELL));
- printf(" PCI9056_INT_CTRL_STAT %08lX\n",PCICFG_GET_REG(PCI9056_INT_CTRL_STAT));
- printf(" PCI9056_EEPROM_CTRL_STAT %08lX\n",PCICFG_GET_REG(PCI9056_EEPROM_CTRL_STAT));
- printf(" PCI9056_PERM_VENDOR_ID %08lX\n",PCICFG_GET_REG(PCI9056_PERM_VENDOR_ID));
- printf(" PCI9056_REVISION_ID %08lX\n",PCICFG_GET_REG(PCI9056_REVISION_ID));
- printf(" \n");
- printf(" PCI9056_VENDOR_ID %08lX\n",PCICFG_GET_REG(PCI9056_VENDOR_ID));
- printf(" PCI9056_COMMAND %08lX\n",PCICFG_GET_REG(PCI9056_COMMAND));
- printf(" PCI9056_REVISION %08lX\n",PCICFG_GET_REG(PCI9056_REVISION));
- printf(" PCI9056_CACHE_SIZE %08lX\n",PCICFG_GET_REG(PCI9056_CACHE_SIZE));
- printf(" PCI9056_RTR_BASE %08lX\n",PCICFG_GET_REG(PCI9056_RTR_BASE));
- printf(" PCI9056_RTR_IO_BASE %08lX\n",PCICFG_GET_REG(PCI9056_RTR_IO_BASE));
- printf(" PCI9056_LOCAL_BASE0 %08lX\n",PCICFG_GET_REG(PCI9056_LOCAL_BASE0));
- printf(" PCI9056_LOCAL_BASE1 %08lX\n",PCICFG_GET_REG(PCI9056_LOCAL_BASE1));
- printf(" PCI9056_UNUSED_BASE1 %08lX\n",PCICFG_GET_REG(PCI9056_UNUSED_BASE1));
- printf(" PCI9056_UNUSED_BASE2 %08lX\n",PCICFG_GET_REG(PCI9056_UNUSED_BASE2));
- printf(" PCI9056_CIS_PTR %08lX\n",PCICFG_GET_REG(PCI9056_CIS_PTR));
- printf(" PCI9056_SUB_ID %08lX\n",PCICFG_GET_REG(PCI9056_SUB_ID));
- printf(" PCI9056_EXP_ROM_BASE %08lX\n",PCICFG_GET_REG(PCI9056_EXP_ROM_BASE));
- printf(" PCI9056_CAP_PTR %08lX\n",PCICFG_GET_REG(PCI9056_CAP_PTR));
- printf(" PCI9056_INT_LINE %08lX\n",PCICFG_GET_REG(PCI9056_INT_LINE));
- printf(" PCI9056_PM_CAP_ID %08lX\n",PCICFG_GET_REG(PCI9056_PM_CAP_ID));
- printf(" PCI9056_PM_CSR %08lX\n",PCICFG_GET_REG(PCI9056_PM_CSR));
- printf(" PCI9056_HS_CAP_ID %08lX\n",PCICFG_GET_REG(PCI9056_HS_CAP_ID));
- printf(" PCI9056_VPD_CAP_ID %08lX\n",PCICFG_GET_REG(PCI9056_VPD_CAP_ID));
- printf(" PCI9056_VPD_DATA %08lX\n",PCICFG_GET_REG(PCI9056_VPD_DATA));
-}
-
-
-int do_pati(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- if (strcmp(argv[1], "info") == 0)
- {
- show_pld_regs();
- return 0;
- }
- if (strcmp(argv[1], "pci") == 0)
- {
- display_pci_regs();
- return 0;
- }
- if (strcmp(argv[1], "led") == 0)
- {
- int led_nr,led_on;
- led_nr = (int)simple_strtoul(argv[2], NULL, 10);
- led_on = (int)simple_strtoul(argv[3], NULL, 10);
- if(!led_nr)
- user_led0(led_on);
- else
- user_led1(led_on);
- return 0;
- }
-#if defined(CFG_PCI_CON_DEVICE)
- if (strcmp(argv[1], "con") == 0) {
- pci_con_connect();
- return 0;
- }
- if (strcmp(argv[1], "disc") == 0) {
- pci_con_disc();
- return 0;
- }
-#endif
- if (strcmp(argv[1], "eeprom") == 0) {
- unsigned long addr;
- int size, offset;
- offset = 0;
- size = PATI_EEPROM_LAST_OFFSET;
- if(argc>2) {
- if(argc>3) {
- addr = simple_strtoul(argv[3], NULL, 16);
- if(argc>4)
- offset = (int) simple_strtoul(argv[4], NULL, 16);
- if(argc>5)
- size = (int) simple_strtoul(argv[5], NULL, 16);
- if (strcmp(argv[2], "read") == 0) {
- return (pati_pci_eeprom_read(offset, addr, size));
- }
- if (strcmp(argv[2], "write") == 0) {
- return (pati_pci_eeprom_write(offset, addr, size));
- }
- }
- if (strcmp(argv[2], "prg") == 0) {
- return (pati_pci_eeprom_prg());
- }
- if (strcmp(argv[2], "era") == 0) {
- return (pati_pci_eeprom_erase());
- }
- if (strcmp(argv[2], "reload") == 0) {
- reload_pci_eeprom();
- return 0;
- }
-
-
- }
- }
-
- return (do_mplcommon(cmdtp, flag, argc, argv));
-}
-
-U_BOOT_CMD(
- pati, 8, 1, do_pati,
- "pati - PATI specific Cmds\n",
- "info - displays board information\n"
- "pati pci - displays PCI registers\n"
- "pati led <nr> <on> \n"
- " - switch LED <nr> <on>\n"
- "pati flash mem [SrcAddr]\n"
- " - updates U-Boot with image in memory\n"
- "pati eeprom <cmd> - PCI EEPROM sub-system\n"
- " read <addr> <offset> <size>\n"
- " - read PCI EEPROM to <addr> from <offset> <size> words\n"
- " write <addr> <offset> <size>\n"
- " - write PCI EEPROM from <addr> to <offset> <size> words\n"
- " prg - programm PCI EEPROM with default values\n"
- " era - erase PCI EEPROM (write all word to 0xffff)\n"
- " reload- Reload PCI Bridge with EEPROM Values\n"
- " NOTE: <addr> must start on word boundary\n"
- " <offset> and <size> must be even byte values\n"
-);
-
-/* ------------------------------------------------------------------------- */
diff --git a/board/mpl/pati/config.mk b/board/mpl/pati/config.mk
deleted file mode 100644
index b8a098591e..0000000000
--- a/board/mpl/pati/config.mk
+++ /dev/null
@@ -1,31 +0,0 @@
-#
-# (C) Copyright 2003
-# Martin Winistoerfer, martinwinistoerfer@gmx.ch.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# EPQ Board Configuration
-#
-
-# Boot from flash at location 0x00000000
-TEXT_BASE = 0xFFF00000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)
diff --git a/board/mpl/pati/pati.c b/board/mpl/pati/pati.c
deleted file mode 100644
index 0355b65b84..0000000000
--- a/board/mpl/pati/pati.c
+++ /dev/null
@@ -1,618 +0,0 @@
-/*
- * (C) Copyright 2003
- * Martin Winistoerfer, martinwinistoerfer@gmx.ch.
- * Atapted for PATI
- * Denis Peter, d.peter@mpl.ch
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/***********************************************************************************
- * Bits for the SDRAM controller
- * -----------------------------
- *
- * CAL: CAS Latency. If cleared to 0 (default) the SDRAM controller asserts TA# on
- * the 2nd Clock after ACTIVE command (CAS Latency = 2). If set to 1 the SDRAM
- * controller asserts TA# on the 3rd Clock after ACTIVE command (CAS Latency = 3).
- * RCD: RCD ACTIVE to READ or WRITE Delay (Ras to Cas Delay). If cleared 0 (default)
- * tRCD of the SDRAM must equal or less 25ns. If set to 1 tRCD must be equal or less 50ns.
- * WREC:Write Recovery. If cleared 0 (default) tWR of the SDRAM must equal or less 25ns.
- * If set to 1 tWR must be equal or less 50ns.
- * RP: Precharge Command Time. If cleared 0 (default) tRP of the SDRAM must equal or less
- * 25ns. If set to 1 tRP must be equal or less 50ns.
- * RC: Auto Refresh to Active Time. If cleared 0 (default) tRC of the SDRAM must equal
- * or less 75ns. If set to 1 tRC must be equal or less 100ns.
- * LMR: Bit to set the Mode Register of the SDRAM. If set, the next access to the SDRAM
- * is the Load Mode Register Command.
- * IIP: Init in progress. Set to 1 for starting the init sequence
- * (Precharge All). As long this bit is set, the Precharge All is still in progress.
- * After command has completed, wait at least for 8 refresh (200usec) before proceed.
- **********************************************************************************/
-
-#include <common.h>
-#include <mpc5xx.h>
-#include <devices.h>
-#include <pci_ids.h>
-#define PLX9056_LOC
-#include "plx9056.h"
-#include "pati.h"
-
-#if defined(__APPLE__)
-/* Leading underscore on symbols */
-# define SYM_CHAR "_"
-#else /* No leading character on symbols */
-# define SYM_CHAR
-#endif
-
-#undef SDRAM_DEBUG
-/*
- * Macros to generate global absolutes.
- */
-#define GEN_SYMNAME(str) SYM_CHAR #str
-#define GEN_VALUE(str) #str
-#define GEN_ABS(name, value) \
- asm (".globl " GEN_SYMNAME(name)); \
- asm (GEN_SYMNAME(name) " = " GEN_VALUE(value))
-
-
-/************************************************************************
- * Early debug routines
- */
-void write_hex (unsigned char i)
-{
- char cc;
-
- cc = i >> 4;
- cc &= 0xf;
- if (cc > 9)
- serial_putc (cc + 55);
- else
- serial_putc (cc + 48);
- cc = i & 0xf;
- if (cc > 9)
- serial_putc (cc + 55);
- else
- serial_putc (cc + 48);
-}
-
-#if defined(SDRAM_DEBUG)
-
-void write_4hex (unsigned long val)
-{
- write_hex ((unsigned char) (val >> 24));
- write_hex ((unsigned char) (val >> 16));
- write_hex ((unsigned char) (val >> 8));
- write_hex ((unsigned char) val);
-}
-
-#endif
-
-unsigned long in32(unsigned long addr)
-{
- unsigned long *p=(unsigned long *)addr;
- return *p;
-}
-
-void out32(unsigned long addr,unsigned long data)
-{
- unsigned long *p=(unsigned long *)addr;
- *p=data;
-}
-
-typedef struct {
- unsigned short boardtype; /* Board revision and Population Options */
- unsigned char cal; /* cas Latency 0:CAL=2 1:CAL=3 */
- unsigned char rcd; /* ras to cas delay 0:<25ns 1:<50ns*/
- unsigned char wrec; /* write recovery 0:<25ns 1:<50ns */
- unsigned char pr; /* Precharge Command Time 0:<25ns 1:<50ns */
- unsigned char rc; /* Auto Refresh to Active Time 0:<75ns 1:<100ns */
- unsigned char sz; /* log binary => Size = (4MByte<<sz) 5 = 128, 4 = 64, 3 = 32, 2 = 16, 1=8 */
-} sdram_t;
-
-const sdram_t sdram_table[] = {
- { 0x0000, /* PATI Rev A, 16MByte -1 Board */
- 1, /* Case Latenty = 3 */
- 0, /* ras to cas delay 0 (20ns) */
- 0, /* write recovery 0:<25ns 1:<50ns*/
- 0, /* Precharge Command Time 0 (20ns) */
- 0, /* Auto Refresh to Active Time 0 (68) */
- 2 /* log binary => Size 2 = 16MByte, 1=8 */
- },
- { 0xffff, /* terminator */
- 0xff,
- 0xff,
- 0xff,
- 0xff,
- 0xff,
- 0xff }
-};
-
-
-extern int mem_test (unsigned long start, unsigned long ramsize, int quiet);
-extern void mem_test_reloc(void);
-
-/*
- * Get RAM size.
- */
-long int initdram(int board_type)
-{
- unsigned char board_rev;
- unsigned long reg;
- unsigned long lmr;
- int i,timeout;
-
-#if defined(SDRAM_DEBUG)
- reg=in32(PLD_CONFIG_BASE+PLD_PART_ID);
- puts("\n\nSYSTEM part 0x"); write_4hex(SYSCNTR_PART(reg));
- puts(" Vers 0x"); write_4hex(SYSCNTR_ID(reg));
- puts("\nSDRAM part 0x"); write_4hex(SDRAM_PART(reg));
- puts(" Vers 0x"); write_4hex(SDRAM_ID(reg));
- reg=in32(PLD_CONFIG_BASE+PLD_BOARD_TIMING);
- puts("\nBoard rev. 0x"); write_4hex(SYSCNTR_BREV(reg));
- putc('\n');
-#endif
- reg=in32(PLD_CONFIG_BASE+PLD_BOARD_TIMING);
- board_rev=(unsigned char)(SYSCNTR_BREV(reg));
- i=0;
- while(1) {
- if(sdram_table[i].boardtype==0xffff) {
- puts("ERROR, found no table for Board 0x");
- write_hex(board_rev);
- while(1);
- }
- if(sdram_table[i].boardtype==(unsigned char)board_rev)
- break;
- i++;
- }
- /* Set CAL, RCD, WREQ, PR and RC Bits */
-#if defined(SDRAM_DEBUG)
- puts("Set CAL, RCD, WREQ, PR and RC Bits\n");
-#endif
- /* mask bits */
- reg &= ~(SET_REG_BIT(1,SDRAM_CAL) | SET_REG_BIT(1,SDRAM_RCD) | SET_REG_BIT(1,SDRAM_WREQ) |
- SET_REG_BIT(1,SDRAM_PR) | SET_REG_BIT(1,SDRAM_RC) | SET_REG_BIT(1,SDRAM_LMR) |
- SET_REG_BIT(1,SDRAM_IIP) | SET_REG_BIT(1,SDRAM_RES0));
- /* set bits */
- reg |= (SET_REG_BIT(sdram_table[i].cal,SDRAM_CAL) |
- SET_REG_BIT(sdram_table[i].rcd,SDRAM_RCD) |
- SET_REG_BIT(sdram_table[i].wrec,SDRAM_WREQ) |
- SET_REG_BIT(sdram_table[i].pr,SDRAM_PR) |
- SET_REG_BIT(sdram_table[i].rc,SDRAM_RC));
-
- out32(PLD_CONFIG_BASE+PLD_BOARD_TIMING,reg);
- /* step 2 set IIP */
-#if defined(SDRAM_DEBUG)
- puts("step 2 set IIP\n");
-#endif
- /* step 2 set IIP */
- reg |= SET_REG_BIT(1,SDRAM_IIP);
- timeout=0;
- while (timeout!=0xffff) {
- __asm__ volatile("eieio");
- reg=in32(PLD_CONFIG_BASE+PLD_BOARD_TIMING);
- if((reg & SET_REG_BIT(1,SDRAM_IIP))==0)
- break;
- timeout++;
- udelay(1);
- }
- /* wait for at least 8 refresh */
- udelay(1000);
- /* set LMR */
- reg |= SET_REG_BIT(1,SDRAM_LMR);
- out32(PLD_CONFIG_BASE+PLD_BOARD_TIMING,reg);
- __asm__ volatile("eieio");
- lmr=0x00000002; /* sequential burst 4 data */
- if(sdram_table[i].cal==1)
- lmr|=0x00000030; /* cal = 3 */
- else
- lmr|=0000000020; /* cal = 2 */
- /* rest standard operation programmed write burst length */
- /* we have a x32 bit bus to the SDRAM, so shift the addr with 2 */
- lmr<<=2;
- in32(CFG_SDRAM_BASE + lmr);
- /* ok, we're done, return SDRAM size */
- return ((0x400000 << sdram_table[i].sz)); /* log2 value of 4MByte */
-}
-
-
-void set_flash_vpp(int ext_vpp, int ext_wp, int int_vpp)
-{
- unsigned long reg;
- reg=in32(PLD_CONF_REG2+PLD_CONFIG_BASE);
- reg &= ~(SET_REG_BIT(1,SYSCNTR_CPU_VPP) |
- SET_REG_BIT(1,SYSCNTR_FL_VPP) |
- SET_REG_BIT(1,SYSCNTR_FL_WP));
-
- reg |= (SET_REG_BIT(int_vpp,SYSCNTR_CPU_VPP) |
- SET_REG_BIT(ext_vpp,SYSCNTR_FL_VPP) |
- SET_REG_BIT(ext_wp,SYSCNTR_FL_WP));
- out32(PLD_CONF_REG2+PLD_CONFIG_BASE,reg);
- udelay(100);
-}
-
-
-void show_pld_regs(void)
-{
- unsigned long reg,reg1;
- reg=in32(PLD_CONFIG_BASE+PLD_PART_ID);
- printf("\nSYSTEM part %ld, Vers %ld\n",SYSCNTR_PART(reg),SYSCNTR_ID(reg));
- printf("SDRAM part %ld, Vers %ld\n",SDRAM_PART(reg),SDRAM_ID(reg));
- reg=in32(PLD_CONFIG_BASE+PLD_BOARD_TIMING);
- printf("Board rev. %c\n",(char) (SYSCNTR_BREV(reg)+'A'));
- printf("Waitstates %ld\n",GET_SYSCNTR_FLWAIT(reg));
- printf("SDRAM: CAL=%ld RCD=%ld WREQ=%ld PR=%ld\n RC=%ld LMR=%ld IIP=%ld\n",
- GET_REG_BIT(reg,SDRAM_CAL),GET_REG_BIT(reg,SDRAM_RCD),
- GET_REG_BIT(reg,SDRAM_WREQ),GET_REG_BIT(reg,SDRAM_PR),
- GET_REG_BIT(reg,SDRAM_RC),GET_REG_BIT(reg,SDRAM_LMR),
- GET_REG_BIT(reg,SDRAM_IIP));
- reg=in32(PLD_CONFIG_BASE+PLD_CONF_REG1);
- reg1=in32(PLD_CONFIG_BASE+PLD_CONF_REG2);
- printf("HW Config: FLAG=%ld IP=%ld index=%ld PRPM=%ld\n ICW=%ld ISB=%ld BDIS=%ld PCIM=%ld\n",
- GET_REG_BIT(reg,SYSCNTR_FLAG),GET_REG_BIT(reg,SYSCNTR_IP),
- GET_SYSCNTR_BOOTIND(reg),GET_REG_BIT(reg,SYSCNTR_PRM),
- GET_REG_BIT(reg,SYSCNTR_ICW),GET_SYSCNTR_ISB(reg),
- GET_REG_BIT(reg1,SYSCNTR_BDIS),GET_REG_BIT(reg1,SYSCNTR_PCIM));
- printf("Switches: MUX=%ld PCI_DIS=%ld Boot_EN=%ld Config=%ld\n",GET_SDRAM_MUX(reg),
- GET_REG_BIT(reg,SDRAM_PDIS),GET_REG_BIT(reg1,SYSCNTR_BOOTEN),
- GET_SYSCNTR_CFG(reg1));
- printf("Misc: RIP=%ld CPU_VPP=%ld FLSH_VPP=%ld FLSH_WP=%ld\n\n",
- GET_REG_BIT(reg,SDRAM_RIP),GET_REG_BIT(reg1,SYSCNTR_CPU_VPP),
- GET_REG_BIT(reg1,SYSCNTR_FL_VPP),GET_REG_BIT(reg1,SYSCNTR_FL_WP));
-}
-
-
-/****************************************************************
- * Setting IOs
- * -----------
- * GPIO6 is User LED1
- * GPIO7 is Interrupt PLX (Output)
- * GPIO5 is User LED0
- * GPIO2 is PLX USERi (Output)
- * GPIO1 is PLX Interrupt (Input)
- ****************************************************************/
- void init_ios(void)
- {
- volatile immap_t * immr = (immap_t *) CFG_IMMR;
- volatile sysconf5xx_t *sysconf = &immr->im_siu_conf;
- unsigned long reg;
- reg=sysconf->sc_sgpiocr; /* Data direction register */
- reg &= ~0x67000000;
- reg |= 0x27000000; /* set outpupts */
- sysconf->sc_sgpiocr=reg; /* Data direction register */
- reg=sysconf->sc_sgpiodt2; /* Data register */
- /* set output to 0 */
- reg &= ~0x27000000;
- /* set IRQ and USERi to 1 */
- reg |= 0x28000000;
- sysconf->sc_sgpiodt2=reg; /* Data register */
-}
-
-void user_led0(int led_on)
-{
- volatile immap_t * immr = (immap_t *) CFG_IMMR;
- volatile sysconf5xx_t *sysconf = &immr->im_siu_conf;
- unsigned long reg;
- reg=sysconf->sc_sgpiodt2; /* Data register */
- if(led_on) /* set output to 1 */
- reg |= 0x04000000;
- else
- reg &= ~0x04000000;
- sysconf->sc_sgpiodt2=reg; /* Data register */
-}
-
-void user_led1(int led_on)
-{
- volatile immap_t * immr = (immap_t *) CFG_IMMR;
- volatile sysconf5xx_t *sysconf = &immr->im_siu_conf;
- unsigned long reg;
- reg=sysconf->sc_sgpiodt2; /* Data register */
- if(led_on) /* set output to 1 */
- reg |= 0x02000000;
- else
- reg &= ~0x02000000;
- sysconf->sc_sgpiodt2=reg; /* Data register */
-}
-
-
-/****************************************************************
- * Last Stage Init
- ****************************************************************/
-int last_stage_init (void)
-{
- mem_test_reloc();
- init_ios();
- return 0;
-}
-
-/****************************************************************
- * Check the board
- ****************************************************************/
-
-#define BOARD_NAME "PATI"
-
-int checkboard (void)
-{
- unsigned char s[50];
- unsigned long reg;
- char rev;
- int i;
-
- puts ("\nBoard: ");
- reg=in32(PLD_CONFIG_BASE+PLD_BOARD_TIMING);
- rev=(char)(SYSCNTR_BREV(reg)+'A');
- i = getenv_r ("serial#", s, 32);
- if ((i == -1)) {
- puts ("### No HW ID - assuming " BOARD_NAME);
- printf(" Rev. %c\n",rev);
- }
- else {
- s[sizeof(BOARD_NAME)-1] = 0;
- printf ("%s-1 Rev %c SN: %s\n", s,rev,
- &s[sizeof(BOARD_NAME)]);
- }
- set_flash_vpp(1,0,0); /* set Flash VPP */
- return 0;
-}
-
-
-#ifdef CFG_PCI_CON_DEVICE
-/************************************************************************
- * PCI Communication
- *
- * Alive (Pinging):
- * ----------------
- * PCI Host sends message ALIVE, Local acknowledges with ALIVE
- *
- * PCI_CON console over PCI:
- * -------------------------
- * Local side:
- * - uses PCI9056_LOC_TO_PCI_DBELL register to signal that
- * data is avaible (PCIMSG_CONN)
- * - uses PCI9056_MAILBOX1 to send data
- * - uses PCI9056_MAILBOX0 to receive data
- * PCI side:
- * - uses PCI9056_PCI_TO_LOC_DBELL register to signal that
- * data is avaible (PCIMSG_CONN)
- * - uses PCI9056_MAILBOX0 to send data
- * - uses PCI9056_MAILBOX1 to receive data
- *
- * How it works:
- * Send:
- * - check if PCICON_TRANSMIT_REG is empty
- * - write data or'ed with 0x80000000 into the PCICON_TRANSMIT_REG
- * - write PCIMSG_CONN into the PCICON_DBELL_REG to signal a data
- * is waiting
- * Receive:
- * - get an interrupt via the PCICON_ACK_REG register message
- * PCIMSG_CONN
- * - write the data from the PCICON_RECEIVE_REG into the receive
- * buffer and if the receive buffer is not full, clear the
- * PCICON_RECEIVE_REG (this allows the counterpart to write more data)
- * - Clear the interrupt by writing 0xFFFFFFFF to the PCICON_ACK_REG
- *
- * The PCICON_RECEIVE_REG must be cleared by the routine which reads
- * the receive buffer if the buffer is not full any more
- *
- */
-
-#undef PCI_CON_DEBUG
-
-#ifdef PCI_CON_DEBUG
-#define PCI_CON_PRINTF(fmt,args...) serial_printf (fmt ,##args)
-#else
-#define PCI_CON_PRINTF(fmt,args...)
-#endif
-
-
-/*********************************************************
- * we work only with a receive buffer on eiter side.
- * Transmit buffer is free, if mailbox is cleared.
- * Transmit character is or'ed with 0x80000000
- * PATI receive register MAILBOX0
- * PATI transmit register MAILBOX1
- *********************************************************/
-#define PCICON_RECEIVE_REG PCI9056_MAILBOX0
-#define PCICON_TRANSMIT_REG PCI9056_MAILBOX1
-#define PCICON_DBELL_REG PCI9056_LOC_TO_PCI_DBELL
-#define PCICON_ACK_REG PCI9056_PCI_TO_LOC_DBELL
-
-
-#define PCIMSG_ALIVE 0x1
-#define PCIMSG_CONN 0x2
-#define PCIMSG_DISC 0x3
-#define PCIMSG_CON_DATA 0x5
-
-
-#define PCICON_GET_REG(x) (in32(x + PCI_CONFIG_BASE))
-#define PCICON_SET_REG(x,y) (out32(x + PCI_CONFIG_BASE,y))
-#define PCICON_TX_FLAG 0x80000000
-
-
-#define REC_BUFFER_SIZE 0x100
-int recbuf[REC_BUFFER_SIZE];
-static int r_ptr = 0;
-int w_ptr;
-device_t pci_con_dev;
-int conn=0;
-int buff_full=0;
-
-void pci_con_put_it(const char c)
-{
- /* Test for completition */
- unsigned long reg;
- do {
- reg=PCICON_GET_REG(PCICON_TRANSMIT_REG);
- }while(reg);
- reg=PCICON_TX_FLAG + c;
- PCICON_SET_REG(PCICON_TRANSMIT_REG,reg);
- PCICON_SET_REG(PCICON_DBELL_REG,PCIMSG_CON_DATA);
-}
-
-void pci_con_putc(const char c)
-{
- pci_con_put_it(c);
- if(c == '\n')
- pci_con_put_it('\r');
-}
-
-
-int pci_con_getc(void)
-{
- int res;
- int diff;
- while(r_ptr==(volatile int)w_ptr);
- res=recbuf[r_ptr++];
- if(r_ptr==REC_BUFFER_SIZE)
- r_ptr=0;
- if(w_ptr<r_ptr)
- diff=r_ptr+REC_BUFFER_SIZE-w_ptr;
- else
- diff=r_ptr-w_ptr;
- if((diff<(REC_BUFFER_SIZE-4)) && buff_full) {
- /* clear Mail box */
- buff_full=0;
- PCICON_SET_REG(PCICON_RECEIVE_REG,0L);
- }
- return res;
-}
-
-int pci_con_tstc(void)
-{
- if(r_ptr==(volatile int)w_ptr)
- return 0;
- return 1;
-}
-
-void pci_con_puts (const char *s)
-{
- while (*s) {
- pci_con_putc(*s);
- ++s;
- }
-}
-
-void pci_con_init (void)
-{
- w_ptr = 0;
- r_ptr = 0;
- PCICON_SET_REG(PCICON_RECEIVE_REG,0L);
- conn=1;
-}
-
-/*******************************************
- * IRQ routine
- ******************************************/
-int pci_dorbell_irq(void)
-{
- unsigned long reg,data;
- int diff;
- reg=PCICON_GET_REG(PCI9056_INT_CTRL_STAT);
- PCI_CON_PRINTF(" PCI9056_INT_CTRL_STAT = %08lX\n",reg);
- if(reg & (1<<20) ) {
- /* read doorbell */
- reg=PCICON_GET_REG(PCICON_ACK_REG);
- switch(reg) {
- case PCIMSG_ALIVE:
- PCI_CON_PRINTF(" Alive\n");
- PCICON_SET_REG(PCICON_DBELL_REG,PCIMSG_ALIVE);
- break;
- case PCIMSG_CONN:
- PCI_CON_PRINTF(" Conn %d",conn);
- w_ptr = 0;
- r_ptr = 0;
- buff_full=0;
- PCICON_SET_REG(PCICON_RECEIVE_REG,0L);
- conn=1;
- PCI_CON_PRINTF(" ... %d\n",conn);
- break;
- case PCIMSG_CON_DATA:
- data=PCICON_GET_REG(PCICON_RECEIVE_REG);
- recbuf[w_ptr++]=(int)(data&0xff);
- PCI_CON_PRINTF(" Data Console %lX, %X %d %d %X\n",data,((int)(data&0xFF)),
- r_ptr,w_ptr,recbuf[w_ptr-1]);
- if(w_ptr==REC_BUFFER_SIZE)
- w_ptr=0;
- if(w_ptr<r_ptr)
- diff=r_ptr+REC_BUFFER_SIZE-w_ptr;
- else
- diff=r_ptr-w_ptr;
- if(diff>(REC_BUFFER_SIZE-4))
- buff_full=1;
- else
- /* clear Mail box */
- PCICON_SET_REG(PCICON_RECEIVE_REG,0L);
- break;
- default:
- serial_printf(" PCI9056_PCI_TO_LOC_DBELL = %08lX\n",reg);
- }
- /* clear IRQ */
- PCICON_SET_REG(PCICON_ACK_REG,~0L);
- }
- return 0;
-}
-
-void pci_con_connect(void)
-{
- unsigned long reg;
- conn=0;
- reg=PCICON_GET_REG(PCI9056_INT_CTRL_STAT);
- /* default 0x0f010180 */
- reg &= 0xff000000;
- reg |= 0x00030000; /* enable local dorbell */
- reg |= 0x00000300; /* enable PCI dorbell */
- PCICON_SET_REG(PCI9056_INT_CTRL_STAT , reg);
- irq_install_handler (0x2, (interrupt_handler_t *) pci_dorbell_irq,NULL);
- memset (&pci_con_dev, 0, sizeof (pci_con_dev));
- strcpy (pci_con_dev.name, "pci_con");
- pci_con_dev.flags = DEV_FLAGS_OUTPUT | DEV_FLAGS_INPUT | DEV_FLAGS_SYSTEM;
- pci_con_dev.putc = pci_con_putc;
- pci_con_dev.puts = pci_con_puts;
- pci_con_dev.getc = pci_con_getc;
- pci_con_dev.tstc = pci_con_tstc;
- device_register (&pci_con_dev);
- printf("PATI ready for PCI connection, type ctrl-c for exit\n");
- do {
- udelay(10);
- if((volatile int)conn)
- break;
- if(ctrlc()) {
- irq_free_handler(0x2);
- return;
- }
- }while(1);
- console_assign(stdin,"pci_con");
- console_assign(stderr,"pci_con");
- console_assign(stdout,"pci_con");
-}
-
-void pci_con_disc(void)
-{
- console_assign(stdin,"serial");
- console_assign(stderr,"serial");
- console_assign(stdout,"serial");
- PCICON_SET_REG(PCICON_DBELL_REG,PCIMSG_DISC);
- /* reconnection */
- irq_free_handler(0x02);
- pci_con_connect();
-}
-#endif /* #ifdef CFG_PCI_CON_DEVICE */
-
-/*
- * Absolute environment address for linker file.
- */
-GEN_ABS(env_start, CFG_ENV_OFFSET + CFG_FLASH_BASE);
diff --git a/board/mpl/pati/pati.h b/board/mpl/pati/pati.h
deleted file mode 100644
index d5217724da..0000000000
--- a/board/mpl/pati/pati.h
+++ /dev/null
@@ -1,440 +0,0 @@
-/*
- * (C) Copyright 2003
- * Denis Peter, d.peter@mpl.ch
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-/************************************************************************
- * MACROS and register definitions for PATI Registers
- ************************************************************************/
-#ifndef __PATI_H_
-#define __PATI_H_ 1
-
-#define PLD_PART_ID 0x0
-#define PLD_BOARD_TIMING 0x4
-#define PLD_CONF_REG1 0x8
-#define PLD_CONF_REG2 0xC
-#define PLD_CONF_RES 0x10
-
-#define SET_REG_BIT(y,x) (y<<(31-x))
-#define GET_REG_BIT(y,x) ((y>>(31-x)) & 0x1L)
-
-/* SDRAM Controller PLD_PART_ID */
-/* 9 10 11 12 13 14 19 31 */
-#define SDRAM_PART3 9
-#define SDRAM_PART2 10
-#define SDRAM_PART1 11
-#define SDRAM_PART0 12
-#define SDRAM_ID3 13
-#define SDRAM_ID2 14
-#define SDRAM_ID1 19
-#define SDRAM_ID0 31
-
-#define SDRAM_PART(x) ( \
- (GET_REG_BIT(x,SDRAM_PART3)<<3) |\
- (GET_REG_BIT(x,SDRAM_PART2)<<2) |\
- (GET_REG_BIT(x,SDRAM_PART1)<<1) |\
- (GET_REG_BIT(x,SDRAM_PART0)))
-
-#define SDRAM_ID(x) ( \
- (GET_REG_BIT(x,SDRAM_ID3)<<3) |\
- (GET_REG_BIT(x,SDRAM_ID2)<<2) |\
- (GET_REG_BIT(x,SDRAM_ID1)<<1) |\
- (GET_REG_BIT(x,SDRAM_ID0)))
-
-/* System Controller */
-/* 0 1 3 4 5 16 20 28 29 30 */
-#define SYSCNTR_PART4 0
-#define SYSCNTR_PART3 1
-#define SYSCNTR_PART2 3
-#define SYSCNTR_PART1 4
-#define SYSCNTR_PART0 5
-#define SYSCNTR_ID4 16
-#define SYSCNTR_ID3 20
-#define SYSCNTR_ID2 28
-#define SYSCNTR_ID1 29
-#define SYSCNTR_ID0 30
-
-#define SYSCNTR_PART(x) ( \
- (GET_REG_BIT(x,SYSCNTR_PART4)<<4) |\
- (GET_REG_BIT(x,SYSCNTR_PART3)<<3) |\
- (GET_REG_BIT(x,SYSCNTR_PART2)<<2) |\
- (GET_REG_BIT(x,SYSCNTR_PART1)<<1) |\
- (GET_REG_BIT(x,SYSCNTR_PART0)))
-
-#define SYSCNTR_ID(x) ( \
- (GET_REG_BIT(x,SYSCNTR_ID4)<<4) |\
- (GET_REG_BIT(x,SYSCNTR_ID3)<<3) |\
- (GET_REG_BIT(x,SYSCNTR_ID2)<<2) |\
- (GET_REG_BIT(x,SYSCNTR_ID1)<<1) |\
- (GET_REG_BIT(x,SYSCNTR_ID0)))
-
-/* SDRAM Controller PLD_BOARD_TIMING */
-/* 9 10 11 12 13 14 19 31 */
-#define SDRAM_CAL 9
-#define SDRAM_RCD 10
-#define SDRAM_WREQ 11
-#define SDRAM_PR 12
-#define SDRAM_RC 13
-#define SDRAM_LMR 14
-#define SDRAM_IIP 19
-#define SDRAM_RES0 31
-/* System Controller */
-/* 0 1 3 4 5 16 20 28 29 30 */
-#define SYSCNTR_BREV0 0
-#define SYSCNTR_BREV1 1
-#define SYSCNTR_BREV2 3
-#define SYSCNTR_BREV3 4
-#define SYSCNTR_RES0 5
-#define SYSCNTR_RES1 16
-#define SYSCNTR_RES2 20
-#define SYSCNTR_FLWAIT2 28
-#define SYSCNTR_FLWAIT1 29
-#define SYSCNTR_FLWAIT0 30
-
-#define SYSCNTR_BREV(x) ( \
- (GET_REG_BIT(x,SYSCNTR_BREV3)<<3) |\
- (GET_REG_BIT(x,SYSCNTR_BREV2)<<2) |\
- (GET_REG_BIT(x,SYSCNTR_BREV1)<<1) |\
- (GET_REG_BIT(x,SYSCNTR_BREV0)))
-
-#define GET_SYSCNTR_FLWAIT(x) ( \
- (GET_REG_BIT(x,SYSCNTR_FLWAIT2)<<2) |\
- (GET_REG_BIT(x,SYSCNTR_FLWAIT1)<<1) |\
- (GET_REG_BIT(x,SYSCNTR_FLWAIT0)))
-
-#define SET_SYSCNTR_FLWAIT(x) ( \
- (SET_REG_BIT(((x & 0x04)!=0),SYSCNTR_FLWAIT2)) |\
- (SET_REG_BIT(((x & 0x02)!=0)x,SYSCNTR_FLWAIT1)) |\
- (SET_REG_BIT(((x & 0x01)!=0)x,SYSCNTR_FLWAIT0)))
-
-/* SDRAM Controller REG 2*/
-/* 9 10 11 12 13 14 19 31 */
-#define SDRAM_MUX0 9
-#define SDRAM_MUX1 10
-#define SDRAM_PDIS 11
-#define SDRAM_RES1 12
-#define SDRAM_RES2 13
-#define SDRAM_RES3 14
-#define SDRAM_RES4 19
-#define SDRAM_RIP 31
-
-#define GET_SDRAM_MUX(x) ( \
- (GET_REG_BIT(x,SDRAM_MUX1)<<1)| \
- (GET_REG_BIT(x,SDRAM_MUX0)))
-
-
-/* System Controller */
-/* 0 1 3 4 5 16 20 28 29 30 */
-#define SYSCNTR_FLAG 0
-#define SYSCNTR_IP 1
-#define SYSCNTR_BIND2 3
-#define SYSCNTR_BIND1 4
-#define SYSCNTR_BIND0 5
-#define SYSCNTR_PRM 16
-#define SYSCNTR_ICW 20
-#define SYSCNTR_ISB2 28
-#define SYSCNTR_ISB1 29
-#define SYSCNTR_ISB0 30
-
-#define GET_SYSCNTR_BOOTIND(x) ( \
- (GET_REG_BIT(x,SYSCNTR_BIND2)<<2) |\
- (GET_REG_BIT(x,SYSCNTR_BIND1)<<1) |\
- (GET_REG_BIT(x,SYSCNTR_BIND0)))
-
-#define SET_SYSCNTR_BOOTIND(x) ( \
- (SET_REG_BIT(((x & 0x04)!=0),SYSCNTR_BIND2)) |\
- (SET_REG_BIT(((x & 0x02)!=0)x,SYSCNTR_BIND1))| \
- (SET_REG_BIT(((x & 0x01)!=0)x,SYSCNTR_BIND0)))
-
-#define GET_SYSCNTR_ISB(x) ( \
- (GET_REG_BIT(x,SYSCNTR_ISB2)<<2)| \
- (GET_REG_BIT(x,SYSCNTR_ISB1)<<1)| \
- (GET_REG_BIT(x,SYSCNTR_ISB0)))
-
-#define SET_SYSCNTR_ISB(x) ( \
- (SET_REG_BIT(((x & 0x04)!=0),SYSCNTR_ISB2))| \
- (SET_REG_BIT(((x & 0x02)!=0)x,SYSCNTR_ISB))| \
- (SET_REG_BIT(((x & 0x01)!=0)x,SYSCNTR_ISB0)))
-
-/* SDRAM Controller REG 3*/
-/* 9 10 11 12 13 14 19 31 */
-#define SDRAM_RES5 9
-#define SDRAM_CFG1 10
-#define SDRAM_CFG2 11
-#define SDRAM_CFG3 12
-#define SDRAM_RES6 13
-#define SDRAM_CFG5 14
-#define SDRAM_CFG6 19
-#define SDRAM_RES7 31
-
-#define GET_SDRAM_CFG(x) ( \
- (GET_REG_BIT(x,SDRAM_CFG6)<<4) |\
- (GET_REG_BIT(x,SDRAM_CFG5)<<3) |\
- (GET_REG_BIT(x,SDRAM_CFG3)<<2) |\
- (GET_REG_BIT(x,SDRAM_CFG2)<<1) |\
- (GET_REG_BIT(x,SDRAM_CFG1)))
-
-/* System Controller */
-/* 0 1 3 4 5 16 20 28 29 30 */
-#define SYSCNTR_BDIS 0
-#define SYSCNTR_PCIM 1
-#define SYSCNTR_CFG0 3
-#define SYSCNTR_CFG1 4
-#define SYSCNTR_CFG2 5
-#define SYSCNTR_CFG3 16
-#define SYSCNTR_BOOTEN 20
-#define SYSCNTR_CPU_VPP 28
-#define SYSCNTR_FL_VPP 29
-#define SYSCNTR_FL_WP 30
-
-#define GET_SYSCNTR_CFG(x) ( \
- (GET_REG_BIT(x,SYSCNTR_CFG3)<<3)| \
- (GET_REG_BIT(x,SYSCNTR_CFG2)<<2)| \
- (GET_REG_BIT(x,SYSCNTR_CFG1)<<1)| \
- (GET_REG_BIT(x,SYSCNTR_CFG0)))
-
-
-/***************************************************************
- * MISC Defines
- ***************************************************************/
-
-#define PCI_VENDOR_ID_MPL 0x18E6
-#define PCI_DEVICE_ID_PATI 0x00DA
-
-#if defined(CONFIG_MIP405)
-#define PATI_FIRMWARE_START_OFFSET 0x00300000
-#define PATI_ISO_STRING "MEV-10084-001"
-#endif
-
-#define PATI_ENDIAN_MODE 0x3E
-
-/*******************************************
- * PATI Mapping:
- * -------------
- * PCI Map:
- * -------
- * All addreses are mapped into the memory area
- * (IO Area on some areas may also be possible)
- * - pci_cfg_mem_base: fixed address to the PLX config area size 512Bytes
- * - pci_space0_addr: configurable
- * - pci_space1_addr configurable
- *
- * Local Map:
- * ----------
- * Local addresses (Remap)
- * - SDRAM 0x06000000 Size 16MByte mask 0xff000000
- * - EPLD CFG 0x07000000 Size 512Bytes
- * - FLASH 0x03000000 Size up to 8MByte
- * - CPU 0x01000000 Size 4MByte (only accessable if special configured)
- *
- * Implemention:
- * -------------
- * To prevent using large resources reservation on the host following
- * PCI mapping is choosed:
- * - pci_cfg_mem_base: fixed address to the PLX config area size 512Bytes
- * - pci_space0_addr: configured to the EPLD Config Area size 256Bytes
- * - pci_space1_addr: configured to the SDRAM Area size 1MBytes, this
- * space is used to switch between SDRAM, Flash and CPU
- *
- */
-
-/* Attribute definitions */
-#define PATI_BUS_SIZE_8 0
-#define PATI_BUS_SIZE_16 1
-#define PATI_BUS_SIZE_32 3
-
-#define PATI_SPACE0_MASK (0xFEFFFE00) /* Mask Attributes */
-#define PATI_SPACE1_MASK (0x00000000) /* Mask Attributes */
-
-#define PATI_EXTRA_LONG_EEPROM 1
-
-#define SPACE0_TA_ENABLE (1<<6)
-#define SPACE1_TA_ENABLE (1<<6)
-
-/* Config Area */
-#define PATI_LOC_CFG_ADDR 0x07000000 /* Local Address */
-#define PATI_LOC_CFG_MASK 0xFFFFFF00 /* 256 Bytes */
-/* Attributes */
-#define PATI_LOC_CFG_BUS_SIZE PATI_BUS_SIZE_32 /* 32 Bit */
-#define PATI_LOC_CFG_BURST 0 /* No Burst */
-#define PATI_LOC_CFG_NO_PREFETCH 1 /* No Prefetch */
-#define PATI_LOC_CFG_TA_ENABLE 1 /* Enable TA */
-
-#define PATI_LOC_CFG_SPACE0_ATTR ( \
- PATI_LOC_CFG_BUS_SIZE | \
- (PATI_LOC_CFG_TA_ENABLE << 6) | \
- (PATI_LOC_CFG_NO_PREFETCH << 8) | \
- (PATI_LOC_CFG_BURST << 24) | \
- (PATI_EXTRA_LONG_EEPROM << 25))
-
-/* should never be used */
-#define PATI_LOC_CFG_SPACE1_ATTR ( \
- PATI_LOC_CFG_BUS_SIZE | \
- (PATI_LOC_CFG_TA_ENABLE << 6) | \
- (PATI_LOC_CFG_NO_PREFETCH << 9) | \
- (PATI_LOC_CFG_BURST << 8))
-
-
-/* SDRAM Area */
-#define PATI_LOC_SDRAM_ADDR 0x06000000 /* Local Address */
-#define PATI_LOC_SDRAM_MASK 0xFFF00000 /* 1MByte */
-/* Attributes */
-#define PATI_LOC_SDRAM_BUS_SIZE PATI_BUS_SIZE_32 /* 32 Bit */
-#define PATI_LOC_SDRAM_BURST 0 /* No Burst */
-#define PATI_LOC_SDRAM_NO_PREFETCH 0 /* Prefetch */
-#define PATI_LOC_SDRAM_TA_ENABLE 1 /* Enable TA */
-
-/* should never be used */
-#define PATI_LOC_SDRAM_SPACE0_ATTR ( \
- PATI_LOC_SDRAM_BUS_SIZE | \
- (PATI_LOC_SDRAM_TA_ENABLE << 6) | \
- (PATI_LOC_SDRAM_NO_PREFETCH << 8) | \
- (PATI_LOC_SDRAM_BURST << 24) | \
- (PATI_EXTRA_LONG_EEPROM << 25))
-
-#define PATI_LOC_SDRAM_SPACE1_ATTR ( \
- PATI_LOC_SDRAM_BUS_SIZE | \
- (PATI_LOC_SDRAM_TA_ENABLE << 6) | \
- (PATI_LOC_SDRAM_NO_PREFETCH << 9) | \
- (PATI_LOC_SDRAM_BURST << 8))
-
-
-/* Flash Area */
-#define PATI_LOC_FLASH_ADDR 0x03000000 /* Local Address */
-#define PATI_LOC_FLASH_MASK 0xFFF00000 /* 1MByte */
-/* Attributes */
-#define PATI_LOC_FLASH_BUS_SIZE PATI_BUS_SIZE_16 /* 16 Bit */
-#define PATI_LOC_FLASH_BURST 0 /* No Burst */
-#define PATI_LOC_FLASH_NO_PREFETCH 1 /* No Prefetch */
-#define PATI_LOC_FLASH_TA_ENABLE 1 /* Enable TA */
-
-/* should never be used */
-#define PATI_LOC_FLASH_SPACE0_ATTR ( \
- PATI_LOC_FLASH_BUS_SIZE | \
- (PATI_LOC_FLASH_TA_ENABLE << 6) | \
- (PATI_LOC_FLASH_NO_PREFETCH << 8) | \
- (PATI_LOC_FLASH_BURST << 24) | \
- (PATI_EXTRA_LONG_EEPROM << 25))
-
-#define PATI_LOC_FLASH_SPACE1_ATTR ( \
- PATI_LOC_FLASH_BUS_SIZE | \
- (PATI_LOC_FLASH_TA_ENABLE << 6) | \
- (PATI_LOC_FLASH_NO_PREFETCH << 9) | \
- (PATI_LOC_FLASH_BURST << 8))
-
-
-/* CPU Area */
-#define PATI_LOC_CPU_ADDR 0x01000000 /* Local Address */
-#define PATI_LOC_CPU_MASK 0xFFF00000 /* 1Mbyte */
-/* Attributes */
-#define PATI_LOC_CPU_BUS_SIZE PATI_BUS_SIZE_32 /* 32 Bit */
-#define PATI_LOC_CPU_BURST 0 /* No Burst */
-#define PATI_LOC_CPU_NO_PREFETCH 1 /* No Prefetch */
-#define PATI_LOC_CPU_TA_ENABLE 1 /* Enable TA */
-
-/* should never be used */
-#define PATI_LOC_CPU_SPACE0_ATTR ( \
- PATI_LOC_CPU_BUS_SIZE | \
- (PATI_LOC_CPU_TA_ENABLE << 6) | \
- (PATI_LOC_CPU_NO_PREFETCH << 8) | \
- (PATI_LOC_CPU_BURST << 24) | \
- (PATI_EXTRA_CPU_EEPROM << 25))
-
-#define PATI_LOC_CPU_SPACE1_ATTR ( \
- PATI_LOC_CPU_BUS_SIZE | \
- (PATI_LOC_CPU_TA_ENABLE << 6) | \
- (PATI_LOC_CPU_NO_PREFETCH << 9) | \
- (PATI_LOC_CPU_BURST << 8))
-
-/***************************************************
- * Hardware Config word definition
- ***************************************************/
-#define BOOT_EXT_FLASH 0x00000000
-#define BOOT_INT_FLASH 0x00000004
-#define BOOT_FROM_PCI 0x00000006
-#define BOOT_FROM_SDRAM 0x00000005
-
-#define ENABLE_INT_ARB 0x00000008
-
-#define INITIAL_IRQ_PREF 0x00000010
-
-#define INITIAL_MEM_0M 0x00000000
-#define INITIAL_MEM_4M 0x00000080
-#define INITIAL_MEM_8M 0x00000040
-#define INITIAL_MEM_12M 0x000000C0
-#define INITIAL_MEM_16M 0x00000020
-#define INITIAL_MEM_20M 0x000000A0
-#define INITIAL_MEM_24M 0x00000060
-#define INITIAL_MEM_28M 0x000000E0
-/* CONF */
-#define INTERNAL_HWCONF 0x00000100
-/* PRPM */
-#define LOCAL_CPU_SLAVE 0x00000200
-/* BDIS */
-#define DISABLE_MEM_CNTR 0x00000400
-/* PCIM */
-#define PCI_MASTER_ONLY 0x00000800
-
-
-#define PATI_HW_START ((BOOT_EXT_FLASH | INITIAL_MEM_28M | INITIAL_IRQ_PREF))
-#define PATI_HW_PCI_ONLY ((BOOT_EXT_FLASH | INITIAL_MEM_28M | INITIAL_IRQ_PREF | PCI_MASTER_ONLY))
-#define PATI_HW_CPU_ACC ((BOOT_EXT_FLASH | INITIAL_MEM_12M | INITIAL_IRQ_PREF | PCI_MASTER_ONLY))
-#define PATI_HW_CPU_SLAVE ((BOOT_EXT_FLASH | INITIAL_MEM_12M | INITIAL_IRQ_PREF | PCI_MASTER_ONLY | LOCAL_CPU_SLAVE))
-
-/***************************************************
- * Direct Master Config
- ***************************************************/
-#define PATI_DMASTER_PCI_ADDR 0x01000000
-#define PATI_BUS_MASTER 1
-
-
-#define PATI_DMASTER_MASK 0xFFF00000 /* 1MByte */
-#define PATI_DMASTER_ADDR 0x01000000 /* Local Address */
-
-#define PATI_DMASTER_MEMORY_EN 0x00000001 /* 0x00000001 */
-#define PATI_DMASTER_READ_AHEAD 0x00000004 /* 0x00000004 */
-#define PATI_DMASTER_READ_NOT_AHEAD 0x00000000 /* 0x00000004 */
-#define PATI_DMASTER_PRE_SIZE_CNTRL_0 0x00000000
-#define PATI_DMASTER_PRE_SIZE_CNTRL_4 0x00000008
-#define PATI_DMASTER_PRE_SIZE_CNTRL_8 0x00001000
-#define PATI_DMASTER_PRE_SIZE_CNTRL_16 0x00001008
-#define PATI_DMASTER_REL_PCI 0x00000000
-#define PATI_DMASTER_NOT_REL_PCI 0x00000010
-#define PATI_DMASTER_WR_INVAL 0x00000200
-#define PATI_DMASTER_NOT_WR_INVAL 0x00000000
-#define PATI_DMASTER_PRE_LIMIT 0x00000800
-#define PATI_DMASTER_PRE_CONT 0x00000000
-#define PATI_DMASTER_DELAY_WR_0 0x00000000
-#define PATI_DMASTER_DELAY_WR_4 0x00004000
-#define PATI_DMASTER_DELAY_WR_8 0x00008000
-#define PATI_DMASTER_DELAY_WR_16 0x0000C000
-
-#define PATI_DMASTER_PCI_ADDR_MASK 0xFFFF0000
-
-#define PATI_DMASTER_ATTR \
- PATI_DMASTER_MEMORY_EN | \
- PATI_DMASTER_READ_AHEAD | \
- PATI_DMASTER_PRE_SIZE_CNTRL_4 | \
- PATI_DMASTER_REL_PCI | \
- PATI_DMASTER_NOT_WR_INVAL | \
- PATI_DMASTER_PRE_LIMIT | \
- PATI_DMASTER_DELAY_WR_0
-
-
-#endif /* #ifndef __PATI_H_ */
diff --git a/board/mpl/pati/pci_eeprom.h b/board/mpl/pati/pci_eeprom.h
deleted file mode 100644
index 96588089ea..0000000000
--- a/board/mpl/pati/pci_eeprom.h
+++ /dev/null
@@ -1,91 +0,0 @@
-
-#ifndef __PCI_EEPROM_H_
-#define __PCI_EEPROM_H_ 1
-
-#include "pati.h"
-/******************************************************************************
- * Eeprom Support
- ******************************************************************************/
-/**********************************************
-* Definitions
-**********************************************/
-#define EE46_CMD_LEN 9 /* Bits in instructions */
-#define EE56_CMD_LEN 11 /* Bits in instructions */
-#define EE66_CMD_LEN 11 /* Bits in instructions */
-#define EE_READ 0x0180 /* 01 1000 0000 read instruction */
-#define EE_WRITE 0x0140 /* 01 0100 0000 write instruction */
-#define EE_WREN 0x0130 /* 01 0011 0000 write enable instruction */
-#define EE_WRALL 0x0110 /* 01 0001 0000 write all registers */
-#define EE_PRREAD 0x0180 /* 01 1000 0000 read address stored in Protect Register */
-#define EE_PRWRITE 0x0140 /* 01 0100 0000 write the address into PR */
-#define EE_WDS 0x0100 /* 01 0000 0000 write disable instruction */
-#define EE_PREN 0x0130 /* 01 0011 0000 protect enable instruction */
-#define EE_PRCLEAR 0x01FF /* 01 1111 1111 clear protect register instr */
-#define EE_PRDS 0x0100 /* 01 0000 0000 ONE TIME ONLY, permenant */
-
-/***************************************************
- * EEPROM
- ***************************************************/
-#define LOW_WORD(x) (((x) & 0xFFFF))
-#define HIGH_WORD(x) (((x) >> 16) & 0xFFFF)
-
-typedef struct pci_eeprom_t {
- unsigned short offset;
- unsigned short value;
-} pci_eeprom;
-
-static pci_eeprom pati_eeprom[] = {
- { 0x00,PCI_DEVICE_ID_PATI }, /* PCI Device ID PCIIDR[31:16] */
- { 0x02,PCI_VENDOR_ID_MPL }, /* PCI Vendor ID PCIIDR[15:0] */
- { 0x04,PCI_CLASS_PROCESSOR_POWERPC }, /* PCI Class Code PCICCR[23:8] */
- { 0x06,0x00BA }, /* PCI Class Code / PCI Revision ID PCICCR[7:0] / PCIREV[7:0] */
- { 0x08,0x0007 }, /* PCI Maximum Latency / PCI Minimum Grant PCIMLR[7:0] / PCIMGR[7:0] */
- { 0x0A,0x0100 }, /* PCI Interrupt Pin / PCI Interrupt Line PCIIPR[7:0] / PCIILR[7:0] */
- { 0x0C,0x0000 }, /* MSW of Mailbox 0 (User Defined) PCI9056_MAILBOX0[31:16] */
- { 0x0E,0x0000 }, /* LSW of Mailbox 0 (User Defined) PCI9056_MAILBOX0[15:0] */
- { 0x10,0x0000 }, /* MSW of Mailbox 1 (User Defined) PCI9056_MAILBOX1[31:16] */
- { 0x12,0x0000 }, /* LSW of Mailbox 1 (User Defined) PCI9056_MAILBOX1[15:0] */
- { 0x14,HIGH_WORD(PATI_LOC_CFG_MASK) }, /* MSW of Direct Slave Local Address Space 0 Range LAS0RR[31:16] */
- { 0x16,LOW_WORD(PATI_LOC_CFG_MASK) }, /* LSW of Direct Slave Local Address Space 0 Range LAS0RR[15:0] */
- { 0x18,HIGH_WORD(PATI_LOC_CFG_ADDR) }, /* MSW of Direct Slave Local Address Space 0 Local Base Address (Remap) LAS0BA[31:16] (CFG) */
- { 0x1A,LOW_WORD(PATI_LOC_CFG_ADDR)|1 }, /* LSW of Direct Slave Local Address Space 0 Local Base Address (Remap) LAS0BA[15:2, 0], Reserved [1] */
- { 0x1C,0x0000 }, /* MSW of Mode/DMA Arbitration MARBR[31, 29:16] or DMAARB[31, 29:16], Reserved [30] */
- { 0x1E,0x0000 }, /* LSW of Mode/DMA Arbitration MARBR[15:0] or DMAARB[15:0] */
- { 0x20,0x0030 }, /* Local Miscellaneous Control 2 / Serial EEPROM WP Addr Boundary LMISC2[5:0], Res[7:6] / PROT_AREA[6:0], Res[7] */
- { 0x22,0x0510 }, /* Local Miscellaneous Control 1 / Local Bus Big/Little Endian Descriptor LMISC1[7:0] / BIGEND[7:0] */
- { 0x24,0x0000 }, /* MSW of Direct Slave Expansion ROM Range EROMRR[31:16] */
- { 0x26,0x0000 }, /* LSW of Direct Slave Expansion ROM Range EROMRR[15:11, 0], Reserved [10:1] */
- { 0x28,0x0000 }, /* MSW of Direct Slave Expansion ROM Local Base Address (Remap) and BREQo Control EROMBA[31:16] */
- { 0x2A,0x0000 }, /* LSW of Direct Slave Expansion ROM Local Base Address (Remap) and BREQo Control EROMBA[15:11, 5:0], Reserved [10:6] */
- { 0x2C,(0x4243 | HIGH_WORD((PATI_LOC_CFG_SPACE0_ATTR))) }, /* MSW of Local Address Space 0/Expansion ROM Bus Region Descriptor LBRD0[31:16] */
- { 0x2E,LOW_WORD(PATI_LOC_CFG_SPACE0_ATTR) }, /* LSW of Local Address Space 0/Expansion ROM Bus Region Descriptor LBRD0[15:0] */
- { 0x30,HIGH_WORD(PATI_DMASTER_MASK) }, /* MSW of Local Range for Direct Master-to-PCI DMRR[31:16] */
- { 0x32,LOW_WORD(PATI_DMASTER_MASK) }, /* LSW of Local Range for Direct Master-to-PCI (Reserved) DMRR[15:0] */
- { 0x34,HIGH_WORD(PATI_DMASTER_ADDR) }, /* MSW of Local Base Address for Direct Master-to-PCI Memory DMLBAM[31:16] */
- { 0x36,LOW_WORD(PATI_DMASTER_ADDR) }, /* LSW of Local Base Address for Direct Master-to-PCI Memory (Reserved) DMLBAM[15:0] */
- { 0x38,0x0000 }, /* MSW of Local Bus Address for Direct Master-to-PCI I/O Configuration DMLBAI[31:16] */
- { 0x3A,0x0000 }, /* LSW of Local Bus Address for Direct Master-to-PCI I/O Configuration (Reserved) DMLBAI[15:0] */
- { 0x3C,0x0000 }, /* MSW of PCI Base Address (Remap) for Direct Master-to-PCI Memory DMPBAM[31:16] */
- { 0x3E,0x0000 }, /* LSW of PCI Base Address (Remap) for Direct Master-to-PCI Memory DMPBAM[15:0] */
- { 0x40,0x0000 }, /* MSW of PCI Configuration Address for Direct Master-to-PCI I/O Configuration DMCFGA[31, 23:16] Reserved [30:24]*/
- { 0x42,0x0000 }, /* LSW of PCI Configuration Address for Direct Master-to-PCI I/O Configuration DMCFGA[15:0] */
- { 0x44,0x0000 }, /* PCI Subsystem ID PCISID[15:0] */
- { 0x46,0x0000 }, /* PCI Subsystem Vendor ID PCISVID[15:0] */
- { 0x48,HIGH_WORD(PATI_LOC_SDRAM_MASK) }, /* MSW of Direct Slave Local Address Space 1 Range (1 MB) LAS1RR[31:16] */
- { 0x4A,LOW_WORD(PATI_LOC_SDRAM_MASK) }, /* LSW of Direct Slave Local Address Space 1 Range (1 MB) LAS1RR[15:0] */
- { 0x4C,HIGH_WORD(PATI_LOC_SDRAM_ADDR) }, /* MSW of Direct Slave Local Address Space 1 Local Base Address (Remap) LAS1BA[31:16] (SDRAM) */
- { 0x4E,LOW_WORD(PATI_LOC_SDRAM_ADDR) | 0x1 }, /* LSW of Direct Slave Local Address Space 1 Local Base Address (Remap) LAS1BA[15:2, 0], Reserved [1] */
- { 0x50,HIGH_WORD(PATI_LOC_SDRAM_SPACE1_ATTR) }, /* MSW of Local Address Space 1 Bus Region Descriptor LBRD1[31:16] */
- { 0x52,LOW_WORD(PATI_LOC_SDRAM_SPACE1_ATTR) }, /* LSW of Local Address Space 1 Bus Region Descriptor (Reserved) LBRD1[15:0] */
- { 0x54,0x0000 }, /* Hot Swap Control/Status (Reserved) Reserved */
- { 0x56,0x0000 }, /* Hot Swap Next Capability Pointer / Hot Swap Control HS_NEXT[7:0] / HS_CNTL[7:0] */
- { 0x58,0x0000 }, /* Reserved Reserved */
- { 0x5A,0x0000 }, /* PCI Arbiter Control PCIARB[3:0], Reserved [15:4] */
- { 0x5C,0x0000 }, /* Power Management Capabilities PMC[15:9, 2:0] */
- { 0x5E,0x0000 }, /* Power Management Next Capability Pointer (Reserved) / Power Management Capability ID (Reserved) Reserved*/
- { 0x60,0x0000 }, /* Power Management Data / PMCSR Bridge Support Extension (Reserved) PMDATA[7:0] / Reserved */
- { 0x62,0x0000 }, /* Power Management Control/Status PMCSR[14:8] */
- { 0xFFFF,0xFFFF} /* terminaror */
-};
-#define PATI_EEPROM_LAST_OFFSET 0x64
-#endif /* #ifndef __PCI_EEPROM_H_ */
diff --git a/board/mpl/pati/plx9056.h b/board/mpl/pati/plx9056.h
deleted file mode 100644
index cd4df18eba..0000000000
--- a/board/mpl/pati/plx9056.h
+++ /dev/null
@@ -1,111 +0,0 @@
-/*
- * (C) Copyright 2003
- * Denis Peter, d.peter@mpl.ch
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-/* PLX9096 register definitions
-*/
-#ifndef __PLX9056_H_
-#define __PLX9056_H_ 1
-
-#include <pci.h>
-
-#ifdef PLX9056_LOC
-#define LOCAL_OFFSET 0x080
-/* PCI Config regs */
-#else
-#define LOCAL_OFFSET 0x000
-#endif
-
-#define PCI9056_VENDOR_ID PCI_VENDOR_ID
-/*#define PCI9656_DEVICE_ID PCI_DEVICE_ID */
-#define PCI9056_COMMAND PCI_COMMAND
-/*#define PCI9656_STATUS PCI_STATUS */
-#define PCI9056_REVISION PCI_REVISION_ID
-
-#define PCI9056_CACHE_SIZE PCI_CACHE_LINE_SIZE
-#define PCI9056_RTR_BASE PCI_BASE_ADDRESS_0
-#define PCI9056_RTR_IO_BASE PCI_BASE_ADDRESS_1
-#define PCI9056_LOCAL_BASE0 PCI_BASE_ADDRESS_2
-#define PCI9056_LOCAL_BASE1 PCI_BASE_ADDRESS_3
-#define PCI9056_UNUSED_BASE1 PCI_BASE_ADDRESS_4
-#define PCI9056_UNUSED_BASE2 PCI_BASE_ADDRESS_5
-#define PCI9056_CIS_PTR PCI_CARDBUS_CIS
-#define PCI9056_SUB_ID PCI_SUBSYSTEM_VENDOR_ID
-#define PCI9056_EXP_ROM_BASE PCI_ROM_ADDRESS
-#define PCI9056_CAP_PTR PCI_CAPABILITY_LIST
-#define PCI9056_INT_LINE PCI_INTERRUPT_LINE
-
-#if defined(PLX9056_LOC)
- #define PCI9056_PM_CAP_ID 0x180
- #define PCI9056_PM_CSR 0x184
- #define PCI9056_HS_CAP_ID 0x188
- #define PCI9056_VPD_CAP_ID 0x18C
- #define PCI9056_VPD_DATA 0x190
-#endif
-
-
-#define PCI_DEVICE_ID_PLX9056 0x9056
-
-/* Local Configuration Registers Accessible via the PCI Base address + Variable */
-#define PCI9056_SPACE0_RANGE (0x000 + LOCAL_OFFSET)
-#define PCI9056_SPACE0_REMAP (0x004 + LOCAL_OFFSET)
-#define PCI9056_LOCAL_DMA_ARBIT (0x008 + LOCAL_OFFSET)
-#define PCI9056_ENDIAN_DESC (0x00c + LOCAL_OFFSET)
-#define PCI9056_EXP_ROM_RANGE (0x010 + LOCAL_OFFSET)
-#define PCI9056_EXP_ROM_REMAP (0x014 + LOCAL_OFFSET)
-#define PCI9056_SPACE0_ROM_DESC (0x018 + LOCAL_OFFSET)
-#define PCI9056_DM_RANGE (0x01c + LOCAL_OFFSET)
-#define PCI9056_DM_MEM_BASE (0x020 + LOCAL_OFFSET)
-#define PCI9056_DM_IO_BASE (0x024 + LOCAL_OFFSET)
-#define PCI9056_DM_PCI_MEM_REMAP (0x028 + LOCAL_OFFSET)
-#define PCI9056_DM_PCI_IO_CONFIG (0x02c + LOCAL_OFFSET)
-#define PCI9056_SPACE1_RANGE (0x0f0 + LOCAL_OFFSET)
-#define PCI9056_SPACE1_REMAP (0x0f4 + LOCAL_OFFSET)
-#define PCI9056_SPACE1_DESC (0x0f8 + LOCAL_OFFSET)
-#define PCI9056_DM_DAC (0x0fc + LOCAL_OFFSET)
-
-#ifdef PLX9056_LOC
-#define PCI9056_ARBITER_CTRL 0x1A0
-#define PCI9056_ABORT_ADDRESS 0x1A4
-#endif
-
-/* Runtime registers PCI Address + LOCAL_OFFSET */
-#ifdef PLX9056_LOC
-#define PCI9056_MAILBOX0 0x0C0
-#define PCI9056_MAILBOX1 0x0C4
-#else
-#define PCI9056_MAILBOX0 0x078
-#define PCI9056_MAILBOX1 0x07c
-#endif
-
-#define PCI9056_MAILBOX2 (0x048 + LOCAL_OFFSET)
-#define PCI9056_MAILBOX3 (0x04c + LOCAL_OFFSET)
-#define PCI9056_MAILBOX4 (0x050 + LOCAL_OFFSET)
-#define PCI9056_MAILBOX5 (0x054 + LOCAL_OFFSET)
-#define PCI9056_MAILBOX6 (0x058 + LOCAL_OFFSET)
-#define PCI9056_MAILBOX7 (0x05c + LOCAL_OFFSET)
-#define PCI9056_PCI_TO_LOC_DBELL (0x060 + LOCAL_OFFSET)
-#define PCI9056_LOC_TO_PCI_DBELL (0x064 + LOCAL_OFFSET)
-#define PCI9056_INT_CTRL_STAT (0x068 + LOCAL_OFFSET)
-#define PCI9056_EEPROM_CTRL_STAT (0x06c + LOCAL_OFFSET)
-#define PCI9056_PERM_VENDOR_ID (0x070 + LOCAL_OFFSET)
-#define PCI9056_REVISION_ID (0x074 + LOCAL_OFFSET)
-
-#endif /* #ifndef __PLX9056_H_ */
diff --git a/board/mpl/pati/u-boot.lds b/board/mpl/pati/u-boot.lds
deleted file mode 100644
index 5b03fef66c..0000000000
--- a/board/mpl/pati/u-boot.lds
+++ /dev/null
@@ -1,140 +0,0 @@
-/*
- * (C) Copyright 2001 Wolfgang Denk, DENX Software Engineering, wd@denx.de
- * (C) Copyright 2003 Martin Winistoerfer, martinwinistoerfer@gmx.ch
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc5xx/start.o (.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
-
- _end = . ;
- PROVIDE (end = .);
-/* . = env_start;
- .ppcenv :
- {
- common/environment.o (.ppcenv)
- }
-*/
-}
diff --git a/board/mpl/pip405/Makefile b/board/mpl/pip405/Makefile
deleted file mode 100644
index a818d08a59..0000000000
--- a/board/mpl/pip405/Makefile
+++ /dev/null
@@ -1,52 +0,0 @@
-#
-# (C) Copyright 2000, 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o \
- ../common/flash.o cmd_pip405.o ../common/pci.o \
- ../common/isa.o ../common/kbd.o \
- ../common/usb_uhci.o \
- ../common/memtst.o ../common/common_util.o
-
-SOBJS = init.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/mpl/pip405/cmd_pip405.c b/board/mpl/pip405/cmd_pip405.c
deleted file mode 100644
index 1bf4d7bd87..0000000000
--- a/board/mpl/pip405/cmd_pip405.c
+++ /dev/null
@@ -1,69 +0,0 @@
-/*
- * (C) Copyright 2001
- * Denis Peter, MPL AG Switzerland, d.peter@mpl.ch
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- * hacked for PIP405
- */
-
-#include <common.h>
-#include <command.h>
-#include "pip405.h"
-#include "../common/common_util.h"
-
-
-extern void print_pip405_info(void);
-extern int do_mplcommon(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
-
-
-/* ------------------------------------------------------------------------- */
-
-int do_pip405(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
-
- ulong led_on,led_nr;
-
- if (strcmp(argv[1], "info") == 0)
- {
- print_pip405_info();
- return 0;
- }
- if (strcmp(argv[1], "led") == 0)
- {
- led_nr = (ulong)simple_strtoul(argv[2], NULL, 10);
- led_on = (ulong)simple_strtoul(argv[3], NULL, 10);
- if(!led_nr)
- user_led0(led_on);
- else
- user_led1(led_on);
- return 0;
- }
-
- return (do_mplcommon(cmdtp, flag, argc, argv));
-}
-U_BOOT_CMD(
- pip405, 6, 1, do_pip405,
- "pip405 - PIP405 specific Cmds\n",
- "flash mem [SrcAddr] - updates U-Boot with image in memory\n"
- "pip405 flash floppy [SrcAddr] - updates U-Boot with image from floppy\n"
- "pip405 flash mps - updates U-Boot with image from MPS\n"
-);
-
-/* ------------------------------------------------------------------------- */
diff --git a/board/mpl/pip405/config.mk b/board/mpl/pip405/config.mk
deleted file mode 100644
index 0f8d153d8e..0000000000
--- a/board/mpl/pip405/config.mk
+++ /dev/null
@@ -1,29 +0,0 @@
-#
-# (C) Copyright 2000, 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# esd ADCIOP boards
-#
-
-#TEXT_BASE = 0xFFFE0000
-TEXT_BASE = 0xFFF80000
diff --git a/board/mpl/pip405/init.S b/board/mpl/pip405/init.S
deleted file mode 100644
index 39f2ea534a..0000000000
--- a/board/mpl/pip405/init.S
+++ /dev/null
@@ -1,230 +0,0 @@
-/*------------------------------------------------------------------------------+
- *
- * This source code has been made available to you by IBM on an AS-IS
- * basis. Anyone receiving this source is licensed under IBM
- * copyrights to use it in any way he or she deems fit, including
- * copying it, modifying it, compiling it, and redistributing it either
- * with or without modifications. No license under IBM patents or
- * patent applications is to be implied by the copyright license.
- *
- * Any user of this software should understand that IBM cannot provide
- * technical support for this software and will not be responsible for
- * any consequences resulting from the use of this software.
- *
- * Any person who transfers this source code or any derivative work
- * must include the IBM copyright notice, this paragraph, and the
- * preceding two paragraphs in the transferred software.
- *
- * COPYRIGHT I B M CORPORATION 1995
- * LICENSED MATERIAL - PROGRAM PROPERTY OF I B M
- *-------------------------------------------------------------------------------*/
-
-/*-----------------------------------------------------------------------------
- * Function: ext_bus_cntlr_init
- * Description: Initializes the External Bus Controller for the external
- * peripherals. IMPORTANT: For pass1 this code must run from
- * cache since you can not reliably change a peripheral banks
- * timing register (pbxap) while running code from that bank.
- * For ex., since we are running from ROM on bank 0, we can NOT
- * execute the code that modifies bank 0 timings from ROM, so
- * we run it from cache.
- * Bank 0 - Flash or Multi Purpose Socket
- * Bank 1 - Multi Purpose Socket or Flash
- * Bank 2 - not used
- * Bank 3 - not used
- * Bank 4 - not used
- * Bank 5 - not used
- * Bank 6 - used to switch on the 12V for the Multipurpose socket
- * Bank 7 - Config Register
- *-----------------------------------------------------------------------------*/
-#include <ppc4xx.h>
-
-#define _LINUX_CONFIG_H 1 /* avoid reading Linux autoconf.h file */
-
-#include <configs/PIP405.h>
-#include <ppc_asm.tmpl>
-#include <ppc_defs.h>
-
-#include <asm/cache.h>
-#include <asm/mmu.h>
-#include "pip405.h"
-
- .globl ext_bus_cntlr_init
- ext_bus_cntlr_init:
- mflr r4 /* save link register */
- mfdcr r3,strap /* get strapping reg */
- andi. r0, r3, PSR_ROM_LOC /* mask out irrelevant bits */
- bnelr /* jump back if PCI boot */
-
- bl ..getAddr
-..getAddr:
- mflr r3 /* get address of ..getAddr */
- mtlr r4 /* restore link register */
- addi r4,0,14 /* set ctr to 14; used to prefetch */
- mtctr r4 /* 14 cache lines to fit this function */
- /* in cache (gives us 8x14=112 instrctns) */
-..ebcloop:
- icbt r0,r3 /* prefetch cache line for addr in r3 */
- addi r3,r3,32 /* move to next cache line */
- bdnz ..ebcloop /* continue for 14 cache lines */
-
- /*-------------------------------------------------------------------
- * Delay to ensure all accesses to ROM are complete before changing
- * bank 0 timings.
- *------------------------------------------------------------------- */
- addis r3,0,0x0
- ori r3,r3,0xA000
- mtctr r3
-..spinlp:
- bdnz ..spinlp /* spin loop */
-
- /*-----------------------------------------------------------------------
- * decide boot up mode
- *----------------------------------------------------------------------- */
- addi r4,0,pb0cr
- mtdcr ebccfga,r4
- mfdcr r4,ebccfgd
-
- andi. r0, r4, 0x2000 /* mask out irrelevant bits */
- beq 0f /* jump if 8 bit bus width */
-
- /* setup 16 bit things
- *-----------------------------------------------------------------------
- * Memory Bank 0 (16 Bit Flash) initialization
- *---------------------------------------------------------------------- */
-
- addi r4,0,pb0ap
- mtdcr ebccfga,r4
- addis r4,0,(FLASH_AP_B)@h
- ori r4,r4,(FLASH_AP_B)@l
- mtdcr ebccfgd,r4
-
- addi r4,0,pb0cr
- mtdcr ebccfga,r4
- /* BS=0x010(4MB),BU=0x3(R/W), */
- addis r4,0,(FLASH_CR_B)@h
- ori r4,r4,(FLASH_CR_B)@l
- mtdcr ebccfgd,r4
- b 1f
-
-0:
- /* 8Bit boot mode: */
- /*-----------------------------------------------------------------------
- * Memory Bank 0 Multi Purpose Socket initialization
- *----------------------------------------------------------------------- */
- /* 0x7F8FFE80 slowest boot */
- addi r4,0,pb0ap
- mtdcr ebccfga,r4
- addis r4,0,(MPS_AP_B)@h
- ori r4,r4,(MPS_AP_B)@l
- mtdcr ebccfgd,r4
-
- addi r4,0,pb0cr
- mtdcr ebccfga,r4
- /* BS=0x010(4MB),BU=0x3(R/W), */
- addis r4,0,(MPS_CR_B)@h
- ori r4,r4,(MPS_CR_B)@l
- mtdcr ebccfgd,r4
-
-
-1:
- /*-----------------------------------------------------------------------
- * Memory Bank 2-3-4-5-6 (not used) initialization
- *-----------------------------------------------------------------------*/
- addi r4,0,pb1cr
- mtdcr ebccfga,r4
- addis r4,0,0x0000
- ori r4,r4,0x0000
- mtdcr ebccfgd,r4
-
- addi r4,0,pb2cr
- mtdcr ebccfga,r4
- addis r4,0,0x0000
- ori r4,r4,0x0000
- mtdcr ebccfgd,r4
-
- addi r4,0,pb3cr
- mtdcr ebccfga,r4
- addis r4,0,0x0000
- ori r4,r4,0x0000
- mtdcr ebccfgd,r4
-
- addi r4,0,pb4cr
- mtdcr ebccfga,r4
- addis r4,0,0x0000
- ori r4,r4,0x0000
- mtdcr ebccfgd,r4
-
- addi r4,0,pb5cr
- mtdcr ebccfga,r4
- addis r4,0,0x0000
- ori r4,r4,0x0000
- mtdcr ebccfgd,r4
-
- addi r4,0,pb6cr
- mtdcr ebccfga,r4
- addis r4,0,0x0000
- ori r4,r4,0x0000
- mtdcr ebccfgd,r4
-
- addi r4,0,pb7cr
- mtdcr ebccfga,r4
- addis r4,0,0x0000
- ori r4,r4,0x0000
- mtdcr ebccfgd,r4
- nop /* pass2 DCR errata #8 */
- blr
-
-/*-----------------------------------------------------------------------------
- * Function: sdram_init
- * Description: Configures the internal SRAM memory. and setup the
- * Stackpointer in it.
- *----------------------------------------------------------------------------- */
- .globl sdram_init
-
-sdram_init:
-
-
- blr
-
-
-#if defined(CONFIG_BOOT_PCI)
- .section .bootpg,"ax"
- .globl _start_pci
-/*******************************************
- */
-
-_start_pci:
- /* first handle errata #68 / PCI_18 */
- iccci r0, r0 /* invalidate I-cache */
- lis r31, 0
- mticcr r31 /* ICCR = 0 (all uncachable) */
- isync
-
- mfccr0 r28 /* set CCR0[24] = 1 */
- ori r28, r28, 0x0080
- mtccr0 r28
-
- /* setup PMM0MA (0xEF400004) and PMM0PCIHA (0xEF40000C) */
- lis r28, 0xEF40
- addi r28, r28, 0x0004
- stw r31, 0x0C(r28) /* clear PMM0PCIHA */
- lis r29, 0xFFF8 /* open 512 kByte */
- addi r29, r29, 0x0001/* and enable this region */
- stwbrx r29, r0, r28 /* write PMM0MA */
-
- lis r28, 0xEEC0 /* address of PCIC0_CFGADDR */
- addi r29, r28, 4 /* add 4 to r29 -> PCIC0_CFGDATA */
-
- lis r31, 0x8000 /* set en bit bus 0 */
- ori r31, r31, 0x304C/* device 6 func 0 reg 4C (XBCS register) */
- stwbrx r31, r0, r28 /* write it */
-
- lwbrx r31, r0, r29 /* load XBCS register */
- oris r31, r31, 0x02C4/* clear BIOSCS WPE, set lower, extended and 1M extended BIOS enable */
- stwbrx r31, r0, r29 /* write back XBCS register */
-
- nop
- nop
- b _start /* normal start */
-#endif
diff --git a/board/mpl/pip405/pip405.c b/board/mpl/pip405/pip405.c
deleted file mode 100644
index a398362f96..0000000000
--- a/board/mpl/pip405/pip405.c
+++ /dev/null
@@ -1,960 +0,0 @@
-/*
- * (C) Copyright 2001
- * Denis Peter, MPL AG Switzerland, d.peter@mpl.ch
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- *
- * TODO: clean-up
- */
-
-#include <common.h>
-#include "pip405.h"
-#include <asm/processor.h>
-#include <i2c.h>
-#include "../common/isa.h"
-#include "../common/common_util.h"
-
-#undef SDRAM_DEBUG
-
-#define FALSE 0
-#define TRUE 1
-
-/* stdlib.h causes some compatibility problems; should fixe these! -- wd */
-#ifndef __ldiv_t_defined
-typedef struct {
- long int quot; /* Quotient */
- long int rem; /* Remainder */
-} ldiv_t;
-extern ldiv_t ldiv (long int __numer, long int __denom);
-
-# define __ldiv_t_defined 1
-#endif
-
-
-typedef enum {
- SDRAM_NO_ERR,
- SDRAM_SPD_COMM_ERR,
- SDRAM_SPD_CHKSUM_ERR,
- SDRAM_UNSUPPORTED_ERR,
- SDRAM_UNKNOWN_ERR
-} SDRAM_ERR;
-
-typedef struct {
- const unsigned char mode;
- const unsigned char row;
- const unsigned char col;
- const unsigned char bank;
-} SDRAM_SETUP;
-
-static const SDRAM_SETUP sdram_setup_table[] = {
- {1, 11, 9, 2},
- {1, 11, 10, 2},
- {2, 12, 9, 4},
- {2, 12, 10, 4},
- {3, 13, 9, 4},
- {3, 13, 10, 4},
- {3, 13, 11, 4},
- {4, 12, 8, 2},
- {4, 12, 8, 4},
- {5, 11, 8, 2},
- {5, 11, 8, 4},
- {6, 13, 8, 2},
- {6, 13, 8, 4},
- {7, 13, 9, 2},
- {7, 13, 10, 2},
- {0, 0, 0, 0}
-};
-
-static const unsigned char cal_indextable[] = {
- 9, 23, 25
-};
-
-
-/*
- * translate ns.ns/10 coding of SPD timing values
- * into 10 ps unit values
- */
-
-unsigned short NS10to10PS (unsigned char spd_byte, unsigned char spd_version)
-{
- unsigned short ns, ns10;
-
- /* isolate upper nibble */
- ns = (spd_byte >> 4) & 0x0F;
- /* isolate lower nibble */
- ns10 = (spd_byte & 0x0F);
-
- return (ns * 100 + ns10 * 10);
-}
-
-/*
- * translate ns.ns/4 coding of SPD timing values
- * into 10 ps unit values
- */
-
-unsigned short NS4to10PS (unsigned char spd_byte, unsigned char spd_version)
-{
- unsigned short ns, ns4;
-
- /* isolate upper 6 bits */
- ns = (spd_byte >> 2) & 0x3F;
- /* isloate lower 2 bits */
- ns4 = (spd_byte & 0x03);
-
- return (ns * 100 + ns4 * 25);
-}
-
-/*
- * translate ns coding of SPD timing values
- * into 10 ps unit values
- */
-
-unsigned short NSto10PS (unsigned char spd_byte)
-{
- return (spd_byte * 100);
-}
-
-void SDRAM_err (const char *s)
-{
-#ifndef SDRAM_DEBUG
- DECLARE_GLOBAL_DATA_PTR;
-
- (void) get_clocks ();
- gd->baudrate = 9600;
- serial_init ();
-#endif
- serial_puts ("\n");
- serial_puts (s);
- serial_puts ("\n enable SDRAM_DEBUG for more info\n");
- for (;;);
-}
-
-
-#ifdef SDRAM_DEBUG
-
-void write_hex (unsigned char i)
-{
- char cc;
-
- cc = i >> 4;
- cc &= 0xf;
- if (cc > 9)
- serial_putc (cc + 55);
- else
- serial_putc (cc + 48);
- cc = i & 0xf;
- if (cc > 9)
- serial_putc (cc + 55);
- else
- serial_putc (cc + 48);
-}
-
-void write_4hex (unsigned long val)
-{
- write_hex ((unsigned char) (val >> 24));
- write_hex ((unsigned char) (val >> 16));
- write_hex ((unsigned char) (val >> 8));
- write_hex ((unsigned char) val);
-}
-
-#endif
-
-int board_early_init_f (void)
-{
- unsigned char dataout[1];
- unsigned char datain[128];
- unsigned long sdram_size = 0;
- SDRAM_SETUP *t = (SDRAM_SETUP *) sdram_setup_table;
- unsigned long memclk;
- unsigned long tmemclk = 0;
- unsigned long tmp, bank, baseaddr, bank_size;
- unsigned short i;
- unsigned char rows, cols, banks, sdram_banks, density;
- unsigned char supported_cal, trp_clocks, trcd_clocks, tras_clocks,
- trc_clocks, tctp_clocks;
- unsigned char cal_index, cal_val, spd_version, spd_chksum;
- unsigned char buf[8];
-#ifdef SDRAM_DEBUG
- DECLARE_GLOBAL_DATA_PTR;
-#endif
- /* set up the config port */
- mtdcr (ebccfga, pb7ap);
- mtdcr (ebccfgd, CONFIG_PORT_AP);
- mtdcr (ebccfga, pb7cr);
- mtdcr (ebccfgd, CONFIG_PORT_CR);
-
- memclk = get_bus_freq (tmemclk);
- tmemclk = 1000000000 / (memclk / 100); /* in 10 ps units */
-
-#ifdef SDRAM_DEBUG
- (void) get_clocks ();
- gd->baudrate = 9600;
- serial_init ();
- serial_puts ("\nstart SDRAM Setup\n");
-#endif
-
- /* Read Serial Presence Detect Information */
- i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
- dataout[0] = 0;
- for (i = 0; i < 128; i++)
- datain[i] = 127;
- i2c_read(SPD_EEPROM_ADDRESS,0,1,datain,128);
-#ifdef SDRAM_DEBUG
- serial_puts ("\ni2c_read returns ");
- write_hex (i);
- serial_puts ("\n");
-#endif
-
-#ifdef SDRAM_DEBUG
- for (i = 0; i < 128; i++) {
- write_hex (datain[i]);
- serial_puts (" ");
- if (((i + 1) % 16) == 0)
- serial_puts ("\n");
- }
- serial_puts ("\n");
-#endif
- spd_chksum = 0;
- for (i = 0; i < 63; i++) {
- spd_chksum += datain[i];
- } /* endfor */
- if (datain[63] != spd_chksum) {
-#ifdef SDRAM_DEBUG
- serial_puts ("SPD chksum: 0x");
- write_hex (datain[63]);
- serial_puts (" != calc. chksum: 0x");
- write_hex (spd_chksum);
- serial_puts ("\n");
-#endif
- SDRAM_err ("SPD checksum Error");
- }
- /* SPD seems to be ok, use it */
-
- /* get SPD version */
- spd_version = datain[62];
-
- /* do some sanity checks on the kind of RAM */
- if ((datain[0] < 0x80) || /* less than 128 valid bytes in SPD */
- (datain[2] != 0x04) || /* if not SDRAM */
- (!((datain[6] == 0x40) || (datain[6] == 0x48))) || /* or not (64 Bit or 72 Bit) */
- (datain[7] != 0x00) || (datain[8] != 0x01) || /* or not LVTTL signal levels */
- (datain[126] == 0x66)) /* or a 66Mhz modules */
- SDRAM_err ("unsupported SDRAM");
-#ifdef SDRAM_DEBUG
- serial_puts ("SDRAM sanity ok\n");
-#endif
-
- /* get number of rows/cols/banks out of byte 3+4+5 */
- rows = datain[3];
- cols = datain[4];
- banks = datain[5];
-
- /* get number of SDRAM banks out of byte 17 and
- supported CAS latencies out of byte 18 */
- sdram_banks = datain[17];
- supported_cal = datain[18] & ~0x81;
-
- while (t->mode != 0) {
- if ((t->row == rows) && (t->col == cols)
- && (t->bank == sdram_banks))
- break;
- t++;
- } /* endwhile */
-
-#ifdef SDRAM_DEBUG
- serial_puts ("rows: ");
- write_hex (rows);
- serial_puts (" cols: ");
- write_hex (cols);
- serial_puts (" banks: ");
- write_hex (banks);
- serial_puts (" mode: ");
- write_hex (t->mode);
- serial_puts ("\n");
-#endif
- if (t->mode == 0)
- SDRAM_err ("unsupported SDRAM");
- /* get tRP, tRCD, tRAS and density from byte 27+29+30+31 */
-#ifdef SDRAM_DEBUG
- serial_puts ("tRP: ");
- write_hex (datain[27]);
- serial_puts ("\ntRCD: ");
- write_hex (datain[29]);
- serial_puts ("\ntRAS: ");
- write_hex (datain[30]);
- serial_puts ("\n");
-#endif
-
- trp_clocks = (NSto10PS (datain[27]) + (tmemclk - 1)) / tmemclk;
- trcd_clocks = (NSto10PS (datain[29]) + (tmemclk - 1)) / tmemclk;
- tras_clocks = (NSto10PS (datain[30]) + (tmemclk - 1)) / tmemclk;
- density = datain[31];
-
- /* trc_clocks is sum of trp_clocks + tras_clocks */
- trc_clocks = trp_clocks + tras_clocks;
- /* ctp = ((trp + tras) - trp - trcd) => tras - trcd */
- tctp_clocks =
- ((NSto10PS (datain[30]) - NSto10PS (datain[29])) +
- (tmemclk - 1)) / tmemclk;
-
-#ifdef SDRAM_DEBUG
- serial_puts ("c_RP: ");
- write_hex (trp_clocks);
- serial_puts ("\nc_RCD: ");
- write_hex (trcd_clocks);
- serial_puts ("\nc_RAS: ");
- write_hex (tras_clocks);
- serial_puts ("\nc_RC: (RP+RAS): ");
- write_hex (trc_clocks);
- serial_puts ("\nc_CTP: ((RP+RAS)-RP-RCD): ");
- write_hex (tctp_clocks);
- serial_puts ("\nt_CTP: RAS - RCD: ");
- write_hex ((unsigned
- char) ((NSto10PS (datain[30]) -
- NSto10PS (datain[29])) >> 8));
- write_hex ((unsigned char) (NSto10PS (datain[30]) - NSto10PS (datain[29])));
- serial_puts ("\ntmemclk: ");
- write_hex ((unsigned char) (tmemclk >> 8));
- write_hex ((unsigned char) (tmemclk));
- serial_puts ("\n");
-#endif
-
-
- cal_val = 255;
- for (i = 6, cal_index = 0; (i > 0) && (cal_index < 3); i--) {
- /* is this CAS latency supported ? */
- if ((supported_cal >> i) & 0x01) {
- buf[0] = datain[cal_indextable[cal_index]];
- if (cal_index < 2) {
- if (NS10to10PS (buf[0], spd_version) <= tmemclk)
- cal_val = i;
- } else {
- /* SPD bytes 25+26 have another format */
- if (NS4to10PS (buf[0], spd_version) <= tmemclk)
- cal_val = i;
- } /* endif */
- cal_index++;
- } /* endif */
- } /* endfor */
-#ifdef SDRAM_DEBUG
- serial_puts ("CAL: ");
- write_hex (cal_val + 1);
- serial_puts ("\n");
-#endif
-
- if (cal_val == 255)
- SDRAM_err ("unsupported SDRAM");
-
- /* get SDRAM timing register */
- mtdcr (memcfga, mem_sdtr1);
- tmp = mfdcr (memcfgd) & ~0x018FC01F;
- /* insert CASL value */
-/* tmp |= ((unsigned long)cal_val) << 23; */
- tmp |= ((unsigned long) cal_val) << 23;
- /* insert PTA value */
- tmp |= ((unsigned long) (trp_clocks - 1)) << 18;
- /* insert CTP value */
-/* tmp |= ((unsigned long)(trc_clocks - trp_clocks - trcd_clocks - 1)) << 16; */
- tmp |= ((unsigned long) (trc_clocks - trp_clocks - trcd_clocks)) << 16;
- /* insert LDF (always 01) */
- tmp |= ((unsigned long) 0x01) << 14;
- /* insert RFTA value */
- tmp |= ((unsigned long) (trc_clocks - 4)) << 2;
- /* insert RCD value */
- tmp |= ((unsigned long) (trcd_clocks - 1)) << 0;
-
-#ifdef SDRAM_DEBUG
- serial_puts ("sdtr: ");
- write_4hex (tmp);
- serial_puts ("\n");
-#endif
-
- /* write SDRAM timing register */
- mtdcr (memcfga, mem_sdtr1);
- mtdcr (memcfgd, tmp);
- baseaddr = CFG_SDRAM_BASE;
- bank_size = (((unsigned long) density) << 22) / 2;
- /* insert AM value */
- tmp = ((unsigned long) t->mode - 1) << 13;
- /* insert SZ value; */
- switch (bank_size) {
- case 0x00400000:
- tmp |= ((unsigned long) 0x00) << 17;
- break;
- case 0x00800000:
- tmp |= ((unsigned long) 0x01) << 17;
- break;
- case 0x01000000:
- tmp |= ((unsigned long) 0x02) << 17;
- break;
- case 0x02000000:
- tmp |= ((unsigned long) 0x03) << 17;
- break;
- case 0x04000000:
- tmp |= ((unsigned long) 0x04) << 17;
- break;
- case 0x08000000:
- tmp |= ((unsigned long) 0x05) << 17;
- break;
- case 0x10000000:
- tmp |= ((unsigned long) 0x06) << 17;
- break;
- default:
- SDRAM_err ("unsupported SDRAM");
- } /* endswitch */
- /* get SDRAM bank 0 register */
- mtdcr (memcfga, mem_mb0cf);
- bank = mfdcr (memcfgd) & ~0xFFCEE001;
- bank |= (baseaddr | tmp | 0x01);
-#ifdef SDRAM_DEBUG
- serial_puts ("bank0: baseaddr: ");
- write_4hex (baseaddr);
- serial_puts (" banksize: ");
- write_4hex (bank_size);
- serial_puts (" mb0cf: ");
- write_4hex (bank);
- serial_puts ("\n");
-#endif
- baseaddr += bank_size;
- sdram_size += bank_size;
-
- /* write SDRAM bank 0 register */
- mtdcr (memcfga, mem_mb0cf);
- mtdcr (memcfgd, bank);
-
- /* get SDRAM bank 1 register */
- mtdcr (memcfga, mem_mb1cf);
- bank = mfdcr (memcfgd) & ~0xFFCEE001;
- sdram_size = 0;
-
-#ifdef SDRAM_DEBUG
- serial_puts ("bank1: baseaddr: ");
- write_4hex (baseaddr);
- serial_puts (" banksize: ");
- write_4hex (bank_size);
-#endif
- if (banks == 2) {
- bank |= (baseaddr | tmp | 0x01);
- baseaddr += bank_size;
- sdram_size += bank_size;
- } /* endif */
-#ifdef SDRAM_DEBUG
- serial_puts (" mb1cf: ");
- write_4hex (bank);
- serial_puts ("\n");
-#endif
- /* write SDRAM bank 1 register */
- mtdcr (memcfga, mem_mb1cf);
- mtdcr (memcfgd, bank);
-
- /* get SDRAM bank 2 register */
- mtdcr (memcfga, mem_mb2cf);
- bank = mfdcr (memcfgd) & ~0xFFCEE001;
-
- bank |= (baseaddr | tmp | 0x01);
-
-#ifdef SDRAM_DEBUG
- serial_puts ("bank2: baseaddr: ");
- write_4hex (baseaddr);
- serial_puts (" banksize: ");
- write_4hex (bank_size);
- serial_puts (" mb2cf: ");
- write_4hex (bank);
- serial_puts ("\n");
-#endif
-
- baseaddr += bank_size;
- sdram_size += bank_size;
-
- /* write SDRAM bank 2 register */
- mtdcr (memcfga, mem_mb2cf);
- mtdcr (memcfgd, bank);
-
- /* get SDRAM bank 3 register */
- mtdcr (memcfga, mem_mb3cf);
- bank = mfdcr (memcfgd) & ~0xFFCEE001;
-
-#ifdef SDRAM_DEBUG
- serial_puts ("bank3: baseaddr: ");
- write_4hex (baseaddr);
- serial_puts (" banksize: ");
- write_4hex (bank_size);
-#endif
-
- if (banks == 2) {
- bank |= (baseaddr | tmp | 0x01);
- baseaddr += bank_size;
- sdram_size += bank_size;
- }
- /* endif */
-#ifdef SDRAM_DEBUG
- serial_puts (" mb3cf: ");
- write_4hex (bank);
- serial_puts ("\n");
-#endif
-
- /* write SDRAM bank 3 register */
- mtdcr (memcfga, mem_mb3cf);
- mtdcr (memcfgd, bank);
-
-
- /* get SDRAM refresh interval register */
- mtdcr (memcfga, mem_rtr);
- tmp = mfdcr (memcfgd) & ~0x3FF80000;
-
- if (tmemclk < NSto10PS (16))
- tmp |= 0x05F00000;
- else
- tmp |= 0x03F80000;
-
- /* write SDRAM refresh interval register */
- mtdcr (memcfga, mem_rtr);
- mtdcr (memcfgd, tmp);
-
- /* enable SDRAM controller with no ECC, 32-bit SDRAM width, 16 byte burst */
- mtdcr (memcfga, mem_mcopt1);
- tmp = (mfdcr (memcfgd) & ~0xFFE00000) | 0x80E00000;
- mtdcr (memcfga, mem_mcopt1);
- mtdcr (memcfgd, tmp);
-
-
- /*-------------------------------------------------------------------------+
- | Interrupt controller setup for the PIP405 board.
- | Note: IRQ 0-15 405GP internally generated; active high; level sensitive
- | IRQ 16 405GP internally generated; active low; level sensitive
- | IRQ 17-24 RESERVED
- | IRQ 25 (EXT IRQ 0) SouthBridg; active low; level sensitive
- | IRQ 26 (EXT IRQ 1) NMI: active low; level sensitive
- | IRQ 27 (EXT IRQ 2) SMI: active Low; level sensitive
- | IRQ 28 (EXT IRQ 3) PCI SLOT 3; active low; level sensitive
- | IRQ 29 (EXT IRQ 4) PCI SLOT 2; active low; level sensitive
- | IRQ 30 (EXT IRQ 5) PCI SLOT 1; active low; level sensitive
- | IRQ 31 (EXT IRQ 6) PCI SLOT 0; active low; level sensitive
- | Note for PIP405 board:
- | An interrupt taken for the SouthBridge (IRQ 25) indicates that
- | the Interrupt Controller in the South Bridge has caused the
- | interrupt. The IC must be read to determine which device
- | caused the interrupt.
- |
- +-------------------------------------------------------------------------*/
- mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
- mtdcr (uicer, 0x00000000); /* disable all ints */
- mtdcr (uiccr, 0x00000000); /* set all to be non-critical (for now) */
- mtdcr (uicpr, 0xFFFFFF80); /* set int polarities */
- mtdcr (uictr, 0x10000000); /* set int trigger levels */
- mtdcr (uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority */
- mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
-
- return 0;
-}
-
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Check Board Identity:
- */
-
-int checkboard (void)
-{
- char s[50];
- unsigned char bc;
- int i;
- backup_t *b = (backup_t *) s;
-
- puts ("Board: ");
-
- i = getenv_r ("serial#", (char *)s, 32);
- if ((i == 0) || strncmp ((char *)s, "PIP405", 6)) {
- get_backup_values (b);
- if (strncmp (b->signature, "MPL\0", 4) != 0) {
- puts ("### No HW ID - assuming PIP405");
- } else {
- b->serial_name[6] = 0;
- printf ("%s SN: %s", b->serial_name,
- &b->serial_name[7]);
- }
- } else {
- s[6] = 0;
- printf ("%s SN: %s", s, &s[7]);
- }
- bc = in8 (CONFIG_PORT_ADDR);
- printf (" Boot Config: 0x%x\n", bc);
- return (0);
-}
-
-
-/* ------------------------------------------------------------------------- */
-/* ------------------------------------------------------------------------- */
-/*
- initdram(int board_type) reads EEPROM via I2c. EEPROM contains all of
- the necessary info for SDRAM controller configuration
-*/
-/* ------------------------------------------------------------------------- */
-/* ------------------------------------------------------------------------- */
-static int test_dram (unsigned long ramsize);
-
-long int initdram (int board_type)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- unsigned long bank_reg[4], tmp, bank_size;
- int i, ds;
- unsigned long TotalSize;
-
- ds = 0;
- /* since the DRAM controller is allready set up,
- * calculate the size with the bank registers
- */
- mtdcr (memcfga, mem_mb0cf);
- bank_reg[0] = mfdcr (memcfgd);
- mtdcr (memcfga, mem_mb1cf);
- bank_reg[1] = mfdcr (memcfgd);
- mtdcr (memcfga, mem_mb2cf);
- bank_reg[2] = mfdcr (memcfgd);
- mtdcr (memcfga, mem_mb3cf);
- bank_reg[3] = mfdcr (memcfgd);
- TotalSize = 0;
- for (i = 0; i < 4; i++) {
- if ((bank_reg[i] & 0x1) == 0x1) {
- tmp = (bank_reg[i] >> 17) & 0x7;
- bank_size = 4 << tmp;
- TotalSize += bank_size;
- } else
- ds = 1;
- }
- if (ds == 1)
- printf ("single-sided DIMM ");
- else
- printf ("double-sided DIMM ");
- test_dram (TotalSize * 1024 * 1024);
- /* bank 2 (SDRAM Clock 2) is not usable if 133MHz SDRAM IF */
- (void) get_clocks();
- if (gd->cpu_clk > 220000000)
- TotalSize /= 2;
- return (TotalSize * 1024 * 1024);
-}
-
-/* ------------------------------------------------------------------------- */
-
-
-static int test_dram (unsigned long ramsize)
-{
- /* not yet implemented */
- return (1);
-}
-
-
-extern flash_info_t flash_info[]; /* info for FLASH chips */
-
-int misc_init_r (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
- /* adjust flash start and size as well as the offset */
- gd->bd->bi_flashstart=0-flash_info[0].size;
- gd->bd->bi_flashsize=flash_info[0].size-CFG_MONITOR_LEN;
- gd->bd->bi_flashoffset=0;
-
- /* if PIP405 has booted from PCI, reset CCR0[24] as described in errata PCI_18 */
- if (mfdcr(strap) & PSR_ROM_LOC)
- mtspr(ccr0, (mfspr(ccr0) & ~0x80));
-
- return (0);
-}
-
-/***************************************************************************
- * some helping routines
- */
-
-int overwrite_console (void)
-{
- return (in8 (CONFIG_PORT_ADDR) & 0x1); /* return TRUE if console should be overwritten */
-}
-
-
-extern int isa_init (void);
-
-
-void print_pip405_rev (void)
-{
- unsigned char part, vers, cfg;
-
- part = in8 (PLD_PART_REG);
- vers = in8 (PLD_VERS_REG);
- cfg = in8 (PLD_BOARD_CFG_REG);
- printf ("Rev: PIP405-%d Rev %c PLD%d %d PLD%d %d\n",
- 16 - ((cfg >> 4) & 0xf), (cfg & 0xf) + 'A', part & 0xf,
- vers & 0xf, (part >> 4) & 0xf, (vers >> 4) & 0xf);
-}
-
-extern void check_env(void);
-
-
-int last_stage_init (void)
-{
- print_pip405_rev ();
- isa_init ();
- show_stdio_dev ();
- check_env();
- return 0;
-}
-
-/************************************************************************
-* Print PIP405 Info
-************************************************************************/
-void print_pip405_info (void)
-{
- unsigned char part, vers, cfg, ledu, sysman, flashcom, can, serpwr,
- compwr, nicvga, scsirst;
-
- part = in8 (PLD_PART_REG);
- vers = in8 (PLD_VERS_REG);
- cfg = in8 (PLD_BOARD_CFG_REG);
- ledu = in8 (PLD_LED_USER_REG);
- sysman = in8 (PLD_SYS_MAN_REG);
- flashcom = in8 (PLD_FLASH_COM_REG);
- can = in8 (PLD_CAN_REG);
- serpwr = in8 (PLD_SER_PWR_REG);
- compwr = in8 (PLD_COM_PWR_REG);
- nicvga = in8 (PLD_NIC_VGA_REG);
- scsirst = in8 (PLD_SCSI_RST_REG);
- printf ("PLD Part %d version %d\n",
- part & 0xf, vers & 0xf);
- printf ("PLD Part %d version %d\n",
- (part >> 4) & 0xf, (vers >> 4) & 0xf);
- printf ("Board Revision %c\n", (cfg & 0xf) + 'A');
- printf ("Population Options %d %d %d %d\n",
- (cfg >> 4) & 0x1, (cfg >> 5) & 0x1,
- (cfg >> 6) & 0x1, (cfg >> 7) & 0x1);
- printf ("User LED0 %s User LED1 %s\n",
- ((ledu & 0x1) == 0x1) ? "on" : "off",
- ((ledu & 0x2) == 0x2) ? "on" : "off");
- printf ("Additionally Options %d %d\n",
- (ledu >> 2) & 0x1, (ledu >> 3) & 0x1);
- printf ("User Config Switch %d %d %d %d\n",
- (ledu >> 4) & 0x1, (ledu >> 5) & 0x1,
- (ledu >> 6) & 0x1, (ledu >> 7) & 0x1);
- switch (sysman & 0x3) {
- case 0:
- printf ("PCI Clocks are running\n");
- break;
- case 1:
- printf ("PCI Clocks are stopped in POS State\n");
- break;
- case 2:
- printf ("PCI Clocks are stopped when PCI_STP# is asserted\n");
- break;
- case 3:
- printf ("PCI Clocks are stopped\n");
- break;
- }
- switch ((sysman >> 2) & 0x3) {
- case 0:
- printf ("Main Clocks are running\n");
- break;
- case 1:
- printf ("Main Clocks are stopped in POS State\n");
- break;
- case 2:
- case 3:
- printf ("PCI Clocks are stopped\n");
- break;
- }
- printf ("INIT asserts %sINT2# (SMI)\n",
- ((sysman & 0x10) == 0x10) ? "" : "not ");
- printf ("INIT asserts %sINT1# (NMI)\n",
- ((sysman & 0x20) == 0x20) ? "" : "not ");
- printf ("INIT occured %d\n", (sysman >> 6) & 0x1);
- printf ("SER1 is routed to %s\n",
- ((flashcom & 0x1) == 0x1) ? "RS485" : "RS232");
- printf ("COM2 is routed to %s\n",
- ((flashcom & 0x2) == 0x2) ? "RS485" : "RS232");
- printf ("RS485 is configured as %s duplex\n",
- ((flashcom & 0x4) == 0x4) ? "full" : "half");
- printf ("RS485 is connected to %s\n",
- ((flashcom & 0x8) == 0x8) ? "COM1" : "COM2");
- printf ("SER1 uses handshakes %s\n",
- ((flashcom & 0x10) == 0x10) ? "DTR/DSR" : "RTS/CTS");
- printf ("Bootflash is %swriteprotected\n",
- ((flashcom & 0x20) == 0x20) ? "not " : "");
- printf ("Bootflash VPP is %s\n",
- ((flashcom & 0x40) == 0x40) ? "on" : "off");
- printf ("Bootsector is %swriteprotected\n",
- ((flashcom & 0x80) == 0x80) ? "not " : "");
- switch ((can) & 0x3) {
- case 0:
- printf ("CAN Controller is on address 0x1000..0x10FF\n");
- break;
- case 1:
- printf ("CAN Controller is on address 0x8000..0x80FF\n");
- break;
- case 2:
- printf ("CAN Controller is on address 0xE000..0xE0FF\n");
- break;
- case 3:
- printf ("CAN Controller is disabled\n");
- break;
- }
- switch ((can >> 2) & 0x3) {
- case 0:
- printf ("CAN Controller Reset is ISA Reset\n");
- break;
- case 1:
- printf ("CAN Controller Reset is ISA Reset and POS State\n");
- break;
- case 2:
- case 3:
- printf ("CAN Controller is in reset\n");
- break;
- }
- if (((can >> 4) < 3) || ((can >> 4) == 8) || ((can >> 4) == 13))
- printf ("CAN Interrupt is disabled\n");
- else
- printf ("CAN Interrupt is ISA INT%d\n", (can >> 4) & 0xf);
- switch (serpwr & 0x3) {
- case 0:
- printf ("SER0 Drivers are enabled\n");
- break;
- case 1:
- printf ("SER0 Drivers are disabled in the POS state\n");
- break;
- case 2:
- case 3:
- printf ("SER0 Drivers are disabled\n");
- break;
- }
- switch ((serpwr >> 2) & 0x3) {
- case 0:
- printf ("SER1 Drivers are enabled\n");
- break;
- case 1:
- printf ("SER1 Drivers are disabled in the POS state\n");
- break;
- case 2:
- case 3:
- printf ("SER1 Drivers are disabled\n");
- break;
- }
- switch (compwr & 0x3) {
- case 0:
- printf ("COM1 Drivers are enabled\n");
- break;
- case 1:
- printf ("COM1 Drivers are disabled in the POS state\n");
- break;
- case 2:
- case 3:
- printf ("COM1 Drivers are disabled\n");
- break;
- }
- switch ((compwr >> 2) & 0x3) {
- case 0:
- printf ("COM2 Drivers are enabled\n");
- break;
- case 1:
- printf ("COM2 Drivers are disabled in the POS state\n");
- break;
- case 2:
- case 3:
- printf ("COM2 Drivers are disabled\n");
- break;
- }
- switch ((nicvga) & 0x3) {
- case 0:
- printf ("PHY is running\n");
- break;
- case 1:
- printf ("PHY is in Power save mode in POS state\n");
- break;
- case 2:
- case 3:
- printf ("PHY is in Power save mode\n");
- break;
- }
- switch ((nicvga >> 2) & 0x3) {
- case 0:
- printf ("VGA is running\n");
- break;
- case 1:
- printf ("VGA is in Power save mode in POS state\n");
- break;
- case 2:
- case 3:
- printf ("VGA is in Power save mode\n");
- break;
- }
- printf ("PHY is %sreseted\n", ((nicvga & 0x10) == 0x10) ? "" : "not ");
- printf ("VGA is %sreseted\n", ((nicvga & 0x20) == 0x20) ? "" : "not ");
- printf ("Reserved Configuration is %d %d\n", (nicvga >> 6) & 0x1,
- (nicvga >> 7) & 0x1);
- switch ((scsirst) & 0x3) {
- case 0:
- printf ("SCSI Controller is running\n");
- break;
- case 1:
- printf ("SCSI Controller is in Power save mode in POS state\n");
- break;
- case 2:
- case 3:
- printf ("SCSI Controller is in Power save mode\n");
- break;
- }
- printf ("SCSI termination is %s\n",
- ((scsirst & 0x4) == 0x4) ? "disabled" : "enabled");
- printf ("SCSI Controller is %sreseted\n",
- ((scsirst & 0x10) == 0x10) ? "" : "not ");
- printf ("IDE disks are %sreseted\n",
- ((scsirst & 0x20) == 0x20) ? "" : "not ");
- printf ("ISA Bus is %sreseted\n",
- ((scsirst & 0x40) == 0x40) ? "" : "not ");
- printf ("Super IO is %sreseted\n",
- ((scsirst & 0x80) == 0x80) ? "" : "not ");
-}
-
-void user_led0 (unsigned char on)
-{
- if (on == TRUE)
- out8 (PLD_LED_USER_REG, (in8 (PLD_LED_USER_REG) | 0x1));
- else
- out8 (PLD_LED_USER_REG, (in8 (PLD_LED_USER_REG) & 0xfe));
-}
-
-void user_led1 (unsigned char on)
-{
- if (on == TRUE)
- out8 (PLD_LED_USER_REG, (in8 (PLD_LED_USER_REG) | 0x2));
- else
- out8 (PLD_LED_USER_REG, (in8 (PLD_LED_USER_REG) & 0xfd));
-}
-
-void ide_set_reset (int idereset)
-{
- /* if reset = 1 IDE reset will be asserted */
- unsigned char resreg;
-
- resreg = in8 (PLD_SCSI_RST_REG);
- if (idereset == 1)
- resreg |= 0x20;
- else {
- udelay(10000);
- resreg &= 0xdf;
- }
- out8 (PLD_SCSI_RST_REG, resreg);
-}
diff --git a/board/mpl/pip405/pip405.h b/board/mpl/pip405/pip405.h
deleted file mode 100644
index b41c5bb282..0000000000
--- a/board/mpl/pip405/pip405.h
+++ /dev/null
@@ -1,148 +0,0 @@
-/*
- * (C) Copyright 2001
- * Denis Peter, MPL AG Switzerland, d.peter@mpl.ch
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- */
- /****************************************************************************
- * Global routines used for PIP405
- *****************************************************************************/
-
-#ifndef __ASSEMBLY__
-
-extern int mem_test(unsigned long start, unsigned long ramsize,int mode);
-
-void print_pip405_info(void);
-
-void user_led0(unsigned char on);
-void user_led1(unsigned char on);
-
-
-#define PLD_BASE_ADDRESS CFG_ISA_IO_BASE_ADDRESS + 0x800
-#define PLD_PART_REG PLD_BASE_ADDRESS + 0
-#define PLD_VERS_REG PLD_BASE_ADDRESS + 1
-#define PLD_BOARD_CFG_REG PLD_BASE_ADDRESS + 2
-#define PLD_LED_USER_REG PLD_BASE_ADDRESS + 3
-#define PLD_SYS_MAN_REG PLD_BASE_ADDRESS + 4
-#define PLD_FLASH_COM_REG PLD_BASE_ADDRESS + 5
-#define PLD_CAN_REG PLD_BASE_ADDRESS + 6
-#define PLD_SER_PWR_REG PLD_BASE_ADDRESS + 7
-#define PLD_COM_PWR_REG PLD_BASE_ADDRESS + 8
-#define PLD_NIC_VGA_REG PLD_BASE_ADDRESS + 9
-#define PLD_SCSI_RST_REG PLD_BASE_ADDRESS + 0xA
-
-#define PIIX4_VENDOR_ID 0x8086
-#define PIIX4_IDE_DEV_ID 0x7111
-
-#endif
-
-/* timings */
-
-/* CS Config register (CS7) */
-#define CONFIG_PORT_BME 0 /* Burst disable */
-#define CONFIG_PORT_TWE 255 /* 255 * 30ns 120ns Waitstates (access=TWT+1+TH) */
-#define CONFIG_PORT_CSN 1 /* Chipselect is driven inactive for 1 Cycle BTW transfers */
-#define CONFIG_PORT_OEN 1 /* Cycles from CS low to OE low */
-#define CONFIG_PORT_WBN 1 /* Cycles from CS low to WE low */
-#define CONFIG_PORT_WBF 1 /* Cycles from WE high to CS high */
-#define CONFIG_PORT_TH 2 /* Number of hold cycles after transfer */
-#define CONFIG_PORT_RE 0 /* Ready disabled */
-#define CONFIG_PORT_SOR 1 /* Sample on Ready disabled */
-#define CONFIG_PORT_BEM 0 /* Byte Write only active on Write cycles */
-#define CONFIG_PORT_PEN 0 /* Parity disable */
-#define CONFIG_PORT_AP ((CONFIG_PORT_BME << 31) + (CONFIG_PORT_TWE << 23) + (CONFIG_PORT_CSN << 18) + (CONFIG_PORT_OEN << 16) + (CONFIG_PORT_WBN << 14) + \
- (CONFIG_PORT_WBF << 12) + (CONFIG_PORT_TH << 9) + (CONFIG_PORT_RE << 8) + (CONFIG_PORT_SOR << 7) + (CONFIG_PORT_BEM << 6) + (CONFIG_PORT_PEN << 5))
-
-/* Size: 0=1MB, 1=2MB, 2=4MB, 3=8MB, 4=16MB, 5=32MB, 6=64MB, 7=128MB */
-#define CONFIG_PORT_BS 0 /* 1 MByte */
-/* Usage: 0=disabled, 1=Read only, 2=Write Only, 3=R/W */
-#define CONFIG_PORT_BU 3 /* R/W */
-/* Bus width: 0=8Bit, 1=16Bit, 2=32Bit, 3=Reserved */
-#define CONFIG_PORT_BW 0 /* 16Bit */
-#define CONFIG_PORT_CR ((CONFIG_PORT_ADDR & 0xfff00000) + (CONFIG_PORT_BS << 17) + (CONFIG_PORT_BU << 15) + (CONFIG_PORT_BW << 13))
-
-/* Flash CS0 or CS 1 */
-/* 0x7F8FFE80 slowest timing at all... */
-#define FLASH_BME_B 1 /* Burst enable */
-#define FLASH_FWT_B 0x6 /* 6 * 30ns 210ns First Wait Access */
-#define FLASH_BWT_B 0x6 /* 6 * 30ns 210ns Burst Wait Access */
-#define FLASH_BME 0 /* Burst disable */
-#define FLASH_TWE 0xb/* 11 * 30ns 330ns Waitstates (access=TWT+1+TH) */
-#define FLASH_CSN 0 /* Chipselect is driven inactive for 1 Cycle BTW transfers */
-#define FLASH_OEN 1 /* Cycles from CS low to OE low */
-#define FLASH_WBN 1 /* Cycles from CS low to WE low */
-#define FLASH_WBF 1 /* Cycles from WE high to CS high */
-#define FLASH_TH 2 /* Number of hold cycles after transfer */
-#define FLASH_RE 0 /* Ready disabled */
-#define FLASH_SOR 1 /* Sample on Ready disabled */
-#define FLASH_BEM 0 /* Byte Write only active on Write cycles */
-#define FLASH_PEN 0 /* Parity disable */
-/* Access Parameter Register for non Boot */
-#define FLASH_AP ((FLASH_BME << 31) + (FLASH_TWE << 23) + (FLASH_CSN << 18) + (FLASH_OEN << 16) + (FLASH_WBN << 14) + \
- (FLASH_WBF << 12) + (FLASH_TH << 9) + (FLASH_RE << 8) + (FLASH_SOR << 7) + (FLASH_BEM << 6) + (FLASH_PEN << 5))
-/* Access Parameter Register for Boot */
-#define FLASH_AP_B ((FLASH_BME_B << 31) + (FLASH_FWT_B << 26) + (FLASH_BWT_B << 23) + (FLASH_CSN << 18) + (FLASH_OEN << 16) + (FLASH_WBN << 14) + \
- (FLASH_WBF << 12) + (FLASH_TH << 9) + (FLASH_RE << 8) + (FLASH_SOR << 7) + (FLASH_BEM << 6) + (FLASH_PEN << 5))
-
-/* Size: 0=1MB, 1=2MB, 2=4MB, 3=8MB, 4=16MB, 5=32MB, 6=64MB, 7=128MB */
-#define FLASH_BS FLASH_SIZE_PRELIM /* 4 MByte */
-/* Usage: 0=disabled, 1=Read only, 2=Write Only, 3=R/W */
-#define FLASH_BU 3 /* R/W */
-/* Bus width: 0=8Bit, 1=16Bit, 2=32Bit, 3=Reserved */
-#define FLASH_BW 1 /* 16Bit */
-/* CR register for Boot */
-#define FLASH_CR_B ((FLASH_BASE_PRELIM & 0xfff00000) + (FLASH_BS << 17) + (FLASH_BU << 15) + (FLASH_BW << 13))
-/* CR register for non Boot */
-#define FLASH_CR ((MULTI_PURPOSE_SOCKET_ADDR & 0xfff00000) + (FLASH_BS << 17) + (FLASH_BU << 15) + (FLASH_BW << 13))
-
-/* MPS CS1 or CS0 */
-/* Boot CS: */
-#define MPS_BME_B 1 /* Burst enable */
-#define MPS_FWT_B 0x6/* 6 * 30ns 210ns First Wait Access */
-#define MPS_BWT_B 0x6 /* 6 * 30ns 210ns Burst Wait Access */
-#define MPS_BME 0 /* Burst disable */
-#define MPS_TWE 0xb/* 11 * 30ns 330ns Waitstates (access=TWT+1+TH) */
-#define MPS_CSN 0 /* Chipselect is driven inactive for 1 Cycle BTW transfers */
-#define MPS_OEN 1 /* Cycles from CS low to OE low */
-#define MPS_WBN 1 /* Cycles from CS low to WE low */
-#define MPS_WBF 1 /* Cycles from WE high to CS high */
-#define MPS_TH 2 /* Number of hold cycles after transfer */
-#define MPS_RE 0 /* Ready disabled */
-#define MPS_SOR 1 /* Sample on Ready disabled */
-#define MPS_BEM 0 /* Byte Write only active on Write cycles */
-#define MPS_PEN 0 /* Parity disable */
-/* Access Parameter Register for non Boot */
-#define MPS_AP ((MPS_BME << 31) + (MPS_TWE << 23) + (MPS_CSN << 18) + (MPS_OEN << 16) + (MPS_WBN << 14) + \
- (MPS_WBF << 12) + (MPS_TH << 9) + (MPS_RE << 8) + (MPS_SOR << 7) + (MPS_BEM << 6) + (MPS_PEN << 5))
-/* Access Parameter Register for Boot */
-#define MPS_AP_B ((MPS_BME_B << 31) + (MPS_FWT_B << 26) + (MPS_BWT_B << 23) + (MPS_CSN << 18) + (MPS_OEN << 16) + (MPS_WBN << 14) + \
- (MPS_WBF << 12) + (MPS_TH << 9) + (MPS_RE << 8) + (MPS_SOR << 7) + (MPS_BEM << 6) + (MPS_PEN << 5))
-
-/* Size: 0=1MB, 1=2MB, 2=4MB, 3=8MB, 4=16MB, 5=32MB, 6=64MB, 7=128MB */
-#define MPS_BS 2 /* 4 MByte */
-#define MPS_BS_B FLASH_SIZE_PRELIM /* 1 MByte */
-/* Usage: 0=disabled, 1=Read only, 2=Write Only, 3=R/W */
-#define MPS_BU 3 /* R/W */
-/* Bus width: 0=8Bit, 1=16Bit, 2=32Bit, 3=Reserved */
-#define MPS_BW 0 /* 8Bit */
-/* CR register for Boot */
-#define MPS_CR_B ((FLASH_BASE_PRELIM & 0xfff00000) + (MPS_BS << 17) + (MPS_BU << 15) + (MPS_BW << 13))
-/* CR register for non Boot */
-#define MPS_CR ((MULTI_PURPOSE_SOCKET_ADDR & 0xfff00000) + (MPS_BS << 17) + (MPS_BU << 15) + (MPS_BW << 13))
diff --git a/board/mpl/pip405/u-boot.lds b/board/mpl/pip405/u-boot.lds
deleted file mode 100644
index 11819a4fcb..0000000000
--- a/board/mpl/pip405/u-boot.lds
+++ /dev/null
@@ -1,152 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- .resetvec 0xFFFFFFFC :
- {
- *(.resetvec)
- } = 0xffff
-
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/ppc4xx/start.o (.text)
- board/mpl/pip405/init.o (.text)
- cpu/ppc4xx/kgdb.o (.text)
- cpu/ppc4xx/traps.o (.text)
- cpu/ppc4xx/interrupts.o (.text)
- cpu/ppc4xx/serial.o (.text)
- cpu/ppc4xx/cpu_init.o (.text)
- cpu/ppc4xx/speed.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/extable.o (.text)
- lib_generic/zlib.o (.text)
-
-/* . = env_offset;*/
-/* common/environment.o(.text)*/
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/mpl/pip405/u-boot.lds.debug b/board/mpl/pip405/u-boot.lds.debug
deleted file mode 100644
index 1608f8cdaa..0000000000
--- a/board/mpl/pip405/u-boot.lds.debug
+++ /dev/null
@@ -1,137 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- mpc8xx/start.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/extable.o (.text)
-
- common/environment.o(.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/mpl/vcma9/Makefile b/board/mpl/vcma9/Makefile
deleted file mode 100644
index 304c965d12..0000000000
--- a/board/mpl/vcma9/Makefile
+++ /dev/null
@@ -1,49 +0,0 @@
-#
-# (C) Copyright 2000, 2001, 2002
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := vcma9.o flash.o cmd_vcma9.o
-OBJS += ../common/common_util.o ../common/memtst.o
-
-SOBJS := lowlevel_init.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS) $(SOBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/mpl/vcma9/cmd_vcma9.c b/board/mpl/vcma9/cmd_vcma9.c
deleted file mode 100644
index 44b4112554..0000000000
--- a/board/mpl/vcma9/cmd_vcma9.c
+++ /dev/null
@@ -1,180 +0,0 @@
-/*
- * (C) Copyright 2002
- * Denis Peter, MPL AG Switzerland, d.peter@mpl.ch
- *
- * adapted for VCMA9
- * David Mueller, ELSOFT AG, d.mueller@elsoft.ch
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- */
-
-#include <common.h>
-#include <command.h>
-#include "vcma9.h"
-#include "../common/common_util.h"
-
-#if defined(CONFIG_DRIVER_CS8900)
-#include <../drivers/cs8900.h>
-
-static uchar cs8900_chksum(ushort data)
-{
- return((data >> 8) & 0x00FF) + (data & 0x00FF);
-}
-
-#endif
-
-extern void print_vcma9_info(void);
-extern int vcma9_cantest(int);
-extern int vcma9_nandtest(void);
-extern int vcma9_nanderase(void);
-extern int vcma9_nandread(ulong);
-extern int vcma9_nandwrite(ulong);
-extern int vcma9_dactest(int);
-extern int do_mplcommon(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
-
-/* ------------------------------------------------------------------------- */
-
-int do_vcma9(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- if (strcmp(argv[1], "info") == 0)
- {
- print_vcma9_info();
- return 0;
- }
-#if defined(CONFIG_DRIVER_CS8900)
- if (strcmp(argv[1], "cs8900") == 0) {
- if (strcmp(argv[2], "read") == 0) {
- uchar addr; ushort data;
-
- addr = simple_strtoul(argv[3], NULL, 16);
- cs8900_e2prom_read(addr, &data);
- printf("0x%2.2X: 0x%4.4X\n", addr, data);
- } else if (strcmp(argv[2], "write") == 0) {
- uchar addr; ushort data;
-
- addr = simple_strtoul(argv[3], NULL, 16);
- data = simple_strtoul(argv[4], NULL, 16);
- cs8900_e2prom_write(addr, data);
- } else if (strcmp(argv[2], "setaddr") == 0) {
- uchar addr, i, csum; ushort data;
-
- /* check for valid ethaddr */
- for (i = 0; i < 6; i++)
- if (gd->bd->bi_enetaddr[i] != 0)
- break;
-
- if (i < 6) {
- addr = 1;
- data = 0x2158;
- cs8900_e2prom_write(addr, data);
- csum = cs8900_chksum(data);
- addr++;
- for (i = 0; i < 6; i+=2) {
- data = gd->bd->bi_enetaddr[i+1] << 8 |
- gd->bd->bi_enetaddr[i];
- cs8900_e2prom_write(addr, data);
- csum += cs8900_chksum(data);
- addr++;
- }
- /* calculate header link byte */
- data = 0xA100 | (addr * 2);
- cs8900_e2prom_write(0, data);
- csum += cs8900_chksum(data);
- /* write checksum word */
- cs8900_e2prom_write(addr, (0 - csum) << 8);
- } else {
- puts("\nplease defined 'ethaddr'\n");
- }
- } else if (strcmp(argv[2], "dump") == 0) {
- uchar addr = 0, endaddr, csum; ushort data;
-
- puts("Dump of CS8900 config device: ");
- cs8900_e2prom_read(addr, &data);
- if ((data & 0xE000) == 0xA000) {
- endaddr = (data & 0x00FF) / 2;
- csum = cs8900_chksum(data);
- for (addr = 1; addr <= endaddr; addr++) {
- cs8900_e2prom_read(addr, &data);
- printf("\n0x%2.2X: 0x%4.4X", addr, data);
- csum += cs8900_chksum(data);
- }
- printf("\nChecksum: %s", (csum == 0) ? "ok" : "wrong");
- } else {
- puts("no valid config found");
- }
- puts("\n");
- }
-
- return 0;
- }
-#endif
-#if 0
- if (strcmp(argv[1], "cantest") == 0) {
- if (argc >= 3)
- vcma9_cantest(strcmp(argv[2], "s") ? 0 : 1);
- else
- vcma9_cantest(0);
- return 0;
- }
- if (strcmp(argv[1], "nandtest") == 0) {
- vcma9_nandtest();
- return 0;
- }
- if (strcmp(argv[1], "nanderase") == 0) {
- vcma9_nanderase();
- return 0;
- }
- if (strcmp(argv[1], "nandread") == 0) {
- ulong offset = 0;
-
- if (argc >= 3)
- offset = simple_strtoul(argv[2], NULL, 16);
-
- vcma9_nandread(offset);
- return 0;
- }
- if (strcmp(argv[1], "nandwrite") == 0) {
- ulong offset = 0;
-
- if (argc >= 3)
- offset = simple_strtoul(argv[2], NULL, 16);
-
- vcma9_nandwrite(offset);
- return 0;
- }
- if (strcmp(argv[1], "dactest") == 0) {
- if (argc >= 3)
- vcma9_dactest(strcmp(argv[2], "s") ? 0 : 1);
- else
- vcma9_dactest(0);
- return 0;
- }
-#endif
-
- return (do_mplcommon(cmdtp, flag, argc, argv));
-}
-
-U_BOOT_CMD(
- vcma9, 6, 1, do_vcma9,
- "vcma9 - VCMA9 specific commands\n",
- "flash mem [SrcAddr]\n - updates U-Boot with image in memory\n"
-);
diff --git a/board/mpl/vcma9/config.mk b/board/mpl/vcma9/config.mk
deleted file mode 100644
index 1fa09c97b2..0000000000
--- a/board/mpl/vcma9/config.mk
+++ /dev/null
@@ -1,24 +0,0 @@
-#
-# (C) Copyright 2002, 2003
-# David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
-#
-# MPL VCMA9 board with S3C2410X (ARM920T) cpu
-#
-# see http://www.mpl.ch/ for more information about the MPL VCMA9
-#
-
-#
-# MPL VCMA9 has 1 bank of minimal 16 MB DRAM
-# from 0x30000000
-#
-# Linux-Kernel is expected to be at 3000'8000, entry 3000'8000
-# optionally with a ramdisk at 3040'0000
-#
-# we load ourself to 33F8'0000
-#
-# download area is 3080'0000
-#
-
-
-#TEXT_BASE = 0x30F80000
-TEXT_BASE = 0x33F80000
diff --git a/board/mpl/vcma9/flash.c b/board/mpl/vcma9/flash.c
deleted file mode 100644
index ccfe1768f6..0000000000
--- a/board/mpl/vcma9/flash.c
+++ /dev/null
@@ -1,432 +0,0 @@
-/*
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Alex Zuepke <azu@sysgo.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-
-ulong myflush (void);
-
-
-#define FLASH_BANK_SIZE PHYS_FLASH_SIZE
-#define MAIN_SECT_SIZE 0x10000 /* 64 KB */
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
-
-
-#define CMD_READ_ARRAY 0x000000F0
-#define CMD_UNLOCK1 0x000000AA
-#define CMD_UNLOCK2 0x00000055
-#define CMD_ERASE_SETUP 0x00000080
-#define CMD_ERASE_CONFIRM 0x00000030
-#define CMD_PROGRAM 0x000000A0
-#define CMD_UNLOCK_BYPASS 0x00000020
-
-#define MEM_FLASH_ADDR1 (*(volatile u16 *)(CFG_FLASH_BASE + (0x00000555 << 1)))
-#define MEM_FLASH_ADDR2 (*(volatile u16 *)(CFG_FLASH_BASE + (0x000002AA << 1)))
-
-#define BIT_ERASE_DONE 0x00000080
-#define BIT_RDY_MASK 0x00000080
-#define BIT_PROGRAM_ERROR 0x00000020
-#define BIT_TIMEOUT 0x80000000 /* our flag */
-
-#define READY 1
-#define ERR 2
-#define TMO 4
-
-/*-----------------------------------------------------------------------
- */
-
-ulong flash_init (void)
-{
- int i, j;
- ulong size = 0;
-
- for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
- ulong flashbase = 0;
-
- flash_info[i].flash_id =
-#if defined(CONFIG_AMD_LV400)
- (AMD_MANUFACT & FLASH_VENDMASK) |
- (AMD_ID_LV400B & FLASH_TYPEMASK);
-#elif defined(CONFIG_AMD_LV800)
- (AMD_MANUFACT & FLASH_VENDMASK) |
- (AMD_ID_LV800B & FLASH_TYPEMASK);
-#else
-#error "Unknown flash configured"
-#endif
- flash_info[i].size = FLASH_BANK_SIZE;
- flash_info[i].sector_count = CFG_MAX_FLASH_SECT;
- memset (flash_info[i].protect, 0, CFG_MAX_FLASH_SECT);
- if (i == 0)
- flashbase = PHYS_FLASH_1;
- else
- panic ("configured too many flash banks!\n");
- for (j = 0; j < flash_info[i].sector_count; j++) {
- if (j <= 3) {
- /* 1st one is 16 KB */
- if (j == 0) {
- flash_info[i].start[j] =
- flashbase + 0;
- }
-
- /* 2nd and 3rd are both 8 KB */
- if ((j == 1) || (j == 2)) {
- flash_info[i].start[j] =
- flashbase + 0x4000 + (j -
- 1) *
- 0x2000;
- }
-
- /* 4th 32 KB */
- if (j == 3) {
- flash_info[i].start[j] =
- flashbase + 0x8000;
- }
- } else {
- flash_info[i].start[j] =
- flashbase + (j - 3) * MAIN_SECT_SIZE;
- }
- }
- size += flash_info[i].size;
- }
-
- flash_protect (FLAG_PROTECT_SET,
- CFG_FLASH_BASE,
- CFG_FLASH_BASE + monitor_flash_len - 1,
- &flash_info[0]);
-
- flash_protect (FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0]);
-
- return size;
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t * info)
-{
- int i;
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case (AMD_MANUFACT & FLASH_VENDMASK):
- puts ("AMD: ");
- break;
- default:
- puts ("Unknown Vendor ");
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case (AMD_ID_LV400B & FLASH_TYPEMASK):
- puts ("1x Amd29LV400BB (4Mbit)\n");
- break;
- case (AMD_ID_LV800B & FLASH_TYPEMASK):
- puts ("1x Amd29LV800BB (8Mbit)\n");
- break;
- default:
- puts ("Unknown Chip Type\n");
- goto Done;
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- puts (" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; i++) {
- if ((i % 5) == 0) {
- puts ("\n ");
- }
- printf (" %08lX%s", info->start[i],
- info->protect[i] ? " (RO)" : " ");
- }
- puts ("\n");
-
-Done: ;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t * info, int s_first, int s_last)
-{
- ushort result;
- int iflag, cflag, prot, sect;
- int rc = ERR_OK;
- int chip;
-
- /* first look for protection bits */
-
- if (info->flash_id == FLASH_UNKNOWN)
- return ERR_UNKNOWN_FLASH_TYPE;
-
- if ((s_first < 0) || (s_first > s_last)) {
- return ERR_INVAL;
- }
-
- if ((info->flash_id & FLASH_VENDMASK) !=
- (AMD_MANUFACT & FLASH_VENDMASK)) {
- return ERR_UNKNOWN_FLASH_VENDOR;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
- if (prot)
- return ERR_PROTECTED;
-
- /*
- * Disable interrupts which might cause a timeout
- * here. Remember that our exception vectors are
- * at address 0 in the flash, and we don't want a
- * (ticker) exception to happen while the flash
- * chip is in programming mode.
- */
- cflag = icache_status ();
- icache_disable ();
- iflag = disable_interrupts ();
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect <= s_last && !ctrlc (); sect++) {
- printf ("Erasing sector %2d ... ", sect);
-
- /* arm simple, non interrupt dependent timer */
- reset_timer_masked ();
-
- if (info->protect[sect] == 0) { /* not protected */
- vu_short *addr = (vu_short *) (info->start[sect]);
-
- MEM_FLASH_ADDR1 = CMD_UNLOCK1;
- MEM_FLASH_ADDR2 = CMD_UNLOCK2;
- MEM_FLASH_ADDR1 = CMD_ERASE_SETUP;
-
- MEM_FLASH_ADDR1 = CMD_UNLOCK1;
- MEM_FLASH_ADDR2 = CMD_UNLOCK2;
- *addr = CMD_ERASE_CONFIRM;
-
- /* wait until flash is ready */
- chip = 0;
-
- do {
- result = *addr;
-
- /* check timeout */
- if (get_timer_masked () >
- CFG_FLASH_ERASE_TOUT) {
- MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
- chip = TMO;
- break;
- }
-
- if (!chip
- && (result & 0xFFFF) & BIT_ERASE_DONE)
- chip = READY;
-
- if (!chip
- && (result & 0xFFFF) & BIT_PROGRAM_ERROR)
- chip = ERR;
-
- } while (!chip);
-
- MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
-
- if (chip == ERR) {
- rc = ERR_PROG_ERROR;
- goto outahere;
- }
- if (chip == TMO) {
- rc = ERR_TIMOUT;
- goto outahere;
- }
-
- puts ("ok.\n");
- } else { /* it was protected */
-
- puts ("protected!\n");
- }
- }
-
- if (ctrlc ())
- puts ("User Interrupt!\n");
-
- outahere:
- /* allow flash to settle - wait 10 ms */
- udelay_masked (10000);
-
- if (iflag)
- enable_interrupts ();
-
- if (cflag)
- icache_enable ();
-
- return rc;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash
- */
-
-volatile static int write_hword (flash_info_t * info, ulong dest, ushort data)
-{
- vu_short *addr = (vu_short *) dest;
- ushort result;
- int rc = ERR_OK;
- int cflag, iflag;
- int chip;
-
- /*
- * Check if Flash is (sufficiently) erased
- */
- result = *addr;
- if ((result & data) != data)
- return ERR_NOT_ERASED;
-
-
- /*
- * Disable interrupts which might cause a timeout
- * here. Remember that our exception vectors are
- * at address 0 in the flash, and we don't want a
- * (ticker) exception to happen while the flash
- * chip is in programming mode.
- */
- cflag = icache_status ();
- icache_disable ();
- iflag = disable_interrupts ();
-
- MEM_FLASH_ADDR1 = CMD_UNLOCK1;
- MEM_FLASH_ADDR2 = CMD_UNLOCK2;
- MEM_FLASH_ADDR1 = CMD_PROGRAM;
- *addr = data;
-
- /* arm simple, non interrupt dependent timer */
- reset_timer_masked ();
-
- /* wait until flash is ready */
- chip = 0;
- do {
- result = *addr;
-
- /* check timeout */
- if (get_timer_masked () > CFG_FLASH_ERASE_TOUT) {
- chip = ERR | TMO;
- break;
- }
- if (!chip && ((result & 0x80) == (data & 0x80)))
- chip = READY;
-
- if (!chip && ((result & 0xFFFF) & BIT_PROGRAM_ERROR)) {
- result = *addr;
-
- if ((result & 0x80) == (data & 0x80))
- chip = READY;
- else
- chip = ERR;
- }
-
- } while (!chip);
-
- *addr = CMD_READ_ARRAY;
-
- if (chip == ERR || *addr != data)
- rc = ERR_PROG_ERROR;
-
- if (iflag)
- enable_interrupts ();
-
- if (cflag)
- icache_enable ();
-
- return rc;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash.
- */
-
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- ulong cp, wp;
- int l;
- int i, rc;
- ushort data;
-
- wp = (addr & ~1); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i = 0, cp = wp; i < l; ++i, ++cp) {
- data = (data >> 8) | (*(uchar *) cp << 8);
- }
- for (; i < 2 && cnt > 0; ++i) {
- data = (data >> 8) | (*src++ << 8);
- --cnt;
- ++cp;
- }
- for (; cnt == 0 && i < 2; ++i, ++cp) {
- data = (data >> 8) | (*(uchar *) cp << 8);
- }
-
- if ((rc = write_hword (info, wp, data)) != 0) {
- return (rc);
- }
- wp += 2;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 2) {
- data = *((vu_short *) src);
- if ((rc = write_hword (info, wp, data)) != 0) {
- return (rc);
- }
- src += 2;
- wp += 2;
- cnt -= 2;
- }
-
- if (cnt == 0) {
- return ERR_OK;
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i = 0, cp = wp; i < 2 && cnt > 0; ++i, ++cp) {
- data = (data >> 8) | (*src++ << 8);
- --cnt;
- }
- for (; i < 2; ++i, ++cp) {
- data = (data >> 8) | (*(uchar *) cp << 8);
- }
-
- return write_hword (info, wp, data);
-}
diff --git a/board/mpl/vcma9/lowlevel_init.S b/board/mpl/vcma9/lowlevel_init.S
deleted file mode 100644
index a02335314b..0000000000
--- a/board/mpl/vcma9/lowlevel_init.S
+++ /dev/null
@@ -1,212 +0,0 @@
-/*
- * Memory Setup stuff - taken from blob memsetup.S
- *
- * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) and
- * Jan-Derk Bakker (J.D.Bakker@its.tudelft.nl)
- *
- * Modified for the Samsung SMDK2410 by
- * (C) Copyright 2002
- * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-
-#include <config.h>
-#include <version.h>
-
-
-/* some parameters for the board */
-
-#define BWSCON 0x48000000
-#define PLD_BASE 0x2C000000
-#define SDRAM_REG 0x2C000106
-
-/* BWSCON */
-#define DW8 (0x0)
-#define DW16 (0x1)
-#define DW32 (0x2)
-#define WAIT (0x1<<2)
-#define UBLB (0x1<<3)
-
-/* BANKSIZE */
-#define BURST_EN (0x1<<7)
-
-#define B1_BWSCON (DW16)
-#define B2_BWSCON (DW32)
-#define B3_BWSCON (DW32)
-#define B4_BWSCON (DW16 + WAIT + UBLB)
-#define B5_BWSCON (DW8 + UBLB)
-#define B6_BWSCON (DW32)
-#define B7_BWSCON (DW32)
-
-/* BANK0CON */
-#define B0_Tacs 0x0 /* 0clk */
-#define B0_Tcos 0x1 /* 1clk */
-/*#define B0_Tcos 0x0 0clk */
-#define B0_Tacc 0x7 /* 14clk */
-/*#define B0_Tacc 0x5 8clk */
-#define B0_Tcoh 0x0 /* 0clk */
-#define B0_Tah 0x0 /* 0clk */
-#define B0_Tacp 0x0 /* page mode is not used */
-#define B0_PMC 0x0 /* page mode disabled */
-
-/* BANK1CON */
-#define B1_Tacs 0x0 /* 0clk */
-#define B1_Tcos 0x1 /* 1clk */
-/*#define B1_Tcos 0x0 0clk */
-#define B1_Tacc 0x7 /* 14clk */
-/*#define B1_Tacc 0x5 8clk */
-#define B1_Tcoh 0x0 /* 0clk */
-#define B1_Tah 0x0 /* 0clk */
-#define B1_Tacp 0x0 /* page mode is not used */
-#define B1_PMC 0x0 /* page mode disabled */
-
-#define B2_Tacs 0x3 /* 4clk */
-#define B2_Tcos 0x3 /* 4clk */
-#define B2_Tacc 0x7 /* 14clk */
-#define B2_Tcoh 0x3 /* 4clk */
-#define B2_Tah 0x3 /* 4clk */
-#define B2_Tacp 0x0 /* page mode is not used */
-#define B2_PMC 0x0 /* page mode disabled */
-
-#define B3_Tacs 0x3 /* 4clk */
-#define B3_Tcos 0x3 /* 4clk */
-#define B3_Tacc 0x7 /* 14clk */
-#define B3_Tcoh 0x3 /* 4clk */
-#define B3_Tah 0x3 /* 4clk */
-#define B3_Tacp 0x0 /* page mode is not used */
-#define B3_PMC 0x0 /* page mode disabled */
-
-#define B4_Tacs 0x3 /* 4clk */
-#define B4_Tcos 0x1 /* 1clk */
-#define B4_Tacc 0x7 /* 14clk */
-#define B4_Tcoh 0x1 /* 1clk */
-#define B4_Tah 0x0 /* 0clk */
-#define B4_Tacp 0x0 /* page mode is not used */
-#define B4_PMC 0x0 /* page mode disabled */
-
-#define B5_Tacs 0x0 /* 0clk */
-#define B5_Tcos 0x3 /* 4clk */
-#define B5_Tacc 0x5 /* 8clk */
-#define B5_Tcoh 0x2 /* 2clk */
-#define B5_Tah 0x1 /* 1clk */
-#define B5_Tacp 0x0 /* page mode is not used */
-#define B5_PMC 0x0 /* page mode disabled */
-
-#define B6_MT 0x3 /* SDRAM */
-#define B6_Trcd 0x1 /* 3clk */
-#define B6_SCAN 0x2 /* 10bit */
-
-#define B7_MT 0x3 /* SDRAM */
-#define B7_Trcd 0x1 /* 3clk */
-#define B7_SCAN 0x2 /* 10bit */
-
-/* REFRESH parameter */
-#define REFEN 0x1 /* Refresh enable */
-#define TREFMD 0x0 /* CBR(CAS before RAS)/Auto refresh */
-#define Trp 0x0 /* 2clk */
-#define Trc 0x3 /* 7clk */
-#define Tchr 0x2 /* 3clk */
-#define REFCNT 1113 /* period=15.6us, HCLK=60Mhz, (2048+1-15.6*60) */
-/**************************************/
-
-_TEXT_BASE:
- .word TEXT_BASE
-
-.globl lowlevel_init
-lowlevel_init:
- /* memory control configuration */
- /* make r0 relative the current location so that it */
- /* reads SMRDATA out of FLASH rather than memory ! */
- ldr r0, =CSDATA
- ldr r1, _TEXT_BASE
- sub r0, r0, r1
- ldr r1, =BWSCON /* Bus Width Status Controller */
- add r2, r0, #CSDATA_END-CSDATA
-0:
- ldr r3, [r0], #4
- str r3, [r1], #4
- cmp r2, r0
- bne 0b
-
- /* PLD access is now possible */
- /* r0 == SDRAMDATA */
- /* r1 == SDRAM controller regs */
- ldr r2, =PLD_BASE
- ldrb r3, [r2, #SDRAM_REG-PLD_BASE]
- mov r4, #SDRAMDATA1_END-SDRAMDATA
- /* calculate start and end point */
- mla r0, r3, r4, r0
- add r2, r0, r4
-0:
- ldr r3, [r0], #4
- str r3, [r1], #4
- cmp r2, r0
- bne 0b
-
- /* everything is fine now */
- mov pc, lr
-
- .ltorg
-/* the literal pools origin */
-
-CSDATA:
- .word (0+(B1_BWSCON<<4)+(B2_BWSCON<<8)+(B3_BWSCON<<12)+(B4_BWSCON<<16)+(B5_BWSCON<<20)+(B6_BWSCON<<24)+(B7_BWSCON<<28))
- .word ((B0_Tacs<<13)+(B0_Tcos<<11)+(B0_Tacc<<8)+(B0_Tcoh<<6)+(B0_Tah<<4)+(B0_Tacp<<2)+(B0_PMC))
- .word ((B1_Tacs<<13)+(B1_Tcos<<11)+(B1_Tacc<<8)+(B1_Tcoh<<6)+(B1_Tah<<4)+(B1_Tacp<<2)+(B1_PMC))
- .word ((B2_Tacs<<13)+(B2_Tcos<<11)+(B2_Tacc<<8)+(B2_Tcoh<<6)+(B2_Tah<<4)+(B2_Tacp<<2)+(B2_PMC))
- .word ((B3_Tacs<<13)+(B3_Tcos<<11)+(B3_Tacc<<8)+(B3_Tcoh<<6)+(B3_Tah<<4)+(B3_Tacp<<2)+(B3_PMC))
- .word ((B4_Tacs<<13)+(B4_Tcos<<11)+(B4_Tacc<<8)+(B4_Tcoh<<6)+(B4_Tah<<4)+(B4_Tacp<<2)+(B4_PMC))
- .word ((B5_Tacs<<13)+(B5_Tcos<<11)+(B5_Tacc<<8)+(B5_Tcoh<<6)+(B5_Tah<<4)+(B5_Tacp<<2)+(B5_PMC))
-CSDATA_END:
-
-SDRAMDATA:
-/* 4Mx8x4 */
- .word ((B6_MT<<15)+(B6_Trcd<<2)+(B6_SCAN))
- .word ((B7_MT<<15)+(B7_Trcd<<2)+(B7_SCAN))
- .word ((REFEN<<23)+(TREFMD<<22)+(Trp<<20)+(Trc<<18)+(Tchr<<16)+REFCNT)
- .word 0x32 + BURST_EN
- .word 0x30
- .word 0x30
-SDRAMDATA1_END:
-
-/* 8Mx8x4 (not implemented yet) */
- .word ((B6_MT<<15)+(B6_Trcd<<2)+(B6_SCAN))
- .word ((B7_MT<<15)+(B7_Trcd<<2)+(B7_SCAN))
- .word ((REFEN<<23)+(TREFMD<<22)+(Trp<<20)+(Trc<<18)+(Tchr<<16)+REFCNT)
- .word 0x32 + BURST_EN
- .word 0x30
- .word 0x30
-
-/* 2Mx8x4 (not implemented yet) */
- .word ((B6_MT<<15)+(B6_Trcd<<2)+(B6_SCAN))
- .word ((B7_MT<<15)+(B7_Trcd<<2)+(B7_SCAN))
- .word ((REFEN<<23)+(TREFMD<<22)+(Trp<<20)+(Trc<<18)+(Tchr<<16)+REFCNT)
- .word 0x32 + BURST_EN
- .word 0x30
- .word 0x30
-
-/* 4Mx8x2 (not implemented yet) */
- .word ((B6_MT<<15)+(B6_Trcd<<2)+(B6_SCAN))
- .word ((B7_MT<<15)+(B7_Trcd<<2)+(B7_SCAN))
- .word ((REFEN<<23)+(TREFMD<<22)+(Trp<<20)+(Trc<<18)+(Tchr<<16)+REFCNT)
- .word 0x32 + BURST_EN
- .word 0x30
- .word 0x30
diff --git a/board/mpl/vcma9/u-boot.lds b/board/mpl/vcma9/u-boot.lds
deleted file mode 100644
index f4fbf969c3..0000000000
--- a/board/mpl/vcma9/u-boot.lds
+++ /dev/null
@@ -1,57 +0,0 @@
-/*
- * (C) Copyright 2002
- * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-/*OUTPUT_FORMAT("elf32-arm", "elf32-arm", "elf32-arm")*/
-OUTPUT_ARCH(arm)
-ENTRY(_start)
-SECTIONS
-{
- . = 0x00000000;
-
- . = ALIGN(4);
- .text :
- {
- cpu/arm920t/start.o (.text)
- *(.text)
- }
-
- . = ALIGN(4);
- .rodata : { *(.rodata) }
-
- . = ALIGN(4);
- .data : { *(.data) }
-
- . = ALIGN(4);
- .got : { *(.got) }
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = ALIGN(4);
- __bss_start = .;
- .bss : { *(.bss) }
- _end = .;
-}
diff --git a/board/mpl/vcma9/vcma9.c b/board/mpl/vcma9/vcma9.c
deleted file mode 100644
index ffdba5d990..0000000000
--- a/board/mpl/vcma9/vcma9.c
+++ /dev/null
@@ -1,353 +0,0 @@
-/*
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * (C) Copyright 2002
- * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <s3c2410.h>
-#include <i2c.h>
-
-#include "vcma9.h"
-#include "../common/common_util.h"
-
-/* ------------------------------------------------------------------------- */
-
-#define FCLK_SPEED 1
-
-#if FCLK_SPEED==0 /* Fout = 203MHz, Fin = 12MHz for Audio */
-#define M_MDIV 0xC3
-#define M_PDIV 0x4
-#define M_SDIV 0x1
-#elif FCLK_SPEED==1 /* Fout = 202.8MHz */
-#define M_MDIV 0xA1
-#define M_PDIV 0x3
-#define M_SDIV 0x1
-#endif
-
-#define USB_CLOCK 1
-
-#if USB_CLOCK==0
-#define U_M_MDIV 0xA1
-#define U_M_PDIV 0x3
-#define U_M_SDIV 0x1
-#elif USB_CLOCK==1
-#define U_M_MDIV 0x48
-#define U_M_PDIV 0x3
-#define U_M_SDIV 0x2
-#endif
-
-static inline void delay(unsigned long loops)
-{
- __asm__ volatile ("1:\n"
- "subs %0, %1, #1\n"
- "bne 1b":"=r" (loops):"0" (loops));
-}
-
-/*
- * Miscellaneous platform dependent initialisations
- */
-
-int board_init(void)
-{
- DECLARE_GLOBAL_DATA_PTR;
- S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
- S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
-
- /* to reduce PLL lock time, adjust the LOCKTIME register */
- clk_power->LOCKTIME = 0xFFFFFF;
-
- /* configure MPLL */
- clk_power->MPLLCON = ((M_MDIV << 12) + (M_PDIV << 4) + M_SDIV);
-
- /* some delay between MPLL and UPLL */
- delay (4000);
-
- /* configure UPLL */
- clk_power->UPLLCON = ((U_M_MDIV << 12) + (U_M_PDIV << 4) + U_M_SDIV);
-
- /* some delay between MPLL and UPLL */
- delay (8000);
-
- /* set up the I/O ports */
- gpio->GPACON = 0x007FFFFF;
- gpio->GPBCON = 0x002AAAAA;
- gpio->GPBUP = 0x000002BF;
- gpio->GPCCON = 0xAAAAAAAA;
- gpio->GPCUP = 0x0000FFFF;
- gpio->GPDCON = 0xAAAAAAAA;
- gpio->GPDUP = 0x0000FFFF;
- gpio->GPECON = 0xAAAAAAAA;
- gpio->GPEUP = 0x000037F7;
- gpio->GPFCON = 0x00000000;
- gpio->GPFUP = 0x00000000;
- gpio->GPGCON = 0xFFEAFF5A;
- gpio->GPGUP = 0x0000F0DC;
- gpio->GPHCON = 0x0028AAAA;
- gpio->GPHUP = 0x00000656;
-
- /* setup correct IRQ modes for NIC */
- gpio->EXTINT2 = (gpio->EXTINT2 & ~(7<<8)) | (4<<8); /* rising edge mode */
-
- /* select USB port 2 to be host or device (fix to host for now) */
- gpio->MISCCR |= 0x08;
-
- /* init serial */
- gd->baudrate = CONFIG_BAUDRATE;
- gd->have_console = 1;
- serial_init();
-
- /* arch number of VCMA9-Board */
- gd->bd->bi_arch_number = MACH_TYPE_MPL_VCMA9;
-
- /* adress of boot parameters */
- gd->bd->bi_boot_params = 0x30000100;
-
- icache_enable();
- dcache_enable();
-
- return 0;
-}
-
-/*
- * NAND flash initialization.
- */
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
-extern ulong
-nand_probe(ulong physadr);
-
-
-static inline void NF_Reset(void)
-{
- int i;
-
- NF_SetCE(NFCE_LOW);
- NF_Cmd(0xFF); /* reset command */
- for(i = 0; i < 10; i++); /* tWB = 100ns. */
- NF_WaitRB(); /* wait 200~500us; */
- NF_SetCE(NFCE_HIGH);
-}
-
-
-static inline void NF_Init(void)
-{
-#if 0 /* a little bit too optimistic */
-#define TACLS 0
-#define TWRPH0 3
-#define TWRPH1 0
-#else
-#define TACLS 0
-#define TWRPH0 4
-#define TWRPH1 2
-#endif
-
- NF_Conf((1<<15)|(0<<14)|(0<<13)|(1<<12)|(1<<11)|(TACLS<<8)|(TWRPH0<<4)|(TWRPH1<<0));
- /*nand->NFCONF = (1<<15)|(1<<14)|(1<<13)|(1<<12)|(1<<11)|(TACLS<<8)|(TWRPH0<<4)|(TWRPH1<<0); */
- /* 1 1 1 1, 1 xxx, r xxx, r xxx */
- /* En 512B 4step ECCR nFCE=H tACLS tWRPH0 tWRPH1 */
-
- NF_Reset();
-}
-
-void
-nand_init(void)
-{
- S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
-
- NF_Init();
-#ifdef DEBUG
- printf("NAND flash probing at 0x%.8lX\n", (ulong)nand);
-#endif
- printf ("%4lu MB\n", nand_probe((ulong)nand) >> 20);
-}
-#endif
-
-/*
- * Get some Board/PLD Info
- */
-
-static u8 Get_PLD_ID(void)
-{
- VCMA9_PLD * const pld = VCMA9_GetBase_PLD();
-
- return(pld->ID);
-}
-
-static u8 Get_PLD_BOARD(void)
-{
- VCMA9_PLD * const pld = VCMA9_GetBase_PLD();
-
- return(pld->BOARD);
-}
-
-static u8 Get_PLD_SDRAM(void)
-{
- VCMA9_PLD * const pld = VCMA9_GetBase_PLD();
-
- return(pld->SDRAM);
-}
-
-static u8 Get_PLD_Version(void)
-{
- return((Get_PLD_ID() >> 4) & 0x0F);
-}
-
-static u8 Get_PLD_Revision(void)
-{
- return(Get_PLD_ID() & 0x0F);
-}
-
-#if 0 /* not used */
-static int Get_Board_Config(void)
-{
- u8 config = Get_PLD_BOARD() & 0x03;
-
- if (config == 3)
- return 1;
- else
- return 0;
-}
-#endif
-
-static uchar Get_Board_PCB(void)
-{
- return(((Get_PLD_BOARD() >> 4) & 0x03) + 'A');
-}
-
-static u8 Get_SDRAM_ChipNr(void)
-{
- switch ((Get_PLD_SDRAM() >> 4) & 0x0F) {
- case 0: return 4;
- case 1: return 1;
- case 2: return 2;
- default: return 0;
- }
-}
-
-static ulong Get_SDRAM_ChipSize(void)
-{
- switch (Get_PLD_SDRAM() & 0x0F) {
- case 0: return 16 * (1024*1024);
- case 1: return 32 * (1024*1024);
- case 2: return 8 * (1024*1024);
- case 3: return 8 * (1024*1024);
- default: return 0;
- }
-}
-static const char * Get_SDRAM_ChipGeom(void)
-{
- switch (Get_PLD_SDRAM() & 0x0F) {
- case 0: return "4Mx8x4";
- case 1: return "8Mx8x4";
- case 2: return "2Mx8x4";
- case 3: return "4Mx8x2";
- default: return "unknown";
- }
-}
-
-static void Show_VCMA9_Info(char *board_name, char *serial)
-{
- printf("Board: %s SN: %s PCB Rev: %c PLD(%d,%d)\n",
- board_name, serial, Get_Board_PCB(), Get_PLD_Version(), Get_PLD_Revision());
- printf("SDRAM: %d chips %s\n", Get_SDRAM_ChipNr(), Get_SDRAM_ChipGeom());
-}
-
-int dram_init(void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = Get_SDRAM_ChipSize() * Get_SDRAM_ChipNr();
-
- return 0;
-}
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Check Board Identity:
- */
-
-int checkboard(void)
-{
- unsigned char s[50];
- int i;
- backup_t *b = (backup_t *) s;
-
- i = getenv_r("serial#", s, 32);
- if ((i < 0) || strncmp (s, "VCMA9", 5)) {
- get_backup_values (b);
- if (strncmp (b->signature, "MPL\0", 4) != 0) {
- puts ("### No HW ID - assuming VCMA9");
- } else {
- b->serial_name[5] = 0;
- Show_VCMA9_Info(b->serial_name, &b->serial_name[6]);
- }
- } else {
- s[5] = 0;
- Show_VCMA9_Info(s, &s[6]);
- }
- /*printf("\n");*/
- return(0);
-}
-
-
-extern void mem_test_reloc(void);
-
-int last_stage_init(void)
-{
- mem_test_reloc();
- checkboard();
- show_stdio_dev();
- check_env();
- return 0;
-}
-
-/***************************************************************************
- * some helping routines
- */
-#if !CONFIG_USB_KEYBOARD
-int overwrite_console(void)
-{
- /* return TRUE if console should be overwritten */
- return 0;
-}
-#endif
-
-/************************************************************************
-* Print VCMA9 Info
-************************************************************************/
-void print_vcma9_info(void)
-{
- unsigned char s[50];
- int i;
-
- if ((i = getenv_r("serial#", s, 32)) < 0) {
- puts ("### No HW ID - assuming VCMA9");
- printf("i %d", i*24);
- } else {
- s[5] = 0;
- Show_VCMA9_Info(s, &s[6]);
- }
-}
diff --git a/board/mpl/vcma9/vcma9.h b/board/mpl/vcma9/vcma9.h
deleted file mode 100644
index c0167d5168..0000000000
--- a/board/mpl/vcma9/vcma9.h
+++ /dev/null
@@ -1,134 +0,0 @@
-/*
- * (C) Copyright 2002, 2003
- * David Mueller, ELSOFT AG, d.mueller@elsoft.ch
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- */
- /****************************************************************************
- * Global routines used for VCMA9
- *****************************************************************************/
-
-#include <s3c2410.h>
-
-extern int mem_test(unsigned long start, unsigned long ramsize,int mode);
-
-void print_vcma9_info(void);
-
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
-typedef enum {
- NFCE_LOW,
- NFCE_HIGH
-} NFCE_STATE;
-
-static inline void NF_Conf(u16 conf)
-{
- S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
-
- nand->NFCONF = conf;
-}
-
-static inline void NF_Cmd(u8 cmd)
-{
- S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
-
- nand->NFCMD = cmd;
-}
-
-static inline void NF_CmdW(u8 cmd)
-{
- NF_Cmd(cmd);
- udelay(1);
-}
-
-static inline void NF_Addr(u8 addr)
-{
- S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
-
- nand->NFADDR = addr;
-}
-
-static inline void NF_SetCE(NFCE_STATE s)
-{
- S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
-
- switch (s) {
- case NFCE_LOW:
- nand->NFCONF &= ~(1<<11);
- break;
-
- case NFCE_HIGH:
- nand->NFCONF |= (1<<11);
- break;
- }
-}
-
-static inline void NF_WaitRB(void)
-{
- S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
-
- while (!(nand->NFSTAT & (1<<0)));
-}
-
-static inline void NF_Write(u8 data)
-{
- S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
-
- nand->NFDATA = data;
-}
-
-static inline u8 NF_Read(void)
-{
- S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
-
- return(nand->NFDATA);
-}
-
-static inline void NF_Init_ECC(void)
-{
- S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
-
- nand->NFCONF |= (1<<12);
-}
-
-static inline u32 NF_Read_ECC(void)
-{
- S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
-
- return(nand->NFECC);
-}
-
-#endif
-
-/* VCMA9 PLD regsiters */
-typedef struct {
- S3C24X0_REG8 ID;
- S3C24X0_REG8 NIC;
- S3C24X0_REG8 CAN;
- S3C24X0_REG8 MISC;
- S3C24X0_REG8 GPCD;
- S3C24X0_REG8 BOARD;
- S3C24X0_REG8 SDRAM;
-} /*__attribute__((__packed__))*/ VCMA9_PLD;
-
-#define VCMA9_PLD_BASE 0x2C000100
-static inline VCMA9_PLD * const VCMA9_GetBase_PLD(void)
-{
- return (VCMA9_PLD * const)VCMA9_PLD_BASE;
-}
diff --git a/board/musenki/Makefile b/board/musenki/Makefile
deleted file mode 100644
index 24dc0264f3..0000000000
--- a/board/musenki/Makefile
+++ /dev/null
@@ -1,41 +0,0 @@
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o
-SOBJS =
-
-$(LIB): .depend $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/musenki/README b/board/musenki/README
deleted file mode 100644
index 135a01aa0b..0000000000
--- a/board/musenki/README
+++ /dev/null
@@ -1,298 +0,0 @@
-U-Boot for a Musenki M-3/M-1 board
----------------------------
-
-Musenki M-1 and M-3 have two banks of flash of 4MB or 8MB each.
-
-In board's notation, bank 0 is the one at the address of 0xFF800000
-and bank 1 is the one at the address of 0xFF000000.
-
-On power-up the processor jumps to the address of 0xFFF00100, the last
-megabyte of the bank 0 of flash.
-
-Thus, U-Boot is configured to reside in flash starting at the address of
-0xFFF00000. The environment space is located in flash separately from
-U-Boot, at the address of 0xFF800000.
-
-There is a Davicom 9102A on-board, but I don't have it working yet.
-
-U-Boot test results
---------------------
-
-x.x Operation on all available serial consoles
-
-x.x.x CONFIG_CONS_INDEX 1
-
-
-U-Boot 1.1.1 (Nov 20 2001 - 15:55:32)
-
-CPU: MPC8245 Revision 16.20 at 250 MHz: 16 kB I-Cache 16 kB D-Cache
-Board: MUSENKI Local Bus at 100 MHz
-DRAM: 32 MB
-FLASH: 4 MB
-In: serial
-Out: serial
-Err: serial
-Hit any key to stop autoboot: 0
-=> help
-autoscr - run script from memory
-base - print or set address offset
-bdinfo - print Board Info structure
-bootm - boot application image from memory
-bootp - boot image via network using BootP/TFTP protocol
-bootd - boot default, i.e., run 'bootcmd'
-cmp - memory compare
-coninfo - print console devices and informations
-cp - memory copy
-crc32 - checksum calculation
-dcache - enable or disable data cache
-echo - echo args to console
-erase - erase FLASH memory
-flinfo - print FLASH memory information
-go - start application at address 'addr'
-help - print online help
-icache - enable or disable instruction cache
-iminfo - print header information for application image
-loadb - load binary file over serial line (kermit mode)
-loads - load S-Record file over serial line
-loop - infinite loop on address range
-md - memory display
-mm - memory modify (auto-incrementing)
-mtest - simple RAM test
-mw - memory write (fill)
-nm - memory modify (constant address)
-printenv- print environment variables
-protect - enable or disable FLASH write protection
-rarpboot- boot image via network using RARP/TFTP protocol
-reset - Perform RESET of the CPU
-run - run commands in an environment variable
-saveenv - save environment variables to persistent storage
-setenv - set environment variables
-tftpboot- boot image via network using TFTP protocol
- and env variables ipaddr and serverip
-version - print monitor version
-? - alias for 'help'
-
-
-x.x.x CONFIG_CONS_INDEX 2
-
-**** NOT TESTED ****
-
-x.x Flash Driver Operation
-
-
-Boot 1.1.1 (Nov 20 2001 - 15:55:32)
-
-CPU: MPC8245 Revision 16.20 at 250 MHz: 16 kB I-Cache 16 kB D-Cache
-Board: MUSENKI Local Bus at 100 MHz
-DRAM: 32 MB
-FLASH: 4 MB
-*** Warning - bad CRC, using default environment
-
-In: serial
-Out: serial
-Err: serial
-Hit any key to stop autoboot: 0
-=>
-=> md ff800000
-ff800000: 46989bf8 626f6f74 636d643d 626f6f74 F...bootcmd=boot
-ff800010: 6d204646 38323030 30300062 6f6f7464 m FF820000.bootd
-ff800020: 656c6179 3d350062 61756472 6174653d elay=5.baudrate=
-ff800030: 39363030 00636c6f 636b735f 696e5f6d 9600.clocks_in_m
-ff800040: 687a3d31 00737464 696e3d73 65726961 hz=1.stdin=seria
-ff800050: 6c007374 646f7574 3d736572 69616c00 l.stdout=serial.
-ff800060: 73746465 72723d73 65726961 6c006970 stderr=serial.ip
-ff800070: 61646472 3d313932 2e313638 2e302e34 addr=192.168.0.4
-ff800080: 32007365 72766572 69703d31 39322e31 2.serverip=192.1
-ff800090: 36382e30 2e380000 00000000 00000000 68.0.8..........
-ff8000a0: 00000000 00000000 00000000 00000000 ................
-ff8000b0: 00000000 00000000 00000000 00000000 ................
-ff8000c0: 00000000 00000000 00000000 00000000 ................
-ff8000d0: 00000000 00000000 00000000 00000000 ................
-ff8000e0: 00000000 00000000 00000000 00000000 ................
-ff8000f0: 00000000 00000000 00000000 00000000 ................
-=> protect off ff800000 ff81ffff
-Un-Protected 1 sectors
-=> erase ff800000 ff81ffff
-Erase Flash from 0xff800000 to 0xff81ffff
- done
-Erased 1 sectors
-=> md ff800000
-ff800000: ffffffff ffffffff ffffffff ffffffff ................
-ff800010: ffffffff ffffffff ffffffff ffffffff ................
-ff800020: ffffffff ffffffff ffffffff ffffffff ................
-ff800030: ffffffff ffffffff ffffffff ffffffff ................
-ff800040: ffffffff ffffffff ffffffff ffffffff ................
-ff800050: ffffffff ffffffff ffffffff ffffffff ................
-ff800060: ffffffff ffffffff ffffffff ffffffff ................
-ff800070: ffffffff ffffffff ffffffff ffffffff ................
-ff800080: ffffffff ffffffff ffffffff ffffffff ................
-ff800090: ffffffff ffffffff ffffffff ffffffff ................
-ff8000a0: ffffffff ffffffff ffffffff ffffffff ................
-ff8000b0: ffffffff ffffffff ffffffff ffffffff ................
-ff8000c0: ffffffff ffffffff ffffffff ffffffff ................
-ff8000d0: ffffffff ffffffff ffffffff ffffffff ................
-ff8000e0: ffffffff ffffffff ffffffff ffffffff ................
-ff8000f0: ffffffff ffffffff ffffffff ffffffff ................
-
-x.x.x Information
-
-
-U-Boot 1.1.1 (Nov 20 2001 - 15:55:32)
-
-CPU: MPC8245 Revision 16.20 at 250 MHz: 16 kB I-Cache 16 kB D-Cache
-Board: MUSENKI Local Bus at 100 MHz
-DRAM: 32 MB
-FLASH: 4 MB
-*** Warning - bad CRC, using default environment
-
-In: serial
-Out: serial
-Err: serial
-Hit any key to stop autoboot: 0
-=> flinfo
-
-Bank # 1: Intel 28F320J3A (32Mbit = 128K x 32)
- Size: 4 MB in 32 Sectors
- Sector Start Addresses:
- FF800000 (RO) FF820000 FF840000 FF860000 FF880000
- FF8A0000 FF8C0000 FF8E0000 FF900000 FF920000
- FF940000 FF960000 FF980000 FF9A0000 FF9C0000
- FF9E0000 FFA00000 FFA20000 FFA40000 FFA60000
- FFA80000 FFAA0000 FFAC0000 FFAE0000 FFB00000
- FFB20000 FFB40000 FFB60000 FFB80000 FFBA0000
- FFBC0000 FFBE0000
-
-Bank # 2: missing or unknown FLASH type
-=>
-
-
-x.x.x Flash Programming
-
-
-U-Boot 1.1.1 (Nov 20 2001 - 15:55:32)
-
-CPU: MPC8245 Revision 16.20 at 250 MHz: 16 kB I-Cache 16 kB D-Cache
-Board: MUSENKI Local Bus at 100 MHz
-DRAM: 32 MB
-FLASH: 4 MB
-
-In: serial
-Out: serial
-Err: serial
-Hit any key to stop autoboot: 0
-=>
-=>
-=>
-=> protect off ff800000 ff81ffff
-Un-Protected 1 sectors
-=> cp 0 ff800000 20
-Copy to Flash... done
-=> md ff800000
-ff800000: 37ce33ec 33cc334c 33c031cc 33cc35cc 7.3.3.3L3.1.3.5.
-ff800010: 33ec13ce 30ccb3ec b3c833c4 31c836cc 3...0.....3.1.6.
-ff800020: 33cc3b9d 31ec33ee 13ecf3cc 338833ec 3.;.1.3.....3.3.
-ff800030: 234c33ec 32cc22cc 33883bdc 534433cc #L3.2.".3.;.SD3.
-ff800040: 33cc30c8 31cc32ec 338c33cc 330c33dc 3.0.1.2.3.3.3.3.
-ff800050: 33cc13dc 334c534c b1c433d8 128c13cc 3...3LSL..3.....
-ff800060: 37ec36cd 33dc33cc bbc9f7e8 bbcc77cc 7.6.3.3.......w.
-ff800070: 314c0adc 139c30ed 33cc334c 33c833ec 1L....0.3.3L3.3.
-ff800080: ffffffff ffffffff ffffffff ffffffff ................
-ff800090: ffffffff ffffffff ffffffff ffffffff ................
-ff8000a0: ffffffff ffffffff ffffffff ffffffff ................
-ff8000b0: ffffffff ffffffff ffffffff ffffffff ................
-ff8000c0: ffffffff ffffffff ffffffff ffffffff ................
-ff8000d0: ffffffff ffffffff ffffffff ffffffff ................
-ff8000e0: ffffffff ffffffff ffffffff ffffffff ................
-ff8000f0: ffffffff ffffffff ffffffff ffffffff ................
-
-
-x.x.x Storage of environment variables in flash
-
-
-U-Boot 1.1.1 (Nov 20 2001 - 15:55:32)
-
-CPU: MPC8245 Revision 16.20 at 250 MHz: 16 kB I-Cache 16 kB D-Cache
-Board: MUSENKI Local Bus at 100 MHz
-DRAM: 32 MB
-FLASH: 4 MB
-In: serial
-Out: serial
-Err: serial
-Hit any key to stop autoboot: 0
-=> printenv
-bootcmd=bootm FF820000
-bootdelay=5
-baudrate=9600
-clocks_in_mhz=1
-stdin=serial
-stdout=serial
-stderr=serial
-
-Environment size: 106/16380 bytes
-=> setenv myvar 1234
-=> saveenv
-Un-Protected 1 sectors
-Erasing Flash...
- done
-Erased 1 sectors
-Saving Environment to Flash...
-Protected 1 sectors
-=> reset
-
-
-U-Boot 1.1.1 (Nov 20 2001 - 15:55:32)
-
-CPU: MPC8245 Revision 16.20 at 250 MHz: 16 kB I-Cache 16 kB D-Cache
-Board: MUSENKI Local Bus at 100 MHz
-DRAM: 32 MB
-FLASH: 4 MB
-In: serial
-Out: serial
-Err: serial
-Hit any key to stop autoboot: 0
-=> printenv
-bootcmd=bootm FF820000
-bootdelay=5
-baudrate=9600
-clocks_in_mhz=1
-myvar=1234
-stdin=serial
-stdout=serial
-stderr=serial
-
-Environment size: 117/16380 bytes
-
-x.x Image Download and run over serial port
-
-
-U-Boot 1.1.1 (Nov 20 2001 - 15:55:32)
-
-CPU: MPC8245 Revision 16.20 at 250 MHz: 16 kB I-Cache 16 kB D-Cache
-Board: MUSENKI Local Bus at 100 MHz
-DRAM: 32 MB
-FLASH: 4 MB
-In: serial
-Out: serial
-Err: serial
-Hit any key to stop autoboot: 0
-=> loads
-## Ready for S-Record download ...
-
-## First Load Addr = 0x00040000
-## Last Load Addr = 0x00050177
-## Total Size = 0x00010178 = 65912 Bytes
-## Start Addr = 0x00040004
-=> go 40004
-## Starting application at 0x00040004 ...
-Hello World
-argc = 1
-argv[0] = "40004"
-argv[1] = "<NULL>"
-Hit any key to exit ...
-
-## Application terminated, rc = 0x0
-
-
-x.x Image download and run over ethernet interface
-
-untested (not working yet, actually)
diff --git a/board/musenki/config.mk b/board/musenki/config.mk
deleted file mode 100644
index 18673e16d4..0000000000
--- a/board/musenki/config.mk
+++ /dev/null
@@ -1,30 +0,0 @@
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# CU824 board
-#
-
-TEXT_BASE = 0xFFF00000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE)
diff --git a/board/musenki/flash.c b/board/musenki/flash.c
deleted file mode 100644
index cd33d8ed33..0000000000
--- a/board/musenki/flash.c
+++ /dev/null
@@ -1,512 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc824x.h>
-
-#if defined(CFG_ENV_IS_IN_FLASH)
-# ifndef CFG_ENV_ADDR
-# define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_ENV_OFFSET)
-# endif
-# ifndef CFG_ENV_SIZE
-# define CFG_ENV_SIZE CFG_ENV_SECT_SIZE
-# endif
-# ifndef CFG_ENV_SECT_SIZE
-# define CFG_ENV_SECT_SIZE CFG_ENV_SIZE
-# endif
-#endif
-
-/*---------------------------------------------------------------------*/
-#undef DEBUG_FLASH
-
-#ifdef DEBUG_FLASH
-#define DEBUGF(fmt,args...) printf(fmt ,##args)
-#else
-#define DEBUGF(fmt,args...)
-#endif
-/*---------------------------------------------------------------------*/
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (vu_char *addr, flash_info_t *info);
-static int write_data (flash_info_t *info, uchar *dest, uchar data);
-static void flash_get_offsets (ulong base, flash_info_t *info);
-
-
-/*
- * don't ask. its stupid, but more than one soul has had to live with this mistake
- * "swaptab[i]" is the value of "i" with the bits reversed.
- */
-
-#define MUSENKI_BROKEN_FLASH 1
-
-#ifdef MUSENKI_BROKEN_FLASH
-unsigned char swaptab[256] = {
- 0x00, 0x80, 0x40, 0xc0, 0x20, 0xa0, 0x60, 0xe0,
- 0x10, 0x90, 0x50, 0xd0, 0x30, 0xb0, 0x70, 0xf0,
- 0x08, 0x88, 0x48, 0xc8, 0x28, 0xa8, 0x68, 0xe8,
- 0x18, 0x98, 0x58, 0xd8, 0x38, 0xb8, 0x78, 0xf8,
- 0x04, 0x84, 0x44, 0xc4, 0x24, 0xa4, 0x64, 0xe4,
- 0x14, 0x94, 0x54, 0xd4, 0x34, 0xb4, 0x74, 0xf4,
- 0x0c, 0x8c, 0x4c, 0xcc, 0x2c, 0xac, 0x6c, 0xec,
- 0x1c, 0x9c, 0x5c, 0xdc, 0x3c, 0xbc, 0x7c, 0xfc,
- 0x02, 0x82, 0x42, 0xc2, 0x22, 0xa2, 0x62, 0xe2,
- 0x12, 0x92, 0x52, 0xd2, 0x32, 0xb2, 0x72, 0xf2,
- 0x0a, 0x8a, 0x4a, 0xca, 0x2a, 0xaa, 0x6a, 0xea,
- 0x1a, 0x9a, 0x5a, 0xda, 0x3a, 0xba, 0x7a, 0xfa,
- 0x06, 0x86, 0x46, 0xc6, 0x26, 0xa6, 0x66, 0xe6,
- 0x16, 0x96, 0x56, 0xd6, 0x36, 0xb6, 0x76, 0xf6,
- 0x0e, 0x8e, 0x4e, 0xce, 0x2e, 0xae, 0x6e, 0xee,
- 0x1e, 0x9e, 0x5e, 0xde, 0x3e, 0xbe, 0x7e, 0xfe,
- 0x01, 0x81, 0x41, 0xc1, 0x21, 0xa1, 0x61, 0xe1,
- 0x11, 0x91, 0x51, 0xd1, 0x31, 0xb1, 0x71, 0xf1,
- 0x09, 0x89, 0x49, 0xc9, 0x29, 0xa9, 0x69, 0xe9,
- 0x19, 0x99, 0x59, 0xd9, 0x39, 0xb9, 0x79, 0xf9,
- 0x05, 0x85, 0x45, 0xc5, 0x25, 0xa5, 0x65, 0xe5,
- 0x15, 0x95, 0x55, 0xd5, 0x35, 0xb5, 0x75, 0xf5,
- 0x0d, 0x8d, 0x4d, 0xcd, 0x2d, 0xad, 0x6d, 0xed,
- 0x1d, 0x9d, 0x5d, 0xdd, 0x3d, 0xbd, 0x7d, 0xfd,
- 0x03, 0x83, 0x43, 0xc3, 0x23, 0xa3, 0x63, 0xe3,
- 0x13, 0x93, 0x53, 0xd3, 0x33, 0xb3, 0x73, 0xf3,
- 0x0b, 0x8b, 0x4b, 0xcb, 0x2b, 0xab, 0x6b, 0xeb,
- 0x1b, 0x9b, 0x5b, 0xdb, 0x3b, 0xbb, 0x7b, 0xfb,
- 0x07, 0x87, 0x47, 0xc7, 0x27, 0xa7, 0x67, 0xe7,
- 0x17, 0x97, 0x57, 0xd7, 0x37, 0xb7, 0x77, 0xf7,
- 0x0f, 0x8f, 0x4f, 0xcf, 0x2f, 0xaf, 0x6f, 0xef,
- 0x1f, 0x9f, 0x5f, 0xdf, 0x3f, 0xbf, 0x7f, 0xff,
-};
-
-#define BS(b) (swaptab[b])
-
-#else
-
-#define BS(b) (b)
-
-#endif
-
-#define BYTEME(x) ((x) & 0xFF)
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- unsigned long size_b0, size_b1;
- int i;
-
- /* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* Static FLASH Bank configuration here - FIXME XXX */
-
- DEBUGF("\n## Get flash bank 1 size @ 0x%08x\n",CFG_FLASH_BASE0_PRELIM);
-
- size_b0 = flash_get_size((vu_char *)CFG_FLASH_BASE0_PRELIM, &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank 0: "
- "ID 0x%lx, Size = 0x%08lx = %ld MB\n",
- flash_info[0].flash_id,
- size_b0, size_b0<<20);
- }
-
- DEBUGF("## Get flash bank 2 size @ 0x%08x\n",CFG_FLASH_BASE1_PRELIM);
- size_b1 = flash_get_size((vu_char *)CFG_FLASH_BASE1_PRELIM, &flash_info[1]);
-
- DEBUGF("## Prelim. Flash bank sizes: %08lx + 0x%08lx\n",size_b0,size_b1);
-
- flash_get_offsets (CFG_FLASH_BASE, &flash_info[0]);
-
- flash_info[0].size = size_b0;
-
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
- DEBUGF("protect monitor %x @ %x\n", CFG_MONITOR_BASE, monitor_flash_len);
- /* monitor protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+monitor_flash_len-1,
- &flash_info[0]);
-#endif
-
-#ifdef CFG_ENV_IS_IN_FLASH
- /* ENV protection ON by default */
- DEBUGF("protect environtment %x @ %x\n", CFG_ENV_ADDR, CFG_ENV_SECT_SIZE);
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR+CFG_ENV_SECT_SIZE-1,
- &flash_info[0]);
-#endif
-
- if (size_b1) {
- flash_info[1].size = size_b1;
- flash_get_offsets (CFG_FLASH_BASE + size_b0, &flash_info[1]);
-
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
- /* monitor protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+monitor_flash_len-1,
- &flash_info[1]);
-#endif
-
-#ifdef CFG_ENV_IS_IN_FLASH
- /* ENV protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR+CFG_ENV_SECT_SIZE-1,
- &flash_info[1]);
-#endif
- } else {
- flash_info[1].flash_id = FLASH_UNKNOWN;
- flash_info[1].sector_count = -1;
- flash_info[1].size = 0;
- }
-
- DEBUGF("## Final Flash bank sizes: %08lx + 0x%08lx\n",size_b0,size_b1);
-
- return (size_b0 + size_b1);
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_get_offsets (ulong base, flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_INTEL:
- for (i = 0; i < info->sector_count; i++) {
- info->start[i] = base;
- base += 0x00020000; /* 128k per bank */
- }
- return;
-
- default:
- printf ("Don't know sector ofsets for flash type 0x%lx\n", info->flash_id);
- return;
- }
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD: printf ("AMD "); break;
- case FLASH_MAN_FUJ: printf ("Fujitsu "); break;
- case FLASH_MAN_SST: printf ("SST "); break;
- case FLASH_MAN_STM: printf ("STM "); break;
- case FLASH_MAN_INTEL: printf ("Intel "); break;
- case FLASH_MAN_MT: printf ("MT "); break;
- default: printf ("Unknown Vendor "); break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_28F320J3A: printf ("28F320J3A (32Mbit = 128K x 32)\n");
- break;
- case FLASH_28F640J3A: printf ("28F640J3A (64Mbit = 128K x 64)\n");
- break;
- case FLASH_28F128J3A: printf ("28F128J3A (128Mbit = 128K x 128)\n");
- break;
- default: printf ("Unknown Chip Type\n");
- break;
- }
-
- if (info->size >= (1 << 20)) {
- i = 20;
- } else {
- i = 10;
- }
- printf (" Size: %ld %cB in %d Sectors\n",
- info->size >> i,
- (i == 20) ? 'M' : 'k',
- info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " "
- );
- }
- printf ("\n");
- return;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-static ulong flash_get_size (vu_char *addr, flash_info_t *info)
-{
- vu_char manuf, device;
-
- addr[0] = BS(0x90);
- manuf = BS(addr[0]);
- DEBUGF("Manuf. ID @ 0x%08lx: 0x%08x\n", (vu_char *)addr, manuf);
-
- switch (manuf) {
- case BYTEME(AMD_MANUFACT):
- info->flash_id = FLASH_MAN_AMD;
- break;
- case BYTEME(FUJ_MANUFACT):
- info->flash_id = FLASH_MAN_FUJ;
- break;
- case BYTEME(SST_MANUFACT):
- info->flash_id = FLASH_MAN_SST;
- break;
- case BYTEME(STM_MANUFACT):
- info->flash_id = FLASH_MAN_STM;
- break;
- case BYTEME(INTEL_MANUFACT):
- info->flash_id = FLASH_MAN_INTEL;
- break;
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- addr[0] = BS(0xFF); /* restore read mode, (yes, BS is a NOP) */
- return 0; /* no or unknown flash */
- }
-
- device = BS(addr[2]); /* device ID */
-
- DEBUGF("Device ID @ 0x%08x: 0x%08x\n", (&addr[1]), device);
-
- switch (device) {
- case BYTEME(INTEL_ID_28F320J3A):
- info->flash_id += FLASH_28F320J3A;
- info->sector_count = 32;
- info->size = 0x00400000;
- break; /* => 4 MB */
-
- case BYTEME(INTEL_ID_28F640J3A):
- info->flash_id += FLASH_28F640J3A;
- info->sector_count = 64;
- info->size = 0x00800000;
- break; /* => 8 MB */
-
- case BYTEME(INTEL_ID_28F128J3A):
- info->flash_id += FLASH_28F128J3A;
- info->sector_count = 128;
- info->size = 0x01000000;
- break; /* => 16 MB */
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- addr[0] = BS(0xFF); /* restore read mode (yes, a NOP) */
- return 0; /* => no or unknown flash */
-
- }
-
- if (info->sector_count > CFG_MAX_FLASH_SECT) {
- printf ("** ERROR: sector count %d > max (%d) **\n",
- info->sector_count, CFG_MAX_FLASH_SECT);
- info->sector_count = CFG_MAX_FLASH_SECT;
- }
-
- addr[0] = BS(0xFF); /* restore read mode */
-
- return (info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- int flag, prot, sect;
- ulong start, now, last;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- if ((info->flash_id & FLASH_VENDMASK) != FLASH_MAN_INTEL) {
- printf ("Can erase only Intel flash types - aborted\n");
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n", prot);
- } else {
- printf ("\n");
- }
-
- start = get_timer (0);
- last = start;
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- vu_char *addr = (vu_char *)(info->start[sect]);
- unsigned long status;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- *addr = BS(0x50); /* clear status register */
- *addr = BS(0x20); /* erase setup */
- *addr = BS(0xD0); /* erase confirm */
-
- /* re-enable interrupts if necessary */
- if (flag) {
- enable_interrupts();
- }
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- while (((status = BS(*addr)) & BYTEME(0x00800080)) != BYTEME(0x00800080)) {
- if ((now=get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- *addr = BS(0xB0); /* suspend erase */
- *addr = BS(0xFF); /* reset to read mode */
- return 1;
- }
-
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- }
-
- *addr = BS(0xFF); /* reset to read mode */
- }
- }
- printf (" done\n");
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- * 4 - Flash not identified
- */
-
-#define FLASH_WIDTH 1 /* flash bus width in bytes */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- uchar *wp = (uchar *)addr;
- int rc;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- return 4;
- }
-
- while (cnt > 0) {
- if ((rc = write_data(info, wp, *src)) != 0) {
- return rc;
- }
- wp++;
- src++;
- cnt--;
- }
-
- return cnt;
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_data (flash_info_t *info, uchar *dest, uchar data)
-{
- vu_char *addr = (vu_char *)dest;
- ulong status;
- ulong start;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((BS(*addr) & data) != data) {
- return 2;
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- *addr = BS(0x40); /* write setup */
- *addr = data;
-
- /* re-enable interrupts if necessary */
- if (flag) {
- enable_interrupts();
- }
-
- start = get_timer (0);
-
- while (((status = BS(*addr)) & BYTEME(0x00800080)) != BYTEME(0x00800080)) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- *addr = BS(0xFF); /* restore read mode */
- return 1;
- }
- }
-
- *addr = BS(0xFF); /* restore read mode */
-
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- */
diff --git a/board/musenki/musenki.c b/board/musenki/musenki.c
deleted file mode 100644
index 88ef83ac12..0000000000
--- a/board/musenki/musenki.c
+++ /dev/null
@@ -1,104 +0,0 @@
-/*
- * (C) Copyright 2001
- * Rob Taylor, Flying Pig Systems. robt@flyingpig.com.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc824x.h>
-#include <pci.h>
-
-int checkboard (void)
-{
- ulong busfreq = get_bus_freq(0);
- char buf[32];
-
- printf("Board: MUSENKI Local Bus at %s MHz\n", strmhz(buf, busfreq));
- return 0;
-
-}
-
-#if 0 /* NOT USED */
-int checkflash (void)
-{
- /* TODO: XXX XXX XXX */
- printf ("## Test not implemented yet ##\n");
-
- return (0);
-}
-#endif
-
-long int initdram (int board_type)
-{
- long size;
- long new_bank0_end;
- long mear1;
- long emear1;
-
- size = get_ram_size(CFG_SDRAM_BASE, CFG_MAX_RAM_SIZE);
-
- new_bank0_end = size - 1;
- mear1 = mpc824x_mpc107_getreg(MEAR1);
- emear1 = mpc824x_mpc107_getreg(EMEAR1);
- mear1 = (mear1 & 0xFFFFFF00) |
- ((new_bank0_end & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT);
- emear1 = (emear1 & 0xFFFFFF00) |
- ((new_bank0_end & MICR_ADDR_MASK) >> MICR_EADDR_SHIFT);
- mpc824x_mpc107_setreg(MEAR1, mear1);
- mpc824x_mpc107_setreg(EMEAR1, emear1);
-
- return (size);
-}
-
-/*
- * Initialize PCI Devices
- */
-#ifndef CONFIG_PCI_PNP
-static struct pci_config_table pci_sandpoint_config_table[] = {
-#if 0
- { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
- 0x0, 0x0, 0x0, /* unknown eth0 divice */
- pci_cfgfunc_config_device, { PCI_ENET0_IOADDR,
- PCI_ENET0_MEMADDR,
- PCI_COMMAND_IO |
- PCI_COMMAND_MEMORY |
- PCI_COMMAND_MASTER }},
- { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
- 0x0, 0x0, 0x0, /* unknown eth1 device */
- pci_cfgfunc_config_device, { PCI_ENET1_IOADDR,
- PCI_ENET1_MEMADDR,
- PCI_COMMAND_IO |
- PCI_COMMAND_MEMORY |
- PCI_COMMAND_MASTER }},
-#endif
- { }
-};
-#endif
-
-struct pci_controller hose = {
-#ifndef CONFIG_PCI_PNP
- config_table: pci_sandpoint_config_table,
-#endif
-};
-
-void pci_init_board(void)
-{
- pci_mpc824x_init(&hose);
-}
diff --git a/board/musenki/u-boot.lds b/board/musenki/u-boot.lds
deleted file mode 100644
index 7c051095f8..0000000000
--- a/board/musenki/u-boot.lds
+++ /dev/null
@@ -1,136 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc824x/start.o (.text)
- lib_ppc/board.o (.text)
- lib_ppc/ppcstring.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
- lib_generic/zlib.o (.text)
-
- . = DEFINED(env_offset) ? env_offset : .;
- common/environment.o (.text)
-
- *(.text)
-
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
-
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/mvblue/Makefile b/board/mvblue/Makefile
deleted file mode 100644
index 24dc0264f3..0000000000
--- a/board/mvblue/Makefile
+++ /dev/null
@@ -1,41 +0,0 @@
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o
-SOBJS =
-
-$(LIB): .depend $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/mvblue/config.mk b/board/mvblue/config.mk
deleted file mode 100644
index 6e0ce4efbf..0000000000
--- a/board/mvblue/config.mk
+++ /dev/null
@@ -1,26 +0,0 @@
-#
-# (C) Copyright 2001-2003
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-TEXT_BASE = 0xFFF00000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE)
diff --git a/board/mvblue/flash.c b/board/mvblue/flash.c
deleted file mode 100644
index 8df573aa0b..0000000000
--- a/board/mvblue/flash.c
+++ /dev/null
@@ -1,583 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- * (C) Copyright 2001-2003
- *
- * Changes for MATRIX Vision mvBLUE devices
- * MATRIX Vision GmbH / hg,as info@matrix-vision.de
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc824x.h>
-
-#if 0
- #define mvdebug(p) printf ##p
-#else
- #define mvdebug(p)
-#endif
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
-
-#define FLASH_BUS_WIDTH 8
-
-#if (FLASH_BUS_WIDTH==32)
- #define FLASH_DATA_MASK 0xffffffff
- #define FLASH_SHIFT 1
- #define FDT vu_long
-#elif (FLASH_BUS_WIDTH==16)
- #define FLASH_DATA_MASK 0xff
- #define FLASH_SHIFT 0
- #define FDT vu_short
-#elif (FLASH_BUS_WIDTH==8)
- #define FLASH_DATA_MASK 0xff
- #define FLASH_SHIFT 0
- #define FDT vu_char
-#else
- #error FLASH_BUS_WIDTH undefined
-#endif
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (vu_long *address, flash_info_t *info);
-static int write_word (flash_info_t *info, ulong dest, ulong data);
-static void flash_get_offsets (ulong base, flash_info_t *info);
-
-/*-----------------------------------------------------------------------
- */
-unsigned long flash_init (void)
-{
- unsigned long size_b0;
- int i;
-
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- size_b0 = flash_get_size((vu_long *)0xffc00000, &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH : Size = 0x%08lx = %ld MB\n",
- size_b0, size_b0<<20);
- }
-
- flash_get_offsets (0xffc00000, &flash_info[0]);
- flash_info[0].size = size_b0;
-
- /* monitor protection OFF by default */
- flash_protect ( FLAG_PROTECT_CLEAR, 0xffc00000, 0x2000, flash_info );
-
- return size_b0;
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_get_offsets (ulong base, flash_info_t *info)
-{
- int i;
-
- /* set up sector start address table */
- if (info->flash_id & FLASH_BTYPE)
- { /* bottom boot sector types - these are the useful ones! */
- /* set sector offsets for bottom boot block type */
- if ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM320B)
- { /* AMDLV320B has 8 x 8k bottom boot sectors */
- for (i = 0; i < 8; i++) /* +8k */
- info->start[i] = base + (i * (0x00002000 << FLASH_SHIFT));
- for (; i < info->sector_count; i++) /* +64k */
- info->start[i] = base + (i * (0x00010000 << FLASH_SHIFT)) - (0x00070000 << FLASH_SHIFT);
- }
- else
- { /* other types have 4 bottom boot sectors (16,8,8,32) */
- i = 0;
- info->start[i++] = base + 0x00000000; /* - */
- info->start[i++] = base + (0x00004000 << FLASH_SHIFT); /* +16k */
- info->start[i++] = base + (0x00006000 << FLASH_SHIFT); /* +8k */
- info->start[i++] = base + (0x00008000 << FLASH_SHIFT); /* +8k */
- info->start[i++] = base + (0x00010000 << FLASH_SHIFT); /* +32k */
- for (; i < info->sector_count; i++) /* +64k */
- info->start[i] = base + (i * (0x00010000 << FLASH_SHIFT)) - (0x00030000 << FLASH_SHIFT);
- }
- }
- else
- { /* top boot sector types - not so useful */
- /* set sector offsets for top boot block type */
- if ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM320T)
- { /* AMDLV320T has 8 x 8k top boot sectors */
- for (i = 0; i < info->sector_count - 8; i++) /* +64k */
- info->start[i] = base + (i * (0x00010000 << FLASH_SHIFT));
- for (; i < info->sector_count; i++) /* +8k */
- info->start[i] = base + (i * (0x00002000 << FLASH_SHIFT));
- }
- else
- { /* other types have 4 top boot sectors (32,8,8,16) */
- for (i = 0; i < info->sector_count - 4; i++) /* +64k */
- info->start[i] = base + (i * (0x00010000 << FLASH_SHIFT));
-
- info->start[i++] = base + info->size - (0x00010000 << FLASH_SHIFT); /* -32k */
- info->start[i++] = base + info->size - (0x00008000 << FLASH_SHIFT); /* -8k */
- info->start[i++] = base + info->size - (0x00006000 << FLASH_SHIFT); /* -8k */
- info->start[i] = base + info->size - (0x00004000 << FLASH_SHIFT); /* -16k */
- }
- }
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD: printf ("AMD "); break;
- case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
- case FLASH_MAN_STM: printf ("ST "); break;
- default: printf ("Unknown Vendor "); break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM160B: printf ("AM29LV160B (16 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM160T: printf ("AM29LV160T (16 Mbit, top boot sector)\n");
- break;
- case FLASH_AM320B: printf ("AM29LV320B (32 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM320T: printf ("AM29LV320T (32 Mbit, top boot sector)\n");
- break;
- case FLASH_STMW320DB: printf ("M29W320B (32 Mbit, bottom boot sect)\n");
- break;
- case FLASH_STMW320DT: printf ("M29W320T (32 Mbit, top boot sector)\n");
- break;
- default: printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n", info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s", info->start[i], info->protect[i] ? " (RO)" : " ");
- }
- printf ("\n");
-}
-
-/*
- * The following code cannot be run from FLASH!
- */
-
-#define AMD_ID_LV160T_MVS (AMD_ID_LV160T & FLASH_DATA_MASK)
-#define AMD_ID_LV160B_MVS (AMD_ID_LV160B & FLASH_DATA_MASK)
-#define AMD_ID_LV320T_MVS (AMD_ID_LV320T & FLASH_DATA_MASK)
-#define AMD_ID_LV320B_MVS (AMD_ID_LV320B & FLASH_DATA_MASK)
-#define STM_ID_W320DT_MVS (STM_ID_29W320DT & FLASH_DATA_MASK)
-#define STM_ID_W320DB_MVS (STM_ID_29W320DB & FLASH_DATA_MASK)
-#define AMD_MANUFACT_MVS (AMD_MANUFACT & FLASH_DATA_MASK)
-#define FUJ_MANUFACT_MVS (FUJ_MANUFACT & FLASH_DATA_MASK)
-#define STM_MANUFACT_MVS (STM_MANUFACT & FLASH_DATA_MASK)
-
-#if (FLASH_BUS_WIDTH >= 16)
- #define AUTOSELECT_ADDR1 0x0555
- #define AUTOSELECT_ADDR2 0x02AA
- #define AUTOSELECT_ADDR3 AUTOSELECT_ADDR1
-#else
- #define AUTOSELECT_ADDR1 0x0AAA
- #define AUTOSELECT_ADDR2 0x0555
- #define AUTOSELECT_ADDR3 AUTOSELECT_ADDR1
-#endif
-
-#define AUTOSELECT_DATA1 (0x00AA00AA & FLASH_DATA_MASK)
-#define AUTOSELECT_DATA2 (0x00550055 & FLASH_DATA_MASK)
-#define AUTOSELECT_DATA3 (0x00900090 & FLASH_DATA_MASK)
-
-#define RESET_BANK_DATA (0x00F000F0 & FLASH_DATA_MASK)
-
-
-static ulong flash_get_size (vu_long *address, flash_info_t *info)
-{
- short i;
- FDT value;
- FDT *addr = (FDT *)address;
-
- ulong base = (ulong)address;
- addr[AUTOSELECT_ADDR1] = AUTOSELECT_DATA1;
- addr[AUTOSELECT_ADDR2] = AUTOSELECT_DATA2;
- addr[AUTOSELECT_ADDR3] = AUTOSELECT_DATA3;
- __asm__ __volatile__("sync");
-
- udelay(180);
-
- value = addr[0]; /* manufacturer ID */
- switch (value) {
- case AMD_MANUFACT_MVS:
- info->flash_id = FLASH_MAN_AMD;
- break;
- case FUJ_MANUFACT_MVS:
- info->flash_id = FLASH_MAN_FUJ;
- break;
- case STM_MANUFACT_MVS:
- info->flash_id = FLASH_MAN_STM;
- break;
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- return (0); /* no or unknown flash */
- }
-#if (FLASH_BUS_WIDTH >= 16)
- value = addr[1]; /* device ID */
-#else
- value = addr[2]; /* device ID */
-#endif
-
- switch (value) {
- case AMD_ID_LV160T_MVS:
- info->flash_id += FLASH_AM160T;
- info->sector_count = 37;
- info->size = (0x00200000 << FLASH_SHIFT);
- break; /* => 2 or 4 MB */
-
- case AMD_ID_LV160B_MVS:
- info->flash_id += FLASH_AM160B;
- info->sector_count = 37;
- info->size = (0x00200000 << FLASH_SHIFT);
- break; /* => 2 or 4 MB */
-
- case AMD_ID_LV320T_MVS:
- info->flash_id += FLASH_AM320T;
- info->sector_count = 71;
- info->size = (0x00400000 << FLASH_SHIFT);
- break; /* => 4 or 8 MB */
-
- case AMD_ID_LV320B_MVS:
- info->flash_id += FLASH_AM320B;
- info->sector_count = 71;
- info->size = (0x00400000 << FLASH_SHIFT);
- break; /* => 4 or 8MB */
-
- case STM_ID_W320DT_MVS:
- info->flash_id += FLASH_STMW320DT;
- info->sector_count = 67;
- info->size = (0x00400000 << FLASH_SHIFT);
- break; /* => 4 or 8 MB */
-
- case STM_ID_W320DB_MVS:
- info->flash_id += FLASH_STMW320DB;
- info->sector_count = 67;
- info->size = (0x00400000 << FLASH_SHIFT);
- break; /* => 4 or 8MB */
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- return (0); /* => no or unknown flash */
-
- }
-
- /* set up sector start address table */
- flash_get_offsets (base, info);
-
- /* check for protected sectors */
- for (i = 0; i < info->sector_count; i++) {
- /* read sector protection at sector address, (A7 .. A0) = 0x02 */
- /* D0 = 1 if protected */
- addr = (FDT *)(info->start[i]);
- info->protect[i] = addr[2] & 1;
- }
-
- /*
- * Prevent writes to uninitialized FLASH.
- */
- if (info->flash_id != FLASH_UNKNOWN) {
- addr = (FDT *)info->start[0];
- *addr = RESET_BANK_DATA; /* reset bank */
- }
- return (info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-#if (FLASH_BUS_WIDTH >= 16)
- #define ERASE_ADDR1 0x0555
- #define ERASE_ADDR2 0x02AA
-#else
- #define ERASE_ADDR1 0x0AAA
- #define ERASE_ADDR2 0x0555
-#endif
-
-#define ERASE_ADDR3 ERASE_ADDR1
-#define ERASE_ADDR4 ERASE_ADDR1
-#define ERASE_ADDR5 ERASE_ADDR2
-
-#define ERASE_DATA1 (0x00AA00AA & FLASH_DATA_MASK)
-#define ERASE_DATA2 (0x00550055 & FLASH_DATA_MASK)
-#define ERASE_DATA3 (0x00800080 & FLASH_DATA_MASK)
-#define ERASE_DATA4 ERASE_DATA1
-#define ERASE_DATA5 ERASE_DATA2
-
-#define ERASE_SECTOR_DATA (0x00300030 & FLASH_DATA_MASK)
-#define ERASE_CHIP_DATA (0x00100010 & FLASH_DATA_MASK)
-#define ERASE_CONFIRM_DATA (0x00800080 & FLASH_DATA_MASK)
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- FDT *addr = (FDT *)(info->start[0]);
-
- int prot, sect, l_sect, flag;
- ulong start, now, last;
-
- __asm__ __volatile__ ("sync");
- addr[0] = 0xf0;
- udelay(1000);
-
- printf("\nflash_erase: first = %d @ 0x%08lx\n", s_first, info->start[s_first] );
- printf(" last = %d @ 0x%08lx\n", s_last , info->start[s_last ] );
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- if ((info->flash_id == FLASH_UNKNOWN) || (info->flash_id > FLASH_AMD_COMP)) {
- printf ("Can't erase unknown flash type %08lx - aborted\n", info->flash_id);
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- l_sect = -1;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[ERASE_ADDR1] = ERASE_DATA1;
- addr[ERASE_ADDR2] = ERASE_DATA2;
- addr[ERASE_ADDR3] = ERASE_DATA3;
- addr[ERASE_ADDR4] = ERASE_DATA4;
- addr[ERASE_ADDR5] = ERASE_DATA5;
-
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect] == 0) {
- addr = (FDT *)(info->start[sect]);
- addr[0] = ERASE_SECTOR_DATA;
- l_sect = sect;
- }
- }
-
- if (flag)
- enable_interrupts();
-
- /*
- * We wait for the last triggered sector
- */
- if (l_sect < 0)
- goto DONE;
-
- start = get_timer (0);
- last = start;
- addr = (FDT *)(info->start[l_sect]);
-
- while ((addr[0] & ERASE_CONFIRM_DATA) != ERASE_CONFIRM_DATA) {
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- return 1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- }
-
-DONE:
- printf (" done\n");
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
-#define BUFF_INC 4
- ulong cp, wp, data;
- int i, l, rc;
-
- mvdebug (("+write_buff %p ==> 0x%08lx, count = 0x%08lx\n", src, addr, cnt));
-
- wp = (addr & ~3); /* get lower word aligned address */
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- mvdebug ((" handle unaligned start bytes (cnt = 0x%08lx)\n", cnt));
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
- for (; i<BUFF_INC && cnt>0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<BUFF_INC; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += BUFF_INC;
- }
-
- /*
- * handle (half)word aligned part
- */
- mvdebug ((" handle word aligned part (cnt = 0x%08lx)\n", cnt));
- while (cnt >= BUFF_INC) {
- data = 0;
- for (i=0; i<BUFF_INC; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += BUFF_INC;
- cnt -= BUFF_INC;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- mvdebug ((" handle unaligned tail bytes (cnt = 0x%08lx)\n", cnt));
- data = 0;
- for (i=0, cp=wp; i<BUFF_INC && cnt>0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i<BUFF_INC; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- return (write_word(info, wp, data));
-}
-
-#if (FLASH_BUS_WIDTH >= 16)
- #define WRITE_ADDR1 0x0555
- #define WRITE_ADDR2 0x02AA
-#else
- #define WRITE_ADDR1 0x0AAA
- #define WRITE_ADDR2 0x0555
- #define WRITE_ADDR3 WRITE_ADDR1
-#endif
-
-#define WRITE_DATA1 (0x00AA00AA & FLASH_DATA_MASK)
-#define WRITE_DATA2 (0x00550055 & FLASH_DATA_MASK)
-#define WRITE_DATA3 (0x00A000A0 & FLASH_DATA_MASK)
-
-#define WRITE_CONFIRM_DATA ERASE_CONFIRM_DATA
-
-/*-----------------------------------------------------------------------
- * Write a byte to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_char (flash_info_t *info, ulong dest, uchar data)
-{
- vu_char *addr = (vu_char *)(info->start[0]);
- ulong start;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*((vu_char *)dest) & data) != data) {
- printf(" *** ERROR: Flash not erased !\n");
- return (2);
- }
- flag = disable_interrupts();
-
- addr[WRITE_ADDR1] = WRITE_DATA1;
- addr[WRITE_ADDR2] = WRITE_DATA2;
- addr[WRITE_ADDR3] = WRITE_DATA3;
- *((vu_char *)dest) = data;
-
- if (flag)
- enable_interrupts();
-
- /* data polling for D7 */
- start = get_timer (0);
- addr = (vu_char *)dest;
- while (( (*addr) & WRITE_CONFIRM_DATA) != (data & WRITE_CONFIRM_DATA)) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- printf(" *** ERROR: Flash write timeout !");
- return (1);
- }
- }
- mvdebug (("-write_byte\n"));
- return (0);
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word (flash_info_t *info, ulong dest, ulong data)
-{
- int i,
- result = 0;
-
- mvdebug (("+write_word : 0x%08lx @ 0x%08lx\n", data, dest));
- for ( i=0; (i < 4) && (result == 0); i++, dest+=1 )
- result = write_char (info, dest, (data >> (8*(3-i))) & 0xff );
- mvdebug (("-write_word\n"));
- return result;
-}
-/*---------------------------------------------------------------- */
diff --git a/board/mvblue/mvblue.c b/board/mvblue/mvblue.c
deleted file mode 100644
index 20a551dfa5..0000000000
--- a/board/mvblue/mvblue.c
+++ /dev/null
@@ -1,247 +0,0 @@
-/*
- * GNU General Public License for more details.
- *
- * MATRIX Vision GmbH / June 2002-Nov 2003
- * Andre Schwarz
- */
-
-#include <common.h>
-#include <mpc824x.h>
-#include <asm/io.h>
-#include <ns16550.h>
-
-#ifdef CONFIG_PCI
-#include <pci.h>
-#endif
-
-u32 get_BoardType (void);
-
-#define PCI_CONFIG(b,d,f,r) cpu_to_le32(0x80000000 | ((b&0xff)<<16) \
- | ((d&0x1f)<<11) \
- | ((f&0x7)<<7) \
- | (r&0xfc) )
-
-int mv_pci_read (int bus, int dev, int func, int reg)
-{
- *(u32 *) (0xfec00cf8) = PCI_CONFIG (bus, dev, func, reg);
- asm ("sync");
- return cpu_to_le32 (*(u32 *) (0xfee00cfc));
-}
-
-u32 get_BoardType ()
-{
- return (mv_pci_read (0, 0xe, 0, 0) == 0x06801095 ? 0 : 1);
-}
-
-void init_2nd_DUART (void)
-{
- NS16550_t console = (NS16550_t) CFG_NS16550_COM2;
- int clock_divisor = CFG_NS16550_CLK / 16 / CONFIG_BAUDRATE;
-
- *(u8 *) (0xfc004511) = 0x1;
- NS16550_init (console, clock_divisor);
-}
-void hw_watchdog_reset (void)
-{
- if (get_BoardType () == 0) {
- *(u32 *) (0xff000005) = 0;
- asm ("sync");
- }
-}
-int checkboard (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
- ulong busfreq = get_bus_freq (0);
- char buf[32];
- u32 BoardType = get_BoardType ();
- char *BoardName[2] = { "mvBlueBOX", "mvBlueLYNX" };
- char *p;
- bd_t *bd = gd->bd;
-
- hw_watchdog_reset ();
-
- printf ("U-Boot (%s) running on mvBLUE device.\n", MV_VERSION);
- printf (" Found %s running at %s MHz memory clock.\n",
- BoardName[BoardType], strmhz (buf, busfreq));
-
- init_2nd_DUART ();
-
- if ((p = getenv ("console_nr")) != NULL) {
- unsigned long con_nr = simple_strtoul (p, NULL, 10) & 3;
-
- bd->bi_baudrate &= ~3;
- bd->bi_baudrate |= con_nr & 3;
- }
- return 0;
-}
-
-long int initdram (int board_type)
-{
- long size;
- long new_bank0_end;
- long mear1;
- long emear1;
-
- size = get_ram_size(CFG_SDRAM_BASE, CFG_MAX_RAM_SIZE);
-
- new_bank0_end = size - 1;
- mear1 = mpc824x_mpc107_getreg(MEAR1);
- emear1 = mpc824x_mpc107_getreg(EMEAR1);
- mear1 = (mear1 & 0xFFFFFF00) |
- ((new_bank0_end & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT);
- emear1 = (emear1 & 0xFFFFFF00) |
- ((new_bank0_end & MICR_ADDR_MASK) >> MICR_EADDR_SHIFT);
- mpc824x_mpc107_setreg(MEAR1, mear1);
- mpc824x_mpc107_setreg(EMEAR1, emear1);
-
- return (size);
-}
-
-/* ------------------------------------------------------------------------- */
-u8 *dhcp_vendorex_prep (u8 * e)
-{
- char *ptr;
-
- /* DHCP vendor-class-identifier = 60 */
- if ((ptr = getenv ("dhcp_vendor-class-identifier"))) {
- *e++ = 60;
- *e++ = strlen (ptr);
- while (*ptr)
- *e++ = *ptr++;
- }
- /* my DHCP_CLIENT_IDENTIFIER = 61 */
- if ((ptr = getenv ("dhcp_client_id"))) {
- *e++ = 61;
- *e++ = strlen (ptr);
- while (*ptr)
- *e++ = *ptr++;
- }
- return e;
-}
-
-u8 *dhcp_vendorex_proc (u8 * popt)
-{
- return NULL;
-}
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Initialize PCI Devices
- */
-#ifdef CONFIG_PCI
-void pci_mvblue_clear_base (struct pci_controller *hose, pci_dev_t dev)
-{
- u32 cnt;
-
- printf ("clear base @ dev/func 0x%02x/0x%02x ... ", PCI_DEV (dev),
- PCI_FUNC (dev));
- for (cnt = 0; cnt < 6; cnt++)
- pci_hose_write_config_dword (hose, dev, 0x10 + (4 * cnt),
- 0x0);
- printf ("done\n");
-}
-
-void duart_setup (u32 base, u16 divisor)
-{
- printf ("duart setup ...");
- out_8 ((u8 *) (CFG_ISA_IO + base + 3), 0x80);
- out_8 ((u8 *) (CFG_ISA_IO + base + 0), divisor & 0xff);
- out_8 ((u8 *) (CFG_ISA_IO + base + 1), divisor >> 8);
- out_8 ((u8 *) (CFG_ISA_IO + base + 3), 0x03);
- out_8 ((u8 *) (CFG_ISA_IO + base + 4), 0x03);
- out_8 ((u8 *) (CFG_ISA_IO + base + 2), 0x07);
- printf ("done\n");
-}
-
-void pci_mvblue_fixup_irq_behind_bridge (struct pci_controller *hose,
- pci_dev_t bridge, unsigned char irq)
-{
- pci_dev_t d;
- unsigned char bus;
- unsigned short vendor, class;
-
- pci_hose_read_config_byte (hose, bridge, PCI_SECONDARY_BUS, &bus);
- for (d = PCI_BDF (bus, 0, 0);
- d < PCI_BDF (bus, PCI_MAX_PCI_DEVICES - 1,
- PCI_MAX_PCI_FUNCTIONS - 1);
- d += PCI_BDF (0, 0, 1)) {
- pci_hose_read_config_word (hose, d, PCI_VENDOR_ID, &vendor);
- if (vendor != 0xffff && vendor != 0x0000) {
- pci_hose_read_config_word (hose, d, PCI_CLASS_DEVICE,
- &class);
- if (class == PCI_CLASS_BRIDGE_PCI)
- pci_mvblue_fixup_irq_behind_bridge (hose, d,
- irq);
- else
- pci_hose_write_config_byte (hose, d,
- PCI_INTERRUPT_LINE,
- irq);
- }
- }
-}
-
-#define MV_MAX_PCI_BUSSES 3
-#define SLOT0_IRQ 3
-#define SLOT1_IRQ 4
-void pci_mvblue_fixup_irq (struct pci_controller *hose, pci_dev_t dev)
-{
- unsigned char line = 0xff;
- unsigned short class;
-
- if (PCI_BUS (dev) == 0) {
- switch (PCI_DEV (dev)) {
- case 0xd:
- if (get_BoardType () == 0) {
- line = 1;
- } else
- /* mvBL */
- line = 2;
- break;
- case 0xe:
- /* mvBB: IDE */
- line = 2;
- pci_hose_write_config_byte (hose, dev, 0x8a, 0x20);
- break;
- case 0xf:
- /* mvBB: Slot0 (Grabber) */
- pci_hose_read_config_word (hose, dev,
- PCI_CLASS_DEVICE, &class);
- if (class == PCI_CLASS_BRIDGE_PCI) {
- pci_mvblue_fixup_irq_behind_bridge (hose, dev,
- SLOT0_IRQ);
- line = 0xff;
- } else
- line = SLOT0_IRQ;
- break;
- case 0x10:
- /* mvBB: Slot1 */
- pci_hose_read_config_word (hose, dev,
- PCI_CLASS_DEVICE, &class);
- if (class == PCI_CLASS_BRIDGE_PCI) {
- pci_mvblue_fixup_irq_behind_bridge (hose, dev,
- SLOT1_IRQ);
- line = 0xff;
- } else
- line = SLOT1_IRQ;
- break;
- default:
- printf ("***pci_scan: illegal dev = 0x%08x\n",
- PCI_DEV (dev));
- line = 0xff;
- break;
- }
- pci_hose_write_config_byte (hose, dev, PCI_INTERRUPT_LINE,
- line);
- }
-}
-
-struct pci_controller hose = {
- fixup_irq:pci_mvblue_fixup_irq
-};
-
-void pci_init_board (void)
-{
- pci_mpc824x_init (&hose);
-}
-#endif
diff --git a/board/mvblue/u-boot.lds b/board/mvblue/u-boot.lds
deleted file mode 100644
index 7c051095f8..0000000000
--- a/board/mvblue/u-boot.lds
+++ /dev/null
@@ -1,136 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc824x/start.o (.text)
- lib_ppc/board.o (.text)
- lib_ppc/ppcstring.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
- lib_generic/zlib.o (.text)
-
- . = DEFINED(env_offset) ? env_offset : .;
- common/environment.o (.text)
-
- *(.text)
-
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
-
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/mvs1/Makefile b/board/mvs1/Makefile
deleted file mode 100644
index 13ce9fc9d2..0000000000
--- a/board/mvs1/Makefile
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/mvs1/README b/board/mvs1/README
deleted file mode 100644
index 69520bd7ed..0000000000
--- a/board/mvs1/README
+++ /dev/null
@@ -1,14 +0,0 @@
-This port is for the MATRIX Vision mvSensor.
-It is an mpc823-based universal image processing board
-with CMOS or CCD sensor, 4MB FLASH and 16-64MB RAM.
-
-See http://www.matrix-vision.de for more details or mail...
-
-mvsensor@matrix-vision.de
-
-Howard Gray
-MATRIX Vision GmbH
-Talstr. 16
-D-71570
-Oppenweiler
-Germany
diff --git a/board/mvs1/config.mk b/board/mvs1/config.mk
deleted file mode 100644
index 9d6080b84a..0000000000
--- a/board/mvs1/config.mk
+++ /dev/null
@@ -1,28 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# TQM8xxL boards
-#
-
-TEXT_BASE = 0x40000000
diff --git a/board/mvs1/flash.c b/board/mvs1/flash.c
deleted file mode 100644
index 0845943587..0000000000
--- a/board/mvs1/flash.c
+++ /dev/null
@@ -1,719 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * Changes for MATRIX Vision MVsensor (C) Copyright 2001
- * MATRIX Vision GmbH / hg, info@matrix-vision.de
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-
-#undef MVDEBUG
-#ifdef MVDEBUG
-#define mvdebug debug
-#else
-#define mvdebug(p) do {} while (0)
-#endif
-
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-
-#ifdef CONFIG_MVS_16BIT_FLASH
- #define FLASH_DATA_MASK 0xffff
- #define FLASH_SHIFT 0
-#else
- #define FLASH_DATA_MASK 0xffffffff
- #define FLASH_SHIFT 1
-#endif
-
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (vu_long *address, flash_info_t *info);
-static int write_word (flash_info_t *info, ulong dest, ulong data);
-static void flash_get_offsets (ulong base, flash_info_t *info);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- unsigned long size_b0, size_b1;
- int i;
-
- /* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* Static FLASH Bank configuration here - FIXME XXX */
-
- size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size_b0, size_b0<<20);
- }
-
-#if defined (FLASH_BASE1_PRELIM)
- size_b1 = flash_get_size((vu_long *)FLASH_BASE1_PRELIM, &flash_info[1]);
-
- if (size_b1 > size_b0) {
- printf ("## ERROR: "
- "Bank 1 (0x%08lx = %ld MB) > Bank 0 (0x%08lx = %ld MB)\n",
- size_b1, size_b1<<20,
- size_b0, size_b0<<20
- );
- flash_info[0].flash_id = FLASH_UNKNOWN;
- flash_info[1].flash_id = FLASH_UNKNOWN;
- flash_info[0].sector_count = -1;
- flash_info[1].sector_count = -1;
- flash_info[0].size = 0;
- flash_info[1].size = 0;
- return (0);
- }
-#else
- size_b1 = 0;
-#endif
-
- /* Remap FLASH according to real size */
- memctl->memc_or0 = CFG_OR_TIMING_FLASH | (-size_b0 & 0xFFFF8000);
-#ifdef CONFIG_MVS_16BIT_FLASH
- memctl->memc_br0 = (CFG_FLASH_BASE & BR_BA_MSK) | BR_PS_16 | BR_MS_GPCM | BR_V;
-#else
- memctl->memc_br0 = (CFG_FLASH_BASE & BR_BA_MSK) | BR_PS_32 | BR_MS_GPCM | BR_V;
-#endif
-
- /* Re-do sizing to get full correct info */
- size_b0 = flash_get_size((vu_long *)CFG_FLASH_BASE, &flash_info[0]);
-
- flash_get_offsets (CFG_FLASH_BASE, &flash_info[0]);
-
- /* monitor protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_FLASH_BASE,
- CFG_FLASH_BASE+monitor_flash_len-1,
- &flash_info[0]);
-
- if (size_b1) {
- memctl->memc_or1 = CFG_OR_TIMING_FLASH | (-size_b1 & 0xFFFF8000);
-#ifdef CONFIG_MVS_16BIT_FLASH
- memctl->memc_br1 = ((CFG_FLASH_BASE + size_b0) & BR_BA_MSK) |
- BR_PS_16 | BR_MS_GPCM | BR_V;
-#else
- memctl->memc_br1 = ((CFG_FLASH_BASE + size_b0) & BR_BA_MSK) |
- BR_PS_32 | BR_MS_GPCM | BR_V;
-#endif
- /* Re-do sizing to get full correct info */
- size_b1 = flash_get_size((vu_long *)(CFG_FLASH_BASE + size_b0),
- &flash_info[1]);
-
- flash_get_offsets (CFG_FLASH_BASE + size_b0, &flash_info[1]);
-
- /* monitor protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_FLASH_BASE,
- CFG_FLASH_BASE+monitor_flash_len-1,
- &flash_info[1]);
- } else {
- memctl->memc_br1 = 0; /* invalidate bank */
-
- flash_info[1].flash_id = FLASH_UNKNOWN;
- flash_info[1].sector_count = -1;
- }
-
- flash_info[0].size = size_b0;
- flash_info[1].size = size_b1;
-
- return (size_b0 + size_b1);
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_get_offsets (ulong base, flash_info_t *info)
-{
- int i;
-
- /* set up sector start address table */
- if (info->flash_id & FLASH_BTYPE)
- { /* bottom boot sector types - these are the useful ones! */
- /* set sector offsets for bottom boot block type */
- if ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM320B)
- { /* AMDLV320B has 8 x 8k bottom boot sectors */
- for (i = 0; i < 8; i++) /* +8k */
- info->start[i] = base + (i * (0x00002000 << FLASH_SHIFT));
- for (; i < info->sector_count; i++) /* +64k */
- info->start[i] = base + (i * (0x00010000 << FLASH_SHIFT)) - (0x00070000 << FLASH_SHIFT);
- }
- else
- { /* other types have 4 bottom boot sectors (16,8,8,32) */
- i = 0;
- info->start[i++] = base + 0x00000000; /* - */
- info->start[i++] = base + (0x00004000 << FLASH_SHIFT); /* +16k */
- info->start[i++] = base + (0x00006000 << FLASH_SHIFT); /* +8k */
- info->start[i++] = base + (0x00008000 << FLASH_SHIFT); /* +8k */
- info->start[i++] = base + (0x00010000 << FLASH_SHIFT); /* +32k */
- for (; i < info->sector_count; i++) /* +64k */
- info->start[i] = base + (i * (0x00010000 << FLASH_SHIFT)) - (0x00030000 << FLASH_SHIFT);
- }
- }
- else
- { /* top boot sector types - not so useful */
- /* set sector offsets for top boot block type */
- if ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM320T)
- { /* AMDLV320T has 8 x 8k top boot sectors */
- for (i = 0; i < info->sector_count - 8; i++) /* +64k */
- info->start[i] = base + (i * (0x00010000 << FLASH_SHIFT));
- for (; i < info->sector_count; i++) /* +8k */
- info->start[i] = base + (i * (0x00002000 << FLASH_SHIFT));
- }
- else
- { /* other types have 4 top boot sectors (32,8,8,16) */
- for (i = 0; i < info->sector_count - 4; i++) /* +64k */
- info->start[i] = base + (i * (0x00010000 << FLASH_SHIFT));
-
- info->start[i++] = base + info->size - (0x00010000 << FLASH_SHIFT); /* -32k */
- info->start[i++] = base + info->size - (0x00008000 << FLASH_SHIFT); /* -8k */
- info->start[i++] = base + info->size - (0x00006000 << FLASH_SHIFT); /* -8k */
- info->start[i] = base + info->size - (0x00004000 << FLASH_SHIFT); /* -16k */
- }
- }
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD: printf ("AMD "); break;
- case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
- case FLASH_MAN_STM: printf ("ST "); break;
- default: printf ("Unknown Vendor "); break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM160B: printf ("AM29LV160B (16 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM160T: printf ("AM29LV160T (16 Mbit, top boot sector)\n");
- break;
- case FLASH_AM320B: printf ("AM29LV320B (32 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM320T: printf ("AM29LV320T (32 Mbit, top boot sector)\n");
- break;
- case FLASH_STMW320DB: printf ("M29W320B (32 Mbit, bottom boot sect)\n");
- break;
- case FLASH_STMW320DT: printf ("M29W320T (32 Mbit, top boot sector)\n");
- break;
- default: printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " "
- );
- }
- printf ("\n");
-}
-
-/*-----------------------------------------------------------------------
- */
-
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-
-#define AMD_ID_LV160T_MVS (AMD_ID_LV160T & FLASH_DATA_MASK)
-#define AMD_ID_LV160B_MVS (AMD_ID_LV160B & FLASH_DATA_MASK)
-#define AMD_ID_LV320T_MVS (AMD_ID_LV320T & FLASH_DATA_MASK)
-#define AMD_ID_LV320B_MVS (AMD_ID_LV320B & FLASH_DATA_MASK)
-#define STM_ID_W320DT_MVS (STM_ID_29W320DT & FLASH_DATA_MASK)
-#define STM_ID_W320DB_MVS (STM_ID_29W320DB & FLASH_DATA_MASK)
-#define AMD_MANUFACT_MVS (AMD_MANUFACT & FLASH_DATA_MASK)
-#define FUJ_MANUFACT_MVS (FUJ_MANUFACT & FLASH_DATA_MASK)
-#define STM_MANUFACT_MVS (STM_MANUFACT & FLASH_DATA_MASK)
-
-#define AUTOSELECT_ADDR1 0x0555
-#define AUTOSELECT_ADDR2 0x02AA
-#define AUTOSELECT_ADDR3 AUTOSELECT_ADDR1
-
-#define AUTOSELECT_DATA1 (0x00AA00AA & FLASH_DATA_MASK)
-#define AUTOSELECT_DATA2 (0x00550055 & FLASH_DATA_MASK)
-#define AUTOSELECT_DATA3 (0x00900090 & FLASH_DATA_MASK)
-
-#define RESET_BANK_DATA (0x00F000F0 & FLASH_DATA_MASK)
-
-static ulong flash_get_size (vu_long *address, flash_info_t *info)
-{
- short i;
-#ifdef CONFIG_MVS_16BIT_FLASH
- ushort value;
- vu_short *addr = (vu_short *)address;
-#else
- ulong value;
- vu_long *addr = (vu_long *)address;
-#endif
- ulong base = (ulong)address;
-
- /* Write auto select command: read Manufacturer ID */
- addr[AUTOSELECT_ADDR1] = AUTOSELECT_DATA1;
- addr[AUTOSELECT_ADDR2] = AUTOSELECT_DATA2;
- addr[AUTOSELECT_ADDR3] = AUTOSELECT_DATA3;
-
- value = addr[0]; /* manufacturer ID */
- switch (value) {
- case AMD_MANUFACT_MVS:
- info->flash_id = FLASH_MAN_AMD;
- break;
- case FUJ_MANUFACT_MVS:
- info->flash_id = FLASH_MAN_FUJ;
- break;
- case STM_MANUFACT_MVS:
- info->flash_id = FLASH_MAN_STM;
- break;
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- return (0); /* no or unknown flash */
- }
-
- value = addr[1]; /* device ID */
- switch (value) {
- case AMD_ID_LV160T_MVS:
- info->flash_id += FLASH_AM160T;
- info->sector_count = 37;
- info->size = (0x00200000 << FLASH_SHIFT);
- break; /* => 2 or 4 MB */
-
- case AMD_ID_LV160B_MVS:
- info->flash_id += FLASH_AM160B;
- info->sector_count = 37;
- info->size = (0x00200000 << FLASH_SHIFT);
- break; /* => 2 or 4 MB */
-
- case AMD_ID_LV320T_MVS:
- info->flash_id += FLASH_AM320T;
- info->sector_count = 71;
- info->size = (0x00400000 << FLASH_SHIFT);
- break; /* => 4 or 8 MB */
-
- case AMD_ID_LV320B_MVS:
- info->flash_id += FLASH_AM320B;
- info->sector_count = 71;
- info->size = (0x00400000 << FLASH_SHIFT);
- break; /* => 4 or 8MB */
-
- case STM_ID_W320DT_MVS:
- info->flash_id += FLASH_STMW320DT;
- info->sector_count = 67;
- info->size = (0x00400000 << FLASH_SHIFT);
- break; /* => 4 or 8 MB */
-
- case STM_ID_W320DB_MVS:
- info->flash_id += FLASH_STMW320DB;
- info->sector_count = 67;
- info->size = (0x00400000 << FLASH_SHIFT);
- break; /* => 4 or 8MB */
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- return (0); /* => no or unknown flash */
-
- }
-
- /* set up sector start address table */
- flash_get_offsets (base, info);
-
- /* check for protected sectors */
- for (i = 0; i < info->sector_count; i++) {
- /* read sector protection at sector address, (A7 .. A0) = 0x02 */
- /* D0 = 1 if protected */
-#ifdef CONFIG_MVS_16BIT_FLASH
- addr = (vu_short *)(info->start[i]);
-#else
- addr = (vu_long *)(info->start[i]);
-#endif
- info->protect[i] = addr[2] & 1;
- }
-
- /*
- * Prevent writes to uninitialized FLASH.
- */
- if (info->flash_id != FLASH_UNKNOWN) {
-#ifdef CONFIG_MVS_16BIT_FLASH
- addr = (vu_short *)info->start[0];
-#else
- addr = (vu_long *)info->start[0];
-#endif
- *addr = RESET_BANK_DATA; /* reset bank */
- }
-
- return (info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-#define ERASE_ADDR1 0x0555
-#define ERASE_ADDR2 0x02AA
-#define ERASE_ADDR3 ERASE_ADDR1
-#define ERASE_ADDR4 ERASE_ADDR1
-#define ERASE_ADDR5 ERASE_ADDR2
-
-#define ERASE_DATA1 (0x00AA00AA & FLASH_DATA_MASK)
-#define ERASE_DATA2 (0x00550055 & FLASH_DATA_MASK)
-#define ERASE_DATA3 (0x00800080 & FLASH_DATA_MASK)
-#define ERASE_DATA4 ERASE_DATA1
-#define ERASE_DATA5 ERASE_DATA2
-
-#define ERASE_SECTOR_DATA (0x00300030 & FLASH_DATA_MASK)
-#define ERASE_CHIP_DATA (0x00100010 & FLASH_DATA_MASK)
-#define ERASE_CONFIRM_DATA (0x00800080 & FLASH_DATA_MASK)
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
-#ifdef CONFIG_MVS_16BIT_FLASH
- vu_short *addr = (vu_short *)(info->start[0]);
-#else
- vu_long *addr = (vu_long *)(info->start[0]);
-#endif
- int flag, prot, sect, l_sect;
- ulong start, now, last;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- if ((info->flash_id == FLASH_UNKNOWN) ||
- (info->flash_id > FLASH_AMD_COMP)) {
- printf ("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- l_sect = -1;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[ERASE_ADDR1] = ERASE_DATA1;
- addr[ERASE_ADDR2] = ERASE_DATA2;
- addr[ERASE_ADDR3] = ERASE_DATA3;
- addr[ERASE_ADDR4] = ERASE_DATA4;
- addr[ERASE_ADDR5] = ERASE_DATA5;
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
-#ifdef CONFIG_MVS_16BIT_FLASH
- addr = (vu_short *)(info->start[sect]);
-#else
- addr = (vu_long *)(info->start[sect]);
-#endif
- addr[0] = ERASE_SECTOR_DATA;
- l_sect = sect;
- }
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- /*
- * We wait for the last triggered sector
- */
- if (l_sect < 0)
- goto DONE;
-
- start = get_timer (0);
- last = start;
-#ifdef CONFIG_MVS_16BIT_FLASH
- addr = (vu_short *)(info->start[l_sect]);
-#else
- addr = (vu_long *)(info->start[l_sect]);
-#endif
- while ((addr[0] & ERASE_CONFIRM_DATA) != ERASE_CONFIRM_DATA) {
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- return 1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- }
-
-DONE:
- /* reset to read mode */
-#ifdef CONFIG_MVS_16BIT_FLASH
- addr = (vu_short *)info->start[0];
-#else
- addr = (vu_long *)info->start[0];
-#endif
- addr[0] = RESET_BANK_DATA; /* reset bank */
-
- printf (" done\n");
- return 0;
-}
-
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
-#define BUFF_INC 4
- ulong cp, wp, data;
- int i, l, rc;
-
- mvdebug (("+write_buff %p ==> 0x%08lx, count = 0x%08lx\n", src, addr, cnt));
-
- wp = (addr & ~3); /* get lower word aligned address */
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- mvdebug ((" handle unaligned start bytes (cnt = 0x%08%lx)\n", cnt));
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
- for (; i<BUFF_INC && cnt>0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<BUFF_INC; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += BUFF_INC;
- }
-
- /*
- * handle (half)word aligned part
- */
- mvdebug ((" handle word aligned part (cnt = 0x%08%lx)\n", cnt));
- while (cnt >= BUFF_INC) {
- data = 0;
- for (i=0; i<BUFF_INC; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += BUFF_INC;
- cnt -= BUFF_INC;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- mvdebug ((" handle unaligned tail bytes (cnt = 0x%08%lx)\n", cnt));
- data = 0;
- for (i=0, cp=wp; i<BUFF_INC && cnt>0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i<BUFF_INC; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- return (write_word(info, wp, data));
-}
-
-#define WRITE_ADDR1 0x0555
-#define WRITE_ADDR2 0x02AA
-#define WRITE_ADDR3 WRITE_ADDR1
-
-#define WRITE_DATA1 (0x00AA00AA & FLASH_DATA_MASK)
-#define WRITE_DATA2 (0x00550055 & FLASH_DATA_MASK)
-#define WRITE_DATA3 (0x00A000A0 & FLASH_DATA_MASK)
-
-#define WRITE_CONFIRM_DATA ERASE_CONFIRM_DATA
-
-#ifndef CONFIG_MVS_16BIT_FLASH
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word (flash_info_t *info, ulong dest, ulong data)
-{
- vu_long *addr = (vu_long *)(info->start[0]);
- ulong start;
- int flag;
-
- mvdebug (("+write_word (to 0x%08lx)\n", dest));
- /* Check if Flash is (sufficiently) erased */
- if ((*((vu_long *)dest) & data) != data) {
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[WRITE_ADDR1] = WRITE_DATA1;
- addr[WRITE_ADDR2] = WRITE_DATA2;
- addr[WRITE_ADDR3] = WRITE_DATA3;
-
- *((vu_long *)dest) = data;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* data polling for D7 */
- start = get_timer (0);
- addr = (vu_long *)dest;
- while ((*addr & WRITE_CONFIRM_DATA) != (data & WRITE_CONFIRM_DATA)) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- return (1);
- }
- }
-
- mvdebug (("-write_word\n"));
- return (0);
-}
-#else /* CONFIG_MVS_16BIT_FLASH */
-/*-----------------------------------------------------------------------
- * Write a halfword to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_halfword (flash_info_t *info, ulong dest, ushort data)
-{
- vu_short *addr = (vu_short *)(info->start[0]);
- ulong start;
- int flag;
-
- mvdebug (("+write_halfword (to 0x%08lx)\n", dest));
- /* Check if Flash is (sufficiently) erased */
- if ((*((vu_short *)dest) & data) != data) {
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[WRITE_ADDR1] = WRITE_DATA1;
- addr[WRITE_ADDR2] = WRITE_DATA2;
- addr[WRITE_ADDR3] = WRITE_DATA3;
-
- *((vu_short *)dest) = data;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* data polling for D7 */
- start = get_timer (0);
- addr = (vu_short *)dest;
- while ((*addr & WRITE_CONFIRM_DATA) != (data & WRITE_CONFIRM_DATA)) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- return (1);
- }
- }
- mvdebug (("-write_halfword\n"));
- return (0);
-}
-
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word (flash_info_t *info, ulong dest, ulong data)
-{
- int result = 0;
-
- if (write_halfword (info, dest, (data & ~FLASH_DATA_MASK) >> 16) == 0)
- {
- dest += 2;
- data = data & FLASH_DATA_MASK;
- result = write_halfword (info, dest, data);
- }
- return result;
-}
-#endif
-/*-----------------------------------------------------------------------
- */
diff --git a/board/mvs1/mvs1.c b/board/mvs1/mvs1.c
deleted file mode 100644
index f8a8cb7578..0000000000
--- a/board/mvs1/mvs1.c
+++ /dev/null
@@ -1,376 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * Changes for MATRIX Vision MVsensor (C) Copyright 2001
- * MATRIX Vision GmbH / hg, info@matrix-vision.de
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-
-/* ------------------------------------------------------------------------- */
-
-static long int dram_size (long int, long int *, long int);
-
-/* ------------------------------------------------------------------------- */
-
-#define _NOT_USED_ 0xFFFFFFFF
-
-const uint sdram_table[] =
-{
- /*
- * Single Read. (Offset 0 in UPMA RAM)
- */
- 0x1F0DFC04, 0xEEAFBC04, 0x11AF7C04, 0xEFBAFC00,
- 0x1FF5FC47, /* last */
- /*
- * SDRAM Initialization (offset 5 in UPMA RAM)
- *
- * This is no UPM entry point. The following definition uses
- * the remaining space to establish an initialization
- * sequence, which is executed by a RUN command.
- *
- */
- 0x1FF5FC34, 0xEFEABC34, 0x1FB57C35, /* last */
- /*
- * Burst Read. (Offset 8 in UPMA RAM)
- */
- 0x1F0DFC04, 0xEEAFBC04, 0x10AF7C04, 0xF0AFFC00,
- 0xF0AFFC00, 0xF1AFFC00, 0xEFBAFC00, 0x1FF5FC47, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Single Write. (Offset 18 in UPMA RAM)
- */
- 0x1F0DFC04 /*0x1F2DFC04??*/, 0xEEABBC00, 0x01B27C04, 0x1FF5FC47, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Burst Write. (Offset 20 in UPMA RAM)
- */
- 0x1F0DFC04, 0xEEABBC00, 0x10A77C00, 0xF0AFFC00,
- 0xF0AFFC00, 0xE1BAFC04, 0x1FF5FC47, /* last */
- _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Refresh (Offset 30 in UPMA RAM)
- */
- 0x1FFD7C84, 0xFFFFFC04, 0xFFFFFC04, 0xFFFFFC04,
- 0xFFFFFC84, 0xFFFFFC07, /* last */
- _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Exception. (Offset 3c in UPMA RAM)
- */
- 0x7FFFFC07, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_,
-};
-
-/* ------------------------------------------------------------------------- */
-
-
-/*
- * Check Board Identity:
- */
-
-int checkboard (void)
-{
- puts ("Board: MATRIX Vision MVsensor\n");
- return 0;
-}
-
-
-#ifdef DO_RAM_TEST
-/* ------------------------------------------------------------------------- */
-
-/*
- * Test SDRAM by writing its address to itself and reading several times
-*/
-#define READ_RUNS 4
-static void test_dram (unsigned long *start, unsigned long *end)
-{
- unsigned long *addr;
- unsigned long value;
- int read_runs, errors, addr_errors;
-
- printf ("\nChecking SDRAM from %p to %p\n", start, end);
- udelay (1000000);
- for (addr = start; addr < end; addr++)
- *addr = (unsigned long) addr;
-
- for (addr = start, addr_errors = 0; addr < end; addr++) {
- for (read_runs = READ_RUNS, errors = 0; read_runs > 0; read_runs--) {
- if ((value = *addr) != (unsigned long) addr)
- errors++;
- }
- if (errors > 0) {
- addr_errors++;
- printf ("SDRAM errors (%d) at %p, last read = %ld\n",
- errors, addr, value);
- udelay (10000);
- }
- }
- printf ("SDRAM check finished, total errors = %d\n", addr_errors);
-}
-#endif /* DO_RAM_TEST */
-
-
-/* ------------------------------------------------------------------------- */
-
-long int initdram (int board_type)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- long int size_b0, size_b1, size8, size9;
-
- upmconfig (UPMA, (uint *) sdram_table,
- sizeof (sdram_table) / sizeof (uint));
-
- /*
- * Preliminary prescaler for refresh (depends on number of
- * banks): This value is selected for four cycles every 62.4 us
- * with two SDRAM banks or four cycles every 31.2 us with one
- * bank. It will be adjusted after memory sizing.
- */
- memctl->memc_mptpr = CFG_MPTPR_2BK_8K;
-
- memctl->memc_mar = 0x00000088;
-
- /*
- * Map controller banks 2 and 3 to the SDRAM banks 2 and 3 at
- * preliminary addresses - these have to be modified after the
- * SDRAM size has been determined.
- */
- memctl->memc_or2 = CFG_OR2_PRELIM;
- memctl->memc_br2 = CFG_BR2_PRELIM;
-
-#if defined (CFG_OR3_PRELIM) && defined (CFG_BR3_PRELIM)
- if (board_type == 0) { /* "L" type boards have only one bank SDRAM */
- memctl->memc_or3 = CFG_OR3_PRELIM;
- memctl->memc_br3 = CFG_BR3_PRELIM;
- }
-#endif
-
- memctl->memc_mamr = CFG_MAMR_8COL & (~(MAMR_PTAE)); /* no refresh yet */
-
- udelay (200);
-
- /* perform SDRAM initializsation sequence */
-
- memctl->memc_mcr = 0x80004105; /* SDRAM bank 0 */
- udelay (1);
- memctl->memc_mcr = 0x80004230; /* SDRAM bank 0 - execute twice */
- udelay (1);
-
- if (board_type == 0) { /* "L" type boards have only one bank SDRAM */
- memctl->memc_mcr = 0x80006105; /* SDRAM bank 1 */
- udelay (1);
- memctl->memc_mcr = 0x80006230; /* SDRAM bank 1 - execute twice */
- udelay (1);
- }
-
- memctl->memc_mamr |= MAMR_PTAE; /* enable refresh */
-
- udelay (1000);
-
- /*
- * Check Bank 0 Memory Size for re-configuration
- *
- * try 8 column mode
- */
- size8 = dram_size (CFG_MAMR_8COL, SDRAM_BASE2_PRELIM,
- SDRAM_MAX_SIZE);
-
- udelay (1000);
- /*
- * try 9 column mode
- */
- size9 = dram_size (CFG_MAMR_9COL, SDRAM_BASE2_PRELIM,
- SDRAM_MAX_SIZE);
-
- if (size8 < size9) { /* leave configuration at 9 columns */
- size_b0 = size9;
- } else { /* back to 8 columns */
- size_b0 = size8;
- memctl->memc_mamr = CFG_MAMR_8COL;
- udelay (500);
- }
-
- if (board_type == 0) { /* "L" type boards have only one bank SDRAM */
- /*
- * Check Bank 1 Memory Size
- * use current column settings
- * [9 column SDRAM may also be used in 8 column mode,
- * but then only half the real size will be used.]
- */
-#if defined (SDRAM_BASE3_PRELIM)
- size_b1 =
- dram_size (memctl->memc_mamr, (ulong *) SDRAM_BASE3_PRELIM,
- SDRAM_MAX_SIZE);
-#else
- size_b1 = 0;
-#endif
- } else {
- size_b1 = 0;
- }
-
- udelay (1000);
-
- /*
- * Adjust refresh rate depending on SDRAM type, both banks
- * For types > 128 MBit leave it at the current (fast) rate
- */
- if ((size_b0 < 0x02000000) && (size_b1 < 0x02000000)) {
- /* reduce to 15.6 us (62.4 us / quad) */
- memctl->memc_mptpr = CFG_MPTPR_2BK_4K;
- udelay (1000);
- }
-
- /*
- * Final mapping: map bigger bank first
- */
- if (size_b1 > size_b0) { /* SDRAM Bank 1 is bigger - map first */
-
- memctl->memc_or3 = ((-size_b1) & 0xFFFF0000) | CFG_OR_TIMING_SDRAM;
- memctl->memc_br3 =
- (CFG_SDRAM_BASE & BR_BA_MSK) | BR_MS_UPMA | BR_V;
-
- if (size_b0 > 0) {
- /*
- * Position Bank 0 immediately above Bank 1
- */
- memctl->memc_or2 =
- ((-size_b0) & 0xFFFF0000) | CFG_OR_TIMING_SDRAM;
- memctl->memc_br2 =
- ((CFG_SDRAM_BASE & BR_BA_MSK) | BR_MS_UPMA | BR_V)
- + size_b1;
- } else {
- unsigned long reg;
-
- /*
- * No bank 0
- *
- * invalidate bank
- */
- memctl->memc_br2 = 0;
-
- /* adjust refresh rate depending on SDRAM type, one bank */
- reg = memctl->memc_mptpr;
- reg >>= 1; /* reduce to CFG_MPTPR_1BK_8K / _4K */
- memctl->memc_mptpr = reg;
- }
-
- } else { /* SDRAM Bank 0 is bigger - map first */
-
- memctl->memc_or2 = ((-size_b0) & 0xFFFF0000) | CFG_OR_TIMING_SDRAM;
- memctl->memc_br2 =
- (CFG_SDRAM_BASE & BR_BA_MSK) | BR_MS_UPMA | BR_V;
-
- if (size_b1 > 0) {
- /*
- * Position Bank 1 immediately above Bank 0
- */
- memctl->memc_or3 =
- ((-size_b1) & 0xFFFF0000) | CFG_OR_TIMING_SDRAM;
- memctl->memc_br3 =
- ((CFG_SDRAM_BASE & BR_BA_MSK) | BR_MS_UPMA | BR_V)
- + size_b0;
- } else {
- unsigned long reg;
-
- /*
- * No bank 1
- *
- * invalidate bank
- */
- memctl->memc_br3 = 0;
-
- /* adjust refresh rate depending on SDRAM type, one bank */
- reg = memctl->memc_mptpr;
- reg >>= 1; /* reduce to CFG_MPTPR_1BK_8K / _4K */
- memctl->memc_mptpr = reg;
- }
- }
-
- udelay (10000);
-
-#ifdef DO_RAM_TEST
- if (size_b0 > 0)
- test_dram ((unsigned long *) CFG_SDRAM_BASE,
- (unsigned long *) (CFG_SDRAM_BASE + size_b0));
-#endif
-
- return (size_b0 + size_b1);
-}
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Check memory range for valid RAM. A simple memory test determines
- * the actually available RAM size between addresses `base' and
- * `base + maxsize'. Some (not all) hardware errors are detected:
- * - short between address lines
- * - short between data lines
- */
-
-static long int dram_size (long int mamr_value, long int *base,
- long int maxsize)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
-
- memctl->memc_mamr = mamr_value;
-
- return (get_ram_size(base, maxsize));
-}
-
-
-/* ------------------------------------------------------------------------- */
-
-u8 *dhcp_vendorex_prep (u8 * e)
-{
- char *ptr;
-
-/* DHCP vendor-class-identifier = 60 */
- if ((ptr = getenv ("dhcp_vendor-class-identifier"))) {
- *e++ = 60;
- *e++ = strlen (ptr);
- while (*ptr)
- *e++ = *ptr++;
- }
-/* my DHCP_CLIENT_IDENTIFIER = 61 */
- if ((ptr = getenv ("dhcp_client_id"))) {
- *e++ = 61;
- *e++ = strlen (ptr);
- while (*ptr)
- *e++ = *ptr++;
- }
-
- return e;
-}
-
-
-/* ------------------------------------------------------------------------- */
-u8 *dhcp_vendorex_proc (u8 * popt)
-{
- return NULL;
-}
diff --git a/board/mvs1/u-boot.lds b/board/mvs1/u-boot.lds
deleted file mode 100644
index a04de3d85b..0000000000
--- a/board/mvs1/u-boot.lds
+++ /dev/null
@@ -1,145 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc8xx/start.o (.text)
- common/dlmalloc.o (.text)
- lib_ppc/ppcstring.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
- lib_generic/zlib.o (.text)
- lib_generic/ctype.o (.text)
- lib_generic/string.o (.text)
- lib_ppc/extable.o (.text)
- lib_ppc/kgdb.o (.text)
-
- . = env_offset;
- common/environment.o(.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/mvs1/u-boot.lds.debug b/board/mvs1/u-boot.lds.debug
deleted file mode 100644
index ddd4678ee8..0000000000
--- a/board/mvs1/u-boot.lds.debug
+++ /dev/null
@@ -1,137 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc8xx/start.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
-
- . = env_offset;
- common/environment.o(.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/mx1ads/Makefile b/board/mx1ads/Makefile
deleted file mode 100644
index 3e805feb40..0000000000
--- a/board/mx1ads/Makefile
+++ /dev/null
@@ -1,48 +0,0 @@
-#
-# board/mx1ads/Makefile
-#
-# (c) Copyright 2004
-# Techware Information Technology, Inc.
-# http://www.techware.com.tw/
-#
-# Ming-Len Wu <minglen_wu@techware.com.tw>
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := mx1ads.o syncflash.o
-SOBJS := lowlevel_init.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS) $(SOBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/mx1ads/config.mk b/board/mx1ads/config.mk
deleted file mode 100644
index f6ac40d34a..0000000000
--- a/board/mx1ads/config.mk
+++ /dev/null
@@ -1,25 +0,0 @@
-#
-# board/mx1ads/config.mk
-#
-# (c) Copyright 2004
-# Techware Information Technology, Inc.
-# http://www.techware.com.tw/
-#
-# Ming-Len Wu <minglen_wu@techware.com.tw>
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-
-TEXT_BASE = 0x08400000
diff --git a/board/mx1ads/lowlevel_init.S b/board/mx1ads/lowlevel_init.S
deleted file mode 100644
index 09c260d64d..0000000000
--- a/board/mx1ads/lowlevel_init.S
+++ /dev/null
@@ -1,81 +0,0 @@
-/*
- * board/mx1ads/lowlevel_init.S
- *
- * (c) Copyright 2004
- * Techware Information Technology, Inc.
- * http://www.techware.com.tw/
- *
- * Ming-Len Wu <minglen_wu@techware.com.tw>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <config.h>
-#include <version.h>
-
-#define SDCTL0 0x221000
-#define SDCTL1 0x221004
-
-
-_TEXT_BASE:
- .word TEXT_BASE
-
-.globl lowlevel_init
-lowlevel_init:
-/* memory controller init */
-
- ldr r1, =SDCTL0
-
-/* Set Precharge Command */
-
- ldr r3, =0x92120200
-/* ldr r3, =0x92120251
-*/
- str r3, [r1]
-
-/* Issue Precharge All Commad */
- ldr r3, =0x8200000
- ldr r2, [r3]
-
-/* Set AutoRefresh Command */
- ldr r3, =0xA2120200
- str r3, [r1]
-
-/* Issue AutoRefresh Command */
- ldr r3, =0x8000000
- ldr r2, [r3]
- ldr r2, [r3]
- ldr r2, [r3]
- ldr r2, [r3]
- ldr r2, [r3]
- ldr r2, [r3]
- ldr r2, [r3]
- ldr r2, [r3]
-
-/* Set Mode Register */
- ldr r3, =0xB2120200
- str r3, [r1]
-
-/* Issue Mode Register Command */
- ldr r3, =0x08111800 /* Mode Register Value */
- ldr r2, [r3]
-
-/* Set Normal Mode */
- ldr r3, =0x82124200
- str r3, [r1]
-
-/* everything is fine now */
- mov pc, lr
diff --git a/board/mx1ads/mx1ads.c b/board/mx1ads/mx1ads.c
deleted file mode 100644
index 5c33ba3c0e..0000000000
--- a/board/mx1ads/mx1ads.c
+++ /dev/null
@@ -1,168 +0,0 @@
-/*
- * board/mx1ads/mx1ads.c
- *
- * (c) Copyright 2004
- * Techware Information Technology, Inc.
- * http://www.techware.com.tw/
- *
- * Ming-Len Wu <minglen_wu@techware.com.tw>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-/*#include <mc9328.h>*/
-#include <asm/arch/imx-regs.h>
-
-/* ------------------------------------------------------------------------- */
-
-#define FCLK_SPEED 1
-
-#if FCLK_SPEED==0 /* Fout = 203MHz, Fin = 12MHz for Audio */
-#define M_MDIV 0xC3
-#define M_PDIV 0x4
-#define M_SDIV 0x1
-#elif FCLK_SPEED==1 /* Fout = 202.8MHz */
-#define M_MDIV 0xA1
-#define M_PDIV 0x3
-#define M_SDIV 0x1
-#endif
-
-#define USB_CLOCK 1
-
-#if USB_CLOCK==0
-#define U_M_MDIV 0xA1
-#define U_M_PDIV 0x3
-#define U_M_SDIV 0x1
-#elif USB_CLOCK==1
-#define U_M_MDIV 0x48
-#define U_M_PDIV 0x3
-#define U_M_SDIV 0x2
-#endif
-
-#if 0
-
-static inline void delay (unsigned long loops) {
- __asm__ volatile ("1:\n"
- "subs %0, %1, #1\n"
- "bne 1b":"=r" (loops):"0" (loops));
-}
-
-#endif
-
-/*
- * Miscellaneous platform dependent initialisations
- */
-
-void SetAsynchMode(void) {
- __asm__ (
- "mrc p15,0,r0,c1,c0,0 \n"
- "mov r2, #0xC0000000 \n"
- "orr r0,r2,r0 \n"
- "mcr p15,0,r0,c1,c0,0 \n"
- );
-}
-
-static u32 mc9328sid;
-
-int board_init (void) {
-
- DECLARE_GLOBAL_DATA_PTR;
-
- volatile unsigned int tmp;
-
- mc9328sid = SIDR;
-
- GPCR = 0x000003AB; /* I/O pad driving strength */
-
-/* MX1_CS1U = 0x00000A00; */ /* SRAM initialization */
-/* MX1_CS1L = 0x11110601; */
-
- MPCTL0 = 0x04632410; /* setting for 150 MHz MCU PLL CLK */
-
-/* set FCLK divider 1 (i.e. FCLK to MCU PLL CLK) and
- * BCLK divider to 2 (i.e. BCLK to 48 MHz)
- */
- CSCR = 0xAF000403;
-
- CSCR |= 0x00200000; /* Trigger the restart bit(bit 21) */
- CSCR &= 0xFFFF7FFF; /* Program PRESC bit(bit 15) to 0 to divide-by-1 */
-
-/* setup cs4 for cs8900 ethernet */
-
- CS4U = 0x00000F00; /* Initialize CS4 for CS8900 ethernet */
- CS4L = 0x00001501;
-
- GIUS(0) &= 0xFF3FFFFF;
- GPR(0) &= 0xFF3FFFFF;
-
- tmp = *(unsigned int *)(0x1500000C);
- tmp = *(unsigned int *)(0x1500000C);
-
- SetAsynchMode();
-
- gd->bd->bi_arch_number = MACH_TYPE_MX1ADS;
-
- gd->bd->bi_boot_params = 0x08000100; /* adress of boot parameters */
-
- icache_enable();
- dcache_enable();
-
-/* set PERCLKs */
- PCDR = 0x00000055; /* set PERCLKS */
-
-/* PERCLK3 is only used by SSI so the SSI driver can set it any value it likes
- * PERCLK1 and PERCLK2 are shared so DO NOT change it in any other place
- * all sources selected as normal interrupt
- */
-
-/* MX1_INTTYPEH = 0;
- MX1_INTTYPEL = 0;
-*/
- return 0;
-}
-
-int board_late_init(void) {
-
- setenv("stdout", "serial");
- setenv("stderr", "serial");
-
- switch (mc9328sid) {
- case 0x0005901d :
- printf ("MX1ADS board with MC9328 MX1 (0L44N), Silicon ID 0x%08x \n\n",mc9328sid);
- break;
- case 0x04d4c01d :
- printf ("MX1ADS board with MC9328 MXL (1L45N), Silicon ID 0x%08x \n\n",mc9328sid);
- break;
- case 0x00d4c01d :
- printf ("MX1ADS board with MC9328 MXL (2L45N), Silicon ID 0x%08x \n\n",mc9328sid);
- break;
-
- default :
- printf ("MX1ADS board with UNKNOWN MC9328 cpu, Silicon ID 0x%08x \n",mc9328sid);
- break;
- }
- return 0;
-}
-
-int dram_init (void) {
- DECLARE_GLOBAL_DATA_PTR;
-
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
-
- return 0;
-}
diff --git a/board/mx1ads/syncflash.c b/board/mx1ads/syncflash.c
deleted file mode 100644
index eb7fde5071..0000000000
--- a/board/mx1ads/syncflash.c
+++ /dev/null
@@ -1,322 +0,0 @@
-/*
- * board/mx1ads/syncflash.c
- *
- * (c) Copyright 2004
- * Techware Information Technology, Inc.
- * http://www.techware.com.tw/
- *
- * Ming-Len Wu <minglen_wu@techware.com.tw>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-/*#include <mc9328.h>*/
-#include <asm/arch/imx-regs.h>
-
-typedef unsigned long * p_u32;
-
-/* 4Mx16x2 IAM=0 CSD1 */
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/* Following Setting is for CSD1 */
-#define SFCTL 0x00221004
-#define reg_SFCTL __REG(SFCTL)
-
-#define SYNCFLASH_A10 (0x00100000)
-
-#define CMD_NORMAL (0x81020300) /* Normal Mode */
-#define CMD_PREC (CMD_NORMAL + 0x10000000) /* Precharge Command */
-#define CMD_AUTO (CMD_NORMAL + 0x20000000) /* Auto Refresh Command */
-#define CMD_LMR (CMD_NORMAL + 0x30000000) /* Load Mode Register Command */
-#define CMD_LCR (CMD_NORMAL + 0x60000000) /* LCR Command */
-#define CMD_PROGRAM (CMD_NORMAL + 0x70000000)
-
-#define MODE_REG_VAL (CFG_FLASH_BASE+0x0008CC00) /* Cas Latency 3 */
-
-/* LCR Command */
-#define LCR_READSTATUS (0x0001C000) /* 0x70 */
-#define LCR_ERASE_CONFIRM (0x00008000) /* 0x20 */
-#define LCR_ERASE_NVMODE (0x0000C000) /* 0x30 */
-#define LCR_PROG_NVMODE (0x00028000) /* 0xA0 */
-#define LCR_SR_CLEAR (0x00014000) /* 0x50 */
-
-/* Get Status register */
-u32 SF_SR(void) {
- u32 tmp,tmp1;
-
- reg_SFCTL = CMD_PROGRAM;
- tmp = __REG(CFG_FLASH_BASE);
-
- reg_SFCTL = CMD_NORMAL;
-
- reg_SFCTL = CMD_LCR; /* Activate LCR Mode */
- tmp1 = __REG(CFG_FLASH_BASE + LCR_SR_CLEAR);
-
- return tmp;
-}
-
-/* check if SyncFlash is ready */
-u8 SF_Ready(void) {
- u32 tmp;
-
- tmp = SF_SR();
-
- if ((tmp & 0x00800000) && (tmp & 0x001C0000)) {
- printf ("SyncFlash Error code %08x\n",tmp);
- };
-
- if ((tmp & 0x00000080) && (tmp & 0x0000001C)) {
- printf ("SyncFlash Error code %08x\n",tmp);
- };
-
- if (tmp == 0x00800080) /* Test Bit 7 of SR */
- return 1;
- else
- return 0;
-}
-
-/* Issue the precharge all command */
-void SF_PrechargeAll(void) {
-
- u32 tmp;
-
- reg_SFCTL = CMD_PREC; /* Set Precharge Command */
- tmp = __REG(CFG_FLASH_BASE + SYNCFLASH_A10); /* Issue Precharge All Command */
-}
-
-/* set SyncFlash to normal mode */
-void SF_Normal(void) {
-
- SF_PrechargeAll();
-
- reg_SFCTL = CMD_NORMAL;
-}
-
-/* Erase SyncFlash */
-void SF_Erase(u32 RowAddress) {
- u32 tmp;
-
- reg_SFCTL = CMD_NORMAL;
- tmp = __REG(RowAddress);
-
- reg_SFCTL = CMD_PREC;
- tmp = __REG(RowAddress);
-
- reg_SFCTL = CMD_LCR; /* Set LCR mode */
- __REG(RowAddress + LCR_ERASE_CONFIRM) = 0; /* Issue Erase Setup Command */
-
- reg_SFCTL = CMD_NORMAL; /* return to Normal mode */
- __REG(RowAddress) = 0xD0D0D0D0; /* Confirm */
-
- while(!SF_Ready());
-}
-
-void SF_NvmodeErase(void) {
- SF_PrechargeAll();
-
- reg_SFCTL = CMD_LCR; /* Set to LCR mode */
- __REG(CFG_FLASH_BASE + LCR_ERASE_NVMODE) = 0; /* Issue Erase Nvmode Reg Command */
-
- reg_SFCTL = CMD_NORMAL; /* Return to Normal mode */
- __REG(CFG_FLASH_BASE + LCR_ERASE_NVMODE) = 0xC0C0C0C0; /* Confirm */
-
- while(!SF_Ready());
-}
-
-void SF_NvmodeWrite(void) {
- SF_PrechargeAll();
-
- reg_SFCTL = CMD_LCR; /* Set to LCR mode */
- __REG(CFG_FLASH_BASE+LCR_PROG_NVMODE) = 0; /* Issue Program Nvmode reg command */
-
- reg_SFCTL = CMD_NORMAL; /* Return to Normal mode */
- __REG(CFG_FLASH_BASE+LCR_PROG_NVMODE) = 0xC0C0C0C0; /* Confirm not needed */
-}
-
-/****************************************************************************************/
-
-ulong flash_init(void) {
- int i, j;
- u32 tmp;
-
-/* Turn on CSD1 for negating RESETSF of SyncFLash */
-
- reg_SFCTL |= 0x80000000; /* enable CSD1 for SyncFlash */
- udelay(200);
-
- reg_SFCTL = CMD_LMR; /* Set Load Mode Register Command */
- tmp = __REG(MODE_REG_VAL); /* Issue Load Mode Register Command */
-
- SF_Normal();
-
- i = 0;
-
- flash_info[i].flash_id = FLASH_MAN_MT | FLASH_MT28S4M16LC;
-
- flash_info[i].size = FLASH_BANK_SIZE;
- flash_info[i].sector_count = CFG_MAX_FLASH_SECT;
-
- memset(flash_info[i].protect, 0, CFG_MAX_FLASH_SECT);
-
- for (j = 0; j < flash_info[i].sector_count; j++) {
- flash_info[i].start[j] = CFG_FLASH_BASE + j * 0x00100000;
- }
-
- flash_protect(FLAG_PROTECT_SET,
- CFG_FLASH_BASE,
- CFG_FLASH_BASE + monitor_flash_len - 1,
- &flash_info[0]);
-
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1,
- &flash_info[0]);
-
- return FLASH_BANK_SIZE;
-}
-
-void flash_print_info (flash_info_t *info) {
-
- int i;
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case (FLASH_MAN_MT & FLASH_VENDMASK):
- printf("Micron: ");
- break;
- default:
- printf("Unknown Vendor ");
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case (FLASH_MT28S4M16LC & FLASH_TYPEMASK):
- printf("2x FLASH_MT28S4M16LC (16MB Total)\n");
- break;
- default:
- printf("Unknown Chip Type\n");
- return;
- break;
- }
-
- printf(" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf(" Sector Start Addresses: ");
-
- for (i = 0; i < info->sector_count; i++) {
- if ((i % 5) == 0)
- printf ("\n ");
-
- printf (" %08lX%s", info->start[i],
- info->protect[i] ? " (RO)" : " ");
- }
-
- printf ("\n");
-}
-
-/*-----------------------------------------------------------------------*/
-
-int flash_erase (flash_info_t *info, int s_first, int s_last) {
- int iflag, cflag, prot, sect;
- int rc = ERR_OK;
-
-/* first look for protection bits */
-
- if (info->flash_id == FLASH_UNKNOWN)
- return ERR_UNKNOWN_FLASH_TYPE;
-
- if ((s_first < 0) || (s_first > s_last))
- return ERR_INVAL;
-
- if ((info->flash_id & FLASH_VENDMASK) != (FLASH_MAN_MT & FLASH_VENDMASK))
- return ERR_UNKNOWN_FLASH_VENDOR;
-
- prot = 0;
-
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect])
- prot++;
- }
-
- if (prot) {
- printf("protected!\n");
- return ERR_PROTECTED;
- }
-/*
- * Disable interrupts which might cause a timeout
- * here. Remember that our exception vectors are
- * at address 0 in the flash, and we don't want a
- * (ticker) exception to happen while the flash
- * chip is in programming mode.
- */
-
- cflag = icache_status();
- icache_disable();
- iflag = disable_interrupts();
-
-/* Start erase on unprotected sectors */
- for (sect = s_first; sect <= s_last && !ctrlc(); sect++) {
-
- printf("Erasing sector %2d ... ", sect);
-
-/* arm simple, non interrupt dependent timer */
-
- reset_timer_masked();
-
- SF_NvmodeErase();
- SF_NvmodeWrite();
-
- SF_Erase(CFG_FLASH_BASE + (0x0100000 * sect));
- SF_Normal();
-
- printf("ok.\n");
- }
-
- if (ctrlc())
- printf("User Interrupt!\n");
-
- if (iflag)
- enable_interrupts();
-
- if (cflag)
- icache_enable();
-
- return rc;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash.
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) {
- int i;
-
- for(i = 0; i < cnt; i += 4) {
-
- SF_PrechargeAll();
-
- reg_SFCTL = CMD_PROGRAM; /* Enter SyncFlash Program mode */
- __REG(addr + i) = __REG((u32)src + i);
-
- while(!SF_Ready());
- }
-
- SF_Normal();
-
- return ERR_OK;
-}
diff --git a/board/mx1ads/u-boot.lds b/board/mx1ads/u-boot.lds
deleted file mode 100644
index 8438f99f78..0000000000
--- a/board/mx1ads/u-boot.lds
+++ /dev/null
@@ -1,58 +0,0 @@
-/*
- * board/mx1ads/u-boot.lds
- *
- * (c) Copyright 2004
- * Techware Information Technology, Inc.
- * http://www.techware.com.tw/
- *
- * Ming-Len Wu <minglen_wu@techware.com.tw>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-ENTRY(_start)
-SECTIONS
-{
- . = 0x00000000;
-
- . = ALIGN(4);
- .text :
- {
- cpu/arm920t/start.o (.text)
- *(.text)
- }
-
- . = ALIGN(4);
- .rodata : { *(.rodata) }
-
- . = ALIGN(4);
- .data : { *(.data) }
-
- . = ALIGN(4);
- .got : { *(.got) }
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = ALIGN(4);
- __bss_start = .;
- .bss : { *(.bss) }
- _end = .;
-}
diff --git a/board/mx1fs2/Makefile b/board/mx1fs2/Makefile
deleted file mode 100644
index 9e3bca14cd..0000000000
--- a/board/mx1fs2/Makefile
+++ /dev/null
@@ -1,47 +0,0 @@
-#
-# (C) Copyright 2000-2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := mx1fs2.o flash.o
-SOBJS := lowlevel_init.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $^
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/mx1fs2/config.mk b/board/mx1fs2/config.mk
deleted file mode 100644
index 59ab542465..0000000000
--- a/board/mx1fs2/config.mk
+++ /dev/null
@@ -1,10 +0,0 @@
-#
-# This config file is used for compilation of IMX sources
-#
-# You might change location of U-Boot in memory by setting right TEXT_BASE.
-# This allows for example having one copy located at the end of ram and stored
-# in flash device and later on while developing use other location to test
-# the code in RAM device only.
-#
-
-TEXT_BASE = 0x08f00000
diff --git a/board/mx1fs2/flash.c b/board/mx1fs2/flash.c
deleted file mode 100644
index 38063106e2..0000000000
--- a/board/mx1fs2/flash.c
+++ /dev/null
@@ -1,849 +0,0 @@
-/*
- * (C) 2000-2004 Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- * (C) 2003 August Hoeraendl, Logotronic GmbH
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#undef CONFIG_FLASH_16BIT
-
-#include <common.h>
-
-#define FLASH_BANK_SIZE MX1FS2_FLASH_BANK_SIZE
-#define MAIN_SECT_SIZE MX1FS2_FLASH_SECT_SIZE
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/*
- * NOTE - CONFIG_FLASH_16BIT means the CPU interface is 16-bit, it
- * has nothing to do with the flash chip being 8-bit or 16-bit.
- */
-#ifdef CONFIG_FLASH_16BIT
-typedef unsigned short FLASH_PORT_WIDTH;
-typedef volatile unsigned short FLASH_PORT_WIDTHV;
-
-#define FLASH_ID_MASK 0xFFFF
-#else
-typedef unsigned long FLASH_PORT_WIDTH;
-typedef volatile unsigned long FLASH_PORT_WIDTHV;
-
-#define FLASH_ID_MASK 0xFFFFFFFF
-#endif
-
-#define FPW FLASH_PORT_WIDTH
-#define FPWV FLASH_PORT_WIDTHV
-
-#define ORMASK(size) ((-size) & OR_AM_MSK)
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-#if 0
-static ulong flash_get_size(FPWV * addr, flash_info_t * info);
-static void flash_get_offsets(ulong base, flash_info_t * info);
-#endif
-static void flash_reset(flash_info_t * info);
-static int write_word_intel(flash_info_t * info, FPWV * dest, FPW data);
-static int write_word_amd(flash_info_t * info, FPWV * dest, FPW data);
-#define write_word(in, de, da) write_word_amd(in, de, da)
-#ifdef CFG_FLASH_PROTECTION
-static void flash_sync_real_protect(flash_info_t * info);
-#endif
-
-/*-----------------------------------------------------------------------
- * flash_init()
- *
- * sets up flash_info and returns size of FLASH (bytes)
- */
-ulong
-flash_init(void)
-{
- int i, j;
- ulong size = 0;
-
- for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
- ulong flashbase = 0;
- flash_info[i].flash_id =
- (FLASH_MAN_AMD & FLASH_VENDMASK) |
- (FLASH_AM640U & FLASH_TYPEMASK);
- flash_info[i].size = FLASH_BANK_SIZE;
- flash_info[i].sector_count = CFG_MAX_FLASH_SECT;
- memset(flash_info[i].protect, 0, CFG_MAX_FLASH_SECT);
- switch (i) {
- case 0:
- flashbase = MX1FS2_FLASH_BASE;
- break;
- default:
- panic("configured too many flash banks!\n");
- break;
- }
- for (j = 0; j < flash_info[i].sector_count; j++) {
- flash_info[i].start[j] = flashbase + j * MAIN_SECT_SIZE;
- }
- size += flash_info[i].size;
- }
-
- /* Protect monitor and environment sectors */
- flash_protect(FLAG_PROTECT_SET,
- CFG_FLASH_BASE,
- CFG_FLASH_BASE + _bss_start - _armboot_start,
- &flash_info[0]);
-
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0]);
-
- return size;
-}
-
-/*-----------------------------------------------------------------------
- */
-static void
-flash_reset(flash_info_t * info)
-{
- FPWV *base = (FPWV *) (info->start[0]);
-
- /* Put FLASH back in read mode */
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL)
- *base = (FPW) 0x00FF00FF; /* Intel Read Mode */
- else if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD)
- *base = (FPW) 0x00F000F0; /* AMD Read Mode */
-}
-
-/*-----------------------------------------------------------------------
- */
-#if 0
-static void
-flash_get_offsets(ulong base, flash_info_t * info)
-{
- int i;
-
- /* set up sector start address table */
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL
- && (info->flash_id & FLASH_BTYPE)) {
- int bootsect_size; /* number of bytes/boot sector */
- int sect_size; /* number of bytes/regular sector */
-
- bootsect_size = 0x00002000 * (sizeof (FPW) / 2);
- sect_size = 0x00010000 * (sizeof (FPW) / 2);
-
- /* set sector offsets for bottom boot block type */
- for (i = 0; i < 8; ++i) {
- info->start[i] = base + (i * bootsect_size);
- }
- for (i = 8; i < info->sector_count; i++) {
- info->start[i] = base + ((i - 7) * sect_size);
- }
- } else if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD
- && (info->flash_id & FLASH_TYPEMASK) == FLASH_AM640U) {
-
- int sect_size; /* number of bytes/sector */
-
- sect_size = 0x00010000 * (sizeof (FPW) / 2);
-
- /* set up sector start address table (uniform sector type) */
- for (i = 0; i < info->sector_count; i++)
- info->start[i] = base + (i * sect_size);
- }
-}
-#endif /* 0 */
-
-/*-----------------------------------------------------------------------
- */
-
-void
-flash_print_info(flash_info_t * info)
-{
- int i;
- uchar *boottype;
- uchar *bootletter;
- uchar *fmt;
- uchar botbootletter[] = "B";
- uchar topbootletter[] = "T";
- uchar botboottype[] = "bottom boot sector";
- uchar topboottype[] = "top boot sector";
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD:
- printf("AMD ");
- break;
- case FLASH_MAN_BM:
- printf("BRIGHT MICRO ");
- break;
- case FLASH_MAN_FUJ:
- printf("FUJITSU ");
- break;
- case FLASH_MAN_SST:
- printf("SST ");
- break;
- case FLASH_MAN_STM:
- printf("STM ");
- break;
- case FLASH_MAN_INTEL:
- printf("INTEL ");
- break;
- default:
- printf("Unknown Vendor ");
- break;
- }
-
- /* check for top or bottom boot, if it applies */
- if (info->flash_id & FLASH_BTYPE) {
- boottype = botboottype;
- bootletter = botbootletter;
- } else {
- boottype = topboottype;
- bootletter = topbootletter;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM640U:
- fmt = "29LV641D (64 Mbit, uniform sectors)\n";
- break;
- case FLASH_28F800C3B:
- case FLASH_28F800C3T:
- fmt = "28F800C3%s (8 Mbit, %s)\n";
- break;
- case FLASH_INTEL800B:
- case FLASH_INTEL800T:
- fmt = "28F800B3%s (8 Mbit, %s)\n";
- break;
- case FLASH_28F160C3B:
- case FLASH_28F160C3T:
- fmt = "28F160C3%s (16 Mbit, %s)\n";
- break;
- case FLASH_INTEL160B:
- case FLASH_INTEL160T:
- fmt = "28F160B3%s (16 Mbit, %s)\n";
- break;
- case FLASH_28F320C3B:
- case FLASH_28F320C3T:
- fmt = "28F320C3%s (32 Mbit, %s)\n";
- break;
- case FLASH_INTEL320B:
- case FLASH_INTEL320T:
- fmt = "28F320B3%s (32 Mbit, %s)\n";
- break;
- case FLASH_28F640C3B:
- case FLASH_28F640C3T:
- fmt = "28F640C3%s (64 Mbit, %s)\n";
- break;
- case FLASH_INTEL640B:
- case FLASH_INTEL640T:
- fmt = "28F640B3%s (64 Mbit, %s)\n";
- break;
- default:
- fmt = "Unknown Chip Type\n";
- break;
- }
-
- printf(fmt, bootletter, boottype);
-
- printf(" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf(" Sector Start Addresses:");
-
- for (i = 0; i < info->sector_count; ++i) {
- if ((i % 5) == 0) {
- printf("\n ");
- }
-
- printf(" %08lX%s", info->start[i],
- info->protect[i] ? " (RO)" : " ");
- }
-
- printf("\n");
-}
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-
-#if 0
-ulong
-flash_get_size(FPWV * addr, flash_info_t * info)
-{
- /* Write auto select command: read Manufacturer ID */
-
- /* Write auto select command sequence and test FLASH answer */
- addr[0x0555] = (FPW) 0x00AA00AA; /* for AMD, Intel ignores this */
- addr[0x02AA] = (FPW) 0x00550055; /* for AMD, Intel ignores this */
- addr[0x0555] = (FPW) 0x00900090; /* selects Intel or AMD */
-
- /* The manufacturer codes are only 1 byte, so just use 1 byte.
- * This works for any bus width and any FLASH device width.
- */
- switch (addr[0] & 0xff) {
-
- case (uchar) AMD_MANUFACT:
- info->flash_id = FLASH_MAN_AMD;
- break;
-
- case (uchar) INTEL_MANUFACT:
- info->flash_id = FLASH_MAN_INTEL;
- break;
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- break;
- }
-
- /* Check 16 bits or 32 bits of ID so work on 32 or 16 bit bus. */
- if (info->flash_id != FLASH_UNKNOWN)
- switch (addr[1]) {
-
- case (FPW) AMD_ID_LV640U: /* 29LV640 and 29LV641 have same ID */
- info->flash_id += FLASH_AM640U;
- info->sector_count = 128;
- info->size = 0x00800000 * (sizeof (FPW) / 2);
- break; /* => 8 or 16 MB */
-
- case (FPW) INTEL_ID_28F800C3B:
- info->flash_id += FLASH_28F800C3B;
- info->sector_count = 23;
- info->size = 0x00100000 * (sizeof (FPW) / 2);
- break; /* => 1 or 2 MB */
-
- case (FPW) INTEL_ID_28F800B3B:
- info->flash_id += FLASH_INTEL800B;
- info->sector_count = 23;
- info->size = 0x00100000 * (sizeof (FPW) / 2);
- break; /* => 1 or 2 MB */
-
- case (FPW) INTEL_ID_28F160C3B:
- info->flash_id += FLASH_28F160C3B;
- info->sector_count = 39;
- info->size = 0x00200000 * (sizeof (FPW) / 2);
- break; /* => 2 or 4 MB */
-
- case (FPW) INTEL_ID_28F160B3B:
- info->flash_id += FLASH_INTEL160B;
- info->sector_count = 39;
- info->size = 0x00200000 * (sizeof (FPW) / 2);
- break; /* => 2 or 4 MB */
-
- case (FPW) INTEL_ID_28F320C3B:
- info->flash_id += FLASH_28F320C3B;
- info->sector_count = 71;
- info->size = 0x00400000 * (sizeof (FPW) / 2);
- break; /* => 4 or 8 MB */
-
- case (FPW) INTEL_ID_28F320B3B:
- info->flash_id += FLASH_INTEL320B;
- info->sector_count = 71;
- info->size = 0x00400000 * (sizeof (FPW) / 2);
- break; /* => 4 or 8 MB */
-
- case (FPW) INTEL_ID_28F640C3B:
- info->flash_id += FLASH_28F640C3B;
- info->sector_count = 135;
- info->size = 0x00800000 * (sizeof (FPW) / 2);
- break; /* => 8 or 16 MB */
-
- case (FPW) INTEL_ID_28F640B3B:
- info->flash_id += FLASH_INTEL640B;
- info->sector_count = 135;
- info->size = 0x00800000 * (sizeof (FPW) / 2);
- break; /* => 8 or 16 MB */
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- return (0); /* => no or unknown flash */
- }
-
- flash_get_offsets((ulong) addr, info);
-
- /* Put FLASH back in read mode */
- flash_reset(info);
-
- return (info->size);
-}
-#endif /* 0 */
-
-#ifdef CFG_FLASH_PROTECTION
-/*-----------------------------------------------------------------------
- */
-
-static void
-flash_sync_real_protect(flash_info_t * info)
-{
- FPWV *addr = (FPWV *) (info->start[0]);
- FPWV *sect;
- int i;
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_28F800C3B:
- case FLASH_28F800C3T:
- case FLASH_28F160C3B:
- case FLASH_28F160C3T:
- case FLASH_28F320C3B:
- case FLASH_28F320C3T:
- case FLASH_28F640C3B:
- case FLASH_28F640C3T:
- /* check for protected sectors */
- *addr = (FPW) 0x00900090;
- for (i = 0; i < info->sector_count; i++) {
- /* read sector protection at sector address, (A7 .. A0) = 0x02.
- * D0 = 1 for each device if protected.
- * If at least one device is protected the sector is marked
- * protected, but mixed protected and unprotected devices
- * within a sector should never happen.
- */
- sect = (FPWV *) (info->start[i]);
- info->protect[i] =
- (sect[2] & (FPW) (0x00010001)) ? 1 : 0;
- }
-
- /* Put FLASH back in read mode */
- flash_reset(info);
- break;
-
- case FLASH_AM640U:
- default:
- /* no hardware protect that we support */
- break;
- }
-}
-#endif
-
-/*-----------------------------------------------------------------------
- */
-
-int
-flash_erase(flash_info_t * info, int s_first, int s_last)
-{
- FPWV *addr;
- int flag, prot, sect;
- int intel = (info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL;
- ulong start, now, last;
- int rcode = 0;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf("- missing\n");
- } else {
- printf("- no sectors to erase\n");
- }
- return 1;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_INTEL800B:
- case FLASH_INTEL160B:
- case FLASH_INTEL320B:
- case FLASH_INTEL640B:
- case FLASH_28F800C3B:
- case FLASH_28F160C3B:
- case FLASH_28F320C3B:
- case FLASH_28F640C3B:
- case FLASH_AM640U:
- break;
- case FLASH_UNKNOWN:
- default:
- printf("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- return 1;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf("\n");
- }
-
- start = get_timer(0);
- last = start;
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect <= s_last && rcode == 0; sect++) {
-
- if (info->protect[sect] != 0) /* protected, skip it */
- continue;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr = (FPWV *) (info->start[sect]);
- if (intel) {
- *addr = (FPW) 0x00500050; /* clear status register */
- *addr = (FPW) 0x00200020; /* erase setup */
- *addr = (FPW) 0x00D000D0; /* erase confirm */
- } else {
- /* must be AMD style if not Intel */
- FPWV *base; /* first address in bank */
-
- base = (FPWV *) (info->start[0]);
- base[0x0555] = (FPW) 0x00AA00AA; /* unlock */
- base[0x02AA] = (FPW) 0x00550055; /* unlock */
- base[0x0555] = (FPW) 0x00800080; /* erase mode */
- base[0x0555] = (FPW) 0x00AA00AA; /* unlock */
- base[0x02AA] = (FPW) 0x00550055; /* unlock */
- *addr = (FPW) 0x00300030; /* erase sector */
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 50us for AMD, 80us for Intel.
- * Let's wait 1 ms.
- */
- udelay(1000);
-
- while ((*addr & (FPW) 0x00800080) != (FPW) 0x00800080) {
- if ((now = get_timer(0)) - start > CFG_FLASH_ERASE_TOUT) {
- printf("Timeout\n");
-
- if (intel) {
- /* suspend erase */
- *addr = (FPW) 0x00B000B0;
- }
-
- flash_reset(info); /* reset to read mode */
- rcode = 1; /* failed */
- break;
- }
-
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc('.');
- last = now;
- }
- }
-
- flash_reset(info); /* reset to read mode */
- }
-
- printf(" done\n");
- return rcode;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-int
-bad_write_buff(flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- FPW data = 0; /* 16 or 32 bit word, matches flash bus width on MPC8XX */
- int bytes; /* number of bytes to program in current word */
- int left; /* number of bytes left to program */
- int i, res;
-
- for (left = cnt, res = 0;
- left > 0 && res == 0;
- addr += sizeof (data), left -= sizeof (data) - bytes) {
-
- bytes = addr & (sizeof (data) - 1);
- addr &= ~(sizeof (data) - 1);
-
- /* combine source and destination data so can program
- * an entire word of 16 or 32 bits
- */
- for (i = 0; i < sizeof (data); i++) {
- data <<= 8;
- if (i < bytes || i - bytes >= left)
- data += *((uchar *) addr + i);
- else
- data += *src++;
- }
-
- /* write one word to the flash */
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD:
- res = write_word_amd(info, (FPWV *) addr, data);
- break;
- case FLASH_MAN_INTEL:
- res = write_word_intel(info, (FPWV *) addr, data);
- break;
- default:
- /* unknown flash type, error! */
- printf("missing or unknown FLASH type\n");
- res = 1; /* not really a timeout, but gives error */
- break;
- }
- }
-
- return (res);
-}
-
-/**
- * write_buf: - Copy memory to flash.
- *
- * @param info:
- * @param src: source of copy transaction
- * @param addr: where to copy to
- * @param cnt: number of bytes to copy
- *
- * @return error code
- */
-
-int
-write_buff(flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- ulong cp, wp;
- FPW data;
- int l;
- int i, rc;
-
- wp = (addr & ~1); /* get lower word aligned address */
-
- /* handle unaligned start bytes */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i = 0, cp = wp; i < l; ++i, ++cp) {
- data = (data >> 8) | (*(uchar *) cp << 8);
- }
- for (; i < 2 && cnt > 0; ++i) {
- data = (data >> 8) | (*src++ << 8);
- --cnt;
- ++cp;
- }
- for (; cnt == 0 && i < 2; ++i, ++cp) {
- data = (data >> 8) | (*(uchar *) cp << 8);
- }
-
- if ((rc = write_word(info, (FPWV *)wp, data)) != 0) {
- return (rc);
- }
- wp += 2;
- }
-
- /* handle word aligned part */
- while (cnt >= 2) {
- /* data = *((vushort*)src); */
- data = *((FPW *) src);
- if ((rc = write_word(info, (FPWV *)wp, data)) != 0) {
- return (rc);
- }
- src += sizeof (FPW);
- wp += sizeof (FPW);
- cnt -= sizeof (FPW);
- }
-
- if (cnt == 0)
- return ERR_OK;
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i = 0, cp = wp; i < 2 && cnt > 0; ++i, ++cp) {
- data = (data >> 8) | (*src++ << 8);
- --cnt;
- }
- for (; i < 2; ++i, ++cp) {
- data = (data >> 8) | (*(uchar *) cp << 8);
- }
-
- return write_word(info, (FPWV *)wp, data);
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash for AMD FLASH
- * A word is 16 or 32 bits, whichever the bus width of the flash bank
- * (not an individual chip) is.
- *
- * returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int
-write_word_amd(flash_info_t * info, FPWV * dest, FPW data)
-{
- ulong start;
- int flag;
- int res = 0; /* result, assume success */
- FPWV *base; /* first address in flash bank */
-
- /* Check if Flash is (sufficiently) erased */
- if ((*dest & data) != data) {
- return (2);
- }
-
- base = (FPWV *) (info->start[0]);
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- base[0x0555] = (FPW) 0x00AA00AA; /* unlock */
- base[0x02AA] = (FPW) 0x00550055; /* unlock */
- base[0x0555] = (FPW) 0x00A000A0; /* selects program mode */
-
- *dest = data; /* start programming the data */
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- start = get_timer(0);
-
- /* data polling for D7 */
- while (res == 0
- && (*dest & (FPW) 0x00800080) != (data & (FPW) 0x00800080)) {
- if (get_timer(0) - start > CFG_FLASH_WRITE_TOUT) {
- *dest = (FPW) 0x00F000F0; /* reset bank */
- printf("SHA timeout\n");
- res = 1;
- }
- }
-
- return (res);
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash for Intel FLASH
- * A word is 16 or 32 bits, whichever the bus width of the flash bank
- * (not an individual chip) is.
- *
- * returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int
-write_word_intel(flash_info_t * info, FPWV * dest, FPW data)
-{
- ulong start;
- int flag;
- int res = 0; /* result, assume success */
-
- /* Check if Flash is (sufficiently) erased */
- if ((*dest & data) != data) {
- return (2);
- }
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- *dest = (FPW) 0x00500050; /* clear status register */
- *dest = (FPW) 0x00FF00FF; /* make sure in read mode */
- *dest = (FPW) 0x00400040; /* program setup */
-
- *dest = data; /* start programming the data */
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- start = get_timer(0);
-
- while (res == 0 && (*dest & (FPW) 0x00800080) != (FPW) 0x00800080) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- *dest = (FPW) 0x00B000B0; /* Suspend program */
- res = 1;
- }
- }
-
- if (res == 0 && (*dest & (FPW) 0x00100010))
- res = 1; /* write failed, time out error is close enough */
-
- *dest = (FPW) 0x00500050; /* clear status register */
- *dest = (FPW) 0x00FF00FF; /* make sure in read mode */
-
- return (res);
-}
-
-#ifdef CFG_FLASH_PROTECTION
-/*-----------------------------------------------------------------------
- */
-int
-flash_real_protect(flash_info_t * info, long sector, int prot)
-{
- int rcode = 0; /* assume success */
- FPWV *addr; /* address of sector */
- FPW value;
-
- addr = (FPWV *) (info->start[sector]);
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_28F800C3B:
- case FLASH_28F800C3T:
- case FLASH_28F160C3B:
- case FLASH_28F160C3T:
- case FLASH_28F320C3B:
- case FLASH_28F320C3T:
- case FLASH_28F640C3B:
- case FLASH_28F640C3T:
- flash_reset(info); /* make sure in read mode */
- *addr = (FPW) 0x00600060L; /* lock command setup */
- if (prot)
- *addr = (FPW) 0x00010001L; /* lock sector */
- else
- *addr = (FPW) 0x00D000D0L; /* unlock sector */
- flash_reset(info); /* reset to read mode */
-
- /* now see if it really is locked/unlocked as requested */
- *addr = (FPW) 0x00900090;
- /* read sector protection at sector address, (A7 .. A0) = 0x02.
- * D0 = 1 for each device if protected.
- * If at least one device is protected the sector is marked
- * protected, but return failure. Mixed protected and
- * unprotected devices within a sector should never happen.
- */
- value = addr[2] & (FPW) 0x00010001;
- if (value == 0)
- info->protect[sector] = 0;
- else if (value == (FPW) 0x00010001)
- info->protect[sector] = 1;
- else {
- /* error, mixed protected and unprotected */
- rcode = 1;
- info->protect[sector] = 1;
- }
- if (info->protect[sector] != prot)
- rcode = 1; /* failed to protect/unprotect as requested */
-
- /* reload all protection bits from hardware for now */
- flash_sync_real_protect(info);
- break;
-
- case FLASH_AM640U:
- default:
- /* no hardware protect that we support */
- info->protect[sector] = prot;
- break;
- }
-
- return rcode;
-}
-#endif
diff --git a/board/mx1fs2/intel.h b/board/mx1fs2/intel.h
deleted file mode 100644
index 8db5dd4f64..0000000000
--- a/board/mx1fs2/intel.h
+++ /dev/null
@@ -1,99 +0,0 @@
-/*
- * Copyright (C) 2002 ETC s.r.o.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the ETC s.r.o. nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * Written by Marcel Telka <marcel@telka.sk>, 2002.
- *
- * Documentation:
- * [1] Intel Corporation, "3 Volt Intel Strata Flash Memory 28F128J3A, 28F640J3A,
- * 28F320J3A (x8/x16)", April 2002, Order Number: 290667-011
- * [2] Intel Corporation, "3 Volt Synchronous Intel Strata Flash Memory 28F640K3, 28F640K18,
- * 28F128K3, 28F128K18, 28F256K3, 28F256K18 (x16)", June 2002, Order Number: 290737-005
- *
- * This file is taken from OpenWinCE project hosted by SourceForge.net
- *
- */
-
-#ifndef FLASH_INTEL_H
-#define FLASH_INTEL_H
-
-#include <common.h>
-
-/* Intel CFI commands - see Table 4. in [1] and Table 3. in [2] */
-
-#define CFI_INTEL_CMD_READ_ARRAY 0xFF /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
-#define CFI_INTEL_CMD_READ_IDENTIFIER 0x90 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
-#define CFI_INTEL_CMD_READ_QUERY 0x98 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
-#define CFI_INTEL_CMD_READ_STATUS_REGISTER 0x70 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
-#define CFI_INTEL_CMD_CLEAR_STATUS_REGISTER 0x50 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
-#define CFI_INTEL_CMD_PROGRAM1 0x40 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
-#define CFI_INTEL_CMD_PROGRAM2 0x10 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
-#define CFI_INTEL_CMD_WRITE_TO_BUFFER 0xE8 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
-#define CFI_INTEL_CMD_CONFIRM 0xD0 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
-#define CFI_INTEL_CMD_BLOCK_ERASE 0x20 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
-#define CFI_INTEL_CMD_SUSPEND 0xB0 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
-#define CFI_INTEL_CMD_RESUME 0xD0 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
-#define CFI_INTEL_CMD_LOCK_SETUP 0x60 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
-#define CFI_INTEL_CMD_LOCK_BLOCK 0x01 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
-#define CFI_INTEL_CMD_UNLOCK_BLOCK 0xD0 /* 28FxxxJ3A - unlocks all blocks, 28FFxxxK3, 28FxxxK18 */
-#define CFI_INTEL_CMD_LOCK_DOWN_BLOCK 0x2F /* 28FxxxK3, 28FxxxK18 */
-
-/* Intel CFI Status Register bits - see Table 6. in [1] and Table 7. in [2] */
-
-#define CFI_INTEL_SR_READY 1 << 7 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
-#define CFI_INTEL_SR_ERASE_SUSPEND 1 << 6 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
-#define CFI_INTEL_SR_ERASE_ERROR 1 << 5 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
-#define CFI_INTEL_SR_PROGRAM_ERROR 1 << 4 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
-#define CFI_INTEL_SR_VPEN_ERROR 1 << 3 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
-#define CFI_INTEL_SR_PROGRAM_SUSPEND 1 << 2 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
-#define CFI_INTEL_SR_BLOCK_LOCKED 1 << 1 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
-#define CFI_INTEL_SR_BEFP 1 << 0 /* 28FxxxK3, 28FxxxK18 */
-
-/* Intel flash device ID codes for 28FxxxJ3A - see Table 5. in [1] */
-
-#define CFI_CHIP_INTEL_28F320J3A 0x0016
-#define CFI_CHIPN_INTEL_28F320J3A "28F320J3A"
-#define CFI_CHIP_INTEL_28F640J3A 0x0017
-#define CFI_CHIPN_INTEL_28F640J3A "28F640J3A"
-#define CFI_CHIP_INTEL_28F128J3A 0x0018
-#define CFI_CHIPN_INTEL_28F128J3A "28F128J3A"
-
-/* Intel flash device ID codes for 28FxxxK3 and 28FxxxK18 - see Table 8. in [2] */
-
-#define CFI_CHIP_INTEL_28F640K3 0x8801
-#define CFI_CHIPN_INTEL_28F640K3 "28F640K3"
-#define CFI_CHIP_INTEL_28F128K3 0x8802
-#define CFI_CHIPN_INTEL_28F128K3 "28F128K3"
-#define CFI_CHIP_INTEL_28F256K3 0x8803
-#define CFI_CHIPN_INTEL_28F256K3 "28F256K3"
-#define CFI_CHIP_INTEL_28F640K18 0x8805
-#define CFI_CHIPN_INTEL_28F640K18 "28F640K18"
-#define CFI_CHIP_INTEL_28F128K18 0x8806
-#define CFI_CHIPN_INTEL_28F128K18 "28F128K18"
-#define CFI_CHIP_INTEL_28F256K18 0x8807
-#define CFI_CHIPN_INTEL_28F256K18 "28F256K18"
-
-#endif /* FLASH_INTEL_H */
diff --git a/board/mx1fs2/lowlevel_init.S b/board/mx1fs2/lowlevel_init.S
deleted file mode 100644
index 8211beb3f8..0000000000
--- a/board/mx1fs2/lowlevel_init.S
+++ /dev/null
@@ -1,188 +0,0 @@
-/*
- * Copyright (C) 2004 Sascha Hauer, Pengutronix
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version 2
- * of the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
- * 02111-1307, USA.
- *
- */
-
-#include <config.h>
-#include <version.h>
-#include <asm/arch/imx-regs.h>
-
-.globl lowlevel_init
-lowlevel_init:
-
- mov r10, lr
-
-/* Change PERCLK1DIV to 14 ie 14+1 */
- ldr r0, =PCDR
- ldr r1, =CFG_PCDR_VAL
- str r1, [r0]
-
-/* set MCU PLL Control Register 0 */
-
- ldr r0, =MPCTL0
- ldr r1, =CFG_MPCTL0_VAL
- str r1, [r0]
-
-/* set MCU PLL Control Register 1 */
-
- ldr r0, =MPCTL1
- ldr r1, =CFG_MPCTL1_VAL
- str r1, [r0]
-
-/* set mpll restart bit */
- ldr r0, =CSCR
- ldr r1, [r0]
- orr r1,r1,#(1<<21)
- str r1, [r0]
-
- mov r2,#0x10
-1:
- mov r3,#0x2000
-2:
- subs r3,r3,#1
- bne 2b
-
- subs r2,r2,#1
- bne 1b
-
-/* set System PLL Control Register 0 */
-
- ldr r0, =SPCTL0
- ldr r1, =CFG_SPCTL0_VAL
- str r1, [r0]
-
-/* set System PLL Control Register 1 */
-
- ldr r0, =SPCTL1
- ldr r1, =CFG_SPCTL1_VAL
- str r1, [r0]
-
-/* set spll restart bit */
- ldr r0, =CSCR
- ldr r1, [r0]
- orr r1,r1,#(1<<22)
- str r1, [r0]
-
- mov r2,#0x10
-1:
- mov r3,#0x2000
-2:
- subs r3,r3,#1
- bne 2b
-
- subs r2,r2,#1
- bne 1b
-
- ldr r0, =CSCR
- ldr r1, =CFG_CSCR_VAL
- str r1, [r0]
-
- ldr r0, =GPCR
- ldr r1, =CFG_GPCR_VAL
- str r1, [r0]
-
-/*
- * I have now read the ARM920 DataSheet back-to-Back, and have stumbled upon
- * this.....
- *
- * It would appear that from a Cold-Boot the ARM920T enters "FastBus" mode CP15
- * register 1, this stops it using the output of the PLL and thus runs at the
- * slow rate. Unless you place the Core into "Asynch" mode, the CPU will never
- * use the value set in the CM_OSC registers...regardless of what you set it
- * too! Thus, although i thought i was running at 140MHz, i'm actually running
- * at 40!..
- *
- * Slapping this into my bootloader does the trick...
- *
- * MRC p15,0,r0,c1,c0,0 ; read core configuration register
- * ORR r0,r0,#0xC0000000 ; set asynchronous clocks and not fastbus mode
- * MCR p15,0,r0,c1,c0,0 ; write modified value to core configuration
- * register
- *
- */
- MRC p15,0,r0,c1,c0,0
-/* ORR r0,r0,#0xC0000000 async mode */
-/* ORR r0,r0,#0x40000000 sync mode */
- ORR r0,r0,#0xC0000000
- MCR p15,0,r0,c1,c0,0
-
- ldr r0, =GIUS(0)
- ldr r1, =CFG_GIUS_A_VAL
- str r1, [r0]
-
- ldr r0, =FMCR
- ldr r1, =CFG_FMCR_VAL
- str r1, [r0]
-
- ldr r0, =CS0U
- ldr r1, =CFG_CS0U_VAL
- str r1, [r0]
-
- ldr r0, =CS0L
- ldr r1, =CFG_CS0L_VAL
- str r1, [r0]
-
- ldr r0, =CS1U
- ldr r1, =CFG_CS1U_VAL
- str r1, [r0]
-
- ldr r0, =CS1L
- ldr r1, =CFG_CS1L_VAL
- str r1, [r0]
-
- ldr r0, =CS4U
- ldr r1, =CFG_CS4U_VAL
- str r1, [r0]
-
- ldr r0, =CS4L
- ldr r1, =CFG_CS4L_VAL
- str r1, [r0]
-
- ldr r0, =CS5U
- ldr r1, =CFG_CS5U_VAL
- str r1, [r0]
-
- ldr r0, =CS5L
- ldr r1, =CFG_CS5L_VAL
- str r1, [r0]
-
-/* SDRAM Setup */
-
- ldr r1,=0x00221000 /* adr of SDCTRL0 */
- ldr r0,=0x92120200
- str r0,[r1,#0] /* put in precharge command mode */
- ldr r2,=0x08200000 /* adr for precharge cmd */
- ldr r0,[r2,#0] /* precharge */
- ldr r0,=0xA2120200
- ldr r2,=0x08000000 /* start of SDRAM */
- str r0,[r1,#0] /* put in auto-refresh mode */
- ldr r0,[r2,#0] /* auto-refresh */
- ldr r0,[r2,#0] /* auto-refresh */
- ldr r0,[r2,#0] /* auto-refresh */
- ldr r0,[r2,#0] /* auto-refresh */
- ldr r0,[r2,#0] /* auto-refresh */
- ldr r0,[r2,#0] /* auto-refresh */
- ldr r0,[r2,#0] /* auto-refresh */
- ldr r0,=0xB2120200
- ldr r2,=0x08111800
- str r0,[r1,#0] /* setup for mode register of SDRAM */
- ldr r0,[r2,#0] /* program mode register */
- ldr r0,=0x82124267
- str r0,[r1,#0] /* back to normal operation */
-
- mov pc,r10
diff --git a/board/mx1fs2/mx1fs2.c b/board/mx1fs2/mx1fs2.c
deleted file mode 100644
index 9e7a06c0df..0000000000
--- a/board/mx1fs2/mx1fs2.c
+++ /dev/null
@@ -1,125 +0,0 @@
-/*
- * Copyright (C) 2004 Sascha Hauer, Pengutronix
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- */
-
-#include <common.h>
-
-#include <asm/arch/imx-regs.h>
-
-#define SHOW_BOOT_PROGRESS(arg) show_boot_progress(arg)
-
-extern void imx_gpio_mode(int gpio_mode);
-
-static void logo_init(void)
-{
- imx_gpio_mode(PD15_PF_LD0);
- imx_gpio_mode(PD16_PF_LD1);
- imx_gpio_mode(PD17_PF_LD2);
- imx_gpio_mode(PD18_PF_LD3);
- imx_gpio_mode(PD19_PF_LD4);
- imx_gpio_mode(PD20_PF_LD5);
- imx_gpio_mode(PD21_PF_LD6);
- imx_gpio_mode(PD22_PF_LD7);
- imx_gpio_mode(PD23_PF_LD8);
- imx_gpio_mode(PD24_PF_LD9);
- imx_gpio_mode(PD25_PF_LD10);
- imx_gpio_mode(PD26_PF_LD11);
- imx_gpio_mode(PD27_PF_LD12);
- imx_gpio_mode(PD28_PF_LD13);
- imx_gpio_mode(PD29_PF_LD14);
- imx_gpio_mode(PD30_PF_LD15);
- imx_gpio_mode(PD14_PF_FLM_VSYNC);
- imx_gpio_mode(PD13_PF_LP_HSYNC);
- imx_gpio_mode(PD6_PF_LSCLK);
- imx_gpio_mode(GPIO_PORTD | GPIO_OUT | GPIO_GPIO);
- imx_gpio_mode(PD11_PF_CONTRAST);
- imx_gpio_mode(PD10_PF_SPL_SPR);
-
- LCDC_RMCR = 0x00000000;
- LCDC_PCR = PCR_COLOR | PCR_PBSIZ_8 | PCR_BPIX_16 | PCR_PCD(5);
- LCDC_HCR = HCR_H_WIDTH(2);
- LCDC_VCR = VCR_V_WIDTH(2);
-
- LCDC_PWMR = 0x00000380; /* contrast to 0x80 middle (is best !!!) */
- LCDC_SSA = 0x10040000; /* image in flash */
-
- LCDC_SIZE = SIZE_XMAX(320) | SIZE_YMAX(240); /* screen size */
-
- LCDC_VPW = 0x000000A0; /* Virtual Page Width Register */
- LCDC_POS = 0x00000000; /* panning offset 0 (0 pixel offset) */
-
- /* disable Cursor */
- LCDC_CPOS = 0x00000000;
-
- /* fixed burst length */
- LCDC_DMACR = DMACR_BURST | DMACR_HM(8) | DMACR_TM(2);
-
- /* enable LCD */
- DR(3) |= 0x00001000;
- LCDC_RMCR = RMCR_LCDC_EN;
-
-}
-
-int
-board_init(void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- gd->bd->bi_arch_number = MACH_TYPE_MX1FS2;
- gd->bd->bi_boot_params = 0x08000100;
-serial_init();
- logo_init();
- return 0;
-}
-
-int
-dram_init(void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
-#if ( CONFIG_NR_DRAM_BANKS > 0 )
- gd->bd->bi_dram[0].start = MX1FS2_SDRAM_1;
- gd->bd->bi_dram[0].size = MX1FS2_SDRAM_1_SIZE;
-#endif
- return 0;
-}
-
-/**
- * show_boot_progress: - indicate state of the boot process
- *
- * @param status: Status number - see README for details.
- *
- */
-
-void
-show_boot_progress(int status)
-{
- /* We use this as a hook to disable serial ports just before booting
- * This way we suppress the "uncompressing linux..." message
- */
-#ifdef CONFIG_SILENT_CONSOLE
- if( status == 8) {
- if( getenv("silent") != NULL ) {
- *(volatile unsigned long *)0x206080 &= ~1;
- *(volatile unsigned long *)0x207080 &= ~1;
- }
- }
-#endif
- return;
-}
diff --git a/board/mx1fs2/u-boot.lds b/board/mx1fs2/u-boot.lds
deleted file mode 100644
index 1d1669cdea..0000000000
--- a/board/mx1fs2/u-boot.lds
+++ /dev/null
@@ -1,57 +0,0 @@
-/*
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- */
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-ENTRY(_start)
-SECTIONS
-{
- . = 0x00000000;
-
- . = ALIGN(4);
- .text :
- {
- cpu/arm920t/start.o (.text)
- *(.text)
- }
-
- . = ALIGN(4);
- .rodata : { *(.rodata) }
-
- . = ALIGN(4);
- .data : { *(.data) }
-
- . = ALIGN(4);
- .got : { *(.got) }
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = ALIGN(4);
- __bss_start = .;
- .bss : { *(.bss) }
- _end = .;
-}
diff --git a/board/nc650/Makefile b/board/nc650/Makefile
deleted file mode 100644
index a4dd85f508..0000000000
--- a/board/nc650/Makefile
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# (C) Copyright 2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/nc650/config.mk b/board/nc650/config.mk
deleted file mode 100644
index fa8ba3186c..0000000000
--- a/board/nc650/config.mk
+++ /dev/null
@@ -1,28 +0,0 @@
-#
-# (C) Copyright 2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# NC650 board
-#
-
-TEXT_BASE = 0x40700000
diff --git a/board/nc650/flash.c b/board/nc650/flash.c
deleted file mode 100644
index ce2f83bc79..0000000000
--- a/board/nc650/flash.c
+++ /dev/null
@@ -1,542 +0,0 @@
-/*
- * (C) Copyright 2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2001
- * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
- *
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#undef DEBUG
-
-#include <common.h>
-#include <mpc8xx.h>
-
-#ifndef CFG_OR_TIMING_FLASH_AT_50MHZ
-#define CFG_OR_TIMING_FLASH_AT_50MHZ (OR_ACS_DIV1 | OR_TRLX | OR_CSNT_SAM | \
- OR_SCY_2_CLK | OR_EHTR | OR_BI)
-#endif
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-#if defined(CFG_ENV_IS_IN_FLASH)
-# ifndef CFG_ENV_ADDR
-# define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_ENV_OFFSET)
-# endif
-# ifndef CFG_ENV_SIZE
-# define CFG_ENV_SIZE CFG_ENV_SECT_SIZE
-# endif
-# ifndef CFG_ENV_SECT_SIZE
-# define CFG_ENV_SECT_SIZE CFG_ENV_SIZE
-# endif
-#endif
-
-/*-----------------------------------------------------------------------
- * Protection Flags:
- */
-#define FLAG_PROTECT_SET 0x01
-#define FLAG_PROTECT_CLEAR 0x02
-
-/* Board support for 1 or 2 flash devices */
-#undef FLASH_PORT_WIDTH32
-#undef FLASH_PORT_WIDTH16
-#define FLASH_PORT_WIDTH8
-
-#ifdef FLASH_PORT_WIDTH16
-#define FLASH_PORT_WIDTH ushort
-#define FLASH_PORT_WIDTHV vu_short
-#elif FLASH_PORT_WIDTH32
-#define FLASH_PORT_WIDTH ulong
-#define FLASH_PORT_WIDTHV vu_long
-#else /* FLASH_PORT_WIDTH8 */
-#define FLASH_PORT_WIDTH uchar
-#define FLASH_PORT_WIDTHV vu_char
-#endif
-
-#define FPW FLASH_PORT_WIDTH
-#define FPWV FLASH_PORT_WIDTHV
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (FPWV * addr, flash_info_t * info);
-static int write_data (flash_info_t * info, ulong dest, FPW data);
-static void flash_get_offsets (ulong base, flash_info_t * info);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- unsigned long size_b0;
- int i;
-#ifdef CFG_OR_TIMING_FLASH_AT_50MHZ
- int scy, trlx, flash_or_timing, clk_diff;
-
- DECLARE_GLOBAL_DATA_PTR;
-
- scy = (CFG_OR_TIMING_FLASH_AT_50MHZ & OR_SCY_MSK) >> 4;
- if (CFG_OR_TIMING_FLASH_AT_50MHZ & OR_TRLX) {
- trlx = OR_TRLX;
- scy *= 2;
- } else
- trlx = 0;
-
- /* We assume that each 10MHz of bus clock require 1-clk SCY
- * adjustment.
- */
- clk_diff = (gd->bus_clk / 1000000) - 50;
-
- /* We need proper rounding here. This is what the "+5" and "-5"
- * are here for.
- */
- if (clk_diff >= 0)
- scy += (clk_diff + 5) / 10;
- else
- scy += (clk_diff - 5) / 10;
-
- /* For bus frequencies above 50MHz, we want to use relaxed
- * timing (OR_TRLX).
- */
- if (gd->bus_clk >= 50000000)
- trlx = OR_TRLX;
- else
- trlx = 0;
-
- if (trlx)
- scy /= 2;
-
- if (scy > 0xf)
- scy = 0xf;
- if (scy < 1)
- scy = 1;
-
- flash_or_timing = (scy << 4) | trlx |
- (CFG_OR_TIMING_FLASH_AT_50MHZ & ~(OR_TRLX | OR_SCY_MSK));
-#endif
-
- /* Init: no FLASHes known */
- for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* Static FLASH Bank configuration here - FIXME XXX */
- size_b0 = flash_get_size ((FPW *) FLASH_BASE0_PRELIM, &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size_b0, size_b0 << 20);
- }
-
- /* Remap FLASH according to real size */
-#ifndef CFG_OR_TIMING_FLASH_AT_50MHZ
- memctl->memc_or0 = CFG_OR_TIMING_FLASH | (-size_b0 & OR_AM_MSK);
-#else
- memctl->memc_or0 = flash_or_timing | (-size_b0 & OR_AM_MSK);
-#endif
- memctl->memc_br0 = (CFG_FLASH_BASE & BR_BA_MSK) | BR_PS_8 | BR_MS_GPCM | BR_V;
-
- /* Re-do sizing to get full correct info */
- size_b0 = flash_get_size ((FPW *) CFG_FLASH_BASE, &flash_info[0]);
-
- flash_get_offsets (CFG_FLASH_BASE, &flash_info[0]);
-
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
- /* monitor protection ON by default */
- (void) flash_protect (FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE + monitor_flash_len - 1,
- &flash_info[0]);
-#endif
-
-#ifdef CFG_ENV_IS_IN_FLASH
- /* ENV protection ON by default */
- flash_protect (FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1,
- &flash_info[0]);
-#endif
-
- flash_info[0].size = size_b0;
-
- return (size_b0);
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_get_offsets (ulong base, flash_info_t * info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- return;
- }
-
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
- for (i = 0; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00020000);
- }
- }
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t * info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_INTEL:
- printf ("INTEL ");
- break;
- default:
- printf ("Unknown Vendor ");
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_28F320J3A:
- printf ("28F320J3A\n");
- break;
- case FLASH_28F640J3A:
- printf ("28F640J3A\n");
- break;
- case FLASH_28F128J3A:
- printf ("28F128J3A\n");
- break;
- default:
- printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " ");
- }
- printf ("\n");
- return;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-
-static ulong flash_get_size (FPWV * addr, flash_info_t * info)
-{
- FPW value;
-
- addr[0] = (FPW) 0x00900090;
-
- value = addr[0];
-
- debug ("Manuf. ID @ 0x%08lx: 0x%08lx\n", (ulong)addr, value);
-
- switch (value) {
- case (FPW) INTEL_MANUFACT:
- info->flash_id = FLASH_MAN_INTEL;
- break;
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
- return (0); /* no or unknown flash */
- }
-
-#ifdef FLASH_PORT_WIDTH8
- value = addr[2]; /* device ID */
-#else
- value = addr[1]; /* device ID */
-#endif
-
- debug ("Device ID @ 0x%08lx: 0x%08lx\n", (ulong)(&addr[1]), value);
-
- switch (value) {
- case (FPW) INTEL_ID_28F320J3A:
- info->flash_id += FLASH_28F320J3A;
- info->sector_count = 32;
- info->size = 0x00400000;
- break; /* => 4 MB */
-
- case (FPW) INTEL_ID_28F640J3A:
- info->flash_id += FLASH_28F640J3A;
- info->sector_count = 64;
- info->size = 0x00800000;
- break; /* => 8 MB */
-
- case (FPW) INTEL_ID_28F128J3A:
- info->flash_id += FLASH_28F128J3A;
- info->sector_count = 128;
- info->size = 0x01000000;
- break; /* => 16 MB */
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- break;
- }
-
- if (info->sector_count > CFG_MAX_FLASH_SECT) {
- printf ("** ERROR: sector count %d > max (%d) **\n",
- info->sector_count, CFG_MAX_FLASH_SECT);
- info->sector_count = CFG_MAX_FLASH_SECT;
- }
-
- addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
-
- return (info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t * info, int s_first, int s_last)
-{
- int flag, prot, sect;
- ulong type, start, now, last;
- int rcode = 0;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- type = (info->flash_id & FLASH_VENDMASK);
- if ((type != FLASH_MAN_INTEL)) {
- printf ("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- return 1;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- start = get_timer (0);
- last = start;
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- FPWV *addr = (FPWV *) (info->start[sect]);
- FPW status;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
-
- *addr = (FPW) 0x00500050; /* clear status register */
- *addr = (FPW) 0x00200020; /* erase setup */
- *addr = (FPW) 0x00D000D0; /* erase confirm */
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts ();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
- if ((now = get_timer (start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- *addr = (FPW) 0x00B000B0; /* suspend erase */
- *addr = (FPW) 0x00FF00FF; /* reset to read mode */
- rcode = 1;
- break;
- }
-
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- }
-
- *addr = (FPW) 0x00FF00FF; /* reset to read mode */
- }
- }
- printf (" done\n");
- return rcode;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- * 4 - Flash not identified
- */
-
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- ulong cp, wp;
- FPW data;
-
- int i, l, rc, port_width;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- return 4;
- }
-/* get lower word aligned address */
-#ifdef FLASH_PORT_WIDTH16
- wp = (addr & ~1);
- port_width = 2;
-#elif defined(FLASH_PORT_WIDTH32)
- wp = (addr & ~3);
- port_width = 4;
-#else
- wp = addr;
- port_width = 1;
-#endif
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i = 0, cp = wp; i < l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
- for (; i < port_width && cnt > 0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt == 0 && i < port_width; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
-
- if ((rc = write_data (info, wp, data)) != 0) {
- return (rc);
- }
- wp += port_width;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= port_width) {
- data = 0;
- for (i = 0; i < port_width; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_data (info, wp, data)) != 0) {
- return (rc);
- }
- wp += port_width;
- cnt -= port_width;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i < port_width; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
-
- return (write_data (info, wp, data));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word or halfword to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_data (flash_info_t * info, ulong dest, FPW data)
-{
- FPWV *addr = (FPWV *) dest;
- ulong status;
- ulong start;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*addr & data) != data) {
- printf ("not erased at %08lx (%x)\n", (ulong) addr, *addr);
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
-
- *addr = (FPW) 0x00400040; /* write setup */
- *addr = data;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts ();
-
- start = get_timer (0);
-
- while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
- if (get_timer (start) > CFG_FLASH_WRITE_TOUT) {
- *addr = (FPW) 0x00FF00FF; /* restore read mode */
- return (1);
- }
- }
-
- *addr = (FPW) 0x00FF00FF; /* restore read mode */
-
- return (0);
-}
diff --git a/board/nc650/nc650.c b/board/nc650/nc650.c
deleted file mode 100644
index fe96b93816..0000000000
--- a/board/nc650/nc650.c
+++ /dev/null
@@ -1,253 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <config.h>
-#include <mpc8xx.h>
-
-/*
- * Memory Controller Using
- *
- * CS0 - Flash memory (0x40000000)
- * CS3 - SDRAM (0x00000000}
- */
-
-/* ------------------------------------------------------------------------- */
-
-#define _not_used_ 0xffffffff
-
-const uint sdram_table[] = {
- /* single read. (offset 0 in upm RAM) */
- 0x1f07fc04, 0xeeaefc04, 0x11adfc04, 0xefbbbc00,
- 0x1ff77c47,
-
- /* MRS initialization (offset 5) */
-
- 0x1ff77c34, 0xefeabc34, 0x1fb57c35,
-
- /* burst read. (offset 8 in upm RAM) */
- 0x1f07fc04, 0xeeaefc04, 0x10adfc04, 0xf0affc00,
- 0xf0affc00, 0xf1affc00, 0xefbbbc00, 0x1ff77c47,
- _not_used_, _not_used_, _not_used_, _not_used_,
- _not_used_, _not_used_, _not_used_, _not_used_,
-
- /* single write. (offset 18 in upm RAM) */
- 0x1f27fc04, 0xeeaebc00, 0x01b93c04, 0x1ff77c47,
- _not_used_, _not_used_, _not_used_, _not_used_,
-
- /* burst write. (offset 20 in upm RAM) */
- 0x1f07fc04, 0xeeaebc00, 0x10ad7c00, 0xf0affc00,
- 0xf0affc00, 0xe1bbbc04, 0x1ff77c47, _not_used_,
- _not_used_, _not_used_, _not_used_, _not_used_,
- _not_used_, _not_used_, _not_used_, _not_used_,
-
- /* refresh. (offset 30 in upm RAM) */
- 0x1ff5fc84, 0xfffffc04, 0xfffffc04, 0xfffffc04,
- 0xfffffc84, 0xfffffc07, _not_used_, _not_used_,
- _not_used_, _not_used_, _not_used_, _not_used_,
-
- /* exception. (offset 3c in upm RAM) */
- 0x7ffffc07, _not_used_, _not_used_, _not_used_
-};
-
-const uint nand_flash_table[] = {
- /* single read. (offset 0 in upm RAM) */
- 0x0ff3fc04, 0x0ff3fc04, 0x0ff3fc04, 0x0ffffc04,
- 0xfffffc00, 0xfffffc05, 0xfffffc05, 0xfffffc05,
-
- /* burst read. (offset 8 in upm RAM) */
- 0xffffcc05, 0xffffcc05, 0xffffcc05, 0xffffcc05,
- 0xffffcc05, 0xffffcc05, 0xffffcc05, 0xffffcc05,
- 0xffffcc05, 0xffffcc05, 0xffffcc05, 0xffffcc05,
- 0xffffcc05, 0xffffcc05, 0xffffcc05, 0xffffcc05,
-
- /* single write. (offset 18 in upm RAM) */
- 0x00fffc04, 0x00fffc04, 0x00fffc04, 0x0ffffc04,
- 0x0ffffc84, 0x0ffffc84, 0xfffffc00, 0xfffffc05,
-
- /* burst write. (offset 20 in upm RAM) */
- 0xffffcc05, 0xffffcc05, 0xffffcc05, 0xffffcc05,
- 0xffffcc05, 0xffffcc05, 0xffffcc05, 0xffffcc05,
- 0xffffcc05, 0xffffcc05, 0xffffcc05, 0xffffcc05,
- 0xffffcc05, 0xffffcc05, 0xffffcc05, 0xffffcc05,
-
- /* refresh. (offset 30 in upm RAM) */
- 0xffffcc05, 0xffffcc05, 0xffffcc05, 0xffffcc05,
- 0xffffcc05, 0xffffcc05, 0xffffcc05, 0xffffcc05,
- 0xffffcc05, 0xffffcc05, 0xffffcc05, 0xffffcc05,
-
- /* exception. (offset 3c in upm RAM) */
- 0xffffcc05, 0xffffcc05, 0xffffcc05, 0xffffcc05
-};
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Check Board Identity:
- */
-
-int checkboard (void)
-{
- puts ("Board: NC650\n");
- return 0;
-}
-
-/* ------------------------------------------------------------------------- */
-
-static long int dram_size (long int, long int *, long int);
-
-/* ------------------------------------------------------------------------- */
-
-long int initdram (int board_type)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- long int size8, size9;
- long int size_b0 = 0;
- unsigned long reg;
-
- upmconfig (UPMA, (uint *) sdram_table,
- sizeof (sdram_table) / sizeof (uint));
-
- /*
- * Preliminary prescaler for refresh (depends on number of
- * banks): This value is selected for four cycles every 62.4 us
- * with two SDRAM banks or four cycles every 31.2 us with one
- * bank. It will be adjusted after memory sizing.
- */
- memctl->memc_mptpr = CFG_MPTPR_2BK_8K;
-
- memctl->memc_mar = 0x00000088;
-
- /*
- * Map controller bank 1 to the SDRAM bank at
- * preliminary address - these have to be modified after the
- * SDRAM size has been determined.
- */
- memctl->memc_or3 = CFG_OR3_PRELIM;
- memctl->memc_br3 = CFG_BR3_PRELIM;
-
- memctl->memc_mamr = CFG_MAMR_8COL & (~(MAMR_PTAE)); /* no refresh yet */
-
- udelay (200);
-
- /* perform SDRAM initializsation sequence */
-
- memctl->memc_mcr = 0x80006105; /* SDRAM bank 0 */
- udelay (200);
- memctl->memc_mcr = 0x80006230; /* SDRAM bank 0 - execute twice */
- udelay (200);
-
- memctl->memc_mamr |= MAMR_PTAE; /* enable refresh */
-
- udelay (1000);
-
- /*
- * Check Bank 0 Memory Size for re-configuration
- *
- * try 8 column mode
- */
- size8 = dram_size (CFG_MAMR_8COL, (ulong *) SDRAM_BASE3_PRELIM,
- SDRAM_MAX_SIZE);
-
- udelay (1000);
-
- /*
- * try 9 column mode
- */
- size9 = dram_size (CFG_MAMR_9COL, (ulong *) SDRAM_BASE3_PRELIM,
- SDRAM_MAX_SIZE);
-
- udelay (1000);
-
- if (size8 < size9) {
- size_b0 = size9;
- } else {
- size_b0 = size8;
- memctl->memc_mamr = CFG_MAMR_8COL;
- udelay (500);
- }
-
- /*
- * Adjust refresh rate depending on SDRAM type, both banks.
- * For types > 128 MBit leave it at the current (fast) rate
- */
- if ((size_b0 < 0x02000000)) {
- /* reduce to 15.6 us (62.4 us / quad) */
- memctl->memc_mptpr = CFG_MPTPR_2BK_4K;
- udelay (1000);
- }
-
- /*
- * Final mapping
- */
-
- memctl->memc_or3 = ((-size_b0) & 0xFFFF0000) | CFG_OR_TIMING_SDRAM;
- memctl->memc_br3 = (CFG_SDRAM_BASE & BR_BA_MSK) | BR_MS_UPMA | BR_V;
-
- /* adjust refresh rate depending on SDRAM type, one bank */
- reg = memctl->memc_mptpr;
- reg >>= 1; /* reduce to CFG_MPTPR_1BK_8K / _4K */
- memctl->memc_mptpr = reg;
-
- udelay (10000);
-
- /* Configure UPMB for NAND flash access */
- upmconfig (UPMB, (uint *) nand_flash_table,
- sizeof (nand_flash_table) / sizeof (uint));
-
- memctl->memc_mbmr = CFG_MBMR_NAND;
-
- return (size_b0);
-}
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Check memory range for valid RAM. A simple memory test determines
- * the actually available RAM size between addresses `base' and
- * `base + maxsize'. Some (not all) hardware errors are detected:
- * - short between address lines
- * - short between data lines
- */
-
-static long int dram_size (long int mamr_value, long int *base, long int maxsize)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
-
- memctl->memc_mamr = mamr_value;
-
- return (get_ram_size(base, maxsize));
-}
-
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
-void nand_init(void)
-{
- extern unsigned long nand_probe(unsigned long physadr);
-
- unsigned long totlen = nand_probe(CFG_NAND_BASE);
-
- printf ("%4lu MB\n", totlen >> 20);
-}
-#endif
diff --git a/board/nc650/u-boot.lds b/board/nc650/u-boot.lds
deleted file mode 100644
index ca449181eb..0000000000
--- a/board/nc650/u-boot.lds
+++ /dev/null
@@ -1,129 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc8xx/start.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/nc650/u-boot.lds.debug b/board/nc650/u-boot.lds.debug
deleted file mode 100644
index 2228a2005a..0000000000
--- a/board/nc650/u-boot.lds.debug
+++ /dev/null
@@ -1,127 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc8xx/start.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/netphone/Makefile b/board/netphone/Makefile
deleted file mode 100644
index b3c1797e22..0000000000
--- a/board/netphone/Makefile
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# (C) Copyright 2000-2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o phone_console.o
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/netphone/config.mk b/board/netphone/config.mk
deleted file mode 100644
index 8497ebc812..0000000000
--- a/board/netphone/config.mk
+++ /dev/null
@@ -1,28 +0,0 @@
-#
-# (C) Copyright 2000-2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# netVia Boards
-#
-
-TEXT_BASE = 0x40000000
diff --git a/board/netphone/flash.c b/board/netphone/flash.c
deleted file mode 100644
index 0c81140f23..0000000000
--- a/board/netphone/flash.c
+++ /dev/null
@@ -1,529 +0,0 @@
-/*
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size(vu_long * addr, flash_info_t * info);
-static int write_byte(flash_info_t * info, ulong dest, uchar data);
-static void flash_get_offsets(ulong base, flash_info_t * info);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init(void)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- unsigned long size;
-#if CONFIG_NETPHONE_VERSION == 2
- unsigned long size1;
-#endif
- int i;
-
- /* Init: no FLASHes known */
- for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i)
- flash_info[i].flash_id = FLASH_UNKNOWN;
-
- size = flash_get_size((vu_long *) FLASH_BASE0_PRELIM, &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size, size << 20);
- }
-
- /* Remap FLASH according to real size */
- memctl->memc_or0 = CFG_OR_TIMING_FLASH | (-size & 0xFFFF8000);
- memctl->memc_br0 = (CFG_FLASH_BASE & BR_BA_MSK) | (memctl->memc_br0 & ~(BR_BA_MSK));
-
- /* Re-do sizing to get full correct info */
- size = flash_get_size((vu_long *) CFG_FLASH_BASE, &flash_info[0]);
-
- flash_get_offsets(CFG_FLASH_BASE, &flash_info[0]);
-
- /* monitor protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_FLASH_BASE, CFG_FLASH_BASE + monitor_flash_len - 1,
- &flash_info[0]);
-
- flash_protect ( FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1,
- &flash_info[0]);
-
-#ifdef CFG_ENV_ADDR_REDUND
- flash_protect ( FLAG_PROTECT_SET,
- CFG_ENV_ADDR_REDUND,
- CFG_ENV_ADDR_REDUND + CFG_ENV_SIZE_REDUND - 1,
- &flash_info[0]);
-#endif
-
- flash_info[0].size = size;
-
-#if CONFIG_NETPHONE_VERSION == 2
- size1 = flash_get_size((vu_long *) FLASH_BASE4_PRELIM, &flash_info[1]);
- if (size1 > 0) {
- if (flash_info[1].flash_id == FLASH_UNKNOWN)
- printf("## Unknown FLASH on Bank 1 - Size = 0x%08lx = %ld MB\n", size1, size1 << 20);
-
- /* Remap FLASH according to real size */
- memctl->memc_or4 = CFG_OR_TIMING_FLASH | (-size1 & 0xFFFF8000);
- memctl->memc_br4 = (CFG_FLASH_BASE4 & BR_BA_MSK) | (memctl->memc_br4 & ~(BR_BA_MSK));
-
- /* Re-do sizing to get full correct info */
- size1 = flash_get_size((vu_long *) CFG_FLASH_BASE4, &flash_info[1]);
-
- flash_get_offsets(CFG_FLASH_BASE4, &flash_info[1]);
-
- size += size1;
- } else
- memctl->memc_br4 &= ~BR_V;
-#endif
-
- return (size);
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_get_offsets(ulong base, flash_info_t * info)
-{
- int i;
-
- /* set up sector start address table */
- if ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM040) {
- for (i = 0; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00010000);
- }
- } else if (info->flash_id & FLASH_BTYPE) {
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00004000;
- info->start[2] = base + 0x00006000;
- info->start[3] = base + 0x00008000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00010000) - 0x00030000;
- }
- } else {
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- info->start[i--] = base + info->size - 0x00004000;
- info->start[i--] = base + info->size - 0x00006000;
- info->start[i--] = base + info->size - 0x00008000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00010000;
- }
- }
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info(flash_info_t * info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD:
- printf("AMD ");
- break;
- case FLASH_MAN_FUJ:
- printf("FUJITSU ");
- break;
- case FLASH_MAN_MX:
- printf("MXIC ");
- break;
- default:
- printf("Unknown Vendor ");
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM040:
- printf("AM29LV040B (4 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM400B:
- printf("AM29LV400B (4 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM400T:
- printf("AM29LV400T (4 Mbit, top boot sector)\n");
- break;
- case FLASH_AM800B:
- printf("AM29LV800B (8 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM800T:
- printf("AM29LV800T (8 Mbit, top boot sector)\n");
- break;
- case FLASH_AM160B:
- printf("AM29LV160B (16 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM160T:
- printf("AM29LV160T (16 Mbit, top boot sector)\n");
- break;
- case FLASH_AM320B:
- printf("AM29LV320B (32 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM320T:
- printf("AM29LV320T (32 Mbit, top boot sector)\n");
- break;
- default:
- printf("Unknown Chip Type\n");
- break;
- }
-
- printf(" Size: %ld MB in %d Sectors\n", info->size >> 20, info->sector_count);
-
- printf(" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf("\n ");
- printf(" %08lX%s", info->start[i], info->protect[i] ? " (RO)" : " ");
- }
- printf("\n");
-}
-
-/*-----------------------------------------------------------------------
- */
-
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-
-static ulong flash_get_size(vu_long * addr, flash_info_t * info)
-{
- short i;
- uchar mid;
- uchar pid;
- vu_char *caddr = (vu_char *) addr;
- ulong base = (ulong) addr;
-
- /* Write auto select command: read Manufacturer ID */
- caddr[0x0555] = 0xAA;
- caddr[0x02AA] = 0x55;
- caddr[0x0555] = 0x90;
-
- mid = caddr[0];
- switch (mid) {
- case (AMD_MANUFACT & 0xFF):
- info->flash_id = FLASH_MAN_AMD;
- break;
- case (FUJ_MANUFACT & 0xFF):
- info->flash_id = FLASH_MAN_FUJ;
- break;
- case (MX_MANUFACT & 0xFF):
- info->flash_id = FLASH_MAN_MX;
- break;
- case (STM_MANUFACT & 0xFF):
- info->flash_id = FLASH_MAN_STM;
- break;
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- return (0); /* no or unknown flash */
- }
-
- pid = caddr[1]; /* device ID */
- switch (pid) {
- case (AMD_ID_LV400T & 0xFF):
- info->flash_id += FLASH_AM400T;
- info->sector_count = 11;
- info->size = 0x00080000;
- break; /* => 512 kB */
-
- case (AMD_ID_LV400B & 0xFF):
- info->flash_id += FLASH_AM400B;
- info->sector_count = 11;
- info->size = 0x00080000;
- break; /* => 512 kB */
-
- case (AMD_ID_LV800T & 0xFF):
- info->flash_id += FLASH_AM800T;
- info->sector_count = 19;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case (AMD_ID_LV800B & 0xFF):
- info->flash_id += FLASH_AM800B;
- info->sector_count = 19;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case (AMD_ID_LV160T & 0xFF):
- info->flash_id += FLASH_AM160T;
- info->sector_count = 35;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case (AMD_ID_LV160B & 0xFF):
- info->flash_id += FLASH_AM160B;
- info->sector_count = 35;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case (AMD_ID_LV040B & 0xFF):
- info->flash_id += FLASH_AM040;
- info->sector_count = 8;
- info->size = 0x00080000;
- break;
-
- case (STM_ID_M29W040B & 0xFF):
- info->flash_id += FLASH_AM040;
- info->sector_count = 8;
- info->size = 0x00080000;
- break;
-
-#if 0 /* enable when device IDs are available */
- case (AMD_ID_LV320T & 0xFF):
- info->flash_id += FLASH_AM320T;
- info->sector_count = 67;
- info->size = 0x00400000;
- break; /* => 4 MB */
-
- case (AMD_ID_LV320B & 0xFF):
- info->flash_id += FLASH_AM320B;
- info->sector_count = 67;
- info->size = 0x00400000;
- break; /* => 4 MB */
-#endif
- default:
- info->flash_id = FLASH_UNKNOWN;
- return (0); /* => no or unknown flash */
-
- }
-
- printf(" ");
- /* set up sector start address table */
- if ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM040) {
- for (i = 0; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00010000);
- }
- } else if (info->flash_id & FLASH_BTYPE) {
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00004000;
- info->start[2] = base + 0x00006000;
- info->start[3] = base + 0x00008000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00010000) - 0x00030000;
- }
- } else {
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- info->start[i--] = base + info->size - 0x00004000;
- info->start[i--] = base + info->size - 0x00006000;
- info->start[i--] = base + info->size - 0x00008000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00010000;
- }
- }
-
- /* check for protected sectors */
- for (i = 0; i < info->sector_count; i++) {
- /* read sector protection: D0 = 1 if protected */
- caddr = (volatile unsigned char *)(info->start[i]);
- info->protect[i] = caddr[2] & 1;
- }
-
- /*
- * Prevent writes to uninitialized FLASH.
- */
- if (info->flash_id != FLASH_UNKNOWN) {
- caddr = (vu_char *) info->start[0];
-
- caddr[0x0555] = 0xAA;
- caddr[0x02AA] = 0x55;
- caddr[0x0555] = 0xF0;
-
- udelay(20000);
- }
-
- return (info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase(flash_info_t * info, int s_first, int s_last)
-{
- vu_char *addr = (vu_char *) (info->start[0]);
- int flag, prot, sect, l_sect;
- ulong start, now, last;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf("- missing\n");
- } else {
- printf("- no sectors to erase\n");
- }
- return 1;
- }
-
- if ((info->flash_id == FLASH_UNKNOWN) ||
- (info->flash_id > FLASH_AMD_COMP)) {
- printf("Can't erase unknown flash type %08lx - aborted\n", info->flash_id);
- return 1;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf("- Warning: %d protected sectors will not be erased!\n", prot);
- } else {
- printf("\n");
- }
-
- l_sect = -1;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[0x0555] = 0xAA;
- addr[0x02AA] = 0x55;
- addr[0x0555] = 0x80;
- addr[0x0555] = 0xAA;
- addr[0x02AA] = 0x55;
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr = (vu_char *) (info->start[sect]);
- addr[0] = 0x30;
- l_sect = sect;
- }
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay(1000);
-
- /*
- * We wait for the last triggered sector
- */
- if (l_sect < 0)
- goto DONE;
-
- start = get_timer(0);
- last = start;
- addr = (vu_char *) (info->start[l_sect]);
- while ((addr[0] & 0x80) != 0x80) {
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf("Timeout\n");
- return 1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc('.');
- last = now;
- }
- }
-
-DONE:
- /* reset to read mode */
- addr = (vu_char *) info->start[0];
- addr[0] = 0xF0; /* reset bank */
-
- printf(" done\n");
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff(flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- int rc;
-
- while (cnt > 0) {
- if ((rc = write_byte(info, addr++, *src++)) != 0) {
- return (rc);
- }
- --cnt;
- }
-
- return (0);
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_byte(flash_info_t * info, ulong dest, uchar data)
-{
- vu_char *addr = (vu_char *) (info->start[0]);
- ulong start;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*((vu_char *) dest) & data) != data) {
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[0x0555] = 0xAA;
- addr[0x02AA] = 0x55;
- addr[0x0555] = 0xA0;
-
- *((vu_char *) dest) = data;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* data polling for D7 */
- start = get_timer(0);
- while ((*((vu_char *) dest) & 0x80) != (data & 0x80)) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- return (1);
- }
- }
- return (0);
-}
diff --git a/board/netphone/netphone.c b/board/netphone/netphone.c
deleted file mode 100644
index dd03e4bd5b..0000000000
--- a/board/netphone/netphone.c
+++ /dev/null
@@ -1,722 +0,0 @@
-/*
- * (C) Copyright 2000-2004
- * Pantelis Antoniou, Intracom S.A., panto@intracom.gr
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * Pantelis Antoniou, Intracom S.A., panto@intracom.gr
- * U-Boot port on NetTA4 board
- */
-
-#include <common.h>
-#include <miiphy.h>
-#include <sed156x.h>
-#include <status_led.h>
-
-#include "mpc8xx.h"
-
-#ifdef CONFIG_HW_WATCHDOG
-#include <watchdog.h>
-#endif
-
-int fec8xx_miiphy_read(char *devname, unsigned char addr,
- unsigned char reg, unsigned short *value);
-int fec8xx_miiphy_write(char *devname, unsigned char addr,
- unsigned char reg, unsigned short value);
-
-/****************************************************************/
-
-/* some sane bit macros */
-#define _BD(_b) (1U << (31-(_b)))
-#define _BDR(_l, _h) (((((1U << (31-(_l))) - 1) << 1) | 1) & ~((1U << (31-(_h))) - 1))
-
-#define _BW(_b) (1U << (15-(_b)))
-#define _BWR(_l, _h) (((((1U << (15-(_l))) - 1) << 1) | 1) & ~((1U << (15-(_h))) - 1))
-
-#define _BB(_b) (1U << (7-(_b)))
-#define _BBR(_l, _h) (((((1U << (7-(_l))) - 1) << 1) | 1) & ~((1U << (7-(_h))) - 1))
-
-#define _B(_b) _BD(_b)
-#define _BR(_l, _h) _BDR(_l, _h)
-
-/****************************************************************/
-
-/*
- * Check Board Identity:
- *
- * Return 1 always.
- */
-
-int checkboard(void)
-{
- printf ("Intracom NetPhone V%d\n", CONFIG_NETPHONE_VERSION);
- return (0);
-}
-
-/****************************************************************/
-
-#define _NOT_USED_ 0xFFFFFFFF
-
-/****************************************************************/
-
-#define CS_0000 0x00000000
-#define CS_0001 0x10000000
-#define CS_0010 0x20000000
-#define CS_0011 0x30000000
-#define CS_0100 0x40000000
-#define CS_0101 0x50000000
-#define CS_0110 0x60000000
-#define CS_0111 0x70000000
-#define CS_1000 0x80000000
-#define CS_1001 0x90000000
-#define CS_1010 0xA0000000
-#define CS_1011 0xB0000000
-#define CS_1100 0xC0000000
-#define CS_1101 0xD0000000
-#define CS_1110 0xE0000000
-#define CS_1111 0xF0000000
-
-#define BS_0000 0x00000000
-#define BS_0001 0x01000000
-#define BS_0010 0x02000000
-#define BS_0011 0x03000000
-#define BS_0100 0x04000000
-#define BS_0101 0x05000000
-#define BS_0110 0x06000000
-#define BS_0111 0x07000000
-#define BS_1000 0x08000000
-#define BS_1001 0x09000000
-#define BS_1010 0x0A000000
-#define BS_1011 0x0B000000
-#define BS_1100 0x0C000000
-#define BS_1101 0x0D000000
-#define BS_1110 0x0E000000
-#define BS_1111 0x0F000000
-
-#define GPL0_AAAA 0x00000000
-#define GPL0_AAA0 0x00200000
-#define GPL0_AAA1 0x00300000
-#define GPL0_000A 0x00800000
-#define GPL0_0000 0x00A00000
-#define GPL0_0001 0x00B00000
-#define GPL0_111A 0x00C00000
-#define GPL0_1110 0x00E00000
-#define GPL0_1111 0x00F00000
-
-#define GPL1_0000 0x00000000
-#define GPL1_0001 0x00040000
-#define GPL1_1110 0x00080000
-#define GPL1_1111 0x000C0000
-
-#define GPL2_0000 0x00000000
-#define GPL2_0001 0x00010000
-#define GPL2_1110 0x00020000
-#define GPL2_1111 0x00030000
-
-#define GPL3_0000 0x00000000
-#define GPL3_0001 0x00004000
-#define GPL3_1110 0x00008000
-#define GPL3_1111 0x0000C000
-
-#define GPL4_0000 0x00000000
-#define GPL4_0001 0x00001000
-#define GPL4_1110 0x00002000
-#define GPL4_1111 0x00003000
-
-#define GPL5_0000 0x00000000
-#define GPL5_0001 0x00000400
-#define GPL5_1110 0x00000800
-#define GPL5_1111 0x00000C00
-#define LOOP 0x00000080
-
-#define EXEN 0x00000040
-
-#define AMX_COL 0x00000000
-#define AMX_ROW 0x00000020
-#define AMX_MAR 0x00000030
-
-#define NA 0x00000008
-
-#define UTA 0x00000004
-
-#define TODT 0x00000002
-
-#define LAST 0x00000001
-
-#define A10_AAAA GPL0_AAAA
-#define A10_AAA0 GPL0_AAA0
-#define A10_AAA1 GPL0_AAA1
-#define A10_000A GPL0_000A
-#define A10_0000 GPL0_0000
-#define A10_0001 GPL0_0001
-#define A10_111A GPL0_111A
-#define A10_1110 GPL0_1110
-#define A10_1111 GPL0_1111
-
-#define RAS_0000 GPL1_0000
-#define RAS_0001 GPL1_0001
-#define RAS_1110 GPL1_1110
-#define RAS_1111 GPL1_1111
-
-#define CAS_0000 GPL2_0000
-#define CAS_0001 GPL2_0001
-#define CAS_1110 GPL2_1110
-#define CAS_1111 GPL2_1111
-
-#define WE_0000 GPL3_0000
-#define WE_0001 GPL3_0001
-#define WE_1110 GPL3_1110
-#define WE_1111 GPL3_1111
-
-/* #define CAS_LATENCY 3 */
-#define CAS_LATENCY 2
-
-const uint sdram_table[0x40] = {
-
-#if CAS_LATENCY == 3
- /* RSS */
- CS_0001 | BS_1111 | A10_AAAA | RAS_0001 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* ACT */
- CS_1111 | BS_1111 | A10_0000 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* NOP */
- CS_0000 | BS_1111 | A10_0001 | RAS_1111 | CAS_0001 | WE_1111 | AMX_COL | UTA, /* READ */
- CS_0001 | BS_0001 | A10_1111 | RAS_0001 | CAS_1111 | WE_0001 | AMX_COL | UTA, /* PALL */
- CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL, /* NOP */
- CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA | TODT | LAST, /* NOP */
- _NOT_USED_, _NOT_USED_,
-
- /* RBS */
- CS_0001 | BS_1111 | A10_AAAA | RAS_0001 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* ACT */
- CS_1111 | BS_1111 | A10_0000 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* NOP */
- CS_0001 | BS_1111 | A10_0001 | RAS_1111 | CAS_0001 | WE_1111 | AMX_COL | UTA, /* READ */
- CS_1111 | BS_0000 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* NOP */
- CS_1111 | BS_0000 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL, /* NOP */
- CS_1111 | BS_0000 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL, /* NOP */
- CS_0001 | BS_0001 | A10_1111 | RAS_0001 | CAS_1111 | WE_0001 | AMX_COL, /* PALL */
- CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | TODT | LAST, /* NOP */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /* WSS */
- CS_0001 | BS_1111 | A10_AAAA | RAS_0001 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* ACT */
- CS_1111 | BS_1111 | A10_0000 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL, /* NOP */
- CS_0000 | BS_0001 | A10_0000 | RAS_1111 | CAS_0001 | WE_0000 | AMX_COL | UTA, /* WRITE */
- CS_0001 | BS_1111 | A10_1111 | RAS_0001 | CAS_1111 | WE_0001 | AMX_COL | UTA, /* PALL */
- CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA | TODT | LAST, /* NOP */
- _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /* WBS */
- CS_0001 | BS_1111 | A10_AAAA | RAS_0001 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* ACT */
- CS_1111 | BS_1111 | A10_0000 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL, /* NOP */
- CS_0001 | BS_0000 | A10_0000 | RAS_1111 | CAS_0001 | WE_0000 | AMX_COL, /* WRITE */
- CS_1111 | BS_0000 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL, /* NOP */
- CS_1111 | BS_0000 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL, /* NOP */
- CS_1111 | BS_0001 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* NOP */
- CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* NOP */
- CS_0001 | BS_1111 | A10_1111 | RAS_0001 | CAS_1111 | WE_0001 | AMX_COL | UTA, /* PALL */
- CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA | TODT | LAST, /* NOP */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_,
-#endif
-
-#if CAS_LATENCY == 2
- /* RSS */
- CS_0001 | BS_1111 | A10_AAAA | RAS_0001 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* ACT */
- CS_1110 | BS_1110 | A10_0000 | RAS_1111 | CAS_1110 | WE_1111 | AMX_COL | UTA, /* NOP */
- CS_0001 | BS_0001 | A10_0000 | RAS_1111 | CAS_0001 | WE_1111 | AMX_COL | UTA, /* READ */
- CS_1110 | BS_1111 | A10_0001 | RAS_1110 | CAS_1111 | WE_1110 | AMX_COL, /* NOP */
- CS_0001 | BS_1111 | A10_1111 | RAS_0001 | CAS_1111 | WE_0001 | AMX_COL | UTA | TODT | LAST, /* PALL */
- _NOT_USED_,
- _NOT_USED_, _NOT_USED_,
-
- /* RBS */
- CS_0001 | BS_1111 | A10_AAAA | RAS_0001 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* ACT */
- CS_1110 | BS_1110 | A10_0000 | RAS_1111 | CAS_1110 | WE_1111 | AMX_COL | UTA, /* NOP */
- CS_0001 | BS_0000 | A10_0000 | RAS_1111 | CAS_0001 | WE_1111 | AMX_COL | UTA, /* READ */
- CS_1111 | BS_0000 | A10_0000 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL, /* NOP */
- CS_1111 | BS_0000 | A10_0000 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL, /* NOP */
- CS_1111 | BS_0001 | A10_0000 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL, /* NOP */
- CS_1110 | BS_1111 | A10_0001 | RAS_1110 | CAS_1111 | WE_1110 | AMX_COL, /* NOP */
- CS_0001 | BS_1111 | A10_1111 | RAS_0001 | CAS_1111 | WE_0001 | AMX_COL | UTA | TODT | LAST, /* PALL */
- _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /* WSS */
- CS_0001 | BS_1111 | A10_AAA0 | RAS_0001 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* ACT */
- CS_1110 | BS_1110 | A10_0000 | RAS_1111 | CAS_1110 | WE_1110 | AMX_COL, /* NOP */
- CS_0000 | BS_0001 | A10_0001 | RAS_1110 | CAS_0001 | WE_0000 | AMX_COL | UTA, /* WRITE */
- CS_0001 | BS_1111 | A10_1111 | RAS_0001 | CAS_1111 | WE_0001 | AMX_COL | UTA | TODT | LAST, /* PALL */
- _NOT_USED_,
- _NOT_USED_, _NOT_USED_,
- _NOT_USED_,
-
- /* WBS */
- CS_0001 | BS_1111 | A10_AAAA | RAS_0001 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* ACT */
- CS_1110 | BS_1110 | A10_0000 | RAS_1111 | CAS_1110 | WE_1110 | AMX_COL, /* NOP */
- CS_0001 | BS_0000 | A10_0000 | RAS_1111 | CAS_0001 | WE_0001 | AMX_COL, /* WRITE */
- CS_1111 | BS_0000 | A10_0000 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL, /* NOP */
- CS_1111 | BS_0000 | A10_0000 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL, /* NOP */
- CS_1110 | BS_0001 | A10_0001 | RAS_1110 | CAS_1111 | WE_1110 | AMX_COL | UTA, /* NOP */
- CS_0001 | BS_1111 | A10_1111 | RAS_0001 | CAS_1111 | WE_0001 | AMX_COL | UTA | TODT | LAST, /* PALL */
- _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_,
-
-#endif
-
- /* UPT */
- CS_0001 | BS_1111 | A10_1111 | RAS_0001 | CAS_0001 | WE_1111 | AMX_COL | UTA | LOOP, /* ATRFR */
- CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* NOP */
- CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* NOP */
- CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* NOP */
- CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA | LOOP, /* NOP */
- CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA | TODT | LAST, /* NOP */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_,
-
- /* EXC */
- CS_0001 | BS_1111 | A10_1111 | RAS_0001 | CAS_1111 | WE_0001 | AMX_COL | UTA | LAST,
- _NOT_USED_,
-
- /* REG */
- CS_1110 | BS_1111 | A10_1110 | RAS_1110 | CAS_1110 | WE_1110 | AMX_MAR | UTA,
- CS_0001 | BS_1111 | A10_0001 | RAS_0001 | CAS_0001 | WE_0001 | AMX_MAR | UTA | LAST,
-};
-
-#if CONFIG_NETPHONE_VERSION == 2
-static const uint nandcs_table[0x40] = {
- /* RSS */
- CS_1000 | GPL4_1111 | GPL5_1111 | UTA,
- CS_0000 | GPL4_1110 | GPL5_1111 | UTA,
- CS_0000 | GPL4_0000 | GPL5_1111 | UTA,
- CS_0000 | GPL4_0000 | GPL5_1111 | UTA,
- CS_0000 | GPL4_0000 | GPL5_1111,
- CS_0000 | GPL4_0001 | GPL5_1111 | UTA,
- CS_0000 | GPL4_1111 | GPL5_1111 | UTA,
- CS_0011 | GPL4_1111 | GPL5_1111 | UTA | LAST, /* NOP */
-
- /* RBS */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /* WSS */
- CS_1000 | GPL4_1111 | GPL5_1110 | UTA,
- CS_0000 | GPL4_1111 | GPL5_0000 | UTA,
- CS_0000 | GPL4_1111 | GPL5_0000 | UTA,
- CS_0000 | GPL4_1111 | GPL5_0000 | UTA,
- CS_0000 | GPL4_1111 | GPL5_0001 | UTA,
- CS_0000 | GPL4_1111 | GPL5_1111 | UTA,
- CS_0000 | GPL4_1111 | GPL5_1111,
- CS_0011 | GPL4_1111 | GPL5_1111 | UTA | LAST,
-
- /* WBS */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /* UPT */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /* EXC */
- CS_0001 | LAST,
- _NOT_USED_,
-
- /* REG */
- CS_1110 ,
- CS_0001 | LAST,
-};
-#endif
-
-/* 0xC8 = 0b11001000 , CAS3, >> 2 = 0b00 11 0 010 */
-/* 0x88 = 0b10001000 , CAS2, >> 2 = 0b00 10 0 010 */
-#define MAR_SDRAM_INIT ((CAS_LATENCY << 6) | 0x00000008LU)
-
-/* 8 */
-#define CFG_MAMR ((CFG_MAMR_PTA << MAMR_PTA_SHIFT) | MAMR_PTAE | \
- MAMR_AMA_TYPE_0 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A11 | \
- MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X)
-
-void check_ram(unsigned int addr, unsigned int size)
-{
- unsigned int i, j, v, vv;
- volatile unsigned int *p;
- unsigned int pv;
-
- p = (unsigned int *)addr;
- pv = (unsigned int)p;
- for (i = 0; i < size / sizeof(unsigned int); i++, pv += sizeof(unsigned int))
- *p++ = pv;
-
- p = (unsigned int *)addr;
- for (i = 0; i < size / sizeof(unsigned int); i++) {
- v = (unsigned int)p;
- vv = *p;
- if (vv != v) {
- printf("%p: read %08x instead of %08x\n", p, vv, v);
- hang();
- }
- p++;
- }
-
- for (j = 0; j < 5; j++) {
- switch (j) {
- case 0: v = 0x00000000; break;
- case 1: v = 0xffffffff; break;
- case 2: v = 0x55555555; break;
- case 3: v = 0xaaaaaaaa; break;
- default:v = 0xdeadbeef; break;
- }
- p = (unsigned int *)addr;
- for (i = 0; i < size / sizeof(unsigned int); i++) {
- *p = v;
- vv = *p;
- if (vv != v) {
- printf("%p: read %08x instead of %08x\n", p, vv, v);
- hang();
- }
- *p = ~v;
- p++;
- }
- }
-}
-
-long int initdram(int board_type)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- long int size;
-
- upmconfig(UPMB, (uint *) sdram_table, sizeof(sdram_table) / sizeof(sdram_table[0]));
-
- /*
- * Preliminary prescaler for refresh
- */
- memctl->memc_mptpr = MPTPR_PTP_DIV8;
-
- memctl->memc_mar = MAR_SDRAM_INIT; /* 32-bit address to be output on the address bus if AMX = 0b11 */
-
- /*
- * Map controller bank 3 to the SDRAM bank at preliminary address.
- */
- memctl->memc_or3 = CFG_OR3_PRELIM;
- memctl->memc_br3 = CFG_BR3_PRELIM;
-
- memctl->memc_mbmr = CFG_MAMR & ~MAMR_PTAE; /* no refresh yet */
-
- udelay(200);
-
- /* perform SDRAM initialisation sequence */
- memctl->memc_mcr = MCR_OP_RUN | MCR_UPM_B | MCR_MB_CS3 | MCR_MLCF(1) | MCR_MAD(0x3C); /* precharge all */
- udelay(1);
-
- memctl->memc_mcr = MCR_OP_RUN | MCR_UPM_B | MCR_MB_CS3 | MCR_MLCF(2) | MCR_MAD(0x30); /* refresh 2 times(0) */
- udelay(1);
-
- memctl->memc_mcr = MCR_OP_RUN | MCR_UPM_B | MCR_MB_CS3 | MCR_MLCF(1) | MCR_MAD(0x3E); /* exception program (write mar)*/
- udelay(1);
-
- memctl->memc_mbmr |= MAMR_PTAE; /* enable refresh */
-
- udelay(10000);
-
- {
- u32 d1, d2;
-
- d1 = 0xAA55AA55;
- *(volatile u32 *)0 = d1;
- d2 = *(volatile u32 *)0;
- if (d1 != d2) {
- printf("DRAM fails: wrote 0x%08x read 0x%08x\n", d1, d2);
- hang();
- }
-
- d1 = 0x55AA55AA;
- *(volatile u32 *)0 = d1;
- d2 = *(volatile u32 *)0;
- if (d1 != d2) {
- printf("DRAM fails: wrote 0x%08x read 0x%08x\n", d1, d2);
- hang();
- }
- }
-
- size = get_ram_size((long *)0, SDRAM_MAX_SIZE);
-
- if (size == 0) {
- printf("SIZE is zero: LOOP on 0\n");
- for (;;) {
- *(volatile u32 *)0 = 0;
- (void)*(volatile u32 *)0;
- }
- }
-
- return size;
-}
-
-/* ------------------------------------------------------------------------- */
-
-void reset_phys(void)
-{
- int phyno;
- unsigned short v;
-
- udelay(10000);
- /* reset the damn phys */
- mii_init();
-
- for (phyno = 0; phyno < 32; ++phyno) {
- fec8xx_miiphy_read(NULL, phyno, PHY_PHYIDR1, &v);
- if (v == 0xFFFF)
- continue;
- fec8xx_miiphy_write(NULL, phyno, PHY_BMCR, PHY_BMCR_POWD);
- udelay(10000);
- fec8xx_miiphy_write(NULL, phyno, PHY_BMCR,
- PHY_BMCR_RESET | PHY_BMCR_AUTON);
- udelay(10000);
- }
-}
-
-/* ------------------------------------------------------------------------- */
-
-/* GP = general purpose, SP = special purpose (on chip peripheral) */
-
-/* bits that can have a special purpose or can be configured as inputs/outputs */
-#define PA_GP_INMASK 0
-#define PA_GP_OUTMASK (_BW(3) | _BW(7) | _BW(10) | _BW(14) | _BW(15))
-#define PA_SP_MASK 0
-#define PA_ODR_VAL 0
-#define PA_GP_OUTVAL (_BW(3) | _BW(14) | _BW(15))
-#define PA_SP_DIRVAL 0
-
-#define PB_GP_INMASK _B(28)
-#define PB_GP_OUTMASK (_B(19) | _B(23) | _B(26) | _B(27) | _B(29) | _B(30))
-#define PB_SP_MASK (_BR(22, 25))
-#define PB_ODR_VAL 0
-#define PB_GP_OUTVAL (_B(26) | _B(27) | _B(29) | _B(30))
-#define PB_SP_DIRVAL 0
-
-#if CONFIG_NETPHONE_VERSION == 1
-#define PC_GP_INMASK _BW(12)
-#define PC_GP_OUTMASK (_BW(10) | _BW(11) | _BW(13) | _BW(15))
-#elif CONFIG_NETPHONE_VERSION == 2
-#define PC_GP_INMASK (_BW(13) | _BW(15))
-#define PC_GP_OUTMASK (_BW(10) | _BW(11) | _BW(12))
-#endif
-#define PC_SP_MASK 0
-#define PC_SOVAL 0
-#define PC_INTVAL 0
-#define PC_GP_OUTVAL (_BW(10) | _BW(11))
-#define PC_SP_DIRVAL 0
-
-#if CONFIG_NETPHONE_VERSION == 1
-#define PE_GP_INMASK _B(31)
-#define PE_GP_OUTMASK (_B(17) | _B(18) |_B(20) | _B(24) | _B(27) | _B(28) | _B(29) | _B(30))
-#define PE_GP_OUTVAL (_B(20) | _B(24) | _B(27) | _B(28))
-#elif CONFIG_NETPHONE_VERSION == 2
-#define PE_GP_INMASK _BR(28, 31)
-#define PE_GP_OUTMASK (_B(17) | _B(18) |_B(20) | _B(24) | _B(27))
-#define PE_GP_OUTVAL (_B(20) | _B(24) | _B(27))
-#endif
-#define PE_SP_MASK 0
-#define PE_ODR_VAL 0
-#define PE_SP_DIRVAL 0
-
-int board_early_init_f(void)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile iop8xx_t *ioport = &immap->im_ioport;
- volatile cpm8xx_t *cpm = &immap->im_cpm;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
-
- /* NAND chip select */
-#if CONFIG_NETPHONE_VERSION == 1
- memctl->memc_or1 = ((0xFFFFFFFFLU & ~(NAND_SIZE - 1)) | OR_CSNT_SAM | OR_BI | OR_SCY_8_CLK | OR_EHTR | OR_TRLX);
- memctl->memc_br1 = ((NAND_BASE & BR_BA_MSK) | BR_PS_8 | BR_V);
-#elif CONFIG_NETPHONE_VERSION == 2
- upmconfig(UPMA, (uint *) nandcs_table, sizeof(nandcs_table) / sizeof(nandcs_table[0]));
- memctl->memc_or1 = ((0xFFFFFFFFLU & ~(NAND_SIZE - 1)) | OR_BI | OR_G5LS);
- memctl->memc_br1 = ((NAND_BASE & BR_BA_MSK) | BR_PS_8 | BR_V | BR_MS_UPMA);
- memctl->memc_mamr = 0; /* all clear */
-#endif
-
- /* DSP chip select */
- memctl->memc_or2 = ((0xFFFFFFFFLU & ~(DSP_SIZE - 1)) | OR_CSNT_SAM | OR_BI | OR_ACS_DIV2 | OR_SETA | OR_TRLX);
- memctl->memc_br2 = ((DSP_BASE & BR_BA_MSK) | BR_PS_16 | BR_V);
-
-#if CONFIG_NETPHONE_VERSION == 1
- memctl->memc_br4 &= ~BR_V;
-#endif
- memctl->memc_br5 &= ~BR_V;
- memctl->memc_br6 &= ~BR_V;
- memctl->memc_br7 &= ~BR_V;
-
- ioport->iop_padat = PA_GP_OUTVAL;
- ioport->iop_paodr = PA_ODR_VAL;
- ioport->iop_padir = PA_GP_OUTMASK | PA_SP_DIRVAL;
- ioport->iop_papar = PA_SP_MASK;
-
- cpm->cp_pbdat = PB_GP_OUTVAL;
- cpm->cp_pbodr = PB_ODR_VAL;
- cpm->cp_pbdir = PB_GP_OUTMASK | PB_SP_DIRVAL;
- cpm->cp_pbpar = PB_SP_MASK;
-
- ioport->iop_pcdat = PC_GP_OUTVAL;
- ioport->iop_pcdir = PC_GP_OUTMASK | PC_SP_DIRVAL;
- ioport->iop_pcso = PC_SOVAL;
- ioport->iop_pcint = PC_INTVAL;
- ioport->iop_pcpar = PC_SP_MASK;
-
- cpm->cp_pedat = PE_GP_OUTVAL;
- cpm->cp_peodr = PE_ODR_VAL;
- cpm->cp_pedir = PE_GP_OUTMASK | PE_SP_DIRVAL;
- cpm->cp_pepar = PE_SP_MASK;
-
- return 0;
-}
-
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
-
-#include <linux/mtd/nand.h>
-
-extern ulong nand_probe(ulong physadr);
-extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
-
-void nand_init(void)
-{
- unsigned long totlen;
-
- totlen = nand_probe(CFG_NAND_BASE);
- printf ("%4lu MB\n", totlen >> 20);
-}
-#endif
-
-#ifdef CONFIG_HW_WATCHDOG
-
-void hw_watchdog_reset(void)
-{
- /* XXX add here the really funky stuff */
-}
-
-#endif
-
-#ifdef CONFIG_SHOW_ACTIVITY
-
-static volatile int left_to_poll = PHONE_CONSOLE_POLL_HZ; /* poll */
-
-/* called from timer interrupt every 1/CFG_HZ sec */
-void board_show_activity(ulong timestamp)
-{
- if (left_to_poll > -PHONE_CONSOLE_POLL_HZ)
- --left_to_poll;
-}
-
-extern void phone_console_do_poll(void);
-
-static void do_poll(void)
-{
- unsigned int base;
-
- while (left_to_poll <= 0) {
- phone_console_do_poll();
- base = left_to_poll + PHONE_CONSOLE_POLL_HZ;
- do {
- left_to_poll = base;
- } while (base != left_to_poll);
- }
-}
-
-/* called when looping */
-void show_activity(int arg)
-{
- do_poll();
-}
-
-#endif
-
-#if defined(CFG_CONSOLE_IS_IN_ENV) && defined(CFG_CONSOLE_OVERWRITE_ROUTINE)
-int overwrite_console(void)
-{
- /* printf("overwrite_console called\n"); */
- return 0;
-}
-#endif
-
-extern int drv_phone_init(void);
-extern int drv_phone_use_me(void);
-extern int drv_phone_is_idle(void);
-
-int misc_init_r(void)
-{
- return drv_phone_init();
-}
-
-int last_stage_init(void)
-{
- int i;
-
-#if CONFIG_NETPHONE_VERSION == 2
- /* assert peripheral reset */
- ((volatile immap_t *)CFG_IMMR)->im_ioport.iop_pcdat &= ~_BW(12);
- for (i = 0; i < 10; i++)
- udelay(1000);
- ((volatile immap_t *)CFG_IMMR)->im_ioport.iop_pcdat |= _BW(12);
-#endif
- reset_phys();
-
- /* check in order to enable the local console */
- left_to_poll = PHONE_CONSOLE_POLL_HZ;
- i = CFG_HZ * 2;
- while (i > 0) {
-
- if (tstc()) {
- getc();
- break;
- }
-
- do_poll();
-
- if (drv_phone_use_me()) {
- status_led_set(0, STATUS_LED_ON);
- while (!drv_phone_is_idle()) {
- do_poll();
- udelay(1000000 / CFG_HZ);
- }
-
- console_assign(stdin, "phone");
- console_assign(stdout, "phone");
- console_assign(stderr, "phone");
- setenv("bootdelay", "-1");
- break;
- }
-
- udelay(1000000 / CFG_HZ);
- i--;
- left_to_poll--;
- }
- left_to_poll = PHONE_CONSOLE_POLL_HZ;
-
- return 0;
-}
diff --git a/board/netphone/phone_console.c b/board/netphone/phone_console.c
deleted file mode 100644
index 408ada0169..0000000000
--- a/board/netphone/phone_console.c
+++ /dev/null
@@ -1,1144 +0,0 @@
-/*
- * (C) Copyright 2004 Intracom S.A.
- * Pantelis Antoniou <panto@intracom.gr>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * phone_console.c
- *
- * A phone based console
- *
- * Virtual display of 80x24 characters.
- * The actual display is much smaller and panned to show the virtual one.
- * Input is made by a numeric keypad utilizing the input method of
- * mobile phones. Sorry no T9 lexicons...
- *
- */
-
-#include <common.h>
-
-#include <version.h>
-#include <linux/types.h>
-#include <devices.h>
-
-#include <sed156x.h>
-
-/*************************************************************************************************/
-
-#define ROWS 24
-#define COLS 80
-
-#define REFRESH_HZ (CFG_HZ/50) /* refresh every 20ms */
-#define BLINK_HZ (CFG_HZ/2) /* cursor blink every 500ms */
-
-/*************************************************************************************************/
-
-#define DISPLAY_BACKLIT_PORT ((volatile immap_t *)CFG_IMMR)->im_ioport.iop_pcdat
-#define DISPLAY_BACKLIT_MASK 0x0010
-
-/*************************************************************************************************/
-
-#define KP_STABLE_HZ (CFG_HZ/100) /* stable for 10ms */
-#define KP_REPEAT_DELAY_HZ (CFG_HZ/4) /* delay before repeat 250ms */
-#define KP_REPEAT_HZ (CFG_HZ/20) /* repeat every 50ms */
-#define KP_FORCE_DELAY_HZ (CFG_HZ/2) /* key was force pressed */
-#define KP_IDLE_DELAY_HZ (CFG_HZ/2) /* key was released and idle */
-
-#if CONFIG_NETPHONE_VERSION == 1
-#define KP_SPI_RXD_PORT (((volatile immap_t *)CFG_IMMR)->im_ioport.iop_pcdat)
-#define KP_SPI_RXD_MASK 0x0008
-
-#define KP_SPI_TXD_PORT (((volatile immap_t *)CFG_IMMR)->im_ioport.iop_pcdat)
-#define KP_SPI_TXD_MASK 0x0004
-
-#define KP_SPI_CLK_PORT (((volatile immap_t *)CFG_IMMR)->im_ioport.iop_pcdat)
-#define KP_SPI_CLK_MASK 0x0001
-#elif CONFIG_NETPHONE_VERSION == 2
-#define KP_SPI_RXD_PORT (((volatile immap_t *)CFG_IMMR)->im_cpm.cp_pbdat)
-#define KP_SPI_RXD_MASK 0x00000008
-
-#define KP_SPI_TXD_PORT (((volatile immap_t *)CFG_IMMR)->im_cpm.cp_pbdat)
-#define KP_SPI_TXD_MASK 0x00000004
-
-#define KP_SPI_CLK_PORT (((volatile immap_t *)CFG_IMMR)->im_cpm.cp_pbdat)
-#define KP_SPI_CLK_MASK 0x00000002
-#endif
-
-#define KP_CS_PORT (((volatile immap_t *)CFG_IMMR)->im_cpm.cp_pedat)
-#define KP_CS_MASK 0x00000010
-
-#define KP_SPI_RXD() (KP_SPI_RXD_PORT & KP_SPI_RXD_MASK)
-
-#define KP_SPI_TXD(x) \
- do { \
- if (x) \
- KP_SPI_TXD_PORT |= KP_SPI_TXD_MASK; \
- else \
- KP_SPI_TXD_PORT &= ~KP_SPI_TXD_MASK; \
- } while(0)
-
-#define KP_SPI_CLK(x) \
- do { \
- if (x) \
- KP_SPI_CLK_PORT |= KP_SPI_CLK_MASK; \
- else \
- KP_SPI_CLK_PORT &= ~KP_SPI_CLK_MASK; \
- } while(0)
-
-#define KP_SPI_CLK_TOGGLE() (KP_SPI_CLK_PORT ^= KP_SPI_CLK_MASK)
-
-#define KP_SPI_BIT_DELAY() /* no delay */
-
-#define KP_CS(x) \
- do { \
- if (x) \
- KP_CS_PORT |= KP_CS_MASK; \
- else \
- KP_CS_PORT &= ~KP_CS_MASK; \
- } while(0)
-
-#define KP_ROWS 7
-#define KP_COLS 4
-
-#define KP_ROWS_MASK ((1 << KP_ROWS) - 1)
-#define KP_COLS_MASK ((1 << KP_COLS) - 1)
-
-#define SCAN 0
-#define SCAN_FILTER 1
-#define SCAN_COL 2
-#define SCAN_COL_FILTER 3
-#define PRESSED 4
-
-#define KP_F1 0 /* leftmost dot (tab) */
-#define KP_F2 1 /* middle left dot */
-#define KP_F3 2 /* up */
-#define KP_F4 3 /* middle right dot */
-#define KP_F5 4 /* rightmost dot */
-#define KP_F6 5 /* C */
-#define KP_F7 6 /* left */
-#define KP_F8 7 /* down */
-#define KP_F9 8 /* right */
-#define KP_F10 9 /* enter */
-#define KP_F11 10 /* R */
-#define KP_F12 11 /* save */
-#define KP_F13 12 /* redial */
-#define KP_F14 13 /* speaker */
-#define KP_F15 14 /* unused */
-#define KP_F16 15 /* unused */
-
-#define KP_RELEASE -1 /* key depressed */
-#define KP_FORCE -2 /* key was pressed for more than force hz */
-#define KP_IDLE -3 /* key was released and idle */
-
-#define KP_1 '1'
-#define KP_2 '2'
-#define KP_3 '3'
-#define KP_4 '4'
-#define KP_5 '5'
-#define KP_6 '6'
-#define KP_7 '7'
-#define KP_8 '8'
-#define KP_9 '9'
-#define KP_0 '0'
-#define KP_STAR '*'
-#define KP_HASH '#'
-
-/*************************************************************************************************/
-
-static int curs_disabled;
-static int curs_col, curs_row;
-static int disp_col, disp_row;
-
-static int width, height;
-
-/* the simulated vty buffer */
-static char vty_buf[ROWS * COLS];
-static char last_visible_buf[ROWS * COLS]; /* worst case */
-static char *last_visible_curs_ptr;
-static int last_visible_curs_rev;
-static int blinked_state;
-static int last_input_mode;
-static int refresh_time;
-static int blink_time;
-static char last_fast_punct;
-
-/*************************************************************************************************/
-
-#define IM_SMALL 0
-#define IM_CAPITAL 1
-#define IM_NUMBER 2
-
-static int input_mode;
-static char fast_punct;
-static int tab_indicator;
-static const char *fast_punct_list = ",.:;*";
-
-static const char *input_mode_txt[] = { "abc", "ABC", "123" };
-
-static const char *punct = ".,!;?'\"-()@/:_+&%*=<>$[]{}\\~^#|";
-static const char *whspace = " 0\n";
-/* per mode character select (for 2-9) */
-static const char *digits_sel[2][8] = {
- { /* small */
- "abc2", /* 2 */
- "def3", /* 3 */
- "ghi4", /* 4 */
- "jkl5", /* 5 */
- "mno6", /* 6 */
- "pqrs7", /* 7 */
- "tuv8", /* 8 */
- "wxyz9", /* 9 */
- }, { /* capital */
- "ABC2", /* 2 */
- "DEF3", /* 3 */
- "GHI4", /* 4 */
- "JKL5", /* 5 */
- "MNO6", /* 6 */
- "PQRS7", /* 7 */
- "TUV8", /* 8 */
- "WXYZ9", /* 9 */
- }
-};
-
-/*****************************************************************************/
-
-static void update(void);
-static void ensure_visible(int col, int row, int dx, int dy);
-
-static void console_init(void)
-{
- curs_disabled = 0;
- curs_col = 0;
- curs_row = 0;
-
- disp_col = 0;
- disp_row = 0;
-
- input_mode = IM_SMALL;
- fast_punct = ',';
- last_fast_punct = '\0';
- refresh_time = REFRESH_HZ;
- blink_time = BLINK_HZ;
-
- memset(vty_buf, ' ', sizeof(vty_buf));
-
- memset(last_visible_buf, ' ', sizeof(last_visible_buf));
- last_visible_curs_ptr = NULL;
- last_input_mode = -1;
- last_visible_curs_rev = 0;
-
- blinked_state = 0;
-
- sed156x_init();
- width = sed156x_text_width;
- height = sed156x_text_height - 1;
-
- tab_indicator = 0;
-}
-
-/*****************************************************************************/
-
-void phone_putc(const char c);
-
-/*****************************************************************************/
-
-static int queued_char = -1;
-static int enabled = 0;
-
-/*****************************************************************************/
-
-/* flush buffers */
-int phone_start(void)
-{
- console_init();
-
- update();
- sed156x_sync();
-
- enabled = 1;
- queued_char = 'U' - '@';
-
- /* backlit on */
- DISPLAY_BACKLIT_PORT &= ~DISPLAY_BACKLIT_MASK;
-
- return 0;
-}
-
-int phone_stop(void)
-{
- enabled = 0;
-
- sed156x_clear();
- sed156x_sync();
-
- /* backlit off */
- DISPLAY_BACKLIT_PORT |= DISPLAY_BACKLIT_MASK;
-
- return 0;
-}
-
-void phone_puts(const char *s)
-{
- int count = strlen(s);
-
- while (count--)
- phone_putc(*s++);
-}
-
-int phone_tstc(void)
-{
- return queued_char >= 0 ? 1 : 0;
-}
-
-int phone_getc(void)
-{
- int r;
-
- if (queued_char < 0)
- return -1;
-
- r = queued_char;
- queued_char = -1;
-
- return r;
-}
-
-/*****************************************************************************/
-
-int drv_phone_init(void)
-{
- device_t console_dev;
-
- console_init();
-
- memset(&console_dev, 0, sizeof(console_dev));
- strcpy(console_dev.name, "phone");
- console_dev.ext = DEV_EXT_VIDEO; /* Video extensions */
- console_dev.flags = DEV_FLAGS_OUTPUT | DEV_FLAGS_INPUT | DEV_FLAGS_SYSTEM;
- console_dev.start = phone_start;
- console_dev.stop = phone_stop;
- console_dev.putc = phone_putc; /* 'putc' function */
- console_dev.puts = phone_puts; /* 'puts' function */
- console_dev.tstc = phone_tstc; /* 'tstc' function */
- console_dev.getc = phone_getc; /* 'getc' function */
-
- if (device_register(&console_dev) == 0)
- return 1;
-
- return 0;
-}
-
-static int use_me;
-
-int drv_phone_use_me(void)
-{
- return use_me;
-}
-
-static void kp_do_poll(void);
-
-void phone_console_do_poll(void)
-{
- int i, x, y;
-
- kp_do_poll();
-
- if (enabled) {
- /* do the blink */
- blink_time -= PHONE_CONSOLE_POLL_HZ;
- if (blink_time <= 0) {
- blink_time += BLINK_HZ;
- if (last_visible_curs_ptr) {
- i = last_visible_curs_ptr - last_visible_buf;
- x = i % width; y = i / width;
- sed156x_reverse_at(x, y, 1);
- last_visible_curs_rev ^= 1;
- }
- }
-
- /* do the refresh */
- refresh_time -= PHONE_CONSOLE_POLL_HZ;
- if (refresh_time <= 0) {
- refresh_time += REFRESH_HZ;
- sed156x_sync();
- }
- }
-
-}
-
-static int last_scancode = -1;
-static int forced_scancode = 0;
-static int input_state = -1;
-static int input_scancode = -1;
-static int input_selected_char = -1;
-static char input_covered_char;
-
-static void putchar_at_cursor(char c)
-{
- vty_buf[curs_row * COLS + curs_col] = c;
- ensure_visible(curs_col, curs_row, 1, 1);
-}
-
-static char getchar_at_cursor(void)
-{
- return vty_buf[curs_row * COLS + curs_col];
-}
-
-static void queue_input_char(char c)
-{
- if (c <= 0)
- return;
-
- queued_char = c;
-}
-
-static void terminate_input(void)
-{
- if (input_state < 0)
- return;
-
- if (input_selected_char >= 0)
- queue_input_char(input_selected_char);
-
- input_state = -1;
- input_selected_char = -1;
- putchar_at_cursor(input_covered_char);
-
- curs_disabled = 0;
- blink_time = BLINK_HZ;
- update();
-}
-
-static void handle_enabled_scancode(int scancode)
-{
- char c;
- int new_disp_col, new_disp_row;
- const char *sel;
-
-
- switch (scancode) {
-
- /* key was released */
- case KP_RELEASE:
- forced_scancode = 0;
- break;
-
- /* key was forced */
- case KP_FORCE:
-
- switch (last_scancode) {
- case '#':
- if (input_mode == IM_NUMBER) {
- input_mode = IM_CAPITAL;
- /* queue backspace to erase # */
- queue_input_char('\b');
- } else {
- input_mode = IM_NUMBER;
- fast_punct = '*';
- }
- update();
- break;
-
- case '0': case '1':
- case '2': case '3': case '4': case '5':
- case '6': case '7': case '8': case '9':
-
- if (input_state < 0)
- break;
-
- input_selected_char = last_scancode;
- putchar_at_cursor((char)input_selected_char);
- terminate_input();
-
- break;
-
- default:
- break;
- }
-
- break;
-
- /* release and idle */
- case KP_IDLE:
- input_scancode = -1;
- if (input_state < 0)
- break;
- terminate_input();
- break;
-
- /* change input mode */
- case '#':
- if (last_scancode == '#') /* no repeat */
- break;
-
- if (input_mode == IM_NUMBER) {
- input_scancode = scancode;
- input_state = 0;
- input_selected_char = scancode;
- input_covered_char = getchar_at_cursor();
- putchar_at_cursor((char)input_selected_char);
- terminate_input();
- break;
- }
-
- if (input_mode == IM_SMALL)
- input_mode = IM_CAPITAL;
- else
- input_mode = IM_SMALL;
-
- update();
- break;
-
- case '*':
- /* no repeat */
- if (last_scancode == scancode)
- break;
-
- if (input_state >= 0)
- terminate_input();
-
- input_scancode = fast_punct;
- input_state = 0;
- input_selected_char = input_scancode;
- input_covered_char = getchar_at_cursor();
- putchar_at_cursor((char)input_selected_char);
- terminate_input();
-
- break;
-
- case '0': case '1':
- case '2': case '3': case '4': case '5':
- case '6': case '7': case '8': case '9':
-
- /* no repeat */
- if (last_scancode == scancode)
- break;
-
- if (input_mode == IM_NUMBER) {
- input_scancode = scancode;
- input_state = 0;
- input_selected_char = scancode;
- input_covered_char = getchar_at_cursor();
- putchar_at_cursor((char)input_selected_char);
- terminate_input();
- break;
- }
-
- if (input_state >= 0 && input_scancode != scancode)
- terminate_input();
-
- if (input_state < 0) {
- curs_disabled = 1;
- input_scancode = scancode;
- input_state = 0;
- input_covered_char = getchar_at_cursor();
- } else
- input_state++;
-
- if (scancode == '0')
- sel = whspace;
- else if (scancode == '1')
- sel = punct;
- else
- sel = digits_sel[input_mode][scancode - '2'];
- c = *(sel + input_state);
- if (c == '\0') {
- input_state = 0;
- c = *sel;
- }
-
- input_selected_char = (int)c;
- putchar_at_cursor((char)input_selected_char);
- update();
-
- break;
-
- /* move visible display */
- case KP_F3: case KP_F8: case KP_F7: case KP_F9:
-
- new_disp_col = disp_col;
- new_disp_row = disp_row;
-
- switch (scancode) {
- /* up */
- case KP_F3:
- if (new_disp_row <= 0)
- break;
- new_disp_row--;
- break;
-
- /* down */
- case KP_F8:
- if (new_disp_row >= ROWS - height)
- break;
- new_disp_row++;
- break;
-
- /* left */
- case KP_F7:
- if (new_disp_col <= 0)
- break;
- new_disp_col--;
- break;
-
- /* right */
- case KP_F9:
- if (new_disp_col >= COLS - width)
- break;
- new_disp_col++;
- break;
- }
-
- /* no change? */
- if (disp_col == new_disp_col && disp_row == new_disp_row)
- break;
-
- disp_col = new_disp_col;
- disp_row = new_disp_row;
- update();
-
- break;
-
- case KP_F6: /* backspace */
- /* inputing something; no backspace sent, just cancel input */
- if (input_state >= 0) {
- input_selected_char = -1; /* cancel */
- terminate_input();
- break;
- }
- queue_input_char('\b');
- break;
-
- case KP_F10: /* enter */
- /* inputing something; first cancel input */
- if (input_state >= 0)
- terminate_input();
- queue_input_char('\r');
- break;
-
- case KP_F11: /* R -> Ctrl-C (abort) */
- if (input_state >= 0)
- terminate_input();
- queue_input_char('C' - 'Q'); /* ctrl-c */
- break;
-
- case KP_F5: /* F% -> Ctrl-U (clear line) */
- if (input_state >= 0)
- terminate_input();
- queue_input_char('U' - 'Q'); /* ctrl-c */
- break;
-
-
- case KP_F1: /* tab */
- /* inputing something; first cancel input */
- if (input_state >= 0)
- terminate_input();
- queue_input_char('\t');
- break;
-
- case KP_F2: /* change fast punct */
- sel = strchr(fast_punct_list, fast_punct);
- if (sel == NULL)
- sel = &fast_punct_list[0];
- sel++;
- if (*sel == '\0')
- sel = &fast_punct_list[0];
- fast_punct = *sel;
- update();
- break;
-
-
- }
-
- if (scancode != KP_FORCE && scancode != KP_IDLE) /* don't record forced or idle scancode */
- last_scancode = scancode;
-}
-
-static void scancode_action(int scancode)
-{
-#if 0
- if (scancode == KP_RELEASE)
- printf(" RELEASE\n");
- else if (scancode == KP_FORCE)
- printf(" FORCE\n");
- else if (scancode == KP_IDLE)
- printf(" IDLE\n");
- else if (scancode < 32)
- printf(" F%d", scancode + 1);
- else
- printf(" %c", (char)scancode);
- printf("\n");
-#endif
-
- if (enabled) {
- handle_enabled_scancode(scancode);
- return;
- }
-
- if (scancode == KP_FORCE && last_scancode == '*')
- use_me = 1;
-
- last_scancode = scancode;
-}
-
-/**************************************************************************************/
-
-/* update the display; make sure to update only the differences */
-static void update(void)
-{
- int i;
- char *s, *e, *t, *r, *b, *cp;
-
- if (input_mode != last_input_mode)
- sed156x_output_at(sed156x_text_width - 3, sed156x_text_height - 1, input_mode_txt[input_mode], 3);
-
- if (tab_indicator == 0) {
- sed156x_output_at(0, sed156x_text_height - 1, "\\t", 2);
- tab_indicator = 1;
- }
-
- if (fast_punct != last_fast_punct)
- sed156x_output_at(4, sed156x_text_height - 1, &fast_punct, 1);
-
- if (curs_disabled ||
- curs_col < disp_col || curs_col >= (disp_col + width) ||
- curs_row < disp_row || curs_row >= (disp_row + height)) {
- cp = NULL;
- } else
- cp = last_visible_buf + (curs_row - disp_row) * width + (curs_col - disp_col);
-
-
- /* printf("(%d,%d) (%d,%d) %s\n", curs_col, curs_row, disp_col, disp_row, cp ? "YES" : "no"); */
-
- /* clear previous cursor */
- if (last_visible_curs_ptr && last_visible_curs_rev == 0) {
- i = last_visible_curs_ptr - last_visible_buf;
- sed156x_reverse_at(i % width, i / width, 1);
- }
-
- b = vty_buf + disp_row * COLS + disp_col;
- t = last_visible_buf;
- for (i = 0; i < height; i++) {
- s = b;
- e = b + width;
- /* update only the differences */
- do {
- while (s < e && *s == *t) {
- s++;
- t++;
- }
- if (s == e) /* no more */
- break;
-
- /* find run */
- r = s;
- while (s < e && *s != *t)
- *t++ = *s++;
-
- /* and update */
- sed156x_output_at(r - b, i, r, s - r);
-
- } while (s < e);
-
- b += COLS;
- }
-
- /* set cursor */
- if (cp) {
- last_visible_curs_ptr = cp;
- i = last_visible_curs_ptr - last_visible_buf;
- sed156x_reverse_at(i % width, i / width, 1);
- last_visible_curs_rev = 0;
- } else {
- last_visible_curs_ptr = NULL;
- }
-
- last_input_mode = input_mode;
- last_fast_punct = fast_punct;
-}
-
-/* ensure visibility; the trick is to minimize the screen movement */
-static void ensure_visible(int col, int row, int dx, int dy)
-{
- int x1, y1, x2, y2, a1, b1, a2, b2;
-
- /* clamp visible region */
- if (col < 0) {
- dx -= col;
- col = 0;
- if (dx <= 0)
- dx = 1;
- }
-
- if (row < 0) {
- dy -= row;
- row = 0;
- if (dy <= 0)
- dy = 1;
- }
-
- if (col + dx > COLS)
- dx = COLS - col;
-
- if (row + dy > ROWS)
- dy = ROWS - row;
-
-
- /* move to easier to use vars */
- x1 = disp_col; y1 = disp_row;
- x2 = x1 + width; y2 = y1 + height;
- a1 = col; b1 = row;
- a2 = a1 + dx; b2 = b1 + dy;
-
- /* printf("(%d,%d) - (%d,%d) : (%d, %d) - (%d, %d)\n", x1, y1, x2, y2, a1, b1, a2, b2); */
-
- if (a2 > x2) {
- /* move to the right */
- x2 = a2;
- x1 = x2 - width;
- if (x1 < 0) {
- x1 = 0;
- x2 = width;
- }
- } else if (a1 < x1) {
- /* move to the left */
- x1 = a1;
- x2 = x1 + width;
- if (x2 > COLS) {
- x2 = COLS;
- x1 = x2 - width;
- }
- }
-
- if (b2 > y2) {
- /* move down */
- y2 = b2;
- y1 = y2 - height;
- if (y1 < 0) {
- y1 = 0;
- y2 = height;
- }
- } else if (b1 < y1) {
- /* move up */
- y1 = b1;
- y2 = y1 + width;
- if (y2 > ROWS) {
- y2 = ROWS;
- y1 = y2 - height;
- }
- }
-
- /* printf("(%d,%d) - (%d,%d) : (%d, %d) - (%d, %d)\n", x1, y1, x2, y2, a1, b1, a2, b2); */
-
- /* no movement? */
- if (disp_col == x1 && disp_row == y1)
- return;
-
- disp_col = x1;
- disp_row = y1;
-}
-
-/**************************************************************************************/
-
-static void newline(void)
-{
- curs_col = 0;
- if (curs_row + 1 < ROWS)
- curs_row++;
- else {
- memmove(vty_buf, vty_buf + COLS, COLS * (ROWS - 1));
- memset(vty_buf + (ROWS - 1) * COLS, ' ', COLS);
- }
-}
-
-void phone_putc(const char c)
-{
- int i;
-
- if (input_mode != -1) {
- input_selected_char = -1;
- terminate_input();
- }
-
- curs_disabled = 1;
- update();
-
- blink_time = BLINK_HZ;
-
- switch (c) {
- case '\a': /* ignore bell */
- case '\r': /* ignore carriage return */
- break;
-
- case '\n': /* next line */
- newline();
- ensure_visible(curs_col, curs_row, 1, 1);
- break;
-
- case 9: /* tab 8 */
- /* move to tab */
- i = curs_col;
- i |= 0x0008;
- i &= ~0x0007;
-
- if (i < COLS)
- curs_col = i;
- else
- newline();
-
- ensure_visible(curs_col, curs_row, 1, 1);
- break;
-
- case 8: /* backspace */
- if (curs_col <= 0)
- break;
- curs_col--;
-
- /* make sure that we see a couple of characters before */
- if (curs_col > 4)
- ensure_visible(curs_col - 4, curs_row, 4, 1);
- else
- ensure_visible(curs_col, curs_row, 1, 1);
-
- break;
-
- default: /* draw the char */
- putchar_at_cursor(c);
-
- /*
- * check for newline
- */
- if (curs_col + 1 < COLS)
- curs_col++;
- else
- newline();
-
- ensure_visible(curs_col, curs_row, 1, 1);
-
- break;
- }
-
- curs_disabled = 0;
- blink_time = BLINK_HZ;
- update();
-}
-
-/**************************************************************************************/
-
-static inline unsigned int kp_transfer(unsigned int val)
-{
- unsigned int rx;
- int b;
-
- rx = 0; b = 8;
- while (--b >= 0) {
- KP_SPI_TXD(val & 0x80);
- val <<= 1;
- KP_SPI_CLK_TOGGLE();
- KP_SPI_BIT_DELAY();
- rx <<= 1;
- if (KP_SPI_RXD())
- rx |= 1;
- KP_SPI_CLK_TOGGLE();
- KP_SPI_BIT_DELAY();
- }
-
- return rx;
-}
-
-unsigned int kp_data_transfer(unsigned int val)
-{
- KP_SPI_CLK(1);
- KP_CS(0);
- val = kp_transfer(val);
- KP_CS(1);
-
- return val;
-}
-
-unsigned int kp_get_col_mask(unsigned int row_mask)
-{
- unsigned int val, col_mask;
-
- val = 0x80 | (row_mask & 0x7F);
- (void)kp_data_transfer(val);
-#if CONFIG_NETPHONE_VERSION == 1
- col_mask = kp_data_transfer(val) & 0x0F;
-#elif CONFIG_NETPHONE_VERSION == 2
- col_mask = ((volatile immap_t *)CFG_IMMR)->im_cpm.cp_pedat & 0x0f;
- /* XXX FUCK FUCK FUCK FUCK FUCK!!!! */
- col_mask = ((col_mask & 0x08) >> 3) | /* BKBR1 */
- ((col_mask & 0x04) << 1) | /* BKBR2 */
- (col_mask & 0x02) | /* BKBR3 */
- ((col_mask & 0x01) << 2); /* BKBR4 */
-
-#endif
- /* printf("col_mask(row_mask = 0x%x) -> col_mask = 0x%x\n", row_mask, col_mask); */
-
- return col_mask;
-}
-
-/**************************************************************************************/
-
-static const int kp_scancodes[KP_ROWS * KP_COLS] = {
- KP_F1, KP_F3, KP_F4, KP_F2,
- KP_F6, KP_F8, KP_F9, KP_F7,
- KP_1, KP_3, KP_F11, KP_2,
- KP_4, KP_6, KP_F12, KP_5,
- KP_7, KP_9, KP_F13, KP_8,
- KP_STAR, KP_HASH, KP_F14, KP_0,
- KP_F5, KP_F15, KP_F16, KP_F10,
-};
-
-static const int kp_repeats[KP_ROWS * KP_COLS] = {
- 0, 1, 0, 0,
- 0, 1, 1, 1,
- 1, 1, 0, 1,
- 1, 1, 0, 1,
- 1, 1, 0, 1,
- 1, 1, 0, 1,
- 0, 0, 0, 1,
-};
-
-static int kp_state = SCAN;
-static int kp_last_col_mask;
-static int kp_cur_row, kp_cur_col;
-static int kp_scancode;
-static int kp_stable;
-static int kp_repeat;
-static int kp_repeat_time;
-static int kp_force_time;
-static int kp_idle_time;
-
-static void kp_do_poll(void)
-{
- unsigned int col_mask;
- int col;
-
- switch (kp_state) {
- case SCAN:
- if (kp_idle_time > 0) {
- kp_idle_time -= PHONE_CONSOLE_POLL_HZ;
- if (kp_idle_time <= 0)
- scancode_action(KP_IDLE);
- }
-
- col_mask = kp_get_col_mask(KP_ROWS_MASK);
- if (col_mask == KP_COLS_MASK)
- break; /* nothing */
- kp_last_col_mask = col_mask;
- kp_stable = 0;
- kp_state = SCAN_FILTER;
- break;
-
- case SCAN_FILTER:
- col_mask = kp_get_col_mask(KP_ROWS_MASK);
- if (col_mask != kp_last_col_mask) {
- kp_state = SCAN;
- break;
- }
-
- kp_stable += PHONE_CONSOLE_POLL_HZ;
- if (kp_stable < KP_STABLE_HZ)
- break;
-
- kp_cur_row = 0;
- kp_stable = 0;
- kp_state = SCAN_COL;
-
- (void)kp_get_col_mask(1 << kp_cur_row);
- break;
-
- case SCAN_COL:
- col_mask = kp_get_col_mask(1 << kp_cur_row);
- if (col_mask == KP_COLS_MASK) {
- if (++kp_cur_row >= KP_ROWS) {
- kp_state = SCAN;
- break;
- }
- kp_get_col_mask(1 << kp_cur_row);
- break;
- }
- kp_last_col_mask = col_mask;
- kp_stable = 0;
- kp_state = SCAN_COL_FILTER;
- break;
-
- case SCAN_COL_FILTER:
- col_mask = kp_get_col_mask(1 << kp_cur_row);
- if (col_mask != kp_last_col_mask || col_mask == KP_COLS_MASK) {
- kp_state = SCAN;
- break;
- }
-
- kp_stable += PHONE_CONSOLE_POLL_HZ;
- if (kp_stable < KP_STABLE_HZ)
- break;
-
- for (col = 0; col < KP_COLS; col++)
- if ((col_mask & (1 << col)) == 0)
- break;
- kp_cur_col = col;
- kp_state = PRESSED;
- kp_scancode = kp_scancodes[kp_cur_row * KP_COLS + kp_cur_col];
- kp_repeat = kp_repeats[kp_cur_row * KP_COLS + kp_cur_col];
-
- if (kp_repeat)
- kp_repeat_time = KP_REPEAT_DELAY_HZ;
- kp_force_time = KP_FORCE_DELAY_HZ;
-
- scancode_action(kp_scancode);
-
- break;
-
- case PRESSED:
- col_mask = kp_get_col_mask(1 << kp_cur_row);
- if (col_mask != kp_last_col_mask) {
- kp_state = SCAN;
- scancode_action(KP_RELEASE);
- kp_idle_time = KP_IDLE_DELAY_HZ;
- break;
- }
-
- if (kp_repeat) {
- kp_repeat_time -= PHONE_CONSOLE_POLL_HZ;
- if (kp_repeat_time <= 0) {
- kp_repeat_time += KP_REPEAT_HZ;
- scancode_action(kp_scancode);
- }
- }
-
- if (kp_force_time > 0) {
- kp_force_time -= PHONE_CONSOLE_POLL_HZ;
- if (kp_force_time <= 0)
- scancode_action(KP_FORCE);
- }
-
- break;
- }
-}
-
-/**************************************************************************************/
-
-int drv_phone_is_idle(void)
-{
- return kp_state == SCAN;
-}
diff --git a/board/netphone/u-boot.lds b/board/netphone/u-boot.lds
deleted file mode 100644
index 9f2901c869..0000000000
--- a/board/netphone/u-boot.lds
+++ /dev/null
@@ -1,141 +0,0 @@
-/*
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc8xx/start.o (.text)
- cpu/mpc8xx/traps.o (.text)
- common/dlmalloc.o (.text)
- lib_ppc/ppcstring.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
- lib_generic/zlib.o (.text)
- lib_ppc/cache.o (.text)
- lib_ppc/time.o (.text)
-
- . = DEFINED(env_offset) ? env_offset : .;
- common/environment.o (.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/netphone/u-boot.lds.debug b/board/netphone/u-boot.lds.debug
deleted file mode 100644
index 004e7fd354..0000000000
--- a/board/netphone/u-boot.lds.debug
+++ /dev/null
@@ -1,137 +0,0 @@
-/*
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc8xx/start.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
-
- . = env_offset;
- common/environment.o(.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/netta/Makefile b/board/netta/Makefile
deleted file mode 100644
index 68e24027a4..0000000000
--- a/board/netta/Makefile
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# (C) Copyright 2000-2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o dsp.o codec.o
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/netta/codec.c b/board/netta/codec.c
deleted file mode 100644
index 01ab14bc52..0000000000
--- a/board/netta/codec.c
+++ /dev/null
@@ -1,1484 +0,0 @@
-/*
- * CODEC
- */
-
-#include <common.h>
-#include <post.h>
-
-#include "mpc8xx.h"
-
-/***********************************************/
-
-#define MAX_DUSLIC 4
-
-#define NUM_CHANNELS 2
-#define MAX_SLICS (MAX_DUSLIC * NUM_CHANNELS)
-
-/***********************************************/
-
-#define SOP_READ_CH_0 0xC4 /* Read SOP Register for Channel A */
-#define SOP_READ_CH_1 0xCC /* Read SOP Register for Channel B */
-#define SOP_WRITE_CH_0 0x44 /* Write SOP Register for Channel A */
-#define SOP_WRITE_CH_1 0x4C /* Write SOP Register for Channel B */
-
-#define COP_READ_CH_0 0xC5
-#define COP_READ_CH_1 0xCD
-#define COP_WRITE_CH_0 0x45
-#define COP_WRITE_CH_1 0x4D
-
-#define POP_READ_CH_0 0xC6
-#define POP_READ_CH_1 0xCE
-#define POP_WRITE_CH_0 0x46
-#define POP_WRITE_CH_1 0x4E
-
-#define RST_CMD_DUSLIC_CHIP 0x40 /* OR 0x48 */
-#define RST_CMD_DUSLIC_CH_A 0x41
-#define RST_CMD_DUSLIC_CH_B 0x49
-
-#define PCM_RESYNC_CMD_CH_A 0x42
-#define PCM_RESYNC_CMD_CH_B 0x4A
-
-#define ACTIVE_HOOK_LEV_4 0
-#define ACTIVE_HOOK_LEV_12 1
-
-#define SLIC_P_NORMAL 0x01
-
-/************************************************/
-
-#define CODSP_WR 0x00
-#define CODSP_RD 0x80
-#define CODSP_OP 0x40
-#define CODSP_ADR(x) (((unsigned char)(x) & 7) << 3)
-#define CODSP_M(x) ((unsigned char)(x) & 7)
-#define CODSP_CMD(x) ((unsigned char)(x) & 7)
-
-/************************************************/
-
-/* command indication ops */
-#define CODSP_M_SLEEP_PWRDN 7
-#define CODSP_M_PWRDN_HIZ 0
-#define CODSP_M_ANY_ACT 2
-#define CODSP_M_RING 5
-#define CODSP_M_ACT_MET 6
-#define CODSP_M_GND_START 4
-#define CODSP_M_RING_PAUSE 1
-
-/* single byte commands */
-#define CODSP_CMD_SOFT_RESET CODSP_CMD(0)
-#define CODSP_CMD_RESET_CH CODSP_CMD(1)
-#define CODSP_CMD_RESYNC CODSP_CMD(2)
-
-/* two byte commands */
-#define CODSP_CMD_SOP CODSP_CMD(4)
-#define CODSP_CMD_COP CODSP_CMD(5)
-#define CODSP_CMD_POP CODSP_CMD(6)
-
-/************************************************/
-
-/* read as 4-bytes */
-#define CODSP_INTREG_INT_CH 0x80000000
-#define CODSP_INTREG_HOOK 0x40000000
-#define CODSP_INTREG_GNDK 0x20000000
-#define CODSP_INTREG_GNDP 0x10000000
-#define CODSP_INTREG_ICON 0x08000000
-#define CODSP_INTREG_VRTLIM 0x04000000
-#define CODSP_INTREG_OTEMP 0x02000000
-#define CODSP_INTREG_SYNC_FAIL 0x01000000
-#define CODSP_INTREG_LM_THRES 0x00800000
-#define CODSP_INTREG_READY 0x00400000
-#define CODSP_INTREG_RSTAT 0x00200000
-#define CODSP_INTREG_LM_OK 0x00100000
-#define CODSP_INTREG_IO4_DU 0x00080000
-#define CODSP_INTREG_IO3_DU 0x00040000
-#define CODSP_INTREG_IO2_DU 0x00020000
-#define CODSP_INTREG_IO1_DU 0x00010000
-#define CODSP_INTREG_DTMF_OK 0x00008000
-#define CODSP_INTREG_DTMF_KEY4 0x00004000
-#define CODSP_INTREG_DTMF_KEY3 0x00002000
-#define CODSP_INTREG_DTMF_KEY2 0x00001000
-#define CODSP_INTREG_DTMF_KEY1 0x00000800
-#define CODSP_INTREG_DTMF_KEY0 0x00000400
-#define CODSP_INTREG_UTDR_OK 0x00000200
-#define CODSP_INTREG_UTDX_OK 0x00000100
-#define CODSP_INTREG_EDSP_FAIL 0x00000080
-#define CODSP_INTREG_CIS_BOF 0x00000008
-#define CODSP_INTREG_CIS_BUF 0x00000004
-#define CODSP_INTREG_CIS_REQ 0x00000002
-#define CODSP_INTREG_CIS_ACT 0x00000001
-
-/************************************************/
-
-/* ======== SOP REG ADDRESSES =======*/
-
-#define REVISION_ADDR 0x00
-#define PCMC1_ADDR 0x05
-#define XCR_ADDR 0x06
-#define INTREG1_ADDR 0x07
-#define INTREG2_ADDR 0x08
-#define INTREG3_ADDR 0x09
-#define INTREG4_ADDR 0x0A
-#define LMRES1_ADDR 0x0D
-#define MASK_ADDR 0x11
-#define IOCTL3_ADDR 0x14
-#define BCR1_ADDR 0x15
-#define BCR2_ADDR 0x16
-#define BCR3_ADDR 0x17
-#define BCR4_ADDR 0x18
-#define BCR5_ADDR 0x19
-#define DSCR_ADDR 0x1A
-#define LMCR1_ADDR 0x1C
-#define LMCR2_ADDR 0x1D
-#define LMCR3_ADDR 0x1E
-#define OFR1_ADDR 0x1F
-#define PCMR1_ADDR 0x21
-#define PCMX1_ADDR 0x25
-#define TSTR3_ADDR 0x2B
-#define TSTR4_ADDR 0x2C
-#define TSTR5_ADDR 0x2D
-
-/* ========= POP REG ADDRESSES ========*/
-
-#define CIS_DAT_ADDR 0x00
-
-#define LEC_LEN_ADDR 0x3A
-#define LEC_POWR_ADDR 0x3B
-#define LEC_DELP_ADDR 0x3C
-#define LEC_DELQ_ADDR 0x3D
-#define LEC_GAIN_XI_ADDR 0x3E
-#define LEC_GAIN_RI_ADDR 0x3F
-#define LEC_GAIN_XO_ADDR 0x40
-#define LEC_RES_1_ADDR 0x41
-#define LEC_RES_2_ADDR 0x42
-
-#define NLP_POW_LPF_ADDR 0x30
-#define NLP_POW_LPS_ADDR 0x31
-#define NLP_BN_LEV_X_ADDR 0x32
-#define NLP_BN_LEV_R_ADDR 0x33
-#define NLP_BN_INC_ADDR 0x34
-#define NLP_BN_DEC_ADDR 0x35
-#define NLP_BN_MAX_ADDR 0x36
-#define NLP_BN_ADJ_ADDR 0x37
-#define NLP_RE_MIN_ERLL_ADDR 0x38
-#define NLP_RE_EST_ERLL_ADDR 0x39
-#define NLP_SD_LEV_X_ADDR 0x3A
-#define NLP_SD_LEV_R_ADDR 0x3B
-#define NLP_SD_LEV_BN_ADDR 0x3C
-#define NLP_SD_LEV_RE_ADDR 0x3D
-#define NLP_SD_OT_DT_ADDR 0x3E
-#define NLP_ERL_LIN_LP_ADDR 0x3F
-#define NLP_ERL_LEC_LP_ADDR 0x40
-#define NLP_CT_LEV_RE_ADDR 0x41
-#define NLP_CTRL_ADDR 0x42
-
-#define UTD_CF_H_ADDR 0x4B
-#define UTD_CF_L_ADDR 0x4C
-#define UTD_BW_H_ADDR 0x4D
-#define UTD_BW_L_ADDR 0x4E
-#define UTD_NLEV_ADDR 0x4F
-#define UTD_SLEV_H_ADDR 0x50
-#define UTD_SLEV_L_ADDR 0x51
-#define UTD_DELT_ADDR 0x52
-#define UTD_RBRK_ADDR 0x53
-#define UTD_RTIME_ADDR 0x54
-#define UTD_EBRK_ADDR 0x55
-#define UTD_ETIME_ADDR 0x56
-
-#define DTMF_LEV_ADDR 0x30
-#define DTMF_TWI_ADDR 0x31
-#define DTMF_NCF_H_ADDR 0x32
-#define DTMF_NCF_L_ADDR 0x33
-#define DTMF_NBW_H_ADDR 0x34
-#define DTMF_NBW_L_ADDR 0x35
-#define DTMF_GAIN_ADDR 0x36
-#define DTMF_RES1_ADDR 0x37
-#define DTMF_RES2_ADDR 0x38
-#define DTMF_RES3_ADDR 0x39
-
-#define CIS_LEV_H_ADDR 0x43
-#define CIS_LEV_L_ADDR 0x44
-#define CIS_BRS_ADDR 0x45
-#define CIS_SEIZ_H_ADDR 0x46
-#define CIS_SEIZ_L_ADDR 0x47
-#define CIS_MARK_H_ADDR 0x48
-#define CIS_MARK_L_ADDR 0x49
-#define CIS_LEC_MODE_ADDR 0x4A
-
-/*=====================================*/
-
-#define HOOK_LEV_ACT_START_ADDR 0x89
-#define RO1_START_ADDR 0x70
-#define RO2_START_ADDR 0x95
-#define RO3_START_ADDR 0x96
-
-#define TG1_FREQ_START_ADDR 0x38
-#define TG1_GAIN_START_ADDR 0x39
-#define TG1_BANDPASS_START_ADDR 0x3B
-#define TG1_BANDPASS_END_ADDR 0x3D
-
-#define TG2_FREQ_START_ADDR 0x40
-#define TG2_GAIN_START_ADDR 0x41
-#define TG2_BANDPASS_START_ADDR 0x43
-#define TG2_BANDPASS_END_ADDR 0x45
-
-/*====================================*/
-
-#define PCM_HW_B 0x80
-#define PCM_HW_A 0x00
-#define PCM_TIME_SLOT_0 0x00 /* Byte 0 of PCM Frame (by default is assigned to channel A ) */
-#define PCM_TIME_SLOT_1 0x01 /* Byte 1 of PCM Frame (by default is assigned to channel B ) */
-#define PCM_TIME_SLOT_4 0x04 /* Byte 4 of PCM Frame (Corresponds to B1 of the Second GCI ) */
-
-#define RX_LEV_ADDR 0x28
-#define TX_LEV_ADDR 0x30
-#define Ik1_ADDR 0x83
-
-#define AR_ROW 3 /* Is the row (AR Params) of the ac_Coeff array in SMS_CODEC_Defaults struct */
-#define AX_ROW 6 /* Is the row (AX Params) of the ac_Coeff array in SMS_CODEC_Defaults struct */
-#define DCF_ROW 0 /* Is the row (DCF Params) of the dc_Coeff array in SMS_CODEC_Defaults struct */
-
-/* Mark the start byte of Duslic parameters that we use with configurator */
-#define Ik1_START_BYTE 3
-#define RX_LEV_START_BYTE 0
-#define TX_LEV_START_BYTE 0
-
-/************************************************/
-
-#define INTREG4_CIS_ACT (1 << 0)
-
-#define BCR1_SLEEP 0x20
-#define BCR1_REVPOL 0x10
-#define BCR1_ACTR 0x08
-#define BCR1_ACTL 0x04
-#define BCR1_SLIC_MASK 0x03
-
-#define BCR2_HARD_POL_REV 0x40
-#define BCR2_TTX 0x20
-#define BCR2_TTX_12K 0x10
-#define BCR2_HIMAN 0x08
-#define BCR2_PDOT 0x01
-
-#define BCR3_PCMX_EN (1 << 4)
-
-#define BCR5_DTMF_EN (1 << 0)
-#define BCR5_DTMF_SRC (1 << 1)
-#define BCR5_LEC_EN (1 << 2)
-#define BCR5_LEC_OUT (1 << 3)
-#define BCR5_CIS_EN (1 << 4)
-#define BCR5_CIS_AUTO (1 << 5)
-#define BCR5_UTDX_EN (1 << 6)
-#define BCR5_UTDR_EN (1 << 7)
-
-#define DSCR_TG1_EN (1 << 0)
-#define DSCR_TG2_EN (1 << 1)
-#define DSCR_PTG (1 << 2)
-#define DSCR_COR8 (1 << 3)
-#define DSCR_DG_KEY(x) (((x) & 0x0F) << 4)
-
-#define CIS_LEC_MODE_CIS_V23 (1 << 0)
-#define CIS_LEC_MODE_CIS_FRM (1 << 1)
-#define CIS_LEC_MODE_NLP_EN (1 << 2)
-#define CIS_LEC_MODE_UTDR_SUM (1 << 4)
-#define CIS_LEC_MODE_UTDX_SUM (1 << 5)
-#define CIS_LEC_MODE_LEC_FREEZE (1 << 6)
-#define CIS_LEC_MODE_LEC_ADAPT (1 << 7)
-
-#define TSTR4_COR_64 (1 << 5)
-
-#define TSTR3_AC_DLB_8K (1 << 2)
-#define TSTR3_AC_DLB_32K (1 << 3)
-#define TSTR3_AC_DLB_4M (1 << 5)
-
-
-#define LMCR1_TEST_EN (1 << 7)
-#define LMCR1_LM_EN (1 << 6)
-#define LMCR1_LM_THM (1 << 5)
-#define LMCR1_LM_ONCE (1 << 2)
-#define LMCR1_LM_MASK (1 << 1)
-
-#define LMCR2_LM_RECT (1 << 5)
-#define LMCR2_LM_SEL_VDD 0x0D
-#define LMCR2_LM_SEL_IO3 0x0A
-#define LMCR2_LM_SEL_IO4 0x0B
-#define LMCR2_LM_SEL_IO4_MINUS_IO3 0x0F
-
-#define LMCR3_RTR_SEL (1 << 6)
-
-#define LMCR3_RNG_OFFSET_NONE 0x00
-#define LMCR3_RNG_OFFSET_1 0x01
-#define LMCR3_RNG_OFFSET_2 0x02
-#define LMCR3_RNG_OFFSET_3 0x03
-
-#define TSTR5_DC_HOLD (1 << 3)
-
-/************************************************/
-
-#define TARGET_ONHOOK_BATH_x100 4600 /* 46.0 Volt */
-#define TARGET_ONHOOK_BATL_x100 2500 /* 25.0 Volt */
-#define TARGET_V_DIVIDER_RATIO_x100 21376L /* (R1+R2)/R2 = 213.76 */
-#define DIVIDER_RATIO_ACCURx100 (22 * 100)
-#define V_AD_x10000 10834L /* VAD = 1.0834 */
-#define TARGET_VDDx100 330 /* VDD = 3.3 * 10 */
-#define VDD_MAX_DIFFx100 20 /* VDD Accur = 0.2*100 */
-
-#define RMS_MULTIPLIERx100 111 /* pi/(2xsqrt(2)) = 1.11*/
-#define K_INTDC_RECT_ON 4 /* When Rectifier is ON this value is necessary(2^4) */
-#define K_INTDC_RECT_OFF 2 /* 2^2 */
-#define RNG_FREQ 25
-#define SAMPLING_FREQ (2000L)
-#define N_SAMPLES (SAMPLING_FREQ/RNG_FREQ) /* for Ring Freq =25Hz (40ms Integration Period)[Sampling rate 2KHz -->1 Sample every 500us] */
-#define HOOK_THRESH_RING_START_ADDR 0x8B
-#define RING_PARAMS_START_ADDR 0x70
-
-#define V_OUT_BATH_MAX_DIFFx100 300 /* 3.0 x100 */
-#define V_OUT_BATL_MAX_DIFFx100 400 /* 4.0 x100 */
-#define MAX_V_RING_MEANx100 50
-#define TARGET_V_RING_RMSx100 2720
-#define V_RMS_RING_MAX_DIFFx100 250
-
-#define LM_OK_SRC_IRG_2 (1 << 4)
-
-/************************************************/
-
-#define PORTB (((volatile immap_t *)CFG_IMMR)->im_cpm.cp_pbdat)
-#define PORTC (((volatile immap_t *)CFG_IMMR)->im_ioport.iop_pcdat)
-#define PORTD (((volatile immap_t *)CFG_IMMR)->im_ioport.iop_pddat)
-
-#define _PORTD_SET(mask, state) \
- do { \
- if (state) \
- PORTD |= mask; \
- else \
- PORTD &= ~mask; \
- } while (0)
-
-#define _PORTB_SET(mask, state) \
- do { \
- if (state) \
- PORTB |= mask; \
- else \
- PORTB &= ~mask; \
- } while (0)
-
-#define _PORTB_TGL(mask) do { PORTB ^= mask; } while (0)
-#define _PORTB_GET(mask) (!!(PORTB & mask))
-
-#define _PORTC_GET(mask) (!!(PORTC & mask))
-
-/* port B */
-#define SPI_RXD (1 << (31 - 28))
-#define SPI_TXD (1 << (31 - 29))
-#define SPI_CLK (1 << (31 - 30))
-
-/* port C */
-#define COM_HOOK1 (1 << (15 - 9))
-#define COM_HOOK2 (1 << (15 - 10))
-
-#ifndef CONFIG_NETTA_SWAPHOOK
-
-#define COM_HOOK3 (1 << (15 - 11))
-#define COM_HOOK4 (1 << (15 - 12))
-
-#else
-
-#define COM_HOOK3 (1 << (15 - 12))
-#define COM_HOOK4 (1 << (15 - 11))
-
-#endif
-
-/* port D */
-#define SPIENC1 (1 << (15 - 9))
-#define SPIENC2 (1 << (15 - 10))
-#define SPIENC3 (1 << (15 - 11))
-#define SPIENC4 (1 << (15 - 14))
-
-#define SPI_DELAY() udelay(1)
-
-static inline unsigned int __SPI_Transfer(unsigned int tx)
-{
- unsigned int rx;
- int b;
-
- rx = 0; b = 8;
- while (--b >= 0) {
- _PORTB_SET(SPI_TXD, tx & 0x80);
- tx <<= 1;
- _PORTB_TGL(SPI_CLK);
- SPI_DELAY();
- rx <<= 1;
- rx |= _PORTB_GET(SPI_RXD);
- _PORTB_TGL(SPI_CLK);
- SPI_DELAY();
- }
-
- return rx;
-}
-
-static const char *codsp_dtmf_map = "D1234567890*#ABC";
-
-static const int spienc_mask_tab[4] = { SPIENC1, SPIENC2, SPIENC3, SPIENC4 };
-static const int com_hook_mask_tab[4] = { COM_HOOK1, COM_HOOK2, COM_HOOK3, COM_HOOK4 };
-
-static unsigned int codsp_send(int duslic_id, const unsigned char *cmd, int cmdlen, unsigned char *res, int reslen)
-{
- unsigned int rx;
- int i;
-
- /* just some sanity checks */
- if (cmd == 0 || cmdlen < 0)
- return -1;
-
- _PORTD_SET(spienc_mask_tab[duslic_id], 0);
-
- /* first 2 bytes are without response */
- i = 2;
- while (i-- > 0 && cmdlen-- > 0)
- __SPI_Transfer(*cmd++);
-
- while (cmdlen-- > 0) {
- rx = __SPI_Transfer(*cmd++);
- if (res != 0 && reslen-- > 0)
- *res++ = (unsigned char)rx;
- }
- if (res != 0) {
- while (reslen-- > 0)
- *res++ = __SPI_Transfer(0xFF);
- }
-
- _PORTD_SET(spienc_mask_tab[duslic_id], 1);
-
- return 0;
-}
-
-/****************************************************************************/
-
-void codsp_set_ciop_m(int duslic_id, int channel, unsigned char m)
-{
- unsigned char cmd = CODSP_WR | CODSP_ADR(channel) | CODSP_M(m);
- codsp_send(duslic_id, &cmd, 1, 0, 0);
-}
-
-void codsp_reset_chip(int duslic_id)
-{
- static const unsigned char cmd = CODSP_WR | CODSP_OP | CODSP_CMD_SOFT_RESET;
- codsp_send(duslic_id, &cmd, 1, 0, 0);
-}
-
-void codsp_reset_channel(int duslic_id, int channel)
-{
- unsigned char cmd = CODSP_WR | CODSP_OP | CODSP_ADR(channel) | CODSP_CMD_RESET_CH;
- codsp_send(duslic_id, &cmd, 1, 0, 0);
-}
-
-void codsp_resync_channel(int duslic_id, int channel)
-{
- unsigned char cmd = CODSP_WR | CODSP_OP | CODSP_ADR(channel) | CODSP_CMD_RESYNC;
- codsp_send(duslic_id, &cmd, 1, 0, 0);
-}
-
-/****************************************************************************/
-
-void codsp_write_sop_char(int duslic_id, int channel, unsigned char regno, unsigned char val)
-{
- unsigned char cmd[3];
-
- cmd[0] = CODSP_WR | CODSP_OP | CODSP_ADR(channel) | CODSP_CMD_SOP;
- cmd[1] = regno;
- cmd[2] = val;
-
- codsp_send(duslic_id, cmd, 3, 0, 0);
-}
-
-void codsp_write_sop_short(int duslic_id, int channel, unsigned char regno, unsigned short val)
-{
- unsigned char cmd[4];
-
- cmd[0] = CODSP_WR | CODSP_OP | CODSP_ADR(channel) | CODSP_CMD_SOP;
- cmd[1] = regno;
- cmd[2] = (unsigned char)(val >> 8);
- cmd[3] = (unsigned char)val;
-
- codsp_send(duslic_id, cmd, 4, 0, 0);
-}
-
-void codsp_write_sop_int(int duslic_id, int channel, unsigned char regno, unsigned int val)
-{
- unsigned char cmd[5];
-
- cmd[0] = CODSP_WR | CODSP_ADR(channel) | CODSP_CMD_SOP;
- cmd[1] = regno;
- cmd[2] = (unsigned char)(val >> 24);
- cmd[3] = (unsigned char)(val >> 16);
- cmd[4] = (unsigned char)(val >> 8);
- cmd[5] = (unsigned char)val;
-
- codsp_send(duslic_id, cmd, 6, 0, 0);
-}
-
-unsigned char codsp_read_sop_char(int duslic_id, int channel, unsigned char regno)
-{
- unsigned char cmd[3];
- unsigned char res[2];
-
- cmd[0] = CODSP_RD | CODSP_OP | CODSP_ADR(channel) | CODSP_CMD_SOP;
- cmd[1] = regno;
-
- codsp_send(duslic_id, cmd, 2, res, 2);
-
- return res[1];
-}
-
-unsigned short codsp_read_sop_short(int duslic_id, int channel, unsigned char regno)
-{
- unsigned char cmd[2];
- unsigned char res[3];
-
- cmd[0] = CODSP_RD | CODSP_OP | CODSP_ADR(channel) | CODSP_CMD_SOP;
- cmd[1] = regno;
-
- codsp_send(duslic_id, cmd, 2, res, 3);
-
- return ((unsigned short)res[1] << 8) | res[2];
-}
-
-unsigned int codsp_read_sop_int(int duslic_id, int channel, unsigned char regno)
-{
- unsigned char cmd[2];
- unsigned char res[5];
-
- cmd[0] = CODSP_RD | CODSP_OP | CODSP_ADR(channel) | CODSP_CMD_SOP;
- cmd[1] = regno;
-
- codsp_send(duslic_id, cmd, 2, res, 5);
-
- return ((unsigned int)res[1] << 24) | ((unsigned int)res[2] << 16) | ((unsigned int)res[3] << 8) | res[4];
-}
-
-/****************************************************************************/
-
-void codsp_write_cop_block(int duslic_id, int channel, unsigned char addr, const unsigned char *block)
-{
- unsigned char cmd[10];
-
- cmd[0] = CODSP_WR | CODSP_OP | CODSP_ADR(channel) | CODSP_CMD_COP;
- cmd[1] = addr;
- memcpy(cmd + 2, block, 8);
- codsp_send(duslic_id, cmd, 10, 0, 0);
-}
-
-void codsp_write_cop_char(int duslic_id, int channel, unsigned char addr, unsigned char val)
-{
- unsigned char cmd[3];
-
- cmd[0] = CODSP_WR | CODSP_OP | CODSP_ADR(channel) | CODSP_CMD_COP;
- cmd[1] = addr;
- cmd[2] = val;
- codsp_send(duslic_id, cmd, 3, 0, 0);
-}
-
-void codsp_write_cop_short(int duslic_id, int channel, unsigned char addr, unsigned short val)
-{
- unsigned char cmd[3];
-
- cmd[0] = CODSP_WR | CODSP_OP | CODSP_ADR(channel) | CODSP_CMD_COP;
- cmd[1] = addr;
- cmd[2] = (unsigned char)(val >> 8);
- cmd[3] = (unsigned char)val;
-
- codsp_send(duslic_id, cmd, 4, 0, 0);
-}
-
-void codsp_read_cop_block(int duslic_id, int channel, unsigned char addr, unsigned char *block)
-{
- unsigned char cmd[2];
- unsigned char res[9];
-
- cmd[0] = CODSP_RD | CODSP_OP | CODSP_ADR(channel) | CODSP_CMD_COP;
- cmd[1] = addr;
- codsp_send(duslic_id, cmd, 2, res, 9);
- memcpy(block, res + 1, 8);
-}
-
-unsigned char codsp_read_cop_char(int duslic_id, int channel, unsigned char addr)
-{
- unsigned char cmd[2];
- unsigned char res[2];
-
- cmd[0] = CODSP_RD | CODSP_OP | CODSP_ADR(channel) | CODSP_CMD_COP;
- cmd[1] = addr;
- codsp_send(duslic_id, cmd, 2, res, 2);
- return res[1];
-}
-
-unsigned short codsp_read_cop_short(int duslic_id, int channel, unsigned char addr)
-{
- unsigned char cmd[2];
- unsigned char res[3];
-
- cmd[0] = CODSP_RD | CODSP_OP | CODSP_ADR(channel) | CODSP_CMD_COP;
- cmd[1] = addr;
-
- codsp_send(duslic_id, cmd, 2, res, 3);
-
- return ((unsigned short)res[1] << 8) | res[2];
-}
-
-/****************************************************************************/
-
-#define MAX_POP_BLOCK 50
-
-void codsp_write_pop_block (int duslic_id, int channel, unsigned char addr,
- const unsigned char *block, int len)
-{
- unsigned char cmd[2 + MAX_POP_BLOCK];
-
- if (len > MAX_POP_BLOCK) /* truncate */
- len = MAX_POP_BLOCK;
-
- cmd[0] = CODSP_WR | CODSP_OP | CODSP_ADR (channel) | CODSP_CMD_POP;
- cmd[1] = addr;
- memcpy (cmd + 2, block, len);
- codsp_send (duslic_id, cmd, 2 + len, 0, 0);
-}
-
-void codsp_write_pop_char (int duslic_id, int channel, unsigned char regno,
- unsigned char val)
-{
- unsigned char cmd[3];
-
- cmd[0] = CODSP_WR | CODSP_OP | CODSP_ADR (channel) | CODSP_CMD_POP;
- cmd[1] = regno;
- cmd[2] = val;
-
- codsp_send (duslic_id, cmd, 3, 0, 0);
-}
-
-void codsp_write_pop_short (int duslic_id, int channel, unsigned char regno,
- unsigned short val)
-{
- unsigned char cmd[4];
-
- cmd[0] = CODSP_WR | CODSP_OP | CODSP_ADR (channel) | CODSP_CMD_POP;
- cmd[1] = regno;
- cmd[2] = (unsigned char) (val >> 8);
- cmd[3] = (unsigned char) val;
-
- codsp_send (duslic_id, cmd, 4, 0, 0);
-}
-
-void codsp_write_pop_int (int duslic_id, int channel, unsigned char regno,
- unsigned int val)
-{
- unsigned char cmd[5];
-
- cmd[0] = CODSP_WR | CODSP_ADR (channel) | CODSP_CMD_POP;
- cmd[1] = regno;
- cmd[2] = (unsigned char) (val >> 24);
- cmd[3] = (unsigned char) (val >> 16);
- cmd[4] = (unsigned char) (val >> 8);
- cmd[5] = (unsigned char) val;
-
- codsp_send (duslic_id, cmd, 6, 0, 0);
-}
-
-unsigned char codsp_read_pop_char (int duslic_id, int channel,
- unsigned char regno)
-{
- unsigned char cmd[3];
- unsigned char res[2];
-
- cmd[0] = CODSP_RD | CODSP_OP | CODSP_ADR (channel) | CODSP_CMD_POP;
- cmd[1] = regno;
-
- codsp_send (duslic_id, cmd, 2, res, 2);
-
- return res[1];
-}
-
-unsigned short codsp_read_pop_short (int duslic_id, int channel,
- unsigned char regno)
-{
- unsigned char cmd[2];
- unsigned char res[3];
-
- cmd[0] = CODSP_RD | CODSP_OP | CODSP_ADR (channel) | CODSP_CMD_POP;
- cmd[1] = regno;
-
- codsp_send (duslic_id, cmd, 2, res, 3);
-
- return ((unsigned short) res[1] << 8) | res[2];
-}
-
-unsigned int codsp_read_pop_int (int duslic_id, int channel,
- unsigned char regno)
-{
- unsigned char cmd[2];
- unsigned char res[5];
-
- cmd[0] = CODSP_RD | CODSP_OP | CODSP_ADR (channel) | CODSP_CMD_POP;
- cmd[1] = regno;
-
- codsp_send (duslic_id, cmd, 2, res, 5);
-
- return (((unsigned int) res[1] << 24) |
- ((unsigned int) res[2] << 16) |
- ((unsigned int) res[3] << 8) |
- res[4] );
-}
-/****************************************************************************/
-
-struct _coeffs {
- unsigned char addr;
- unsigned char values[8];
-};
-
-struct _coeffs ac_coeffs[11] = {
- { 0x60, {0xAD,0xDA,0xB5,0x9B,0xC7,0x2A,0x9D,0x00} }, /* 0x60 IM-Filter part 1 */
- { 0x68, {0x10,0x00,0xA9,0x82,0x0D,0x77,0x0A,0x00} }, /* 0x68 IM-Filter part 2 */
- { 0x18, {0x08,0xC0,0xD2,0xAB,0xA5,0xE2,0xAB,0x07} }, /* 0x18 FRR-Filter */
- { 0x28, {0x44,0x93,0xF5,0x92,0x88,0x00,0x00,0x00} }, /* 0x28 AR-Filter */
- { 0x48, {0x96,0x38,0x29,0x96,0xC9,0x2B,0x8B,0x00} }, /* 0x48 LPR-Filter */
- { 0x20, {0x08,0xB0,0xDA,0x9D,0xA7,0xFA,0x93,0x06} }, /* 0x20 FRX-Filter */
- { 0x30, {0xBA,0xAC,0x00,0x01,0x85,0x50,0xC0,0x1A} }, /* 0x30 AX-Filter */
- { 0x50, {0x96,0x38,0x29,0xF5,0xFA,0x2B,0x8B,0x00} }, /* 0x50 LPX-Filter */
- { 0x00, {0x00,0x08,0x08,0x81,0x00,0x80,0x00,0x08} }, /* 0x00 TH-Filter part 1 */
- { 0x08, {0x81,0x00,0x80,0x00,0xD7,0x33,0xBA,0x01} }, /* 0x08 TH-Filter part 2 */
- { 0x10, {0xB3,0x6C,0xDC,0xA3,0xA4,0xE5,0x88,0x00} } /* 0x10 TH-Filter part 3 */
-};
-
-struct _coeffs ac_coeffs_0dB[11] = {
- { 0x60, {0xAC,0x2A,0xB5,0x9A,0xB7,0x2A,0x9D,0x00} },
- { 0x68, {0x10,0x00,0xA9,0x82,0x0D,0x83,0x0A,0x00} },
- { 0x18, {0x08,0x20,0xD4,0xA4,0x65,0xEE,0x92,0x07} },
- { 0x28, {0x2B,0xAB,0x36,0xA5,0x88,0x00,0x00,0x00} },
- { 0x48, {0xAB,0xE9,0x4E,0x32,0xAB,0x25,0xA5,0x03} },
- { 0x20, {0x08,0x20,0xDB,0x9C,0xA7,0xFA,0xB4,0x07} },
- { 0x30, {0xF3,0x10,0x07,0x60,0x85,0x40,0xC0,0x1A} },
- { 0x50, {0x96,0x38,0x29,0x97,0x39,0x19,0x8B,0x00} },
- { 0x00, {0x00,0x08,0x08,0x81,0x00,0x80,0x00,0x08} },
- { 0x08, {0x81,0x00,0x80,0x00,0x47,0x3C,0xD2,0x01} },
- { 0x10, {0x62,0xDB,0x4A,0x87,0x73,0x28,0x88,0x00} }
-};
-
-struct _coeffs dc_coeffs[9] = {
- { 0x80, {0x25,0x59,0x9C,0x23,0x24,0x23,0x32,0x1C} }, /* 0x80 DC-Parameter */
- { 0x70, {0x90,0x30,0x1B,0xC0,0x33,0x43,0xAC,0x02} }, /* 0x70 Ringing */
- { 0x90, {0x3F,0xC3,0x2E,0x3A,0x80,0x90,0x00,0x09} }, /* 0x90 LP-Filters */
- { 0x88, {0xAF,0x80,0x27,0x7B,0x01,0x4C,0x7B,0x02} }, /* 0x88 Hook Levels */
- { 0x78, {0x00,0xC0,0x6D,0x7A,0xB3,0x78,0x89,0x00} }, /* 0x78 Ramp Generator */
- { 0x58, {0xA5,0x44,0x34,0xDB,0x0E,0xA2,0x2A,0x00} }, /* 0x58 TTX */
- { 0x38, {0x33,0x49,0x9A,0x65,0xBB,0x00,0x00,0x00} }, /* 0x38 TG1 */
- { 0x40, {0x33,0x49,0x9A,0x65,0xBB,0x00,0x00,0x00} }, /* 0x40 TG2 */
- { 0x98, {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00} } /* 0x98 Reserved */
-};
-
-void program_coeffs(int duslic_id, int channel, struct _coeffs *coeffs, int tab_size)
-{
- int i;
-
- for (i = 0; i < tab_size; i++)
- codsp_write_cop_block(duslic_id, channel, coeffs[i].addr, coeffs[i].values);
-}
-
-#define SS_OPEN_CIRCUIT 0
-#define SS_RING_PAUSE 1
-#define SS_ACTIVE 2
-#define SS_ACTIVE_HIGH 3
-#define SS_ACTIVE_RING 4
-#define SS_RINGING 5
-#define SS_ACTIVE_WITH_METERING 6
-#define SS_ONHOOKTRNSM 7
-#define SS_STANDBY 8
-#define SS_MAX 8
-
-static void codsp_set_slic(int duslic_id, int channel, int state)
-{
- unsigned char v;
-
- v = codsp_read_sop_char(duslic_id, channel, BCR1_ADDR);
-
- switch (state) {
-
- case SS_ACTIVE:
- codsp_write_sop_char(duslic_id, channel, BCR1_ADDR, (v & ~BCR1_ACTR) | BCR1_ACTL);
- codsp_set_ciop_m(duslic_id, channel, CODSP_M_ANY_ACT);
- break;
-
- case SS_ACTIVE_HIGH:
- codsp_write_sop_char(duslic_id, channel, BCR1_ADDR, v & ~(BCR1_ACTR | BCR1_ACTL));
- codsp_set_ciop_m(duslic_id, channel, CODSP_M_ANY_ACT);
- break;
-
- case SS_ACTIVE_RING:
- case SS_ONHOOKTRNSM:
- codsp_write_sop_char(duslic_id, channel, BCR1_ADDR, (v & ~BCR1_ACTL) | BCR1_ACTR);
- codsp_set_ciop_m(duslic_id, channel, CODSP_M_ANY_ACT);
- break;
-
- case SS_STANDBY:
- codsp_write_sop_char(duslic_id, channel, BCR1_ADDR, v & ~(BCR1_ACTL | BCR1_ACTR));
- codsp_set_ciop_m(duslic_id, channel, CODSP_M_SLEEP_PWRDN);
- break;
-
- case SS_OPEN_CIRCUIT:
- codsp_set_ciop_m(duslic_id, channel, CODSP_M_PWRDN_HIZ);
- break;
-
- case SS_RINGING:
- codsp_set_ciop_m(duslic_id, channel, CODSP_M_RING);
- break;
-
- case SS_RING_PAUSE:
- codsp_set_ciop_m(duslic_id, channel, CODSP_M_RING_PAUSE);
- break;
- }
-}
-
-const unsigned char Ring_Sin_28Vrms_25Hz[8] = { 0x90, 0x30, 0x1B, 0xC0, 0xC3, 0x9C, 0x88, 0x00 };
-const unsigned char Max_HookRingTh[3] = { 0x7B, 0x41, 0x62 };
-
-void retrieve_slic_state(int slic_id)
-{
- int duslic_id = slic_id >> 1;
- int channel = slic_id & 1;
-
- /* Retrieve the state of the SLICs */
- codsp_write_sop_char(duslic_id, channel, LMCR2_ADDR, 0x00);
-
- /* wait at least 1000us to clear the LM_OK and 500us to set the LM_OK ==> for the LM to make the first Measurement */
- udelay(10000);
-
- codsp_write_sop_char(duslic_id, channel, LMCR1_ADDR, LMCR1_LM_THM | LMCR1_LM_MASK);
- codsp_set_slic(duslic_id, channel, SS_ACTIVE_HIGH);
- codsp_write_sop_char(duslic_id, channel, LMCR3_ADDR, 0x40);
-
- /* Program Default Hook Ring thresholds */
- codsp_write_cop_block(duslic_id, channel, dc_coeffs[1].addr, dc_coeffs[1].values);
-
- /* Now program Hook Threshold while Ring and ac RingTrip to max values */
- codsp_write_cop_block(duslic_id, channel, dc_coeffs[3].addr, dc_coeffs[3].values);
-
- codsp_write_sop_short(duslic_id, channel, OFR1_ADDR, 0x0000);
-
- udelay(40000);
-}
-
-int wait_level_metering_finish(int duslic_id, int channel)
-{
- int cnt;
-
- for (cnt = 0; cnt < 1000 &&
- (codsp_read_sop_char(duslic_id, channel, INTREG2_ADDR) & LM_OK_SRC_IRG_2) == 0; cnt++) { }
-
- return cnt != 1000;
-}
-
-int measure_on_hook_voltages(int slic_id, long *vdd,
- long *v_oh_H, long *v_oh_L, long *ring_mean_v, long *ring_rms_v)
-{
- short LM_Result, Offset_Compensation; /* Signed 16 bit */
- long int VDD, VDD_diff, V_in, V_out, Divider_Ratio, Vout_diff ;
- unsigned char err_mask = 0;
- int duslic_id = slic_id >> 1;
- int channel = slic_id & 1;
- int i;
-
- /* measure VDD */
- /* Now select the VDD level Measurement (but first of all Hold the DC characteristic) */
- codsp_write_sop_char(duslic_id, channel, TSTR5_ADDR, TSTR5_DC_HOLD);
-
- /* Activate Test Mode ==> To Enable DC Hold !!! */
- /* (else the LMRES is treated as Feeding Current and the Feeding voltage changes */
- /* imediatelly (after 500us when the LMRES Registers is updated for the first time after selection of (IO4-IO3) measurement !!!!))*/
- codsp_write_sop_char(duslic_id, channel, LMCR1_ADDR, LMCR1_TEST_EN | LMCR1_LM_THM | LMCR1_LM_MASK);
-
- udelay(40000);
-
- /* Now I Can select what to measure by DC Level Meter (select IO4-IO3) */
- codsp_write_sop_char(duslic_id, channel, LMCR2_ADDR, LMCR2_LM_SEL_VDD);
-
- /* wait at least 1000us to clear the LM_OK and 500us to set the LM_OK ==> for the LM to make the first Measurement */
- udelay(10000);
-
- /* Now Read the LM Result Registers */
- LM_Result = codsp_read_sop_short(duslic_id, channel, LMRES1_ADDR);
- VDD = (-1)*((((long int)LM_Result) * 390L ) >> 15) ; /* VDDx100 */
-
- *vdd = VDD;
-
- VDD_diff = VDD - TARGET_VDDx100;
-
- if (VDD_diff < 0)
- VDD_diff = -VDD_diff;
-
- if (VDD_diff > VDD_MAX_DIFFx100)
- err_mask |= 1;
-
- Divider_Ratio = TARGET_V_DIVIDER_RATIO_x100;
-
- codsp_write_sop_char(duslic_id, channel, LMCR2_ADDR, 0x00);
- codsp_write_sop_char(duslic_id, channel, LMCR1_ADDR, LMCR1_LM_THM | LMCR1_LM_MASK);
-
- codsp_set_slic(duslic_id, channel, SS_ACTIVE_HIGH); /* Go back to ONHOOK Voltage */
-
- udelay(40000);
-
- codsp_write_sop_char(duslic_id, channel,
- LMCR1_ADDR, LMCR1_TEST_EN | LMCR1_LM_THM | LMCR1_LM_MASK);
-
- udelay(40000);
-
- /* Now I Can select what to measure by DC Level Meter (select IO4-IO3) */
- codsp_write_sop_char(duslic_id, channel, LMCR2_ADDR, LMCR2_LM_SEL_IO4_MINUS_IO3);
-
- /* wait at least 1000us to clear the LM_OK and 500us to set the LM_OK ==> for the LM to make the first Measurement */
- udelay(10000);
-
- /* Now Read the LM Result Registers */
- LM_Result = codsp_read_sop_short(duslic_id, channel, LMRES1_ADDR);
- V_in = (-1)* ((((long int)LM_Result) * V_AD_x10000 ) >> 15) ; /* Vin x 10000*/
-
- V_out = (V_in * Divider_Ratio) / 10000L ; /* Vout x100 */
-
- *v_oh_H = V_out;
-
- Vout_diff = V_out - TARGET_ONHOOK_BATH_x100;
-
- if (Vout_diff < 0)
- Vout_diff = -Vout_diff;
-
- if (Vout_diff > V_OUT_BATH_MAX_DIFFx100)
- err_mask |= 2;
-
- codsp_set_slic(duslic_id, channel, SS_ACTIVE); /* Go back to ONHOOK Voltage */
-
- udelay(40000);
-
- /* Now Read the LM Result Registers */
- LM_Result = codsp_read_sop_short(duslic_id, channel, LMRES1_ADDR);
-
- V_in = (-1)* ((((long int)LM_Result) * V_AD_x10000 ) >> 15) ; /* Vin x 10000*/
-
- V_out = (V_in * Divider_Ratio) / 10000L ; /* Vout x100 */
-
- *v_oh_L = V_out;
-
- Vout_diff = V_out - TARGET_ONHOOK_BATL_x100;
-
- if (Vout_diff < 0)
- Vout_diff = -Vout_diff;
-
- if (Vout_diff > V_OUT_BATL_MAX_DIFFx100)
- err_mask |= 4;
-
- /* perform ring tests */
-
- codsp_write_sop_char(duslic_id, channel, LMCR2_ADDR, 0x00);
- codsp_write_sop_char(duslic_id, channel, LMCR1_ADDR, LMCR1_LM_THM | LMCR1_LM_MASK);
-
- udelay(40000);
-
- codsp_write_sop_char(duslic_id, channel, LMCR3_ADDR, LMCR3_RTR_SEL | LMCR3_RNG_OFFSET_NONE);
-
- /* Now program RO1 =0V , Ring Amplitude and frequency and shift factor K = 1 (LMDC=0x0088)*/
- codsp_write_cop_block(duslic_id, channel, RING_PARAMS_START_ADDR, Ring_Sin_28Vrms_25Hz);
-
- /* By Default RO1 is selected when ringing RNG-OFFSET = 00 */
-
- /* Now program Hook Threshold while Ring and ac RingTrip to max values */
- for(i = 0; i < sizeof(Max_HookRingTh); i++)
- codsp_write_cop_char(duslic_id, channel, HOOK_THRESH_RING_START_ADDR + i, Max_HookRingTh[i]);
-
- codsp_write_sop_short(duslic_id, channel, OFR1_ADDR, 0x0000);
-
- codsp_set_slic(duslic_id, channel, SS_RING_PAUSE); /* Start Ringing */
-
- /* select source for the levelmeter to be IO4-IO3 */
- codsp_write_sop_char(duslic_id, channel, LMCR2_ADDR, LMCR2_LM_SEL_IO4_MINUS_IO3);
-
- udelay(40000);
-
- /* Before Enabling Level Meter Programm the apropriate shift factor K_INTDC=(4 if Rectifier Enabled and 2 if Rectifier Disabled) */
- codsp_write_cop_char(duslic_id, channel, RING_PARAMS_START_ADDR + 7, K_INTDC_RECT_OFF);
-
- udelay(10000);
-
- /* Enable LevelMeter to Integrate only once (Rectifier Disabled) */
- codsp_write_sop_char(duslic_id, channel,
- LMCR1_ADDR, LMCR1_LM_THM | LMCR1_LM_MASK | LMCR1_LM_EN | LMCR1_LM_ONCE);
-
- udelay(40000); /* Integration Period == Ring Period = 40ms (for 25Hz Ring) */
-
- if (wait_level_metering_finish(duslic_id, channel)) {
-
- udelay(10000); /* To be sure that Integration Results are Valid wait at least 500us !!! */
-
- /* Now Read the LM Result Registers (Will be valid until LM_EN becomes zero again( after that the Result is updated every 500us) ) */
- Offset_Compensation = codsp_read_sop_short(duslic_id, channel, LMRES1_ADDR);
- Offset_Compensation = (-1) * ((Offset_Compensation * (1 << K_INTDC_RECT_OFF)) / N_SAMPLES);
-
- /* Disable LevelMeter ==> In order to be able to restart Integrator again (for the next integration) */
- codsp_write_sop_char(duslic_id, channel, LMCR1_ADDR, LMCR1_LM_THM | LMCR1_LM_MASK | LMCR1_LM_ONCE);
-
- /* Now programm Integrator Offset Registers !!! */
- codsp_write_sop_short(duslic_id, channel, OFR1_ADDR, Offset_Compensation);
-
- codsp_set_slic(duslic_id, channel, SS_RINGING); /* Start Ringing */
-
- udelay(40000);
-
- /* Reenable Level Meter Integrator (The Result will be valid after Integration Period=Ring Period and until LN_EN become zero again) */
- codsp_write_sop_char(duslic_id, channel,
- LMCR1_ADDR, LMCR1_LM_THM | LMCR1_LM_MASK | LMCR1_LM_EN | LMCR1_LM_ONCE);
-
- udelay(40000); /* Integration Period == Ring Period = 40ms (for 25Hz Ring) */
-
- /* Poll the LM_OK bit to see when Integration Result is Ready */
- if (wait_level_metering_finish(duslic_id, channel)) {
-
- udelay(10000); /* wait at least 500us to be sure that the Integration Result are valid !!! */
-
- /* Now Read the LM Result Registers (They will hold their value until LM_EN become zero again */
- /* ==>After that Result Regs will be updated every 500us !!!) */
- LM_Result = codsp_read_sop_short(duslic_id, channel, LMRES1_ADDR);
- V_in = (-1) * ( ( (((long int)LM_Result) * V_AD_x10000) / N_SAMPLES) >> (15 - K_INTDC_RECT_OFF)) ; /* Vin x 10000*/
-
- V_out = (V_in * Divider_Ratio) / 10000L ; /* Vout x100 */
-
- if (V_out < 0)
- V_out= -V_out;
-
- if (V_out > MAX_V_RING_MEANx100)
- err_mask |= 8;
-
- *ring_mean_v = V_out;
- } else {
- err_mask |= 8;
- *ring_mean_v = 0;
- }
- } else {
- err_mask |= 8;
- *ring_mean_v = 0;
- }
-
- /* Disable LevelMeter ==> In order to be able to restart Integrator again (for the next integration) */
- codsp_write_sop_char(duslic_id, channel, LMCR1_ADDR,
- LMCR1_LM_THM | LMCR1_LM_MASK | LMCR1_LM_ONCE);
- codsp_write_sop_short(duslic_id, channel, OFR1_ADDR, 0x0000);
-
- codsp_set_slic(duslic_id, channel, SS_RING_PAUSE); /* Start Ringing */
-
- /* Now Enable Rectifier */
- /* select source for the levelmeter to be IO4-IO3 */
- codsp_write_sop_char(duslic_id, channel, LMCR2_ADDR,
- LMCR2_LM_SEL_IO4_MINUS_IO3 | LMCR2_LM_RECT);
-
- /* Program the apropriate shift factor K_INTDC (in order to avoid Overflow at Integtation Result !!!) */
- codsp_write_cop_char(duslic_id, channel, RING_PARAMS_START_ADDR + 7, K_INTDC_RECT_ON);
-
- udelay(40000);
-
- /* Reenable Level Meter Integrator (The Result will be valid after Integration Period=Ring Period and until LN_EN become zero again) */
- codsp_write_sop_char(duslic_id, channel, LMCR1_ADDR,
- LMCR1_LM_THM | LMCR1_LM_MASK | LMCR1_LM_EN | LMCR1_LM_ONCE);
-
- udelay(40000);
-
- /* Poll the LM_OK bit to see when Integration Result is Ready */
- if (wait_level_metering_finish(duslic_id, channel)) {
-
- udelay(10000);
-
- /* Now Read the LM Result Registers (They will hold their value until LM_EN become zero again */
- /* ==>After that Result Regs will be updated every 500us !!!) */
- Offset_Compensation = codsp_read_sop_short(duslic_id, channel, LMRES1_ADDR);
- Offset_Compensation = (-1) * ((Offset_Compensation * (1 << K_INTDC_RECT_ON)) / N_SAMPLES);
-
- /* Disable LevelMeter ==> In order to be able to restart Integrator again (for the next integration) */
- codsp_write_sop_char(duslic_id, channel, LMCR1_ADDR, LMCR1_LM_THM | LMCR1_LM_MASK | LMCR1_LM_ONCE);
-
- /* Now programm Integrator Offset Registers !!! */
- codsp_write_sop_short(duslic_id, channel, OFR1_ADDR, Offset_Compensation);
-
- /* Be sure that a Ring is generated !!!! */
- codsp_set_slic(duslic_id, channel, SS_RINGING); /* Start Ringing again */
-
- udelay(40000);
-
- /* Reenable Level Meter Integrator (The Result will be valid after Integration Period=Ring Period and until LN_EN become zero again) */
- codsp_write_sop_char(duslic_id, channel, LMCR1_ADDR,
- LMCR1_LM_THM | LMCR1_LM_MASK | LMCR1_LM_EN | LMCR1_LM_ONCE);
-
- udelay(40000);
-
- /* Poll the LM_OK bit to see when Integration Result is Ready */
- if (wait_level_metering_finish(duslic_id, channel)) {
-
- udelay(10000);
-
- /* Now Read the LM Result Registers (They will hold their value until LM_EN become zero again */
- /* ==>After that Result Regs will be updated every 500us !!!) */
- LM_Result = codsp_read_sop_short(duslic_id, channel, LMRES1_ADDR);
- V_in = (-1) * ( ( (((long int)LM_Result) * V_AD_x10000) / N_SAMPLES) >> (15 - K_INTDC_RECT_ON) ) ; /* Vin x 10000*/
-
- V_out = (((V_in * Divider_Ratio) / 10000L) * RMS_MULTIPLIERx100) / 100 ; /* Vout_RMS x100 */
- if (V_out < 0)
- V_out = -V_out;
-
- Vout_diff = (V_out - TARGET_V_RING_RMSx100);
-
- if (Vout_diff < 0)
- Vout_diff = -Vout_diff;
-
- if (Vout_diff > V_RMS_RING_MAX_DIFFx100)
- err_mask |= 16;
-
- *ring_rms_v = V_out;
- } else {
- err_mask |= 16;
- *ring_rms_v = 0;
- }
- } else {
- err_mask |= 16;
- *ring_rms_v = 0;
- }
- /* Disable LevelMeter ==> In order to be able to restart Integrator again (for the next integration) */
- codsp_write_sop_char(duslic_id, channel, LMCR1_ADDR, LMCR1_LM_THM | LMCR1_LM_MASK);
-
- retrieve_slic_state(slic_id);
-
- return(err_mask);
-}
-
-int test_dtmf(int slic_id)
-{
- unsigned char code;
- unsigned char b;
- unsigned int intreg;
- int duslic_id = slic_id >> 1;
- int channel = slic_id & 1;
-
- for (code = 0; code < 16; code++) {
- b = codsp_read_sop_char(duslic_id, channel, DSCR_ADDR);
- codsp_write_sop_char(duslic_id, channel, DSCR_ADDR,
- (b & ~(DSCR_PTG | DSCR_DG_KEY(15))) | DSCR_DG_KEY(code) | DSCR_TG1_EN | DSCR_TG2_EN);
- udelay(80000);
-
- intreg = codsp_read_sop_int(duslic_id, channel, INTREG1_ADDR);
- if ((intreg & CODSP_INTREG_INT_CH) == 0)
- break;
-
- if ((intreg & CODSP_INTREG_DTMF_OK) == 0 ||
- codsp_dtmf_map[(intreg >> 10) & 15] != codsp_dtmf_map[code])
- break;
-
- b = codsp_read_sop_char(duslic_id, channel, DSCR_ADDR);
- codsp_write_sop_char(duslic_id, channel, DSCR_ADDR,
- b & ~(DSCR_COR8 | DSCR_TG1_EN | DSCR_TG2_EN));
-
- udelay(80000);
-
- intreg = codsp_read_sop_int(duslic_id, channel, INTREG1_ADDR); /* for dtmf_pause irq */
- }
-
- if (code != 16) {
- b = codsp_read_sop_char(duslic_id, channel, DSCR_ADDR); /* stop dtmf */
- codsp_write_sop_char(duslic_id, channel, DSCR_ADDR,
- b & ~(DSCR_COR8 | DSCR_TG1_EN | DSCR_TG2_EN));
- return(1);
- }
-
- return(0);
-}
-
-void data_up_persist_time(int duslic_id, int channel, int time_ms)
-{
- unsigned char b;
-
- b = codsp_read_sop_char(duslic_id, channel, IOCTL3_ADDR);
- b = (b & 0x0F) | ((time_ms & 0x0F) << 4);
- codsp_write_sop_char(duslic_id, channel, IOCTL3_ADDR, b);
-}
-
-static void program_dtmf_params(int duslic_id, int channel)
-{
- unsigned char b;
-
- codsp_write_pop_char(duslic_id, channel, DTMF_LEV_ADDR, 0x10);
- codsp_write_pop_char(duslic_id, channel, DTMF_TWI_ADDR, 0x0C);
- codsp_write_pop_char(duslic_id, channel, DTMF_NCF_H_ADDR, 0x79);
- codsp_write_pop_char(duslic_id, channel, DTMF_NCF_L_ADDR, 0x10);
- codsp_write_pop_char(duslic_id, channel, DTMF_NBW_H_ADDR, 0x02);
- codsp_write_pop_char(duslic_id, channel, DTMF_NBW_L_ADDR, 0xFB);
- codsp_write_pop_char(duslic_id, channel, DTMF_GAIN_ADDR, 0x91);
- codsp_write_pop_char(duslic_id, channel, DTMF_RES1_ADDR, 0x00);
- codsp_write_pop_char(duslic_id, channel, DTMF_RES2_ADDR, 0x00);
- codsp_write_pop_char(duslic_id, channel, DTMF_RES3_ADDR, 0x00);
-
- b = codsp_read_sop_char(duslic_id, channel, BCR5_ADDR);
- codsp_write_sop_char(duslic_id, channel, BCR5_ADDR, b | BCR5_DTMF_EN);
-}
-
-static void codsp_channel_full_reset(int duslic_id, int channel)
-{
-
- program_coeffs(duslic_id, channel, ac_coeffs, sizeof(ac_coeffs) / sizeof(struct _coeffs));
- program_coeffs(duslic_id, channel, dc_coeffs, sizeof(dc_coeffs) / sizeof(struct _coeffs));
-
- /* program basic configuration registers */
- codsp_write_sop_char(duslic_id, channel, BCR1_ADDR, 0x01);
- codsp_write_sop_char(duslic_id, channel, BCR2_ADDR, 0x41);
- codsp_write_sop_char(duslic_id, channel, BCR3_ADDR, 0x43);
- codsp_write_sop_char(duslic_id, channel, BCR4_ADDR, 0x00);
- codsp_write_sop_char(duslic_id, channel, BCR5_ADDR, 0x00);
-
- codsp_write_sop_char(duslic_id, channel, DSCR_ADDR, 0x04); /* PG */
-
- program_dtmf_params(duslic_id, channel);
-
- codsp_write_sop_char(duslic_id, channel, LMCR3_ADDR, 0x40); /* RingTRip_SEL */
-
- data_up_persist_time(duslic_id, channel, 4);
-
- codsp_write_sop_char(duslic_id, channel, MASK_ADDR, 0xFF); /* All interrupts masked */
-
- codsp_set_slic(duslic_id, channel, SS_ACTIVE_HIGH);
-}
-
-static int codsp_chip_full_reset(int duslic_id)
-{
- int i, cnt;
- int intreg[NUM_CHANNELS];
- unsigned char pcm_resync;
- unsigned char revision;
-
- codsp_reset_chip(duslic_id);
-
- udelay(2000);
-
- for (i = 0; i < NUM_CHANNELS; i++)
- intreg[i] = codsp_read_sop_int(duslic_id, i, INTREG1_ADDR);
-
- udelay(1500);
-
- if (_PORTC_GET(com_hook_mask_tab[duslic_id]) == 0) {
- printf("_HOOK(%d) stayed low\n", duslic_id);
- return -1;
- }
-
- for (pcm_resync = 0, i = 0; i < NUM_CHANNELS; i++) {
- if (intreg[i] & CODSP_INTREG_SYNC_FAIL)
- pcm_resync |= 1 << i;
- }
-
- for (cnt = 0; cnt < 5 && pcm_resync; cnt++) {
- for (i = 0; i < NUM_CHANNELS; i++)
- codsp_resync_channel(duslic_id, i);
-
- udelay(2000);
-
- pcm_resync = 0;
-
- for (i = 0; i < NUM_CHANNELS; i++) {
- if (codsp_read_sop_int(duslic_id, i, INTREG1_ADDR) & CODSP_INTREG_SYNC_FAIL)
- pcm_resync |= 1 << i;
- }
- }
-
- if (cnt == 5) {
- printf("PCM_Resync(%u) not completed\n", duslic_id);
- return -2;
- }
-
- revision = codsp_read_sop_char(duslic_id, 0, REVISION_ADDR);
- printf("DuSLIC#%d hardware version %d.%d\r\n", duslic_id, (revision & 0xF0) >> 4, revision & 0x0F);
-
- codsp_write_sop_char(duslic_id, 0, XCR_ADDR, 0x80); /* EDSP_EN */
-
- for (i = 0; i < NUM_CHANNELS; i++) {
- codsp_write_sop_char(duslic_id, i, PCMC1_ADDR, 0x01);
- codsp_channel_full_reset(duslic_id, i);
- }
-
- return 0;
-}
-
-int slic_self_test(int duslic_mask)
-{
- int slic;
- int i;
- int r;
- long vdd, v_oh_H, v_oh_L, ring_mean_v, ring_rms_v;
- const char *err_txt[] = { "VDD", "V_OH_H", "V_OH_L", "V_RING_MEAN", "V_RING_RMS" };
- int error = 0;
-
- for (slic = 0; slic < MAX_SLICS; slic++) { /* voltages self test */
- if (duslic_mask & (1 << (slic >> 1))) {
- r = measure_on_hook_voltages(slic, &vdd,
- &v_oh_H, &v_oh_L, &ring_mean_v, &ring_rms_v);
-
- printf("SLIC %u measured voltages (x100):\n\t"
- "VDD = %ld\tV_OH_H = %ld\tV_OH_L = %ld\tV_RING_MEAN = %ld\tV_RING_RMS = %ld\n",
- slic, vdd, v_oh_H, v_oh_L, ring_mean_v, ring_rms_v);
-
- if (r != 0)
- error |= 1 << slic;
-
- for (i = 0; i < 5; i++)
- if (r & (1 << i))
- printf("\t%s out of range\n", err_txt[i]);
- }
- }
-
- for (slic = 0; slic < MAX_SLICS; slic++) { /* voice path self test */
- if (duslic_mask & (1 << (slic >> 1))) {
- printf("SLIC %u VOICE PATH...CHECKING", slic);
- printf("\rSLIC %u VOICE PATH...%s\n", slic,
- (r = test_dtmf(slic)) != 0 ? "FAILED " : "PASSED ");
-
- if (r != 0)
- error |= 1 << slic;
- }
- }
-
- return(error);
-}
-
-#if defined(CONFIG_NETTA_ISDN)
-
-#define SPIENS1 (1 << (31 - 15))
-#define SPIENS2 (1 << (31 - 19))
-
-static const int spiens_mask_tab[2] = { SPIENS1, SPIENS2 };
-int s_initialized = 0;
-
-static inline unsigned int s_transfer_internal(int s_id, unsigned int address, unsigned int value)
-{
- unsigned int rx, v;
-
- _PORTB_SET(spiens_mask_tab[s_id], 0);
-
- rx = __SPI_Transfer(address);
-
- switch (address & 0xF0) {
- case 0x60: /* write byte register */
- case 0x70:
- rx = __SPI_Transfer(value);
- break;
-
- case 0xE0: /* read R6 register */
- v = __SPI_Transfer(0);
-
- rx = (rx << 8) | v;
-
- break;
-
- case 0xF0: /* read byte register */
- rx = __SPI_Transfer(0);
-
- break;
- }
-
- _PORTB_SET(spiens_mask_tab[s_id], 1);
-
- return rx;
-}
-
-static void s_write_BR(int s_id, unsigned int regno, unsigned int val)
-{
- unsigned int address;
- unsigned int v;
-
- address = 0x70 | (regno & 15);
- val &= 0xff;
-
- v = s_transfer_internal(s_id, address, val);
-}
-
-static void s_write_OR(int s_id, unsigned int regno, unsigned int val)
-{
- unsigned int address;
- unsigned int v;
-
- address = 0x70 | (regno & 15);
- val &= 0xff;
-
- v = s_transfer_internal(s_id, address, val);
-}
-
-static void s_write_NR(int s_id, unsigned int regno, unsigned int val)
-{
- unsigned int address;
- unsigned int v;
-
- address = (regno & 7) << 4;
- val &= 0xf;
-
- v = s_transfer_internal(s_id, address | val, 0x00);
-}
-
-#define BR7_IFR 0x08 /* IDL2 free run */
-#define BR7_ICSLSB 0x04 /* IDL2 clock speed LSB */
-
-#define BR15_OVRL_REG_EN 0x80
-#define OR7_D3VR 0x80 /* disable 3V regulator */
-
-#define OR8_TEME 0x10 /* TE mode enable */
-#define OR8_MME 0x08 /* master mode enable */
-
-void s_initialize(void)
-{
- int s_id;
-
- for (s_id = 0; s_id < 2; s_id++) {
- s_write_BR(s_id, 7, BR7_IFR | BR7_ICSLSB);
- s_write_BR(s_id, 15, BR15_OVRL_REG_EN);
- s_write_OR(s_id, 8, OR8_TEME | OR8_MME);
- s_write_OR(s_id, 7, OR7_D3VR);
- s_write_OR(s_id, 6, 0);
- s_write_BR(s_id, 15, 0);
- s_write_NR(s_id, 3, 0);
- }
-}
-
-#endif
-
-int board_post_codec(int flags)
-{
- int j;
- int r;
- int duslic_mask;
-
- printf("board_post_dsp\n");
-
-#if defined(CONFIG_NETTA_ISDN)
- if (s_initialized == 0) {
- s_initialize();
- s_initialized = 1;
-
- printf("s_initialized\n");
-
- udelay(20000);
- }
-#endif
- duslic_mask = 0;
-
- for (j = 0; j < MAX_DUSLIC; j++) {
- if (codsp_chip_full_reset(j) < 0)
- printf("Error initializing DuSLIC#%d\n", j);
- else
- duslic_mask |= 1 << j;
- }
-
- if (duslic_mask != 0) {
- printf("Testing SLICs...\n");
-
- r = slic_self_test(duslic_mask);
- for (j = 0; j < MAX_SLICS; j++) {
- if (duslic_mask & (1 << (j >> 1)))
- printf("SLIC %u...%s\n", j, r & (1 << j) ? "FAULTY" : "OK");
- }
- }
- printf("DuSLIC self test finished\n");
-
- return 0; /* return -1 on error */
-}
diff --git a/board/netta/config.mk b/board/netta/config.mk
deleted file mode 100644
index 8497ebc812..0000000000
--- a/board/netta/config.mk
+++ /dev/null
@@ -1,28 +0,0 @@
-#
-# (C) Copyright 2000-2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# netVia Boards
-#
-
-TEXT_BASE = 0x40000000
diff --git a/board/netta/dsp.c b/board/netta/dsp.c
deleted file mode 100644
index 66e0b85e6c..0000000000
--- a/board/netta/dsp.c
+++ /dev/null
@@ -1,1208 +0,0 @@
-/*
- * Intracom TI6711/TI6412 DSP
- */
-
-#include <common.h>
-#include <post.h>
-
-#include "mpc8xx.h"
-
-struct ram_range {
- u32 start;
- u32 size;
-};
-
-#if defined(CONFIG_NETTA_6412)
-
-static const struct ram_range int_ram[] = {
- { 0x00000000U, 0x00040000U },
-};
-
-static const struct ram_range ext_ram[] = {
- { 0x80000000U, 0x00100000U },
-};
-
-static const struct ram_range ranges[] = {
- { 0x00000000U, 0x00040000U },
- { 0x80000000U, 0x00100000U },
-};
-
-static inline u16 bit_invert(u16 d)
-{
- register u8 i;
- register u16 r;
- register u16 bit;
-
- r = 0;
- for (i = 0; i < 16; i++) {
- bit = d & (1 << i);
- if (bit != 0)
- r |= 1 << (15 - i);
- }
- return r;
-}
-
-#else
-
-static const struct ram_range int_ram[] = {
- { 0x00000000U, 0x00010000U },
-};
-
-static const struct ram_range ext_ram[] = {
- { 0x80000000U, 0x00100000U },
-};
-
-static const struct ram_range ranges[] = {
- { 0x00000000U, 0x00010000U },
- { 0x80000000U, 0x00100000U },
-};
-
-#endif
-
-/*******************************************************************************************************/
-
-static inline int addr_in_int_ram(u32 addr)
-{
- int i;
-
- for (i = 0; i < sizeof(int_ram)/sizeof(int_ram[0]); i++)
- if (addr >= int_ram[i].start && addr < int_ram[i].start + int_ram[i].size)
- return 1;
-
- return 0;
-}
-
-static inline int addr_in_ext_ram(u32 addr)
-{
- int i;
-
- for (i = 0; i < sizeof(ext_ram)/sizeof(ext_ram[0]); i++)
- if (addr >= ext_ram[i].start && addr < ext_ram[i].start + ext_ram[i].size)
- return 1;
-
- return 0;
-}
-
-/*******************************************************************************************************/
-
-#define DSP_HPIC 0x0
-#define DSP_HPIA 0x4
-#define DSP_HPID1 0x8
-#define DSP_HPID2 0xC
-
-static u32 dummy_delay;
-static volatile u32 *ti6711_delay = &dummy_delay;
-
-static inline void dsp_go_slow(void)
-{
- volatile memctl8xx_t *memctl = &((immap_t *)CFG_IMMR)->im_memctl;
-#if defined(CONFIG_NETTA_6412)
- memctl->memc_or6 |= OR_SCY_15_CLK | OR_TRLX;
-#else
- memctl->memc_or2 |= OR_SCY_15_CLK | OR_TRLX;
-#endif
- memctl->memc_or5 |= OR_SCY_15_CLK | OR_TRLX;
-
- ti6711_delay = (u32 *)DUMMY_BASE;
-}
-
-static inline void dsp_go_fast(void)
-{
- volatile memctl8xx_t *memctl = &((immap_t *)CFG_IMMR)->im_memctl;
-#if defined(CONFIG_NETTA_6412)
- memctl->memc_or6 = (memctl->memc_or6 & ~(OR_SCY_15_CLK | OR_TRLX)) | OR_SCY_0_CLK;
-#else
- memctl->memc_or2 = (memctl->memc_or2 & ~(OR_SCY_15_CLK | OR_TRLX)) | OR_SCY_3_CLK;
-#endif
- memctl->memc_or5 = (memctl->memc_or5 & ~(OR_SCY_15_CLK | OR_TRLX)) | OR_SCY_0_CLK;
-
- ti6711_delay = &dummy_delay;
-}
-
-/*******************************************************************************************************/
-
-static inline void dsp_delay(void)
-{
- /* perform ti6711_delay chip select read to have a small delay */
- (void) *(volatile u32 *)ti6711_delay;
-}
-
-static inline u16 dsp_read_hpic(void)
-{
-#if defined(CONFIG_NETTA_6412)
- return bit_invert(*((volatile u16 *)DSP_BASE));
-#else
- return *((volatile u16 *)DSP_BASE);
-#endif
-}
-
-static inline void dsp_write_hpic(u16 val)
-{
-#if defined(CONFIG_NETTA_6412)
- *((volatile u16 *)DSP_BASE) = bit_invert(val);
-#else
- *((volatile u16 *)DSP_BASE) = val;
-#endif
-}
-
-static inline void dsp_reset(void)
-{
-#if defined(CONFIG_NETTA_6412)
- ((volatile immap_t *)CFG_IMMR)->im_ioport.iop_pddat &= ~(1 << (15 - 15));
- udelay(500);
- ((volatile immap_t *)CFG_IMMR)->im_ioport.iop_pddat |= (1 << (15 - 15));
- udelay(500);
-#else
- ((volatile immap_t *)CFG_IMMR)->im_ioport.iop_pddat &= ~(1 << (15 - 7));
- udelay(250);
- ((volatile immap_t *)CFG_IMMR)->im_ioport.iop_pddat |= (1 << (15 - 7));
- udelay(250);
-#endif
-}
-
-static inline u32 dsp_read_hpic_word(u32 addr)
-{
- u32 val;
- volatile u16 *p;
-#if defined(CONFIG_NETTA_6412)
- p = (volatile u16 *)((volatile u8 *)DSP_BASE + addr);
-
- val = ((u32) bit_invert(p[0]) << 16);
- /* dsp_delay(); */
-
- val |= bit_invert(p[1]);
- /* dsp_delay(); */
-#else
- p = (volatile u16 *)((volatile u8 *)DSP_BASE + addr);
-
- val = ((u32) p[0] << 16);
- dsp_delay();
-
- val |= p[1];
- dsp_delay();
-#endif
- return val;
-}
-
-static inline u16 dsp_read_hpic_hi_hword(u32 addr)
-{
-#if defined(CONFIG_NETTA_6412)
- return bit_invert(*(volatile u16 *)((volatile u8 *)DSP_BASE + addr));
-#else
- return *(volatile u16 *)((volatile u8 *)DSP_BASE + addr);
-#endif
-}
-
-static inline u16 dsp_read_hpic_lo_hword(u32 addr)
-{
-#if defined(CONFIG_NETTA_6412)
- return bit_invert(*(volatile u16 *)((volatile u8 *)DSP_BASE + addr + 2));
-#else
- return *(volatile u16 *)((volatile u8 *)DSP_BASE + addr + 2);
-#endif
-}
-
-static inline void dsp_wait_hrdy(void)
-{
- int i;
-
- i = 0;
-#if defined(CONFIG_NETTA_6412)
- while (i < 1000 && (dsp_read_hpic_word(DSP_HPIC) & 0x08) == 0) {
-#else
- while (i < 1000 && (dsp_read_hpic() & 0x08) == 0) {
-#endif
- dsp_delay();
- i++;
- }
-}
-
-static inline void dsp_write_hpic_word(u32 addr, u32 val)
-{
- volatile u16 *p;
-#if defined(CONFIG_NETTA_6412)
- p = (volatile u16 *)((volatile u8 *)DSP_BASE + addr);
- p[0] = bit_invert((u16)(val >> 16));
- /* dsp_delay(); */
-
- p[1] = bit_invert((u16)val);
- /* dsp_delay(); */
-#else
- p = (volatile u16 *)((volatile u8 *)DSP_BASE + addr);
- p[0] = (u16)(val >> 16);
- dsp_delay();
-
- p[1] = (u16)val;
- dsp_delay();
-#endif
-}
-
-static inline void dsp_write_hpic_hi_hword(u32 addr, u16 val_h)
-{
-#if defined(CONFIG_NETTA_6412)
- *(volatile u16 *)((volatile u8 *)DSP_BASE + addr) = bit_invert(val_h);
-#else
-
- *(volatile u16 *)((volatile u8 *)DSP_BASE + addr) = val_h;
-#endif
-}
-
-static inline void dsp_write_hpic_lo_hword(u32 addr, u16 val_l)
-{
-#if defined(CONFIG_NETTA_6412)
- *(volatile u16 *)((volatile u8 *)DSP_BASE + addr + 2) = bit_invert(val_l);
-#else
- *(volatile u16 *)((volatile u8 *)DSP_BASE + addr + 2) = val_l;
-#endif
-}
-
-/********************************************************************/
-
-static inline void c62_write_word(u32 addr, u32 val)
-{
- dsp_write_hpic_hi_hword(DSP_HPIA, (u16)(addr >> 16));
-#if !defined(CONFIG_NETTA_6412)
- dsp_delay();
-#endif
- dsp_write_hpic_lo_hword(DSP_HPIA, (u16)addr);
-#if !defined(CONFIG_NETTA_6412)
- dsp_delay();
-#endif
-
- dsp_wait_hrdy();
-#if !defined(CONFIG_NETTA_6412)
- dsp_delay();
-#endif
- dsp_write_hpic_hi_hword(DSP_HPID2, (u16)(val >> 16));
-#if !defined(CONFIG_NETTA_6412)
- dsp_delay();
-
- /* dsp_wait_hrdy();
- dsp_delay(); */
-#endif
- dsp_write_hpic_lo_hword(DSP_HPID2, (u16)val);
-#if !defined(CONFIG_NETTA_6412)
- dsp_delay();
-#endif
-}
-
-static u32 c62_read_word(u32 addr)
-{
- u32 val;
-
- dsp_write_hpic_hi_hword(DSP_HPIA, (u16)(addr >> 16));
-#if !defined(CONFIG_NETTA_6412)
- dsp_delay();
-#endif
- dsp_write_hpic_lo_hword(DSP_HPIA, (u16)addr);
-#if !defined(CONFIG_NETTA_6412)
- dsp_delay();
-#endif
-
- /* FETCH */
-#if defined(CONFIG_NETTA_6412)
- dsp_write_hpic_word(DSP_HPIC, 0x00100010);
-#else
- dsp_write_hpic(0x10);
- dsp_delay();
-#endif
- dsp_wait_hrdy();
-#if !defined(CONFIG_NETTA_6412)
- dsp_delay();
-#endif
- val = (u32)dsp_read_hpic_hi_hword(DSP_HPID2) << 16;
-#if !defined(CONFIG_NETTA_6412)
- dsp_delay();
-
- /* dsp_wait_hrdy();
- dsp_delay(); */
-#endif
- val |= dsp_read_hpic_lo_hword(DSP_HPID2);
-#if !defined(CONFIG_NETTA_6412)
- dsp_delay();
-#endif
- return val;
-}
-
-static inline void c62_read(u32 addr, u32 *buffer, int numdata)
-{
- int i;
-
- if (numdata <= 0)
- return;
-
- for (i = 0; i < numdata; i++) {
- *buffer++ = c62_read_word(addr);
- addr += 4;
- }
-}
-
-static inline u32 c62_checksum(u32 addr, int numdata)
-{
- int i;
- u32 chksum;
-
- chksum = 0;
- for (i = 0; i < numdata; i++) {
- chksum += c62_read_word(addr);
- addr += 4;
- }
-
- return chksum;
-}
-
-static inline void c62_write(u32 addr, const u32 *buffer, int numdata)
-{
- int i;
-
- if (numdata <= 0)
- return;
-
- for (i = 0; i < numdata; i++) {
- c62_write_word(addr, *buffer++);
- addr += 4;
- }
-}
-
-static inline int c62_write_word_validated(u32 addr, u32 val)
-{
- c62_write_word(addr, val);
- return c62_read_word(addr) == val ? 0 : -1;
-}
-
-static inline int c62_write_validated(u32 addr, const u32 *buffer, int numdata)
-{
- int i, r;
-
- if (numdata <= 0)
- return 0;
-
- for (i = 0; i < numdata; i++) {
- r = c62_write_word_validated(addr, *buffer++);
- if (r < 0)
- return r;
- addr += 4;
- }
- return 0;
-}
-
-#if defined(CONFIG_NETTA_6412)
-
-#define DRAM_REGS_BASE 0x1800000
-
-#define GBLCTL DRAM_REGS_BASE
-#define CECTL1 (DRAM_REGS_BASE + 0x4)
-#define CECTL0 (DRAM_REGS_BASE + 0x8)
-#define CECTL2 (DRAM_REGS_BASE + 0x10)
-#define CECTL3 (DRAM_REGS_BASE + 0x14)
-#define SDCTL (DRAM_REGS_BASE + 0x18)
-#define SDTIM (DRAM_REGS_BASE + 0x1C)
-#define SDEXT (DRAM_REGS_BASE + 0x20)
-#define SESEC1 (DRAM_REGS_BASE + 0x44)
-#define SESEC0 (DRAM_REGS_BASE + 0x48)
-#define SESEC2 (DRAM_REGS_BASE + 0x50)
-#define SESEC3 (DRAM_REGS_BASE + 0x54)
-
-#define MAR128 0x1848200
-#define MAR129 0x1848204
-
-void dsp_dram_initialize(void)
-{
- c62_write_word(GBLCTL, 0x120E4);
- c62_write_word(CECTL1, 0x18);
- c62_write_word(CECTL0, 0xD0);
- c62_write_word(CECTL2, 0x18);
- c62_write_word(CECTL3, 0x18);
- c62_write_word(SDCTL, 0x47115000);
- c62_write_word(SDTIM, 1536);
- c62_write_word(SDEXT, 0x534A9);
-#if 0
- c62_write_word(SESEC1, 0);
- c62_write_word(SESEC0, 0);
- c62_write_word(SESEC2, 0);
- c62_write_word(SESEC3, 0);
-#endif
- c62_write_word(MAR128, 1);
- c62_write_word(MAR129, 0);
-}
-
-#endif
-
-static inline void dsp_init_hpic(void)
-{
- int i;
- volatile u16 *p;
-#if defined(CONFIG_NETTA_6412)
- dsp_go_fast();
-#else
- dsp_go_slow();
-#endif
- i = 0;
-#if defined(CONFIG_NETTA_6412)
- while (i < 1000 && (dsp_read_hpic_word(DSP_HPIC) & 0x08) == 0) {
-#else
- while (i < 1000 && (dsp_read_hpic() & 0x08) == 0) {
-#endif
- dsp_delay();
- i++;
- }
-
- if (i == 1000)
- printf("HRDY stuck\n");
-
- dsp_delay();
-
- /* write control register */
- p = (volatile u16 *)DSP_BASE;
- p[0] = 0x0000;
- dsp_delay();
- p[1] = 0x0000;
- dsp_delay();
-
-#if !defined(CONFIG_NETTA_6412)
- dsp_go_fast();
-#endif
-}
-
-/***********************************************************************************************************/
-
-#if !defined(CONFIG_NETTA_6412)
-
-static const u8 bootstrap_rbin[5084] = {
- 0x52, 0x42, 0x49, 0x4e, 0xc5, 0xa9, 0x9f, 0x1a, 0x00, 0x00, 0x00, 0x02,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x20, 0x00,
- 0x00, 0x00, 0x11, 0xc0, 0x00, 0x17, 0x94, 0x2a, 0x00, 0x00, 0x00, 0x6a,
- 0x00, 0x00, 0x03, 0x62, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00,
- 0x00, 0x18, 0x00, 0xe2, 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0xe2,
- 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0xe2, 0x00, 0x00, 0x60, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x18, 0x00, 0xe2, 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0xe2,
- 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0xe2, 0x00, 0x00, 0x60, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x18, 0x00, 0xe2, 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0xe2,
- 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0xe2, 0x00, 0x00, 0x60, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x18, 0x00, 0xe2, 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0xe2,
- 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0xe2, 0x00, 0x00, 0x60, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x18, 0x00, 0xe2, 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0xe2,
- 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0xe2, 0x00, 0x00, 0x60, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x17, 0x94, 0x2a, 0x00, 0x00, 0x00, 0x6a, 0x00, 0x00, 0x03, 0x62,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x18, 0x00, 0xe2,
- 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0xe2, 0x00, 0x00, 0x60, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x18, 0x00, 0xe2, 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0xe2,
- 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0xe2, 0x00, 0x00, 0x60, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x18, 0x00, 0xe2, 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0xe2,
- 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0xe2, 0x00, 0x00, 0x60, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x18, 0x00, 0xe2, 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0xe2,
- 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0xe2, 0x00, 0x00, 0x60, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x18, 0x00, 0xe2, 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0xe2,
- 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0xe2, 0x00, 0x00, 0x60, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x18, 0x00, 0xe2, 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x90, 0x10, 0x5a,
- 0x00, 0x19, 0x2e, 0x28, 0x00, 0x00, 0x00, 0x68, 0x00, 0x00, 0x02, 0x64,
- 0x02, 0x00, 0x00, 0xaa, 0x02, 0x10, 0xac, 0xe2, 0x00, 0x00, 0x20, 0x00,
- 0x00, 0x00, 0x02, 0x64, 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, 0x9f, 0x7a,
- 0x30, 0x00, 0x08, 0x10, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x04, 0x28,
- 0x00, 0x00, 0xc6, 0x69, 0x02, 0x16, 0x4c, 0xa2, 0x02, 0x00, 0x90, 0x7a,
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- 0x03, 0x94, 0x10, 0x59, 0x00, 0x10, 0x02, 0xf4, 0x00, 0x00, 0x12, 0xaa,
- 0x00, 0x80, 0x00, 0xa8, 0x04, 0x08, 0x00, 0x28, 0x04, 0x00, 0x00, 0x68,
- 0x20, 0x03, 0xe0, 0x5b, 0x90, 0x14, 0x02, 0x64, 0x20, 0x00, 0x00, 0x12,
- 0x93, 0x1c, 0x36, 0x74, 0x00, 0x00, 0x00, 0x00, 0x03, 0x20, 0x02, 0x65,
- 0x02, 0x19, 0x2a, 0x29, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x60, 0x79,
- 0x01, 0xa0, 0x36, 0x65, 0x02, 0x00, 0x00, 0x68, 0x80, 0x87, 0xe0, 0x59,
- 0x90, 0x14, 0x02, 0x75, 0x02, 0x90, 0x01, 0xa0, 0x00, 0x14, 0x02, 0x64,
- 0x00, 0x00, 0x40, 0x00, 0x03, 0x1c, 0x36, 0x74, 0x00, 0x00, 0x60, 0x78,
- 0x00, 0x14, 0x02, 0x74, 0x00, 0x19, 0x2a, 0x28, 0x00, 0x00, 0x00, 0x68,
- 0x00, 0x18, 0xe0, 0x29, 0x00, 0x00, 0x02, 0x66, 0x00, 0x00, 0x00, 0x68,
- 0x00, 0x00, 0x40, 0x00, 0x31, 0x80, 0x80, 0x59, 0x32, 0x19, 0x2e, 0x2a,
- 0x32, 0x00, 0x00, 0x6a, 0x31, 0x90, 0x02, 0xf4, 0x30, 0x02, 0x9d, 0x41,
- 0x32, 0x19, 0x30, 0x2a, 0x32, 0x00, 0x00, 0x6a, 0x30, 0x10, 0x02, 0xf4,
- 0x30, 0x00, 0x09, 0x12, 0x00, 0x00, 0x80, 0x00, 0x02, 0x80, 0x00, 0xfa,
- 0x02, 0x80, 0xc0, 0x6a, 0x03, 0x14, 0x02, 0xe6, 0x02, 0x00, 0x08, 0x2a,
- 0x00, 0x00, 0x40, 0x00, 0x02, 0x18, 0x8d, 0xfa, 0x02, 0x14, 0x02, 0xf6,
- 0x00, 0x00, 0x00, 0xf8, 0x00, 0x00, 0xc0, 0x68, 0x01, 0x80, 0x02, 0x64,
- 0x00, 0x00, 0x60, 0x00, 0x01, 0x8d, 0x0d, 0xd8, 0x01, 0x80, 0x02, 0x74,
- 0x0f, 0xff, 0xf9, 0x90, 0x00, 0x00, 0x80, 0x00, 0x00, 0x0c, 0x03, 0x62,
- 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
-};
-
-static int load_bootstrap(void)
-{
- const u8 *s = bootstrap_rbin;
- u32 l = sizeof(bootstrap_rbin);
- const u8 *data, *hdr, *h;
- u32 chksum, chksum2;
- int i, j, rangenr;
- u32 start, length;
-
- if (l < 12) {
- printf("bootstrap image corrupted. (too short header)\n");
- return -1;
- }
-
- chksum = ((u32)s[4] << 24) | ((u32)s[5] << 16) | ((u32)s[ 6] << 8) | (u32)s[ 7];
- rangenr = ((u32)s[8] << 24) | ((u32)s[9] << 16) | ((u32)s[10] << 8) | (u32)s[11];
- s += 12; l -= 12;
-
- hdr = s;
- s += 8 * rangenr; l -= 8 * rangenr;
- data = s;
-
- /* validate bootstrap image */
- h = hdr; s = data; chksum2 = 0;
- for (i = 0; i < rangenr; i++) {
- start = ((u32)h[0] << 24) | ((u32)h[1] << 16) | ((u32)h[2] << 8) | (u32)h[3];
- length = ((u32)h[4] << 24) | ((u32)h[5] << 16) | ((u32)h[6] << 8) | (u32)h[7];
- h += 8;
-
- /* too short */
- if (l < length) {
- printf("bootstrap image corrupted. (too short data)\n");
- return -1;
- }
- l -= length;
-
- j = (int)length / 4;
- while (j-- > 0) {
- chksum2 += ((u32)s[0] << 24) | ((u32)s[1] << 16) | ((u32)s[2] << 8) | (u32)s[3];
- s += 4;
- }
- }
-
- /* checksum must match */
- if (chksum != chksum2) {
- printf("bootstrap image corrupted. (checksum error)\n");
- return -1;
- }
-
- /* nothing must be left */
- if (l != 0) {
- printf("bootstrap image corrupted. (garbage at the end)\n");
- return -1;
- }
-
- /* write the image */
- h = hdr;
- s = data;
- for (i = 0; i < rangenr; i++) {
- start = ((u32)h[0] << 24) | ((u32)h[1] << 16) | ((u32)h[2] << 8) | (u32)h[3];
- length = ((u32)h[4] << 24) | ((u32)h[5] << 16) | ((u32)h[6] << 8) | (u32)h[7];
- h += 8;
- c62_write(start, (u32 *)s, length / 4);
- s += length;
- }
-
- /* and now validate checksum */
- h = hdr;
- s = data;
- chksum2 = 0;
- for (i = 0; i < rangenr; i++) {
- start = ((u32)h[0] << 24) | ((u32)h[1] << 16) | ((u32)h[2] << 8) | (u32)h[3];
- length = ((u32)h[4] << 24) | ((u32)h[5] << 16) | ((u32)h[6] << 8) | (u32)h[7];
- h += 8;
- chksum2 += c62_checksum(start, length / 4);
- s += length;
- }
-
- /* checksum must match */
- if (chksum != chksum2) {
- printf("bootstrap in DSP memory is corrupted\n");
- return -1;
- }
-
- return 0;
-}
-
-struct host_init {
- u32 master_mode;
- struct {
- u8 port_id;
- u8 slot_id;
- } ch_serial_map[32];
- u32 clk_divider[2];
- /* pll */
- u32 initmode;
- u32 pllm;
- u32 div[4];
- u32 oscdiv1;
- u32 unused[10];
-};
-
-const struct host_init hi_default = {
- .master_mode =
-#if !defined(CONFIG_NETTA_ISDN)
- -1,
-#else
- 0,
-#endif
-
- .ch_serial_map = {
- [ 0] = { .port_id = 2, .slot_id = 16 },
- [ 1] = { .port_id = 2, .slot_id = 17 },
- [ 2] = { .port_id = 2, .slot_id = 18 },
- [ 3] = { .port_id = 2, .slot_id = 19 },
- [ 4] = { .port_id = 2, .slot_id = 20 },
- [ 5] = { .port_id = 2, .slot_id = 21 },
- [ 6] = { .port_id = 2, .slot_id = 22 },
- [ 7] = { .port_id = 2, .slot_id = 23 },
- [ 8] = { .port_id = 2, .slot_id = 24 },
- [ 9] = { .port_id = 2, .slot_id = 25 },
- [10] = { .port_id = 2, .slot_id = 26 },
- [11] = { .port_id = 2, .slot_id = 27 },
- [12] = { .port_id = 2, .slot_id = 28 },
- [13] = { .port_id = 2, .slot_id = 29 },
- [14] = { .port_id = 2, .slot_id = 30 },
- [15] = { .port_id = 2, .slot_id = 31 },
- },
-
- /*
- dsp_clk(xin, pllm) = xin * pllm
- serial_clk(xin, pllm, div) = (dsp_clk(xin, pllm) / 2) / (div + 1)
- */
-
- .clk_divider = {
- [0] = 47, /* must be 2048Hz */
- [1] = 47,
- },
-
- .initmode = 1,
- .pllm =
-#if !defined(CONFIG_NETTA_ISDN)
- 8, /* for =~ 25MHz 8 */
-#else
- 4,
-#endif
- .div = {
- [0] = 0x8000,
- [1] = 0x8000, /* for =~ 25MHz 0x8000 */
- [2] = 0x8001, /* for =~ 25MHz 0x8001 */
- [3] = 0x8001, /* for =~ 25MHz 0x8001 */
- },
-
- .oscdiv1 = 0,
-};
-
-static void hi_write(const struct host_init *hi)
-{
- u32 hi_buf[1 + sizeof(*hi) / sizeof(u32)];
- u32 *s;
- u32 chksum;
- int i;
-
- memset(hi_buf, 0, sizeof(hi_buf));
-
- s = hi_buf;
- s++;
- *s++ = hi->master_mode;
- for (i = 0; i < (sizeof(hi->ch_serial_map) / sizeof(hi->ch_serial_map[0])) / 2; i++)
- *s++ = ((u32)hi->ch_serial_map[i * 2 + 1].slot_id << 24) | ((u32)hi->ch_serial_map[i * 2 + 1].port_id << 16) |
- ((u32)hi->ch_serial_map[i * 2 + 0].slot_id << 8) | (u32)hi->ch_serial_map[i * 2 + 0].port_id;
-
- for (i = 0; i < sizeof(hi->clk_divider)/sizeof(hi->clk_divider[0]); i++)
- *s++ = hi->clk_divider[i];
-
- *s++ = hi->initmode;
- *s++ = hi->pllm;
- for (i = 0; i < sizeof(hi->div)/sizeof(hi->div[0]); i++)
- *s++ = hi->div[i];
- *s++ = hi->oscdiv1;
-
- chksum = 0;
- for (i = 1; i < sizeof(hi_buf)/sizeof(hi_buf[0]); i++)
- chksum += hi_buf[i];
- hi_buf[0] = -chksum;
-
- c62_write(0x1000, hi_buf, sizeof(hi_buf) / sizeof(hi_buf[0]));
-}
-
-static void run_bootstrap(void)
-{
- dsp_go_slow();
-
- hi_write(&hi_default);
-
- /* signal interrupt */
- dsp_write_hpic(0x0002);
- dsp_delay();
-
- dsp_go_fast();
-}
-
-#endif
-
-/***********************************************************************************************************/
-
-int board_post_dsp(int flags)
-{
- u32 ramS, ramE;
- u32 data, data2;
- int i, j, k;
-#if !defined(CONFIG_NETTA_6412)
- int r;
-#endif
- dsp_reset();
- dsp_init_hpic();
-#if !defined(CONFIG_NETTA_6412)
- dsp_go_slow();
-#endif
- data = 0x11223344;
- dsp_write_hpic_word(DSP_HPIA, data);
- data2 = dsp_read_hpic_word(DSP_HPIA);
- if (data2 != 0x11223344) {
- printf("HPIA: ** ERROR; wrote 0x%08X read 0x%08X **\n", data, data2);
- goto err;
- }
-
- data = 0xFFEEDDCC;
- dsp_write_hpic_word(DSP_HPIA, data);
- data2 = dsp_read_hpic_word(DSP_HPIA);
- if (data2 != 0xFFEEDDCC) {
- printf("HPIA: ** ERROR; wrote 0x%08X read 0x%08X **\n", data, data2);
- goto err;
- }
-#if defined(CONFIG_NETTA_6412)
- dsp_dram_initialize();
-#else
- r = load_bootstrap();
- if (r < 0) {
- printf("BOOTSTRAP: ** ERROR ** failed to load\n");
- goto err;
- }
-
- run_bootstrap();
-
- dsp_go_fast();
-#endif
- printf(" ");
-
- /* test RAMs */
- for (k = 0; k < sizeof(ranges)/sizeof(ranges[0]); k++) {
-
- ramS = ranges[k].start;
- ramE = ranges[k].start + ranges[k].size;
-
- for (j = 0; j < 3; j++) {
-
- printf("\b\b\b\bR%d.%d", k, j);
-
- for (i = ramS; i < ramE; i += 4) {
-
- data = 0;
- switch (j) {
- case 0: data = 0xAA55AA55; break;
- case 1: data = 0x55AA55AA; break;
- case 2: data = (u32)i; break;
- }
-
- c62_write_word(i, data);
- data2 = c62_read_word(i);
- if (data != data2) {
- printf(" ** ERROR at 0x%08X; wrote 0x%08X read 0x%08X **\n", i, data, data2);
- goto err;
- }
- }
- }
- }
-
- printf("\b\b\b\b \b\b\b\bOK\n");
-#if !defined(CONFIG_NETTA_6412)
- /* XXX assume that this works */
- load_bootstrap();
- run_bootstrap();
- dsp_go_fast();
-#endif
- return 0;
-
-err:
- return -1;
-}
-
-int board_dsp_reset(void)
-{
-#if !defined(CONFIG_NETTA_6412)
- int r;
-#endif
- dsp_reset();
- dsp_init_hpic();
-#if defined(CONFIG_NETTA_6412)
- dsp_dram_initialize();
-#else
- dsp_go_slow();
- r = load_bootstrap();
- if (r < 0)
- return r;
-
- run_bootstrap();
- dsp_go_fast();
-#endif
- return 0;
-}
diff --git a/board/netta/flash.c b/board/netta/flash.c
deleted file mode 100644
index ca3e061c27..0000000000
--- a/board/netta/flash.c
+++ /dev/null
@@ -1,508 +0,0 @@
-/*
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size(vu_long * addr, flash_info_t * info);
-static int write_byte(flash_info_t * info, ulong dest, uchar data);
-static void flash_get_offsets(ulong base, flash_info_t * info);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init(void)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- unsigned long size;
- int i;
-
- /* Init: no FLASHes known */
- for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i)
- flash_info[i].flash_id = FLASH_UNKNOWN;
-
- size = flash_get_size((vu_long *) FLASH_BASE0_PRELIM, &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n", size, size << 20);
- }
-
- /* Remap FLASH according to real size */
- memctl->memc_or0 = CFG_OR_TIMING_FLASH | (-size & 0xFFFF8000);
- memctl->memc_br0 = (CFG_FLASH_BASE & BR_BA_MSK) | (memctl->memc_br0 & ~(BR_BA_MSK));
-
- /* Re-do sizing to get full correct info */
- size = flash_get_size((vu_long *) CFG_FLASH_BASE, &flash_info[0]);
-
- flash_get_offsets(CFG_FLASH_BASE, &flash_info[0]);
-
- /* monitor protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_FLASH_BASE, CFG_FLASH_BASE + monitor_flash_len - 1,
- &flash_info[0]);
-
- flash_protect ( FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1,
- &flash_info[0]);
-
-#ifdef CFG_ENV_ADDR_REDUND
- flash_protect ( FLAG_PROTECT_SET,
- CFG_ENV_ADDR_REDUND,
- CFG_ENV_ADDR_REDUND + CFG_ENV_SIZE_REDUND - 1,
- &flash_info[0]);
-#endif
-
-
- flash_info[0].size = size;
-
- return (size);
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_get_offsets(ulong base, flash_info_t * info)
-{
- int i;
-
- /* set up sector start address table */
- if ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM040) {
- for (i = 0; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00010000);
- }
- } else if (info->flash_id & FLASH_BTYPE) {
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00004000;
- info->start[2] = base + 0x00006000;
- info->start[3] = base + 0x00008000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00010000) - 0x00030000;
- }
- } else {
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- info->start[i--] = base + info->size - 0x00004000;
- info->start[i--] = base + info->size - 0x00006000;
- info->start[i--] = base + info->size - 0x00008000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00010000;
- }
- }
-
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info(flash_info_t * info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD:
- printf("AMD ");
- break;
- case FLASH_MAN_FUJ:
- printf("FUJITSU ");
- break;
- case FLASH_MAN_MX:
- printf("MXIC ");
- break;
- default:
- printf("Unknown Vendor ");
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM040:
- printf("AM29LV040B (4 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM400B:
- printf("AM29LV400B (4 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM400T:
- printf("AM29LV400T (4 Mbit, top boot sector)\n");
- break;
- case FLASH_AM800B:
- printf("AM29LV800B (8 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM800T:
- printf("AM29LV800T (8 Mbit, top boot sector)\n");
- break;
- case FLASH_AM160B:
- printf("AM29LV160B (16 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM160T:
- printf("AM29LV160T (16 Mbit, top boot sector)\n");
- break;
- case FLASH_AM320B:
- printf("AM29LV320B (32 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM320T:
- printf("AM29LV320T (32 Mbit, top boot sector)\n");
- break;
- default:
- printf("Unknown Chip Type\n");
- break;
- }
-
- printf(" Size: %ld MB in %d Sectors\n", info->size >> 20, info->sector_count);
-
- printf(" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf("\n ");
- printf(" %08lX%s", info->start[i], info->protect[i] ? " (RO)" : " ");
- }
- printf("\n");
-}
-
-/*-----------------------------------------------------------------------
- */
-
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-
-static ulong flash_get_size(vu_long * addr, flash_info_t * info)
-{
- short i;
- uchar mid;
- uchar pid;
- vu_char *caddr = (vu_char *) addr;
- ulong base = (ulong) addr;
-
-
- /* Write auto select command: read Manufacturer ID */
- caddr[0x0555] = 0xAA;
- caddr[0x02AA] = 0x55;
- caddr[0x0555] = 0x90;
-
- mid = caddr[0];
- switch (mid) {
- case (AMD_MANUFACT & 0xFF):
- info->flash_id = FLASH_MAN_AMD;
- break;
- case (FUJ_MANUFACT & 0xFF):
- info->flash_id = FLASH_MAN_FUJ;
- break;
- case (MX_MANUFACT & 0xFF):
- info->flash_id = FLASH_MAN_MX;
- break;
- case (STM_MANUFACT & 0xFF):
- info->flash_id = FLASH_MAN_STM;
- break;
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- return (0); /* no or unknown flash */
- }
-
- pid = caddr[1]; /* device ID */
- switch (pid) {
- case (AMD_ID_LV400T & 0xFF):
- info->flash_id += FLASH_AM400T;
- info->sector_count = 11;
- info->size = 0x00080000;
- break; /* => 512 kB */
-
- case (AMD_ID_LV400B & 0xFF):
- info->flash_id += FLASH_AM400B;
- info->sector_count = 11;
- info->size = 0x00080000;
- break; /* => 512 kB */
-
- case (AMD_ID_LV800T & 0xFF):
- info->flash_id += FLASH_AM800T;
- info->sector_count = 19;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case (AMD_ID_LV800B & 0xFF):
- info->flash_id += FLASH_AM800B;
- info->sector_count = 19;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case (AMD_ID_LV160T & 0xFF):
- info->flash_id += FLASH_AM160T;
- info->sector_count = 35;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case (AMD_ID_LV160B & 0xFF):
- info->flash_id += FLASH_AM160B;
- info->sector_count = 35;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case (AMD_ID_LV040B & 0xFF):
- info->flash_id += FLASH_AM040;
- info->sector_count = 8;
- info->size = 0x00080000;
- break;
-
- case (STM_ID_M29W040B & 0xFF):
- info->flash_id += FLASH_AM040;
- info->sector_count = 8;
- info->size = 0x00080000;
- break;
-
-#if 0 /* enable when device IDs are available */
- case (AMD_ID_LV320T & 0xFF):
- info->flash_id += FLASH_AM320T;
- info->sector_count = 67;
- info->size = 0x00400000;
- break; /* => 4 MB */
-
- case (AMD_ID_LV320B & 0xFF):
- info->flash_id += FLASH_AM320B;
- info->sector_count = 67;
- info->size = 0x00400000;
- break; /* => 4 MB */
-#endif
- default:
- info->flash_id = FLASH_UNKNOWN;
- return (0); /* => no or unknown flash */
-
- }
-
- printf(" ");
- /* set up sector start address table */
- if ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM040) {
- for (i = 0; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00010000);
- }
- } else if (info->flash_id & FLASH_BTYPE) {
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00004000;
- info->start[2] = base + 0x00006000;
- info->start[3] = base + 0x00008000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00010000) - 0x00030000;
- }
- } else {
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- info->start[i--] = base + info->size - 0x00004000;
- info->start[i--] = base + info->size - 0x00006000;
- info->start[i--] = base + info->size - 0x00008000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00010000;
- }
- }
-
- /* check for protected sectors */
- for (i = 0; i < info->sector_count; i++) {
- /* read sector protection: D0 = 1 if protected */
- caddr = (volatile unsigned char *)(info->start[i]);
- info->protect[i] = caddr[2] & 1;
- }
-
- /*
- * Prevent writes to uninitialized FLASH.
- */
- if (info->flash_id != FLASH_UNKNOWN) {
- caddr = (vu_char *) info->start[0];
-
- caddr[0x0555] = 0xAA;
- caddr[0x02AA] = 0x55;
- caddr[0x0555] = 0xF0;
-
- udelay(20000);
- }
-
- return (info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase(flash_info_t * info, int s_first, int s_last)
-{
- vu_char *addr = (vu_char *) (info->start[0]);
- int flag, prot, sect, l_sect;
- ulong start, now, last;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf("- missing\n");
- } else {
- printf("- no sectors to erase\n");
- }
- return 1;
- }
-
- if ((info->flash_id == FLASH_UNKNOWN) ||
- (info->flash_id > FLASH_AMD_COMP)) {
- printf("Can't erase unknown flash type %08lx - aborted\n", info->flash_id);
- return 1;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf("- Warning: %d protected sectors will not be erased!\n", prot);
- } else {
- printf("\n");
- }
-
- l_sect = -1;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[0x0555] = 0xAA;
- addr[0x02AA] = 0x55;
- addr[0x0555] = 0x80;
- addr[0x0555] = 0xAA;
- addr[0x02AA] = 0x55;
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr = (vu_char *) (info->start[sect]);
- addr[0] = 0x30;
- l_sect = sect;
- }
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay(1000);
-
- /*
- * We wait for the last triggered sector
- */
- if (l_sect < 0)
- goto DONE;
-
- start = get_timer(0);
- last = start;
- addr = (vu_char *) (info->start[l_sect]);
- while ((addr[0] & 0x80) != 0x80) {
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf("Timeout\n");
- return 1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc('.');
- last = now;
- }
- }
-
- DONE:
- /* reset to read mode */
- addr = (vu_char *) info->start[0];
- addr[0] = 0xF0; /* reset bank */
-
- printf(" done\n");
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff(flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- int rc;
-
- while (cnt > 0) {
- if ((rc = write_byte(info, addr++, *src++)) != 0) {
- return (rc);
- }
- --cnt;
- }
-
- return (0);
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_byte(flash_info_t * info, ulong dest, uchar data)
-{
- vu_char *addr = (vu_char *) (info->start[0]);
- ulong start;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*((vu_char *) dest) & data) != data) {
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[0x0555] = 0xAA;
- addr[0x02AA] = 0x55;
- addr[0x0555] = 0xA0;
-
- *((vu_char *) dest) = data;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* data polling for D7 */
- start = get_timer(0);
- while ((*((vu_char *) dest) & 0x80) != (data & 0x80)) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- return (1);
- }
- }
- return (0);
-}
diff --git a/board/netta/netta.c b/board/netta/netta.c
deleted file mode 100644
index 9194bfb9de..0000000000
--- a/board/netta/netta.c
+++ /dev/null
@@ -1,600 +0,0 @@
-/*
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * Pantelis Antoniou, Intracom S.A., panto@intracom.gr
- * U-Boot port on NetTA4 board
- */
-
-#include <common.h>
-#include <miiphy.h>
-
-#include "mpc8xx.h"
-
-#ifdef CONFIG_HW_WATCHDOG
-#include <watchdog.h>
-#endif
-
-int fec8xx_miiphy_read(char *devname, unsigned char addr,
- unsigned char reg, unsigned short *value);
-int fec8xx_miiphy_write(char *devname, unsigned char addr,
- unsigned char reg, unsigned short value);
-
-/****************************************************************/
-
-/* some sane bit macros */
-#define _BD(_b) (1U << (31-(_b)))
-#define _BDR(_l, _h) (((((1U << (31-(_l))) - 1) << 1) | 1) & ~((1U << (31-(_h))) - 1))
-
-#define _BW(_b) (1U << (15-(_b)))
-#define _BWR(_l, _h) (((((1U << (15-(_l))) - 1) << 1) | 1) & ~((1U << (15-(_h))) - 1))
-
-#define _BB(_b) (1U << (7-(_b)))
-#define _BBR(_l, _h) (((((1U << (7-(_l))) - 1) << 1) | 1) & ~((1U << (7-(_h))) - 1))
-
-#define _B(_b) _BD(_b)
-#define _BR(_l, _h) _BDR(_l, _h)
-
-/****************************************************************/
-
-/*
- * Check Board Identity:
- *
- * Return 1 always.
- */
-
-int checkboard(void)
-{
- printf ("Intracom NETTA"
-#if defined(CONFIG_NETTA_ISDN)
- " with ISDN support"
-#endif
-#if defined(CONFIG_NETTA_6412)
- " (DSP:TI6412)"
-#else
- " (DSP:TI6711)"
-#endif
- "\n"
- );
- return (0);
-}
-
-/****************************************************************/
-
-#define _NOT_USED_ 0xFFFFFFFF
-
-/****************************************************************/
-
-#define CS_0000 0x00000000
-#define CS_0001 0x10000000
-#define CS_0010 0x20000000
-#define CS_0011 0x30000000
-#define CS_0100 0x40000000
-#define CS_0101 0x50000000
-#define CS_0110 0x60000000
-#define CS_0111 0x70000000
-#define CS_1000 0x80000000
-#define CS_1001 0x90000000
-#define CS_1010 0xA0000000
-#define CS_1011 0xB0000000
-#define CS_1100 0xC0000000
-#define CS_1101 0xD0000000
-#define CS_1110 0xE0000000
-#define CS_1111 0xF0000000
-
-#define BS_0000 0x00000000
-#define BS_0001 0x01000000
-#define BS_0010 0x02000000
-#define BS_0011 0x03000000
-#define BS_0100 0x04000000
-#define BS_0101 0x05000000
-#define BS_0110 0x06000000
-#define BS_0111 0x07000000
-#define BS_1000 0x08000000
-#define BS_1001 0x09000000
-#define BS_1010 0x0A000000
-#define BS_1011 0x0B000000
-#define BS_1100 0x0C000000
-#define BS_1101 0x0D000000
-#define BS_1110 0x0E000000
-#define BS_1111 0x0F000000
-
-#define A10_AAAA 0x00000000
-#define A10_AAA0 0x00200000
-#define A10_AAA1 0x00300000
-#define A10_000A 0x00800000
-#define A10_0000 0x00A00000
-#define A10_0001 0x00B00000
-#define A10_111A 0x00C00000
-#define A10_1110 0x00E00000
-#define A10_1111 0x00F00000
-
-#define RAS_0000 0x00000000
-#define RAS_0001 0x00040000
-#define RAS_1110 0x00080000
-#define RAS_1111 0x000C0000
-
-#define CAS_0000 0x00000000
-#define CAS_0001 0x00010000
-#define CAS_1110 0x00020000
-#define CAS_1111 0x00030000
-
-#define WE_0000 0x00000000
-#define WE_0001 0x00004000
-#define WE_1110 0x00008000
-#define WE_1111 0x0000C000
-
-#define GPL4_0000 0x00000000
-#define GPL4_0001 0x00001000
-#define GPL4_1110 0x00002000
-#define GPL4_1111 0x00003000
-
-#define GPL5_0000 0x00000000
-#define GPL5_0001 0x00000400
-#define GPL5_1110 0x00000800
-#define GPL5_1111 0x00000C00
-#define LOOP 0x00000080
-
-#define EXEN 0x00000040
-
-#define AMX_COL 0x00000000
-#define AMX_ROW 0x00000020
-#define AMX_MAR 0x00000030
-
-#define NA 0x00000008
-
-#define UTA 0x00000004
-
-#define TODT 0x00000002
-
-#define LAST 0x00000001
-
-/* #define CAS_LATENCY 3 */
-#define CAS_LATENCY 2
-
-const uint sdram_table[0x40] = {
-
-#if CAS_LATENCY == 3
- /* RSS */
- CS_0001 | BS_1111 | A10_AAAA | RAS_0001 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* ACT */
- CS_1111 | BS_1111 | A10_0000 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* NOP */
- CS_0000 | BS_1111 | A10_0001 | RAS_1111 | CAS_0001 | WE_1111 | AMX_COL | UTA, /* READ */
- CS_0001 | BS_0001 | A10_1111 | RAS_0001 | CAS_1111 | WE_0001 | AMX_COL | UTA, /* PALL */
- CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL, /* NOP */
- CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA | TODT | LAST, /* NOP */
- _NOT_USED_, _NOT_USED_,
-
- /* RBS */
- CS_0001 | BS_1111 | A10_AAAA | RAS_0001 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* ACT */
- CS_1111 | BS_1111 | A10_0000 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* NOP */
- CS_0001 | BS_1111 | A10_0001 | RAS_1111 | CAS_0001 | WE_1111 | AMX_COL | UTA, /* READ */
- CS_1111 | BS_0000 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* NOP */
- CS_1111 | BS_0000 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL, /* NOP */
- CS_1111 | BS_0000 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL, /* NOP */
- CS_0001 | BS_0001 | A10_1111 | RAS_0001 | CAS_1111 | WE_0001 | AMX_COL, /* PALL */
- CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | TODT | LAST, /* NOP */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /* WSS */
- CS_0001 | BS_1111 | A10_AAAA | RAS_0001 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* ACT */
- CS_1111 | BS_1111 | A10_0000 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL, /* NOP */
- CS_0000 | BS_0001 | A10_0000 | RAS_1111 | CAS_0001 | WE_0000 | AMX_COL | UTA, /* WRITE */
- CS_0001 | BS_1111 | A10_1111 | RAS_0001 | CAS_1111 | WE_0001 | AMX_COL | UTA, /* PALL */
- CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA | TODT | LAST, /* NOP */
- _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /* WBS */
- CS_0001 | BS_1111 | A10_AAAA | RAS_0001 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* ACT */
- CS_1111 | BS_1111 | A10_0000 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL, /* NOP */
- CS_0001 | BS_0000 | A10_0000 | RAS_1111 | CAS_0001 | WE_0000 | AMX_COL, /* WRITE */
- CS_1111 | BS_0000 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL, /* NOP */
- CS_1111 | BS_0000 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL, /* NOP */
- CS_1111 | BS_0001 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* NOP */
- CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* NOP */
- CS_0001 | BS_1111 | A10_1111 | RAS_0001 | CAS_1111 | WE_0001 | AMX_COL | UTA, /* PALL */
- CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA | TODT | LAST, /* NOP */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_,
-#endif
-
-#if CAS_LATENCY == 2
- /* RSS */
- CS_0001 | BS_1111 | A10_AAAA | RAS_0001 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* ACT */
- CS_1110 | BS_1110 | A10_0000 | RAS_1111 | CAS_1110 | WE_1111 | AMX_COL | UTA, /* NOP */
- CS_0001 | BS_0001 | A10_0000 | RAS_1111 | CAS_0001 | WE_1111 | AMX_COL | UTA, /* READ */
- CS_1110 | BS_1111 | A10_0001 | RAS_1110 | CAS_1111 | WE_1110 | AMX_COL, /* NOP */
- CS_0001 | BS_1111 | A10_1111 | RAS_0001 | CAS_1111 | WE_0001 | AMX_COL | UTA | TODT | LAST, /* PALL */
- _NOT_USED_,
- _NOT_USED_, _NOT_USED_,
-
- /* RBS */
- CS_0001 | BS_1111 | A10_AAAA | RAS_0001 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* ACT */
- CS_1110 | BS_1110 | A10_0000 | RAS_1111 | CAS_1110 | WE_1111 | AMX_COL | UTA, /* NOP */
- CS_0001 | BS_0000 | A10_0000 | RAS_1111 | CAS_0001 | WE_1111 | AMX_COL | UTA, /* READ */
- CS_1111 | BS_0000 | A10_0000 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL, /* NOP */
- CS_1111 | BS_0000 | A10_0000 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL, /* NOP */
- CS_1111 | BS_0001 | A10_0000 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL, /* NOP */
- CS_1110 | BS_1111 | A10_0001 | RAS_1110 | CAS_1111 | WE_1110 | AMX_COL, /* NOP */
- CS_0001 | BS_1111 | A10_1111 | RAS_0001 | CAS_1111 | WE_0001 | AMX_COL | UTA | TODT | LAST, /* PALL */
- _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /* WSS */
- CS_0001 | BS_1111 | A10_AAA0 | RAS_0001 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* ACT */
- CS_1110 | BS_1110 | A10_0000 | RAS_1111 | CAS_1110 | WE_1110 | AMX_COL, /* NOP */
- CS_0000 | BS_0001 | A10_0001 | RAS_1110 | CAS_0001 | WE_0000 | AMX_COL | UTA, /* WRITE */
- CS_0001 | BS_1111 | A10_1111 | RAS_0001 | CAS_1111 | WE_0001 | AMX_COL | UTA | TODT | LAST, /* PALL */
- _NOT_USED_,
- _NOT_USED_, _NOT_USED_,
- _NOT_USED_,
-
- /* WBS */
- CS_0001 | BS_1111 | A10_AAAA | RAS_0001 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* ACT */
- CS_1110 | BS_1110 | A10_0000 | RAS_1111 | CAS_1110 | WE_1110 | AMX_COL, /* NOP */
- CS_0001 | BS_0000 | A10_0000 | RAS_1111 | CAS_0001 | WE_0001 | AMX_COL, /* WRITE */
- CS_1111 | BS_0000 | A10_0000 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL, /* NOP */
- CS_1111 | BS_0000 | A10_0000 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL, /* NOP */
- CS_1110 | BS_0001 | A10_0001 | RAS_1110 | CAS_1111 | WE_1110 | AMX_COL | UTA, /* NOP */
- CS_0001 | BS_1111 | A10_1111 | RAS_0001 | CAS_1111 | WE_0001 | AMX_COL | UTA | TODT | LAST, /* PALL */
- _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_,
-
-#endif
-
- /* UPT */
- CS_0001 | BS_1111 | A10_1111 | RAS_0001 | CAS_0001 | WE_1111 | AMX_COL | UTA | LOOP, /* ATRFR */
- CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* NOP */
- CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* NOP */
- CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* NOP */
- CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA | LOOP, /* NOP */
- CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA | TODT | LAST, /* NOP */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_,
-
- /* EXC */
- CS_0001 | BS_1111 | A10_1111 | RAS_0001 | CAS_1111 | WE_0001 | AMX_COL | UTA | LAST,
- _NOT_USED_,
-
- /* REG */
- CS_1110 | BS_1111 | A10_1110 | RAS_1110 | CAS_1110 | WE_1110 | AMX_MAR | UTA,
- CS_0001 | BS_1111 | A10_0001 | RAS_0001 | CAS_0001 | WE_0001 | AMX_MAR | UTA | LAST,
-};
-
-/* 0xC8 = 0b11001000 , CAS3, >> 2 = 0b00 11 0 010 */
-/* 0x88 = 0b10001000 , CAS2, >> 2 = 0b00 10 0 010 */
-#define MAR_SDRAM_INIT ((CAS_LATENCY << 6) | 0x00000008LU)
-
-/* 8 */
-#define CFG_MAMR ((CFG_MAMR_PTA << MAMR_PTA_SHIFT) | MAMR_PTAE | \
- MAMR_AMA_TYPE_0 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A11 | \
- MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X)
-
-void check_ram(unsigned int addr, unsigned int size)
-{
- unsigned int i, j, v, vv;
- volatile unsigned int *p;
- unsigned int pv;
-
- p = (unsigned int *)addr;
- pv = (unsigned int)p;
- for (i = 0; i < size / sizeof(unsigned int); i++, pv += sizeof(unsigned int))
- *p++ = pv;
-
- p = (unsigned int *)addr;
- for (i = 0; i < size / sizeof(unsigned int); i++) {
- v = (unsigned int)p;
- vv = *p;
- if (vv != v) {
- printf("%p: read %08x instead of %08x\n", p, vv, v);
- hang();
- }
- p++;
- }
-
- for (j = 0; j < 5; j++) {
- switch (j) {
- case 0: v = 0x00000000; break;
- case 1: v = 0xffffffff; break;
- case 2: v = 0x55555555; break;
- case 3: v = 0xaaaaaaaa; break;
- default:v = 0xdeadbeef; break;
- }
- p = (unsigned int *)addr;
- for (i = 0; i < size / sizeof(unsigned int); i++) {
- *p = v;
- vv = *p;
- if (vv != v) {
- printf("%p: read %08x instead of %08x\n", p, vv, v);
- hang();
- }
- *p = ~v;
- p++;
- }
- }
-}
-
-long int initdram(int board_type)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- long int size;
-
- upmconfig(UPMB, (uint *) sdram_table, sizeof(sdram_table) / sizeof(uint));
-
- /*
- * Preliminary prescaler for refresh
- */
- memctl->memc_mptpr = MPTPR_PTP_DIV8;
-
- memctl->memc_mar = MAR_SDRAM_INIT; /* 32-bit address to be output on the address bus if AMX = 0b11 */
-
- /*
- * Map controller bank 3 to the SDRAM bank at preliminary address.
- */
- memctl->memc_or3 = CFG_OR3_PRELIM;
- memctl->memc_br3 = CFG_BR3_PRELIM;
-
- memctl->memc_mbmr = CFG_MAMR & ~MAMR_PTAE; /* no refresh yet */
-
- udelay(200);
-
- /* perform SDRAM initialisation sequence */
- memctl->memc_mcr = MCR_OP_RUN | MCR_UPM_B | MCR_MB_CS3 | MCR_MLCF(1) | MCR_MAD(0x3C); /* precharge all */
- udelay(1);
-
- memctl->memc_mcr = MCR_OP_RUN | MCR_UPM_B | MCR_MB_CS3 | MCR_MLCF(2) | MCR_MAD(0x30); /* refresh 2 times(0) */
- udelay(1);
-
- memctl->memc_mcr = MCR_OP_RUN | MCR_UPM_B | MCR_MB_CS3 | MCR_MLCF(1) | MCR_MAD(0x3E); /* exception program (write mar)*/
- udelay(1);
-
- memctl->memc_mbmr |= MAMR_PTAE; /* enable refresh */
-
- udelay(10000);
-
- {
- u32 d1, d2;
-
- d1 = 0xAA55AA55;
- *(volatile u32 *)0 = d1;
- d2 = *(volatile u32 *)0;
- if (d1 != d2) {
- printf("DRAM fails: wrote 0x%08x read 0x%08x\n", d1, d2);
- hang();
- }
-
- d1 = 0x55AA55AA;
- *(volatile u32 *)0 = d1;
- d2 = *(volatile u32 *)0;
- if (d1 != d2) {
- printf("DRAM fails: wrote 0x%08x read 0x%08x\n", d1, d2);
- hang();
- }
- }
-
- size = get_ram_size((long *)0, SDRAM_MAX_SIZE);
-
-#if 0
- printf("check 0\n");
- check_ram(( 0 << 20), (2 << 20));
- printf("check 16\n");
- check_ram((16 << 20), (2 << 20));
- printf("check 32\n");
- check_ram((32 << 20), (2 << 20));
- printf("check 48\n");
- check_ram((48 << 20), (2 << 20));
-#endif
-
- if (size == 0) {
- printf("SIZE is zero: LOOP on 0\n");
- for (;;) {
- *(volatile u32 *)0 = 0;
- (void)*(volatile u32 *)0;
- }
- }
-
- return size;
-}
-
-/* ------------------------------------------------------------------------- */
-
-int misc_init_r(void)
-{
- return(0);
-}
-
-void reset_phys(void)
-{
- int phyno;
- unsigned short v;
-
- /* reset the damn phys */
- mii_init();
-
- for (phyno = 0; phyno < 32; ++phyno) {
- fec8xx_miiphy_read(NULL, phyno, PHY_PHYIDR1, &v);
- if (v == 0xFFFF)
- continue;
- fec8xx_miiphy_write(NULL, phyno, PHY_BMCR, PHY_BMCR_POWD);
- udelay(10000);
- fec8xx_miiphy_write(NULL, phyno, PHY_BMCR,
- PHY_BMCR_RESET | PHY_BMCR_AUTON);
- udelay(10000);
- }
-}
-
-extern int board_dsp_reset(void);
-
-int last_stage_init(void)
-{
- int r;
-
- reset_phys();
- r = board_dsp_reset();
- if (r < 0)
- printf("*** WARNING *** DSP reset failed (run diagnostics)\n");
- return 0;
-}
-
-/* ------------------------------------------------------------------------- */
-
-/* GP = general purpose, SP = special purpose (on chip peripheral) */
-
-/* bits that can have a special purpose or can be configured as inputs/outputs */
-#define PA_GP_INMASK (_BWR(3) | _BWR(7, 9) | _BW(11))
-#define PA_GP_OUTMASK (_BW(6) | _BW(10) | _BWR(12, 15))
-#define PA_SP_MASK (_BWR(0, 2) | _BWR(4, 5))
-#define PA_ODR_VAL 0
-#define PA_GP_OUTVAL (_BW(13) | _BWR(14, 15))
-#define PA_SP_DIRVAL 0
-
-#define PB_GP_INMASK (_B(28) | _B(31))
-#define PB_GP_OUTMASK (_BR(15, 19) | _BR(26, 27) | _BR(29, 30))
-#define PB_SP_MASK (_BR(22, 25))
-#define PB_ODR_VAL 0
-#define PB_GP_OUTVAL (_BR(15, 19) | _BR(26, 27) | _BR(29, 31))
-#define PB_SP_DIRVAL 0
-
-#define PC_GP_INMASK (_BW(5) | _BW(7) | _BW(8) | _BWR(9, 11) | _BWR(13, 15))
-#define PC_GP_OUTMASK (_BW(6) | _BW(12))
-#define PC_SP_MASK (_BW(4) | _BW(8))
-#define PC_SOVAL 0
-#define PC_INTVAL _BW(7)
-#define PC_GP_OUTVAL (_BW(6) | _BW(12))
-#define PC_SP_DIRVAL 0
-
-#define PD_GP_INMASK 0
-#define PD_GP_OUTMASK _BWR(3, 15)
-#define PD_SP_MASK 0
-
-#if defined(CONFIG_NETTA_6412)
-
-#define PD_GP_OUTVAL (_BWR(5, 7) | _BW(9) | _BW(11) | _BW(15))
-
-#else
-
-#define PD_GP_OUTVAL (_BWR(5, 7) | _BW(9) | _BW(11))
-
-#endif
-
-#define PD_SP_DIRVAL 0
-
-int board_early_init_f(void)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile iop8xx_t *ioport = &immap->im_ioport;
- volatile cpm8xx_t *cpm = &immap->im_cpm;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
-
- /* CS1: NAND chip select */
- memctl->memc_or1 = ((0xFFFFFFFFLU & ~(NAND_SIZE - 1)) | OR_BI | OR_SCY_2_CLK | OR_TRLX | OR_ACS_DIV2) ;
- memctl->memc_br1 = ((NAND_BASE & BR_BA_MSK) | BR_PS_8 | BR_V);
-#if !defined(CONFIG_NETTA_6412)
- /* CS2: DSP */
- memctl->memc_or2 = ((0xFFFFFFFFLU & ~(DSP_SIZE - 1)) | OR_CSNT_SAM | OR_BI | OR_SCY_7_CLK | OR_ACS_DIV2);
- memctl->memc_br2 = ((DSP_BASE & BR_BA_MSK) | BR_PS_16 | BR_V);
-#else
- /* CS6: DSP */
- memctl->memc_or6 = ((0xFFFFFFFFLU & ~(DSP_SIZE - 1)) | OR_CSNT_SAM | OR_BI | OR_SCY_7_CLK | OR_ACS_DIV2);
- memctl->memc_br6 = ((DSP_BASE & BR_BA_MSK) | BR_PS_16 | BR_V);
-#endif
- /* CS4: External register chip select */
- memctl->memc_or4 = ((0xFFFFFFFFLU & ~(ER_SIZE - 1)) | OR_BI | OR_SCY_4_CLK);
- memctl->memc_br4 = ((ER_BASE & BR_BA_MSK) | BR_PS_32 | BR_V);
-
- /* CS5: dummy for accurate delay */
- memctl->memc_or5 = ((0xFFFFFFFFLU & ~(DUMMY_SIZE - 1)) | OR_CSNT_SAM | OR_BI | OR_SCY_0_CLK | OR_ACS_DIV2);
- memctl->memc_br5 = ((DUMMY_BASE & BR_BA_MSK) | BR_PS_32 | BR_V);
-
- ioport->iop_padat = PA_GP_OUTVAL;
- ioport->iop_paodr = PA_ODR_VAL;
- ioport->iop_padir = PA_GP_OUTMASK | PA_SP_DIRVAL;
- ioport->iop_papar = PA_SP_MASK;
-
- cpm->cp_pbdat = PB_GP_OUTVAL;
- cpm->cp_pbodr = PB_ODR_VAL;
- cpm->cp_pbdir = PB_GP_OUTMASK | PB_SP_DIRVAL;
- cpm->cp_pbpar = PB_SP_MASK;
-
- ioport->iop_pcdat = PC_GP_OUTVAL;
- ioport->iop_pcdir = PC_GP_OUTMASK | PC_SP_DIRVAL;
- ioport->iop_pcso = PC_SOVAL;
- ioport->iop_pcint = PC_INTVAL;
- ioport->iop_pcpar = PC_SP_MASK;
-
- ioport->iop_pddat = PD_GP_OUTVAL;
- ioport->iop_pddir = PD_GP_OUTMASK | PD_SP_DIRVAL;
- ioport->iop_pdpar = PD_SP_MASK;
-
- /* ioport->iop_pddat |= (1 << (15 - 6)) | (1 << (15 - 7)); */
-
- return 0;
-}
-
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
-
-#include <linux/mtd/nand.h>
-
-extern ulong nand_probe(ulong physadr);
-extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
-
-void nand_init(void)
-{
- unsigned long totlen = nand_probe(CFG_NAND_BASE);
-
- printf ("%4lu MB\n", totlen >> 20);
-}
-#endif
-
-#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
-
-int pcmcia_init(void)
-{
- return 0;
-}
-
-#endif
-
-#ifdef CONFIG_POST
-/*
- * Returns 1 if keys pressed to start the power-on long-running tests
- * Called from board_init_f().
- */
-int post_hotkeys_pressed(void)
-{
- return 0; /* No hotkeys supported */
-}
-#endif
-
-#ifdef CONFIG_HW_WATCHDOG
-
-void hw_watchdog_reset(void)
-{
- /* XXX add here the really funky stuff */
-}
-
-#endif
diff --git a/board/netta/u-boot.lds b/board/netta/u-boot.lds
deleted file mode 100644
index 9f2901c869..0000000000
--- a/board/netta/u-boot.lds
+++ /dev/null
@@ -1,141 +0,0 @@
-/*
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc8xx/start.o (.text)
- cpu/mpc8xx/traps.o (.text)
- common/dlmalloc.o (.text)
- lib_ppc/ppcstring.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
- lib_generic/zlib.o (.text)
- lib_ppc/cache.o (.text)
- lib_ppc/time.o (.text)
-
- . = DEFINED(env_offset) ? env_offset : .;
- common/environment.o (.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/netta/u-boot.lds.debug b/board/netta/u-boot.lds.debug
deleted file mode 100644
index 004e7fd354..0000000000
--- a/board/netta/u-boot.lds.debug
+++ /dev/null
@@ -1,137 +0,0 @@
-/*
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc8xx/start.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
-
- . = env_offset;
- common/environment.o(.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/netta2/Makefile b/board/netta2/Makefile
deleted file mode 100644
index d45702091f..0000000000
--- a/board/netta2/Makefile
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# (C) Copyright 2000-2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/netta2/config.mk b/board/netta2/config.mk
deleted file mode 100644
index 8497ebc812..0000000000
--- a/board/netta2/config.mk
+++ /dev/null
@@ -1,28 +0,0 @@
-#
-# (C) Copyright 2000-2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# netVia Boards
-#
-
-TEXT_BASE = 0x40000000
diff --git a/board/netta2/flash.c b/board/netta2/flash.c
deleted file mode 100644
index a1c87f5131..0000000000
--- a/board/netta2/flash.c
+++ /dev/null
@@ -1,506 +0,0 @@
-/*
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size(vu_long * addr, flash_info_t * info);
-static int write_byte(flash_info_t * info, ulong dest, uchar data);
-static void flash_get_offsets(ulong base, flash_info_t * info);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init(void)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- unsigned long size;
- int i;
-
- /* Init: no FLASHes known */
- for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i)
- flash_info[i].flash_id = FLASH_UNKNOWN;
-
- size = flash_get_size((vu_long *) FLASH_BASE0_PRELIM, &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size, size << 20);
- }
-
- /* Remap FLASH according to real size */
- memctl->memc_or0 = CFG_OR_TIMING_FLASH | (-size & 0xFFFF8000);
- memctl->memc_br0 = (CFG_FLASH_BASE & BR_BA_MSK) | (memctl->memc_br0 & ~(BR_BA_MSK));
-
- /* Re-do sizing to get full correct info */
- size = flash_get_size((vu_long *) CFG_FLASH_BASE, &flash_info[0]);
-
- flash_get_offsets(CFG_FLASH_BASE, &flash_info[0]);
-
- /* monitor protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_FLASH_BASE, CFG_FLASH_BASE + monitor_flash_len - 1,
- &flash_info[0]);
-
- flash_protect ( FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1,
- &flash_info[0]);
-
-#ifdef CFG_ENV_ADDR_REDUND
- flash_protect ( FLAG_PROTECT_SET,
- CFG_ENV_ADDR_REDUND,
- CFG_ENV_ADDR_REDUND + CFG_ENV_SIZE_REDUND - 1,
- &flash_info[0]);
-#endif
-
- flash_info[0].size = size;
-
- return (size);
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_get_offsets(ulong base, flash_info_t * info)
-{
- int i;
-
- /* set up sector start address table */
- if ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM040) {
- for (i = 0; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00010000);
- }
- } else if (info->flash_id & FLASH_BTYPE) {
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00004000;
- info->start[2] = base + 0x00006000;
- info->start[3] = base + 0x00008000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00010000) - 0x00030000;
- }
- } else {
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- info->start[i--] = base + info->size - 0x00004000;
- info->start[i--] = base + info->size - 0x00006000;
- info->start[i--] = base + info->size - 0x00008000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00010000;
- }
- }
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info(flash_info_t * info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD:
- printf("AMD ");
- break;
- case FLASH_MAN_FUJ:
- printf("FUJITSU ");
- break;
- case FLASH_MAN_MX:
- printf("MXIC ");
- break;
- default:
- printf("Unknown Vendor ");
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM040:
- printf("AM29LV040B (4 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM400B:
- printf("AM29LV400B (4 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM400T:
- printf("AM29LV400T (4 Mbit, top boot sector)\n");
- break;
- case FLASH_AM800B:
- printf("AM29LV800B (8 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM800T:
- printf("AM29LV800T (8 Mbit, top boot sector)\n");
- break;
- case FLASH_AM160B:
- printf("AM29LV160B (16 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM160T:
- printf("AM29LV160T (16 Mbit, top boot sector)\n");
- break;
- case FLASH_AM320B:
- printf("AM29LV320B (32 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM320T:
- printf("AM29LV320T (32 Mbit, top boot sector)\n");
- break;
- default:
- printf("Unknown Chip Type\n");
- break;
- }
-
- printf(" Size: %ld MB in %d Sectors\n", info->size >> 20, info->sector_count);
-
- printf(" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf("\n ");
- printf(" %08lX%s", info->start[i], info->protect[i] ? " (RO)" : " ");
- }
- printf("\n");
-}
-
-/*-----------------------------------------------------------------------
- */
-
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-
-static ulong flash_get_size(vu_long * addr, flash_info_t * info)
-{
- short i;
- uchar mid;
- uchar pid;
- vu_char *caddr = (vu_char *) addr;
- ulong base = (ulong) addr;
-
- /* Write auto select command: read Manufacturer ID */
- caddr[0x0555] = 0xAA;
- caddr[0x02AA] = 0x55;
- caddr[0x0555] = 0x90;
-
- mid = caddr[0];
- switch (mid) {
- case (AMD_MANUFACT & 0xFF):
- info->flash_id = FLASH_MAN_AMD;
- break;
- case (FUJ_MANUFACT & 0xFF):
- info->flash_id = FLASH_MAN_FUJ;
- break;
- case (MX_MANUFACT & 0xFF):
- info->flash_id = FLASH_MAN_MX;
- break;
- case (STM_MANUFACT & 0xFF):
- info->flash_id = FLASH_MAN_STM;
- break;
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- return (0); /* no or unknown flash */
- }
-
- pid = caddr[1]; /* device ID */
- switch (pid) {
- case (AMD_ID_LV400T & 0xFF):
- info->flash_id += FLASH_AM400T;
- info->sector_count = 11;
- info->size = 0x00080000;
- break; /* => 512 kB */
-
- case (AMD_ID_LV400B & 0xFF):
- info->flash_id += FLASH_AM400B;
- info->sector_count = 11;
- info->size = 0x00080000;
- break; /* => 512 kB */
-
- case (AMD_ID_LV800T & 0xFF):
- info->flash_id += FLASH_AM800T;
- info->sector_count = 19;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case (AMD_ID_LV800B & 0xFF):
- info->flash_id += FLASH_AM800B;
- info->sector_count = 19;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case (AMD_ID_LV160T & 0xFF):
- info->flash_id += FLASH_AM160T;
- info->sector_count = 35;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case (AMD_ID_LV160B & 0xFF):
- info->flash_id += FLASH_AM160B;
- info->sector_count = 35;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case (AMD_ID_LV040B & 0xFF):
- info->flash_id += FLASH_AM040;
- info->sector_count = 8;
- info->size = 0x00080000;
- break;
-
- case (STM_ID_M29W040B & 0xFF):
- info->flash_id += FLASH_AM040;
- info->sector_count = 8;
- info->size = 0x00080000;
- break;
-
-#if 0 /* enable when device IDs are available */
- case (AMD_ID_LV320T & 0xFF):
- info->flash_id += FLASH_AM320T;
- info->sector_count = 67;
- info->size = 0x00400000;
- break; /* => 4 MB */
-
- case (AMD_ID_LV320B & 0xFF):
- info->flash_id += FLASH_AM320B;
- info->sector_count = 67;
- info->size = 0x00400000;
- break; /* => 4 MB */
-#endif
- default:
- info->flash_id = FLASH_UNKNOWN;
- return (0); /* => no or unknown flash */
-
- }
-
- printf(" ");
- /* set up sector start address table */
- if ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM040) {
- for (i = 0; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00010000);
- }
- } else if (info->flash_id & FLASH_BTYPE) {
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00004000;
- info->start[2] = base + 0x00006000;
- info->start[3] = base + 0x00008000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00010000) - 0x00030000;
- }
- } else {
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- info->start[i--] = base + info->size - 0x00004000;
- info->start[i--] = base + info->size - 0x00006000;
- info->start[i--] = base + info->size - 0x00008000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00010000;
- }
- }
-
- /* check for protected sectors */
- for (i = 0; i < info->sector_count; i++) {
- /* read sector protection: D0 = 1 if protected */
- caddr = (volatile unsigned char *)(info->start[i]);
- info->protect[i] = caddr[2] & 1;
- }
-
- /*
- * Prevent writes to uninitialized FLASH.
- */
- if (info->flash_id != FLASH_UNKNOWN) {
- caddr = (vu_char *) info->start[0];
-
- caddr[0x0555] = 0xAA;
- caddr[0x02AA] = 0x55;
- caddr[0x0555] = 0xF0;
-
- udelay(20000);
- }
-
- return (info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase(flash_info_t * info, int s_first, int s_last)
-{
- vu_char *addr = (vu_char *) (info->start[0]);
- int flag, prot, sect, l_sect;
- ulong start, now, last;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf("- missing\n");
- } else {
- printf("- no sectors to erase\n");
- }
- return 1;
- }
-
- if ((info->flash_id == FLASH_UNKNOWN) ||
- (info->flash_id > FLASH_AMD_COMP)) {
- printf("Can't erase unknown flash type %08lx - aborted\n", info->flash_id);
- return 1;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf("- Warning: %d protected sectors will not be erased!\n", prot);
- } else {
- printf("\n");
- }
-
- l_sect = -1;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[0x0555] = 0xAA;
- addr[0x02AA] = 0x55;
- addr[0x0555] = 0x80;
- addr[0x0555] = 0xAA;
- addr[0x02AA] = 0x55;
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr = (vu_char *) (info->start[sect]);
- addr[0] = 0x30;
- l_sect = sect;
- }
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay(1000);
-
- /*
- * We wait for the last triggered sector
- */
- if (l_sect < 0)
- goto DONE;
-
- start = get_timer(0);
- last = start;
- addr = (vu_char *) (info->start[l_sect]);
- while ((addr[0] & 0x80) != 0x80) {
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf("Timeout\n");
- return 1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc('.');
- last = now;
- }
- }
-
-DONE:
- /* reset to read mode */
- addr = (vu_char *) info->start[0];
- addr[0] = 0xF0; /* reset bank */
-
- printf(" done\n");
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff(flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- int rc;
-
- while (cnt > 0) {
- if ((rc = write_byte(info, addr++, *src++)) != 0) {
- return (rc);
- }
- --cnt;
- }
-
- return (0);
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_byte(flash_info_t * info, ulong dest, uchar data)
-{
- vu_char *addr = (vu_char *) (info->start[0]);
- ulong start;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*((vu_char *) dest) & data) != data) {
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[0x0555] = 0xAA;
- addr[0x02AA] = 0x55;
- addr[0x0555] = 0xA0;
-
- *((vu_char *) dest) = data;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* data polling for D7 */
- start = get_timer(0);
- while ((*((vu_char *) dest) & 0x80) != (data & 0x80)) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- return (1);
- }
- }
- return (0);
-}
diff --git a/board/netta2/netta2.c b/board/netta2/netta2.c
deleted file mode 100644
index c9b405145e..0000000000
--- a/board/netta2/netta2.c
+++ /dev/null
@@ -1,670 +0,0 @@
-/*
- * (C) Copyright 2000-2004
- * Pantelis Antoniou, Intracom S.A., panto@intracom.gr
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * Pantelis Antoniou, Intracom S.A., panto@intracom.gr
- * U-Boot port on NetTA4 board
- */
-
-#include <common.h>
-#include <miiphy.h>
-
-#include "mpc8xx.h"
-
-#ifdef CONFIG_HW_WATCHDOG
-#include <watchdog.h>
-#endif
-
-int fec8xx_miiphy_read(char *devname, unsigned char addr,
- unsigned char reg, unsigned short *value);
-int fec8xx_miiphy_write(char *devname, unsigned char addr,
- unsigned char reg, unsigned short value);
-
-/****************************************************************/
-
-/* some sane bit macros */
-#define _BD(_b) (1U << (31-(_b)))
-#define _BDR(_l, _h) (((((1U << (31-(_l))) - 1) << 1) | 1) & ~((1U << (31-(_h))) - 1))
-
-#define _BW(_b) (1U << (15-(_b)))
-#define _BWR(_l, _h) (((((1U << (15-(_l))) - 1) << 1) | 1) & ~((1U << (15-(_h))) - 1))
-
-#define _BB(_b) (1U << (7-(_b)))
-#define _BBR(_l, _h) (((((1U << (7-(_l))) - 1) << 1) | 1) & ~((1U << (7-(_h))) - 1))
-
-#define _B(_b) _BD(_b)
-#define _BR(_l, _h) _BDR(_l, _h)
-
-/****************************************************************/
-
-/*
- * Check Board Identity:
- *
- * Return 1 always.
- */
-
-int checkboard(void)
-{
- printf ("Intracom NetTA2 V%d\n", CONFIG_NETTA2_VERSION);
- return (0);
-}
-
-/****************************************************************/
-
-#define _NOT_USED_ 0xFFFFFFFF
-
-/****************************************************************/
-
-#define CS_0000 0x00000000
-#define CS_0001 0x10000000
-#define CS_0010 0x20000000
-#define CS_0011 0x30000000
-#define CS_0100 0x40000000
-#define CS_0101 0x50000000
-#define CS_0110 0x60000000
-#define CS_0111 0x70000000
-#define CS_1000 0x80000000
-#define CS_1001 0x90000000
-#define CS_1010 0xA0000000
-#define CS_1011 0xB0000000
-#define CS_1100 0xC0000000
-#define CS_1101 0xD0000000
-#define CS_1110 0xE0000000
-#define CS_1111 0xF0000000
-
-#define BS_0000 0x00000000
-#define BS_0001 0x01000000
-#define BS_0010 0x02000000
-#define BS_0011 0x03000000
-#define BS_0100 0x04000000
-#define BS_0101 0x05000000
-#define BS_0110 0x06000000
-#define BS_0111 0x07000000
-#define BS_1000 0x08000000
-#define BS_1001 0x09000000
-#define BS_1010 0x0A000000
-#define BS_1011 0x0B000000
-#define BS_1100 0x0C000000
-#define BS_1101 0x0D000000
-#define BS_1110 0x0E000000
-#define BS_1111 0x0F000000
-
-#define GPL0_AAAA 0x00000000
-#define GPL0_AAA0 0x00200000
-#define GPL0_AAA1 0x00300000
-#define GPL0_000A 0x00800000
-#define GPL0_0000 0x00A00000
-#define GPL0_0001 0x00B00000
-#define GPL0_111A 0x00C00000
-#define GPL0_1110 0x00E00000
-#define GPL0_1111 0x00F00000
-
-#define GPL1_0000 0x00000000
-#define GPL1_0001 0x00040000
-#define GPL1_1110 0x00080000
-#define GPL1_1111 0x000C0000
-
-#define GPL2_0000 0x00000000
-#define GPL2_0001 0x00010000
-#define GPL2_1110 0x00020000
-#define GPL2_1111 0x00030000
-
-#define GPL3_0000 0x00000000
-#define GPL3_0001 0x00004000
-#define GPL3_1110 0x00008000
-#define GPL3_1111 0x0000C000
-
-#define GPL4_0000 0x00000000
-#define GPL4_0001 0x00001000
-#define GPL4_1110 0x00002000
-#define GPL4_1111 0x00003000
-
-#define GPL5_0000 0x00000000
-#define GPL5_0001 0x00000400
-#define GPL5_1110 0x00000800
-#define GPL5_1111 0x00000C00
-#define LOOP 0x00000080
-
-#define EXEN 0x00000040
-
-#define AMX_COL 0x00000000
-#define AMX_ROW 0x00000020
-#define AMX_MAR 0x00000030
-
-#define NA 0x00000008
-
-#define UTA 0x00000004
-
-#define TODT 0x00000002
-
-#define LAST 0x00000001
-
-#define A10_AAAA GPL0_AAAA
-#define A10_AAA0 GPL0_AAA0
-#define A10_AAA1 GPL0_AAA1
-#define A10_000A GPL0_000A
-#define A10_0000 GPL0_0000
-#define A10_0001 GPL0_0001
-#define A10_111A GPL0_111A
-#define A10_1110 GPL0_1110
-#define A10_1111 GPL0_1111
-
-#define RAS_0000 GPL1_0000
-#define RAS_0001 GPL1_0001
-#define RAS_1110 GPL1_1110
-#define RAS_1111 GPL1_1111
-
-#define CAS_0000 GPL2_0000
-#define CAS_0001 GPL2_0001
-#define CAS_1110 GPL2_1110
-#define CAS_1111 GPL2_1111
-
-#define WE_0000 GPL3_0000
-#define WE_0001 GPL3_0001
-#define WE_1110 GPL3_1110
-#define WE_1111 GPL3_1111
-
-/* #define CAS_LATENCY 3 */
-#define CAS_LATENCY 2
-
-const uint sdram_table[0x40] = {
-
-#if CAS_LATENCY == 3
- /* RSS */
- CS_0001 | BS_1111 | A10_AAAA | RAS_0001 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* ACT */
- CS_1111 | BS_1111 | A10_0000 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* NOP */
- CS_0000 | BS_1111 | A10_0001 | RAS_1111 | CAS_0001 | WE_1111 | AMX_COL | UTA, /* READ */
- CS_0001 | BS_0001 | A10_1111 | RAS_0001 | CAS_1111 | WE_0001 | AMX_COL | UTA, /* PALL */
- CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL, /* NOP */
- CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA | TODT | LAST, /* NOP */
- _NOT_USED_, _NOT_USED_,
-
- /* RBS */
- CS_0001 | BS_1111 | A10_AAAA | RAS_0001 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* ACT */
- CS_1111 | BS_1111 | A10_0000 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* NOP */
- CS_0001 | BS_1111 | A10_0001 | RAS_1111 | CAS_0001 | WE_1111 | AMX_COL | UTA, /* READ */
- CS_1111 | BS_0000 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* NOP */
- CS_1111 | BS_0000 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL, /* NOP */
- CS_1111 | BS_0000 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL, /* NOP */
- CS_0001 | BS_0001 | A10_1111 | RAS_0001 | CAS_1111 | WE_0001 | AMX_COL, /* PALL */
- CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | TODT | LAST, /* NOP */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /* WSS */
- CS_0001 | BS_1111 | A10_AAAA | RAS_0001 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* ACT */
- CS_1111 | BS_1111 | A10_0000 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL, /* NOP */
- CS_0000 | BS_0001 | A10_0000 | RAS_1111 | CAS_0001 | WE_0000 | AMX_COL | UTA, /* WRITE */
- CS_0001 | BS_1111 | A10_1111 | RAS_0001 | CAS_1111 | WE_0001 | AMX_COL | UTA, /* PALL */
- CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA | TODT | LAST, /* NOP */
- _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /* WBS */
- CS_0001 | BS_1111 | A10_AAAA | RAS_0001 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* ACT */
- CS_1111 | BS_1111 | A10_0000 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL, /* NOP */
- CS_0001 | BS_0000 | A10_0000 | RAS_1111 | CAS_0001 | WE_0000 | AMX_COL, /* WRITE */
- CS_1111 | BS_0000 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL, /* NOP */
- CS_1111 | BS_0000 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL, /* NOP */
- CS_1111 | BS_0001 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* NOP */
- CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* NOP */
- CS_0001 | BS_1111 | A10_1111 | RAS_0001 | CAS_1111 | WE_0001 | AMX_COL | UTA, /* PALL */
- CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA | TODT | LAST, /* NOP */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_,
-#endif
-
-#if CAS_LATENCY == 2
- /* RSS */
- CS_0001 | BS_1111 | A10_AAAA | RAS_0001 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* ACT */
- CS_1110 | BS_1110 | A10_0000 | RAS_1111 | CAS_1110 | WE_1111 | AMX_COL | UTA, /* NOP */
- CS_0001 | BS_0001 | A10_0000 | RAS_1111 | CAS_0001 | WE_1111 | AMX_COL | UTA, /* READ */
- CS_1110 | BS_1111 | A10_0001 | RAS_1110 | CAS_1111 | WE_1110 | AMX_COL, /* NOP */
- CS_0001 | BS_1111 | A10_1111 | RAS_0001 | CAS_1111 | WE_0001 | AMX_COL | UTA | TODT | LAST, /* PALL */
- _NOT_USED_,
- _NOT_USED_, _NOT_USED_,
-
- /* RBS */
- CS_0001 | BS_1111 | A10_AAAA | RAS_0001 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* ACT */
- CS_1110 | BS_1110 | A10_0000 | RAS_1111 | CAS_1110 | WE_1111 | AMX_COL | UTA, /* NOP */
- CS_0001 | BS_0000 | A10_0000 | RAS_1111 | CAS_0001 | WE_1111 | AMX_COL | UTA, /* READ */
- CS_1111 | BS_0000 | A10_0000 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL, /* NOP */
- CS_1111 | BS_0000 | A10_0000 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL, /* NOP */
- CS_1111 | BS_0001 | A10_0000 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL, /* NOP */
- CS_1110 | BS_1111 | A10_0001 | RAS_1110 | CAS_1111 | WE_1110 | AMX_COL, /* NOP */
- CS_0001 | BS_1111 | A10_1111 | RAS_0001 | CAS_1111 | WE_0001 | AMX_COL | UTA | TODT | LAST, /* PALL */
- _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /* WSS */
- CS_0001 | BS_1111 | A10_AAA0 | RAS_0001 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* ACT */
- CS_1110 | BS_1110 | A10_0000 | RAS_1111 | CAS_1110 | WE_1110 | AMX_COL, /* NOP */
- CS_0000 | BS_0001 | A10_0001 | RAS_1110 | CAS_0001 | WE_0000 | AMX_COL | UTA, /* WRITE */
- CS_0001 | BS_1111 | A10_1111 | RAS_0001 | CAS_1111 | WE_0001 | AMX_COL | UTA | TODT | LAST, /* PALL */
- _NOT_USED_,
- _NOT_USED_, _NOT_USED_,
- _NOT_USED_,
-
- /* WBS */
- CS_0001 | BS_1111 | A10_AAAA | RAS_0001 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* ACT */
- CS_1110 | BS_1110 | A10_0000 | RAS_1111 | CAS_1110 | WE_1110 | AMX_COL, /* NOP */
- CS_0001 | BS_0000 | A10_0000 | RAS_1111 | CAS_0001 | WE_0001 | AMX_COL, /* WRITE */
- CS_1111 | BS_0000 | A10_0000 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL, /* NOP */
- CS_1111 | BS_0000 | A10_0000 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL, /* NOP */
- CS_1110 | BS_0001 | A10_0001 | RAS_1110 | CAS_1111 | WE_1110 | AMX_COL | UTA, /* NOP */
- CS_0001 | BS_1111 | A10_1111 | RAS_0001 | CAS_1111 | WE_0001 | AMX_COL | UTA | TODT | LAST, /* PALL */
- _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_,
-
-#endif
-
- /* UPT */
- CS_0001 | BS_1111 | A10_1111 | RAS_0001 | CAS_0001 | WE_1111 | AMX_COL | UTA | LOOP, /* ATRFR */
- CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* NOP */
- CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* NOP */
- CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* NOP */
- CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA | LOOP, /* NOP */
- CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA | TODT | LAST, /* NOP */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_,
-
- /* EXC */
- CS_0001 | BS_1111 | A10_1111 | RAS_0001 | CAS_1111 | WE_0001 | AMX_COL | UTA | LAST,
- _NOT_USED_,
-
- /* REG */
- CS_1110 | BS_1111 | A10_1110 | RAS_1110 | CAS_1110 | WE_1110 | AMX_MAR | UTA,
- CS_0001 | BS_1111 | A10_0001 | RAS_0001 | CAS_0001 | WE_0001 | AMX_MAR | UTA | LAST,
-};
-
-#if CONFIG_NETTA2_VERSION == 2
-static const uint nandcs_table[0x40] = {
- /* RSS */
- CS_1000 | GPL4_1111 | GPL5_1111 | UTA,
- CS_0000 | GPL4_1110 | GPL5_1111 | UTA,
- CS_0000 | GPL4_0000 | GPL5_1111 | UTA,
- CS_0000 | GPL4_0000 | GPL5_1111 | UTA,
- CS_0000 | GPL4_0000 | GPL5_1111,
- CS_0000 | GPL4_0001 | GPL5_1111 | UTA,
- CS_0000 | GPL4_1111 | GPL5_1111 | UTA,
- CS_0011 | GPL4_1111 | GPL5_1111 | UTA | LAST, /* NOP */
-
- /* RBS */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /* WSS */
- CS_1000 | GPL4_1111 | GPL5_1110 | UTA,
- CS_0000 | GPL4_1111 | GPL5_0000 | UTA,
- CS_0000 | GPL4_1111 | GPL5_0000 | UTA,
- CS_0000 | GPL4_1111 | GPL5_0000 | UTA,
- CS_0000 | GPL4_1111 | GPL5_0001 | UTA,
- CS_0000 | GPL4_1111 | GPL5_1111 | UTA,
- CS_0000 | GPL4_1111 | GPL5_1111,
- CS_0011 | GPL4_1111 | GPL5_1111 | UTA | LAST,
-
- /* WBS */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /* UPT */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /* EXC */
- CS_0001 | LAST,
- _NOT_USED_,
-
- /* REG */
- CS_1110 ,
- CS_0001 | LAST,
-};
-#endif
-
-/* 0xC8 = 0b11001000 , CAS3, >> 2 = 0b00 11 0 010 */
-/* 0x88 = 0b10001000 , CAS2, >> 2 = 0b00 10 0 010 */
-#define MAR_SDRAM_INIT ((CAS_LATENCY << 6) | 0x00000008LU)
-
-/* 8 */
-#define CFG_MAMR ((CFG_MAMR_PTA << MAMR_PTA_SHIFT) | MAMR_PTAE | \
- MAMR_AMA_TYPE_0 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A11 | \
- MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X)
-
-void check_ram(unsigned int addr, unsigned int size)
-{
- unsigned int i, j, v, vv;
- volatile unsigned int *p;
- unsigned int pv;
-
- p = (unsigned int *)addr;
- pv = (unsigned int)p;
- for (i = 0; i < size / sizeof(unsigned int); i++, pv += sizeof(unsigned int))
- *p++ = pv;
-
- p = (unsigned int *)addr;
- for (i = 0; i < size / sizeof(unsigned int); i++) {
- v = (unsigned int)p;
- vv = *p;
- if (vv != v) {
- printf("%p: read %08x instead of %08x\n", p, vv, v);
- hang();
- }
- p++;
- }
-
- for (j = 0; j < 5; j++) {
- switch (j) {
- case 0: v = 0x00000000; break;
- case 1: v = 0xffffffff; break;
- case 2: v = 0x55555555; break;
- case 3: v = 0xaaaaaaaa; break;
- default:v = 0xdeadbeef; break;
- }
- p = (unsigned int *)addr;
- for (i = 0; i < size / sizeof(unsigned int); i++) {
- *p = v;
- vv = *p;
- if (vv != v) {
- printf("%p: read %08x instead of %08x\n", p, vv, v);
- hang();
- }
- *p = ~v;
- p++;
- }
- }
-}
-
-long int initdram(int board_type)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- long int size;
-
- upmconfig(UPMB, (uint *) sdram_table, sizeof(sdram_table) / sizeof(sdram_table[0]));
-
- /*
- * Preliminary prescaler for refresh
- */
- memctl->memc_mptpr = MPTPR_PTP_DIV8;
-
- memctl->memc_mar = MAR_SDRAM_INIT; /* 32-bit address to be output on the address bus if AMX = 0b11 */
-
- /*
- * Map controller bank 3 to the SDRAM bank at preliminary address.
- */
- memctl->memc_or3 = CFG_OR3_PRELIM;
- memctl->memc_br3 = CFG_BR3_PRELIM;
-
- memctl->memc_mbmr = CFG_MAMR & ~MAMR_PTAE; /* no refresh yet */
-
- udelay(200);
-
- /* perform SDRAM initialisation sequence */
- memctl->memc_mcr = MCR_OP_RUN | MCR_UPM_B | MCR_MB_CS3 | MCR_MLCF(1) | MCR_MAD(0x3C); /* precharge all */
- udelay(1);
-
- memctl->memc_mcr = MCR_OP_RUN | MCR_UPM_B | MCR_MB_CS3 | MCR_MLCF(2) | MCR_MAD(0x30); /* refresh 2 times(0) */
- udelay(1);
-
- memctl->memc_mcr = MCR_OP_RUN | MCR_UPM_B | MCR_MB_CS3 | MCR_MLCF(1) | MCR_MAD(0x3E); /* exception program (write mar)*/
- udelay(1);
-
- memctl->memc_mbmr |= MAMR_PTAE; /* enable refresh */
-
- udelay(10000);
-
- {
- u32 d1, d2;
-
- d1 = 0xAA55AA55;
- *(volatile u32 *)0 = d1;
- d2 = *(volatile u32 *)0;
- if (d1 != d2) {
- printf("DRAM fails: wrote 0x%08x read 0x%08x\n", d1, d2);
- hang();
- }
-
- d1 = 0x55AA55AA;
- *(volatile u32 *)0 = d1;
- d2 = *(volatile u32 *)0;
- if (d1 != d2) {
- printf("DRAM fails: wrote 0x%08x read 0x%08x\n", d1, d2);
- hang();
- }
- }
-
- size = get_ram_size((long *)0, SDRAM_MAX_SIZE);
-
- if (size == 0) {
- printf("SIZE is zero: LOOP on 0\n");
- for (;;) {
- *(volatile u32 *)0 = 0;
- (void)*(volatile u32 *)0;
- }
- }
-
- return size;
-}
-
-/* ------------------------------------------------------------------------- */
-
-void reset_phys(void)
-{
- int phyno;
- unsigned short v;
-
- udelay(10000);
- /* reset the damn phys */
- mii_init();
-
- for (phyno = 0; phyno < 32; ++phyno) {
- fec8xx_miiphy_read(NULL, phyno, PHY_PHYIDR1, &v);
- if (v == 0xFFFF)
- continue;
- fec8xx_miiphy_write(NULL, phyno, PHY_BMCR, PHY_BMCR_POWD);
- udelay(10000);
- fec8xx_miiphy_write(NULL, phyno, PHY_BMCR,
- PHY_BMCR_RESET | PHY_BMCR_AUTON);
- udelay(10000);
- }
-}
-
-/* ------------------------------------------------------------------------- */
-
-/* GP = general purpose, SP = special purpose (on chip peripheral) */
-
-/* bits that can have a special purpose or can be configured as inputs/outputs */
-#define PA_GP_INMASK 0
-#define PA_GP_OUTMASK (_BW(3) | _BW(7) | _BW(10) | _BW(14) | _BW(15))
-#define PA_SP_MASK 0
-#define PA_ODR_VAL 0
-#define PA_GP_OUTVAL (_BW(3) | _BW(14) | _BW(15))
-#define PA_SP_DIRVAL 0
-
-#define PB_GP_INMASK _B(28)
-#define PB_GP_OUTMASK (_B(19) | _B(23) | _B(26) | _B(27) | _B(29) | _B(30))
-#define PB_SP_MASK (_BR(22, 25))
-#define PB_ODR_VAL 0
-#define PB_GP_OUTVAL (_B(26) | _B(27) | _B(29) | _B(30))
-#define PB_SP_DIRVAL 0
-
-#if CONFIG_NETTA2_VERSION == 1
-#define PC_GP_INMASK _BW(12)
-#define PC_GP_OUTMASK (_BW(10) | _BW(11) | _BW(13) | _BW(15))
-#elif CONFIG_NETTA2_VERSION == 2
-#define PC_GP_INMASK (_BW(13) | _BW(15))
-#define PC_GP_OUTMASK (_BW(10) | _BW(11) | _BW(12))
-#endif
-#define PC_SP_MASK 0
-#define PC_SOVAL 0
-#define PC_INTVAL 0
-#define PC_GP_OUTVAL (_BW(10) | _BW(11))
-#define PC_SP_DIRVAL 0
-
-#if CONFIG_NETTA2_VERSION == 1
-#define PE_GP_INMASK _B(31)
-#define PE_GP_OUTMASK (_B(17) | _B(18) |_B(20) | _B(24) | _B(27) | _B(28) | _B(29) | _B(30))
-#define PE_GP_OUTVAL (_B(20) | _B(24) | _B(27) | _B(28))
-#elif CONFIG_NETTA2_VERSION == 2
-#define PE_GP_INMASK _BR(28, 31)
-#define PE_GP_OUTMASK (_B(17) | _B(18) |_B(20) | _B(24) | _B(27))
-#define PE_GP_OUTVAL (_B(20) | _B(24) | _B(27))
-#endif
-#define PE_SP_MASK 0
-#define PE_ODR_VAL 0
-#define PE_SP_DIRVAL 0
-
-int board_early_init_f(void)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile iop8xx_t *ioport = &immap->im_ioport;
- volatile cpm8xx_t *cpm = &immap->im_cpm;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
-
- /* NAND chip select */
-#if CONFIG_NETTA2_VERSION == 1
- memctl->memc_or1 = ((0xFFFFFFFFLU & ~(NAND_SIZE - 1)) | OR_CSNT_SAM | OR_BI | OR_SCY_8_CLK | OR_EHTR | OR_TRLX);
- memctl->memc_br1 = ((NAND_BASE & BR_BA_MSK) | BR_PS_8 | BR_V);
-#elif CONFIG_NETTA2_VERSION == 2
- upmconfig(UPMA, (uint *) nandcs_table, sizeof(nandcs_table) / sizeof(nandcs_table[0]));
- memctl->memc_or1 = ((0xFFFFFFFFLU & ~(NAND_SIZE - 1)) | OR_BI | OR_G5LS);
- memctl->memc_br1 = ((NAND_BASE & BR_BA_MSK) | BR_PS_8 | BR_V | BR_MS_UPMA);
- memctl->memc_mamr = 0; /* all clear */
-#endif
-
- /* DSP chip select */
- memctl->memc_or2 = ((0xFFFFFFFFLU & ~(DSP_SIZE - 1)) | OR_CSNT_SAM | OR_BI | OR_ACS_DIV2 | OR_SETA | OR_TRLX);
- memctl->memc_br2 = ((DSP_BASE & BR_BA_MSK) | BR_PS_16 | BR_V);
-
-#if CONFIG_NETTA2_VERSION == 1
- memctl->memc_br4 &= ~BR_V;
-#endif
- memctl->memc_br5 &= ~BR_V;
- memctl->memc_br6 &= ~BR_V;
- memctl->memc_br7 &= ~BR_V;
-
- ioport->iop_padat = PA_GP_OUTVAL;
- ioport->iop_paodr = PA_ODR_VAL;
- ioport->iop_padir = PA_GP_OUTMASK | PA_SP_DIRVAL;
- ioport->iop_papar = PA_SP_MASK;
-
- cpm->cp_pbdat = PB_GP_OUTVAL;
- cpm->cp_pbodr = PB_ODR_VAL;
- cpm->cp_pbdir = PB_GP_OUTMASK | PB_SP_DIRVAL;
- cpm->cp_pbpar = PB_SP_MASK;
-
- ioport->iop_pcdat = PC_GP_OUTVAL;
- ioport->iop_pcdir = PC_GP_OUTMASK | PC_SP_DIRVAL;
- ioport->iop_pcso = PC_SOVAL;
- ioport->iop_pcint = PC_INTVAL;
- ioport->iop_pcpar = PC_SP_MASK;
-
- cpm->cp_pedat = PE_GP_OUTVAL;
- cpm->cp_peodr = PE_ODR_VAL;
- cpm->cp_pedir = PE_GP_OUTMASK | PE_SP_DIRVAL;
- cpm->cp_pepar = PE_SP_MASK;
-
- return 0;
-}
-
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
-
-#include <linux/mtd/nand.h>
-
-extern ulong nand_probe(ulong physadr);
-extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
-
-void nand_init(void)
-{
- unsigned long totlen;
-
- totlen = nand_probe(CFG_NAND_BASE);
- printf ("%4lu MB\n", totlen >> 20);
-}
-#endif
-
-#ifdef CONFIG_HW_WATCHDOG
-
-void hw_watchdog_reset(void)
-{
- /* XXX add here the really funky stuff */
-}
-
-#endif
-
-#ifdef CONFIG_SHOW_ACTIVITY
-
-/* called from timer interrupt every 1/CFG_HZ sec */
-void board_show_activity(ulong timestamp)
-{
-}
-
-/* called when looping */
-void show_activity(int arg)
-{
-}
-
-#endif
-
-#if defined(CFG_CONSOLE_IS_IN_ENV) && defined(CFG_CONSOLE_OVERWRITE_ROUTINE)
-int overwrite_console(void)
-{
- /* printf("overwrite_console called\n"); */
- return 0;
-}
-#endif
-
-extern int drv_phone_init(void);
-extern int drv_phone_use_me(void);
-extern int drv_phone_is_idle(void);
-
-int misc_init_r(void)
-{
- return 0;
-}
-
-int last_stage_init(void)
-{
-#if CONFIG_NETTA2_VERSION == 2
- int i;
-#endif
-
-#if CONFIG_NETTA2_VERSION == 2
- /* assert peripheral reset */
- ((volatile immap_t *)CFG_IMMR)->im_ioport.iop_pcdat &= ~_BW(12);
- for (i = 0; i < 10; i++)
- udelay(1000);
- ((volatile immap_t *)CFG_IMMR)->im_ioport.iop_pcdat |= _BW(12);
-#endif
- reset_phys();
-
- return 0;
-}
diff --git a/board/netta2/u-boot.lds b/board/netta2/u-boot.lds
deleted file mode 100644
index 9f2901c869..0000000000
--- a/board/netta2/u-boot.lds
+++ /dev/null
@@ -1,141 +0,0 @@
-/*
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc8xx/start.o (.text)
- cpu/mpc8xx/traps.o (.text)
- common/dlmalloc.o (.text)
- lib_ppc/ppcstring.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
- lib_generic/zlib.o (.text)
- lib_ppc/cache.o (.text)
- lib_ppc/time.o (.text)
-
- . = DEFINED(env_offset) ? env_offset : .;
- common/environment.o (.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/netta2/u-boot.lds.debug b/board/netta2/u-boot.lds.debug
deleted file mode 100644
index 004e7fd354..0000000000
--- a/board/netta2/u-boot.lds.debug
+++ /dev/null
@@ -1,137 +0,0 @@
-/*
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc8xx/start.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
-
- . = env_offset;
- common/environment.o(.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/netvia/Makefile b/board/netvia/Makefile
deleted file mode 100644
index 13ce9fc9d2..0000000000
--- a/board/netvia/Makefile
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/netvia/config.mk b/board/netvia/config.mk
deleted file mode 100644
index 9dddaad54b..0000000000
--- a/board/netvia/config.mk
+++ /dev/null
@@ -1,28 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# netVia Boards
-#
-
-TEXT_BASE = 0x40000000
diff --git a/board/netvia/flash.c b/board/netvia/flash.c
deleted file mode 100644
index d31f7707f7..0000000000
--- a/board/netvia/flash.c
+++ /dev/null
@@ -1,511 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size(vu_long * addr, flash_info_t * info);
-static int write_byte(flash_info_t * info, ulong dest, uchar data);
-static void flash_get_offsets(ulong base, flash_info_t * info);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init(void)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- unsigned long size;
- int i;
-
- /* Init: no FLASHes known */
- for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i)
- flash_info[i].flash_id = FLASH_UNKNOWN;
-
- size = flash_get_size((vu_long *) FLASH_BASE0_PRELIM, &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n", size, size << 20);
- }
-
- /* Remap FLASH according to real size */
- memctl->memc_or0 = CFG_OR_TIMING_FLASH | (-size & 0xFFFF8000);
- memctl->memc_br0 = (CFG_FLASH_BASE & BR_BA_MSK) | (memctl->memc_br0 & ~(BR_BA_MSK));
-
- /* Re-do sizing to get full correct info */
- size = flash_get_size((vu_long *) CFG_FLASH_BASE, &flash_info[0]);
-
- flash_get_offsets(CFG_FLASH_BASE, &flash_info[0]);
-
- /* monitor protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_FLASH_BASE, CFG_FLASH_BASE + monitor_flash_len - 1,
- &flash_info[0]);
-
- flash_protect ( FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1,
- &flash_info[0]);
-
-#ifdef CFG_ENV_ADDR_REDUND
- flash_protect ( FLAG_PROTECT_SET,
- CFG_ENV_ADDR_REDUND,
- CFG_ENV_ADDR_REDUND + CFG_ENV_SIZE_REDUND - 1,
- &flash_info[0]);
-#endif
-
-
- flash_info[0].size = size;
-
- return (size);
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_get_offsets(ulong base, flash_info_t * info)
-{
- int i;
-
- /* set up sector start address table */
- if ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM040) {
- for (i = 0; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00010000);
- }
- } else if (info->flash_id & FLASH_BTYPE) {
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00004000;
- info->start[2] = base + 0x00006000;
- info->start[3] = base + 0x00008000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00010000) - 0x00030000;
- }
- } else {
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- info->start[i--] = base + info->size - 0x00004000;
- info->start[i--] = base + info->size - 0x00006000;
- info->start[i--] = base + info->size - 0x00008000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00010000;
- }
- }
-
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info(flash_info_t * info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD:
- printf("AMD ");
- break;
- case FLASH_MAN_FUJ:
- printf("FUJITSU ");
- break;
- case FLASH_MAN_MX:
- printf("MXIC ");
- break;
- default:
- printf("Unknown Vendor ");
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM040:
- printf("AM29LV040B (4 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM400B:
- printf("AM29LV400B (4 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM400T:
- printf("AM29LV400T (4 Mbit, top boot sector)\n");
- break;
- case FLASH_AM800B:
- printf("AM29LV800B (8 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM800T:
- printf("AM29LV800T (8 Mbit, top boot sector)\n");
- break;
- case FLASH_AM160B:
- printf("AM29LV160B (16 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM160T:
- printf("AM29LV160T (16 Mbit, top boot sector)\n");
- break;
- case FLASH_AM320B:
- printf("AM29LV320B (32 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM320T:
- printf("AM29LV320T (32 Mbit, top boot sector)\n");
- break;
- default:
- printf("Unknown Chip Type\n");
- break;
- }
-
- printf(" Size: %ld MB in %d Sectors\n", info->size >> 20, info->sector_count);
-
- printf(" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf("\n ");
- printf(" %08lX%s", info->start[i], info->protect[i] ? " (RO)" : " ");
- }
- printf("\n");
-}
-
-/*-----------------------------------------------------------------------
- */
-
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-
-static ulong flash_get_size(vu_long * addr, flash_info_t * info)
-{
- short i;
- uchar mid;
- uchar pid;
- vu_char *caddr = (vu_char *) addr;
- ulong base = (ulong) addr;
-
-
- /* Write auto select command: read Manufacturer ID */
- caddr[0x0555] = 0xAA;
- caddr[0x02AA] = 0x55;
- caddr[0x0555] = 0x90;
-
- mid = caddr[0];
- switch (mid) {
- case (AMD_MANUFACT & 0xFF):
- info->flash_id = FLASH_MAN_AMD;
- break;
- case (FUJ_MANUFACT & 0xFF):
- info->flash_id = FLASH_MAN_FUJ;
- break;
- case (MX_MANUFACT & 0xFF):
- info->flash_id = FLASH_MAN_MX;
- break;
- case (STM_MANUFACT & 0xFF):
- info->flash_id = FLASH_MAN_STM;
- break;
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- return (0); /* no or unknown flash */
- }
-
- pid = caddr[1]; /* device ID */
- switch (pid) {
- case (AMD_ID_LV400T & 0xFF):
- info->flash_id += FLASH_AM400T;
- info->sector_count = 11;
- info->size = 0x00080000;
- break; /* => 512 kB */
-
- case (AMD_ID_LV400B & 0xFF):
- info->flash_id += FLASH_AM400B;
- info->sector_count = 11;
- info->size = 0x00080000;
- break; /* => 512 kB */
-
- case (AMD_ID_LV800T & 0xFF):
- info->flash_id += FLASH_AM800T;
- info->sector_count = 19;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case (AMD_ID_LV800B & 0xFF):
- info->flash_id += FLASH_AM800B;
- info->sector_count = 19;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case (AMD_ID_LV160T & 0xFF):
- info->flash_id += FLASH_AM160T;
- info->sector_count = 35;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case (AMD_ID_LV160B & 0xFF):
- info->flash_id += FLASH_AM160B;
- info->sector_count = 35;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case (AMD_ID_LV040B & 0xFF):
- info->flash_id += FLASH_AM040;
- info->sector_count = 8;
- info->size = 0x00080000;
- break;
-
- case (STM_ID_M29W040B & 0xFF):
- info->flash_id += FLASH_AM040;
- info->sector_count = 8;
- info->size = 0x00080000;
- break;
-
-#if 0 /* enable when device IDs are available */
- case (AMD_ID_LV320T & 0xFF):
- info->flash_id += FLASH_AM320T;
- info->sector_count = 67;
- info->size = 0x00400000;
- break; /* => 4 MB */
-
- case (AMD_ID_LV320B & 0xFF):
- info->flash_id += FLASH_AM320B;
- info->sector_count = 67;
- info->size = 0x00400000;
- break; /* => 4 MB */
-#endif
- default:
- info->flash_id = FLASH_UNKNOWN;
- return (0); /* => no or unknown flash */
-
- }
-
- printf(" ");
- /* set up sector start address table */
- if ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM040) {
- for (i = 0; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00010000);
- }
- } else if (info->flash_id & FLASH_BTYPE) {
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00004000;
- info->start[2] = base + 0x00006000;
- info->start[3] = base + 0x00008000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00010000) - 0x00030000;
- }
- } else {
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- info->start[i--] = base + info->size - 0x00004000;
- info->start[i--] = base + info->size - 0x00006000;
- info->start[i--] = base + info->size - 0x00008000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00010000;
- }
- }
-
- /* check for protected sectors */
- for (i = 0; i < info->sector_count; i++) {
- /* read sector protection: D0 = 1 if protected */
- caddr = (volatile unsigned char *)(info->start[i]);
- info->protect[i] = caddr[2] & 1;
- }
-
- /*
- * Prevent writes to uninitialized FLASH.
- */
- if (info->flash_id != FLASH_UNKNOWN) {
- caddr = (vu_char *) info->start[0];
-
- caddr[0x0555] = 0xAA;
- caddr[0x02AA] = 0x55;
- caddr[0x0555] = 0xF0;
-
- udelay(20000);
- }
-
- return (info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase(flash_info_t * info, int s_first, int s_last)
-{
- vu_char *addr = (vu_char *) (info->start[0]);
- int flag, prot, sect, l_sect;
- ulong start, now, last;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf("- missing\n");
- } else {
- printf("- no sectors to erase\n");
- }
- return 1;
- }
-
- if ((info->flash_id == FLASH_UNKNOWN) ||
- (info->flash_id > FLASH_AMD_COMP)) {
- printf("Can't erase unknown flash type %08lx - aborted\n", info->flash_id);
- return 1;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf("- Warning: %d protected sectors will not be erased!\n", prot);
- } else {
- printf("\n");
- }
-
- l_sect = -1;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[0x0555] = 0xAA;
- addr[0x02AA] = 0x55;
- addr[0x0555] = 0x80;
- addr[0x0555] = 0xAA;
- addr[0x02AA] = 0x55;
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr = (vu_char *) (info->start[sect]);
- addr[0] = 0x30;
- l_sect = sect;
- }
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay(1000);
-
- /*
- * We wait for the last triggered sector
- */
- if (l_sect < 0)
- goto DONE;
-
- start = get_timer(0);
- last = start;
- addr = (vu_char *) (info->start[l_sect]);
- while ((addr[0] & 0x80) != 0x80) {
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf("Timeout\n");
- return 1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc('.');
- last = now;
- }
- }
-
- DONE:
- /* reset to read mode */
- addr = (vu_char *) info->start[0];
- addr[0] = 0xF0; /* reset bank */
-
- printf(" done\n");
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff(flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- int rc;
-
- while (cnt > 0) {
- if ((rc = write_byte(info, addr++, *src++)) != 0) {
- return (rc);
- }
- --cnt;
- }
-
- return (0);
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_byte(flash_info_t * info, ulong dest, uchar data)
-{
- vu_char *addr = (vu_char *) (info->start[0]);
- ulong start;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*((vu_char *) dest) & data) != data) {
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[0x0555] = 0xAA;
- addr[0x02AA] = 0x55;
- addr[0x0555] = 0xA0;
-
- *((vu_char *) dest) = data;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* data polling for D7 */
- start = get_timer(0);
- while ((*((vu_char *) dest) & 0x80) != (data & 0x80)) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- return (1);
- }
- }
- return (0);
-}
-
-/*-----------------------------------------------------------------------
- */
diff --git a/board/netvia/netvia.c b/board/netvia/netvia.c
deleted file mode 100644
index fb7f7700cf..0000000000
--- a/board/netvia/netvia.c
+++ /dev/null
@@ -1,432 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * Pantelis Antoniou, Intracom S.A., panto@intracom.gr
- * U-Boot port on NetVia board
- */
-
-#include <common.h>
-#include "mpc8xx.h"
-
-/****************************************************************/
-
-#if defined(CONFIG_NETVIA_VERSION) && CONFIG_NETVIA_VERSION >= 2
-/* last value written to the external register; we cannot read back */
-unsigned int last_er_val;
-#endif
-
-/****************************************************************/
-
-/****************************************************************/
-
-/* some sane bit macros */
-#define _BD(_b) (1U << (31-(_b)))
-#define _BDR(_l, _h) (((((1U << (31-(_l))) - 1) << 1) | 1) & ~((1U << (31-(_h))) - 1))
-
-#define _BW(_b) (1U << (15-(_b)))
-#define _BWR(_l, _h) (((((1U << (15-(_l))) - 1) << 1) | 1) & ~((1U << (15-(_h))) - 1))
-
-#define _BB(_b) (1U << (7-(_b)))
-#define _BBR(_l, _h) (((((1U << (7-(_l))) - 1) << 1) | 1) & ~((1U << (7-(_h))) - 1))
-
-#define _B(_b) _BD(_b)
-#define _BR(_l, _h) _BDR(_l, _h)
-
-/****************************************************************/
-
-#define _NOT_USED_ 0xFFFFFFFF
-
-/****************************************************************/
-
-#define CS_0000 0x00000000
-#define CS_0001 0x10000000
-#define CS_0010 0x20000000
-#define CS_0011 0x30000000
-#define CS_0100 0x40000000
-#define CS_0101 0x50000000
-#define CS_0110 0x60000000
-#define CS_0111 0x70000000
-#define CS_1000 0x80000000
-#define CS_1001 0x90000000
-#define CS_1010 0xA0000000
-#define CS_1011 0xB0000000
-#define CS_1100 0xC0000000
-#define CS_1101 0xD0000000
-#define CS_1110 0xE0000000
-#define CS_1111 0xF0000000
-
-#define BS_0000 0x00000000
-#define BS_0001 0x01000000
-#define BS_0010 0x02000000
-#define BS_0011 0x03000000
-#define BS_0100 0x04000000
-#define BS_0101 0x05000000
-#define BS_0110 0x06000000
-#define BS_0111 0x07000000
-#define BS_1000 0x08000000
-#define BS_1001 0x09000000
-#define BS_1010 0x0A000000
-#define BS_1011 0x0B000000
-#define BS_1100 0x0C000000
-#define BS_1101 0x0D000000
-#define BS_1110 0x0E000000
-#define BS_1111 0x0F000000
-
-#define A10_AAAA 0x00000000
-#define A10_AAA0 0x00200000
-#define A10_AAA1 0x00300000
-#define A10_000A 0x00800000
-#define A10_0000 0x00A00000
-#define A10_0001 0x00B00000
-#define A10_111A 0x00C00000
-#define A10_1110 0x00E00000
-#define A10_1111 0x00F00000
-
-#define RAS_0000 0x00000000
-#define RAS_0001 0x00040000
-#define RAS_1110 0x00080000
-#define RAS_1111 0x000C0000
-
-#define CAS_0000 0x00000000
-#define CAS_0001 0x00010000
-#define CAS_1110 0x00020000
-#define CAS_1111 0x00030000
-
-#define WE_0000 0x00000000
-#define WE_0001 0x00004000
-#define WE_1110 0x00008000
-#define WE_1111 0x0000C000
-
-#define GPL4_0000 0x00000000
-#define GPL4_0001 0x00001000
-#define GPL4_1110 0x00002000
-#define GPL4_1111 0x00003000
-
-#define GPL5_0000 0x00000000
-#define GPL5_0001 0x00000400
-#define GPL5_1110 0x00000800
-#define GPL5_1111 0x00000C00
-#define LOOP 0x00000080
-
-#define EXEN 0x00000040
-
-#define AMX_COL 0x00000000
-#define AMX_ROW 0x00000020
-#define AMX_MAR 0x00000030
-
-#define NA 0x00000008
-
-#define UTA 0x00000004
-
-#define TODT 0x00000002
-
-#define LAST 0x00000001
-
-const uint sdram_table[0x40] = {
- /* RSS */
- CS_0001 | BS_1111 | A10_AAAA | RAS_0001 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* ACT */
- CS_1111 | BS_1111 | A10_0000 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* NOP */
- CS_0000 | BS_1111 | A10_0001 | RAS_1111 | CAS_0001 | WE_1111 | AMX_COL | UTA, /* READ */
- CS_0001 | BS_0001 | A10_1111 | RAS_0001 | CAS_1111 | WE_0001 | AMX_COL | UTA, /* PALL */
- CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL, /* NOP */
- CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA | TODT | LAST, /* NOP */
- _NOT_USED_, _NOT_USED_,
-
- /* RBS */
- CS_0001 | BS_1111 | A10_AAAA | RAS_0001 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* ACT */
- CS_1111 | BS_1111 | A10_0000 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* NOP */
- CS_0001 | BS_1111 | A10_0001 | RAS_1111 | CAS_0001 | WE_1111 | AMX_COL | UTA, /* READ */
- CS_1111 | BS_0000 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* NOP */
- CS_1111 | BS_0000 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL, /* NOP */
- CS_1111 | BS_0000 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL, /* NOP */
- CS_0001 | BS_0001 | A10_1111 | RAS_0001 | CAS_1111 | WE_0001 | AMX_COL, /* PALL */
- CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | TODT | LAST, /* NOP */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /* WSS */
- CS_0001 | BS_1111 | A10_AAAA | RAS_0001 | CAS_1111 | WE_1111 | AMX_COL | UTA,
- CS_1111 | BS_1111 | A10_0000 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL,
- CS_0000 | BS_0001 | A10_0000 | RAS_1111 | CAS_0001 | WE_0000 | AMX_COL | UTA,
- CS_0001 | BS_1111 | A10_1111 | RAS_0001 | CAS_1111 | WE_0001 | AMX_COL | UTA | TODT | LAST,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /* WBS */
- CS_0001 | BS_1111 | A10_AAAA | RAS_0001 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* ACT */
- CS_1111 | BS_1111 | A10_0000 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL, /* NOP */
- CS_0001 | BS_0000 | A10_0000 | RAS_1111 | CAS_0001 | WE_0000 | AMX_COL, /* WRITE */
- CS_1111 | BS_0000 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL, /* NOP */
- CS_1111 | BS_0000 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL, /* NOP */
- CS_1111 | BS_0001 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* NOP */
- CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* NOP */
- CS_0001 | BS_1111 | A10_1111 | RAS_0001 | CAS_1111 | WE_0001 | AMX_COL | UTA, /* PALL */
- CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA | TODT | LAST, /* NOP */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /* UPT */
- CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL, /* NOP */
- CS_0001 | BS_1111 | A10_1111 | RAS_0001 | CAS_0001 | WE_1111 | AMX_COL | LOOP,
- CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL,
- CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL,
- CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | LOOP,
- CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | LAST,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_,
-
- /* EXC */
- CS_0001 | BS_1111 | A10_1111 | RAS_0001 | CAS_1111 | WE_0001 | AMX_COL,
- CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | TODT | LAST,
-
- /* REG */
- CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1110 | AMX_MAR,
- CS_0001 | BS_1111 | A10_0001 | RAS_0001 | CAS_0001 | WE_0001 | AMX_MAR | TODT | LAST,
-};
-
-/* ------------------------------------------------------------------------- */
-
-
-/*
- * Check Board Identity:
- *
- * Test ETX ID string (ETX_xxx...)
- *
- * Return 1 always.
- */
-
-int checkboard(void)
-{
-#if !defined(CONFIG_NETVIA_VERSION) || CONFIG_NETVIA_VERSION == 1
- printf ("NETVIA v1\n");
-#else
- printf ("NETVIA v2+\n");
-#endif
- return (0);
-}
-
-/* ------------------------------------------------------------------------- */
-
-/* 0xC8 = 0b11001000 , CAS3, >> 2 = 0b00 11 0 010 */
-#define MAR_SDRAM_INIT 0x000000C8LU
-
-#define MCR_OP(x) ((unsigned long)((x) & 3) << (31-1))
-#define MCR_OP_MASK MCR_OP(3)
-
-#define MCR_UM(x) ((unsigned long)((x) & 1) << (31 - 8))
-#define MCR_UM_MASK MCR_UM(1)
-#define MCR_UM_UPMA MCR_UM(0)
-#define MCR_UM_UPMB MCR_UM(1)
-
-#define MCR_MB(x) ((unsigned long)((x) & 7) << (31 - 18))
-#define MCR_MB_MASK MCR_MB(7)
-#define MCR_MB_CS(x) MCR_MB(x)
-
-#define MCR_MCLF(x) ((unsigned long)((x) & 15) << (31 - 23))
-#define MCR_MCLF_MASK MCR_MCLF(15)
-
-long int initdram(int board_type)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- long int size;
-
- upmconfig(UPMA, (uint *) sdram_table, sizeof(sdram_table) / sizeof(uint));
-
- /*
- * Preliminary prescaler for refresh
- */
- memctl->memc_mptpr = CFG_MPTPR_1BK_8K;
-
- memctl->memc_mar = MAR_SDRAM_INIT; /* 32-bit address to be output on the address bus if AMX = 0b11 */
-
- /*
- * Map controller bank 3 to the SDRAM bank at preliminary address.
- */
- memctl->memc_or3 = CFG_OR3_PRELIM;
- memctl->memc_br3 = CFG_BR3_PRELIM;
-
- memctl->memc_mamr = CFG_MAMR_9COL & ~MAMR_PTAE; /* no refresh yet */
-
- udelay(200);
-
- /* perform SDRAM initialisation sequence */
- memctl->memc_mcr = MCR_OP_RUN | MCR_UM_UPMA | MCR_MB_CS3 | MCR_MCLF(1) | MCR_MAD(0x3C); /* precharge all */
- udelay(1);
- memctl->memc_mcr = MCR_OP_RUN | MCR_UM_UPMA | MCR_MB_CS3 | MCR_MCLF(0) | MCR_MAD(0x30); /* refresh 16 times(0) */
- udelay(1);
- memctl->memc_mcr = MCR_OP_RUN | MCR_UM_UPMA | MCR_MB_CS3 | MCR_MCLF(1) | MCR_MAD(0x3E); /* exception program (write mar) */
- udelay(1);
-
- memctl->memc_mamr |= MAMR_PTAE; /* enable refresh */
-
- udelay(1000);
-
- memctl->memc_mamr = CFG_MAMR_9COL;
-
- size = SDRAM_MAX_SIZE;
-
- udelay(10000);
-
- return (size);
-}
-
-/* ------------------------------------------------------------------------- */
-
-int misc_init_r(void)
-{
-#if defined(CONFIG_NETVIA_VERSION) && CONFIG_NETVIA_VERSION >= 2
- last_er_val = 0xffffffff;
-#endif
- return(0);
-}
-
-/* ------------------------------------------------------------------------- */
-
-/* GP = general purpose, SP = special purpose (on chip peripheral) */
-
-/* bits that can have a special purpose or can be configured as inputs/outputs */
-#define PA_GP_INMASK 0
-#define PA_GP_OUTMASK (_BW(5) | _BWR(14, 15))
-#define PA_SP_MASK (_BW(4) | _BWR(6, 13))
-#define PA_ODR_VAL 0
-#define PA_GP_OUTVAL _BW(5)
-#define PA_SP_DIRVAL 0
-
-#define PB_GP_INMASK _B(28)
-#define PB_GP_OUTMASK (_BR(16, 19) | _BR(26, 27) | _BR(29, 31))
-#define PB_SP_MASK _BR(22, 25)
-#define PB_ODR_VAL 0
-#define PB_GP_OUTVAL (_BR(16, 19) | _BR(26, 27) | _BR(29, 31))
-#define PB_SP_DIRVAL 0
-
-#if !defined(CONFIG_NETVIA_VERSION) || CONFIG_NETVIA_VERSION == 1
-
-#define PC_GP_INMASK (_BWR(5, 7) | _BWR(9, 10) | _BW(13))
-#define PC_GP_OUTMASK _BW(12)
-#define PC_SP_MASK (_BW(4) | _BW(8))
-#define PC_SOVAL 0
-#define PC_INTVAL 0
-#define PC_GP_OUTVAL 0
-#define PC_SP_DIRVAL 0
-
-#define PD_GP_INMASK 0
-#define PD_GP_OUTMASK _BWR(3, 15)
-#define PD_SP_MASK 0
-#define PD_GP_OUTVAL (_BW(3) | _BW(5) | _BW(7) | _BWR(8, 15))
-#define PD_SP_DIRVAL 0
-
-#elif CONFIG_NETVIA_VERSION >= 2
-
-#define PC_GP_INMASK (_BW(5) | _BW(7) | _BWR(9, 11) | _BWR(13, 15))
-#define PC_GP_OUTMASK (_BW(6) | _BW(12))
-#define PC_SP_MASK (_BW(4) | _BW(8))
-#define PC_SOVAL 0
-#define PC_INTVAL _BW(7)
-#define PC_GP_OUTVAL (_BW(6) | _BW(12))
-#define PC_SP_DIRVAL 0
-
-#define PD_GP_INMASK 0
-#define PD_GP_OUTMASK _BWR(3, 15)
-#define PD_SP_MASK 0
-#define PD_GP_OUTVAL (_BW(3) | _BW(5) | _BW(9) | _BW(11))
-#define PD_SP_DIRVAL 0
-
-#else
-#error Unknown NETVIA board version.
-#endif
-
-int board_early_init_f(void)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile iop8xx_t *ioport = &immap->im_ioport;
- volatile cpm8xx_t *cpm = &immap->im_cpm;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
-
- /* DSP0 chip select */
- memctl->memc_or4 = ((0xFFFFFFFFLU & ~(DSP_SIZE - 1)) | OR_CSNT_SAM | OR_BI | OR_ACS_DIV2 | OR_SETA | OR_TRLX);
- memctl->memc_br4 = ((DSP0_BASE & BR_BA_MSK) | BR_PS_16 | BR_V);
-
- /* DSP1 chip select */
- memctl->memc_or5 = ((0xFFFFFFFFLU & ~(DSP_SIZE - 1)) | OR_CSNT_SAM | OR_BI | OR_ACS_DIV2 | OR_SETA | OR_TRLX);
- memctl->memc_br5 = ((DSP1_BASE & BR_BA_MSK) | BR_PS_16 | BR_V);
-
- /* FPGA chip select */
- memctl->memc_or6 = ((0xFFFFFFFFLU & ~(FPGA_SIZE - 1)) | OR_BI | OR_SCY_1_CLK);
- memctl->memc_br6 = ((FPGA_BASE & BR_BA_MSK) | BR_PS_8 | BR_V);
-
-#if defined(CONFIG_NETVIA_VERSION) && CONFIG_NETVIA_VERSION >= 2
- /* NAND chip select */
- memctl->memc_or1 = ((0xFFFFFFFFLU & ~(NAND_SIZE - 1)) | OR_CSNT_SAM | OR_BI | OR_SCY_8_CLK | OR_EHTR | OR_TRLX);
- memctl->memc_br1 = ((NAND_BASE & BR_BA_MSK) | BR_PS_8 | BR_V);
-
- /* kill this chip select */
- memctl->memc_br2 &= ~BR_V; /* invalid */
-
- /* external reg chip select */
- memctl->memc_or7 = ((0xFFFFFFFFLU & ~(ER_SIZE - 1)) | OR_BI | OR_SCY_4_CLK);
- memctl->memc_br7 = ((ER_BASE & BR_BA_MSK) | BR_PS_32 | BR_V);
-#endif
-
- ioport->iop_padat = PA_GP_OUTVAL;
- ioport->iop_paodr = PA_ODR_VAL;
- ioport->iop_padir = PA_GP_OUTMASK | PA_SP_DIRVAL;
- ioport->iop_papar = PA_SP_MASK;
-
- cpm->cp_pbdat = PB_GP_OUTVAL;
- cpm->cp_pbodr = PB_ODR_VAL;
- cpm->cp_pbdir = PB_GP_OUTMASK | PB_SP_DIRVAL;
- cpm->cp_pbpar = PB_SP_MASK;
-
- ioport->iop_pcdat = PC_GP_OUTVAL;
- ioport->iop_pcdir = PC_GP_OUTMASK | PC_SP_DIRVAL;
- ioport->iop_pcso = PC_SOVAL;
- ioport->iop_pcint = PC_INTVAL;
- ioport->iop_pcpar = PC_SP_MASK;
-
- ioport->iop_pddat = PD_GP_OUTVAL;
- ioport->iop_pddir = PD_GP_OUTMASK | PD_SP_DIRVAL;
- ioport->iop_pdpar = PD_SP_MASK;
-
-#if defined(CONFIG_NETVIA_VERSION) && CONFIG_NETVIA_VERSION >= 2
- /* external register init */
- *(volatile uint *)ER_BASE = 0xFFFFFFFF;
-#endif
-
- return 0;
-}
-
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
-
-#include <linux/mtd/nand.h>
-
-extern ulong nand_probe(ulong physadr);
-extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
-
-void nand_init(void)
-{
- unsigned long totlen = nand_probe(CFG_NAND_BASE);
-
- printf ("%4lu MB\n", totlen >> 20);
-}
-#endif
diff --git a/board/netvia/u-boot.lds b/board/netvia/u-boot.lds
deleted file mode 100644
index dc69db6ad0..0000000000
--- a/board/netvia/u-boot.lds
+++ /dev/null
@@ -1,141 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc8xx/start.o (.text)
- cpu/mpc8xx/traps.o (.text)
- common/dlmalloc.o (.text)
- lib_ppc/ppcstring.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
- lib_generic/zlib.o (.text)
- lib_ppc/cache.o (.text)
- lib_ppc/time.o (.text)
-
- . = DEFINED(env_offset) ? env_offset : .;
- common/environment.o (.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/netvia/u-boot.lds.debug b/board/netvia/u-boot.lds.debug
deleted file mode 100644
index 96569bfd9a..0000000000
--- a/board/netvia/u-boot.lds.debug
+++ /dev/null
@@ -1,137 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc8xx/start.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
-
- . = env_offset;
- common/environment.o(.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/ns9750dev/Makefile b/board/ns9750dev/Makefile
deleted file mode 100644
index fb4333c19c..0000000000
--- a/board/ns9750dev/Makefile
+++ /dev/null
@@ -1,47 +0,0 @@
-#
-# (C) Copyright 2000, 2001, 2002
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := ns9750dev.o flash.o led.o
-SOBJS := lowlevel_init.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS) $(SOBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/ns9750dev/config.mk b/board/ns9750dev/config.mk
deleted file mode 100644
index 6a22cee51a..0000000000
--- a/board/ns9750dev/config.mk
+++ /dev/null
@@ -1,16 +0,0 @@
-#######################################################################
-#
-# Copyright (C) 2004 by FS Forth-Systeme GmbH.
-# Markus Pietrek <mpietrek@fsforth.de>
-#
-# @TODO
-# Linux-Kernel is expected to be at 0000'8000, entry 0000'8000
-# optionally with a ramdisk at 0080'0000
-#
-# we load ourself to 0078'0000
-#
-# download area is 0060'0000
-#
-
-
-TEXT_BASE = 0x00780000
diff --git a/board/ns9750dev/flash.c b/board/ns9750dev/flash.c
deleted file mode 100644
index e7d65157f7..0000000000
--- a/board/ns9750dev/flash.c
+++ /dev/null
@@ -1,477 +0,0 @@
-/*
- * (C) Copyright 2001
- * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
- *
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2003
- * Texas Instruments, <www.ti.com>
- * Kshitij Gupta <Kshitij@ti.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <linux/byteorder/swab.h>
-
-#define PHYS_FLASH_SECT_SIZE 0x00020000 /* 256 KB sectors (x2) */
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/* Board support for 1 or 2 flash devices */
-#undef FLASH_PORT_WIDTH32
-#define FLASH_PORT_WIDTH16
-
-#ifdef FLASH_PORT_WIDTH16
-#define FLASH_PORT_WIDTH ushort
-#define FLASH_PORT_WIDTHV vu_short
-#define SWAP(x) __swab16(x)
-#else
-#define FLASH_PORT_WIDTH ulong
-#define FLASH_PORT_WIDTHV vu_long
-#define SWAP(x) __swab32(x)
-#endif
-
-#define FPW FLASH_PORT_WIDTH
-#define FPWV FLASH_PORT_WIDTHV
-
-#define mb() __asm__ __volatile__ ("" : : : "memory")
-
-
-/* Flash Organization Structure */
-typedef struct OrgDef {
- unsigned int sector_number;
- unsigned int sector_size;
-} OrgDef;
-
-
-/* Flash Organizations */
-OrgDef OrgIntel_28F256L18T[] = {
- {4, 32 * 1024}, /* 4 * 32kBytes sectors */
- {255, 128 * 1024}, /* 255 * 128kBytes sectors */
-};
-
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-unsigned long flash_init (void);
-static ulong flash_get_size (FPW * addr, flash_info_t * info);
-static int write_data (flash_info_t * info, ulong dest, FPW data);
-static void flash_get_offsets (ulong base, flash_info_t * info);
-void inline spin_wheel (void);
-void flash_print_info (flash_info_t * info);
-void flash_unprotect_sectors (FPWV * addr);
-int flash_erase (flash_info_t * info, int s_first, int s_last);
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- int i;
- ulong size = 0;
- for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
- switch (i) {
- case 0:
- flash_get_size ((FPW *) PHYS_FLASH_1, &flash_info[i]);
- flash_get_offsets (PHYS_FLASH_1, &flash_info[i]);
- break;
- default:
- panic ("configured too many flash banks!\n");
- break;
- }
- size += flash_info[i].size;
- }
-
- /* Protect monitor and environment sectors
- */
- flash_protect (FLAG_PROTECT_SET,
- CFG_FLASH_BASE,
- CFG_FLASH_BASE + monitor_flash_len - 1, &flash_info[0]);
-
- flash_protect (FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0]);
-
- return size;
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_get_offsets (ulong base, flash_info_t * info)
-{
- int i;
- OrgDef *pOrgDef;
-
- pOrgDef = OrgIntel_28F256L18T;
- if (info->flash_id == FLASH_UNKNOWN) {
- return;
- }
-
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
- for (i = 0; i < info->sector_count; i++) {
- if (i > 255) {
- info->start[i] = base + (i * 0x8000);
- info->protect[i] = 0;
- } else {
- info->start[i] = base +
- (i * PHYS_FLASH_SECT_SIZE);
- info->protect[i] = 0;
- }
- }
- }
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t * info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_INTEL:
- printf ("INTEL ");
- break;
- default:
- printf ("Unknown Vendor ");
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_28F256L18T:
- printf ("FLASH 28F256L18T\n");
- break;
- default:
- printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i], info->protect[i] ? " (RO)" : " ");
- }
- printf ("\n");
- return;
-}
-
-/*
- * The following code cannot be run from FLASH!
- */
-static ulong flash_get_size (FPW * addr, flash_info_t * info)
-{
- volatile FPW value;
-
- /* Write auto select command: read Manufacturer ID */
- addr[0x5555] = (FPW) 0x00AA00AA;
- addr[0x2AAA] = (FPW) 0x00550055;
- addr[0x5555] = (FPW) 0x00900090;
-
- mb ();
- value = addr[0];
-
- switch (value) {
-
- case (FPW) INTEL_MANUFACT:
- info->flash_id = FLASH_MAN_INTEL;
- break;
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
- return (0); /* no or unknown flash */
- }
-
- mb ();
- value = addr[1]; /* device ID */
- switch (value) {
-
- case (FPW) (INTEL_ID_28F256L18T):
- info->flash_id += FLASH_28F256L18T;
- info->sector_count = 259;
- info->size = 0x02000000;
- break; /* => 32 MB */
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- break;
- }
-
- if (info->sector_count > CFG_MAX_FLASH_SECT) {
- printf ("** ERROR: sector count %d > max (%d) **\n",
- info->sector_count, CFG_MAX_FLASH_SECT);
- info->sector_count = CFG_MAX_FLASH_SECT;
- }
-
- addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
-
- return (info->size);
-}
-
-
-/* unprotects a sector for write and erase
- * on some intel parts, this unprotects the entire chip, but it
- * wont hurt to call this additional times per sector...
- */
-void flash_unprotect_sectors (FPWV * addr)
-{
-#define PD_FINTEL_WSMS_READY_MASK 0x0080
-
- *addr = (FPW) 0x00500050; /* clear status register */
-
- /* this sends the clear lock bit command */
- *addr = (FPW) 0x00600060;
- *addr = (FPW) 0x00D000D0;
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t * info, int s_first, int s_last)
-{
- int flag, prot, sect;
- ulong type, start, last;
- int rcode = 0;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- type = (info->flash_id & FLASH_VENDMASK);
- if ((type != FLASH_MAN_INTEL)) {
- printf ("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- return 1;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
-
- start = get_timer (0);
- last = start;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- FPWV *addr = (FPWV *) (info->start[sect]);
- FPW status;
-
- printf ("Erasing sector %2d ... ", sect);
-
- flash_unprotect_sectors (addr);
-
- /* arm simple, non interrupt dependent timer */
- reset_timer_masked ();
-
- *addr = (FPW) 0x00500050;/* clear status register */
- *addr = (FPW) 0x00200020;/* erase setup */
- *addr = (FPW) 0x00D000D0;/* erase confirm */
-
- while (((status =
- *addr) & (FPW) 0x00800080) !=
- (FPW) 0x00800080) {
- if (get_timer_masked () >
- CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- /* suspend erase */
- *addr = (FPW) 0x00B000B0;
- /* reset to read mode */
- *addr = (FPW) 0x00FF00FF;
- rcode = 1;
- break;
- }
- }
-
- /* clear status register cmd. */
- *addr = (FPW) 0x00500050;
- *addr = (FPW) 0x00FF00FF;/* resest to read mode */
- printf (" done\n");
- }
- }
- return rcode;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- * 4 - Flash not identified
- */
-
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- ulong cp, wp;
- FPW data;
- int count, i, l, rc, port_width;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- return 4;
- }
-/* get lower word aligned address */
-#ifdef FLASH_PORT_WIDTH16
- wp = (addr & ~1);
- port_width = 2;
-#else
- wp = (addr & ~3);
- port_width = 4;
-#endif
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i = 0, cp = wp; i < l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
- for (; i < port_width && cnt > 0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt == 0 && i < port_width; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
-
- if ((rc = write_data (info, wp, SWAP (data))) != 0) {
- return (rc);
- }
- wp += port_width;
- }
-
- /*
- * handle word aligned part
- */
- count = 0;
- while (cnt >= port_width) {
- data = 0;
- for (i = 0; i < port_width; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_data (info, wp, SWAP (data))) != 0) {
- return (rc);
- }
- wp += port_width;
- cnt -= port_width;
- if (count++ > 0x800) {
- spin_wheel ();
- count = 0;
- }
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i < port_width; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
-
- return (write_data (info, wp, SWAP (data)));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word or halfword to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_data (flash_info_t * info, ulong dest, FPW data)
-{
- FPWV *addr = (FPWV *) dest;
- ulong status;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*addr & data) != data) {
- printf ("not erased at %08lx (%x)\n", (ulong) addr, *addr);
- return (2);
- }
- flash_unprotect_sectors (addr);
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
- *addr = (FPW) 0x00400040; /* write setup */
- *addr = data;
-
- /* arm simple, non interrupt dependent timer */
- reset_timer_masked ();
-
- /* wait while polling the status register */
- while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
- if (get_timer_masked () > CFG_FLASH_WRITE_TOUT) {
- *addr = (FPW) 0x00FF00FF; /* restore read mode */
- return (1);
- }
- }
- *addr = (FPW) 0x00FF00FF; /* restore read mode */
- return (0);
-}
-
-void inline spin_wheel (void)
-{
- static int p = 0;
- static char w[] = "\\/-";
-
- printf ("\010%c", w[p]);
- (++p == 3) ? (p = 0) : 0;
-}
diff --git a/board/ns9750dev/led.c b/board/ns9750dev/led.c
deleted file mode 100644
index b85c869d85..0000000000
--- a/board/ns9750dev/led.c
+++ /dev/null
@@ -1,46 +0,0 @@
-/***********************************************************************
- *
- * Copyright (C) 2004 by FS Forth-Systeme GmbH.
- * All rights reserved.
- *
- * $Id: led.c,v 1.1 2004/02/16 10:37:20 mpietrek Exp $
- * @Author: Markus Pietrek
- * @Descr: Defines helper functions for toggeling LEDs
- * @Usage:
- * @References: [1]
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- ***********************************************************************/
-
-#ifdef CONFIG_STATUS_LED
-
-#include <ns9750_bbus.h>
-
-static inline void __led_init( led_id_t mask, int state )
-{
- XXXX;
-}
-
-static inline void __led_toggle( led_id_t mask )
-{
-}
-
-static inline void __led_set( led_id_t mask, int state )
-{
-}
-
-#endif /* CONFIG_STATUS_LED */
diff --git a/board/ns9750dev/lowlevel_init.S b/board/ns9750dev/lowlevel_init.S
deleted file mode 100644
index 3a0978663a..0000000000
--- a/board/ns9750dev/lowlevel_init.S
+++ /dev/null
@@ -1,298 +0,0 @@
-/*
- * Board specific setup info
- *
- * (C) Copyright 2003
- * Texas Instruments, <www.ti.com>
- * Kshitij Gupta <Kshitij@ti.com>
- *
- * Modified for the NS9750 DevBoard by
- * (C) Copyright 2004 by FS Forth-Systeme GmbH.
- * Markus Pietrek <mpietrek@fsforth.de>
- * @References: [1] NS9750 Hardware Reference/December 2003
- * [2] ns9750_a.cmd from MAJIC configuration
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <config.h>
-#include <version.h>
-
-#if defined(CONFIG_NS9750DEV)
-# ifndef CONFIG_SKIP_LOWLEVEL_INIT
-# include <./ns9750_sys.h>
-# include <./ns9750_mem.h>
-# endif
-#endif
-
-/***********************************************************************
- * @Function: write_register_block
- * @Return: nothing
- * @Descr: Copies the register block of register_offset:register value to
- * the registers at base r0. The block is assumed to start in RAM at r1
- * and end at r2. The linked RAM base address of U-Boot is assumed to be
- * in r5 while the ROM base address we are running from is r6
- * Uses r3 and r4 as tempory registers
- ***********************************************************************/
-
-.macro write_register_block
- @@ map the addresses to high memory
- sub r1, r1, r5
- add r1, r1, r6
- sub r2, r2, r5
- add r2, r2, r6
-
- @@ copy all
-1:
- @@ Write register/value pair starting at [r1] to register base r0
- ldr r3, [r1], #4
- ldr r4, [r1], #4
- str r4, [r0,r3]
- cmp r1, r2
- blt 1b
-.endm
-
-_TEXT_BASE:
- .word TEXT_BASE @ sdram load addr from config.mk
-_PHYS_FLASH:
- .word PHYS_FLASH_1 @ real flash address (without mirroring)
-_CAS_LATENCY:
- .word 0x00022000 @ for CAS2 latency
-
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
-.globl lowlevel_init
-lowlevel_init:
-
- /* U-Boot may be linked to RAM at 0x780000. But this code will run in
- flash from 0x0. But in order to enable RAM we have to disable the
- mirror bit, therefore we have to jump to our real flash address
- beginning at PHYS_FLASH_1 (CS4 Base). Therefore,
- _run_at_real_flash_address may be 0x500003b0 while be linked to
- 0x7803b0. So we must modify our linked addresses */
-
- @@ branch to high memory address, away from 0x0
- ldr r5, _TEXT_BASE
- ldr r6, _PHYS_FLASH
- ldr r0, =_run_at_real_flash_address
- sub r0, r0, r5
- add r0, r0, r6
- mov pc, r0
- nop @ for pipelining
-
-_run_at_real_flash_address:
- @@ now we are running > PHYS_FLASH_1, safe to enable memory controller
-
- @@ Write Memory Configuration Registers
-
- ldr r0, _NS9750_MEM_MODULE_BASE
- ldr r1, =_MEM_CONFIG_START
- ldr r2, =_MEM_CONFIG_END
-
- write_register_block
-
- @@ Give SDRAM some time to settle
- @@ @TODO. According to [2] it should be 2 AHB cycles. Check
-
- ldr r1, =0x50
-_sdram_settle:
- subs r1, r1, #1
- bne _sdram_settle
-
-_enable_mappings:
- @@ Enable SDRAM Mode
-
- ldr r1, =_MEM_MODE_START
- ldr r2, =_MEM_MODE_END
-
- write_register_block
-
- ldr r3, _CAS_LATENCY @ perform one read from SDRAM
- ldr r3, [r3]
-
- @@ Enable SDRAM and memory mappings
-
- ldr r1, =_MEM_ENABLE_START
- ldr r2, =_MEM_ENABLE_END
-
- write_register_block
-
- @@ Activate AHB monitor
-
- ldr r0, =NS9750_SYS_MODULE_BASE
- ldr r1, =_AHB_MONITOR_START
- ldr r2, =_AHB_MONITOR_END
-
- write_register_block
-_relocate_lr:
- /* lr and ip (from cpu_init_crit) are still based on 0x0, relocate it to
- PHYS_FLASH. */
- mov r1, ip
- add r1, r1, r6
- mov ip, r1
-
- mov r1, lr
- add r1, r1, r6
- mov lr, r1
-
- @@ back to arch calling code
- mov pc, lr
-
- .ltorg
-
-_NS9750_MEM_MODULE_BASE:
- .word NS9750_MEM_MODULE_BASE
-
-_MEM_CONFIG_START:
- /* Table of 2 32bit entries. First word is register address offset
- relative to NS9750_MEM_MODULE_BASE, second one is value. They are
- written in order of appearance */
-
- @@ Register values taken from [2]
- .word NS9750_MEM_CTRL
- .word NS9750_MEM_CTRL_E
-
- .word NS9750_MEM_DYN_REFRESH
- .word (0x6 & NS9750_MEM_DYN_REFRESH_MA)
-
- .word NS9750_MEM_DYN_READ_CFG
- .word (0x1 & NS9750_MEM_DYN_READ_CFG_MA)
-
- .word NS9750_MEM_DYN_TRP
- .word (0x1 & NS9750_MEM_DYN_TRP_MA)
-
- .word NS9750_MEM_DYN_TRAS
- .word (0x4 & NS9750_MEM_DYN_TRAS_MA)
-
- .word NS9750_MEM_DYN_TAPR
- .word (0x1 & NS9750_MEM_DYN_TRAS_MA)
-
- .word NS9750_MEM_DYN_TDAL
- .word (0x5 & NS9750_MEM_DYN_TDAL_MA)
-
- .word NS9750_MEM_DYN_TWR
- .word (0x1 & NS9750_MEM_DYN_TWR_MA)
-
- .word NS9750_MEM_DYN_TRC
- .word (0x6 & NS9750_MEM_DYN_TRC_MA)
-
- .word NS9750_MEM_DYN_TRFC
- .word (0x6 & NS9750_MEM_DYN_TRFC_MA)
-
- .word NS9750_MEM_DYN_TRRD
- .word (0x1 & NS9750_MEM_DYN_TRRD_MA)
-
- .word NS9750_MEM_DYN_TMRD
- .word (0x1 & NS9750_MEM_DYN_TMRD_MA)
-
- @@ CS 4
- .word NS9750_MEM_DYN_CFG(0)
- .word (NS9750_MEM_DYN_CFG_AM | \
- (0x280 & NS9750_MEM_DYN_CFG_AM_MA))
-
- .word NS9750_MEM_DYN_RAS_CAS(0)
- .word ((0x200 & NS9750_MEM_DYN_RAS_CAS_CAS_MA) | \
- (0x03 & NS9750_MEM_DYN_RAS_CAS_RAS_MA))
-
- @@ CS 5
- .word NS9750_MEM_DYN_CFG(1)
- .word (NS9750_MEM_DYN_CFG_AM | \
- (0x280 & NS9750_MEM_DYN_CFG_AM_MA))
-
- .word NS9750_MEM_DYN_RAS_CAS(1)
- .word ((0x200 & NS9750_MEM_DYN_RAS_CAS_CAS_MA) | \
- (0x03 & NS9750_MEM_DYN_RAS_CAS_RAS_MA))
-
- @@ CS 6
- .word NS9750_MEM_DYN_CFG(2)
- .word (NS9750_MEM_DYN_CFG_AM | \
- (0x280 & NS9750_MEM_DYN_CFG_AM_MA))
-
- .word NS9750_MEM_DYN_RAS_CAS(2)
- .word ((0x200 & NS9750_MEM_DYN_RAS_CAS_CAS_MA) | \
- (0x03 & NS9750_MEM_DYN_RAS_CAS_RAS_MA))
-
- @@ CS 7
- .word NS9750_MEM_DYN_CFG(3)
- .word (NS9750_MEM_DYN_CFG_AM | \
- (0x280 & NS9750_MEM_DYN_CFG_AM_MA))
-
- .word NS9750_MEM_DYN_RAS_CAS(3)
- .word ((0x200 & NS9750_MEM_DYN_RAS_CAS_CAS_MA) | \
- (0x03 & NS9750_MEM_DYN_RAS_CAS_RAS_MA))
-
- .word NS9750_MEM_DYN_CTRL
- .word (NS9750_MEM_DYN_CTRL_I_PALL | \
- NS9750_MEM_DYN_CTRL_SR | \
- NS9750_MEM_DYN_CTRL_CE )
-
- .word NS9750_MEM_DYN_REFRESH
- .word (0x1 & NS9750_MEM_DYN_REFRESH_MA)
- @@ No further register settings after refresh
-_MEM_CONFIG_END:
-
-_MEM_MODE_START:
- .word NS9750_MEM_DYN_REFRESH
- .word (0x30 & NS9750_MEM_DYN_REFRESH_MA)
-
- .word NS9750_MEM_DYN_CTRL
- .word (NS9750_MEM_DYN_CTRL_I_MODE | \
- NS9750_MEM_DYN_CTRL_SR | \
- NS9750_MEM_DYN_CTRL_CE )
-_MEM_MODE_END:
-
-_MEM_ENABLE_START:
- .word NS9750_MEM_DYN_CTRL
- .word (NS9750_MEM_DYN_CTRL_I_NORMAL | \
- NS9750_MEM_DYN_CTRL_SR | \
- NS9750_MEM_DYN_CTRL_CE )
-
- @@ CS 4
- .word NS9750_MEM_DYN_CFG(0)
- .word (NS9750_MEM_DYN_CFG_BDMC | \
- NS9750_MEM_DYN_CFG_AM | \
- (0x280 & NS9750_MEM_DYN_CFG_AM_MA))
-
- @@ CS 5
- .word NS9750_MEM_DYN_CFG(1)
- .word (NS9750_MEM_DYN_CFG_BDMC | \
- NS9750_MEM_DYN_CFG_AM | \
- (0x280 & NS9750_MEM_DYN_CFG_AM_MA))
-
- @@ CS 6
- .word NS9750_MEM_DYN_CFG(2)
- .word (NS9750_MEM_DYN_CFG_BDMC | \
- NS9750_MEM_DYN_CFG_AM | \
- (0x280 & NS9750_MEM_DYN_CFG_AM_MA))
-
- @@ CS 7
- .word NS9750_MEM_DYN_CFG(3)
- .word (NS9750_MEM_DYN_CFG_BDMC | \
- NS9750_MEM_DYN_CFG_AM | \
- (0x280 & NS9750_MEM_DYN_CFG_AM_MA))
-_MEM_ENABLE_END:
-
-_AHB_MONITOR_START:
- .word NS9750_SYS_AHB_TIMEOUT
- .word 0x01000100 @ @TODO not calculated yet
-
- .word NS9750_SYS_AHB_MON
- .word (NS9750_SYS_AHB_MON_BMTC_GEN_IRQ | \
- NS9750_SYS_AHB_MON_BATC_GEN_IRQ)
-_AHB_MONITOR_END:
-
-#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
diff --git a/board/ns9750dev/ns9750dev.c b/board/ns9750dev/ns9750dev.c
deleted file mode 100644
index ea00d5af25..0000000000
--- a/board/ns9750dev/ns9750dev.c
+++ /dev/null
@@ -1,127 +0,0 @@
-/*
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * (C) Copyright 2002
- * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
- *
- * (C) Copyright 2003
- * Texas Instruments, <www.ti.com>
- * Kshitij Gupta <Kshitij@ti.com>
- *
- * Copyright (C) 2004 by FS Forth-Systeme GmbH.
- * All rights reserved.
- * Markus Pietrek <mpietrek@fsforth.de>
- * derived from omap1610innovator.c
- * @References: [1] NS9750 Hardware Reference/December 2003
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#if defined(CONFIG_NS9750DEV)
-# include <./configs/ns9750dev.h>
-# include <./ns9750_bbus.h>
-#endif
-
-void flash__init( void );
-void ether__init( void );
-
-static inline void delay( unsigned long loops )
-{
- __asm__ volatile ("1:\n"
- "subs %0, %1, #1\n"
- "bne 1b":"=r" (loops):"0" (loops));
-}
-
-
-/***********************************************************************
- * @Function: board_init
- * @Return: 0
- * @Descr: Enables BBUS modules and other devices
- ***********************************************************************/
-
-int board_init( void )
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- /* Active BBUS modules */
- *get_bbus_reg_addr( NS9750_BBUS_MASTER_RESET ) = 0;
-
-#warning Please register your machine at http://www.arm.linux.org.uk/developer/machines/?action=new
- /* arch number of OMAP 1510-Board */
- /* to be changed for OMAP 1610 Board */
- gd->bd->bi_arch_number = 234;
-
- /* adress of boot parameters */
- gd->bd->bi_boot_params = 0x10000100;
-
-
-/* this speeds up your boot a quite a bit. However to make it
- * work, you need make sure your kernel startup flush bug is fixed.
- * ... rkw ...
- */
- icache_enable();
-
- flash__init();
- ether__init();
- return 0;
-}
-
-
-int misc_init_r (void)
-{
- /* currently empty */
- return (0);
-}
-
-/******************************
- Routine:
- Description:
-******************************/
-void flash__init (void)
-{
-}
-/*************************************************************
- Routine:ether__init
- Description: take the Ethernet controller out of reset and wait
- for the EEPROM load to complete.
-*************************************************************/
-void ether__init (void)
-{
-}
-
-/******************************
- Routine:
- Description:
-******************************/
-int dram_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
-
-#if CONFIG_NR_DRAM_BANKS > 1
- gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
- gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
-#endif
- return 0;
-}
diff --git a/board/ns9750dev/u-boot.lds b/board/ns9750dev/u-boot.lds
deleted file mode 100644
index 8ebb6519ff..0000000000
--- a/board/ns9750dev/u-boot.lds
+++ /dev/null
@@ -1,59 +0,0 @@
-/*
- * (C) Copyright 2002
- * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-/*OUTPUT_FORMAT("elf32-arm", "elf32-arm", "elf32-arm")*/
-OUTPUT_ARCH(arm)
-ENTRY(_start)
-SECTIONS
-{
- . = 0x00000000;
-
- . = ALIGN(4);
- .text :
- {
- cpu/arm926ejs/start.o (.text)
- *(.text)
- }
-
- . = ALIGN(4);
- .rodata : { *(.rodata) }
-
- . = ALIGN(4);
- .data : { *(.data) }
-
- . = ALIGN(4);
- .got : { *(.got) }
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = ALIGN(4);
- __bss_start = .;
- .bss : { *(.bss) }
- _end = . ;
-
-}
diff --git a/board/nx823/Makefile b/board/nx823/Makefile
deleted file mode 100644
index 7a2014d466..0000000000
--- a/board/nx823/Makefile
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/nx823/config.mk b/board/nx823/config.mk
deleted file mode 100644
index 3b3ea1e237..0000000000
--- a/board/nx823/config.mk
+++ /dev/null
@@ -1,28 +0,0 @@
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# Nexus boards
-#
-
-TEXT_BASE = 0x40000000
diff --git a/board/nx823/flash.c b/board/nx823/flash.c
deleted file mode 100644
index 581925e48b..0000000000
--- a/board/nx823/flash.c
+++ /dev/null
@@ -1,464 +0,0 @@
-/*
- * (C) Copyright 2001
- * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
- *
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-extern u_long *my_sernum; /* from nx823.c */
-
-/*-----------------------------------------------------------------------
- * Protection Flags:
- */
-#define FLAG_PROTECT_SET 0x01
-#define FLAG_PROTECT_CLEAR 0x02
-
-/* Board support for 1 or 2 flash devices */
-#undef FLASH_PORT_WIDTH32
-#define FLASH_PORT_WIDTH16
-
-#ifdef FLASH_PORT_WIDTH16
-#define FLASH_PORT_WIDTH ushort
-#define FLASH_PORT_WIDTHV vu_short
-#else
-#define FLASH_PORT_WIDTH ulong
-#define FLASH_PORT_WIDTHV vu_long
-#endif
-
-#define FPW FLASH_PORT_WIDTH
-#define FPWV FLASH_PORT_WIDTHV
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (FPW *addr, flash_info_t *info);
-static int write_data (flash_info_t *info, ulong dest, FPW data);
-static void flash_get_offsets (ulong base, flash_info_t *info);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- unsigned long size_b0;
- int i;
-
- /* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* Static FLASH Bank configuration here - FIXME XXX */
- size_b0 = flash_get_size((FPW *)FLASH_BASE0_PRELIM, &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size_b0, size_b0<<20);
- }
-
- /* Remap FLASH according to real size */
- memctl->memc_or0 = CFG_OR_TIMING_FLASH | (-size_b0 & 0xFFFF8000);
- memctl->memc_br0 = (CFG_FLASH_BASE & BR_BA_MSK) | BR_PS_16 | BR_MS_GPCM | BR_V;
-
- /* Re-do sizing to get full correct info */
- size_b0 = flash_get_size((FPW *)CFG_FLASH_BASE, &flash_info[0]);
-
- flash_get_offsets (CFG_FLASH_BASE, &flash_info[0]);
-
- /* monitor protection ON by default */
- (void)flash_protect(FLAG_PROTECT_SET,
- CFG_FLASH_BASE,
- CFG_FLASH_BASE+monitor_flash_len-1,
- &flash_info[0]);
-
- flash_info[0].size = size_b0;
-
- return (size_b0);
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_get_offsets (ulong base, flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- return;
- }
-
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
- for (i = 0; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00020000);
- }
- }
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_INTEL: printf ("INTEL "); break;
- default: printf ("Unknown Vendor "); break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_28F320J3A:
- printf ("28F320J3A\n"); break;
- case FLASH_28F640J3A:
- printf ("28F640J3A\n"); break;
- case FLASH_28F128J3A:
- printf ("28F128J3A\n"); break;
- default: printf ("Unknown Chip Type\n"); break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " "
- );
- }
- printf ("\n");
- return;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-
-static ulong flash_get_size (FPW *addr, flash_info_t *info)
-{
- FPW value;
-
- /* Write auto select command: read Manufacturer ID */
- addr[0x5555] = (FPW)0x00AA00AA;
- addr[0x2AAA] = (FPW)0x00550055;
- addr[0x5555] = (FPW)0x00900090;
-
- value = addr[0];
-
- switch (value) {
- case (FPW)INTEL_MANUFACT:
- info->flash_id = FLASH_MAN_INTEL;
- break;
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- addr[0] = (FPW)0x00FF00FF; /* restore read mode */
- return (0); /* no or unknown flash */
- }
-
- value = addr[1]; /* device ID */
-
- switch (value) {
- case (FPW)INTEL_ID_28F320J3A:
- info->flash_id += FLASH_28F320J3A;
- info->sector_count = 32;
- info->size = 0x00400000;
- break; /* => 4 MB */
-
- case (FPW)INTEL_ID_28F640J3A:
- info->flash_id += FLASH_28F640J3A;
- info->sector_count = 64;
- info->size = 0x00800000;
- break; /* => 8 MB */
-
- case (FPW)INTEL_ID_28F128J3A:
- info->flash_id += FLASH_28F128J3A;
- info->sector_count = 128;
- info->size = 0x01000000;
- break; /* => 16 MB */
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- break;
- }
-
- if (info->sector_count > CFG_MAX_FLASH_SECT) {
- printf ("** ERROR: sector count %d > max (%d) **\n",
- info->sector_count, CFG_MAX_FLASH_SECT);
- info->sector_count = CFG_MAX_FLASH_SECT;
- }
-
- addr[0] = (FPW)0x00FF00FF; /* restore read mode */
-
- return (info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- int flag, prot, sect;
- ulong type, start, now, last;
- int rcode = 0;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- type = (info->flash_id & FLASH_VENDMASK);
- if ((type != FLASH_MAN_INTEL)) {
- printf ("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- start = get_timer (0);
- last = start;
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- FPWV *addr = (FPWV *)(info->start[sect]);
- FPW status;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- *addr = (FPW)0x00500050; /* clear status register */
- *addr = (FPW)0x00200020; /* erase setup */
- *addr = (FPW)0x00D000D0; /* erase confirm */
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- while (((status = *addr) & (FPW)0x00800080) != (FPW)0x00800080) {
- if ((now=get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- *addr = (FPW)0x00B000B0; /* suspend erase */
- *addr = (FPW)0x00FF00FF; /* reset to read mode */
- rcode = 1;
- break;
- }
-
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- }
-
- *addr = (FPW)0x00FF00FF; /* reset to read mode */
- printf (" done\n");
- }
- }
- return rcode;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- * 4 - Flash not identified
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp;
- FPW data;
- int count, i, l, rc, port_width;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- return 4;
- }
-/* get lower word aligned address */
-#ifdef FLASH_PORT_WIDTH16
- wp = (addr & ~1);
- port_width = 2;
-#else
- wp = (addr & ~3);
- port_width = 4;
-#endif
-
- /* save sernum if needed */
- if (addr >= CFG_FLASH_SN_SECTOR && addr < CFG_FLASH_SN_BASE)
- {
- u_long dest = CFG_FLASH_SN_BASE;
- u_short *sn = (u_short *)my_sernum;
-
- printf("(saving sernum)");
- for (i=0; i<4; i++)
- {
- if ((rc = write_data(info, dest, sn[i])) != 0) {
- return (rc);
- }
- dest += port_width;
- }
- }
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
- for (; i<port_width && cnt>0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<port_width; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- if ((rc = write_data(info, wp, data)) != 0) {
- return (rc);
- }
- wp += port_width;
- }
-
- /*
- * handle word aligned part
- */
- count = 0;
- while (cnt >= port_width) {
- data = 0;
- for (i=0; i<port_width; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_data(info, wp, data)) != 0) {
- return (rc);
- }
- wp += port_width;
- cnt -= port_width;
- if (count++ > 0x800)
- {
- putc('.');
- count = 0;
- }
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<port_width && cnt>0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i<port_width; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- return (write_data(info, wp, data));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word or halfword to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_data (flash_info_t *info, ulong dest, FPW data)
-{
- FPWV *addr = (FPWV *)dest;
- ulong status;
- ulong start;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*addr & data) != data) {
- printf("not erased at %08lx (%x)\n",(ulong)addr,*addr);
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- *addr = (FPW)0x00400040; /* write setup */
- *addr = data;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- start = get_timer (0);
-
- while (((status = *addr) & (FPW)0x00800080) != (FPW)0x00800080) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- *addr = (FPW)0x00FF00FF; /* restore read mode */
- return (1);
- }
- }
-
- *addr = (FPW)0x00FF00FF; /* restore read mode */
-
- return (0);
-}
diff --git a/board/nx823/nx823.c b/board/nx823/nx823.c
deleted file mode 100644
index 65d45c197f..0000000000
--- a/board/nx823/nx823.c
+++ /dev/null
@@ -1,404 +0,0 @@
-/*
- * (C) Copyright 2001
- * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
- *
- * (C) Copyright 2001-2002
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <malloc.h>
-#include <mpc8xx.h>
-
-/* ------------------------------------------------------------------------- */
-
-static long int dram_size (long int, long int *, long int);
-
-/* ------------------------------------------------------------------------- */
-
-#define _NOT_USED_ 0xFFFFFFFF
-
-const uint sdram_table[] = {
-#if (MPC8XX_SPEED <= 50000000L)
- /*
- * Single Read. (Offset 0 in UPMA RAM)
- */
- 0x0F07EC04, 0x01BBD804, 0x1FF7F440, 0xFFFFFC07,
- 0xFFFFFFFF,
-
- /*
- * SDRAM Initialization (offset 5 in UPMA RAM)
- *
- * This is no UPM entry point. The following definition uses
- * the remaining space to establish an initialization
- * sequence, which is executed by a RUN command.
- *
- */
- 0x1FE7F434, 0xEFABE834, 0x1FA7D435,
-
- /*
- * Burst Read. (Offset 8 in UPMA RAM)
- */
- 0x0F07EC04, 0x10EFDC04, 0xF0AFFC00, 0xF0AFFC00,
- 0xF1AFFC00, 0xFFAFFC40, 0xFFAFFC07, 0xFFFFFFFF,
- 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
- 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-
- /*
- * Single Write. (Offset 18 in UPMA RAM)
- */
- 0x0E07E804, 0x01BBD000, 0x1FF7F447, 0xFFFFFFFF,
- 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-
- /*
- * Burst Write. (Offset 20 in UPMA RAM)
- */
- 0x0E07E800, 0x10EFD400, 0xF0AFFC00, 0xF0AFFC00,
- 0xF1AFFC47, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
- 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
- 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-
- /*
- * Refresh (Offset 30 in UPMA RAM)
- */
- 0x1FF7DC84, 0xFFFFFC04, 0xFFFFFC84, 0xFFFFFC07,
- 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
- 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-
- /*
- * Exception. (Offset 3c in UPMA RAM)
- */
- 0x7FFFFC07, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF
-#else
-
- /*
- * Single Read. (Offset 0 in UPMA RAM)
- */
- 0x1F07FC04, 0xEEAFEC04, 0x11AFDC04, 0xEFBBF800,
- 0x1FF7F447,
-
- /*
- * SDRAM Initialization (offset 5 in UPMA RAM)
- *
- * This is no UPM entry point. The following definition uses
- * the remaining space to establish an initialization
- * sequence, which is executed by a RUN command.
- *
- */
- 0x1FF7F434, 0xEFEBE834, 0x1FB7D435,
-
- /*
- * Burst Read. (Offset 8 in UPMA RAM)
- */
- 0x1F07FC04, 0xEEAFEC04, 0x10AFDC04, 0xF0AFFC00,
- 0xF0AFFC00, 0xF1AFFC00, 0xEFBBF800, 0x1FF7F447,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /*
- * Single Write. (Offset 18 in UPMA RAM)
- */
- 0x1F07FC04, 0xEEAFE800, 0x01BBD004, 0x1FF7F447,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /*
- * Burst Write. (Offset 20 in UPMA RAM)
- */
- 0x1F07FC04, 0xEEAFE800, 0x10AFD400, 0xF0AFFC00,
- 0xF0AFFC00, 0xE1BBF804, 0x1FF7F447, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /*
- * Refresh (Offset 30 in UPMA RAM)
- */
- 0x1FF7DC84, 0xFFFFFC04, 0xFFFFFC04, 0xFFFFFC04,
- 0xFFFFFC84, 0xFFFFFC07,
- _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /*
- * Exception. (Offset 3c in UPMA RAM)
- */
- 0x7FFFFC07, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_,
-#endif
-};
-
-/* ------------------------------------------------------------------------- */
-
-
-/*
- * Check Board Identity:
- *
- */
-
-int checkboard (void)
-{
- printf ("Board: Nexus NX823");
- return (0);
-}
-
-/* ------------------------------------------------------------------------- */
-
-long int initdram (int board_type)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- long int size_b0, size_b1, size8, size9;
-
- upmconfig (UPMA, (uint *) sdram_table,
- sizeof (sdram_table) / sizeof (uint));
-
- /*
- * Up to 2 Banks of 64Mbit x 2 devices
- * Initial builds only have 1
- */
- memctl->memc_mptpr = CFG_MPTPR_1BK_4K;
- memctl->memc_mar = 0x00000088;
-
- /*
- * Map controller SDRAM bank 0
- */
- memctl->memc_or1 = CFG_OR1_PRELIM;
- memctl->memc_br1 = CFG_BR1_PRELIM;
- memctl->memc_mamr = CFG_MAMR_8COL & (~(MAMR_PTAE)); /* no refresh yet */
- udelay (200);
-
- /*
- * Map controller SDRAM bank 1
- */
- memctl->memc_or2 = CFG_OR2_PRELIM;
- memctl->memc_br2 = CFG_BR2_PRELIM;
-
- /*
- * Perform SDRAM initializsation sequence
- */
- memctl->memc_mcr = 0x80002105; /* SDRAM bank 0 */
- udelay (1);
- memctl->memc_mcr = 0x80002230; /* SDRAM bank 0 - execute twice */
- udelay (1);
-
- memctl->memc_mcr = 0x80004105; /* SDRAM bank 1 */
- udelay (1);
- memctl->memc_mcr = 0x80004230; /* SDRAM bank 1 - execute twice */
- udelay (1);
-
- memctl->memc_mamr |= MAMR_PTAE; /* enable refresh */
- udelay (1000);
-
- /*
- * Preliminary prescaler for refresh (depends on number of
- * banks): This value is selected for four cycles every 62.4 us
- * with two SDRAM banks or four cycles every 31.2 us with one
- * bank. It will be adjusted after memory sizing.
- */
- memctl->memc_mptpr = CFG_MPTPR_2BK_8K;
-
- memctl->memc_mar = 0x00000088;
-
-
- /*
- * Check Bank 0 Memory Size for re-configuration
- *
- * try 8 column mode
- */
- size8 = dram_size (CFG_MAMR_8COL, (long *) SDRAM_BASE1_PRELIM,
- SDRAM_MAX_SIZE);
-
- udelay (1000);
-
- /*
- * try 9 column mode
- */
- size9 = dram_size (CFG_MAMR_9COL, (long *) SDRAM_BASE1_PRELIM,
- SDRAM_MAX_SIZE);
-
- if (size8 < size9) { /* leave configuration at 9 columns */
- size_b0 = size9;
-/* debug ("SDRAM Bank 0 in 9 column mode: %ld MB\n", size >> 20); */
- } else { /* back to 8 columns */
- size_b0 = size8;
- memctl->memc_mamr = CFG_MAMR_8COL;
- udelay (500);
-/* debug ("SDRAM Bank 0 in 8 column mode: %ld MB\n", size >> 20); */
- }
-
- /*
- * Check Bank 1 Memory Size
- * use current column settings
- * [9 column SDRAM may also be used in 8 column mode,
- * but then only half the real size will be used.]
- */
- size_b1 = dram_size (memctl->memc_mamr, (long *) SDRAM_BASE2_PRELIM,
- SDRAM_MAX_SIZE);
-/* debug ("SDRAM Bank 1: %ld MB\n", size8 >> 20); */
-
- udelay (1000);
-
- /*
- * Adjust refresh rate depending on SDRAM type, both banks
- * For types > 128 MBit leave it at the current (fast) rate
- */
- if ((size_b0 < 0x02000000) && (size_b1 < 0x02000000)) {
- /* reduce to 15.6 us (62.4 us / quad) */
- memctl->memc_mptpr = CFG_MPTPR_2BK_4K;
- udelay (1000);
- }
-
- /*
- * Final mapping: map bigger bank first
- */
- if (size_b1 > size_b0) { /* SDRAM Bank 1 is bigger - map first */
-
- memctl->memc_or2 =
- ((-size_b1) & 0xFFFF0000) | CFG_OR_TIMING_SDRAM;
- memctl->memc_br2 =
- (CFG_SDRAM_BASE & BR_BA_MSK) | BR_MS_UPMA | BR_V;
-
- if (size_b0 > 0) {
- /*
- * Position Bank 0 immediately above Bank 1
- */
- memctl->memc_or1 =
- ((-size_b0) & 0xFFFF0000) |
- CFG_OR_TIMING_SDRAM;
- memctl->memc_br1 =
- ((CFG_SDRAM_BASE & BR_BA_MSK) | BR_MS_UPMA |
- BR_V)
- + size_b1;
- } else {
- unsigned long reg;
-
- /*
- * No bank 0
- *
- * invalidate bank
- */
- memctl->memc_br1 = 0;
-
- /* adjust refresh rate depending on SDRAM type, one bank */
- reg = memctl->memc_mptpr;
- reg >>= 1; /* reduce to CFG_MPTPR_1BK_8K / _4K */
- memctl->memc_mptpr = reg;
- }
-
- } else { /* SDRAM Bank 0 is bigger - map first */
-
- memctl->memc_or1 =
- ((-size_b0) & 0xFFFF0000) | CFG_OR_TIMING_SDRAM;
- memctl->memc_br1 =
- (CFG_SDRAM_BASE & BR_BA_MSK) | BR_MS_UPMA | BR_V;
-
- if (size_b1 > 0) {
- /*
- * Position Bank 1 immediately above Bank 0
- */
- memctl->memc_or2 =
- ((-size_b1) & 0xFFFF0000) |
- CFG_OR_TIMING_SDRAM;
- memctl->memc_br2 =
- ((CFG_SDRAM_BASE & BR_BA_MSK) | BR_MS_UPMA |
- BR_V)
- + size_b0;
- } else {
- unsigned long reg;
-
- /*
- * No bank 1
- *
- * invalidate bank
- */
- memctl->memc_br2 = 0;
-
- /* adjust refresh rate depending on SDRAM type, one bank */
- reg = memctl->memc_mptpr;
- reg >>= 1; /* reduce to CFG_MPTPR_1BK_8K / _4K */
- memctl->memc_mptpr = reg;
- }
- }
-
- udelay (10000);
-
- return (size_b0 + size_b1);
-}
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Check memory range for valid RAM. A simple memory test determines
- * the actually available RAM size between addresses `base' and
- * `base + maxsize'. Some (not all) hardware errors are detected:
- * - short between address lines
- * - short between data lines
- */
-
-static long int dram_size (long int mamr_value, long int *base,
- long int maxsize)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
-
- memctl->memc_mamr = mamr_value;
-
- return (get_ram_size (base, maxsize));
-}
-
-u_long *my_sernum;
-
-int misc_init_r (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- char tmp[50];
- u_char *e = gd->bd->bi_enetaddr;
-
- /* save serial numbre from flash (uniquely programmed) */
- my_sernum = malloc (8);
- memcpy (my_sernum, gd->bd->bi_sernum, 8);
-
- /* save env variables according to sernum */
- sprintf (tmp, "%08lx%08lx", my_sernum[0], my_sernum[1]);
- setenv ("serial#", tmp);
-
- sprintf (tmp, "%02x:%02x:%02x:%02x:%02x:%02x", e[0], e[1], e[2], e[3],
- e[4], e[5]);
- setenv ("ethaddr", tmp);
- return (0);
-}
-
-void load_sernum_ethaddr (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- int i;
- bd_t *bd = gd->bd;
-
- for (i = 0; i < 8; i++) {
- bd->bi_sernum[i] = *(u_char *) (CFG_FLASH_SN_BASE + i);
- }
- bd->bi_enetaddr[0] = 0x10;
- bd->bi_enetaddr[1] = 0x20;
- bd->bi_enetaddr[2] = 0x30;
- bd->bi_enetaddr[3] = bd->bi_sernum[1] << 4 | bd->bi_sernum[2];
- bd->bi_enetaddr[4] = bd->bi_sernum[5];
- bd->bi_enetaddr[5] = bd->bi_sernum[6];
-}
diff --git a/board/nx823/u-boot.lds b/board/nx823/u-boot.lds
deleted file mode 100644
index 7099fc40de..0000000000
--- a/board/nx823/u-boot.lds
+++ /dev/null
@@ -1,131 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc8xx/start.o (.text)
- common/environment.o(.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/nx823/u-boot.lds.debug b/board/nx823/u-boot.lds.debug
deleted file mode 100644
index 3165d56345..0000000000
--- a/board/nx823/u-boot.lds.debug
+++ /dev/null
@@ -1,137 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc8xx/start.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
-
- . = env_offset;
- common/environment.o(.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/o2dnt/Makefile b/board/o2dnt/Makefile
deleted file mode 100644
index 2eb4366bf7..0000000000
--- a/board/o2dnt/Makefile
+++ /dev/null
@@ -1,47 +0,0 @@
-
-#
-# (C) Copyright 2005
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := $(BOARD).o flash.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/o2dnt/config.mk b/board/o2dnt/config.mk
deleted file mode 100644
index b873376804..0000000000
--- a/board/o2dnt/config.mk
+++ /dev/null
@@ -1,27 +0,0 @@
-#
-# (C) Copyright 2005
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-# boot low for 16 MiB boards
-TEXT_BASE = 0xFF000000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
diff --git a/board/o2dnt/flash.c b/board/o2dnt/flash.c
deleted file mode 100644
index 037d28732d..0000000000
--- a/board/o2dnt/flash.c
+++ /dev/null
@@ -1,587 +0,0 @@
-/*
- * (C) Copyright 2005
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * flash_real_protect() routine based on boards/alaska/flash.c
- * (C) Copyright 2001
- * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-
-/* Intel-compatible flash commands */
-#define INTEL_ERASE 0x20
-#define INTEL_PROGRAM 0x40
-#define INTEL_CLEAR 0x50
-#define INTEL_LOCKBIT 0x60
-#define INTEL_PROTECT 0x01
-#define INTEL_STATUS 0x70
-#define INTEL_READID 0x90
-#define INTEL_READID 0x90
-#define INTEL_SUSPEND 0xB0
-#define INTEL_CONFIRM 0xD0
-#define INTEL_RESET 0xFF
-
-/* Intel-compatible flash status bits */
-#define INTEL_FINISHED 0x80
-#define INTEL_OK 0x80
-
-typedef unsigned char FLASH_PORT_WIDTH;
-typedef volatile unsigned char FLASH_PORT_WIDTHV;
-#define FPW FLASH_PORT_WIDTH
-#define FPWV FLASH_PORT_WIDTHV
-#define FLASH_ID_MASK 0xFF
-
-#define ORMASK(size) ((-size) & OR_AM_MSK)
-
-#define FLASH_CYCLE1 0x0555
-#define FLASH_CYCLE2 0x02aa
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size(FPWV *addr, flash_info_t *info);
-static void flash_reset(flash_info_t *info);
-static flash_info_t *flash_get_info(ulong base);
-static int write_data (flash_info_t *info, FPWV *dest, FPW data); /* O2D */
-static void flash_sync_real_protect (flash_info_t * info);
-static unsigned char intel_sector_protected (flash_info_t *info, ushort sector);
-
-/*-----------------------------------------------------------------------
- * flash_init()
- *
- * sets up flash_info and returns size of FLASH (bytes)
- */
-unsigned long flash_init (void)
-{
- unsigned long size = 0;
- int i;
- extern void flash_preinit(void);
- extern void flash_afterinit(ulong);
-
- flash_preinit();
-
- /* Init: no FLASHes known */
- for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
- memset(&flash_info[i], 0, sizeof(flash_info_t));
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* Query flash chip */
- flash_info[0].size =
- flash_get_size((FPW *)CFG_FLASH_BASE, &flash_info[0]);
- size += flash_info[0].size;
-
- /* get the h/w and s/w protection status in sync */
- flash_sync_real_protect(&flash_info[0]);
-
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
- /* monitor protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+monitor_flash_len-1,
- flash_get_info(CFG_MONITOR_BASE));
-#endif
-
-#ifdef CFG_ENV_IS_IN_FLASH
- /* ENV protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR+CFG_ENV_SIZE-1,
- flash_get_info(CFG_ENV_ADDR));
-#endif
-
-
- flash_afterinit(size);
- return (size ? size : 1);
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_reset(flash_info_t *info)
-{
- FPWV *base = (FPWV *)(info->start[0]);
-
- /* Put FLASH back in read mode */
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL)
- *base = (FPW) INTEL_RESET; /* Intel Read Mode */
-}
-
-/*-----------------------------------------------------------------------
- */
-
-static flash_info_t *flash_get_info(ulong base)
-{
- int i;
- flash_info_t * info;
-
- for (i = 0; i < CFG_MAX_FLASH_BANKS; i ++) {
- info = & flash_info[i];
- if (info->size &&
- info->start[0] <= base &&
- base <= info->start[0] + info->size - 1)
- break;
- }
-
- return (i == CFG_MAX_FLASH_BANKS ? 0 : info);
-}
-
-/*-----------------------------------------------------------------------
- */
-
-void flash_print_info (flash_info_t *info)
-{
- int i;
- uchar *boottype;
- uchar *bootletter;
- char *fmt;
- uchar botbootletter[] = "B";
- uchar topbootletter[] = "T";
- uchar botboottype[] = "bottom boot sector";
- uchar topboottype[] = "top boot sector";
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_INTEL:
- printf ("INTEL ");
- break;
- default:
- printf ("Unknown Vendor ");
- break;
- }
-
- /* check for top or bottom boot, if it applies */
- if (info->flash_id & FLASH_BTYPE) {
- boottype = botboottype;
- bootletter = botbootletter;
- } else {
- boottype = topboottype;
- bootletter = topbootletter;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_28F128J3A:
- fmt = "28F128J3 (128 Mbit, uniform sectors)\n";
- break;
- default:
- fmt = "Unknown Chip Type\n";
- break;
- }
-
- printf (fmt, bootletter, boottype);
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20,
- info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
-
- printf (" %08lX%s", info->start[i],
- info->protect[i] ? " (RO)" : " ");
- }
- printf ("\n");
-}
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-ulong flash_get_size (FPWV *addr, flash_info_t *info)
-{
- int i;
-
- /* Write auto select command: read Manufacturer ID */
- /* Write auto select command sequence and test FLASH answer */
- addr[FLASH_CYCLE1] = (FPW) INTEL_READID; /* selects Intel or AMD */
-
- /* The manufacturer codes are only 1 byte, so just use 1 byte.
- * This works for any bus width and any FLASH device width.
- */
- udelay(100);
- switch (addr[0] & 0xff) {
- case (uchar)INTEL_MANUFACT:
- info->flash_id = FLASH_MAN_INTEL;
- break;
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- break;
- }
-
- /* Strataflash is configurable to 8/16bit Bus,
- * but the Query-Structure is Word-orientated */
- if (info->flash_id != FLASH_UNKNOWN) {
- switch ((FPW)addr[2]) {
- case (FPW)INTEL_ID_28F128J3:
- info->flash_id += FLASH_28F128J3A;
- info->sector_count = 128;
- info->size = 0x01000000;
- for( i = 0; i < info->sector_count; i++ )
- info->start[i] = (ulong)addr + (i * 0x20000);
- break; /* => Intel Strataflash 16MB */
- default:
- printf("Flash_id != %xd\n", (FPW)addr[2]);
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- return (0); /* => no or unknown flash */
- }
- }
-
- /* Put FLASH back in read mode */
- flash_reset(info);
-
- return (info->size);
-}
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- FPWV *addr;
- int flag, prot, sect;
- ulong start, now, last;
- int rcode = 0;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_28F128J3A:
- break;
- case FLASH_UNKNOWN:
- default:
- printf ("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- return 1;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect)
- if (info->protect[sect])
- prot++;
-
- if (prot)
- printf ("- Warning: %d protected sectors will not be erased!",
- prot);
-
- printf ("\n");
- last = get_timer(0);
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect <= s_last && rcode == 0; sect++) {
-
- if (info->protect[sect] != 0) /* protected, skip it */
- continue;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr = (FPWV *)(info->start[sect]);
- *addr = (FPW) INTEL_CLEAR; /* clear status register */
- *addr = (FPW) INTEL_ERASE; /* erase setup */
- *addr = (FPW) INTEL_CONFIRM; /* erase confirm */
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- start = get_timer(0);
-
- /* wait at least 80us for Intel - let's wait 1 ms */
- udelay (1000);
-
- while ((*addr & (FPW) INTEL_FINISHED) != (FPW) INTEL_FINISHED) {
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- *addr = (FPW) INTEL_SUSPEND;/* suspend erase */
- flash_reset(info); /* reset to read mode */
- rcode = 1; /* failed */
- break;
- }
-
- /* show that we're waiting */
- if ((get_timer(last)) > CFG_HZ) { /* every second */
- putc ('.');
- last = get_timer(0);
- }
- }
-
- flash_reset(info); /* reset to read mode */
- }
-
- printf (" done\n");
- return rcode;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- FPW data = 0; /* 16 or 32 bit word, matches flash bus width on MPC8XX */
- int bytes; /* number of bytes to program in current word */
- int left; /* number of bytes left to program */
- int i, res;
-
- for (left = cnt, res = 0;
- left > 0 && res == 0;
- addr += sizeof(data), left -= sizeof(data) - bytes) {
-
- bytes = addr & (sizeof(data) - 1);
- addr &= ~(sizeof(data) - 1);
-
- /* combine source and destination data so can program
- * an entire word of 16 or 32 bits */
- for (i = 0; i < sizeof(data); i++) {
- data <<= 8;
- if (i < bytes || i - bytes >= left )
- data += *((uchar *)addr + i);
- else
- data += *src++;
- }
-
- /* write one word to the flash */
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_INTEL:
- res = write_data(info, (FPWV *)addr, data);
- break;
- default:
- /* unknown flash type, error! */
- printf ("missing or unknown FLASH type\n");
- res = 1; /* not really a timeout, but gives error */
- break;
- }
- }
-
- return (res);
-}
-
-/*-----------------------------------------------------------------------
- * Write a word or halfword to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_data (flash_info_t *info, FPWV *dest, FPW data)
-{
- FPWV *addr = dest;
- ulong status;
- ulong start;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*addr & data) != data) {
- printf ("not erased at %08lx (%lx)\n", (ulong) addr, *addr);
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
-
- *addr = (FPW) INTEL_PROGRAM; /* write setup */
- *addr = data;
-
- /* arm simple, non interrupt dependent timer */
- start = get_timer(0);
-
- /* wait while polling the status register */
- while (((status = *addr) & (FPW) INTEL_FINISHED) != (FPW) INTEL_FINISHED) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- *addr = (FPW) INTEL_RESET; /* restore read mode */
- return (1);
- }
- }
-
- *addr = (FPW) INTEL_RESET; /* restore read mode */
- if (flag)
- enable_interrupts();
-
- return (0);
-}
-
-
-/*-----------------------------------------------------------------------
- * Set/Clear sector's lock bit, returns:
- * 0 - OK
- * 1 - Error (timeout, voltage problems, etc.)
- */
-int flash_real_protect (flash_info_t * info, long sector, int prot)
-{
- ulong start;
- int i;
- int rc = 0;
- FPWV *addr = (FPWV *) (info->start[sector]);
- int flag = disable_interrupts ();
-
- *addr = INTEL_CLEAR; /* Clear status register */
- if (prot) { /* Set sector lock bit */
- *addr = INTEL_LOCKBIT; /* Sector lock bit */
- *addr = INTEL_PROTECT; /* set */
- } else { /* Clear sector lock bit */
- *addr = INTEL_LOCKBIT; /* All sectors lock bits */
- *addr = INTEL_CONFIRM; /* clear */
- }
-
- start = get_timer (0);
-
- while ((*addr & INTEL_FINISHED) != INTEL_FINISHED) {
- if (get_timer (start) > CFG_FLASH_UNLOCK_TOUT) {
- printf ("Flash lock bit operation timed out\n");
- rc = 1;
- break;
- }
- }
-
- if (*addr != INTEL_OK) {
- printf ("Flash lock bit operation failed at %08X, CSR=%08X\n",
- (uint) addr, (uint) * addr);
- rc = 1;
- }
-
- if (!rc)
- info->protect[sector] = prot;
-
- /*
- * Clear lock bit command clears all sectors lock bits, so
- * we have to restore lock bits of protected sectors.
- */
- if (!prot) {
- for (i = 0; i < info->sector_count; i++) {
- if (info->protect[i]) {
- start = get_timer (0);
- addr = (FPWV *) (info->start[i]);
- *addr = INTEL_LOCKBIT; /* Sector lock bit */
- *addr = INTEL_PROTECT; /* set */
- while ((*addr & INTEL_FINISHED) !=
- INTEL_FINISHED) {
- if (get_timer (start) >
- CFG_FLASH_UNLOCK_TOUT) {
- printf ("Flash lock bit operation timed out\n");
- rc = 1;
- break;
- }
- }
- }
- }
- }
-
- if (flag)
- enable_interrupts ();
-
- *addr = INTEL_RESET; /* Reset to read array mode */
-
- return rc;
-}
-
-
-/*
- * This function gets the u-boot flash sector protection status
- * (flash_info_t.protect[]) in sync with the sector protection
- * status stored in hardware.
- */
-static void flash_sync_real_protect (flash_info_t * info)
-{
- int i;
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_28F128J3A:
- for (i = 0; i < info->sector_count; ++i) {
- info->protect[i] = intel_sector_protected(info, i);
- }
- break;
- default:
- /* no h/w protect support */
- break;
- }
-}
-
-
-/*
- * checks if "sector" in bank "info" is protected. Should work on intel
- * strata flash chips 28FxxxJ3x in 8-bit mode.
- * Returns 1 if sector is protected (or timed-out while trying to read
- * protection status), 0 if it is not.
- */
-static unsigned char intel_sector_protected (flash_info_t *info, ushort sector)
-{
- FPWV *addr;
- FPWV *lock_conf_addr;
- ulong start;
- unsigned char ret;
-
- /*
- * first, wait for the WSM to be finished. The rationale for
- * waiting for the WSM to become idle for at most
- * CFG_FLASH_ERASE_TOUT is as follows. The WSM can be busy
- * because of: (1) erase, (2) program or (3) lock bit
- * configuration. So we just wait for the longest timeout of
- * the (1)-(3), i.e. the erase timeout.
- */
-
- /* wait at least 35ns (W12) before issuing Read Status Register */
- udelay(1);
- addr = (FPWV *) info->start[sector];
- *addr = (FPW) INTEL_STATUS;
-
- start = get_timer (0);
- while ((*addr & (FPW) INTEL_FINISHED) != (FPW) INTEL_FINISHED) {
- if (get_timer (start) > CFG_FLASH_ERASE_TOUT) {
- *addr = (FPW) INTEL_RESET; /* restore read mode */
- printf("WSM busy too long, can't get prot status\n");
- return 1;
- }
- }
-
- /* issue the Read Identifier Codes command */
- *addr = (FPW) INTEL_READID;
-
- /* wait at least 35ns (W12) before reading */
- udelay(1);
-
- /* Intel example code uses offset of 4 for 8-bit flash */
- lock_conf_addr = (FPWV *) info->start[sector] + 4;
- ret = (*lock_conf_addr & (FPW) INTEL_PROTECT) ? 1 : 0;
-
- /* put flash back in read mode */
- *addr = (FPW) INTEL_RESET;
-
- return ret;
-}
diff --git a/board/o2dnt/o2dnt.c b/board/o2dnt/o2dnt.c
deleted file mode 100644
index 81a27002f4..0000000000
--- a/board/o2dnt/o2dnt.c
+++ /dev/null
@@ -1,182 +0,0 @@
-/*
- * (C) Copyright 2005
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2004
- * Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc5xxx.h>
-#include <pci.h>
-
-#define SDRAM_MODE 0x00CD0000
-#define SDRAM_CONTROL 0x504F0000
-#define SDRAM_CONFIG1 0xD2322800
-#define SDRAM_CONFIG2 0x8AD70000
-
-static void sdram_start (int hi_addr)
-{
- long hi_addr_bit = hi_addr ? 0x01000000 : 0;
-
- /* unlock mode register */
- *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000000 | hi_addr_bit;
- __asm__ volatile ("sync");
-
- /* precharge all banks */
- *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000002 | hi_addr_bit;
- __asm__ volatile ("sync");
-
- /* precharge all banks */
- *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000002 | hi_addr_bit;
- __asm__ volatile ("sync");
-
- /* auto refresh */
- *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000004 | hi_addr_bit;
- __asm__ volatile ("sync");
-
- /* set mode register */
- *(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_MODE;
- __asm__ volatile ("sync");
-
- /* normal operation */
- *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | hi_addr_bit;
- __asm__ volatile ("sync");
-}
-
-/*
- * ATTENTION: Although partially referenced initdram does NOT make real use
- * use of CFG_SDRAM_BASE. The code does not work if CFG_SDRAM_BASE
- * is something else than 0x00000000.
- */
-long int initdram (int board_type)
-{
- ulong dramsize = 0;
- ulong dramsize2 = 0;
- ulong test1, test2;
-
- /* setup SDRAM chip selects */
- *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x0000001e;/* 2G at 0x0 */
- *(vu_long *)MPC5XXX_SDRAM_CS1CFG = 0x80000000;/* disabled */
- __asm__ volatile ("sync");
-
- /* setup config registers */
- *(vu_long *)MPC5XXX_SDRAM_CONFIG1 = SDRAM_CONFIG1;
- *(vu_long *)MPC5XXX_SDRAM_CONFIG2 = SDRAM_CONFIG2;
- __asm__ volatile ("sync");
-
- /* find RAM size using SDRAM CS0 only */
- sdram_start(0);
- test1 = get_ram_size((long *)CFG_SDRAM_BASE, 0x80000000);
- sdram_start(1);
- test2 = get_ram_size((long *)CFG_SDRAM_BASE, 0x80000000);
- if (test1 > test2) {
- sdram_start(0);
- dramsize = test1;
- } else {
- dramsize = test2;
- }
-
- /* memory smaller than 1MB is impossible */
- if (dramsize < (1 << 20)) {
- dramsize = 0;
- }
-
- /* set SDRAM CS0 size according to the amount of RAM found */
- if (dramsize > 0)
- *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x13 + __builtin_ffs(dramsize >> 20) - 1;
- else
- *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0; /* disabled */
-
- /* let SDRAM CS1 start right after CS0 */
- *(vu_long *)MPC5XXX_SDRAM_CS1CFG = dramsize + 0x0000001e;/* 2G */
-
- /* find RAM size using SDRAM CS1 only */
- if (!dramsize)
- sdram_start(0);
-
- test2 = test1 = get_ram_size((long *)(CFG_SDRAM_BASE + dramsize), 0x80000000);
-
- if (!dramsize) {
- sdram_start(1);
- test2 = get_ram_size((long *)(CFG_SDRAM_BASE + dramsize), 0x80000000);
- }
-
- if (test1 > test2) {
- sdram_start(0);
- dramsize2 = test1;
- } else {
- dramsize2 = test2;
- }
-
- /* memory smaller than 1MB is impossible */
- if (dramsize2 < (1 << 20))
- dramsize2 = 0;
-
- /* set SDRAM CS1 size according to the amount of RAM found */
- if (dramsize2 > 0) {
- *(vu_long *)MPC5XXX_SDRAM_CS1CFG = dramsize
- | (0x13 + __builtin_ffs(dramsize2 >> 20) - 1);
- } else {
- *(vu_long *)MPC5XXX_SDRAM_CS1CFG = dramsize; /* disabled */
- }
-
- return dramsize + dramsize2;
-}
-
-int checkboard (void)
-{
- puts ("Board: O2DNT\n");
- return 0;
-}
-
-void flash_preinit(void)
-{
- /*
- * Now, when we are in RAM, enable flash write
- * access for detection process.
- * Note that CS_BOOT cannot be cleared when
- * executing in flash.
- */
- *(vu_long *)MPC5XXX_BOOTCS_CFG &= ~0x1; /* clear RO */
-}
-
-void flash_afterinit(ulong size)
-{
- if (size == 0x800000) { /* adjust mapping */
- *(vu_long *)MPC5XXX_BOOTCS_START = *(vu_long *)MPC5XXX_CS0_START =
- START_REG(CFG_BOOTCS_START | size);
-
- *(vu_long *)MPC5XXX_BOOTCS_STOP = *(vu_long *)MPC5XXX_CS0_STOP =
- STOP_REG(CFG_BOOTCS_START | size, size);
- }
-}
-
-#ifdef CONFIG_PCI
-static struct pci_controller hose;
-
-extern void pci_mpc5xxx_init(struct pci_controller *);
-
-void pci_init_board(void)
-{
- pci_mpc5xxx_init(&hose);
-}
-#endif
diff --git a/board/o2dnt/u-boot.lds b/board/o2dnt/u-boot.lds
deleted file mode 100644
index 88dc118e8f..0000000000
--- a/board/o2dnt/u-boot.lds
+++ /dev/null
@@ -1,125 +0,0 @@
-/*
- * (C) Copyright 2005
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc5xxx/start.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/omap1510inn/omap1510innovator.c b/board/omap1510inn/omap1510innovator.c
index f037f42d41..8941209510 100644
--- a/board/omap1510inn/omap1510innovator.c
+++ b/board/omap1510inn/omap1510innovator.c
@@ -31,6 +31,8 @@
#include <common.h>
+DECLARE_GLOBAL_DATA_PTR;
+
static void flash__init (void);
static void ether__init (void);
@@ -47,8 +49,6 @@ static inline void delay (unsigned long loops)
int board_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
/* arch number of OMAP 1510-Board */
gd->bd->bi_arch_number = MACH_TYPE_OMAP_INNOVATOR;
@@ -122,8 +122,6 @@ static void ether__init (void)
int dram_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
diff --git a/board/omap1610inn/lowlevel_init.S b/board/omap1610inn/lowlevel_init.S
index eaf1742cc7..cc8347fa14 100644
--- a/board/omap1610inn/lowlevel_init.S
+++ b/board/omap1610inn/lowlevel_init.S
@@ -382,7 +382,7 @@ REG_WATCHDOG:
.word 0xfffec808
REG_MPU_LOAD_TIMER:
- .word 0xfffec600
+ .word 0xfffec504
REG_MPU_CNTL_TIMER:
.word 0xfffec500
diff --git a/board/omap1610inn/omap1610innovator.c b/board/omap1610inn/omap1610innovator.c
index 78425181e8..8dbe686a89 100644
--- a/board/omap1610inn/omap1610innovator.c
+++ b/board/omap1610inn/omap1610innovator.c
@@ -36,6 +36,8 @@
#include <./configs/omap1510.h>
#endif
+DECLARE_GLOBAL_DATA_PTR;
+
#ifdef CONFIG_CS_AUTOBOOT
unsigned long omap_flash_base;
#endif
@@ -60,8 +62,6 @@ static inline void delay (unsigned long loops)
int board_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
if (machine_is_omap_h2())
gd->bd->bi_arch_number = MACH_TYPE_OMAP_H2;
else if (machine_is_omap_innovator())
@@ -153,8 +153,6 @@ void ether__init (void)
******************************/
int dram_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
diff --git a/board/omap1710h3/Makefile b/board/omap1710h3/Makefile
new file mode 100644
index 0000000000..2cb6e89786
--- /dev/null
+++ b/board/omap1710h3/Makefile
@@ -0,0 +1,47 @@
+#
+# (C) Copyright 2000, 2001, 2002
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = lib$(BOARD).a
+
+OBJS := omap1710h3.o flash.o
+SOBJS := lowlevel_init.o
+
+$(LIB): $(OBJS) $(SOBJS)
+ $(AR) crv $@ $^
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
+ $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+
+-include .depend
+
+#########################################################################
diff --git a/board/omap1710h3/config.mk b/board/omap1710h3/config.mk
new file mode 100644
index 0000000000..d9e3c7638c
--- /dev/null
+++ b/board/omap1710h3/config.mk
@@ -0,0 +1,26 @@
+#
+# (C) Copyright 2002
+# Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
+# David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
+#
+# (C) Copyright 2004
+# Texas Instruments, <www.ti.com>
+# Kshitij Gupta <Kshitij@ti.com>
+#
+# TI H3 board with OMAP1710 (ARM925EJS) cpu
+# see http://www.ti.com/ for more information on Texas Instruments
+#
+# Innovator has 1 bank of 256 MB SDRAM
+# Physical Address:
+# 1000'0000 to 2000'0000
+#
+#
+# Linux-Kernel is expected to be at 1000'8000, entry 1000'8000
+# (mem base + reserved)
+#
+# we load ourself to 1108'0000
+#
+#
+
+PLATFORM_LDFLAGS += -no-warn-mismatch
+TEXT_BASE = 0x11080000
diff --git a/board/omap1710h3/flash.c b/board/omap1710h3/flash.c
new file mode 100644
index 0000000000..789261f29e
--- /dev/null
+++ b/board/omap1710h3/flash.c
@@ -0,0 +1,495 @@
+/*
+ * (C) Copyright 2001
+ * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
+ *
+ * (C) Copyright 2001-2004
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * (C) Copyright 2003
+ * Texas Instruments, <www.ti.com>
+ * Kshitij Gupta <Kshitij@ti.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <linux/byteorder/swab.h>
+
+#define PHYS_FLASH_SECT_SIZE 0x00020000 /* 256 KB sectors (x2) */
+flash_info_t flash_info[CFG_MAX_MTD_BANKS]; /* info for FLASH chips */
+
+/* Board support for 1 or 2 flash devices */
+#undef FLASH_PORT_WIDTH32
+#define FLASH_PORT_WIDTH16
+
+#ifdef FLASH_PORT_WIDTH16
+#define FLASH_PORT_WIDTH ushort
+#define FLASH_PORT_WIDTHV vu_short
+#define SWAP(x) __swab16(x)
+#else
+#define FLASH_PORT_WIDTH ulong
+#define FLASH_PORT_WIDTHV vu_long
+#define SWAP(x) __swab32(x)
+#endif
+
+#define FPW FLASH_PORT_WIDTH
+#define FPWV FLASH_PORT_WIDTHV
+
+#define mb() __asm__ __volatile__ ("" : : : "memory")
+
+
+/* Flash Organization Structure */
+typedef struct OrgDef {
+ unsigned int sector_number;
+ unsigned int sector_size;
+} OrgDef;
+
+
+/* Flash Organizations */
+OrgDef OrgIntel_28F256L18T[] = {
+ {4, 32 * 1024}, /* 4 * 32kBytes sectors */
+ {255, 128 * 1024}, /* 255 * 128kBytes sectors */
+};
+
+
+/*-----------------------------------------------------------------------
+ * Functions
+ */
+unsigned long flash_init (void);
+static ulong flash_get_size (FPW * addr, flash_info_t * info);
+static int write_data (flash_info_t * info, ulong dest, FPW data);
+static void flash_get_offsets (ulong base, flash_info_t * info);
+void inline spin_wheel (void);
+void flash_print_info (flash_info_t * info);
+void flash_unprotect_sectors (FPWV * addr);
+int flash_erase (flash_info_t * info, int s_first, int s_last);
+int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt);
+void flash_unlock(flash_info_t * info);
+
+/*-----------------------------------------------------------------------
+ */
+
+unsigned long flash_init (void)
+{
+ int i;
+ ulong size = 0;
+ for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
+ switch (i) {
+ case 0:
+ flash_get_size ((FPW *) PHYS_FLASH_1, &flash_info[i]);
+ flash_get_offsets (PHYS_FLASH_1, &flash_info[i]);
+ /* to reset the lock bit */
+ flash_unlock(&flash_info[i]);
+ break;
+ default:
+ panic ("configured too many flash banks!\n");
+ break;
+ }
+ size += flash_info[i].size;
+ }
+
+ /* Protect monitor and environment sectors
+ */
+#ifdef CFG_NAND_BOOT
+#else
+ flash_protect (FLAG_PROTECT_SET,
+ CFG_FLASH_BASE,
+ CFG_FLASH_BASE + monitor_flash_len - 1, &flash_info[0]);
+
+ flash_protect (FLAG_PROTECT_SET,
+ CFG_ENV_ADDR,
+ CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0]);
+#endif
+
+ return size;
+}
+
+/*-----------------------------------------------------------------------
+ */
+void flash_unlock(flash_info_t * info)
+{
+ int j;
+ for (j=2;j<CFG_MAX_FLASH_SECT;j++){
+ FPWV *addr = (FPWV *) (info->start[j]);
+ flash_unprotect_sectors (addr);
+ *addr = (FPW) 0x00500050;/* clear status register */
+ *addr = (FPW) 0x00FF00FF;/* resest to read mode */
+ }
+}
+
+/*-----------------------------------------------------------------------
+ */
+static void flash_get_offsets (ulong base, flash_info_t * info)
+{
+ int i;
+ OrgDef *pOrgDef;
+
+ pOrgDef = OrgIntel_28F256L18T;
+ if (info->flash_id == FLASH_UNKNOWN) {
+ return;
+ }
+
+ if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
+ for (i = 0; i < info->sector_count; i++) {
+ if (i > 255) {
+ info->start[i] = base + (i * 0x8000);
+ info->protect[i] = 0;
+ } else {
+ info->start[i] = base +
+ (i * PHYS_FLASH_SECT_SIZE);
+ info->protect[i] = 0;
+ }
+ }
+ }
+}
+
+/*-----------------------------------------------------------------------
+ */
+void flash_print_info (flash_info_t * info)
+{
+ int i;
+
+ if (info->flash_id == FLASH_UNKNOWN) {
+ printf ("missing or unknown FLASH type\n");
+ return;
+ }
+
+ switch (info->flash_id & FLASH_VENDMASK) {
+ case FLASH_MAN_INTEL:
+ printf ("INTEL ");
+ break;
+ default:
+ printf ("Unknown Vendor ");
+ break;
+ }
+
+ switch (info->flash_id & FLASH_TYPEMASK) {
+ case FLASH_28F256L18T:
+ printf ("FLASH 28F256L18T\n");
+ break;
+ default:
+ printf ("Unknown Chip Type\n");
+ break;
+ }
+
+ printf (" Size: %ld MB in %d Sectors\n",
+ info->size >> 20, info->sector_count);
+
+ printf (" Sector Start Addresses:");
+ for (i = 0; i < info->sector_count; ++i) {
+ if ((i % 5) == 0)
+ printf ("\n ");
+ printf (" %08lX%s",
+ info->start[i], info->protect[i] ? " (RO)" : " ");
+ }
+ printf ("\n");
+ return;
+}
+
+/*
+ * The following code cannot be run from FLASH!
+ */
+static ulong flash_get_size (FPW * addr, flash_info_t * info)
+{
+ volatile FPW value;
+
+ /* Write auto select command: read Manufacturer ID */
+ addr[0x5555] = (FPW) 0x00AA00AA;
+ addr[0x2AAA] = (FPW) 0x00550055;
+ addr[0x5555] = (FPW) 0x00900090;
+
+ mb ();
+ value = addr[0];
+
+ switch (value) {
+
+ case (FPW) INTEL_MANUFACT:
+ info->flash_id = FLASH_MAN_INTEL;
+ break;
+
+ default:
+ info->flash_id = FLASH_UNKNOWN;
+ info->sector_count = 0;
+ info->size = 0;
+ addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
+ return (0); /* no or unknown flash */
+ }
+
+ mb ();
+ value = addr[1]; /* device ID */
+ switch (value) {
+
+ case (FPW) (INTEL_ID_28F256L18T):
+ info->flash_id += FLASH_28F256L18T;
+ info->sector_count = 259;
+ info->size = 0x02000000;
+ break; /* => 32 MB */
+
+ default:
+ info->flash_id = FLASH_UNKNOWN;
+ break;
+ }
+
+ if (info->sector_count > CFG_MAX_FLASH_SECT) {
+ printf ("** ERROR: sector count %d > max (%d) **\n",
+ info->sector_count, CFG_MAX_FLASH_SECT);
+ info->sector_count = CFG_MAX_FLASH_SECT;
+ }
+
+ addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
+
+ return (info->size);
+}
+
+
+/* unprotects a sector for write and erase
+ * on some intel parts, this unprotects the entire chip, but it
+ * wont hurt to call this additional times per sector...
+ */
+void flash_unprotect_sectors (FPWV * addr)
+{
+#define PD_FINTEL_WSMS_READY_MASK 0x0080
+
+ *addr = (FPW) 0x00500050; /* clear status register */
+
+ /* this sends the clear lock bit command */
+ *addr = (FPW) 0x00600060;
+ *addr = (FPW) 0x00D000D0;
+}
+
+
+/*-----------------------------------------------------------------------
+ */
+
+int flash_erase (flash_info_t * info, int s_first, int s_last)
+{
+ int flag, prot, sect;
+ ulong type, start, last;
+ int rcode = 0;
+
+ if ((s_first < 0) || (s_first > s_last)) {
+ if (info->flash_id == FLASH_UNKNOWN) {
+ printf ("- missing\n");
+ } else {
+ printf ("- no sectors to erase\n");
+ }
+ return 1;
+ }
+
+ type = (info->flash_id & FLASH_VENDMASK);
+ if ((type != FLASH_MAN_INTEL)) {
+ printf ("Can't erase unknown flash type %08lx - aborted\n",
+ info->flash_id);
+ return 1;
+ }
+
+ prot = 0;
+ for (sect = s_first; sect <= s_last; ++sect) {
+ if (info->protect[sect]) {
+ prot++;
+ }
+ }
+
+ if (prot) {
+ printf ("- Warning: %d protected sectors will not be erased!\n",
+ prot);
+ } else {
+ printf ("\n");
+ }
+
+
+ start = get_timer (0);
+ last = start;
+
+ /* Disable interrupts which might cause a timeout here */
+ flag = disable_interrupts ();
+
+ /* Start erase on unprotected sectors */
+ for (sect = s_first; sect <= s_last; sect++) {
+ if (info->protect[sect] == 0) { /* not protected */
+ FPWV *addr = (FPWV *) (info->start[sect]);
+ FPW status;
+
+ printf ("Erasing sector %2d ... ", sect);
+
+ flash_unprotect_sectors (addr);
+
+ /* arm simple, non interrupt dependent timer */
+ reset_timer_masked ();
+
+ *addr = (FPW) 0x00500050;/* clear status register */
+ *addr = (FPW) 0x00200020;/* erase setup */
+ *addr = (FPW) 0x00D000D0;/* erase confirm */
+
+ while (((status =
+ *addr) & (FPW) 0x00800080) !=
+ (FPW) 0x00800080) {
+ if (get_timer_masked () >
+ CFG_FLASH_ERASE_TOUT) {
+ printf ("Timeout\n");
+ /* suspend erase */
+ *addr = (FPW) 0x00B000B0;
+ /* reset to read mode */
+ *addr = (FPW) 0x00FF00FF;
+ rcode = 1;
+ break;
+ }
+ }
+
+ /* clear status register cmd. */
+ *addr = (FPW) 0x00500050;
+ *addr = (FPW) 0x00FF00FF;/* resest to read mode */
+ printf (" done\n");
+ }
+ }
+ return rcode;
+}
+
+/*-----------------------------------------------------------------------
+ * Copy memory to flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ * 4 - Flash not identified
+ */
+
+int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
+{
+ ulong cp, wp;
+ FPW data;
+ int count, i, l, rc, port_width;
+
+ if (info->flash_id == FLASH_UNKNOWN) {
+ return 4;
+ }
+/* get lower word aligned address */
+#ifdef FLASH_PORT_WIDTH16
+ wp = (addr & ~1);
+ port_width = 2;
+#else
+ wp = (addr & ~3);
+ port_width = 4;
+#endif
+
+ /*
+ * handle unaligned start bytes
+ */
+ if ((l = addr - wp) != 0) {
+ data = 0;
+ for (i = 0, cp = wp; i < l; ++i, ++cp) {
+ data = (data << 8) | (*(uchar *) cp);
+ }
+ for (; i < port_width && cnt > 0; ++i) {
+ data = (data << 8) | *src++;
+ --cnt;
+ ++cp;
+ }
+ for (; cnt == 0 && i < port_width; ++i, ++cp) {
+ data = (data << 8) | (*(uchar *) cp);
+ }
+
+ if ((rc = write_data (info, wp, SWAP (data))) != 0) {
+ return (rc);
+ }
+ wp += port_width;
+ }
+
+ /*
+ * handle word aligned part
+ */
+ count = 0;
+ while (cnt >= port_width) {
+ data = 0;
+ for (i = 0; i < port_width; ++i) {
+ data = (data << 8) | *src++;
+ }
+ if ((rc = write_data (info, wp, SWAP (data))) != 0) {
+ return (rc);
+ }
+ wp += port_width;
+ cnt -= port_width;
+ if (count++ > 0x800) {
+ spin_wheel ();
+ count = 0;
+ }
+ }
+
+ if (cnt == 0) {
+ return (0);
+ }
+
+ /*
+ * handle unaligned tail bytes
+ */
+ data = 0;
+ for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) {
+ data = (data << 8) | *src++;
+ --cnt;
+ }
+ for (; i < port_width; ++i, ++cp) {
+ data = (data << 8) | (*(uchar *) cp);
+ }
+
+ return (write_data (info, wp, SWAP (data)));
+}
+
+/*-----------------------------------------------------------------------
+ * Write a word or halfword to Flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ */
+static int write_data (flash_info_t * info, ulong dest, FPW data)
+{
+ FPWV *addr = (FPWV *) dest;
+ ulong status;
+ int flag;
+
+ /* Check if Flash is (sufficiently) erased */
+ if ((*addr & data) != data) {
+ printf ("not erased at %08lx (%x)\n", (ulong) addr, *addr);
+ return (2);
+ }
+ /* Disable interrupts which might cause a timeout here */
+ flag = disable_interrupts ();
+ *addr = (FPW) 0x00400040; /* write setup */
+ *addr = data;
+
+ /* arm simple, non interrupt dependent timer */
+ reset_timer_masked ();
+
+ /* wait while polling the status register */
+ while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
+ if (get_timer_masked () > CFG_FLASH_WRITE_TOUT) {
+ *addr = (FPW) 0x00FF00FF; /* restore read mode */
+ return (1);
+ }
+ }
+ *addr = (FPW) 0x00FF00FF; /* restore read mode */
+ return (0);
+}
+
+void inline spin_wheel (void)
+{
+ static int p = 0;
+ static char w[] = "\\/-";
+
+ printf ("\010%c", w[p]);
+ (++p == 3) ? (p = 0) : 0;
+}
diff --git a/board/omap1710h3/lowlevel_init.S b/board/omap1710h3/lowlevel_init.S
new file mode 100644
index 0000000000..0b9b0ebdb6
--- /dev/null
+++ b/board/omap1710h3/lowlevel_init.S
@@ -0,0 +1,441 @@
+/*
+ * Board specific setup info
+ *
+ * (C) Copyright 2004
+ * Texas Instruments, <www.ti.com>
+ * Kshitij Gupta <Kshitij@ti.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <config.h>
+#include <version.h>
+
+#if defined(CONFIG_OMAP1710)
+#include <./configs/omap1510.h>
+#endif
+
+
+_TEXT_BASE:
+ .word TEXT_BASE /* sdram load addr from config.mk */
+
+.globl lowlevel_init
+lowlevel_init:
+
+
+ /*------------------------------------------------------*
+ * Set up ARM CLM registers (IDLECT1) *
+ *------------------------------------------------------*/
+ ldr r0, REG_ARM_IDLECT1
+ ldr r1, VAL_ARM_IDLECT1
+ str r1, [r0]
+
+ /*------------------------------------------------------*
+ * Set up ARM CLM registers (IDLECT2) *
+ *------------------------------------------------------*/
+ ldr r0, REG_ARM_IDLECT2
+ ldr r1, VAL_ARM_IDLECT2
+ str r1, [r0]
+
+ /*------------------------------------------------------*
+ * Set up ARM CLM registers (IDLECT3) *
+ *------------------------------------------------------*/
+ ldr r0, REG_ARM_IDLECT3
+ ldr r1, VAL_ARM_IDLECT3
+ str r1, [r0]
+
+
+ mov r1, #0x05 /* PER_EN bit */
+ ldr r0, REG_ARM_RSTCT2
+ strh r1, [r0] /* CLKM; Peripheral reset. */
+
+ /* Set CLKM to Sync-Scalable */
+ /* I supposedly need to enable the dsp clock before switching */
+ ldr r1, VAL_ARM_SYSST
+ ldr r0, REG_ARM_SYSST
+ strh r1, [r0]
+ mov r0, #0x400
+1:
+ subs r0, r0, #0x1 /* wait for any bubbles to finish */
+ bne 1b
+ ldr r1, VAL_ARM_CKCTL
+ ldr r0, REG_ARM_CKCTL
+ strh r1, [r0]
+
+ /* a few nops to let settle */
+ nop
+ nop
+ nop
+ nop
+ nop
+ nop
+ nop
+ nop
+ nop
+ nop
+
+ /* setup DPLL 1 */
+ /* Ramp up the clock to 96Mhz */
+ ldr r1, VAL_DPLL1_CTL
+ ldr r0, REG_DPLL1_CTL
+ strh r1, [r0]
+ ands r1, r1, #0x10 /* Check if PLL is enabled. */
+ beq lock_end /* Do not look for lock if BYPASS selected */
+2:
+ ldrh r1, [r0]
+ ands r1, r1, #0x01 /* Check the LOCK bit.*/
+ beq 2b /* loop until bit goes hi. */
+lock_end:
+
+
+ /*------------------------------------------------------*
+ * Turn off the watchdog during init... *
+ *------------------------------------------------------*/
+ ldr r0, REG_WATCHDOG
+ ldr r1, WATCHDOG_VAL1
+ str r1, [r0]
+ ldr r1, WATCHDOG_VAL2
+ str r1, [r0]
+ ldr r0, REG_WSPRDOG
+ ldr r1, WSPRDOG_VAL1
+ str r1, [r0]
+ ldr r0, REG_WWPSDOG
+
+watch1Wait:
+ ldr r1, [r0]
+ tst r1, #0x10
+ bne watch1Wait
+
+ ldr r0, REG_WSPRDOG
+ ldr r1, WSPRDOG_VAL2
+ str r1, [r0]
+ ldr r0, REG_WWPSDOG
+watch2Wait:
+ ldr r1, [r0]
+ tst r1, #0x10
+ bne watch2Wait
+
+
+ /* Set memory timings corresponding to the new clock speed */
+
+ /* Check execution location to determine current execution location
+ * and branch to appropriate initialization code.
+ */
+ /* Load physical SDRAM base. */
+ mov r0, #0x10000000
+ /* Get current execution location. */
+ mov r1, pc
+ /* Compare. */
+ cmp r1, r0
+ /* Skip over EMIF-fast initialization if running from SDRAM. */
+ bge skip_sdram
+
+ /* Enable EMIFF TC Doubler in OMAP1710 */
+ ldr r0, REG_EMIFF_DOUBLER
+ mov r1, #0x1
+ str r1, [r0]
+
+ /*
+ * Delay for SDRAM initialization.
+ */
+ mov r3, #0x1800 /* value should be checked */
+3:
+ subs r3, r3, #0x1 /* Decrement count */
+ bne 3b
+
+
+ /*
+ * Set SDRAM control values. Disable refresh before MRS command.
+ */
+
+ /* mobile ddr operation */
+ ldr r0, REG_SDRAM_OPERATION
+ mov r2, #07
+ str r2, [r0]
+
+ /* config register */
+ ldr r0, REG_SDRAM_CONFIG
+ ldr r1, SDRAM_CONFIG_VAL
+ str r1, [r0]
+
+ /* manual command register */
+ ldr r0, REG_SDRAM_MANUAL_CMD
+ /* issue set cke high */
+ mov r1, #CMD_SDRAM_CKE_SET_HIGH
+ str r1, [r0]
+ /* issue nop */
+ mov r1, #CMD_SDRAM_NOP
+ str r1, [r0]
+
+ mov r2, #0x0100
+waitMDDR1:
+ subs r2, r2, #1
+ bne waitMDDR1 /* delay loop */
+
+ /* issue precharge */
+ mov r1, #CMD_SDRAM_PRECHARGE
+ str r1, [r0]
+
+
+ /* issue autorefresh x 2 */
+ mov r1, #CMD_SDRAM_AUTOREFRESH
+ str r1, [r0]
+ str r1, [r0]
+
+ /* mrs register ddr mobile */
+ ldr r0, REG_SDRAM_MRS
+ mov r1, #0x33
+ str r1, [r0]
+
+ /* emrs1 low-power register */
+ ldr r0, REG_SDRAM_EMRS1
+ /* self refresh on all banks */
+ mov r1, #0
+ str r1, [r0]
+
+ ldr r0, REG_DLL_URD_CONTROL
+ ldr r1, DLL_URD_CONTROL_VAL
+ str r1, [r0]
+
+ ldr r0, REG_DLL_LRD_CONTROL
+ ldr r1, DLL_LRD_CONTROL_VAL
+ str r1, [r0]
+
+ ldr r0, REG_DLL_WRT_CONTROL
+ ldr r1, DLL_WRT_CONTROL_VAL
+ str r1, [r0]
+
+ /* delay loop */
+ mov r2, #0x0100
+waitMDDR2:
+ subs r2, r2, #1
+ bne waitMDDR2
+
+ /*
+ * Delay for SDRAM initialization.
+ */
+ mov r3, #0x1800
+4:
+ subs r3, r3, #1 /* Decrement count. */
+ bne 4b
+ b common_tc
+
+skip_sdram:
+
+ ldr r0, REG_SDRAM_CONFIG
+ ldr r1, SDRAM_CONFIG_VAL
+ str r1, [r0]
+
+common_tc:
+ /* slow interface */
+ ldr r1, VAL_TC_EMIFS_CONFIG
+ ldr r0, REG_TC_EMIFS_CONFIG
+ str r1, [r0]
+
+ ldr r1, VAL_TC_EMIFS_CS0_CONFIG
+ ldr r0, REG_TC_EMIFS_CS0_CONFIG
+ str r1, [r0] /* Chip Select 0 */
+
+ ldr r1, VAL_TC_EMIFS_CS1_CONFIG
+ ldr r0, REG_TC_EMIFS_CS1_CONFIG
+ str r1, [r0] /* Chip Select 1 */
+
+ ldr r1, VAL_TC_EMIFS_CS3_CONFIG
+ ldr r0, REG_TC_EMIFS_CS3_CONFIG
+ str r1, [r0] /* Chip Select 3 */
+
+ /* inserting additional 2 clock cycle hold time for testing LAN */
+ ldr r0, REG_TC_EMIFS_CS1_ADVANCED
+ ldr r1, VAL_TC_EMIFS_CS1_ADVANCED
+ str r1, [r0]
+
+ /* Start MPU Timer 1 */
+ ldr r0, REG_MPU_LOAD_TIMER
+ ldr r1, VAL_MPU_LOAD_TIMER
+ str r1, [r0]
+
+ ldr r0, REG_MPU_CNTL_TIMER
+ ldr r1, VAL_MPU_CNTL_TIMER
+ str r1, [r0]
+
+ /* back to arch calling code */
+ mov pc, lr
+
+ /* the literal pools origin */
+ .ltorg
+
+
+REG_TC_EMIFS_CONFIG: /* 32 bits */
+ .word 0xfffecc0c
+REG_TC_EMIFS_CS0_CONFIG: /* 32 bits */
+ .word 0xfffecc10
+REG_TC_EMIFS_CS1_CONFIG: /* 32 bits */
+ .word 0xfffecc14
+REG_TC_EMIFS_CS2_CONFIG: /* 32 bits */
+ .word 0xfffecc18
+REG_TC_EMIFS_CS3_CONFIG: /* 32 bits */
+ .word 0xfffecc1c
+REG_TC_EMIFS_CS1_ADVANCED: /* 32 bits */
+ .word 0xfffecc54
+
+/* MPU clock/reset/power mode control registers */
+REG_ARM_CKCTL: /* 16 bits */
+ .word 0xfffece00
+
+REG_ARM_IDLECT3: /* 16 bits */
+ .word 0xfffece24
+REG_ARM_IDLECT2: /* 16 bits */
+ .word 0xfffece08
+REG_ARM_IDLECT1: /* 16 bits */
+ .word 0xfffece04
+
+REG_ARM_RSTCT2: /* 16 bits */
+ .word 0xfffece14
+REG_ARM_SYSST: /* 16 bits */
+ .word 0xfffece18
+/* DPLL control registers */
+REG_DPLL1_CTL: /* 16 bits */
+ .word 0xfffecf00
+
+/* Watch Dog register */
+/* secure watchdog stop */
+REG_WSPRDOG:
+ .word 0xfffeb048
+/* watchdog write pending */
+REG_WWPSDOG:
+ .word 0xfffeb034
+
+WSPRDOG_VAL1:
+ .word 0x0000aaaa
+WSPRDOG_VAL2:
+ .word 0x00005555
+
+/* SDRAM config is: auto refresh enabled, 16 bit 4 bank,
+ counter @8192 rows, 10 ns, 8 burst */
+REG_SDRAM_CONFIG:
+ .word 0xfffecc20
+
+/* Operation register */
+REG_SDRAM_OPERATION:
+ .word 0xfffecc80
+
+REG_EMIFF_DOUBLER:
+ .word 0xfffecc60
+
+/* Manual command register */
+REG_SDRAM_MANUAL_CMD:
+ .word 0xfffecc84
+
+/* SDRAM MRS (New) config is: CAS latency is 2, burst length 8 */
+REG_SDRAM_MRS:
+ .word 0xfffecc70
+
+/* SDRAM MRS (New) config is: CAS latency is 2, burst length 8 */
+REG_SDRAM_EMRS1:
+ .word 0xfffecc78
+
+/* WRT DLL register */
+REG_DLL_WRT_CONTROL:
+ .word 0xfffecc64
+DLL_WRT_CONTROL_VAL:
+ .word 0x03500002
+
+/* URD DLL register */
+REG_DLL_URD_CONTROL:
+ .word 0xfffeccc0
+DLL_URD_CONTROL_VAL:
+ .word 0x00000006
+
+/* LRD DLL register */
+REG_DLL_LRD_CONTROL:
+ .word 0xfffecccc
+
+REG_WATCHDOG:
+ .word 0xfffec808
+
+REG_MPU_LOAD_TIMER:
+ .word 0xfffec600
+REG_MPU_CNTL_TIMER:
+ .word 0xfffec500
+
+/* 96 MHz Samsung Mobile DDR */
+SDRAM_CONFIG_VAL:
+ .word 0x0c028af4
+
+DLL_LRD_CONTROL_VAL:
+ .word 0x00000006
+
+VAL_ARM_CKCTL:
+ .word 0x350e
+VAL_ARM_SYSST:
+ .word 0x1001
+
+VAL_DPLL1_CTL:
+ .word 0x2810
+
+VAL_TC_EMIFS_CONFIG:
+#ifdef CFG_NAND_BOOT
+ .word 0x00000010
+#else
+ .word 0x00000012
+#endif
+
+VAL_TC_EMIFS_CS0_CONFIG:
+ .word 0x0000fffb
+VAL_TC_EMIFS_CS1_CONFIG:
+ .word 0x81808cc3
+VAL_TC_EMIFS_CS2_CONFIG:
+ .word 0xf800f22a
+VAL_TC_EMIFS_CS3_CONFIG:
+#ifdef CFG_NAND_BOOT
+ .word 0xff80fff3
+#else
+ .word 0x98011031
+#endif
+VAL_TC_EMIFS_CS1_ADVANCED:
+ .word 0x00000022
+
+VAL_TC_EMIFF_SDRAM_CONFIG:
+ .word 0x010290fc
+VAL_TC_EMIFF_MRS:
+ .word 0x00000027
+
+VAL_ARM_IDLECT1:
+ .word 0x000014c6
+
+VAL_ARM_IDLECT2:
+ .word 0x000009ff
+VAL_ARM_IDLECT3:
+ .word 0x0000003f
+
+WATCHDOG_VAL1:
+ .word 0x000000f5
+WATCHDOG_VAL2:
+ .word 0x000000a0
+
+VAL_MPU_LOAD_TIMER:
+ .word 0xffffffff
+VAL_MPU_CNTL_TIMER:
+ .word 0xffffffa1
+
+/* command values */
+.equ CMD_SDRAM_NOP, 0x00000000
+.equ CMD_SDRAM_PRECHARGE, 0x00000001
+.equ CMD_SDRAM_AUTOREFRESH, 0x00000002
+.equ CMD_SDRAM_CKE_SET_HIGH, 0x00000007
diff --git a/board/omap1710h3/omap1710h3.c b/board/omap1710h3/omap1710h3.c
new file mode 100644
index 0000000000..b9fa1ff2f8
--- /dev/null
+++ b/board/omap1710h3/omap1710h3.c
@@ -0,0 +1,309 @@
+/*
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Marius Groeger <mgroeger@sysgo.de>
+ *
+ * (C) Copyright 2002
+ * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
+ *
+ * (C) Copyright 2003
+ * Texas Instruments, <www.ti.com>
+ * Kshitij Gupta <Kshitij@ti.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#if defined(CONFIG_OMAP1710)
+#include <./configs/omap1510.h>
+#endif
+#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+#include <linux/mtd/nand.h>
+extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
+#endif
+
+
+void flash__init (void);
+void ether__init (void);
+void set_muxconf_regs (void);
+void peripheral_power_enable (void);
+
+#define COMP_MODE_ENABLE ((unsigned int)0x0000EAEF)
+
+static inline void delay (unsigned long loops)
+{
+ __asm__ volatile ("1:\n"
+ "subs %0, %1, #1\n"
+ "bne 1b":"=r" (loops):"0" (loops));
+}
+
+/*
+ * Miscellaneous platform dependent initialisations
+ */
+
+int board_init (void)
+{
+ DECLARE_GLOBAL_DATA_PTR;
+
+ /* arch number of OMAP1710 H3 */
+ gd->bd->bi_arch_number = 509;
+
+ /* adress of boot parameters */
+ gd->bd->bi_boot_params = 0x10000100;
+
+ /* Configure MUX settings */
+ set_muxconf_regs ();
+ peripheral_power_enable ();
+
+/* this speeds up your boot a quite a bit. However to make it
+ * work, you need make sure your kernel startup flush bug is fixed.
+ * ... rkw ...
+ */
+ icache_enable ();
+
+ flash__init ();
+ ether__init ();
+ return 0;
+}
+
+
+int misc_init_r (void)
+{
+ /* currently empty */
+ return (0);
+}
+
+/******************************
+ Routine:
+ Description:
+******************************/
+void flash__init (void)
+{
+#define EMIFS_GlB_Config_REG 0xfffecc0c
+ unsigned int regval;
+ regval = *((volatile unsigned int *) EMIFS_GlB_Config_REG);
+ /* Turn off write protection for flash devices. */
+ regval = regval | 0x0001;
+ *((volatile unsigned int *) EMIFS_GlB_Config_REG) = regval;
+}
+/*************************************************************
+ Routine:ether__init
+ Description: take the Ethernet controller out of reset and wait
+ for the EEPROM load to complete.
+*************************************************************/
+void ether__init (void)
+{
+ #define LAN_RESET_REGISTER 0x0400001c
+ #define ETH_CONTROL_REG 0x0400030b
+
+ *((volatile unsigned short *) LAN_RESET_REGISTER) = 0x0000;
+ do {
+ *((volatile unsigned short *) LAN_RESET_REGISTER) = 0x0001;
+ udelay (3);
+ } while (*((volatile unsigned short *) LAN_RESET_REGISTER) != 0x0001);
+
+ do {
+ *((volatile unsigned short *) LAN_RESET_REGISTER) = 0x0000;
+ udelay (3);
+ } while (*((volatile unsigned short *) LAN_RESET_REGISTER) != 0x0000);
+
+ *((volatile unsigned char *) ETH_CONTROL_REG) &= ~0x01;
+ udelay (3);
+}
+
+/******************************
+ Routine:
+ Description:
+******************************/
+int dram_init (void)
+{
+ DECLARE_GLOBAL_DATA_PTR;
+
+ gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+ gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+
+ return 0;
+}
+
+/******************************************************
+ Routine: set_muxconf_regs
+ Description: Setting up the configuration Mux registers
+ specific to the hardware
+*******************************************************/
+void set_muxconf_regs (void)
+{
+ volatile unsigned int *MuxConfReg;
+ /* set each registers to its reset value; */
+ MuxConfReg =
+ (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_0);
+ /* setup for UART1 */
+ *MuxConfReg &= ~(0x02000000); /* bit 25 */
+ /* setup for UART2 */
+ *MuxConfReg &= ~(0x01000000); /* bit 24 */
+ /* Disable Uwire CS Hi-Z */
+ *MuxConfReg |= 0x08000000;
+ MuxConfReg =
+ (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_3);
+ *MuxConfReg = 0x00000000;
+ MuxConfReg =
+ (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_4);
+ *MuxConfReg = 0x00000000;
+ MuxConfReg =
+ (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_5);
+ *MuxConfReg = 0x00000000;
+ MuxConfReg =
+ (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_6);
+ /*setup mux for UART3 */
+ *MuxConfReg |= 0x00000001; /* bit3, 1, 0 (mux0 5,5,26) */
+ *MuxConfReg &= ~0x0000003e;
+ MuxConfReg =
+ (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_7);
+ *MuxConfReg = 0x00000000;
+ MuxConfReg =
+ (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_8);
+ /* Disable Uwire CS Hi-Z */
+ *MuxConfReg |= 0x00001200; /*bit 9 for CS0 12 for CS3 */
+ MuxConfReg =
+ (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_9);
+ /* Need to turn on bits 21 and 12 in FUNC_MUX_CTRL_9 so the */
+ /* hardware will actually use TX and RTS based on bit 25 in */
+ /* FUNC_MUX_CTRL_0. I told you this thing was screwy! */
+ *MuxConfReg |= 0x00201000;
+ MuxConfReg =
+ (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_A);
+ *MuxConfReg = 0x00006000;
+ MuxConfReg =
+ (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_B);
+ *MuxConfReg = 0x00000000;
+ MuxConfReg =
+ (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_C);
+ /* setup for UART2 */
+ /* Need to turn on bits 27 and 24 in FUNC_MUX_CTRL_C so the */
+ /* hardware will actually use TX and RTS based on bit 24 in */
+ /* FUNC_MUX_CTRL_0. */
+ *MuxConfReg |= 0x09000000;
+ MuxConfReg =
+ (volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_0);
+ *MuxConfReg = 0x00000000;
+ MuxConfReg =
+ (volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_1);
+ *MuxConfReg = 0x00000000;
+ /* mux setup for SD/MMC driver */
+ MuxConfReg =
+ (volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_2);
+ *MuxConfReg &= 0xFFFE0FFF;
+ MuxConfReg =
+ (volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_3);
+ *MuxConfReg = 0x00000000;
+ MuxConfReg =
+ (volatile unsigned int *) ((unsigned int) MOD_CONF_CTRL_0);
+ /* bit 13 for MMC2 XOR_CLK */
+ *MuxConfReg &= ~(0x00002000);
+ /* bit 29 for UART 1 */
+ *MuxConfReg &= ~(0x00002000);
+ MuxConfReg =
+ (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_0);
+ /* Configure for USB. Turn on VBUS_CTRL and VBUS_MODE. */
+ *MuxConfReg |= 0x000C0000;
+ MuxConfReg =
+ (volatile unsigned int *) ((unsigned int)USB_TRANSCEIVER_CTRL);
+ *MuxConfReg &= ~(0x00000070);
+ *MuxConfReg &= ~(0x00000008);
+ *MuxConfReg |= 0x00000003;
+ *MuxConfReg |= 0x00000180;
+ MuxConfReg =
+ (volatile unsigned int *) ((unsigned int) MOD_CONF_CTRL_0);
+ /* bit 17, software controls VBUS */
+ *MuxConfReg &= ~(0x00020000);
+ /* Enable USB 48 and 12M clocks */
+ *MuxConfReg |= 0x00000200;
+ *MuxConfReg &= ~(0x00000180);
+ /*2.75V for MMCSDIO1 */
+ MuxConfReg =
+ (volatile unsigned int *) ((unsigned int) VOLTAGE_CTRL_0);
+ *MuxConfReg = 0x00001FE7;
+ MuxConfReg =
+ (volatile unsigned int *) ((unsigned int) PU_PD_SEL_0);
+ *MuxConfReg = 0x00000000;
+ MuxConfReg =
+ (volatile unsigned int *) ((unsigned int) PU_PD_SEL_1);
+ *MuxConfReg = 0x00000000;
+ MuxConfReg =
+ (volatile unsigned int *) ((unsigned int) PU_PD_SEL_2);
+ *MuxConfReg = 0x00000000;
+ MuxConfReg =
+ (volatile unsigned int *) ((unsigned int) PU_PD_SEL_3);
+ *MuxConfReg = 0x00000000;
+ MuxConfReg =
+ (volatile unsigned int *) ((unsigned int) PU_PD_SEL_4);
+ *MuxConfReg = 0x00000000;
+ MuxConfReg =
+ (volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_4);
+ *MuxConfReg = 0x00000000;
+ /* Turn on UART2 48 MHZ clock */
+ MuxConfReg =
+ (volatile unsigned int *) ((unsigned int) MOD_CONF_CTRL_0);
+ *MuxConfReg |= 0x40000000;
+ MuxConfReg =
+ (volatile unsigned int *) ((unsigned int) USB_OTG_CTRL);
+ /* setup for USB VBus detection OMAP161x & OMAP1710 */
+ *MuxConfReg |= 0x00040000; /* bit 18 */
+ MuxConfReg =
+ (volatile unsigned int *) ((unsigned int) PU_PD_SEL_2);
+ /* PullUps for SD/MMC driver */
+ *MuxConfReg |= ~(0xFFFE0FFF);
+ MuxConfReg =
+ (volatile unsigned int *) ((unsigned int)COMP_MODE_CTRL_0);
+ *MuxConfReg = COMP_MODE_ENABLE;
+}
+
+/******************************************************
+ Routine: peripheral_power_enable
+ Description: Enable the power for UART1
+*******************************************************/
+void peripheral_power_enable (void)
+{
+#define UART1_48MHZ_ENABLE ((unsigned short)0x0200)
+#define SW_CLOCK_REQUEST ((volatile unsigned short *)0xFFFE0834)
+
+ *SW_CLOCK_REQUEST |= UART1_48MHZ_ENABLE;
+}
+
+
+
+#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+
+void nand_init(void)
+{
+ extern flash_info_t flash_info[];
+
+ nand_probe(CFG_NAND_ADDR);
+ if (nand_dev_desc[0].ChipID != NAND_ChipID_UNKNOWN) {
+ print_size(nand_dev_desc[0].totlen, "\n");
+ }
+
+#ifdef CFG_JFFS2_MEM_NAND
+ flash_info[CFG_JFFS2_FIRST_BANK].flash_id = nand_dev_desc[0].id;
+ flash_info[CFG_JFFS2_FIRST_BANK].size = 1024*1024*2; /* only read kernel single meg partition */
+ flash_info[CFG_JFFS2_FIRST_BANK].sector_count = 1024; /* 1024 blocks in 16meg chip (use less for raw/copied partition) */
+ flash_info[CFG_JFFS2_FIRST_BANK].start[0] = 0x10200000; /* ?, ram for now, open question, copy to RAM or adapt for NAND */
+#endif
+}
+#endif
+
diff --git a/board/omap1710h3/u-boot.lds b/board/omap1710h3/u-boot.lds
new file mode 100644
index 0000000000..eee4813f38
--- /dev/null
+++ b/board/omap1710h3/u-boot.lds
@@ -0,0 +1,51 @@
+/*
+ * (C) Copyright 2002
+ * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+ENTRY(_start)
+SECTIONS
+{
+ . = 0x00000000;
+ . = ALIGN(4);
+ .text :
+ {
+ cpu/arm926ejs/start.o (.text)
+ *(.text)
+ }
+ . = ALIGN(4);
+ .rodata : { *(.rodata) }
+ . = ALIGN(4);
+ .data : { *(.data) }
+ . = ALIGN(4);
+ .got : { *(.got) }
+
+ __u_boot_cmd_start = .;
+ .u_boot_cmd : { *(.u_boot_cmd) }
+ __u_boot_cmd_end = .;
+
+ . = ALIGN(4);
+ __bss_start = .;
+ .bss : { *(.bss) }
+ _end = .;
+}
diff --git a/board/omap2420h4/lowlevel_init.S b/board/omap2420h4/lowlevel_init.S
index 9752fc488d..65bc326e39 100644
--- a/board/omap2420h4/lowlevel_init.S
+++ b/board/omap2420h4/lowlevel_init.S
@@ -26,13 +26,14 @@
#include <config.h>
#include <version.h>
-#include <asm/arch/omap2420.h>
+#include <asm/arch/cpu.h>
#include <asm/arch/mem.h>
#include <asm/arch/clocks.h>
_TEXT_BASE:
.word TEXT_BASE /* sdram load addr from config.mk */
+#ifndef CFG_NAND_BOOT
/**************************************************************************
* cpy_clk_code: relocates clock code into SRAM where its safer to execute
* R1 = SRAM destination address.
@@ -82,17 +83,18 @@ block:
/* now prepare GPMC (flash) for new dpll speed */
/* flash needs to be stable when we jump back to it */
- ldr r4, cfg3_0_addr
- ldr r8, cfg3_0_val
- str r8, [r4]
- ldr r4, cfg4_0_addr
- ldr r8, cfg4_0_val
- str r8, [r4]
- ldr r4, cfg1_0_addr
+ ldr r4, flash_cfg3_addr
+ ldr r8, flash_cfg3_val
+ str r8, [r4]
+ ldr r4, flash_cfg4_addr
+ ldr r8, flash_cfg4_val
+ str r8, [r4]
+ ldr r4, flash_cfg1_addr
ldr r8, [r4]
orr r8, r8, #0x3 /* up gpmc divider */
str r8, [r4]
+
/* setup to 2x loop though code. The first loop pre-loads the
* icache, the 2nd commits the prcm config, and locks the dpll
*/
@@ -139,16 +141,17 @@ lloop2:
_go_to_speed: .word go_to_speed
/* these constants need to be close for PIC code */
-cfg3_0_addr:
- .word GPMC_CONFIG3_0
-cfg3_0_val:
- .word H4_24XX_GPMC_CONFIG3_0
-cfg4_0_addr:
- .word GPMC_CONFIG4_0
-cfg4_0_val:
- .word H4_24XX_GPMC_CONFIG4_0
-cfg1_0_addr:
- .word GPMC_CONFIG1_0
+/* The Nor has to be in the Flash Base CS0 for this condition to happen */
+flash_cfg3_addr:
+ .word (GPMC_CONFIG_CS0 + GPMC_CONFIG3)
+flash_cfg3_val:
+ .word STNOR_GPMC_CONFIG3
+flash_cfg4_addr:
+ .word (GPMC_CONFIG_CS0 + GPMC_CONFIG4)
+flash_cfg4_val:
+ .word STNOR_GPMC_CONFIG4
+flash_cfg1_addr:
+ .word (GPMC_CONFIG_CS0 + GPMC_CONFIG1)
pll_ctl_add:
.word CM_CLKEN_PLL
pll_stat:
@@ -158,6 +161,8 @@ pll_div_add:
pll_div_val:
.word DPLL_VAL /* DPLL setting (300MHz default) */
+#endif
+
.globl lowlevel_init
lowlevel_init:
ldr sp, SRAM_STACK
diff --git a/board/omap2420h4/mem.c b/board/omap2420h4/mem.c
index 62eb6e38a3..5521037daa 100644
--- a/board/omap2420h4/mem.c
+++ b/board/omap2420h4/mem.c
@@ -20,14 +20,54 @@
*/
#include <common.h>
-#include <asm/arch/omap2420.h>
+#include <asm/arch/cpu.h>
#include <asm/io.h>
#include <asm/arch/bits.h>
-#include <asm/arch/mux.h>
#include <asm/arch/mem.h>
#include <asm/arch/clocks.h>
#include <asm/arch/sys_proto.h>
#include <asm/arch/sys_info.h>
+#include <asm/arch/mux.h>
+
+/****** DATA STRUCTURES ************/
+
+/* Only One NAND/NOR allowed on board at a time.
+ * The GPMC CS Base for the same
+ */
+static u32 nand_cs_base = 0;
+/* Board CS Organization - REV 0.1 */
+static const unsigned char chip_sel[][GPMC_MAX_CS] = {
+ /* GPMC CS Indices */
+/* IDX CS0, CS1, CS2 ..CS7 */
+/* 0 */ {PROC_NOR, DBG_MPDB, 0, 0, 0, 0, 0, 0},
+/* 1 */ {PROC_NAND, DBG_MPDB, 0, 0, 0, 0, 0,0},
+};
+
+/* Values for each of the chips */
+static u32 gpmc_mpdb[GPMC_MAX_REG] = {
+ MPDB_GPMC_CONFIG1,
+ MPDB_GPMC_CONFIG2,
+ MPDB_GPMC_CONFIG3,
+ MPDB_GPMC_CONFIG4,
+ MPDB_GPMC_CONFIG5,
+ MPDB_GPMC_CONFIG6, 0
+};
+static u32 gpmc_stnor[GPMC_MAX_REG] = {
+ STNOR_GPMC_CONFIG1,
+ STNOR_GPMC_CONFIG2,
+ STNOR_GPMC_CONFIG3,
+ STNOR_GPMC_CONFIG4,
+ STNOR_GPMC_CONFIG5,
+ STNOR_GPMC_CONFIG6, 0
+};
+static u32 gpmc_smnand[GPMC_MAX_REG] = {
+ SMNAND_GPMC_CONFIG1,
+ SMNAND_GPMC_CONFIG2,
+ SMNAND_GPMC_CONFIG3,
+ SMNAND_GPMC_CONFIG4,
+ SMNAND_GPMC_CONFIG5,
+ SMNAND_GPMC_CONFIG6, 0
+};
/************************************************************
* sdelay() - simple spin loop. Will be constant time as
@@ -48,12 +88,18 @@ void sdelay (unsigned long loops)
*********************************************************************************/
void prcm_init(void)
{
- u32 div;
+ u32 val, div;
void (*f_lock_pll) (u32, u32, u32, u32);
extern void *_end_vect, *_start;
f_lock_pll = (void *)((u32)&_end_vect - (u32)&_start + SRAM_VECT_CODE);
+ val = __raw_readl(PRCM_CLKSRC_CTRL) & ~(BIT1|BIT0);
+#if defined(OMAP2430_SQUARE_CLOCK_INPUT)
+ __raw_writel(val, PRCM_CLKSRC_CTRL);
+#else
+ __raw_writel((val | BIT0), PRCM_CLKSRC_CTRL);
+#endif
__raw_writel(0, CM_FCLKEN1_CORE); /* stop all clocks to reduce ringing */
__raw_writel(0, CM_FCLKEN2_CORE); /* may not be necessary */
__raw_writel(0, CM_ICLKEN1_CORE);
@@ -120,14 +166,16 @@ void make_cs1_contiguous(void)
*******************************************************/
u32 mem_ok(void)
{
- u32 val1, val2;
+ u32 val1, val2, addr;
u32 pattern = 0x12345678;
- __raw_writel(0x0,OMAP2420_SDRC_CS0+0x400); /* clear pos A */
- __raw_writel(pattern, OMAP2420_SDRC_CS0); /* pattern to pos B */
- __raw_writel(0x0,OMAP2420_SDRC_CS0+4); /* remove pattern off the bus */
- val1 = __raw_readl(OMAP2420_SDRC_CS0+0x400); /* get pos A value */
- val2 = __raw_readl(OMAP2420_SDRC_CS0); /* get val2 */
+ addr = OMAP24XX_SDRC_CS0;
+
+ __raw_writel(0x0,addr+0x400); /* clear pos A */
+ __raw_writel(pattern, addr); /* pattern to pos B */
+ __raw_writel(0x0,addr+4); /* remove pattern off the bus */
+ val1 = __raw_readl(addr+0x400); /* get pos A value */
+ val2 = __raw_readl(addr); /* get val2 */
if ((val1 != 0) || (val2 != pattern)) /* see if pos A value changed*/
return(0);
@@ -159,12 +207,14 @@ void sdrc_init(void)
* we configure the first chip select. Later on we come back and
* will configure the 2nd chip select if it exists.
*
+ * For 2422 rev > ES2 only one pass is used as it only has memory on CS1.
**************************************************************************/
void do_sdrc_init(u32 offset, u32 early)
{
- u32 cpu, dllen=0, rev, common=0, cs0=0, pmask=0, pass_type, mtype;
+ u32 cpu, dllstat, dllctrl=0, rev, common=0, cs0=0, pmask=0, pass_type, mtype;
sdrc_data_t *sdata; /* do not change type */
- u32 a, b, r;
+ u32 a, b, r, dllx = 0, mono = 0, dev;
+ void init_dcdl(u32 cpu);
static const sdrc_data_t sdrc_2422 =
{
@@ -184,15 +234,25 @@ void do_sdrc_init(u32 offset, u32 early)
cs0 = common = 1; /* int regs shared between both chip select */
cpu = get_cpu_type();
+ dev = get_device_type();
rev = get_cpu_rev();
/* warning generated, though code generation is correct. this may bite later,
* but is ok for now. there is only so much C code you can do on stack only
* operation.
*/
- if (cpu == CPU_2422){
+ if ((cpu == CPU_2422) || (cpu == CPU_2423)){
sdata = (sdrc_data_t *)&sdrc_2422;
pass_type = STACKED;
+ if(rev > CPU_242X_ES2){ /* es2.05 and beyond changed SIP memory */
+ if((!early) && (cpu == CPU_2422)) /* no work for pass 2 on 2422 rev>es2 */
+ return;
+ if (cpu == CPU_2422) {
+ offset = SDRC_CS1_OSET; /* set common access offset to cs1 */
+ cs0 = 0; /* specify acting on CS1 */
+ mono = 1; /* flag mono die for 2422 */
+ }
+ }
} else{
sdata = (sdrc_data_t *)&sdrc_2420;
pass_type = IP_DDR;
@@ -209,8 +269,14 @@ void do_sdrc_init(u32 offset, u32 early)
if((early) && running_in_flash()){
sdata = (sdrc_data_t *)(((u32)sdata & 0x0003FFFF) | get_gpmc0_base());
/* NOR internal boot offset is 0x4000 from xloader signature */
- if(running_from_internal_boot())
- sdata = (sdrc_data_t *)((u32)sdata + 0x4000);
+ if(running_from_internal_boot()){
+ u32 start_off;
+ if(dev == GP_DEVICE)
+ start_off = 0x8;
+ else
+ start_off = 0x4000;
+ sdata = (sdrc_data_t *)((u32)sdata + start_off);
+ }
}
if (!early && (((mtype = get_mem_type()) == DDR_COMBO)||(mtype == DDR_STACKED))) {
@@ -219,7 +285,7 @@ void do_sdrc_init(u32 offset, u32 early)
pass_type = COMBO_DDR; /* CS1 config */
__raw_writel((__raw_readl(SDRC_POWER)) & ~pmask, SDRC_POWER);
}
- if(rev != CPU_2420_2422_ES1) /* for es2 and above smooth things out */
+ if(rev != CPU_242X_ES1) /* for es2 and above smooth things out */
make_cs1_contiguous();
}
@@ -228,7 +294,10 @@ next_mem_type:
__raw_writel(SOFTRESET, SDRC_SYSCONFIG); /* reset sdrc */
wait_on_value(BIT0, BIT0, SDRC_STATUS, 12000000);/* wait till reset done set */
__raw_writel(0, SDRC_SYSCONFIG); /* clear soft reset */
- __raw_writel(sdata->sdrc_sharing, SDRC_SHARING);
+ if (cpu != CPU_2423)
+ __raw_writel(sdata->sdrc_sharing, SDRC_SHARING);
+ else
+ __raw_writel(H4_2423_SDRC_SHARING, SDRC_SHARING);
#ifdef POWER_SAVE
__raw_writel(__raw_readl(SMS_SYSCONFIG)|SMART_IDLE, SMS_SYSCONFIG);
__raw_writel(sdata->sdrc_sharing|SMART_IDLE, SDRC_SHARING);
@@ -236,9 +305,17 @@ next_mem_type:
#endif
}
- if ((pass_type == IP_DDR) || (pass_type == STACKED)) /* (IP ddr-CS0),(2422-CS0/CS1) */
+ if ((pass_type == IP_DDR) || (pass_type == STACKED)){ /* (IP ddr-CS0),(2422-CS0/CS1) */
__raw_writel(sdata->sdrc_mdcfg_0_ddr, SDRC_MCFG_0+offset);
- else if (pass_type == COMBO_DDR){ /* (combo-CS0/CS1) */
+ if(mono)
+ __raw_writel(H4_2422_SDRC_MDCFG_MONO_DDR, SDRC_MCFG_0+offset); /* 2422.es2.05-CS1 */
+ if (cpu == CPU_2423) {
+ if (offset == SDRC_CS1_OSET)
+ __raw_writel(H4_2423_SDRC_MDCFG_1_DDR, SDRC_MCFG_0+offset); /* 2423 32M-CS1 */
+ else
+ __raw_writel(H4_2423_SDRC_MDCFG_0_DDR, SDRC_MCFG_0+offset); /* 2423 64M-CS0 */
+ }
+ }else if (pass_type == COMBO_DDR){ /* (combo-CS0/CS1) */
__raw_writel(H4_2420_COMBO_MDCFG_0_DDR,SDRC_MCFG_0+offset);
} else if (pass_type == IP_SDR){ /* ip sdr-CS0 */
__raw_writel(sdata->sdrc_mdcfg_0_sdr, SDRC_MCFG_0+offset);
@@ -246,10 +323,10 @@ next_mem_type:
a = sdata->sdrc_actim_ctrla_0;
b = sdata->sdrc_actim_ctrlb_0;
- r = sdata->sdrc_dllab_ctrl;
+ r = sdata->sdrc_rfr_ctrl;
/* work around ES1 DDR issues */
- if((pass_type != IP_SDR) && (rev == CPU_2420_2422_ES1)){
+ if((pass_type != IP_SDR) && (rev == CPU_242X_ES1)){
a = H4_242x_SDRC_ACTIM_CTRLA_0_ES1;
b = H4_242x_SDRC_ACTIM_CTRLB_0_ES1;
r = H4_242x_SDRC_RFR_CTRL_ES1;
@@ -283,24 +360,49 @@ next_mem_type:
__raw_writel(sdata->sdrc_mr_0_ddr, SDRC_MR_0+offset);
/* NOTE: ES1 242x _BUG_ DLL + External Bandwidth fix*/
- if (rev == CPU_2420_2422_ES1){
- dllen = (BIT0|BIT3); /* es1 clear both bit0 and bit3 */
+ if (rev == CPU_242X_ES1){
+ dllctrl = (BIT0|BIT3); /* es1 clear both bit0 and bit3 */
__raw_writel((__raw_readl(SMS_CLASS_ARB0)|BURSTCOMPLETE_GROUP7)
,SMS_CLASS_ARB0);/* enable bust complete for lcd */
- }
- else
- dllen = BIT0|BIT1; /* es2, clear bit0, and 1 (set phase to 72) */
+ }else
+
+ dllctrl = BIT0; /* es2, flag to clear bit0 (90deg for < 133MHz && ES2) */
+
+#ifdef PRCM_CONFIG_I
+ /* es2.1, flag clear bit1 (set phase to 72 for > 150MHz && ES2) */
+ dllctrl |= DLLPHASE;
+#endif
/* enable & load up DLL with good value for 75MHz, and set phase to 90
* ES1 recommends 90 phase, ES2 recommends 72 phase.
*/
if (common && (pass_type != IP_SDR)) {
__raw_writel(sdata->sdrc_dllab_ctrl, SDRC_DLLA_CTRL);
- __raw_writel(sdata->sdrc_dllab_ctrl & ~(BIT2|dllen), SDRC_DLLA_CTRL);
+ __raw_writel(sdata->sdrc_dllab_ctrl & ~(LOADDLL|dllctrl), SDRC_DLLA_CTRL);
__raw_writel(sdata->sdrc_dllab_ctrl, SDRC_DLLB_CTRL);
- __raw_writel(sdata->sdrc_dllab_ctrl & ~(BIT2|dllen) , SDRC_DLLB_CTRL);
+ __raw_writel(sdata->sdrc_dllab_ctrl & ~(LOADDLL|dllctrl) , SDRC_DLLB_CTRL);
+
+ init_dcdl(cpu); /* fix errata for possible bad init state */
+
+ sdelay(0x2000); /* give time to lock, at least 1000 L3 */
+
+ if(rev >= CPU_242X_ES2){ /* work around DCDL MOD16 bug */
+ if ((cpu == CPU_2422) && (rev > CPU_242X_ES2))
+ dllx = 8;
+ dllctrl = __raw_readl(SDRC_DLLA_CTRL+dllx); /* get cur ctrl value */
+ dllctrl &= ~(DLL_DELAY_MASK); /* prepare for load new value */
+ dllctrl |= LOADDLL; /* prepare for load + unlock mode */
+ dllstat = (__raw_readl(SDRC_DLLA_STATUS+dllx) & DLL_DELAY_MASK);
+ dllctrl |= dllstat; /* prepare new dll load delay */
+ dllctrl |= DLL_NO_FILTER_MASK; /* make sure filter is off */
+ __raw_writel(dllctrl, SDRC_DLLA_CTRL); /* go to unlock modeA */
+ __raw_writel(dllctrl, SDRC_DLLB_CTRL); /* go to unlock modeB */
+ }
}
- sdelay(90000);
+ sdelay(0x1000);
+
+ if(mono) /* 2422 ES2.05 and beyound only has 1 pass */
+ make_cs1_contiguous();/* make CS1 appear at CS0 */
if(mem_ok())
return; /* STACKED, other configued type */
@@ -309,67 +411,119 @@ next_mem_type:
}
/*****************************************************
+ * init_dcdl(): Fix errata - unitilized flip-flop.
+ *****************************************************/
+void init_dcdl(u32 cpu)
+{
+ volatile u8 *adqs[4];
+ u8 vdqs[4], idx, i;
+ u32 base = OMAP24XX_CTRL_BASE;
+
+ if((cpu == CPU_2422) || (cpu == CPU_2423)){
+ adqs[0] = ((volatile u8*)(base + CONTROL_PADCONF_SDRC_STK_DM1 + 0x1));
+ adqs[1] = ((volatile u8*)(base + CONTROL_PADCONF_SDRC_STK_DM1 + 0x2));
+ idx = 2;
+ } else {
+ adqs[0] = ((volatile u8*)(base + CONTROL_PADCONF_SDRC_STK_DM1 + 0x3));
+ adqs[1] = ((volatile u8*)(base + CONTROL_PADCONF_SDRC_DQS1 + 0x0));
+ adqs[2] = ((volatile u8*)(base + CONTROL_PADCONF_SDRC_DQS1 + 0x1));
+ adqs[3] = ((volatile u8*)(base + CONTROL_PADCONF_SDRC_DQS1 + 0x2));
+ idx = 4;
+ }
+
+ for(i = 0; i < idx; ++i) /* save origional state */
+ vdqs[i] = *adqs[i];
+
+ for(i = 0; i < idx; ++i)
+ *adqs[i] = ((~0x10 & vdqs[i]) | 0x8); /* enable/activate pull down */
+
+ sdelay(0x400);
+
+ for(i = 0; i < idx; ++i)
+ *adqs[i] = (vdqs[i] | 0x10); /* enable/activate pull up */
+
+ sdelay(0x400);
+
+ for(i = 0; i < idx; ++i) /* restore state */
+ *adqs[i] = vdqs[i];
+}
+
+/*****************************************************
* gpmc_init(): init gpmc bus
* Init GPMC for x16, MuxMode (SDRAM in x32).
* This code can only be executed from SRAM or SDRAM.
*****************************************************/
void gpmc_init(void)
{
- u32 mux=0, mtype, mwidth, rev, tval;
+ u32 mux=0, mwidth, rev, tval;
+ u8 idx = 0;
+ u32 *gpmc_config = NULL;
+ u32 gpmc_base = 0;
+ u32 base = 0;
+ u32 size = 0;
+ unsigned char *config_sel =
+ (unsigned char *)(chip_sel[FLASH_CONFIGURATION_IDX]);
rev = get_cpu_rev();
- if (rev == CPU_2420_2422_ES1)
+ if (rev == CPU_242X_ES1)
tval = 1;
else
tval = 0; /* disable bit switched meaning */
- /* global settings */
- __raw_writel(0x10, GPMC_SYSCONFIG); /* smart idle */
- __raw_writel(0x0, GPMC_IRQENABLE); /* isr's sources masked */
- __raw_writel(tval, GPMC_TIMEOUT_CONTROL);/* timeout disable */
-#ifdef CFG_NAND_BOOT
- __raw_writel(0x001, GPMC_CONFIG); /* set nWP, disable limited addr */
-#else
- __raw_writel(0x111, GPMC_CONFIG); /* set nWP, disable limited addr */
-#endif
-
/* discover bus connection from sysboot */
if (is_gpmc_muxed() == GPMC_MUXED)
mux = BIT9;
- mtype = get_gpmc0_type();
- mwidth = get_gpmc0_width();
-
- /* setup cs0 */
- __raw_writel(0x0, GPMC_CONFIG7_0); /* disable current map */
- sdelay(1000);
-
-#ifdef CFG_NAND_BOOT
- __raw_writel(H4_24XX_GPMC_CONFIG1_0|mtype|mwidth, GPMC_CONFIG1_0);
-#else
- __raw_writel(H4_24XX_GPMC_CONFIG1_0|mux|mtype|mwidth, GPMC_CONFIG1_0);
-#endif
-#ifdef PRCM_CONFIG_III
- __raw_writel(H4_24XX_GPMC_CONFIG2_0, GPMC_CONFIG2_0);
-#endif
- __raw_writel(H4_24XX_GPMC_CONFIG3_0, GPMC_CONFIG3_0);
- __raw_writel(H4_24XX_GPMC_CONFIG4_0, GPMC_CONFIG4_0);
-#ifdef PRCM_CONFIG_III
- __raw_writel(H4_24XX_GPMC_CONFIG5_0, GPMC_CONFIG5_0);
- __raw_writel(H4_24XX_GPMC_CONFIG6_0, GPMC_CONFIG6_0);
-#endif
- __raw_writel(H4_24XX_GPMC_CONFIG7_0, GPMC_CONFIG7_0);/* enable new mapping */
- sdelay(2000);
+ mwidth = get_gpmc0_width();
+ /* global settings */
+ __raw_writel(0x10, GPMC_SYSCONFIG); /* smart idle */
+ __raw_writel(0x0, GPMC_IRQENABLE); /* isr's sources masked */
+ __raw_writel(tval, GPMC_TIMEOUT_CONTROL);/* timeout disable */
+ /* For Nand based boot only..OneNand?? */
+ if ((config_sel[0] == PROC_NAND)
+ || (config_sel[0] == PISMO_ONENAND)) {
+ __raw_writel(0x001, GPMC_CONFIG); /* set nWP, disable limited addr */
+ }
+ for (; idx < GPMC_MAX_CS; idx++) {
+ if (!config_sel[idx]) {
+ continue;
+ }
+ gpmc_base = GPMC_CONFIG_CS0 + (idx * GPMC_CONFIG_WIDTH);
+ __raw_writel(0, GPMC_CONFIG7 + gpmc_base);
+ switch (config_sel[idx]) {
+ case PROC_NOR:
+ gpmc_config = gpmc_stnor;
+ gpmc_config[0] |= mux | TYPE_NOR | mwidth;
+ base = PROC_NOR_BASE;
+ size = PROC_NOR_SIZE;
+ break;
+ case PROC_NAND:
+ base = PROC_NAND_BASE;
+ size = PROC_NAND_SIZE;
+ gpmc_config = gpmc_smnand;
+ gpmc_config[0] |= mux | TYPE_NAND | mwidth;
+ /* Either OneNand or Normal Nand at a time!! */
+ nand_cs_base = gpmc_base;
+ break;
+ case DBG_MPDB:
+ base = DBG_MPDB_BASE;
+ size = DBG_MPDB_SIZE;
+ gpmc_config = gpmc_mpdb;
+ gpmc_config[0] |= mux;
+ break;
+ default:
+ /* Corrupt config- try and recover by putting nor here!!!! */
+ continue;
+ }
+ __raw_writel(gpmc_config[0], GPMC_CONFIG1 + gpmc_base);
+ __raw_writel(gpmc_config[1], GPMC_CONFIG2 + gpmc_base);
+ __raw_writel(gpmc_config[2], GPMC_CONFIG3 + gpmc_base);
+ __raw_writel(gpmc_config[3], GPMC_CONFIG4 + gpmc_base);
+ __raw_writel(gpmc_config[4], GPMC_CONFIG5 + gpmc_base);
+ __raw_writel(gpmc_config[5], GPMC_CONFIG6 + gpmc_base);
+ /* Enable the config */
+ __raw_writel((((size & 0xF) << 8) | ((base >> 24) & 0x3F) |
+ (1 << 6)), GPMC_CONFIG7 + gpmc_base);
+ }
- /* setup cs1 */
- __raw_writel(0, GPMC_CONFIG7_1); /* disable any mapping */
- sdelay(1000);
- __raw_writel(H4_24XX_GPMC_CONFIG1_1|mux, GPMC_CONFIG1_1);
- __raw_writel(H4_24XX_GPMC_CONFIG2_1, GPMC_CONFIG2_1);
- __raw_writel(H4_24XX_GPMC_CONFIG3_1, GPMC_CONFIG3_1);
- __raw_writel(H4_24XX_GPMC_CONFIG4_1, GPMC_CONFIG4_1);
- __raw_writel(H4_24XX_GPMC_CONFIG5_1, GPMC_CONFIG5_1);
- __raw_writel(H4_24XX_GPMC_CONFIG6_1, GPMC_CONFIG6_1);
- __raw_writel(H4_24XX_GPMC_CONFIG7_1, GPMC_CONFIG7_1); /* enable mapping */
- sdelay(2000);
}
diff --git a/board/omap2420h4/omap2420h4.c b/board/omap2420h4/omap2420h4.c
index 6ae1a490a5..fb2d7da247 100644
--- a/board/omap2420h4/omap2420h4.c
+++ b/board/omap2420h4/omap2420h4.c
@@ -22,7 +22,7 @@
* MA 02111-1307 USA
*/
#include <common.h>
-#include <asm/arch/omap2420.h>
+#include <asm/arch/cpu.h>
#include <asm/io.h>
#include <asm/arch/bits.h>
#include <asm/arch/mux.h>
@@ -32,11 +32,13 @@
#include <i2c.h>
#include <asm/mach-types.h>
#if (CONFIG_COMMANDS & CFG_CMD_NAND)
-#include <linux/mtd/nand.h>
+#include <linux/mtd/nand_legacy.h>
extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
#endif
- void wait_for_command_complete(unsigned int wd_base);
+DECLARE_GLOBAL_DATA_PTR;
+
+void wait_for_command_complete(unsigned int wd_base);
/*******************************************************
* Routine: delay
@@ -54,12 +56,10 @@ static inline void delay (unsigned long loops)
*****************************************/
int board_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gpmc_init(); /* in SRAM or SDRM, finish GPMC */
gd->bd->bi_arch_number = MACH_TYPE_OMAP_H4; /* board id for linux */
- gd->bd->bi_boot_params = (OMAP2420_SDRC_CS0+0x100); /* adress of boot parameters */
+ gd->bd->bi_boot_params = (OMAP24XX_SDRC_CS0+0x100); /* adress of boot parameters */
return 0;
}
@@ -159,7 +159,7 @@ void ether_init (void)
#ifdef CONFIG_DRIVER_LAN91C96
int cnt = 20;
- __raw_writeb(0x3,OMAP2420_CTRL_BASE+0x10a); /*protect->gpio95 */
+ __raw_writeb(0x3,OMAP24XX_CTRL_BASE+0x10a); /*protect->gpio95 */
__raw_writew(0x0, LAN_RESET_REGISTER);
do {
@@ -195,7 +195,6 @@ void ether_init (void)
**********************************************/
int dram_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
unsigned int size0=0,size1=0;
u32 mtype, btype, rev, cpu;
u8 chg_on = 0x5; /* enable charge of back up battery */
@@ -224,7 +223,7 @@ int dram_init (void)
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = size0;
- if(rev == CPU_2420_2422_ES1) /* ES1's 128MB remap granularity isn't worth doing */
+ if(rev == CPU_242X_ES1) /* ES1's 128MB remap granularity isn't worth doing */
gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
else /* ES2 and above can remap at 32MB granularity */
gd->bd->bi_dram[1].start = PHYS_SDRAM_1+size0;
@@ -739,7 +738,7 @@ void muxSetupSDRC(void)
*****************************************************************************/
void update_mux(u32 btype,u32 mtype)
{
- u32 cpu, base = OMAP2420_CTRL_BASE;
+ u32 cpu, base = OMAP24XX_CTRL_BASE;
cpu = get_cpu_type();
if (btype == BOARD_H4_MENELAUS) {
diff --git a/board/omap2420h4/sys_info.c b/board/omap2420h4/sys_info.c
index a9f72412a7..da6e11fef1 100644
--- a/board/omap2420h4/sys_info.c
+++ b/board/omap2420h4/sys_info.c
@@ -50,13 +50,13 @@ u32 get_cpu_type(void)
{
u32 v;
- switch(get_prod_id()){
- case 1:;/* 2420 */
- case 2: return(CPU_2420); break; /* 2420 pop */
- case 4: return(CPU_2422); break;
- case 8: return(CPU_2423); break;
- default: break; /* early 2420/2422's unmarked */
- }
+ v = get_prod_id();
+ if((v == 1) || (v == 2))
+ return CPU_2420;
+ else if (v == 4)
+ return CPU_2422;
+ else if (v == 8)
+ return CPU_2423;
v = __raw_readl(TAP_IDCODE_REG);
v &= CPU_24XX_ID_MASK;
@@ -168,7 +168,7 @@ u32 get_gpmc0_base(void)
{
u32 b;
- b = __raw_readl(GPMC_CONFIG7_0);
+ b = __raw_readl(GPMC_CONFIG_CS0 + GPMC_CONFIG7);
b &= 0x1F; /* keep base [5:0] */
b = b << 24; /* ret 0x0b000000 */
return(b);
diff --git a/board/omap2430sdp/Makefile b/board/omap2430sdp/Makefile
new file mode 100644
index 0000000000..768c7c7b55
--- /dev/null
+++ b/board/omap2430sdp/Makefile
@@ -0,0 +1,47 @@
+#
+# (C) Copyright 2000, 2001, 2002
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = lib$(BOARD).a
+
+OBJS := omap2430sdp.o mem.o sys_info.o
+SOBJS := lowlevel_init.o
+
+$(LIB): $(OBJS) $(SOBJS)
+ $(AR) crv $@ $^
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
+ $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+
+-include .depend
+
+#########################################################################
diff --git a/board/omap2430sdp/config.mk b/board/omap2430sdp/config.mk
new file mode 100644
index 0000000000..9d9dfa294b
--- /dev/null
+++ b/board/omap2430sdp/config.mk
@@ -0,0 +1,23 @@
+#
+# (C) Copyright 2004
+# Texas Instruments, <www.ti.com>
+#
+# SDP2430 boad uses OMAP2430 (ARM1136) cpu
+# see http://www.ti.com/ for more information on Texas Instruments
+#
+# SDP2430 has 1 bank of 32MB or 64MB mDDR-SDRAM on CS0
+# SDP2430 has 1 bank of 32MB or 00MB mDDR-SDRAM on CS1
+# Physical Address:
+# 8000'0000 (bank0)
+# A000/0000 (bank1) ES2 will be configurable
+# Linux-Kernel is expected to be at 8000'8000, entry 8000'8000
+# (mem base + reserved)
+
+# For use with external or internal boots.
+TEXT_BASE = 0x80e80000
+
+
+# Handy to get symbols to debug ROM version.
+#TEXT_BASE = 0x0
+#TEXT_BASE = 0x08000000
+#TEXT_BASE = 0x04000000
diff --git a/board/omap2430sdp/lowlevel_init.S b/board/omap2430sdp/lowlevel_init.S
new file mode 100644
index 0000000000..814b50ebed
--- /dev/null
+++ b/board/omap2430sdp/lowlevel_init.S
@@ -0,0 +1,197 @@
+/*
+ * Board specific setup info
+ *
+ * (C) Copyright 2004
+ * Texas Instruments, <www.ti.com>
+ * Richard Woodruff <r-woodruff2@ti.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <config.h>
+#include <version.h>
+#include <asm/arch/cpu.h>
+#include <asm/arch/mem.h>
+#include <asm/arch/clocks.h>
+
+_TEXT_BASE:
+ .word TEXT_BASE /* sdram load addr from config.mk */
+
+#if !defined(CFG_NAND_BOOT) && !defined(CFG_NAND_BOOT)
+/**************************************************************************
+ * cpy_clk_code: relocates clock code into SRAM where its safer to execute
+ * R1 = SRAM destination address.
+ *************************************************************************/
+.global cpy_clk_code
+ cpy_clk_code:
+ /* Copy DPLL code into SRAM */
+ adr r0, go_to_speed /* get addr of clock setting code */
+ mov r2, #384 /* r2 size to copy (div by 32 bytes) */
+ mov r1, r1 /* r1 <- dest address (passed in) */
+ add r2, r2, r0 /* r2 <- source end address */
+next2:
+ ldmia r0!, {r3-r10} /* copy from source address [r0] */
+ stmia r1!, {r3-r10} /* copy to target address [r1] */
+ cmp r0, r2 /* until source end address [r2] */
+ bne next2
+ mov pc, lr /* back to caller */
+
+/* ****************************************************************************
+ * go_to_speed: -Moves to bypass, -Commits clock dividers, -puts dpll at speed
+ * -executed from SRAM.
+ * R0 = PRCM_CLKCFG_CTRL - addr of valid reg
+ * R1 = CM_CLKEN_PLL - addr dpll ctlr reg
+ * R2 = dpll value
+ * R3 = CM_IDLEST_CKGEN - addr dpll lock wait
+ ******************************************************************************/
+.global go_to_speed
+ go_to_speed:
+ sub sp, sp, #0x4 /* get some stack space */
+ str r4, [sp] /* save r4's value */
+
+ /* move into fast relock bypass */
+ ldr r8, pll_ctl_add
+ mov r4, #0x2
+ str r4, [r8]
+ ldr r4, pll_stat
+block:
+ ldr r8, [r4] /* wait for bypass to take effect */
+ and r8, r8, #0x3
+ cmp r8, #0x1
+ bne block
+
+ /* set new dpll dividers _after_ in bypass */
+ ldr r4, pll_div_add
+ ldr r8, pll_div_val
+ str r8, [r4]
+
+ /* now prepare GPMC (flash) for new dpll speed */
+ /* flash needs to be stable when we jump back to it */
+ ldr r4, flash_cfg3_addr
+ ldr r8, flash_cfg3_val
+ str r8, [r4]
+ ldr r4, flash_cfg4_addr
+ ldr r8, flash_cfg4_val
+ str r8, [r4]
+ ldr r4, flash_cfg5_addr
+ ldr r8, flash_cfg5_val
+ str r8, [r4]
+ ldr r4, flash_cfg1_addr
+ ldr r8, [r4]
+ orr r8, r8, #0x3 /* up gpmc divider */
+ str r8, [r4]
+
+ /* setup to 2x loop though code. The first loop pre-loads the
+ * icache, the 2nd commits the prcm config, and locks the dpll
+ */
+ mov r4, #0x1000 /* spin spin spin */
+ mov r8, #0x4 /* first pass condition & set registers */
+ cmp r8, #0x4
+2:
+ ldrne r8, [r3] /* DPLL lock check */
+ and r8, r8, #0x7
+ cmp r8, #0x2
+ beq 4f
+3:
+ subeq r8, r8, #0x1
+ streq r8, [r0] /* commit dividers (2nd time) */
+ nop
+lloop1:
+ sub r4, r4, #0x1 /* Loop currently necessary else bad jumps */
+ nop
+ cmp r4, #0x0
+ bne lloop1
+ mov r4, #0x40000
+ cmp r8, #0x1
+ nop
+ streq r2, [r1] /* lock dpll (2nd time) */
+ nop
+lloop2:
+ sub r4, r4, #0x1 /* loop currently necessary else bad jumps */
+ nop
+ cmp r4, #0x0
+ bne lloop2
+ mov r4, #0x40000
+ cmp r8, #0x1
+ nop
+ ldreq r8, [r3] /* get lock condition for dpll */
+ cmp r8, #0x4 /* first time though? */
+ bne 2b
+ moveq r8, #0x2 /* set to dpll check condition. */
+ beq 3b /* if condition not true branch */
+4:
+ ldr r4, [sp]
+ add sp, sp, #0x4 /* return stack space */
+ mov pc, lr /* back to caller, locked */
+
+_go_to_speed: .word go_to_speed
+
+/* these constants need to be close for PIC code */
+/* The Nor has to be in the Flash Base CS0 for this condition to happen */
+flash_cfg3_addr:
+ .word (GPMC_CONFIG_CS0 + GPMC_CONFIG3)
+flash_cfg3_val:
+ .word STNOR_GPMC_CONFIG3
+flash_cfg4_addr:
+ .word (GPMC_CONFIG_CS0 + GPMC_CONFIG4)
+flash_cfg5_val:
+ .word STNOR_GPMC_CONFIG5
+flash_cfg5_addr:
+ .word (GPMC_CONFIG_CS0 + GPMC_CONFIG5)
+flash_cfg4_val:
+ .word STNOR_GPMC_CONFIG4
+flash_cfg1_addr:
+ .word (GPMC_CONFIG_CS0 + GPMC_CONFIG1)
+pll_ctl_add:
+ .word CM_CLKEN_PLL
+pll_stat:
+ .word CM_IDLEST_CKGEN
+pll_div_add:
+ .word CM_CLKSEL1_PLL
+pll_div_val:
+ .word DPLL_VAL /* DPLL setting (300MHz default) */
+
+#endif
+
+.globl lowlevel_init
+lowlevel_init:
+ ldr sp, SRAM_STACK
+ str ip, [sp] /* stash old link register */
+ mov ip, lr /* save link reg across call */
+ bl s_init /* go setup pll,mux,memory */
+ ldr ip, [sp] /* restore save ip */
+ mov lr, ip /* restore link reg */
+
+ /* map interrupt controller */
+ ldr r0, VAL_INTH_SETUP
+ mcr p15, 0, r0, c15, c2, 4
+
+ /* back to arch calling code */
+ mov pc, lr
+
+ /* the literal pools origin */
+ .ltorg
+
+REG_CONTROL_STATUS:
+ .word CONTROL_STATUS
+VAL_INTH_SETUP:
+ .word PERIFERAL_PORT_BASE
+SRAM_STACK:
+ .word LOW_LEVEL_SRAM_STACK
+
diff --git a/board/omap2430sdp/mem.c b/board/omap2430sdp/mem.c
new file mode 100644
index 0000000000..8b53757cb9
--- /dev/null
+++ b/board/omap2430sdp/mem.c
@@ -0,0 +1,849 @@
+/*
+ * (C) Copyright 2004-2005
+ * Texas Instruments, <www.ti.com>
+ * Richard Woodruff <r-woodruff2@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/arch/cpu.h>
+#include <asm/io.h>
+#include <asm/arch/bits.h>
+#include <asm/arch/mem.h>
+#include <asm/arch/clocks.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/arch/sys_info.h>
+#include <environment.h>
+#include <command.h>
+
+/****** DATA STRUCTURES ************/
+
+/* Only One NAND allowed on board at a time.
+ * The GPMC CS Base for the same
+ */
+unsigned int nand_cs_base = 0;
+unsigned int boot_flash_base = 0;
+unsigned int boot_flash_off = 0;
+unsigned int boot_flash_sec = 0;
+unsigned int boot_flash_type = 0;
+volatile unsigned int boot_flash_env_addr = 0;
+/* help common/env_flash.c */
+#ifdef ENV_IS_VARIABLE
+
+/* On SDP, all the 3 NOR parts are available on all CS combinations.
+ * On GDP, this is a variable set. Set the default to SDP configuration
+ * and change it later on if the board is GDP.
+ */
+ulong NOR_FLASH_BANKS_LIST[CFG_MAX_FLASH_BANKS] = CFG_FLASH_BANKS_LIST;
+int NOR_MAX_FLASH_BANKS = 4 ; /* max number of flash banks */
+
+uchar(*boot_env_get_char_spec) (int index);
+int (*boot_env_init) (void);
+int (*boot_saveenv) (void);
+void (*boot_env_relocate_spec) (void);
+
+extern uchar flash_env_get_char_spec(int index);
+extern int flash_env_init(void);
+extern int flash_saveenv(void);
+extern void flash_env_relocate_spec(void);
+extern char *flash_env_name_spec;
+
+extern uchar nand_env_get_char_spec(int index);
+extern int nand_env_init(void);
+extern int nand_saveenv(void);
+extern void nand_env_relocate_spec(void);
+extern char *nand_env_name_spec;
+
+extern char *onenand_env;
+extern uchar onenand_env_get_char_spec(int index);
+extern int onenand_env_init(void);
+extern int onenand_saveenv(void);
+extern void onenand_env_relocate_spec(void);
+extern char *onenand_env_name_spec;
+
+/* Global fellows */
+#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+u8 is_nand = 0;
+#endif
+
+#if (CONFIG_COMMANDS & CFG_CMD_FLASH)
+u8 is_flash = 0;
+#endif
+
+#if (CONFIG_COMMANDS & CFG_CMD_ONENAND)
+u8 is_onenand = 0;
+#endif
+
+char *env_name_spec = 0;
+/* update these elsewhere */
+env_t *env_ptr = 0;
+
+#if ((CONFIG_COMMANDS&(CFG_CMD_ENV|CFG_CMD_FLASH)) == (CFG_CMD_ENV|CFG_CMD_FLASH))
+extern env_t *flash_addr;
+#endif
+
+#endif /* ENV_IS_VARIABLE */
+
+/* Board CS Organization - 2430SDP REV 0.1->1.1 */
+static const unsigned char chip_sel_sdp[][GPMC_MAX_CS] = {
+/* GPMC CS Indices */
+/* S8- 1 2 3 IDX CS0, CS1, CS2 .. CS7 */
+/* 0 OFF OFF OFF */ {PISMO_CS2, PISMO_CS1, PROC_NOR, 0, 0, DBG_MPDB, 0, PISMO_CS0},
+/* 1 ON OFF OFF */ {PISMO_CS1, PISMO_CS0, PROC_NOR, 0, 0, DBG_MPDB, 0, PROC_NAND},
+/* 2 OFF ON OFF */ {PISMO_CS0, PROC_NOR, PISMO_CS1, 0, 0, DBG_MPDB, 0, PISMO_CS2},
+/* 3 ON ON OFF */ {PROC_NAND, PROC_NOR, PISMO_CS0, 0, 0, DBG_MPDB, 0, PISMO_CS1},
+/* 4 OFF OFF ON */ {PISMO_CS1, PISMO_CS2, PROC_NOR, 0, 0, DBG_MPDB, 0, PISMO_CS0},
+/* 5 ON OFF ON */ {PISMO_CS0, PISMO_CS1, PROC_NOR, 0, 0, DBG_MPDB, 0, PROC_NAND},
+/* 6 OFF ON ON */ {PROC_NOR, PISMO_CS0, PISMO_CS1, 0, 0, DBG_MPDB, 0, PISMO_CS2},
+/* 7 ON ON ON */ {PROC_NOR, PROC_NAND, PISMO_CS0, 0, 0, DBG_MPDB, 0, PISMO_CS1},
+};
+
+/* Board CS Organization - 2430GDP REV 0.1->1.1 */
+static const unsigned char chip_sel_gdp[][GPMC_MAX_CS] = {
+/* GPMC CS Indices */
+/* S8- 1 2 3 IDX CS0, CS1, CS2 .. CS7 */
+/* 0 OFF OFF OFF */ {PISMO_CS0, PISMO_CS1, PROC_NAND, 0, 0, DBG_MPDB, 0, PISMO_PCMCIA},
+/* 1 ON OFF OFF */ {PISMO_CS2, PROC_NAND, PROC_NOR, 0, 0, DBG_MPDB, 0, PISMO_PCMCIA},
+/* 2 OFF ON OFF */ {PROC_NAND, PISMO_CS0, PISMO_CS1, 0, 0, DBG_MPDB, 0, PISMO_PCMCIA},
+/* 3 ON ON OFF */ {PROC_NAND, PROC_NOR, PISMO_CS2, 0, 0, DBG_MPDB, 0, PISMO_PCMCIA},
+/* 4 OFF OFF ON */ {PISMO_CS0, PISMO_CS1, PROC_NOR, 0, 0, DBG_MPDB, 0, PISMO_PCMCIA},
+/* 5 ON OFF ON */ {PISMO_CS2, PROC_NOR, PROC_NAND, 0, 0, DBG_MPDB, 0, PISMO_PCMCIA},
+/* 6 OFF ON ON */ {PROC_NOR, PISMO_CS0, PISMO_CS1, 0, 0, DBG_MPDB, 0, PISMO_PCMCIA},
+/* 7 ON ON ON */ {PROC_NOR, PROC_NAND, PISMO_CS2, 0, 0, DBG_MPDB, 0, PISMO_PCMCIA},
+};
+
+/* Map the number of NORs present and NOR flash locations on GDP */
+static const ulong norfl_loc_gdp[][CFG_MAX_FLASH_BANKS + 1] = {
+/* 0 OFF OFF OFF*/ {2,SIBLEY_MAP1, SIBLEY_MAP2, 0, 0 },
+/* 1 ON OFF OFF*/ {2,FLASH_BASE, FLASH_BASE + PHYS_FLASH_SIZE, 0, 0},
+/* 2 OFF ON OFF*/ {2,SIBLEY_MAP1, SIBLEY_MAP2, 0, 0 },
+/* 3 ON ON OFF*/ {2,FLASH_BASE, FLASH_BASE + PHYS_FLASH_SIZE, 0, 0},
+/* 4 OFF OFF ON */ {4,FLASH_BASE, FLASH_BASE + PHYS_FLASH_SIZE, SIBLEY_MAP1, SIBLEY_MAP2},
+/* 5 ON OFF ON */ {2,FLASH_BASE, FLASH_BASE + PHYS_FLASH_SIZE, 0, 0},
+/* 6 OFF ON ON */ {4, FLASH_BASE, FLASH_BASE + PHYS_FLASH_SIZE, SIBLEY_MAP1, SIBLEY_MAP2},
+/* 7 ON ON ON */ {2,FLASH_BASE, FLASH_BASE + PHYS_FLASH_SIZE, 0, 0},
+};
+/* Values for each of the chips */
+static u32 gpmc_mpdb[GPMC_MAX_REG] = {
+ MPDB_GPMC_CONFIG1,
+ MPDB_GPMC_CONFIG2,
+ MPDB_GPMC_CONFIG3,
+ MPDB_GPMC_CONFIG4,
+ MPDB_GPMC_CONFIG5,
+ MPDB_GPMC_CONFIG6, 0
+};
+static u32 gpmc_stnor[GPMC_MAX_REG] = {
+ STNOR_GPMC_CONFIG1,
+ STNOR_GPMC_CONFIG2,
+ STNOR_GPMC_CONFIG3,
+ STNOR_GPMC_CONFIG4,
+ STNOR_GPMC_CONFIG5,
+ STNOR_GPMC_CONFIG6, 0
+};
+static u32 gpmc_smnand[GPMC_MAX_REG] = {
+ SMNAND_GPMC_CONFIG1,
+ SMNAND_GPMC_CONFIG2,
+ SMNAND_GPMC_CONFIG3,
+ SMNAND_GPMC_CONFIG4,
+ SMNAND_GPMC_CONFIG5,
+ SMNAND_GPMC_CONFIG6, 0
+};
+static u32 gpmc_sibnor[GPMC_MAX_REG] = {
+ SIBNOR_GPMC_CONFIG1,
+ SIBNOR_GPMC_CONFIG2,
+ SIBNOR_GPMC_CONFIG3,
+ SIBNOR_GPMC_CONFIG4,
+ SIBNOR_GPMC_CONFIG5,
+ SIBNOR_GPMC_CONFIG6, 0
+};
+static u32 gpmc_onenand[GPMC_MAX_REG] = {
+ ONENAND_GPMC_CONFIG1,
+ ONENAND_GPMC_CONFIG2,
+ ONENAND_GPMC_CONFIG3,
+ ONENAND_GPMC_CONFIG4,
+ ONENAND_GPMC_CONFIG5,
+ ONENAND_GPMC_CONFIG6, 0
+};
+static u32 gpmc_pcmcia[GPMC_MAX_REG] = {
+ PCMCIA_GPMC_CONFIG1,
+ PCMCIA_GPMC_CONFIG2,
+ PCMCIA_GPMC_CONFIG3,
+ PCMCIA_GPMC_CONFIG4,
+ PCMCIA_GPMC_CONFIG5,
+ PCMCIA_GPMC_CONFIG6, 0
+};
+
+/********** Functions ****/
+
+/* ENV Functions */
+
+#ifdef ENV_IS_VARIABLE
+uchar env_get_char_spec(int index)
+{
+ if (!boot_env_get_char_spec) {
+ puts("ERROR!! env_get_char_spec not available\n");
+ } else
+ return boot_env_get_char_spec(index);
+ return 0;
+}
+int env_init(void)
+{
+ if (!boot_env_init) {
+ puts("ERROR!! boot_env_init not available\n");
+ } else
+ return boot_env_init();
+ return -1;
+}
+int saveenv(void)
+{
+ if (!boot_saveenv) {
+ puts("ERROR!! boot_saveenv not available\n");
+ } else
+ return boot_saveenv();
+ return -1;
+}
+void env_relocate_spec(void)
+{
+ if (!boot_env_relocate_spec) {
+ puts("ERROR!! boot_env_relocate_spec not available\n");
+ } else
+ boot_env_relocate_spec();
+}
+#endif
+
+/*************************************************************
+ * get_sys_clk_speed - determine reference oscillator speed
+ * based on known 32kHz clock and gptimer.
+ *************************************************************/
+u32 get_osc_clk_speed(u32 * shift)
+{
+#define GPT_EN ((0<<2)|BIT1|BIT0) /* enable sys_clk NO-prescale /1 */
+#define GPT_CTR OMAP24XX_GPT2+TCRR /* read counter address */
+ u32 start, cstart, cend, cdiff, val;
+
+ if (__raw_readl(PRCM_CLKSRC_CTRL) & BIT7) { /* if currently /2 */
+ *shift = 1;
+ } else {
+ *shift = 0;
+ }
+
+ /* enable timer2 */
+ val = __raw_readl(CM_CLKSEL2_CORE) | 0x4; /* mask for sys_clk use */
+ __raw_writel(val, CM_CLKSEL2_CORE); /* timer2 source to sys_clk */
+ __raw_writel(BIT4, CM_ICLKEN1_CORE); /* timer2 interface clock on */
+ __raw_writel(BIT4, CM_FCLKEN1_CORE); /* timer2 function clock on */
+ __raw_writel(0, OMAP24XX_GPT2 + TLDR); /* start counting at 0 */
+ __raw_writel(GPT_EN, OMAP24XX_GPT2 + TCLR); /* enable clock */
+ /* enable 32kHz source *//* enabled out of reset */
+ /* determine sys_clk via gauging */
+
+ start = 20 + __raw_readl(S32K_CR); /* start time in 20 cycles */
+ while (__raw_readl(S32K_CR) < start) ; /* dead loop till start time */
+ cstart = __raw_readl(GPT_CTR); /* get start sys_clk count */
+ while (__raw_readl(S32K_CR) < (start + 20)) ; /* wait for 40 cycles */
+ cend = __raw_readl(GPT_CTR); /* get end sys_clk count */
+ cdiff = cend - cstart; /* get elapsed ticks */
+
+ /* based on number of ticks assign speed */
+ if (cdiff > (19000 >> *shift))
+ return (S38_4M);
+ else if (cdiff > (15200 >> *shift))
+ return (S26M);
+ else if (cdiff > (13000 >> *shift))
+ return (S24M);
+ else if (cdiff > (9000 >> *shift))
+ return (S19_2M);
+ else if (cdiff > (7600 >> *shift))
+ return (S13M);
+ else
+ return (S12M);
+}
+
+/************************************************************
+ * sdelay() - simple spin loop. Will be constant time as
+ * its generally used in 12MHz bypass conditions only. This
+ * is necessary until timers are accessible.
+ *
+ * not inline to increase chances its in cache when called
+ *************************************************************/
+void sdelay(unsigned long loops)
+{
+ __asm__ volatile ("1:\n" "subs %0, %1, #1\n"
+ "bne 1b":"=r" (loops):"0"(loops));
+}
+
+/*********************************************************************************
+ * prcm_init() - inits clocks for PRCM as defined in clocks.h (config II default).
+ * -- called from SRAM, or Flash (using temp SRAM stack).
+ *********************************************************************************/
+void prcm_init(void)
+{
+ u32 div, speed, val, div_by_2;
+ void (*f_lock_pll) (u32, u32, u32, u32);
+ extern void *_end_vect, *_start;
+ /* u32 rev = get_cpu_rev(); unused as of now */
+
+ f_lock_pll =
+ (void *)((u32) & _end_vect - (u32) & _start + SRAM_VECT_CODE);
+
+ val = __raw_readl(PRCM_CLKSRC_CTRL) & ~(BIT1 | BIT0);
+#if defined(OMAP2430_SQUARE_CLOCK_INPUT)
+ __raw_writel(val, PRCM_CLKSRC_CTRL);
+#else
+ __raw_writel((val | BIT0), PRCM_CLKSRC_CTRL);
+#endif
+ /* skip clock gauging if warm reset. For some unknown reason,
+ GPT2 stalls after warm reset until DPLL has been setup and
+ GPT2 F/I clocks are enabled.
+ */
+ if (__raw_readl(RM_RSTST_MPU) & BIT1) {
+ speed = S13M;
+ if (((BIT23 | BIT24 | BIT25) & __raw_readl(CM_CLKSEL1_PLL)) ==
+ (0x3 << 23))
+ speed = S12M;
+ else if (((BIT23 | BIT24 | BIT25) & __raw_readl(CM_CLKSEL1_PLL))
+ == (0x0 << 23))
+ speed = S19_2M;
+ div_by_2 =
+ (((BIT6 | BIT7) & __raw_readl(PRCM_CLKSRC_CTRL)) == 0x2);
+ if (div_by_2)
+ speed <<= 1;
+ } else
+ speed = get_osc_clk_speed(&div_by_2);
+
+ if ((speed > S19_2M) && (!div_by_2)) { /* if fast && /2 off, enable it */
+ val = ~(BIT6 | BIT7) & __raw_readl(PRCM_CLKSRC_CTRL);
+ val |= (0x2 << 6); /* divide by 2 if (24,26,38.4) -> (12/13/19.2) */
+ __raw_writel(val, PRCM_CLKSRC_CTRL);
+ }
+ __raw_writel(0, CM_FCLKEN1_CORE); /* stop all clocks to reduce ringing */
+ __raw_writel(0, CM_FCLKEN2_CORE); /* may not be necessary */
+ __raw_writel(0, CM_ICLKEN1_CORE);
+ __raw_writel(0, CM_ICLKEN2_CORE);
+
+ __raw_writel(DPLL_OUT, CM_CLKSEL2_PLL); /* set DPLL out */
+ __raw_writel(MPU_DIV, CM_CLKSEL_MPU); /* set MPU divider */
+ __raw_writel(DSP_DIV, CM_CLKSEL_DSP); /* set dsp and iva dividers */
+ __raw_writel(GFX_DIV, CM_CLKSEL_GFX); /* set gfx dividers */
+ __raw_writel(MDM_DIV, CM_CLKSEL_MDM); /* set mdm dividers */
+
+ div = BUS_DIV;
+ __raw_writel(div, CM_CLKSEL1_CORE); /* set L3/L4/USB/Display/SSi dividers */
+ sdelay(1000);
+
+ if (running_in_flash()) {
+ /* if running from flash, need to jump to small relocated code area in SRAM.
+ * This is the only safe spot to do configurations from.
+ */
+ (*f_lock_pll) (PRCM_CLKCFG_CTRL, CM_CLKEN_PLL, DPLL_LOCK,
+ CM_IDLEST_CKGEN);
+ }
+
+ /* set up APLLS_CLKIN per crystal */
+ if (speed > S19_2M)
+ speed >>= 1; /* if fast shift to /2 range */
+ val = (0x2 << 23); /* default to 13Mhz for 2430c */
+ if (speed == S12M)
+ val = (0x3 << 23);
+ else if (speed == S19_2M)
+ val = (0x0 << 23);
+ val |= (~(BIT23 | BIT24 | BIT25) & __raw_readl(CM_CLKSEL1_PLL));
+ __raw_writel(val, CM_CLKSEL1_PLL);
+
+ __raw_writel(DPLL_LOCK | APLL_LOCK, CM_CLKEN_PLL); /* enable apll */
+ wait_on_value(BIT8, BIT8, CM_IDLEST_CKGEN, LDELAY); /* wait for apll lock */
+
+ sdelay(1000);
+}
+
+/**************************************************************************
+ * make_cs1_contiguous() - for es2 and above remap cs1 behind cs0 to allow
+ * command line mem=xyz use all memory with out discontigious support
+ * compiled in. Could do it at the ATAG, but there really is two banks...
+ * Called as part of 2nd phase DDR init.
+ **************************************************************************/
+void make_cs1_contiguous(void)
+{
+ u32 size, a_add_low, a_add_high;
+
+ size = get_sdr_cs_size(SDRC_CS0_OSET);
+ size /= SZ_32M; /* find size to offset CS1 */
+ a_add_high = (size & 3) << 8; /* set up low field */
+ a_add_low = (size & 0x3C) >> 2; /* set up high field */
+ __raw_writel((a_add_high | a_add_low), SDRC_CS_CFG);
+
+}
+
+/********************************************************
+ * mem_ok() - test used to see if timings are correct
+ * for a part. Helps in gussing which part
+ * we are currently using.
+ *******************************************************/
+u32 mem_ok(void)
+{
+ u32 val1, val2, orig1, orig2, addr;
+ u32 pattern = 0x12345678;
+
+ addr = OMAP24XX_SDRC_CS0;
+
+ orig1 = __raw_readl(addr + 0x400); /* try to save original value */
+ orig2 = __raw_readl(addr);
+ __raw_writel(0x0, addr + 0x400); /* clear pos A */
+ __raw_writel(pattern, addr); /* pattern to pos B */
+ __raw_writel(0x0, addr + 4); /* remove pattern off the bus */
+ val1 = __raw_readl(addr + 0x400); /* get pos A value */
+ val2 = __raw_readl(addr); /* get val2 */
+ if ((val1 != 0) || (val2 != pattern)) /* see if pos A value changed */
+ return (0);
+ else {
+ /* restore original values and return pass */
+ __raw_writel(orig1, addr + 0x400);
+ __raw_writel(orig2, addr);
+ return (1);
+ }
+}
+
+/********************************************************
+ * sdrc_init() - init the sdrc chip selects CS0 and CS1
+ * - early init routines, called from flash or
+ * SRAM.
+ *******************************************************/
+void sdrc_init(void)
+{
+#define EARLY_INIT 1
+ do_sdrc_init(SDRC_CS0_OSET, EARLY_INIT); /* only init up first bank here */
+}
+
+/*************************************************************************
+ * do_sdrc_init(): initialize the SDRAM for use.
+ * -called from low level code with stack only.
+ * -code sets up SDRAM timing and muxing for 2422 or 2420.
+ * -optimal settings can be placed here, or redone after i2c
+ * inspection of board info
+ *
+ * This is a bit ugly, but should handle all memory modules
+ * used with the SDP. The first time though this code from s_init()
+ * we configure the first chip select. Later on we come back and
+ * will configure the 2nd chip select if it exists.
+ *
+ **************************************************************************/
+void do_sdrc_init(u32 offset, u32 early)
+{
+ u32 cpu, dev, dllstat, dllctrl = 0, rev, common = 0, cs0 = 0, pmask =
+ 0, pass_type, mtype;
+ sdrc_data_t *sdata; /* do not change type */
+ u32 dllx = 0, mono = 0;
+ void init_dcdl(u32 cpu);
+
+ /* the following structure has a lot data shared with 2420 H4. Only 3 2430SDP
+ parameters. This needs to be cleaned after wakeup */
+ static const sdrc_data_t sdrc_2430 = {
+ H4_2420_SDRC_SHARING, SDP_2430_SDRC_MDCFG_0_DDR,
+ H4_2420_SDRC_MDCFG_0_SDR,
+ SDP_2430_SDRC_ACTIM_CTRLA_0, H4_2420_SDRC_ACTIM_CTRLB_0,
+ H4_2420_SDRC_RFR_CTRL, H4_2420_SDRC_MR_0_DDR,
+ H4_2420_SDRC_MR_0_SDR,
+ SDP_2430_SDRC_DLLAB_CTRL
+ };
+
+ if (offset == SDRC_CS0_OSET)
+ cs0 = common = 1; /* int regs shared between both chip select */
+
+ cpu = get_cpu_type();
+ dev = get_device_type();
+ rev = get_cpu_rev();
+
+ /* warning generated, though code generation is correct. this may bite later,
+ * but is ok for now. there is only so much C code you can do on stack only
+ * operation.
+ */
+ sdata = (sdrc_data_t *) & sdrc_2430;
+ pass_type = IP_DDR;
+
+ __asm__ __volatile__("":::"memory"); /* limit compiler scope */
+
+ /* u-boot is compiled to run in DDR or SRAM at 8xxxxxxx or 4xxxxxxx.
+ * If we are running in flash prior to relocation and we use data
+ * here which is not pc relative we need to get the address correct.
+ * We need to find the current flash mapping to dress up the initial
+ * pointer load. As long as this is const data we should be ok.
+ */
+ if ((early) && running_in_flash()) {
+ sdata =
+ (sdrc_data_t *) (((u32) sdata & 0x0003FFFF) |
+ get_gpmc0_base());
+ if (running_from_internal_boot()) {
+ if (dev != GP_DEVICE)
+ /* NOR internal boot for HS device offset is
+ * 0x4000 from xloader signature.
+ */
+ sdata = (sdrc_data_t *) ((u32) sdata + 0x4000);
+ else {
+ /* GP device, the image may or may not signed.
+ * If signed, there are 8 bytes pending so the
+ * u-boot is at offset 0x8.
+ */
+ if (sdata->sdrc_sharing != H4_2420_SDRC_SHARING)
+ sdata =
+ (sdrc_data_t *) ((u32) sdata + 0x8);
+ }
+ }
+ }
+
+ if (!early && (((mtype = get_mem_type()) == DDR_COMBO)
+ || (mtype == DDR_STACKED))) {
+ if (mtype == DDR_COMBO) {
+ pmask = BIT2; /* combo part has a shared CKE signal, can't use feature */
+ pass_type = COMBO_DDR; /* CS1 config */
+ __raw_writel((__raw_readl(SDRC_POWER)) & ~pmask,
+ SDRC_POWER);
+ }
+ if (rev != CPU_242X_ES1) /* for es2 and above smooth things out */
+ make_cs1_contiguous();
+ }
+
+ next_mem_type:
+ if (common) { /* do a SDRC reset between types to clear regs */
+ __raw_writel(SOFTRESET, SDRC_SYSCONFIG); /* reset sdrc */
+ wait_on_value(BIT0, BIT0, SDRC_STATUS, 12000000); /* wait till reset done set */
+ __raw_writel(0, SDRC_SYSCONFIG); /* clear soft reset */
+ __raw_writel(sdata->sdrc_sharing, SDRC_SHARING);
+#ifdef POWER_SAVE
+ __raw_writel(__raw_readl(SMS_SYSCONFIG) | SMART_IDLE,
+ SMS_SYSCONFIG);
+ __raw_writel(sdata->sdrc_sharing | SMART_IDLE, SDRC_SHARING);
+ __raw_writel((__raw_readl(SDRC_POWER) | BIT6), SDRC_POWER);
+#endif
+ }
+
+ if ((pass_type == IP_DDR) || (pass_type == STACKED)) { /* (IP ddr-CS0),(2422-CS0/CS1) */
+ __raw_writel(sdata->sdrc_mdcfg_0_ddr, SDRC_MCFG_0 + offset);
+ if (mono)
+ __raw_writel(H4_2422_SDRC_MDCFG_MONO_DDR, SDRC_MCFG_0 + offset); /* 2422.es2.05-CS1 */
+ } else if (pass_type == COMBO_DDR) { /* (combo-CS0/CS1) */
+ __raw_writel(H4_2420_COMBO_MDCFG_0_DDR, SDRC_MCFG_0 + offset);
+ } else if (pass_type == IP_SDR) { /* ip sdr-CS0 */
+ __raw_writel(sdata->sdrc_mdcfg_0_sdr, SDRC_MCFG_0 + offset);
+ }
+
+ if (cs0) {
+ __raw_writel(sdata->sdrc_actim_ctrla_0, SDRC_ACTIM_CTRLA_0);
+ __raw_writel(sdata->sdrc_actim_ctrlb_0, SDRC_ACTIM_CTRLB_0);
+ } else {
+ __raw_writel(sdata->sdrc_actim_ctrla_0, SDRC_ACTIM_CTRLA_1);
+ __raw_writel(sdata->sdrc_actim_ctrlb_0, SDRC_ACTIM_CTRLB_1);
+ }
+ __raw_writel(sdata->sdrc_rfr_ctrl, SDRC_RFR_CTRL + offset);
+
+ /* init sequence for mDDR/mSDR using manual commands (DDR is a bit different) */
+ __raw_writel(CMD_NOP, SDRC_MANUAL_0 + offset);
+ sdelay(5000); /* supposed to be 100us per design spec for mddr/msdr */
+ __raw_writel(CMD_PRECHARGE, SDRC_MANUAL_0 + offset);
+ __raw_writel(CMD_AUTOREFRESH, SDRC_MANUAL_0 + offset);
+ __raw_writel(CMD_AUTOREFRESH, SDRC_MANUAL_0 + offset);
+
+ /*
+ * CSx SDRC Mode Register
+ * Burst length = (4 - DDR) (2-SDR)
+ * Serial mode
+ * CAS latency = x
+ */
+ if (pass_type == IP_SDR)
+ __raw_writel(sdata->sdrc_mr_0_sdr, SDRC_MR_0 + offset);
+ else
+ __raw_writel(sdata->sdrc_mr_0_ddr, SDRC_MR_0 + offset);
+
+ dllctrl = BIT0; /* flag to clear bit0 (90deg for < 133MHz) */
+
+#ifdef PRCM_CONFIG_2
+ /* flag clear bit1 (set phase to 72 for > 150MHz) */
+ dllctrl |= DLLPHASE; /* phase to 72 for > 150MHz) */
+#endif
+
+ /* If DDR enable DLL to get a value, then move to unlock mode for SDRC mod16 errata */
+ if (common && (pass_type != IP_SDR)) {
+ __raw_writel(sdata->sdrc_dllab_ctrl, SDRC_DLLA_CTRL);
+ __raw_writel(sdata->sdrc_dllab_ctrl & ~(LOADDLL | dllctrl),
+ SDRC_DLLA_CTRL);
+ __raw_writel(sdata->sdrc_dllab_ctrl, SDRC_DLLB_CTRL);
+ __raw_writel(sdata->sdrc_dllab_ctrl & ~(LOADDLL | dllctrl),
+ SDRC_DLLB_CTRL);
+
+ init_dcdl(cpu); /* fix errata for possible bad init state */
+
+ sdelay(0x2000); /* give time to lock, at least 1000 L3 */
+
+ /* work around DCDL MOD16 bug */
+ dllctrl = __raw_readl(SDRC_DLLA_CTRL + dllx); /* get cur ctrl value */
+ dllctrl &= ~(DLL_DELAY_MASK); /* prepare for load new value */
+ dllctrl |= LOADDLL; /* prepare for load + unlock mode */
+ dllstat =
+ (__raw_readl(SDRC_DLLA_STATUS + dllx) & DLL_DELAY_MASK);
+ dllctrl |= dllstat; /* prepare new dll load delay */
+ dllctrl |= DLL_NO_FILTER_MASK; /* make sure filter is off */
+ __raw_writel(dllctrl, SDRC_DLLA_CTRL); /* go to unlock modeA */
+ __raw_writel(dllctrl, SDRC_DLLB_CTRL); /* go to unlock modeB */
+ }
+ sdelay(0x1000);
+
+ if (mono) /* Used if Stacked memory is on CS1 only */
+ make_cs1_contiguous(); /* make CS1 appear at CS0 */
+
+ if (mem_ok())
+ return; /* STACKED, other configured type */
+ ++pass_type; /* IPDDR->COMBODDR->IPSDR for CS0 */
+ goto next_mem_type;
+}
+
+/*****************************************************
+ * init_dcdl(): Fix errata - unitilized flip-flop.
+ *****************************************************/
+void init_dcdl(u32 cpu)
+{
+ volatile u8 *adqs[4];
+ u8 vdqs[4], idx, i;
+ u32 base = OMAP24XX_CTRL_BASE;
+#define CONTROL_SDRC_DQS0 0x50
+
+ adqs[0] = ((volatile u8 *)(base + CONTROL_SDRC_DQS0 + 0x0));
+ adqs[1] = ((volatile u8 *)(base + CONTROL_SDRC_DQS0 + 0x1));
+ adqs[2] = ((volatile u8 *)(base + CONTROL_SDRC_DQS0 + 0x2));
+ adqs[3] = ((volatile u8 *)(base + CONTROL_SDRC_DQS0 + 0x3));
+ idx = 4;
+
+ for (i = 0; i < idx; ++i) /* save origional state */
+ vdqs[i] = *adqs[i];
+
+ for (i = 0; i < idx; ++i)
+ *adqs[i] = ((~0x10 & vdqs[i]) | 0x8); /* enable/activate pull down */
+
+ sdelay(0x400);
+
+ for (i = 0; i < idx; ++i)
+ *adqs[i] = (vdqs[i] | 0x10); /* enable/activate pull up */
+
+ sdelay(0x400);
+
+ for (i = 0; i < idx; ++i) /* restore state */
+ *adqs[i] = vdqs[i];
+}
+
+void enable_gpmc_config(u32 * gpmc_config, u32 gpmc_base, u32 base, u32 size)
+{
+ __raw_writel(0, GPMC_CONFIG7 + gpmc_base);
+ sdelay(1000);
+ /* Delay for settling */
+ __raw_writel(gpmc_config[0], GPMC_CONFIG1 + gpmc_base);
+ __raw_writel(gpmc_config[1], GPMC_CONFIG2 + gpmc_base);
+ __raw_writel(gpmc_config[2], GPMC_CONFIG3 + gpmc_base);
+ __raw_writel(gpmc_config[3], GPMC_CONFIG4 + gpmc_base);
+ __raw_writel(gpmc_config[4], GPMC_CONFIG5 + gpmc_base);
+ __raw_writel(gpmc_config[5], GPMC_CONFIG6 + gpmc_base);
+ /* Enable the config */
+ __raw_writel((((size & 0xF) << 8) | ((base >> 24) & 0x3F) |
+ (1 << 6)), GPMC_CONFIG7 + gpmc_base);
+ sdelay(2000);
+}
+
+/*****************************************************
+ * gpmc_init(): init gpmc bus
+ * Init GPMC for x16, MuxMode (SDRAM in x32).
+ * This code can only be executed from SRAM or SDRAM.
+ *****************************************************/
+void gpmc_init(void)
+{
+ /* For readability */
+ u32 mux = 0, mwidth;
+ u32 *gpmc_config = NULL;
+ u32 gpmc_base = 0;
+ u32 base = 0;
+ u8 idx = 0;
+ u8 cnt = 0;
+ u32 size = 0;
+ u32 f_off = CFG_MONITOR_LEN;
+ u32 f_sec = 0;
+ u32 board_type = 0;
+ unsigned char *config_sel = NULL;
+
+ mux = BIT9;
+ mwidth = get_gpmc0_width();
+
+ /* global settings */
+ __raw_writel(0x10, GPMC_SYSCONFIG); /* smart idle */
+ __raw_writel(0x0, GPMC_IRQENABLE); /* isr's sources masked */
+ __raw_writel(0, GPMC_TIMEOUT_CONTROL); /* timeout disable */
+
+ /* Disable the GPMC0 config set by ROM code
+ * It conflicts with our MPDB (both at 0x08000000)
+ */
+ __raw_writel(0 , GPMC_CONFIG7 + GPMC_CONFIG_CS0);
+ sdelay(1000);
+
+ /* GPMC5 is always MPDB.. need to know the chip info */
+ gpmc_base = GPMC_CONFIG_CS0 + (5 * GPMC_CONFIG_WIDTH);
+ gpmc_mpdb[0] |= mux;
+ enable_gpmc_config(gpmc_mpdb, gpmc_base, DEBUG_BASE, DBG_MPDB_SIZE);
+ idx = get_gpmc0_type();
+ /* invalid chip, assume nor boot */
+ if (idx > 0x7) {
+ idx = 7;
+ }
+
+ /* The board type information was supposed to be dynamically
+ * pinged from the board revision id. Due to the problem with
+ * fpga, this doesn't happen fast enough, hence reverting back
+ * to hardcoding the fact.
+ */
+#ifdef OMAP2430_SDP_GDP_CONFIG
+ board_type = BOARD_GDP_2430_T2;
+#else
+ board_type = BOARD_SDP_2430_T2;
+#endif
+
+ if (board_type == BOARD_GDP_2430_T2) {
+
+ config_sel = (unsigned char *)(chip_sel_gdp[idx]);
+
+ /* GPMC7 is always PCMCIA.. need to know the chip info */
+ gpmc_base = GPMC_CONFIG_CS0 + (7 * GPMC_CONFIG_WIDTH);
+ gpmc_pcmcia[0] |= mux;
+ __raw_writel(0x0, GPMC_CONFIG); /* set nWP, disable limited addr */
+ enable_gpmc_config(gpmc_pcmcia, gpmc_base, PCMCIA_BASE,PISMO_PCMCIA_SIZE );
+
+ /* On GDP, all the 4 flashes are not present by default
+ * Configure only those flashes that are present.
+ */
+ NOR_MAX_FLASH_BANKS = norfl_loc_gdp[idx][0];
+
+ for (cnt = 1; cnt <= NOR_MAX_FLASH_BANKS ; cnt++) {
+ NOR_FLASH_BANKS_LIST[cnt - 1] = norfl_loc_gdp[idx][cnt];
+ }
+
+ } else {
+ config_sel = (unsigned char *)(chip_sel_sdp[idx]);
+ }
+
+ /* For Nand based boot only..OneNand?? */
+ if (config_sel[0] == PROC_NAND) {
+ __raw_writel(0x001, GPMC_CONFIG); /* set nWP, disable limited addr */
+ }
+ /* reuse idx */
+ for (idx = 0; idx < GPMC_MAX_CS; idx++) {
+ if (!config_sel[idx]) {
+ continue;
+ }
+ gpmc_base = GPMC_CONFIG_CS0 + (idx * GPMC_CONFIG_WIDTH);
+ switch (config_sel[idx]) {
+ case PROC_NOR:
+ gpmc_config = gpmc_stnor;
+ gpmc_config[0] |= mux | TYPE_NOR | mwidth;
+ base = PROC_NOR_BASE;
+ size = PROC_NOR_SIZE;
+ f_sec = SZ_128K;
+ is_flash = 1;
+ break;
+#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+ case PROC_NAND:
+ base = PROC_NAND_BASE;
+ size = PROC_NAND_SIZE;
+ gpmc_config = gpmc_smnand;
+ gpmc_config[0] |= mux | TYPE_NAND | mwidth;
+ /* Either OneNand or Normal Nand at a time!! */
+ nand_cs_base = gpmc_base;
+ f_off = SMNAND_ENV_OFFSET;
+ is_nand = 1;
+ break;
+#endif
+ case PISMO_SIBLEY0:
+ case PISMO_SIBLEY1:
+ if (config_sel[idx] == PISMO_SIBLEY0) {
+ base = PISMO_SIB0_BASE;
+ size = PISMO_SIB0_SIZE;
+ } else {
+ base = PISMO_SIB1_BASE;
+ size = PISMO_SIB1_SIZE;
+ }
+ f_sec = SZ_256K;
+ gpmc_config = gpmc_sibnor;
+ gpmc_config[0] |= mux | TYPE_NOR | mwidth;
+ is_flash = 1;
+ break;
+ case PISMO_ONENAND:
+ base = PISMO_ONEN_BASE;
+ size = PISMO_ONEN_SIZE;
+ gpmc_config = gpmc_onenand;
+ f_off = ONENAND_ENV_OFFSET;
+ is_onenand = 1;
+ break;
+ default:
+ /* MPDB/Unsupported/Corrupt config- try Next GPMC CS!!!! */
+ continue;
+ }
+ if (0 == idx) {
+ boot_flash_base = base;
+ boot_flash_off = f_off;
+ boot_flash_sec = f_sec;
+ boot_flash_type = config_sel[idx];
+ boot_flash_env_addr = f_off;
+#ifdef ENV_IS_VARIABLE
+ switch (config_sel[0]) {
+ case PROC_NOR:
+ case PISMO_SIBLEY0:
+ case PISMO_SIBLEY1:
+ boot_env_get_char_spec =
+ flash_env_get_char_spec;
+ boot_env_init = flash_env_init;
+ boot_saveenv = flash_saveenv;
+ boot_env_relocate_spec =
+ flash_env_relocate_spec;
+ flash_addr = env_ptr =
+ (env_t *) (boot_flash_base +
+ boot_flash_off);
+ env_name_spec = flash_env_name_spec;
+ boot_flash_env_addr = (u32) flash_addr;
+ break;
+#if 0
+ case PROC_NAND:
+ boot_env_get_char_spec = nand_env_get_char_spec;
+ boot_env_init = nand_env_init;
+ boot_saveenv = nand_saveenv;
+ boot_env_relocate_spec = nand_env_relocate_spec;
+ env_ptr = 0; /* This gets filled elsewhere!! */
+ env_name_spec = nand_env_name_spec;
+ break;
+#endif
+ case PISMO_ONENAND:
+ boot_env_get_char_spec =
+ onenand_env_get_char_spec;
+ boot_env_init = onenand_env_init;
+ boot_saveenv = onenand_saveenv;
+ boot_env_relocate_spec =
+ onenand_env_relocate_spec;
+ env_ptr =
+ (env_t *) onenand_env;
+ env_name_spec = onenand_env_name_spec;
+ break;
+ default:
+ /* unknown variant!! */
+ puts("Unknown Boot chip!!!\n");
+ break;
+ }
+#endif /* ENV_IS_VARIABLE */
+ }
+ enable_gpmc_config(gpmc_config, gpmc_base, base, size);
+ }
+}
diff --git a/board/omap2430sdp/omap2430sdp.c b/board/omap2430sdp/omap2430sdp.c
new file mode 100644
index 0000000000..2e4e886787
--- /dev/null
+++ b/board/omap2430sdp/omap2430sdp.c
@@ -0,0 +1,622 @@
+/*
+ * (C) Copyright 2004-2005
+ * Texas Instruments, <www.ti.com>
+ * Richard Woodruff <r-woodruff2@ti.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#include <common.h>
+#include <asm/arch/cpu.h>
+#include <asm/io.h>
+#include <asm/arch/bits.h>
+#include <asm/arch/mux.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/arch/sys_info.h>
+#include <asm/arch/mem.h>
+#include <i2c.h>
+#include <asm/mach-types.h>
+#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+#include <linux/mtd/nand_legacy.h>
+extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
+#endif
+
+void wait_for_command_complete(unsigned int wd_base);
+
+/*******************************************************
+ * Routine: delay
+ * Description: spinning delay to use before udelay works
+ ******************************************************/
+static inline void delay(unsigned long loops)
+{
+ __asm__ volatile ("1:\n" "subs %0, %1, #1\n"
+ "bne 1b":"=r" (loops):"0"(loops));
+}
+
+/*****************************************
+ * Routine: board_init
+ * Description: Early hardware init.
+ *****************************************/
+int board_init(void)
+{
+ u32 rev ;
+ DECLARE_GLOBAL_DATA_PTR;
+
+ gpmc_init(); /* in SRAM or SDRM, finish GPMC */
+ rev = get_board_type();
+ if ((rev == BOARD_H4_SDP)) {
+ gd->bd->bi_arch_number = MACH_TYPE_OMAP_H4; /* board id for linux */
+ } else {
+ gd->bd->bi_arch_number = MACH_TYPE_OMAP_2430SDP; /* board id for linux */
+ }
+ gd->bd->bi_boot_params = (OMAP24XX_SDRC_CS0 + 0x100); /* adress of boot parameters */
+
+ return 0;
+}
+
+/*****************************************
+ * Routine: secure_unlock
+ * Description: Setup security registers for access
+ * (GP Device only)
+ *****************************************/
+void secure_unlock(void)
+{
+ /* Permission values for registers -Full fledged permissions to all */
+ #define UNLOCK_1 0xFFFFFFFF
+ #define UNLOCK_2 0x00000000
+ #define UNLOCK_3 0x0000FFFF
+ /* Protection Module Register Target APE (PM_RT)*/
+ __raw_writel(UNLOCK_1, PM_RT_APE_BASE_ADDR_ARM + 0x68); /* REQ_INFO_PERMISSION_1 L*/
+ __raw_writel(UNLOCK_1, PM_RT_APE_BASE_ADDR_ARM + 0x50); /* READ_PERMISSION_0 L*/
+ __raw_writel(UNLOCK_1, PM_RT_APE_BASE_ADDR_ARM + 0x58); /* WRITE_PERMISSION_0 L*/
+ __raw_writel(UNLOCK_2, PM_RT_APE_BASE_ADDR_ARM + 0x60); /* ADDR_MATCH_1 L*/
+
+
+ __raw_writel(UNLOCK_3, PM_GPMC_BASE_ADDR_ARM + 0x48); /* REQ_INFO_PERMISSION_0 L*/
+ __raw_writel(UNLOCK_3, PM_GPMC_BASE_ADDR_ARM + 0x50); /* READ_PERMISSION_0 L*/
+ __raw_writel(UNLOCK_3, PM_GPMC_BASE_ADDR_ARM + 0x58); /* WRITE_PERMISSION_0 L*/
+
+ __raw_writel(UNLOCK_3, PM_OCM_RAM_BASE_ADDR_ARM + 0x48); /* REQ_INFO_PERMISSION_0 L*/
+ __raw_writel(UNLOCK_3, PM_OCM_RAM_BASE_ADDR_ARM + 0x50); /* READ_PERMISSION_0 L*/
+ __raw_writel(UNLOCK_3, PM_OCM_RAM_BASE_ADDR_ARM + 0x58); /* WRITE_PERMISSION_0 L*/
+ __raw_writel(UNLOCK_2, PM_OCM_RAM_BASE_ADDR_ARM + 0x80); /* ADDR_MATCH_2 L*/
+
+ /* IVA Changes */
+ __raw_writel(UNLOCK_3, PM_IVA2_BASE_ADDR_ARM + 0x48); /* REQ_INFO_PERMISSION_0 L*/
+ __raw_writel(UNLOCK_3, PM_IVA2_BASE_ADDR_ARM + 0x50); /* READ_PERMISSION_0 L*/
+ __raw_writel(UNLOCK_3, PM_IVA2_BASE_ADDR_ARM + 0x58); /* WRITE_PERMISSION_0 L*/
+}
+
+/**********************************************************
+ * Routine: try_unlock_sram()
+ * Description: If chip is GP type, unlock the SRAM for
+ * general use.
+ ***********************************************************/
+void try_unlock_sram(void)
+{
+ int mode;
+
+ /* if GP device unlock device SRAM for general use */
+ /* secure code breaks for Secure/Emulation device - HS/E/T*/
+ mode = get_device_type();
+ if (mode == GP_DEVICE) {
+ secure_unlock();
+ }
+ return;
+}
+
+/**********************************************************
+ * Routine: s_init
+ * Description: Does early system init of muxing and clocks.
+ * - Called path is with sram stack.
+ **********************************************************/
+void s_init(void)
+{
+ int in_sdram = running_in_sdram();
+ /* u32 rev = get_cpu_rev(); unused as of now.. */
+
+ watchdog_init();
+
+ try_unlock_sram(); /* Do SRAM availability first - take care of permissions too */
+
+ set_muxconf_regs();
+ delay(100);
+
+ if (!in_sdram){
+ prcm_init();
+ }
+
+ peripheral_enable();
+ icache_enable();
+ if (!in_sdram)
+ sdrc_init();
+}
+
+/*******************************************************
+ * Routine: misc_init_r
+ * Description: Init ethernet (done here so udelay works)
+ ********************************************************/
+int misc_init_r(void)
+{
+ ether_init(); /* better done here so timers are init'ed */
+ return (0);
+}
+
+/****************************************
+ * Routine: watchdog_init
+ * Description: Shut down watch dogs
+ *****************************************/
+void watchdog_init(void)
+{
+ /* There are 4 watch dogs. 1 secure, and 3 general purpose.
+ * The ROM takes care of the secure one. Of the 3 GP ones,
+ * 1 can reset us directly, the other 2 only generate MPU interrupts.
+ */
+ __raw_writel(WD_UNLOCK1, WD2_BASE + WSPR);
+ wait_for_command_complete(WD2_BASE);
+ __raw_writel(WD_UNLOCK2, WD2_BASE + WSPR);
+}
+
+/******************************************************
+ * Routine: wait_for_command_complete
+ * Description: Wait for posting to finish on watchdog
+ ******************************************************/
+void wait_for_command_complete(unsigned int wd_base)
+{
+ int pending = 1;
+ do {
+ pending = __raw_readl(wd_base + WWPS);
+ } while (pending);
+}
+
+/*******************************************************************
+ * Routine:ether_init
+ * Description: take the Ethernet controller out of reset and wait
+ * for the EEPROM load to complete.
+ ******************************************************************/
+void ether_init(void)
+{
+#ifdef CONFIG_DRIVER_LAN91C96
+ int cnt = 20;
+
+ /* u32 rev = get_cpu_rev(); unused as of now */
+
+
+ __raw_writew(0x0, LAN_RESET_REGISTER);
+ do {
+ __raw_writew(0x1, LAN_RESET_REGISTER);
+ udelay(100);
+ if (cnt == 0)
+ goto h4reset_err_out;
+ --cnt;
+ } while (__raw_readw(LAN_RESET_REGISTER) != 0x1);
+
+ cnt = 20;
+
+ do {
+ __raw_writew(0x0, LAN_RESET_REGISTER);
+ udelay(100);
+ if (cnt == 0)
+ goto h4reset_err_out;
+ --cnt;
+ } while (__raw_readw(LAN_RESET_REGISTER) != 0x0000);
+ udelay(1000);
+
+ *((volatile unsigned char *)ETH_CONTROL_REG) &= ~0x01;
+ udelay(1000);
+
+ h4reset_err_out:
+ return;
+#endif
+}
+
+/**********************************************
+ * Routine: dram_init
+ * Description: sets uboots idea of sdram size
+ **********************************************/
+int dram_init(void)
+{
+ DECLARE_GLOBAL_DATA_PTR;
+ unsigned int size0 = 0, size1 = 0;
+ u32 mtype, btype;
+#ifdef CONFIG_DRIVER_OMAP24XX_I2C
+ u8 data;
+#endif
+#define NOT_EARLY 0
+
+#ifdef CONFIG_DRIVER_OMAP24XX_I2C
+ i2c_init(CFG_I2C_SPEED, CFG_I2C_SLAVE);
+ select_bus(1, CFG_I2C_SPEED); /* select bus with T2 on it */
+#endif
+ btype = get_board_type();
+ mtype = get_mem_type();
+ display_board_info(btype);
+#ifdef CONFIG_DRIVER_OMAP24XX_I2C
+ if (btype == BOARD_SDP_2430_T2) {
+ /* Enable VMODE following voltage switching */
+ data = 0x24; /* set the floor voltage to 1.05v */
+ i2c_write(I2C_TRITON2, 0xBB, 1, &data, 1);
+ data = 0x38; /* set the roof voltage to 1.3V */
+ i2c_write(I2C_TRITON2, 0xBC, 1, &data, 1);
+ data = 0x0; /* set jump mode for VDD voltage transition */
+ i2c_write(I2C_TRITON2, 0xBD, 1, &data, 1);
+ data = 1; /* enable voltage scaling */
+ i2c_write(I2C_TRITON2, 0xBA, 1, &data, 1);
+ }
+#endif
+
+ if ((mtype == DDR_COMBO) || (mtype == DDR_STACKED)) {
+ /* init other chip select and map CS1 right after CS0 */
+ do_sdrc_init(SDRC_CS1_OSET, NOT_EARLY);
+ }
+ size0 = get_sdr_cs_size(SDRC_CS0_OSET);
+ size1 = get_sdr_cs_size(SDRC_CS1_OSET);
+
+ gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+ gd->bd->bi_dram[0].size = size0;
+ gd->bd->bi_dram[1].start = PHYS_SDRAM_1+size0;
+ gd->bd->bi_dram[1].size = size1;
+
+ return 0;
+}
+
+#define MUX_VAL(OFFSET,VALUE)\
+ __raw_writeb((VALUE), OMAP24XX_CTRL_BASE + (OFFSET));
+
+#if (CONFIG_2430SDP)
+#define MUX_DEFAULT()\
+ /* SDRC */\
+ MUX_VAL(0x0054, 0x1B) /* sdrc_a14 - EN, HI, 3, ->gpio_0 */\
+ MUX_VAL(0x0055, 0x1B) /* sdrc_a13 - EN, HI, 3, ->gpio_1 */\
+ MUX_VAL(0x0056, 0x00) /* sdrc_a12 - Dis, 0 */\
+ MUX_VAL(0x0046, 0x00) /* sdrc_ncs1 - Dis, 0 */\
+ MUX_VAL(0x0048, 0x00) /* sdrc_cke1 - Dis, 0 */\
+ /* GPMC */\
+ MUX_VAL(0x0030, 0x00) /* gpmc_clk - Dis, 0 */\
+ MUX_VAL(0x0032, 0x00) /* gpmc_ncs1- Dis, 0 */\
+ MUX_VAL(0x0033, 0x00) /* gpmc_ncs2- Dis, 0 */\
+ MUX_VAL(0x0034, 0x03) /* gpmc_ncs3- Dis, 3, ->gpio_24 */\
+ MUX_VAL(0x0035, 0x03) /* gpmc_ncs4- Dis, 3, ->gpio_25 */\
+ MUX_VAL(0x0036, 0x00) /* gpmc_ncs5- Dis, 0 */\
+ MUX_VAL(0x0037, 0x03) /* gpmc_ncs6- Dis, 3, ->gpio_27 */\
+ MUX_VAL(0x0038, 0x00) /* gpmc_ncs7- Dis, 0 */\
+ MUX_VAL(0x0040, 0x18) /* gpmc_wait1- Dis, 0 */\
+ MUX_VAL(0x0041, 0x18) /* gpmc_wait2- Dis, 0 */\
+ MUX_VAL(0x0042, 0x1B) /* gpmc_wait3- EN, HI, 3, ->gpio_35 */\
+ MUX_VAL(0x0085, 0x1B) /* gpmc_a10- EN, HI, 3, ->gpio_3 */\
+ /* GPMC mux for NAND access */\
+ MUX_VAL(0x0086, 0x18) /* gpmc_a9 - EN, HI, 0*/\
+ MUX_VAL(0x0087, 0x18) /* gpmc_a8 - EN, HI, 0*/\
+ MUX_VAL(0x0088, 0x18) /* gpmc_a7 - EN, HI, 0*/\
+ MUX_VAL(0x0089, 0x18) /* gpmc_a6 - EN, HI, 0*/\
+ MUX_VAL(0x008A, 0x18) /* gpmc_a5 - EN, HI, 0*/\
+ MUX_VAL(0x008B, 0x18) /* gpmc_a4 - EN, HI, 0*/\
+ MUX_VAL(0x008C, 0x18) /* gpmc_a3 - EN, HI, 0*/\
+ MUX_VAL(0x008D, 0x18) /* gpmc_a2 - EN, HI, 0*/\
+ MUX_VAL(0x008E, 0x18) /* gpmc_a1 - EN, HI, 0*/\
+ MUX_VAL(0x008F, 0x18) /* gpmc_d15 - EN,HI, 0*/\
+ MUX_VAL(0x0090, 0x18) /* gpmc_d14 - EN, HI, 0*/\
+ MUX_VAL(0x0091, 0x18) /* gpmc_d13 - EN, HI, 0*/\
+ MUX_VAL(0x0092, 0x18) /* gpmc_d12 - EN, HI, 0*/\
+ MUX_VAL(0x0093, 0x18) /* gpmc_d11 - EN, HI, 0*/\
+ MUX_VAL(0x0094, 0x18) /* gpmc_d10 - EN, HI, 0*/\
+ MUX_VAL(0x0095, 0x18) /* gpmc_d9 - EN, HI, 0 */\
+ MUX_VAL(0x0096, 0x18) /* gpmc_d8 - EN, HI, 0*/\
+ /* DSS */\
+ MUX_VAL(0x009F, 0x00) /* dss_data0- Dis, 0 */\
+ MUX_VAL(0x00A0, 0x00) /* dss_data1- Dis, 0 */\
+ MUX_VAL(0x00A1, 0x00) /* dss_data2- Dis, 0 */\
+ MUX_VAL(0x00A2, 0x00) /* dss_data3- Dis, 0 */\
+ MUX_VAL(0x00A3, 0x00) /* dss_data4- Dis, 0 */\
+ MUX_VAL(0x00A4, 0x00) /* dss_data5- Dis, 0 */\
+ MUX_VAL(0x00A5, 0x00) /* dss_data6- Dis, 0 */\
+ MUX_VAL(0x00A6, 0x00) /* dss_data7- Dis, 0 */\
+ MUX_VAL(0x00A7, 0x00) /* dss_data8- Dis, 0 */\
+ MUX_VAL(0x00A8, 0x00) /* dss_data9- Dis, 0 */\
+ MUX_VAL(0x00A9, 0x00) /* dss_data10- Dis, 0 */\
+ MUX_VAL(0x00AA, 0x00) /* dss_data11- Dis, 0 */\
+ MUX_VAL(0x00AB, 0x00) /* dss_data12- Dis, 0 */\
+ MUX_VAL(0x00AC, 0x00) /* dss_data13- Dis, 0 */\
+ MUX_VAL(0x00AD, 0x00) /* dss_data14- Dis, 0 */\
+ MUX_VAL(0x00AE, 0x00) /* dss_data15- Dis, 0 */\
+ MUX_VAL(0x00AF, 0x00) /* dss_data16- Dis, 0 */\
+ MUX_VAL(0x00B0, 0x00) /* dss_data17- Dis, 0 */\
+ MUX_VAL(0x00B9, 0x00) /* dss_hsync- Dis, 0 */\
+ MUX_VAL(0x00BA, 0x00) /* dss_acbias- Dis, 0 */\
+ MUX_VAL(0x00B1, 0x1B) /* uart1_cts- EN, HI, 3, ->gpio_32 */\
+ MUX_VAL(0x00B2, 0x1B) /* uart1_rts- EN, HI, 3, ->gpio_8 */\
+ MUX_VAL(0x00B3, 0x1B) /* uart1_tx- EN, HI, 3, ->gpio_9 */\
+ MUX_VAL(0x00B4, 0x1B) /* uart1_rx- EN, HI, 3, ->gpio_10 */\
+ MUX_VAL(0x00B5, 0x1B) /* mcbsp2_dr- EN, HI, 3, ->gpio_11 */\
+ MUX_VAL(0x00B6, 0x1B) /* mcbsp2_clkx- EN, HI, 3, ->gpio_12 */\
+ /* CONTROL */\
+ MUX_VAL(0x00BB, 0x00) /* sys_nrespwron- Dis, 0 */\
+ MUX_VAL(0x00BC, 0x00) /* sys_nreswarm- Dis, 0 */\
+ MUX_VAL(0x00BD, 0x18) /* sys_nirq0- EN, HI, 0 */\
+ /*MUX_VAL(0x00BD, 0x1B)*/ /* sys_nirq0- EN, HI, 3, ->gpio_56 */\
+ MUX_VAL(0x00BE, 0x18) /* sys_nirq1- EN, HI, 0 */\
+ MUX_VAL(0x00C7, 0x00) /* gpio_132- Dis, 0, ->gpio132 */\
+ MUX_VAL(0x00CB, 0x00) /* gpio_133- Dis, 0, ->gpio133 */\
+ MUX_VAL(0x00C9, 0x18) /* sys_clkout- Dis, 0 */\
+ /*MUX_VAL(0x00C9, 0x1B)*/ /* sys_clkout- EN, HI, 3, ->gpio_111 */\
+ MUX_VAL(0x00CC, 0x18) /* jtag_emu1- EN, HI, 0 */\
+ MUX_VAL(0x00CD, 0x18) /* jtag_emu0- EN, HI, 0 */\
+ /* CAMERA */\
+ MUX_VAL(0x00DD, 0x02) /* cam_d0- Dis, 2, sti_dout */\
+ MUX_VAL(0x00DC, 0x02) /* cam_d1- Dis, 2, sti_din */\
+ MUX_VAL(0x00DB, 0x1B) /* cam_d2- EN, HI, 3, ->gpio_129 */\
+ MUX_VAL(0x00DA, 0x1B) /* cam_d3- EN, HI, 3, ->gpio_128 */\
+ MUX_VAL(0x00D9, 0x00) /* cam_d4- Dis, 0 */\
+ MUX_VAL(0x00D8, 0x00) /* cam_d5- Dis, 0 */\
+ MUX_VAL(0x00D7, 0x00) /* cam_d6- Dis, 0 */\
+ MUX_VAL(0x00D6, 0x00) /* cam_d7- Dis, 0 */\
+ MUX_VAL(0x00D5, 0x00) /* cam_d8- Dis, 0 */\
+ MUX_VAL(0x00D4, 0x00) /* cam_d9- Dis, 0 */\
+ MUX_VAL(0x00E3, 0x00) /* cam_d10- Dis, 0 */\
+ MUX_VAL(0x00E2, 0x00) /* cam_d11- Dis, 0 */\
+ MUX_VAL(0x00DE, 0x00) /* cam_hs- Dis, 0 */\
+ MUX_VAL(0x00DF, 0x00) /* cam_vs- Dis, 0 */\
+ MUX_VAL(0x00E0, 0x00) /* cam_lclk- Dis, 0 */\
+ MUX_VAL(0x00E1, 0x00) /* cam_xclk- Dis, 0 */\
+ MUX_VAL(0x00E4, 0x01) /* gpio_134- Dis, 1, ->ccp_datn */\
+ MUX_VAL(0x00E5, 0x01) /* gpio_135- Dis, 1, ->ccp_datp */\
+ MUX_VAL(0x00E6, 0x01) /* gpio_136- Dis, 1, ->ccp_clkn */\
+ MUX_VAL(0x00E7, 0x01) /* gpio_137- Dis, 1, ->ccp_clkp */\
+ MUX_VAL(0x00E8, 0x01) /* gpio_138- Dis, 1, ->spi3_clk */\
+ MUX_VAL(0x00E9, 0x01) /* gpio_139- Dis, 1, ->spi3_cs0 */\
+ MUX_VAL(0x00EA, 0x01) /* gpio_140- Dis, 1, ->spi3_simo */\
+ MUX_VAL(0x00EB, 0x01) /* gpio_141- Dis, 1, ->spi3_somi */\
+ MUX_VAL(0x00EC, 0x18) /* gpio_142- EN, HI, 0, ->gpio_142 */\
+ MUX_VAL(0x00ED, 0x18) /* gpio_154- EN, HI, 0, ->gpio_154 */\
+ MUX_VAL(0x00EE, 0x18) /* gpio_148- EN, HI, 0, ->gpio_148 */\
+ MUX_VAL(0x00EF, 0x18) /* gpio_149- EN, HI, 0, ->gpio_149 */\
+ MUX_VAL(0x00F0, 0x18) /* gpio_150- EN, HI, 0, ->gpio_150 */\
+ MUX_VAL(0x00F1, 0x18) /* gpio_152- EN, HI, 0, ->gpio_152 */\
+ MUX_VAL(0x00F2, 0x18) /* gpio_153- EN, HI, 0, ->gpio_153 */\
+ /* MMC1 */\
+ MUX_VAL(0x00F3, 0x00) /* mmc1_clko- Dis, 0 */\
+ MUX_VAL(0x00F4, 0x18) /* mmc1_cmd- EN, HI, 0 */\
+ MUX_VAL(0x00F5, 0x18) /* mmc1_dat0- EN, HI, 0 */\
+ MUX_VAL(0x00F6, 0x18) /* mmc1_dat1- EN, HI, 0 */\
+ MUX_VAL(0x00F7, 0x18) /* mmc1_dat2- EN, HI, 0 */\
+ MUX_VAL(0x00F8, 0x18) /* mmc1_dat3- EN, HI, 0 */\
+ /* MMC2 */\
+ MUX_VAL(0x00F9, 0x00) /* mmc2_clko- Dis, 0 */\
+ MUX_VAL(0x00FA, 0x18) /* mmc2_cmd- EN, HI, 0 */\
+ MUX_VAL(0x00FB, 0x18) /* mmc2_dat0- EN, HI, 0 */\
+ MUX_VAL(0x00FC, 0x18) /* mmc2_dat1- EN, HI, 0 */\
+ MUX_VAL(0x00FD, 0x18) /* mmc2_dat2- EN, HI, 0 */\
+ MUX_VAL(0x00FE, 0x18) /* mmc2_dat3- EN, HI, 0 */\
+ /* UART2 */\
+ MUX_VAL(0x00FF, 0x00) /* uart2_cts- Dis, 0 */\
+ MUX_VAL(0x0100, 0x00) /* uart2_rts- Dis, 0 */\
+ MUX_VAL(0x0101, 0x00) /* uart2_tx- Dis, 0 */\
+ MUX_VAL(0x0102, 0x00) /* uart2_rx- Dis, 0 */\
+ /* MCBSP3 */\
+ MUX_VAL(0x0103, 0x00) /* mcbsp3_clkx- Dis, 0 */\
+ MUX_VAL(0x0104, 0x00) /* mcbsp3_fsx- Dis, 0 */\
+ MUX_VAL(0x0105, 0x00) /* mcbsp3_dr- Dis, 0 */\
+ MUX_VAL(0x0106, 0x00) /* mcbsp3_dx- Dis, 0 */\
+ /* SSI1 */\
+ MUX_VAL(0x0107, 0x01) /* ssi1_dat_tx- Dis, 1, ->uart1_tx */\
+ MUX_VAL(0x0108, 0x01) /* ssi1_flag_tx- Dis, 1, ->uart1_rts */\
+ MUX_VAL(0x0109, 0x01) /* ssi1_rdy_tx- Dis, 1, ->uart1_cts */\
+ MUX_VAL(0x010A, 0x01) /* ssi1_dat_rx- Dis, 1, ->uart1_rx */\
+ MUX_VAL(0x010B, 0x01) /* gpio_63- Dis, 1, ->mcbsp4_clkx */\
+ MUX_VAL(0x010C, 0x01) /* ssi1_flag_rx- Dis, 1, ->mcbsp4_dr */\
+ MUX_VAL(0x010D, 0x01) /* ssi1_rdy_rx- Dis, 1, ->mcbsp4_dx */\
+ MUX_VAL(0x010E, 0x01) /* ssi1_wake- Dis, 1, ->mcbsp4_fsx */\
+ /* SPI1 */\
+ MUX_VAL(0x010F, 0x00) /* spi1_clk- Dis, 0 */\
+ MUX_VAL(0x0110, 0x00) /* spi1_simo- Dis, 0 */\
+ MUX_VAL(0x0111, 0x00) /* spi1_somi- Dis, 0 */\
+ MUX_VAL(0x0112, 0x00) /* spi1_cs0- Dis, 0 */\
+ MUX_VAL(0x0113, 0x00) /* spi1_cs1- Dis, 0 */\
+ MUX_VAL(0x0114, 0x00) /* spi1_cs2- Dis, 0 */\
+ MUX_VAL(0x0115, 0x00) /* spi1_cs3- Dis, 0 */\
+ /* SPI2 */\
+ MUX_VAL(0x0116, 0x1B) /* spi2_clk- EN, HI, 3, ->gpio_88 */\
+ MUX_VAL(0x0117, 0x1B) /* spi2_simo- EN, HI, 3, ->gpio_89 */\
+ MUX_VAL(0x0118, 0x1B) /* spi2_somi- EN, HI, 3, ->gpio_90 */\
+ MUX_VAL(0x0119, 0x1B) /* spi2_cs0- EN, HI, 3, ->gpio_91 */\
+ /* MCBSP1 */\
+ MUX_VAL(0x011A, 0x00) /* mcbsp1_clkr- Dis, 0 */\
+ MUX_VAL(0x011B, 0x00) /* mcbsp1_fsr- Dis, 0 */\
+ MUX_VAL(0x011C, 0x00) /* mcbsp1_dx- Dis, 0 */\
+ MUX_VAL(0x011D, 0x00) /* mcbsp1_dr- Dis, 0 */\
+ MUX_VAL(0x011E, 0x00) /* mcbsp1_clks- Dis, 0 */\
+ MUX_VAL(0x011F, 0x00) /* mcbsp1_fsx- Dis, 0 */\
+ MUX_VAL(0x0120, 0x00) /* mcbsp1_clkx- Dis, 0 */\
+ /* HDQ */\
+ MUX_VAL(0x0125, 0x00) /* hdq_sio- Dis, 0 */\
+ /* UART3 */\
+ MUX_VAL(0x0126, 0x00) /* uart3_cts_rctx- Dis, 0 */\
+ MUX_VAL(0x0127, 0x00) /* uart3_rts_sd- Dis, 0 */\
+ MUX_VAL(0x0128, 0x00) /* uart3_tx_irtx- Dis, 0 */\
+ MUX_VAL(0x0129, 0x00) /* uart3_rx_irrx- Dis, 0 */\
+ /* OTHERS */\
+ MUX_VAL(0x012B, 0x1B) /* gpio_78- EN, HI, 3, ->gpio_78 */\
+ MUX_VAL(0x012C, 0x01) /* gpio_79- Dis, 1, ->secure_indicator */\
+ MUX_VAL(0x012D, 0x1B) /* gpio_80- EN, HI, 3, ->gpio_80 */\
+ /* MCBSP2 */\
+ MUX_VAL(0x012E, 0x01) /* gpio_113- Dis, 1, ->mcbsp2_clkx */\
+ MUX_VAL(0x012F, 0x01) /* gpio_114- Dis, 1, ->mcbsp2_fsx */\
+ MUX_VAL(0x0130, 0x01) /* gpio_115- Dis, 1, ->mcbsp2_dr */\
+ MUX_VAL(0x0131, 0x01) /* gpio_116- Dis, 1, ->mcbsp2_dx */\
+ /* GPIO7-AUDIOENVDD */\
+ MUX_VAL(0x012A, 0x18) /* gpio_7- EN, HI, 3, ->gpio_7 */\
+
+#else
+/* For all other platforms */
+#define MUX_DEFAULT()\
+ /* SDRC */\
+ MUX_VAL(0x0054, 0x08) /* sdrc_a14 - EN, LO, 0 */\
+ MUX_VAL(0x0055, 0x08) /* sdrc_a13 - EN, LO, 0 */\
+ MUX_VAL(0x0056, 0x08) /* sdrc_a12 - EN, LO, 0 */\
+ MUX_VAL(0x0045, 0x18) /* sdrc_ncs1 - EN, HI, 0 */\
+ MUX_VAL(0x0046, 0x18) /* sdrc_ncs2 - EN, HI, 0 */\
+ /* GPMC */\
+ MUX_VAL(0x0030, 0x08) /* gpmc_clk - EN, LO, 0 */\
+ MUX_VAL(0x0032, 0x18) /* gpmc_ncs1- EN, HI, 0 */\
+ MUX_VAL(0x0033, 0x18) /* gpmc_ncs2- EN, HI, 0 */\
+ MUX_VAL(0x0034, 0x18) /* gpmc_ncs3- EN, HI, 0 */\
+ /* UART1 */\
+ MUX_VAL(0x00B1, 0x18) /* uart1_cts- EN, HI, 0 */\
+ MUX_VAL(0x00B2, 0x18) /* uart1_rts- EN, HI, 0 */\
+ MUX_VAL(0x00B3, 0x18) /* uart1_tx- EN, HI, 0 */\
+ MUX_VAL(0x00B4, 0x18) /* uart1_rx- EN, HI, 0 */\
+ /* UART2 */\
+ MUX_VAL(0x00FF, 0x18) /* uart2_cts- EN, HI, 0 */\
+ MUX_VAL(0x0100, 0x18) /* uart2_rts- EN, HI, 0 */\
+ MUX_VAL(0x0101, 0x18) /* uart2_tx- EN, HI, 0 */\
+ MUX_VAL(0x0102, 0x18) /* uart2_rx- EN, HI, 0 */\
+ /* UART3 */\
+ MUX_VAL(0x0126, 0x18) /* uart3_cts_rctx- EN, HI, 0 */\
+ MUX_VAL(0x0127, 0x18) /* uart3_rts_sd- EN, HI, 0 */\
+ MUX_VAL(0x0127, 0x18) /* uart3_tx_irtx- EN, HI, 0 */\
+ MUX_VAL(0x0127, 0x18) /* uart3_rx_irrx- EN, HI, 0 */\
+ /* I2C1 */\
+ MUX_VAL(0x0111, 0x00) /* i2c1_scl - DIS, NA, 0 */\
+ MUX_VAL(0x0112, 0x00) /* i2c1_sda - DIS, NA, 0 */\
+
+#endif /* End of Mux Mapping */
+
+#if 0
+/**********************************************************
+ * Routine: mux_pwr_save
+ * Description: Set pins to optimal power savings state.
+ *
+ * NOTE ES1 Failures for Errata, Do NOT include:
+ * - set D0-D31 (boot failure, u-boot ok)
+ * - set D16-D31 (boot failue, u-boot ok)
+ * - set D0-D15 (boot with memory errors, u-boot ok)
+ * - set DQS3 (boot failures, u-boot start some failures).
+ * - set DQS0-2 (no apparent problems).
+ *
+ *********************************************************/
+static void mux_pwr_save(void)
+{
+ #define SDRAM_WIDTH 32
+ #define OPTIMZE_FOR_DDR 1
+ #define NUM_DQS 4
+
+ u32 addr, val, offset, base = OMAP24XX_CTRL_BASE;
+
+ /* Activate DDR/SDR-SDRAM signal pull-ups on DQ signals to save power */
+ for(offset = 0x65; offset < (0x65 + SDRAM_WIDTH); offset++){
+ addr = base + offset; /* addr of pin config */
+ val = __raw_readb(addr) | (BIT4|BIT3); /* mask for pull-up on */
+ __raw_writeb(val, addr); /* update config */
+ }
+#if OPTIMZE_FOR_DDR
+ /* Activate DDR-SDRAM signal pull-ups on DQS signals to save power */
+ for(offset = 0x50; (offset < 0x50 + NUM_DQS); offset++){
+ addr = base + offset; /* addr of pin config */
+ val = __raw_readb(addr) | (BIT4|BIT3); /* mask for pull-up on */
+ __raw_writeb(val, addr); /* update config */
+ }
+#endif
+}
+#endif
+
+/**********************************************************
+ * Routine: set_muxconf_regs
+ * Description: Setting up the configuration Mux registers
+ * specific to the hardware. Many pins need
+ * to be moved from protect to primary mode.
+ *********************************************************/
+void set_muxconf_regs(void)
+{
+ u32 cpu;
+ cpu = get_cpu_type();
+ /* Incase we have to handle multiple processors such as 2430 and 2430C */
+ if (cpu == CPU_2430) {
+ MUX_DEFAULT();
+ // mux_pwr_save(); /* this fails on 2430-ES1 dispite recommendation */
+ } else
+ return;
+
+}
+
+/*****************************************************************
+ * Routine: peripheral_enable
+ * Description: Enable the clks & power for perifs (GPT2, UART1,...)
+ ******************************************************************/
+void peripheral_enable(void)
+{
+
+ unsigned int v, if_clks1 = 0, func_clks1 = 0, if_clks2 = 0, func_clks2 = 0;
+ /* ALERT STATUS 10000 */
+ /* Enable GP2 timer. */
+ if_clks1 |= BIT4;
+ func_clks1 |= BIT4;
+ v = __raw_readl(CM_CLKSEL2_CORE) | 0x4; /* Sys_clk input OMAP24XX_GPT2 */
+ __raw_writel(v, CM_CLKSEL2_CORE);
+ __raw_writel(0x1, CM_CLKSEL_WKUP);
+
+#ifdef CFG_NS16550
+ /* Enable UART1 clock */
+ func_clks1 |= BIT21;
+ if_clks1 |= BIT21;
+#endif
+#ifdef CONFIG_DRIVER_OMAP24XX_I2C
+ /* 2430 requires only the hs clock */
+ func_clks2 |= BIT20|BIT19; /* i2c1 and 2 96 meg clock input */
+ if_clks1 |= BIT20|BIT19;
+#endif
+
+ v = __raw_readl(CM_ICLKEN1_CORE) | if_clks1; /* Interface clocks on */
+ __raw_writel(v, CM_ICLKEN1_CORE);
+ v = __raw_readl(CM_ICLKEN2_CORE) | if_clks2; /* Interface clocks on */
+ __raw_writel(v, CM_ICLKEN2_CORE);
+ v = __raw_readl(CM_FCLKEN1_CORE) | func_clks1; /* Functional Clocks on */
+ __raw_writel(v, CM_FCLKEN1_CORE);
+ v = __raw_readl(CM_FCLKEN2_CORE) | func_clks2; /* Functional Clocks on */
+ __raw_writel(v, CM_FCLKEN2_CORE);
+ delay(1000);
+}
+
+/*****************************************************************************
+ * Routine: update_mux()
+ * Description: Update balls which are different beween boards. All should be
+ * updated to match functionaly. However, I'm only updating ones
+ * which I'll be using for now. When power comes into play they
+ * all need updating.
+ *****************************************************************************/
+void update_mux(u32 btype, u32 mtype)
+{
+ /* NOTHING as of now... */
+}
+
+#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+void nand_init(void)
+{
+ extern flash_info_t flash_info[];
+
+ nand_probe(CFG_NAND_ADDR);
+ if (nand_dev_desc[0].ChipID != NAND_ChipID_UNKNOWN) {
+ print_size(nand_dev_desc[0].totlen, "\n");
+ }
+#ifdef CFG_JFFS2_MEM_NAND
+ flash_info[CFG_JFFS2_FIRST_BANK].flash_id = nand_dev_desc[0].id;
+ flash_info[CFG_JFFS2_FIRST_BANK].size = 1024 * 1024 * 2; /* only read kernel single meg partition */
+ flash_info[CFG_JFFS2_FIRST_BANK].sector_count = 1024; /* 1024 blocks in 16meg chip (use less for raw/copied partition) */
+ flash_info[CFG_JFFS2_FIRST_BANK].start[0] = 0x80200000; /* ?, ram for now, open question, copy to RAM or adapt for NAND */
+#endif
+}
+#endif
diff --git a/board/omap2430sdp/sys_info.c b/board/omap2430sdp/sys_info.c
new file mode 100644
index 0000000000..9baf2f0b31
--- /dev/null
+++ b/board/omap2430sdp/sys_info.c
@@ -0,0 +1,501 @@
+/*
+ * (C) Copyright 2004-2005
+ * Texas Instruments, <www.ti.com>
+ * Richard Woodruff <r-woodruff2@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR /PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/arch/cpu.h>
+#include <asm/io.h>
+#include <asm/arch/bits.h>
+#include <asm/arch/mem.h> /* get mem tables */
+#include <asm/arch/sys_proto.h>
+#include <asm/arch/sys_info.h>
+#include <i2c.h>
+
+/****************************************************************************
+ * check_fpga_revision number: the rev number should be a or b
+ * 0xA203/5 variant did not have it, but the B101 variant has EEPROM update facility
+ ***************************************************************************/
+static inline u16 check_fpga_rev(void)
+{
+ return __raw_readw(FPGA_REV_REGISTER);
+}
+
+/****************************************************************************
+ * check_eeprom_avail: Check FPGA Availability
+ * OnBoard DEBUG FPGA registers need to be ready for us to proceed
+ * Required to retrieve the bootmode also.
+ ***************************************************************************/
+int check_eeprom_avail(u32 offset)
+{
+ u16 memst_reg;
+ u16 bit;
+
+ int count = 10000;
+ /* old fpga revs dont seem to have this update */
+ if (check_fpga_rev() < 0xB000) {
+ return 0;
+ }
+ /* Check if UI revision Name is already updated.
+ * if this is not done, we wait a bit to give a chance
+ * to update. This is nice to do as the Main board FPGA
+ * gets a chance to know off all it's components and we
+ * can continue to work normally
+ * Currently taking 269* udelay(1000) to update this on
+ * poweron from flash!!
+ */
+
+ if (offset == EEPROM_MAIN_BRD ) {
+ bit = BIT0;
+ }
+ else if (offset == EEPROM_UI_BRD ) {
+ bit = BIT2;
+ }
+
+ memst_reg = __raw_readw(I2C2_MEMORY_STATUS_REG);
+
+ while ( (memst_reg & bit) && count ) {
+ sdelay(100);
+ memst_reg = __raw_readw(I2C2_MEMORY_STATUS_REG);
+ count--;
+ }
+ /* Timed out count will be 0? */
+ return count;
+}
+
+/**************************************************************************
+ * get_cpu_type() - Read the FPGA Debug registers and provide the DIP switch
+ * settings
+ * 1 is on
+ * 0 is off
+ * Will return Index of type of gpmc
+ ***************************************************************************/
+u32 get_gpmc0_type(void)
+{
+ u8 cs;
+ if (!check_fpga_rev()) {
+ /* we dont have an DEBUG FPGA??? */
+ /* Depend on #defines!! default to strata boot return param */
+ return 0x07;
+ }
+ cs = (u8) __raw_readw(DIP_SWITCH_INPUT_REG2);
+ /* The bits are inverted- S8 0-2 define the CS0 select */
+ return ((~cs) & 0x07);
+}
+
+/**************************************************************************
+ * get_cpu_type() - low level get cpu type
+ * - no C globals yet.
+ * - just looking to say if this is a 2422 or 2420 or ...
+ * - to start with we will look at switch settings..
+ * - 2422 id's same as 2420 for ES1 will rely on H4 board characteristics
+ * (mux for 2420, non-mux for 2422).
+ ***************************************************************************/
+u32 get_cpu_type(void)
+{
+ u32 v;
+ v = __raw_readl(TAP_IDCODE_REG);
+ v &= CPU_24XX_ID_MASK;
+
+ if (v == CPU_2430_CHIPID) {
+ return (CPU_2430);
+ } else
+ return (-1); /* don't know,return invalid val */
+}
+
+/******************************************
+ * get_cpu_rev(void) - extract version info
+ ******************************************/
+u32 get_cpu_rev(void)
+{
+ u32 v;
+ v = __raw_readl(TAP_IDCODE_REG);
+ v = v >> 28;
+ return (v + 1);
+}
+
+/****************************************************
+ * is_mem_sdr() - return 1 if mem type in use is SDR
+ ****************************************************/
+u32 is_mem_sdr(void)
+{
+ volatile u32 *burst = (volatile u32 *)(SDRC_MR_0 + SDRC_CS0_OSET);
+ if (*burst == H4_2420_SDRC_MR_0_SDR)
+ return (1);
+ return (0);
+}
+
+/***********************************************************
+ * get_mem_type() - identify type of mDDR part used.
+ * 2422 uses stacked DDR, 2 parts CS0/CS1.
+ * 2420 may have 1 or 2, no good way to know...only init 1...
+ * when eeprom data is up we can select 1 more.
+ *************************************************************/
+u32 get_mem_type(void)
+{
+#if 1
+ /* 2340SDP only uses Infineon DDR for now. */
+ return (DDR_DISCRETE);
+#else
+ u32 cpu, sdr = is_mem_sdr();
+
+ cpu = get_cpu_type();
+ if (cpu == CPU_2422 || cpu == CPU_2423)
+ return (DDR_STACKED);
+
+ if (is_this_24xx_pop())
+ return (XDR_POP);
+
+ if (get_board_type() == BOARD_H4_MENELAUS)
+ if (sdr)
+ return (SDR_DISCRETE);
+ else
+ return (DDR_COMBO);
+ else if (sdr) /* SDP + SDR kit */
+ return (SDR_DISCRETE);
+ else
+ return (DDR_DISCRETE); /* origional SDP */
+#endif
+}
+
+/***********************************************************************
+ * get_cs0_size() - get size of chip select 0/1
+ ************************************************************************/
+u32 get_sdr_cs_size(u32 offset)
+{
+ u32 size;
+ /* get ram size field */
+ size = __raw_readl(SDRC_MCFG_0 + offset) >> 8;
+ size &= 0x3FF; /* remove unwanted bits */
+ size *= SZ_2M; /* find size in MB */
+ return (size);
+}
+
+/***********************************************************************
+ * get_board_type() - get board type based on current production stats.
+ * - NOTE-1-: 2 I2C EEPROMs will someday be populated with proper info.
+ * when they are available we can get info from there. This should
+ * be correct of all known boards up until today.
+ * - NOTE-2- EEPROMs are populated but they are updated very slowly. To
+ * avoid waiting on them we will use ES version of the chip to get info.
+ * A later version of the FPGA migth solve their speed issue.
+ ************************************************************************/
+u32 get_board_type(void)
+{
+ u32 cpu = get_cpu_rev();
+
+ /* we have sdp/we timed out.. base on 2430 rev */
+ /* > ES2 can voltage scale and is bundled w/ T2 */
+ if(cpu >= CPU_2430_ES2)
+ return BOARD_SDP_2430_T2;
+ else
+ return BOARD_SDP_2430_M1;
+}
+
+
+/***********************************************************************
+get_sdp_type() - get the sdp type : SDP or GDP based on the board id name tag.
+ On any failure conditions - due to lack of fpga information or
+ timeout, always default to SDP.
+***********************************************************************/
+u32 get_sdp_type(void)
+{
+ if (check_eeprom_avail(EEPROM_MAIN_BRD)) {
+ volatile char *m_brd_name = (char *)(EEPROM_MAIN_BRD+0x08);
+ char t_brd_name[] = GDP_MB_EE_NAME;
+ int count=0;
+
+ /* scan to check if all the characters match */
+ /* Move ahead to name location */
+ count = sizeof(t_brd_name) -2;
+ while ((m_brd_name[count] == t_brd_name[count]) && count) {
+ count--;
+ }
+ /* Match?? */
+ if (!count) {
+ /* GDP!! */
+ return BOARD_GDP_2430_T2;
+ }
+ else {
+ return BOARD_SDP_2430_T2;
+ }
+ }
+ else return BOARD_SDP_2430_T2;
+}
+
+/******************************************************************
+ * get_sysboot_value() - get init word settings (dip switch on h4)
+ ******************************************************************/
+inline u32 get_sysboot_value(void)
+{
+ return (0x00000FFF & __raw_readl(CONTROL_STATUS));
+}
+
+/***************************************************************************
+ * get_gpmc0_base() - Return current address hardware will be
+ * fetching from. The below effectively gives what is correct, its a bit
+ * mis-leading compared to the TRM. For the most general case the mask
+ * needs to be also taken into account this does work in practice.
+ * - for u-boot we currently map:
+ * -- 0 to nothing,
+ * -- 4 to flash
+ * -- 8 to enent
+ * -- c to wifi
+ ****************************************************************************/
+u32 get_gpmc0_base(void)
+{
+ u32 b;
+
+ b = __raw_readl(GPMC_CONFIG_CS0 + GPMC_CONFIG7);
+ b &= 0x1F; /* keep base [5:0] */
+ b = b << 24; /* ret 0x0b000000 */
+ return (b);
+}
+
+/*******************************************************************
+ * get_gpmc0_width() - See if bus is in x8 or x16 (mainly for nand)
+ *******************************************************************/
+u32 get_gpmc0_width(void)
+{
+ return (WIDTH_16BIT);
+}
+
+/*********************************************************************
+ * wait_on_value() - common routine to allow waiting for changes in
+ * volatile regs.
+ *********************************************************************/
+u32 wait_on_value(u32 read_bit_mask, u32 match_value, u32 read_addr, u32 bound)
+{
+ u32 i = 0, val;
+ do {
+ ++i;
+ val = __raw_readl(read_addr) & read_bit_mask;
+ if (val == match_value)
+ return (1);
+ if (i == bound)
+ return (0);
+ } while (1);
+}
+
+/*************************************************************************
+ * get_board_rev() - setup to pass kernel board revision information
+ * returns:(bit[0-3] sub version, higher bit[7-4] is higher version)
+ * 0x00 = old H4 SDP
+ * 0x01 = 0.1. wakeup
+ * 0x10 = 1.0. Adds OneNAND, Sibley NOR, new camera
+ * 0x11 = 1.1. Adds T2
+ * 0x20 = 2.0. ES2.0 Silicon
+ * TODO: Figure a way out to differentiate b/w various board versions
+ *************************************************************************/
+u32 get_board_rev(void)
+{
+ /* Currently reading EEPROM reg to get UI board version and try it out */
+ volatile char *ui_brd_name = (char *)EEPROM_UI_BRD;
+ char enhanced_ui_brd_name[] = ENHANCED_UI_EE_NAME;
+ int count = 0;
+ if (!check_eeprom_avail(EEPROM_UI_BRD)) {
+ /* timed out OR fpga rev not found!! */
+ /* Assume 1.0 */
+ return 0x01;
+ }
+ /* Move ahead to name location */
+ ui_brd_name += 0x08;
+ count = sizeof(enhanced_ui_brd_name) - 2;
+ while ((enhanced_ui_brd_name[count] == ui_brd_name[count]) && count) {
+ count--;
+ }
+ /* Match?? */
+ if (!count) {
+ /* Enhanced UI board.. SDP1.1 */
+ return 0x11;
+ }
+ /* Legacy UI - hope they are all 1.0 boards.. */
+ return (0x10);
+}
+
+/*********************************************************************
+ * display_board_info() - print banner with board info.
+ *********************************************************************/
+void display_board_info(u32 btype)
+{
+ char *bootmode[] = {
+ "ONND",
+ "SIB1",
+ "SIB0",
+ "NAND",
+ "SIB1",
+ "SIB0",
+ "NOR",
+ "NOR",
+ };
+ u32 brev = get_board_rev();
+ char cpu_2430s[] = "2430C";
+ char db_ver[] = "0.0"; /* board type */
+ char mem_sdr[] = "mSDR"; /* memory type */
+ char mem_ddr[] = "mDDR";
+ char t_tst[] = "TST"; /* security level */
+ char t_emu[] = "EMU";
+ char t_hs[] = "HS";
+ char t_gp[] = "GP";
+ char unk[] = "?";
+ char t_sdp[] = "2430SDP";
+ char t_gdp[] = "2430GDP";
+#ifdef CONFIG_LED_INFO
+ char led_string[CONFIG_LED_LEN] = { 0 };
+#endif
+
+#if defined(PRCM_CONFIG_2)
+ char prcm[] = "#2";
+#elif defined(PRCM_CONFIG_3)
+ char prcm[] = "#3";
+#elif defined(PRCM_CONFIG_5A)
+ char prcm[] = "#5A";
+#elif defined(PRCM_CONFIG_5B)
+ char prcm[] = "#5B"
+#endif
+ char *cpu_s, *db_s, *mem_s, *sec_s, *sdp;
+ u32 cpu, rev, sec;
+
+ rev = get_cpu_rev();
+ cpu = get_cpu_type();
+ sec = get_device_type();
+
+ if (is_mem_sdr())
+ mem_s = mem_sdr;
+ else
+ mem_s = mem_ddr;
+
+ cpu_s = cpu_2430s;
+
+ db_s = db_ver;
+ db_s[0] += (brev >> 4) & 0xF;
+ db_s[2] += brev & 0xF;
+
+ switch (sec) {
+ case TST_DEVICE:
+ sec_s = t_tst;
+ break;
+ case EMU_DEVICE:
+ sec_s = t_emu;
+ break;
+ case HS_DEVICE:
+ sec_s = t_hs;
+ break;
+ case GP_DEVICE:
+ sec_s = t_gp;
+ break;
+ default:
+ sec_s = unk;
+ }
+
+ if (get_sdp_type() == BOARD_GDP_2430_T2) {
+ sdp=t_gdp;
+ } else {
+ sdp=t_sdp;
+ }
+ printf("OMAP%s-%s revision %d, PRCM %s\n", cpu_s, sec_s, rev, prcm);
+ printf("TI %s %s Version + %s (Boot %s)\n",sdp, db_s,
+ mem_s, bootmode[get_gpmc0_type()]);
+#ifdef CONFIG_LED_INFO
+ /* Format: 0123456789ABCDEF
+ * 2430C GP#5A NAND
+ */
+ sprintf(led_string, "%5s%3s%3s %4s", cpu_s, sec_s, prcm,
+ bootmode[get_gpmc0_type()]);
+ /* reuse sec */
+ for (sec = 0; sec < CONFIG_LED_LEN; sec += 2) {
+ /* invert byte loc */
+ u16 val = led_string[sec] << 8;
+ val |= led_string[sec + 1];
+ __raw_writew(val, LED_REGISTER + sec);
+ }
+#endif
+
+}
+
+/********************************************************
+ * get_base(); get upper addr of current execution
+ *******************************************************/
+u32 get_base(void)
+{
+ u32 val;
+ __asm__ __volatile__("mov %0, pc \n":"=r"(val)::"memory");
+ val &= 0xF0000000;
+ val >>= 28;
+ return (val);
+}
+
+/********************************************************
+ * running_in_flash() - tell if currently running in
+ * flash.
+ *******************************************************/
+u32 running_in_flash(void)
+{
+ if (get_base() < 4)
+ return (1); /* in flash */
+ return (0); /* running in SRAM or SDRAM */
+}
+
+/********************************************************
+ * running_in_sram() - tell if currently running in
+ * sram.
+ *******************************************************/
+u32 running_in_sram(void)
+{
+ if (get_base() == 4)
+ return (1); /* in SRAM */
+ return (0); /* running in FLASH or SDRAM */
+}
+
+/********************************************************
+ * running_in_sdram() - tell if currently running in
+ * flash.
+ *******************************************************/
+u32 running_in_sdram(void)
+{
+ if (get_base() > 4)
+ return (1); /* in sdram */
+ return (0); /* running in SRAM or FLASH */
+}
+
+/*************************************************************
+ * running_from_internal_boot() - am I boot through mask rom.
+ *************************************************************/
+u32 running_from_internal_boot(void)
+{
+ u32 v;
+
+ v = get_sysboot_value() & (BIT2 | BIT1 | BIT0);
+ /* external boot settings bit1 == bit2 */
+ if (((v & BIT1) && (v & BIT2)) || (!(v & BIT1) && !(v & BIT2)))
+ v = 0;
+ else /* all other defined combos are internal */
+ v = 1;
+ return v;
+}
+
+/*************************************************************
+ * get_device_type(): tell if GP/HS/EMU/TST
+ *************************************************************/
+u32 get_device_type(void)
+{
+ int mode;
+ mode = __raw_readl(CONTROL_STATUS) & (DEVICE_MASK);
+ return (mode >>= 8);
+}
diff --git a/board/omap2430sdp/u-boot.lds b/board/omap2430sdp/u-boot.lds
new file mode 100644
index 0000000000..724c1dd48a
--- /dev/null
+++ b/board/omap2430sdp/u-boot.lds
@@ -0,0 +1,58 @@
+/*
+ * January 2004 - Changed to support H4 device
+ * Copyright (c) 2004 Texas Instruments
+ *
+ * (C) Copyright 2002
+ * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+ENTRY(_start)
+SECTIONS
+{
+ . = 0x00000000;
+
+ . = ALIGN(4);
+ .text :
+ {
+ cpu/arm1136/start.o (.text)
+ *(.text)
+ }
+
+ . = ALIGN(4);
+ .rodata : { *(.rodata) }
+
+ . = ALIGN(4);
+ .data : { *(.data) }
+
+ . = ALIGN(4);
+ .got : { *(.got) }
+
+ __u_boot_cmd_start = .;
+ .u_boot_cmd : { *(.u_boot_cmd) }
+ __u_boot_cmd_end = .;
+
+ . = ALIGN(4);
+ __bss_start = .;
+ .bss : { *(.bss) }
+ _end = .;
+}
diff --git a/board/omap3430labrador/Makefile b/board/omap3430labrador/Makefile
new file mode 100644
index 0000000000..361c9e94b0
--- /dev/null
+++ b/board/omap3430labrador/Makefile
@@ -0,0 +1,47 @@
+#
+# (C) Copyright 2000, 2001, 2002
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = lib$(BOARD).a
+
+OBJS := omap3430sdp.o mem.o clock.o syslib.o sys_info.o nand.o
+SOBJS := lowlevel_init.o
+
+$(LIB): $(OBJS) $(SOBJS)
+ $(AR) crv $@ $^
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
+ $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+
+-include .depend
+
+#########################################################################
diff --git a/board/omap3430labrador/clock.c b/board/omap3430labrador/clock.c
new file mode 100644
index 0000000000..e919f5fd71
--- /dev/null
+++ b/board/omap3430labrador/clock.c
@@ -0,0 +1,354 @@
+/*
+ * (C) Copyright 2006
+ * Texas Instruments, <www.ti.com>
+ * Richard Woodruff <r-woodruff2@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/arch/cpu.h>
+#include <asm/io.h>
+#include <asm/arch/bits.h>
+#include <asm/arch/clocks.h>
+#include <asm/arch/mem.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/arch/sys_info.h>
+#include <environment.h>
+#include <command.h>
+
+/* Used to index into DPLL parameter tables */
+struct dpll_param {
+ unsigned int m;
+ unsigned int n;
+ unsigned int fsel;
+ unsigned int m2;
+};
+
+#define MAX_SIL_INDEX 3
+typedef struct dpll_param dpll_param;
+
+/* Following functions are exported from lowlevel_init.S */
+
+extern dpll_param * get_mpu_dpll_param();
+extern dpll_param * get_iva_dpll_param();
+extern dpll_param * get_core_dpll_param();
+extern dpll_param * get_per_dpll_param();
+
+/*************************************************************
+ * get_sys_clk_speed - determine reference oscillator speed
+ * based on known 32kHz clock and gptimer.
+ *************************************************************/
+u32 get_osc_clk_speed(void)
+{
+ u32 start, cstart, cend, cdiff, val;
+
+ val = __raw_readl(PRM_CLKSRC_CTRL);
+ /* If SYS_CLK is being divided by 2, remove for now */
+ val = (val & (~BIT7)) | BIT6;
+ __raw_writel(val, PRM_CLKSRC_CTRL);
+
+ /* enable timer2 */
+ val = __raw_readl(CM_CLKSEL_WKUP) | BIT0;
+ __raw_writel(val, CM_CLKSEL_WKUP); /* select sys_clk for GPT1 */
+
+ /* Enable I and F Clocks for GPT1 */
+ val = __raw_readl(CM_ICLKEN_WKUP) | BIT0 | BIT2;
+ __raw_writel(val, CM_ICLKEN_WKUP);
+ val = __raw_readl(CM_FCLKEN_WKUP) | BIT0;
+ __raw_writel(val, CM_FCLKEN_WKUP);
+
+ __raw_writel(0, OMAP34XX_GPT1 + TLDR); /* start counting at 0 */
+ __raw_writel(GPT_EN, OMAP34XX_GPT1 + TCLR); /* enable clock */
+ /* enable 32kHz source *//* enabled out of reset */
+ /* determine sys_clk via gauging */
+
+ start = 20 + __raw_readl(S32K_CR); /* start time in 20 cycles */
+ while (__raw_readl(S32K_CR) < start); /* dead loop till start time */
+ cstart = __raw_readl(OMAP34XX_GPT1 + TCRR); /* get start sys_clk count */
+ while (__raw_readl(S32K_CR) < (start + 20)); /* wait for 40 cycles */
+ cend = __raw_readl(OMAP34XX_GPT1 + TCRR); /* get end sys_clk count */
+ cdiff = cend - cstart; /* get elapsed ticks */
+
+ /* based on number of ticks assign speed */
+ if (cdiff > 19000)
+ return (S38_4M);
+ else if (cdiff > 15200)
+ return (S26M);
+ else if (cdiff > 13000)
+ return (S24M);
+ else if (cdiff > 9000)
+ return (S19_2M);
+ else if (cdiff > 7600)
+ return (S13M);
+ else
+ return (S12M);
+}
+
+/******************************************************************************
+ * get_sys_clkin_sel() - returns the sys_clkin_sel field value based on
+ * -- input oscillator clock frequency.
+ *
+ *****************************************************************************/
+void get_sys_clkin_sel(u32 osc_clk, u32 *sys_clkin_sel)
+{
+ if(osc_clk == S38_4M)
+ *sys_clkin_sel= 4;
+ else if(osc_clk == S26M)
+ *sys_clkin_sel = 3;
+ else if(osc_clk == S19_2M)
+ *sys_clkin_sel = 2;
+ else if(osc_clk == S13M)
+ *sys_clkin_sel = 1;
+ else if(osc_clk == S12M)
+ *sys_clkin_sel = 0;
+}
+
+/******************************************************************************
+ * prcm_init() - inits clocks for PRCM as defined in clocks.h
+ * -- called from SRAM, or Flash (using temp SRAM stack).
+ *****************************************************************************/
+void prcm_init(void)
+{
+ void (*f_lock_pll) (u32, u32, u32, u32);
+ int xip_safe, p0, p1, p2, p3;
+ u32 osc_clk=0, sys_clkin_sel;
+ extern void *_end_vect, *_start;
+ u32 clk_index, sil_index;
+ dpll_param *dpll_param_p;
+
+ f_lock_pll =
+ (void *)((u32) & _end_vect - (u32) & _start + SRAM_VECT_CODE);
+
+ xip_safe = running_in_sram();
+#ifdef CONFIG_3430VIRTIO
+ xip_safe = 1;
+#endif
+ /* Gauge the input clock speed and find out the sys_clkin_sel
+ * value corresponding to the input clock.
+ */
+ osc_clk = get_osc_clk_speed();
+ get_sys_clkin_sel(osc_clk, &sys_clkin_sel);
+
+ sr32(PRM_CLKSEL, 0, 3, sys_clkin_sel); /* set input crystal speed */
+
+ /* If the input clock is greater than 19.2M always divide/2 */
+ if(sys_clkin_sel > 2) {
+ sr32(PRM_CLKSRC_CTRL, 6, 2, 2);/* input clock divider */
+ clk_index = sys_clkin_sel/2;
+ } else {
+ sr32(PRM_CLKSRC_CTRL, 6, 2, 1);/* input clock divider */
+ clk_index = sys_clkin_sel;
+ }
+
+ sr32(PRM_CLKSRC_CTRL, 0, 2, 0);/* Bypass mode: T2 inputs a square clock */
+
+ /* The DPLL tables are defined according to sysclk value and
+ * silicon revision. The clk_index value will be used to get
+ * the values for that input sysclk from the DPLL param table
+ * and sil_index will get the values for that SysClk for the
+ * appropriate silicon rev.
+ */
+ if(cpu_is_3410())
+ sil_index = 2;
+ else {
+ if(get_cpu_rev() == CPU_3430_ES1)
+ sil_index = 0;
+ else if(get_cpu_rev() == CPU_3430_ES2)
+ sil_index = 1;
+ }
+ /* Unlock MPU DPLL (slows things down, and needed later) */
+ sr32(CM_CLKEN_PLL_MPU, 0, 3, PLL_LOW_POWER_BYPASS);
+ wait_on_value(BIT0, 0, CM_IDLEST_PLL_MPU, LDELAY);
+
+ /* Getting the base address of Core DPLL param table*/
+ dpll_param_p = (dpll_param *)get_core_dpll_param();
+ /* Moving it to the right sysclk and ES rev base */
+ dpll_param_p = dpll_param_p + MAX_SIL_INDEX*clk_index + sil_index;
+ if(xip_safe){
+ /* CORE DPLL */
+ /* sr32(CM_CLKSEL2_EMU) set override to work when asleep */
+ sr32(CM_CLKEN_PLL, 0, 3, PLL_FAST_RELOCK_BYPASS);
+ wait_on_value(BIT0, 0, CM_IDLEST_CKGEN, LDELAY);
+ /* For 3430 ES1.0 Errata 1.50, default value directly doesnt
+ work. write another value and then default value. */
+ sr32(CM_CLKSEL1_EMU, 16, 5, CORE_M3X2 + 1); /* m3x2 */
+ sr32(CM_CLKSEL1_EMU, 16, 5, CORE_M3X2); /* m3x2 */
+ sr32(CM_CLKSEL1_PLL, 27, 2, dpll_param_p->m2); /* Set M2 */
+ sr32(CM_CLKSEL1_PLL, 16, 11, dpll_param_p->m); /* Set M */
+ sr32(CM_CLKSEL1_PLL, 8, 7, dpll_param_p->n); /* Set N */
+ sr32(CM_CLKSEL1_PLL, 6, 1, 0); /* 96M Src */
+ sr32(CM_CLKSEL_CORE, 8, 4, CORE_SSI_DIV); /* ssi */
+ sr32(CM_CLKSEL_CORE, 4, 2, CORE_FUSB_DIV); /* fsusb ES1 only */
+ sr32(CM_CLKSEL_CORE, 2, 2, CORE_L4_DIV); /* l4 */
+ sr32(CM_CLKSEL_CORE, 0, 2, CORE_L3_DIV); /* l3 */
+ sr32(CM_CLKSEL_GFX, 0, 3, GFX_DIV); /* gfx */
+ sr32(CM_CLKSEL_WKUP, 1, 2, WKUP_RSM); /* reset mgr */
+ sr32(CM_CLKEN_PLL, 4, 4, dpll_param_p->fsel); /* FREQSEL */
+ sr32(CM_CLKEN_PLL, 0, 3, PLL_LOCK); /* lock mode */
+ wait_on_value(BIT0, 1, CM_IDLEST_CKGEN, LDELAY);
+ } else if(running_in_flash()){
+ /* if running from flash, jump to small relocated code area in SRAM.*/
+ p0 = __raw_readl(CM_CLKEN_PLL);
+ sr32((u32)&p0, 0, 3, PLL_FAST_RELOCK_BYPASS);
+ sr32((u32)&p0, 4, 4, dpll_param_p->fsel); /* FREQSEL */
+
+ p1 = __raw_readl(CM_CLKSEL1_PLL);
+ sr32((u32)&p1, 27, 2, dpll_param_p->m2); /* Set M2 */
+ sr32((u32)&p1, 16, 11, dpll_param_p->m); /* Set M */
+ sr32((u32)&p1, 8, 7, dpll_param_p->n); /* Set N */
+ sr32((u32)&p1, 6, 1, 0); /* set source for 96M */
+ p2 = __raw_readl(CM_CLKSEL_CORE);
+ sr32((u32)&p2, 8, 4, CORE_SSI_DIV); /* ssi */
+ sr32((u32)&p2, 4, 2, CORE_FUSB_DIV); /* fsusb ES1 only*/
+ sr32((u32)&p2, 2, 2, CORE_L4_DIV); /* l4 */
+ sr32((u32)&p2, 0, 2, CORE_L3_DIV); /* l3 */
+
+ p3 = CM_IDLEST_CKGEN;
+
+ (*f_lock_pll) (p0, p1, p2, p3);
+ }
+
+ /* PER DPLL */
+ sr32(CM_CLKEN_PLL, 16, 3, PLL_STOP);
+ wait_on_value(BIT1, 0, CM_IDLEST_CKGEN, LDELAY);
+
+ /* Getting the base address to PER DPLL param table*/
+ /* Set N */
+ dpll_param_p = (dpll_param *)get_per_dpll_param();
+ /* Moving it to the right sysclk base */
+ dpll_param_p = dpll_param_p + clk_index;
+ /* Errata 1.50 Workaround for 3430 ES1.0 only */
+ /* If using default divisors, write default divisor + 1
+ and then the actual divisor value */
+ /* Need to change it to silicon and revisino check */
+ if(1) {
+ sr32(CM_CLKSEL1_EMU, 24, 5, PER_M6X2 + 1); /* set M6 */
+ sr32(CM_CLKSEL1_EMU, 24, 5, PER_M6X2); /* set M6 */
+ sr32(CM_CLKSEL_CAM, 0, 5, PER_M5X2 + 1); /* set M5 */
+ sr32(CM_CLKSEL_CAM, 0, 5, PER_M5X2); /* set M5 */
+ sr32(CM_CLKSEL_DSS, 0, 5, PER_M4X2 + 1); /* set M4 */
+ sr32(CM_CLKSEL_DSS, 0, 5, PER_M4X2); /* set M4 */
+ sr32(CM_CLKSEL_DSS, 8, 5, PER_M3X2 + 1); /* set M3 */
+ sr32(CM_CLKSEL_DSS, 8, 5, PER_M3X2); /* set M3 */
+ sr32(CM_CLKSEL3_PLL, 0, 5, dpll_param_p->m2 + 1);/* set M2 */
+ sr32(CM_CLKSEL3_PLL, 0, 5, dpll_param_p->m2); /* set M2 */
+ }
+ else {
+ sr32(CM_CLKSEL1_EMU, 24, 5, PER_M6X2); /* set M6 */
+ sr32(CM_CLKSEL_CAM, 0, 5, PER_M5X2); /* set M5 */
+ sr32(CM_CLKSEL_DSS, 0, 5, PER_M4X2); /* set M4 */
+ sr32(CM_CLKSEL_DSS, 8, 5, PER_M3X2); /* set M3 */
+ sr32(CM_CLKSEL3_PLL, 0, 5, dpll_param_p->m2); /* set M2 */
+ }
+ sr32(CM_CLKSEL2_PLL, 8, 11, dpll_param_p->m); /* set m */
+ sr32(CM_CLKSEL2_PLL, 0, 7, dpll_param_p->n); /* set n */
+ sr32(CM_CLKEN_PLL, 20, 4, dpll_param_p->fsel);/* FREQSEL */
+ sr32(CM_CLKEN_PLL, 16, 3, PLL_LOCK); /* lock mode */
+ wait_on_value(BIT1, 2, CM_IDLEST_CKGEN, LDELAY);
+
+ /* Getting the base address to MPU DPLL param table*/
+ dpll_param_p = (dpll_param *)get_mpu_dpll_param();
+ /* Moving it to the right sysclk and ES rev base */
+ dpll_param_p = dpll_param_p + MAX_SIL_INDEX*clk_index + sil_index;
+ /* MPU DPLL (unlocked already) */
+ sr32(CM_CLKSEL2_PLL_MPU, 0, 5, dpll_param_p->m2); /* Set M2 */
+ sr32(CM_CLKSEL1_PLL_MPU, 8, 11, dpll_param_p->m); /* Set M */
+ sr32(CM_CLKSEL1_PLL_MPU, 0, 7, dpll_param_p->n); /* Set N */
+ sr32(CM_CLKEN_PLL_MPU, 4, 4, dpll_param_p->fsel); /* FREQSEL */
+ sr32(CM_CLKEN_PLL_MPU, 0, 3, PLL_LOCK); /* lock mode */
+ wait_on_value(BIT0, 1, CM_IDLEST_PLL_MPU, LDELAY);
+
+ /* Getting the base address to IVA DPLL param table*/
+ dpll_param_p = (dpll_param *)get_iva_dpll_param();
+ /* Moving it to the right sysclk and ES rev base */
+ dpll_param_p = dpll_param_p + MAX_SIL_INDEX*clk_index + sil_index;
+ /* IVA DPLL (set to 12*20=240MHz) */
+ sr32(CM_CLKEN_PLL_IVA2, 0, 3, PLL_STOP);
+ wait_on_value(BIT0, 0, CM_IDLEST_PLL_IVA2, LDELAY);
+ sr32(CM_CLKSEL2_PLL_IVA2, 0, 5, dpll_param_p->m2); /* set M2 */
+ sr32(CM_CLKSEL1_PLL_IVA2, 8, 11, dpll_param_p->m); /* set M */
+ sr32(CM_CLKSEL1_PLL_IVA2, 0, 7, dpll_param_p->n); /* set N */
+ sr32(CM_CLKEN_PLL_IVA2, 4, 4, dpll_param_p->fsel); /* FREQSEL */
+ sr32(CM_CLKEN_PLL_IVA2, 0, 3, PLL_LOCK); /* lock mode */
+ wait_on_value(BIT0, 1, CM_IDLEST_PLL_IVA2, LDELAY);
+
+ /* Set up GPTimers to sys_clk source only */
+ sr32(CM_CLKSEL_PER, 0, 8, 0xff);
+ sr32(CM_CLKSEL_WKUP, 0, 1, 1);
+
+ sdelay(5000);
+}
+
+/*****************************************************************
+ * Routine: peripheral_enable
+ * Description: Enable the clks & power for perifs (GPT2, UART1,...)
+ ******************************************************************/
+void per_clocks_enable(void)
+{
+ /* Enable GP2 timer. */
+ sr32(CM_CLKSEL_PER, 0, 1, 0x1); /* GPT2 = sys clk */
+ sr32(CM_ICLKEN_PER, 3, 1, 0x1); /* ICKen GPT2 */
+ sr32(CM_FCLKEN_PER, 3, 1, 0x1); /* FCKen GPT2 */
+
+#ifdef CFG_NS16550
+////#ifdef CONFIG_SERIAL3
+ sr32(CM_FCLKEN_PER, 11, 1, 0x1);
+ sr32(CM_ICLKEN_PER, 11, 1, 0x1);
+////#else
+ /* Enable UART1 clocks */
+ sr32(CM_FCLKEN1_CORE, 13, 1, 0x1);
+ sr32(CM_ICLKEN1_CORE, 13, 1, 0x1);
+////#endif
+#endif
+
+#ifdef CONFIG_DRIVER_OMAP34XX_I2C
+ /* Turn on all 3 I2C clocks*/
+ sr32(CM_FCLKEN1_CORE, 15, 3, 0x7);
+ sr32(CM_ICLKEN1_CORE, 15, 3, 0x7); /* I2C1,2,3 = on */
+#endif
+ /* Enable the ICLK for 32K Sync Timer as its used in udelay */
+ sr32(CM_ICLKEN_WKUP,2, 1, 0x1);
+
+//#define CLOCKS_ALL_ON 1
+#ifdef CLOCKS_ALL_ON
+ #define FCK_IVA2_ON 0x00000001
+ #define FCK_CORE1_ON 0x03fffe29
+ #define ICK_CORE1_ON 0x3ffffffb
+ #define ICK_CORE2_ON 0x0000001f
+ #define FCK_WKUP_ON 0x000000e9
+ #define ICK_WKUP_ON 0x0000003f
+ #define FCK_DSS_ON 0x00000005 /* tv+dss1 (not dss2) */
+ #define ICK_DSS_ON 0x00000001
+ #define FCK_CAM_ON 0x00000001
+ #define ICK_CAM_ON 0x00000001
+ #define FCK_PER_ON 0x0003ffff
+ #define ICK_PER_ON 0x0003ffff
+ sr32(CM_FCLKEN_IVA2, 0, 32, FCK_IVA2_ON);
+ sr32(CM_FCLKEN1_CORE, 0, 32, FCK_CORE1_ON);
+ sr32(CM_ICLKEN1_CORE, 0, 32, ICK_CORE1_ON);
+ sr32(CM_ICLKEN2_CORE, 0, 32, ICK_CORE2_ON);
+ sr32(CM_FCLKEN_WKUP, 0, 32, FCK_WKUP_ON);
+ sr32(CM_ICLKEN_WKUP, 0, 32, ICK_WKUP_ON);
+ sr32(CM_FCLKEN_DSS, 0, 32, FCK_DSS_ON);
+ sr32(CM_ICLKEN_DSS, 0, 32, ICK_DSS_ON);
+ sr32(CM_FCLKEN_CAM, 0, 32, FCK_CAM_ON);
+ sr32(CM_ICLKEN_CAM, 0, 32, ICK_CAM_ON);
+ sr32(CM_FCLKEN_PER, 0, 32, FCK_PER_ON);
+ sr32(CM_ICLKEN_PER, 0, 32, ICK_PER_ON);
+#endif
+ sdelay(1000);
+}
diff --git a/board/omap3430labrador/config.mk b/board/omap3430labrador/config.mk
new file mode 100644
index 0000000000..03f071f247
--- /dev/null
+++ b/board/omap3430labrador/config.mk
@@ -0,0 +1,23 @@
+#
+# (C) Copyright 2006
+# Texas Instruments, <www.ti.com>
+#
+# SDP3430 board uses OMAP3430 (ARM-CortexA8) cpu
+# see http://www.ti.com/ for more information on Texas Instruments
+#
+# SDP3430 has 1 bank of 32MB or 64MB mDDR-SDRAM on CS0
+# SDP3430 has 1 bank of 32MB or 00MB mDDR-SDRAM on CS1
+# Physical Address:
+# 8000'0000 (bank0)
+# A000/0000 (bank1)
+# Linux-Kernel is expected to be at 8000'8000, entry 8000'8000
+# (mem base + reserved)
+
+# For use with external or internal boots.
+TEXT_BASE = 0x80e80000
+
+
+# Handy to get symbols to debug ROM version.
+#TEXT_BASE = 0x0
+#TEXT_BASE = 0x08000000
+#TEXT_BASE = 0x04000000
diff --git a/board/omap3430labrador/lowlevel_init.S b/board/omap3430labrador/lowlevel_init.S
new file mode 100644
index 0000000000..2fda1d9db8
--- /dev/null
+++ b/board/omap3430labrador/lowlevel_init.S
@@ -0,0 +1,358 @@
+/*
+ * Board specific setup info
+ *
+ * (C) Copyright 2004-2006
+ * Texas Instruments, <www.ti.com>
+ * Richard Woodruff <r-woodruff2@ti.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <config.h>
+#include <version.h>
+#include <asm/arch/cpu.h>
+#include <asm/arch/mem.h>
+#include <asm/arch/clocks.h>
+
+_TEXT_BASE:
+ .word TEXT_BASE /* sdram load addr from config.mk */
+
+#if !defined(CFG_NAND_BOOT) && !defined(CFG_NAND_BOOT)
+/**************************************************************************
+ * cpy_clk_code: relocates clock code into SRAM where its safer to execute
+ * R1 = SRAM destination address.
+ *************************************************************************/
+.global cpy_clk_code
+ cpy_clk_code:
+ /* Copy DPLL code into SRAM */
+ adr r0, go_to_speed /* get addr of clock setting code */
+ mov r2, #384 /* r2 size to copy (div by 32 bytes) */
+ mov r1, r1 /* r1 <- dest address (passed in) */
+ add r2, r2, r0 /* r2 <- source end address */
+next2:
+ ldmia r0!, {r3-r10} /* copy from source address [r0] */
+ stmia r1!, {r3-r10} /* copy to target address [r1] */
+ cmp r0, r2 /* until source end address [r2] */
+ bne next2
+ mov pc, lr /* back to caller */
+
+/* ****************************************************************************
+ * go_to_speed: -Moves to bypass, -Commits clock dividers, -puts dpll at speed
+ * -executed from SRAM.
+ * R0 = CM_CLKEN_PLL-bypass value
+ * R1 = CM_CLKSEL1_PLL-m, n, and divider values
+ * R2 = CM_CLKSEL_CORE-divider values
+ * R3 = CM_IDLEST_CKGEN - addr dpll lock wait
+ *
+ * Note: If core unlocks/relocks and SDRAM is running fast already it gets
+ * confused. A reset of the controller gets it back. Taking away its
+ * L3 when its not in self refresh seems bad for it. Normally, this code
+ * runs from flash before SDR is init so that should be ok.
+ ******************************************************************************/
+.global go_to_speed
+ go_to_speed:
+ stmfd sp!, {r4-r6}
+
+ /* move into fast relock bypass */
+ ldr r4, pll_ctl_add
+ str r0, [r4]
+wait1:
+ ldr r5, [r3] /* get status */
+ and r5, r5, #0x1 /* isolate core status */
+ cmp r5, #0x1 /* still locked? */
+ beq wait1 /* if lock, loop */
+
+ /* set new dpll dividers _after_ in bypass */
+ ldr r5, pll_div_add1
+ str r1, [r5] /* set m, n, m2 */
+ ldr r5, pll_div_add2
+ str r2, [r5] /* set l3/l4/.. dividers*/
+ ldr r5, pll_div_add3 /* wkup */
+ ldr r2, pll_div_val3 /* rsm val */
+ str r2, [r5]
+ ldr r5, pll_div_add4 /* gfx */
+ ldr r2, pll_div_val4
+ str r2, [r5]
+ ldr r5, pll_div_add5 /* emu */
+ ldr r2, pll_div_val5
+ str r2, [r5]
+
+ /* now prepare GPMC (flash) for new dpll speed */
+ /* flash needs to be stable when we jump back to it */
+ ldr r5, flash_cfg3_addr
+ ldr r2, flash_cfg3_val
+ str r2, [r5]
+ ldr r5, flash_cfg4_addr
+ ldr r2, flash_cfg4_val
+ str r2, [r5]
+ ldr r5, flash_cfg5_addr
+ ldr r2, flash_cfg5_val
+ str r2, [r5]
+ ldr r5, flash_cfg1_addr
+ ldr r2, [r5]
+ orr r2, r2, #0x3 /* up gpmc divider */
+ str r2, [r5]
+
+ /* lock DPLL3 and wait a bit */
+ orr r0, r0, #0x7 /* set up for lock mode */
+ str r0, [r4] /* lock */
+ nop /* ARM slow at this point working at sys_clk */
+ nop
+ nop
+ nop
+wait2:
+ ldr r5, [r3] /* get status */
+ and r5, r5, #0x1 /* isolate core status */
+ cmp r5, #0x1 /* still locked? */
+ bne wait2 /* if lock, loop */
+ nop
+ nop
+ nop
+ nop
+ ldmfd sp!, {r4-r6}
+ mov pc, lr /* back to caller, locked */
+
+_go_to_speed: .word go_to_speed
+
+/* these constants need to be close for PIC code */
+/* The Nor has to be in the Flash Base CS0 for this condition to happen */
+flash_cfg1_addr:
+ .word (GPMC_CONFIG_CS0 + GPMC_CONFIG1)
+flash_cfg3_addr:
+ .word (GPMC_CONFIG_CS0 + GPMC_CONFIG3)
+flash_cfg3_val:
+ .word STNOR_GPMC_CONFIG3
+flash_cfg4_addr:
+ .word (GPMC_CONFIG_CS0 + GPMC_CONFIG4)
+flash_cfg4_val:
+ .word STNOR_GPMC_CONFIG4
+flash_cfg5_val:
+ .word STNOR_GPMC_CONFIG5
+flash_cfg5_addr:
+ .word (GPMC_CONFIG_CS0 + GPMC_CONFIG5)
+pll_ctl_add:
+ .word CM_CLKEN_PLL
+pll_div_add1:
+ .word CM_CLKSEL1_PLL
+pll_div_add2:
+ .word CM_CLKSEL_CORE
+pll_div_add3:
+ .word CM_CLKSEL_WKUP
+pll_div_val3:
+ .word (WKUP_RSM << 1)
+pll_div_add4:
+ .word CM_CLKSEL_GFX
+pll_div_val4:
+ .word (GFX_DIV << 0)
+pll_div_add5:
+ .word CM_CLKSEL1_EMU
+pll_div_val5:
+ .word CLSEL1_EMU_VAL
+
+#endif
+
+.globl lowlevel_init
+lowlevel_init:
+ ldr sp, SRAM_STACK
+ str ip, [sp] /* stash old link register */
+ mov ip, lr /* save link reg across call */
+ bl s_init /* go setup pll,mux,memory */
+ ldr ip, [sp] /* restore save ip */
+ mov lr, ip /* restore link reg */
+
+ /* back to arch calling code */
+ mov pc, lr
+
+ /* the literal pools origin */
+ .ltorg
+
+REG_CONTROL_STATUS:
+ .word CONTROL_STATUS
+SRAM_STACK:
+ .word LOW_LEVEL_SRAM_STACK
+
+/* DPLL(1-4) PARAM TABLES */
+/* Each of the tables has M, N, FREQSEL, M2 values defined for nominal
+ * OPP (1.2V). The fields are defined according to dpll_param struct(clock.c).
+ * The values are defined for all possible sysclk and for ES1 and ES2.
+ */
+
+mpu_dpll_param:
+/* 12MHz */
+/* ES1 */
+.word 0x0FE,0x07,0x05,0x01
+/* ES2 */
+.word 0x0FA,0x05,0x07,0x01
+/* 3410 */
+.word 0x085,0x05,0x07,0x01
+
+/* 13MHz */
+/* ES1 */
+.word 0x17D,0x0C,0x03,0x01
+/* ES2 */
+.word 0x1F4,0x0C,0x03,0x01
+/* 3410 */
+.word 0x10A,0x0C,0x03,0x01
+
+/* 19.2MHz */
+/* ES1 */
+.word 0x179,0x12,0x04,0x01
+/* ES2 */
+.word 0x271,0x17,0x03,0x01
+/* 3410 */
+.word 0x14C,0x17,0x03,0x01
+
+/* 26MHz */
+/* ES1 */
+.word 0x17D,0x19,0x03,0x01
+/* ES2 */
+.word 0x0FA,0x0C,0x07,0x01
+/* 3410 */
+.word 0x085,0x0C,0x07,0x01
+
+/* 38.4MHz */
+/* ES1 */
+.word 0x1FA,0x32,0x03,0x01
+/* ES2 */
+.word 0x271,0x2F,0x03,0x01
+/* 3410 */
+.word 0x14C,0x2F,0x03,0x01
+
+
+.globl get_mpu_dpll_param
+get_mpu_dpll_param:
+ adr r0, mpu_dpll_param
+ mov pc, lr
+
+iva_dpll_param:
+/* 12MHz */
+/* ES1 */
+.word 0x07D,0x05,0x07,0x01
+/* ES2 */
+.word 0x0B4,0x05,0x07,0x01
+/* 3410 */
+.word 0x085,0x05,0x07,0x01
+
+/* 13MHz */
+/* ES1 */
+.word 0x0FA,0x0C,0x03,0x01
+/* ES2 */
+.word 0x168,0x0C,0x03,0x01
+/* 3410 */
+.word 0x10A,0x0C,0x03,0x01
+
+/* 19.2MHz */
+/* ES1 */
+.word 0x082,0x09,0x07,0x01
+/* ES2 */
+.word 0x0E1,0x0B,0x06,0x01
+/* 3410 */
+.word 0x14C,0x17,0x03,0x01
+
+/* 26MHz */
+/* ES1 */
+.word 0x07D,0x0C,0x07,0x01
+/* ES2 */
+.word 0x0B4,0x0C,0x07,0x01
+/* 3410 */
+.word 0x085,0x0C,0x07,0x01
+
+/* 38.4MHz */
+/* ES1 */
+.word 0x13F,0x30,0x03,0x01
+/* ES2 */
+.word 0x0E1,0x17,0x06,0x01
+/* 3410 */
+.word 0x14C,0x2F,0x03,0x01
+
+
+.globl get_iva_dpll_param
+get_iva_dpll_param:
+ adr r0, iva_dpll_param
+ mov pc, lr
+
+/* Core DPLL targets for L3 at 166 & L133 */
+core_dpll_param:
+/* 12MHz */
+/* ES1 */
+.word M_12_ES1,M_12_ES1,FSL_12_ES1,M2_12_ES1
+/* ES2 */
+.word M_12,N_12,FSEL_12,M2_12
+/* 3410 */
+.word M_12,N_12,FSEL_12,M2_12
+
+/* 13MHz */
+/* ES1 */
+.word M_13_ES1,N_13_ES1,FSL_13_ES1,M2_13_ES1
+/* ES2 */
+.word M_13,N_13,FSEL_13,M2_13
+/* 3410 */
+.word M_13,N_13,FSEL_13,M2_13
+
+/* 19.2MHz */
+/* ES1 */
+.word M_19p2_ES1,N_19p2_ES1,FSL_19p2_ES1,M2_19p2_ES1
+/* ES2 */
+.word M_19p2,N_19p2,FSEL_19p2,M2_19p2
+/* 3410 */
+.word M_19p2,N_19p2,FSEL_19p2,M2_19p2
+
+/* 26MHz */
+/* ES1 */
+.word M_26_ES1,N_26_ES1,FSL_26_ES1,M2_26_ES1
+/* ES2 */
+.word M_26,N_26,FSEL_26,M2_26
+/* 3410 */
+.word M_26,N_26,FSEL_26,M2_26
+
+/* 38.4MHz */
+/* ES1 */
+.word M_38p4_ES1,N_38p4_ES1,FSL_38p4_ES1,M2_38p4_ES1
+/* ES2 */
+.word M_38p4,N_38p4,FSEL_38p4,M2_38p4
+/* 3410 */
+.word M_38p4,N_38p4,FSEL_38p4,M2_38p4
+
+.globl get_core_dpll_param
+get_core_dpll_param:
+ adr r0, core_dpll_param
+ mov pc, lr
+
+/* PER DPLL values are same for both ES1 and ES2 */
+per_dpll_param:
+/* 12MHz */
+.word 0xD8,0x05,0x07,0x09
+
+/* 13MHz */
+.word 0x1B0,0x0C,0x03,0x09
+
+/* 19.2MHz */
+.word 0xE1,0x09,0x07,0x09
+
+/* 26MHz */
+.word 0xD8,0x0C,0x07,0x09
+
+/* 38.4MHz */
+.word 0xE1,0x13,0x07,0x09
+
+.globl get_per_dpll_param
+get_per_dpll_param:
+ adr r0, per_dpll_param
+ mov pc, lr
+
diff --git a/board/omap3430labrador/mem.c b/board/omap3430labrador/mem.c
new file mode 100644
index 0000000000..b0f4125dc4
--- /dev/null
+++ b/board/omap3430labrador/mem.c
@@ -0,0 +1,414 @@
+/*
+ * (C) Copyright 2004-2006
+ * Texas Instruments, <www.ti.com>
+ * Richard Woodruff <r-woodruff2@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/arch/cpu.h>
+#include <asm/io.h>
+#include <asm/arch/bits.h>
+#include <asm/arch/clocks.h>
+#include <asm/arch/mem.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/arch/sys_info.h>
+#include <environment.h>
+#include <command.h>
+
+/****** DATA STRUCTURES ************/
+
+/* Only One NAND allowed on board at a time.
+ * The GPMC CS Base for the same
+ */
+unsigned int nand_cs_base = 0;
+unsigned int onenand_cs_base = 0;
+unsigned int boot_flash_base = 0;
+unsigned int boot_flash_off = 0;
+unsigned int boot_flash_sec = 0;
+volatile unsigned int boot_flash_env_addr = 0;
+/* help common/env_flash.c */
+#ifdef ENV_IS_VARIABLE
+
+ulong NOR_FLASH_BANKS_LIST[CFG_MAX_FLASH_BANKS];
+
+int NOR_MAX_FLASH_BANKS = 0 ; /* max number of flash banks */
+
+uchar(*boot_env_get_char_spec) (int index);
+int (*boot_env_init) (void);
+int (*boot_saveenv) (void);
+void (*boot_env_relocate_spec) (void);
+
+/* StrataNor */
+extern uchar flash_env_get_char_spec(int index);
+extern int flash_env_init(void);
+extern int flash_saveenv(void);
+extern void flash_env_relocate_spec(void);
+extern char *flash_env_name_spec;
+
+/* 16 bit NAND */
+extern uchar nand_env_get_char_spec(int index);
+extern int nand_env_init(void);
+extern int nand_saveenv(void);
+extern void nand_env_relocate_spec(void);
+extern char *nand_env_name_spec;
+
+/* Global fellows */
+#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+u8 is_nand = 0;
+#endif
+
+#if (CONFIG_COMMANDS & CFG_CMD_FLASH)
+u8 is_flash = 0;
+#endif
+
+char *env_name_spec = 0;
+/* update these elsewhere */
+env_t *env_ptr = 0;
+
+#if ((CONFIG_COMMANDS&(CFG_CMD_ENV|CFG_CMD_FLASH)) == (CFG_CMD_ENV|CFG_CMD_FLASH))
+extern env_t *flash_addr;
+#endif
+
+#endif /* ENV_IS_VARIABLE */
+
+static u32 gpmc_enet[GPMC_MAX_REG] = {
+ LAB_ENET_GPMC_CONFIG1,
+ LAB_ENET_GPMC_CONFIG2,
+ LAB_ENET_GPMC_CONFIG3,
+ LAB_ENET_GPMC_CONFIG4,
+ LAB_ENET_GPMC_CONFIG5,
+ LAB_ENET_GPMC_CONFIG6, 0
+};
+
+static u32 gpmc_stnor[GPMC_MAX_REG] = {
+ STNOR_GPMC_CONFIG1,
+ STNOR_GPMC_CONFIG2,
+ STNOR_GPMC_CONFIG3,
+ STNOR_GPMC_CONFIG4,
+ STNOR_GPMC_CONFIG5,
+ STNOR_GPMC_CONFIG6, 0
+};
+
+static u32 gpmc_m_nand[GPMC_MAX_REG] = {
+ M_NAND_GPMC_CONFIG1,
+ M_NAND_GPMC_CONFIG2,
+ M_NAND_GPMC_CONFIG3,
+ M_NAND_GPMC_CONFIG4,
+ M_NAND_GPMC_CONFIG5,
+ M_NAND_GPMC_CONFIG6, 0
+};
+
+/********** Functions ****/
+
+/* ENV Functions */
+#ifdef ENV_IS_VARIABLE
+uchar env_get_char_spec(int index)
+{
+ if (!boot_env_get_char_spec) {
+ puts("ERROR!! env_get_char_spec not available\n");
+ } else
+ return boot_env_get_char_spec(index);
+ return 0;
+}
+int env_init(void)
+{
+ if (!boot_env_init) {
+ puts("ERROR!! boot_env_init not available\n");
+ } else
+ return boot_env_init();
+ return -1;
+}
+int saveenv(void)
+{
+ if (!boot_saveenv) {
+ puts("ERROR!! boot_saveenv not available\n");
+ } else
+ return boot_saveenv();
+ return -1;
+}
+void env_relocate_spec(void)
+{
+ if (!boot_env_relocate_spec) {
+ puts("ERROR!! boot_env_relocate_spec not available\n");
+ } else
+ boot_env_relocate_spec();
+}
+#endif
+
+
+/**************************************************************************
+ * make_cs1_contiguous() - for es2 and above remap cs1 behind cs0 to allow
+ * command line mem=xyz use all memory with out discontinuous support
+ * compiled in. Could do it at the ATAG, but there really is two banks...
+ * Called as part of 2nd phase DDR init.
+ **************************************************************************/
+void make_cs1_contiguous(void)
+{
+ u32 size, a_add_low, a_add_high;
+
+ size = get_sdr_cs_size(SDRC_CS0_OSET);
+ size /= SZ_32M; /* find size to offset CS1 */
+ a_add_high = (size & 3) << 8; /* set up low field */
+ a_add_low = (size & 0x3C) >> 2; /* set up high field */
+ __raw_writel((a_add_high | a_add_low), SDRC_CS_CFG);
+
+}
+
+/********************************************************
+ * mem_ok() - test used to see if timings are correct
+ * for a part. Helps in guessing which part
+ * we are currently using.
+ *******************************************************/
+u32 mem_ok(void)
+{
+ u32 val1, val2, orig1, orig2, addr;
+ u32 pattern = 0x12345678;
+
+ addr = OMAP34XX_SDRC_CS0;
+
+ orig1 = __raw_readl(addr + 0x400); /* try to save original value */
+ orig2 = __raw_readl(addr);
+ __raw_writel(0x0, addr + 0x400); /* clear pos A */
+ __raw_writel(pattern, addr); /* pattern to pos B */
+ __raw_writel(0x0, addr + 4); /* remove pattern off the bus */
+ val1 = __raw_readl(addr + 0x400); /* get pos A value */
+ val2 = __raw_readl(addr); /* get val2 */
+
+ if ((val1 != 0) || (val2 != pattern)) /* see if pos A value changed */
+ return (0);
+ else {
+ /* restore original values and return pass */
+ __raw_writel(orig1, addr + 0x400);
+ __raw_writel(orig2, addr);
+ return (1);
+ }
+}
+
+/********************************************************
+ * sdrc_init() - init the sdrc chip selects CS0 and CS1
+ * - early init routines, called from flash or
+ * SRAM.
+ *******************************************************/
+void sdrc_init(void)
+{
+#define EARLY_INIT 1
+ do_sdrc_init(SDRC_CS0_OSET, EARLY_INIT); /* only init up first bank here */
+}
+
+/*************************************************************************
+ * do_sdrc_init(): initialize the SDRAM for use.
+ * -code sets up SDRAM basic SDRC timings for CS0
+ * -optimal settings can be placed here, or redone after i2c
+ * inspection of board info
+ *
+ * - code called ones in C-Stack only context for CS0 and a possible 2nd
+ * time depending on memory configuration from stack+global context
+ **************************************************************************/
+void do_sdrc_init(u32 offset, u32 early)
+{
+ u32 common = 0, cs0 = 0, pmask = 0, pass_type, mtype, mono = 0;
+
+ if (offset == SDRC_CS0_OSET)
+ cs0 = common = 1; /* int regs shared between both chip select */
+
+ pass_type = IP_DDR;
+
+ /* If this is a 2nd pass init of a CS1, make it contiguous with CS0 */
+ if (!early && (((mtype = get_mem_type()) == DDR_COMBO)
+ || (mtype == DDR_STACKED))) {
+ if (mtype == DDR_COMBO) {
+ pmask = BIT2; /* if shared CKE don't use */
+ pass_type = COMBO_DDR; /* CS1 config */
+ __raw_writel((__raw_readl(SDRC_POWER)) & ~pmask,
+ SDRC_POWER);
+ }
+ make_cs1_contiguous();
+ }
+
+next_mem_type:
+ if (common) { /* do a SDRC reset between types to clear regs */
+ __raw_writel(SOFTRESET, SDRC_SYSCONFIG); /* reset sdrc */
+ wait_on_value(BIT0, BIT0, SDRC_STATUS, 12000000); /* wait on reset */
+ __raw_writel(0, SDRC_SYSCONFIG); /* clear soft reset */
+ __raw_writel(SDP_SDRC_SHARING, SDRC_SHARING);
+ /* If its a 3430 ES1.0 silicon, configure WAKEUPPROC to 1 as
+ per Errata 1.22 */
+ /* Need to change the condition to silicon and rev check */
+ if(1)
+ __raw_writel((__raw_readl(SDRC_POWER)) | WAKEUPPROC
+ , SDRC_POWER);
+#ifdef POWER_SAVE
+ __raw_writel(__raw_readl(SMS_SYSCONFIG) | SMART_IDLE,
+ SMS_SYSCONFIG);
+ __raw_writel(SDP_SDRC_SHARING | SMART_IDLE, SDRC_SHARING);
+ __raw_writel((__raw_readl(SDRC_POWER) | BIT6), SDRC_POWER);
+#endif
+ }
+
+ /* set MDCFG_0 values */
+ if ((pass_type == IP_DDR) || (pass_type == STACKED)) {
+ __raw_writel(SDP_SDRC_MDCFG_0_DDR, SDRC_MCFG_0 + offset);
+ if (mono) /* Stacked with memory on CS1 only */
+ __raw_writel(SDP_SDRC_MDCFG_MONO_DDR, SDRC_MCFG_0 + offset);
+ } else if (pass_type == COMBO_DDR) { /* (combo-CS0/CS1) */
+ __raw_writel(SDP_COMBO_MDCFG_0_DDR, SDRC_MCFG_0 + offset);
+ } else if (pass_type == IP_SDR) { /* ip sdr-CS0 */
+ __raw_writel(SDP_SDRC_MDCFG_0_SDR, SDRC_MCFG_0 + offset);
+ }
+
+ /* Set ACTIM values */
+ if (cs0) {
+ __raw_writel(SDP_SDRC_ACTIM_CTRLA_0, SDRC_ACTIM_CTRLA_0);
+ __raw_writel(SDP_SDRC_ACTIM_CTRLB_0, SDRC_ACTIM_CTRLB_0);
+ } else {
+ __raw_writel(SDP_SDRC_ACTIM_CTRLA_0, SDRC_ACTIM_CTRLA_1);
+ __raw_writel(SDP_SDRC_ACTIM_CTRLB_0, SDRC_ACTIM_CTRLB_1);
+ }
+ __raw_writel(SDP_SDRC_RFR_CTRL, SDRC_RFR_CTRL + offset);
+
+ /* init sequence for mDDR/mSDR using manual commands (DDR is different) */
+ __raw_writel(CMD_NOP, SDRC_MANUAL_0 + offset);
+ sdelay(5000); /* supposed to be 100us per design spec for mddr/msdr */
+ __raw_writel(CMD_PRECHARGE, SDRC_MANUAL_0 + offset);
+ __raw_writel(CMD_AUTOREFRESH, SDRC_MANUAL_0 + offset);
+ __raw_writel(CMD_AUTOREFRESH, SDRC_MANUAL_0 + offset);
+
+ /* Set MR0 values */
+ if (pass_type == IP_SDR)
+ __raw_writel(SDP_SDRC_MR_0_SDR, SDRC_MR_0 + offset);
+ else
+ __raw_writel(SDP_SDRC_MR_0_DDR, SDRC_MR_0 + offset);
+
+ /* setup 343x DLL values (DDR only) */
+ if (common && (pass_type != IP_SDR)) {
+ __raw_writel(SDP_SDRC_DLLAB_CTRL, SDRC_DLLA_CTRL);
+ sdelay(0x2000); /* give time to lock, at least 1000 L3 */
+ }
+ sdelay(0x1000);
+
+ if (mono) /* Used if Stacked memory is on CS1 only */
+ make_cs1_contiguous(); /* make CS1 appear at CS0 */
+
+ if (mem_ok())
+ return; /* STACKED, other configured type */
+ ++pass_type; /* IPDDR->COMBODDR->IPSDR for CS0 */
+ goto next_mem_type;
+}
+
+void enable_gpmc_config(u32 * gpmc_config, u32 gpmc_base, u32 base, u32 size)
+{
+ __raw_writel(0, GPMC_CONFIG7 + gpmc_base);
+ sdelay(1000);
+ /* Delay for settling */
+ __raw_writel(gpmc_config[0], GPMC_CONFIG1 + gpmc_base);
+ __raw_writel(gpmc_config[1], GPMC_CONFIG2 + gpmc_base);
+ __raw_writel(gpmc_config[2], GPMC_CONFIG3 + gpmc_base);
+ __raw_writel(gpmc_config[3], GPMC_CONFIG4 + gpmc_base);
+ __raw_writel(gpmc_config[4], GPMC_CONFIG5 + gpmc_base);
+ __raw_writel(gpmc_config[5], GPMC_CONFIG6 + gpmc_base);
+ /* Enable the config */
+ __raw_writel((((size & 0xF) << 8) | ((base >> 24) & 0x3F) |
+ (1 << 6)), GPMC_CONFIG7 + gpmc_base);
+ sdelay(2000);
+}
+
+/*****************************************************
+ * gpmc_init(): init gpmc bus
+ * Init GPMC for x16, MuxMode (SDRAM in x32).
+ * This code can only be executed from SRAM or SDRAM.
+ *****************************************************/
+void gpmc_init(void)
+{
+/* putting a blanket check on GPMC based on ZeBu for now */
+ u32 mux = 0, mwidth;
+ u32 *gpmc_config = NULL;
+ u32 gpmc_base = 0;
+ u32 base = 0;
+ u32 size = 0;
+ u32 f_off = CFG_MONITOR_LEN;
+ u32 f_sec = 0;
+ u32 config = 0;
+ unsigned char *config_sel = NULL;
+ u32 i=0;
+
+ mux = BIT9;
+ mwidth = get_gpmc0_width();
+
+ /* global settings */
+ __raw_writel(0x10, GPMC_SYSCONFIG); /* smart idle */
+ __raw_writel(0x0, GPMC_IRQENABLE); /* isr's sources masked */
+ __raw_writel(0, GPMC_TIMEOUT_CONTROL); /* timeout disable */
+
+ config = __raw_readl(GPMC_CONFIG);
+ config &= (~0xf00);
+ __raw_writel(config, GPMC_CONFIG);
+
+ /* Disable the GPMC0 config set by ROM code
+ * It conflicts with our MPDB (both at 0x08000000)
+ */
+ __raw_writel(0 , GPMC_CONFIG7 + GPMC_CONFIG_CS0);
+ sdelay(1000);
+
+ /* CS 0 */
+ gpmc_config = gpmc_m_nand;
+ gpmc_base = GPMC_CONFIG_CS0 + (0 * GPMC_CONFIG_WIDTH);
+ base = PISMO1_NAND_BASE;
+ size = PISMO1_NAND_SIZE;
+ enable_gpmc_config(gpmc_config, gpmc_base, base, size);
+
+ f_off = SMNAND_ENV_OFFSET;
+ f_sec = SZ_128K;
+ is_nand = 1;
+ nand_cs_base = gpmc_base;
+
+ /* env setup */
+ boot_flash_base = base;
+ boot_flash_off = f_off;
+ boot_flash_sec = f_sec;
+ boot_flash_env_addr = f_off;
+
+#ifdef ENV_IS_VARIABLE
+ boot_env_get_char_spec = nand_env_get_char_spec;
+ boot_env_init = nand_env_init;
+ boot_saveenv = nand_saveenv;
+ boot_env_relocate_spec = nand_env_relocate_spec;
+ env_ptr = 0; /* This gets filled elsewhere!! */
+ env_name_spec = nand_env_name_spec;
+#endif
+ /* CS 1 */
+ gpmc_config = gpmc_enet;
+ gpmc_base = GPMC_CONFIG_CS0 + (1 * GPMC_CONFIG_WIDTH);
+ enable_gpmc_config(gpmc_config, gpmc_base, DEBUG_BASE, DBG_MPDB_SIZE);
+
+#ifdef OPTIONAL_NOR
+ /* CS 2 (fixme -- sizes for optional s-nor)*/
+ gpmc_config = gpmc_stnor;
+ gpmc_config[0] |= mux | TYPE_NOR | mwidth;
+ gpmc_base = GPMC_CONFIG_CS0 + (2 * GPMC_CONFIG_WIDTH);
+ enable_gpmc_config(gpmc_config, gpmc_base, DEBUG_BASE, DBG_MPDB_SIZE);
+
+ /* handle flash probe setup */
+ f_sec = SZ_128K;
+ NOR_MAX_FLASH_BANKS = 2;
+ size = PISMO1_NOR_SIZE;
+ for(i=0; i < NOR_MAX_FLASH_BANKS; i++)
+ NOR_FLASH_BANKS_LIST[i] =
+ FLASH_BASE_SDPV1 + PHYS_FLASH_SIZE*i;
+ }
+#endif
+}
diff --git a/board/omap3430labrador/nand.c b/board/omap3430labrador/nand.c
new file mode 100644
index 0000000000..16f6c7b5d1
--- /dev/null
+++ b/board/omap3430labrador/nand.c
@@ -0,0 +1,465 @@
+/*
+ * (C) Copyright 2004-2008 Texas Instruments, <www.ti.com>
+ * Rohit Choraria <rohitkc@ti.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+
+#include <asm/io.h>
+
+#include <asm/arch/cpu.h>
+#include <asm/arch/mem.h>
+#include <linux/mtd/nand_ecc.h>
+
+#if (CONFIG_COMMANDS & CFG_CMD_NAND) && !defined(CFG_NAND_LEGACY)
+
+#include <nand.h>
+
+unsigned char cs;
+volatile unsigned long gpmc_cs_base_add;
+
+#define GPMC_BUF_EMPTY 0
+#define GPMC_BUF_FULL 1
+
+#define ECC_P1_128_E(val) ((val) & 0x000000FF) /* Bit 0 to 7 */
+#define ECC_P512_2048_E(val) (((val) & 0x00000F00)>>8) /* Bit 8 to 11 */
+#define ECC_P1_128_O(val) (((val) & 0x00FF0000)>>16) /* Bit 16 to Bit 23 */
+#define ECC_P512_2048_O(val) (((val) & 0x0F000000)>>24) /* Bit 24 to Bit 27 */
+
+int nand_unlock(struct mtd_info *mtd, unsigned long off, unsigned long size)
+{
+ register struct nand_chip *this = mtd->priv;
+ int start_page, end_page;
+
+ start_page = (int) (off >> this->page_shift);
+ end_page = (int) ((off + size) >> this->page_shift);
+
+ printk("\nUnlocking %x - %x. locking rest..\n", off, off + size);
+ this->cmdfunc(mtd, 0x23, -1, start_page);
+ this->cmdfunc(mtd, 0x24, -1, end_page);
+ ndelay (100);
+ return 0;
+}
+/*
+ * omap_nand_hwcontrol - Set the address pointers corretly for the
+ * following address/data/command operation
+ * @mtd: MTD device structure
+ * @ctrl: Says whether Address or Command or Data is following.
+ */
+
+static void omap_nand_hwcontrol(struct mtd_info *mtd, int ctrl)
+{
+ register struct nand_chip *this = mtd->priv;
+
+
+/*
+ * Point the IO_ADDR to DATA and ADDRESS registers instead of chip address
+ */
+ switch (ctrl) {
+ case NAND_CTL_SETCLE:
+ this->IO_ADDR_W = (void *) gpmc_cs_base_add + GPMC_NAND_CMD;
+ this->IO_ADDR_R = (void *) gpmc_cs_base_add + GPMC_NAND_DAT;
+ break;
+ case NAND_CTL_SETALE:
+ this->IO_ADDR_W = (void *) gpmc_cs_base_add + GPMC_NAND_ADR;
+ this->IO_ADDR_R = (void *) gpmc_cs_base_add + GPMC_NAND_DAT;
+ break;
+ case NAND_CTL_CLRCLE:
+ this->IO_ADDR_W = (void *) gpmc_cs_base_add + GPMC_NAND_DAT;
+ this->IO_ADDR_R = (void *) gpmc_cs_base_add + GPMC_NAND_DAT;
+ break;
+ case NAND_CTL_CLRALE:
+ this->IO_ADDR_W = (void *) gpmc_cs_base_add + GPMC_NAND_DAT;
+ this->IO_ADDR_R = (void *) gpmc_cs_base_add + GPMC_NAND_DAT;
+ break;
+ }
+}
+
+/*
+ * omap_nand_wait - called primarily after a program/erase operation
+ * so that we access NAND again only after the device
+ * is ready again.
+ * @mtd: MTD device structure
+ * @chip: nand_chip structure
+ * @state: State from which wait function is being called i.e write/erase.
+ */
+static int omap_nand_wait(struct mtd_info *mtd, struct nand_chip *chip, int state)
+{
+ register struct nand_chip *this = mtd->priv;
+ int status = 0;
+
+ this->IO_ADDR_W = (void *) gpmc_cs_base_add + GPMC_NAND_CMD;
+ this->IO_ADDR_R = (void *) gpmc_cs_base_add + GPMC_NAND_DAT;
+ /* Send the status command and loop until the device is free */
+ while(!(status & 0x40)){
+ __raw_writeb(NAND_CMD_STATUS & 0xFF, this->IO_ADDR_W);
+ status = __raw_readb(this->IO_ADDR_R);
+ }
+ return status;
+}
+
+/*
+ * omap_nand_dev_ready - Wait for the NAND device to exit busy state
+ * by polling on RDY/BSY signal
+ * @mtd: MTD device structure
+ */
+static int omap_nand_dev_ready(struct mtd_info *mtd)
+{
+ unsigned int wait_status = 0;
+
+ /* busy loop until NAND device is RDY again */
+ while(!(wait_status & (1 << (cs + 8))))
+ wait_status = __raw_readl(GPMC_IRQSTATUS);
+ /* clear the status register for further usage */
+ __raw_writel(1 << (cs + 8), GPMC_IRQSTATUS);
+ return 1;
+}
+
+
+#ifdef CFG_NAND_WIDTH_16
+/**
+ * omap_nand_write_buf16 - [DEFAULT] write buffer to chip
+ * @mtd: MTD device structure
+ * @buf: data buffer
+ * @len: number of bytes to write
+ *
+ * Default write function for 16bit buswith
+ */
+static void omap_nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len)
+{
+ int i;
+ struct nand_chip *this = mtd->priv;
+ u16 *p = (u16 *) buf;
+ len >>= 1;
+
+ for (i=0; i<len; i++){
+ writew(p[i], this->IO_ADDR_W);
+ while (GPMC_BUF_EMPTY == (readl(GPMC_STATUS) & GPMC_BUF_FULL));
+ }
+}
+
+/**
+ * nand_read_buf16 - [DEFAULT] read chip data into buffer
+ * @mtd: MTD device structure
+ * @buf: buffer to store date
+ * @len: number of bytes to read
+ *
+ * Default read function for 16bit buswith
+ */
+
+static void omap_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)
+{
+ int i;
+ struct nand_chip *this = mtd->priv;
+ u16 *p = (u16 *) buf;
+ len >>= 1;
+
+ for (i=0; i<len; i++)
+ p[i] = readw(this->IO_ADDR_R);
+}
+
+#else
+/*
+ * omap_nand_write_buf - write buffer to NAND controller
+ * @mtd: MTD device structure
+ * @buf: data buffer
+ * @len: number of bytes to write
+ *
+ */
+
+static void omap_nand_write_buf(struct mtd_info *mtd, const uint8_t * buf,
+ int len)
+{
+ int i;
+ int j=0;
+ struct nand_chip *chip = mtd->priv;
+
+ for (i = 0; i < len; i++) {
+ writeb(buf[i], chip->IO_ADDR_W);
+ for(j=0;j<10;j++);
+ }
+
+}
+
+/*
+ * omap_nand_read_buf - read data from NAND controller into buffer
+ * @mtd: MTD device structure
+ * @buf: buffer to store date
+ * @len: number of bytes to read
+ *
+ */
+
+static void omap_nand_read_buf(struct mtd_info *mtd, uint8_t * buf, int len)
+{
+ int i;
+ int j=0;
+ struct nand_chip *chip = mtd->priv;
+
+ for (i = 0; i < len; i++) {
+ buf[i] = readb(chip->IO_ADDR_R);
+ while (GPMC_BUF_EMPTY == (readl(GPMC_STATUS) & GPMC_BUF_FULL));
+ }
+}
+#endif
+
+/*
+ * omap_hwecc_init - Initialize the Hardware ECC for NAND flash in GPMC controller
+ * @mtd: MTD device structure
+ *
+ */
+static void omap_hwecc_init(struct nand_chip *chip)
+{
+ unsigned long val = 0x0;
+
+ /* Init ECC Control Register */
+ /* Clear all ECC | Enable Reg1 */
+ val = ( (0x00000001<<8) | 0x00000001 );
+ __raw_writel(val, GPMC_BASE + GPMC_ECC_CONTROL);
+ __raw_writel(0x3fcff000, GPMC_BASE + GPMC_ECC_SIZE_CONFIG);
+}
+
+/*
+ * omap_compare_ecc - This function compares two ECC's and indicates if there is an error.
+ * If the error can be corrected it will be corrected to the buffer
+ * @ecc_data1: ecc code from nand spare area
+ * @ecc_data2: ecc code from hardware register obtained from hardware ecc
+ * @page_data: page data
+ */
+static int omap_compare_ecc(u8 *ecc_data1, /* read from NAND memory */
+ u8 *ecc_data2, /* read from register */
+ u8 *page_data)
+{
+ return 0;
+}
+
+/*
+ * omap_correct_data - Compares the ecc read from nand spare area with ECC registers values
+ * and corrects one bit error if it has occured
+ * @mtd: MTD device structure
+ * @dat: page data
+ * @read_ecc: ecc read from nand flash
+ * @calc_ecc: ecc read from ECC registers
+ */
+static int omap_correct_data(struct mtd_info *mtd,u_char *dat,
+ u_char *read_ecc, u_char *calc_ecc)
+{
+ return 0;
+}
+
+/*
+ * omap_calculate_ecc - Generate non-inverted ECC bytes.
+ *
+ * Using noninverted ECC can be considered ugly since writing a blank
+ * page ie. padding will clear the ECC bytes. This is no problem as
+ * long nobody is trying to write data on the seemingly unused page.
+ * Reading an erased page will produce an ECC mismatch between
+ * generated and read ECC bytes that has to be dealt with separately.
+ * @mtd: MTD structure
+ * @dat: unused
+ * @ecc_code: ecc_code buffer
+*/
+
+static int omap_calculate_ecc(struct mtd_info *mtd, const u_char *dat,
+ u_char *ecc_code)
+{
+ unsigned long val = 0x0;
+ unsigned long reg;
+
+ /* Start Reading from HW ECC1_Result = 0x200 */
+ reg = (unsigned long)(GPMC_BASE + GPMC_ECC1_RESULT);
+ val = __raw_readl(reg);
+
+ *ecc_code++ = ECC_P1_128_E(val);
+ *ecc_code++ = ECC_P1_128_O(val);
+ *ecc_code++ = ECC_P512_2048_E(val) | ECC_P512_2048_O(val) << 4;
+
+ return 0;
+}
+
+/*
+ * omap_enable_ecc - This function enables the hardware ecc functionality
+ * @mtd: MTD device structure
+ * @mode: Read/Write mode
+ */
+static void omap_enable_hwecc(struct mtd_info *mtd , int mode)
+{
+ struct nand_chip *chip = mtd->priv;
+ unsigned int val = __raw_readl(GPMC_BASE + GPMC_ECC_CONFIG);
+ unsigned int dev_width = (chip->options & NAND_BUSWIDTH_16) >> 1;
+
+ switch (mode) {
+ case NAND_ECC_READ :
+ __raw_writel(0x101, GPMC_BASE + GPMC_ECC_CONTROL);
+ /* ECC col width) | ( CS ) | ECC Enable */
+ val = (dev_width << 7) | (cs << 1) | (0x1) ;
+ break;
+ case NAND_ECC_READSYN :
+ __raw_writel(0x100, GPMC_BASE + GPMC_ECC_CONTROL);
+ /* ECC col width) | ( CS ) | ECC Enable */
+ val = (dev_width << 7) | (cs << 1) | (0x1) ;
+ break;
+ case NAND_ECC_WRITE :
+ __raw_writel(0x101, GPMC_BASE + GPMC_ECC_CONTROL);
+ /* ECC col width) | ( CS ) | ECC Enable */
+ val = (dev_width << 7) | (cs << 1) | (0x1) ;
+ break;
+ default:
+ printf("Error: Unrecognized Mode[%d]!\n", mode);
+ break;
+ }
+
+ __raw_writel(val, GPMC_BASE + GPMC_ECC_CONFIG);
+}
+
+static struct nand_oobinfo hw_nand_oob_64 = {
+ .useecc = MTD_NANDECC_AUTOPLACE,
+ .eccbytes = 12,
+ .eccpos = {
+ 2, 3, 4, 5,
+ 6, 7, 8, 9,
+ 10, 11, 12, 13
+ },
+ .oobfree = { {20, 50} } /* don't care */
+};
+
+static struct nand_oobinfo sw_nand_oob_64 = {
+ .useecc = MTD_NANDECC_AUTOPLACE,
+ .eccbytes = 24,
+ .eccpos = {
+ 40, 41, 42, 43, 44, 45, 46, 47,
+ 48, 49, 50, 51, 52, 53, 54, 55,
+ 56, 57, 58, 59, 60, 61, 62, 63
+ },
+ .oobfree = { {2, 38} }
+};
+
+void omap_nand_switch_ecc(struct mtd_info *mtd, int hardware)
+{
+ struct nand_chip *nand = mtd->priv;
+
+ if (!hardware) {
+ nand->eccmode = NAND_ECC_SOFT;
+ nand->autooob = &sw_nand_oob_64;
+ nand->eccsize = 256; /* set default eccsize */
+ nand->eccbytes = 3;
+ nand->eccsteps = 8;
+ nand->enable_hwecc = 0;
+ nand->calculate_ecc = nand_calculate_ecc;
+ nand->correct_data = nand_correct_data;
+ } else {
+ nand->eccmode = NAND_ECC_HW3_512;
+ nand->autooob = &hw_nand_oob_64;
+ nand->eccsize = 512;
+ nand->eccbytes = 3;
+ nand->eccsteps = 4;
+ nand->enable_hwecc = omap_enable_hwecc;
+ nand->correct_data = omap_correct_data;
+ nand->calculate_ecc = omap_calculate_ecc;
+
+ omap_hwecc_init(nand);
+ }
+
+ mtd->eccsize = nand->eccsize;
+ nand->oobdirty = 1;
+
+ if (nand->options & NAND_BUSWIDTH_16) {
+ mtd->oobavail = mtd->oobsize - (nand->autooob->eccbytes + 2);
+ if (nand->autooob->eccbytes & 0x01)
+ mtd->oobavail--;
+ } else
+ mtd->oobavail = mtd->oobsize - (nand->autooob->eccbytes + 1);
+}
+
+/*
+ * Board-specific NAND initialization. The following members of the
+ * argument are board-specific (per include/linux/mtd/nand_new.h):
+ * - IO_ADDR_R?: address to read the 8 I/O lines of the flash device
+ * - IO_ADDR_W?: address to write the 8 I/O lines of the flash device
+ * - hwcontrol: hardwarespecific function for accesing control-lines
+ * - dev_ready: hardwarespecific function for accesing device ready/busy line
+ * - enable_hwecc?: function to enable (reset) hardware ecc generator. Must
+ * only be provided if a hardware ECC is available
+ * - eccmode: mode of ecc, see defines
+ * - chip_delay: chip dependent delay for transfering data from array to
+ * read regs (tR)
+ * - options: various chip options. They can partly be set to inform
+ * nand_scan about special functionality. See the defines for further
+ * explanation
+ * Members with a "?" were not set in the merged testing-NAND branch,
+ * so they are not set here either.
+ */
+void board_nand_init(struct nand_chip *nand)
+{
+ int gpmc_config=0;
+ cs = 0;
+ while (cs <= GPMC_MAX_CS) {
+ /* Each GPMC set for a single CS is at offset 0x30 */
+ /* already remapped for us */
+ gpmc_cs_base_add = (GPMC_CONFIG_CS0 + (cs*0x30));
+ /* xloader/Uboot would have written the NAND type for us
+ * -NOTE This is a temporary measure and cannot handle ONENAND.
+ * The proper way of doing this is to pass the setup of u-boot up to kernel
+ * using kernel params - something on the lines of machineID
+ */
+ /* Check if NAND type is set */
+ if ((__raw_readl(gpmc_cs_base_add + GPMC_CONFIG1) & 0xC00)==0x800) {
+ /* Found it!! */
+ break;
+ }
+ cs++;
+ }
+ if (cs > GPMC_MAX_CS) {
+ printk ("NAND: Unable to find NAND settings in GPMC Configuration - quitting\n");
+ }
+
+ gpmc_config = __raw_readl(GPMC_CONFIG);
+ /* Disable Write protect */
+ gpmc_config |= 0x10;
+ __raw_writel(gpmc_config, GPMC_CONFIG);
+
+
+ nand->IO_ADDR_R = gpmc_cs_base_add + GPMC_NAND_DAT;
+ nand->IO_ADDR_W = gpmc_cs_base_add + GPMC_NAND_CMD;
+
+ nand->hwcontrol = omap_nand_hwcontrol;
+ nand->options = NAND_NO_PADDING | NAND_CACHEPRG | NAND_NO_AUTOINCR |
+ NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR;
+ nand->read_buf = omap_nand_read_buf;
+ nand->write_buf = omap_nand_write_buf;
+ nand->eccmode = NAND_ECC_SOFT;
+/* if RDY/BSY line is connected to OMAP then use the omap ready funcrtion
+ * and the generic nand_wait function which reads the status register after
+ * monitoring the RDY/BSY line. Otherwise use a standard chip delay which
+ * is slightly more than tR (AC Timing) of the NAND device and read the
+ * status register until you get a failure or success
+ */
+
+#if 0
+ nand->dev_ready = omap_nand_dev_ready;
+#else
+ nand->waitfunc = omap_nand_wait;
+ nand->chip_delay = 50;
+#endif
+}
+
+
+#endif /* (CONFIG_COMMANDS & CFG_CMD_NAND) */
+
diff --git a/board/omap3430labrador/omap3430sdp.c b/board/omap3430labrador/omap3430sdp.c
new file mode 100644
index 0000000000..d94b790921
--- /dev/null
+++ b/board/omap3430labrador/omap3430sdp.c
@@ -0,0 +1,756 @@
+/*
+ * (C) Copyright 2004-2006
+ * Texas Instruments, <www.ti.com>
+ * Richard Woodruff <r-woodruff2@ti.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#include <common.h>
+#include <asm/arch/cpu.h>
+#include <asm/io.h>
+#include <asm/arch/bits.h>
+#include <asm/arch/mux.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/arch/sys_info.h>
+#include <asm/arch/clocks.h>
+#include <asm/arch/mem.h>
+#include <i2c.h>
+#include <asm/mach-types.h>
+
+/*******************************************************
+ * Routine: delay
+ * Description: spinning delay to use before udelay works
+ ******************************************************/
+static inline void delay(unsigned long loops)
+{
+ __asm__ volatile ("1:\n" "subs %0, %1, #1\n"
+ "bne 1b":"=r" (loops):"0"(loops));
+}
+
+/*****************************************
+ * Routine: board_init
+ * Description: Early hardware init.
+ *****************************************/
+int board_init(void)
+{
+ DECLARE_GLOBAL_DATA_PTR;
+
+ gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
+ gd->bd->bi_arch_number = MACH_TYPE_OMAP_3430SDP; /* board id for Linux */
+ gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); /* boot param addr */
+
+ return 0;
+}
+
+/*****************************************
+ * Routine: secure_unlock
+ * Description: Setup security registers for access
+ * (GP Device only)
+ *****************************************/
+void secure_unlock_mem(void)
+{
+ /* Permission values for registers -Full fledged permissions to all */
+ #define UNLOCK_1 0xFFFFFFFF
+ #define UNLOCK_2 0x00000000
+ #define UNLOCK_3 0x0000FFFF
+
+ /* Protection Module Register Target APE (PM_RT)*/
+ __raw_writel(UNLOCK_1, RT_REQ_INFO_PERMISSION_1);
+ __raw_writel(UNLOCK_1, RT_READ_PERMISSION_0);
+ __raw_writel(UNLOCK_1, RT_WRITE_PERMISSION_0);
+ __raw_writel(UNLOCK_2, RT_ADDR_MATCH_1);
+
+ __raw_writel(UNLOCK_3, GPMC_REQ_INFO_PERMISSION_0);
+ __raw_writel(UNLOCK_3, GPMC_READ_PERMISSION_0);
+ __raw_writel(UNLOCK_3, GPMC_WRITE_PERMISSION_0);
+
+ __raw_writel(UNLOCK_3, OCM_REQ_INFO_PERMISSION_0);
+ __raw_writel(UNLOCK_3, OCM_READ_PERMISSION_0);
+ __raw_writel(UNLOCK_3, OCM_WRITE_PERMISSION_0);
+ __raw_writel(UNLOCK_2, OCM_ADDR_MATCH_2);
+
+ /* IVA Changes */
+ __raw_writel(UNLOCK_3, IVA2_REQ_INFO_PERMISSION_0);
+ __raw_writel(UNLOCK_3, IVA2_READ_PERMISSION_0);
+ __raw_writel(UNLOCK_3, IVA2_WRITE_PERMISSION_0);
+
+ __raw_writel(UNLOCK_3, IVA2_REQ_INFO_PERMISSION_1);
+ __raw_writel(UNLOCK_3, IVA2_READ_PERMISSION_1);
+ __raw_writel(UNLOCK_3, IVA2_WRITE_PERMISSION_1);
+
+ __raw_writel(UNLOCK_3, IVA2_REQ_INFO_PERMISSION_2);
+ __raw_writel(UNLOCK_3, IVA2_READ_PERMISSION_2);
+ __raw_writel(UNLOCK_3, IVA2_WRITE_PERMISSION_2);
+
+ __raw_writel(UNLOCK_3, IVA2_REQ_INFO_PERMISSION_3);
+ __raw_writel(UNLOCK_3, IVA2_READ_PERMISSION_3);
+ __raw_writel(UNLOCK_3, IVA2_WRITE_PERMISSION_3);
+
+ __raw_writel(UNLOCK_1, SMS_RG_ATT0); /* SDRC region 0 public */
+}
+
+
+/**********************************************************
+ * Routine: secureworld_exit()
+ * Description: If chip is EMU and boot type is external
+ * configure secure registers and exit secure world
+ * general use.
+ ***********************************************************/
+void secureworld_exit()
+{
+ unsigned long i;
+
+ /* configrue non-secure access control register */
+ __asm__ __volatile__("mrc p15, 0, %0, c1, c1, 2":"=r" (i));
+ /* enabling co-processor CP10 and CP11 accesses in NS world */
+ __asm__ __volatile__("orr %0, %0, #0xC00":"=r"(i));
+ /* allow allocation of locked TLBs and L2 lines in NS world */
+ /* allow use of PLE registers in NS world also */
+ __asm__ __volatile__("orr %0, %0, #0x70000":"=r"(i));
+ __asm__ __volatile__("mcr p15, 0, %0, c1, c1, 2":"=r" (i));
+
+ /* Enable ASA in ACR register */
+ __asm__ __volatile__("mrc p15, 0, %0, c1, c0, 1":"=r" (i));
+ __asm__ __volatile__("orr %0, %0, #0x10":"=r"(i));
+ __asm__ __volatile__("mcr p15, 0, %0, c1, c0, 1":"=r" (i));
+
+ /* Exiting secure world */
+ __asm__ __volatile__("mrc p15, 0, %0, c1, c1, 0":"=r" (i));
+ __asm__ __volatile__("orr %0, %0, #0x31":"=r"(i));
+ __asm__ __volatile__("mcr p15, 0, %0, c1, c1, 0":"=r" (i));
+}
+
+/**********************************************************
+ * Routine: setup_auxcr()
+ * Description: Write to AuxCR desired value using SMI.
+ * general use.
+ ***********************************************************/
+void setup_auxcr()
+{
+ unsigned long i;
+ volatile unsigned int j;
+ /* Save r0, r12 and restore them after usage */
+ __asm__ __volatile__("mov %0, r12":"=r" (j));
+ __asm__ __volatile__("mov %0, r0":"=r" (i));
+
+ /* GP Device ROM code API usage here */
+ /* r12 = AUXCR Write function and r0 value */
+ __asm__ __volatile__("mov r12, #0x3");
+ __asm__ __volatile__("mrc p15, 0, r0, c1, c0, 1");
+ /* Enabling ASA */
+ __asm__ __volatile__("orr r0, r0, #0x10");
+ /* SMI instruction to call ROM Code API */
+ __asm__ __volatile__(".word 0xE1600070");
+ __asm__ __volatile__("mov r0, %0":"=r" (i));
+ __asm__ __volatile__("mov r12, %0":"=r" (j));
+}
+
+/**********************************************************
+ * Routine: try_unlock_sram()
+ * Description: If chip is GP/EMU(special) type, unlock the SRAM for
+ * general use.
+ ***********************************************************/
+void try_unlock_memory()
+{
+ int mode;
+ int in_sdram = running_in_sdram();
+
+ /* if GP device unlock device SRAM for general use */
+ /* secure code breaks for Secure/Emulation device - HS/E/T*/
+ mode = get_device_type();
+ if (mode == GP_DEVICE) {
+ secure_unlock_mem();
+ }
+ /* If device is EMU and boot is XIP external booting
+ * Unlock firewalls and disable L2 and put chip
+ * out of secure world
+ */
+ /* Assuming memories are unlocked by the demon who put us in SDRAM */
+ if ((mode <= EMU_DEVICE) && (get_boot_type() == 0x1F)
+ && (!in_sdram)) {
+ secure_unlock_mem();
+ secureworld_exit();
+ }
+
+ return;
+}
+
+/**********************************************************
+ * Routine: s_init
+ * Description: Does early system init of muxing and clocks.
+ * - Called path is with SRAM stack.
+ **********************************************************/
+void s_init(void)
+{
+ int i;
+ int external_boot = 0;
+ int in_sdram = running_in_sdram();
+
+#ifdef CONFIG_3430VIRTIO
+ in_sdram = 0; /* allow setup from memory for Virtio */
+#endif
+ watchdog_init();
+
+ external_boot = (get_boot_type() == 0x1F) ? 1 : 0;
+ /* Right now flushing at low MPU speed. Need to move after clock init */
+ v7_flush_dcache_all(get_device_type(), external_boot);
+
+ try_unlock_memory();
+
+#ifdef CONFIG_3430_AS_3410
+ /* setup the scalability control register for
+ * 3430 to work in 3410 mode
+ */
+ __raw_writel(0x5ABF, CONTROL_SCALABLE_OMAP_OCP);
+#endif
+
+ if (cpu_is_3410()) {
+ /* Lock down 6-ways in L2 cache so that effective size of L2 is 64K */
+ __asm__ __volatile__("mov %0, #0xFC":"=r" (i));
+ __asm__ __volatile__("mcr p15, 1, %0, c9, c0, 0":"=r" (i));
+ }
+
+#ifndef CONFIG_ICACHE_OFF
+ icache_enable();
+#endif
+
+#ifdef CONFIG_L2_OFF
+ l2cache_disable();
+#else
+ l2cache_enable();
+#endif
+ /* Writing to AuxCR in U-boot using SMI for GP DEV */
+ /* Currently SMI in Kernel on ES2 devices seems to have an isse
+ * Once that is resolved, we can postpone this config to kernel
+ */
+ if(get_device_type() == GP_DEVICE)
+ setup_auxcr();
+
+ set_muxconf_regs();
+ delay(100);
+
+ prcm_init();
+
+ per_clocks_enable();
+
+ if (!in_sdram)
+ sdrc_init();
+}
+
+/*******************************************************
+ * Routine: misc_init_r
+ * Description: Init ethernet (done here so udelay works)
+ ********************************************************/
+int misc_init_r(void)
+{
+#ifdef CONFIG_DRIVER_OMAP34XX_I2C
+ i2c_init(CFG_I2C_SPEED, CFG_I2C_SLAVE);
+#endif
+ ether_init(); /* better done here so timers are init'ed */
+ return (0);
+}
+
+/******************************************************
+ * Routine: wait_for_command_complete
+ * Description: Wait for posting to finish on watchdog
+ ******************************************************/
+void wait_for_command_complete(unsigned int wd_base)
+{
+ int pending = 1;
+ do {
+ pending = __raw_readl(wd_base + WWPS);
+ } while (pending);
+}
+
+/****************************************
+ * Routine: watchdog_init
+ * Description: Shut down watch dogs
+ *****************************************/
+void watchdog_init(void)
+{
+ /* There are 3 watch dogs WD1=Secure, WD2=MPU, WD3=IVA. WD1 is
+ * either taken care of by ROM (HS/EMU) or not accessible (GP).
+ * We need to take care of WD2-MPU or take a PRCM reset. WD3
+ * should not be running and does not generate a PRCM reset.
+ */
+
+ sr32(CM_FCLKEN_WKUP, 5, 1, 1);
+ sr32(CM_ICLKEN_WKUP, 5, 1, 1);
+ wait_on_value(BIT5, 0x20, CM_IDLEST_WKUP, 5); /* some issue here */
+
+ __raw_writel(WD_UNLOCK1, WD2_BASE + WSPR);
+ wait_for_command_complete(WD2_BASE);
+ __raw_writel(WD_UNLOCK2, WD2_BASE + WSPR);
+}
+
+/*******************************************************************
+ * Routine:ether_init
+ * Description: take the Ethernet controller out of reset and wait
+ * for the EEPROM load to complete.
+ ******************************************************************/
+void ether_init(void)
+{
+#ifdef CONFIG_DRIVER_LAN91C96
+ int cnt = 20;
+
+ __raw_writew(0x0, LAN_RESET_REGISTER);
+ do {
+ __raw_writew(0x1, LAN_RESET_REGISTER);
+ udelay(100);
+ if (cnt == 0)
+ goto h4reset_err_out;
+ --cnt;
+ } while (__raw_readw(LAN_RESET_REGISTER) != 0x1);
+
+ cnt = 20;
+
+ do {
+ __raw_writew(0x0, LAN_RESET_REGISTER);
+ udelay(100);
+ if (cnt == 0)
+ goto h4reset_err_out;
+ --cnt;
+ } while (__raw_readw(LAN_RESET_REGISTER) != 0x0000);
+ udelay(1000);
+
+ *((volatile unsigned char *)ETH_CONTROL_REG) &= ~0x01;
+ udelay(1000);
+
+ h4reset_err_out:
+ return;
+#endif
+}
+
+/**********************************************
+ * Routine: dram_init
+ * Description: sets uboots idea of sdram size
+ **********************************************/
+int dram_init(void)
+{
+ #define NOT_EARLY 0
+ DECLARE_GLOBAL_DATA_PTR;
+ unsigned int size0 = 0, size1 = 0;
+ u32 mtype, btype;
+
+ btype = get_board_type();
+ mtype = get_mem_type();
+#ifndef CONFIG_3430ZEBU
+ /* fixme... dont know why this func is crashing in ZeBu */
+ display_board_info(btype);
+#endif
+ /* If a second bank of DDR is attached to CS1 this is
+ * where it can be started. Early init code will init
+ * memory on CS0.
+ */
+ if ((mtype == DDR_COMBO) || (mtype == DDR_STACKED)) {
+ do_sdrc_init(SDRC_CS1_OSET, NOT_EARLY);
+ }
+ size0 = get_sdr_cs_size(SDRC_CS0_OSET);
+ size1 = get_sdr_cs_size(SDRC_CS1_OSET);
+
+ gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+ gd->bd->bi_dram[0].size = size0;
+ gd->bd->bi_dram[1].start = PHYS_SDRAM_1+size0;
+ gd->bd->bi_dram[1].size = size1;
+
+ return 0;
+}
+
+#define MUX_VAL(OFFSET,VALUE)\
+ __raw_writew((VALUE), OMAP34XX_CTRL_BASE + (OFFSET));
+
+#define CP(x) (CONTROL_PADCONF_##x)
+/*
+ * IEN - Input Enable
+ * IDIS - Input Disable
+ * PTD - Pull type Down
+ * PTU - Pull type Up
+ * DIS - Pull type selection is inactive
+ * EN - Pull type selection is active
+ * M0 - Mode 0
+ * The commented string gives the final mux configuration for that pin
+ */
+#define MUX_DEFAULT_ES2()\
+ /*SDRC*/\
+ MUX_VAL(CP(SDRC_D0), (IEN | PTD | DIS | M0)) /*SDRC_D0*/\
+ MUX_VAL(CP(SDRC_D1), (IEN | PTD | DIS | M0)) /*SDRC_D1*/\
+ MUX_VAL(CP(SDRC_D2), (IEN | PTD | DIS | M0)) /*SDRC_D2*/\
+ MUX_VAL(CP(SDRC_D3), (IEN | PTD | DIS | M0)) /*SDRC_D3*/\
+ MUX_VAL(CP(SDRC_D4), (IEN | PTD | DIS | M0)) /*SDRC_D4*/\
+ MUX_VAL(CP(SDRC_D5), (IEN | PTD | DIS | M0)) /*SDRC_D5*/\
+ MUX_VAL(CP(SDRC_D6), (IEN | PTD | DIS | M0)) /*SDRC_D6*/\
+ MUX_VAL(CP(SDRC_D7), (IEN | PTD | DIS | M0)) /*SDRC_D7*/\
+ MUX_VAL(CP(SDRC_D8), (IEN | PTD | DIS | M0)) /*SDRC_D8*/\
+ MUX_VAL(CP(SDRC_D9), (IEN | PTD | DIS | M0)) /*SDRC_D9*/\
+ MUX_VAL(CP(SDRC_D10), (IEN | PTD | DIS | M0)) /*SDRC_D10*/\
+ MUX_VAL(CP(SDRC_D11), (IEN | PTD | DIS | M0)) /*SDRC_D11*/\
+ MUX_VAL(CP(SDRC_D12), (IEN | PTD | DIS | M0)) /*SDRC_D12*/\
+ MUX_VAL(CP(SDRC_D13), (IEN | PTD | DIS | M0)) /*SDRC_D13*/\
+ MUX_VAL(CP(SDRC_D14), (IEN | PTD | DIS | M0)) /*SDRC_D14*/\
+ MUX_VAL(CP(SDRC_D15), (IEN | PTD | DIS | M0)) /*SDRC_D15*/\
+ MUX_VAL(CP(SDRC_D16), (IEN | PTD | DIS | M0)) /*SDRC_D16*/\
+ MUX_VAL(CP(SDRC_D17), (IEN | PTD | DIS | M0)) /*SDRC_D17*/\
+ MUX_VAL(CP(SDRC_D18), (IEN | PTD | DIS | M0)) /*SDRC_D18*/\
+ MUX_VAL(CP(SDRC_D19), (IEN | PTD | DIS | M0)) /*SDRC_D19*/\
+ MUX_VAL(CP(SDRC_D20), (IEN | PTD | DIS | M0)) /*SDRC_D20*/\
+ MUX_VAL(CP(SDRC_D21), (IEN | PTD | DIS | M0)) /*SDRC_D21*/\
+ MUX_VAL(CP(SDRC_D22), (IEN | PTD | DIS | M0)) /*SDRC_D22*/\
+ MUX_VAL(CP(SDRC_D23), (IEN | PTD | DIS | M0)) /*SDRC_D23*/\
+ MUX_VAL(CP(SDRC_D24), (IEN | PTD | DIS | M0)) /*SDRC_D24*/\
+ MUX_VAL(CP(SDRC_D25), (IEN | PTD | DIS | M0)) /*SDRC_D25*/\
+ MUX_VAL(CP(SDRC_D26), (IEN | PTD | DIS | M0)) /*SDRC_D26*/\
+ MUX_VAL(CP(SDRC_D27), (IEN | PTD | DIS | M0)) /*SDRC_D27*/\
+ MUX_VAL(CP(SDRC_D28), (IEN | PTD | DIS | M0)) /*SDRC_D28*/\
+ MUX_VAL(CP(SDRC_D29), (IEN | PTD | DIS | M0)) /*SDRC_D29*/\
+ MUX_VAL(CP(SDRC_D30), (IEN | PTD | DIS | M0)) /*SDRC_D30*/\
+ MUX_VAL(CP(SDRC_D31), (IEN | PTD | DIS | M0)) /*SDRC_D31*/\
+ MUX_VAL(CP(SDRC_CLK), (IEN | PTD | DIS | M0)) /*SDRC_CLK*/\
+ MUX_VAL(CP(SDRC_DQS0), (IEN | PTD | DIS | M0)) /*SDRC_DQS0*/\
+ MUX_VAL(CP(SDRC_DQS1), (IEN | PTD | DIS | M0)) /*SDRC_DQS1*/\
+ MUX_VAL(CP(SDRC_DQS2), (IEN | PTD | DIS | M0)) /*SDRC_DQS2*/\
+ MUX_VAL(CP(SDRC_DQS3), (IEN | PTD | DIS | M0)) /*SDRC_DQS3*/\
+ /*GPMC*/\
+ MUX_VAL(CP(GPMC_A1), (IDIS | PTD | DIS | M0)) /*GPMC_A1*/\
+ MUX_VAL(CP(GPMC_A2), (IDIS | PTD | DIS | M0)) /*GPMC_A2*/\
+ MUX_VAL(CP(GPMC_A3), (IDIS | PTD | DIS | M0)) /*GPMC_A3*/\
+ MUX_VAL(CP(GPMC_A4), (IDIS | PTD | DIS | M0)) /*GPMC_A4*/\
+ MUX_VAL(CP(GPMC_A5), (IDIS | PTD | DIS | M0)) /*GPMC_A5*/\
+ MUX_VAL(CP(GPMC_A6), (IDIS | PTD | DIS | M0)) /*GPMC_A6*/\
+ MUX_VAL(CP(GPMC_A7), (IDIS | PTD | DIS | M0)) /*GPMC_A7*/\
+ MUX_VAL(CP(GPMC_A8), (IDIS | PTD | DIS | M0)) /*GPMC_A8*/\
+ MUX_VAL(CP(GPMC_A9), (IDIS | PTD | DIS | M0)) /*GPMC_A9*/\
+ MUX_VAL(CP(GPMC_A10), (IDIS | PTD | DIS | M0)) /*GPMC_A10*/\
+ MUX_VAL(CP(GPMC_D0), (IEN | PTD | DIS | M0)) /*GPMC_D0*/\
+ MUX_VAL(CP(GPMC_D1), (IEN | PTD | DIS | M0)) /*GPMC_D1*/\
+ MUX_VAL(CP(GPMC_D2), (IEN | PTD | DIS | M0)) /*GPMC_D2*/\
+ MUX_VAL(CP(GPMC_D3), (IEN | PTD | DIS | M0)) /*GPMC_D3*/\
+ MUX_VAL(CP(GPMC_D4), (IEN | PTD | DIS | M0)) /*GPMC_D4*/\
+ MUX_VAL(CP(GPMC_D5), (IEN | PTD | DIS | M0)) /*GPMC_D5*/\
+ MUX_VAL(CP(GPMC_D6), (IEN | PTD | DIS | M0)) /*GPMC_D6*/\
+ MUX_VAL(CP(GPMC_D7), (IEN | PTD | DIS | M0)) /*GPMC_D7*/\
+ MUX_VAL(CP(GPMC_D8), (IEN | PTD | DIS | M0)) /*GPMC_D8*/\
+ MUX_VAL(CP(GPMC_D9), (IEN | PTD | DIS | M0)) /*GPMC_D9*/\
+ MUX_VAL(CP(GPMC_D10), (IEN | PTD | DIS | M0)) /*GPMC_D10*/\
+ MUX_VAL(CP(GPMC_D11), (IEN | PTD | DIS | M0)) /*GPMC_D11*/\
+ MUX_VAL(CP(GPMC_D12), (IEN | PTD | DIS | M0)) /*GPMC_D12*/\
+ MUX_VAL(CP(GPMC_D13), (IEN | PTD | DIS | M0)) /*GPMC_D13*/\
+ MUX_VAL(CP(GPMC_D14), (IEN | PTD | DIS | M0)) /*GPMC_D14*/\
+ MUX_VAL(CP(GPMC_D15), (IEN | PTD | DIS | M0)) /*GPMC_D15*/\
+ MUX_VAL(CP(GPMC_nCS0), (IDIS | PTU | EN | M0)) /*GPMC_nCS0*/\
+ MUX_VAL(CP(GPMC_nCS1), (IDIS | PTU | EN | M0)) /*GPMC_nCS1*/\
+ MUX_VAL(CP(GPMC_nCS2), (IDIS | PTU | EN | M0)) /*GPMC_nCS2*/\
+ MUX_VAL(CP(GPMC_nCS3), (IDIS | PTU | EN | M0)) /*GPMC_nCS3*/\
+ MUX_VAL(CP(GPMC_nCS4), (IDIS | PTU | EN | M0)) /*GPMC_nCS4 lab*/\
+ MUX_VAL(CP(GPMC_nCS5), (IDIS | PTD | DIS | M0)) /*GPMC_nCS5 lab*/\
+ MUX_VAL(CP(GPMC_nCS6), (IEN | PTD | DIS | M1)) /*sys_ndmareq1 lab*/\
+ MUX_VAL(CP(GPMC_nCS7), (IEN | PTU | EN | M1)) /*GPMC_IO_DIR lab*/\
+ MUX_VAL(CP(GPMC_CLK), (IDIS | PTD | DIS | M0)) /*GPMC_CLK*/\
+ MUX_VAL(CP(GPMC_nADV_ALE), (IDIS | PTD | DIS | M0)) /*GPMC_nADV_ALE*/\
+ MUX_VAL(CP(GPMC_nOE), (IDIS | PTD | DIS | M0)) /*GPMC_nOE*/\
+ MUX_VAL(CP(GPMC_nWE), (IDIS | PTD | DIS | M0)) /*GPMC_nWE*/\
+ MUX_VAL(CP(GPMC_nBE0_CLE), (IDIS | PTD | DIS | M0)) /*GPMC_nBE0_CLE*/\
+ MUX_VAL(CP(GPMC_nBE1), (IEN | PTD | DIS | M0)) /*GPMC_nBE1 lab*/\
+ MUX_VAL(CP(GPMC_nWP), (IEN | PTD | DIS | M0)) /*GPMC_nWP*/\
+ MUX_VAL(CP(GPMC_WAIT0), (IEN | PTU | EN | M0)) /*GPMC_WAIT0*/\
+ MUX_VAL(CP(GPMC_WAIT1), (IEN | PTU | EN | M0)) /*GPMC_WAIT1*/\
+ MUX_VAL(CP(GPMC_WAIT2), (IEN | PTU | EN | M0)) /*gpmc_nWait lab*/\
+ MUX_VAL(CP(GPMC_WAIT3), (IEN | PTU | EN | M0)) /*gpmc_nWait lab*/\
+ /*DSS*/\
+ MUX_VAL(CP(DSS_PCLK), (IDIS | PTD | DIS | M0)) /*DSS_PCLK*/\
+ MUX_VAL(CP(DSS_HSYNC), (IDIS | PTD | DIS | M0)) /*DSS_HSYNC*/\
+ MUX_VAL(CP(DSS_VSYNC), (IDIS | PTD | DIS | M0)) /*DSS_VSYNC*/\
+ MUX_VAL(CP(DSS_ACBIAS), (IDIS | PTD | DIS | M0)) /*DSS_ACBIAS*/\
+ MUX_VAL(CP(DSS_DATA0), (IDIS | PTD | DIS | M0)) /*DSS_DATA0*/\
+ MUX_VAL(CP(DSS_DATA1), (IDIS | PTD | DIS | M0)) /*DSS_DATA1*/\
+ MUX_VAL(CP(DSS_DATA2), (IDIS | PTD | DIS | M0)) /*DSS_DATA2*/\
+ MUX_VAL(CP(DSS_DATA3), (IDIS | PTD | DIS | M0)) /*DSS_DATA3*/\
+ MUX_VAL(CP(DSS_DATA4), (IDIS | PTD | DIS | M0)) /*DSS_DATA4*/\
+ MUX_VAL(CP(DSS_DATA5), (IDIS | PTD | DIS | M0)) /*DSS_DATA5*/\
+ MUX_VAL(CP(DSS_DATA6), (IDIS | PTD | DIS | M0)) /*DSS_DATA6*/\
+ MUX_VAL(CP(DSS_DATA7), (IDIS | PTD | DIS | M0)) /*DSS_DATA7*/\
+ MUX_VAL(CP(DSS_DATA8), (IDIS | PTD | DIS | M0)) /*DSS_DATA8*/\
+ MUX_VAL(CP(DSS_DATA9), (IDIS | PTD | DIS | M0)) /*DSS_DATA9*/\
+ MUX_VAL(CP(DSS_DATA10), (IDIS | PTD | DIS | M0)) /*DSS_DATA10*/\
+ MUX_VAL(CP(DSS_DATA11), (IDIS | PTD | DIS | M0)) /*DSS_DATA11*/\
+ MUX_VAL(CP(DSS_DATA12), (IDIS | PTD | DIS | M0)) /*DSS_DATA12*/\
+ MUX_VAL(CP(DSS_DATA13), (IDIS | PTD | DIS | M0)) /*DSS_DATA13*/\
+ MUX_VAL(CP(DSS_DATA14), (IDIS | PTD | DIS | M0)) /*DSS_DATA14*/\
+ MUX_VAL(CP(DSS_DATA15), (IDIS | PTD | DIS | M0)) /*DSS_DATA15*/\
+ MUX_VAL(CP(DSS_DATA16), (IDIS | PTD | DIS | M0)) /*DSS_DATA16*/\
+ MUX_VAL(CP(DSS_DATA17), (IDIS | PTD | DIS | M0)) /*DSS_DATA17*/\
+ MUX_VAL(CP(DSS_DATA18), (IDIS | PTD | DIS | M0)) /*DSS_DATA18*/\
+ MUX_VAL(CP(DSS_DATA19), (IDIS | PTD | DIS | M0)) /*DSS_DATA19*/\
+ MUX_VAL(CP(DSS_DATA20), (IDIS | PTD | DIS | M0)) /*DSS_DATA20*/\
+ MUX_VAL(CP(DSS_DATA21), (IDIS | PTD | DIS | M0)) /*DSS_DATA21*/\
+ MUX_VAL(CP(DSS_DATA22), (IDIS | PTD | DIS | M0)) /*DSS_DATA22*/\
+ MUX_VAL(CP(DSS_DATA23), (IDIS | PTD | DIS | M0)) /*DSS_DATA23*/\
+ /*CAMERA*/\
+ MUX_VAL(CP(CAM_HS ), (IEN | PTU | EN | M0)) /*CAM_HS */\
+ MUX_VAL(CP(CAM_VS ), (IEN | PTU | EN | M0)) /*CAM_VS */\
+ MUX_VAL(CP(CAM_XCLKA), (IDIS | PTD | DIS | M0)) /*CAM_XCLKA*/\
+ MUX_VAL(CP(CAM_PCLK), (IEN | PTU | EN | M0)) /*CAM_PCLK*/\
+ MUX_VAL(CP(CAM_FLD), (IDIS | PTD | DIS | M4)) /*GPIO_98 */\
+ MUX_VAL(CP(CAM_D0 ), (IEN | PTD | DIS | M0)) /*CAM_D0 */\
+ MUX_VAL(CP(CAM_D1 ), (IEN | PTD | DIS | M0)) /*CAM_D1 */\
+ MUX_VAL(CP(CAM_D2 ), (IEN | PTD | DIS | M4)) /*GPIO_101 */\
+ MUX_VAL(CP(CAM_D3 ), (IEN | PTD | DIS | M4)) /*GPIO_102 */\
+ MUX_VAL(CP(CAM_D4 ), (IEN | PTD | DIS | M4)) /*GPIO_103 */\
+ MUX_VAL(CP(CAM_D5 ), (IEN | PTD | DIS | M4)) /*GPIO_104 */\
+ MUX_VAL(CP(CAM_D6 ), (IEN | PTD | DIS | M4)) /*GPIO_105 */\
+ MUX_VAL(CP(CAM_D7 ), (IEN | PTD | DIS | M4)) /*GPIO_106 */\
+ MUX_VAL(CP(CAM_D8 ), (IEN | PTD | DIS | M4)) /*GPIO_107 */\
+ MUX_VAL(CP(CAM_D9 ), (IEN | PTD | DIS | M4)) /*GPIO_108 */\
+ MUX_VAL(CP(CAM_D10), (IEN | PTD | DIS | M4)) /*GPIO_109*/\
+ MUX_VAL(CP(CAM_D11), (IEN | PTD | DIS | M0)) /*CAM_D11*/\
+ MUX_VAL(CP(CAM_XCLKB), (IDIS | PTD | DIS | M0)) /*CAM_XCLKB*/\
+ MUX_VAL(CP(CAM_WEN), (IEN | PTD | DIS | M4)) /*GPIO_167*/\
+ MUX_VAL(CP(CAM_STROBE), (IDIS | PTD | DIS | M1)) /*GPIO_126 - lab*/\
+ MUX_VAL(CP(CSI2_DX0), (IEN | PTD | DIS | M0)) /*CSI2_DX0*/\
+ MUX_VAL(CP(CSI2_DY0), (IEN | PTD | DIS | M0)) /*CSI2_DY0*/\
+ MUX_VAL(CP(CSI2_DX1), (IEN | PTD | DIS | M0)) /*CSI2_DX1*/\
+ MUX_VAL(CP(CSI2_DY1), (IEN | PTD | DIS | M0)) /*CSI2_DY1*/\
+ /*Audio Interface */\
+ MUX_VAL(CP(McBSP2_FSX), (IEN | PTD | DIS | M0)) /*McBSP2_FSX*/\
+ MUX_VAL(CP(McBSP2_CLKX), (IEN | PTD | DIS | M0)) /*McBSP2_CLKX*/\
+ MUX_VAL(CP(McBSP2_DR), (IEN | PTD | DIS | M0)) /*McBSP2_DR*/\
+ MUX_VAL(CP(McBSP2_DX), (IDIS | PTD | DIS | M0)) /*McBSP2_DX*/\
+ /*Expansion card */\
+ MUX_VAL(CP(MMC1_CLK), (IDIS | PTD | DIS | M0)) /*MMC1_CLK*/\
+ MUX_VAL(CP(MMC1_CMD), (IEN | PTU | EN | M0)) /*MMC1_CMD*/\
+ MUX_VAL(CP(MMC1_DAT0), (IEN | PTU | EN | M0)) /*MMC1_DAT0*/\
+ MUX_VAL(CP(MMC1_DAT1), (IEN | PTU | EN | M0)) /*MMC1_DAT1*/\
+ MUX_VAL(CP(MMC1_DAT2), (IEN | PTU | EN | M0)) /*MMC1_DAT2*/\
+ MUX_VAL(CP(MMC1_DAT3), (IEN | PTU | EN | M0)) /*MMC1_DAT3*/\
+ /* sim lab */\
+ MUX_VAL(CP(MMC1_DAT4), (IEN | PTU | EN | M2)) /*sim_io lab*/\
+ MUX_VAL(CP(MMC1_DAT5), (IDIS | PTU | EN | M2)) /*sim_ck lab*/\
+ MUX_VAL(CP(MMC1_DAT6), (IDIS | PTU | EN | M2)) /*sim_pwctrl lab*/\
+ MUX_VAL(CP(MMC1_DAT7), (IDIS | PTU | EN | M2)) /*sim_rst lab*/\
+ /*uP_spi lab */\
+ MUX_VAL(CP(MMC2_CLK), (IEN | PTD | DIS | M1)) /*mcspi3_ck lab*/\
+ MUX_VAL(CP(MMC2_CMD), (IEN | PTD | DIS | M1)) /*mcspi3_simo lab*/\
+ MUX_VAL(CP(MMC2_DAT0), (IEN | PTD | DIS | M1)) /*mcspi3_somi lab*/\
+ MUX_VAL(CP(MMC2_DAT1), (IEN | PTU | EN | M4)) /*gpio_133 lab*/\
+ MUX_VAL(CP(MMC2_DAT2), (IDIS | PTD | EN | M1)) /*mcspi3_cs1 lab*/\
+ MUX_VAL(CP(MMC2_DAT3), (IEN | PTD | EN | M1)) /*mcspi3_cs0 lab*/\
+ /* MMC3 lab */\
+ MUX_VAL(CP(MMC2_DAT4), (IEN | PTU | EN | M3)) /*mmc3_dat0 lab*/\
+ MUX_VAL(CP(MMC2_DAT5), (IEN | PTU | EN | M3)) /*mmc3_dat1 lab*/\
+ MUX_VAL(CP(MMC2_DAT6), (IEN | PTU | EN | M3)) /*mmc3_dat2 lab*/\
+ MUX_VAL(CP(MMC2_DAT7), (IEN | PTU | EN | M3)) /*mmc3_dat3 lab*/\
+ /* pcm out */\
+ MUX_VAL(CP(McBSP3_DX), (IDIS | PTD | DIS | M0)) /*McBSP3_DX*/\
+ MUX_VAL(CP(McBSP3_DR), (IEN | PTD | DIS | M0)) /*McBSP3_DR*/\
+ MUX_VAL(CP(McBSP3_CLKX), (IEN | PTD | DIS | M0)) /*McBSP3_CLKX*/\
+ MUX_VAL(CP(McBSP3_FSX), (IEN | PTD | DIS | M0)) /*McBSP3_FSX*/\
+ /* uart2 */\
+ MUX_VAL(CP(UART2_CTS), (IEN | PTU | EN | M0)) /*UART2_CTS*/\
+ MUX_VAL(CP(UART2_RTS), (IDIS | PTD | DIS | M0)) /*UART2_RTS*/\
+ MUX_VAL(CP(UART2_TX), (IDIS | PTD | DIS | M0)) /*UART2_TX*/\
+ MUX_VAL(CP(UART2_RX), (IEN | PTD | DIS | M0)) /*UART2_RX*/\
+ /*Modem Interface */\
+ MUX_VAL(CP(UART1_TX), (IDIS | PTD | DIS | M0)) /*UART1_TX*/\
+ MUX_VAL(CP(UART1_RTS), (IDIS | PTD | DIS | M0)) /*UART1_RTS*/\
+ MUX_VAL(CP(UART1_CTS), (IEN | PTU | DIS | M0)) /*UART1_CTS*/\
+ MUX_VAL(CP(UART1_RX), (IEN | PTD | DIS | M0)) /*UART1_RX*/\
+ /*per irqs */\
+ MUX_VAL(CP(McBSP4_CLKX), (IEN | PTD | DIS | M4)) /*gpio_152 lab*/\
+ MUX_VAL(CP(McBSP4_DR), (IEN | PTD | DIS | M4)) /*gpio_153 lab*/\
+ MUX_VAL(CP(McBSP4_DX), (IEN | PTD | DIS | M4)) /*gpio_154 lab*/\
+ MUX_VAL(CP(McBSP4_FSX), (IDIS | PTD | DIS | M4)) /*gpio_155 lab*/\
+ /* per func*/\
+ MUX_VAL(CP(McBSP1_CLKR), (IEN | PTD | EN | M2)) /*sim_cd lab*/\
+ MUX_VAL(CP(McBSP1_FSR), (IEN | PTU | EN | M4)) /*gpio_157 lab*/\
+ MUX_VAL(CP(McBSP1_DX), (IEN | PTU | EN | M4)) /*gpio_158 lab*/\
+ MUX_VAL(CP(McBSP1_DR), (IEN | PTU | EN | M4)) /*gpio_159 lab*/\
+ MUX_VAL(CP(McBSP_CLKS), (IEN | PTU | EN | M4)) /*uart1_cts lab*/\
+ MUX_VAL(CP(McBSP1_FSX), (IEN | PTU | EN | M4)) /*gpio_161 lab*/\
+ MUX_VAL(CP(McBSP1_CLKX), (IEN | PTU | EN | M4)) /*gpio_162 lab*/\
+ /*Serial Interface*/\
+ MUX_VAL(CP(UART3_CTS_RCTX), (IEN | PTD | EN | M0)) /*UART3_CTS_RCTX */\
+ MUX_VAL(CP(UART3_RTS_SD), (IDIS | PTD | DIS | M0)) /*UART3_RTS_SD */\
+ MUX_VAL(CP(UART3_RX_IRRX ), (IEN | PTD | DIS | M0)) /*UART3_RX_IRRX*/\
+ MUX_VAL(CP(UART3_TX_IRTX ), (IDIS | PTD | DIS | M0)) /*UART3_TX_IRTX*/\
+ MUX_VAL(CP(HSUSB0_CLK), (IDIS | PTD | DIS | M0)) /*HSUSB0_CLK*/\
+ MUX_VAL(CP(HSUSB0_STP), (IDIS | PTU | EN | M0)) /*HSUSB0_STP*/\
+ MUX_VAL(CP(HSUSB0_DIR), (IEN | PTD | DIS | M0)) /*HSUSB0_DIR*/\
+ MUX_VAL(CP(HSUSB0_NXT), (IEN | PTD | DIS | M0)) /*HSUSB0_NXT*/\
+ MUX_VAL(CP(HSUSB0_DATA0), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA0 */\
+ MUX_VAL(CP(HSUSB0_DATA1), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA1 */\
+ MUX_VAL(CP(HSUSB0_DATA2), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA2 */\
+ MUX_VAL(CP(HSUSB0_DATA3), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA3 */\
+ MUX_VAL(CP(HSUSB0_DATA4), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA4 */\
+ MUX_VAL(CP(HSUSB0_DATA5), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA5 */\
+ MUX_VAL(CP(HSUSB0_DATA6), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA6 */\
+ MUX_VAL(CP(HSUSB0_DATA7), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA7 */\
+ MUX_VAL(CP(I2C1_SCL), (IEN | PTU | EN | M0)) /*I2C1_SCL*/\
+ MUX_VAL(CP(I2C1_SDA), (IEN | PTU | EN | M0)) /*I2C1_SDA*/\
+ MUX_VAL(CP(I2C2_SCL), (IEN | PTU | EN | M0)) /*I2C2_SCL*/\
+ MUX_VAL(CP(I2C2_SDA), (IEN | PTU | EN | M0)) /*I2C2_SDA*/\
+ MUX_VAL(CP(I2C3_SCL), (IEN | PTU | EN | M0)) /*I2C3_SCL*/\
+ MUX_VAL(CP(I2C3_SDA), (IEN | PTU | EN | M0)) /*I2C3_SDA*/\
+ MUX_VAL(CP(I2C4_SCL), (IEN | PTU | EN | M0)) /*I2C4_SCL*/\
+ MUX_VAL(CP(I2C4_SDA), (IEN | PTU | EN | M0)) /*I2C4_SDA*/\
+ MUX_VAL(CP(HDQ_SIO), (IEN | PTU | EN | M0)) /*HDQ_SIO*/\
+ MUX_VAL(CP(McSPI1_CLK), (IEN | PTD | DIS | M0)) /*McSPI1_CLK*/\
+ MUX_VAL(CP(McSPI1_SIMO), (IEN | PTD | DIS | M0)) /*McSPI1_SIMO */\
+ MUX_VAL(CP(McSPI1_SOMI), (IEN | PTD | DIS | M0)) /*McSPI1_SOMI */\
+ MUX_VAL(CP(McSPI1_CS0), (IEN | PTD | EN | M0)) /*McSPI1_CS0*/\
+ MUX_VAL(CP(McSPI1_CS1), (IDIS | PTD | EN | M3)) /*mmc3_cmd lab*/\
+ MUX_VAL(CP(McSPI1_CS2), (IDIS | PTD | DIS | M3)) /*mmc3_clk lab*/\
+ MUX_VAL(CP(McSPI1_CS3), (IDIS | PTD | DIS | M3)) /*hsusb2_data2 lab*/\
+ /*hsusb2 lab */\
+ MUX_VAL(CP(McSPI2_CLK), (IDIS | PTD | DIS | M3)) /*hsusb2_d7 lab*/\
+ MUX_VAL(CP(McSPI2_SIMO), (IDIS | PTD | DIS | M3)) /*hsusb2_d4 lab*/\
+ MUX_VAL(CP(McSPI2_SOMI), (IDIS | PTD | DIS | M3)) /*hsusb2_d5 lab*/\
+ MUX_VAL(CP(McSPI2_CS0), (IDIS | PTD | DIS | M3)) /*hsusb2_d6 lab*/\
+ MUX_VAL(CP(McSPI2_CS1), (IDIS | PTD | DIS | M3)) /*hsusb2_d3 lab*/\
+ /*Control and debug */\
+ MUX_VAL(CP(SYS_32K), (IEN | PTD | DIS | M0)) /*SYS_32K*/\
+ MUX_VAL(CP(SYS_CLKREQ), (IEN | PTD | DIS | M0)) /*SYS_CLKREQ*/\
+ MUX_VAL(CP(SYS_nIRQ), (IEN | PTU | EN | M0)) /*SYS_nIRQ*/\
+ MUX_VAL(CP(SYS_BOOT0), (IEN | PTD | DIS | M4)) /*GPIO_2 - */\
+ MUX_VAL(CP(SYS_BOOT1), (IEN | PTD | DIS | M4)) /*GPIO_3 */\
+ MUX_VAL(CP(SYS_BOOT2), (IEN | PTD | DIS | M4)) /*GPIO_4 - */\
+ MUX_VAL(CP(SYS_BOOT3), (IEN | PTD | DIS | M4)) /*GPIO_5 - */\
+ MUX_VAL(CP(SYS_BOOT4), (IEN | PTD | DIS | M4)) /*GPIO_6 - */\
+ MUX_VAL(CP(SYS_BOOT5), (IEN | PTD | DIS | M4)) /*GPIO_7 - */\
+ MUX_VAL(CP(SYS_BOOT6), (IDIS | PTD | DIS | M4)) /*GPIO_8 - */\
+ MUX_VAL(CP(SYS_OFF_MODE), (IEN | PTD | DIS | M0)) /*SYS_OFF_MODE */\
+ /* clkout1 to t2-hfclkin, clkout2 to usb transeiver (both 26mhz) lab */\
+ MUX_VAL(CP(SYS_CLKOUT1), (IDIS | PTD | DIS | M0)) /*sys_clkout2 lab*/\
+ MUX_VAL(CP(SYS_CLKOUT2), (IDIS | PTD | DIS | M0)) /*sys_clkout2 lab*/\
+ MUX_VAL(CP(JTAG_nTRST), (IEN | PTD | DIS | M0)) /*JTAG_nTRST*/\
+ MUX_VAL(CP(JTAG_TCK), (IEN | PTD | DIS | M0)) /*JTAG_TCK*/\
+ MUX_VAL(CP(JTAG_TMS), (IEN | PTD | DIS | M0)) /*JTAG_TMS*/\
+ MUX_VAL(CP(JTAG_TDI), (IEN | PTD | DIS | M0)) /*JTAG_TDI*/\
+ MUX_VAL(CP(JTAG_EMU0), (IDIS | PTD | DIS | M0)) /*emu0/gpio11 lab*/\
+ MUX_VAL(CP(JTAG_EMU1), (IDIS | PTD | DIS | M0)) /*emu1/gpio31 lab*/\
+ MUX_VAL(CP(ETK_CLK_ES2), (IDIS | PTU | EN | M3)) /*USB1_STP lab*/\
+ MUX_VAL(CP(ETK_CTL_ES2), (IDIS | PTD | DIS | M3)) /*USB1_CLK lab*/\
+ MUX_VAL(CP(ETK_D0_ES2 ), (IEN | PTD | DIS | M3)) /*USB1_DATA0 lab*/\
+ MUX_VAL(CP(ETK_D1_ES2 ), (IEN | PTD | DIS | M3)) /*USB1_DATA1 lab*/\
+ MUX_VAL(CP(ETK_D2_ES2 ), (IEN | PTD | DIS | M3)) /*USB1_DATA2 lab*/\
+ MUX_VAL(CP(ETK_D3_ES2 ), (IEN | PTD | DIS | M3)) /*USB1_DATA7 lab*/\
+ MUX_VAL(CP(ETK_D4_ES2 ), (IEN | PTD | DIS | M3)) /*USB1_DATA4 lab*/\
+ MUX_VAL(CP(ETK_D5_ES2 ), (IEN | PTD | DIS | M3)) /*USB1_DATA5 lab*/\
+ MUX_VAL(CP(ETK_D6_ES2 ), (IEN | PTD | DIS | M3)) /*USB1_DATA6 lab*/\
+ MUX_VAL(CP(ETK_D7_ES2 ), (IEN | PTD | DIS | M3)) /*USB1_DATA3 lab*/\
+ MUX_VAL(CP(ETK_D8_ES2 ), (IEN | PTD | DIS | M3)) /*USB1_DIR lab*/\
+ MUX_VAL(CP(ETK_D9_ES2 ), (IEN | PTD | DIS | M3)) /*USB1_NXT lab*/\
+ MUX_VAL(CP(ETK_D10_ES2), (IEN | PTD | DIS | M3)) /*USB2_CLK lab*/\
+ MUX_VAL(CP(ETK_D11_ES2), (IEN | PTD | DIS | M3)) /*USB2_STP lab*/\
+ MUX_VAL(CP(ETK_D12_ES2), (IEN | PTD | DIS | M3)) /*USB2_DIR lab*/\
+ MUX_VAL(CP(ETK_D13_ES2), (IEN | PTD | DIS | M3)) /*USB2_NXT lab*/\
+ MUX_VAL(CP(ETK_D14_ES2), (IEN | PTD | DIS | M3)) /*USB2_DATA0 lab*/\
+ MUX_VAL(CP(ETK_D15_ES2), (IEN | PTD | DIS | M3)) /*USB2_DATA1 lab*/\
+ /*Die to Die */\
+ MUX_VAL(CP(d2d_mcad0), (IEN | PTD | EN | M0)) /*d2d_mcad0*/\
+ MUX_VAL(CP(d2d_mcad1), (IEN | PTD | EN | M0)) /*d2d_mcad1*/\
+ MUX_VAL(CP(d2d_mcad2), (IEN | PTD | EN | M0)) /*d2d_mcad2*/\
+ MUX_VAL(CP(d2d_mcad3), (IEN | PTD | EN | M0)) /*d2d_mcad3*/\
+ MUX_VAL(CP(d2d_mcad4), (IEN | PTD | EN | M0)) /*d2d_mcad4*/\
+ MUX_VAL(CP(d2d_mcad5), (IEN | PTD | EN | M0)) /*d2d_mcad5*/\
+ MUX_VAL(CP(d2d_mcad6), (IEN | PTD | EN | M0)) /*d2d_mcad6*/\
+ MUX_VAL(CP(d2d_mcad7), (IEN | PTD | EN | M0)) /*d2d_mcad7*/\
+ MUX_VAL(CP(d2d_mcad8), (IEN | PTD | EN | M0)) /*d2d_mcad8*/\
+ MUX_VAL(CP(d2d_mcad9), (IEN | PTD | EN | M0)) /*d2d_mcad9*/\
+ MUX_VAL(CP(d2d_mcad10), (IEN | PTD | EN | M0)) /*d2d_mcad10*/\
+ MUX_VAL(CP(d2d_mcad11), (IEN | PTD | EN | M0)) /*d2d_mcad11*/\
+ MUX_VAL(CP(d2d_mcad12), (IEN | PTD | EN | M0)) /*d2d_mcad12*/\
+ MUX_VAL(CP(d2d_mcad13), (IEN | PTD | EN | M0)) /*d2d_mcad13*/\
+ MUX_VAL(CP(d2d_mcad14), (IEN | PTD | EN | M0)) /*d2d_mcad14*/\
+ MUX_VAL(CP(d2d_mcad15), (IEN | PTD | EN | M0)) /*d2d_mcad15*/\
+ MUX_VAL(CP(d2d_mcad16), (IEN | PTD | EN | M0)) /*d2d_mcad16*/\
+ MUX_VAL(CP(d2d_mcad17), (IEN | PTD | EN | M0)) /*d2d_mcad17*/\
+ MUX_VAL(CP(d2d_mcad18), (IEN | PTD | EN | M0)) /*d2d_mcad18*/\
+ MUX_VAL(CP(d2d_mcad19), (IEN | PTD | EN | M0)) /*d2d_mcad19*/\
+ MUX_VAL(CP(d2d_mcad20), (IEN | PTD | EN | M0)) /*d2d_mcad20*/\
+ MUX_VAL(CP(d2d_mcad21), (IEN | PTD | EN | M0)) /*d2d_mcad21*/\
+ MUX_VAL(CP(d2d_mcad22), (IEN | PTD | EN | M0)) /*d2d_mcad22*/\
+ MUX_VAL(CP(d2d_mcad23), (IEN | PTD | EN | M0)) /*d2d_mcad23*/\
+ MUX_VAL(CP(d2d_mcad24), (IEN | PTD | EN | M0)) /*d2d_mcad24*/\
+ MUX_VAL(CP(d2d_mcad25), (IEN | PTD | EN | M0)) /*d2d_mcad25*/\
+ MUX_VAL(CP(d2d_mcad26), (IEN | PTD | EN | M0)) /*d2d_mcad26*/\
+ MUX_VAL(CP(d2d_mcad27), (IEN | PTD | EN | M0)) /*d2d_mcad27*/\
+ MUX_VAL(CP(d2d_mcad28), (IEN | PTD | EN | M0)) /*d2d_mcad28*/\
+ MUX_VAL(CP(d2d_mcad29), (IEN | PTD | EN | M0)) /*d2d_mcad29*/\
+ MUX_VAL(CP(d2d_mcad30), (IEN | PTD | EN | M0)) /*d2d_mcad30*/\
+ MUX_VAL(CP(d2d_mcad31), (IEN | PTD | EN | M0)) /*d2d_mcad31*/\
+ MUX_VAL(CP(d2d_mcad32), (IEN | PTD | EN | M0)) /*d2d_mcad32*/\
+ MUX_VAL(CP(d2d_mcad33), (IEN | PTD | EN | M0)) /*d2d_mcad33*/\
+ MUX_VAL(CP(d2d_mcad34), (IEN | PTD | EN | M0)) /*d2d_mcad34*/\
+ MUX_VAL(CP(d2d_mcad35), (IEN | PTD | EN | M0)) /*d2d_mcad35*/\
+ MUX_VAL(CP(d2d_mcad36), (IEN | PTD | EN | M0)) /*d2d_mcad36*/\
+ MUX_VAL(CP(d2d_clk26mi), (IEN | PTD | DIS | M0)) /*d2d_clk26mi */\
+ MUX_VAL(CP(d2d_nrespwron ), (IEN | PTD | EN | M0)) /*d2d_nrespwron*/\
+ MUX_VAL(CP(d2d_nreswarm), (IEN | PTU | EN | M0)) /*d2d_nreswarm */\
+ MUX_VAL(CP(d2d_arm9nirq), (IEN | PTD | DIS | M0)) /*d2d_arm9nirq */\
+ MUX_VAL(CP(d2d_uma2p6fiq ), (IEN | PTD | DIS | M0)) /*d2d_uma2p6fiq*/\
+ MUX_VAL(CP(d2d_spint), (IEN | PTD | EN | M0)) /*d2d_spint*/\
+ MUX_VAL(CP(d2d_frint), (IEN | PTD | EN | M0)) /*d2d_frint*/\
+ MUX_VAL(CP(d2d_dmareq0), (IEN | PTD | DIS | M0)) /*d2d_dmareq0 */\
+ MUX_VAL(CP(d2d_dmareq1), (IEN | PTD | DIS | M0)) /*d2d_dmareq1 */\
+ MUX_VAL(CP(d2d_dmareq2), (IEN | PTD | DIS | M0)) /*d2d_dmareq2 */\
+ MUX_VAL(CP(d2d_dmareq3), (IEN | PTD | DIS | M0)) /*d2d_dmareq3 */\
+ MUX_VAL(CP(d2d_n3gtrst), (IEN | PTD | DIS | M0)) /*d2d_n3gtrst */\
+ MUX_VAL(CP(d2d_n3gtdi), (IEN | PTD | DIS | M0)) /*d2d_n3gtdi*/\
+ MUX_VAL(CP(d2d_n3gtdo), (IEN | PTD | DIS | M0)) /*d2d_n3gtdo*/\
+ MUX_VAL(CP(d2d_n3gtms), (IEN | PTD | DIS | M0)) /*d2d_n3gtms*/\
+ MUX_VAL(CP(d2d_n3gtck), (IEN | PTD | DIS | M0)) /*d2d_n3gtck*/\
+ MUX_VAL(CP(d2d_n3grtck), (IEN | PTD | DIS | M0)) /*d2d_n3grtck */\
+ MUX_VAL(CP(d2d_mstdby), (IEN | PTU | EN | M0)) /*d2d_mstdby*/\
+ MUX_VAL(CP(d2d_swakeup), (IEN | PTD | EN | M0)) /*d2d_swakeup */\
+ MUX_VAL(CP(d2d_idlereq), (IEN | PTD | DIS | M0)) /*d2d_idlereq */\
+ MUX_VAL(CP(d2d_idleack), (IEN | PTU | EN | M0)) /*d2d_idleack */\
+ MUX_VAL(CP(d2d_mwrite), (IEN | PTD | DIS | M0)) /*d2d_mwrite*/\
+ MUX_VAL(CP(d2d_swrite), (IEN | PTD | DIS | M0)) /*d2d_swrite*/\
+ MUX_VAL(CP(d2d_mread), (IEN | PTD | DIS | M0)) /*d2d_mread*/\
+ MUX_VAL(CP(d2d_sread), (IEN | PTD | DIS | M0)) /*d2d_sread*/\
+ MUX_VAL(CP(d2d_mbusflag), (IEN | PTD | DIS | M0)) /*d2d_mbusflag */\
+ MUX_VAL(CP(d2d_sbusflag), (IEN | PTD | DIS | M0)) /*d2d_sbusflag */\
+ MUX_VAL(CP(sdrc_cke0), (IDIS | PTU | EN | M0)) /*sdrc_cke0 */\
+ MUX_VAL(CP(sdrc_cke1), (IDIS | PTD | DIS | M7)) /*sdrc_cke1 not used*/
+//#endif
+
+/**********************************************************
+ * Routine: set_muxconf_regs
+ * Description: Setting up the configuration Mux registers
+ * specific to the hardware. Many pins need
+ * to be moved from protect to primary mode.
+ *********************************************************/
+void set_muxconf_regs(void)
+{
+ if(get_cpu_rev() == CPU_3430_ES2) {
+ MUX_DEFAULT_ES2();
+ }
+}
+
+/******************************************************************************
+ * Routine: update_mux()
+ * Description:Update balls which are different between boards. All should be
+ * updated to match functionality. However, I'm only updating ones
+ * which I'll be using for now. When power comes into play they
+ * all need updating.
+ *****************************************************************************/
+void update_mux(u32 btype, u32 mtype)
+{
+ /* NOTHING as of now... */
+}
+
diff --git a/board/omap3430labrador/sys_info.c b/board/omap3430labrador/sys_info.c
new file mode 100644
index 0000000000..eaeeffe8c0
--- /dev/null
+++ b/board/omap3430labrador/sys_info.c
@@ -0,0 +1,330 @@
+/*
+ * (C) Copyright 2004-2006
+ * Texas Instruments, <www.ti.com>
+ * Richard Woodruff <r-woodruff2@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR /PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/arch/cpu.h>
+#include <asm/io.h>
+#include <asm/arch/bits.h>
+#include <asm/arch/mem.h> /* get mem tables */
+#include <asm/arch/sys_proto.h>
+#include <asm/arch/sys_info.h>
+#include <i2c.h>
+
+
+/************************************************************************
+ * get_gpmc0_type() - read sysboot lines to see type of memory attached
+ ************************************************************************/
+u32 get_gpmc0_type(void)
+{
+ u32 type;
+ type = get_sysboot_value();
+// if ((type & (BIT3|BIT2)) == (BIT3|BIT2))
+ return(TYPE_NAND);
+}
+
+/****************************************************
+ * get_cpu_type() - low level get cpu type
+ * - no C globals yet.
+ ****************************************************/
+u32 get_cpu_type(void)
+{
+ return (CPU_3430);
+}
+
+/******************************************
+ * get_cpu_rev(void) - extract version info
+ ******************************************/
+u32 get_cpu_rev(void)
+{
+ u32 cpuid=0;
+ /* On ES1.0 the IDCODE register is not exposed on L4
+ * so using CPU ID to differentiate
+ * between ES2.0 and ES1.0.
+ */
+ __asm__ __volatile__("mrc p15, 0, %0, c0, c0, 0":"=r" (cpuid));
+ if((cpuid & 0xf) == 0x0)
+ return CPU_3430_ES1;
+ else
+ return CPU_3430_ES2;
+
+}
+
+/******************************************
+ * cpu_is_3410(void) - returns true for 3410
+ ******************************************/
+u32 cpu_is_3410(void)
+{
+ int status;
+ if(get_cpu_rev() < CPU_3430_ES2) {
+ return 0;
+ } else {
+ /* read scalability status and return 1 for 3410*/
+ status = __raw_readl(CONTROL_SCALABLE_OMAP_STATUS);
+ /* Check whether MPU frequency is set to 266 MHz which
+ * is nominal for 3410. If yes return true else false
+ */
+ if (((status >> 8) & 0x3) == 0x2)
+ return 1;
+ else
+ return 0;
+ }
+}
+
+/****************************************************
+ * is_mem_sdr() - return 1 if mem type in use is SDR
+ ****************************************************/
+u32 is_mem_sdr(void)
+{
+ volatile u32 *burst = (volatile u32 *)(SDRC_MR_0 + SDRC_CS0_OSET);
+ if (*burst == SDP_SDRC_MR_0_SDR)
+ return (1);
+ return (0);
+}
+
+/***********************************************************
+ * get_mem_type() - identify type of mDDR part used.
+ ***********************************************************/
+u32 get_mem_type(void)
+{
+ return (DDR_DISCRETE); /* LAB has single stacked x32 POP die */
+}
+
+/***********************************************************************
+ * get_cs0_size() - get size of chip select 0/1
+ ************************************************************************/
+u32 get_sdr_cs_size(u32 offset)
+{
+ u32 size;
+
+ /* get ram size field */
+ size = __raw_readl(SDRC_MCFG_0 + offset) >> 8;
+ size &= 0x3FF; /* remove unwanted bits */
+ size *= SZ_2M; /* find size in MB */
+ return (size);
+}
+
+/***********************************************************************
+ * get_board_type() - get board type based on current production stats.
+ * - NOTE-1-: 2 I2C EEPROMs will someday be populated with proper info.
+ * when they are available we can get info from there. This should
+ * be correct of all known boards up until today.
+ * - NOTE-2- EEPROMs are populated but they are updated very slowly. To
+ * avoid waiting on them we will use ES version of the chip to get info.
+ * A later version of the FPGA migth solve their speed issue.
+ ************************************************************************/
+u32 get_board_type(void)
+{
+ return BOARD_3430_LABRADOR;
+}
+
+/******************************************************************
+ * get_sysboot_value() - get init word settings
+ ******************************************************************/
+inline u32 get_sysboot_value(void)
+{
+ return (0x0000003F & __raw_readl(CONTROL_STATUS));
+}
+
+/***************************************************************************
+ * get_gpmc0_base() - Return current address hardware will be
+ * fetching from. The below effectively gives what is correct, its a bit
+ * mis-leading compared to the TRM. For the most general case the mask
+ * needs to be also taken into account this does work in practice.
+ * - for u-boot we currently map:
+ * -- 0 to nothing,
+ * -- 4 to flash
+ * -- 8 to enent
+ * -- c to wifi
+ ****************************************************************************/
+u32 get_gpmc0_base(void)
+{
+ u32 b;
+
+ b = __raw_readl(GPMC_CONFIG_CS0 + GPMC_CONFIG7);
+ b &= 0x1F; /* keep base [5:0] */
+ b = b << 24; /* ret 0x0b000000 */
+ return (b);
+}
+
+/*******************************************************************
+ * get_gpmc0_width() - See if bus is in x8 or x16 (mainly for nand)
+ *******************************************************************/
+u32 get_gpmc0_width(void)
+{
+ return (WIDTH_16BIT);
+}
+
+/*************************************************************************
+ * get_board_rev() - setup to pass kernel board revision information
+ * returns:(bit[0-3] sub version, higher bit[7-4] is higher version)
+ *************************************************************************/
+u32 get_board_rev(void)
+{
+ return (BOARD_3430_LABRADOR_V1);
+}
+
+/*********************************************************************
+ * display_board_info() - print banner with board info.
+ *********************************************************************/
+void display_board_info(u32 btype)
+{
+ char *bootmode[] = {
+ "NOR",
+ "ONND",
+ "NAND",
+ };
+ u32 brev = get_board_rev();
+ char cpu_3430s[] = "3430";
+ char db_ver[] = "0.0"; /* board type */
+ char mem_sdr[] = "mSDR"; /* memory type */
+ char mem_ddr[] = "mDDR";
+ char t_tst[] = "TST"; /* security level */
+ char t_emu[] = "EMU";
+ char t_hs[] = "HS";
+ char t_gp[] = "GP";
+ char unk[] = "?";
+
+#if defined(L3_165MHZ)
+ char p_l3[] = "165";
+#elif defined(L3_110MHZ)
+ char p_l3[] = "110";
+#elif defined(L3_133MHZ)
+ char p_l3[] = "133";
+#elif defined(L3_100MHZ)
+ char p_l3[] = "100"
+#endif
+
+#if defined(PRCM_PCLK_OPP1)
+ char p_cpu[] = "1";
+#elif defined(PRCM_PCLK_OPP2)
+ char p_cpu[] = "2";
+#elif defined(PRCM_PCLK_OPP3)
+ char p_cpu[] = "3";
+#elif defined(PRCM_PCLK_OPP4)
+ char p_cpu[] = "4"
+#endif
+ char *cpu_s, *db_s, *mem_s, *sec_s;
+ u32 cpu, rev, sec;
+
+ rev = get_cpu_rev();
+ cpu = get_cpu_type();
+ sec = get_device_type();
+
+ if (is_mem_sdr())
+ mem_s = mem_sdr;
+ else
+ mem_s = mem_ddr;
+
+ cpu_s = cpu_3430s;
+
+ db_s = db_ver;
+ db_s[0] += (brev >> 4) & 0xF;
+ db_s[2] += brev & 0xF;
+
+ switch (sec) {
+ case TST_DEVICE:
+ sec_s = t_tst;
+ break;
+ case EMU_DEVICE:
+ sec_s = t_emu;
+ break;
+ case HS_DEVICE:
+ sec_s = t_hs;
+ break;
+ case GP_DEVICE:
+ sec_s = t_gp;
+ break;
+ default:
+ sec_s = unk;
+ }
+
+ printf("OMAP%s-%s rev %d, CPU-OPP%s L3-%sMHz\n", cpu_s, sec_s, rev, p_cpu,
+ p_l3);
+ printf("OMAP3430LAB %s Version + %s (Boot %s)\n", db_s,
+ mem_s, bootmode[2]);
+}
+
+/********************************************************
+ * get_base(); get upper addr of current execution
+ *******************************************************/
+u32 get_base(void)
+{
+ u32 val;
+ __asm__ __volatile__("mov %0, pc \n":"=r"(val)::"memory");
+ val &= 0xF0000000;
+ val >>= 28;
+ return (val);
+}
+
+/********************************************************
+ * running_in_flash() - tell if currently running in
+ * flash.
+ *******************************************************/
+u32 running_in_flash(void)
+{
+ if (get_base() < 4)
+ return (1); /* in flash */
+ return (0); /* running in SRAM or SDRAM */
+}
+
+/********************************************************
+ * running_in_sram() - tell if currently running in
+ * sram.
+ *******************************************************/
+u32 running_in_sram(void)
+{
+ if (get_base() == 4)
+ return (1); /* in SRAM */
+ return (0); /* running in FLASH or SDRAM */
+}
+
+/********************************************************
+ * running_in_sdram() - tell if currently running in
+ * sdram.
+ *******************************************************/
+u32 running_in_sdram(void)
+{
+ if (get_base() > 4)
+ return (1); /* in sdram */
+ return (0); /* running in SRAM or FLASH */
+}
+
+/***************************************************************
+ * get_boot_type() - Is this an XIP type device or a stream one
+ * bits 4-0 specify type. Bit 5 sys mem/perif
+ ***************************************************************/
+u32 get_boot_type(void)
+{
+ u32 v;
+
+ v = get_sysboot_value() & (BIT4 | BIT3 | BIT2 | BIT1 | BIT0);
+ return v;
+}
+
+/*************************************************************
+ * get_device_type(): tell if GP/HS/EMU/TST
+ *************************************************************/
+u32 get_device_type(void)
+{
+ int mode;
+ mode = __raw_readl(CONTROL_STATUS) & (DEVICE_MASK);
+ return (mode >>= 8);
+}
diff --git a/board/omap3430labrador/syslib.c b/board/omap3430labrador/syslib.c
new file mode 100644
index 0000000000..2b16cc4768
--- /dev/null
+++ b/board/omap3430labrador/syslib.c
@@ -0,0 +1,73 @@
+/*
+ * (C) Copyright 2006
+ * Texas Instruments, <www.ti.com>
+ * Richard Woodruff <r-woodruff2@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/arch/cpu.h>
+#include <asm/io.h>
+#include <asm/arch/bits.h>
+#include <asm/arch/mem.h>
+#include <asm/arch/clocks.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/arch/sys_info.h>
+
+/************************************************************
+ * sdelay() - simple spin loop. Will be constant time as
+ * its generally used in bypass conditions only. This
+ * is necessary until timers are accessible.
+ *
+ * not inline to increase chances its in cache when called
+ *************************************************************/
+void sdelay(unsigned long loops)
+{
+ __asm__ volatile ("1:\n" "subs %0, %1, #1\n"
+ "bne 1b":"=r" (loops):"0"(loops));
+}
+
+/*****************************************************************
+ * sr32 - clear & set a value in a bit range for a 32 bit address
+ *****************************************************************/
+void sr32(u32 addr, u32 start_bit, u32 num_bits, u32 value)
+{
+ u32 tmp, msk = 0;
+ msk = 1 << num_bits;
+ --msk;
+ tmp = __raw_readl(addr) & ~(msk << start_bit);
+ tmp |= value << start_bit;
+ __raw_writel(tmp, addr);
+}
+
+/*********************************************************************
+ * wait_on_value() - common routine to allow waiting for changes in
+ * volatile regs.
+ *********************************************************************/
+u32 wait_on_value(u32 read_bit_mask, u32 match_value, u32 read_addr, u32 bound)
+{
+ u32 i = 0, val;
+ do {
+ ++i;
+ val = __raw_readl(read_addr) & read_bit_mask;
+ if (val == match_value)
+ return (1);
+ if (i == bound)
+ return (0);
+ } while (1);
+}
+
diff --git a/board/omap3430labrador/u-boot.lds b/board/omap3430labrador/u-boot.lds
new file mode 100644
index 0000000000..6c811937f7
--- /dev/null
+++ b/board/omap3430labrador/u-boot.lds
@@ -0,0 +1,58 @@
+/*
+ * January 2004 - Changed to support H4 device
+ * Copyright (c) 2004 Texas Instruments
+ *
+ * (C) Copyright 2002
+ * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+ENTRY(_start)
+SECTIONS
+{
+ . = 0x00000000;
+
+ . = ALIGN(4);
+ .text :
+ {
+ cpu/omap3/start.o (.text)
+ *(.text)
+ }
+
+ . = ALIGN(4);
+ .rodata : { *(.rodata) }
+
+ . = ALIGN(4);
+ .data : { *(.data) }
+
+ . = ALIGN(4);
+ .got : { *(.got) }
+
+ __u_boot_cmd_start = .;
+ .u_boot_cmd : { *(.u_boot_cmd) }
+ __u_boot_cmd_end = .;
+
+ . = ALIGN(4);
+ __bss_start = .;
+ .bss : { *(.bss) }
+ _end = .;
+}
diff --git a/board/omap3430sdp/Makefile b/board/omap3430sdp/Makefile
new file mode 100644
index 0000000000..361c9e94b0
--- /dev/null
+++ b/board/omap3430sdp/Makefile
@@ -0,0 +1,47 @@
+#
+# (C) Copyright 2000, 2001, 2002
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = lib$(BOARD).a
+
+OBJS := omap3430sdp.o mem.o clock.o syslib.o sys_info.o nand.o
+SOBJS := lowlevel_init.o
+
+$(LIB): $(OBJS) $(SOBJS)
+ $(AR) crv $@ $^
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
+ $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+
+-include .depend
+
+#########################################################################
diff --git a/board/omap3430sdp/clock.c b/board/omap3430sdp/clock.c
new file mode 100644
index 0000000000..66b493e36c
--- /dev/null
+++ b/board/omap3430sdp/clock.c
@@ -0,0 +1,348 @@
+/*
+ * (C) Copyright 2006
+ * Texas Instruments, <www.ti.com>
+ * Richard Woodruff <r-woodruff2@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/arch/cpu.h>
+#include <asm/io.h>
+#include <asm/arch/bits.h>
+#include <asm/arch/clocks.h>
+#include <asm/arch/mem.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/arch/sys_info.h>
+#include <environment.h>
+#include <command.h>
+
+/* Used to index into DPLL parameter tables */
+struct dpll_param {
+ unsigned int m;
+ unsigned int n;
+ unsigned int fsel;
+ unsigned int m2;
+};
+
+#define MAX_SIL_INDEX 3
+typedef struct dpll_param dpll_param;
+
+/* Following functions are exported from lowlevel_init.S */
+
+extern dpll_param * get_mpu_dpll_param();
+extern dpll_param * get_iva_dpll_param();
+extern dpll_param * get_core_dpll_param();
+extern dpll_param * get_per_dpll_param();
+
+/*************************************************************
+ * get_sys_clk_speed - determine reference oscillator speed
+ * based on known 32kHz clock and gptimer.
+ *************************************************************/
+u32 get_osc_clk_speed(void)
+{
+ u32 start, cstart, cend, cdiff, val;
+
+ val = __raw_readl(PRM_CLKSRC_CTRL);
+ /* If SYS_CLK is being divided by 2, remove for now */
+ val = (val & (~BIT7)) | BIT6;
+ __raw_writel(val, PRM_CLKSRC_CTRL);
+
+ /* enable timer2 */
+ val = __raw_readl(CM_CLKSEL_WKUP) | BIT0;
+ __raw_writel(val, CM_CLKSEL_WKUP); /* select sys_clk for GPT1 */
+
+ /* Enable I and F Clocks for GPT1 */
+ val = __raw_readl(CM_ICLKEN_WKUP) | BIT0 | BIT2;
+ __raw_writel(val, CM_ICLKEN_WKUP);
+ val = __raw_readl(CM_FCLKEN_WKUP) | BIT0;
+ __raw_writel(val, CM_FCLKEN_WKUP);
+
+ __raw_writel(0, OMAP34XX_GPT1 + TLDR); /* start counting at 0 */
+ __raw_writel(GPT_EN, OMAP34XX_GPT1 + TCLR); /* enable clock */
+ /* enable 32kHz source *//* enabled out of reset */
+ /* determine sys_clk via gauging */
+
+ start = 20 + __raw_readl(S32K_CR); /* start time in 20 cycles */
+ while (__raw_readl(S32K_CR) < start); /* dead loop till start time */
+ cstart = __raw_readl(OMAP34XX_GPT1 + TCRR); /* get start sys_clk count */
+ while (__raw_readl(S32K_CR) < (start + 20)); /* wait for 40 cycles */
+ cend = __raw_readl(OMAP34XX_GPT1 + TCRR); /* get end sys_clk count */
+ cdiff = cend - cstart; /* get elapsed ticks */
+
+ /* based on number of ticks assign speed */
+ if (cdiff > 19000)
+ return (S38_4M);
+ else if (cdiff > 15200)
+ return (S26M);
+ else if (cdiff > 13000)
+ return (S24M);
+ else if (cdiff > 9000)
+ return (S19_2M);
+ else if (cdiff > 7600)
+ return (S13M);
+ else
+ return (S12M);
+}
+
+/******************************************************************************
+ * get_sys_clkin_sel() - returns the sys_clkin_sel field value based on
+ * -- input oscillator clock frequency.
+ *
+ *****************************************************************************/
+void get_sys_clkin_sel(u32 osc_clk, u32 *sys_clkin_sel)
+{
+ if(osc_clk == S38_4M)
+ *sys_clkin_sel= 4;
+ else if(osc_clk == S26M)
+ *sys_clkin_sel = 3;
+ else if(osc_clk == S19_2M)
+ *sys_clkin_sel = 2;
+ else if(osc_clk == S13M)
+ *sys_clkin_sel = 1;
+ else if(osc_clk == S12M)
+ *sys_clkin_sel = 0;
+}
+
+/******************************************************************************
+ * prcm_init() - inits clocks for PRCM as defined in clocks.h
+ * -- called from SRAM, or Flash (using temp SRAM stack).
+ *****************************************************************************/
+void prcm_init(void)
+{
+ void (*f_lock_pll) (u32, u32, u32, u32);
+ int xip_safe, p0, p1, p2, p3;
+ u32 osc_clk=0, sys_clkin_sel;
+ extern void *_end_vect, *_start;
+ u32 clk_index, sil_index;
+ dpll_param *dpll_param_p;
+
+ f_lock_pll =
+ (void *)((u32) & _end_vect - (u32) & _start + SRAM_VECT_CODE);
+
+ xip_safe = running_in_sram();
+#ifdef CONFIG_3430VIRTIO
+ xip_safe = 1;
+#endif
+ /* Gauge the input clock speed and find out the sys_clkin_sel
+ * value corresponding to the input clock.
+ */
+ osc_clk = get_osc_clk_speed();
+ get_sys_clkin_sel(osc_clk, &sys_clkin_sel);
+
+ sr32(PRM_CLKSEL, 0, 3, sys_clkin_sel); /* set input crystal speed */
+
+ /* If the input clock is greater than 19.2M always divide/2 */
+ if(sys_clkin_sel > 2) {
+ sr32(PRM_CLKSRC_CTRL, 6, 2, 2);/* input clock divider */
+ clk_index = sys_clkin_sel/2;
+ } else {
+ sr32(PRM_CLKSRC_CTRL, 6, 2, 1);/* input clock divider */
+ clk_index = sys_clkin_sel;
+ }
+
+ sr32(PRM_CLKSRC_CTRL, 0, 2, 0);/* Bypass mode: T2 inputs a square clock */
+
+ /* The DPLL tables are defined according to sysclk value and
+ * silicon revision. The clk_index value will be used to get
+ * the values for that input sysclk from the DPLL param table
+ * and sil_index will get the values for that SysClk for the
+ * appropriate silicon rev.
+ */
+ if(cpu_is_3410())
+ sil_index = 2;
+ else {
+ if(get_cpu_rev() == CPU_3430_ES1)
+ sil_index = 0;
+ else if(get_cpu_rev() == CPU_3430_ES2)
+ sil_index = 1;
+ }
+ /* Unlock MPU DPLL (slows things down, and needed later) */
+ sr32(CM_CLKEN_PLL_MPU, 0, 3, PLL_LOW_POWER_BYPASS);
+ wait_on_value(BIT0, 0, CM_IDLEST_PLL_MPU, LDELAY);
+
+ /* Getting the base address of Core DPLL param table*/
+ dpll_param_p = (dpll_param *)get_core_dpll_param();
+ /* Moving it to the right sysclk and ES rev base */
+ dpll_param_p = dpll_param_p + MAX_SIL_INDEX*clk_index + sil_index;
+ if(xip_safe){
+ /* CORE DPLL */
+ /* sr32(CM_CLKSEL2_EMU) set override to work when asleep */
+ sr32(CM_CLKEN_PLL, 0, 3, PLL_FAST_RELOCK_BYPASS);
+ wait_on_value(BIT0, 0, CM_IDLEST_CKGEN, LDELAY);
+ /* For 3430 ES1.0 Errata 1.50, default value directly doesnt
+ work. write another value and then default value. */
+ sr32(CM_CLKSEL1_EMU, 16, 5, CORE_M3X2 + 1); /* m3x2 */
+ sr32(CM_CLKSEL1_EMU, 16, 5, CORE_M3X2); /* m3x2 */
+ sr32(CM_CLKSEL1_PLL, 27, 2, dpll_param_p->m2); /* Set M2 */
+ sr32(CM_CLKSEL1_PLL, 16, 11, dpll_param_p->m); /* Set M */
+ sr32(CM_CLKSEL1_PLL, 8, 7, dpll_param_p->n); /* Set N */
+ sr32(CM_CLKSEL1_PLL, 6, 1, 0); /* 96M Src */
+ sr32(CM_CLKSEL_CORE, 8, 4, CORE_SSI_DIV); /* ssi */
+ sr32(CM_CLKSEL_CORE, 4, 2, CORE_FUSB_DIV); /* fsusb ES1 only */
+ sr32(CM_CLKSEL_CORE, 2, 2, CORE_L4_DIV); /* l4 */
+ sr32(CM_CLKSEL_CORE, 0, 2, CORE_L3_DIV); /* l3 */
+ sr32(CM_CLKSEL_GFX, 0, 3, GFX_DIV); /* gfx */
+ sr32(CM_CLKSEL_WKUP, 1, 2, WKUP_RSM); /* reset mgr */
+ sr32(CM_CLKEN_PLL, 4, 4, dpll_param_p->fsel); /* FREQSEL */
+ sr32(CM_CLKEN_PLL, 0, 3, PLL_LOCK); /* lock mode */
+ wait_on_value(BIT0, 1, CM_IDLEST_CKGEN, LDELAY);
+ } else if(running_in_flash()){
+ /* if running from flash, jump to small relocated code area in SRAM.*/
+ p0 = __raw_readl(CM_CLKEN_PLL);
+ sr32((u32)&p0, 0, 3, PLL_FAST_RELOCK_BYPASS);
+ sr32((u32)&p0, 4, 4, dpll_param_p->fsel); /* FREQSEL */
+
+ p1 = __raw_readl(CM_CLKSEL1_PLL);
+ sr32((u32)&p1, 27, 2, dpll_param_p->m2); /* Set M2 */
+ sr32((u32)&p1, 16, 11, dpll_param_p->m); /* Set M */
+ sr32((u32)&p1, 8, 7, dpll_param_p->n); /* Set N */
+ sr32((u32)&p1, 6, 1, 0); /* set source for 96M */
+ p2 = __raw_readl(CM_CLKSEL_CORE);
+ sr32((u32)&p2, 8, 4, CORE_SSI_DIV); /* ssi */
+ sr32((u32)&p2, 4, 2, CORE_FUSB_DIV); /* fsusb ES1 only*/
+ sr32((u32)&p2, 2, 2, CORE_L4_DIV); /* l4 */
+ sr32((u32)&p2, 0, 2, CORE_L3_DIV); /* l3 */
+
+ p3 = CM_IDLEST_CKGEN;
+
+ (*f_lock_pll) (p0, p1, p2, p3);
+ }
+
+ /* PER DPLL */
+ sr32(CM_CLKEN_PLL, 16, 3, PLL_STOP);
+ wait_on_value(BIT1, 0, CM_IDLEST_CKGEN, LDELAY);
+
+ /* Getting the base address to PER DPLL param table*/
+ /* Set N */
+ dpll_param_p = (dpll_param *)get_per_dpll_param();
+ /* Moving it to the right sysclk base */
+ dpll_param_p = dpll_param_p + clk_index;
+ /* Errata 1.50 Workaround for 3430 ES1.0 only */
+ /* If using default divisors, write default divisor + 1
+ and then the actual divisor value */
+ /* Need to change it to silicon and revisino check */
+ if(1) {
+ sr32(CM_CLKSEL1_EMU, 24, 5, PER_M6X2 + 1); /* set M6 */
+ sr32(CM_CLKSEL1_EMU, 24, 5, PER_M6X2); /* set M6 */
+ sr32(CM_CLKSEL_CAM, 0, 5, PER_M5X2 + 1); /* set M5 */
+ sr32(CM_CLKSEL_CAM, 0, 5, PER_M5X2); /* set M5 */
+ sr32(CM_CLKSEL_DSS, 0, 5, PER_M4X2 + 1); /* set M4 */
+ sr32(CM_CLKSEL_DSS, 0, 5, PER_M4X2); /* set M4 */
+ sr32(CM_CLKSEL_DSS, 8, 5, PER_M3X2 + 1); /* set M3 */
+ sr32(CM_CLKSEL_DSS, 8, 5, PER_M3X2); /* set M3 */
+ sr32(CM_CLKSEL3_PLL, 0, 5, dpll_param_p->m2 + 1);/* set M2 */
+ sr32(CM_CLKSEL3_PLL, 0, 5, dpll_param_p->m2); /* set M2 */
+ }
+ else {
+ sr32(CM_CLKSEL1_EMU, 24, 5, PER_M6X2); /* set M6 */
+ sr32(CM_CLKSEL_CAM, 0, 5, PER_M5X2); /* set M5 */
+ sr32(CM_CLKSEL_DSS, 0, 5, PER_M4X2); /* set M4 */
+ sr32(CM_CLKSEL_DSS, 8, 5, PER_M3X2); /* set M3 */
+ sr32(CM_CLKSEL3_PLL, 0, 5, dpll_param_p->m2); /* set M2 */
+ }
+ sr32(CM_CLKSEL2_PLL, 8, 11, dpll_param_p->m); /* set m */
+ sr32(CM_CLKSEL2_PLL, 0, 7, dpll_param_p->n); /* set n */
+ sr32(CM_CLKEN_PLL, 20, 4, dpll_param_p->fsel);/* FREQSEL */
+ sr32(CM_CLKEN_PLL, 16, 3, PLL_LOCK); /* lock mode */
+ wait_on_value(BIT1, 2, CM_IDLEST_CKGEN, LDELAY);
+
+ /* Getting the base address to MPU DPLL param table*/
+ dpll_param_p = (dpll_param *)get_mpu_dpll_param();
+ /* Moving it to the right sysclk and ES rev base */
+ dpll_param_p = dpll_param_p + MAX_SIL_INDEX*clk_index + sil_index;
+ /* MPU DPLL (unlocked already) */
+ sr32(CM_CLKSEL2_PLL_MPU, 0, 5, dpll_param_p->m2); /* Set M2 */
+ sr32(CM_CLKSEL1_PLL_MPU, 8, 11, dpll_param_p->m); /* Set M */
+ sr32(CM_CLKSEL1_PLL_MPU, 0, 7, dpll_param_p->n); /* Set N */
+ sr32(CM_CLKEN_PLL_MPU, 4, 4, dpll_param_p->fsel); /* FREQSEL */
+ sr32(CM_CLKEN_PLL_MPU, 0, 3, PLL_LOCK); /* lock mode */
+ wait_on_value(BIT0, 1, CM_IDLEST_PLL_MPU, LDELAY);
+
+ /* Getting the base address to IVA DPLL param table*/
+ dpll_param_p = (dpll_param *)get_iva_dpll_param();
+ /* Moving it to the right sysclk and ES rev base */
+ dpll_param_p = dpll_param_p + MAX_SIL_INDEX*clk_index + sil_index;
+ /* IVA DPLL (set to 12*20=240MHz) */
+ sr32(CM_CLKEN_PLL_IVA2, 0, 3, PLL_STOP);
+ wait_on_value(BIT0, 0, CM_IDLEST_PLL_IVA2, LDELAY);
+ sr32(CM_CLKSEL2_PLL_IVA2, 0, 5, dpll_param_p->m2); /* set M2 */
+ sr32(CM_CLKSEL1_PLL_IVA2, 8, 11, dpll_param_p->m); /* set M */
+ sr32(CM_CLKSEL1_PLL_IVA2, 0, 7, dpll_param_p->n); /* set N */
+ sr32(CM_CLKEN_PLL_IVA2, 4, 4, dpll_param_p->fsel); /* FREQSEL */
+ sr32(CM_CLKEN_PLL_IVA2, 0, 3, PLL_LOCK); /* lock mode */
+ wait_on_value(BIT0, 1, CM_IDLEST_PLL_IVA2, LDELAY);
+
+ /* Set up GPTimers to sys_clk source only */
+ sr32(CM_CLKSEL_PER, 0, 8, 0xff);
+ sr32(CM_CLKSEL_WKUP, 0, 1, 1);
+
+ sdelay(5000);
+}
+
+/*****************************************************************
+ * Routine: peripheral_enable
+ * Description: Enable the clks & power for perifs (GPT2, UART1,...)
+ ******************************************************************/
+void per_clocks_enable(void)
+{
+ /* Enable GP2 timer. */
+ sr32(CM_CLKSEL_PER, 0, 1, 0x1); /* GPT2 = sys clk */
+ sr32(CM_ICLKEN_PER, 3, 1, 0x1); /* ICKen GPT2 */
+ sr32(CM_FCLKEN_PER, 3, 1, 0x1); /* FCKen GPT2 */
+
+#ifdef CFG_NS16550
+ /* Enable UART1 clocks */
+ sr32(CM_FCLKEN1_CORE, 13, 1, 0x1);
+ sr32(CM_ICLKEN1_CORE, 13, 1, 0x1);
+#endif
+#ifdef CONFIG_DRIVER_OMAP34XX_I2C
+ /* Turn on all 3 I2C clocks*/
+ sr32(CM_FCLKEN1_CORE, 15, 3, 0x7);
+ sr32(CM_ICLKEN1_CORE, 15, 3, 0x7); /* I2C1,2,3 = on */
+#endif
+ /* Enable the ICLK for 32K Sync Timer as its used in udelay */
+ sr32(CM_ICLKEN_WKUP,2, 1, 0x1);
+
+//#define CLOCKS_ALL_ON 1
+#ifdef CLOCKS_ALL_ON
+ #define FCK_IVA2_ON 0x00000001
+ #define FCK_CORE1_ON 0x03fffe29
+ #define ICK_CORE1_ON 0x3ffffffb
+ #define ICK_CORE2_ON 0x0000001f
+ #define FCK_WKUP_ON 0x000000e9
+ #define ICK_WKUP_ON 0x0000003f
+ #define FCK_DSS_ON 0x00000005 /* tv+dss1 (not dss2) */
+ #define ICK_DSS_ON 0x00000001
+ #define FCK_CAM_ON 0x00000001
+ #define ICK_CAM_ON 0x00000001
+ #define FCK_PER_ON 0x0003ffff
+ #define ICK_PER_ON 0x0003ffff
+ sr32(CM_FCLKEN_IVA2, 0, 32, FCK_IVA2_ON);
+ sr32(CM_FCLKEN1_CORE, 0, 32, FCK_CORE1_ON);
+ sr32(CM_ICLKEN1_CORE, 0, 32, ICK_CORE1_ON);
+ sr32(CM_ICLKEN2_CORE, 0, 32, ICK_CORE2_ON);
+ sr32(CM_FCLKEN_WKUP, 0, 32, FCK_WKUP_ON);
+ sr32(CM_ICLKEN_WKUP, 0, 32, ICK_WKUP_ON);
+ sr32(CM_FCLKEN_DSS, 0, 32, FCK_DSS_ON);
+ sr32(CM_ICLKEN_DSS, 0, 32, ICK_DSS_ON);
+ sr32(CM_FCLKEN_CAM, 0, 32, FCK_CAM_ON);
+ sr32(CM_ICLKEN_CAM, 0, 32, ICK_CAM_ON);
+ sr32(CM_FCLKEN_PER, 0, 32, FCK_PER_ON);
+ sr32(CM_ICLKEN_PER, 0, 32, ICK_PER_ON);
+#endif
+ sdelay(1000);
+}
diff --git a/board/omap3430sdp/config.mk b/board/omap3430sdp/config.mk
new file mode 100644
index 0000000000..03f071f247
--- /dev/null
+++ b/board/omap3430sdp/config.mk
@@ -0,0 +1,23 @@
+#
+# (C) Copyright 2006
+# Texas Instruments, <www.ti.com>
+#
+# SDP3430 board uses OMAP3430 (ARM-CortexA8) cpu
+# see http://www.ti.com/ for more information on Texas Instruments
+#
+# SDP3430 has 1 bank of 32MB or 64MB mDDR-SDRAM on CS0
+# SDP3430 has 1 bank of 32MB or 00MB mDDR-SDRAM on CS1
+# Physical Address:
+# 8000'0000 (bank0)
+# A000/0000 (bank1)
+# Linux-Kernel is expected to be at 8000'8000, entry 8000'8000
+# (mem base + reserved)
+
+# For use with external or internal boots.
+TEXT_BASE = 0x80e80000
+
+
+# Handy to get symbols to debug ROM version.
+#TEXT_BASE = 0x0
+#TEXT_BASE = 0x08000000
+#TEXT_BASE = 0x04000000
diff --git a/board/omap3430sdp/lowlevel_init.S b/board/omap3430sdp/lowlevel_init.S
new file mode 100644
index 0000000000..2fda1d9db8
--- /dev/null
+++ b/board/omap3430sdp/lowlevel_init.S
@@ -0,0 +1,358 @@
+/*
+ * Board specific setup info
+ *
+ * (C) Copyright 2004-2006
+ * Texas Instruments, <www.ti.com>
+ * Richard Woodruff <r-woodruff2@ti.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <config.h>
+#include <version.h>
+#include <asm/arch/cpu.h>
+#include <asm/arch/mem.h>
+#include <asm/arch/clocks.h>
+
+_TEXT_BASE:
+ .word TEXT_BASE /* sdram load addr from config.mk */
+
+#if !defined(CFG_NAND_BOOT) && !defined(CFG_NAND_BOOT)
+/**************************************************************************
+ * cpy_clk_code: relocates clock code into SRAM where its safer to execute
+ * R1 = SRAM destination address.
+ *************************************************************************/
+.global cpy_clk_code
+ cpy_clk_code:
+ /* Copy DPLL code into SRAM */
+ adr r0, go_to_speed /* get addr of clock setting code */
+ mov r2, #384 /* r2 size to copy (div by 32 bytes) */
+ mov r1, r1 /* r1 <- dest address (passed in) */
+ add r2, r2, r0 /* r2 <- source end address */
+next2:
+ ldmia r0!, {r3-r10} /* copy from source address [r0] */
+ stmia r1!, {r3-r10} /* copy to target address [r1] */
+ cmp r0, r2 /* until source end address [r2] */
+ bne next2
+ mov pc, lr /* back to caller */
+
+/* ****************************************************************************
+ * go_to_speed: -Moves to bypass, -Commits clock dividers, -puts dpll at speed
+ * -executed from SRAM.
+ * R0 = CM_CLKEN_PLL-bypass value
+ * R1 = CM_CLKSEL1_PLL-m, n, and divider values
+ * R2 = CM_CLKSEL_CORE-divider values
+ * R3 = CM_IDLEST_CKGEN - addr dpll lock wait
+ *
+ * Note: If core unlocks/relocks and SDRAM is running fast already it gets
+ * confused. A reset of the controller gets it back. Taking away its
+ * L3 when its not in self refresh seems bad for it. Normally, this code
+ * runs from flash before SDR is init so that should be ok.
+ ******************************************************************************/
+.global go_to_speed
+ go_to_speed:
+ stmfd sp!, {r4-r6}
+
+ /* move into fast relock bypass */
+ ldr r4, pll_ctl_add
+ str r0, [r4]
+wait1:
+ ldr r5, [r3] /* get status */
+ and r5, r5, #0x1 /* isolate core status */
+ cmp r5, #0x1 /* still locked? */
+ beq wait1 /* if lock, loop */
+
+ /* set new dpll dividers _after_ in bypass */
+ ldr r5, pll_div_add1
+ str r1, [r5] /* set m, n, m2 */
+ ldr r5, pll_div_add2
+ str r2, [r5] /* set l3/l4/.. dividers*/
+ ldr r5, pll_div_add3 /* wkup */
+ ldr r2, pll_div_val3 /* rsm val */
+ str r2, [r5]
+ ldr r5, pll_div_add4 /* gfx */
+ ldr r2, pll_div_val4
+ str r2, [r5]
+ ldr r5, pll_div_add5 /* emu */
+ ldr r2, pll_div_val5
+ str r2, [r5]
+
+ /* now prepare GPMC (flash) for new dpll speed */
+ /* flash needs to be stable when we jump back to it */
+ ldr r5, flash_cfg3_addr
+ ldr r2, flash_cfg3_val
+ str r2, [r5]
+ ldr r5, flash_cfg4_addr
+ ldr r2, flash_cfg4_val
+ str r2, [r5]
+ ldr r5, flash_cfg5_addr
+ ldr r2, flash_cfg5_val
+ str r2, [r5]
+ ldr r5, flash_cfg1_addr
+ ldr r2, [r5]
+ orr r2, r2, #0x3 /* up gpmc divider */
+ str r2, [r5]
+
+ /* lock DPLL3 and wait a bit */
+ orr r0, r0, #0x7 /* set up for lock mode */
+ str r0, [r4] /* lock */
+ nop /* ARM slow at this point working at sys_clk */
+ nop
+ nop
+ nop
+wait2:
+ ldr r5, [r3] /* get status */
+ and r5, r5, #0x1 /* isolate core status */
+ cmp r5, #0x1 /* still locked? */
+ bne wait2 /* if lock, loop */
+ nop
+ nop
+ nop
+ nop
+ ldmfd sp!, {r4-r6}
+ mov pc, lr /* back to caller, locked */
+
+_go_to_speed: .word go_to_speed
+
+/* these constants need to be close for PIC code */
+/* The Nor has to be in the Flash Base CS0 for this condition to happen */
+flash_cfg1_addr:
+ .word (GPMC_CONFIG_CS0 + GPMC_CONFIG1)
+flash_cfg3_addr:
+ .word (GPMC_CONFIG_CS0 + GPMC_CONFIG3)
+flash_cfg3_val:
+ .word STNOR_GPMC_CONFIG3
+flash_cfg4_addr:
+ .word (GPMC_CONFIG_CS0 + GPMC_CONFIG4)
+flash_cfg4_val:
+ .word STNOR_GPMC_CONFIG4
+flash_cfg5_val:
+ .word STNOR_GPMC_CONFIG5
+flash_cfg5_addr:
+ .word (GPMC_CONFIG_CS0 + GPMC_CONFIG5)
+pll_ctl_add:
+ .word CM_CLKEN_PLL
+pll_div_add1:
+ .word CM_CLKSEL1_PLL
+pll_div_add2:
+ .word CM_CLKSEL_CORE
+pll_div_add3:
+ .word CM_CLKSEL_WKUP
+pll_div_val3:
+ .word (WKUP_RSM << 1)
+pll_div_add4:
+ .word CM_CLKSEL_GFX
+pll_div_val4:
+ .word (GFX_DIV << 0)
+pll_div_add5:
+ .word CM_CLKSEL1_EMU
+pll_div_val5:
+ .word CLSEL1_EMU_VAL
+
+#endif
+
+.globl lowlevel_init
+lowlevel_init:
+ ldr sp, SRAM_STACK
+ str ip, [sp] /* stash old link register */
+ mov ip, lr /* save link reg across call */
+ bl s_init /* go setup pll,mux,memory */
+ ldr ip, [sp] /* restore save ip */
+ mov lr, ip /* restore link reg */
+
+ /* back to arch calling code */
+ mov pc, lr
+
+ /* the literal pools origin */
+ .ltorg
+
+REG_CONTROL_STATUS:
+ .word CONTROL_STATUS
+SRAM_STACK:
+ .word LOW_LEVEL_SRAM_STACK
+
+/* DPLL(1-4) PARAM TABLES */
+/* Each of the tables has M, N, FREQSEL, M2 values defined for nominal
+ * OPP (1.2V). The fields are defined according to dpll_param struct(clock.c).
+ * The values are defined for all possible sysclk and for ES1 and ES2.
+ */
+
+mpu_dpll_param:
+/* 12MHz */
+/* ES1 */
+.word 0x0FE,0x07,0x05,0x01
+/* ES2 */
+.word 0x0FA,0x05,0x07,0x01
+/* 3410 */
+.word 0x085,0x05,0x07,0x01
+
+/* 13MHz */
+/* ES1 */
+.word 0x17D,0x0C,0x03,0x01
+/* ES2 */
+.word 0x1F4,0x0C,0x03,0x01
+/* 3410 */
+.word 0x10A,0x0C,0x03,0x01
+
+/* 19.2MHz */
+/* ES1 */
+.word 0x179,0x12,0x04,0x01
+/* ES2 */
+.word 0x271,0x17,0x03,0x01
+/* 3410 */
+.word 0x14C,0x17,0x03,0x01
+
+/* 26MHz */
+/* ES1 */
+.word 0x17D,0x19,0x03,0x01
+/* ES2 */
+.word 0x0FA,0x0C,0x07,0x01
+/* 3410 */
+.word 0x085,0x0C,0x07,0x01
+
+/* 38.4MHz */
+/* ES1 */
+.word 0x1FA,0x32,0x03,0x01
+/* ES2 */
+.word 0x271,0x2F,0x03,0x01
+/* 3410 */
+.word 0x14C,0x2F,0x03,0x01
+
+
+.globl get_mpu_dpll_param
+get_mpu_dpll_param:
+ adr r0, mpu_dpll_param
+ mov pc, lr
+
+iva_dpll_param:
+/* 12MHz */
+/* ES1 */
+.word 0x07D,0x05,0x07,0x01
+/* ES2 */
+.word 0x0B4,0x05,0x07,0x01
+/* 3410 */
+.word 0x085,0x05,0x07,0x01
+
+/* 13MHz */
+/* ES1 */
+.word 0x0FA,0x0C,0x03,0x01
+/* ES2 */
+.word 0x168,0x0C,0x03,0x01
+/* 3410 */
+.word 0x10A,0x0C,0x03,0x01
+
+/* 19.2MHz */
+/* ES1 */
+.word 0x082,0x09,0x07,0x01
+/* ES2 */
+.word 0x0E1,0x0B,0x06,0x01
+/* 3410 */
+.word 0x14C,0x17,0x03,0x01
+
+/* 26MHz */
+/* ES1 */
+.word 0x07D,0x0C,0x07,0x01
+/* ES2 */
+.word 0x0B4,0x0C,0x07,0x01
+/* 3410 */
+.word 0x085,0x0C,0x07,0x01
+
+/* 38.4MHz */
+/* ES1 */
+.word 0x13F,0x30,0x03,0x01
+/* ES2 */
+.word 0x0E1,0x17,0x06,0x01
+/* 3410 */
+.word 0x14C,0x2F,0x03,0x01
+
+
+.globl get_iva_dpll_param
+get_iva_dpll_param:
+ adr r0, iva_dpll_param
+ mov pc, lr
+
+/* Core DPLL targets for L3 at 166 & L133 */
+core_dpll_param:
+/* 12MHz */
+/* ES1 */
+.word M_12_ES1,M_12_ES1,FSL_12_ES1,M2_12_ES1
+/* ES2 */
+.word M_12,N_12,FSEL_12,M2_12
+/* 3410 */
+.word M_12,N_12,FSEL_12,M2_12
+
+/* 13MHz */
+/* ES1 */
+.word M_13_ES1,N_13_ES1,FSL_13_ES1,M2_13_ES1
+/* ES2 */
+.word M_13,N_13,FSEL_13,M2_13
+/* 3410 */
+.word M_13,N_13,FSEL_13,M2_13
+
+/* 19.2MHz */
+/* ES1 */
+.word M_19p2_ES1,N_19p2_ES1,FSL_19p2_ES1,M2_19p2_ES1
+/* ES2 */
+.word M_19p2,N_19p2,FSEL_19p2,M2_19p2
+/* 3410 */
+.word M_19p2,N_19p2,FSEL_19p2,M2_19p2
+
+/* 26MHz */
+/* ES1 */
+.word M_26_ES1,N_26_ES1,FSL_26_ES1,M2_26_ES1
+/* ES2 */
+.word M_26,N_26,FSEL_26,M2_26
+/* 3410 */
+.word M_26,N_26,FSEL_26,M2_26
+
+/* 38.4MHz */
+/* ES1 */
+.word M_38p4_ES1,N_38p4_ES1,FSL_38p4_ES1,M2_38p4_ES1
+/* ES2 */
+.word M_38p4,N_38p4,FSEL_38p4,M2_38p4
+/* 3410 */
+.word M_38p4,N_38p4,FSEL_38p4,M2_38p4
+
+.globl get_core_dpll_param
+get_core_dpll_param:
+ adr r0, core_dpll_param
+ mov pc, lr
+
+/* PER DPLL values are same for both ES1 and ES2 */
+per_dpll_param:
+/* 12MHz */
+.word 0xD8,0x05,0x07,0x09
+
+/* 13MHz */
+.word 0x1B0,0x0C,0x03,0x09
+
+/* 19.2MHz */
+.word 0xE1,0x09,0x07,0x09
+
+/* 26MHz */
+.word 0xD8,0x0C,0x07,0x09
+
+/* 38.4MHz */
+.word 0xE1,0x13,0x07,0x09
+
+.globl get_per_dpll_param
+get_per_dpll_param:
+ adr r0, per_dpll_param
+ mov pc, lr
+
diff --git a/board/omap3430sdp/mem.c b/board/omap3430sdp/mem.c
new file mode 100644
index 0000000000..449aa063c7
--- /dev/null
+++ b/board/omap3430sdp/mem.c
@@ -0,0 +1,575 @@
+/*
+ * (C) Copyright 2004-2006
+ * Texas Instruments, <www.ti.com>
+ * Richard Woodruff <r-woodruff2@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/arch/cpu.h>
+#include <asm/io.h>
+#include <asm/arch/bits.h>
+#include <asm/arch/clocks.h>
+#include <asm/arch/mem.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/arch/sys_info.h>
+#include <environment.h>
+#include <command.h>
+
+/****** DATA STRUCTURES ************/
+
+/* Only One NAND allowed on board at a time.
+ * The GPMC CS Base for the same
+ */
+unsigned int nand_cs_base = 0;
+unsigned int onenand_cs_base = 0;
+unsigned int boot_flash_base = 0;
+unsigned int boot_flash_off = 0;
+unsigned int boot_flash_sec = 0;
+unsigned int boot_flash_type = 0;
+volatile unsigned int boot_flash_env_addr = 0;
+/* help common/env_flash.c */
+#ifdef ENV_IS_VARIABLE
+
+ulong NOR_FLASH_BANKS_LIST[CFG_MAX_FLASH_BANKS];
+
+int NOR_MAX_FLASH_BANKS = 0 ; /* max number of flash banks */
+
+uchar(*boot_env_get_char_spec) (int index);
+int (*boot_env_init) (void);
+int (*boot_saveenv) (void);
+void (*boot_env_relocate_spec) (void);
+
+/* StrataNor */
+extern uchar flash_env_get_char_spec(int index);
+extern int flash_env_init(void);
+extern int flash_saveenv(void);
+extern void flash_env_relocate_spec(void);
+extern char *flash_env_name_spec;
+
+/* 16 bit NAND */
+extern uchar nand_env_get_char_spec(int index);
+extern int nand_env_init(void);
+extern int nand_saveenv(void);
+extern void nand_env_relocate_spec(void);
+extern char *nand_env_name_spec;
+
+/* OneNAND */
+extern char *onenand_env;
+extern uchar onenand_env_get_char_spec(int index);
+extern int onenand_env_init(void);
+extern int onenand_saveenv(void);
+extern void onenand_env_relocate_spec(void);
+extern char *onenand_env_name_spec;
+
+/* Global fellows */
+#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+u8 is_nand = 0;
+#endif
+
+#if (CONFIG_COMMANDS & CFG_CMD_FLASH)
+u8 is_flash = 0;
+#endif
+
+#if (CONFIG_COMMANDS & CFG_CMD_ONENAND)
+u8 is_onenand = 0;
+#endif
+
+char *env_name_spec = 0;
+/* update these elsewhere */
+env_t *env_ptr = 0;
+
+#if ((CONFIG_COMMANDS&(CFG_CMD_ENV|CFG_CMD_FLASH)) == (CFG_CMD_ENV|CFG_CMD_FLASH))
+extern env_t *flash_addr;
+#endif
+
+#endif /* ENV_IS_VARIABLE */
+
+/* SDP3430 Board CS Organization
+ * Two PISMO connections are specified. PISMO1 is first and default PISMO board
+ * PISMO2 is a 2nd stacked PISMOv2 board and is meant for vendor extensions.
+ */
+static const unsigned char chip_sel[][GPMC_MAX_CS] = {
+/* GPMC CS Indices (ON=0, OFF=1)*/
+/* S8- 1 2 3 IDX CS0, CS1, CS2 .. CS7 */
+/*ON ON ON */{PISMO1_NOR, PISMO1_NAND, PISMO1_ONENAND, DBG_MPDB, 0, 0, 0, 0},
+/*ON ON OFF */{PISMO1_ONENAND, PISMO1_NAND, PISMO1_NOR, DBG_MPDB, 0, 0, 0, 0},
+/*ON OFF ON */{PISMO1_NAND, PISMO1_ONENAND, PISMO1_NOR, DBG_MPDB, 0, 0, 0, 0},
+/*ON OFF OFF */{PISMO2_CS0, PISMO1_ONENAND, PISMO1_NOR, DBG_MPDB, 0, 0, 0, 0},
+/*OFF ON ON*/{PISMO1_NOR, PISMO2_CS1, PISMO1_ONENAND, DBG_MPDB, 0, 0, 0, 0},
+/*OFF ON OFF*/{PISMO1_NOR, PISMO2_CS1, PISMO2_CS0, DBG_MPDB, 0, 0, 0, 0},
+/*OFF OFF ON*/{PISMO2_CS0, PISMO1_NOR, PISMO2_CS1, DBG_MPDB, 0, 0, 0, 0},
+/*OFF OFF OFF*/{PISMO2_CS1, PISMO1_NOR, PISMO2_CS0, DBG_MPDB, 0, 0, 0, 0}
+};
+
+/* SDP3430 V2 Board CS organization
+ * Different from SDP3430 V1. Now 4 switches used to specify CS
+ */
+static const unsigned char chip_sel_sdpv2[][GPMC_MAX_CS] = {
+/* GPMC CS Indices (ON=0, OFF=1)*/
+/* S8-1 2 3 4 IDX CS0, CS1, CS2 .. CS7 */
+/*ON ON ON ON*/{PISMO1_NOR, PISMO1_NAND, PISMO1_ONENAND, DBG_MPDB, 0, 0, 0, 0},
+/*ON ON ON OFF*/{PISMO1_ONENAND, PISMO1_NAND, PISMO1_NOR, DBG_MPDB, 0, 0, 0, 0},
+/*ON ON OFF ON */{PISMO1_NAND, PISMO1_ONENAND, PISMO1_NOR, DBG_MPDB, 0, 0, 0, 0},
+/*ON ON OFF OFF*/{PISMO1_NOR, PISMO2_CS0, PISMO2_CS1, DBG_MPDB, 0, 0, 0, 0},
+/*ON OFF ON ON*/{PISMO1_ONENAND, PISMO2_CS0, PISMO2_CS1, DBG_MPDB, 0, 0, 0, 0},
+/*ON OFF ON OFF*/{PISMO1_NAND, PISMO2_CS0, PISMO2_CS1, DBG_MPDB, 0, 0, 0, 0},
+/*ON OFF OFF ON*/{PISMO1_NOR, PISMO2_NAND_CS0, PISMO2_NAND_CS1, DBG_MPDB, 0, 0, 0, 0},
+/*ON OFF OFF OFF*/{PISMO1_ONENAND, PISMO2_NAND_CS0, PISMO2_NAND_CS1, DBG_MPDB, 0, 0, 0, 0}
+};
+
+/* Values for each of the chips */
+static u32 gpmc_mpdb[GPMC_MAX_REG] = {
+ MPDB_GPMC_CONFIG1,
+ MPDB_GPMC_CONFIG2,
+ MPDB_GPMC_CONFIG3,
+ MPDB_GPMC_CONFIG4,
+ MPDB_GPMC_CONFIG5,
+ MPDB_GPMC_CONFIG6, 0
+};
+static u32 gpmc_mpdb_v2[GPMC_MAX_REG] = {
+ SDPV2_MPDB_GPMC_CONFIG1,
+ SDPV2_MPDB_GPMC_CONFIG2,
+ SDPV2_MPDB_GPMC_CONFIG3,
+ SDPV2_MPDB_GPMC_CONFIG4,
+ SDPV2_MPDB_GPMC_CONFIG5,
+ SDPV2_MPDB_GPMC_CONFIG6, 0
+};
+static u32 gpmc_stnor[GPMC_MAX_REG] = {
+ STNOR_GPMC_CONFIG1,
+ STNOR_GPMC_CONFIG2,
+ STNOR_GPMC_CONFIG3,
+ STNOR_GPMC_CONFIG4,
+ STNOR_GPMC_CONFIG5,
+ STNOR_GPMC_CONFIG6, 0
+};
+static u32 gpmc_sibnor[GPMC_MAX_REG] = {
+ SIBNOR_GPMC_CONFIG1,
+ SIBNOR_GPMC_CONFIG2,
+ SIBNOR_GPMC_CONFIG3,
+ SIBNOR_GPMC_CONFIG4,
+ SIBNOR_GPMC_CONFIG5,
+ SIBNOR_GPMC_CONFIG6, 0
+};
+static u32 gpmc_smnand[GPMC_MAX_REG] = {
+ SMNAND_GPMC_CONFIG1,
+ SMNAND_GPMC_CONFIG2,
+ SMNAND_GPMC_CONFIG3,
+ SMNAND_GPMC_CONFIG4,
+ SMNAND_GPMC_CONFIG5,
+ SMNAND_GPMC_CONFIG6, 0
+};
+static u32 gpmc_pismo2[GPMC_MAX_REG] = {
+ P2_GPMC_CONFIG1,
+ P2_GPMC_CONFIG2,
+ P2_GPMC_CONFIG3,
+ P2_GPMC_CONFIG4,
+ P2_GPMC_CONFIG5,
+ P2_GPMC_CONFIG6, 0
+};
+static u32 gpmc_onenand[GPMC_MAX_REG] = {
+ ONENAND_GPMC_CONFIG1,
+ ONENAND_GPMC_CONFIG2,
+ ONENAND_GPMC_CONFIG3,
+ ONENAND_GPMC_CONFIG4,
+ ONENAND_GPMC_CONFIG5,
+ ONENAND_GPMC_CONFIG6, 0
+};
+
+/********** Functions ****/
+
+/* ENV Functions */
+#ifdef ENV_IS_VARIABLE
+uchar env_get_char_spec(int index)
+{
+ if (!boot_env_get_char_spec) {
+ puts("ERROR!! env_get_char_spec not available\n");
+ } else
+ return boot_env_get_char_spec(index);
+ return 0;
+}
+int env_init(void)
+{
+ if (!boot_env_init) {
+ puts("ERROR!! boot_env_init not available\n");
+ } else
+ return boot_env_init();
+ return -1;
+}
+int saveenv(void)
+{
+ if (!boot_saveenv) {
+ puts("ERROR!! boot_saveenv not available\n");
+ } else
+ return boot_saveenv();
+ return -1;
+}
+void env_relocate_spec(void)
+{
+ if (!boot_env_relocate_spec) {
+ puts("ERROR!! boot_env_relocate_spec not available\n");
+ } else
+ boot_env_relocate_spec();
+}
+#endif
+
+
+/**************************************************************************
+ * make_cs1_contiguous() - for es2 and above remap cs1 behind cs0 to allow
+ * command line mem=xyz use all memory with out discontinuous support
+ * compiled in. Could do it at the ATAG, but there really is two banks...
+ * Called as part of 2nd phase DDR init.
+ **************************************************************************/
+void make_cs1_contiguous(void)
+{
+ u32 size, a_add_low, a_add_high;
+
+ size = get_sdr_cs_size(SDRC_CS0_OSET);
+ size /= SZ_32M; /* find size to offset CS1 */
+ a_add_high = (size & 3) << 8; /* set up low field */
+ a_add_low = (size & 0x3C) >> 2; /* set up high field */
+ __raw_writel((a_add_high | a_add_low), SDRC_CS_CFG);
+
+}
+
+/********************************************************
+ * mem_ok() - test used to see if timings are correct
+ * for a part. Helps in guessing which part
+ * we are currently using.
+ *******************************************************/
+u32 mem_ok(void)
+{
+ u32 val1, val2, addr;
+ u32 pattern = 0x12345678;
+
+ addr = OMAP34XX_SDRC_CS0;
+
+ __raw_writel(0x0, addr + 0x400); /* clear pos A */
+ __raw_writel(pattern, addr); /* pattern to pos B */
+ __raw_writel(0x0, addr + 4); /* remove pattern off the bus */
+ val1 = __raw_readl(addr + 0x400); /* get pos A value */
+ val2 = __raw_readl(addr); /* get val2 */
+
+ if ((val1 != 0) || (val2 != pattern)) /* see if pos A value changed */
+ return (0);
+ else
+ return (1);
+}
+
+/********************************************************
+ * sdrc_init() - init the sdrc chip selects CS0 and CS1
+ * - early init routines, called from flash or
+ * SRAM.
+ *******************************************************/
+void sdrc_init(void)
+{
+#define EARLY_INIT 1
+ do_sdrc_init(SDRC_CS0_OSET, EARLY_INIT); /* only init up first bank here */
+}
+
+/*************************************************************************
+ * do_sdrc_init(): initialize the SDRAM for use.
+ * -code sets up SDRAM basic SDRC timings for CS0
+ * -optimal settings can be placed here, or redone after i2c
+ * inspection of board info
+ *
+ * - code called ones in C-Stack only context for CS0 and a possible 2nd
+ * time depending on memory configuration from stack+global context
+ **************************************************************************/
+void do_sdrc_init(u32 offset, u32 early)
+{
+ u32 common = 0, cs0 = 0, pmask = 0, pass_type, mtype, mono = 0;
+
+ if (offset == SDRC_CS0_OSET)
+ cs0 = common = 1; /* int regs shared between both chip select */
+
+ pass_type = IP_DDR;
+
+ /* If this is a 2nd pass init of a CS1, make it contiguous with CS0 */
+ if (!early && (((mtype = get_mem_type()) == DDR_COMBO)
+ || (mtype == DDR_STACKED))) {
+ if (mtype == DDR_COMBO) {
+ pmask = BIT2; /* if shared CKE don't use */
+ pass_type = COMBO_DDR; /* CS1 config */
+ __raw_writel((__raw_readl(SDRC_POWER)) & ~pmask,
+ SDRC_POWER);
+ }
+ make_cs1_contiguous();
+ }
+
+next_mem_type:
+ if (common) { /* do a SDRC reset between types to clear regs */
+ __raw_writel(SOFTRESET, SDRC_SYSCONFIG); /* reset sdrc */
+ wait_on_value(BIT0, BIT0, SDRC_STATUS, 12000000); /* wait on reset */
+ __raw_writel(0, SDRC_SYSCONFIG); /* clear soft reset */
+ __raw_writel(SDP_SDRC_SHARING, SDRC_SHARING);
+ /* If its a 3430 ES1.0 silicon, configure WAKEUPPROC to 1 as
+ per Errata 1.22 */
+ /* Need to change the condition to silicon and rev check */
+ if(1)
+ __raw_writel((__raw_readl(SDRC_POWER)) | WAKEUPPROC
+ , SDRC_POWER);
+#ifdef POWER_SAVE
+ __raw_writel(__raw_readl(SMS_SYSCONFIG) | SMART_IDLE,
+ SMS_SYSCONFIG);
+ __raw_writel(SDP_SDRC_SHARING | SMART_IDLE, SDRC_SHARING);
+ __raw_writel((__raw_readl(SDRC_POWER) | BIT6), SDRC_POWER);
+#endif
+ }
+
+ /* set MDCFG_0 values */
+ if ((pass_type == IP_DDR) || (pass_type == STACKED)) {
+ __raw_writel(SDP_SDRC_MDCFG_0_DDR, SDRC_MCFG_0 + offset);
+ if (mono) /* Stacked with memory on CS1 only */
+ __raw_writel(SDP_SDRC_MDCFG_MONO_DDR, SDRC_MCFG_0 + offset);
+ } else if (pass_type == COMBO_DDR) { /* (combo-CS0/CS1) */
+ __raw_writel(SDP_COMBO_MDCFG_0_DDR, SDRC_MCFG_0 + offset);
+ } else if (pass_type == IP_SDR) { /* ip sdr-CS0 */
+ __raw_writel(SDP_SDRC_MDCFG_0_SDR, SDRC_MCFG_0 + offset);
+ }
+
+ /* Set ACTIM values */
+ if (cs0) {
+ __raw_writel(SDP_SDRC_ACTIM_CTRLA_0, SDRC_ACTIM_CTRLA_0);
+ __raw_writel(SDP_SDRC_ACTIM_CTRLB_0, SDRC_ACTIM_CTRLB_0);
+ } else {
+ __raw_writel(SDP_SDRC_ACTIM_CTRLA_0, SDRC_ACTIM_CTRLA_1);
+ __raw_writel(SDP_SDRC_ACTIM_CTRLB_0, SDRC_ACTIM_CTRLB_1);
+ }
+ __raw_writel(SDP_SDRC_RFR_CTRL, SDRC_RFR_CTRL + offset);
+
+ /* init sequence for mDDR/mSDR using manual commands (DDR is different) */
+ __raw_writel(CMD_NOP, SDRC_MANUAL_0 + offset);
+ sdelay(5000); /* supposed to be 100us per design spec for mddr/msdr */
+ __raw_writel(CMD_PRECHARGE, SDRC_MANUAL_0 + offset);
+ __raw_writel(CMD_AUTOREFRESH, SDRC_MANUAL_0 + offset);
+ __raw_writel(CMD_AUTOREFRESH, SDRC_MANUAL_0 + offset);
+
+ /* Set MR0 values */
+ if (pass_type == IP_SDR)
+ __raw_writel(SDP_SDRC_MR_0_SDR, SDRC_MR_0 + offset);
+ else
+ __raw_writel(SDP_SDRC_MR_0_DDR, SDRC_MR_0 + offset);
+
+ /* setup 343x DLL values (DDR only) */
+ if (common && (pass_type != IP_SDR)) {
+ __raw_writel(SDP_SDRC_DLLAB_CTRL, SDRC_DLLA_CTRL);
+ sdelay(0x2000); /* give time to lock, at least 1000 L3 */
+ }
+ sdelay(0x1000);
+
+ if (mono) /* Used if Stacked memory is on CS1 only */
+ make_cs1_contiguous(); /* make CS1 appear at CS0 */
+
+ if (mem_ok())
+ return; /* STACKED, other configured type */
+ ++pass_type; /* IPDDR->COMBODDR->IPSDR for CS0 */
+ goto next_mem_type;
+}
+
+void enable_gpmc_config(u32 * gpmc_config, u32 gpmc_base, u32 base, u32 size)
+{
+ __raw_writel(0, GPMC_CONFIG7 + gpmc_base);
+ sdelay(1000);
+ /* Delay for settling */
+ __raw_writel(gpmc_config[0], GPMC_CONFIG1 + gpmc_base);
+ __raw_writel(gpmc_config[1], GPMC_CONFIG2 + gpmc_base);
+ __raw_writel(gpmc_config[2], GPMC_CONFIG3 + gpmc_base);
+ __raw_writel(gpmc_config[3], GPMC_CONFIG4 + gpmc_base);
+ __raw_writel(gpmc_config[4], GPMC_CONFIG5 + gpmc_base);
+ __raw_writel(gpmc_config[5], GPMC_CONFIG6 + gpmc_base);
+ /* Enable the config */
+ __raw_writel((((size & 0xF) << 8) | ((base >> 24) & 0x3F) |
+ (1 << 6)), GPMC_CONFIG7 + gpmc_base);
+ sdelay(2000);
+}
+
+/*****************************************************
+ * gpmc_init(): init gpmc bus
+ * Init GPMC for x16, MuxMode (SDRAM in x32).
+ * This code can only be executed from SRAM or SDRAM.
+ *****************************************************/
+void gpmc_init(void)
+{
+/* putting a blanket check on GPMC based on ZeBu for now */
+#ifndef CONFIG_3430ZEBU
+ u32 mux = 0, mwidth;
+ u32 *gpmc_config = NULL;
+ u32 gpmc_base = 0;
+ u32 base = 0;
+ u8 idx = 0;
+ u32 size = 0;
+ u32 f_off = CFG_MONITOR_LEN;
+ u32 f_sec = 0;
+ u32 config = 0;
+ unsigned char *config_sel = NULL;
+ u32 i=0;
+
+ mux = BIT9;
+ mwidth = get_gpmc0_width();
+
+ /* global settings */
+ __raw_writel(0x10, GPMC_SYSCONFIG); /* smart idle */
+ __raw_writel(0x0, GPMC_IRQENABLE); /* isr's sources masked */
+ __raw_writel(0, GPMC_TIMEOUT_CONTROL); /* timeout disable */
+
+ /* For SDPV2, FPGA uses WAIT1 line in active low mode */
+ if(get_board_type() == SDP_3430_V2) {
+ config = __raw_readl(GPMC_CONFIG);
+ config &= (~0xf00);
+ __raw_writel(config, GPMC_CONFIG);
+ }
+
+ /* Disable the GPMC0 config set by ROM code
+ * It conflicts with our MPDB (both at 0x08000000)
+ */
+ __raw_writel(0 , GPMC_CONFIG7 + GPMC_CONFIG_CS0);
+ sdelay(1000);
+
+ if(get_board_type() == SDP_3430_V2)
+ gpmc_config = gpmc_mpdb_v2;
+ else
+ gpmc_config = gpmc_mpdb;
+
+ /* GPMC3 is always MPDB.. need to know the chip info */
+ gpmc_base = GPMC_CONFIG_CS0 + (3 * GPMC_CONFIG_WIDTH);
+ gpmc_config[0] |= mux;
+ enable_gpmc_config(gpmc_config, gpmc_base, DEBUG_BASE, DBG_MPDB_SIZE);
+
+ /* Look up chip select map */
+ idx = get_gpmc0_type();
+ if(get_board_type() == SDP_3430_V2)
+ config_sel = (unsigned char *)(chip_sel_sdpv2[idx]);
+ else
+ config_sel = (unsigned char *)(chip_sel[idx]);
+
+ /* Initialize each chip selects timings (may be to 0) */
+ for (idx = 0; idx < GPMC_MAX_CS; idx++) {
+ gpmc_base = GPMC_CONFIG_CS0 + (idx * GPMC_CONFIG_WIDTH);
+ switch (config_sel[idx]) {
+ case PISMO1_NOR:
+ if(get_board_type() == SDP_3430_V2) {
+ gpmc_config = gpmc_sibnor;
+ f_sec = SZ_256K;
+ NOR_MAX_FLASH_BANKS = 1;
+ size = PISMO1_NOR_SIZE_SDPV2;
+ for(i=0; i < NOR_MAX_FLASH_BANKS; i++)
+ NOR_FLASH_BANKS_LIST[i] =
+ FLASH_BASE_SDPV2 + PHYS_FLASH_SIZE_SDPV2*i;
+ }
+ else {
+ gpmc_config = gpmc_stnor;
+ f_sec = SZ_128K;
+ NOR_MAX_FLASH_BANKS = 2;
+ size = PISMO1_NOR_SIZE;
+ for(i=0; i < NOR_MAX_FLASH_BANKS; i++)
+ NOR_FLASH_BANKS_LIST[i] =
+ FLASH_BASE_SDPV1 + PHYS_FLASH_SIZE*i;
+ }
+ gpmc_config[0] |= mux | TYPE_NOR | mwidth;
+ base = NOR_FLASH_BANKS_LIST[0];
+ is_flash = 1;
+ break;
+#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+ case PISMO1_NAND:
+ base = PISMO1_NAND_BASE;
+ size = PISMO1_NAND_SIZE;
+ gpmc_config = gpmc_smnand;
+ nand_cs_base = gpmc_base;
+ f_off = SMNAND_ENV_OFFSET;
+ is_nand = 1;
+ break;
+#endif
+ case PISMO2_CS0:
+ case PISMO2_CS1:
+ base = PISMO2_BASE;
+ size = PISMO2_SIZE;
+ gpmc_config = gpmc_pismo2;
+ gpmc_config[0] |= mux | TYPE_NOR | mwidth;
+ break;
+/* Either OneNand or Normal Nand at a time!! */
+#if (CONFIG_COMMANDS & CFG_CMD_ONENAND)
+ case PISMO1_ONENAND:
+ base = PISMO1_ONEN_BASE;
+ size = PISMO1_ONEN_SIZE;
+ gpmc_config = gpmc_onenand;
+ onenand_cs_base = gpmc_base;
+ f_off = ONENAND_ENV_OFFSET;
+ is_onenand = 1;
+ break;
+#endif
+ default:
+ /* MPDB/Unsupported/Corrupt config- try Next GPMC CS!!!! */
+ continue;
+ }
+
+ /* handle boot CS0 */
+ if (idx == 0) {
+ boot_flash_base = base;
+ boot_flash_off = f_off;
+ boot_flash_sec = f_sec;
+ boot_flash_type = config_sel[idx];
+ boot_flash_env_addr = f_off;
+#ifdef ENV_IS_VARIABLE
+ switch (config_sel[0]) {
+ case PISMO1_NOR:
+ boot_env_get_char_spec =
+ flash_env_get_char_spec;
+ boot_env_init = flash_env_init;
+ boot_saveenv = flash_saveenv;
+ boot_env_relocate_spec =
+ flash_env_relocate_spec;
+ flash_addr = env_ptr =
+ (env_t *) (boot_flash_base +
+ boot_flash_off);
+ env_name_spec = flash_env_name_spec;
+ boot_flash_env_addr = (u32) flash_addr;
+ break;
+#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+ case PISMO1_NAND:
+ boot_env_get_char_spec = nand_env_get_char_spec;
+ boot_env_init = nand_env_init;
+ boot_saveenv = nand_saveenv;
+ boot_env_relocate_spec = nand_env_relocate_spec;
+ env_ptr = 0; /* This gets filled elsewhere!! */
+ env_name_spec = nand_env_name_spec;
+ break;
+#endif
+#if (CONFIG_COMMANDS & CFG_CMD_ONENAND)
+ case PISMO1_ONENAND:
+ boot_env_get_char_spec =
+ onenand_env_get_char_spec;
+ boot_env_init = onenand_env_init;
+ boot_saveenv = onenand_saveenv;
+ boot_env_relocate_spec =
+ onenand_env_relocate_spec;
+ env_ptr =
+ (env_t *) onenand_env;
+ env_name_spec = onenand_env_name_spec;
+ break;
+#endif
+ default:
+ /* unknown variant!! */
+ puts("Unknown Boot chip!!!\n");
+ break;
+ }
+#endif /* ENV_IS_VARIABLE */
+ }
+ enable_gpmc_config(gpmc_config, gpmc_base, base, size);
+ }
+#endif
+}
diff --git a/board/omap3430sdp/nand.c b/board/omap3430sdp/nand.c
new file mode 100644
index 0000000000..8f3ead5f71
--- /dev/null
+++ b/board/omap3430sdp/nand.c
@@ -0,0 +1,232 @@
+/*
+ * (C) Copyright 2004-2006
+ * Texas Instruments, <www.ti.com>
+ * Rohit Choraria <rohitkc@ti.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+
+#include <asm/io.h>
+
+#include <asm/arch/cpu.h>
+#include <asm/arch/mem.h>
+
+#if (CONFIG_COMMANDS & CFG_CMD_NAND) && !defined(CFG_NAND_LEGACY)
+
+#include <nand.h>
+
+unsigned char cs;
+volatile unsigned long gpmc_cs_base_add;
+
+/*
+ * omap_nand_hwcontrol - Set the address pointers corretly for the
+ * following address/data/command operation
+ * @mtd: MTD device structure
+ * @ctrl: Says whether Address or Command or Data is following.
+ */
+
+static void omap_nand_hwcontrol(struct mtd_info *mtd, int ctrl)
+{
+ register struct nand_chip *this = mtd->priv;
+
+
+/*
+ * Point the IO_ADDR to DATA and ADDRESS registers instead of chip address
+ */
+ switch (ctrl) {
+ case NAND_CTL_SETCLE:
+ this->IO_ADDR_W = (void *) gpmc_cs_base_add + GPMC_NAND_CMD;
+ this->IO_ADDR_R = (void *) gpmc_cs_base_add + GPMC_NAND_DAT;
+ break;
+ case NAND_CTL_SETALE:
+ this->IO_ADDR_W = (void *) gpmc_cs_base_add + GPMC_NAND_ADR;
+ this->IO_ADDR_R = (void *) gpmc_cs_base_add + GPMC_NAND_DAT;
+ break;
+ case NAND_CTL_CLRCLE:
+ this->IO_ADDR_W = (void *) gpmc_cs_base_add + GPMC_NAND_DAT;
+ this->IO_ADDR_R = (void *) gpmc_cs_base_add + GPMC_NAND_DAT;
+ break;
+ case NAND_CTL_CLRALE:
+ this->IO_ADDR_W = (void *) gpmc_cs_base_add + GPMC_NAND_DAT;
+ this->IO_ADDR_R = (void *) gpmc_cs_base_add + GPMC_NAND_DAT;
+ break;
+ }
+}
+
+/*
+ * omap_nand_wait - called primarily after a program/erase operation
+ * so that we access NAND again only after the device
+ * is ready again.
+ * @mtd: MTD device structure
+ * @chip: nand_chip structure
+ * @state: State from which wait function is being called i.e write/erase.
+ */
+static int omap_nand_wait(struct mtd_info *mtd, struct nand_chip *chip, int state)
+{
+ register struct nand_chip *this = mtd->priv;
+ int status = 0;
+
+ this->IO_ADDR_W = (void *) gpmc_cs_base_add + GPMC_NAND_CMD;
+ this->IO_ADDR_R = (void *) gpmc_cs_base_add + GPMC_NAND_DAT;
+ /* Send the status command and loop until the device is free */
+ while(!(status & 0x40)){
+ __raw_writeb(NAND_CMD_STATUS & 0xFF, this->IO_ADDR_W);
+ status = __raw_readb(this->IO_ADDR_R);
+ }
+ return status;
+}
+
+/*
+ * omap_nand_dev_ready - Wait for the NAND device to exit busy state
+ * by polling on RDY/BSY signal
+ * @mtd: MTD device structure
+ */
+static int omap_nand_dev_ready(struct mtd_info *mtd)
+{
+ unsigned int wait_status = 0;
+
+ /* busy loop until NAND device is RDY again */
+ while(!(wait_status & (1 << (cs + 8))))
+ wait_status = __raw_readl(GPMC_IRQSTATUS);
+ /* clear the status register for further usage */
+ __raw_writel(1 << (cs + 8), GPMC_IRQSTATUS);
+ return 1;
+}
+
+
+
+/*
+ * omap_nand_write_buf - write buffer to NAND controller
+ * @mtd: MTD device structure
+ * @buf: data buffer
+ * @len: number of bytes to write
+ *
+ */
+
+static void omap_nand_write_buf(struct mtd_info *mtd, const uint8_t * buf,
+ int len)
+{
+ int i;
+ int j=0;
+ struct nand_chip *chip = mtd->priv;
+
+ for (i = 0; i < len; i++) {
+ writeb(buf[i], chip->IO_ADDR_W);
+ for(j=0;j<10;j++);
+ }
+
+}
+
+/*
+ * omap_nand_read_buf - read data from NAND controller into buffer
+ * @mtd: MTD device structure
+ * @buf: buffer to store date
+ * @len: number of bytes to read
+ *
+ */
+
+static void omap_nand_read_buf(struct mtd_info *mtd, uint8_t * buf, int len)
+{
+ int i;
+ int j=0;
+ struct nand_chip *chip = mtd->priv;
+
+ for (i = 0; i < len; i++) {
+ buf[i] = readb(chip->IO_ADDR_R);
+ for(j=0;j<10;j++);
+ }
+
+}
+
+/*
+ * Board-specific NAND initialization. The following members of the
+ * argument are board-specific (per include/linux/mtd/nand_new.h):
+ * - IO_ADDR_R?: address to read the 8 I/O lines of the flash device
+ * - IO_ADDR_W?: address to write the 8 I/O lines of the flash device
+ * - hwcontrol: hardwarespecific function for accesing control-lines
+ * - dev_ready: hardwarespecific function for accesing device ready/busy line
+ * - enable_hwecc?: function to enable (reset) hardware ecc generator. Must
+ * only be provided if a hardware ECC is available
+ * - eccmode: mode of ecc, see defines
+ * - chip_delay: chip dependent delay for transfering data from array to
+ * read regs (tR)
+ * - options: various chip options. They can partly be set to inform
+ * nand_scan about special functionality. See the defines for further
+ * explanation
+ * Members with a "?" were not set in the merged testing-NAND branch,
+ * so they are not set here either.
+ */
+void board_nand_init(struct nand_chip *nand)
+{
+ int gpmc_config=0;
+ cs = 0;
+ while (cs <= GPMC_MAX_CS) {
+ /* Each GPMC set for a single CS is at offset 0x30 */
+ /* already remapped for us */
+ gpmc_cs_base_add = (GPMC_CONFIG_CS0 + (cs*0x30));
+ /* xloader/Uboot would have written the NAND type for us
+ * -NOTE This is a temporary measure and cannot handle ONENAND.
+ * The proper way of doing this is to pass the setup of u-boot up to kernel
+ * using kernel params - something on the lines of machineID
+ */
+ /* Check if NAND type is set */
+ if ((__raw_readl(gpmc_cs_base_add + GPMC_CONFIG1) & 0xC00)==0x800) {
+ /* Found it!! */
+ break;
+ }
+ cs++;
+ }
+ if (cs > GPMC_MAX_CS) {
+ printk ("NAND: Unable to find NAND settings in GPMC Configuration - quitting\n");
+ }
+
+ gpmc_config = __raw_readl(GPMC_CONFIG);
+ /* Disable Write protect */
+ gpmc_config |= 0x10;
+ __raw_writel(gpmc_config, GPMC_CONFIG);
+
+
+ nand->IO_ADDR_R = gpmc_cs_base_add + GPMC_NAND_DAT;
+ nand->IO_ADDR_W = gpmc_cs_base_add + GPMC_NAND_CMD;
+
+ nand->hwcontrol = omap_nand_hwcontrol;
+ nand->options = NAND_SAMSUNG_LP_OPTIONS;
+ nand->read_buf = omap_nand_read_buf;
+ nand->write_buf = omap_nand_write_buf;
+ nand->eccmode = NAND_ECC_SOFT;
+/* if RDY/BSY line is connected to OMAP then use the omap ready funcrtion
+ * and the generic nand_wait function which reads the status register after
+ * monitoring the RDY/BSY line. Otherwise use a standard chip delay which
+ * is slightly more than tR (AC Timing) of the NAND device and read the
+ * status register until you get a failure or success
+ */
+
+#if 0
+ nand->dev_ready = omap_nand_dev_ready;
+#else
+ nand->waitfunc = omap_nand_wait;
+ nand->chip_delay = 50;
+#endif
+}
+
+
+#endif /* (CONFIG_COMMANDS & CFG_CMD_NAND) */
+
diff --git a/board/omap3430sdp/omap3430sdp.c b/board/omap3430sdp/omap3430sdp.c
new file mode 100644
index 0000000000..7d277ca9cb
--- /dev/null
+++ b/board/omap3430sdp/omap3430sdp.c
@@ -0,0 +1,1113 @@
+/*
+ * (C) Copyright 2004-2006
+ * Texas Instruments, <www.ti.com>
+ * Richard Woodruff <r-woodruff2@ti.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#include <common.h>
+#include <asm/arch/cpu.h>
+#include <asm/io.h>
+#include <asm/arch/bits.h>
+#include <asm/arch/mux.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/arch/sys_info.h>
+#include <asm/arch/clocks.h>
+#include <asm/arch/mem.h>
+#include <i2c.h>
+#include <asm/mach-types.h>
+#if (CONFIG_COMMANDS & CFG_CMD_NAND) && defined(CFG_NAND_LEGACY)
+#include <linux/mtd/nand_legacy.h>
+extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
+#endif
+
+/*******************************************************
+ * Routine: delay
+ * Description: spinning delay to use before udelay works
+ ******************************************************/
+static inline void delay(unsigned long loops)
+{
+ __asm__ volatile ("1:\n" "subs %0, %1, #1\n"
+ "bne 1b":"=r" (loops):"0"(loops));
+}
+
+/*****************************************
+ * Routine: board_init
+ * Description: Early hardware init.
+ *****************************************/
+int board_init(void)
+{
+ DECLARE_GLOBAL_DATA_PTR;
+
+ gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
+ gd->bd->bi_arch_number = MACH_TYPE_OMAP_3430SDP; /* board id for Linux */
+ gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); /* boot param addr */
+
+ return 0;
+}
+
+/*****************************************
+ * Routine: secure_unlock
+ * Description: Setup security registers for access
+ * (GP Device only)
+ *****************************************/
+void secure_unlock_mem(void)
+{
+ /* Permission values for registers -Full fledged permissions to all */
+ #define UNLOCK_1 0xFFFFFFFF
+ #define UNLOCK_2 0x00000000
+ #define UNLOCK_3 0x0000FFFF
+
+ /* Protection Module Register Target APE (PM_RT)*/
+ __raw_writel(UNLOCK_1, RT_REQ_INFO_PERMISSION_1);
+ __raw_writel(UNLOCK_1, RT_READ_PERMISSION_0);
+ __raw_writel(UNLOCK_1, RT_WRITE_PERMISSION_0);
+ __raw_writel(UNLOCK_2, RT_ADDR_MATCH_1);
+
+ __raw_writel(UNLOCK_3, GPMC_REQ_INFO_PERMISSION_0);
+ __raw_writel(UNLOCK_3, GPMC_READ_PERMISSION_0);
+ __raw_writel(UNLOCK_3, GPMC_WRITE_PERMISSION_0);
+
+ __raw_writel(UNLOCK_3, OCM_REQ_INFO_PERMISSION_0);
+ __raw_writel(UNLOCK_3, OCM_READ_PERMISSION_0);
+ __raw_writel(UNLOCK_3, OCM_WRITE_PERMISSION_0);
+ __raw_writel(UNLOCK_2, OCM_ADDR_MATCH_2);
+
+ /* IVA Changes */
+ __raw_writel(UNLOCK_3, IVA2_REQ_INFO_PERMISSION_0);
+ __raw_writel(UNLOCK_3, IVA2_READ_PERMISSION_0);
+ __raw_writel(UNLOCK_3, IVA2_WRITE_PERMISSION_0);
+
+ __raw_writel(UNLOCK_3, IVA2_REQ_INFO_PERMISSION_1);
+ __raw_writel(UNLOCK_3, IVA2_READ_PERMISSION_1);
+ __raw_writel(UNLOCK_3, IVA2_WRITE_PERMISSION_1);
+
+ __raw_writel(UNLOCK_3, IVA2_REQ_INFO_PERMISSION_2);
+ __raw_writel(UNLOCK_3, IVA2_READ_PERMISSION_2);
+ __raw_writel(UNLOCK_3, IVA2_WRITE_PERMISSION_2);
+
+ __raw_writel(UNLOCK_3, IVA2_REQ_INFO_PERMISSION_3);
+ __raw_writel(UNLOCK_3, IVA2_READ_PERMISSION_3);
+ __raw_writel(UNLOCK_3, IVA2_WRITE_PERMISSION_3);
+
+ __raw_writel(UNLOCK_1, SMS_RG_ATT0); /* SDRC region 0 public */
+}
+
+
+/**********************************************************
+ * Routine: secureworld_exit()
+ * Description: If chip is EMU and boot type is external
+ * configure secure registers and exit secure world
+ * general use.
+ ***********************************************************/
+void secureworld_exit()
+{
+ unsigned long i;
+
+ /* configrue non-secure access control register */
+ __asm__ __volatile__("mrc p15, 0, %0, c1, c1, 2":"=r" (i));
+ /* enabling co-processor CP10 and CP11 accesses in NS world */
+ __asm__ __volatile__("orr %0, %0, #0xC00":"=r"(i));
+ /* allow allocation of locked TLBs and L2 lines in NS world */
+ /* allow use of PLE registers in NS world also */
+ __asm__ __volatile__("orr %0, %0, #0x70000":"=r"(i));
+ __asm__ __volatile__("mcr p15, 0, %0, c1, c1, 2":"=r" (i));
+
+ /* Enable ASA in ACR register */
+ __asm__ __volatile__("mrc p15, 0, %0, c1, c0, 1":"=r" (i));
+ __asm__ __volatile__("orr %0, %0, #0x10":"=r"(i));
+ __asm__ __volatile__("mcr p15, 0, %0, c1, c0, 1":"=r" (i));
+
+ /* Exiting secure world */
+ __asm__ __volatile__("mrc p15, 0, %0, c1, c1, 0":"=r" (i));
+ __asm__ __volatile__("orr %0, %0, #0x31":"=r"(i));
+ __asm__ __volatile__("mcr p15, 0, %0, c1, c1, 0":"=r" (i));
+}
+
+/**********************************************************
+ * Routine: setup_auxcr()
+ * Description: Write to AuxCR desired value using SMI.
+ * general use.
+ ***********************************************************/
+void setup_auxcr()
+{
+ unsigned long i;
+ volatile unsigned int j;
+ /* Save r0, r12 and restore them after usage */
+ __asm__ __volatile__("mov %0, r12":"=r" (j));
+ __asm__ __volatile__("mov %0, r0":"=r" (i));
+
+ /* GP Device ROM code API usage here */
+ /* r12 = AUXCR Write function and r0 value */
+ __asm__ __volatile__("mov r12, #0x3");
+ __asm__ __volatile__("mrc p15, 0, r0, c1, c0, 1");
+ /* Enabling ASA */
+ __asm__ __volatile__("orr r0, r0, #0x10");
+ /* SMI instruction to call ROM Code API */
+ __asm__ __volatile__(".word 0xE1600070");
+ __asm__ __volatile__("mov r0, %0":"=r" (i));
+ __asm__ __volatile__("mov r12, %0":"=r" (j));
+}
+
+/**********************************************************
+ * Routine: try_unlock_sram()
+ * Description: If chip is GP/EMU(special) type, unlock the SRAM for
+ * general use.
+ ***********************************************************/
+void try_unlock_memory()
+{
+ int mode;
+ int in_sdram = running_in_sdram();
+
+ /* if GP device unlock device SRAM for general use */
+ /* secure code breaks for Secure/Emulation device - HS/E/T*/
+ mode = get_device_type();
+ if (mode == GP_DEVICE) {
+ secure_unlock_mem();
+ }
+ /* If device is EMU and boot is XIP external booting
+ * Unlock firewalls and disable L2 and put chip
+ * out of secure world
+ */
+ /* Assuming memories are unlocked by the demon who put us in SDRAM */
+ if ((mode <= EMU_DEVICE) && (get_boot_type() == 0x1F)
+ && (!in_sdram)) {
+ secure_unlock_mem();
+ secureworld_exit();
+ }
+
+ return;
+}
+
+/**********************************************************
+ * Routine: s_init
+ * Description: Does early system init of muxing and clocks.
+ * - Called path is with SRAM stack.
+ **********************************************************/
+void s_init(void)
+{
+ int i;
+ int external_boot = 0;
+ int in_sdram = running_in_sdram();
+
+#ifdef CONFIG_3430VIRTIO
+ in_sdram = 0; /* allow setup from memory for Virtio */
+#endif
+ watchdog_init();
+
+ external_boot = (get_boot_type() == 0x1F) ? 1 : 0;
+ /* Right now flushing at low MPU speed. Need to move after clock init */
+ v7_flush_dcache_all(get_device_type(), external_boot);
+
+ try_unlock_memory();
+
+#ifdef CONFIG_3430_AS_3410
+ /* setup the scalability control register for
+ * 3430 to work in 3410 mode
+ */
+ __raw_writel(0x5ABF, CONTROL_SCALABLE_OMAP_OCP);
+#endif
+
+ if (cpu_is_3410()) {
+ /* Lock down 6-ways in L2 cache so that effective size of L2 is 64K */
+ __asm__ __volatile__("mov %0, #0xFC":"=r" (i));
+ __asm__ __volatile__("mcr p15, 1, %0, c9, c0, 0":"=r" (i));
+ }
+
+#ifndef CONFIG_ICACHE_OFF
+ icache_enable();
+#endif
+
+#ifdef CONFIG_L2_OFF
+ l2cache_disable();
+#else
+ l2cache_enable();
+#endif
+ /* Writing to AuxCR in U-boot using SMI for GP DEV */
+ /* Currently SMI in Kernel on ES2 devices seems to have an isse
+ * Once that is resolved, we can postpone this config to kernel
+ */
+ if(get_device_type() == GP_DEVICE)
+ setup_auxcr();
+
+ set_muxconf_regs();
+ delay(100);
+
+ prcm_init();
+
+ per_clocks_enable();
+
+ if (!in_sdram)
+ sdrc_init();
+}
+
+/*******************************************************
+ * Routine: misc_init_r
+ * Description: Init ethernet (done here so udelay works)
+ ********************************************************/
+int misc_init_r(void)
+{
+#ifdef CONFIG_DRIVER_OMAP34XX_I2C
+ i2c_init(CFG_I2C_SPEED, CFG_I2C_SLAVE);
+#endif
+ ether_init(); /* better done here so timers are init'ed */
+ return (0);
+}
+
+/******************************************************
+ * Routine: wait_for_command_complete
+ * Description: Wait for posting to finish on watchdog
+ ******************************************************/
+void wait_for_command_complete(unsigned int wd_base)
+{
+ int pending = 1;
+ do {
+ pending = __raw_readl(wd_base + WWPS);
+ } while (pending);
+}
+
+/****************************************
+ * Routine: watchdog_init
+ * Description: Shut down watch dogs
+ *****************************************/
+void watchdog_init(void)
+{
+ /* There are 3 watch dogs WD1=Secure, WD2=MPU, WD3=IVA. WD1 is
+ * either taken care of by ROM (HS/EMU) or not accessible (GP).
+ * We need to take care of WD2-MPU or take a PRCM reset. WD3
+ * should not be running and does not generate a PRCM reset.
+ */
+
+ sr32(CM_FCLKEN_WKUP, 5, 1, 1);
+ sr32(CM_ICLKEN_WKUP, 5, 1, 1);
+ wait_on_value(BIT5, 0x20, CM_IDLEST_WKUP, 5); /* some issue here */
+
+ __raw_writel(WD_UNLOCK1, WD2_BASE + WSPR);
+ wait_for_command_complete(WD2_BASE);
+ __raw_writel(WD_UNLOCK2, WD2_BASE + WSPR);
+}
+
+/*******************************************************************
+ * Routine:ether_init
+ * Description: take the Ethernet controller out of reset and wait
+ * for the EEPROM load to complete.
+ ******************************************************************/
+void ether_init(void)
+{
+#ifdef CONFIG_DRIVER_LAN91C96
+ int cnt = 20;
+
+ __raw_writew(0x0, LAN_RESET_REGISTER);
+ do {
+ __raw_writew(0x1, LAN_RESET_REGISTER);
+ udelay(100);
+ if (cnt == 0)
+ goto h4reset_err_out;
+ --cnt;
+ } while (__raw_readw(LAN_RESET_REGISTER) != 0x1);
+
+ cnt = 20;
+
+ do {
+ __raw_writew(0x0, LAN_RESET_REGISTER);
+ udelay(100);
+ if (cnt == 0)
+ goto h4reset_err_out;
+ --cnt;
+ } while (__raw_readw(LAN_RESET_REGISTER) != 0x0000);
+ udelay(1000);
+
+ *((volatile unsigned char *)ETH_CONTROL_REG) &= ~0x01;
+ udelay(1000);
+
+ h4reset_err_out:
+ return;
+#endif
+}
+
+/**********************************************
+ * Routine: dram_init
+ * Description: sets uboots idea of sdram size
+ **********************************************/
+int dram_init(void)
+{
+ #define NOT_EARLY 0
+ DECLARE_GLOBAL_DATA_PTR;
+ unsigned int size0 = 0, size1 = 0;
+ u32 mtype, btype;
+
+ btype = get_board_type();
+ mtype = get_mem_type();
+#ifndef CONFIG_3430ZEBU
+ /* fixme... dont know why this func is crashing in ZeBu */
+ display_board_info(btype);
+#endif
+ /* If a second bank of DDR is attached to CS1 this is
+ * where it can be started. Early init code will init
+ * memory on CS0.
+ */
+ if ((mtype == DDR_COMBO) || (mtype == DDR_STACKED)) {
+ do_sdrc_init(SDRC_CS1_OSET, NOT_EARLY);
+ }
+ size0 = get_sdr_cs_size(SDRC_CS0_OSET);
+ size1 = get_sdr_cs_size(SDRC_CS1_OSET);
+
+ gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+ gd->bd->bi_dram[0].size = size0;
+ gd->bd->bi_dram[1].start = PHYS_SDRAM_1+size0;
+ gd->bd->bi_dram[1].size = size1;
+
+ return 0;
+}
+
+#define MUX_VAL(OFFSET,VALUE)\
+ __raw_writew((VALUE), OMAP34XX_CTRL_BASE + (OFFSET));
+
+#define CP(x) (CONTROL_PADCONF_##x)
+/*
+ * IEN - Input Enable
+ * IDIS - Input Disable
+ * PTD - Pull type Down
+ * PTU - Pull type Up
+ * DIS - Pull type selection is inactive
+ * EN - Pull type selection is active
+ * M0 - Mode 0
+ * The commented string gives the final mux configuration for that pin
+ */
+#define MUX_DEFAULT_ES2()\
+ /*SDRC*/\
+ MUX_VAL(CP(SDRC_D0), (IEN | PTD | DIS | M0)) /*SDRC_D0*/\
+ MUX_VAL(CP(SDRC_D1), (IEN | PTD | DIS | M0)) /*SDRC_D1*/\
+ MUX_VAL(CP(SDRC_D2), (IEN | PTD | DIS | M0)) /*SDRC_D2*/\
+ MUX_VAL(CP(SDRC_D3), (IEN | PTD | DIS | M0)) /*SDRC_D3*/\
+ MUX_VAL(CP(SDRC_D4), (IEN | PTD | DIS | M0)) /*SDRC_D4*/\
+ MUX_VAL(CP(SDRC_D5), (IEN | PTD | DIS | M0)) /*SDRC_D5*/\
+ MUX_VAL(CP(SDRC_D6), (IEN | PTD | DIS | M0)) /*SDRC_D6*/\
+ MUX_VAL(CP(SDRC_D7), (IEN | PTD | DIS | M0)) /*SDRC_D7*/\
+ MUX_VAL(CP(SDRC_D8), (IEN | PTD | DIS | M0)) /*SDRC_D8*/\
+ MUX_VAL(CP(SDRC_D9), (IEN | PTD | DIS | M0)) /*SDRC_D9*/\
+ MUX_VAL(CP(SDRC_D10), (IEN | PTD | DIS | M0)) /*SDRC_D10*/\
+ MUX_VAL(CP(SDRC_D11), (IEN | PTD | DIS | M0)) /*SDRC_D11*/\
+ MUX_VAL(CP(SDRC_D12), (IEN | PTD | DIS | M0)) /*SDRC_D12*/\
+ MUX_VAL(CP(SDRC_D13), (IEN | PTD | DIS | M0)) /*SDRC_D13*/\
+ MUX_VAL(CP(SDRC_D14), (IEN | PTD | DIS | M0)) /*SDRC_D14*/\
+ MUX_VAL(CP(SDRC_D15), (IEN | PTD | DIS | M0)) /*SDRC_D15*/\
+ MUX_VAL(CP(SDRC_D16), (IEN | PTD | DIS | M0)) /*SDRC_D16*/\
+ MUX_VAL(CP(SDRC_D17), (IEN | PTD | DIS | M0)) /*SDRC_D17*/\
+ MUX_VAL(CP(SDRC_D18), (IEN | PTD | DIS | M0)) /*SDRC_D18*/\
+ MUX_VAL(CP(SDRC_D19), (IEN | PTD | DIS | M0)) /*SDRC_D19*/\
+ MUX_VAL(CP(SDRC_D20), (IEN | PTD | DIS | M0)) /*SDRC_D20*/\
+ MUX_VAL(CP(SDRC_D21), (IEN | PTD | DIS | M0)) /*SDRC_D21*/\
+ MUX_VAL(CP(SDRC_D22), (IEN | PTD | DIS | M0)) /*SDRC_D22*/\
+ MUX_VAL(CP(SDRC_D23), (IEN | PTD | DIS | M0)) /*SDRC_D23*/\
+ MUX_VAL(CP(SDRC_D24), (IEN | PTD | DIS | M0)) /*SDRC_D24*/\
+ MUX_VAL(CP(SDRC_D25), (IEN | PTD | DIS | M0)) /*SDRC_D25*/\
+ MUX_VAL(CP(SDRC_D26), (IEN | PTD | DIS | M0)) /*SDRC_D26*/\
+ MUX_VAL(CP(SDRC_D27), (IEN | PTD | DIS | M0)) /*SDRC_D27*/\
+ MUX_VAL(CP(SDRC_D28), (IEN | PTD | DIS | M0)) /*SDRC_D28*/\
+ MUX_VAL(CP(SDRC_D29), (IEN | PTD | DIS | M0)) /*SDRC_D29*/\
+ MUX_VAL(CP(SDRC_D30), (IEN | PTD | DIS | M0)) /*SDRC_D30*/\
+ MUX_VAL(CP(SDRC_D31), (IEN | PTD | DIS | M0)) /*SDRC_D31*/\
+ MUX_VAL(CP(SDRC_CLK), (IEN | PTD | DIS | M0)) /*SDRC_CLK*/\
+ MUX_VAL(CP(SDRC_DQS0), (IEN | PTD | DIS | M0)) /*SDRC_DQS0*/\
+ MUX_VAL(CP(SDRC_DQS1), (IEN | PTD | DIS | M0)) /*SDRC_DQS1*/\
+ MUX_VAL(CP(SDRC_DQS2), (IEN | PTD | DIS | M0)) /*SDRC_DQS2*/\
+ MUX_VAL(CP(SDRC_DQS3), (IEN | PTD | DIS | M0)) /*SDRC_DQS3*/\
+ /*GPMC*/\
+ MUX_VAL(CP(GPMC_A1), (OFF_OUT_PD | IDIS | PTD | DIS | M0)) /*GPMC_A1*/\
+ MUX_VAL(CP(GPMC_A2), (OFF_OUT_PD | IDIS | PTD | DIS | M0)) /*GPMC_A2*/\
+ MUX_VAL(CP(GPMC_A3), (OFF_OUT_PD | IDIS | PTD | DIS | M0)) /*GPMC_A3*/\
+ MUX_VAL(CP(GPMC_A4), (OFF_OUT_PD | IDIS | PTD | DIS | M0)) /*GPMC_A4*/\
+ MUX_VAL(CP(GPMC_A5), (OFF_OUT_PD | IDIS | PTD | DIS | M0)) /*GPMC_A5*/\
+ MUX_VAL(CP(GPMC_A6), (OFF_OUT_PD | IDIS | PTD | DIS | M0)) /*GPMC_A6*/\
+ MUX_VAL(CP(GPMC_A7), (OFF_OUT_PD | IDIS | PTD | DIS | M0)) /*GPMC_A7*/\
+ MUX_VAL(CP(GPMC_A8), (OFF_OUT_PD | IDIS | PTD | DIS | M0)) /*GPMC_A8*/\
+ MUX_VAL(CP(GPMC_A9), (OFF_OUT_PD | IDIS | PTD | DIS | M0)) /*GPMC_A9*/\
+ MUX_VAL(CP(GPMC_A10), (OFF_OUT_PD | IDIS | PTD | DIS | M0)) /*GPMC_A10*/\
+ MUX_VAL(CP(GPMC_D0), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*GPMC_D0*/\
+ MUX_VAL(CP(GPMC_D1), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*GPMC_D1*/\
+ MUX_VAL(CP(GPMC_D2), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*GPMC_D2*/\
+ MUX_VAL(CP(GPMC_D3), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*GPMC_D3*/\
+ MUX_VAL(CP(GPMC_D4), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*GPMC_D4*/\
+ MUX_VAL(CP(GPMC_D5), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*GPMC_D5*/\
+ MUX_VAL(CP(GPMC_D6), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*GPMC_D6*/\
+ MUX_VAL(CP(GPMC_D7), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*GPMC_D7*/\
+ MUX_VAL(CP(GPMC_D8), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*GPMC_D8*/\
+ MUX_VAL(CP(GPMC_D9), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*GPMC_D9*/\
+ MUX_VAL(CP(GPMC_D10), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*GPMC_D10*/\
+ MUX_VAL(CP(GPMC_D11), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*GPMC_D11*/\
+ MUX_VAL(CP(GPMC_D12), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*GPMC_D12*/\
+ MUX_VAL(CP(GPMC_D13), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*GPMC_D13*/\
+ MUX_VAL(CP(GPMC_D14), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*GPMC_D14*/\
+ MUX_VAL(CP(GPMC_D15), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*GPMC_D15*/\
+ MUX_VAL(CP(GPMC_nCS0), (OFF_OUT_PD | IDIS | PTU | EN | M0)) /*GPMC_nCS0*/\
+ MUX_VAL(CP(GPMC_nCS1), (OFF_OUT_PD | IDIS | PTU | EN | M0)) /*GPMC_nCS1*/\
+ MUX_VAL(CP(GPMC_nCS2), (OFF_OUT_PD | IDIS | PTU | EN | M0)) /*GPMC_nCS2*/\
+ MUX_VAL(CP(GPMC_nCS3), (OFF_OUT_PD | IDIS | PTU | EN | M0)) /*GPMC_nCS3*/\
+ MUX_VAL(CP(GPMC_nCS4), (OFF_IN_PD | IEN | PTU | EN | M4)) /*GPIO_55 - FLASH_DIS*/\
+ MUX_VAL(CP(GPMC_nCS5), (OFF_OUT_PD | IDIS | PTD | DIS | M4)) /*GPIO_56 - TORCH_EN*/\
+ MUX_VAL(CP(GPMC_nCS6), (OFF_IN_PD | IEN | PTD | DIS | M4)) /*GPIO_57 - aGPS SLEEP*/\
+ MUX_VAL(CP(GPMC_nCS7), (OFF_IN_PD | IEN | PTU | EN | M4)) /*GPMC_58 - WLAN_IRQ*/\
+ MUX_VAL(CP(GPMC_CLK), (OFF_OUT_PD | IDIS | PTD | DIS | M0)) /*GPMC_CLK*/\
+ MUX_VAL(CP(GPMC_nADV_ALE), (OFF_OUT_PD | IDIS | PTD | DIS | M0)) /*GPMC_nADV_ALE*/\
+ MUX_VAL(CP(GPMC_nOE), (OFF_OUT_PD | IDIS | PTD | DIS | M0)) /*GPMC_nOE*/\
+ MUX_VAL(CP(GPMC_nWE), (OFF_OUT_PD | IDIS | PTD | DIS | M0)) /*GPMC_nWE*/\
+ MUX_VAL(CP(GPMC_nBE0_CLE), (OFF_OUT_PD | IDIS | PTD | DIS | M0)) /*GPMC_nBE0_CLE*/\
+ MUX_VAL(CP(GPMC_nBE1), (OFF_IN_PD | IEN | PTD | DIS | M4)) /*GPIO_61 - BT_SHUTDOWN*/\
+ MUX_VAL(CP(GPMC_nWP), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*GPMC_nWP*/\
+ MUX_VAL(CP(GPMC_WAIT0), (OFF_IN_PD | IEN | PTU | EN | M0)) /*GPMC_WAIT0*/\
+ MUX_VAL(CP(GPMC_WAIT1), (OFF_IN_PD | IEN | PTU | EN | M0)) /*GPMC_WAIT1*/\
+ MUX_VAL(CP(GPMC_WAIT2), (OFF_IN_PD | IEN | PTU | EN | M4)) /*GPIO_64*/\
+ MUX_VAL(CP(GPMC_WAIT3), (OFF_IN_PD | IEN | PTU | EN | M4)) /*GPIO_65*/\
+ /*DSS*/\
+ MUX_VAL(CP(DSS_PCLK), (OFF_OUT_PD | IDIS | PTD | DIS | M0)) /*DSS_PCLK*/\
+ MUX_VAL(CP(DSS_HSYNC), (OFF_OUT_PD | IDIS | PTD | DIS | M0)) /*DSS_HSYNC*/\
+ MUX_VAL(CP(DSS_VSYNC), (OFF_OUT_PD | IDIS | PTD | DIS | M0)) /*DSS_VSYNC*/\
+ MUX_VAL(CP(DSS_ACBIAS), (OFF_OUT_PD | IDIS | PTD | DIS | M0)) /*DSS_ACBIAS*/\
+ MUX_VAL(CP(DSS_DATA0), (OFF_OUT_PD | IDIS | PTD | DIS | M0)) /*DSS_DATA0*/\
+ MUX_VAL(CP(DSS_DATA1), (OFF_OUT_PD | IDIS | PTD | DIS | M0)) /*DSS_DATA1*/\
+ MUX_VAL(CP(DSS_DATA2), (OFF_OUT_PD | IDIS | PTD | DIS | M0)) /*DSS_DATA2*/\
+ MUX_VAL(CP(DSS_DATA3), (OFF_OUT_PD | IDIS | PTD | DIS | M0)) /*DSS_DATA3*/\
+ MUX_VAL(CP(DSS_DATA4), (OFF_OUT_PD | IDIS | PTD | DIS | M0)) /*DSS_DATA4*/\
+ MUX_VAL(CP(DSS_DATA5), (OFF_OUT_PD | IDIS | PTD | DIS | M0)) /*DSS_DATA5*/\
+ MUX_VAL(CP(DSS_DATA6), (OFF_OUT_PD | IDIS | PTD | DIS | M0)) /*DSS_DATA6*/\
+ MUX_VAL(CP(DSS_DATA7), (OFF_OUT_PD | IDIS | PTD | DIS | M0)) /*DSS_DATA7*/\
+ MUX_VAL(CP(DSS_DATA8), (OFF_OUT_PD | IDIS | PTD | DIS | M0)) /*DSS_DATA8*/\
+ MUX_VAL(CP(DSS_DATA9), (OFF_OUT_PD | IDIS | PTD | DIS | M0)) /*DSS_DATA9*/\
+ MUX_VAL(CP(DSS_DATA10), (OFF_OUT_PD | IDIS | PTD | DIS | M0)) /*DSS_DATA10*/\
+ MUX_VAL(CP(DSS_DATA11), (OFF_OUT_PD | IDIS | PTD | DIS | M0)) /*DSS_DATA11*/\
+ MUX_VAL(CP(DSS_DATA12), (OFF_OUT_PD | IDIS | PTD | DIS | M0)) /*DSS_DATA12*/\
+ MUX_VAL(CP(DSS_DATA13), (OFF_OUT_PD | IDIS | PTD | DIS | M0)) /*DSS_DATA13*/\
+ MUX_VAL(CP(DSS_DATA14), (OFF_OUT_PD | IDIS | PTD | DIS | M0)) /*DSS_DATA14*/\
+ MUX_VAL(CP(DSS_DATA15), (OFF_OUT_PD | IDIS | PTD | DIS | M0)) /*DSS_DATA15*/\
+ MUX_VAL(CP(DSS_DATA16), (OFF_OUT_PD | IDIS | PTD | DIS | M0)) /*DSS_DATA16*/\
+ MUX_VAL(CP(DSS_DATA17), (OFF_OUT_PD | IDIS | PTD | DIS | M0)) /*DSS_DATA17*/\
+ MUX_VAL(CP(DSS_DATA18), (OFF_OUT_PD | IDIS | PTD | DIS | M0)) /*DSS_DATA18*/\
+ MUX_VAL(CP(DSS_DATA19), (OFF_OUT_PD | IDIS | PTD | DIS | M0)) /*DSS_DATA19*/\
+ MUX_VAL(CP(DSS_DATA20), (OFF_OUT_PD | IDIS | PTD | DIS | M0)) /*DSS_DATA20*/\
+ MUX_VAL(CP(DSS_DATA21), (OFF_OUT_PD | IDIS | PTD | DIS | M0)) /*DSS_DATA21*/\
+ MUX_VAL(CP(DSS_DATA22), (OFF_OUT_PD | IDIS | PTD | DIS | M0)) /*DSS_DATA22*/\
+ MUX_VAL(CP(DSS_DATA23), (OFF_OUT_PD | IDIS | PTD | DIS | M0)) /*DSS_DATA23*/\
+ /*CAMERA*/\
+ MUX_VAL(CP(CAM_HS ), (OFF_IN_PD | IEN | PTU | EN | M0)) /*CAM_HS */\
+ MUX_VAL(CP(CAM_VS ), (OFF_IN_PD | IEN | PTU | EN | M0)) /*CAM_VS */\
+ MUX_VAL(CP(CAM_XCLKA), (OFF_OUT_PD | IDIS | PTD | DIS | M0)) /*CAM_XCLKA*/\
+ MUX_VAL(CP(CAM_PCLK), (OFF_IN_PD | IEN | PTU | EN | M0)) /*CAM_PCLK*/\
+ MUX_VAL(CP(CAM_FLD), (OFF_OUT_PD | IDIS | PTD | DIS | M4)) /*GPIO_98 - CAM_RESET*/\
+ MUX_VAL(CP(CAM_D0 ), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*CAM_D0 */\
+ MUX_VAL(CP(CAM_D1 ), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*CAM_D1 */\
+ MUX_VAL(CP(CAM_D2 ), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*CAM_D2 */\
+ MUX_VAL(CP(CAM_D3 ), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*CAM_D3 */\
+ MUX_VAL(CP(CAM_D4 ), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*CAM_D4 */\
+ MUX_VAL(CP(CAM_D5 ), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*CAM_D5 */\
+ MUX_VAL(CP(CAM_D6 ), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*CAM_D6 */\
+ MUX_VAL(CP(CAM_D7 ), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*CAM_D7 */\
+ MUX_VAL(CP(CAM_D8 ), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*CAM_D8 */\
+ MUX_VAL(CP(CAM_D9 ), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*CAM_D9 */\
+ MUX_VAL(CP(CAM_D10), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*CAM_D10*/\
+ MUX_VAL(CP(CAM_D11), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*CAM_D11*/\
+ MUX_VAL(CP(CAM_XCLKB), (OFF_OUT_PD | IDIS | PTD | DIS | M0)) /*CAM_XCLKB*/\
+ MUX_VAL(CP(CAM_WEN), (OFF_IN_PD | IEN | PTD | DIS | M4)) /*GPIO_167*/\
+ MUX_VAL(CP(CAM_STROBE), (OFF_OUT_PD | IDIS | PTD | DIS | M0)) /*CAM_STROBE*/\
+ MUX_VAL(CP(CSI2_DX0), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*CSI2_DX0*/\
+ MUX_VAL(CP(CSI2_DY0), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*CSI2_DY0*/\
+ MUX_VAL(CP(CSI2_DX1), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*CSI2_DX1*/\
+ MUX_VAL(CP(CSI2_DY1), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*CSI2_DY1*/\
+ /*Audio Interface */\
+ MUX_VAL(CP(McBSP2_FSX), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*McBSP2_FSX*/\
+ MUX_VAL(CP(McBSP2_CLKX), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*McBSP2_CLKX*/\
+ MUX_VAL(CP(McBSP2_DR), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*McBSP2_DR*/\
+ MUX_VAL(CP(McBSP2_DX), (OFF_OUT_PD | IDIS | PTD | DIS | M0)) /*McBSP2_DX*/\
+ /*Expansion card */\
+ MUX_VAL(CP(MMC1_CLK), (OFF_OUT_PD | IDIS | PTU | EN | M0)) /*MMC1_CLK*/\
+ MUX_VAL(CP(MMC1_CMD), (OFF_IN_PD | IEN | PTU | EN | M0)) /*MMC1_CMD*/\
+ MUX_VAL(CP(MMC1_DAT0), (OFF_IN_PD | IEN | PTU | EN | M0)) /*MMC1_DAT0*/\
+ MUX_VAL(CP(MMC1_DAT1), (OFF_IN_PD | IEN | PTU | EN | M0)) /*MMC1_DAT1*/\
+ MUX_VAL(CP(MMC1_DAT2), (OFF_IN_PD | IEN | PTU | EN | M0)) /*MMC1_DAT2*/\
+ MUX_VAL(CP(MMC1_DAT3), (OFF_IN_PD | IEN | PTU | EN | M0)) /*MMC1_DAT3*/\
+ MUX_VAL(CP(MMC1_DAT4), (OFF_IN_PD | IEN | PTU | EN | M0)) /*MMC1_DAT4*/\
+ MUX_VAL(CP(MMC1_DAT5), (OFF_IN_PD | IEN | PTU | EN | M0)) /*MMC1_DAT5*/\
+ MUX_VAL(CP(MMC1_DAT6), (OFF_IN_PD | IEN | PTU | EN | M0)) /*MMC1_DAT6*/\
+ MUX_VAL(CP(MMC1_DAT7), (OFF_IN_PD | IEN | PTU | EN | M0)) /*MMC1_DAT7*/\
+ /*Wireless LAN */\
+ MUX_VAL(CP(MMC2_CLK), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*MMC2_CLK*/\
+ MUX_VAL(CP(MMC2_CMD), (OFF_IN_PD | IEN | PTU | EN | M0)) /*MMC2_CMD*/\
+ MUX_VAL(CP(MMC2_DAT0), (OFF_IN_PD | IEN | PTU | EN | M0)) /*MMC2_DAT0*/\
+ MUX_VAL(CP(MMC2_DAT1), (OFF_IN_PD | IEN | PTU | EN | M0)) /*MMC2_DAT1*/\
+ MUX_VAL(CP(MMC2_DAT2), (OFF_IN_PD | IEN | PTU | EN | M0)) /*MMC2_DAT2*/\
+ MUX_VAL(CP(MMC2_DAT3), (OFF_IN_PD | IEN | PTU | EN | M0)) /*MMC2_DAT3*/\
+ MUX_VAL(CP(MMC2_DAT4), (OFF_OUT_PD | IDIS | PTD | DIS | M1)) /*MMC2_DIR_DAT0*/\
+ MUX_VAL(CP(MMC2_DAT5), (OFF_OUT_PD | IDIS | PTD | DIS | M1)) /*MMC2_DIR_DAT1*/\
+ MUX_VAL(CP(MMC2_DAT6), (OFF_OUT_PD | IDIS | PTD | DIS | M1)) /*MMC2_DIR_CMD */\
+ MUX_VAL(CP(MMC2_DAT7), (OFF_IN_PD | IEN | PTU | EN | M1)) /*MMC2_CLKIN*/\
+ /*Bluetooth*/\
+ MUX_VAL(CP(McBSP3_DX), (OFF_OUT_PD | IDIS | PTD | DIS | M0)) /*McBSP3_DX*/\
+ MUX_VAL(CP(McBSP3_DR), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*McBSP3_DR*/\
+ MUX_VAL(CP(McBSP3_CLKX), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*McBSP3_CLKX */\
+ MUX_VAL(CP(McBSP3_FSX), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*McBSP3_FSX*/\
+ MUX_VAL(CP(UART2_CTS), (OFF_IN_PD | IEN | PTU | EN | M0)) /*UART2_CTS*/\
+ MUX_VAL(CP(UART2_RTS), (OFF_OUT_PD | IDIS | PTD | DIS | M0)) /*UART2_RTS*/\
+ MUX_VAL(CP(UART2_TX), (OFF_OUT_PD | IDIS | PTD | DIS | M0)) /*UART2_TX*/\
+ MUX_VAL(CP(UART2_RX), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*UART2_RX*/\
+ /*Modem Interface */\
+ MUX_VAL(CP(UART1_TX), (OFF_OUT_PD | IDIS | PTD | DIS | M0)) /*UART1_TX*/\
+ MUX_VAL(CP(UART1_RTS), (OFF_OUT_PD | IDIS | PTD | DIS | M0)) /*UART1_RTS*/\
+ MUX_VAL(CP(UART1_CTS), (OFF_IN_PD | IEN | PTU | DIS | M0)) /*UART1_CTS*/\
+ MUX_VAL(CP(UART1_RX), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*UART1_RX*/\
+ MUX_VAL(CP(McBSP4_CLKX), (OFF_IN_PD | IEN | PTD | DIS | M1)) /*SSI1_DAT_RX */\
+ MUX_VAL(CP(McBSP4_DR), (OFF_IN_PD | IEN | PTD | DIS | M1)) /*SSI1_FLAG_RX */\
+ MUX_VAL(CP(McBSP4_DX), (OFF_IN_PD | IEN | PTD | DIS | M1)) /*SSI1_RDY_RX */\
+ MUX_VAL(CP(McBSP4_FSX), (OFF_IN_PD | IEN | PTD | DIS | M1)) /*SSI1_WAKE*/\
+ MUX_VAL(CP(McBSP1_CLKR), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*McBSP1_CLKR */\
+ MUX_VAL(CP(McBSP1_FSR), (OFF_OUT_PD | IDIS | PTU | EN | M4)) /*GPIO_157 - BT_WAKEUP*/\
+ MUX_VAL(CP(McBSP1_DX), (OFF_OUT_PD | IDIS | PTD | DIS | M0)) /*McBSP1_DX*/\
+ MUX_VAL(CP(McBSP1_DR), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*McBSP1_DR*/\
+ MUX_VAL(CP(McBSP_CLKS), (OFF_IN_PD | IEN | PTU | DIS | M0)) /*McBSP_CLKS */\
+ MUX_VAL(CP(McBSP1_FSX), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*McBSP1_FSX*/\
+ MUX_VAL(CP(McBSP1_CLKX), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*McBSP1_CLKX */\
+ /*Serial Interface*/\
+ MUX_VAL(CP(UART3_CTS_RCTX), (OFF_IN_PD | IEN | PTD | EN | M0)) /*UART3_CTS_RCTX */\
+ MUX_VAL(CP(UART3_RTS_SD), (OFF_OUT_PD | IDIS | PTD | DIS | M0)) /*UART3_RTS_SD */\
+ MUX_VAL(CP(UART3_RX_IRRX ), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*UART3_RX_IRRX*/\
+ MUX_VAL(CP(UART3_TX_IRTX ), (OFF_OUT_PD | IDIS | PTD | DIS | M0)) /*UART3_TX_IRTX*/\
+ MUX_VAL(CP(HSUSB0_CLK), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*HSUSB0_CLK*/\
+ MUX_VAL(CP(HSUSB0_STP), (OFF_OUT_PD | IDIS | PTU | EN | M0)) /*HSUSB0_STP*/\
+ MUX_VAL(CP(HSUSB0_DIR), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*HSUSB0_DIR*/\
+ MUX_VAL(CP(HSUSB0_NXT), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*HSUSB0_NXT*/\
+ MUX_VAL(CP(HSUSB0_DATA0), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*HSUSB0_DATA0 */\
+ MUX_VAL(CP(HSUSB0_DATA1), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*HSUSB0_DATA1 */\
+ MUX_VAL(CP(HSUSB0_DATA2), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*HSUSB0_DATA2 */\
+ MUX_VAL(CP(HSUSB0_DATA3), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*HSUSB0_DATA3 */\
+ MUX_VAL(CP(HSUSB0_DATA4), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*HSUSB0_DATA4 */\
+ MUX_VAL(CP(HSUSB0_DATA5), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*HSUSB0_DATA5 */\
+ MUX_VAL(CP(HSUSB0_DATA6), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*HSUSB0_DATA6 */\
+ MUX_VAL(CP(HSUSB0_DATA7), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*HSUSB0_DATA7 */\
+ MUX_VAL(CP(I2C1_SCL), (OFF_IN_PD | IEN | PTU | EN | M0)) /*I2C1_SCL*/\
+ MUX_VAL(CP(I2C1_SDA), (OFF_IN_PD | IEN | PTU | EN | M0)) /*I2C1_SDA*/\
+ MUX_VAL(CP(I2C2_SCL), (OFF_IN_PD | IEN | PTU | EN | M0)) /*I2C2_SCL*/\
+ MUX_VAL(CP(I2C2_SDA), (OFF_IN_PD | IEN | PTU | EN | M0)) /*I2C2_SDA*/\
+ MUX_VAL(CP(I2C3_SCL), (OFF_IN_PD | IEN | PTU | EN | M0)) /*I2C3_SCL*/\
+ MUX_VAL(CP(I2C3_SDA), (OFF_IN_PD | IEN | PTU | EN | M0)) /*I2C3_SDA*/\
+ MUX_VAL(CP(I2C4_SCL), (IEN | PTU | EN | M0)) /*I2C4_SCL*/\
+ MUX_VAL(CP(I2C4_SDA), (IEN | PTU | EN | M0)) /*I2C4_SDA*/\
+ MUX_VAL(CP(HDQ_SIO), (OFF_IN_PD | IEN | PTU | EN | M0)) /*HDQ_SIO*/\
+ MUX_VAL(CP(McSPI1_CLK), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*McSPI1_CLK*/\
+ MUX_VAL(CP(McSPI1_SIMO), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*McSPI1_SIMO */\
+ MUX_VAL(CP(McSPI1_SOMI), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*McSPI1_SOMI */\
+ MUX_VAL(CP(McSPI1_CS0), (OFF_IN_PD | IEN | PTD | EN | M0)) /*McSPI1_CS0*/\
+ MUX_VAL(CP(McSPI1_CS1), (OFF_OUT_PD | IDIS | PTD | EN | M0)) /*McSPI1_CS1*/\
+ MUX_VAL(CP(McSPI1_CS2), (OFF_OUT_PD | IDIS | PTD | DIS | M4)) /*GPIO_176 - NOR_DPD*/\
+ MUX_VAL(CP(McSPI1_CS3), (OFF_IN_PD | IEN | PTD | EN | M0)) /*McSPI1_CS3*/\
+ MUX_VAL(CP(McSPI2_CLK), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*McSPI2_CLK*/\
+ MUX_VAL(CP(McSPI2_SIMO), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*McSPI2_SIMO*/\
+ MUX_VAL(CP(McSPI2_SOMI), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*McSPI2_SOMI*/\
+ MUX_VAL(CP(McSPI2_CS0), (OFF_IN_PD | IEN | PTD | EN | M0)) /*McSPI2_CS0*/\
+ MUX_VAL(CP(McSPI2_CS1), (OFF_IN_PD | IEN | PTD | EN | M0)) /*McSPI2_CS1*/\
+ /*Control and debug */\
+ MUX_VAL(CP(SYS_32K), (IEN | PTD | DIS | M0)) /*SYS_32K*/\
+ MUX_VAL(CP(SYS_CLKREQ), (IEN | PTD | DIS | M0)) /*SYS_CLKREQ*/\
+ MUX_VAL(CP(SYS_nIRQ), (OFF_IN_PD | IEN | PTU | EN | M0)) /*SYS_nIRQ*/\
+ MUX_VAL(CP(SYS_BOOT0), (OFF_OUT_PD | IEN | PTD | DIS | M4)) /*GPIO_2 - PEN_IRQ */\
+ MUX_VAL(CP(SYS_BOOT1), (OFF_OUT_PD | IEN | PTD | DIS | M4)) /*GPIO_3 */\
+ MUX_VAL(CP(SYS_BOOT2), (OFF_OUT_PD | IEN | PTD | DIS | M4)) /*GPIO_4 - MMC1_WP */\
+ MUX_VAL(CP(SYS_BOOT3), (OFF_OUT_PD | IEN | PTD | DIS | M4)) /*GPIO_5 - LCD_ENVDD*/\
+ MUX_VAL(CP(SYS_BOOT4), (OFF_OUT_PD | IEN | PTD | DIS | M4)) /*GPIO_6 - LAN_INTR0*/\
+ MUX_VAL(CP(SYS_BOOT5), (OFF_OUT_PD | IEN | PTD | DIS | M4)) /*GPIO_7 - MMC2_WP*/\
+ MUX_VAL(CP(SYS_BOOT6), (OFF_OUT_PD | IDIS | PTD | DIS | M4)) /*GPIO_8 - LCD_ENBKL*/\
+ MUX_VAL(CP(SYS_OFF_MODE), (IEN | PTD | DIS | M0)) /*SYS_OFF_MODE */\
+ MUX_VAL(CP(SYS_CLKOUT1), (IEN | PTD | DIS | M0)) /*SYS_CLKOUT1 */\
+ MUX_VAL(CP(SYS_CLKOUT2), (OFF_IN_PD | IEN | PTU | EN | M4)) /*GPIO_186*/\
+ MUX_VAL(CP(JTAG_nTRST), (IEN | PTD | DIS | M0)) /*JTAG_nTRST*/\
+ MUX_VAL(CP(JTAG_TCK), (IEN | PTD | DIS | M0)) /*JTAG_TCK*/\
+ MUX_VAL(CP(JTAG_TMS), (IEN | PTD | DIS | M0)) /*JTAG_TMS*/\
+ MUX_VAL(CP(JTAG_TDI), (IEN | PTD | DIS | M0)) /*JTAG_TDI*/\
+ MUX_VAL(CP(JTAG_EMU0), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*JTAG_EMU0*/\
+ MUX_VAL(CP(JTAG_EMU1), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*JTAG_EMU1*/\
+ MUX_VAL(CP(ETK_CLK_ES2), (OFF_OUT_PD | IDIS | PTU | EN | M0)) /*HSUSB1_TLL_STP*/\
+ MUX_VAL(CP(ETK_CTL_ES2), (OFF_OUT_PD | IDIS | PTD | DIS | M0)) /*HSUSB1_TLL_CLK*/\
+ MUX_VAL(CP(ETK_D0_ES2 ), (OFF_IN_PD | IEN | PTD | DIS | M1)) /*HSUSB1_TLL_DATA0*/\
+ MUX_VAL(CP(ETK_D1_ES2 ), (OFF_IN_PD | IEN | PTD | DIS | M1)) /*McSPI3_CS0*/\
+ MUX_VAL(CP(ETK_D2_ES2 ), (OFF_IN_PD | IEN | PTD | EN | M1)) /*HSUSB1_TLL_DATA2*/\
+ MUX_VAL(CP(ETK_D3_ES2 ), (OFF_IN_PD | IEN | PTD | DIS | M1)) /*HSUSB1_TLL_DATA7*/\
+ MUX_VAL(CP(ETK_D4_ES2 ), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*HSUSB1_TLL_DATA4*/\
+ MUX_VAL(CP(ETK_D5_ES2 ), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*HSUSB1_TLL_DATA5*/\
+ MUX_VAL(CP(ETK_D6_ES2 ), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*HSUSB1_TLL_DATA6*/\
+ MUX_VAL(CP(ETK_D7_ES2 ), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*HSUSB1_TLL_DATA3*/\
+ MUX_VAL(CP(ETK_D8_ES2 ), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*HSUSB1_TLL_DIR*/\
+ MUX_VAL(CP(ETK_D9_ES2 ), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*HSUSB1_TLL_NXT*/\
+ MUX_VAL(CP(ETK_D10_ES2), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*HSUSB2_TLL_CLK*/\
+ MUX_VAL(CP(ETK_D11_ES2), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*HSUSB2_TLL_STP*/\
+ MUX_VAL(CP(ETK_D12_ES2), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*HSUSB2_TLL_DIR*/\
+ MUX_VAL(CP(ETK_D13_ES2), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*HSUSB2_TLL_NXT*/\
+ MUX_VAL(CP(ETK_D14_ES2), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*HSUSB2_TLL_DATA0*/\
+ MUX_VAL(CP(ETK_D15_ES2), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*HSUSB2_TLL_DATA1*/\
+ /*Die to Die */\
+ MUX_VAL(CP(d2d_mcad0), (OFF_IN_PD | IEN | PTD | EN | M0)) /*d2d_mcad0*/\
+ MUX_VAL(CP(d2d_mcad1), (OFF_IN_PD | IEN | PTD | EN | M0)) /*d2d_mcad1*/\
+ MUX_VAL(CP(d2d_mcad2), (OFF_IN_PD | IEN | PTD | EN | M0)) /*d2d_mcad2*/\
+ MUX_VAL(CP(d2d_mcad3), (OFF_IN_PD | IEN | PTD | EN | M0)) /*d2d_mcad3*/\
+ MUX_VAL(CP(d2d_mcad4), (OFF_IN_PD | IEN | PTD | EN | M0)) /*d2d_mcad4*/\
+ MUX_VAL(CP(d2d_mcad5), (OFF_IN_PD | IEN | PTD | EN | M0)) /*d2d_mcad5*/\
+ MUX_VAL(CP(d2d_mcad6), (OFF_IN_PD | IEN | PTD | EN | M0)) /*d2d_mcad6*/\
+ MUX_VAL(CP(d2d_mcad7), (OFF_IN_PD | IEN | PTD | EN | M0)) /*d2d_mcad7*/\
+ MUX_VAL(CP(d2d_mcad8), (OFF_IN_PD | IEN | PTD | EN | M0)) /*d2d_mcad8*/\
+ MUX_VAL(CP(d2d_mcad9), (OFF_IN_PD | IEN | PTD | EN | M0)) /*d2d_mcad9*/\
+ MUX_VAL(CP(d2d_mcad10), (OFF_IN_PD | IEN | PTD | EN | M0)) /*d2d_mcad10*/\
+ MUX_VAL(CP(d2d_mcad11), (OFF_IN_PD | IEN | PTD | EN | M0)) /*d2d_mcad11*/\
+ MUX_VAL(CP(d2d_mcad12), (OFF_IN_PD | IEN | PTD | EN | M0)) /*d2d_mcad12*/\
+ MUX_VAL(CP(d2d_mcad13), (OFF_IN_PD | IEN | PTD | EN | M0)) /*d2d_mcad13*/\
+ MUX_VAL(CP(d2d_mcad14), (OFF_IN_PD | IEN | PTD | EN | M0)) /*d2d_mcad14*/\
+ MUX_VAL(CP(d2d_mcad15), (OFF_IN_PD | IEN | PTD | EN | M0)) /*d2d_mcad15*/\
+ MUX_VAL(CP(d2d_mcad16), (OFF_IN_PD | IEN | PTD | EN | M0)) /*d2d_mcad16*/\
+ MUX_VAL(CP(d2d_mcad17), (OFF_IN_PD | IEN | PTD | EN | M0)) /*d2d_mcad17*/\
+ MUX_VAL(CP(d2d_mcad18), (OFF_IN_PD | IEN | PTD | EN | M0)) /*d2d_mcad18*/\
+ MUX_VAL(CP(d2d_mcad19), (OFF_IN_PD | IEN | PTD | EN | M0)) /*d2d_mcad19*/\
+ MUX_VAL(CP(d2d_mcad20), (OFF_IN_PD | IEN | PTD | EN | M0)) /*d2d_mcad20*/\
+ MUX_VAL(CP(d2d_mcad21), (OFF_IN_PD | IEN | PTD | EN | M0)) /*d2d_mcad21*/\
+ MUX_VAL(CP(d2d_mcad22), (OFF_IN_PD | IEN | PTD | EN | M0)) /*d2d_mcad22*/\
+ MUX_VAL(CP(d2d_mcad23), (OFF_IN_PD | IEN | PTD | EN | M0)) /*d2d_mcad23*/\
+ MUX_VAL(CP(d2d_mcad24), (OFF_IN_PD | IEN | PTD | EN | M0)) /*d2d_mcad24*/\
+ MUX_VAL(CP(d2d_mcad25), (OFF_IN_PD | IEN | PTD | EN | M0)) /*d2d_mcad25*/\
+ MUX_VAL(CP(d2d_mcad26), (OFF_IN_PD | IEN | PTD | EN | M0)) /*d2d_mcad26*/\
+ MUX_VAL(CP(d2d_mcad27), (OFF_IN_PD | IEN | PTD | EN | M0)) /*d2d_mcad27*/\
+ MUX_VAL(CP(d2d_mcad28), (OFF_IN_PD | IEN | PTD | EN | M0)) /*d2d_mcad28*/\
+ MUX_VAL(CP(d2d_mcad29), (OFF_IN_PD | IEN | PTD | EN | M0)) /*d2d_mcad29*/\
+ MUX_VAL(CP(d2d_mcad30), (OFF_IN_PD | IEN | PTD | EN | M0)) /*d2d_mcad30*/\
+ MUX_VAL(CP(d2d_mcad31), (OFF_IN_PD | IEN | PTD | EN | M0)) /*d2d_mcad31*/\
+ MUX_VAL(CP(d2d_mcad32), (OFF_IN_PD | IEN | PTD | EN | M0)) /*d2d_mcad32*/\
+ MUX_VAL(CP(d2d_mcad33), (OFF_IN_PD | IEN | PTD | EN | M0)) /*d2d_mcad33*/\
+ MUX_VAL(CP(d2d_mcad34), (OFF_IN_PD | IEN | PTD | EN | M0)) /*d2d_mcad34*/\
+ MUX_VAL(CP(d2d_mcad35), (OFF_IN_PD | IEN | PTD | EN | M0)) /*d2d_mcad35*/\
+ MUX_VAL(CP(d2d_mcad36), (OFF_IN_PD | IEN | PTD | EN | M0)) /*d2d_mcad36*/\
+ MUX_VAL(CP(d2d_clk26mi), (OFF_OUT_PD | IEN | PTD | DIS | M0)) /*d2d_clk26mi */\
+ MUX_VAL(CP(d2d_nrespwron ), (OFF_OUT_PD | IEN | PTD | EN | M0)) /*d2d_nrespwron*/\
+ MUX_VAL(CP(d2d_nreswarm), (OFF_IN_PD | IEN | PTU | EN | M0)) /*d2d_nreswarm */\
+ MUX_VAL(CP(d2d_arm9nirq), (OFF_OUT_PD | IEN | PTD | DIS | M0)) /*d2d_arm9nirq */\
+ MUX_VAL(CP(d2d_uma2p6fiq ), (OFF_OUT_PD | IEN | PTD | DIS | M0)) /*d2d_uma2p6fiq*/\
+ MUX_VAL(CP(d2d_spint), (OFF_IN_PD | IEN | PTD | EN | M0)) /*d2d_spint*/\
+ MUX_VAL(CP(d2d_frint), (OFF_IN_PD | IEN | PTD | EN | M0)) /*d2d_frint*/\
+ MUX_VAL(CP(d2d_dmareq0), (OFF_OUT_PD | IEN | PTD | DIS | M0)) /*d2d_dmareq0 */\
+ MUX_VAL(CP(d2d_dmareq1), (OFF_OUT_PD | IEN | PTD | DIS | M0)) /*d2d_dmareq1 */\
+ MUX_VAL(CP(d2d_dmareq2), (OFF_OUT_PD | IEN | PTD | DIS | M0)) /*d2d_dmareq2 */\
+ MUX_VAL(CP(d2d_dmareq3), (OFF_OUT_PD | IEN | PTD | DIS | M0)) /*d2d_dmareq3 */\
+ MUX_VAL(CP(d2d_n3gtrst), (OFF_OUT_PD | IEN | PTD | DIS | M0)) /*d2d_n3gtrst */\
+ MUX_VAL(CP(d2d_n3gtdi), (OFF_OUT_PD | IEN | PTD | DIS | M0)) /*d2d_n3gtdi*/\
+ MUX_VAL(CP(d2d_n3gtdo), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*d2d_n3gtdo*/\
+ MUX_VAL(CP(d2d_n3gtms), (OFF_OUT_PD | IEN | PTD | DIS | M0)) /*d2d_n3gtms*/\
+ MUX_VAL(CP(d2d_n3gtck), (OFF_OUT_PD | IEN | PTD | DIS | M0)) /*d2d_n3gtck*/\
+ MUX_VAL(CP(d2d_n3grtck), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*d2d_n3grtck */\
+ MUX_VAL(CP(d2d_mstdby), (OFF_IN_PD | IEN | PTU | EN | M0)) /*d2d_mstdby*/\
+ MUX_VAL(CP(d2d_swakeup), (IEN | PTD | EN | M0)) /*d2d_swakeup */\
+ MUX_VAL(CP(d2d_idlereq), (OFF_OUT_PD | IEN | PTD | DIS | M0)) /*d2d_idlereq */\
+ MUX_VAL(CP(d2d_idleack), (OFF_IN_PD | IEN | PTU | EN | M0)) /*d2d_idleack */\
+ MUX_VAL(CP(d2d_mwrite), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*d2d_mwrite*/\
+ MUX_VAL(CP(d2d_swrite), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*d2d_swrite*/\
+ MUX_VAL(CP(d2d_mread), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*d2d_mread*/\
+ MUX_VAL(CP(d2d_sread), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*d2d_sread*/\
+ MUX_VAL(CP(d2d_mbusflag), (OFF_IN_PD | IEN | PTD | DIS | M0)) /*d2d_mbusflag */\
+ MUX_VAL(CP(d2d_sbusflag), (OFF_OUT_PD | IEN | PTD | DIS | M0)) /*d2d_sbusflag */\
+ MUX_VAL(CP(sdrc_cke0), (IDIS | PTU | EN | M0)) /*sdrc_cke0 */\
+ MUX_VAL(CP(sdrc_cke1), (IDIS | PTD | DIS | M7)) /*sdrc_cke1 not used*/
+#define MUX_DEFAULT()\
+ /*SDRC*/\
+ MUX_VAL(CP(SDRC_D0), (IEN | PTD | DIS | M0)) /*SDRC_D0*/\
+ MUX_VAL(CP(SDRC_D1), (IEN | PTD | DIS | M0)) /*SDRC_D1*/\
+ MUX_VAL(CP(SDRC_D2), (IEN | PTD | DIS | M0)) /*SDRC_D2*/\
+ MUX_VAL(CP(SDRC_D3), (IEN | PTD | DIS | M0)) /*SDRC_D3*/\
+ MUX_VAL(CP(SDRC_D4), (IEN | PTD | DIS | M0)) /*SDRC_D4*/\
+ MUX_VAL(CP(SDRC_D5), (IEN | PTD | DIS | M0)) /*SDRC_D5*/\
+ MUX_VAL(CP(SDRC_D6), (IEN | PTD | DIS | M0)) /*SDRC_D6*/\
+ MUX_VAL(CP(SDRC_D7), (IEN | PTD | DIS | M0)) /*SDRC_D7*/\
+ MUX_VAL(CP(SDRC_D8), (IEN | PTD | DIS | M0)) /*SDRC_D8*/\
+ MUX_VAL(CP(SDRC_D9), (IEN | PTD | DIS | M0)) /*SDRC_D9*/\
+ MUX_VAL(CP(SDRC_D10), (IEN | PTD | DIS | M0)) /*SDRC_D10*/\
+ MUX_VAL(CP(SDRC_D11), (IEN | PTD | DIS | M0)) /*SDRC_D11*/\
+ MUX_VAL(CP(SDRC_D12), (IEN | PTD | DIS | M0)) /*SDRC_D12*/\
+ MUX_VAL(CP(SDRC_D13), (IEN | PTD | DIS | M0)) /*SDRC_D13*/\
+ MUX_VAL(CP(SDRC_D14), (IEN | PTD | DIS | M0)) /*SDRC_D14*/\
+ MUX_VAL(CP(SDRC_D15), (IEN | PTD | DIS | M0)) /*SDRC_D15*/\
+ MUX_VAL(CP(SDRC_D16), (IEN | PTD | DIS | M0)) /*SDRC_D16*/\
+ MUX_VAL(CP(SDRC_D17), (IEN | PTD | DIS | M0)) /*SDRC_D17*/\
+ MUX_VAL(CP(SDRC_D18), (IEN | PTD | DIS | M0)) /*SDRC_D18*/\
+ MUX_VAL(CP(SDRC_D19), (IEN | PTD | DIS | M0)) /*SDRC_D19*/\
+ MUX_VAL(CP(SDRC_D20), (IEN | PTD | DIS | M0)) /*SDRC_D20*/\
+ MUX_VAL(CP(SDRC_D21), (IEN | PTD | DIS | M0)) /*SDRC_D21*/\
+ MUX_VAL(CP(SDRC_D22), (IEN | PTD | DIS | M0)) /*SDRC_D22*/\
+ MUX_VAL(CP(SDRC_D23), (IEN | PTD | DIS | M0)) /*SDRC_D23*/\
+ MUX_VAL(CP(SDRC_D24), (IEN | PTD | DIS | M0)) /*SDRC_D24*/\
+ MUX_VAL(CP(SDRC_D25), (IEN | PTD | DIS | M0)) /*SDRC_D25*/\
+ MUX_VAL(CP(SDRC_D26), (IEN | PTD | DIS | M0)) /*SDRC_D26*/\
+ MUX_VAL(CP(SDRC_D27), (IEN | PTD | DIS | M0)) /*SDRC_D27*/\
+ MUX_VAL(CP(SDRC_D28), (IEN | PTD | DIS | M0)) /*SDRC_D28*/\
+ MUX_VAL(CP(SDRC_D29), (IEN | PTD | DIS | M0)) /*SDRC_D29*/\
+ MUX_VAL(CP(SDRC_D30), (IEN | PTD | DIS | M0)) /*SDRC_D30*/\
+ MUX_VAL(CP(SDRC_D31), (IEN | PTD | DIS | M0)) /*SDRC_D31*/\
+ MUX_VAL(CP(SDRC_CLK), (IEN | PTD | DIS | M0)) /*SDRC_CLK*/\
+ MUX_VAL(CP(SDRC_DQS0), (IEN | PTD | DIS | M0)) /*SDRC_DQS0*/\
+ MUX_VAL(CP(SDRC_DQS1), (IEN | PTD | DIS | M0)) /*SDRC_DQS1*/\
+ MUX_VAL(CP(SDRC_DQS2), (IEN | PTD | DIS | M0)) /*SDRC_DQS2*/\
+ MUX_VAL(CP(SDRC_DQS3), (IEN | PTD | DIS | M0)) /*SDRC_DQS3*/\
+ /*GPMC*/\
+ MUX_VAL(CP(GPMC_A1), (IDIS | PTD | DIS | M0)) /*GPMC_A1*/\
+ MUX_VAL(CP(GPMC_A2), (IDIS | PTD | DIS | M0)) /*GPMC_A2*/\
+ MUX_VAL(CP(GPMC_A3), (IDIS | PTD | DIS | M0)) /*GPMC_A3*/\
+ MUX_VAL(CP(GPMC_A4), (IDIS | PTD | DIS | M0)) /*GPMC_A4*/\
+ MUX_VAL(CP(GPMC_A5), (IDIS | PTD | DIS | M0)) /*GPMC_A5*/\
+ MUX_VAL(CP(GPMC_A6), (IDIS | PTD | DIS | M0)) /*GPMC_A6*/\
+ MUX_VAL(CP(GPMC_A7), (IDIS | PTD | DIS | M0)) /*GPMC_A7*/\
+ MUX_VAL(CP(GPMC_A8), (IDIS | PTD | DIS | M0)) /*GPMC_A8*/\
+ MUX_VAL(CP(GPMC_A9), (IDIS | PTD | DIS | M0)) /*GPMC_A9*/\
+ MUX_VAL(CP(GPMC_A10), (IDIS | PTD | DIS | M0)) /*GPMC_A10*/\
+ MUX_VAL(CP(GPMC_D0), (IEN | PTD | DIS | M0)) /*GPMC_D0*/\
+ MUX_VAL(CP(GPMC_D1), (IEN | PTD | DIS | M0)) /*GPMC_D1*/\
+ MUX_VAL(CP(GPMC_D2), (IEN | PTD | DIS | M0)) /*GPMC_D2*/\
+ MUX_VAL(CP(GPMC_D3), (IEN | PTD | DIS | M0)) /*GPMC_D3*/\
+ MUX_VAL(CP(GPMC_D4), (IEN | PTD | DIS | M0)) /*GPMC_D4*/\
+ MUX_VAL(CP(GPMC_D5), (IEN | PTD | DIS | M0)) /*GPMC_D5*/\
+ MUX_VAL(CP(GPMC_D6), (IEN | PTD | DIS | M0)) /*GPMC_D6*/\
+ MUX_VAL(CP(GPMC_D7), (IEN | PTD | DIS | M0)) /*GPMC_D7*/\
+ MUX_VAL(CP(GPMC_D8), (IEN | PTD | DIS | M0)) /*GPMC_D8*/\
+ MUX_VAL(CP(GPMC_D9), (IEN | PTD | DIS | M0)) /*GPMC_D9*/\
+ MUX_VAL(CP(GPMC_D10), (IEN | PTD | DIS | M0)) /*GPMC_D10*/\
+ MUX_VAL(CP(GPMC_D11), (IEN | PTD | DIS | M0)) /*GPMC_D11*/\
+ MUX_VAL(CP(GPMC_D12), (IEN | PTD | DIS | M0)) /*GPMC_D12*/\
+ MUX_VAL(CP(GPMC_D13), (IEN | PTD | DIS | M0)) /*GPMC_D13*/\
+ MUX_VAL(CP(GPMC_D14), (IEN | PTD | DIS | M0)) /*GPMC_D14*/\
+ MUX_VAL(CP(GPMC_D15), (IEN | PTD | DIS | M0)) /*GPMC_D15*/\
+ MUX_VAL(CP(GPMC_nCS0), (IDIS | PTU | EN | M0)) /*GPMC_nCS0*/\
+ MUX_VAL(CP(GPMC_nCS1), (IDIS | PTU | EN | M0)) /*GPMC_nCS1*/\
+ MUX_VAL(CP(GPMC_nCS2), (IDIS | PTU | EN | M0)) /*GPMC_nCS2*/\
+ MUX_VAL(CP(GPMC_nCS3), (IDIS | PTU | EN | M0)) /*GPMC_nCS3*/\
+ MUX_VAL(CP(GPMC_nCS4), (IDIS | PTU | EN | M0)) /*GPMC_nCS4*/\
+ MUX_VAL(CP(GPMC_nCS5), (IDIS | PTU | EN | M0)) /*GPMC_nCS5*/\
+ MUX_VAL(CP(GPMC_nCS6), (IDIS | PTU | EN | M0)) /*GPMC_nCS6*/\
+ MUX_VAL(CP(GPMC_nCS7), (IDIS | PTU | EN | M0)) /*GPMC_nCS7*/\
+ MUX_VAL(CP(GPMC_CLK), (IDIS | PTD | DIS | M0)) /*GPMC_CLK*/\
+ MUX_VAL(CP(GPMC_nADV_ALE), (IDIS | PTD | DIS | M0)) /*GPMC_nADV_ALE*/\
+ MUX_VAL(CP(GPMC_nOE), (IDIS | PTD | DIS | M0)) /*GPMC_nOE*/\
+ MUX_VAL(CP(GPMC_nWE), (IDIS | PTD | DIS | M0)) /*GPMC_nWE*/\
+ MUX_VAL(CP(GPMC_nBE0_CLE), (IDIS | PTD | DIS | M0)) /*GPMC_nBE0_CLE*/\
+ MUX_VAL(CP(GPMC_nBE1), (IDIS | PTD | DIS | M4)) /*GPIO_61*/\
+ MUX_VAL(CP(GPMC_nWP), (IEN | PTD | DIS | M0)) /*GPMC_nWP*/\
+ MUX_VAL(CP(GPMC_WAIT0), (IEN | PTU | EN | M0)) /*GPMC_WAIT0*/\
+ MUX_VAL(CP(GPMC_WAIT1), (IEN | PTU | EN | M0)) /*GPMC_WAIT1*/\
+ MUX_VAL(CP(GPMC_WAIT2), (IEN | PTU | EN | M4)) /*GPIO_64*/\
+ MUX_VAL(CP(GPMC_WAIT3), (IEN | PTU | EN | M4)) /*GPIO_65*/\
+ /*DSS*/\
+ MUX_VAL(CP(DSS_PCLK), (IDIS | PTD | DIS | M0)) /*DSS_PCLK*/\
+ MUX_VAL(CP(DSS_HSYNC), (IDIS | PTD | DIS | M0)) /*DSS_HSYNC*/\
+ MUX_VAL(CP(DSS_VSYNC), (IDIS | PTD | DIS | M0)) /*DSS_VSYNC*/\
+ MUX_VAL(CP(DSS_ACBIAS), (IDIS | PTD | DIS | M0)) /*DSS_ACBIAS*/\
+ MUX_VAL(CP(DSS_DATA0), (IDIS | PTD | DIS | M0)) /*DSS_DATA0*/\
+ MUX_VAL(CP(DSS_DATA1), (IDIS | PTD | DIS | M0)) /*DSS_DATA1*/\
+ MUX_VAL(CP(DSS_DATA2), (IDIS | PTD | DIS | M0)) /*DSS_DATA2*/\
+ MUX_VAL(CP(DSS_DATA3), (IDIS | PTD | DIS | M0)) /*DSS_DATA3*/\
+ MUX_VAL(CP(DSS_DATA4), (IDIS | PTD | DIS | M0)) /*DSS_DATA4*/\
+ MUX_VAL(CP(DSS_DATA5), (IDIS | PTD | DIS | M0)) /*DSS_DATA5*/\
+ MUX_VAL(CP(DSS_DATA6), (IDIS | PTD | DIS | M0)) /*DSS_DATA6*/\
+ MUX_VAL(CP(DSS_DATA7), (IDIS | PTD | DIS | M0)) /*DSS_DATA7*/\
+ MUX_VAL(CP(DSS_DATA8), (IDIS | PTD | DIS | M0)) /*DSS_DATA8*/\
+ MUX_VAL(CP(DSS_DATA9), (IDIS | PTD | DIS | M0)) /*DSS_DATA9*/\
+ MUX_VAL(CP(DSS_DATA10), (IDIS | PTD | DIS | M0)) /*DSS_DATA10*/\
+ MUX_VAL(CP(DSS_DATA11), (IDIS | PTD | DIS | M0)) /*DSS_DATA11*/\
+ MUX_VAL(CP(DSS_DATA12), (IDIS | PTD | DIS | M0)) /*DSS_DATA12*/\
+ MUX_VAL(CP(DSS_DATA13), (IDIS | PTD | DIS | M0)) /*DSS_DATA13*/\
+ MUX_VAL(CP(DSS_DATA14), (IDIS | PTD | DIS | M0)) /*DSS_DATA14*/\
+ MUX_VAL(CP(DSS_DATA15), (IDIS | PTD | DIS | M0)) /*DSS_DATA15*/\
+ MUX_VAL(CP(DSS_DATA16), (IDIS | PTD | DIS | M0)) /*DSS_DATA16*/\
+ MUX_VAL(CP(DSS_DATA17), (IDIS | PTD | DIS | M0)) /*DSS_DATA17*/\
+ MUX_VAL(CP(DSS_DATA18), (IEN | PTD | DIS | M4)) /*GPIO_88*/\
+ MUX_VAL(CP(DSS_DATA19), (IEN | PTD | DIS | M4)) /*GPIO_89*/\
+ MUX_VAL(CP(DSS_DATA20), (IEN | PTD | DIS | M4)) /*GPIO_90*/\
+ MUX_VAL(CP(DSS_DATA21), (IEN | PTD | DIS | M4)) /*GPIO_91*/\
+ MUX_VAL(CP(DSS_DATA22), (IDIS | PTD | DIS | M0)) /*DSS_DATA22*/\
+ MUX_VAL(CP(DSS_DATA23), (IDIS | PTD | DIS | M0)) /*DSS_DATA23*/\
+ /*CAMERA*/\
+ MUX_VAL(CP(CAM_HS ), (IEN | PTU | EN | M0)) /*CAM_HS */\
+ MUX_VAL(CP(CAM_VS ), (IEN | PTU | EN | M0)) /*CAM_VS */\
+ MUX_VAL(CP(CAM_XCLKA), (IDIS | PTD | DIS | M0)) /*CAM_XCLKA*/\
+ MUX_VAL(CP(CAM_PCLK), (IEN | PTU | EN | M0)) /*CAM_PCLK*/\
+ MUX_VAL(CP(CAM_FLD), (IEN | PTD | DIS | M4)) /*GPIO_98*/\
+ MUX_VAL(CP(CAM_D0 ), (IEN | PTD | DIS | M0)) /*CAM_D0 */\
+ MUX_VAL(CP(CAM_D1 ), (IEN | PTD | DIS | M0)) /*CAM_D1 */\
+ MUX_VAL(CP(CAM_D2 ), (IEN | PTD | DIS | M0)) /*CAM_D2 */\
+ MUX_VAL(CP(CAM_D3 ), (IEN | PTD | DIS | M0)) /*CAM_D3 */\
+ MUX_VAL(CP(CAM_D4 ), (IEN | PTD | DIS | M0)) /*CAM_D4 */\
+ MUX_VAL(CP(CAM_D5 ), (IEN | PTD | DIS | M0)) /*CAM_D5 */\
+ MUX_VAL(CP(CAM_D6 ), (IEN | PTD | DIS | M0)) /*CAM_D6 */\
+ MUX_VAL(CP(CAM_D7 ), (IEN | PTD | DIS | M0)) /*CAM_D7 */\
+ MUX_VAL(CP(CAM_D8 ), (IEN | PTD | DIS | M0)) /*CAM_D8 */\
+ MUX_VAL(CP(CAM_D9 ), (IEN | PTD | DIS | M0)) /*CAM_D9 */\
+ MUX_VAL(CP(CAM_D10), (IEN | PTD | DIS | M0)) /*CAM_D10*/\
+ MUX_VAL(CP(CAM_D11), (IEN | PTD | DIS | M0)) /*CAM_D11*/\
+ MUX_VAL(CP(CAM_XCLKB), (IDIS | PTD | DIS | M0)) /*CAM_XCLKB*/\
+ MUX_VAL(CP(CAM_WEN), (IEN | PTD | DIS | M4)) /*GPIO_167*/\
+ MUX_VAL(CP(CAM_STROBE), (IDIS | PTD | DIS | M0)) /*CAM_STROBE*/\
+ MUX_VAL(CP(CSI2_DX0), (IEN | PTD | DIS | M0)) /*CSI2_DX0*/\
+ MUX_VAL(CP(CSI2_DY0), (IEN | PTD | DIS | M0)) /*CSI2_DY0*/\
+ MUX_VAL(CP(CSI2_DX1), (IEN | PTD | DIS | M0)) /*CSI2_DX1*/\
+ MUX_VAL(CP(CSI2_DY1), (IEN | PTD | DIS | M0)) /*CSI2_DY1*/\
+ /*Audio Interface */\
+ MUX_VAL(CP(McBSP2_FSX), (IEN | PTD | DIS | M0)) /*McBSP2_FSX*/\
+ MUX_VAL(CP(McBSP2_CLKX), (IEN | PTD | DIS | M0)) /*McBSP2_CLKX*/\
+ MUX_VAL(CP(McBSP2_DR), (IEN | PTD | DIS | M0)) /*McBSP2_DR*/\
+ MUX_VAL(CP(McBSP2_DX), (IDIS | PTD | DIS | M0)) /*McBSP2_DX*/\
+ /*Expansion card */\
+ MUX_VAL(CP(MMC1_CLK), (IDIS | PTU | EN | M0)) /*MMC1_CLK*/\
+ MUX_VAL(CP(MMC1_CMD), (IEN | PTU | EN | M0)) /*MMC1_CMD*/\
+ MUX_VAL(CP(MMC1_DAT0), (IEN | PTU | EN | M0)) /*MMC1_DAT0*/\
+ MUX_VAL(CP(MMC1_DAT1), (IEN | PTU | EN | M0)) /*MMC1_DAT1*/\
+ MUX_VAL(CP(MMC1_DAT2), (IEN | PTU | EN | M0)) /*MMC1_DAT2*/\
+ MUX_VAL(CP(MMC1_DAT3), (IEN | PTU | EN | M0)) /*MMC1_DAT3*/\
+ MUX_VAL(CP(MMC1_DAT4), (IEN | PTU | EN | M0)) /*MMC1_DAT4*/\
+ MUX_VAL(CP(MMC1_DAT5), (IEN | PTU | EN | M0)) /*MMC1_DAT5*/\
+ MUX_VAL(CP(MMC1_DAT6), (IEN | PTU | EN | M0)) /*MMC1_DAT6*/\
+ MUX_VAL(CP(MMC1_DAT7), (IEN | PTU | EN | M0)) /*MMC1_DAT7*/\
+ /*Wireless LAN */\
+ MUX_VAL(CP(MMC2_CLK), (IEN | PTD | DIS | M0)) /*MMC2_CLK*/\
+ MUX_VAL(CP(MMC2_CMD), (IEN | PTU | EN | M0)) /*MMC2_CMD*/\
+ MUX_VAL(CP(MMC2_DAT0), (IEN | PTU | EN | M0)) /*MMC2_DAT0*/\
+ MUX_VAL(CP(MMC2_DAT1), (IEN | PTU | EN | M0)) /*MMC2_DAT1*/\
+ MUX_VAL(CP(MMC2_DAT2), (IEN | PTU | EN | M0)) /*MMC2_DAT2*/\
+ MUX_VAL(CP(MMC2_DAT3), (IEN | PTU | EN | M0)) /*MMC2_DAT3*/\
+ MUX_VAL(CP(MMC2_DAT4), (IDIS | PTD | DIS | M1)) /*MMC2_DIR_DAT0*/\
+ MUX_VAL(CP(MMC2_DAT5), (IDIS | PTD | DIS | M1)) /*MMC2_DIR_DAT1*/\
+ MUX_VAL(CP(MMC2_DAT6), (IDIS | PTD | DIS | M1)) /*MMC2_DIR_CMD */\
+ MUX_VAL(CP(MMC2_DAT7), (IEN | PTU | EN | M1)) /*MMC2_CLKIN*/\
+ /*Bluetooth*/\
+ MUX_VAL(CP(McBSP3_DX), (IDIS | PTD | DIS | M0)) /*McBSP3_DX*/\
+ MUX_VAL(CP(McBSP3_DR), (IEN | PTD | DIS | M0)) /*McBSP3_DR*/\
+ MUX_VAL(CP(McBSP3_CLKX), (IEN | PTD | DIS | M0)) /*McBSP3_CLKX */\
+ MUX_VAL(CP(McBSP3_FSX), (IEN | PTD | DIS | M0)) /*McBSP3_FSX*/\
+ MUX_VAL(CP(UART2_CTS), (IEN | PTU | EN | M0)) /*UART2_CTS*/\
+ MUX_VAL(CP(UART2_RTS), (IDIS | PTD | DIS | M0)) /*UART2_RTS*/\
+ MUX_VAL(CP(UART2_TX), (IDIS | PTD | DIS | M0)) /*UART2_TX*/\
+ MUX_VAL(CP(UART2_RX), (IEN | PTD | DIS | M0)) /*UART2_RX*/\
+ /*Modem Interface */\
+ MUX_VAL(CP(UART1_TX), (IDIS | PTD | DIS | M0)) /*UART1_TX*/\
+ MUX_VAL(CP(UART1_RTS), (IDIS | PTD | DIS | M0)) /*UART1_RTS*/\
+ MUX_VAL(CP(UART1_CTS), (IEN | PTU | DIS | M0)) /*UART1_CTS*/\
+ MUX_VAL(CP(UART1_RX), (IEN | PTD | DIS | M0)) /*UART1_RX*/\
+ MUX_VAL(CP(McBSP4_CLKX), (IEN | PTD | DIS | M1)) /*SSI1_DAT_RX */\
+ MUX_VAL(CP(McBSP4_DR), (IEN | PTD | DIS | M1)) /*SSI1_FLAG_RX */\
+ MUX_VAL(CP(McBSP4_DX), (IEN | PTD | DIS | M1)) /*SSI1_RDY_RX */\
+ MUX_VAL(CP(McBSP4_FSX), (IEN | PTD | DIS | M1)) /*SSI1_WAKE*/\
+ MUX_VAL(CP(McBSP1_CLKR), (IEN | PTD | DIS | M0)) /*McBSP1_CLKR */\
+ MUX_VAL(CP(McBSP1_FSR), (IDIS | PTU | EN | M2)) /*CAM_GLOBAL_RESET*/\
+ MUX_VAL(CP(McBSP1_DX), (IEN | PTD | DIS | M4)) /*GPIO_158*/\
+ MUX_VAL(CP(McBSP1_DR), (IEN | PTD | DIS | M0)) /*McBSP1_DR*/\
+ MUX_VAL(CP(McBSP_CLKS), (IDIS | PTU | EN | M2)) /*CAM_SHUTTER */\
+ MUX_VAL(CP(McBSP1_FSX), (IEN | PTD | DIS | M0)) /*McBSP1_FSX*/\
+ MUX_VAL(CP(McBSP1_CLKX), (IEN | PTD | DIS | M0)) /*McBSP1_CLKX */\
+ /*Serial Interface*/\
+ MUX_VAL(CP(UART3_CTS_RCTX), (IEN | PTU | EN | M0)) /*UART3_CTS_RCTX */\
+ MUX_VAL(CP(UART3_RTS_SD), (IDIS | PTD | DIS | M0)) /*UART3_RTS_SD */\
+ MUX_VAL(CP(UART3_RX_IRRX ), (IEN | PTD | DIS | M0)) /*UART3_RX_IRRX*/\
+ MUX_VAL(CP(UART3_TX_IRTX ), (IDIS | PTD | DIS | M0)) /*UART3_TX_IRTX*/\
+ MUX_VAL(CP(HSUSB0_CLK), (IEN | PTD | DIS | M0)) /*HSUSB0_CLK*/\
+ MUX_VAL(CP(HSUSB0_STP), (IDIS | PTU | EN | M0)) /*HSUSB0_STP*/\
+ MUX_VAL(CP(HSUSB0_DIR), (IEN | PTD | DIS | M0)) /*HSUSB0_DIR*/\
+ MUX_VAL(CP(HSUSB0_NXT), (IEN | PTD | DIS | M0)) /*HSUSB0_NXT*/\
+ MUX_VAL(CP(HSUSB0_DATA0), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA0 */\
+ MUX_VAL(CP(HSUSB0_DATA1), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA1 */\
+ MUX_VAL(CP(HSUSB0_DATA2), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA2 */\
+ MUX_VAL(CP(HSUSB0_DATA3), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA3 */\
+ MUX_VAL(CP(HSUSB0_DATA4), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA4 */\
+ MUX_VAL(CP(HSUSB0_DATA5), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA5 */\
+ MUX_VAL(CP(HSUSB0_DATA6), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA6 */\
+ MUX_VAL(CP(HSUSB0_DATA7), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA7 */\
+ MUX_VAL(CP(I2C1_SCL), (IEN | PTU | EN | M0)) /*I2C1_SCL*/\
+ MUX_VAL(CP(I2C1_SDA), (IEN | PTU | EN | M0)) /*I2C1_SDA*/\
+ MUX_VAL(CP(I2C2_SCL), (IEN | PTU | EN | M0)) /*I2C2_SCL*/\
+ MUX_VAL(CP(I2C2_SDA), (IEN | PTU | EN | M0)) /*I2C2_SDA*/\
+ MUX_VAL(CP(I2C3_SCL), (IEN | PTU | EN | M0)) /*I2C3_SCL*/\
+ MUX_VAL(CP(I2C3_SDA), (IEN | PTU | EN | M0)) /*I2C3_SDA*/\
+ MUX_VAL(CP(I2C4_SCL), (IEN | PTU | EN | M0)) /*I2C4_SCL*/\
+ MUX_VAL(CP(I2C4_SDA), (IEN | PTU | EN | M0)) /*I2C4_SDA*/\
+ MUX_VAL(CP(HDQ_SIO), (IEN | PTU | EN | M0)) /*HDQ_SIO*/\
+ MUX_VAL(CP(McSPI1_CLK), (IEN | PTD | DIS | M0)) /*McSPI1_CLK*/\
+ MUX_VAL(CP(McSPI1_SIMO), (IEN | PTD | DIS | M0)) /*McSPI1_SIMO */\
+ MUX_VAL(CP(McSPI1_SOMI), (IEN | PTD | DIS | M0)) /*McSPI1_SOMI */\
+ MUX_VAL(CP(McSPI1_CS0), (IEN | PTU | EN | M0)) /*McSPI1_CS0*/\
+ MUX_VAL(CP(McSPI1_CS1), (IDIS | PTD | DIS | M0)) /*McSPI1_CS1*/\
+ MUX_VAL(CP(McSPI1_CS2), (IDIS | PTD | DIS | M0)) /*McSPI1_CS2*/\
+ MUX_VAL(CP(McSPI1_CS3), (IDIS | PTD | DIS | M0)) /*McSPI1_CS3*/\
+ MUX_VAL(CP(McSPI2_CLK), (IEN | PTD | DIS | M0)) /*McSPI2_CLK*/\
+ MUX_VAL(CP(McSPI2_SIMO), (IEN | PTD | DIS | M0)) /*McSPI2_SIMO */\
+ MUX_VAL(CP(McSPI2_SOMI), (IEN | PTD | DIS | M0)) /*McSPI2_SOMI */\
+ MUX_VAL(CP(McSPI2_CS0), (IEN | PTU | EN | M0)) /*McSPI2_CS0*/\
+ MUX_VAL(CP(McSPI2_CS1), (IDIS | PTD | DIS | M0)) /*McSPI2_CS1*/\
+ /*Control and debug */\
+ MUX_VAL(CP(SYS_32K), (IEN | PTD | DIS | M0)) /*SYS_32K*/\
+ MUX_VAL(CP(SYS_CLKREQ), (IEN | PTD | DIS | M0)) /*SYS_CLKREQ*/\
+ MUX_VAL(CP(SYS_nIRQ), (IEN | PTU | EN | M0)) /*SYS_nIRQ*/\
+ MUX_VAL(CP(SYS_BOOT0), (IEN | PTD | DIS | M4)) /*GPIO_2 */\
+ MUX_VAL(CP(SYS_BOOT1), (IEN | PTD | DIS | M4)) /*GPIO_3 */\
+ MUX_VAL(CP(SYS_BOOT2), (IEN | PTD | DIS | M4)) /*GPIO_4 */\
+ MUX_VAL(CP(SYS_BOOT3), (IEN | PTD | DIS | M4)) /*GPIO_5 */\
+ MUX_VAL(CP(SYS_BOOT4), (IEN | PTD | DIS | M4)) /*GPIO_6 */\
+ MUX_VAL(CP(SYS_BOOT5), (IEN | PTD | DIS | M4)) /*GPIO_7 */\
+ MUX_VAL(CP(SYS_BOOT6), (IEN | PTD | DIS | M4)) /*GPIO_8 */\
+ MUX_VAL(CP(SYS_OFF_MODE), (IEN | PTD | DIS | M0)) /*SYS_OFF_MODE */\
+ MUX_VAL(CP(SYS_CLKOUT1), (IEN | PTD | DIS | M0)) /*SYS_CLKOUT1 */\
+ MUX_VAL(CP(SYS_CLKOUT2), (IEN | PTU | EN | M4)) /*GPIO_186*/\
+ MUX_VAL(CP(JTAG_nTRST), (IEN | PTD | DIS | M0)) /*JTAG_nTRST*/\
+ MUX_VAL(CP(JTAG_TCK), (IEN | PTD | DIS | M0)) /*JTAG_TCK*/\
+ MUX_VAL(CP(JTAG_TMS), (IEN | PTD | DIS | M0)) /*JTAG_TMS*/\
+ MUX_VAL(CP(JTAG_TDI), (IEN | PTD | DIS | M0)) /*JTAG_TDI*/\
+ MUX_VAL(CP(JTAG_EMU0), (IEN | PTD | DIS | M0)) /*JTAG_EMU0*/\
+ MUX_VAL(CP(JTAG_EMU1), (IEN | PTD | DIS | M0)) /*JTAG_EMU1*/\
+ MUX_VAL(CP(ETK_CLK), (IEN | PTD | DIS | M4)) /*GPIO_12*/\
+ MUX_VAL(CP(ETK_CTL), (IEN | PTD | DIS | M4)) /*GPIO_13*/\
+ MUX_VAL(CP(ETK_D0 ), (IEN | PTD | DIS | M4)) /*GPIO_14*/\
+ MUX_VAL(CP(ETK_D1 ), (IEN | PTD | DIS | M4)) /*GPIO_15*/\
+ MUX_VAL(CP(ETK_D2 ), (IEN | PTD | DIS | M4)) /*GPIO_16*/\
+ MUX_VAL(CP(ETK_D3 ), (IEN | PTD | DIS | M2)) /*McSPI3_CLK*/\
+ MUX_VAL(CP(ETK_D4 ), (IEN | PTD | DIS | M2)) /*McSPI3_SIMO */\
+ MUX_VAL(CP(ETK_D5 ), (IEN | PTD | DIS | M2)) /*McSPI3_SOMI */\
+ MUX_VAL(CP(ETK_D6 ), (IEN | PTD | DIS | M2)) /*McSPI3_CS0*/\
+ MUX_VAL(CP(ETK_D7 ), (IEN | PTD | DIS | M2)) /*McSPI3_CS1*/\
+ MUX_VAL(CP(ETK_D8 ), (IEN | PTD | DIS | M1)) /*SYS_DRM_MSECURE*/\
+ MUX_VAL(CP(ETK_D9 ), (IEN | PTD | DIS | M1)) /*SYS_SECURE_IND */\
+ MUX_VAL(CP(ETK_D10), (IEN | PTD | DIS | M4)) /*GPIO_24*/\
+ MUX_VAL(CP(ETK_D11), (IEN | PTD | DIS | M4)) /*GPIO_25*/\
+ MUX_VAL(CP(ETK_D12), (IEN | PTD | DIS | M4)) /*GPIO_26*/\
+ MUX_VAL(CP(ETK_D13), (IEN | PTD | DIS | M4)) /*GPIO_27*/\
+ MUX_VAL(CP(ETK_D14), (IEN | PTD | DIS | M4)) /*GPIO_28*/\
+ MUX_VAL(CP(ETK_D15), (IEN | PTD | DIS | M4)) /*GPIO_29*/\
+ /*Die to Die */\
+ MUX_VAL(CP(d2d_mcad0), (IEN | PTD | DIS | M0)) /*d2d_mcad0*/\
+ MUX_VAL(CP(d2d_mcad1), (IEN | PTD | DIS | M0)) /*d2d_mcad1*/\
+ MUX_VAL(CP(d2d_mcad2), (IEN | PTD | DIS | M0)) /*d2d_mcad2*/\
+ MUX_VAL(CP(d2d_mcad3), (IEN | PTD | DIS | M0)) /*d2d_mcad3*/\
+ MUX_VAL(CP(d2d_mcad4), (IEN | PTD | DIS | M0)) /*d2d_mcad4*/\
+ MUX_VAL(CP(d2d_mcad5), (IEN | PTD | DIS | M0)) /*d2d_mcad5*/\
+ MUX_VAL(CP(d2d_mcad6), (IEN | PTD | DIS | M0)) /*d2d_mcad6*/\
+ MUX_VAL(CP(d2d_mcad7), (IEN | PTD | DIS | M0)) /*d2d_mcad7*/\
+ MUX_VAL(CP(d2d_mcad8), (IEN | PTD | DIS | M0)) /*d2d_mcad8*/\
+ MUX_VAL(CP(d2d_mcad9), (IEN | PTD | DIS | M0)) /*d2d_mcad9*/\
+ MUX_VAL(CP(d2d_mcad10), (IEN | PTD | DIS | M0)) /*d2d_mcad10*/\
+ MUX_VAL(CP(d2d_mcad11), (IEN | PTD | DIS | M0)) /*d2d_mcad11*/\
+ MUX_VAL(CP(d2d_mcad12), (IEN | PTD | DIS | M0)) /*d2d_mcad12*/\
+ MUX_VAL(CP(d2d_mcad13), (IEN | PTD | DIS | M0)) /*d2d_mcad13*/\
+ MUX_VAL(CP(d2d_mcad14), (IEN | PTD | DIS | M0)) /*d2d_mcad14*/\
+ MUX_VAL(CP(d2d_mcad15), (IEN | PTD | DIS | M0)) /*d2d_mcad15*/\
+ MUX_VAL(CP(d2d_mcad16), (IEN | PTD | DIS | M0)) /*d2d_mcad16*/\
+ MUX_VAL(CP(d2d_mcad17), (IEN | PTD | DIS | M0)) /*d2d_mcad17*/\
+ MUX_VAL(CP(d2d_mcad18), (IEN | PTD | DIS | M0)) /*d2d_mcad18*/\
+ MUX_VAL(CP(d2d_mcad19), (IEN | PTD | DIS | M0)) /*d2d_mcad19*/\
+ MUX_VAL(CP(d2d_mcad20), (IEN | PTD | DIS | M0)) /*d2d_mcad20*/\
+ MUX_VAL(CP(d2d_mcad21), (IEN | PTD | DIS | M0)) /*d2d_mcad21*/\
+ MUX_VAL(CP(d2d_mcad22), (IEN | PTD | DIS | M0)) /*d2d_mcad22*/\
+ MUX_VAL(CP(d2d_mcad23), (IEN | PTD | DIS | M0)) /*d2d_mcad23*/\
+ MUX_VAL(CP(d2d_mcad24), (IEN | PTD | DIS | M0)) /*d2d_mcad24*/\
+ MUX_VAL(CP(d2d_mcad25), (IEN | PTD | DIS | M0)) /*d2d_mcad25*/\
+ MUX_VAL(CP(d2d_mcad26), (IEN | PTD | DIS | M0)) /*d2d_mcad26*/\
+ MUX_VAL(CP(d2d_mcad27), (IEN | PTD | DIS | M0)) /*d2d_mcad27*/\
+ MUX_VAL(CP(d2d_mcad28), (IEN | PTD | DIS | M0)) /*d2d_mcad28*/\
+ MUX_VAL(CP(d2d_mcad29), (IEN | PTD | DIS | M0)) /*d2d_mcad29*/\
+ MUX_VAL(CP(d2d_mcad30), (IEN | PTD | DIS | M0)) /*d2d_mcad30*/\
+ MUX_VAL(CP(d2d_mcad31), (IEN | PTD | DIS | M0)) /*d2d_mcad31*/\
+ MUX_VAL(CP(d2d_mcad32), (IEN | PTD | DIS | M0)) /*d2d_mcad32*/\
+ MUX_VAL(CP(d2d_mcad33), (IEN | PTD | DIS | M0)) /*d2d_mcad33*/\
+ MUX_VAL(CP(d2d_mcad34), (IEN | PTD | DIS | M0)) /*d2d_mcad34*/\
+ MUX_VAL(CP(d2d_mcad35), (IEN | PTD | DIS | M0)) /*d2d_mcad35*/\
+ MUX_VAL(CP(d2d_mcad36), (IEN | PTD | DIS | M0)) /*d2d_mcad36*/\
+ MUX_VAL(CP(d2d_clk26mi), (IEN | PTD | DIS | M0)) /*d2d_clk26mi */\
+ MUX_VAL(CP(d2d_nrespwron ), (IEN | PTD | DIS | M0)) /*d2d_nrespwron*/\
+ MUX_VAL(CP(d2d_nreswarm), (IEN | PTD | DIS | M0)) /*d2d_nreswarm */\
+ MUX_VAL(CP(d2d_arm9nirq), (IEN | PTD | DIS | M0)) /*d2d_arm9nirq */\
+ MUX_VAL(CP(d2d_uma2p6fiq ), (IEN | PTD | DIS | M0)) /*d2d_uma2p6fiq*/\
+ MUX_VAL(CP(d2d_spint), (IEN | PTD | DIS | M0)) /*d2d_spint*/\
+ MUX_VAL(CP(d2d_frint), (IEN | PTD | DIS | M0)) /*d2d_frint*/\
+ MUX_VAL(CP(d2d_dmareq0), (IEN | PTD | DIS | M0)) /*d2d_dmareq0 */\
+ MUX_VAL(CP(d2d_dmareq1), (IEN | PTD | DIS | M0)) /*d2d_dmareq1 */\
+ MUX_VAL(CP(d2d_dmareq2), (IEN | PTD | DIS | M0)) /*d2d_dmareq2 */\
+ MUX_VAL(CP(d2d_dmareq3), (IEN | PTD | DIS | M0)) /*d2d_dmareq3 */\
+ MUX_VAL(CP(d2d_n3gtrst), (IEN | PTD | DIS | M0)) /*d2d_n3gtrst */\
+ MUX_VAL(CP(d2d_n3gtdi), (IEN | PTD | DIS | M0)) /*d2d_n3gtdi*/\
+ MUX_VAL(CP(d2d_n3gtdo), (IEN | PTD | DIS | M0)) /*d2d_n3gtdo*/\
+ MUX_VAL(CP(d2d_n3gtms), (IEN | PTD | DIS | M0)) /*d2d_n3gtms*/\
+ MUX_VAL(CP(d2d_n3gtck), (IEN | PTD | DIS | M0)) /*d2d_n3gtck*/\
+ MUX_VAL(CP(d2d_n3grtck), (IEN | PTD | DIS | M0)) /*d2d_n3grtck */\
+ MUX_VAL(CP(d2d_mstdby), (IEN | PTD | DIS | M0)) /*d2d_mstdby*/\
+ MUX_VAL(CP(d2d_swakeup), (IEN | PTD | DIS | M0)) /*d2d_swakeup */\
+ MUX_VAL(CP(d2d_idlereq), (IEN | PTD | DIS | M0)) /*d2d_idlereq */\
+ MUX_VAL(CP(d2d_idleack), (IEN | PTD | DIS | M0)) /*d2d_idleack */\
+ MUX_VAL(CP(d2d_mwrite), (IEN | PTD | DIS | M0)) /*d2d_mwrite*/\
+ MUX_VAL(CP(d2d_swrite), (IEN | PTD | DIS | M0)) /*d2d_swrite*/\
+ MUX_VAL(CP(d2d_mread), (IEN | PTD | DIS | M0)) /*d2d_mread*/\
+ MUX_VAL(CP(d2d_sread), (IEN | PTD | DIS | M0)) /*d2d_sread*/\
+ MUX_VAL(CP(d2d_mbusflag), (IEN | PTD | DIS | M0)) /*d2d_mbusflag */\
+ MUX_VAL(CP(d2d_sbusflag), (IEN | PTD | DIS | M0)) /*d2d_sbusflag */
+//#endif
+
+/**********************************************************
+ * Routine: set_muxconf_regs
+ * Description: Setting up the configuration Mux registers
+ * specific to the hardware. Many pins need
+ * to be moved from protect to primary mode.
+ *********************************************************/
+void set_muxconf_regs(void)
+{
+ if(get_cpu_rev() == CPU_3430_ES2) {
+ MUX_DEFAULT_ES2();
+ }
+ else {
+ MUX_DEFAULT();
+ }
+}
+
+/******************************************************************************
+ * Routine: update_mux()
+ * Description:Update balls which are different between boards. All should be
+ * updated to match functionality. However, I'm only updating ones
+ * which I'll be using for now. When power comes into play they
+ * all need updating.
+ *****************************************************************************/
+void update_mux(u32 btype, u32 mtype)
+{
+ /* NOTHING as of now... */
+}
+
+#if (CONFIG_COMMANDS & CFG_CMD_NAND) && defined(CFG_NAND_LEGACY)
+/**********************************************************
+ * Routine: nand+_init
+ * Description: Set up nand for nand and jffs2 commands
+ *********************************************************/
+void nand_init(void)
+{
+ extern flash_info_t flash_info[];
+
+ nand_probe(CFG_NAND_ADDR);
+ if (nand_dev_desc[0].ChipID != NAND_ChipID_UNKNOWN) {
+ print_size(nand_dev_desc[0].totlen, "\n");
+ }
+#ifdef CFG_JFFS2_MEM_NAND
+ flash_info[CFG_JFFS2_FIRST_BANK].flash_id = nand_dev_desc[0].id;
+ /* only read kernel single meg partition */
+ flash_info[CFG_JFFS2_FIRST_BANK].size = 1024 * 1024 * 2;
+ /* 1024 blocks in 16meg chip (use less for raw/copied partition) */
+ flash_info[CFG_JFFS2_FIRST_BANK].sector_count = 1024;
+ /* ?, ram for now, open question, copy to RAM or adapt for NAND */
+ flash_info[CFG_JFFS2_FIRST_BANK].start[0] = 0x80200000;
+#endif
+}
+#endif
+
diff --git a/board/omap3430sdp/sys_info.c b/board/omap3430sdp/sys_info.c
new file mode 100644
index 0000000000..f315f436a9
--- /dev/null
+++ b/board/omap3430sdp/sys_info.c
@@ -0,0 +1,432 @@
+/*
+ * (C) Copyright 2004-2006
+ * Texas Instruments, <www.ti.com>
+ * Richard Woodruff <r-woodruff2@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR /PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/arch/cpu.h>
+#include <asm/io.h>
+#include <asm/arch/bits.h>
+#include <asm/arch/mem.h> /* get mem tables */
+#include <asm/arch/sys_proto.h>
+#include <asm/arch/sys_info.h>
+#include <i2c.h>
+
+/****************************************************************************
+ * check_fpga_revision number: the rev number should be a or b
+ ***************************************************************************/
+inline u16 check_fpga_rev(void)
+{
+ return __raw_readw(FPGA_REV_REGISTER);
+}
+
+/****************************************************************************
+ * check_uieeprom_avail: Check FPGA Availability
+ * OnBoard DEBUG FPGA registers need to be ready for us to proceed
+ * Required to retrieve the bootmode also.
+ ***************************************************************************/
+int check_uieeprom_avail(void)
+{
+ volatile unsigned short *ui_brd_name =
+ (volatile unsigned short *)EEPROM_UI_BRD + 8;
+ int count = 1000;
+
+ /* Check if UI revision Name is already updated.
+ * if this is not done, we wait a bit to give a chance
+ * to update. This is nice to do as the Main board FPGA
+ * gets a chance to know off all it's components and we can continue
+ * to work normally
+ * Currently taking 269* udelay(1000) to update this on poweron from flash!
+ */
+ while ((*ui_brd_name == 0x00) && count) {
+ udelay(200);
+ count--;
+ }
+ /* Timed out count will be 0? */
+ return count;
+}
+
+/**************************************************************************
+ * get_cpu_type() - Read the FPGA Debug registers and provide the DIP switch
+ * settings
+ * 1 is on
+ * 0 is off
+ * Will return Index of type of gpmc
+ ***************************************************************************/
+u32 get_gpmc0_type(void)
+{
+ u8 cs;
+
+ if (!check_fpga_rev()) {
+ /* we dont have an DEBUG FPGA??? */
+ /* Depend on #defines!! default to strata boot return param */
+ return 0x0;
+ }
+ /* S8-DIP-OFF = 1, S8-DIP-ON = 0 */
+ cs = (u8) (__raw_readw(DIP_SWITCH_INPUT_REG2) & 0xF);
+
+ if(get_board_type() == SDP_3430_V2)
+ /* change (S8-1:4=DS-2:0) to (S8-4:1=DS-2:0) */
+ cs = ((cs & 8) >> 3) | ((cs & 4) >> 1) |
+ ((cs & 2) << 1) | ((cs & 1) << 3);
+ else
+ /* change (S8-1:3=DS-2:0) to (S8-3:1=DS-2:0) */
+ cs = ((cs & 4) >> 2) | (cs & 2) | ((cs & 1) << 2);
+ return (cs);
+}
+
+/****************************************************
+ * get_cpu_type() - low level get cpu type
+ * - no C globals yet.
+ ****************************************************/
+u32 get_cpu_type(void)
+{
+ // fixme, need to get register defines for 3430
+ return (CPU_3430);
+}
+
+/******************************************
+ * get_cpu_rev(void) - extract version info
+ ******************************************/
+u32 get_cpu_rev(void)
+{
+ u32 cpuid=0;
+ /* On ES1.0 the IDCODE register is not exposed on L4
+ * so using CPU ID to differentiate
+ * between ES2.0 and ES1.0.
+ */
+ __asm__ __volatile__("mrc p15, 0, %0, c0, c0, 0":"=r" (cpuid));
+ if((cpuid & 0xf) == 0x0)
+ return CPU_3430_ES1;
+ else
+ return CPU_3430_ES2;
+
+}
+
+/******************************************
+ * cpu_is_3410(void) - returns true for 3410
+ ******************************************/
+u32 cpu_is_3410(void)
+{
+ int status;
+ if(get_cpu_rev() < CPU_3430_ES2) {
+ return 0;
+ } else {
+ /* read scalability status and return 1 for 3410*/
+ status = __raw_readl(CONTROL_SCALABLE_OMAP_STATUS);
+ /* Check whether MPU frequency is set to 266 MHz which
+ * is nominal for 3410. If yes return true else false
+ */
+ if (((status >> 8) & 0x3) == 0x2)
+ return 1;
+ else
+ return 0;
+ }
+}
+
+/****************************************************
+ * is_mem_sdr() - return 1 if mem type in use is SDR
+ ****************************************************/
+u32 is_mem_sdr(void)
+{
+ volatile u32 *burst = (volatile u32 *)(SDRC_MR_0 + SDRC_CS0_OSET);
+ if (*burst == SDP_SDRC_MR_0_SDR)
+ return (1);
+ return (0);
+}
+
+/***********************************************************
+ * get_mem_type() - identify type of mDDR part used.
+ ***********************************************************/
+u32 get_mem_type(void)
+{
+ /* Current SDP3430 uses 2x16 MDDR Infenion parts */
+ return (DDR_DISCRETE);
+}
+
+/***********************************************************************
+ * get_cs0_size() - get size of chip select 0/1
+ ************************************************************************/
+u32 get_sdr_cs_size(u32 offset)
+{
+ u32 size;
+
+ /* get ram size field */
+ size = __raw_readl(SDRC_MCFG_0 + offset) >> 8;
+ size &= 0x3FF; /* remove unwanted bits */
+ size *= SZ_2M; /* find size in MB */
+ return (size);
+}
+
+/***********************************************************************
+ * get_board_type() - get board type based on current production stats.
+ * - NOTE-1-: 2 I2C EEPROMs will someday be populated with proper info.
+ * when they are available we can get info from there. This should
+ * be correct of all known boards up until today.
+ * - NOTE-2- EEPROMs are populated but they are updated very slowly. To
+ * avoid waiting on them we will use ES version of the chip to get info.
+ * A later version of the FPGA migth solve their speed issue.
+ ************************************************************************/
+u32 get_board_type(void)
+{
+ if(get_cpu_rev() == CPU_3430_ES2)
+ return SDP_3430_V2;
+ else
+ return SDP_3430_V1;
+}
+
+/******************************************************************
+ * get_sysboot_value() - get init word settings
+ ******************************************************************/
+inline u32 get_sysboot_value(void)
+{
+ return (0x0000003F & __raw_readl(CONTROL_STATUS));
+}
+
+/***************************************************************************
+ * get_gpmc0_base() - Return current address hardware will be
+ * fetching from. The below effectively gives what is correct, its a bit
+ * mis-leading compared to the TRM. For the most general case the mask
+ * needs to be also taken into account this does work in practice.
+ * - for u-boot we currently map:
+ * -- 0 to nothing,
+ * -- 4 to flash
+ * -- 8 to enent
+ * -- c to wifi
+ ****************************************************************************/
+u32 get_gpmc0_base(void)
+{
+ u32 b;
+
+ b = __raw_readl(GPMC_CONFIG_CS0 + GPMC_CONFIG7);
+ b &= 0x1F; /* keep base [5:0] */
+ b = b << 24; /* ret 0x0b000000 */
+ return (b);
+}
+
+/*******************************************************************
+ * get_gpmc0_width() - See if bus is in x8 or x16 (mainly for nand)
+ *******************************************************************/
+u32 get_gpmc0_width(void)
+{
+ return (WIDTH_16BIT);
+}
+
+/*************************************************************************
+ * get_board_rev() - setup to pass kernel board revision information
+ * returns:(bit[0-3] sub version, higher bit[7-4] is higher version)
+ *************************************************************************/
+u32 get_board_rev(void)
+{
+ /* Currently reading EEPROM reg to get UI board version and try it out */
+ volatile char *ui_brd_name = (char *)EEPROM_UI_BRD;
+ char enhanced_ui_brd_name[] = ENHANCED_UI_EE_NAME;
+ int count = 0;
+#if 0
+ if (!check_uieeprom_avail()) {
+ /* timed out OR fpga rev not found!! */
+ /* Assume 1.0 */
+ return 0x01;
+ }
+ /* Move ahead to name location */
+ ui_brd_name += 0x08;
+ count = sizeof(enhanced_ui_brd_name) - 2;
+ while ((enhanced_ui_brd_name[count] == ui_brd_name[count]) && count) {
+ count--;
+ }
+ /* Match?? */
+ if (!count) {
+ /* Enhanced UI board.. SDP1.1 */
+ return 0x11;
+ }
+#endif
+ /* Legacy UI - hope they are all 1.0 boards.. */
+ return (0x10);
+}
+
+/*********************************************************************
+ * display_board_info() - print banner with board info.
+ *********************************************************************/
+void display_board_info(u32 btype)
+{
+ char *bootmode[] = {
+ "NOR",
+ "ONND",
+ "NAND",
+ "P2a",
+ "NOR",
+ "NOR",
+ "P2a",
+ "P2b",
+ };
+ u32 brev = get_board_rev();
+ char cpu_3430s[] = "3430";
+ char db_ver[] = "0.0"; /* board type */
+ char mem_sdr[] = "mSDR"; /* memory type */
+ char mem_ddr[] = "mDDR";
+ char t_tst[] = "TST"; /* security level */
+ char t_emu[] = "EMU";
+ char t_hs[] = "HS";
+ char t_gp[] = "GP";
+ char unk[] = "?";
+#ifdef CONFIG_LED_INFO
+ char led_string[CONFIG_LED_LEN] = { 0 };
+#endif
+
+#if defined(L3_165MHZ)
+ char p_l3[] = "165";
+#elif defined(L3_110MHZ)
+ char p_l3[] = "110";
+#elif defined(L3_133MHZ)
+ char p_l3[] = "133";
+#elif defined(L3_100MHZ)
+ char p_l3[] = "100"
+#endif
+
+#if defined(PRCM_PCLK_OPP1)
+ char p_cpu[] = "1";
+#elif defined(PRCM_PCLK_OPP2)
+ char p_cpu[] = "2";
+#elif defined(PRCM_PCLK_OPP3)
+ char p_cpu[] = "3";
+#elif defined(PRCM_PCLK_OPP4)
+ char p_cpu[] = "4"
+#endif
+ char *cpu_s, *db_s, *mem_s, *sec_s;
+ u32 cpu, rev, sec;
+
+ rev = get_cpu_rev();
+ cpu = get_cpu_type();
+ sec = get_device_type();
+
+ if (is_mem_sdr())
+ mem_s = mem_sdr;
+ else
+ mem_s = mem_ddr;
+
+ cpu_s = cpu_3430s;
+
+ db_s = db_ver;
+ db_s[0] += (brev >> 4) & 0xF;
+ db_s[2] += brev & 0xF;
+
+ switch (sec) {
+ case TST_DEVICE:
+ sec_s = t_tst;
+ break;
+ case EMU_DEVICE:
+ sec_s = t_emu;
+ break;
+ case HS_DEVICE:
+ sec_s = t_hs;
+ break;
+ case GP_DEVICE:
+ sec_s = t_gp;
+ break;
+ default:
+ sec_s = unk;
+ }
+
+ printf("OMAP%s-%s rev %d, CPU-OPP%s L3-%sMHz\n", cpu_s, sec_s, rev, p_cpu,
+ p_l3);
+ printf("TI 3430SDP %s Version + %s (Boot %s)\n", db_s,
+ mem_s, bootmode[get_gpmc0_type()]);
+#ifdef CONFIG_LED_INFO
+ /* Format: 0123456789ABCDEF
+ * 3430C GP L3-100 NAND
+ */
+ sprintf(led_string, "%5s%3s%3s %4s", cpu_s, sec_s, p_l3,
+ bootmode[get_gpmc0_type()]);
+ /* reuse sec */
+ for (sec = 0; sec < CONFIG_LED_LEN; sec += 2) {
+ /* invert byte loc */
+ u16 val = led_string[sec] << 8;
+ val |= led_string[sec + 1];
+ __raw_writew(val, LED_REGISTER + sec);
+ }
+#endif
+
+}
+
+/********************************************************
+ * get_base(); get upper addr of current execution
+ *******************************************************/
+u32 get_base(void)
+{
+ u32 val;
+ __asm__ __volatile__("mov %0, pc \n":"=r"(val)::"memory");
+ val &= 0xF0000000;
+ val >>= 28;
+ return (val);
+}
+
+/********************************************************
+ * running_in_flash() - tell if currently running in
+ * flash.
+ *******************************************************/
+u32 running_in_flash(void)
+{
+ if (get_base() < 4)
+ return (1); /* in flash */
+ return (0); /* running in SRAM or SDRAM */
+}
+
+/********************************************************
+ * running_in_sram() - tell if currently running in
+ * sram.
+ *******************************************************/
+u32 running_in_sram(void)
+{
+ if (get_base() == 4)
+ return (1); /* in SRAM */
+ return (0); /* running in FLASH or SDRAM */
+}
+
+/********************************************************
+ * running_in_sdram() - tell if currently running in
+ * sdram.
+ *******************************************************/
+u32 running_in_sdram(void)
+{
+ if (get_base() > 4)
+ return (1); /* in sdram */
+ return (0); /* running in SRAM or FLASH */
+}
+
+/***************************************************************
+ * get_boot_type() - Is this an XIP type device or a stream one
+ * bits 4-0 specify type. Bit 5 sys mem/perif
+ ***************************************************************/
+u32 get_boot_type(void)
+{
+ u32 v;
+
+ v = get_sysboot_value() & (BIT4 | BIT3 | BIT2 | BIT1 | BIT0);
+ return v;
+}
+
+/*************************************************************
+ * get_device_type(): tell if GP/HS/EMU/TST
+ *************************************************************/
+u32 get_device_type(void)
+{
+ int mode;
+ mode = __raw_readl(CONTROL_STATUS) & (DEVICE_MASK);
+ return (mode >>= 8);
+}
diff --git a/board/omap3430sdp/syslib.c b/board/omap3430sdp/syslib.c
new file mode 100644
index 0000000000..2b16cc4768
--- /dev/null
+++ b/board/omap3430sdp/syslib.c
@@ -0,0 +1,73 @@
+/*
+ * (C) Copyright 2006
+ * Texas Instruments, <www.ti.com>
+ * Richard Woodruff <r-woodruff2@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/arch/cpu.h>
+#include <asm/io.h>
+#include <asm/arch/bits.h>
+#include <asm/arch/mem.h>
+#include <asm/arch/clocks.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/arch/sys_info.h>
+
+/************************************************************
+ * sdelay() - simple spin loop. Will be constant time as
+ * its generally used in bypass conditions only. This
+ * is necessary until timers are accessible.
+ *
+ * not inline to increase chances its in cache when called
+ *************************************************************/
+void sdelay(unsigned long loops)
+{
+ __asm__ volatile ("1:\n" "subs %0, %1, #1\n"
+ "bne 1b":"=r" (loops):"0"(loops));
+}
+
+/*****************************************************************
+ * sr32 - clear & set a value in a bit range for a 32 bit address
+ *****************************************************************/
+void sr32(u32 addr, u32 start_bit, u32 num_bits, u32 value)
+{
+ u32 tmp, msk = 0;
+ msk = 1 << num_bits;
+ --msk;
+ tmp = __raw_readl(addr) & ~(msk << start_bit);
+ tmp |= value << start_bit;
+ __raw_writel(tmp, addr);
+}
+
+/*********************************************************************
+ * wait_on_value() - common routine to allow waiting for changes in
+ * volatile regs.
+ *********************************************************************/
+u32 wait_on_value(u32 read_bit_mask, u32 match_value, u32 read_addr, u32 bound)
+{
+ u32 i = 0, val;
+ do {
+ ++i;
+ val = __raw_readl(read_addr) & read_bit_mask;
+ if (val == match_value)
+ return (1);
+ if (i == bound)
+ return (0);
+ } while (1);
+}
+
diff --git a/board/omap3430sdp/u-boot.lds b/board/omap3430sdp/u-boot.lds
new file mode 100644
index 0000000000..6c811937f7
--- /dev/null
+++ b/board/omap3430sdp/u-boot.lds
@@ -0,0 +1,58 @@
+/*
+ * January 2004 - Changed to support H4 device
+ * Copyright (c) 2004 Texas Instruments
+ *
+ * (C) Copyright 2002
+ * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+ENTRY(_start)
+SECTIONS
+{
+ . = 0x00000000;
+
+ . = ALIGN(4);
+ .text :
+ {
+ cpu/omap3/start.o (.text)
+ *(.text)
+ }
+
+ . = ALIGN(4);
+ .rodata : { *(.rodata) }
+
+ . = ALIGN(4);
+ .data : { *(.data) }
+
+ . = ALIGN(4);
+ .got : { *(.got) }
+
+ __u_boot_cmd_start = .;
+ .u_boot_cmd : { *(.u_boot_cmd) }
+ __u_boot_cmd_end = .;
+
+ . = ALIGN(4);
+ __bss_start = .;
+ .bss : { *(.bss) }
+ _end = .;
+}
diff --git a/board/omap5912osk/lowlevel_init.S b/board/omap5912osk/lowlevel_init.S
index 3b9633ad98..a1fa097d9e 100644
--- a/board/omap5912osk/lowlevel_init.S
+++ b/board/omap5912osk/lowlevel_init.S
@@ -41,6 +41,13 @@ _TEXT_BASE:
.globl lowlevel_init
lowlevel_init:
+ /*------------------------------------------------------*
+ * Ensure i-cache is enabled *
+ * To configure TC regs without fetching instruction *
+ *------------------------------------------------------*/
+ mrc p15, 0, r0, c1, c0
+ orr r0, r0, #0x1000
+ mcr p15, 0, r0, c1, c0
/*------------------------------------------------------*
*mask all IRQs by setting all bits in the INTMR default*
@@ -59,33 +66,34 @@ lowlevel_init:
str r1, [r0]
/*------------------------------------------------------*
- * Set up ARM CLM registers (IDLECT2) *
+ * Set up ARM CLM registers (IDLECT2) *
*------------------------------------------------------*/
ldr r0, REG_ARM_IDLECT2
ldr r1, VAL_ARM_IDLECT2
str r1, [r0]
/*------------------------------------------------------*
- * Set up ARM CLM registers (IDLECT3) *
+ * Set up ARM CLM registers (IDLECT3) *
*------------------------------------------------------*/
ldr r0, REG_ARM_IDLECT3
ldr r1, VAL_ARM_IDLECT3
str r1, [r0]
-
- mov r1, #0x01 /* PER_EN bit */
+ mov r1, #0x01 /* PER_EN bit */
ldr r0, REG_ARM_RSTCT2
- strh r1, [r0] /* CLKM; Peripheral reset. */
+ strh r1, [r0] /* CLKM; Peripheral reset. */
- /* Set CLKM to Sync-Scalable */
- /* I supposedly need to enable the dsp clock before switching */
- mov r1, #0x0000
+ /* Set CLKM to Sync-Scalable */
+ mov r1, #0x1000
ldr r0, REG_ARM_SYSST
- strh r1, [r0]
- mov r0, #0x400
-1:
- subs r0, r0, #0x1 /* wait for any bubbles to finish */
+
+ mov r2, #0
+1: cmp r2, #1
+ streqh r1, [r0]
+ add r2, r2, #1
+ cmp r2, #0x100 /* wait for any bubbles to finish */
bne 1b
+
ldr r1, VAL_ARM_CKCTL
ldr r0, REG_ARM_CKCTL
strh r1, [r0]
@@ -107,17 +115,16 @@ lowlevel_init:
ldr r1, VAL_DPLL1_CTL
ldr r0, REG_DPLL1_CTL
strh r1, [r0]
- ands r1, r1, #0x10 /* Check if PLL is enabled. */
- beq lock_end /* Do not look for lock if BYPASS selected */
+ ands r1, r1, #0x10 /* Check if PLL is enabled. */
+ beq lock_end /* Do not look for lock if BYPASS selected */
2:
ldrh r1, [r0]
- ands r1, r1, #0x01 /* Check the LOCK bit.*/
- beq 2b /* loop until bit goes hi. */
+ ands r1, r1, #0x01 /* Check the LOCK bit.*/
+ beq 2b /* loop until bit goes hi. */
lock_end:
-
/*------------------------------------------------------*
- * Turn off the watchdog during init... *
+ * Turn off the watchdog during init... *
*------------------------------------------------------*/
ldr r0, REG_WATCHDOG
ldr r1, WATCHDOG_VAL1
@@ -143,30 +150,49 @@ watch2Wait:
tst r1, #0x10
bne watch2Wait
-
/* Set memory timings corresponding to the new clock speed */
+ ldr r3, VAL_SDRAM_CONFIG_SDF0
/* Check execution location to determine current execution location
* and branch to appropriate initialization code.
*/
- /* Load physical SDRAM base. */
- mov r0, #0x10000000
- /* Get current execution location. */
- mov r1, pc
- /* Compare. */
- cmp r1, r0
- /* Skip over EMIF-fast initialization if running from SDRAM. */
- bge skip_sdram
+ mov r0, #0x10000000 /* Load physical SDRAM base. */
+ mov r1, pc /* Get current execution location. */
+ cmp r1, r0 /* Compare. */
+ bge skip_sdram /* Skip over EMIF-fast initialization if running from SDRAM. */
+
+ /* identify the device revision, -- TMX or TMP(TMS) */
+ ldr r0, REG_DEVICE_ID
+ ldr r1, [r0]
+
+ ldr r0, VAL_DEVICE_ID_TMP
+ mov r1, r1, lsl #15
+ mov r1, r1, lsr #16
+ cmp r0, r1
+ bne skip_TMP_Patch
+
+ /* Enable TMP/TMS device new features */
+ mov r0, #1
+ ldr r1, REG_TC_EMIFF_DOUBLER
+ str r0, [r1]
+
+ /* Enable new ac parameters */
+ mov r0, #0x0b
+ ldr r1, REG_SDRAM_CONFIG2
+ str r0, [r1]
+
+ ldr r3, VAL_SDRAM_CONFIG_SDF1
+
+skip_TMP_Patch:
/*
* Delay for SDRAM initialization.
*/
- mov r3, #0x1800 /* value should be checked */
+ mov r0, #0x1800 /* value should be checked */
3:
- subs r3, r3, #0x1 /* Decrement count */
+ subs r0, r0, #0x1 /* Decrement count */
bne 3b
-
/*
* Set SDRAM control values. Disable refresh before MRS command.
*/
@@ -178,14 +204,15 @@ watch2Wait:
/* config register */
ldr r0, REG_SDRAM_CONFIG
- ldr r1, SDRAM_CONFIG_VAL
- str r1, [r0]
+ str r3, [r0]
/* manual command register */
ldr r0, REG_SDRAM_MANUAL_CMD
+
/* issue set cke high */
mov r1, #CMD_SDRAM_CKE_SET_HIGH
str r1, [r0]
+
/* issue nop */
mov r1, #CMD_SDRAM_NOP
str r1, [r0]
@@ -228,25 +255,23 @@ waitMDDR1:
str r1, [r0]
/* delay loop */
- mov r2, #0x0100
+ mov r0, #0x0100
waitMDDR2:
- subs r2, r2, #1
+ subs r0, r0, #1
bne waitMDDR2
/*
* Delay for SDRAM initialization.
*/
- mov r3, #0x1800
+ mov r0, #0x1800
4:
- subs r3, r3, #1 /* Decrement count. */
+ subs r0, r0, #1 /* Decrement count. */
bne 4b
b common_tc
skip_sdram:
-
ldr r0, REG_SDRAM_CONFIG
- ldr r1, SDRAM_CONFIG_VAL
- str r1, [r0]
+ str r3, [r0]
common_tc:
/* slow interface */
@@ -257,10 +282,15 @@ common_tc:
ldr r1, VAL_TC_EMIFS_CS1_CONFIG
ldr r0, REG_TC_EMIFS_CS1_CONFIG
str r1, [r0] /* Chip Select 1 */
+
ldr r1, VAL_TC_EMIFS_CS3_CONFIG
ldr r0, REG_TC_EMIFS_CS3_CONFIG
str r1, [r0] /* Chip Select 3 */
+ ldr r1, VAL_TC_EMIFS_DWS
+ ldr r0, REG_TC_EMIFS_DWS
+ str r1, [r0] /* Enable EMIFS.RDY for CS1 (ether) */
+
#ifdef CONFIG_H2_OMAP1610
/* inserting additional 2 clock cycle hold time for LAN */
ldr r0, REG_TC_EMIFS_CS1_ADVANCED
@@ -282,8 +312,9 @@ common_tc:
/* the literal pools origin */
.ltorg
-
-REG_TC_EMIFS_CONFIG: /* 32 bits */
+REG_DEVICE_ID: /* 32 bits */
+ .word 0xfffe2004
+REG_TC_EMIFS_CONFIG:
.word 0xfffecc0c
REG_TC_EMIFS_CS0_CONFIG: /* 32 bits */
.word 0xfffecc10
@@ -293,7 +324,8 @@ REG_TC_EMIFS_CS2_CONFIG: /* 32 bits */
.word 0xfffecc18
REG_TC_EMIFS_CS3_CONFIG: /* 32 bits */
.word 0xfffecc1c
-
+REG_TC_EMIFS_DWS: /* 32 bits */
+ .word 0xfffecc40
#ifdef CONFIG_H2_OMAP1610
REG_TC_EMIFS_CS1_ADVANCED: /* 32 bits */
.word 0xfffecc54
@@ -302,18 +334,17 @@ REG_TC_EMIFS_CS1_ADVANCED: /* 32 bits */
/* MPU clock/reset/power mode control registers */
REG_ARM_CKCTL: /* 16 bits */
.word 0xfffece00
-
REG_ARM_IDLECT3: /* 16 bits */
.word 0xfffece24
REG_ARM_IDLECT2: /* 16 bits */
.word 0xfffece08
REG_ARM_IDLECT1: /* 16 bits */
.word 0xfffece04
-
REG_ARM_RSTCT2: /* 16 bits */
.word 0xfffece14
REG_ARM_SYSST: /* 16 bits */
.word 0xfffece18
+
/* DPLL control registers */
REG_DPLL1_CTL: /* 16 bits */
.word 0xfffecf00
@@ -335,6 +366,10 @@ WSPRDOG_VAL2:
counter @8192 rows, 10 ns, 8 burst */
REG_SDRAM_CONFIG:
.word 0xfffecc20
+REG_SDRAM_CONFIG2:
+ .word 0xfffecc3c
+REG_TC_EMIFF_DOUBLER: /* 32 bits */
+ .word 0xfffecc60
/* Operation register */
REG_SDRAM_OPERATION:
@@ -356,35 +391,47 @@ REG_SDRAM_EMRS1:
REG_DLL_WRT_CONTROL:
.word 0xfffecc68
DLL_WRT_CONTROL_VAL:
- .word 0x03f00002
+ .word 0x03f00002 /* Phase of 72deg, write offset +31 */
/* URD DLL register */
REG_DLL_URD_CONTROL:
.word 0xfffeccc0
DLL_URD_CONTROL_VAL:
- .word 0x00800002
+ .word 0x00800002 /* Phase of 72deg, read offset +31 */
/* LRD DLL register */
REG_DLL_LRD_CONTROL:
.word 0xfffecccc
+DLL_LRD_CONTROL_VAL:
+ .word 0x00800002 /* read offset +31 */
REG_WATCHDOG:
.word 0xfffec808
+WATCHDOG_VAL1:
+ .word 0x000000f5
+WATCHDOG_VAL2:
+ .word 0x000000a0
REG_MPU_LOAD_TIMER:
- .word 0xfffec600
+ .word 0xfffec504
REG_MPU_CNTL_TIMER:
.word 0xfffec500
+VAL_MPU_LOAD_TIMER:
+ .word 0xffffffff
+VAL_MPU_CNTL_TIMER:
+ .word 0xffffffa1
/* 96 MHz Samsung Mobile DDR */
-SDRAM_CONFIG_VAL:
- .word 0x001200f4
+/* Original setting for TMX device */
+VAL_SDRAM_CONFIG_SDF0:
+ .word 0x0014e6fe
-DLL_LRD_CONTROL_VAL:
- .word 0x00800002
+/* NEW_SYS_FREQ mode (valid only TMP/TMS devices) */
+VAL_SDRAM_CONFIG_SDF1:
+ .word 0x0114e6fe
VAL_ARM_CKCTL:
- .word 0x3000
+ .word 0x2000 /* was: 0x3000, now use CLK_REF for timer input */
VAL_DPLL1_CTL:
.word 0x2830
@@ -392,11 +439,15 @@ VAL_DPLL1_CTL:
VAL_TC_EMIFS_CS0_CONFIG:
.word 0x002130b0
VAL_TC_EMIFS_CS1_CONFIG:
- .word 0x00001131
+ .word 0x00001133
VAL_TC_EMIFS_CS2_CONFIG:
.word 0x000055f0
VAL_TC_EMIFS_CS3_CONFIG:
- .word 0x88011131
+ .word 0x88013141
+VAL_TC_EMIFS_DWS: /* Enable EMIFS.RDY for CS1 access (ether) */
+ .word 0x000000c0
+VAL_DEVICE_ID_TMP: /* TMP/TMS=0xb65f, TMX=0xb58c */
+ .word 0xb65f
#endif
#ifdef CONFIG_H2_OMAP1610
@@ -407,36 +458,20 @@ VAL_TC_EMIFS_CS1_CONFIG:
VAL_TC_EMIFS_CS2_CONFIG:
.word 0xf800f22a
VAL_TC_EMIFS_CS3_CONFIG:
- .word 0x88011131
+ .word 0x88013141
VAL_TC_EMIFS_CS1_ADVANCED:
.word 0x00000022
#endif
-VAL_TC_EMIFF_SDRAM_CONFIG:
- .word 0x010290fc
-VAL_TC_EMIFF_MRS:
- .word 0x00000027
-
VAL_ARM_IDLECT1:
.word 0x00000400
-
VAL_ARM_IDLECT2:
.word 0x00000886
VAL_ARM_IDLECT3:
.word 0x00000015
-WATCHDOG_VAL1:
- .word 0x000000f5
-WATCHDOG_VAL2:
- .word 0x000000a0
-
-VAL_MPU_LOAD_TIMER:
- .word 0xffffffff
-VAL_MPU_CNTL_TIMER:
- .word 0xffffffa1
-
/* command values */
-.equ CMD_SDRAM_NOP, 0x00000000
-.equ CMD_SDRAM_PRECHARGE, 0x00000001
-.equ CMD_SDRAM_AUTOREFRESH, 0x00000002
-.equ CMD_SDRAM_CKE_SET_HIGH, 0x00000007
+.equ CMD_SDRAM_NOP, 0x00000000
+.equ CMD_SDRAM_PRECHARGE, 0x00000001
+.equ CMD_SDRAM_AUTOREFRESH, 0x00000002
+.equ CMD_SDRAM_CKE_SET_HIGH, 0x00000007
diff --git a/board/omap5912osk/omap5912osk.c b/board/omap5912osk/omap5912osk.c
index 1faa084f94..6993b136ee 100644
--- a/board/omap5912osk/omap5912osk.c
+++ b/board/omap5912osk/omap5912osk.c
@@ -38,6 +38,8 @@
#include <./configs/omap1510.h>
#endif
+DECLARE_GLOBAL_DATA_PTR;
+
void flash__init (void);
void ether__init (void);
void set_muxconf_regs (void);
@@ -58,8 +60,6 @@ static inline void delay (unsigned long loops)
int board_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->bd->bi_arch_number = MACH_TYPE_OMAP_OSK;
/* adress of boot parameters */
@@ -136,8 +136,6 @@ void ether__init (void)
******************************/
int dram_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
@@ -290,3 +288,21 @@ void peripheral_power_enable (void)
*SW_CLOCK_REQUEST |= UART1_48MHZ_ENABLE;
}
+
+/*
+ * Check Board Identity
+ */
+int checkboard(void)
+{
+ char *s = getenv("serial#");
+
+ puts("Board: OSK5912");
+
+ if (s != NULL) {
+ puts(", serial# ");
+ puts(s);
+ }
+ putc('\n');
+
+ return (0);
+}
diff --git a/board/omap730p2/lowlevel_init.S b/board/omap730p2/lowlevel_init.S
index 6c6f48240a..9ab71cf551 100644
--- a/board/omap730p2/lowlevel_init.S
+++ b/board/omap730p2/lowlevel_init.S
@@ -317,7 +317,7 @@ REG_WATCHDOG:
.word 0xfffec808
REG_MPU_LOAD_TIMER:
- .word 0xfffec600
+ .word 0xfffec504
REG_MPU_CNTL_TIMER:
.word 0xfffec500
diff --git a/board/omap730p2/omap730p2.c b/board/omap730p2/omap730p2.c
index 256c6a665d..309d667585 100644
--- a/board/omap730p2/omap730p2.c
+++ b/board/omap730p2/omap730p2.c
@@ -34,6 +34,8 @@
#include <./configs/omap730.h>
#endif
+DECLARE_GLOBAL_DATA_PTR;
+
int test_boot_mode(void);
void spin_up_leds(void);
void flash__init (void);
@@ -84,8 +86,6 @@ void toggle_backup_led(void)
int board_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
/* arch number of OMAP 730 P2 Board - Same as the Innovator! */
gd->bd->bi_arch_number = MACH_TYPE_OMAP_PERSEUS2;
@@ -180,8 +180,6 @@ void ether__init (void)
******************************/
int dram_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
diff --git a/board/omapv1030gsample/Makefile b/board/omapv1030gsample/Makefile
new file mode 100644
index 0000000000..5d5d8caef8
--- /dev/null
+++ b/board/omapv1030gsample/Makefile
@@ -0,0 +1,47 @@
+#
+# (C) Copyright 2000, 2001, 2002
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = lib$(BOARD).a
+
+OBJS := omapv1030gsample.o flash.o
+SOBJS := platform.o
+
+$(LIB): $(OBJS) $(SOBJS)
+ $(AR) crv $@ $^
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
+ $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+
+-include .depend
+
+#########################################################################
diff --git a/board/omapv1030gsample/config.mk b/board/omapv1030gsample/config.mk
new file mode 100644
index 0000000000..d9e3c7638c
--- /dev/null
+++ b/board/omapv1030gsample/config.mk
@@ -0,0 +1,26 @@
+#
+# (C) Copyright 2002
+# Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
+# David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
+#
+# (C) Copyright 2004
+# Texas Instruments, <www.ti.com>
+# Kshitij Gupta <Kshitij@ti.com>
+#
+# TI H3 board with OMAP1710 (ARM925EJS) cpu
+# see http://www.ti.com/ for more information on Texas Instruments
+#
+# Innovator has 1 bank of 256 MB SDRAM
+# Physical Address:
+# 1000'0000 to 2000'0000
+#
+#
+# Linux-Kernel is expected to be at 1000'8000, entry 1000'8000
+# (mem base + reserved)
+#
+# we load ourself to 1108'0000
+#
+#
+
+PLATFORM_LDFLAGS += -no-warn-mismatch
+TEXT_BASE = 0x11080000
diff --git a/board/omapv1030gsample/flash.c b/board/omapv1030gsample/flash.c
new file mode 100644
index 0000000000..7e97ee9064
--- /dev/null
+++ b/board/omapv1030gsample/flash.c
@@ -0,0 +1,492 @@
+/*
+ * (C) Copyright 2001
+ * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
+ *
+ * (C) Copyright 2001-2004
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * (C) Copyright 2003
+ * Texas Instruments, <www.ti.com>
+ * Kshitij Gupta <Kshitij@ti.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <linux/byteorder/swab.h>
+
+#define PHYS_FLASH_SECT_SIZE 0x00020000 /* 256 KB sectors (x2) */
+flash_info_t flash_info[CFG_MAX_MTD_BANKS]; /* info for FLASH chips */
+
+/* Board support for 1 or 2 flash devices */
+#undef FLASH_PORT_WIDTH32
+#define FLASH_PORT_WIDTH16
+
+#ifdef FLASH_PORT_WIDTH16
+#define FLASH_PORT_WIDTH ushort
+#define FLASH_PORT_WIDTHV vu_short
+#define SWAP(x) __swab16(x)
+#else
+#define FLASH_PORT_WIDTH ulong
+#define FLASH_PORT_WIDTHV vu_long
+#define SWAP(x) __swab32(x)
+#endif
+
+#define FPW FLASH_PORT_WIDTH
+#define FPWV FLASH_PORT_WIDTHV
+
+#define mb() __asm__ __volatile__ ("" : : : "memory")
+
+
+/* Flash Organization Structure */
+typedef struct OrgDef {
+ unsigned int sector_number;
+ unsigned int sector_size;
+} OrgDef;
+
+
+/* Flash Organizations */
+OrgDef OrgIntel_28F256L18T[] = {
+ {4, 32 * 1024}, /* 4 * 32kBytes sectors */
+ {255, 128 * 1024}, /* 255 * 128kBytes sectors */
+};
+
+
+/*-----------------------------------------------------------------------
+ * Functions
+ */
+unsigned long flash_init (void);
+static ulong flash_get_size (FPW * addr, flash_info_t * info);
+static int write_data (flash_info_t * info, ulong dest, FPW data);
+static void flash_get_offsets (ulong base, flash_info_t * info);
+void inline spin_wheel (void);
+void flash_print_info (flash_info_t * info);
+void flash_unprotect_sectors (FPWV * addr);
+int flash_erase (flash_info_t * info, int s_first, int s_last);
+int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt);
+void flash_unlock(flash_info_t * info);
+
+/*-----------------------------------------------------------------------
+ */
+
+unsigned long flash_init (void)
+{
+ int i;
+ ulong size = 0;
+ for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
+ switch (i) {
+ case 0:
+ flash_get_size ((FPW *) PHYS_FLASH_1, &flash_info[i]);
+ flash_get_offsets (PHYS_FLASH_1, &flash_info[i]);
+ /* to reset the lock bit */
+ flash_unlock(&flash_info[i]);
+ break;
+ default:
+ panic ("configured too many flash banks!\n");
+ break;
+ }
+ size += flash_info[i].size;
+ }
+
+ /* Protect monitor and environment sectors
+ */
+ flash_protect (FLAG_PROTECT_SET,
+ CFG_FLASH_BASE,
+ CFG_FLASH_BASE + monitor_flash_len - 1, &flash_info[0]);
+
+ flash_protect (FLAG_PROTECT_SET,
+ CFG_ENV_ADDR,
+ CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0]);
+
+ return size;
+}
+
+/*-----------------------------------------------------------------------
+ */
+void flash_unlock(flash_info_t * info)
+{
+ int j;
+ for (j=2;j<CFG_MAX_FLASH_SECT;j++){
+ FPWV *addr = (FPWV *) (info->start[j]);
+ flash_unprotect_sectors (addr);
+ *addr = (FPW) 0x00500050;/* clear status register */
+ *addr = (FPW) 0x00FF00FF;/* resest to read mode */
+ }
+}
+
+/*-----------------------------------------------------------------------
+ */
+static void flash_get_offsets (ulong base, flash_info_t * info)
+{
+ int i;
+ OrgDef *pOrgDef;
+
+ pOrgDef = OrgIntel_28F256L18T;
+ if (info->flash_id == FLASH_UNKNOWN) {
+ return;
+ }
+
+ if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
+ for (i = 0; i < info->sector_count; i++) {
+ if (i > 255) {
+ info->start[i] = base + (i * 0x8000);
+ info->protect[i] = 0;
+ } else {
+ info->start[i] = base +
+ (i * PHYS_FLASH_SECT_SIZE);
+ info->protect[i] = 0;
+ }
+ }
+ }
+}
+
+/*-----------------------------------------------------------------------
+ */
+void flash_print_info (flash_info_t * info)
+{
+ int i;
+
+ if (info->flash_id == FLASH_UNKNOWN) {
+ printf ("missing or unknown FLASH type\n");
+ return;
+ }
+
+ switch (info->flash_id & FLASH_VENDMASK) {
+ case FLASH_MAN_INTEL:
+ printf ("INTEL ");
+ break;
+ default:
+ printf ("Unknown Vendor ");
+ break;
+ }
+
+ switch (info->flash_id & FLASH_TYPEMASK) {
+ case FLASH_28F256L18T:
+ printf ("FLASH 28F256L18T\n");
+ break;
+ default:
+ printf ("Unknown Chip Type\n");
+ break;
+ }
+
+ printf (" Size: %ld MB in %d Sectors\n",
+ info->size >> 20, info->sector_count);
+
+ printf (" Sector Start Addresses:");
+ for (i = 0; i < info->sector_count; ++i) {
+ if ((i % 5) == 0)
+ printf ("\n ");
+ printf (" %08lX%s",
+ info->start[i], info->protect[i] ? " (RO)" : " ");
+ }
+ printf ("\n");
+ return;
+}
+
+/*
+ * The following code cannot be run from FLASH!
+ */
+static ulong flash_get_size (FPW * addr, flash_info_t * info)
+{
+ volatile FPW value;
+
+ /* Write auto select command: read Manufacturer ID */
+ addr[0x5555] = (FPW) 0x00AA00AA;
+ addr[0x2AAA] = (FPW) 0x00550055;
+ addr[0x5555] = (FPW) 0x00900090;
+
+ mb ();
+ value = addr[0];
+ switch (value) {
+
+ case (FPW) INTEL_MANUFACT:
+ info->flash_id = FLASH_MAN_INTEL;
+ break;
+
+ default:
+ info->flash_id = FLASH_UNKNOWN;
+ info->sector_count = 0;
+ info->size = 0;
+ addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
+ return (0); /* no or unknown flash */
+ }
+
+ mb ();
+ value = addr[1]; /* device ID */
+ switch (value) {
+
+ case (FPW) (INTEL_ID_28F256L18T):
+ case (FPW) (0x880A880A):
+ info->flash_id += FLASH_28F256L18T;
+ info->sector_count = 259;
+ info->size = 0x02000000;
+ break; /* => 32 MB */
+
+ default:
+ info->flash_id = FLASH_UNKNOWN;
+ break;
+ }
+
+ if (info->sector_count > CFG_MAX_FLASH_SECT) {
+ printf ("** ERROR: sector count %d > max (%d) **\n",
+ info->sector_count, CFG_MAX_FLASH_SECT);
+ info->sector_count = CFG_MAX_FLASH_SECT;
+ }
+
+ addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
+
+ return (info->size);
+}
+
+
+/* unprotects a sector for write and erase
+ * on some intel parts, this unprotects the entire chip, but it
+ * wont hurt to call this additional times per sector...
+ */
+void flash_unprotect_sectors (FPWV * addr)
+{
+#define PD_FINTEL_WSMS_READY_MASK 0x0080
+
+ *addr = (FPW) 0x00500050; /* clear status register */
+
+ /* this sends the clear lock bit command */
+ *addr = (FPW) 0x00600060;
+ *addr = (FPW) 0x00D000D0;
+}
+
+
+/*-----------------------------------------------------------------------
+ */
+
+int flash_erase (flash_info_t * info, int s_first, int s_last)
+{
+ int flag, prot, sect;
+ ulong type, start, last;
+ int rcode = 0;
+
+ if ((s_first < 0) || (s_first > s_last)) {
+ if (info->flash_id == FLASH_UNKNOWN) {
+ printf ("- missing\n");
+ } else {
+ printf ("- no sectors to erase\n");
+ }
+ return 1;
+ }
+
+ type = (info->flash_id & FLASH_VENDMASK);
+ if ((type != FLASH_MAN_INTEL)) {
+ printf ("Can't erase unknown flash type %08lx - aborted\n",
+ info->flash_id);
+ return 1;
+ }
+
+ prot = 0;
+ for (sect = s_first; sect <= s_last; ++sect) {
+ if (info->protect[sect]) {
+ prot++;
+ }
+ }
+
+ if (prot) {
+ printf ("- Warning: %d protected sectors will not be erased!\n",
+ prot);
+ } else {
+ printf ("\n");
+ }
+
+
+ start = get_timer (0);
+ last = start;
+
+ /* Disable interrupts which might cause a timeout here */
+ flag = disable_interrupts ();
+
+ /* Start erase on unprotected sectors */
+ for (sect = s_first; sect <= s_last; sect++) {
+ if (info->protect[sect] == 0) { /* not protected */
+ FPWV *addr = (FPWV *) (info->start[sect]);
+ FPW status;
+
+ printf ("Erasing sector %2d ... ", sect);
+
+ flash_unprotect_sectors (addr);
+
+ /* arm simple, non interrupt dependent timer */
+ reset_timer_masked ();
+
+ *addr = (FPW) 0x00500050;/* clear status register */
+ *addr = (FPW) 0x00200020;/* erase setup */
+ *addr = (FPW) 0x00D000D0;/* erase confirm */
+
+ while (((status =
+ *addr) & (FPW) 0x00800080) !=
+ (FPW) 0x00800080) {
+ if (get_timer_masked () >
+ CFG_FLASH_ERASE_TOUT) {
+ printf ("Timeout\n");
+ /* suspend erase */
+ *addr = (FPW) 0x00B000B0;
+ /* reset to read mode */
+ *addr = (FPW) 0x00FF00FF;
+ rcode = 1;
+ break;
+ }
+ }
+
+ /* clear status register cmd. */
+ *addr = (FPW) 0x00500050;
+ *addr = (FPW) 0x00FF00FF;/* resest to read mode */
+ printf (" done\n");
+ }
+ }
+ return rcode;
+}
+
+/*-----------------------------------------------------------------------
+ * Copy memory to flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ * 4 - Flash not identified
+ */
+
+int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
+{
+ ulong cp, wp;
+ FPW data;
+ int count, i, l, rc, port_width;
+
+ if (info->flash_id == FLASH_UNKNOWN) {
+ return 4;
+ }
+/* get lower word aligned address */
+#ifdef FLASH_PORT_WIDTH16
+ wp = (addr & ~1);
+ port_width = 2;
+#else
+ wp = (addr & ~3);
+ port_width = 4;
+#endif
+
+ /*
+ * handle unaligned start bytes
+ */
+ if ((l = addr - wp) != 0) {
+ data = 0;
+ for (i = 0, cp = wp; i < l; ++i, ++cp) {
+ data = (data << 8) | (*(uchar *) cp);
+ }
+ for (; i < port_width && cnt > 0; ++i) {
+ data = (data << 8) | *src++;
+ --cnt;
+ ++cp;
+ }
+ for (; cnt == 0 && i < port_width; ++i, ++cp) {
+ data = (data << 8) | (*(uchar *) cp);
+ }
+
+ if ((rc = write_data (info, wp, SWAP (data))) != 0) {
+ return (rc);
+ }
+ wp += port_width;
+ }
+
+ /*
+ * handle word aligned part
+ */
+ count = 0;
+ while (cnt >= port_width) {
+ data = 0;
+ for (i = 0; i < port_width; ++i) {
+ data = (data << 8) | *src++;
+ }
+ if ((rc = write_data (info, wp, SWAP (data))) != 0) {
+ return (rc);
+ }
+ wp += port_width;
+ cnt -= port_width;
+ if (count++ > 0x800) {
+ spin_wheel ();
+ count = 0;
+ }
+ }
+
+ if (cnt == 0) {
+ return (0);
+ }
+
+ /*
+ * handle unaligned tail bytes
+ */
+ data = 0;
+ for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) {
+ data = (data << 8) | *src++;
+ --cnt;
+ }
+ for (; i < port_width; ++i, ++cp) {
+ data = (data << 8) | (*(uchar *) cp);
+ }
+
+ return (write_data (info, wp, SWAP (data)));
+}
+
+/*-----------------------------------------------------------------------
+ * Write a word or halfword to Flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ */
+static int write_data (flash_info_t * info, ulong dest, FPW data)
+{
+ FPWV *addr = (FPWV *) dest;
+ ulong status;
+ int flag;
+
+ /* Check if Flash is (sufficiently) erased */
+ if ((*addr & data) != data) {
+ printf ("not erased at %08lx (%x)\n", (ulong) addr, *addr);
+ return (2);
+ }
+ /* Disable interrupts which might cause a timeout here */
+ flag = disable_interrupts ();
+ *addr = (FPW) 0x00400040; /* write setup */
+ *addr = data;
+
+ /* arm simple, non interrupt dependent timer */
+ reset_timer_masked ();
+
+ /* wait while polling the status register */
+ while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
+ if (get_timer_masked () > CFG_FLASH_WRITE_TOUT) {
+ *addr = (FPW) 0x00FF00FF; /* restore read mode */
+ return (1);
+ }
+ }
+ *addr = (FPW) 0x00FF00FF; /* restore read mode */
+ return (0);
+}
+
+void inline spin_wheel (void)
+{
+ static int p = 0;
+ static char w[] = "\\/-";
+
+ printf ("\010%c", w[p]);
+ (++p == 3) ? (p = 0) : 0;
+}
diff --git a/board/omapv1030gsample/omapv1030gsample.c b/board/omapv1030gsample/omapv1030gsample.c
new file mode 100644
index 0000000000..d96f4d3eb6
--- /dev/null
+++ b/board/omapv1030gsample/omapv1030gsample.c
@@ -0,0 +1,223 @@
+/*
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Marius Groeger <mgroeger@sysgo.de>
+ *
+ * (C) Copyright 2002
+ * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
+ *
+ * (C) Copyright 2003
+ * Texas Instruments, <www.ti.com>
+ * Kshitij Gupta <Kshitij@ti.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#if defined(CONFIG_OMAPV1030)
+#include <./configs/omap1510.h>
+#endif
+#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+#include <linux/mtd/nand.h>
+extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
+#endif
+
+
+void flash__init (void);
+void ether__init (void);
+void set_muxconf_regs (void);
+void peripheral_power_enable (void);
+
+#define COMP_MODE_ENABLE ((unsigned int)0x0000EAEF)
+
+static inline void delay (unsigned long loops)
+{
+ __asm__ volatile ("1:\n"
+ "subs %0, %1, #1\n"
+ "bne 1b":"=r" (loops):"0" (loops));
+}
+
+/*
+ * Miscellaneous platform dependent initialisations
+ */
+
+int board_init (void)
+{
+ DECLARE_GLOBAL_DATA_PTR;
+
+ /* arch number of OMAPV10300 G-Sample */
+ gd->bd->bi_arch_number = 998; /* a temp one */
+
+ /* adress of boot parameters */
+ gd->bd->bi_boot_params = 0x10000100;
+
+ /* Configure MUX settings */
+ set_muxconf_regs ();
+ peripheral_power_enable ();
+
+/* this speeds up your boot a quite a bit. However to make it
+ * work, you need make sure your kernel startup flush bug is fixed.
+ * ... rkw ...
+ */
+ icache_enable ();
+
+ flash__init ();
+ ether__init ();
+ return 0;
+}
+
+
+int misc_init_r (void)
+{
+ /* currently empty */
+ return (0);
+}
+
+/******************************
+ Routine:
+ Description:
+******************************/
+void flash__init (void)
+{
+#define EMIFS_GlB_Config_REG 0xfffecc0c
+ unsigned int regval;
+ regval = *((volatile unsigned int *) EMIFS_GlB_Config_REG);
+ /* Turn off write protection for flash devices. */
+ regval = regval | 0x0001;
+ *((volatile unsigned int *) EMIFS_GlB_Config_REG) = regval;
+}
+/*************************************************************
+ Routine:ether__init
+ Description: take the Ethernet controller out of reset and wait
+ for the EEPROM load to complete.
+*************************************************************/
+void ether__init (void)
+{
+ #define LAN_RESET_REGISTER 0x0840001c
+ #define ETH_CONTROL_REG 0x0840030b
+
+ int timeout;
+
+ timeout = 1000;
+ *((volatile unsigned short *) LAN_RESET_REGISTER) = 0x0000;
+ do {
+ *((volatile unsigned short *) LAN_RESET_REGISTER) = 0x0001;
+ udelay (3);
+ } while (*((volatile unsigned short *) LAN_RESET_REGISTER) != 0x0001 && --timeout);
+ if (!timeout)
+ printf("timed out when resettimg LAN.\n");
+
+ timeout = 1000;
+ do {
+ *((volatile unsigned short *) LAN_RESET_REGISTER) = 0x0000;
+ udelay (3);
+ } while (*((volatile unsigned short *) LAN_RESET_REGISTER) != 0x0000 && --timeout);
+ if (!timeout)
+ printf("timed out when resettimg LAN.\n");
+
+ *((volatile unsigned char *) ETH_CONTROL_REG) &= ~0x01;
+ udelay (3);
+}
+
+/******************************
+ Routine:
+ Description:
+******************************/
+int dram_init (void)
+{
+ DECLARE_GLOBAL_DATA_PTR;
+
+ gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+ gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+
+ return 0;
+}
+
+/******************************************************
+ Routine: set_muxconf_regs
+ Description: Setting up the configuration Mux registers
+ specific to the hardware
+*******************************************************/
+/* OMAPV1030 has a different way to config mux */
+void set_muxconf_regs (void)
+{
+ volatile unsigned int *MuxConfReg;
+ /* set each registers to its reset value; */
+
+ /* SPARE Register setting at Configuration level */
+ MuxConfReg =
+ (volatile unsigned int *) ((unsigned int) 0xFFFE102C);
+ *MuxConfReg = 1;
+
+ /* Select emifs_nfcs_1 instead of gpio19 */
+ MuxConfReg =
+ (volatile unsigned int *) ((unsigned int) 0xFFFE11E8);
+ *MuxConfReg = 1;
+
+ /* Select emifs_nfcs_2 */
+ MuxConfReg =
+ (volatile unsigned int *) ((unsigned int) 0xFFFE14B8);
+ *MuxConfReg = 2;
+
+ /* Select wire_1 for TEST_NEMU1 */
+ //MuxConfReg =
+ // (volatile unsigned int *) ((unsigned int) 0xFFFE12D8);
+ //*MuxConfReg = 5;
+
+ /* TBD: add more pin mux here */
+
+
+ MuxConfReg =
+ (volatile unsigned int *) ((unsigned int)COMP_MODE_CTRL_0);
+ *MuxConfReg = COMP_MODE_ENABLE;
+}
+
+/******************************************************
+ Routine: peripheral_power_enable
+ Description: Enable the power for UART1
+*******************************************************/
+void peripheral_power_enable (void)
+{
+/* OMAPV1030 has a different ULPDR */
+#define UART2_48MHZ_ENABLE ((unsigned short)0x0040)
+#define SW_CLOCK_REQUEST ((volatile unsigned short *)0xFFFB101A)
+
+ *SW_CLOCK_REQUEST |= UART2_48MHZ_ENABLE;
+}
+
+#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+
+void nand_init(void)
+{
+ extern flash_info_t flash_info[];
+
+ nand_probe(CFG_NAND_ADDR);
+ if (nand_dev_desc[0].ChipID != NAND_ChipID_UNKNOWN) {
+ print_size(nand_dev_desc[0].totlen, "\n");
+ }
+
+#ifdef CFG_JFFS2_MEM_NAND
+ flash_info[CFG_JFFS2_FIRST_BANK].flash_id = nand_dev_desc[0].id;
+ flash_info[CFG_JFFS2_FIRST_BANK].size = 1024*1024*2; /* only read kernel single meg partition */
+ flash_info[CFG_JFFS2_FIRST_BANK].sector_count = 1024; /* 1024 blocks in 16meg chip (use less for raw/copied partition) */
+ flash_info[CFG_JFFS2_FIRST_BANK].start[0] = 0x10200000; /* ?, ram for now, open question, copy to RAM or adapt for NAND */
+#endif
+}
+#endif
+
diff --git a/board/omapv1030gsample/platform.S b/board/omapv1030gsample/platform.S
new file mode 100644
index 0000000000..e08e6f81c5
--- /dev/null
+++ b/board/omapv1030gsample/platform.S
@@ -0,0 +1,508 @@
+/*
+ * G-Sample Board specific setup info
+ *
+ * (C) Copyright 2004-2005
+ * Texas Instruments, <www.ti.com>
+ * Kshitij Gupta <Kshitij@ti.com>
+ * Jian Zhang <jzhang@ti.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <config.h>
+#include <version.h>
+
+#if defined(CONFIG_OMAPV1030)
+#include <./configs/omap1510.h>
+#endif
+
+
+_TEXT_BASE:
+ .word TEXT_BASE /* sdram load addr from config.mk */
+
+.globl platformsetup
+platformsetup:
+
+ /*------------------------------------------------------*
+ * Set up ARM CLM registers (IDLECT1) *
+ *------------------------------------------------------*/
+ ldr r0, REG_ARM_IDLECT1
+ ldr r1, VAL_ARM_IDLECT1
+ str r1, [r0]
+
+ /*------------------------------------------------------*
+ * Set up ARM CLM registers (IDLECT2) *
+ *------------------------------------------------------*/
+ ldr r0, REG_ARM_IDLECT2
+ ldr r1, VAL_ARM_IDLECT2
+ str r1, [r0]
+
+ /*------------------------------------------------------*
+ * Set up ARM CLM registers (IDLECT3) *
+ *------------------------------------------------------*/
+ ldr r0, REG_ARM_IDLECT3
+ ldr r1, VAL_ARM_IDLECT3
+ str r1, [r0]
+
+ mov r1, #0x05 /* PER_EN bit */
+ ldr r0, REG_ARM_RSTCT2
+ strh r1, [r0] /* CLKM; Peripheral reset. */
+
+ /* check lock bit is not good enough:
+ when boot from NOR flash and control goes here
+ lock bit is set, ADPLL1 reg1 is zero. This is x2
+ mode which is not what we want. We want x16.
+ */
+#if 0
+ /* check if ADPLL LOCK bit (BIT 4) set or not */
+ ldr r0, REG_ADPLL1_3
+ ldrh r1, [r0]
+ ands r1, r1, #0x10 /* Check the LOCK bit.*/
+ bne skip_adpll /* skip if already locked*/
+#else
+ /* Load physical SDRAM base. */
+ mov r0, #0x10000000
+ /* Get current execution location. */
+ mov r1, pc
+ /* Compare. */
+ cmp r1, r0
+ /* Skip over ADPLL initialization if running from SDRAM. */
+ bge skip_adpll
+#endif
+ /* Set CLKM to bypass mode so DPLL multiplier/divider can be changed */
+ /* Otherwise DPLL won't lock */
+ /* I supposedly need to enable the dsp clock before switching */
+ ldr r1, VAL1_ARM_SYSST
+ ldr r0, REG_ARM_SYSST
+ strh r1, [r0]
+ mov r0, #0x400
+1:
+ subs r0, r0, #0x1 /* wait for any bubbles to finish */
+ bne 1b
+ ldr r1, VAL1_ARM_CKCTL /* for now, let arm/dsp/tc be dpll/2 */
+ ldr r0, REG_ARM_CKCTL
+ strh r1, [r0]
+ /* a few nops to let settle */
+ nop
+ nop
+ nop
+ nop
+ nop
+ nop
+ nop
+ nop
+ nop
+ nop
+
+ /* setup ADPLL1 */
+ /* Ramp up the clock to 13*16Mhz */
+ ldr r0, REG_ADPLL1_1 /* X16 */
+ mov r1, #0x140
+ strh r1, [r0]
+
+ /* clear and set enable bit (BIT 14) */
+ ldr r0, REG_ADPLL1_3
+ mov r1, #0
+ strh r1, [r0]
+ mov r1, #0x4000
+ strh r1, [r0]
+ /* set, clear, and set INITZ bit (BIT 7) */
+ orr r1, r1, #0x80
+ strh r1, [r0]
+ mov r1, #0x4000
+ strh r1, [r0]
+ orr r1, r1, #0x80
+ strh r1, [r0]
+ /* get all bits right */
+ ldr r1, VAL_ADPLL1_3
+ strh r1, [r0]
+ /* wait until LOCK bit (BIT 4) set */
+2:
+ ldrh r1, [r0]
+ ands r1, r1, #0x10 /* Check the LOCK bit.*/
+ beq 2b /* loop until bit goes hi. */
+lock_end:
+
+ /* Now set CLKM to Sync-Scalable */
+ /* I supposedly need to enable the dsp clock before switching */
+ ldr r1, VAL2_ARM_SYSST
+ ldr r0, REG_ARM_SYSST
+ strh r1, [r0]
+ mov r0, #0x400
+3:
+ subs r0, r0, #0x1 /* wait for any bubbles to finish */
+ bne 3b
+ ldr r1, VAL2_ARM_CKCTL /* for now, let arm/dsp/tc be dpll/2 */
+ ldr r0, REG_ARM_CKCTL
+ strh r1, [r0]
+ /* a few nops to let settle */
+ nop
+ nop
+ nop
+ nop
+ nop
+ nop
+ nop
+ nop
+ nop
+ nop
+
+skip_adpll:
+ /*------------------------------------------------------*
+ * Turn off the watchdog during init... *
+ *------------------------------------------------------*/
+ ldr r0, REG_WATCHDOG
+ ldr r1, WATCHDOG_VAL1
+ str r1, [r0]
+ ldr r1, WATCHDOG_VAL2
+ str r1, [r0]
+ ldr r0, REG_WSPRDOG
+ ldr r1, WSPRDOG_VAL1
+ str r1, [r0]
+ ldr r0, REG_WWPSDOG
+
+watch1Wait:
+ ldr r1, [r0]
+ tst r1, #0x10
+ bne watch1Wait
+
+ ldr r0, REG_WSPRDOG
+ ldr r1, WSPRDOG_VAL2
+ str r1, [r0]
+ ldr r0, REG_WWPSDOG
+watch2Wait:
+ ldr r1, [r0]
+ tst r1, #0x10
+ bne watch2Wait
+
+
+ /* Set memory timings corresponding to the new clock speed */
+
+ /* Check execution location to determine current execution location
+ * and branch to appropriate initialization code.
+ */
+ /* Load physical SDRAM base. */
+ mov r0, #0x10000000
+ /* Get current execution location. */
+ mov r1, pc
+ /* Compare. */
+ cmp r1, r0
+ /* Skip over EMIF-fast initialization if running from SDRAM. */
+ bge skip_sdram
+
+ /* Enable EMIFF TC Doubler in OMAP1710 */
+ ldr r0, REG_EMIFF_DOUBLER
+ mov r1, #0x1
+ str r1, [r0]
+
+ /*
+ * Delay for SDRAM initialization.
+ */
+ mov r3, #0x1800 /* value should be checked */
+4:
+ subs r3, r3, #0x1 /* Decrement count */
+ bne 4b
+
+
+ /*
+ * Set SDRAM control values. Disable refresh before MRS command.
+ */
+
+ /* mobile ddr operation */
+ ldr r0, REG_SDRAM_OPERATION //cc80
+ mov r2, #07
+ str r2, [r0]
+
+ /* config register */
+ ldr r0, REG_SDRAM_CONFIG //cc20
+ ldr r1, SDRAM_CONFIG_VAL
+ str r1, [r0]
+
+ /* manual command register */
+ ldr r0, REG_SDRAM_MANUAL_CMD //cc84
+ /* issue set cke high */
+ mov r1, #CMD_SDRAM_CKE_SET_HIGH //#7
+ str r1, [r0]
+ /* issue nop */
+ mov r1, #CMD_SDRAM_NOP //#0
+ str r1, [r0]
+
+ mov r2, #0x0100
+waitMDDR1:
+ subs r2, r2, #1
+ bne waitMDDR1 /* delay loop */
+
+ /* issue precharge */
+ mov r1, #CMD_SDRAM_PRECHARGE
+ str r1, [r0]
+
+ /* issue autorefresh x 2 */
+ mov r1, #CMD_SDRAM_AUTOREFRESH
+ str r1, [r0]
+ str r1, [r0]
+
+ /* mrs register ddr mobile */
+ ldr r0, REG_SDRAM_MRS
+ mov r1, #0x33
+ str r1, [r0]
+
+ /* emrs1 low-power register */
+ ldr r0, REG_SDRAM_EMRS1
+ /* self refresh on all banks */
+ mov r1, #0
+ str r1, [r0]
+
+ ldr r0, REG_DLL_URD_CONTROL
+ ldr r1, DLL_URD_CONTROL_VAL
+ str r1, [r0]
+
+ ldr r0, REG_DLL_LRD_CONTROL
+ ldr r1, DLL_LRD_CONTROL_VAL
+ str r1, [r0]
+
+ ldr r0, REG_DLL_WRT_CONTROL
+ ldr r1, DLL_WRT_CONTROL_VAL
+ str r1, [r0]
+
+ /* delay loop */
+ mov r2, #0x0100
+waitMDDR2:
+ subs r2, r2, #1
+ bne waitMDDR2
+
+ /*
+ * Delay for SDRAM initialization.
+ */
+ mov r3, #0x1800
+5:
+ subs r3, r3, #1 /* Decrement count. */
+ bne 5b
+ b common_tc
+
+skip_sdram:
+
+ ldr r0, REG_SDRAM_CONFIG
+ ldr r1, SDRAM_CONFIG_VAL
+ str r1, [r0]
+
+common_tc:
+ /* slow interface */
+ ldr r1, VAL_TC_EMIFS_CONFIG
+ ldr r0, REG_TC_EMIFS_CONFIG
+ str r1, [r0]
+
+ ldr r1, VAL_TC_EMIFS_CS0_CONFIG
+ ldr r0, REG_TC_EMIFS_CS0_CONFIG
+ str r1, [r0] /* Chip Select 0 */
+
+ ldr r1, VAL_TC_EMIFS_CS1_CONFIG
+ ldr r0, REG_TC_EMIFS_CS1_CONFIG
+ str r1, [r0] /* Chip Select 1 */
+
+ ldr r1, VAL_TC_EMIFS_CS2_CONFIG
+ ldr r0, REG_TC_EMIFS_CS2_CONFIG
+ str r1, [r0] /* Chip Select 2 */
+
+ ldr r1, VAL_TC_EMIFS_CS3_CONFIG
+ ldr r0, REG_TC_EMIFS_CS3_CONFIG
+ str r1, [r0] /* Chip Select 3 */
+
+ /* inserting additional 2 clock cycle hold time for testing LAN */
+ ldr r0, REG_TC_EMIFS_CS2_ADVANCED
+ ldr r1, VAL_TC_EMIFS_CS2_ADVANCED
+ str r1, [r0]
+
+ /* Start MPU Timer 1 */
+ ldr r0, REG_MPU_LOAD_TIMER
+ ldr r1, VAL_MPU_LOAD_TIMER
+ str r1, [r0]
+
+ ldr r0, REG_MPU_CNTL_TIMER
+ ldr r1, VAL_MPU_CNTL_TIMER
+ str r1, [r0]
+
+ /* back to arch calling code */
+ mov pc, lr
+
+ /* the literal pools origin */
+ .ltorg
+
+
+REG_TC_EMIFS_CONFIG: /* 32 bits */
+ .word 0xfffecc0c
+REG_TC_EMIFS_CS0_CONFIG: /* 32 bits */
+ .word 0xfffecc10
+REG_TC_EMIFS_CS1_CONFIG: /* 32 bits */
+ .word 0xfffecc14
+REG_TC_EMIFS_CS2_CONFIG: /* 32 bits */
+ .word 0xfffecc18
+REG_TC_EMIFS_CS3_CONFIG: /* 32 bits */
+ .word 0xfffecc1c
+REG_TC_EMIFS_CS2_ADVANCED: /* 32 bits */
+ .word 0xfffecc58
+
+/* MPU clock/reset/power mode control registers */
+REG_ARM_CKCTL: /* 16 bits */
+ .word 0xfffece00
+
+REG_ARM_IDLECT3: /* 16 bits */
+ .word 0xfffece24
+REG_ARM_IDLECT2: /* 16 bits */
+ .word 0xfffece08
+REG_ARM_IDLECT1: /* 16 bits */
+ .word 0xfffece04
+
+REG_ARM_RSTCT2: /* 16 bits */
+ .word 0xfffece14
+REG_ARM_SYSST: /* 16 bits */
+ .word 0xfffece18
+/* ADPLL registers */
+REG_ADPLL1_1: /* 16 bits */
+ .word 0xfffecf02
+REG_ADPLL1_3: /* 16 bits */
+ .word 0xfffecf06
+VAL_ADPLL1_3:
+ .word 0x0000dc98
+
+/* Watch Dog register */
+/* secure watchdog stop */
+REG_WSPRDOG:
+ .word 0xfffeb048
+/* watchdog write pending */
+REG_WWPSDOG:
+ .word 0xfffeb034
+
+WSPRDOG_VAL1:
+ .word 0x0000aaaa
+WSPRDOG_VAL2:
+ .word 0x00005555
+
+/* SDRAM config is: auto refresh enabled, 16 bit 4 bank,
+ counter @8192 rows, 10 ns, 8 burst */
+REG_SDRAM_CONFIG:
+ .word 0xfffecc20
+
+/* Operation register */
+REG_SDRAM_OPERATION:
+ .word 0xfffecc80
+
+REG_EMIFF_DOUBLER:
+ .word 0xfffecc60
+
+/* Manual command register */
+REG_SDRAM_MANUAL_CMD:
+ .word 0xfffecc84
+
+/* SDRAM MRS (New) config is: CAS latency is 2, burst length 8 */
+REG_SDRAM_MRS:
+ .word 0xfffecc70
+
+/* SDRAM MRS (New) config is: CAS latency is 2, burst length 8 */
+REG_SDRAM_EMRS1:
+ .word 0xfffecc78
+
+/* WRT DLL register */
+REG_DLL_WRT_CONTROL:
+ .word 0xfffecc64
+DLL_WRT_CONTROL_VAL:
+ .word 0x00000006
+
+/* URD DLL register */
+REG_DLL_URD_CONTROL:
+ .word 0xfffeccc0
+DLL_URD_CONTROL_VAL:
+ .word 0x00000006
+
+/* LRD DLL register */
+REG_DLL_LRD_CONTROL:
+ .word 0xfffecccc
+
+REG_WATCHDOG:
+ .word 0xfffec808
+
+REG_MPU_LOAD_TIMER:
+ .word 0xfffec600
+REG_MPU_CNTL_TIMER:
+ .word 0xfffec500
+
+/* 96 MHz Samsung Mobile DDR */
+SDRAM_CONFIG_VAL:
+ .word 0x0003f7f6
+
+DLL_LRD_CONTROL_VAL:
+ .word 0x00000006
+
+VAL1_ARM_CKCTL:
+ .word 0x1555
+VAL2_ARM_CKCTL:
+ .word 0x350e
+VAL1_ARM_SYSST:
+ .word 0x2800
+VAL2_ARM_SYSST:
+ .word 0x1001
+
+VAL_DPLL1_CTL:
+ .word 0x2810
+
+VAL_TC_EMIFS_CONFIG:
+ .word 0x00000010
+
+VAL_TC_EMIFS_CS0_CONFIG:
+ .word 0x0017000c
+VAL_TC_EMIFS_CS1_CONFIG:
+ .word 0x0010fffb
+/* EMIFS CS2 Configuration Register: A/D Multiplexed, 8 RWS, 8 WWS,
+ WELEN = 4, 1 BT WST, Asynchronous Read mode & Ref_Clk = TC_Clock */
+VAL_TC_EMIFS_CS2_CONFIG:
+ .word 0x0040488b
+VAL_TC_EMIFS_CS3_CONFIG:
+ .word 0xffc0fff3
+/* EMIFS CS2 Advanced Configuration Register: ADV hold = 2 Ref_Clk cycles,
+ OE SETUP = 3 */
+VAL_TC_EMIFS_CS2_ADVANCED:
+ .word 0x00000103
+
+VAL_TC_EMIFF_SDRAM_CONFIG:
+ .word 0x010290fc
+VAL_TC_EMIFF_MRS:
+ .word 0x00000027
+
+VAL_ARM_IDLECT1:
+ .word 0x000014c6
+
+VAL_ARM_IDLECT2:
+ .word 0x000009ff
+VAL_ARM_IDLECT3:
+ .word 0x0000003f
+
+WATCHDOG_VAL1:
+ .word 0x000000f5
+WATCHDOG_VAL2:
+ .word 0x000000a0
+
+VAL_MPU_LOAD_TIMER:
+ .word 0xffffffff
+VAL_MPU_CNTL_TIMER:
+ .word 0xffffffa1
+
+/* command values */
+.equ CMD_SDRAM_NOP, 0x00000000
+.equ CMD_SDRAM_PRECHARGE, 0x00000001
+.equ CMD_SDRAM_AUTOREFRESH, 0x00000002
+.equ CMD_SDRAM_CKE_SET_HIGH, 0x00000007
diff --git a/board/omapv1030gsample/u-boot.lds b/board/omapv1030gsample/u-boot.lds
new file mode 100644
index 0000000000..eee4813f38
--- /dev/null
+++ b/board/omapv1030gsample/u-boot.lds
@@ -0,0 +1,51 @@
+/*
+ * (C) Copyright 2002
+ * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+ENTRY(_start)
+SECTIONS
+{
+ . = 0x00000000;
+ . = ALIGN(4);
+ .text :
+ {
+ cpu/arm926ejs/start.o (.text)
+ *(.text)
+ }
+ . = ALIGN(4);
+ .rodata : { *(.rodata) }
+ . = ALIGN(4);
+ .data : { *(.data) }
+ . = ALIGN(4);
+ .got : { *(.got) }
+
+ __u_boot_cmd_start = .;
+ .u_boot_cmd : { *(.u_boot_cmd) }
+ __u_boot_cmd_end = .;
+
+ . = ALIGN(4);
+ __bss_start = .;
+ .bss : { *(.bss) }
+ _end = .;
+}
diff --git a/board/oxc/Makefile b/board/oxc/Makefile
deleted file mode 100644
index ae7a932084..0000000000
--- a/board/oxc/Makefile
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/oxc/config.mk b/board/oxc/config.mk
deleted file mode 100644
index 7a5bcfc190..0000000000
--- a/board/oxc/config.mk
+++ /dev/null
@@ -1,31 +0,0 @@
-#
-# (C) Copyright 2000, 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# OXC boards
-#
-
-#TEXT_BASE = 0x00090000
-TEXT_BASE = 0xFFF00000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE)
diff --git a/board/oxc/flash.c b/board/oxc/flash.c
deleted file mode 100644
index 795b7ccff9..0000000000
--- a/board/oxc/flash.c
+++ /dev/null
@@ -1,372 +0,0 @@
-/*
- * (C) Copyright 2000
- * Marius Groeger <mgroeger@sysgo.de>
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- *
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * Flash Routines for STM29W320DB/STM29W800D flash chips
- *
- *--------------------------------------------------------------------
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-
-static ulong flash_get_size (vu_char *addr, flash_info_t *info);
-static int write_byte (flash_info_t *info, ulong dest, uchar data);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- unsigned long size;
- int i;
-
- /* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /*
- * We use the following trick here: since flash is cyclically
- * mapped in the 0xFF800000-0xFFFFFFFF area, we detect the type
- * and the size of flash using 0xFF800000 as the base address,
- * and then call flash_get_size() again to fill flash_info.
- */
- size = flash_get_size((vu_char *)CFG_FLASH_PRELIMBASE, &flash_info[0]);
- if (size)
- {
- flash_get_size((vu_char *)(-size), &flash_info[0]);
- }
-
-#if (CFG_MONITOR_BASE >= CFG_FLASH_PRELIMBASE)
- /* monitor protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+monitor_flash_len-1,
- &flash_info[0]);
-#endif
-
-#if (CFG_ENV_IS_IN_FLASH == 1) && defined(CFG_ENV_ADDR)
-# ifndef CFG_ENV_SIZE
-# define CFG_ENV_SIZE CFG_ENV_SECT_SIZE
-# endif
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1,
- &flash_info[0]);
-#endif
-
- return (size);
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_STM:
- printf ("ST ");
- break;
- default:
- printf ("Unknown Vendor ");
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_STM320DB:
- printf ("M29W320DB (32 Mbit)\n");
- break;
- case FLASH_STM800DB:
- printf ("M29W800DB (8 Mbit, bottom boot block)\n");
- break;
- case FLASH_STM800DT:
- printf ("M29W800DT (8 Mbit, top boot block)\n");
- break;
- default:
- printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld KB in %d Sectors\n",
- info->size >> 10, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " "
- );
- }
- printf ("\n");
- return;
-}
-
-/*
- * The following code cannot be run from FLASH!
- */
-
-static ulong flash_get_size (vu_char *addr, flash_info_t *info)
-{
- short i;
- uchar vendor, devid;
- ulong base = (ulong)addr;
-
- /* Write auto select command: read Manufacturer ID */
- addr[0x0AAA] = 0xAA;
- addr[0x0555] = 0x55;
- addr[0x0AAA] = 0x90;
-
- udelay(1000);
-
- vendor = addr[0];
- devid = addr[2];
-
- /* only support STM */
- if ((vendor << 16) != FLASH_MAN_STM) {
- return 0;
- }
-
- if (devid == FLASH_STM320DB) {
- /* MPC8240 can address maximum 2Mb of flash, that is why the MSB
- * lead is grounded and we can access only 2 first Mb */
- info->flash_id = vendor << 16 | devid;
- info->sector_count = 32;
- info->size = info->sector_count * 0x10000;
- for (i = 0; i < info->sector_count; i++) {
- info->start[i] = base + i * 0x10000;
- }
- }
- else if (devid == FLASH_STM800DB) {
- info->flash_id = vendor << 16 | devid;
- info->sector_count = 19;
- info->size = 0x100000;
- info->start[0] = 0x0000;
- info->start[1] = 0x4000;
- info->start[2] = 0x6000;
- info->start[3] = 0x8000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] = base + (i-3) * 0x10000;
- }
- }
- else if (devid == FLASH_STM800DT) {
- info->flash_id = vendor << 16 | devid;
- info->sector_count = 19;
- info->size = 0x100000;
- for (i = 0; i < info->sector_count-4; i++) {
- info->start[i] = base + i * 0x10000;
- }
- info->start[i] = base + i * 0x10000;
- info->start[i+1] = base + i * 0x10000 + 0x8000;
- info->start[i+2] = base + i * 0x10000 + 0xa000;
- info->start[i+3] = base + i * 0x10000 + 0xc000;
- }
- else {
- return 0;
- }
-
- /* mark all sectors as unprotected */
- for (i = 0; i < info->sector_count; i++) {
- info->protect[i] = 0;
- }
-
- /* Issue the reset command */
- if (info->flash_id != FLASH_UNKNOWN) {
- addr[0] = 0xF0; /* reset bank */
- }
-
- return (info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- vu_char *addr = (vu_char *)(info->start[0]);
- int flag, prot, sect, l_sect;
- ulong start, now, last;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- l_sect = -1;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[0x0AAA] = 0xAA;
- addr[0x0555] = 0x55;
- addr[0x0AAA] = 0x80;
- addr[0x0AAA] = 0xAA;
- addr[0x0555] = 0x55;
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr = (vu_char *)(info->start[sect]);
- addr[0] = 0x30;
- l_sect = sect;
- }
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- /*
- * We wait for the last triggered sector
- */
- if (l_sect < 0)
- goto DONE;
-
- start = get_timer (0);
- last = start;
- addr = (vu_char *)(info->start[l_sect]);
- while ((addr[0] & 0x80) != 0x80) {
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- return 1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- serial_putc ('.');
- last = now;
- }
- }
-
- DONE:
- /* reset to read mode */
- addr = (volatile unsigned char *)info->start[0];
- addr[0] = 0xF0; /* reset bank */
-
- printf (" done\n");
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- int rc;
-
- while (cnt > 0) {
- if ((rc = write_byte(info, addr, *src)) != 0) {
- return (rc);
- }
- addr++;
- src++;
- cnt--;
- }
-
- return (0);
-}
-
-/*-----------------------------------------------------------------------
- * Write a byte to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_byte (flash_info_t *info, ulong dest, uchar data)
-{
- vu_char *addr = (vu_char *)(info->start[0]);
- ulong start;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*((vu_char *)dest) & data) != data) {
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[0x0AAA] = 0xAA;
- addr[0x0555] = 0x55;
- addr[0x0AAA] = 0xA0;
-
- *((vu_char *)dest) = data;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* data polling for D7 */
- start = get_timer (0);
- while ((*((vu_char *)dest) & 0x80) != (data & 0x80)) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- return (1);
- }
- }
- return (0);
-}
-
-/*-----------------------------------------------------------------------
- */
diff --git a/board/oxc/oxc.c b/board/oxc/oxc.c
deleted file mode 100644
index fa7ff0215c..0000000000
--- a/board/oxc/oxc.c
+++ /dev/null
@@ -1,217 +0,0 @@
-/*
- * (C) Copyright 2000
- * Rob Taylor, Flying Pig Systems. robt@flyingpig.com.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc824x.h>
-#include <pci.h>
-#include <i2c.h>
-
-int checkboard (void)
-{
- puts ( "Board: OXC8240\n" );
- return 0;
-}
-
-long int initdram (int board_type)
-{
-#ifndef CFG_RAMBOOT
- long size;
- long new_bank0_end;
- long mear1;
- long emear1;
-
- size = get_ram_size(CFG_SDRAM_BASE, CFG_MAX_RAM_SIZE);
-
- new_bank0_end = size - 1;
- mear1 = mpc824x_mpc107_getreg(MEAR1);
- emear1 = mpc824x_mpc107_getreg(EMEAR1);
- mear1 = (mear1 & 0xFFFFFF00) |
- ((new_bank0_end & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT);
- emear1 = (emear1 & 0xFFFFFF00) |
- ((new_bank0_end & MICR_ADDR_MASK) >> MICR_EADDR_SHIFT);
- mpc824x_mpc107_setreg(MEAR1, mear1);
- mpc824x_mpc107_setreg(EMEAR1, emear1);
-
- return (size);
-#else
- /* if U-Boot starts from RAM, then suppose we have 16Mb of RAM */
- return (16 << 20);
-#endif
-}
-
-/*
- * Initialize PCI Devices, report devices found.
- */
-#ifndef CONFIG_PCI_PNP
-static struct pci_config_table pci_oxc_config_table[] = {
- { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x14, PCI_ANY_ID,
- pci_cfgfunc_config_device, { PCI_ENET0_IOADDR,
- PCI_ENET0_MEMADDR,
- PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }},
- { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x15, PCI_ANY_ID,
- pci_cfgfunc_config_device, { PCI_ENET1_IOADDR,
- PCI_ENET1_MEMADDR,
- PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }},
- { }
-};
-#endif
-
-static struct pci_controller hose = {
-#ifndef CONFIG_PCI_PNP
- config_table: pci_oxc_config_table,
-#endif
-};
-
-void pci_init_board (void)
-{
- pci_mpc824x_init(&hose);
-}
-
-int board_early_init_f (void)
-{
- *(volatile unsigned char *)(CFG_CPLD_RESET) = 0x89;
- return 0;
-}
-
-#ifdef CONFIG_WATCHDOG
-void oxc_wdt_reset(void)
-{
- *(volatile unsigned char *)(CFG_CPLD_WATCHDOG) = 0xff;
-}
-
-void watchdog_reset(void)
-{
- int re_enable = disable_interrupts();
-
- oxc_wdt_reset();
- if (re_enable)
- enable_interrupts();
-}
-#endif
-
-static int oxc_get_expander(unsigned char addr, unsigned char * val)
-{
- return i2c_read(addr, 0, 0, val, 1);
-}
-
-static int oxc_set_expander(unsigned char addr, unsigned char val)
-{
- return i2c_write(addr, 0, 0, &val, 1);
-}
-
-static int expander0alive = 0;
-
-#ifdef CONFIG_SHOW_ACTIVITY
-static int ledtoggle = 0;
-static int ledstatus = 1;
-
-void oxc_toggle_activeled(void)
-{
- ledtoggle++;
-}
-
-void board_show_activity (ulong timestamp)
-{
- if ((timestamp % (CFG_HZ / 10)) == 0)
- oxc_toggle_activeled ();
-}
-
-void show_activity(int arg)
-{
- static unsigned char led = 0;
- unsigned char val;
-
- if (!expander0alive) return;
-
- if ((ledtoggle > (2 * arg)) && ledstatus) {
- led ^= 0x80;
- oxc_get_expander(CFG_I2C_EXPANDER0_ADDR, &val);
- udelay(200);
- oxc_set_expander(CFG_I2C_EXPANDER0_ADDR, (val & 0x7F) | led);
- ledtoggle = 0;
- }
-}
-#endif
-
-#ifdef CONFIG_SHOW_BOOT_PROGRESS
-void show_boot_progress(int arg)
-{
- unsigned char val;
-
- if (!expander0alive) return;
-
- if (arg > 0 && ledstatus) {
- ledstatus = 0;
- oxc_get_expander(CFG_I2C_EXPANDER0_ADDR, &val);
- udelay(200);
- oxc_set_expander(CFG_I2C_EXPANDER0_ADDR, val | 0x80);
- } else if (arg < 0) {
- oxc_get_expander(CFG_I2C_EXPANDER0_ADDR, &val);
- udelay(200);
- oxc_set_expander(CFG_I2C_EXPANDER0_ADDR, val & 0x7F);
- ledstatus = 1;
- }
-}
-#endif
-
-int misc_init_r (void)
-{
- /* check whether the i2c expander #0 is accessible */
- if (!oxc_set_expander(CFG_I2C_EXPANDER0_ADDR, 0x7F)) {
- udelay(200);
- expander0alive = 1;
- }
-
-#ifdef CFG_OXC_GENERATE_IP
- {
- DECLARE_GLOBAL_DATA_PTR;
-
- char str[32];
- unsigned long ip = CFG_OXC_IPMASK;
- bd_t *bd = gd->bd;
-
- if (expander0alive) {
- unsigned char val;
-
- if (!oxc_get_expander(CFG_I2C_EXPANDER0_ADDR, &val)) {
- ip = (ip & 0xffffff00) | ((val & 0x7c) >> 2);
- }
- }
-
- if ((ip & 0xff) < 3) {
- /* if fail, set x.x.x.254 */
- ip = (ip & 0xffffff00) | 0xfe;
- }
-
- bd->bi_ip_addr = ip;
- sprintf(str, "%ld.%ld.%ld.%ld",
- (bd->bi_ip_addr & 0xff000000) >> 24,
- (bd->bi_ip_addr & 0x00ff0000) >> 16,
- (bd->bi_ip_addr & 0x0000ff00) >> 8,
- (bd->bi_ip_addr & 0x000000ff));
- setenv("ipaddr", str);
- printf("ip: %s\n", str);
- }
-#endif
- return (0);
-}
diff --git a/board/oxc/u-boot.lds b/board/oxc/u-boot.lds
deleted file mode 100644
index 2a5cd2ebd9..0000000000
--- a/board/oxc/u-boot.lds
+++ /dev/null
@@ -1,133 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc824x/start.o (.text)
- lib_ppc/board.o (.text)
- lib_ppc/ppcstring.o (.text)
-
- . = DEFINED(env_offset) ? env_offset : .;
- common/environment.o (.text)
-
- *(.text)
-
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
-
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/pb1x00/Makefile b/board/pb1x00/Makefile
deleted file mode 100644
index d1cdc6b924..0000000000
--- a/board/pb1x00/Makefile
+++ /dev/null
@@ -1,41 +0,0 @@
-#
-# (C) Copyright 2003
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o
-SOBJS = memsetup.o
-
-$(LIB): .depend $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS) $(SOBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/pb1x00/README b/board/pb1x00/README
deleted file mode 100644
index b37ff3616b..0000000000
--- a/board/pb1x00/README
+++ /dev/null
@@ -1,63 +0,0 @@
-By Thomas.Lange@corelatus.se 2004-Oct-05
-----------------------------------------
-DbAu1xx0 are development boards from AMD containing
-an Alchemy AU1xx0 series cpu with mips32 core.
-Existing cpu:s are Au1000, Au1100, Au1500 and Au1550
-
-Limitations & comments
-----------------------
-Support was originally big endian only.
-I have not tested, but several u-boot users report working
-configurations in little endian mode.
-
-I named the board dbau1x00, to allow
-support for all three development boards
-( dbau1000, dbau1100 and dbau1500 ).
-Now there is a new board called dbau1550 also, which
-should be supported RSN.
-
-I only have a dbau1000, so my testing is limited
-to this board.
-
-The board has two different flash banks, that can
-be selected via dip switch. This makes it possible
-to test new bootloaders without thrashing the YAMON
-boot loader delivered with board.
-
-NOTE! When you switch between the two boot flashes, the
-base addresses will be swapped.
-Have this in mind when you compile u-boot. TEXT_BASE has
-to match the address where u-boot is located when you
-actually launch.
-
-Ethernet only supported for mac0.
-
-PCMCIA only supported for slot 0, only 3.3V.
-
-PCMCIA IDE tested with Sandisk Compact Flash and
-IBM microdrive.
-
-###################################
-######## NOTE!!!!!! #########
-###################################
-If you partition a disk on another system (e.g. laptop),
-all bytes will be swapped on 16bit level when using
-PCMCIA and running cpu in big endian mode!!!!
-
-This is probably due to an error in Au1000 chip.
-
-Solution:
-
-a) Boot via network and partition disk directly from
-dbau1x00. The endian will then be correct.
-
-b) Partition disk on "laptop" and fill it with all files
-you need. Then write a simple program that endian swaps
-whole disk,
-
-Example:
-Original "laptop" byte order:
-B0 B1 B2 B3 B4 B5 B6 B7 B8 B9...
-
-Dbau1000 byte order will then be:
-B1 B0 B3 B2 B5 B4 B7 B6 B9 B8...
diff --git a/board/pb1x00/config.mk b/board/pb1x00/config.mk
deleted file mode 100644
index 396a0454ad..0000000000
--- a/board/pb1x00/config.mk
+++ /dev/null
@@ -1,32 +0,0 @@
-#
-# (C) Copyright 2003
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# AMD development board AMD Alchemy Pb1x00, MIPS32 core
-#
-
-# ROM version
-#TEXT_BASE = 0xbfc00000
-
-# SDRAM version
-TEXT_BASE = 0x83800000
diff --git a/board/pb1x00/flash.c b/board/pb1x00/flash.c
deleted file mode 100644
index 3cf29e844b..0000000000
--- a/board/pb1x00/flash.c
+++ /dev/null
@@ -1,43 +0,0 @@
-/*
- * (C) Copyright 2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/*-----------------------------------------------------------------------
- * flash_init()
- *
- * sets up flash_info and returns size of FLASH (bytes)
- */
-unsigned long flash_init (void)
-{
- printf ("Skipping flash_init\n");
- return (0);
-}
-
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- printf ("write_buff not implemented\n");
- return (-1);
-}
diff --git a/board/pb1x00/memsetup.S b/board/pb1x00/memsetup.S
deleted file mode 100644
index 44f02b9555..0000000000
--- a/board/pb1x00/memsetup.S
+++ /dev/null
@@ -1,392 +0,0 @@
-/* Memory sub-system initialization code */
-
-#include <config.h>
-#include <version.h>
-#include <asm/regdef.h>
-#include <asm/au1x00.h>
-#include <asm/mipsregs.h>
-
-#define AU1500_SYS_ADDR 0xB1900000
-#define sys_endian 0x0038
-#define CP0_Config0 $16
-#define MEM_1MS ((396000000/1000000) * 1000)
-
- .text
- .set noreorder
- .set mips32
-
- .globl memsetup
-memsetup:
- /*
- * Step 1) Establish CPU endian mode.
- * NOTE: A fair amount of code is necessary on the Pb1000 to
- * obtain the value of Switch S8.1 which is used to determine
- * endian at run-time.
- */
-
- /* RCE1 */
- li t0, MEM_STCFG1
- li t1, 0x00000083
- sw t1, 0(t0)
-
- li t0, MEM_STTIME1
- li t1, 0x33030A10
- sw t1, 0(t0)
-
- li t0, MEM_STADDR1
- li t1, 0x11803E40
- sw t1, 0(t0)
-
- /* Set DSTRB bits so switch will read correctly */
- li t1, 0xBE00000C
- lw t2, 0(t1)
- or t2, t2, 0x00000300
- sw t2, 0(t1)
-
- /* Check switch setting */
- li t1, 0xBE000014
- lw t2, 0(t1)
- and t2, t2, 0x00000100
- bne t2, zero, big_endian
- nop
-
-little_endian:
-
- /* Change Au1 core to little endian */
- li t0, AU1500_SYS_ADDR
- li t1, 1
- sw t1, sys_endian(t0)
- mfc0 t2, CP0_CONFIG
- mtc0 t2, CP0_CONFIG
- nop
- nop
-
- /* Big Endian is default so nothing to do but fall through */
-
-big_endian:
-
- /*
- * Step 2) Establish Status Register
- * (set BEV, clear ERL, clear EXL, clear IE)
- */
- li t1, 0x00400000
- mtc0 t1, CP0_STATUS
-
- /*
- * Step 3) Establish CP0 Config0
- * (set OD, set K0=3)
- */
- li t1, 0x00080003
- mtc0 t1, CP0_CONFIG
-
- /*
- * Step 4) Disable Watchpoint facilities
- */
- li t1, 0x00000000
- mtc0 t1, CP0_WATCHLO
- mtc0 t1, CP0_IWATCHLO
- /*
- * Step 5) Disable the performance counters
- */
- mtc0 zero, CP0_PERFORMANCE
- nop
-
- /*
- * Step 6) Establish EJTAG Debug register
- */
- mtc0 zero, CP0_DEBUG
- nop
-
- /*
- * Step 7) Establish Cause
- * (set IV bit)
- */
- li t1, 0x00800000
- mtc0 t1, CP0_CAUSE
-
- /* Establish Wired (and Random) */
- mtc0 zero, CP0_WIRED
- nop
-
- /* First setup pll:s to make serial work ok */
- /* We have a 12 MHz crystal */
- li t0, SYS_CPUPLL
- li t1, 0x21 /* 396 MHz */
- sw t1, 0(t0)
- sync
- nop
- nop
-
- /* wait 1mS for clocks to settle */
- li t1, MEM_1MS
-1: add t1, -1
- bne t1, zero, 1b
- nop
- /* Setup AUX PLL */
- li t0, SYS_AUXPLL
- li t1, 8 /* 96 MHz */
- sw t1, 0(t0) /* aux pll */
- sync
-
- /* Static memory controller */
-
- /* RCE0 8MB AMD29D323 Flash */
- li t0, MEM_STCFG0
- li t1, 0x00001403
- sw t1, 0(t0)
-
- li t0, MEM_STTIME0
- li t1, 0xFFFFFFDD
- sw t1, 0(t0)
-
- li t0, MEM_STADDR0
- li t1, 0x11F83FE0
- sw t1, 0(t0)
-
- /* RCE1 CPLD Board Logic */
- li t0, MEM_STCFG1
- li t1, 0x00000083
- sw t1, 0(t0)
-
- li t0, MEM_STTIME1
- li t1, 0x33030A10
- sw t1, 0(t0)
-
- li t0, MEM_STADDR1
- li t1, 0x11803E40
- sw t1, 0(t0)
-
- /* RCE2 CPLD Board Logic */
- li t0, MEM_STCFG2
- li t1, 0x00000004
- sw t1, 0(t0)
-
- li t0, MEM_STTIME2
- li t1, 0x08061908
- sw t1, 0(t0)
-
- li t0, MEM_STADDR2
- li t1, 0x12A03FC0
- sw t1, 0(t0)
-
- /* RCE3 PCMCIA 250ns */
- li t0, MEM_STCFG3
- li t1, 0x00000002
- sw t1, 0(t0)
-
- li t0, MEM_STTIME3
- li t1, 0x280E3E07
- sw t1, 0(t0)
-
- li t0, MEM_STADDR3
- li t1, 0x10000000
- sw t1, 0(t0)
-
- sync
-
- /* Set peripherals to a known state */
- li t0, IC0_CFG0CLR
- li t1, 0xFFFFFFFF
- sw t1, 0(t0)
-
- li t0, IC0_CFG0CLR
- sw t1, 0(t0)
-
- li t0, IC0_CFG1CLR
- sw t1, 0(t0)
-
- li t0, IC0_CFG2CLR
- sw t1, 0(t0)
-
- li t0, IC0_SRCSET
- sw t1, 0(t0)
-
- li t0, IC0_ASSIGNSET
- sw t1, 0(t0)
-
- li t0, IC0_WAKECLR
- sw t1, 0(t0)
-
- li t0, IC0_RISINGCLR
- sw t1, 0(t0)
-
- li t0, IC0_FALLINGCLR
- sw t1, 0(t0)
-
- li t0, IC0_TESTBIT
- li t1, 0x00000000
- sw t1, 0(t0)
- sync
-
- li t0, IC1_CFG0CLR
- li t1, 0xFFFFFFFF
- sw t1, 0(t0)
-
- li t0, IC1_CFG0CLR
- sw t1, 0(t0)
-
- li t0, IC1_CFG1CLR
- sw t1, 0(t0)
-
- li t0, IC1_CFG2CLR
- sw t1, 0(t0)
-
- li t0, IC1_SRCSET
- sw t1, 0(t0)
-
- li t0, IC1_ASSIGNSET
- sw t1, 0(t0)
-
- li t0, IC1_WAKECLR
- sw t1, 0(t0)
-
- li t0, IC1_RISINGCLR
- sw t1, 0(t0)
-
- li t0, IC1_FALLINGCLR
- sw t1, 0(t0)
-
- li t0, IC1_TESTBIT
- li t1, 0x00000000
- sw t1, 0(t0)
- sync
-
- li t0, SYS_FREQCTRL0
- li t1, 0x00000000
- sw t1, 0(t0)
-
- li t0, SYS_FREQCTRL1
- li t1, 0x00000000
- sw t1, 0(t0)
-
- li t0, SYS_CLKSRC
- li t1, 0x00000000
- sw t1, 0(t0)
-
- li t0, SYS_PININPUTEN
- li t1, 0x00000000
- sw t1, 0(t0)
- sync
-
- li t0, 0xB1100100
- li t1, 0x00000000
- sw t1, 0(t0)
-
- li t0, 0xB1400100
- li t1, 0x00000000
- sw t1, 0(t0)
-
-
- li t0, SYS_WAKEMSK
- li t1, 0x00000000
- sw t1, 0(t0)
-
- li t0, SYS_WAKESRC
- li t1, 0x00000000
- sw t1, 0(t0)
-
- /* wait 1mS before setup */
- li t1, MEM_1MS
-1: add t1, -1
- bne t1, zero, 1b
- nop
-
- /*
- * Skip memory setup if we are running from memory
- */
- li t0, 0x90000000
- sub t0, ra, t0
- bltz t0, skip_memsetup
- nop
-
- /*
- * SDCS0 - Not used, for SMROM
- * SDCS1 - 32MB Micron 48LCBM16A2
- * SDCS2 - 32MB Micron 48LCBM16A2
- */
- li t0, MEM_SDMODE0
- li t1, 0x00000000
- sw t1, 0(t0)
-
- li t0, MEM_SDMODE1
- li t1, 0x00552229
- sw t1, 0(t0)
-
- li t0, MEM_SDMODE2
- li t1, 0x00552229
- sw t1, 0(t0)
-
- li t0, MEM_SDADDR0
- li t1, 0x00000000
- sw t1, 0(t0)
-
- li t0, MEM_SDADDR1
- li t1, 0x001003F8
- sw t1, 0(t0)
-
- li t0, MEM_SDADDR2
- li t1, 0x001023F8
- sw t1, 0(t0)
-
- sync
-
- li t0, MEM_SDREFCFG
- li t1, 0x74000c30 /* Disable */
- sw t1, 0(t0)
- sync
-
- li t0, MEM_SDPRECMD
- sw zero, 0(t0)
- sync
-
- li t0, MEM_SDAUTOREF
- sw zero, 0(t0)
- sync
- sw zero, 0(t0)
- sync
-
- li t0, MEM_SDREFCFG
- li t1, 0x76000c30 /* Enable */
- sw t1, 0(t0)
- sync
-
- li t0, MEM_SDWRMD0
- li t1, 0x00000023
- sw t1, 0(t0)
- sync
-
- li t0, MEM_SDWRMD1
- li t1, 0x00000023
- sw t1, 0(t0)
- sync
-
- li t0, MEM_SDWRMD2
- li t1, 0x00000023
- sw t1, 0(t0)
- sync
-
- /* wait 1mS after setup */
- li t1, MEM_1MS
-1: add t1, -1
- bne t1, zero, 1b
- nop
-
-skip_memsetup:
-
- li t0, SYS_PINFUNC
- li t1, 0/*0x00008080*/
- sw t1, 0(t0)
-
- /*
- li t0, SYS_TRIOUTCLR
- li t1, 0x00001FFF
- sw t1, 0(t0)
-
- li t0, SYS_OUTPUTCLR
- li t1, 0x00008000
- sw t1, 0(t0)
- */
- sync
-
- j ra
- nop
diff --git a/board/pb1x00/pb1x00.c b/board/pb1x00/pb1x00.c
deleted file mode 100644
index 40ac2a4d7c..0000000000
--- a/board/pb1x00/pb1x00.c
+++ /dev/null
@@ -1,115 +0,0 @@
-/*
- * (C) Copyright 2003
- * Thomas.Lange@corelatus.se
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <command.h>
-#include <asm/au1x00.h>
-#include <asm/mipsregs.h>
-
-long int initdram(int board_type)
-{
- /* Sdram is setup by assembler code */
- /* If memory could be changed, we should return the true value here */
- return 64*1024*1024;
-}
-
-#define BCSR_PCMCIA_PC0DRVEN 0x0010
-#define BCSR_PCMCIA_PC0RST 0x0080
-
-/* In cpu/mips/cpu.c */
-void write_one_tlb( int index, u32 pagemask, u32 hi, u32 low0, u32 low1 );
-
-int checkboard (void)
-{
- u16 status;
- /* volatile u32 *pcmcia_bcsr = (u32*)(DB1000_BCSR_ADDR+0x10); */
- volatile u32 *sys_counter = (volatile u32*)SYS_COUNTER_CNTRL;
- u32 proc_id;
-
- *sys_counter = 0x100; /* Enable 32 kHz oscillator for RTC/TOY */
-
- proc_id = read_32bit_cp0_register(CP0_PRID);
-
- switch (proc_id >> 24) {
- case 0:
- puts ("Board: Pb1000\n");
- printf ("CPU: Au1000 396 MHz, id: 0x%02x, rev: 0x%02x\n",
- (proc_id >> 8) & 0xFF, proc_id & 0xFF);
- break;
- case 1:
- puts ("Board: Pb1500\n");
- printf ("CPU: Au1500, id: 0x%02x, rev: 0x%02x\n",
- (proc_id >> 8) & 0xFF, proc_id & 0xFF);
- break;
- case 2:
- puts ("Board: Pb1100\n");
- printf ("CPU: Au1100, id: 0x%02x, rev: 0x%02x\n",
- (proc_id >> 8) & 0xFF, proc_id & 0xFF);
- break;
- default:
- printf ("Unsupported cpu %d, proc_id=0x%x\n", proc_id >> 24, proc_id);
- }
-#if defined(CONFIG_IDE_PCMCIA) && 0
- /* Enable 3.3 V on slot 0 ( VCC )
- No 5V */
- status = 4;
- *pcmcia_bcsr = status;
-
- status |= BCSR_PCMCIA_PC0DRVEN;
- *pcmcia_bcsr = status;
- au_sync();
-
- udelay(300*1000);
-
- status |= BCSR_PCMCIA_PC0RST;
- *pcmcia_bcsr = status;
- au_sync();
-
- udelay(100*1000);
-
- /* PCMCIA is on a 36 bit physical address.
- We need to map it into a 32 bit addresses */
-
-#if 0
- /* We dont need theese unless we run whole pcmcia package */
- write_one_tlb(20, /* index */
- 0x01ffe000, /* Pagemask, 16 MB pages */
- CFG_PCMCIA_IO_BASE, /* Hi */
- 0x3C000017, /* Lo0 */
- 0x3C200017); /* Lo1 */
-
- write_one_tlb(21, /* index */
- 0x01ffe000, /* Pagemask, 16 MB pages */
- CFG_PCMCIA_ATTR_BASE, /* Hi */
- 0x3D000017, /* Lo0 */
- 0x3D200017); /* Lo1 */
-#endif /* 0 */
- write_one_tlb(22, /* index */
- 0x01ffe000, /* Pagemask, 16 MB pages */
- CFG_PCMCIA_MEM_ADDR, /* Hi */
- 0x3E000017, /* Lo0 */
- 0x3E200017); /* Lo1 */
-#endif /* CONFIG_IDE_PCMCIA */
-
- return 0;
-}
diff --git a/board/pb1x00/u-boot.lds b/board/pb1x00/u-boot.lds
deleted file mode 100644
index a2d19a84c9..0000000000
--- a/board/pb1x00/u-boot.lds
+++ /dev/null
@@ -1,68 +0,0 @@
-/*
- * (C) Copyright 2003
- * Wolfgang Denk Engineering, <wd@denx.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
-OUTPUT_FORMAT("elf32-bigmips", "elf32-bigmips", "elf32-bigmips")
-*/
-OUTPUT_FORMAT("elf32-tradbigmips", "elf32-tradbigmips", "elf32-tradbigmips")
-OUTPUT_ARCH(mips)
-ENTRY(_start)
-SECTIONS
-{
- . = 0x00000000;
-
- . = ALIGN(4);
- .text :
- {
- *(.text)
- }
-
- . = ALIGN(4);
- .rodata : { *(.rodata) }
-
- . = ALIGN(4);
- .data : { *(.data) }
-
- . = ALIGN(4);
- .sdata : { *(.sdata) }
-
- _gp = ALIGN(16);
-
- __got_start = .;
- .got : { *(.got) }
- __got_end = .;
-
- .sdata : { *(.sdata) }
-
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- uboot_end_data = .;
- num_got_entries = (__got_end - __got_start) >> 2;
-
- . = ALIGN(4);
- .sbss : { *(.sbss) }
- .bss : { *(.bss) }
- uboot_end = .;
-}
diff --git a/board/pcippc2/Makefile b/board/pcippc2/Makefile
deleted file mode 100644
index 2998f23eb0..0000000000
--- a/board/pcippc2/Makefile
+++ /dev/null
@@ -1,45 +0,0 @@
-#
-# (C) Copyright 2002
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-COBJS = $(BOARD).o cpc710_pci.o flash.o sconsole.o \
- fpga_serial.o pcippc2_fpga.o cpc710_init_ram.o i2c.o
-
-AOBJS =
-
-OBJS = $(COBJS) $(AOBJS)
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(AOBJS:.o=.S) $(COBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(AOBJS:.o=.S) $(COBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/pcippc2/config.mk b/board/pcippc2/config.mk
deleted file mode 100644
index 92d37c9366..0000000000
--- a/board/pcippc2/config.mk
+++ /dev/null
@@ -1,30 +0,0 @@
-#
-# (C) Copyright 2002
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# PCIPPC-2 boards
-#
-
-TEXT_BASE = 0xfff00000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE)
diff --git a/board/pcippc2/cpc710.h b/board/pcippc2/cpc710.h
deleted file mode 100644
index 81672709bb..0000000000
--- a/board/pcippc2/cpc710.h
+++ /dev/null
@@ -1,96 +0,0 @@
-/*
- * (C) Copyright 2002
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef _CPC710_H_
-#define _CPC710_H_
-
-/* Revision */
-#define CPC710_TYPE_100 0x80
-#define CPC710_TYPE_100P 0x90
-
-/* System control area */
-#define HW_PHYS_SCA 0xff000000
-
-#define HW_SCA_CPC0 0x000000
-#define HW_SCA_SDRAM0 0x000000
-#define HW_SCA_DMA0 0x1C0000
-
-#define HW_PHYS_CPC0 (HW_PHYS_SCA + HW_SCA_CPC0)
-#define HW_PHYS_SDRAM0 (HW_PHYS_SCA + HW_SCA_SDRAM0)
-
-#define HW_CPC0_PCICNFR 0x000c
-#define HW_CPC0_RSTR 0x0010
-#define HW_CPC0_SPOR 0x00e8
-#define HW_CPC0_UCTL 0x1000
-#define HW_CPC0_SIOC0 0x1020
-#define HW_CPC0_ABCNTL 0x1030
-#define HW_CPC0_SESR 0x1060
-#define HW_CPC0_SEAR 0x1070
-#define HW_CPC0_PGCHP 0x1100
-#define HW_CPC0_RGBAN0 0x1110
-#define HW_CPC0_RGBAN1 0x1120
-
-#define HW_CPC0_GPDIR 0x1130
-#define HW_CPC0_GPIN 0x1140
-#define HW_CPC0_GPOUT 0x1150
-
-#define HW_CPC0_ATAS 0x1160
-
-#define HW_CPC0_PCIBAR 0x200018
-#define HW_CPC0_PCIENB 0x201000
-
-#define HW_SDRAM0_MCCR 0x1200
-#define HW_SDRAM0_MESR 0x1220
-#define HW_SDRAM0_MEAR 0x1230
-
-#define HW_SDRAM0_MCER0 0x1300
-#define HW_SDRAM0_MCER1 0x1310
-#define HW_SDRAM0_MCER2 0x1320
-#define HW_SDRAM0_MCER3 0x1330
-#define HW_SDRAM0_MCER4 0x1340
-#define HW_SDRAM0_MCER5 0x1350
-#define HW_SDRAM0_MCER6 0x1360
-#define HW_SDRAM0_MCER7 0x1370
-
-#define HW_BRIDGE_PCIDG 0xf6120
-#define HW_BRIDGE_INTACK 0xf7700
-#define HW_BRIDGE_PIBAR 0xf7800
-#define HW_BRIDGE_PMBAR 0xf7810
-#define HW_BRIDGE_CRR 0xf7ef0
-#define HW_BRIDGE_PR 0xf7f20
-#define HW_BRIDGE_ACR 0xf7f30
-#define HW_BRIDGE_MSIZE 0xf7f40
-#define HW_BRIDGE_IOSIZE 0xf7f60
-#define HW_BRIDGE_SMBAR 0xf7f80
-#define HW_BRIDGE_SIBAR 0xf7fc0
-#define HW_BRIDGE_CFGADDR 0xf8000
-#define HW_BRIDGE_CFGDATA 0xf8010
-#define HW_BRIDGE_PSSIZE 0xf8100
-#define HW_BRIDGE_BARPS 0xf8120
-#define HW_BRIDGE_PSBAR 0xf8140
-
-/* Configuration space registers */
-#define CPC710_BUS_NUMBER 0x40
-#define CPC710_SUB_BUS_NUMBER 0x41
-
-#endif
diff --git a/board/pcippc2/cpc710_init_ram.c b/board/pcippc2/cpc710_init_ram.c
deleted file mode 100644
index 57ed8f087f..0000000000
--- a/board/pcippc2/cpc710_init_ram.c
+++ /dev/null
@@ -1,254 +0,0 @@
-/*
- * (C) Copyright 2002
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <config.h>
-#include <common.h>
-#include <asm/io.h>
-
-#include "pcippc2.h"
-#include "i2c.h"
-
-typedef struct cpc710_mem_org_s
-{
- u8 rows;
- u8 cols;
- u8 banks2;
- u8 org;
-} cpc710_mem_org_t;
-
-static int cpc710_compute_mcer (u32 * mcer,
- unsigned long *
- size,
- unsigned int sdram);
-static int cpc710_eeprom_checksum (unsigned int sdram);
-static u8 cpc710_eeprom_read (unsigned int sdram,
- unsigned int offset);
-
-static u32 cpc710_mcer_mem [] =
-{
- 0x000003f3, /* 18 lines, 4 Mb */
- 0x000003e3, /* 19 lines, 8 Mb */
- 0x000003c3, /* 20 lines, 16 Mb */
- 0x00000383, /* 21 lines, 32 Mb */
- 0x00000303, /* 22 lines, 64 Mb */
- 0x00000203, /* 23 lines, 128 Mb */
- 0x00000003, /* 24 lines, 256 Mb */
- 0x00000002, /* 25 lines, 512 Mb */
- 0x00000001 /* 26 lines, 1024 Mb */
-};
-static cpc710_mem_org_t cpc710_mem_org [] =
-{
- { 0x0c, 0x09, 0x02, 0x00 }, /* 0000: 12/ 9/2 */
- { 0x0d, 0x09, 0x02, 0x00 }, /* 0000: 13/ 9/2 */
- { 0x0d, 0x0a, 0x02, 0x00 }, /* 0000: 13/10/2 */
- { 0x0d, 0x0b, 0x02, 0x00 }, /* 0000: 13/11/2 */
- { 0x0d, 0x0c, 0x02, 0x00 }, /* 0000: 13/12/2 */
- { 0x0e, 0x0c, 0x02, 0x00 }, /* 0000: 14/12/2 */
- { 0x0b, 0x08, 0x02, 0x01 }, /* 0001: 11/ 8/2 */
- { 0x0b, 0x09, 0x01, 0x02 }, /* 0010: 11/ 9/1 */
- { 0x0b, 0x0a, 0x01, 0x03 }, /* 0011: 11/10/1 */
- { 0x0c, 0x08, 0x02, 0x04 }, /* 0100: 12/ 8/2 */
- { 0x0c, 0x0a, 0x02, 0x05 }, /* 0101: 12/10/2 */
- { 0x0d, 0x08, 0x01, 0x06 }, /* 0110: 13/ 8/1 */
- { 0x0d, 0x08, 0x02, 0x07 }, /* 0111: 13/ 8/2 */
- { 0x0d, 0x09, 0x01, 0x08 }, /* 1000: 13/ 9/1 */
- { 0x0d, 0x0a, 0x01, 0x09 }, /* 1001: 13/10/1 */
- { 0x0b, 0x08, 0x01, 0x0a }, /* 1010: 11/ 8/1 */
- { 0x0c, 0x08, 0x01, 0x0b }, /* 1011: 12/ 8/1 */
- { 0x0c, 0x09, 0x01, 0x0c }, /* 1100: 12/ 9/1 */
- { 0x0e, 0x09, 0x02, 0x0d }, /* 1101: 14/ 9/2 */
- { 0x0e, 0x0a, 0x02, 0x0e }, /* 1110: 14/10/2 */
- { 0x0e, 0x0b, 0x02, 0x0f } /* 1111: 14/11/2 */
-};
-
-unsigned long cpc710_ram_init (void)
-{
- unsigned long memsize = 0;
- unsigned long bank_size;
- u32 mcer;
-
-#ifndef CFG_RAMBOOT
- /* Clear memory banks
- */
- out32(REG(SDRAM0, MCER0), 0);
- out32(REG(SDRAM0, MCER1), 0);
- out32(REG(SDRAM0, MCER2), 0);
- out32(REG(SDRAM0, MCER3), 0);
- out32(REG(SDRAM0, MCER4), 0);
- out32(REG(SDRAM0, MCER5), 0);
- out32(REG(SDRAM0, MCER6), 0);
- out32(REG(SDRAM0, MCER7), 0);
- iobarrier_rw();
-
- /* Disable memory
- */
- out32(REG(SDRAM0,MCCR), 0x13b06000);
- iobarrier_rw();
-#endif
-
- /* Only the first memory bank is initialised now
- */
- if (! cpc710_compute_mcer(& mcer, & bank_size, 0))
- {
- puts("Unsupported SDRAM type !\n");
- hang();
- }
- memsize += bank_size;
-#ifndef CFG_RAMBOOT
- /* Enable bank, zero start
- */
- out32(REG(SDRAM0, MCER0), mcer | 0x80000000);
- iobarrier_rw();
-#endif
-
-#ifndef CFG_RAMBOOT
- /* Enable memory
- */
- out32(REG(SDRAM0, MCCR), in32(REG(SDRAM0, MCCR)) | 0x80000000);
-
- /* Wait until initialisation finished
- */
- while (! (in32 (REG(SDRAM0, MCCR)) & 0x20000000))
- {
- iobarrier_rw();
- }
-
- /* Clear Memory Error Status and Address registers
- */
- out32(REG(SDRAM0, MESR), 0);
- out32(REG(SDRAM0, MEAR), 0);
- iobarrier_rw();
-
- /* ECC is not configured now
- */
-#endif
-
- /* Memory size counter
- */
- out32(REG(CPC0, RGBAN1), memsize);
-
- return memsize;
-}
-
-static int cpc710_compute_mcer (
- u32 * mcer,
- unsigned long * size,
- unsigned int sdram)
-{
- u8 rows;
- u8 cols;
- u8 banks2;
- unsigned int lines;
- u32 mc = 0;
- unsigned int i;
- cpc710_mem_org_t * org = 0;
-
-
- if (! i2c_reset())
- {
- puts("Can't reset I2C!\n");
- hang();
- }
-
- if (! cpc710_eeprom_checksum(sdram))
- {
- puts("Invalid EEPROM checksum !\n");
- hang();
- }
-
- rows = cpc710_eeprom_read(sdram, 3);
- cols = cpc710_eeprom_read(sdram, 4);
- /* Can be 2 or 4 banks; divide by 2
- */
- banks2 = cpc710_eeprom_read(sdram, 17) / 2;
-
- lines = rows + cols + banks2;
-
- if (lines < 18 || lines > 26)
- {
- /* Unsupported configuration
- */
- return 0;
- }
-
-
- mc |= cpc710_mcer_mem [lines - 18] << 6;
-
- for (i = 0; i < sizeof(cpc710_mem_org) / sizeof(cpc710_mem_org_t); i++)
- {
- cpc710_mem_org_t * corg = cpc710_mem_org + i;
-
- if (corg->rows == rows && corg->cols == cols && corg->banks2 == banks2)
- {
- org = corg;
-
- break;
- }
- }
-
- if (! org)
- {
- /* Unsupported configuration
- */
- return 0;
- }
-
- mc |= (u32) org->org << 2;
-
- /* Supported configuration
- */
- *mcer = mc;
- *size = 1l << (lines + 4);
-
- return 1;
-}
-
-static int cpc710_eeprom_checksum (
- unsigned int sdram)
-{
- u8 sum = 0;
- unsigned int i;
-
- for (i = 0; i < 63; i++)
- {
- sum += cpc710_eeprom_read(sdram, i);
- }
-
- return sum == cpc710_eeprom_read(sdram, 63);
-}
-
-static u8 cpc710_eeprom_read (
- unsigned int sdram,
- unsigned int offset)
-{
- u8 dev = (sdram << 1) | 0xa0;
- u8 data;
-
- if (! i2c_read_byte(& data, dev,offset))
- {
- puts("I2C error !\n");
- hang();
- }
-
- return data;
-}
diff --git a/board/pcippc2/cpc710_pci.c b/board/pcippc2/cpc710_pci.c
deleted file mode 100644
index bed8aeab09..0000000000
--- a/board/pcippc2/cpc710_pci.c
+++ /dev/null
@@ -1,309 +0,0 @@
-/*
- * (C) Copyright 2002
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <config.h>
-#include <common.h>
-#include <asm/io.h>
-#include <pci.h>
-
-#include "hardware.h"
-#include "pcippc2.h"
-
-struct pci_controller local_hose, cpci_hose;
-
-static u32 cpc710_mapped_ram;
-
- /* Enable PCI retry timeouts
- */
-void cpc710_pci_enable_timeout (void)
-{
- out32(BRIDGE(LOCAL, CFGADDR), 0x50000080);
- iobarrier_rw();
- out32(BRIDGE(LOCAL, CFGDATA), 0x32000000);
- iobarrier_rw();
-
- out32(BRIDGE(CPCI, CFGADDR), 0x50000180);
- iobarrier_rw();
- out32(BRIDGE(CPCI, CFGDATA), 0x32000000);
- iobarrier_rw();
-}
-
-void cpc710_pci_init (void)
-{
- u32 sdram_size = pcippc2_sdram_size();
-
- cpc710_mapped_ram = sdram_size < PCI_MEMORY_MAXSIZE ?
- sdram_size : PCI_MEMORY_MAXSIZE;
-
- /* Select the local PCI
- */
- out32(REG(CPC0, PCICNFR), 0x80000002);
- iobarrier_rw();
-
- out32(REG(CPC0, PCIBAR), BRIDGE_LOCAL_PHYS);
- iobarrier_rw();
-
- /* Enable PCI bridge address decoding
- */
- out32(REG(CPC0, PCIENB), 0x80000000);
- iobarrier_rw();
-
- /* Select the CPCI bridge
- */
- out32(REG(CPC0, PCICNFR), 0x80000003);
- iobarrier_rw();
-
- out32(REG(CPC0, PCIBAR), BRIDGE_CPCI_PHYS);
- iobarrier_rw();
-
- /* Enable PCI bridge address decoding
- */
- out32(REG(CPC0, PCIENB), 0x80000000);
- iobarrier_rw();
-
- /* Disable configuration accesses
- */
- out32(REG(CPC0, PCICNFR), 0x80000000);
- iobarrier_rw();
-
- /* Initialise the local PCI
- */
- out32(BRIDGE(LOCAL, CRR), 0x7c000000);
- iobarrier_rw();
- out32(BRIDGE(LOCAL, PCIDG), 0x40000000);
- iobarrier_rw();
- out32(BRIDGE(LOCAL, PIBAR), BRIDGE_LOCAL_IO_BUS);
- out32(BRIDGE(LOCAL, SIBAR), BRIDGE_LOCAL_IO_PHYS);
- out32(BRIDGE(LOCAL, IOSIZE), -BRIDGE_LOCAL_IO_SIZE);
- iobarrier_rw();
- out32(BRIDGE(LOCAL, PMBAR), BRIDGE_LOCAL_MEM_BUS);
- out32(BRIDGE(LOCAL, SMBAR), BRIDGE_LOCAL_MEM_PHYS);
- out32(BRIDGE(LOCAL, MSIZE), -BRIDGE_LOCAL_MEM_SIZE);
- iobarrier_rw();
- out32(BRIDGE(LOCAL, PR), 0x00ffe000);
- iobarrier_rw();
- out32(BRIDGE(LOCAL, ACR), 0xfe000000);
- iobarrier_rw();
- out32(BRIDGE(LOCAL, PSBAR), PCI_MEMORY_BUS >> 24);
- out32(BRIDGE(LOCAL, BARPS), PCI_MEMORY_PHYS >> 24);
- out32(BRIDGE(LOCAL, PSSIZE), 256 - (cpc710_mapped_ram >> 24));
- iobarrier_rw();
-
- /* Initialise the CPCI bridge
- */
- out32(BRIDGE(CPCI, CRR), 0x7c000000);
- iobarrier_rw();
- out32(BRIDGE(CPCI, PCIDG), 0xC0000000);
- iobarrier_rw();
- out32(BRIDGE(CPCI, PIBAR), BRIDGE_CPCI_IO_BUS);
- out32(BRIDGE(CPCI, SIBAR), BRIDGE_CPCI_IO_PHYS);
- out32(BRIDGE(CPCI, IOSIZE), -BRIDGE_CPCI_IO_SIZE);
- iobarrier_rw();
- out32(BRIDGE(CPCI, PMBAR), BRIDGE_CPCI_MEM_BUS);
- out32(BRIDGE(CPCI, SMBAR), BRIDGE_CPCI_MEM_PHYS);
- out32(BRIDGE(CPCI, MSIZE), -BRIDGE_CPCI_MEM_SIZE);
- iobarrier_rw();
- out32(BRIDGE(CPCI, PR), 0x80ffe000);
- iobarrier_rw();
- out32(BRIDGE(CPCI, ACR), 0xdf000000);
- iobarrier_rw();
- out32(BRIDGE(CPCI, PSBAR), PCI_MEMORY_BUS >> 24);
- out32(BRIDGE(CPCI, BARPS), PCI_MEMORY_PHYS >> 24);
- out32(BRIDGE(CPCI, PSSIZE), 256 - (cpc710_mapped_ram >> 24));
- iobarrier_rw();
-
- /* Local PCI
- */
-
- out32(BRIDGE(LOCAL, CFGADDR), 0x04000080);
- iobarrier_rw();
- out32(BRIDGE(LOCAL, CFGDATA), 0x56010000);
- iobarrier_rw();
-
- out32(BRIDGE(LOCAL, CFGADDR), 0x0c000080);
- iobarrier_rw();
- out32(BRIDGE(LOCAL, CFGDATA), PCI_LATENCY_TIMER_VAL << 16);
- iobarrier_rw();
-
- /* Set bus and subbus numbers
- */
- out32(BRIDGE(LOCAL, CFGADDR), 0x40000080);
- iobarrier_rw();
- out32(BRIDGE(LOCAL, CFGDATA), 0x00000000);
- iobarrier_rw();
-
- out32(BRIDGE(LOCAL, CFGADDR), 0x50000080);
- iobarrier_rw();
- /* PCI retry timeouts will be enabled later
- */
- out32(BRIDGE(LOCAL, CFGDATA), 0x00000000);
- iobarrier_rw();
-
- /* CPCI
- */
-
- /* Set bus and subbus numbers
- */
- out32(BRIDGE(CPCI, CFGADDR), 0x40000080);
- iobarrier_rw();
- out32(BRIDGE(CPCI, CFGDATA), 0x01010000);
- iobarrier_rw();
-
- out32(BRIDGE(CPCI, CFGADDR), 0x04000180);
- iobarrier_rw();
- out32(BRIDGE(CPCI, CFGDATA), 0x56010000);
- iobarrier_rw();
-
- out32(BRIDGE(CPCI, CFGADDR), 0x0c000180);
- iobarrier_rw();
- out32(BRIDGE(CPCI, CFGDATA), PCI_LATENCY_TIMER_VAL << 16);
- iobarrier_rw();
-
- /* Write to the PSBAR */
- out32(BRIDGE(CPCI, CFGADDR), 0x10000180);
- iobarrier_rw();
- out32(BRIDGE(CPCI, CFGDATA), cpu_to_le32(PCI_MEMORY_BUS));
- iobarrier_rw();
-
- /* Set bus and subbus numbers
- */
- out32(BRIDGE(CPCI, CFGADDR), 0x40000180);
- iobarrier_rw();
- out32(BRIDGE(CPCI, CFGDATA), 0x01ff0000);
- iobarrier_rw();
-
- out32(BRIDGE(CPCI, CFGADDR), 0x50000180);
- iobarrier_rw();
- out32(BRIDGE(CPCI, CFGDATA), 0x32000000);
- /* PCI retry timeouts will be enabled later
- */
- out32(BRIDGE(CPCI, CFGDATA), 0x00000000);
- iobarrier_rw();
-
- /* Remove reset on the PCI buses
- */
- out32(BRIDGE(LOCAL, CRR), 0xfc000000);
- iobarrier_rw();
- out32(BRIDGE(CPCI, CRR), 0xfc000000);
- iobarrier_rw();
-
- local_hose.first_busno = 0;
- local_hose.last_busno = 0xff;
-
- /* System memory space */
- pci_set_region(local_hose.regions + 0,
- PCI_MEMORY_BUS,
- PCI_MEMORY_PHYS,
- PCI_MEMORY_MAXSIZE,
- PCI_REGION_MEM | PCI_REGION_MEMORY);
-
- /* PCI memory space */
- pci_set_region(local_hose.regions + 1,
- BRIDGE_LOCAL_MEM_BUS,
- BRIDGE_LOCAL_MEM_PHYS,
- BRIDGE_LOCAL_MEM_SIZE,
- PCI_REGION_MEM);
-
- /* PCI I/O space */
- pci_set_region(local_hose.regions + 2,
- BRIDGE_LOCAL_IO_BUS,
- BRIDGE_LOCAL_IO_PHYS,
- BRIDGE_LOCAL_IO_SIZE,
- PCI_REGION_IO);
-
- local_hose.region_count = 3;
-
- pci_setup_indirect(&local_hose,
- BRIDGE_LOCAL_PHYS + HW_BRIDGE_CFGADDR,
- BRIDGE_LOCAL_PHYS + HW_BRIDGE_CFGDATA);
-
- pci_register_hose(&local_hose);
-
- /* Initialize PCI32 bus registers */
- pci_hose_write_config_byte(&local_hose,
- PCI_BDF(local_hose.first_busno,0,0),
- CPC710_BUS_NUMBER,
- local_hose.first_busno);
- pci_hose_write_config_byte(&local_hose,
- PCI_BDF(local_hose.first_busno,0,0),
- CPC710_SUB_BUS_NUMBER,
- local_hose.last_busno);
-
- local_hose.last_busno = pci_hose_scan(&local_hose);
-
- /* Write out correct max subordinate bus number for local hose */
- pci_hose_write_config_byte(&local_hose,
- PCI_BDF(local_hose.first_busno,0,0),
- CPC710_SUB_BUS_NUMBER,
- local_hose.last_busno);
-
- cpci_hose.first_busno = local_hose.last_busno + 1;
- cpci_hose.last_busno = 0xff;
-
- /* System memory space */
- pci_set_region(cpci_hose.regions + 0,
- PCI_MEMORY_BUS,
- PCI_MEMORY_PHYS,
- PCI_MEMORY_MAXSIZE,
- PCI_REGION_MEMORY);
-
- /* PCI memory space */
- pci_set_region(cpci_hose.regions + 1,
- BRIDGE_CPCI_MEM_BUS,
- BRIDGE_CPCI_MEM_PHYS,
- BRIDGE_CPCI_MEM_SIZE,
- PCI_REGION_MEM);
-
- /* PCI I/O space */
- pci_set_region(cpci_hose.regions + 2,
- BRIDGE_CPCI_IO_BUS,
- BRIDGE_CPCI_IO_PHYS,
- BRIDGE_CPCI_IO_SIZE,
- PCI_REGION_IO);
-
- cpci_hose.region_count = 3;
-
- pci_setup_indirect(&cpci_hose,
- BRIDGE_CPCI_PHYS + HW_BRIDGE_CFGADDR,
- BRIDGE_CPCI_PHYS + HW_BRIDGE_CFGDATA);
-
- pci_register_hose(&cpci_hose);
-
- /* Initialize PCI64 bus registers */
- pci_hose_write_config_byte(&cpci_hose,
- PCI_BDF(cpci_hose.first_busno,0,0),
- CPC710_BUS_NUMBER,
- cpci_hose.first_busno);
- pci_hose_write_config_byte(&cpci_hose,
- PCI_BDF(cpci_hose.first_busno,0,0),
- CPC710_SUB_BUS_NUMBER,
- cpci_hose.last_busno);
-
- cpci_hose.last_busno = pci_hose_scan(&cpci_hose);
-
- /* Write out correct max subordinate bus number for cpci hose */
- pci_hose_write_config_byte(&cpci_hose,
- PCI_BDF(cpci_hose.first_busno,0,0),
- CPC710_SUB_BUS_NUMBER,
- cpci_hose.last_busno);
-}
diff --git a/board/pcippc2/cpc710_pci.h b/board/pcippc2/cpc710_pci.h
deleted file mode 100644
index 24d0db6345..0000000000
--- a/board/pcippc2/cpc710_pci.h
+++ /dev/null
@@ -1,51 +0,0 @@
-/*
- * (C) Copyright 2002
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef _CPC710_PCI_H_
-#define _CPC710_PCI_H_
-
-#define PCI_MEMORY_PHYS 0x00000000
-#define PCI_MEMORY_BUS 0x80000000
-#define PCI_MEMORY_MAXSIZE 0x20000000
-
-#define BRIDGE_CPCI_PHYS 0xff500000
-#define BRIDGE_CPCI_MEM_SIZE 0x08000000
-#define BRIDGE_CPCI_MEM_PHYS 0xf0000000
-#define BRIDGE_CPCI_MEM_BUS 0x00000000
-#define BRIDGE_CPCI_IO_SIZE 0x02000000
-#define BRIDGE_CPCI_IO_PHYS 0xfc000000
-#define BRIDGE_CPCI_IO_BUS 0x00000000
-
-#define BRIDGE_LOCAL_PHYS 0xff400000
-#define BRIDGE_LOCAL_MEM_SIZE 0x04000000
-#define BRIDGE_LOCAL_MEM_PHYS 0xf8000000
-#define BRIDGE_LOCAL_MEM_BUS 0x40000000
-#define BRIDGE_LOCAL_IO_SIZE 0x01000000
-#define BRIDGE_LOCAL_IO_PHYS 0xfe000000
-#define BRIDGE_LOCAL_IO_BUS 0x04000000
-
-#define BRIDGE(r, x) (BRIDGE_##r##_PHYS + HW_BRIDGE_##x)
-
-#define PCI_LATENCY_TIMER_VAL 0xff
-
-#endif
diff --git a/board/pcippc2/flash.c b/board/pcippc2/flash.c
deleted file mode 100644
index 8c01415fae..0000000000
--- a/board/pcippc2/flash.c
+++ /dev/null
@@ -1,573 +0,0 @@
-/*
- * (C) Copyright 2001
- * Josh Huber <huber@mclx.com>, Mission Critical Linux, Inc.
- *
- * (C) Copyright 2002
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <config.h>
-#include <common.h>
-#include <flash.h>
-#include <asm/io.h>
-
-/*---------------------------------------------------------------------*/
-#undef DEBUG_FLASH
-
-#ifdef DEBUG_FLASH
-#define DEBUGF(fmt,args...) printf(fmt ,##args)
-#else
-#define DEBUGF(fmt,args...)
-#endif
-/*---------------------------------------------------------------------*/
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
-
-static ulong flash_get_size (ulong addr, flash_info_t *info);
-static int flash_get_offsets (ulong base, flash_info_t *info);
-static int write_word (flash_info_t *info, ulong dest, ulong data);
-static void flash_reset (ulong addr);
-
-unsigned long flash_init (void)
-{
- unsigned int i;
- unsigned long flash_size = 0;
-
- /* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- flash_info[i].sector_count = 0;
- flash_info[i].size = 0;
- }
-
- DEBUGF("\n## Get flash size @ 0x%08x\n", CFG_FLASH_BASE);
-
- flash_size = flash_get_size (CFG_FLASH_BASE, flash_info);
-
- DEBUGF("## Flash bank size: %08lx\n", flash_size);
-
- if (flash_size) {
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE && \
- CFG_MONITOR_BASE < CFG_FLASH_BASE + CFG_FLASH_MAX_SIZE
- /* monitor protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE + monitor_flash_len - 1,
- &flash_info[0]);
-#endif
-
-#ifdef CFG_ENV_IS_IN_FLASH
- /* ENV protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1,
- &flash_info[0]);
-#endif
-
- } else {
- puts ("Warning: the BOOT Flash is not initialised !");
- }
-
- return flash_size;
-}
-
-/*
- * The following code cannot be run from FLASH!
- */
-static ulong flash_get_size (ulong addr, flash_info_t *info)
-{
- short i;
- uchar value;
-
- /* Write auto select command: read Manufacturer ID */
- out8(addr + 0x0555, 0xAA);
- iobarrier_rw();
- out8(addr + 0x02AA, 0x55);
- iobarrier_rw();
- out8(addr + 0x0555, 0x90);
- iobarrier_rw();
-
- value = in8(addr);
- iobarrier_rw();
-
- DEBUGF("Manuf. ID @ 0x%08lx: 0x%08x\n", (ulong)addr, value);
-
- switch (value | (value << 16)) {
- case AMD_MANUFACT:
- info->flash_id = FLASH_MAN_AMD;
- break;
-
- case FUJ_MANUFACT:
- info->flash_id = FLASH_MAN_FUJ;
- break;
-
- case STM_MANUFACT:
- info->flash_id = FLASH_MAN_STM;
- break;
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- flash_reset (addr);
- return 0;
- }
-
- value = in8(addr + 1); /* device ID */
- iobarrier_rw();
-
- DEBUGF("Device ID @ 0x%08lx: 0x%08x\n", addr+1, value);
-
- switch ((ulong)value) {
- case AMD_ID_F040B:
- DEBUGF("Am29F040B\n");
- info->flash_id += FLASH_AM040;
- info->sector_count = 8;
- info->size = 0x00080000;
- break; /* => 512 kB */
-
- case AMD_ID_LV040B:
- DEBUGF("Am29LV040B\n");
- info->flash_id += FLASH_AM040;
- info->sector_count = 8;
- info->size = 0x00080000;
- break; /* => 512 kB */
-
- case AMD_ID_LV400T:
- DEBUGF("Am29LV400T\n");
- info->flash_id += FLASH_AM400T;
- info->sector_count = 11;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case AMD_ID_LV400B:
- DEBUGF("Am29LV400B\n");
- info->flash_id += FLASH_AM400B;
- info->sector_count = 11;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case AMD_ID_LV800T:
- DEBUGF("Am29LV800T\n");
- info->flash_id += FLASH_AM800T;
- info->sector_count = 19;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case AMD_ID_LV800B:
- DEBUGF("Am29LV400B\n");
- info->flash_id += FLASH_AM800B;
- info->sector_count = 19;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case AMD_ID_LV160T:
- DEBUGF("Am29LV160T\n");
- info->flash_id += FLASH_AM160T;
- info->sector_count = 35;
- info->size = 0x00400000;
- break; /* => 4 MB */
-
- case AMD_ID_LV160B:
- DEBUGF("Am29LV160B\n");
- info->flash_id += FLASH_AM160B;
- info->sector_count = 35;
- info->size = 0x00400000;
- break; /* => 4 MB */
-
- case AMD_ID_LV320T:
- DEBUGF("Am29LV320T\n");
- info->flash_id += FLASH_AM320T;
- info->sector_count = 67;
- info->size = 0x00800000;
- break; /* => 8 MB */
-
-#if 0
- /* Has the same ID as AMD_ID_LV320T, to be fixed */
- case AMD_ID_LV320B:
- DEBUGF("Am29LV320B\n");
- info->flash_id += FLASH_AM320B;
- info->sector_count = 67;
- info->size = 0x00800000;
- break; /* => 8 MB */
-#endif
-
- case AMD_ID_LV033C:
- DEBUGF("Am29LV033C\n");
- info->flash_id += FLASH_AM033C;
- info->sector_count = 64;
- info->size = 0x01000000;
- break; /* => 16Mb */
-
- case STM_ID_F040B:
- DEBUGF("M29F040B\n");
- info->flash_id += FLASH_AM040;
- info->sector_count = 8;
- info->size = 0x00080000;
- break; /* => 512 kB */
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- flash_reset (addr);
- return (0); /* => no or unknown flash */
-
- }
-
- if (info->sector_count > CFG_MAX_FLASH_SECT) {
- printf ("** ERROR: sector count %d > max (%d) **\n",
- info->sector_count, CFG_MAX_FLASH_SECT);
- info->sector_count = CFG_MAX_FLASH_SECT;
- }
-
- if (! flash_get_offsets (addr, info)) {
- flash_reset (addr);
- return 0;
- }
-
- /* check for protected sectors */
- for (i = 0; i < info->sector_count; i++) {
- /* read sector protection at sector address, (A7 .. A0) = 0x02 */
- /* D0 = 1 if protected */
- value = in8(info->start[i] + 2);
- iobarrier_rw();
- info->protect[i] = (value & 1) != 0;
- }
-
- /*
- * Reset bank to read mode
- */
- flash_reset (addr);
-
- return (info->size);
-}
-
-static int flash_get_offsets (ulong base, flash_info_t *info)
-{
- unsigned int i;
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM040:
- /* set sector offsets for uniform sector type */
- for (i = 0; i < info->sector_count; i++) {
- info->start[i] = base + i * info->size /
- info->sector_count;
- }
- break;
- default:
- return 0;
- }
-
- return 1;
-}
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- volatile ulong addr = info->start[0];
- int flag, prot, sect, l_sect;
- ulong start, now, last;
-
- if (s_first < 0 || s_first > s_last) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- l_sect = -1;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- out8(addr + 0x555, 0xAA);
- iobarrier_rw();
- out8(addr + 0x2AA, 0x55);
- iobarrier_rw();
- out8(addr + 0x555, 0x80);
- iobarrier_rw();
- out8(addr + 0x555, 0xAA);
- iobarrier_rw();
- out8(addr + 0x2AA, 0x55);
- iobarrier_rw();
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr = info->start[sect];
- out8(addr, 0x30);
- iobarrier_rw();
- l_sect = sect;
- }
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- /*
- * We wait for the last triggered sector
- */
- if (l_sect < 0)
- goto DONE;
-
- start = get_timer (0);
- last = start;
- addr = info->start[l_sect];
-
- DEBUGF ("Start erase timeout: %d\n", CFG_FLASH_ERASE_TOUT);
-
- while ((in8(addr) & 0x80) != 0x80) {
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- flash_reset (info->start[0]);
- return 1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- iobarrier_rw();
- }
-
-DONE:
- /* reset to read mode */
- flash_reset (info->start[0]);
-
- printf (" done\n");
- return 0;
-}
-
-/*
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int i, l, rc;
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
- for (; i<4 && cnt>0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = 0;
- for (i=0; i<4; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- return (write_word(info, wp, data));
-}
-
-/*
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word (flash_info_t *info, ulong dest, ulong data)
-{
- volatile ulong addr = info->start[0];
- ulong start;
- int i;
-
- /* Check if Flash is (sufficiently) erased */
- if ((in32(dest) & data) != data) {
- return (2);
- }
-
- /* write each byte out */
- for (i = 0; i < 4; i++) {
- char *data_ch = (char *)&data;
- int flag = disable_interrupts();
-
- out8(addr + 0x555, 0xAA);
- iobarrier_rw();
- out8(addr + 0x2AA, 0x55);
- iobarrier_rw();
- out8(addr + 0x555, 0xA0);
- iobarrier_rw();
- out8(dest+i, data_ch[i]);
- iobarrier_rw();
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* data polling for D7 */
- start = get_timer (0);
- while ((in8(dest+i) & 0x80) != (data_ch[i] & 0x80)) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- flash_reset (addr);
- return (1);
- }
- iobarrier_rw();
- }
- }
-
- flash_reset (addr);
- return (0);
-}
-
-/*
- * Reset bank to read mode
- */
-static void flash_reset (ulong addr)
-{
- out8(addr, 0xF0); /* reset bank */
- iobarrier_rw();
-}
-
-void flash_print_info (flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD: printf ("AMD "); break;
- case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
- case FLASH_MAN_BM: printf ("BRIGHT MICRO "); break;
- case FLASH_MAN_STM: printf ("SGS THOMSON "); break;
- default: printf ("Unknown Vendor "); break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM040: printf ("29F040 or 29LV040 (4 Mbit, uniform sectors)\n");
- break;
- case FLASH_AM400B: printf ("AM29LV400B (4 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM400T: printf ("AM29LV400T (4 Mbit, top boot sector)\n");
- break;
- case FLASH_AM800B: printf ("AM29LV800B (8 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM800T: printf ("AM29LV800T (8 Mbit, top boot sector)\n");
- break;
- case FLASH_AM160B: printf ("AM29LV160B (16 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM160T: printf ("AM29LV160T (16 Mbit, top boot sector)\n");
- break;
- case FLASH_AM320B: printf ("AM29LV320B (32 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM320T: printf ("AM29LV320T (32 Mbit, top boot sector)\n");
- break;
- default: printf ("Unknown Chip Type\n");
- break;
- }
-
- if (info->size % 0x100000 == 0) {
- printf (" Size: %ld MB in %d Sectors\n",
- info->size / 0x100000, info->sector_count);
- } else if (info->size % 0x400 == 0) {
- printf (" Size: %ld KB in %d Sectors\n",
- info->size / 0x400, info->sector_count);
- } else {
- printf (" Size: %ld B in %d Sectors\n",
- info->size, info->sector_count);
- }
-
- printf (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " "
- );
- }
- printf ("\n");
-}
diff --git a/board/pcippc2/fpga_serial.c b/board/pcippc2/fpga_serial.c
deleted file mode 100644
index 579bfc7027..0000000000
--- a/board/pcippc2/fpga_serial.c
+++ /dev/null
@@ -1,132 +0,0 @@
-/*
- * (C) Copyright 2002
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <config.h>
-#include <common.h>
-#include <asm/io.h>
-
-#include "fpga_serial.h"
-#include "hardware.h"
-#include "pcippc2.h"
-
- /* 8 data, 1 stop, no parity
- */
-#define LCRVAL 0x03
- /* RTS/DTR
- */
-#define MCRVAL 0x03
- /* Clear & enable FIFOs
- */
-#define FCRVAL 0x07
-
-static void fpga_serial_wait (void);
-static void fpga_serial_print (char c);
-
-void fpga_serial_init (int baudrate)
-{
- int clock_divisor = 115200 / baudrate;
-
- out8 (FPGA (INT, SERIAL_CONFIG), 0x24);
- iobarrier_rw ();
-
- fpga_serial_wait ();
-
- out8 (UART (IER), 0);
- out8 (UART (LCR), LCRVAL | 0x80);
- iobarrier_rw ();
- out8 (UART (DLL), clock_divisor & 0xff);
- out8 (UART (DLM), clock_divisor >> 8);
- iobarrier_rw ();
- out8 (UART (LCR), LCRVAL);
- iobarrier_rw ();
- out8 (UART (MCR), MCRVAL);
- out8 (UART (FCR), FCRVAL);
- iobarrier_rw ();
-}
-
-void fpga_serial_putc (char c)
-{
- if (c) {
- fpga_serial_print (c);
- }
-}
-
-void fpga_serial_puts (const char *s)
-{
- while (*s) {
- fpga_serial_print (*s++);
- }
-}
-
-int fpga_serial_getc (void)
-{
- while ((in8 (UART (LSR)) & 0x01) == 0);
-
- return in8 (UART (RBR));
-}
-
-int fpga_serial_tstc (void)
-{
- return (in8 (UART (LSR)) & 0x01) != 0;
-}
-
-void fpga_serial_setbrg (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- int clock_divisor = 115200 / gd->baudrate;
-
- fpga_serial_wait ();
-
- out8 (UART (LCR), LCRVAL | 0x80);
- iobarrier_rw ();
- out8 (UART (DLL), clock_divisor & 0xff);
- out8 (UART (DLM), clock_divisor >> 8);
- iobarrier_rw ();
- out8 (UART (LCR), LCRVAL);
- iobarrier_rw ();
-}
-
-static void fpga_serial_wait (void)
-{
- while ((in8 (UART (LSR)) & 0x40) == 0);
-}
-
-static void fpga_serial_print (char c)
-{
- if (c == '\n') {
- while ((in8 (UART (LSR)) & 0x20) == 0);
-
- out8 (UART (THR), '\r');
- iobarrier_rw ();
- }
-
- while ((in8 (UART (LSR)) & 0x20) == 0);
-
- out8 (UART (THR), c);
- iobarrier_rw ();
-
- if (c == '\n') {
- fpga_serial_wait ();
- }
-}
diff --git a/board/pcippc2/fpga_serial.h b/board/pcippc2/fpga_serial.h
deleted file mode 100644
index 92c9cdd331..0000000000
--- a/board/pcippc2/fpga_serial.h
+++ /dev/null
@@ -1,34 +0,0 @@
-/*
- * (C) Copyright 2002
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef _FPGA_SERIAL_H_
-#define _FPGA_SERIAL_H_
-
-extern void fpga_serial_init (int);
-extern void fpga_serial_putc (char);
-extern void fpga_serial_puts (const char *);
-extern int fpga_serial_getc (void);
-extern int fpga_serial_tstc (void);
-extern void fpga_serial_setbrg (void);
-
-#endif
diff --git a/board/pcippc2/hardware.h b/board/pcippc2/hardware.h
deleted file mode 100644
index 489929dd0c..0000000000
--- a/board/pcippc2/hardware.h
+++ /dev/null
@@ -1,48 +0,0 @@
-/*
- * (C) Copyright 2002
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef _HARDWARE_H_
-#define _HARDWARE_H_
-
-#include "cpc710.h"
-#include "cpc710_pci.h"
-#include "pcippc2_fpga.h"
-#include "ns16550.h"
-
-#define REG(r, x) (HW_PHYS_##r + HW_##r##_##x)
-
- /* Address map:
- *
- * 0x00000000-0x20000000 SDRAM
- * 0x40000000-0x00008000 Init RAM in the CPU DCache
- * 0xf0000000-0xf8000000 CPCI MEM
- * 0xf8000000-0xfc000000 Local PCI MEM
- * 0xfc000000-0xfe000000 CPCI I/O
- * 0xfe000000-0xff000000 Local PCI I/O
- * 0xff000000-0xff201000 System configuration space
- * 0xff400000-0xff500000 Local PCI bridge space
- * 0xff500000-0xff600000 CPCI bridge space
- * 0xfff00000-0xfff80000 Boot Flash
- */
-
-#endif
diff --git a/board/pcippc2/i2c.c b/board/pcippc2/i2c.c
deleted file mode 100644
index 36b1d0f44d..0000000000
--- a/board/pcippc2/i2c.c
+++ /dev/null
@@ -1,257 +0,0 @@
-/*
- * (C) Copyright 2002
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <config.h>
-#include <common.h>
-#include <asm/io.h>
-
-#include "hardware.h"
-#include "i2c.h"
-
-static void i2c_start (void);
-static void i2c_stop (void);
-static int i2c_write (u8 data);
-static void i2c_read (u8 * data);
-
-static inline void i2c_port_start (void);
-static inline void i2c_clock (unsigned int val);
-static inline void i2c_data (unsigned int val);
-static inline unsigned int
- i2c_in (void);
-static inline void i2c_write_bit (unsigned int val);
-static inline unsigned int
- i2c_read_bit (void);
-
-static inline void i2c_udelay (unsigned int time);
-
-int i2c_read_byte (
- u8 * data,
- u8 dev,
- u8 offset)
-{
- int err = 0;
-
- i2c_start();
-
- err = ! i2c_write(dev);
-
- if (! err)
- {
- err = ! i2c_write(offset);
- }
-
- if (! err)
- {
- i2c_start();
- }
-
- if (! err)
- {
- err = ! i2c_write(dev | 0x01);
- }
-
- if (! err)
- {
- i2c_read(data);
- }
-
- i2c_stop();
-
- return ! err;
-}
-
-static inline void i2c_udelay (
- unsigned int time)
-{
- int v;
-
- asm volatile("mtdec %0" : : "r" (time * ((CFG_BUS_CLK / 4) / 1000000)));
-
- do
- {
- asm volatile("isync; mfdec %0" : "=r" (v));
- } while (v >= 0);
-}
-
- /* Low-level hardware access
- */
-
-#define BIT_GPDATA 0x80000000
-#define BIT_GPCLK 0x40000000
-
-static inline void i2c_port_start (void)
-{
- out32(REG(CPC0, GPDIR), in32(REG(CPC0, GPDIR)) & ~(BIT_GPCLK | BIT_GPDATA));
- out32(REG(CPC0, GPOUT), in32(REG(CPC0, GPOUT)) & ~(BIT_GPCLK | BIT_GPDATA));
- iobarrier_rw();
-
- i2c_udelay(1);
-}
-
-static inline void i2c_clock (
- unsigned int val)
-{
- if (val)
- {
- out32(REG(CPC0, GPDIR), in32(REG(CPC0, GPDIR)) & ~BIT_GPCLK);
- }
- else
- {
- out32(REG(CPC0, GPDIR), in32(REG(CPC0, GPDIR)) | BIT_GPCLK);
- }
-
- iobarrier_rw();
-
- i2c_udelay(1);
-}
-
-static inline void i2c_data (
- unsigned int val)
-{
- if (val)
- {
- out32(REG(CPC0, GPDIR), in32(REG(CPC0, GPDIR)) & ~BIT_GPDATA);
- }
- else
- {
- out32(REG(CPC0, GPDIR), in32(REG(CPC0, GPDIR)) | BIT_GPDATA);
- }
-
- iobarrier_rw();
-
- i2c_udelay(1);
-}
-
-static inline unsigned int i2c_in (void)
-{
- unsigned int val = ((in32(REG(CPC0, GPIN)) & BIT_GPDATA) != 0)?1:0;
-
- iobarrier_rw();
-
- return val;
-}
-
-
- /* Protocol implementation
- */
-
-static inline void i2c_write_bit (
- unsigned int val)
-{
- i2c_data(val);
- i2c_udelay(10);
- i2c_clock(1);
- i2c_udelay(10);
- i2c_clock(0);
- i2c_udelay(10);
-}
-
-static inline unsigned int i2c_read_bit (void)
-{
- unsigned int val;
-
- i2c_data(1);
- i2c_udelay(10);
-
- i2c_clock(1);
- i2c_udelay(10);
-
- val = i2c_in();
-
- i2c_clock(0);
- i2c_udelay(10);
-
- return val;
-}
-
-unsigned int i2c_reset (void)
-{
- unsigned int val;
- int i;
-
- i2c_port_start();
-
- i=0;
- do {
- i2c_udelay(10);
- i2c_clock(0);
- i2c_udelay(10);
- i2c_clock(1);
- i2c_udelay(10);
- val = i2c_in();
- i++;
- } while ((i<9)&&(val==0));
- return (val);
-}
-
-
-static void i2c_start (void)
-{
- i2c_data(1);
- i2c_clock(1);
- i2c_udelay(10);
- i2c_data(0);
- i2c_udelay(10);
- i2c_clock(0);
- i2c_udelay(10);
-}
-
-static void i2c_stop (void)
-{
- i2c_data(0);
- i2c_udelay(10);
- i2c_clock(1);
- i2c_udelay(10);
- i2c_data(1);
- i2c_udelay(10);
-}
-
-static int i2c_write (
- u8 data)
-{
- unsigned int i;
-
- for (i = 0; i < 8; i++)
- {
- i2c_write_bit(data >> 7);
- data <<= 1;
- }
-
- return i2c_read_bit() == 0;
-}
-
-static void i2c_read (
- u8 * data)
-{
- unsigned int i;
- u8 val = 0;
-
- for (i = 0; i < 8; i++)
- {
- val <<= 1;
- val |= i2c_read_bit();
- }
-
- *data = val;
- i2c_write_bit(1); /* NoAck */
-}
diff --git a/board/pcippc2/i2c.h b/board/pcippc2/i2c.h
deleted file mode 100644
index 1224b42899..0000000000
--- a/board/pcippc2/i2c.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/*
- * (C) Copyright 2002
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef _I2C_H_
-#define _I2C_H_
-
-#include <common.h>
-
-extern int i2c_read_byte (u8 * data,
- u8 dev,
- u8 offset);
-
-extern unsigned int i2c_reset (void);
-
-
-#endif
diff --git a/board/pcippc2/ns16550.h b/board/pcippc2/ns16550.h
deleted file mode 100644
index 7023f13a35..0000000000
--- a/board/pcippc2/ns16550.h
+++ /dev/null
@@ -1,41 +0,0 @@
-/*
- * (C) Copyright 2002
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef _NS16550_H_
-#define _NS16550_H_
-
-#define NS16550_RBR 0x00
-#define NS16550_IER 0x01
-#define NS16550_FCR 0x02
-#define NS16550_LCR 0x03
-#define NS16550_MCR 0x04
-#define NS16550_LSR 0x05
-#define NS16550_MSR 0x06
-#define NS16550_SCR 0x07
-
-#define NS16550_THR NS16550_RBR
-#define NS16550_IIR NS16550_FCR
-#define NS16550_DLL NS16550_RBR
-#define NS16550_DLM NS16550_IER
-
-#endif
diff --git a/board/pcippc2/pcippc2.c b/board/pcippc2/pcippc2.c
deleted file mode 100644
index 231b50576b..0000000000
--- a/board/pcippc2/pcippc2.c
+++ /dev/null
@@ -1,245 +0,0 @@
-/*
- * (C) Copyright 2002
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <config.h>
-#include <common.h>
-#include <command.h>
-#include <asm/io.h>
-#include <linux/mtd/doc2000.h>
-#include <watchdog.h>
-#include <pci.h>
-
-#include "hardware.h"
-#include "pcippc2.h"
-#include "sconsole.h"
-#include "fpga_serial.h"
-
-#if defined(CONFIG_WATCHDOG)
-
-static int pcippc2_wdt_init_done = 0;
-
-void pcippc2_wdt_init (void);
-
-#endif
-
- /* Check board identity
- */
-int checkboard (void)
-{
-#ifdef CONFIG_PCIPPC2
- puts ("Board: Gespac PCIPPC-2\n");
-#else
- puts ("Board: Gespac PCIPPC-6\n");
-#endif
- return 0;
-}
-
- /* RAM size is stored in CPC0_RGBAN1
- */
-u32 pcippc2_sdram_size (void)
-{
- return in32 (REG (CPC0, RGBAN1));
-}
-
-long initdram (int board_type)
-{
- return cpc710_ram_init ();
-}
-
-int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- out32 (REG (CPC0, SPOR), 0);
- iobarrier_rw ();
- while (1);
- /* notreached */
- return (-1);
-}
-
-int board_early_init_f (void)
-{
- out32 (REG (CPC0, RSTR), 0xC0000000);
- iobarrier_rw ();
-
- out32 (REG (CPC0, RSTR), 0xF0000000);
- iobarrier_rw ();
-
- out32 (REG (CPC0, UCTL), 0x00F80000);
-
- out32 (REG (CPC0, SIOC0), 0x30000000);
-
- out32 (REG (CPC0, ABCNTL), 0x00000000);
-
- out32 (REG (CPC0, SESR), 0x00000000);
- out32 (REG (CPC0, SEAR), 0x00000000);
-
- /* Detect IBM Avignon CPC710 Revision */
- if ((in32 (REG (CPC0, UCTL)) & 0x000000F0) == CPC710_TYPE_100P)
- out32 (REG (CPC0, PGCHP), 0xA0000040);
- else
- out32 (REG (CPC0, PGCHP), 0x80800040);
-
-
- out32 (REG (CPC0, ATAS), 0x709C2508);
-
- iobarrier_rw ();
-
- return 0;
-}
-
-void after_reloc (ulong dest_addr)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- /* Jump to the main U-Boot board init code
- */
- board_init_r ((gd_t *)gd, dest_addr);
-}
-
-int misc_init_r (void)
-{
- pcippc2_fpga_init ();
-
- pcippc2_cpci3264_init ();
-
-#if defined(CONFIG_WATCHDOG)
- pcippc2_wdt_init ();
-#endif
-
- fpga_serial_init (sconsole_get_baudrate ());
-
- sconsole_putc = fpga_serial_putc;
- sconsole_puts = fpga_serial_puts;
- sconsole_getc = fpga_serial_getc;
- sconsole_tstc = fpga_serial_tstc;
- sconsole_setbrg = fpga_serial_setbrg;
-
- sconsole_flush ();
- return (0);
-}
-
-void pci_init_board (void)
-{
- cpc710_pci_init ();
-
- /* FPGA requires no retry timeouts to be enabled
- */
- cpc710_pci_enable_timeout ();
-}
-
-void doc_init (void)
-{
- doc_probe (pcippc2_fpga1_phys + HW_FPGA1_DOC);
-}
-
-void pcippc2_cpci3264_init (void)
-{
- pci_dev_t bdf = pci_find_device(FPGA_VENDOR_ID, FPGA_DEVICE_ID, 0);
-
- if (bdf == -1)
- {
- puts("Unable to find FPGA !\n");
- hang();
- }
-
- if((in32(pcippc2_fpga0_phys + HW_FPGA0_BOARD) & 0x01000000) == 0x01000000)
- /* 32-bits Compact PCI bus - LSB bit */
- {
- iobarrier_rw();
- out32(BRIDGE(CPCI, PCIDG), 0x40000000); /* 32-bits bridge, Pipeline */
- iobarrier_rw();
- }
-}
-
-#if defined(CONFIG_WATCHDOG)
-
-void pcippc2_wdt_init (void)
-{
- out16r (FPGA (WDT, PROG), 0xffff);
- out8 (FPGA (WDT, CTRL), 0x1);
-
- pcippc2_wdt_init_done = 1;
-}
-
-void pcippc2_wdt_done (void)
-{
- out8 (FPGA (WDT, CTRL), 0x0);
-
- pcippc2_wdt_init_done = 0;
-}
-
-void pcippc2_wdt_reset (void)
-{
- if (pcippc2_wdt_init_done == 1)
- out8 (FPGA (WDT, REFRESH), 0x56);
-}
-
-void watchdog_reset (void)
-{
- int re_enable = disable_interrupts ();
-
- pcippc2_wdt_reset ();
- if (re_enable)
- enable_interrupts ();
-}
-
-#if (CONFIG_COMMANDS & CFG_CMD_BSP)
-int do_wd (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- switch (argc) {
- case 1:
- printf ("Watchdog timer status is %s\n",
- pcippc2_wdt_init_done == 1 ? "on" : "off");
-
- return 0;
- case 2:
- if (!strcmp(argv[1],"on")) {
- pcippc2_wdt_init();
- printf("Watchdog timer now is on\n");
-
- return 0;
-
- } else if (!strcmp(argv[1],"off")) {
- pcippc2_wdt_done();
- printf("Watchdog timer now is off\n");
-
- return 0;
-
- } else
- break;
- default:
- break;
- }
- printf ("Usage:\n%s\n", cmdtp->usage);
- return 1;
-}
-
-U_BOOT_CMD(
- wd, 2, 1, do_wd,
- "wd - check and set watchdog\n",
- "on - switch watchDog on\n"
- "wd off - switch watchdog off\n"
- "wd - print current status\n"
-);
-
-#endif /* CFG_CMD_BSP */
-#endif /* CONFIG_WATCHDOG */
diff --git a/board/pcippc2/pcippc2.h b/board/pcippc2/pcippc2.h
deleted file mode 100644
index 3820bbec61..0000000000
--- a/board/pcippc2/pcippc2.h
+++ /dev/null
@@ -1,51 +0,0 @@
-/*
- * (C) Copyright 2002
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef _PCIPPC2_H_
-#define _PCIPPC2_H_
-
-#include <config.h>
-#include <common.h>
-
-#include "hardware.h"
-
-#define FPGA(r, p) (pcippc2_fpga0_phys + HW_FPGA0_##r##_##p)
-#define UART(r) (pcippc2_fpga0_phys + HW_FPGA0_UART1 + NS16550_##r * 4)
-#define RTC(r) (pcippc2_fpga1_phys + HW_FPGA1_RTC + r)
-
-extern u32 pcippc2_fpga0_phys;
-extern u32 pcippc2_fpga1_phys;
-
-extern u32 pcippc2_sdram_size (void);
-
-extern void pcippc2_fpga_init (void);
-
-extern void pcippc2_cpci3264_init (void);
-
-extern void cpc710_pci_init (void);
-extern void cpc710_pci_enable_timeout (void);
-
-extern unsigned long
- cpc710_ram_init (void);
-
-#endif
diff --git a/board/pcippc2/pcippc2_fpga.c b/board/pcippc2/pcippc2_fpga.c
deleted file mode 100644
index 7f6739ddab..0000000000
--- a/board/pcippc2/pcippc2_fpga.c
+++ /dev/null
@@ -1,87 +0,0 @@
-/*
- * (C) Copyright 2002
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <config.h>
-#include <common.h>
-#include <asm/io.h>
-
-#include "pci.h"
-
-#include "hardware.h"
-#include "pcippc2.h"
-
-u32 pcippc2_fpga0_phys;
-u32 pcippc2_fpga1_phys;
-
-void pcippc2_fpga_init (void)
-{
- pci_dev_t bdf = pci_find_device(FPGA_VENDOR_ID, FPGA_DEVICE_ID, 0);
- unsigned int addr;
- u16 cmd;
-
- if (bdf == -1)
- {
- puts("Unable to find FPGA !\n");
- hang();
- }
-
- pci_read_config_word(bdf, PCI_COMMAND, &cmd);
- if ((cmd & (PCI_COMMAND_MEMORY | PCI_COMMAND_IO)) != (PCI_COMMAND_MEMORY | PCI_COMMAND_IO))
- {
- puts("FPGA is not configured !\n");
- hang();
- }
-
- pci_read_config_dword(bdf, PCI_BASE_ADDRESS_0, &addr);
- if (addr & 0x1)
- {
- /* IO space
- */
- pcippc2_fpga0_phys = pci_io_to_phys(bdf, addr & 0xfffffffc);
- }
- else
- {
- /* Memory space
- */
- pcippc2_fpga0_phys = pci_mem_to_phys(bdf, addr & 0xfffffff0);
- }
-
- pci_read_config_dword(bdf, PCI_BASE_ADDRESS_1, &addr);
- if (addr & 0x1)
- {
- /* IO space
- */
- pcippc2_fpga1_phys = pci_io_to_phys(bdf, addr & 0xfffffffc);
- }
- else
- {
- /* Memory space
- */
- pcippc2_fpga1_phys = pci_mem_to_phys(bdf, addr & 0xfffffff0);
- }
-
- /* Interrupts are not used
- */
- out32(FPGA(INT, INTR_MASK), 0xffffffff);
- iobarrier_rw();
-}
diff --git a/board/pcippc2/pcippc2_fpga.h b/board/pcippc2/pcippc2_fpga.h
deleted file mode 100644
index 850c331973..0000000000
--- a/board/pcippc2/pcippc2_fpga.h
+++ /dev/null
@@ -1,49 +0,0 @@
-/*
- * (C) Copyright 2002
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef _PCIPPC2_FPGA_H_
-#define _PCIPPC2_FPGA_H_
-
-#define FPGA_VENDOR_ID 0x1310
-#define FPGA_DEVICE_ID 0x000d
-
-#define HW_FPGA0_INT 0x0000
-#define HW_FPGA0_BOARD 0x0060
-#define HW_FPGA0_UART1 0x0080
-#define HW_FPGA0_UART2 0x0100
-#define HW_FPGA0_RTC 0x2000
-#define HW_FPGA0_DOC 0x4000
-#define HW_FPGA1_RTC 0x0000
-#define HW_FPGA1_DOC 0x4000
-
-#define HW_FPGA0_INT_INTR_MASK 0x30
-#define HW_FPGA0_INT_INTR_STATUS 0x34
-#define HW_FPGA0_INT_INTR_EOI 0x40
-#define HW_FPGA0_INT_SERIAL_CONFIG 0x5c
-
-#define HW_FPGA0_WDT_CTRL 0x44
-#define HW_FPGA0_WDT_PROG 0x48
-#define HW_FPGA0_WDT_VAL 0x4c
-#define HW_FPGA0_WDT_REFRESH 0x50
-
-#endif
diff --git a/board/pcippc2/sconsole.c b/board/pcippc2/sconsole.c
deleted file mode 100644
index a9f2b29811..0000000000
--- a/board/pcippc2/sconsole.c
+++ /dev/null
@@ -1,141 +0,0 @@
-/*
- * (C) Copyright 2002
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <config.h>
-#include <common.h>
-
-#include "sconsole.h"
-
-void (*sconsole_putc) (char) = 0;
-void (*sconsole_puts) (const char *) = 0;
-int (*sconsole_getc) (void) = 0;
-int (*sconsole_tstc) (void) = 0;
-void (*sconsole_setbrg) (void) = 0;
-
-int serial_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- sconsole_buffer_t *sb = SCONSOLE_BUFFER;
-
- sb->pos = 0;
- sb->size = 0;
- sb->baud = gd->baudrate;
- sb->max_size = CFG_SCONSOLE_SIZE - sizeof (sconsole_buffer_t);
-
- return (0);
-}
-
-void serial_putc (char c)
-{
- if (sconsole_putc) {
- (*sconsole_putc) (c);
- } else {
- sconsole_buffer_t *sb = SCONSOLE_BUFFER;
-
- if (c) {
- sb->data[sb->pos++] = c;
- if (sb->pos == sb->max_size) {
- sb->pos = 0;
- }
- if (sb->size < sb->max_size) {
- sb->size++;
- }
- }
- }
-}
-
-void serial_puts (const char *s)
-{
- if (sconsole_puts) {
- (*sconsole_puts) (s);
- } else {
- sconsole_buffer_t *sb = SCONSOLE_BUFFER;
-
- while (*s) {
- sb->data[sb->pos++] = *s++;
- if (sb->pos == sb->max_size) {
- sb->pos = 0;
- }
- if (sb->size < sb->max_size) {
- sb->size++;
- }
- }
- }
-}
-
-int serial_getc (void)
-{
- if (sconsole_getc) {
- return (*sconsole_getc) ();
- } else {
- return 0;
- }
-}
-
-int serial_tstc (void)
-{
- if (sconsole_tstc) {
- return (*sconsole_tstc) ();
- } else {
- return 0;
- }
-}
-
-void serial_setbrg (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- if (sconsole_setbrg) {
- (*sconsole_setbrg) ();
- } else {
- sconsole_buffer_t *sb = SCONSOLE_BUFFER;
-
- sb->baud = gd->baudrate;
- }
-}
-
-int sconsole_get_baudrate (void)
-{
- sconsole_buffer_t *sb = SCONSOLE_BUFFER;
-
- return sb->baud;
-}
-
-void sconsole_flush (void)
-{
- if (sconsole_putc) {
- sconsole_buffer_t *sb = SCONSOLE_BUFFER;
- unsigned int end = sb->pos < sb->size
- ? sb->pos + sb->max_size - sb->size
- : sb->pos - sb->size;
-
- while (sb->size) {
- (*sconsole_putc) (sb->data[end++]);
- if (end == sb->max_size) {
- end = 0;
- }
- sb->size--;
- }
- }
-}
diff --git a/board/pcippc2/sconsole.h b/board/pcippc2/sconsole.h
deleted file mode 100644
index 40fd75b81b..0000000000
--- a/board/pcippc2/sconsole.h
+++ /dev/null
@@ -1,49 +0,0 @@
-/*
- * (C) Copyright 2002
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef _SCONSOLE_H_
-#define _SCONSOLE_H_
-
-#include <config.h>
-
-typedef struct sconsole_buffer_s
-{
- unsigned long size;
- unsigned long max_size;
- unsigned long pos;
- unsigned long baud;
- char data [1];
-} sconsole_buffer_t;
-
-#define SCONSOLE_BUFFER ((sconsole_buffer_t *) CFG_SCONSOLE_ADDR)
-
-extern void (* sconsole_putc) (char);
-extern void (* sconsole_puts) (const char *);
-extern int (* sconsole_getc) (void);
-extern int (* sconsole_tstc) (void);
-extern void (* sconsole_setbrg) (void);
-
-extern void sconsole_flush (void);
-extern int sconsole_get_baudrate (void);
-
-#endif
diff --git a/board/pcippc2/u-boot.lds b/board/pcippc2/u-boot.lds
deleted file mode 100644
index 5c8cd5a882..0000000000
--- a/board/pcippc2/u-boot.lds
+++ /dev/null
@@ -1,141 +0,0 @@
-/*
- * (C) Copyright 2001
- * Josh Huber <huber@mclx.com>, Mission Critical Linux, Inc.
- *
- * (C) Copyright 2002
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * u-boot.lds - linker script for U-Boot on the Galileo Eval Board.
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/74xx_7xx/start.o (.text)
-
-/* store the environment in a seperate sector in the boot flash */
-/* . = env_offset; */
-/* common/environment.o(.text) */
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/pleb2/Makefile b/board/pleb2/Makefile
deleted file mode 100644
index 95d9170b24..0000000000
--- a/board/pleb2/Makefile
+++ /dev/null
@@ -1,48 +0,0 @@
-
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := pleb2.o flash.o
-SOBJS := lowlevel_init.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS) $(SOBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/pleb2/config.mk b/board/pleb2/config.mk
deleted file mode 100644
index 6958a636a6..0000000000
--- a/board/pleb2/config.mk
+++ /dev/null
@@ -1,3 +0,0 @@
-TEXT_BASE = 0xa1F80000
-#TEXT_BASE = 0xa3080000
-#TEXT_BASE = 0
diff --git a/board/pleb2/flash.c b/board/pleb2/flash.c
deleted file mode 100644
index 97271d921e..0000000000
--- a/board/pleb2/flash.c
+++ /dev/null
@@ -1,814 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-/* environment.h defines the various CFG_ENV_... values in terms
- * of whichever ones are given in the configuration file.
- */
-#include <environment.h>
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/* NOTE - CONFIG_FLASH_16BIT means the CPU interface is 16-bit, it
- * has nothing to do with the flash chip being 8-bit or 16-bit.
- */
-#ifdef CONFIG_FLASH_16BIT
-typedef unsigned short FLASH_PORT_WIDTH;
-typedef volatile unsigned short FLASH_PORT_WIDTHV;
-
-#define FLASH_ID_MASK 0xFFFF
-#else
-typedef unsigned long FLASH_PORT_WIDTH;
-typedef volatile unsigned long FLASH_PORT_WIDTHV;
-
-#define FLASH_ID_MASK 0xFFFFFFFF
-#endif
-
-#define FPW FLASH_PORT_WIDTH
-#define FPWV FLASH_PORT_WIDTHV
-
-#define ORMASK(size) ((-size) & OR_AM_MSK)
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (FPWV * addr, flash_info_t * info);
-static void flash_reset (flash_info_t * info);
-static int write_word_intel (flash_info_t * info, FPWV * dest, FPW data);
-static int write_word_amd (flash_info_t * info, FPWV * dest, FPW data);
-static void flash_get_offsets (ulong base, flash_info_t * info);
-
-#ifdef CFG_FLASH_PROTECTION
-static void flash_sync_real_protect (flash_info_t * info);
-#endif
-
-/*-----------------------------------------------------------------------
- * flash_init()
- *
- * sets up flash_info and returns size of FLASH (bytes)
- */
-unsigned long flash_init (void)
-{
- unsigned long size_b;
- int i;
-
- /* Init: no FLASHes known */
- for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- size_b = flash_get_size ((FPW *) CFG_FLASH_BASE, &flash_info[0]);
-
- flash_info[0].size = size_b;
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx\n",
- size_b);
- }
-
- /* Do this again (was done already in flast_get_size), just
- * in case we move it when remap the FLASH.
- */
- flash_get_offsets (CFG_FLASH_BASE, &flash_info[0]);
-
-#ifdef CFG_FLASH_PROTECTION
- /* read the hardware protection status (if any) into the
- * protection array in flash_info.
- */
- flash_sync_real_protect (&flash_info[0]);
-#endif
-
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
- /* monitor protection ON by default */
- flash_protect (FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE + monitor_flash_len - 1,
- &flash_info[0]);
-#endif
-
-#ifdef CFG_ENV_ADDR
- flash_protect (FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0]);
-#endif
-
-#ifdef CFG_ENV_ADDR_REDUND
- flash_protect (FLAG_PROTECT_SET,
- CFG_ENV_ADDR_REDUND,
- CFG_ENV_ADDR_REDUND + CFG_ENV_SIZE_REDUND - 1,
- &flash_info[0]);
-#endif
-
- return (size_b);
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_reset (flash_info_t * info)
-{
- FPWV *base = (FPWV *) (info->start[0]);
-
- /* Put FLASH back in read mode */
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL)
- *base = (FPW) 0x00FF00FF; /* Intel Read Mode */
- else if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD)
- *base = (FPW) 0x00F000F0; /* AMD Read Mode */
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_get_offsets (ulong base, flash_info_t * info)
-{
- int i;
-
- /* set up sector start address table */
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL
- && (info->flash_id & FLASH_BTYPE)) {
- int bootsect_size; /* number of bytes/boot sector */
- int sect_size; /* number of bytes/regular sector */
-
- bootsect_size = 0x00002000 * (sizeof (FPW) / 2);
- sect_size = 0x00010000 * (sizeof (FPW) / 2);
-
- /* set sector offsets for bottom boot block type */
- for (i = 0; i < 8; ++i) {
- info->start[i] = base + (i * bootsect_size);
- }
- for (i = 8; i < info->sector_count; i++) {
- info->start[i] = base + ((i - 7) * sect_size);
- }
- } else if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD
- && (info->flash_id & FLASH_TYPEMASK) == FLASH_AM640U) {
-
- int sect_size; /* number of bytes/sector */
-
- sect_size = 0x00010000 * (sizeof (FPW) / 2);
-
- /* set up sector start address table (uniform sector type) */
- for (i = 0; i < info->sector_count; i++)
- info->start[i] = base + (i * sect_size);
- } else if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD
- && (info->flash_id & FLASH_TYPEMASK) == FLASH_AM800T) {
-
- int sect_size; /* number of bytes/sector */
-
- sect_size = 0x00010000 * (sizeof (FPW) / 2);
-
- /* set up sector start address table (top boot sector type) */
- for (i = 0; i < info->sector_count - 3; i++)
- info->start[i] = base + (i * sect_size);
- i = info->sector_count - 1;
- info->start[i--] =
- base + (info->size - 0x00004000) * (sizeof (FPW) / 2);
- info->start[i--] =
- base + (info->size - 0x00006000) * (sizeof (FPW) / 2);
- info->start[i--] =
- base + (info->size - 0x00008000) * (sizeof (FPW) / 2);
- }
-}
-
-/*-----------------------------------------------------------------------
- */
-
-void flash_print_info (flash_info_t * info)
-{
- int i;
- uchar *boottype;
- uchar *bootletter;
- uchar *fmt;
- uchar botbootletter[] = "B";
- uchar topbootletter[] = "T";
- uchar botboottype[] = "bottom boot sector";
- uchar topboottype[] = "top boot sector";
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD:
- printf ("AMD ");
- break;
- case FLASH_MAN_BM:
- printf ("BRIGHT MICRO ");
- break;
- case FLASH_MAN_FUJ:
- printf ("FUJITSU ");
- break;
- case FLASH_MAN_SST:
- printf ("SST ");
- break;
- case FLASH_MAN_STM:
- printf ("STM ");
- break;
- case FLASH_MAN_INTEL:
- printf ("INTEL ");
- break;
- default:
- printf ("Unknown Vendor ");
- break;
- }
-
- /* check for top or bottom boot, if it applies */
- if (info->flash_id & FLASH_BTYPE) {
- boottype = botboottype;
- bootletter = botbootletter;
- } else {
- boottype = topboottype;
- bootletter = topbootletter;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM800T:
- fmt = "29LV800B%s (8 Mbit, %s)\n";
- break;
- case FLASH_AM640U:
- fmt = "29LV641D (64 Mbit, uniform sectors)\n";
- break;
- case FLASH_28F800C3B:
- case FLASH_28F800C3T:
- fmt = "28F800C3%s (8 Mbit, %s)\n";
- break;
- case FLASH_INTEL800B:
- case FLASH_INTEL800T:
- fmt = "28F800B3%s (8 Mbit, %s)\n";
- break;
- case FLASH_28F160C3B:
- case FLASH_28F160C3T:
- fmt = "28F160C3%s (16 Mbit, %s)\n";
- break;
- case FLASH_INTEL160B:
- case FLASH_INTEL160T:
- fmt = "28F160B3%s (16 Mbit, %s)\n";
- break;
- case FLASH_28F320C3B:
- case FLASH_28F320C3T:
- fmt = "28F320C3%s (32 Mbit, %s)\n";
- break;
- case FLASH_INTEL320B:
- case FLASH_INTEL320T:
- fmt = "28F320B3%s (32 Mbit, %s)\n";
- break;
- case FLASH_28F640C3B:
- case FLASH_28F640C3T:
- fmt = "28F640C3%s (64 Mbit, %s)\n";
- break;
- case FLASH_INTEL640B:
- case FLASH_INTEL640T:
- fmt = "28F640B3%s (64 Mbit, %s)\n";
- break;
- default:
- fmt = "Unknown Chip Type\n";
- break;
- }
-
- printf (fmt, bootletter, boottype);
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
-
- for (i = 0; i < info->sector_count; ++i) {
- if ((i % 5) == 0) {
- printf ("\n ");
- }
-
- printf (" %08lX%s", info->start[i],
- info->protect[i] ? " (RO)" : " ");
- }
-
- printf ("\n");
-}
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-
-ulong flash_get_size (FPWV * addr, flash_info_t * info)
-{
- /* Write auto select command: read Manufacturer ID */
-
- /* Write auto select command sequence and test FLASH answer */
- addr[0x0555] = (FPW) 0x00AA00AA; /* for AMD, Intel ignores this */
- addr[0x02AA] = (FPW) 0x00550055; /* for AMD, Intel ignores this */
- addr[0x0555] = (FPW) 0x00900090; /* selects Intel or AMD */
-
- /* The manufacturer codes are only 1 byte, so just use 1 byte.
- * This works for any bus width and any FLASH device width.
- */
- switch (addr[0] & 0xff) {
-
- case (uchar) AMD_MANUFACT:
- info->flash_id = FLASH_MAN_AMD;
- break;
-
- case (uchar) INTEL_MANUFACT:
- info->flash_id = FLASH_MAN_INTEL;
- break;
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- break;
- }
-
- /* Check 16 bits or 32 bits of ID so work on 32 or 16 bit bus. */
- if (info->flash_id != FLASH_UNKNOWN)
- switch (addr[1]) {
-
- case (FPW) AMD_ID_LV800T:
- info->flash_id += FLASH_AM800T;
- info->sector_count = 19;
- info->size = 0x00100000 * (sizeof (FPW) / 2);
- break; /* => 1 or 2 MiB */
-
- case (FPW) AMD_ID_LV640U: /* 29LV640 and 29LV641 have same ID */
- info->flash_id += FLASH_AM640U;
- info->sector_count = 128;
- info->size = 0x00800000 * (sizeof (FPW) / 2);
- break; /* => 8 or 16 MB */
-
- case (FPW) INTEL_ID_28F800C3B:
- info->flash_id += FLASH_28F800C3B;
- info->sector_count = 23;
- info->size = 0x00100000 * (sizeof (FPW) / 2);
- break; /* => 1 or 2 MB */
-
- case (FPW) INTEL_ID_28F800B3B:
- info->flash_id += FLASH_INTEL800B;
- info->sector_count = 23;
- info->size = 0x00100000 * (sizeof (FPW) / 2);
- break; /* => 1 or 2 MB */
-
- case (FPW) INTEL_ID_28F160C3B:
- info->flash_id += FLASH_28F160C3B;
- info->sector_count = 39;
- info->size = 0x00200000 * (sizeof (FPW) / 2);
- break; /* => 2 or 4 MB */
-
- case (FPW) INTEL_ID_28F160B3B:
- info->flash_id += FLASH_INTEL160B;
- info->sector_count = 39;
- info->size = 0x00200000 * (sizeof (FPW) / 2);
- break; /* => 2 or 4 MB */
-
- case (FPW) INTEL_ID_28F320C3B:
- info->flash_id += FLASH_28F320C3B;
- info->sector_count = 71;
- info->size = 0x00400000 * (sizeof (FPW) / 2);
- break; /* => 4 or 8 MB */
-
- case (FPW) INTEL_ID_28F320B3B:
- info->flash_id += FLASH_INTEL320B;
- info->sector_count = 71;
- info->size = 0x00400000 * (sizeof (FPW) / 2);
- break; /* => 4 or 8 MB */
-
- case (FPW) INTEL_ID_28F640C3B:
- info->flash_id += FLASH_28F640C3B;
- info->sector_count = 135;
- info->size = 0x00800000 * (sizeof (FPW) / 2);
- break; /* => 8 or 16 MB */
-
- case (FPW) INTEL_ID_28F640B3B:
- info->flash_id += FLASH_INTEL640B;
- info->sector_count = 135;
- info->size = 0x00800000 * (sizeof (FPW) / 2);
- break; /* => 8 or 16 MB */
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- return (0); /* => no or unknown flash */
- }
-
- flash_get_offsets ((ulong) addr, info);
-
- /* Put FLASH back in read mode */
- flash_reset (info);
-
- return (info->size);
-}
-
-#ifdef CFG_FLASH_PROTECTION
-/*-----------------------------------------------------------------------
- */
-
-static void flash_sync_real_protect (flash_info_t * info)
-{
- FPWV *addr = (FPWV *) (info->start[0]);
- FPWV *sect;
- int i;
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_28F800C3B:
- case FLASH_28F800C3T:
- case FLASH_28F160C3B:
- case FLASH_28F160C3T:
- case FLASH_28F320C3B:
- case FLASH_28F320C3T:
- case FLASH_28F640C3B:
- case FLASH_28F640C3T:
- /* check for protected sectors */
- *addr = (FPW) 0x00900090;
- for (i = 0; i < info->sector_count; i++) {
- /* read sector protection at sector address, (A7 .. A0) = 0x02.
- * D0 = 1 for each device if protected.
- * If at least one device is protected the sector is marked
- * protected, but mixed protected and unprotected devices
- * within a sector should never happen.
- */
- sect = (FPWV *) (info->start[i]);
- info->protect[i] =
- (sect[2] & (FPW) (0x00010001)) ? 1 : 0;
- }
-
- /* Put FLASH back in read mode */
- flash_reset (info);
- break;
-
- case FLASH_AM640U:
- case FLASH_AM800T:
- default:
- /* no hardware protect that we support */
- break;
- }
-}
-#endif
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t * info, int s_first, int s_last)
-{
- FPWV *addr;
- int flag, prot, sect;
- int intel = (info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL;
- ulong now, last;
- int rcode = 0;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_INTEL800B:
- case FLASH_INTEL160B:
- case FLASH_INTEL320B:
- case FLASH_INTEL640B:
- case FLASH_28F800C3B:
- case FLASH_28F160C3B:
- case FLASH_28F320C3B:
- case FLASH_28F640C3B:
- case FLASH_AM640U:
- case FLASH_AM800T:
- break;
- case FLASH_UNKNOWN:
- default:
- printf ("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- return 1;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n", prot);
- } else {
- printf ("\n");
- }
-
- reset_timer_masked ();
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect <= s_last && rcode == 0; sect++) {
-
- if (info->protect[sect] != 0) /* protected, skip it */
- continue;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
-
- reset_timer_masked ();
- last = 0;
-
- addr = (FPWV *) (info->start[sect]);
- if (intel) {
- *addr = (FPW) 0x00500050; /* clear status register */
- *addr = (FPW) 0x00200020; /* erase setup */
- *addr = (FPW) 0x00D000D0; /* erase confirm */
- } else {
- /* must be AMD style if not Intel */
- FPWV *base; /* first address in bank */
-
- base = (FPWV *) (info->start[0]);
- base[0x0555] = (FPW) 0x00AA00AA; /* unlock */
- base[0x02AA] = (FPW) 0x00550055; /* unlock */
- base[0x0555] = (FPW) 0x00800080; /* erase mode */
- base[0x0555] = (FPW) 0x00AA00AA; /* unlock */
- base[0x02AA] = (FPW) 0x00550055; /* unlock */
- *addr = (FPW) 0x00300030; /* erase sector */
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts ();
-
- /* wait at least 50us for AMD, 80us for Intel.
- * Let's wait 1 ms.
- */
- udelay (1000);
-
- while ((*addr & (FPW) 0x00800080) != (FPW) 0x00800080) {
- if ((now =
- get_timer_masked ()) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
-
- if (intel) {
- /* suspend erase */
- *addr = (FPW) 0x00B000B0;
- }
-
- flash_reset (info); /* reset to read mode */
- rcode = 1; /* failed */
- break;
- }
-
- /* show that we're waiting */
- if ((now - last) > 1 * CFG_HZ) { /* every second */
- putc ('.');
- last = now;
- }
- }
-
- flash_reset (info); /* reset to read mode */
- }
-
- printf (" done\n");
- return rcode;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- FPW data = 0; /* 16 or 32 bit word, matches flash bus width on MPC8XX */
- int bytes; /* number of bytes to program in current word */
- int left; /* number of bytes left to program */
- int i, res;
-
- for (left = cnt, res = 0;
- left > 0 && res == 0;
- addr += sizeof (data), left -= sizeof (data) - bytes) {
-
- bytes = addr & (sizeof (data) - 1);
- addr &= ~(sizeof (data) - 1);
-
- /* combine source and destination data so can program
- * an entire word of 16 or 32 bits
- */
-#ifdef CFG_LITTLE_ENDIAN
- for (i = 0; i < sizeof (data); i++) {
- data >>= 8;
- if (i < bytes || i - bytes >= left)
- data += (*((uchar *) addr + i)) << 24;
- else
- data += (*src++) << 24;
- }
-#else
- for (i = 0; i < sizeof (data); i++) {
- data <<= 8;
- if (i < bytes || i - bytes >= left)
- data += *((uchar *) addr + i);
- else
- data += *src++;
- }
-#endif
-
- /* write one word to the flash */
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD:
- res = write_word_amd (info, (FPWV *) addr, data);
- break;
- case FLASH_MAN_INTEL:
- res = write_word_intel (info, (FPWV *) addr, data);
- break;
- default:
- /* unknown flash type, error! */
- printf ("missing or unknown FLASH type\n");
- res = 1; /* not really a timeout, but gives error */
- break;
- }
- }
-
- return (res);
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash for AMD FLASH
- * A word is 16 or 32 bits, whichever the bus width of the flash bank
- * (not an individual chip) is.
- *
- * returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word_amd (flash_info_t * info, FPWV * dest, FPW data)
-{
- int flag;
- int res = 0; /* result, assume success */
- FPWV *base; /* first address in flash bank */
-
- /* Check if Flash is (sufficiently) erased */
- if ((*dest & data) != data) {
- return (2);
- }
-
-
- base = (FPWV *) (info->start[0]);
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
-
- base[0x0555] = (FPW) 0x00AA00AA; /* unlock */
- base[0x02AA] = (FPW) 0x00550055; /* unlock */
- base[0x0555] = (FPW) 0x00A000A0; /* selects program mode */
-
- *dest = data; /* start programming the data */
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts ();
-
- reset_timer_masked ();
-
- /* data polling for D7 */
- while (res == 0
- && (*dest & (FPW) 0x00800080) != (data & (FPW) 0x00800080)) {
- if (get_timer_masked () > CFG_FLASH_WRITE_TOUT) {
- *dest = (FPW) 0x00F000F0; /* reset bank */
- res = 1;
- }
- }
-
- return (res);
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash for Intel FLASH
- * A word is 16 or 32 bits, whichever the bus width of the flash bank
- * (not an individual chip) is.
- *
- * returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word_intel (flash_info_t * info, FPWV * dest, FPW data)
-{
- int flag;
- int res = 0; /* result, assume success */
-
- /* Check if Flash is (sufficiently) erased */
- if ((*dest & data) != data) {
- return (2);
- }
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
-
- *dest = (FPW) 0x00500050; /* clear status register */
- *dest = (FPW) 0x00FF00FF; /* make sure in read mode */
- *dest = (FPW) 0x00400040; /* program setup */
-
- *dest = data; /* start programming the data */
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts ();
-
- reset_timer_masked ();
-
- while (res == 0 && (*dest & (FPW) 0x00800080) != (FPW) 0x00800080) {
- if (get_timer_masked () > CFG_FLASH_WRITE_TOUT) {
- *dest = (FPW) 0x00B000B0; /* Suspend program */
- res = 1;
- }
- }
-
- if (res == 0 && (*dest & (FPW) 0x00100010))
- res = 1; /* write failed, time out error is close enough */
-
- *dest = (FPW) 0x00500050; /* clear status register */
- *dest = (FPW) 0x00FF00FF; /* make sure in read mode */
-
- return (res);
-}
-
-#ifdef CFG_FLASH_PROTECTION
-/*-----------------------------------------------------------------------
- */
-int flash_real_protect (flash_info_t * info, long sector, int prot)
-{
- int rcode = 0; /* assume success */
- FPWV *addr; /* address of sector */
- FPW value;
-
- addr = (FPWV *) (info->start[sector]);
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_28F800C3B:
- case FLASH_28F800C3T:
- case FLASH_28F160C3B:
- case FLASH_28F160C3T:
- case FLASH_28F320C3B:
- case FLASH_28F320C3T:
- case FLASH_28F640C3B:
- case FLASH_28F640C3T:
- flash_reset (info); /* make sure in read mode */
- *addr = (FPW) 0x00600060L; /* lock command setup */
- if (prot)
- *addr = (FPW) 0x00010001L; /* lock sector */
- else
- *addr = (FPW) 0x00D000D0L; /* unlock sector */
- flash_reset (info); /* reset to read mode */
-
- /* now see if it really is locked/unlocked as requested */
- *addr = (FPW) 0x00900090;
- /* read sector protection at sector address, (A7 .. A0) = 0x02.
- * D0 = 1 for each device if protected.
- * If at least one device is protected the sector is marked
- * protected, but return failure. Mixed protected and
- * unprotected devices within a sector should never happen.
- */
- value = addr[2] & (FPW) 0x00010001;
- if (value == 0)
- info->protect[sector] = 0;
- else if (value == (FPW) 0x00010001)
- info->protect[sector] = 1;
- else {
- /* error, mixed protected and unprotected */
- rcode = 1;
- info->protect[sector] = 1;
- }
- if (info->protect[sector] != prot)
- rcode = 1; /* failed to protect/unprotect as requested */
-
- /* reload all protection bits from hardware for now */
- flash_sync_real_protect (info);
- break;
-
- case FLASH_AM640U:
- case FLASH_AM800T:
- default:
- /* no hardware protect that we support */
- info->protect[sector] = prot;
- break;
- }
-
- return rcode;
-}
-#endif
diff --git a/board/pleb2/lowlevel_init.S b/board/pleb2/lowlevel_init.S
deleted file mode 100644
index add2c531ab..0000000000
--- a/board/pleb2/lowlevel_init.S
+++ /dev/null
@@ -1,488 +0,0 @@
-/*
- * Most of this taken from Redboot hal_platform_setup.h with cleanup
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <config.h>
-#include <version.h>
-#include <asm/arch/pxa-regs.h>
-
-DRAM_SIZE: .long CFG_DRAM_SIZE
-
-/* wait for coprocessor write complete */
- .macro CPWAIT reg
- mrc p15,0,\reg,c2,c0,0
- mov \reg,\reg
- sub pc,pc,#4
- .endm
-
-.globl lowlevel_init
-lowlevel_init:
-
- mov r10, lr
-
- /* Set up GPIO pins first */
-
- ldr r0, =GPSR0
- ldr r1, =CFG_GPSR0_VAL
- str r1, [r0]
-
- ldr r0, =GPSR1
- ldr r1, =CFG_GPSR1_VAL
- str r1, [r0]
-
- ldr r0, =GPSR2
- ldr r1, =CFG_GPSR2_VAL
- str r1, [r0]
-
- ldr r0, =GPCR0
- ldr r1, =CFG_GPCR0_VAL
- str r1, [r0]
-
- ldr r0, =GPCR1
- ldr r1, =CFG_GPCR1_VAL
- str r1, [r0]
-
- ldr r0, =GPCR2
- ldr r1, =CFG_GPCR2_VAL
- str r1, [r0]
-
- ldr r0, =GRER0
- ldr r1, =CFG_GRER0_VAL
- str r1, [r0]
-
- ldr r0, =GRER1
- ldr r1, =CFG_GRER1_VAL
- str r1, [r0]
-
- ldr r0, =GRER2
- ldr r1, =CFG_GRER2_VAL
- str r1, [r0]
-
- ldr r0, =GFER0
- ldr r1, =CFG_GFER0_VAL
- str r1, [r0]
-
- ldr r0, =GFER1
- ldr r1, =CFG_GFER1_VAL
- str r1, [r0]
-
- ldr r0, =GFER2
- ldr r1, =CFG_GFER2_VAL
- str r1, [r0]
-
- ldr r0, =GPDR0
- ldr r1, =CFG_GPDR0_VAL
- str r1, [r0]
-
- ldr r0, =GPDR1
- ldr r1, =CFG_GPDR1_VAL
- str r1, [r0]
-
- ldr r0, =GPDR2
- ldr r1, =CFG_GPDR2_VAL
- str r1, [r0]
-
- ldr r0, =GAFR0_L
- ldr r1, =CFG_GAFR0_L_VAL
- str r1, [r0]
-
- ldr r0, =GAFR0_U
- ldr r1, =CFG_GAFR0_U_VAL
- str r1, [r0]
-
- ldr r0, =GAFR1_L
- ldr r1, =CFG_GAFR1_L_VAL
- str r1, [r0]
-
- ldr r0, =GAFR1_U
- ldr r1, =CFG_GAFR1_U_VAL
- str r1, [r0]
-
- ldr r0, =GAFR2_L
- ldr r1, =CFG_GAFR2_L_VAL
- str r1, [r0]
-
- ldr r0, =GAFR2_U
- ldr r1, =CFG_GAFR2_U_VAL
- str r1, [r0]
-
- /* enable GPIO pins */
- ldr r0, =PSSR
- ldr r1, =CFG_PSSR_VAL
- str r1, [r0]
-
-
-/*********************************************************************
- Initlialize Memory Controller
-
- See PXA250 Operating System Developer's Guide
-
- pause for 200 uSecs- allow internal clocks to settle
- *Note: only need this if hard reset... doing it anyway for now
-*/
-
- @ Step 1
- @ ---- Wait 200 usec
- ldr r3, =OSCR @ reset the OS Timer Count to zero
- mov r2, #0
- str r2, [r3]
- ldr r4, =0x300 @ really 0x2E1 is about 200usec, so 0x300 should be plenty
-1:
- ldr r2, [r3]
- cmp r4, r2
- bgt 1b
-
-mem_init:
- @ get memory controller base address
- ldr r1, =MEMC_BASE
-
-@****************************************************************************
-@ Step 2
-@
-
- @ Step 2a
- @ write msc0, read back to ensure data latches
- @
- ldr r2, =CFG_MSC0_VAL
- str r2, [r1, #MSC0_OFFSET]
- ldr r2, [r1, #MSC0_OFFSET]
-
- @ write msc1
- ldr r2, =CFG_MSC1_VAL
- str r2, [r1, #MSC1_OFFSET]
- ldr r2, [r1, #MSC1_OFFSET]
-
- @ write msc2
- ldr r2, =CFG_MSC2_VAL
- str r2, [r1, #MSC2_OFFSET]
- ldr r2, [r1, #MSC2_OFFSET]
-
-
-@ Step 2b
- @ write mecr
- ldr r2, =CFG_MECR_VAL
- str r2, [r1, #MECR_OFFSET]
-
- @ write mcmem0
- ldr r2, =CFG_MCMEM0_VAL
- str r2, [r1, #MCMEM0_OFFSET]
-
- @ write mcmem1
- ldr r2, =CFG_MCMEM1_VAL
- str r2, [r1, #MCMEM1_OFFSET]
-
- @ write mcatt0
- ldr r2, =CFG_MCATT0_VAL
- str r2, [r1, #MCATT0_OFFSET]
-
- @ write mcatt1
- ldr r2, =CFG_MCATT1_VAL
- str r2, [r1, #MCATT1_OFFSET]
-
- @ write mcio0
- ldr r2, =CFG_MCIO0_VAL
- str r2, [r1, #MCIO0_OFFSET]
-
- @ write mcio1
- ldr r2, =CFG_MCIO1_VAL
- str r2, [r1, #MCIO1_OFFSET]
-
-@ Step 2c
- @ fly-by-dma is defeatured on this part
- @ write flycnfg
- @ldr r2, =CFG_FLYCNFG_VAL
- @str r2, [r1, #FLYCNFG_OFFSET]
-
-/* FIXME Does this sequence really make sense */
-#ifdef REDBOOT_WAY
- @ Step 2d
- @ get the mdrefr settings
- ldr r3, =CFG_MDREFR_VAL
-
- @ extract DRI field (we need a valid DRI field)
- @
- ldr r2, =0xFFF
-
- @ valid DRI field in r3
- @
- and r3, r3, r2
-
- @ get the reset state of MDREFR
- @
- ldr r4, [r1, #MDREFR_OFFSET]
-
- @ clear the DRI field
- @
- bic r4, r4, r2
-
- @ insert the valid DRI field loaded above
- @
- orr r4, r4, r3
-
- @ write back mdrefr
- @
- str r4, [r1, #MDREFR_OFFSET]
-
- @ *Note: preserve the mdrefr value in r4 *
-
-@****************************************************************************
-@ Step 3
-@
-@ NO SRAM
-
- mov pc, r10
-
-
-@****************************************************************************
-@ Step 4
-@
-
- @ Assumes previous mdrefr value in r4, if not then read current mdrefr
-
- @ clear the free-running clock bits
- @ (clear K0Free, K1Free, K2Free
- @
- bic r4, r4, #(0x00800000 | 0x01000000 | 0x02000000)
-
- @ set K0RUN for CPLD clock
- @
- orr r4, r4, #0x00002000
-
- @ set K1RUN if bank 0 installed
- @
- orr r4, r4, #0x00010000
-
- @ write back mdrefr
- @
- str r4, [r1, #MDREFR_OFFSET]
- ldr r4, [r1, #MDREFR_OFFSET]
-
- @ deassert SLFRSH
- @
- bic r4, r4, #0x00400000
-
- @ write back mdrefr
- @
- str r4, [r1, #MDREFR_OFFSET]
-
- @ assert E1PIN
- @
- orr r4, r4, #0x00008000
-
- @ write back mdrefr
- @
- str r4, [r1, #MDREFR_OFFSET]
- ldr r4, [r1, #MDREFR_OFFSET]
- nop
- nop
-#else
- @ Step 2d
- @ get the mdrefr settings
- ldr r3, =CFG_MDREFR_VAL
-
- @ write back mdrefr
- @
- str r4, [r1, #MDREFR_OFFSET]
-
- @ Step 4
-
- @ set K0RUN for CPLD clock
- @
- orr r4, r4, #0x00002000
-
- @ set K1RUN for bank 0
- @
- orr r4, r4, #0x00010000
-
- @ write back mdrefr
- @
- str r4, [r1, #MDREFR_OFFSET]
- ldr r4, [r1, #MDREFR_OFFSET]
-
- @ deassert SLFRSH
- @
- bic r4, r4, #0x00400000
-
- @ write back mdrefr
- @
- str r4, [r1, #MDREFR_OFFSET]
-
- @ assert E1PIN
- @
- orr r4, r4, #0x00008000
-
- @ write back mdrefr
- @
- str r4, [r1, #MDREFR_OFFSET]
- ldr r4, [r1, #MDREFR_OFFSET]
- nop
- nop
-#endif
-
- @ Step 4d
- @ fetch platform value of mdcnfg
- @
- ldr r2, =CFG_MDCNFG_VAL
-
- @ disable all sdram banks
- @
- bic r2, r2, #(MDCNFG_DE0 | MDCNFG_DE1)
- bic r2, r2, #(MDCNFG_DE2 | MDCNFG_DE3)
-
- @ program banks 0/1 for bus width
- @
- bic r2, r2, #MDCNFG_DWID0 @0=32-bit
-
- @ write initial value of mdcnfg, w/o enabling sdram banks
- @
- str r2, [r1, #MDCNFG_OFFSET]
-
- @ Step 4e
- @ pause for 200 uSecs
- @
- ldr r3, =OSCR @ reset the OS Timer Count to zero
- mov r2, #0
- str r2, [r3]
- ldr r4, =0x300 @ really 0x2E1 is about 200usec, so 0x300 should be plenty
- 1:
- ldr r2, [r3]
- cmp r4, r2
- bgt 1b
-
- /* Why is this here??? */
- mov r0, #0x78 @turn everything off
- mcr p15, 0, r0, c1, c0, 0 @(caches off, MMU off, etc.)
-
- @ Step 4f
- @ Access memory *not yet enabled* for CBR refresh cycles (8)
- @ - CBR is generated for all banks
-
- ldr r2, =CFG_DRAM_BASE
- str r2, [r2]
- str r2, [r2]
- str r2, [r2]
- str r2, [r2]
- str r2, [r2]
- str r2, [r2]
- str r2, [r2]
- str r2, [r2]
-
- @ Step 4g
- @get memory controller base address
- @
- ldr r1, =MEMC_BASE
-
- @fetch current mdcnfg value
- @
- ldr r3, [r1, #MDCNFG_OFFSET]
-
- @enable sdram bank 0 if installed (must do for any populated bank)
- @
- orr r3, r3, #MDCNFG_DE0
-
- @write back mdcnfg, enabling the sdram bank(s)
- @
- str r3, [r1, #MDCNFG_OFFSET]
-
- @ Step 4h
- @ write mdmrs
- @
- ldr r2, =CFG_MDMRS_VAL
- str r2, [r1, #MDMRS_OFFSET]
-
- @ Done Memory Init
-
- /*SET_LED 6 */
-
- @********************************************************************
- @ Disable (mask) all interrupts at the interrupt controller
- @
-
- @ clear the interrupt level register (use IRQ, not FIQ)
- @
- mov r1, #0
- ldr r2, =ICLR
- str r1, [r2]
-
- @ Set interrupt mask register
- @
- ldr r1, =CFG_ICMR_VAL
- ldr r2, =ICMR
- str r1, [r2]
-
- @ ********************************************************************
- @ Disable the peripheral clocks, and set the core clock
- @
-
- @ Turn Off ALL on-chip peripheral clocks for re-configuration
- @
- ldr r1, =CKEN
- mov r2, #0
- str r2, [r1]
-
- @ set core clocks
- @
- ldr r2, =CFG_CCCR_VAL
- ldr r1, =CCCR
- str r2, [r1]
-
- #ifdef ENABLE32KHZ
- @ enable the 32Khz oscillator for RTC and PowerManager
- @
- ldr r1, =OSCC
- mov r2, #OSCC_OON
- str r2, [r1]
-
- @ NOTE: spin here until OSCC.OOK get set,
- @ meaning the PLL has settled.
- @
-60:
- ldr r2, [r1]
- ands r2, r2, #1
- beq 60b
-#endif
-
- @ Turn on needed clocks
- @
- ldr r1, =CKEN
- ldr r2, =CFG_CKEN_VAL
- str r2, [r1]
-
- /*SET_LED 7 */
-
-/* Is this needed???? */
-#define NODEBUG
-#ifdef NODEBUG
- /*Disable software and data breakpoints */
- mov r0,#0
- mcr p15,0,r0,c14,c8,0 /* ibcr0 */
- mcr p15,0,r0,c14,c9,0 /* ibcr1 */
- mcr p15,0,r0,c14,c4,0 /* dbcon */
-
- /*Enable all debug functionality */
- mov r0,#0x80000000
- mcr p14,0,r0,c10,c0,0 /* dcsr */
-
-#endif
-
- mov pc, r10
-
-@ End lowlevel_init
diff --git a/board/pleb2/pleb2.c b/board/pleb2/pleb2.c
deleted file mode 100644
index ce9245cd4e..0000000000
--- a/board/pleb2/pleb2.c
+++ /dev/null
@@ -1,76 +0,0 @@
-/*
- * (C) Copyright 2002
- * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
- *
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm-arm/mach-types.h>
-
-/* ------------------------------------------------------------------------- */
-
-
-/*
- * Miscelaneous platform dependent initialisations
- */
-
-int board_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- /* memory and cpu-speed are setup before relocation */
- /* so we do _nothing_ here */
-
- /* arch number of Lubbock-Board */
- gd->bd->bi_arch_number = MACH_TYPE_PLEB2;
-
- /* adress of boot parameters */
- gd->bd->bi_boot_params = 0xa0000100;
-
- return 0;
-}
-
-int board_late_init(void)
-{
- setenv("stdout", "serial");
- setenv("stderr", "serial");
- return 0;
-}
-
-
-int dram_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
- gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
- gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
- gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
- gd->bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE;
- gd->bd->bi_dram[3].start = PHYS_SDRAM_4;
- gd->bd->bi_dram[3].size = PHYS_SDRAM_4_SIZE;
-
- return 0;
-}
diff --git a/board/pleb2/u-boot.lds b/board/pleb2/u-boot.lds
deleted file mode 100644
index f0102391b3..0000000000
--- a/board/pleb2/u-boot.lds
+++ /dev/null
@@ -1,56 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-ENTRY(_start)
-SECTIONS
-{
- . = 0x00000000;
-
- . = ALIGN(4);
- .text :
- {
- cpu/pxa/start.o (.text)
- *(.text)
- }
-
- . = ALIGN(4);
- .rodata : { *(.rodata) }
-
- . = ALIGN(4);
- .data : { *(.data) }
-
- . = ALIGN(4);
- .got : { *(.got) }
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = ALIGN(4);
- __bss_start = .;
- .bss : { *(.bss) }
- _end = .;
-}
diff --git a/board/pm520/Makefile b/board/pm520/Makefile
deleted file mode 100644
index 8cf0d7de7b..0000000000
--- a/board/pm520/Makefile
+++ /dev/null
@@ -1,47 +0,0 @@
-
-#
-# (C) Copyright 2003-2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := $(BOARD).o flash.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/pm520/config.mk b/board/pm520/config.mk
deleted file mode 100644
index ad689f33be..0000000000
--- a/board/pm520/config.mk
+++ /dev/null
@@ -1,31 +0,0 @@
-#
-# (C) Copyright 2003-2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# PM520 board
-#
-
-TEXT_BASE = 0xfff00000
-# TEXT_BASE = 0x00100000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
diff --git a/board/pm520/flash.c b/board/pm520/flash.c
deleted file mode 100644
index 386822179d..0000000000
--- a/board/pm520/flash.c
+++ /dev/null
@@ -1,655 +0,0 @@
-/*
- * (C) Copyright 2001
- * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
- *
- * (C) Copyright 2001-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <linux/byteorder/swab.h>
-
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/* Board support for 1 or 2 flash devices */
-#define FLASH_PORT_WIDTH32
-#undef FLASH_PORT_WIDTH16
-
-#ifdef FLASH_PORT_WIDTH16
-#define FLASH_PORT_WIDTH ushort
-#define FLASH_PORT_WIDTHV vu_short
-#define SWAP(x) (x)
-#else
-#define FLASH_PORT_WIDTH ulong
-#define FLASH_PORT_WIDTHV vu_long
-#define SWAP(x) (x)
-#endif
-
-/* Intel-compatible flash ID */
-#define INTEL_COMPAT 0x00890089
-#define INTEL_ALT 0x00B000B0
-
-/* Intel-compatible flash commands */
-#define INTEL_PROGRAM 0x00100010
-#define INTEL_ERASE 0x00200020
-#define INTEL_CLEAR 0x00500050
-#define INTEL_LOCKBIT 0x00600060
-#define INTEL_PROTECT 0x00010001
-#define INTEL_STATUS 0x00700070
-#define INTEL_READID 0x00900090
-#define INTEL_CONFIRM 0x00D000D0
-#define INTEL_RESET 0xFFFFFFFF
-
-/* Intel-compatible flash status bits */
-#define INTEL_FINISHED 0x00800080
-#define INTEL_OK 0x00800080
-
-#define FPW FLASH_PORT_WIDTH
-#define FPWV FLASH_PORT_WIDTHV
-
-#define mb() __asm__ __volatile__ ("" : : : "memory")
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (FPW *addr, flash_info_t *info);
-static int write_data (flash_info_t *info, ulong dest, FPW data);
-static void flash_get_offsets (ulong base, flash_info_t *info);
-void inline spin_wheel (void);
-static void flash_sync_real_protect (flash_info_t * info);
-static unsigned char intel_sector_protected (flash_info_t *info, ushort sector);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- int i;
- ulong size = 0;
- extern void flash_preinit(void);
- extern void flash_afterinit(ulong, ulong);
- ulong flashbase = CFG_FLASH_BASE;
-
- flash_preinit();
-
- for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
- switch (i) {
- case 0:
- memset(&flash_info[i], 0, sizeof(flash_info_t));
- flash_get_size ((FPW *) flashbase, &flash_info[i]);
- flash_get_offsets (flash_info[i].start[0], &flash_info[i]);
- break;
- default:
- panic ("configured to many flash banks!\n");
- break;
- }
- size += flash_info[i].size;
-
- /* get the h/w and s/w protection status in sync */
- flash_sync_real_protect(&flash_info[i]);
- }
-
- /* Protect monitor and environment sectors
- */
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
-#ifndef CONFIG_BOOT_ROM
- flash_protect ( FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE + monitor_flash_len - 1,
- &flash_info[0] );
-#endif
-#endif
-
-#ifdef CFG_ENV_IS_IN_FLASH
- flash_protect ( FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0] );
-#endif
-
- flash_afterinit(flash_info[0].start[0], flash_info[0].size);
-
- return size;
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_get_offsets (ulong base, flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- return;
- }
-
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
- for (i = 0; i < info->sector_count; i++) {
- info->start[i] = base + (i * PHYS_FLASH_SECT_SIZE);
- }
- }
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_INTEL:
- printf ("INTEL ");
- break;
- default:
- printf ("Unknown Vendor ");
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_28F128J3A:
- printf ("28F128J3A\n");
- break;
-
- case FLASH_28F640J3A:
- printf ("28F640J3A\n");
- break;
-
- case FLASH_28F320J3A:
- printf ("28F320J3A\n");
- break;
-
- default:
- printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " ");
- }
- printf ("\n");
- return;
-}
-
-/*
- * The following code cannot be run from FLASH!
- */
-static ulong flash_get_size (FPW *addr, flash_info_t *info)
-{
- volatile FPW value;
-
- /* Write auto select command: read Manufacturer ID */
- addr[0x5555] = (FPW) 0x00AA00AA;
- addr[0x2AAA] = (FPW) 0x00550055;
- addr[0x5555] = (FPW) 0x00900090;
-
- mb ();
- udelay(100);
-
- value = addr[0];
-
- switch (value) {
-
- case (FPW) INTEL_MANUFACT:
- info->flash_id = FLASH_MAN_INTEL;
- break;
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
- return (0); /* no or unknown flash */
- }
-
- mb ();
- value = addr[1]; /* device ID */
-
- switch (value) {
-
- case (FPW) INTEL_ID_28F128J3A:
- info->flash_id += FLASH_28F128J3A;
- info->sector_count = 128;
- info->size = 0x02000000;
- info->start[0] = CFG_FLASH_BASE;
- break; /* => 32 MB */
-
- case (FPW) INTEL_ID_28F640J3A:
- info->flash_id += FLASH_28F640J3A;
- info->sector_count = 64;
- info->size = 0x01000000;
- info->start[0] = CFG_FLASH_BASE + 0x01000000;
- break; /* => 16 MB */
-
- case (FPW) INTEL_ID_28F320J3A:
- info->flash_id += FLASH_28F320J3A;
- info->sector_count = 32;
- info->size = 0x800000;
- info->start[0] = CFG_FLASH_BASE + 0x01800000;
- break; /* => 8 MB */
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- break;
- }
-
- if (info->sector_count > CFG_MAX_FLASH_SECT) {
- printf ("** ERROR: sector count %d > max (%d) **\n",
- info->sector_count, CFG_MAX_FLASH_SECT);
- info->sector_count = CFG_MAX_FLASH_SECT;
- }
-
- addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
-
- return (info->size);
-}
-
-
-/*
- * This function gets the u-boot flash sector protection status
- * (flash_info_t.protect[]) in sync with the sector protection
- * status stored in hardware.
- */
-static void flash_sync_real_protect (flash_info_t * info)
-{
- int i;
-
- switch (info->flash_id & FLASH_TYPEMASK) {
-
- case FLASH_28F128J3A:
- case FLASH_28F640J3A:
- case FLASH_28F320J3A:
- for (i = 0; i < info->sector_count; ++i) {
- info->protect[i] = intel_sector_protected(info, i);
- }
- break;
- default:
- /* no h/w protect support */
- break;
- }
-}
-
-
-/*
- * checks if "sector" in bank "info" is protected. Should work on intel
- * strata flash chips 28FxxxJ3x in 8-bit mode.
- * Returns 1 if sector is protected (or timed-out while trying to read
- * protection status), 0 if it is not.
- */
-static unsigned char intel_sector_protected (flash_info_t *info, ushort sector)
-{
- FPWV *addr;
- FPWV *lock_conf_addr;
- ulong start;
- unsigned char ret;
-
- /*
- * first, wait for the WSM to be finished. The rationale for
- * waiting for the WSM to become idle for at most
- * CFG_FLASH_ERASE_TOUT is as follows. The WSM can be busy
- * because of: (1) erase, (2) program or (3) lock bit
- * configuration. So we just wait for the longest timeout of
- * the (1)-(3), i.e. the erase timeout.
- */
-
- /* wait at least 35ns (W12) before issuing Read Status Register */
- udelay(1);
- addr = (FPWV *) info->start[sector];
- *addr = (FPW) INTEL_STATUS;
-
- start = get_timer (0);
- while ((*addr & (FPW) INTEL_FINISHED) != (FPW) INTEL_FINISHED) {
- if (get_timer (start) > CFG_FLASH_ERASE_TOUT) {
- *addr = (FPW) INTEL_RESET; /* restore read mode */
- printf("WSM busy too long, can't get prot status\n");
- return 1;
- }
- }
-
- /* issue the Read Identifier Codes command */
- *addr = (FPW) INTEL_READID;
-
- /* wait at least 35ns (W12) before reading */
- udelay(1);
-
- /* Intel example code uses offset of 2 for 16 bit flash */
- lock_conf_addr = (FPWV *) info->start[sector] + 2;
- ret = (*lock_conf_addr & (FPW) INTEL_PROTECT) ? 1 : 0;
-
- /* put flash back in read mode */
- *addr = (FPW) INTEL_RESET;
-
- return ret;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- int flag, prot, sect;
- ulong type, start, last;
- int rcode = 0;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- type = (info->flash_id & FLASH_VENDMASK);
- if ((type != FLASH_MAN_INTEL)) {
- printf ("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- return 1;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- start = get_timer (0);
- last = start;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- FPWV *addr = (FPWV *) (info->start[sect]);
- FPW status;
-
- printf ("Erasing sector %2d ... ", sect);
-
- /* arm simple, non interrupt dependent timer */
- start = get_timer(0);
-
- *addr = (FPW) 0x00500050; /* clear status register */
- *addr = (FPW) 0x00200020; /* erase setup */
- *addr = (FPW) 0x00D000D0; /* erase confirm */
-
- while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
- if (get_timer(start) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- *addr = (FPW) 0x00B000B0; /* suspend erase */
- *addr = (FPW) 0x00FF00FF; /* reset to read mode */
- rcode = 1;
- break;
- }
- }
-
- *addr = 0x00500050; /* clear status register cmd. */
- *addr = 0x00FF00FF; /* resest to read mode */
-
- printf (" done\n");
- }
- }
- return rcode;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- * 4 - Flash not identified
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp;
- FPW data;
- int count, i, l, rc, port_width;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- return 4;
- }
-/* get lower word aligned address */
-#ifdef FLASH_PORT_WIDTH16
- wp = (addr & ~1);
- port_width = 2;
-#else
- wp = (addr & ~3);
- port_width = 4;
-#endif
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i = 0, cp = wp; i < l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
- for (; i < port_width && cnt > 0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt == 0 && i < port_width; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
-
- if ((rc = write_data (info, wp, SWAP (data))) != 0) {
- return (rc);
- }
- wp += port_width;
- }
-
- /*
- * handle word aligned part
- */
- count = 0;
- while (cnt >= port_width) {
- data = 0;
- for (i = 0; i < port_width; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_data (info, wp, SWAP (data))) != 0) {
- return (rc);
- }
- wp += port_width;
- cnt -= port_width;
- if (count++ > 0x800) {
- spin_wheel ();
- count = 0;
- }
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i < port_width; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
-
- return (write_data (info, wp, SWAP (data)));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word or halfword to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_data (flash_info_t *info, ulong dest, FPW data)
-{
- FPWV *addr = (FPWV *) dest;
- ulong status;
- ulong start;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*addr & data) != data) {
- printf ("not erased at %08lx (%lx)\n", (ulong) addr, *addr);
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
-
- *addr = (FPW) 0x00400040; /* write setup */
- *addr = data;
-
- /* arm simple, non interrupt dependent timer */
- start = get_timer(0);
-
- /* wait while polling the status register */
- while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- *addr = (FPW) 0x00FF00FF; /* restore read mode */
- return (1);
- }
- }
-
- *addr = (FPW) 0x00FF00FF; /* restore read mode */
-
- return (0);
-}
-
-void inline spin_wheel (void)
-{
- static int p = 0;
- static char w[] = "\\/-";
-
- printf ("\010%c", w[p]);
- (++p == 3) ? (p = 0) : 0;
-}
-
-/*-----------------------------------------------------------------------
- * Set/Clear sector's lock bit, returns:
- * 0 - OK
- * 1 - Error (timeout, voltage problems, etc.)
- */
-int flash_real_protect (flash_info_t *info, long sector, int prot)
-{
- ulong start;
- int i;
- int rc = 0;
- vu_long *addr = (vu_long *)(info->start[sector]);
- int flag = disable_interrupts();
-
- *addr = INTEL_CLEAR; /* Clear status register */
- if (prot) { /* Set sector lock bit */
- *addr = INTEL_LOCKBIT; /* Sector lock bit */
- *addr = INTEL_PROTECT; /* set */
- }
- else { /* Clear sector lock bit */
- *addr = INTEL_LOCKBIT; /* All sectors lock bits */
- *addr = INTEL_CONFIRM; /* clear */
- }
-
- start = get_timer(0);
-
- while ((*addr & INTEL_FINISHED) != INTEL_FINISHED) {
- if (get_timer(start) > CFG_FLASH_UNLOCK_TOUT) {
- printf("Flash lock bit operation timed out\n");
- rc = 1;
- break;
- }
- }
-
- if (*addr != INTEL_OK) {
- printf("Flash lock bit operation failed at %08X, CSR=%08X\n",
- (uint)addr, (uint)*addr);
- rc = 1;
- }
-
- if (!rc)
- info->protect[sector] = prot;
-
- /*
- * Clear lock bit command clears all sectors lock bits, so
- * we have to restore lock bits of protected sectors.
- * WARNING: code below re-locks sectors only for one bank (info).
- * This causes problems on boards where several banks share
- * the same chip, as sectors in othere banks will be unlocked
- * but not re-locked. It works fine on pm520 though, as there
- * is only one chip and one bank.
- */
- if (!prot)
- {
- for (i = 0; i < info->sector_count; i++)
- {
- if (info->protect[i])
- {
- start = get_timer(0);
- addr = (vu_long *)(info->start[i]);
- *addr = INTEL_LOCKBIT; /* Sector lock bit */
- *addr = INTEL_PROTECT; /* set */
- while ((*addr & INTEL_FINISHED) != INTEL_FINISHED)
- {
- if (get_timer(start) > CFG_FLASH_UNLOCK_TOUT)
- {
- printf("Flash lock bit operation timed out\n");
- rc = 1;
- break;
- }
- }
- }
- }
- /*
- * get the s/w sector protection status in sync with the h/w,
- * in case something went wrong during the re-locking.
- */
- flash_sync_real_protect(info); /* resets flash to read mode */
- }
-
- if (flag)
- enable_interrupts();
-
- *addr = INTEL_RESET; /* Reset to read array mode */
-
- return rc;
-}
diff --git a/board/pm520/mt46v16m16-75.h b/board/pm520/mt46v16m16-75.h
deleted file mode 100644
index f650faaa10..0000000000
--- a/board/pm520/mt46v16m16-75.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/*
- * (C) Copyright 2004
- * Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#define SDRAM_DDR 1 /* is DDR */
-
-#if defined(CONFIG_MPC5200)
-/* Settings for XLB = 132 MHz */
-#define SDRAM_MODE 0x018D0000
-#define SDRAM_EMODE 0x40090000
-#define SDRAM_CONTROL 0x714f0f00
-#define SDRAM_CONFIG1 0x73722930
-#define SDRAM_CONFIG2 0x47770000
-#define SDRAM_TAPDELAY 0x10000000
-
-#else
-#error CONFIG_MPC5200 not defined
-#endif
diff --git a/board/pm520/mt48lc16m16a2-75.h b/board/pm520/mt48lc16m16a2-75.h
deleted file mode 100644
index ffdf0396a5..0000000000
--- a/board/pm520/mt48lc16m16a2-75.h
+++ /dev/null
@@ -1,43 +0,0 @@
-/*
- * (C) Copyright 2004
- * Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#define SDRAM_DDR 0 /* is SDR */
-
-#if defined(CONFIG_MPC5200)
-/* Settings for XLB = 132 MHz */
-#define SDRAM_MODE 0x00CD0000
-#define SDRAM_CONTROL 0x504F0000
-#define SDRAM_CONFIG1 0xD2322800
-#define SDRAM_CONFIG2 0x8AD70000
-
-#elif defined(CONFIG_MGT5100)
-/* Settings for XLB = 66 MHz */
-#define SDRAM_MODE 0x008D0000
-#define SDRAM_CONTROL 0x504F0000
-#define SDRAM_CONFIG1 0xC2222600
-#define SDRAM_CONFIG2 0x88B70004
-#define SDRAM_ADDRSEL 0x02000000
-
-#else
-#error Neither CONFIG_MPC5200 or CONFIG_MGT5100 defined
-#endif
diff --git a/board/pm520/pm520.c b/board/pm520/pm520.c
deleted file mode 100644
index d4cc5cb561..0000000000
--- a/board/pm520/pm520.c
+++ /dev/null
@@ -1,322 +0,0 @@
-/*
- * (C) Copyright 2003-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2004
- * Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc5xxx.h>
-#include <pci.h>
-
-#if defined(CONFIG_MPC5200_DDR)
-#include "mt46v16m16-75.h"
-#else
-#include "mt48lc16m16a2-75.h"
-#endif
-
-#ifndef CFG_RAMBOOT
-static void sdram_start (int hi_addr)
-{
- long hi_addr_bit = hi_addr ? 0x01000000 : 0;
-
- /* unlock mode register */
- *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000000 | hi_addr_bit;
- __asm__ volatile ("sync");
-
- /* precharge all banks */
- *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000002 | hi_addr_bit;
- __asm__ volatile ("sync");
-
-#if SDRAM_DDR
- /* set mode register: extended mode */
- *(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_EMODE;
- __asm__ volatile ("sync");
-
- /* set mode register: reset DLL */
- *(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_MODE | 0x04000000;
- __asm__ volatile ("sync");
-#endif
-
- /* precharge all banks */
- *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000002 | hi_addr_bit;
- __asm__ volatile ("sync");
-
- /* auto refresh */
- *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000004 | hi_addr_bit;
- __asm__ volatile ("sync");
-
- /* set mode register */
- *(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_MODE;
- __asm__ volatile ("sync");
-
- /* normal operation */
- *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | hi_addr_bit;
- __asm__ volatile ("sync");
-}
-#endif
-
-/*
- * ATTENTION: Although partially referenced initdram does NOT make real use
- * use of CFG_SDRAM_BASE. The code does not work if CFG_SDRAM_BASE
- * is something else than 0x00000000.
- */
-
-#if defined(CONFIG_MPC5200)
-long int initdram (int board_type)
-{
- ulong dramsize = 0;
- ulong dramsize2 = 0;
-#ifndef CFG_RAMBOOT
- ulong test1, test2;
-
- /* setup SDRAM chip selects */
- *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x0000001e;/* 2G at 0x0 */
- *(vu_long *)MPC5XXX_SDRAM_CS1CFG = 0x80000000;/* disabled */
- __asm__ volatile ("sync");
-
- /* setup config registers */
- *(vu_long *)MPC5XXX_SDRAM_CONFIG1 = SDRAM_CONFIG1;
- *(vu_long *)MPC5XXX_SDRAM_CONFIG2 = SDRAM_CONFIG2;
- __asm__ volatile ("sync");
-
-#if SDRAM_DDR
- /* set tap delay */
- *(vu_long *)MPC5XXX_CDM_PORCFG = SDRAM_TAPDELAY;
- __asm__ volatile ("sync");
-#endif
-
- /* find RAM size using SDRAM CS0 only */
- sdram_start(0);
- test1 = get_ram_size((long *)CFG_SDRAM_BASE, 0x80000000);
- sdram_start(1);
- test2 = get_ram_size((long *)CFG_SDRAM_BASE, 0x80000000);
- if (test1 > test2) {
- sdram_start(0);
- dramsize = test1;
- } else {
- dramsize = test2;
- }
-
- /* memory smaller than 1MB is impossible */
- if (dramsize < (1 << 20)) {
- dramsize = 0;
- }
-
- /* set SDRAM CS0 size according to the amount of RAM found */
- if (dramsize > 0) {
- *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x13 + __builtin_ffs(dramsize >> 20) - 1;
- } else {
- *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0; /* disabled */
- }
-
- /* let SDRAM CS1 start right after CS0 */
- *(vu_long *)MPC5XXX_SDRAM_CS1CFG = dramsize + 0x0000001e;/* 2G */
-
- /* find RAM size using SDRAM CS1 only */
- if (!dramsize)
- sdram_start(0);
- test2 = test1 = get_ram_size((long *)(CFG_SDRAM_BASE + dramsize), 0x80000000);
- if (!dramsize) {
- sdram_start(1);
- test2 = get_ram_size((long *)(CFG_SDRAM_BASE + dramsize), 0x80000000);
- }
- if (test1 > test2) {
- sdram_start(0);
- dramsize2 = test1;
- } else {
- dramsize2 = test2;
- }
-
- /* memory smaller than 1MB is impossible */
- if (dramsize2 < (1 << 20)) {
- dramsize2 = 0;
- }
-
- /* set SDRAM CS1 size according to the amount of RAM found */
- if (dramsize2 > 0) {
- *(vu_long *)MPC5XXX_SDRAM_CS1CFG = dramsize
- | (0x13 + __builtin_ffs(dramsize2 >> 20) - 1);
- } else {
- *(vu_long *)MPC5XXX_SDRAM_CS1CFG = dramsize; /* disabled */
- }
-
-#else /* CFG_RAMBOOT */
-
- /* retrieve size of memory connected to SDRAM CS0 */
- dramsize = *(vu_long *)MPC5XXX_SDRAM_CS0CFG & 0xFF;
- if (dramsize >= 0x13) {
- dramsize = (1 << (dramsize - 0x13)) << 20;
- } else {
- dramsize = 0;
- }
-
- /* retrieve size of memory connected to SDRAM CS1 */
- dramsize2 = *(vu_long *)MPC5XXX_SDRAM_CS1CFG & 0xFF;
- if (dramsize2 >= 0x13) {
- dramsize2 = (1 << (dramsize2 - 0x13)) << 20;
- } else {
- dramsize2 = 0;
- }
-
-#endif /* CFG_RAMBOOT */
-
- return dramsize + dramsize2;
-}
-
-#elif defined(CONFIG_MGT5100)
-
-long int initdram (int board_type)
-{
- ulong dramsize = 0;
-#ifndef CFG_RAMBOOT
- ulong test1, test2;
-
- /* setup and enable SDRAM chip selects */
- *(vu_long *)MPC5XXX_SDRAM_START = 0x00000000;
- *(vu_long *)MPC5XXX_SDRAM_STOP = 0x0000ffff;/* 2G */
- *(vu_long *)MPC5XXX_ADDECR |= (1 << 22); /* Enable SDRAM */
- __asm__ volatile ("sync");
-
- /* setup config registers */
- *(vu_long *)MPC5XXX_SDRAM_CONFIG1 = SDRAM_CONFIG1;
- *(vu_long *)MPC5XXX_SDRAM_CONFIG2 = SDRAM_CONFIG2;
-
- /* address select register */
- *(vu_long *)MPC5XXX_SDRAM_XLBSEL = SDRAM_ADDRSEL;
- __asm__ volatile ("sync");
-
- /* find RAM size */
- sdram_start(0);
- test1 = get_ram_size((ulong *)CFG_SDRAM_BASE, 0x80000000);
- sdram_start(1);
- test2 = get_ram_size((ulong *)CFG_SDRAM_BASE, 0x80000000);
- if (test1 > test2) {
- sdram_start(0);
- dramsize = test1;
- } else {
- dramsize = test2;
- }
-
- /* set SDRAM end address according to size */
- *(vu_long *)MPC5XXX_SDRAM_STOP = ((dramsize - 1) >> 15);
-
-#else /* CFG_RAMBOOT */
-
- /* Retrieve amount of SDRAM available */
- dramsize = ((*(vu_long *)MPC5XXX_SDRAM_STOP + 1) << 15);
-
-#endif /* CFG_RAMBOOT */
-
- return dramsize;
-}
-
-#else
-#error Neither CONFIG_MPC5200 or CONFIG_MGT5100 defined
-#endif
-
-int checkboard (void)
-{
-#if defined(CONFIG_MPC5200)
- puts ("Board: MicroSys PM520 \n");
-#elif defined(CONFIG_MGT5100)
- puts ("Board: MicroSys PM510 \n");
-#endif
- return 0;
-}
-
-void flash_preinit(void)
-{
- /*
- * Now, when we are in RAM, enable flash write
- * access for detection process.
- * Note that CS_BOOT cannot be cleared when
- * executing in flash.
- */
-#if defined(CONFIG_MGT5100)
- *(vu_long *)MPC5XXX_ADDECR &= ~(1 << 25); /* disable CS_BOOT */
- *(vu_long *)MPC5XXX_ADDECR |= (1 << 16); /* enable CS0 */
-#endif
- *(vu_long *)MPC5XXX_BOOTCS_CFG &= ~0x1; /* clear RO */
-}
-
-void flash_afterinit(ulong start, ulong size)
-{
-#if defined(CONFIG_BOOT_ROM)
- /* adjust mapping */
- *(vu_long *)MPC5XXX_CS1_START =
- START_REG(start);
- *(vu_long *)MPC5XXX_CS1_STOP =
- STOP_REG(start, size);
-#else
- /* adjust mapping */
- *(vu_long *)MPC5XXX_BOOTCS_START = *(vu_long *)MPC5XXX_CS0_START =
- START_REG(start);
- *(vu_long *)MPC5XXX_BOOTCS_STOP = *(vu_long *)MPC5XXX_CS0_STOP =
- STOP_REG(start, size);
-#endif
-}
-
-
-extern flash_info_t flash_info[]; /* info for FLASH chips */
-
-int misc_init_r (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
- /* adjust flash start */
- gd->bd->bi_flashstart = flash_info[0].start[0];
- return (0);
-}
-
-#ifdef CONFIG_PCI
-static struct pci_controller hose;
-
-extern void pci_mpc5xxx_init(struct pci_controller *);
-
-void pci_init_board(void)
-{
- pci_mpc5xxx_init(&hose);
-}
-#endif
-
-#if defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET)
-
-void init_ide_reset (void)
-{
- debug ("init_ide_reset\n");
-
-}
-
-void ide_set_reset (int idereset)
-{
- debug ("ide_reset(%d)\n", idereset);
-
-}
-#endif /* defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET) */
-
-#if (CONFIG_COMMANDS & CFG_CMD_DOC)
-extern void doc_probe (ulong physadr);
-void doc_init (void)
-{
- doc_probe (CFG_DOC_BASE);
-}
-#endif
diff --git a/board/pm520/u-boot.lds b/board/pm520/u-boot.lds
deleted file mode 100644
index 3cc2968487..0000000000
--- a/board/pm520/u-boot.lds
+++ /dev/null
@@ -1,125 +0,0 @@
-/*
- * (C) Copyright 2003-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc5xxx/start.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/pm826/Makefile b/board/pm826/Makefile
deleted file mode 100644
index 7a2014d466..0000000000
--- a/board/pm826/Makefile
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/pm826/config.mk b/board/pm826/config.mk
deleted file mode 100644
index c93bad98e5..0000000000
--- a/board/pm826/config.mk
+++ /dev/null
@@ -1,37 +0,0 @@
-#
-# (C) Copyright 2001-2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# MicroSys PM826 board:
-#
-
-
-sinclude $(TOPDIR)/board/$(BOARDDIR)/config.tmp
-
-ifndef TEXT_BASE
-## Standard: boot 64-bit flash
-TEXT_BASE = 0xFF000000
-
-endif
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)
diff --git a/board/pm826/flash.c b/board/pm826/flash.c
deleted file mode 100644
index fee07cf353..0000000000
--- a/board/pm826/flash.c
+++ /dev/null
@@ -1,386 +0,0 @@
-/*
- * (C) Copyright 2001, 2002
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * Flash Routines for Intel devices
- *
- *--------------------------------------------------------------------
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
-
-/*-----------------------------------------------------------------------
- */
-ulong flash_get_size (volatile unsigned long *baseaddr,
- flash_info_t * info)
-{
- short i;
- unsigned long flashtest_h, flashtest_l;
-
- info->sector_count = info->size = 0;
- info->flash_id = FLASH_UNKNOWN;
-
- /* Write query command sequence and test FLASH answer
- */
- baseaddr[0] = 0x00980098;
- baseaddr[1] = 0x00980098;
-
- flashtest_h = baseaddr[0]; /* manufacturer ID */
- flashtest_l = baseaddr[1];
-
- if (flashtest_h != INTEL_MANUFACT || flashtest_l != INTEL_MANUFACT)
- return (0); /* no or unknown flash */
-
- flashtest_h = baseaddr[2]; /* device ID */
- flashtest_l = baseaddr[3];
-
- if (flashtest_h != flashtest_l)
- return (0);
-
- switch (flashtest_h) {
- case INTEL_ID_28F160C3B:
- info->flash_id = FLASH_28F160C3B;
- info->sector_count = 39;
- info->size = 0x00800000; /* 4 * 2 MB = 8 MB */
- break;
- case INTEL_ID_28F160F3B:
- info->flash_id = FLASH_28F160F3B;
- info->sector_count = 39;
- info->size = 0x00800000; /* 4 * 2 MB = 8 MB */
- break;
- case INTEL_ID_28F640C3B:
- info->flash_id = FLASH_28F640C3B;
- info->sector_count = 135;
- info->size = 0x02000000; /* 16 * 2 MB = 32 MB */
- break;
- default:
- return (0); /* no or unknown flash */
- }
-
- info->flash_id |= INTEL_MANUFACT << 16; /* set manufacturer offset */
-
- if (info->flash_id & FLASH_BTYPE) {
- volatile unsigned long *tmp = baseaddr;
-
- /* set up sector start adress table (bottom sector type)
- * AND unlock the sectors (if our chip is 160C3 or 640C3)
- */
- for (i = 0; i < info->sector_count; i++) {
- if (((info->flash_id & FLASH_TYPEMASK) == FLASH_28F160C3B) ||
- ((info->flash_id & FLASH_TYPEMASK) == FLASH_28F640C3B)) {
- tmp[0] = 0x00600060;
- tmp[1] = 0x00600060;
- tmp[0] = 0x00D000D0;
- tmp[1] = 0x00D000D0;
- }
- info->start[i] = (uint) tmp;
- tmp += i < 8 ? 0x2000 : 0x10000; /* pointer arith */
- }
- }
-
- memset (info->protect, 0, info->sector_count);
-
- baseaddr[0] = 0x00FF00FF;
- baseaddr[1] = 0x00FF00FF;
-
- return (info->size);
-}
-
-/*-----------------------------------------------------------------------
- */
-unsigned long flash_init (void)
-{
- unsigned long size_b0 = 0;
- int i;
-
- /* Init: no FLASHes known
- */
- for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* Static FLASH Bank configuration here (only one bank) */
-
- size_b0 = flash_get_size ((ulong *) CFG_FLASH0_BASE, &flash_info[0]);
- if (flash_info[0].flash_id == FLASH_UNKNOWN || size_b0 == 0) {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size_b0, size_b0 >> 20);
- }
-
- /* protect monitor and environment sectors
- */
-
-#ifndef CONFIG_BOOT_ROM
- /* If U-Boot is booted from ROM the CFG_MONITOR_BASE > CFG_FLASH0_BASE
- * but we shouldn't protect it.
- */
-
-# if CFG_MONITOR_BASE >= CFG_FLASH0_BASE
- flash_protect (FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE + monitor_flash_len - 1, &flash_info[0]
- );
-# endif
-#endif /* CONFIG_BOOT_ROM */
-
-#if (CFG_ENV_IS_IN_FLASH == 1) && defined(CFG_ENV_ADDR)
-# ifndef CFG_ENV_SIZE
-# define CFG_ENV_SIZE CFG_ENV_SECT_SIZE
-# endif
- flash_protect (FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0]);
-#endif
-
- return (size_b0);
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t * info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch ((info->flash_id >> 16) & 0xff) {
- case 0x89:
- printf ("INTEL ");
- break;
- default:
- printf ("Unknown Vendor ");
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_28F160C3B:
- printf ("28F160C3B (16 M, bottom sector)\n");
- break;
- case FLASH_28F160F3B:
- printf ("28F160F3B (16 M, bottom sector)\n");
- break;
- case FLASH_28F640C3B:
- printf ("28F640C3B (64 M, bottom sector)\n");
- break;
- default:
- printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " "
- );
- }
- printf ("\n");
-}
-
-/*-----------------------------------------------------------------------
- */
-int flash_erase (flash_info_t * info, int s_first, int s_last)
-{
- int flag, prot, sect;
- ulong start, now, last;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect])
- prot++;
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- /* Start erase on unprotected sectors
- */
- for (sect = s_first; sect <= s_last; sect++) {
- volatile ulong *addr =
- (volatile unsigned long *) info->start[sect];
-
- start = get_timer (0);
- last = start;
- if (info->protect[sect] == 0) {
- /* Disable interrupts which might cause a timeout here
- */
- flag = disable_interrupts ();
-
- /* Erase the block
- */
- addr[0] = 0x00200020;
- addr[1] = 0x00200020;
- addr[0] = 0x00D000D0;
- addr[1] = 0x00D000D0;
-
- /* re-enable interrupts if necessary
- */
- if (flag)
- enable_interrupts ();
-
- /* wait at least 80us - let's wait 1 ms
- */
- udelay (1000);
-
- last = start;
- while ((addr[0] & 0x00800080) != 0x00800080 ||
- (addr[1] & 0x00800080) != 0x00800080) {
- if ((now = get_timer (start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout (erase suspended!)\n");
- /* Suspend erase
- */
- addr[0] = 0x00B000B0;
- addr[1] = 0x00B000B0;
- goto DONE;
- }
- /* show that we're waiting
- */
- if ((now - last) > 1000) { /* every second */
- serial_putc ('.');
- last = now;
- }
- }
- if (addr[0] & 0x00220022 || addr[1] & 0x00220022) {
- printf ("*** ERROR: erase failed!\n");
- goto DONE;
- }
- }
- /* Clear status register and reset to read mode
- */
- addr[0] = 0x00500050;
- addr[1] = 0x00500050;
- addr[0] = 0x00FF00FF;
- addr[1] = 0x00FF00FF;
- }
-
- printf (" done\n");
-
-DONE:
- return 0;
-}
-
-static int write_word (flash_info_t *, volatile unsigned long *, ulong);
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- ulong v;
- int i, l, cc = cnt, res = 0;
-
-
- for (v=0; cc > 0; addr += 4, cc -= 4 - l) {
- l = (addr & 3);
- addr &= ~3;
-
- for (i = 0; i < 4; i++) {
- v = (v << 8) + (i < l || i - l >= cc ?
- *((unsigned char *) addr + i) : *src++);
- }
-
- if ((res = write_word (info, (volatile unsigned long *) addr, v)) != 0)
- break;
- }
-
- return (res);
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word (flash_info_t * info, volatile unsigned long *addr,
- ulong data)
-{
- int flag, res = 0;
- ulong start;
-
- /* Check if Flash is (sufficiently) erased
- */
- if ((*addr & data) != data)
- return (2);
-
- /* Disable interrupts which might cause a timeout here
- */
- flag = disable_interrupts ();
-
- *addr = 0x00400040;
- *addr = data;
-
- /* re-enable interrupts if necessary
- */
- if (flag)
- enable_interrupts ();
-
- start = get_timer (0);
- while ((*addr & 0x00800080) != 0x00800080) {
- if (get_timer (start) > CFG_FLASH_WRITE_TOUT) {
- /* Suspend program
- */
- *addr = 0x00B000B0;
- res = 1;
- goto OUT;
- }
- }
-
- if (*addr & 0x00220022) {
- printf ("*** ERROR: program failed!\n");
- res = 1;
- }
-
-OUT:
- /* Clear status register and reset to read mode
- */
- *addr = 0x00500050;
- *addr = 0x00FF00FF;
-
- return (res);
-}
diff --git a/board/pm826/pm826.c b/board/pm826/pm826.c
deleted file mode 100644
index 7514cd77bb..0000000000
--- a/board/pm826/pm826.c
+++ /dev/null
@@ -1,330 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <ioports.h>
-#include <mpc8260.h>
-#include <pci.h>
-
-/*
- * I/O Port configuration table
- *
- * if conf is 1, then that port pin will be configured at boot time
- * according to the five values podr/pdir/ppar/psor/pdat for that entry
- */
-
-const iop_conf_t iop_conf_tab[4][32] = {
-
- /* Port A configuration */
- { /* conf ppar psor pdir podr pdat */
- /* PA31 */ { 1, 1, 1, 0, 0, 0 }, /* FCC1 COL */
- /* PA30 */ { 1, 1, 1, 0, 0, 0 }, /* FCC1 CRS */
- /* PA29 */ { 1, 1, 1, 1, 0, 0 }, /* FCC1 TXER */
- /* PA28 */ { 1, 1, 1, 1, 0, 0 }, /* FCC1 TXEN */
- /* PA27 */ { 1, 1, 1, 0, 0, 0 }, /* FCC1 RXDV */
- /* PA26 */ { 1, 1, 1, 0, 0, 0 }, /* FCC1 RXER */
- /* PA25 */ { 0, 0, 0, 1, 0, 0 }, /* PA25 */
- /* PA24 */ { 0, 0, 0, 1, 0, 0 }, /* PA24 */
- /* PA23 */ { 0, 0, 0, 1, 0, 0 }, /* PA23 */
- /* PA22 */ { 0, 0, 0, 1, 0, 0 }, /* PA22 */
- /* PA21 */ { 1, 1, 0, 1, 0, 0 }, /* FCC1 TXD3 */
- /* PA20 */ { 1, 1, 0, 1, 0, 0 }, /* FCC1 TXD2 */
- /* PA19 */ { 1, 1, 0, 1, 0, 0 }, /* FCC1 TXD1 */
- /* PA18 */ { 1, 1, 0, 1, 0, 0 }, /* FCC1 TXD0 */
- /* PA17 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 RXD0 */
- /* PA16 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 RXD1*/
- /* PA15 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 RXD2 */
- /* PA14 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 RXD3 */
- /* PA13 */ { 0, 0, 0, 1, 0, 0 }, /* PA13 */
- /* PA12 */ { 0, 0, 0, 1, 0, 0 }, /* PA12 */
- /* PA11 */ { 0, 0, 0, 1, 0, 0 }, /* PA11 */
- /* PA10 */ { 0, 0, 0, 1, 0, 0 }, /* PA10 */
- /* PA9 */ { 0, 1, 0, 1, 0, 0 }, /* PA9 */
- /* PA8 */ { 0, 1, 0, 0, 0, 0 }, /* PA8 */
- /* PA7 */ { 0, 0, 0, 1, 0, 0 }, /* PA7 */
- /* PA6 */ { 0, 0, 0, 1, 0, 0 }, /* PA6 */
- /* PA5 */ { 0, 0, 0, 1, 0, 0 }, /* PA5 */
- /* PA4 */ { 0, 0, 0, 1, 0, 0 }, /* PA4 */
- /* PA3 */ { 0, 0, 0, 1, 0, 0 }, /* PA3 */
- /* PA2 */ { 0, 0, 0, 1, 0, 0 }, /* PA2 */
- /* PA1 */ { 0, 0, 0, 1, 0, 0 }, /* PA1 */
- /* PA0 */ { 0, 0, 0, 1, 0, 0 } /* PA0 */
- },
-
- /* Port B configuration */
- { /* conf ppar psor pdir podr pdat */
- /* PB31 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 TX_ER */
- /* PB30 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 RX_DV */
- /* PB29 */ { 1, 1, 1, 1, 0, 0 }, /* FCC2 TX_EN */
-#if defined(CONFIG_ETHER_ON_SCC) && (CONFIG_ETHER_INDEX == 1)
-#ifdef CONFIG_ETHER_ON_FCC2
-#error "SCC1 conflicts with FCC2"
-#endif
- /* PB28 */ { 1, 1, 1, 1, 0, 0 }, /* SCC1 TXD */
-#else
- /* PB28 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 RX_ER */
-#endif
- /* PB27 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 COL */
- /* PB26 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 CRS */
- /* PB25 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 TxD[3] */
- /* PB24 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 TxD[2] */
- /* PB23 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 TxD[1] */
- /* PB22 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 TxD[0] */
- /* PB21 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 RxD[0] */
- /* PB20 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 RxD[1] */
- /* PB19 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 RxD[2] */
- /* PB18 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 RxD[3] */
- /* PB17 */ { 0, 0, 0, 0, 0, 0 }, /* PB17 */
- /* PB16 */ { 0, 0, 0, 0, 0, 0 }, /* PB16 */
- /* PB15 */ { 1, 1, 0, 0, 0, 0 }, /* SCC2 RXD */
- /* PB14 */ { 1, 1, 0, 0, 0, 0 }, /* SCC3 RXD */
- /* PB13 */ { 0, 0, 0, 0, 0, 0 }, /* PB13 */
- /* PB12 */ { 0, 0, 0, 0, 0, 0 }, /* PB12 */
- /* PB11 */ { 0, 0, 0, 0, 0, 0 }, /* PB11 */
- /* PB10 */ { 0, 0, 0, 0, 0, 0 }, /* PB10 */
- /* PB9 */ { 0, 0, 0, 0, 0, 0 }, /* PB9 */
- /* PB8 */ { 1, 1, 1, 1, 0, 0 }, /* SCC3 TXD */
- /* PB7 */ { 0, 0, 0, 0, 0, 0 }, /* PB7 */
- /* PB6 */ { 0, 0, 0, 0, 0, 0 }, /* PB6 */
- /* PB5 */ { 0, 0, 0, 0, 0, 0 }, /* PB5 */
- /* PB4 */ { 0, 0, 0, 0, 0, 0 }, /* PB4 */
- /* PB3 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PB2 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PB1 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PB0 */ { 0, 0, 0, 0, 0, 0 } /* pin doesn't exist */
- },
-
- /* Port C */
- { /* conf ppar psor pdir podr pdat */
- /* PC31 */ { 0, 0, 0, 1, 0, 0 }, /* PC31 */
- /* PC30 */ { 0, 0, 0, 1, 0, 0 }, /* PC30 */
- /* PC29 */ { 0, 1, 1, 0, 0, 0 }, /* SCC1 CTS */
- /* PC28 */ { 0, 0, 0, 1, 0, 0 }, /* SCC2 CTS */
- /* PC27 */ { 0, 0, 0, 1, 0, 0 }, /* PC27 */
- /* PC26 */ { 0, 0, 0, 1, 0, 0 }, /* PC26 */
- /* PC25 */ { 0, 0, 0, 1, 0, 0 }, /* PC25 */
- /* PC24 */ { 0, 0, 0, 1, 0, 0 }, /* PC24 */
- /* PC23 */ { 0, 1, 0, 1, 0, 0 }, /* PC23 */
- /* PC22 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 TXCK */
- /* PC21 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 RXCK */
- /* PC20 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 TXCK(2) */
- /* PC19 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 RXCK */
- /* PC18 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 TXCK */
- /* PC17 */ { 0, 0, 0, 1, 0, 0 }, /* PC17 */
- /* PC16 */ { 0, 0, 0, 1, 0, 0 }, /* PC16 */
- /* PC15 */ { 1, 1, 0, 1, 0, 0 }, /* SMC2 TXD */
- /* PC14 */ { 0, 1, 0, 0, 0, 0 }, /* SCC1 DCD */
- /* PC13 */ { 0, 0, 0, 1, 0, 0 }, /* PC13 */
- /* PC12 */ { 0, 0, 0, 1, 0, 0 }, /* SCC2 DCD */
- /* PC11 */ { 0, 0, 0, 1, 0, 0 }, /* SCC3 CTS */
- /* PC10 */ { 0, 0, 0, 1, 0, 0 }, /* SCC3 DCD */
- /* PC9 */ { 0, 0, 0, 1, 0, 0 }, /* SCC4 CTS */
- /* PC8 */ { 0, 0, 0, 1, 0, 0 }, /* SCC4 DCD */
- /* PC7 */ { 0, 0, 0, 1, 0, 0 }, /* PC7 */
- /* PC6 */ { 0, 0, 0, 1, 0, 0 }, /* PC6 */
- /* PC5 */ { 0, 0, 0, 1, 0, 0 }, /* PC5 */
- /* PC4 */ { 0, 0, 0, 1, 0, 0 }, /* PC4 */
- /* PC3 */ { 0, 0, 0, 1, 0, 0 }, /* PC3 */
- /* PC2 */ { 0, 0, 0, 1, 0, 1 }, /* PC2 */
- /* PC1 */ { 0, 0, 0, 1, 0, 0 }, /* PC1 */
- /* PC0 */ { 0, 0, 0, 1, 0, 0 }, /* PC0 */
- },
-
- /* Port D */
- { /* conf ppar psor pdir podr pdat */
- /* PD31 */ { 1, 1, 0, 0, 0, 0 }, /* SCC1 RXD */
- /* PD30 */ { 0, 1, 1, 1, 0, 0 }, /* PD30 */
- /* PD29 */ { 0, 1, 0, 1, 0, 0 }, /* SCC1 RTS */
- /* PD28 */ { 0, 0, 0, 1, 0, 0 }, /* PD28 */
- /* PD27 */ { 0, 1, 0, 1, 0, 0 }, /* SCC2 RTS */
- /* PD26 */ { 0, 0, 0, 1, 0, 0 }, /* PD26 */
- /* PD25 */ { 0, 0, 0, 1, 0, 0 }, /* PD25 */
- /* PD24 */ { 0, 0, 0, 1, 0, 0 }, /* PD24 */
- /* PD23 */ { 0, 0, 0, 1, 0, 0 }, /* SCC3 RTS */
- /* PD22 */ { 1, 1, 0, 0, 0, 0 }, /* SCC4 RXD */
- /* PD21 */ { 1, 1, 0, 1, 0, 0 }, /* SCC4 TXD */
- /* PD20 */ { 0, 0, 1, 1, 0, 0 }, /* SCC4 RTS */
- /* PD19 */ { 0, 0, 0, 1, 0, 0 }, /* PD19 */
- /* PD18 */ { 0, 0, 0, 1, 0, 0 }, /* PD18 */
- /* PD17 */ { 0, 1, 0, 0, 0, 0 }, /* PD17 */
- /* PD16 */ { 0, 1, 0, 1, 0, 0 }, /* PD16 */
-#if defined(CONFIG_SOFT_I2C)
- /* PD15 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SDA */
- /* PD14 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SCL */
-#else
-#if defined(CONFIG_HARD_I2C)
- /* PD15 */ { 1, 1, 1, 0, 1, 0 }, /* I2C SDA */
- /* PD14 */ { 1, 1, 1, 0, 1, 0 }, /* I2C SCL */
-#else /* normal I/O port pins */
- /* PD15 */ { 0, 1, 1, 0, 1, 0 }, /* I2C SDA */
- /* PD14 */ { 0, 1, 1, 0, 1, 0 }, /* I2C SCL */
-#endif
-#endif
- /* PD13 */ { 0, 0, 0, 0, 0, 0 }, /* PD13 */
- /* PD12 */ { 0, 0, 0, 0, 0, 0 }, /* PD12 */
- /* PD11 */ { 0, 0, 0, 0, 0, 0 }, /* PD11 */
- /* PD10 */ { 0, 0, 0, 0, 0, 0 }, /* PD10 */
- /* PD9 */ { 0, 1, 0, 1, 0, 0 }, /* PD9 */
- /* PD8 */ { 0, 1, 0, 0, 0, 0 }, /* PD8 */
- /* PD7 */ { 0, 0, 0, 1, 0, 1 }, /* PD7 */
- /* PD6 */ { 0, 0, 0, 1, 0, 1 }, /* PD6 */
- /* PD5 */ { 0, 0, 0, 1, 0, 1 }, /* PD5 */
- /* PD4 */ { 1, 1, 1, 0, 0, 0 }, /* SMC2 RXD */
- /* PD3 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PD2 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PD1 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PD0 */ { 0, 0, 0, 0, 0, 0 } /* pin doesn't exist */
- }
-};
-
-/* ------------------------------------------------------------------------- */
-
-/* Check Board Identity:
- */
-int checkboard (void)
-{
- puts ("Board: PM826\n");
- return 0;
-}
-
-/* ------------------------------------------------------------------------- */
-
-
-/* Try SDRAM initialization with P/LSDMR=sdmr and ORx=orx
- *
- * This routine performs standard 8260 initialization sequence
- * and calculates the available memory size. It may be called
- * several times to try different SDRAM configurations on both
- * 60x and local buses.
- */
-static long int try_init (volatile memctl8260_t * memctl, ulong sdmr,
- ulong orx, volatile uchar * base)
-{
- volatile uchar c = 0xff;
- volatile uint *sdmr_ptr;
- volatile uint *orx_ptr;
- ulong maxsize, size;
- int i;
-
- /* We must be able to test a location outsize the maximum legal size
- * to find out THAT we are outside; but this address still has to be
- * mapped by the controller. That means, that the initial mapping has
- * to be (at least) twice as large as the maximum expected size.
- */
- maxsize = (1 + (~orx | 0x7fff)) / 2;
-
- sdmr_ptr = &memctl->memc_psdmr;
- orx_ptr = &memctl->memc_or2;
-
- *orx_ptr = orx;
-
- /*
- * Quote from 8260 UM (10.4.2 SDRAM Power-On Initialization, 10-35):
- *
- * "At system reset, initialization software must set up the
- * programmable parameters in the memory controller banks registers
- * (ORx, BRx, P/LSDMR). After all memory parameters are configured,
- * system software should execute the following initialization sequence
- * for each SDRAM device.
- *
- * 1. Issue a PRECHARGE-ALL-BANKS command
- * 2. Issue eight CBR REFRESH commands
- * 3. Issue a MODE-SET command to initialize the mode register
- *
- * The initial commands are executed by setting P/LSDMR[OP] and
- * accessing the SDRAM with a single-byte transaction."
- *
- * The appropriate BRx/ORx registers have already been set when we
- * get here. The SDRAM can be accessed at the address CFG_SDRAM_BASE.
- */
-
- *sdmr_ptr = sdmr | PSDMR_OP_PREA;
- *base = c;
-
- *sdmr_ptr = sdmr | PSDMR_OP_CBRR;
- for (i = 0; i < 8; i++)
- *base = c;
-
- *sdmr_ptr = sdmr | PSDMR_OP_MRW;
- *(base + CFG_MRS_OFFS) = c; /* setting MR on address lines */
-
- *sdmr_ptr = sdmr | PSDMR_OP_NORM | PSDMR_RFEN;
- *base = c;
-
- size = get_ram_size((long *)base, maxsize);
-
- *orx_ptr = orx | ~(size - 1);
-
- return (size);
-}
-
-
-long int initdram (int board_type)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8260_t *memctl = &immap->im_memctl;
-
-#ifndef CFG_RAMBOOT
- ulong size8, size9;
-#endif
- ulong psize = 32 * 1024 * 1024;
-
- memctl->memc_psrt = CFG_PSRT;
- memctl->memc_mptpr = CFG_MPTPR;
-
-#ifndef CFG_RAMBOOT
- size8 = try_init (memctl, CFG_PSDMR_8COL, CFG_OR2_8COL,
- (uchar *) CFG_SDRAM_BASE);
- size9 = try_init (memctl, CFG_PSDMR_9COL, CFG_OR2_9COL,
- (uchar *) CFG_SDRAM_BASE);
-
- if (size8 < size9) {
- psize = size9;
- printf ("(60x:9COL) ");
- } else {
- psize = try_init (memctl, CFG_PSDMR_8COL, CFG_OR2_8COL,
- (uchar *) CFG_SDRAM_BASE);
- printf ("(60x:8COL) ");
- }
-#endif
- return (psize);
-}
-
-#if (CONFIG_COMMANDS & CFG_CMD_DOC)
-extern void doc_probe (ulong physadr);
-void doc_init (void)
-{
- doc_probe (CFG_DOC_BASE);
-}
-#endif
-
-#ifdef CONFIG_PCI
-struct pci_controller hose;
-
-extern void pci_mpc8250_init(struct pci_controller *);
-
-void pci_init_board(void)
-{
- pci_mpc8250_init(&hose);
-}
-#endif
diff --git a/board/pm826/u-boot.lds b/board/pm826/u-boot.lds
deleted file mode 100644
index 05f29c6ed0..0000000000
--- a/board/pm826/u-boot.lds
+++ /dev/null
@@ -1,126 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc8260/start.o (.text)
- *(.text)
- common/environment.o(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/pm828/Makefile b/board/pm828/Makefile
deleted file mode 100644
index b9ef0c050f..0000000000
--- a/board/pm828/Makefile
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# (C) Copyright 2001-2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/pm828/config.mk b/board/pm828/config.mk
deleted file mode 100644
index e894af775f..0000000000
--- a/board/pm828/config.mk
+++ /dev/null
@@ -1,37 +0,0 @@
-#
-# (C) Copyright 2003-2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# MicroSys PM828 board:
-#
-
-
-sinclude $(TOPDIR)/board/$(BOARDDIR)/config.tmp
-
-ifndef TEXT_BASE
-## Standard: boot 64-bit flash
-TEXT_BASE = 0x40000000
-
-endif
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)
diff --git a/board/pm828/flash.c b/board/pm828/flash.c
deleted file mode 100644
index 1f21b3e9cb..0000000000
--- a/board/pm828/flash.c
+++ /dev/null
@@ -1,386 +0,0 @@
-/*
- * (C) Copyright 2001-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * Flash Routines for Intel devices
- *
- *--------------------------------------------------------------------
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
-
-/*-----------------------------------------------------------------------
- */
-ulong flash_get_size (volatile unsigned long *baseaddr,
- flash_info_t * info)
-{
- short i;
- unsigned long flashtest_h, flashtest_l;
-
- info->sector_count = info->size = 0;
- info->flash_id = FLASH_UNKNOWN;
-
- /* Write query command sequence and test FLASH answer
- */
- baseaddr[0] = 0x00980098;
- baseaddr[1] = 0x00980098;
-
- flashtest_h = baseaddr[0]; /* manufacturer ID */
- flashtest_l = baseaddr[1];
-
- if (flashtest_h != INTEL_MANUFACT || flashtest_l != INTEL_MANUFACT)
- return (0); /* no or unknown flash */
-
- flashtest_h = baseaddr[2]; /* device ID */
- flashtest_l = baseaddr[3];
-
- if (flashtest_h != flashtest_l)
- return (0);
-
- switch (flashtest_h) {
- case INTEL_ID_28F160C3B:
- info->flash_id = FLASH_28F160C3B;
- info->sector_count = 39;
- info->size = 0x00800000; /* 4 * 2 MB = 8 MB */
- break;
- case INTEL_ID_28F160F3B:
- info->flash_id = FLASH_28F160F3B;
- info->sector_count = 39;
- info->size = 0x00800000; /* 4 * 2 MB = 8 MB */
- break;
- case INTEL_ID_28F640C3B:
- info->flash_id = FLASH_28F640C3B;
- info->sector_count = 135;
- info->size = 0x02000000; /* 16 * 2 MB = 32 MB */
- break;
- default:
- return (0); /* no or unknown flash */
- }
-
- info->flash_id |= INTEL_MANUFACT << 16; /* set manufacturer offset */
-
- if (info->flash_id & FLASH_BTYPE) {
- volatile unsigned long *tmp = baseaddr;
-
- /* set up sector start adress table (bottom sector type)
- * AND unlock the sectors (if our chip is 160C3 or 640c3)
- */
- for (i = 0; i < info->sector_count; i++) {
- if (((info->flash_id & FLASH_TYPEMASK) == FLASH_28F160C3B) ||
- ((info->flash_id & FLASH_TYPEMASK) == FLASH_28F640C3B)) {
- tmp[0] = 0x00600060;
- tmp[1] = 0x00600060;
- tmp[0] = 0x00D000D0;
- tmp[1] = 0x00D000D0;
- }
- info->start[i] = (uint) tmp;
- tmp += i < 8 ? 0x2000 : 0x10000; /* pointer arith */
- }
- }
-
- memset (info->protect, 0, info->sector_count);
-
- baseaddr[0] = 0x00FF00FF;
- baseaddr[1] = 0x00FF00FF;
-
- return (info->size);
-}
-
-/*-----------------------------------------------------------------------
- */
-unsigned long flash_init (void)
-{
- unsigned long size_b0 = 0;
- int i;
-
- /* Init: no FLASHes known
- */
- for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* Static FLASH Bank configuration here (only one bank) */
-
- size_b0 = flash_get_size ((ulong *) CFG_FLASH0_BASE, &flash_info[0]);
- if (flash_info[0].flash_id == FLASH_UNKNOWN || size_b0 == 0) {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size_b0, size_b0 >> 20);
- }
-
- /* protect monitor and environment sectors
- */
-
-#ifndef CONFIG_BOOT_ROM
- /* If U-Boot is booted from ROM the CFG_MONITOR_BASE > CFG_FLASH0_BASE
- * but we shouldn't protect it.
- */
-
-# if CFG_MONITOR_BASE >= CFG_FLASH0_BASE
- flash_protect (FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE + monitor_flash_len - 1, &flash_info[0]
- );
-# endif
-#endif /* CONFIG_BOOT_ROM */
-
-#if (CFG_ENV_IS_IN_FLASH == 1) && defined(CFG_ENV_ADDR)
-# ifndef CFG_ENV_SIZE
-# define CFG_ENV_SIZE CFG_ENV_SECT_SIZE
-# endif
- flash_protect (FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0]);
-#endif
-
- return (size_b0);
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t * info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch ((info->flash_id >> 16) & 0xff) {
- case 0x89:
- printf ("INTEL ");
- break;
- default:
- printf ("Unknown Vendor ");
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_28F160C3B:
- printf ("28F160C3B (16 M, bottom sector)\n");
- break;
- case FLASH_28F160F3B:
- printf ("28F160F3B (16 M, bottom sector)\n");
- break;
- case FLASH_28F640C3B:
- printf ("28F640C3B (64 M, bottom sector)\n");
- break;
- default:
- printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " "
- );
- }
- printf ("\n");
-}
-
-/*-----------------------------------------------------------------------
- */
-int flash_erase (flash_info_t * info, int s_first, int s_last)
-{
- int flag, prot, sect;
- ulong start, now, last;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect])
- prot++;
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- /* Start erase on unprotected sectors
- */
- for (sect = s_first; sect <= s_last; sect++) {
- volatile ulong *addr =
- (volatile unsigned long *) info->start[sect];
-
- start = get_timer (0);
- last = start;
- if (info->protect[sect] == 0) {
- /* Disable interrupts which might cause a timeout here
- */
- flag = disable_interrupts ();
-
- /* Erase the block
- */
- addr[0] = 0x00200020;
- addr[1] = 0x00200020;
- addr[0] = 0x00D000D0;
- addr[1] = 0x00D000D0;
-
- /* re-enable interrupts if necessary
- */
- if (flag)
- enable_interrupts ();
-
- /* wait at least 80us - let's wait 1 ms
- */
- udelay (1000);
-
- last = start;
- while ((addr[0] & 0x00800080) != 0x00800080 ||
- (addr[1] & 0x00800080) != 0x00800080) {
- if ((now = get_timer (start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout (erase suspended!)\n");
- /* Suspend erase
- */
- addr[0] = 0x00B000B0;
- addr[1] = 0x00B000B0;
- goto DONE;
- }
- /* show that we're waiting
- */
- if ((now - last) > 1000) { /* every second */
- serial_putc ('.');
- last = now;
- }
- }
- if (addr[0] & 0x00220022 || addr[1] & 0x00220022) {
- printf ("*** ERROR: erase failed!\n");
- goto DONE;
- }
- }
- /* Clear status register and reset to read mode
- */
- addr[0] = 0x00500050;
- addr[1] = 0x00500050;
- addr[0] = 0x00FF00FF;
- addr[1] = 0x00FF00FF;
- }
-
- printf (" done\n");
-
-DONE:
- return 0;
-}
-
-static int write_word (flash_info_t *, volatile unsigned long *, ulong);
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- ulong v;
- int i, l, cc = cnt, res = 0;
-
-
- for (v=0; cc > 0; addr += 4, cc -= 4 - l) {
- l = (addr & 3);
- addr &= ~3;
-
- for (i = 0; i < 4; i++) {
- v = (v << 8) + (i < l || i - l >= cc ?
- *((unsigned char *) addr + i) : *src++);
- }
-
- if ((res = write_word (info, (volatile unsigned long *) addr, v)) != 0)
- break;
- }
-
- return (res);
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word (flash_info_t * info, volatile unsigned long *addr,
- ulong data)
-{
- int flag, res = 0;
- ulong start;
-
- /* Check if Flash is (sufficiently) erased
- */
- if ((*addr & data) != data)
- return (2);
-
- /* Disable interrupts which might cause a timeout here
- */
- flag = disable_interrupts ();
-
- *addr = 0x00400040;
- *addr = data;
-
- /* re-enable interrupts if necessary
- */
- if (flag)
- enable_interrupts ();
-
- start = get_timer (0);
- while ((*addr & 0x00800080) != 0x00800080) {
- if (get_timer (start) > CFG_FLASH_WRITE_TOUT) {
- /* Suspend program
- */
- *addr = 0x00B000B0;
- res = 1;
- goto OUT;
- }
- }
-
- if (*addr & 0x00220022) {
- printf ("*** ERROR: program failed!\n");
- res = 1;
- }
-
-OUT:
- /* Clear status register and reset to read mode
- */
- *addr = 0x00500050;
- *addr = 0x00FF00FF;
-
- return (res);
-}
diff --git a/board/pm828/pm828.c b/board/pm828/pm828.c
deleted file mode 100644
index 31932742a8..0000000000
--- a/board/pm828/pm828.c
+++ /dev/null
@@ -1,363 +0,0 @@
-/*
- * (C) Copyright 2001-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <ioports.h>
-#include <mpc8260.h>
-#include <pci.h>
-
-/*
- * I/O Port configuration table
- *
- * if conf is 1, then that port pin will be configured at boot time
- * according to the five values podr/pdir/ppar/psor/pdat for that entry
- */
-
-const iop_conf_t iop_conf_tab[4][32] = {
-
- /* Port A configuration */
- { /* conf ppar psor pdir podr pdat */
- /* PA31 */ { 1, 1, 1, 0, 0, 0 }, /* FCC1 COL */
- /* PA30 */ { 1, 1, 1, 0, 0, 0 }, /* FCC1 CRS */
- /* PA29 */ { 1, 1, 1, 1, 0, 0 }, /* FCC1 TXER */
- /* PA28 */ { 1, 1, 1, 1, 0, 0 }, /* FCC1 TXEN */
- /* PA27 */ { 1, 1, 1, 0, 0, 0 }, /* FCC1 RXDV */
- /* PA26 */ { 1, 1, 1, 0, 0, 0 }, /* FCC1 RXER */
- /* PA25 */ { 0, 0, 0, 1, 0, 0 }, /* PA25 */
- /* PA24 */ { 0, 0, 0, 1, 0, 0 }, /* PA24 */
- /* PA23 */ { 0, 0, 0, 1, 0, 0 }, /* PA23 */
- /* PA22 */ { 0, 0, 0, 1, 0, 0 }, /* PA22 */
- /* PA21 */ { 1, 1, 0, 1, 0, 0 }, /* FCC1 TXD3 */
- /* PA20 */ { 1, 1, 0, 1, 0, 0 }, /* FCC1 TXD2 */
- /* PA19 */ { 1, 1, 0, 1, 0, 0 }, /* FCC1 TXD1 */
- /* PA18 */ { 1, 1, 0, 1, 0, 0 }, /* FCC1 TXD0 */
- /* PA17 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 RXD0 */
- /* PA16 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 RXD1*/
- /* PA15 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 RXD2 */
- /* PA14 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 RXD3 */
- /* PA13 */ { 0, 0, 0, 1, 0, 0 }, /* PA13 */
- /* PA12 */ { 0, 0, 0, 1, 0, 0 }, /* PA12 */
- /* PA11 */ { 0, 0, 0, 1, 0, 0 }, /* PA11 */
- /* PA10 */ { 0, 0, 0, 1, 0, 0 }, /* PA10 */
- /* PA9 */ { 0, 1, 0, 1, 0, 0 }, /* PA9 */
- /* PA8 */ { 0, 1, 0, 0, 0, 0 }, /* PA8 */
- /* PA7 */ { 0, 0, 0, 1, 0, 0 }, /* PA7 */
- /* PA6 */ { 0, 0, 0, 1, 0, 0 }, /* PA6 */
- /* PA5 */ { 0, 0, 0, 1, 0, 0 }, /* PA5 */
- /* PA4 */ { 0, 0, 0, 1, 0, 0 }, /* PA4 */
- /* PA3 */ { 0, 0, 0, 1, 0, 0 }, /* PA3 */
- /* PA2 */ { 0, 0, 0, 1, 0, 0 }, /* PA2 */
- /* PA1 */ { 0, 0, 0, 1, 0, 0 }, /* PA1 */
- /* PA0 */ { 0, 0, 0, 1, 0, 0 } /* PA0 */
- },
-
- /* Port B configuration */
- { /* conf ppar psor pdir podr pdat */
- /* PB31 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 TX_ER */
- /* PB30 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 RX_DV */
- /* PB29 */ { 1, 1, 1, 1, 0, 0 }, /* FCC2 TX_EN */
-#if defined(CONFIG_ETHER_ON_SCC) && (CONFIG_ETHER_INDEX == 1)
-#ifdef CONFIG_ETHER_ON_FCC2
-#error "SCC1 conflicts with FCC2"
-#endif
- /* PB28 */ { 1, 1, 1, 1, 0, 0 }, /* SCC1 TXD */
-#else
- /* PB28 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 RX_ER */
-#endif
- /* PB27 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 COL */
- /* PB26 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 CRS */
- /* PB25 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 TxD[3] */
- /* PB24 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 TxD[2] */
- /* PB23 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 TxD[1] */
- /* PB22 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 TxD[0] */
- /* PB21 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 RxD[0] */
- /* PB20 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 RxD[1] */
- /* PB19 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 RxD[2] */
- /* PB18 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 RxD[3] */
- /* PB17 */ { 0, 0, 0, 0, 0, 0 }, /* PB17 */
- /* PB16 */ { 0, 0, 0, 0, 0, 0 }, /* PB16 */
- /* PB15 */ { 1, 1, 0, 0, 0, 0 }, /* SCC2 RXD */
- /* PB14 */ { 1, 1, 0, 0, 0, 0 }, /* SCC3 RXD */
- /* PB13 */ { 0, 0, 0, 0, 0, 0 }, /* PB13 */
- /* PB12 */ { 0, 0, 0, 0, 0, 0 }, /* PB12 */
- /* PB11 */ { 0, 0, 0, 0, 0, 0 }, /* PB11 */
- /* PB10 */ { 0, 0, 0, 0, 0, 0 }, /* PB10 */
- /* PB9 */ { 0, 0, 0, 0, 0, 0 }, /* PB9 */
- /* PB8 */ { 1, 1, 1, 1, 0, 0 }, /* SCC3 TXD */
- /* PB7 */ { 0, 0, 0, 0, 0, 0 }, /* PB7 */
- /* PB6 */ { 0, 0, 0, 0, 0, 0 }, /* PB6 */
- /* PB5 */ { 0, 0, 0, 0, 0, 0 }, /* PB5 */
- /* PB4 */ { 0, 0, 0, 0, 0, 0 }, /* PB4 */
- /* PB3 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PB2 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PB1 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PB0 */ { 0, 0, 0, 0, 0, 0 } /* pin doesn't exist */
- },
-
- /* Port C */
- { /* conf ppar psor pdir podr pdat */
- /* PC31 */ { 0, 0, 0, 1, 0, 0 }, /* PC31 */
- /* PC30 */ { 0, 0, 0, 1, 0, 0 }, /* PC30 */
- /* PC29 */ { 0, 1, 1, 0, 0, 0 }, /* SCC1 CTS */
- /* PC28 */ { 0, 0, 0, 1, 0, 0 }, /* SCC2 CTS */
- /* PC27 */ { 0, 0, 0, 1, 0, 0 }, /* PC27 */
- /* PC26 */ { 0, 0, 0, 1, 0, 0 }, /* PC26 */
- /* PC25 */ { 0, 0, 0, 1, 0, 0 }, /* PC25 */
- /* PC24 */ { 0, 0, 0, 1, 0, 0 }, /* PC24 */
- /* PC23 */ { 0, 1, 0, 1, 0, 0 }, /* PC23 */
- /* PC22 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 TXCK */
- /* PC21 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 RXCK */
- /* PC20 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 TXCK(2) */
- /* PC19 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 RXCK */
- /* PC18 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 TXCK */
- /* PC17 */ { 0, 0, 0, 1, 0, 0 }, /* PC17 */
- /* PC16 */ { 0, 0, 0, 1, 0, 0 }, /* PC16 */
- /* PC15 */ { 1, 1, 0, 1, 0, 0 }, /* SMC2 TXD */
- /* PC14 */ { 0, 1, 0, 0, 0, 0 }, /* SCC1 DCD */
- /* PC13 */ { 0, 0, 0, 1, 0, 0 }, /* PC13 */
- /* PC12 */ { 0, 0, 0, 1, 0, 0 }, /* SCC2 DCD */
- /* PC11 */ { 0, 0, 0, 1, 0, 0 }, /* SCC3 CTS */
- /* PC10 */ { 0, 0, 0, 1, 0, 0 }, /* SCC3 DCD */
- /* PC9 */ { 0, 0, 0, 1, 0, 0 }, /* SCC4 CTS */
- /* PC8 */ { 0, 0, 0, 1, 0, 0 }, /* SCC4 DCD */
- /* PC7 */ { 0, 0, 0, 1, 0, 0 }, /* PC7 */
- /* PC6 */ { 0, 0, 0, 1, 0, 0 }, /* PC6 */
- /* PC5 */ { 0, 0, 0, 1, 0, 0 }, /* PC5 */
- /* PC4 */ { 0, 0, 0, 1, 0, 0 }, /* PC4 */
- /* PC3 */ { 0, 0, 0, 1, 0, 0 }, /* PC3 */
- /* PC2 */ { 0, 0, 0, 1, 0, 1 }, /* PC2 */
- /* PC1 */ { 0, 0, 0, 1, 0, 0 }, /* PC1 */
- /* PC0 */ { 0, 0, 0, 1, 0, 0 }, /* PC0 */
- },
-
- /* Port D */
- { /* conf ppar psor pdir podr pdat */
- /* PD31 */ { 1, 1, 0, 0, 0, 0 }, /* SCC1 RXD */
- /* PD30 */ { 0, 1, 1, 1, 0, 0 }, /* PD30 */
- /* PD29 */ { 0, 1, 0, 1, 0, 0 }, /* SCC1 RTS */
- /* PD28 */ { 0, 0, 0, 1, 0, 0 }, /* PD28 */
- /* PD27 */ { 0, 1, 0, 1, 0, 0 }, /* SCC2 RTS */
- /* PD26 */ { 0, 0, 0, 1, 0, 0 }, /* PD26 */
- /* PD25 */ { 0, 0, 0, 1, 0, 0 }, /* PD25 */
- /* PD24 */ { 0, 0, 0, 1, 0, 0 }, /* PD24 */
- /* PD23 */ { 0, 0, 0, 1, 0, 0 }, /* SCC3 RTS */
- /* PD22 */ { 1, 1, 0, 0, 0, 0 }, /* SCC4 RXD */
- /* PD21 */ { 1, 1, 0, 1, 0, 0 }, /* SCC4 TXD */
- /* PD20 */ { 0, 0, 1, 1, 0, 0 }, /* SCC4 RTS */
- /* PD19 */ { 0, 0, 0, 1, 0, 0 }, /* PD19 */
- /* PD18 */ { 0, 0, 0, 1, 0, 0 }, /* PD18 */
- /* PD17 */ { 0, 1, 0, 0, 0, 0 }, /* PD17 */
- /* PD16 */ { 0, 1, 0, 1, 0, 0 }, /* PD16 */
-#if defined(CONFIG_SOFT_I2C)
- /* PD15 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SDA */
- /* PD14 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SCL */
-#else
-#if defined(CONFIG_HARD_I2C)
- /* PD15 */ { 1, 1, 1, 0, 1, 0 }, /* I2C SDA */
- /* PD14 */ { 1, 1, 1, 0, 1, 0 }, /* I2C SCL */
-#else /* normal I/O port pins */
- /* PD15 */ { 0, 1, 1, 0, 1, 0 }, /* I2C SDA */
- /* PD14 */ { 0, 1, 1, 0, 1, 0 }, /* I2C SCL */
-#endif
-#endif
- /* PD13 */ { 0, 0, 0, 0, 0, 0 }, /* PD13 */
- /* PD12 */ { 0, 0, 0, 0, 0, 0 }, /* PD12 */
- /* PD11 */ { 0, 0, 0, 0, 0, 0 }, /* PD11 */
- /* PD10 */ { 0, 0, 0, 0, 0, 0 }, /* PD10 */
- /* PD9 */ { 0, 1, 0, 1, 0, 0 }, /* PD9 */
- /* PD8 */ { 0, 1, 0, 0, 0, 0 }, /* PD8 */
- /* PD7 */ { 0, 0, 0, 1, 0, 1 }, /* PD7 */
- /* PD6 */ { 0, 0, 0, 1, 0, 1 }, /* PD6 */
- /* PD5 */ { 0, 0, 0, 1, 0, 1 }, /* PD5 */
- /* PD4 */ { 1, 1, 1, 0, 0, 0 }, /* SMC2 RXD */
- /* PD3 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PD2 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PD1 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PD0 */ { 0, 0, 0, 0, 0, 0 } /* pin doesn't exist */
- }
-};
-
-/* ------------------------------------------------------------------------- */
-
-/* Check Board Identity:
- */
-int checkboard (void)
-{
- puts ("Board: PM828\n");
- return 0;
-}
-
-/* ------------------------------------------------------------------------- */
-
-
-/* Try SDRAM initialization with P/LSDMR=sdmr and ORx=orx
- *
- * This routine performs standard 8260 initialization sequence
- * and calculates the available memory size. It may be called
- * several times to try different SDRAM configurations on both
- * 60x and local buses.
- */
-static long int try_init (volatile memctl8260_t * memctl, ulong sdmr,
- ulong orx, volatile uchar * base)
-{
- volatile uchar c = 0xff;
- volatile ulong cnt, val;
- volatile ulong *addr;
- volatile uint *sdmr_ptr;
- volatile uint *orx_ptr;
- int i;
- ulong save[32]; /* to make test non-destructive */
- ulong maxsize;
-
- /* We must be able to test a location outsize the maximum legal size
- * to find out THAT we are outside; but this address still has to be
- * mapped by the controller. That means, that the initial mapping has
- * to be (at least) twice as large as the maximum expected size.
- */
- maxsize = (1 + (~orx | 0x7fff)) / 2;
-
- sdmr_ptr = &memctl->memc_psdmr;
- orx_ptr = &memctl->memc_or2;
-
- *orx_ptr = orx;
-
- /*
- * Quote from 8260 UM (10.4.2 SDRAM Power-On Initialization, 10-35):
- *
- * "At system reset, initialization software must set up the
- * programmable parameters in the memory controller banks registers
- * (ORx, BRx, P/LSDMR). After all memory parameters are configured,
- * system software should execute the following initialization sequence
- * for each SDRAM device.
- *
- * 1. Issue a PRECHARGE-ALL-BANKS command
- * 2. Issue eight CBR REFRESH commands
- * 3. Issue a MODE-SET command to initialize the mode register
- *
- * The initial commands are executed by setting P/LSDMR[OP] and
- * accessing the SDRAM with a single-byte transaction."
- *
- * The appropriate BRx/ORx registers have already been set when we
- * get here. The SDRAM can be accessed at the address CFG_SDRAM_BASE.
- */
-
- *sdmr_ptr = sdmr | PSDMR_OP_PREA;
- *base = c;
-
- *sdmr_ptr = sdmr | PSDMR_OP_CBRR;
- for (i = 0; i < 8; i++)
- *base = c;
-
- *sdmr_ptr = sdmr | PSDMR_OP_MRW;
- *(base + CFG_MRS_OFFS) = c; /* setting MR on address lines */
-
- *sdmr_ptr = sdmr | PSDMR_OP_NORM | PSDMR_RFEN;
- *base = c;
-
- /*
- * Check memory range for valid RAM. A simple memory test determines
- * the actually available RAM size between addresses `base' and
- * `base + maxsize'. Some (not all) hardware errors are detected:
- * - short between address lines
- * - short between data lines
- */
- i = 0;
- for (cnt = maxsize / sizeof (long); cnt > 0; cnt >>= 1) {
- addr = (volatile ulong *) base + cnt; /* pointer arith! */
- save[i++] = *addr;
- *addr = ~cnt;
- }
-
- addr = (volatile ulong *) base;
- save[i] = *addr;
- *addr = 0;
-
- if ((val = *addr) != 0) {
- *addr = save[i];
- return (0);
- }
-
- for (cnt = 1; cnt <= maxsize / sizeof (long); cnt <<= 1) {
- addr = (volatile ulong *) base + cnt; /* pointer arith! */
- val = *addr;
- *addr = save[--i];
- if (val != ~cnt) {
- /* Write the actual size to ORx
- */
- *orx_ptr = orx | ~(cnt * sizeof (long) - 1);
- return (cnt * sizeof (long));
- }
- }
- return (maxsize);
-}
-
-
-long int initdram (int board_type)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8260_t *memctl = &immap->im_memctl;
-
-#ifndef CFG_RAMBOOT
- ulong size8, size9;
-#endif
- ulong psize = 32 * 1024 * 1024;
-
- memctl->memc_psrt = CFG_PSRT;
- memctl->memc_mptpr = CFG_MPTPR;
-
-#ifndef CFG_RAMBOOT
- size8 = try_init (memctl, CFG_PSDMR_8COL, CFG_OR2_8COL,
- (uchar *) CFG_SDRAM_BASE);
- size9 = try_init (memctl, CFG_PSDMR_9COL, CFG_OR2_9COL,
- (uchar *) CFG_SDRAM_BASE);
-
- if (size8 < size9) {
- psize = size9;
- printf ("(60x:9COL) ");
- } else {
- psize = try_init (memctl, CFG_PSDMR_8COL, CFG_OR2_8COL,
- (uchar *) CFG_SDRAM_BASE);
- printf ("(60x:8COL) ");
- }
-#endif
- return (psize);
-}
-
-#if (CONFIG_COMMANDS & CFG_CMD_DOC)
-extern void doc_probe (ulong physadr);
-void doc_init (void)
-{
- doc_probe (CFG_DOC_BASE);
-}
-#endif
-
-#ifdef CONFIG_PCI
-struct pci_controller hose;
-
-extern void pci_mpc8250_init(struct pci_controller *);
-
-void pci_init_board(void)
-{
- pci_mpc8250_init(&hose);
-}
-#endif
diff --git a/board/pm828/u-boot.lds b/board/pm828/u-boot.lds
deleted file mode 100644
index 928c1cf393..0000000000
--- a/board/pm828/u-boot.lds
+++ /dev/null
@@ -1,126 +0,0 @@
-/*
- * (C) Copyright 2001-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc8260/start.o (.text)
- *(.text)
- common/environment.o(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/pm854/Makefile b/board/pm854/Makefile
deleted file mode 100644
index 78281660d6..0000000000
--- a/board/pm854/Makefile
+++ /dev/null
@@ -1,48 +0,0 @@
-#
-# (C) Copyright 2001-2005
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := $(BOARD).o
-SOBJS := init.o
-#SOBJS :=
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(OBJS) $(SOBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/pm854/config.mk b/board/pm854/config.mk
deleted file mode 100644
index 7d58d6ec85..0000000000
--- a/board/pm854/config.mk
+++ /dev/null
@@ -1,33 +0,0 @@
-# Copyright 2004 Freescale Semiconductor.
-# Modified by Xianghua Xiao, X.Xiao@motorola.com
-# (C) Copyright 2002,Motorola Inc.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# pm854 board
-# default CCARBAR is at 0xff700000
-# assume U-Boot is less than 0.5MB
-#
-TEXT_BASE = 0xfff80000
-
-PLATFORM_CPPFLAGS += -DCONFIG_MPC85xx=1
-PLATFORM_CPPFLAGS += -DCONFIG_MPC8540=1
-PLATFORM_CPPFLAGS += -DCONFIG_E500=1
diff --git a/board/pm854/init.S b/board/pm854/init.S
deleted file mode 100644
index ade5d6e5b6..0000000000
--- a/board/pm854/init.S
+++ /dev/null
@@ -1,263 +0,0 @@
-/*
- * Copyright 2004 Freescale Semiconductor.
- * Copyright (C) 2002,2003, Motorola Inc.
- * Xianghua Xiao <X.Xiao@motorola.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <ppc_asm.tmpl>
-#include <ppc_defs.h>
-#include <asm/cache.h>
-#include <asm/mmu.h>
-#include <config.h>
-#include <mpc85xx.h>
-
-
-/*
- * TLB0 and TLB1 Entries
- *
- * Out of reset, TLB1's Entry 0 maps the highest 4K for CCSRBAR.
- * However, CCSRBAR is then relocated to CFG_CCSRBAR right after
- * these TLB entries are established.
- *
- * The TLB entries for DDR are dynamically setup in spd_sdram()
- * and use TLB1 Entries 8 through 15 as needed according to the
- * size of DDR memory.
- *
- * MAS0: tlbsel, esel, nv
- * MAS1: valid, iprot, tid, ts, tsize
- * MAS2: epn, sharen, x0, x1, w, i, m, g, e
- * MAS3: rpn, u0-u3, ux, sx, uw, sw, ur, sr
- */
-
-#define entry_start \
- mflr r1 ; \
- bl 0f ;
-
-#define entry_end \
-0: mflr r0 ; \
- mtlr r1 ; \
- blr ;
-
-
- .section .bootpg, "ax"
- .globl tlb1_entry
-tlb1_entry:
- entry_start
-
- /*
- * Number of TLB0 and TLB1 entries in the following table
- */
- .long 13
-
-#if (CFG_CCSRBAR_DEFAULT != CFG_CCSRBAR)
- /*
- * TLB0 4K Non-cacheable, guarded
- * 0xff700000 4K Initial CCSRBAR mapping
- *
- * This ends up at a TLB0 Index==0 entry, and must not collide
- * with other TLB0 Entries.
- */
- .long TLB1_MAS0(0, 0, 0)
- .long TLB1_MAS1(1, 0, 0, 0, 0)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_CCSRBAR_DEFAULT), 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_CCSRBAR_DEFAULT), 0,0,0,0,0,1,0,1,0,1)
-#else
-#error("Update the number of table entries in tlb1_entry")
-#endif
-
- /*
- * TLB0 16K Cacheable, non-guarded
- * 0xd001_0000 16K Temporary Global data for initialization
- *
- * Use four 4K TLB0 entries. These entries must be cacheable
- * as they provide the bootstrap memory before the memory
- * controler and real memory have been configured.
- *
- * These entries end up at TLB0 Indicies 0x10, 0x14, 0x18 and 0x1c,
- * and must not collide with other TLB0 entries.
- */
- .long TLB1_MAS0(0, 0, 0)
- .long TLB1_MAS1(1, 0, 0, 0, 0)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_INIT_RAM_ADDR),
- 0,0,0,0,0,0,0,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_INIT_RAM_ADDR),
- 0,0,0,0,0,1,0,1,0,1)
-
- .long TLB1_MAS0(0, 0, 0)
- .long TLB1_MAS1(1, 0, 0, 0, 0)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_INIT_RAM_ADDR + 4 * 1024),
- 0,0,0,0,0,0,0,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_INIT_RAM_ADDR + 4 * 1024),
- 0,0,0,0,0,1,0,1,0,1)
-
- .long TLB1_MAS0(0, 0, 0)
- .long TLB1_MAS1(1, 0, 0, 0, 0)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_INIT_RAM_ADDR + 8 * 1024),
- 0,0,0,0,0,0,0,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_INIT_RAM_ADDR + 8 * 1024),
- 0,0,0,0,0,1,0,1,0,1)
-
- .long TLB1_MAS0(0, 0, 0)
- .long TLB1_MAS1(1, 0, 0, 0, 0)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_INIT_RAM_ADDR + 12 * 1024),
- 0,0,0,0,0,0,0,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_INIT_RAM_ADDR + 12 * 1024),
- 0,0,0,0,0,1,0,1,0,1)
-
-
- /*
- * TLB 0: 64M Non-cacheable, guarded
- * 0xfc000000 64M FLASH (8,16,32 or 64 MB)
- * Out of reset this entry is only 4K.
- */
- .long TLB1_MAS0(1, 0, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_64M)
- .long TLB1_MAS2(E500_TLB_EPN(0xfc000000), 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(0xfc000000), 0,0,0,0,0,1,0,1,0,1)
-
- /*
- * TLB 1: 256M Non-cacheable, guarded
- * 0x80000000 256M PCI1 MEM First half
- */
- .long TLB1_MAS0(1, 1, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_PCI1_MEM_BASE), 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_PCI1_MEM_BASE), 0,0,0,0,0,1,0,1,0,1)
-
- /*
- * TLB 2: 256M Non-cacheable, guarded
- * 0x90000000 256M PCI1 MEM Second half
- */
- .long TLB1_MAS0(1, 2, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_PCI1_MEM_BASE + 0x10000000),
- 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_PCI1_MEM_BASE + 0x10000000),
- 0,0,0,0,0,1,0,1,0,1)
-
- /*
- * TLB 3: 256M Non-cacheable, guarded
- * 0xc0000000 256M Rapid IO MEM First half
- */
- .long TLB1_MAS0(1, 3, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_RIO_MEM_BASE), 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_RIO_MEM_BASE), 0,0,0,0,0,1,0,1,0,1)
-
- /*
- * TLB 4: 256M Non-cacheable, guarded
- * 0xd0000000 256M Rapid IO MEM Second half
- */
- .long TLB1_MAS0(1, 4, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_RIO_MEM_BASE + 0x10000000),
- 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_RIO_MEM_BASE + 0x10000000),
- 0,0,0,0,0,1,0,1,0,1)
-
- /*
- * TLB 5: 64M Non-cacheable, guarded
- * 0xe000_0000 1M CCSRBAR
- * 0xe200_0000 16M PCI1 IO
- */
- .long TLB1_MAS0(1, 5, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_64M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_CCSRBAR), 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_CCSRBAR), 0,0,0,0,0,1,0,1,0,1)
-
- /*
- * TLB 6: 64M Cacheable, non-guarded
- * 0xf000_0000 64M LBC SDRAM
- */
- .long TLB1_MAS0(1, 6, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_64M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_LBC_SDRAM_BASE), 0,0,0,0,0,0,0,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_LBC_SDRAM_BASE), 0,0,0,0,0,1,0,1,0,1)
-
-#if !defined(CONFIG_SPD_EEPROM)
- /*
- * TLB 7: 256M DDR
- * 0x00000000 256M DDR System memory
- * Without SPD EEPROM configured DDR, this must be setup manually.
- * Make sure the TLB count at the top of this table is correct.
- * Likely it needs to be increased by two for these entries.
- */
-
- .long TLB1_MAS0(1, 7, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_DDR_SDRAM_BASE), 0,0,0,0,0,0,0,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_DDR_SDRAM_BASE), 0,0,0,0,0,1,0,1,0,1)
-#endif
-
- entry_end
-
-/*
- * LAW(Local Access Window) configuration:
- *
- * 0x0000_0000 0x7fff_ffff DDR 2G
- * 0x8000_0000 0x9fff_ffff PCI1 MEM 512M
- * 0xc000_0000 0xdfff_ffff RapidIO 512M
- * 0xe000_0000 0xe000_ffff CCSR 1M
- * 0xe200_0000 0xe2ff_ffff PCI1 IO 16M
- * 0xf000_0000 0xf7ff_ffff SDRAM 128M
- * 0xf800_0000 0xf80f_ffff BCSR 1M
- * 0xfc00_0000 0xffff_ffff FLASH (boot bank) 64M
- *
- * Notes:
- * CCSRBAR and L2-as-SRAM don't need a configured Local Access Window.
- * If flash is 8M at default position (last 8M), no LAW needed.
- */
-
-#if !defined(CONFIG_SPD_EEPROM)
-#define LAWBAR0 ((CFG_DDR_SDRAM_BASE>>12) & 0xfffff)
-#define LAWAR0 (LAWAR_EN | LAWAR_TRGT_IF_DDR | (LAWAR_SIZE & LAWAR_SIZE_256M))
-#else
-#define LAWBAR0 0
-#define LAWAR0 ((LAWAR_TRGT_IF_DDR | (LAWAR_SIZE & LAWAR_SIZE_128M)) & ~LAWAR_EN)
-#endif
-
-#define LAWBAR1 ((CFG_PCI1_MEM_BASE>>12) & 0xfffff)
-#define LAWAR1 (LAWAR_EN | LAWAR_TRGT_IF_PCIX | (LAWAR_SIZE & LAWAR_SIZE_512M))
-
-/*
- * This is not so much the SDRAM map as it is the whole localbus map.
- */
-#define LAWBAR2 ((CFG_LBC_SDRAM_BASE>>12) & 0xfffff)
-#define LAWAR2 (LAWAR_EN | LAWAR_TRGT_IF_LBC | (LAWAR_SIZE & LAWAR_SIZE_256M))
-
-#define LAWBAR3 ((CFG_PCI1_IO_BASE>>12) & 0xfffff)
-#define LAWAR3 (LAWAR_EN | LAWAR_TRGT_IF_PCIX | (LAWAR_SIZE & LAWAR_SIZE_16M))
-
-/*
- * Rapid IO at 0xc000_0000 for 512 M
- */
-#define LAWBAR4 ((CFG_RIO_MEM_BASE>>12) & 0xfffff)
-#define LAWAR4 (LAWAR_EN | LAWAR_TRGT_IF_RIO | (LAWAR_SIZE & LAWAR_SIZE_512M))
-
-
- .section .bootpg, "ax"
- .globl law_entry
-law_entry:
- entry_start
- .long 0x05
- .long LAWBAR0,LAWAR0,LAWBAR1,LAWAR1,LAWBAR2,LAWAR2,LAWBAR3,LAWAR3
- .long LAWBAR4,LAWAR4
- entry_end
diff --git a/board/pm854/pm854.c b/board/pm854/pm854.c
deleted file mode 100644
index 94c492f782..0000000000
--- a/board/pm854/pm854.c
+++ /dev/null
@@ -1,296 +0,0 @@
- /*
- * Copyright 2004 Freescale Semiconductor.
- * (C) Copyright 2002,2003, Motorola Inc.
- * Xianghua Xiao, (X.Xiao@motorola.com)
- *
- * (C) Copyright 2002 Scott McNutt <smcnutt@artesyncp.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-
-#include <common.h>
-#include <pci.h>
-#include <asm/processor.h>
-#include <asm/immap_85xx.h>
-#include <spd.h>
-
-#if defined(CONFIG_DDR_ECC)
-extern void ddr_enable_ecc(unsigned int dram_size);
-#endif
-
-extern long int spd_sdram(void);
-
-void local_bus_init(void);
-void sdram_init(void);
-long int fixed_sdram(void);
-
-
-int board_early_init_f (void)
-{
-#if defined(CONFIG_PCI)
- volatile immap_t *immr = (immap_t *)CFG_IMMR;
- volatile ccsr_pcix_t *pci = &immr->im_pcix;
-
- pci->peer &= 0xffffffdf; /* disable master abort */
-#endif
-
- return 0;
-}
-
-int checkboard (void)
-{
- puts("Board: MicroSys PM854\n");
-
-#ifdef CONFIG_PCI
- printf(" PCI1: 32 bit, %d MHz (compiled)\n",
- CONFIG_SYS_CLK_FREQ / 1000000);
-#else
- printf(" PCI1: disabled\n");
-#endif
-
- /*
- * Initialize local bus.
- */
- local_bus_init();
-
- return 0;
-}
-
-
-long int
-initdram(int board_type)
-{
- long dram_size = 0;
- extern long spd_sdram (void);
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
-
- puts("Initializing\n");
-
-#if defined(CONFIG_DDR_DLL)
- {
- volatile ccsr_gur_t *gur= &immap->im_gur;
- int i,x;
-
- x = 10;
-
- /*
- * Work around to stabilize DDR DLL
- */
- gur->ddrdllcr = 0x81000000;
- asm("sync;isync;msync");
- udelay (200);
- while (gur->ddrdllcr != 0x81000100)
- {
- gur->devdisr = gur->devdisr | 0x00010000;
- asm("sync;isync;msync");
- for (i=0; i<x; i++)
- ;
- gur->devdisr = gur->devdisr & 0xfff7ffff;
- asm("sync;isync;msync");
- x++;
- }
- }
-#endif
-
-#if defined(CONFIG_SPD_EEPROM)
- dram_size = spd_sdram ();
-#else
- dram_size = fixed_sdram ();
-#endif
-
-#if defined(CONFIG_DDR_ECC)
- /*
- * Initialize and enable DDR ECC.
- */
- ddr_enable_ecc(dram_size);
-#endif
- puts(" DDR: ");
- return dram_size;
-}
-
-
-/*
- * Initialize Local Bus
- */
-
-void
-local_bus_init(void)
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile ccsr_gur_t *gur = &immap->im_gur;
- volatile ccsr_lbc_t *lbc = &immap->im_lbc;
-
- uint clkdiv;
- uint lbc_hz;
- sys_info_t sysinfo;
-
- /*
- * Errata LBC11.
- * Fix Local Bus clock glitch when DLL is enabled.
- *
- * If localbus freq is < 66Mhz, DLL bypass mode must be used.
- * If localbus freq is > 133Mhz, DLL can be safely enabled.
- * Between 66 and 133, the DLL is enabled with an override workaround.
- */
-
- get_sys_info(&sysinfo);
- clkdiv = lbc->lcrr & 0x0f;
- lbc_hz = sysinfo.freqSystemBus / 1000000 / clkdiv;
-
- if (lbc_hz < 66) {
- lbc->lcrr = CFG_LBC_LCRR | 0x80000000; /* DLL Bypass */
-
- } else if (lbc_hz >= 133) {
- lbc->lcrr = CFG_LBC_LCRR & (~0x80000000); /* DLL Enabled */
-
- } else {
- /*
- * On REV1 boards, need to change CLKDIV before enable DLL.
- * Default CLKDIV is 8, change it to 4 temporarily.
- */
- uint pvr = get_pvr();
- uint temp_lbcdll = 0;
-
- if (pvr == PVR_85xx_REV1) {
- /* FIXME: Justify the high bit here. */
- lbc->lcrr = 0x10000004;
- }
-
- lbc->lcrr = CFG_LBC_LCRR & (~0x80000000); /* DLL Enabled */
- udelay(200);
-
- /*
- * Sample LBC DLL ctrl reg, upshift it to set the
- * override bits.
- */
- temp_lbcdll = gur->lbcdllcr;
- gur->lbcdllcr = (((temp_lbcdll & 0xff) << 16) | 0x80000000);
- asm("sync;isync;msync");
- }
-}
-
-
-#if defined(CFG_DRAM_TEST)
-int testdram (void)
-{
- uint *pstart = (uint *) CFG_MEMTEST_START;
- uint *pend = (uint *) CFG_MEMTEST_END;
- uint *p;
-
- printf("SDRAM test phase 1:\n");
- for (p = pstart; p < pend; p++)
- *p = 0xaaaaaaaa;
-
- for (p = pstart; p < pend; p++) {
- if (*p != 0xaaaaaaaa) {
- printf ("SDRAM test fails at: %08x\n", (uint) p);
- return 1;
- }
- }
-
- printf("SDRAM test phase 2:\n");
- for (p = pstart; p < pend; p++)
- *p = 0x55555555;
-
- for (p = pstart; p < pend; p++) {
- if (*p != 0x55555555) {
- printf ("SDRAM test fails at: %08x\n", (uint) p);
- return 1;
- }
- }
-
- printf("SDRAM test passed.\n");
- return 0;
-}
-#endif
-
-
-#if !defined(CONFIG_SPD_EEPROM)
-/*************************************************************************
- * fixed sdram init -- doesn't use serial presence detect.
- ************************************************************************/
-long int fixed_sdram (void)
-{
- #ifndef CFG_RAMBOOT
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile ccsr_ddr_t *ddr= &immap->im_ddr;
-
- ddr->cs0_bnds = CFG_DDR_CS0_BNDS;
- ddr->cs0_config = CFG_DDR_CS0_CONFIG;
- ddr->timing_cfg_1 = CFG_DDR_TIMING_1;
- ddr->timing_cfg_2 = CFG_DDR_TIMING_2;
- ddr->sdram_mode = CFG_DDR_MODE;
- ddr->sdram_interval = CFG_DDR_INTERVAL;
- #if defined (CONFIG_DDR_ECC)
- ddr->err_disable = 0x0000000D;
- ddr->err_sbe = 0x00ff0000;
- #endif
- asm("sync;isync;msync");
- udelay(500);
- #if defined (CONFIG_DDR_ECC)
- /* Enable ECC checking */
- ddr->sdram_cfg = (CFG_DDR_CONTROL | 0x20000000);
- #else
- ddr->sdram_cfg = CFG_DDR_CONTROL;
- #endif
- asm("sync; isync; msync");
- udelay(500);
- #endif
- return CFG_SDRAM_SIZE * 1024 * 1024;
-}
-#endif /* !defined(CONFIG_SPD_EEPROM) */
-
-
-#if defined(CONFIG_PCI)
-/*
- * Initialize PCI Devices, report devices found.
- */
-
-#ifndef CONFIG_PCI_PNP
-static struct pci_config_table pci_pm854_config_table[] = {
- { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
- PCI_IDSEL_NUMBER, PCI_ANY_ID,
- pci_cfgfunc_config_device, { PCI_ENET0_IOADDR,
- PCI_ENET0_MEMADDR,
- PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER
- } },
- { }
-};
-#endif
-
-
-static struct pci_controller hose = {
-#ifndef CONFIG_PCI_PNP
- config_table: pci_pm854_config_table,
-#endif
-};
-
-#endif /* CONFIG_PCI */
-
-
-void
-pci_init_board(void)
-{
-#ifdef CONFIG_PCI
- extern void pci_mpc85xx_init(struct pci_controller *hose);
-
- pci_mpc85xx_init(&hose);
-#endif /* CONFIG_PCI */
-}
diff --git a/board/pm854/u-boot.lds b/board/pm854/u-boot.lds
deleted file mode 100644
index fbfc65a1e8..0000000000
--- a/board/pm854/u-boot.lds
+++ /dev/null
@@ -1,150 +0,0 @@
-/*
- * (C) Copyright 2002,2003, Motorola,Inc.
- * Xianghua Xiao, X.Xiao@motorola.com.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- .resetvec 0xFFFFFFFC :
- {
- *(.resetvec)
- } = 0xffff
-
- .bootpg 0xFFFFF000 :
- {
- cpu/mpc85xx/start.o (.bootpg)
- board/pm854/init.o (.bootpg)
- } = 0xffff
-
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc85xx/start.o (.text)
- board/pm854/init.o (.text)
- cpu/mpc85xx/traps.o (.text)
- cpu/mpc85xx/interrupts.o (.text)
- cpu/mpc85xx/cpu_init.o (.text)
- cpu/mpc85xx/cpu.o (.text)
- cpu/mpc85xx/speed.o (.text)
- cpu/mpc85xx/pci.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/extable.o (.text)
- lib_generic/zlib.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/pm856/Makefile b/board/pm856/Makefile
deleted file mode 100644
index 5d8ea34946..0000000000
--- a/board/pm856/Makefile
+++ /dev/null
@@ -1,48 +0,0 @@
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := $(BOARD).o
-SOBJS := init.o
-#SOBJS :=
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(OBJS) $(SOBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/pm856/config.mk b/board/pm856/config.mk
deleted file mode 100644
index 1f98b3379c..0000000000
--- a/board/pm856/config.mk
+++ /dev/null
@@ -1,33 +0,0 @@
-# Copyright 2004 Freescale Semiconductor.
-# Modified by Xianghua Xiao, X.Xiao@motorola.com
-# (C) Copyright 2002,2003 Motorola Inc.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# PM856 board
-# default CCARBAR is at 0xff700000
-# assume U-Boot is less than 0.5MB
-#
-TEXT_BASE = 0xfff80000
-
-PLATFORM_CPPFLAGS += -DCONFIG_MPC85xx=1
-PLATFORM_CPPFLAGS += -DCONFIG_MPC8560=1
-PLATFORM_CPPFLAGS += -DCONFIG_E500=1
diff --git a/board/pm856/init.S b/board/pm856/init.S
deleted file mode 100644
index ade5d6e5b6..0000000000
--- a/board/pm856/init.S
+++ /dev/null
@@ -1,263 +0,0 @@
-/*
- * Copyright 2004 Freescale Semiconductor.
- * Copyright (C) 2002,2003, Motorola Inc.
- * Xianghua Xiao <X.Xiao@motorola.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <ppc_asm.tmpl>
-#include <ppc_defs.h>
-#include <asm/cache.h>
-#include <asm/mmu.h>
-#include <config.h>
-#include <mpc85xx.h>
-
-
-/*
- * TLB0 and TLB1 Entries
- *
- * Out of reset, TLB1's Entry 0 maps the highest 4K for CCSRBAR.
- * However, CCSRBAR is then relocated to CFG_CCSRBAR right after
- * these TLB entries are established.
- *
- * The TLB entries for DDR are dynamically setup in spd_sdram()
- * and use TLB1 Entries 8 through 15 as needed according to the
- * size of DDR memory.
- *
- * MAS0: tlbsel, esel, nv
- * MAS1: valid, iprot, tid, ts, tsize
- * MAS2: epn, sharen, x0, x1, w, i, m, g, e
- * MAS3: rpn, u0-u3, ux, sx, uw, sw, ur, sr
- */
-
-#define entry_start \
- mflr r1 ; \
- bl 0f ;
-
-#define entry_end \
-0: mflr r0 ; \
- mtlr r1 ; \
- blr ;
-
-
- .section .bootpg, "ax"
- .globl tlb1_entry
-tlb1_entry:
- entry_start
-
- /*
- * Number of TLB0 and TLB1 entries in the following table
- */
- .long 13
-
-#if (CFG_CCSRBAR_DEFAULT != CFG_CCSRBAR)
- /*
- * TLB0 4K Non-cacheable, guarded
- * 0xff700000 4K Initial CCSRBAR mapping
- *
- * This ends up at a TLB0 Index==0 entry, and must not collide
- * with other TLB0 Entries.
- */
- .long TLB1_MAS0(0, 0, 0)
- .long TLB1_MAS1(1, 0, 0, 0, 0)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_CCSRBAR_DEFAULT), 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_CCSRBAR_DEFAULT), 0,0,0,0,0,1,0,1,0,1)
-#else
-#error("Update the number of table entries in tlb1_entry")
-#endif
-
- /*
- * TLB0 16K Cacheable, non-guarded
- * 0xd001_0000 16K Temporary Global data for initialization
- *
- * Use four 4K TLB0 entries. These entries must be cacheable
- * as they provide the bootstrap memory before the memory
- * controler and real memory have been configured.
- *
- * These entries end up at TLB0 Indicies 0x10, 0x14, 0x18 and 0x1c,
- * and must not collide with other TLB0 entries.
- */
- .long TLB1_MAS0(0, 0, 0)
- .long TLB1_MAS1(1, 0, 0, 0, 0)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_INIT_RAM_ADDR),
- 0,0,0,0,0,0,0,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_INIT_RAM_ADDR),
- 0,0,0,0,0,1,0,1,0,1)
-
- .long TLB1_MAS0(0, 0, 0)
- .long TLB1_MAS1(1, 0, 0, 0, 0)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_INIT_RAM_ADDR + 4 * 1024),
- 0,0,0,0,0,0,0,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_INIT_RAM_ADDR + 4 * 1024),
- 0,0,0,0,0,1,0,1,0,1)
-
- .long TLB1_MAS0(0, 0, 0)
- .long TLB1_MAS1(1, 0, 0, 0, 0)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_INIT_RAM_ADDR + 8 * 1024),
- 0,0,0,0,0,0,0,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_INIT_RAM_ADDR + 8 * 1024),
- 0,0,0,0,0,1,0,1,0,1)
-
- .long TLB1_MAS0(0, 0, 0)
- .long TLB1_MAS1(1, 0, 0, 0, 0)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_INIT_RAM_ADDR + 12 * 1024),
- 0,0,0,0,0,0,0,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_INIT_RAM_ADDR + 12 * 1024),
- 0,0,0,0,0,1,0,1,0,1)
-
-
- /*
- * TLB 0: 64M Non-cacheable, guarded
- * 0xfc000000 64M FLASH (8,16,32 or 64 MB)
- * Out of reset this entry is only 4K.
- */
- .long TLB1_MAS0(1, 0, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_64M)
- .long TLB1_MAS2(E500_TLB_EPN(0xfc000000), 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(0xfc000000), 0,0,0,0,0,1,0,1,0,1)
-
- /*
- * TLB 1: 256M Non-cacheable, guarded
- * 0x80000000 256M PCI1 MEM First half
- */
- .long TLB1_MAS0(1, 1, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_PCI1_MEM_BASE), 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_PCI1_MEM_BASE), 0,0,0,0,0,1,0,1,0,1)
-
- /*
- * TLB 2: 256M Non-cacheable, guarded
- * 0x90000000 256M PCI1 MEM Second half
- */
- .long TLB1_MAS0(1, 2, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_PCI1_MEM_BASE + 0x10000000),
- 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_PCI1_MEM_BASE + 0x10000000),
- 0,0,0,0,0,1,0,1,0,1)
-
- /*
- * TLB 3: 256M Non-cacheable, guarded
- * 0xc0000000 256M Rapid IO MEM First half
- */
- .long TLB1_MAS0(1, 3, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_RIO_MEM_BASE), 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_RIO_MEM_BASE), 0,0,0,0,0,1,0,1,0,1)
-
- /*
- * TLB 4: 256M Non-cacheable, guarded
- * 0xd0000000 256M Rapid IO MEM Second half
- */
- .long TLB1_MAS0(1, 4, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_RIO_MEM_BASE + 0x10000000),
- 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_RIO_MEM_BASE + 0x10000000),
- 0,0,0,0,0,1,0,1,0,1)
-
- /*
- * TLB 5: 64M Non-cacheable, guarded
- * 0xe000_0000 1M CCSRBAR
- * 0xe200_0000 16M PCI1 IO
- */
- .long TLB1_MAS0(1, 5, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_64M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_CCSRBAR), 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_CCSRBAR), 0,0,0,0,0,1,0,1,0,1)
-
- /*
- * TLB 6: 64M Cacheable, non-guarded
- * 0xf000_0000 64M LBC SDRAM
- */
- .long TLB1_MAS0(1, 6, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_64M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_LBC_SDRAM_BASE), 0,0,0,0,0,0,0,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_LBC_SDRAM_BASE), 0,0,0,0,0,1,0,1,0,1)
-
-#if !defined(CONFIG_SPD_EEPROM)
- /*
- * TLB 7: 256M DDR
- * 0x00000000 256M DDR System memory
- * Without SPD EEPROM configured DDR, this must be setup manually.
- * Make sure the TLB count at the top of this table is correct.
- * Likely it needs to be increased by two for these entries.
- */
-
- .long TLB1_MAS0(1, 7, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_DDR_SDRAM_BASE), 0,0,0,0,0,0,0,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_DDR_SDRAM_BASE), 0,0,0,0,0,1,0,1,0,1)
-#endif
-
- entry_end
-
-/*
- * LAW(Local Access Window) configuration:
- *
- * 0x0000_0000 0x7fff_ffff DDR 2G
- * 0x8000_0000 0x9fff_ffff PCI1 MEM 512M
- * 0xc000_0000 0xdfff_ffff RapidIO 512M
- * 0xe000_0000 0xe000_ffff CCSR 1M
- * 0xe200_0000 0xe2ff_ffff PCI1 IO 16M
- * 0xf000_0000 0xf7ff_ffff SDRAM 128M
- * 0xf800_0000 0xf80f_ffff BCSR 1M
- * 0xfc00_0000 0xffff_ffff FLASH (boot bank) 64M
- *
- * Notes:
- * CCSRBAR and L2-as-SRAM don't need a configured Local Access Window.
- * If flash is 8M at default position (last 8M), no LAW needed.
- */
-
-#if !defined(CONFIG_SPD_EEPROM)
-#define LAWBAR0 ((CFG_DDR_SDRAM_BASE>>12) & 0xfffff)
-#define LAWAR0 (LAWAR_EN | LAWAR_TRGT_IF_DDR | (LAWAR_SIZE & LAWAR_SIZE_256M))
-#else
-#define LAWBAR0 0
-#define LAWAR0 ((LAWAR_TRGT_IF_DDR | (LAWAR_SIZE & LAWAR_SIZE_128M)) & ~LAWAR_EN)
-#endif
-
-#define LAWBAR1 ((CFG_PCI1_MEM_BASE>>12) & 0xfffff)
-#define LAWAR1 (LAWAR_EN | LAWAR_TRGT_IF_PCIX | (LAWAR_SIZE & LAWAR_SIZE_512M))
-
-/*
- * This is not so much the SDRAM map as it is the whole localbus map.
- */
-#define LAWBAR2 ((CFG_LBC_SDRAM_BASE>>12) & 0xfffff)
-#define LAWAR2 (LAWAR_EN | LAWAR_TRGT_IF_LBC | (LAWAR_SIZE & LAWAR_SIZE_256M))
-
-#define LAWBAR3 ((CFG_PCI1_IO_BASE>>12) & 0xfffff)
-#define LAWAR3 (LAWAR_EN | LAWAR_TRGT_IF_PCIX | (LAWAR_SIZE & LAWAR_SIZE_16M))
-
-/*
- * Rapid IO at 0xc000_0000 for 512 M
- */
-#define LAWBAR4 ((CFG_RIO_MEM_BASE>>12) & 0xfffff)
-#define LAWAR4 (LAWAR_EN | LAWAR_TRGT_IF_RIO | (LAWAR_SIZE & LAWAR_SIZE_512M))
-
-
- .section .bootpg, "ax"
- .globl law_entry
-law_entry:
- entry_start
- .long 0x05
- .long LAWBAR0,LAWAR0,LAWBAR1,LAWAR1,LAWBAR2,LAWAR2,LAWBAR3,LAWAR3
- .long LAWBAR4,LAWAR4
- entry_end
diff --git a/board/pm856/pm856.c b/board/pm856/pm856.c
deleted file mode 100644
index 5044708370..0000000000
--- a/board/pm856/pm856.c
+++ /dev/null
@@ -1,449 +0,0 @@
-/*
- * Copyright 2004 Freescale Semiconductor.
- * (C) Copyright 2003,Motorola Inc.
- * Xianghua Xiao, (X.Xiao@motorola.com)
- *
- * (C) Copyright 2002 Scott McNutt <smcnutt@artesyncp.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-
-#include <common.h>
-#include <pci.h>
-#include <asm/processor.h>
-#include <asm/immap_85xx.h>
-#include <ioports.h>
-#include <spd.h>
-#include <miiphy.h>
-
-#if defined(CONFIG_DDR_ECC)
-extern void ddr_enable_ecc(unsigned int dram_size);
-#endif
-
-extern long int spd_sdram(void);
-
-void local_bus_init(void);
-long int fixed_sdram(void);
-
-/*
- * I/O Port configuration table
- *
- * if conf is 1, then that port pin will be configured at boot time
- * according to the five values podr/pdir/ppar/psor/pdat for that entry
- */
-
-const iop_conf_t iop_conf_tab[4][32] = {
-
- /* Port A configuration */
- { /* conf ppar psor pdir podr pdat */
- /* PA31 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 TxENB */
- /* PA30 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 TxClav */
- /* PA29 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 TxSOC */
- /* PA28 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 RxENB */
- /* PA27 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 RxSOC */
- /* PA26 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 RxClav */
- /* PA25 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[0] */
- /* PA24 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[1] */
- /* PA23 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[2] */
- /* PA22 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[3] */
- /* PA21 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[4] */
- /* PA20 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[5] */
- /* PA19 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[6] */
- /* PA18 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[7] */
- /* PA17 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[7] */
- /* PA16 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[6] */
- /* PA15 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[5] */
- /* PA14 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[4] */
- /* PA13 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[3] */
- /* PA12 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[2] */
- /* PA11 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[1] */
- /* PA10 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[0] */
- /* PA9 */ { 0, 1, 1, 1, 0, 0 }, /* FCC1 L1TXD */
- /* PA8 */ { 0, 1, 1, 0, 0, 0 }, /* FCC1 L1RXD */
- /* PA7 */ { 0, 0, 0, 1, 0, 0 }, /* PA7 */
- /* PA6 */ { 0, 1, 1, 1, 0, 0 }, /* TDM A1 L1RSYNC */
- /* PA5 */ { 0, 0, 0, 1, 0, 0 }, /* PA5 */
- /* PA4 */ { 0, 0, 0, 1, 0, 0 }, /* PA4 */
- /* PA3 */ { 0, 0, 0, 1, 0, 0 }, /* PA3 */
- /* PA2 */ { 0, 0, 0, 1, 0, 0 }, /* PA2 */
- /* PA1 */ { 0, 0, 0, 0, 0, 0 }, /* FREERUN */
- /* PA0 */ { 0, 0, 0, 1, 0, 0 } /* PA0 */
- },
-
- /* Port B configuration */
- { /* conf ppar psor pdir podr pdat */
- /* PB31 */ { 0, 1, 0, 1, 0, 0 }, /* FCC2 MII TX_ER */
- /* PB30 */ { 0, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_DV */
- /* PB29 */ { 0, 1, 1, 1, 0, 0 }, /* FCC2 MII TX_EN */
- /* PB28 */ { 0, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_ER */
- /* PB27 */ { 0, 1, 0, 0, 0, 0 }, /* FCC2 MII COL */
- /* PB26 */ { 0, 1, 0, 0, 0, 0 }, /* FCC2 MII CRS */
- /* PB25 */ { 0, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[3] */
- /* PB24 */ { 0, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[2] */
- /* PB23 */ { 0, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[1] */
- /* PB22 */ { 0, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[0] */
- /* PB21 */ { 0, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[0] */
- /* PB20 */ { 0, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[1] */
- /* PB19 */ { 0, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[2] */
- /* PB18 */ { 0, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[3] */
- /* PB17 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3:RX_DIV */
- /* PB16 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3:RX_ERR */
- /* PB15 */ { 1, 1, 0, 1, 0, 0 }, /* FCC3:TX_ERR */
- /* PB14 */ { 1, 1, 0, 1, 0, 0 }, /* FCC3:TX_EN */
- /* PB13 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3:COL */
- /* PB12 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3:CRS */
- /* PB11 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3:RXD */
- /* PB10 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3:RXD */
- /* PB9 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3:RXD */
- /* PB8 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3:RXD */
- /* PB7 */ { 1, 1, 0, 1, 0, 0 }, /* FCC3:TXD */
- /* PB6 */ { 1, 1, 0, 1, 0, 0 }, /* FCC3:TXD */
- /* PB5 */ { 1, 1, 0, 1, 0, 0 }, /* FCC3:TXD */
- /* PB4 */ { 1, 1, 0, 1, 0, 0 }, /* FCC3:TXD */
- /* PB3 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PB2 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PB1 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PB0 */ { 0, 0, 0, 0, 0, 0 } /* pin doesn't exist */
- },
-
- /* Port C */
- { /* conf ppar psor pdir podr pdat */
- /* PC31 */ { 0, 0, 0, 1, 0, 0 }, /* PC31 */
- /* PC30 */ { 0, 0, 0, 1, 0, 0 }, /* PC30 */
- /* PC29 */ { 0, 1, 1, 0, 0, 0 }, /* SCC1 EN *CLSN */
- /* PC28 */ { 0, 0, 0, 1, 0, 0 }, /* PC28 */
- /* PC27 */ { 0, 0, 0, 1, 0, 0 }, /* UART Clock in */
- /* PC26 */ { 0, 0, 0, 1, 0, 0 }, /* PC26 */
- /* PC25 */ { 0, 0, 0, 1, 0, 0 }, /* PC25 */
- /* PC24 */ { 0, 0, 0, 1, 0, 0 }, /* PC24 */
- /* PC23 */ { 0, 1, 0, 1, 0, 0 }, /* ATMTFCLK */
- /* PC22 */ { 0, 1, 0, 0, 0, 0 }, /* ATMRFCLK */
- /* PC21 */ { 0, 1, 0, 0, 0, 0 }, /* SCC1 EN RXCLK */
- /* PC20 */ { 0, 1, 0, 0, 0, 0 }, /* SCC1 EN TXCLK */
- /* PC19 */ { 0, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_CLK CLK13 */
- /* PC18 */ { 1, 1, 0, 0, 0, 0 }, /* FCC Tx Clock (CLK14) */
- /* PC17 */ { 1, 1, 0, 0, 0, 0 }, /* PC17 */
- /* PC16 */ { 0, 1, 0, 0, 0, 0 }, /* FCC Tx Clock (CLK16) */
- /* PC15 */ { 0, 1, 0, 0, 0, 0 }, /* PC15 */
- /* PC14 */ { 0, 1, 0, 0, 0, 0 }, /* SCC1 EN *CD */
- /* PC13 */ { 0, 1, 0, 0, 0, 0 }, /* PC13 */
- /* PC12 */ { 0, 1, 0, 1, 0, 0 }, /* PC12 */
- /* PC11 */ { 0, 0, 0, 1, 0, 0 }, /* LXT971 transmit control */
- /* PC10 */ { 0, 0, 0, 1, 0, 0 }, /* FETHMDC */
- /* PC9 */ { 0, 0, 0, 0, 0, 0 }, /* FETHMDIO */
- /* PC8 */ { 0, 0, 0, 1, 0, 0 }, /* PC8 */
- /* PC7 */ { 0, 0, 0, 1, 0, 0 }, /* PC7 */
- /* PC6 */ { 0, 0, 0, 1, 0, 0 }, /* PC6 */
- /* PC5 */ { 0, 0, 0, 1, 0, 0 }, /* PC5 */
- /* PC4 */ { 0, 0, 0, 1, 0, 0 }, /* PC4 */
- /* PC3 */ { 0, 0, 0, 1, 0, 0 }, /* PC3 */
- /* PC2 */ { 0, 0, 0, 1, 0, 1 }, /* ENET FDE */
- /* PC1 */ { 0, 0, 0, 1, 0, 0 }, /* ENET DSQE */
- /* PC0 */ { 0, 0, 0, 1, 0, 0 }, /* ENET LBK */
- },
-
- /* Port D */
- { /* conf ppar psor pdir podr pdat */
- /* PD31 */ { 1, 1, 0, 0, 0, 0 }, /* SCC1 EN RxD */
- /* PD30 */ { 1, 1, 1, 1, 0, 0 }, /* SCC1 EN TxD */
- /* PD29 */ { 1, 1, 0, 1, 0, 0 }, /* SCC1 EN TENA */
- /* PD28 */ { 1, 1, 0, 0, 0, 0 }, /* PD28 */
- /* PD27 */ { 1, 1, 0, 1, 0, 0 }, /* PD27 */
- /* PD26 */ { 1, 1, 0, 1, 0, 0 }, /* PD26 */
- /* PD25 */ { 0, 0, 0, 1, 0, 0 }, /* PD25 */
- /* PD24 */ { 0, 0, 0, 1, 0, 0 }, /* PD24 */
- /* PD23 */ { 0, 0, 0, 1, 0, 0 }, /* PD23 */
- /* PD22 */ { 0, 0, 0, 1, 0, 0 }, /* PD22 */
- /* PD21 */ { 0, 0, 0, 1, 0, 0 }, /* PD21 */
- /* PD20 */ { 0, 0, 0, 1, 0, 0 }, /* PD20 */
- /* PD19 */ { 0, 0, 0, 1, 0, 0 }, /* PD19 */
- /* PD18 */ { 0, 0, 0, 1, 0, 0 }, /* PD18 */
- /* PD17 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXPRTY */
- /* PD16 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXPRTY */
- /* PD15 */ { 0, 1, 1, 0, 1, 0 }, /* I2C SDA */
- /* PD14 */ { 0, 0, 0, 1, 0, 0 }, /* LED */
- /* PD13 */ { 0, 0, 0, 0, 0, 0 }, /* PD13 */
- /* PD12 */ { 0, 0, 0, 0, 0, 0 }, /* PD12 */
- /* PD11 */ { 0, 0, 0, 0, 0, 0 }, /* PD11 */
- /* PD10 */ { 0, 0, 0, 0, 0, 0 }, /* PD10 */
- /* PD9 */ { 0, 1, 0, 1, 0, 0 }, /* SMC1 TXD */
- /* PD8 */ { 0, 1, 0, 0, 0, 0 }, /* SMC1 RXD */
- /* PD7 */ { 0, 0, 0, 1, 0, 1 }, /* PD7 */
- /* PD6 */ { 0, 0, 0, 1, 0, 1 }, /* PD6 */
- /* PD5 */ { 0, 0, 0, 1, 0, 1 }, /* PD5 */
- /* PD4 */ { 0, 0, 0, 1, 0, 1 }, /* PD4 */
- /* PD3 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PD2 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PD1 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PD0 */ { 0, 0, 0, 0, 0, 0 } /* pin doesn't exist */
- }
-};
-
-
-int board_early_init_f (void)
-{
- return 0;
-}
-
-void reset_phy (void)
-{
-}
-
-
-int checkboard (void)
-{
- puts("Board: MicroSys PM856\n");
-
-#ifdef CONFIG_PCI
- printf(" PCI1: 32 bit, %d MHz (compiled)\n",
- CONFIG_SYS_CLK_FREQ / 1000000);
-#else
- printf(" PCI1: disabled\n");
-#endif
-
- /*
- * Initialize local bus.
- */
- local_bus_init();
-
- return 0;
-}
-
-
-long int
-initdram(int board_type)
-{
- long dram_size = 0;
- extern long spd_sdram (void);
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
-
- puts("Initializing\n");
-
-#if defined(CONFIG_DDR_DLL)
- {
- volatile ccsr_gur_t *gur= &immap->im_gur;
- int i,x;
-
- x = 10;
-
- /*
- * Work around to stabilize DDR DLL
- */
- gur->ddrdllcr = 0x81000000;
- asm("sync;isync;msync");
- udelay (200);
- while (gur->ddrdllcr != 0x81000100)
- {
- gur->devdisr = gur->devdisr | 0x00010000;
- asm("sync;isync;msync");
- for (i=0; i<x; i++)
- ;
- gur->devdisr = gur->devdisr & 0xfff7ffff;
- asm("sync;isync;msync");
- x++;
- }
- }
-#endif
-
-#if defined(CONFIG_SPD_EEPROM)
- dram_size = spd_sdram ();
-#else
- dram_size = fixed_sdram ();
-#endif
-
-#if defined(CONFIG_DDR_ECC)
- /*
- * Initialize and enable DDR ECC.
- */
- ddr_enable_ecc(dram_size);
-#endif
-
- puts(" DDR: ");
- return dram_size;
-}
-
-
-/*
- * Initialize Local Bus
- */
-
-void
-local_bus_init(void)
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile ccsr_gur_t *gur = &immap->im_gur;
- volatile ccsr_lbc_t *lbc = &immap->im_lbc;
-
- uint clkdiv;
- uint lbc_hz;
- sys_info_t sysinfo;
-
- /*
- * Errata LBC11.
- * Fix Local Bus clock glitch when DLL is enabled.
- *
- * If localbus freq is < 66Mhz, DLL bypass mode must be used.
- * If localbus freq is > 133Mhz, DLL can be safely enabled.
- * Between 66 and 133, the DLL is enabled with an override workaround.
- */
-
- get_sys_info(&sysinfo);
- clkdiv = lbc->lcrr & 0x0f;
- lbc_hz = sysinfo.freqSystemBus / 1000000 / clkdiv;
-
- if (lbc_hz < 66) {
- lbc->lcrr = CFG_LBC_LCRR | 0x80000000; /* DLL Bypass */
-
- } else if (lbc_hz >= 133) {
- lbc->lcrr = CFG_LBC_LCRR & (~0x80000000); /* DLL Enabled */
-
- } else {
- /*
- * On REV1 boards, need to change CLKDIV before enable DLL.
- * Default CLKDIV is 8, change it to 4 temporarily.
- */
- uint pvr = get_pvr();
- uint temp_lbcdll = 0;
-
- if (pvr == PVR_85xx_REV1) {
- /* FIXME: Justify the high bit here. */
- lbc->lcrr = 0x10000004;
- }
-
- lbc->lcrr = CFG_LBC_LCRR & (~0x80000000);/* DLL Enabled */
- udelay(200);
-
- /*
- * Sample LBC DLL ctrl reg, upshift it to set the
- * override bits.
- */
- temp_lbcdll = gur->lbcdllcr;
- gur->lbcdllcr = (((temp_lbcdll & 0xff) << 16) | 0x80000000);
- asm("sync;isync;msync");
- }
-}
-
-#if defined(CFG_DRAM_TEST)
-int testdram (void)
-{
- uint *pstart = (uint *) CFG_MEMTEST_START;
- uint *pend = (uint *) CFG_MEMTEST_END;
- uint *p;
-
- printf("SDRAM test phase 1:\n");
- for (p = pstart; p < pend; p++)
- *p = 0xaaaaaaaa;
-
- for (p = pstart; p < pend; p++) {
- if (*p != 0xaaaaaaaa) {
- printf ("SDRAM test fails at: %08x\n", (uint) p);
- return 1;
- }
- }
-
- printf("SDRAM test phase 2:\n");
- for (p = pstart; p < pend; p++)
- *p = 0x55555555;
-
- for (p = pstart; p < pend; p++) {
- if (*p != 0x55555555) {
- printf ("SDRAM test fails at: %08x\n", (uint) p);
- return 1;
- }
- }
-
- printf("SDRAM test passed.\n");
- return 0;
-}
-#endif
-
-
-#if !defined(CONFIG_SPD_EEPROM)
-/*************************************************************************
- * fixed sdram init -- doesn't use serial presence detect.
- ************************************************************************/
-long int fixed_sdram (void)
-{
- #ifndef CFG_RAMBOOT
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile ccsr_ddr_t *ddr= &immap->im_ddr;
-
- ddr->cs0_bnds = CFG_DDR_CS0_BNDS;
- ddr->cs0_config = CFG_DDR_CS0_CONFIG;
- ddr->timing_cfg_1 = CFG_DDR_TIMING_1;
- ddr->timing_cfg_2 = CFG_DDR_TIMING_2;
- ddr->sdram_mode = CFG_DDR_MODE;
- ddr->sdram_interval = CFG_DDR_INTERVAL;
- #if defined (CONFIG_DDR_ECC)
- ddr->err_disable = 0x0000000D;
- ddr->err_sbe = 0x00ff0000;
- #endif
- asm("sync;isync;msync");
- udelay(500);
- #if defined (CONFIG_DDR_ECC)
- /* Enable ECC checking */
- ddr->sdram_cfg = (CFG_DDR_CONTROL | 0x20000000);
- #else
- ddr->sdram_cfg = CFG_DDR_CONTROL;
- #endif
- asm("sync; isync; msync");
- udelay(500);
- #endif
- return CFG_SDRAM_SIZE * 1024 * 1024;
-}
-#endif /* !defined(CONFIG_SPD_EEPROM) */
-
-
-#if defined(CONFIG_PCI)
-/*
- * Initialize PCI Devices, report devices found.
- */
-
-#ifndef CONFIG_PCI_PNP
-static struct pci_config_table pci_mpc85xxads_config_table[] = {
- { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
- PCI_IDSEL_NUMBER, PCI_ANY_ID,
- pci_cfgfunc_config_device, { PCI_ENET0_IOADDR,
- PCI_ENET0_MEMADDR,
- PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER
- } },
- { }
-};
-#endif
-
-
-static struct pci_controller hose = {
-#ifndef CONFIG_PCI_PNP
- config_table: pci_mpc85xxads_config_table,
-#endif
-};
-
-#endif /* CONFIG_PCI */
-
-
-void
-pci_init_board(void)
-{
-#ifdef CONFIG_PCI
- extern void pci_mpc85xx_init(struct pci_controller *hose);
-
- pci_mpc85xx_init(&hose);
-#endif /* CONFIG_PCI */
-}
diff --git a/board/pm856/u-boot.lds b/board/pm856/u-boot.lds
deleted file mode 100644
index e946a8e512..0000000000
--- a/board/pm856/u-boot.lds
+++ /dev/null
@@ -1,150 +0,0 @@
-/*
- * (C) Copyright 2005 Wolfgang Denk <wd@denx.de>
- * (C) Copyright 2002,2003, Motorola,Inc.
- * Xianghua Xiao, X.Xiao@motorola.com.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- .resetvec 0xFFFFFFFC :
- {
- *(.resetvec)
- } = 0xffff
-
- .bootpg 0xFFFFF000 :
- {
- cpu/mpc85xx/start.o (.bootpg)
- board/pm856/init.o (.bootpg)
- } = 0xffff
-
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc85xx/start.o (.text)
- board/pm856/init.o (.text)
- cpu/mpc85xx/traps.o (.text)
- cpu/mpc85xx/interrupts.o (.text)
- cpu/mpc85xx/cpu_init.o (.text)
- cpu/mpc85xx/cpu.o (.text)
- cpu/mpc85xx/speed.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/extable.o (.text)
- lib_generic/zlib.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/pn62/Makefile b/board/pn62/Makefile
deleted file mode 100644
index e85d4fdc65..0000000000
--- a/board/pn62/Makefile
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o cmd_pn62.o misc.o
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/pn62/cmd_pn62.c b/board/pn62/cmd_pn62.c
deleted file mode 100644
index 3ea068d352..0000000000
--- a/board/pn62/cmd_pn62.c
+++ /dev/null
@@ -1,175 +0,0 @@
-/*
- * (C) Copyright 2002
- * Wolfgang Grandegger, DENX Software Engineering, wg@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <malloc.h>
-#include <net.h>
-#include <asm/io.h>
-#include <pci.h>
-#include <command.h>
-#include "pn62.h"
-
-#if (CONFIG_COMMANDS & CFG_CMD_BSP)
-
-extern int do_bootm (cmd_tbl_t *, int, int, char *[]);
-
-/*
- * Command led: controls the various LEDs 0..11 on the PN62 card.
- */
-int do_led (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- unsigned int number, function;
-
- if (argc != 3) {
- printf ("Usage:\n%s\n", cmdtp->usage);
- return 1;
- }
- number = simple_strtoul(argv[1], NULL, 10);
- if (number > PN62_LED_MAX)
- return 1;
- function = simple_strtoul(argv[2], NULL, 16);
- set_led (number, function);
- return 0;
-}
-U_BOOT_CMD(
- led , 3, 1, do_led,
- "led - set LED 0..11 on the PN62 board\n",
- "i fun\n"
- " - set 'i'th LED to function 'fun'\n"
-);
-
-/*
- * Command loadpci: loads a image over PCI.
- */
-#define CMD_MOVE_WINDOW 0x1
-#define CMD_BOOT_IMAGE 0x2
-
-int do_loadpci (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- char *s;
- ulong addr = 0, count = 0;
- u32 off;
- int cmd, rcode = 0;
-
- /* pre-set load_addr */
- if ((s = getenv("loadaddr")) != NULL) {
- addr = simple_strtoul(s, NULL, 16);
- }
-
- switch (argc) {
- case 1:
- break;
- case 2:
- addr = simple_strtoul(argv[1], NULL, 16);
- break;
- default:
- printf ("Usage:\n%s\n", cmdtp->usage);
- return 1;
- }
-
- printf ("## Ready for image download ...\n");
-
- show_startup_phase(12);
-
- while (1) {
- /* Alive indicator */
- i2155x_write_scrapad(BOOT_PROTO, BOOT_PROTO_READY);
-
- /* Toggle status LEDs */
- cmd = (count / 200) % 4; /* downscale */
- set_led(4, cmd == 0 ? LED_1 : LED_0);
- set_led(5, cmd == 1 ? LED_1 : LED_0);
- set_led(6, cmd == 2 ? LED_1 : LED_0);
- set_led(7, cmd == 3 ? LED_1 : LED_0);
- udelay(1000);
- count++;
-
- cmd = i2155x_read_scrapad(BOOT_CMD);
-
- if (cmd == BOOT_CMD_MOVE) {
- off = i2155x_read_scrapad(BOOT_DATA);
- off += addr;
- i2155x_set_bar_base(3, off);
- printf ("## BAR3 Addr moved = 0x%08x\n", off);
- i2155x_write_scrapad(BOOT_CMD, ~cmd);
- show_startup_phase(13);
- }
- else if (cmd == BOOT_CMD_BOOT) {
- set_led(4, LED_1);
- set_led(5, LED_1);
- set_led(6, LED_1);
- set_led(7, LED_1);
-
- i2155x_write_scrapad(BOOT_CMD, ~cmd);
- show_startup_phase(14);
- break;
- }
-
- /* Abort if ctrl-c was pressed */
- if (ctrlc()) {
- printf("\nAbort\n");
- return 0;
- }
-
- }
-
- /* Repoint to the default shared memory */
- i2155x_set_bar_base(3, PN62_SMEM_DEFAULT);
-
- load_addr = addr;
- printf ("## Start Addr = 0x%08lx\n", addr);
-
- show_startup_phase(15);
-
- /* Loading ok, check if we should attempt an auto-start */
- if (((s = getenv("autostart")) != NULL) && (strcmp(s,"yes") == 0)) {
- char *local_args[2];
- local_args[0] = argv[0];
- local_args[1] = NULL;
-
- printf ("Automatic boot of image at addr 0x%08lX ...\n",
- load_addr);
- rcode = do_bootm (cmdtp, 0, 1, local_args);
- }
-
-#ifdef CONFIG_AUTOSCRIPT
- if (load_addr) {
- char *s;
-
- if (((s = getenv("autoscript")) != NULL) && (strcmp(s,"yes") == 0)) {
- printf("Running autoscript at addr 0x%08lX ...\n", load_addr);
- rcode = autoscript (bd, load_addr);
- }
- }
-#endif
- return rcode;
-}
-
-U_BOOT_CMD(
- loadpci, 2, 1, do_loadpci,
- "loadpci - load binary file over PCI\n",
- "[addr]\n"
- " - load binary file over PCI to address 'addr'\n"
-);
-
-#endif
diff --git a/board/pn62/config.mk b/board/pn62/config.mk
deleted file mode 100644
index a2b6f059ab..0000000000
--- a/board/pn62/config.mk
+++ /dev/null
@@ -1,30 +0,0 @@
-#
-# (C) Copyright 2000, 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# PN62 boards
-#
-
-TEXT_BASE = 0xFFF00000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE)
diff --git a/board/pn62/misc.c b/board/pn62/misc.c
deleted file mode 100644
index dcb2db5a9f..0000000000
--- a/board/pn62/misc.c
+++ /dev/null
@@ -1,235 +0,0 @@
-/*
- * (C) Copyright 2002 Wolfgang Grandegger <wg@denx.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc824x.h>
-#include <asm/io.h>
-#include <pci.h>
-
-#include "pn62.h"
-
-typedef struct {
- pci_dev_t devno;
- volatile u32 *csr;
-
-} i2155x_t;
-
-static i2155x_t i2155x = { 0, NULL };
-
-static struct pci_device_id i2155x_ids[] = {
- { 0x1011, 0x0046 }, /* i21554 */
- { 0x8086, 0xb555 } /* i21555 */
-};
-
-int i2155x_init(void)
-{
- pci_dev_t devno;
- u32 val;
- int i;
-
- /*
- * Find the Intel bridge.
- */
- if ((devno = pci_find_devices(i2155x_ids, 0)) < 0) {
- printf("Error: Intel bridge 2155x not found!\n");
- return -1;
- }
- i2155x.devno = devno;
-
- /*
- * Get auto-configured base address for CSR access.
- */
- pci_read_config_dword(devno, PCI_BASE_ADDRESS_1, &val);
- if (val & PCI_BASE_ADDRESS_SPACE_IO) {
- val &= PCI_BASE_ADDRESS_IO_MASK;
- i2155x.csr = (volatile u32 *)(_IO_BASE + val);
- } else {
- val &= PCI_BASE_ADDRESS_MEM_MASK;
- i2155x.csr = (volatile u32 *)val;
- }
-
- /*
- * Translate downstream memory 2 (bar3) to base of shared memory.
- */
- i2155x_set_bar_base(3, PN62_SMEM_DEFAULT);
-
- /*
- * Enable memory space, I/O space and bus master bits
- * in both Primary and Secondary command registers.
- */
- val = PCI_COMMAND_MEMORY|PCI_COMMAND_MASTER|PCI_COMMAND_IO;
- pci_write_config_word(devno, 0x44, val);
- pci_write_config_word(devno, 0x04, val);
-
- /*
- * Clear scratchpad registers.
- */
- for (i = 0; i < (I2155X_SCRAPAD_MAX - 1); i++) {
- i2155x_write_scrapad(i, 0x0);
- }
-
- /*
- * Set interrupt line for Linux.
- */
- pci_write_config_byte(devno, PCI_INTERRUPT_LINE, 3);
-
- return 0;
-}
-
-/*
- * Access the Scratchpad registers 0..7 of the Intel bridge.
- */
-void i2155x_write_scrapad(int idx, u32 val)
-{
- if (idx >= 0 && idx < I2155X_SCRAPAD_MAX)
- out_le32(i2155x.csr + (I2155X_SCRAPAD_ADDR/4) + idx, val);
- else
- printf("i2155x_write_scrapad: invalid index\n");
-}
-
-u32 i2155x_read_scrapad(int idx)
-{
- if (idx >= 0 && idx < I2155X_SCRAPAD_MAX)
- return in_le32(i2155x.csr + (I2155X_SCRAPAD_ADDR/4) + idx);
- else
- printf("i2155x_read_scrapad: invalid index\n");
- return -1;
-}
-
-void i2155x_set_bar_base(int bar, u32 base)
-{
- if (bar >= 2 && bar <= 4) {
- pci_write_config_dword(i2155x.devno,
- I2155X_BAR2_BASE + (bar - 2) * 4,
- base);
- }
-}
-
-/*
- * Read Vital Product Data (VPD) from the Serial EPROM attached
- * to the Intel bridge.
- */
-int i2155x_read_vpd(int offset, int size, unsigned char *data)
-{
- int i, n;
- u16 val16;
-
- for (i = 0; i < size; i++) {
- pci_write_config_word(i2155x.devno, I2155X_VPD_ADDR,
- offset + i - I2155X_VPD_START);
- for (n = 10000; n > 0; n--) {
- pci_read_config_word(i2155x.devno, I2155X_VPD_ADDR, &val16);
- if ((val16 & 0x8000) != 0) /* wait for completion */
- break;
- udelay(100);
- }
- if (n == 0) {
- printf("i2155x_read_vpd: TIMEOUT\n");
- return -1;
- }
-
- pci_read_config_byte(i2155x.devno, I2155X_VPD_DATA, &data[i]);
- }
-
- return i;
-}
-
-static struct pci_device_id am79c95x_ids [] = {
- { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_LANCE },
- { }
-};
-
-
-/*
- * Initialize the AMD ethernet controllers.
- */
-int am79c95x_init(void)
-{
- pci_dev_t devno;
- int i;
-
- /*
- * Set interrupt line for Linux.
- */
- for (i = 0; i < 2; i++) {
- if ((devno = pci_find_devices(am79c95x_ids, i)) < 0)
- break;
- pci_write_config_byte(devno, PCI_INTERRUPT_LINE, 2+i);
- }
- if (i < 2)
- printf("Error: Only %d AMD Ethernet Controller found!\n", i);
-
- return 0;
-}
-
-
-void set_led(unsigned int number, unsigned int function)
-{
- volatile u8 *addr;
-
- if ((number >= 0) && (number < PN62_LED_MAX) &&
- (function >= 0) && (function <= LED_LAST_FUNCTION)) {
- addr = (volatile u8 *)(PN62_LED_BASE + number * 8);
- out_8(addr, function&0xff);
- }
-}
-
-/*
- * Show fatal error indicated by Kinght Rider(tm) effect
- * in LEDS 0-7. LEDS 8-11 contain 4 bit error code.
- * Note: this function will not terminate.
- */
-void fatal_error(unsigned int error_code)
-{
- int i, d;
-
- for (i = 0; i < 12; i++) {
- set_led(i, LED_0);
- }
-
- /*
- * Write error code.
- */
- set_led(8, (error_code & 0x01) ? LED_1 : LED_0);
- set_led(9, (error_code & 0x02) ? LED_1 : LED_0);
- set_led(10, (error_code & 0x04) ? LED_1 : LED_0);
- set_led(11, (error_code & 0x08) ? LED_1 : LED_0);
-
- /*
- * Yay - Knight Rider effect!
- */
- while(1) {
- unsigned int delay = 2000;
-
- for (i = 0; i < 8; i++) {
- set_led(i, LED_1);
- for (d = 0; d < delay; d++);
- set_led(i, LED_0);
- }
-
- for (i = 7; i > 0; i--) {
- set_led(i, LED_1);
- for (d = 0; d < delay; d++);
- set_led(i, LED_0);
- }
- }
-}
diff --git a/board/pn62/pn62.c b/board/pn62/pn62.c
deleted file mode 100644
index 377aaa8bca..0000000000
--- a/board/pn62/pn62.c
+++ /dev/null
@@ -1,189 +0,0 @@
-/*
- * (C) Copyright 2002 Wolfgang Grandegger <wg@denx.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc824x.h>
-#include <pci.h>
-
-#include "pn62.h"
-
-
-static int get_serial_number (char *string, int size);
-static int get_mac_address (int id, u8 * mac, char *string, int size);
-
-#ifdef CONFIG_SHOW_BOOT_PROGRESS
-void show_boot_progress (int phase)
-{
- /*
- * Show phases of the bootm command on the front panel
- * LEDs and the scratchpad register #3 as well. We use
- * blinking LEDs for logical "1".
- */
- if (phase > 0) {
- set_led (8, (phase & 0x1) ? LED_SLOW_CLOCK : LED_0);
- set_led (9, (phase & 0x2) ? LED_SLOW_CLOCK : LED_0);
- set_led (10, (phase & 0x4) ? LED_SLOW_CLOCK : LED_0);
- set_led (11, (phase & 0x8) ? LED_SLOW_CLOCK : LED_0);
- }
- i2155x_write_scrapad (BOOT_STATUS, phase);
- if (phase < 0)
- i2155x_write_scrapad (BOOT_DONE, BOOT_DONE_ERROR);
-}
-#endif
-
-void show_startup_phase (int phase)
-{
- /*
- * Show the phase of U-Boot startup on the front panel
- * LEDs and the scratchpad register #3 as well.
- */
- if (phase > 0) {
- set_led (8, (phase & 0x1) ? LED_1 : LED_0);
- set_led (9, (phase & 0x2) ? LED_1 : LED_0);
- set_led (10, (phase & 0x4) ? LED_1 : LED_0);
- set_led (11, (phase & 0x8) ? LED_1 : LED_0);
- }
- i2155x_write_scrapad (BOOT_STATUS, phase);
- if (phase < 0)
- i2155x_write_scrapad (BOOT_DONE, BOOT_DONE_ERROR);
-}
-
-int checkboard (void)
-{
- show_startup_phase (1);
- puts ("Board: PN62\n");
- return 0;
-}
-
-long int initdram (int board_type)
-{
- long size;
- long new_bank0_end;
- long mear1;
- long emear1;
-
- show_startup_phase (2);
-
- size = get_ram_size(CFG_SDRAM_BASE, CFG_MAX_RAM_SIZE);
-
- new_bank0_end = size - 1;
- mear1 = mpc824x_mpc107_getreg (MEAR1);
- emear1 = mpc824x_mpc107_getreg (EMEAR1);
- mear1 = (mear1 & 0xFFFFFF00) |
- ((new_bank0_end & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT);
- emear1 = (emear1 & 0xFFFFFF00) |
- ((new_bank0_end & MICR_ADDR_MASK) >> MICR_EADDR_SHIFT);
- mpc824x_mpc107_setreg (MEAR1, mear1);
- mpc824x_mpc107_setreg (EMEAR1, emear1);
-
- return (size);
-}
-
-/*
- * Initialize PCI Devices. We rely on auto-configuration.
- */
-#ifndef CONFIG_PCI_PNP
-#error "CONFIG_PCI_PNP is not defined, please correct!"
-#endif
-
-struct pci_controller hose = {
-};
-
-void pci_init_board (void)
-{
- show_startup_phase (4);
- pci_mpc824x_init (&hose);
-
- show_startup_phase (5);
- i2155x_init ();
- show_startup_phase (6);
- am79c95x_init ();
- show_startup_phase (7);
-}
-
-int misc_init_r (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- char str[20];
- u8 mac[6];
-
- show_startup_phase (8);
- /*
- * Get serial number and ethernet addresses if not already defined
- * and update the board info structure and the environment.
- */
- if (getenv ("serial#") == NULL &&
- get_serial_number (str, strlen (str)) > 0) {
- setenv ("serial#", str);
- }
- show_startup_phase (9);
-
- if (getenv ("ethaddr") == NULL &&
- get_mac_address (0, mac, str, sizeof (str)) > 0) {
- setenv ("ethaddr", str);
- memcpy (gd->bd->bi_enetaddr, mac, 6);
- }
- show_startup_phase (10);
-
-#ifdef CONFIG_HAS_ETH1
- if (getenv ("eth1addr") == NULL &&
- get_mac_address (1, mac, str, sizeof (str)) > 0) {
- setenv ("eth1addr", str);
- memcpy (gd->bd->bi_enet1addr, mac, 6);
- }
-#endif /* CONFIG_HAS_ETH1 */
- show_startup_phase (11);
-
- /* Tell everybody that U-Boot is up and runnig */
- i2155x_write_scrapad (0, 0x12345678);
- return (0);
-}
-
-static int get_serial_number (char *string, int size)
-{
- int i;
- char c;
-
- if (size < I2155X_VPD_SN_SIZE)
- size = I2155X_VPD_SN_SIZE;
- for (i = 0; i < (size - 1); i++) {
- i2155x_read_vpd (I2155X_VPD_SN_START + i, 1, (uchar *)&c);
- if (c == '\0')
- break;
- string[i] = c;
- }
- string[i] = '\0'; /* make sure it's terminated */
-
- return i;
-}
-
-static int get_mac_address (int id, u8 * mac, char *string, int size)
-{
- if (size < 6 * 3)
- return -1;
-
- i2155x_read_vpd (I2155X_VPD_MAC0_START + 6 * id, 6, mac);
- return sprintf (string, "%02x:%02x:%02x:%02x:%02x:%02x",
- mac[0], mac[1], mac[2],
- mac[3], mac[4], mac[5]);
-}
diff --git a/board/pn62/pn62.h b/board/pn62/pn62.h
deleted file mode 100644
index 7bda0ad9d0..0000000000
--- a/board/pn62/pn62.h
+++ /dev/null
@@ -1,161 +0,0 @@
-/*
- * (C) Copyright 2002 Wolfgang Grandegger <wg@denx.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef _PN62_H_
-#define _PN62_H_
-
-/*
- * Definitions for the Intel Bridge 21554 or 21555.
- */
-#define I2155X_VPD_ADDR 0xe6
-#define I2155X_VPD_DATA 0xe8
-
-#define I2155X_VPD_START 0x80
-#define I2155X_VPD_SN_START 0x80
-#define I2155X_VPD_SN_SIZE 0x10
-#define I2155X_VPD_MAC0_START 0x90
-#define I2155X_VPD_MAC1_START 0x96
-
-#define I2155X_SCRAPAD_ADDR 0xa8
-#define I2155X_SCRAPAD_MAX 8
-
-#define I2155X_BAR2_BASE 0x98
-#define I2155X_BAR3_BASE 0x9c
-#define I2155X_BAR4_BASE 0xa0
-
-#define I2155X_BAR2_SETUP 0xb0
-#define I2155X_BAR3_SETUP 0xb4
-#define I2155X_BAR4_SETUP 0xb8
-
-/*
- * Interrupt request numbers
- */
-#define PN62_IRQ_HOST 0x0
-#define PN62_IRQ_PLX9054 0x1
-#define PN62_IRQ_ETH0 0x2
-#define PN62_IRQ_ETH1 0x3
-#define PN62_IRQ_COM1 0x4
-#define PN62_IRQ_COM2 0x4
-
-/*
- * Miscellaneous definitons.
- */
-#define PN62_SMEM_DEFAULT 0x1f00000
-
-/*
- * Definitions for boot protocol using Scratchpad registers.
- */
-#define BOOT_DONE 0
-#define BOOT_DONE_CLEAR 0x00dead00
-#define BOOT_DONE_ERROR 0xbad0dead
-#define BOOT_DONE_U_BOOT 0x12345678
-#define BOOT_DONE_LINUX 0x87654321
-#define BOOT_CMD 1
-#define BOOT_CMD_MOVE 0x1
-#define BOOT_CMD_BOOT 0x2
-#define BOOT_DATA 2
-#define BOOT_PROTO 3
-#define BOOT_PROTO_READY 0x23456789
-#define BOOT_PROTO_CLEAR 0x00000000
-#define BOOT_STATUS 4
-
-/*
- * LED Definitions:
- */
-#define PN62_LED_BASE 0xff800300
-#define PN62_LED_MAX 12
-
-/*
- * LED0 - 7 mounted on top of board, D1 - D8
- * LED8 - 11 upper four LEDs on the front panel of the board.
- */
-#define LED_0 0x00 /* OFF */
-#define LED_1 0x01 /* ON */
-#define LED_SLOW_CLOCK 0x02 /* SLOW 1Hz ish */
-#define LED_nSLOW_CLOCK 0x03 /* inverse of above */
-#define LED_WATCHDOG_OUT 0x06 /* Reset Watchdog level */
-#define LED_WATCHDOG_CLOCK 0x07 /* clock to watchdog */
-
-/*
- * LED's currently setup in AMD79C973 device as the following:
- * LED0 100Mbit
- * LED1 LNKSE
- * LED2 TX Activity
- * LED3 RX Activity
- */
-#define LED_E0_LED0 0x08 /* Ethernet Port 0 LED 0 */
-#define LED_E0_LED1 0x09 /* Ethernet Port 0 LED 1 */
-#define LED_E0_LED2 0x0A /* Ethernet Port 0 LED 2 */
-#define LED_E0_LED3 0x0B /* Ethernet Port 0 LED 3 */
-#define LED_E1_LED0 0x0C /* Ethernet Port 1 LED 0 */
-#define LED_E1_LED1 0x0D /* Ethernet Port 1 LED 1 */
-#define LED_E1_LED2 0x0E /* Ethernet Port 1 LED 2 */
-#define LED_E1_LED3 0x0F /* Ethernet Port 1 LED 3 */
-#define LED_STROBE0 0x10 /* Processor Strobe 0 */
-#define LED_STROBE1 0x11 /* Processor Strobe 1 */
-#define LED_STROBE2 0x12 /* Processor Strobe 2 */
-#define LED_STROBE3 0x13 /* Processor Strobe 3 */
-#define LED_STROBE4 0x14 /* Processor Strobe 4 */
-#define LED_STROBE5 0x15 /* Processor Strobe 5 */
-#define LED_STROBE6 0x16 /* Processor Strobe 6 */
-#define LED_STROBE7 0x17 /* Processor Strobe 7 */
-#define LED_HOST_STROBE0 0x18 /* Host strobe 0 */
-#define LED_HOST_STROBE1 0x19 /* Host strobe 1 */
-#define LED_HOST_STROBE2 0x1A /* Host strobe 2 */
-#define LED_HOST_STROBE3 0x1B /* Host strobe 3 */
-#define LED_HOST_STROBE4 0x1C /* Host strobe 4 */
-#define LED_HOST_STROBE5 0x1D /* Host strobe 5 */
-#define LED_HOST_STROBE6 0x1E /* Host strobe 6 */
-#define LED_HOST_STROBE7 0x1F /* Host strobe 7 */
-#define LED_MPC_INT0 0x20 /* MPC8240 INT 0 */
-#define LED_MPC_INT1 0x21 /* MPC8240 INT 1 */
-#define LED_MPC_INT2 0x22 /* MPC8240 INT 2 */
-#define LED_MPC_INT3 0x23 /* MPC8240 INT 3 */
-#define LED_MPC_INT4 0x24 /* MPC8240 INT 4 */
-#define LED_UART0_CS 0x25 /* UART 0 Chip Select */
-#define LED_UART1_CS 0x26 /* UART 1 Chip Select */
-#define LED_SRAM_CS 0x27 /* SRAM Chip Select */
-#define LED_SRAM_WR 0x28 /* SRAM WR Signal */
-#define LED_SRAM_RD 0x29 /* SRAM RD Signal */
-#define LED_MPC_RCS0 0x2A /* MPC8240 RCS0 Signal */
-#define LED_S_PCI_FRAME 0x2B /* Secondary PCI Frame Signal */
-#define LED_MPC_CS0 0x2C /* MPC8240 CS0 Signal */
-#define LED_HOST_INT 0x2D /* MPC8240 to Host Interrupt signal */
-#define LED_LAST_FUNCTION LED_HOST_INT /* last function */
-
-/*
- * Forward declarations
- */
-int i2155x_init (void);
-void i2155x_write_scrapad(int idx, u32 val);
-u32 i2155x_read_scrapad (int idx);
-void i2155x_set_bar_base (int bar, u32 addr);
-int i2155x_read_vpd (int offset, int size, unsigned char *data);
-
-int am79c95x_init (void);
-
-void set_led (unsigned int number, unsigned int function);
-void fatal_error (unsigned int error_code);
-void show_startup_phase (int phase);
-
-
-#endif /* _PN62_H_ */
diff --git a/board/pn62/u-boot.lds b/board/pn62/u-boot.lds
deleted file mode 100644
index eaee3fdefc..0000000000
--- a/board/pn62/u-boot.lds
+++ /dev/null
@@ -1,136 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc824x/start.o (.text)
- lib_ppc/board.o (.text)
- lib_ppc/ppcstring.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
- lib_generic/zlib.o (.text)
-
- . = DEFINED(env_offset) ? env_offset : .;
- common/environment.o (.text)
-
- *(.text)
-
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
-
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/ppmc8260/Makefile b/board/ppmc8260/Makefile
deleted file mode 100644
index 351f4eea2f..0000000000
--- a/board/ppmc8260/Makefile
+++ /dev/null
@@ -1,46 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := ppmc8260.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/ppmc8260/config.mk b/board/ppmc8260/config.mk
deleted file mode 100644
index d06fcead27..0000000000
--- a/board/ppmc8260/config.mk
+++ /dev/null
@@ -1,34 +0,0 @@
-#
-# (C) Copyright 2000
-# Sysgo Real-Time Solutions, GmbH <www.elinos.com>
-# Marius Groeger <mgroeger@sysgo.de>
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# MBX8xx boards
-#
-
-TEXT_BASE = 0xfe000000
-TEXT_END = 0xfe080000
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
diff --git a/board/ppmc8260/ppmc8260.c b/board/ppmc8260/ppmc8260.c
deleted file mode 100644
index 2b20c26f17..0000000000
--- a/board/ppmc8260/ppmc8260.c
+++ /dev/null
@@ -1,307 +0,0 @@
-/*
- * (C) Copyright 2000
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * (C) Copyright 2001
- * Advent Networks, Inc. <http://www.adventnetworks.com>
- * Jay Monkman <jtm@smoothsmoothie.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <ioports.h>
-#include <mpc8260.h>
-
-/*
- * I/O Port configuration table
- *
- * if conf is 1, then that port pin will be configured at boot time
- * according to the five values podr/pdir/ppar/psor/pdat for that entry
- */
-
-const iop_conf_t iop_conf_tab[4][32] = {
-
-
- /* Port A configuration */
- { /* conf ppar psor pdir podr pdat */
- /* PA31 */ { 0, 0, 0, 0, 0, 0 }, /* FCC1 *ATMTXEN */
- /* PA30 */ { 0, 0, 0, 0, 0, 0 }, /* FCC1 ATMTCA */
- /* PA29 */ { 0, 0, 0, 0, 0, 0 }, /* FCC1 ATMTSOC */
- /* PA28 */ { 0, 0, 0, 0, 0, 0 }, /* FCC1 *ATMRXEN */
- /* PA27 */ { 0, 0, 0, 0, 0, 0 }, /* FCC1 ATMRSOC */
- /* PA26 */ { 0, 0, 0, 0, 0, 0 }, /* FCC1 ATMRCA */
- /* PA25 */ { 0, 0, 0, 0, 0, 0 }, /* FCC1 ATMTXD[0] */
- /* PA24 */ { 0, 0, 0, 0, 0, 0 }, /* FCC1 ATMTXD[1] */
- /* PA23 */ { 0, 0, 0, 0, 0, 0 }, /* FCC1 ATMTXD[2] */
- /* PA22 */ { 0, 0, 0, 0, 0, 0 }, /* FCC1 ATMTXD[3] */
- /* PA21 */ { 0, 0, 0, 0, 0, 0 }, /* FCC1 ATMTXD[4] */
- /* PA20 */ { 0, 0, 0, 0, 0, 0 }, /* FCC1 ATMTXD[5] */
- /* PA19 */ { 0, 0, 0, 0, 0, 0 }, /* FCC1 ATMTXD[6] */
- /* PA18 */ { 0, 0, 0, 0, 0, 0 }, /* FCC1 ATMTXD[7] */
- /* PA17 */ { 0, 0, 0, 0, 0, 0 }, /* FCC1 ATMRXD[7] */
- /* PA16 */ { 0, 0, 0, 0, 0, 0 }, /* FCC1 ATMRXD[6] */
- /* PA15 */ { 0, 0, 0, 0, 0, 0 }, /* FCC1 ATMRXD[5] */
- /* PA14 */ { 0, 0, 0, 0, 0, 0 }, /* FCC1 ATMRXD[4] */
- /* PA13 */ { 0, 0, 0, 0, 0, 0 }, /* FCC1 ATMRXD[3] */
- /* PA12 */ { 0, 0, 0, 0, 0, 0 }, /* FCC1 ATMRXD[2] */
- /* PA11 */ { 0, 0, 0, 0, 0, 0 }, /* FCC1 ATMRXD[1] */
- /* PA10 */ { 0, 0, 0, 0, 0, 0 }, /* FCC1 ATMRXD[0] */
- /* PA9 */ { 1, 1, 0, 1, 0, 0 }, /* SMC2 TXD */
- /* PA8 */ { 1, 1, 0, 0, 0, 0 }, /* SMC2 RXD */
- /* PA7 */ { 1, 0, 0, 1, 0, 0 }, /* TDM_A1:L1TSYNC */
- /* PA6 */ { 1, 0, 0, 1, 0, 0 }, /* TDN_A1:L1RSYNC */
- /* PA5 */ { 0, 0, 0, 0, 0, 0 }, /* PA5 */
- /* PA4 */ { 0, 0, 0, 0, 0, 0 }, /* PA4 */
- /* PA3 */ { 0, 0, 0, 0, 0, 0 }, /* PA3 */
- /* PA2 */ { 0, 0, 0, 0, 0, 0 }, /* PA2 */
- /* PA1 */ { 0, 0, 0, 0, 0, 0 }, /* PA1 */
- /* PA0 */ { 0, 0, 0, 0, 0, 0 } /* PA0 */
- },
-
- /* Port B configuration */
- { /* conf ppar psor pdir podr pdat */
- /* PB31 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TX_ER */
- /* PB30 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_DV */
- /* PB29 */ { 1, 1, 1, 1, 0, 0 }, /* FCC2 MII TX_EN */
- /* PB28 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_ER */
- /* PB27 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII COL */
- /* PB26 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII CRS */
- /* PB25 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[3] */
- /* PB24 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[2] */
- /* PB23 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[1] */
- /* PB22 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[0] */
- /* PB21 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[0] */
- /* PB20 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[1] */
- /* PB19 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[2] */
- /* PB18 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[3] */
- /* PB17 */ { 0, 0, 0, 0, 0, 0 }, /* PB17 */
- /* PB16 */ { 1, 0, 0, 0, 0, 0 }, /* TDM_A1:L1CLK0 */
- /* PB15 */ { 1, 0, 0, 1, 0, 1 }, /* /FETHRST */
- /* PB14 */ { 1, 0, 0, 1, 0, 0 }, /* FETHDIS */
- /* PB13 */ { 0, 0, 0, 0, 0, 0 }, /* PB13 */
- /* PB12 */ { 1, 0, 0, 1, 0, 0 }, /* TDM_B1:L1CLK0 */
- /* PB11 */ { 1, 0, 0, 1, 0, 0 }, /* TDM_D1:L1TXD */
- /* PB10 */ { 1, 0, 0, 1, 0, 0 }, /* TDM_D1:L1RXD */
- /* PB9 */ { 1, 0, 0, 1, 0, 0 }, /* TDM_D1:L1TSYNC */
- /* PB8 */ { 1, 0, 0, 1, 0, 0 }, /* TDM_D1:L1RSYNC */
- /* PB7 */ { 0, 0, 0, 0, 0, 0 }, /* PB7 */
- /* PB6 */ { 0, 0, 0, 0, 0, 0 }, /* PB6 */
- /* PB5 */ { 0, 0, 0, 0, 0, 0 }, /* PB5 */
- /* PB4 */ { 0, 0, 0, 0, 0, 0 }, /* PB4 */
- /* PB3 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PB2 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PB1 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PB0 */ { 0, 0, 0, 0, 0, 0 } /* pin doesn't exist */
- },
-
- /* Port C */
- { /* conf ppar psor pdir podr pdat */
- /* PC31 */ { 0, 0, 0, 0, 0, 0 }, /* PC31 */
- /* PC30 */ { 0, 0, 0, 0, 0, 0 }, /* PC30 */
- /* PC29 */ { 0, 0, 0, 0, 0, 0 }, /* PC28 */
- /* PC28 */ { 1, 1, 0, 0, 0, 0 }, /* CLK4 */
- /* PC27 */ { 0, 0, 0, 0, 0, 0 }, /* PC27 */
- /* PC26 */ { 0, 0, 0, 0, 0, 0 }, /* PC26 */
- /* PC25 */ { 1, 1, 0, 0, 0, 0 }, /* CLK7 */
- /* PC24 */ { 0, 0, 0, 0, 0, 0 }, /* PC24 */
- /* PC23 */ { 1, 0, 0, 1, 0, 0 }, /* ATMTFCLK */
- /* PC22 */ { 0, 0, 0, 0, 0, 0 }, /* PC22 */
- /* PC21 */ { 0, 0, 0, 0, 0, 0 }, /* PC23 */
- /* PC20 */ { 0, 0, 0, 0, 0, 0 }, /* PC24 */
- /* PC19 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_CLK */
- /* PC18 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII TX_CLK */
- /* PC17 */ { 0, 0, 0, 0, 0, 0 }, /* PC17 */
- /* PC16 */ { 0, 0, 0, 0, 0, 0 }, /* PC16 */
- /* PC15 */ { 1, 0, 0, 1, 0, 0 }, /* FCC1:TxAddr[0] */
- /* PC14 */ { 1, 0, 0, 1, 0, 0 }, /* FCC1:RxAddr[0] */
- /* PC13 */ { 1, 0, 0, 1, 0, 0 }, /* FCC1:TxAddr[1] */
- /* PC12 */ { 1, 0, 0, 1, 0, 0 }, /* FCC1:RxAddr[1] */
- /* PC11 */ { 1, 1, 0, 1, 0, 0 }, /* TDM_D1:L1CLK0 */
- /* PC10 */ { 1, 0, 0, 1, 0, 0 }, /* FCC2 MDC */
- /* PC9 */ { 1, 0, 0, 1, 0, 0 }, /* FCC2 MDIO */
- /* PC8 */ { 0, 0, 0, 0, 0, 0 }, /* PC8 */
- /* PC7 */ { 1, 0, 0, 1, 0, 0 }, /* FCC1:TxAddr[2]*/
- /* PC6 */ { 1, 0, 0, 1, 0, 0 }, /* FCC1:RxAddr[2] */
- /* PC5 */ { 0, 0, 0, 0, 0, 0 }, /* PC5 */
- /* PC4 */ { 0, 0, 0, 0, 0, 0 }, /* PC4 */
- /* PC3 */ { 1, 0, 0, 1, 0, 0 }, /* IDMA2:DACK */
- /* PC2 */ { 1, 0, 0, 1, 0, 0 }, /* IDMA2:DONE */
- /* PC1 */ { 1, 0, 0, 1, 0, 0 }, /* IDMA2:DREQ */
- /* PC0 */ { 1, 0, 0, 1, 0, 0 }, /* IDMA1:DREQ */
- },
-
- /* Port D */
- { /* conf ppar psor pdir podr pdat */
- /* PD31 */ { 0, 0, 0, 0, 0, 0 }, /* PD31 */
- /* PD30 */ { 0, 0, 0, 0, 0, 0 }, /* PD30 */
- /* PD29 */ { 1, 0, 0, 1, 0, 0 }, /* FCC1:RxAddr[3] */
- /* PD28 */ { 0, 0, 0, 0, 0, 0 }, /* PD28 */
- /* PD27 */ { 0, 0, 0, 0, 0, 0 }, /* PD27 */
- /* PD26 */ { 1, 0, 0, 1, 0, 0 }, /* TDM_C1:L1RSYNC */
- /* PD25 */ { 0, 0, 0, 0, 0, 0 }, /* PD25 */
- /* PD24 */ { 0, 0, 0, 0, 0, 0 }, /* PD24 */
- /* PD23 */ { 0, 0, 0, 0, 0, 0 }, /* PD23 */
- /* PD22 */ { 0, 0, 0, 0, 0, 0 }, /* PD22 */
- /* PD21 */ { 0, 0, 0, 0, 0, 0 }, /* PD21 */
- /* PD20 */ { 0, 0, 0, 0, 0, 0 }, /* PD20 */
- /* PD19 */ { 0, 0, 0, 0, 0, 0 }, /* PD19 */
- /* PD18 */ { 0, 0, 0, 0, 0, 0 }, /* PD19 */
- /* PD17 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXPRTY */
- /* PD16 */ { 1, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXPRTY */
- /* PD15 */ { 1, 1, 1, 0, 1, 0 }, /* I2C SDA */
- /* PD14 */ { 1, 1, 1, 0, 1, 0 }, /* I2C SCL */
- /* PD13 */ { 1, 0, 0, 0, 0, 0 }, /* TDM_B1:L1TXD */
- /* PD12 */ { 1, 0, 0, 0, 0, 0 }, /* TDM_B1:L1RXD */
- /* PD11 */ { 1, 0, 0, 0, 0, 0 }, /* TDM_B1:L1TSYNC */
- /* PD10 */ { 1, 0, 0, 0, 0, 0 }, /* TDM_B1:L1RSYNC*/
- /* PD9 */ { 1, 1, 0, 1, 0, 0 }, /* SMC1:TXD */
- /* PD8 */ { 1, 1, 0, 0, 0, 0 }, /* SMC1:RXD */
- /* PD7 */ { 1, 1, 0, 0, 0, 0 }, /* SMC1:SMSYN */
- /* PD6 */ { 1, 0, 0, 1, 0, 0 }, /* IDMA1:DACK */
- /* PD5 */ { 1, 0, 0, 1, 0, 0 }, /* IDMA1:DONE */
- /* PD4 */ { 0, 0, 0, 0, 0, 0 }, /* PD4 */
- /* PD3 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PD2 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PD1 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PD0 */ { 0, 0, 0, 0, 0, 0 } /* pin doesn't exist */
- }
-};
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Check Board Identity:
- */
-
-int checkboard (void)
-{
- puts ("Board: Wind River PPMC8260\n");
- return 0;
-}
-
-/* ------------------------------------------------------------------------- */
-
-long int initdram (int board_type)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8260_t *memctl = &immap->im_memctl;
- volatile uchar c = 0xff;
- volatile uchar *ramaddr0 = (uchar *) (CFG_SDRAM0_BASE);
- volatile uchar *ramaddr1 = (uchar *) (CFG_SDRAM1_BASE);
- ulong psdmr = CFG_PSDMR;
- volatile uchar *ramaddr2 = (uchar *) (CFG_SDRAM2_BASE);
- ulong lsdmr = CFG_LSDMR;
- int i;
-
- /*
- * Quote from 8260 UM (10.4.2 SDRAM Power-On Initialization, 10-35):
- *
- * "At system reset, initialization software must set up the
- * programmable parameters in the memory controller banks registers
- * (ORx, BRx, P/LSDMR). After all memory parameters are configured,
- * system software should execute the following initialization sequence
- * for each SDRAM device.
- *
- * 1. Issue a PRECHARGE-ALL-BANKS command
- * 2. Issue eight CBR REFRESH commands
- * 3. Issue a MODE-SET command to initialize the mode register
- *
- * The initial commands are executed by setting P/LSDMR[OP] and
- * accessing the SDRAM with a single-byte transaction."
- *
- * The appropriate BRx/ORx registers have already been set when we
- * get here. The SDRAM can be accessed at the address CFG_SDRAM_BASE.
- */
-
- memctl->memc_psrt = CFG_PSRT;
- memctl->memc_mptpr = CFG_MPTPR;
-
-#ifndef CFG_RAMBOOT
- memctl->memc_psdmr = psdmr | PSDMR_OP_PREA;
- *ramaddr0++ = c;
- *ramaddr1++ = c;
-
- memctl->memc_psdmr = psdmr | PSDMR_OP_CBRR;
- for (i = 0; i < 8; i++) {
- *ramaddr0++ = c;
- *ramaddr1++ = c;
- }
-
- memctl->memc_psdmr = psdmr | PSDMR_OP_MRW;
- ramaddr0 = (uchar *) (CFG_SDRAM0_BASE + 0x110);
- ramaddr1 = (uchar *) (CFG_SDRAM1_BASE + 0x110);
- *ramaddr0 = c;
- *ramaddr1 = c;
-
- memctl->memc_psdmr = psdmr | PSDMR_OP_NORM | PSDMR_RFEN;
- *ramaddr0 = c;
- *ramaddr1 = c;
-
- memctl->memc_lsdmr = lsdmr | PSDMR_OP_PREA;
- *ramaddr2++ = c;
-
- memctl->memc_lsdmr = lsdmr | PSDMR_OP_CBRR;
- for (i = 0; i < 8; i++) {
- *ramaddr2++ = c;
- }
-
- memctl->memc_lsdmr = lsdmr | PSDMR_OP_MRW;
- *ramaddr2++ = c;
-
- memctl->memc_lsdmr = lsdmr | PSDMR_OP_NORM | PSDMR_RFEN;
- *ramaddr2 = c;
-#endif
-
- /* return total ram size */
- return ((CFG_SDRAM0_SIZE + CFG_SDRAM1_SIZE) * 1024 * 1024);
-}
-
-#ifdef CONFIG_MISC_INIT_R
-/* ------------------------------------------------------------------------- */
-int misc_init_r (void)
-{
-#ifdef CFG_LED_BASE
- uchar ds = *(unsigned char *) (CFG_LED_BASE + 1);
- uchar ss;
- uchar tmp[64];
- int res;
-
- if ((ds != 0) && (ds != 0xff)) {
- res = getenv_r ("ethaddr", (char *)tmp, sizeof (tmp));
- if (res > 0) {
- ss = ((ds >> 4) & 0x0f);
- ss += ss < 0x0a ? '0' : ('a' - 10);
- tmp[15] = ss;
-
- ss = (ds & 0x0f);
- ss += ss < 0x0a ? '0' : ('a' - 10);
- tmp[16] = ss;
-
- tmp[17] = '\0';
- setenv ("ethaddr", (char *)tmp);
- /* set the led to show the address */
- *((unsigned char *) (CFG_LED_BASE + 1)) = ds;
- }
- }
-#endif /* CFG_LED_BASE */
- return (0);
-}
-#endif /* CONFIG_MISC_INIT_R */
diff --git a/board/ppmc8260/strataflash.c b/board/ppmc8260/strataflash.c
deleted file mode 100644
index f9abfac73f..0000000000
--- a/board/ppmc8260/strataflash.c
+++ /dev/null
@@ -1,752 +0,0 @@
-/*
- * (C) Copyright 2002
- * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc8260.h>
-#include <asm/processor.h>
-
-#undef DEBUG_FLASH
-/*
- * This file implements a Common Flash Interface (CFI) driver for U-Boot.
- * The width of the port and the width of the chips are determined at initialization.
- * These widths are used to calculate the address for access CFI data structures.
- * It has been tested on an Intel Strataflash implementation.
- *
- * References
- * JEDEC Standard JESD68 - Common Flash Interface (CFI)
- * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
- * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
- * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
- *
- * TODO
- * Use Primary Extended Query table (PRI) and Alternate Algorithm Query Table (ALT) to determine if protection is available
- * Add support for other command sets Use the PRI and ALT to determine command set
- * Verify erase and program timeouts.
- */
-
-#define FLASH_CMD_CFI 0x98
-#define FLASH_CMD_READ_ID 0x90
-#define FLASH_CMD_RESET 0xff
-#define FLASH_CMD_BLOCK_ERASE 0x20
-#define FLASH_CMD_ERASE_CONFIRM 0xD0
-#define FLASH_CMD_WRITE 0x40
-#define FLASH_CMD_PROTECT 0x60
-#define FLASH_CMD_PROTECT_SET 0x01
-#define FLASH_CMD_PROTECT_CLEAR 0xD0
-#define FLASH_CMD_CLEAR_STATUS 0x50
-#define FLASH_CMD_WRITE_TO_BUFFER 0xE8
-#define FLASH_CMD_WRITE_BUFFER_CONFIRM 0xD0
-
-#define FLASH_STATUS_DONE 0x80
-#define FLASH_STATUS_ESS 0x40
-#define FLASH_STATUS_ECLBS 0x20
-#define FLASH_STATUS_PSLBS 0x10
-#define FLASH_STATUS_VPENS 0x08
-#define FLASH_STATUS_PSS 0x04
-#define FLASH_STATUS_DPS 0x02
-#define FLASH_STATUS_R 0x01
-#define FLASH_STATUS_PROTECT 0x01
-
-#define FLASH_OFFSET_CFI 0x55
-#define FLASH_OFFSET_CFI_RESP 0x10
-#define FLASH_OFFSET_WTOUT 0x1F
-#define FLASH_OFFSET_WBTOUT 0x20
-#define FLASH_OFFSET_ETOUT 0x21
-#define FLASH_OFFSET_CETOUT 0x22
-#define FLASH_OFFSET_WMAX_TOUT 0x23
-#define FLASH_OFFSET_WBMAX_TOUT 0x24
-#define FLASH_OFFSET_EMAX_TOUT 0x25
-#define FLASH_OFFSET_CEMAX_TOUT 0x26
-#define FLASH_OFFSET_SIZE 0x27
-#define FLASH_OFFSET_INTERFACE 0x28
-#define FLASH_OFFSET_BUFFER_SIZE 0x2A
-#define FLASH_OFFSET_NUM_ERASE_REGIONS 0x2C
-#define FLASH_OFFSET_ERASE_REGIONS 0x2D
-#define FLASH_OFFSET_PROTECT 0x02
-#define FLASH_OFFSET_USER_PROTECTION 0x85
-#define FLASH_OFFSET_INTEL_PROTECTION 0x81
-
-
-#define FLASH_MAN_CFI 0x01000000
-
-
-typedef union {
- unsigned char c;
- unsigned short w;
- unsigned long l;
-} cfiword_t;
-
-typedef union {
- unsigned char * cp;
- unsigned short *wp;
- unsigned long *lp;
-} cfiptr_t;
-
-#define NUM_ERASE_REGIONS 4
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-
-
-static void flash_add_byte(flash_info_t *info, cfiword_t * cword, uchar c);
-static void flash_make_cmd(flash_info_t * info, uchar cmd, void * cmdbuf);
-static void flash_write_cmd(flash_info_t * info, int sect, uchar offset, uchar cmd);
-static int flash_isequal(flash_info_t * info, int sect, uchar offset, uchar cmd);
-static int flash_isset(flash_info_t * info, int sect, uchar offset, uchar cmd);
-static int flash_detect_cfi(flash_info_t * info);
-static ulong flash_get_size (ulong base, int banknum);
-static int flash_write_cfiword (flash_info_t *info, ulong dest, cfiword_t cword);
-static int flash_full_status_check(flash_info_t * info, ulong sector, ulong tout, char * prompt);
-#ifdef CFG_FLASH_USE_BUFFER_WRITE
-static int flash_write_cfibuffer(flash_info_t * info, ulong dest, uchar * cp, int len);
-#endif
-/*-----------------------------------------------------------------------
- * create an address based on the offset and the port width
- */
-inline uchar * flash_make_addr(flash_info_t * info, int sect, int offset)
-{
- return ((uchar *)(info->start[sect] + (offset * info->portwidth)));
-}
-/*-----------------------------------------------------------------------
- * read a character at a port width address
- */
-inline uchar flash_read_uchar(flash_info_t * info, uchar offset)
-{
- uchar *cp;
- cp = flash_make_addr(info, 0, offset);
- return (cp[info->portwidth - 1]);
-}
-
-/*-----------------------------------------------------------------------
- * read a short word by swapping for ppc format.
- */
-ushort flash_read_ushort(flash_info_t * info, int sect, uchar offset)
-{
- uchar * addr;
-
- addr = flash_make_addr(info, sect, offset);
- return ((addr[(2*info->portwidth) - 1] << 8) | addr[info->portwidth - 1]);
-
-}
-
-/*-----------------------------------------------------------------------
- * read a long word by picking the least significant byte of each maiximum
- * port size word. Swap for ppc format.
- */
-ulong flash_read_long(flash_info_t * info, int sect, uchar offset)
-{
- uchar * addr;
-
- addr = flash_make_addr(info, sect, offset);
- return ( (addr[(2*info->portwidth) - 1] << 24 ) | (addr[(info->portwidth) -1] << 16) |
- (addr[(4*info->portwidth) - 1] << 8) | addr[(3*info->portwidth) - 1]);
-
-}
-
-/*-----------------------------------------------------------------------
- */
-unsigned long flash_init (void)
-{
- unsigned long size;
- int i;
- unsigned long address;
-
-
- /* The flash is positioned back to back, with the demultiplexing of the chip
- * based on the A24 address line.
- *
- */
-
- address = CFG_FLASH_BASE;
- size = 0;
-
-
- /* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- size += flash_info[i].size = flash_get_size(address, i);
- address += CFG_FLASH_INCREMENT;
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n",i,
- flash_info[0].size, flash_info[i].size<<20);
- }
- }
-
- /* Monitor protection ON by default */
-#if (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
- for(i=0; flash_info[0].start[i] < CFG_MONITOR_BASE+monitor_flash_len-1; i++)
- (void)flash_real_protect(&flash_info[0], i, 1);
-#endif
-
- return (size);
-}
-
-/*-----------------------------------------------------------------------
- */
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- int rcode = 0;
- int prot;
- int sect;
-
- if( info->flash_id != FLASH_MAN_CFI) {
- printf ("Can't erase unknown flash type - aborted\n");
- return 1;
- }
- if ((s_first < 0) || (s_first > s_last)) {
- printf ("- no sectors to erase\n");
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
-
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- flash_write_cmd(info, sect, 0, FLASH_CMD_CLEAR_STATUS);
- flash_write_cmd(info, sect, 0, FLASH_CMD_BLOCK_ERASE);
- flash_write_cmd(info, sect, 0, FLASH_CMD_ERASE_CONFIRM);
-
- if(flash_full_status_check(info, sect, info->erase_blk_tout, "erase")) {
- rcode = 1;
- } else
- printf(".");
- }
- }
- printf (" done\n");
- return rcode;
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t *info)
-{
- int i;
-
- if (info->flash_id != FLASH_MAN_CFI) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- printf("CFI conformant FLASH (%d x %d)",
- (info->portwidth << 3 ), (info->chipwidth << 3 ));
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
- printf(" Erase timeout %ld ms, write timeout %ld ms, buffer write timeout %ld ms, buffer size %d\n",
- info->erase_blk_tout, info->write_tout, info->buffer_write_tout, info->buffer_size);
-
- printf (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n");
- printf (" %08lX%5s",
- info->start[i],
- info->protect[i] ? " (RO)" : " "
- );
- }
- printf ("\n");
- return;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong wp;
- ulong cp;
- int aln;
- cfiword_t cword;
- int i, rc;
-
- /* get lower aligned address */
- wp = (addr & ~(info->portwidth - 1));
-
- /* handle unaligned start */
- if((aln = addr - wp) != 0) {
- cword.l = 0;
- cp = wp;
- for(i=0;i<aln; ++i, ++cp)
- flash_add_byte(info, &cword, (*(uchar *)cp));
-
- for(; (i< info->portwidth) && (cnt > 0) ; i++) {
- flash_add_byte(info, &cword, *src++);
- cnt--;
- cp++;
- }
- for(; (cnt == 0) && (i < info->portwidth); ++i, ++cp)
- flash_add_byte(info, &cword, (*(uchar *)cp));
- if((rc = flash_write_cfiword(info, wp, cword)) != 0)
- return rc;
- wp = cp;
- }
-
-#ifdef CFG_FLASH_USE_BUFFER_WRITE
- while(cnt >= info->portwidth) {
- i = info->buffer_size > cnt? cnt: info->buffer_size;
- if((rc = flash_write_cfibuffer(info, wp, src,i)) != ERR_OK)
- return rc;
- wp += i;
- src += i;
- cnt -=i;
- }
-#else
- /* handle the aligned part */
- while(cnt >= info->portwidth) {
- cword.l = 0;
- for(i = 0; i < info->portwidth; i++) {
- flash_add_byte(info, &cword, *src++);
- }
- if((rc = flash_write_cfiword(info, wp, cword)) != 0)
- return rc;
- wp += info->portwidth;
- cnt -= info->portwidth;
- }
-#endif /* CFG_FLASH_USE_BUFFER_WRITE */
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- cword.l = 0;
- for (i=0, cp=wp; (i<info->portwidth) && (cnt>0); ++i, ++cp) {
- flash_add_byte(info, &cword, *src++);
- --cnt;
- }
- for (; i<info->portwidth; ++i, ++cp) {
- flash_add_byte(info, & cword, (*(uchar *)cp));
- }
-
- return flash_write_cfiword(info, wp, cword);
-}
-
-/*-----------------------------------------------------------------------
- */
-int flash_real_protect(flash_info_t *info, long sector, int prot)
-{
- int retcode = 0;
-
- flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
- flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT);
- if(prot)
- flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT_SET);
- else
- flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
-
- if((retcode = flash_full_status_check(info, sector, info->erase_blk_tout,
- prot?"protect":"unprotect")) == 0) {
-
- info->protect[sector] = prot;
- /* Intel's unprotect unprotects all locking */
- if(prot == 0) {
- int i;
- for(i = 0 ; i<info->sector_count; i++) {
- if(info->protect[i])
- flash_real_protect(info, i, 1);
- }
- }
- }
-
- return retcode;
-}
-/*-----------------------------------------------------------------------
- * wait for XSR.7 to be set. Time out with an error if it does not.
- * This routine does not set the flash to read-array mode.
- */
-static int flash_status_check(flash_info_t * info, ulong sector, ulong tout, char * prompt)
-{
- ulong start;
-
- /* Wait for command completion */
- start = get_timer (0);
- while(!flash_isset(info, sector, 0, FLASH_STATUS_DONE)) {
- if (get_timer(start) > info->erase_blk_tout) {
- printf("Flash %s timeout at address %lx\n", prompt, info->start[sector]);
- flash_write_cmd(info, sector, 0, FLASH_CMD_RESET);
- return ERR_TIMOUT;
- }
- }
- return ERR_OK;
-}
-/*-----------------------------------------------------------------------
- * Wait for XSR.7 to be set, if it times out print an error, otherwise do a full status check.
- * This routine sets the flash to read-array mode.
- */
-static int flash_full_status_check(flash_info_t * info, ulong sector, ulong tout, char * prompt)
-{
- int retcode;
- retcode = flash_status_check(info, sector, tout, prompt);
- if((retcode == ERR_OK) && !flash_isequal(info,sector, 0, FLASH_STATUS_DONE)) {
- retcode = ERR_INVAL;
- printf("Flash %s error at address %lx\n", prompt,info->start[sector]);
- if(flash_isset(info, sector, 0, FLASH_STATUS_ECLBS | FLASH_STATUS_PSLBS)){
- printf("Command Sequence Error.\n");
- } else if(flash_isset(info, sector, 0, FLASH_STATUS_ECLBS)){
- printf("Block Erase Error.\n");
- retcode = ERR_NOT_ERASED;
- } else if (flash_isset(info, sector, 0, FLASH_STATUS_PSLBS)) {
- printf("Locking Error\n");
- }
- if(flash_isset(info, sector, 0, FLASH_STATUS_DPS)){
- printf("Block locked.\n");
- retcode = ERR_PROTECTED;
- }
- if(flash_isset(info, sector, 0, FLASH_STATUS_VPENS))
- printf("Vpp Low Error.\n");
- }
- flash_write_cmd(info, sector, 0, FLASH_CMD_RESET);
- return retcode;
-}
-/*-----------------------------------------------------------------------
- */
-static void flash_add_byte(flash_info_t *info, cfiword_t * cword, uchar c)
-{
- switch(info->portwidth) {
- case FLASH_CFI_8BIT:
- cword->c = c;
- break;
- case FLASH_CFI_16BIT:
- cword->w = (cword->w << 8) | c;
- break;
- case FLASH_CFI_32BIT:
- cword->l = (cword->l << 8) | c;
- }
-}
-
-
-/*-----------------------------------------------------------------------
- * make a proper sized command based on the port and chip widths
- */
-static void flash_make_cmd(flash_info_t * info, uchar cmd, void * cmdbuf)
-{
- int i;
- uchar *cp = (uchar *)cmdbuf;
- for(i=0; i< info->portwidth; i++)
- *cp++ = ((i+1) % info->chipwidth) ? '\0':cmd;
-}
-
-/*
- * Write a proper sized command to the correct address
- */
-static void flash_write_cmd(flash_info_t * info, int sect, uchar offset, uchar cmd)
-{
-
- volatile cfiptr_t addr;
- cfiword_t cword;
- addr.cp = flash_make_addr(info, sect, offset);
- flash_make_cmd(info, cmd, &cword);
- switch(info->portwidth) {
- case FLASH_CFI_8BIT:
- *addr.cp = cword.c;
- break;
- case FLASH_CFI_16BIT:
- *addr.wp = cword.w;
- break;
- case FLASH_CFI_32BIT:
- *addr.lp = cword.l;
- break;
- }
-}
-
-/*-----------------------------------------------------------------------
- */
-static int flash_isequal(flash_info_t * info, int sect, uchar offset, uchar cmd)
-{
- cfiptr_t cptr;
- cfiword_t cword;
- int retval;
- cptr.cp = flash_make_addr(info, sect, offset);
- flash_make_cmd(info, cmd, &cword);
- switch(info->portwidth) {
- case FLASH_CFI_8BIT:
- retval = (cptr.cp[0] == cword.c);
- break;
- case FLASH_CFI_16BIT:
- retval = (cptr.wp[0] == cword.w);
- break;
- case FLASH_CFI_32BIT:
- retval = (cptr.lp[0] == cword.l);
- break;
- default:
- retval = 0;
- break;
- }
- return retval;
-}
-/*-----------------------------------------------------------------------
- */
-static int flash_isset(flash_info_t * info, int sect, uchar offset, uchar cmd)
-{
- cfiptr_t cptr;
- cfiword_t cword;
- int retval;
- cptr.cp = flash_make_addr(info, sect, offset);
- flash_make_cmd(info, cmd, &cword);
- switch(info->portwidth) {
- case FLASH_CFI_8BIT:
- retval = ((cptr.cp[0] & cword.c) == cword.c);
- break;
- case FLASH_CFI_16BIT:
- retval = ((cptr.wp[0] & cword.w) == cword.w);
- break;
- case FLASH_CFI_32BIT:
- retval = ((cptr.lp[0] & cword.l) == cword.l);
- break;
- default:
- retval = 0;
- break;
- }
- return retval;
-}
-
-/*-----------------------------------------------------------------------
- * detect if flash is compatible with the Common Flash Interface (CFI)
- * http://www.jedec.org/download/search/jesd68.pdf
- *
-*/
-static int flash_detect_cfi(flash_info_t * info)
-{
-
- for(info->portwidth=FLASH_CFI_8BIT; info->portwidth <= FLASH_CFI_32BIT;
- info->portwidth <<= 1) {
- for(info->chipwidth =FLASH_CFI_BY8;
- info->chipwidth <= info->portwidth;
- info->chipwidth <<= 1) {
- flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
- flash_write_cmd(info, 0, FLASH_OFFSET_CFI, FLASH_CMD_CFI);
- if(flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP,'Q') &&
- flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R') &&
- flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y'))
- return 1;
- }
- }
- return 0;
-}
-/*
- * The following code cannot be run from FLASH!
- *
- */
-static ulong flash_get_size (ulong base, int banknum)
-{
- flash_info_t * info = &flash_info[banknum];
- int i, j;
- int sect_cnt;
- unsigned long sector;
- unsigned long tmp;
- int size_ratio;
- uchar num_erase_regions;
- int erase_region_size;
- int erase_region_count;
-
- info->start[0] = base;
-
- if(flash_detect_cfi(info)){
- size_ratio = info->portwidth / info->chipwidth;
- num_erase_regions = flash_read_uchar(info, FLASH_OFFSET_NUM_ERASE_REGIONS);
-#ifdef DEBUG_FLASH
- printf("found %d erase regions\n", num_erase_regions);
-#endif
- sect_cnt = 0;
- sector = base;
- for(i = 0 ; i < num_erase_regions; i++) {
- if(i > NUM_ERASE_REGIONS) {
- printf("%d erase regions found, only %d used\n",
- num_erase_regions, NUM_ERASE_REGIONS);
- break;
- }
- tmp = flash_read_long(info, 0, FLASH_OFFSET_ERASE_REGIONS);
- erase_region_size = (tmp & 0xffff)? ((tmp & 0xffff) * 256): 128;
- tmp >>= 16;
- erase_region_count = (tmp & 0xffff) +1;
- for(j = 0; j< erase_region_count; j++) {
- info->start[sect_cnt] = sector;
- sector += (erase_region_size * size_ratio);
- info->protect[sect_cnt] = flash_isset(info, sect_cnt, FLASH_OFFSET_PROTECT, FLASH_STATUS_PROTECT);
- sect_cnt++;
- }
- }
-
- info->sector_count = sect_cnt;
- /* multiply the size by the number of chips */
- info->size = (1 << flash_read_uchar(info, FLASH_OFFSET_SIZE)) * size_ratio;
- info->buffer_size = (1 << flash_read_ushort(info, 0, FLASH_OFFSET_BUFFER_SIZE));
- tmp = 1 << flash_read_uchar(info, FLASH_OFFSET_ETOUT);
- info->erase_blk_tout = (tmp * (1 << flash_read_uchar(info, FLASH_OFFSET_EMAX_TOUT)));
- tmp = 1 << flash_read_uchar(info, FLASH_OFFSET_WBTOUT);
- info->buffer_write_tout = (tmp * (1 << flash_read_uchar(info, FLASH_OFFSET_WBMAX_TOUT)));
- tmp = 1 << flash_read_uchar(info, FLASH_OFFSET_WTOUT);
- info->write_tout = (tmp * (1 << flash_read_uchar(info, FLASH_OFFSET_WMAX_TOUT)))/ 1000;
- info->flash_id = FLASH_MAN_CFI;
- }
-
- flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
- return(info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-static int flash_write_cfiword (flash_info_t *info, ulong dest, cfiword_t cword)
-{
-
- cfiptr_t ctladdr;
- cfiptr_t cptr;
- int flag;
-
- ctladdr.cp = flash_make_addr(info, 0, 0);
- cptr.cp = (uchar *)dest;
-
-
- /* Check if Flash is (sufficiently) erased */
- switch(info->portwidth) {
- case FLASH_CFI_8BIT:
- flag = ((cptr.cp[0] & cword.c) == cword.c);
- break;
- case FLASH_CFI_16BIT:
- flag = ((cptr.wp[0] & cword.w) == cword.w);
- break;
- case FLASH_CFI_32BIT:
- flag = ((cptr.lp[0] & cword.l) == cword.l);
- break;
- default:
- return 2;
- }
- if(!flag)
- return 2;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- flash_write_cmd(info, 0, 0, FLASH_CMD_CLEAR_STATUS);
- flash_write_cmd(info, 0, 0, FLASH_CMD_WRITE);
-
- switch(info->portwidth) {
- case FLASH_CFI_8BIT:
- cptr.cp[0] = cword.c;
- break;
- case FLASH_CFI_16BIT:
- cptr.wp[0] = cword.w;
- break;
- case FLASH_CFI_32BIT:
- cptr.lp[0] = cword.l;
- break;
- }
-
- /* re-enable interrupts if necessary */
- if(flag)
- enable_interrupts();
-
- return flash_full_status_check(info, 0, info->write_tout, "write");
-}
-
-#ifdef CFG_FLASH_USE_BUFFER_WRITE
-
-/* loop through the sectors from the highest address
- * when the passed address is greater or equal to the sector address
- * we have a match
- */
-static int find_sector(flash_info_t *info, ulong addr)
-{
- int sector;
- for(sector = info->sector_count - 1; sector >= 0; sector--) {
- if(addr >= info->start[sector])
- break;
- }
- return sector;
-}
-
-static int flash_write_cfibuffer(flash_info_t * info, ulong dest, uchar * cp, int len)
-{
-
- int sector;
- int cnt;
- int retcode;
- volatile cfiptr_t src;
- volatile cfiptr_t dst;
-
- src.cp = cp;
- dst.cp = (uchar *)dest;
- sector = find_sector(info, dest);
- flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
- flash_write_cmd(info, sector, 0, FLASH_CMD_WRITE_TO_BUFFER);
- if((retcode = flash_status_check(info, sector, info->buffer_write_tout,
- "write to buffer")) == ERR_OK) {
- switch(info->portwidth) {
- case FLASH_CFI_8BIT:
- cnt = len;
- break;
- case FLASH_CFI_16BIT:
- cnt = len >> 1;
- break;
- case FLASH_CFI_32BIT:
- cnt = len >> 2;
- break;
- default:
- return ERR_INVAL;
- break;
- }
- flash_write_cmd(info, sector, 0, (uchar)cnt-1);
- while(cnt-- > 0) {
- switch(info->portwidth) {
- case FLASH_CFI_8BIT:
- *dst.cp++ = *src.cp++;
- break;
- case FLASH_CFI_16BIT:
- *dst.wp++ = *src.wp++;
- break;
- case FLASH_CFI_32BIT:
- *dst.lp++ = *src.lp++;
- break;
- default:
- return ERR_INVAL;
- break;
- }
- }
- flash_write_cmd(info, sector, 0, FLASH_CMD_WRITE_BUFFER_CONFIRM);
- retcode = flash_full_status_check(info, sector, info->buffer_write_tout,
- "buffer write");
- }
- flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
- return retcode;
-}
-#endif /* CFG_USE_FLASH_BUFFER_WRITE */
diff --git a/board/ppmc8260/u-boot.lds b/board/ppmc8260/u-boot.lds
deleted file mode 100644
index 84d4b78b9e..0000000000
--- a/board/ppmc8260/u-boot.lds
+++ /dev/null
@@ -1,126 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc8260/start.o (.text)
- *(.text)
- common/environment.o(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/prodrive/p3p440/Makefile b/board/prodrive/p3p440/Makefile
deleted file mode 100644
index 47116d3674..0000000000
--- a/board/prodrive/p3p440/Makefile
+++ /dev/null
@@ -1,47 +0,0 @@
-#
-# (C) Copyright 2002
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o
-SOBJS = init.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/prodrive/p3p440/config.mk b/board/prodrive/p3p440/config.mk
deleted file mode 100644
index e5722dd36a..0000000000
--- a/board/prodrive/p3p440/config.mk
+++ /dev/null
@@ -1,44 +0,0 @@
-#
-# (C) Copyright 2002
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# esd ADCIOP boards
-#
-
-#TEXT_BASE = 0xFFFE0000
-
-ifeq ($(ramsym),1)
-TEXT_BASE = 0x07FD0000
-else
-TEXT_BASE = 0xFFFC0000
-endif
-
-PLATFORM_CPPFLAGS += -DCONFIG_440=1
-
-ifeq ($(debug),1)
-PLATFORM_CPPFLAGS += -DDEBUG
-endif
-
-ifeq ($(dbcr),1)
-PLATFORM_CPPFLAGS += -DCFG_INIT_DBCR=0x8cff0000
-endif
diff --git a/board/prodrive/p3p440/init.S b/board/prodrive/p3p440/init.S
deleted file mode 100644
index ee6b7066e9..0000000000
--- a/board/prodrive/p3p440/init.S
+++ /dev/null
@@ -1,99 +0,0 @@
-/*
- * (C) Copyright 2005
- * Stefan Roese, DENX Software Engineering, sr@denx.de.
- *
- * Copyright (C) 2002 Scott McNutt <smcnutt@artesyncp.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <ppc_asm.tmpl>
-#include <config.h>
-
-/* General */
-#define TLB_VALID 0x00000200
-
-/* Supported page sizes */
-
-#define SZ_1K 0x00000000
-#define SZ_4K 0x00000010
-#define SZ_16K 0x00000020
-#define SZ_64K 0x00000030
-#define SZ_256K 0x00000040
-#define SZ_1M 0x00000050
-#define SZ_16M 0x00000070
-#define SZ_256M 0x00000090
-
-/* Storage attributes */
-#define SA_W 0x00000800 /* Write-through */
-#define SA_I 0x00000400 /* Caching inhibited */
-#define SA_M 0x00000200 /* Memory coherence */
-#define SA_G 0x00000100 /* Guarded */
-#define SA_E 0x00000080 /* Endian */
-
-/* Access control */
-#define AC_X 0x00000024 /* Execute */
-#define AC_W 0x00000012 /* Write */
-#define AC_R 0x00000009 /* Read */
-
-/* Some handy macros */
-
-#define EPN(e) ((e) & 0xfffffc00)
-#define TLB0(epn,sz) ( (EPN((epn)) | (sz) | TLB_VALID ) )
-#define TLB1(rpn,erpn) ( ((rpn)&0xfffffc00) | (erpn) )
-#define TLB2(a) ( (a)&0x00000fbf )
-
-#define tlbtab_start\
- mflr r1 ;\
- bl 0f ;
-
-#define tlbtab_end\
- .long 0, 0, 0 ; \
-0: mflr r0 ; \
- mtlr r1 ; \
- blr ;
-
-#define tlbentry(epn,sz,rpn,erpn,attr)\
- .long TLB0(epn,sz),TLB1(rpn,erpn),TLB2(attr)
-
-
-/**************************************************************************
- * TLB TABLE
- *
- * This table is used by the cpu boot code to setup the initial tlb
- * entries. Rather than make broad assumptions in the cpu source tree,
- * this table lets each board set things up however they like.
- *
- * Pointer to the table is returned in r1
- *
- *************************************************************************/
-
- .section .bootpg,"ax"
- .globl tlbtab
-
-tlbtab:
- tlbtab_start
- tlbentry( 0xf0000000, SZ_256M, 0xf0000000, 1, AC_R|AC_W|AC_X|SA_G|SA_I)
- tlbentry( CFG_PERIPHERAL_BASE, SZ_256M, 0x40000000, 1, AC_R|AC_W|SA_G|SA_I)
- tlbentry( CFG_ISRAM_BASE, SZ_4K, 0x80000000, 0, AC_R|AC_W|AC_X )
- tlbentry( CFG_ISRAM_BASE + 0x1000, SZ_4K, 0x80001000, 0, AC_R|AC_W|AC_X )
- tlbentry( CFG_SDRAM_BASE, SZ_256M, 0x00000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I )
- tlbentry( CFG_PCI_BASE, SZ_256M, 0x00000000, 2, AC_R|AC_W|SA_G|SA_I )
- tlbentry( CFG_PCI_MEMBASE, SZ_256M, 0x00000000, 3, AC_R|AC_W|SA_G|SA_I )
- tlbtab_end
diff --git a/board/prodrive/p3p440/p3p440.c b/board/prodrive/p3p440/p3p440.c
deleted file mode 100644
index d42a643c2f..0000000000
--- a/board/prodrive/p3p440/p3p440.c
+++ /dev/null
@@ -1,264 +0,0 @@
-/*
- * (C) Copyright 2005
- * Stefan Roese, DENX Software Engineering, sr@denx.de.
- *
- * Copyright (C) 2002 Scott McNutt <smcnutt@artesyncp.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/processor.h>
-#include <command.h>
-
-#include "p3p440.h"
-
-void set_led(int color)
-{
- switch (color) {
- case LED_OFF:
- out32(GPIO0_OR, in32(GPIO0_OR) & ~CFG_LED_GREEN & ~CFG_LED_RED);
- break;
-
- case LED_GREEN:
- out32(GPIO0_OR, (in32(GPIO0_OR) | CFG_LED_GREEN) & ~CFG_LED_RED);
- break;
-
- case LED_RED:
- out32(GPIO0_OR, (in32(GPIO0_OR) | CFG_LED_RED) & ~CFG_LED_GREEN);
- break;
-
- case LED_ORANGE:
- out32(GPIO0_OR, in32(GPIO0_OR) | CFG_LED_GREEN | CFG_LED_RED);
- break;
- }
-}
-
-static int is_monarch(void)
-{
- out32(GPIO0_OR, in32(GPIO0_OR) & ~CFG_GPIO_RDY);
- udelay(1000);
-
- if (in32(GPIO0_IR) & CFG_MONARCH_IO)
- return 0;
- else
- return 1;
-}
-
-static void wait_for_pci_ready(void)
-{
- /*
- * Configure EREADY_IO as input
- */
- out32(GPIO0_TCR, in32(GPIO0_TCR) & ~CFG_EREADY_IO);
- udelay(1000);
-
- for (;;) {
- if (in32(GPIO0_IR) & CFG_EREADY_IO)
- return;
- }
-
-}
-
-int board_early_init_f(void)
-{
- uint reg;
-
- /*--------------------------------------------------------------------
- * Setup the external bus controller/chip selects
- *-------------------------------------------------------------------*/
- mtdcr(ebccfga, xbcfg);
- reg = mfdcr(ebccfgd);
- mtdcr(ebccfgd, reg | 0x04000000); /* Set ATC */
-
- /*--------------------------------------------------------------------
- * Setup pin multiplexing (GPIO/IRQ...)
- *-------------------------------------------------------------------*/
- mtdcr(cpc0_gpio, 0x03F01F80);
-
- out32(GPIO0_ODR, 0x00000000); /* no open drain pins */
- out32(GPIO0_TCR, CFG_GPIO_RDY | CFG_EREADY_IO | CFG_LED_RED | CFG_LED_GREEN);
- out32(GPIO0_OR, CFG_GPIO_RDY);
-
- /*--------------------------------------------------------------------
- * Setup the interrupt controller polarities, triggers, etc.
- *-------------------------------------------------------------------*/
- mtdcr(uic0sr, 0xffffffff); /* clear all */
- mtdcr(uic0er, 0x00000000); /* disable all */
- mtdcr(uic0cr, 0x00000001); /* UIC1 crit is critical */
- mtdcr(uic0pr, 0xfffffe13); /* per ref-board manual */
- mtdcr(uic0tr, 0x01c00008); /* per ref-board manual */
- mtdcr(uic0vr, 0x00000001); /* int31 highest, base=0x000 */
- mtdcr(uic0sr, 0xffffffff); /* clear all */
-
- mtdcr(uic1sr, 0xffffffff); /* clear all */
- mtdcr(uic1er, 0x00000000); /* disable all */
- mtdcr(uic1cr, 0x00000000); /* all non-critical */
- mtdcr(uic1pr, 0xffffe0ff); /* per ref-board manual */
- mtdcr(uic1tr, 0x00ffc000); /* per ref-board manual */
- mtdcr(uic1vr, 0x00000001); /* int31 highest, base=0x000 */
- mtdcr(uic1sr, 0xffffffff); /* clear all */
-
- return 0;
-}
-
-int checkboard(void)
-{
- char *s = getenv("serial#");
-
- printf("Board: P3P440");
- if (s != NULL) {
- puts(", serial# ");
- puts(s);
- }
-
- if (is_monarch()) {
- puts(", Monarch");
- } else {
- puts(", None-Monarch");
- }
-
- putc('\n');
-
- return (0);
-}
-
-int misc_init_r (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- /*
- * Adjust flash start and offset to detected values
- */
- gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize;
- gd->bd->bi_flashoffset = 0;
-
- /*
- * Check if only one FLASH bank is available
- */
- if (gd->bd->bi_flashsize != CFG_MAX_FLASH_BANKS * (0 - CFG_FLASH0)) {
- mtebc(pb1cr, 0); /* disable cs */
- mtebc(pb1ap, 0);
- mtebc(pb2cr, 0); /* disable cs */
- mtebc(pb2ap, 0);
- mtebc(pb3cr, 0); /* disable cs */
- mtebc(pb3ap, 0);
- }
-
- return 0;
-}
-
-/*************************************************************************
- * pci_pre_init
- *
- * This routine is called just prior to registering the hose and gives
- * the board the opportunity to check things. Returning a value of zero
- * indicates that things are bad & PCI initialization should be aborted.
- *
- * Different boards may wish to customize the pci controller structure
- * (add regions, override default access routines, etc) or perform
- * certain pre-initialization actions.
- *
- ************************************************************************/
-#if defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT)
-int pci_pre_init(struct pci_controller *hose)
-{
- unsigned long strap;
-
- /*--------------------------------------------------------------------------+
- * The P3P440 board is always configured as the host & requires the
- * PCI arbiter to be disabled because it's an PMC module.
- *--------------------------------------------------------------------------*/
- strap = mfdcr(cpc0_strp1);
- if (strap & 0x00100000) {
- printf("PCI: CPC0_STRP1[PAE] set.\n");
- return 0;
- }
-
- return 1;
-}
-#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT) */
-
-/*************************************************************************
- * pci_target_init
- *
- * The bootstrap configuration provides default settings for the pci
- * inbound map (PIM). But the bootstrap config choices are limited and
- * may not be sufficient for a given board.
- *
- ************************************************************************/
-#if defined(CONFIG_PCI) && defined(CFG_PCI_TARGET_INIT)
-void pci_target_init(struct pci_controller *hose)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- /*--------------------------------------------------------------------------+
- * Disable everything
- *--------------------------------------------------------------------------*/
- out32r(PCIX0_PIM0SA, 0); /* disable */
- out32r(PCIX0_PIM1SA, 0); /* disable */
- out32r(PCIX0_PIM2SA, 0); /* disable */
- out32r(PCIX0_EROMBA, 0); /* disable expansion rom */
-
- /*--------------------------------------------------------------------------+
- * Map all of SDRAM to PCI address 0x0000_0000. Note that the 440 strapping
- * options to not support sizes such as 128/256 MB.
- *--------------------------------------------------------------------------*/
- out32r(PCIX0_PIM0LAL, CFG_SDRAM_BASE);
- out32r(PCIX0_PIM0LAH, 0);
- out32r(PCIX0_PIM0SA, ~(gd->ram_size - 1) | 1);
-
- out32r(PCIX0_BAR0, 0);
-
- /*--------------------------------------------------------------------------+
- * Program the board's subsystem id/vendor id
- *--------------------------------------------------------------------------*/
- out16r(PCIX0_SBSYSVID, CFG_PCI_SUBSYS_VENDORID);
- out16r(PCIX0_SBSYSID, CFG_PCI_SUBSYS_DEVICEID);
-
- out16r(PCIX0_CMD, in16r(PCIX0_CMD) | PCI_COMMAND_MEMORY);
-}
-#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_TARGET_INIT) */
-
-/*************************************************************************
- * is_pci_host
- *
- * This routine is called to determine if a pci scan should be
- * performed. With various hardware environments (especially cPCI and
- * PPMC) it's insufficient to depend on the state of the arbiter enable
- * bit in the strap register, or generic host/adapter assumptions.
- *
- * Rather than hard-code a bad assumption in the general 440 code, the
- * 440 pci code requires the board to decide at runtime.
- *
- * Return 0 for adapter mode, non-zero for host (monarch) mode.
- *
- *
- ************************************************************************/
-#if defined(CONFIG_PCI)
-int is_pci_host(struct pci_controller *hose)
-{
- if (is_monarch()) {
- wait_for_pci_ready();
- return 1; /* return 1 for host controller */
- } else {
- return 0; /* return 0 for adapter controller */
- }
-}
-#endif /* defined(CONFIG_PCI) */
diff --git a/board/prodrive/p3p440/p3p440.h b/board/prodrive/p3p440/p3p440.h
deleted file mode 100644
index e4e87d1f59..0000000000
--- a/board/prodrive/p3p440/p3p440.h
+++ /dev/null
@@ -1,40 +0,0 @@
-/*
- * (C) Copyright 2005
- * Stefan Roese, DENX Software Engineering, sr@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef __P3P440_H__
-#define __P3P440_H__
-
-#define CFG_GPIO_RDY (0x80000000 >> 11)
-#define CFG_MONARCH_IO (0x80000000 >> 18)
-#define CFG_EREADY_IO (0x80000000 >> 20)
-#define CFG_LED_GREEN (0x80000000 >> 21)
-#define CFG_LED_RED (0x80000000 >> 22)
-
-#define LED_OFF 1
-#define LED_GREEN 2
-#define LED_RED 3
-#define LED_ORANGE 4
-
-long int fixed_sdram(void);
-
-#endif /* __P3P440_H__ */
diff --git a/board/prodrive/p3p440/u-boot.lds b/board/prodrive/p3p440/u-boot.lds
deleted file mode 100644
index 92bb740e45..0000000000
--- a/board/prodrive/p3p440/u-boot.lds
+++ /dev/null
@@ -1,157 +0,0 @@
-/*
- * (C) Copyright 2002
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- .resetvec 0xFFFFFFFC :
- {
- *(.resetvec)
- } = 0xffff
-
- .bootpg 0xFFFFF000 :
- {
- cpu/ppc4xx/start.o (.bootpg)
- } = 0xffff
-
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/ppc4xx/start.o (.text)
- board/prodrive/p3p440/init.o (.text)
- cpu/ppc4xx/kgdb.o (.text)
- cpu/ppc4xx/traps.o (.text)
- cpu/ppc4xx/interrupts.o (.text)
- cpu/ppc4xx/serial.o (.text)
- cpu/ppc4xx/cpu_init.o (.text)
- cpu/ppc4xx/speed.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/extable.o (.text)
- lib_generic/zlib.o (.text)
-
-/* . = env_offset;*/
-/* common/environment.o(.text)*/
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/psyent/common/AMDLV065D.c b/board/psyent/common/AMDLV065D.c
deleted file mode 100644
index 4965743bd5..0000000000
--- a/board/psyent/common/AMDLV065D.c
+++ /dev/null
@@ -1,197 +0,0 @@
-/*
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-
-#include <common.h>
-#if defined(CONFIG_NIOS)
-#include <nios.h>
-#else
-#include <nios2.h>
-#endif
-
-#define SECTSZ (64 * 1024)
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
-
-/*----------------------------------------------------------------------*/
-unsigned long flash_init (void)
-{
- int i;
- unsigned long addr;
- flash_info_t *fli = &flash_info[0];
-
- fli->size = CFG_FLASH_SIZE;
- fli->sector_count = CFG_MAX_FLASH_SECT;
- fli->flash_id = FLASH_MAN_AMD + FLASH_AMDLV065D;
-
- addr = CFG_FLASH_BASE;
- for (i = 0; i < fli->sector_count; ++i) {
- fli->start[i] = addr;
- addr += SECTSZ;
- fli->protect[i] = 1;
- }
-
- return (CFG_FLASH_SIZE);
-}
-/*--------------------------------------------------------------------*/
-void flash_print_info (flash_info_t * info)
-{
- int i, k;
- unsigned long size;
- int erased;
- volatile unsigned char *flash;
-
- printf (" Size: %ld KB in %d Sectors\n",
- info->size >> 10, info->sector_count);
- printf (" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; ++i) {
-
- /* Check if whole sector is erased */
- if (i != (info->sector_count - 1))
- size = info->start[i + 1] - info->start[i];
- else
- size = info->start[0] + info->size - info->start[i];
- erased = 1;
- flash = (volatile unsigned char *) CACHE_BYPASS(info->start[i]);
- for (k = 0; k < size; k++) {
- if (*flash++ != 0xff) {
- erased = 0;
- break;
- }
- }
-
- /* Print the info */
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s%s",
- CACHE_NO_BYPASS(info->start[i]),
- erased ? " E" : " ",
- info->protect[i] ? "RO " : " ");
- }
- printf ("\n");
-}
-
-/*-------------------------------------------------------------------*/
-
-
-int flash_erase (flash_info_t * info, int s_first, int s_last)
-{
- volatile CFG_FLASH_WORD_SIZE *addr = (CFG_FLASH_WORD_SIZE *)
- CACHE_BYPASS(info->start[0]);
- volatile CFG_FLASH_WORD_SIZE *addr2;
- int prot, sect;
- ulong start;
-
- /* Some sanity checking */
- if ((s_first < 0) || (s_first > s_last)) {
- printf ("- no sectors to erase\n");
- return 1;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- /* It's ok to erase multiple sectors provided we don't delay more
- * than 50 usec between cmds ... at which point the erase time-out
- * occurs. So don't go and put printf() calls in the loop ... it
- * won't be very helpful ;-)
- */
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr2 = (CFG_FLASH_WORD_SIZE *)
- CACHE_BYPASS((info->start[sect]));
- *addr = 0xaa;
- *addr = 0x55;
- *addr = 0x80;
- *addr = 0xaa;
- *addr = 0x55;
- *addr2 = 0x30;
- /* Now just wait for 0xff & provide some user
- * feedback while we wait.
- */
- start = get_timer (0);
- while (*addr2 != 0xff) {
- udelay (1000 * 1000);
- putc ('.');
- if (get_timer (start) > CFG_FLASH_ERASE_TOUT) {
- printf ("timeout\n");
- return 1;
- }
- }
- }
- }
- printf ("\n");
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
-
- vu_char *cmd = (vu_char *) CACHE_BYPASS(info->start[0]);
- vu_char *dst = (vu_char *) CACHE_BYPASS(addr);
- unsigned char b;
- ulong start;
-
- while (cnt) {
- /* Check for sufficient erase */
- b = *src;
- if ((*dst & b) != b) {
- printf ("%02x : %02x\n", *dst, b);
- return (2);
- }
-
- *cmd = 0xaa;
- *cmd = 0x55;
- *cmd = 0xa0;
- *dst = b;
-
- /* Verify write */
- start = get_timer (0);
- while (*dst != b) {
- if (get_timer (start) > CFG_FLASH_WRITE_TOUT) {
- return 1;
- }
- }
- dst++;
- src++;
- cnt--;
- }
-
- return (0);
-}
diff --git a/board/psyent/pci5441/Makefile b/board/psyent/pci5441/Makefile
deleted file mode 100644
index 8e55c9bcde..0000000000
--- a/board/psyent/pci5441/Makefile
+++ /dev/null
@@ -1,50 +0,0 @@
-#
-# (C) Copyright 2001-2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-COMOBJS := ../common/AMDLV065D.o
-
-OBJS := $(BOARD).o $(COMOBJS)
-
-SOBJS =
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $^
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/psyent/pci5441/config.mk b/board/psyent/pci5441/config.mk
deleted file mode 100644
index d72bceed2d..0000000000
--- a/board/psyent/pci5441/config.mk
+++ /dev/null
@@ -1,31 +0,0 @@
-#
-# (C) Copyright 2004, Psyent Corporation <www.psyent.com>
-# Scott McNutt <smcnutt@psyent.com>
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-TEXT_BASE = 0x018e0000
-
-PLATFORM_CPPFLAGS += -mno-hw-div -mno-hw-mul
-PLATFORM_CPPFLAGS += -I$(TOPDIR)/board/$(VENDOR)/include
-
-ifeq ($(debug),1)
-PLATFORM_CPPFLAGS += -DDEBUG
-endif
diff --git a/board/psyent/pci5441/pci5441.c b/board/psyent/pci5441/pci5441.c
deleted file mode 100644
index ea80dd1395..0000000000
--- a/board/psyent/pci5441/pci5441.c
+++ /dev/null
@@ -1,40 +0,0 @@
-/*
- * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
- * Scott McNutt <smcnutt@psyent.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-
-int board_early_init_f (void)
-{
- return 0;
-}
-
-int checkboard (void)
-{
- puts ("BOARD : Psyent PCI-5441\n");
- return 0;
-}
-
-long int initdram (int board_type)
-{
- return (0);
-}
diff --git a/board/psyent/pci5441/u-boot.lds b/board/psyent/pci5441/u-boot.lds
deleted file mode 100644
index 8f9cd8fa59..0000000000
--- a/board/psyent/pci5441/u-boot.lds
+++ /dev/null
@@ -1,137 +0,0 @@
-/*
- * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
- * Scott McNutt <smcnutt@psyent.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-
-OUTPUT_FORMAT("elf32-littlenios2")
-OUTPUT_ARCH(nios2)
-ENTRY(_start)
-
-SECTIONS
-{
- .text :
- {
- cpu/nios2/start.o (.text)
- *(.text)
- *(.text.*)
- *(.gnu.linkonce.t*)
- *(.rodata)
- *(.rodata.*)
- *(.gnu.linkonce.r*)
- }
- . = ALIGN (4);
- _etext = .;
- PROVIDE (etext = .);
-
- /* CMD TABLE - sandwich this in between text and data so
- * the initialization code relocates the command table as
- * well -- admittedly, this is just pure laziness ;-)
- */
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd :
- {
- *(.u_boot_cmd)
- }
- . = ALIGN(4);
- __u_boot_cmd_end = .;
-
- /* INIT DATA sections - "Small" data (see the gcc -G option)
- * is always gp-relative. Here we make all init data sections
- * adjacent to simplify the startup code -- and provide
- * the global pointer for gp-relative access.
- */
- _data = .;
- .data :
- {
- *(.data)
- *(.data.*)
- *(.gnu.linkonce.d*)
- }
-
- . = ALIGN(16);
- _gp = .; /* Global pointer addr */
- PROVIDE (gp = .);
-
- .sdata :
- {
- *(.sdata)
- *(.sdata.*)
- *(.gnu.linkonce.s.*)
- }
- . = ALIGN(4);
-
- _edata = .;
- PROVIDE (edata = .);
-
- /* UNINIT DATA - Small uninitialized data is first so it's
- * adjacent to sdata and can be referenced via gp. The normal
- * bss follows. We keep it adjacent to simplify init code.
- */
- __bss_start = .;
- .sbss :
- {
- *(.sbss)
- *(.sbss.*)
- *(.gnu.linkonce.sb.*)
- *(.scommon)
- }
- . = ALIGN(4);
- .bss :
- {
- *(.bss)
- *(.bss.*)
- *(.dynbss)
- *(COMMON)
- *(.scommon)
- }
- . = ALIGN(4);
- _end = .;
- PROVIDE (end = .);
-
- /* DEBUG -- symbol table, string table, etc. etc.
- */
- .stab 0 : { *(.stab) }
- .stabstr 0 : { *(.stabstr) }
- .stab.excl 0 : { *(.stab.excl) }
- .stab.exclstr 0 : { *(.stab.exclstr) }
- .stab.index 0 : { *(.stab.index) }
- .stab.indexstr 0 : { *(.stab.indexstr) }
- .comment 0 : { *(.comment) }
- .debug 0 : { *(.debug) }
- .line 0 : { *(.line) }
- .debug_srcinfo 0 : { *(.debug_srcinfo) }
- .debug_sfnames 0 : { *(.debug_sfnames) }
- .debug_aranges 0 : { *(.debug_aranges) }
- .debug_pubnames 0 : { *(.debug_pubnames) }
- .debug_info 0 : { *(.debug_info) }
- .debug_abbrev 0 : { *(.debug_abbrev) }
- .debug_line 0 : { *(.debug_line) }
- .debug_frame 0 : { *(.debug_frame) }
- .debug_str 0 : { *(.debug_str) }
- .debug_loc 0 : { *(.debug_loc) }
- .debug_macinfo 0 : { *(.debug_macinfo) }
- .debug_weaknames 0 : { *(.debug_weaknames) }
- .debug_funcnames 0 : { *(.debug_funcnames) }
- .debug_typenames 0 : { *(.debug_typenames) }
- .debug_varnames 0 : { *(.debug_varnames) }
-}
diff --git a/board/psyent/pk1c20/Makefile b/board/psyent/pk1c20/Makefile
deleted file mode 100644
index 5c1db036bf..0000000000
--- a/board/psyent/pk1c20/Makefile
+++ /dev/null
@@ -1,50 +0,0 @@
-#
-# (C) Copyright 2001-2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-COMOBJS := ../common/AMDLV065D.o
-
-OBJS := $(BOARD).o led.o $(COMOBJS)
-
-SOBJS =
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $^
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/psyent/pk1c20/config.mk b/board/psyent/pk1c20/config.mk
deleted file mode 100644
index d72bceed2d..0000000000
--- a/board/psyent/pk1c20/config.mk
+++ /dev/null
@@ -1,31 +0,0 @@
-#
-# (C) Copyright 2004, Psyent Corporation <www.psyent.com>
-# Scott McNutt <smcnutt@psyent.com>
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-TEXT_BASE = 0x018e0000
-
-PLATFORM_CPPFLAGS += -mno-hw-div -mno-hw-mul
-PLATFORM_CPPFLAGS += -I$(TOPDIR)/board/$(VENDOR)/include
-
-ifeq ($(debug),1)
-PLATFORM_CPPFLAGS += -DDEBUG
-endif
diff --git a/board/psyent/pk1c20/led.c b/board/psyent/pk1c20/led.c
deleted file mode 100644
index c175c9b870..0000000000
--- a/board/psyent/pk1c20/led.c
+++ /dev/null
@@ -1,62 +0,0 @@
-/*
- * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
- * Scott McNutt <smcnutt@psyent.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <nios2.h>
-#include <nios2-io.h>
-#include <status_led.h>
-
-/* The LED port is configured as output only, so we
- * must track the state manually.
- */
-static led_id_t val = 0;
-
-void __led_init (led_id_t mask, int state)
-{
- nios_pio_t *pio = (nios_pio_t *)CACHE_BYPASS(CFG_LEDPIO_ADDR);
-
- if (state == STATUS_LED_ON)
- val &= ~mask;
- else
- val |= mask;
- pio->data = val;
-}
-
-void __led_set (led_id_t mask, int state)
-{
- nios_pio_t *pio = (nios_pio_t *)CACHE_BYPASS(CFG_LEDPIO_ADDR);
-
- if (state == STATUS_LED_ON)
- val &= ~mask;
- else
- val |= mask;
- pio->data = val;
-}
-
-void __led_toggle (led_id_t mask)
-{
- nios_pio_t *pio = (nios_pio_t *)CACHE_BYPASS(CFG_LEDPIO_ADDR);
-
- val ^= mask;
- pio->data = val;
-}
diff --git a/board/psyent/pk1c20/pk1c20.c b/board/psyent/pk1c20/pk1c20.c
deleted file mode 100644
index 1924ae3d17..0000000000
--- a/board/psyent/pk1c20/pk1c20.c
+++ /dev/null
@@ -1,40 +0,0 @@
-/*
- * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
- * Scott McNutt <smcnutt@psyent.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-
-int board_early_init_f (void)
-{
- return 0;
-}
-
-int checkboard (void)
-{
- puts ("BOARD : Psyent PK-1C20\n");
- return 0;
-}
-
-long int initdram (int board_type)
-{
- return (0);
-}
diff --git a/board/psyent/pk1c20/u-boot.lds b/board/psyent/pk1c20/u-boot.lds
deleted file mode 100644
index 8f9cd8fa59..0000000000
--- a/board/psyent/pk1c20/u-boot.lds
+++ /dev/null
@@ -1,137 +0,0 @@
-/*
- * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
- * Scott McNutt <smcnutt@psyent.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-
-OUTPUT_FORMAT("elf32-littlenios2")
-OUTPUT_ARCH(nios2)
-ENTRY(_start)
-
-SECTIONS
-{
- .text :
- {
- cpu/nios2/start.o (.text)
- *(.text)
- *(.text.*)
- *(.gnu.linkonce.t*)
- *(.rodata)
- *(.rodata.*)
- *(.gnu.linkonce.r*)
- }
- . = ALIGN (4);
- _etext = .;
- PROVIDE (etext = .);
-
- /* CMD TABLE - sandwich this in between text and data so
- * the initialization code relocates the command table as
- * well -- admittedly, this is just pure laziness ;-)
- */
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd :
- {
- *(.u_boot_cmd)
- }
- . = ALIGN(4);
- __u_boot_cmd_end = .;
-
- /* INIT DATA sections - "Small" data (see the gcc -G option)
- * is always gp-relative. Here we make all init data sections
- * adjacent to simplify the startup code -- and provide
- * the global pointer for gp-relative access.
- */
- _data = .;
- .data :
- {
- *(.data)
- *(.data.*)
- *(.gnu.linkonce.d*)
- }
-
- . = ALIGN(16);
- _gp = .; /* Global pointer addr */
- PROVIDE (gp = .);
-
- .sdata :
- {
- *(.sdata)
- *(.sdata.*)
- *(.gnu.linkonce.s.*)
- }
- . = ALIGN(4);
-
- _edata = .;
- PROVIDE (edata = .);
-
- /* UNINIT DATA - Small uninitialized data is first so it's
- * adjacent to sdata and can be referenced via gp. The normal
- * bss follows. We keep it adjacent to simplify init code.
- */
- __bss_start = .;
- .sbss :
- {
- *(.sbss)
- *(.sbss.*)
- *(.gnu.linkonce.sb.*)
- *(.scommon)
- }
- . = ALIGN(4);
- .bss :
- {
- *(.bss)
- *(.bss.*)
- *(.dynbss)
- *(COMMON)
- *(.scommon)
- }
- . = ALIGN(4);
- _end = .;
- PROVIDE (end = .);
-
- /* DEBUG -- symbol table, string table, etc. etc.
- */
- .stab 0 : { *(.stab) }
- .stabstr 0 : { *(.stabstr) }
- .stab.excl 0 : { *(.stab.excl) }
- .stab.exclstr 0 : { *(.stab.exclstr) }
- .stab.index 0 : { *(.stab.index) }
- .stab.indexstr 0 : { *(.stab.indexstr) }
- .comment 0 : { *(.comment) }
- .debug 0 : { *(.debug) }
- .line 0 : { *(.line) }
- .debug_srcinfo 0 : { *(.debug_srcinfo) }
- .debug_sfnames 0 : { *(.debug_sfnames) }
- .debug_aranges 0 : { *(.debug_aranges) }
- .debug_pubnames 0 : { *(.debug_pubnames) }
- .debug_info 0 : { *(.debug_info) }
- .debug_abbrev 0 : { *(.debug_abbrev) }
- .debug_line 0 : { *(.debug_line) }
- .debug_frame 0 : { *(.debug_frame) }
- .debug_str 0 : { *(.debug_str) }
- .debug_loc 0 : { *(.debug_loc) }
- .debug_macinfo 0 : { *(.debug_macinfo) }
- .debug_weaknames 0 : { *(.debug_weaknames) }
- .debug_funcnames 0 : { *(.debug_funcnames) }
- .debug_typenames 0 : { *(.debug_typenames) }
- .debug_varnames 0 : { *(.debug_varnames) }
-}
diff --git a/board/purple/Makefile b/board/purple/Makefile
deleted file mode 100644
index b2f2fc0fd3..0000000000
--- a/board/purple/Makefile
+++ /dev/null
@@ -1,42 +0,0 @@
-
-#
-# (C) Copyright 2003
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o sconsole.o
-SOBJS = lowlevel_init.o
-
-$(LIB): .depend $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/purple/config.mk b/board/purple/config.mk
deleted file mode 100644
index ea478edb18..0000000000
--- a/board/purple/config.mk
+++ /dev/null
@@ -1,32 +0,0 @@
-#
-# (C) Copyright 2003
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# Purple board with MIPS 5Kc CPU core
-#
-
-# ROM version
-TEXT_BASE = 0xB0000000
-
-# RAM version
-#TEXT_BASE = 0x80100000
diff --git a/board/purple/flash.c b/board/purple/flash.c
deleted file mode 100644
index 7522580808..0000000000
--- a/board/purple/flash.c
+++ /dev/null
@@ -1,596 +0,0 @@
-/*
- * (C) Copyright 2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/inca-ip.h>
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-typedef unsigned long FLASH_PORT_WIDTH;
-typedef volatile unsigned long FLASH_PORT_WIDTHV;
-
-#define FLASH_ID_MASK 0xFFFFFFFF
-
-#define FPW FLASH_PORT_WIDTH
-#define FPWV FLASH_PORT_WIDTHV
-
-#define ORMASK(size) ((-size) & OR_AM_MSK)
-
-#define FLASH29_REG_ADRS(reg) ((FPWV *)PHYS_FLASH_1 + (reg))
-
-/* FLASH29 command register addresses */
-
-#define FLASH29_REG_FIRST_CYCLE FLASH29_REG_ADRS (0x1555)
-#define FLASH29_REG_SECOND_CYCLE FLASH29_REG_ADRS (0x2aaa)
-#define FLASH29_REG_THIRD_CYCLE FLASH29_REG_ADRS (0x3555)
-#define FLASH29_REG_FOURTH_CYCLE FLASH29_REG_ADRS (0x4555)
-#define FLASH29_REG_FIFTH_CYCLE FLASH29_REG_ADRS (0x5aaa)
-#define FLASH29_REG_SIXTH_CYCLE FLASH29_REG_ADRS (0x6555)
-
-/* FLASH29 command definitions */
-
-#define FLASH29_CMD_FIRST 0xaaaaaaaa
-#define FLASH29_CMD_SECOND 0x55555555
-#define FLASH29_CMD_FOURTH 0xaaaaaaaa
-#define FLASH29_CMD_FIFTH 0x55555555
-#define FLASH29_CMD_SIXTH 0x10101010
-
-#define FLASH29_CMD_SECTOR 0x30303030
-#define FLASH29_CMD_PROGRAM 0xa0a0a0a0
-#define FLASH29_CMD_CHIP_ERASE 0x80808080
-#define FLASH29_CMD_READ_RESET 0xf0f0f0f0
-#define FLASH29_CMD_AUTOSELECT 0x90909090
-#define FLASH29_CMD_READ 0x70707070
-
-#define IN_RAM_CMD_READ 0x1
-#define IN_RAM_CMD_WRITE 0x2
-
-#define FLASH_WRITE_CMD ((ulong)(flash_write_cmd) & 0x7)+0xbf008000
-#define FLASH_READ_CMD ((ulong)(flash_read_cmd) & 0x7)+0xbf008000
-
-typedef void (*FUNCPTR_CP)(ulong *source, ulong *destination, ulong nlongs);
-typedef void (*FUNCPTR_RD)(int cmd, FPWV * pFA, char * string, int strLen);
-typedef void (*FUNCPTR_WR)(int cmd, FPWV * pFA, FPW value);
-
-static ulong flash_get_size(FPWV *addr, flash_info_t *info);
-static int write_word(flash_info_t *info, FPWV *dest, FPW data);
-static void flash_get_offsets(ulong base, flash_info_t *info);
-static flash_info_t *flash_get_info(ulong base);
-
-static void load_cmd(ulong cmd);
-static ulong in_ram_cmd = 0;
-
-
-/******************************************************************************
-*
-* Don't change the program architecture
-* This architecture assure the program
-* can be relocated to scratch ram
-*/
-static void flash_read_cmd(int cmd, FPWV * pFA, char * string, int strLen)
-{
- int i,j;
- FPW temp,temp1;
- FPWV *str;
-
- str = (FPWV *)string;
-
- j= strLen/4;
-
- if(cmd == FLASH29_CMD_AUTOSELECT)
- {
- *(FLASH29_REG_FIRST_CYCLE) = FLASH29_CMD_FIRST;
- *(FLASH29_REG_SECOND_CYCLE) = FLASH29_CMD_SECOND;
- *(FLASH29_REG_THIRD_CYCLE) = FLASH29_CMD_AUTOSELECT;
- }
-
- if(cmd == FLASH29_CMD_READ)
- {
- i = 0;
- while(i<j)
- {
- temp = *pFA++;
- temp1 = *(int *)0xa0000000;
- *(int *)0xbf0081f8 = temp1 + temp;
- *str++ = temp;
- i++;
- }
- }
-
- if(cmd == FLASH29_CMD_READ_RESET)
- {
- *(FLASH29_REG_FIRST_CYCLE) = FLASH29_CMD_FIRST;
- *(FLASH29_REG_SECOND_CYCLE) = FLASH29_CMD_SECOND;
- *(FLASH29_REG_THIRD_CYCLE) = FLASH29_CMD_READ_RESET;
- }
-
- *(int *)0xbf0081f8 = *(int *)0xa0000000; /* dummy read switch back to sdram interface */
-}
-
-/******************************************************************************
-*
-* Don't change the program architecture
-* This architecture assure the program
-* can be relocated to scratch ram
-*/
-static void flash_write_cmd(int cmd, FPWV * pFA, FPW value)
-{
- *(FLASH29_REG_FIRST_CYCLE) = FLASH29_CMD_FIRST;
- *(FLASH29_REG_SECOND_CYCLE) = FLASH29_CMD_SECOND;
-
- if (cmd == FLASH29_CMD_SECTOR)
- {
- *(FLASH29_REG_THIRD_CYCLE) = FLASH29_CMD_CHIP_ERASE;
- *(FLASH29_REG_FOURTH_CYCLE) = FLASH29_CMD_FOURTH;
- *(FLASH29_REG_FIFTH_CYCLE) = FLASH29_CMD_FIFTH;
- *pFA = FLASH29_CMD_SECTOR;
- }
-
- if (cmd == FLASH29_CMD_SIXTH)
- {
- *(FLASH29_REG_THIRD_CYCLE) = FLASH29_CMD_CHIP_ERASE;
- *(FLASH29_REG_FOURTH_CYCLE) = FLASH29_CMD_FOURTH;
- *(FLASH29_REG_FIFTH_CYCLE) = FLASH29_CMD_FIFTH;
- *(FLASH29_REG_SIXTH_CYCLE) = FLASH29_CMD_SIXTH;
- }
-
- if (cmd == FLASH29_CMD_PROGRAM)
- {
- *(FLASH29_REG_THIRD_CYCLE) = FLASH29_CMD_PROGRAM;
- *pFA = value;
- }
-
- if (cmd == FLASH29_CMD_READ_RESET)
- {
- *(FLASH29_REG_THIRD_CYCLE) = FLASH29_CMD_READ_RESET;
- }
-
- *(int *)0xbf0081f8 = *(int *)0xa0000000; /* dummy read switch back to sdram interface */
-}
-
-static void load_cmd(ulong cmd)
-{
- ulong *src;
- ulong *dst;
- FUNCPTR_CP absEntry;
- ulong func;
-
- if (in_ram_cmd & cmd) return;
-
- if (cmd == IN_RAM_CMD_READ)
- {
- func = (ulong)flash_read_cmd;
- }
- else
- {
- func = (ulong)flash_write_cmd;
- }
-
- src = (ulong *)(func & 0xfffffff8);
- dst = (ulong *)0xbf008000;
- absEntry = (FUNCPTR_CP)(0xbf0081d0);
- absEntry(src,dst,0x38);
-
- in_ram_cmd = cmd;
-}
-
-/*-----------------------------------------------------------------------
- * flash_init()
- *
- * sets up flash_info and returns size of FLASH (bytes)
- */
-unsigned long flash_init (void)
-{
- unsigned long size = 0;
- int i;
-
- load_cmd(IN_RAM_CMD_READ);
-
- /* Init: no FLASHes known */
- for (i=0; i < CFG_MAX_FLASH_BANKS; ++i) {
- ulong flashbase = PHYS_FLASH_1;
- ulong * buscon = (ulong *) INCA_IP_EBU_EBU_BUSCON0;
-
- /* Disable write protection */
- *buscon &= ~INCA_IP_EBU_EBU_BUSCON1_WRDIS;
-
-#if 1
- memset(&flash_info[i], 0, sizeof(flash_info_t));
-#endif
-
- flash_info[i].size =
- flash_get_size((FPW *)flashbase, &flash_info[i]);
-
- if (flash_info[i].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx\n",
- i, flash_info[i].size);
- }
-
- size += flash_info[i].size;
- }
-
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
- /* monitor protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+monitor_flash_len-1,
- flash_get_info(CFG_MONITOR_BASE));
-#endif
-
-#ifdef CFG_ENV_IS_IN_FLASH
- /* ENV protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR+CFG_ENV_SIZE-1,
- flash_get_info(CFG_ENV_ADDR));
-#endif
-
- return size;
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_get_offsets (ulong base, flash_info_t *info)
-{
- int i;
-
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD
- && (info->flash_id & FLASH_TYPEMASK) == FLASH_AM160B) {
-
- int bootsect_size[4]; /* number of bytes/boot sector */
- int sect_size; /* number of bytes/regular sector */
-
- bootsect_size[0] = 0x00008000;
- bootsect_size[1] = 0x00004000;
- bootsect_size[2] = 0x00004000;
- bootsect_size[3] = 0x00010000;
- sect_size = 0x00020000;
-
- /* set sector offsets for bottom boot block type */
- for (i = 0; i < info->sector_count; i++) {
- info->start[i] = base;
- base += i < 4 ? bootsect_size[i] : sect_size;
- }
- }
-}
-
-/*-----------------------------------------------------------------------
- */
-
-static flash_info_t *flash_get_info(ulong base)
-{
- int i;
- flash_info_t * info;
-
- for (i = 0; i < CFG_MAX_FLASH_BANKS; i ++) {
- info = & flash_info[i];
- if (info->start[0] <= base && base < info->start[0] + info->size)
- break;
- }
-
- return i == CFG_MAX_FLASH_BANKS ? 0 : info;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-void flash_print_info (flash_info_t *info)
-{
- int i;
- uchar *boottype;
- uchar *bootletter;
- uchar *fmt;
- uchar botbootletter[] = "B";
- uchar topbootletter[] = "T";
- uchar botboottype[] = "bottom boot sector";
- uchar topboottype[] = "top boot sector";
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD: printf ("AMD "); break;
- case FLASH_MAN_BM: printf ("BRIGHT MICRO "); break;
- case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
- case FLASH_MAN_SST: printf ("SST "); break;
- case FLASH_MAN_STM: printf ("STM "); break;
- case FLASH_MAN_INTEL: printf ("INTEL "); break;
- default: printf ("Unknown Vendor "); break;
- }
-
- /* check for top or bottom boot, if it applies */
- if (info->flash_id & FLASH_BTYPE) {
- boottype = botboottype;
- bootletter = botbootletter;
- }
- else {
- boottype = topboottype;
- bootletter = topbootletter;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM160B:
- fmt = "29LV160B%s (16 Mbit, %s)\n";
- break;
- case FLASH_28F800C3B:
- case FLASH_28F800C3T:
- fmt = "28F800C3%s (8 Mbit, %s)\n";
- break;
- case FLASH_INTEL800B:
- case FLASH_INTEL800T:
- fmt = "28F800B3%s (8 Mbit, %s)\n";
- break;
- case FLASH_28F160C3B:
- case FLASH_28F160C3T:
- fmt = "28F160C3%s (16 Mbit, %s)\n";
- break;
- case FLASH_INTEL160B:
- case FLASH_INTEL160T:
- fmt = "28F160B3%s (16 Mbit, %s)\n";
- break;
- case FLASH_28F320C3B:
- case FLASH_28F320C3T:
- fmt = "28F320C3%s (32 Mbit, %s)\n";
- break;
- case FLASH_INTEL320B:
- case FLASH_INTEL320T:
- fmt = "28F320B3%s (32 Mbit, %s)\n";
- break;
- case FLASH_28F640C3B:
- case FLASH_28F640C3T:
- fmt = "28F640C3%s (64 Mbit, %s)\n";
- break;
- case FLASH_INTEL640B:
- case FLASH_INTEL640T:
- fmt = "28F640B3%s (64 Mbit, %s)\n";
- break;
- default:
- fmt = "Unknown Chip Type\n";
- break;
- }
-
- printf (fmt, bootletter, boottype);
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20,
- info->sector_count);
-
- printf (" Sector Start Addresses:");
-
- for (i=0; i<info->sector_count; ++i) {
- if ((i % 5) == 0) {
- printf ("\n ");
- }
-
- printf (" %08lX%s", info->start[i],
- info->protect[i] ? " (RO)" : " ");
- }
-
- printf ("\n");
-}
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-
-ulong flash_get_size (FPWV *addr, flash_info_t *info)
-{
- FUNCPTR_RD absEntry;
- FPW retValue;
- int flag;
-
- load_cmd(IN_RAM_CMD_READ);
- absEntry = (FUNCPTR_RD)FLASH_READ_CMD;
-
- flag = disable_interrupts();
- absEntry(FLASH29_CMD_AUTOSELECT,0,0,0);
- if (flag) enable_interrupts();
-
- udelay(100);
-
- flag = disable_interrupts();
- absEntry(FLASH29_CMD_READ, addr + 1, (char *)&retValue, sizeof(retValue));
- absEntry(FLASH29_CMD_READ_RESET,0,0,0);
- if (flag) enable_interrupts();
-
- udelay(100);
-
- switch (retValue) {
-
- case (FPW)AMD_ID_LV160B:
- info->flash_id += FLASH_AM160B;
- info->sector_count = 35;
- info->size = 0x00400000;
- break; /* => 8 or 16 MB */
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- return (0); /* => no or unknown flash */
- }
-
- flash_get_offsets((ulong)addr, info);
-
- return (info->size);
-}
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- FPWV *addr;
- int flag, prot, sect;
- ulong start, now, last;
- int rcode = 0;
- FUNCPTR_WR absEntry;
-
- load_cmd(IN_RAM_CMD_WRITE);
- absEntry = (FUNCPTR_WR)FLASH_WRITE_CMD;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM160B:
- break;
- case FLASH_UNKNOWN:
- default:
- printf ("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- last = get_timer(0);
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last && rcode == 0; sect++) {
-
- if (info->protect[sect] != 0) /* protected, skip it */
- continue;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr = (FPWV *)(info->start[sect]);
- absEntry(FLASH29_CMD_SECTOR, addr, 0);
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- start = get_timer(0);
-
- while ((now = get_timer(start)) <= CFG_FLASH_ERASE_TOUT) {
-
- /* show that we're waiting */
- if ((get_timer(last)) > CFG_HZ) {/* every second */
- putc ('.');
- last = get_timer(0);
- }
- }
-
- flag = disable_interrupts();
- absEntry(FLASH29_CMD_READ_RESET,0,0);
- if (flag)
- enable_interrupts();
- }
-
- printf (" done\n");
- return rcode;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- FPW data = 0; /* 16 or 32 bit word, matches flash bus width on MPC8XX */
- int bytes; /* number of bytes to program in current word */
- int left; /* number of bytes left to program */
- int i, res;
-
- for (left = cnt, res = 0;
- left > 0 && res == 0;
- addr += sizeof(data), left -= sizeof(data) - bytes) {
-
- bytes = addr & (sizeof(data) - 1);
- addr &= ~(sizeof(data) - 1);
-
- /* combine source and destination data so can program
- * an entire word of 16 or 32 bits
- */
- for (i = 0; i < sizeof(data); i++) {
- data <<= 8;
- if (i < bytes || i - bytes >= left )
- data += *((uchar *)addr + i);
- else
- data += *src++;
- }
-
- res = write_word(info, (FPWV *)addr, data);
- }
-
- return (res);
-}
-
-static int write_word (flash_info_t *info, FPWV *dest, FPW data)
-{
- int res = 0; /* result, assume success */
- FUNCPTR_WR absEntry;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*dest & data) != data) {
- return (2);
- }
-
- if (info->start[0] != PHYS_FLASH_1)
- {
- return (3);
- }
-
- load_cmd(IN_RAM_CMD_WRITE);
- absEntry = (FUNCPTR_WR)FLASH_WRITE_CMD;
-
- flag = disable_interrupts();
- absEntry(FLASH29_CMD_PROGRAM,dest,data);
- if (flag) enable_interrupts();
-
- udelay(100);
-
- flag = disable_interrupts();
- absEntry(FLASH29_CMD_READ_RESET,0,0);
- if (flag) enable_interrupts();
-
- return (res);
-}
diff --git a/board/purple/lowlevel_init.S b/board/purple/lowlevel_init.S
deleted file mode 100644
index 668124a784..0000000000
--- a/board/purple/lowlevel_init.S
+++ /dev/null
@@ -1,37 +0,0 @@
-/*
- * Memory sub-system initialization code for PURPLE development board.
- *
- * Copyright (c) 2003 Wolfgang Denk <wd@denx.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <config.h>
-#include <version.h>
-#include <asm/regdef.h>
-
-#define MC_IOGP 0xBF800800
-
- .globl lowlevel_init
-lowlevel_init:
- li t0, MC_IOGP
- li t1, 0xf24
- sw t1, 0(t0)
- j ra
- nop
diff --git a/board/purple/purple.c b/board/purple/purple.c
deleted file mode 100644
index 4c3e5b44b5..0000000000
--- a/board/purple/purple.c
+++ /dev/null
@@ -1,266 +0,0 @@
-/*
- * (C) Copyright 2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <command.h>
-#include <asm/inca-ip.h>
-#include <asm/regdef.h>
-#include <asm/mipsregs.h>
-#include <asm/addrspace.h>
-#include <asm/cacheops.h>
-
-#include "sconsole.h"
-
-#define cache_unroll(base,op) \
- __asm__ __volatile__(" \
- .set noreorder; \
- .set mips3; \
- cache %1, (%0); \
- .set mips0; \
- .set reorder" \
- : \
- : "r" (base), \
- "i" (op));
-
-typedef void (*FUNCPTR)(ulong *source, ulong *destination, ulong nlongs);
-
-extern void asc_serial_init (void);
-extern void asc_serial_putc (char);
-extern void asc_serial_puts (const char *);
-extern int asc_serial_getc (void);
-extern int asc_serial_tstc (void);
-extern void asc_serial_setbrg (void);
-
-static void sdram_timing_init (ulong size)
-{
- register uint pass;
- register uint done;
- register uint count;
- register uint p0, p1, p2, p3, p4;
- register uint addr;
-
-#define WRITE_MC_IOGP_1 *(uint *)0xbf800800 = (p1<<14)+(p2<<13)+(p4<<8)+(p0<<4)+p3;
-#define WRITE_MC_IOGP_2 *(uint *)0xbf800800 = (p1<<14)+(p2<<13)+((p4-16)<<8)+(p0<<4)+p3;
-
- done = 0;
- p0 = 2;
- while (p0 < 4 && done == 0) {
- p1 = 0;
- while (p1 < 2 && done == 0) {
- p2 = 0;
- while (p2 < 2 && done == 0) {
- p3 = 0;
- while (p3 < 16 && done == 0) {
- count = 0;
- p4 = 0;
- while (p4 < 32 && done == 0) {
- WRITE_MC_IOGP_1;
-
- for (addr = KSEG1 + 0x4000;
- addr < KSEG1ADDR (size);
- addr = addr + 4) {
- *(uint *) addr = 0xaa55aa55;
- }
-
- pass = 1;
-
- for (addr = KSEG1 + 0x4000;
- addr < KSEG1ADDR (size) && pass == 1;
- addr = addr + 4) {
- if (*(uint *) addr != 0xaa55aa55)
- pass = 0;
- }
-
- if (pass == 1) {
- count++;
- } else {
- count = 0;
- }
-
- if (count == 32) {
- WRITE_MC_IOGP_2;
- done = 1;
- }
- p4++;
- }
- p3++;
- }
- p2++;
- }
- p1++;
- }
- p0++;
- if (p0 == 1)
- p0++;
- }
-}
-
-long int initdram(int board_type)
-{
- /* The only supported number of SDRAM banks is 4.
- */
-#define CFG_NB 4
-
- ulong cfgpb0 = *INCA_IP_SDRAM_MC_CFGPB0;
- ulong cfgdw = *INCA_IP_SDRAM_MC_CFGDW;
- int cols = cfgpb0 & 0xF;
- int rows = (cfgpb0 & 0xF0) >> 4;
- int dw = cfgdw & 0xF;
- ulong size = (1 << (rows + cols)) * (1 << (dw - 1)) * CFG_NB;
- void (* sdram_init) (ulong);
-
- sdram_init = (void (*)(ulong)) KSEG0ADDR(&sdram_timing_init);
-
- sdram_init(0x10000);
-
- return size;
-}
-
-int checkboard (void)
-{
-
- unsigned long chipid = *(unsigned long *)0xB800C800;
-
- printf ("Board: Purple PLB 2800 chip version %ld, ", chipid & 0xF);
-
- printf("CPU Speed %d MHz\n", CPU_CLOCK_RATE/1000000);
-
- return 0;
-}
-
-int misc_init_r (void)
-{
- asc_serial_init ();
-
- sconsole_putc = asc_serial_putc;
- sconsole_puts = asc_serial_puts;
- sconsole_getc = asc_serial_getc;
- sconsole_tstc = asc_serial_tstc;
- sconsole_setbrg = asc_serial_setbrg;
-
- sconsole_flush ();
- return (0);
-}
-
-/*******************************************************************************
-*
-* copydwords - copy one buffer to another a long at a time
-*
-* This routine copies the first <nlongs> longs from <source> to <destination>.
-*/
-static void copydwords (ulong *source, ulong *destination, ulong nlongs)
-{
- ulong temp,temp1;
- ulong *dstend = destination + nlongs;
-
- while (destination < dstend)
- {
- temp = *source++;
- /* dummy read from sdram */
- temp1 = *(ulong *)0xa0000000;
- /* avoid optimization from compliler */
- *(ulong *)0xbf0081f8 = temp1 + temp;
- *destination++ = temp;
-
- }
-}
-
-/*******************************************************************************
-*
-* copyLongs - copy one buffer to another a long at a time
-*
-* This routine copies the first <nlongs> longs from <source> to <destination>.
-*/
-static void copyLongs (ulong *source, ulong *destination, ulong nlongs)
-{
- FUNCPTR absEntry;
-
- absEntry = (FUNCPTR)(0xbf008000+((ulong)copydwords & 0x7));
- absEntry(source, destination, nlongs);
-}
-
-/*******************************************************************************
-*
-* programLoad - load program into ram
-*
-* This routine load copydwords into ram
-*
-*/
-static void programLoad(void)
-{
- FUNCPTR absEntry;
- ulong *src,*dst;
-
- src = (ulong *)(TEXT_BASE + 0x428);
- dst = (ulong *)0xbf0081d0;
-
- absEntry = (FUNCPTR)(TEXT_BASE + 0x400);
- absEntry(src,dst,0x6);
-
- src = (ulong *)((ulong)copydwords & 0xfffffff8);
- dst = (ulong *)0xbf008000;
-
- absEntry(src,dst,0x38);
-}
-
-/*******************************************************************************
-*
-* copy_code - copy u-boot image from flash to RAM
-*
-* This routine is needed to solve flash problems on this board
-*
-*/
-void copy_code (ulong dest_addr)
-{
- extern long uboot_end_data;
- unsigned long start;
- unsigned long end;
-
- /* load copydwords into ram
- */
- programLoad();
-
- /* copy u-boot code
- */
- copyLongs((ulong *)CFG_MONITOR_BASE,
- (ulong *)dest_addr,
- ((ulong)&uboot_end_data - CFG_MONITOR_BASE + 3) / 4);
-
-
- /* flush caches
- */
-
- start = KSEG0;
- end = start + CFG_DCACHE_SIZE;
- while(start < end) {
- cache_unroll(start,Index_Writeback_Inv_D);
- start += CFG_CACHELINE_SIZE;
- }
-
- start = KSEG0;
- end = start + CFG_ICACHE_SIZE;
- while(start < end) {
- cache_unroll(start,Index_Invalidate_I);
- start += CFG_CACHELINE_SIZE;
- }
-}
diff --git a/board/purple/sconsole.c b/board/purple/sconsole.c
deleted file mode 100644
index f52d50d0a5..0000000000
--- a/board/purple/sconsole.c
+++ /dev/null
@@ -1,125 +0,0 @@
-/*
- * (C) Copyright 2002
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <config.h>
-#include <common.h>
-
-#include "sconsole.h"
-
-void (*sconsole_putc) (char) = 0;
-void (*sconsole_puts) (const char *) = 0;
-int (*sconsole_getc) (void) = 0;
-int (*sconsole_tstc) (void) = 0;
-void (*sconsole_setbrg) (void) = 0;
-
-int serial_init (void)
-{
- sconsole_buffer_t *sb = SCONSOLE_BUFFER;
-
- sb->pos = 0;
- sb->size = 0;
- sb->max_size = CFG_SCONSOLE_SIZE - sizeof (sconsole_buffer_t);
-
- return (0);
-}
-
-void serial_putc (char c)
-{
- if (sconsole_putc) {
- (*sconsole_putc) (c);
- } else {
- sconsole_buffer_t *sb = SCONSOLE_BUFFER;
-
- if (c) {
- sb->data[sb->pos++] = c;
- if (sb->pos == sb->max_size) {
- sb->pos = 0;
- }
- if (sb->size < sb->max_size) {
- sb->size++;
- }
- }
- }
-}
-
-void serial_puts (const char *s)
-{
- if (sconsole_puts) {
- (*sconsole_puts) (s);
- } else {
- sconsole_buffer_t *sb = SCONSOLE_BUFFER;
-
- while (*s) {
- sb->data[sb->pos++] = *s++;
- if (sb->pos == sb->max_size) {
- sb->pos = 0;
- }
- if (sb->size < sb->max_size) {
- sb->size++;
- }
- }
- }
-}
-
-int serial_getc (void)
-{
- if (sconsole_getc) {
- return (*sconsole_getc) ();
- } else {
- return 0;
- }
-}
-
-int serial_tstc (void)
-{
- if (sconsole_tstc) {
- return (*sconsole_tstc) ();
- } else {
- return 0;
- }
-}
-
-void serial_setbrg (void)
-{
- if (sconsole_setbrg) {
- (*sconsole_setbrg) ();
- }
-}
-
-void sconsole_flush (void)
-{
- if (sconsole_putc) {
- sconsole_buffer_t *sb = SCONSOLE_BUFFER;
- unsigned int end = sb->pos < sb->size
- ? sb->pos + sb->max_size - sb->size
- : sb->pos - sb->size;
-
- while (sb->size) {
- (*sconsole_putc) (sb->data[end++]);
- if (end == sb->max_size) {
- end = 0;
- }
- sb->size--;
- }
- }
-}
diff --git a/board/purple/sconsole.h b/board/purple/sconsole.h
deleted file mode 100644
index d441f37fcf..0000000000
--- a/board/purple/sconsole.h
+++ /dev/null
@@ -1,47 +0,0 @@
-/*
- * (C) Copyright 2002
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef _SCONSOLE_H_
-#define _SCONSOLE_H_
-
-#include <config.h>
-
-typedef struct sconsole_buffer_s
-{
- unsigned long size;
- unsigned long max_size;
- unsigned long pos;
- char data [1];
-} sconsole_buffer_t;
-
-#define SCONSOLE_BUFFER ((sconsole_buffer_t *) CFG_SCONSOLE_ADDR)
-
-extern void (* sconsole_putc) (char);
-extern void (* sconsole_puts) (const char *);
-extern int (* sconsole_getc) (void);
-extern int (* sconsole_tstc) (void);
-extern void (* sconsole_setbrg) (void);
-
-extern void sconsole_flush (void);
-
-#endif
diff --git a/board/purple/u-boot.lds b/board/purple/u-boot.lds
deleted file mode 100644
index 1bdac1f4a6..0000000000
--- a/board/purple/u-boot.lds
+++ /dev/null
@@ -1,79 +0,0 @@
-/*
- * (C) Copyright 2003
- * Wolfgang Denk Engineering, <wd@denx.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
-OUTPUT_FORMAT("elf32-bigmips", "elf32-bigmips", "elf32-bigmips")
-*/
-OUTPUT_FORMAT("elf32-tradbigmips", "elf32-tradbigmips", "elf32-tradbigmips")
-OUTPUT_ARCH(mips)
-ENTRY(_start)
-SECTIONS
-{
- . = 0x00000000;
-
- . = ALIGN(4);
- .text :
- {
- cpu/mips/start.o (.text)
- board/purple/lowlevel_init.o (.text)
- cpu/mips/cache.o (.text)
- common/main.o (.text)
- common/dlmalloc.o (.text)
- common/cmd_boot.o (.text)
- lib_generic/zlib.o (.text)
- . = DEFINED(env_offset) ? env_offset : .;
- common/environment.o (.ppcenv)
-
- *(.text)
- }
-
- . = ALIGN(4);
- .rodata : { *(.rodata) }
-
- . = ALIGN(4);
- .data : { *(.data) }
-
- . = ALIGN(4);
- .sdata : { *(.sdata) }
-
- _gp = ALIGN(16);
-
- __got_start = .;
- .got : { *(.got) }
- __got_end = .;
-
- .sdata : { *(.sdata) }
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- uboot_end_data = .;
- num_got_entries = (__got_end - __got_start) >> 2;
-
- . = ALIGN(4);
- .sbss : { *(.sbss) }
- .bss : { *(.bss) }
- uboot_end = .;
-}
diff --git a/board/pxa255_idp/Makefile b/board/pxa255_idp/Makefile
deleted file mode 100644
index b5f352a6f6..0000000000
--- a/board/pxa255_idp/Makefile
+++ /dev/null
@@ -1,48 +0,0 @@
-
-#
-# (C) Copyright 2000-2005
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := pxa_idp.o
-SOBJS := memsetup.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS) $(SOBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/pxa255_idp/README b/board/pxa255_idp/README
deleted file mode 100644
index 0cc2f2ae33..0000000000
--- a/board/pxa255_idp/README
+++ /dev/null
@@ -1,11 +0,0 @@
-Tested:
-
-- MMC
-- Ethernet
-- BL console (on serial port connector J5)
-- flash support
-
-Todo:
-
-- display support
-- PCMCIA support
diff --git a/board/pxa255_idp/config.mk b/board/pxa255_idp/config.mk
deleted file mode 100644
index d2a2040e68..0000000000
--- a/board/pxa255_idp/config.mk
+++ /dev/null
@@ -1,3 +0,0 @@
-#TEXT_BASE = 0xa1700000
-TEXT_BASE = 0xa3000000
-#TEXT_BASE = 0
diff --git a/board/pxa255_idp/idp_notes.txt b/board/pxa255_idp/idp_notes.txt
deleted file mode 100644
index 47467485fe..0000000000
--- a/board/pxa255_idp/idp_notes.txt
+++ /dev/null
@@ -1,46 +0,0 @@
-Notes on the Vibren PXA255 IDP.
-
-Chip select usage:
-
-CS0 - flash
-CS1 - alt flash (Mdoc or main flash)
-CS2 - high speed expansion bus
-CS3 - Media Q, low speed exp bus
-CS4 - low speed exp bus
-CS5 - low speed exp bus
- - IDE: offset 0x03000000 (abs: 0x17000000)
- - Eth: offset 0x03400000 (abs: 0x17400000)
- - core voltage latch: offset 0x03800000 (abs: 0x17800000)
- - CPLD: offset 0x03C00000 (abs: 0x17C00000)
-
-PCMCIA Power control
-
-MAX1602EE w/ code pulled high (Cirrus code)
-vx = 5v
-vy = 3v
-
- Bit pattern
- PWR 3,2,1,0
-vcc vpp A1VCC A0VCC A1VPP A0VPP
-=====================================================
-0 0 0 0 0 0 0x0
-3 (vy) 0 1 0 1 1 0xB
-3 (vy) 3 (vy) 1 0 0 1 0x9
-3 (vy) 12(12in) 1 0 1 0 0xA
-5 (vx) 0 0 1 1 1 0x7
-5 (vx) 5 (vx) 0 1 0 1 0x5
-5 (vx 12(12in) 0 1 1 0 0x6
-
-Display power sequencing:
-
-- VDD applied
-- within 1sec, activate scanning signals
-- wait at least 50mS - scanning signals must be active before activating DISP
-
-Signal mapping:
-Schematic LV8V31 signal name
-=========================================
-LCD_ENAVLCD DISP
-LCD_PWR Applies VDD to board
-
-Both of the above signals are controlled by the CPLD
diff --git a/board/pxa255_idp/memsetup.S b/board/pxa255_idp/memsetup.S
deleted file mode 100644
index 7e485a28a6..0000000000
--- a/board/pxa255_idp/memsetup.S
+++ /dev/null
@@ -1,496 +0,0 @@
-/*
- * Most of this taken from Redboot hal_platform_setup.h with cleanup
- *
- * NOTE: I haven't clean this up considerably, just enough to get it
- * running. See hal_platform_setup.h for the source. See
- * board/cradle/memsetup.S for another PXA250 setup that is
- * much cleaner.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <config.h>
-#include <version.h>
-#include <asm/arch/pxa-regs.h>
-
-DRAM_SIZE: .long CFG_DRAM_SIZE
-
-/* wait for coprocessor write complete */
- .macro CPWAIT reg
- mrc p15,0,\reg,c2,c0,0
- mov \reg,\reg
- sub pc,pc,#4
- .endm
-
-/*
- * Memory setup
- */
-.globl memsetup
-memsetup:
-
- mov r10, lr
-
-#ifdef DEBUG_BLINK_ENABLE
- /* 3rd blink */
- bl blink
-#endif
-
- /* Set up GPIO pins first ----------------------------------------- */
- ldr r0, =GPSR0
- ldr r1, =CFG_GPSR0_VAL
- str r1, [r0]
-
- ldr r0, =GPSR1
- ldr r1, =CFG_GPSR1_VAL
- str r1, [r0]
-
- ldr r0, =GPSR2
- ldr r1, =CFG_GPSR2_VAL
- str r1, [r0]
-
- ldr r0, =GPCR0
- ldr r1, =CFG_GPCR0_VAL
- str r1, [r0]
-
- ldr r0, =GPCR1
- ldr r1, =CFG_GPCR1_VAL
- str r1, [r0]
-
- ldr r0, =GPCR2
- ldr r1, =CFG_GPCR2_VAL
- str r1, [r0]
-
- ldr r0, =GPDR0
- ldr r1, =CFG_GPDR0_VAL
- str r1, [r0]
-
- ldr r0, =GPDR1
- ldr r1, =CFG_GPDR1_VAL
- str r1, [r0]
-
- ldr r0, =GPDR2
- ldr r1, =CFG_GPDR2_VAL
- str r1, [r0]
-
- ldr r0, =GAFR0_L
- ldr r1, =CFG_GAFR0_L_VAL
- str r1, [r0]
-
- ldr r0, =GAFR0_U
- ldr r1, =CFG_GAFR0_U_VAL
- str r1, [r0]
-
- ldr r0, =GAFR1_L
- ldr r1, =CFG_GAFR1_L_VAL
- str r1, [r0]
-
- ldr r0, =GAFR1_U
- ldr r1, =CFG_GAFR1_U_VAL
- str r1, [r0]
-
- ldr r0, =GAFR2_L
- ldr r1, =CFG_GAFR2_L_VAL
- str r1, [r0]
-
- ldr r0, =GAFR2_U
- ldr r1, =CFG_GAFR2_U_VAL
- str r1, [r0]
-
- ldr r0, =PSSR /* enable GPIO pins */
- ldr r1, =CFG_PSSR_VAL
- str r1, [r0]
-
-#ifdef DEBUG_BLINK_ENABLE
- /* 4th debug blink */
- bl blink
-#endif
-
- /* ---------------------------------------------------------------- */
- /* Enable memory interface */
- /* */
- /* The sequence below is based on the recommended init steps */
- /* detailed in the Intel PXA250 Operating Systems Developers Guide, */
- /* Chapter 10. */
- /* ---------------------------------------------------------------- */
-
- /* ---------------------------------------------------------------- */
- /* Step 1: Wait for at least 200 microsedonds to allow internal */
- /* clocks to settle. Only necessary after hard reset... */
- /* FIXME: can be optimized later */
- /* ---------------------------------------------------------------- */
-
- ldr r3, =OSCR /* reset the OS Timer Count to zero */
- mov r2, #0
- str r2, [r3]
- ldr r4, =0x300 /* really 0x2E1 is about 200usec, */
- /* so 0x300 should be plenty */
-1:
- ldr r2, [r3]
- cmp r4, r2
- bgt 1b
-
-mem_init:
-
- ldr r1, =MEMC_BASE /* get memory controller base addr. */
-
- /* ---------------------------------------------------------------- */
- /* Step 2a: Initialize Asynchronous static memory controller */
- /* ---------------------------------------------------------------- */
-
- /* MSC registers: timing, bus width, mem type */
-
- /* MSC0: nCS(0,1) */
- ldr r2, =CFG_MSC0_VAL
- str r2, [r1, #MSC0_OFFSET]
- ldr r2, [r1, #MSC0_OFFSET] /* read back to ensure */
- /* that data latches */
- /* MSC1: nCS(2,3) */
- ldr r2, =CFG_MSC1_VAL
- str r2, [r1, #MSC1_OFFSET]
- ldr r2, [r1, #MSC1_OFFSET]
-
- /* MSC2: nCS(4,5) */
- ldr r2, =CFG_MSC2_VAL
- str r2, [r1, #MSC2_OFFSET]
- ldr r2, [r1, #MSC2_OFFSET]
-
- /* ---------------------------------------------------------------- */
- /* Step 2b: Initialize Card Interface */
- /* ---------------------------------------------------------------- */
-
- /* MECR: Memory Expansion Card Register */
- ldr r2, =CFG_MECR_VAL
- str r2, [r1, #MECR_OFFSET]
- ldr r2, [r1, #MECR_OFFSET]
-
- /* MCMEM0: Card Interface slot 0 timing */
- ldr r2, =CFG_MCMEM0_VAL
- str r2, [r1, #MCMEM0_OFFSET]
- ldr r2, [r1, #MCMEM0_OFFSET]
-
- /* MCMEM1: Card Interface slot 1 timing */
- ldr r2, =CFG_MCMEM1_VAL
- str r2, [r1, #MCMEM1_OFFSET]
- ldr r2, [r1, #MCMEM1_OFFSET]
-
- /* MCATT0: Card Interface Attribute Space Timing, slot 0 */
- ldr r2, =CFG_MCATT0_VAL
- str r2, [r1, #MCATT0_OFFSET]
- ldr r2, [r1, #MCATT0_OFFSET]
-
- /* MCATT1: Card Interface Attribute Space Timing, slot 1 */
- ldr r2, =CFG_MCATT1_VAL
- str r2, [r1, #MCATT1_OFFSET]
- ldr r2, [r1, #MCATT1_OFFSET]
-
- /* MCIO0: Card Interface I/O Space Timing, slot 0 */
- ldr r2, =CFG_MCIO0_VAL
- str r2, [r1, #MCIO0_OFFSET]
- ldr r2, [r1, #MCIO0_OFFSET]
-
- /* MCIO1: Card Interface I/O Space Timing, slot 1 */
- ldr r2, =CFG_MCIO1_VAL
- str r2, [r1, #MCIO1_OFFSET]
- ldr r2, [r1, #MCIO1_OFFSET]
-
-#ifdef DEBUG_BLINK_ENABLE
- /* 5th blink */
- bl blink
-#endif
-
- /* ---------------------------------------------------------------- */
- /* Step 2c: Write FLYCNFG FIXME: what's that??? */
- /* ---------------------------------------------------------------- */
-
- /* ---------------------------------------------------------------- */
- /* Step 2d: Initialize Timing for Sync Memory (SDCLK0) */
- /* ---------------------------------------------------------------- */
-
- /* Before accessing MDREFR we need a valid DRI field, so we set */
- /* this to power on defaults + DRI field. */
-
- ldr r3, =CFG_MDREFR_VAL
- ldr r2, =0xFFF
- and r3, r3, r2
- ldr r4, =0x03ca4000
- orr r4, r4, r3
- str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */
- ldr r4, [r1, #MDREFR_OFFSET]
-
- /* Note: preserve the mdrefr value in r4 */
-
- /* ---------------------------------------------------------------- */
- /* Step 3: Initialize Synchronous Static Memory (Flash/Peripherals) */
- /* ---------------------------------------------------------------- */
-
- /* Initialize SXCNFG register. Assert the enable bits */
-
- /* Write SXMRS to cause an MRS command to all enabled banks of */
- /* synchronous static memory. Note that SXLCR need not be written */
- /* at this time. */
-
- /* FIXME: we use async mode for now */
-
- /* ---------------------------------------------------------------- */
- /* Step 4: Initialize SDRAM */
- /* ---------------------------------------------------------------- */
-
- /* set MDREFR according to user define with exception of a few bits */
-
- ldr r4, =CFG_MDREFR_VAL
- orr r4, r4, #(MDREFR_SLFRSH)
- bic r4, r4, #(MDREFR_E1PIN|MDREFR_E0PIN)
- str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */
- ldr r4, [r1, #MDREFR_OFFSET]
-
- /* Step 4b: de-assert MDREFR:SLFRSH. */
-
- bic r4, r4, #(MDREFR_SLFRSH)
- str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */
- ldr r4, [r1, #MDREFR_OFFSET]
-
- /* Step 4c: assert MDREFR:E1PIN and E0PIO as desired */
-
- ldr r4, =CFG_MDREFR_VAL
- str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */
- ldr r4, [r1, #MDREFR_OFFSET]
-
-
- /* Step 4d: write MDCNFG with MDCNFG:DEx deasserted (set to 0), to */
- /* configure but not enable each SDRAM partition pair. */
-
- ldr r4, =CFG_MDCNFG_VAL
- bic r4, r4, #(MDCNFG_DE0|MDCNFG_DE1)
-
- str r4, [r1, #MDCNFG_OFFSET] /* write back MDCNFG */
- ldr r4, [r1, #MDCNFG_OFFSET]
-
- /* Step 4e: Wait for the clock to the SDRAMs to stabilize, */
- /* 100..200 µsec. */
-
- ldr r3, =OSCR /* reset the OS Timer Count to zero */
- mov r2, #0
- str r2, [r3]
- ldr r4, =0x300 /* really 0x2E1 is about 200usec, */
- /* so 0x300 should be plenty */
-1:
- ldr r2, [r3]
- cmp r4, r2
- bgt 1b
-
- /* Step 4f: Trigger a number (usually 8) refresh cycles by */
- /* attempting non-burst read or write accesses to disabled */
- /* SDRAM, as commonly specified in the power up sequence */
- /* documented in SDRAM data sheets. The address(es) used */
- /* for this purpose must not be cacheable. */
-
- ldr r3, =CFG_DRAM_BASE
- str r2, [r3]
- str r2, [r3]
- str r2, [r3]
- str r2, [r3]
- str r2, [r3]
- str r2, [r3]
- str r2, [r3]
- str r2, [r3]
-
- /* Step 4g: Write MDCNFG with enable bits asserted */
- /* (MDCNFG:DEx set to 1). */
-
- ldr r3, [r1, #MDCNFG_OFFSET]
- orr r3, r3, #(MDCNFG_DE0|MDCNFG_DE1)
- str r3, [r1, #MDCNFG_OFFSET]
-
- /* Step 4h: Write MDMRS. */
-
- ldr r2, =CFG_MDMRS_VAL
- str r2, [r1, #MDMRS_OFFSET]
-
- /* We are finished with Intel's memory controller initialisation */
-#if 0
- /* FIXME turn on serial ports */
- /* look into moving this to board_init() */
- ldr r2, =(PXA_CS5_PHYS + 0x03C0002c)
- mov r3, #0x13
- str r3, [r2]
-#endif
-
-#ifdef DEBUG_BLINK_ENABLE
- /* 6th blink */
- bl blink
-#endif
-
- /* ---------------------------------------------------------------- */
- /* Disable (mask) all interrupts at interrupt controller */
- /* ---------------------------------------------------------------- */
-
-initirqs:
-
- mov r1, #0 /* clear int. level register (IRQ, not FIQ) */
- ldr r2, =ICLR
- str r1, [r2]
-
- ldr r2, =ICMR /* mask all interrupts at the controller */
- str r1, [r2]
-
- /* ---------------------------------------------------------------- */
- /* Clock initialisation */
- /* ---------------------------------------------------------------- */
-
-initclks:
-
- /* Disable the peripheral clocks, and set the core clock frequency */
- /* (hard-coding at 398.12MHz for now). */
-
- /* Turn Off ALL on-chip peripheral clocks for re-configuration */
- /* Note: See label 'ENABLECLKS' for the re-enabling */
-#if 0
- ldr r1, =CKEN
- mov r2, #0
- str r2, [r1]
-
- /* default value in case no valid rotary switch setting is found */
- ldr r2, =(CCCR_L27|CCCR_M2|CCCR_N10) /* DEFAULT: {200/200/100} */
-
- /* ... and write the core clock config register */
- ldr r1, =CCCR
- str r2, [r1]
-
-#endif
-
-#ifdef RTC
- /* enable the 32Khz oscillator for RTC and PowerManager */
-
- ldr r1, =OSCC
- mov r2, #OSCC_OON
- str r2, [r1]
-
- /* NOTE: spin here until OSCC.OOK get set, meaning the PLL */
- /* has settled. */
-60:
- ldr r2, [r1]
- ands r2, r2, #1
- beq 60b
-#endif
-
- /* ---------------------------------------------------------------- */
- /* */
- /* ---------------------------------------------------------------- */
-
- /* Save SDRAM size */
- ldr r1, =DRAM_SIZE
- str r8, [r1]
-
- /* Interrupt init: Mask all interrupts */
- ldr r0, =ICMR /* enable no sources */
- mov r1, #0
- str r1, [r0]
-
- /* FIXME */
-
-#define NODEBUG
-#ifdef NODEBUG
- /*Disable software and data breakpoints */
- mov r0,#0
- mcr p15,0,r0,c14,c8,0 /* ibcr0 */
- mcr p15,0,r0,c14,c9,0 /* ibcr1 */
- mcr p15,0,r0,c14,c4,0 /* dbcon */
-
- /*Enable all debug functionality */
- mov r0,#0x80000000
- mcr p14,0,r0,c10,c0,0 /* dcsr */
-#endif
-
- /* ---------------------------------------------------------------- */
- /* End memsetup */
- /* ---------------------------------------------------------------- */
-
-#ifdef DEBUG_BLINK_ENABLE
- /* 7th blink */
- bl blink
-#endif
-
-endmemsetup:
-
- mov pc, r10
-
-
-#ifdef DEBUG_BLINK_ENABLE
-
-/* debug LED code */
-
-/* delay about 200ms */
-delay:
-
- /* reset OSCR to 0 */
- ldr r8, =OSCR
- mov r9, #0
- str r9, [r8]
-
- /* make sure new value has stuck */
-1:
- ldr r8, =OSCR
- ldr r9, [r8]
- mov r8, #0x10000
- cmp r9, r8
- bgt 1b
-
- /* now, wait for delay to expire */
-1:
- ldr r8, =OSCR
- ldr r9, [r8]
- mov r8, #0xd4000
- cmp r8, r9
- bgt 1b
-
- mov pc, lr
-
-/* blink code -- trashes r7, r8, r9 */
-
-.globl blink
-blink:
-
- mov r7, lr
-
- /* set GPIO10 as outout */
- ldr r8, =GPDR0
- ldr r9, [r8]
- orr r9, r9, #(1<<10)
- str r9, [r8]
-
- /* turn LED off */
- mov r9, #(1<<10)
- ldr r8, =GPCR0
- str r9, [r8]
- bl delay
-
- /* turn LED on */
- mov r9, #(1<<10)
- ldr r8, =GPSR0
- str r9, [r8]
- bl delay
-
- /* turn LED off */
- mov r9, #(1<<10)
- ldr r8, =GPCR0
- str r9, [r8]
-
- mov pc, r7
-
-#endif
diff --git a/board/pxa255_idp/pxa_idp.c b/board/pxa255_idp/pxa_idp.c
deleted file mode 100644
index d5b993ae55..0000000000
--- a/board/pxa255_idp/pxa_idp.c
+++ /dev/null
@@ -1,140 +0,0 @@
-/*
- * (C) Copyright 2002
- * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
- *
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * (C) Copyright 2004
- * BEC Systems <http://bec-systems.com>
- * Cliff Brake <cliff.brake@gmail.com>
- * Support for Accelent/Vibren PXA255 IDP
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <command.h>
-
-/* ------------------------------------------------------------------------- */
-
-
-/*
- * Miscelaneous platform dependent initialisations
- */
-
-int board_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- /* memory and cpu-speed are setup before relocation */
- /* so we do _nothing_ here */
-
- /* arch number of Lubbock-Board */
- gd->bd->bi_arch_number = MACH_TYPE_PXA_IDP;
-
- /* adress of boot parameters */
- gd->bd->bi_boot_params = 0xa0000100;
-
- /* turn on serial ports */
- *(volatile unsigned int *)(PXA_CS5_PHYS + 0x03C0002c) = 0x13;
-
- /* set PWM for LCD */
- /* a value that works is 60Hz, 77% duty cycle */
- CKEN |= CKEN0_PWM0;
- PWM_CTRL0 = 0x3f;
- PWM_PERVAL0 = 0x3ff;
- PWM_PWDUTY0 = 792;
-
- /* clear reset to AC97 codec */
- CKEN |= CKEN2_AC97;
- GCR = GCR_COLD_RST;
-
- /* enable LCD backlight */
- /* *(volatile unsigned int *)(PXA_CS5_PHYS + 0x03C00030) = 0x7; */
-
- /* test display */
- /* lcd_puts("This is a test\nTest #2\n"); */
-
- return 0;
-}
-
-int board_late_init(void)
-{
- setenv("stdout", "serial");
- setenv("stderr", "serial");
- return 0;
-}
-
-
-int dram_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
- gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
- gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
- gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
- gd->bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE;
- gd->bd->bi_dram[3].start = PHYS_SDRAM_4;
- gd->bd->bi_dram[3].size = PHYS_SDRAM_4_SIZE;
-
- return 0;
-}
-
-
-#ifdef DEBUG_BLINKC_ENABLE
-
-void delay_c(void)
-{
- /* reset OSCR to 0 */
- OSCR = 0;
- while(OSCR > 0x10000)
- ;
-
- while(OSCR < 0xd4000)
- ;
-}
-
-void blink_c(void)
-{
- int led_bit = (1<<10);
-
- GPDR0 = led_bit;
- GPCR0 = led_bit;
- delay_c();
- GPSR0 = led_bit;
- delay_c();
- GPCR0 = led_bit;
-}
-
-int do_idpcmd(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- printf("IDPCMD started\n");
- return 0;
-}
-
-U_BOOT_CMD(idpcmd, CFG_MAXARGS, 0, do_idpcmd,
- "idpcmd - custom IDP command\n",
- "no args at this time\n"
-);
-
-#endif
diff --git a/board/pxa255_idp/pxa_reg_calcs.out b/board/pxa255_idp/pxa_reg_calcs.out
deleted file mode 100644
index bda9946c1c..0000000000
--- a/board/pxa255_idp/pxa_reg_calcs.out
+++ /dev/null
@@ -1,119 +0,0 @@
-gafr0_l: 0x80001005
-gafr0_u: 0xa5128012
-gafr1_l: 0x699a9558
-gafr1_u: 0xaaa5aa6a
-gafr2_l: 0xaaaaaaaa
-gafr2_u: 0x2
-gpcr0: 0x1800400
-gpcr1: 0x0
-gpcr2: 0x0
-gpdr0: 0xc1818440
-gpdr1: 0xfcffab82
-gpdr2: 0x1ffff
-gpsr0: 0x8000
-gpsr1: 0x3f0002
-gpsr2: 0x1c000
-
-
-#define CFG_GAFR0_L_VAL 0x80001005
-#define CFG_GAFR0_U_VAL 0xa5128012
-#define CFG_GAFR1_L_VAL 0x699a9558
-#define CFG_GAFR1_U_VAL 0xaaa5aa6a
-#define CFG_GAFR2_L_VAL 0xaaaaaaaa
-#define CFG_GAFR2_U_VAL 0x2
-#define CFG_GPCR0_VAL 0x1800400
-#define CFG_GPCR1_VAL 0x0
-#define CFG_GPCR2_VAL 0x0
-#define CFG_GPDR0_VAL 0xc1818440
-#define CFG_GPDR1_VAL 0xfcffab82
-#define CFG_GPDR2_VAL 0x1ffff
-#define CFG_GPSR0_VAL 0x8000
-#define CFG_GPSR1_VAL 0x3f0002
-#define CFG_GPSR2_VAL 0x1c000
-
-
-GPIO: 0, dir=0, set=0, clr=0, alt=none, desc=USER_RESET#
-GPIO: 1, dir=0, set=0, clr=0, alt=gpio reset, desc=USER_RESET#
-GPIO: 2, dir=0, set=0, clr=0, alt=gpio, desc=BAT_DATA
-GPIO: 3, dir=0, set=0, clr=0, alt=gpio, desc=MQ_IRQ#
-GPIO: 4, dir=0, set=0, clr=0, alt=gpio, desc=IRQ_ETH
-GPIO: 5, dir=0, set=0, clr=0, alt=gpio, desc=IRQ_TOUCH#
-GPIO: 6, dir=1, set=0, clr=0, alt=MMC clk, desc=MMC_CLK
-GPIO: 7, dir=0, set=0, clr=0, alt=gpio, desc=PCC_S0_CD#
-GPIO: 8, dir=0, set=0, clr=0, alt=gpio, desc=PCC_S1_CD#
-GPIO: 9, dir=0, set=0, clr=0, alt=gpio, desc=MMC_CD#
-GPIO: 10, dir=1, set=0, clr=1, alt=gpio, desc=GPIO_10/RTC_CLK/debug LED
-GPIO: 11, dir=0, set=0, clr=0, alt=gpio, desc=3M6_CLK
-GPIO: 12, dir=0, set=0, clr=0, alt=gpio, desc=GPIO_12/32K_CLK
-GPIO: 13, dir=0, set=0, clr=0, alt=gpio, desc=MBGNT
-GPIO: 14, dir=0, set=0, clr=0, alt=gpio, desc=MBREQ
-GPIO: 15, dir=1, set=1, clr=0, alt=nCS_1, desc=CS1#
-GPIO: 16, dir=1, set=0, clr=0, alt=PWM0, desc=PWM0
-GPIO: 17, dir=0, set=0, clr=0, alt=gpio, desc=IRQ_AXB
-GPIO: 18, dir=0, set=0, clr=0, alt=RDY, desc=RDY
-GPIO: 19, dir=0, set=0, clr=0, alt=gpio, desc=XB_DREQ1, PCC_SO_IRQ_O#
-GPIO: 20, dir=0, set=0, clr=0, alt=gpio, desc=XB_DREQ0
-GPIO: 21, dir=0, set=0, clr=0, alt=gpio, desc=IRQ_IDE, PFI
-GPIO: 22, dir=0, set=0, clr=0, alt=gpio, desc=Consumer IR, PCC_S1_IRQ_O#
-GPIO: 23, dir=1, set=0, clr=1, alt=SSP SCLK, desc=SSP_SCLK
-GPIO: 24, dir=1, set=0, clr=1, alt=SSP SFRM, desc=SSP_SFRM
-GPIO: 25, dir=0, set=0, clr=0, alt=gpio, desc=SSP_TXD
-GPIO: 26, dir=0, set=0, clr=0, alt=SSP RXD, desc=SSP_RXD
-GPIO: 27, dir=0, set=0, clr=0, alt=gpio, desc=SSP_EXTCLK
-GPIO: 28, dir=0, set=0, clr=0, alt=AC97 bitclk in, I2S bitclock out, desc=AC_BITCLK
-GPIO: 29, dir=0, set=0, clr=0, alt=AC97 SDATA_IN0, desc=AUD_SDIN0
-GPIO: 30, dir=1, set=0, clr=0, alt=AC97 SDATA_OUT, desc=AC_SDOUT
-GPIO: 31, dir=1, set=0, clr=0, alt=AC97 SYNC, desc=AC_SYNC
-GPIO: 32, dir=0, set=0, clr=0, alt=gpio, desc=AUD_SDIN1
-GPIO: 33, dir=1, set=1, clr=0, alt=nCS_5, desc=CS5#
-GPIO: 34, dir=0, set=0, clr=0, alt=FF RXD, desc=FF_RXD
-GPIO: 35, dir=0, set=0, clr=0, alt=FF CTS, desc=FF_CTS
-GPIO: 36, dir=0, set=0, clr=0, alt=FF DCD, desc=FF_DCD
-GPIO: 37, dir=0, set=0, clr=0, alt=FF DSR, desc=FF_DSR
-GPIO: 38, dir=0, set=0, clr=0, alt=FF RI, desc=FF_RI
-GPIO: 39, dir=1, set=0, clr=0, alt=FF TXD, desc=FF_TXD
-GPIO: 40, dir=1, set=0, clr=0, alt=FF DTR, desc=FF_DTR
-GPIO: 41, dir=1, set=0, clr=0, alt=FF RTS, desc=FF_RTS
-GPIO: 42, dir=0, set=0, clr=0, alt=BT RXD, desc=BT_RXD
-GPIO: 43, dir=1, set=0, clr=0, alt=BT TXD, desc=BT_TXD
-GPIO: 44, dir=0, set=0, clr=0, alt=BT CTS, desc=BT_CTS
-GPIO: 45, dir=1, set=0, clr=0, alt=BT RTS, desc=BT_RTS
-GPIO: 46, dir=0, set=0, clr=0, alt=STD RXD, desc=IR_RXD
-GPIO: 47, dir=1, set=0, clr=0, alt=STD TXD, desc=IR_TXD
-GPIO: 48, dir=1, set=1, clr=0, alt=nPOE, desc=PCC_OE#
-GPIO: 49, dir=1, set=1, clr=0, alt=nPWE, desc=PCC_WE#
-GPIO: 50, dir=1, set=1, clr=0, alt=nPIOR, desc=PCC_IOR#
-GPIO: 51, dir=1, set=1, clr=0, alt=nPIOW, desc=PCC_IOW#
-GPIO: 52, dir=1, set=1, clr=0, alt=nPCE[1], desc=PCC_CE1#
-GPIO: 53, dir=1, set=1, clr=0, alt=nPCE[2], desc=PCC_CE2#
-GPIO: 54, dir=1, set=0, clr=0, alt=nPSKSEL, desc=PCC_SCKSEL
-GPIO: 55, dir=1, set=0, clr=0, alt=nPREG, desc=PCC_REG#
-GPIO: 56, dir=0, set=0, clr=0, alt=nPWAIT, desc=PCC_WAIT#
-GPIO: 57, dir=0, set=0, clr=0, alt=nIOIS16, desc=PCC_IOIS16#
-GPIO: 58, dir=1, set=0, clr=0, alt=LDD[0], desc=LDD0
-GPIO: 59, dir=1, set=0, clr=0, alt=LDD[1], desc=LDD1
-GPIO: 60, dir=1, set=0, clr=0, alt=LDD[2], desc=LDD2
-GPIO: 61, dir=1, set=0, clr=0, alt=LDD[3], desc=LDD3
-GPIO: 62, dir=1, set=0, clr=0, alt=LDD[4], desc=LDD4
-GPIO: 63, dir=1, set=0, clr=0, alt=LDD[5], desc=LDD5
-GPIO: 64, dir=1, set=0, clr=0, alt=LDD[6], desc=LDD6
-GPIO: 65, dir=1, set=0, clr=0, alt=LDD[7], desc=LDD7
-GPIO: 66, dir=1, set=0, clr=0, alt=LDD[8], desc=LDD8
-GPIO: 67, dir=1, set=0, clr=0, alt=LDD[9], desc=LDD9
-GPIO: 68, dir=1, set=0, clr=0, alt=LDD[10], desc=LDD10
-GPIO: 69, dir=1, set=0, clr=0, alt=LDD[11], desc=LDD11
-GPIO: 70, dir=1, set=0, clr=0, alt=LDD[12], desc=LDD12
-GPIO: 71, dir=1, set=0, clr=0, alt=LDD[13], desc=LDD13
-GPIO: 72, dir=1, set=0, clr=0, alt=LDD[14], desc=LDD14
-GPIO: 73, dir=1, set=0, clr=0, alt=LDD[15], desc=LDD15
-GPIO: 74, dir=1, set=0, clr=0, alt=LCD_FCLK, desc=FCLK
-GPIO: 75, dir=1, set=0, clr=0, alt=LCD_LCLK, desc=LCLK
-GPIO: 76, dir=1, set=0, clr=0, alt=LCD_PCLK, desc=PCLK
-GPIO: 77, dir=1, set=0, clr=0, alt=LCD_ACBIAS, desc=ACBIAS
-GPIO: 78, dir=1, set=1, clr=0, alt=nCS_2, desc=CS2#
-GPIO: 79, dir=1, set=1, clr=0, alt=nCS_3, desc=CS3#
-GPIO: 80, dir=1, set=1, clr=0, alt=nCS_4, desc=CS4#
-GPIO: 81, dir=0, set=0, clr=0, alt=gpio, desc=
-GPIO: 82, dir=0, set=0, clr=0, alt=gpio, desc=
-GPIO: 83, dir=0, set=0, clr=0, alt=gpio, desc=
-GPIO: 84, dir=0, set=0, clr=0, alt=gpio, desc=
diff --git a/board/pxa255_idp/pxa_reg_calcs.py b/board/pxa255_idp/pxa_reg_calcs.py
deleted file mode 100644
index c4bcb4b0ad..0000000000
--- a/board/pxa255_idp/pxa_reg_calcs.py
+++ /dev/null
@@ -1,311 +0,0 @@
-#!/usr/bin/python
-
-# (C) Copyright 2004
-# BEC Systems <http://bec-systems.com>
-# Cliff Brake <cliff.brake@gmail.com>
-
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-
-# calculations for PXA255 registers
-
-class gpio:
- dir = '0'
- set = '0'
- clr = '0'
- alt = '0'
- desc = ''
-
- def __init__(self, dir=0, set=0, clr=0, alt=0, desc=''):
- self.dir = dir
- self.set = set
- self.clr = clr
- self.alt = alt
- self.desc = desc
-
-
-# the following is a dictionary of all GPIOs in the system
-# the key is the GPIO number
-
-
-pxa255_alt_func = {
- 0: ['gpio', 'none', 'none', 'none'],
- 1: ['gpio', 'gpio reset', 'none', 'none'],
- 2: ['gpio', 'none', 'none', 'none'],
- 3: ['gpio', 'none', 'none', 'none'],
- 4: ['gpio', 'none', 'none', 'none'],
- 5: ['gpio', 'none', 'none', 'none'],
- 6: ['gpio', 'MMC clk', 'none', 'none'],
- 7: ['gpio', '48MHz clock', 'none', 'none'],
- 8: ['gpio', 'MMC CS0', 'none', 'none'],
- 9: ['gpio', 'MMC CS1', 'none', 'none'],
- 10: ['gpio', 'RTC Clock', 'none', 'none'],
- 11: ['gpio', '3.6MHz', 'none', 'none'],
- 12: ['gpio', '32KHz', 'none', 'none'],
- 13: ['gpio', 'none', 'MBGNT', 'none'],
- 14: ['gpio', 'MBREQ', 'none', 'none'],
- 15: ['gpio', 'none', 'nCS_1', 'none'],
- 16: ['gpio', 'none', 'PWM0', 'none'],
- 17: ['gpio', 'none', 'PWM1', 'none'],
- 18: ['gpio', 'RDY', 'none', 'none'],
- 19: ['gpio', 'DREQ[1]', 'none', 'none'],
- 20: ['gpio', 'DREQ[0]', 'none', 'none'],
- 21: ['gpio', 'none', 'none', 'none'],
- 22: ['gpio', 'none', 'none', 'none'],
- 23: ['gpio', 'none', 'SSP SCLK', 'none'],
- 24: ['gpio', 'none', 'SSP SFRM', 'none'],
- 25: ['gpio', 'none', 'SSP TXD', 'none'],
- 26: ['gpio', 'SSP RXD', 'none', 'none'],
- 27: ['gpio', 'SSP EXTCLK', 'none', 'none'],
- 28: ['gpio', 'AC97 bitclk in, I2S bitclock out', 'I2S bitclock in', 'none'],
- 29: ['gpio', 'AC97 SDATA_IN0', 'I2S SDATA_IN', 'none'],
- 30: ['gpio', 'I2S SDATA_OUT', 'AC97 SDATA_OUT', 'none'],
- 31: ['gpio', 'I2S SYNC', 'AC97 SYNC', 'none'],
- 32: ['gpio', 'AC97 SDATA_IN1', 'I2S SYSCLK', 'none'],
- 33: ['gpio', 'none', 'nCS_5', 'none'],
- 34: ['gpio', 'FF RXD', 'MMC CS0', 'none'],
- 35: ['gpio', 'FF CTS', 'none', 'none'],
- 36: ['gpio', 'FF DCD', 'none', 'none'],
- 37: ['gpio', 'FF DSR', 'none', 'none'],
- 38: ['gpio', 'FF RI', 'none', 'none'],
- 39: ['gpio', 'MMC CS1', 'FF TXD', 'none'],
- 40: ['gpio', 'none', 'FF DTR', 'none'],
- 41: ['gpio', 'none', 'FF RTS', 'none'],
- 42: ['gpio', 'BT RXD', 'none', 'HW RXD'],
- 43: ['gpio', 'none', 'BT TXD', 'HW TXD'],
- 44: ['gpio', 'BT CTS', 'none', 'HW CTS'],
- 45: ['gpio', 'none', 'BT RTS', 'HW RTS'],
- 46: ['gpio', 'ICP_RXD', 'STD RXD', 'none'],
- 47: ['gpio', 'STD TXD', 'ICP_TXD', 'none'],
- 48: ['gpio', 'HW TXD', 'nPOE', 'none'],
- 49: ['gpio', 'HW RXD', 'nPWE', 'none'],
- 50: ['gpio', 'HW CTS', 'nPIOR', 'none'],
- 51: ['gpio', 'nPIOW', 'HW RTS', 'none'],
- 52: ['gpio', 'none', 'nPCE[1]', 'none'],
- 53: ['gpio', 'MMC CLK', 'nPCE[2]', 'none'],
- 54: ['gpio', 'MMC CLK', 'nPSKSEL', 'none'],
- 55: ['gpio', 'none', 'nPREG', 'none'],
- 56: ['gpio', 'nPWAIT', 'none', 'none'],
- 57: ['gpio', 'nIOIS16', 'none', 'none'],
- 58: ['gpio', 'none', 'LDD[0]', 'none'],
- 59: ['gpio', 'none', 'LDD[1]', 'none'],
- 60: ['gpio', 'none', 'LDD[2]', 'none'],
- 61: ['gpio', 'none', 'LDD[3]', 'none'],
- 62: ['gpio', 'none', 'LDD[4]', 'none'],
- 63: ['gpio', 'none', 'LDD[5]', 'none'],
- 64: ['gpio', 'none', 'LDD[6]', 'none'],
- 65: ['gpio', 'none', 'LDD[7]', 'none'],
- 66: ['gpio', 'MBREQ', 'LDD[8]', 'none'],
- 67: ['gpio', 'MMC CS0', 'LDD[9]', 'none'],
- 68: ['gpio', 'MMC CS1', 'LDD[10]', 'none'],
- 69: ['gpio', 'MMC CLK', 'LDD[11]', 'none'],
- 70: ['gpio', 'RTC CLK', 'LDD[12]', 'none'],
- 71: ['gpio', '3.6 MHz', 'LDD[13]', 'none'],
- 72: ['gpio', '32 KHz', 'LDD[14]', 'none'],
- 73: ['gpio', 'MBGNT', 'LDD[15]', 'none'],
- 74: ['gpio', 'none', 'LCD_FCLK', 'none'],
- 75: ['gpio', 'none', 'LCD_LCLK', 'none'],
- 76: ['gpio', 'none', 'LCD_PCLK', 'none'],
- 77: ['gpio', 'none', 'LCD_ACBIAS', 'none'],
- 78: ['gpio', 'none', 'nCS_2', 'none'],
- 79: ['gpio', 'none', 'nCS_3', 'none'],
- 80: ['gpio', 'none', 'nCS_4', 'none'],
- 81: ['gpio', 'NSSPSCLK', 'none', 'none'],
- 82: ['gpio', 'NSSPSFRM', 'none', 'none'],
- 83: ['gpio', 'NSSPTXD', 'NSSPRXD', 'none'],
- 84: ['gpio', 'NSSPTXD', 'NSSPRXD', 'none'],
-}
-
-
-#def __init__(self, dir=0, set=0, clr=0, alt=0, desc=''):
-
-gpio_list = []
-
-for i in range(0,85):
- gpio_list.append(gpio())
-
-#chip select GPIOs
-gpio_list[18] = gpio(0, 0, 0, 1, 'RDY')
-gpio_list[33] = gpio(1, 1, 0, 2, 'CS5#')
-gpio_list[80] = gpio(1, 1, 0, 2, 'CS4#')
-gpio_list[79] = gpio(1, 1, 0, 2, 'CS3#')
-gpio_list[78] = gpio(1, 1, 0, 2, 'CS2#')
-gpio_list[15] = gpio(1, 1, 0, 2, 'CS1#')
-gpio_list[22] = gpio(0, 0, 0, 0, 'Consumer IR, PCC_S1_IRQ_O#')
-gpio_list[21] = gpio(0, 0, 0, 0, 'IRQ_IDE, PFI')
-gpio_list[19] = gpio(0, 0, 0, 0, 'XB_DREQ1, PCC_SO_IRQ_O#')
-gpio_list[20] = gpio(0, 0, 0, 0, 'XB_DREQ0')
-gpio_list[20] = gpio(0, 0, 0, 0, 'XB_DREQ0')
-gpio_list[17] = gpio(0, 0, 0, 0, 'IRQ_AXB')
-gpio_list[16] = gpio(1, 0, 0, 2, 'PWM0')
-
-# PCMCIA stuff
-gpio_list[57] = gpio(0, 0, 0, 1, 'PCC_IOIS16#')
-gpio_list[56] = gpio(0, 0, 0, 1, 'PCC_WAIT#')
-gpio_list[55] = gpio(1, 0, 0, 2, 'PCC_REG#')
-gpio_list[54] = gpio(1, 0, 0, 2, 'PCC_SCKSEL')
-gpio_list[53] = gpio(1, 1, 0, 2, 'PCC_CE2#')
-gpio_list[52] = gpio(1, 1, 0, 2, 'PCC_CE1#')
-gpio_list[51] = gpio(1, 1, 0, 1, 'PCC_IOW#')
-gpio_list[50] = gpio(1, 1, 0, 2, 'PCC_IOR#')
-gpio_list[49] = gpio(1, 1, 0, 2, 'PCC_WE#')
-gpio_list[48] = gpio(1, 1, 0, 2, 'PCC_OE#')
-
-# SSP port
-gpio_list[26] = gpio(0, 0, 0, 1, 'SSP_RXD')
-gpio_list[25] = gpio(0, 0, 0, 0, 'SSP_TXD')
-gpio_list[24] = gpio(1, 0, 1, 2, 'SSP_SFRM')
-gpio_list[23] = gpio(1, 0, 1, 2, 'SSP_SCLK')
-gpio_list[27] = gpio(0, 0, 0, 0, 'SSP_EXTCLK')
-
-# audio codec
-gpio_list[32] = gpio(0, 0, 0, 0, 'AUD_SDIN1')
-gpio_list[31] = gpio(1, 0, 0, 2, 'AC_SYNC')
-gpio_list[30] = gpio(1, 0, 0, 2, 'AC_SDOUT')
-gpio_list[29] = gpio(0, 0, 0, 1, 'AUD_SDIN0')
-gpio_list[28] = gpio(0, 0, 0, 1, 'AC_BITCLK')
-
-# serial ports
-gpio_list[39] = gpio(1, 0, 0, 2, 'FF_TXD')
-gpio_list[34] = gpio(0, 0, 0, 1, 'FF_RXD')
-gpio_list[41] = gpio(1, 0, 0, 2, 'FF_RTS')
-gpio_list[35] = gpio(0, 0, 0, 1, 'FF_CTS')
-gpio_list[40] = gpio(1, 0, 0, 2, 'FF_DTR')
-gpio_list[37] = gpio(0, 0, 0, 1, 'FF_DSR')
-gpio_list[38] = gpio(0, 0, 0, 1, 'FF_RI')
-gpio_list[36] = gpio(0, 0, 0, 1, 'FF_DCD')
-
-gpio_list[43] = gpio(1, 0, 0, 2, 'BT_TXD')
-gpio_list[42] = gpio(0, 0, 0, 1, 'BT_RXD')
-gpio_list[45] = gpio(1, 0, 0, 2, 'BT_RTS')
-gpio_list[44] = gpio(0, 0, 0, 1, 'BT_CTS')
-
-gpio_list[47] = gpio(1, 0, 0, 1, 'IR_TXD')
-gpio_list[46] = gpio(0, 0, 0, 2, 'IR_RXD')
-
-# misc GPIO signals
-gpio_list[14] = gpio(0, 0, 0, 0, 'MBREQ')
-gpio_list[13] = gpio(0, 0, 0, 0, 'MBGNT')
-gpio_list[12] = gpio(0, 0, 0, 0, 'GPIO_12/32K_CLK')
-gpio_list[11] = gpio(0, 0, 0, 0, '3M6_CLK')
-gpio_list[10] = gpio(1, 0, 1, 0, 'GPIO_10/RTC_CLK/debug LED')
-gpio_list[9] = gpio(0, 0, 0, 0, 'MMC_CD#')
-gpio_list[8] = gpio(0, 0, 0, 0, 'PCC_S1_CD#')
-gpio_list[7] = gpio(0, 0, 0, 0, 'PCC_S0_CD#')
-gpio_list[6] = gpio(1, 0, 0, 1, 'MMC_CLK')
-gpio_list[5] = gpio(0, 0, 0, 0, 'IRQ_TOUCH#')
-gpio_list[4] = gpio(0, 0, 0, 0, 'IRQ_ETH')
-gpio_list[3] = gpio(0, 0, 0, 0, 'MQ_IRQ#')
-gpio_list[2] = gpio(0, 0, 0, 0, 'BAT_DATA')
-gpio_list[1] = gpio(0, 0, 0, 1, 'USER_RESET#')
-gpio_list[0] = gpio(0, 0, 0, 1, 'USER_RESET#')
-
-# LCD GPIOs
-gpio_list[58] = gpio(1, 0, 0, 2, 'LDD0')
-gpio_list[59] = gpio(1, 0, 0, 2, 'LDD1')
-gpio_list[60] = gpio(1, 0, 0, 2, 'LDD2')
-gpio_list[61] = gpio(1, 0, 0, 2, 'LDD3')
-gpio_list[62] = gpio(1, 0, 0, 2, 'LDD4')
-gpio_list[63] = gpio(1, 0, 0, 2, 'LDD5')
-gpio_list[64] = gpio(1, 0, 0, 2, 'LDD6')
-gpio_list[65] = gpio(1, 0, 0, 2, 'LDD7')
-gpio_list[66] = gpio(1, 0, 0, 2, 'LDD8')
-gpio_list[67] = gpio(1, 0, 0, 2, 'LDD9')
-gpio_list[68] = gpio(1, 0, 0, 2, 'LDD10')
-gpio_list[69] = gpio(1, 0, 0, 2, 'LDD11')
-gpio_list[70] = gpio(1, 0, 0, 2, 'LDD12')
-gpio_list[71] = gpio(1, 0, 0, 2, 'LDD13')
-gpio_list[72] = gpio(1, 0, 0, 2, 'LDD14')
-gpio_list[73] = gpio(1, 0, 0, 2, 'LDD15')
-gpio_list[74] = gpio(1, 0, 0, 2, 'FCLK')
-gpio_list[75] = gpio(1, 0, 0, 2, 'LCLK')
-gpio_list[76] = gpio(1, 0, 0, 2, 'PCLK')
-gpio_list[77] = gpio(1, 0, 0, 2, 'ACBIAS')
-
-# calculate registers
-pxa_regs = {
- 'gpdr0':0, 'gpdr1':0, 'gpdr2':0,
- 'gpsr0':0, 'gpsr1':0, 'gpsr2':0,
- 'gpcr0':0, 'gpcr1':0, 'gpcr2':0,
- 'gafr0_l':0, 'gafr0_u':0,
- 'gafr1_l':0, 'gafr1_u':0,
- 'gafr2_l':0, 'gafr2_u':0,
-}
-
-# U-boot define names
-uboot_reg_names = {
- 'gpdr0':'CFG_GPDR0_VAL', 'gpdr1':'CFG_GPDR1_VAL', 'gpdr2':'CFG_GPDR2_VAL',
- 'gpsr0':'CFG_GPSR0_VAL', 'gpsr1':'CFG_GPSR1_VAL', 'gpsr2':'CFG_GPSR2_VAL',
- 'gpcr0':'CFG_GPCR0_VAL', 'gpcr1':'CFG_GPCR1_VAL', 'gpcr2':'CFG_GPCR2_VAL',
- 'gafr0_l':'CFG_GAFR0_L_VAL', 'gafr0_u':'CFG_GAFR0_U_VAL',
- 'gafr1_l':'CFG_GAFR1_L_VAL', 'gafr1_u':'CFG_GAFR1_U_VAL',
- 'gafr2_l':'CFG_GAFR2_L_VAL', 'gafr2_u':'CFG_GAFR2_U_VAL',
-}
-
-# bit mappings
-
-bit_mappings = [
-
-{ 'gpio':(0,32), 'shift':1, 'regs':{'dir':'gpdr0', 'set':'gpsr0', 'clr':'gpcr0'} },
-{ 'gpio':(32,64), 'shift':1, 'regs':{'dir':'gpdr1', 'set':'gpsr1', 'clr':'gpcr1'} },
-{ 'gpio':(64,85), 'shift':1, 'regs':{'dir':'gpdr2', 'set':'gpsr2', 'clr':'gpcr2'} },
-{ 'gpio':(0,16), 'shift':2, 'regs':{'alt':'gafr0_l'} },
-{ 'gpio':(16,32), 'shift':2, 'regs':{'alt':'gafr0_u'} },
-{ 'gpio':(32,48), 'shift':2, 'regs':{'alt':'gafr1_l'} },
-{ 'gpio':(48,64), 'shift':2, 'regs':{'alt':'gafr1_u'} },
-{ 'gpio':(64,80), 'shift':2, 'regs':{'alt':'gafr2_l'} },
-{ 'gpio':(80,85), 'shift':2, 'regs':{'alt':'gafr2_u'} },
-
-]
-
-def stuff_bits(bit_mapping, gpio_list):
- gpios = range( bit_mapping['gpio'][0], bit_mapping['gpio'][1])
-
- for gpio in gpios:
- for reg in bit_mapping['regs'].keys():
- value = eval( 'gpio_list[gpio].%s' % (reg) )
- if ( value ):
- # we have a high bit
- bit_shift = (gpio - bit_mapping['gpio'][0]) * bit_mapping['shift']
- bit = value << (bit_shift)
- pxa_regs[bit_mapping['regs'][reg]] |= bit
-
-for i in bit_mappings:
- stuff_bits(i, gpio_list)
-
-# now print out all regs
-registers = pxa_regs.keys()
-registers.sort()
-for reg in registers:
- print '%s: 0x%x' % (reg, pxa_regs[reg])
-
-# print define to past right into U-Boot source code
-
-print
-print
-
-for reg in registers:
- print '#define %s 0x%x' % (uboot_reg_names[reg], pxa_regs[reg])
-
-# print all GPIOS
-print
-print
-
-for i in range(len(gpio_list)):
- gpio_i = gpio_list[i]
- alt_func_desc = pxa255_alt_func[i][gpio_i.alt]
- print 'GPIO: %i, dir=%i, set=%i, clr=%i, alt=%s, desc=%s' % (i, gpio_i.dir, gpio_i.set, gpio_i.clr, alt_func_desc, gpio_i.desc)
-
-
diff --git a/board/pxa255_idp/u-boot.lds b/board/pxa255_idp/u-boot.lds
deleted file mode 100644
index 20ce108938..0000000000
--- a/board/pxa255_idp/u-boot.lds
+++ /dev/null
@@ -1,55 +0,0 @@
-/*
- * (C) Copyright 2000-2005
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-ENTRY(_start)
-SECTIONS
-{
- . = 0x00000000;
-
- . = ALIGN(4);
- .text :
- {
- cpu/pxa/start.o (.text)
- *(.text)
- }
-
- . = ALIGN(4);
- .rodata : { *(.rodata) }
-
- . = ALIGN(4);
- .data : { *(.data) }
-
- . = ALIGN(4);
- .got : { *(.got) }
-
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = ALIGN(4);
- __bss_start = .;
- .bss : { *(.bss) }
- _end = .;
-}
diff --git a/board/quantum/Makefile b/board/quantum/Makefile
deleted file mode 100644
index e50f5ff088..0000000000
--- a/board/quantum/Makefile
+++ /dev/null
@@ -1,41 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o fpga.o
-
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/quantum/config.mk b/board/quantum/config.mk
deleted file mode 100644
index 7cb374eb85..0000000000
--- a/board/quantum/config.mk
+++ /dev/null
@@ -1,28 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# RMU boards
-#
-
-TEXT_BASE = 0xfff00000
diff --git a/board/quantum/fpga.c b/board/quantum/fpga.c
deleted file mode 100644
index 75c2658e8a..0000000000
--- a/board/quantum/fpga.c
+++ /dev/null
@@ -1,263 +0,0 @@
-/*
- * (C) Copyright 2001-2003
- * Matthias Fuchs, esd gmbh germany, matthias.fuchs@esd-electronics.com
- * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-/* The DEBUG define must be before common to enable debugging */
-#undef DEBUG
-#include <common.h>
-#include <asm/processor.h>
-#include <command.h>
-#include "fpga.h"
-/* ------------------------------------------------------------------------- */
-
-#define MAX_ONES 226
-
-/* MPC850 port D */
-#define PD(bit) (1 << (15 - (bit)))
-# define FPGA_INIT PD(11) /* FPGA init pin (ppc input) */
-# define FPGA_PRG PD(12) /* FPGA program pin (ppc output) */
-# define FPGA_CLK PD(13) /* FPGA clk pin (ppc output) */
-# define FPGA_DATA PD(14) /* FPGA data pin (ppc output) */
-# define FPGA_DONE PD(15) /* FPGA done pin (ppc input) */
-
-
-/* DDR 0 - input, 1 - output */
-#define FPGA_INIT_PDDIR FPGA_PRG | FPGA_CLK | FPGA_DATA /* just set outputs */
-
-
-#define SET_FPGA(data) immr->im_ioport.iop_pddat = (data)
-#define GET_FPGA immr->im_ioport.iop_pddat
-
-#define FPGA_WRITE_1 { \
- SET_FPGA(FPGA_PRG | FPGA_DATA); /* set clock to 0 */ \
- SET_FPGA(FPGA_PRG | FPGA_DATA); /* set data to 1 */ \
- SET_FPGA(FPGA_PRG | FPGA_CLK | FPGA_DATA); /* set clock to 1 */ \
- SET_FPGA(FPGA_PRG | FPGA_CLK | FPGA_DATA);} /* set data to 1 */
-
-#define FPGA_WRITE_0 { \
- SET_FPGA(FPGA_PRG | FPGA_DATA); /* set clock to 0 */ \
- SET_FPGA(FPGA_PRG); /* set data to 0 */ \
- SET_FPGA(FPGA_PRG | FPGA_CLK); /* set clock to 1 */ \
- SET_FPGA(FPGA_PRG | FPGA_CLK | FPGA_DATA);} /* set data to 1 */
-
-
-int fpga_boot (unsigned char *fpgadata, int size)
-{
- volatile immap_t *immr = (immap_t *) CFG_IMMR;
- int i, index, len;
- int count;
-
-#ifdef CFG_FPGA_SPARTAN2
- int j;
- unsigned char data;
-#else
- unsigned char b;
- int bit;
-#endif
-
- debug ("fpga_boot: fpgadata = %p, size = %d\n", fpgadata, size);
-
- /* display infos on fpgaimage */
- printf ("FPGA:");
- index = 15;
- for (i = 0; i < 4; i++) {
- len = fpgadata[index];
- printf (" %s", &(fpgadata[index + 1]));
- index += len + 3;
- }
- printf ("\n");
-
-
- index = 0;
-
-#ifdef CFG_FPGA_SPARTAN2
- /* search for preamble 0xFFFFFFFF */
- while (1) {
- if ((fpgadata[index] == 0xff) && (fpgadata[index + 1] == 0xff)
- && (fpgadata[index + 2] == 0xff)
- && (fpgadata[index + 3] == 0xff))
- break; /* preamble found */
- else
- index++;
- }
-#else
- /* search for preamble 0xFF2X */
- for (index = 0; index < size - 1; index++) {
- if ((fpgadata[index] == 0xff)
- && ((fpgadata[index + 1] & 0xf0) == 0x30))
- break;
- }
- index += 2;
-#endif
-
- debug ("FPGA: configdata starts at position 0x%x\n", index);
- debug ("FPGA: length of fpga-data %d\n", size - index);
-
- /*
- * Setup port pins for fpga programming
- */
- immr->im_ioport.iop_pddir = FPGA_INIT_PDDIR;
-
- debug ("%s, ", ((GET_FPGA & FPGA_DONE) == 0) ? "NOT DONE" : "DONE");
- debug ("%s\n", ((GET_FPGA & FPGA_INIT) == 0) ? "NOT INIT" : "INIT");
-
- /*
- * Init fpga by asserting and deasserting PROGRAM*
- */
- SET_FPGA (FPGA_CLK | FPGA_DATA);
-
- /* Wait for FPGA init line low */
- count = 0;
- while (GET_FPGA & FPGA_INIT) {
- udelay (1000); /* wait 1ms */
- /* Check for timeout - 100us max, so use 3ms */
- if (count++ > 3) {
- debug ("FPGA: Booting failed!\n");
- return ERROR_FPGA_PRG_INIT_LOW;
- }
- }
-
- debug ("%s, ", ((GET_FPGA & FPGA_DONE) == 0) ? "NOT DONE" : "DONE");
- debug ("%s\n", ((GET_FPGA & FPGA_INIT) == 0) ? "NOT INIT" : "INIT");
-
- /* deassert PROGRAM* */
- SET_FPGA (FPGA_PRG | FPGA_CLK | FPGA_DATA);
-
- /* Wait for FPGA end of init period . */
- count = 0;
- while (!(GET_FPGA & FPGA_INIT)) {
- udelay (1000); /* wait 1ms */
- /* Check for timeout */
- if (count++ > 3) {
- debug ("FPGA: Booting failed!\n");
- return ERROR_FPGA_PRG_INIT_HIGH;
- }
- }
-
- debug ("%s, ", ((GET_FPGA & FPGA_DONE) == 0) ? "NOT DONE" : "DONE");
- debug ("%s\n", ((GET_FPGA & FPGA_INIT) == 0) ? "NOT INIT" : "INIT");
-
- debug ("write configuration data into fpga\n");
- /* write configuration-data into fpga... */
-
-#ifdef CFG_FPGA_SPARTAN2
- /*
- * Load uncompressed image into fpga
- */
- for (i = index; i < size; i++) {
-#ifdef CFG_FPGA_PROG_FEEDBACK
- if ((i % 1024) == 0)
- printf ("%6d out of %6d\r", i, size); /* let them know we are alive */
-#endif
-
- data = fpgadata[i];
- for (j = 0; j < 8; j++) {
- if ((data & 0x80) == 0x80) {
- FPGA_WRITE_1;
- } else {
- FPGA_WRITE_0;
- }
- data <<= 1;
- }
- }
- /* add some 0xff to the end of the file */
- for (i = 0; i < 8; i++) {
- data = 0xff;
- for (j = 0; j < 8; j++) {
- if ((data & 0x80) == 0x80) {
- FPGA_WRITE_1;
- } else {
- FPGA_WRITE_0;
- }
- data <<= 1;
- }
- }
-#else
- /* send 0xff 0x20 */
- FPGA_WRITE_1;
- FPGA_WRITE_1;
- FPGA_WRITE_1;
- FPGA_WRITE_1;
- FPGA_WRITE_1;
- FPGA_WRITE_1;
- FPGA_WRITE_1;
- FPGA_WRITE_1;
- FPGA_WRITE_0;
- FPGA_WRITE_0;
- FPGA_WRITE_1;
- FPGA_WRITE_0;
- FPGA_WRITE_0;
- FPGA_WRITE_0;
- FPGA_WRITE_0;
- FPGA_WRITE_0;
-
- /*
- ** Bit_DeCompression
- ** Code 1 .. maxOnes : n '1's followed by '0'
- ** maxOnes + 1 .. maxOnes + 1 : n - 1 '1's no '0'
- ** maxOnes + 2 .. 254 : n - (maxOnes + 2) '0's followed by '1'
- ** 255 : '1'
- */
-
- for (i = index; i < size; i++) {
- b = fpgadata[i];
- if ((b >= 1) && (b <= MAX_ONES)) {
- for (bit = 0; bit < b; bit++) {
- FPGA_WRITE_1;
- }
- FPGA_WRITE_0;
- } else if (b == (MAX_ONES + 1)) {
- for (bit = 1; bit < b; bit++) {
- FPGA_WRITE_1;
- }
- } else if ((b >= (MAX_ONES + 2)) && (b <= 254)) {
- for (bit = 0; bit < (b - (MAX_ONES + 2)); bit++) {
- FPGA_WRITE_0;
- }
- FPGA_WRITE_1;
- } else if (b == 255) {
- FPGA_WRITE_1;
- }
- }
-#endif
- debug ("\n\n");
- debug ("%s, ", ((GET_FPGA & FPGA_DONE) == 0) ? "NOT DONE" : "DONE");
- debug ("%s\n", ((GET_FPGA & FPGA_INIT) == 0) ? "NOT INIT" : "INIT");
-
- /*
- * Check if fpga's DONE signal - correctly booted ?
- */
-
- /* Wait for FPGA end of programming period . */
- count = 0;
- while (!(GET_FPGA & FPGA_DONE)) {
- udelay (1000); /* wait 1ms */
- /* Check for timeout */
- if (count++ > 3) {
- debug ("FPGA: Booting failed!\n");
- return ERROR_FPGA_PRG_DONE;
- }
- }
-
- debug ("FPGA: Booting successful!\n");
- return 0;
-}
diff --git a/board/quantum/fpga.h b/board/quantum/fpga.h
deleted file mode 100644
index 2ef45e59b1..0000000000
--- a/board/quantum/fpga.h
+++ /dev/null
@@ -1,34 +0,0 @@
-/*
- * (C) Copyright 2002
- * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
- * Keith Outwater, keith_outwater@mvis.com.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- */
-
-/*
- * Virtex2 FPGA configuration support for the QUANTUM computer
- */
-int fpga_boot(unsigned char *fpgadata, int size);
-
-#define ERROR_FPGA_PRG_INIT_LOW -1 /* Timeout after PRG* asserted */
-#define ERROR_FPGA_PRG_INIT_HIGH -2 /* Timeout after PRG* deasserted */
-#define ERROR_FPGA_PRG_DONE -3 /* Timeout after programming */
-/* vim: set ts=4 sw=4 tw=78: */
diff --git a/board/quantum/quantum.c b/board/quantum/quantum.c
deleted file mode 100644
index 2861bc3b16..0000000000
--- a/board/quantum/quantum.c
+++ /dev/null
@@ -1,257 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-
-#include <common.h>
-#include <mpc8xx.h>
-#include "fpga.h"
-
-/* ------------------------------------------------------------------------- */
-
-static long int dram_size (long int, long int *, long int);
-unsigned long flash_init (void);
-
-/* ------------------------------------------------------------------------- */
-
-#define _NOT_USED_ 0xFFFFCC25
-
-const uint sdram_table[] = {
- /*
- * Single Read. (Offset 00h in UPMA RAM)
- */
- 0x0F03CC04, 0x00ACCC24, 0x1FF74C20, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /*
- * Burst Read. (Offset 08h in UPMA RAM)
- */
- 0x0F03CC04, 0x00ACCC24, 0x00FFCC20, 0x00FFCC20,
- 0x01FFCC20, 0x1FF74C20, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /*
- * Single Write. (Offset 18h in UPMA RAM)
- */
- 0x0F03CC02, 0x00AC0C24, 0x1FF74C25, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /*
- * Burst Write. (Offset 20h in UPMA RAM)
- */
- 0x0F03CC00, 0x00AC0C20, 0x00FFFC20, 0x00FFFC22,
- 0x01FFFC24, 0x1FF74C25, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /*
- * Refresh. (Offset 30h in UPMA RAM)
- * (Initialization code at 0x36)
- */
- 0x0FF0CC24, 0xFFFFCC24, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, 0xEFFB8C34, 0x0FF74C34,
- 0x0FFACCB4, 0x0FF5CC34, 0x0FFCC34, 0x0FFFCCB4,
-
- /*
- * Exception. (Offset 3Ch in UPMA RAM)
- */
- 0x0FEA8C34, 0x1FB54C34, 0xFFFFCC34, _NOT_USED_
-};
-
-/* ------------------------------------------------------------------------- */
-
-
-/*
- * Check Board Identity:
- */
-
-int checkboard (void)
-{
- char *s = getenv ("serial#");
-
- puts ("Board QUANTUM, Serial No: ");
-
- for (; s && *s; ++s) {
- if (*s == ' ')
- break;
- putc (*s);
- }
- putc ('\n');
- return (0); /* success */
-}
-
-/* ------------------------------------------------------------------------- */
-
-long int initdram (int board_type)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- long int size9;
-
- upmconfig (UPMA, (uint *) sdram_table,
- sizeof (sdram_table) / sizeof (uint));
-
- /* Refresh clock prescalar */
- memctl->memc_mptpr = CFG_MPTPR;
-
- memctl->memc_mar = 0x00000088;
-
- /* Map controller banks 1 to the SDRAM bank */
- memctl->memc_or1 = CFG_OR1_PRELIM;
- memctl->memc_br1 = CFG_BR1_PRELIM;
-
- memctl->memc_mamr = CFG_MAMR_9COL & (~(MAMR_PTAE)); /* no refresh yet */
-
- udelay (200);
-
- /* perform SDRAM initializsation sequence */
-
- memctl->memc_mcr = 0x80002136; /* SDRAM bank 0 */
- udelay (1);
-
- memctl->memc_mamr |= MAMR_PTAE; /* enable refresh */
-
- udelay (1000);
-
- /* Check Bank 0 Memory Size,
- * 9 column mode
- */
- size9 = dram_size (CFG_MAMR_9COL, (long *) SDRAM_BASE_PRELIM,
- SDRAM_MAX_SIZE);
- /*
- * Final mapping:
- */
- memctl->memc_or1 = ((-size9) & 0xFFFF0000) | CFG_OR_TIMING_SDRAM;
- udelay (1000);
-
- return (size9);
-}
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Check memory range for valid RAM. A simple memory test determines
- * the actually available RAM size between addresses `base' and
- * `base + maxsize'. Some (not all) hardware errors are detected:
- * - short between address lines
- * - short between data lines
- */
-
-static long int dram_size (long int mamr_value, long int *base,
- long int maxsize)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- volatile ulong *addr;
- ulong cnt, val, size;
- ulong save[32]; /* to make test non-destructive */
- unsigned char i = 0;
-
- memctl->memc_mamr = mamr_value;
-
- for (cnt = maxsize / sizeof (long); cnt > 0; cnt >>= 1) {
- addr = base + cnt; /* pointer arith! */
-
- save[i++] = *addr;
- *addr = ~cnt;
- }
-
- /* write 0 to base address */
- addr = base;
- save[i] = *addr;
- *addr = 0;
-
- /* check at base address */
- if ((val = *addr) != 0) {
- /* Restore the original data before leaving the function.
- */
- *addr = save[i];
- for (cnt = 1; cnt <= maxsize / sizeof (long); cnt <<= 1) {
- addr = (volatile ulong *) base + cnt;
- *addr = save[--i];
- }
- return (0);
- }
-
- for (cnt = 1; cnt <= maxsize / sizeof (long); cnt <<= 1) {
- addr = base + cnt; /* pointer arith! */
-
- val = *addr;
- *addr = save[--i];
-
- if (val != (~cnt)) {
- size = cnt * sizeof (long);
- /* Restore the original data before returning
- */
- for (cnt <<= 1; cnt <= maxsize / sizeof (long);
- cnt <<= 1) {
- addr = (volatile ulong *) base + cnt;
- *addr = save[--i];
- }
- return (size);
- }
- }
- return (maxsize);
-}
-
-/*
- * Miscellaneous intialization
- */
-int misc_init_r (void)
-{
- char *fpga_data_str = getenv ("fpgadata");
- char *fpga_size_str = getenv ("fpgasize");
- void *fpga_data;
- int fpga_size;
- int status;
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- int flash_size;
-
- /* Remap FLASH according to real size */
- flash_size = flash_init ();
- memctl->memc_or0 = CFG_OR_TIMING_FLASH | (-flash_size & 0xFFFF8000);
- memctl->memc_br0 = (CFG_FLASH_BASE & BR_BA_MSK) | BR_MS_GPCM | BR_V;
-
- if (fpga_data_str && fpga_size_str) {
- fpga_data = (void *) simple_strtoul (fpga_data_str, NULL, 16);
- fpga_size = simple_strtoul (fpga_size_str, NULL, 10);
-
- status = fpga_boot (fpga_data, fpga_size);
- if (status != 0) {
- printf ("\nFPGA: Booting failed ");
- switch (status) {
- case ERROR_FPGA_PRG_INIT_LOW:
- printf ("(Timeout: INIT not low after asserting PROGRAM*)\n ");
- break;
- case ERROR_FPGA_PRG_INIT_HIGH:
- printf ("(Timeout: INIT not high after deasserting PROGRAM*)\n ");
- break;
- case ERROR_FPGA_PRG_DONE:
- printf ("(Timeout: DONE not high after programming FPGA)\n ");
- break;
- }
- }
- }
- return 0;
-}
diff --git a/board/quantum/u-boot.lds b/board/quantum/u-boot.lds
deleted file mode 100644
index 049f9901f7..0000000000
--- a/board/quantum/u-boot.lds
+++ /dev/null
@@ -1,142 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc8xx/start.o (.text)
- common/dlmalloc.o (.text)
- lib_ppc/ppcstring.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
- lib_generic/zlib.o (.text)
-/* XXX ?
- . = env_offset;
-*/
- common/environment.o(.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/quantum/u-boot.lds.debug b/board/quantum/u-boot.lds.debug
deleted file mode 100644
index 894b9bd25b..0000000000
--- a/board/quantum/u-boot.lds.debug
+++ /dev/null
@@ -1,132 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc8xx/start.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
-
- . = env_offset;
- common/environment.o(.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/r360mpi/Makefile b/board/r360mpi/Makefile
deleted file mode 100644
index 13ce9fc9d2..0000000000
--- a/board/r360mpi/Makefile
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/r360mpi/config.mk b/board/r360mpi/config.mk
deleted file mode 100644
index 9d6080b84a..0000000000
--- a/board/r360mpi/config.mk
+++ /dev/null
@@ -1,28 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# TQM8xxL boards
-#
-
-TEXT_BASE = 0x40000000
diff --git a/board/r360mpi/flash.c b/board/r360mpi/flash.c
deleted file mode 100644
index 9b42960c7d..0000000000
--- a/board/r360mpi/flash.c
+++ /dev/null
@@ -1,484 +0,0 @@
-/*
- * (C) Copyright 2001
- * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
- *
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/* #define DEBUG */
-
-#include <common.h>
-#include <mpc8xx.h>
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-#if defined(CFG_ENV_IS_IN_FLASH)
-# ifndef CFG_ENV_ADDR
-# define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_ENV_OFFSET)
-# endif
-# ifndef CFG_ENV_SIZE
-# define CFG_ENV_SIZE CFG_ENV_SECT_SIZE
-# endif
-# ifndef CFG_ENV_SECT_SIZE
-# define CFG_ENV_SECT_SIZE CFG_ENV_SIZE
-# endif
-#endif
-
-/*-----------------------------------------------------------------------
- * Protection Flags:
- */
-#define FLAG_PROTECT_SET 0x01
-#define FLAG_PROTECT_CLEAR 0x02
-
-/* Board support for 1 or 2 flash devices */
-#undef FLASH_PORT_WIDTH32
-#define FLASH_PORT_WIDTH16
-
-#ifdef FLASH_PORT_WIDTH16
-#define FLASH_PORT_WIDTH ushort
-#define FLASH_PORT_WIDTHV vu_short
-#else
-#define FLASH_PORT_WIDTH ulong
-#define FLASH_PORT_WIDTHV vu_long
-#endif
-
-#define FPW FLASH_PORT_WIDTH
-#define FPWV FLASH_PORT_WIDTHV
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (FPW * addr, flash_info_t * info);
-static int write_data (flash_info_t * info, ulong dest, FPW data);
-static void flash_get_offsets (ulong base, flash_info_t * info);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- unsigned long size_b0;
- int i;
-
- /* Init: no FLASHes known */
- for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* Static FLASH Bank configuration here - FIXME XXX */
- size_b0 = flash_get_size ((FPW *) FLASH_BASE0_PRELIM, &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size_b0, size_b0 << 20);
- }
-
- /* Remap FLASH according to real size */
- memctl->memc_or0 = CFG_OR_TIMING_FLASH | (-size_b0 & 0xFFFF8000);
- memctl->memc_br0 = (CFG_FLASH_BASE & BR_BA_MSK) | BR_PS_16 | BR_MS_GPCM | BR_V;
-
- /* Re-do sizing to get full correct info */
- size_b0 = flash_get_size ((FPW *) CFG_FLASH_BASE, &flash_info[0]);
-
- flash_get_offsets (CFG_FLASH_BASE, &flash_info[0]);
-
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
- /* monitor protection ON by default */
- (void) flash_protect (FLAG_PROTECT_SET,
- CFG_FLASH_BASE,
- CFG_FLASH_BASE + monitor_flash_len - 1,
- &flash_info[0]);
-#endif
-
-#ifdef CFG_ENV_IS_IN_FLASH
- /* ENV protection ON by default */
- flash_protect (FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1,
- &flash_info[0]);
-#endif
-
- flash_info[0].size = size_b0;
-
- return (size_b0);
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_get_offsets (ulong base, flash_info_t * info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- return;
- }
-
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
- for (i = 0; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00020000);
- }
- }
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t * info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_INTEL:
- printf ("INTEL ");
- break;
- default:
- printf ("Unknown Vendor ");
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_28F320J3A:
- printf ("28F320J3A\n");
- break;
- case FLASH_28F640J3A:
- printf ("28F640J3A\n");
- break;
- case FLASH_28F128J3A:
- printf ("28F128J3A\n");
- break;
- default:
- printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " ");
- }
- printf ("\n");
- return;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-
-static ulong flash_get_size (FPW * addr, flash_info_t * info)
-{
- FPW value;
-
- /* Make sure Block Lock Bits get cleared */
- addr[0] = (FPW) 0x00FF00FF;
- addr[0] = (FPW) 0x00600060;
- addr[0] = (FPW) 0x00D000D0;
- addr[0] = (FPW) 0x00FF00FF;
-
- /* Write auto select command: read Manufacturer ID */
- addr[0x5555] = (FPW) 0x00AA00AA;
- addr[0x2AAA] = (FPW) 0x00550055;
- addr[0x5555] = (FPW) 0x00900090;
-
- value = addr[0];
-
- debug ("Manuf. ID @ 0x%08lx: 0x%08lx\n", (ulong)addr, value);
-
- switch (value) {
- case (FPW) INTEL_MANUFACT:
- info->flash_id = FLASH_MAN_INTEL;
- break;
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
- return (0); /* no or unknown flash */
- }
-
- value = addr[1]; /* device ID */
-
- debug ("Device ID @ 0x%08lx: 0x%08lx\n", (ulong)(&addr[1]), value);
-
- switch (value) {
- case (FPW) INTEL_ID_28F320J3A:
- info->flash_id += FLASH_28F320J3A;
- info->sector_count = 32;
- info->size = 0x00400000;
- break; /* => 4 MB */
-
- case (FPW) INTEL_ID_28F640J3A:
- info->flash_id += FLASH_28F640J3A;
- info->sector_count = 64;
- info->size = 0x00800000;
- break; /* => 8 MB */
-
- case (FPW) INTEL_ID_28F128J3A:
- info->flash_id += FLASH_28F128J3A;
- info->sector_count = 128;
- info->size = 0x01000000;
- break; /* => 16 MB */
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- break;
- }
-
- if (info->sector_count > CFG_MAX_FLASH_SECT) {
- printf ("** ERROR: sector count %d > max (%d) **\n",
- info->sector_count, CFG_MAX_FLASH_SECT);
- info->sector_count = CFG_MAX_FLASH_SECT;
- }
-
- addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
-
- return (info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t * info, int s_first, int s_last)
-{
- int flag, prot, sect;
- ulong type, start, now, last;
- int rcode = 0;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- type = (info->flash_id & FLASH_VENDMASK);
- if ((type != FLASH_MAN_INTEL)) {
- printf ("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- return 1;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- start = get_timer (0);
- last = start;
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- FPWV *addr = (FPWV *) (info->start[sect]);
- FPW status;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
-
- *addr = (FPW) 0x00500050; /* clear status register */
- *addr = (FPW) 0x00200020; /* erase setup */
- *addr = (FPW) 0x00D000D0; /* erase confirm */
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts ();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
- if ((now = get_timer (start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- *addr = (FPW) 0x00B000B0; /* suspend erase */
- *addr = (FPW) 0x00FF00FF; /* reset to read mode */
- rcode = 1;
- break;
- }
-
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- }
-
- *addr = (FPW) 0x00FF00FF; /* reset to read mode */
- }
- }
- printf (" done\n");
- return rcode;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- * 4 - Flash not identified
- */
-
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- ulong cp, wp;
- FPW data;
-
- int i, l, rc, port_width;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- return 4;
- }
-/* get lower word aligned address */
-#ifdef FLASH_PORT_WIDTH16
- wp = (addr & ~1);
- port_width = 2;
-#else
- wp = (addr & ~3);
- port_width = 4;
-#endif
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i = 0, cp = wp; i < l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
- for (; i < port_width && cnt > 0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt == 0 && i < port_width; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
-
- if ((rc = write_data (info, wp, data)) != 0) {
- return (rc);
- }
- wp += port_width;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= port_width) {
- data = 0;
- for (i = 0; i < port_width; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_data (info, wp, data)) != 0) {
- return (rc);
- }
- wp += port_width;
- cnt -= port_width;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i < port_width; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
-
- return (write_data (info, wp, data));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word or halfword to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_data (flash_info_t * info, ulong dest, FPW data)
-{
- FPWV *addr = (FPWV *) dest;
- ulong status;
- ulong start;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*addr & data) != data) {
- printf ("not erased at %08lx (%x)\n", (ulong) addr, *addr);
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
-
- *addr = (FPW) 0x00400040; /* write setup */
- *addr = data;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts ();
-
- start = get_timer (0);
-
- while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
- if (get_timer (start) > CFG_FLASH_WRITE_TOUT) {
- *addr = (FPW) 0x00FF00FF; /* restore read mode */
- return (1);
- }
- }
-
- *addr = (FPW) 0x00FF00FF; /* restore read mode */
-
- return (0);
-}
diff --git a/board/r360mpi/r360mpi.c b/board/r360mpi/r360mpi.c
deleted file mode 100644
index ffb4c0ecf9..0000000000
--- a/board/r360mpi/r360mpi.c
+++ /dev/null
@@ -1,419 +0,0 @@
-/*
- * (C) Copyright 2001-2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <config.h>
-#include <mpc8xx.h>
-#include <i2c.h>
-
-#include <commproc.h>
-#include <command.h>
-#include <malloc.h>
-
-#include <linux/types.h>
-#include <linux/string.h> /* for strdup */
-
-
-/*
- * Memory Controller Using
- *
- * CS0 - Flash memory (0x40000000)
- * CS1 - FLASH memory (0x????????)
- * CS2 - SDRAM (0x00000000)
- * CS3 -
- * CS4 -
- * CS5 -
- * CS6 - PCMCIA device
- * CS7 - PCMCIA device
- */
-
-/* ------------------------------------------------------------------------- */
-
-#define _not_used_ 0xffffffff
-
-const uint sdram_table[]=
-{
- /* single read. (offset 0 in upm RAM) */
- 0x1f07fc04, 0xeeaefc04, 0x11adfc04, 0xefbbbc00,
- 0x1ff77c47,
-
- /* MRS initialization (offset 5) */
-
- 0x1ff77c34, 0xefeabc34, 0x1fb57c35,
-
- /* burst read. (offset 8 in upm RAM) */
- 0x1f07fc04, 0xeeaefc04, 0x10adfc04, 0xf0affc00,
- 0xf0affc00, 0xf1affc00, 0xefbbbc00, 0x1ff77c47,
- _not_used_, _not_used_, _not_used_, _not_used_,
- _not_used_, _not_used_, _not_used_, _not_used_,
-
- /* single write. (offset 18 in upm RAM) */
- 0x1f27fc04, 0xeeaebc00, 0x01b93c04, 0x1ff77c47,
- _not_used_, _not_used_, _not_used_, _not_used_,
-
- /* burst write. (offset 20 in upm RAM) */
- 0x1f07fc04, 0xeeaebc00, 0x10ad7c00, 0xf0affc00,
- 0xf0affc00, 0xe1bbbc04, 0x1ff77c47, _not_used_,
- _not_used_, _not_used_, _not_used_, _not_used_,
- _not_used_, _not_used_, _not_used_, _not_used_,
-
- /* refresh. (offset 30 in upm RAM) */
- 0x1ff5fc84, 0xfffffc04, 0xfffffc04, 0xfffffc04,
- 0xfffffc84, 0xfffffc07, _not_used_, _not_used_,
- _not_used_, _not_used_, _not_used_, _not_used_,
-
- /* exception. (offset 3c in upm RAM) */
- 0x7ffffc07, _not_used_, _not_used_, _not_used_ };
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Check Board Identity:
- */
-
-int checkboard (void)
-{
- puts ("Board: R360 MPI Board\n");
- return 0;
-}
-
-/* ------------------------------------------------------------------------- */
-
-static long int dram_size (long int, long int *, long int);
-
-/* ------------------------------------------------------------------------- */
-
-long int initdram (int board_type)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- long int size8, size9;
- long int size_b0 = 0;
- unsigned long reg;
-
- upmconfig (UPMA, (uint *) sdram_table,
- sizeof (sdram_table) / sizeof (uint));
-
- /*
- * Preliminary prescaler for refresh (depends on number of
- * banks): This value is selected for four cycles every 62.4 us
- * with two SDRAM banks or four cycles every 31.2 us with one
- * bank. It will be adjusted after memory sizing.
- */
- memctl->memc_mptpr = CFG_MPTPR_2BK_8K;
-
- memctl->memc_mar = 0x00000088;
-
- /*
- * Map controller bank 2 to the SDRAM bank at
- * preliminary address - these have to be modified after the
- * SDRAM size has been determined.
- */
- memctl->memc_or2 = CFG_OR2_PRELIM;
- memctl->memc_br2 = CFG_BR2_PRELIM;
-
- memctl->memc_mamr = CFG_MAMR_8COL & (~(MAMR_PTAE)); /* no refresh yet */
-
- udelay (200);
-
- /* perform SDRAM initializsation sequence */
-
- memctl->memc_mcr = 0x80004105; /* SDRAM bank 0 */
- udelay (200);
- memctl->memc_mcr = 0x80004230; /* SDRAM bank 0 - execute twice */
- udelay (200);
-
- memctl->memc_mamr |= MAMR_PTAE; /* enable refresh */
-
- udelay (1000);
-
- /*
- * Check Bank 2 Memory Size for re-configuration
- *
- * try 8 column mode
- */
- size8 = dram_size (CFG_MAMR_8COL, (long *) SDRAM_BASE2_PRELIM,
- SDRAM_MAX_SIZE);
-
- udelay (1000);
-
- /*
- * try 9 column mode
- */
- size9 = dram_size (CFG_MAMR_9COL, (long *) SDRAM_BASE2_PRELIM,
- SDRAM_MAX_SIZE);
-
- if (size8 < size9) { /* leave configuration at 9 columns */
- size_b0 = size9;
-/* debug ("SDRAM Bank 0 in 9 column mode: %ld MB\n", size >> 20); */
- } else { /* back to 8 columns */
- size_b0 = size8;
- memctl->memc_mamr = CFG_MAMR_8COL;
- udelay (500);
-/* debug ("SDRAM Bank 0 in 8 column mode: %ld MB\n", size >> 20); */
- }
-
- udelay (1000);
-
- /*
- * Adjust refresh rate depending on SDRAM type, both banks
- * For types > 128 MBit leave it at the current (fast) rate
- */
- if ((size_b0 < 0x02000000)) {
- /* reduce to 15.6 us (62.4 us / quad) */
- memctl->memc_mptpr = CFG_MPTPR_2BK_4K;
- udelay (1000);
- }
-
- /*
- * Final mapping
- */
-
- memctl->memc_or1 = ((-size_b0) & 0xFFFF0000) | CFG_OR_TIMING_SDRAM;
- memctl->memc_br1 = (CFG_SDRAM_BASE & BR_BA_MSK) | BR_MS_UPMA | BR_V;
-
- /* adjust refresh rate depending on SDRAM type, one bank */
- reg = memctl->memc_mptpr;
- reg >>= 1; /* reduce to CFG_MPTPR_1BK_8K / _4K */
- memctl->memc_mptpr = reg;
-
- udelay (10000);
-
-#ifdef CONFIG_CAN_DRIVER
- /* Initialize OR3 / BR3 */
- memctl->memc_or3 = CFG_OR3_CAN; /* switch GPLB_5 to GPLA_5 */
- memctl->memc_br3 = CFG_BR3_CAN;
-
- /* Initialize MBMR */
- memctl->memc_mbmr = MBMR_GPL_B4DIS; /* GPL_B4 works as UPWAITB */
-
- /* Initialize UPMB for CAN: single read */
- memctl->memc_mdr = 0xFFFFC004;
- memctl->memc_mcr = 0x0100 | UPMB;
-
- memctl->memc_mdr = 0x0FFFD004;
- memctl->memc_mcr = 0x0101 | UPMB;
-
- memctl->memc_mdr = 0x0FFFC000;
- memctl->memc_mcr = 0x0102 | UPMB;
-
- memctl->memc_mdr = 0x3FFFC004;
- memctl->memc_mcr = 0x0103 | UPMB;
-
- memctl->memc_mdr = 0xFFFFDC05;
- memctl->memc_mcr = 0x0104 | UPMB;
-
- /* Initialize UPMB for CAN: single write */
- memctl->memc_mdr = 0xFFFCC004;
- memctl->memc_mcr = 0x0118 | UPMB;
-
- memctl->memc_mdr = 0xCFFCD004;
- memctl->memc_mcr = 0x0119 | UPMB;
-
- memctl->memc_mdr = 0x0FFCC000;
- memctl->memc_mcr = 0x011A | UPMB;
-
- memctl->memc_mdr = 0x7FFCC004;
- memctl->memc_mcr = 0x011B | UPMB;
-
- memctl->memc_mdr = 0xFFFDCC05;
- memctl->memc_mcr = 0x011C | UPMB;
-#endif
-
- return (size_b0);
-}
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Check memory range for valid RAM. A simple memory test determines
- * the actually available RAM size between addresses `base' and
- * `base + maxsize'. Some (not all) hardware errors are detected:
- * - short between address lines
- * - short between data lines
- */
-
-static long int dram_size (long int mamr_value,
- long int *base, long int maxsize)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
-
- memctl->memc_mamr = mamr_value;
-
- return (get_ram_size(base, maxsize));
-}
-
-/* ------------------------------------------------------------------------- */
-
-void r360_i2c_lcd_write (uchar data0, uchar data1)
-{
- if (i2c_write (CFG_I2C_LCD_ADDR, data0, 1, &data1, 1)) {
- printf("Can't write lcd data 0x%02X 0x%02X.\n", data0, data1);
- }
-}
-
-/* ------------------------------------------------------------------------- */
-
-/*-----------------------------------------------------------------------
- * Keyboard Controller
- */
-
-/* Number of bytes returned from Keyboard Controller */
-#define KEYBD_KEY_MAX 16 /* maximum key number */
-#define KEYBD_DATALEN ((KEYBD_KEY_MAX + 7) / 8) /* normal key scan data */
-
-static uchar *key_match (uchar *);
-
-int misc_init_r (void)
-{
- char kbd_data[KEYBD_DATALEN];
- char keybd_env[2 * KEYBD_DATALEN + 1];
- char *str;
- int i;
-
- i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
-
- i2c_read (CFG_I2C_KEY_ADDR, 0, 0, (uchar *)kbd_data, KEYBD_DATALEN);
-
- for (i = 0; i < KEYBD_DATALEN; ++i) {
- sprintf (keybd_env + i + i, "%02X", kbd_data[i]);
- }
- setenv ("keybd", keybd_env);
-
- str = strdup ((char *)key_match ((uchar *)keybd_env)); /* decode keys */
-
-#ifdef CONFIG_PREBOOT /* automatically configure "preboot" command on key match */
- setenv ("preboot", str); /* set or delete definition */
-#endif /* CONFIG_PREBOOT */
- if (str != NULL) {
- free (str);
- }
-
- return (0);
-}
-
-/*-----------------------------------------------------------------------
- * Check if pressed key(s) match magic sequence,
- * and return the command string associated with that key(s).
- *
- * If no key press was decoded, NULL is returned.
- *
- * Note: the first character of the argument will be overwritten with
- * the "magic charcter code" of the decoded key(s), or '\0'.
- *
- *
- * Note: the string points to static environment data and must be
- * saved before you call any function that modifies the environment.
- */
-#ifdef CONFIG_PREBOOT
-
-static uchar kbd_magic_prefix[] = "key_magic";
-static uchar kbd_command_prefix[] = "key_cmd";
-
-static uchar *key_match (uchar * kbd_str)
-{
- uchar magic[sizeof (kbd_magic_prefix) + 1];
- uchar cmd_name[sizeof (kbd_command_prefix) + 1];
- uchar *str, *suffix;
- uchar *kbd_magic_keys;
- char *cmd;
-
- /*
- * The following string defines the characters that can pe appended
- * to "key_magic" to form the names of environment variables that
- * hold "magic" key codes, i. e. such key codes that can cause
- * pre-boot actions. If the string is empty (""), then only
- * "key_magic" is checked (old behaviour); the string "125" causes
- * checks for "key_magic1", "key_magic2" and "key_magic5", etc.
- */
- if ((kbd_magic_keys = (uchar *)getenv ("magic_keys")) != NULL) {
- /* loop over all magic keys;
- * use '\0' suffix in case of empty string
- */
- for (suffix = kbd_magic_keys;
- *suffix || suffix == kbd_magic_keys;
- ++suffix) {
- sprintf ((char *)magic, "%s%c", kbd_magic_prefix, *suffix);
-
-#if 0
- printf ("### Check magic \"%s\"\n", magic);
-#endif
-
- if ((str = (uchar *)getenv ((char *)magic)) != 0) {
-
-#if 0
- printf ("### Compare \"%s\" \"%s\"\n",
- kbd_str, str);
-#endif
- if (strcmp ((char *)kbd_str, (char *)str) == 0) {
- sprintf ((char *)cmd_name, "%s%c",
- kbd_command_prefix,
- *suffix);
-
- if ((cmd = getenv ((char *)cmd_name)) != 0) {
-#if 0
- printf ("### Set PREBOOT to $(%s): \"%s\"\n",
- cmd_name, cmd);
-#endif
- return ((uchar *)cmd);
- }
- }
- }
- }
- }
-#if 0
- printf ("### Delete PREBOOT\n");
-#endif
- *kbd_str = '\0';
- return (NULL);
-}
-#endif /* CONFIG_PREBOOT */
-
-/* Read Keyboard status */
-int do_kbd (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
-{
- uchar kbd_data[KEYBD_DATALEN];
- uchar keybd_env[2 * KEYBD_DATALEN + 1];
- int i;
-
- i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
-
- /* Read keys */
- i2c_read (CFG_I2C_KEY_ADDR, 0, 0, kbd_data, KEYBD_DATALEN);
-
- puts ("Keys:");
- for (i = 0; i < KEYBD_DATALEN; ++i) {
- sprintf ((char *)(keybd_env + i + i), "%02X", kbd_data[i]);
- printf (" %02x", kbd_data[i]);
- }
- putc ('\n');
- setenv ("keybd", (char *)keybd_env);
- return 0;
-}
-
-U_BOOT_CMD(
- kbd, 1, 1, do_kbd,
- "kbd - read keyboard status\n",
- NULL
-);
diff --git a/board/r360mpi/u-boot.lds b/board/r360mpi/u-boot.lds
deleted file mode 100644
index 8b06af78e4..0000000000
--- a/board/r360mpi/u-boot.lds
+++ /dev/null
@@ -1,144 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc8xx/start.o (.text)
- cpu/mpc8xx/cpu_init.o (.text)
- cpu/mpc8xx/interrupts.o (.text)
- cpu/mpc8xx/traps.o (.text)
-/***
- . = env_offset;
- common/environment.o (.text)
-***/
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
- . = ALIGN(128 * 1024);
- .ppcenv :
- {
- common/environment.o (.ppcenv)
- }
-}
diff --git a/board/rattler/Makefile b/board/rattler/Makefile
deleted file mode 100644
index 52f0fd6ef2..0000000000
--- a/board/rattler/Makefile
+++ /dev/null
@@ -1,46 +0,0 @@
-#
-# (C) Copyright 2001-2005
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := $(BOARD).o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/rattler/config.mk b/board/rattler/config.mk
deleted file mode 100644
index 5fca8c7c69..0000000000
--- a/board/rattler/config.mk
+++ /dev/null
@@ -1,30 +0,0 @@
-#
-# (C) Copyright 2001-2005
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# Modified by, Yuli Barcohen, Arabella Software Ltd. <yuli@arabellasw.com>
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# Rattler series boards by Analogue & Micro
-#
-
-TEXT_BASE = 0xFE000000
diff --git a/board/rattler/rattler.c b/board/rattler/rattler.c
deleted file mode 100644
index be7977dec4..0000000000
--- a/board/rattler/rattler.c
+++ /dev/null
@@ -1,231 +0,0 @@
-/*
- * Copyright (C) 2004 Arabella Software Ltd.
- * Yuli Barcohen <yuli@arabellasw.com>
- *
- * Support for Analogue&Micro Rattler boards family.
- * Tested on Rattler8248.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc8260.h>
-#include <ioports.h>
-
-/*
- * I/O Port configuration table
- *
- * if conf is 1, then that port pin will be configured at boot time
- * according to the five values podr/pdir/ppar/psor/pdat for that entry
- */
-
-#define CFG_FCC1 (CONFIG_ETHER_INDEX == 1)
-#define CFG_FCC2 (CONFIG_ETHER_INDEX == 2)
-
-const iop_conf_t iop_conf_tab[4][32] = {
-
- /* Port A */
- { /* conf ppar psor pdir podr pdat */
- /* PA31 */ { CFG_FCC1, 1, 1, 0, 0, 0 }, /* FCC1 MII COL */
- /* PA30 */ { CFG_FCC1, 1, 1, 0, 0, 0 }, /* FCC1 MII CRS */
- /* PA29 */ { CFG_FCC1, 1, 1, 1, 0, 0 }, /* FCC1 MII TX_ER */
- /* PA28 */ { CFG_FCC1, 1, 1, 1, 0, 0 }, /* FCC1 MII TX_EN */
- /* PA27 */ { CFG_FCC1, 1, 1, 0, 0, 0 }, /* FCC1 MII RX_DV */
- /* PA26 */ { CFG_FCC1, 1, 1, 0, 0, 0 }, /* FCC1 MII RX_ER */
- /* PA25 */ { 0, 0, 0, 0, 0, 0 }, /* PA25 */
- /* PA24 */ { 0, 0, 0, 0, 0, 0 }, /* PA24 */
- /* PA23 */ { 0, 0, 0, 0, 0, 0 }, /* PA23 */
- /* PA22 */ { 1, 0, 0, 1, 0, 1 }, /* Eth PHYs reset */
- /* PA21 */ { CFG_FCC1, 1, 0, 1, 0, 0 }, /* FCC1 MII TxD[3] */
- /* PA20 */ { CFG_FCC1, 1, 0, 1, 0, 0 }, /* FCC1 MII TxD[2] */
- /* PA19 */ { CFG_FCC1, 1, 0, 1, 0, 0 }, /* FCC1 MII TxD[1] */
- /* PA18 */ { CFG_FCC1, 1, 0, 1, 0, 0 }, /* FCC1 MII TxD[0] */
- /* PA17 */ { CFG_FCC1, 1, 0, 0, 0, 0 }, /* FCC1 MII RxD[0] */
- /* PA16 */ { CFG_FCC1, 1, 0, 0, 0, 0 }, /* FCC1 MII RxD[1] */
- /* PA15 */ { CFG_FCC1, 1, 0, 0, 0, 0 }, /* FCC1 MII RxD[2] */
- /* PA14 */ { CFG_FCC1, 1, 0, 0, 0, 0 }, /* FCC1 MII RxD[3] */
- /* PA13 */ { 0, 0, 0, 0, 0, 0 }, /* PA13 */
- /* PA12 */ { 0, 0, 0, 0, 0, 0 }, /* PA12 */
- /* PA11 */ { 0, 0, 0, 0, 0, 0 }, /* PA11 */
- /* PA10 */ { 0, 0, 0, 0, 0, 0 }, /* PA10 */
- /* PA9 */ { 0, 1, 0, 1, 0, 0 }, /* SMC2 TxD */
- /* PA8 */ { 0, 1, 0, 0, 0, 0 }, /* SMC2 RxD */
- /* PA7 */ { 0, 0, 0, 0, 0, 0 }, /* PA7 */
- /* PA6 */ { 0, 0, 0, 0, 0, 0 }, /* PA6 */
- /* PA5 */ { 0, 0, 0, 0, 0, 0 }, /* PA5 */
- /* PA4 */ { 0, 0, 0, 0, 0, 0 }, /* PA4 */
- /* PA3 */ { 0, 0, 0, 0, 0, 0 }, /* PA3 */
- /* PA2 */ { 0, 0, 0, 0, 0, 0 }, /* PA2 */
- /* PA1 */ { 0, 0, 0, 0, 0, 0 }, /* PA1 */
- /* PA0 */ { 0, 0, 0, 0, 0, 0 } /* PA0 */
- },
-
- /* Port B */
- { /* conf ppar psor pdir podr pdat */
- /* PB31 */ { CFG_FCC2, 1, 0, 1, 0, 0 }, /* FCC2 MII TX_ER */
- /* PB30 */ { CFG_FCC2, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_DV */
- /* PB29 */ { CFG_FCC2, 1, 1, 1, 0, 0 }, /* FCC2 MII TX_EN */
- /* PB28 */ { CFG_FCC2, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_ER */
- /* PB27 */ { CFG_FCC2, 1, 0, 0, 0, 0 }, /* FCC2 MII COL */
- /* PB26 */ { CFG_FCC2, 1, 0, 0, 0, 0 }, /* FCC2 MII CRS */
- /* PB25 */ { CFG_FCC2, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[3] */
- /* PB24 */ { CFG_FCC2, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[2] */
- /* PB23 */ { CFG_FCC2, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[1] */
- /* PB22 */ { CFG_FCC2, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[0] */
- /* PB21 */ { CFG_FCC2, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[0] */
- /* PB20 */ { CFG_FCC2, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[1] */
- /* PB19 */ { CFG_FCC2, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[2] */
- /* PB18 */ { CFG_FCC2, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[3] */
- /* PB17 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */
- /* PB16 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */
- /* PB15 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */
- /* PB14 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */
- /* PB13 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */
- /* PB12 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */
- /* PB11 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */
- /* PB10 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */
- /* PB9 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */
- /* PB8 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */
- /* PB7 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */
- /* PB6 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */
- /* PB5 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */
- /* PB4 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */
- /* PB3 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */
- /* PB2 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */
- /* PB1 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */
- /* PB0 */ { 0, 0, 0, 0, 0, 0 } /* non-existent */
- },
-
- /* Port C */
- { /* conf ppar psor pdir podr pdat */
- /* PC31 */ { 0, 0, 0, 0, 0, 0 }, /* PC31 */
- /* PC30 */ { 0, 0, 0, 0, 0, 0 }, /* PC30 */
- /* PC29 */ { 0, 0, 0, 0, 0, 0 }, /* PC29 */
- /* PC28 */ { 0, 0, 0, 0, 0, 0 }, /* PC28 */
- /* PC27 */ { 0, 0, 0, 0, 0, 0 }, /* PC27 */
- /* PC26 */ { 0, 0, 0, 0, 0, 0 }, /* PC26 */
- /* PC25 */ { 0, 0, 0, 0, 0, 0 }, /* PC25 */
- /* PC24 */ { 0, 0, 0, 0, 0, 0 }, /* PC24 */
- /* PC23 */ { 0, 0, 0, 0, 0, 0 }, /* PC23 */
- /* PC22 */ { CFG_FCC1, 1, 0, 0, 0, 0 }, /* FCC1 TxClk (CLK10) */
- /* PC21 */ { CFG_FCC1, 1, 0, 0, 0, 0 }, /* FCC1 RxClk (CLK11) */
- /* PC20 */ { 0, 0, 0, 0, 0, 0 }, /* PC20 */
- /* PC19 */ { 0, 0, 0, 0, 0, 0 }, /* PC19 */
- /* PC18 */ { CFG_FCC2, 1, 0, 0, 0, 0 }, /* FCC2 TxClk (CLK14) */
- /* PC17 */ { CFG_FCC2, 1, 0, 0, 0, 0 }, /* FCC2 RxClk (CLK15) */
- /* PC16 */ { 0, 0, 0, 0, 0, 0 }, /* PC16 */
- /* PC15 */ { 0, 0, 0, 0, 0, 0 }, /* PC15 */
- /* PC14 */ { 0, 0, 0, 0, 0, 0 }, /* PC14 */
- /* PC13 */ { 0, 0, 0, 0, 0, 0 }, /* PC13 */
- /* PC12 */ { 0, 0, 0, 0, 0, 0 }, /* PC12 */
- /* PC11 */ { 0, 0, 0, 0, 0, 0 }, /* PC11 */
- /* PC10 */ { 0, 0, 0, 0, 0, 0 }, /* PC10 */
- /* PC9 */ { 1, 0, 0, 1, 0, 1 }, /* MDIO */
- /* PC8 */ { 1, 0, 0, 1, 0, 1 }, /* MDC */
- /* PC7 */ { 0, 0, 0, 0, 0, 0 }, /* PC7 */
- /* PC6 */ { 0, 0, 0, 0, 0, 0 }, /* PC6 */
- /* PC5 */ { 1, 1, 0, 1, 0, 0 }, /* SMC1 TxD */
- /* PC4 */ { 1, 1, 0, 0, 0, 0 }, /* SMC1 RxD */
- /* PC3 */ { 0, 0, 0, 0, 0, 0 }, /* PC3 */
- /* PC2 */ { 0, 0, 0, 0, 0, 0 }, /* PC2 */
- /* PC1 */ { 0, 0, 0, 0, 0, 0 }, /* PC1 */
- /* PC0 */ { 0, 0, 0, 0, 0, 0 }, /* PC0 */
- },
-
- /* Port D */
- { /* conf ppar psor pdir podr pdat */
- /* PD31 */ { 1, 1, 0, 0, 0, 0 }, /* SCC1 RxD */
- /* PD30 */ { 1, 1, 1, 1, 0, 0 }, /* SCC1 TxD */
- /* PD29 */ { 0, 0, 0, 0, 0, 0 }, /* PD29 */
- /* PD28 */ { 0, 0, 0, 0, 0, 0 }, /* PD28 */
- /* PD27 */ { 0, 0, 0, 0, 0, 0 }, /* PD27 */
- /* PD26 */ { 0, 0, 0, 0, 0, 0 }, /* PD26 */
- /* PD25 */ { 0, 0, 0, 0, 0, 0 }, /* PD25 */
- /* PD24 */ { 0, 0, 0, 0, 0, 0 }, /* PD24 */
- /* PD23 */ { 0, 0, 0, 0, 0, 0 }, /* PD23 */
- /* PD22 */ { 0, 0, 0, 0, 0, 0 }, /* PD22 */
- /* PD21 */ { 0, 0, 0, 0, 0, 0 }, /* PD21 */
- /* PD20 */ { 0, 0, 0, 0, 0, 0 }, /* PD20 */
- /* PD19 */ { 0, 0, 0, 0, 0, 0 }, /* PD19 */
- /* PD18 */ { 0, 0, 0, 0, 0, 0 }, /* PD18 */
- /* PD17 */ { 0, 0, 0, 0, 0, 0 }, /* PD17 */
- /* PD16 */ { 0, 0, 0, 0, 0, 0 }, /* PD16 */
- /* PD15 */ { 0, 0, 0, 0, 0, 0 }, /* PD15 */
- /* PD14 */ { 0, 0, 0, 0, 0, 0 }, /* PD14 */
- /* PD13 */ { 0, 0, 0, 0, 0, 0 }, /* PD13 */
- /* PD12 */ { 0, 0, 0, 0, 0, 0 }, /* PD12 */
- /* PD11 */ { 0, 0, 0, 0, 0, 0 }, /* PD11 */
- /* PD10 */ { 0, 0, 0, 0, 0, 0 }, /* PD10 */
- /* PD9 */ { 0, 0, 0, 0, 0, 0 }, /* PD9 */
- /* PD8 */ { 0, 0, 0, 0, 0, 0 }, /* PD8 */
- /* PD7 */ { 0, 0, 0, 0, 0, 0 }, /* PD7 */
- /* PD6 */ { 0, 0, 0, 0, 0, 0 }, /* PD6 */
- /* PD5 */ { 0, 0, 0, 0, 0, 0 }, /* PD5 */
- /* PD4 */ { 0, 0, 0, 0, 0, 0 }, /* PD4 */
- /* PD3 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */
- /* PD2 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */
- /* PD1 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */
- /* PD0 */ { 0, 0, 0, 0, 0, 0 } /* non-existent */
- }
-};
-
-long int initdram(int board_type)
-{
- long int msize = CFG_SDRAM_SIZE;
-
-#ifndef CFG_RAMBOOT
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile memctl8260_t *memctl = &immap->im_memctl;
- vu_char *ramaddr = (vu_char *)CFG_SDRAM_BASE;
- uchar c = 0xFF;
- uint psdmr = CFG_PSDMR;
- int i;
-
- immap->im_siu_conf.sc_ppc_acr = 0x02;
- immap->im_siu_conf.sc_ppc_alrh = 0x30126745;
- immap->im_siu_conf.sc_tescr1 = 0x00004000;
-
- memctl->memc_mptpr = CFG_MPTPR;
-
- /* Initialise 60x bus SDRAM */
- memctl->memc_psrt = CFG_PSRT;
- memctl->memc_or1 = CFG_SDRAM_OR;
- memctl->memc_br1 = CFG_SDRAM_BR;
- memctl->memc_psdmr = psdmr | PSDMR_OP_PREA; /* Precharge all banks */
- *ramaddr = c;
- memctl->memc_psdmr = psdmr | PSDMR_OP_CBRR; /* CBR refresh */
- for (i = 0; i < 8; i++)
- *ramaddr = c;
- memctl->memc_psdmr = psdmr | PSDMR_OP_MRW; /* Mode Register write */
- *ramaddr = c;
- memctl->memc_psdmr = psdmr | PSDMR_RFEN; /* Refresh enable */
- *ramaddr = c;
-#endif /* !CFG_RAMBOOT */
-
- /* Return total 60x bus SDRAM size */
- return msize * 1024 * 1024;
-}
-
-int checkboard(void)
-{
- vu_char *bcsr = (vu_char *)CFG_BCSR;
-
- printf("Board: Rattler Rev. %c\n", bcsr[0x20] + 0x40);
- return 0;
-}
diff --git a/board/rattler/u-boot.lds b/board/rattler/u-boot.lds
deleted file mode 100644
index 522e6daa53..0000000000
--- a/board/rattler/u-boot.lds
+++ /dev/null
@@ -1,125 +0,0 @@
-/*
- * (C) Copyright 2001-2005
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * Modified by Yuli Barcohen <yuli@arabellasw.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc8260/start.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
-ENTRY(_start)
diff --git a/board/rbc823/Makefile b/board/rbc823/Makefile
deleted file mode 100644
index 0121ddc79c..0000000000
--- a/board/rbc823/Makefile
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o kbd.o
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/rbc823/config.mk b/board/rbc823/config.mk
deleted file mode 100644
index 199ea3c1f0..0000000000
--- a/board/rbc823/config.mk
+++ /dev/null
@@ -1,28 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# RBC823 boards
-#
-
-TEXT_BASE = 0xFFF00000
diff --git a/board/rbc823/flash.c b/board/rbc823/flash.c
deleted file mode 100644
index 84ae5c1b5d..0000000000
--- a/board/rbc823/flash.c
+++ /dev/null
@@ -1,469 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (vu_long *addr, flash_info_t *info);
-static int write_word (flash_info_t *info, ulong dest, ulong data);
-static void flash_get_offsets (ulong base, flash_info_t *info);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- unsigned long size_b0, size_b1;
- int i;
-
- /* Init: no FLASHes known */
- for (i=0; i < CFG_MAX_FLASH_BANKS; ++i)
- flash_info[i].flash_id = FLASH_UNKNOWN;
-
- /* Detect size */
- size_b0 = flash_get_size((vu_long *)CFG_FLASH_BASE, &flash_info[0]);
-
- /* Setup offsets */
- flash_get_offsets (CFG_FLASH_BASE, &flash_info[0]);
-
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
- /* Monitor protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+monitor_flash_len-1,
- &flash_info[0]);
-#endif
-
- size_b1 = 0 ;
-
- flash_info[1].flash_id = FLASH_UNKNOWN;
- flash_info[1].sector_count = -1;
-
- flash_info[0].size = size_b0;
- flash_info[1].size = size_b1;
-
- return (size_b0 + size_b1);
-}
-
-/*-----------------------------------------------------------------------
- * Fix this to support variable sector sizes
-*/
-static void flash_get_offsets (ulong base, flash_info_t *info)
-{
- int i;
-
- /* set up sector start address table */
- if ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM040) {
- /* set sector offsets for bottom boot block type */
- for (i = 0; i < info->sector_count; i++)
- info->start[i] = base + (i * 0x00010000);
- }
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN)
- {
- puts ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK)
- {
- case FLASH_MAN_AMD: printf ("AMD "); break;
- case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
- case FLASH_MAN_BM: printf ("BRIGHT MICRO "); break;
- default: printf ("Unknown Vendor "); break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK)
- {
- case FLASH_AM040: printf ("29F040 or 29LV040 (4 Mbit, uniform sectors)\n");
- break;
- case FLASH_AM400B: printf ("AM29LV400B (4 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM400T: printf ("AM29LV400T (4 Mbit, top boot sector)\n");
- break;
- case FLASH_AM800B: printf ("AM29LV800B (8 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM800T: printf ("AM29LV800T (8 Mbit, top boot sector)\n");
- break;
- case FLASH_AM160B: printf ("AM29LV160B (16 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM160T: printf ("AM29LV160T (16 Mbit, top boot sector)\n");
- break;
- case FLASH_AM320B: printf ("AM29LV320B (32 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM320T: printf ("AM29LV320T (32 Mbit, top boot sector)\n");
- break;
- default: printf ("Unknown Chip Type\n");
- break;
- }
-
- if (info->size >> 20) {
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20,
- info->sector_count);
- } else {
- printf (" Size: %ld KB in %d Sectors\n",
- info->size >> 10,
- info->sector_count);
- }
-
- puts (" Sector Start Addresses:");
-
- for (i=0; i<info->sector_count; ++i)
- {
- if ((i % 5) == 0)
- {
- puts ("\n ");
- }
-
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " ");
- }
-
- putc ('\n');
- return;
-}
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-
-static ulong flash_get_size (vu_long *addr, flash_info_t *info)
-{
- short i;
- volatile unsigned char *caddr;
- char value;
-
- caddr = (volatile unsigned char *)addr ;
-
- /* Write auto select command: read Manufacturer ID */
-
-#if 0
- printf("Base address is: %08x\n", caddr);
-#endif
-
- caddr[0x0555] = 0xAA;
- caddr[0x02AA] = 0x55;
- caddr[0x0555] = 0x90;
-
- value = caddr[0];
-
-#if 0
- printf("Manufact ID: %02x\n", value);
-#endif
- switch (value)
- {
- case 0x01: /*AMD_MANUFACT*/
- info->flash_id = FLASH_MAN_AMD;
- break;
-
- case 0x04: /*FUJ_MANUFACT*/
- info->flash_id = FLASH_MAN_FUJ;
- break;
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- break;
- }
-
- value = caddr[1]; /* device ID */
-#if 0
- printf("Device ID: %02x\n", value);
-#endif
- switch (value)
- {
- case AMD_ID_LV040B:
- info->flash_id += FLASH_AM040;
- info->sector_count = 8;
- info->size = 0x00080000;
- break; /* => 512Kb */
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- return (0); /* => no or unknown flash */
-
- }
-
- flash_get_offsets ((ulong)addr, &flash_info[0]);
-
- /* check for protected sectors */
- for (i = 0; i < info->sector_count; i++)
- {
- /* read sector protection at sector address, (A7 .. A0) = 0x02 */
- /* D0 = 1 if protected */
- caddr = (volatile unsigned char *)(info->start[i]);
- info->protect[i] = caddr[2] & 1;
- }
-
- /*
- * Prevent writes to uninitialized FLASH.
- */
- if (info->flash_id != FLASH_UNKNOWN)
- {
- caddr = (volatile unsigned char *)info->start[0];
- *caddr = 0xF0; /* reset bank */
- }
-
- return (info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- volatile unsigned char *addr = (volatile unsigned char *)(info->start[0]);
- int flag, prot, sect, l_sect;
- ulong start, now, last;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- if ((info->flash_id == FLASH_UNKNOWN) ||
- (info->flash_id > FLASH_AMD_COMP)) {
- printf ("Can't erase unknown flash type - aborted\n");
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- l_sect = -1;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[0x0555] = 0xAA;
- addr[0x02AA] = 0x55;
- addr[0x0555] = 0x80;
- addr[0x0555] = 0xAA;
- addr[0x02AA] = 0x55;
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr = (volatile unsigned char *)(info->start[sect]);
- addr[0] = 0x30;
- l_sect = sect;
- }
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- /*
- * We wait for the last triggered sector
- */
- if (l_sect < 0)
- goto DONE;
-
- start = get_timer (0);
- last = start;
- addr = (volatile unsigned char *)(info->start[l_sect]);
-
- while ((addr[0] & 0xFF) != 0xFF)
- {
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- return 1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- }
-
-DONE:
- /* reset to read mode */
- addr = (volatile unsigned char *)info->start[0];
-
- addr[0] = 0xF0; /* reset bank */
-
- printf (" done\n");
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int i, l, rc;
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
- for (; i<4 && cnt>0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = 0;
- for (i=0; i<4; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- return (write_word(info, wp, data));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word (flash_info_t *info, ulong dest, ulong data)
-{
- volatile unsigned char *addr = (volatile unsigned char*)(info->start[0]),
- *cdest,*cdata;
- ulong start;
- int flag, count = 4 ;
-
- cdest = (volatile unsigned char *)dest ;
- cdata = (volatile unsigned char *)&data ;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*((vu_long *)dest) & data) != data) {
- return (2);
- }
-
- while(count--)
- {
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[0x0555] = 0xAA;
- addr[0x02AA] = 0x55;
- addr[0x0555] = 0xA0;
-
- *cdest = *cdata;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* data polling for D7 */
- start = get_timer (0);
- while ((*cdest ^ *cdata) & 0x80)
- {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- return (1);
- }
- }
-
- cdata++ ;
- cdest++ ;
- }
- return (0);
-}
-
-/*-----------------------------------------------------------------------
- */
diff --git a/board/rbc823/kbd.c b/board/rbc823/kbd.c
deleted file mode 100644
index c27929dcd3..0000000000
--- a/board/rbc823/kbd.c
+++ /dev/null
@@ -1,269 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/* Modified by Udi Finkelstein
- *
- * This file includes communication routines for SMC1 that can run even if
- * SMC2 have already been initialized.
- */
-
-#include <common.h>
-#include <watchdog.h>
-#include <commproc.h>
-#include <devices.h>
-#include <lcd.h>
-
-#define SMC_INDEX 0
-#define PROFF_SMC PROFF_SMC1
-#define CPM_CR_CH_SMC CPM_CR_CH_SMC1
-
-#define RBC823_KBD_BAUDRATE 38400
-#define CPM_KEYBOARD_BASE 0x1000
-/*
- * Minimal serial functions needed to use one of the SMC ports
- * as serial console interface.
- */
-
-void smc1_setbrg (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- volatile immap_t *im = (immap_t *)CFG_IMMR;
- volatile cpm8xx_t *cp = &(im->im_cpm);
-
- /* Set up the baud rate generator.
- * See 8xx_io/commproc.c for details.
- *
- * Wire BRG2 to SMC1, BRG1 to SMC2
- */
-
- cp->cp_simode = 0x00001000;
-
- cp->cp_brgc2 =
- (((gd->cpu_clk / 16 / RBC823_KBD_BAUDRATE)-1) << 1) | CPM_BRG_EN;
-}
-
-int smc1_init (void)
-{
- volatile immap_t *im = (immap_t *)CFG_IMMR;
- volatile smc_t *sp;
- volatile smc_uart_t *up;
- volatile cbd_t *tbdf, *rbdf;
- volatile cpm8xx_t *cp = &(im->im_cpm);
- uint dpaddr;
-
- /* initialize pointers to SMC */
-
- sp = (smc_t *) &(cp->cp_smc[SMC_INDEX]);
- up = (smc_uart_t *) &cp->cp_dparam[PROFF_SMC];
-
- /* Disable transmitter/receiver.
- */
- sp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
-
- /* Enable SDMA.
- */
- im->im_siu_conf.sc_sdcr = 1;
-
- /* clear error conditions */
-#ifdef CFG_SDSR
- im->im_sdma.sdma_sdsr = CFG_SDSR;
-#else
- im->im_sdma.sdma_sdsr = 0x83;
-#endif
-
- /* clear SDMA interrupt mask */
-#ifdef CFG_SDMR
- im->im_sdma.sdma_sdmr = CFG_SDMR;
-#else
- im->im_sdma.sdma_sdmr = 0x00;
-#endif
-
- /* Use Port B for SMC1 instead of other functions.
- */
- cp->cp_pbpar |= 0x000000c0;
- cp->cp_pbdir &= ~0x000000c0;
- cp->cp_pbodr &= ~0x000000c0;
-
- /* Set the physical address of the host memory buffers in
- * the buffer descriptors.
- */
-
-#ifdef CFG_ALLOC_DPRAM
- dpaddr = dpram_alloc_align (sizeof(cbd_t)*2 + 2, 8) ;
-#else
- dpaddr = CPM_KEYBOARD_BASE ;
-#endif
-
- /* Allocate space for two buffer descriptors in the DP ram.
- * For now, this address seems OK, but it may have to
- * change with newer versions of the firmware.
- * damm: allocating space after the two buffers for rx/tx data
- */
-
- rbdf = (cbd_t *)&cp->cp_dpmem[dpaddr];
- rbdf->cbd_bufaddr = (uint) (rbdf+2);
- rbdf->cbd_sc = 0;
- tbdf = rbdf + 1;
- tbdf->cbd_bufaddr = ((uint) (rbdf+2)) + 1;
- tbdf->cbd_sc = 0;
-
- /* Set up the uart parameters in the parameter ram.
- */
- up->smc_rbase = dpaddr;
- up->smc_tbase = dpaddr+sizeof(cbd_t);
- up->smc_rfcr = SMC_EB;
- up->smc_tfcr = SMC_EB;
-
- /* Set UART mode, 8 bit, no parity, one stop.
- * Enable receive and transmit.
- */
- sp->smc_smcmr = smcr_mk_clen(9) | SMCMR_SM_UART;
-
- /* Mask all interrupts and remove anything pending.
- */
- sp->smc_smcm = 0;
- sp->smc_smce = 0xff;
-
- /* Set up the baud rate generator.
- */
- smc1_setbrg ();
-
- /* Make the first buffer the only buffer.
- */
- tbdf->cbd_sc |= BD_SC_WRAP;
- rbdf->cbd_sc |= BD_SC_EMPTY | BD_SC_WRAP;
-
- /* Single character receive.
- */
- up->smc_mrblr = 1;
- up->smc_maxidl = 0;
-
- /* Initialize Tx/Rx parameters.
- */
-
- while (cp->cp_cpcr & CPM_CR_FLG) /* wait if cp is busy */
- ;
-
- cp->cp_cpcr = mk_cr_cmd(CPM_CR_CH_SMC, CPM_CR_INIT_TRX) | CPM_CR_FLG;
-
- while (cp->cp_cpcr & CPM_CR_FLG) /* wait if cp is busy */
- ;
-
- /* Enable transmitter/receiver.
- */
- sp->smc_smcmr |= SMCMR_REN | SMCMR_TEN;
-
- return (0);
-}
-
-void smc1_putc(const char c)
-{
- volatile cbd_t *tbdf;
- volatile char *buf;
- volatile smc_uart_t *up;
- volatile immap_t *im = (immap_t *)CFG_IMMR;
- volatile cpm8xx_t *cpmp = &(im->im_cpm);
-
- up = (smc_uart_t *)&cpmp->cp_dparam[PROFF_SMC];
-
- tbdf = (cbd_t *)&cpmp->cp_dpmem[up->smc_tbase];
-
- /* Wait for last character to go.
- */
-
- buf = (char *)tbdf->cbd_bufaddr;
-
- *buf = c;
- tbdf->cbd_datlen = 1;
- tbdf->cbd_sc |= BD_SC_READY;
- __asm__("eieio");
-
- while (tbdf->cbd_sc & BD_SC_READY) {
- WATCHDOG_RESET ();
- __asm__("eieio");
- }
-}
-
-int smc1_getc(void)
-{
- volatile cbd_t *rbdf;
- volatile unsigned char *buf;
- volatile smc_uart_t *up;
- volatile immap_t *im = (immap_t *)CFG_IMMR;
- volatile cpm8xx_t *cpmp = &(im->im_cpm);
- unsigned char c;
-
- up = (smc_uart_t *)&cpmp->cp_dparam[PROFF_SMC];
-
- rbdf = (cbd_t *)&cpmp->cp_dpmem[up->smc_rbase];
-
- /* Wait for character to show up.
- */
- buf = (unsigned char *)rbdf->cbd_bufaddr;
-
- while (rbdf->cbd_sc & BD_SC_EMPTY)
- WATCHDOG_RESET ();
-
- c = *buf;
- rbdf->cbd_sc |= BD_SC_EMPTY;
-
- return(c);
-}
-
-int smc1_tstc(void)
-{
- volatile cbd_t *rbdf;
- volatile smc_uart_t *up;
- volatile immap_t *im = (immap_t *)CFG_IMMR;
- volatile cpm8xx_t *cpmp = &(im->im_cpm);
-
- up = (smc_uart_t *)&cpmp->cp_dparam[PROFF_SMC];
-
- rbdf = (cbd_t *)&cpmp->cp_dpmem[up->smc_rbase];
-
- return(!(rbdf->cbd_sc & BD_SC_EMPTY));
-}
-
-/* search for keyboard and register it if found */
-int drv_keyboard_init(void)
-{
- int error = 0;
- device_t kbd_dev;
-
- if (0) {
- /* register the keyboard */
- memset (&kbd_dev, 0, sizeof(device_t));
- strcpy(kbd_dev.name, "kbd");
- kbd_dev.flags = DEV_FLAGS_INPUT | DEV_FLAGS_SYSTEM;
- kbd_dev.putc = NULL;
- kbd_dev.puts = NULL;
- kbd_dev.getc = smc1_getc;
- kbd_dev.tstc = smc1_tstc;
- error = device_register (&kbd_dev);
- } else {
- lcd_is_enabled = 0;
- lcd_disable();
- }
- return error;
-}
diff --git a/board/rbc823/rbc823.c b/board/rbc823/rbc823.c
deleted file mode 100644
index 9e60c2b646..0000000000
--- a/board/rbc823/rbc823.c
+++ /dev/null
@@ -1,269 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include "mpc8xx.h"
-#include <linux/mtd/doc2000.h>
-
-extern int kbd_init(void);
-extern int drv_kbd_init(void);
-
-/* ------------------------------------------------------------------------- */
-
-static long int dram_size (long int, long int *, long int);
-
-/* ------------------------------------------------------------------------- */
-
-#define _NOT_USED_ 0xFFFFFFFF
-
-const uint sdram_table[] =
-{
- /*
- * Single Read. (Offset 0 in UPMA RAM)
- */
- 0x1F07FC04, 0xEEAEFC04, 0x11ADFC04, 0xEFBBBC00,
- 0x1FF77C47, /* last */
- /*
- * SDRAM Initialization (offset 5 in UPMA RAM)
- *
- * This is no UPM entry point. The following definition uses
- * the remaining space to establish an initialization
- * sequence, which is executed by a RUN command.
- *
- */
- 0x1FF77C34, 0xEFEABC34, 0x1FB57C35, /* last */
- /*
- * Burst Read. (Offset 8 in UPMA RAM)
- */
- 0x1F07FC04, 0xEEAEFC04, 0x10ADFC04, 0xF0AFFC00,
- 0xF0AFFC00, 0xF1AFFC00, 0xEFBBBC00, 0x1FF77C47, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Single Write. (Offset 18 in UPMA RAM)
- */
- 0x1F27FC04, 0xEEAEBC00, 0x01B93C04, 0x1FF77C47, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Burst Write. (Offset 20 in UPMA RAM)
- */
- 0x1F07FC04, 0xEEAEBC00, 0x10AD7C00, 0xF0AFFC00,
- 0xF0AFFC00, 0xE1BBBC04, 0x1FF77C47, /* last */
- _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Refresh (Offset 30 in UPMA RAM)
- */
- 0x1FF5FC84, 0xFFFFFC04, 0xFFFFFC04, 0xFFFFFC04,
- 0xFFFFFC84, 0xFFFFFC07, /* last */
- _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Exception. (Offset 3c in UPMA RAM)
- */
- 0x1FF7FC07, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_,
-};
-
-const uint static_table[] =
-{
- /*
- * Single Read. (Offset 0 in UPMA RAM)
- */
- 0x0FFFFC04, 0x0FF3FC04, 0x0FF3CC04, 0x0FF3CC04,
- 0x0FF3EC04, 0x0FF3CC00, 0x0FF7FC04, 0x3FFFFC04,
- 0xFFFFFC04, 0xFFFFFC05, /* last */
- _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Single Write. (Offset 18 in UPMA RAM)
- */
- 0x0FFFFC04, 0x00FFFC04, 0x00FFFC04, 0x00FFFC04,
- 0x01FFFC00, 0x3FFFFC04, 0xFFFFFC04, 0xFFFFFC05, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-};
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Check Board Identity:
- *
- * Test TQ ID string (TQM8xx...)
- * If present, check for "L" type (no second DRAM bank),
- * otherwise "L" type is assumed as default.
- *
- * Return 1 for "L" type, 0 else.
- */
-
-int checkboard (void)
-{
- char *s = getenv ("serial#");
-
- if (!s || strncmp (s, "TQM8", 4)) {
- printf ("### No HW ID - assuming RBC823\n");
- return (0);
- }
-
- puts (s);
- putc ('\n');
-
- return (0);
-}
-
-/* ------------------------------------------------------------------------- */
-
-long int initdram (int board_type)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- long int size_b0, size8, size9;
-
- upmconfig (UPMA, (uint *) sdram_table,
- sizeof (sdram_table) / sizeof (uint));
-
- /*
- * 1 Bank of 64Mbit x 2 devices
- */
- memctl->memc_mptpr = CFG_MPTPR_1BK_4K;
- memctl->memc_mar = 0x00000088;
-
- /*
- * Map controller SDRAM bank 0
- */
- memctl->memc_or4 = CFG_OR4_PRELIM;
- memctl->memc_br4 = CFG_BR4_PRELIM;
- memctl->memc_mamr = CFG_MAMR_8COL & (~(MAMR_PTAE)); /* no refresh yet */
- udelay (200);
-
- /*
- * Perform SDRAM initializsation sequence
- */
- memctl->memc_mcr = 0x80008105; /* SDRAM bank 0 */
- udelay (1);
- memctl->memc_mamr = (CFG_MAMR_8COL & ~(MAMR_TLFA_MSK)) | MAMR_TLFA_8X;
- udelay (200);
- memctl->memc_mcr = 0x80008130; /* SDRAM bank 0 - execute twice */
- udelay (1);
- memctl->memc_mamr = (CFG_MAMR_8COL & ~(MAMR_TLFA_MSK)) | MAMR_TLFA_4X;
- udelay (200);
-
- memctl->memc_mamr |= MAMR_PTAE; /* enable refresh */
- udelay (1000);
-
- /*
- * Preliminary prescaler for refresh (depends on number of
- * banks): This value is selected for four cycles every 62.4 us
- * with two SDRAM banks or four cycles every 31.2 us with one
- * bank. It will be adjusted after memory sizing.
- */
- memctl->memc_mptpr = CFG_MPTPR_2BK_4K; /* 16: but should be: CFG_MPTPR_1BK_4K */
-
- /*
- * Check Bank 0 Memory Size for re-configuration
- *
- * try 8 column mode
- */
- size8 = dram_size (CFG_MAMR_8COL, (long *) SDRAM_BASE4_PRELIM,
- SDRAM_MAX_SIZE);
- udelay (1000);
-
- /*
- * try 9 column mode
- */
- size9 = dram_size (CFG_MAMR_9COL, (long *) SDRAM_BASE4_PRELIM,
- SDRAM_MAX_SIZE);
-
- if (size8 < size9) { /* leave configuration at 9 columns */
- size_b0 = size9;
-/* debug ("SDRAM Bank 0 in 9 column mode: %ld MB\n", size >> 20); */
- } else { /* back to 8 columns */
- size_b0 = size8;
- memctl->memc_mamr = CFG_MAMR_8COL;
- udelay (500);
-/* debug ("SDRAM Bank 0 in 8 column mode: %ld MB\n", size >> 20); */
- }
-
- udelay (1000);
-
- /*
- * Adjust refresh rate depending on SDRAM type, both banks
- * For types > 128 MBit leave it at the current (fast) rate
- */
- if ((size_b0 < 0x02000000)) {
- /* reduce to 15.6 us (62.4 us / quad) */
- memctl->memc_mptpr = CFG_MPTPR_2BK_4K;
- udelay (1000);
- }
-
- /* SDRAM Bank 0 is bigger - map first */
-
- memctl->memc_or4 = ((-size_b0) & 0xFFFF0000) | CFG_OR_TIMING_SDRAM;
- memctl->memc_br4 = (CFG_SDRAM_BASE & BR_BA_MSK) | BR_MS_UPMA | BR_V;
-
- udelay (10000);
-
- return (size_b0);
-}
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Check memory range for valid RAM. A simple memory test determines
- * the actually available RAM size between addresses `base' and
- * `base + maxsize'. Some (not all) hardware errors are detected:
- * - short between address lines
- * - short between data lines
- */
-
-static long int dram_size (long int mamr_value, long int *base,
- long int maxsize)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
-
- memctl->memc_mamr = mamr_value;
-
- return (get_ram_size (base, maxsize));
-}
-
-void doc_init (void)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
-
- upmconfig (UPMB, (uint *) static_table,
- sizeof (static_table) / sizeof (uint));
- memctl->memc_mbmr = MAMR_DSA_1_CYCL;
-
- doc_probe (FLASH_BASE1_PRELIM);
-}
diff --git a/board/rbc823/u-boot.lds b/board/rbc823/u-boot.lds
deleted file mode 100644
index 68ca85644e..0000000000
--- a/board/rbc823/u-boot.lds
+++ /dev/null
@@ -1,140 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc8xx/start.o (.text)
- common/dlmalloc.o (.text)
- lib_ppc/ppcstring.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
- lib_generic/zlib.o (.text)
-
- . = env_offset;
- common/environment.o(.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/rmu/Makefile b/board/rmu/Makefile
deleted file mode 100644
index 13ce9fc9d2..0000000000
--- a/board/rmu/Makefile
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/rmu/config.mk b/board/rmu/config.mk
deleted file mode 100644
index 7cb374eb85..0000000000
--- a/board/rmu/config.mk
+++ /dev/null
@@ -1,28 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# RMU boards
-#
-
-TEXT_BASE = 0xfff00000
diff --git a/board/rmu/flash.c b/board/rmu/flash.c
deleted file mode 100644
index 0f2c327a1c..0000000000
--- a/board/rmu/flash.c
+++ /dev/null
@@ -1,540 +0,0 @@
-/*
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/* #define DEBUG */
-
-#include <common.h>
-#include <mpc8xx.h>
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (vu_long *addr, flash_info_t *info);
-static int write_word (flash_info_t *info, ulong dest, ulong data);
-static void flash_get_offsets (ulong base, flash_info_t *info);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- unsigned long size_b0 ;
- int i;
-
- /* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* Static FLASH Bank configuration here - FIXME XXX */
-
- debug ("\n## Get flash bank size @ 0x%08x\n", FLASH_BASE_PRELIM);
-
- size_b0 = flash_get_size((vu_long *)FLASH_BASE_PRELIM, &flash_info[0]);
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size_b0, size_b0<<20);
- }
-
- debug ("## Before remap: BR0: 0x%08x OR0: 0x%08x\n",
- memctl->memc_br0, memctl->memc_or0);
-
- /* Remap FLASH according to real size */
- memctl->memc_or0 = CFG_OR_TIMING_FLASH | (-size_b0 & 0xFFFF8000);
- memctl->memc_br0 = (CFG_FLASH_BASE & BR_BA_MSK) | BR_MS_GPCM | BR_V;
-
- debug ("## BR0: 0x%08x OR0: 0x%08x\n",
- memctl->memc_br0, memctl->memc_or0);
-
- /* Re-do sizing to get full correct info */
-
- size_b0 = flash_get_size((vu_long *)CFG_FLASH_BASE, &flash_info[0]);
- flash_get_offsets (CFG_FLASH_BASE, &flash_info[0]);
-
- /* monitor protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+monitor_flash_len-1,
- &flash_info[0]);
-
-#ifdef CFG_ENV_IS_IN_FLASH
- /* ENV protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR+CFG_ENV_SIZE-1,
- &flash_info[0]);
-#endif
-
-#if defined(CFG_ENV_ADDR_REDUND) || defined(CFG_ENV_OFFSET_REDUND)
- debug ("Protect redundand environment: %08lx ... %08lx\n",
- (ulong)CFG_ENV_ADDR_REDUND,
- (ulong)CFG_ENV_ADDR_REDUND + CFG_ENV_SIZE - 1);
-
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR_REDUND,
- CFG_ENV_ADDR_REDUND + CFG_ENV_SIZE_REDUND - 1,
- &flash_info[0]);
-#endif
-
- flash_info[0].size = size_b0;
-
- debug ("## Final Flash bank size: %08lx\n", size_b0);
-
- return (size_b0);
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_get_offsets (ulong base, flash_info_t *info)
-{
- int i;
-
- /* set up sector start address table */
- if (info->flash_id & FLASH_BTYPE) {
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00010000;
- info->start[2] = base + 0x00018000;
- info->start[3] = base + 0x00020000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] = base + ((i-3) * 0x00040000) ;
- }
- } else {
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- info->start[i--] = base + info->size - 0x00010000;
- info->start[i--] = base + info->size - 0x00018000;
- info->start[i--] = base + info->size - 0x00020000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00040000;
- }
- }
-
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD: printf ("AMD "); break;
- case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
- default: printf ("Unknown Vendor "); break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM400B: printf ("AM29LV400B (4 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM400T: printf ("AM29LV400T (4 Mbit, top boot sector)\n");
- break;
- case FLASH_AM800B: printf ("AM29LV800B (8 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM800T: printf ("AM29LV800T (8 Mbit, top boot sector)\n");
- break;
- case FLASH_AM160B: printf ("AM29LV160B (16 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM160T: printf ("AM29LV160T (16 Mbit, top boot sector)\n");
- break;
- case FLASH_AM320B: printf ("AM29LV320B (32 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM320T: printf ("AM29LV320T (32 Mbit, top boot sector)\n");
- break;
- default: printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " "
- );
- }
- printf ("\n");
- return;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-
-static ulong flash_get_size (vu_long *addr, flash_info_t *info)
-{
- short i;
- ulong value;
- ulong base = (ulong)addr;
-
- /* Write auto select command: read Manufacturer ID */
- addr[0xAAA] = 0xAAAAAAAA ;
- addr[0x555] = 0x55555555 ;
- addr[0xAAA] = 0x90909090 ;
-
- value = addr[0] ;
-
- debug ("Manuf. ID @ 0x%08lx: 0x%08lx\n", (ulong)addr, value);
-
- switch (value & 0x00FF00FF) {
- case AMD_MANUFACT:
- info->flash_id = FLASH_MAN_AMD;
- break;
- case FUJ_MANUFACT:
- info->flash_id = FLASH_MAN_FUJ;
- break;
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- return (0); /* no or unknown flash */
- }
-
- value = addr[2] ; /* device ID */
-
- debug ("Device ID @ 0x%08lx: 0x%08lx\n", (ulong)(&addr[1]), value);
-
- switch (value & 0x00FF00FF) {
- case (AMD_ID_LV400T & 0x00FF00FF):
- info->flash_id += FLASH_AM400T;
- info->sector_count = 11;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case (AMD_ID_LV400B & 0x00FF00FF):
- info->flash_id += FLASH_AM400B;
- info->sector_count = 11;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case (AMD_ID_LV800T & 0x00FF00FF):
- info->flash_id += FLASH_AM800T;
- info->sector_count = 19;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case (AMD_ID_LV800B & 0x00FF00FF):
- info->flash_id += FLASH_AM800B;
- info->sector_count = 19;
- info->size = 0x00400000; /*%%% Size doubled by yooth */
- break; /* => 4 MB */
-
- case (AMD_ID_LV160T & 0x00FF00FF):
- info->flash_id += FLASH_AM160T;
- info->sector_count = 35;
- info->size = 0x00400000;
- break; /* => 4 MB */
-
- case (AMD_ID_LV160B & 0x00FF00FF):
- info->flash_id += FLASH_AM160B;
- info->sector_count = 35;
- info->size = 0x00800000;
- break; /* => 8 MB */
- case (AMD_ID_LV320T & 0x00FF00FF):
- info->flash_id += FLASH_AM320T;
- info->sector_count = 67;
- info->size = 0x00800000;
- break; /* => 8 MB */
-
- case (AMD_ID_LV320B & 0x00FF00FF):
- info->flash_id += FLASH_AM320B;
- info->sector_count = 67;
- info->size = 0x01000000;
- break; /* => 16 MB */
- default:
- info->flash_id = FLASH_UNKNOWN;
- return (0); /* => no or unknown flash */
-
- }
- /* set up sector start address table */
- if (info->flash_id & FLASH_BTYPE) {
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00010000;
- info->start[2] = base + 0x00018000;
- info->start[3] = base + 0x00020000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] = base + ((i-3) * 0x00040000) ;
- }
- } else {
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- info->start[i--] = base + info->size - 0x00010000;
- info->start[i--] = base + info->size - 0x00018000;
- info->start[i--] = base + info->size - 0x00020000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00040000;
- }
- }
-
- /* check for protected sectors */
- for (i = 0; i < info->sector_count; i++) {
- /* read sector protection at sector address, (A7 .. A0) = 0x02 */
- /* D0 = 1 if protected */
- addr = (volatile unsigned long *)(info->start[i]);
- info->protect[i] = addr[4] & 1 ;
- }
-
- /*
- * Prevent writes to uninitialized FLASH.
- */
- if (info->flash_id != FLASH_UNKNOWN) {
- addr = (volatile unsigned long *)info->start[0];
-
- *addr = 0xF0F0F0F0; /* reset bank */
- }
-
- return (info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- vu_long *addr = (vu_long*)(info->start[0]);
- int flag, prot, sect, l_sect;
- ulong start, now, last;
-
- debug ("flash_erase: first: %d last: %d\n", s_first, s_last);
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- if ((info->flash_id == FLASH_UNKNOWN) ||
- (info->flash_id > FLASH_AMD_COMP)) {
- printf ("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- l_sect = -1;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[0xAAA] = 0xAAAAAAAA;
- addr[0x555] = 0x55555555;
- addr[0xAAA] = 0x80808080;
- addr[0xAAA] = 0xAAAAAAAA;
- addr[0x555] = 0x55555555;
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr = (vu_long *)(info->start[sect]) ;
- addr[0] = 0x30303030 ;
- l_sect = sect;
- }
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- /*
- * We wait for the last triggered sector
- */
- if (l_sect < 0)
- goto DONE;
-
- start = get_timer (0);
- last = start;
- addr = (vu_long *)(info->start[l_sect]);
- while ((addr[0] & 0x80808080) != 0x80808080) {
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- return 1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- }
-
-DONE:
- /* reset to read mode */
- addr = (vu_long *)info->start[0];
- addr[0] = 0xF0F0F0F0; /* reset bank */
-
- printf (" done\n");
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int i, l, rc;
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
- for (; i<4 && cnt>0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = 0;
- for (i=0; i<4; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- return (write_word(info, wp, data));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word (flash_info_t *info, ulong dest, ulong data)
-{
- vu_long *addr = (vu_long *)(info->start[0]);
- ulong start;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*((vu_long *)dest) & data) != data) {
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[0xAAA] = 0xAAAAAAAA;
- addr[0x555] = 0x55555555;
- addr[0xAAA] = 0xA0A0A0A0;
-
- *((vu_long *)dest) = data;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* data polling for D7 */
- start = get_timer (0);
- while ((*((vu_long *)dest) & 0x80808080) != (data & 0x80808080)) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- return (1);
- }
- }
- return (0);
-}
-
-/*-----------------------------------------------------------------------
- */
diff --git a/board/rmu/rmu.c b/board/rmu/rmu.c
deleted file mode 100644
index 8cb03c7f84..0000000000
--- a/board/rmu/rmu.c
+++ /dev/null
@@ -1,162 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-
-#include <common.h>
-#include <mpc8xx.h>
-
-/* ------------------------------------------------------------------------- */
-
-static long int dram_size (long int, long int *, long int);
-
-/* ------------------------------------------------------------------------- */
-
-#define _NOT_USED_ 0xFFFFCC25
-
-const uint sdram_table[] =
-{
- /*
- * Single Read. (Offset 00h in UPMA RAM)
- */
- 0x0F03CC04, 0x00ACCC24, 0x1FF74C20, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /*
- * Burst Read. (Offset 08h in UPMA RAM)
- */
- 0x0F03CC04, 0x00ACCC24, 0x00FFCC20, 0x00FFCC20,
- 0x01FFCC20, 0x1FF74C20, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /*
- * Single Write. (Offset 18h in UPMA RAM)
- */
- 0x0F03CC02, 0x00AC0C24, 0x1FF74C25, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /*
- * Burst Write. (Offset 20h in UPMA RAM)
- */
- 0x0F03CC00, 0x00AC0C20, 0x00FFFC20, 0x00FFFC22,
- 0x01FFFC24, 0x1FF74C25, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /*
- * Refresh. (Offset 30h in UPMA RAM)
- * (Initialization code at 0x36)
- */
- 0x0FF0CC24, 0xFFFFCC24, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, 0xEFFB8C34, 0x0FF74C34,
- 0x0FFACCB4, 0x0FF5CC34, 0x0FFFCC34, 0x0FFFCCB4,
-
- /*
- * Exception. (Offset 3Ch in UPMA RAM)
- */
- 0x0FEA8C34, 0x1FB54C34, 0xFFFFCC34, _NOT_USED_
-};
-
-/* ------------------------------------------------------------------------- */
-
-
-/*
- * Check Board Identity:
- */
-
-int checkboard (void)
-{
- puts ("Board: RMU\n") ;
- return (0) ;
-}
-
-/* ------------------------------------------------------------------------- */
-
-long int initdram (int board_type)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- long int size9;
-
- upmconfig (UPMA, (uint *) sdram_table,
- sizeof (sdram_table) / sizeof (uint));
-
- /* Refresh clock prescalar */
- memctl->memc_mptpr = CFG_MPTPR;
-
- memctl->memc_mar = 0x00000088;
-
- /* Map controller banks 1 to the SDRAM bank */
- memctl->memc_or1 = CFG_OR1_PRELIM;
- memctl->memc_br1 = CFG_BR1_PRELIM;
-
- memctl->memc_mamr = CFG_MAMR_9COL & (~(MAMR_PTAE)); /* no refresh yet */
-
- udelay (200);
-
- /* perform SDRAM initializsation sequence */
-
- memctl->memc_mcr = 0x80002136; /* SDRAM bank 0 */
- udelay (1);
-
- memctl->memc_mamr |= MAMR_PTAE; /* enable refresh */
-
- udelay (1000);
-
- /* Check Bank 0 Memory Size,
- * 9 column mode
- */
-
- size9 = dram_size (CFG_MAMR_9COL, (long *) SDRAM_BASE_PRELIM,
- SDRAM_MAX_SIZE);
-
- /*
- * Final mapping:
- */
-
- memctl->memc_or1 = ((-size9) & 0xFFFF0000) | CFG_OR_TIMING_SDRAM;
- udelay (1000);
-
- return (size9);
-}
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Check memory range for valid RAM. A simple memory test determines
- * the actually available RAM size between addresses `base' and
- * `base + maxsize'. Some (not all) hardware errors are detected:
- * - short between address lines
- * - short between data lines
- */
-
-static long int dram_size (long int mamr_value, long int *base,
- long int maxsize)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
-
- memctl->memc_mamr = mamr_value;
-
- return (get_ram_size(base, maxsize));
-}
diff --git a/board/rmu/u-boot.lds b/board/rmu/u-boot.lds
deleted file mode 100644
index 049f9901f7..0000000000
--- a/board/rmu/u-boot.lds
+++ /dev/null
@@ -1,142 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc8xx/start.o (.text)
- common/dlmalloc.o (.text)
- lib_ppc/ppcstring.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
- lib_generic/zlib.o (.text)
-/* XXX ?
- . = env_offset;
-*/
- common/environment.o(.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/rmu/u-boot.lds.debug b/board/rmu/u-boot.lds.debug
deleted file mode 100644
index 894b9bd25b..0000000000
--- a/board/rmu/u-boot.lds.debug
+++ /dev/null
@@ -1,132 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc8xx/start.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
-
- . = env_offset;
- common/environment.o(.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/rpxsuper/Makefile b/board/rpxsuper/Makefile
deleted file mode 100644
index 4535106e6c..0000000000
--- a/board/rpxsuper/Makefile
+++ /dev/null
@@ -1,46 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := rpxsuper.o flash.o mii_phy.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/rpxsuper/config.mk b/board/rpxsuper/config.mk
deleted file mode 100644
index 4b8c5d31f7..0000000000
--- a/board/rpxsuper/config.mk
+++ /dev/null
@@ -1,34 +0,0 @@
-#
-# (C) Copyright 2000
-# Sysgo Real-Time Solutions, GmbH <www.elinos.com>
-# Marius Groeger <mgroeger@sysgo.de>
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# MBX8xx boards
-#
-
-TEXT_BASE = 0x80F00000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
diff --git a/board/rpxsuper/flash.c b/board/rpxsuper/flash.c
deleted file mode 100644
index d80e778622..0000000000
--- a/board/rpxsuper/flash.c
+++ /dev/null
@@ -1,434 +0,0 @@
-/*
- * (C) Copyright 2000
- * Marius Groeger <mgroeger@sysgo.de>
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- *
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * Flash Routines for AMD 29F080B devices
- * Added support for 64bit and AMD 29DL323B
- *
- *--------------------------------------------------------------------
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-#include <asm/io.h>
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
-
-#define RD_SWP32(x) in_le32((volatile u32*)x)
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-
-static ulong flash_get_size (vu_long *addr, flash_info_t *info);
-static int write_word (flash_info_t *info, ulong dest, ulong data);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- unsigned long size;
- int i;
-
- /* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* for now, only support the 4 MB Flash SIMM */
- size = flash_get_size((vu_long *)CFG_FLASH0_BASE, &flash_info[0]);
-
- /*
- * protect monitor and environment sectors
- */
-
-#if CFG_MONITOR_BASE >= CFG_FLASH0_BASE
- flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+monitor_flash_len-1,
- &flash_info[0]);
-#endif
-
-#if (CFG_ENV_IS_IN_FLASH == 1) && defined(CFG_ENV_ADDR)
-# ifndef CFG_ENV_SIZE
-# define CFG_ENV_SIZE CFG_ENV_SECT_SIZE
-# endif
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1,
- &flash_info[0]);
-#endif
-
- return /*size*/ (CFG_FLASH0_SIZE * 1024 * 1024);
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case (AMD_MANUFACT & FLASH_VENDMASK):
- printf ("AMD ");
- break;
- case (FUJ_MANUFACT & FLASH_VENDMASK):
- printf ("FUJITSU ");
- break;
- case (SST_MANUFACT & FLASH_VENDMASK):
- printf ("SST ");
- break;
- default:
- printf ("Unknown Vendor ");
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case (AMD_ID_DL323B & FLASH_TYPEMASK):
- printf("AM29DL323B (32 MBit)\n");
- break;
- default:
- printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; ++i) {
- if ((i % 5) == 0) printf ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " "
- );
- }
- printf ("\n");
- return;
-}
-
-/*
- * The following code cannot be run from FLASH!
- */
-
-static ulong flash_get_size (vu_long *addr, flash_info_t *info)
-{
- short i;
- vu_long vendor[2], devid[2];
- ulong base = (ulong)addr;
-
- /* Reset and Write auto select command: read Manufacturer ID */
- addr[0] = 0xf0f0f0f0;
- addr[2 * 0x0555] = 0xAAAAAAAA;
- addr[2 * 0x02AA] = 0x55555555;
- addr[2 * 0x0555] = 0x90909090;
- addr[1] = 0xf0f0f0f0;
- addr[2 * 0x0555 + 1] = 0xAAAAAAAA;
- addr[2 * 0x02AA + 1] = 0x55555555;
- addr[2 * 0x0555 + 1] = 0x90909090;
- udelay (1000);
-
- vendor[0] = RD_SWP32(&addr[0]);
- vendor[1] = RD_SWP32(&addr[1]);
- if (vendor[0] != vendor[1] || vendor[0] != AMD_MANUFACT) {
- info->size = 0;
- goto out;
- }
-
- devid[0] = RD_SWP32(&addr[2]);
- devid[1] = RD_SWP32(&addr[3]);
-
- if (devid[0] == AMD_ID_DL323B) {
- /*
- * we have 2 Banks
- * Bank 1 (23 Sectors): 0-7=8kbyte, 8-22=64kbyte
- * Bank 2 (48 Sectors): 23-70=64kbyte
- */
- info->flash_id = (AMD_MANUFACT & FLASH_VENDMASK) |
- (AMD_ID_DL323B & FLASH_TYPEMASK);
- info->sector_count = 71;
- info->size = 4 * (8 * 8 + 63 * 64) * 1024;
- }
- else {
- info->size = 0;
- goto out;
- }
-
- /* set up sector start address table */
- for (i = 0; i < 8; i++) {
- info->start[i] = base + (i * 0x8000);
- }
- for (i = 8; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x40000) + 8 * 0x8000 - 8 * 0x40000;
- }
-
- /* check for protected sectors */
- for (i = 0; i < info->sector_count; i++) {
- /* read sector protection at sector address */
- addr = (volatile unsigned long *)(info->start[i]);
- addr[2 * 0x0555] = 0xAAAAAAAA;
- addr[2 * 0x02AA] = 0x55555555;
- addr[2 * 0x0555] = 0x90909090;
- addr[2 * 0x0555 + 1] = 0xAAAAAAAA;
- addr[2 * 0x02AA + 1] = 0x55555555;
- addr[2 * 0x0555 + 1] = 0x90909090;
- udelay (1000);
- base = RD_SWP32(&addr[4]);
- base |= RD_SWP32(&addr[5]);
- info->protect[i] = base & 0x00010001 ? 1 : 0;
- }
- addr = (vu_long*)info->start[0];
-
-out:
- /* reset command */
- addr[0] = 0xf0f0f0f0;
- addr[1] = 0xf0f0f0f0;
-
- return info->size;
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- vu_long *addr = (vu_long*)(info->start[0]);
- int flag, prot, sect, l_sect;
- ulong start, now, last;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- l_sect = -1;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[2 * 0x0555] = 0xAAAAAAAA;
- addr[2 * 0x02AA] = 0x55555555;
- addr[2 * 0x0555] = 0x80808080;
- addr[2 * 0x0555] = 0xAAAAAAAA;
- addr[2 * 0x02AA] = 0x55555555;
- addr[2 * 0x0555 + 1] = 0xAAAAAAAA;
- addr[2 * 0x02AA + 1] = 0x55555555;
- addr[2 * 0x0555 + 1] = 0x80808080;
- addr[2 * 0x0555 + 1] = 0xAAAAAAAA;
- addr[2 * 0x02AA + 1] = 0x55555555;
- udelay (100);
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr = (vu_long*)(info->start[sect]);
- addr[0] = 0x30303030;
- addr[1] = 0x30303030;
- l_sect = sect;
- }
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- /*
- * We wait for the last triggered sector
- */
- if (l_sect < 0)
- goto DONE;
-
- start = get_timer (0);
- last = start;
- addr = (vu_long*)(info->start[l_sect]);
- while ( (addr[0] & 0x80808080) != 0x80808080 ||
- (addr[1] & 0x80808080) != 0x80808080) {
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- return 1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- serial_putc ('.');
- last = now;
- }
- }
-
- DONE:
- /* reset to read mode */
- addr = (volatile unsigned long *)info->start[0];
- addr[0] = 0xF0F0F0F0; /* reset bank */
- addr[1] = 0xF0F0F0F0; /* reset bank */
-
- printf (" done\n");
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int i, l, rc;
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
- for (; i<4 && cnt>0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = 0;
- for (i=0; i<4; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- return (write_word(info, wp, data));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word (flash_info_t *info, ulong dest, ulong data)
-{
- vu_long *addr = (vu_long*)(info->start[0]);
- ulong start;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*((vu_long *)dest) & data) != data) {
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- if ((dest & 0x00000004) == 0) {
- addr[2 * 0x0555] = 0xAAAAAAAA;
- addr[2 * 0x02AA] = 0x55555555;
- addr[2 * 0x0555] = 0xA0A0A0A0;
- }
- else {
- addr[2 * 0x0555 + 1] = 0xAAAAAAAA;
- addr[2 * 0x02AA + 1] = 0x55555555;
- addr[2 * 0x0555 + 1] = 0xA0A0A0A0;
- }
-
- *((vu_long *)dest) = data;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* data polling for D7 */
- start = get_timer (0);
- while ((*((vu_long *)dest) & 0x80808080) != (data & 0x80808080)) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- return (1);
- }
- }
- return (0);
-}
-
-/*-----------------------------------------------------------------------
- */
diff --git a/board/rpxsuper/mii_phy.c b/board/rpxsuper/mii_phy.c
deleted file mode 100644
index ef99affff9..0000000000
--- a/board/rpxsuper/mii_phy.c
+++ /dev/null
@@ -1,107 +0,0 @@
-#include <common.h>
-#include <mii_phy.h>
-#include "rpxsuper.h"
-
-#define MII_MDIO 0x01
-#define MII_MDCK 0x02
-#define MII_MDIR 0x04
-
-void
-mii_discover_phy(void)
-{
- int known;
- unsigned short phy_reg;
- unsigned long phy_id;
-
- known = 0;
- printf("Discovering phy @ 0: ");
- phy_id = mii_phy_read(2) << 16;
- phy_id |= mii_phy_read(3);
- if ((phy_id & 0xFFFFFC00) == 0x00137800) {
- printf("Level One ");
- if ((phy_id & 0x000003F0) == 0xE0) {
- printf("LXT971A Revision %d\n", (int)(phy_id & 0xF));
- known = 1;
- }
- else printf("unknown type\n");
- }
- else printf("unknown OUI = 0x%08lX\n", phy_id);
-
- phy_reg = mii_phy_read(1);
- if (!(phy_reg & 0x0004)) printf("Link is down\n");
- if (!(phy_reg & 0x0020)) printf("Auto-negotiation not complete\n");
- if (phy_reg & 0x0002) printf("Jabber condition detected\n");
- if (phy_reg & 0x0010) printf("Remote fault condition detected \n");
-
- if (known) {
- phy_reg = mii_phy_read(17);
- if (phy_reg & 0x0400)
- printf("Phy operating at %d MBit/s in %s-duplex mode\n",
- phy_reg & 0x4000 ? 100 : 10,
- phy_reg & 0x0200 ? "full" : "half");
- else
- printf("bad link!!\n");
-/*
-left off: no link, green 100MBit, yellow 10MBit
-right off: no activity, green full-duplex, yellow half-duplex
-*/
- mii_phy_write(20, 0x0452);
- }
-}
-
-unsigned short
-mii_phy_read(unsigned short reg)
-{
- int i;
- unsigned short tmp, val = 0, adr = 0;
- t_rpx_regs *regs = (t_rpx_regs*)CFG_REGS_BASE;
-
- tmp = 0x6002 | (adr << 7) | (reg << 2);
- regs->bcsr4 = 0xC3;
- for (i = 0; i < 64; i++) {
- regs->bcsr4 ^= MII_MDCK;
- }
- for (i = 0; i < 16; i++) {
- regs->bcsr4 &= ~MII_MDCK;
- if (tmp & 0x8000) regs->bcsr4 |= MII_MDIO;
- else regs->bcsr4 &= ~MII_MDIO;
- regs->bcsr4 |= MII_MDCK;
- tmp <<= 1;
- }
- regs->bcsr4 |= MII_MDIR;
- for (i = 0; i < 16; i++) {
- val <<= 1;
- regs->bcsr4 = MII_MDIO | (regs->bcsr4 | MII_MDCK);
- if (regs->bcsr4 & MII_MDIO) val |= 1;
- regs->bcsr4 = MII_MDIO | (regs->bcsr4 &= ~MII_MDCK);
- }
- return val;
-}
-
-void
-mii_phy_write(unsigned short reg, unsigned short val)
-{
- int i;
- unsigned short tmp, adr = 0;
- t_rpx_regs *regs = (t_rpx_regs*)CFG_REGS_BASE;
-
- tmp = 0x5002 | (adr << 7) | (reg << 2);
- regs->bcsr4 = 0xC3;
- for (i = 0; i < 64; i++) {
- regs->bcsr4 ^= MII_MDCK;
- }
- for (i = 0; i < 16; i++) {
- regs->bcsr4 &= ~MII_MDCK;
- if (tmp & 0x8000) regs->bcsr4 |= MII_MDIO;
- else regs->bcsr4 &= ~MII_MDIO;
- regs->bcsr4 |= MII_MDCK;
- tmp <<= 1;
- }
- for (i = 0; i < 16; i++) {
- regs->bcsr4 &= ~MII_MDCK;
- if (val & 0x8000) regs->bcsr4 |= MII_MDIO;
- else regs->bcsr4 &= ~MII_MDIO;
- regs->bcsr4 |= MII_MDCK;
- val <<= 1;
- }
-}
diff --git a/board/rpxsuper/readme b/board/rpxsuper/readme
deleted file mode 100644
index 21267bdd8c..0000000000
--- a/board/rpxsuper/readme
+++ /dev/null
@@ -1,30 +0,0 @@
-Hi,
-
-so this is the port to the Embedded Planet RPX Super Board.
-
-ATTENTION
-This code is only tested on the AY-Version, which is an early release with some
-hardware bugs. The main problem is that this board uses the default Hard Reset
-Configuration Word and not the 4 bytes located at start of FLASH because at
-0xFE000000 is no FLASH. The FLASH consists out of 4 chips each 16bits wide. Be
-carefull, the bytes are swapped. So DQ0-7 is the high byte, DQ8-15 ist the low
-byte.
-
-The icache can only manually be enabled after reset.
-The FLASH and main SDRAM is working with icache enabled.
-The local SDRAM can only be used as data memory when icache is enabled.
-If U-Boot runs in local SDRAM, TFTP does not work.
-The functions in mii_phy.c are all working. Call mii_phy_discover() out of
-eth_init() and solve the linker error.
-I2C, RTC/NVRAM and PCMCIA are not working yet.
-
-TODO
-The 32MB local SDRAM is working but not shown in the startup messages of
-U-Boot. If you locate U-Boot or any other program to this area it won't run.
-Turning the ichache off does not solve this problem.
-
-As I won't buy another RPX Super there might be some little work to do for you
-getting this U-Boot port running on the final board.
-
-
-frank.morauf@salzbrenner.com
diff --git a/board/rpxsuper/rpxsuper.c b/board/rpxsuper/rpxsuper.c
deleted file mode 100644
index b4331f1cde..0000000000
--- a/board/rpxsuper/rpxsuper.c
+++ /dev/null
@@ -1,305 +0,0 @@
-/*
- * (C) Copyright 2000
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * (C) Copyright 2001
- * Advent Networks, Inc. <http://www.adventnetworks.com>
- * Jay Monkman <jtm@smoothsmoothie.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <ioports.h>
-#include <mpc8260.h>
-#include "rpxsuper.h"
-
-/*
- * I/O Port configuration table
- *
- * if conf is 1, then that port pin will be configured at boot time
- * according to the five values podr/pdir/ppar/psor/pdat for that entry
- */
-
-const iop_conf_t iop_conf_tab[4][32] = {
-
- /* Port A configuration */
- { /* conf ppar psor pdir podr pdat */
- /* PA31 */ { 1, 0, 0, 0, 0, 0 }, /* FCC1 *ATMTXEN */
- /* PA30 */ { 1, 0, 0, 0, 0, 0 }, /* FCC1 ATMTCA */
- /* PA29 */ { 1, 0, 0, 0, 0, 0 }, /* FCC1 ATMTSOC */
- /* PA28 */ { 1, 0, 0, 0, 0, 0 }, /* FCC1 *ATMRXEN */
- /* PA27 */ { 1, 0, 0, 0, 0, 0 }, /* FCC1 ATMRSOC */
- /* PA26 */ { 1, 0, 0, 0, 0, 0 }, /* FCC1 ATMRCA */
- /* PA25 */ { 1, 0, 0, 0, 0, 0 }, /* FCC1 ATMTXD[0] */
- /* PA24 */ { 1, 0, 0, 0, 0, 0 }, /* FCC1 ATMTXD[1] */
- /* PA23 */ { 1, 0, 0, 0, 0, 0 }, /* FCC1 ATMTXD[2] */
- /* PA22 */ { 1, 0, 0, 0, 0, 0 }, /* FCC1 ATMTXD[3] */
- /* PA21 */ { 1, 0, 0, 0, 0, 0 }, /* FCC1 ATMTXD[4] */
- /* PA20 */ { 1, 0, 0, 0, 0, 0 }, /* FCC1 ATMTXD[5] */
- /* PA19 */ { 1, 0, 0, 0, 0, 0 }, /* FCC1 ATMTXD[6] */
- /* PA18 */ { 1, 0, 0, 0, 0, 0 }, /* FCC1 ATMTXD[7] */
- /* PA17 */ { 1, 0, 0, 0, 0, 0 }, /* FCC1 ATMRXD[7] */
- /* PA16 */ { 1, 0, 0, 0, 0, 0 }, /* FCC1 ATMRXD[6] */
- /* PA15 */ { 1, 0, 0, 0, 0, 0 }, /* FCC1 ATMRXD[5] */
- /* PA14 */ { 1, 0, 0, 0, 0, 0 }, /* FCC1 ATMRXD[4] */
- /* PA13 */ { 1, 0, 0, 0, 0, 0 }, /* FCC1 ATMRXD[3] */
- /* PA12 */ { 1, 0, 0, 0, 0, 0 }, /* FCC1 ATMRXD[2] */
- /* PA11 */ { 1, 0, 0, 0, 0, 0 }, /* FCC1 ATMRXD[1] */
- /* PA10 */ { 1, 0, 0, 0, 0, 0 }, /* FCC1 ATMRXD[0] */
- /* PA9 */ { 1, 1, 0, 1, 0, 0 }, /* SMC2 TXD */
- /* PA8 */ { 1, 1, 0, 0, 0, 0 }, /* SMC2 RXD */
- /* PA7 */ { 1, 0, 0, 0, 0, 0 }, /* PA7 */
- /* PA6 */ { 1, 0, 0, 0, 0, 0 }, /* PA6 */
- /* PA5 */ { 1, 0, 0, 0, 0, 0 }, /* PA5 */
- /* PA4 */ { 1, 0, 0, 0, 0, 0 }, /* PA4 */
- /* PA3 */ { 1, 0, 0, 0, 0, 0 }, /* PA3 */
- /* PA2 */ { 1, 0, 0, 0, 0, 0 }, /* PA2 */
- /* PA1 */ { 1, 0, 0, 0, 0, 0 }, /* PA1 */
- /* PA0 */ { 1, 0, 0, 0, 0, 0 } /* PA0 */
- },
-
- /* Port B configuration */
- { /* conf ppar psor pdir podr pdat */
- /* PB31 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TX_ER */
- /* PB30 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_DV */
- /* PB29 */ { 1, 1, 1, 1, 0, 0 }, /* FCC2 MII TX_EN */
- /* PB28 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_ER */
- /* PB27 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII COL */
- /* PB26 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII CRS */
- /* PB25 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[3] */
- /* PB24 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[2] */
- /* PB23 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[1] */
- /* PB22 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[0] */
- /* PB21 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[0] */
- /* PB20 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[1] */
- /* PB19 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[2] */
- /* PB18 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[3] */
- /* PB17 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3 MII RX_DV */
- /* PB16 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3 MII RX_ER */
- /* PB15 */ { 1, 1, 0, 1, 0, 0 }, /* FCC3 MII TX_ER */
- /* PB14 */ { 1, 1, 0, 1, 0, 0 }, /* FCC3 MII TX_EN */
- /* PB13 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3 MII COL */
- /* PB12 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3 MII CRS */
- /* PB11 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3 MII RxD[3] */
- /* PB10 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3 MII RxD[2] */
- /* PB9 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3 MII RxD[1] */
- /* PB8 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3 MII RxD[0] */
- /* PB7 */ { 0, 0, 0, 0, 0, 0 }, /* PB7 */
- /* PB6 */ { 1, 1, 0, 1, 0, 0 }, /* FCC3 MII TxD[1] */
- /* PB5 */ { 1, 1, 0, 1, 0, 0 }, /* FCC3 MII TxD[2] */
- /* PB4 */ { 1, 1, 0, 1, 0, 0 }, /* FCC3 MII TxD[3] */
- /* PB3 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PB2 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PB1 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PB0 */ { 0, 0, 0, 0, 0, 0 } /* pin doesn't exist */
- },
-
- /* Port C */
- { /* conf ppar psor pdir podr pdat */
- /* PC31 */ { 1, 0, 0, 1, 0, 0 }, /* PC31 */
- /* PC30 */ { 1, 0, 0, 1, 0, 0 }, /* PC30 */
- /* PC29 */ { 1, 1, 1, 0, 0, 0 }, /* SCC1 EN *CLSN */
- /* PC28 */ { 1, 0, 0, 1, 0, 0 }, /* PC28 */
- /* PC27 */ { 1, 1, 0, 1, 0, 0 }, /* FCC3 MII TxD[0] */
- /* PC26 */ { 1, 0, 0, 1, 0, 0 }, /* PC26 */
- /* PC25 */ { 1, 0, 0, 1, 0, 0 }, /* PC25 */
- /* PC24 */ { 1, 0, 0, 1, 0, 0 }, /* PC24 */
- /* PC23 */ { 1, 1, 0, 1, 0, 0 }, /* ATMTFCLK */
- /* PC22 */ { 1, 1, 0, 0, 0, 0 }, /* ATMRFCLK */
- /* PC21 */ { 1, 1, 0, 0, 0, 0 }, /* SCC1 EN RXCLK */
- /* PC20 */ { 1, 1, 0, 0, 0, 0 }, /* SCC1 EN TXCLK */
- /* PC19 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_CLK */
- /* PC18 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII TX_CLK */
- /* PC17 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3 MII RX_CLK */
- /* PC16 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3 MII TX_CLK */
- /* PC15 */ { 1, 0, 0, 0, 0, 0 }, /* PC15 */
- /* PC14 */ { 1, 1, 0, 0, 0, 0 }, /* SCC1 EN *CD */
- /* PC13 */ { 1, 0, 0, 1, 0, 0 }, /* PC13 */
- /* PC12 */ { 1, 0, 0, 1, 0, 0 }, /* PC12 */
- /* PC11 */ { 1, 0, 0, 1, 0, 0 }, /* PC11 */
- /* PC10 */ { 1, 0, 0, 1, 0, 0 }, /* FCC2 MDC */
- /* PC9 */ { 1, 0, 0, 1, 0, 0 }, /* FCC2 MDIO */
- /* PC8 */ { 1, 0, 0, 1, 0, 0 }, /* PC8 */
- /* PC7 */ { 1, 0, 0, 1, 0, 0 }, /* PC7 */
- /* PC6 */ { 1, 0, 0, 1, 0, 0 }, /* PC6 */
- /* PC5 */ { 1, 0, 0, 1, 0, 0 }, /* PC5 */
- /* PC4 */ { 1, 0, 0, 1, 0, 0 }, /* PC4 */
- /* PC3 */ { 1, 0, 0, 1, 0, 0 }, /* PC3 */
- /* PC2 */ { 1, 0, 0, 1, 0, 1 }, /* ENET FDE */
- /* PC1 */ { 1, 0, 0, 1, 0, 0 }, /* ENET DSQE */
- /* PC0 */ { 1, 0, 0, 1, 0, 0 }, /* ENET LBK */
- },
-
- /* Port D */
- { /* conf ppar psor pdir podr pdat */
- /* PD31 */ { 1, 0, 0, 0, 0, 0 }, /* SCC1 EN RxD */
- /* PD30 */ { 1, 0, 0, 0, 0, 0 }, /* SCC1 EN TxD */
- /* PD29 */ { 1, 0, 0, 0, 0, 0 }, /* SCC1 EN TENA */
- /* PD28 */ { 1, 0, 0, 0, 0, 0 }, /* PD28 */
- /* PD27 */ { 1, 0, 0, 0, 0, 0 }, /* PD27 */
- /* PD26 */ { 1, 0, 0, 0, 0, 0 }, /* PD26 */
- /* PD25 */ { 1, 0, 0, 0, 0, 0 }, /* PD25 */
- /* PD24 */ { 1, 0, 0, 0, 0, 0 }, /* PD24 */
- /* PD23 */ { 1, 0, 0, 0, 0, 0 }, /* PD23 */
- /* PD22 */ { 1, 0, 0, 0, 0, 0 }, /* PD22 */
- /* PD21 */ { 1, 0, 0, 0, 0, 0 }, /* PD21 */
- /* PD20 */ { 1, 0, 0, 0, 0, 0 }, /* PD20 */
- /* PD19 */ { 1, 0, 0, 0, 0, 0 }, /* PD19 */
- /* PD18 */ { 1, 0, 0, 0, 0, 0 }, /* PD19 */
- /* PD17 */ { 1, 0, 0, 0, 0, 0 }, /* FCC1 ATMRXPRTY */
- /* PD16 */ { 1, 0, 0, 0, 0, 0 }, /* FCC1 ATMTXPRTY */
- /* PD15 */ { 1, 1, 1, 0, 1, 0 }, /* I2C SDA */
- /* PD14 */ { 1, 1, 1, 0, 1, 0 }, /* I2C SCL */
- /* PD13 */ { 1, 0, 0, 0, 0, 0 }, /* PD13 */
- /* PD12 */ { 1, 0, 0, 0, 0, 0 }, /* PD12 */
- /* PD11 */ { 1, 0, 0, 0, 0, 0 }, /* PD11 */
- /* PD10 */ { 1, 0, 0, 0, 0, 0 }, /* PD10 */
- /* PD9 */ { 1, 1, 0, 1, 0, 0 }, /* SMC1 TXD */
- /* PD8 */ { 1, 1, 0, 0, 0, 0 }, /* SMC1 RXD */
- /* PD7 */ { 1, 0, 0, 0, 0, 0 }, /* PD7 */
- /* PD6 */ { 1, 0, 0, 0, 0, 0 }, /* PD6 */
- /* PD5 */ { 1, 0, 0, 0, 0, 0 }, /* PD5 */
- /* PD4 */ { 1, 0, 0, 0, 0, 0 }, /* PD4 */
- /* PD3 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PD2 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PD1 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PD0 */ { 0, 0, 0, 0, 0, 0 } /* pin doesn't exist */
- }
-};
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Setup CS4 to enable the Board Control/Status registers.
- * Otherwise the smcs won't work.
-*/
-int board_early_init_f (void)
-{
- volatile t_rpx_regs *regs = (t_rpx_regs*)CFG_REGS_BASE;
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile memctl8260_t *memctl = &immap->im_memctl;
- memctl->memc_br4 = CFG_BR4_PRELIM;
- memctl->memc_or4 = CFG_OR4_PRELIM;
- regs->bcsr1 = 0x70; /* to enable terminal no SMC1 */
- regs->bcsr2 = 0x20; /* mut be written to enable writing FLASH */
- return 0;
-}
-
-void
-reset_phy(void)
-{
- volatile t_rpx_regs *regs = (t_rpx_regs*)CFG_REGS_BASE;
- regs->bcsr4 = 0xC3;
-}
-
-/*
- * Check Board Identity:
- */
-
-int checkboard(void)
-{
- volatile t_rpx_regs *regs = (t_rpx_regs*)CFG_REGS_BASE;
- printf ("Board: Embedded Planet RPX Super, Revision %d\n",
- regs->bcsr0 >> 4);
-
- return 0;
-}
-
-/* ------------------------------------------------------------------------- */
-
-long int initdram(int board_type)
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile memctl8260_t *memctl = &immap->im_memctl;
- volatile uchar c = 0, *ramaddr;
- ulong psdmr, lsdmr, bcr;
- long size = 0;
- int i;
-
- psdmr = CFG_PSDMR;
- lsdmr = CFG_LSDMR;
-
- /*
- * Quote from 8260 UM (10.4.2 SDRAM Power-On Initialization, 10-35):
- *
- * "At system reset, initialization software must set up the
- * programmable parameters in the memory controller banks registers
- * (ORx, BRx, P/LSDMR). After all memory parameters are configured,
- * system software should execute the following initialization sequence
- * for each SDRAM device.
- *
- * 1. Issue a PRECHARGE-ALL-BANKS command
- * 2. Issue eight CBR REFRESH commands
- * 3. Issue a MODE-SET command to initialize the mode register
- *
- * The initial commands are executed by setting P/LSDMR[OP] and
- * accessing the SDRAM with a single-byte transaction."
- *
- * The appropriate BRx/ORx registers have already been set when we
- * get here. The SDRAM can be accessed at the address CFG_SDRAM_BASE.
- */
-
- size = CFG_SDRAM0_SIZE;
- bcr = immap->im_siu_conf.sc_bcr;
- immap->im_siu_conf.sc_bcr = (bcr & ~BCR_EBM);
-
- memctl->memc_mptpr = CFG_MPTPR;
-
- ramaddr = (uchar *)(CFG_SDRAM0_BASE);
- memctl->memc_psrt = CFG_PSRT;
-
- memctl->memc_psdmr = psdmr | PSDMR_OP_PREA;
- *ramaddr = c;
-
- memctl->memc_psdmr = psdmr | PSDMR_OP_CBRR;
- for (i = 0; i < 8; i++)
- *ramaddr = c;
-
- memctl->memc_psdmr = psdmr | PSDMR_OP_MRW;
- *ramaddr = c;
-
- memctl->memc_psdmr = psdmr | PSDMR_OP_NORM | PSDMR_RFEN;
- *ramaddr = c;
-
- immap->im_siu_conf.sc_bcr = bcr;
-
-#ifndef CFG_RAMBOOT
-/* size += CFG_SDRAM1_SIZE; */
- ramaddr = (uchar *)(CFG_SDRAM1_BASE);
- memctl->memc_lsrt = CFG_LSRT;
-
- memctl->memc_lsdmr = lsdmr | PSDMR_OP_PREA;
- *ramaddr = c;
-
- memctl->memc_lsdmr = lsdmr | PSDMR_OP_CBRR;
- for (i = 0; i < 8; i++)
- *ramaddr = c;
-
- memctl->memc_lsdmr = lsdmr | PSDMR_OP_MRW;
- *ramaddr = c;
-
- memctl->memc_lsdmr = lsdmr | PSDMR_OP_NORM | PSDMR_RFEN;
- *ramaddr = c;
-#endif
-
- /* return total ram size */
- return (size * 1024 * 1024);
-}
diff --git a/board/rpxsuper/rpxsuper.h b/board/rpxsuper/rpxsuper.h
deleted file mode 100644
index af31060a7b..0000000000
--- a/board/rpxsuper/rpxsuper.h
+++ /dev/null
@@ -1,25 +0,0 @@
-#ifndef __RPX8260_H__
-#define __RPX8260_H__
-
-typedef struct tt_rpx_regs
-{
- volatile unsigned char bcsr0;
- volatile unsigned char bcsr1;
- volatile unsigned char bcsr2;
- volatile unsigned char bcsr3;
- volatile unsigned char bcsr4;
- volatile unsigned char bcsr5;
- volatile unsigned char bcsr6;
- volatile unsigned char bcsr7;
- volatile unsigned char bcsr8;
- volatile unsigned char bcsr9;
- volatile unsigned char bcsr10;
- volatile unsigned char bcsr11;
- volatile unsigned char bcsr12;
- volatile unsigned char bcsr13;
- volatile unsigned char bcsr14;
- volatile unsigned char bcsr15;
-} t_rpx_regs;
-typedef t_rpx_regs* tp_rpx_regs;
-
-#endif
diff --git a/board/rpxsuper/u-boot.lds b/board/rpxsuper/u-boot.lds
deleted file mode 100644
index 9e623d0b93..0000000000
--- a/board/rpxsuper/u-boot.lds
+++ /dev/null
@@ -1,125 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc8260/start.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/rsdproto/Makefile b/board/rsdproto/Makefile
deleted file mode 100644
index 9934787e47..0000000000
--- a/board/rsdproto/Makefile
+++ /dev/null
@@ -1,47 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := rsdproto.o flash.o
-SOBJS := flash_asm.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $^
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/rsdproto/config.mk b/board/rsdproto/config.mk
deleted file mode 100644
index 5844ec1ea4..0000000000
--- a/board/rsdproto/config.mk
+++ /dev/null
@@ -1,33 +0,0 @@
-#
-# (C) Copyright 2000
-# Sysgo Real-Time Solutions, GmbH <www.elinos.com>
-# Marius Groeger <mgroeger@sysgo.de>
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# MBX8xx boards
-#
-
-TEXT_BASE = 0xff000000
-/*TEXT_BASE = 0x00200000 */
diff --git a/board/rsdproto/flash.c b/board/rsdproto/flash.c
deleted file mode 100644
index 5ad3218520..0000000000
--- a/board/rsdproto/flash.c
+++ /dev/null
@@ -1,402 +0,0 @@
-/*
- * (C) Copyright 2000
- * Marius Groeger <mgroeger@sysgo.de>
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- *
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * Flash Routines for AM290[48]0B devices
- *
- *--------------------------------------------------------------------
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-
-/* flash hardware ids */
-#define VENDOR_AMD 0x0001
-#define AMD_29DL323C_B 0x2253
-
-/* Define this to include autoselect sequence in flash_init(). Does NOT
- * work when executing from flash itself, so this should be turned
- * on only when debugging the RAM version.
- */
-#undef WITH_AUTOSELECT
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-#if 1
-#define D(x)
-#else
-#define D(x) printf x
-#endif
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-
-static unsigned char write_ull(flash_info_t *info,
- unsigned long address,
- volatile unsigned long long data);
-
-/* from flash_asm.S */
-extern void ull_write(unsigned long long volatile *address,
- unsigned long long volatile *data);
-extern void ull_read(unsigned long long volatile *address,
- unsigned long long volatile *data);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- int i;
- ulong addr;
-
-#ifdef WITH_AUTOSELECT
- {
- unsigned long long *f_addr = (unsigned long long *)PHYS_FLASH;
- unsigned long long f_command, vendor, device;
- /* Perform Autoselect */
- f_command = 0x00AA00AA00AA00AAULL;
- ull_write(&f_addr[0x555], &f_command);
- f_command = 0x0055005500550055ULL;
- ull_write(&f_addr[0x2AA], &f_command);
- f_command = 0x0090009000900090ULL;
- ull_write(&f_addr[0x555], &f_command);
- ull_read(&f_addr[0], &vendor);
- vendor &= 0xffff;
- ull_read(&f_addr[1], &device);
- device &= 0xffff;
- f_command = 0x00F000F000F000F0ULL;
- ull_write(&f_addr[0x555], &f_command);
- if (vendor != VENDOR_AMD || device != AMD_29DL323C_B)
- return 0;
- }
-#endif
-
- /* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* 1st bank: 8 x 32 KB sectors */
- flash_info[0].flash_id = VENDOR_AMD << 16 | AMD_29DL323C_B;
- flash_info[0].sector_count = 8;
- flash_info[0].size = flash_info[0].sector_count * 32 * 1024;
- addr = PHYS_FLASH;
- for(i = 0; i < flash_info[0].sector_count; i++) {
- flash_info[0].start[i] = addr;
- addr += flash_info[0].size / flash_info[0].sector_count;
- }
- /* 1st bank: 63 x 256 KB sectors */
- flash_info[1].flash_id = VENDOR_AMD << 16 | AMD_29DL323C_B;
- flash_info[1].sector_count = 63;
- flash_info[1].size = flash_info[1].sector_count * 256 * 1024;
- for(i = 0; i < flash_info[1].sector_count; i++) {
- flash_info[1].start[i] = addr;
- addr += flash_info[1].size / flash_info[1].sector_count;
- }
-
- /*
- * protect monitor and environment sectors
- */
-
-#if CFG_MONITOR_BASE >= PHYS_FLASH
- flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+monitor_flash_len-1,
- &flash_info[0]);
- flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+monitor_flash_len-1,
- &flash_info[1]);
-#endif
-
-#if (CFG_ENV_IS_IN_FLASH == 1) && defined(CFG_ENV_ADDR)
-# ifndef CFG_ENV_SIZE
-# define CFG_ENV_SIZE CFG_ENV_SECT_SIZE
-# endif
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1,
- &flash_info[0]);
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1,
- &flash_info[1]);
-#endif
-
- return flash_info[0].size + flash_info[1].size;
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id >> 16) {
- case VENDOR_AMD:
- printf ("AMD ");
- break;
- default:
- printf ("Unknown Vendor ");
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case AMD_29DL323C_B:
- printf ("AM29DL323CB (32 Mbit)\n");
- break;
- default:
- printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " "
- );
- }
- printf ("\n");
- return;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- int flag, prot, sect, l_sect;
- ulong start;
- unsigned long long volatile *f_addr;
- unsigned long long volatile f_command;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect]) {
- prot++;
- }
- }
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- f_addr = (unsigned long long *)info->start[0];
- f_command = 0x00AA00AA00AA00AAULL;
- ull_write(&f_addr[0x555], &f_command);
- f_command = 0x0055005500550055ULL;
- ull_write(&f_addr[0x2AA], &f_command);
- f_command = 0x0080008000800080ULL;
- ull_write(&f_addr[0x555], &f_command);
- f_command = 0x00AA00AA00AA00AAULL;
- ull_write(&f_addr[0x555], &f_command);
- f_command = 0x0055005500550055ULL;
- ull_write(&f_addr[0x2AA], &f_command);
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- /* Start erase on unprotected sectors */
- for (l_sect = -1, sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
-
- f_addr =
- (unsigned long long *)(info->start[sect]);
- f_command = 0x0030003000300030ULL;
- ull_write(f_addr, &f_command);
- l_sect = sect;
- }
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- start = get_timer (0);
- do
- {
- if (get_timer(start) > CFG_FLASH_ERASE_TOUT)
- { /* write reset command, command address is unimportant */
- /* this command turns the flash back to read mode */
- f_addr =
- (unsigned long long *)(info->start[l_sect]);
- f_command = 0x00F000F000F000F0ULL;
- ull_write(f_addr, &f_command);
- printf (" timeout\n");
- return 1;
- }
- } while(*f_addr != 0xFFFFFFFFFFFFFFFFULL);
-
- printf (" done\n");
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- unsigned long cp, wp;
- unsigned long long data;
- int i, l, rc;
-
- wp = (addr & ~7); /* get lower long long aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
- for (; i<8 && cnt>0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<8; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- if ((rc = write_ull(info, wp, data)) != 0) {
- return rc;
- }
- wp += 4;
- }
-
- /*
- * handle long long aligned part
- */
- while (cnt >= 8) {
- data = 0;
- for (i=0; i<8; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_ull(info, wp, data)) != 0) {
- return rc;
- }
- wp += 8;
- cnt -= 8;
- }
-
- if (cnt == 0) {
- return ERR_OK;
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<8 && cnt>0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i<8; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- return write_ull(info, wp, data);
-}
-
-/*---------------------------------------------------------------------------
-*
-* FUNCTION NAME: write_ull
-*
-* DESCRIPTION: writes 8 bytes to flash
-*
-* EXTERNAL EFFECT: nothing
-*
-* PARAMETERS: 32 bit long pointer to address, 64 bit long pointer to data
-*
-* RETURNS: 0 if OK, 1 if timeout, 4 if parameter error
-*--------------------------------------------------------------------------*/
-
-static unsigned char write_ull(flash_info_t *info,
- unsigned long address,
- volatile unsigned long long data)
-{
- static unsigned long long f_command;
- static unsigned long long *f_addr;
- ulong start;
-
- /* address muss be 8-aligned! */
- if (address & 0x7)
- return ERR_ALIGN;
-
- f_addr = (unsigned long long *)info->start[0];
- f_command = 0x00AA00AA00AA00AAULL;
- ull_write(&f_addr[0x555], &f_command);
- f_command = 0x0055005500550055ULL;
- ull_write(&f_addr[0x2AA], &f_command);
- f_command = 0x00A000A000A000A0ULL;
- ull_write(&f_addr[0x555], &f_command);
-
- f_addr = (unsigned long long *)address;
- f_command = data;
- ull_write(f_addr, &f_command);
-
- start = get_timer (0);
- do
- {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT)
- {
- /* write reset command, command address is unimportant */
- /* this command turns the flash back to read mode */
- f_addr = (unsigned long long *)info->start[0];
- f_command = 0x00F000F000F000F0ULL;
- ull_write(f_addr, &f_command);
- return ERR_TIMOUT;
- }
- } while(*((unsigned long long *)address) != data);
-
- return 0;
-}
diff --git a/board/rsdproto/flash_asm.S b/board/rsdproto/flash_asm.S
deleted file mode 100644
index 557cac0279..0000000000
--- a/board/rsdproto/flash_asm.S
+++ /dev/null
@@ -1,39 +0,0 @@
-/*
- * -*- mode:c -*-
- *
- * (C) Copyright 2000
- * Marius Groeger <mgroeger@sysgo.de>
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- *
- * void ull_write(unsigned long long volatile *address,
- * unsigned long long volatile *data)
- * r3 = address
- * r4 = data
- *
- * void ull_read(unsigned long long volatile *address,
- * unsigned long long volatile *data)
- * r3 = address
- * r4 = data
- *
- * Uses the floating point unit to read and write 64 bit wide
- * data (unsigned long long) on the 60x bus. This is necessary
- * because all 4 flash chips use the /WE line from byte lane 0
- *
- * IMPORTANT: data should always be 8-aligned, otherwise an exception will
- * occur.
- */
-
-#include <ppc_asm.tmpl>
-#include <ppc_defs.h>
-
- .globl ull_write
-ull_write:
- lfd 0,0(r4)
- stfd 0,0(r3)
- blr
-
- .globl ull_read
-ull_read:
- lfd 0, 0(r3)
- stfd 0, 0(r4)
- blr
diff --git a/board/rsdproto/rsdproto.c b/board/rsdproto/rsdproto.c
deleted file mode 100644
index bf4fd5305f..0000000000
--- a/board/rsdproto/rsdproto.c
+++ /dev/null
@@ -1,378 +0,0 @@
-/*
- * (C) Copyright 2000
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <ioports.h>
-#include <mpc8260.h>
-#include <i2c.h>
-
-/* define to initialise the SDRAM on the local bus */
-#undef INIT_LOCAL_BUS_SDRAM
-
-/* I2C Bus adresses for PPC & Protocol board */
-#define PPC8260_I2C_ADR 0x30 /*(0)011.0000 */
-#define LM84_PPC_I2C_ADR 0x2A /*(0)010.1010 */
-#define LM84_SHARC_I2C_ADR 0x29 /*(0)010.1001 */
-#define VIRTEX_I2C_ADR 0x25 /*(0)010.0101 */
-#define X24645_PPC_I2C_ADR 0x00 /*(0)00X.XXXX -> be careful ! No other i2c-chip should have an adress beginning with (0)00 !!! */
-#define RS5C372_PPC_I2C_ADR 0x32 /*(0)011.0010 -> this adress is programmed by the manufacturer and cannot be changed !!! */
-
-/*
- * I/O Port configuration table
- *
- * if conf is 1, then that port pin will be configured at boot time
- * according to the five values podr/pdir/ppar/psor/pdat for that entry
- */
-
-const iop_conf_t iop_conf_tab[4][32] = {
-
- /* Port A configuration */
- { /* conf ppar psor pdir podr pdat */
- /* PA31 */ { 0, 0, 0, 0, 0, 0 },
- /* PA30 */ { 0, 0, 0, 0, 0, 0 },
- /* PA29 */ { 0, 0, 0, 0, 0, 0 },
- /* PA28 */ { 0, 0, 0, 0, 0, 0 },
- /* PA27 */ { 0, 0, 0, 0, 0, 0 },
- /* PA26 */ { 0, 0, 0, 0, 0, 0 },
- /* PA25 */ { 0, 0, 0, 0, 0, 0 },
- /* PA24 */ { 0, 0, 0, 0, 0, 0 },
- /* PA23 */ { 0, 0, 0, 0, 0, 0 },
- /* PA22 */ { 0, 0, 0, 0, 0, 0 },
- /* PA21 */ { 0, 0, 0, 0, 0, 0 },
- /* PA20 */ { 0, 0, 0, 0, 0, 0 },
- /* PA19 */ { 0, 0, 0, 0, 0, 0 },
- /* PA18 */ { 0, 0, 0, 0, 0, 0 },
- /* PA17 */ { 0, 0, 0, 0, 0, 0 },
- /* PA16 */ { 0, 0, 0, 0, 0, 0 },
- /* PA15 */ { 0, 0, 0, 0, 0, 0 },
- /* PA14 */ { 0, 0, 0, 0, 0, 0 },
- /* PA13 */ { 0, 0, 0, 0, 0, 0 },
- /* PA12 */ { 0, 0, 0, 0, 0, 0 },
- /* PA11 */ { 0, 0, 0, 0, 0, 0 },
- /* PA10 */ { 0, 0, 0, 0, 0, 0 },
- /* PA9 */ { 0, 0, 0, 0, 0, 0 },
- /* PA8 */ { 0, 0, 0, 0, 0, 0 },
- /* PA7 */ { 0, 0, 0, 0, 0, 0 },
- /* PA6 */ { 0, 0, 0, 0, 0, 0 },
- /* PA5 */ { 0, 0, 0, 0, 0, 0 },
- /* PA4 */ { 0, 0, 0, 0, 0, 0 },
- /* PA3 */ { 0, 0, 0, 0, 0, 0 },
- /* PA2 */ { 0, 0, 0, 0, 0, 0 },
- /* PA1 */ { 0, 0, 0, 0, 0, 0 },
- /* PA0 */ { 0, 0, 0, 0, 0, 0 }
- },
-
-
- { /* conf ppar psor pdir podr pdat */
- /* PB31 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TX_ER */
- /* PB30 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_DV */
- /* PB29 */ { 1, 1, 1, 1, 0, 0 }, /* FCC2 MII TX_EN */
- /* PB28 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_ER */
- /* PB27 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII COL */
- /* PB26 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII CRS */
- /* PB25 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[3] */
- /* PB24 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[2] */
- /* PB23 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[1] */
- /* PB22 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[0] */
- /* PB21 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[0] */
- /* PB20 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[1] */
- /* PB19 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[2] */
- /* PB18 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[3] */
- /* PB17 */ { 0, 0, 0, 0, 0, 0 },
- /* PB16 */ { 0, 0, 0, 0, 0, 0 },
- /* PB15 */ { 0, 0, 0, 0, 0, 0 },
- /* PB14 */ { 0, 0, 0, 0, 0, 0 },
- /* PB13 */ { 0, 0, 0, 0, 0, 0 },
- /* PB12 */ { 0, 0, 0, 0, 0, 0 },
- /* PB11 */ { 0, 0, 0, 0, 0, 0 },
- /* PB10 */ { 0, 0, 0, 0, 0, 0 },
- /* PB9 */ { 0, 0, 0, 0, 0, 0 },
- /* PB8 */ { 0, 0, 0, 0, 0, 0 },
- /* PB7 */ { 0, 0, 0, 0, 0, 0 },
- /* PB6 */ { 0, 0, 0, 0, 0, 0 },
- /* PB5 */ { 0, 0, 0, 0, 0, 0 },
- /* PB4 */ { 0, 0, 0, 0, 0, 0 },
- /* PB3 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PB2 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PB1 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PB0 */ { 0, 0, 0, 0, 0, 0 } /* pin doesn't exist */
- },
-
-
- { /* conf ppar psor pdir podr pdat */
- /* PC31 */ { 0, 0, 0, 0, 0, 0 },
- /* PC30 */ { 0, 0, 0, 0, 0, 0 },
- /* PC29 */ { 0, 0, 0, 0, 0, 0 },
- /* PC28 */ { 0, 0, 0, 0, 0, 0 },
- /* PC27 */ { 0, 0, 0, 0, 0, 0 },
- /* PC26 */ { 0, 0, 0, 0, 0, 0 },
- /* PC25 */ { 0, 0, 0, 0, 0, 0 },
- /* PC24 */ { 0, 0, 0, 0, 0, 0 },
- /* PC23 */ { 0, 0, 0, 0, 0, 0 },
- /* PC22 */ { 0, 0, 0, 0, 0, 0 },
- /* PC21 */ { 0, 0, 0, 0, 0, 0 },
- /* PC20 */ { 0, 0, 0, 0, 0, 0 },
- /* PC19 */ { 1, 1, 0, 0, 0, 0 },
- /* PC18 */ { 1, 1, 0, 0, 0, 0 }, /* ETHRXCLK: CLK14 */
- /* PC17 */ { 0, 0, 0, 0, 0, 0 }, /* ETHTXCLK: CLK15 */
- /* PC16 */ { 0, 0, 0, 0, 0, 0 },
- /* PC15 */ { 0, 0, 0, 0, 0, 0 },
- /* PC14 */ { 1, 1, 0, 0, 0, 0 }, /* SCC1 UART CD/ */
- /* PC13 */ { 0, 0, 0, 0, 0, 0 },
- /* PC12 */ { 0, 0, 0, 0, 0, 0 },
- /* PC11 */ { 0, 0, 0, 0, 0, 0 },
- /* PC10 */ { 1, 0, 0, 1, 0, 0 }, /* ETHMDC: GP */
- /* PC9 */ { 1, 0, 0, 1, 0, 0 }, /* ETHMDIO: GP */
- /* PC8 */ { 0, 0, 0, 0, 0, 0 },
- /* PC7 */ { 0, 0, 0, 0, 0, 0 },
- /* PC6 */ { 0, 0, 0, 0, 0, 0 },
- /* PC5 */ { 0, 0, 0, 0, 0, 0 },
- /* PC4 */ { 0, 0, 0, 0, 0, 0 },
- /* PC3 */ { 0, 0, 0, 0, 0, 0 },
- /* PC2 */ { 0, 0, 0, 0, 0, 0 },
- /* PC1 */ { 0, 0, 0, 0, 0, 0 },
- /* PC0 */ { 0, 0, 0, 0, 0, 0 }
- },
-
-
- { /* conf ppar psor pdir podr pdat */
- /* PD31 */ { 1, 1, 0, 0, 0, 0 }, /* SCC1 UART RxD */
- /* PD30 */ { 1, 1, 1, 1, 0, 0 }, /* SCC1 UART TxD */
- /* PD29 */ { 0, 0, 0, 0, 0, 0 },
- /* PD28 */ { 0, 0, 0, 0, 0, 0 },
- /* PD27 */ { 0, 0, 0, 0, 0, 0 },
- /* PD26 */ { 0, 0, 0, 0, 0, 0 },
- /* PD25 */ { 0, 0, 0, 0, 0, 0 },
- /* PD24 */ { 0, 0, 0, 0, 0, 0 },
- /* PD23 */ { 0, 0, 0, 0, 0, 0 },
- /* PD22 */ { 0, 0, 0, 0, 0, 0 },
- /* PD21 */ { 0, 0, 0, 0, 0, 0 },
- /* PD20 */ { 0, 0, 0, 0, 0, 0 },
- /* PD19 */ { 0, 0, 0, 0, 0, 0 },
- /* PD18 */ { 0, 0, 0, 0, 0, 0 },
- /* PD17 */ { 0, 0, 0, 0, 0, 0 },
- /* PD16 */ { 0, 0, 0, 0, 0, 0 },
- /* PD15 */ { 1, 1, 1, 0, 1, 0 }, /* I2C SDA */
- /* PD14 */ { 1, 1, 1, 0, 1, 0 }, /* I2C SCL */
- /* PD13 */ { 0, 0, 0, 0, 0, 0 },
- /* PD12 */ { 0, 0, 0, 0, 0, 0 },
- /* PD11 */ { 0, 0, 0, 0, 0, 0 },
- /* PD10 */ { 0, 0, 0, 0, 0, 0 },
- /* PD9 */ { 0, 0, 0, 0, 0, 0 },
- /* PD8 */ { 0, 0, 0, 0, 0, 0 },
- /* PD7 */ { 0, 0, 0, 0, 0, 0 },
- /* PD6 */ { 0, 0, 0, 0, 0, 0 },
- /* PD5 */ { 0, 0, 0, 0, 0, 0 },
- /* PD4 */ { 0, 0, 0, 0, 0, 0 },
- /* PD3 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PD2 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PD1 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PD0 */ { 0, 0, 0, 0, 0, 0 } /* pin doesn't exist */
- }
-};
-
-/* ------------------------------------------------------------------------- */
-
-struct tm {
- unsigned int tm_sec;
- unsigned int tm_min;
- unsigned int tm_hour;
- unsigned int tm_wday;
- unsigned int tm_mday;
- unsigned int tm_mon;
- unsigned int tm_year;
-};
-
-void read_RS5C372_time (struct tm *timedate)
-{
- unsigned char buffer[8];
-
-#define BCD_TO_BIN(val) ((val)=((val)&15) + ((val)>>4)*10)
-
- if (i2c_read (RS5C372_PPC_I2C_ADR, 0, 1, buffer, sizeof (buffer))) {
- timedate->tm_sec = BCD_TO_BIN (buffer[0]);
- timedate->tm_min = BCD_TO_BIN (buffer[1]);
- timedate->tm_hour = BCD_TO_BIN (buffer[2]);
- timedate->tm_wday = BCD_TO_BIN (buffer[3]);
- timedate->tm_mday = BCD_TO_BIN (buffer[4]);
- timedate->tm_mon = BCD_TO_BIN (buffer[5]);
- timedate->tm_year = BCD_TO_BIN (buffer[6]) + 2000;
- } else {
- /*printf("i2c error %02x\n", rc); */
- memset (timedate, 0, sizeof (struct tm));
- }
-}
-
-/* ------------------------------------------------------------------------- */
-
-int read_LM84_temp (int address)
-{
- unsigned char buffer[8];
- /*int rc;*/
-
- if (i2c_read (address, 0, 1, buffer, 1)) {
- return (int) buffer[0];
- } else {
- /*printf("i2c error %02x\n", rc); */
- return -42;
- }
-}
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Check Board Identity:
- */
-
-int checkboard (void)
-{
- struct tm timedate;
- unsigned int ppctemp, prottemp;
-
- puts ("Board: Rohde & Schwarz 8260 Protocol Board\n");
-
- /* initialise i2c */
- i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
-
- read_RS5C372_time (&timedate);
- printf (" Time: %02d:%02d:%02d\n",
- timedate.tm_hour, timedate.tm_min, timedate.tm_sec);
- printf (" Date: %02d-%02d-%04d\n",
- timedate.tm_mday, timedate.tm_mon, timedate.tm_year);
- ppctemp = read_LM84_temp (LM84_PPC_I2C_ADR);
- prottemp = read_LM84_temp (LM84_SHARC_I2C_ADR);
- printf (" Temp: PPC %d C, Protocol Board %d C\n",
- ppctemp, prottemp);
-
- return 0;
-}
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Miscelaneous platform dependent initialisations while still
- * running in flash
- */
-
-int misc_init_f (void)
-{
- return 0;
-}
-
-/* ------------------------------------------------------------------------- */
-
-long int initdram (int board_type)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8260_t *memctl = &immap->im_memctl;
-
-#ifdef INIT_LOCAL_BUS_SDRAM
- volatile uchar *ramaddr8;
-#endif
- volatile ulong *ramaddr32;
- ulong sdmr;
- int i;
-
- /*
- * Only initialize SDRAM when running from FLASH.
- * When running from RAM, don't touch it.
- */
- if ((ulong) initdram & 0xff000000) {
- immap->im_siu_conf.sc_ppc_acr = 0x02;
- immap->im_siu_conf.sc_ppc_alrh = 0x01267893;
- immap->im_siu_conf.sc_ppc_alrl = 0x89ABCDEF;
- immap->im_siu_conf.sc_lcl_acr = 0x02;
- immap->im_siu_conf.sc_lcl_alrh = 0x01234567;
- immap->im_siu_conf.sc_lcl_alrl = 0x89ABCDEF;
- /*
- * Program local/60x bus Transfer Error Status and Control Regs:
- * Disable parity errors
- */
- immap->im_siu_conf.sc_tescr1 = 0x00040000;
- immap->im_siu_conf.sc_ltescr1 = 0x00040000;
-
- /*
- * Perform Power-Up Initialisation of SDRAM (see 8260 UM, 10.4.2)
- *
- * The appropriate BRx/ORx registers have already
- * been set when we get here (see cpu_init_f). The
- * SDRAM can be accessed at the address CFG_SDRAM_BASE.
- */
- memctl->memc_mptpr = 0x2000;
- memctl->memc_mar = 0x0200;
-#ifdef INIT_LOCAL_BUS_SDRAM
- /* initialise local bus ram
- *
- * (using the PSRMR_ definitions is NOT an error here
- * - the LSDMR has the same fields as the PSDMR!)
- */
- memctl->memc_lsrt = 0x0b;
- memctl->memc_lurt = 0x00;
- ramaddr = (uchar *) PHYS_SDRAM_LOCAL;
- sdmr = CFG_LSDMR & ~(PSDMR_OP_MSK | PSDMR_RFEN | PSDMR_PBI);
- memctl->memc_lsdmr = sdmr | PSDMR_OP_PREA;
- *ramaddr = 0xff;
- for (i = 0; i < 8; i++) {
- memctl->memc_lsdmr = sdmr | PSDMR_OP_CBRR;
- *ramaddr = 0xff;
- }
- memctl->memc_lsdmr = sdmr | PSDMR_OP_MRW;
- *ramaddr = 0xff;
- memctl->memc_lsdmr = CFG_LSDMR | PSDMR_OP_NORM;
-#endif
- /* initialise 60x bus ram */
- memctl->memc_psrt = 0x0b;
- memctl->memc_purt = 0x08;
- ramaddr32 = (ulong *) PHYS_SDRAM_60X;
- sdmr = CFG_PSDMR & ~(PSDMR_OP_MSK | PSDMR_RFEN | PSDMR_PBI);
- memctl->memc_psdmr = sdmr | PSDMR_OP_PREA;
- ramaddr32[0] = 0x00ff00ff;
- ramaddr32[1] = 0x00ff00ff;
- memctl->memc_psdmr = sdmr | PSDMR_OP_CBRR;
- for (i = 0; i < 8; i++) {
- ramaddr32[0] = 0x00ff00ff;
- ramaddr32[1] = 0x00ff00ff;
- }
- memctl->memc_psdmr = sdmr | PSDMR_OP_MRW;
- ramaddr32[0] = 0x00ff00ff;
- ramaddr32[1] = 0x00ff00ff;
- memctl->memc_psdmr = sdmr | PSDMR_OP_NORM | PSDMR_RFEN;
- }
-
- /* return the size of the 60x bus ram */
- return PHYS_SDRAM_60X_SIZE;
-}
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Miscelaneous platform dependent initialisations after monitor
- * has been relocated into ram
- */
-
-int misc_init_r (void)
-{
- printf ("misc_init_r\n");
- return (0);
-}
diff --git a/board/rsdproto/u-boot.lds b/board/rsdproto/u-boot.lds
deleted file mode 100644
index 70fc3a5d27..0000000000
--- a/board/rsdproto/u-boot.lds
+++ /dev/null
@@ -1,130 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc8260/start.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- /*. = env_offset; */
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/sacsng/Makefile b/board/sacsng/Makefile
deleted file mode 100644
index baefa4a747..0000000000
--- a/board/sacsng/Makefile
+++ /dev/null
@@ -1,46 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := sacsng.o flash.o clkinit.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/sacsng/clkinit.c b/board/sacsng/clkinit.c
deleted file mode 100644
index ea4c65d6b3..0000000000
--- a/board/sacsng/clkinit.c
+++ /dev/null
@@ -1,1025 +0,0 @@
-/*
- * (C) Copyright 2002
- * Custom IDEAS, Inc. <www.cideas.com>
- * Jon Diekema <diekema@cideas.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <ioports.h>
-#include <mpc8260.h>
-#include <asm/cpm_8260.h>
-#include <configs/sacsng.h>
-
-#include "clkinit.h"
-
-int Daq64xSampling = 0;
-
-
-void Daq_BRG_Reset(uint brg)
-{
- volatile immap_t *immr = (immap_t *)CFG_IMMR;
- volatile uint *brg_ptr;
-
- brg_ptr = (uint *)&immr->im_brgc1;
-
- if (brg >= 5) {
- brg_ptr = (uint *)&immr->im_brgc5;
- brg -= 4;
- }
- brg_ptr += brg;
- *brg_ptr |= CPM_BRG_RST;
- *brg_ptr &= ~CPM_BRG_RST;
-}
-
-void Daq_BRG_Disable(uint brg)
-{
- volatile immap_t *immr = (immap_t *)CFG_IMMR;
- volatile uint *brg_ptr;
-
- brg_ptr = (uint *)&immr->im_brgc1;
-
- if (brg >= 5) {
- brg_ptr = (uint *)&immr->im_brgc5;
- brg -= 4;
- }
- brg_ptr += brg;
- *brg_ptr &= ~CPM_BRG_EN;
-}
-
-void Daq_BRG_Enable(uint brg)
-{
- volatile immap_t *immr = (immap_t *)CFG_IMMR;
- volatile uint *brg_ptr;
-
- brg_ptr = (uint *)&immr->im_brgc1;
- if (brg >= 5) {
- brg_ptr = (uint *)&immr->im_brgc5;
- brg -= 4;
- }
- brg_ptr += brg;
- *brg_ptr |= CPM_BRG_EN;
-}
-
-uint Daq_BRG_Get_Div16(uint brg)
-{
- volatile immap_t *immr = (immap_t *)CFG_IMMR;
- uint *brg_ptr;
-
- brg_ptr = (uint *)&immr->im_brgc1;
- if (brg >= 5) {
- brg_ptr = (uint *)&immr->im_brgc5;
- brg -= 4;
- }
- brg_ptr += brg;
-
- if (*brg_ptr & CPM_BRG_DIV16) {
- /* DIV16 active */
- return (TRUE);
- }
- else {
- /* DIV16 inactive */
- return (FALSE);
- }
-}
-
-void Daq_BRG_Set_Div16(uint brg, uint div16)
-{
- volatile immap_t *immr = (immap_t *)CFG_IMMR;
- uint *brg_ptr;
-
- brg_ptr = (uint *)&immr->im_brgc1;
- if (brg >= 5) {
- brg_ptr = (uint *)&immr->im_brgc5;
- brg -= 4;
- }
- brg_ptr += brg;
-
- if (div16) {
- /* DIV16 active */
- *brg_ptr |= CPM_BRG_DIV16;
- }
- else {
- /* DIV16 inactive */
- *brg_ptr &= ~CPM_BRG_DIV16;
- }
-}
-
-uint Daq_BRG_Get_Count(uint brg)
-{
- volatile immap_t *immr = (immap_t *)CFG_IMMR;
- uint *brg_ptr;
- uint brg_cnt;
-
- brg_ptr = (uint *)&immr->im_brgc1;
- if (brg >= 5) {
- brg_ptr = (uint *)&immr->im_brgc5;
- brg -= 4;
- }
- brg_ptr += brg;
-
- /* Get the clock divider
- *
- * Note: A clock divider of 0 means divide by 1,
- * therefore we need to add 1 to the count.
- */
- brg_cnt = (*brg_ptr & CPM_BRG_CD_MASK) >> CPM_BRG_DIV16_SHIFT;
- brg_cnt++;
- if (*brg_ptr & CPM_BRG_DIV16) {
- brg_cnt *= 16;
- }
-
- return (brg_cnt);
-}
-
-void Daq_BRG_Set_Count(uint brg, uint brg_cnt)
-{
- volatile immap_t *immr = (immap_t *)CFG_IMMR;
- uint *brg_ptr;
-
- brg_ptr = (uint *)&immr->im_brgc1;
- if (brg >= 5) {
- brg_ptr = (uint *)&immr->im_brgc5;
- brg -= 4;
- }
- brg_ptr += brg;
-
- /*
- * Note: A clock divider of 0 means divide by 1,
- * therefore we need to subtract 1 from the count.
- */
- if (brg_cnt > 4096) {
- /* Prescale = Divide by 16 */
- *brg_ptr = (*brg_ptr & ~CPM_BRG_CD_MASK) |
- (((brg_cnt / 16) - 1) << CPM_BRG_DIV16_SHIFT);
- *brg_ptr |= CPM_BRG_DIV16;
- }
- else {
- /* Prescale = Divide by 1 */
- *brg_ptr = (*brg_ptr & ~CPM_BRG_CD_MASK) |
- ((brg_cnt - 1) << CPM_BRG_DIV16_SHIFT);
- *brg_ptr &= ~CPM_BRG_DIV16;
- }
-}
-
-uint Daq_BRG_Get_ExtClk(uint brg)
-{
- volatile immap_t *immr = (immap_t *)CFG_IMMR;
- uint *brg_ptr;
-
- brg_ptr = (uint *)&immr->im_brgc1;
- if (brg >= 5) {
- brg_ptr = (uint *)&immr->im_brgc5;
- brg -= 4;
- }
- brg_ptr += brg;
-
- return ((*brg_ptr & CPM_BRG_EXTC_MASK) >> CPM_BRG_EXTC_SHIFT);
-}
-
-char* Daq_BRG_Get_ExtClk_Description(uint brg)
-{
- uint extc;
-
- extc = Daq_BRG_Get_ExtClk(brg);
-
- switch (brg + 1) {
- case 1:
- case 2:
- case 5:
- case 6: {
- switch (extc) {
- case 0: {
- return ("BRG_INT");
- }
- case 1: {
- return ("CLK3");
- }
- case 2: {
- return ("CLK5");
- }
- }
- return ("??1245??");
- }
- case 3:
- case 4:
- case 7:
- case 8: {
- switch (extc) {
- case 0: {
- return ("BRG_INT");
- }
- case 1: {
- return ("CLK9");
- }
- case 2: {
- return ("CLK15");
- }
- }
- return ("??3478??");
- }
- }
- return ("??9876??");
-}
-
-void Daq_BRG_Set_ExtClk(uint brg, uint extc)
-{
- volatile immap_t *immr = (immap_t *)CFG_IMMR;
- uint *brg_ptr;
-
- brg_ptr = (uint *)&immr->im_brgc1;
- if (brg >= 5) {
- brg_ptr = (uint *)&immr->im_brgc5;
- brg -= 4;
- }
- brg_ptr += brg;
-
- *brg_ptr = (*brg_ptr & ~CPM_BRG_EXTC_MASK) |
- ((extc << CPM_BRG_EXTC_SHIFT) & CPM_BRG_EXTC_MASK);
-}
-
-uint Daq_BRG_Rate(uint brg)
-{
- DECLARE_GLOBAL_DATA_PTR;
- volatile immap_t *immr = (immap_t *)CFG_IMMR;
- uint *brg_ptr;
- uint brg_cnt;
- uint brg_freq = 0;
-
- brg_ptr = (uint *)&immr->im_brgc1;
- brg_ptr += brg;
- if (brg >= 5) {
- brg_ptr = (uint *)&immr->im_brgc5;
- brg_ptr += (brg - 4);
- }
-
- brg_cnt = Daq_BRG_Get_Count(brg);
-
- switch (Daq_BRG_Get_ExtClk(brg)) {
- case CPM_BRG_EXTC_CLK3:
- case CPM_BRG_EXTC_CLK5: {
- brg_freq = brg_cnt;
- break;
- }
- default: {
- brg_freq = (uint)BRG_INT_CLK / brg_cnt;
- }
- }
- return (brg_freq);
-}
-
-uint Daq_Get_SampleRate(void)
-{
- /*
- * Read the BRG's to return the actual sample rate.
- */
- return (Daq_BRG_Rate(MCLK_BRG) / (MCLK_DIVISOR * SCLK_DIVISOR));
-}
-
-void Daq_Init_Clocks(int sample_rate, int sample_64x)
-{
- DECLARE_GLOBAL_DATA_PTR;
- volatile ioport_t *iopa = ioport_addr((immap_t *)CFG_IMMR, 0 /* port A */);
- uint mclk_divisor; /* MCLK divisor */
- int flag; /* Interrupt state */
-
- /* Save off the clocking data */
- Daq64xSampling = sample_64x;
-
- /*
- * Limit the sample rate to some sensible values.
- */
- if (sample_rate > MAX_64x_SAMPLE_RATE) {
- sample_rate = MAX_64x_SAMPLE_RATE;
- }
- if (sample_rate < MIN_SAMPLE_RATE) {
- sample_rate = MIN_SAMPLE_RATE;
- }
-
- /*
- * Initialize the MCLK/SCLK/LRCLK baud rate generators.
- */
-
- /* Setup MCLK */
- Daq_BRG_Set_ExtClk(MCLK_BRG, CPM_BRG_EXTC_BRGCLK);
-
- /* Setup SCLK */
-# ifdef RUN_SCLK_ON_BRG_INT
- Daq_BRG_Set_ExtClk(SCLK_BRG, CPM_BRG_EXTC_BRGCLK);
-# else
- Daq_BRG_Set_ExtClk(SCLK_BRG, CPM_BRG_EXTC_CLK9);
-# endif
-
- /* Setup LRCLK */
-# ifdef RUN_LRCLK_ON_BRG_INT
- Daq_BRG_Set_ExtClk(LRCLK_BRG, CPM_BRG_EXTC_BRGCLK);
-# else
- Daq_BRG_Set_ExtClk(LRCLK_BRG, CPM_BRG_EXTC_CLK5);
-# endif
-
- /*
- * Dynamically adjust MCLK based on the new sample rate.
- */
-
- /* Compute the divisors */
- mclk_divisor = BRG_INT_CLK / (sample_rate * MCLK_DIVISOR * SCLK_DIVISOR);
-
- /*
- * Disable interrupt and save the current state
- */
- flag = disable_interrupts();
-
- /* Setup MCLK */
- Daq_BRG_Set_Count(MCLK_BRG, mclk_divisor);
-
- /* Setup SCLK */
-# ifdef RUN_SCLK_ON_BRG_INT
- Daq_BRG_Set_Count(SCLK_BRG, mclk_divisor * MCLK_DIVISOR);
-# else
- Daq_BRG_Set_Count(SCLK_BRG, MCLK_DIVISOR);
-# endif
-
-# ifdef RUN_LRCLK_ON_BRG_INT
- Daq_BRG_Set_Count(LRCLK_BRG,
- mclk_divisor * MCLK_DIVISOR * SCLK_DIVISOR);
-# else
- Daq_BRG_Set_Count(LRCLK_BRG, SCLK_DIVISOR);
-# endif
-
- /*
- * Restore the Interrupt state
- */
- if (flag) {
- enable_interrupts();
- }
-
- /* Enable the clock drivers */
- iopa->pdat &= ~SLRCLK_EN_MASK;
-}
-
-void Daq_Stop_Clocks(void)
-
-{
-#ifdef TIGHTEN_UP_BRG_TIMING
- volatile immap_t *immr = (immap_t *)CFG_IMMR;
- register uint mclk_brg; /* MCLK BRG value */
- register uint sclk_brg; /* SCLK BRG value */
- register uint lrclk_brg; /* LRCLK BRG value */
- unsigned long flag; /* Interrupt flags */
-#endif
-
-# ifdef TIGHTEN_UP_BRG_TIMING
- /*
- * Obtain MCLK BRG reset/disabled value
- */
-# if (MCLK_BRG == 0)
- mclk_brg = (*IM_BRGC1 | CPM_BRG_RST) & ~CPM_BRG_EN;
-# endif
-# if (MCLK_BRG == 1)
- mclk_brg = (*IM_BRGC2 | CPM_BRG_RST) & ~CPM_BRG_EN;
-# endif
-# if (MCLK_BRG == 2)
- mclk_brg = (*IM_BRGC3 | CPM_BRG_RST) & ~CPM_BRG_EN;
-# endif
-# if (MCLK_BRG == 3)
- mclk_brg = (*IM_BRGC4 | CPM_BRG_RST) & ~CPM_BRG_EN;
-# endif
-# if (MCLK_BRG == 4)
- mclk_brg = (*IM_BRGC5 | CPM_BRG_RST) & ~CPM_BRG_EN;
-# endif
-# if (MCLK_BRG == 5)
- mclk_brg = (*IM_BRGC6 | CPM_BRG_RST) & ~CPM_BRG_EN;
-# endif
-# if (MCLK_BRG == 6)
- mclk_brg = (*IM_BRGC7 | CPM_BRG_RST) & ~CPM_BRG_EN;
-# endif
-# if (MCLK_BRG == 7)
- mclk_brg = (*IM_BRGC8 | CPM_BRG_RST) & ~CPM_BRG_EN;
-# endif
-
- /*
- * Obtain SCLK BRG reset/disabled value
- */
-# if (SCLK_BRG == 0)
- sclk_brg = (*IM_BRGC1 | CPM_BRG_RST) & ~CPM_BRG_EN;
-# endif
-# if (SCLK_BRG == 1)
- sclk_brg = (*IM_BRGC2 | CPM_BRG_RST) & ~CPM_BRG_EN;
-# endif
-# if (SCLK_BRG == 2)
- sclk_brg = (*IM_BRGC3 | CPM_BRG_RST) & ~CPM_BRG_EN;
-# endif
-# if (SCLK_BRG == 3)
- sclk_brg = (*IM_BRGC4 | CPM_BRG_RST) & ~CPM_BRG_EN;
-# endif
-# if (SCLK_BRG == 4)
- sclk_brg = (*IM_BRGC5 | CPM_BRG_RST) & ~CPM_BRG_EN;
-# endif
-# if (SCLK_BRG == 5)
- sclk_brg = (*IM_BRGC6 | CPM_BRG_RST) & ~CPM_BRG_EN;
-# endif
-# if (SCLK_BRG == 6)
- sclk_brg = (*IM_BRGC7 | CPM_BRG_RST) & ~CPM_BRG_EN;
-# endif
-# if (SCLK_BRG == 7)
- sclk_brg = (*IM_BRGC8 | CPM_BRG_RST) & ~CPM_BRG_EN;
-# endif
-
- /*
- * Obtain LRCLK BRG reset/disabled value
- */
-# if (LRCLK_BRG == 0)
- lrclk_brg = (*IM_BRGC1 | CPM_BRG_RST) & ~CPM_BRG_EN;
-# endif
-# if (LRCLK_BRG == 1)
- lrclk_brg = (*IM_BRGC2 | CPM_BRG_RST) & ~CPM_BRG_EN;
-# endif
-# if (LRCLK_BRG == 2)
- lrclk_brg = (*IM_BRGC3 | CPM_BRG_RST) & ~CPM_BRG_EN;
-# endif
-# if (LRCLK_BRG == 3)
- lrclk_brg = (*IM_BRGC4 | CPM_BRG_RST) & ~CPM_BRG_EN;
-# endif
-# if (LRCLK_BRG == 4)
- lrclk_brg = (*IM_BRGC5 | CPM_BRG_RST) & ~CPM_BRG_EN;
-# endif
-# if (LRCLK_BRG == 5)
- lrclk_brg = (*IM_BRGC6 | CPM_BRG_RST) & ~CPM_BRG_EN;
-# endif
-# if (LRCLK_BRG == 6)
- lrclk_brg = (*IM_BRGC7 | CPM_BRG_RST) & ~CPM_BRG_EN;
-# endif
-# if (LRCLK_BRG == 7)
- lrclk_brg = (*IM_BRGC8 | CPM_BRG_RST) & ~CPM_BRG_EN;
-# endif
-
- /*
- * Disable interrupt and save the current state
- */
- flag = disable_interrupts();
-
- /*
- * Set reset on MCLK BRG
- */
-# if (MCLK_BRG == 0)
- *IM_BRGC1 = mclk_brg;
-# endif
-# if (MCLK_BRG == 1)
- *IM_BRGC2 = mclk_brg;
-# endif
-# if (MCLK_BRG == 2)
- *IM_BRGC3 = mclk_brg;
-# endif
-# if (MCLK_BRG == 3)
- *IM_BRGC4 = mclk_brg;
-# endif
-# if (MCLK_BRG == 4)
- *IM_BRGC5 = mclk_brg;
-# endif
-# if (MCLK_BRG == 5)
- *IM_BRGC6 = mclk_brg;
-# endif
-# if (MCLK_BRG == 6)
- *IM_BRGC7 = mclk_brg;
-# endif
-# if (MCLK_BRG == 7)
- *IM_BRGC8 = mclk_brg;
-# endif
-
- /*
- * Set reset on SCLK BRG
- */
-# if (SCLK_BRG == 0)
- *IM_BRGC1 = sclk_brg;
-# endif
-# if (SCLK_BRG == 1)
- *IM_BRGC2 = sclk_brg;
-# endif
-# if (SCLK_BRG == 2)
- *IM_BRGC3 = sclk_brg;
-# endif
-# if (SCLK_BRG == 3)
- *IM_BRGC4 = sclk_brg;
-# endif
-# if (SCLK_BRG == 4)
- *IM_BRGC5 = sclk_brg;
-# endif
-# if (SCLK_BRG == 5)
- *IM_BRGC6 = sclk_brg;
-# endif
-# if (SCLK_BRG == 6)
- *IM_BRGC7 = sclk_brg;
-# endif
-# if (SCLK_BRG == 7)
- *IM_BRGC8 = sclk_brg;
-# endif
-
- /*
- * Set reset on LRCLK BRG
- */
-# if (LRCLK_BRG == 0)
- *IM_BRGC1 = lrclk_brg;
-# endif
-# if (LRCLK_BRG == 1)
- *IM_BRGC2 = lrclk_brg;
-# endif
-# if (LRCLK_BRG == 2)
- *IM_BRGC3 = lrclk_brg;
-# endif
-# if (LRCLK_BRG == 3)
- *IM_BRGC4 = lrclk_brg;
-# endif
-# if (LRCLK_BRG == 4)
- *IM_BRGC5 = lrclk_brg;
-# endif
-# if (LRCLK_BRG == 5)
- *IM_BRGC6 = lrclk_brg;
-# endif
-# if (LRCLK_BRG == 6)
- *IM_BRGC7 = lrclk_brg;
-# endif
-# if (LRCLK_BRG == 7)
- *IM_BRGC8 = lrclk_brg;
-# endif
-
- /*
- * Clear reset on MCLK BRG
- */
-# if (MCLK_BRG == 0)
- *IM_BRGC1 = mclk_brg & ~CPM_BRG_RST;
-# endif
-# if (MCLK_BRG == 1)
- *IM_BRGC2 = mclk_brg & ~CPM_BRG_RST;
-# endif
-# if (MCLK_BRG == 2)
- *IM_BRGC3 = mclk_brg & ~CPM_BRG_RST;
-# endif
-# if (MCLK_BRG == 3)
- *IM_BRGC4 = mclk_brg & ~CPM_BRG_RST;
-# endif
-# if (MCLK_BRG == 4)
- *IM_BRGC5 = mclk_brg & ~CPM_BRG_RST;
-# endif
-# if (MCLK_BRG == 5)
- *IM_BRGC6 = mclk_brg & ~CPM_BRG_RST;
-# endif
-# if (MCLK_BRG == 6)
- *IM_BRGC7 = mclk_brg & ~CPM_BRG_RST;
-# endif
-# if (MCLK_BRG == 7)
- *IM_BRGC8 = mclk_brg & ~CPM_BRG_RST;
-# endif
-
- /*
- * Clear reset on SCLK BRG
- */
-# if (SCLK_BRG == 0)
- *IM_BRGC1 = sclk_brg & ~CPM_BRG_RST;
-# endif
-# if (SCLK_BRG == 1)
- *IM_BRGC2 = sclk_brg & ~CPM_BRG_RST;
-# endif
-# if (SCLK_BRG == 2)
- *IM_BRGC3 = sclk_brg & ~CPM_BRG_RST;
-# endif
-# if (SCLK_BRG == 3)
- *IM_BRGC4 = sclk_brg & ~CPM_BRG_RST;
-# endif
-# if (SCLK_BRG == 4)
- *IM_BRGC5 = sclk_brg & ~CPM_BRG_RST;
-# endif
-# if (SCLK_BRG == 5)
- *IM_BRGC6 = sclk_brg & ~CPM_BRG_RST;
-# endif
-# if (SCLK_BRG == 6)
- *IM_BRGC7 = sclk_brg & ~CPM_BRG_RST;
-# endif
-# if (SCLK_BRG == 7)
- *IM_BRGC8 = sclk_brg & ~CPM_BRG_RST;
-# endif
-
- /*
- * Clear reset on LRCLK BRG
- */
-# if (LRCLK_BRG == 0)
- *IM_BRGC1 = lrclk_brg & ~CPM_BRG_RST;
-# endif
-# if (LRCLK_BRG == 1)
- *IM_BRGC2 = lrclk_brg & ~CPM_BRG_RST;
-# endif
-# if (LRCLK_BRG == 2)
- *IM_BRGC3 = lrclk_brg & ~CPM_BRG_RST;
-# endif
-# if (LRCLK_BRG == 3)
- *IM_BRGC4 = lrclk_brg & ~CPM_BRG_RST;
-# endif
-# if (LRCLK_BRG == 4)
- *IM_BRGC5 = lrclk_brg & ~CPM_BRG_RST;
-# endif
-# if (LRCLK_BRG == 5)
- *IM_BRGC6 = lrclk_brg & ~CPM_BRG_RST;
-# endif
-# if (LRCLK_BRG == 6)
- *IM_BRGC7 = lrclk_brg & ~CPM_BRG_RST;
-# endif
-# if (LRCLK_BRG == 7)
- *IM_BRGC8 = lrclk_brg & ~CPM_BRG_RST;
-# endif
-
- /*
- * Restore the Interrupt state
- */
- if (flag) {
- enable_interrupts();
- }
-# else
- /*
- * Reset the clocks
- */
- Daq_BRG_Reset(MCLK_BRG);
- Daq_BRG_Reset(SCLK_BRG);
- Daq_BRG_Reset(LRCLK_BRG);
-# endif
-}
-
-void Daq_Start_Clocks(int sample_rate)
-
-{
-#ifdef TIGHTEN_UP_BRG_TIMING
- volatile immap_t *immr = (immap_t *)CFG_IMMR;
-
- register uint mclk_brg; /* MCLK BRG value */
- register uint sclk_brg; /* SCLK BRG value */
- register uint temp_lrclk_brg; /* Temporary LRCLK BRG value */
- register uint real_lrclk_brg; /* Permanent LRCLK BRG value */
- uint lrclk_brg; /* LRCLK BRG value */
- unsigned long flags; /* Interrupt flags */
- uint sclk_cnt; /* SCLK count */
- uint delay_cnt; /* Delay count */
-#endif
-
-# ifdef TIGHTEN_UP_BRG_TIMING
- /*
- * Obtain the enabled MCLK BRG value
- */
-# if (MCLK_BRG == 0)
- mclk_brg = (*IM_BRGC1 & ~CPM_BRG_RST) | CPM_BRG_EN;
-# endif
-# if (MCLK_BRG == 1)
- mclk_brg = (*IM_BRGC2 & ~CPM_BRG_RST) | CPM_BRG_EN;
-# endif
-# if (MCLK_BRG == 2)
- mclk_brg = (*IM_BRGC3 & ~CPM_BRG_RST) | CPM_BRG_EN;
-# endif
-# if (MCLK_BRG == 3)
- mclk_brg = (*IM_BRGC4 & ~CPM_BRG_RST) | CPM_BRG_EN;
-# endif
-# if (MCLK_BRG == 4)
- mclk_brg = (*IM_BRGC5 & ~CPM_BRG_RST) | CPM_BRG_EN;
-# endif
-# if (MCLK_BRG == 5)
- mclk_brg = (*IM_BRGC6 & ~CPM_BRG_RST) | CPM_BRG_EN;
-# endif
-# if (MCLK_BRG == 6)
- mclk_brg = (*IM_BRGC7 & ~CPM_BRG_RST) | CPM_BRG_EN;
-# endif
-# if (MCLK_BRG == 7)
- mclk_brg = (*IM_BRGC8 & ~CPM_BRG_RST) | CPM_BRG_EN;
-# endif
-
- /*
- * Obtain the enabled SCLK BRG value
- */
-# if (SCLK_BRG == 0)
- sclk_brg = (*IM_BRGC1 & ~CPM_BRG_RST) | CPM_BRG_EN;
-# endif
-# if (SCLK_BRG == 1)
- sclk_brg = (*IM_BRGC2 & ~CPM_BRG_RST) | CPM_BRG_EN;
-# endif
-# if (SCLK_BRG == 2)
- sclk_brg = (*IM_BRGC3 & ~CPM_BRG_RST) | CPM_BRG_EN;
-# endif
-# if (SCLK_BRG == 3)
- sclk_brg = (*IM_BRGC4 & ~CPM_BRG_RST) | CPM_BRG_EN;
-# endif
-# if (SCLK_BRG == 4)
- sclk_brg = (*IM_BRGC5 & ~CPM_BRG_RST) | CPM_BRG_EN;
-# endif
-# if (SCLK_BRG == 5)
- sclk_brg = (*IM_BRGC6 & ~CPM_BRG_RST) | CPM_BRG_EN;
-# endif
-# if (SCLK_BRG == 6)
- sclk_brg = (*IM_BRGC7 & ~CPM_BRG_RST) | CPM_BRG_EN;
-# endif
-# if (SCLK_BRG == 7)
- sclk_brg = (*IM_BRGC8 & ~CPM_BRG_RST) | CPM_BRG_EN;
-# endif
-
- /*
- * Obtain the enabled LRCLK BRG value
- */
-# if (LRCLK_BRG == 0)
- lrclk_brg = (*IM_BRGC1 & ~CPM_BRG_RST) | CPM_BRG_EN;
-# endif
-# if (LRCLK_BRG == 1)
- lrclk_brg = (*IM_BRGC2 & ~CPM_BRG_RST) | CPM_BRG_EN;
-# endif
-# if (LRCLK_BRG == 2)
- lrclk_brg = (*IM_BRGC3 & ~CPM_BRG_RST) | CPM_BRG_EN;
-# endif
-# if (LRCLK_BRG == 3)
- lrclk_brg = (*IM_BRGC4 & ~CPM_BRG_RST) | CPM_BRG_EN;
-# endif
-# if (LRCLK_BRG == 4)
- lrclk_brg = (*IM_BRGC5 & ~CPM_BRG_RST) | CPM_BRG_EN;
-# endif
-# if (LRCLK_BRG == 5)
- lrclk_brg = (*IM_BRGC6 & ~CPM_BRG_RST) | CPM_BRG_EN;
-# endif
-# if (LRCLK_BRG == 6)
- lrclk_brg = (*IM_BRGC7 & ~CPM_BRG_RST) | CPM_BRG_EN;
-# endif
-# if (LRCLK_BRG == 7)
- lrclk_brg = (*IM_BRGC8 & ~CPM_BRG_RST) | CPM_BRG_EN;
-# endif
-
- /* Save off the real LRCLK value */
- real_lrclk_brg = lrclk_brg;
-
- /* Obtain the current SCLK count */
- sclk_cnt = ((sclk_brg & 0x00001FFE) >> 1) + 1;
-
- /* Compute the delay as a function of SCLK count */
- delay_cnt = ((sclk_cnt / 4) - 2) * 10 + 6;
- if (DaqSampleRate == 43402) {
- delay_cnt++;
- }
-
- /* Clear out the count */
- temp_lrclk_brg = sclk_brg & ~0x00001FFE;
-
- /* Insert the count */
- temp_lrclk_brg |= ((delay_cnt + (sclk_cnt / 2) - 1) << 1) & 0x00001FFE;
-
- /*
- * Disable interrupt and save the current state
- */
- flag = disable_interrupts();
-
- /*
- * Enable MCLK BRG
- */
-# if (MCLK_BRG == 0)
- *IM_BRGC1 = mclk_brg;
-# endif
-# if (MCLK_BRG == 1)
- *IM_BRGC2 = mclk_brg;
-# endif
-# if (MCLK_BRG == 2)
- *IM_BRGC3 = mclk_brg;
-# endif
-# if (MCLK_BRG == 3)
- *IM_BRGC4 = mclk_brg;
-# endif
-# if (MCLK_BRG == 4)
- *IM_BRGC5 = mclk_brg;
-# endif
-# if (MCLK_BRG == 5)
- *IM_BRGC6 = mclk_brg;
-# endif
-# if (MCLK_BRG == 6)
- *IM_BRGC7 = mclk_brg;
-# endif
-# if (MCLK_BRG == 7)
- *IM_BRGC8 = mclk_brg;
-# endif
-
- /*
- * Enable SCLK BRG
- */
-# if (SCLK_BRG == 0)
- *IM_BRGC1 = sclk_brg;
-# endif
-# if (SCLK_BRG == 1)
- *IM_BRGC2 = sclk_brg;
-# endif
-# if (SCLK_BRG == 2)
- *IM_BRGC3 = sclk_brg;
-# endif
-# if (SCLK_BRG == 3)
- *IM_BRGC4 = sclk_brg;
-# endif
-# if (SCLK_BRG == 4)
- *IM_BRGC5 = sclk_brg;
-# endif
-# if (SCLK_BRG == 5)
- *IM_BRGC6 = sclk_brg;
-# endif
-# if (SCLK_BRG == 6)
- *IM_BRGC7 = sclk_brg;
-# endif
-# if (SCLK_BRG == 7)
- *IM_BRGC8 = sclk_brg;
-# endif
-
- /*
- * Enable LRCLK BRG (1st time - temporary)
- */
-# if (LRCLK_BRG == 0)
- *IM_BRGC1 = temp_lrclk_brg;
-# endif
-# if (LRCLK_BRG == 1)
- *IM_BRGC2 = temp_lrclk_brg;
-# endif
-# if (LRCLK_BRG == 2)
- *IM_BRGC3 = temp_lrclk_brg;
-# endif
-# if (LRCLK_BRG == 3)
- *IM_BRGC4 = temp_lrclk_brg;
-# endif
-# if (LRCLK_BRG == 4)
- *IM_BRGC5 = temp_lrclk_brg;
-# endif
-# if (LRCLK_BRG == 5)
- *IM_BRGC6 = temp_lrclk_brg;
-# endif
-# if (LRCLK_BRG == 6)
- *IM_BRGC7 = temp_lrclk_brg;
-# endif
-# if (LRCLK_BRG == 7)
- *IM_BRGC8 = temp_lrclk_brg;
-# endif
-
- /*
- * Enable LRCLK BRG (2nd time - permanent)
- */
-# if (LRCLK_BRG == 0)
- *IM_BRGC1 = real_lrclk_brg;
-# endif
-# if (LRCLK_BRG == 1)
- *IM_BRGC2 = real_lrclk_brg;
-# endif
-# if (LRCLK_BRG == 2)
- *IM_BRGC3 = real_lrclk_brg;
-# endif
-# if (LRCLK_BRG == 3)
- *IM_BRGC4 = real_lrclk_brg;
-# endif
-# if (LRCLK_BRG == 4)
- *IM_BRGC5 = real_lrclk_brg;
-# endif
-# if (LRCLK_BRG == 5)
- *IM_BRGC6 = real_lrclk_brg;
-# endif
-# if (LRCLK_BRG == 6)
- *IM_BRGC7 = real_lrclk_brg;
-# endif
-# if (LRCLK_BRG == 7)
- *IM_BRGC8 = real_lrclk_brg;
-# endif
-
- /*
- * Restore the Interrupt state
- */
- if (flag) {
- enable_interrupts();
- }
-# else
- /*
- * Enable the clocks
- */
- Daq_BRG_Enable(LRCLK_BRG);
- Daq_BRG_Enable(SCLK_BRG);
- Daq_BRG_Enable(MCLK_BRG);
-# endif
-}
-
-void Daq_Display_Clocks(void)
-
-{
- volatile immap_t *immr = (immap_t *)CFG_IMMR;
- uint mclk_divisor; /* Detected MCLK divisor */
- uint sclk_divisor; /* Detected SCLK divisor */
-
- printf("\nBRG:\n");
- if (immr->im_brgc4 != 0) {
- printf("\tbrgc4\t0x%08x @ 0x%08x, %5d count, %d extc, %8s, MCLK\n",
- immr->im_brgc4,
- (uint)&(immr->im_brgc4),
- Daq_BRG_Get_Count(3),
- Daq_BRG_Get_ExtClk(3),
- Daq_BRG_Get_ExtClk_Description(3));
- }
- if (immr->im_brgc8 != 0) {
- printf("\tbrgc8\t0x%08x @ 0x%08x, %5d count, %d extc, %8s, SCLK\n",
- immr->im_brgc8,
- (uint)&(immr->im_brgc8),
- Daq_BRG_Get_Count(7),
- Daq_BRG_Get_ExtClk(7),
- Daq_BRG_Get_ExtClk_Description(7));
- }
- if (immr->im_brgc6 != 0) {
- printf("\tbrgc6\t0x%08x @ 0x%08x, %5d count, %d extc, %8s, LRCLK\n",
- immr->im_brgc6,
- (uint)&(immr->im_brgc6),
- Daq_BRG_Get_Count(5),
- Daq_BRG_Get_ExtClk(5),
- Daq_BRG_Get_ExtClk_Description(5));
- }
- if (immr->im_brgc1 != 0) {
- printf("\tbrgc1\t0x%08x @ 0x%08x, %5d count, %d extc, %8s, SMC1\n",
- immr->im_brgc1,
- (uint)&(immr->im_brgc1),
- Daq_BRG_Get_Count(0),
- Daq_BRG_Get_ExtClk(0),
- Daq_BRG_Get_ExtClk_Description(0));
- }
- if (immr->im_brgc2 != 0) {
- printf("\tbrgc2\t0x%08x @ 0x%08x, %5d count, %d extc, %8s, SMC2\n",
- immr->im_brgc2,
- (uint)&(immr->im_brgc2),
- Daq_BRG_Get_Count(1),
- Daq_BRG_Get_ExtClk(1),
- Daq_BRG_Get_ExtClk_Description(1));
- }
- if (immr->im_brgc3 != 0) {
- printf("\tbrgc3\t0x%08x @ 0x%08x, %5d count, %d extc, %8s, SCC1\n",
- immr->im_brgc3,
- (uint)&(immr->im_brgc3),
- Daq_BRG_Get_Count(2),
- Daq_BRG_Get_ExtClk(2),
- Daq_BRG_Get_ExtClk_Description(2));
- }
- if (immr->im_brgc5 != 0) {
- printf("\tbrgc5\t0x%08x @ 0x%08x, %5d count, %d extc, %8s\n",
- immr->im_brgc5,
- (uint)&(immr->im_brgc5),
- Daq_BRG_Get_Count(4),
- Daq_BRG_Get_ExtClk(4),
- Daq_BRG_Get_ExtClk_Description(4));
- }
- if (immr->im_brgc7 != 0) {
- printf("\tbrgc7\t0x%08x @ 0x%08x, %5d count, %d extc, %8s\n",
- immr->im_brgc7,
- (uint)&(immr->im_brgc7),
- Daq_BRG_Get_Count(6),
- Daq_BRG_Get_ExtClk(6),
- Daq_BRG_Get_ExtClk_Description(6));
- }
-
-# ifdef RUN_SCLK_ON_BRG_INT
- mclk_divisor = Daq_BRG_Rate(MCLK_BRG) / Daq_BRG_Rate(SCLK_BRG);
-# else
- mclk_divisor = Daq_BRG_Get_Count(SCLK_BRG);
-# endif
-# ifdef RUN_LRCLK_ON_BRG_INT
- sclk_divisor = Daq_BRG_Rate(SCLK_BRG) / Daq_BRG_Rate(LRCLK_BRG);
-# else
- sclk_divisor = Daq_BRG_Get_Count(LRCLK_BRG);
-# endif
-
- printf("\nADC/DAC Clocking (%d/%d):\n", sclk_divisor, mclk_divisor);
- printf("\tMCLK %8d Hz, or %3dx SCLK, or %3dx LRCLK\n",
- Daq_BRG_Rate(MCLK_BRG),
- mclk_divisor,
- mclk_divisor * sclk_divisor);
-# ifdef RUN_SCLK_ON_BRG_INT
- printf("\tSCLK %8d Hz, or %3dx LRCLK\n",
- Daq_BRG_Rate(SCLK_BRG),
- sclk_divisor);
-# else
- printf("\tSCLK %8d Hz, or %3dx LRCLK\n",
- Daq_BRG_Rate(MCLK_BRG) / mclk_divisor,
- sclk_divisor);
-# endif
-# ifdef RUN_LRCLK_ON_BRG_INT
- printf("\tLRCLK %8d Hz\n",
- Daq_BRG_Rate(LRCLK_BRG));
-# else
-# ifdef RUN_SCLK_ON_BRG_INT
- printf("\tLRCLK %8d Hz\n",
- Daq_BRG_Rate(SCLK_BRG) / sclk_divisor);
-# else
- printf("\tLRCLK %8d Hz\n",
- Daq_BRG_Rate(MCLK_BRG) / (mclk_divisor * sclk_divisor));
-# endif
-# endif
- printf("\n");
-}
diff --git a/board/sacsng/clkinit.h b/board/sacsng/clkinit.h
deleted file mode 100644
index 011638f2fa..0000000000
--- a/board/sacsng/clkinit.h
+++ /dev/null
@@ -1,124 +0,0 @@
-/*
- * (C) Copyright 2002
- * Custom IDEAS, Inc. <www.cideas.com>
- * Jon Diekema <diekema@cideas.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef FALSE
-#define FALSE 0
-#define TRUE (!FALSE)
-#endif
-
-#define SLRCLK_EN_MASK 0x00040000 /* PA13 - SLRCLK_EN* */
-
-#define MIN_SAMPLE_RATE 4000 /* Minimum sample rate */
-#define MAX_128x_SAMPLE_RATE 43402 /* Maximum 128x sample rate */
-#define MAX_64x_SAMPLE_RATE 86805 /* Maximum 64x sample rate */
-
-#define KHZ ((uint)1000)
-#define MHZ ((uint)(1000 * KHZ))
-
-#define MCLK_BRG 3 /* MCLK, Master CLocK for the A/D & D/A */
-#define SCLK_BRG 7 /* SCLK, Sample CLocK for the A/D & D/A */
-#define LRCLK_BRG 5 /* LRCLK, L/R CLocK for the A/D & D/A */
- /* 0 == BRG1 (used for SMC1) */
- /* 1 == BRG2 (used for SMC2) */
- /* 2 == BRG3 (used for SCC1) */
- /* 3 == BRG4 (MCLK) */
- /* 4 == BRG5 */
- /* 5 == BRG6 (LRCLK) */
- /* 6 == BRG7 */
- /* 7 == BRG8 (SCLK) */
-
-#define MCLK_DIVISOR 4 /* SCLK = MCLK / MCLK_DIVISOR */
-#define SCLK_DIVISOR (Daq64xSampling ? 64 : 128)
- /* LRCLK = SCLK / SCLK_DIVISOR */
-
-#define TIGHTEN_UP_BRG_EN_TIMING /* Tighten up the BRG enable timing */
-#define RUN_SCLK_ON_BRG_INT /* Run SCLK on BRG_INT instead of MCLK */
- /* The 8260 (Mask B.3) seems to have */
- /* problems generating SCLK from MCLK */
- /* via CLK9. */
-#define RUN_LRCLK_ON_BRG_INT /* Run LRCLK on BRG_INT instead of SCLK */
- /* The 8260 (Mask B.3) seems to have */
- /* problems generating LRCLK from SCLK */
-
-#define NUM_LRCLKS_TO_STABILIZE 1 /* Number of LRCLK period (sample) */
- /* to wait for the clock to stabilize */
-
-#define CPM_CLK (gd->bd->bi_cpmfreq)
-#define DFBRG 4
-#define BRG_INT_CLK (CPM_CLK * 2 / DFBRG)
- /* BRG = CPM * 2 / DFBRG (Sect 9.8) */
- /* BRG = CPM * 2 / 4 */
- /* BRG = CPM / 2 */
-
-#define CPM_BRG_EXTC_MASK ((uint)0x0000C000)
-#define CPM_BRG_EXTC_SHIFT 14
-
-#define CPM_BRG_DIV16_MASK ((uint)0x00000001)
-#define CPM_BRG_DIV16_SHIFT 1
-
-#define CPM_BRG_EXTC_BRGCLK 0
-#define CPM_BRG_EXTC_CLK3 1
-#define CPM_BRG_EXTC_CLK9 CPM_BRG_EXTC_CLK3
-#define CPM_BRG_EXTC_CLK5 2
-#define CPM_BRG_EXTC_CLK15 CPM_BRG_EXTC_CLK5
-
-#define IM_BRGC1 ((uint *)0xf00119f0)
-#define IM_BRGC2 ((uint *)0xf00119f4)
-#define IM_BRGC3 ((uint *)0xf00119f8)
-#define IM_BRGC4 ((uint *)0xf00119fc)
-#define IM_BRGC5 ((uint *)0xf00115f0)
-#define IM_BRGC6 ((uint *)0xf00115f4)
-#define IM_BRGC7 ((uint *)0xf00115f8)
-#define IM_BRGC8 ((uint *)0xf00115fc)
-
-/*
- * External declarations
- */
-
-extern int Daq64xSampling;
-
-extern void Daq_BRG_Reset(uint brg);
-extern void Daq_BRG_Run(uint brg);
-
-extern void Daq_BRG_Disable(uint brg);
-extern void Daq_BRG_Enable(uint brg);
-
-extern uint Daq_BRG_Get_Div16(uint brg);
-extern void Daq_BRG_Set_Div16(uint brg, uint div16);
-
-extern uint Daq_BRG_Get_Count(uint brg);
-extern void Daq_BRG_Set_Count(uint brg, uint brg_cnt);
-
-extern uint Daq_BRG_Get_ExtClk(uint brg);
-extern char* Daq_BRG_Get_ExtClk_Description(uint brg);
-extern void Daq_BRG_Set_ExtClk(uint brg, uint extc);
-
-extern uint Daq_BRG_Rate(uint brg);
-
-extern uint Daq_Get_SampleRate(void);
-
-extern void Daq_Init_Clocks(int sample_rate, int sample_64x);
-extern void Daq_Stop_Clocks(void);
-extern void Daq_Start_Clocks(int sample_rate);
-extern void Daq_Display_Clocks(void);
diff --git a/board/sacsng/config.mk b/board/sacsng/config.mk
deleted file mode 100644
index 220b218a7d..0000000000
--- a/board/sacsng/config.mk
+++ /dev/null
@@ -1,34 +0,0 @@
-#
-# (C) Copyright 2000
-# Sysgo Real-Time Solutions, GmbH <www.elinos.com>
-# Marius Groeger <mgroeger@sysgo.de>
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# 82xx boards
-#
-
-TEXT_BASE = 0x40000000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
diff --git a/board/sacsng/flash.c b/board/sacsng/flash.c
deleted file mode 100644
index 52e01def5b..0000000000
--- a/board/sacsng/flash.c
+++ /dev/null
@@ -1,523 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <configs/sacsng.h>
-
-
-#undef DEBUG
-
-#ifndef CFG_ENV_ADDR
-#define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_ENV_OFFSET)
-#endif
-#ifndef CFG_ENV_SIZE
-#define CFG_ENV_SIZE CFG_ENV_SECT_SIZE
-#endif
-
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (vu_short *addr, flash_info_t *info);
-static int write_word (flash_info_t *info, ulong dest, ulong data);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- unsigned long size_b0, size_b1;
- int i;
-
- /* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- size_b0 = flash_get_size((vu_short *)CFG_FLASH0_BASE, &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size_b0, size_b0<<20);
- }
-
- size_b1 = flash_get_size((vu_short *)CFG_FLASH1_BASE, &flash_info[1]);
-
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
- /* monitor protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+monitor_flash_len-1,
- &flash_info[0]);
-#endif
-
-#ifdef CFG_ENV_IS_IN_FLASH
- /* ENV protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR+CFG_ENV_SIZE-1,
- &flash_info[0]);
-#endif
-
- if (size_b1) {
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
- /* monitor protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+monitor_flash_len-1,
- &flash_info[1]);
-#endif
-
-#ifdef CFG_ENV_IS_IN_FLASH
- /* ENV protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR+CFG_ENV_SIZE-1,
- &flash_info[1]);
-#endif
- } else {
- flash_info[1].flash_id = FLASH_UNKNOWN;
- flash_info[1].sector_count = -1;
- }
-
- flash_info[0].size = size_b0;
- flash_info[1].size = size_b1;
-
- /*
- * We only report the primary flash for U-Boot's use.
- */
- return (size_b0);
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD: printf ("AMD "); break;
- case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
- default: printf ("Unknown Vendor "); break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM400B: printf ("AM29LV400B (4 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM400T: printf ("AM29LV400T (4 Mbit, top boot sector)\n");
- break;
- case FLASH_AM800B: printf ("AM29LV800B (8 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM800T: printf ("AM29LV800T (8 Mbit, top boot sector)\n");
- break;
- case FLASH_AM160B: printf ("AM29LV160B (16 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM160T: printf ("AM29LV160T (16 Mbit, top boot sector)\n");
- break;
- case FLASH_AM320B: printf ("AM29LV320B (32 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM320T: printf ("AM29LV320T (32 Mbit, top boot sector)\n");
- break;
- default: printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " "
- );
- }
- printf ("\n");
- return;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-
-static ulong flash_get_size (vu_short *addr, flash_info_t *info)
-{
- short i;
- ushort value;
- ulong base = (ulong)addr;
-
- /* Write auto select command: read Manufacturer ID */
- addr[0x0555] = 0xAAAA;
- addr[0x02AA] = 0x5555;
- addr[0x0555] = 0x9090;
- __asm__ __volatile__(" sync\n ");
-
- value = addr[0];
-#ifdef DEBUG
- printf("Flash manufacturer 0x%04X\n", value);
-#endif
-
- if(value == (ushort)AMD_MANUFACT) {
- info->flash_id = FLASH_MAN_AMD;
- } else if (value == (ushort)FUJ_MANUFACT) {
- info->flash_id = FLASH_MAN_FUJ;
- } else {
-#ifdef DEBUG
- printf("Unknown flash manufacturer 0x%04X\n", value);
-#endif
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- return (0); /* no or unknown flash */
- }
-
- value = addr[1]; /* device ID */
-#ifdef DEBUG
- printf("Flash type 0x%04X\n", value);
-#endif
-
- if(value == (ushort)AMD_ID_LV400T) {
- info->flash_id += FLASH_AM400T;
- info->sector_count = 11;
- info->size = 0x00080000; /* => 0.5 MB */
- } else if(value == (ushort)AMD_ID_LV400B) {
- info->flash_id += FLASH_AM400B;
- info->sector_count = 11;
- info->size = 0x00080000; /* => 0.5 MB */
- } else if(value == (ushort)AMD_ID_LV800T) {
- info->flash_id += FLASH_AM800T;
- info->sector_count = 19;
- info->size = 0x00100000; /* => 1 MB */
- } else if(value == (ushort)AMD_ID_LV800B) {
- info->flash_id += FLASH_AM800B;
- info->sector_count = 19;
- info->size = 0x00100000; /* => 1 MB */
- } else if(value == (ushort)AMD_ID_LV160T) {
- info->flash_id += FLASH_AM160T;
- info->sector_count = 35;
- info->size = 0x00200000; /* => 2 MB */
- } else if(value == (ushort)AMD_ID_LV160B) {
- info->flash_id += FLASH_AM160B;
- info->sector_count = 35;
- info->size = 0x00200000; /* => 2 MB */
- } else if(value == (ushort)AMD_ID_LV320T) {
- info->flash_id += FLASH_AM320T;
- info->sector_count = 67;
- info->size = 0x00400000; /* => 4 MB */
- } else if(value == (ushort)AMD_ID_LV320B) {
- info->flash_id += FLASH_AM320B;
- info->sector_count = 67;
- info->size = 0x00400000; /* => 4 MB */
- } else {
-#ifdef DEBUG
- printf("Unknown flash type 0x%04X\n", value);
- info->size = CFG_FLASH_SIZE;
-#else
- info->flash_id = FLASH_UNKNOWN;
- return (0); /* => no or unknown flash */
-#endif
- }
-
- /* set up sector start address table */
- if (info->flash_id & FLASH_BTYPE) {
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00004000;
- info->start[2] = base + 0x00006000;
- info->start[3] = base + 0x00008000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] = base + ((i - 3) * 0x00010000);
- }
- } else {
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- info->start[i--] = base + info->size - 0x00004000;
- info->start[i--] = base + info->size - 0x00006000;
- info->start[i--] = base + info->size - 0x00008000;
- for (; i >= 0; i--) {
- info->start[i] = base + (i * 0x00010000);
- }
- }
-
- /* check for protected sectors */
- for (i = 0; i < info->sector_count; i++) {
- /* read sector protection at sector address, (A7 .. A0) = 0x02 */
- /* D0 = 1 if protected */
- addr = (volatile unsigned short *)(info->start[i]);
- info->protect[i] = addr[2] & 1;
- }
-
- /*
- * Prevent writes to uninitialized FLASH.
- */
- if (info->flash_id != FLASH_UNKNOWN) {
- addr = (volatile unsigned short *)info->start[0];
-
- }
-
- addr[0] = 0xF0F0; /* reset bank */
- __asm__ __volatile__(" sync\n ");
- return (info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- vu_short *addr = (vu_short*)(info->start[0]);
- int flag, prot, sect, l_sect;
- ulong start, now, last;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- if ((info->flash_id == FLASH_UNKNOWN) ||
- (info->flash_id > FLASH_AMD_COMP)) {
- printf ("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- l_sect = -1;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[0x0555] = 0xAAAA;
- addr[0x02AA] = 0x5555;
- addr[0x0555] = 0x8080;
- addr[0x0555] = 0xAAAA;
- addr[0x02AA] = 0x5555;
- __asm__ __volatile__(" sync\n ");
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr = (vu_short*)(info->start[sect]);
- addr[0] = 0x3030;
- l_sect = sect;
- }
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- /*
- * We wait for the last triggered sector
- */
- if (l_sect < 0)
- goto DONE;
-
- start = get_timer (0);
- last = start;
- addr = (vu_short*)(info->start[l_sect]);
- while ((addr[0] & 0x0080) != 0x0080) {
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- addr[0] = 0xF0F0; /* reset bank */
- __asm__ __volatile__(" sync\n ");
- return 1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- }
-
-DONE:
- /* reset to read mode */
- addr = (vu_short*)info->start[0];
- addr[0] = 0xF0F0; /* reset bank */
- __asm__ __volatile__(" sync\n ");
-
- printf (" done\n");
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int i, l, rc;
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
- for (; i<4 && cnt>0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = 0;
- for (i=0; i<4; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- return (write_word(info, wp, data));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word (flash_info_t *info, ulong dest, ulong data)
-{
- vu_short *addr = (vu_short*)(info->start[0]);
- ulong start;
- int flag;
- int j;
-
- /* Check if Flash is (sufficiently) erased */
- if (((*(vu_long *)dest) & data) != data) {
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- /* The original routine was designed to write 32 bit words to
- * 32 bit wide memory. We have 16 bit wide memory so we do
- * two writes. We write the LSB first at dest+2 and then the
- * MSB at dest (lousy big endian).
- */
- dest += 2;
- for(j = 0; j < 2; j++) {
- addr[0x0555] = 0xAAAA;
- addr[0x02AA] = 0x5555;
- addr[0x0555] = 0xA0A0;
- __asm__ __volatile__(" sync\n ");
-
- *((vu_short *)dest) = (ushort)data;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* data polling for D7 */
- start = get_timer (0);
- while (*(vu_short *)dest != (ushort)data) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- return (1);
- }
- }
- dest -= 2;
- data >>= 16;
- }
- return (0);
-}
-
-/*-----------------------------------------------------------------------
- */
diff --git a/board/sacsng/ioconfig.h b/board/sacsng/ioconfig.h
deleted file mode 100644
index be1ce7c835..0000000000
--- a/board/sacsng/ioconfig.h
+++ /dev/null
@@ -1,217 +0,0 @@
-/*
- * I/O Port configuration table
- *
- * If conf is 1, then that port pin will be configured at boot time
- * according to the five values podr/pdir/ppar/psor/pdat for that entry
- */
-
-#ifdef SKIP
-#undef SKIP
-#endif
-
-#ifdef CONF
-#undef CONF
-#endif
-
-#ifdef DIN
-#undef DIN
-#endif
-
-#ifdef DOUT
-#undef DOUT
-#endif
-
-#ifdef GPIO
-#undef GPIO
-#endif
-
-#ifdef SPEC
-#undef SPEC
-#endif
-
-#ifdef ACTV
-#undef ACTV
-#endif
-
-#ifdef OPEN
-#undef OPEN
-#endif
-
-#define SKIP 0 /* SKIP over this port */
-#define CONF 1 /* CONFiguration the port */
-
-#define DIN 0 /* PDIRx 0: Direction IN */
-#define DOUT 1 /* PDIRx 1: Direction OUT */
-
-#define GPIO 0 /* PPARx 0: General Purpose I/O */
-#define SPEC 1 /* PPARx 1: dedicated to a peripheral function, */
- /* i.e. the port has a SPECial use. */
-
-#define ACTV 0 /* PODRx 0: ACTiVely driven as an output */
-#define OPEN 1 /* PODRx 1: OPEN-drain driver */
-
-const iop_conf_t iop_conf_tab[4][32] = {
-
- /* Port A configuration */
- { /* conf ppar psor pdir podr pdat */
- /* PA31 */ { CONF, GPIO, 0, DOUT, ACTV, 1 }, /* RODIS8* */
- /* PA30 */ { CONF, GPIO, 0, DOUT, ACTV, 1 }, /* RODIS7* */
- /* PA29 */ { CONF, GPIO, 0, DOUT, ACTV, 1 }, /* RODIS6* */
- /* PA28 */ { CONF, GPIO, 0, DOUT, ACTV, 1 }, /* RODIS5* */
- /* PA27 */ { CONF, GPIO, 0, DOUT, ACTV, 1 }, /* RODIS4* */
- /* PA26 */ { CONF, GPIO, 0, DOUT, ACTV, 1 }, /* RODIS3* */
- /* PA25 */ { CONF, GPIO, 0, DOUT, ACTV, 1 }, /* RODIS2* */
- /* PA24 */ { CONF, GPIO, 0, DOUT, ACTV, 1 }, /* RODIS1* */
- /* PA23 */ { CONF, GPIO, 0, DOUT, ACTV, 1 }, /* ODIS_EN* */
- /* PA22 */ { CONF, GPIO, 0, DOUT, ACTV, 1 }, /* STLED2_EN* */
- /* PA21 */ { CONF, GPIO, 0, DOUT, ACTV, 1 }, /* STLED1_EN* */
- /* PA20 */ { CONF, GPIO, 0, DOUT, ACTV, 1 }, /* PLED3_EN* */
- /* PA19 */ { CONF, GPIO, 0, DOUT, ACTV, 1 }, /* PLED2_EN* */
- /* PA18 */ { CONF, GPIO, 0, DOUT, ACTV, 0 }, /* PLED1_EN* */
- /* PA17 */ { CONF, GPIO, 0, DOUT, ACTV, 0 }, /* N/C */
- /* PA16 */ { CONF, GPIO, 0, DOUT, ACTV, 0 }, /* DAC_RST* */
- /* PA15 */ { CONF, GPIO, 0, DOUT, ACTV, 1 }, /* CH34SDATA_PU */
- /* PA14 */ { CONF, GPIO, 0, DOUT, ACTV, 1 }, /* CH12SDATA_PU */
- /* PA13 */ { CONF, GPIO, 0, DOUT, ACTV, 1 }, /* SLRCLK_EN* */
- /* PA12 */ { CONF, GPIO, 0, DOUT, ACTV, 1 }, /* MTRX_4ACDC* */
- /* PA11 */ { CONF, GPIO, 0, DOUT, ACTV, 1 }, /* MTRX_4TEDS* */
- /* PA10 */ { CONF, GPIO, 0, DOUT, ACTV, 1 }, /* MTRX_4XTDS* */
- /* PA9 */ { CONF, GPIO, 0, DOUT, ACTV, 1 }, /* MTRX_3ACDC* */
- /* PA8 */ { CONF, GPIO, 0, DOUT, ACTV, 1 }, /* MTRX_3TEDS* */
- /* PA7 */ { CONF, GPIO, 0, DOUT, ACTV, 1 }, /* MTRX_3XTDS* */
- /* PA6 */ { CONF, GPIO, 0, DOUT, ACTV, 1 }, /* MTRX_2ACDC* */
- /* PA5 */ { CONF, GPIO, 0, DOUT, ACTV, 1 }, /* MTRX_2TEDS* */
- /* PA4 */ { CONF, GPIO, 0, DOUT, ACTV, 1 }, /* MTRX_2XTDS* */
- /* PA3 */ { CONF, GPIO, 0, DOUT, ACTV, 0 }, /* N/C */
- /* PA2 */ { CONF, GPIO, 0, DOUT, ACTV, 1 }, /* MTRX_1ACDC* */
- /* PA1 */ { CONF, GPIO, 0, DOUT, ACTV, 1 }, /* MTRX_1TEDS* */
- /* PA0 */ { CONF, GPIO, 0, DOUT, ACTV, 1 } /* MTRX_1XTDS* */
- },
-
- /* Port B configuration */
- { /* conf ppar psor pdir podr pdat */
- /* PB31 */ { CONF, SPEC, 0, DOUT, ACTV, 0 }, /* FCC2 MII_TX_ER */
- /* PB30 */ { CONF, SPEC, 0, DIN, ACTV, 0 }, /* FCC2 MII_RX_DV */
- /* PB29 */ { CONF, SPEC, 1, DOUT, ACTV, 0 }, /* FCC2 MII_TX_EN */
- /* PB28 */ { CONF, SPEC, 0, DIN, ACTV, 0 }, /* FCC2 MII_RX_ER */
- /* PB27 */ { CONF, SPEC, 0, DIN, ACTV, 0 }, /* FCC2 MII_COL */
- /* PB26 */ { CONF, SPEC, 0, DIN, ACTV, 0 }, /* FCC2 MII_CRS */
- /* PB25 */ { CONF, SPEC, 0, DOUT, ACTV, 0 }, /* FCC2 MII_TXD3 */
- /* PB24 */ { CONF, SPEC, 0, DOUT, ACTV, 0 }, /* FCC2 MII_TXD2 */
- /* PB23 */ { CONF, SPEC, 0, DOUT, ACTV, 0 }, /* FCC2 MII_TXD1 */
- /* PB22 */ { CONF, SPEC, 0, DOUT, ACTV, 0 }, /* FCC2 MII_TXD0 */
- /* PB21 */ { CONF, SPEC, 0, DIN, ACTV, 0 }, /* FCC2 MII_RXD0 */
- /* PB20 */ { CONF, SPEC, 0, DIN, ACTV, 0 }, /* FCC2 MII_RXD1 */
- /* PB19 */ { CONF, SPEC, 0, DIN, ACTV, 0 }, /* FCC2 MII_RXD2 */
- /* PB18 */ { CONF, SPEC, 0, DIN, ACTV, 0 }, /* FCC2 MII_RXD3 */
- /* PB17 */ { CONF, GPIO, 0, DOUT, ACTV, 0 }, /* N/C */
- /* PB16 */ { CONF, GPIO, 0, DOUT, ACTV, 0 }, /* N/C */
- /* PB15 */ { CONF, GPIO, 0, DOUT, ACTV, 0 }, /* N/C */
- /* PB14 */ { CONF, SPEC, 1, DIN, ACTV, 0 }, /* L1RXDC1, BSDATA_ADC12 */
- /* PB13 */ { CONF, GPIO, 0, DOUT, ACTV, 0 }, /* N/C */
- /* PB12 */ { CONF, SPEC, 1, DIN, ACTV, 0 }, /* L1RSYNCC1, LRCLK */
- /* PB11 */ { CONF, SPEC, 1, DIN, ACTV, 0 }, /* L1TXDD1, RSDATA_DAC12 */
- /* PB10 */ { CONF, SPEC, 1, DIN, ACTV, 0 }, /* L1RXDD1, BSDATA_ADC34 */
- /* PB9 */ { CONF, GPIO, 0, DOUT, ACTV, 0 }, /* N/C */
- /* PB8 */ { CONF, SPEC, 1, DIN, ACTV, 0 }, /* L1RSYNCD1, LRCLK */
- /* PB7 */ { CONF, GPIO, 0, DOUT, ACTV, 0 }, /* N/C */
- /* PB6 */ { CONF, GPIO, 0, DOUT, ACTV, 1 }, /* XCITE_SHDN */
- /* PB5 */ { CONF, GPIO, 0, DOUT, ACTV, 1 }, /* TRIGGER */
- /* PB4 */ { CONF, GPIO, 0, DOUT, ACTV, 0 }, /* ARM */
- /* PB3 */ { SKIP, GPIO, 0, DIN, ACTV, 0 }, /* pin doesn't exist */
- /* PB2 */ { SKIP, GPIO, 0, DIN, ACTV, 0 }, /* pin doesn't exist */
- /* PB1 */ { SKIP, GPIO, 0, DIN, ACTV, 0 }, /* pin doesn't exist */
- /* PB0 */ { SKIP, GPIO, 0, DIN, ACTV, 0 } /* pin doesn't exist */
- },
-
- /* Port C */
- { /* conf ppar psor pdir podr pdat */
- /* PC31 */ { CONF, GPIO, 0, DOUT, ACTV, 0 }, /* N/C */
- /* PC30 */ { CONF, GPIO, 0, DOUT, ACTV, 0 }, /* N/C */
- /* PC29 */ { CONF, SPEC, 0, DIN, ACTV, 0 }, /* CLK3, MCLK */
- /* PC28 */ { CONF, GPIO, 0, DOUT, ACTV, 0 }, /* TOUT2* */
-#ifdef QQQ
- /* PC28 */ { CONF, SPEC, 0, DOUT, ACTV, 0 }, /* TOUT2* */
-#endif
- /* PC27 */ { CONF, SPEC, 0, DIN, ACTV, 0 }, /* CLK5, SCLK */
- /* PC26 */ { CONF, GPIO, 0, DOUT, ACTV, 0 }, /* N/C */
- /* PC25 */ { CONF, SPEC, 0, DIN, ACTV, 0 }, /* CLK7, SCLK */
- /* PC24 */ { CONF, GPIO, 0, DOUT, ACTV, 0 }, /* N/C */
- /* PC23 */ { CONF, SPEC, 0, DIN, ACTV, 0 }, /* CLK9, MCLK */
- /* PC22 */ { CONF, GPIO, 0, DOUT, ACTV, 0 }, /* N/C */
- /* PC21 */ { CONF, SPEC, 0, DOUT, ACTV, 0 }, /* BRGO6 (LRCLK) */
- /* PC20 */ { CONF, GPIO, 0, DOUT, ACTV, 0 }, /* N/C */
- /* PC19 */ { CONF, SPEC, 0, DIN, ACTV, 0 }, /* CLK13, MII_RXCLK */
- /* PC18 */ { CONF, SPEC, 0, DIN, ACTV, 0 }, /* CLK14, MII_TXCLK */
- /* PC17 */ { CONF, SPEC, 0, DOUT, ACTV, 0 }, /* BRGO8 (SCLK) */
- /* PC16 */ { CONF, GPIO, 0, DOUT, ACTV, 0 }, /* N/C */
- /* PC15 */ { CONF, SPEC, 0, DOUT, ACTV, 0 }, /* SMC2_TX */
- /* PC14 */ { CONF, GPIO, 0, DOUT, ACTV, 0 }, /* N/C */
- /* PC13 */ { CONF, GPIO, 0, DOUT, ACTV, 0 }, /* N/C */
- /* PC12 */ { CONF, SPEC, 0, DOUT, ACTV, 0 }, /* TDM_STRB3 */
- /* PC11 */ { CONF, GPIO, 0, DOUT, ACTV, 0 }, /* N/C */
- /* PC10 */ { CONF, SPEC, 1, DOUT, ACTV, 0 }, /* TDM_STRB4 */
- /* PC9 */ { CONF, GPIO, 0, DIN, ACTV, 0 }, /* BPDIS_IN3 */
- /* PC8 */ { CONF, GPIO, 0, DIN, ACTV, 0 }, /* BPDIS_IN2 */
- /* PC7 */ { CONF, GPIO, 0, DIN, ACTV, 0 }, /* BPDIS_IN1 */
- /* PC6 */ { CONF, GPIO, 0, DOUT, ACTV, 0 }, /* N/C */
- /* PC5 */ { CONF, GPIO, 0, DIN, ACTV, 0 }, /* BTST_IN2* */
- /* PC4 */ { CONF, GPIO, 0, DIN, ACTV, 0 }, /* BTST_IN1* */
- /* PC3 */ { CONF, GPIO, 0, DIN, ACTV, 0 }, /* MUSH_STAT */
- /* PC2 */ { CONF, GPIO, 0, DIN, ACTV, 0 }, /* OUTDRV_STAT */
- /* PC1 */ { CONF, GPIO, 0, DOUT, OPEN, 1 }, /* PHY_MDIO */
- /* PC0 */ { CONF, GPIO, 0, DOUT, ACTV, 1 }, /* PHY_MDC */
- },
-
- /* Port D */
- { /* conf ppar psor pdir podr pdat */
- /* PD31 */ { CONF, SPEC, 0, DIN, ACTV, 0 }, /* SCC1_RX */
- /* PD30 */ { CONF, SPEC, 1, DOUT, ACTV, 0 }, /* SCC1_TX */
- /* PD29 */ { CONF, GPIO, 0, DOUT, ACTV, 0 }, /* N/C */
- /* PD28 */ { CONF, GPIO, 0, DOUT, ACTV, 0 }, /* N/C */
- /* PD27 */ { CONF, GPIO, 0, DOUT, ACTV, 0 }, /* N/C */
- /* PD26 */ { CONF, GPIO, 0, DOUT, ACTV, 0 }, /* N/C */
- /* PD25 */ { CONF, GPIO, 0, DOUT, ACTV, 0 }, /* N/C */
- /* PD24 */ { CONF, GPIO, 0, DOUT, ACTV, 0 }, /* N/C */
- /* PD23 */ { CONF, GPIO, 0, DOUT, ACTV, 0 }, /* N/C */
- /* PD22 */ { CONF, GPIO, 0, DOUT, ACTV, 0 }, /* N/C */
- /* PD21 */ { CONF, GPIO, 0, DOUT, ACTV, 0 }, /* N/C */
- /* PD20 */ { CONF, GPIO, 0, DOUT, ACTV, 1 }, /* SPI_ADC_CS* */
- /* PD19 */ { CONF, GPIO, 0, DOUT, ACTV, 1 }, /* SPI_DAC_CS* */
-#if defined(CONFIG_SOFT_SPI)
- /* PD18 */ { CONF, GPIO, 0, DOUT, ACTV, 0 }, /* SPI_CLK */
- /* PD17 */ { CONF, GPIO, 0, DOUT, ACTV, 0 }, /* SPI_MOSI */
- /* PD16 */ { CONF, GPIO, 0, DIN, ACTV, 0 }, /* SPI_MISO */
-#else
- /* PD18 */ { CONF, SPEC, 1, DOUT, ACTV, 0 }, /* SPI_CLK */
- /* PD17 */ { CONF, SPEC, 1, DOUT, ACTV, 0 }, /* SPI_MOSI */
- /* PD16 */ { CONF, SPEC, 1, DIN, ACTV, 0 }, /* SPI_MISO */
-#endif
-#if defined(CONFIG_SOFT_I2C)
- /* PD15 */ { CONF, GPIO, 0, DOUT, OPEN, 1 }, /* I2C_SDA */
- /* PD14 */ { CONF, GPIO, 0, DOUT, ACTV, 1 }, /* I2C_SCL */
-#else
-#if defined(CONFIG_HARD_I2C)
- /* PD15 */ { CONF, SPEC, 1, DIN, OPEN, 0 }, /* I2C_SDA */
- /* PD14 */ { CONF, SPEC, 1, DIN, OPEN, 0 }, /* I2C_SCL */
-#else /* normal I/O port pins */
- /* PD15 */ { CONF, GPIO, 0, DOUT, ACTV, 0 }, /* I2C_SDA */
- /* PD14 */ { CONF, GPIO, 0, DOUT, ACTV, 0 }, /* I2C_SCL */
-#endif
-#endif
- /* PD13 */ { CONF, SPEC, 0, DOUT, ACTV, 0 }, /* TDM_STRB1 */
- /* PD12 */ { CONF, SPEC, 0, DOUT, ACTV, 0 }, /* TDM_STRB2 */
- /* PD11 */ { CONF, GPIO, 0, DOUT, ACTV, 0 }, /* N/C */
- /* PD10 */ { CONF, SPEC, 1, DOUT, ACTV, 0 }, /* BRGO4 (MCLK) */
- /* PD9 */ { CONF, SPEC, 0, DOUT, ACTV, 0 }, /* SMC1_TX */
- /* PD8 */ { CONF, SPEC, 0, DIN, ACTV, 0 }, /* SMC1_RX */
- /* PD7 */ { CONF, GPIO, 0, DOUT, ACTV, 1 }, /* N/C */
- /* PD6 */ { CONF, GPIO, 0, DOUT, ACTV, 1 }, /* N/C */
- /* PD5 */ { CONF, GPIO, 0, DOUT, ACTV, 1 }, /* N/C */
- /* PD4 */ { CONF, SPEC, 1, DOUT, ACTV, 1 }, /* SMC2_RX */
- /* PD3 */ { SKIP, GPIO, 0, DIN, ACTV, 0 }, /* pin doesn't exist */
- /* PD2 */ { SKIP, GPIO, 0, DIN, ACTV, 0 }, /* pin doesn't exist */
- /* PD1 */ { SKIP, GPIO, 0, DIN, ACTV, 0 }, /* pin doesn't exist */
- /* PD0 */ { SKIP, GPIO, 0, DIN, ACTV, 0 } /* pin doesn't exist */
- }
-};
diff --git a/board/sacsng/sacsng.c b/board/sacsng/sacsng.c
deleted file mode 100644
index e50b747923..0000000000
--- a/board/sacsng/sacsng.c
+++ /dev/null
@@ -1,890 +0,0 @@
-/*
- * (C) Copyright 2002
- * Custom IDEAS, Inc. <www.cideas.com>
- * Gerald Van Baren <vanbaren@cideas.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <asm/u-boot.h>
-#include <common.h>
-#include <ioports.h>
-#include <mpc8260.h>
-#include <i2c.h>
-#include <spi.h>
-#include <command.h>
-
-#ifdef CONFIG_SHOW_BOOT_PROGRESS
-#include <status_led.h>
-#endif
-
-#ifdef CONFIG_ETHER_LOOPBACK_TEST
-extern void eth_loopback_test(void);
-#endif /* CONFIG_ETHER_LOOPBACK_TEST */
-
-extern int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
-
-#include "clkinit.h"
-#include "ioconfig.h" /* I/O configuration table */
-
-/*
- * PBI Page Based Interleaving
- * PSDMR_PBI page based interleaving
- * 0 bank based interleaving
- * External Address Multiplexing (EAMUX) adds a clock to address cycles
- * (this can help with marginal board layouts)
- * PSDMR_EAMUX adds a clock
- * 0 no extra clock
- * Buffer Command (BUFCMD) adds a clock to command cycles.
- * PSDMR_BUFCMD adds a clock
- * 0 no extra clock
- */
-#define CONFIG_PBI PSDMR_PBI
-#define PESSIMISTIC_SDRAM 0
-#define EAMUX 0 /* EST requires EAMUX */
-#define BUFCMD 0
-
-/*
- * ADC/DAC Defines:
- */
-#define INITIAL_SAMPLE_RATE 10016 /* Initial Daq sample rate */
-#define INITIAL_RIGHT_JUST 0 /* Initial DAC right justification */
-#define INITIAL_MCLK_DIVIDE 0 /* Initial MCLK Divide */
-#define INITIAL_SAMPLE_64X 1 /* Initial 64x clocking mode */
-#define INITIAL_SAMPLE_128X 0 /* Initial 128x clocking mode */
-
-/*
- * ADC Defines:
- */
-#define I2C_ADC_1_ADDR 0x0E /* I2C Address of the ADC #1 */
-#define I2C_ADC_2_ADDR 0x0F /* I2C Address of the ADC #2 */
-
-#define ADC_SDATA1_MASK 0x00020000 /* PA14 - CH12SDATA_PU */
-#define ADC_SDATA2_MASK 0x00010000 /* PA15 - CH34SDATA_PU */
-
-#define ADC_VREF_CAP 100 /* VREF capacitor in uF */
-#define ADC_INITIAL_DELAY (10 * ADC_VREF_CAP) /* 10 usec per uF, in usec */
-#define ADC_SDATA_DELAY 100 /* ADC SDATA release delay in usec */
-#define ADC_CAL_DELAY (1000000 / INITIAL_SAMPLE_RATE * 4500)
- /* Wait at least 4100 LRCLK's */
-
-#define ADC_REG1_FRAME_START 0x80 /* Frame start */
-#define ADC_REG1_GROUND_CAL 0x40 /* Ground calibration enable */
-#define ADC_REG1_ANA_MOD_PDOWN 0x20 /* Analog modulator section in power down */
-#define ADC_REG1_DIG_MOD_PDOWN 0x10 /* Digital modulator section in power down */
-
-#define ADC_REG2_128x 0x80 /* Oversample at 128x */
-#define ADC_REG2_CAL 0x40 /* System calibration enable */
-#define ADC_REG2_CHANGE_SIGN 0x20 /* Change sign enable */
-#define ADC_REG2_LR_DISABLE 0x10 /* Left/Right output disable */
-#define ADC_REG2_HIGH_PASS_DIS 0x08 /* High pass filter disable */
-#define ADC_REG2_SLAVE_MODE 0x04 /* Slave mode */
-#define ADC_REG2_DFS 0x02 /* Digital format select */
-#define ADC_REG2_MUTE 0x01 /* Mute */
-
-#define ADC_REG7_ADDR_ENABLE 0x80 /* Address enable */
-#define ADC_REG7_PEAK_ENABLE 0x40 /* Peak enable */
-#define ADC_REG7_PEAK_UPDATE 0x20 /* Peak update */
-#define ADC_REG7_PEAK_FORMAT 0x10 /* Peak display format */
-#define ADC_REG7_DIG_FILT_PDOWN 0x04 /* Digital filter power down enable */
-#define ADC_REG7_FIR2_IN_EN 0x02 /* External FIR2 input enable */
-#define ADC_REG7_PSYCHO_EN 0x01 /* External pyscho filter input enable */
-
-/*
- * DAC Defines:
- */
-
-#define I2C_DAC_ADDR 0x11 /* I2C Address of the DAC */
-
-#define DAC_RST_MASK 0x00008000 /* PA16 - DAC_RST* */
-#define DAC_RESET_DELAY 100 /* DAC reset delay in usec */
-#define DAC_INITIAL_DELAY 5000 /* DAC initialization delay in usec */
-
-#define DAC_REG1_AMUTE 0x80 /* Auto-mute */
-
-#define DAC_REG1_LEFT_JUST_24_BIT (0 << 4) /* Fmt 0: Left justified 24 bit */
-#define DAC_REG1_I2S_24_BIT (1 << 4) /* Fmt 1: I2S up to 24 bit */
-#define DAC_REG1_RIGHT_JUST_16BIT (2 << 4) /* Fmt 2: Right justified 16 bit */
-#define DAC_REG1_RIGHT_JUST_24BIT (3 << 4) /* Fmt 3: Right justified 24 bit */
-#define DAC_REG1_RIGHT_JUST_20BIT (4 << 4) /* Fmt 4: Right justified 20 bit */
-#define DAC_REG1_RIGHT_JUST_18BIT (5 << 4) /* Fmt 5: Right justified 18 bit */
-
-#define DAC_REG1_DEM_NO (0 << 2) /* No De-emphasis */
-#define DAC_REG1_DEM_44KHZ (1 << 2) /* 44.1KHz De-emphasis */
-#define DAC_REG1_DEM_48KHZ (2 << 2) /* 48KHz De-emphasis */
-#define DAC_REG1_DEM_32KHZ (3 << 2) /* 32KHz De-emphasis */
-
-#define DAC_REG1_SINGLE 0 /* 4- 50KHz sample rate */
-#define DAC_REG1_DOUBLE 1 /* 50-100KHz sample rate */
-#define DAC_REG1_QUAD 2 /* 100-200KHz sample rate */
-#define DAC_REG1_DSD 3 /* Direct Stream Data, DSD */
-
-#define DAC_REG5_INVERT_A 0x80 /* Invert channel A */
-#define DAC_REG5_INVERT_B 0x40 /* Invert channel B */
-#define DAC_REG5_I2C_MODE 0x20 /* Control port (I2C) mode */
-#define DAC_REG5_POWER_DOWN 0x10 /* Power down mode */
-#define DAC_REG5_MUTEC_A_B 0x08 /* Mutec A=B */
-#define DAC_REG5_FREEZE 0x04 /* Freeze */
-#define DAC_REG5_MCLK_DIV 0x02 /* MCLK divide by 2 */
-#define DAC_REG5_RESERVED 0x01 /* Reserved */
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Check Board Identity:
- */
-
-int checkboard(void)
-{
- printf ("SACSng\n");
-
- return 0;
-}
-
-/* ------------------------------------------------------------------------- */
-
-long int initdram(int board_type)
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile memctl8260_t *memctl = &immap->im_memctl;
- volatile uchar c = 0;
- volatile uchar *ramaddr = (uchar *)(CFG_SDRAM_BASE + 0x8);
- uint psdmr = CFG_PSDMR;
- int i;
- uint psrt = 14; /* for no SPD */
- uint chipselects = 1; /* for no SPD */
- uint sdram_size = CFG_SDRAM0_SIZE * 1024 * 1024; /* for no SPD */
- uint or = CFG_OR2_PRELIM; /* for no SPD */
-#ifdef SDRAM_SPD_ADDR
- uint data_width;
- uint rows;
- uint banks;
- uint cols;
- uint caslatency;
- uint width;
- uint rowst;
- uint sdam;
- uint bsma;
- uint sda10;
- u_char spd_size;
- u_char data;
- u_char cksum;
- int j;
-#endif
-
-#ifdef SDRAM_SPD_ADDR
- /* Keep the compiler from complaining about potentially uninitialized vars */
- data_width = chipselects = rows = banks = cols = caslatency = psrt = 0;
-
- /*
- * Read the SDRAM SPD EEPROM via I2C.
- */
- i2c_read(SDRAM_SPD_ADDR, 0, 1, &data, 1);
- spd_size = data;
- cksum = data;
- for(j = 1; j < 64; j++) { /* read only the checksummed bytes */
- /* note: the I2C address autoincrements when alen == 0 */
- i2c_read(SDRAM_SPD_ADDR, 0, 0, &data, 1);
- if(j == 5) chipselects = data & 0x0F;
- else if(j == 6) data_width = data;
- else if(j == 7) data_width |= data << 8;
- else if(j == 3) rows = data & 0x0F;
- else if(j == 4) cols = data & 0x0F;
- else if(j == 12) {
- /*
- * Refresh rate: this assumes the prescaler is set to
- * approximately 1uSec per tick.
- */
- switch(data & 0x7F) {
- default:
- case 0: psrt = 14 ; /* 15.625uS */ break;
- case 1: psrt = 2; /* 3.9uS */ break;
- case 2: psrt = 6; /* 7.8uS */ break;
- case 3: psrt = 29; /* 31.3uS */ break;
- case 4: psrt = 60; /* 62.5uS */ break;
- case 5: psrt = 120; /* 125uS */ break;
- }
- }
- else if(j == 17) banks = data;
- else if(j == 18) {
- caslatency = 3; /* default CL */
-#if(PESSIMISTIC_SDRAM)
- if((data & 0x04) != 0) caslatency = 3;
- else if((data & 0x02) != 0) caslatency = 2;
- else if((data & 0x01) != 0) caslatency = 1;
-#else
- if((data & 0x01) != 0) caslatency = 1;
- else if((data & 0x02) != 0) caslatency = 2;
- else if((data & 0x04) != 0) caslatency = 3;
-#endif
- else {
- printf ("WARNING: Unknown CAS latency 0x%02X, using 3\n",
- data);
- }
- }
- else if(j == 63) {
- if(data != cksum) {
- printf ("WARNING: Configuration data checksum failure:"
- " is 0x%02x, calculated 0x%02x\n",
- data, cksum);
- }
- }
- cksum += data;
- }
-
- /* We don't trust CL less than 2 (only saw it on an old 16MByte DIMM) */
- if(caslatency < 2) {
- printf("WARNING: CL was %d, forcing to 2\n", caslatency);
- caslatency = 2;
- }
- if(rows > 14) {
- printf("WARNING: This doesn't look good, rows = %d, should be <= 14\n", rows);
- rows = 14;
- }
- if(cols > 11) {
- printf("WARNING: This doesn't look good, columns = %d, should be <= 11\n", cols);
- cols = 11;
- }
-
- if((data_width != 64) && (data_width != 72))
- {
- printf("WARNING: SDRAM width unsupported, is %d, expected 64 or 72.\n",
- data_width);
- }
- width = 3; /* 2^3 = 8 bytes = 64 bits wide */
- /*
- * Convert banks into log2(banks)
- */
- if (banks == 2) banks = 1;
- else if(banks == 4) banks = 2;
- else if(banks == 8) banks = 3;
-
- sdram_size = 1 << (rows + cols + banks + width);
-
-#if(CONFIG_PBI == 0) /* bank-based interleaving */
- rowst = ((32 - 6) - (rows + cols + width)) * 2;
-#else
- rowst = 32 - (rows + banks + cols + width);
-#endif
-
- or = ~(sdram_size - 1) | /* SDAM address mask */
- ((banks-1) << 13) | /* banks per device */
- (rowst << 9) | /* rowst */
- ((rows - 9) << 6); /* numr */
-
- memctl->memc_or2 = or;
-
- /*
- * SDAM specifies the number of columns that are multiplexed
- * (reference AN2165/D), defined to be (columns - 6) for page
- * interleave, (columns - 8) for bank interleave.
- *
- * BSMA is 14 - max(rows, cols). The bank select lines come
- * into play above the highest "address" line going into the
- * the SDRAM.
- */
-#if(CONFIG_PBI == 0) /* bank-based interleaving */
- sdam = cols - 8;
- bsma = ((31 - width) - 14) - ((rows > cols) ? rows : cols);
- sda10 = sdam + 2;
-#else
- sdam = cols - 6;
- bsma = ((31 - width) - 14) - ((rows > cols) ? rows : cols);
- sda10 = sdam;
-#endif
-#if(PESSIMISTIC_SDRAM)
- psdmr = (CONFIG_PBI |\
- PSDMR_RFEN |\
- PSDMR_RFRC_16_CLK |\
- PSDMR_PRETOACT_8W |\
- PSDMR_ACTTORW_8W |\
- PSDMR_WRC_4C |\
- PSDMR_EAMUX |\
- PSDMR_BUFCMD) |\
- caslatency |\
- ((caslatency - 1) << 6) | /* LDOTOPRE is CL - 1 */ \
- (sdam << 24) |\
- (bsma << 21) |\
- (sda10 << 18);
-#else
- psdmr = (CONFIG_PBI |\
- PSDMR_RFEN |\
- PSDMR_RFRC_7_CLK |\
- PSDMR_PRETOACT_3W | /* 1 for 7E parts (fast PC-133) */ \
- PSDMR_ACTTORW_2W | /* 1 for 7E parts (fast PC-133) */ \
- PSDMR_WRC_1C | /* 1 clock + 7nSec */
- EAMUX |\
- BUFCMD) |\
- caslatency |\
- ((caslatency - 1) << 6) | /* LDOTOPRE is CL - 1 */ \
- (sdam << 24) |\
- (bsma << 21) |\
- (sda10 << 18);
-#endif
-#endif
-
- /*
- * Quote from 8260 UM (10.4.2 SDRAM Power-On Initialization, 10-35):
- *
- * "At system reset, initialization software must set up the
- * programmable parameters in the memory controller banks registers
- * (ORx, BRx, P/LSDMR). After all memory parameters are configured,
- * system software should execute the following initialization sequence
- * for each SDRAM device.
- *
- * 1. Issue a PRECHARGE-ALL-BANKS command
- * 2. Issue eight CBR REFRESH commands
- * 3. Issue a MODE-SET command to initialize the mode register
- *
- * Quote from Micron MT48LC8M16A2 data sheet:
- *
- * "...the SDRAM requires a 100uS delay prior to issuing any
- * command other than a COMMAND INHIBIT or NOP. Starting at some
- * point during this 100uS period and continuing at least through
- * the end of this period, COMMAND INHIBIT or NOP commands should
- * be applied."
- *
- * "Once the 100uS delay has been satisfied with at least one COMMAND
- * INHIBIT or NOP command having been applied, a /PRECHARGE command/
- * should be applied. All banks must then be precharged, thereby
- * placing the device in the all banks idle state."
- *
- * "Once in the idle state, /two/ AUTO REFRESH cycles must be
- * performed. After the AUTO REFRESH cycles are complete, the
- * SDRAM is ready for mode register programming."
- *
- * (/emphasis/ mine, gvb)
- *
- * The way I interpret this, Micron start up sequence is:
- * 1. Issue a PRECHARGE-BANK command (initial precharge)
- * 2. Issue a PRECHARGE-ALL-BANKS command ("all banks ... precharged")
- * 3. Issue two (presumably, doing eight is OK) CBR REFRESH commands
- * 4. Issue a MODE-SET command to initialize the mode register
- *
- * --------
- *
- * The initial commands are executed by setting P/LSDMR[OP] and
- * accessing the SDRAM with a single-byte transaction."
- *
- * The appropriate BRx/ORx registers have already been set when we
- * get here. The SDRAM can be accessed at the address CFG_SDRAM_BASE.
- */
-
- memctl->memc_mptpr = CFG_MPTPR;
- memctl->memc_psrt = psrt;
-
- memctl->memc_psdmr = psdmr | PSDMR_OP_PREA;
- *ramaddr = c;
-
- memctl->memc_psdmr = psdmr | PSDMR_OP_CBRR;
- for (i = 0; i < 8; i++)
- *ramaddr = c;
-
- memctl->memc_psdmr = psdmr | PSDMR_OP_MRW;
- *ramaddr = c;
-
- memctl->memc_psdmr = psdmr | PSDMR_OP_NORM | PSDMR_RFEN;
- *ramaddr = c;
-
- /*
- * Do it a second time for the second set of chips if the DIMM has
- * two chip selects (double sided).
- */
- if(chipselects > 1) {
- ramaddr += sdram_size;
-
- memctl->memc_br3 = CFG_BR3_PRELIM + sdram_size;
- memctl->memc_or3 = or;
-
- memctl->memc_psdmr = psdmr | PSDMR_OP_PREA;
- *ramaddr = c;
-
- memctl->memc_psdmr = psdmr | PSDMR_OP_CBRR;
- for (i = 0; i < 8; i++)
- *ramaddr = c;
-
- memctl->memc_psdmr = psdmr | PSDMR_OP_MRW;
- *ramaddr = c;
-
- memctl->memc_psdmr = psdmr | PSDMR_OP_NORM | PSDMR_RFEN;
- *ramaddr = c;
- }
-
- /* return total ram size */
- return (sdram_size * chipselects);
-}
-
-/*-----------------------------------------------------------------------
- * Board Control Functions
- */
-void board_poweroff (void)
-{
- while (1); /* hang forever */
-}
-
-
-#ifdef CONFIG_MISC_INIT_R
-/* ------------------------------------------------------------------------- */
-int misc_init_r(void)
-{
- /*
- * Note: iop is used by the I2C macros, and iopa by the ADC/DAC initialization.
- */
- volatile ioport_t *iopa = ioport_addr((immap_t *)CFG_IMMR, 0 /* port A */);
- volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
-
- int reg; /* I2C register value */
- char *ep; /* Environment pointer */
- char str_buf[12] ; /* sprintf output buffer */
- int sample_rate; /* ADC/DAC sample rate */
- int sample_64x; /* Use 64/4 clocking for the ADC/DAC */
- int sample_128x; /* Use 128/4 clocking for the ADC/DAC */
- int right_just; /* Is the data to the DAC right justified? */
- int mclk_divide; /* MCLK Divide */
- int quiet; /* Quiet or minimal output mode */
-
- quiet = 0;
- if ((ep = getenv("quiet")) != NULL) {
- quiet = simple_strtol(ep, NULL, 10);
- }
- else {
- setenv("quiet", "0");
- }
-
- /*
- * SACSng custom initialization:
- * Start the ADC and DAC clocks, since the Crystal parts do not
- * work on the I2C bus until the clocks are running.
- */
-
- sample_rate = INITIAL_SAMPLE_RATE;
- if ((ep = getenv("DaqSampleRate")) != NULL) {
- sample_rate = simple_strtol(ep, NULL, 10);
- }
-
- sample_64x = INITIAL_SAMPLE_64X;
- sample_128x = INITIAL_SAMPLE_128X;
- if ((ep = getenv("Daq64xSampling")) != NULL) {
- sample_64x = simple_strtol(ep, NULL, 10);
- if (sample_64x) {
- sample_128x = 0;
- }
- else {
- sample_128x = 1;
- }
- }
- else {
- if ((ep = getenv("Daq128xSampling")) != NULL) {
- sample_128x = simple_strtol(ep, NULL, 10);
- if (sample_128x) {
- sample_64x = 0;
- }
- else {
- sample_64x = 1;
- }
- }
- }
-
- /*
- * Stop the clocks and wait for at least 1 LRCLK period
- * to make sure the clocking has really stopped.
- */
- Daq_Stop_Clocks();
- udelay((1000000 / sample_rate) * NUM_LRCLKS_TO_STABILIZE);
-
- /*
- * Initialize the clocks with the new rates
- */
- Daq_Init_Clocks(sample_rate, sample_64x);
- sample_rate = Daq_Get_SampleRate();
-
- /*
- * Start the clocks and wait for at least 1 LRCLK period
- * to make sure the clocking has become stable.
- */
- Daq_Start_Clocks(sample_rate);
- udelay((1000000 / sample_rate) * NUM_LRCLKS_TO_STABILIZE);
-
- sprintf(str_buf, "%d", sample_rate);
- setenv("DaqSampleRate", str_buf);
-
- if (sample_64x) {
- setenv("Daq64xSampling", "1");
- setenv("Daq128xSampling", NULL);
- }
- else {
- setenv("Daq64xSampling", NULL);
- setenv("Daq128xSampling", "1");
- }
-
- /*
- * Display the ADC/DAC clocking information
- */
- if (!quiet) {
- Daq_Display_Clocks();
- }
-
- /*
- * Determine the DAC data justification
- */
-
- right_just = INITIAL_RIGHT_JUST;
- if ((ep = getenv("DaqDACRightJustified")) != NULL) {
- right_just = simple_strtol(ep, NULL, 10);
- }
-
- sprintf(str_buf, "%d", right_just);
- setenv("DaqDACRightJustified", str_buf);
-
- /*
- * Determine the DAC MCLK Divide
- */
-
- mclk_divide = INITIAL_MCLK_DIVIDE;
- if ((ep = getenv("DaqDACMClockDivide")) != NULL) {
- mclk_divide = simple_strtol(ep, NULL, 10);
- }
-
- sprintf(str_buf, "%d", mclk_divide);
- setenv("DaqDACMClockDivide", str_buf);
-
- /*
- * Initializing the I2C address in the Crystal A/Ds:
- *
- * 1) Wait for VREF cap to settle (10uSec per uF)
- * 2) Release pullup on SDATA
- * 3) Write the I2C address to register 6
- * 4) Enable address matching by setting the MSB in register 7
- */
-
- if (!quiet) {
- printf("Initializing the ADC...\n");
- }
- udelay(ADC_INITIAL_DELAY); /* 10uSec per uF of VREF cap */
-
- iopa->pdat &= ~ADC_SDATA1_MASK; /* release SDATA1 */
- udelay(ADC_SDATA_DELAY); /* arbitrary settling time */
-
- i2c_reg_write(0x00, 0x06, I2C_ADC_1_ADDR); /* set address */
- i2c_reg_write(I2C_ADC_1_ADDR, 0x07, /* turn on ADDREN */
- ADC_REG7_ADDR_ENABLE);
-
- i2c_reg_write(I2C_ADC_1_ADDR, 0x02, /* 128x, slave mode, !HPEN */
- (sample_64x ? 0 : ADC_REG2_128x) |
- ADC_REG2_HIGH_PASS_DIS |
- ADC_REG2_SLAVE_MODE);
-
- reg = i2c_reg_read(I2C_ADC_1_ADDR, 0x06) & 0x7F;
- if(reg != I2C_ADC_1_ADDR)
- printf("Init of ADC U10 failed: address is 0x%02X should be 0x%02X\n",
- reg, I2C_ADC_1_ADDR);
-
- iopa->pdat &= ~ADC_SDATA2_MASK; /* release SDATA2 */
- udelay(ADC_SDATA_DELAY); /* arbitrary settling time */
-
- i2c_reg_write(0x00, 0x06, I2C_ADC_2_ADDR); /* set address (do not set ADDREN yet) */
-
- i2c_reg_write(I2C_ADC_2_ADDR, 0x02, /* 64x, slave mode, !HPEN */
- (sample_64x ? 0 : ADC_REG2_128x) |
- ADC_REG2_HIGH_PASS_DIS |
- ADC_REG2_SLAVE_MODE);
-
- reg = i2c_reg_read(I2C_ADC_2_ADDR, 0x06) & 0x7F;
- if(reg != I2C_ADC_2_ADDR)
- printf("Init of ADC U15 failed: address is 0x%02X should be 0x%02X\n",
- reg, I2C_ADC_2_ADDR);
-
- i2c_reg_write(I2C_ADC_1_ADDR, 0x01, /* set FSTART and GNDCAL */
- ADC_REG1_FRAME_START |
- ADC_REG1_GROUND_CAL);
-
- i2c_reg_write(I2C_ADC_1_ADDR, 0x02, /* Start calibration */
- (sample_64x ? 0 : ADC_REG2_128x) |
- ADC_REG2_CAL |
- ADC_REG2_HIGH_PASS_DIS |
- ADC_REG2_SLAVE_MODE);
-
- udelay(ADC_CAL_DELAY); /* a minimum of 4100 LRCLKs */
- i2c_reg_write(I2C_ADC_1_ADDR, 0x01, 0x00); /* remove GNDCAL */
-
- /*
- * Now that we have synchronized the ADC's, enable address
- * selection on the second ADC as well as the first.
- */
- i2c_reg_write(I2C_ADC_2_ADDR, 0x07, ADC_REG7_ADDR_ENABLE);
-
- /*
- * Initialize the Crystal DAC
- *
- * Two of the config lines are used for I2C so we have to set them
- * to the proper initialization state without inadvertantly
- * sending an I2C "start" sequence. When we bring the I2C back to
- * the normal state, we send an I2C "stop" sequence.
- */
- if (!quiet) {
- printf("Initializing the DAC...\n");
- }
-
- /*
- * Bring the I2C clock and data lines low for initialization
- */
- I2C_SCL(0);
- I2C_DELAY;
- I2C_SDA(0);
- I2C_ACTIVE;
- I2C_DELAY;
-
- /* Reset the DAC */
- iopa->pdat &= ~DAC_RST_MASK;
- udelay(DAC_RESET_DELAY);
-
- /* Release the DAC reset */
- iopa->pdat |= DAC_RST_MASK;
- udelay(DAC_INITIAL_DELAY);
-
- /*
- * Cause the DAC to:
- * Enable control port (I2C mode)
- * Going into power down
- */
- i2c_reg_write(I2C_DAC_ADDR, 0x05,
- DAC_REG5_I2C_MODE |
- DAC_REG5_POWER_DOWN);
-
- /*
- * Cause the DAC to:
- * Enable control port (I2C mode)
- * Going into power down
- * . MCLK divide by 1
- * . MCLK divide by 2
- */
- i2c_reg_write(I2C_DAC_ADDR, 0x05,
- DAC_REG5_I2C_MODE |
- DAC_REG5_POWER_DOWN |
- (mclk_divide ? DAC_REG5_MCLK_DIV : 0));
-
- /*
- * Cause the DAC to:
- * Auto-mute disabled
- * . Format 0, left justified 24 bits
- * . Format 3, right justified 24 bits
- * No de-emphasis
- * . Single speed mode
- * . Double speed mode
- */
- i2c_reg_write(I2C_DAC_ADDR, 0x01,
- (right_just ? DAC_REG1_RIGHT_JUST_24BIT :
- DAC_REG1_LEFT_JUST_24_BIT) |
- DAC_REG1_DEM_NO |
- (sample_rate >= 50000 ? DAC_REG1_DOUBLE : DAC_REG1_SINGLE));
-
- sprintf(str_buf, "%d",
- sample_rate >= 50000 ? DAC_REG1_DOUBLE : DAC_REG1_SINGLE);
- setenv("DaqDACFunctionalMode", str_buf);
-
- /*
- * Cause the DAC to:
- * Enable control port (I2C mode)
- * Remove power down
- * . MCLK divide by 1
- * . MCLK divide by 2
- */
- i2c_reg_write(I2C_DAC_ADDR, 0x05,
- DAC_REG5_I2C_MODE |
- (mclk_divide ? DAC_REG5_MCLK_DIV : 0));
-
- /*
- * Create a I2C stop condition:
- * low->high on data while clock is high.
- */
- I2C_SCL(1);
- I2C_DELAY;
- I2C_SDA(1);
- I2C_DELAY;
- I2C_TRISTATE;
-
- if (!quiet) {
- printf("\n");
- }
-
-#ifdef CONFIG_ETHER_LOOPBACK_TEST
- /*
- * Run the Ethernet loopback test
- */
- eth_loopback_test ();
-#endif /* CONFIG_ETHER_LOOPBACK_TEST */
-
-#ifdef CONFIG_SHOW_BOOT_PROGRESS
- /*
- * Turn off the RED fail LED now that we are up and running.
- */
- status_led_set(STATUS_LED_RED, STATUS_LED_OFF);
-#endif
-
- return 0;
-}
-
-#ifdef CONFIG_SHOW_BOOT_PROGRESS
-/*
- * Show boot status: flash the LED if something goes wrong, indicating
- * that last thing that worked and thus, by implication, what is broken.
- *
- * This stores the last OK value in RAM so this will not work properly
- * before RAM is initialized. Since it is being used for indicating
- * boot status (i.e. after RAM is initialized), that is OK.
- */
-static void flash_code(uchar number, uchar modulo, uchar digits)
-{
- int j;
-
- /*
- * Recursively do upper digits.
- */
- if(digits > 1) {
- flash_code(number / modulo, modulo, digits - 1);
- }
-
- number = number % modulo;
-
- /*
- * Zero is indicated by one long flash (dash).
- */
- if(number == 0) {
- status_led_set(STATUS_LED_BOOT, STATUS_LED_ON);
- udelay(1000000);
- status_led_set(STATUS_LED_BOOT, STATUS_LED_OFF);
- udelay(200000);
- } else {
- /*
- * Non-zero is indicated by short flashes, one per count.
- */
- for(j = 0; j < number; j++) {
- status_led_set(STATUS_LED_BOOT, STATUS_LED_ON);
- udelay(100000);
- status_led_set(STATUS_LED_BOOT, STATUS_LED_OFF);
- udelay(200000);
- }
- }
- /*
- * Inter-digit pause: we've already waited 200 mSec, wait 1 sec total
- */
- udelay(700000);
-}
-
-static int last_boot_progress;
-
-void show_boot_progress (int status)
-{
- int i,j;
- if(status > 0) {
- last_boot_progress = status;
- } else {
- /*
- * If a specific failure code is given, flash this code
- * else just use the last success code we've seen
- */
- if(status < -1)
- last_boot_progress = -status;
-
- /*
- * Flash this code 5 times
- */
- for(j=0; j<5; j++) {
- /*
- * Houston, we have a problem.
- * Blink the last OK status which indicates where things failed.
- */
- status_led_set(STATUS_LED_RED, STATUS_LED_ON);
- flash_code(last_boot_progress, 5, 3);
-
- /*
- * Delay 5 seconds between repetitions,
- * with the fault LED blinking
- */
- for(i=0; i<5; i++) {
- status_led_set(STATUS_LED_RED, STATUS_LED_OFF);
- udelay(500000);
- status_led_set(STATUS_LED_RED, STATUS_LED_ON);
- udelay(500000);
- }
- }
-
- /*
- * Reset the board to retry initialization.
- */
- do_reset (NULL, 0, 0, NULL);
- }
-}
-#endif /* CONFIG_SHOW_BOOT_PROGRESS */
-
-
-/*
- * The following are used to control the SPI chip selects for the SPI command.
- */
-#if (CONFIG_COMMANDS & CFG_CMD_SPI)
-
-#define SPI_ADC_CS_MASK 0x00000800
-#define SPI_DAC_CS_MASK 0x00001000
-
-void spi_adc_chipsel(int cs)
-{
- volatile ioport_t *iopd = ioport_addr((immap_t *)CFG_IMMR, 3 /* port D */);
-
- if(cs)
- iopd->pdat &= ~SPI_ADC_CS_MASK; /* activate the chip select */
- else
- iopd->pdat |= SPI_ADC_CS_MASK; /* deactivate the chip select */
-}
-
-void spi_dac_chipsel(int cs)
-{
- volatile ioport_t *iopd = ioport_addr((immap_t *)CFG_IMMR, 3 /* port D */);
-
- if(cs)
- iopd->pdat &= ~SPI_DAC_CS_MASK; /* activate the chip select */
- else
- iopd->pdat |= SPI_DAC_CS_MASK; /* deactivate the chip select */
-}
-
-/*
- * The SPI command uses this table of functions for controlling the SPI
- * chip selects: it calls the appropriate function to control the SPI
- * chip selects.
- */
-spi_chipsel_type spi_chipsel[] = {
- spi_adc_chipsel,
- spi_dac_chipsel
-};
-int spi_chipsel_cnt = sizeof(spi_chipsel) / sizeof(spi_chipsel[0]);
-
-#endif /* CFG_CMD_SPI */
-
-#endif /* CONFIG_MISC_INIT_R */
-
-#ifdef CONFIG_POST
-/*
- * Returns 1 if keys pressed to start the power-on long-running tests
- * Called from board_init_f().
- */
-int post_hotkeys_pressed(void)
-{
- return 0; /* No hotkeys supported */
-}
-
-#endif
diff --git a/board/sacsng/u-boot.lds b/board/sacsng/u-boot.lds
deleted file mode 100644
index 9e623d0b93..0000000000
--- a/board/sacsng/u-boot.lds
+++ /dev/null
@@ -1,125 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc8260/start.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/sandburst/common/flash.c b/board/sandburst/common/flash.c
deleted file mode 100644
index 762fb738fd..0000000000
--- a/board/sandburst/common/flash.c
+++ /dev/null
@@ -1,512 +0,0 @@
-/*
- * (C) Copyright 2002-2005
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2002 Jun Gu <jung@artesyncp.com>
- * Add support for Am29F016D and dynamic switch setting.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-/*
- * Ported from Ebony flash support
- * Travis B. Sawyer
- * Sandburst Corporation
- */
-#include <common.h>
-#include <ppc4xx.h>
-#include <asm/processor.h>
-
-
-#undef DEBUG
-#ifdef DEBUG
-#define DEBUGF(x...) printf(x)
-#else
-#define DEBUGF(x...)
-#endif /* DEBUG */
-
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-static unsigned long flash_addr_table[8][CFG_MAX_FLASH_BANKS] = {
- {0xfff80000} /* Boot Flash */
-};
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (vu_long *addr, flash_info_t *info);
-static int write_word (flash_info_t *info, ulong dest, ulong data);
-
-
-#define ADDR0 0x5555
-#define ADDR1 0x2aaa
-#define FLASH_WORD_SIZE unsigned char
-
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- unsigned long total_b = 0;
- unsigned long size_b[CFG_MAX_FLASH_BANKS];
- unsigned short index = 0;
- int i;
-
-
- DEBUGF("\n");
- DEBUGF("FLASH: Index: %d\n", index);
-
- /* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- flash_info[i].sector_count = -1;
- flash_info[i].size = 0;
-
- /* check whether the address is 0 */
- if (flash_addr_table[index][i] == 0) {
- continue;
- }
-
- /* call flash_get_size() to initialize sector address */
- size_b[i] = flash_get_size(
- (vu_long *)flash_addr_table[index][i], &flash_info[i]);
- flash_info[i].size = size_b[i];
- if (flash_info[i].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n",
- i, size_b[i], size_b[i]<<20);
- flash_info[i].sector_count = -1;
- flash_info[i].size = 0;
- }
-
- total_b += flash_info[i].size;
- }
-
- return total_b;
-}
-
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t *info)
-{
- int i;
- int k;
- int size;
- int erased;
- volatile unsigned long *flash;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD: printf ("AMD "); break;
- default: printf ("Unknown Vendor "); break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM040: printf ("AM29F040 (512 Kbit, uniform sector size)\n");
- break;
- default: printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld KB in %d Sectors\n",
- info->size >> 10, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
- /*
- * Check if whole sector is erased
- */
- if (i != (info->sector_count-1))
- size = info->start[i+1] - info->start[i];
- else
- size = info->start[0] + info->size - info->start[i];
- erased = 1;
- flash = (volatile unsigned long *)info->start[i];
- size = size >> 2; /* divide by 4 for longword access */
- for (k=0; k<size; k++)
- {
- if (*flash++ != 0xffffffff)
- {
- erased = 0;
- break;
- }
- }
-
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s%s",
- info->start[i],
- erased ? " E" : " ",
- info->protect[i] ? "RO " : " "
- );
- }
- printf ("\n");
- return;
- }
-
-/*-----------------------------------------------------------------------
- */
-
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-static ulong flash_get_size (vu_long *addr, flash_info_t *info)
-{
- short i;
- FLASH_WORD_SIZE value;
- ulong base = (ulong)addr;
- volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *)addr;
-
- DEBUGF("FLASH ADDR: %08x\n", (unsigned)addr );
-
- /* Write auto select command: read Manufacturer ID */
- udelay(10000);
- addr2[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
- udelay(1000);
- addr2[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
- udelay(1000);
- addr2[ADDR0] = (FLASH_WORD_SIZE)0x00900090;
- udelay(1000);
-
- value = addr2[0];
-
- DEBUGF("FLASH MANUFACT: %x\n", value);
-
- switch (value) {
- case (FLASH_WORD_SIZE)AMD_MANUFACT:
- info->flash_id = FLASH_MAN_AMD;
- break;
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- return (0); /* no or unknown flash */
- }
-
- value = addr2[1]; /* device ID */
-
- DEBUGF("\nFLASH DEVICEID: %x\n", value);
-
- switch (value) {
- case (FLASH_WORD_SIZE)AMD_ID_LV040B:
- info->flash_id += FLASH_AM040;
- info->sector_count = 8;
- info->size = 0x00080000; /* => 512 kb */
- break;
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- return (0); /* => no or unknown flash */
-
- }
-
- /* set up sector start address table */
- if (info->flash_id == FLASH_AM040) {
- for (i = 0; i < info->sector_count; i++)
- info->start[i] = base + (i * 0x00010000);
- } else {
- if (info->flash_id & FLASH_BTYPE) {
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00004000;
- info->start[2] = base + 0x00006000;
- info->start[3] = base + 0x00008000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00010000) - 0x00030000;
- }
- } else {
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- info->start[i--] = base + info->size - 0x00004000;
- info->start[i--] = base + info->size - 0x00006000;
- info->start[i--] = base + info->size - 0x00008000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00010000;
- }
- }
- }
-
- /* check for protected sectors */
- for (i = 0; i < info->sector_count; i++) {
- /* read sector protection at sector address, (A7 .. A0) = 0x02 */
- /* D0 = 1 if protected */
- addr2 = (volatile FLASH_WORD_SIZE *)(info->start[i]);
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST)
- info->protect[i] = 0;
- else
- info->protect[i] = addr2[2] & 1;
- }
-
- /* reset to return to reading data */
- addr2[0] = (FLASH_WORD_SIZE) 0x00F000F0; /* reset bank */
-
- /*
- * Prevent writes to uninitialized FLASH.
- */
- if (info->flash_id != FLASH_UNKNOWN) {
- addr2 = (FLASH_WORD_SIZE *)info->start[0];
- *addr2 = (FLASH_WORD_SIZE)0x00F000F0; /* reset bank */
- }
-
- return (info->size);
-}
-
-int wait_for_DQ7(flash_info_t *info, int sect)
-{
- ulong start, now, last;
- volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[sect]);
-
- start = get_timer (0);
- last = start;
- while ((addr[0] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080) {
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- return -1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- }
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[0]);
- volatile FLASH_WORD_SIZE *addr2;
- int flag, prot, sect, l_sect;
- int i;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("Can't erase unknown flash type - aborted\n");
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- l_sect = -1;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr2 = (FLASH_WORD_SIZE *)(info->start[sect]);
- DEBUGF("Erasing sector %p\n", addr2);
-
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) {
- addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
- addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
- addr[ADDR0] = (FLASH_WORD_SIZE)0x00800080;
- addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
- addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
- addr2[0] = (FLASH_WORD_SIZE)0x00500050; /* block erase */
- for (i=0; i<50; i++)
- udelay(1000); /* wait 1 ms */
- } else {
- addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
- addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
- addr[ADDR0] = (FLASH_WORD_SIZE)0x00800080;
- addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
- addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
- addr2[0] = (FLASH_WORD_SIZE)0x00300030; /* sector erase */
- }
- l_sect = sect;
- /*
- * Wait for each sector to complete, it's more
- * reliable. According to AMD Spec, you must
- * issue all erase commands within a specified
- * timeout. This has been seen to fail, especially
- * if printf()s are included (for debug)!!
- */
- wait_for_DQ7(info, sect);
- }
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- /* reset to read mode */
- addr = (FLASH_WORD_SIZE *)info->start[0];
- addr[0] = (FLASH_WORD_SIZE)0x00F000F0; /* reset bank */
-
- printf (" done\n");
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int i, l, rc;
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
- for (; i<4 && cnt>0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = 0;
- for (i=0; i<4; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- return (write_word(info, wp, data));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word (flash_info_t * info, ulong dest, ulong data)
-{
- volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *) (info->start[0]);
- volatile FLASH_WORD_SIZE *dest2 = (FLASH_WORD_SIZE *) dest;
- volatile FLASH_WORD_SIZE *data2 = (FLASH_WORD_SIZE *) & data;
- ulong start;
- int i;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*((volatile FLASH_WORD_SIZE *) dest) &
- (FLASH_WORD_SIZE) data) != (FLASH_WORD_SIZE) data) {
- return (2);
- }
-
- for (i = 0; i < 4 / sizeof (FLASH_WORD_SIZE); i++) {
- int flag;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
-
- addr2[ADDR0] = (FLASH_WORD_SIZE) 0x00AA00AA;
- addr2[ADDR1] = (FLASH_WORD_SIZE) 0x00550055;
- addr2[ADDR0] = (FLASH_WORD_SIZE) 0x00A000A0;
-
- dest2[i] = data2[i];
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts ();
-
- /* data polling for D7 */
- start = get_timer (0);
- while ((dest2[i] & (FLASH_WORD_SIZE) 0x00800080) !=
- (data2[i] & (FLASH_WORD_SIZE) 0x00800080)) {
-
- if (get_timer (start) > CFG_FLASH_WRITE_TOUT) {
- return (1);
- }
- }
- }
-
- return (0);
-}
diff --git a/board/sandburst/common/ppc440gx_i2c.c b/board/sandburst/common/ppc440gx_i2c.c
deleted file mode 100644
index 859dd7afe5..0000000000
--- a/board/sandburst/common/ppc440gx_i2c.c
+++ /dev/null
@@ -1,512 +0,0 @@
-/*
- * Copyright (C) 2005 Sandburst Corporation
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * Ported from cpu/ppc4xx/i2c.c by AS HARNOIS by
- * Travis B. Sawyer
- * Sandburst Corporation.
- */
-#include <common.h>
-#include <ppc4xx.h>
-#if defined(CONFIG_440)
-# include <440_i2c.h>
-#else
-# include <405gp_i2c.h>
-#endif
-#include <i2c.h>
-#include <440_i2c.h>
-#include <command.h>
-#include "ppc440gx_i2c.h"
-
-#ifdef CONFIG_I2C_BUS1
-
-#define IIC_OK 0
-#define IIC_NOK 1
-#define IIC_NOK_LA 2 /* Lost arbitration */
-#define IIC_NOK_ICT 3 /* Incomplete transfer */
-#define IIC_NOK_XFRA 4 /* Transfer aborted */
-#define IIC_NOK_DATA 5 /* No data in buffer */
-#define IIC_NOK_TOUT 6 /* Transfer timeout */
-
-#define IIC_TIMEOUT 1 /* 1 second */
-#if defined(CFG_I2C_NOPROBES)
-static uchar i2c_no_probes[] = CFG_I2C_NOPROBES;
-#endif
-
-static void _i2c_bus1_reset (void)
-{
- int i, status;
-
- /* Reset status register */
- /* write 1 in SCMP and IRQA to clear these fields */
- out8 (IIC_STS1, 0x0A);
-
- /* write 1 in IRQP IRQD LA ICT XFRA to clear these fields */
- out8 (IIC_EXTSTS1, 0x8F);
- __asm__ volatile ("eieio");
-
- /*
- * Get current state, reset bus
- * only if no transfers are pending.
- */
- i = 10;
- do {
- /* Get status */
- status = in8 (IIC_STS1);
- udelay (500); /* 500us */
- i--;
- } while ((status & IIC_STS_PT) && (i > 0));
- /* Soft reset controller */
- status = in8 (IIC_XTCNTLSS1);
- out8 (IIC_XTCNTLSS1, (status | IIC_XTCNTLSS_SRST));
- __asm__ volatile ("eieio");
-
- /* make sure where in initial state, data hi, clock hi */
- out8 (IIC_DIRECTCNTL1, 0xC);
- for (i = 0; i < 10; i++) {
- if ((in8 (IIC_DIRECTCNTL1) & 0x3) != 0x3) {
- /* clock until we get to known state */
- out8 (IIC_DIRECTCNTL1, 0x8); /* clock lo */
- udelay (100); /* 100us */
- out8 (IIC_DIRECTCNTL1, 0xC); /* clock hi */
- udelay (100); /* 100us */
- } else {
- break;
- }
- }
- /* send start condition */
- out8 (IIC_DIRECTCNTL1, 0x4);
- udelay (1000); /* 1ms */
- /* send stop condition */
- out8 (IIC_DIRECTCNTL1, 0xC);
- udelay (1000); /* 1ms */
- /* Unreset controller */
- out8 (IIC_XTCNTLSS1, (status & ~IIC_XTCNTLSS_SRST));
- udelay (1000); /* 1ms */
-}
-
-void i2c1_init (int speed, int slaveadd)
-{
- sys_info_t sysInfo;
- unsigned long freqOPB;
- int val, divisor;
-
-#ifdef CFG_I2C_INIT_BOARD
- /* call board specific i2c bus reset routine before accessing the */
- /* environment, which might be in a chip on that bus. For details */
- /* about this problem see doc/I2C_Edge_Conditions. */
- i2c_init_board();
-#endif
-
- /* Handle possible failed I2C state */
- /* FIXME: put this into i2c_init_board()? */
- _i2c_bus1_reset ();
-
- /* clear lo master address */
- out8 (IIC_LMADR1, 0);
-
- /* clear hi master address */
- out8 (IIC_HMADR1, 0);
-
- /* clear lo slave address */
- out8 (IIC_LSADR1, 0);
-
- /* clear hi slave address */
- out8 (IIC_HSADR1, 0);
-
- /* Clock divide Register */
- /* get OPB frequency */
- get_sys_info (&sysInfo);
- freqOPB = sysInfo.freqPLB / sysInfo.pllOpbDiv;
- /* set divisor according to freqOPB */
- divisor = (freqOPB - 1) / 10000000;
- if (divisor == 0)
- divisor = 1;
- out8 (IIC_CLKDIV1, divisor);
-
- /* no interrupts */
- out8 (IIC_INTRMSK1, 0);
-
- /* clear transfer count */
- out8 (IIC_XFRCNT1, 0);
-
- /* clear extended control & stat */
- /* write 1 in SRC SRS SWC SWS to clear these fields */
- out8 (IIC_XTCNTLSS1, 0xF0);
-
- /* Mode Control Register
- Flush Slave/Master data buffer */
- out8 (IIC_MDCNTL1, IIC_MDCNTL_FSDB | IIC_MDCNTL_FMDB);
- __asm__ volatile ("eieio");
-
-
- val = in8(IIC_MDCNTL1);
- __asm__ volatile ("eieio");
-
- /* Ignore General Call, slave transfers are ignored,
- disable interrupts, exit unknown bus state, enable hold
- SCL
- 100kHz normaly or FastMode for 400kHz and above
- */
-
- val |= IIC_MDCNTL_EUBS|IIC_MDCNTL_HSCL;
- if( speed >= 400000 ){
- val |= IIC_MDCNTL_FSM;
- }
- out8 (IIC_MDCNTL1, val);
-
- /* clear control reg */
- out8 (IIC_CNTL1, 0x00);
- __asm__ volatile ("eieio");
-
-}
-
-/*
- This code tries to use the features of the 405GP i2c
- controller. It will transfer up to 4 bytes in one pass
- on the loop. It only does out8(lbz) to the buffer when it
- is possible to do out16(lhz) transfers.
-
- cmd_type is 0 for write 1 for read.
-
- addr_len can take any value from 0-255, it is only limited
- by the char, we could make it larger if needed. If it is
- 0 we skip the address write cycle.
-
- Typical case is a Write of an addr followd by a Read. The
- IBM FAQ does not cover this. On the last byte of the write
- we don't set the creg CHT bit, and on the first bytes of the
- read we set the RPST bit.
-
- It does not support address only transfers, there must be
- a data part. If you want to write the address yourself, put
- it in the data pointer.
-
- It does not support transfer to/from address 0.
-
- It does not check XFRCNT.
-*/
-static
-int i2c_transfer1(unsigned char cmd_type,
- unsigned char chip,
- unsigned char addr[],
- unsigned char addr_len,
- unsigned char data[],
- unsigned short data_len )
-{
- unsigned char* ptr;
- int reading;
- int tran,cnt;
- int result;
- int status;
- int i;
- uchar creg;
-
- if( data == 0 || data_len == 0 ){
- /*Don't support data transfer of no length or to address 0*/
- printf( "i2c_transfer: bad call\n" );
- return IIC_NOK;
- }
- if( addr && addr_len ){
- ptr = addr;
- cnt = addr_len;
- reading = 0;
- }else{
- ptr = data;
- cnt = data_len;
- reading = cmd_type;
- }
-
- /*Clear Stop Complete Bit*/
- out8(IIC_STS1,IIC_STS_SCMP);
- /* Check init */
- i=10;
- do {
- /* Get status */
- status = in8(IIC_STS1);
- __asm__ volatile("eieio");
- i--;
- } while ((status & IIC_STS_PT) && (i>0));
-
- if (status & IIC_STS_PT) {
- result = IIC_NOK_TOUT;
- return(result);
- }
- /*flush the Master/Slave Databuffers*/
- out8(IIC_MDCNTL1, ((in8(IIC_MDCNTL1))|IIC_MDCNTL_FMDB|IIC_MDCNTL_FSDB));
- /*need to wait 4 OPB clocks? code below should take that long*/
-
- /* 7-bit adressing */
- out8(IIC_HMADR1,0);
- out8(IIC_LMADR1, chip);
- __asm__ volatile("eieio");
-
- tran = 0;
- result = IIC_OK;
- creg = 0;
-
- while ( tran != cnt && (result == IIC_OK)) {
- int bc,j;
-
- /* Control register =
- Normal transfer, 7-bits adressing, Transfer up to bc bytes, Normal start,
- Transfer is a sequence of transfers
- */
- creg |= IIC_CNTL_PT;
-
- bc = (cnt - tran) > 4 ? 4 :
- cnt - tran;
- creg |= (bc-1)<<4;
- /* if the real cmd type is write continue trans*/
- if ( (!cmd_type && (ptr == addr)) || ((tran+bc) != cnt) )
- creg |= IIC_CNTL_CHT;
-
- if (reading)
- creg |= IIC_CNTL_READ;
- else {
- for(j=0; j<bc; j++) {
- /* Set buffer */
- out8(IIC_MDBUF1,ptr[tran+j]);
- __asm__ volatile("eieio");
- }
- }
- out8(IIC_CNTL1, creg );
- __asm__ volatile("eieio");
-
- /* Transfer is in progress
- we have to wait for upto 5 bytes of data
- 1 byte chip address+r/w bit then bc bytes
- of data.
- udelay(10) is 1 bit time at 100khz
- Doubled for slop. 20 is too small.
- */
- i=2*5*8;
- do {
- /* Get status */
- status = in8(IIC_STS1);
- __asm__ volatile("eieio");
- udelay (10);
- i--;
- } while ((status & IIC_STS_PT) && !(status & IIC_STS_ERR)
- && (i>0));
-
- if (status & IIC_STS_ERR) {
- result = IIC_NOK;
- status = in8 (IIC_EXTSTS1);
- /* Lost arbitration? */
- if (status & IIC_EXTSTS_LA)
- result = IIC_NOK_LA;
- /* Incomplete transfer? */
- if (status & IIC_EXTSTS_ICT)
- result = IIC_NOK_ICT;
- /* Transfer aborted? */
- if (status & IIC_EXTSTS_XFRA)
- result = IIC_NOK_XFRA;
- } else if ( status & IIC_STS_PT) {
- result = IIC_NOK_TOUT;
- }
- /* Command is reading => get buffer */
- if ((reading) && (result == IIC_OK)) {
- /* Are there data in buffer */
- if (status & IIC_STS_MDBS) {
- /*
- even if we have data we have to wait 4OPB clocks
- for it to hit the front of the FIFO, after that
- we can just read. We should check XFCNT here and
- if the FIFO is full there is no need to wait.
- */
- udelay (1);
- for(j=0;j<bc;j++) {
- ptr[tran+j] = in8(IIC_MDBUF1);
- __asm__ volatile("eieio");
- }
- } else
- result = IIC_NOK_DATA;
- }
- creg = 0;
- tran+=bc;
- if( ptr == addr && tran == cnt ) {
- ptr = data;
- cnt = data_len;
- tran = 0;
- reading = cmd_type;
- if( reading )
- creg = IIC_CNTL_RPST;
- }
- }
- return (result);
-}
-
-int i2c_probe1 (uchar chip)
-{
- uchar buf[1];
-
- buf[0] = 0;
-
- /*
- * What is needed is to send the chip address and verify that the
- * address was <ACK>ed (i.e. there was a chip at that address which
- * drove the data line low).
- */
- return(i2c_transfer1 (1, chip << 1, 0,0, buf, 1) != 0);
-}
-
-
-int i2c_read1 (uchar chip, uint addr, int alen, uchar * buffer, int len)
-{
- uchar xaddr[4];
- int ret;
-
- if ( alen > 4 ) {
- printf ("I2C read: addr len %d not supported\n", alen);
- return 1;
- }
-
- if ( alen > 0 ) {
- xaddr[0] = (addr >> 24) & 0xFF;
- xaddr[1] = (addr >> 16) & 0xFF;
- xaddr[2] = (addr >> 8) & 0xFF;
- xaddr[3] = addr & 0xFF;
- }
-
-
-#ifdef CFG_I2C_EEPROM_ADDR_OVERFLOW
- /*
- * EEPROM chips that implement "address overflow" are ones
- * like Catalyst 24WC04/08/16 which has 9/10/11 bits of
- * address and the extra bits end up in the "chip address"
- * bit slots. This makes a 24WC08 (1Kbyte) chip look like
- * four 256 byte chips.
- *
- * Note that we consider the length of the address field to
- * still be one byte because the extra address bits are
- * hidden in the chip address.
- */
- if( alen > 0 )
- chip |= ((addr >> (alen * 8)) & CFG_I2C_EEPROM_ADDR_OVERFLOW);
-#endif
- if( (ret = i2c_transfer1( 1, chip<<1, &xaddr[4-alen], alen, buffer, len )) != 0) {
- printf( "I2c read: failed %d\n", ret);
- return 1;
- }
- return 0;
-}
-
-int i2c_write1 (uchar chip, uint addr, int alen, uchar * buffer, int len)
-{
- uchar xaddr[4];
-
- if ( alen > 4 ) {
- printf ("I2C write: addr len %d not supported\n", alen);
- return 1;
-
- }
- if ( alen > 0 ) {
- xaddr[0] = (addr >> 24) & 0xFF;
- xaddr[1] = (addr >> 16) & 0xFF;
- xaddr[2] = (addr >> 8) & 0xFF;
- xaddr[3] = addr & 0xFF;
- }
-
-#ifdef CFG_I2C_EEPROM_ADDR_OVERFLOW
- /*
- * EEPROM chips that implement "address overflow" are ones
- * like Catalyst 24WC04/08/16 which has 9/10/11 bits of
- * address and the extra bits end up in the "chip address"
- * bit slots. This makes a 24WC08 (1Kbyte) chip look like
- * four 256 byte chips.
- *
- * Note that we consider the length of the address field to
- * still be one byte because the extra address bits are
- * hidden in the chip address.
- */
- if( alen > 0 )
- chip |= ((addr >> (alen * 8)) & CFG_I2C_EEPROM_ADDR_OVERFLOW);
-#endif
-
- return (i2c_transfer1( 0, chip<<1, &xaddr[4-alen], alen, buffer, len ) != 0);
-}
-
-/*-----------------------------------------------------------------------
- * Read a register
- */
-uchar i2c_reg_read1(uchar i2c_addr, uchar reg)
-{
- uchar buf;
-
- i2c_read1(i2c_addr, reg, 1, &buf, (uchar)1);
-
- return(buf);
-}
-
-/*-----------------------------------------------------------------------
- * Write a register
- */
-void i2c_reg_write1(uchar i2c_addr, uchar reg, uchar val)
-{
- i2c_write1(i2c_addr, reg, 1, &val, 1);
-}
-
-
-int do_i2c1_probe(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- int j;
-#if defined(CFG_I2C_NOPROBES)
- int k, skip;
-#endif
-
- puts ("Valid chip addresses:");
- for(j = 0; j < 128; j++) {
-#if defined(CFG_I2C_NOPROBES)
- skip = 0;
- for (k = 0; k < sizeof(i2c_no_probes); k++){
- if (j == i2c_no_probes[k]){
- skip = 1;
- break;
- }
- }
- if (skip)
- continue;
-#endif
- if(i2c_probe1(j) == 0) {
- printf(" %02X", j);
- }
- }
- putc ('\n');
-
-#if defined(CFG_I2C_NOPROBES)
- puts ("Excluded chip addresses:");
- for( k = 0; k < sizeof(i2c_no_probes); k++ )
- printf(" %02X", i2c_no_probes[k] );
- putc ('\n');
-#endif
-
- return 0;
-}
-
-U_BOOT_CMD(
- iprobe1, 1, 1, do_i2c1_probe,
- "iprobe1 - probe to discover valid I2C chip addresses\n",
- "\n -discover valid I2C chip addresses\n"
-);
-
-#endif /* CONFIG_I2C_BUS1 */
diff --git a/board/sandburst/common/ppc440gx_i2c.h b/board/sandburst/common/ppc440gx_i2c.h
deleted file mode 100644
index cd4fc86661..0000000000
--- a/board/sandburst/common/ppc440gx_i2c.h
+++ /dev/null
@@ -1,64 +0,0 @@
-/*
- * Copyright (C) 2005 Sandburst Corporation
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * Ported from i2c driver for ppc4xx by AS HARNOIS by
- * Travis B. Sawyer
- * Sandburst Corporation
- */
-#include <common.h>
-#include <ppc4xx.h>
-#if defined(CONFIG_440)
-# include <440_i2c.h>
-#else
-# include <405gp_i2c.h>
-#endif
-#include <i2c.h>
-
-#ifdef CONFIG_HARD_I2C
-
-#define I2C_BUS1_BASE_ADDR (CFG_PERIPHERAL_BASE + 0x00000500)
-#define I2C_REGISTERS_BUS1_BASE_ADDRESS I2C_BUS1_BASE_ADDR
-#define IIC_MDBUF1 (I2C_REGISTERS_BUS1_BASE_ADDRESS+IICMDBUF)
-#define IIC_SDBUF1 (I2C_REGISTERS_BUS1_BASE_ADDRESS+IICSDBUF)
-#define IIC_LMADR1 (I2C_REGISTERS_BUS1_BASE_ADDRESS+IICLMADR)
-#define IIC_HMADR1 (I2C_REGISTERS_BUS1_BASE_ADDRESS+IICHMADR)
-#define IIC_CNTL1 (I2C_REGISTERS_BUS1_BASE_ADDRESS+IICCNTL)
-#define IIC_MDCNTL1 (I2C_REGISTERS_BUS1_BASE_ADDRESS+IICMDCNTL)
-#define IIC_STS1 (I2C_REGISTERS_BUS1_BASE_ADDRESS+IICSTS)
-#define IIC_EXTSTS1 (I2C_REGISTERS_BUS1_BASE_ADDRESS+IICEXTSTS)
-#define IIC_LSADR1 (I2C_REGISTERS_BUS1_BASE_ADDRESS+IICLSADR)
-#define IIC_HSADR1 (I2C_REGISTERS_BUS1_BASE_ADDRESS+IICHSADR)
-#define IIC_CLKDIV1 (I2C_REGISTERS_BUS1_BASE_ADDRESS+IICCLKDIV)
-#define IIC_INTRMSK1 (I2C_REGISTERS_BUS1_BASE_ADDRESS+IICINTRMSK)
-#define IIC_XFRCNT1 (I2C_REGISTERS_BUS1_BASE_ADDRESS+IICXFRCNT)
-#define IIC_XTCNTLSS1 (I2C_REGISTERS_BUS1_BASE_ADDRESS+IICXTCNTLSS)
-#define IIC_DIRECTCNTL1 (I2C_REGISTERS_BUS1_BASE_ADDRESS+IICDIRECTCNTL)
-
-void i2c1_init (int speed, int slaveadd);
-int i2c_probe1 (uchar chip);
-int i2c_read1 (uchar chip, uint addr, int alen, uchar * buffer, int len);
-int i2c_write1 (uchar chip, uint addr, int alen, uchar * buffer, int len);
-uchar i2c_reg_read1(uchar i2c_addr, uchar reg);
-void i2c_reg_write1(uchar i2c_addr, uchar reg, uchar val);
-
-#endif /* CONFIG_HARD_I2C */
diff --git a/board/sandburst/common/sb_common.c b/board/sandburst/common/sb_common.c
deleted file mode 100644
index 353041667f..0000000000
--- a/board/sandburst/common/sb_common.c
+++ /dev/null
@@ -1,451 +0,0 @@
-/*
- * Copyright (C) 2005 Sandburst Corporation
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-#include <config.h>
-#include <common.h>
-#include <command.h>
-#include <asm/processor.h>
-#include <asm/io.h>
-#include <spd_sdram.h>
-#include <i2c.h>
-#include "ppc440gx_i2c.h"
-#include "sb_common.h"
-
-long int fixed_sdram (void);
-
-/*************************************************************************
- * metrobox_get_master
- *
- * PRI_N - active low signal. If the GPIO pin is low we are the master
- *
- ************************************************************************/
-int sbcommon_get_master(void)
-{
- ppc440_gpio_regs_t *gpio_regs;
-
- gpio_regs = (ppc440_gpio_regs_t *)CFG_GPIO_BASE;
-
- if (gpio_regs->in & SBCOMMON_GPIO_PRI_N) {
- return 0;
- }
- else {
- return 1;
- }
-}
-
-/*************************************************************************
- * metrobox_secondary_present
- *
- * Figure out if secondary/slave board is present
- *
- ************************************************************************/
-int sbcommon_secondary_present(void)
-{
- ppc440_gpio_regs_t *gpio_regs;
-
- gpio_regs = (ppc440_gpio_regs_t *)CFG_GPIO_BASE;
-
- if (gpio_regs->in & SBCOMMON_GPIO_SEC_PRES)
- return 0;
- else
- return 1;
-}
-
-/*************************************************************************
- * sbcommon_get_serial_number
- *
- * Retrieve the board serial number via the mac address in eeprom
- *
- ************************************************************************/
-unsigned short sbcommon_get_serial_number(void)
-{
- unsigned char buff[0x100];
- unsigned short sernum;
-
- /* Get the board serial number from eeprom */
- /* Initialize I2C */
- i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
-
- /* Read 256 bytes in EEPROM */
- i2c_read (0x50, 0, 1, buff, 0x100);
-
- memcpy(&sernum, &buff[0xF4], 2);
- sernum /= 32;
-
- return (sernum);
-}
-
-/*************************************************************************
- * sbcommon_fans
- *
- * Spin up fans 2 & 3 to get some air moving. OS will take care
- * of the rest. This is mostly a precaution...
- *
- * Assumes i2c bus 1 is ready.
- *
- ************************************************************************/
-void sbcommon_fans(void)
-{
- /*
- * Attempt to turn on 2 of the fans...
- * Need to go through the bridge
- */
- puts ("FANS: ");
-
- /* select fan4 through the bridge */
- i2c_reg_write1(0x73, /* addr */
- 0x00, /* reg */
- 0x08); /* val = bus 4 */
-
- /* Turn on FAN 4 */
- i2c_reg_write1(0x2e,
- 1,
- 0x80);
-
- i2c_reg_write1(0x2e,
- 0,
- 0x19);
-
- /* Deselect bus 4 on the bridge */
- i2c_reg_write1(0x73,
- 0x00,
- 0x00);
-
- /* select fan3 through the bridge */
- i2c_reg_write1(0x73, /* addr */
- 0x00, /* reg */
- 0x04); /* val = bus 3 */
-
- /* Turn on FAN 3 */
- i2c_reg_write1(0x2e,
- 1,
- 0x80);
-
- i2c_reg_write1(0x2e,
- 0,
- 0x19);
-
- /* Deselect bus 3 on the bridge */
- i2c_reg_write1(0x73,
- 0x00,
- 0x00);
-
- /* select fan2 through the bridge */
- i2c_reg_write1(0x73, /* addr */
- 0x00, /* reg */
- 0x02); /* val = bus 4 */
-
- /* Turn on FAN 2 */
- i2c_reg_write1(0x2e,
- 1,
- 0x80);
-
- i2c_reg_write1(0x2e,
- 0,
- 0x19);
-
- /* Deselect bus 2 on the bridge */
- i2c_reg_write1(0x73,
- 0x00,
- 0x00);
-
- /* select fan1 through the bridge */
- i2c_reg_write1(0x73, /* addr */
- 0x00, /* reg */
- 0x01); /* val = bus 0 */
-
- /* Turn on FAN 1 */
- i2c_reg_write1(0x2e,
- 1,
- 0x80);
-
- i2c_reg_write1(0x2e,
- 0,
- 0x19);
-
- /* Deselect bus 1 on the bridge */
- i2c_reg_write1(0x73,
- 0x00,
- 0x00);
-
- puts ("on\n");
-
- return;
-
-}
-
-/*************************************************************************
- * initdram
- *
- * Initialize sdram
- *
- ************************************************************************/
-long int initdram (int board_type)
-{
- long dram_size = 0;
-
-#if defined(CONFIG_SPD_EEPROM)
- dram_size = spd_sdram (0);
-#else
- dram_size = fixed_sdram ();
-#endif
- return dram_size;
-}
-
-
-/*************************************************************************
- * testdram
- *
- *
- ************************************************************************/
-#if defined(CFG_DRAM_TEST)
-int testdram (void)
-{
- uint *pstart = (uint *) CFG_MEMTEST_START;
- uint *pend = (uint *) CFG_MEMTEST_END;
- uint *p;
-
- printf("Testing SDRAM: ");
- for (p = pstart; p < pend; p++)
- *p = 0xaaaaaaaa;
-
- for (p = pstart; p < pend; p++) {
- if (*p != 0xaaaaaaaa) {
- printf ("SDRAM test fails at: %08x\n", (uint) p);
- return 1;
- }
- }
-
- for (p = pstart; p < pend; p++)
- *p = 0x55555555;
-
- for (p = pstart; p < pend; p++) {
- if (*p != 0x55555555) {
- printf ("SDRAM test fails at: %08x\n", (uint) p);
- return 1;
- }
- }
-
- printf("OK\n");
- return 0;
-}
-#endif
-
-#if !defined(CONFIG_SPD_EEPROM)
-/*************************************************************************
- * fixed sdram init -- doesn't use serial presence detect.
- *
- * Assumes: 128 MB, non-ECC, non-registered
- * PLB @ 133 MHz
- *
- ************************************************************************/
-long int fixed_sdram (void)
-{
- uint reg;
-
- /*--------------------------------------------------------------------
- * Setup some default
- *------------------------------------------------------------------*/
- mtsdram (mem_uabba, 0x00000000); /* ubba=0 (default) */
- mtsdram (mem_slio, 0x00000000); /* rdre=0 wrre=0 rarw=0 */
- mtsdram (mem_devopt, 0x00000000); /* dll=0 ds=0 (normal) */
- mtsdram (mem_wddctr, 0x00000000); /* wrcp=0 dcd=0 */
- mtsdram (mem_clktr, 0x40000000); /* clkp=1 (90 deg wr) dcdt=0 */
-
- /*--------------------------------------------------------------------
- * Setup for board-specific specific mem
- *------------------------------------------------------------------*/
- /*
- * Following for CAS Latency = 2.5 @ 133 MHz PLB
- */
- mtsdram (mem_b0cr, 0x000a4001); /* SDBA=0x000 128MB, Mode 3, enabled */
- mtsdram (mem_tr0, 0x410a4012); /* WR=2 WD=1 CL=2.5 PA=3 CP=4 LD=2 */
- /* RA=10 RD=3 */
- mtsdram (mem_tr1, 0x8080082f); /* SS=T2 SL=STAGE 3 CD=1 CT=0x02f */
- mtsdram (mem_rtr, 0x08200000); /* Rate 15.625 ns @ 133 MHz PLB */
- mtsdram (mem_cfg1, 0x00000000); /* Self-refresh exit, disable PM */
- udelay (400); /* Delay 200 usecs (min) */
-
- /*--------------------------------------------------------------------
- * Enable the controller, then wait for DCEN to complete
- *------------------------------------------------------------------*/
- mtsdram (mem_cfg0, 0x86000000); /* DCEN=1, PMUD=1, 64-bit */
- for (;;) {
- mfsdram (mem_mcsts, reg);
- if (reg & 0x80000000)
- break;
- }
-
- return (128 * 1024 * 1024); /* 128 MB */
-}
-#endif /* !defined(CONFIG_SPD_EEPROM) */
-
-
-/*************************************************************************
- * pci_pre_init
- *
- * This routine is called just prior to registering the hose and gives
- * the board the opportunity to check things. Returning a value of zero
- * indicates that things are bad & PCI initialization should be aborted.
- *
- * Different boards may wish to customize the pci controller structure
- * (add regions, override default access routines, etc) or perform
- * certain pre-initialization actions.
- *
- ************************************************************************/
-#if defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT)
-int pci_pre_init(struct pci_controller * hose )
-{
- unsigned long strap;
-
- /*--------------------------------------------------------------------------+
- * The metrobox is always configured as the host & requires the
- * PCI arbiter to be enabled.
- *--------------------------------------------------------------------------*/
- mfsdr(sdr_sdstp1, strap);
- if( (strap & SDR0_SDSTP1_PAE_MASK) == 0 ){
- printf("PCI: SDR0_STRP1[%08lX] - PCI Arbiter disabled.\n",strap);
- return 0;
- }
-
- return 1;
-}
-#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT) */
-
-/*************************************************************************
- * pci_target_init
- *
- * The bootstrap configuration provides default settings for the pci
- * inbound map (PIM). But the bootstrap config choices are limited and
- * may not be sufficient for a given board.
- *
- ************************************************************************/
-#if defined(CONFIG_PCI) && defined(CFG_PCI_TARGET_INIT)
-void pci_target_init(struct pci_controller * hose )
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- /*--------------------------------------------------------------------------+
- * Disable everything
- *--------------------------------------------------------------------------*/
- out32r( PCIX0_PIM0SA, 0 ); /* disable */
- out32r( PCIX0_PIM1SA, 0 ); /* disable */
- out32r( PCIX0_PIM2SA, 0 ); /* disable */
- out32r( PCIX0_EROMBA, 0 ); /* disable expansion rom */
-
- /*--------------------------------------------------------------------------+
- * Map all of SDRAM to PCI address 0x0000_0000. Note that the 440 strapping
- * options to not support sizes such as 128/256 MB.
- *--------------------------------------------------------------------------*/
- out32r( PCIX0_PIM0LAL, CFG_SDRAM_BASE );
- out32r( PCIX0_PIM0LAH, 0 );
- out32r( PCIX0_PIM0SA, ~(gd->ram_size - 1) | 1 );
-
- out32r( PCIX0_BAR0, 0 );
-
- /*--------------------------------------------------------------------------+
- * Program the board's subsystem id/vendor id
- *--------------------------------------------------------------------------*/
- out16r( PCIX0_SBSYSVID, CFG_PCI_SUBSYS_VENDORID );
- out16r( PCIX0_SBSYSID, CFG_PCI_SUBSYS_DEVICEID );
-
- out16r( PCIX0_CMD, in16r(PCIX0_CMD) | PCI_COMMAND_MEMORY );
-}
-#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_TARGET_INIT) */
-
-
-/*************************************************************************
- * is_pci_host
- *
- *
- ************************************************************************/
-#if defined(CONFIG_PCI)
-int is_pci_host(struct pci_controller *hose)
-{
- /* The metrobox is always configured as host. */
- return(1);
-}
-#endif /* defined(CONFIG_PCI) */
-
-/*************************************************************************
- * board_get_enetaddr
- *
- * Get the ethernet MAC address for the management ethernet from the
- * strap EEPROM. Note that is the BASE address for the range of
- * external ethernet MACs on the board. The base + 31 is the actual
- * mgmt mac address.
- *
- ************************************************************************/
-static int macaddr_idx = 0;
-
-void board_get_enetaddr (uchar * enet)
-{
- int i;
- unsigned short tmp;
- unsigned char buff[0x100], *cp;
-
- if (0 == macaddr_idx) {
-
- /* Initialize I2C */
- i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
-
- /* Read 256 bytes in EEPROM */
- i2c_read (0x50, 0, 1, buff, 0x100);
-
- cp = &buff[0xF0];
-
- for (i = 0; i < 6; i++,cp++)
- enet[i] = *cp;
-
- memcpy(&tmp, &enet[4], 2);
- tmp += 31;
- memcpy(&enet[4], &tmp, 2);
-
- macaddr_idx++;
- } else {
- enet[0] = 0x02;
- enet[1] = 0x00;
- enet[2] = 0x00;
- enet[3] = 0x00;
- enet[4] = 0x00;
- if (1 == sbcommon_get_master() ) {
- /* Master/Primary card */
- enet[5] = 0x01;
- } else {
- /* Slave/Secondary card */
- enet [5] = 0x02;
- }
- }
-
- return;
-}
-
-#ifdef CONFIG_POST
-/*
- * Returns 1 if keys pressed to start the power-on long-running tests
- * Called from board_init_f().
- */
-int post_hotkeys_pressed(void)
-{
-
- return (ctrlc());
-}
-#endif
diff --git a/board/sandburst/common/sb_common.h b/board/sandburst/common/sb_common.h
deleted file mode 100644
index 888e4f01eb..0000000000
--- a/board/sandburst/common/sb_common.h
+++ /dev/null
@@ -1,76 +0,0 @@
-#ifndef __SBCOMMON_H__
-#define __SBCOMMON_H__
-/*
- * Copyright (C) 2005 Sandburst Corporation
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-#include <config.h>
-#include <common.h>
-#include <command.h>
-#include <asm/processor.h>
-#include <asm/io.h>
-#include <spd_sdram.h>
-#include <i2c.h>
-#include "ppc440gx_i2c.h"
-
-/*
- * GPIO Settings
- */
-/* Chassis settings */
-#define SBCOMMON_GPIO_PRI_N 0x00001000 /* 0 = Chassis Master, 1 = Slave */
-#define SBCOMMON_GPIO_SEC_PRES 0x00000800 /* 1 = Other board present */
-
-/* Debug LEDs */
-#define SBCOMMON_GPIO_DBGLED_0 0x00000400
-#define SBCOMMON_GPIO_DBGLED_1 0x00000200
-#define SBCOMMON_GPIO_DBGLED_2 0x00100000
-#define SBCOMMON_GPIO_DBGLED_3 0x00000100
-
-#define SBCOMMON_GPIO_DBGLEDS (SBCOMMON_GPIO_DBGLED_0 | \
- SBCOMMON_GPIO_DBGLED_1 | \
- SBCOMMON_GPIO_DBGLED_2 | \
- SBCOMMON_GPIO_DBGLED_3)
-
-#define SBCOMMON_GPIO_SYS_FAULT 0x00000080
-#define SBCOMMON_GPIO_SYS_OTEMP 0x00000040
-#define SBCOMMON_GPIO_SYS_STATUS 0x00000020
-
-#define SBCOMMON_GPIO_SYS_LEDS (SBCOMMON_GPIO_SYS_STATUS)
-
-#define SBCOMMON_GPIO_LEDS (SBCOMMON_GPIO_DBGLED_0 | \
- SBCOMMON_GPIO_DBGLED_1 | \
- SBCOMMON_GPIO_DBGLED_2 | \
- SBCOMMON_GPIO_DBGLED_3 | \
- SBCOMMON_GPIO_SYS_STATUS)
-
-typedef struct ppc440_gpio_regs {
- volatile unsigned long out;
- volatile unsigned long tri_state;
- volatile unsigned long dummy[4];
- volatile unsigned long open_drain;
- volatile unsigned long in;
-} __attribute__((packed)) ppc440_gpio_regs_t;
-
-int sbcommon_get_master(void);
-int sbcommon_secondary_present(void);
-unsigned short sbcommon_get_serial_number(void);
-void sbcommon_fans(void);
-
-#endif /* __SBCOMMON_H__ */
diff --git a/board/sandburst/karef/Makefile b/board/sandburst/karef/Makefile
deleted file mode 100644
index 8b3173ca1e..0000000000
--- a/board/sandburst/karef/Makefile
+++ /dev/null
@@ -1,59 +0,0 @@
-#
-# (C) Copyright 2005
-# Sandburst Corporation
-# Travis B. Sawyer
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-# TBS: add for debugging purposes
-BUILDUSER := $(shell whoami)
-FORCEBUILD := $(shell rm -f $(LIB) $(BOARD).o)
-
-CFLAGS += -DBUILDUSER='"$(BUILDUSER)"'
-# TBS: end debugging
-
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o ../common/flash.o ../common/ppc440gx_i2c.o \
- ../common/sb_common.o
-
-SOBJS = init.o
-
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend *~
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/sandburst/karef/config.mk b/board/sandburst/karef/config.mk
deleted file mode 100644
index 65c1e48658..0000000000
--- a/board/sandburst/karef/config.mk
+++ /dev/null
@@ -1,43 +0,0 @@
-#
-# (C) Copyright 2005
-# Sandburst Corporation
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# Sandburst Corporation Metrobox Reference Design
-# Travis B. Sawyer
-#
-
-ifeq ($(ramsym),1)
-TEXT_BASE = 0x07FD0000
-else
-TEXT_BASE = 0xFFF80000
-endif
-
-PLATFORM_CPPFLAGS += -DCONFIG_440=1
-
-ifeq ($(debug),1)
-PLATFORM_CPPFLAGS += -DDEBUG
-endif
-
-ifeq ($(dbcr),1)
-PLATFORM_CPPFLAGS += -DCFG_INIT_DBCR=0x8cff0000
-endif
diff --git a/board/sandburst/karef/hal_ka_of_auto.h b/board/sandburst/karef/hal_ka_of_auto.h
deleted file mode 100644
index cc501c99d9..0000000000
--- a/board/sandburst/karef/hal_ka_of_auto.h
+++ /dev/null
@@ -1,324 +0,0 @@
-/* ****************************************************************
- * Common defs for reg spec for chip ka_of
- * Auto-generated by trex2: DO NOT HAND-EDIT!!
- * ****************************************************************
- */
-
-#ifndef HAL_KA_OF_AUTO_H
-#define HAL_KA_OF_AUTO_H
-
-
-/* ----------------------------------------------------------------
- * For block: 'ofem'
- */
-
-/* ---- Block instance addressing (for block-select) */
-#define OFEM_BLOCK_ADDR_BIT_L 6
-#define OFEM_BLOCK_ADDR_BIT_H 9
-#define OFEM_BLOCK_ADDR_WIDTH 4
-
-#define OFEM_ADDR 0x0
-
-/* ---- Reg addressing (within block) */
-#define OFEM_REG_ADDR_BIT_L 2
-#define OFEM_REG_ADDR_BIT_H 5
-#define OFEM_REG_ADDR_WIDTH 4
-
-
-/* ================================================================
- * ---- Register KA_OF_OFEM_REVISION */
-#define SAND_HAL_KA_OF_OFEM_REVISION_OFFSET 0x000
-#ifndef SAND_HAL_KA_OF_OFEM_REVISION_NO_TEST_MASK
-#define SAND_HAL_KA_OF_OFEM_REVISION_NO_TEST_MASK 0x000
-#endif
-#define SAND_HAL_KA_OF_OFEM_REVISION_MASK 0xffffffff
-#define SAND_HAL_KA_OF_OFEM_REVISION_MSB 31
-#define SAND_HAL_KA_OF_OFEM_REVISION_LSB 0
-
-/* ================================================================
- * ---- Register KA_OF_OFEM_RESET */
-#define SAND_HAL_KA_OF_OFEM_RESET_OFFSET 0x004
-#ifndef SAND_HAL_KA_OF_OFEM_RESET_NO_TEST_MASK
-#define SAND_HAL_KA_OF_OFEM_RESET_NO_TEST_MASK 0x000
-#endif
-#define SAND_HAL_KA_OF_OFEM_RESET_MASK 0xffffffff
-#define SAND_HAL_KA_OF_OFEM_RESET_MSB 31
-#define SAND_HAL_KA_OF_OFEM_RESET_LSB 0
-
-/* ================================================================
- * ---- Register KA_OF_OFEM_CNTL */
-#define SAND_HAL_KA_OF_OFEM_CNTL_OFFSET 0x018
-#ifndef SAND_HAL_KA_OF_OFEM_CNTL_NO_TEST_MASK
-#define SAND_HAL_KA_OF_OFEM_CNTL_NO_TEST_MASK 0x000
-#endif
-#define SAND_HAL_KA_OF_OFEM_CNTL_MASK 0xffffffff
-#define SAND_HAL_KA_OF_OFEM_CNTL_MSB 31
-#define SAND_HAL_KA_OF_OFEM_CNTL_LSB 0
-
-/* ================================================================
- * ---- Register KA_OF_OFEM_MAC_FLOW_CTL */
-#define SAND_HAL_KA_OF_OFEM_MAC_FLOW_CTL_OFFSET 0x01c
-#ifndef SAND_HAL_KA_OF_OFEM_MAC_FLOW_CTL_NO_TEST_MASK
-#define SAND_HAL_KA_OF_OFEM_MAC_FLOW_CTL_NO_TEST_MASK 0x000
-#endif
-#define SAND_HAL_KA_OF_OFEM_MAC_FLOW_CTL_MASK 0xffffffff
-#define SAND_HAL_KA_OF_OFEM_MAC_FLOW_CTL_MSB 31
-#define SAND_HAL_KA_OF_OFEM_MAC_FLOW_CTL_LSB 0
-
-/* ================================================================
- * ---- Register KA_OF_OFEM_INTERRUPT */
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_OFFSET 0x008
-#ifndef SAND_HAL_KA_OF_OFEM_INTERRUPT_NO_TEST_MASK
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_NO_TEST_MASK 0x000
-#endif
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MASK 0xffffffff
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MSB 31
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_LSB 0
-
-/* ================================================================
- * ---- Register KA_OF_OFEM_INTERRUPT_MASK */
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MASK_OFFSET 0x00c
-#ifndef SAND_HAL_KA_OF_OFEM_INTERRUPT_MASK_NO_TEST_MASK
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MASK_NO_TEST_MASK 0x000
-#endif
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MASK_MASK 0xffffffff
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MASK_MSB 31
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MASK_LSB 0
-
-/* ================================================================
- * ---- Register KA_OF_OFEM_SCRATCH */
-#define SAND_HAL_KA_OF_OFEM_SCRATCH_OFFSET 0x010
-#ifndef SAND_HAL_KA_OF_OFEM_SCRATCH_NO_TEST_MASK
-#define SAND_HAL_KA_OF_OFEM_SCRATCH_NO_TEST_MASK 0x000
-#endif
-#define SAND_HAL_KA_OF_OFEM_SCRATCH_MASK 0xffffffff
-#define SAND_HAL_KA_OF_OFEM_SCRATCH_MSB 31
-#define SAND_HAL_KA_OF_OFEM_SCRATCH_LSB 0
-
-/* ================================================================
- * ---- Register KA_OF_OFEM_SCRATCH_MASK */
-#define SAND_HAL_KA_OF_OFEM_SCRATCH_MASK_OFFSET 0x014
-#ifndef SAND_HAL_KA_OF_OFEM_SCRATCH_MASK_NO_TEST_MASK
-#define SAND_HAL_KA_OF_OFEM_SCRATCH_MASK_NO_TEST_MASK 0x000
-#endif
-#define SAND_HAL_KA_OF_OFEM_SCRATCH_MASK_MASK 0xffffffff
-#define SAND_HAL_KA_OF_OFEM_SCRATCH_MASK_MSB 31
-#define SAND_HAL_KA_OF_OFEM_SCRATCH_MASK_LSB 0
-
-/* ================================================================
- * Field info for register KA_OF_OFEM_REVISION */
-#define SAND_HAL_KA_OF_OFEM_REVISION_IDENTIFICATION_MASK 0x0000ff00
-#define SAND_HAL_KA_OF_OFEM_REVISION_IDENTIFICATION_SHIFT 8
-#define SAND_HAL_KA_OF_OFEM_REVISION_IDENTIFICATION_MSB 15
-#define SAND_HAL_KA_OF_OFEM_REVISION_IDENTIFICATION_LSB 8
-#define SAND_HAL_KA_OF_OFEM_REVISION_IDENTIFICATION_TYPE (SAND_HAL_TYPE_READ)
-#define SAND_HAL_KA_OF_OFEM_REVISION_IDENTIFICATION_DEFAULT 0x00000024
-#define SAND_HAL_KA_OF_OFEM_REVISION_REVISION_MASK 0x000000ff
-#define SAND_HAL_KA_OF_OFEM_REVISION_REVISION_SHIFT 0
-#define SAND_HAL_KA_OF_OFEM_REVISION_REVISION_MSB 7
-#define SAND_HAL_KA_OF_OFEM_REVISION_REVISION_LSB 0
-#define SAND_HAL_KA_OF_OFEM_REVISION_REVISION_TYPE (SAND_HAL_TYPE_READ)
-#define SAND_HAL_KA_OF_OFEM_REVISION_REVISION_DEFAULT 0x00000000
-
-/* ================================================================
- * Field info for register KA_OF_OFEM_RESET */
-#define SAND_HAL_KA_OF_OFEM_RESET_I2C_MUX0_RESET_N_MASK 0x00000004
-#define SAND_HAL_KA_OF_OFEM_RESET_I2C_MUX0_RESET_N_SHIFT 2
-#define SAND_HAL_KA_OF_OFEM_RESET_I2C_MUX0_RESET_N_MSB 2
-#define SAND_HAL_KA_OF_OFEM_RESET_I2C_MUX0_RESET_N_LSB 2
-#define SAND_HAL_KA_OF_OFEM_RESET_I2C_MUX0_RESET_N_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_OF_OFEM_RESET_I2C_MUX0_RESET_N_DEFAULT 0x00000000
-#define SAND_HAL_KA_OF_OFEM_RESET_LOCH0_RESET_N_MASK 0x00000002
-#define SAND_HAL_KA_OF_OFEM_RESET_LOCH0_RESET_N_SHIFT 1
-#define SAND_HAL_KA_OF_OFEM_RESET_LOCH0_RESET_N_MSB 1
-#define SAND_HAL_KA_OF_OFEM_RESET_LOCH0_RESET_N_LSB 1
-#define SAND_HAL_KA_OF_OFEM_RESET_LOCH0_RESET_N_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_OF_OFEM_RESET_LOCH0_RESET_N_DEFAULT 0x00000000
-#define SAND_HAL_KA_OF_OFEM_RESET_MAC0_RESET_N_MASK 0x00000001
-#define SAND_HAL_KA_OF_OFEM_RESET_MAC0_RESET_N_SHIFT 0
-#define SAND_HAL_KA_OF_OFEM_RESET_MAC0_RESET_N_MSB 0
-#define SAND_HAL_KA_OF_OFEM_RESET_MAC0_RESET_N_LSB 0
-#define SAND_HAL_KA_OF_OFEM_RESET_MAC0_RESET_N_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_OF_OFEM_RESET_MAC0_RESET_N_DEFAULT 0x00000000
-
-/* ================================================================
- * Field info for register KA_OF_OFEM_CNTL */
-#define SAND_HAL_KA_OF_OFEM_CNTL_TEMP_LED_MASK 0x000000c0
-#define SAND_HAL_KA_OF_OFEM_CNTL_TEMP_LED_SHIFT 6
-#define SAND_HAL_KA_OF_OFEM_CNTL_TEMP_LED_MSB 7
-#define SAND_HAL_KA_OF_OFEM_CNTL_TEMP_LED_LSB 6
-#define SAND_HAL_KA_OF_OFEM_CNTL_TEMP_LED_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_OF_OFEM_CNTL_TEMP_LED_DEFAULT 0x00000000
-#define SAND_HAL_KA_OF_OFEM_CNTL_FAULT_LED_MASK 0x00000030
-#define SAND_HAL_KA_OF_OFEM_CNTL_FAULT_LED_SHIFT 4
-#define SAND_HAL_KA_OF_OFEM_CNTL_FAULT_LED_MSB 5
-#define SAND_HAL_KA_OF_OFEM_CNTL_FAULT_LED_LSB 4
-#define SAND_HAL_KA_OF_OFEM_CNTL_FAULT_LED_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_OF_OFEM_CNTL_FAULT_LED_DEFAULT 0x00000000
-#define SAND_HAL_KA_OF_OFEM_CNTL_RS232_R_LED_MASK 0x0000000c
-#define SAND_HAL_KA_OF_OFEM_CNTL_RS232_R_LED_SHIFT 2
-#define SAND_HAL_KA_OF_OFEM_CNTL_RS232_R_LED_MSB 3
-#define SAND_HAL_KA_OF_OFEM_CNTL_RS232_R_LED_LSB 2
-#define SAND_HAL_KA_OF_OFEM_CNTL_RS232_R_LED_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_OF_OFEM_CNTL_RS232_R_LED_DEFAULT 0x00000000
-#define SAND_HAL_KA_OF_OFEM_CNTL_RS232_L_LED_MASK 0x00000003
-#define SAND_HAL_KA_OF_OFEM_CNTL_RS232_L_LED_SHIFT 0
-#define SAND_HAL_KA_OF_OFEM_CNTL_RS232_L_LED_MSB 1
-#define SAND_HAL_KA_OF_OFEM_CNTL_RS232_L_LED_LSB 0
-#define SAND_HAL_KA_OF_OFEM_CNTL_RS232_L_LED_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_OF_OFEM_CNTL_RS232_L_LED_DEFAULT 0x00000000
-
-/* ================================================================
- * Field info for register KA_OF_OFEM_MAC_FLOW_CTL */
-#define SAND_HAL_KA_OF_OFEM_MAC_FLOW_CTL_LOCH_APS_SEL_MASK 0x00000100
-#define SAND_HAL_KA_OF_OFEM_MAC_FLOW_CTL_LOCH_APS_SEL_SHIFT 8
-#define SAND_HAL_KA_OF_OFEM_MAC_FLOW_CTL_LOCH_APS_SEL_MSB 8
-#define SAND_HAL_KA_OF_OFEM_MAC_FLOW_CTL_LOCH_APS_SEL_LSB 8
-#define SAND_HAL_KA_OF_OFEM_MAC_FLOW_CTL_LOCH_APS_SEL_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_OF_OFEM_MAC_FLOW_CTL_LOCH_APS_SEL_DEFAULT 0x00000000
-#define SAND_HAL_KA_OF_OFEM_MAC_FLOW_CTL_MACA_TXPAUSE_FR_MASK 0x00000010
-#define SAND_HAL_KA_OF_OFEM_MAC_FLOW_CTL_MACA_TXPAUSE_FR_SHIFT 4
-#define SAND_HAL_KA_OF_OFEM_MAC_FLOW_CTL_MACA_TXPAUSE_FR_MSB 4
-#define SAND_HAL_KA_OF_OFEM_MAC_FLOW_CTL_MACA_TXPAUSE_FR_LSB 4
-#define SAND_HAL_KA_OF_OFEM_MAC_FLOW_CTL_MACA_TXPAUSE_FR_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_OF_OFEM_MAC_FLOW_CTL_MACA_TXPAUSE_FR_DEFAULT 0x00000000
-#define SAND_HAL_KA_OF_OFEM_MAC_FLOW_CTL_MACA_TXPAUSE_ADDR_MASK 0x0000000f
-#define SAND_HAL_KA_OF_OFEM_MAC_FLOW_CTL_MACA_TXPAUSE_ADDR_SHIFT 0
-#define SAND_HAL_KA_OF_OFEM_MAC_FLOW_CTL_MACA_TXPAUSE_ADDR_MSB 3
-#define SAND_HAL_KA_OF_OFEM_MAC_FLOW_CTL_MACA_TXPAUSE_ADDR_LSB 0
-#define SAND_HAL_KA_OF_OFEM_MAC_FLOW_CTL_MACA_TXPAUSE_ADDR_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_OF_OFEM_MAC_FLOW_CTL_MACA_TXPAUSE_ADDR_DEFAULT 0x00000000
-
-/* ================================================================
- * Field info for register KA_OF_OFEM_INTERRUPT */
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MAC_TIMEOUT_MASK 0x00000100
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MAC_TIMEOUT_SHIFT 8
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MAC_TIMEOUT_MSB 8
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MAC_TIMEOUT_LSB 8
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MAC_TIMEOUT_TYPE (SAND_HAL_TYPE_READ)
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MAC_TIMEOUT_DEFAULT 0x00000000
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_QK_A_LOSOUT_N_MASK 0x00000080
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_QK_A_LOSOUT_N_SHIFT 7
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_QK_A_LOSOUT_N_MSB 7
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_QK_A_LOSOUT_N_LSB 7
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_QK_A_LOSOUT_N_TYPE (SAND_HAL_TYPE_READ)
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_QK_A_LOSOUT_N_DEFAULT 0x00000000
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_QK_B_LOSOUT_N_MASK 0x00000040
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_QK_B_LOSOUT_N_SHIFT 6
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_QK_B_LOSOUT_N_MSB 6
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_QK_B_LOSOUT_N_LSB 6
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_QK_B_LOSOUT_N_TYPE (SAND_HAL_TYPE_READ)
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_QK_B_LOSOUT_N_DEFAULT 0x00000000
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_XFP_A_NR_MASK 0x00000020
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_XFP_A_NR_SHIFT 5
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_XFP_A_NR_MSB 5
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_XFP_A_NR_LSB 5
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_XFP_A_NR_TYPE (SAND_HAL_TYPE_READ)
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_XFP_A_NR_DEFAULT 0x00000000
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_XFP_B_NR_MASK 0x00000010
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_XFP_B_NR_SHIFT 4
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_XFP_B_NR_MSB 4
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_XFP_B_NR_LSB 4
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_XFP_B_NR_TYPE (SAND_HAL_TYPE_READ)
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_XFP_B_NR_DEFAULT 0x00000000
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_XFP_A_INT_N_MASK 0x00000008
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_XFP_A_INT_N_SHIFT 3
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_XFP_A_INT_N_MSB 3
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_XFP_A_INT_N_LSB 3
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_XFP_A_INT_N_TYPE (SAND_HAL_TYPE_READ)
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_XFP_A_INT_N_DEFAULT 0x00000000
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_XFP_B_INT_N_MASK 0x00000004
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_XFP_B_INT_N_SHIFT 2
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_XFP_B_INT_N_MSB 2
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_XFP_B_INT_N_LSB 2
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_XFP_B_INT_N_TYPE (SAND_HAL_TYPE_READ)
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_XFP_B_INT_N_DEFAULT 0x00000000
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MAC1_INT_N_MASK 0x00000002
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MAC1_INT_N_SHIFT 1
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MAC1_INT_N_MSB 1
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MAC1_INT_N_LSB 1
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MAC1_INT_N_TYPE (SAND_HAL_TYPE_READ)
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MAC1_INT_N_DEFAULT 0x00000000
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MAC0_INT_N_MASK 0x00000001
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MAC0_INT_N_SHIFT 0
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MAC0_INT_N_MSB 0
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MAC0_INT_N_LSB 0
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MAC0_INT_N_TYPE (SAND_HAL_TYPE_READ)
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MAC0_INT_N_DEFAULT 0x00000000
-
-/* ================================================================
- * Field info for register KA_OF_OFEM_INTERRUPT_MASK */
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MASK_MAC_TIMEOUT_DISINT_MASK 0x00000100
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MASK_MAC_TIMEOUT_DISINT_SHIFT 8
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MASK_MAC_TIMEOUT_DISINT_MSB 8
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MASK_MAC_TIMEOUT_DISINT_LSB 8
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MASK_MAC_TIMEOUT_DISINT_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MASK_MAC_TIMEOUT_DISINT_DEFAULT 0x00000001
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MASK_QK_A_LOSOUT_N_DISINT_MASK 0x00000080
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MASK_QK_A_LOSOUT_N_DISINT_SHIFT 7
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MASK_QK_A_LOSOUT_N_DISINT_MSB 7
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MASK_QK_A_LOSOUT_N_DISINT_LSB 7
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MASK_QK_A_LOSOUT_N_DISINT_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MASK_QK_A_LOSOUT_N_DISINT_DEFAULT 0x00000001
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MASK_QK_B_LOSOUT_N_DISINT_MASK 0x00000040
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MASK_QK_B_LOSOUT_N_DISINT_SHIFT 6
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MASK_QK_B_LOSOUT_N_DISINT_MSB 6
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MASK_QK_B_LOSOUT_N_DISINT_LSB 6
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MASK_QK_B_LOSOUT_N_DISINT_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MASK_QK_B_LOSOUT_N_DISINT_DEFAULT 0x00000001
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MASK_XFP_A_NR_DISINT_MASK 0x00000020
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MASK_XFP_A_NR_DISINT_SHIFT 5
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MASK_XFP_A_NR_DISINT_MSB 5
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MASK_XFP_A_NR_DISINT_LSB 5
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MASK_XFP_A_NR_DISINT_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MASK_XFP_A_NR_DISINT_DEFAULT 0x00000001
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MASK_XFP_B_NR_DISINT_MASK 0x00000010
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MASK_XFP_B_NR_DISINT_SHIFT 4
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MASK_XFP_B_NR_DISINT_MSB 4
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MASK_XFP_B_NR_DISINT_LSB 4
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MASK_XFP_B_NR_DISINT_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MASK_XFP_B_NR_DISINT_DEFAULT 0x00000001
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MASK_XFP_A_INT_N_DISINT_MASK 0x00000008
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MASK_XFP_A_INT_N_DISINT_SHIFT 3
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MASK_XFP_A_INT_N_DISINT_MSB 3
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MASK_XFP_A_INT_N_DISINT_LSB 3
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MASK_XFP_A_INT_N_DISINT_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MASK_XFP_A_INT_N_DISINT_DEFAULT 0x00000001
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MASK_XFP_B_INT_N_DISINT_MASK 0x00000004
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MASK_XFP_B_INT_N_DISINT_SHIFT 2
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MASK_XFP_B_INT_N_DISINT_MSB 2
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MASK_XFP_B_INT_N_DISINT_LSB 2
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MASK_XFP_B_INT_N_DISINT_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MASK_XFP_B_INT_N_DISINT_DEFAULT 0x00000001
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MASK_MAC1_INT_N_DISINT_MASK 0x00000002
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MASK_MAC1_INT_N_DISINT_SHIFT 1
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MASK_MAC1_INT_N_DISINT_MSB 1
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MASK_MAC1_INT_N_DISINT_LSB 1
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MASK_MAC1_INT_N_DISINT_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MASK_MAC1_INT_N_DISINT_DEFAULT 0x00000001
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MASK_MAC0_INT_N_DISINT_MASK 0x00000001
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MASK_MAC0_INT_N_DISINT_SHIFT 0
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MASK_MAC0_INT_N_DISINT_MSB 0
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MASK_MAC0_INT_N_DISINT_LSB 0
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MASK_MAC0_INT_N_DISINT_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_OF_OFEM_INTERRUPT_MASK_MAC0_INT_N_DISINT_DEFAULT 0x00000001
-
-/* ================================================================
- * Field info for register KA_OF_OFEM_SCRATCH */
-#define SAND_HAL_KA_OF_OFEM_SCRATCH_TEST_BITS_MASK 0xffffffff
-#define SAND_HAL_KA_OF_OFEM_SCRATCH_TEST_BITS_SHIFT 0
-#define SAND_HAL_KA_OF_OFEM_SCRATCH_TEST_BITS_MSB 31
-#define SAND_HAL_KA_OF_OFEM_SCRATCH_TEST_BITS_LSB 0
-#define SAND_HAL_KA_OF_OFEM_SCRATCH_TEST_BITS_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_OF_OFEM_SCRATCH_TEST_BITS_DEFAULT 0x00000000
-
-/* ================================================================
- * Field info for register KA_OF_OFEM_SCRATCH_MASK */
-#define SAND_HAL_KA_OF_OFEM_SCRATCH_MASK_TEST_BITS_DISINT_MASK 0xffffffff
-#define SAND_HAL_KA_OF_OFEM_SCRATCH_MASK_TEST_BITS_DISINT_SHIFT 0
-#define SAND_HAL_KA_OF_OFEM_SCRATCH_MASK_TEST_BITS_DISINT_MSB 31
-#define SAND_HAL_KA_OF_OFEM_SCRATCH_MASK_TEST_BITS_DISINT_LSB 0
-#define SAND_HAL_KA_OF_OFEM_SCRATCH_MASK_TEST_BITS_DISINT_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_OF_OFEM_SCRATCH_MASK_TEST_BITS_DISINT_DEFAULT 0xffffffff
-
-#endif /* matches #ifndef HAL_KA_OF_AUTO_H */
diff --git a/board/sandburst/karef/hal_ka_sc_auto.h b/board/sandburst/karef/hal_ka_sc_auto.h
deleted file mode 100644
index db1cec246a..0000000000
--- a/board/sandburst/karef/hal_ka_sc_auto.h
+++ /dev/null
@@ -1,836 +0,0 @@
-/* ****************************************************************
- * Common defs for reg spec for chip ka_sc
- * Auto-generated by trex2: DO NOT HAND-EDIT!!
- * ****************************************************************
- */
-
-#ifndef HAL_KA_SC_AUTO_H
-#define HAL_KA_SC_AUTO_H
-
-
-/* ----------------------------------------------------------------
- * For block: 'scan'
- */
-
-/* ---- Block instance addressing (for block-select) */
-#define SCAN_BLOCK_ADDR_BIT_L 7
-#define SCAN_BLOCK_ADDR_BIT_H 9
-#define SCAN_BLOCK_ADDR_WIDTH 3
-
-#define SCAN_ADDR 0x0
-
-/* ---- Reg addressing (within block) */
-#define SCAN_REG_ADDR_BIT_L 2
-#define SCAN_REG_ADDR_BIT_H 6
-#define SCAN_REG_ADDR_WIDTH 5
-
-
-/* ================================================================
- * ---- Register KA_SC_SCAN_REVISION */
-#define SAND_HAL_KA_SC_SCAN_REVISION_OFFSET 0x000
-#ifndef SAND_HAL_KA_SC_SCAN_REVISION_NO_TEST_MASK
-#define SAND_HAL_KA_SC_SCAN_REVISION_NO_TEST_MASK 0x000
-#endif
-#define SAND_HAL_KA_SC_SCAN_REVISION_MASK 0xffffffff
-#define SAND_HAL_KA_SC_SCAN_REVISION_MSB 31
-#define SAND_HAL_KA_SC_SCAN_REVISION_LSB 0
-
-/* ================================================================
- * ---- Register KA_SC_SCAN_RESET */
-#define SAND_HAL_KA_SC_SCAN_RESET_OFFSET 0x004
-#ifndef SAND_HAL_KA_SC_SCAN_RESET_NO_TEST_MASK
-#define SAND_HAL_KA_SC_SCAN_RESET_NO_TEST_MASK 0x000
-#endif
-#define SAND_HAL_KA_SC_SCAN_RESET_MASK 0xffffffff
-#define SAND_HAL_KA_SC_SCAN_RESET_MSB 31
-#define SAND_HAL_KA_SC_SCAN_RESET_LSB 0
-
-/* ================================================================
- * ---- Register KA_SC_SCAN_STATUS */
-#define SAND_HAL_KA_SC_SCAN_STATUS_OFFSET 0x008
-#ifndef SAND_HAL_KA_SC_SCAN_STATUS_NO_TEST_MASK
-#define SAND_HAL_KA_SC_SCAN_STATUS_NO_TEST_MASK 0x000
-#endif
-#define SAND_HAL_KA_SC_SCAN_STATUS_MASK 0xffffffff
-#define SAND_HAL_KA_SC_SCAN_STATUS_MSB 31
-#define SAND_HAL_KA_SC_SCAN_STATUS_LSB 0
-
-/* ================================================================
- * ---- Register KA_SC_SCAN_CNTL */
-#define SAND_HAL_KA_SC_SCAN_CNTL_OFFSET 0x01c
-#ifndef SAND_HAL_KA_SC_SCAN_CNTL_NO_TEST_MASK
-#define SAND_HAL_KA_SC_SCAN_CNTL_NO_TEST_MASK 0x000
-#endif
-#define SAND_HAL_KA_SC_SCAN_CNTL_MASK 0xffffffff
-#define SAND_HAL_KA_SC_SCAN_CNTL_MSB 31
-#define SAND_HAL_KA_SC_SCAN_CNTL_LSB 0
-
-/* ================================================================
- * ---- Register KA_SC_SCAN_BRD_INFO */
-#define SAND_HAL_KA_SC_SCAN_BRD_INFO_OFFSET 0x020
-#ifndef SAND_HAL_KA_SC_SCAN_BRD_INFO_NO_TEST_MASK
-#define SAND_HAL_KA_SC_SCAN_BRD_INFO_NO_TEST_MASK 0x000
-#endif
-#define SAND_HAL_KA_SC_SCAN_BRD_INFO_MASK 0xffffffff
-#define SAND_HAL_KA_SC_SCAN_BRD_INFO_MSB 31
-#define SAND_HAL_KA_SC_SCAN_BRD_INFO_LSB 0
-
-/* ================================================================
- * ---- Register KA_SC_SCAN_SCAN_FROM_0 */
-#define SAND_HAL_KA_SC_SCAN_SCAN_FROM_0_OFFSET 0x024
-#ifndef SAND_HAL_KA_SC_SCAN_SCAN_FROM_0_NO_TEST_MASK
-#define SAND_HAL_KA_SC_SCAN_SCAN_FROM_0_NO_TEST_MASK 0x000
-#endif
-#define SAND_HAL_KA_SC_SCAN_SCAN_FROM_0_MASK 0xffffffff
-#define SAND_HAL_KA_SC_SCAN_SCAN_FROM_0_MSB 31
-#define SAND_HAL_KA_SC_SCAN_SCAN_FROM_0_LSB 0
-
-/* ================================================================
- * ---- Register KA_SC_SCAN_SCAN_FROM_1 */
-#define SAND_HAL_KA_SC_SCAN_SCAN_FROM_1_OFFSET 0x028
-#ifndef SAND_HAL_KA_SC_SCAN_SCAN_FROM_1_NO_TEST_MASK
-#define SAND_HAL_KA_SC_SCAN_SCAN_FROM_1_NO_TEST_MASK 0x000
-#endif
-#define SAND_HAL_KA_SC_SCAN_SCAN_FROM_1_MASK 0xffffffff
-#define SAND_HAL_KA_SC_SCAN_SCAN_FROM_1_MSB 31
-#define SAND_HAL_KA_SC_SCAN_SCAN_FROM_1_LSB 0
-
-/* ================================================================
- * ---- Register KA_SC_SCAN_SCAN_TO_0 */
-#define SAND_HAL_KA_SC_SCAN_SCAN_TO_0_OFFSET 0x02c
-#ifndef SAND_HAL_KA_SC_SCAN_SCAN_TO_0_NO_TEST_MASK
-#define SAND_HAL_KA_SC_SCAN_SCAN_TO_0_NO_TEST_MASK 0x000
-#endif
-#define SAND_HAL_KA_SC_SCAN_SCAN_TO_0_MASK 0xffffffff
-#define SAND_HAL_KA_SC_SCAN_SCAN_TO_0_MSB 31
-#define SAND_HAL_KA_SC_SCAN_SCAN_TO_0_LSB 0
-
-/* ================================================================
- * ---- Register KA_SC_SCAN_SCAN_TO_1 */
-#define SAND_HAL_KA_SC_SCAN_SCAN_TO_1_OFFSET 0x030
-#ifndef SAND_HAL_KA_SC_SCAN_SCAN_TO_1_NO_TEST_MASK
-#define SAND_HAL_KA_SC_SCAN_SCAN_TO_1_NO_TEST_MASK 0x000
-#endif
-#define SAND_HAL_KA_SC_SCAN_SCAN_TO_1_MASK 0xffffffff
-#define SAND_HAL_KA_SC_SCAN_SCAN_TO_1_MSB 31
-#define SAND_HAL_KA_SC_SCAN_SCAN_TO_1_LSB 0
-
-/* ================================================================
- * ---- Register KA_SC_SCAN_SCAN_CTRL */
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_OFFSET 0x034
-#ifndef SAND_HAL_KA_SC_SCAN_SCAN_CTRL_NO_TEST_MASK
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_NO_TEST_MASK 0x000
-#endif
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_MASK 0xffffffff
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_MSB 31
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_LSB 0
-
-/* ================================================================
- * ---- Register KA_SC_SCAN_PLL_CTRL */
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_OFFSET 0x038
-#ifndef SAND_HAL_KA_SC_SCAN_PLL_CTRL_NO_TEST_MASK
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_NO_TEST_MASK 0x000
-#endif
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_MASK 0xffffffff
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_MSB 31
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_LSB 0
-
-/* ================================================================
- * ---- Register KA_SC_SCAN_CORE_CLK_COUNT */
-#define SAND_HAL_KA_SC_SCAN_CORE_CLK_COUNT_OFFSET 0x03c
-#ifndef SAND_HAL_KA_SC_SCAN_CORE_CLK_COUNT_NO_TEST_MASK
-#define SAND_HAL_KA_SC_SCAN_CORE_CLK_COUNT_NO_TEST_MASK 0x000
-#endif
-#define SAND_HAL_KA_SC_SCAN_CORE_CLK_COUNT_MASK 0xffffffff
-#define SAND_HAL_KA_SC_SCAN_CORE_CLK_COUNT_MSB 31
-#define SAND_HAL_KA_SC_SCAN_CORE_CLK_COUNT_LSB 0
-
-/* ================================================================
- * ---- Register KA_SC_SCAN_DR_CLK_COUNT */
-#define SAND_HAL_KA_SC_SCAN_DR_CLK_COUNT_OFFSET 0x040
-#ifndef SAND_HAL_KA_SC_SCAN_DR_CLK_COUNT_NO_TEST_MASK
-#define SAND_HAL_KA_SC_SCAN_DR_CLK_COUNT_NO_TEST_MASK 0x000
-#endif
-#define SAND_HAL_KA_SC_SCAN_DR_CLK_COUNT_MASK 0xffffffff
-#define SAND_HAL_KA_SC_SCAN_DR_CLK_COUNT_MSB 31
-#define SAND_HAL_KA_SC_SCAN_DR_CLK_COUNT_LSB 0
-
-/* ================================================================
- * ---- Register KA_SC_SCAN_SPI_CLK_COUNT */
-#define SAND_HAL_KA_SC_SCAN_SPI_CLK_COUNT_OFFSET 0x044
-#ifndef SAND_HAL_KA_SC_SCAN_SPI_CLK_COUNT_NO_TEST_MASK
-#define SAND_HAL_KA_SC_SCAN_SPI_CLK_COUNT_NO_TEST_MASK 0x000
-#endif
-#define SAND_HAL_KA_SC_SCAN_SPI_CLK_COUNT_MASK 0xffffffff
-#define SAND_HAL_KA_SC_SCAN_SPI_CLK_COUNT_MSB 31
-#define SAND_HAL_KA_SC_SCAN_SPI_CLK_COUNT_LSB 0
-
-/* ================================================================
- * ---- Register KA_SC_SCAN_BRD_BRD_OUT_DATA */
-#define SAND_HAL_KA_SC_SCAN_BRD_BRD_OUT_DATA_OFFSET 0x048
-#ifndef SAND_HAL_KA_SC_SCAN_BRD_BRD_OUT_DATA_NO_TEST_MASK
-#define SAND_HAL_KA_SC_SCAN_BRD_BRD_OUT_DATA_NO_TEST_MASK 0x000
-#endif
-#define SAND_HAL_KA_SC_SCAN_BRD_BRD_OUT_DATA_MASK 0xffffffff
-#define SAND_HAL_KA_SC_SCAN_BRD_BRD_OUT_DATA_MSB 31
-#define SAND_HAL_KA_SC_SCAN_BRD_BRD_OUT_DATA_LSB 0
-
-/* ================================================================
- * ---- Register KA_SC_SCAN_BRD_BRD_OUT_ENABLE */
-#define SAND_HAL_KA_SC_SCAN_BRD_BRD_OUT_ENABLE_OFFSET 0x04c
-#ifndef SAND_HAL_KA_SC_SCAN_BRD_BRD_OUT_ENABLE_NO_TEST_MASK
-#define SAND_HAL_KA_SC_SCAN_BRD_BRD_OUT_ENABLE_NO_TEST_MASK 0x000
-#endif
-#define SAND_HAL_KA_SC_SCAN_BRD_BRD_OUT_ENABLE_MASK 0xffffffff
-#define SAND_HAL_KA_SC_SCAN_BRD_BRD_OUT_ENABLE_MSB 31
-#define SAND_HAL_KA_SC_SCAN_BRD_BRD_OUT_ENABLE_LSB 0
-
-/* ================================================================
- * ---- Register KA_SC_SCAN_BRD_BRD_IN */
-#define SAND_HAL_KA_SC_SCAN_BRD_BRD_IN_OFFSET 0x050
-#ifndef SAND_HAL_KA_SC_SCAN_BRD_BRD_IN_NO_TEST_MASK
-#define SAND_HAL_KA_SC_SCAN_BRD_BRD_IN_NO_TEST_MASK 0x000
-#endif
-#define SAND_HAL_KA_SC_SCAN_BRD_BRD_IN_MASK 0xffffffff
-#define SAND_HAL_KA_SC_SCAN_BRD_BRD_IN_MSB 31
-#define SAND_HAL_KA_SC_SCAN_BRD_BRD_IN_LSB 0
-
-/* ================================================================
- * ---- Register KA_SC_SCAN_MISC */
-#define SAND_HAL_KA_SC_SCAN_MISC_OFFSET 0x054
-#ifndef SAND_HAL_KA_SC_SCAN_MISC_NO_TEST_MASK
-#define SAND_HAL_KA_SC_SCAN_MISC_NO_TEST_MASK 0x000
-#endif
-#define SAND_HAL_KA_SC_SCAN_MISC_MASK 0xffffffff
-#define SAND_HAL_KA_SC_SCAN_MISC_MSB 31
-#define SAND_HAL_KA_SC_SCAN_MISC_LSB 0
-
-/* ================================================================
- * ---- Register KA_SC_SCAN_INTERRUPT */
-#define SAND_HAL_KA_SC_SCAN_INTERRUPT_OFFSET 0x00c
-#ifndef SAND_HAL_KA_SC_SCAN_INTERRUPT_NO_TEST_MASK
-#define SAND_HAL_KA_SC_SCAN_INTERRUPT_NO_TEST_MASK 0x000
-#endif
-#define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK 0xffffffff
-#define SAND_HAL_KA_SC_SCAN_INTERRUPT_MSB 31
-#define SAND_HAL_KA_SC_SCAN_INTERRUPT_LSB 0
-
-/* ================================================================
- * ---- Register KA_SC_SCAN_INTERRUPT_MASK */
-#define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_OFFSET 0x010
-#ifndef SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_NO_TEST_MASK
-#define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_NO_TEST_MASK 0x000
-#endif
-#define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_MASK 0xffffffff
-#define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_MSB 31
-#define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_LSB 0
-
-/* ================================================================
- * ---- Register KA_SC_SCAN_SCRATCH */
-#define SAND_HAL_KA_SC_SCAN_SCRATCH_OFFSET 0x014
-#ifndef SAND_HAL_KA_SC_SCAN_SCRATCH_NO_TEST_MASK
-#define SAND_HAL_KA_SC_SCAN_SCRATCH_NO_TEST_MASK 0x000
-#endif
-#define SAND_HAL_KA_SC_SCAN_SCRATCH_MASK 0xffffffff
-#define SAND_HAL_KA_SC_SCAN_SCRATCH_MSB 31
-#define SAND_HAL_KA_SC_SCAN_SCRATCH_LSB 0
-
-/* ================================================================
- * ---- Register KA_SC_SCAN_SCRATCH_MASK */
-#define SAND_HAL_KA_SC_SCAN_SCRATCH_MASK_OFFSET 0x018
-#ifndef SAND_HAL_KA_SC_SCAN_SCRATCH_MASK_NO_TEST_MASK
-#define SAND_HAL_KA_SC_SCAN_SCRATCH_MASK_NO_TEST_MASK 0x000
-#endif
-#define SAND_HAL_KA_SC_SCAN_SCRATCH_MASK_MASK 0xffffffff
-#define SAND_HAL_KA_SC_SCAN_SCRATCH_MASK_MSB 31
-#define SAND_HAL_KA_SC_SCAN_SCRATCH_MASK_LSB 0
-
-/* ================================================================
- * Field info for register KA_SC_SCAN_REVISION */
-#define SAND_HAL_KA_SC_SCAN_REVISION_IDENTIFICATION_MASK 0x0000ff00
-#define SAND_HAL_KA_SC_SCAN_REVISION_IDENTIFICATION_SHIFT 8
-#define SAND_HAL_KA_SC_SCAN_REVISION_IDENTIFICATION_MSB 15
-#define SAND_HAL_KA_SC_SCAN_REVISION_IDENTIFICATION_LSB 8
-#define SAND_HAL_KA_SC_SCAN_REVISION_IDENTIFICATION_TYPE (SAND_HAL_TYPE_READ)
-#define SAND_HAL_KA_SC_SCAN_REVISION_IDENTIFICATION_DEFAULT 0x00000023
-#define SAND_HAL_KA_SC_SCAN_REVISION_REVISION_MASK 0x000000ff
-#define SAND_HAL_KA_SC_SCAN_REVISION_REVISION_SHIFT 0
-#define SAND_HAL_KA_SC_SCAN_REVISION_REVISION_MSB 7
-#define SAND_HAL_KA_SC_SCAN_REVISION_REVISION_LSB 0
-#define SAND_HAL_KA_SC_SCAN_REVISION_REVISION_TYPE (SAND_HAL_TYPE_READ)
-#define SAND_HAL_KA_SC_SCAN_REVISION_REVISION_DEFAULT 0x00000000
-
-/* ================================================================
- * Field info for register KA_SC_SCAN_RESET */
-#define SAND_HAL_KA_SC_SCAN_RESET_CF_RESET_N_MASK 0x00000200
-#define SAND_HAL_KA_SC_SCAN_RESET_CF_RESET_N_SHIFT 9
-#define SAND_HAL_KA_SC_SCAN_RESET_CF_RESET_N_MSB 9
-#define SAND_HAL_KA_SC_SCAN_RESET_CF_RESET_N_LSB 9
-#define SAND_HAL_KA_SC_SCAN_RESET_CF_RESET_N_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_SC_SCAN_RESET_CF_RESET_N_DEFAULT 0x00000000
-#define SAND_HAL_KA_SC_SCAN_RESET_BME_RESET_N_MASK 0x00000100
-#define SAND_HAL_KA_SC_SCAN_RESET_BME_RESET_N_SHIFT 8
-#define SAND_HAL_KA_SC_SCAN_RESET_BME_RESET_N_MSB 8
-#define SAND_HAL_KA_SC_SCAN_RESET_BME_RESET_N_LSB 8
-#define SAND_HAL_KA_SC_SCAN_RESET_BME_RESET_N_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_SC_SCAN_RESET_BME_RESET_N_DEFAULT 0x00000000
-#define SAND_HAL_KA_SC_SCAN_RESET_KA_RESET_N_MASK 0x00000080
-#define SAND_HAL_KA_SC_SCAN_RESET_KA_RESET_N_SHIFT 7
-#define SAND_HAL_KA_SC_SCAN_RESET_KA_RESET_N_MSB 7
-#define SAND_HAL_KA_SC_SCAN_RESET_KA_RESET_N_LSB 7
-#define SAND_HAL_KA_SC_SCAN_RESET_KA_RESET_N_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_SC_SCAN_RESET_KA_RESET_N_DEFAULT 0x00000000
-#define SAND_HAL_KA_SC_SCAN_RESET_SLAVE_RESET_N_MASK 0x00000040
-#define SAND_HAL_KA_SC_SCAN_RESET_SLAVE_RESET_N_SHIFT 6
-#define SAND_HAL_KA_SC_SCAN_RESET_SLAVE_RESET_N_MSB 6
-#define SAND_HAL_KA_SC_SCAN_RESET_SLAVE_RESET_N_LSB 6
-#define SAND_HAL_KA_SC_SCAN_RESET_SLAVE_RESET_N_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_SC_SCAN_RESET_SLAVE_RESET_N_DEFAULT 0x00000000
-#define SAND_HAL_KA_SC_SCAN_RESET_OFEM_RESET_N_MASK 0x00000020
-#define SAND_HAL_KA_SC_SCAN_RESET_OFEM_RESET_N_SHIFT 5
-#define SAND_HAL_KA_SC_SCAN_RESET_OFEM_RESET_N_MSB 5
-#define SAND_HAL_KA_SC_SCAN_RESET_OFEM_RESET_N_LSB 5
-#define SAND_HAL_KA_SC_SCAN_RESET_OFEM_RESET_N_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_SC_SCAN_RESET_OFEM_RESET_N_DEFAULT 0x00000000
-#define SAND_HAL_KA_SC_SCAN_RESET_IFE_A_RESET_N_MASK 0x00000010
-#define SAND_HAL_KA_SC_SCAN_RESET_IFE_A_RESET_N_SHIFT 4
-#define SAND_HAL_KA_SC_SCAN_RESET_IFE_A_RESET_N_MSB 4
-#define SAND_HAL_KA_SC_SCAN_RESET_IFE_A_RESET_N_LSB 4
-#define SAND_HAL_KA_SC_SCAN_RESET_IFE_A_RESET_N_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_SC_SCAN_RESET_IFE_A_RESET_N_DEFAULT 0x00000000
-#define SAND_HAL_KA_SC_SCAN_RESET_I2C_MUX1_RESET_N_MASK 0x00000008
-#define SAND_HAL_KA_SC_SCAN_RESET_I2C_MUX1_RESET_N_SHIFT 3
-#define SAND_HAL_KA_SC_SCAN_RESET_I2C_MUX1_RESET_N_MSB 3
-#define SAND_HAL_KA_SC_SCAN_RESET_I2C_MUX1_RESET_N_LSB 3
-#define SAND_HAL_KA_SC_SCAN_RESET_I2C_MUX1_RESET_N_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_SC_SCAN_RESET_I2C_MUX1_RESET_N_DEFAULT 0x00000000
-#define SAND_HAL_KA_SC_SCAN_RESET_PHY0_RESET_N_MASK 0x00000002
-#define SAND_HAL_KA_SC_SCAN_RESET_PHY0_RESET_N_SHIFT 1
-#define SAND_HAL_KA_SC_SCAN_RESET_PHY0_RESET_N_MSB 1
-#define SAND_HAL_KA_SC_SCAN_RESET_PHY0_RESET_N_LSB 1
-#define SAND_HAL_KA_SC_SCAN_RESET_PHY0_RESET_N_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_SC_SCAN_RESET_PHY0_RESET_N_DEFAULT 0x00000000
-#define SAND_HAL_KA_SC_SCAN_RESET_PHY1_RESET_N_MASK 0x00000001
-#define SAND_HAL_KA_SC_SCAN_RESET_PHY1_RESET_N_SHIFT 0
-#define SAND_HAL_KA_SC_SCAN_RESET_PHY1_RESET_N_MSB 0
-#define SAND_HAL_KA_SC_SCAN_RESET_PHY1_RESET_N_LSB 0
-#define SAND_HAL_KA_SC_SCAN_RESET_PHY1_RESET_N_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_SC_SCAN_RESET_PHY1_RESET_N_DEFAULT 0x00000000
-
-/* ================================================================
- * Field info for register KA_SC_SCAN_STATUS */
-#define SAND_HAL_KA_SC_SCAN_STATUS_SPI_LOCK_MASK 0x00000040
-#define SAND_HAL_KA_SC_SCAN_STATUS_SPI_LOCK_SHIFT 6
-#define SAND_HAL_KA_SC_SCAN_STATUS_SPI_LOCK_MSB 6
-#define SAND_HAL_KA_SC_SCAN_STATUS_SPI_LOCK_LSB 6
-#define SAND_HAL_KA_SC_SCAN_STATUS_SPI_LOCK_TYPE (SAND_HAL_TYPE_READ)
-#define SAND_HAL_KA_SC_SCAN_STATUS_SPI_LOCK_DEFAULT 0x00000000
-#define SAND_HAL_KA_SC_SCAN_STATUS_DR_LOCK_MASK 0x00000020
-#define SAND_HAL_KA_SC_SCAN_STATUS_DR_LOCK_SHIFT 5
-#define SAND_HAL_KA_SC_SCAN_STATUS_DR_LOCK_MSB 5
-#define SAND_HAL_KA_SC_SCAN_STATUS_DR_LOCK_LSB 5
-#define SAND_HAL_KA_SC_SCAN_STATUS_DR_LOCK_TYPE (SAND_HAL_TYPE_READ)
-#define SAND_HAL_KA_SC_SCAN_STATUS_DR_LOCK_DEFAULT 0x00000000
-#define SAND_HAL_KA_SC_SCAN_STATUS_CORE_LOCK_MASK 0x00000010
-#define SAND_HAL_KA_SC_SCAN_STATUS_CORE_LOCK_SHIFT 4
-#define SAND_HAL_KA_SC_SCAN_STATUS_CORE_LOCK_MSB 4
-#define SAND_HAL_KA_SC_SCAN_STATUS_CORE_LOCK_LSB 4
-#define SAND_HAL_KA_SC_SCAN_STATUS_CORE_LOCK_TYPE (SAND_HAL_TYPE_READ)
-#define SAND_HAL_KA_SC_SCAN_STATUS_CORE_LOCK_DEFAULT 0x00000000
-#define SAND_HAL_KA_SC_SCAN_STATUS_OFEM_DONE_MASK 0x00000008
-#define SAND_HAL_KA_SC_SCAN_STATUS_OFEM_DONE_SHIFT 3
-#define SAND_HAL_KA_SC_SCAN_STATUS_OFEM_DONE_MSB 3
-#define SAND_HAL_KA_SC_SCAN_STATUS_OFEM_DONE_LSB 3
-#define SAND_HAL_KA_SC_SCAN_STATUS_OFEM_DONE_TYPE (SAND_HAL_TYPE_READ)
-#define SAND_HAL_KA_SC_SCAN_STATUS_OFEM_DONE_DEFAULT 0x00000000
-#define SAND_HAL_KA_SC_SCAN_STATUS_PS_A_PRES_N_MASK 0x00000004
-#define SAND_HAL_KA_SC_SCAN_STATUS_PS_A_PRES_N_SHIFT 2
-#define SAND_HAL_KA_SC_SCAN_STATUS_PS_A_PRES_N_MSB 2
-#define SAND_HAL_KA_SC_SCAN_STATUS_PS_A_PRES_N_LSB 2
-#define SAND_HAL_KA_SC_SCAN_STATUS_PS_A_PRES_N_TYPE (SAND_HAL_TYPE_READ)
-#define SAND_HAL_KA_SC_SCAN_STATUS_PS_A_PRES_N_DEFAULT 0x00000000
-#define SAND_HAL_KA_SC_SCAN_STATUS_PS_B_PRES_N_MASK 0x00000002
-#define SAND_HAL_KA_SC_SCAN_STATUS_PS_B_PRES_N_SHIFT 1
-#define SAND_HAL_KA_SC_SCAN_STATUS_PS_B_PRES_N_MSB 1
-#define SAND_HAL_KA_SC_SCAN_STATUS_PS_B_PRES_N_LSB 1
-#define SAND_HAL_KA_SC_SCAN_STATUS_PS_B_PRES_N_TYPE (SAND_HAL_TYPE_READ)
-#define SAND_HAL_KA_SC_SCAN_STATUS_PS_B_PRES_N_DEFAULT 0x00000000
-#define SAND_HAL_KA_SC_SCAN_STATUS_ALL_GOOD_MASK 0x00000001
-#define SAND_HAL_KA_SC_SCAN_STATUS_ALL_GOOD_SHIFT 0
-#define SAND_HAL_KA_SC_SCAN_STATUS_ALL_GOOD_MSB 0
-#define SAND_HAL_KA_SC_SCAN_STATUS_ALL_GOOD_LSB 0
-#define SAND_HAL_KA_SC_SCAN_STATUS_ALL_GOOD_TYPE (SAND_HAL_TYPE_READ)
-#define SAND_HAL_KA_SC_SCAN_STATUS_ALL_GOOD_DEFAULT 0x00000000
-
-/* ================================================================
- * Field info for register KA_SC_SCAN_CNTL */
-#define SAND_HAL_KA_SC_SCAN_CNTL_SW_PWR_DOWN_MASK 0x00000400
-#define SAND_HAL_KA_SC_SCAN_CNTL_SW_PWR_DOWN_SHIFT 10
-#define SAND_HAL_KA_SC_SCAN_CNTL_SW_PWR_DOWN_MSB 10
-#define SAND_HAL_KA_SC_SCAN_CNTL_SW_PWR_DOWN_LSB 10
-#define SAND_HAL_KA_SC_SCAN_CNTL_SW_PWR_DOWN_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_SC_SCAN_CNTL_SW_PWR_DOWN_DEFAULT 0x00000000
-#define SAND_HAL_KA_SC_SCAN_CNTL_CORE_CLK_50_EN_MASK 0x00000200
-#define SAND_HAL_KA_SC_SCAN_CNTL_CORE_CLK_50_EN_SHIFT 9
-#define SAND_HAL_KA_SC_SCAN_CNTL_CORE_CLK_50_EN_MSB 9
-#define SAND_HAL_KA_SC_SCAN_CNTL_CORE_CLK_50_EN_LSB 9
-#define SAND_HAL_KA_SC_SCAN_CNTL_CORE_CLK_50_EN_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_SC_SCAN_CNTL_CORE_CLK_50_EN_DEFAULT 0x00000001
-#define SAND_HAL_KA_SC_SCAN_CNTL_PCI_CLK_EN_MASK 0x00000100
-#define SAND_HAL_KA_SC_SCAN_CNTL_PCI_CLK_EN_SHIFT 8
-#define SAND_HAL_KA_SC_SCAN_CNTL_PCI_CLK_EN_MSB 8
-#define SAND_HAL_KA_SC_SCAN_CNTL_PCI_CLK_EN_LSB 8
-#define SAND_HAL_KA_SC_SCAN_CNTL_PCI_CLK_EN_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_SC_SCAN_CNTL_PCI_CLK_EN_DEFAULT 0x00000001
-#define SAND_HAL_KA_SC_SCAN_CNTL_TEMP_LED_MASK 0x000000c0
-#define SAND_HAL_KA_SC_SCAN_CNTL_TEMP_LED_SHIFT 6
-#define SAND_HAL_KA_SC_SCAN_CNTL_TEMP_LED_MSB 7
-#define SAND_HAL_KA_SC_SCAN_CNTL_TEMP_LED_LSB 6
-#define SAND_HAL_KA_SC_SCAN_CNTL_TEMP_LED_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_SC_SCAN_CNTL_TEMP_LED_DEFAULT 0x00000000
-#define SAND_HAL_KA_SC_SCAN_CNTL_FAULT_LED_MASK 0x00000030
-#define SAND_HAL_KA_SC_SCAN_CNTL_FAULT_LED_SHIFT 4
-#define SAND_HAL_KA_SC_SCAN_CNTL_FAULT_LED_MSB 5
-#define SAND_HAL_KA_SC_SCAN_CNTL_FAULT_LED_LSB 4
-#define SAND_HAL_KA_SC_SCAN_CNTL_FAULT_LED_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_SC_SCAN_CNTL_FAULT_LED_DEFAULT 0x00000000
-#define SAND_HAL_KA_SC_SCAN_CNTL_RS232_R_LED_MASK 0x0000000c
-#define SAND_HAL_KA_SC_SCAN_CNTL_RS232_R_LED_SHIFT 2
-#define SAND_HAL_KA_SC_SCAN_CNTL_RS232_R_LED_MSB 3
-#define SAND_HAL_KA_SC_SCAN_CNTL_RS232_R_LED_LSB 2
-#define SAND_HAL_KA_SC_SCAN_CNTL_RS232_R_LED_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_SC_SCAN_CNTL_RS232_R_LED_DEFAULT 0x00000000
-#define SAND_HAL_KA_SC_SCAN_CNTL_RS232_L_LED_MASK 0x00000003
-#define SAND_HAL_KA_SC_SCAN_CNTL_RS232_L_LED_SHIFT 0
-#define SAND_HAL_KA_SC_SCAN_CNTL_RS232_L_LED_MSB 1
-#define SAND_HAL_KA_SC_SCAN_CNTL_RS232_L_LED_LSB 0
-#define SAND_HAL_KA_SC_SCAN_CNTL_RS232_L_LED_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_SC_SCAN_CNTL_RS232_L_LED_DEFAULT 0x00000000
-
-/* ================================================================
- * Field info for register KA_SC_SCAN_BRD_INFO */
-#define SAND_HAL_KA_SC_SCAN_BRD_INFO_FEM_ID_MASK 0x0000f000
-#define SAND_HAL_KA_SC_SCAN_BRD_INFO_FEM_ID_SHIFT 12
-#define SAND_HAL_KA_SC_SCAN_BRD_INFO_FEM_ID_MSB 15
-#define SAND_HAL_KA_SC_SCAN_BRD_INFO_FEM_ID_LSB 12
-#define SAND_HAL_KA_SC_SCAN_BRD_INFO_FEM_ID_TYPE (SAND_HAL_TYPE_READ)
-#define SAND_HAL_KA_SC_SCAN_BRD_INFO_FEM_ID_DEFAULT 0x00000000
-#define SAND_HAL_KA_SC_SCAN_BRD_INFO_FEM_REV_MASK 0x00000300
-#define SAND_HAL_KA_SC_SCAN_BRD_INFO_FEM_REV_SHIFT 8
-#define SAND_HAL_KA_SC_SCAN_BRD_INFO_FEM_REV_MSB 9
-#define SAND_HAL_KA_SC_SCAN_BRD_INFO_FEM_REV_LSB 8
-#define SAND_HAL_KA_SC_SCAN_BRD_INFO_FEM_REV_TYPE (SAND_HAL_TYPE_READ)
-#define SAND_HAL_KA_SC_SCAN_BRD_INFO_FEM_REV_DEFAULT 0x00000000
-#define SAND_HAL_KA_SC_SCAN_BRD_INFO_BRD_ID_MASK 0x000000f0
-#define SAND_HAL_KA_SC_SCAN_BRD_INFO_BRD_ID_SHIFT 4
-#define SAND_HAL_KA_SC_SCAN_BRD_INFO_BRD_ID_MSB 7
-#define SAND_HAL_KA_SC_SCAN_BRD_INFO_BRD_ID_LSB 4
-#define SAND_HAL_KA_SC_SCAN_BRD_INFO_BRD_ID_TYPE (SAND_HAL_TYPE_READ)
-#define SAND_HAL_KA_SC_SCAN_BRD_INFO_BRD_ID_DEFAULT 0x00000000
-#define SAND_HAL_KA_SC_SCAN_BRD_INFO_BRD_REV_MASK 0x00000003
-#define SAND_HAL_KA_SC_SCAN_BRD_INFO_BRD_REV_SHIFT 0
-#define SAND_HAL_KA_SC_SCAN_BRD_INFO_BRD_REV_MSB 1
-#define SAND_HAL_KA_SC_SCAN_BRD_INFO_BRD_REV_LSB 0
-#define SAND_HAL_KA_SC_SCAN_BRD_INFO_BRD_REV_TYPE (SAND_HAL_TYPE_READ)
-#define SAND_HAL_KA_SC_SCAN_BRD_INFO_BRD_REV_DEFAULT 0x00000000
-
-/* ================================================================
- * Field info for register KA_SC_SCAN_SCAN_FROM_0 */
-#define SAND_HAL_KA_SC_SCAN_SCAN_FROM_0_SCAN_OUT_MASK 0xffffffff
-#define SAND_HAL_KA_SC_SCAN_SCAN_FROM_0_SCAN_OUT_SHIFT 0
-#define SAND_HAL_KA_SC_SCAN_SCAN_FROM_0_SCAN_OUT_MSB 31
-#define SAND_HAL_KA_SC_SCAN_SCAN_FROM_0_SCAN_OUT_LSB 0
-#define SAND_HAL_KA_SC_SCAN_SCAN_FROM_0_SCAN_OUT_TYPE (SAND_HAL_TYPE_READ)
-#define SAND_HAL_KA_SC_SCAN_SCAN_FROM_0_SCAN_OUT_DEFAULT 0x00000000
-
-/* ================================================================
- * Field info for register KA_SC_SCAN_SCAN_FROM_1 */
-#define SAND_HAL_KA_SC_SCAN_SCAN_FROM_1_SCAN_OUT_MASK 0xffffffff
-#define SAND_HAL_KA_SC_SCAN_SCAN_FROM_1_SCAN_OUT_SHIFT 0
-#define SAND_HAL_KA_SC_SCAN_SCAN_FROM_1_SCAN_OUT_MSB 31
-#define SAND_HAL_KA_SC_SCAN_SCAN_FROM_1_SCAN_OUT_LSB 0
-#define SAND_HAL_KA_SC_SCAN_SCAN_FROM_1_SCAN_OUT_TYPE (SAND_HAL_TYPE_READ)
-#define SAND_HAL_KA_SC_SCAN_SCAN_FROM_1_SCAN_OUT_DEFAULT 0x00000000
-
-/* ================================================================
- * Field info for register KA_SC_SCAN_SCAN_TO_0 */
-#define SAND_HAL_KA_SC_SCAN_SCAN_TO_0_SCAN_IN_MASK 0xffffffff
-#define SAND_HAL_KA_SC_SCAN_SCAN_TO_0_SCAN_IN_SHIFT 0
-#define SAND_HAL_KA_SC_SCAN_SCAN_TO_0_SCAN_IN_MSB 31
-#define SAND_HAL_KA_SC_SCAN_SCAN_TO_0_SCAN_IN_LSB 0
-#define SAND_HAL_KA_SC_SCAN_SCAN_TO_0_SCAN_IN_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_SC_SCAN_SCAN_TO_0_SCAN_IN_DEFAULT 0x00000000
-
-/* ================================================================
- * Field info for register KA_SC_SCAN_SCAN_TO_1 */
-#define SAND_HAL_KA_SC_SCAN_SCAN_TO_1_SCAN_IN_MASK 0xffffffff
-#define SAND_HAL_KA_SC_SCAN_SCAN_TO_1_SCAN_IN_SHIFT 0
-#define SAND_HAL_KA_SC_SCAN_SCAN_TO_1_SCAN_IN_MSB 31
-#define SAND_HAL_KA_SC_SCAN_SCAN_TO_1_SCAN_IN_LSB 0
-#define SAND_HAL_KA_SC_SCAN_SCAN_TO_1_SCAN_IN_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_SC_SCAN_SCAN_TO_1_SCAN_IN_DEFAULT 0x00000000
-
-/* ================================================================
- * Field info for register KA_SC_SCAN_SCAN_CTRL */
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_SCI_SEL_BM_MASK 0x04000000
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_SCI_SEL_BM_SHIFT 26
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_SCI_SEL_BM_MSB 26
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_SCI_SEL_BM_LSB 26
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_SCI_SEL_BM_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_SCI_SEL_BM_DEFAULT 0x00000000
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_TEST_MODE_MASK 0x03000000
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_TEST_MODE_SHIFT 24
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_TEST_MODE_MSB 25
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_TEST_MODE_LSB 24
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_TEST_MODE_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_TEST_MODE_DEFAULT 0x00000000
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_SCAN_TEST_EN_MASK 0x00100000
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_SCAN_TEST_EN_SHIFT 20
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_SCAN_TEST_EN_MSB 20
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_SCAN_TEST_EN_LSB 20
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_SCAN_TEST_EN_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_SCAN_TEST_EN_DEFAULT 0x00000000
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_SCAN_EN_PO_MASK 0x00080000
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_SCAN_EN_PO_SHIFT 19
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_SCAN_EN_PO_MSB 19
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_SCAN_EN_PO_LSB 19
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_SCAN_EN_PO_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_SCAN_EN_PO_DEFAULT 0x00000000
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_SCAN_EN_PI_MASK 0x00040000
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_SCAN_EN_PI_SHIFT 18
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_SCAN_EN_PI_MSB 18
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_SCAN_EN_PI_LSB 18
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_SCAN_EN_PI_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_SCAN_EN_PI_DEFAULT 0x00000000
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_SCAN_CLK_MASK 0x00020000
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_SCAN_CLK_SHIFT 17
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_SCAN_CLK_MSB 17
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_SCAN_CLK_LSB 17
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_SCAN_CLK_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_SCAN_CLK_DEFAULT 0x00000000
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_SCAN_EN_MASK 0x00010000
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_SCAN_EN_SHIFT 16
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_SCAN_EN_MSB 16
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_SCAN_EN_LSB 16
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_SCAN_EN_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_KA_SCAN_EN_DEFAULT 0x00000000
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_ENABLE_DRIVERS_MASK 0x00001000
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_ENABLE_DRIVERS_SHIFT 12
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_ENABLE_DRIVERS_MSB 12
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_ENABLE_DRIVERS_LSB 12
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_ENABLE_DRIVERS_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_ENABLE_DRIVERS_DEFAULT 0x00000000
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_REF_CLK_MASK 0x00000800
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_REF_CLK_SHIFT 11
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_REF_CLK_MSB 11
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_REF_CLK_LSB 11
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_REF_CLK_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_REF_CLK_DEFAULT 0x00000000
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_SPI_CLK_MASK 0x00000400
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_SPI_CLK_SHIFT 10
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_SPI_CLK_MSB 10
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_SPI_CLK_LSB 10
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_SPI_CLK_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_SPI_CLK_DEFAULT 0x00000000
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_DR_CLK_MASK 0x00000200
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_DR_CLK_SHIFT 9
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_DR_CLK_MSB 9
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_DR_CLK_LSB 9
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_DR_CLK_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_DR_CLK_DEFAULT 0x00000000
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_CORE_CLK_MASK 0x00000100
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_CORE_CLK_SHIFT 8
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_CORE_CLK_MSB 8
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_CORE_CLK_LSB 8
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_CORE_CLK_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_CORE_CLK_DEFAULT 0x00000000
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_REF_CLK_SEL_MASK 0x00000018
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_REF_CLK_SEL_SHIFT 3
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_REF_CLK_SEL_MSB 4
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_REF_CLK_SEL_LSB 3
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_REF_CLK_SEL_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_REF_CLK_SEL_DEFAULT 0x00000000
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_SPI_CLK_SEL_MASK 0x00000004
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_SPI_CLK_SEL_SHIFT 2
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_SPI_CLK_SEL_MSB 2
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_SPI_CLK_SEL_LSB 2
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_SPI_CLK_SEL_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_SPI_CLK_SEL_DEFAULT 0x00000000
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_DR_CLK_SEL_MASK 0x00000002
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_DR_CLK_SEL_SHIFT 1
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_DR_CLK_SEL_MSB 1
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_DR_CLK_SEL_LSB 1
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_DR_CLK_SEL_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_DR_CLK_SEL_DEFAULT 0x00000000
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_CORE_CLK_SEL_MASK 0x00000001
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_CORE_CLK_SEL_SHIFT 0
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_CORE_CLK_SEL_MSB 0
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_CORE_CLK_SEL_LSB 0
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_CORE_CLK_SEL_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_SC_SCAN_SCAN_CTRL_CORE_CLK_SEL_DEFAULT 0x00000000
-
-/* ================================================================
- * Field info for register KA_SC_SCAN_PLL_CTRL */
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_RIPPLE_RESET_MASK 0x00002000
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_RIPPLE_RESET_SHIFT 13
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_RIPPLE_RESET_MSB 13
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_RIPPLE_RESET_LSB 13
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_RIPPLE_RESET_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_RIPPLE_RESET_DEFAULT 0x00000000
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_RESET_MASK 0x00001000
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_RESET_SHIFT 12
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_RESET_MSB 12
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_RESET_LSB 12
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_RESET_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_RESET_DEFAULT 0x00000000
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_SPI_BYPASS_MASK 0x00000800
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_SPI_BYPASS_SHIFT 11
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_SPI_BYPASS_MSB 11
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_SPI_BYPASS_LSB 11
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_SPI_BYPASS_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_SPI_BYPASS_DEFAULT 0x00000000
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_SPI_ACBYPASS_MASK 0x00000400
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_SPI_ACBYPASS_SHIFT 10
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_SPI_ACBYPASS_MSB 10
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_SPI_ACBYPASS_LSB 10
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_SPI_ACBYPASS_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_SPI_ACBYPASS_DEFAULT 0x00000000
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_SPI_EXTCLK_MASK 0x00000200
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_SPI_EXTCLK_SHIFT 9
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_SPI_EXTCLK_MSB 9
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_SPI_EXTCLK_LSB 9
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_SPI_EXTCLK_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_SPI_EXTCLK_DEFAULT 0x00000000
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_DR_BYPASS_MASK 0x00000100
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_DR_BYPASS_SHIFT 8
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_DR_BYPASS_MSB 8
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_DR_BYPASS_LSB 8
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_DR_BYPASS_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_DR_BYPASS_DEFAULT 0x00000000
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_DR_ACBYPASS_MASK 0x00000080
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_DR_ACBYPASS_SHIFT 7
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_DR_ACBYPASS_MSB 7
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_DR_ACBYPASS_LSB 7
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_DR_ACBYPASS_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_DR_ACBYPASS_DEFAULT 0x00000000
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_DR_EXTCLK_MASK 0x00000040
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_DR_EXTCLK_SHIFT 6
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_DR_EXTCLK_MSB 6
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_DR_EXTCLK_LSB 6
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_DR_EXTCLK_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_DR_EXTCLK_DEFAULT 0x00000000
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_CORE_BYPASS_MASK 0x00000020
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_CORE_BYPASS_SHIFT 5
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_CORE_BYPASS_MSB 5
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_CORE_BYPASS_LSB 5
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_CORE_BYPASS_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_CORE_BYPASS_DEFAULT 0x00000000
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_CORE_ACBYPASS_MASK 0x00000010
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_CORE_ACBYPASS_SHIFT 4
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_CORE_ACBYPASS_MSB 4
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_CORE_ACBYPASS_LSB 4
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_CORE_ACBYPASS_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_CORE_ACBYPASS_DEFAULT 0x00000000
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_CORE_EXTCLK_MASK 0x00000008
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_CORE_EXTCLK_SHIFT 3
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_CORE_EXTCLK_MSB 3
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_CORE_EXTCLK_LSB 3
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_CORE_EXTCLK_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_CORE_EXTCLK_DEFAULT 0x00000000
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_CORE_M_N_SEL_MASK 0x00000007
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_CORE_M_N_SEL_SHIFT 0
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_CORE_M_N_SEL_MSB 2
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_CORE_M_N_SEL_LSB 0
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_CORE_M_N_SEL_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_SC_SCAN_PLL_CTRL_KA_PLL_CORE_M_N_SEL_DEFAULT 0x00000000
-
-/* ================================================================
- * Field info for register KA_SC_SCAN_CORE_CLK_COUNT */
-#define SAND_HAL_KA_SC_SCAN_CORE_CLK_COUNT_CLEAR_RIPPLE_CNT_N_MASK 0x02000000
-#define SAND_HAL_KA_SC_SCAN_CORE_CLK_COUNT_CLEAR_RIPPLE_CNT_N_SHIFT 25
-#define SAND_HAL_KA_SC_SCAN_CORE_CLK_COUNT_CLEAR_RIPPLE_CNT_N_MSB 25
-#define SAND_HAL_KA_SC_SCAN_CORE_CLK_COUNT_CLEAR_RIPPLE_CNT_N_LSB 25
-#define SAND_HAL_KA_SC_SCAN_CORE_CLK_COUNT_CLEAR_RIPPLE_CNT_N_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_SC_SCAN_CORE_CLK_COUNT_CLEAR_RIPPLE_CNT_N_DEFAULT 0x00000000
-#define SAND_HAL_KA_SC_SCAN_CORE_CLK_COUNT_ENABLE_RIPPLE_CNT_MASK 0x01000000
-#define SAND_HAL_KA_SC_SCAN_CORE_CLK_COUNT_ENABLE_RIPPLE_CNT_SHIFT 24
-#define SAND_HAL_KA_SC_SCAN_CORE_CLK_COUNT_ENABLE_RIPPLE_CNT_MSB 24
-#define SAND_HAL_KA_SC_SCAN_CORE_CLK_COUNT_ENABLE_RIPPLE_CNT_LSB 24
-#define SAND_HAL_KA_SC_SCAN_CORE_CLK_COUNT_ENABLE_RIPPLE_CNT_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_SC_SCAN_CORE_CLK_COUNT_ENABLE_RIPPLE_CNT_DEFAULT 0x00000000
-#define SAND_HAL_KA_SC_SCAN_CORE_CLK_COUNT_RIPPLE_COUNT_MASK 0x00ffffff
-#define SAND_HAL_KA_SC_SCAN_CORE_CLK_COUNT_RIPPLE_COUNT_SHIFT 0
-#define SAND_HAL_KA_SC_SCAN_CORE_CLK_COUNT_RIPPLE_COUNT_MSB 23
-#define SAND_HAL_KA_SC_SCAN_CORE_CLK_COUNT_RIPPLE_COUNT_LSB 0
-#define SAND_HAL_KA_SC_SCAN_CORE_CLK_COUNT_RIPPLE_COUNT_TYPE (SAND_HAL_TYPE_READ)
-#define SAND_HAL_KA_SC_SCAN_CORE_CLK_COUNT_RIPPLE_COUNT_DEFAULT 0x00000000
-
-/* ================================================================
- * Field info for register KA_SC_SCAN_DR_CLK_COUNT */
-#define SAND_HAL_KA_SC_SCAN_DR_CLK_COUNT_CLEAR_RIPPLE_CNT_N_MASK 0x02000000
-#define SAND_HAL_KA_SC_SCAN_DR_CLK_COUNT_CLEAR_RIPPLE_CNT_N_SHIFT 25
-#define SAND_HAL_KA_SC_SCAN_DR_CLK_COUNT_CLEAR_RIPPLE_CNT_N_MSB 25
-#define SAND_HAL_KA_SC_SCAN_DR_CLK_COUNT_CLEAR_RIPPLE_CNT_N_LSB 25
-#define SAND_HAL_KA_SC_SCAN_DR_CLK_COUNT_CLEAR_RIPPLE_CNT_N_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_SC_SCAN_DR_CLK_COUNT_CLEAR_RIPPLE_CNT_N_DEFAULT 0x00000000
-#define SAND_HAL_KA_SC_SCAN_DR_CLK_COUNT_ENABLE_RIPPLE_CNT_MASK 0x01000000
-#define SAND_HAL_KA_SC_SCAN_DR_CLK_COUNT_ENABLE_RIPPLE_CNT_SHIFT 24
-#define SAND_HAL_KA_SC_SCAN_DR_CLK_COUNT_ENABLE_RIPPLE_CNT_MSB 24
-#define SAND_HAL_KA_SC_SCAN_DR_CLK_COUNT_ENABLE_RIPPLE_CNT_LSB 24
-#define SAND_HAL_KA_SC_SCAN_DR_CLK_COUNT_ENABLE_RIPPLE_CNT_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_SC_SCAN_DR_CLK_COUNT_ENABLE_RIPPLE_CNT_DEFAULT 0x00000000
-#define SAND_HAL_KA_SC_SCAN_DR_CLK_COUNT_RIPPLE_COUNT_MASK 0x00ffffff
-#define SAND_HAL_KA_SC_SCAN_DR_CLK_COUNT_RIPPLE_COUNT_SHIFT 0
-#define SAND_HAL_KA_SC_SCAN_DR_CLK_COUNT_RIPPLE_COUNT_MSB 23
-#define SAND_HAL_KA_SC_SCAN_DR_CLK_COUNT_RIPPLE_COUNT_LSB 0
-#define SAND_HAL_KA_SC_SCAN_DR_CLK_COUNT_RIPPLE_COUNT_TYPE (SAND_HAL_TYPE_READ)
-#define SAND_HAL_KA_SC_SCAN_DR_CLK_COUNT_RIPPLE_COUNT_DEFAULT 0x00000000
-
-/* ================================================================
- * Field info for register KA_SC_SCAN_SPI_CLK_COUNT */
-#define SAND_HAL_KA_SC_SCAN_SPI_CLK_COUNT_CLEAR_RIPPLE_CNT_N_MASK 0x02000000
-#define SAND_HAL_KA_SC_SCAN_SPI_CLK_COUNT_CLEAR_RIPPLE_CNT_N_SHIFT 25
-#define SAND_HAL_KA_SC_SCAN_SPI_CLK_COUNT_CLEAR_RIPPLE_CNT_N_MSB 25
-#define SAND_HAL_KA_SC_SCAN_SPI_CLK_COUNT_CLEAR_RIPPLE_CNT_N_LSB 25
-#define SAND_HAL_KA_SC_SCAN_SPI_CLK_COUNT_CLEAR_RIPPLE_CNT_N_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_SC_SCAN_SPI_CLK_COUNT_CLEAR_RIPPLE_CNT_N_DEFAULT 0x00000000
-#define SAND_HAL_KA_SC_SCAN_SPI_CLK_COUNT_ENABLE_RIPPLE_CNT_MASK 0x01000000
-#define SAND_HAL_KA_SC_SCAN_SPI_CLK_COUNT_ENABLE_RIPPLE_CNT_SHIFT 24
-#define SAND_HAL_KA_SC_SCAN_SPI_CLK_COUNT_ENABLE_RIPPLE_CNT_MSB 24
-#define SAND_HAL_KA_SC_SCAN_SPI_CLK_COUNT_ENABLE_RIPPLE_CNT_LSB 24
-#define SAND_HAL_KA_SC_SCAN_SPI_CLK_COUNT_ENABLE_RIPPLE_CNT_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_SC_SCAN_SPI_CLK_COUNT_ENABLE_RIPPLE_CNT_DEFAULT 0x00000000
-#define SAND_HAL_KA_SC_SCAN_SPI_CLK_COUNT_RIPPLE_COUNT_MASK 0x00ffffff
-#define SAND_HAL_KA_SC_SCAN_SPI_CLK_COUNT_RIPPLE_COUNT_SHIFT 0
-#define SAND_HAL_KA_SC_SCAN_SPI_CLK_COUNT_RIPPLE_COUNT_MSB 23
-#define SAND_HAL_KA_SC_SCAN_SPI_CLK_COUNT_RIPPLE_COUNT_LSB 0
-#define SAND_HAL_KA_SC_SCAN_SPI_CLK_COUNT_RIPPLE_COUNT_TYPE (SAND_HAL_TYPE_READ)
-#define SAND_HAL_KA_SC_SCAN_SPI_CLK_COUNT_RIPPLE_COUNT_DEFAULT 0x00000000
-
-/* ================================================================
- * Field info for register KA_SC_SCAN_BRD_BRD_OUT_DATA */
-#define SAND_HAL_KA_SC_SCAN_BRD_BRD_OUT_DATA_BRD_OUT_MASK 0x001fffff
-#define SAND_HAL_KA_SC_SCAN_BRD_BRD_OUT_DATA_BRD_OUT_SHIFT 0
-#define SAND_HAL_KA_SC_SCAN_BRD_BRD_OUT_DATA_BRD_OUT_MSB 20
-#define SAND_HAL_KA_SC_SCAN_BRD_BRD_OUT_DATA_BRD_OUT_LSB 0
-#define SAND_HAL_KA_SC_SCAN_BRD_BRD_OUT_DATA_BRD_OUT_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_SC_SCAN_BRD_BRD_OUT_DATA_BRD_OUT_DEFAULT 0x00000000
-
-/* ================================================================
- * Field info for register KA_SC_SCAN_BRD_BRD_OUT_ENABLE */
-#define SAND_HAL_KA_SC_SCAN_BRD_BRD_OUT_ENABLE_BRD_OUT_EN_MASK 0x001fffff
-#define SAND_HAL_KA_SC_SCAN_BRD_BRD_OUT_ENABLE_BRD_OUT_EN_SHIFT 0
-#define SAND_HAL_KA_SC_SCAN_BRD_BRD_OUT_ENABLE_BRD_OUT_EN_MSB 20
-#define SAND_HAL_KA_SC_SCAN_BRD_BRD_OUT_ENABLE_BRD_OUT_EN_LSB 0
-#define SAND_HAL_KA_SC_SCAN_BRD_BRD_OUT_ENABLE_BRD_OUT_EN_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_SC_SCAN_BRD_BRD_OUT_ENABLE_BRD_OUT_EN_DEFAULT 0x00000000
-
-/* ================================================================
- * Field info for register KA_SC_SCAN_BRD_BRD_IN */
-#define SAND_HAL_KA_SC_SCAN_BRD_BRD_IN_BRD_IN_MASK 0x001fffff
-#define SAND_HAL_KA_SC_SCAN_BRD_BRD_IN_BRD_IN_SHIFT 0
-#define SAND_HAL_KA_SC_SCAN_BRD_BRD_IN_BRD_IN_MSB 20
-#define SAND_HAL_KA_SC_SCAN_BRD_BRD_IN_BRD_IN_LSB 0
-#define SAND_HAL_KA_SC_SCAN_BRD_BRD_IN_BRD_IN_TYPE (SAND_HAL_TYPE_READ)
-#define SAND_HAL_KA_SC_SCAN_BRD_BRD_IN_BRD_IN_DEFAULT 0x00000000
-
-/* ================================================================
- * Field info for register KA_SC_SCAN_MISC */
-#define SAND_HAL_KA_SC_SCAN_MISC_MARG_START_MASK 0x00000002
-#define SAND_HAL_KA_SC_SCAN_MISC_MARG_START_SHIFT 1
-#define SAND_HAL_KA_SC_SCAN_MISC_MARG_START_MSB 1
-#define SAND_HAL_KA_SC_SCAN_MISC_MARG_START_LSB 1
-#define SAND_HAL_KA_SC_SCAN_MISC_MARG_START_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_SC_SCAN_MISC_MARG_START_DEFAULT 0x00000000
-#define SAND_HAL_KA_SC_SCAN_MISC_MARG_READY_MASK 0x00000001
-#define SAND_HAL_KA_SC_SCAN_MISC_MARG_READY_SHIFT 0
-#define SAND_HAL_KA_SC_SCAN_MISC_MARG_READY_MSB 0
-#define SAND_HAL_KA_SC_SCAN_MISC_MARG_READY_LSB 0
-#define SAND_HAL_KA_SC_SCAN_MISC_MARG_READY_TYPE (SAND_HAL_TYPE_READ)
-#define SAND_HAL_KA_SC_SCAN_MISC_MARG_READY_DEFAULT 0x00000000
-
-/* ================================================================
- * Field info for register KA_SC_SCAN_INTERRUPT */
-#define SAND_HAL_KA_SC_SCAN_INTERRUPT_BME_TIMEOUT_MASK 0x00000010
-#define SAND_HAL_KA_SC_SCAN_INTERRUPT_BME_TIMEOUT_SHIFT 4
-#define SAND_HAL_KA_SC_SCAN_INTERRUPT_BME_TIMEOUT_MSB 4
-#define SAND_HAL_KA_SC_SCAN_INTERRUPT_BME_TIMEOUT_LSB 4
-#define SAND_HAL_KA_SC_SCAN_INTERRUPT_BME_TIMEOUT_TYPE (SAND_HAL_TYPE_READ)
-#define SAND_HAL_KA_SC_SCAN_INTERRUPT_BME_TIMEOUT_DEFAULT 0x00000000
-#define SAND_HAL_KA_SC_SCAN_INTERRUPT_OVER_TEMP_A_MASK 0x00000008
-#define SAND_HAL_KA_SC_SCAN_INTERRUPT_OVER_TEMP_A_SHIFT 3
-#define SAND_HAL_KA_SC_SCAN_INTERRUPT_OVER_TEMP_A_MSB 3
-#define SAND_HAL_KA_SC_SCAN_INTERRUPT_OVER_TEMP_A_LSB 3
-#define SAND_HAL_KA_SC_SCAN_INTERRUPT_OVER_TEMP_A_TYPE (SAND_HAL_TYPE_READ)
-#define SAND_HAL_KA_SC_SCAN_INTERRUPT_OVER_TEMP_A_DEFAULT 0x00000000
-#define SAND_HAL_KA_SC_SCAN_INTERRUPT_OVER_TEMP_B_MASK 0x00000004
-#define SAND_HAL_KA_SC_SCAN_INTERRUPT_OVER_TEMP_B_SHIFT 2
-#define SAND_HAL_KA_SC_SCAN_INTERRUPT_OVER_TEMP_B_MSB 2
-#define SAND_HAL_KA_SC_SCAN_INTERRUPT_OVER_TEMP_B_LSB 2
-#define SAND_HAL_KA_SC_SCAN_INTERRUPT_OVER_TEMP_B_TYPE (SAND_HAL_TYPE_READ)
-#define SAND_HAL_KA_SC_SCAN_INTERRUPT_OVER_TEMP_B_DEFAULT 0x00000000
-#define SAND_HAL_KA_SC_SCAN_INTERRUPT_POWER_FAIL_A_MASK 0x00000002
-#define SAND_HAL_KA_SC_SCAN_INTERRUPT_POWER_FAIL_A_SHIFT 1
-#define SAND_HAL_KA_SC_SCAN_INTERRUPT_POWER_FAIL_A_MSB 1
-#define SAND_HAL_KA_SC_SCAN_INTERRUPT_POWER_FAIL_A_LSB 1
-#define SAND_HAL_KA_SC_SCAN_INTERRUPT_POWER_FAIL_A_TYPE (SAND_HAL_TYPE_READ)
-#define SAND_HAL_KA_SC_SCAN_INTERRUPT_POWER_FAIL_A_DEFAULT 0x00000000
-#define SAND_HAL_KA_SC_SCAN_INTERRUPT_POWER_FAIL_B_MASK 0x00000001
-#define SAND_HAL_KA_SC_SCAN_INTERRUPT_POWER_FAIL_B_SHIFT 0
-#define SAND_HAL_KA_SC_SCAN_INTERRUPT_POWER_FAIL_B_MSB 0
-#define SAND_HAL_KA_SC_SCAN_INTERRUPT_POWER_FAIL_B_LSB 0
-#define SAND_HAL_KA_SC_SCAN_INTERRUPT_POWER_FAIL_B_TYPE (SAND_HAL_TYPE_READ)
-#define SAND_HAL_KA_SC_SCAN_INTERRUPT_POWER_FAIL_B_DEFAULT 0x00000000
-
-/* ================================================================
- * Field info for register KA_SC_SCAN_INTERRUPT_MASK */
-#define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_BME_TIMEOUT_DISINT_MASK 0x00000010
-#define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_BME_TIMEOUT_DISINT_SHIFT 4
-#define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_BME_TIMEOUT_DISINT_MSB 4
-#define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_BME_TIMEOUT_DISINT_LSB 4
-#define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_BME_TIMEOUT_DISINT_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_BME_TIMEOUT_DISINT_DEFAULT 0x00000001
-#define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_OVER_TEMP_A_DISINT_MASK 0x00000008
-#define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_OVER_TEMP_A_DISINT_SHIFT 3
-#define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_OVER_TEMP_A_DISINT_MSB 3
-#define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_OVER_TEMP_A_DISINT_LSB 3
-#define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_OVER_TEMP_A_DISINT_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_OVER_TEMP_A_DISINT_DEFAULT 0x00000001
-#define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_OVER_TEMP_B_DISINT_MASK 0x00000004
-#define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_OVER_TEMP_B_DISINT_SHIFT 2
-#define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_OVER_TEMP_B_DISINT_MSB 2
-#define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_OVER_TEMP_B_DISINT_LSB 2
-#define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_OVER_TEMP_B_DISINT_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_OVER_TEMP_B_DISINT_DEFAULT 0x00000001
-#define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_POWER_FAIL_A_DISINT_MASK 0x00000002
-#define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_POWER_FAIL_A_DISINT_SHIFT 1
-#define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_POWER_FAIL_A_DISINT_MSB 1
-#define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_POWER_FAIL_A_DISINT_LSB 1
-#define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_POWER_FAIL_A_DISINT_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_POWER_FAIL_A_DISINT_DEFAULT 0x00000001
-#define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_POWER_FAIL_B_DISINT_MASK 0x00000001
-#define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_POWER_FAIL_B_DISINT_SHIFT 0
-#define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_POWER_FAIL_B_DISINT_MSB 0
-#define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_POWER_FAIL_B_DISINT_LSB 0
-#define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_POWER_FAIL_B_DISINT_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_SC_SCAN_INTERRUPT_MASK_POWER_FAIL_B_DISINT_DEFAULT 0x00000001
-
-/* ================================================================
- * Field info for register KA_SC_SCAN_SCRATCH */
-#define SAND_HAL_KA_SC_SCAN_SCRATCH_TEST_BITS_MASK 0xffffffff
-#define SAND_HAL_KA_SC_SCAN_SCRATCH_TEST_BITS_SHIFT 0
-#define SAND_HAL_KA_SC_SCAN_SCRATCH_TEST_BITS_MSB 31
-#define SAND_HAL_KA_SC_SCAN_SCRATCH_TEST_BITS_LSB 0
-#define SAND_HAL_KA_SC_SCAN_SCRATCH_TEST_BITS_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_SC_SCAN_SCRATCH_TEST_BITS_DEFAULT 0x00000000
-
-/* ================================================================
- * Field info for register KA_SC_SCAN_SCRATCH_MASK */
-#define SAND_HAL_KA_SC_SCAN_SCRATCH_MASK_TEST_BITS_DISINT_MASK 0xffffffff
-#define SAND_HAL_KA_SC_SCAN_SCRATCH_MASK_TEST_BITS_DISINT_SHIFT 0
-#define SAND_HAL_KA_SC_SCAN_SCRATCH_MASK_TEST_BITS_DISINT_MSB 31
-#define SAND_HAL_KA_SC_SCAN_SCRATCH_MASK_TEST_BITS_DISINT_LSB 0
-#define SAND_HAL_KA_SC_SCAN_SCRATCH_MASK_TEST_BITS_DISINT_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_KA_SC_SCAN_SCRATCH_MASK_TEST_BITS_DISINT_DEFAULT 0xffffffff
-
-#endif /* matches #ifndef HAL_KA_SC_AUTO_H */
diff --git a/board/sandburst/karef/init.S b/board/sandburst/karef/init.S
deleted file mode 100644
index b1d47a4c75..0000000000
--- a/board/sandburst/karef/init.S
+++ /dev/null
@@ -1,101 +0,0 @@
-/*
-* Copyright (C) 2005 Sandburst Corporation
-*
-* See file CREDITS for list of people who contributed to this
-* project.
-*
-* This program is free software; you can redistribute it and/or
-* modify it under the terms of the GNU General Public License as
-* published by the Free Software Foundation; either version 2 of
-* the License, or (at your option) any later version.
-*
-* This program is distributed in the hope that it will be useful,
-* but WITHOUT ANY WARRANTY; without even the implied warranty of
-* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-* GNU General Public License for more details.
-*
-* You should have received a copy of the GNU General Public License
-* along with this program; if not, write to the Free Software
-* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-* MA 02111-1307 USA
-*/
-/*
- * Ported from Ebony init.S by Travis B. Sawyer
- */
-
-#include <ppc_asm.tmpl>
-#include <config.h>
-
-/* General */
-#define TLB_VALID 0x00000200
-
-/* Supported page sizes */
-
-#define SZ_1K 0x00000000
-#define SZ_4K 0x00000010
-#define SZ_16K 0x00000020
-#define SZ_64K 0x00000030
-#define SZ_256K 0x00000040
-#define SZ_1M 0x00000050
-#define SZ_16M 0x00000070
-#define SZ_256M 0x00000090
-
-/* Storage attributes */
-#define SA_W 0x00000800 /* Write-through */
-#define SA_I 0x00000400 /* Caching inhibited */
-#define SA_M 0x00000200 /* Memory coherence */
-#define SA_G 0x00000100 /* Guarded */
-#define SA_E 0x00000080 /* Endian */
-
-/* Access control */
-#define AC_X 0x00000024 /* Execute */
-#define AC_W 0x00000012 /* Write */
-#define AC_R 0x00000009 /* Read */
-
-/* Some handy macros */
-
-#define EPN(e) ((e) & 0xfffffc00)
-#define TLB0(epn,sz) ( (EPN((epn)) | (sz) | TLB_VALID ) )
-#define TLB1(rpn,erpn) ( ((rpn)&0xfffffc00) | (erpn) )
-#define TLB2(a) ( (a)&0x00000fbf )
-
-#define tlbtab_start\
- mflr r1 ;\
- bl 0f ;
-
-#define tlbtab_end\
- .long 0, 0, 0 ; \
-0: mflr r0 ; \
- mtlr r1 ; \
- blr ;
-
-#define tlbentry(epn,sz,rpn,erpn,attr)\
- .long TLB0(epn,sz),TLB1(rpn,erpn),TLB2(attr)
-
-
-/**************************************************************************
- * TLB TABLE
- *
- * This table is used by the cpu boot code to setup the initial tlb
- * entries. Rather than make broad assumptions in the cpu source tree,
- * this table lets each board set things up however they like.
- *
- * Pointer to the table is returned in r1
- *
- *************************************************************************/
-
- .section .bootpg,"ax"
- .globl tlbtab
-
-tlbtab:
- tlbtab_start
- tlbentry( 0xf0000000, SZ_256M, 0xf0000000, 1, AC_R|AC_W|AC_X|SA_G|SA_I)
- tlbentry( CFG_PERIPHERAL_BASE, SZ_256M, 0x40000000, 1, AC_R|AC_W|SA_G|SA_I)
- tlbentry( CFG_ISRAM_BASE, SZ_256K, 0x80000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I)
- tlbentry( CFG_SDRAM_BASE, SZ_256M, 0x00000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I )
- tlbentry( CFG_SDRAM_BASE+0x10000000, SZ_256M, 0x10000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I )
- tlbentry( CFG_SDRAM_BASE+0x20000000, SZ_256M, 0x20000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I )
- tlbentry( CFG_SDRAM_BASE+0x30000000, SZ_256M, 0x30000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I )
- tlbentry( CFG_PCI_BASE, SZ_256M, 0x00000000, 2, AC_R|AC_W|SA_G|SA_I )
- tlbentry( CFG_PCI_MEMBASE, SZ_256M, 0x00000000, 3, AC_R|AC_W|SA_G|SA_I )
- tlbtab_end
diff --git a/board/sandburst/karef/karef.c b/board/sandburst/karef/karef.c
deleted file mode 100644
index 2d71d3b2cc..0000000000
--- a/board/sandburst/karef/karef.c
+++ /dev/null
@@ -1,570 +0,0 @@
-/*
- * Copyright (C) 2005 Sandburst Corporation
- * Travis B. Sawyer
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <config.h>
-#include <common.h>
-#include <command.h>
-#include "karef.h"
-#include "karef_version.h"
-#include <asm/processor.h>
-#include <asm/io.h>
-#include <spd_sdram.h>
-#include <i2c.h>
-#include "../common/sb_common.h"
-#include "../common/ppc440gx_i2c.h"
-
-void fpga_init (void);
-
-KAREF_BOARD_ID_ST board_id_as[] =
-{
- {"Undefined"}, /* Not specified */
- {"Kamino Reference Design"},
- {"Reserved"}, /* Reserved for future use */
- {"Reserved"}, /* Reserved for future use */
-};
-
-KAREF_BOARD_ID_ST ofem_board_id_as[] =
-{
- {"Undefined"},
- {"1x10 + 10x2"},
- {"Reserved"},
- {"Reserved"},
-};
-
-/*************************************************************************
- * board_early_init_f
- *
- * Setup chip selects, initialize the Opto-FPGA, initialize
- * interrupt polarity and triggers.
- ************************************************************************/
-int board_early_init_f (void)
-{
- ppc440_gpio_regs_t *gpio_regs;
-
- /* Enable GPIO interrupts */
- mtsdr(sdr_pfc0, 0x00103E00);
-
- /* Setup access for LEDs, and system topology info */
- gpio_regs = (ppc440_gpio_regs_t *)CFG_GPIO_BASE;
- gpio_regs->open_drain = SBCOMMON_GPIO_SYS_LEDS;
- gpio_regs->tri_state = SBCOMMON_GPIO_DBGLEDS;
-
- /* Turn on all the leds for now */
- gpio_regs->out = SBCOMMON_GPIO_LEDS;
-
- /*--------------------------------------------------------------------+
- | Initialize EBC CONFIG
- +-------------------------------------------------------------------*/
- mtebc(xbcfg,
- EBC_CFG_LE_UNLOCK | EBC_CFG_PTD_ENABLE |
- EBC_CFG_RTC_64PERCLK | EBC_CFG_ATC_PREVIOUS |
- EBC_CFG_DTC_PREVIOUS | EBC_CFG_CTC_PREVIOUS |
- EBC_CFG_EMC_DEFAULT | EBC_CFG_PME_DISABLE |
- EBC_CFG_PR_32);
-
- /*--------------------------------------------------------------------+
- | 1/2 MB FLASH. Initialize bank 0 with default values.
- +-------------------------------------------------------------------*/
- mtebc(pb0ap,
- EBC_BXAP_BME_DISABLED | EBC_BXAP_TWT_ENCODE(8) |
- EBC_BXAP_BCE_DISABLE | EBC_BXAP_CSN_ENCODE(1) |
- EBC_BXAP_OEN_ENCODE(1)| EBC_BXAP_WBN_ENCODE(1) |
- EBC_BXAP_WBF_ENCODE(1)| EBC_BXAP_TH_ENCODE(1) |
- EBC_BXAP_RE_DISABLED | EBC_BXAP_BEM_WRITEONLY |
- EBC_BXAP_PEN_DISABLED);
-
- mtebc(pb0cr, EBC_BXCR_BAS_ENCODE(CFG_FLASH_BASE) |
- EBC_BXCR_BS_1MB | EBC_BXCR_BU_RW | EBC_BXCR_BW_8BIT);
- /*--------------------------------------------------------------------+
- | 8KB NVRAM/RTC. Initialize bank 1 with default values.
- +-------------------------------------------------------------------*/
- mtebc(pb1ap,
- EBC_BXAP_BME_DISABLED | EBC_BXAP_TWT_ENCODE(10) |
- EBC_BXAP_BCE_DISABLE | EBC_BXAP_CSN_ENCODE(1) |
- EBC_BXAP_OEN_ENCODE(1)| EBC_BXAP_WBN_ENCODE(1) |
- EBC_BXAP_WBF_ENCODE(1)| EBC_BXAP_TH_ENCODE(1) |
- EBC_BXAP_RE_DISABLED | EBC_BXAP_BEM_WRITEONLY |
- EBC_BXAP_PEN_DISABLED);
-
- mtebc(pb1cr, EBC_BXCR_BAS_ENCODE(0x48000000) |
- EBC_BXCR_BS_1MB | EBC_BXCR_BU_RW | EBC_BXCR_BW_8BIT);
-
- /*--------------------------------------------------------------------+
- | Compact Flash, uses 2 Chip Selects (2 & 6)
- +-------------------------------------------------------------------*/
- mtebc(pb2ap,
- EBC_BXAP_BME_DISABLED | EBC_BXAP_TWT_ENCODE(8) |
- EBC_BXAP_BCE_DISABLE | EBC_BXAP_CSN_ENCODE(1) |
- EBC_BXAP_OEN_ENCODE(1)| EBC_BXAP_WBN_ENCODE(1) |
- EBC_BXAP_WBF_ENCODE(0)| EBC_BXAP_TH_ENCODE(1) |
- EBC_BXAP_RE_DISABLED | EBC_BXAP_BEM_WRITEONLY |
- EBC_BXAP_PEN_DISABLED);
-
- mtebc(pb2cr, EBC_BXCR_BAS_ENCODE(0xF0000000) |
- EBC_BXCR_BS_1MB | EBC_BXCR_BU_RW | EBC_BXCR_BW_16BIT);
-
- /*--------------------------------------------------------------------+
- | KaRef Scan FPGA. Initialize bank 3 with default values.
- +-------------------------------------------------------------------*/
- mtebc(pb5ap,
- EBC_BXAP_RE_ENABLED | EBC_BXAP_SOR_NONDELAYED |
- EBC_BXAP_BME_DISABLED | EBC_BXAP_TWT_ENCODE(3) |
- EBC_BXAP_TH_ENCODE(1) | EBC_BXAP_WBF_ENCODE(0) |
- EBC_BXAP_CSN_ENCODE(1) | EBC_BXAP_PEN_DISABLED |
- EBC_BXAP_OEN_ENCODE(1) | EBC_BXAP_BEM_RW);
-
- mtebc(pb5cr, EBC_BXCR_BAS_ENCODE(0x48200000) |
- EBC_BXCR_BS_1MB | EBC_BXCR_BU_RW | EBC_BXCR_BW_32BIT);
-
- /*--------------------------------------------------------------------+
- | MAC A & B for Kamino. OFEM FPGA decodes the addresses
- | Initialize bank 4 with default values.
- +-------------------------------------------------------------------*/
- mtebc(pb4ap,
- EBC_BXAP_RE_ENABLED | EBC_BXAP_SOR_NONDELAYED |
- EBC_BXAP_BME_DISABLED | EBC_BXAP_TWT_ENCODE(3) |
- EBC_BXAP_TH_ENCODE(1) | EBC_BXAP_WBF_ENCODE(0) |
- EBC_BXAP_CSN_ENCODE(1) | EBC_BXAP_PEN_DISABLED |
- EBC_BXAP_OEN_ENCODE(1) | EBC_BXAP_BEM_RW);
-
- mtebc(pb4cr, EBC_BXCR_BAS_ENCODE(0x48600000) |
- EBC_BXCR_BS_2MB | EBC_BXCR_BU_RW | EBC_BXCR_BW_32BIT);
-
- /*--------------------------------------------------------------------+
- | OFEM FPGA Initialize bank 5 with default values.
- +-------------------------------------------------------------------*/
- mtebc(pb3ap,
- EBC_BXAP_RE_ENABLED | EBC_BXAP_SOR_NONDELAYED |
- EBC_BXAP_BME_DISABLED | EBC_BXAP_TWT_ENCODE(3) |
- EBC_BXAP_TH_ENCODE(1) | EBC_BXAP_WBF_ENCODE(0) |
- EBC_BXAP_CSN_ENCODE(1) | EBC_BXAP_PEN_DISABLED |
- EBC_BXAP_OEN_ENCODE(1) | EBC_BXAP_BEM_RW);
-
-
- mtebc(pb3cr, EBC_BXCR_BAS_ENCODE(0x48400000) |
- EBC_BXCR_BS_1MB | EBC_BXCR_BU_RW | EBC_BXCR_BW_32BIT);
-
-
- /*--------------------------------------------------------------------+
- | Compact Flash, uses 2 Chip Selects (2 & 6)
- +-------------------------------------------------------------------*/
- mtebc(pb6ap,
- EBC_BXAP_BME_DISABLED | EBC_BXAP_TWT_ENCODE(8) |
- EBC_BXAP_BCE_DISABLE | EBC_BXAP_CSN_ENCODE(1) |
- EBC_BXAP_OEN_ENCODE(1)| EBC_BXAP_WBN_ENCODE(1) |
- EBC_BXAP_WBF_ENCODE(0)| EBC_BXAP_TH_ENCODE(1) |
- EBC_BXAP_RE_DISABLED | EBC_BXAP_BEM_WRITEONLY |
- EBC_BXAP_PEN_DISABLED);
-
- mtebc(pb6cr, EBC_BXCR_BAS_ENCODE(0xF0100000) |
- EBC_BXCR_BS_1MB | EBC_BXCR_BU_RW | EBC_BXCR_BW_16BIT);
-
- /*--------------------------------------------------------------------+
- | BME-32. Initialize bank 7 with default values.
- +-------------------------------------------------------------------*/
- mtebc(pb7ap,
- EBC_BXAP_RE_ENABLED | EBC_BXAP_SOR_NONDELAYED |
- EBC_BXAP_BME_DISABLED | EBC_BXAP_TWT_ENCODE(3) |
- EBC_BXAP_TH_ENCODE(1) | EBC_BXAP_WBF_ENCODE(0) |
- EBC_BXAP_CSN_ENCODE(1) | EBC_BXAP_PEN_DISABLED |
- EBC_BXAP_OEN_ENCODE(1) | EBC_BXAP_BEM_RW);
-
- mtebc(pb7cr, EBC_BXCR_BAS_ENCODE(0x48500000) |
- EBC_BXCR_BS_1MB | EBC_BXCR_BU_RW | EBC_BXCR_BW_32BIT);
-
- /*--------------------------------------------------------------------+
- * Setup the interrupt controller polarities, triggers, etc.
- +-------------------------------------------------------------------*/
- mtdcr (uic0sr, 0xffffffff); /* clear all */
- mtdcr (uic0er, 0x00000000); /* disable all */
- mtdcr (uic0cr, 0x00000000); /* all non- critical */
- mtdcr (uic0pr, 0xfffffe03); /* polarity */
- mtdcr (uic0tr, 0x01c00000); /* trigger edge vs level */
- mtdcr (uic0vr, 0x00000001); /* int31 highest, base=0x000 */
- mtdcr (uic0sr, 0xffffffff); /* clear all */
-
- mtdcr (uic1sr, 0xffffffff); /* clear all */
- mtdcr (uic1er, 0x00000000); /* disable all */
- mtdcr (uic1cr, 0x00000000); /* all non-critical */
- mtdcr (uic1pr, 0xffffc8ff); /* polarity */
- mtdcr (uic1tr, 0x00ff0000); /* trigger edge vs level */
- mtdcr (uic1vr, 0x00000001); /* int31 highest, base=0x000 */
- mtdcr (uic1sr, 0xffffffff); /* clear all */
-
- mtdcr (uic2sr, 0xffffffff); /* clear all */
- mtdcr (uic2er, 0x00000000); /* disable all */
- mtdcr (uic2cr, 0x00000000); /* all non-critical */
- mtdcr (uic2pr, 0xffff83ff); /* polarity */
- mtdcr (uic2tr, 0x00ff8c0f); /* trigger edge vs level */
- mtdcr (uic2vr, 0x00000001); /* int31 highest, base=0x000 */
- mtdcr (uic2sr, 0xffffffff); /* clear all */
-
- mtdcr (uicb0sr, 0xfc000000); /* clear all */
- mtdcr (uicb0er, 0x00000000); /* disable all */
- mtdcr (uicb0cr, 0x00000000); /* all non-critical */
- mtdcr (uicb0pr, 0xfc000000);
- mtdcr (uicb0tr, 0x00000000);
- mtdcr (uicb0vr, 0x00000001);
-
- fpga_init();
-
- return 0;
-}
-
-
-/*************************************************************************
- * checkboard
- *
- * Dump pertinent info to the console
- ************************************************************************/
-int checkboard (void)
-{
- sys_info_t sysinfo;
- unsigned char brd_rev, brd_id;
- unsigned short sernum;
- unsigned char scan_rev, scan_id, ofem_rev=0, ofem_id=0;
- unsigned char ofem_brd_rev, ofem_brd_id;
- KAREF_FPGA_REGS_ST *karef_ps;
- OFEM_FPGA_REGS_ST *ofem_ps;
-
- karef_ps = (KAREF_FPGA_REGS_ST *)CFG_KAREF_FPGA_BASE;
- ofem_ps = (OFEM_FPGA_REGS_ST *)CFG_OFEM_FPGA_BASE;
-
- scan_id = (unsigned char)((karef_ps->revision_ul &
- SAND_HAL_KA_SC_SCAN_REVISION_IDENTIFICATION_MASK)
- >> SAND_HAL_KA_SC_SCAN_REVISION_IDENTIFICATION_SHIFT);
-
- scan_rev = (unsigned char)((karef_ps->revision_ul & SAND_HAL_KA_SC_SCAN_REVISION_REVISION_MASK)
- >> SAND_HAL_KA_SC_SCAN_REVISION_REVISION_SHIFT);
-
- brd_rev = (unsigned char)((karef_ps->boardinfo_ul & SAND_HAL_KA_SC_SCAN_BRD_INFO_BRD_REV_MASK)
- >> SAND_HAL_KA_SC_SCAN_BRD_INFO_BRD_REV_SHIFT);
-
- brd_id = (unsigned char)((karef_ps->boardinfo_ul & SAND_HAL_KA_SC_SCAN_BRD_INFO_BRD_ID_MASK)
- >> SAND_HAL_KA_SC_SCAN_BRD_INFO_BRD_ID_SHIFT);
-
- ofem_brd_id = (unsigned char)((karef_ps->boardinfo_ul & SAND_HAL_KA_SC_SCAN_BRD_INFO_FEM_ID_MASK)
- >> SAND_HAL_KA_SC_SCAN_BRD_INFO_FEM_ID_SHIFT);
-
- ofem_brd_rev = (unsigned char)((karef_ps->boardinfo_ul & SAND_HAL_KA_SC_SCAN_BRD_INFO_FEM_REV_MASK)
- >> SAND_HAL_KA_SC_SCAN_BRD_INFO_FEM_REV_SHIFT);
-
- if (0xF != ofem_brd_id) {
- ofem_id = (unsigned char)((ofem_ps->revision_ul &
- SAND_HAL_KA_OF_OFEM_REVISION_IDENTIFICATION_MASK)
- >> SAND_HAL_KA_OF_OFEM_REVISION_IDENTIFICATION_SHIFT);
-
- ofem_rev = (unsigned char)((ofem_ps->revision_ul &
- SAND_HAL_KA_OF_OFEM_REVISION_REVISION_MASK)
- >> SAND_HAL_KA_OF_OFEM_REVISION_REVISION_SHIFT);
- }
-
- get_sys_info (&sysinfo);
-
- sernum = sbcommon_get_serial_number();
-
- printf ("Board: Sandburst Corporation Kamino Reference Design "
- "Serial Number: %d\n", sernum);
- printf ("%s\n", KAREF_U_BOOT_REL_STR);
-
- printf ("Built %s %s by %s\n", __DATE__, __TIME__, BUILDUSER);
- if (sbcommon_get_master()) {
- printf("Slot 0 - Master\nSlave board");
- if (sbcommon_secondary_present())
- printf(" present\n");
- else
- printf(" not detected\n");
- } else {
- printf("Slot 1 - Slave\n\n");
- }
-
- printf ("ScanFPGA ID:\t0x%02X\tRev: 0x%02X\n", scan_id, scan_rev);
- printf ("Board Rev:\t0x%02X\tID: 0x%02X\n", brd_rev, brd_id);
- if(0xF != ofem_brd_id) {
- printf("OFemFPGA ID:\t0x%02X\tRev: 0x%02X\n", ofem_id, ofem_rev);
- printf("OFEM Board Rev:\t0x%02X\tID: 0x%02X\n", ofem_brd_id, ofem_brd_rev);
- }
-
- /* Fix the ack in the bme 32 */
- udelay(5000);
- out32(CFG_BME32_BASE + 0x0000000C, 0x00000001);
- asm("eieio");
-
-
- return (0);
-}
-
-/*************************************************************************
- * misc_init_f
- *
- * Initialize I2C bus one to gain access to the fans
- ************************************************************************/
-int misc_init_f (void)
-{
- /* Turn on i2c bus 1 */
- puts ("I2C1: ");
- i2c1_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
- puts ("ready\n");
-
- /* Turn on fans 3 & 4 */
- sbcommon_fans();
-
- return (0);
-}
-
-/*************************************************************************
- * misc_init_r
- *
- * Do nothing.
- ************************************************************************/
-int misc_init_r (void)
-{
- unsigned short sernum;
- char envstr[255];
- KAREF_FPGA_REGS_ST *karef_ps;
- OFEM_FPGA_REGS_ST *ofem_ps;
-
- if(NULL != getenv("secondserial")) {
- puts("secondserial is set, switching to second serial port\n");
- setenv("stderr", "serial1");
- setenv("stdout", "serial1");
- setenv("stdin", "serial1");
- }
-
- setenv("ubrelver", KAREF_U_BOOT_REL_STR);
-
- memset(envstr, 0, 255);
- sprintf (envstr, "Built %s %s by %s", __DATE__, __TIME__, BUILDUSER);
- setenv("bldstr", envstr);
- saveenv();
-
- if( getenv("autorecover")) {
- setenv("autorecover", NULL);
- saveenv();
- sernum = sbcommon_get_serial_number();
-
- printf("\nSetting up environment for automatic filesystem recovery\n");
- /*
- * Setup default bootargs
- */
- memset(envstr, 0, 255);
-
- sprintf(envstr, "console=ttyS0,9600 root=/dev/ram0 "
- "rw ip=10.100.70.%d:::255.255.0.0:karef%d:eth0:none idebus=33",
- sernum, sernum);
- setenv("bootargs", envstr);
-
- /*
- * Setup Default boot command
- */
- setenv("bootcmd", "fatload ide 0 8000000 uimage.karef;"
- "fatload ide 0 8100000 pramdisk;"
- "bootm 8000000 8100000");
-
- printf("Done. Please type allow the system to continue to boot\n");
- }
-
- if( getenv("fakeled")) {
- karef_ps = (KAREF_FPGA_REGS_ST *)CFG_KAREF_FPGA_BASE;
- ofem_ps = (OFEM_FPGA_REGS_ST *)CFG_OFEM_FPGA_BASE;
- ofem_ps->control_ul &= ~SAND_HAL_KA_SC_SCAN_CNTL_FAULT_LED_MASK;
- karef_ps->control_ul &= ~SAND_HAL_KA_OF_OFEM_CNTL_FAULT_LED_MASK;
- setenv("bootdelay", "-1");
- saveenv();
- printf("fakeled is set. use 'setenv fakeled ; setenv bootdelay 5 ; saveenv' to recover\n");
- }
-
- return (0);
-}
-
-/*************************************************************************
- * ide_set_reset
- ************************************************************************/
-#ifdef CONFIG_IDE_RESET
-void ide_set_reset(int on)
-{
- KAREF_FPGA_REGS_ST *karef_ps;
- /* TODO: ide reset */
- karef_ps = (KAREF_FPGA_REGS_ST *)CFG_KAREF_FPGA_BASE;
-
- if (on) {
- karef_ps->reset_ul &= ~SAND_HAL_KA_SC_SCAN_RESET_CF_RESET_N_MASK;
- } else {
- karef_ps->reset_ul |= SAND_HAL_KA_SC_SCAN_RESET_CF_RESET_N_MASK;
- }
-}
-#endif /* CONFIG_IDE_RESET */
-
-/*************************************************************************
- * fpga_init
- ************************************************************************/
-void fpga_init(void)
-{
- KAREF_FPGA_REGS_ST *karef_ps;
- OFEM_FPGA_REGS_ST *ofem_ps;
- unsigned char ofem_id;
- unsigned long tmp;
-
- /* Ensure we have power all around */
- udelay(500);
-
- karef_ps = (KAREF_FPGA_REGS_ST *)CFG_KAREF_FPGA_BASE;
- tmp =
- SAND_HAL_KA_SC_SCAN_RESET_CF_RESET_N_MASK |
- SAND_HAL_KA_SC_SCAN_RESET_BME_RESET_N_MASK |
- SAND_HAL_KA_SC_SCAN_RESET_KA_RESET_N_MASK |
- SAND_HAL_KA_SC_SCAN_RESET_SLAVE_RESET_N_MASK |
- SAND_HAL_KA_SC_SCAN_RESET_OFEM_RESET_N_MASK |
- SAND_HAL_KA_SC_SCAN_RESET_IFE_A_RESET_N_MASK |
- SAND_HAL_KA_SC_SCAN_RESET_I2C_MUX1_RESET_N_MASK |
- SAND_HAL_KA_SC_SCAN_RESET_PHY0_RESET_N_MASK |
- SAND_HAL_KA_SC_SCAN_RESET_PHY1_RESET_N_MASK;
-
- karef_ps->reset_ul = tmp;
-
- /*
- * Wait a bit to allow the ofem fpga to get its brains
- */
- udelay(5000);
-
- /*
- * Check to see if the ofem is there
- */
- ofem_id = (unsigned char)((karef_ps->boardinfo_ul & SAND_HAL_KA_SC_SCAN_BRD_INFO_FEM_ID_MASK)
- >> SAND_HAL_KA_SC_SCAN_BRD_INFO_FEM_ID_SHIFT);
- if(0xF != ofem_id) {
- tmp =
- SAND_HAL_KA_OF_OFEM_RESET_I2C_MUX0_RESET_N_MASK |
- SAND_HAL_KA_OF_OFEM_RESET_LOCH0_RESET_N_MASK |
- SAND_HAL_KA_OF_OFEM_RESET_MAC0_RESET_N_MASK;
-
- ofem_ps = (OFEM_FPGA_REGS_ST *)CFG_OFEM_FPGA_BASE;
- ofem_ps->reset_ul = tmp;
-
- ofem_ps->control_ul |= 1 < SAND_HAL_KA_OF_OFEM_CNTL_FAULT_LED_SHIFT;
- }
-
- karef_ps->control_ul |= 1 << SAND_HAL_KA_SC_SCAN_CNTL_FAULT_LED_SHIFT;
-
- asm("eieio");
-
- return;
-}
-
-int karefSetupVars(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- unsigned short sernum;
- char envstr[255];
-
- sernum = sbcommon_get_serial_number();
-
- memset(envstr, 0, 255);
- /*
- * Setup our ip address
- */
- sprintf(envstr, "10.100.70.%d", sernum);
-
- setenv("ipaddr", envstr);
- /*
- * Setup the host ip address
- */
- setenv("serverip", "10.100.17.10");
-
- /*
- * Setup default bootargs
- */
- memset(envstr, 0, 255);
-
- sprintf(envstr, "console=ttyS0,9600 root=/dev/nfs "
- "rw nfsroot=10.100.17.10:/home/metrobox/mbc70.%d "
- "nfsaddrs=10.100.70.%d:10.100.17.10:10.100.1.1:"
- "255.255.0.0:karef%d.sandburst.com:eth0:none idebus=33",
- sernum, sernum, sernum);
-
- setenv("bootargs_nfs", envstr);
- setenv("bootargs", envstr);
-
- /*
- * Setup CF bootargs
- */
- memset(envstr, 0, 255);
-
- sprintf(envstr, "console=ttyS0,9600 root=/dev/hda2 "
- "rw ip=10.100.70.%d:::255.255.0.0:karef%d:eth0:none idebus=33",
- sernum, sernum);
-
- setenv("bootargs_cf", envstr);
-
- /*
- * Setup Default boot command
- */
- setenv("bootcmd_tftp", "tftp 8000000 uImage.karef;bootm 8000000");
- setenv("bootcmd", "tftp 8000000 uImage.karef;bootm 8000000");
-
- /*
- * Setup compact flash boot command
- */
- setenv("bootcmd_cf", "fatload ide 0 8000000 uimage.karef;bootm 8000000");
-
- saveenv();
-
- return(1);
-}
-
-int karefRecover(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- unsigned short sernum;
- char envstr[255];
-
- sernum = sbcommon_get_serial_number();
-
- printf("\nSetting up environment for filesystem recovery\n");
- /*
- * Setup default bootargs
- */
- memset(envstr, 0, 255);
-
- sprintf(envstr, "console=ttyS0,9600 root=/dev/ram0 "
- "rw ip=10.100.70.%d:::255.255.0.0:karef%d:eth0:none",
- sernum, sernum);
- setenv("bootargs", envstr);
-
- /*
- * Setup Default boot command
- */
-
- setenv("bootcmd", "fatload ide 0 8000000 uimage.karef;"
- "fatload ide 0 8100000 pramdisk;"
- "bootm 8000000 8100000");
-
- printf("Done. Please type boot<cr>.\nWhen the kernel has booted"
- " please type fsrecover.sh<cr>\n");
-
- return(1);
-}
-
-U_BOOT_CMD(kasetup, 1, 1, karefSetupVars,
- "kasetup - Set environment to factory defaults\n", NULL);
-
-U_BOOT_CMD(karecover, 1, 1, karefRecover,
- "karecover - Set environment to allow for fs recovery\n", NULL);
diff --git a/board/sandburst/karef/karef.h b/board/sandburst/karef/karef.h
deleted file mode 100644
index 5de7cb5130..0000000000
--- a/board/sandburst/karef/karef.h
+++ /dev/null
@@ -1,76 +0,0 @@
-#ifndef __KAREF_H__
-#define __KAREF_H__
-/*
- * (C) Copyright 2005
- * Sandburst Corporation
- * Travis B. Sawyer
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/* Ka Reference Design OFEM FPGA Registers & definitions */
-#include "hal_ka_sc_auto.h"
-#include "hal_ka_of_auto.h"
-
-typedef struct karef_board_id_s {
- const char name[40];
-} KAREF_BOARD_ID_ST, *KAREF_BOARD_ID_PST;
-
-/* SCAN FPGA */
-typedef struct karef_fpga_regs_s
-{
- volatile unsigned long revision_ul; /* Read Only */
- volatile unsigned long reset_ul; /* Read/Write */
- volatile unsigned long interrupt_ul; /* Read Only */
- volatile unsigned long mask_ul; /* Read/Write */
- volatile unsigned long scratch_ul; /* Read/Write */
- volatile unsigned long scrmask_ul; /* Read/Write */
- volatile unsigned long status_ul; /* Read Only */
- volatile unsigned long control_ul; /* Read/Write */
- volatile unsigned long boardinfo_ul; /* Read Only */
- volatile unsigned long scan_from0_ul; /* Read Only */
- volatile unsigned long scan_from1_ul; /* Read Only */
- volatile unsigned long scan_to0_ul; /* Read/Write */
- volatile unsigned long scan_to1_ul; /* Read/Write */
- volatile unsigned long scan_control_ul; /* Read/Write */
- volatile unsigned long pll_control_ul; /* Read/Write */
- volatile unsigned long core_clock_cnt_ul; /* Read/Write */
- volatile unsigned long dr_clock_cnt_ul; /* Read/Write */
- volatile unsigned long spi_clock_cnt_ul; /* Read/Write */
- volatile unsigned long brdout_data_ul; /* Read/Write */
- volatile unsigned long brdout_enable_ul; /* Read/Write */
- volatile unsigned long brdin_data_ul; /* Read Only */
- volatile unsigned long misc_ul; /* Read/Write */
-} __attribute__((packed)) KAREF_FPGA_REGS_ST , * KAREF_FPGA_REGS_PST;
-
-/* OFEM FPGA */
-typedef struct ofem_fpga_regs_s
-{
- volatile unsigned long revision_ul; /* Read Only */
- volatile unsigned long reset_ul; /* Read/Write */
- volatile unsigned long interrupt_ul; /* Read Only */
- volatile unsigned long mask_ul; /* Read/Write */
- volatile unsigned long scratch_ul; /* Read/Write */
- volatile unsigned long scrmask_ul; /* Read/Write */
- volatile unsigned long control_ul; /* Read/Write */
- volatile unsigned long mac_flow_ctrl_ul; /* Read/Write */
-} __attribute__((packed)) OFEM_FPGA_REGS_ST , * OFEM_FPGA_REGS_PST;
-
-
-#endif /* __KAREF_H__ */
diff --git a/board/sandburst/karef/karef_version.h b/board/sandburst/karef/karef_version.h
deleted file mode 100644
index 9960b9a717..0000000000
--- a/board/sandburst/karef/karef_version.h
+++ /dev/null
@@ -1,26 +0,0 @@
-#ifndef _KAREF_VERSION_H_
-#define _KAREF_VERSION_H_
-/*
- * Copyright (C) 2005 Sandburst Corporation
- * Travis B. Sawyer
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-#define KAREF_U_BOOT_REL_STR "Release 0.0.7"
-#endif
diff --git a/board/sandburst/karef/u-boot.lds b/board/sandburst/karef/u-boot.lds
deleted file mode 100644
index 9e9e99045f..0000000000
--- a/board/sandburst/karef/u-boot.lds
+++ /dev/null
@@ -1,159 +0,0 @@
-/*
- * (C) Copyright 2005
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- * Travis B. Sawyer, Sandburst Corporation, tsawyer@sandburst.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- .resetvec 0xFFFFFFFC :
- {
- *(.resetvec)
- } = 0xffff
-
- .bootpg 0xFFFFF000 :
- {
- cpu/ppc4xx/start.o (.bootpg)
- } = 0xffff
-
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/ppc4xx/start.o (.text)
- board/sandburst/karef/init.o (.text)
- cpu/ppc4xx/kgdb.o (.text)
- cpu/ppc4xx/traps.o (.text)
- cpu/ppc4xx/interrupts.o (.text)
- cpu/ppc4xx/serial.o (.text)
- cpu/ppc4xx/cpu_init.o (.text)
- cpu/ppc4xx/speed.o (.text)
- cpu/ppc4xx/4xx_enet.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/extable.o (.text)
- lib_generic/zlib.o (.text)
-
-/* . = env_offset;*/
-/* common/environment.o(.text)*/
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/sandburst/karef/u-boot.lds.debug b/board/sandburst/karef/u-boot.lds.debug
deleted file mode 100644
index 47d80fae1b..0000000000
--- a/board/sandburst/karef/u-boot.lds.debug
+++ /dev/null
@@ -1,146 +0,0 @@
-/*
- * (C) Copyright 2002-2005
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- * Travis B. Sawyer, Sandburst Corporation, tsawyer@sandburst.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/ppc4xx/start.o (.text)
- board/sandburst/karef/init.o (.text)
- cpu/ppc4xx/kgdb.o (.text)
- cpu/ppc4xx/traps.o (.text)
- cpu/ppc4xx/interrupts.o (.text)
- cpu/ppc4xx/serial.o (.text)
- cpu/ppc4xx/cpu_init.o (.text)
- cpu/ppc4xx/speed.o (.text)
- cpu/ppc4xx/4xx_enet.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/extable.o (.text)
- lib_generic/zlib.o (.text)
-
-/* common/environment.o(.text) */
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/sandburst/metrobox/Makefile b/board/sandburst/metrobox/Makefile
deleted file mode 100644
index 06a9a22b6a..0000000000
--- a/board/sandburst/metrobox/Makefile
+++ /dev/null
@@ -1,57 +0,0 @@
-#
-# (C) Copyright 2005
-# Travis B. Sawyer, Sandburst Corporation, tsawyer@sandburst.com
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-# TBS: add for debugging purposes
-BUILDUSER := $(shell whoami)
-FORCEBUILD := $(shell rm -f $(LIB) $(BOARD).o)
-
-CFLAGS += -DBUILDUSER='"$(BUILDUSER)"'
-# TBS: end debugging
-
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o ../common/flash.o ../common/ppc440gx_i2c.o \
- ../common/sb_common.o
-SOBJS = init.o
-
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend *~
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/sandburst/metrobox/config.mk b/board/sandburst/metrobox/config.mk
deleted file mode 100644
index 91aee2fc7d..0000000000
--- a/board/sandburst/metrobox/config.mk
+++ /dev/null
@@ -1,38 +0,0 @@
-#
-# (C) Copyright 2005
-# Travis B. Sawyer, Sandburst Corporation, tsawyer@sandburst.com
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-ifeq ($(ramsym),1)
-TEXT_BASE = 0x07FD0000
-else
-TEXT_BASE = 0xFFF80000
-endif
-
-PLATFORM_CPPFLAGS += -DCONFIG_440=1
-
-ifeq ($(debug),1)
-PLATFORM_CPPFLAGS += -DDEBUG
-endif
-
-ifeq ($(dbcr),1)
-PLATFORM_CPPFLAGS += -DCFG_INIT_DBCR=0x8cff0000
-endif
diff --git a/board/sandburst/metrobox/hal_xc_auto.h b/board/sandburst/metrobox/hal_xc_auto.h
deleted file mode 100644
index c99b38ca06..0000000000
--- a/board/sandburst/metrobox/hal_xc_auto.h
+++ /dev/null
@@ -1,553 +0,0 @@
-/* ****************************************************************
- * Common defs for reg spec for chip xc
- * Auto-generated by trex2: DO NOT HAND-EDIT!!
- * ****************************************************************
- */
-
-#ifndef HAL_XC_AUTO_H
-#define HAL_XC_AUTO_H
-
-/* ----------------------------------------------------------------
- * For block: 'xcvr_cntl'
- */
-
-/* ---- Block instance addressing (for block-select) */
-#define XCVR_CNTL_BLOCK_ADDR_BIT_L 6
-#define XCVR_CNTL_BLOCK_ADDR_BIT_H 9
-#define XCVR_CNTL_BLOCK_ADDR_WIDTH 4
-
-#define XCVR_CNTL_ADDR 0x0
-
-/* ---- Reg addressing (within block) */
-#define XCVR_CNTL_REG_ADDR_BIT_L 2
-#define XCVR_CNTL_REG_ADDR_BIT_H 5
-#define XCVR_CNTL_REG_ADDR_WIDTH 4
-
-
-/* ================================================================
- * ---- Register XC_XCVR_CNTL_REVISION */
-#define SAND_HAL_XC_XCVR_CNTL_REVISION_OFFSET 0x000
-#ifndef SAND_HAL_XC_XCVR_CNTL_REVISION_NO_TEST_MASK
-#define SAND_HAL_XC_XCVR_CNTL_REVISION_NO_TEST_MASK 0x000
-#endif
-#define SAND_HAL_XC_XCVR_CNTL_REVISION_MASK 0xffffffff
-#define SAND_HAL_XC_XCVR_CNTL_REVISION_MSB 31
-#define SAND_HAL_XC_XCVR_CNTL_REVISION_LSB 0
-
-/* ================================================================
- * ---- Register XC_XCVR_CNTL_RESET */
-#define SAND_HAL_XC_XCVR_CNTL_RESET_OFFSET 0x004
-#ifndef SAND_HAL_XC_XCVR_CNTL_RESET_NO_TEST_MASK
-#define SAND_HAL_XC_XCVR_CNTL_RESET_NO_TEST_MASK 0x000
-#endif
-#define SAND_HAL_XC_XCVR_CNTL_RESET_MASK 0xffffffff
-#define SAND_HAL_XC_XCVR_CNTL_RESET_MSB 31
-#define SAND_HAL_XC_XCVR_CNTL_RESET_LSB 0
-
-/* ================================================================
- * ---- Register XC_XCVR_CNTL_STATUS */
-#define SAND_HAL_XC_XCVR_CNTL_STATUS_OFFSET 0x008
-#ifndef SAND_HAL_XC_XCVR_CNTL_STATUS_NO_TEST_MASK
-#define SAND_HAL_XC_XCVR_CNTL_STATUS_NO_TEST_MASK 0x000
-#endif
-#define SAND_HAL_XC_XCVR_CNTL_STATUS_MASK 0xffffffff
-#define SAND_HAL_XC_XCVR_CNTL_STATUS_MSB 31
-#define SAND_HAL_XC_XCVR_CNTL_STATUS_LSB 0
-
-/* ================================================================
- * ---- Register XC_XCVR_CNTL_CNTL */
-#define SAND_HAL_XC_XCVR_CNTL_CNTL_OFFSET 0x01c
-#ifndef SAND_HAL_XC_XCVR_CNTL_CNTL_NO_TEST_MASK
-#define SAND_HAL_XC_XCVR_CNTL_CNTL_NO_TEST_MASK 0x000
-#endif
-#define SAND_HAL_XC_XCVR_CNTL_CNTL_MASK 0xffffffff
-#define SAND_HAL_XC_XCVR_CNTL_CNTL_MSB 31
-#define SAND_HAL_XC_XCVR_CNTL_CNTL_LSB 0
-
-/* ================================================================
- * ---- Register XC_XCVR_CNTL_BRD_INFO */
-#define SAND_HAL_XC_XCVR_CNTL_BRD_INFO_OFFSET 0x020
-#ifndef SAND_HAL_XC_XCVR_CNTL_BRD_INFO_NO_TEST_MASK
-#define SAND_HAL_XC_XCVR_CNTL_BRD_INFO_NO_TEST_MASK 0x000
-#endif
-#define SAND_HAL_XC_XCVR_CNTL_BRD_INFO_MASK 0xffffffff
-#define SAND_HAL_XC_XCVR_CNTL_BRD_INFO_MSB 31
-#define SAND_HAL_XC_XCVR_CNTL_BRD_INFO_LSB 0
-
-/* ================================================================
- * ---- Register XC_XCVR_CNTL_MAC_FLOW_CTL */
-#define SAND_HAL_XC_XCVR_CNTL_MAC_FLOW_CTL_OFFSET 0x024
-#ifndef SAND_HAL_XC_XCVR_CNTL_MAC_FLOW_CTL_NO_TEST_MASK
-#define SAND_HAL_XC_XCVR_CNTL_MAC_FLOW_CTL_NO_TEST_MASK 0x000
-#endif
-#define SAND_HAL_XC_XCVR_CNTL_MAC_FLOW_CTL_MASK 0xffffffff
-#define SAND_HAL_XC_XCVR_CNTL_MAC_FLOW_CTL_MSB 31
-#define SAND_HAL_XC_XCVR_CNTL_MAC_FLOW_CTL_LSB 0
-
-/* ================================================================
- * ---- Register XC_XCVR_CNTL_INTERRUPT */
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_OFFSET 0x00c
-#ifndef SAND_HAL_XC_XCVR_CNTL_INTERRUPT_NO_TEST_MASK
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_NO_TEST_MASK 0x000
-#endif
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK 0xffffffff
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MSB 31
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_LSB 0
-
-/* ================================================================
- * ---- Register XC_XCVR_CNTL_INTERRUPT_MASK */
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_OFFSET 0x010
-#ifndef SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_NO_TEST_MASK
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_NO_TEST_MASK 0x000
-#endif
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_MASK 0xffffffff
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_MSB 31
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_LSB 0
-
-/* ================================================================
- * ---- Register XC_XCVR_CNTL_SCRATCH */
-#define SAND_HAL_XC_XCVR_CNTL_SCRATCH_OFFSET 0x014
-#ifndef SAND_HAL_XC_XCVR_CNTL_SCRATCH_NO_TEST_MASK
-#define SAND_HAL_XC_XCVR_CNTL_SCRATCH_NO_TEST_MASK 0x000
-#endif
-#define SAND_HAL_XC_XCVR_CNTL_SCRATCH_MASK 0xffffffff
-#define SAND_HAL_XC_XCVR_CNTL_SCRATCH_MSB 31
-#define SAND_HAL_XC_XCVR_CNTL_SCRATCH_LSB 0
-
-/* ================================================================
- * ---- Register XC_XCVR_CNTL_SCRATCH_MASK */
-#define SAND_HAL_XC_XCVR_CNTL_SCRATCH_MASK_OFFSET 0x018
-#ifndef SAND_HAL_XC_XCVR_CNTL_SCRATCH_MASK_NO_TEST_MASK
-#define SAND_HAL_XC_XCVR_CNTL_SCRATCH_MASK_NO_TEST_MASK 0x000
-#endif
-#define SAND_HAL_XC_XCVR_CNTL_SCRATCH_MASK_MASK 0xffffffff
-#define SAND_HAL_XC_XCVR_CNTL_SCRATCH_MASK_MSB 31
-#define SAND_HAL_XC_XCVR_CNTL_SCRATCH_MASK_LSB 0
-
-/* ================================================================
- * Field info for register XC_XCVR_CNTL_REVISION */
-#define SAND_HAL_XC_XCVR_CNTL_REVISION_IDENTIFICATION_MASK 0x0000ff00
-#define SAND_HAL_XC_XCVR_CNTL_REVISION_IDENTIFICATION_SHIFT 8
-#define SAND_HAL_XC_XCVR_CNTL_REVISION_IDENTIFICATION_MSB 15
-#define SAND_HAL_XC_XCVR_CNTL_REVISION_IDENTIFICATION_LSB 8
-#define SAND_HAL_XC_XCVR_CNTL_REVISION_IDENTIFICATION_TYPE (SAND_HAL_TYPE_READ)
-#define SAND_HAL_XC_XCVR_CNTL_REVISION_IDENTIFICATION_DEFAULT 0x00000000
-#define SAND_HAL_XC_XCVR_CNTL_REVISION_REVISION_MASK 0x000000ff
-#define SAND_HAL_XC_XCVR_CNTL_REVISION_REVISION_SHIFT 0
-#define SAND_HAL_XC_XCVR_CNTL_REVISION_REVISION_MSB 7
-#define SAND_HAL_XC_XCVR_CNTL_REVISION_REVISION_LSB 0
-#define SAND_HAL_XC_XCVR_CNTL_REVISION_REVISION_TYPE (SAND_HAL_TYPE_READ)
-#define SAND_HAL_XC_XCVR_CNTL_REVISION_REVISION_DEFAULT 0x00000000
-
-/* ================================================================
- * Field info for register XC_XCVR_CNTL_RESET */
-#define SAND_HAL_XC_XCVR_CNTL_RESET_MAC1_RESET_N_MASK 0x00020000
-#define SAND_HAL_XC_XCVR_CNTL_RESET_MAC1_RESET_N_SHIFT 17
-#define SAND_HAL_XC_XCVR_CNTL_RESET_MAC1_RESET_N_MSB 17
-#define SAND_HAL_XC_XCVR_CNTL_RESET_MAC1_RESET_N_LSB 17
-#define SAND_HAL_XC_XCVR_CNTL_RESET_MAC1_RESET_N_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_XC_XCVR_CNTL_RESET_MAC1_RESET_N_DEFAULT 0x00000000
-#define SAND_HAL_XC_XCVR_CNTL_RESET_MAC0_RESET_N_MASK 0x00010000
-#define SAND_HAL_XC_XCVR_CNTL_RESET_MAC0_RESET_N_SHIFT 16
-#define SAND_HAL_XC_XCVR_CNTL_RESET_MAC0_RESET_N_MSB 16
-#define SAND_HAL_XC_XCVR_CNTL_RESET_MAC0_RESET_N_LSB 16
-#define SAND_HAL_XC_XCVR_CNTL_RESET_MAC0_RESET_N_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_XC_XCVR_CNTL_RESET_MAC0_RESET_N_DEFAULT 0x00000000
-#define SAND_HAL_XC_XCVR_CNTL_RESET_SLAVE_RESET_N_MASK 0x00008000
-#define SAND_HAL_XC_XCVR_CNTL_RESET_SLAVE_RESET_N_SHIFT 15
-#define SAND_HAL_XC_XCVR_CNTL_RESET_SLAVE_RESET_N_MSB 15
-#define SAND_HAL_XC_XCVR_CNTL_RESET_SLAVE_RESET_N_LSB 15
-#define SAND_HAL_XC_XCVR_CNTL_RESET_SLAVE_RESET_N_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_XC_XCVR_CNTL_RESET_SLAVE_RESET_N_DEFAULT 0x00000000
-#define SAND_HAL_XC_XCVR_CNTL_RESET_BME_RESET_N_MASK 0x00004000
-#define SAND_HAL_XC_XCVR_CNTL_RESET_BME_RESET_N_SHIFT 14
-#define SAND_HAL_XC_XCVR_CNTL_RESET_BME_RESET_N_MSB 14
-#define SAND_HAL_XC_XCVR_CNTL_RESET_BME_RESET_N_LSB 14
-#define SAND_HAL_XC_XCVR_CNTL_RESET_BME_RESET_N_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_XC_XCVR_CNTL_RESET_BME_RESET_N_DEFAULT 0x00000000
-#define SAND_HAL_XC_XCVR_CNTL_RESET_ACE_RESET_N_MASK 0x00002000
-#define SAND_HAL_XC_XCVR_CNTL_RESET_ACE_RESET_N_SHIFT 13
-#define SAND_HAL_XC_XCVR_CNTL_RESET_ACE_RESET_N_MSB 13
-#define SAND_HAL_XC_XCVR_CNTL_RESET_ACE_RESET_N_LSB 13
-#define SAND_HAL_XC_XCVR_CNTL_RESET_ACE_RESET_N_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_XC_XCVR_CNTL_RESET_ACE_RESET_N_DEFAULT 0x00000000
-#define SAND_HAL_XC_XCVR_CNTL_RESET_CF_RESET_N_MASK 0x00001000
-#define SAND_HAL_XC_XCVR_CNTL_RESET_CF_RESET_N_SHIFT 12
-#define SAND_HAL_XC_XCVR_CNTL_RESET_CF_RESET_N_MSB 12
-#define SAND_HAL_XC_XCVR_CNTL_RESET_CF_RESET_N_LSB 12
-#define SAND_HAL_XC_XCVR_CNTL_RESET_CF_RESET_N_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_XC_XCVR_CNTL_RESET_CF_RESET_N_DEFAULT 0x00000000
-#define SAND_HAL_XC_XCVR_CNTL_RESET_QE_A_RESET_N_MASK 0x00000800
-#define SAND_HAL_XC_XCVR_CNTL_RESET_QE_A_RESET_N_SHIFT 11
-#define SAND_HAL_XC_XCVR_CNTL_RESET_QE_A_RESET_N_MSB 11
-#define SAND_HAL_XC_XCVR_CNTL_RESET_QE_A_RESET_N_LSB 11
-#define SAND_HAL_XC_XCVR_CNTL_RESET_QE_A_RESET_N_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_XC_XCVR_CNTL_RESET_QE_A_RESET_N_DEFAULT 0x00000000
-#define SAND_HAL_XC_XCVR_CNTL_RESET_IFE_A_RESET_N_MASK 0x00000400
-#define SAND_HAL_XC_XCVR_CNTL_RESET_IFE_A_RESET_N_SHIFT 10
-#define SAND_HAL_XC_XCVR_CNTL_RESET_IFE_A_RESET_N_MSB 10
-#define SAND_HAL_XC_XCVR_CNTL_RESET_IFE_A_RESET_N_LSB 10
-#define SAND_HAL_XC_XCVR_CNTL_RESET_IFE_A_RESET_N_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_XC_XCVR_CNTL_RESET_IFE_A_RESET_N_DEFAULT 0x00000000
-#define SAND_HAL_XC_XCVR_CNTL_RESET_EFE_A_RESET_N_MASK 0x00000200
-#define SAND_HAL_XC_XCVR_CNTL_RESET_EFE_A_RESET_N_SHIFT 9
-#define SAND_HAL_XC_XCVR_CNTL_RESET_EFE_A_RESET_N_MSB 9
-#define SAND_HAL_XC_XCVR_CNTL_RESET_EFE_A_RESET_N_LSB 9
-#define SAND_HAL_XC_XCVR_CNTL_RESET_EFE_A_RESET_N_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_XC_XCVR_CNTL_RESET_EFE_A_RESET_N_DEFAULT 0x00000000
-#define SAND_HAL_XC_XCVR_CNTL_RESET_QE_B_RESET_N_MASK 0x00000100
-#define SAND_HAL_XC_XCVR_CNTL_RESET_QE_B_RESET_N_SHIFT 8
-#define SAND_HAL_XC_XCVR_CNTL_RESET_QE_B_RESET_N_MSB 8
-#define SAND_HAL_XC_XCVR_CNTL_RESET_QE_B_RESET_N_LSB 8
-#define SAND_HAL_XC_XCVR_CNTL_RESET_QE_B_RESET_N_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_XC_XCVR_CNTL_RESET_QE_B_RESET_N_DEFAULT 0x00000000
-#define SAND_HAL_XC_XCVR_CNTL_RESET_IFE_B_RESET_N_MASK 0x00000080
-#define SAND_HAL_XC_XCVR_CNTL_RESET_IFE_B_RESET_N_SHIFT 7
-#define SAND_HAL_XC_XCVR_CNTL_RESET_IFE_B_RESET_N_MSB 7
-#define SAND_HAL_XC_XCVR_CNTL_RESET_IFE_B_RESET_N_LSB 7
-#define SAND_HAL_XC_XCVR_CNTL_RESET_IFE_B_RESET_N_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_XC_XCVR_CNTL_RESET_IFE_B_RESET_N_DEFAULT 0x00000000
-#define SAND_HAL_XC_XCVR_CNTL_RESET_EFE_B_RESET_N_MASK 0x00000040
-#define SAND_HAL_XC_XCVR_CNTL_RESET_EFE_B_RESET_N_SHIFT 6
-#define SAND_HAL_XC_XCVR_CNTL_RESET_EFE_B_RESET_N_MSB 6
-#define SAND_HAL_XC_XCVR_CNTL_RESET_EFE_B_RESET_N_LSB 6
-#define SAND_HAL_XC_XCVR_CNTL_RESET_EFE_B_RESET_N_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_XC_XCVR_CNTL_RESET_EFE_B_RESET_N_DEFAULT 0x00000000
-#define SAND_HAL_XC_XCVR_CNTL_RESET_LOCK1_RESET_N_MASK 0x00000020
-#define SAND_HAL_XC_XCVR_CNTL_RESET_LOCK1_RESET_N_SHIFT 5
-#define SAND_HAL_XC_XCVR_CNTL_RESET_LOCK1_RESET_N_MSB 5
-#define SAND_HAL_XC_XCVR_CNTL_RESET_LOCK1_RESET_N_LSB 5
-#define SAND_HAL_XC_XCVR_CNTL_RESET_LOCK1_RESET_N_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_XC_XCVR_CNTL_RESET_LOCK1_RESET_N_DEFAULT 0x00000000
-#define SAND_HAL_XC_XCVR_CNTL_RESET_LOCK0_RESET_N_MASK 0x00000010
-#define SAND_HAL_XC_XCVR_CNTL_RESET_LOCK0_RESET_N_SHIFT 4
-#define SAND_HAL_XC_XCVR_CNTL_RESET_LOCK0_RESET_N_MSB 4
-#define SAND_HAL_XC_XCVR_CNTL_RESET_LOCK0_RESET_N_LSB 4
-#define SAND_HAL_XC_XCVR_CNTL_RESET_LOCK0_RESET_N_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_XC_XCVR_CNTL_RESET_LOCK0_RESET_N_DEFAULT 0x00000000
-#define SAND_HAL_XC_XCVR_CNTL_RESET_I2C_MUX1_RESET_N_MASK 0x00000008
-#define SAND_HAL_XC_XCVR_CNTL_RESET_I2C_MUX1_RESET_N_SHIFT 3
-#define SAND_HAL_XC_XCVR_CNTL_RESET_I2C_MUX1_RESET_N_MSB 3
-#define SAND_HAL_XC_XCVR_CNTL_RESET_I2C_MUX1_RESET_N_LSB 3
-#define SAND_HAL_XC_XCVR_CNTL_RESET_I2C_MUX1_RESET_N_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_XC_XCVR_CNTL_RESET_I2C_MUX1_RESET_N_DEFAULT 0x00000000
-#define SAND_HAL_XC_XCVR_CNTL_RESET_I2C_MUX0_RESET_N_MASK 0x00000004
-#define SAND_HAL_XC_XCVR_CNTL_RESET_I2C_MUX0_RESET_N_SHIFT 2
-#define SAND_HAL_XC_XCVR_CNTL_RESET_I2C_MUX0_RESET_N_MSB 2
-#define SAND_HAL_XC_XCVR_CNTL_RESET_I2C_MUX0_RESET_N_LSB 2
-#define SAND_HAL_XC_XCVR_CNTL_RESET_I2C_MUX0_RESET_N_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_XC_XCVR_CNTL_RESET_I2C_MUX0_RESET_N_DEFAULT 0x00000000
-#define SAND_HAL_XC_XCVR_CNTL_RESET_PHY0_RESET_N_MASK 0x00000002
-#define SAND_HAL_XC_XCVR_CNTL_RESET_PHY0_RESET_N_SHIFT 1
-#define SAND_HAL_XC_XCVR_CNTL_RESET_PHY0_RESET_N_MSB 1
-#define SAND_HAL_XC_XCVR_CNTL_RESET_PHY0_RESET_N_LSB 1
-#define SAND_HAL_XC_XCVR_CNTL_RESET_PHY0_RESET_N_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_XC_XCVR_CNTL_RESET_PHY0_RESET_N_DEFAULT 0x00000000
-#define SAND_HAL_XC_XCVR_CNTL_RESET_PHY1_RESET_N_MASK 0x00000001
-#define SAND_HAL_XC_XCVR_CNTL_RESET_PHY1_RESET_N_SHIFT 0
-#define SAND_HAL_XC_XCVR_CNTL_RESET_PHY1_RESET_N_MSB 0
-#define SAND_HAL_XC_XCVR_CNTL_RESET_PHY1_RESET_N_LSB 0
-#define SAND_HAL_XC_XCVR_CNTL_RESET_PHY1_RESET_N_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_XC_XCVR_CNTL_RESET_PHY1_RESET_N_DEFAULT 0x00000000
-
-/* ================================================================
- * Field info for register XC_XCVR_CNTL_STATUS */
-#define SAND_HAL_XC_XCVR_CNTL_STATUS_PS_A_PRES_N_MASK 0x00000004
-#define SAND_HAL_XC_XCVR_CNTL_STATUS_PS_A_PRES_N_SHIFT 2
-#define SAND_HAL_XC_XCVR_CNTL_STATUS_PS_A_PRES_N_MSB 2
-#define SAND_HAL_XC_XCVR_CNTL_STATUS_PS_A_PRES_N_LSB 2
-#define SAND_HAL_XC_XCVR_CNTL_STATUS_PS_A_PRES_N_TYPE (SAND_HAL_TYPE_READ)
-#define SAND_HAL_XC_XCVR_CNTL_STATUS_PS_A_PRES_N_DEFAULT 0x00000000
-#define SAND_HAL_XC_XCVR_CNTL_STATUS_PS_B_PRES_N_MASK 0x00000002
-#define SAND_HAL_XC_XCVR_CNTL_STATUS_PS_B_PRES_N_SHIFT 1
-#define SAND_HAL_XC_XCVR_CNTL_STATUS_PS_B_PRES_N_MSB 1
-#define SAND_HAL_XC_XCVR_CNTL_STATUS_PS_B_PRES_N_LSB 1
-#define SAND_HAL_XC_XCVR_CNTL_STATUS_PS_B_PRES_N_TYPE (SAND_HAL_TYPE_READ)
-#define SAND_HAL_XC_XCVR_CNTL_STATUS_PS_B_PRES_N_DEFAULT 0x00000000
-#define SAND_HAL_XC_XCVR_CNTL_STATUS_ALL_GOOD_MASK 0x00000001
-#define SAND_HAL_XC_XCVR_CNTL_STATUS_ALL_GOOD_SHIFT 0
-#define SAND_HAL_XC_XCVR_CNTL_STATUS_ALL_GOOD_MSB 0
-#define SAND_HAL_XC_XCVR_CNTL_STATUS_ALL_GOOD_LSB 0
-#define SAND_HAL_XC_XCVR_CNTL_STATUS_ALL_GOOD_TYPE (SAND_HAL_TYPE_READ)
-#define SAND_HAL_XC_XCVR_CNTL_STATUS_ALL_GOOD_DEFAULT 0x00000000
-
-/* ================================================================
- * Field info for register XC_XCVR_CNTL_CNTL */
-#define SAND_HAL_XC_XCVR_CNTL_CNTL_SW_PWR_DOWN_MASK 0x00000400
-#define SAND_HAL_XC_XCVR_CNTL_CNTL_SW_PWR_DOWN_SHIFT 10
-#define SAND_HAL_XC_XCVR_CNTL_CNTL_SW_PWR_DOWN_MSB 10
-#define SAND_HAL_XC_XCVR_CNTL_CNTL_SW_PWR_DOWN_LSB 10
-#define SAND_HAL_XC_XCVR_CNTL_CNTL_SW_PWR_DOWN_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_XC_XCVR_CNTL_CNTL_SW_PWR_DOWN_DEFAULT 0x00000000
-#define SAND_HAL_XC_XCVR_CNTL_CNTL_OVER_TEMP_LED_MASK 0x00000300
-#define SAND_HAL_XC_XCVR_CNTL_CNTL_OVER_TEMP_LED_SHIFT 8
-#define SAND_HAL_XC_XCVR_CNTL_CNTL_OVER_TEMP_LED_MSB 9
-#define SAND_HAL_XC_XCVR_CNTL_CNTL_OVER_TEMP_LED_LSB 8
-#define SAND_HAL_XC_XCVR_CNTL_CNTL_OVER_TEMP_LED_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_XC_XCVR_CNTL_CNTL_OVER_TEMP_LED_DEFAULT 0x00000000
-#define SAND_HAL_XC_XCVR_CNTL_CNTL_ERROR_LED_MASK 0x000000c0
-#define SAND_HAL_XC_XCVR_CNTL_CNTL_ERROR_LED_SHIFT 6
-#define SAND_HAL_XC_XCVR_CNTL_CNTL_ERROR_LED_MSB 7
-#define SAND_HAL_XC_XCVR_CNTL_CNTL_ERROR_LED_LSB 6
-#define SAND_HAL_XC_XCVR_CNTL_CNTL_ERROR_LED_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_XC_XCVR_CNTL_CNTL_ERROR_LED_DEFAULT 0x00000000
-#define SAND_HAL_XC_XCVR_CNTL_CNTL_RS232_R_LED_MASK 0x00000030
-#define SAND_HAL_XC_XCVR_CNTL_CNTL_RS232_R_LED_SHIFT 4
-#define SAND_HAL_XC_XCVR_CNTL_CNTL_RS232_R_LED_MSB 5
-#define SAND_HAL_XC_XCVR_CNTL_CNTL_RS232_R_LED_LSB 4
-#define SAND_HAL_XC_XCVR_CNTL_CNTL_RS232_R_LED_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_XC_XCVR_CNTL_CNTL_RS232_R_LED_DEFAULT 0x00000000
-#define SAND_HAL_XC_XCVR_CNTL_CNTL_RS232_L_LED_MASK 0x0000000c
-#define SAND_HAL_XC_XCVR_CNTL_CNTL_RS232_L_LED_SHIFT 2
-#define SAND_HAL_XC_XCVR_CNTL_CNTL_RS232_L_LED_MSB 3
-#define SAND_HAL_XC_XCVR_CNTL_CNTL_RS232_L_LED_LSB 2
-#define SAND_HAL_XC_XCVR_CNTL_CNTL_RS232_L_LED_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_XC_XCVR_CNTL_CNTL_RS232_L_LED_DEFAULT 0x00000000
-#define SAND_HAL_XC_XCVR_CNTL_CNTL_CORE_CLK_50_EN_MASK 0x00000002
-#define SAND_HAL_XC_XCVR_CNTL_CNTL_CORE_CLK_50_EN_SHIFT 1
-#define SAND_HAL_XC_XCVR_CNTL_CNTL_CORE_CLK_50_EN_MSB 1
-#define SAND_HAL_XC_XCVR_CNTL_CNTL_CORE_CLK_50_EN_LSB 1
-#define SAND_HAL_XC_XCVR_CNTL_CNTL_CORE_CLK_50_EN_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_XC_XCVR_CNTL_CNTL_CORE_CLK_50_EN_DEFAULT 0x00000001
-#define SAND_HAL_XC_XCVR_CNTL_CNTL_PCI_CLK_EN_MASK 0x00000001
-#define SAND_HAL_XC_XCVR_CNTL_CNTL_PCI_CLK_EN_SHIFT 0
-#define SAND_HAL_XC_XCVR_CNTL_CNTL_PCI_CLK_EN_MSB 0
-#define SAND_HAL_XC_XCVR_CNTL_CNTL_PCI_CLK_EN_LSB 0
-#define SAND_HAL_XC_XCVR_CNTL_CNTL_PCI_CLK_EN_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_XC_XCVR_CNTL_CNTL_PCI_CLK_EN_DEFAULT 0x00000001
-
-/* ================================================================
- * Field info for register XC_XCVR_CNTL_BRD_INFO */
-#define SAND_HAL_XC_XCVR_CNTL_BRD_INFO_BRD_ID_MASK 0x000000f0
-#define SAND_HAL_XC_XCVR_CNTL_BRD_INFO_BRD_ID_SHIFT 4
-#define SAND_HAL_XC_XCVR_CNTL_BRD_INFO_BRD_ID_MSB 7
-#define SAND_HAL_XC_XCVR_CNTL_BRD_INFO_BRD_ID_LSB 4
-#define SAND_HAL_XC_XCVR_CNTL_BRD_INFO_BRD_ID_TYPE (SAND_HAL_TYPE_READ)
-#define SAND_HAL_XC_XCVR_CNTL_BRD_INFO_BRD_ID_DEFAULT 0x00000000
-#define SAND_HAL_XC_XCVR_CNTL_BRD_INFO_BRD_REV_MASK 0x00000003
-#define SAND_HAL_XC_XCVR_CNTL_BRD_INFO_BRD_REV_SHIFT 0
-#define SAND_HAL_XC_XCVR_CNTL_BRD_INFO_BRD_REV_MSB 1
-#define SAND_HAL_XC_XCVR_CNTL_BRD_INFO_BRD_REV_LSB 0
-#define SAND_HAL_XC_XCVR_CNTL_BRD_INFO_BRD_REV_TYPE (SAND_HAL_TYPE_READ)
-#define SAND_HAL_XC_XCVR_CNTL_BRD_INFO_BRD_REV_DEFAULT 0x00000000
-
-/* ================================================================
- * Field info for register XC_XCVR_CNTL_MAC_FLOW_CTL */
-#define SAND_HAL_XC_XCVR_CNTL_MAC_FLOW_CTL_MACB_TXPAUSE_FR_MASK 0x00001000
-#define SAND_HAL_XC_XCVR_CNTL_MAC_FLOW_CTL_MACB_TXPAUSE_FR_SHIFT 12
-#define SAND_HAL_XC_XCVR_CNTL_MAC_FLOW_CTL_MACB_TXPAUSE_FR_MSB 12
-#define SAND_HAL_XC_XCVR_CNTL_MAC_FLOW_CTL_MACB_TXPAUSE_FR_LSB 12
-#define SAND_HAL_XC_XCVR_CNTL_MAC_FLOW_CTL_MACB_TXPAUSE_FR_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_XC_XCVR_CNTL_MAC_FLOW_CTL_MACB_TXPAUSE_FR_DEFAULT 0x00000000
-#define SAND_HAL_XC_XCVR_CNTL_MAC_FLOW_CTL_MACB_TXPAUSE_ADDR_MASK 0x00000f00
-#define SAND_HAL_XC_XCVR_CNTL_MAC_FLOW_CTL_MACB_TXPAUSE_ADDR_SHIFT 8
-#define SAND_HAL_XC_XCVR_CNTL_MAC_FLOW_CTL_MACB_TXPAUSE_ADDR_MSB 11
-#define SAND_HAL_XC_XCVR_CNTL_MAC_FLOW_CTL_MACB_TXPAUSE_ADDR_LSB 8
-#define SAND_HAL_XC_XCVR_CNTL_MAC_FLOW_CTL_MACB_TXPAUSE_ADDR_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_XC_XCVR_CNTL_MAC_FLOW_CTL_MACB_TXPAUSE_ADDR_DEFAULT 0x00000000
-#define SAND_HAL_XC_XCVR_CNTL_MAC_FLOW_CTL_MACA_TXPAUSE_FR_MASK 0x00000010
-#define SAND_HAL_XC_XCVR_CNTL_MAC_FLOW_CTL_MACA_TXPAUSE_FR_SHIFT 4
-#define SAND_HAL_XC_XCVR_CNTL_MAC_FLOW_CTL_MACA_TXPAUSE_FR_MSB 4
-#define SAND_HAL_XC_XCVR_CNTL_MAC_FLOW_CTL_MACA_TXPAUSE_FR_LSB 4
-#define SAND_HAL_XC_XCVR_CNTL_MAC_FLOW_CTL_MACA_TXPAUSE_FR_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_XC_XCVR_CNTL_MAC_FLOW_CTL_MACA_TXPAUSE_FR_DEFAULT 0x00000000
-#define SAND_HAL_XC_XCVR_CNTL_MAC_FLOW_CTL_MACA_TXPAUSE_ADDR_MASK 0x0000000f
-#define SAND_HAL_XC_XCVR_CNTL_MAC_FLOW_CTL_MACA_TXPAUSE_ADDR_SHIFT 0
-#define SAND_HAL_XC_XCVR_CNTL_MAC_FLOW_CTL_MACA_TXPAUSE_ADDR_MSB 3
-#define SAND_HAL_XC_XCVR_CNTL_MAC_FLOW_CTL_MACA_TXPAUSE_ADDR_LSB 0
-#define SAND_HAL_XC_XCVR_CNTL_MAC_FLOW_CTL_MACA_TXPAUSE_ADDR_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_XC_XCVR_CNTL_MAC_FLOW_CTL_MACA_TXPAUSE_ADDR_DEFAULT 0x00000000
-
-/* ================================================================
- * Field info for register XC_XCVR_CNTL_INTERRUPT */
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_BME_TIMEOUT_MASK 0x00002000
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_BME_TIMEOUT_SHIFT 13
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_BME_TIMEOUT_MSB 13
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_BME_TIMEOUT_LSB 13
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_BME_TIMEOUT_TYPE (SAND_HAL_TYPE_READ)
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_BME_TIMEOUT_DEFAULT 0x00000000
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MAC_TIMEOUT_MASK 0x00001000
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MAC_TIMEOUT_SHIFT 12
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MAC_TIMEOUT_MSB 12
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MAC_TIMEOUT_LSB 12
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MAC_TIMEOUT_TYPE (SAND_HAL_TYPE_READ)
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MAC_TIMEOUT_DEFAULT 0x00000000
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_QK_A_LOSOUT_N_MASK 0x00000800
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_QK_A_LOSOUT_N_SHIFT 11
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_QK_A_LOSOUT_N_MSB 11
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_QK_A_LOSOUT_N_LSB 11
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_QK_A_LOSOUT_N_TYPE (SAND_HAL_TYPE_READ)
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_QK_A_LOSOUT_N_DEFAULT 0x00000000
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_QK_B_LOSOUT_N_MASK 0x00000400
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_QK_B_LOSOUT_N_SHIFT 10
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_QK_B_LOSOUT_N_MSB 10
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_QK_B_LOSOUT_N_LSB 10
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_QK_B_LOSOUT_N_TYPE (SAND_HAL_TYPE_READ)
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_QK_B_LOSOUT_N_DEFAULT 0x00000000
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_XFP_A_NR_MASK 0x00000200
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_XFP_A_NR_SHIFT 9
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_XFP_A_NR_MSB 9
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_XFP_A_NR_LSB 9
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_XFP_A_NR_TYPE (SAND_HAL_TYPE_READ)
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_XFP_A_NR_DEFAULT 0x00000000
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_XFP_B_NR_MASK 0x00000100
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_XFP_B_NR_SHIFT 8
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_XFP_B_NR_MSB 8
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_XFP_B_NR_LSB 8
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_XFP_B_NR_TYPE (SAND_HAL_TYPE_READ)
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_XFP_B_NR_DEFAULT 0x00000000
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_XFP_A_INT_N_MASK 0x00000080
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_XFP_A_INT_N_SHIFT 7
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_XFP_A_INT_N_MSB 7
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_XFP_A_INT_N_LSB 7
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_XFP_A_INT_N_TYPE (SAND_HAL_TYPE_READ)
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_XFP_A_INT_N_DEFAULT 0x00000000
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_XFP_B_INT_N_MASK 0x00000040
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_XFP_B_INT_N_SHIFT 6
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_XFP_B_INT_N_MSB 6
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_XFP_B_INT_N_LSB 6
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_XFP_B_INT_N_TYPE (SAND_HAL_TYPE_READ)
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_XFP_B_INT_N_DEFAULT 0x00000000
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_OVER_TEMP_A_MASK 0x00000020
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_OVER_TEMP_A_SHIFT 5
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_OVER_TEMP_A_MSB 5
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_OVER_TEMP_A_LSB 5
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_OVER_TEMP_A_TYPE (SAND_HAL_TYPE_READ)
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_OVER_TEMP_A_DEFAULT 0x00000000
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_OVER_TEMP_B_MASK 0x00000010
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_OVER_TEMP_B_SHIFT 4
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_OVER_TEMP_B_MSB 4
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_OVER_TEMP_B_LSB 4
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_OVER_TEMP_B_TYPE (SAND_HAL_TYPE_READ)
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_OVER_TEMP_B_DEFAULT 0x00000000
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_POWER_FAIL_A_MASK 0x00000008
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_POWER_FAIL_A_SHIFT 3
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_POWER_FAIL_A_MSB 3
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_POWER_FAIL_A_LSB 3
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_POWER_FAIL_A_TYPE (SAND_HAL_TYPE_READ)
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_POWER_FAIL_A_DEFAULT 0x00000000
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_POWER_FAIL_B_MASK 0x00000004
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_POWER_FAIL_B_SHIFT 2
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_POWER_FAIL_B_MSB 2
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_POWER_FAIL_B_LSB 2
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_POWER_FAIL_B_TYPE (SAND_HAL_TYPE_READ)
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_POWER_FAIL_B_DEFAULT 0x00000000
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MAC1_INT_N_MASK 0x00000002
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MAC1_INT_N_SHIFT 1
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MAC1_INT_N_MSB 1
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MAC1_INT_N_LSB 1
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MAC1_INT_N_TYPE (SAND_HAL_TYPE_READ)
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MAC1_INT_N_DEFAULT 0x00000000
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MAC0_INT_N_MASK 0x00000001
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MAC0_INT_N_SHIFT 0
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MAC0_INT_N_MSB 0
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MAC0_INT_N_LSB 0
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MAC0_INT_N_TYPE (SAND_HAL_TYPE_READ)
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MAC0_INT_N_DEFAULT 0x00000000
-
-/* ================================================================
- * Field info for register XC_XCVR_CNTL_INTERRUPT_MASK */
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_BME_TIMEOUT_DISINT_MASK 0x00002000
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_BME_TIMEOUT_DISINT_SHIFT 13
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_BME_TIMEOUT_DISINT_MSB 13
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_BME_TIMEOUT_DISINT_LSB 13
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_BME_TIMEOUT_DISINT_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_BME_TIMEOUT_DISINT_DEFAULT 0x00000001
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_MAC_TIMEOUT_DISINT_MASK 0x00001000
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_MAC_TIMEOUT_DISINT_SHIFT 12
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_MAC_TIMEOUT_DISINT_MSB 12
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_MAC_TIMEOUT_DISINT_LSB 12
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_MAC_TIMEOUT_DISINT_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_MAC_TIMEOUT_DISINT_DEFAULT 0x00000001
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_QK_A_LOSOUT_N_DISINT_MASK 0x00000800
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_QK_A_LOSOUT_N_DISINT_SHIFT 11
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_QK_A_LOSOUT_N_DISINT_MSB 11
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_QK_A_LOSOUT_N_DISINT_LSB 11
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_QK_A_LOSOUT_N_DISINT_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_QK_A_LOSOUT_N_DISINT_DEFAULT 0x00000001
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_QK_B_LOSOUT_N_DISINT_MASK 0x00000400
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_QK_B_LOSOUT_N_DISINT_SHIFT 10
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_QK_B_LOSOUT_N_DISINT_MSB 10
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_QK_B_LOSOUT_N_DISINT_LSB 10
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_QK_B_LOSOUT_N_DISINT_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_QK_B_LOSOUT_N_DISINT_DEFAULT 0x00000001
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_XFP_A_NR_DISINT_MASK 0x00000200
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_XFP_A_NR_DISINT_SHIFT 9
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_XFP_A_NR_DISINT_MSB 9
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_XFP_A_NR_DISINT_LSB 9
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_XFP_A_NR_DISINT_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_XFP_A_NR_DISINT_DEFAULT 0x00000001
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_XFP_B_NR_DISINT_MASK 0x00000100
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_XFP_B_NR_DISINT_SHIFT 8
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_XFP_B_NR_DISINT_MSB 8
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_XFP_B_NR_DISINT_LSB 8
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_XFP_B_NR_DISINT_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_XFP_B_NR_DISINT_DEFAULT 0x00000001
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_XFP_A_INT_N_DISINT_MASK 0x00000080
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_XFP_A_INT_N_DISINT_SHIFT 7
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_XFP_A_INT_N_DISINT_MSB 7
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_XFP_A_INT_N_DISINT_LSB 7
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_XFP_A_INT_N_DISINT_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_XFP_A_INT_N_DISINT_DEFAULT 0x00000001
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_XFP_B_INT_N_DISINT_MASK 0x00000040
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_XFP_B_INT_N_DISINT_SHIFT 6
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_XFP_B_INT_N_DISINT_MSB 6
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_XFP_B_INT_N_DISINT_LSB 6
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_XFP_B_INT_N_DISINT_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_XFP_B_INT_N_DISINT_DEFAULT 0x00000001
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_OVER_TEMP_A_DISINT_MASK 0x00000020
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_OVER_TEMP_A_DISINT_SHIFT 5
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_OVER_TEMP_A_DISINT_MSB 5
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_OVER_TEMP_A_DISINT_LSB 5
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_OVER_TEMP_A_DISINT_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_OVER_TEMP_A_DISINT_DEFAULT 0x00000001
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_OVER_TEMP_B_DISINT_MASK 0x00000010
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_OVER_TEMP_B_DISINT_SHIFT 4
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_OVER_TEMP_B_DISINT_MSB 4
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_OVER_TEMP_B_DISINT_LSB 4
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_OVER_TEMP_B_DISINT_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_OVER_TEMP_B_DISINT_DEFAULT 0x00000001
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_POWER_FAIL_A_DISINT_MASK 0x00000008
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_POWER_FAIL_A_DISINT_SHIFT 3
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_POWER_FAIL_A_DISINT_MSB 3
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_POWER_FAIL_A_DISINT_LSB 3
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_POWER_FAIL_A_DISINT_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_POWER_FAIL_A_DISINT_DEFAULT 0x00000001
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_POWER_FAIL_B_DISINT_MASK 0x00000004
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_POWER_FAIL_B_DISINT_SHIFT 2
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_POWER_FAIL_B_DISINT_MSB 2
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_POWER_FAIL_B_DISINT_LSB 2
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_POWER_FAIL_B_DISINT_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_POWER_FAIL_B_DISINT_DEFAULT 0x00000001
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_MAC1_INT_N_DISINT_MASK 0x00000002
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_MAC1_INT_N_DISINT_SHIFT 1
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_MAC1_INT_N_DISINT_MSB 1
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_MAC1_INT_N_DISINT_LSB 1
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_MAC1_INT_N_DISINT_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_MAC1_INT_N_DISINT_DEFAULT 0x00000001
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_MAC0_INT_N_DISINT_MASK 0x00000001
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_MAC0_INT_N_DISINT_SHIFT 0
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_MAC0_INT_N_DISINT_MSB 0
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_MAC0_INT_N_DISINT_LSB 0
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_MAC0_INT_N_DISINT_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_XC_XCVR_CNTL_INTERRUPT_MASK_MAC0_INT_N_DISINT_DEFAULT 0x00000001
-
-/* ================================================================
- * Field info for register XC_XCVR_CNTL_SCRATCH */
-#define SAND_HAL_XC_XCVR_CNTL_SCRATCH_TEST_BITS_MASK 0xffffffff
-#define SAND_HAL_XC_XCVR_CNTL_SCRATCH_TEST_BITS_SHIFT 0
-#define SAND_HAL_XC_XCVR_CNTL_SCRATCH_TEST_BITS_MSB 31
-#define SAND_HAL_XC_XCVR_CNTL_SCRATCH_TEST_BITS_LSB 0
-#define SAND_HAL_XC_XCVR_CNTL_SCRATCH_TEST_BITS_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_XC_XCVR_CNTL_SCRATCH_TEST_BITS_DEFAULT 0x00000000
-
-/* ================================================================
- * Field info for register XC_XCVR_CNTL_SCRATCH_MASK */
-#define SAND_HAL_XC_XCVR_CNTL_SCRATCH_MASK_TEST_BITS_DISINT_MASK 0xffffffff
-#define SAND_HAL_XC_XCVR_CNTL_SCRATCH_MASK_TEST_BITS_DISINT_SHIFT 0
-#define SAND_HAL_XC_XCVR_CNTL_SCRATCH_MASK_TEST_BITS_DISINT_MSB 31
-#define SAND_HAL_XC_XCVR_CNTL_SCRATCH_MASK_TEST_BITS_DISINT_LSB 0
-#define SAND_HAL_XC_XCVR_CNTL_SCRATCH_MASK_TEST_BITS_DISINT_TYPE (SAND_HAL_TYPE_WRITE)
-#define SAND_HAL_XC_XCVR_CNTL_SCRATCH_MASK_TEST_BITS_DISINT_DEFAULT 0xffffffff
-
-#endif /* matches #ifndef HAL_XC_AUTO_H */
diff --git a/board/sandburst/metrobox/init.S b/board/sandburst/metrobox/init.S
deleted file mode 100644
index e398f0008d..0000000000
--- a/board/sandburst/metrobox/init.S
+++ /dev/null
@@ -1,99 +0,0 @@
-/*
-* Copyright (C) 2005
-* Travis B. Sawyer, Sandburst Corporation, tsawyer@sandburst.com
-*
-* See file CREDITS for list of people who contributed to this
-* project.
-*
-* This program is free software; you can redistribute it and/or
-* modify it under the terms of the GNU General Public License as
-* published by the Free Software Foundation; either version 2 of
-* the License, or (at your option) any later version.
-*
-* This program is distributed in the hope that it will be useful,
-* but WITHOUT ANY WARRANTY; without even the implied warranty of
-* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-* GNU General Public License for more details.
-*
-* You should have received a copy of the GNU General Public License
-* along with this program; if not, write to the Free Software
-* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-* MA 02111-1307 USA
-*/
-
-#include <ppc_asm.tmpl>
-#include <config.h>
-
-/* General */
-#define TLB_VALID 0x00000200
-
-/* Supported page sizes */
-
-#define SZ_1K 0x00000000
-#define SZ_4K 0x00000010
-#define SZ_16K 0x00000020
-#define SZ_64K 0x00000030
-#define SZ_256K 0x00000040
-#define SZ_1M 0x00000050
-#define SZ_16M 0x00000070
-#define SZ_256M 0x00000090
-
-/* Storage attributes */
-#define SA_W 0x00000800 /* Write-through */
-#define SA_I 0x00000400 /* Caching inhibited */
-#define SA_M 0x00000200 /* Memory coherence */
-#define SA_G 0x00000100 /* Guarded */
-#define SA_E 0x00000080 /* Endian */
-
-/* Access control */
-#define AC_X 0x00000024 /* Execute */
-#define AC_W 0x00000012 /* Write */
-#define AC_R 0x00000009 /* Read */
-
-/* Some handy macros */
-
-#define EPN(e) ((e) & 0xfffffc00)
-#define TLB0(epn,sz) ( (EPN((epn)) | (sz) | TLB_VALID ) )
-#define TLB1(rpn,erpn) ( ((rpn)&0xfffffc00) | (erpn) )
-#define TLB2(a) ( (a)&0x00000fbf )
-
-#define tlbtab_start\
- mflr r1 ;\
- bl 0f ;
-
-#define tlbtab_end\
- .long 0, 0, 0 ; \
-0: mflr r0 ; \
- mtlr r1 ; \
- blr ;
-
-#define tlbentry(epn,sz,rpn,erpn,attr)\
- .long TLB0(epn,sz),TLB1(rpn,erpn),TLB2(attr)
-
-
-/**************************************************************************
- * TLB TABLE
- *
- * This table is used by the cpu boot code to setup the initial tlb
- * entries. Rather than make broad assumptions in the cpu source tree,
- * this table lets each board set things up however they like.
- *
- * Pointer to the table is returned in r1
- *
- *************************************************************************/
-
- .section .bootpg,"ax"
- .globl tlbtab
-
-tlbtab:
- tlbtab_start
- tlbentry( 0xf0000000, SZ_256M, 0xf0000000, 1, AC_R|AC_W|AC_X|SA_G|SA_I)
- tlbentry( CFG_PERIPHERAL_BASE, SZ_256M, 0x40000000, 1, AC_R|AC_W|SA_G|SA_I)
- tlbentry( CFG_ISRAM_BASE, SZ_256K, 0x80000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I)
- tlbentry( CFG_SDRAM_BASE, SZ_256M, 0x00000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I )
- tlbentry( CFG_SDRAM_BASE+0x10000000, SZ_256M, 0x10000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I )
- tlbentry( CFG_SDRAM_BASE+0x20000000, SZ_256M, 0x20000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I )
- tlbentry( CFG_SDRAM_BASE+0x30000000, SZ_256M, 0x30000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I )
- tlbentry( CFG_PCI_BASE, SZ_256M, 0x00000000, 2, AC_R|AC_W|SA_G|SA_I )
- tlbentry( CFG_PCI_MEMBASE, SZ_256M, 0x00000000, 3, AC_R|AC_W|SA_G|SA_I )
- tlbtab_end
diff --git a/board/sandburst/metrobox/metrobox.c b/board/sandburst/metrobox/metrobox.c
deleted file mode 100644
index 86d259fac4..0000000000
--- a/board/sandburst/metrobox/metrobox.c
+++ /dev/null
@@ -1,536 +0,0 @@
-/*
- * Copyright (c) 2005
- * Travis B. Sawyer, Sandburst Corporation, tsawyer@sandburst.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-#include <config.h>
-#include <common.h>
-#include <command.h>
-#include "metrobox.h"
-#include "metrobox_version.h"
-#include <asm/processor.h>
-#include <asm/io.h>
-#include <spd_sdram.h>
-#include <i2c.h>
-#include "../common/ppc440gx_i2c.h"
-#include "../common/sb_common.h"
-
-void fpga_init (void);
-
-METROBOX_BOARD_ID_ST board_id_as[] =
-{ {"Undefined"}, /* Not specified */
- {"2x10Gb"}, /* 2 ports, 10 GbE */
- {"20x1Gb"}, /* 20 ports, 1 GbE */
- {"Reserved"}, /* Reserved for future use */
-};
-
-/*************************************************************************
- * board_early_init_f
- *
- * Setup chip selects, initialize the Opto-FPGA, initialize
- * interrupt polarity and triggers.
- ************************************************************************/
-int board_early_init_f (void)
-{
- ppc440_gpio_regs_t *gpio_regs;
-
- /* Enable GPIO interrupts */
- mtsdr(sdr_pfc0, 0x00103E00);
-
- /* Setup access for LEDs, and system topology info */
- gpio_regs = (ppc440_gpio_regs_t *)CFG_GPIO_BASE;
- gpio_regs->open_drain = SBCOMMON_GPIO_SYS_LEDS;
- gpio_regs->tri_state = SBCOMMON_GPIO_DBGLEDS;
-
- /* Turn on all the leds for now */
- gpio_regs->out = SBCOMMON_GPIO_LEDS;
-
- /*--------------------------------------------------------------------+
- | Initialize EBC CONFIG
- +-------------------------------------------------------------------*/
- mtebc(xbcfg,
- EBC_CFG_LE_UNLOCK | EBC_CFG_PTD_ENABLE |
- EBC_CFG_RTC_64PERCLK | EBC_CFG_ATC_PREVIOUS |
- EBC_CFG_DTC_PREVIOUS | EBC_CFG_CTC_PREVIOUS |
- EBC_CFG_EMC_DEFAULT | EBC_CFG_PME_DISABLE |
- EBC_CFG_PR_32);
-
- /*--------------------------------------------------------------------+
- | 1/2 MB FLASH. Initialize bank 0 with default values.
- +-------------------------------------------------------------------*/
- mtebc(pb0ap,
- EBC_BXAP_BME_DISABLED | EBC_BXAP_TWT_ENCODE(8) |
- EBC_BXAP_BCE_DISABLE | EBC_BXAP_CSN_ENCODE(1) |
- EBC_BXAP_OEN_ENCODE(1)| EBC_BXAP_WBN_ENCODE(1) |
- EBC_BXAP_WBF_ENCODE(1)| EBC_BXAP_TH_ENCODE(1) |
- EBC_BXAP_RE_DISABLED | EBC_BXAP_BEM_WRITEONLY |
- EBC_BXAP_PEN_DISABLED);
-
- mtebc(pb0cr, EBC_BXCR_BAS_ENCODE(CFG_FLASH_BASE) |
- EBC_BXCR_BS_1MB | EBC_BXCR_BU_RW | EBC_BXCR_BW_8BIT);
- /*--------------------------------------------------------------------+
- | 8KB NVRAM/RTC. Initialize bank 1 with default values.
- +-------------------------------------------------------------------*/
- mtebc(pb1ap,
- EBC_BXAP_BME_DISABLED | EBC_BXAP_TWT_ENCODE(10) |
- EBC_BXAP_BCE_DISABLE | EBC_BXAP_CSN_ENCODE(1) |
- EBC_BXAP_OEN_ENCODE(1)| EBC_BXAP_WBN_ENCODE(1) |
- EBC_BXAP_WBF_ENCODE(1)| EBC_BXAP_TH_ENCODE(1) |
- EBC_BXAP_RE_DISABLED | EBC_BXAP_BEM_WRITEONLY |
- EBC_BXAP_PEN_DISABLED);
-
- mtebc(pb1cr, EBC_BXCR_BAS_ENCODE(0x48000000) |
- EBC_BXCR_BS_1MB | EBC_BXCR_BU_RW | EBC_BXCR_BW_8BIT);
-
- /*--------------------------------------------------------------------+
- | Compact Flash, uses 2 Chip Selects (2 & 6)
- +-------------------------------------------------------------------*/
- mtebc(pb2ap,
- EBC_BXAP_BME_DISABLED | EBC_BXAP_TWT_ENCODE(8) |
- EBC_BXAP_BCE_DISABLE | EBC_BXAP_CSN_ENCODE(1) |
- EBC_BXAP_OEN_ENCODE(1)| EBC_BXAP_WBN_ENCODE(1) |
- EBC_BXAP_WBF_ENCODE(0)| EBC_BXAP_TH_ENCODE(1) |
- EBC_BXAP_RE_DISABLED | EBC_BXAP_BEM_WRITEONLY |
- EBC_BXAP_PEN_DISABLED);
-
- mtebc(pb2cr, EBC_BXCR_BAS_ENCODE(0xF0000000) |
- EBC_BXCR_BS_1MB | EBC_BXCR_BU_RW | EBC_BXCR_BW_16BIT);
-
- /*--------------------------------------------------------------------+
- | OPTO & OFEM FPGA. Initialize bank 3 with default values.
- +-------------------------------------------------------------------*/
- mtebc(pb3ap,
- EBC_BXAP_RE_ENABLED | EBC_BXAP_SOR_NONDELAYED |
- EBC_BXAP_BME_DISABLED | EBC_BXAP_TWT_ENCODE(3) |
- EBC_BXAP_TH_ENCODE(1) | EBC_BXAP_WBF_ENCODE(0) |
- EBC_BXAP_CSN_ENCODE(1) | EBC_BXAP_PEN_DISABLED |
- EBC_BXAP_OEN_ENCODE(1) | EBC_BXAP_BEM_RW);
-
- mtebc(pb3cr, EBC_BXCR_BAS_ENCODE(0x48200000) |
- EBC_BXCR_BS_1MB | EBC_BXCR_BU_RW | EBC_BXCR_BW_32BIT);
-
- /*--------------------------------------------------------------------+
- | MAC A for metrobox
- | MAC A & B for Kamino. OFEM FPGA decodes the addresses
- | Initialize bank 4 with default values.
- +-------------------------------------------------------------------*/
- mtebc(pb4ap,
- EBC_BXAP_RE_ENABLED | EBC_BXAP_SOR_NONDELAYED |
- EBC_BXAP_BME_DISABLED | EBC_BXAP_TWT_ENCODE(3) |
- EBC_BXAP_TH_ENCODE(1) | EBC_BXAP_WBF_ENCODE(0) |
- EBC_BXAP_CSN_ENCODE(1) | EBC_BXAP_PEN_DISABLED |
- EBC_BXAP_OEN_ENCODE(1) | EBC_BXAP_BEM_RW);
-
- mtebc(pb4cr, EBC_BXCR_BAS_ENCODE(0x48600000) |
- EBC_BXCR_BS_1MB | EBC_BXCR_BU_RW | EBC_BXCR_BW_32BIT);
-
- /*--------------------------------------------------------------------+
- | Metrobox MAC B Initialize bank 5 with default values.
- | KA REF FPGA Initialize bank 5 with default values.
- +-------------------------------------------------------------------*/
- mtebc(pb5ap,
- EBC_BXAP_RE_ENABLED | EBC_BXAP_SOR_NONDELAYED |
- EBC_BXAP_BME_DISABLED | EBC_BXAP_TWT_ENCODE(3) |
- EBC_BXAP_TH_ENCODE(1) | EBC_BXAP_WBF_ENCODE(0) |
- EBC_BXAP_CSN_ENCODE(1) | EBC_BXAP_PEN_DISABLED |
- EBC_BXAP_OEN_ENCODE(1) | EBC_BXAP_BEM_RW);
-
- mtebc(pb5cr, EBC_BXCR_BAS_ENCODE(0x48700000) |
- EBC_BXCR_BS_1MB | EBC_BXCR_BU_RW | EBC_BXCR_BW_32BIT);
-
- /*--------------------------------------------------------------------+
- | Compact Flash, uses 2 Chip Selects (2 & 6)
- +-------------------------------------------------------------------*/
- mtebc(pb6ap,
- EBC_BXAP_BME_DISABLED | EBC_BXAP_TWT_ENCODE(8) |
- EBC_BXAP_BCE_DISABLE | EBC_BXAP_CSN_ENCODE(1) |
- EBC_BXAP_OEN_ENCODE(1)| EBC_BXAP_WBN_ENCODE(1) |
- EBC_BXAP_WBF_ENCODE(0)| EBC_BXAP_TH_ENCODE(1) |
- EBC_BXAP_RE_DISABLED | EBC_BXAP_BEM_WRITEONLY |
- EBC_BXAP_PEN_DISABLED);
-
- mtebc(pb6cr, EBC_BXCR_BAS_ENCODE(0xF0100000) |
- EBC_BXCR_BS_1MB | EBC_BXCR_BU_RW | EBC_BXCR_BW_16BIT);
-
- /*--------------------------------------------------------------------+
- | BME-32. Initialize bank 7 with default values.
- +-------------------------------------------------------------------*/
- mtebc(pb7ap,
- EBC_BXAP_RE_ENABLED | EBC_BXAP_SOR_NONDELAYED |
- EBC_BXAP_BME_DISABLED | EBC_BXAP_TWT_ENCODE(3) |
- EBC_BXAP_TH_ENCODE(1) | EBC_BXAP_WBF_ENCODE(0) |
- EBC_BXAP_CSN_ENCODE(1) | EBC_BXAP_PEN_DISABLED |
- EBC_BXAP_OEN_ENCODE(1) | EBC_BXAP_BEM_RW);
-
- mtebc(pb7cr, EBC_BXCR_BAS_ENCODE(0x48500000) |
- EBC_BXCR_BS_1MB | EBC_BXCR_BU_RW | EBC_BXCR_BW_32BIT);
-
- /*--------------------------------------------------------------------+
- * Setup the interrupt controller polarities, triggers, etc.
- +-------------------------------------------------------------------*/
- mtdcr (uic0sr, 0xffffffff); /* clear all */
- mtdcr (uic0er, 0x00000000); /* disable all */
- mtdcr (uic0cr, 0x00000000); /* all non- critical */
- mtdcr (uic0pr, 0xfffffe03); /* polarity */
- mtdcr (uic0tr, 0x01c00000); /* trigger edge vs level */
- mtdcr (uic0vr, 0x00000001); /* int31 highest, base=0x000 */
- mtdcr (uic0sr, 0xffffffff); /* clear all */
-
- mtdcr (uic1sr, 0xffffffff); /* clear all */
- mtdcr (uic1er, 0x00000000); /* disable all */
- mtdcr (uic1cr, 0x00000000); /* all non-critical */
- mtdcr (uic1pr, 0xffffc8ff); /* polarity */
- mtdcr (uic1tr, 0x00ff0000); /* trigger edge vs level */
- mtdcr (uic1vr, 0x00000001); /* int31 highest, base=0x000 */
- mtdcr (uic1sr, 0xffffffff); /* clear all */
-
- mtdcr (uic2sr, 0xffffffff); /* clear all */
- mtdcr (uic2er, 0x00000000); /* disable all */
- mtdcr (uic2cr, 0x00000000); /* all non-critical */
- mtdcr (uic2pr, 0xffff83ff); /* polarity */
- mtdcr (uic2tr, 0x00ff8c0f); /* trigger edge vs level */
- mtdcr (uic2vr, 0x00000001); /* int31 highest, base=0x000 */
- mtdcr (uic2sr, 0xffffffff); /* clear all */
-
- mtdcr (uicb0sr, 0xfc000000); /* clear all */
- mtdcr (uicb0er, 0x00000000); /* disable all */
- mtdcr (uicb0cr, 0x00000000); /* all non-critical */
- mtdcr (uicb0pr, 0xfc000000);
- mtdcr (uicb0tr, 0x00000000);
- mtdcr (uicb0vr, 0x00000001);
-
- fpga_init();
-
- return 0;
-}
-
-/*************************************************************************
- * checkboard
- *
- * Dump pertinent info to the console
- ************************************************************************/
-int checkboard (void)
-{
- sys_info_t sysinfo;
- unsigned char brd_rev, brd_id;
- unsigned short sernum;
- unsigned char opto_rev, opto_id;
- OPTO_FPGA_REGS_ST *opto_ps;
-
- opto_ps = (OPTO_FPGA_REGS_ST *)CFG_FPGA_BASE;
-
- opto_rev = (unsigned char)((opto_ps->revision_ul &
- SAND_HAL_XC_XCVR_CNTL_REVISION_REVISION_MASK)
- >> SAND_HAL_XC_XCVR_CNTL_REVISION_REVISION_SHIFT);
-
- opto_id = (unsigned char)((opto_ps->revision_ul &
- SAND_HAL_XC_XCVR_CNTL_REVISION_IDENTIFICATION_MASK)
- >> SAND_HAL_XC_XCVR_CNTL_REVISION_IDENTIFICATION_SHIFT);
-
- brd_rev = (unsigned char)((opto_ps->boardinfo_ul &
- SAND_HAL_XC_XCVR_CNTL_BRD_INFO_BRD_REV_MASK)
- >> SAND_HAL_XC_XCVR_CNTL_BRD_INFO_BRD_REV_SHIFT);
-
- brd_id = (unsigned char)((opto_ps->boardinfo_ul &
- SAND_HAL_XC_XCVR_CNTL_BRD_INFO_BRD_ID_MASK)
- >> SAND_HAL_XC_XCVR_CNTL_BRD_INFO_BRD_ID_SHIFT);
-
- get_sys_info (&sysinfo);
-
- sernum = sbcommon_get_serial_number();
- printf ("Board: Sandburst Corporation MetroBox Serial Number: %d\n", sernum);
- printf ("%s\n", METROBOX_U_BOOT_REL_STR);
-
- printf ("Built %s %s by %s\n", __DATE__, __TIME__, BUILDUSER);
- if (sbcommon_get_master()) {
- printf("Slot 0 - Master\nSlave board");
- if (sbcommon_secondary_present())
- printf(" present\n");
- else
- printf(" not detected\n");
- } else {
- printf("Slot 1 - Slave\n\n");
- }
-
- printf ("OptoFPGA ID:\t0x%02X\tRev: 0x%02X\n", opto_id, opto_rev);
- printf ("Board Rev:\t0x%02X\tID: %s\n", brd_rev, board_id_as[brd_id]);
-
- /* Fix the ack in the bme 32 */
- udelay(5000);
- out32(CFG_BME32_BASE + 0x0000000C, 0x00000001);
- asm("eieio");
-
-
- return (0);
-}
-
-/*************************************************************************
- * misc_init_f
- *
- * Initialize I2C bus one to gain access to the fans
- ************************************************************************/
-int misc_init_f (void)
-{
- /* Turn on i2c bus 1 */
- puts ("I2C1: ");
- i2c1_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
- puts ("ready\n");
-
- /* Turn on fans */
- sbcommon_fans();
-
- return (0);
-}
-
-/*************************************************************************
- * misc_init_r
- *
- * Do nothing.
- ************************************************************************/
-int misc_init_r (void)
-{
- unsigned short sernum;
- char envstr[255];
- unsigned char opto_rev;
- OPTO_FPGA_REGS_ST *opto_ps;
-
- opto_ps = (OPTO_FPGA_REGS_ST *)CFG_FPGA_BASE;
-
- if(NULL != getenv("secondserial")) {
- puts("secondserial is set, switching to second serial port\n");
- setenv("stderr", "serial1");
- setenv("stdout", "serial1");
- setenv("stdin", "serial1");
- }
-
- setenv("ubrelver", METROBOX_U_BOOT_REL_STR);
-
- memset(envstr, 0, 255);
- sprintf (envstr, "Built %s %s by %s", __DATE__, __TIME__, BUILDUSER);
- setenv("bldstr", envstr);
- saveenv();
-
- if( getenv("autorecover")) {
- setenv("autorecover", NULL);
- saveenv();
- sernum = sbcommon_get_serial_number();
-
- printf("\nSetting up environment for automatic filesystem recovery\n");
- /*
- * Setup default bootargs
- */
- memset(envstr, 0, 255);
- sprintf(envstr, "console=ttyS0,9600 root=/dev/ram0 "
- "rw ip=10.100.60.%d:::255.255.0.0:metrobox%d:eth0:none idebus=33",
- sernum, sernum);
- setenv("bootargs", envstr);
-
- /*
- * Setup Default boot command
- */
- setenv("bootcmd", "fatload ide 0 8000000 pimage.metrobox;"
- "fatload ide 0 8100000 pramdisk;"
- "bootm 8000000 8100000");
-
- printf("Done. Please type allow the system to continue to boot\n");
- }
-
- if( getenv("fakeled")) {
- setenv("bootdelay", "-1");
- saveenv();
- printf("fakeled is set. use 'setenv fakeled ; setenv bootdelay 5 ; saveenv' to recover\n");
- opto_rev = (unsigned char)((opto_ps->revision_ul &
- SAND_HAL_XC_XCVR_CNTL_REVISION_REVISION_MASK)
- >> SAND_HAL_XC_XCVR_CNTL_REVISION_REVISION_SHIFT);
-
- if(0x12 <= opto_rev) {
- opto_ps->control_ul &= ~ SAND_HAL_XC_XCVR_CNTL_CNTL_ERROR_LED_MASK;
- }
- }
-
- return (0);
-}
-
-/*************************************************************************
- * ide_set_reset
- ************************************************************************/
-#ifdef CONFIG_IDE_RESET
-void ide_set_reset(int on)
-{
- OPTO_FPGA_REGS_ST *opto_ps;
- opto_ps = (OPTO_FPGA_REGS_ST *)CFG_FPGA_BASE;
-
- if (on) { /* assert RESET */
- opto_ps->reset_ul &= ~SAND_HAL_XC_XCVR_CNTL_RESET_CF_RESET_N_MASK;
- } else { /* release RESET */
- opto_ps->reset_ul |= SAND_HAL_XC_XCVR_CNTL_RESET_CF_RESET_N_MASK;
- }
-}
-#endif /* CONFIG_IDE_RESET */
-
-/*************************************************************************
- * fpga_init
- ************************************************************************/
-void fpga_init(void)
-{
- OPTO_FPGA_REGS_ST *opto_ps;
- unsigned char opto_rev;
- unsigned long tmp;
-
- /* Ensure we have power all around */
- udelay(500);
-
- /*
- * Take appropriate hw bits out of reset
- */
- opto_ps = (OPTO_FPGA_REGS_ST *)CFG_FPGA_BASE;
-
- tmp =
- SAND_HAL_XC_XCVR_CNTL_RESET_MAC1_RESET_N_MASK |
- SAND_HAL_XC_XCVR_CNTL_RESET_MAC0_RESET_N_MASK |
- SAND_HAL_XC_XCVR_CNTL_RESET_BME_RESET_N_MASK |
- SAND_HAL_XC_XCVR_CNTL_RESET_ACE_RESET_N_MASK |
- SAND_HAL_XC_XCVR_CNTL_RESET_CF_RESET_N_MASK |
- SAND_HAL_XC_XCVR_CNTL_RESET_QE_A_RESET_N_MASK |
- SAND_HAL_XC_XCVR_CNTL_RESET_IFE_A_RESET_N_MASK |
- SAND_HAL_XC_XCVR_CNTL_RESET_EFE_A_RESET_N_MASK |
- SAND_HAL_XC_XCVR_CNTL_RESET_QE_B_RESET_N_MASK |
- SAND_HAL_XC_XCVR_CNTL_RESET_IFE_B_RESET_N_MASK |
- SAND_HAL_XC_XCVR_CNTL_RESET_EFE_B_RESET_N_MASK |
- SAND_HAL_XC_XCVR_CNTL_RESET_LOCK1_RESET_N_MASK |
- SAND_HAL_XC_XCVR_CNTL_RESET_LOCK0_RESET_N_MASK |
- SAND_HAL_XC_XCVR_CNTL_RESET_I2C_MUX1_RESET_N_MASK |
- SAND_HAL_XC_XCVR_CNTL_RESET_I2C_MUX0_RESET_N_MASK |
- SAND_HAL_XC_XCVR_CNTL_RESET_PHY0_RESET_N_MASK |
- SAND_HAL_XC_XCVR_CNTL_RESET_PHY1_RESET_N_MASK |
- SAND_HAL_XC_XCVR_CNTL_RESET_SLAVE_RESET_N_MASK;
- opto_ps->reset_ul = tmp;
- /*
- * Turn on the 'Slow Blink' for the System Error Led.
- * Ensure FPGA rev is up to at least rev 0x12
- */
- opto_rev = (unsigned char)((opto_ps->revision_ul &
- SAND_HAL_XC_XCVR_CNTL_REVISION_REVISION_MASK)
- >> SAND_HAL_XC_XCVR_CNTL_REVISION_REVISION_SHIFT);
- if(0x12 <= opto_rev) {
- opto_ps->control_ul |= 1 << SAND_HAL_XC_XCVR_CNTL_CNTL_ERROR_LED_SHIFT;
- }
-
- asm("eieio");
-
- return;
-}
-
-int metroboxSetupVars(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- unsigned short sernum;
- char envstr[255];
-
- sernum = sbcommon_get_serial_number();
-
- memset(envstr, 0, 255);
- /*
- * Setup our ip address
- */
- sprintf(envstr, "10.100.60.%d", sernum);
-
- setenv("ipaddr", envstr);
- /*
- * Setup the host ip address
- */
- setenv("serverip", "10.100.17.10");
-
- /*
- * Setup default bootargs
- */
- memset(envstr, 0, 255);
-
- sprintf(envstr, "console=ttyS0,9600 root=/dev/nfs "
- "rw nfsroot=10.100.17.10:/home/metrobox/mbc%d "
- "nfsaddrs=10.100.60.%d:10.100.17.10:10.100.1.1"
- ":255.255.0.0:metrobox%d.sandburst.com:eth0:none idebus=33",
- sernum, sernum, sernum);
-
- setenv("bootargs_nfs", envstr);
- setenv("bootargs", envstr);
-
- /*
- * Setup CF bootargs
- */
- memset(envstr, 0, 255);
- sprintf(envstr, "console=ttyS0,9600 root=/dev/hda2 "
- "rw ip=10.100.60.%d:::255.255.0.0:metrobox%d:eth0:none idebus=33",
- sernum, sernum);
-
- setenv("bootargs_cf", envstr);
-
- /*
- * Setup Default boot command
- */
- setenv("bootcmd_tftp", "tftp 8000000 pImage.metrobox;bootm 8000000");
- setenv("bootcmd", "tftp 8000000 pImage.metrobox;bootm 8000000");
-
- /*
- * Setup compact flash boot command
- */
- setenv("bootcmd_cf", "fatload ide 0 8000000 pimage.metrobox;bootm 8000000");
-
- saveenv();
-
-
- return(1);
-}
-
-int metroboxRecover(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- unsigned short sernum;
- char envstr[255];
-
- sernum = sbcommon_get_serial_number();
-
- printf("\nSetting up environment for filesystem recovery\n");
- /*
- * Setup default bootargs
- */
- memset(envstr, 0, 255);
- sprintf(envstr, "console=ttyS0,9600 root=/dev/ram0 "
- "rw ip=10.100.60.%d:::255.255.0.0:metrobox%d:eth0:none",
- sernum, sernum);
-
- setenv("bootargs", envstr);
-
- /*
- * Setup Default boot command
- */
- setenv("bootcmd", "fatload ide 0 8000000 pimage.metrobox;"
- "fatload ide 0 8100000 pramdisk;"
- "bootm 8000000 8100000");
-
- printf("Done. Please type boot<cr>.\nWhen the kernel has booted"
- " please type fsrecover.sh<cr>\n");
-
- return(1);
-}
-
-U_BOOT_CMD(mbsetup, 1, 1, metroboxSetupVars,
- "mbsetup - Set environment to factory defaults\n", NULL);
-
-U_BOOT_CMD(mbrecover, 1, 1, metroboxRecover,
- "mbrecover - Set environment to allow for fs recovery\n", NULL);
diff --git a/board/sandburst/metrobox/metrobox.h b/board/sandburst/metrobox/metrobox.h
deleted file mode 100644
index 3f28f00442..0000000000
--- a/board/sandburst/metrobox/metrobox.h
+++ /dev/null
@@ -1,45 +0,0 @@
-#ifndef __METROBOX_H__
-#define __METROBOX_H__
-/*
- * (C) Copyright 2005
- * Travis B. Sawyer, Sandburst Corporation, tsawyer@sandburst.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-typedef struct metrobox_board_id_s {
- const char name[40];
-} METROBOX_BOARD_ID_ST, *METROBOX_BOARD_ID_PST;
-
-
-/* Metrobox Opto-FPGA registers and definitions */
-#include "hal_xc_auto.h"
-typedef struct opto_fpga_regs_s {
- volatile unsigned long revision_ul; /* Read Only */
- volatile unsigned long reset_ul; /* Read/Write */
- volatile unsigned long status_ul; /* Read Only */
- volatile unsigned long interrupt_ul; /* Read Only */
- volatile unsigned long mask_ul; /* Read/Write */
- volatile unsigned long scratch_ul; /* Read/Write */
- volatile unsigned long scrmask_ul; /* Read/Write */
- volatile unsigned long control_ul; /* Read/Write */
- volatile unsigned long boardinfo_ul; /* Read Only */
-} __attribute__ ((packed)) OPTO_FPGA_REGS_ST , *OPTO_FPGA_REGS_PST;
-
-#endif /* __METROBOX_H__ */
diff --git a/board/sandburst/metrobox/metrobox_version.h b/board/sandburst/metrobox/metrobox_version.h
deleted file mode 100644
index 1b6fee5d8a..0000000000
--- a/board/sandburst/metrobox/metrobox_version.h
+++ /dev/null
@@ -1,27 +0,0 @@
-#ifndef _METROBOX_VERSION_H_
-#define _METROBOX_VERSION_H_
-/*
- * (C) Copyright 2005
- * Travis B. Sawyer, Sandburst Corporation, tsawyer@sandburst.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-#define METROBOX_U_BOOT_REL_STR "Release 2.0.3"
-
-#endif
diff --git a/board/sandburst/metrobox/u-boot.lds b/board/sandburst/metrobox/u-boot.lds
deleted file mode 100644
index a17401af92..0000000000
--- a/board/sandburst/metrobox/u-boot.lds
+++ /dev/null
@@ -1,159 +0,0 @@
-/*
- * (C) Copyright 2005
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- * Travis B. Sawyer, Sandburst Corporation, tsawyer@sandburst.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- .resetvec 0xFFFFFFFC :
- {
- *(.resetvec)
- } = 0xffff
-
- .bootpg 0xFFFFF000 :
- {
- cpu/ppc4xx/start.o (.bootpg)
- } = 0xffff
-
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/ppc4xx/start.o (.text)
- board/sandburst/metrobox/init.o (.text)
- cpu/ppc4xx/kgdb.o (.text)
- cpu/ppc4xx/traps.o (.text)
- cpu/ppc4xx/interrupts.o (.text)
- cpu/ppc4xx/serial.o (.text)
- cpu/ppc4xx/cpu_init.o (.text)
- cpu/ppc4xx/speed.o (.text)
- cpu/ppc4xx/4xx_enet.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/extable.o (.text)
- lib_generic/zlib.o (.text)
-
-/* . = env_offset;*/
-/* common/environment.o(.text)*/
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/sandburst/metrobox/u-boot.lds.debug b/board/sandburst/metrobox/u-boot.lds.debug
deleted file mode 100644
index fef4c4220c..0000000000
--- a/board/sandburst/metrobox/u-boot.lds.debug
+++ /dev/null
@@ -1,146 +0,0 @@
-/*
- * (C) Copyright 2002-2005
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- * Travis B. Sawyer, Sandburst Corporation, tsawyer@sandburst.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/ppc4xx/start.o (.text)
- board/sandburst/metrobox/init.o (.text)
- cpu/ppc4xx/kgdb.o (.text)
- cpu/ppc4xx/traps.o (.text)
- cpu/ppc4xx/interrupts.o (.text)
- cpu/ppc4xx/serial.o (.text)
- cpu/ppc4xx/cpu_init.o (.text)
- cpu/ppc4xx/speed.o (.text)
- cpu/ppc4xx/4xx_enet.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/extable.o (.text)
- lib_generic/zlib.o (.text)
-
-/* common/environment.o(.text) */
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/sandpoint/Makefile b/board/sandpoint/Makefile
deleted file mode 100644
index d6bbf2f297..0000000000
--- a/board/sandpoint/Makefile
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/sandpoint/README b/board/sandpoint/README
deleted file mode 100644
index 9e48168a24..0000000000
--- a/board/sandpoint/README
+++ /dev/null
@@ -1,15 +0,0 @@
-This port of U-Boot will run on a Motorola Sandpoint 3 development
-system equipped with a Unity X4 PPMC card (MPC8240 CPU) only. It is a
-snapshot of work in progress and far from being completed. In order
-to run it on the target system, it has to be downloaded using the
-DINK32 monitor program that came with your Sandpoint system. Please
-note that DINK32 does not accept the S-Record file created by the
-U-Boot build process unmodified, because it contains CR/LF line
-terminators. You have to strip the CR characters first. There is a
-tiny script named 'dinkdl' I created for this purpose.
-
-The Sandpoint port is based on the work of Rob Taylor, who does not
-seem to maintain it any more. I can be reached by mail as
-tkoeller@gmx.net.
-
-Thomas Koeller
diff --git a/board/sandpoint/config.mk b/board/sandpoint/config.mk
deleted file mode 100644
index b3f65ebe58..0000000000
--- a/board/sandpoint/config.mk
+++ /dev/null
@@ -1,31 +0,0 @@
-#
-# (C) Copyright 2000, 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# Sandpoint boards
-#
-
-#TEXT_BASE = 0x00090000
-TEXT_BASE = 0xFFF00000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE)
diff --git a/board/sandpoint/dinkdl b/board/sandpoint/dinkdl
deleted file mode 100644
index f281452eb3..0000000000
--- a/board/sandpoint/dinkdl
+++ /dev/null
@@ -1,2 +0,0 @@
-#! /bin/bash
-tr -d "\r" <$1 >/dev/tts/1
diff --git a/board/sandpoint/early_init.S b/board/sandpoint/early_init.S
deleted file mode 100644
index 07dafb716f..0000000000
--- a/board/sandpoint/early_init.S
+++ /dev/null
@@ -1,152 +0,0 @@
-/*
- * (C) Copyright 2001
- * Thomas Koeller, tkoeller@gmx.net
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef __ASSEMBLY__
-#define __ASSEMBLY__ 1
-#endif
-
-#include <config.h>
-#include <asm/processor.h>
-#include <mpc824x.h>
-#include <ppc_asm.tmpl>
-
-#if defined(USE_DINK32)
- /* We are running from RAM, so do not clear the MCCR1_MEMGO bit! */
- #define MCCR1VAL ((CFG_ROMNAL << MCCR1_ROMNAL_SHIFT) | (CFG_ROMFAL << MCCR1_ROMFAL_SHIFT) | MCCR1_MEMGO)
-#else
- #define MCCR1VAL (CFG_ROMNAL << MCCR1_ROMNAL_SHIFT) | (CFG_ROMFAL << MCCR1_ROMFAL_SHIFT)
-#endif
-
- .text
-
- /* Values to program into memory controller registers */
-tbl: .long MCCR1, MCCR1VAL
- .long MCCR2, CFG_REFINT << MCCR2_REFINT_SHIFT
- .long MCCR3
- .long (((CFG_BSTOPRE & 0x000000f0) >> 4) << MCCR3_BSTOPRE2TO5_SHIFT) | \
- (CFG_REFREC << MCCR3_REFREC_SHIFT) | \
- (CFG_RDLAT << MCCR3_RDLAT_SHIFT)
- .long MCCR4
- .long (CFG_PRETOACT << MCCR4_PRETOACT_SHIFT) | (CFG_ACTTOPRE << MCCR4_ACTTOPRE_SHIFT) | \
- (CFG_REGISTERD_TYPE_BUFFER << 20) | \
- (((CFG_BSTOPRE & 0x00000300) >> 8) << MCCR4_BSTOPRE0TO1_SHIFT ) | \
- ((CFG_SDMODE_CAS_LAT << 4) | (CFG_SDMODE_WRAP << 3) | \
- (CFG_SDMODE_BURSTLEN) << MCCR4_SDMODE_SHIFT) | \
- (CFG_ACTTORW << MCCR4_ACTTORW_SHIFT) | \
- ((CFG_BSTOPRE & 0x0000000f) << MCCR4_BSTOPRE6TO9_SHIFT )
- .long MSAR1
- .long (((CFG_BANK0_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 0) | \
- (((CFG_BANK1_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 8) | \
- (((CFG_BANK2_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 16) | \
- (((CFG_BANK3_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 24)
- .long EMSAR1
- .long (((CFG_BANK0_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 0) | \
- (((CFG_BANK1_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 8) | \
- (((CFG_BANK2_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 16) | \
- (((CFG_BANK3_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 24)
- .long MSAR2
- .long (((CFG_BANK4_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 0) | \
- (((CFG_BANK5_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 8) | \
- (((CFG_BANK6_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 16) | \
- (((CFG_BANK7_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 24)
- .long EMSAR2
- .long (((CFG_BANK4_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 0) | \
- (((CFG_BANK5_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 8) | \
- (((CFG_BANK6_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 16) | \
- (((CFG_BANK7_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 24)
- .long MEAR1
- .long (((CFG_BANK0_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 0) | \
- (((CFG_BANK1_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 8) | \
- (((CFG_BANK2_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 16) | \
- (((CFG_BANK3_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 24)
- .long EMEAR1
- .long (((CFG_BANK0_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 0) | \
- (((CFG_BANK1_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 8) | \
- (((CFG_BANK2_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 16) | \
- (((CFG_BANK3_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 24)
- .long MEAR2
- .long (((CFG_BANK4_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 0) | \
- (((CFG_BANK5_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 8) | \
- (((CFG_BANK6_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 16) | \
- (((CFG_BANK7_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 24)
- .long EMEAR2
- .long (((CFG_BANK4_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 0) | \
- (((CFG_BANK5_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 8) | \
- (((CFG_BANK6_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 16) | \
- (((CFG_BANK7_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 24)
- .long 0
-
-
- /*
- * Early CPU initialization. Set up memory controller, so we can access any RAM at all. This
- * must be done in assembly, since we have no stack at this point.
- */
- .global early_init_f
-early_init_f:
- mflr r10
-
- /* basic memory controller configuration */
- lis r3, CONFIG_ADDR_HIGH
- lis r4, CONFIG_DATA_HIGH
- bl lab
-lab: mflr r5
- lwzu r0, tbl - lab(r5)
-loop: lwz r1, 4(r5)
- stwbrx r0, 0, r3
- eieio
- stwbrx r1, 0, r4
- eieio
- lwzu r0, 8(r5)
- cmpli cr0, 0, r0, 0
- bne cr0, loop
-
- /* set bank enable bits */
- lis r0, MBER@h
- ori r0, 0, MBER@l
- li r1, CFG_BANK_ENABLE
- stwbrx r0, 0, r3
- eieio
- stb r1, 0(r4)
- eieio
-
- /* delay loop */
- lis r0, 0x0003
- mtctr r0
-delay: bdnz delay
-
- /* enable memory controller */
- lis r0, MCCR1@h
- ori r0, 0, MCCR1@l
- stwbrx r0, 0, r3
- eieio
- lwbrx r0, 0, r4
- oris r0, 0, MCCR1_MEMGO@h
- stwbrx r0, 0, r4
- eieio
-
- /* set up stack pointer */
- lis r1, CFG_INIT_SP_OFFSET@h
- ori r1, r1, CFG_INIT_SP_OFFSET@l
-
- mtlr r10
- blr
diff --git a/board/sandpoint/flash.c b/board/sandpoint/flash.c
deleted file mode 100644
index a9f73ff0dc..0000000000
--- a/board/sandpoint/flash.c
+++ /dev/null
@@ -1,764 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc824x.h>
-#include <asm/processor.h>
-#include <asm/pci_io.h>
-#include <w83c553f.h>
-
-#define ROM_CS0_START 0xFF800000
-#define ROM_CS1_START 0xFF000000
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-#if defined(CFG_ENV_IS_IN_FLASH)
-# ifndef CFG_ENV_ADDR
-# define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_ENV_OFFSET)
-# endif
-# ifndef CFG_ENV_SIZE
-# define CFG_ENV_SIZE CFG_ENV_SECT_SIZE
-# endif
-# ifndef CFG_ENV_SECT_SIZE
-# define CFG_ENV_SECT_SIZE CFG_ENV_SIZE
-# endif
-#endif
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static int write_word (flash_info_t *info, ulong dest, ulong data);
-#if 0
-static void flash_get_offsets (ulong base, flash_info_t *info);
-#endif /* 0 */
-
-/*flash command address offsets*/
-
-#if 0
-#define ADDR0 (0x555)
-#define ADDR1 (0x2AA)
-#define ADDR3 (0x001)
-#else
-#define ADDR0 (0xAAA)
-#define ADDR1 (0x555)
-#define ADDR3 (0x001)
-#endif
-
-#define FLASH_WORD_SIZE unsigned char
-
-/*-----------------------------------------------------------------------
- */
-
-#if 0
-static int byte_parity_odd(unsigned char x) __attribute__ ((const));
-#endif /* 0 */
-static unsigned long flash_id(unsigned char mfct, unsigned char chip) __attribute__ ((const));
-
-typedef struct
-{
- FLASH_WORD_SIZE extval;
- unsigned short intval;
-} map_entry;
-
-#if 0
-static int
-byte_parity_odd(unsigned char x)
-{
- x ^= x >> 4;
- x ^= x >> 2;
- x ^= x >> 1;
- return (x & 0x1) != 0;
-}
-#endif /* 0 */
-
-
-static unsigned long
-flash_id(unsigned char mfct, unsigned char chip)
-{
- static const map_entry mfct_map[] =
- {
- {(FLASH_WORD_SIZE) AMD_MANUFACT, (unsigned short) ((unsigned long) FLASH_MAN_AMD >> 16)},
- {(FLASH_WORD_SIZE) FUJ_MANUFACT, (unsigned short) ((unsigned long) FLASH_MAN_FUJ >> 16)},
- {(FLASH_WORD_SIZE) STM_MANUFACT, (unsigned short) ((unsigned long) FLASH_MAN_STM >> 16)},
- {(FLASH_WORD_SIZE) MT_MANUFACT, (unsigned short) ((unsigned long) FLASH_MAN_MT >> 16)},
- {(FLASH_WORD_SIZE) INTEL_MANUFACT,(unsigned short) ((unsigned long) FLASH_MAN_INTEL >> 16)},
- {(FLASH_WORD_SIZE) INTEL_ALT_MANU,(unsigned short) ((unsigned long) FLASH_MAN_INTEL >> 16)}
- };
-
- static const map_entry chip_map[] =
- {
- {AMD_ID_F040B, FLASH_AM040},
- {(FLASH_WORD_SIZE) STM_ID_x800AB, FLASH_STM800AB}
- };
-
- const map_entry *p;
- unsigned long result = FLASH_UNKNOWN;
-
- /* find chip id */
- for(p = &chip_map[0]; p < &chip_map[sizeof chip_map / sizeof chip_map[0]]; p++)
- if(p->extval == chip)
- {
- result = FLASH_VENDMASK | p->intval;
- break;
- }
-
- /* find vendor id */
- for(p = &mfct_map[0]; p < &mfct_map[sizeof mfct_map / sizeof mfct_map[0]]; p++)
- if(p->extval == mfct)
- {
- result &= ~FLASH_VENDMASK;
- result |= (unsigned long) p->intval << 16;
- break;
- }
-
- return result;
-}
-
-
-unsigned long
-flash_init(void)
-{
- unsigned long i;
- unsigned char j;
- static const ulong flash_banks[] = CFG_FLASH_BANKS;
-
- /* Init: no FLASHes known */
- for (i = 0; i < CFG_MAX_FLASH_BANKS; i++)
- {
- flash_info_t * const pflinfo = &flash_info[i];
- pflinfo->flash_id = FLASH_UNKNOWN;
- pflinfo->size = 0;
- pflinfo->sector_count = 0;
- }
-
- /* Enable writes to Sandpoint flash */
- {
- register unsigned char temp;
- CONFIG_READ_BYTE(CFG_WINBOND_ISA_CFG_ADDR + WINBOND_CSCR, temp);
- temp &= ~0x20; /* clear BIOSWP bit */
- CONFIG_WRITE_BYTE(CFG_WINBOND_ISA_CFG_ADDR + WINBOND_CSCR, temp);
- }
-
- for(i = 0; i < sizeof flash_banks / sizeof flash_banks[0]; i++)
- {
- flash_info_t * const pflinfo = &flash_info[i];
- const unsigned long base_address = flash_banks[i];
- volatile FLASH_WORD_SIZE * const flash = (FLASH_WORD_SIZE *) base_address;
-#if 0
- volatile FLASH_WORD_SIZE * addr2;
-#endif
-#if 0
- /* write autoselect sequence */
- flash[0x5555] = 0xaa;
- flash[0x2aaa] = 0x55;
- flash[0x5555] = 0x90;
-#else
- flash[0xAAA << (3 * i)] = 0xaa;
- flash[0x555 << (3 * i)] = 0x55;
- flash[0xAAA << (3 * i)] = 0x90;
-#endif
- __asm__ __volatile__("sync");
-
-#if 0
- pflinfo->flash_id = flash_id(flash[0x0], flash[0x1]);
-#else
- pflinfo->flash_id = flash_id(flash[0x0], flash[0x2 + 14 * i]);
-#endif
-
- switch(pflinfo->flash_id & FLASH_TYPEMASK)
- {
- case FLASH_AM040:
- pflinfo->size = 0x00080000;
- pflinfo->sector_count = 8;
- for(j = 0; j < 8; j++)
- {
- pflinfo->start[j] = base_address + 0x00010000 * j;
- pflinfo->protect[j] = flash[(j << 16) | 0x2];
- }
- break;
- case FLASH_STM800AB:
- pflinfo->size = 0x00100000;
- pflinfo->sector_count = 19;
- pflinfo->start[0] = base_address;
- pflinfo->start[1] = base_address + 0x4000;
- pflinfo->start[2] = base_address + 0x6000;
- pflinfo->start[3] = base_address + 0x8000;
- for(j = 1; j < 16; j++)
- {
- pflinfo->start[j+3] = base_address + 0x00010000 * j;
- }
-#if 0
- /* check for protected sectors */
- for (j = 0; j < pflinfo->sector_count; j++) {
- /* read sector protection at sector address, (A7 .. A0) = 0x02 */
- /* D0 = 1 if protected */
- addr2 = (volatile FLASH_WORD_SIZE *)(pflinfo->start[j]);
- if (pflinfo->flash_id & FLASH_MAN_SST)
- pflinfo->protect[j] = 0;
- else
- pflinfo->protect[j] = addr2[2] & 1;
- }
-#endif
- break;
- }
- /* Protect monitor and environment sectors
- */
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
- flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE + monitor_flash_len - 1,
- &flash_info[0]);
-#endif
-
-#if (CFG_ENV_IS_IN_FLASH == 1) && defined(CFG_ENV_ADDR)
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1,
- &flash_info[0]);
-#endif
-
- /* reset device to read mode */
- flash[0x0000] = 0xf0;
- __asm__ __volatile__("sync");
- }
-
- return flash_info[0].size + flash_info[1].size;
-}
-
-#if 0
-static void
-flash_get_offsets (ulong base, flash_info_t *info)
-{
- int i;
-
- /* set up sector start address table */
- if (info->flash_id & FLASH_MAN_SST)
- {
- for (i = 0; i < info->sector_count; i++)
- info->start[i] = base + (i * 0x00010000);
- }
- else
- if (info->flash_id & FLASH_BTYPE) {
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00004000;
- info->start[2] = base + 0x00006000;
- info->start[3] = base + 0x00008000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00010000) - 0x00030000;
- }
- } else {
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- info->start[i--] = base + info->size - 0x00004000;
- info->start[i--] = base + info->size - 0x00006000;
- info->start[i--] = base + info->size - 0x00008000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00010000;
- }
- }
-
-}
-#endif /* 0 */
-
-/*-----------------------------------------------------------------------
- */
-void
-flash_print_info(flash_info_t *info)
-{
- static const char unk[] = "Unknown";
- const char *mfct = unk, *type = unk;
- unsigned int i;
-
- if(info->flash_id != FLASH_UNKNOWN)
- {
- switch(info->flash_id & FLASH_VENDMASK)
- {
- case FLASH_MAN_AMD: mfct = "AMD"; break;
- case FLASH_MAN_FUJ: mfct = "FUJITSU"; break;
- case FLASH_MAN_STM: mfct = "STM"; break;
- case FLASH_MAN_SST: mfct = "SST"; break;
- case FLASH_MAN_BM: mfct = "Bright Microelectonics"; break;
- case FLASH_MAN_INTEL: mfct = "Intel"; break;
- }
-
- switch(info->flash_id & FLASH_TYPEMASK)
- {
- case FLASH_AM040: type = "AM29F040B (512K * 8, uniform sector size)"; break;
- case FLASH_AM400B: type = "AM29LV400B (4 Mbit, bottom boot sect)"; break;
- case FLASH_AM400T: type = "AM29LV400T (4 Mbit, top boot sector)"; break;
- case FLASH_AM800B: type = "AM29LV800B (8 Mbit, bottom boot sect)"; break;
- case FLASH_AM800T: type = "AM29LV800T (8 Mbit, top boot sector)"; break;
- case FLASH_AM160T: type = "AM29LV160T (16 Mbit, top boot sector)"; break;
- case FLASH_AM320B: type = "AM29LV320B (32 Mbit, bottom boot sect)"; break;
- case FLASH_AM320T: type = "AM29LV320T (32 Mbit, top boot sector)"; break;
- case FLASH_STM800AB: type = "M29W800AB (8 Mbit, bottom boot sect)"; break;
- case FLASH_SST800A: type = "SST39LF/VF800 (8 Mbit, uniform sector size)"; break;
- case FLASH_SST160A: type = "SST39LF/VF160 (16 Mbit, uniform sector size)"; break;
- }
- }
-
- printf(
- "\n Brand: %s Type: %s\n"
- " Size: %lu KB in %d Sectors\n",
- mfct,
- type,
- info->size >> 10,
- info->sector_count
- );
-
- printf (" Sector Start Addresses:");
-
- for (i = 0; i < info->sector_count; i++)
- {
- unsigned long size;
- unsigned int erased;
- unsigned long * flash = (unsigned long *) info->start[i];
-
- /*
- * Check if whole sector is erased
- */
- size =
- (i != (info->sector_count - 1)) ?
- (info->start[i + 1] - info->start[i]) >> 2 :
- (info->start[0] + info->size - info->start[i]) >> 2;
-
- for(
- flash = (unsigned long *) info->start[i], erased = 1;
- (flash != (unsigned long *) info->start[i] + size) && erased;
- flash++
- )
- erased = *flash == ~0x0UL;
-
- printf(
- "%s %08lX %s %s",
- (i % 5) ? "" : "\n ",
- info->start[i],
- erased ? "E" : " ",
- info->protect[i] ? "RO" : " "
- );
- }
-
- puts("\n");
- return;
-}
-
-#if 0
-
-/*
- * The following code cannot be run from FLASH!
- */
-ulong
-flash_get_size (vu_long *addr, flash_info_t *info)
-{
- short i;
- FLASH_WORD_SIZE value;
- ulong base = (ulong)addr;
- volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *)addr;
-
- printf("flash_get_size: \n");
- /* Write auto select command: read Manufacturer ID */
- eieio();
- addr2[ADDR0] = (FLASH_WORD_SIZE)0xAA;
- addr2[ADDR1] = (FLASH_WORD_SIZE)0x55;
- addr2[ADDR0] = (FLASH_WORD_SIZE)0x90;
- value = addr2[0];
-
- switch (value) {
- case (FLASH_WORD_SIZE)AMD_MANUFACT:
- info->flash_id = FLASH_MAN_AMD;
- break;
- case (FLASH_WORD_SIZE)FUJ_MANUFACT:
- info->flash_id = FLASH_MAN_FUJ;
- break;
- case (FLASH_WORD_SIZE)SST_MANUFACT:
- info->flash_id = FLASH_MAN_SST;
- break;
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- return (0); /* no or unknown flash */
- }
- printf("recognised manufacturer");
-
- value = addr2[ADDR3]; /* device ID */
- debug ("\ndev_code=%x\n", value);
-
- switch (value) {
- case (FLASH_WORD_SIZE)AMD_ID_LV400T:
- info->flash_id += FLASH_AM400T;
- info->sector_count = 11;
- info->size = 0x00080000;
- break; /* => 0.5 MB */
-
- case (FLASH_WORD_SIZE)AMD_ID_LV400B:
- info->flash_id += FLASH_AM400B;
- info->sector_count = 11;
- info->size = 0x00080000;
- break; /* => 0.5 MB */
-
- case (FLASH_WORD_SIZE)AMD_ID_LV800T:
- info->flash_id += FLASH_AM800T;
- info->sector_count = 19;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case (FLASH_WORD_SIZE)AMD_ID_LV800B:
- info->flash_id += FLASH_AM800B;
- info->sector_count = 19;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case (FLASH_WORD_SIZE)AMD_ID_LV160T:
- info->flash_id += FLASH_AM160T;
- info->sector_count = 35;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case (FLASH_WORD_SIZE)AMD_ID_LV160B:
- info->flash_id += FLASH_AM160B;
- info->sector_count = 35;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case (FLASH_WORD_SIZE)SST_ID_xF800A:
- info->flash_id += FLASH_SST800A;
- info->sector_count = 16;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case (FLASH_WORD_SIZE)SST_ID_xF160A:
- info->flash_id += FLASH_SST160A;
- info->sector_count = 32;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case (FLASH_WORD_SIZE)AMD_ID_F040B:
- info->flash_id += FLASH_AM040;
- info->sector_count = 8;
- info->size = 0x00080000;
- break; /* => 0.5 MB */
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- return (0); /* => no or unknown flash */
-
- }
-
- printf("flash id %lx; sector count %x, size %lx\n", info->flash_id,info->sector_count,info->size);
- /* set up sector start address table */
- if (info->flash_id & FLASH_MAN_SST)
- {
- for (i = 0; i < info->sector_count; i++)
- info->start[i] = base + (i * 0x00010000);
- }
- else
- if (info->flash_id & FLASH_BTYPE) {
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00004000;
- info->start[2] = base + 0x00006000;
- info->start[3] = base + 0x00008000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00010000) - 0x00030000;
- }
- } else {
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- info->start[i--] = base + info->size - 0x00004000;
- info->start[i--] = base + info->size - 0x00006000;
- info->start[i--] = base + info->size - 0x00008000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00010000;
- }
- }
-
- /* check for protected sectors */
- for (i = 0; i < info->sector_count; i++) {
- /* read sector protection at sector address, (A7 .. A0) = 0x02 */
- /* D0 = 1 if protected */
- addr2 = (volatile FLASH_WORD_SIZE *)(info->start[i]);
- if (info->flash_id & FLASH_MAN_SST)
- info->protect[i] = 0;
- else
- info->protect[i] = addr2[2] & 1;
- }
-
- /*
- * Prevent writes to uninitialized FLASH.
- */
- if (info->flash_id != FLASH_UNKNOWN) {
- addr2 = (FLASH_WORD_SIZE *)info->start[0];
- *addr2 = (FLASH_WORD_SIZE)0x00F000F0; /* reset bank */
- }
-
- return (info->size);
-}
-
-#endif
-
-
-int
-flash_erase(flash_info_t *info, int s_first, int s_last)
-{
- volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[0]);
- int flag, prot, sect, l_sect;
- ulong start, now, last;
- unsigned char sh8b;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- if ((info->flash_id == FLASH_UNKNOWN) ||
- (info->flash_id > (FLASH_MAN_STM | FLASH_AMD_COMP))) {
- printf ("Can't erase unknown flash type - aborted\n");
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- l_sect = -1;
-
- /* Check the ROM CS */
- if ((info->start[0] >= ROM_CS1_START) && (info->start[0] < ROM_CS0_START))
- sh8b = 3;
- else
- sh8b = 0;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE)0x00AA00AA;
- addr[ADDR1 << sh8b] = (FLASH_WORD_SIZE)0x00550055;
- addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE)0x00800080;
- addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE)0x00AA00AA;
- addr[ADDR1 << sh8b] = (FLASH_WORD_SIZE)0x00550055;
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr = (FLASH_WORD_SIZE *)(info->start[0] + (
- (info->start[sect] - info->start[0]) << sh8b));
- if (info->flash_id & FLASH_MAN_SST)
- {
- addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE)0x00AA00AA;
- addr[ADDR1 << sh8b] = (FLASH_WORD_SIZE)0x00550055;
- addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE)0x00800080;
- addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE)0x00AA00AA;
- addr[ADDR1 << sh8b] = (FLASH_WORD_SIZE)0x00550055;
- addr[0] = (FLASH_WORD_SIZE)0x00500050; /* block erase */
- udelay(30000); /* wait 30 ms */
- }
- else
- addr[0] = (FLASH_WORD_SIZE)0x00300030; /* sector erase */
- l_sect = sect;
- }
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- /*
- * We wait for the last triggered sector
- */
- if (l_sect < 0)
- goto DONE;
-
- start = get_timer (0);
- last = start;
- addr = (FLASH_WORD_SIZE *)(info->start[0] + (
- (info->start[l_sect] - info->start[0]) << sh8b));
- while ((addr[0] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080) {
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- return 1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- serial_putc ('.');
- last = now;
- }
- }
-
-DONE:
- /* reset to read mode */
- addr = (FLASH_WORD_SIZE *)info->start[0];
- addr[0] = (FLASH_WORD_SIZE)0x00F000F0; /* reset bank */
-
- printf (" done\n");
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int i, l, rc;
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
- for (; i<4 && cnt>0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = 0;
- for (i=0; i<4; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- return (write_word(info, wp, data));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word (flash_info_t *info, ulong dest, ulong data)
-{
- volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *)info->start[0];
- volatile FLASH_WORD_SIZE *dest2;
- volatile FLASH_WORD_SIZE *data2 = (FLASH_WORD_SIZE *)&data;
- ulong start;
- int flag;
- int i;
- unsigned char sh8b;
-
- /* Check the ROM CS */
- if ((info->start[0] >= ROM_CS1_START) && (info->start[0] < ROM_CS0_START))
- sh8b = 3;
- else
- sh8b = 0;
-
- dest2 = (FLASH_WORD_SIZE *)(((dest - info->start[0]) << sh8b) +
- info->start[0]);
-
- /* Check if Flash is (sufficiently) erased */
- if ((*dest2 & (FLASH_WORD_SIZE)data) != (FLASH_WORD_SIZE)data) {
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- for (i=0; i<4/sizeof(FLASH_WORD_SIZE); i++)
- {
- addr2[ADDR0 << sh8b] = (FLASH_WORD_SIZE)0x00AA00AA;
- addr2[ADDR1 << sh8b] = (FLASH_WORD_SIZE)0x00550055;
- addr2[ADDR0 << sh8b] = (FLASH_WORD_SIZE)0x00A000A0;
-
- dest2[i << sh8b] = data2[i];
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* data polling for D7 */
- start = get_timer (0);
- while ((dest2[i << sh8b] & (FLASH_WORD_SIZE)0x00800080) !=
- (data2[i] & (FLASH_WORD_SIZE)0x00800080)) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- return (1);
- }
- }
- }
-
- return (0);
-}
-
-/*-----------------------------------------------------------------------
- */
diff --git a/board/sandpoint/sandpoint.c b/board/sandpoint/sandpoint.c
deleted file mode 100644
index d3445bd92d..0000000000
--- a/board/sandpoint/sandpoint.c
+++ /dev/null
@@ -1,101 +0,0 @@
-/*
- * (C) Copyright 2000
- * Rob Taylor, Flying Pig Systems. robt@flyingpig.com.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc824x.h>
-#include <pci.h>
-
-int checkboard (void)
-{
- /*TODO: Check processor type */
-
- puts ( "Board: Sandpoint "
-#ifdef CONFIG_MPC8240
- "8240"
-#endif
-#ifdef CONFIG_MPC8245
- "8245"
-#endif
- " Unity ##Test not implemented yet##\n");
- return 0;
-}
-
-#if 0 /* NOT USED */
-int checkflash (void)
-{
- /* TODO: XXX XXX XXX */
- printf ("## Test not implemented yet ##\n");
-
- return (0);
-}
-#endif
-
-long int initdram (int board_type)
-{
- long size;
- long new_bank0_end;
- long mear1;
- long emear1;
-
- size = get_ram_size(CFG_SDRAM_BASE, CFG_MAX_RAM_SIZE);
-
- new_bank0_end = size - 1;
- mear1 = mpc824x_mpc107_getreg(MEAR1);
- emear1 = mpc824x_mpc107_getreg(EMEAR1);
- mear1 = (mear1 & 0xFFFFFF00) |
- ((new_bank0_end & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT);
- emear1 = (emear1 & 0xFFFFFF00) |
- ((new_bank0_end & MICR_ADDR_MASK) >> MICR_EADDR_SHIFT);
- mpc824x_mpc107_setreg(MEAR1, mear1);
- mpc824x_mpc107_setreg(EMEAR1, emear1);
-
- return (size);
-}
-
-/*
- * Initialize PCI Devices, report devices found.
- */
-#ifndef CONFIG_PCI_PNP
-static struct pci_config_table pci_sandpoint_config_table[] = {
- { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x0f, PCI_ANY_ID,
- pci_cfgfunc_config_device, { PCI_ENET0_IOADDR,
- PCI_ENET0_MEMADDR,
- PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }},
- { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x10, PCI_ANY_ID,
- pci_cfgfunc_config_device, { PCI_ENET1_IOADDR,
- PCI_ENET1_MEMADDR,
- PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }},
- { }
-};
-#endif
-
-struct pci_controller hose = {
-#ifndef CONFIG_PCI_PNP
- config_table: pci_sandpoint_config_table,
-#endif
-};
-
-void pci_init_board(void)
-{
- pci_mpc824x_init(&hose);
-}
diff --git a/board/sandpoint/speed.h b/board/sandpoint/speed.h
deleted file mode 100644
index b66393bec5..0000000000
--- a/board/sandpoint/speed.h
+++ /dev/null
@@ -1,54 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*-----------------------------------------------------------------------
- * Timer value for timer 2, ICLK = 10
- *
- * SPEED_FCOUNT2 = GCLK / (16 * (TIMER_TMR_PS + 1))
- * SPEED_TMR3_PS = (GCLK / (16 * SPEED_FCOUNT3)) - 1
- *
- * SPEED_FCOUNT2 timer 2 counting frequency
- * GCLK CPU clock
- * SPEED_TMR2_PS prescaler
- */
-#define SPEED_TMR2_PS (250 - 1) /* divide by 250 */
-
-/*-----------------------------------------------------------------------
- * Timer value for PIT
- *
- * PIT_TIME = SPEED_PITC / PITRTCLK
- * PITRTCLK = 8192
- */
-#define SPEED_PITC (82 << 16) /* start counting from 82 */
-
-/*
- * The new value for PTA is calculated from
- *
- * PTA = (gclk * Trefresh) / (2 ^ (2 * DFBRG) * PTP * NCS)
- *
- * gclk CPU clock (not bus clock !)
- * Trefresh Refresh cycle * 4 (four word bursts used)
- * DFBRG For normal mode (no clock reduction) always 0
- * PTP Prescaler (already adjusted for no. of banks and 4K / 8K refresh)
- * NCS Number of SDRAM banks (chip selects) on this UPM.
- */
diff --git a/board/sandpoint/u-boot.lds b/board/sandpoint/u-boot.lds
deleted file mode 100644
index 2a5cd2ebd9..0000000000
--- a/board/sandpoint/u-boot.lds
+++ /dev/null
@@ -1,133 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc824x/start.o (.text)
- lib_ppc/board.o (.text)
- lib_ppc/ppcstring.o (.text)
-
- . = DEFINED(env_offset) ? env_offset : .;
- common/environment.o (.text)
-
- *(.text)
-
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
-
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/sbc405/Makefile b/board/sbc405/Makefile
deleted file mode 100644
index c4198c4fc9..0000000000
--- a/board/sbc405/Makefile
+++ /dev/null
@@ -1,46 +0,0 @@
-#
-# (C) Copyright 2000, 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o strataflash.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/sbc405/config.mk b/board/sbc405/config.mk
deleted file mode 100644
index bd57217811..0000000000
--- a/board/sbc405/config.mk
+++ /dev/null
@@ -1,28 +0,0 @@
-#
-# (C) Copyright 2000, 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# Wind River sbc405 boards
-#
-
-TEXT_BASE = 0xFFFC0000
diff --git a/board/sbc405/sbc405.c b/board/sbc405/sbc405.c
deleted file mode 100644
index cad58731d3..0000000000
--- a/board/sbc405/sbc405.c
+++ /dev/null
@@ -1,114 +0,0 @@
-/*
- * (C) Copyright 2001
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/processor.h>
-#include <command.h>
-#include <malloc.h>
-#include <spd_sdram.h>
-
-
-int board_early_init_f (void)
-{
- /*
- * IRQ 0-15 405GP internally generated; active high; level sensitive
- * IRQ 16 405GP internally generated; active low; level sensitive
- * IRQ 17-24 RESERVED
- * IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive
- * IRQ 26 (EXT IRQ 1) SER0 ; active low; level sensitive
- * IRQ 27 (EXT IRQ 2) SER1; active low; level sensitive
- * IRQ 28 (EXT IRQ 3) FPGA 0; active low; level sensitive
- * IRQ 29 (EXT IRQ 4) FPGA 1; active low; level sensitive
- * IRQ 30 (EXT IRQ 5) PCI INTA; active low; level sensitive
- * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
- */
- mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
- mtdcr(uicer, 0x00000000); /* disable all ints */
- mtdcr(uiccr, 0x00000000); /* set all to be non-critical*/
- mtdcr(uicpr, 0xFFFFFF81); /* set int polarities */
- mtdcr(uictr, 0x10000000); /* set int trigger levels */
- mtdcr(uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority*/
- mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
-
- /*
- * EBC Configuration Register: set ready timeout to 512 ebc-clks -> ca. 15 us
- */
- mtebc (epcr, 0xa8400000);
-
- return 0;
-}
-
-
-/* ------------------------------------------------------------------------- */
-
-int misc_init_f (void)
-{
- return 0; /* dummy implementation */
-}
-
-
-int misc_init_r (void)
-{
- return (0);
-}
-
-
-/*
- * Check Board Identity:
- */
-
-int checkboard (void)
-{
- char str[64];
- int i = getenv_r ("serial#", str, sizeof(str));
-
- puts ("Board: ");
-
- if (i == -1) {
- puts ("### No HW ID - assuming sbc405");
- } else {
- puts(str);
- }
-
- putc ('\n');
-
- return 0;
-}
-
-/* ------------------------------------------------------------------------- */
-
-long int initdram (int board_type)
-{
- return spd_sdram (0);
-}
-
-/* ------------------------------------------------------------------------- */
-
-int testdram (void)
-{
- /* TODO: XXX XXX XXX */
- printf ("test: 64 MB - ok\n");
-
- return (0);
-}
-
-/* ------------------------------------------------------------------------- */
diff --git a/board/sbc405/strataflash.c b/board/sbc405/strataflash.c
deleted file mode 100644
index d21d885fae..0000000000
--- a/board/sbc405/strataflash.c
+++ /dev/null
@@ -1,793 +0,0 @@
-/*
- * (C) Copyright 2002
- * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/processor.h>
-
-#undef DEBUG_FLASH
-/*
- * This file implements a Common Flash Interface (CFI) driver for ppcboot.
- * The width of the port and the width of the chips are determined at initialization.
- * These widths are used to calculate the address for access CFI data structures.
- * It has been tested on an Intel Strataflash implementation.
- *
- * References
- * JEDEC Standard JESD68 - Common Flash Interface (CFI)
- * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
- * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
- * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
- *
- * TODO
- * Use Primary Extended Query table (PRI) and Alternate Algorithm Query Table (ALT) to determine if protection is available
- * Add support for other command sets Use the PRI and ALT to determine command set
- * Verify erase and program timeouts.
- */
-
-#define FLASH_CMD_CFI 0x98
-#define FLASH_CMD_READ_ID 0x90
-#define FLASH_CMD_RESET 0xff
-#define FLASH_CMD_BLOCK_ERASE 0x20
-#define FLASH_CMD_ERASE_CONFIRM 0xD0
-#define FLASH_CMD_WRITE 0x40
-#define FLASH_CMD_PROTECT 0x60
-#define FLASH_CMD_PROTECT_SET 0x01
-#define FLASH_CMD_PROTECT_CLEAR 0xD0
-#define FLASH_CMD_CLEAR_STATUS 0x50
-#define FLASH_CMD_WRITE_TO_BUFFER 0xE8
-#define FLASH_CMD_WRITE_BUFFER_CONFIRM 0xD0
-
-#define FLASH_STATUS_DONE 0x80
-#define FLASH_STATUS_ESS 0x40
-#define FLASH_STATUS_ECLBS 0x20
-#define FLASH_STATUS_PSLBS 0x10
-#define FLASH_STATUS_VPENS 0x08
-#define FLASH_STATUS_PSS 0x04
-#define FLASH_STATUS_DPS 0x02
-#define FLASH_STATUS_R 0x01
-#define FLASH_STATUS_PROTECT 0x01
-
-#define FLASH_OFFSET_CFI 0x55
-#define FLASH_OFFSET_CFI_RESP 0x10
-#define FLASH_OFFSET_WTOUT 0x1F
-#define FLASH_OFFSET_WBTOUT 0x20
-#define FLASH_OFFSET_ETOUT 0x21
-#define FLASH_OFFSET_CETOUT 0x22
-#define FLASH_OFFSET_WMAX_TOUT 0x23
-#define FLASH_OFFSET_WBMAX_TOUT 0x24
-#define FLASH_OFFSET_EMAX_TOUT 0x25
-#define FLASH_OFFSET_CEMAX_TOUT 0x26
-#define FLASH_OFFSET_SIZE 0x27
-#define FLASH_OFFSET_INTERFACE 0x28
-#define FLASH_OFFSET_BUFFER_SIZE 0x2A
-#define FLASH_OFFSET_NUM_ERASE_REGIONS 0x2C
-#define FLASH_OFFSET_ERASE_REGIONS 0x2D
-#define FLASH_OFFSET_PROTECT 0x02
-#define FLASH_OFFSET_USER_PROTECTION 0x85
-#define FLASH_OFFSET_INTEL_PROTECTION 0x81
-
-
-#define FLASH_MAN_CFI 0x01000000
-
-
-typedef union {
- unsigned char c;
- unsigned short w;
- unsigned long l;
-} cfiword_t;
-
-typedef union {
- unsigned char * cp;
- unsigned short *wp;
- unsigned long *lp;
-} cfiptr_t;
-
-#define NUM_ERASE_REGIONS 4
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-
-
-static void flash_add_byte(flash_info_t *info, cfiword_t * cword, uchar c);
-static void flash_make_cmd(flash_info_t * info, uchar cmd, void * cmdbuf);
-static void flash_write_cmd(flash_info_t * info, int sect, uchar offset, uchar cmd);
-static int flash_isequal(flash_info_t * info, int sect, uchar offset, uchar cmd);
-static int flash_isset(flash_info_t * info, int sect, uchar offset, uchar cmd);
-static int flash_detect_cfi(flash_info_t * info);
-static ulong flash_get_size (ulong base, int banknum);
-static int flash_write_cfiword (flash_info_t *info, ulong dest, cfiword_t cword);
-static int flash_full_status_check(flash_info_t * info, ulong sector, ulong tout, char * prompt);
-#ifdef CFG_FLASH_USE_BUFFER_WRITE
-static int flash_write_cfibuffer(flash_info_t * info, ulong dest, uchar * cp, int len);
-#endif
-/*-----------------------------------------------------------------------
- * create an address based on the offset and the port width
- */
-inline uchar * flash_make_addr(flash_info_t * info, int sect, int offset)
-{
- return ((uchar *)(info->start[sect] + (offset * info->portwidth)));
-}
-/*-----------------------------------------------------------------------
- * read a character at a port width address
- */
-inline uchar flash_read_uchar(flash_info_t * info, uchar offset)
-{
- uchar *cp;
- cp = flash_make_addr(info, 0, offset);
- return (cp[info->portwidth - 1]);
-}
-
-/*-----------------------------------------------------------------------
- * read a short word by swapping for ppc format.
- */
-ushort flash_read_ushort(flash_info_t * info, int sect, uchar offset)
-{
- uchar * addr;
-
- addr = flash_make_addr(info, sect, offset);
- return ((addr[(2*info->portwidth) - 1] << 8) | addr[info->portwidth - 1]);
-
-}
-
-/*-----------------------------------------------------------------------
- * read a long word by picking the least significant byte of each maiximum
- * port size word. Swap for ppc format.
- */
-ulong flash_read_long(flash_info_t * info, int sect, uchar offset)
-{
- uchar * addr;
-
- addr = flash_make_addr(info, sect, offset);
- return ( (addr[(2*info->portwidth) - 1] << 24 ) | (addr[(info->portwidth) -1] << 16) |
- (addr[(4*info->portwidth) - 1] << 8) | addr[(3*info->portwidth) - 1]);
-
-}
-
-/*-----------------------------------------------------------------------
- */
-unsigned long flash_init (void)
-{
- unsigned long size;
- int i;
- unsigned long address;
-
-
- /* The flash is positioned back to back, with the demultiplexing of the chip
- * based on the A24 address line.
- *
- */
-
- address = CFG_FLASH_BASE;
- size = 0;
-
- /* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- size += flash_info[i].size = flash_get_size(address, i);
- address += CFG_FLASH_INCREMENT;
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n",i,
- flash_info[0].size, flash_info[i].size<<20);
- }
- }
-
-#if 0 /* test-only */
- /* Monitor protection ON by default */
-#if (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
- for(i=0; flash_info[0].start[i] < CFG_MONITOR_BASE+CFG_MONITOR_LEN-1; i++)
- (void)flash_real_protect(&flash_info[0], i, 1);
-#endif
-#else
- /* monitor protection ON by default */
- flash_protect (FLAG_PROTECT_SET,
- - CFG_MONITOR_LEN,
- - 1, &flash_info[1]);
-#endif
-
- return (size);
-}
-
-/*-----------------------------------------------------------------------
- */
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- int rcode = 0;
- int prot;
- int sect;
-
- if( info->flash_id != FLASH_MAN_CFI) {
- printf ("Can't erase unknown flash type - aborted\n");
- return 1;
- }
- if ((s_first < 0) || (s_first > s_last)) {
- printf ("- no sectors to erase\n");
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
-
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- flash_write_cmd(info, sect, 0, FLASH_CMD_CLEAR_STATUS);
- flash_write_cmd(info, sect, 0, FLASH_CMD_BLOCK_ERASE);
- flash_write_cmd(info, sect, 0, FLASH_CMD_ERASE_CONFIRM);
-
- if(flash_full_status_check(info, sect, info->erase_blk_tout, "erase")) {
- rcode = 1;
- } else
- printf(".");
- }
- }
- printf (" done\n");
- return rcode;
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t *info)
-{
- int i;
-
- if (info->flash_id != FLASH_MAN_CFI) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- printf("CFI conformant FLASH (%d x %d)",
- (info->portwidth << 3 ), (info->chipwidth << 3 ));
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
- printf(" Erase timeout %ld ms, write timeout %ld ms, buffer write timeout %ld ms, buffer size %d\n",
- info->erase_blk_tout, info->write_tout, info->buffer_write_tout, info->buffer_size);
-
- printf (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
-#ifdef CFG_FLASH_EMPTY_INFO
- int k;
- int size;
- int erased;
- volatile unsigned long *flash;
-
- /*
- * Check if whole sector is erased
- */
- if (i != (info->sector_count-1))
- size = info->start[i+1] - info->start[i];
- else
- size = info->start[0] + info->size - info->start[i];
- erased = 1;
- flash = (volatile unsigned long *)info->start[i];
- size = size >> 2; /* divide by 4 for longword access */
- for (k=0; k<size; k++)
- {
- if (*flash++ != 0xffffffff)
- {
- erased = 0;
- break;
- }
- }
-
- if ((i % 5) == 0)
- printf ("\n ");
- /* print empty and read-only info */
- printf (" %08lX%s%s",
- info->start[i],
- erased ? " E" : " ",
- info->protect[i] ? "RO " : " ");
-#else
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " ");
-#endif
- }
- printf ("\n");
- return;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong wp;
- ulong cp;
- int aln;
- cfiword_t cword;
- int i, rc;
-
- /* get lower aligned address */
- wp = (addr & ~(info->portwidth - 1));
-
- /* handle unaligned start */
- if((aln = addr - wp) != 0) {
- cword.l = 0;
- cp = wp;
- for(i=0;i<aln; ++i, ++cp)
- flash_add_byte(info, &cword, (*(uchar *)cp));
-
- for(; (i< info->portwidth) && (cnt > 0) ; i++) {
- flash_add_byte(info, &cword, *src++);
- cnt--;
- cp++;
- }
- for(; (cnt == 0) && (i < info->portwidth); ++i, ++cp)
- flash_add_byte(info, &cword, (*(uchar *)cp));
- if((rc = flash_write_cfiword(info, wp, cword)) != 0)
- return rc;
- wp = cp;
- }
-
-#ifdef CFG_FLASH_USE_BUFFER_WRITE
- while(cnt >= info->portwidth) {
- i = info->buffer_size > cnt? cnt: info->buffer_size;
- if((rc = flash_write_cfibuffer(info, wp, src,i)) != ERR_OK)
- return rc;
- wp += i;
- src += i;
- cnt -=i;
- }
-#else
- /* handle the aligned part */
- while(cnt >= info->portwidth) {
- cword.l = 0;
- for(i = 0; i < info->portwidth; i++) {
- flash_add_byte(info, &cword, *src++);
- }
- if((rc = flash_write_cfiword(info, wp, cword)) != 0)
- return rc;
- wp += info->portwidth;
- cnt -= info->portwidth;
- }
-#endif /* CFG_FLASH_USE_BUFFER_WRITE */
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- cword.l = 0;
- for (i=0, cp=wp; (i<info->portwidth) && (cnt>0); ++i, ++cp) {
- flash_add_byte(info, &cword, *src++);
- --cnt;
- }
- for (; i<info->portwidth; ++i, ++cp) {
- flash_add_byte(info, & cword, (*(uchar *)cp));
- }
-
- return flash_write_cfiword(info, wp, cword);
-}
-
-/*-----------------------------------------------------------------------
- */
-int flash_real_protect(flash_info_t *info, long sector, int prot)
-{
- int retcode = 0;
-
- flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
- flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT);
- if(prot)
- flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT_SET);
- else
- flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
-
- if((retcode = flash_full_status_check(info, sector, info->erase_blk_tout,
- prot?"protect":"unprotect")) == 0) {
-
- info->protect[sector] = prot;
- /* Intel's unprotect unprotects all locking */
- if(prot == 0) {
- int i;
- for(i = 0 ; i<info->sector_count; i++) {
- if(info->protect[i])
- flash_real_protect(info, i, 1);
- }
- }
- }
-
- return retcode;
-}
-/*-----------------------------------------------------------------------
- * wait for XSR.7 to be set. Time out with an error if it does not.
- * This routine does not set the flash to read-array mode.
- */
-static int flash_status_check(flash_info_t * info, ulong sector, ulong tout, char * prompt)
-{
- ulong start;
-
- /* Wait for command completion */
- start = get_timer (0);
- while(!flash_isset(info, sector, 0, FLASH_STATUS_DONE)) {
- if (get_timer(start) > info->erase_blk_tout) {
- printf("Flash %s timeout at address %lx\n", prompt, info->start[sector]);
- flash_write_cmd(info, sector, 0, FLASH_CMD_RESET);
- return ERR_TIMOUT;
- }
- }
- return ERR_OK;
-}
-/*-----------------------------------------------------------------------
- * Wait for XSR.7 to be set, if it times out print an error, otherwise do a full status check.
- * This routine sets the flash to read-array mode.
- */
-static int flash_full_status_check(flash_info_t * info, ulong sector, ulong tout, char * prompt)
-{
- int retcode;
- retcode = flash_status_check(info, sector, tout, prompt);
- if((retcode == ERR_OK) && !flash_isequal(info,sector, 0, FLASH_STATUS_DONE)) {
- retcode = ERR_INVAL;
- printf("Flash %s error at address %lx\n", prompt,info->start[sector]);
- if(flash_isset(info, sector, 0, FLASH_STATUS_ECLBS | FLASH_STATUS_PSLBS)){
- printf("Command Sequence Error.\n");
- } else if(flash_isset(info, sector, 0, FLASH_STATUS_ECLBS)){
- printf("Block Erase Error.\n");
- retcode = ERR_NOT_ERASED;
- } else if (flash_isset(info, sector, 0, FLASH_STATUS_PSLBS)) {
- printf("Locking Error\n");
- }
- if(flash_isset(info, sector, 0, FLASH_STATUS_DPS)){
- printf("Block locked.\n");
- retcode = ERR_PROTECTED;
- }
- if(flash_isset(info, sector, 0, FLASH_STATUS_VPENS))
- printf("Vpp Low Error.\n");
- }
- flash_write_cmd(info, sector, 0, FLASH_CMD_RESET);
- return retcode;
-}
-/*-----------------------------------------------------------------------
- */
-static void flash_add_byte(flash_info_t *info, cfiword_t * cword, uchar c)
-{
- switch(info->portwidth) {
- case FLASH_CFI_8BIT:
- cword->c = c;
- break;
- case FLASH_CFI_16BIT:
- cword->w = (cword->w << 8) | c;
- break;
- case FLASH_CFI_32BIT:
- cword->l = (cword->l << 8) | c;
- }
-}
-
-
-/*-----------------------------------------------------------------------
- * make a proper sized command based on the port and chip widths
- */
-static void flash_make_cmd(flash_info_t * info, uchar cmd, void * cmdbuf)
-{
- int i;
- uchar *cp = (uchar *)cmdbuf;
- for(i=0; i< info->portwidth; i++)
- *cp++ = ((i+1) % info->chipwidth) ? '\0':cmd;
-}
-
-/*
- * Write a proper sized command to the correct address
- */
-static void flash_write_cmd(flash_info_t * info, int sect, uchar offset, uchar cmd)
-{
-
- volatile cfiptr_t addr;
- cfiword_t cword;
- addr.cp = flash_make_addr(info, sect, offset);
- flash_make_cmd(info, cmd, &cword);
- switch(info->portwidth) {
- case FLASH_CFI_8BIT:
- *addr.cp = cword.c;
- break;
- case FLASH_CFI_16BIT:
- *addr.wp = cword.w;
- break;
- case FLASH_CFI_32BIT:
- *addr.lp = cword.l;
- break;
- }
-}
-
-/*-----------------------------------------------------------------------
- */
-static int flash_isequal(flash_info_t * info, int sect, uchar offset, uchar cmd)
-{
- cfiptr_t cptr;
- cfiword_t cword;
- int retval;
- cptr.cp = flash_make_addr(info, sect, offset);
- flash_make_cmd(info, cmd, &cword);
- switch(info->portwidth) {
- case FLASH_CFI_8BIT:
- retval = (cptr.cp[0] == cword.c);
- break;
- case FLASH_CFI_16BIT:
- retval = (cptr.wp[0] == cword.w);
- break;
- case FLASH_CFI_32BIT:
- retval = (cptr.lp[0] == cword.l);
- break;
- default:
- retval = 0;
- break;
- }
- return retval;
-}
-/*-----------------------------------------------------------------------
- */
-static int flash_isset(flash_info_t * info, int sect, uchar offset, uchar cmd)
-{
- cfiptr_t cptr;
- cfiword_t cword;
- int retval;
- cptr.cp = flash_make_addr(info, sect, offset);
- flash_make_cmd(info, cmd, &cword);
- switch(info->portwidth) {
- case FLASH_CFI_8BIT:
- retval = ((cptr.cp[0] & cword.c) == cword.c);
- break;
- case FLASH_CFI_16BIT:
- retval = ((cptr.wp[0] & cword.w) == cword.w);
- break;
- case FLASH_CFI_32BIT:
- retval = ((cptr.lp[0] & cword.l) == cword.l);
- break;
- default:
- retval = 0;
- break;
- }
- return retval;
-}
-
-/*-----------------------------------------------------------------------
- * detect if flash is compatible with the Common Flash Interface (CFI)
- * http://www.jedec.org/download/search/jesd68.pdf
- *
-*/
-static int flash_detect_cfi(flash_info_t * info)
-{
-
- for(info->portwidth=FLASH_CFI_8BIT; info->portwidth <= FLASH_CFI_32BIT;
- info->portwidth <<= 1) {
- for(info->chipwidth =FLASH_CFI_BY8;
- info->chipwidth <= info->portwidth;
- info->chipwidth <<= 1) {
- flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
- flash_write_cmd(info, 0, FLASH_OFFSET_CFI, FLASH_CMD_CFI);
- if(flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP,'Q') &&
- flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R') &&
- flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y'))
- return 1;
- }
- }
- return 0;
-}
-/*
- * The following code cannot be run from FLASH!
- *
- */
-static ulong flash_get_size (ulong base, int banknum)
-{
- flash_info_t * info = &flash_info[banknum];
- int i, j;
- int sect_cnt;
- unsigned long sector;
- unsigned long tmp;
- int size_ratio;
- uchar num_erase_regions;
- int erase_region_size;
- int erase_region_count;
-
- info->start[0] = base;
-
- if(flash_detect_cfi(info)){
-#ifdef DEBUG_FLASH
- printf("portwidth=%d chipwidth=%d\n", info->portwidth, info->chipwidth); /* test-only */
-#endif
- size_ratio = info->portwidth / info->chipwidth;
- num_erase_regions = flash_read_uchar(info, FLASH_OFFSET_NUM_ERASE_REGIONS);
-#ifdef DEBUG_FLASH
- printf("found %d erase regions\n", num_erase_regions);
-#endif
- sect_cnt = 0;
- sector = base;
- for(i = 0 ; i < num_erase_regions; i++) {
- if(i > NUM_ERASE_REGIONS) {
- printf("%d erase regions found, only %d used\n",
- num_erase_regions, NUM_ERASE_REGIONS);
- break;
- }
- tmp = flash_read_long(info, 0, FLASH_OFFSET_ERASE_REGIONS);
- erase_region_size = (tmp & 0xffff)? ((tmp & 0xffff) * 256): 128;
- tmp >>= 16;
- erase_region_count = (tmp & 0xffff) +1;
- for(j = 0; j< erase_region_count; j++) {
- info->start[sect_cnt] = sector;
- sector += (erase_region_size * size_ratio);
- info->protect[sect_cnt] = flash_isset(info, sect_cnt, FLASH_OFFSET_PROTECT, FLASH_STATUS_PROTECT);
- sect_cnt++;
- }
- }
-
- info->sector_count = sect_cnt;
- /* multiply the size by the number of chips */
- info->size = (1 << flash_read_uchar(info, FLASH_OFFSET_SIZE)) * size_ratio;
- info->buffer_size = (1 << flash_read_ushort(info, 0, FLASH_OFFSET_BUFFER_SIZE));
- tmp = 1 << flash_read_uchar(info, FLASH_OFFSET_ETOUT);
- info->erase_blk_tout = (tmp * (1 << flash_read_uchar(info, FLASH_OFFSET_EMAX_TOUT)));
- tmp = 1 << flash_read_uchar(info, FLASH_OFFSET_WBTOUT);
- info->buffer_write_tout = (tmp * (1 << flash_read_uchar(info, FLASH_OFFSET_WBMAX_TOUT)));
- tmp = 1 << flash_read_uchar(info, FLASH_OFFSET_WTOUT);
- info->write_tout = (tmp * (1 << flash_read_uchar(info, FLASH_OFFSET_WMAX_TOUT)))/ 1000;
- info->flash_id = FLASH_MAN_CFI;
- }
-
- flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
- return(info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-static int flash_write_cfiword (flash_info_t *info, ulong dest, cfiword_t cword)
-{
-
- cfiptr_t ctladdr;
- cfiptr_t cptr;
- int flag;
-
- ctladdr.cp = flash_make_addr(info, 0, 0);
- cptr.cp = (uchar *)dest;
-
-
- /* Check if Flash is (sufficiently) erased */
- switch(info->portwidth) {
- case FLASH_CFI_8BIT:
- flag = ((cptr.cp[0] & cword.c) == cword.c);
- break;
- case FLASH_CFI_16BIT:
- flag = ((cptr.wp[0] & cword.w) == cword.w);
- break;
- case FLASH_CFI_32BIT:
- flag = ((cptr.lp[0] & cword.l) == cword.l);
- break;
- default:
- return 2;
- }
- if(!flag)
- return 2;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- flash_write_cmd(info, 0, 0, FLASH_CMD_CLEAR_STATUS);
- flash_write_cmd(info, 0, 0, FLASH_CMD_WRITE);
-
- switch(info->portwidth) {
- case FLASH_CFI_8BIT:
- cptr.cp[0] = cword.c;
- break;
- case FLASH_CFI_16BIT:
- cptr.wp[0] = cword.w;
- break;
- case FLASH_CFI_32BIT:
- cptr.lp[0] = cword.l;
- break;
- }
-
- /* re-enable interrupts if necessary */
- if(flag)
- enable_interrupts();
-
- return flash_full_status_check(info, 0, info->write_tout, "write");
-}
-
-#ifdef CFG_FLASH_USE_BUFFER_WRITE
-
-/* loop through the sectors from the highest address
- * when the passed address is greater or equal to the sector address
- * we have a match
- */
-static int find_sector(flash_info_t *info, ulong addr)
-{
- int sector;
- for(sector = info->sector_count - 1; sector >= 0; sector--) {
- if(addr >= info->start[sector])
- break;
- }
- return sector;
-}
-
-static int flash_write_cfibuffer(flash_info_t * info, ulong dest, uchar * cp, int len)
-{
-
- int sector;
- int cnt;
- int retcode;
- volatile cfiptr_t src;
- volatile cfiptr_t dst;
-
- src.cp = cp;
- dst.cp = (uchar *)dest;
- sector = find_sector(info, dest);
- flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
- flash_write_cmd(info, sector, 0, FLASH_CMD_WRITE_TO_BUFFER);
- if((retcode = flash_status_check(info, sector, info->buffer_write_tout,
- "write to buffer")) == ERR_OK) {
- switch(info->portwidth) {
- case FLASH_CFI_8BIT:
- cnt = len;
- break;
- case FLASH_CFI_16BIT:
- cnt = len >> 1;
- break;
- case FLASH_CFI_32BIT:
- cnt = len >> 2;
- break;
- default:
- return ERR_INVAL;
- break;
- }
- flash_write_cmd(info, sector, 0, (uchar)cnt-1);
- while(cnt-- > 0) {
- switch(info->portwidth) {
- case FLASH_CFI_8BIT:
- *dst.cp++ = *src.cp++;
- break;
- case FLASH_CFI_16BIT:
- *dst.wp++ = *src.wp++;
- break;
- case FLASH_CFI_32BIT:
- *dst.lp++ = *src.lp++;
- break;
- default:
- return ERR_INVAL;
- break;
- }
- }
- flash_write_cmd(info, sector, 0, FLASH_CMD_WRITE_BUFFER_CONFIRM);
- retcode = flash_full_status_check(info, sector, info->buffer_write_tout,
- "buffer write");
- }
- flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
- return retcode;
-}
-#endif /* CFG_USE_FLASH_BUFFER_WRITE */
diff --git a/board/sbc405/u-boot.lds b/board/sbc405/u-boot.lds
deleted file mode 100644
index 39fba61684..0000000000
--- a/board/sbc405/u-boot.lds
+++ /dev/null
@@ -1,150 +0,0 @@
-/*
- * (C) Copyright 2000, 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- .resetvec 0xFFFFFFFC :
- {
- *(.resetvec)
- } = 0xffff
-
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/ppc4xx/start.o (.text)
- cpu/ppc4xx/traps.o (.text)
- cpu/ppc4xx/interrupts.o (.text)
- cpu/ppc4xx/serial.o (.text)
- cpu/ppc4xx/cpu_init.o (.text)
- cpu/ppc4xx/speed.o (.text)
- cpu/ppc4xx/4xx_enet.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/extable.o (.text)
- lib_generic/zlib.o (.text)
-
-/* . = env_offset;*/
-/* common/environment.o(.text)*/
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/sbc8240/Makefile b/board/sbc8240/Makefile
deleted file mode 100644
index 7a2014d466..0000000000
--- a/board/sbc8240/Makefile
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/sbc8240/README b/board/sbc8240/README
deleted file mode 100644
index 71595b4bff..0000000000
--- a/board/sbc8240/README
+++ /dev/null
@@ -1,140 +0,0 @@
-The supported features of the SBC8240/8245 board are:
- 8240 or 8245 processor
- 66MHz & 100MHz bus speed
- Decrementer timer
- 1 UART channel (Console channel)
- 8240 Interrupt Controller
- 8240 PCI bridge
- 8240 Memory Controller
- SDRAM (16, 64 MB Memory DIMM)
- FLASH 512K On board
- FLASH 4MB On board
-
-
-Memory Map from CPU point of view:
-
- Start Size Access to
- -----------------------------------------------------
- 0x00000000 64MB SDRAM DIMM
- 0xFF000000 4MB On Board FLASH
- 0xFFF00000 512K On Board FLASH or SRAM (Configured by jumper)
- 0xFFE00000 8K EEPROM
- 0xFFE80000 8Bit LED
- 0xFFF80000 8Bit UART
-
-
-Setting the board Jumpers & Switches:
-
- In order to get the board running with the default configuration the
- jumpers need to be set as follows:
-
- General Jumpers:
- ____________________________________________
- | Jumpers | Jumpers | Jumpers |
- |-------------|--------------|---------------|
- |JP1 1-2 | JP14 1-2 | JP27 1-2 |
- |JP5 Open | JP15 1-2 | JP28 2-3 |
- |JP8 1-2 | JP16 1-2 | JP33 Open |
- |JP9 1-2 | JP17 1-2 | JP37 Close |
- |JP10 1-2 | JP18 1-2 | |
- |JP11 2-3 | JP19 1-2 | |
- |JP12 1-2 | JP20 1-2 | |
- |JP13 1-2 | JP25 Open | |
- |_____________|______________|_______________|
-
- Bus speed Jumpers:
- _________________________
- | 100MHz Bus | 66 MHz Bus |
- |------------|------------|
- | JP2 1-2 | JP2 1-2 |
- | JP3 1-2 | JP3 2-3 |
- | JP4 1-2 | JP4 2-3 |
- | JP6 1-2 | JP6 2-3 |
- | JP7 1-2 | JP7 1-2 |
- |____________|____________|
-
-
-U-Boot 1.1.2 (Jun 24 2004 - 17:01:04)
-
-CPU: MPC8240 Revision 1.1 at 247.500 MHz: 16 kB I-Cache 16 kB D-Cache
-Board: sbc8240 Revision 255 Local Bus at 99 MHz
-DRAM: 64 MB
-FLASH: 512 kB
- 00 11 8086 1229 0200 00
-In: serial
-Out: serial
-Err: serial
-Net: i82559#0
-
-Welcome to U-Boot for the sbc8240
-
-Type ? or help to get on-line help
-
-Hit any key to stop autoboot: 0
-=> printenv
-bootcmd=version;echo;tftpboot $loadaddr $loadfile;bootvx
-bootdelay=5
-baudrate=9600
-ethaddr=DE:AD:BE:EF:01:01
-ipaddr=192.168.193.102
-preboot=echo;echo Welcome to U-Boot for the sbc8240;echo;echo Type "? or help" to get on-line help;echo
-netmask=255.255.255.248
-clocks_in_mhz=1
-bootargs=$fei(0,0)host:/T221ppc/target/config/sbc8240/vxWorks.st e=192.168.193.102 h=192.168.193.99 u=target pw=hello f=0x08 tn=sbc8240 o=fei
-ipaddr=192.168.193.102
-loadfile=vxWorks.st
-loadaddr=0x01000000
-net_load=tftpboot $loadaddr $loadfile
-serverip=192.168.193.99
-ethact=i82559#0
-stdin=serial
-stdout=serial
-stderr=serial
-
-Environment size: 631/16380 bytes
-=> boot
-
-U-Boot 1.1.2 (Jun 24 2004 - 17:01:04)
-
-Using i82559#0 device
-TFTP from server 192.168.193.99; our IP address is 192.168.193.102
-Filename 'vxWorks.st'.
-Load address: 0x1000000
-Loading: #################################################################
- #################################################################
- ##############################################################
-done
-Bytes transferred = 979927 (ef3d7 hex)
-## Ethernet MAC address not copied to NV RAM
-Loading .text @ 0x00100000 (758848 bytes)
-Loading .data @ 0x001b9440 (79904 bytes)
-Clearing .bss @ 0x001ccc60 (20288 bytes)
-## Using bootline (@ 0x4200): $fei(0,0)host:/T221ppc/target/config/sbc8240/vxWorks.st e=192.168.193.102 h=192.168.193.99 u=target pw=hello f=0x08 tn=sbc8240 o=fei
-## Starting vxWorks at 0x00100000 ...
-
-Adding 2845 symbols for standalone.
-
-
- ]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]
- ]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]
- ]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]
- ]]]]]]]]]]] ]]]] ]]]]]]]]]] ]] ]]]] (R)
- ] ]]]]]]]]] ]]]]]] ]]]]]]]] ]] ]]]]
- ]] ]]]]]]] ]]]]]]]] ]]]]]] ] ]] ]]]]
- ]]] ]]]]] ] ]]] ] ]]]] ]]] ]]]]]]]]] ]]]] ]] ]]]] ]] ]]]]]
- ]]]] ]]] ]] ] ]]] ]] ]]]]] ]]]]]] ]] ]]]]]]] ]]]] ]] ]]]]
- ]]]]] ] ]]]] ]]]]] ]]]]]]]] ]]]] ]] ]]]] ]]]]]]] ]]]]
- ]]]]]] ]]]]] ]]]]]] ] ]]]]] ]]]] ]] ]]]] ]]]]]]]] ]]]]
- ]]]]]]] ]]]]] ] ]]]]]] ] ]]] ]]]] ]] ]]]] ]]]] ]]]] ]]]]
- ]]]]]]]] ]]]]] ]]] ]]]]]]] ] ]]]]]]] ]]]] ]]]] ]]]] ]]]]]
- ]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]
- ]]]]]]]]]]]]]]]]]]]]]]]]]]]]] Development System
- ]]]]]]]]]]]]]]]]]]]]]]]]]]]]
- ]]]]]]]]]]]]]]]]]]]]]]]]]]] VxWorks version 5.5.1
- ]]]]]]]]]]]]]]]]]]]]]]]]]] KERNEL: WIND version 2.6
- ]]]]]]]]]]]]]]]]]]]]]]]]] Copyright Wind River Systems, Inc., 1984-2003
-
- CPU: MPC8240 -- Wind River BSP. SBC8240 Board. Processor #0.
- Memory Size: 0x2000000. BSP version 1.2/28.
-
-->
diff --git a/board/sbc8240/config.mk b/board/sbc8240/config.mk
deleted file mode 100644
index 1e97960520..0000000000
--- a/board/sbc8240/config.mk
+++ /dev/null
@@ -1,30 +0,0 @@
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# sbc8240 board
-#
-
-TEXT_BASE = 0xFFF00000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE)
diff --git a/board/sbc8240/flash.c b/board/sbc8240/flash.c
deleted file mode 100644
index dec615683e..0000000000
--- a/board/sbc8240/flash.c
+++ /dev/null
@@ -1,638 +0,0 @@
-/*
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * Modified 4/5/2001
- * Wait for completion of each sector erase command issued
- * 4/5/2001
- * Chris Hallinan - DS4.COM, Inc. - clh@net1plus.com
- */
-
-#include <common.h>
-#include <mpc824x.h>
-#include <asm/processor.h>
-
-#if CFG_MAX_FLASH_BANKS != 1
-#error "CFG_MAX_FLASH_BANKS must be 1"
-#endif
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (vu_long * addr, flash_info_t * info);
-static int write_word (flash_info_t * info, ulong dest, ulong data);
-static void flash_get_offsets (ulong base, flash_info_t * info);
-
-#define ADDR0 0x5555
-#define ADDR1 0x2aaa
-#define FLASH_WORD_SIZE unsigned char
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- unsigned long size_b0;
-
- /* Init: no FLASHes known */
- flash_info[0].flash_id = FLASH_UNKNOWN;
-
- /* Static FLASH Bank configuration here - FIXME XXX */
-
- size_b0 = flash_get_size ((vu_long *) FLASH_BASE0_PRELIM, &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size_b0, size_b0 << 20);
- }
-
- /* Only one bank */
- /* Setup offsets */
- flash_get_offsets (FLASH_BASE0_PRELIM, &flash_info[0]);
-
- /* Monitor protection ON by default */
- (void) flash_protect (FLAG_PROTECT_SET,
- FLASH_BASE0_PRELIM,
- FLASH_BASE0_PRELIM + monitor_flash_len - 1,
- &flash_info[0]);
- flash_info[0].size = size_b0;
-
- return size_b0;
-}
-
-
-/*-----------------------------------------------------------------------
- */
-static void flash_get_offsets (ulong base, flash_info_t * info)
-{
- int i;
-
- /* set up sector start address table */
- if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) ||
- (info->flash_id == FLASH_AM040)) {
- for (i = 0; i < info->sector_count; i++)
- info->start[i] = base + (i * 0x00010000);
- } else {
- if (info->flash_id & FLASH_BTYPE) {
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00004000;
- info->start[2] = base + 0x00006000;
- info->start[3] = base + 0x00008000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] =
- base + (i * 0x00010000) - 0x00030000;
- }
- } else {
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- info->start[i--] = base + info->size - 0x00004000;
- info->start[i--] = base + info->size - 0x00006000;
- info->start[i--] = base + info->size - 0x00008000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00010000;
- }
- }
- }
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t * info)
-{
- int i;
- int k;
- int size;
- int erased;
- volatile unsigned long *flash;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD:
- printf ("AMD ");
- break;
- case FLASH_MAN_FUJ:
- printf ("FUJITSU ");
- break;
- case FLASH_MAN_SST:
- printf ("SST ");
- break;
- default:
- printf ("Unknown Vendor ");
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM040:
- printf ("AM29F040 (512 Kbit, uniform sector size)\n");
- break;
- case FLASH_AM400B:
- printf ("AM29LV400B (4 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM400T:
- printf ("AM29LV400T (4 Mbit, top boot sector)\n");
- break;
- case FLASH_AM800B:
- printf ("AM29LV800B (8 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM800T:
- printf ("AM29LV800T (8 Mbit, top boot sector)\n");
- break;
- case FLASH_AM160B:
- printf ("AM29LV160B (16 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM160T:
- printf ("AM29LV160T (16 Mbit, top boot sector)\n");
- break;
- case FLASH_AM320B:
- printf ("AM29LV320B (32 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM320T:
- printf ("AM29LV320T (32 Mbit, top boot sector)\n");
- break;
- case FLASH_SST800A:
- printf ("SST39LF/VF800 (8 Mbit, uniform sector size)\n");
- break;
- case FLASH_SST160A:
- printf ("SST39LF/VF160 (16 Mbit, uniform sector size)\n");
- break;
- default:
- printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld KB in %d Sectors\n",
- info->size >> 10, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; ++i) {
- /*
- * Check if whole sector is erased
- */
- if (i != (info->sector_count - 1))
- size = info->start[i + 1] - info->start[i];
- else
- size = info->start[0] + info->size - info->start[i];
- erased = 1;
- flash = (volatile unsigned long *) info->start[i];
- size = size >> 2; /* divide by 4 for longword access */
- for (k = 0; k < size; k++) {
- if (*flash++ != 0xffffffff) {
- erased = 0;
- break;
- }
- }
-
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s%s",
- info->start[i],
- erased ? " E" : " ", info->protect[i] ? "RO " : " "
- );
- }
- printf ("\n");
- return;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-static ulong flash_get_size (vu_long * addr, flash_info_t * info)
-{
- short i;
- FLASH_WORD_SIZE value;
- ulong base = (ulong) addr;
- volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *) addr;
-
- /* Write auto select command: read Manufacturer ID */
- addr2[ADDR0] = (FLASH_WORD_SIZE) 0x00AA00AA;
- addr2[ADDR1] = (FLASH_WORD_SIZE) 0x00550055;
- addr2[ADDR0] = (FLASH_WORD_SIZE) 0x00900090;
-
- value = addr2[0];
-
- switch (value) {
- case (FLASH_WORD_SIZE) AMD_MANUFACT:
- info->flash_id = FLASH_MAN_AMD;
- break;
- case (FLASH_WORD_SIZE) FUJ_MANUFACT:
- info->flash_id = FLASH_MAN_FUJ;
- break;
- case (FLASH_WORD_SIZE) SST_MANUFACT:
- info->flash_id = FLASH_MAN_SST;
- break;
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- return (0); /* no or unknown flash */
- }
-
- value = addr2[1]; /* device ID */
-
- switch (value) {
- case (FLASH_WORD_SIZE) AMD_ID_F040B:
- info->flash_id += FLASH_AM040;
- info->sector_count = 8;
- info->size = 0x0080000; /* => 512 ko */
- break;
- case (FLASH_WORD_SIZE) AMD_ID_LV040B:
- info->flash_id += FLASH_AM040;
- info->sector_count = 8;
- info->size = 0x0080000; /* => 512 ko */
- break;
- case (FLASH_WORD_SIZE) AMD_ID_LV400T:
- info->flash_id += FLASH_AM400T;
- info->sector_count = 11;
- info->size = 0x00080000;
- break; /* => 0.5 MB */
-
- case (FLASH_WORD_SIZE) AMD_ID_LV400B:
- info->flash_id += FLASH_AM400B;
- info->sector_count = 11;
- info->size = 0x00080000;
- break; /* => 0.5 MB */
-
- case (FLASH_WORD_SIZE) AMD_ID_LV800T:
- info->flash_id += FLASH_AM800T;
- info->sector_count = 19;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case (FLASH_WORD_SIZE) AMD_ID_LV800B:
- info->flash_id += FLASH_AM800B;
- info->sector_count = 19;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case (FLASH_WORD_SIZE) AMD_ID_LV160T:
- info->flash_id += FLASH_AM160T;
- info->sector_count = 35;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case (FLASH_WORD_SIZE) AMD_ID_LV160B:
- info->flash_id += FLASH_AM160B;
- info->sector_count = 35;
- info->size = 0x00200000;
- break; /* => 2 MB */
-#if 0 /* enable when device IDs are available */
- case (FLASH_WORD_SIZE) AMD_ID_LV320T:
- info->flash_id += FLASH_AM320T;
- info->sector_count = 67;
- info->size = 0x00400000;
- break; /* => 4 MB */
-
- case (FLASH_WORD_SIZE) AMD_ID_LV320B:
- info->flash_id += FLASH_AM320B;
- info->sector_count = 67;
- info->size = 0x00400000;
- break; /* => 4 MB */
-#endif
- case (FLASH_WORD_SIZE) SST_ID_xF800A:
- info->flash_id += FLASH_SST800A;
- info->sector_count = 16;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case (FLASH_WORD_SIZE) SST_ID_xF160A:
- info->flash_id += FLASH_SST160A;
- info->sector_count = 32;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- return (0); /* => no or unknown flash */
-
- }
-
- /* set up sector start address table */
- if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) ||
- (info->flash_id == FLASH_AM040)) {
- for (i = 0; i < info->sector_count; i++)
- info->start[i] = base + (i * 0x00010000);
- } else {
- if (info->flash_id & FLASH_BTYPE) {
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00004000;
- info->start[2] = base + 0x00006000;
- info->start[3] = base + 0x00008000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] =
- base + (i * 0x00010000) - 0x00030000;
- }
- } else {
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- info->start[i--] = base + info->size - 0x00004000;
- info->start[i--] = base + info->size - 0x00006000;
- info->start[i--] = base + info->size - 0x00008000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00010000;
- }
- }
- }
-
- /* check for protected sectors */
- for (i = 0; i < info->sector_count; i++) {
- /* read sector protection at sector address, (A7 .. A0) = 0x02 */
- /* D0 = 1 if protected */
- addr2 = (volatile FLASH_WORD_SIZE *) (info->start[i]);
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST)
- info->protect[i] = 0;
- else
- info->protect[i] = addr2[2] & 1;
- }
-
- /*
- * Prevent writes to uninitialized FLASH.
- */
- if (info->flash_id != FLASH_UNKNOWN) {
- addr2 = (FLASH_WORD_SIZE *) info->start[0];
- *addr2 = (FLASH_WORD_SIZE) 0x00F000F0; /* reset bank */
- }
-
- return (info->size);
-}
-
-int wait_for_DQ7 (flash_info_t * info, int sect)
-{
- ulong start, now, last;
- volatile FLASH_WORD_SIZE *addr =
- (FLASH_WORD_SIZE *) (info->start[sect]);
-
- start = get_timer (0);
- last = start;
- while ((addr[0] & (FLASH_WORD_SIZE) 0x00800080) !=
- (FLASH_WORD_SIZE) 0x00800080) {
- if ((now = get_timer (start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- return -1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- }
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t * info, int s_first, int s_last)
-{
- volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *) (info->start[0]);
- volatile FLASH_WORD_SIZE *addr2;
- int flag, prot, sect, l_sect;
- int i;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("Can't erase unknown flash type - aborted\n");
- return 1;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n", prot);
- } else {
- printf ("\n");
- }
-
- l_sect = -1;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr2 = (FLASH_WORD_SIZE *) (info->start[sect]);
- printf ("Erasing sector %p\n", addr2); /* CLH */
-
- if ((info->flash_id & FLASH_VENDMASK) ==
- FLASH_MAN_SST) {
- addr[ADDR0] = (FLASH_WORD_SIZE) 0x00AA00AA;
- addr[ADDR1] = (FLASH_WORD_SIZE) 0x00550055;
- addr[ADDR0] = (FLASH_WORD_SIZE) 0x00800080;
- addr[ADDR0] = (FLASH_WORD_SIZE) 0x00AA00AA;
- addr[ADDR1] = (FLASH_WORD_SIZE) 0x00550055;
- addr2[0] = (FLASH_WORD_SIZE) 0x00500050; /* block erase */
- for (i = 0; i < 50; i++)
- udelay (1000); /* wait 1 ms */
- } else {
- addr[ADDR0] = (FLASH_WORD_SIZE) 0x00AA00AA;
- addr[ADDR1] = (FLASH_WORD_SIZE) 0x00550055;
- addr[ADDR0] = (FLASH_WORD_SIZE) 0x00800080;
- addr[ADDR0] = (FLASH_WORD_SIZE) 0x00AA00AA;
- addr[ADDR1] = (FLASH_WORD_SIZE) 0x00550055;
- addr2[0] = (FLASH_WORD_SIZE) 0x00300030; /* sector erase */
- }
- l_sect = sect;
- /*
- * Wait for each sector to complete, it's more
- * reliable. According to AMD Spec, you must
- * issue all erase commands within a specified
- * timeout. This has been seen to fail, especially
- * if printf()s are included (for debug)!!
- */
- wait_for_DQ7 (info, sect);
- }
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts ();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
-#if 0
- /*
- * We wait for the last triggered sector
- */
- if (l_sect < 0)
- goto DONE;
- wait_for_DQ7 (info, l_sect);
-
- DONE:
-#endif
- /* reset to read mode */
- addr = (FLASH_WORD_SIZE *) info->start[0];
- addr[0] = (FLASH_WORD_SIZE) 0x00F000F0; /* reset bank */
-
- printf (" done\n");
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int i, l, rc;
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i = 0, cp = wp; i < l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
- for (; i < 4 && cnt > 0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt == 0 && i < 4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
-
- if ((rc = write_word (info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = 0;
- for (i = 0; i < 4; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_word (info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i = 0, cp = wp; i < 4 && cnt > 0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i < 4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
-
- return (write_word (info, wp, data));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word (flash_info_t * info, ulong dest, ulong data)
-{
- volatile FLASH_WORD_SIZE *addr2 =
- (FLASH_WORD_SIZE *) (info->start[0]);
- volatile FLASH_WORD_SIZE *dest2 = (FLASH_WORD_SIZE *) dest;
- volatile FLASH_WORD_SIZE *data2 = (FLASH_WORD_SIZE *) & data;
- ulong start;
- int i;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*((volatile FLASH_WORD_SIZE *) dest) &
- (FLASH_WORD_SIZE) data) != (FLASH_WORD_SIZE) data) {
- return (2);
- }
-
- for (i = 0; i < 4 / sizeof (FLASH_WORD_SIZE); i++) {
- int flag;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
-
- addr2[ADDR0] = (FLASH_WORD_SIZE) 0x00AA00AA;
- addr2[ADDR1] = (FLASH_WORD_SIZE) 0x00550055;
- addr2[ADDR0] = (FLASH_WORD_SIZE) 0x00A000A0;
-
- dest2[i] = data2[i];
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts ();
-
- /* data polling for D7 */
- start = get_timer (0);
- while ((dest2[i] & (FLASH_WORD_SIZE) 0x00800080) !=
- (data2[i] & (FLASH_WORD_SIZE) 0x00800080)) {
-
- if (get_timer (start) > CFG_FLASH_WRITE_TOUT) {
- return (1);
- }
- }
- }
-
- return (0);
-}
diff --git a/board/sbc8240/sbc8240.c b/board/sbc8240/sbc8240.c
deleted file mode 100644
index a6d3babe92..0000000000
--- a/board/sbc8240/sbc8240.c
+++ /dev/null
@@ -1,105 +0,0 @@
-/*
- * (C) Copyright 2001
- * Rob Taylor, Flying Pig Systems. robt@flyingpig.com.
- *
- * (C) Copyright 2001, 2002
- * Wolfgang Denk, DENX Software Engineering, <wd@denx.de>
-
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc824x.h>
-#include <asm/processor.h>
-#include <pci.h>
-
-#define BOARD_REV_REG 0xFE80002B
-
-int checkboard (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- char revision = *(volatile char *)(BOARD_REV_REG);
- char buf[32];
-
- puts ("Board: sbc8240 ");
- printf("Revision %d ", revision);
- printf("Local Bus at %s MHz\n", strmhz(buf, gd->bus_clk));
-
- return 0;
-}
-
-long int initdram(int board_type)
-{
- long size;
- long new_bank0_end;
- long mear1;
- long emear1;
-
- size = get_ram_size(CFG_SDRAM_BASE, CFG_MAX_RAM_SIZE);
-
- new_bank0_end = size - 1;
- mear1 = mpc824x_mpc107_getreg(MEAR1);
- emear1 = mpc824x_mpc107_getreg(EMEAR1);
- mear1 = (mear1 & 0xFFFFFF00) |
- ((new_bank0_end & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT);
- emear1 = (emear1 & 0xFFFFFF00) |
- ((new_bank0_end & MICR_ADDR_MASK) >> MICR_EADDR_SHIFT);
- mpc824x_mpc107_setreg(MEAR1, mear1);
- mpc824x_mpc107_setreg(EMEAR1, emear1);
-
- return (size);
-}
-
-/*
- * Initialize PCI Devices, report devices found.
- */
-#ifndef CONFIG_PCI_PNP
-static struct pci_config_table pci_sandpoint_config_table[] = {
- { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x0f, PCI_ANY_ID,
- pci_cfgfunc_config_device, { PCI_ENET0_IOADDR,
- PCI_ENET0_MEMADDR,
- PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }},
-
- { }
-};
-#endif
-
-struct pci_controller hose = {
-#ifndef CONFIG_PCI_PNP
- config_table: pci_sandpoint_config_table,
-#endif
-};
-
-void pci_init_board(void)
-{
- pci_mpc824x_init(&hose);
-}
-
-#ifdef CONFIG_MISC_INIT_R
-/* ------------------------------------------------------------------------- */
-int misc_init_r (void)
-{
-#ifdef CFG_LED_BASE
- *((unsigned char *) (CFG_LED_BASE)) = 0xFF;
-#endif /* CFG_LED_BASE */
-
- return (0);
-}
-#endif /* CONFIG_MISC_INIT_R */
diff --git a/board/sbc8240/u-boot.lds b/board/sbc8240/u-boot.lds
deleted file mode 100644
index 7be85e4410..0000000000
--- a/board/sbc8240/u-boot.lds
+++ /dev/null
@@ -1,136 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc824x/start.o (.text)
- lib_ppc/board.o (.text)
- lib_ppc/ppcstring.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
- lib_generic/zlib.o (.text)
-
- . = DEFINED(env_offset) ? env_offset : .;
- common/environment.o (.text)
-
- *(.text)
-
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
-
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/sbc8260/Makefile b/board/sbc8260/Makefile
deleted file mode 100644
index 14ed457110..0000000000
--- a/board/sbc8260/Makefile
+++ /dev/null
@@ -1,46 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := sbc8260.o flash.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/sbc8260/config.mk b/board/sbc8260/config.mk
deleted file mode 100644
index 1f18260ddb..0000000000
--- a/board/sbc8260/config.mk
+++ /dev/null
@@ -1,34 +0,0 @@
-#
-# (C) Copyright 2000
-# Sysgo Real-Time Solutions, GmbH <www.elinos.com>
-# Marius Groeger <mgroeger@sysgo.de>
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# MBX8xx boards
-#
-
-TEXT_BASE = 0x40000000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
diff --git a/board/sbc8260/flash.c b/board/sbc8260/flash.c
deleted file mode 100644
index 9a8b95225f..0000000000
--- a/board/sbc8260/flash.c
+++ /dev/null
@@ -1,392 +0,0 @@
-/*
- * (C) Copyright 2000
- * Marius Groeger <mgroeger@sysgo.de>
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- *
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * Flash Routines for AMD 29F080B devices
- *
- *--------------------------------------------------------------------
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-
-static ulong flash_get_size (vu_long *addr, flash_info_t *info);
-static int write_word (flash_info_t *info, ulong dest, ulong data);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- unsigned long size;
- int i;
-
- /* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* for now, only support the 4 MB Flash SIMM */
- size = flash_get_size((vu_long *)CFG_FLASH0_BASE, &flash_info[0]);
-
- /*
- * protect monitor and environment sectors
- */
-
-#if CFG_MONITOR_BASE >= CFG_FLASH0_BASE
- flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+monitor_flash_len-1,
- &flash_info[0]);
-#endif
-
-#if (CFG_ENV_IS_IN_FLASH == 1) && defined(CFG_ENV_ADDR)
-# ifndef CFG_ENV_SIZE
-# define CFG_ENV_SIZE CFG_ENV_SECT_SIZE
-# endif
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1,
- &flash_info[0]);
-#endif
-
- return /*size*/ (CFG_FLASH0_SIZE * 1024 * 1024);
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch ((info->flash_id >> 16) & 0xff) {
- case 0x1:
- printf ("AMD ");
- break;
- default:
- printf ("Unknown Vendor ");
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case AMD_ID_F040B:
- printf ("AM29F040B (4 Mbit)\n");
- break;
- case AMD_ID_F080B:
- printf ("AM29F080B (8 Mbit)\n");
- break;
- default:
- printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " "
- );
- }
- printf ("\n");
- return;
-}
-
-/*
- * The following code cannot be run from FLASH!
- */
-
-static ulong flash_get_size (vu_long *addr, flash_info_t *info)
-{
- short i;
- vu_long vendor, devid;
- ulong base = (ulong)addr;
-
-/* printf("addr = %08lx\n", (unsigned long)addr); */
-
- /* Reset and Write auto select command: read Manufacturer ID */
- addr[0] = 0xf0f0f0f0;
- addr[0x0555] = 0xAAAAAAAA;
- addr[0x02AA] = 0x55555555;
- addr[0x0555] = 0x90909090;
- udelay (1000);
-
- vendor = addr[0];
-/* printf("vendor = %08lx\n", vendor); */
- if (vendor != 0x01010101) {
- info->size = 0;
- goto out;
- }
-
- devid = addr[1];
-/* printf("devid = %08lx\n", devid); */
-
- if ((devid & 0xff) == AMD_ID_F080B) {
- info->flash_id = (vendor & 0xff) << 16 | AMD_ID_F080B;
- /* we have 16 sectors with 64KB each x 4 */
- info->sector_count = 16;
- info->size = 4 * info->sector_count * 64*1024;
- }
- else {
- info->size = 0;
- goto out;
- }
-
- /* check for protected sectors */
- for (i = 0; i < info->sector_count; i++) {
- /* sector base address */
- info->start[i] = base + i * (info->size / info->sector_count);
- /* read sector protection at sector address, (A7 .. A0) = 0x02 */
- /* D0 = 1 if protected */
- addr = (volatile unsigned long *)(info->start[i]);
- info->protect[i] = addr[2] & 1;
- }
-
- /* reset command */
- addr = (vu_long *)info->start[0];
-
-out:
- addr[0] = 0xf0f0f0f0;
-
- return info->size;
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- vu_long *addr = (vu_long*)(info->start[0]);
- int flag, prot, sect, l_sect;
- ulong start, now, last;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- l_sect = -1;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[0x0555] = 0xAAAAAAAA;
- addr[0x02AA] = 0x55555555;
- addr[0x0555] = 0x80808080;
- addr[0x0555] = 0xAAAAAAAA;
- addr[0x02AA] = 0x55555555;
- udelay (100);
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr = (vu_long*)(info->start[sect]);
- addr[0] = 0x30303030;
- l_sect = sect;
- }
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- /*
- * We wait for the last triggered sector
- */
- if (l_sect < 0)
- goto DONE;
-
- start = get_timer (0);
- last = start;
- addr = (vu_long*)(info->start[l_sect]);
- while ((addr[0] & 0x80808080) != 0x80808080) {
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- return 1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- serial_putc ('.');
- last = now;
- }
- }
-
- DONE:
- /* reset to read mode */
- addr = (volatile unsigned long *)info->start[0];
- addr[0] = 0xF0F0F0F0; /* reset bank */
-
- printf (" done\n");
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int i, l, rc;
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
- for (; i<4 && cnt>0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = 0;
- for (i=0; i<4; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- return (write_word(info, wp, data));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word (flash_info_t *info, ulong dest, ulong data)
-{
- vu_long *addr = (vu_long*)(info->start[0]);
- ulong start;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*((vu_long *)dest) & data) != data) {
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[0x0555] = 0xAAAAAAAA;
- addr[0x02AA] = 0x55555555;
- addr[0x0555] = 0xA0A0A0A0;
-
- *((vu_long *)dest) = data;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* data polling for D7 */
- start = get_timer (0);
- while ((*((vu_long *)dest) & 0x80808080) != (data & 0x80808080)) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- return (1);
- }
- }
- return (0);
-}
-
-/*-----------------------------------------------------------------------
- */
diff --git a/board/sbc8260/sbc8260.c b/board/sbc8260/sbc8260.c
deleted file mode 100644
index 48aefa010e..0000000000
--- a/board/sbc8260/sbc8260.c
+++ /dev/null
@@ -1,289 +0,0 @@
-/*
- * (C) Copyright 2000
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * (C) Copyright 2001
- * Advent Networks, Inc. <http://www.adventnetworks.com>
- * Jay Monkman <jtm@smoothsmoothie.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <ioports.h>
-#include <mpc8260.h>
-
-/*
- * I/O Port configuration table
- *
- * if conf is 1, then that port pin will be configured at boot time
- * according to the five values podr/pdir/ppar/psor/pdat for that entry
- */
-
-const iop_conf_t iop_conf_tab[4][32] = {
-
- /* Port A configuration */
- { /* conf ppar psor pdir podr pdat */
- /* PA31 */ { 1, 0, 0, 1, 0, 0 }, /* FCC1 *ATMTXEN */
- /* PA30 */ { 1, 0, 0, 1, 0, 0 }, /* FCC1 ATMTCA */
- /* PA29 */ { 1, 0, 0, 1, 0, 0 }, /* FCC1 ATMTSOC */
- /* PA28 */ { 1, 0, 0, 1, 0, 0 }, /* FCC1 *ATMRXEN */
- /* PA27 */ { 1, 0, 0, 1, 0, 0 }, /* FCC1 ATMRSOC */
- /* PA26 */ { 1, 0, 0, 1, 0, 0 }, /* FCC1 ATMRCA */
- /* PA25 */ { 1, 0, 0, 1, 0, 0 }, /* FCC1 ATMTXD[0] */
- /* PA24 */ { 1, 0, 0, 1, 0, 0 }, /* FCC1 ATMTXD[1] */
- /* PA23 */ { 1, 0, 0, 1, 0, 0 }, /* FCC1 ATMTXD[2] */
- /* PA22 */ { 1, 0, 0, 1, 0, 0 }, /* FCC1 ATMTXD[3] */
- /* PA21 */ { 1, 0, 0, 1, 0, 0 }, /* FCC1 ATMTXD[4] */
- /* PA20 */ { 1, 0, 0, 1, 0, 0 }, /* FCC1 ATMTXD[5] */
- /* PA19 */ { 1, 0, 0, 1, 0, 0 }, /* FCC1 ATMTXD[6] */
- /* PA18 */ { 1, 0, 0, 1, 0, 0 }, /* FCC1 ATMTXD[7] */
- /* PA17 */ { 1, 0, 0, 1, 0, 0 }, /* FCC1 ATMRXD[7] */
- /* PA16 */ { 1, 0, 0, 1, 0, 0 }, /* FCC1 ATMRXD[6] */
- /* PA15 */ { 1, 0, 0, 1, 0, 0 }, /* FCC1 ATMRXD[5] */
- /* PA14 */ { 1, 0, 0, 1, 0, 0 }, /* FCC1 ATMRXD[4] */
- /* PA13 */ { 1, 0, 0, 1, 0, 0 }, /* FCC1 ATMRXD[3] */
- /* PA12 */ { 1, 0, 0, 1, 0, 0 }, /* FCC1 ATMRXD[2] */
- /* PA11 */ { 1, 0, 0, 1, 0, 0 }, /* FCC1 ATMRXD[1] */
- /* PA10 */ { 1, 0, 0, 1, 0, 0 }, /* FCC1 ATMRXD[0] */
- /* PA9 */ { 1, 1, 0, 1, 0, 0 }, /* SMC2 TXD */
- /* PA8 */ { 1, 1, 0, 0, 0, 0 }, /* SMC2 RXD */
- /* PA7 */ { 1, 0, 0, 1, 0, 0 }, /* PA7 */
- /* PA6 */ { 1, 0, 0, 1, 0, 0 }, /* PA6 */
- /* PA5 */ { 1, 0, 0, 1, 0, 0 }, /* PA5 */
- /* PA4 */ { 1, 0, 0, 1, 0, 0 }, /* PA4 */
- /* PA3 */ { 1, 0, 0, 1, 0, 0 }, /* PA3 */
- /* PA2 */ { 1, 0, 0, 1, 0, 0 }, /* PA2 */
- /* PA1 */ { 1, 0, 0, 1, 0, 0 }, /* PA1 */
- /* PA0 */ { 1, 0, 0, 1, 0, 0 } /* PA0 */
- },
-
- /* Port B configuration */
- { /* conf ppar psor pdir podr pdat */
- /* PB31 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TX_ER */
- /* PB30 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_DV */
- /* PB29 */ { 1, 1, 1, 1, 0, 0 }, /* FCC2 MII TX_EN */
- /* PB28 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_ER */
- /* PB27 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII COL */
- /* PB26 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII CRS */
- /* PB25 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[3] */
- /* PB24 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[2] */
- /* PB23 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[1] */
- /* PB22 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[0] */
- /* PB21 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[0] */
- /* PB20 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[1] */
- /* PB19 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[2] */
- /* PB18 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[3] */
- /* PB17 */ { 1, 0, 0, 1, 0, 0 }, /* PB17 */
- /* PB16 */ { 1, 0, 0, 1, 0, 0 }, /* PB16 */
- /* PB15 */ { 1, 0, 0, 1, 0, 0 }, /* PB15 */
- /* PB14 */ { 1, 0, 0, 1, 0, 0 }, /* PB14 */
- /* PB13 */ { 1, 0, 0, 1, 0, 0 }, /* PB13 */
- /* PB12 */ { 1, 0, 0, 1, 0, 0 }, /* PB12 */
- /* PB11 */ { 1, 0, 0, 1, 0, 0 }, /* PB11 */
- /* PB10 */ { 1, 0, 0, 1, 0, 0 }, /* PB10 */
- /* PB9 */ { 1, 0, 0, 1, 0, 0 }, /* PB9 */
- /* PB8 */ { 1, 0, 0, 1, 0, 0 }, /* PB8 */
- /* PB7 */ { 1, 0, 0, 1, 0, 0 }, /* PB7 */
- /* PB6 */ { 1, 0, 0, 1, 0, 0 }, /* PB6 */
- /* PB5 */ { 1, 0, 0, 1, 0, 0 }, /* PB5 */
- /* PB4 */ { 1, 0, 0, 1, 0, 0 }, /* PB4 */
- /* PB3 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PB2 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PB1 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PB0 */ { 0, 0, 0, 0, 0, 0 } /* pin doesn't exist */
- },
-
- /* Port C */
- { /* conf ppar psor pdir podr pdat */
- /* PC31 */ { 1, 0, 0, 1, 0, 0 }, /* PC31 */
- /* PC30 */ { 1, 0, 0, 1, 0, 0 }, /* PC30 */
- /* PC29 */ { 1, 1, 1, 0, 0, 0 }, /* SCC1 EN *CLSN */
- /* PC28 */ { 1, 0, 0, 1, 0, 0 }, /* PC28 */
- /* PC27 */ { 1, 0, 0, 1, 0, 0 }, /* PC27 */
- /* PC26 */ { 1, 0, 0, 1, 0, 0 }, /* PC26 */
- /* PC25 */ { 1, 0, 0, 1, 0, 0 }, /* PC25 */
- /* PC24 */ { 1, 0, 0, 1, 0, 0 }, /* PC24 */
- /* PC23 */ { 1, 1, 0, 1, 0, 0 }, /* ATMTFCLK */
- /* PC22 */ { 1, 1, 0, 0, 0, 0 }, /* ATMRFCLK */
- /* PC21 */ { 1, 1, 0, 0, 0, 0 }, /* SCC1 EN RXCLK */
- /* PC20 */ { 1, 1, 0, 0, 0, 0 }, /* SCC1 EN TXCLK */
- /* PC19 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_CLK */
- /* PC18 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII TX_CLK */
- /* PC17 */ { 1, 0, 0, 1, 0, 0 }, /* PC17 */
- /* PC16 */ { 1, 0, 0, 1, 0, 0 }, /* PC16 */
- /* PC15 */ { 1, 0, 0, 1, 0, 0 }, /* PC15 */
- /* PC14 */ { 1, 1, 0, 0, 0, 0 }, /* SCC1 EN *CD */
- /* PC13 */ { 1, 0, 0, 1, 0, 0 }, /* PC13 */
- /* PC12 */ { 1, 0, 0, 1, 0, 0 }, /* PC12 */
- /* PC11 */ { 1, 0, 0, 1, 0, 0 }, /* PC11 */
- /* PC10 */ { 1, 0, 0, 1, 0, 0 }, /* FCC2 MDC */
- /* PC9 */ { 1, 0, 0, 1, 0, 0 }, /* FCC2 MDIO */
- /* PC8 */ { 1, 0, 0, 1, 0, 0 }, /* PC8 */
- /* PC7 */ { 1, 0, 0, 1, 0, 0 }, /* PC7 */
- /* PC6 */ { 1, 0, 0, 1, 0, 0 }, /* PC6 */
- /* PC5 */ { 1, 0, 0, 1, 0, 0 }, /* PC5 */
- /* PC4 */ { 1, 0, 0, 1, 0, 0 }, /* PC4 */
- /* PC3 */ { 1, 0, 0, 1, 0, 0 }, /* PC3 */
- /* PC2 */ { 1, 0, 0, 1, 0, 1 }, /* ENET FDE */
- /* PC1 */ { 1, 0, 0, 1, 0, 0 }, /* ENET DSQE */
- /* PC0 */ { 1, 0, 0, 1, 0, 0 }, /* ENET LBK */
- },
-
- /* Port D */
- { /* conf ppar psor pdir podr pdat */
- /* PD31 */ { 1, 1, 0, 0, 0, 0 }, /* SCC1 EN RxD */
- /* PD30 */ { 1, 1, 1, 1, 0, 0 }, /* SCC1 EN TxD */
- /* PD29 */ { 1, 1, 0, 1, 0, 0 }, /* SCC1 EN TENA */
- /* PD28 */ { 1, 0, 0, 1, 0, 0 }, /* PD28 */
- /* PD27 */ { 1, 0, 0, 1, 0, 0 }, /* PD27 */
- /* PD26 */ { 1, 0, 0, 1, 0, 0 }, /* PD26 */
- /* PD25 */ { 1, 0, 0, 1, 0, 0 }, /* PD25 */
- /* PD24 */ { 1, 0, 0, 1, 0, 0 }, /* PD24 */
- /* PD23 */ { 1, 0, 0, 1, 0, 0 }, /* PD23 */
- /* PD22 */ { 1, 0, 0, 1, 0, 0 }, /* PD22 */
- /* PD21 */ { 1, 0, 0, 1, 0, 0 }, /* PD21 */
- /* PD20 */ { 1, 0, 0, 1, 0, 0 }, /* PD20 */
- /* PD19 */ { 1, 0, 0, 1, 0, 0 }, /* PD19 */
- /* PD18 */ { 1, 0, 0, 1, 0, 0 }, /* PD18 */
- /* PD17 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXPRTY */
- /* PD16 */ { 1, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXPRTY */
-#if defined(CONFIG_SOFT_I2C)
- /* PD15 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SDA */
- /* PD14 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SCL */
-#else
-#if defined(CONFIG_HARD_I2C)
- /* PD15 */ { 1, 1, 1, 0, 1, 0 }, /* I2C SDA */
- /* PD14 */ { 1, 1, 1, 0, 1, 0 }, /* I2C SCL */
-#else /* normal I/O port pins */
- /* PD15 */ { 1, 0, 0, 1, 0, 0 }, /* I2C SDA */
- /* PD14 */ { 1, 0, 0, 1, 0, 0 }, /* I2C SCL */
-#endif
-#endif
- /* PD13 */ { 1, 0, 0, 0, 0, 0 }, /* PD13 */
- /* PD12 */ { 1, 0, 0, 0, 0, 0 }, /* PD12 */
- /* PD11 */ { 1, 0, 0, 0, 0, 0 }, /* PD11 */
- /* PD10 */ { 1, 0, 0, 0, 0, 0 }, /* PD10 */
- /* PD9 */ { 1, 1, 0, 1, 0, 0 }, /* SMC1 TXD */
- /* PD8 */ { 1, 1, 0, 0, 0, 0 }, /* SMC1 RXD */
- /* PD7 */ { 1, 0, 0, 1, 0, 1 }, /* PD7 */
- /* PD6 */ { 1, 0, 0, 1, 0, 1 }, /* PD6 */
- /* PD5 */ { 1, 0, 0, 1, 0, 1 }, /* PD5 */
- /* PD4 */ { 1, 0, 0, 1, 0, 1 }, /* PD4 */
- /* PD3 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PD2 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PD1 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PD0 */ { 0, 0, 0, 0, 0, 0 } /* pin doesn't exist */
- }
-};
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Check Board Identity:
- */
-
-int checkboard (void)
-{
- puts ("Board: EST SBC8260\n");
- return 0;
-}
-
-/* ------------------------------------------------------------------------- */
-
-long int initdram (int board_type)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8260_t *memctl = &immap->im_memctl;
- volatile uchar c = 0, *ramaddr = (uchar *) (CFG_SDRAM_BASE + 0x8);
- ulong psdmr = CFG_PSDMR;
- int i;
-
- /*
- * Quote from 8260 UM (10.4.2 SDRAM Power-On Initialization, 10-35):
- *
- * "At system reset, initialization software must set up the
- * programmable parameters in the memory controller banks registers
- * (ORx, BRx, P/LSDMR). After all memory parameters are configured,
- * system software should execute the following initialization sequence
- * for each SDRAM device.
- *
- * 1. Issue a PRECHARGE-ALL-BANKS command
- * 2. Issue eight CBR REFRESH commands
- * 3. Issue a MODE-SET command to initialize the mode register
- *
- * The initial commands are executed by setting P/LSDMR[OP] and
- * accessing the SDRAM with a single-byte transaction."
- *
- * The appropriate BRx/ORx registers have already been set when we
- * get here. The SDRAM can be accessed at the address CFG_SDRAM_BASE.
- */
-
- memctl->memc_psrt = CFG_PSRT;
- memctl->memc_mptpr = CFG_MPTPR;
-
- memctl->memc_psdmr = psdmr | PSDMR_OP_PREA;
- *ramaddr = c;
-
- memctl->memc_psdmr = psdmr | PSDMR_OP_CBRR;
- for (i = 0; i < 8; i++)
- *ramaddr = c;
-
- memctl->memc_psdmr = psdmr | PSDMR_OP_MRW;
- *ramaddr = c;
-
- memctl->memc_psdmr = psdmr | PSDMR_OP_NORM | PSDMR_RFEN;
- *ramaddr = c;
-
- /* return total ram size */
- return (CFG_SDRAM0_SIZE * 1024 * 1024);
-}
-
-#ifdef CONFIG_MISC_INIT_R
-/* ------------------------------------------------------------------------- */
-int misc_init_r (void)
-{
-#ifdef CFG_LED_BASE
- uchar ds = *(unsigned char *) (CFG_LED_BASE + 1);
- uchar ss;
- uchar tmp[64];
- int res;
-
- if ((ds != 0) && (ds != 0xff)) {
- res = getenv_r ("ethaddr", tmp, sizeof (tmp));
- if (res > 0) {
- ss = ((ds >> 4) & 0x0f);
- ss += ss < 0x0a ? '0' : ('a' - 10);
- tmp[15] = ss;
-
- ss = (ds & 0x0f);
- ss += ss < 0x0a ? '0' : ('a' - 10);
- tmp[16] = ss;
-
- tmp[17] = '\0';
- setenv ("ethaddr", tmp);
- /* set the led to show the address */
- *((unsigned char *) (CFG_LED_BASE + 1)) = ds;
- }
- }
-#endif /* CFG_LED_BASE */
- return (0);
-}
-#endif /* CONFIG_MISC_INIT_R */
diff --git a/board/sbc8260/u-boot.lds b/board/sbc8260/u-boot.lds
deleted file mode 100644
index 9e623d0b93..0000000000
--- a/board/sbc8260/u-boot.lds
+++ /dev/null
@@ -1,125 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc8260/start.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/sbc8560/Makefile b/board/sbc8560/Makefile
deleted file mode 100644
index da295fbdf8..0000000000
--- a/board/sbc8560/Makefile
+++ /dev/null
@@ -1,51 +0,0 @@
-#
-# (C) Copyright 2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# (C) Copyright 2004 Wind River Systems Inc <www.windriver.com>.
-# Added support for Wind River SBC8560 board
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := $(BOARD).o
-SOBJS := init.o
-#SOBJS :=
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(OBJS) $(SOBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/sbc8560/config.mk b/board/sbc8560/config.mk
deleted file mode 100644
index 6d9ae45126..0000000000
--- a/board/sbc8560/config.mk
+++ /dev/null
@@ -1,33 +0,0 @@
-# Modified by Xianghua Xiao, X.Xiao@motorola.com
-# (C) Copyright 2002,2003 Motorola Inc.
-#
-# (C) Copyright 2004 Wind River Systems Inc <www.windriver.com>.
-# Added support for Wind River SBC8560 board
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-#
-# based on mpc8560ads board
-# default CCARBAR is at 0xff700000
-# assume U-Boot is less than 256K
-#
-TEXT_BASE = 0xfffc0000
-
-PLATFORM_CPPFLAGS += -DCONFIG_MPC85xx=1
-PLATFORM_CPPFLAGS += -DCONFIG_E500=1
diff --git a/board/sbc8560/init.S b/board/sbc8560/init.S
deleted file mode 100644
index 3d8d180d84..0000000000
--- a/board/sbc8560/init.S
+++ /dev/null
@@ -1,165 +0,0 @@
-/*
-* Copyright (C) 2002,2003, Motorola Inc.
-* Xianghua Xiao <X.Xiao@motorola.com>
-*
-* (C) Copyright 2004 Wind River Systems Inc <www.windriver.com>.
-* Added support for Wind River SBC8560 board
-*
-* See file CREDITS for list of people who contributed to this
-* project.
-*
-* This program is free software; you can redistribute it and/or
-* modify it under the terms of the GNU General Public License as
-* published by the Free Software Foundation; either version 2 of
-* the License, or (at your option) any later version.
-*
-* This program is distributed in the hope that it will be useful,
-* but WITHOUT ANY WARRANTY; without even the implied warranty of
-* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-* GNU General Public License for more details.
-*
-* You should have received a copy of the GNU General Public License
-* along with this program; if not, write to the Free Software
-* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-* MA 02111-1307 USA
-*/
-
-#include <ppc_asm.tmpl>
-#include <ppc_defs.h>
-#include <asm/cache.h>
-#include <asm/mmu.h>
-#include <config.h>
-#include <mpc85xx.h>
-
-#define entry_start \
- mflr r1 ; \
- bl 0f ;
-
-#define entry_end \
-0: mflr r0 ; \
- mtlr r1 ; \
- blr ;
-
-
-/* LAW(Local Access Window) configuration:
- * 0000_0000-0800_0000: DDR(512M) -or- larger
- * c000_0000-cfff_ffff: PCI(256M)
- * d000_0000-dfff_ffff: RapidIO(256M)
- * e000_0000-ffff_ffff: localbus(512M)
- * e000_0000-e3ff_ffff: LBC 64M, 32-bit flash on CS6
- * e400_0000-e7ff_ffff: LBC 64M, 32-bit flash on CS1
- * e800_0000-efff_ffff: LBC 128M, nothing here
- * f000_0000-f3ff_ffff: LBC 64M, SDRAM on CS3
- * f400_0000-f7ff_ffff: LBC 64M, SDRAM on CS4
- * f800_0000-fdff_ffff: LBC 64M, nothing here
- * fc00_0000-fcff_ffff: LBC 16M, CSR,RTC,UART,etc on CS5
- * fd00_0000-fdff_ffff: LBC 16M, nothing here
- * fe00_0000-feff_ffff: LBC 16M, nothing here
- * ff00_0000-ff6f_ffff: LBC 7M, nothing here
- * ff70_0000-ff7f_ffff: CCSRBAR 1M
- * ff80_0000-ffff_ffff: LBC 8M, 8-bit flash on CS0
- * Note: CCSRBAR and L2-as-SRAM don't need configure Local Access
- * Window.
- * Note: If flash is 8M at default position(last 8M),no LAW needed.
- */
-
-#if !defined(CONFIG_SPD_EEPROM)
- #define LAWBAR0 ((CFG_DDR_SDRAM_BASE>>12) & 0xfffff)
- #define LAWAR0 (LAWAR_EN | LAWAR_TRGT_IF_DDR | (LAWAR_SIZE & LAWAR_SIZE_512M))
-#else
- #define LAWBAR0 0
- #define LAWAR0 ((LAWAR_TRGT_IF_DDR | (LAWAR_SIZE & LAWAR_SIZE_512M)) & ~LAWAR_EN)
-#endif
-
-#define LAWBAR1 ((CFG_PCI_MEM_BASE>>12) & 0xfffff)
-#define LAWAR1 (LAWAR_EN | LAWAR_TRGT_IF_PCIX | (LAWAR_SIZE & LAWAR_SIZE_256M))
-
-#define LAWBAR2 ((0xe0000000>>12) & 0xfffff)
-#define LAWAR2 (LAWAR_EN | LAWAR_TRGT_IF_LBC | (LAWAR_SIZE & LAWAR_SIZE_512M))
-
- .section .bootpg, "ax"
- .globl law_entry
-law_entry:
- entry_start
- .long 0x03
- .long LAWBAR0,LAWAR0,LAWBAR1,LAWAR1,LAWBAR2,LAWAR2
- entry_end
-
-/* TLB1 entries configuration: */
-
- .section .bootpg, "ax"
- .globl tlb1_entry
-
-tlb1_entry:
- entry_start
-
- .long 0x08 /* the following data table uses a few of 16 TLB entries */
-
-/* TLB for CCSRBAR (IMMR) */
-
- .long TLB1_MAS0(1,1,0)
- .long TLB1_MAS1(1,1,0,0,BOOKE_PAGESZ_1M)
- .long TLB1_MAS2(((CFG_CCSRBAR>>12) & 0xfffff),0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(((CFG_CCSRBAR>>12) & 0xfffff),0,0,0,0,0,1,0,1,0,1)
-
-/* TLB for Local Bus stuff, just map the whole 512M */
-/* note that the LBC SDRAM is cache-inhibit and guarded, like everything else */
-
- .long TLB1_MAS0(1,2,0)
- .long TLB1_MAS1(1,1,0,0,BOOKE_PAGESZ_256M)
- .long TLB1_MAS2(((0xe0000000>>12) & 0xfffff),0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(((0xe0000000>>12) & 0xfffff),0,0,0,0,0,1,0,1,0,1)
-
- .long TLB1_MAS0(1,3,0)
- .long TLB1_MAS1(1,1,0,0,BOOKE_PAGESZ_256M)
- .long TLB1_MAS2(((0xf0000000>>12)&0xfffff),0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(((0xf0000000>>12)&0xfffff),0,0,0,0,0,1,0,1,0,1)
-
-#if !defined(CONFIG_SPD_EEPROM)
- .long TLB1_MAS0(1,4,0)
- .long TLB1_MAS1(1,1,0,0,BOOKE_PAGESZ_256M)
- .long TLB1_MAS2(((CFG_DDR_SDRAM_BASE>>12) & 0xfffff),0,0,0,0,0,0,0,0)
- .long TLB1_MAS3(((CFG_DDR_SDRAM_BASE>>12) & 0xfffff),0,0,0,0,0,1,0,1,0,1)
-
- .long TLB1_MAS0(1,5,0)
- .long TLB1_MAS1(1,1,0,0,BOOKE_PAGESZ_256M)
- .long TLB1_MAS2((((CFG_DDR_SDRAM_BASE+0x10000000)>>12) & 0xfffff),0,0,0,0,0,0,0,0)
- .long TLB1_MAS3((((CFG_DDR_SDRAM_BASE+0x10000000)>>12) & 0xfffff),0,0,0,0,0,1,0,1,0,1)
-#else
- .long TLB1_MAS0(1,4,0)
- .long TLB1_MAS1(0,0,0,0,BOOKE_PAGESZ_1M)
- .long TLB1_MAS2(0,0,0,0,0,0,0,0,0)
- .long TLB1_MAS3(0,0,0,0,0,0,1,0,1,0,1)
-
- .long TLB1_MAS0(1,5,0)
- .long TLB1_MAS1(0,0,0,0,BOOKE_PAGESZ_1M)
- .long TLB1_MAS2(0,0,0,0,0,0,0,0,0)
- .long TLB1_MAS3(0,0,0,0,0,0,1,0,1,0,1)
-#endif
-
- .long TLB1_MAS0(1,6,0)
- .long TLB1_MAS1(1,1,0,0,BOOKE_PAGESZ_16K)
-#ifdef CONFIG_L2_INIT_RAM
- .long TLB1_MAS2(((CFG_INIT_RAM_ADDR>>12) & 0xfffff),0,0,0,1,0,0,0,0)
-#else
- .long TLB1_MAS2(((CFG_INIT_RAM_ADDR>>12) & 0xfffff),0,0,0,0,0,0,0,0)
-#endif
- .long TLB1_MAS3(((CFG_INIT_RAM_ADDR>>12) & 0xfffff),0,0,0,0,0,1,0,1,0,1)
-
- .long TLB1_MAS0(1,7,0)
- .long TLB1_MAS1(1,1,0,0,BOOKE_PAGESZ_256M)
- .long TLB1_MAS2(((CFG_PCI_MEM_BASE>>12) & 0xfffff),0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(((CFG_PCI_MEM_BASE>>12) & 0xfffff),0,0,0,0,0,1,0,1,0,1)
-
-#if (CFG_CCSRBAR_DEFAULT != CFG_CCSRBAR)
- .long TLB1_MAS0(1,15,0)
- .long TLB1_MAS1(1,1,0,0,BOOKE_PAGESZ_1M)
- .long TLB1_MAS2(((CFG_CCSRBAR_DEFAULT>>12) & 0xfffff),0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(((CFG_CCSRBAR_DEFAULT>>12) & 0xfffff),0,0,0,0,0,1,0,1,0,1)
-#else
- .long TLB1_MAS0(1,15,0)
- .long TLB1_MAS1(0,0,0,0,BOOKE_PAGESZ_1M)
- .long TLB1_MAS2(0,0,0,0,0,0,0,0,0)
- .long TLB1_MAS3(0,0,0,0,0,0,1,0,1,0,1)
-#endif
- entry_end
diff --git a/board/sbc8560/sbc8560.c b/board/sbc8560/sbc8560.c
deleted file mode 100644
index e8b9929e77..0000000000
--- a/board/sbc8560/sbc8560.c
+++ /dev/null
@@ -1,460 +0,0 @@
-/*
- * (C) Copyright 2003,Motorola Inc.
- * Xianghua Xiao, (X.Xiao@motorola.com)
- *
- * (C) Copyright 2002 Scott McNutt <smcnutt@artesyncp.com>
- *
- * (C) Copyright 2004 Wind River Systems Inc <www.windriver.com>.
- * Added support for Wind River SBC8560 board
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-
-extern long int spd_sdram (void);
-
-#include <common.h>
-#include <asm/processor.h>
-#include <asm/immap_85xx.h>
-#include <ioports.h>
-#include <spd.h>
-#include <miiphy.h>
-
-long int fixed_sdram (void);
-
-/*
- * I/O Port configuration table
- *
- * if conf is 1, then that port pin will be configured at boot time
- * according to the five values podr/pdir/ppar/psor/pdat for that entry
- */
-
-const iop_conf_t iop_conf_tab[4][32] = {
-
- /* Port A configuration */
- { /* conf ppar psor pdir podr pdat */
- /* PA31 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 TxENB */
- /* PA30 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 TxClav */
- /* PA29 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 TxSOC */
- /* PA28 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 RxENB */
- /* PA27 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 RxSOC */
- /* PA26 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 RxClav */
- /* PA25 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[0] */
- /* PA24 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[1] */
- /* PA23 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[2] */
- /* PA22 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[3] */
- /* PA21 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[4] */
- /* PA20 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[5] */
- /* PA19 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[6] */
- /* PA18 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[7] */
- /* PA17 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[7] */
- /* PA16 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[6] */
- /* PA15 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[5] */
- /* PA14 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[4] */
- /* PA13 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[3] */
- /* PA12 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[2] */
- /* PA11 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[1] */
- /* PA10 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[0] */
- /* PA9 */ { 0, 1, 1, 1, 0, 0 }, /* FCC1 L1TXD */
- /* PA8 */ { 0, 1, 1, 0, 0, 0 }, /* FCC1 L1RXD */
- /* PA7 */ { 0, 0, 0, 1, 0, 0 }, /* PA7 */
- /* PA6 */ { 0, 1, 1, 1, 0, 0 }, /* TDM A1 L1RSYNC */
- /* PA5 */ { 0, 0, 0, 1, 0, 0 }, /* PA5 */
- /* PA4 */ { 0, 0, 0, 1, 0, 0 }, /* PA4 */
- /* PA3 */ { 0, 0, 0, 1, 0, 0 }, /* PA3 */
- /* PA2 */ { 0, 0, 0, 1, 0, 0 }, /* PA2 */
- /* PA1 */ { 1, 0, 0, 0, 0, 0 }, /* FREERUN */
- /* PA0 */ { 0, 0, 0, 1, 0, 0 } /* PA0 */
- },
-
- /* Port B configuration */
- { /* conf ppar psor pdir podr pdat */
- /* PB31 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TX_ER */
- /* PB30 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_DV */
- /* PB29 */ { 1, 1, 1, 1, 0, 0 }, /* FCC2 MII TX_EN */
- /* PB28 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_ER */
- /* PB27 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII COL */
- /* PB26 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII CRS */
- /* PB25 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[3] */
- /* PB24 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[2] */
- /* PB23 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[1] */
- /* PB22 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[0] */
- /* PB21 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[0] */
- /* PB20 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[1] */
- /* PB19 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[2] */
- /* PB18 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[3] */
- /* PB17 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:RX_DIV */
- /* PB16 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:RX_ERR */
- /* PB15 */ { 0, 1, 0, 1, 0, 0 }, /* FCC3:TX_ERR */
- /* PB14 */ { 0, 1, 0, 1, 0, 0 }, /* FCC3:TX_EN */
- /* PB13 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:COL */
- /* PB12 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:CRS */
- /* PB11 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:RXD */
- /* PB10 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:RXD */
- /* PB9 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:RXD */
- /* PB8 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:RXD */
- /* PB7 */ { 0, 1, 0, 1, 0, 0 }, /* FCC3:TXD */
- /* PB6 */ { 0, 1, 0, 1, 0, 0 }, /* FCC3:TXD */
- /* PB5 */ { 0, 1, 0, 1, 0, 0 }, /* FCC3:TXD */
- /* PB4 */ { 0, 1, 0, 1, 0, 0 }, /* FCC3:TXD */
- /* PB3 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PB2 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PB1 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PB0 */ { 0, 0, 0, 0, 0, 0 } /* pin doesn't exist */
- },
-
- /* Port C */
- { /* conf ppar psor pdir podr pdat */
- /* PC31 */ { 0, 0, 0, 1, 0, 0 }, /* PC31 */
- /* PC30 */ { 0, 0, 0, 1, 0, 0 }, /* PC30 */
- /* PC29 */ { 0, 1, 1, 0, 0, 0 }, /* SCC1 EN *CLSN */
- /* PC28 */ { 0, 0, 0, 1, 0, 0 }, /* PC28 */
- /* PC27 */ { 0, 0, 0, 1, 0, 0 }, /* UART Clock in */
- /* PC26 */ { 0, 0, 0, 1, 0, 0 }, /* PC26 */
- /* PC25 */ { 0, 0, 0, 1, 0, 0 }, /* PC25 */
- /* PC24 */ { 0, 0, 0, 1, 0, 0 }, /* PC24 */
- /* PC23 */ { 0, 1, 0, 1, 0, 0 }, /* ATMTFCLK */
- /* PC22 */ { 0, 1, 0, 0, 0, 0 }, /* ATMRFCLK */
- /* PC21 */ { 0, 1, 0, 0, 0, 0 }, /* SCC1 EN RXCLK */
- /* PC20 */ { 0, 1, 0, 0, 0, 0 }, /* SCC1 EN TXCLK */
- /* PC19 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_CLK CLK13 */
- /* PC18 */ { 1, 1, 0, 0, 0, 0 }, /* FCC Tx Clock (CLK14) */
- /* PC17 */ { 0, 0, 0, 1, 0, 0 }, /* PC17 */
- /* PC16 */ { 0, 1, 0, 0, 0, 0 }, /* FCC Tx Clock (CLK16) */
- /* PC15 */ { 1, 1, 0, 0, 0, 0 }, /* PC15 */
- /* PC14 */ { 0, 1, 0, 0, 0, 0 }, /* SCC1 EN *CD */
- /* PC13 */ { 0, 0, 0, 1, 0, 0 }, /* PC13 */
- /* PC12 */ { 0, 1, 0, 1, 0, 0 }, /* PC12 */
- /* PC11 */ { 0, 0, 0, 1, 0, 0 }, /* LXT971 transmit control */
- /* PC10 */ { 1, 0, 0, 1, 0, 0 }, /* FETHMDC */
- /* PC9 */ { 1, 0, 0, 0, 0, 0 }, /* FETHMDIO */
- /* PC8 */ { 0, 0, 0, 1, 0, 0 }, /* PC8 */
- /* PC7 */ { 0, 0, 0, 1, 0, 0 }, /* PC7 */
- /* PC6 */ { 0, 0, 0, 1, 0, 0 }, /* PC6 */
- /* PC5 */ { 0, 0, 0, 1, 0, 0 }, /* PC5 */
- /* PC4 */ { 0, 0, 0, 1, 0, 0 }, /* PC4 */
- /* PC3 */ { 0, 0, 0, 1, 0, 0 }, /* PC3 */
- /* PC2 */ { 0, 0, 0, 1, 0, 1 }, /* ENET FDE */
- /* PC1 */ { 0, 0, 0, 1, 0, 0 }, /* ENET DSQE */
- /* PC0 */ { 0, 0, 0, 1, 0, 0 }, /* ENET LBK */
- },
-
- /* Port D */
- { /* conf ppar psor pdir podr pdat */
- /* PD31 */ { 1, 1, 0, 0, 0, 0 }, /* SCC1 EN RxD */
- /* PD30 */ { 1, 1, 1, 1, 0, 0 }, /* SCC1 EN TxD */
- /* PD29 */ { 1, 1, 0, 1, 0, 0 }, /* SCC1 RTS */
- /* PD28 */ { 1, 1, 0, 0, 0, 0 }, /* SCC2 RxD */
- /* PD27 */ { 1, 1, 1, 1, 0, 0 }, /* SCC2 TxD */
- /* PD26 */ { 1, 1, 0, 1, 0, 0 }, /* SCC2 RTS */
- /* PD25 */ { 0, 0, 0, 1, 0, 0 }, /* PD25 */
- /* PD24 */ { 0, 0, 0, 1, 0, 0 }, /* PD24 */
- /* PD23 */ { 0, 0, 0, 1, 0, 0 }, /* PD23 */
- /* PD22 */ { 0, 0, 0, 1, 0, 0 }, /* PD22 */
- /* PD21 */ { 0, 0, 0, 1, 0, 0 }, /* PD21 */
- /* PD20 */ { 0, 0, 0, 1, 0, 0 }, /* PD20 */
- /* PD19 */ { 0, 0, 0, 1, 0, 0 }, /* PD19 */
- /* PD18 */ { 0, 0, 0, 1, 0, 0 }, /* PD18 */
- /* PD17 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXPRTY */
- /* PD16 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXPRTY */
- /* PD15 */ { 0, 1, 1, 0, 1, 0 }, /* I2C SDA */
- /* PD14 */ { 0, 0, 0, 1, 0, 0 }, /* LED */
- /* PD13 */ { 0, 0, 0, 0, 0, 0 }, /* PD13 */
- /* PD12 */ { 0, 0, 0, 0, 0, 0 }, /* PD12 */
- /* PD11 */ { 0, 0, 0, 0, 0, 0 }, /* PD11 */
- /* PD10 */ { 0, 0, 0, 0, 0, 0 }, /* PD10 */
- /* PD9 */ { 0, 1, 0, 1, 0, 0 }, /* SMC1 TXD */
- /* PD8 */ { 0, 1, 0, 0, 0, 0 }, /* SMC1 RXD */
- /* PD7 */ { 0, 0, 0, 1, 0, 1 }, /* PD7 */
- /* PD6 */ { 0, 0, 0, 1, 0, 1 }, /* PD6 */
- /* PD5 */ { 0, 0, 0, 1, 0, 1 }, /* PD5 */
- /* PD4 */ { 0, 0, 0, 1, 0, 1 }, /* PD4 */
- /* PD3 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PD2 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PD1 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PD0 */ { 0, 0, 0, 0, 0, 0 } /* pin doesn't exist */
- }
-};
-
-int board_early_init_f (void)
-{
-#if defined(CONFIG_PCI)
- volatile immap_t *immr = (immap_t *)CFG_IMMR;
- volatile ccsr_pcix_t *pci = &immr->im_pcix;
-
- pci->peer &= 0xfffffffdf; /* disable master abort */
-#endif
- return 0;
-}
-
-void reset_phy (void)
-{
-#if defined(CONFIG_ETHER_ON_FCC) /* avoid compile warnings for now */
- volatile unsigned char *bcsr = (unsigned char *) CFG_BCSR;
-#endif
- /* reset Giga bit Ethernet port if needed here */
-
- /* reset the CPM FEC port */
-#if (CONFIG_ETHER_INDEX == 2)
- bcsr[0] &= ~0x20;
- udelay(2);
- bcsr[0] |= 0x20;
- udelay(1000);
-#elif (CONFIG_ETHER_INDEX == 3)
- bcsr[0] &= ~0x10;
- udelay(2);
- bcsr[0] |= 0x10;
- udelay(1000);
-#endif
-#if defined(CONFIG_MII) && defined(CONFIG_ETHER_ON_FCC)
- /* reset PHY */
- miiphy_reset("FCC1 ETHERNET", 0x0);
-
- /* change PHY address to 0x02 */
- bb_miiphy_write(NULL, 0, PHY_MIPSCR, 0xf028);
-
- bb_miiphy_write(NULL, 0x02, PHY_BMCR,
- PHY_BMCR_AUTON | PHY_BMCR_RST_NEG);
-#endif /* CONFIG_MII */
-}
-
-int checkboard (void)
-{
- sys_info_t sysinfo;
-
- get_sys_info (&sysinfo);
-
-#ifdef CONFIG_SBC8560
- printf ("Board: Wind River SBC8560 Board\n");
-#else
- printf ("Board: Wind River SBC8540 Board\n");
-#endif
- printf ("\tCPU: %lu MHz\n", sysinfo.freqProcessor / 1000000);
- printf ("\tCCB: %lu MHz\n", sysinfo.freqSystemBus / 1000000);
- printf ("\tDDR: %lu MHz\n", sysinfo.freqSystemBus / 2000000);
- if((CFG_LBC_LCRR & 0x0f) == 2 || (CFG_LBC_LCRR & 0x0f) == 4 \
- || (CFG_LBC_LCRR & 0x0f) == 8) {
- printf ("\tLBC: %lu MHz\n", sysinfo.freqSystemBus / 1000000 /(CFG_LBC_LCRR & 0x0f));
- } else {
- printf("\tLBC: unknown\n");
- }
- printf("\tCPM: %lu Mhz\n", sysinfo.freqSystemBus / 1000000);
- printf("L1 D-cache 32KB, L1 I-cache 32KB enabled.\n");
- return (0);
-}
-
-
-long int initdram (int board_type)
-{
- long dram_size = 0;
- extern long spd_sdram (void);
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
-#if 0
-#if !defined(CONFIG_RAM_AS_FLASH)
- volatile ccsr_lbc_t *lbc= &immap->im_lbc;
- sys_info_t sysinfo;
- uint temp_lbcdll = 0;
-#endif
-#endif /* 0 */
-#if !defined(CONFIG_RAM_AS_FLASH) || defined(CONFIG_DDR_DLL)
- volatile ccsr_gur_t *gur= &immap->im_gur;
-#endif
-#if defined(CONFIG_DDR_DLL)
- uint temp_ddrdll = 0;
-
- /* Work around to stabilize DDR DLL */
- temp_ddrdll = gur->ddrdllcr;
- gur->ddrdllcr = ((temp_ddrdll & 0xff) << 16) | 0x80000000;
- asm("sync;isync;msync");
-#endif
-
-#if defined(CONFIG_SPD_EEPROM)
- dram_size = spd_sdram ();
-#else
- dram_size = fixed_sdram ();
-#endif
-
-#if 0
-#if !defined(CONFIG_RAM_AS_FLASH) /* LocalBus SDRAM is not emulating flash */
- get_sys_info(&sysinfo);
- /* if localbus freq is less than 66Mhz,we use bypass mode,otherwise use DLL */
- if(sysinfo.freqSystemBus/(CFG_LBC_LCRR & 0x0f) < 66000000) {
- lbc->lcrr = (CFG_LBC_LCRR & 0x0fffffff)| 0x80000000;
- } else {
-#if defined(CONFIG_MPC85xx_REV1) /* need change CLKDIV before enable DLL */
- lbc->lcrr = 0x10000004; /* default CLKDIV is 8, change it to 4 temporarily */
-#endif
- lbc->lcrr = CFG_LBC_LCRR & 0x7fffffff;
- udelay(200);
- temp_lbcdll = gur->lbcdllcr;
- gur->lbcdllcr = ((temp_lbcdll & 0xff) << 16 ) | 0x80000000;
- asm("sync;isync;msync");
- }
- lbc->or2 = CFG_OR2_PRELIM; /* 64MB SDRAM */
- lbc->br2 = CFG_BR2_PRELIM;
- lbc->lbcr = CFG_LBC_LBCR;
- lbc->lsdmr = CFG_LBC_LSDMR_1;
- asm("sync");
- (unsigned int) * (ulong *)0 = 0x000000ff;
- lbc->lsdmr = CFG_LBC_LSDMR_2;
- asm("sync");
- (unsigned int) * (ulong *)0 = 0x000000ff;
- lbc->lsdmr = CFG_LBC_LSDMR_3;
- asm("sync");
- (unsigned int) * (ulong *)0 = 0x000000ff;
- lbc->lsdmr = CFG_LBC_LSDMR_4;
- asm("sync");
- (unsigned int) * (ulong *)0 = 0x000000ff;
- lbc->lsdmr = CFG_LBC_LSDMR_5;
- asm("sync");
- lbc->lsrt = CFG_LBC_LSRT;
- asm("sync");
- lbc->mrtpr = CFG_LBC_MRTPR;
- asm("sync");
-#endif
-#endif
-
-#if defined(CONFIG_DDR_ECC)
- {
- /* Initialize all of memory for ECC, then
- * enable errors */
- uint *p = 0;
- uint i = 0;
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile ccsr_ddr_t *ddr= &immap->im_ddr;
- dma_init();
- for (*p = 0; p < (uint *)(8 * 1024); p++) {
- if (((unsigned int)p & 0x1f) == 0) { dcbz(p); }
- *p = (unsigned int)0xdeadbeef;
- if (((unsigned int)p & 0x1c) == 0x1c) { dcbf(p); }
- }
-
- /* 8K */
- dma_xfer((uint *)0x2000,0x2000,(uint *)0);
- /* 16K */
- dma_xfer((uint *)0x4000,0x4000,(uint *)0);
- /* 32K */
- dma_xfer((uint *)0x8000,0x8000,(uint *)0);
- /* 64K */
- dma_xfer((uint *)0x10000,0x10000,(uint *)0);
- /* 128k */
- dma_xfer((uint *)0x20000,0x20000,(uint *)0);
- /* 256k */
- dma_xfer((uint *)0x40000,0x40000,(uint *)0);
- /* 512k */
- dma_xfer((uint *)0x80000,0x80000,(uint *)0);
- /* 1M */
- dma_xfer((uint *)0x100000,0x100000,(uint *)0);
- /* 2M */
- dma_xfer((uint *)0x200000,0x200000,(uint *)0);
- /* 4M */
- dma_xfer((uint *)0x400000,0x400000,(uint *)0);
-
- for (i = 1; i < dram_size / 0x800000; i++) {
- dma_xfer((uint *)(0x800000*i),0x800000,(uint *)0);
- }
-
- /* Enable errors for ECC */
- ddr->err_disable = 0x00000000;
- asm("sync;isync;msync");
- }
-#endif
-
- return dram_size;
-}
-
-
-#if defined(CFG_DRAM_TEST)
-int testdram (void)
-{
- uint *pstart = (uint *) CFG_MEMTEST_START;
- uint *pend = (uint *) CFG_MEMTEST_END;
- uint *p;
-
- printf("SDRAM test phase 1:\n");
- for (p = pstart; p < pend; p++)
- *p = 0xaaaaaaaa;
-
- for (p = pstart; p < pend; p++) {
- if (*p != 0xaaaaaaaa) {
- printf ("SDRAM test fails at: %08x\n", (uint) p);
- return 1;
- }
- }
-
- printf("SDRAM test phase 2:\n");
- for (p = pstart; p < pend; p++)
- *p = 0x55555555;
-
- for (p = pstart; p < pend; p++) {
- if (*p != 0x55555555) {
- printf ("SDRAM test fails at: %08x\n", (uint) p);
- return 1;
- }
- }
-
- printf("SDRAM test passed.\n");
- return 0;
-}
-#endif
-
-#if !defined(CONFIG_SPD_EEPROM)
-/*************************************************************************
- * fixed sdram init -- doesn't use serial presence detect.
- ************************************************************************/
-long int fixed_sdram (void)
-{
-
-#define CFG_DDR_CONTROL 0xc2000000
-
- #ifndef CFG_RAMBOOT
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile ccsr_ddr_t *ddr= &immap->im_ddr;
-
- ddr->cs0_bnds = 0x00000007;
- ddr->cs1_bnds = 0x0010001f;
- ddr->cs2_bnds = 0x00000000;
- ddr->cs3_bnds = 0x00000000;
- ddr->cs0_config = 0x80000102;
- ddr->cs1_config = 0x80000102;
- ddr->cs2_config = 0x00000000;
- ddr->cs3_config = 0x00000000;
- ddr->timing_cfg_1 = 0x37334321;
- ddr->timing_cfg_2 = 0x00000800;
- ddr->sdram_cfg = 0x42000000;
- ddr->sdram_mode = 0x00000022;
- ddr->sdram_interval = 0x05200100;
- ddr->err_sbe = 0x00ff0000;
- #if defined (CONFIG_DDR_ECC)
- ddr->err_disable = 0x0000000D;
- #endif
- asm("sync;isync;msync");
- udelay(500);
- #if defined (CONFIG_DDR_ECC)
- /* Enable ECC checking */
- ddr->sdram_cfg = (CFG_DDR_CONTROL | 0x20000000);
- #else
- ddr->sdram_cfg = CFG_DDR_CONTROL;
- #endif
- asm("sync; isync; msync");
- udelay(500);
- #endif
- return CFG_SDRAM_SIZE * 1024 * 1024;
-}
-#endif /* !defined(CONFIG_SPD_EEPROM) */
diff --git a/board/sbc8560/u-boot.lds b/board/sbc8560/u-boot.lds
deleted file mode 100644
index 48e19fe2a2..0000000000
--- a/board/sbc8560/u-boot.lds
+++ /dev/null
@@ -1,157 +0,0 @@
-/*
- * (C) Copyright 2002,2003,Motorola,Inc.
- * Xianghua Xiao, X.Xiao@motorola.com.
- *
- * (C) Copyright 2004 Wind River Systems Inc <www.windriver.com>.
- * Added support for Wind River SBC8560 board
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- .resetvec 0xFFFFFFFC :
- {
- *(.resetvec)
- } = 0xffff
-
- .bootpg 0xFFFFF000 :
- {
- cpu/mpc85xx/start.o (.bootpg)
- board/sbc8560/init.o (.bootpg)
- } = 0xffff
-
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc85xx/start.o (.text)
- board/sbc8560/init.o (.text)
- cpu/mpc85xx/commproc.o (.text)
- cpu/mpc85xx/traps.o (.text)
- cpu/mpc85xx/interrupts.o (.text)
- cpu/mpc85xx/serial_scc.o (.text)
- cpu/mpc85xx/ether_fcc.o (.text)
- cpu/mpc85xx/cpu_init.o (.text)
- cpu/mpc85xx/cpu.o (.text)
- cpu/mpc85xx/speed.o (.text)
- cpu/mpc85xx/i2c.o (.text)
- cpu/mpc85xx/spd_sdram.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/extable.o (.text)
- lib_generic/zlib.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/sc520_cdp/Makefile b/board/sc520_cdp/Makefile
deleted file mode 100644
index ab06ebc81a..0000000000
--- a/board/sc520_cdp/Makefile
+++ /dev/null
@@ -1,47 +0,0 @@
-#
-# (C) Copyright 2002
-# Daniel Engström, Omicron Ceti AB, daniel@omicron.se.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := sc520_cdp.o flash.o
-SOBJS := sc520_cdp_asm.o sc520_cdp_asm16.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS) $(SOBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/sc520_cdp/config.mk b/board/sc520_cdp/config.mk
deleted file mode 100644
index 2253815647..0000000000
--- a/board/sc520_cdp/config.mk
+++ /dev/null
@@ -1,25 +0,0 @@
-#
-# (C) Copyright 2002
-# Daniel Engström, Omicron Ceti AB, daniel@omicron.se.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-
-TEXT_BASE = 0x387c0000
diff --git a/board/sc520_cdp/flash.c b/board/sc520_cdp/flash.c
deleted file mode 100644
index d52a847c73..0000000000
--- a/board/sc520_cdp/flash.c
+++ /dev/null
@@ -1,637 +0,0 @@
-/*
- * (C) Copyright 2002, 2003
- * Daniel Engström, Omicron Ceti AB, daniel@omicron.se
- *
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Alex Zuepke <azu@sysgo.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/io.h>
-#include <pci.h>
-#include <asm/ic/sc520.h>
-
-#define PROBE_BUFFER_SIZE 1024
-static unsigned char buffer[PROBE_BUFFER_SIZE];
-
-#define SC520_MAX_FLASH_BANKS 3
-#define SC520_FLASH_BANK0_BASE 0x38000000 /* BOOTCS */
-#define SC520_FLASH_BANK1_BASE 0x30000000 /* ROMCS0 */
-#define SC520_FLASH_BANK2_BASE 0x28000000 /* ROMCS1 */
-#define SC520_FLASH_BANKSIZE 0x8000000
-
-#define AMD29LV016B_SIZE 0x200000
-#define AMD29LV016B_SECTORS 32
-
-flash_info_t flash_info[SC520_MAX_FLASH_BANKS];
-
-#define READY 1
-#define ERR 2
-#define TMO 4
-
-/*-----------------------------------------------------------------------
- */
-
-
-static u32 _probe_flash(u32 addr, u32 bw, int il)
-{
- u32 result=0;
-
- /* First do an unlock cycle for the benefit of
- * devices that need it */
-
- switch (bw) {
-
- case 1:
- *(volatile u8*)(addr+0x5555) = 0xaa;
- *(volatile u8*)(addr+0x2aaa) = 0x55;
- *(volatile u8*)(addr+0x5555) = 0x90;
-
- /* Read vendor */
- result = *(volatile u8*)addr;
- result <<= 16;
-
- /* Read device */
- result |= *(volatile u8*)(addr+2);
-
- /* Return device to data mode */
- *(volatile u8*)addr = 0xff;
- *(volatile u8*)(addr+0x5555), 0xf0;
- break;
-
- case 2:
- *(volatile u16*)(addr+0xaaaa) = 0xaaaa;
- *(volatile u16*)(addr+0x5554) = 0x5555;
-
- /* Issue identification command */
- if (il == 2) {
- *(volatile u16*)(addr+0xaaaa) = 0x9090;
-
- /* Read vendor */
- result = *(volatile u8*)addr;
- result <<= 16;
-
- /* Read device */
- result |= *(volatile u8*)(addr+2);
-
- /* Return device to data mode */
- *(volatile u16*)addr = 0xffff;
- *(volatile u16*)(addr+0xaaaa), 0xf0f0;
-
- } else {
- *(volatile u8*)(addr+0xaaaa) = 0x90;
- /* Read vendor */
- result = *(volatile u16*)addr;
- result <<= 16;
-
- /* Read device */
- result |= *(volatile u16*)(addr+2);
-
- /* Return device to data mode */
- *(volatile u8*)addr = 0xff;
- *(volatile u8*)(addr+0xaaaa), 0xf0;
- }
-
- break;
-
- case 4:
- *(volatile u32*)(addr+0x5554) = 0xaaaaaaaa;
- *(volatile u32*)(addr+0xaaa8) = 0x55555555;
-
- switch (il) {
- case 1:
- /* Issue identification command */
- *(volatile u8*)(addr+0x5554) = 0x90;
-
- /* Read vendor */
- result = *(volatile u16*)addr;
- result <<= 16;
-
- /* Read device */
- result |= *(volatile u16*)(addr+4);
-
- /* Return device to data mode */
- *(volatile u8*)addr = 0xff;
- *(volatile u8*)(addr+0x5554), 0xf0;
- break;
-
- case 2:
- /* Issue identification command */
- *(volatile u32*)(addr + 0x5554) = 0x00900090;
-
- /* Read vendor */
- result = *(volatile u16*)addr;
- result <<= 16;
-
- /* Read device */
- result |= *(volatile u16*)(addr+4);
-
- /* Return device to data mode */
- *(volatile u32*)addr = 0x00ff00ff;
- *(volatile u32*)(addr+0x5554), 0x00f000f0;
- break;
-
- case 4:
- /* Issue identification command */
- *(volatile u32*)(addr+0x5554) = 0x90909090;
-
- /* Read vendor */
- result = *(volatile u8*)addr;
- result <<= 16;
-
- /* Read device */
- result |= *(volatile u8*)(addr+4);
-
- /* Return device to data mode */
- *(volatile u32*)addr = 0xffffffff;
- *(volatile u32*)(addr+0x5554), 0xf0f0f0f0;
- break;
- }
- break;
- }
-
-
- return result;
-}
-
-extern int _probe_flash_end;
-asm ("_probe_flash_end:\n"
- ".long 0\n");
-
-static int identify_flash(unsigned address, int width)
-{
- int is;
- int device;
- int vendor;
- int size;
- unsigned res;
-
- u32 (*_probe_flash_ptr)(u32 a, u32 bw, int il);
-
- size = (unsigned)&_probe_flash_end - (unsigned)_probe_flash;
-
- if (size > PROBE_BUFFER_SIZE) {
- printf("_probe_flash() routine too large (%d) %p - %p\n",
- size, &_probe_flash_end, _probe_flash);
- return 0;
- }
-
- memcpy(buffer, _probe_flash, size);
- _probe_flash_ptr = (void*)buffer;
-
- is = disable_interrupts();
- res = _probe_flash_ptr(address, width, 1);
- if (is) {
- enable_interrupts();
- }
-
-
- vendor = res >> 16;
- device = res & 0xffff;
-
-
- return res;
-}
-
-ulong flash_init(void)
-{
- int i, j;
- ulong size = 0;
-
- for (i = 0; i < SC520_MAX_FLASH_BANKS; i++) {
- unsigned id;
- ulong flashbase = 0;
- int sectsize = 0;
-
- memset(flash_info[i].protect, 0, CFG_MAX_FLASH_SECT);
- switch (i) {
- case 0:
- flashbase = SC520_FLASH_BANK0_BASE;
- break;
- case 1:
- flashbase = SC520_FLASH_BANK1_BASE;
- break;
- case 2:
- flashbase = SC520_FLASH_BANK2_BASE;
- break;
- default:
- panic("configured too many flash banks!\n");
- }
-
- id = identify_flash(flashbase, 4);
- switch (id & 0x00ff00ff) {
- case 0x000100c8:
- /* 29LV016B/29LV017B */
- flash_info[i].flash_id =
- (AMD_MANUFACT & FLASH_VENDMASK) |
- (AMD_ID_LV016B & FLASH_TYPEMASK);
-
- flash_info[i].size = AMD29LV016B_SIZE*4;
- flash_info[i].sector_count = AMD29LV016B_SECTORS;
- sectsize = (AMD29LV016B_SIZE*4)/AMD29LV016B_SECTORS;
- printf("Bank %d: 4 x AMD 29LV017B\n", i);
- break;
-
-
- default:
- printf("Bank %d have unknown flash %08x\n", i, id);
- flash_info[i].flash_id = FLASH_UNKNOWN;
- continue;
- }
-
- for (j = 0; j < flash_info[i].sector_count; j++) {
- flash_info[i].start[j] = flashbase + j * sectsize;
- }
- size += flash_info[i].size;
-
- flash_protect(FLAG_PROTECT_CLEAR,
- flash_info[i].start[0],
- flash_info[i].start[0] + flash_info[i].size - 1,
- &flash_info[i]);
- }
-
- /*
- * Protect monitor and environment sectors
- */
- flash_protect(FLAG_PROTECT_SET,
- i386boot_start,
- i386boot_end,
- &flash_info[0]);
-#ifdef CFG_ENV_ADDR
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1,
- &flash_info[0]);
-#endif
- return size;
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info(flash_info_t *info)
-{
- int i;
-
- switch (info->flash_id & FLASH_VENDMASK) {
-
- case (AMD_MANUFACT & FLASH_VENDMASK):
- printf("AMD: ");
- switch (info->flash_id & FLASH_TYPEMASK) {
- case (AMD_ID_LV016B & FLASH_TYPEMASK):
- printf("4x AMD29LV017B (4x16Mbit)\n");
- break;
- default:
- printf("Unknown Chip Type\n");
- goto done;
- break;
- }
-
- break;
- default:
- printf("Unknown Vendor ");
- break;
- }
-
-
- printf(" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf(" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; i++) {
- if ((i % 5) == 0) {
- printf ("\n ");
- }
- printf (" %08lX%s", info->start[i],
- info->protect[i] ? " (RO)" : " ");
- }
- printf ("\n");
-
-done: ;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-/* this needs to be inlined, the SWTMRMMILLI register is reset by each read */
-#define __udelay(delay) \
-{ \
- unsigned micro; \
- unsigned milli=0; \
- \
- micro = *(volatile u16*)(0xfffef000+SC520_SWTMRMILLI); \
- \
- for (;;) { \
- \
- milli += *(volatile u16*)(0xfffef000+SC520_SWTMRMILLI); \
- micro = *(volatile u16*)(0xfffef000+SC520_SWTMRMICRO); \
- \
- if ((delay) <= (micro + (milli * 1000))) { \
- break; \
- } \
- } \
-} while (0)
-
-static u32 _amd_erase_flash(u32 addr, u32 sector)
-{
- unsigned elapsed;
-
- /* Issue erase */
- *(volatile u32*)(addr + 0x5554) = 0xAAAAAAAA;
- *(volatile u32*)(addr + 0xaaa8) = 0x55555555;
- *(volatile u32*)(addr + 0x5554) = 0x80808080;
- /* And one unlock */
- *(volatile u32*)(addr + 0x5554) = 0xAAAAAAAA;
- *(volatile u32*)(addr + 0xaaa8) = 0x55555555;
- /* Sector erase command comes last */
- *(volatile u32*)(addr + sector) = 0x30303030;
-
- elapsed = *(volatile u16*)(0xfffef000+SC520_SWTMRMILLI); /* dummy read */
- elapsed = 0;
- __udelay(50);
- while (((*(volatile u32*)(addr + sector)) & 0x80808080) != 0x80808080) {
-
- elapsed += *(volatile u16*)(0xfffef000+SC520_SWTMRMILLI);
- if (elapsed > ((CFG_FLASH_ERASE_TOUT/CFG_HZ) * 1000)) {
- *(volatile u32*)(addr) = 0xf0f0f0f0;
- return 1;
- }
- }
-
- *(volatile u32*)(addr) = 0xf0f0f0f0;
-
- return 0;
-}
-
-extern int _amd_erase_flash_end;
-asm ("_amd_erase_flash_end:\n"
- ".long 0\n");
-
-int flash_erase(flash_info_t *info, int s_first, int s_last)
-{
- u32 (*_erase_flash_ptr)(u32 a, u32 so);
- int prot;
- int sect;
- unsigned size;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf("- missing\n");
- } else {
- printf("- no sectors to erase\n");
- }
- return 1;
- }
-
- if ((info->flash_id & FLASH_VENDMASK) == (AMD_MANUFACT & FLASH_VENDMASK)) {
- size = (unsigned)&_amd_erase_flash_end - (unsigned)_amd_erase_flash;
-
- if (size > PROBE_BUFFER_SIZE) {
- printf("_amd_erase_flash() routine too large (%d) %p - %p\n",
- size, &_amd_erase_flash_end, _amd_erase_flash);
- return 0;
- }
-
- memcpy(buffer, _amd_erase_flash, size);
- _erase_flash_ptr = (void*)buffer;
-
- } else {
- printf ("Can't erase unknown flash type - aborted\n");
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n", prot);
- } else {
- printf ("\n");
- }
-
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
-
- if (info->protect[sect] == 0) { /* not protected */
- int res;
- int flag;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- res = _erase_flash_ptr(info->start[0], info->start[sect]-info->start[0]);
-
- /* re-enable interrupts if necessary */
- if (flag) {
- enable_interrupts();
- }
-
-
- if (res) {
- printf("Erase timed out, sector %d\n", sect);
- return res;
- }
-
- putc('.');
- }
- }
-
-
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int _amd_write_word(unsigned start, unsigned dest, unsigned data)
-{
- volatile u32 *addr2 = (u32*)start;
- volatile u32 *dest2 = (u32*)dest;
- volatile u32 *data2 = (u32*)&data;
- unsigned elapsed;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*((volatile u32*)dest) & (u32)data) != (u32)data) {
- return 2;
- }
-
- addr2[0x5554] = 0xAAAAAAAA;
- addr2[0xaaa8] = 0x55555555;
- addr2[0x5554] = 0xA0A0A0A0;
-
- dest2[0] = data;
-
- elapsed = *(volatile u16*)(0xfffef000+SC520_SWTMRMILLI); /* dummy read */
- elapsed = 0;
-
- /* data polling for D7 */
- while ((dest2[0] & 0x80808080) != (data2[0] & 0x80808080)) {
- elapsed += *(volatile u16*)(0xfffef000+SC520_SWTMRMILLI);
- if (elapsed > ((CFG_FLASH_WRITE_TOUT/CFG_HZ) * 1000)) {
- addr2[0] = 0xf0f0f0f0;
- return 1;
- }
- }
-
-
- addr2[0] = 0xf0f0f0f0;
-
- return 0;
-}
-
-extern int _amd_write_word_end;
-asm ("_amd_write_word_end:\n"
- ".long 0\n");
-
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- * 3 - Unsupported flash type
- */
-
-int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int i, l, rc;
- int flag;
- u32 (*_write_word_ptr)(unsigned start, unsigned dest, unsigned data);
- unsigned size;
-
- if ((info->flash_id & FLASH_VENDMASK) == (AMD_MANUFACT & FLASH_VENDMASK)) {
- size = (unsigned)&_amd_write_word_end - (unsigned)_amd_write_word;
-
- if (size > PROBE_BUFFER_SIZE) {
- printf("_amd_write_word() routine too large (%d) %p - %p\n",
- size, &_amd_write_word_end, _amd_write_word);
- return 0;
- }
-
- memcpy(buffer, _amd_write_word, size);
- _write_word_ptr = (void*)buffer;
-
- } else {
- printf ("Can't program unknown flash type - aborted\n");
- return 3;
- }
-
-
- wp = (addr & ~3); /* get lower word aligned address */
-
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data |= (*(uchar *)cp) << (8*i);
- }
- for (; i<4 && cnt>0; ++i) {
- data |= *src++ << (8*i);
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<4; ++i, ++cp) {
- data |= (*(uchar *)cp) << (8*i);
- }
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- rc = _write_word_ptr(info->start[0], wp, data);
-
- /* re-enable interrupts if necessary */
- if (flag) {
- enable_interrupts();
- }
- if (rc != 0) {
- return rc;
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = 0;
-
- for (i=0; i<4; ++i) {
- data |= *src++ << (8*i);
- }
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- rc = _write_word_ptr(info->start[0], wp, data);
-
- /* re-enable interrupts if necessary */
- if (flag) {
- enable_interrupts();
- }
- if (rc != 0) {
- return rc;
- }
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return 0;
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
- data |= *src++ << (8*i);
- --cnt;
- }
-
- for (; i<4; ++i, ++cp) {
- data |= (*(uchar *)cp) << (8*i);
- }
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- rc = _write_word_ptr(info->start[0], wp, data);
-
- /* re-enable interrupts if necessary */
- if (flag) {
- enable_interrupts();
- }
-
- return rc;
-
-}
diff --git a/board/sc520_cdp/flash_old.c b/board/sc520_cdp/flash_old.c
deleted file mode 100644
index 3c0f6d6a68..0000000000
--- a/board/sc520_cdp/flash_old.c
+++ /dev/null
@@ -1,458 +0,0 @@
-/*
- * (C) Copyright 2002
- * Daniel Engström, Omicron Ceti AB, daniel@omicron.se
- *
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Alex Zuepke <azu@sysgo.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/io.h>
-
-ulong myflush(void);
-
-
-#define SC520_MAX_FLASH_BANKS 3
-#define SC520_FLASH_BANK0_BASE 0x38000000 /* BOOTCS */
-#define SC520_FLASH_BANK1_BASE 0x30000000 /* ROMCS0 */
-#define SC520_FLASH_BANK2_BASE 0x28000000 /* ROMCS1 */
-#define SC520_FLASH_BANKSIZE 0x8000000
-
-#define AMD29LV016_SIZE 0x200000
-#define AMD29LV016_SECTORS 32
-
-flash_info_t flash_info[SC520_MAX_FLASH_BANKS];
-
-#define CMD_READ_ARRAY 0x00F000F0
-#define CMD_UNLOCK1 0x00AA00AA
-#define CMD_UNLOCK2 0x00550055
-#define CMD_ERASE_SETUP 0x00800080
-#define CMD_ERASE_CONFIRM 0x00300030
-#define CMD_PROGRAM 0x00A000A0
-#define CMD_UNLOCK_BYPASS 0x00200020
-
-
-#define BIT_ERASE_DONE 0x00800080
-#define BIT_RDY_MASK 0x00800080
-#define BIT_PROGRAM_ERROR 0x00200020
-#define BIT_TIMEOUT 0x80000000 /* our flag */
-
-#define READY 1
-#define ERR 2
-#define TMO 4
-
-/*-----------------------------------------------------------------------
- */
-
-ulong flash_init(void)
-{
- int i, j;
- ulong size = 0;
-
- for (i = 0; i < SC520_MAX_FLASH_BANKS; i++) {
- ulong flashbase = 0;
- int sectsize = 0;
- if (i==0 || i==2) {
- /* FixMe: this assumes that bank 0 and 2
- * are mapped to the two 8Mb banks */
- flash_info[i].flash_id =
- (AMD_MANUFACT & FLASH_VENDMASK) |
- (AMD_ID_LV016B & FLASH_TYPEMASK);
-
- flash_info[i].size = AMD29LV016_SIZE*4;
- flash_info[i].sector_count = AMD29LV016_SECTORS;
- sectsize = (AMD29LV016_SIZE*4)/AMD29LV016_SECTORS;
- } else {
- /* FixMe: this assumes that bank1 is unmapped
- * (or mapped to the same flash bank as BOOTCS) */
- flash_info[i].flash_id = 0;
- flash_info[i].size = 0;
- flash_info[i].sector_count = 0;
- sectsize=0;
- }
- memset(flash_info[i].protect, 0, CFG_MAX_FLASH_SECT);
- switch (i) {
- case 0:
- flashbase = SC520_FLASH_BANK0_BASE;
- break;
- case 1:
- flashbase = SC520_FLASH_BANK1_BASE;
- break;
- case 2:
- flashbase = SC520_FLASH_BANK0_BASE;
- break;
- default:
- panic("configured too many flash banks!\n");
- }
-
- for (j = 0; j < flash_info[i].sector_count; j++) {
- flash_info[i].start[j] = sectsize;
- flash_info[i].start[j] = flashbase + j * sectsize;
- }
- size += flash_info[i].size;
- }
-
- /*
- * Protect monitor and environment sectors
- */
- flash_protect(FLAG_PROTECT_SET,
- i386boot_start-SC520_FLASH_BANK0_BASE,
- i386boot_end-SC520_FLASH_BANK0_BASE,
- &flash_info[0]);
-
-#ifdef CFG_ENV_ADDR
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1,
- &flash_info[0]);
-#endif
- return size;
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info(flash_info_t *info)
-{
- int i;
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case (AMD_MANUFACT & FLASH_VENDMASK):
- printf("AMD: ");
- break;
- default:
- printf("Unknown Vendor ");
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case (AMD_ID_LV016B & FLASH_TYPEMASK):
- printf("4x Amd29LV016B (16Mbit)\n");
- break;
- default:
- printf("Unknown Chip Type\n");
- goto done;
- break;
- }
-
- printf(" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf(" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; i++) {
- if ((i % 5) == 0) {
- printf ("\n ");
- }
- printf (" %08lX%s", info->start[i],
- info->protect[i] ? " (RO)" : " ");
- }
- printf ("\n");
-
- done:
-}
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase(flash_info_t *info, int s_first, int s_last)
-{
- ulong result;
- int iflag, prot, sect;
- int rc = ERR_OK;
- int chip1, chip2;
-
- /* first look for protection bits */
-
- if (info->flash_id == FLASH_UNKNOWN) {
- return ERR_UNKNOWN_FLASH_TYPE;
- }
-
- if ((s_first < 0) || (s_first > s_last)) {
- return ERR_INVAL;
- }
-
- if ((info->flash_id & FLASH_VENDMASK) !=
- (AMD_MANUFACT & FLASH_VENDMASK)) {
- return ERR_UNKNOWN_FLASH_VENDOR;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
- if (prot) {
- return ERR_PROTECTED;
- }
-
- /*
- * Disable interrupts which might cause a timeout
- * here. Remember that our exception vectors are
- * at address 0 in the flash, and we don't want a
- * (ticker) exception to happen while the flash
- * chip is in programming mode.
- */
- iflag = disable_interrupts();
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last && !ctrlc(); sect++) {
- printf("Erasing sector %2d ... ", sect);
-
- /* arm simple, non interrupt dependent timer */
- reset_timer();
-
- if (info->protect[sect] == 0) {
- /* not protected */
- ulong addr = info->start[sect];
-
- writel(CMD_UNLOCK1, addr + 1);
- writel(CMD_UNLOCK2, addr + 2);
- writel(CMD_ERASE_SETUP, addr + 1);
-
- writel(CMD_UNLOCK1, addr + 1);
- writel(CMD_UNLOCK2, addr + 2);
- writel(CMD_ERASE_CONFIRM, addr);
-
-
- /* wait until flash is ready */
- chip1 = chip2 = 0;
-
- do {
- result = readl(addr);
-
- /* check timeout */
- if (get_timer(0) > CFG_FLASH_ERASE_TOUT) {
- writel(CMD_READ_ARRAY, addr + 1);
- chip1 = TMO;
- break;
- }
-
- if (!chip1 && (result & 0xFFFF) & BIT_ERASE_DONE) {
- chip1 = READY;
- }
-
- if (!chip1 && (result & 0xFFFF) & BIT_PROGRAM_ERROR) {
- chip1 = ERR;
- }
-
- if (!chip2 && (result >> 16) & BIT_ERASE_DONE) {
- chip2 = READY;
- }
-
- if (!chip2 && (result >> 16) & BIT_PROGRAM_ERROR) {
- chip2 = ERR;
- }
-
- } while (!chip1 || !chip2);
-
- writel(CMD_READ_ARRAY, addr + 1);
-
- if (chip1 == ERR || chip2 == ERR) {
- rc = ERR_PROG_ERROR;
- goto outahere;
- }
-
- if (chip1 == TMO) {
- rc = ERR_TIMOUT;
- goto outahere;
- }
-
- printf("ok.\n");
- } else { /* it was protected */
-
- printf("protected!\n");
- }
- }
-
- if (ctrlc()) {
- printf("User Interrupt!\n");
- }
-
-outahere:
- /* allow flash to settle - wait 10 ms */
- udelay(10000);
-
- if (iflag) {
- enable_interrupts();
- }
-
- return rc;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash
- */
-
-volatile static int write_word(flash_info_t *info, ulong dest, ulong data)
-{
- ulong addr = dest;
- ulong result;
- int rc = ERR_OK;
- int iflag;
- int chip1, chip2;
-
- /*
- * Check if Flash is (sufficiently) erased
- */
- result = readl(addr);
- if ((result & data) != data) {
- return ERR_NOT_ERASED;
- }
-
- /*
- * Disable interrupts which might cause a timeout
- * here. Remember that our exception vectors are
- * at address 0 in the flash, and we don't want a
- * (ticker) exception to happen while the flash
- * chip is in programming mode.
- */
- iflag = disable_interrupts();
-
- writel(CMD_UNLOCK1, addr + 1);
- writel(CMD_UNLOCK2, addr + 2);
- writel(CMD_UNLOCK_BYPASS, addr + 1);
- writel(addr, CMD_PROGRAM);
- writel(addr, data);
-
- /* arm simple, non interrupt dependent timer */
- reset_timer();
-
- /* wait until flash is ready */
- chip1 = chip2 = 0;
- do {
- result = readl(addr);
-
- /* check timeout */
- if (get_timer(0) > CFG_FLASH_ERASE_TOUT) {
- chip1 = ERR | TMO;
- break;
- }
-
- if (!chip1 && ((result & 0x80) == (data & 0x80))) {
- chip1 = READY;
- }
-
- if (!chip1 && ((result & 0xFFFF) & BIT_PROGRAM_ERROR)) {
- result = readl(addr);
-
- if ((result & 0x80) == (data & 0x80)) {
- chip1 = READY;
- } else {
- chip1 = ERR;
- }
- }
-
- if (!chip2 && ((result & (0x80 << 16)) == (data & (0x80 << 16)))) {
- chip2 = READY;
- }
-
- if (!chip2 && ((result >> 16) & BIT_PROGRAM_ERROR)) {
- result = readl(addr);
-
- if ((result & (0x80 << 16)) == (data & (0x80 << 16))) {
- chip2 = READY;
- } else {
- chip2 = ERR;
- }
- }
-
- } while (!chip1 || !chip2);
-
- writel(CMD_READ_ARRAY, addr);
-
- if (chip1 == ERR || chip2 == ERR || readl(addr) != data) {
- rc = ERR_PROG_ERROR;
- }
-
- if (iflag) {
- enable_interrupts();
- }
-
- return rc;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash.
- */
-
-int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int l;
- int i, rc;
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data >> 8) | (*(uchar *)cp << 24);
- }
- for (; i<4 && cnt>0; ++i) {
- data = (data >> 8) | (*src++ << 24);
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<4; ++i, ++cp) {
- data = (data >> 8) | (*(uchar *)cp << 24);
- }
-
- if ((rc = write_word(info, wp, data)) != 0) {
- return rc;
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = *((vu_long*)src);
- if ((rc = write_word(info, wp, data)) != 0) {
- return rc;
- }
- src += 4;
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return ERR_OK;
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
- data = (data >> 8) | (*src++ << 24);
- --cnt;
- }
- for (; i<4; ++i, ++cp) {
- data = (data >> 8) | (*(uchar *)cp << 24);
- }
-
- return write_word(info, wp, data);
-}
diff --git a/board/sc520_cdp/sc520_cdp.c b/board/sc520_cdp/sc520_cdp.c
deleted file mode 100644
index cd52324826..0000000000
--- a/board/sc520_cdp/sc520_cdp.c
+++ /dev/null
@@ -1,630 +0,0 @@
-/*
- *
- * (C) Copyright 2002
- * Daniel Engström, Omicron Ceti AB <daniel@omicron.se>.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <pci.h>
-#include <asm/io.h>
-#include <asm/pci.h>
-#include <asm/ic/sc520.h>
-#include <asm/ic/ali512x.h>
-#include <spi.h>
-
-#undef SC520_CDP_DEBUG
-
-#ifdef SC520_CDP_DEBUG
-#define PRINTF(fmt,args...) printf (fmt ,##args)
-#else
-#define PRINTF(fmt,args...)
-#endif
-
-/* ------------------------------------------------------------------------- */
-
-
-/*
- * Theory:
- * We first set up all IRQs to be non-pci, edge triggered,
- * when we later enumerate the pci bus and pci_sc520_fixup_irq() gets
- * called we reallocate irqs to the pci bus with sc520_pci_set_irq()
- * as needed. Whe choose the irqs to gram from a configurable list
- * inside pci_sc520_fixup_irq() (If this list contains stupid irq's
- * such as 0 thngas will not work)
- */
-
-static void irq_init(void)
-{
- /* disable global interrupt mode */
- write_mmcr_byte(SC520_PICICR, 0x40);
-
- /* set all irqs to edge */
- write_mmcr_byte(SC520_MPICMODE, 0x00);
- write_mmcr_byte(SC520_SL1PICMODE, 0x00);
- write_mmcr_byte(SC520_SL2PICMODE, 0x00);
-
- /* active low polarity on PIC interrupt pins,
- * active high polarity on all other irq pins */
- write_mmcr_word(SC520_INTPINPOL, 0x0000);
-
- /* set irq number mapping */
- write_mmcr_byte(SC520_GPTMR0MAP, SC520_IRQ_DISABLED); /* disable GP timer 0 INT */
- write_mmcr_byte(SC520_GPTMR1MAP, SC520_IRQ_DISABLED); /* disable GP timer 1 INT */
- write_mmcr_byte(SC520_GPTMR2MAP, SC520_IRQ_DISABLED); /* disable GP timer 2 INT */
- write_mmcr_byte(SC520_PIT0MAP, SC520_IRQ0); /* Set PIT timer 0 INT to IRQ0 */
- write_mmcr_byte(SC520_PIT1MAP, SC520_IRQ_DISABLED); /* disable PIT timer 1 INT */
- write_mmcr_byte(SC520_PIT2MAP, SC520_IRQ_DISABLED); /* disable PIT timer 2 INT */
- write_mmcr_byte(SC520_PCIINTAMAP, SC520_IRQ_DISABLED); /* disable PCI INT A */
- write_mmcr_byte(SC520_PCIINTBMAP, SC520_IRQ_DISABLED); /* disable PCI INT B */
- write_mmcr_byte(SC520_PCIINTCMAP, SC520_IRQ_DISABLED); /* disable PCI INT C */
- write_mmcr_byte(SC520_PCIINTDMAP, SC520_IRQ_DISABLED); /* disable PCI INT D */
- write_mmcr_byte(SC520_DMABCINTMAP, SC520_IRQ_DISABLED); /* disable DMA INT */
- write_mmcr_byte(SC520_SSIMAP, SC520_IRQ_DISABLED); /* disable Synchronius serial INT */
- write_mmcr_byte(SC520_WDTMAP, SC520_IRQ_DISABLED); /* disable Watchdog INT */
- write_mmcr_byte(SC520_RTCMAP, SC520_IRQ8); /* Set RTC int to 8 */
- write_mmcr_byte(SC520_WPVMAP, SC520_IRQ_DISABLED); /* disable write protect INT */
- write_mmcr_byte(SC520_ICEMAP, SC520_IRQ1); /* Set ICE Debug Serielport INT to IRQ1 */
- write_mmcr_byte(SC520_FERRMAP,SC520_IRQ13); /* Set FP error INT to IRQ13 */
-
- if (CFG_USE_SIO_UART) {
- write_mmcr_byte(SC520_UART1MAP, SC520_IRQ_DISABLED); /* disable internal UART1 INT */
- write_mmcr_byte(SC520_UART2MAP, SC520_IRQ_DISABLED); /* disable internal UART2 INT */
- write_mmcr_byte(SC520_GP3IMAP, SC520_IRQ3); /* Set GPIRQ3 (ISA IRQ3) to IRQ3 */
- write_mmcr_byte(SC520_GP4IMAP, SC520_IRQ4); /* Set GPIRQ4 (ISA IRQ4) to IRQ4 */
- } else {
- write_mmcr_byte(SC520_UART1MAP, SC520_IRQ4); /* Set internal UART2 INT to IRQ4 */
- write_mmcr_byte(SC520_UART2MAP, SC520_IRQ3); /* Set internal UART2 INT to IRQ3 */
- write_mmcr_byte(SC520_GP3IMAP, SC520_IRQ_DISABLED); /* disable GPIRQ3 (ISA IRQ3) */
- write_mmcr_byte(SC520_GP4IMAP, SC520_IRQ_DISABLED); /* disable GPIRQ4 (ISA IRQ4) */
- }
-
- write_mmcr_byte(SC520_GP1IMAP, SC520_IRQ1); /* Set GPIRQ1 (SIO IRQ1) to IRQ1 */
- write_mmcr_byte(SC520_GP5IMAP, SC520_IRQ5); /* Set GPIRQ5 (ISA IRQ5) to IRQ5 */
- write_mmcr_byte(SC520_GP6IMAP, SC520_IRQ6); /* Set GPIRQ6 (ISA IRQ6) to IRQ6 */
- write_mmcr_byte(SC520_GP7IMAP, SC520_IRQ7); /* Set GPIRQ7 (ISA IRQ7) to IRQ7 */
- write_mmcr_byte(SC520_GP8IMAP, SC520_IRQ8); /* Set GPIRQ8 (SIO IRQ8) to IRQ8 */
- write_mmcr_byte(SC520_GP9IMAP, SC520_IRQ9); /* Set GPIRQ9 (ISA IRQ2) to IRQ9 */
- write_mmcr_byte(SC520_GP0IMAP, SC520_IRQ11); /* Set GPIRQ0 (ISA IRQ11) to IRQ10 */
- write_mmcr_byte(SC520_GP2IMAP, SC520_IRQ12); /* Set GPIRQ2 (ISA IRQ12) to IRQ12 */
- write_mmcr_byte(SC520_GP10IMAP,SC520_IRQ14); /* Set GPIRQ10 (ISA IRQ14) to IRQ14 */
-
- write_mmcr_word(SC520_PCIHOSTMAP, 0x11f); /* Map PCI hostbridge INT to NMI */
- write_mmcr_word(SC520_ECCMAP, 0x100); /* Map SDRAM ECC failure INT to NMI */
-
-}
-
-
-/* PCI stuff */
-static void pci_sc520_cdp_fixup_irq(struct pci_controller *hose, pci_dev_t dev)
-{
- /* a configurable lists of irqs to steal
- * when we need one (a board with more pci interrupt pins
- * would use a larger table */
- static int irq_list[] = {
- CFG_FIRST_PCI_IRQ,
- CFG_SECOND_PCI_IRQ,
- CFG_THIRD_PCI_IRQ,
- CFG_FORTH_PCI_IRQ
- };
- static int next_irq_index=0;
-
- char tmp_pin;
- int pin;
-
- pci_hose_read_config_byte(hose, dev, PCI_INTERRUPT_PIN, &tmp_pin);
- pin = tmp_pin;
-
- pin-=1; /* pci config space use 1-based numbering */
- if (-1 == pin) {
- return; /* device use no irq */
- }
-
-
- /* map device number + pin to a pin on the sc520 */
- switch (PCI_DEV(dev)) {
- case 20:
- pin+=SC520_PCI_INTA;
- break;
-
- case 19:
- pin+=SC520_PCI_INTB;
- break;
-
- case 18:
- pin+=SC520_PCI_INTC;
- break;
-
- case 17:
- pin+=SC520_PCI_INTD;
- break;
-
- default:
- return;
- }
-
- pin&=3; /* wrap around */
-
- if (sc520_pci_ints[pin] == -1) {
- /* re-route one interrupt for us */
- if (next_irq_index > 3) {
- return;
- }
- if (pci_sc520_set_irq(pin, irq_list[next_irq_index])) {
- return;
- }
- next_irq_index++;
- }
-
-
- if (-1 != sc520_pci_ints[pin]) {
- pci_hose_write_config_byte(hose, dev, PCI_INTERRUPT_LINE,
- sc520_pci_ints[pin]);
- }
- PRINTF("fixup_irq: device %d pin %c irq %d\n",
- PCI_DEV(dev), 'A' + pin, sc520_pci_ints[pin]);
-}
-
-static struct pci_controller sc520_cdp_hose = {
- fixup_irq: pci_sc520_cdp_fixup_irq,
-};
-
-void pci_init_board(void)
-{
- pci_sc520_init(&sc520_cdp_hose);
-}
-
-
-static void silence_uart(int port)
-{
- outb(0, port+1);
-}
-
-void setup_ali_sio(int uart_primary)
-{
- ali512x_init();
-
- ali512x_set_fdc(ALI_ENABLED, 0x3f2, 6, 0);
- ali512x_set_pp(ALI_ENABLED, 0x278, 7, 3);
- ali512x_set_uart(ALI_ENABLED, ALI_UART1, uart_primary?0x3f8:0x3e8, 4);
- ali512x_set_uart(ALI_ENABLED, ALI_UART2, uart_primary?0x2f8:0x2e8, 3);
- ali512x_set_rtc(ALI_DISABLED, 0, 0);
- ali512x_set_kbc(ALI_ENABLED, 1, 12);
- ali512x_set_cio(ALI_ENABLED);
-
- /* IrDa pins */
- ali512x_cio_function(12, 1, 0, 0);
- ali512x_cio_function(13, 1, 0, 0);
-
- /* SSI chip select pins */
- ali512x_cio_function(14, 0, 0, 0); /* SSI_CS */
- ali512x_cio_function(15, 0, 0, 0); /* SSI_MV */
- ali512x_cio_function(16, 0, 0, 0); /* SSI_SPI# */
-
- /* Board REV pins */
- ali512x_cio_function(20, 0, 0, 1);
- ali512x_cio_function(21, 0, 0, 1);
- ali512x_cio_function(22, 0, 0, 1);
- ali512x_cio_function(23, 0, 0, 1);
-}
-
-
-/* set up the ISA bus timing and system address mappings */
-static void bus_init(void)
-{
-
- /* set up the GP IO pins */
- write_mmcr_word(SC520_PIOPFS31_16, 0xf7ff); /* set the GPIO pin function 31-16 reg */
- write_mmcr_word(SC520_PIOPFS15_0, 0xffff); /* set the GPIO pin function 15-0 reg */
- write_mmcr_byte(SC520_CSPFS, 0xf8); /* set the CS pin function reg */
- write_mmcr_byte(SC520_CLKSEL, 0x70);
-
-
- write_mmcr_byte(SC520_GPCSRT, 1); /* set the GP CS offset */
- write_mmcr_byte(SC520_GPCSPW, 3); /* set the GP CS pulse width */
- write_mmcr_byte(SC520_GPCSOFF, 1); /* set the GP CS offset */
- write_mmcr_byte(SC520_GPRDW, 3); /* set the RD pulse width */
- write_mmcr_byte(SC520_GPRDOFF, 1); /* set the GP RD offset */
- write_mmcr_byte(SC520_GPWRW, 3); /* set the GP WR pulse width */
- write_mmcr_byte(SC520_GPWROFF, 1); /* set the GP WR offset */
-
- write_mmcr_word(SC520_BOOTCSCTL, 0x1823); /* set up timing of BOOTCS */
- write_mmcr_word(SC520_ROMCS1CTL, 0x1823); /* set up timing of ROMCS1 */
- write_mmcr_word(SC520_ROMCS2CTL, 0x1823); /* set up timing of ROMCS2 */
-
- /* adjust the memory map:
- * by default the first 256MB (0x00000000 - 0x0fffffff) is mapped to SDRAM
- * and 256MB to 1G-128k (0x1000000 - 0x37ffffff) is mapped to PCI mmio
- * we need to map 1G-128k - 1G (0x38000000 - 0x3fffffff) to CS1 */
-
-
- /* SRAM = GPCS3 128k @ d0000-effff*/
- write_mmcr_long(SC520_PAR2, 0x4e00400d);
-
- /* IDE0 = GPCS6 1f0-1f7 */
- write_mmcr_long(SC520_PAR3, 0x380801f0);
-
- /* IDE1 = GPCS7 3f6 */
- write_mmcr_long(SC520_PAR4, 0x3c0003f6);
- /* bootcs */
- write_mmcr_long(SC520_PAR12, 0x8bffe800);
- /* romcs2 */
- write_mmcr_long(SC520_PAR13, 0xcbfff000);
- /* romcs1 */
- write_mmcr_long(SC520_PAR14, 0xabfff800);
- /* 680 LEDS */
- write_mmcr_long(SC520_PAR15, 0x30000640);
-
- write_mmcr_byte(SC520_ADDDECCTL, 0);
-
- asm ("wbinvd\n"); /* Flush cache, req. after setting the unchached attribute ona PAR */
-
- if (CFG_USE_SIO_UART) {
- write_mmcr_byte(SC520_ADDDECCTL, read_mmcr_byte(SC520_ADDDECCTL) | UART2_DIS|UART1_DIS);
- setup_ali_sio(1);
- } else {
- write_mmcr_byte(SC520_ADDDECCTL, read_mmcr_byte(SC520_ADDDECCTL) & ~(UART2_DIS|UART1_DIS));
- setup_ali_sio(0);
- silence_uart(0x3e8);
- silence_uart(0x2e8);
- }
-
-}
-
-/* GPCS usage
- * GPCS0 PIO27 (NMI)
- * GPCS1 ROMCS1
- * GPCS2 ROMCS2
- * GPCS3 SRAMCS PAR2
- * GPCS4 unused PAR3
- * GPCS5 unused PAR4
- * GPCS6 IDE
- * GPCS7 IDE
- */
-
-
-/* par usage:
- * PAR0 legacy_video
- * PAR1 PCI ROM mapping
- * PAR2 SRAM
- * PAR3 IDE
- * PAR4 IDE
- * PAR5 legacy_video
- * PAR6 legacy_video
- * PAR7 legacy_video
- * PAR8 legacy_video
- * PAR9 legacy_video
- * PAR10 legacy_video
- * PAR11 ISAROM
- * PAR12 BOOTCS
- * PAR13 ROMCS1
- * PAR14 ROMCS2
- * PAR15 Port 0x680 LED display
- */
-
-/*
- * This function should map a chunk of size bytes
- * of the system address space to the ISA bus
- *
- * The function will return the memory address
- * as seen by the host (which may very will be the
- * same as the bus address)
- */
-u32 isa_map_rom(u32 bus_addr, int size)
-{
- u32 par;
-
- PRINTF("isa_map_rom asked to map %d bytes at %x\n",
- size, bus_addr);
-
- par = size;
- if (par < 0x80000) {
- par = 0x80000;
- }
- par >>= 12;
- par--;
- par&=0x7f;
- par <<= 18;
- par |= (bus_addr>>12);
- par |= 0x50000000;
-
- PRINTF ("setting PAR11 to %x\n", par);
-
- /* Map rom 0x10000 with PAR1 */
- write_mmcr_long(SC520_PAR11, par);
-
- return bus_addr;
-}
-
-/*
- * this function removed any mapping created
- * with pci_get_rom_window()
- */
-void isa_unmap_rom(u32 addr)
-{
- PRINTF("isa_unmap_rom asked to unmap %x", addr);
- if ((addr>>12) == (read_mmcr_long(SC520_PAR11)&0x3ffff)) {
- write_mmcr_long(SC520_PAR11, 0);
- PRINTF(" done\n");
- return;
- }
- PRINTF(" not ours\n");
-}
-
-#ifdef CONFIG_PCI
-#define PCI_ROM_TEMP_SPACE 0x10000
-/*
- * This function should map a chunk of size bytes
- * of the system address space to the PCI bus,
- * suitable to map PCI ROMS (bus address < 16M)
- * the function will return the host memory address
- * which should be converted into a bus address
- * before used to configure the PCI rom address
- * decoder
- */
-u32 pci_get_rom_window(struct pci_controller *hose, int size)
-{
- u32 par;
-
- par = size;
- if (par < 0x80000) {
- par = 0x80000;
- }
- par >>= 16;
- par--;
- par&=0x7ff;
- par <<= 14;
- par |= (PCI_ROM_TEMP_SPACE>>16);
- par |= 0x72000000;
-
- PRINTF ("setting PAR1 to %x\n", par);
-
- /* Map rom 0x10000 with PAR1 */
- write_mmcr_long(SC520_PAR1, par);
-
- return PCI_ROM_TEMP_SPACE;
-}
-
-/*
- * this function removed any mapping created
- * with pci_get_rom_window()
- */
-void pci_remove_rom_window(struct pci_controller *hose, u32 addr)
-{
- PRINTF("pci_remove_rom_window: %x", addr);
- if (addr == PCI_ROM_TEMP_SPACE) {
- write_mmcr_long(SC520_PAR1, 0);
- PRINTF(" done\n");
- return;
- }
- PRINTF(" not ours\n");
-
-}
-
-/*
- * This function is called in order to provide acces to the
- * legacy video I/O ports on the PCI bus.
- * After this function accesses to I/O ports 0x3b0-0x3bb and
- * 0x3c0-0x3df shuld result in transactions on the PCI bus.
- *
- */
-int pci_enable_legacy_video_ports(struct pci_controller *hose)
-{
- /* Map video memory to 0xa0000*/
- write_mmcr_long(SC520_PAR0, 0x7200400a);
-
- /* forward all I/O accesses to PCI */
- write_mmcr_byte(SC520_ADDDECCTL,
- read_mmcr_byte(SC520_ADDDECCTL) | IO_HOLE_DEST_PCI);
-
-
- /* so we map away all io ports to pci (only way to access pci io
- * below 0x400. But then we have to map back the portions that we dont
- * use so that the generate cycles on the GPIO bus where the sio and
- * ISA slots are connected, this requre the use of several PAR registers
- */
-
- /* bring 0x100 - 0x1ef back to ISA using PAR5 */
- write_mmcr_long(SC520_PAR5, 0x30ef0100);
-
- /* IDE use 1f0-1f7 */
-
- /* bring 0x1f8 - 0x2f7 back to ISA using PAR6 */
- write_mmcr_long(SC520_PAR6, 0x30ff01f8);
-
- /* com2 use 2f8-2ff */
-
- /* bring 0x300 - 0x3af back to ISA using PAR7 */
- write_mmcr_long(SC520_PAR7, 0x30af0300);
-
- /* vga use 3b0-3bb */
-
- /* bring 0x3bc - 0x3bf back to ISA using PAR8 */
- write_mmcr_long(SC520_PAR8, 0x300303bc);
-
- /* vga use 3c0-3df */
-
- /* bring 0x3e0 - 0x3f5 back to ISA using PAR9 */
- write_mmcr_long(SC520_PAR9, 0x301503e0);
-
- /* ide use 3f6 */
-
- /* bring 0x3f7 back to ISA using PAR10 */
- write_mmcr_long(SC520_PAR10, 0x300003f7);
-
- /* com1 use 3f8-3ff */
-
- return 0;
-}
-#endif
-
-/*
- * Miscelaneous platform dependent initialisations
- */
-
-int board_init(void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- init_sc520();
- bus_init();
- irq_init();
-
- /* max drive current on SDRAM */
- write_mmcr_word(SC520_DSCTL, 0x0100);
-
- /* enter debug mode after next reset (only if jumper is also set) */
- write_mmcr_byte(SC520_RESCFG, 0x08);
- /* configure the software timer to 33.333MHz */
- write_mmcr_byte(SC520_SWTMRCFG, 0);
- gd->bus_clk = 33333000;
-
- return 0;
-}
-
-int dram_init(void)
-{
- init_sc520_dram();
- return 0;
-}
-
-void show_boot_progress(int val)
-{
- outb(val&0xff, 0x80);
- outb((val&0xff00)>>8, 0x680);
-}
-
-
-int last_stage_init(void)
-{
- int minor;
- int major;
-
- major = minor = 0;
- major |= ali512x_cio_in(23)?2:0;
- major |= ali512x_cio_in(22)?1:0;
- minor |= ali512x_cio_in(21)?2:0;
- minor |= ali512x_cio_in(20)?1:0;
-
- printf("AMD SC520 CDP revision %d.%d\n", major, minor);
-
- return 0;
-}
-
-
-void ssi_chip_select(int dev)
-{
-
- /* Spunk board: SPI EEPROM is active-low, MW EEPROM and AUX are active high */
- switch (dev) {
- case 1: /* SPI EEPROM */
- ali512x_cio_out(16, 0);
- break;
-
- case 2: /* MW EEPROM */
- ali512x_cio_out(15, 1);
- break;
-
- case 3: /* AUX */
- ali512x_cio_out(14, 1);
- break;
-
- case 0:
- ali512x_cio_out(16, 1);
- ali512x_cio_out(15, 0);
- ali512x_cio_out(14, 0);
- break;
-
- default:
- printf("Illegal SSI device requested: %d\n", dev);
- }
-}
-
-void spi_eeprom_probe(int x)
-{
-}
-
-int spi_eeprom_read(int x, int offset, char *buffer, int len)
-{
- return 0;
-}
-
-int spi_eeprom_write(int x, int offset, char *buffer, int len)
-{
- return 0;
-}
-
-void spi_init_f(void)
-{
-#ifdef CONFIG_SC520_CDP_USE_SPI
- spi_eeprom_probe(1);
-#endif
-#ifdef CONFIG_SC520_CDP_USE_MW
- mw_eeprom_probe(2);
-#endif
-}
-
-ssize_t spi_read(uchar *addr, int alen, uchar *buffer, int len)
-{
- int offset;
- int i;
- ssize_t res;
-
- offset = 0;
- for (i=0;i<alen;i++) {
- offset <<= 8;
- offset |= addr[i];
- }
-
-#ifdef CONFIG_SC520_CDP_USE_SPI
- res = spi_eeprom_read(1, offset, buffer, len);
-#endif
-#ifdef CONFIG_SC520_CDP_USE_MW
- res = mw_eeprom_read(2, offset, buffer, len);
-#endif
-#if !defined(CONFIG_SC520_CDP_USE_SPI) && !defined(CONFIG_SC520_CDP_USE_MW)
- res = 0;
-#endif
- return res;
-}
-
-ssize_t spi_write(uchar *addr, int alen, uchar *buffer, int len)
-{
- int offset;
- int i;
- ssize_t res;
-
- offset = 0;
- for (i=0;i<alen;i++) {
- offset <<= 8;
- offset |= addr[i];
- }
-
-#ifdef CONFIG_SC520_CDP_USE_SPI
- res = spi_eeprom_write(1, offset, buffer, len);
-#endif
-#ifdef CONFIG_SC520_CDP_USE_MW
- res = mw_eeprom_write(2, offset, buffer, len);
-#endif
-#if !defined(CONFIG_SC520_CDP_USE_SPI) && !defined(CONFIG_SC520_CDP_USE_MW)
- res = 0;
-#endif
- return res;
-}
diff --git a/board/sc520_cdp/sc520_cdp_asm.S b/board/sc520_cdp/sc520_cdp_asm.S
deleted file mode 100644
index be7b2bb482..0000000000
--- a/board/sc520_cdp/sc520_cdp_asm.S
+++ /dev/null
@@ -1,85 +0,0 @@
-/*
- * (C) Copyright 2002
- * Daniel Engström, Omicron Ceti AB <daniel@omicron.se>.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/* now setup the General purpose bus to give us access to the LEDs.
- * We can then use the leds to display status information.
- */
-
-sc520_cdp_registers:
-/* size offset value */
-.word 1 ; .word 0x040 ; .long 0x00 /* SDRAM buffer control */
-.word 2 ; .word 0xc08 ; .long 0x0001 /* GP CS offset */
-.word 2 ; .word 0xc09 ; .long 0x0003 /* GP CS width */
-.word 2 ; .word 0xc0a ; .long 0x0001 /* GP CS width */
-.word 2 ; .word 0xc0b ; .long 0x0003 /* GP RD pulse width */
-.word 2 ; .word 0xc0c ; .long 0x0001 /* GP RD offse */
-.word 2 ; .word 0xc0d ; .long 0x0003 /* GP WR pulse width */
-.word 2 ; .word 0xc0e ; .long 0x0001 /* GP WR offset */
-.word 2 ; .word 0xc2c ; .long 0x0000 /* GPIO directionreg */
-.word 2 ; .word 0xc2a ; .long 0x0000 /* GPIO directionreg */
-.word 2 ; .word 0xc22 ; .long 0xffff /* GPIO pin function 31-16 reg */
-.word 2 ; .word 0xc20 ; .long 0xffff /* GPIO pin function 15-0 reg */
-.word 2 ; .word 0x0c4 ; .long 0x28000680 /* PAR 15 for access to led 680 */
-.word 0 ; .word 0x000 ; .long 0x00
-
-/* board early intialization */
-.globl early_board_init
-early_board_init:
- movl $sc520_cdp_registers,%esi
-init_loop:
- movl $0xfffef000,%edi /* MMCR base to edi */
- movw (%esi), %bx /* load sizer to bx */
- cmpw $0, %bx /* if sie is 0 we're done */
- je done
- xorl %edx,%edx
- movw 2(%esi), %dx /* load MMCR offset to dx */
- addl %edx, %edi /* add offset to base in edi */
- movl 4(%esi), %eax /* load value in eax */
- cmpw $1, %bx
- je byte /* byte op? */
- cmpw $2, %bx
- je word /* word op? */
- movl %eax, (%edi) /* must be long, then */
- jmp next
-byte: movb %al,(%edi)
- jmp next
-word: movw %ax,(%edi)
-next: addl $8, %esi /* advance esi */
- jmp init_loop
-
- /* the leds ad 0x80 and 0x680 should now work */
-done: movb $0x88, %al
- out %al, $0x80
- movw $0x680, %dx
- out %al, %dx
-
- jmp *%ebp /* return to caller */
-
-
-.globl __show_boot_progress
-__show_boot_progress:
- out %al, $0x80
- xchg %al, %ah
- movw $0x680, %dx
- out %al, %dx
- jmp *%ebp
diff --git a/board/sc520_cdp/sc520_cdp_asm16.S b/board/sc520_cdp/sc520_cdp_asm16.S
deleted file mode 100644
index a3e700a626..0000000000
--- a/board/sc520_cdp/sc520_cdp_asm16.S
+++ /dev/null
@@ -1,83 +0,0 @@
-/*
- * (C) Copyright 2002
- * Daniel Engström, Omicron Ceti AB <daniel@omicron.se>.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * 16bit initialization code.
- * This code have to map the area of the boot flash
- * that is used by U-boot to its final destination.
- */
-
-.text
-.section .start16, "ax"
-.code16
-.globl board_init16
-board_init16:
- /* Alias MMCR to 0xdf000 */
- movw $0xfffc, %dx
- movl $0x800df0cb, %eax
- outl %eax, %dx
-
- /* Set ds to point to MMCR alias */
- movw $0xdf00, %ax
- movw %ax, %ds
-
- /* Map the entire flash at 0x38000000
- * (with BOOTCS and PAR14, use 0xabfff800 for ROMCS1) */
- movl $0xc0, %edi
- movl $0x8bfff800, %eax
- movl %eax, (%di)
-
- /* Disable SDRAM write buffer */
- movw $0x40,%di
- xorw %ax,%ax
- movb %al, (%di)
-
- /* Disabe MMCR alias */
- movw $0xfffc, %dx
- movl $0x000000cb, %eax
- outl %eax, %dx
-
- /* the return address is tored in bp */
- jmp *%bp
-
-
-.section .bios, "ax"
-.code16
-.globl realmode_reset
-realmode_reset:
- /* Alias MMCR to 0xdf000 */
- movw $0xfffc, %dx
- movl $0x800df0cb, %eax
- outl %eax, %dx
-
- /* Set ds to point to MMCR alias */
- movw $0xdf00, %ax
- movw %ax, %ds
-
- /* issue software reset thorugh MMCR */
- movl $0xd72, %edi
- movb $0x01, %al
- movb %al, (%di)
-
-1: hlt
- jmp 1
diff --git a/board/sc520_cdp/u-boot.lds b/board/sc520_cdp/u-boot.lds
deleted file mode 100644
index 72164a1c8e..0000000000
--- a/board/sc520_cdp/u-boot.lds
+++ /dev/null
@@ -1,91 +0,0 @@
-/*
- * (C) Copyright 2002
- * Daniel Engström, Omicron Ceti AB, daniel@omicron.se.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT("elf32-i386", "elf32-i386", "elf32-i386")
-OUTPUT_ARCH(i386)
-ENTRY(_start)
-
-SECTIONS
-{
- . = 0x387c0000; /* Where bootcode in the flash is mapped */
- .text : { *(.text); }
-
- . = ALIGN(4);
- .rodata : { *(.rodata) *(.rodata.str1.1) *(.rodata.str1.32) }
-
- . = 0x400000; /* Ram data segment to use */
- _i386boot_romdata_dest = ABSOLUTE(.);
- .data : AT ( LOADADDR(.rodata) + SIZEOF(.rodata) ) { *(.data) }
- _i386boot_romdata_start = LOADADDR(.data);
-
- . = ALIGN(4);
- .got : AT ( LOADADDR(.data) + SIZEOF(.data) ) { *(.got) }
- _i386boot_romdata_size = SIZEOF(.data) + SIZEOF(.got);
-
-
- . = ALIGN(4);
- _i386boot_bss_start = ABSOLUTE(.);
- .bss : { *(.bss) }
- _i386boot_bss_size = SIZEOF(.bss);
-
-
- /* 16bit realmode trampoline code */
- .realmode 0x7c0 : AT ( LOADADDR(.got) + SIZEOF(.got) ) { *(.realmode) }
-
- _i386boot_realmode = LOADADDR(.realmode);
- _i386boot_realmode_size = SIZEOF(.realmode);
-
- /* 16bit BIOS emulation code (just enough to boot Linux) */
- .bios 0 : AT ( LOADADDR(.realmode) + SIZEOF(.realmode) ) { *(.bios) }
-
- _i386boot_bios = LOADADDR(.bios);
- _i386boot_bios_size = SIZEOF(.bios);
-
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- /* The load addresses below assumes that the flash
- * will be mapped so that 0x387f0000 == 0xffff0000
- * at reset time
- *
- * The fe00 and ff00 offsets of the start32 and start16
- * segments are arbitrary, the just have to be mapped
- * at reset and the code have to fit.
- * The fff0 offset of reset is important, however.
- */
-
-
- . = 0xfffffe00;
- .start32 : AT (0x387ffe00) { *(.start32); }
-
- . = 0xff00;
- .start16 : AT (0x387fff00) { *(.start16); }
-
- . = 0xfff0;
- .reset : AT (0x387ffff0) { *(.reset); }
- _i386boot_end = (LOADADDR(.reset) + SIZEOF(.reset) );
-}
diff --git a/board/sc520_spunk/Makefile b/board/sc520_spunk/Makefile
deleted file mode 100644
index 242d53c42a..0000000000
--- a/board/sc520_spunk/Makefile
+++ /dev/null
@@ -1,47 +0,0 @@
-#
-# (C) Copyright 2002
-# Daniel Engström, Omicron Ceti AB, daniel@omicron.se.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := sc520_spunk.o flash.o
-SOBJS := sc520_spunk_asm.o sc520_spunk_asm16.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/sc520_spunk/config.mk b/board/sc520_spunk/config.mk
deleted file mode 100644
index 2253815647..0000000000
--- a/board/sc520_spunk/config.mk
+++ /dev/null
@@ -1,25 +0,0 @@
-#
-# (C) Copyright 2002
-# Daniel Engström, Omicron Ceti AB, daniel@omicron.se.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-
-TEXT_BASE = 0x387c0000
diff --git a/board/sc520_spunk/flash.c b/board/sc520_spunk/flash.c
deleted file mode 100644
index 4942e598d3..0000000000
--- a/board/sc520_spunk/flash.c
+++ /dev/null
@@ -1,809 +0,0 @@
-/*
- * (C) Copyright 2002, 2003
- * Daniel Engström, Omicron Ceti AB, daniel@omicron.se
- *
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Alex Zuepke <azu@sysgo.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/io.h>
-#include <pci.h>
-#include <asm/ic/sc520.h>
-
-#define PROBE_BUFFER_SIZE 1024
-static unsigned char buffer[PROBE_BUFFER_SIZE];
-
-
-#define SC520_MAX_FLASH_BANKS 1
-#define SC520_FLASH_BANK0_BASE 0x38000000 /* BOOTCS */
-#define SC520_FLASH_BANKSIZE 0x8000000
-
-#define A29LV641DH_SIZE 0x800000
-#define A29LV641DH_SECTORS 128
-
-#define A29LV641MH_SIZE 0x800000
-#define A29LV641MH_SECTORS 128
-
-#define I28F320J3A_SIZE 0x400000
-#define I28F320J3A_SECTORS 32
-
-#define I28F640J3A_SIZE 0x800000
-#define I28F640J3A_SECTORS 64
-
-#define I28F128J3A_SIZE 0x1000000
-#define I28F128J3A_SECTORS 128
-
-flash_info_t flash_info[SC520_MAX_FLASH_BANKS];
-
-#define READY 1
-#define ERR 2
-#define TMO 4
-
-/*-----------------------------------------------------------------------
- */
-
-
-static u32 _probe_flash(u32 addr, u32 bw, int il)
-{
- u32 result=0;
-
- /* First do an unlock cycle for the benefit of
- * devices that need it */
-
- switch (bw) {
-
- case 1:
- *(volatile u8*)(addr+0x5555) = 0xaa;
- *(volatile u8*)(addr+0x2aaa) = 0x55;
- *(volatile u8*)(addr+0x5555) = 0x90;
-
- /* Read vendor */
- result = *(volatile u8*)addr;
- result <<= 16;
-
- /* Read device */
- result |= *(volatile u8*)(addr+2);
-
- /* Return device to data mode */
- *(volatile u8*)addr = 0xff;
- *(volatile u8*)(addr+0x5555), 0xf0;
- break;
-
- case 2:
- *(volatile u16*)(addr+0xaaaa) = 0xaaaa;
- *(volatile u16*)(addr+0x5554) = 0x5555;
-
- /* Issue identification command */
- if (il == 2) {
- *(volatile u16*)(addr+0xaaaa) = 0x9090;
-
- /* Read vendor */
- result = *(volatile u8*)addr;
- result <<= 16;
-
- /* Read device */
- result |= *(volatile u8*)(addr+2);
-
- /* Return device to data mode */
- *(volatile u16*)addr = 0xffff;
- *(volatile u16*)(addr+0xaaaa), 0xf0f0;
-
- } else {
- *(volatile u8*)(addr+0xaaaa) = 0x90;
- /* Read vendor */
- result = *(volatile u16*)addr;
- result <<= 16;
-
- /* Read device */
- result |= *(volatile u16*)(addr+2);
-
- /* Return device to data mode */
- *(volatile u8*)addr = 0xff;
- *(volatile u8*)(addr+0xaaaa), 0xf0;
- }
-
- break;
-
- case 4:
- *(volatile u32*)(addr+0x5554) = 0xaaaaaaaa;
- *(volatile u32*)(addr+0xaaa8) = 0x55555555;
-
- switch (il) {
- case 1:
- /* Issue identification command */
- *(volatile u8*)(addr+0x5554) = 0x90;
-
- /* Read vendor */
- result = *(volatile u16*)addr;
- result <<= 16;
-
- /* Read device */
- result |= *(volatile u16*)(addr+4);
-
- /* Return device to data mode */
- *(volatile u8*)addr = 0xff;
- *(volatile u8*)(addr+0x5554), 0xf0;
- break;
-
- case 2:
- /* Issue identification command */
- *(volatile u32*)(addr + 0x5554) = 0x00900090;
-
- /* Read vendor */
- result = *(volatile u16*)addr;
- result <<= 16;
-
- /* Read device */
- result |= *(volatile u16*)(addr+4);
-
- /* Return device to data mode */
- *(volatile u32*)addr = 0x00ff00ff;
- *(volatile u32*)(addr+0x5554), 0x00f000f0;
- break;
-
- case 4:
- /* Issue identification command */
- *(volatile u32*)(addr+0x5554) = 0x90909090;
-
- /* Read vendor */
- result = *(volatile u8*)addr;
- result <<= 16;
-
- /* Read device */
- result |= *(volatile u8*)(addr+4);
-
- /* Return device to data mode */
- *(volatile u32*)addr = 0xffffffff;
- *(volatile u32*)(addr+0x5554), 0xf0f0f0f0;
- break;
- }
- break;
- }
-
-
- return result;
-}
-
-extern int _probe_flash_end;
-asm ("_probe_flash_end:\n"
- ".long 0\n");
-
-static int identify_flash(unsigned address, int width)
-{
- int is;
- int device;
- int vendor;
- int size;
- unsigned res;
-
- u32 (*_probe_flash_ptr)(u32 a, u32 bw, int il);
-
- size = (unsigned)&_probe_flash_end - (unsigned)_probe_flash;
-
- if (size > PROBE_BUFFER_SIZE) {
- printf("_probe_flash() routine too large (%d) %p - %p\n",
- size, &_probe_flash_end, _probe_flash);
- return 0;
- }
-
- memcpy(buffer, _probe_flash, size);
- _probe_flash_ptr = (void*)buffer;
-
- is = disable_interrupts();
- res = _probe_flash_ptr(address, width, 1);
- if (is) {
- enable_interrupts();
- }
-
-
- vendor = res >> 16;
- device = res & 0xffff;
-
-
- return res;
-}
-
-ulong flash_init(void)
-{
- int i, j;
- ulong size = 0;
-
- for (i = 0; i < SC520_MAX_FLASH_BANKS; i++) {
- unsigned id;
- ulong flashbase = 0;
- int sectsize = 0;
-
- memset(flash_info[i].protect, 0, CFG_MAX_FLASH_SECT);
- switch (i) {
- case 0:
- flashbase = SC520_FLASH_BANK0_BASE;
- break;
- default:
- panic("configured too many flash banks!\n");
- }
-
- id = identify_flash(flashbase, 2);
- switch (id) {
- case 0x000122d7:
- /* 29LV641DH */
- flash_info[i].flash_id =
- (AMD_MANUFACT & FLASH_VENDMASK) |
- (AMD_ID_LV640U & FLASH_TYPEMASK);
-
- flash_info[i].size = A29LV641DH_SIZE;
- flash_info[i].sector_count = A29LV641DH_SECTORS;
- sectsize = A29LV641DH_SIZE/A29LV641DH_SECTORS;
- printf("Bank %d: AMD 29LV641DH\n", i);
- break;
-
- case 0x0001227E:
- /* 29LV641MH */
- flash_info[i].flash_id =
- (AMD_MANUFACT & FLASH_VENDMASK) |
- (AMD_ID_DL640 & FLASH_TYPEMASK);
-
- flash_info[i].size = A29LV641MH_SIZE;
- flash_info[i].sector_count = A29LV641MH_SECTORS;
- sectsize = A29LV641MH_SIZE/A29LV641MH_SECTORS;
- printf("Bank %d: AMD 29LV641MH\n", i);
- break;
-
- case 0x00890016:
- /* 28F320J3A */
- flash_info[i].flash_id =
- (INTEL_MANUFACT & FLASH_VENDMASK) |
- (INTEL_ID_28F320J3A & FLASH_TYPEMASK);
-
- flash_info[i].size = I28F320J3A_SIZE;
- flash_info[i].sector_count = I28F320J3A_SECTORS;
- sectsize = I28F320J3A_SIZE/I28F320J3A_SECTORS;
- printf("Bank %d: Intel 28F320J3A\n", i);
- break;
-
- case 0x00890017:
- /* 28F640J3A */
- flash_info[i].flash_id =
- (INTEL_MANUFACT & FLASH_VENDMASK) |
- (INTEL_ID_28F640J3A & FLASH_TYPEMASK);
-
- flash_info[i].size = I28F640J3A_SIZE;
- flash_info[i].sector_count = I28F640J3A_SECTORS;
- sectsize = I28F640J3A_SIZE/I28F640J3A_SECTORS;
- printf("Bank %d: Intel 28F640J3A\n", i);
- break;
-
- case 0x00890018:
- /* 28F128J3A */
- flash_info[i].flash_id =
- (INTEL_MANUFACT & FLASH_VENDMASK) |
- (INTEL_ID_28F128J3A & FLASH_TYPEMASK);
-
- flash_info[i].size = I28F128J3A_SIZE;
- flash_info[i].sector_count = I28F128J3A_SECTORS;
- sectsize = I28F128J3A_SIZE/I28F128J3A_SECTORS;
- printf("Bank %d: Intel 28F128J3A\n", i);
- break;
-
- default:
- printf("Bank %d have unknown flash %08x\n", i, id);
- flash_info[i].flash_id = FLASH_UNKNOWN;
- continue;
- }
-
- for (j = 0; j < flash_info[i].sector_count; j++) {
- flash_info[i].start[j] = flashbase + j * sectsize;
- }
- size += flash_info[i].size;
-
- flash_protect(FLAG_PROTECT_CLEAR,
- flash_info[i].start[0],
- flash_info[i].start[0] + flash_info[i].size - 1,
- &flash_info[i]);
- }
-
- /*
- * Protect monitor and environment sectors
- */
- flash_protect(FLAG_PROTECT_SET,
- i386boot_start,
- i386boot_end,
- &flash_info[0]);
-#ifdef CFG_ENV_ADDR
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1,
- &flash_info[0]);
-#endif
- return size;
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info(flash_info_t *info)
-{
- int i;
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case (INTEL_MANUFACT & FLASH_VENDMASK):
- printf("INTEL: ");
- switch (info->flash_id & FLASH_TYPEMASK) {
- case (INTEL_ID_28F320J3A & FLASH_TYPEMASK):
- printf("1x I28F320J3A (32Mbit)\n");
- break;
- case (INTEL_ID_28F640J3A & FLASH_TYPEMASK):
- printf("1x I28F640J3A (64Mbit)\n");
- break;
- case (INTEL_ID_28F128J3A & FLASH_TYPEMASK):
- printf("1x I28F128J3A (128Mbit)\n");
- break;
- default:
- printf("Unknown Chip Type\n");
- goto done;
- break;
- }
-
- break;
-
- case (AMD_MANUFACT & FLASH_VENDMASK):
- printf("AMD: ");
- switch (info->flash_id & FLASH_TYPEMASK) {
- case (AMD_ID_LV640U & FLASH_TYPEMASK):
- printf("1x AMD29LV641DH (64Mbit)\n");
- break;
- case (AMD_ID_DL640 & FLASH_TYPEMASK):
- printf("1x AMD29LV641MH (64Mbit)\n");
- break;
- default:
- printf("Unknown Chip Type\n");
- goto done;
- break;
- }
-
- break;
- default:
- printf("Unknown Vendor ");
- break;
- }
-
-
- printf(" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf(" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; i++) {
- if ((i % 5) == 0) {
- printf ("\n ");
- }
- printf (" %08lX%s", info->start[i],
- info->protect[i] ? " (RO)" : " ");
- }
- printf ("\n");
-
- done:
-}
-
-/*-----------------------------------------------------------------------
- */
-
-
-static u32 _amd_erase_flash(u32 addr, u32 sector)
-{
- unsigned elapsed;
-
- /* Issue erase */
- *(volatile u16*)(addr + 0xaaaa) = 0x00AA;
- *(volatile u16*)(addr + 0x5554) = 0x0055;
- *(volatile u16*)(addr + 0xaaaa) = 0x0080;
- /* And one unlock */
- *(volatile u16*)(addr + 0xaaaa) = 0x00AA;
- *(volatile u16*)(addr + 0x5554) = 0x0055;
- /* Sector erase command comes last */
- *(volatile u16*)(addr + sector) = 0x0030;
-
- elapsed = *(volatile u16*)(0xfffef000+SC520_SWTMRMILLI); /* dummy read */
- elapsed = 0;
- while (((*(volatile u16*)(addr + sector)) & 0x0080) != 0x0080) {
-
- elapsed += *(volatile u16*)(0xfffef000+SC520_SWTMRMILLI);
- if (elapsed > ((CFG_FLASH_ERASE_TOUT/CFG_HZ) * 1000)) {
- *(volatile u16*)(addr) = 0x00f0;
- return 1;
- }
- }
-
- *(volatile u16*)(addr) = 0x00f0;
-
- return 0;
-}
-
-extern int _amd_erase_flash_end;
-asm ("_amd_erase_flash_end:\n"
- ".long 0\n");
-
-/* this needs to be inlined, the SWTMRMMILLI register is reset by each read */
-#define __udelay(delay) \
-{ \
- unsigned micro; \
- unsigned milli=0; \
- \
- micro = *(volatile u16*)(0xfffef000+SC520_SWTMRMILLI); \
- \
- for (;;) { \
- \
- milli += *(volatile u16*)(0xfffef000+SC520_SWTMRMILLI); \
- micro = *(volatile u16*)(0xfffef000+SC520_SWTMRMICRO); \
- \
- if ((delay) <= (micro + (milli * 1000))) { \
- break; \
- } \
- } \
-} while (0)
-
-static u32 _intel_erase_flash(u32 addr, u32 sector)
-{
- unsigned elapsed;
-
- *(volatile u16*)(addr + sector) = 0x0050; /* clear status register */
- *(volatile u16*)(addr + sector) = 0x0020; /* erase setup */
- *(volatile u16*)(addr + sector) = 0x00D0; /* erase confirm */
-
-
- /* Wait at least 80us - let's wait 1 ms */
- __udelay(1000);
-
- elapsed = 0;
- while (((*(volatile u16*)(addr + sector)) & 0x0080) != 0x0080) {
- elapsed += *(volatile u16*)(0xfffef000+SC520_SWTMRMILLI);
- if (elapsed > ((CFG_FLASH_ERASE_TOUT/CFG_HZ) * 1000)) {
- *(volatile u16*)(addr + sector) = 0x00B0; /* suspend erase */
- *(volatile u16*)(addr + sector) = 0x00FF; /* reset to read mode */
- return 1;
- }
- }
-
- *(volatile u16*)(addr + sector) = 0x00FF; /* reset to read mode */
-
- return 0;
-}
-
-
-extern int _intel_erase_flash_end;
-asm ("_intel_erase_flash_end:\n"
- ".long 0\n");
-
-int flash_erase(flash_info_t *info, int s_first, int s_last)
-{
- u32 (*_erase_flash_ptr)(u32 a, u32 so);
- int prot;
- int sect;
- unsigned size;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf("- missing\n");
- } else {
- printf("- no sectors to erase\n");
- }
- return 1;
- }
-
- if ((info->flash_id & FLASH_VENDMASK) == (AMD_MANUFACT & FLASH_VENDMASK)) {
- size = (unsigned)&_amd_erase_flash_end - (unsigned)_amd_erase_flash;
-
- if (size > PROBE_BUFFER_SIZE) {
- printf("_amd_erase_flash() routine too large (%d) %p - %p\n",
- size, &_amd_erase_flash_end, _amd_erase_flash);
- return 0;
- }
-
- memcpy(buffer, _amd_erase_flash, size);
- _erase_flash_ptr = (void*)buffer;
-
- } else if ((info->flash_id & FLASH_VENDMASK) == (INTEL_MANUFACT & FLASH_VENDMASK)) {
- size = (unsigned)&_intel_erase_flash_end - (unsigned)_intel_erase_flash;
-
- if (size > PROBE_BUFFER_SIZE) {
- printf("_intel_erase_flash() routine too large (%d) %p - %p\n",
- size, &_intel_erase_flash_end, _intel_erase_flash);
- return 0;
- }
-
- memcpy(buffer, _intel_erase_flash, size);
- _erase_flash_ptr = (void*)buffer;
- } else {
- printf ("Can't erase unknown flash type - aborted\n");
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n", prot);
- } else {
- printf ("\n");
- }
-
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
-
- if (info->protect[sect] == 0) { /* not protected */
- int res;
- int flag;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- res = _erase_flash_ptr(info->start[0], info->start[sect]-info->start[0]);
-
- /* re-enable interrupts if necessary */
- if (flag) {
- enable_interrupts();
- }
-
-
- if (res) {
- printf("Erase timed out, sector %d\n", sect);
- return res;
- }
-
- putc('.');
- }
- }
-
-
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int _amd_write_word(unsigned start, unsigned dest, unsigned data)
-{
- volatile u16 *addr2 = (u16*)start;
- volatile u16 *dest2 = (u16*)dest;
- volatile u16 *data2 = (u16*)&data;
- int i;
- unsigned elapsed;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*((volatile u16*)dest) & (u16)data) != (u16)data) {
- return 2;
- }
-
- for (i = 0; i < 2; i++) {
-
-
- addr2[0x5555] = 0x00AA;
- addr2[0x2aaa] = 0x0055;
- addr2[0x5555] = 0x00A0;
-
- dest2[i] = (data >> (i*16)) & 0xffff;
-
- elapsed = *(volatile u16*)(0xfffef000+SC520_SWTMRMILLI); /* dummy read */
- elapsed = 0;
-
- /* data polling for D7 */
- while ((dest2[i] & 0x0080) != (data2[i] & 0x0080)) {
- elapsed += *(volatile u16*)(0xfffef000+SC520_SWTMRMILLI);
- if (elapsed > ((CFG_FLASH_WRITE_TOUT/CFG_HZ) * 1000)) {
- addr2[i] = 0x00f0;
- return 1;
- }
- }
- }
-
- addr2[i] = 0x00f0;
-
- return 0;
-}
-
-extern int _amd_write_word_end;
-asm ("_amd_write_word_end:\n"
- ".long 0\n");
-
-
-static int _intel_write_word(unsigned start, unsigned dest, unsigned data)
-{
- int i;
- unsigned elapsed;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*((volatile u16*)dest) & (u16)data) != (u16)data) {
- return 2;
- }
-
- for (i = 0; i < 2; i++) {
-
- *(volatile u16*)(dest+2*i) = 0x0040; /* write setup */
- *(volatile u16*)(dest+2*i) = (data >> (i*16)) & 0xffff;
-
- elapsed = *(volatile u16*)(0xfffef000+SC520_SWTMRMILLI); /* dummy read */
- elapsed = 0;
-
- /* data polling for D7 */
- while ((*(volatile u16*)dest & 0x0080) != 0x0080) {
- elapsed += *(volatile u16*)(0xfffef000+SC520_SWTMRMILLI);
- if (elapsed > ((CFG_FLASH_WRITE_TOUT/CFG_HZ) * 1000)) {
- *(volatile u16*)dest = 0x00ff;
- return 1;
- }
- }
- }
-
- *(volatile u16*)dest = 0x00ff;
-
-
- return 0;
-
-}
-
-extern int _intel_write_word_end;
-asm ("_intel_write_word_end:\n"
- ".long 0\n");
-
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- * 3 - Unsupported flash type
- */
-
-int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int i, l, rc;
- int flag;
- u32 (*_write_word_ptr)(unsigned start, unsigned dest, unsigned data);
- unsigned size;
-
- if ((info->flash_id & FLASH_VENDMASK) == (AMD_MANUFACT & FLASH_VENDMASK)) {
- size = (unsigned)&_amd_write_word_end - (unsigned)_amd_write_word;
-
- if (size > PROBE_BUFFER_SIZE) {
- printf("_amd_write_word() routine too large (%d) %p - %p\n",
- size, &_amd_write_word_end, _amd_write_word);
- return 0;
- }
-
- memcpy(buffer, _amd_write_word, size);
- _write_word_ptr = (void*)buffer;
-
- } else if ((info->flash_id & FLASH_VENDMASK) == (INTEL_MANUFACT & FLASH_VENDMASK)) {
- size = (unsigned)&_intel_write_word_end - (unsigned)_intel_write_word;
-
- if (size > PROBE_BUFFER_SIZE) {
- printf("_intel_write_word() routine too large (%d) %p - %p\n",
- size, &_intel_write_word_end, _intel_write_word);
- return 0;
- }
-
- memcpy(buffer, _intel_write_word, size);
- _write_word_ptr = (void*)buffer;
- } else {
- printf ("Can't program unknown flash type - aborted\n");
- return 3;
- }
-
-
- wp = (addr & ~3); /* get lower word aligned address */
-
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data |= (*(uchar *)cp) << (8*i);
- }
- for (; i<4 && cnt>0; ++i) {
- data |= *src++ << (8*i);
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<4; ++i, ++cp) {
- data |= (*(uchar *)cp) << (8*i);
- }
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- rc = _write_word_ptr(info->start[0], wp, data);
-
- /* re-enable interrupts if necessary */
- if (flag) {
- enable_interrupts();
- }
- if (rc != 0) {
- return rc;
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = 0;
-
- for (i=0; i<4; ++i) {
- data |= *src++ << (8*i);
- }
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- rc = _write_word_ptr(info->start[0], wp, data);
-
- /* re-enable interrupts if necessary */
- if (flag) {
- enable_interrupts();
- }
- if (rc != 0) {
- return rc;
- }
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return 0;
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
- data |= *src++ << (8*i);
- --cnt;
- }
-
- for (; i<4; ++i, ++cp) {
- data |= (*(uchar *)cp) << (8*i);
- }
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- rc = _write_word_ptr(info->start[0], wp, data);
-
- /* re-enable interrupts if necessary */
- if (flag) {
- enable_interrupts();
- }
-
- return rc;
-
-}
diff --git a/board/sc520_spunk/sc520_spunk.c b/board/sc520_spunk/sc520_spunk.c
deleted file mode 100644
index e7a7d5188c..0000000000
--- a/board/sc520_spunk/sc520_spunk.c
+++ /dev/null
@@ -1,681 +0,0 @@
-/*
- *
- * (C) Copyright 2002
- * Daniel Engström, Omicron Ceti AB <daniel@omicron.se>.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <pci.h>
-#include <ssi.h>
-#include <asm/io.h>
-#include <asm/pci.h>
-#include <asm/ic/sc520.h>
-
-
-/* ------------------------------------------------------------------------- */
-
-
-/*
- * Theory:
- * We first set up all IRQs to be non-pci, edge triggered,
- * when we later enumerate the pci bus and pci_sc520_fixup_irq() gets
- * called we reallocate irqs to the pci bus with sc520_pci_set_irq()
- * as needed. Whe choose the irqs to gram from a configurable list
- * inside pci_sc520_fixup_irq() (If this list contains stupid irq's
- * such as 0 thngas will not work)
- */
-
-static void irq_init(void)
-{
- /* disable global interrupt mode */
- write_mmcr_byte(SC520_PICICR, 0x40);
-
- /* set all irqs to edge */
- write_mmcr_byte(SC520_MPICMODE, 0x00);
- write_mmcr_byte(SC520_SL1PICMODE, 0x00);
- write_mmcr_byte(SC520_SL2PICMODE, 0x00);
-
- /* active low polarity on PIC interrupt pins,
- * active high polarity on all other irq pins */
- write_mmcr_word(SC520_INTPINPOL, 0x0000);
-
- /* set irq number mapping */
- write_mmcr_byte(SC520_GPTMR0MAP, SC520_IRQ_DISABLED); /* disable GP timer 0 INT */
- write_mmcr_byte(SC520_GPTMR1MAP, SC520_IRQ_DISABLED); /* disable GP timer 1 INT */
- write_mmcr_byte(SC520_GPTMR2MAP, SC520_IRQ_DISABLED); /* disable GP timer 2 INT */
- write_mmcr_byte(SC520_PIT0MAP, SC520_IRQ0); /* Set PIT timer 0 INT to IRQ0 */
- write_mmcr_byte(SC520_PIT1MAP, SC520_IRQ_DISABLED); /* disable PIT timer 1 INT */
- write_mmcr_byte(SC520_PIT2MAP, SC520_IRQ_DISABLED); /* disable PIT timer 2 INT */
- write_mmcr_byte(SC520_PCIINTAMAP, SC520_IRQ_DISABLED); /* disable PCI INT A */
- write_mmcr_byte(SC520_PCIINTBMAP, SC520_IRQ_DISABLED); /* disable PCI INT B */
- write_mmcr_byte(SC520_PCIINTCMAP, SC520_IRQ_DISABLED); /* disable PCI INT C */
- write_mmcr_byte(SC520_PCIINTDMAP, SC520_IRQ_DISABLED); /* disable PCI INT D */
- write_mmcr_byte(SC520_DMABCINTMAP, SC520_IRQ_DISABLED); /* disable DMA INT */
- write_mmcr_byte(SC520_SSIMAP, SC520_IRQ6); /* Set Synchronius serial INT to IRQ6*/
- write_mmcr_byte(SC520_WDTMAP, SC520_IRQ_DISABLED); /* disable Watchdog INT */
- write_mmcr_byte(SC520_RTCMAP, SC520_IRQ8); /* Set RTC int to 8 */
- write_mmcr_byte(SC520_WPVMAP, SC520_IRQ_DISABLED); /* disable write protect INT */
- write_mmcr_byte(SC520_ICEMAP, SC520_IRQ1); /* Set ICE Debug Serielport INT to IRQ1 */
- write_mmcr_byte(SC520_FERRMAP,SC520_IRQ13); /* Set FP error INT to IRQ13 */
-
- write_mmcr_byte(SC520_UART1MAP, SC520_IRQ4); /* Set internal UART2 INT to IRQ4 */
- write_mmcr_byte(SC520_UART2MAP, SC520_IRQ3); /* Set internal UART2 INT to IRQ3 */
-
- write_mmcr_byte(SC520_GP0IMAP, SC520_IRQ7); /* Set GPIRQ0 (PC-Card AUX IRQ) to IRQ7 */
- write_mmcr_byte(SC520_GP1IMAP, SC520_IRQ14); /* Set GPIRQ1 (CF IRQ) to IRQ14 */
- write_mmcr_byte(SC520_GP3IMAP, SC520_IRQ5); /* Set GPIRQ3 ( CAN IRQ ) ti IRQ5 */
- write_mmcr_byte(SC520_GP4IMAP, SC520_IRQ_DISABLED); /* disbale GIRQ4 ( IRR IRQ ) */
- write_mmcr_byte(SC520_GP5IMAP, SC520_IRQ_DISABLED); /* disable GPIRQ5 */
- write_mmcr_byte(SC520_GP6IMAP, SC520_IRQ_DISABLED); /* disable GPIRQ6 */
- write_mmcr_byte(SC520_GP7IMAP, SC520_IRQ_DISABLED); /* disable GPIRQ7 */
- write_mmcr_byte(SC520_GP8IMAP, SC520_IRQ_DISABLED); /* disable GPIRQ8 */
- write_mmcr_byte(SC520_GP9IMAP, SC520_IRQ_DISABLED); /* disable GPIRQ9 */
- write_mmcr_byte(SC520_GP2IMAP, SC520_IRQ_DISABLED); /* disable GPIRQ2 */
- write_mmcr_byte(SC520_GP10IMAP,SC520_IRQ_DISABLED); /* disable GPIRQ10 */
-
- write_mmcr_word(SC520_PCIHOSTMAP, 0x11f); /* Map PCI hostbridge INT to NMI */
- write_mmcr_word(SC520_ECCMAP, 0x100); /* Map SDRAM ECC failure INT to NMI */
-
-}
-
-
-/* PCI stuff */
-static void pci_sc520_spunk_fixup_irq(struct pci_controller *hose, pci_dev_t dev)
-{
- int version = read_mmcr_byte(SC520_SYSINFO);
-
- /* a configurable lists of irqs to steal
- * when we need one (a board with more pci interrupt pins
- * would use a larger table */
- static int irq_list[] = {
- CFG_FIRST_PCI_IRQ,
- CFG_SECOND_PCI_IRQ,
- CFG_THIRD_PCI_IRQ,
- CFG_FORTH_PCI_IRQ
- };
- static int next_irq_index=0;
-
- char tmp_pin;
- int pin;
-
- pci_hose_read_config_byte(hose, dev, PCI_INTERRUPT_PIN, &tmp_pin);
- pin = tmp_pin;
-
- pin-=1; /* pci config space use 1-based numbering */
- if (-1 == pin) {
- return; /* device use no irq */
- }
-
-
- /* map device number + pin to a pin on the sc520 */
- switch (PCI_DEV(dev)) {
- case 6: /* ETH0 */
- pin+=SC520_PCI_INTA;
- break;
-
- case 7: /* ETH1 */
- pin+=SC520_PCI_INTB;
- break;
-
- case 8: /* Crypto */
- pin+=SC520_PCI_INTC;
- break;
-
- case 9: /* PMC slot */
- pin+=SC520_PCI_INTD;
- break;
-
- case 10: /* PC-Card */
-
- if (version < 10) {
- pin+=SC520_PCI_INTD;
- } else {
- pin+=SC520_PCI_INTC;
- }
- break;
-
- default:
- return;
- }
-
- pin&=3; /* wrap around */
-
- if (sc520_pci_ints[pin] == -1) {
- /* re-route one interrupt for us */
- if (next_irq_index > 3) {
- return;
- }
- if (pci_sc520_set_irq(pin, irq_list[next_irq_index])) {
- return;
- }
- next_irq_index++;
- }
-
-
- if (-1 != sc520_pci_ints[pin]) {
- pci_hose_write_config_byte(hose, dev, PCI_INTERRUPT_LINE,
- sc520_pci_ints[pin]);
- }
-#if 0
- printf("fixup_irq: device %d pin %c irq %d\n",
- PCI_DEV(dev), 'A' + pin, sc520_pci_ints[pin]);
-#endif
-}
-
-
-static void pci_sc520_spunk_configure_cardbus(struct pci_controller *hose,
- pci_dev_t dev, struct pci_config_table *te)
-{
- u32 io_base;
- u32 temp;
-
- pciauto_config_device(hose, dev);
-
- pci_hose_write_config_word(hose, dev, PCI_COMMAND, 0x07); /* enable device */
- pci_hose_write_config_byte(hose, dev, 0x0c, 0x10); /* cacheline size */
- pci_hose_write_config_byte(hose, dev, 0x0d, 0x40); /* latency timer */
- pci_hose_write_config_byte(hose, dev, 0x1b, 0x40); /* cardbus latency timer */
- pci_hose_write_config_word(hose, dev, PCI_BRIDGE_CONTROL, 0x0040); /* reset cardbus */
- pci_hose_write_config_word(hose, dev, PCI_BRIDGE_CONTROL, 0x0080); /* route interrupts though ExCA */
- pci_hose_write_config_word(hose, dev, 0x44, 0x3e0); /* map legacy I/O port to 0x3e0 */
-
- pci_hose_read_config_dword(hose, dev, 0x80, &temp); /* System control */
- pci_hose_write_config_dword(hose, dev, 0x80, temp | 0x60); /* System control: disable clockrun */
- /* route MF0 to ~INT and MF3 to IRQ7
- * reserve all others */
- pci_hose_write_config_dword(hose, dev, 0x8c, 0x00007002);
- pci_hose_write_config_byte(hose, dev, 0x91, 0x00); /* card control */
- pci_hose_write_config_byte(hose, dev, 0x92, 0x62); /* device control */
-
- if (te->device != 0xac56) {
- pci_hose_write_config_byte(hose, dev, 0x93, 0x21); /* async interrupt enable */
- pci_hose_write_config_word(hose, dev, 0xa8, 0x0000); /* reset GPIO */
- pci_hose_write_config_word(hose, dev, 0xac, 0x0000); /* reset GPIO */
- pci_hose_write_config_word(hose, dev, 0xaa, 0x0000); /* reset GPIO */
- pci_hose_write_config_word(hose, dev, 0xae, 0x0000); /* reset GPIO */
- } else {
- pci_hose_write_config_byte(hose, dev, 0x93, 0x20); /* */
- }
- pci_hose_write_config_word(hose, dev, 0xa4, 0x8000); /* reset power management */
-
-
- pci_hose_read_config_dword(hose, dev, PCI_BASE_ADDRESS_0, &io_base);
- io_base &= ~0xfL;
-
- writeb(0x07, io_base+0x803); /* route CSC irq though ExCA and enable IRQ7 */
- writel(0, io_base+0x10); /* CLKRUN default */
- writel(0, io_base+0x20); /* CLKRUN default */
-
-}
-
-
-static struct pci_config_table pci_sc520_spunk_config_table[] = {
- { 0x104c, 0xac50, PCI_ANY_ID, 0, 0x0a, 0, pci_sc520_spunk_configure_cardbus, { 0, 0, 0} },
- { 0x104c, 0xac56, PCI_ANY_ID, 0, 0x0a, 0, pci_sc520_spunk_configure_cardbus, { 0, 0, 0} },
- { 0, 0, 0, 0, 0, 0, NULL, {0,0,0}}
-};
-
-static struct pci_controller sc520_spunk_hose = {
- fixup_irq: pci_sc520_spunk_fixup_irq,
- config_table: pci_sc520_spunk_config_table,
- first_busno: 0x00,
- last_busno: 0xff,
-};
-
-void pci_init_board(void)
-{
- pci_sc520_init(&sc520_spunk_hose);
-}
-
-
-/* set up the ISA bus timing and system address mappings */
-static void bus_init(void)
-{
- /* versions
- * 0 Hyglo versions 0.95 and 0.96 (large baords)
- * ?? Hyglo version 0.97 (small board)
- * 10 Spunk board
- */
- int version = read_mmcr_byte(SC520_SYSINFO);
-
- if (version) {
- /* set up the GP IO pins (for the Spunk board) */
- write_mmcr_word(SC520_PIOPFS31_16, 0xfff0); /* set the GPIO pin function 31-16 reg */
- write_mmcr_word(SC520_PIOPFS15_0, 0x000f); /* set the GPIO pin function 15-0 reg */
- write_mmcr_word(SC520_PIODIR31_16, 0x000f); /* set the GPIO direction 31-16 reg */
- write_mmcr_word(SC520_PIODIR15_0, 0x1ff0); /* set the GPIO direction 15-0 reg */
- write_mmcr_byte(SC520_CSPFS, 0xc0); /* set the CS pin function reg */
- write_mmcr_byte(SC520_CLKSEL, 0x70);
-
- write_mmcr_word(SC520_PIOCLR31_16, 0x0003); /* reset SSI chip-selects */
- write_mmcr_word(SC520_PIOSET31_16, 0x000c);
-
- } else {
- /* set up the GP IO pins (for the Hyglo board) */
- write_mmcr_word(SC520_PIOPFS31_16, 0xffc0); /* set the GPIO pin function 31-16 reg */
- write_mmcr_word(SC520_PIOPFS15_0, 0x1e7f); /* set the GPIO pin function 15-0 reg */
- write_mmcr_word(SC520_PIODIR31_16, 0x003f); /* set the GPIO direction 31-16 reg */
- write_mmcr_word(SC520_PIODIR15_0, 0xe180); /* set the GPIO direction 15-0 reg */
- write_mmcr_byte(SC520_CSPFS, 0x00); /* set the CS pin function reg */
- write_mmcr_byte(SC520_CLKSEL, 0x70);
-
- write_mmcr_word(SC520_PIOCLR15_0, 0x0180); /* reset SSI chip-selects */
- }
-
- write_mmcr_byte(SC520_GPCSRT, 1); /* set the GP CS offset */
- write_mmcr_byte(SC520_GPCSPW, 3); /* set the GP CS pulse width */
- write_mmcr_byte(SC520_GPCSOFF, 1); /* set the GP CS offset */
- write_mmcr_byte(SC520_GPRDW, 3); /* set the RD pulse width */
- write_mmcr_byte(SC520_GPRDOFF, 1); /* set the GP RD offset */
- write_mmcr_byte(SC520_GPWRW, 3); /* set the GP WR pulse width */
- write_mmcr_byte(SC520_GPWROFF, 1); /* set the GP WR offset */
-
- write_mmcr_word(SC520_BOOTCSCTL, 0x0407); /* set up timing of BOOTCS */
-
- /* adjust the memory map:
- * by default the first 256MB (0x00000000 - 0x0fffffff) is mapped to SDRAM
- * and 256MB to 1G-128k (0x1000000 - 0x37ffffff) is mapped to PCI mmio
- * we need to map 1G-128k - 1G (0x38000000 - 0x3fffffff) to CS1 */
-
-
- /* bootcs */
- write_mmcr_long(SC520_PAR12, 0x8bffe800);
-
- /* IDE0 = GPCS6 1f0-1f7 */
- write_mmcr_long(SC520_PAR3, 0x380801f0);
-
- /* IDE1 = GPCS7 3f6 */
- write_mmcr_long(SC520_PAR4, 0x3c0003f6);
-
- asm ("wbinvd\n"); /* Flush cache, req. after setting the unchached attribute ona PAR */
-
- write_mmcr_byte(SC520_ADDDECCTL, read_mmcr_byte(SC520_ADDDECCTL) & ~(UART2_DIS|UART1_DIS));
-
-}
-
-
-/* par usage:
- * PAR0 (legacy_video)
- * PAR1 (PCI ROM mapping)
- * PAR2
- * PAR3 IDE
- * PAR4 IDE
- * PAR5 (legacy_video)
- * PAR6
- * PAR7 (legacy_video)
- * PAR8 (legacy_video)
- * PAR9 (legacy_video)
- * PAR10
- * PAR11 (ISAROM)
- * PAR12 BOOTCS
- * PAR13
- * PAR14
- * PAR15
- */
-
-/*
- * This function should map a chunk of size bytes
- * of the system address space to the ISA bus
- *
- * The function will return the memory address
- * as seen by the host (which may very will be the
- * same as the bus address)
- */
-u32 isa_map_rom(u32 bus_addr, int size)
-{
- u32 par;
-
- printf("isa_map_rom asked to map %d bytes at %x\n",
- size, bus_addr);
-
- par = size;
- if (par < 0x80000) {
- par = 0x80000;
- }
- par >>= 12;
- par--;
- par&=0x7f;
- par <<= 18;
- par |= (bus_addr>>12);
- par |= 0x50000000;
-
- printf ("setting PAR11 to %x\n", par);
-
- /* Map rom 0x10000 with PAR1 */
- write_mmcr_long(SC520_PAR11, par);
-
- return bus_addr;
-}
-
-/*
- * this function removed any mapping created
- * with pci_get_rom_window()
- */
-void isa_unmap_rom(u32 addr)
-{
- printf("isa_unmap_rom asked to unmap %x", addr);
- if ((addr>>12) == (read_mmcr_long(SC520_PAR11)&0x3ffff)) {
- write_mmcr_long(SC520_PAR11, 0);
- printf(" done\n");
- return;
- }
- printf(" not ours\n");
-}
-
-#ifdef CONFIG_PCI
-#define PCI_ROM_TEMP_SPACE 0x10000
-/*
- * This function should map a chunk of size bytes
- * of the system address space to the PCI bus,
- * suitable to map PCI ROMS (bus address < 16M)
- * the function will return the host memory address
- * which should be converted into a bus address
- * before used to configure the PCI rom address
- * decoder
- */
-u32 pci_get_rom_window(struct pci_controller *hose, int size)
-{
- u32 par;
-
- par = size;
- if (par < 0x80000) {
- par = 0x80000;
- }
- par >>= 16;
- par--;
- par&=0x7ff;
- par <<= 14;
- par |= (PCI_ROM_TEMP_SPACE>>16);
- par |= 0x72000000;
-
- printf ("setting PAR1 to %x\n", par);
-
- /* Map rom 0x10000 with PAR1 */
- write_mmcr_long(SC520_PAR1, par);
-
- return PCI_ROM_TEMP_SPACE;
-}
-
-/*
- * this function removed any mapping created
- * with pci_get_rom_window()
- */
-void pci_remove_rom_window(struct pci_controller *hose, u32 addr)
-{
- printf("pci_remove_rom_window: %x", addr);
- if (addr == PCI_ROM_TEMP_SPACE) {
- write_mmcr_long(SC520_PAR1, 0);
- printf(" done\n");
- return;
- }
- printf(" not ours\n");
-
-}
-
-/*
- * This function is called in order to provide acces to the
- * legacy video I/O ports on the PCI bus.
- * After this function accesses to I/O ports 0x3b0-0x3bb and
- * 0x3c0-0x3df shuld result in transactions on the PCI bus.
- *
- */
-int pci_enable_legacy_video_ports(struct pci_controller *hose)
-{
- /* Map video memory to 0xa0000*/
- write_mmcr_long(SC520_PAR0, 0x7200400a);
-
- /* forward all I/O accesses to PCI */
- write_mmcr_byte(SC520_ADDDECCTL,
- read_mmcr_byte(SC520_ADDDECCTL) | IO_HOLE_DEST_PCI);
-
-
- /* so we map away all io ports to pci (only way to access pci io
- * below 0x400. But then we have to map back the portions that we dont
- * use so that the generate cycles on the GPIO bus where the sio and
- * ISA slots are connected, this requre the use of several PAR registers
- */
-
- /* bring 0x100 - 0x2f7 back to ISA using PAR5 */
- write_mmcr_long(SC520_PAR5, 0x31f70100);
-
- /* com2 use 2f8-2ff */
-
- /* bring 0x300 - 0x3af back to ISA using PAR7 */
- write_mmcr_long(SC520_PAR7, 0x30af0300);
-
- /* vga use 3b0-3bb */
-
- /* bring 0x3bc - 0x3bf back to ISA using PAR8 */
- write_mmcr_long(SC520_PAR8, 0x300303bc);
-
- /* vga use 3c0-3df */
-
- /* bring 0x3e0 - 0x3f7 back to ISA using PAR9 */
- write_mmcr_long(SC520_PAR9, 0x301703e0);
-
- /* com1 use 3f8-3ff */
-
- return 0;
-}
-#endif
-
-/*
- * Miscelaneous platform dependent initialisations
- */
-
-int board_init(void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- init_sc520();
- bus_init();
- irq_init();
-
- /* max drive current on SDRAM */
- write_mmcr_word(SC520_DSCTL, 0x0100);
-
- /* enter debug mode after next reset (only if jumper is also set) */
- write_mmcr_byte(SC520_RESCFG, 0x08);
- /* configure the software timer to 33.000MHz */
- write_mmcr_byte(SC520_SWTMRCFG, 1);
- gd->bus_clk = 33000000;
-
- return 0;
-}
-
-int dram_init(void)
-{
- init_sc520_dram();
- return 0;
-}
-
-void show_boot_progress(int val)
-{
- int version = read_mmcr_byte(SC520_SYSINFO);
-
- if (version == 0) {
- /* PIO31-PIO16 Data */
- write_mmcr_word(SC520_PIODATA31_16,
- (read_mmcr_word(SC520_PIODATA31_16) & 0xffc0)| ((val&0x7e)>>1)); /* 0x1f8 >> 3 */
-
- /* PIO0-PIO15 Data */
- write_mmcr_word(SC520_PIODATA15_0,
- (read_mmcr_word(SC520_PIODATA15_0) & 0x1fff)| ((val&0x7)<<13));
- } else {
- /* newer boards use PIO4-PIO12 */
- /* PIO0-PIO15 Data */
-#if 0
- val = (val & 0x007) | ((val & 0x038) << 3) | ((val & 0x1c0) >> 3);
-#else
- val = (val & 0x007) | ((val & 0x07e) << 2);
-#endif
- write_mmcr_word(SC520_PIODATA15_0,
- (read_mmcr_word(SC520_PIODATA15_0) & 0xe00f) | ((val&0x01ff)<<4));
- }
-}
-
-
-int last_stage_init(void)
-{
-
- int version = read_mmcr_byte(SC520_SYSINFO);
-
- printf("Omicron Ceti SC520 Spunk revision %x\n", version);
-
-#if 0
- if (version) {
- int x, y;
-
- printf("eeprom probe %d\n", spi_eeprom_probe(1));
-
- spi_eeprom_read(1, 0, (u8*)&x, 2);
- spi_eeprom_read(1, 1, (u8*)&y, 2);
- printf("eeprom bytes %04x%04x\n", x, y);
- x ^= 0xffff;
- y ^= 0xffff;
- spi_eeprom_write(1, 0, (u8*)&x, 2);
- spi_eeprom_write(1, 1, (u8*)&y, 2);
-
- spi_eeprom_read(1, 0, (u8*)&x, 2);
- spi_eeprom_read(1, 1, (u8*)&y, 2);
- printf("eeprom bytes %04x%04x\n", x, y);
-
- } else {
- int x, y;
-
- printf("eeprom probe %d\n", mw_eeprom_probe(1));
-
- mw_eeprom_read(1, 0, (u8*)&x, 2);
- mw_eeprom_read(1, 1, (u8*)&y, 2);
- printf("eeprom bytes %04x%04x\n", x, y);
-
- x ^= 0xffff;
- y ^= 0xffff;
- mw_eeprom_write(1, 0, (u8*)&x, 2);
- mw_eeprom_write(1, 1, (u8*)&y, 2);
-
- mw_eeprom_read(1, 0, (u8*)&x, 2);
- mw_eeprom_read(1, 1, (u8*)&y, 2);
- printf("eeprom bytes %04x%04x\n", x, y);
-
-
- }
-#endif
-
- ds1722_probe(2);
-
- return 0;
-}
-
-void ssi_chip_select(int dev)
-{
- int version = read_mmcr_byte(SC520_SYSINFO);
-
- if (version) {
- /* Spunk board: EEPROM and CAN are actove-low, TEMP and AUX are active high */
- switch (dev) {
- case 1: /* EEPROM */
- write_mmcr_word(SC520_PIOCLR31_16, 0x0004);
- break;
-
- case 2: /* Temp Probe */
- write_mmcr_word(SC520_PIOSET31_16, 0x0002);
- break;
-
- case 3: /* CAN */
- write_mmcr_word(SC520_PIOCLR31_16, 0x0008);
- break;
-
- case 4: /* AUX */
- write_mmcr_word(SC520_PIOSET31_16, 0x0001);
- break;
-
- case 0:
- write_mmcr_word(SC520_PIOCLR31_16, 0x0003);
- write_mmcr_word(SC520_PIOSET31_16, 0x000c);
- break;
-
- default:
- printf("Illegal SSI device requested: %d\n", dev);
- }
- } else {
-
- /* Globox board: Both EEPROM and TEMP are active-high */
-
- switch (dev) {
- case 1: /* EEPROM */
- write_mmcr_word(SC520_PIOSET15_0, 0x0100);
- break;
-
- case 2: /* Temp Probe */
- write_mmcr_word(SC520_PIOSET15_0, 0x0080);
- break;
-
- case 0:
- write_mmcr_word(SC520_PIOCLR15_0, 0x0180);
- break;
-
- default:
- printf("Illegal SSI device requested: %d\n", dev);
- }
- }
-}
-
-
-void spi_init_f(void)
-{
- read_mmcr_byte(SC520_SYSINFO) ?
- spi_eeprom_probe(1) :
- mw_eeprom_probe(1);
-
-}
-
-ssize_t spi_read(uchar *addr, int alen, uchar *buffer, int len)
-{
- int offset;
- int i;
-
- offset = 0;
- for (i=0;i<alen;i++) {
- offset <<= 8;
- offset |= addr[i];
- }
-
- return read_mmcr_byte(SC520_SYSINFO) ?
- spi_eeprom_read(1, offset, buffer, len) :
- mw_eeprom_read(1, offset, buffer, len);
-}
-
-ssize_t spi_write(uchar *addr, int alen, uchar *buffer, int len)
-{
- int offset;
- int i;
-
- offset = 0;
- for (i=0;i<alen;i++) {
- offset <<= 8;
- offset |= addr[i];
- }
-
- return read_mmcr_byte(SC520_SYSINFO) ?
- spi_eeprom_write(1, offset, buffer, len) :
- mw_eeprom_write(1, offset, buffer, len);
-}
diff --git a/board/sc520_spunk/sc520_spunk_asm.S b/board/sc520_spunk/sc520_spunk_asm.S
deleted file mode 100644
index 8b3410399b..0000000000
--- a/board/sc520_spunk/sc520_spunk_asm.S
+++ /dev/null
@@ -1,81 +0,0 @@
-/*
- * (C) Copyright 2002
- * Daniel Engström, Omicron Ceti AB <daniel@omicron.se>.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/* now setup the General purpose bus to give us access to the LEDs.
- * We can then use the leds to display status information.
- */
-
-sc520_cdp_registers:
-/* size offset value */
-.word 1 ; .word 0x040 ; .long 0x00 /* SDRAM buffer control */
-.word 2 ; .word 0xc08 ; .long 0x0001 /* GP CS offset */
-.word 2 ; .word 0xc09 ; .long 0x0003 /* GP CS width */
-.word 2 ; .word 0xc0a ; .long 0x0001 /* GP CS width */
-.word 2 ; .word 0xc0b ; .long 0x0003 /* GP RD pulse width */
-.word 2 ; .word 0xc0c ; .long 0x0001 /* GP RD offse */
-.word 2 ; .word 0xc0d ; .long 0x0003 /* GP WR pulse width */
-.word 2 ; .word 0xc0e ; .long 0x0001 /* GP WR offset */
-.word 2 ; .word 0xc2c ; .long 0x003f /* GPIO directionreg 31-16 */
-.word 2 ; .word 0xc2a ; .long 0xe000 /* GPIO directionreg 15-0 */
-.word 2 ; .word 0xc22 ; .long 0xffc0 /* GPIO pin function 31-16 reg */
-.word 2 ; .word 0xc20 ; .long 0x1fff /* GPIO pin function 15-0 reg */
-.word 0 ; .word 0x000 ; .long 0x00
-
-/* board early intialization */
-.globl early_board_init
-early_board_init:
- movl $sc520_cdp_registers,%esi
-init_loop:
- movl $0xfffef000,%edi /* MMCR base to edi */
- movw (%esi), %bx /* load size to bx */
- cmpw $0, %bx /* if size is 0 we're done */
- je done
- xorl %edx,%edx
- movw 2(%esi), %dx /* load MMCR offset to dx */
- addl %edx, %edi /* add offset to base in edi */
- movl 4(%esi), %eax /* load value in eax */
- cmpw $1, %bx
- je byte /* byte op? */
- cmpw $2, %bx
- je word /* word op? */
- movl %eax, (%edi) /* must be long, then */
- jmp next
-byte: movb %al,(%edi)
- jmp next
-word: movw %ax,(%edi)
-next: addl $8, %esi /* advance esi */
- jmp init_loop
-
- /* light all leds */
-done: movl $0xfffefc32,%edx
- movw $0000,(%edx)
-
- jmp *%ebp /* return to caller */
-
-
-.globl __show_boot_progress
-__show_boot_progress:
- movl $0xfffefc32,%edx
- xorw $0xffff, %ax
- movw %ax,(%edx)
- jmp *%ebp
diff --git a/board/sc520_spunk/sc520_spunk_asm16.S b/board/sc520_spunk/sc520_spunk_asm16.S
deleted file mode 100644
index 8bb1766b50..0000000000
--- a/board/sc520_spunk/sc520_spunk_asm16.S
+++ /dev/null
@@ -1,83 +0,0 @@
-/*
- * (C) Copyright 2002
- * Daniel Engström, Omicron Ceti AB <daniel@omicron.se>.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * 16bit initialization code.
- * This code have to map the area of the boot flash
- * that is used by U-boot to its final destination.
- */
-
-.text
-.section .start16, "ax"
-.code16
-.globl board_init16
-board_init16:
- /* Alias MMCR to 0xdf000 */
- movw $0xfffc, %dx
- movl $0x800df0cb, %eax
- outl %eax, %dx
-
- /* Set ds to point to MMCR alias */
- movw $0xdf00, %ax
- movw %ax, %ds
-
- /* Map the entire flash at 0x38000000
- * (with BOOTCS and PAR14, use 0xabfff800 for ROMCS1) */
- movl $0xc0, %edi
- movl $0x8bfff800, %eax
- movl %eax, (%di)
-
- /* Disable SDRAM write buffer */
- movw $0x40,%di
- xorw %ax,%ax
- movb %al, (%di)
-
- /* Disabe MMCR alias */
- movw $0xfffc, %dx
- movl $0x000000cb, %eax
- outl %eax, %dx
-
- /* the return address is stored in bp */
- jmp *%bp
-
-
-.section .bios, "ax"
-.code16
-.globl realmode_reset
-realmode_reset:
- /* Alias MMCR to 0xdf000 */
- movw $0xfffc, %dx
- movl $0x800df0cb, %eax
- outl %eax, %dx
-
- /* Set ds to point to MMCR alias */
- movw $0xdf00, %ax
- movw %ax, %ds
-
- /* issue software reset thorugh MMCR */
- movl $0xd72, %edi
- movb $0x01, %al
- movb %al, (%di)
-
-1: hlt
- jmp 1
diff --git a/board/sc520_spunk/u-boot.lds b/board/sc520_spunk/u-boot.lds
deleted file mode 100644
index 127d707e6b..0000000000
--- a/board/sc520_spunk/u-boot.lds
+++ /dev/null
@@ -1,92 +0,0 @@
-
-/*
- * (C) Copyright 2002
- * Daniel Engström, Omicron Ceti AB, daniel@omicron.se.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT("elf32-i386", "elf32-i386", "elf32-i386")
-OUTPUT_ARCH(i386)
-ENTRY(_start)
-
-SECTIONS
-{
- . = 0x387c0000; /* Where bootcode in the flash is mapped */
- .text : { *(.text); }
-
- . = ALIGN(4);
- .rodata : { *(.rodata) }
-
- . = 0x400000; /* Ram data segment to use */
- _i386boot_romdata_dest = ABSOLUTE(.);
- .data : AT ( LOADADDR(.rodata) + SIZEOF(.rodata) ) { *(.data) }
- _i386boot_romdata_start = LOADADDR(.data);
-
- . = ALIGN(4);
- .got : AT ( LOADADDR(.data) + SIZEOF(.data) ) { *(.got) }
- _i386boot_romdata_size = SIZEOF(.data) + SIZEOF(.got);
-
-
- . = ALIGN(4);
- _i386boot_bss_start = ABSOLUTE(.);
- .bss : { *(.bss) }
- _i386boot_bss_size = SIZEOF(.bss);
-
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- /* 16bit realmode trampoline code */
- .realmode 0x7c0 : AT ( LOADADDR(.got) + SIZEOF(.got) ) { *(.realmode) }
-
- _i386boot_realmode = LOADADDR(.realmode);
- _i386boot_realmode_size = SIZEOF(.realmode);
-
- /* 16bit BIOS emulation code (just enough to boot Linux) */
- .bios 0 : AT ( LOADADDR(.realmode) + SIZEOF(.realmode) ) { *(.bios) }
-
- _i386boot_bios = LOADADDR(.bios);
- _i386boot_bios_size = SIZEOF(.bios);
-
-
- /* The load addresses below assumes that the flash
- * will be mapped so that 0x387f0000 == 0xffff0000
- * at reset time
- *
- * The fe00 and ff00 offsets of the start32 and start16
- * segments are arbitrary, the just have to be mapped
- * at reset and the code have to fit.
- * The fff0 offset of reset is important, however.
- */
-
-
- . = 0xfffffe00;
- .start32 : AT (0x387ffe00) { *(.start32); }
-
- . = 0xff00;
- .start16 : AT (0x387fff00) { *(.start16); }
-
- . = 0xfff0;
- .reset : AT (0x387ffff0) { *(.reset); }
- _i386boot_end = (LOADADDR(.reset) + SIZEOF(.reset) );
-}
diff --git a/board/scb9328/Makefile b/board/scb9328/Makefile
deleted file mode 100644
index 5dc3fd4e47..0000000000
--- a/board/scb9328/Makefile
+++ /dev/null
@@ -1,47 +0,0 @@
-#
-# (C) Copyright 2000-2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := scb9328.o flash.o
-SOBJS := lowlevel_init.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $^
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/scb9328/config.mk b/board/scb9328/config.mk
deleted file mode 100644
index 8d1d79ac90..0000000000
--- a/board/scb9328/config.mk
+++ /dev/null
@@ -1,10 +0,0 @@
-#
-# This config file is used for compilation of scb93328 sources
-#
-# You might change location of U-Boot in memory by setting right TEXT_BASE.
-# This allows for example having one copy located at the end of ram and stored
-# in flash device and later on while developing use other location to test
-# the code in RAM device only.
-#
-
-TEXT_BASE = 0x08f00000
diff --git a/board/scb9328/flash.c b/board/scb9328/flash.c
deleted file mode 100644
index 1b56f8c6aa..0000000000
--- a/board/scb9328/flash.c
+++ /dev/null
@@ -1,321 +0,0 @@
-/*
- * Copyright (C) 2003 ETC s.r.o.
- *
- * This code was inspired by Marius Groeger and Kyle Harris code
- * available in other board ports for U-Boot
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- * Written by Peter Figuli <peposh@etc.sk>, 2003.
- *
- */
-
-#include <common.h>
-#include "intel.h"
-
-
-/*
- * This code should handle CFI FLASH memory device. This code is very
- * minimalistic approach without many essential error handling code as well.
- * Because U-Boot actually is missing smart handling of FLASH device,
- * we just set flash_id to anything else to FLASH_UNKNOW, so common code
- * can call us without any restrictions.
- * TODO: Add CFI Query, to be able to determine FLASH device.
- * TODO: Add error handling code
- * NOTE: This code was tested with BUS_WIDTH 4 and ITERLEAVE 2 only, but
- * hopefully may work with other configurations.
- */
-
-#if ( SCB9328_FLASH_BUS_WIDTH == 1 )
-# define FLASH_BUS vu_char
-# if ( SCB9328_FLASH_INTERLEAVE == 1 )
-# define FLASH_CMD( x ) x
-# else
-# error "With 8bit bus only one chip is allowed"
-# endif
-
-
-#elif ( SCB9328_FLASH_BUS_WIDTH == 2 )
-# define FLASH_BUS vu_short
-# if ( SCB9328_FLASH_INTERLEAVE == 1 )
-# define FLASH_CMD( x ) x
-# elif ( SCB9328_FLASH_INTERLEAVE == 2 )
-# define FLASH_CMD( x ) (( x << 8 )| x )
-# else
-# error "With 16bit bus only 1 or 2 chip(s) are allowed"
-# endif
-
-
-#elif ( SCB9328_FLASH_BUS_WIDTH == 4 )
-# define FLASH_BUS vu_long
-# if ( SCB9328_FLASH_INTERLEAVE == 1 )
-# define FLASH_CMD( x ) x
-# elif ( SCB9328_FLASH_INTERLEAVE == 2 )
-# define FLASH_CMD( x ) (( x << 16 )| x )
-# elif ( SCB9328_FLASH_INTERLEAVE == 4 )
-# define FLASH_CMD( x ) (( x << 24 )|( x << 16 ) ( x << 8 )| x )
-# else
-# error "With 32bit bus only 1,2 or 4 chip(s) are allowed"
-# endif
-
-#else
-# error "Flash bus width might be 1,2,4 for 8,16,32 bit configuration"
-#endif
-
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
-
-static FLASH_BUS flash_status_reg (void)
-{
-
- FLASH_BUS *addr = (FLASH_BUS *) 0;
-
- *addr = FLASH_CMD (CFI_INTEL_CMD_READ_STATUS_REGISTER);
-
- return *addr;
-}
-
-static int flash_ready (ulong timeout)
-{
- int ok = 1;
-
- reset_timer_masked ();
- while ((flash_status_reg () & FLASH_CMD (CFI_INTEL_SR_READY)) !=
- FLASH_CMD (CFI_INTEL_SR_READY)) {
- if (get_timer_masked () > timeout && timeout != 0) {
- ok = 0;
- break;
- }
- }
- return ok;
-}
-
-#if ( CFG_MAX_FLASH_BANKS != 1 )
-# error "SCB9328 platform has only one flash bank!"
-#endif
-
-
-ulong flash_init (void)
-{
- int i;
- unsigned long address = SCB9328_FLASH_BASE;
-
- flash_info[0].size = SCB9328_FLASH_BANK_SIZE;
- flash_info[0].sector_count = CFG_MAX_FLASH_SECT;
- flash_info[0].flash_id = INTEL_MANUFACT;
- memset (flash_info[0].protect, 0, CFG_MAX_FLASH_SECT);
-
- for (i = 0; i < CFG_MAX_FLASH_SECT; i++) {
- flash_info[0].start[i] = address;
-#ifdef SCB9328_FLASH_UNLOCK
- /* Some devices are hw locked after start. */
- *((FLASH_BUS *) address) = FLASH_CMD (CFI_INTEL_CMD_LOCK_SETUP);
- *((FLASH_BUS *) address) = FLASH_CMD (CFI_INTEL_CMD_UNLOCK_BLOCK);
- flash_ready (0);
- *((FLASH_BUS *) address) = FLASH_CMD (CFI_INTEL_CMD_READ_ARRAY);
-#endif
- address += SCB9328_FLASH_SECT_SIZE;
- }
-
- flash_protect (FLAG_PROTECT_SET,
- CFG_FLASH_BASE,
- CFG_FLASH_BASE + monitor_flash_len - 1,
- &flash_info[0]);
-
- flash_protect (FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0]);
-
- return SCB9328_FLASH_BANK_SIZE;
-}
-
-void flash_print_info (flash_info_t * info)
-{
- int i;
-
- printf (" Intel vendor\n");
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; i++) {
- if (!(i % 5)) {
- printf ("\n");
- }
-
- printf (" %08lX%s", info->start[i],
- info->protect[i] ? " (RO)" : " ");
- }
- printf ("\n");
-}
-
-
-int flash_erase (flash_info_t * info, int s_first, int s_last)
-{
- int flag, non_protected = 0, sector;
- int rc = ERR_OK;
-
- FLASH_BUS *address;
-
- for (sector = s_first; sector <= s_last; sector++) {
- if (!info->protect[sector]) {
- non_protected++;
- }
- }
-
- if (!non_protected) {
- return ERR_PROTECTED;
- }
-
- /*
- * Disable interrupts which might cause a timeout
- * here. Remember that our exception vectors are
- * at address 0 in the flash, and we don't want a
- * (ticker) exception to happen while the flash
- * chip is in programming mode.
- */
- flag = disable_interrupts ();
-
-
- /* Start erase on unprotected sectors */
- for (sector = s_first; sector <= s_last && !ctrlc (); sector++) {
- if (info->protect[sector]) {
- printf ("Protected sector %2d skipping...\n", sector);
- continue;
- } else {
- printf ("Erasing sector %2d ... ", sector);
- }
-
- address = (FLASH_BUS *) (info->start[sector]);
-
- *address = FLASH_CMD (CFI_INTEL_CMD_BLOCK_ERASE);
- *address = FLASH_CMD (CFI_INTEL_CMD_CONFIRM);
- if (flash_ready (CFG_FLASH_ERASE_TOUT)) {
- *address = FLASH_CMD (CFI_INTEL_CMD_CLEAR_STATUS_REGISTER);
- printf ("ok.\n");
- } else {
- *address = FLASH_CMD (CFI_INTEL_CMD_SUSPEND);
- rc = ERR_TIMOUT;
- printf ("timeout! Aborting...\n");
- break;
- }
- *address = FLASH_CMD (CFI_INTEL_CMD_READ_ARRAY);
- }
- if (ctrlc ())
- printf ("User Interrupt!\n");
-
- /* allow flash to settle - wait 10 ms */
- udelay_masked (10000);
- if (flag) {
- enable_interrupts ();
- }
-
- return rc;
-}
-
-static int write_data (flash_info_t * info, ulong dest, FLASH_BUS data)
-{
- FLASH_BUS *address = (FLASH_BUS *) dest;
- int rc = ERR_OK;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*address & data) != data) {
- return ERR_NOT_ERASED;
- }
-
- /*
- * Disable interrupts which might cause a timeout
- * here. Remember that our exception vectors are
- * at address 0 in the flash, and we don't want a
- * (ticker) exception to happen while the flash
- * chip is in programming mode.
- */
-
- flag = disable_interrupts ();
-
- *address = FLASH_CMD (CFI_INTEL_CMD_CLEAR_STATUS_REGISTER);
- *address = FLASH_CMD (CFI_INTEL_CMD_PROGRAM1);
- *address = data;
-
- if (!flash_ready (CFG_FLASH_WRITE_TOUT)) {
- *address = FLASH_CMD (CFI_INTEL_CMD_SUSPEND);
- rc = ERR_TIMOUT;
- printf ("timeout! Aborting...\n");
- }
-
- *address = FLASH_CMD (CFI_INTEL_CMD_READ_ARRAY);
- if (flag) {
- enable_interrupts ();
- }
-
- return rc;
-}
-
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- ulong read_addr, write_addr;
- FLASH_BUS data;
- int i, result = ERR_OK;
-
-
- read_addr = addr & ~(sizeof (FLASH_BUS) - 1);
- write_addr = read_addr;
- if (read_addr != addr) {
- data = 0;
- for (i = 0; i < sizeof (FLASH_BUS); i++) {
- if (read_addr < addr || cnt == 0) {
- data |= *((uchar *) read_addr) << i * 8;
- } else {
- data |= (*src++) << i * 8;
- cnt--;
- }
- read_addr++;
- }
- if ((result = write_data (info, write_addr, data)) != ERR_OK) {
- return result;
- }
- write_addr += sizeof (FLASH_BUS);
- }
- for (; cnt >= sizeof (FLASH_BUS); cnt -= sizeof (FLASH_BUS)) {
- if ((result = write_data (info, write_addr,
- *((FLASH_BUS *) src))) != ERR_OK) {
- return result;
- }
- write_addr += sizeof (FLASH_BUS);
- src += sizeof (FLASH_BUS);
- }
- if (cnt > 0) {
- read_addr = write_addr;
- data = 0;
- for (i = 0; i < sizeof (FLASH_BUS); i++) {
- if (cnt > 0) {
- data |= (*src++) << i * 8;
- cnt--;
- } else {
- data |= *((uchar *) read_addr) << i * 8;
- }
- read_addr++;
- }
- if ((result = write_data (info, write_addr, data)) != 0) {
- return result;
- }
- }
- return ERR_OK;
-}
diff --git a/board/scb9328/intel.h b/board/scb9328/intel.h
deleted file mode 100644
index 77498b6e1d..0000000000
--- a/board/scb9328/intel.h
+++ /dev/null
@@ -1,99 +0,0 @@
-/*
- * Copyright (C) 2002 ETC s.r.o.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the ETC s.r.o. nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * Written by Marcel Telka <marcel@telka.sk>, 2002.
- *
- * Documentation:
- * [1] Intel Corporation, "3 Volt Intel Strata Flash Memory 28F128J3A, 28F640J3A,
- * 28F320J3A (x8/x16)", April 2002, Order Number: 290667-011
- * [2] Intel Corporation, "3 Volt Synchronous Intel Strata Flash Memory 28F640K3, 28F640K18,
- * 28F128K3, 28F128K18, 28F256K3, 28F256K18 (x16)", June 2002, Order Number: 290737-005
- *
- * This file is taken from OpenWinCE project hosted by SourceForge.net
- *
- */
-
-#ifndef FLASH_INTEL_H
-#define FLASH_INTEL_H
-
-#include <common.h>
-
-/* Intel CFI commands - see Table 4. in [1] and Table 3. in [2] */
-
-#define CFI_INTEL_CMD_READ_ARRAY 0xFF /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
-#define CFI_INTEL_CMD_READ_IDENTIFIER 0x90 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
-#define CFI_INTEL_CMD_READ_QUERY 0x98 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
-#define CFI_INTEL_CMD_READ_STATUS_REGISTER 0x70 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
-#define CFI_INTEL_CMD_CLEAR_STATUS_REGISTER 0x50 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
-#define CFI_INTEL_CMD_PROGRAM1 0x40 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
-#define CFI_INTEL_CMD_PROGRAM2 0x10 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
-#define CFI_INTEL_CMD_WRITE_TO_BUFFER 0xE8 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
-#define CFI_INTEL_CMD_CONFIRM 0xD0 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
-#define CFI_INTEL_CMD_BLOCK_ERASE 0x20 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
-#define CFI_INTEL_CMD_SUSPEND 0xB0 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
-#define CFI_INTEL_CMD_RESUME 0xD0 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
-#define CFI_INTEL_CMD_LOCK_SETUP 0x60 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
-#define CFI_INTEL_CMD_LOCK_BLOCK 0x01 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
-#define CFI_INTEL_CMD_UNLOCK_BLOCK 0xD0 /* 28FxxxJ3A - unlocks all blocks, 28FFxxxK3, 28FxxxK18 */
-#define CFI_INTEL_CMD_LOCK_DOWN_BLOCK 0x2F /* 28FxxxK3, 28FxxxK18 */
-
-/* Intel CFI Status Register bits - see Table 6. in [1] and Table 7. in [2] */
-
-#define CFI_INTEL_SR_READY 1 << 7 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
-#define CFI_INTEL_SR_ERASE_SUSPEND 1 << 6 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
-#define CFI_INTEL_SR_ERASE_ERROR 1 << 5 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
-#define CFI_INTEL_SR_PROGRAM_ERROR 1 << 4 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
-#define CFI_INTEL_SR_VPEN_ERROR 1 << 3 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
-#define CFI_INTEL_SR_PROGRAM_SUSPEND 1 << 2 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
-#define CFI_INTEL_SR_BLOCK_LOCKED 1 << 1 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
-#define CFI_INTEL_SR_BEFP 1 << 0 /* 28FxxxK3, 28FxxxK18 */
-
-/* Intel flash device ID codes for 28FxxxJ3A - see Table 5. in [1] */
-
-#define CFI_CHIP_INTEL_28F320J3A 0x0016
-#define CFI_CHIPN_INTEL_28F320J3A "28F320J3A"
-#define CFI_CHIP_INTEL_28F640J3A 0x0017
-#define CFI_CHIPN_INTEL_28F640J3A "28F640J3A"
-#define CFI_CHIP_INTEL_28F128J3A 0x0018
-#define CFI_CHIPN_INTEL_28F128J3A "28F128J3A"
-
-/* Intel flash device ID codes for 28FxxxK3 and 28FxxxK18 - see Table 8. in [2] */
-
-#define CFI_CHIP_INTEL_28F640K3 0x8801
-#define CFI_CHIPN_INTEL_28F640K3 "28F640K3"
-#define CFI_CHIP_INTEL_28F128K3 0x8802
-#define CFI_CHIPN_INTEL_28F128K3 "28F128K3"
-#define CFI_CHIP_INTEL_28F256K3 0x8803
-#define CFI_CHIPN_INTEL_28F256K3 "28F256K3"
-#define CFI_CHIP_INTEL_28F640K18 0x8805
-#define CFI_CHIPN_INTEL_28F640K18 "28F640K18"
-#define CFI_CHIP_INTEL_28F128K18 0x8806
-#define CFI_CHIPN_INTEL_28F128K18 "28F128K18"
-#define CFI_CHIP_INTEL_28F256K18 0x8807
-#define CFI_CHIPN_INTEL_28F256K18 "28F256K18"
-
-#endif /* FLASH_INTEL_H */
diff --git a/board/scb9328/lowlevel_init.S b/board/scb9328/lowlevel_init.S
deleted file mode 100644
index ba3b6d2418..0000000000
--- a/board/scb9328/lowlevel_init.S
+++ /dev/null
@@ -1,203 +0,0 @@
-/*
- * Copyright (C) 2004 Sascha Hauer, Synertronixx GmbH
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version 2
- * of the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
- * 02111-1307, USA.
- *
- */
-
-#include <config.h>
-#include <version.h>
-#include <asm/arch/imx-regs.h>
-
-.globl lowlevel_init
-lowlevel_init:
-
- mov r10, lr
-
-/* Change PERCLK1DIV to 14 ie 14+1 */
- ldr r0, =PCDR
- ldr r1, =CFG_PCDR_VAL
- str r1, [r0]
-
-/* set MCU PLL Control Register 0 */
-
- ldr r0, =MPCTL0
- ldr r1, =CFG_MPCTL0_VAL
- str r1, [r0]
-
-/* set mpll restart bit */
- ldr r0, =CSCR
- ldr r1, [r0]
- orr r1,r1,#(1<<21)
- str r1, [r0]
-
- mov r2,#0x10
-1:
- mov r3,#0x2000
-2:
- subs r3,r3,#1
- bne 2b
-
- subs r2,r2,#1
- bne 1b
-
-/* set System PLL Control Register 0 */
-
- ldr r0, =SPCTL0
- ldr r1, =CFG_SPCTL0_VAL
- str r1, [r0]
-
-/* set spll restart bit */
- ldr r0, =CSCR
- ldr r1, [r0]
- orr r1,r1,#(1<<22)
- str r1, [r0]
-
- mov r2,#0x10
-1:
- mov r3,#0x2000
-2:
- subs r3,r3,#1
- bne 2b
-
- subs r2,r2,#1
- bne 1b
-
- ldr r0, =CSCR
- ldr r1, =CFG_CSCR_VAL
- str r1, [r0]
-
-/* I have now read the ARM920 DataSheet back-to-Back, and have stumbled upon
- *this.....
- *
- * It would appear that from a Cold-Boot the ARM920T enters "FastBus" mode CP15
- * register 1, this stops it using the output of the PLL and thus runs at the
- * slow rate. Unless you place the Core into "Asynch" mode, the CPU will never
- * use the value set in the CM_OSC registers...regardless of what you set it
- * too! Thus, although i thought i was running at 140MHz, i'm actually running
- * at 40!..
-
- * Slapping this into my bootloader does the trick...
-
- * MRC p15,0,r0,c1,c0,0 ; read core configuration register
- * ORR r0,r0,#0xC0000000 ; set asynchronous clocks and not fastbus mode
- * MCR p15,0,r0,c1,c0,0 ; write modified value to core configuration
- * register
- */
- MRC p15,0,r0,c1,c0,0
- ORR r0,r0,#0xC0000000
- MCR p15,0,r0,c1,c0,0
-
- ldr r0, =GPR(0)
- ldr r1, =CFG_GPR_A_VAL
- str r1, [r0]
-
- ldr r0, =GIUS(0)
- ldr r1, =CFG_GIUS_A_VAL
- str r1, [r0]
-
-/* CS3 becomes CS3 by clearing reset default bit 1 in FMCR */
-
- ldr r0, =FMCR
- ldr r1, =CFG_FMCR_VAL
- str r1, [r0]
-
- ldr r0, =CS0U
- ldr r1, =CFG_CS0U_VAL
- str r1, [r0]
-
- ldr r0, =CS0L
- ldr r1, =CFG_CS0L_VAL
- str r1, [r0]
-
- ldr r0, =CS1U
- ldr r1, =CFG_CS1U_VAL
- str r1, [r0]
-
- ldr r0, =CS1L
- ldr r1, =CFG_CS1L_VAL
- str r1, [r0]
-
- ldr r0, =CS2U
- ldr r1, =CFG_CS2U_VAL
- str r1, [r0]
-
- ldr r0, =CS2L
- ldr r1, =CFG_CS2L_VAL
- str r1, [r0]
-
- ldr r0, =CS3U
- ldr r1, =CFG_CS3U_VAL
- str r1, [r0]
-
- ldr r0, =CS3L
- ldr r1, =CFG_CS3L_VAL
- str r1, [r0]
-
- ldr r0, =CS4U
- ldr r1, =CFG_CS4U_VAL
- str r1, [r0]
-
- ldr r0, =CS4L
- ldr r1, =CFG_CS4L_VAL
- str r1, [r0]
-
- ldr r0, =CS5U
- ldr r1, =CFG_CS5U_VAL
- str r1, [r0]
-
- ldr r0, =CS5L
- ldr r1, =CFG_CS5L_VAL
- str r1, [r0]
-
-/* SDRAM Setup */
-
- ldr r0, =SDCTL0
- ldr r1, =PRECHARGE_CMD
- str r1, [r0]
-
- ldr r0, =0x08200000
- ldr r1, =0x0 /* Issue Precharge all Command */
- str r1, [r0]
-
- ldr r0, =SDCTL0
- ldr r1, =AUTOREFRESH_CMD
- str r1, [r0]
-
- ldr r0, =0x08000000
- ldr r1, =0x0 /* Issue AutoRefresh Command */
- str r1, [r0]
- str r1, [r0]
- str r1, [r0]
- str r1, [r0]
- str r1, [r0]
- str r1, [r0]
- str r1, [r0]
- str r1, [r0]
-
- ldr r0, =SDCTL0
- ldr r1, =0xb10a8300
- str r1, [r0]
-
- ldr r0, =0x08223000 /* CAS Latency 2 */
- ldr r1, =0x0 /* Issue Mode Register Command, Burst Length = 8 */
- str r1, [r0]
-
- ldr r0, =SDCTL0
- ldr r1, =0x810a8200 /* Set to Normal Mode CAS 2 */
- str r1, [r0]
-
- mov pc,r10
diff --git a/board/scb9328/scb9328.c b/board/scb9328/scb9328.c
deleted file mode 100644
index 3ed8753e21..0000000000
--- a/board/scb9328/scb9328.c
+++ /dev/null
@@ -1,73 +0,0 @@
-/*
- * Copyright (C) 2004 Sascha Hauer, Synertronixx GmbH
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- */
-
-#include <common.h>
-
-#ifdef CONFIG_SHOW_BOOT_PROGRESS
-# define SHOW_BOOT_PROGRESS(arg) show_boot_progress(arg)
-#else
-# define SHOW_BOOT_PROGRESS(arg)
-#endif
-
-int board_init( void ){
- DECLARE_GLOBAL_DATA_PTR;
-
- gd->bd->bi_arch_number = MACH_TYPE_SCB9328;
- gd->bd->bi_boot_params = 0x08000100;
-
- return 0;
-}
-
-int dram_init( void ){
- DECLARE_GLOBAL_DATA_PTR;
-
-#if ( CONFIG_NR_DRAM_BANKS > 0 )
- gd->bd->bi_dram[0].start = SCB9328_SDRAM_1;
- gd->bd->bi_dram[0].size = SCB9328_SDRAM_1_SIZE;
-#endif
-#if ( CONFIG_NR_DRAM_BANKS > 1 )
- gd->bd->bi_dram[1].start = SCB9328_SDRAM_2;
- gd->bd->bi_dram[1].size = SCB9328_SDRAM_2_SIZE;
-#endif
-#if ( CONFIG_NR_DRAM_BANKS > 2 )
- gd->bd->bi_dram[2].start = SCB9328_SDRAM_3;
- gd->bd->bi_dram[2].size = SCB9328_SDRAM_3_SIZE;
-#endif
-#if ( CONFIG_NR_DRAM_BANKS > 3 )
- gd->bd->bi_dram[3].start = SCB9328_SDRAM_4;
- gd->bd->bi_dram[3].size = SCB9328_SDRAM_4_SIZE;
-#endif
-
- return 0;
-}
-
-/**
- * show_boot_progress: - indicate state of the boot process
- *
- * @param status: Status number - see README for details.
- *
- * The CSB226 does only have 3 LEDs, so we switch them on at the most
- * important states (1, 5, 15).
- */
-
-void show_boot_progress (int status)
-{
- return;
-}
diff --git a/board/scb9328/u-boot.lds b/board/scb9328/u-boot.lds
deleted file mode 100644
index 1d1669cdea..0000000000
--- a/board/scb9328/u-boot.lds
+++ /dev/null
@@ -1,57 +0,0 @@
-/*
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- */
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-ENTRY(_start)
-SECTIONS
-{
- . = 0x00000000;
-
- . = ALIGN(4);
- .text :
- {
- cpu/arm920t/start.o (.text)
- *(.text)
- }
-
- . = ALIGN(4);
- .rodata : { *(.rodata) }
-
- . = ALIGN(4);
- .data : { *(.data) }
-
- . = ALIGN(4);
- .got : { *(.got) }
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = ALIGN(4);
- __bss_start = .;
- .bss : { *(.bss) }
- _end = .;
-}
diff --git a/board/shannon/Makefile b/board/shannon/Makefile
deleted file mode 100644
index f66b096a4f..0000000000
--- a/board/shannon/Makefile
+++ /dev/null
@@ -1,47 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := shannon.o flash.o
-SOBJS := lowlevel_init.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS) $(SOBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/shannon/config.mk b/board/shannon/config.mk
deleted file mode 100644
index ca45733af0..0000000000
--- a/board/shannon/config.mk
+++ /dev/null
@@ -1,23 +0,0 @@
-#
-# LART board with SA1100 cpu
-#
-# see http://www.lart.tudelft.nl/ for more information on LART
-#
-
-#
-# Tuxscreen has 4 banks of 4 MB DRAM each
-#
-# c000'0000
-# c800'0000
-# d000'0000
-# d800'0000
-#
-# Linux-Kernel is expected to be at c000'8000, entry c000'8000
-#
-# we load ourself to d838'0000, the upper 1 MB of the last (4th) bank
-#
-# download areas is c800'0000
-#
-
-
-TEXT_BASE = 0xd8380000
diff --git a/board/shannon/flash.c b/board/shannon/flash.c
deleted file mode 100644
index 13c01d8351..0000000000
--- a/board/shannon/flash.c
+++ /dev/null
@@ -1,473 +0,0 @@
-/*
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Alex Zuepke <azu@sysgo.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-
-ulong myflush(void);
-
-
-#define FLASH_BANK_SIZE 0x400000 /* 4 MB */
-#define MAIN_SECT_SIZE 0x20000 /* 128 KB */
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
-
-
-#define CMD_READ_ARRAY 0x00F000F0
-#define CMD_UNLOCK1 0x00AA00AA
-#define CMD_UNLOCK2 0x00550055
-#define CMD_ERASE_SETUP 0x00800080
-#define CMD_ERASE_CONFIRM 0x00300030
-#define CMD_PROGRAM 0x00A000A0
-#define CMD_UNLOCK_BYPASS 0x00200020
-
-#define MEM_FLASH_ADDR1 (*(volatile u32 *)(CFG_FLASH_BASE + (0x00000555 << 2)))
-#define MEM_FLASH_ADDR2 (*(volatile u32 *)(CFG_FLASH_BASE + (0x000002AA << 2)))
-
-#define BIT_ERASE_DONE 0x00800080
-#define BIT_RDY_MASK 0x00800080
-#define BIT_PROGRAM_ERROR 0x00200020
-#define BIT_TIMEOUT 0x80000000 /* our flag */
-
-#define READY 1
-#define ERR 2
-#define TMO 4
-
-/*-----------------------------------------------------------------------
- */
-
-ulong flash_init(void)
-{
- int i, j;
- ulong size = 0;
-
- for (i = 0; i < CFG_MAX_FLASH_BANKS; i++)
- {
- ulong flashbase = 0;
- flash_info[i].flash_id =
- (AMD_MANUFACT & FLASH_VENDMASK) |
- (AMD_ID_LV160B & FLASH_TYPEMASK);
- flash_info[i].size = FLASH_BANK_SIZE;
- flash_info[i].sector_count = CFG_MAX_FLASH_SECT;
- memset(flash_info[i].protect, 0, CFG_MAX_FLASH_SECT);
- if (i == 0)
- flashbase = PHYS_FLASH_1;
- else
- panic("configured too many flash banks!\n");
- for (j = 0; j < flash_info[i].sector_count; j++)
- {
-
- if (j <= 3)
- {
- /* 1st one is 32 KB */
- if (j == 0)
- {
- flash_info[i].start[j] = flashbase + 0;
- }
-
- /* 2nd and 3rd are both 16 KB */
- if ((j == 1) || (j == 2))
- {
- flash_info[i].start[j] = flashbase + 0x8000 + (j-1)*0x4000;
- }
-
- /* 4th 64 KB */
- if (j == 3)
- {
- flash_info[i].start[j] = flashbase + 0x10000;
- }
- }
- else
- {
- flash_info[i].start[j] = flashbase + (j - 3)*MAIN_SECT_SIZE;
- }
- }
- size += flash_info[i].size;
- }
-
- /*
- * Protect monitor and environment sectors
- * Inferno is complicated, it's hardware locked
- */
-#ifdef CONFIG_INFERNO
- /* first one, 0x00000 to 0x07fff */
- flash_protect(FLAG_PROTECT_SET,
- CFG_FLASH_BASE + 0x00000,
- CFG_FLASH_BASE + 0x08000 - 1,
- &flash_info[0]);
-
- /* third to 10th, 0x0c000 - 0xdffff */
- flash_protect(FLAG_PROTECT_SET,
- CFG_FLASH_BASE + 0x0c000,
- CFG_FLASH_BASE + 0xe0000 - 1,
- &flash_info[0]);
-#else
- flash_protect(FLAG_PROTECT_SET,
- CFG_FLASH_BASE,
- CFG_FLASH_BASE + monitor_flash_len - 1,
- &flash_info[0]);
-
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1,
- &flash_info[0]);
-#endif
- return size;
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t *info)
-{
- int i;
-
- switch (info->flash_id & FLASH_VENDMASK)
- {
- case (AMD_MANUFACT & FLASH_VENDMASK):
- printf("AMD: ");
- break;
- default:
- printf("Unknown Vendor ");
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK)
- {
- case (AMD_ID_LV160B & FLASH_TYPEMASK):
- printf("2x Amd29F160BB (16Mbit)\n");
- break;
- default:
- printf("Unknown Chip Type\n");
- goto Done;
- break;
- }
-
- printf(" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf(" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; i++)
- {
- if ((i % 5) == 0)
- {
- printf ("\n ");
- }
- printf (" %08lX%s", info->start[i],
- info->protect[i] ? " (RO)" : " ");
- }
- printf ("\n");
-
-Done:
- ;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- ulong result;
- int iflag, cflag, prot, sect;
- int rc = ERR_OK;
- int chip1, chip2;
-
- /* first look for protection bits */
-
- if (info->flash_id == FLASH_UNKNOWN)
- return ERR_UNKNOWN_FLASH_TYPE;
-
- if ((s_first < 0) || (s_first > s_last)) {
- return ERR_INVAL;
- }
-
- if ((info->flash_id & FLASH_VENDMASK) !=
- (AMD_MANUFACT & FLASH_VENDMASK)) {
- return ERR_UNKNOWN_FLASH_VENDOR;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
- if (prot)
- return ERR_PROTECTED;
-
- /*
- * Disable interrupts which might cause a timeout
- * here. Remember that our exception vectors are
- * at address 0 in the flash, and we don't want a
- * (ticker) exception to happen while the flash
- * chip is in programming mode.
- */
- cflag = icache_status();
- icache_disable();
- iflag = disable_interrupts();
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last && !ctrlc(); sect++)
- {
- printf("Erasing sector %2d ... ", sect);
-
- /* arm simple, non interrupt dependent timer */
- reset_timer_masked();
-
- if (info->protect[sect] == 0)
- { /* not protected */
- vu_long *addr = (vu_long *)(info->start[sect]);
-
- MEM_FLASH_ADDR1 = CMD_UNLOCK1;
- MEM_FLASH_ADDR2 = CMD_UNLOCK2;
- MEM_FLASH_ADDR1 = CMD_ERASE_SETUP;
-
- MEM_FLASH_ADDR1 = CMD_UNLOCK1;
- MEM_FLASH_ADDR2 = CMD_UNLOCK2;
- *addr = CMD_ERASE_CONFIRM;
-
- /* wait until flash is ready */
- chip1 = chip2 = 0;
-
- do
- {
- result = *addr;
-
- /* check timeout */
- if (get_timer_masked() > CFG_FLASH_ERASE_TOUT)
- {
- MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
- chip1 = TMO;
- break;
- }
-
- if (!chip1 && (result & 0xFFFF) & BIT_ERASE_DONE)
- chip1 = READY;
-
- if (!chip1 && (result & 0xFFFF) & BIT_PROGRAM_ERROR)
- chip1 = ERR;
-
- if (!chip2 && (result >> 16) & BIT_ERASE_DONE)
- chip2 = READY;
-
- if (!chip2 && (result >> 16) & BIT_PROGRAM_ERROR)
- chip2 = ERR;
-
- } while (!chip1 || !chip2);
-
- MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
-
- if (chip1 == ERR || chip2 == ERR)
- {
- rc = ERR_PROG_ERROR;
- goto outahere;
- }
- if (chip1 == TMO)
- {
- rc = ERR_TIMOUT;
- goto outahere;
- }
-
- printf("ok.\n");
- }
- else /* it was protected */
- {
- printf("protected!\n");
- }
- }
-
- if (ctrlc())
- printf("User Interrupt!\n");
-
-outahere:
- /* allow flash to settle - wait 10 ms */
- udelay_masked(10000);
-
- if (iflag)
- enable_interrupts();
-
- if (cflag)
- icache_enable();
-
- return rc;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash
- */
-
-volatile static int write_word (flash_info_t *info, ulong dest, ulong data)
-{
- vu_long *addr = (vu_long *)dest;
- ulong result;
- int rc = ERR_OK;
- int cflag, iflag;
- int chip1, chip2;
-
- /*
- * Check if Flash is (sufficiently) erased
- */
- result = *addr;
- if ((result & data) != data)
- return ERR_NOT_ERASED;
-
-
- /*
- * Disable interrupts which might cause a timeout
- * here. Remember that our exception vectors are
- * at address 0 in the flash, and we don't want a
- * (ticker) exception to happen while the flash
- * chip is in programming mode.
- */
- cflag = icache_status();
- icache_disable();
- iflag = disable_interrupts();
-
- MEM_FLASH_ADDR1 = CMD_UNLOCK1;
- MEM_FLASH_ADDR2 = CMD_UNLOCK2;
- MEM_FLASH_ADDR1 = CMD_UNLOCK_BYPASS;
- *addr = CMD_PROGRAM;
- *addr = data;
-
- /* arm simple, non interrupt dependent timer */
- reset_timer_masked();
-
- /* wait until flash is ready */
- chip1 = chip2 = 0;
- do
- {
- result = *addr;
-
- /* check timeout */
- if (get_timer_masked() > CFG_FLASH_ERASE_TOUT)
- {
- chip1 = ERR | TMO;
- break;
- }
- if (!chip1 && ((result & 0x80) == (data & 0x80)))
- chip1 = READY;
-
- if (!chip1 && ((result & 0xFFFF) & BIT_PROGRAM_ERROR))
- {
- result = *addr;
-
- if ((result & 0x80) == (data & 0x80))
- chip1 = READY;
- else
- chip1 = ERR;
- }
-
- if (!chip2 && ((result & (0x80 << 16)) == (data & (0x80 << 16))))
- chip2 = READY;
-
- if (!chip2 && ((result >> 16) & BIT_PROGRAM_ERROR))
- {
- result = *addr;
-
- if ((result & (0x80 << 16)) == (data & (0x80 << 16)))
- chip2 = READY;
- else
- chip2 = ERR;
- }
-
- } while (!chip1 || !chip2);
-
- *addr = CMD_READ_ARRAY;
-
- if (chip1 == ERR || chip2 == ERR || *addr != data)
- rc = ERR_PROG_ERROR;
-
- if (iflag)
- enable_interrupts();
-
- if (cflag)
- icache_enable();
-
- return rc;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash.
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int l;
- int i, rc;
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data >> 8) | (*(uchar *)cp << 24);
- }
- for (; i<4 && cnt>0; ++i) {
- data = (data >> 8) | (*src++ << 24);
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<4; ++i, ++cp) {
- data = (data >> 8) | (*(uchar *)cp << 24);
- }
-
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = *((vu_long*)src);
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- src += 4;
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return ERR_OK;
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
- data = (data >> 8) | (*src++ << 24);
- --cnt;
- }
- for (; i<4; ++i, ++cp) {
- data = (data >> 8) | (*(uchar *)cp << 24);
- }
-
- return write_word(info, wp, data);
-}
diff --git a/board/shannon/lowlevel_init.S b/board/shannon/lowlevel_init.S
deleted file mode 100644
index 0655c42d3b..0000000000
--- a/board/shannon/lowlevel_init.S
+++ /dev/null
@@ -1,92 +0,0 @@
-/*
- * Memory Setup stuff - taken from blob memsetup.S
- *
- * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) and
- * Jan-Derk Bakker (J.D.Bakker@its.tudelft.nl)
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-
-#include <config.h>
-#include <version.h>
-
-
-/* some parameters for the board */
-
-MEM_BASE: .long 0xa0000000
-MEM_START: .long 0xc0000000
-
-#define MDCNFG 0x00
-#define MDCAS0 0x04
-#define MDCAS1 0x08
-#define MDCAS2 0x0c
-#define MSC0 0x10
-#define MSC1 0x14
-#define MECR 0x18
-
-mdcas0: .long 0xc71c703f @ cccccccf
-mdcas1: .long 0xffc71c71 @ fffffffc
-mdcas2: .long 0xffffffff @ ffffffff
-mdcnfg: .long 0x0334b21f @ 9326991f
-msc0: .long 0xfff84458 @ 42304230
-msc1: .long 0xffffffff @ 20182018
-mecr: .long 0x7fff7fff @ 01000000
-
-/* setting up the memory */
-
-.globl lowlevel_init
-lowlevel_init:
- ldr r0, MEM_BASE
-
- /* Setup the flash memory */
- ldr r1, msc0
- str r1, [r0, #MSC0]
-
- /* Set up the DRAM */
-
- /* MDCAS0 */
- ldr r1, mdcas0
- str r1, [r0, #MDCAS0]
-
- /* MDCAS1 */
- ldr r1, mdcas1
- str r1, [r0, #MDCAS1]
-
- /* MDCAS2 */
- ldr r1, mdcas2
- str r1, [r0, #MDCAS2]
-
- /* MDCNFG */
- ldr r1, mdcnfg
- str r1, [r0, #MDCNFG]
-
- /* Set up PCMCIA space */
- ldr r1, mecr
- str r1, [r0, #MECR]
-
- /* Load something to activate bank */
- ldr r1, MEM_START
-
-.rept 8
- ldr r0, [r1]
-.endr
-
- /* everything is fine now */
- mov pc, lr
diff --git a/board/shannon/shannon.c b/board/shannon/shannon.c
deleted file mode 100644
index 0d9f146d52..0000000000
--- a/board/shannon/shannon.c
+++ /dev/null
@@ -1,103 +0,0 @@
-/*
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Alex Zuepke <azu@sysgo.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-
-/* ------------------------------------------------------------------------- */
-
-
-/*
- * Miscelaneous platform dependent initialisations
- */
-
-int board_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- /* memory and cpu-speed are setup before relocation */
- /* but if we use InfernoLoader, we must do some inits here */
-
-#ifdef CONFIG_INFERNO
- {
- unsigned long temp;
- __asm__ __volatile__(/* disable MMU, enable icache */
- "mrc p15, 0, %0, c1, c0\n"
- "bic %0, %0, #0x00002000\n"
- "bic %0, %0, #0x0000000f\n"
- "orr %0, %0, #0x00001000\n"
- "orr %0, %0, #0x00000002\n"
- "mcr p15, 0, %0, c1, c0\n"
- /* flush caches */
- "mov %0, #0\n"
- "mcr p15, 0, %0, c7, c7, 0\n"
- "mcr p15, 0, %0, c8, c7, 0\n"
- : "=r" (temp)
- :
- : "memory");
- /* setup PCMCIA timing */
- temp = 0xa0000018;
- *(unsigned long *)temp = 0x00060006;
-
- }
-#endif /* CONFIG_INFERNO */
-
- /* arch number for shannon */
- gd->bd->bi_arch_number = MACH_TYPE_SHANNON;
-
- /* adress of boot parameters */
- gd->bd->bi_boot_params = 0xc0000100;
-
- return 0;
-}
-
-int dram_init (void)
-{
-#if defined(PHYS_SDRAM_1) || defined(PHYS_SDRAM_2) || \
- defined(PHYS_SDRAM_3) || defined(PHYS_SDRAM_4)
- DECLARE_GLOBAL_DATA_PTR;
- bd_t *bd = gd->bd;
-#endif
-
-#ifdef PHYS_SDRAM_1
- bd->bi_dram[0].start = PHYS_SDRAM_1;
- bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
-#endif
-
-#ifdef PHYS_SDRAM_2
- bd->bi_dram[1].start = PHYS_SDRAM_2;
- bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
-#endif
-
-#ifdef PHYS_SDRAM_3
- bd->bi_dram[2].start = PHYS_SDRAM_3;
- bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE;
-#endif
-
-#ifdef PHYS_SDRAM_4
- bd->bi_dram[3].start = PHYS_SDRAM_4;
- bd->bi_dram[3].size = PHYS_SDRAM_4_SIZE;
-#endif
-
- return (0);
-}
diff --git a/board/shannon/u-boot.lds b/board/shannon/u-boot.lds
deleted file mode 100644
index 258bece23c..0000000000
--- a/board/shannon/u-boot.lds
+++ /dev/null
@@ -1,56 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-ENTRY(_start)
-SECTIONS
-{
- . = 0x00000000;
-
- . = ALIGN(4);
- .text :
- {
- cpu/sa1100/start.o (.text)
- *(.text)
- }
-
- . = ALIGN(4);
- .rodata : { *(.rodata) }
-
- . = ALIGN(4);
- .data : { *(.data) }
-
- . = ALIGN(4);
- .got : { *(.got) }
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = ALIGN(4);
- __bss_start = .;
- .bss : { *(.bss) }
- _end = .;
-}
diff --git a/board/siemens/CCM/Makefile b/board/siemens/CCM/Makefile
deleted file mode 100644
index ee2fc53bb0..0000000000
--- a/board/siemens/CCM/Makefile
+++ /dev/null
@@ -1,41 +0,0 @@
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = ccm.o flash.o fpga_ccm.o ../common/fpga.o \
- ../../tqm8xx/load_sernum_ethaddr.o
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/siemens/CCM/ccm.c b/board/siemens/CCM/ccm.c
deleted file mode 100644
index 5a32e45e28..0000000000
--- a/board/siemens/CCM/ccm.c
+++ /dev/null
@@ -1,408 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-#include <commproc.h>
-#include <command.h>
-
-/* ------------------------------------------------------------------------- */
-
-static long int dram_size (long int, long int *, long int);
-void can_driver_enable (void);
-void can_driver_disable (void);
-
-int fpga_init(void);
-
-/* ------------------------------------------------------------------------- */
-
-#define _NOT_USED_ 0xFFFFFFFF
-
-const uint sdram_table[] =
-{
- /*
- * Single Read. (Offset 0 in UPMA RAM)
- */
- 0x1F0DFC04, 0xEEAFBC04, 0x11AF7C04, 0xEFBAFC00,
- 0x1FF5FC47, /* last */
- /*
- * SDRAM Initialization (offset 5 in UPMA RAM)
- *
- * This is no UPM entry point. The following definition uses
- * the remaining space to establish an initialization
- * sequence, which is executed by a RUN command.
- *
- */
- 0x1FF5FC34, 0xEFEABC34, 0x1FB57C35, /* last */
- /*
- * Burst Read. (Offset 8 in UPMA RAM)
- */
- 0x1F0DFC04, 0xEEAFBC04, 0x10AF7C04, 0xF0AFFC00,
- 0xF0AFFC00, 0xF1AFFC00, 0xEFBAFC00, 0x1FF5FC47, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Single Write. (Offset 18 in UPMA RAM)
- */
- 0x1F0DFC04, 0xEEABBC00, 0x01B27C04, 0x1FF5FC47, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Burst Write. (Offset 20 in UPMA RAM)
- */
- 0x1F0DFC04, 0xEEABBC00, 0x10A77C00, 0xF0AFFC00,
- 0xF0AFFC00, 0xE1BAFC04, 0x1FF5FC47, /* last */
- _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Refresh (Offset 30 in UPMA RAM)
- */
- 0x1FFD7C84, 0xFFFFFC04, 0xFFFFFC04, 0xFFFFFC04,
- 0xFFFFFC84, 0xFFFFFC07, /* last */
- _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Exception. (Offset 3c in UPMA RAM)
- */
- 0x7FFFFC07, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_,
-};
-
-/* ------------------------------------------------------------------------- */
-
-
-/*
- * Check Board Identity:
- *
- * Always return 1 (no second DRAM bank since based on TQM8xxL module)
- */
-
-int checkboard (void)
-{
- unsigned char *s;
- unsigned char buf[64];
-
- s = (getenv_r ("serial#", (char *)&buf, sizeof(buf)) > 0) ? buf : NULL;
-
- puts ("Board: Siemens CCM");
-
- if (s) {
- puts (" (");
-
- for (; *s; ++s) {
- if (*s == ' ')
- break;
- putc (*s);
- }
- putc (')');
- }
-
- putc ('\n');
-
- return (0);
-}
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * If Power-On-Reset switch off the Red and Green LED: At reset, the
- * data direction registers are cleared and must therefore be restored.
- */
-#define RSR_CSRS 0x08000000
-
-int power_on_reset(void)
-{
- /* Test Reset Status Register */
- return ((volatile immap_t *)CFG_IMMR)->im_clkrst.car_rsr & RSR_CSRS ? 0:1;
-}
-
-#define PB_LED_GREEN 0x10000 /* red LED is on PB.15 */
-#define PB_LED_RED 0x20000 /* red LED is on PB.14 */
-#define PB_LEDS (PB_LED_GREEN | PB_LED_RED);
-
-static void init_leds (void)
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
-
- immap->im_cpm.cp_pbpar &= ~PB_LEDS;
- immap->im_cpm.cp_pbodr &= ~PB_LEDS;
- immap->im_cpm.cp_pbdir |= PB_LEDS;
- /* Check stop reset status */
- if (power_on_reset()) {
- immap->im_cpm.cp_pbdat &= ~PB_LEDS;
- }
-}
-
-/* ------------------------------------------------------------------------- */
-
-long int initdram (int board_type)
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- long int size8, size9;
- long int size = 0;
- unsigned long reg;
-
- upmconfig(UPMA, (uint *)sdram_table, sizeof(sdram_table)/sizeof(uint));
-
- /*
- * Preliminary prescaler for refresh (depends on number of
- * banks): This value is selected for four cycles every 62.4 us
- * with two SDRAM banks or four cycles every 31.2 us with one
- * bank. It will be adjusted after memory sizing.
- */
- memctl->memc_mptpr = CFG_MPTPR_2BK_8K;
-
- memctl->memc_mar = 0x00000088;
-
- /*
- * Map controller banks 2 and 3 to the SDRAM banks 2 and 3 at
- * preliminary addresses - these have to be modified after the
- * SDRAM size has been determined.
- */
- memctl->memc_or2 = CFG_OR2_PRELIM;
- memctl->memc_br2 = CFG_BR2_PRELIM;
-
- memctl->memc_mamr = CFG_MAMR_8COL & (~(MAMR_PTAE)); /* no refresh yet */
-
- udelay(200);
-
- /* perform SDRAM initializsation sequence */
-
- memctl->memc_mcr = 0x80004105; /* SDRAM bank 0 */
- udelay(1);
- memctl->memc_mcr = 0x80004230; /* SDRAM bank 0 - execute twice */
- udelay(1);
-
- memctl->memc_mamr |= MAMR_PTAE; /* enable refresh */
-
- udelay (1000);
-
- /*
- * Check Bank 0 Memory Size for re-configuration
- *
- * try 8 column mode
- */
- size8 = dram_size (CFG_MAMR_8COL, SDRAM_BASE2_PRELIM, SDRAM_MAX_SIZE);
-
- udelay (1000);
-
- /*
- * try 9 column mode
- */
- size9 = dram_size (CFG_MAMR_9COL, SDRAM_BASE2_PRELIM, SDRAM_MAX_SIZE);
-
- if (size8 < size9) { /* leave configuration at 9 columns */
- size = size9;
-/* debug ("SDRAM in 9 column mode: %ld MB\n", size >> 20); */
- } else { /* back to 8 columns */
- size = size8;
- memctl->memc_mamr = CFG_MAMR_8COL;
- udelay(500);
-/* debug ("SDRAM in 8 column mode: %ld MB\n", size >> 20); */
- }
-
- udelay (1000);
-
- /*
- * Adjust refresh rate depending on SDRAM type
- * For types > 128 MBit leave it at the current (fast) rate
- */
- if (size < 0x02000000) {
- /* reduce to 15.6 us (62.4 us / quad) */
- memctl->memc_mptpr = CFG_MPTPR_2BK_4K;
- udelay(1000);
- }
-
- /*
- * Final mapping
- */
-
- memctl->memc_or2 = ((-size) & 0xFFFF0000) | CFG_OR_TIMING_SDRAM;
- memctl->memc_br2 = (CFG_SDRAM_BASE & BR_BA_MSK) | BR_MS_UPMA | BR_V;
-
-
- /* adjust refresh rate depending on SDRAM type, one bank */
- reg = memctl->memc_mptpr;
- reg >>= 1; /* reduce to CFG_MPTPR_1BK_8K / _4K */
- memctl->memc_mptpr = reg;
-
- can_driver_enable ();
- init_leds ();
-
- udelay(10000);
-
- return (size);
-}
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Warning - both the PUMA load mode and the CAN driver use UPM B,
- * so make sure only one of both is active.
- */
-void can_driver_enable (void)
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
-
- /* Initialize MBMR */
- memctl->memc_mbmr = MBMR_GPL_B4DIS; /* GPL_B4 ouput line Disable */
-
- /* Initialize UPMB for CAN: single read */
- memctl->memc_mdr = 0xFFFFC004;
- memctl->memc_mcr = 0x0100 | UPMB;
-
- memctl->memc_mdr = 0x0FFFD004;
- memctl->memc_mcr = 0x0101 | UPMB;
-
- memctl->memc_mdr = 0x0FFFC000;
- memctl->memc_mcr = 0x0102 | UPMB;
-
- memctl->memc_mdr = 0x3FFFC004;
- memctl->memc_mcr = 0x0103 | UPMB;
-
- memctl->memc_mdr = 0xFFFFDC05;
- memctl->memc_mcr = 0x0104 | UPMB;
-
- /* Initialize UPMB for CAN: single write */
- memctl->memc_mdr = 0xFFFCC004;
- memctl->memc_mcr = 0x0118 | UPMB;
-
- memctl->memc_mdr = 0xCFFCD004;
- memctl->memc_mcr = 0x0119 | UPMB;
-
- memctl->memc_mdr = 0x0FFCC000;
- memctl->memc_mcr = 0x011A | UPMB;
-
- memctl->memc_mdr = 0x7FFCC004;
- memctl->memc_mcr = 0x011B | UPMB;
-
- memctl->memc_mdr = 0xFFFDCC05;
- memctl->memc_mcr = 0x011C | UPMB;
-
- /* Initialize OR3 / BR3 for CAN Bus Controller */
- memctl->memc_or3 = CFG_OR3_CAN;
- memctl->memc_br3 = CFG_BR3_CAN;
-}
-
-void can_driver_disable (void)
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
-
- /* Reset OR3 / BR3 to disable CAN Bus Controller */
- memctl->memc_br3 = 0;
- memctl->memc_or3 = 0;
-
- memctl->memc_mbmr = 0;
-}
-
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Check memory range for valid RAM. A simple memory test determines
- * the actually available RAM size between addresses `base' and
- * `base + maxsize'. Some (not all) hardware errors are detected:
- * - short between address lines
- * - short between data lines
- */
-
-static long int dram_size (long int mamr_value, long int *base, long int maxsize)
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
-
- memctl->memc_mamr = mamr_value;
-
- return (get_ram_size(base, maxsize));
-}
-
-/* ------------------------------------------------------------------------- */
-
-#define ETH_CFG_BITS (CFG_PB_ETH_CFG1 | CFG_PB_ETH_CFG2 | CFG_PB_ETH_CFG3 )
-
-#define ETH_ALL_BITS (ETH_CFG_BITS | CFG_PB_ETH_POWERDOWN)
-
-void reset_phy(void)
-{
- immap_t *immr = (immap_t *)CFG_IMMR;
- ulong value;
-
- /* Configure all needed port pins for GPIO */
-#ifdef CFG_ETH_MDDIS_VALUE
- immr->im_ioport.iop_padat |= CFG_PA_ETH_MDDIS;
-#else
- immr->im_ioport.iop_padat &= ~(CFG_PA_ETH_MDDIS | CFG_PA_ETH_RESET); /* Set low */
-#endif
- immr->im_ioport.iop_papar &= ~(CFG_PA_ETH_MDDIS | CFG_PA_ETH_RESET); /* GPIO */
- immr->im_ioport.iop_paodr &= ~(CFG_PA_ETH_MDDIS | CFG_PA_ETH_RESET); /* active output */
- immr->im_ioport.iop_padir |= CFG_PA_ETH_MDDIS | CFG_PA_ETH_RESET; /* output */
-
- immr->im_cpm.cp_pbpar &= ~(ETH_ALL_BITS); /* GPIO */
- immr->im_cpm.cp_pbodr &= ~(ETH_ALL_BITS); /* active output */
-
- value = immr->im_cpm.cp_pbdat;
-
- /* Assert Powerdown and Reset signals */
- value |= CFG_PB_ETH_POWERDOWN;
-
- /* PHY configuration includes MDDIS and CFG1 ... CFG3 */
-#ifdef CFG_ETH_CFG1_VALUE
- value |= CFG_PB_ETH_CFG1;
-#else
- value &= ~(CFG_PB_ETH_CFG1);
-#endif
-#ifdef CFG_ETH_CFG2_VALUE
- value |= CFG_PB_ETH_CFG2;
-#else
- value &= ~(CFG_PB_ETH_CFG2);
-#endif
-#ifdef CFG_ETH_CFG3_VALUE
- value |= CFG_PB_ETH_CFG3;
-#else
- value &= ~(CFG_PB_ETH_CFG3);
-#endif
-
- /* Drive output signals to initial state */
- immr->im_cpm.cp_pbdat = value;
- immr->im_cpm.cp_pbdir |= ETH_ALL_BITS;
- udelay (10000);
-
- /* De-assert Ethernet Powerdown */
- immr->im_cpm.cp_pbdat &= ~(CFG_PB_ETH_POWERDOWN); /* Enable PHY power */
- udelay (10000);
-
- /* de-assert RESET signal of PHY */
- immr->im_ioport.iop_padat |= CFG_PA_ETH_RESET;
- udelay (1000);
-}
-
-
-int misc_init_r (void)
-{
- fpga_init();
- return (0);
-}
-/* ------------------------------------------------------------------------- */
diff --git a/board/siemens/CCM/config.mk b/board/siemens/CCM/config.mk
deleted file mode 100644
index 9c72c79d3b..0000000000
--- a/board/siemens/CCM/config.mk
+++ /dev/null
@@ -1,28 +0,0 @@
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# TQM8xxL boards
-#
-
-TEXT_BASE = 0x40000000
diff --git a/board/siemens/CCM/flash.c b/board/siemens/CCM/flash.c
deleted file mode 100644
index 9c32785b48..0000000000
--- a/board/siemens/CCM/flash.c
+++ /dev/null
@@ -1,553 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (vu_long *addr, flash_info_t *info);
-static int write_word (flash_info_t *info, ulong dest, ulong data);
-static void flash_get_offsets (ulong base, flash_info_t *info);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- unsigned long size_b0, size_b1;
- int i;
-
- /* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* Static FLASH Bank configuration here - FIXME XXX */
-
- size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size_b0, size_b0<<20);
- }
-
- size_b1 = flash_get_size((vu_long *)FLASH_BASE1_PRELIM, &flash_info[1]);
-
- if (size_b1 > size_b0) {
- printf ("## ERROR: "
- "Bank 1 (0x%08lx = %ld MB) > Bank 0 (0x%08lx = %ld MB)\n",
- size_b1, size_b1<<20,
- size_b0, size_b0<<20
- );
- flash_info[0].flash_id = FLASH_UNKNOWN;
- flash_info[1].flash_id = FLASH_UNKNOWN;
- flash_info[0].sector_count = -1;
- flash_info[1].sector_count = -1;
- flash_info[0].size = 0;
- flash_info[1].size = 0;
- return (0);
- }
-
- /* Remap FLASH according to real size */
- memctl->memc_or0 = CFG_OR_TIMING_FLASH | (-size_b0 & 0xFFFF8000);
- memctl->memc_br0 = (CFG_FLASH_BASE & BR_BA_MSK) | BR_MS_GPCM | BR_V;
-
- /* Re-do sizing to get full correct info */
- size_b0 = flash_get_size((vu_long *)CFG_FLASH_BASE, &flash_info[0]);
-
- flash_get_offsets (CFG_FLASH_BASE, &flash_info[0]);
-
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
- /* monitor protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+monitor_flash_len-1,
- &flash_info[0]);
-#endif
-
- if (size_b1) {
- memctl->memc_or1 = CFG_OR_TIMING_FLASH | (-size_b1 & 0xFFFF8000);
- memctl->memc_br1 = ((CFG_FLASH_BASE + size_b0) & BR_BA_MSK) |
- BR_MS_GPCM | BR_V;
-
- /* Re-do sizing to get full correct info */
- size_b1 = flash_get_size((vu_long *)(CFG_FLASH_BASE + size_b0),
- &flash_info[1]);
-
- flash_get_offsets (CFG_FLASH_BASE + size_b0, &flash_info[1]);
-
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
- /* monitor protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+monitor_flash_len-1,
- &flash_info[1]);
-#endif
- } else {
- memctl->memc_br1 = 0; /* invalidate bank */
-
- flash_info[1].flash_id = FLASH_UNKNOWN;
- flash_info[1].sector_count = -1;
- }
-
- flash_info[0].size = size_b0;
- flash_info[1].size = size_b1;
-
- return (size_b0 + size_b1);
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_get_offsets (ulong base, flash_info_t *info)
-{
- int i;
-
- /* set up sector start address table */
- if (info->flash_id & FLASH_BTYPE) {
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00008000;
- info->start[2] = base + 0x0000C000;
- info->start[3] = base + 0x00010000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00020000) - 0x00060000;
- }
- } else {
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- info->start[i--] = base + info->size - 0x00008000;
- info->start[i--] = base + info->size - 0x0000C000;
- info->start[i--] = base + info->size - 0x00010000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00020000;
- }
- }
-
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD: printf ("AMD "); break;
- case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
- default: printf ("Unknown Vendor "); break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM400B: printf ("AM29LV400B (4 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM400T: printf ("AM29LV400T (4 Mbit, top boot sector)\n");
- break;
- case FLASH_AM800B: printf ("AM29LV800B (8 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM800T: printf ("AM29LV800T (8 Mbit, top boot sector)\n");
- break;
- case FLASH_AM160B: printf ("AM29LV160B (16 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM160T: printf ("AM29LV160T (16 Mbit, top boot sector)\n");
- break;
- case FLASH_AM320B: printf ("AM29LV320B (32 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM320T: printf ("AM29LV320T (32 Mbit, top boot sector)\n");
- break;
- default: printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " "
- );
- }
- printf ("\n");
- return;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-
-static ulong flash_get_size (vu_long *addr, flash_info_t *info)
-{
- short i;
- ulong value;
- ulong base = (ulong)addr;
-
-
- /* Write auto select command: read Manufacturer ID */
- addr[0x0555] = 0x00AA00AA;
- addr[0x02AA] = 0x00550055;
- addr[0x0555] = 0x00900090;
-
- value = addr[0];
-
- switch (value) {
- case AMD_MANUFACT:
- info->flash_id = FLASH_MAN_AMD;
- break;
- case FUJ_MANUFACT:
- info->flash_id = FLASH_MAN_FUJ;
- break;
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- return (0); /* no or unknown flash */
- }
-
- value = addr[1]; /* device ID */
-
- switch (value) {
- case AMD_ID_LV400T:
- info->flash_id += FLASH_AM400T;
- info->sector_count = 11;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case AMD_ID_LV400B:
- info->flash_id += FLASH_AM400B;
- info->sector_count = 11;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case AMD_ID_LV800T:
- info->flash_id += FLASH_AM800T;
- info->sector_count = 19;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case AMD_ID_LV800B:
- info->flash_id += FLASH_AM800B;
- info->sector_count = 19;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case AMD_ID_LV160T:
- info->flash_id += FLASH_AM160T;
- info->sector_count = 35;
- info->size = 0x00400000;
- break; /* => 4 MB */
-
- case AMD_ID_LV160B:
- info->flash_id += FLASH_AM160B;
- info->sector_count = 35;
- info->size = 0x00400000;
- break; /* => 4 MB */
-#if 0 /* enable when device IDs are available */
- case AMD_ID_LV320T:
- info->flash_id += FLASH_AM320T;
- info->sector_count = 67;
- info->size = 0x00800000;
- break; /* => 8 MB */
-
- case AMD_ID_LV320B:
- info->flash_id += FLASH_AM320B;
- info->sector_count = 67;
- info->size = 0x00800000;
- break; /* => 8 MB */
-#endif
- default:
- info->flash_id = FLASH_UNKNOWN;
- return (0); /* => no or unknown flash */
-
- }
-
- /* set up sector start address table */
- if (info->flash_id & FLASH_BTYPE) {
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00008000;
- info->start[2] = base + 0x0000C000;
- info->start[3] = base + 0x00010000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00020000) - 0x00060000;
- }
- } else {
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- info->start[i--] = base + info->size - 0x00008000;
- info->start[i--] = base + info->size - 0x0000C000;
- info->start[i--] = base + info->size - 0x00010000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00020000;
- }
- }
-
- /* check for protected sectors */
- for (i = 0; i < info->sector_count; i++) {
- /* read sector protection at sector address, (A7 .. A0) = 0x02 */
- /* D0 = 1 if protected */
- addr = (volatile unsigned long *)(info->start[i]);
- info->protect[i] = addr[2] & 1;
- }
-
- /*
- * Prevent writes to uninitialized FLASH.
- */
- if (info->flash_id != FLASH_UNKNOWN) {
- addr = (volatile unsigned long *)info->start[0];
-
- *addr = 0x00F000F0; /* reset bank */
- }
-
- return (info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- vu_long *addr = (vu_long*)(info->start[0]);
- int flag, prot, sect, l_sect;
- ulong start, now, last;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- if ((info->flash_id == FLASH_UNKNOWN) ||
- (info->flash_id > FLASH_AMD_COMP)) {
- printf ("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- l_sect = -1;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[0x0555] = 0x00AA00AA;
- addr[0x02AA] = 0x00550055;
- addr[0x0555] = 0x00800080;
- addr[0x0555] = 0x00AA00AA;
- addr[0x02AA] = 0x00550055;
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr = (vu_long*)(info->start[sect]);
- addr[0] = 0x00300030;
- l_sect = sect;
- }
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- /*
- * We wait for the last triggered sector
- */
- if (l_sect < 0)
- goto DONE;
-
- start = get_timer (0);
- last = start;
- addr = (vu_long*)(info->start[l_sect]);
- while ((addr[0] & 0x00800080) != 0x00800080) {
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- return 1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- }
-
-DONE:
- /* reset to read mode */
- addr = (volatile unsigned long *)info->start[0];
- addr[0] = 0x00F000F0; /* reset bank */
-
- printf (" done\n");
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int i, l, rc;
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
- for (; i<4 && cnt>0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = 0;
- for (i=0; i<4; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- return (write_word(info, wp, data));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word (flash_info_t *info, ulong dest, ulong data)
-{
- vu_long *addr = (vu_long*)(info->start[0]);
- ulong start;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*((vu_long *)dest) & data) != data) {
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[0x0555] = 0x00AA00AA;
- addr[0x02AA] = 0x00550055;
- addr[0x0555] = 0x00A000A0;
-
- *((vu_long *)dest) = data;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* data polling for D7 */
- start = get_timer (0);
- while ((*((vu_long *)dest) & 0x00800080) != (data & 0x00800080)) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- return (1);
- }
- }
- return (0);
-}
-
-/*-----------------------------------------------------------------------
- */
diff --git a/board/siemens/CCM/fpga_ccm.c b/board/siemens/CCM/fpga_ccm.c
deleted file mode 100644
index 11b97bcaa3..0000000000
--- a/board/siemens/CCM/fpga_ccm.c
+++ /dev/null
@@ -1,169 +0,0 @@
-/*
- * (C) Copyright 2002
- * Wolfgang Grandegger, DENX Software Engineering, wg@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-
-#include <common.h>
-#include <mpc8xx.h>
-#include <commproc.h>
-#include <common.h>
-
-#include "../common/fpga.h"
-
-fpga_t fpga_list[] = {
- { "PUMA" , PUMA_CONF_BASE ,
- CFG_PC_PUMA_INIT , CFG_PC_PUMA_PROG , CFG_PC_PUMA_DONE }
-};
-int fpga_count = sizeof(fpga_list) / sizeof(fpga_t);
-
-void can_driver_enable (void);
-void can_driver_disable (void);
-
-#define _NOT_USED_ 0xFFFFFFFF
-
-/*
- * PUMA access using UPM B
- */
-const uint puma_table[] =
-{
- /*
- * Single Read. (Offset 0 in UPM RAM)
- */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_,
- /*
- * Precharge and MRS
- */
- _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Burst Read. (Offset 8 in UPM RAM)
- */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Single Write. (Offset 18 in UPM RAM)
- */
- 0x0FFCF804, 0x0FFCF400, 0x3FFDFC47, /* last */
- _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Burst Write. (Offset 20 in UPM RAM)
- */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Refresh (Offset 30 in UPM RAM)
- */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Exception. (Offset 3c in UPM RAM)
- */
- 0x7FFFFC07, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_,
-};
-
-
-ulong fpga_control (fpga_t* fpga, int cmd)
-{
- volatile immap_t *immr = (immap_t *)CFG_IMMR;
- volatile memctl8xx_t *memctl = &immr->im_memctl;
-
- switch (cmd) {
- case FPGA_INIT_IS_HIGH:
- immr->im_ioport.iop_pcdir &= ~fpga->init_mask; /* input */
- return (immr->im_ioport.iop_pcdat & fpga->init_mask) ? 1:0;
-
- case FPGA_INIT_SET_LOW:
- immr->im_ioport.iop_pcdir |= fpga->init_mask; /* output */
- immr->im_ioport.iop_pcdat &= ~fpga->init_mask;
- break;
-
- case FPGA_INIT_SET_HIGH:
- immr->im_ioport.iop_pcdir |= fpga->init_mask; /* output */
- immr->im_ioport.iop_pcdat |= fpga->init_mask;
- break;
-
- case FPGA_PROG_SET_LOW:
- immr->im_ioport.iop_pcdat &= ~fpga->prog_mask;
- break;
-
- case FPGA_PROG_SET_HIGH:
- immr->im_ioport.iop_pcdat |= fpga->prog_mask;
- break;
-
- case FPGA_DONE_IS_HIGH:
- return (immr->im_ioport.iop_pcdat & fpga->done_mask) ? 1:0;
-
- case FPGA_READ_MODE:
- /* disable FPGA in memory controller */
- memctl->memc_br4 = 0;
- memctl->memc_or4 = PUMA_CONF_OR_READ;
- memctl->memc_br4 = PUMA_CONF_BR_READ;
-
- /* (re-) enable CAN drivers */
- can_driver_enable ();
-
- break;
-
- case FPGA_LOAD_MODE:
- /* disable FPGA in memory controller */
- memctl->memc_br4 = 0;
- /*
- * We must disable the CAN drivers first because
- * they use UPM B, too.
- */
- can_driver_disable ();
- /*
- * Configure UPMB for FPGA
- */
- upmconfig(UPMB,(uint *)puma_table,sizeof(puma_table)/sizeof(uint));
- memctl->memc_or4 = PUMA_CONF_OR_LOAD;
- memctl->memc_br4 = PUMA_CONF_BR_LOAD;
- break;
-
- case FPGA_GET_ID:
- return *(volatile ulong *)fpga->conf_base;
-
- case FPGA_INIT_PORTS:
- immr->im_ioport.iop_pcpar &= ~fpga->init_mask; /* INIT I/O */
- immr->im_ioport.iop_pcso &= ~fpga->init_mask;
- immr->im_ioport.iop_pcdir &= ~fpga->init_mask;
-
- immr->im_ioport.iop_pcpar &= ~fpga->prog_mask; /* PROG Output */
- immr->im_ioport.iop_pcso &= ~fpga->prog_mask;
- immr->im_ioport.iop_pcdir |= fpga->prog_mask;
-
- immr->im_ioport.iop_pcpar &= ~fpga->done_mask; /* DONE Input */
- immr->im_ioport.iop_pcso &= ~fpga->done_mask;
- immr->im_ioport.iop_pcdir &= ~fpga->done_mask;
-
- break;
-
- }
- return 0;
-}
diff --git a/board/siemens/CCM/u-boot.lds b/board/siemens/CCM/u-boot.lds
deleted file mode 100644
index cdf550f67b..0000000000
--- a/board/siemens/CCM/u-boot.lds
+++ /dev/null
@@ -1,141 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc8xx/start.o (.text)
- common/dlmalloc.o (.text)
- lib_ppc/ppcstring.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
- lib_generic/zlib.o (.text)
-
- . = env_offset;
- common/environment.o(.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/siemens/CCM/u-boot.lds.debug b/board/siemens/CCM/u-boot.lds.debug
deleted file mode 100644
index 3b50272ea6..0000000000
--- a/board/siemens/CCM/u-boot.lds.debug
+++ /dev/null
@@ -1,137 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc8xx/start.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
-/*
- . = env_offset;
- common/environment.o(.text)
-*/
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/siemens/IAD210/IAD210.c b/board/siemens/IAD210/IAD210.c
deleted file mode 100644
index e498937b65..0000000000
--- a/board/siemens/IAD210/IAD210.c
+++ /dev/null
@@ -1,286 +0,0 @@
-/*
- * (C) Copyright 2001
- * Paul Geerinckx
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-#include "atm.h"
-#include <i2c.h>
-
-/* ------------------------------------------------------------------------- */
-
-static long int dram_size (long int, long int *, long int);
-
-/* ------------------------------------------------------------------------- */
-
-/* used PLD registers */
-# define PLD_GCR1_REG (unsigned char *) (0x10000000 + 0)
-# define PLD_EXT_RES (unsigned char *) (0x10000000 + 10)
-# define PLD_EXT_FETH (unsigned char *) (0x10000000 + 11)
-# define PLD_EXT_LED (unsigned char *) (0x10000000 + 12)
-# define PLD_EXT_X21 (unsigned char *) (0x10000000 + 13)
-
-#define _NOT_USED_ 0xFFFFFFFF
-
-const uint sdram_table[] = {
- /*
- * Single Read. (Offset 0 in UPMA RAM)
- */
- 0xFE2DB004, 0xF0AA7004, 0xF0A5F400, 0xF3AFFC47, /* last */
- _NOT_USED_,
- /*
- * SDRAM Initialization (offset 5 in UPMA RAM)
- *
- * This is no UPM entry point. The following definition uses
- * the remaining space to establish an initialization
- * sequence, which is executed by a RUN command.
- *
- */
- 0xFFFAF834, 0xFFE5B435, /* last */
- _NOT_USED_,
- /*
- * Burst Read. (Offset 8 in UPMA RAM)
- */
- 0xFE2DB004, 0xF0AF7404, 0xF0AFFC00, 0xF0AFFC00,
- 0xF0AFFC00, 0xF0AAF800, 0xF1A5E447, /* last */
- _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Single Write. (Offset 18 in UPMA RAM)
- */
- 0xFE29B300, 0xF1A27304, 0xFFA5F747, /* last */
- _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Burst Write. (Offset 20 in UPMA RAM)
- */
- 0x1F0DFC04, 0xEEABBC00, 0x10A77C00, 0xF0AFFC00,
- 0xF1AAF804, 0xFFA5F447, /* last */
- _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Refresh (Offset 30 in UPMA RAM)
- */
- 0xFFAC3884, 0xFFAC3404, 0xFFAFFC04, 0xFFAFFC84,
- 0xFFAFFC07, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * MRS sequence (Offset 38 in UPMA RAM)
- */
- 0xFFAAB834, 0xFFA57434, 0xFFAFFC05, /* last */
- _NOT_USED_,
- /*
- * Exception. (Offset 3c in UPMA RAM)
- */
- 0xFFAFFC04, 0xFFAFFC05, /* last */
- _NOT_USED_, _NOT_USED_,
-};
-
-/* ------------------------------------------------------------------------- */
-
-
-long int initdram (int board_type)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- volatile iop8xx_t *iop = &immap->im_ioport;
- volatile fec_t *fecp = &immap->im_cpm.cp_fec;
- long int size;
-
- upmconfig (UPMA, (uint *) sdram_table,
- sizeof (sdram_table) / sizeof (uint));
-
- /*
- * Preliminary prescaler for refresh (depends on number of
- * banks): This value is selected for four cycles every 62.4 us
- * with two SDRAM banks or four cycles every 31.2 us with one
- * bank. It will be adjusted after memory sizing.
- */
- memctl->memc_mptpr = CFG_MPTPR;
-
- memctl->memc_mar = 0x00000088;
-
- /*
- * Map controller banks 2 and 3 to the SDRAM banks 2 and 3 at
- * preliminary addresses - these have to be modified after the
- * SDRAM size has been determined.
- */
- memctl->memc_or2 = CFG_OR2_PRELIM;
- memctl->memc_br2 = CFG_BR2_PRELIM;
-
- memctl->memc_mamr = CFG_MAMR & (~(MAMR_PTAE)); /* no refresh yet */
-
- udelay (200);
-
- /* perform SDRAM initializsation sequence */
-
- memctl->memc_mcr = 0x80004105; /* SDRAM bank 0 */
- udelay (1);
- memctl->memc_mcr = 0x80004230; /* SDRAM bank 0 - execute twice */
- udelay (1);
-
- memctl->memc_mcr = 0x80004105; /* SDRAM precharge */
- udelay (1);
- memctl->memc_mcr = 0x80004030; /* SDRAM 16x autorefresh */
- udelay (1);
- memctl->memc_mcr = 0x80004138; /* SDRAM upload parameters */
- udelay (1);
-
- memctl->memc_mamr |= MAMR_PTAE; /* enable refresh */
-
- udelay (1000);
-
- /*
- * Check Bank 0 Memory Size for re-configuration
- *
- */
- size = dram_size (CFG_MAMR, (long *) SDRAM_BASE_PRELIM,
- SDRAM_MAX_SIZE);
-
- udelay (1000);
-
-
- memctl->memc_mamr = CFG_MAMR;
- udelay (1000);
-
- /*
- * Final mapping
- */
- memctl->memc_or2 = ((-size) & 0xFFFF0000) | CFG_OR2_PRELIM;
- memctl->memc_br2 = ((CFG_SDRAM_BASE & BR_BA_MSK) | BR_MS_UPMA | BR_V);
-
- udelay (10000);
-
- /* prepare pin multiplexing for fast ethernet */
-
- atmLoad ();
- fecp->fec_ecntrl = 0x00000004; /* rev D3 pinmux SET */
- iop->iop_pdpar |= 0x0080; /* set pin as MII_clock */
-
-
- return (size);
-}
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Check memory range for valid RAM. A simple memory test determines
- * the actually available RAM size between addresses `base' and
- * `base + maxsize'. Some (not all) hardware errors are detected:
- * - short between address lines
- * - short between data lines
- */
-
-static long int dram_size (long int mamr_value, long int *base,
- long int maxsize)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
-
- memctl->memc_mamr = mamr_value;
-
- return (get_ram_size (base, maxsize));
-}
-
-/*
- * Check Board Identity:
- */
-
-int checkboard (void)
-{
- return (0);
-}
-
-void board_serial_init (void)
-{
- ; /* nothing to do here */
-}
-
-void board_ether_init (void)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile iop8xx_t *iop = &immap->im_ioport;
- volatile fec_t *fecp = &immap->im_cpm.cp_fec;
-
- atmLoad ();
- fecp->fec_ecntrl = 0x00000004; /* rev D3 pinmux SET */
- iop->iop_pdpar |= 0x0080; /* set pin as MII_clock */
-}
-
-int board_early_init_f (void)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile cpmtimer8xx_t *timers = &immap->im_cpmtimer;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- volatile iop8xx_t *iop = &immap->im_ioport;
-
- /* configure the LED timing output pins - port A pin 4 */
- iop->iop_papar = 0x0800;
- iop->iop_padir = 0x0800;
-
- /* start timer 2 for the 4hz LED blink rate */
- timers->cpmt_tmr2 = 0xff2c; /* 4hz for 64mhz */
- timers->cpmt_trr2 = 0x000003d0; /* clk/16 , prescale=256 */
- timers->cpmt_tgcr = 0x00000810; /* run timer 2 */
-
- /* chip select for PLD access */
- memctl->memc_br6 = 0x10000401;
- memctl->memc_or6 = 0xFC000908;
-
- /* PLD initial values ( set LEDs, remove reset on LXT) */
-
- *PLD_GCR1_REG = 0x06;
- *PLD_EXT_RES = 0xC0;
- *PLD_EXT_FETH = 0x40;
- *PLD_EXT_LED = 0xFF;
- *PLD_EXT_X21 = 0x04;
- return 0;
-}
-
-void board_get_enetaddr (uchar * addr)
-{
- int i;
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile cpm8xx_t *cpm = &immap->im_cpm;
- unsigned int rccrtmp;
-
- char default_mac_addr[] = { 0x00, 0x08, 0x01, 0x02, 0x03, 0x04 };
-
- for (i = 0; i < 6; i++)
- addr[i] = default_mac_addr[i];
-
- printf ("There is an error in the i2c driver .. /n");
- printf ("You need to fix it first....../n");
-
- rccrtmp = cpm->cp_rccr;
- cpm->cp_rccr |= 0x0020;
-
- i2c_reg_read (0xa0, 0);
- printf ("seep = '-%c-%c-%c-%c-%c-%c-'\n",
- i2c_reg_read (0xa0, 0), i2c_reg_read (0xa0, 0),
- i2c_reg_read (0xa0, 0), i2c_reg_read (0xa0, 0),
- i2c_reg_read (0xa0, 0), i2c_reg_read (0xa0, 0));
-
- cpm->cp_rccr = rccrtmp;
-}
diff --git a/board/siemens/IAD210/Makefile b/board/siemens/IAD210/Makefile
deleted file mode 100644
index 87a6893720..0000000000
--- a/board/siemens/IAD210/Makefile
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# (C) Copyright 2000, 2001, 2002
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o atm.o
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/siemens/IAD210/atm.c b/board/siemens/IAD210/atm.c
deleted file mode 100644
index c77e35912e..0000000000
--- a/board/siemens/IAD210/atm.c
+++ /dev/null
@@ -1,653 +0,0 @@
-
-#include <common.h>
-#include <mpc8xx.h>
-#include <commproc.h>
-
-#include "atm.h"
-#include <linux/stddef.h>
-
-#define SYNC __asm__("sync")
-#define ALIGN(p, a) ((char *)(((uint32)(p)+(a)-1) & ~((uint32)(a)-1)))
-
-#define FALSE 1
-#define TRUE 0
-#define OK 0
-#define ERROR -1
-
-struct atm_connection_t g_conn[NUM_CONNECTIONS] =
-{
- { NULL, 10, NULL, 10, NULL, NULL, NULL, NULL }, /* OAM */
-};
-
-struct atm_driver_t g_atm =
-{
- FALSE, /* loaded */
- FALSE, /* started */
- NULL, /* csram */
- 0, /* csram_size */
- NULL, /* am_top */
- NULL, /* ap_top */
- NULL, /* int_reload_ptr */
- NULL, /* int_serv_ptr */
- NULL, /* rbd_base_ptr */
- NULL, /* tbd_base_ptr */
- 0 /* linerate */
-};
-
-char csram[1024]; /* more than enough for doing nothing*/
-
-int atmLoad(void);
-void atmUnload(void);
-int atmMemInit(void);
-void atmIntInit(void);
-void atmApcInit(void);
-void atmAmtInit(void);
-void atmCpmInit(void);
-void atmUtpInit(void);
-
-/*****************************************************************************
- *
- * FUNCTION NAME: atmLoad
- *
- * DESCRIPTION: Basic ATM initialization.
- *
- * PARAMETERS: none
- *
- * RETURNS: OK or ERROR
- *
- ****************************************************************************/
-int atmLoad()
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile cpmtimer8xx_t *timers = &immap->im_cpmtimer;
- volatile iop8xx_t *iop = &immap->im_ioport;
-
- timers->cpmt_tgcr &= 0x0FFF; SYNC; /* Disable Timer 4 */
- immap->im_cpm.cp_scc[4].scc_gsmrl = 0x0; SYNC; /* Disable SCC4 */
- iop->iop_pdpar &= 0x3FFF; SYNC; /* Disable SAR and UTOPIA */
-
- if ( atmMemInit() != OK ) return ERROR;
-
- atmIntInit();
- atmApcInit();
- atmAmtInit();
- atmCpmInit();
- atmUtpInit();
-
- g_atm.loaded = TRUE;
-
- return OK;
-}
-
-/*****************************************************************************
- *
- * FUNCTION NAME: atmUnload
- *
- * DESCRIPTION: Disables ATM and UTOPIA.
- *
- * PARAMETERS: none
- *
- * RETURNS: void
- *
- ****************************************************************************/
-void atmUnload()
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile cpmtimer8xx_t *timers = &immap->im_cpmtimer;
- volatile iop8xx_t *iop = &immap->im_ioport;
-
- timers->cpmt_tgcr &= 0x0FFF; SYNC; /* Disable Timer 4 */
- immap->im_cpm.cp_scc[4].scc_gsmrl = 0x0; SYNC; /* Disable SCC4 */
- iop->iop_pdpar &= 0x3FFF; SYNC; /* Disable SAR and UTOPIA */
- g_atm.loaded = FALSE;
-}
-
-/*****************************************************************************
- *
- * FUNCTION NAME: atmMemInit
- *
- * DESCRIPTION:
- *
- * The ATM driver uses the following resources:
- *
- * A. Memory in DPRAM to hold
- *
- * 1/ CT = Connection Table ( RCT & TCT )
- * 2/ TCTE = Transmit Connection Table Extension
- * 3/ MPHYPT = Multi-PHY Pointing Table
- * 4/ APCP = APC Parameter Table
- * 5/ APCT_PRIO_1 = APC Table ( priority 1 for AAL1/2 )
- * 6/ APCT_PRIO_2 = APC Table ( priority 2 for VBR )
- * 7/ APCT_PRIO_3 = APC Table ( priority 3 for UBR )
- * 8/ TQ = Transmit Queue
- * 9/ AM = Address Matching Table
- * 10/ AP = Address Pointing Table
- *
- * B. Memory in cache safe RAM to hold
- *
- * 1/ INT = Interrupt Queue
- * 2/ RBD = Receive Buffer Descriptors
- * 3/ TBD = Transmit Buffer Descriptors
- *
- * This function
- * 1. clears the ATM DPRAM area,
- * 2. Allocates and clears cache safe memory,
- * 3. Initializes 'g_conn'.
- *
- * PARAMETERS: none
- *
- * RETURNS: OK or ERROR
- *
- ****************************************************************************/
-int atmMemInit()
-{
- int i;
- unsigned immr = CFG_IMMR;
- int total_num_rbd = 0;
- int total_num_tbd = 0;
-
- memset((char *)CFG_IMMR + 0x2000 + ATM_DPRAM_BEGIN, 0x00, ATM_DPRAM_SIZE);
-
- g_atm.csram_size = NUM_INT_ENTRIES * SIZE_OF_INT_ENTRY;
-
- for ( i = 0; i < NUM_CONNECTIONS; ++i ) {
- total_num_rbd += g_conn[i].num_rbd;
- total_num_tbd += g_conn[i].num_tbd;
- }
-
- g_atm.csram_size += total_num_rbd * SIZE_OF_RBD + total_num_tbd * SIZE_OF_TBD + 4;
-
- g_atm.csram = &csram[0];
- memset(&(g_atm.csram), 0x00, g_atm.csram_size);
-
- g_atm.int_reload_ptr = (uint32 *)ALIGN(g_atm.csram, 4);
- g_atm.rbd_base_ptr = (struct atm_bd_t *)(g_atm.int_reload_ptr + NUM_INT_ENTRIES);
- g_atm.tbd_base_ptr = (struct atm_bd_t *)(g_atm.rbd_base_ptr + total_num_rbd);
-
- g_conn[0].rbd_ptr = g_atm.rbd_base_ptr;
- g_conn[0].tbd_ptr = g_atm.tbd_base_ptr;
- g_conn[0].ct_ptr = CT_PTR(immr);
- g_conn[0].tcte_ptr = TCTE_PTR(immr);
-
- return OK;
-}
-
-/*****************************************************************************
- *
- * FUNCTION NAME: atmIntInit
- *
- * DESCRIPTION:
- *
- * Initialization of the MPC860 ESAR Interrupt Queue.
- * This function
- * - clears all entries in the INT,
- * - sets the WRAP bit of the last INT entry,
- * - initializes the 'int_serv_ptr' attribuut of the AtmDriver structure
- * to the first INT entry.
- *
- * PARAMETERS: none
- *
- * RETURNS: void
- *
- * REMARKS:
- *
- * - The INT resides in external cache safe memory.
- * - The base address of the INT is stored in g_atm.int_reload_ptr.
- * - The number of entries in the INT is given by NUM_INT_ENTRIES.
- * - The INTBASE field in SAR Parameter RAM is set by atmCpmInit().
- *
- ****************************************************************************/
-void atmIntInit()
-{
- int i;
- for ( i = 0; i < NUM_INT_ENTRIES - 1; ++i) g_atm.int_reload_ptr[i] = 0;
- g_atm.int_reload_ptr[i] = INT_WRAP;
- g_atm.int_serv_ptr = g_atm.int_reload_ptr;
-}
-
-/*****************************************************************************
- *
- * FUNCTION NAME: atmApcInit
- *
- * DESCRIPTION:
- *
- * This function initializes the following ATM Pace Controller related
- * data structures:
- *
- * - 1 MPHY Pointing Table (contains only one entry)
- * - 3 APC Parameter Tables (one PHY with 3 priorities)
- * - 3 APC Tables (one table for each priority)
- * - 1 Transmit Queue (one transmit queue per PHY)
- *
- * PARAMETERS: none
- *
- * RETURNS: void
- *
- ****************************************************************************/
-void atmApcInit()
-{
- int i;
- /* unsigned immr = CFG_IMMR; */
- uint16 * mphypt_ptr = MPHYPT_PTR(CFG_IMMR);
- struct apc_params_t * apcp_ptr = APCP_PTR(CFG_IMMR);
- uint16 * apct_prio1_ptr = APCT1_PTR(CFG_IMMR);
- uint16 * tq_ptr = TQ_PTR(CFG_IMMR);
- /***************************************************/
- /* Initialize MPHY Pointing Table (only one entry) */
- /***************************************************/
- *mphypt_ptr = APCP_BASE;
-
- /********************************************/
- /* Initialize APC parameters for priority 1 */
- /********************************************/
- apcp_ptr->apct_base1 = APCT_PRIO_1_BASE;
- apcp_ptr->apct_end1 = APCT_PRIO_1_BASE + NUM_APCT_PRIO_1_ENTRIES * 2;
- apcp_ptr->apct_ptr1 = APCT_PRIO_1_BASE;
- apcp_ptr->apct_sptr1 = APCT_PRIO_1_BASE;
- apcp_ptr->etqbase = TQ_BASE;
- apcp_ptr->etqend = TQ_BASE + ( NUM_TQ_ENTRIES - 1 ) * 2;
- apcp_ptr->etqaptr = TQ_BASE;
- apcp_ptr->etqtptr = TQ_BASE;
- apcp_ptr->apc_mi = 8;
- apcp_ptr->ncits = 0x0100; /* NCITS = 1 */
- apcp_ptr->apcnt = 0;
- apcp_ptr->reserved1 = 0;
- apcp_ptr->eapcst = 0x2009; /* LAST, ESAR, MPHY */
- apcp_ptr->ptp_counter = 0;
- apcp_ptr->ptp_txch = 0;
- apcp_ptr->reserved2 = 0;
-
-
- /***************************************************/
- /* Initialize APC Tables with empty slots (0xFFFF) */
- /***************************************************/
- for ( i = 0; i < NUM_APCT_PRIO_1_ENTRIES; ++i ) *(apct_prio1_ptr++) = 0xFFFF;
-
- /************************/
- /* Clear Transmit Queue */
- /************************/
- for ( i = 0; i < NUM_TQ_ENTRIES; ++i ) *(tq_ptr++) = 0;
-}
-
-/*****************************************************************************
- *
- * FUNCTION NAME: atmAmtInit
- *
- * DESCRIPTION:
- *
- * This function clears the first entry in the Address Matching Table and
- * lets the first entry in the Address Pointing table point to the first
- * entry in the TCT table (i.e. the raw cell channel).
- *
- * PARAMETERS: none
- *
- * RETURNS: void
- *
- * REMARKS:
- *
- * The values for the AMBASE, AMEND and APBASE registers in SAR parameter
- * RAM are initialized by atmCpmInit().
- *
- ****************************************************************************/
-void atmAmtInit()
-{
- unsigned immr = CFG_IMMR;
-
- g_atm.am_top = AM_PTR(immr);
- g_atm.ap_top = AP_PTR(immr);
-
- *(g_atm.ap_top--) = CT_BASE;
- *(g_atm.am_top--) = 0;
-}
-
-/*****************************************************************************
- *
- * FUNCTION NAME: atmCpmInit
- *
- * DESCRIPTION:
- *
- * This function initializes the Utopia Interface Parameter RAM Map
- * (SCC4, ATM Protocol) of the Communication Processor Modudule.
- *
- * PARAMETERS: none
- *
- * RETURNS: void
- *
- ****************************************************************************/
-void atmCpmInit()
-{
- unsigned immr = CFG_IMMR;
-
- memset((char *)immr + 0x3F00, 0x00, 0xC0);
-
- /*-----------------------------------------------------------------*/
- /* RBDBASE - Receive buffer descriptors base address */
- /* The RBDs reside in cache safe external memory. */
- /*-----------------------------------------------------------------*/
- *RBDBASE(immr) = (uint32)g_atm.rbd_base_ptr;
-
- /*-----------------------------------------------------------------*/
- /* SRFCR - SAR receive function code */
- /* 0-2 rsvd = 000 */
- /* 3-4 BO = 11 Byte ordering (big endian). */
- /* 5-7 FC = 000 Value driven on the address type signals AT[1-3] */
- /* when the SDMA channel accesses memory. */
- /*-----------------------------------------------------------------*/
- *SRFCR(immr) = 0x18;
-
- /*-----------------------------------------------------------------*/
- /* SRSTATE - SAR receive status */
- /* 0 EXT = 0 Extended mode off. */
- /* 1 ACP = 0 Valid only if EXT = 1. */
- /* 2 EC = 0 Standard 53-byte ATM cell. */
- /* 3 SNC = 0 In sync. Must be set to 0 during initialization. */
- /* 4 ESAR = 1 Enhanced SAR functionality enabled. */
- /* 5 MCF = 1 Management Cell Filter active. */
- /* 6 SER = 0 UTOPIA mode. */
- /* 7 MPY = 1 Multiple PHY mode. */
- /*-----------------------------------------------------------------*/
- *SRSTATE(immr) = 0x0D;
-
- /*-----------------------------------------------------------------*/
- /* MRBLR - Maximum receive buffer length register. */
- /* Must be cleared for ATM operation (see also SMRBLR). */
- /*-----------------------------------------------------------------*/
- *MRBLR(immr) = 0;
-
- /*-----------------------------------------------------------------*/
- /* RSTATE - SCC internal receive state parameters */
- /* The first byte must be initialized with the value of SRFCR. */
- /*-----------------------------------------------------------------*/
- *RSTATE(immr) = (uint32)(*SRFCR(immr)) << 24;
-
- /*-----------------------------------------------------------------*/
- /* STFCR - SAR transmit function code */
- /* 0-2 rsvd = 000 */
- /* 3-4 BO = 11 Byte ordering (big endian). */
- /* 5-7 FC = 000 Value driven on the address type signals AT[1-3] */
- /* when the SDMA channel accesses memory. */
- /*-----------------------------------------------------------------*/
- *STFCR(immr) = 0x18;
-
- /*-----------------------------------------------------------------*/
- /* SRSTATE - SAR transmit status */
- /* 0 EXT = 0 : Extended mode off */
- /* 1 rsvd = 0 : */
- /* 2 EC = 0 : Standard 53-byte ATM cell */
- /* 3 rsvd = 0 : */
- /* 4 ESAR = 1 : Enhanced SAR functionality enabled */
- /* 5 rsvd = 0 : */
- /* 6 SER = 0 : UTOPIA mode */
- /* 7 MPY = 1 : Multiple PHY mode */
- /*-----------------------------------------------------------------*/
- *STSTATE(immr) = 0x09;
-
- /*-----------------------------------------------------------------*/
- /* TBDBASE - Transmit buffer descriptors base address */
- /* The TBDs reside in cache safe external memory. */
- /*-----------------------------------------------------------------*/
- *TBDBASE(immr) = (uint32)g_atm.tbd_base_ptr;
-
- /*-----------------------------------------------------------------*/
- /* TSTATE - SCC internal transmit state parameters */
- /* The first byte must be initialized with the value of STFCR. */
- /*-----------------------------------------------------------------*/
- *TSTATE(immr) = (uint32)(*STFCR(immr)) << 24;
-
- /*-----------------------------------------------------------------*/
- /* CTBASE - Connection table base address */
- /* Offset from the beginning of DPRAM (64-byte aligned). */
- /*-----------------------------------------------------------------*/
- *CTBASE(immr) = CT_BASE;
-
- /*-----------------------------------------------------------------*/
- /* INTBASE - Interrupt queue base pointer. */
- /* The interrupt queue resides in cache safe external memory. */
- /*-----------------------------------------------------------------*/
- *INTBASE(immr) = (uint32)g_atm.int_reload_ptr;
-
- /*-----------------------------------------------------------------*/
- /* INTPTR - Pointer into interrupt queue. */
- /* Initialize to INTBASE. */
- /*-----------------------------------------------------------------*/
- *INTPTR(immr) = *INTBASE(immr);
-
- /*-----------------------------------------------------------------*/
- /* C_MASK - Constant mask for CRC32 */
- /* Must be initialized to 0xDEBB20E3. */
- /*-----------------------------------------------------------------*/
- *C_MASK(immr) = 0xDEBB20E3;
-
- /*-----------------------------------------------------------------*/
- /* INT_ICNT - Interrupt threshold value */
- /*-----------------------------------------------------------------*/
- *INT_ICNT(immr) = 1;
-
- /*-----------------------------------------------------------------*/
- /* INT_CNT - Interrupt counter */
- /* Initalize to INT_ICNT. Decremented for each interrupt entry */
- /* reported in the interrupt queue. On zero an interrupt is */
- /* signaled to the host by setting the GINT bit in the event */
- /* register. The counter is reinitialized with INT_ICNT. */
- /*-----------------------------------------------------------------*/
- *INT_CNT(immr) = *INT_ICNT(immr);
-
- /*-----------------------------------------------------------------*/
- /* SMRBLR - SAR maximum receive buffer length register. */
- /* Must be a multiple of 48 bytes. Common for all ATM connections. */
- /*-----------------------------------------------------------------*/
- *SMRBLR(immr) = SAR_RXB_SIZE;
-
- /*-----------------------------------------------------------------*/
- /* APCST - APC status register. */
- /* 0 rsvd 0 */
- /* 1-2 CSER 11 Initialize with the same value as NSER. */
- /* 3-4 NSER 11 Next serial or UTOPIA channel. */
- /* 5-7 rsvd 000 */
- /* 8-10 rsvd 000 */
- /* 11 rsvd 0 */
- /* 12 ESAR 1 UTOPIA Level 2 MPHY enabled. */
- /* 13 DIS 0 APC disable. Must be initiazed to 0. */
- /* 14 PL2 0 Not used. */
- /* 15 MPY 1 Multiple PHY mode on. */
- /*-----------------------------------------------------------------*/
- *APCST(immr) = 0x7809;
-
- /*-----------------------------------------------------------------*/
- /* APCPTR - Pointer to the APC parameter table */
- /* In MPHY master mode this parameter points to the MPHY pointing */
- /* table. 2-byte aligned. */
- /*-----------------------------------------------------------------*/
- *APCPTR(immr) = MPHYPT_BASE;
-
- /*-----------------------------------------------------------------*/
- /* HMASK - Header mask */
- /* Each incoming cell is masked with HMASK before being compared */
- /* to the entries in the address matching table. */
- /*-----------------------------------------------------------------*/
- *HMASK(immr) = AM_HMASK;
-
- /*-----------------------------------------------------------------*/
- /* AMBASE - Address matching table base address */
- /*-----------------------------------------------------------------*/
- *AMBASE(immr) = AM_BASE;
-
- /*-----------------------------------------------------------------*/
- /* AMEND - Address matching table end address */
- /*-----------------------------------------------------------------*/
- *AMEND(immr) = AM_BASE;
-
- /*-----------------------------------------------------------------*/
- /* APBASE - Address pointing table base address */
- /*-----------------------------------------------------------------*/
- *APBASE(immr) = AP_BASE;
-
- /*-----------------------------------------------------------------*/
- /* MPHYST - MPHY status register */
- /* 0-1 rsvd 00 */
- /* 2-6 NMPHY 00000 1 PHY */
- /* 7-9 rsvd 000 */
- /* 10-14 CMPHY 00000 Initialize with same value as NMPHY */
- /*-----------------------------------------------------------------*/
- *MPHYST(immr) = 0x0000;
-
- /*-----------------------------------------------------------------*/
- /* TCTEBASE - Transmit connection table extension base address */
- /* Offset from the beginning of DPRAM (32-byte aligned). */
- /*-----------------------------------------------------------------*/
- *TCTEBASE(immr) = TCTE_BASE;
-
- /*-----------------------------------------------------------------*/
- /* Clear not used registers. */
- /*-----------------------------------------------------------------*/
-}
-
-/*****************************************************************************
- *
- * FUNCTION NAME: atmUtpInit
- *
- * DESCRIPTION:
- *
- * This function initializes the ATM interface for
- *
- * - UTOPIA mode
- * - muxed bus
- * - master operation
- * - multi PHY (because of a bug in the MPC860P rev. E.0)
- * - internal clock = SYSCLK / 2
- *
- * EXTERNAL EFFECTS:
- *
- * After calling this function, the MPC860ESAR UTOPIA bus is
- * active and uses the following ports/pins:
- *
- * Port Pin Signal Description
- * ------ --- ------- -------------------------------------------
- * PB[15] R17 TxClav Transmit cell available input/output signal
- * PC[15] D16 RxClav Receive cell available input/output signal
- * PD[15] U17 UTPB[0] UTOPIA bus bit 0 input/output signal
- * PD[14] V19 UTPB[1] UTOPIA bus bit 1 input/output signal
- * PD[13] V18 UTPB[2] UTOPIA bus bit 2 input/output signal
- * PD[12] R16 UTPB[3] UTOPIA bus bit 3 input/output signal
- * PD[11] T16 RXENB Receive enable input/output signal
- * PD[10] W18 TXENB Transmit enable input/output signal
- * PD[9] V17 UTPCLK UTOPIA clock input/output signal
- * PD[7] T15 UTPB[4] UTOPIA bus bit 4 input/output signal
- * PD[6] V16 UTPB[5] UTOPIA bus bit 5 input/output signal
- * PD[5] U15 UTPB[6] UTOPIA bus bit 6 input/output signal
- * PD[4] U16 UTPB[7] UTOPIA bus bit 7 input/output signal
- * PD[3] W16 SOC Start of cell input/output signal
- *
- * PARAMETERS: none
- *
- * RETURNS: void
- *
- * REMARK:
- *
- * The ATM parameters and data structures must be configured before
- * initializing the UTOPIA port. The UTOPIA port activates immediately
- * upon initialization, and if its associated data structures are not
- * initialized, the CPM will lock up.
- *
- ****************************************************************************/
-void atmUtpInit()
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile iop8xx_t *iop = &immap->im_ioport;
- volatile car8xx_t *car = &immap->im_clkrst;
- volatile cpm8xx_t *cpm = &immap->im_cpm;
- int flag;
-
- flag = disable_interrupts();
-
- /*-----------------------------------------------------------------*/
- /* SCCR - System Clock Control Register */
- /* */
- /* The UTOPIA clock can be selected to be internal clock or */
- /* external clock (selected by the UTOPIA mode register). */
- /* In case of internal clock, the UTOPIA clock is derived from */
- /* the system frequency divided by two dividers. */
- /* Bits 27-31 of the SCCR register are defined to control the */
- /* UTOPIA clock. */
- /* */
- /* SCCR[27:29] DFUTP Division factor. Divide the system clock */
- /* by 2^DFUTP. */
- /* SCCR[30:31] DFAUTP Additional division factor. Divide the */
- /* system clock by the following value: */
- /* 00 = divide by 1 */
- /* 00 = divide by 3 */
- /* 10 = divide by 5 */
- /* 11 = divide by 7 */
- /* */
- /* Note that the UTOPIA clock must be programmed as to operate */
- /* within the range SYSCLK/10 .. 50Mhz. */
- /*-----------------------------------------------------------------*/
- car->car_sccr &= 0xFFFFFFE0;
- car->car_sccr |= 0x00000008; /* UTPCLK = SYSCLK / 4 */
-
- /*-----------------------------------------------------------------*/
- /* RCCR - RISC Controller Configuration Register */
- /* */
- /* RCCR[8] DR1M IDMA Request 0 Mode */
- /* 0 = edge sensitive */
- /* 1 = level sensitive */
- /* RCCR[9] DR0M IDMA Request 0 Mode */
- /* 0 = edge sensitive */
- /* 1 = level sensitive */
- /* RCCR[10:11] DRQP IDMA Request Priority */
- /* 00 = IDMA req. have more prio. than SCCs */
- /* 01 = IDMA req. have less prio. then SCCs */
- /* 10 = IDMA requests have the lowest prio. */
- /* 11 = reserved */
- /* */
- /* The RCCR[DR0M] and RCCR[DR1M] bits must be set to enable UTOPIA */
- /* operation. Also, program RCCR[DPQP] to 01 to give SCC transfers */
- /* higher priority. */
- /*-----------------------------------------------------------------*/
- cpm->cp_rccr &= 0xFF0F;
- cpm->cp_rccr |= 0x00D0;
-
- /*-----------------------------------------------------------------*/
- /* Port B - TxClav Signal */
- /*-----------------------------------------------------------------*/
- cpm->cp_pbpar |= 0x00010000; /* PBPAR[15] = 1 */
- cpm->cp_pbdir &= 0xFFFEFFFF; /* PBDIR[15] = 0 */
-
- /*-----------------------------------------------------------------*/
- /* UTOPIA Mode Register */
- /* */
- /* - muxed bus (master operation only) */
- /* - multi PHY (because of a bug in the MPC860P rev.E.0) */
- /* - internal clock */
- /* - no loopback */
- /* - do no activate statistical counters */
- /*-----------------------------------------------------------------*/
- iop->utmode = 0x00000004; SYNC;
-
- /*-----------------------------------------------------------------*/
- /* Port D - UTOPIA Data and Control Signals */
- /* */
- /* 15-12 UTPB[0:3] UTOPIA bus bit 0 - 3 input/output signals */
- /* 11 RXENB UTOPIA receive enable input/output signal */
- /* 10 TXENB UTOPIA transmit enable input/output signal */
- /* 9 TUPCLK UTOPIA clock input/output signal */
- /* 8 MII-MDC Used by MII in simult. MII and UTOPIA operation */
- /* 7-4 UTPB[4:7] UTOPIA bus bit 4 - 7 input/output signals */
- /* 3 SOC UTOPIA Start of cell input/output signal */
- /* 2 Reserved */
- /* 1 Enable UTOPIA mode */
- /* 0 Enable SAR */
- /*-----------------------------------------------------------------*/
- iop->iop_pdpar |= 0xDF7F; SYNC;
- iop->iop_pddir &= 0x2080; SYNC;
-
- /*-----------------------------------------------------------------*/
- /* Port C - RxClav Signal */
- /*-----------------------------------------------------------------*/
- iop->iop_pcpar |= 0x0001; /* PCPAR[15] = 1 */
- iop->iop_pcdir &= 0xFFFE; /* PCDIR[15] = 0 */
- iop->iop_pcso &= 0xFFFE; /* PCSO[15] = 0 */
-
- if (flag)
- enable_interrupts();
-}
diff --git a/board/siemens/IAD210/atm.h b/board/siemens/IAD210/atm.h
deleted file mode 100644
index 71b049725d..0000000000
--- a/board/siemens/IAD210/atm.h
+++ /dev/null
@@ -1,287 +0,0 @@
-typedef unsigned char uint8;
-typedef unsigned short uint16;
-typedef unsigned int uint32;
-typedef volatile unsigned char vuint8;
-typedef volatile unsigned short vuint16;
-typedef volatile unsigned int vuint32;
-
-
-#define DPRAM_ATM CFG_IMMR + 0x3000
-
-#define ATM_DPRAM_BEGIN (DPRAM_ATM - CFG_IMMR - 0x2000)
-#define NUM_CONNECTIONS 1
-#define SAR_RXB_SIZE 1584
-#define AM_HMASK 0x0FFFFFF0
-
-#define NUM_CT_ENTRIES (NUM_CONNECTIONS)
-#define NUM_TCTE_ENTRIES (NUM_CONNECTIONS)
-#define NUM_AM_ENTRIES (NUM_CONNECTIONS+1)
-#define NUM_AP_ENTRIES (NUM_CONNECTIONS+1)
-#define NUM_MPHYPT_ENTRIES 1
-#define NUM_APCP_ENTRIES 1
-#define NUM_APCT_PRIO_1_ENTRIES 146 /* Determines minimum rate */
-#define NUM_TQ_ENTRIES 12
-
-#define SIZE_OF_CT_ENTRY 64
-#define SIZE_OF_TCTE_ENTRY 32
-#define SIZE_OF_AM_ENTRY 4
-#define SIZE_OF_AP_ENTRY 2
-#define SIZE_OF_MPHYPT_ENTRY 2
-#define SIZE_OF_APCP_ENTRY 32
-#define SIZE_OF_APCT_ENTRY 2
-#define SIZE_OF_TQ_ENTRY 2
-
-#define CT_BASE ((ATM_DPRAM_BEGIN + 63) & 0xFFC0) /*64 */
-#define TCTE_BASE (CT_BASE + NUM_CT_ENTRIES * SIZE_OF_CT_ENTRY) /*32 */
-#define APCP_BASE (TCTE_BASE + NUM_TCTE_ENTRIES * SIZE_OF_TCTE_ENTRY) /*32 */
-#define AM_BEGIN (APCP_BASE + NUM_APCP_ENTRIES * SIZE_OF_APCP_ENTRY) /*4 */
-#define AM_BASE (AM_BEGIN + (NUM_AM_ENTRIES - 1) * SIZE_OF_AM_ENTRY)
-#define AP_BEGIN (AM_BEGIN + NUM_AM_ENTRIES * SIZE_OF_AM_ENTRY) /*2 */
-#define AP_BASE (AP_BEGIN + (NUM_AP_ENTRIES - 1) * SIZE_OF_AP_ENTRY)
-#define MPHYPT_BASE (AP_BEGIN + NUM_AP_ENTRIES * SIZE_OF_AP_ENTRY) /*2 */
-#define APCT_PRIO_1_BASE (MPHYPT_BASE + NUM_MPHYPT_ENTRIES * SIZE_OF_MPHYPT_ENTRY) /*2 */
-#define TQ_BASE (APCT_PRIO_1_BASE + NUM_APCT_PRIO_1_ENTRIES * SIZE_OF_APCT_ENTRY) /*2 */
-#define ATM_DPRAM_SIZE ((TQ_BASE + NUM_TQ_ENTRIES * SIZE_OF_TQ_ENTRY) - ATM_DPRAM_BEGIN)
-
-#define CT_PTR(base) ((struct ct_entry_t *)((char *)(base) + 0x2000 + CT_BASE))
-#define TCTE_PTR(base) ((struct tcte_entry_t *)((char *)(base) + 0x2000 + TCTE_BASE))
-#define AM_PTR(base) ((uint32 *)((char *)(base) + 0x2000 + AM_BASE))
-#define AP_PTR(base) ((uint16 *)((char *)(base) + 0x2000 + AP_BASE))
-#define MPHYPT_PTR(base) ((uint16 *)((char *)(base) + 0x2000 + MPHYPT_BASE))
-#define APCP_PTR(base) ((struct apc_params_t *)((char*)(base) + 0x2000 + APCP_BASE))
-#define APCT1_PTR(base) ((uint16 *)((char *)(base) + 0x2000 + APCT_PRIO_1_BASE))
-#define APCT2_PTR(base) ((uint16 *)((char *)(base) + 0x2000 + APCT_PRIO_2_BASE))
-#define APCT3_PTR(base) ((uint16 *)((char *)(base) + 0x2000 + APCT_PRIO_3_BASE))
-#define TQ_PTR(base) ((uint16 *)((char *)(base) + 0x2000 + TQ_BASE))
-
-/* SAR registers */
-#define RBDBASE(base) ((vuint32 *)(base + 0x3F00)) /* Base address of RxBD-List */
-#define SRFCR(base) ((vuint8 *)(base + 0x3F04)) /* DMA Receive function code */
-#define SRSTATE(base) ((vuint8 *)(base + 0x3F05)) /* DMA Receive status */
-#define MRBLR(base) ((vuint16 *)(base + 0x3F06)) /* Init to 0 for ATM */
-#define RSTATE(base) ((vuint32 *)(base + 0x3F08)) /* Do not write to */
-#define R_CNT(base) ((vuint16 *)(base + 0x3F10)) /* Do not write to */
-#define STFCR(base) ((vuint8 *)(base + 0x3F12)) /* DMA Transmit function code */
-#define STSTATE(base) ((vuint8 *)(base + 0x3F13)) /* DMA Transmit status */
-#define TBDBASE(base) ((vuint32 *)(base + 0x3F14)) /* Base address of TxBD-List */
-#define TSTATE(base) ((vuint32 *)(base + 0x3F18)) /* Do not write to */
-#define COMM_CH(base) ((vuint16 *)(base + 0x3F1C)) /* Command channel */
-#define STCHNUM(base) ((vuint16 *)(base + 0x3F1E)) /* Do not write to */
-#define T_CNT(base) ((vuint16 *)(base + 0x3F20)) /* Do not write to */
-#define CTBASE(base) ((vuint16 *)(base + 0x3F22)) /* Base address of Connection-table */
-#define ECTBASE(base) ((vuint32 *)(base + 0x3F24)) /* Valid only for external Conn.-table */
-#define INTBASE(base) ((vuint32 *)(base + 0x3F28)) /* Base address of Interrupt-table */
-#define INTPTR(base) ((vuint32 *)(base + 0x3F2C)) /* Pointer to Interrupt-queue */
-#define C_MASK(base) ((vuint32 *)(base + 0x3F30)) /* CRC-mask */
-#define SRCHNUM(base) ((vuint16 *)(base + 0x3F34)) /* Do not write to */
-#define INT_CNT(base) ((vuint16 *)(base + 0x3F36)) /* Interrupt-Counter */
-#define INT_ICNT(base) ((vuint16 *)(base + 0x3F38)) /* Interrupt threshold */
-#define TSTA(base) ((vuint16 *)(base + 0x3F3A)) /* Time-stamp-address */
-#define OLDLEN(base) ((vuint16 *)(base + 0x3F3C)) /* Do not write to */
-#define SMRBLR(base) ((vuint16 *)(base + 0x3F3E)) /* SAR max RXBuffer length */
-#define EHEAD(base) ((vuint32 *)(base + 0x3F40)) /* Valid for serial mode */
-#define EPAYLOAD(base) ((vuint32 *)(base + 0x3F44)) /* Valid for serial mode */
-#define TQBASE(base) ((vuint16 *)(base + 0x3F48)) /* Base address of Tx queue */
-#define TQEND(base) ((vuint16 *)(base + 0x3F4A)) /* End address of Tx queue */
-#define TQAPTR(base) ((vuint16 *)(base + 0x3F4C)) /* TQ APC pointer */
-#define TQTPTR(base) ((vuint16 *)(base + 0x3F4E)) /* TQ Tx pointer */
-#define APCST(base) ((vuint16 *)(base + 0x3F50)) /* APC status */
-#define APCPTR(base) ((vuint16 *)(base + 0x3F52)) /* APC parameter pointer */
-#define HMASK(base) ((vuint32 *)(base + 0x3F54)) /* Header mask */
-#define AMBASE(base) ((vuint16 *)(base + 0x3F58)) /* Address match table base */
-#define AMEND(base) ((vuint16 *)(base + 0x3F5A)) /* Address match table end */
-#define APBASE(base) ((vuint16 *)(base + 0x3F5C)) /* Address match parameter */
-#define FLBASE(base) ((vuint32 *)(base + 0x3F54)) /* First-level table base */
-#define SLBASE(base) ((vuint32 *)(base + 0x3F58)) /* Second-level table base */
-#define FLMASK(base) ((vuint16 *)(base + 0x3F5C)) /* First-level mask */
-#define ECSIZE(base) ((vuint16 *)(base + 0x3F5E)) /* Valid for extended mode */
-#define APCT_REAL(base) ((vuint32 *)(base + 0x3F60)) /* APC 32 bit counter */
-#define R_PTR(base) ((vuint32 *)(base + 0x3F64)) /* Do not write to */
-#define RTEMP(base) ((vuint32 *)(base + 0x3F68)) /* Do not write to */
-#define T_PTR(base) ((vuint32 *)(base + 0x3F6C)) /* Do not write to */
-#define TTEMP(base) ((vuint32 *)(base + 0x3F70)) /* Do not write to */
-
-/* ESAR registers */
-#define FMCTIMESTMP(base) ((vuint32 *)(base + 0x3F80)) /* Perf.Mon.Timestamp */
-#define FMCTEMPLATE(base) ((vuint32 *)(base + 0x3F84)) /* Perf.Mon.Template */
-#define PMPTR(base) ((vuint16 *)(base + 0x3F88)) /* Perf.Mon.Table */
-#define PMCHANNEL(base) ((vuint16 *)(base + 0x3F8A)) /* Perf.Mon.Channel */
-#define MPHYST(base) ((vuint16 *)(base + 0x3F90)) /* Multi-PHY Status */
-#define TCTEBASE(base) ((vuint16 *)(base + 0x3F92)) /* Internal TCT Extension Base */
-#define ETCTEBASE(base) ((vuint32 *)(base + 0x3F94)) /* External TCT Extension Base */
-#define COMM_CH2(base) ((vuint32 *)(base + 0x3F98)) /* 2nd command channel word */
-#define STATBASE(base) ((vuint16 *)(base + 0x3F9C)) /* Statistics table pointer */
-
-/* UTOPIA Mode Register */
-#define UTMODE(base) (CAST(vuint32 *)(base + 0x0978))
-
-/* SAR commands */
-#define TRANSMIT_CHANNEL_ACTIVATE_CMD 0x0FC1
-#define TRANSMIT_CHANNEL_DEACTIVATE_CMD 0x1FC1
-#define STOP_TRANSMIT_CMD 0x2FC1
-#define RESTART_TRANSMIT_CMD 0x3FC1
-#define STOP_RECEIVE_CMD 0x4FC1
-#define RESTART_RECEIVE_CMD 0x5FC1
-#define APC_BYPASS_CMD 0x6FC1
-#define MEM_WRITE_CMD 0x7FC1
-#define CPCR_FLG 0x0001
-
-/* INT flags */
-#define INT_VALID 0x80000000
-#define INT_WRAP 0x40000000
-#define INT_APCO 0x00800000
-#define INT_TQF 0x00200000
-#define INT_RXF 0x00080000
-#define INT_BSY 0x00040000
-#define INT_TXB 0x00020000
-#define INT_RXB 0x00010000
-
-#define NUM_INT_ENTRIES 80
-#define SIZE_OF_INT_ENTRY 4
-
-struct apc_params_t {
- vuint16 apct_base1; /* APC Table - First Priority Base pointer */
- vuint16 apct_end1; /* First APC Table - Length */
- vuint16 apct_ptr1; /* First APC Table Pointer */
- vuint16 apct_sptr1; /* APC Table First Priority Service pointer */
- vuint16 etqbase; /* Enhanced Transmit Queue Base pointer */
- vuint16 etqend; /* Enhanced Transmit Queue End pointer */
- vuint16 etqaptr; /* Enhanced Transmit Queue APC pointer */
- vuint16 etqtptr; /* Enhanced Transmit Queue Transmitter pointer */
- vuint16 apc_mi; /* APC - Max Iteration */
- vuint16 ncits; /* Number of Cells In TimeSlot */
- vuint16 apcnt; /* APC - N Timer */
- vuint16 reserved1; /* reserved */
- vuint16 eapcst; /* APC status */
- vuint16 ptp_counter; /* PTP queue length */
- vuint16 ptp_txch; /* PTP channel */
- vuint16 reserved2; /* reserved */
-};
-
-struct ct_entry_t {
- /* RCT */
- unsigned fhnt:1;
- unsigned pm_rct:1;
- unsigned reserved0:6;
- unsigned hec:1;
- unsigned clp:1;
- unsigned cng_ncrc:1;
- unsigned inf_rct:1;
- unsigned cngi_ptp:1;
- unsigned cdis_rct:1;
- unsigned aal_rct:2;
- uint16 rbalen;
- uint32 rcrc;
- uint32 rb_ptr;
- uint16 rtmlen;
- uint16 rbd_ptr;
- uint16 rbase;
- uint16 tstamp;
- uint16 imask;
- unsigned ft:2;
- unsigned nim:1;
- unsigned reserved1:2;
- unsigned rpmt:6;
- unsigned reserved2:5;
- uint8 reserved3[8];
- /* TCT */
- unsigned reserved4:1;
- unsigned pm_tct:1;
- unsigned reserved5:6;
- unsigned pc:1;
- unsigned reserved6:2;
- unsigned inf_tct:1;
- unsigned cr10:1;
- unsigned cdis_tct:1;
- unsigned aal_tct:2;
- uint16 tbalen;
- uint32 tcrc;
- uint32 tb_ptr;
- uint16 ttmlen;
- uint16 tbd_ptr;
- uint16 tbase;
- unsigned reserved7:5;
- unsigned tpmt:6;
- unsigned reserved8:3;
- unsigned avcf:1;
- unsigned act:1;
- uint32 chead;
- uint16 apcl;
- uint16 apcpr;
- unsigned out:1;
- unsigned bnr:1;
- unsigned tservice:2;
- unsigned apcp:12;
- uint16 apcpf;
-};
-
-struct tcte_entry_t {
- unsigned res1:4;
- unsigned scr:12;
- uint16 scrf;
- uint16 bt;
- uint16 buptrh;
- uint32 buptrl;
- unsigned vbr2:1;
- unsigned res2:15;
- uint16 oobr;
- uint16 res3[8];
-};
-
-#define SIZE_OF_RBD 12
-#define SIZE_OF_TBD 12
-
-struct atm_bd_t {
- vuint16 flags;
- vuint16 length;
- unsigned char *buffer_ptr;
- vuint16 cpcs_uu_cpi;
- vuint16 reserved;
-};
-
-/* BD flags */
-#define EMPTY 0x8000
-#define READY 0x8000
-#define WRAP 0x2000
-#define INTERRUPT 0x1000
-#define LAST 0x0800
-#define FIRST 0x0400
-#define OAM 0x0400
-#define CONTINUOUS 0x0200
-#define HEC_ERROR 0x0080
-#define CELL_LOSS 0x0040
-#define CONGESTION 0x0020
-#define ABORT 0x0010
-#define LEN_ERROR 0x0002
-#define CRC_ERROR 0x0001
-
-struct atm_connection_t {
- struct atm_bd_t *rbd_ptr;
- int num_rbd;
- struct atm_bd_t *tbd_ptr;
- int num_tbd;
- struct ct_entry_t *ct_ptr;
- struct tcte_entry_t *tcte_ptr;
- void *drv;
- void (*notify) (void *drv, int event);
-};
-
-struct atm_driver_t {
- int loaded;
- int started;
- char *csram;
- int csram_size;
- uint32 *am_top;
- uint16 *ap_top;
- uint32 *int_reload_ptr;
- uint32 *int_serv_ptr;
- struct atm_bd_t *rbd_base_ptr;
- struct atm_bd_t *tbd_base_ptr;
- unsigned linerate_in_bps;
-};
-
-extern struct atm_connection_t g_conn[NUM_CONNECTIONS];
-extern struct atm_driver_t g_atm;
-
-extern int atmLoad (void);
-extern void atmUnload (void);
diff --git a/board/siemens/IAD210/config.mk b/board/siemens/IAD210/config.mk
deleted file mode 100644
index c30abcb274..0000000000
--- a/board/siemens/IAD210/config.mk
+++ /dev/null
@@ -1,33 +0,0 @@
-#
-# (C) Copyright 2000
-# Sysgo Real-Time Solutions, GmbH <www.elinos.com>
-# Marius Groeger <mgroeger@sysgo.de>
-#
-# (C) Copyright 2000, 2001, 2002
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# iad210 boards
-#
-
-TEXT_BASE = 0x08000000
-/*TEXT_BASE = 0x00200000 */
diff --git a/board/siemens/IAD210/flash.c b/board/siemens/IAD210/flash.c
deleted file mode 100644
index 110858d3c3..0000000000
--- a/board/siemens/IAD210/flash.c
+++ /dev/null
@@ -1,502 +0,0 @@
-/*
- * (C) Copyright 2000, 2001, 2002
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (vu_long *addr, flash_info_t *info);
-static int write_word (flash_info_t *info, ulong dest, ulong data);
-static void flash_get_offsets (ulong base, flash_info_t *info);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- unsigned long size;
- int i;
-
- /* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* Static FLASH Bank configuration here - FIXME XXX */
-
- size = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size, size<<20);
- }
-
-
- /* Remap FLASH according to real size */
- memctl->memc_or0 = CFG_OR_TIMING_FLASH | (-size & 0xFFFF8000);
- memctl->memc_br0 = (CFG_FLASH_BASE & BR_BA_MSK) | BR_MS_GPCM | BR_V;
-
- /* Re-do sizing to get full correct info */
- size = flash_get_size((vu_long *)CFG_FLASH_BASE, &flash_info[0]);
-
- flash_get_offsets (CFG_FLASH_BASE, &flash_info[0]);
-
- flash_info[0].size = size;
-
- return (size);
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_get_offsets (ulong base, flash_info_t *info)
-{
- int i;
-
- /* set up sector start address table */
- if (info->flash_id & FLASH_BTYPE) {
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00008000;
- info->start[2] = base + 0x0000C000;
- info->start[3] = base + 0x00010000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00020000) - 0x00060000;
- }
- } else {
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- info->start[i--] = base + info->size - 0x00008000;
- info->start[i--] = base + info->size - 0x0000C000;
- info->start[i--] = base + info->size - 0x00010000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00020000;
- }
- }
-
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD: printf ("AMD "); break;
- case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
- default: printf ("Unknown Vendor "); break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM400B: printf ("AM29LV400B (4 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM400T: printf ("AM29LV400T (4 Mbit, top boot sector)\n");
- break;
- case FLASH_AM800B: printf ("AM29LV800B (8 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM800T: printf ("AM29LV800T (8 Mbit, top boot sector)\n");
- break;
- case FLASH_AM160B: printf ("AM29LV160B (16 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM160T: printf ("AM29LV160T (16 Mbit, top boot sector)\n");
- break;
- case FLASH_AM320B: printf ("AM29LV320B (32 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM320T: printf ("AM29LV320T (32 Mbit, top boot sector)\n");
- break;
- default: printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " "
- );
- }
- printf ("\n");
-}
-
-/*-----------------------------------------------------------------------
- */
-
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-
-static ulong flash_get_size (vu_long *addr, flash_info_t *info)
-{
- short i;
- ulong value;
- ulong base = (ulong)addr;
-
-
- /* Write auto select command: read Manufacturer ID */
- addr[0x0555] = 0x00AA00AA;
- addr[0x02AA] = 0x00550055;
- addr[0x0555] = 0x00900090;
-
- value = addr[0];
-
- switch (value) {
- case AMD_MANUFACT:
- info->flash_id = FLASH_MAN_AMD;
- break;
- case FUJ_MANUFACT:
- info->flash_id = FLASH_MAN_FUJ;
- break;
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- return (0); /* no or unknown flash */
- }
-
- value = addr[1]; /* device ID */
-
- switch (value) {
- case AMD_ID_LV400T:
- info->flash_id += FLASH_AM400T;
- info->sector_count = 11;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case AMD_ID_LV400B:
- info->flash_id += FLASH_AM400B;
- info->sector_count = 11;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case AMD_ID_LV800T:
- info->flash_id += FLASH_AM800T;
- info->sector_count = 19;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case AMD_ID_LV800B:
- info->flash_id += FLASH_AM800B;
- info->sector_count = 19;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case AMD_ID_LV160T:
- info->flash_id += FLASH_AM160T;
- info->sector_count = 35;
- info->size = 0x00400000;
- break; /* => 4 MB */
-
- case AMD_ID_LV160B:
- info->flash_id += FLASH_AM160B;
- info->sector_count = 35;
- info->size = 0x00400000;
- break; /* => 4 MB */
-#if 0 /* enable when device IDs are available */
- case AMD_ID_LV320T:
- info->flash_id += FLASH_AM320T;
- info->sector_count = 67;
- info->size = 0x00800000;
- break; /* => 8 MB */
-
- case AMD_ID_LV320B:
- info->flash_id += FLASH_AM320B;
- info->sector_count = 67;
- info->size = 0x00800000;
- break; /* => 8 MB */
-#endif
- default:
- info->flash_id = FLASH_UNKNOWN;
- return (0); /* => no or unknown flash */
-
- }
-
- /* set up sector start address table */
- if (info->flash_id & FLASH_BTYPE) {
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00008000;
- info->start[2] = base + 0x0000C000;
- info->start[3] = base + 0x00010000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00020000) - 0x00060000;
- }
- } else {
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- info->start[i--] = base + info->size - 0x00008000;
- info->start[i--] = base + info->size - 0x0000C000;
- info->start[i--] = base + info->size - 0x00010000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00020000;
- }
- }
-
- /* check for protected sectors */
- for (i = 0; i < info->sector_count; i++) {
- /* read sector protection at sector address, (A7 .. A0) = 0x02 */
- /* D0 = 1 if protected */
- addr = (volatile unsigned long *)(info->start[i]);
- info->protect[i] = addr[2] & 1;
- }
-
- /*
- * Prevent writes to uninitialized FLASH.
- */
- if (info->flash_id != FLASH_UNKNOWN) {
- addr = (volatile unsigned long *)info->start[0];
-
- *addr = 0x00F000F0; /* reset bank */
- }
-
- return (info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- vu_long *addr = (vu_long*)(info->start[0]);
- int flag, prot, sect, l_sect;
- ulong start, now, last;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- if ((info->flash_id == FLASH_UNKNOWN) ||
- (info->flash_id > FLASH_AMD_COMP)) {
- printf ("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- l_sect = -1;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[0x0555] = 0x00AA00AA;
- addr[0x02AA] = 0x00550055;
- addr[0x0555] = 0x00800080;
- addr[0x0555] = 0x00AA00AA;
- addr[0x02AA] = 0x00550055;
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr = (vu_long*)(info->start[sect]);
- addr[0] = 0x00300030;
- l_sect = sect;
- }
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- /*
- * We wait for the last triggered sector
- */
- if (l_sect < 0)
- goto DONE;
-
- start = get_timer (0);
- last = start;
- addr = (vu_long*)(info->start[l_sect]);
- while ((addr[0] & 0x00800080) != 0x00800080) {
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- return 1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- }
-
- DONE:
- /* reset to read mode */
- addr = (volatile unsigned long *)info->start[0];
- addr[0] = 0x00F000F0; /* reset bank */
-
- printf (" done\n");
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int i, l, rc;
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
- for (; i<4 && cnt>0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = 0;
- for (i=0; i<4; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- return (write_word(info, wp, data));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word (flash_info_t *info, ulong dest, ulong data)
-{
- vu_long *addr = (vu_long*)(info->start[0]);
- ulong start;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*((vu_long *)dest) & data) != data) {
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[0x0555] = 0x00AA00AA;
- addr[0x02AA] = 0x00550055;
- addr[0x0555] = 0x00A000A0;
-
- *((vu_long *)dest) = data;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* data polling for D7 */
- start = get_timer (0);
- while ((*((vu_long *)dest) & 0x00800080) != (data & 0x00800080)) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- return (1);
- }
- }
- return (0);
-}
-
-/*-----------------------------------------------------------------------
- */
diff --git a/board/siemens/IAD210/u-boot.lds b/board/siemens/IAD210/u-boot.lds
deleted file mode 100644
index 42e1b83b95..0000000000
--- a/board/siemens/IAD210/u-boot.lds
+++ /dev/null
@@ -1,139 +0,0 @@
-/*
- * (C) Copyright 2000, 2001, 2002
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc8xx/start.o (.text)
- common/dlmalloc.o (.text)
- lib_ppc/ppcstring.o (.text)
- cpu/mpc8xx/interrupts.o (.text)
- lib_ppc/time.o (.text)
- . = env_offset;
- common/environment.o(.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/siemens/SCM/Makefile b/board/siemens/SCM/Makefile
deleted file mode 100644
index af646e4eb9..0000000000
--- a/board/siemens/SCM/Makefile
+++ /dev/null
@@ -1,42 +0,0 @@
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = scm.o flash.o fpga_scm.o ../common/fpga.o \
- ../../tqm8xx/load_sernum_ethaddr.o
-
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/siemens/SCM/config.mk b/board/siemens/SCM/config.mk
deleted file mode 100644
index 855ae38f81..0000000000
--- a/board/siemens/SCM/config.mk
+++ /dev/null
@@ -1,34 +0,0 @@
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# Siemens SCM boards
-#
-
-# This should be equal to the CFG_FLASH_BASE define in config_SCM.h
-# for the "final" configuration, with U-Boot in flash, or the address
-# in RAM where U-Boot is loaded at for debugging.
-#
-TEXT_BASE = 0x40000000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)
diff --git a/board/siemens/SCM/flash.c b/board/siemens/SCM/flash.c
deleted file mode 100644
index 056fe810b3..0000000000
--- a/board/siemens/SCM/flash.c
+++ /dev/null
@@ -1,488 +0,0 @@
-/*
- * (C) Copyright 2001, 2002
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * Flash Routines for AMD devices on the TQM8260 board
- *
- *--------------------------------------------------------------------
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-
-#define V_ULONG(a) (*(volatile unsigned long *)( a ))
-#define V_BYTE(a) (*(volatile unsigned char *)( a ))
-
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
-
-
-/*-----------------------------------------------------------------------
- */
-void flash_reset (void)
-{
- if (flash_info[0].flash_id != FLASH_UNKNOWN) {
- V_ULONG (flash_info[0].start[0]) = 0x00F000F0;
- V_ULONG (flash_info[0].start[0] + 4) = 0x00F000F0;
- }
-}
-
-/*-----------------------------------------------------------------------
- */
-ulong flash_get_size (ulong baseaddr, flash_info_t * info)
-{
- short i;
- unsigned long flashtest_h, flashtest_l;
-
- /* Write auto select command sequence and test FLASH answer */
- V_ULONG (baseaddr + ((ulong) 0x0555 << 3)) = 0x00AA00AA;
- V_ULONG (baseaddr + ((ulong) 0x02AA << 3)) = 0x00550055;
- V_ULONG (baseaddr + ((ulong) 0x0555 << 3)) = 0x00900090;
- V_ULONG (baseaddr + 4 + ((ulong) 0x0555 << 3)) = 0x00AA00AA;
- V_ULONG (baseaddr + 4 + ((ulong) 0x02AA << 3)) = 0x00550055;
- V_ULONG (baseaddr + 4 + ((ulong) 0x0555 << 3)) = 0x00900090;
-
- flashtest_h = V_ULONG (baseaddr); /* manufacturer ID */
- flashtest_l = V_ULONG (baseaddr + 4);
-
- switch ((int) flashtest_h) {
- case AMD_MANUFACT:
- info->flash_id = FLASH_MAN_AMD;
- break;
- case FUJ_MANUFACT:
- info->flash_id = FLASH_MAN_FUJ;
- break;
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- return (0); /* no or unknown flash */
- }
-
- flashtest_h = V_ULONG (baseaddr + 8); /* device ID */
- flashtest_l = V_ULONG (baseaddr + 12);
- if (flashtest_h != flashtest_l) {
- info->flash_id = FLASH_UNKNOWN;
- } else {
- switch (flashtest_h) {
- case AMD_ID_LV800T:
- info->flash_id += FLASH_AM800T;
- info->sector_count = 19;
- info->size = 0x00400000;
- break; /* 4 * 1 MB = 4 MB */
- case AMD_ID_LV800B:
- info->flash_id += FLASH_AM800B;
- info->sector_count = 19;
- info->size = 0x00400000;
- break; /* 4 * 1 MB = 4 MB */
- case AMD_ID_LV160T:
- info->flash_id += FLASH_AM160T;
- info->sector_count = 35;
- info->size = 0x00800000;
- break; /* 4 * 2 MB = 8 MB */
- case AMD_ID_LV160B:
- info->flash_id += FLASH_AM160B;
- info->sector_count = 35;
- info->size = 0x00800000;
- break; /* 4 * 2 MB = 8 MB */
- case AMD_ID_DL322T:
- info->flash_id += FLASH_AMDL322T;
- info->sector_count = 71;
- info->size = 0x01000000;
- break; /* 4 * 4 MB = 16 MB */
- case AMD_ID_DL322B:
- info->flash_id += FLASH_AMDL322B;
- info->sector_count = 71;
- info->size = 0x01000000;
- break; /* 4 * 4 MB = 16 MB */
- case AMD_ID_DL323T:
- info->flash_id += FLASH_AMDL323T;
- info->sector_count = 71;
- info->size = 0x01000000;
- break; /* 4 * 4 MB = 16 MB */
- case AMD_ID_DL323B:
- info->flash_id += FLASH_AMDL323B;
- info->sector_count = 71;
- info->size = 0x01000000;
- break; /* 4 * 4 MB = 16 MB */
- case AMD_ID_LV640U:
- info->flash_id += FLASH_AM640U;
- info->sector_count = 128;
- info->size = 0x02000000;
- break; /* 4 * 8 MB = 32 MB */
- default:
- info->flash_id = FLASH_UNKNOWN;
- return (0); /* no or unknown flash */
- }
- }
-
- if (flashtest_h == AMD_ID_LV640U) {
-
- /* set up sector start adress table (uniform sector type) */
- for (i = 0; i < info->sector_count; i++)
- info->start[i] = baseaddr + (i * 0x00040000);
-
- } else if (info->flash_id & FLASH_BTYPE) {
-
- /* set up sector start adress table (bottom sector type) */
- info->start[0] = baseaddr + 0x00000000;
- info->start[1] = baseaddr + 0x00010000;
- info->start[2] = baseaddr + 0x00018000;
- info->start[3] = baseaddr + 0x00020000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] = baseaddr + (i * 0x00040000) - 0x000C0000;
- }
-
- } else {
-
- /* set up sector start adress table (top sector type) */
- i = info->sector_count - 1;
- info->start[i--] = baseaddr + info->size - 0x00010000;
- info->start[i--] = baseaddr + info->size - 0x00018000;
- info->start[i--] = baseaddr + info->size - 0x00020000;
- for (; i >= 0; i--) {
- info->start[i] = baseaddr + i * 0x00040000;
- }
- }
-
- /* check for protected sectors */
- for (i = 0; i < info->sector_count; i++) {
- /* read sector protection at sector address, (A7 .. A0) = 0x02 */
- if ((V_ULONG (info->start[i] + 16) & 0x00010001) ||
- (V_ULONG (info->start[i] + 20) & 0x00010001)) {
- info->protect[i] = 1; /* D0 = 1 if protected */
- } else {
- info->protect[i] = 0;
- }
- }
-
- flash_reset ();
- return (info->size);
-}
-
-/*-----------------------------------------------------------------------
- */
-unsigned long flash_init (void)
-{
- unsigned long size_b0 = 0;
- int i;
-
- /* Init: no FLASHes known */
- for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* Static FLASH Bank configuration here (only one bank) */
-
- size_b0 = flash_get_size (CFG_FLASH0_BASE, &flash_info[0]);
- if (flash_info[0].flash_id == FLASH_UNKNOWN || size_b0 == 0) {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size_b0, size_b0 >> 20);
- }
-
- /*
- * protect monitor and environment sectors
- */
-
-#if CFG_MONITOR_BASE >= CFG_FLASH0_BASE
- flash_protect (FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE + monitor_flash_len - 1, &flash_info[0]);
-#endif
-
-#if (CFG_ENV_IS_IN_FLASH == 1) && defined(CFG_ENV_ADDR)
-# ifndef CFG_ENV_SIZE
-# define CFG_ENV_SIZE CFG_ENV_SECT_SIZE
-# endif
- flash_protect (FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0]);
-#endif
-
- return (size_b0);
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t * info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD:
- printf ("AMD ");
- break;
- case FLASH_MAN_FUJ:
- printf ("FUJITSU ");
- break;
- default:
- printf ("Unknown Vendor ");
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM800T:
- printf ("29LV800T (8 M, top sector)\n");
- break;
- case FLASH_AM800B:
- printf ("29LV800T (8 M, bottom sector)\n");
- break;
- case FLASH_AM160T:
- printf ("29LV160T (16 M, top sector)\n");
- break;
- case FLASH_AM160B:
- printf ("29LV160B (16 M, bottom sector)\n");
- break;
- case FLASH_AMDL322T:
- printf ("29DL322T (32 M, top sector)\n");
- break;
- case FLASH_AMDL322B:
- printf ("29DL322B (32 M, bottom sector)\n");
- break;
- case FLASH_AMDL323T:
- printf ("29DL323T (32 M, top sector)\n");
- break;
- case FLASH_AMDL323B:
- printf ("29DL323B (32 M, bottom sector)\n");
- break;
- case FLASH_AM640U:
- printf ("29LV640D (64 M, uniform sector)\n");
- break;
- default:
- printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " "
- );
- }
- printf ("\n");
- return;
-}
-
-/*-----------------------------------------------------------------------
- */
-int flash_erase (flash_info_t * info, int s_first, int s_last)
-{
- int flag, prot, sect, l_sect;
- ulong start, now, last;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect])
- prot++;
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- l_sect = -1;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
-
- V_ULONG (info->start[0] + (0x0555 << 3)) = 0x00AA00AA;
- V_ULONG (info->start[0] + (0x02AA << 3)) = 0x00550055;
- V_ULONG (info->start[0] + (0x0555 << 3)) = 0x00800080;
- V_ULONG (info->start[0] + (0x0555 << 3)) = 0x00AA00AA;
- V_ULONG (info->start[0] + (0x02AA << 3)) = 0x00550055;
- V_ULONG (info->start[0] + 4 + (0x0555 << 3)) = 0x00AA00AA;
- V_ULONG (info->start[0] + 4 + (0x02AA << 3)) = 0x00550055;
- V_ULONG (info->start[0] + 4 + (0x0555 << 3)) = 0x00800080;
- V_ULONG (info->start[0] + 4 + (0x0555 << 3)) = 0x00AA00AA;
- V_ULONG (info->start[0] + 4 + (0x02AA << 3)) = 0x00550055;
- udelay (1000);
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- V_ULONG (info->start[sect]) = 0x00300030;
- V_ULONG (info->start[sect] + 4) = 0x00300030;
- l_sect = sect;
- }
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts ();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- /*
- * We wait for the last triggered sector
- */
- if (l_sect < 0)
- goto DONE;
-
- start = get_timer (0);
- last = start;
- while ((V_ULONG (info->start[l_sect]) & 0x00800080) != 0x00800080 ||
- (V_ULONG (info->start[l_sect] + 4) & 0x00800080) != 0x00800080)
- {
- if ((now = get_timer (start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- return 1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- serial_putc ('.');
- last = now;
- }
- }
-
- DONE:
- /* reset to read mode */
- flash_reset ();
-
- printf (" done\n");
- return 0;
-}
-
-static int write_dword (flash_info_t *, ulong, unsigned char *);
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- ulong dp;
- static unsigned char bb[8];
- int i, l, rc, cc = cnt;
-
- dp = (addr & ~7); /* get lower dword aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - dp) != 0) {
- for (i = 0; i < 8; i++)
- bb[i] = (i < l || (i - l) >= cc) ? V_BYTE (dp + i) : *src++;
- if ((rc = write_dword (info, dp, bb)) != 0) {
- return (rc);
- }
- dp += 8;
- cc -= 8 - l;
- }
-
- /*
- * handle word aligned part
- */
- while (cc >= 8) {
- if ((rc = write_dword (info, dp, src)) != 0) {
- return (rc);
- }
- dp += 8;
- src += 8;
- cc -= 8;
- }
-
- if (cc <= 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- for (i = 0; i < 8; i++) {
- bb[i] = (i < cc) ? *src++ : V_BYTE (dp + i);
- }
- return (write_dword (info, dp, bb));
-}
-
-/*-----------------------------------------------------------------------
- * Write a dword to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_dword (flash_info_t * info, ulong dest, unsigned char *pdata)
-{
- ulong start, cl, ch;
- int flag, i;
-
- for (ch = 0, i = 0; i < 4; i++)
- ch = (ch << 8) + *pdata++; /* high word */
- for (cl = 0, i = 0; i < 4; i++)
- cl = (cl << 8) + *pdata++; /* low word */
-
- /* Check if Flash is (sufficiently) erased */
- if ((*((vu_long *) dest) & ch) != ch
- || (*((vu_long *) (dest + 4)) & cl) != cl) {
- return (2);
- }
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
-
- V_ULONG (info->start[0] + (0x0555 << 3)) = 0x00AA00AA;
- V_ULONG (info->start[0] + (0x02AA << 3)) = 0x00550055;
- V_ULONG (info->start[0] + (0x0555 << 3)) = 0x00A000A0;
- V_ULONG (dest) = ch;
- V_ULONG (info->start[0] + 4 + (0x0555 << 3)) = 0x00AA00AA;
- V_ULONG (info->start[0] + 4 + (0x02AA << 3)) = 0x00550055;
- V_ULONG (info->start[0] + 4 + (0x0555 << 3)) = 0x00A000A0;
- V_ULONG (dest + 4) = cl;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts ();
-
- /* data polling for D7 */
- start = get_timer (0);
- while (((V_ULONG (dest) & 0x00800080) != (ch & 0x00800080)) ||
- ((V_ULONG (dest + 4) & 0x00800080) != (cl & 0x00800080))) {
- if (get_timer (start) > CFG_FLASH_WRITE_TOUT) {
- return (1);
- }
- }
- return (0);
-}
diff --git a/board/siemens/SCM/fpga_scm.c b/board/siemens/SCM/fpga_scm.c
deleted file mode 100644
index 661bf66c66..0000000000
--- a/board/siemens/SCM/fpga_scm.c
+++ /dev/null
@@ -1,104 +0,0 @@
-/*
- * (C) Copyright 2002
- * Wolfgang Grandegger, DENX Software Engineering, wg@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-
-#include <common.h>
-#include <mpc8260.h>
-#include <common.h>
-#include "../common/fpga.h"
-
-fpga_t fpga_list[] = {
- {"FIOX", CFG_FIOX_BASE,
- CFG_PD_FIOX_INIT, CFG_PD_FIOX_PROG, CFG_PD_FIOX_DONE}
- ,
- {"FDOHM", CFG_FDOHM_BASE,
- CFG_PD_FDOHM_INIT, CFG_PD_FDOHM_PROG, CFG_PD_FDOHM_DONE}
-};
-int fpga_count = sizeof (fpga_list) / sizeof (fpga_t);
-
-
-ulong fpga_control (fpga_t * fpga, int cmd)
-{
- volatile immap_t *immr = (immap_t *) CFG_IMMR;
-
- switch (cmd) {
- case FPGA_INIT_IS_HIGH:
- immr->im_ioport.iop_pdird &= ~fpga->init_mask; /* input */
- return (immr->im_ioport.iop_pdatd & fpga->init_mask) ? 1 : 0;
-
- case FPGA_INIT_SET_LOW:
- immr->im_ioport.iop_pdird |= fpga->init_mask; /* output */
- immr->im_ioport.iop_pdatd &= ~fpga->init_mask;
- break;
-
- case FPGA_INIT_SET_HIGH:
- immr->im_ioport.iop_pdird |= fpga->init_mask; /* output */
- immr->im_ioport.iop_pdatd |= fpga->init_mask;
- break;
-
- case FPGA_PROG_SET_LOW:
- immr->im_ioport.iop_pdatd &= ~fpga->prog_mask;
- break;
-
- case FPGA_PROG_SET_HIGH:
- immr->im_ioport.iop_pdatd |= fpga->prog_mask;
- break;
-
- case FPGA_DONE_IS_HIGH:
- return (immr->im_ioport.iop_pdatd & fpga->done_mask) ? 1 : 0;
-
- case FPGA_READ_MODE:
- break;
-
- case FPGA_LOAD_MODE:
- break;
-
- case FPGA_GET_ID:
- if (fpga->conf_base == CFG_FIOX_BASE) {
- ulong ver =
- *(volatile ulong *) (fpga->conf_base + 0x10);
- return ((ver >> 10) & 0xf) + ((ver >> 2) & 0xf0);
- } else if (fpga->conf_base == CFG_FDOHM_BASE) {
- return (*(volatile ushort *) fpga->conf_base) & 0xff;
- } else {
- return *(volatile ulong *) fpga->conf_base;
- }
-
- case FPGA_INIT_PORTS:
- immr->im_ioport.iop_ppard &= ~fpga->init_mask; /* INIT I/O */
- immr->im_ioport.iop_psord &= ~fpga->init_mask;
- immr->im_ioport.iop_pdird &= ~fpga->init_mask;
-
- immr->im_ioport.iop_ppard &= ~fpga->prog_mask; /* PROG Output */
- immr->im_ioport.iop_psord &= ~fpga->prog_mask;
- immr->im_ioport.iop_pdird |= fpga->prog_mask;
-
- immr->im_ioport.iop_ppard &= ~fpga->done_mask; /* DONE Input */
- immr->im_ioport.iop_psord &= ~fpga->done_mask;
- immr->im_ioport.iop_pdird &= ~fpga->done_mask;
-
- break;
-
- }
- return 0;
-}
diff --git a/board/siemens/SCM/scm.c b/board/siemens/SCM/scm.c
deleted file mode 100644
index d20688d568..0000000000
--- a/board/siemens/SCM/scm.c
+++ /dev/null
@@ -1,540 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <ioports.h>
-#include <mpc8260.h>
-
-#include "scm.h"
-
-static void config_scoh_cs(void);
-extern int fpga_init(void);
-
-#if 0
-#define DEBUGF(fmt,args...) printf (fmt ,##args)
-#else
-#define DEBUGF(fmt,args...)
-#endif
-
-/*
- * I/O Port configuration table
- *
- * if conf is 1, then that port pin will be configured at boot time
- * according to the five values podr/pdir/ppar/psor/pdat for that entry
- */
-
-const iop_conf_t iop_conf_tab[4][32] = {
-
- /* Port A configuration */
- { /* conf ppar psor pdir podr pdat */
- /* PA31 */ { 1, 1, 1, 0, 0, 0 }, /* FCC1 MII COL */
- /* PA30 */ { 1, 1, 1, 0, 0, 0 }, /* FCC1 MII CRS */
- /* PA29 */ { 1, 1, 1, 1, 0, 0 }, /* FCC1 MII TX_ER */
- /* PA28 */ { 1, 1, 1, 1, 0, 0 }, /* FCC1 MII TX_EN */
- /* PA27 */ { 1, 1, 1, 0, 0, 0 }, /* FCC1 MII RX_DV */
- /* PA26 */ { 1, 1, 1, 0, 0, 0 }, /* FCC1 MII RX_ER */
- /* PA25 */ { 0, 0, 0, 1, 0, 0 },
- /* PA24 */ { 0, 0, 0, 1, 0, 0 },
- /* PA23 */ { 0, 0, 0, 1, 0, 0 },
- /* PA22 */ { 0, 0, 0, 1, 0, 0 },
- /* PA21 */ { 1, 1, 0, 1, 0, 0 }, /* FCC1 MII TxD[3] */
- /* PA20 */ { 1, 1, 0, 1, 0, 0 }, /* FCC1 MII TxD[2] */
- /* PA19 */ { 1, 1, 0, 1, 0, 0 }, /* FCC1 MII TxD[1] */
- /* PA18 */ { 1, 1, 0, 1, 0, 0 }, /* FCC1 MII TxD[0] */
- /* PA17 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 MII RxD[0] */
- /* PA16 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 MII RxD[1]*/
- /* PA15 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 MII RxD[2] */
- /* PA14 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 MII RxD[3] */
- /* PA13 */ { 0, 0, 0, 1, 0, 0 },
- /* PA12 */ { 0, 0, 0, 1, 0, 0 },
- /* PA11 */ { 0, 0, 0, 1, 0, 0 },
- /* PA10 */ { 0, 0, 0, 1, 0, 0 },
- /* PA9 */ { 1, 1, 1, 1, 0, 0 }, /* TDM_A1 L1TXD0 */
- /* PA8 */ { 1, 1, 1, 0, 0, 0 }, /* TDM_A1 L1RXD0 */
- /* PA7 */ { 1, 1, 1, 0, 0, 0 }, /* TDM_A1 L1TSYNC */
- /* PA6 */ { 1, 1, 1, 0, 0, 0 }, /* TDM_A1 L1RSYNC */
- /* PA5 */ { 1, 0, 0, 0, 0, 0 }, /* FIOX_FPGA_PR */
- /* PA4 */ { 1, 0, 0, 0, 0, 0 }, /* DOHM_FPGA_PR */
- /* PA3 */ { 1, 1, 0, 0, 0, 0 }, /* TDM RXCLK4 */
- /* PA2 */ { 1, 1, 0, 0, 0, 0 }, /* TDM TXCLK4 */
- /* PA1 */ { 0, 0, 0, 1, 0, 0 },
- /* PA0 */ { 1, 0, 0, 0, 0, 0 } /* BUSY */
- },
-
- /* Port B configuration */
- { /* conf ppar psor pdir podr pdat */
- /* PB31 */ { 1, 0, 0, 1, 0, 0 }, /* EQ_ALARM_MIN */
- /* PB30 */ { 1, 0, 0, 1, 0, 0 }, /* EQ_ALARM_MAJ */
- /* PB29 */ { 1, 0, 0, 1, 0, 0 }, /* COM_ALARM_MIN */
- /* PB28 */ { 1, 0, 0, 1, 0, 0 }, /* COM_ALARM_MAJ */
- /* PB27 */ { 0, 1, 0, 0, 0, 0 },
- /* PB26 */ { 0, 1, 0, 0, 0, 0 },
- /* PB25 */ { 1, 0, 0, 1, 0, 0 }, /* LED_GREEN_L */
- /* PB24 */ { 1, 0, 0, 1, 0, 0 }, /* LED_RED_L */
- /* PB23 */ { 1, 1, 1, 0, 0, 0 }, /* TDM_D2 L1TXD */
- /* PB22 */ { 1, 1, 1, 0, 0, 0 }, /* TDM_D2 L1RXD */
- /* PB21 */ { 1, 1, 1, 0, 0, 0 }, /* TDM_D2 L1TSYNC */
- /* PB20 */ { 1, 1, 1, 0, 0, 0 }, /* TDM_D2 L1RSYNC */
- /* PB19 */ { 1, 0, 0, 0, 0, 0 }, /* UID */
- /* PB18 */ { 0, 1, 0, 0, 0, 0 },
- /* PB17 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3 MII RX_DV */
- /* PB16 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3 MII RX_ER */
- /* PB15 */ { 1, 1, 0, 1, 0, 0 }, /* FCC3 MII TX_ER */
- /* PB14 */ { 1, 1, 0, 1, 0, 0 }, /* FCC3 MII TX_EN */
- /* PB13 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3 MII COL */
- /* PB12 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3 MII CRS */
- /* PB11 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3 MII RxD[3] */
- /* PB10 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3 MII RxD[2] */
- /* PB9 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3 MII RxD[1] */
- /* PB8 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3 MII RxD[0] */
- /* PB7 */ { 1, 1, 0, 1, 0, 0 }, /* FCC3 MII TxD[3] */
- /* PB6 */ { 1, 1, 0, 1, 0, 0 }, /* FCC3 MII TxD[2] */
- /* PB5 */ { 1, 1, 0, 1, 0, 0 }, /* FCC3 MII TxD[1] */
- /* PB4 */ { 1, 1, 0, 1, 0, 0 }, /* FCC3 MII TxD[0] */
- /* PB3 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PB2 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PB1 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PB0 */ { 0, 0, 0, 0, 0, 0 } /* pin doesn't exist */
- },
-
- /* Port C configuration */
- { /* conf ppar psor pdir podr pdat */
- /* PC31 */ { 1, 1, 0, 0, 0, 0 }, /* TDM RXCLK1 */
- /* PC30 */ { 1, 1, 0, 0, 0, 0 }, /* TDM TXCLK1 */
- /* PC29 */ { 1, 1, 0, 0, 0, 0 }, /* TDM RXCLK3 */
- /* PC28 */ { 1, 1, 0, 0, 0, 0 }, /* TDM TXCLK3 */
- /* PC27 */ { 1, 1, 0, 0, 0, 0 }, /* TDM RXCLK2 */
- /* PC26 */ { 1, 1, 0, 0, 0, 0 }, /* TDM TXCLK2 */
- /* PC25 */ { 0, 0, 0, 1, 0, 0 },
- /* PC24 */ { 0, 0, 0, 1, 0, 0 },
- /* PC23 */ { 0, 1, 0, 1, 0, 0 },
- /* PC22 */ { 0, 1, 0, 0, 0, 0 },
- /* PC21 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 MII TX_CLK */
- /* PC20 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 MII RX_CLK */
- /* PC19 */ { 0, 1, 0, 0, 0, 0 },
- /* PC18 */ { 0, 1, 0, 0, 0, 0 },
- /* PC17 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3 MII RX_CLK */
- /* PC16 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3 MII TX_CLK */
- /* PC15 */ { 0, 0, 0, 1, 0, 0 },
- /* PC14 */ { 0, 1, 0, 0, 0, 0 },
- /* PC13 */ { 0, 0, 0, 1, 0, 0 }, /* RES_PHY_L */
- /* PC12 */ { 0, 0, 0, 1, 0, 0 },
- /* PC11 */ { 0, 0, 0, 1, 0, 0 },
- /* PC10 */ { 0, 0, 0, 1, 0, 0 },
- /* PC9 */ { 0, 1, 1, 0, 0, 0 }, /* TDM_A2 L1TSYNC */
- /* PC8 */ { 0, 0, 0, 0, 0, 0 }, /* FEP_RDY */
- /* PC7 */ { 0, 0, 0, 0, 0, 0 },
- /* PC6 */ { 0, 0, 0, 0, 0, 0 }, /* UC4_ALARM_L */
- /* PC5 */ { 0, 0, 0, 0, 0, 0 }, /* UC3_ALARM_L */
- /* PC4 */ { 0, 0, 0, 0, 0, 0 }, /* UC2_ALARM_L */
- /* PC3 */ { 0, 0, 0, 1, 0, 0 }, /* RES_MISC_L */
- /* PC2 */ { 0, 0, 0, 1, 0, 0 }, /* RES_OH_L */
- /* PC1 */ { 0, 0, 0, 1, 0, 0 }, /* RES_DOHM_L */
- /* PC0 */ { 0, 0, 0, 1, 0, 0 }, /* RES_FIOX_L */
- },
-
- /* Port D configuration */
- { /* conf ppar psor pdir podr pdat */
- /* PD31 */ { 1, 1, 0, 0, 0, 0 }, /* SCC1 EN RxD */
- /* PD30 */ { 1, 1, 1, 1, 0, 0 }, /* SCC1 EN TxD */
- /* PD29 */ { 0, 0, 0, 0, 0, 0 }, /* INIT_F */
- /* PD28 */ { 0, 0, 0, 1, 0, 0 }, /* DONE_F */
- /* PD27 */ { 0, 0, 0, 0, 0, 0 }, /* INIT_D */
- /* PD26 */ { 0, 0, 0, 1, 0, 0 }, /* DONE_D */
- /* PD25 */ { 0, 0, 0, 1, 0, 0 },
- /* PD24 */ { 0, 0, 0, 1, 0, 0 },
- /* PD23 */ { 0, 0, 0, 1, 0, 0 },
- /* PD22 */ { 1, 1, 1, 0, 0, 0 }, /* TDM_A2 L1TXD */
- /* PD21 */ { 1, 1, 1, 0, 0, 0 }, /* TDM_A2 L1RXD */
- /* PD20 */ { 1, 1, 1, 0, 0, 0 }, /* TDM_A2 L1RSYNC */
- /* PD19 */ { 1, 1, 1, 0, 0, 0 }, /* SPI SPISEL */
- /* PD18 */ { 1, 1, 1, 0, 0, 0 }, /* SPI SPICLK */
- /* PD17 */ { 1, 1, 1, 0, 0, 0 }, /* SPI SPIMOSI */
- /* PD16 */ { 1, 1, 1, 0, 0, 0 }, /* SPI SPIMOSO */
-#if defined(CONFIG_SOFT_I2C)
- /* PD15 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SDA */
- /* PD14 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SCL */
-#else
-#if defined(CONFIG_HARD_I2C)
- /* PD15 */ { 1, 1, 1, 0, 1, 0 }, /* I2C SDA */
- /* PD14 */ { 1, 1, 1, 0, 1, 0 }, /* I2C SCL */
-#else /* normal I/O port pins */
- /* PD15 */ { 0, 1, 1, 0, 1, 0 }, /* I2C SDA */
- /* PD14 */ { 0, 1, 1, 0, 1, 0 }, /* I2C SCL */
-#endif
-#endif
- /* PD13 */ { 1, 1, 1, 0, 0, 0 }, /* TDM_B1 L1TXD */
- /* PD12 */ { 1, 1, 1, 0, 0, 0 }, /* TDM_B1 L1RXD */
- /* PD11 */ { 1, 1, 1, 0, 0, 0 }, /* TDM_B1 L1TSYNC */
- /* PD10 */ { 1, 1, 1, 0, 0, 0 }, /* TDM_B1 L1RSYNC */
- /* PD9 */ { 1, 1, 0, 1, 0, 0 }, /* SMC1 TXD */
- /* PD8 */ { 1, 1, 0, 0, 0, 0 }, /* SMC1 RXD */
- /* PD7 */ { 0, 0, 0, 1, 0, 1 },
- /* PD6 */ { 0, 0, 0, 1, 0, 1 },
- /* PD5 */ { 0, 0, 0, 1, 0, 0 }, /* PROG_F */
- /* PD4 */ { 0, 0, 0, 1, 0, 0 }, /* PROG_D */
- /* PD3 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PD2 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PD1 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PD0 */ { 0, 0, 0, 0, 0, 0 } /* pin doesn't exist */
- }
-};
-
-/* ------------------------------------------------------------------------- */
-
-/* Check Board Identity:
- */
-int checkboard (void)
-{
- char str[64];
- int i = getenv_r ("serial#", str, sizeof (str));
-
- puts ("Board: ");
-
- if (!i || strncmp (str, "TQM8260", 7)) {
- puts ("### No HW ID - assuming TQM8260\n");
- return (0);
- }
-
- puts (str);
- putc ('\n');
-
- return 0;
-}
-
-/* ------------------------------------------------------------------------- */
-
-/* Try SDRAM initialization with P/LSDMR=sdmr and ORx=orx
- *
- * This routine performs standard 8260 initialization sequence
- * and calculates the available memory size. It may be called
- * several times to try different SDRAM configurations on both
- * 60x and local buses.
- */
-static long int try_init (volatile memctl8260_t * memctl, ulong sdmr,
- ulong orx, volatile uchar * base)
-{
- volatile uchar c = 0xff;
- volatile uint *sdmr_ptr;
- volatile uint *orx_ptr;
- ulong maxsize, size;
- int i;
-
- /* We must be able to test a location outsize the maximum legal size
- * to find out THAT we are outside; but this address still has to be
- * mapped by the controller. That means, that the initial mapping has
- * to be (at least) twice as large as the maximum expected size.
- */
- maxsize = (1 + (~orx | 0x7fff)) / 2;
-
- /* Since CFG_SDRAM_BASE is always 0 (??), we assume that
- * we are configuring CS1 if base != 0
- */
- sdmr_ptr = base ? &memctl->memc_lsdmr : &memctl->memc_psdmr;
- orx_ptr = base ? &memctl->memc_or2 : &memctl->memc_or1;
-
- *orx_ptr = orx;
-
- /*
- * Quote from 8260 UM (10.4.2 SDRAM Power-On Initialization, 10-35):
- *
- * "At system reset, initialization software must set up the
- * programmable parameters in the memory controller banks registers
- * (ORx, BRx, P/LSDMR). After all memory parameters are configured,
- * system software should execute the following initialization sequence
- * for each SDRAM device.
- *
- * 1. Issue a PRECHARGE-ALL-BANKS command
- * 2. Issue eight CBR REFRESH commands
- * 3. Issue a MODE-SET command to initialize the mode register
- *
- * The initial commands are executed by setting P/LSDMR[OP] and
- * accessing the SDRAM with a single-byte transaction."
- *
- * The appropriate BRx/ORx registers have already been set when we
- * get here. The SDRAM can be accessed at the address CFG_SDRAM_BASE.
- */
-
- *sdmr_ptr = sdmr | PSDMR_OP_PREA;
- *base = c;
-
- *sdmr_ptr = sdmr | PSDMR_OP_CBRR;
- for (i = 0; i < 8; i++)
- *base = c;
-
- *sdmr_ptr = sdmr | PSDMR_OP_MRW;
- *(base + CFG_MRS_OFFS) = c; /* setting MR on address lines */
-
- *sdmr_ptr = sdmr | PSDMR_OP_NORM | PSDMR_RFEN;
- *base = c;
-
- size = get_ram_size((long *)base, maxsize);
-
- *orx_ptr = orx | ~(size - 1);
-
- return (size);
-}
-
-/*
- * Test Power-On-Reset.
- */
-int power_on_reset (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- /* Test Reset Status Register */
- return gd->reset_status & RSR_CSRS ? 0 : 1;
-}
-
-long int initdram (int board_type)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8260_t *memctl = &immap->im_memctl;
-
-#ifndef CFG_RAMBOOT
- long size8, size9;
-#endif
- long psize, lsize;
-
- psize = 16 * 1024 * 1024;
- lsize = 0;
-
- memctl->memc_psrt = CFG_PSRT;
- memctl->memc_mptpr = CFG_MPTPR;
-
-#if 0 /* Just for debugging */
-#define prt_br_or(brX,orX) do { \
- ulong start = memctl->memc_ ## brX & 0xFFFF8000; \
- ulong sizem = ~memctl->memc_ ## orX | 0x00007FFF; \
- printf ("\n" \
- #brX " 0x%08x " #orX " 0x%08x " \
- "==> 0x%08lx ... 0x%08lx = %ld MB\n", \
- memctl->memc_ ## brX, memctl->memc_ ## orX, \
- start, start+sizem, (sizem+1)>>20); \
- } while (0)
- prt_br_or (br0, or0);
- prt_br_or (br1, or1);
- prt_br_or (br2, or2);
- prt_br_or (br3, or3);
-#endif
-
-#ifndef CFG_RAMBOOT
- /* 60x SDRAM setup:
- */
- size8 = try_init (memctl, CFG_PSDMR_8COL, CFG_OR1_8COL,
- (uchar *) CFG_SDRAM_BASE);
- size9 = try_init (memctl, CFG_PSDMR_9COL, CFG_OR1_9COL,
- (uchar *) CFG_SDRAM_BASE);
-
- if (size8 < size9) {
- psize = size9;
- printf ("(60x:9COL - %ld MB, ", psize >> 20);
- } else {
- psize = try_init (memctl, CFG_PSDMR_8COL, CFG_OR1_8COL,
- (uchar *) CFG_SDRAM_BASE);
- printf ("(60x:8COL - %ld MB, ", psize >> 20);
- }
-
- /* Local SDRAM setup:
- */
-#ifdef CFG_INIT_LOCAL_SDRAM
- memctl->memc_lsrt = CFG_LSRT;
- size8 = try_init (memctl, CFG_LSDMR_8COL, CFG_OR2_8COL,
- (uchar *) SDRAM_BASE2_PRELIM);
- size9 = try_init (memctl, CFG_LSDMR_9COL, CFG_OR2_9COL,
- (uchar *) SDRAM_BASE2_PRELIM);
-
- if (size8 < size9) {
- lsize = size9;
- printf ("Local:9COL - %ld MB) using ", lsize >> 20);
- } else {
- lsize = try_init (memctl, CFG_LSDMR_8COL, CFG_OR2_8COL,
- (uchar *) SDRAM_BASE2_PRELIM);
- printf ("Local:8COL - %ld MB) using ", lsize >> 20);
- }
-
-#if 0
- /* Set up BR2 so that the local SDRAM goes
- * right after the 60x SDRAM
- */
- memctl->memc_br2 = (CFG_BR2_PRELIM & ~BRx_BA_MSK) |
- (CFG_SDRAM_BASE + psize);
-#endif
-#endif /* CFG_INIT_LOCAL_SDRAM */
-#endif /* CFG_RAMBOOT */
-
- icache_enable ();
-
- config_scoh_cs ();
-
- return (psize);
-}
-
-/* ------------------------------------------------------------------------- */
-
-static void config_scoh_cs (void)
-{
- volatile immap_t *immr = (immap_t *) CFG_IMMR;
- volatile memctl8260_t *memctl = &immr->im_memctl;
- volatile can_reg_t *can = (volatile can_reg_t *) CFG_CAN0_BASE;
- volatile uint tmp, i;
-
- /* Initialize OR3 / BR3 for CAN Bus Controller 0 */
- memctl->memc_or3 = CFG_CAN0_OR3;
- memctl->memc_br3 = CFG_CAN0_BR3;
- /* Initialize OR4 / BR4 for CAN Bus Controller 1 */
- memctl->memc_or4 = CFG_CAN1_OR4;
- memctl->memc_br4 = CFG_CAN1_BR4;
-
- /* Initialize MAMR to write in the array at address 0x0 */
- memctl->memc_mamr = 0x00 | MxMR_OP_WARR | MxMR_GPL_x4DIS;
-
- /* Initialize UPMA for CAN: single read */
- memctl->memc_mdr = 0xcffeec00;
- udelay (1); /* Necessary to have the data correct in the UPM array!!!! */
- /* The read on the CAN controller write the data of mdr in UPMA array. */
- /* The index to the array will be incremented automatically
- through this read */
- tmp = can->cpu_interface;
-
- memctl->memc_mdr = 0x0ffcec00;
- udelay (1);
- tmp = can->cpu_interface;
-
- memctl->memc_mdr = 0x0ffcec00;
- udelay (1);
- tmp = can->cpu_interface;
-
- memctl->memc_mdr = 0x0ffcec00;
- udelay (1);
- tmp = can->cpu_interface;
-
- memctl->memc_mdr = 0x0ffcec00;
- udelay (1);
- tmp = can->cpu_interface;
-
- memctl->memc_mdr = 0x0ffcfc00;
- udelay (1);
- tmp = can->cpu_interface;
-
- memctl->memc_mdr = 0x0ffcfc00;
- udelay (1);
- tmp = can->cpu_interface;
-
- memctl->memc_mdr = 0xfffdec07;
- udelay (1);
- tmp = can->cpu_interface;
-
-
- /* Initialize MAMR to write in the array at address 0x18 */
- memctl->memc_mamr = 0x18 | MxMR_OP_WARR | MxMR_GPL_x4DIS;
-
- /* Initialize UPMA for CAN: single write */
- memctl->memc_mdr = 0xfcffec00;
- udelay (1);
- tmp = can->cpu_interface;
-
- memctl->memc_mdr = 0x00ffec00;
- udelay (1);
- tmp = can->cpu_interface;
-
- memctl->memc_mdr = 0x00ffec00;
- udelay (1);
- tmp = can->cpu_interface;
-
- memctl->memc_mdr = 0x00ffec00;
- udelay (1);
- tmp = can->cpu_interface;
-
- memctl->memc_mdr = 0x00ffec00;
- udelay (1);
- tmp = can->cpu_interface;
-
- memctl->memc_mdr = 0x00fffc00;
- udelay (1);
- tmp = can->cpu_interface;
-
- memctl->memc_mdr = 0x00fffc00;
- udelay (1);
- tmp = can->cpu_interface;
-
- memctl->memc_mdr = 0x30ffec07;
- udelay (1);
- tmp = can->cpu_interface;
-
- /* Initialize MAMR */
- memctl->memc_mamr = MxMR_GPL_x4DIS; /* GPL_B4 ouput line Disable */
-
-
- /* Initialize OR5 / BR5 for the extended EEPROM Bank0 */
- memctl->memc_or5 = CFG_EXTPROM_OR5;
- memctl->memc_br5 = CFG_EXTPROM_BR5;
- /* Initialize OR6 / BR6 for the extended EEPROM Bank1 */
- memctl->memc_or6 = CFG_EXTPROM_OR6;
- memctl->memc_br6 = CFG_EXTPROM_BR6;
-
- /* Initialize OR7 / BR7 for the Glue Logic */
- memctl->memc_or7 = CFG_FIOX_OR7;
- memctl->memc_br7 = CFG_FIOX_BR7;
-
- /* Initialize OR8 / BR8 for the DOH Logic */
- memctl->memc_or8 = CFG_FDOHM_OR8;
- memctl->memc_br8 = CFG_FDOHM_BR8;
-
- DEBUGF ("OR0 %08x BR0 %08x\n", memctl->memc_or0, memctl->memc_br0);
- DEBUGF ("OR1 %08x BR1 %08x\n", memctl->memc_or1, memctl->memc_br1);
- DEBUGF ("OR2 %08x BR2 %08x\n", memctl->memc_or2, memctl->memc_br2);
- DEBUGF ("OR3 %08x BR3 %08x\n", memctl->memc_or3, memctl->memc_br3);
- DEBUGF ("OR4 %08x BR4 %08x\n", memctl->memc_or4, memctl->memc_br4);
- DEBUGF ("OR5 %08x BR5 %08x\n", memctl->memc_or5, memctl->memc_br5);
- DEBUGF ("OR6 %08x BR6 %08x\n", memctl->memc_or6, memctl->memc_br6);
- DEBUGF ("OR7 %08x BR7 %08x\n", memctl->memc_or7, memctl->memc_br7);
- DEBUGF ("OR8 %08x BR8 %08x\n", memctl->memc_or8, memctl->memc_br8);
-
- DEBUGF ("UPMA addr 0x0\n");
- memctl->memc_mamr = 0x00 | MxMR_OP_RARR | MxMR_GPL_x4DIS;
- for (i = 0; i < 0x8; i++) {
- tmp = can->cpu_interface;
- udelay (1);
- DEBUGF (" %08x ", memctl->memc_mdr);
- }
- DEBUGF ("\nUPMA addr 0x18\n");
- memctl->memc_mamr = 0x18 | MxMR_OP_RARR | MxMR_GPL_x4DIS;
- for (i = 0; i < 0x8; i++) {
- tmp = can->cpu_interface;
- udelay (1);
- DEBUGF (" %08x ", memctl->memc_mdr);
- }
- DEBUGF ("\n");
- memctl->memc_mamr = MxMR_GPL_x4DIS;
-}
-
-/* ------------------------------------------------------------------------- */
-
-int misc_init_r (void)
-{
- fpga_init ();
- return (0);
-}
-
-/* ------------------------------------------------------------------------- */
diff --git a/board/siemens/SCM/scm.h b/board/siemens/SCM/scm.h
deleted file mode 100644
index 70c12e6cce..0000000000
--- a/board/siemens/SCM/scm.h
+++ /dev/null
@@ -1,87 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef __SCM_H
-#define __SCM_H
-
-/*----------------*/
-/* CAN Structures */
-/*----------------*/
-
-/* Message */
-typedef struct can_msg {
- uchar ctrl_0;
- uchar ctrl_1;
- uchar arbit_0;
- uchar arbit_1;
- uchar arbit_2;
- uchar arbit_3;
- uchar config;
- uchar data[8];
-} can_msg_t;
-
-/* CAN Register */
-typedef struct can_reg {
- uchar ctrl;
- uchar status;
- uchar cpu_interface;
- uchar resv0;
- ushort high_speed_rd;
- ushort gbl_mask_std;
- uint gbl_mask_extd;
- uint msg15_mask;
- can_msg_t msg1 __attribute__ ((packed));
- uchar clkout;
- can_msg_t msg2 __attribute__ ((packed));
- uchar bus_config;
- can_msg_t msg3 __attribute__ ((packed));
- uchar bit_timing_0;
- can_msg_t msg4 __attribute__ ((packed));
- uchar bit_timing_1;
- can_msg_t msg5 __attribute__ ((packed));
- uchar interrupt;
- can_msg_t msg6 __attribute__ ((packed));
- uchar resv1;
- can_msg_t msg7 __attribute__ ((packed));
- uchar resv2;
- can_msg_t msg8 __attribute__ ((packed));
- uchar resv3;
- can_msg_t msg9 __attribute__ ((packed));
- uchar p1conf;
- can_msg_t msg10 __attribute__ ((packed));
- uchar p2conf;
- can_msg_t msg11 __attribute__ ((packed));
- uchar p1in;
- can_msg_t msg12 __attribute__ ((packed));
- uchar p2in;
- can_msg_t msg13 __attribute__ ((packed));
- uchar p1out;
- can_msg_t msg14 __attribute__ ((packed));
- uchar p2out;
- can_msg_t msg15 __attribute__ ((packed));
- uchar ser_res_addr;
- uchar resv_cs[0x8000-0x100]; /* 0x8000 is the min size for CS */
-} can_reg_t;
-
-
-#endif /* __SCM_H */
diff --git a/board/siemens/SCM/u-boot.lds b/board/siemens/SCM/u-boot.lds
deleted file mode 100644
index 05f29c6ed0..0000000000
--- a/board/siemens/SCM/u-boot.lds
+++ /dev/null
@@ -1,126 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc8260/start.o (.text)
- *(.text)
- common/environment.o(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/siemens/common/README b/board/siemens/common/README
deleted file mode 100644
index 7f1c8cd62d..0000000000
--- a/board/siemens/common/README
+++ /dev/null
@@ -1,27 +0,0 @@
-CCM/SCM-Ergaenzungen fuer U-Boot und Linux:
--------------------------------------------
-
-Es gibt nun ein gemeinsames Kommando zum Laden der FPGAs:
-
- => help fpga
- fpga fpga status [name] - print FPGA status
- fpga reset [name] - reset FPGA
- fpga load [name] addr - load FPGA configuration data
-
-Der Name kann beim CCM-Module auch weggelassen werden.
-Die Laengenangabe und damit "puma_len" ist nicht mehr
-noetig:
-
- => fpga load puma 40600000
- FPGA load PUMA: addr 40600000: (00000005)... done
-
-Die MTD-Partitionierung kann nun mittels "bootargs" ueber-
-geben werden:
-
- => printenv addmtd
- addmtd=setenv bootargs ${bootargs}
- mtdparts=0:256k(U-Boot)ro,768k(Kernel),-(Rest)\;1:-(myJFFS2)
-
-Die Portierung auf SMC ist natuerlich noch nicht getestet.
-
-Wolfgang Grandegger (04.06.2002)
diff --git a/board/siemens/common/fpga.c b/board/siemens/common/fpga.c
deleted file mode 100644
index e9941cda61..0000000000
--- a/board/siemens/common/fpga.c
+++ /dev/null
@@ -1,364 +0,0 @@
-/*
- * (C) Copyright 2002
- * Wolfgang Grandegger, DENX Software Engineering, wg@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-
-#include <common.h>
-#include <command.h>
-#include <linux/ctype.h>
-#include <common.h>
-
-#include "fpga.h"
-
-int power_on_reset(void);
-
-/* . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . */
-
-
-static int fpga_get_version(fpga_t* fpga, char* name)
-{
- char vname[12];
- /*
- * Net-list string format:
- * "vvvvvvvvddddddddn...".
- * Version Date Name
- * "0000000322042002PUMA" = PUMA version 3 from 22.04.2002.
- */
- if (strlen(name) < (16 + strlen(fpga->name)))
- goto failure;
- /* Check FPGA name */
- if (strcmp(&name[16], fpga->name) != 0)
- goto failure;
- /* Get version number */
- memcpy(vname, name, 8);
- vname[8] = '\0';
- return simple_strtoul(vname, NULL, 16);
-
- failure:
- printf("Image name %s is invalid\n", name);
- return -1;
-}
-
-/* . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . */
-
-static fpga_t* fpga_get(char* fpga_name)
-{
- char name[FPGA_NAME_LEN];
- int i;
-
- if (strlen(fpga_name) >= FPGA_NAME_LEN)
- goto failure;
- for (i = 0; i < strlen(fpga_name); i++)
- name[i] = toupper(fpga_name[i]);
- name[i] = '\0';
- for (i = 0; i < fpga_count; i++) {
- if (strcmp(name, fpga_list[i].name) == 0)
- return &fpga_list[i];
- }
- failure:
- printf("FPGA: name %s is invalid\n", fpga_name);
- return NULL;
-}
-
-/* . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . */
-
-static void fpga_status (fpga_t* fpga)
-{
- /* Check state */
- if (fpga_control(fpga, FPGA_DONE_IS_HIGH))
- printf ("%s is loaded (%08lx)\n",
- fpga->name, fpga_control(fpga, FPGA_GET_ID));
- else
- printf ("%s is NOT loaded\n", fpga->name);
-}
-
-/* . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . */
-
-#define FPGA_RESET_TIMEOUT 100 /* = 10 ms */
-
-static int fpga_reset (fpga_t* fpga)
-{
- int i;
-
- /* Set PROG to low and wait til INIT goes low */
- fpga_control(fpga, FPGA_PROG_SET_LOW);
- for (i = 0; i < FPGA_RESET_TIMEOUT; i++) {
- udelay (100);
- if (!fpga_control(fpga, FPGA_INIT_IS_HIGH))
- break;
- }
- if (i == FPGA_RESET_TIMEOUT)
- goto failure;
-
- /* Set PROG to high and wait til INIT goes high */
- fpga_control(fpga, FPGA_PROG_SET_HIGH);
- for (i = 0; i < FPGA_RESET_TIMEOUT; i++) {
- udelay (100);
- if (fpga_control(fpga, FPGA_INIT_IS_HIGH))
- break;
- }
- if (i == FPGA_RESET_TIMEOUT)
- goto failure;
-
- return 0;
- failure:
- return 1;
-}
-
-/* . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . */
-
-#define FPGA_LOAD_TIMEOUT 100 /* = 10 ms */
-
-static int fpga_load (fpga_t* fpga, ulong addr, int checkall)
-{
- volatile uchar *fpga_addr = (volatile uchar *)fpga->conf_base;
- image_header_t hdr;
- ulong len, checksum;
- uchar *data = (uchar *)&hdr;
- char *s, msg[32];
- int verify, i;
-
- /*
- * Check the image header and data of the net-list
- */
- memcpy (&hdr, (char *)addr, sizeof(image_header_t));
-
- if (hdr.ih_magic != IH_MAGIC) {
- strcpy (msg, "Bad Image Magic Number");
- goto failure;
- }
-
- len = sizeof(image_header_t);
-
- checksum = hdr.ih_hcrc;
- hdr.ih_hcrc = 0;
-
- if (crc32 (0, data, len) != checksum) {
- strcpy (msg, "Bad Image Header CRC");
- goto failure;
- }
-
- data = (uchar*)(addr + sizeof(image_header_t));
- len = hdr.ih_size;
-
- s = getenv ("verify");
- verify = (s && (*s == 'n')) ? 0 : 1;
- if (verify) {
- if (crc32 (0, data, len) != hdr.ih_dcrc) {
- strcpy (msg, "Bad Image Data CRC");
- goto failure;
- }
- }
-
- if (checkall && fpga_get_version(fpga, (char *)(hdr.ih_name)) < 0)
- return 1;
-
- /* align length */
- if (len & 1)
- ++len;
-
- /*
- * Reset FPGA and wait for completion
- */
- if (fpga_reset(fpga)) {
- strcpy (msg, "Reset Timeout");
- goto failure;
- }
-
- printf ("(%s)... ", hdr.ih_name);
- /*
- * Copy data to FPGA
- */
- fpga_control (fpga, FPGA_LOAD_MODE);
- while (len--) {
- *fpga_addr = *data++;
- }
- fpga_control (fpga, FPGA_READ_MODE);
-
- /*
- * Wait for completion and check error status if timeout
- */
- for (i = 0; i < FPGA_LOAD_TIMEOUT; i++) {
- udelay (100);
- if (fpga_control (fpga, FPGA_DONE_IS_HIGH))
- break;
- }
- if (i == FPGA_LOAD_TIMEOUT) {
- if (fpga_control(fpga, FPGA_INIT_IS_HIGH))
- strcpy(msg, "Invalid Size");
- else
- strcpy(msg, "CRC Error");
- goto failure;
- }
-
- printf("done\n");
- return 0;
-
- failure:
-
- printf("ERROR: %s\n", msg);
- return 1;
-}
-
-#if (CONFIG_COMMANDS & CFG_CMD_BSP)
-
-/* . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . */
-
-int do_fpga (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- ulong addr = 0;
- int i;
- fpga_t* fpga;
-
- if (argc < 2)
- goto failure;
-
- if (strncmp(argv[1], "stat", 4) == 0) { /* status */
- if (argc == 2) {
- for (i = 0; i < fpga_count; i++) {
- fpga_status (&fpga_list[i]);
- }
- }
- else if (argc == 3) {
- if ((fpga = fpga_get(argv[2])) == 0)
- goto failure;
- fpga_status (fpga);
- }
- else
- goto failure;
- }
- else if (strcmp(argv[1],"load") == 0) { /* load */
- if (argc == 3 && fpga_count == 1) {
- fpga = &fpga_list[0];
- }
- else if (argc == 4) {
- if ((fpga = fpga_get(argv[2])) == 0)
- goto failure;
- }
- else
- goto failure;
-
- addr = simple_strtoul(argv[argc-1], NULL, 16);
-
- printf ("FPGA load %s: addr %08lx: ",
- fpga->name, addr);
- fpga_load (fpga, addr, 1);
-
- }
- else if (strncmp(argv[1], "rese", 4) == 0) { /* reset */
- if (argc == 2 && fpga_count == 1) {
- fpga = &fpga_list[0];
- }
- else if (argc == 3) {
- if ((fpga = fpga_get(argv[2])) == 0)
- goto failure;
- }
- else
- goto failure;
-
- printf ("FPGA reset %s: ", fpga->name);
- if (fpga_reset(fpga))
- printf ("ERROR: Timeout\n");
- else
- printf ("done\n");
- }
- else
- goto failure;
-
- return 0;
-
- failure:
- printf ("Usage:\n%s\n", cmdtp->usage);
- return 1;
-}
-
-U_BOOT_CMD(
- fpga, 4, 1, do_fpga,
- "fpga - access FPGA(s)\n",
- "fpga status [name] - print FPGA status\n"
- "fpga reset [name] - reset FPGA\n"
- "fpga load [name] addr - load FPGA configuration data\n"
-);
-
-#endif /* CONFIG_COMMANDS & CFG_CMD_BSP */
-
-/* . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . */
-
-int fpga_init (void)
-{
- ulong addr;
- ulong new_id, old_id = 0;
- image_header_t *hdr;
- fpga_t* fpga;
- int do_load, i, j;
- char name[16], *s;
-
- /*
- * Port setup for FPGA control
- */
- for (i = 0; i < fpga_count; i++) {
- fpga_control(&fpga_list[i], FPGA_INIT_PORTS);
- }
-
- /*
- * Load FPGA(s): a new net-list is loaded if the FPGA is
- * empty, Power-on-Reset or the old one is not up-to-date
- */
- for (i = 0; i < fpga_count; i++) {
- fpga = &fpga_list[i];
- printf ("%s: ", fpga->name);
-
- for (j = 0; j < strlen(fpga->name); j++)
- name[j] = tolower(fpga->name[j]);
- name[j] = '\0';
- sprintf(name, "%s_addr", name);
- addr = 0;
- if ((s = getenv(name)) != NULL)
- addr = simple_strtoul(s, NULL, 16);
-
- if (!addr) {
- printf ("env. variable %s undefined\n", name);
- return 1;
- }
-
- hdr = (image_header_t *)addr;
- if ((new_id = fpga_get_version(fpga, (char *)(hdr->ih_name))) == -1)
- return 1;
-
- do_load = 1;
-
- if (!power_on_reset() && fpga_control(fpga, FPGA_DONE_IS_HIGH)) {
- old_id = fpga_control(fpga, FPGA_GET_ID);
- if (new_id == old_id)
- do_load = 0;
- }
-
- if (do_load) {
- printf ("loading ");
- fpga_load (fpga, addr, 0);
- } else {
- printf ("loaded (%08lx)\n", old_id);
- }
- }
-
- return 0;
-}
diff --git a/board/siemens/common/fpga.h b/board/siemens/common/fpga.h
deleted file mode 100644
index 2de25b0146..0000000000
--- a/board/siemens/common/fpga.h
+++ /dev/null
@@ -1,53 +0,0 @@
-/*
- * (C) Copyright 2002
- * Wolfgang Grandegger, DENX Software Engineering, wg@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-
-#ifndef _FPGA_H_
-#define _FPGA_H_
-
-#define FPGA_INIT_IS_HIGH 0
-#define FPGA_INIT_SET_HIGH 1
-#define FPGA_INIT_SET_LOW 2
-#define FPGA_PROG_SET_HIGH 3
-#define FPGA_PROG_SET_LOW 4
-#define FPGA_DONE_IS_HIGH 5
-#define FPGA_READ_MODE 6
-#define FPGA_LOAD_MODE 7
-#define FPGA_GET_ID 8
-#define FPGA_INIT_PORTS 9
-
-#define FPGA_NAME_LEN 8
-typedef struct {
- char name[FPGA_NAME_LEN];
- ulong conf_base;
- uint init_mask;
- uint prog_mask;
- uint done_mask;
-} fpga_t;
-
-extern fpga_t fpga_list[];
-extern int fpga_count;
-
-ulong fpga_control (fpga_t* fpga, int cmd);
-
-#endif /* _FPGA_H_ */
diff --git a/board/siemens/pcu_e/Makefile b/board/siemens/pcu_e/Makefile
deleted file mode 100644
index 7a2014d466..0000000000
--- a/board/siemens/pcu_e/Makefile
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/siemens/pcu_e/config.mk b/board/siemens/pcu_e/config.mk
deleted file mode 100644
index 10f37734ae..0000000000
--- a/board/siemens/pcu_e/config.mk
+++ /dev/null
@@ -1,28 +0,0 @@
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# Siemens PCU E Boards
-#
-
-TEXT_BASE = 0xFFF00000
diff --git a/board/siemens/pcu_e/flash.c b/board/siemens/pcu_e/flash.c
deleted file mode 100644
index 05c364bb23..0000000000
--- a/board/siemens/pcu_e/flash.c
+++ /dev/null
@@ -1,700 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-
-#if defined(CFG_ENV_IS_IN_FLASH)
-# ifndef CFG_ENV_ADDR
-# define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_ENV_OFFSET)
-# endif
-# ifndef CFG_ENV_SIZE
-# define CFG_ENV_SIZE CFG_ENV_SECT_SIZE
-# endif
-# ifndef CFG_ENV_SECT_SIZE
-# define CFG_ENV_SECT_SIZE CFG_ENV_SIZE
-# endif
-#endif
-
-/*---------------------------------------------------------------------*/
-#undef DEBUG_FLASH
-
-#ifdef DEBUG_FLASH
-#define DEBUGF(fmt,args...) printf(fmt ,##args)
-#else
-#define DEBUGF(fmt,args...)
-#endif
-/*---------------------------------------------------------------------*/
-
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (vu_long *addr, flash_info_t *info);
-static int write_data (flash_info_t *info, ulong dest, ulong data);
-static void flash_get_offsets (ulong base, flash_info_t *info);
-
-/*-----------------------------------------------------------------------
- *
- * The PCU E uses an address map where flash banks are aligned top
- * down, so that the "first" flash bank ends at top of memory, and
- * the monitor entry point is at address (0xFFF00100). The second
- * flash bank is mapped immediately below bank 0.
- *
- * This is NOT in conformance to the "official" memory map!
- *
- */
-
-#define PCU_MONITOR_BASE ( (flash_info[0].start[0] + flash_info[0].size - 1) \
- - (0xFFFFFFFF - CFG_MONITOR_BASE) )
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- unsigned long base, size_b0, size_b1;
- int i;
-
- /* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* Static FLASH Bank configuration here - FIXME XXX */
-
- /*
- * Warning:
- *
- * Since the PCU E memory map assigns flash banks top down,
- * we swap the numbering later if both banks are equipped,
- * so they look like a contiguous area of memory.
- */
- DEBUGF("\n## Get flash bank 1 size @ 0x%08x\n",FLASH_BASE0_PRELIM);
-
- size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size_b0, size_b0<<20);
- }
-
- DEBUGF("## Get flash bank 2 size @ 0x%08x\n",FLASH_BASE6_PRELIM);
- size_b1 = flash_get_size((vu_long *)FLASH_BASE6_PRELIM, &flash_info[1]);
-
- DEBUGF("## Prelim. Flash bank sizes: %08lx + 0x%08lx\n", size_b0, size_b1);
-
- if (size_b1 > size_b0) {
- printf ("## ERROR: "
- "Bank 1 (0x%08lx = %ld MB) > Bank 0 (0x%08lx = %ld MB)\n",
- size_b1, size_b1<<20,
- size_b0, size_b0<<20
- );
- flash_info[0].flash_id = FLASH_UNKNOWN;
- flash_info[1].flash_id = FLASH_UNKNOWN;
- flash_info[0].sector_count = -1;
- flash_info[1].sector_count = -1;
- flash_info[0].size = 0;
- flash_info[1].size = 0;
- return (0);
- }
-
- DEBUGF ("## Before remap: "
- "BR0: 0x%08x OR0: 0x%08x "
- "BR6: 0x%08x OR6: 0x%08x\n",
- memctl->memc_br0, memctl->memc_or0,
- memctl->memc_br6, memctl->memc_or6);
-
- /* Remap FLASH according to real size */
- base = 0 - size_b0;
- memctl->memc_or0 = CFG_OR_TIMING_FLASH | (-size_b0 & 0xFFFF8000);
- memctl->memc_br0 = (base & BR_BA_MSK) | BR_PS_16 | BR_MS_GPCM | BR_V;
-
- DEBUGF("## BR0: 0x%08x OR0: 0x%08x\n",
- memctl->memc_br0, memctl->memc_or0);
-
- /* Re-do sizing to get full correct info */
- size_b0 = flash_get_size((vu_long *)base, &flash_info[0]);
- base = 0 - size_b0;
-
- flash_info[0].size = size_b0;
-
- flash_get_offsets (base, &flash_info[0]);
-
- /* monitor protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- PCU_MONITOR_BASE,
- PCU_MONITOR_BASE+monitor_flash_len-1,
- &flash_info[0]);
-
-#ifdef CFG_ENV_IS_IN_FLASH
- /* ENV protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR+CFG_ENV_SECT_SIZE-1,
- &flash_info[0]);
-#endif
-
- if (size_b1) {
- flash_info_t tmp_info;
-
- memctl->memc_or6 = CFG_OR_TIMING_FLASH | (-size_b1 & 0xFFFF8000);
- memctl->memc_br6 = ((base - size_b1) & BR_BA_MSK) |
- BR_PS_16 | BR_MS_GPCM | BR_V;
-
- DEBUGF("## New BR6: 0x%08x OR6: 0x%08x\n",
- memctl->memc_br6, memctl->memc_or6);
-
- /* Re-do sizing to get full correct info */
- size_b1 = flash_get_size((vu_long *)(base - size_b1),
- &flash_info[1]);
- base -= size_b1;
-
- flash_get_offsets (base, &flash_info[1]);
-
- flash_info[1].size = size_b1;
-
-#ifdef CFG_ENV_IS_IN_FLASH
- /* ENV protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR+CFG_ENV_SECT_SIZE-1,
- &flash_info[1]);
-#endif
- /*
- * Swap bank numbers so that addresses are in ascending order
- */
- tmp_info = flash_info[0];
- flash_info[0] = flash_info[1];
- flash_info[1] = tmp_info;
- } else {
- memctl->memc_br1 = 0; /* invalidate bank */
-
- flash_info[1].flash_id = FLASH_UNKNOWN;
- flash_info[1].sector_count = -1;
- }
-
-
- DEBUGF("## Final Flash bank sizes: %08lx + 0x%08lx\n",size_b0,size_b1);
-
- return (size_b0 + size_b1);
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_get_offsets (ulong base, flash_info_t *info)
-{
- int i;
- short n;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- return;
- }
-
- if ((info->flash_id & FLASH_VENDMASK) != FLASH_MAN_AMD) {
- return;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AMDL322T:
- case FLASH_AMDL323T:
- case FLASH_AMDL324T:
- /* set sector offsets for top boot block type */
-
- base += info->size;
- i = info->sector_count;
- for (n=0; n<8; ++n) { /* 8 x 8k boot sectors */
- base -= 8 << 10;
- --i;
- info->start[i] = base;
- }
- while (i > 0) { /* 64k regular sectors */
- base -= 64 << 10;
- --i;
- info->start[i] = base;
- }
- return;
- case FLASH_AMDL322B:
- case FLASH_AMDL323B:
- case FLASH_AMDL324B:
- /* set sector offsets for bottom boot block type */
- for (i=0; i<8; ++i) { /* 8 x 8k boot sectors */
- info->start[i] = base;
- base += 8 << 10;
- }
- while (base < info->size) { /* 64k regular sectors */
- info->start[i] = base;
- base += 64 << 10;
- ++i;
- }
- return;
- case FLASH_AMDL640:
- /* set sector offsets for dual boot block type */
- for (i=0; i<8; ++i) { /* 8 x 8k boot sectors */
- info->start[i] = base;
- base += 8 << 10;
- }
- n = info->sector_count - 8;
- while (i < n) { /* 64k regular sectors */
- info->start[i] = base;
- base += 64 << 10;
- ++i;
- }
- while (i < info->sector_count) { /* 8 x 8k boot sectors */
- info->start[i] = base;
- base += 8 << 10;
- ++i;
- }
- return;
- default:
- return;
- }
- /* NOTREACHED */
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD: printf ("AMD "); break;
- case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
- default: printf ("Unknown Vendor "); break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AMDL322B: printf ("AM29DL322B (32 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AMDL322T: printf ("AM29DL322T (32 Mbit, top boot sector)\n");
- break;
- case FLASH_AMDL323B: printf ("AM29DL323B (32 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AMDL323T: printf ("AM29DL323T (32 Mbit, top boot sector)\n");
- break;
- case FLASH_AMDL324B: printf ("AM29DL324B (32 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AMDL324T: printf ("AM29DL324T (32 Mbit, top boot sector)\n");
- break;
- case FLASH_AMDL640: printf ("AM29DL640D (64 Mbit, dual boot sector)\n");
- break;
- default: printf ("Unknown Chip Type 0x%lX\n",
- info->flash_id);
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " "
- );
- }
- printf ("\n");
- return;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-
-static ulong flash_get_size (vu_long *addr, flash_info_t *info)
-{
- short i;
- ushort value;
- vu_short *saddr = (vu_short *)addr;
-
- /* Write auto select command: read Manufacturer ID */
- saddr[0x0555] = 0x00AA;
- saddr[0x02AA] = 0x0055;
- saddr[0x0555] = 0x0090;
-
- value = saddr[0];
-
- DEBUGF("Manuf. ID @ 0x%08lx: 0x%04x\n", (ulong)addr, value);
-
- switch (value) {
- case (AMD_MANUFACT & 0xFFFF):
- info->flash_id = FLASH_MAN_AMD;
- break;
- case (FUJ_MANUFACT & 0xFFFF):
- info->flash_id = FLASH_MAN_FUJ;
- break;
- default:
- DEBUGF("Unknown Manufacturer ID\n");
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- return (0); /* no or unknown flash */
- }
-
- value = saddr[1]; /* device ID */
-
- DEBUGF("Device ID @ 0x%08lx: 0x%04x\n", (ulong)(&addr[1]), value);
-
- switch (value) {
-
- case (AMD_ID_DL322T & 0xFFFF):
- info->flash_id += FLASH_AMDL322T;
- info->sector_count = 71;
- info->size = 0x00400000;
- break; /* => 8 MB */
-
- case (AMD_ID_DL322B & 0xFFFF):
- info->flash_id += FLASH_AMDL322B;
- info->sector_count = 71;
- info->size = 0x00400000;
- break; /* => 8 MB */
-
- case (AMD_ID_DL323T & 0xFFFF):
- info->flash_id += FLASH_AMDL323T;
- info->sector_count = 71;
- info->size = 0x00400000;
- break; /* => 8 MB */
-
- case (AMD_ID_DL323B & 0xFFFF):
- info->flash_id += FLASH_AMDL323B;
- info->sector_count = 71;
- info->size = 0x00400000;
- break; /* => 8 MB */
-
- case (AMD_ID_DL324T & 0xFFFF):
- info->flash_id += FLASH_AMDL324T;
- info->sector_count = 71;
- info->size = 0x00400000;
- break; /* => 8 MB */
-
- case (AMD_ID_DL324B & 0xFFFF):
- info->flash_id += FLASH_AMDL324B;
- info->sector_count = 71;
- info->size = 0x00400000;
- break; /* => 8 MB */
- case (AMD_ID_DL640 & 0xFFFF):
- info->flash_id += FLASH_AMDL640;
- info->sector_count = 142;
- info->size = 0x00800000;
- break;
- default:
- DEBUGF("Unknown Device ID\n");
- info->flash_id = FLASH_UNKNOWN;
- return (0); /* => no or unknown flash */
-
- }
-
- flash_get_offsets ((ulong)addr, info);
-
- /* check for protected sectors */
- for (i = 0; i < info->sector_count; i++) {
-#if 0
- /* read sector protection at sector address, (A7 .. A0) = 0x02 */
- /* D0 = 1 if protected */
- saddr = (vu_short *)(info->start[i]);
- info->protect[i] = saddr[2] & 1;
-#else
- info->protect[i] =0;
-#endif
- }
-
- if (info->sector_count > CFG_MAX_FLASH_SECT) {
- printf ("** ERROR: sector count %d > max (%d) **\n",
- info->sector_count, CFG_MAX_FLASH_SECT);
- info->sector_count = CFG_MAX_FLASH_SECT;
- }
-
- saddr = (vu_short *)info->start[0];
- *saddr = 0x00F0; /* restore read mode */
-
- return (info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- vu_short *addr = (vu_short*)(info->start[0]);
- int flag, prot, sect, l_sect;
- ulong start, now, last;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- if ((info->flash_id == FLASH_UNKNOWN) ||
- (info->flash_id > FLASH_AMD_COMP)) {
- printf ("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- l_sect = -1;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[0x0555] = 0x00AA;
- addr[0x02AA] = 0x0055;
- addr[0x0555] = 0x0080;
- addr[0x0555] = 0x00AA;
- addr[0x02AA] = 0x0055;
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr = (vu_short*)(info->start[sect]);
- addr[0] = 0x0030;
- l_sect = sect;
- }
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- /*
- * We wait for the last triggered sector
- */
- if (l_sect < 0)
- goto DONE;
-
- start = get_timer (0);
- last = start;
- addr = (vu_short*)(info->start[l_sect]);
- while ((addr[0] & 0x0080) != 0x0080) {
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- return 1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- }
-
-DONE:
- /* reset to read mode */
- addr = (vu_short *)info->start[0];
- addr[0] = 0x00F0; /* reset bank */
-
- printf (" done\n");
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-#define FLASH_WIDTH 2 /* flash bus width in bytes */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int i, l, rc;
-
- wp = (addr & ~(FLASH_WIDTH-1)); /* get lower FLASH_WIDTH aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
- for (; i<FLASH_WIDTH && cnt>0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<FLASH_WIDTH; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- if ((rc = write_data(info, wp, data)) != 0) {
- return (rc);
- }
- wp += FLASH_WIDTH;
- }
-
- /*
- * handle FLASH_WIDTH aligned part
- */
- while (cnt >= FLASH_WIDTH) {
- data = 0;
- for (i=0; i<FLASH_WIDTH; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_data(info, wp, data)) != 0) {
- return (rc);
- }
- wp += FLASH_WIDTH;
- cnt -= FLASH_WIDTH;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<FLASH_WIDTH && cnt>0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i<FLASH_WIDTH; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- return (write_data(info, wp, data));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_data (flash_info_t *info, ulong dest, ulong data)
-{
- vu_short *addr = (vu_short*)(info->start[0]);
- vu_short *sdest = (vu_short *)dest;
- ushort sdata = (ushort)data;
- ushort sval;
- ulong start, passed;
- int flag, rc;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*sdest & sdata) != sdata) {
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[0x0555] = 0x00AA;
- addr[0x02AA] = 0x0055;
- addr[0x0555] = 0x00A0;
-
-#ifdef WORKAROUND_FOR_BROKEN_HARDWARE
- /* work around the timeout bugs */
- udelay(20);
-#endif
-
- *sdest = sdata;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- rc = 0;
- /* data polling for D7 */
- start = get_timer (0);
-
- for (passed=0; passed < CFG_FLASH_WRITE_TOUT; passed=get_timer(start)) {
-
- sval = *sdest;
-
- if ((sval & 0x0080) == (sdata & 0x0080))
- break;
-
- if ((sval & 0x0020) == 0) /* DQ5: Timeout? */
- continue;
-
- sval = *sdest;
-
- if ((sval & 0x0080) != (sdata & 0x0080))
- rc = 1;
-
- break;
- }
-
- if (rc) {
- DEBUGF ("Program cycle failed @ addr 0x%08lX: val %04X data %04X\n",
- dest, sval, sdata);
- }
-
- if (passed >= CFG_FLASH_WRITE_TOUT) {
- DEBUGF ("Timeout @ addr 0x%08lX: val %04X data %04X\n",
- dest, sval, sdata);
- rc = 1;
- }
-
- /* reset to read mode */
- addr = (vu_short *)info->start[0];
- addr[0] = 0x00F0; /* reset bank */
-
- return (rc);
-}
-
-/*-----------------------------------------------------------------------
- */
diff --git a/board/siemens/pcu_e/pcu_e.c b/board/siemens/pcu_e/pcu_e.c
deleted file mode 100644
index 3f05e4a6ab..0000000000
--- a/board/siemens/pcu_e/pcu_e.c
+++ /dev/null
@@ -1,563 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-#include <commproc.h>
-#include <i2c.h>
-#include <command.h>
-
-/* ------------------------------------------------------------------------- */
-
-static long int dram_size (long int, long int *, long int);
-static void puma_status (void);
-static void puma_set_mode (int mode);
-static int puma_init_done (void);
-static void puma_load (ulong addr, ulong len);
-
-/* ------------------------------------------------------------------------- */
-
-#define _NOT_USED_ 0xFFFFFFFF
-
-/*
- * 50 MHz SDRAM access using UPM A
- */
-const uint sdram_table[] = {
- /*
- * Single Read. (Offset 0 in UPM RAM)
- */
- 0x1f0dfc04, 0xeeafbc04, 0x11af7c04, 0xefbeec00,
- 0x1ffddc47, /* last */
- /*
- * SDRAM Initialization (offset 5 in UPM RAM)
- *
- * This is no UPM entry point. The following definition uses
- * the remaining space to establish an initialization
- * sequence, which is executed by a RUN command.
- *
- */
- 0x1ffddc35, 0xefceac34, 0x1f3d5c35, /* last */
- /*
- * Burst Read. (Offset 8 in UPM RAM)
- */
- 0x1f0dfc04, 0xeeafbc04, 0x10af7c04, 0xf0affc00,
- 0xf0affc00, 0xf1affc00, 0xefbeec00, 0x1ffddc47, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /*
- * Single Write. (Offset 18 in UPM RAM)
- */
- 0x1f0dfc04, 0xeeafac00, 0x01be4c04, 0x1ffddc47, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Burst Write. (Offset 20 in UPM RAM)
- */
- 0x1f0dfc04, 0xeeafac00, 0x10af5c00, 0xf0affc00,
- 0xf0affc00, 0xe1beec04, 0x1ffddc47, /* last */
- _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Refresh (Offset 30 in UPM RAM)
- */
- 0x1ffd7c84, 0xfffffc04, 0xfffffc04, 0xfffffc04,
- 0xfffffc84, 0xfffffc07, /* last */
- _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Exception. (Offset 3c in UPM RAM)
- */
- 0x7ffffc07, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_,
-};
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * PUMA access using UPM B
- */
-const uint puma_table[] = {
- /*
- * Single Read. (Offset 0 in UPM RAM)
- */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_,
- /*
- * Precharge and MRS
- */
- _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Burst Read. (Offset 8 in UPM RAM)
- */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Single Write. (Offset 18 in UPM RAM)
- */
- 0x0ffff804, 0x0ffff400, 0x3ffffc47, /* last */
- _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Burst Write. (Offset 20 in UPM RAM)
- */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Refresh (Offset 30 in UPM RAM)
- */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Exception. (Offset 3c in UPM RAM)
- */
- 0x7ffffc07, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_,
-};
-
-/* ------------------------------------------------------------------------- */
-
-
-/*
- * Check Board Identity:
- *
- */
-
-int checkboard (void)
-{
- puts ("Board: Siemens PCU E\n");
- return (0);
-}
-
-/* ------------------------------------------------------------------------- */
-
-long int initdram (int board_type)
-{
- volatile immap_t *immr = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immr->im_memctl;
- long int size_b0, reg;
- int i;
-
- /*
- * Configure UPMA for SDRAM
- */
- upmconfig (UPMA, (uint *) sdram_table,
- sizeof (sdram_table) / sizeof (uint));
-
- memctl->memc_mptpr = CFG_MPTPR;
-
- /* burst length=4, burst type=sequential, CAS latency=2 */
- memctl->memc_mar = 0x00000088;
-
- /*
- * Map controller bank 2 to the SDRAM bank at preliminary address.
- */
-#if PCU_E_WITH_SWAPPED_CS /* XXX */
- memctl->memc_or5 = CFG_OR5_PRELIM;
- memctl->memc_br5 = CFG_BR5_PRELIM;
-#else /* XXX */
- memctl->memc_or2 = CFG_OR2_PRELIM;
- memctl->memc_br2 = CFG_BR2_PRELIM;
-#endif /* XXX */
-
- /* initialize memory address register */
- memctl->memc_mamr = CFG_MAMR; /* refresh not enabled yet */
-
- /* mode initialization (offset 5) */
-#if PCU_E_WITH_SWAPPED_CS /* XXX */
- udelay (200); /* 0x8000A105 */
- memctl->memc_mcr = MCR_OP_RUN | MCR_MB_CS5 | MCR_MLCF (1) | MCR_MAD (0x05);
-#else /* XXX */
- udelay (200); /* 0x80004105 */
- memctl->memc_mcr = MCR_OP_RUN | MCR_MB_CS2 | MCR_MLCF (1) | MCR_MAD (0x05);
-#endif /* XXX */
-
- /* run 2 refresh sequence with 4-beat refresh burst (offset 0x30) */
-#if PCU_E_WITH_SWAPPED_CS /* XXX */
- udelay (1); /* 0x8000A830 */
- memctl->memc_mcr = MCR_OP_RUN | MCR_MB_CS5 | MCR_MLCF (8) | MCR_MAD (0x30);
-#else /* XXX */
- udelay (1); /* 0x80004830 */
- memctl->memc_mcr = MCR_OP_RUN | MCR_MB_CS2 | MCR_MLCF (8) | MCR_MAD (0x30);
-#endif /* XXX */
-
-#if PCU_E_WITH_SWAPPED_CS /* XXX */
- udelay (1); /* 0x8000A106 */
- memctl->memc_mcr = MCR_OP_RUN | MCR_MB_CS5 | MCR_MLCF (1) | MCR_MAD (0x06);
-#else /* XXX */
- udelay (1); /* 0x80004106 */
- memctl->memc_mcr = MCR_OP_RUN | MCR_MB_CS2 | MCR_MLCF (1) | MCR_MAD (0x06);
-#endif /* XXX */
-
- reg = memctl->memc_mamr;
- reg &= ~MAMR_TLFA_MSK; /* switch timer loop ... */
- reg |= MAMR_TLFA_4X; /* ... to 4x */
- reg |= MAMR_PTAE; /* enable refresh */
- memctl->memc_mamr = reg;
-
- udelay (200);
-
- /* Need at least 10 DRAM accesses to stabilize */
- for (i = 0; i < 10; ++i) {
-#if PCU_E_WITH_SWAPPED_CS /* XXX */
- volatile unsigned long *addr =
- (volatile unsigned long *) SDRAM_BASE5_PRELIM;
-#else /* XXX */
- volatile unsigned long *addr =
- (volatile unsigned long *) SDRAM_BASE2_PRELIM;
-#endif /* XXX */
- unsigned long val;
-
- val = *(addr + i);
- *(addr + i) = val;
- }
-
- /*
- * Check Bank 0 Memory Size for re-configuration
- */
-#if PCU_E_WITH_SWAPPED_CS /* XXX */
- size_b0 = dram_size (CFG_MAMR, (long *) SDRAM_BASE5_PRELIM, SDRAM_MAX_SIZE);
-#else /* XXX */
- size_b0 = dram_size (CFG_MAMR, (long *) SDRAM_BASE2_PRELIM, SDRAM_MAX_SIZE);
-#endif /* XXX */
-
- memctl->memc_mamr = CFG_MAMR | MAMR_PTAE;
-
- /*
- * Final mapping:
- */
-
-#if PCU_E_WITH_SWAPPED_CS /* XXX */
- memctl->memc_or5 = ((-size_b0) & 0xFFFF0000) | SDRAM_TIMING;
- memctl->memc_br5 = (CFG_SDRAM_BASE & BR_BA_MSK) | BR_MS_UPMA | BR_V;
-#else /* XXX */
- memctl->memc_or2 = ((-size_b0) & 0xFFFF0000) | SDRAM_TIMING;
- memctl->memc_br2 = (CFG_SDRAM_BASE & BR_BA_MSK) | BR_MS_UPMA | BR_V;
-#endif /* XXX */
- udelay (1000);
-
- /*
- * Configure UPMB for PUMA
- */
- upmconfig (UPMB, (uint *) puma_table,
- sizeof (puma_table) / sizeof (uint));
-
- return (size_b0);
-}
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Check memory range for valid RAM. A simple memory test determines
- * the actually available RAM size between addresses `base' and
- * `base + maxsize'. Some (not all) hardware errors are detected:
- * - short between address lines
- * - short between data lines
- */
-
-static long int dram_size (long int mamr_value, long int *base,
- long int maxsize)
-{
- volatile immap_t *immr = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immr->im_memctl;
-
- memctl->memc_mamr = mamr_value;
-
- return (get_ram_size (base, maxsize));
-}
-
-/* ------------------------------------------------------------------------- */
-
-#if PCU_E_WITH_SWAPPED_CS /* XXX */
-#define ETH_CFG_BITS (CFG_PB_ETH_CFG1 | CFG_PB_ETH_CFG2 | CFG_PB_ETH_CFG3 )
-#else /* XXX */
-#define ETH_CFG_BITS (CFG_PB_ETH_MDDIS | CFG_PB_ETH_CFG1 | \
- CFG_PB_ETH_CFG2 | CFG_PB_ETH_CFG3 )
-#endif /* XXX */
-
-#define ETH_ALL_BITS (ETH_CFG_BITS | CFG_PB_ETH_POWERDOWN | CFG_PB_ETH_RESET)
-
-void reset_phy (void)
-{
- immap_t *immr = (immap_t *) CFG_IMMR;
- ulong value;
-
- /* Configure all needed port pins for GPIO */
-#if PCU_E_WITH_SWAPPED_CS /* XXX */
-# ifdef CFG_ETH_MDDIS_VALUE
- immr->im_ioport.iop_padat |= CFG_PA_ETH_MDDIS;
-# else
- immr->im_ioport.iop_padat &= ~(CFG_PA_ETH_MDDIS); /* Set low */
-# endif
- immr->im_ioport.iop_papar &= ~(CFG_PA_ETH_MDDIS); /* GPIO */
- immr->im_ioport.iop_paodr &= ~(CFG_PA_ETH_MDDIS); /* active output */
- immr->im_ioport.iop_padir |= CFG_PA_ETH_MDDIS; /* output */
-#endif /* XXX */
- immr->im_cpm.cp_pbpar &= ~(ETH_ALL_BITS); /* GPIO */
- immr->im_cpm.cp_pbodr &= ~(ETH_ALL_BITS); /* active output */
-
- value = immr->im_cpm.cp_pbdat;
-
- /* Assert Powerdown and Reset signals */
- value |= CFG_PB_ETH_POWERDOWN;
- value &= ~(CFG_PB_ETH_RESET);
-
- /* PHY configuration includes MDDIS and CFG1 ... CFG3 */
-#if !PCU_E_WITH_SWAPPED_CS
-# ifdef CFG_ETH_MDDIS_VALUE
- value |= CFG_PB_ETH_MDDIS;
-# else
- value &= ~(CFG_PB_ETH_MDDIS);
-# endif
-#endif
-#ifdef CFG_ETH_CFG1_VALUE
- value |= CFG_PB_ETH_CFG1;
-#else
- value &= ~(CFG_PB_ETH_CFG1);
-#endif
-#ifdef CFG_ETH_CFG2_VALUE
- value |= CFG_PB_ETH_CFG2;
-#else
- value &= ~(CFG_PB_ETH_CFG2);
-#endif
-#ifdef CFG_ETH_CFG3_VALUE
- value |= CFG_PB_ETH_CFG3;
-#else
- value &= ~(CFG_PB_ETH_CFG3);
-#endif
-
- /* Drive output signals to initial state */
- immr->im_cpm.cp_pbdat = value;
- immr->im_cpm.cp_pbdir |= ETH_ALL_BITS;
- udelay (10000);
-
- /* De-assert Ethernet Powerdown */
- immr->im_cpm.cp_pbdat &= ~(CFG_PB_ETH_POWERDOWN); /* Enable PHY power */
- udelay (10000);
-
- /* de-assert RESET signal of PHY */
- immr->im_cpm.cp_pbdat |= CFG_PB_ETH_RESET;
- udelay (1000);
-}
-
-/*-----------------------------------------------------------------------
- * Board Special Commands: access functions for "PUMA" FPGA
- */
-#if (CONFIG_COMMANDS & CFG_CMD_BSP)
-
-#define PUMA_READ_MODE 0
-#define PUMA_LOAD_MODE 1
-
-int do_puma (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
-{
- ulong addr, len;
-
- switch (argc) {
- case 2: /* PUMA reset */
- if (strncmp (argv[1], "stat", 4) == 0) { /* Reset */
- puma_status ();
- return 0;
- }
- break;
- case 4: /* PUMA load addr len */
- if (strcmp (argv[1], "load") != 0)
- break;
-
- addr = simple_strtoul (argv[2], NULL, 16);
- len = simple_strtoul (argv[3], NULL, 16);
-
- printf ("PUMA load: addr %08lX len %ld (0x%lX): ",
- addr, len, len);
- puma_load (addr, len);
-
- return 0;
- default:
- break;
- }
- printf ("Usage:\n%s\n", cmdtp->usage);
- return 1;
-}
-
-U_BOOT_CMD (puma, 4, 1, do_puma,
- "puma - access PUMA FPGA\n",
- "status - print PUMA status\n"
- "puma load addr len - load PUMA configuration data\n");
-
-#endif /* CFG_CMD_BSP */
-
-/* . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . */
-
-static void puma_set_mode (int mode)
-{
- volatile immap_t *immr = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immr->im_memctl;
-
- /* disable PUMA in memory controller */
-#if PCU_E_WITH_SWAPPED_CS /* XXX */
- memctl->memc_br3 = 0;
-#else /* XXX */
- memctl->memc_br4 = 0;
-#endif /* XXX */
-
- switch (mode) {
- case PUMA_READ_MODE:
-#if PCU_E_WITH_SWAPPED_CS /* XXX */
- memctl->memc_or3 = PUMA_CONF_OR_READ;
- memctl->memc_br3 = PUMA_CONF_BR_READ;
-#else /* XXX */
- memctl->memc_or4 = PUMA_CONF_OR_READ;
- memctl->memc_br4 = PUMA_CONF_BR_READ;
-#endif /* XXX */
- break;
- case PUMA_LOAD_MODE:
-#if PCU_E_WITH_SWAPPED_CS /* XXX */
- memctl->memc_or3 = PUMA_CONF_OR_LOAD;
- memctl->memc_br3 = PUMA_CONF_BR_LOAD;
-#else /* XXX */
- memctl->memc_or4 = PUMA_CONF_OR_READ;
- memctl->memc_br4 = PUMA_CONF_BR_READ;
-#endif /* XXX */
- break;
- }
-}
-
-/* . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . */
-
-#define PUMA_INIT_TIMEOUT 1000 /* max. 1000 ms = 1 second */
-
-static void puma_load (ulong addr, ulong len)
-{
- volatile immap_t *immr = (immap_t *) CFG_IMMR;
- volatile uchar *fpga_addr = (volatile uchar *) PUMA_CONF_BASE; /* XXX ??? */
- uchar *data = (uchar *) addr;
- int i;
-
- /* align length */
- if (len & 1)
- ++len;
-
- /* Reset FPGA */
- immr->im_ioport.iop_pcpar &= ~(CFG_PC_PUMA_INIT); /* make input */
- immr->im_ioport.iop_pcso &= ~(CFG_PC_PUMA_INIT);
- immr->im_ioport.iop_pcdir &= ~(CFG_PC_PUMA_INIT);
-
-#if PCU_E_WITH_SWAPPED_CS /* XXX */
- immr->im_cpm.cp_pbpar &= ~(CFG_PB_PUMA_PROG); /* GPIO */
- immr->im_cpm.cp_pbodr &= ~(CFG_PB_PUMA_PROG); /* active output */
- immr->im_cpm.cp_pbdat &= ~(CFG_PB_PUMA_PROG); /* Set low */
- immr->im_cpm.cp_pbdir |= CFG_PB_PUMA_PROG; /* output */
-#else
- immr->im_ioport.iop_papar &= ~(CFG_PA_PUMA_PROG); /* GPIO */
- immr->im_ioport.iop_padat &= ~(CFG_PA_PUMA_PROG); /* Set low */
- immr->im_ioport.iop_paodr &= ~(CFG_PA_PUMA_PROG); /* active output */
- immr->im_ioport.iop_padir |= CFG_PA_PUMA_PROG; /* output */
-#endif /* XXX */
- udelay (100);
-
-#if PCU_E_WITH_SWAPPED_CS /* XXX */
- immr->im_cpm.cp_pbdat |= CFG_PB_PUMA_PROG; /* release reset */
-#else
- immr->im_ioport.iop_padat |= CFG_PA_PUMA_PROG; /* release reset */
-#endif /* XXX */
-
- /* wait until INIT indicates completion of reset */
- for (i = 0; i < PUMA_INIT_TIMEOUT; ++i) {
- udelay (1000);
- if (immr->im_ioport.iop_pcdat & CFG_PC_PUMA_INIT)
- break;
- }
- if (i == PUMA_INIT_TIMEOUT) {
- printf ("*** PUMA init timeout ***\n");
- return;
- }
-
- puma_set_mode (PUMA_LOAD_MODE);
-
- while (len--)
- *fpga_addr = *data++;
-
- puma_set_mode (PUMA_READ_MODE);
-
- puma_status ();
-}
-
-/* . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . */
-
-static void puma_status (void)
-{
- /* Check state */
- printf ("PUMA initialization is %scomplete\n",
- puma_init_done ()? "" : "NOT ");
-}
-
-/* . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . */
-
-static int puma_init_done (void)
-{
- volatile immap_t *immr = (immap_t *) CFG_IMMR;
-
- /* make sure pin is GPIO input */
- immr->im_ioport.iop_pcpar &= ~(CFG_PC_PUMA_DONE);
- immr->im_ioport.iop_pcso &= ~(CFG_PC_PUMA_DONE);
- immr->im_ioport.iop_pcdir &= ~(CFG_PC_PUMA_DONE);
-
- return (immr->im_ioport.iop_pcdat & CFG_PC_PUMA_DONE) ? 1 : 0;
-}
-
-/* ------------------------------------------------------------------------- */
-
-int misc_init_r (void)
-{
- ulong addr = 0;
- ulong len = 0;
- char *s;
-
- printf ("PUMA: ");
- if (puma_init_done ()) {
- printf ("initialized\n");
- return 0;
- }
-
- if ((s = getenv ("puma_addr")) != NULL)
- addr = simple_strtoul (s, NULL, 16);
-
- if ((s = getenv ("puma_len")) != NULL)
- len = simple_strtoul (s, NULL, 16);
-
- if ((!addr) || (!len)) {
- printf ("net list undefined\n");
- return 0;
- }
-
- printf ("loading... ");
-
- puma_load (addr, len);
- return (0);
-}
-
-/* ------------------------------------------------------------------------- */
diff --git a/board/siemens/pcu_e/u-boot.lds b/board/siemens/pcu_e/u-boot.lds
deleted file mode 100644
index 6505d45561..0000000000
--- a/board/siemens/pcu_e/u-boot.lds
+++ /dev/null
@@ -1,130 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc8xx/start.o (.text)
- common/environment.o(.text)
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/siemens/pcu_e/u-boot.lds.debug b/board/siemens/pcu_e/u-boot.lds.debug
deleted file mode 100644
index 828afbbced..0000000000
--- a/board/siemens/pcu_e/u-boot.lds.debug
+++ /dev/null
@@ -1,138 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc8xx/start.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/extable.o (.text)
-
- . = env_offset;
- common/environment.o(.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/sixnet/Makefile b/board/sixnet/Makefile
deleted file mode 100644
index 13ce9fc9d2..0000000000
--- a/board/sixnet/Makefile
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/sixnet/config.mk b/board/sixnet/config.mk
deleted file mode 100644
index 0cd8f44148..0000000000
--- a/board/sixnet/config.mk
+++ /dev/null
@@ -1,28 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# SIXNET boards
-#
-
-TEXT_BASE = 0xF8000000
diff --git a/board/sixnet/flash.c b/board/sixnet/flash.c
deleted file mode 100644
index 61d758085c..0000000000
--- a/board/sixnet/flash.c
+++ /dev/null
@@ -1,790 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-/* environment.h defines the various CFG_ENV_... values in terms
- * of whichever ones are given in the configuration file.
- */
-#include <environment.h>
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/* NOTE - CONFIG_FLASH_16BIT means the CPU interface is 16-bit, it
- * has nothing to do with the flash chip being 8-bit or 16-bit.
- */
-#ifdef CONFIG_FLASH_16BIT
-typedef unsigned short FLASH_PORT_WIDTH;
-typedef volatile unsigned short FLASH_PORT_WIDTHV;
-#define FLASH_ID_MASK 0xFFFF
-#else
-typedef unsigned long FLASH_PORT_WIDTH;
-typedef volatile unsigned long FLASH_PORT_WIDTHV;
-#define FLASH_ID_MASK 0xFFFFFFFF
-#endif
-
-#define FPW FLASH_PORT_WIDTH
-#define FPWV FLASH_PORT_WIDTHV
-
-#define ORMASK(size) ((-size) & OR_AM_MSK)
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size(FPWV *addr, flash_info_t *info);
-static void flash_reset(flash_info_t *info);
-static int write_word_intel(flash_info_t *info, FPWV *dest, FPW data);
-static int write_word_amd(flash_info_t *info, FPWV *dest, FPW data);
-static void flash_get_offsets(ulong base, flash_info_t *info);
-#ifdef CFG_FLASH_PROTECTION
-static void flash_sync_real_protect(flash_info_t *info);
-#endif
-
-/*-----------------------------------------------------------------------
- * flash_init()
- *
- * sets up flash_info and returns size of FLASH (bytes)
- */
-unsigned long flash_init (void)
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- unsigned long size_b;
- int i;
-
- /* Init: no FLASHes known */
- for (i=0; i < CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- size_b = flash_get_size((FPW *)CFG_FLASH_BASE, &flash_info[0]);
-
- flash_info[0].size = size_b;
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx\n",size_b);
- }
-
- /* Remap FLASH according to real size, so only at proper address */
- memctl->memc_or0 = (memctl->memc_or0 & ~OR_AM_MSK) | ORMASK(size_b);
-
- /* Do this again (was done already in flast_get_size), just
- * in case we move it when remap the FLASH.
- */
- flash_get_offsets (CFG_FLASH_BASE, &flash_info[0]);
-
-#ifdef CFG_FLASH_PROTECTION
- /* read the hardware protection status (if any) into the
- * protection array in flash_info.
- */
- flash_sync_real_protect(&flash_info[0]);
-#endif
-
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
- /* monitor protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+monitor_flash_len-1,
- &flash_info[0]);
-#endif
-
-#ifdef CFG_ENV_ADDR
- flash_protect ( FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0]);
-#endif
-
-#ifdef CFG_ENV_ADDR_REDUND
- flash_protect ( FLAG_PROTECT_SET,
- CFG_ENV_ADDR_REDUND,
- CFG_ENV_ADDR_REDUND + CFG_ENV_SIZE_REDUND - 1,
- &flash_info[0]);
-#endif
-
- return (size_b);
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_reset(flash_info_t *info)
-{
- FPWV *base = (FPWV *)(info->start[0]);
-
- /* Put FLASH back in read mode */
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL)
- *base = (FPW)0x00FF00FF; /* Intel Read Mode */
- else if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD)
- *base = (FPW)0x00F000F0; /* AMD Read Mode */
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_get_offsets (ulong base, flash_info_t *info)
-{
- int i;
-
- /* set up sector start address table */
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL
- && (info->flash_id & FLASH_BTYPE)) {
- int bootsect_size; /* number of bytes/boot sector */
- int sect_size; /* number of bytes/regular sector */
-
- bootsect_size = 0x00002000 * (sizeof(FPW)/2);
- sect_size = 0x00010000 * (sizeof(FPW)/2);
-
- /* set sector offsets for bottom boot block type */
- for (i = 0; i < 8; ++i) {
- info->start[i] = base + (i * bootsect_size);
- }
- for (i = 8; i < info->sector_count; i++) {
- info->start[i] = base + ((i - 7) * sect_size);
- }
- }
- else if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD
- && (info->flash_id & FLASH_TYPEMASK) == FLASH_AM640U) {
-
- int sect_size; /* number of bytes/sector */
-
- sect_size = 0x00010000 * (sizeof(FPW)/2);
-
- /* set up sector start address table (uniform sector type) */
- for( i = 0; i < info->sector_count; i++ )
- info->start[i] = base + (i * sect_size);
- }
- else if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD
- && (info->flash_id & FLASH_TYPEMASK) == FLASH_AM800T) {
-
- int sect_size; /* number of bytes/sector */
-
- sect_size = 0x00010000 * (sizeof(FPW)/2);
-
- /* set up sector start address table (top boot sector type) */
- for (i = 0; i < info->sector_count - 3; i++)
- info->start[i] = base + (i * sect_size);
- i = info->sector_count - 1;
- info->start[i--] = base + (info->size - 0x00004000) * (sizeof(FPW)/2);
- info->start[i--] = base + (info->size - 0x00006000) * (sizeof(FPW)/2);
- info->start[i--] = base + (info->size - 0x00008000) * (sizeof(FPW)/2);
- }
-}
-
-/*-----------------------------------------------------------------------
- */
-
-void flash_print_info (flash_info_t *info)
-{
- int i;
- uchar *boottype;
- uchar *bootletter;
- char *fmt;
- uchar botbootletter[] = "B";
- uchar topbootletter[] = "T";
- uchar botboottype[] = "bottom boot sector";
- uchar topboottype[] = "top boot sector";
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD: printf ("AMD "); break;
- case FLASH_MAN_BM: printf ("BRIGHT MICRO "); break;
- case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
- case FLASH_MAN_SST: printf ("SST "); break;
- case FLASH_MAN_STM: printf ("STM "); break;
- case FLASH_MAN_INTEL: printf ("INTEL "); break;
- default: printf ("Unknown Vendor "); break;
- }
-
- /* check for top or bottom boot, if it applies */
- if (info->flash_id & FLASH_BTYPE) {
- boottype = botboottype;
- bootletter = botbootletter;
- }
- else {
- boottype = topboottype;
- bootletter = topbootletter;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM800T:
- fmt = "29LV800B%s (8 Mbit, %s)\n";
- break;
- case FLASH_AM640U:
- fmt = "29LV641D (64 Mbit, uniform sectors)\n";
- break;
- case FLASH_28F800C3B:
- case FLASH_28F800C3T:
- fmt = "28F800C3%s (8 Mbit, %s)\n";
- break;
- case FLASH_INTEL800B:
- case FLASH_INTEL800T:
- fmt = "28F800B3%s (8 Mbit, %s)\n";
- break;
- case FLASH_28F160C3B:
- case FLASH_28F160C3T:
- fmt = "28F160C3%s (16 Mbit, %s)\n";
- break;
- case FLASH_INTEL160B:
- case FLASH_INTEL160T:
- fmt = "28F160B3%s (16 Mbit, %s)\n";
- break;
- case FLASH_28F320C3B:
- case FLASH_28F320C3T:
- fmt = "28F320C3%s (32 Mbit, %s)\n";
- break;
- case FLASH_INTEL320B:
- case FLASH_INTEL320T:
- fmt = "28F320B3%s (32 Mbit, %s)\n";
- break;
- case FLASH_28F640C3B:
- case FLASH_28F640C3T:
- fmt = "28F640C3%s (64 Mbit, %s)\n";
- break;
- case FLASH_INTEL640B:
- case FLASH_INTEL640T:
- fmt = "28F640B3%s (64 Mbit, %s)\n";
- break;
- default:
- fmt = "Unknown Chip Type\n";
- break;
- }
-
- printf (fmt, bootletter, boottype);
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20,
- info->sector_count);
-
- printf (" Sector Start Addresses:");
-
- for (i=0; i<info->sector_count; ++i) {
- if ((i % 5) == 0) {
- printf ("\n ");
- }
-
- printf (" %08lX%s", info->start[i],
- info->protect[i] ? " (RO)" : " ");
- }
-
- printf ("\n");
-}
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-
-ulong flash_get_size (FPWV *addr, flash_info_t *info)
-{
- /* Write auto select command: read Manufacturer ID */
-
- /* Write auto select command sequence and test FLASH answer */
- addr[0x0555] = (FPW)0x00AA00AA; /* for AMD, Intel ignores this */
- addr[0x02AA] = (FPW)0x00550055; /* for AMD, Intel ignores this */
- addr[0x0555] = (FPW)0x00900090; /* selects Intel or AMD */
-
- /* The manufacturer codes are only 1 byte, so just use 1 byte.
- * This works for any bus width and any FLASH device width.
- */
- switch (addr[0] & 0xff) {
-
- case (uchar)AMD_MANUFACT:
- info->flash_id = FLASH_MAN_AMD;
- break;
-
- case (uchar)INTEL_MANUFACT:
- info->flash_id = FLASH_MAN_INTEL;
- break;
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- break;
- }
-
- /* Check 16 bits or 32 bits of ID so work on 32 or 16 bit bus. */
- if (info->flash_id != FLASH_UNKNOWN) switch (addr[1]) {
-
- case (FPW)AMD_ID_LV800T:
- info->flash_id += FLASH_AM800T;
- info->sector_count = 19;
- info->size = 0x00100000 * (sizeof(FPW)/2);
- break; /* => 1 or 2 MiB */
-
- case (FPW)AMD_ID_LV640U: /* 29LV640 and 29LV641 have same ID */
- info->flash_id += FLASH_AM640U;
- info->sector_count = 128;
- info->size = 0x00800000 * (sizeof(FPW)/2);
- break; /* => 8 or 16 MB */
-
- case (FPW)INTEL_ID_28F800C3B:
- info->flash_id += FLASH_28F800C3B;
- info->sector_count = 23;
- info->size = 0x00100000 * (sizeof(FPW)/2);
- break; /* => 1 or 2 MB */
-
- case (FPW)INTEL_ID_28F800B3B:
- info->flash_id += FLASH_INTEL800B;
- info->sector_count = 23;
- info->size = 0x00100000 * (sizeof(FPW)/2);
- break; /* => 1 or 2 MB */
-
- case (FPW)INTEL_ID_28F160C3B:
- info->flash_id += FLASH_28F160C3B;
- info->sector_count = 39;
- info->size = 0x00200000 * (sizeof(FPW)/2);
- break; /* => 2 or 4 MB */
-
- case (FPW)INTEL_ID_28F160B3B:
- info->flash_id += FLASH_INTEL160B;
- info->sector_count = 39;
- info->size = 0x00200000 * (sizeof(FPW)/2);
- break; /* => 2 or 4 MB */
-
- case (FPW)INTEL_ID_28F320C3B:
- info->flash_id += FLASH_28F320C3B;
- info->sector_count = 71;
- info->size = 0x00400000 * (sizeof(FPW)/2);
- break; /* => 4 or 8 MB */
-
- case (FPW)INTEL_ID_28F320B3B:
- info->flash_id += FLASH_INTEL320B;
- info->sector_count = 71;
- info->size = 0x00400000 * (sizeof(FPW)/2);
- break; /* => 4 or 8 MB */
-
- case (FPW)INTEL_ID_28F640C3B:
- info->flash_id += FLASH_28F640C3B;
- info->sector_count = 135;
- info->size = 0x00800000 * (sizeof(FPW)/2);
- break; /* => 8 or 16 MB */
-
- case (FPW)INTEL_ID_28F640B3B:
- info->flash_id += FLASH_INTEL640B;
- info->sector_count = 135;
- info->size = 0x00800000 * (sizeof(FPW)/2);
- break; /* => 8 or 16 MB */
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- return (0); /* => no or unknown flash */
- }
-
- flash_get_offsets((ulong)addr, info);
-
- /* Put FLASH back in read mode */
- flash_reset(info);
-
- return (info->size);
-}
-
-#ifdef CFG_FLASH_PROTECTION
-/*-----------------------------------------------------------------------
- */
-
-static void flash_sync_real_protect(flash_info_t *info)
-{
- FPWV *addr = (FPWV *)(info->start[0]);
- FPWV *sect;
- int i;
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_28F800C3B:
- case FLASH_28F800C3T:
- case FLASH_28F160C3B:
- case FLASH_28F160C3T:
- case FLASH_28F320C3B:
- case FLASH_28F320C3T:
- case FLASH_28F640C3B:
- case FLASH_28F640C3T:
- /* check for protected sectors */
- *addr = (FPW)0x00900090;
- for (i = 0; i < info->sector_count; i++) {
- /* read sector protection at sector address, (A7 .. A0) = 0x02.
- * D0 = 1 for each device if protected.
- * If at least one device is protected the sector is marked
- * protected, but mixed protected and unprotected devices
- * within a sector should never happen.
- */
- sect = (FPWV *)(info->start[i]);
- info->protect[i] = (sect[2] & (FPW)(0x00010001)) ? 1 : 0;
- }
-
- /* Put FLASH back in read mode */
- flash_reset(info);
- break;
-
- case FLASH_AM640U:
- case FLASH_AM800T:
- default:
- /* no hardware protect that we support */
- break;
- }
-}
-#endif
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- FPWV *addr;
- int flag, prot, sect;
- int intel = (info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL;
- ulong start, now, last;
- int rcode = 0;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_INTEL800B:
- case FLASH_INTEL160B:
- case FLASH_INTEL320B:
- case FLASH_INTEL640B:
- case FLASH_28F800C3B:
- case FLASH_28F160C3B:
- case FLASH_28F320C3B:
- case FLASH_28F640C3B:
- case FLASH_AM640U:
- case FLASH_AM800T:
- break;
- case FLASH_UNKNOWN:
- default:
- printf ("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- start = get_timer(0);
- last = start;
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last && rcode == 0; sect++) {
-
- if (info->protect[sect] != 0) /* protected, skip it */
- continue;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr = (FPWV *)(info->start[sect]);
- if (intel) {
- *addr = (FPW)0x00500050; /* clear status register */
- *addr = (FPW)0x00200020; /* erase setup */
- *addr = (FPW)0x00D000D0; /* erase confirm */
- }
- else {
- /* must be AMD style if not Intel */
- FPWV *base; /* first address in bank */
-
- base = (FPWV *)(info->start[0]);
- base[0x0555] = (FPW)0x00AA00AA; /* unlock */
- base[0x02AA] = (FPW)0x00550055; /* unlock */
- base[0x0555] = (FPW)0x00800080; /* erase mode */
- base[0x0555] = (FPW)0x00AA00AA; /* unlock */
- base[0x02AA] = (FPW)0x00550055; /* unlock */
- *addr = (FPW)0x00300030; /* erase sector */
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 50us for AMD, 80us for Intel.
- * Let's wait 1 ms.
- */
- udelay (1000);
-
- while ((*addr & (FPW)0x00800080) != (FPW)0x00800080) {
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
-
- if (intel) {
- /* suspend erase */
- *addr = (FPW)0x00B000B0;
- }
-
- flash_reset(info); /* reset to read mode */
- rcode = 1; /* failed */
- break;
- }
-
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- }
-
- flash_reset(info); /* reset to read mode */
- }
-
- printf (" done\n");
- return rcode;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- FPW data = 0; /* 16 or 32 bit word, matches flash bus width on MPC8XX */
- int bytes; /* number of bytes to program in current word */
- int left; /* number of bytes left to program */
- int i, res;
-
- for (left = cnt, res = 0;
- left > 0 && res == 0;
- addr += sizeof(data), left -= sizeof(data) - bytes) {
-
- bytes = addr & (sizeof(data) - 1);
- addr &= ~(sizeof(data) - 1);
-
- /* combine source and destination data so can program
- * an entire word of 16 or 32 bits
- */
- for (i = 0; i < sizeof(data); i++) {
- data <<= 8;
- if (i < bytes || i - bytes >= left )
- data += *((uchar *)addr + i);
- else
- data += *src++;
- }
-
- /* write one word to the flash */
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD:
- res = write_word_amd(info, (FPWV *)addr, data);
- break;
- case FLASH_MAN_INTEL:
- res = write_word_intel(info, (FPWV *)addr, data);
- break;
- default:
- /* unknown flash type, error! */
- printf ("missing or unknown FLASH type\n");
- res = 1; /* not really a timeout, but gives error */
- break;
- }
- }
-
- return (res);
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash for AMD FLASH
- * A word is 16 or 32 bits, whichever the bus width of the flash bank
- * (not an individual chip) is.
- *
- * returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word_amd (flash_info_t *info, FPWV *dest, FPW data)
-{
- ulong start;
- int flag;
- int res = 0; /* result, assume success */
- FPWV *base; /* first address in flash bank */
-
- /* Check if Flash is (sufficiently) erased */
- if ((*dest & data) != data) {
- return (2);
- }
-
-
- base = (FPWV *)(info->start[0]);
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- base[0x0555] = (FPW)0x00AA00AA; /* unlock */
- base[0x02AA] = (FPW)0x00550055; /* unlock */
- base[0x0555] = (FPW)0x00A000A0; /* selects program mode */
-
- *dest = data; /* start programming the data */
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- start = get_timer (0);
-
- /* data polling for D7 */
- while (res == 0 && (*dest & (FPW)0x00800080) != (data & (FPW)0x00800080)) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- *dest = (FPW)0x00F000F0; /* reset bank */
- res = 1;
- }
- }
-
- return (res);
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash for Intel FLASH
- * A word is 16 or 32 bits, whichever the bus width of the flash bank
- * (not an individual chip) is.
- *
- * returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word_intel (flash_info_t *info, FPWV *dest, FPW data)
-{
- ulong start;
- int flag;
- int res = 0; /* result, assume success */
-
- /* Check if Flash is (sufficiently) erased */
- if ((*dest & data) != data) {
- return (2);
- }
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- *dest = (FPW)0x00500050; /* clear status register */
- *dest = (FPW)0x00FF00FF; /* make sure in read mode */
- *dest = (FPW)0x00400040; /* program setup */
-
- *dest = data; /* start programming the data */
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- start = get_timer (0);
-
- while (res == 0 && (*dest & (FPW)0x00800080) != (FPW)0x00800080) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- *dest = (FPW)0x00B000B0; /* Suspend program */
- res = 1;
- }
- }
-
- if (res == 0 && (*dest & (FPW)0x00100010))
- res = 1; /* write failed, time out error is close enough */
-
- *dest = (FPW)0x00500050; /* clear status register */
- *dest = (FPW)0x00FF00FF; /* make sure in read mode */
-
- return (res);
-}
-
-#ifdef CFG_FLASH_PROTECTION
-/*-----------------------------------------------------------------------
- */
-int flash_real_protect (flash_info_t * info, long sector, int prot)
-{
- int rcode = 0; /* assume success */
- FPWV *addr; /* address of sector */
- FPW value;
-
- addr = (FPWV *) (info->start[sector]);
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_28F800C3B:
- case FLASH_28F800C3T:
- case FLASH_28F160C3B:
- case FLASH_28F160C3T:
- case FLASH_28F320C3B:
- case FLASH_28F320C3T:
- case FLASH_28F640C3B:
- case FLASH_28F640C3T:
- flash_reset (info); /* make sure in read mode */
- *addr = (FPW) 0x00600060L; /* lock command setup */
- if (prot)
- *addr = (FPW) 0x00010001L; /* lock sector */
- else
- *addr = (FPW) 0x00D000D0L; /* unlock sector */
- flash_reset (info); /* reset to read mode */
-
- /* now see if it really is locked/unlocked as requested */
- *addr = (FPW) 0x00900090;
- /* read sector protection at sector address, (A7 .. A0) = 0x02.
- * D0 = 1 for each device if protected.
- * If at least one device is protected the sector is marked
- * protected, but return failure. Mixed protected and
- * unprotected devices within a sector should never happen.
- */
- value = addr[2] & (FPW) 0x00010001;
- if (value == 0)
- info->protect[sector] = 0;
- else if (value == (FPW) 0x00010001)
- info->protect[sector] = 1;
- else {
- /* error, mixed protected and unprotected */
- rcode = 1;
- info->protect[sector] = 1;
- }
- if (info->protect[sector] != prot)
- rcode = 1; /* failed to protect/unprotect as requested */
-
- /* reload all protection bits from hardware for now */
- flash_sync_real_protect (info);
- break;
-
- case FLASH_AM640U:
- case FLASH_AM800T:
- default:
- /* no hardware protect that we support */
- info->protect[sector] = prot;
- break;
- }
-
- return rcode;
-}
-#endif
diff --git a/board/sixnet/fpgadata.c b/board/sixnet/fpgadata.c
deleted file mode 100644
index 2d3a7b3358..0000000000
--- a/board/sixnet/fpgadata.c
+++ /dev/null
@@ -1,1719 +0,0 @@
- 0xff, 0x87, 0xff, 0x88, 0x7f, 0xff, 0xf9, 0xff,
- 0xff, 0xf5, 0xff, 0x8f, 0xff, 0xf0, 0x8f, 0xf9,
- 0xff, 0xef, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0x8f, 0xff, 0xf0, 0xff, 0xff, 0xf0,
- 0xff, 0xff, 0xff, 0xff, 0x8f, 0x7f, 0xf1, 0xcf,
- 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xef,
- 0x7f, 0x7b, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0x77, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0x86, 0xf6, 0xf0, 0xff,
- 0xf0, 0xff, 0xff, 0xff, 0xff, 0x7f, 0x0f, 0x7f,
- 0xc1, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xf8, 0xff, 0xff, 0xf6, 0xf0, 0xff, 0xff,
- 0x7f, 0x8f, 0x7f, 0xf0, 0xff, 0x0f, 0x7f, 0xff,
- 0xff, 0xff, 0xff, 0x8f, 0x7f,
- 0xff, 0xf8, 0xf7, 0x8f, 0xcf, 0xf0, 0xf6, 0xff,
- 0xff, 0xef, 0xff, 0xfb, 0x7f, 0x2f, 0x1f, 0x71,
- 0xf5, 0xff, 0xff, 0xef, 0x7f,
- 0xff, 0x7f, 0xff, 0xf7, 0xf6, 0xfe, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0x7f, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xf7, 0x7f, 0x77, 0xf7, 0xff, 0xfb,
- 0x0f, 0xff, 0xf0, 0xff, 0xff, 0x7f, 0xff, 0xff,
- 0xfe, 0xff, 0x8f, 0x7f, 0xf1,
- 0xff, 0xff, 0xfa, 0xce, 0xff, 0xfd, 0xff, 0xff,
- 0x9f, 0xff, 0x8e, 0xff, 0xf0, 0xbf, 0x7f, 0xf5,
- 0xff, 0xef, 0x9f, 0xfd, 0x81,
- 0xff, 0xf9, 0xff, 0xff, 0xff, 0xfe, 0xff, 0xff,
- 0xff, 0xef, 0x9f, 0xfb, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0x7f,
- 0xff, 0x77, 0xfa, 0xb6, 0xff, 0x78, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xbf, 0xfd, 0x0f, 0x7f, 0xf1,
- 0xff, 0xff, 0xff, 0xff, 0x8f,
- 0xff, 0xf6, 0xf7, 0xf6, 0x7f, 0xbf, 0xff, 0xff,
- 0xff, 0xff, 0xef, 0xbf, 0xf2, 0x7f, 0xef, 0xff,
- 0xfe, 0xfb, 0xff, 0xef, 0xff,
- 0xff, 0xf7, 0xfe, 0xff, 0xff, 0xff, 0xff, 0xbf,
- 0xff, 0xfe, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0x7f, 0xff, 0xff,
- 0xff, 0xf7, 0xff, 0xf7, 0xcf, 0x8f, 0xff, 0xf0,
- 0xef, 0xf9, 0xfb, 0xff, 0xff, 0xff, 0x9f, 0x0f,
- 0x65, 0xe1, 0xfb, 0x7b, 0xf3,
- 0xff, 0xf7, 0xf6, 0xfe, 0xff, 0x8f, 0xf6, 0xe8,
- 0xf6, 0xf1, 0xff, 0xff, 0xff, 0xf9, 0xff, 0xff,
- 0x6f, 0x61, 0xf1, 0xfb, 0xff,
- 0xff, 0xde, 0x8f, 0x8f, 0xf0, 0xf0, 0xff, 0xff,
- 0xf7, 0xbf, 0xff, 0xd4, 0x8f, 0x0f, 0x71, 0xc1,
- 0x6f, 0xd1, 0xeb, 0x5f, 0xfd,
- 0xff, 0x9f, 0xff, 0xfb, 0xff, 0x8f, 0x9f, 0xf7,
- 0x9f, 0xff, 0xf4, 0xb7, 0xfd, 0xff, 0xfe, 0x8f,
- 0xbf, 0x71, 0x1f, 0xff, 0x7f,
- 0xff, 0xfd, 0x87, 0x87, 0xf0, 0x70, 0x1f, 0xf7,
- 0xbf, 0xff, 0xff, 0xff, 0x8f, 0x0f, 0x71, 0x81,
- 0xbf, 0x3e, 0x7f, 0x7f, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0x8f, 0xff, 0x7f, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xf1, 0xff, 0xff, 0xff, 0xff,
- 0xbf, 0xff, 0x07, 0xff, 0xf0, 0xff, 0xff, 0xff,
- 0xfe, 0xff, 0xff, 0xf7, 0x8d, 0x7f, 0xf1, 0xff,
- 0xff, 0x9f, 0x6f, 0xf1, 0xff,
- 0xbf, 0x71, 0x87, 0xfe, 0xf0, 0x8f, 0x8f, 0xf0,
- 0xfb, 0xcb, 0xff, 0xf0, 0x8f, 0x7f, 0xf1, 0x8f,
- 0x1e, 0xe1, 0x7e, 0x91, 0x7f,
- 0xbf, 0x1a, 0xff, 0x71, 0xff, 0x9f, 0x8f, 0xf6,
- 0xf8, 0xdf, 0xf7, 0xf4, 0xff, 0xff, 0xff, 0x8f,
- 0x1f, 0xf0, 0x7f, 0x97, 0xff,
- 0xbf, 0x97, 0xff, 0xfb, 0xbf, 0xdf, 0xff, 0xf7,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xaf, 0xdf,
- 0xf9, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0x7f, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xf7, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xdf, 0xff, 0xf1, 0xff,
- 0xff, 0x9f, 0xfc, 0xfb, 0xff, 0xf0, 0xfe, 0xff,
- 0xff, 0xff, 0x9d, 0xff, 0xf4, 0xcf, 0xff, 0x7f,
- 0xf7, 0xff, 0xff, 0xff, 0xcf,
- 0xff, 0x97, 0xff, 0xfa, 0xff, 0x8f, 0xf8, 0xf0,
- 0xff, 0xff, 0xff, 0xdf, 0xff, 0xfd, 0xff, 0x0f,
- 0x7f, 0xe1, 0xff, 0xf1, 0xff,
- 0xff, 0x83, 0x7f, 0xf8, 0xff, 0xff, 0xff, 0xff,
- 0x7f, 0x6f, 0x7f, 0x77, 0x7d, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0x8f, 0x6f, 0xf1,
- 0xff, 0xd7, 0xff, 0xfe, 0xff, 0xff, 0x9f, 0xfd,
- 0x78, 0xef, 0xff, 0xbf, 0xff, 0xf5, 0xff, 0xff,
- 0xbf, 0x0f, 0x79, 0xd1, 0xff,
- 0xff, 0xd2, 0xff, 0x72, 0xff, 0xff, 0xff, 0xff,
- 0x8f, 0xfe, 0x70, 0x9d, 0xff, 0xf4, 0xff, 0xfe,
- 0xff, 0xff, 0xff, 0xbf, 0x7f,
- 0xff, 0x07, 0xff, 0x78, 0xff, 0x9f, 0xff, 0xfe,
- 0xff, 0x77, 0x7f, 0x8f, 0x7f, 0xf0, 0xff, 0x8f,
- 0x7f, 0xe1, 0x0f, 0x71, 0xf1,
- 0xff, 0xfe, 0xff, 0xfd, 0xff, 0xff, 0xff, 0xff,
- 0x7f, 0xfd, 0xff, 0xba, 0x7f, 0xff, 0xff, 0xff,
- 0xff, 0xef, 0x7f, 0xa1, 0x7f,
- 0xff, 0xbd, 0x7f, 0xf7, 0xf9, 0xfd, 0xfb, 0xff,
- 0xff, 0x8f, 0xbf, 0xb7, 0x8f, 0xaf, 0xdf, 0xff,
- 0xff, 0xff, 0xff, 0x5f, 0xeb,
- 0xbf, 0xfd, 0xf8, 0xff, 0xff, 0xfb, 0xff, 0xfb,
- 0xff, 0xf7, 0xcf, 0xfb, 0xf0, 0xff, 0xff, 0xdf,
- 0xff, 0xff, 0xef, 0x7f, 0xab,
- 0xff, 0xfd, 0xfa, 0xbf, 0x8f, 0xbf, 0xca, 0xfe,
- 0xff, 0xff, 0xdf, 0x6f, 0xd4, 0xf6, 0x0f, 0x3f,
- 0x11, 0xf9, 0xff, 0x7f, 0x8b,
- 0xbf, 0xff, 0x8f, 0xff, 0xc0, 0xfb, 0xf5, 0xef,
- 0xf7, 0x7f, 0xff, 0xff, 0xfb, 0x7f, 0xff, 0x7f,
- 0xff, 0x6f, 0xff, 0xff, 0xff,
- 0xbf, 0x87, 0xbb, 0xf8, 0xfb, 0xcf, 0xfe, 0xfe,
- 0xff, 0xef, 0xff, 0xfb, 0x7f, 0xff, 0xff, 0x8f,
- 0xff, 0xe1, 0x7f, 0x7b, 0xff,
- 0xbf, 0x80, 0x89, 0x88, 0xb0, 0xf5, 0xf0, 0xff,
- 0xf7, 0xdf, 0xfe, 0x7c, 0x8f, 0x0f, 0x71, 0xe1,
- 0xff, 0xf1, 0xe5, 0x0e, 0x2b,
- 0xff, 0xff, 0xff, 0xbf, 0xff, 0xcf, 0xf5, 0x9f,
- 0xff, 0xff, 0xfe, 0xff, 0x8f, 0x7f, 0x71, 0x8f,
- 0xff, 0x91, 0x7f, 0xfb, 0xff,
- 0xff, 0x7f, 0x7f, 0xcf, 0x8a, 0xff, 0xf0, 0xff,
- 0x57, 0xfe, 0xfb, 0x8f, 0xff, 0xf0, 0xff, 0x7e,
- 0xff, 0xff, 0x9a, 0xff, 0xf1,
- 0xff, 0xff, 0xcf, 0xb7, 0xce, 0xff, 0xf4, 0xff,
- 0xff, 0x7f, 0xf7, 0xfb, 0xff, 0xfe, 0xff, 0x7f,
- 0xff, 0xfd, 0xfe, 0x75, 0xfd,
- 0xff, 0xef, 0xcf, 0xff, 0xf5, 0xff, 0xf5, 0xff,
- 0xf7, 0xff, 0xff, 0xff, 0xff, 0x7f, 0x7f, 0xff,
- 0xcf, 0x7f, 0x31, 0x7f, 0xff,
- 0x3f, 0x78, 0xf8, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0x0f, 0x0f, 0xf1, 0xf1, 0xdf, 0xff, 0xff,
- 0xff, 0x9f, 0xff, 0x84, 0x0e,
- 0xff, 0xf8, 0x7f, 0xf7, 0x7f, 0xff, 0xff, 0x8f,
- 0x8f, 0x80, 0xf1, 0xf1, 0xff, 0xff, 0xff, 0xff,
- 0xfe, 0x9f, 0x8e, 0x05, 0x71,
- 0xbf, 0xf8, 0xf8, 0xff, 0x7f, 0xff, 0xff, 0xff,
- 0xff, 0x8f, 0x8f, 0xf1, 0xf1, 0xff, 0xff, 0xff,
- 0xfe, 0xff, 0xff, 0x8f, 0x0f,
- 0xff, 0xf8, 0x7f, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0x8f, 0x8f, 0xf1, 0xf1, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0x8e, 0x0f, 0x71,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0x7f, 0xf7, 0xff, 0xff, 0x8f, 0xff,
- 0xf0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0x8f, 0x7f, 0xf0, 0xff, 0xff,
- 0x7f, 0xf8, 0xff, 0xf7, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0x8f, 0xff, 0xf0, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0x9f, 0xff, 0x8f, 0x7e,
- 0xbf, 0xff, 0x78, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0x8f, 0xff, 0xf0, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xfe, 0xff, 0x8f,
- 0xff, 0x87, 0x7f, 0xf8, 0xff, 0xff, 0xff, 0xff,
- 0x8f, 0xff, 0xf0, 0x8f, 0xff, 0xf0, 0xff, 0xff,
- 0xff, 0xff, 0x8e, 0x7f, 0xf1,
- 0xff, 0xf8, 0x7f, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0x8f, 0xff, 0xf0, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0x8f, 0x7f,
- 0x3f, 0xff, 0xf8, 0xff, 0x8f, 0x7f, 0xf0, 0x8f,
- 0xff, 0xf0, 0x0f, 0xff, 0x70, 0xff, 0x8f, 0x7e,
- 0xf1, 0xdf, 0xff, 0xfb, 0x8e,
- 0xff, 0x80, 0x7f, 0xf0, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xaf, 0x7f, 0x84, 0xff, 0xf1, 0xff, 0xfe,
- 0xff, 0xff, 0xfe, 0x8f, 0x7f,
- 0xff, 0x80, 0xff, 0xf8, 0xff, 0x7f, 0xff, 0xff,
- 0x7f, 0x8f, 0xff, 0x81, 0x7f, 0xf0, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0x8f, 0x7f,
- 0xff, 0x7f, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0x8f, 0x7f, 0xf0, 0xdf, 0xdf, 0xff, 0xdf, 0xff,
- 0xff, 0xff, 0x8f, 0x7f, 0xf1,
- 0xff, 0xfd, 0xff, 0xff, 0xff, 0x0f, 0xff, 0x80,
- 0xff, 0xf0, 0xff, 0xff, 0xdf, 0xff, 0xdf, 0x8e,
- 0x0f, 0x01, 0x71, 0xf1, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0x7f, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xdf, 0xff, 0xdf, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xfe,
- 0xbf, 0x87, 0xf8, 0xf8, 0xff, 0xff, 0xff, 0xff,
- 0x7f, 0xff, 0x8f, 0x8f, 0xd0, 0xf0, 0xdf, 0xfe,
- 0xff, 0xff, 0xff, 0xff, 0x8f,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfd,
- 0xff, 0x7f, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0x7f, 0xff, 0xff,
- 0xff, 0x7f, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfe,
- 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfd,
- 0xff, 0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xfe,
- 0xff, 0xdf, 0xff, 0xfb, 0xff,
- 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff, 0xff, 0xfd,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xaf, 0xfe, 0xf5, 0xff, 0xff,
- 0xff, 0xff, 0x0f, 0x8f, 0xf0, 0x80, 0xff, 0xf0,
- 0xff, 0xff, 0xff, 0xff, 0x1f, 0xaf, 0x71, 0xa7,
- 0x6f, 0xf5, 0xfe, 0xff, 0xff,
- 0xff, 0x77, 0x79, 0x8f, 0xff, 0xf0, 0x8f, 0xff,
- 0x00, 0xff, 0xd0, 0x4f, 0x3d, 0xf0, 0xf7, 0xfd,
- 0x8f, 0x7f, 0x81, 0x7f, 0xd1,
- 0xff, 0xcd, 0xff, 0xff, 0x8f, 0x0f, 0x70, 0xf0,
- 0xff, 0x7f, 0x7f, 0xff, 0xff, 0xdb, 0x8d, 0x4b,
- 0x73, 0xf9, 0xff, 0xdf, 0xff,
- 0x3f, 0xfc, 0xff, 0x8f, 0xff, 0xf2, 0x8f, 0x8f,
- 0x70, 0x7a, 0x3f, 0xbc, 0xf7, 0xdb, 0xff, 0xf9,
- 0xff, 0xff, 0xff, 0xff, 0xee,
- 0xff, 0xe8, 0xf7, 0x8f, 0xfd, 0x80, 0xff, 0xf0,
- 0x9f, 0xa5, 0x7a, 0xf4, 0x6f, 0x3f, 0xcf, 0x07,
- 0x6a, 0xe1, 0xff, 0x8f, 0x7f,
- 0xff, 0xff, 0x77, 0xf1, 0x8f, 0x8f, 0xf0, 0xf0,
- 0xbf, 0xff, 0xe7, 0x7f, 0x8f, 0x24, 0x03, 0x77,
- 0xf3, 0xff, 0xfe, 0xff, 0xff,
- 0xbf, 0x9f, 0x77, 0x8b, 0xff, 0xf0, 0xff, 0xef,
- 0x7d, 0x7f, 0xff, 0x9f, 0xeb, 0x3d, 0xff, 0xf7,
- 0xff, 0xfb, 0xfe, 0xff, 0xdf,
- 0xff, 0xff, 0x77, 0xff, 0x8f, 0x8f, 0xf0, 0xf0,
- 0x7f, 0xff, 0xff, 0xff, 0xff, 0xff, 0xbb, 0x5d,
- 0xf5, 0xbb, 0xef, 0xff, 0xff,
- 0xff, 0x7f, 0x8f, 0x8f, 0xf0, 0xf8, 0xff, 0xff,
- 0xf7, 0x7f, 0xff, 0xff, 0xaf, 0xbf, 0x75, 0xb7,
- 0xff, 0xf7, 0xff, 0xff, 0xff,
- 0xff, 0x7f, 0x87, 0x7f, 0xf8, 0xff, 0xf7, 0xf7,
- 0x8f, 0xff, 0xf0, 0x7f, 0xf7, 0xff, 0xad, 0xff,
- 0xf7, 0xee, 0x9f, 0xff, 0xf5,
- 0xff, 0xf8, 0x07, 0xff, 0x80, 0x8f, 0x80, 0x80,
- 0xf0, 0x8f, 0x7f, 0x70, 0x4f, 0x0f, 0x79, 0xf1,
- 0xfd, 0xff, 0xef, 0x8f, 0x7f,
- 0xbf, 0x7f, 0xf8, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0x8f, 0xff, 0xd0, 0xbf, 0xdb, 0xe5,
- 0x3b, 0xfe, 0xf7, 0xff, 0x8f,
- 0xff, 0xff, 0x8f, 0x77, 0x80, 0xff, 0xf0, 0xff,
- 0xff, 0x7f, 0xff, 0xff, 0xbd, 0xef, 0x07, 0x7f,
- 0xf1, 0xfe, 0xff, 0xfe, 0xff,
- 0x7f, 0x7f, 0xff, 0xf7, 0xf7, 0xff, 0xf7, 0x8f,
- 0xbf, 0x70, 0xf5, 0x7f, 0xff, 0xef, 0x3f, 0x7d,
- 0xf7, 0xff, 0xff, 0xfe, 0xfe,
- 0xff, 0x97, 0xff, 0x7f, 0xff, 0xff, 0xff, 0xff,
- 0x7e, 0xff, 0xff, 0x9f, 0xdf, 0xf7, 0x3b, 0xff,
- 0xf7, 0xff, 0x7f, 0xfe, 0xff,
- 0x3f, 0x78, 0xf8, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0x1f, 0x1f, 0xf1, 0xf1, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0x80, 0x0e,
- 0xff, 0xf8, 0x7f, 0xff, 0x7f, 0xff, 0xff, 0x8f,
- 0x9f, 0x80, 0xe1, 0xf1, 0xff, 0xff, 0xef, 0xff,
- 0xfe, 0x9f, 0x0e, 0x01, 0x71,
- 0xbf, 0xf8, 0xf8, 0xff, 0x7f, 0xff, 0xff, 0xff,
- 0xff, 0x8f, 0x8f, 0xf1, 0xf1, 0xff, 0xff, 0xef,
- 0xfe, 0xef, 0xff, 0x8f, 0x0f,
- 0xff, 0xf8, 0x7f, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0x9f, 0x8f, 0xf1, 0xf1, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0x8e, 0x0f, 0x71,
- 0xff, 0xf7, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xef, 0xff, 0xff, 0xef, 0xfe, 0xef,
- 0xef, 0xff, 0xff, 0xef, 0xff,
- 0xff, 0xf7, 0x7f, 0xff, 0xff, 0xff, 0x8f, 0xff,
- 0xf0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0x8f, 0x7f, 0xe0, 0xff, 0xff,
- 0x7f, 0xf0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0x8f, 0xff, 0xf0, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0x8f, 0x7e,
- 0xbf, 0xff, 0x78, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0x8f, 0xff, 0xf0, 0xef, 0xff, 0xff,
- 0xff, 0xff, 0xee, 0xef, 0x9f,
- 0xff, 0x07, 0xff, 0xf8, 0xff, 0xff, 0xff, 0xff,
- 0x8f, 0xff, 0xf0, 0x8f, 0xff, 0xe0, 0xff, 0xff,
- 0xff, 0xef, 0x8e, 0x7f, 0xf1,
- 0xff, 0xf8, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0x8f, 0xff, 0xf0, 0xff, 0xff, 0xff, 0xff,
- 0xef, 0xff, 0xfe, 0x8f, 0x7f,
- 0x3f, 0xff, 0xf8, 0xff, 0x8f, 0x7f, 0xf0, 0xdf,
- 0xff, 0xf0, 0x0f, 0xff, 0x70, 0xff, 0x8f, 0x7e,
- 0xe1, 0xdf, 0xff, 0xf7, 0x8e,
- 0xff, 0x80, 0x7f, 0xf8, 0xff, 0x7f, 0xff, 0xff,
- 0xff, 0x8f, 0x7f, 0x80, 0xff, 0xf1, 0xff, 0xff,
- 0xff, 0xef, 0xfe, 0x8f, 0x7f,
- 0xff, 0x80, 0xff, 0xf8, 0xff, 0xff, 0xff, 0xff,
- 0x7f, 0x8f, 0xff, 0x81, 0x7f, 0xf0, 0xff, 0xfe,
- 0xff, 0xff, 0xff, 0x8f, 0x7f,
- 0xff, 0x7f, 0xff, 0xf7, 0xff, 0xff, 0xff, 0xff,
- 0x1f, 0x7f, 0xf0, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0x8f, 0x7e, 0xf1,
- 0xff, 0xff, 0xff, 0xf7, 0xff, 0x0f, 0x8f, 0x80,
- 0xf7, 0xe0, 0xff, 0xff, 0xff, 0xff, 0xff, 0x9e,
- 0x6f, 0x91, 0x71, 0xf1, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xef, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfe,
- 0xff, 0xff, 0xef, 0xff, 0xff,
- 0xbf, 0x87, 0xf8, 0xf8, 0xff, 0x7f, 0xff, 0xff,
- 0xff, 0xff, 0x8f, 0x8f, 0xf0, 0xf0, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xdf, 0x8f,
- 0xff, 0xef, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0x7f, 0xff, 0xff, 0xff, 0xff, 0xff, 0xef, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xef, 0xfe,
- 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xef, 0xfe,
- 0xff, 0xef, 0xff, 0xd7, 0xff,
- 0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0x8f, 0xff,
- 0xf7, 0xff, 0xff, 0xff, 0xff, 0xff, 0xef, 0xff,
- 0xff, 0xfe, 0xf9, 0xdf, 0xff,
- 0xff, 0xff, 0x8f, 0xbf, 0xf7, 0x9f, 0xf8, 0xf0,
- 0xff, 0xff, 0x77, 0xff, 0x0e, 0x1f, 0x61, 0x81,
- 0x7f, 0xf1, 0xfe, 0xff, 0xff,
- 0xff, 0x7f, 0xb9, 0xcf, 0xff, 0xff, 0x0f, 0xff,
- 0x00, 0xff, 0xd0, 0x7f, 0x75, 0x8b, 0x7f, 0xf1,
- 0x8f, 0x7f, 0x80, 0x7e, 0x91,
- 0xff, 0xbf, 0xdf, 0xff, 0xa7, 0x47, 0x70, 0xf7,
- 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff, 0x8f, 0x0f,
- 0x61, 0xf1, 0xef, 0xff, 0xff,
- 0x7f, 0xfe, 0xef, 0x5f, 0xf7, 0xff, 0xff, 0xff,
- 0xff, 0xe7, 0xb7, 0xfc, 0xeb, 0x9f, 0x7f, 0xf1,
- 0x9f, 0x0f, 0x71, 0xf1, 0xee,
- 0xff, 0xf0, 0xf7, 0x3f, 0xef, 0x97, 0xf8, 0xe8,
- 0xff, 0x9f, 0x7f, 0xf0, 0x7f, 0x9f, 0x6f, 0x91,
- 0x7e, 0xf1, 0x9f, 0x8f, 0x57,
- 0xff, 0xff, 0x26, 0xb9, 0xb8, 0xff, 0xf0, 0xff,
- 0xff, 0xff, 0xf7, 0x7f, 0x6f, 0xf4, 0x9f, 0x1f,
- 0x71, 0xe1, 0xfe, 0x7f, 0xff,
- 0xbf, 0xff, 0x71, 0xbb, 0xe8, 0xff, 0xff, 0xf8,
- 0xbf, 0xff, 0xaf, 0xff, 0xf8, 0x9d, 0x6f, 0xf1,
- 0xbf, 0xff, 0xb7, 0xff, 0xbd,
- 0xbf, 0xff, 0xff, 0xdf, 0x97, 0xc7, 0xf7, 0xf0,
- 0xff, 0xff, 0x93, 0xff, 0xff, 0xef, 0xcf, 0x5f,
- 0xf1, 0xf7, 0xdf, 0xf5, 0x9f,
- 0xff, 0xff, 0x87, 0xbf, 0xe0, 0xbf, 0xf7, 0xff,
- 0xf7, 0x7f, 0xff, 0xff, 0x8f, 0x5f, 0x21, 0xb1,
- 0xff, 0x6d, 0xff, 0xef, 0xff,
- 0xff, 0xff, 0xd7, 0xff, 0xb8, 0xff, 0xff, 0xff,
- 0x3f, 0xef, 0xf0, 0x7f, 0xd7, 0x7f, 0xf1, 0xff,
- 0xef, 0xee, 0xbf, 0x7f, 0xf1,
- 0xff, 0xf8, 0x47, 0x0f, 0xc7, 0xf0, 0x7f, 0xf0,
- 0xf0, 0x90, 0x7f, 0x70, 0x8f, 0x2f, 0xc1, 0x0f,
- 0x11, 0x1f, 0xef, 0xaf, 0x7f,
- 0xbf, 0x7f, 0xf0, 0x9f, 0xe7, 0xf7, 0x38, 0xff,
- 0xff, 0xff, 0x8f, 0x7f, 0xf0, 0xaf, 0xff, 0xff,
- 0xbf, 0xfe, 0xfd, 0xdf, 0x8f,
- 0xff, 0xff, 0xbf, 0xf7, 0x8f, 0xff, 0xf7, 0xff,
- 0xeb, 0xff, 0xff, 0xff, 0x8d, 0x3f, 0x81, 0x7f,
- 0xd1, 0xfe, 0xdf, 0xfe, 0xff,
- 0x7f, 0xff, 0xff, 0xdf, 0xa8, 0xff, 0xf0, 0xff,
- 0xff, 0xf0, 0xf7, 0xff, 0xff, 0xff, 0xef, 0xef,
- 0xef, 0x9f, 0x7f, 0x7e, 0xfe,
- 0xff, 0xff, 0xef, 0xff, 0xa7, 0x77, 0xff, 0xff,
- 0xef, 0xff, 0xff, 0xdf, 0xff, 0xe7, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xfe, 0xff,
- 0x3f, 0x78, 0xf8, 0xff, 0xff, 0xff, 0xff, 0xbf,
- 0xff, 0x0f, 0x0f, 0xf1, 0xe1, 0xff, 0xff, 0xef,
- 0xef, 0xff, 0xff, 0x8e, 0x0e,
- 0xff, 0xf8, 0x7f, 0xff, 0x7f, 0xff, 0xff, 0x8f,
- 0x8f, 0x80, 0xf1, 0xf1, 0xef, 0xaf, 0xaf, 0xff,
- 0xee, 0xdf, 0x0e, 0x01, 0x71,
- 0xbf, 0xf8, 0xf8, 0xff, 0x7f, 0xff, 0xff, 0xff,
- 0xef, 0x8f, 0x9f, 0xf1, 0xe1, 0xff, 0xaf, 0xef,
- 0xfe, 0xff, 0xff, 0x8f, 0x0f,
- 0xff, 0xf8, 0x7f, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0x9f, 0x9f, 0xf1, 0xf1, 0xef, 0xff, 0xaf, 0xff,
- 0xff, 0xff, 0x8e, 0x0f, 0x71,
- 0xff, 0xf7, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xef, 0xbf, 0xef, 0xff,
- 0xef, 0xbf, 0xff, 0xef, 0xff,
- 0xff, 0xf7, 0x7f, 0xff, 0xff, 0xff, 0x8f, 0xff,
- 0xf0, 0xff, 0xff, 0xff, 0xef, 0xff, 0xef, 0xfe,
- 0xcf, 0x3f, 0xf0, 0xff, 0xff,
- 0x7f, 0xf0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xbf,
- 0xff, 0x88, 0xff, 0xf0, 0xff, 0xff, 0xef, 0xfe,
- 0xff, 0xff, 0xff, 0x8f, 0x6e,
- 0xbf, 0xff, 0x78, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0x8f, 0xff, 0xe0, 0xff, 0xef, 0xff,
- 0xff, 0xff, 0xee, 0xef, 0x9f,
- 0xff, 0x8f, 0x7f, 0xf8, 0xff, 0xff, 0xff, 0xff,
- 0x8f, 0xff, 0xf0, 0x8f, 0xff, 0xa0, 0xff, 0xfe,
- 0xff, 0xbf, 0x8e, 0x6f, 0xf1,
- 0xff, 0xf8, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0x8f, 0xff, 0xf0, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0x8f, 0x6f,
- 0x3f, 0xff, 0xf8, 0xff, 0x8f, 0x7f, 0xf0, 0xcf,
- 0xff, 0xb0, 0x0f, 0xaf, 0x70, 0xff, 0x8f, 0x7e,
- 0xf1, 0xff, 0xff, 0xf1, 0x9e,
- 0xff, 0x80, 0x7f, 0xf8, 0xff, 0x7f, 0xff, 0xff,
- 0xef, 0x8f, 0x7f, 0x90, 0xff, 0xf1, 0xff, 0xff,
- 0xff, 0xaf, 0xfe, 0x8f, 0x7f,
- 0xff, 0x80, 0xff, 0xf8, 0xff, 0xff, 0xff, 0xff,
- 0x3f, 0xdf, 0xff, 0x81, 0x7f, 0xf0, 0xff, 0xfe,
- 0xff, 0xff, 0xff, 0x8f, 0x7f,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0x9f, 0x7f, 0xf0, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xbf, 0x7e, 0xf1,
- 0xff, 0xff, 0x7f, 0xff, 0xff, 0x0f, 0xaf, 0x80,
- 0xf0, 0xf0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xde,
- 0x0f, 0x91, 0x7f, 0xf1, 0xff,
- 0x7f, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0x7f, 0xff, 0xff, 0xff, 0xff, 0xf3, 0xff, 0xfe,
- 0xff, 0xff, 0xbf, 0xff, 0xfb,
- 0xbf, 0x87, 0xf8, 0xf8, 0xff, 0x7f, 0xff, 0xff,
- 0xff, 0xdf, 0x8f, 0x8f, 0xf0, 0xf0, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0x8f,
- 0xff, 0x7f, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0x7f, 0xff, 0xff, 0xdf, 0xbf, 0xff, 0xef, 0xff,
- 0xff, 0xaf, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xbf, 0xfe,
- 0xff, 0xff, 0xff, 0xff, 0xff,
- 0x7f, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xdf, 0xff, 0xff, 0xbf, 0xff, 0xff, 0xfe,
- 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0x7f, 0xff, 0xaf, 0xff,
- 0xf0, 0xdf, 0xff, 0xff, 0xff, 0xff, 0xbf, 0xff,
- 0xdf, 0xfe, 0xfe, 0xff, 0xff,
- 0xff, 0xff, 0x0f, 0x8f, 0xf0, 0x8f, 0xff, 0xf0,
- 0xf9, 0xff, 0xf7, 0xff, 0x0f, 0x5f, 0x29, 0x89,
- 0x77, 0xf1, 0xfa, 0xff, 0xde,
- 0xff, 0xc3, 0x3f, 0x4b, 0x7f, 0xe9, 0x0f, 0xff,
- 0x00, 0xff, 0x90, 0x0f, 0xd7, 0xff, 0x7f, 0xf9,
- 0x8f, 0x7f, 0x81, 0x7f, 0x81,
- 0xff, 0xff, 0xfb, 0x7d, 0x80, 0x46, 0x76, 0xf0,
- 0xff, 0xff, 0x6f, 0xff, 0xff, 0xad, 0xcf, 0x3f,
- 0x71, 0xf9, 0xff, 0xff, 0xff,
- 0x3f, 0xba, 0xff, 0xc7, 0xf7, 0xb9, 0xcf, 0xde,
- 0x77, 0xb7, 0x77, 0xfe, 0xff, 0xbf, 0x6f, 0xf9,
- 0xff, 0x7e, 0x79, 0xb9, 0xfe,
- 0xff, 0xe4, 0xf7, 0x8f, 0xfe, 0x07, 0xfe, 0xf8,
- 0xff, 0x89, 0x7f, 0xe8, 0x7f, 0xd7, 0x7f, 0x99,
- 0x76, 0xf1, 0xff, 0x0f, 0x7b,
- 0xbf, 0xff, 0xb6, 0xb9, 0x8f, 0xdf, 0xf6, 0xff,
- 0xff, 0xf7, 0xff, 0xff, 0x8f, 0xdd, 0x87, 0x7f,
- 0x71, 0xf1, 0xfe, 0xff, 0xff,
- 0xff, 0x7f, 0xf1, 0x8a, 0xff, 0xff, 0xff, 0xff,
- 0xbf, 0xff, 0xcf, 0xfb, 0xe8, 0x9d, 0x77, 0xa9,
- 0xff, 0x77, 0xda, 0x7f, 0xff,
- 0xbf, 0xff, 0xf7, 0xf7, 0x86, 0xe5, 0xf0, 0xe0,
- 0xff, 0xff, 0xbf, 0xff, 0xff, 0xef, 0x8f, 0x7f,
- 0xbd, 0xff, 0xff, 0xff, 0x8f,
- 0xff, 0xef, 0x86, 0x8f, 0xf0, 0xff, 0xf6, 0x9f,
- 0xff, 0x7f, 0xff, 0xff, 0xcf, 0x1f, 0x71, 0xdd,
- 0x7f, 0xe1, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xc7, 0xf7, 0xb9, 0xff, 0xff, 0xfa,
- 0x3f, 0xef, 0xf0, 0xff, 0xef, 0x7f, 0xd5, 0xff,
- 0xfb, 0xff, 0xf7, 0x6e, 0xf1,
- 0xff, 0xfc, 0xc7, 0xbf, 0xc8, 0xc0, 0x59, 0xff,
- 0xdf, 0xff, 0x7b, 0xf0, 0xa7, 0x1f, 0xa9, 0x77,
- 0x79, 0x71, 0x11, 0xff, 0x79,
- 0xbf, 0xfb, 0x70, 0xbf, 0xff, 0xf9, 0x37, 0xbe,
- 0xff, 0xff, 0x8f, 0x7f, 0xf4, 0x9f, 0xff, 0xff,
- 0xd7, 0x7f, 0xff, 0xff, 0xaf,
- 0xff, 0xff, 0x9e, 0xf7, 0x9f, 0xfe, 0xe4, 0xff,
- 0xcf, 0xcf, 0xff, 0xff, 0xdf, 0x7f, 0x8d, 0x7f,
- 0xf9, 0xfa, 0xdf, 0x9f, 0xef,
- 0x7f, 0xef, 0xff, 0xff, 0xbe, 0xfd, 0xd2, 0xdf,
- 0xff, 0x7e, 0xf7, 0xff, 0xff, 0xab, 0x97, 0xef,
- 0xf3, 0xfe, 0x7f, 0x71, 0xfe,
- 0xff, 0x9f, 0xff, 0xff, 0xb6, 0xfb, 0xf7, 0xff,
- 0xff, 0xf7, 0xff, 0xbf, 0xff, 0xb7, 0xdb, 0xff,
- 0xbb, 0xef, 0xff, 0xff, 0xff,
- 0x3f, 0x68, 0xfe, 0xfd, 0xfb, 0xff, 0xff, 0xef,
- 0xf1, 0x1e, 0x1b, 0xf1, 0xf5, 0xff, 0xff, 0xff,
- 0xff, 0x9f, 0xfb, 0x9a, 0x36,
- 0xff, 0xfc, 0x7d, 0xff, 0x73, 0xf7, 0xff, 0xaf,
- 0x9f, 0x94, 0xfd, 0xf5, 0xff, 0xf7, 0xff, 0xfb,
- 0xfe, 0xef, 0x3e, 0x07, 0x4d,
- 0xbf, 0xe8, 0xf8, 0xff, 0x7f, 0xff, 0xf7, 0xf7,
- 0xf1, 0x8f, 0xaf, 0xd1, 0xf7, 0xf9, 0xfd, 0xff,
- 0xf8, 0xdf, 0xfb, 0x8f, 0x2f,
- 0xff, 0xf8, 0x7f, 0xff, 0xf7, 0xf7, 0xff, 0xff,
- 0xa7, 0xaf, 0xf7, 0xf3, 0xdf, 0xff, 0xfd, 0xff,
- 0xfd, 0xff, 0xae, 0x0f, 0x71,
- 0xff, 0xff, 0xff, 0xf9, 0xff, 0xff, 0xf3, 0xf3,
- 0xff, 0xf3, 0xff, 0xf7, 0xfb, 0xf3, 0xff, 0xff,
- 0xff, 0xeb, 0xff, 0xf3, 0xdb,
- 0xff, 0xeb, 0x7b, 0xfb, 0xf7, 0xff, 0x8b, 0xf7,
- 0xfc, 0xf7, 0xfb, 0xff, 0xfb, 0xf3, 0xff, 0xff,
- 0x8b, 0x7f, 0xd4, 0xfb, 0xff,
- 0x7f, 0xec, 0xff, 0xff, 0xff, 0xff, 0xf7, 0xf7,
- 0xff, 0x8e, 0xff, 0xf8, 0xf7, 0xfb, 0xfd, 0xff,
- 0xfd, 0x9f, 0xf7, 0x9f, 0x7e,
- 0xbf, 0xfb, 0x7c, 0xff, 0xf7, 0xff, 0xff, 0xfb,
- 0xfb, 0xf1, 0x8f, 0xf3, 0xdc, 0xf7, 0xfd, 0xff,
- 0xe9, 0xeb, 0xef, 0xc3, 0xb7,
- 0xff, 0x07, 0xff, 0xfc, 0xff, 0xff, 0xff, 0xf7,
- 0x8f, 0xff, 0xf4, 0x8f, 0xfb, 0xfc, 0xff, 0xef,
- 0xff, 0xf7, 0x8f, 0x7f, 0xd1,
- 0xff, 0xfa, 0xff, 0xfb, 0xff, 0xff, 0xff, 0xff,
- 0xf3, 0x89, 0xef, 0xf8, 0xff, 0xf7, 0xff, 0xef,
- 0xef, 0xf7, 0xf3, 0xab, 0x7f,
- 0x3f, 0xf9, 0x7e, 0xf9, 0x8f, 0x7f, 0xf0, 0xef,
- 0xff, 0xfc, 0x1b, 0xff, 0x7c, 0xff, 0x8f, 0x6e,
- 0xf1, 0xf7, 0x73, 0xff, 0xa6,
- 0xff, 0x80, 0x7f, 0xf8, 0xff, 0x7f, 0xff, 0xff,
- 0xf9, 0x8f, 0x7f, 0x84, 0xff, 0xf1, 0xff, 0xff,
- 0xff, 0xff, 0xfa, 0x8f, 0x7f,
- 0xff, 0x96, 0xff, 0xfc, 0xff, 0xff, 0xff, 0xff,
- 0x57, 0xaf, 0xfb, 0x85, 0x7f, 0xf4, 0xff, 0xfe,
- 0xef, 0xff, 0xef, 0xbf, 0x53,
- 0xff, 0x7d, 0xff, 0xff, 0xe3, 0xff, 0xff, 0xff,
- 0x97, 0x71, 0xf8, 0xff, 0xff, 0xff, 0xdb, 0xef,
- 0xef, 0xe7, 0x97, 0x72, 0xfd,
- 0xff, 0xff, 0xff, 0xff, 0xf3, 0x0f, 0xe3, 0x86,
- 0xf0, 0xf4, 0xfb, 0xff, 0xdf, 0xff, 0xfb, 0x8e,
- 0x0b, 0xa5, 0x72, 0xf9, 0xff,
- 0xff, 0xfb, 0xff, 0xff, 0xf7, 0xff, 0xf3, 0xff,
- 0xf7, 0xff, 0xf3, 0xff, 0xff, 0xff, 0xfb, 0xee,
- 0xfb, 0xff, 0xef, 0xff, 0xff,
- 0xbf, 0x82, 0xf8, 0xf8, 0xf7, 0x7f, 0xf7, 0xff,
- 0xff, 0xef, 0x87, 0x87, 0xf0, 0xf0, 0xfb, 0xff,
- 0xfb, 0xf7, 0xef, 0xef, 0x87,
- 0xff, 0xf6, 0xff, 0xfa, 0xf1, 0xef, 0xf3, 0xf7,
- 0x7f, 0xff, 0xff, 0xef, 0xff, 0xf7, 0xff, 0xff,
- 0xfb, 0xf7, 0xff, 0xfe, 0xff,
- 0xff, 0xf7, 0xfb, 0xf2, 0xf3, 0xff, 0xf1, 0xf7,
- 0xff, 0xef, 0xf7, 0xef, 0xf7, 0xf7, 0xff, 0xfe,
- 0xff, 0xff, 0xef, 0xff, 0xe7,
- 0xff, 0xfb, 0xfb, 0xff, 0xf5, 0xef, 0xf7, 0xff,
- 0xff, 0xff, 0xff, 0xf7, 0x77, 0xff, 0xff, 0xfe,
- 0xff, 0xf7, 0xff, 0xef, 0xef,
- 0xff, 0xff, 0xff, 0xff, 0xf7, 0xef, 0xe5, 0xff,
- 0xfe, 0x61, 0xf7, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0x9f, 0xef, 0xef, 0xf3, 0xf7,
- 0xff, 0xff, 0x0f, 0x9f, 0xfa, 0x87, 0xff, 0xf6,
- 0xeb, 0xff, 0xff, 0xef, 0x0f, 0x6f, 0xfd, 0x0d,
- 0x53, 0xf1, 0xf3, 0xff, 0xff,
- 0xbf, 0x1b, 0x7f, 0x96, 0xfe, 0xff, 0x8f, 0xfb,
- 0x00, 0xff, 0xb0, 0x17, 0x7c, 0x8f, 0xff, 0xfd,
- 0x8f, 0x7f, 0x81, 0x7e, 0xf1,
- 0xff, 0xfd, 0xed, 0xee, 0x9e, 0x0b, 0x79, 0xff,
- 0xfb, 0x77, 0x5b, 0xff, 0x9f, 0xff, 0x4f, 0x0f,
- 0x71, 0xf0, 0xdb, 0xff, 0xf7,
- 0x7f, 0xe7, 0xef, 0x18, 0xff, 0xff, 0x9d, 0x8e,
- 0x67, 0xbf, 0x4f, 0xff, 0xff, 0xae, 0xff, 0xf1,
- 0xeb, 0xef, 0xfd, 0xad, 0xf6,
- 0xff, 0xfc, 0xf7, 0x1f, 0xff, 0x9f, 0xfb, 0xfc,
- 0xff, 0x8f, 0x77, 0xec, 0x5f, 0x6f, 0xdf, 0x25,
- 0x7e, 0xd9, 0xe6, 0x97, 0x3f,
- 0xff, 0xf7, 0x67, 0xec, 0x92, 0xbe, 0xf1, 0xfb,
- 0xff, 0x7f, 0xdf, 0x7b, 0x5e, 0x7d, 0xe7, 0x5f,
- 0xf1, 0xf1, 0xfb, 0xff, 0xf7,
- 0xbf, 0xf7, 0x71, 0x9a, 0xfd, 0xff, 0xf7, 0xfb,
- 0x5f, 0x7f, 0xaf, 0xdf, 0xf9, 0xe7, 0x77, 0xdd,
- 0x6f, 0xf7, 0xbb, 0xff, 0x8b,
- 0xbf, 0xff, 0x77, 0xff, 0x93, 0xfe, 0xf8, 0xfe,
- 0xbf, 0xfe, 0xbf, 0xff, 0xff, 0xbf, 0xab, 0x7f,
- 0xfd, 0xff, 0xcf, 0x67, 0xff,
- 0xff, 0x7f, 0x07, 0x9f, 0xe4, 0xdb, 0xff, 0xf1,
- 0xf7, 0x7f, 0xff, 0xff, 0x8f, 0x6f, 0xd1, 0x6d,
- 0x73, 0xff, 0xff, 0xfb, 0xff,
- 0xff, 0x6f, 0x9f, 0x7b, 0xfd, 0xff, 0xf6, 0xfd,
- 0x27, 0xff, 0xfc, 0xff, 0xaf, 0xff, 0xfd, 0xfe,
- 0x7f, 0xdf, 0xff, 0x7f, 0xef,
- 0xff, 0xfe, 0x81, 0xe7, 0x93, 0x91, 0x83, 0x85,
- 0xef, 0x8f, 0x7f, 0x74, 0x8d, 0x1b, 0x2d, 0xe2,
- 0xcd, 0xe5, 0xb5, 0x9f, 0x77,
- 0xbf, 0x7f, 0xe4, 0xef, 0xff, 0xf7, 0xdb, 0xfd,
- 0x7f, 0xfe, 0xab, 0x7f, 0xfc, 0xbf, 0xff, 0xde,
- 0x77, 0xfb, 0xdf, 0xef, 0xbf,
- 0xff, 0xff, 0x1e, 0x7f, 0x8f, 0xff, 0x92, 0xf3,
- 0xdf, 0x7b, 0xff, 0x7b, 0xff, 0xdb, 0x3d, 0x5f,
- 0xf9, 0xf6, 0xff, 0xf2, 0xf7,
- 0x7f, 0x7f, 0xff, 0xff, 0xef, 0xd2, 0xf0, 0xb7,
- 0xfb, 0x7f, 0xfc, 0x77, 0xd7, 0x3f, 0xc7, 0x7f,
- 0xf3, 0xe7, 0xff, 0xfd, 0xfe,
- 0xff, 0xff, 0xef, 0x7b, 0xef, 0xf5, 0xda, 0xff,
- 0x7c, 0xff, 0xff, 0xff, 0xff, 0x7b, 0xeb, 0xfb,
- 0xef, 0xff, 0xef, 0xff, 0xff,
- 0x3f, 0x60, 0xfc, 0xfb, 0xf7, 0xff, 0xff, 0xff,
- 0xfb, 0x00, 0x0f, 0xf1, 0xf5, 0xfb, 0xff, 0xff,
- 0xff, 0xff, 0xf3, 0x86, 0x3e,
- 0xff, 0xf8, 0x7f, 0xfb, 0x73, 0xff, 0xff, 0x9f,
- 0xab, 0x8c, 0xf5, 0xd1, 0xff, 0xfb, 0xff, 0xff,
- 0xfe, 0xeb, 0x36, 0x0d, 0x49,
- 0xbf, 0xf0, 0xfc, 0xfb, 0x73, 0xff, 0xf3, 0xff,
- 0xff, 0xab, 0xa7, 0xf1, 0xf9, 0xff, 0xf7, 0xdf,
- 0xfa, 0xfb, 0xff, 0xa7, 0x3f,
- 0xff, 0xf8, 0x7f, 0xff, 0xfb, 0xfb, 0xfb, 0xff,
- 0xaf, 0x8f, 0xf9, 0xf9, 0xdf, 0xdf, 0xf7, 0xdb,
- 0xff, 0xff, 0xba, 0x2f, 0x69,
- 0xff, 0xe7, 0xfb, 0xfb, 0xff, 0xff, 0xff, 0xfb,
- 0xff, 0xfb, 0xd7, 0xff, 0xdf, 0xf7, 0xd7, 0xdf,
- 0xf3, 0xdb, 0xff, 0xdb, 0xff,
- 0xff, 0xe3, 0x7b, 0xf9, 0xfb, 0xff, 0x8f, 0xfb,
- 0xf8, 0xff, 0xff, 0xef, 0xdf, 0xf3, 0xd7, 0xdf,
- 0xa3, 0x5b, 0xc4, 0xfb, 0xef,
- 0x7f, 0xe0, 0xfd, 0xfb, 0xfb, 0xff, 0xfb, 0xeb,
- 0xff, 0x8c, 0xeb, 0xf0, 0xd3, 0xff, 0xd7, 0xff,
- 0xf7, 0xbb, 0x7f, 0x8f, 0x7e,
- 0xbf, 0xfb, 0x6c, 0xfb, 0xfb, 0xff, 0xfb, 0xff,
- 0xfb, 0xf3, 0x8b, 0xf3, 0xf4, 0xf7, 0xd7, 0xff,
- 0xf3, 0xff, 0xfe, 0xc2, 0xbf,
- 0xff, 0x87, 0x7f, 0xfa, 0xff, 0xff, 0xff, 0xff,
- 0x8f, 0xff, 0xf0, 0x8f, 0xff, 0xf4, 0xff, 0xdf,
- 0xff, 0xfb, 0x8f, 0x7f, 0xc5,
- 0xff, 0xf8, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfb,
- 0xf3, 0x87, 0xef, 0xfc, 0xfd, 0xfb, 0xff, 0xff,
- 0xdf, 0xff, 0xfb, 0xab, 0x7f,
- 0x3f, 0xf3, 0xfa, 0xf9, 0x8f, 0x7f, 0xf0, 0xeb,
- 0xfb, 0xec, 0x1f, 0xcf, 0x7e, 0xff, 0x8f, 0x5e,
- 0xd1, 0xbf, 0xff, 0xfe, 0xaa,
- 0xff, 0x80, 0x7d, 0xf8, 0xff, 0x7f, 0xff, 0xff,
- 0xf7, 0x8f, 0x5f, 0x8c, 0xff, 0xf1, 0xff, 0xff,
- 0xff, 0xff, 0xfa, 0x9f, 0x6f,
- 0xff, 0x9a, 0xfd, 0xfc, 0xff, 0xff, 0xff, 0xff,
- 0x6f, 0xbf, 0xd7, 0x89, 0x7f, 0xf4, 0xff, 0xfe,
- 0xff, 0xff, 0xdf, 0xbf, 0x6f,
- 0xff, 0xfd, 0xff, 0xff, 0xef, 0xff, 0xfb, 0xff,
- 0x2b, 0x73, 0xf0, 0xf3, 0xff, 0xff, 0xc3, 0xff,
- 0xff, 0xff, 0x8b, 0x62, 0xfd,
- 0xff, 0xef, 0xff, 0xff, 0xfb, 0x0f, 0x8b, 0x8e,
- 0xf0, 0xdc, 0xf7, 0xff, 0xff, 0xff, 0xfb, 0xae,
- 0x43, 0xa9, 0x73, 0xf9, 0xfb,
- 0x7f, 0xf9, 0xff, 0xff, 0xfd, 0xff, 0xf9, 0xff,
- 0xfb, 0xff, 0xff, 0xff, 0xff, 0xfb, 0xf3, 0xfe,
- 0xf3, 0xff, 0xff, 0xff, 0xff,
- 0xbf, 0x87, 0xf8, 0xf8, 0xf9, 0x7f, 0xf9, 0xff,
- 0xff, 0x7f, 0x8f, 0x8f, 0xf0, 0xf0, 0xf3, 0xff,
- 0xf3, 0xfb, 0xff, 0xff, 0x8f,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xf9, 0xff,
- 0x7f, 0xff, 0xff, 0xff, 0xff, 0xff, 0xf3, 0xff,
- 0xfb, 0xef, 0xff, 0xff, 0xff,
- 0xff, 0x7f, 0xff, 0xf7, 0xf9, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfb, 0xfe,
- 0xf3, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xf5, 0xff, 0xf1, 0xff,
- 0xff, 0x7f, 0xff, 0xff, 0xff, 0xff, 0xf3, 0xfe,
- 0xfb, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0x7f, 0xff, 0xf1, 0xff, 0x85, 0xff,
- 0xfe, 0xf1, 0xff, 0xff, 0xff, 0xff, 0xfb, 0xff,
- 0xf3, 0xde, 0xff, 0xf3, 0xff,
- 0xbf, 0xff, 0x0f, 0x9f, 0xfa, 0x9f, 0xeb, 0xf2,
- 0xe7, 0xff, 0x7b, 0xff, 0x4f, 0x73, 0x31, 0x81,
- 0x5f, 0xf1, 0xfe, 0xff, 0xbf,
- 0xff, 0xaf, 0x7f, 0x94, 0xfb, 0xfe, 0x8f, 0xff,
- 0x00, 0xff, 0xf0, 0xef, 0xef, 0x5f, 0xfb, 0xf5,
- 0x8f, 0x7f, 0x81, 0x5e, 0xf1,
- 0xff, 0xf9, 0xff, 0xef, 0x86, 0x0f, 0x71, 0xf6,
- 0xff, 0x7f, 0x7f, 0x97, 0xcf, 0xfd, 0xbf, 0x5f,
- 0xf9, 0xf1, 0xf3, 0xff, 0xff,
- 0x3f, 0xdb, 0xed, 0x1e, 0xff, 0xf6, 0x95, 0x9a,
- 0x6f, 0x3d, 0xff, 0xf8, 0xfb, 0xdf, 0xf7, 0xfd,
- 0xfb, 0xf7, 0xfd, 0xed, 0xde,
- 0x7f, 0xf0, 0xf7, 0x87, 0x7f, 0x9b, 0xff, 0xec,
- 0x9f, 0xbf, 0x7f, 0xcd, 0x7f, 0xf7, 0x3b, 0xad,
- 0x7e, 0xf8, 0xff, 0xbb, 0x79,
- 0xff, 0xff, 0xe3, 0x7c, 0x01, 0x8d, 0xf5, 0xfb,
- 0xe7, 0xf7, 0xff, 0xff, 0x9e, 0x7d, 0x0f, 0x7f,
- 0xf1, 0xcd, 0xfe, 0xf7, 0xff,
- 0x3f, 0xd7, 0xf4, 0x9a, 0xf7, 0xed, 0xff, 0xf3,
- 0xb7, 0xff, 0xef, 0xff, 0xbd, 0xe7, 0x5f, 0xbd,
- 0xff, 0xef, 0xfe, 0x7f, 0xf1,
- 0x3f, 0xff, 0xe7, 0xff, 0xcf, 0xfa, 0xf8, 0xff,
- 0xff, 0xdf, 0xbf, 0xfe, 0xdf, 0xff, 0xd3, 0x1f,
- 0xfd, 0xef, 0x7f, 0xff, 0xcf,
- 0x7f, 0xff, 0x93, 0xdf, 0xf0, 0xef, 0xf3, 0xd4,
- 0x77, 0x6f, 0xff, 0xff, 0xbf, 0x7f, 0x7d, 0xfd,
- 0x7f, 0x7d, 0xff, 0xff, 0xf7,
- 0xff, 0xf7, 0xdf, 0xfb, 0xbc, 0xef, 0xff, 0xfd,
- 0xff, 0xff, 0xfc, 0x7f, 0xb7, 0xff, 0xfd, 0x5f,
- 0xcf, 0xff, 0xef, 0x7f, 0xfd,
- 0xff, 0xee, 0x87, 0xef, 0x92, 0xf0, 0x7e, 0xe5,
- 0xbf, 0x8f, 0x7f, 0x60, 0xd9, 0xdb, 0x71, 0xb3,
- 0x2d, 0x49, 0x6c, 0x29, 0x7f,
- 0xbf, 0xff, 0xe4, 0x6f, 0xf3, 0xfa, 0x57, 0xfd,
- 0xff, 0xfe, 0xb7, 0x7f, 0xfc, 0xff, 0x73, 0xdf,
- 0xf3, 0x7f, 0xfd, 0xff, 0xbf,
- 0xff, 0xef, 0x8b, 0x7f, 0x8f, 0xff, 0xf2, 0xff,
- 0xff, 0xf7, 0xfb, 0xff, 0xff, 0xdf, 0xed, 0xef,
- 0xf1, 0xf7, 0xfd, 0xdf, 0xf7,
- 0xff, 0xff, 0xff, 0xf7, 0xe7, 0xe6, 0xf1, 0xff,
- 0xdf, 0xfb, 0xe9, 0xfe, 0xbf, 0xff, 0xbf, 0x5f,
- 0xff, 0xbf, 0x0e, 0x75, 0xfa,
- 0xff, 0xff, 0xff, 0x6f, 0xfb, 0xf9, 0xff, 0xff,
- 0xf3, 0xff, 0xfb, 0xbf, 0xef, 0xff, 0xf3, 0x7f,
- 0xff, 0xff, 0xff, 0xfb, 0xff,
- 0xff, 0x38, 0xf8, 0xf7, 0xff, 0xff, 0xdf, 0x9f,
- 0xf7, 0x0b, 0x0f, 0xf5, 0xf5, 0xff, 0xff, 0xff,
- 0xbf, 0xf7, 0xf3, 0x8e, 0x0e,
- 0xbf, 0xe8, 0x6f, 0xef, 0x7f, 0xff, 0xdf, 0xdf,
- 0xef, 0x88, 0xf5, 0x91, 0xfb, 0xff, 0xff, 0xbf,
- 0xfe, 0xbf, 0xa6, 0x81, 0x71,
- 0xff, 0xf0, 0xf8, 0xff, 0x67, 0xef, 0xff, 0xb7,
- 0xf7, 0x8f, 0x2f, 0xd1, 0x41, 0xff, 0xcf, 0x5f,
- 0xfe, 0xff, 0x7b, 0x8f, 0x9f,
- 0xff, 0xf8, 0x6f, 0xef, 0xf7, 0xe7, 0xff, 0xff,
- 0xbf, 0x8f, 0xd1, 0xf1, 0xcf, 0xdf, 0xcf, 0xdf,
- 0xff, 0xff, 0x9f, 0x8f, 0xe1,
- 0xff, 0xe7, 0xff, 0xf7, 0xe7, 0x6f, 0xf7, 0xe7,
- 0xe7, 0x77, 0xef, 0xef, 0x6f, 0xff, 0xff, 0xdf,
- 0xff, 0xdf, 0xdf, 0xff, 0xff,
- 0xff, 0xa7, 0x6f, 0xff, 0xf7, 0xef, 0x97, 0xe7,
- 0xf0, 0xef, 0x7f, 0xaf, 0x4f, 0xff, 0xff, 0xdf,
- 0xbf, 0x5f, 0xe0, 0x7f, 0xef,
- 0x7f, 0xa0, 0xef, 0xff, 0xe7, 0xff, 0xf7, 0xf7,
- 0xff, 0x8b, 0xbf, 0xf8, 0xdf, 0xff, 0xcf, 0x7e,
- 0xff, 0xdf, 0x7f, 0x8e, 0x5f,
- 0xff, 0xff, 0x38, 0xff, 0xf7, 0xff, 0xf7, 0xf7,
- 0xf7, 0xf7, 0x8f, 0xf7, 0xf8, 0xf7, 0xcf, 0xff,
- 0xff, 0xff, 0xfe, 0xcb, 0x3f,
- 0x3f, 0x9f, 0x7f, 0xf8, 0xff, 0xef, 0xff, 0xff,
- 0x8f, 0xff, 0xf0, 0xaf, 0xff, 0xf0, 0xff, 0xdf,
- 0xff, 0xff, 0xae, 0x7f, 0xc1,
- 0x7f, 0xf0, 0x7f, 0xff, 0xff, 0xff, 0xef, 0xff,
- 0xf7, 0xbf, 0xbf, 0xd0, 0xff, 0xff, 0xff, 0xff,
- 0x8f, 0xff, 0xff, 0x9b, 0xff,
- 0x7f, 0xcf, 0xf8, 0xff, 0x8f, 0x6f, 0xe0, 0xd7,
- 0xf7, 0xf7, 0xff, 0xfe, 0xf0, 0xfe, 0x8f, 0x5e,
- 0xd1, 0xff, 0xdf, 0xdf, 0xbe,
- 0xff, 0x84, 0x7f, 0xf8, 0xff, 0x7f, 0xdf, 0xff,
- 0xff, 0xaf, 0x7f, 0x81, 0x7f, 0xf5, 0xff, 0xff,
- 0xff, 0xff, 0xfa, 0x9f, 0x3f,
- 0xff, 0xd8, 0xff, 0xf8, 0xff, 0xff, 0xff, 0xff,
- 0x7f, 0x0f, 0xff, 0x85, 0x7f, 0xf0, 0xff, 0xfe,
- 0xbf, 0xff, 0xdf, 0x6f, 0xbf,
- 0xff, 0xff, 0xff, 0xff, 0xaf, 0xff, 0xf7, 0xdf,
- 0xf7, 0x47, 0xf4, 0xff, 0xef, 0xff, 0xdf, 0x7f,
- 0xff, 0xbf, 0xcf, 0x5a, 0xf1,
- 0xff, 0xbf, 0xbf, 0xff, 0xff, 0x3f, 0x8f, 0xc0,
- 0xf3, 0xd1, 0xff, 0xfb, 0xef, 0xff, 0xdf, 0xbe,
- 0x0f, 0x25, 0xe9, 0xd1, 0xff,
- 0xff, 0xff, 0xdf, 0xff, 0xff, 0xff, 0xf7, 0xf7,
- 0x2f, 0xaf, 0xf3, 0xfb, 0xef, 0xff, 0xff, 0xfe,
- 0xff, 0xff, 0xcf, 0xbf, 0xfb,
- 0xbf, 0x87, 0xf8, 0xf8, 0xdf, 0x7f, 0xff, 0xff,
- 0xff, 0xff, 0x8f, 0x8f, 0xe0, 0xf0, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0x8f,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0x7f, 0xff, 0xff, 0xff, 0xff, 0xfb, 0xeb, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xef, 0xfe,
- 0xfb, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xdf, 0xf7, 0xff, 0xff, 0xcf, 0xff,
- 0xf7, 0xff, 0xff, 0xff, 0xff, 0xff, 0xeb, 0xfe,
- 0xcf, 0xff, 0x7b, 0xfd, 0xff,
- 0xff, 0xff, 0xff, 0xf7, 0xdf, 0xff, 0xbf, 0xff,
- 0xfb, 0xff, 0xff, 0xfb, 0xff, 0xff, 0xef, 0xff,
- 0xfb, 0xbe, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0x8f, 0xff, 0xf0, 0xd4, 0xbf, 0xf0,
- 0xbf, 0xff, 0xff, 0xff, 0x93, 0x2f, 0xfd, 0xad,
- 0xf7, 0x75, 0xff, 0xff, 0xfe,
- 0xbf, 0x7f, 0xff, 0x9a, 0xff, 0xf4, 0x0f, 0xff,
- 0x00, 0xde, 0xf0, 0xf3, 0xf9, 0xbf, 0x7d, 0xff,
- 0x8f, 0x7f, 0x81, 0x0f, 0xd1,
- 0xff, 0xfb, 0xdf, 0xee, 0x8b, 0x0b, 0x78, 0xf0,
- 0xff, 0xfa, 0x7f, 0xbf, 0xff, 0xd5, 0x8f, 0x8f,
- 0xe1, 0xf7, 0xfb, 0xfb, 0xff,
- 0x7f, 0xb7, 0x99, 0xef, 0xdf, 0xf4, 0xff, 0xff,
- 0xe4, 0xf4, 0x5d, 0xf6, 0xef, 0x9f, 0xef, 0xf7,
- 0x3b, 0x3f, 0xdf, 0xbf, 0xec,
- 0xff, 0xec, 0xf7, 0xb9, 0x6b, 0xbc, 0xfb, 0xf7,
- 0xef, 0xff, 0x7e, 0xfd, 0x7e, 0xbb, 0xdf, 0x85,
- 0xfe, 0xf7, 0xff, 0x7b, 0x7f,
- 0xff, 0xff, 0xa7, 0xee, 0xe7, 0x5f, 0xe0, 0xf0,
- 0xff, 0xff, 0xff, 0x5f, 0xe6, 0x6f, 0x81, 0x8d,
- 0xd5, 0xf7, 0xbf, 0xef, 0xb6,
- 0xff, 0xd7, 0xf4, 0xee, 0xb7, 0x7c, 0xff, 0xd7,
- 0xaf, 0x7f, 0xed, 0x9f, 0xe5, 0xbf, 0xf7, 0x7d,
- 0xfb, 0xb7, 0xad, 0xd7, 0xfd,
- 0xbf, 0xff, 0xff, 0xc7, 0x8b, 0xff, 0xf0, 0xf6,
- 0xff, 0xfd, 0xfb, 0xff, 0xdf, 0xbe, 0x0f, 0x7f,
- 0xd5, 0xf7, 0xff, 0xf2, 0xfe,
- 0xff, 0xff, 0xc5, 0xff, 0xf0, 0x7c, 0xff, 0xad,
- 0x7f, 0x7f, 0xef, 0xff, 0xcf, 0x4f, 0xf1, 0xf5,
- 0x7b, 0xdd, 0xff, 0xdf, 0xff,
- 0xff, 0x77, 0xef, 0xff, 0xd8, 0xbf, 0xf7, 0xf3,
- 0x5f, 0xfb, 0xf9, 0x7f, 0xe7, 0xff, 0xd7, 0x7f,
- 0xad, 0xff, 0xfb, 0xfb, 0xf3,
- 0xff, 0xcc, 0x95, 0x8f, 0xd8, 0xf3, 0xfc, 0xbc,
- 0xdc, 0xdf, 0xbb, 0x44, 0x8b, 0xcb, 0x87, 0xb1,
- 0xb7, 0xa7, 0x97, 0xee, 0xf3,
- 0xff, 0x7f, 0xb4, 0xbf, 0xff, 0xc7, 0x7f, 0xcb,
- 0xfd, 0xbf, 0x7f, 0x7f, 0x74, 0xe7, 0xdf, 0xf5,
- 0xbb, 0xcf, 0xed, 0xfe, 0xfd,
- 0xff, 0x3f, 0xfb, 0x77, 0xcc, 0xbb, 0xf0, 0xfb,
- 0xff, 0xef, 0xbe, 0xff, 0xcf, 0xff, 0x85, 0x3f,
- 0xb5, 0xff, 0xf7, 0x37, 0x7f,
- 0x3f, 0xf7, 0xbf, 0xcf, 0x9f, 0xd7, 0xf7, 0xef,
- 0xff, 0x78, 0xe7, 0xff, 0xff, 0xff, 0x1f, 0x7f,
- 0x65, 0xbf, 0xbf, 0xff, 0xe7,
- 0xff, 0xff, 0xff, 0xff, 0xdb, 0xf7, 0xdf, 0xff,
- 0x77, 0x7f, 0xff, 0xff, 0xbf, 0xbf, 0xde, 0x77,
- 0xdd, 0xff, 0xff, 0xfe, 0xff,
- 0xbf, 0x68, 0xf8, 0xff, 0xf7, 0xff, 0xcf, 0xcf,
- 0xf3, 0x17, 0x3f, 0xd5, 0xdd, 0xf7, 0xff, 0xff,
- 0xcf, 0xdf, 0x73, 0x95, 0x3f,
- 0xff, 0xac, 0x6f, 0xef, 0x77, 0xdf, 0xff, 0xf7,
- 0xbb, 0x85, 0xdd, 0xe1, 0xf7, 0xfb, 0x7b, 0xdf,
- 0xfe, 0xff, 0xb7, 0x9f, 0x79,
- 0xff, 0xd8, 0xac, 0xfb, 0x47, 0xaf, 0xeb, 0xf7,
- 0xff, 0xaf, 0x2e, 0x70, 0xd9, 0xf7, 0xfb, 0xdf,
- 0xea, 0xfb, 0xfb, 0x1b, 0x5f,
- 0xff, 0xf8, 0x6f, 0xaf, 0xd7, 0xb7, 0xeb, 0xff,
- 0xe7, 0xaf, 0x7c, 0x70, 0xfb, 0xdf, 0xff, 0x7b,
- 0xfb, 0xff, 0xda, 0x9f, 0xf9,
- 0xff, 0x95, 0xbb, 0xfd, 0xc7, 0xcf, 0xfb, 0x83,
- 0xef, 0xf3, 0xbf, 0xcf, 0x47, 0xf7, 0xe7, 0x1f,
- 0xd7, 0x8b, 0x6f, 0x33, 0xbe,
- 0xff, 0xc7, 0x6f, 0xfd, 0x97, 0x2f, 0xeb, 0xb7,
- 0xdc, 0x77, 0xd7, 0x1f, 0x67, 0xf7, 0xe7, 0x9e,
- 0xe7, 0xdb, 0x34, 0xdb, 0xfb,
- 0x7f, 0xa8, 0xef, 0xff, 0xe7, 0xef, 0xff, 0xf7,
- 0xff, 0x8b, 0xbf, 0xd8, 0xef, 0xff, 0xe7, 0xdf,
- 0xf7, 0xfb, 0xf7, 0x9f, 0x66,
- 0xff, 0xfb, 0x6c, 0xff, 0xb7, 0x9f, 0xcf, 0xcb,
- 0xbb, 0x93, 0xaf, 0xff, 0xa8, 0xff, 0xc7, 0x3f,
- 0xa7, 0xcf, 0xfe, 0xe3, 0x3f,
- 0x3f, 0xdf, 0x7b, 0xfa, 0xff, 0xff, 0xff, 0xf7,
- 0x8f, 0x3f, 0xd0, 0xd3, 0x7f, 0xfc, 0xff, 0x8e,
- 0xff, 0xf3, 0x8f, 0x4e, 0xe4,
- 0x7f, 0xb8, 0xff, 0xff, 0xff, 0xef, 0x8f, 0xdf,
- 0xf3, 0xbb, 0x3f, 0xe0, 0xf3, 0xff, 0xff, 0xef,
- 0x8f, 0xd7, 0xf3, 0xab, 0xef,
- 0x7f, 0x8f, 0xf8, 0xfb, 0x8f, 0x6f, 0xa0, 0xff,
- 0xff, 0xdc, 0xff, 0x5f, 0xfc, 0xf3, 0x8f, 0x6e,
- 0xb1, 0xf7, 0xf7, 0xf7, 0x3e,
- 0xff, 0x90, 0x7b, 0xf8, 0xff, 0x7f, 0xdf, 0xff,
- 0xfb, 0x9f, 0x7f, 0xa0, 0xf3, 0xf1, 0xff, 0xff,
- 0xdf, 0xff, 0xdb, 0xbf, 0x3f,
- 0xff, 0xdc, 0xfb, 0xf8, 0xff, 0xff, 0xff, 0xff,
- 0x77, 0xaf, 0xff, 0xad, 0xf3, 0xf8, 0xff, 0xfe,
- 0xef, 0xff, 0xff, 0x6f, 0xbf,
- 0xff, 0xff, 0xcf, 0xff, 0xa3, 0xff, 0xaf, 0xcf,
- 0x93, 0xc3, 0x74, 0xef, 0xdf, 0xff, 0xab, 0x2f,
- 0xe7, 0xc7, 0xf3, 0x73, 0x79,
- 0xff, 0xff, 0xcf, 0xff, 0xc3, 0x7f, 0x83, 0xe4,
- 0xd3, 0xbc, 0x7b, 0xdb, 0xdf, 0x7f, 0x8b, 0x8e,
- 0x83, 0x01, 0x51, 0xd5, 0x7b,
- 0xff, 0xfb, 0xdf, 0xff, 0xc3, 0xef, 0xb3, 0xff,
- 0xb7, 0xff, 0xfe, 0xbf, 0xdf, 0xff, 0x8b, 0x6e,
- 0xf3, 0xfb, 0xb7, 0x1f, 0xfe,
- 0xbf, 0x82, 0xc8, 0xf8, 0xd3, 0x7f, 0xf3, 0xfb,
- 0xff, 0xef, 0x87, 0x87, 0xd0, 0x70, 0x8b, 0xff,
- 0xf3, 0xff, 0xef, 0xef, 0x87,
- 0xff, 0xff, 0xff, 0xff, 0x47, 0xff, 0xf3, 0xff,
- 0x7f, 0xff, 0xff, 0xff, 0xdf, 0x7f, 0xcb, 0xef,
- 0xf2, 0xf7, 0xff, 0xff, 0xff,
- 0xff, 0xf7, 0xef, 0xf2, 0xf7, 0xff, 0xf7, 0xff,
- 0xff, 0xff, 0xf7, 0xef, 0xdf, 0xf7, 0xca, 0x7f,
- 0xf3, 0xf7, 0xef, 0xff, 0xf6,
- 0xff, 0xfa, 0xfb, 0xff, 0xe7, 0xff, 0xf7, 0xff,
- 0xff, 0xef, 0xff, 0xf7, 0x57, 0x7f, 0xca, 0xef,
- 0xf3, 0xff, 0xff, 0xef, 0xef,
- 0xff, 0xf6, 0xeb, 0xfa, 0xf7, 0xff, 0xf7, 0x8f,
- 0xff, 0xe3, 0xf7, 0xef, 0xd7, 0xf7, 0xcb, 0x7f,
- 0xf3, 0x8f, 0x6c, 0xf2, 0xe7,
- 0xff, 0xff, 0x2f, 0xff, 0xf1, 0x9d, 0x9e, 0xf4,
- 0xff, 0xff, 0xff, 0xef, 0x0f, 0xff, 0xf1, 0x09,
- 0x3f, 0xf9, 0xbf, 0xf7, 0xfb,
- 0xff, 0xef, 0x7f, 0xf6, 0xfb, 0xf5, 0x0f, 0xdf,
- 0x00, 0xff, 0xd0, 0xbf, 0xc0, 0xbf, 0xf9, 0xff,
- 0x8f, 0x7f, 0x81, 0x6f, 0xe1,
- 0xff, 0xff, 0x9e, 0xaf, 0xf7, 0x0f, 0x18, 0xd9,
- 0xbf, 0x6f, 0x37, 0xef, 0x8f, 0xff, 0x9e, 0x06,
- 0x75, 0xf7, 0xf6, 0xff, 0xef,
- 0x7f, 0xf7, 0xcf, 0xbb, 0xfb, 0x6d, 0xfb, 0xef,
- 0x7d, 0xe9, 0xff, 0xff, 0xbf, 0xc2, 0xf7, 0x6f,
- 0xff, 0xdc, 0xff, 0xf3, 0xfa,
- 0x7f, 0x6f, 0xf7, 0xf9, 0xff, 0x6d, 0xfe, 0x9c,
- 0xbf, 0xbf, 0x7d, 0xe2, 0x7f, 0x77, 0x9f, 0xcd,
- 0xb7, 0xb5, 0xff, 0xff, 0x7f,
- 0x7f, 0xff, 0x87, 0xae, 0x86, 0xdf, 0xc0, 0xfd,
- 0xfb, 0xfa, 0xff, 0xff, 0x8e, 0x6d, 0xd5, 0x3d,
- 0xf1, 0xff, 0xfe, 0xef, 0xff,
- 0xff, 0x3f, 0xd2, 0xa4, 0xfe, 0xd9, 0xf7, 0xfe,
- 0xdf, 0xff, 0xcb, 0xff, 0xdd, 0x7e, 0xbb, 0xdd,
- 0x5f, 0xf7, 0xbf, 0xff, 0xed,
- 0xff, 0xfe, 0xf5, 0xff, 0xb7, 0xf6, 0xb4, 0xae,
- 0xfe, 0xef, 0xf7, 0xff, 0xff, 0x8f, 0x07, 0x7b,
- 0xfb, 0xff, 0x7f, 0xff, 0xf7,
- 0xff, 0x7b, 0xa3, 0xbf, 0xe3, 0xff, 0xff, 0xf7,
- 0xf7, 0xfd, 0xdf, 0xff, 0x8f, 0x7f, 0x9b, 0xdf,
- 0xfb, 0xef, 0xfe, 0xff, 0x3f,
- 0xff, 0x6f, 0xff, 0x7f, 0xb3, 0x7f, 0xdf, 0xbd,
- 0x78, 0xff, 0xff, 0xff, 0xff, 0x7f, 0xef, 0xff,
- 0xdf, 0xee, 0x9d, 0xfd, 0xef,
- 0xff, 0xf8, 0x05, 0x8e, 0xb0, 0x58, 0xf7, 0xfc,
- 0xa4, 0x85, 0xdd, 0xbc, 0x0b, 0x05, 0x61, 0xf8,
- 0xb7, 0xff, 0xeb, 0xef, 0x7f,
- 0xbf, 0xff, 0xc7, 0xbb, 0xd8, 0x6f, 0x79, 0xde,
- 0xff, 0xff, 0xcf, 0xff, 0xba, 0xaf, 0xd9, 0x7b,
- 0xfd, 0xff, 0xf5, 0xdf, 0xbf,
- 0xff, 0xff, 0xaf, 0x7f, 0x88, 0x7f, 0xf0, 0xea,
- 0xfe, 0x7f, 0xf2, 0xff, 0xdf, 0xd7, 0x4f, 0x7f,
- 0xe3, 0xde, 0xff, 0xff, 0xf7,
- 0xff, 0x7d, 0x6f, 0x5f, 0xab, 0xff, 0x7a, 0xb6,
- 0xbf, 0x78, 0xdd, 0x7f, 0xde, 0xef, 0x4b, 0x9b,
- 0xeb, 0x7f, 0x76, 0x9f, 0xac,
- 0xff, 0xcf, 0xff, 0xff, 0xb7, 0x7f, 0xae, 0xef,
- 0xdb, 0xef, 0xff, 0xf7, 0xff, 0xfb, 0xe7, 0xfe,
- 0xbf, 0x7e, 0xfb, 0xf7, 0xfb,
- 0xff, 0xff, 0xff, 0xff, 0xcf, 0xbf, 0xff, 0xff,
- 0xf3, 0xff, 0xff, 0xff, 0xff, 0xef, 0xd7, 0xff,
- 0xe9, 0xef, 0xf2, 0xfe, 0xff,
- 0xff, 0xff, 0xff, 0xef, 0xff, 0x8d, 0xaf, 0xf2,
- 0x71, 0xff, 0xfe, 0xff, 0xff, 0x7f, 0xff, 0xcf,
- 0x0f, 0x75, 0xf1, 0xff, 0xff,
- 0x3f, 0x78, 0xbc, 0xfb, 0xfe, 0xff, 0xff, 0xbf,
- 0xf3, 0x0f, 0x3f, 0xc9, 0xe9, 0x7f, 0xf7, 0xdf,
- 0xff, 0xff, 0x57, 0x82, 0x2e,
- 0xff, 0xf8, 0x7f, 0xfb, 0x7a, 0xfb, 0xff, 0xff,
- 0xeb, 0x87, 0x9b, 0xf1, 0xe5, 0x7f, 0x75, 0x7f,
- 0xfe, 0xff, 0xbe, 0x39, 0x79,
- 0xff, 0xcd, 0xbf, 0xfd, 0x7e, 0xff, 0xfb, 0xf4,
- 0xf7, 0xed, 0x6f, 0xf3, 0x6b, 0xf7, 0xd7, 0xbf,
- 0xfe, 0xfd, 0xf7, 0x8f, 0xef,
- 0xff, 0xf8, 0x7a, 0xff, 0xfa, 0xf0, 0xff, 0xff,
- 0xe6, 0x8f, 0x9b, 0xf1, 0xad, 0xbf, 0xf7, 0xfd,
- 0xbf, 0xfd, 0xef, 0x8f, 0x3f,
- 0xbf, 0xff, 0xad, 0xfb, 0xf4, 0xbf, 0xf3, 0x90,
- 0xdd, 0xf0, 0xfa, 0xcf, 0xe7, 0xf2, 0xf7, 0x7f,
- 0xff, 0xad, 0xff, 0xf5, 0xdf,
- 0xff, 0xcb, 0x7b, 0xfa, 0xd2, 0x7f, 0xc7, 0xf3,
- 0xa9, 0xf7, 0xe7, 0x8b, 0xe7, 0xf1, 0xf7, 0x3f,
- 0x8f, 0x7f, 0xb0, 0xdf, 0xfd,
- 0x7f, 0xf8, 0xff, 0xfb, 0xf2, 0xff, 0xd2, 0xe3,
- 0xdf, 0x87, 0xd3, 0xf0, 0xed, 0xff, 0xf7, 0x7f,
- 0xff, 0xef, 0x77, 0xaa, 0x7f,
- 0xbf, 0xea, 0xfc, 0xfb, 0xb3, 0xbf, 0xb3, 0xff,
- 0xd8, 0x93, 0xab, 0xf1, 0xac, 0xff, 0xf7, 0x3f,
- 0xaf, 0xef, 0xed, 0xc7, 0xad,
- 0xff, 0xd6, 0xff, 0xfd, 0xff, 0xdf, 0xff, 0xf4,
- 0x8f, 0xbf, 0xb1, 0xed, 0xf5, 0xfb, 0xff, 0xef,
- 0xff, 0xf5, 0x8f, 0xdf, 0xf1,
- 0xff, 0xf8, 0xfe, 0xfb, 0xff, 0xdf, 0x9f, 0xf8,
- 0xf0, 0xef, 0xff, 0xd0, 0xfd, 0xf7, 0xff, 0xef,
- 0xaf, 0xf5, 0xf7, 0xce, 0x7f,
- 0x7f, 0x83, 0x7d, 0xfa, 0x8f, 0x5f, 0xd0, 0xcb,
- 0xe9, 0xbb, 0x76, 0x9f, 0x7b, 0xf7, 0x8f, 0x6e,
- 0xb1, 0xd5, 0xf7, 0x5f, 0xc6,
- 0xff, 0xa3, 0x7f, 0xfc, 0xff, 0x7f, 0xff, 0xff,
- 0xdf, 0x9f, 0x7f, 0xa8, 0x77, 0xf5, 0xff, 0xfe,
- 0xff, 0xff, 0xfe, 0x7f, 0x2d,
- 0xff, 0x96, 0xff, 0xfc, 0xff, 0xff, 0xff, 0xff,
- 0x37, 0x6f, 0xfd, 0xaf, 0x77, 0xf8, 0xff, 0xff,
- 0xef, 0xff, 0xff, 0xff, 0x4b,
- 0xff, 0x72, 0xaf, 0xff, 0xe5, 0xdf, 0x99, 0xfc,
- 0x10, 0x63, 0xf0, 0xef, 0xef, 0x7f, 0x8b, 0xef,
- 0xaf, 0xe7, 0xf5, 0xf7, 0x7d,
- 0xff, 0xef, 0x8f, 0xff, 0xa1, 0x4f, 0x81, 0xe7,
- 0xb0, 0xfa, 0xfe, 0xd7, 0xcf, 0xff, 0xca, 0xcf,
- 0x0b, 0x85, 0x71, 0xfa, 0xff,
- 0xff, 0xdd, 0xef, 0xff, 0xa4, 0xdf, 0xb1, 0xdc,
- 0xd3, 0xff, 0xf8, 0xff, 0xcf, 0x7f, 0xcb, 0x7f,
- 0xff, 0xf5, 0xff, 0xbf, 0xfd,
- 0xbf, 0x82, 0xc8, 0xf8, 0xe1, 0x7f, 0xf0, 0xdf,
- 0xff, 0xef, 0x87, 0x87, 0xc0, 0xf0, 0xca, 0x2f,
- 0xfb, 0xff, 0xef, 0xee, 0x97,
- 0xff, 0xff, 0x8f, 0xfa, 0xa5, 0xdf, 0xd1, 0xf7,
- 0x7f, 0xff, 0xff, 0xff, 0xff, 0x77, 0xdb, 0xef,
- 0xff, 0xf5, 0xfd, 0xff, 0xff,
- 0xff, 0xf6, 0x8b, 0xf2, 0x94, 0xff, 0xf1, 0xf7,
- 0xff, 0xff, 0xf7, 0xef, 0xd7, 0xf7, 0xdf, 0xee,
- 0xfb, 0xff, 0xef, 0xff, 0xf7,
- 0xff, 0xf3, 0xcb, 0xff, 0xe6, 0xff, 0xf1, 0xef,
- 0xff, 0xef, 0xff, 0xe7, 0xd7, 0x7f, 0xdb, 0x7e,
- 0xfd, 0xf7, 0xff, 0xef, 0xef,
- 0xff, 0xfe, 0xcf, 0xff, 0xc4, 0xff, 0xf2, 0x9f,
- 0xff, 0xe0, 0xf7, 0xff, 0xdf, 0xff, 0xdf, 0x7f,
- 0xdb, 0xac, 0xef, 0xf1, 0xf7,
- 0x7f, 0xef, 0x0f, 0x5f, 0xb4, 0x8f, 0xff, 0xf6,
- 0xfd, 0xff, 0x6f, 0xff, 0x8f, 0xff, 0xe9, 0x8d,
- 0x7f, 0xf1, 0xd1, 0xf7, 0xfe,
- 0xff, 0xe7, 0x7f, 0x87, 0xfd, 0xe7, 0x8f, 0x9b,
- 0x00, 0xff, 0xb0, 0x7d, 0xfd, 0xcf, 0xfb, 0xfd,
- 0x8f, 0x7f, 0x81, 0x6d, 0xd1,
- 0xff, 0xbc, 0xed, 0xff, 0x86, 0x6e, 0x10, 0xf1,
- 0xf4, 0x5f, 0x7f, 0xfe, 0x9f, 0x37, 0xc3, 0x8f,
- 0xf7, 0xe5, 0xfb, 0xff, 0xff,
- 0x7f, 0xfe, 0xff, 0xfd, 0x97, 0xff, 0xfb, 0xff,
- 0x3f, 0xff, 0xf9, 0xc3, 0x1f, 0xf8, 0xff, 0xb5,
- 0x5f, 0xef, 0xdc, 0xff, 0xbe,
- 0xff, 0xcb, 0xe7, 0xfd, 0x69, 0xe7, 0xfc, 0xb6,
- 0xef, 0x9a, 0x77, 0xb6, 0x67, 0xdf, 0xef, 0xf7,
- 0xfe, 0xdf, 0xff, 0xf5, 0x7f,
- 0xff, 0xf7, 0x97, 0xbe, 0xf4, 0xff, 0xf1, 0xba,
- 0xfe, 0xff, 0x97, 0x7f, 0xbf, 0x77, 0x55, 0xdf,
- 0xd9, 0xf1, 0xff, 0xdf, 0xff,
- 0xbf, 0xbf, 0x72, 0xf2, 0xdd, 0xff, 0xe4, 0xff,
- 0x7f, 0xef, 0xff, 0xf7, 0xfe, 0xfb, 0xb9, 0xff,
- 0xff, 0xf5, 0xff, 0xfb, 0x96,
- 0xff, 0x7f, 0xf7, 0xef, 0x83, 0xf7, 0xf7, 0xff,
- 0xdf, 0xff, 0xf7, 0xfd, 0xd5, 0x9f, 0x0f, 0x7f,
- 0xf0, 0xfb, 0xae, 0xff, 0xec,
- 0xff, 0x7b, 0x85, 0xf7, 0xf3, 0xef, 0xff, 0xf7,
- 0xff, 0xed, 0xff, 0xe7, 0x8f, 0x7f, 0xc7, 0x97,
- 0x3f, 0xfc, 0xff, 0xf7, 0xde,
- 0xff, 0xfd, 0x8b, 0xff, 0xf7, 0x1f, 0xfb, 0xff,
- 0x2f, 0xfb, 0xf7, 0xff, 0xbf, 0xff, 0xff, 0x6f,
- 0xf7, 0xf9, 0xe7, 0xff, 0x33,
- 0xff, 0x9e, 0xe7, 0x8b, 0xf0, 0x50, 0xf1, 0xde,
- 0xff, 0x9f, 0x1b, 0x28, 0x1b, 0x8d, 0xb4, 0xe1,
- 0xf5, 0xf3, 0xfe, 0xef, 0xfa,
- 0xff, 0x7f, 0xf6, 0xff, 0xfe, 0x07, 0xec, 0xfb,
- 0x7f, 0xff, 0xfd, 0xff, 0xd6, 0x8f, 0xff, 0xf9,
- 0xff, 0x37, 0x7f, 0xfb, 0xdd,
- 0xff, 0xff, 0xff, 0x63, 0xef, 0xdf, 0xfa, 0xf1,
- 0xff, 0xfc, 0xfe, 0xdf, 0xfb, 0xff, 0x8f, 0x7f,
- 0xf9, 0xeb, 0xef, 0xfd, 0xff,
- 0x7f, 0x7f, 0xfb, 0xe7, 0x9f, 0x9b, 0xe5, 0xcf,
- 0xfd, 0xf7, 0xcf, 0xff, 0xf3, 0xbf, 0x5f, 0x5d,
- 0x67, 0x9f, 0xdf, 0x7f, 0xf9,
- 0xff, 0xff, 0xff, 0x1f, 0xfe, 0xff, 0xf5, 0xdf,
- 0x5f, 0xfb, 0xfb, 0xbf, 0xcf, 0xdf, 0xfb, 0x7f,
- 0xb7, 0xff, 0xfb, 0xff, 0xf7,
- 0x3f, 0x78, 0xfc, 0xf3, 0xff, 0xff, 0xdf, 0xbf,
- 0xf3, 0x05, 0x3f, 0xc1, 0xf1, 0xff, 0xf7, 0xef,
- 0xef, 0xff, 0xfb, 0x97, 0x1f,
- 0xff, 0xd8, 0x7f, 0xfb, 0x7b, 0xfb, 0xf7, 0xbf,
- 0xbb, 0x8e, 0xd3, 0xe1, 0xff, 0xfd, 0xf7, 0xed,
- 0xfe, 0x8b, 0x5e, 0x0f, 0x69,
- 0xbf, 0xf8, 0xfc, 0xfb, 0x7b, 0xff, 0xdf, 0xed,
- 0xf7, 0x8f, 0xbf, 0xce, 0xfe, 0xff, 0xf3, 0xff,
- 0xf6, 0xff, 0xfe, 0x8f, 0x0f,
- 0xff, 0xfc, 0x7d, 0xff, 0xff, 0xfd, 0xf3, 0xff,
- 0xbf, 0x8f, 0xe3, 0xf0, 0xfe, 0xff, 0xfb, 0xff,
- 0xff, 0xff, 0xae, 0x0f, 0x5d,
- 0xff, 0xff, 0xff, 0xf3, 0xff, 0xff, 0xff, 0xd1,
- 0xfd, 0xf1, 0xd3, 0xdd, 0xfd, 0xf1, 0xfb, 0xff,
- 0xfb, 0xfd, 0xff, 0xfd, 0xf6,
- 0xff, 0xff, 0x7f, 0xfe, 0xfd, 0xff, 0x87, 0xff,
- 0xcc, 0xf3, 0xdf, 0xcb, 0xff, 0xfb, 0xfb, 0xff,
- 0x8b, 0x7f, 0xfa, 0xff, 0xff,
- 0x7f, 0xf8, 0xfe, 0xff, 0xef, 0xff, 0xff, 0xff,
- 0xff, 0x8f, 0xff, 0xe8, 0xff, 0xff, 0xf9, 0xff,
- 0xfb, 0xaf, 0x7f, 0x8f, 0x7e,
- 0xbf, 0xfb, 0x78, 0xff, 0xff, 0xff, 0xd7, 0xd3,
- 0xfd, 0xc3, 0x95, 0xc5, 0xf8, 0xff, 0xfb, 0xff,
- 0xfb, 0xff, 0xfc, 0xf2, 0x8f,
- 0xff, 0x8b, 0x7b, 0xff, 0xff, 0xdf, 0xff, 0xfd,
- 0x8f, 0xef, 0xf4, 0xb7, 0xff, 0xfe, 0xff, 0xfe,
- 0xff, 0xff, 0x8f, 0x6f, 0xf4,
- 0xff, 0xfd, 0xff, 0xfe, 0xff, 0xdf, 0xdf, 0xfd,
- 0xf1, 0xb3, 0xff, 0xd8, 0xff, 0xfd, 0xff, 0xff,
- 0xff, 0xfd, 0xf5, 0x87, 0x7f,
- 0x3f, 0xef, 0xff, 0xff, 0x8f, 0x5f, 0xf0, 0xff,
- 0xf1, 0xef, 0x39, 0xc7, 0x7e, 0xf3, 0x8f, 0x7e,
- 0xf1, 0xbd, 0xed, 0xfa, 0x9a,
- 0xff, 0x98, 0x7f, 0xfa, 0xff, 0x7f, 0xff, 0xff,
- 0xf3, 0x8f, 0x5f, 0x8a, 0xfb, 0xf1, 0xff, 0xff,
- 0xff, 0xff, 0xf7, 0xaf, 0x5f,
- 0xff, 0x86, 0xff, 0xfc, 0xff, 0xff, 0xdf, 0xff,
- 0x7f, 0xbf, 0xcb, 0xbd, 0x77, 0xf2, 0xff, 0xfe,
- 0xff, 0xff, 0xff, 0xbf, 0x77,
- 0xff, 0xff, 0xef, 0xff, 0xed, 0xdf, 0xff, 0xdd,
- 0x11, 0x73, 0xfc, 0xfc, 0xef, 0xff, 0xfb, 0xff,
- 0xfd, 0xfd, 0x9d, 0xf3, 0xff,
- 0xff, 0xf9, 0xef, 0xff, 0xf3, 0x0f, 0x83, 0x9e,
- 0xf0, 0xf0, 0xff, 0xed, 0xef, 0xff, 0xe9, 0x8e,
- 0x7b, 0x9d, 0x70, 0xe9, 0xf7,
- 0xff, 0xff, 0xef, 0xff, 0xef, 0xff, 0xf3, 0xf9,
- 0xf7, 0xff, 0xfb, 0xf3, 0xef, 0xfd, 0xeb, 0xfe,
- 0xff, 0xff, 0xff, 0xff, 0xf8,
- 0x3f, 0x87, 0xec, 0xf8, 0xe5, 0x7f, 0xfb, 0xff,
- 0xff, 0xff, 0x8f, 0x87, 0xe8, 0xf0, 0xeb, 0xff,
- 0xff, 0xfd, 0xff, 0xff, 0x97,
- 0xff, 0xff, 0xef, 0xff, 0xed, 0xdf, 0xd3, 0xbf,
- 0x7f, 0xfe, 0xff, 0xff, 0xef, 0xff, 0xe3, 0xef,
- 0xff, 0xff, 0xff, 0xfe, 0xff,
- 0xff, 0x77, 0xef, 0xfa, 0xe7, 0xff, 0xfb, 0xff,
- 0xff, 0xff, 0xef, 0xef, 0xef, 0xf7, 0xea, 0xfe,
- 0xf3, 0xff, 0xff, 0xff, 0xfe,
- 0xff, 0xf7, 0xeb, 0xf3, 0xef, 0xff, 0xf3, 0xff,
- 0xf1, 0x7f, 0xff, 0xe7, 0xe7, 0xf7, 0xea, 0xee,
- 0xf7, 0xff, 0xf1, 0xff, 0xe7,
- 0xff, 0xfb, 0x6f, 0xf6, 0xe5, 0xff, 0xeb, 0xdf,
- 0xef, 0xff, 0xff, 0xf7, 0xef, 0xff, 0xe3, 0xef,
- 0xff, 0xfe, 0xff, 0xfe, 0xf7,
- 0x7f, 0xff, 0x4f, 0x5f, 0xe1, 0xc7, 0xef, 0xf1,
- 0xfe, 0x7f, 0x7b, 0xff, 0x6f, 0xff, 0x93, 0x0b,
- 0x7f, 0xf1, 0xfa, 0xdf, 0xff,
- 0xff, 0xfb, 0x7f, 0xdf, 0xf7, 0xef, 0x8f, 0xff,
- 0x00, 0xef, 0xf0, 0xdf, 0x7f, 0xef, 0xff, 0xfb,
- 0x8f, 0x7f, 0x81, 0x6f, 0xd1,
- 0xff, 0xde, 0xff, 0xef, 0xb9, 0x49, 0x74, 0xf3,
- 0xef, 0x7b, 0x7f, 0xff, 0xeb, 0xf7, 0x85, 0x67,
- 0xf1, 0xf0, 0xe1, 0xff, 0xf7,
- 0x3f, 0xab, 0xff, 0xc4, 0xbb, 0xff, 0x8c, 0x9d,
- 0x7e, 0x3a, 0xb5, 0xbb, 0xe3, 0xfb, 0xf3, 0xcd,
- 0xe3, 0xff, 0xff, 0xff, 0xfe,
- 0xff, 0xdc, 0xf7, 0xf8, 0x77, 0x8f, 0xf7, 0xfe,
- 0x9f, 0x97, 0x7a, 0xf2, 0x7f, 0xfb, 0x8f, 0x1f,
- 0x7d, 0xfd, 0xef, 0xb1, 0x7d,
- 0xff, 0xef, 0xa6, 0xef, 0x98, 0x9d, 0xf0, 0xf4,
- 0xf4, 0xff, 0xff, 0x7f, 0x8f, 0x7f, 0x89, 0x7f,
- 0xe7, 0xff, 0xff, 0xf7, 0xfb,
- 0xbf, 0xa7, 0xb7, 0xdf, 0xba, 0xfd, 0xfe, 0xeb,
- 0xff, 0xff, 0xc4, 0xef, 0x8f, 0x7c, 0xf7, 0x8f,
- 0x7f, 0xf9, 0xfb, 0xff, 0xfb,
- 0xff, 0xff, 0xff, 0xeb, 0x87, 0xfd, 0xf4, 0xf7,
- 0x6f, 0xff, 0xbf, 0xff, 0xff, 0xef, 0xef, 0xdf,
- 0xff, 0xff, 0xff, 0xf7, 0xff,
- 0xff, 0xf7, 0x85, 0xdb, 0xf2, 0xbf, 0xd7, 0xff,
- 0xff, 0xfd, 0xff, 0xff, 0x8f, 0x7f, 0xf1, 0xaf,
- 0x7d, 0xff, 0xf7, 0xeb, 0xff,
- 0xbf, 0xfd, 0x8f, 0xff, 0xfa, 0x3f, 0xff, 0xf6,
- 0xb7, 0xff, 0xfe, 0xfb, 0x8f, 0x7f, 0xff, 0xff,
- 0xf3, 0xee, 0xbf, 0x7f, 0xff,
- 0xff, 0x67, 0xc6, 0xaf, 0xc3, 0x74, 0xf7, 0xfe,
- 0xee, 0x8a, 0x37, 0x6e, 0xec, 0x87, 0x71, 0x91,
- 0x13, 0x7d, 0xec, 0x87, 0xff,
- 0xbf, 0x7b, 0xf0, 0xef, 0xfb, 0x3f, 0xb7, 0xfc,
- 0xff, 0xff, 0x97, 0x7d, 0xe8, 0xef, 0x9d, 0x77,
- 0xfd, 0xfb, 0xff, 0xfb, 0xbf,
- 0xff, 0xff, 0xde, 0x77, 0xcd, 0xff, 0xf1, 0xfb,
- 0xff, 0xff, 0xf9, 0xe3, 0xff, 0xff, 0xef, 0xff,
- 0xff, 0xfc, 0xcf, 0xff, 0xf3,
- 0x7f, 0xff, 0xfe, 0x77, 0xaf, 0xf7, 0xf8, 0xef,
- 0xff, 0x76, 0xfa, 0xff, 0x99, 0x6d, 0x9f, 0x6f,
- 0xf1, 0xbf, 0x7f, 0x7f, 0xfc,
- 0xff, 0xff, 0xef, 0xbf, 0xeb, 0xfa, 0xdd, 0xef,
- 0xbc, 0xfd, 0xfd, 0xdf, 0xff, 0xf7, 0xff, 0xff,
- 0xd1, 0xfe, 0xff, 0xfb, 0xff,
- 0x3f, 0x70, 0xf8, 0xff, 0xf5, 0xff, 0xff, 0x9f,
- 0xf3, 0x09, 0x1f, 0xe1, 0xf3, 0xfd, 0xfd, 0xff,
- 0xef, 0xff, 0xf7, 0x8e, 0x1e,
- 0xff, 0xf8, 0x7f, 0xff, 0x77, 0xff, 0xff, 0x9b,
- 0x8f, 0x8e, 0xfb, 0xf1, 0xef, 0xe5, 0xfd, 0xef,
- 0xfe, 0x9f, 0x16, 0x03, 0x61,
- 0xbf, 0xf8, 0xfa, 0xfd, 0x73, 0xff, 0xff, 0xf7,
- 0xf7, 0x8d, 0x9f, 0xe1, 0xf1, 0xff, 0xef, 0xff,
- 0xfc, 0xff, 0xff, 0x8f, 0x0f,
- 0xff, 0xf8, 0x7f, 0xff, 0xf7, 0xf7, 0xfd, 0xff,
- 0x9f, 0x8f, 0xe1, 0xf1, 0xef, 0xff, 0xff, 0xff,
- 0xfd, 0xff, 0x8e, 0x0f, 0x7d,
- 0xff, 0xf7, 0xf9, 0xfe, 0xf3, 0x7f, 0xff, 0xf7,
- 0xf7, 0xf3, 0xfd, 0xef, 0xff, 0xf9, 0xed, 0xff,
- 0xff, 0xef, 0xff, 0xf7, 0xff,
- 0xff, 0xf7, 0x7e, 0xfe, 0xf7, 0xff, 0x8b, 0xf7,
- 0xfc, 0xeb, 0xeb, 0xed, 0xeb, 0xf9, 0xfd, 0xff,
- 0x8f, 0x7f, 0xf2, 0xfe, 0xed,
- 0x7f, 0xf8, 0xff, 0xff, 0xf7, 0xff, 0xff, 0xf7,
- 0xf7, 0x8d, 0xff, 0xe8, 0xff, 0xfd, 0xef, 0xfe,
- 0xfd, 0xdf, 0xf6, 0x8f, 0x6f,
- 0xbf, 0xff, 0x78, 0xff, 0xf7, 0xff, 0xfb, 0xff,
- 0xff, 0xe3, 0x9f, 0xe5, 0xea, 0xf5, 0xfd, 0xff,
- 0xed, 0xef, 0xff, 0xf7, 0x8f,
- 0xff, 0x07, 0xff, 0xf9, 0xff, 0xff, 0xff, 0xf7,
- 0x8f, 0xff, 0xf3, 0x93, 0xff, 0xff, 0xff, 0xef,
- 0xff, 0xf7, 0x8f, 0x7f, 0xf3,
- 0xff, 0xf8, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xf7, 0x8b, 0xff, 0xe8, 0xfb, 0xff, 0xff, 0xef,
- 0xef, 0xf7, 0xf5, 0x8e, 0x7f,
- 0x3f, 0xec, 0xf9, 0xfc, 0x8f, 0x7f, 0xf0, 0xef,
- 0xef, 0xff, 0x1d, 0xed, 0x7e, 0xfd, 0x8f, 0x6e,
- 0xf1, 0xd7, 0xf7, 0xde, 0x8c,
- 0xff, 0x80, 0x7f, 0xf8, 0xff, 0x7f, 0xff, 0xff,
- 0xfb, 0x8f, 0x6f, 0x90, 0xff, 0xf3, 0xff, 0xff,
- 0xff, 0xff, 0xfe, 0x8f, 0x7f,
- 0xff, 0x87, 0xfb, 0xf8, 0xff, 0xff, 0xff, 0xff,
- 0x7f, 0x9f, 0xff, 0x93, 0x7f, 0xf2, 0xff, 0xfe,
- 0xef, 0xff, 0xff, 0x9f, 0x69,
- 0xff, 0xfb, 0xef, 0xff, 0xf6, 0xff, 0xff, 0xff,
- 0x1f, 0x73, 0xfe, 0xf6, 0xff, 0xff, 0xff, 0xef,
- 0xef, 0xe7, 0x97, 0x77, 0xf7,
- 0xff, 0xff, 0xff, 0xff, 0xe7, 0x1f, 0x86, 0x95,
- 0xf0, 0xf6, 0xf7, 0xff, 0xff, 0xff, 0xfe, 0x8f,
- 0x6d, 0x93, 0x71, 0xf8, 0xfd,
- 0xff, 0xfe, 0xef, 0xfd, 0xf2, 0xff, 0xf6, 0xff,
- 0x6f, 0xef, 0xf7, 0xfd, 0xff, 0xff, 0xfd, 0xff,
- 0xfd, 0xff, 0xef, 0xff, 0xf5,
- 0x3f, 0x82, 0xf8, 0xf8, 0xe6, 0x7f, 0xf2, 0xff,
- 0xff, 0xff, 0x87, 0x87, 0xf0, 0xf0, 0xfc, 0xef,
- 0xfd, 0xf7, 0xef, 0xee, 0x87,
- 0xff, 0xff, 0xef, 0xff, 0xe7, 0xff, 0xf6, 0xf7,
- 0x7f, 0xfd, 0xff, 0xff, 0xff, 0xff, 0xff, 0xef,
- 0xff, 0xf7, 0xff, 0xff, 0xff,
- 0xff, 0xf7, 0xff, 0xf2, 0xe6, 0xff, 0xf5, 0xf7,
- 0xff, 0xff, 0xff, 0xe7, 0xff, 0xf7, 0xff, 0xfe,
- 0xff, 0xf7, 0xef, 0xff, 0xf7,
- 0xff, 0xfa, 0xeb, 0xff, 0xe3, 0xff, 0xf5, 0xff,
- 0xff, 0xff, 0xf7, 0xef, 0xf7, 0xff, 0xfd, 0xee,
- 0xfd, 0xff, 0xff, 0xef, 0xef,
- 0xff, 0xf6, 0xfb, 0x7a, 0xe7, 0xff, 0x91, 0xef,
- 0xff, 0xe2, 0xff, 0xf7, 0xf7, 0xf7, 0xfd, 0xff,
- 0xfd, 0xef, 0xeb, 0xf5, 0xe7,
- 0xff, 0xff, 0x8f, 0xbe, 0xf1, 0x93, 0xfd, 0xf1,
- 0xff, 0xff, 0xff, 0xff, 0x2e, 0x2f, 0x59, 0x8f,
- 0x6f, 0xf9, 0xf7, 0xff, 0xfa,
- 0xff, 0x4f, 0xbf, 0xc4, 0xfb, 0xf5, 0x0f, 0xff,
- 0x00, 0xff, 0xd0, 0x7f, 0x70, 0xaf, 0x7f, 0xff,
- 0x8f, 0x7f, 0x81, 0x7f, 0xb1,
- 0xff, 0xff, 0xda, 0xff, 0x2f, 0x4f, 0x7e, 0xf9,
- 0xfb, 0xff, 0x5f, 0xef, 0xff, 0xff, 0x99, 0x29,
- 0x71, 0xf1, 0xed, 0xff, 0xff,
- 0x3f, 0xb7, 0xef, 0xdf, 0xff, 0xf9, 0xfe, 0xfd,
- 0xff, 0xff, 0xb7, 0x9f, 0xff, 0xab, 0x73, 0xfd,
- 0xad, 0x3c, 0x6b, 0xff, 0xfa,
- 0xff, 0xe8, 0xf7, 0xbf, 0x6f, 0x8f, 0xff, 0xfe,
- 0xff, 0x87, 0x7f, 0xe0, 0x7f, 0xbf, 0x5f, 0x93,
- 0x7e, 0xe4, 0xf6, 0x97, 0x7b,
- 0xff, 0xdf, 0x27, 0xaf, 0xa7, 0xff, 0xf4, 0xf6,
- 0xff, 0xff, 0xff, 0x5f, 0xdf, 0xfb, 0x87, 0x1f,
- 0x70, 0xf3, 0xfe, 0x7f, 0xfb,
- 0xbf, 0xb7, 0x61, 0xb5, 0xfc, 0xff, 0xf7, 0xff,
- 0xbf, 0xff, 0xa2, 0xff, 0xd8, 0xa1, 0x77, 0xdf,
- 0xe6, 0xff, 0xff, 0x7e, 0xc4,
- 0xff, 0xff, 0xf6, 0xd7, 0x97, 0xdb, 0xe8, 0xff,
- 0xff, 0xff, 0xfd, 0xff, 0xff, 0xff, 0xb9, 0x3b,
- 0xf8, 0xff, 0xef, 0xe7, 0xbe,
- 0xff, 0xff, 0x86, 0xbf, 0xe2, 0xad, 0xff, 0xff,
- 0xff, 0xff, 0x9f, 0xff, 0x8f, 0x3f, 0x63, 0xcf,
- 0x7b, 0xfe, 0xff, 0xfd, 0xfe,
- 0xff, 0xff, 0xdf, 0xff, 0xba, 0x7f, 0xf7, 0xee,
- 0x17, 0xf7, 0xee, 0xef, 0x97, 0x7f, 0xf7, 0xff,
- 0xff, 0xfd, 0x9e, 0x77, 0xf3,
- 0xff, 0xfb, 0xc3, 0x8f, 0xc1, 0x70, 0x71, 0xff,
- 0xf7, 0x9f, 0x77, 0x7e, 0xb6, 0x4f, 0xb9, 0x01,
- 0x1f, 0x1b, 0x7a, 0x9a, 0x7e,
- 0xbf, 0xff, 0xf0, 0x9f, 0xef, 0x79, 0x3f, 0xf6,
- 0xff, 0xfd, 0x9d, 0x7b, 0xf2, 0xff, 0xc9, 0xf3,
- 0xff, 0x7d, 0xfb, 0xfd, 0xbf,
- 0xff, 0xfd, 0xbf, 0x77, 0x8f, 0xff, 0xf1, 0xf7,
- 0xff, 0xff, 0xff, 0xfd, 0xbb, 0x7f, 0xbf, 0x6f,
- 0xf3, 0xfe, 0xff, 0xe7, 0xbf,
- 0x7f, 0xff, 0xff, 0x5f, 0xaf, 0xf1, 0xfc, 0xf7,
- 0xff, 0x77, 0xfe, 0xff, 0xdf, 0xff, 0xdf, 0xff,
- 0xe3, 0x9e, 0x7f, 0x7a, 0xe3,
- 0xff, 0xff, 0x6f, 0xff, 0xaf, 0xfc, 0xff, 0xff,
- 0xfe, 0xfe, 0xfe, 0xff, 0xff, 0xff, 0xf3, 0xfb,
- 0xf7, 0xff, 0xf9, 0xfe, 0xff,
- 0x3f, 0x70, 0xf8, 0xff, 0xf7, 0xff, 0xff, 0xff,
- 0xff, 0x0f, 0x0f, 0xf1, 0xf1, 0xff, 0xf7, 0xff,
- 0xef, 0xff, 0xf7, 0x8c, 0x1e,
- 0xff, 0xf8, 0x7f, 0xff, 0x7f, 0xf7, 0xff, 0x8f,
- 0x8f, 0x88, 0xf1, 0xf1, 0xef, 0xff, 0xf7, 0xff,
- 0xee, 0x97, 0x1e, 0x01, 0x61,
- 0xbf, 0xf0, 0xfa, 0xfd, 0x75, 0xff, 0xf5, 0xff,
- 0xff, 0x8f, 0x9f, 0xe1, 0xf1, 0xff, 0xf7, 0xef,
- 0xfe, 0xff, 0xff, 0x8f, 0x1f,
- 0xff, 0xfa, 0x7f, 0xff, 0xfd, 0xff, 0xfd, 0xff,
- 0x9f, 0x9f, 0xf9, 0xf9, 0xff, 0xef, 0xf7, 0xff,
- 0xff, 0xff, 0x9e, 0x0f, 0x75,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xf7,
- 0xff, 0xf7, 0xf7, 0xff, 0xef, 0xf7, 0xe7, 0xef,
- 0xef, 0xef, 0xff, 0xff, 0xef,
- 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff, 0x8f, 0xff,
- 0xf8, 0xf7, 0xff, 0xf7, 0xff, 0xf7, 0xe7, 0xef,
- 0x9f, 0x6f, 0xf0, 0xff, 0xff,
- 0x7f, 0xf8, 0xff, 0xff, 0xfd, 0xff, 0xfd, 0x8f,
- 0xff, 0x8f, 0xff, 0xf0, 0xff, 0xff, 0xf7, 0xef,
- 0xf7, 0xff, 0xff, 0x9d, 0x7e,
- 0xbf, 0xff, 0x78, 0xff, 0xfd, 0xff, 0xfd, 0xf7,
- 0xff, 0xf7, 0x8f, 0xf7, 0xf0, 0xf7, 0xf7, 0xff,
- 0xf7, 0xef, 0xfe, 0xe7, 0x9f,
- 0xff, 0x8f, 0x7f, 0xf8, 0xff, 0xff, 0xff, 0xff,
- 0x8f, 0xff, 0xf8, 0x8f, 0xff, 0xf8, 0xff, 0xef,
- 0xff, 0xff, 0x8e, 0x6f, 0xe1,
- 0xff, 0xf8, 0x7f, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xf7, 0x87, 0xff, 0xf0, 0xff, 0xff, 0xff, 0xff,
- 0xef, 0xef, 0xff, 0x9f, 0x7f,
- 0x3f, 0xff, 0xf8, 0xff, 0x8f, 0x7f, 0xf0, 0x9f,
- 0xf7, 0xfb, 0x07, 0xe7, 0x78, 0xf7, 0x8f, 0x7e,
- 0xf1, 0x9f, 0x7f, 0xff, 0x9e,
- 0xff, 0x80, 0x7f, 0xf8, 0xff, 0x7f, 0xff, 0xff,
- 0xf7, 0x8f, 0x6f, 0x80, 0xff, 0xf1, 0xff, 0xff,
- 0xef, 0xff, 0xfe, 0x9f, 0x7f,
- 0xff, 0x88, 0xff, 0xf8, 0xff, 0xff, 0xff, 0xff,
- 0x7f, 0x9f, 0xef, 0x81, 0x7f, 0xf0, 0xff, 0xfe,
- 0xff, 0xff, 0xef, 0x9f, 0x7f,
- 0xff, 0x7f, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0x97, 0x77, 0xf8, 0xff, 0xef, 0xff, 0xf7, 0xff,
- 0xef, 0xef, 0x8f, 0x76, 0xf1,
- 0xff, 0xff, 0xff, 0xff, 0xf7, 0x0f, 0xf7, 0x88,
- 0xf7, 0xf0, 0xff, 0xff, 0xef, 0xff, 0xef, 0x8e,
- 0x07, 0x99, 0x61, 0xe1, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xf7, 0xf7,
- 0xff, 0xff, 0xf7, 0xf7, 0xef, 0xff, 0xe7, 0xee,
- 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xbf, 0x87, 0xf8, 0xf8, 0xff, 0x7f, 0xf7, 0xff,
- 0xff, 0xff, 0x8f, 0x8f, 0xe0, 0xf0, 0xef, 0xff,
- 0xf7, 0xff, 0xff, 0xff, 0x8f,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xf7, 0xff,
- 0x7f, 0xff, 0xff, 0xff, 0xef, 0xff, 0xe7, 0xff,
- 0xf6, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xf7, 0xff, 0xff, 0xf7, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xef, 0xff, 0xef, 0xff,
- 0xf7, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xf7, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0x6f, 0xff, 0xe7, 0xff,
- 0xf7, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff, 0xf7, 0xff,
- 0xff, 0xf7, 0xff, 0xff, 0xef, 0xff, 0xef, 0xff,
- 0x97, 0xee, 0xf9, 0xf7, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0x80, 0x88, 0xff, 0xf8,
- 0xff, 0xff, 0xf7, 0xff, 0x0f, 0x1f, 0x79, 0x9b,
- 0x7f, 0xf0, 0xfe, 0xff, 0xff,
- 0xff, 0x4f, 0x7b, 0xf7, 0xf7, 0xf8, 0x0f, 0xff,
- 0x00, 0xff, 0xd0, 0x4f, 0x75, 0x8c, 0x79, 0xff,
- 0x8f, 0x7f, 0x81, 0x7e, 0xb1,
- 0xff, 0xf7, 0xff, 0xfe, 0x8f, 0x7f, 0x70, 0xf0,
- 0xff, 0xf7, 0x7f, 0xff, 0xf7, 0xff, 0x84, 0x0e,
- 0x73, 0xff, 0xf7, 0xff, 0xff,
- 0x3f, 0xbd, 0xfd, 0xfb, 0xf7, 0xe8, 0xff, 0xff,
- 0x78, 0xf0, 0x3f, 0xbf, 0xe3, 0x9b, 0x6f, 0xff,
- 0x97, 0x1f, 0x7f, 0xcf, 0xfe,
- 0xff, 0xf8, 0xf7, 0xff, 0x8f, 0x80, 0xff, 0xf8,
- 0xff, 0x8f, 0x78, 0xf0, 0x7f, 0x9f, 0x7f, 0x9b,
- 0x7f, 0xf1, 0xff, 0x97, 0x7f,
- 0xff, 0xff, 0x07, 0xff, 0x87, 0x7f, 0xf0, 0xf8,
- 0xff, 0x7f, 0xfb, 0x7f, 0xee, 0xfb, 0x99, 0x19,
- 0x73, 0xef, 0xf7, 0xef, 0xff,
- 0xbf, 0x87, 0x04, 0xfc, 0xff, 0x08, 0xf7, 0xff,
- 0x7b, 0x7f, 0x8e, 0x8f, 0xf9, 0x98, 0x6f, 0xf3,
- 0xff, 0xef, 0xff, 0xff, 0xdf,
- 0xff, 0xff, 0x73, 0xff, 0xf7, 0x9f, 0xf8, 0xfb,
- 0x7f, 0xff, 0xff, 0xff, 0xff, 0xff, 0x8f, 0x3d,
- 0x61, 0xff, 0xef, 0xff, 0xff,
- 0xff, 0x7f, 0x07, 0xff, 0xf8, 0x78, 0xff, 0xee,
- 0xfb, 0xff, 0xff, 0xff, 0x87, 0x1f, 0x71, 0xe3,
- 0xff, 0xfb, 0xff, 0xff, 0xff,
- 0xff, 0x77, 0x8b, 0x7f, 0xf8, 0x7f, 0xff, 0xff,
- 0x07, 0xe7, 0xfa, 0x77, 0x8f, 0x7f, 0xff, 0xef,
- 0xf1, 0xef, 0x9f, 0x77, 0xf9,
- 0xff, 0xf8, 0x73, 0x8f, 0xf8, 0x0f, 0x88, 0x88,
- 0xf8, 0x98, 0x77, 0x78, 0x8f, 0x6f, 0x87, 0x7b,
- 0xf7, 0xff, 0xef, 0x87, 0x6f,
- 0xbf, 0x7f, 0xf0, 0xff, 0x8f, 0x7f, 0xff, 0xff,
- 0x7e, 0xff, 0x9f, 0x7f, 0xf0, 0xff, 0xff, 0xeb,
- 0xef, 0xff, 0xfb, 0xff, 0x9f,
- 0xff, 0xff, 0xff, 0x77, 0xf8, 0x7f, 0xf8, 0xf7,
- 0xff, 0x7f, 0xf7, 0xff, 0x9f, 0x7f, 0x9b, 0x6f,
- 0xf1, 0xfe, 0xff, 0xfe, 0xff,
- 0x7f, 0x7f, 0x8f, 0xff, 0x8f, 0xff, 0x7f, 0x8f,
- 0xff, 0x70, 0xfb, 0x6f, 0xff, 0xff, 0xff, 0xf5,
- 0xf9, 0xff, 0xff, 0xff, 0xf4,
- 0xff, 0x87, 0xff, 0x74, 0xff, 0x7f, 0xff, 0xff,
- 0x7e, 0xff, 0xff, 0x8f, 0xff, 0xf1, 0xff, 0xff,
- 0xe9, 0xff, 0xf7, 0xff, 0xff,
- 0xbf, 0x78, 0xf8, 0x7f, 0xf7, 0xff, 0xff, 0xff,
- 0xf7, 0x07, 0x1f, 0xe1, 0xf1, 0xff, 0xf7, 0xff,
- 0xef, 0xef, 0xff, 0x8e, 0x0f,
- 0xff, 0xf8, 0x7f, 0xff, 0xff, 0xff, 0xff, 0x87,
- 0x9f, 0x88, 0xf1, 0xe1, 0xff, 0xef, 0xf7, 0xef,
- 0xfe, 0x9f, 0x0f, 0x09, 0x71,
- 0xbf, 0xf0, 0xf8, 0xff, 0x77, 0xff, 0xff, 0xff,
- 0xff, 0x8f, 0x8f, 0xf0, 0xf0, 0xff, 0xf7, 0xff,
- 0xfe, 0xf7, 0xff, 0x8e, 0x1f,
- 0x7f, 0xf8, 0x7f, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0x8f, 0x8f, 0xf9, 0xf8, 0xfe, 0xff, 0xe7, 0xf7,
- 0xff, 0xff, 0x96, 0x0f, 0x61,
- 0x7f, 0xff, 0xff, 0xff, 0xf7, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xf7, 0xef, 0xff, 0xf7, 0xe7, 0xef,
- 0xff, 0xe7, 0xff, 0xf7, 0xfe,
- 0xff, 0xf7, 0x7f, 0xff, 0xff, 0xff, 0x8f, 0xff,
- 0xf8, 0xef, 0xef, 0xef, 0xff, 0xf7, 0xf7, 0xff,
- 0x9f, 0x67, 0xf0, 0xff, 0xff,
- 0x7f, 0xfc, 0xff, 0xff, 0xff, 0xff, 0xff, 0x8f,
- 0xff, 0x8f, 0xff, 0xe0, 0xf7, 0xff, 0xf7, 0xfe,
- 0xf7, 0xf7, 0xff, 0x8f, 0x6e,
- 0x3f, 0xfb, 0x7c, 0xff, 0xff, 0xff, 0xf7, 0xff,
- 0xff, 0xe7, 0x9f, 0xef, 0xf0, 0xff, 0xe7, 0xef,
- 0xf7, 0xef, 0xf6, 0xf6, 0x87,
- 0xff, 0x07, 0xff, 0xf8, 0xff, 0xff, 0xff, 0xff,
- 0x8f, 0xff, 0xf4, 0x9f, 0xff, 0xfc, 0xff, 0xff,
- 0xff, 0xff, 0x8f, 0x7f, 0xf0,
- 0x7f, 0xfc, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xf7, 0x87, 0xff, 0xe8, 0xff, 0xf7, 0xff, 0xff,
- 0xef, 0xe7, 0xf7, 0x8f, 0x6f,
- 0x3f, 0xff, 0xfc, 0xff, 0x8f, 0x7f, 0xf0, 0xcf,
- 0xef, 0xe8, 0x1b, 0xef, 0x7c, 0xff, 0x8f, 0x7e,
- 0xe1, 0x97, 0x77, 0xff, 0x9e,
- 0xff, 0x80, 0x7f, 0xfc, 0xff, 0x7f, 0xff, 0xff,
- 0xf7, 0x8f, 0x7f, 0x80, 0xff, 0xf1, 0xff, 0xfe,
- 0xef, 0xff, 0xff, 0x9f, 0x7f,
- 0xff, 0x84, 0xff, 0xf8, 0xff, 0xff, 0xff, 0xff,
- 0x6f, 0x9f, 0xff, 0x91, 0x7f, 0xf0, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0x8f, 0x7f,
- 0xff, 0xfb, 0xff, 0xff, 0xfb, 0xff, 0xff, 0xff,
- 0x1f, 0x77, 0xf8, 0xf7, 0xef, 0xff, 0xf7, 0xff,
- 0xf7, 0xef, 0x87, 0x67, 0xf1,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0x0f, 0x8b, 0x8c,
- 0xf0, 0xf8, 0xf7, 0xff, 0xef, 0xff, 0xe7, 0x9e,
- 0x67, 0x89, 0x77, 0xf1, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xf3, 0xff, 0xff, 0xff,
- 0xff, 0xef, 0xfb, 0xff, 0xef, 0xff, 0xe7, 0xff,
- 0xf7, 0xf7, 0xff, 0xff, 0xf7,
- 0xbf, 0x87, 0xf8, 0xf8, 0xf7, 0x7f, 0xfb, 0xff,
- 0xff, 0xff, 0x8f, 0x8f, 0xe0, 0xf0, 0xe7, 0xfe,
- 0xf7, 0xff, 0xff, 0xff, 0x8e,
- 0xff, 0xff, 0xff, 0xff, 0xfb, 0xff, 0xfb, 0xff,
- 0x7f, 0xff, 0xff, 0xff, 0xff, 0xff, 0xef, 0xff,
- 0xf7, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xf7, 0xfb, 0xff, 0xfb, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfe, 0xff,
- 0xf7, 0xff, 0xff, 0xff, 0xfe,
- 0xff, 0xff, 0xff, 0xff, 0xf3, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfe, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0x7f, 0xf7, 0xff, 0x8b, 0xff,
- 0xfc, 0xf3, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xee, 0xff, 0xf6, 0xff,
- 0xff, 0xf7, 0x8f, 0xbf, 0xf9, 0x8f, 0xff, 0xf0,
- 0xff, 0xff, 0x7f, 0xff, 0x1f, 0x1f, 0x71, 0x89,
- 0x7f, 0xf1, 0xff, 0xff, 0xff,
- 0xff, 0x4f, 0xb8, 0xc6, 0xfb, 0xfd, 0x0f, 0xff,
- 0x00, 0xff, 0xd0, 0x7f, 0x79, 0x90, 0x7f, 0xf9,
- 0x8f, 0x7f, 0x81, 0x7f, 0x81,
- 0xff, 0xff, 0xcf, 0xff, 0xb0, 0x4f, 0x77, 0xf4,
- 0xff, 0xff, 0x7f, 0xe7, 0xee, 0xff, 0x97, 0x07,
- 0x69, 0xf1, 0xf7, 0xff, 0xff,
- 0x3f, 0xba, 0xff, 0x4d, 0xfe, 0xe5, 0xff, 0xff,
- 0x7f, 0xef, 0xbf, 0x9f, 0xe7, 0x9f, 0x77, 0xe9,
- 0x9f, 0x1f, 0x79, 0xc1, 0xfe,
- 0xff, 0xf8, 0xf7, 0x3f, 0xff, 0x9f, 0xf7, 0xf8,
- 0xff, 0x87, 0x7f, 0xf0, 0x7f, 0x97, 0x7f, 0x89,
- 0x7e, 0xf1, 0xff, 0x9f, 0x7f,
- 0xff, 0xff, 0x37, 0xbf, 0xb3, 0x7f, 0xf2, 0xff,
- 0xff, 0xf7, 0xff, 0x7f, 0x7b, 0xfe, 0x87, 0x1f,
- 0x71, 0xf1, 0xff, 0x7f, 0xfb,
- 0xff, 0xff, 0x70, 0xb7, 0xfe, 0x7b, 0xff, 0xf3,
- 0xbf, 0xf7, 0xff, 0xff, 0xf9, 0x9f, 0x7f, 0xf1,
- 0xff, 0xf7, 0xff, 0xff, 0xfb,
- 0xbf, 0xff, 0xf4, 0xcf, 0x87, 0xd8, 0xf8, 0xf8,
- 0xff, 0xff, 0x8f, 0xff, 0xe9, 0xff, 0x8f, 0x1f,
- 0x71, 0xff, 0xef, 0xff, 0x8d,
- 0xff, 0xff, 0x87, 0xbf, 0xf9, 0x3f, 0xff, 0xf7,
- 0xff, 0xff, 0xff, 0xff, 0x9f, 0x1f, 0x71, 0xf9,
- 0xff, 0x7b, 0xff, 0xfe, 0xff,
- 0xff, 0xff, 0xcb, 0xff, 0xbd, 0x7f, 0xfb, 0xff,
- 0x8f, 0xff, 0xf8, 0x7f, 0x9f, 0x7f, 0xf1, 0xef,
- 0xff, 0xf7, 0x8f, 0x7f, 0xf9,
- 0xff, 0xf8, 0x43, 0x8f, 0xc4, 0x75, 0x7d, 0xff,
- 0xff, 0x97, 0x7f, 0x78, 0x8f, 0x6f, 0x99, 0x17,
- 0x19, 0x71, 0xf9, 0x8f, 0x6f,
- 0xbf, 0x7f, 0xf0, 0x8f, 0xf6, 0x7d, 0x37, 0xff,
- 0xff, 0xff, 0x9f, 0x7f, 0xe0, 0xff, 0xff, 0xef,
- 0xff, 0xf7, 0xfb, 0xff, 0x8f,
- 0xff, 0xff, 0xbf, 0x77, 0x8e, 0xff, 0xf0, 0xff,
- 0xff, 0xf7, 0xf7, 0x7f, 0x97, 0x7f, 0x99, 0x7f,
- 0xf9, 0xfe, 0xff, 0xfe, 0xff,
- 0x7f, 0xff, 0xff, 0xcf, 0xbf, 0xf9, 0xfa, 0xff,
- 0xff, 0xff, 0xf3, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xf7, 0x8f, 0x7f, 0x71, 0xf6,
- 0xff, 0xff, 0xff, 0x7f, 0xb7, 0xfe, 0xfb, 0xff,
- 0xf6, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xf7,
- 0xff, 0xff, 0xf7, 0xff, 0xff,
- 0x3f, 0x78, 0xf8, 0xff, 0xff, 0xff, 0xff, 0x8f,
- 0xff, 0x08, 0x0f, 0xf1, 0xf1, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0x8e, 0x0e,
- 0xff, 0xf8, 0x7f, 0xff, 0x7f, 0xff, 0xff, 0x8f,
- 0x8f, 0x80, 0xf1, 0xf1, 0xff, 0xff, 0xff, 0xff,
- 0xfe, 0x8f, 0x0e, 0x01, 0x71,
- 0xbf, 0xf8, 0xf8, 0xff, 0x7f, 0xff, 0xff, 0xff,
- 0xff, 0x8f, 0x8f, 0xf1, 0xf1, 0xff, 0xff, 0xff,
- 0xfe, 0xff, 0xff, 0x8f, 0x0f,
- 0xff, 0xf8, 0x7f, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0x8f, 0x8f, 0xf1, 0xf1, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0x8e, 0x0f, 0x71,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff, 0x8f, 0xff,
- 0xf0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0x8f, 0x7f, 0xf0, 0xff, 0xff,
- 0x7f, 0xf8, 0xff, 0xff, 0xff, 0xff, 0xff, 0x8f,
- 0xff, 0x88, 0xff, 0xf0, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0x8f, 0x7e,
- 0xbf, 0xff, 0x78, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xf7, 0x8f, 0xf7, 0xf0, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xfe, 0xff, 0x8f,
- 0xff, 0x87, 0x7f, 0xf8, 0xff, 0xff, 0xff, 0xff,
- 0x8f, 0xff, 0xf8, 0x8f, 0xf7, 0xf8, 0xff, 0xff,
- 0xff, 0xff, 0x8e, 0x7f, 0xf1,
- 0xff, 0xf8, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0x87, 0xff, 0xf0, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0x8f, 0x7f,
- 0x3f, 0xff, 0xf8, 0xff, 0x8f, 0x7f, 0xf0, 0xdf,
- 0xff, 0xf6, 0x07, 0xff, 0x78, 0xff, 0x8f, 0x7e,
- 0xf1, 0x9f, 0x7f, 0xfd, 0x8e,
- 0xff, 0x80, 0x7f, 0xf8, 0xff, 0x7f, 0xff, 0xff,
- 0xf7, 0x8f, 0x7f, 0x80, 0xff, 0xf1, 0xff, 0xff,
- 0xff, 0xff, 0xfe, 0x8f, 0x7f,
- 0xff, 0x80, 0xff, 0xf8, 0xff, 0xff, 0xff, 0xff,
- 0x7f, 0x8f, 0xff, 0x81, 0x7f, 0xf0, 0xff, 0xfe,
- 0xff, 0xff, 0xff, 0x8f, 0x7f,
- 0xff, 0x7f, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0x8f, 0x77, 0xf0, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0x8f, 0x6e, 0xf1,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0x0f, 0x8f, 0x88,
- 0xf0, 0xf0, 0xff, 0xff, 0xff, 0xff, 0xff, 0x8e,
- 0x7f, 0x81, 0x7f, 0xf1, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0x7f, 0xff, 0xf7, 0xff, 0xff, 0xff, 0xff, 0xfe,
- 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xbf, 0x87, 0xf8, 0xf8, 0xff, 0x7f, 0xff, 0xff,
- 0xff, 0xff, 0x8f, 0x8f, 0xf0, 0xf0, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0x8f,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0x7f, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xf7, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfe,
- 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xf7, 0xff, 0xf7, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfe,
- 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xf7, 0xff, 0x87, 0xff,
- 0xf8, 0xf7, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xfe, 0xfe, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0x3f, 0x8f, 0xf0, 0x85, 0xff, 0xf0,
- 0xff, 0xff, 0xff, 0x7f, 0x0d, 0x0f, 0x71, 0x81,
- 0x7e, 0xf1, 0xfe, 0xff, 0xff,
- 0xff, 0x5f, 0x3d, 0xf0, 0xf5, 0xfa, 0x0f, 0xff,
- 0x00, 0xff, 0x80, 0x0f, 0xf1, 0x88, 0x7f, 0xf1,
- 0x8f, 0x7e, 0x81, 0x7e, 0xc1,
- 0xff, 0xff, 0xff, 0xff, 0xba, 0x4f, 0x75, 0xfa,
- 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff, 0x8f, 0x0f,
- 0x71, 0xf1, 0xff, 0xff, 0xff,
- 0x3f, 0xbf, 0xff, 0xcf, 0xff, 0xfa, 0xff, 0xfe,
- 0x7f, 0xdf, 0x7f, 0xf4, 0xff, 0x8f, 0x7f, 0xf1,
- 0x8f, 0x0f, 0x71, 0xf1, 0xbe,
- 0xff, 0xf8, 0xf7, 0xbb, 0x7f, 0x85, 0xff, 0xf0,
- 0xff, 0x8f, 0x7f, 0xf0, 0x7f, 0x87, 0x7f, 0x81,
- 0x7e, 0xf1, 0x8f, 0x0f, 0x71,
- 0xff, 0xff, 0x87, 0x8f, 0x8d, 0xfd, 0xf5, 0xff,
- 0xfb, 0xff, 0xff, 0xff, 0xf7, 0xfe, 0x8f, 0x0f,
- 0x71, 0xf1, 0xfe, 0x7f, 0xf7,
- 0xbf, 0x07, 0xc0, 0xbf, 0xf7, 0xfd, 0xff, 0xff,
- 0xbf, 0xff, 0x85, 0x8f, 0xf9, 0x8f, 0x7f, 0xf1,
- 0xff, 0x7f, 0xf6, 0xff, 0x83,
- 0xff, 0xff, 0xf4, 0xff, 0x8f, 0xda, 0xf0, 0xb6,
- 0xdf, 0xfd, 0xf6, 0xff, 0xf9, 0xff, 0x8f, 0x1f,
- 0x71, 0xfd, 0x8f, 0x7b, 0xfd,
- 0xff, 0xff, 0xb7, 0x8f, 0xf0, 0xbd, 0xff, 0xfd,
- 0xf7, 0xff, 0xff, 0xff, 0x8f, 0x0f, 0x71, 0xf1,
- 0xff, 0x7b, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xba, 0x7f, 0xf5, 0xf7,
- 0x0f, 0xf7, 0xf0, 0x7f, 0x87, 0x7f, 0xf1, 0xff,
- 0xff, 0xfe, 0x8f, 0x7f, 0xf1,
- 0xff, 0xf8, 0x47, 0x8f, 0xca, 0x70, 0x7a, 0xff,
- 0xff, 0x8f, 0x7f, 0x70, 0x8f, 0x7f, 0x81, 0x0e,
- 0x01, 0x01, 0x71, 0x81, 0x7f,
- 0xbf, 0x7f, 0xf0, 0x8f, 0xff, 0x70, 0x3f, 0xff,
- 0xfd, 0xfe, 0x8f, 0x7f, 0xf0, 0xff, 0xff, 0xff,
- 0xff, 0xfe, 0xfb, 0xff, 0x8f,
- 0xff, 0xff, 0xbf, 0x7f, 0x85, 0x7f, 0xf0, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0x8f, 0x7f, 0x81, 0x7f,
- 0x81, 0xfe, 0xf1, 0xff, 0xff,
- 0x7f, 0xff, 0xff, 0xcf, 0x87, 0xfa, 0x75, 0xff,
- 0xff, 0x7f, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0x8f, 0x7f, 0x70, 0xfe,
- 0xff, 0x87, 0xff, 0x4b, 0xbf, 0x7f, 0xfd, 0xff,
- 0xff, 0xff, 0xff, 0x8f, 0xff, 0xff, 0xff, 0xfe,
- 0xff, 0xfe, 0xff, 0xfe, 0xff,
- 0x3f, 0x78, 0xf8, 0xf7, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0x8f, 0x0f, 0x71, 0xf1, 0xff, 0x7f, 0xff,
- 0xff, 0xff, 0xff, 0x8e, 0x0e,
- 0xff, 0xf8, 0x7f, 0xff, 0x7f, 0xff, 0x7f, 0x8f,
- 0x8f, 0x00, 0x71, 0xf1, 0xff, 0xff, 0xff, 0xff,
- 0xfe, 0x8f, 0x0e, 0x01, 0x71,
- 0xbf, 0xf8, 0xf8, 0xff, 0x7f, 0xff, 0x7f, 0xff,
- 0xff, 0x8f, 0x0f, 0x71, 0xf1, 0xff, 0xff, 0xff,
- 0xfe, 0xff, 0xff, 0x8f, 0x0f,
- 0xff, 0xf8, 0x7f, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0x8f, 0x0f, 0x71, 0xf1, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0x8e, 0x0f, 0x71,
- 0xff, 0xff, 0xff, 0xf7, 0xff, 0xff, 0x7f, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfe,
- 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0x7f, 0xff, 0xff, 0x7f, 0x8f, 0xff,
- 0xf0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0x8f, 0x7f, 0xf0, 0xff, 0xff,
- 0x7f, 0xf8, 0xff, 0xff, 0xff, 0x7f, 0x7f, 0xff,
- 0xff, 0x8f, 0xff, 0xf0, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0x8f, 0x7e,
- 0xbf, 0xff, 0x78, 0xff, 0xff, 0xff, 0x7f, 0xff,
- 0xff, 0xff, 0x8f, 0xff, 0xf0, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xfe, 0xff, 0x8f,
- 0xff, 0x07, 0xff, 0xf8, 0xff, 0xff, 0xff, 0xff,
- 0x8f, 0xff, 0xf0, 0x8f, 0xff, 0xf0, 0xff, 0xff,
- 0xff, 0xff, 0x8e, 0x7f, 0xf1,
- 0xff, 0xf8, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0x8f, 0xff, 0xf0, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0x8f, 0x7f,
- 0x3f, 0xff, 0xf8, 0xff, 0x8f, 0x7f, 0xf0, 0x8f,
- 0xff, 0xfc, 0x8f, 0xff, 0xf0, 0xff, 0x8f, 0x7e,
- 0xf1, 0x8f, 0x7f, 0xf3, 0x8e,
- 0xff, 0x80, 0x7f, 0xf8, 0xff, 0x7f, 0xff, 0xff,
- 0xff, 0x8f, 0x7f, 0x80, 0x7f, 0xf1, 0xff, 0xff,
- 0xff, 0xff, 0xfe, 0x8f, 0x7f,
- 0xff, 0x80, 0xff, 0xf8, 0xff, 0xff, 0xff, 0xff,
- 0x7f, 0x8f, 0x7f, 0x81, 0x7f, 0xf0, 0xff, 0xfe,
- 0xff, 0xff, 0xff, 0x8f, 0x7f,
- 0xff, 0x7f, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0x8f, 0x7f, 0xf0, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0x8f, 0x7f, 0xf1,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0x0f, 0xff, 0x80,
- 0xff, 0xf0, 0xff, 0xff, 0xff, 0xff, 0xfe, 0x8e,
- 0x0f, 0x01, 0x71, 0xf0, 0xff,
- 0xff, 0xf7, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xef, 0xff, 0xfb, 0xff, 0xff, 0xff, 0xff, 0xfe,
- 0xff, 0xff, 0xff, 0xff, 0xf7,
- 0xbf, 0x87, 0xf8, 0xf8, 0xff, 0x7f, 0xff, 0xff,
- 0x7f, 0x7f, 0x8f, 0x8f, 0xf0, 0xf0, 0xfe, 0xff,
- 0xff, 0xff, 0xff, 0xfe, 0x8f,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0x7f, 0xff, 0x7f,
- 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0x7f, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0x7f, 0xff, 0x7e,
- 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0x7f, 0xff, 0xff, 0xff, 0x7f, 0xff, 0x7e,
- 0xff, 0xff, 0x7f, 0xff, 0xff,
- 0xff, 0xff, 0x7f, 0xff, 0x7f, 0xff, 0xff, 0xff,
- 0x7f, 0x7f, 0xff, 0xff, 0xff, 0x7f, 0xff, 0x7f,
- 0x8f, 0xfe, 0xf0, 0xff, 0xff,
- 0xbf, 0xff, 0x0e, 0x8f, 0x70, 0x80, 0xff, 0xf0,
- 0xff, 0xff, 0xff, 0xff, 0x0f, 0x7f, 0xf1, 0x0f,
- 0x7f, 0xf1, 0xfe, 0xff, 0x9f,
- 0xbf, 0x1f, 0xfb, 0x0c, 0xff, 0xf0, 0x8f, 0xff,
- 0x00, 0xff, 0xb0, 0x3f, 0x71, 0x80, 0xff, 0xf1,
- 0x8f, 0x7f, 0x81, 0x7e, 0xc1,
- 0xff, 0xff, 0xff, 0x7f, 0x8f, 0x0f, 0x70, 0xf0,
- 0x8f, 0x7f, 0x70, 0xcf, 0x8f, 0xff, 0x71, 0x0f,
- 0x7e, 0xf1, 0x8f, 0x7f, 0xf1,
- 0x7f, 0xff, 0x7f, 0x0f, 0xff, 0x78, 0x8f, 0x8f,
- 0x70, 0x70, 0x7f, 0xfe, 0xff, 0x8f, 0xff, 0x70,
- 0xff, 0xfe, 0xff, 0xff, 0xbe,
- 0xff, 0xf8, 0xf7, 0x0b, 0xf7, 0x88, 0xf7, 0xf0,
- 0x8f, 0x8f, 0x70, 0xf0, 0x7e, 0x73, 0xff, 0x8f,
- 0x7e, 0xf0, 0xff, 0x8f, 0x7f,
- 0xff, 0x78, 0x77, 0xff, 0x8f, 0x8f, 0xf0, 0xf0,
- 0xff, 0x8f, 0x77, 0x70, 0x77, 0x7f, 0xff, 0x7f,
- 0xff, 0xff, 0xfe, 0x8f, 0x7f,
- 0xff, 0xff, 0x77, 0x8f, 0xff, 0xf0, 0xff, 0xff,
- 0x77, 0x7f, 0xfb, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xef, 0x7f, 0xff, 0xbf,
- 0xbf, 0xff, 0x74, 0xff, 0xff, 0x8f, 0xff, 0xfc,
- 0x0f, 0xf3, 0x8c, 0xff, 0xfd, 0xff, 0xff, 0x8f,
- 0x7f, 0xf1, 0x8f, 0x7d, 0x83,
- 0xff, 0x7f, 0x77, 0xff, 0xff, 0xff, 0xff, 0xfb,
- 0xf7, 0x7f, 0xf7, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0x78, 0xff, 0x7f, 0xff, 0xff, 0xff, 0xff,
- 0x0f, 0x8f, 0x70, 0x70, 0xf7, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0x8e, 0x0f, 0x71,
- 0xff, 0xf8, 0xf7, 0x7f, 0xff, 0x8f, 0x8f, 0x80,
- 0x80, 0x81, 0x70, 0x70, 0x7f, 0xff, 0xff, 0xff,
- 0xff, 0x6f, 0x8f, 0x0f, 0x71,
- 0xbf, 0x7f, 0xf0, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0x7b, 0xff, 0x9f, 0xff, 0x70, 0xff, 0xff, 0xff,
- 0xff, 0x7f, 0xff, 0xfe, 0x8f,
- 0xff, 0x87, 0x7f, 0x78, 0xfe, 0xff, 0x9e, 0xff,
- 0xf2, 0x7f, 0xff, 0x0f, 0xff, 0xf0, 0xff, 0xef,
- 0xff, 0x7f, 0xff, 0xff, 0xff,
- 0x7f, 0x7f, 0xff, 0x7f, 0xff, 0xff, 0xfe, 0x8f,
- 0xff, 0x70, 0xff, 0x7f, 0xff, 0xff, 0xdf, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xfe,
- 0xff, 0xff, 0x7f, 0xf7, 0xff, 0xfe, 0xff, 0xff,
- 0xff, 0x7f, 0xff, 0xff, 0xff, 0xff, 0xdf, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0x7f, 0x7f, 0x8f, 0x8f, 0xf0, 0xf0,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xfd, 0xaf, 0x0f,
- 0x70, 0xd1, 0xff, 0xf8, 0xfe,
- 0xff, 0xff, 0xff, 0xf7, 0xaf, 0x8f, 0xfa, 0xf0,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0x9f, 0x8f, 0x0f,
- 0x79, 0xe1, 0xff, 0xfe, 0xff,
- 0xbf, 0xff, 0xff, 0x7a, 0x8f, 0xff, 0xf0, 0xef,
- 0xff, 0xfb, 0xff, 0xaf, 0xff, 0xfb, 0x8f, 0x7f,
- 0xf1, 0xdf, 0xff, 0xf9, 0xff,
- 0xbf, 0xff, 0xff, 0xf7, 0xff, 0xaf, 0xff, 0xba,
- 0xaf, 0xff, 0xfb, 0xff, 0xff, 0xff, 0xef, 0xdf,
- 0xff, 0xfd, 0xbe, 0xf7, 0xf5,
- 0xff, 0xf8, 0xff, 0xff, 0x8f, 0xff, 0xf0, 0xff,
- 0xff, 0x8f, 0xf7, 0xf0, 0xff, 0xff, 0x8f, 0x3f,
- 0x11, 0xeb, 0xdb, 0xcf, 0x7f,
- 0xbf, 0xf0, 0x8f, 0x87, 0xf0, 0xf0, 0xff, 0xbf,
- 0xff, 0x8f, 0xff, 0xf1, 0x8f, 0x0f, 0x31, 0xf1,
- 0x9f, 0xdf, 0xf9, 0x85, 0x7f,
- 0xbf, 0xff, 0x8f, 0x7f, 0xf0, 0xff, 0xff, 0xff,
- 0xee, 0xff, 0xfb, 0xf7, 0x8f, 0x7f, 0xb1, 0xff,
- 0xff, 0xff, 0xff, 0xdf, 0xfd,
- 0xff, 0xff, 0xff, 0x8f, 0x8f, 0xf0, 0x80, 0xff,
- 0xf0, 0xff, 0xff, 0xff, 0xff, 0x8f, 0x2f, 0x71,
- 0xc1, 0x7f, 0xf1, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0x8f, 0xff, 0xf0, 0xff, 0xbf,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0x8f, 0x7f, 0xd1,
- 0x9f, 0xff, 0x7b, 0xb7, 0xff,
- 0xbf, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xfe, 0x8f, 0xff, 0xf1, 0xff, 0xff,
- 0xff, 0xff, 0xbf, 0xb7, 0xff,
- 0xff, 0xa4, 0xf7, 0x88, 0xff, 0xf0, 0xaf, 0xbf,
- 0xfb, 0xef, 0xff, 0xf7, 0xff, 0x8f, 0x7f, 0xf1,
- 0xff, 0xdd, 0xf7, 0x97, 0x7f,
- 0xff, 0xff, 0xf7, 0xff, 0x8f, 0xff, 0xf0, 0xff,
- 0xfe, 0xff, 0xff, 0xff, 0xff, 0xff, 0x8f, 0x7f,
- 0xf1, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xf7, 0xaf, 0x0f, 0xa0, 0xf0,
- 0xfb, 0xff, 0xff, 0xff, 0xff, 0xff, 0x8f, 0x0f,
- 0x71, 0xb1, 0x37, 0xf7, 0xff,
- 0xff, 0xb8, 0xff, 0xff, 0xff, 0x7f, 0xff, 0xff,
- 0xff, 0x8f, 0xff, 0xf0, 0xfe, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0x8f, 0x7f,
- 0xbf, 0xff, 0xf8, 0xf7, 0xff, 0xa7, 0xff, 0xf0,
- 0xff, 0xff, 0x8f, 0xfe, 0xf0, 0xff, 0xff, 0x8f,
- 0x7f, 0xf1, 0xff, 0xff, 0xcf,
- 0xff, 0xff, 0xf7, 0x9f, 0xf7, 0xf3, 0xff, 0xff,
- 0xff, 0xff, 0x7f, 0xff, 0xff, 0xbf, 0x7f, 0xf9,
- 0xff, 0xfe, 0xff, 0xff, 0xdf,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0x7f, 0xff, 0x7f,
- 0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xbf, 0xbf,
- 0xff, 0xff, 0xff, 0xaf, 0xff, 0xf0, 0xff, 0xff,
- 0x9f, 0xfe, 0xf1, 0xff, 0xff, 0xcf, 0x7f, 0xf1,
- 0xff, 0xff, 0xdf, 0xff, 0xf1,
- 0xbf, 0xff, 0xf0, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0x8f, 0xff, 0xf0, 0xbf, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0x6f,
- 0xff, 0xff, 0xf7, 0xff, 0xff, 0xff, 0xff, 0x7f,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xbf,
- 0xff, 0xf8, 0xff, 0xff, 0xdf, 0xff, 0xff, 0xff,
- 0xff, 0x8f, 0xff, 0xf1, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xcf, 0xff,
- 0xff, 0xd8, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0x8f, 0xef, 0xe0, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0x8f, 0x3f,
- 0xff, 0xdf, 0xf7, 0xff, 0x0f, 0xfe, 0xf0, 0xff,
- 0xff, 0xff, 0xff, 0xef, 0xff, 0xdf, 0x8e, 0x7f,
- 0xf1, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xf7, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xfe, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xbf, 0xbf, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0x8f, 0xff, 0xf1, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xef, 0xff, 0xbf, 0x7f, 0xe1, 0xff,
- 0xdf, 0xff, 0x7f, 0xff, 0xbf,
- 0xff, 0xa7, 0xff, 0x88, 0xff, 0xf1, 0xfe, 0xff,
- 0xff, 0xff, 0xff, 0x1f, 0xff, 0xf0, 0xcf, 0xb1,
- 0xff, 0xef, 0xff, 0x7f, 0xff,
diff --git a/board/sixnet/sixnet.c b/board/sixnet/sixnet.c
deleted file mode 100644
index 867589f918..0000000000
--- a/board/sixnet/sixnet.c
+++ /dev/null
@@ -1,603 +0,0 @@
-/*
- * (C) Copyright 2001, 2002
- * Dave Ellis, SIXNET, dge@sixnetio.com.
- * Based on code by:
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- * and other contributors to U-Boot. See file CREDITS for list
- * of people who contributed to this project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <config.h>
-#include <jffs2/jffs2.h>
-#include <mpc8xx.h>
-#include <net.h> /* for eth_init() */
-#include <rtc.h>
-#include "sixnet.h"
-#ifdef CONFIG_SHOW_BOOT_PROGRESS
-# include <status_led.h>
-#endif
-
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
-#include <linux/mtd/nand.h>
-extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
-#endif
-
-#define ORMASK(size) ((-size) & OR_AM_MSK)
-
-static long ram_size(ulong *, long);
-
-/* ------------------------------------------------------------------------- */
-
-#ifdef CONFIG_SHOW_BOOT_PROGRESS
-void show_boot_progress (int status)
-{
-#if defined(CONFIG_STATUS_LED)
-# if defined(STATUS_LED_BOOT)
- if (status == 15) {
- /* ready to transfer to kernel, make sure LED is proper state */
- status_led_set(STATUS_LED_BOOT, CONFIG_BOOT_LED_STATE);
- }
-# endif /* STATUS_LED_BOOT */
-#endif /* CONFIG_STATUS_LED */
-}
-#endif
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Check Board Identity:
- * returns 0 if recognized, -1 if unknown
- */
-
-int checkboard (void)
-{
- puts ("Board: SIXNET SXNI855T\n");
- return 0;
-}
-
-/* ------------------------------------------------------------------------- */
-
-#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
-#error "SXNI855T has no PCMCIA port"
-#endif /* CFG_CMD_PCMCIA */
-
-/* ------------------------------------------------------------------------- */
-
-#define _not_used_ 0xffffffff
-
-/* UPMB table for dual UART. */
-
-/* this table is for 50MHz operation, it should work at all lower speeds */
-const uint duart_table[] =
-{
- /* single read. (offset 0 in upm RAM) */
- 0xfffffc04, 0x0ffffc04, 0x0ff3fc04, 0x0ff3fc04,
- 0x0ff3fc00, 0x0ff3fc04, 0xfffffc04, 0xfffffc05,
-
- /* burst read. (offset 8 in upm RAM) */
- _not_used_, _not_used_, _not_used_, _not_used_,
- _not_used_, _not_used_, _not_used_, _not_used_,
- _not_used_, _not_used_, _not_used_, _not_used_,
- _not_used_, _not_used_, _not_used_, _not_used_,
-
- /* single write. (offset 18 in upm RAM) */
- 0xfffffc04, 0x0ffffc04, 0x00fffc04, 0x00fffc04,
- 0x00fffc04, 0x00fffc00, 0xfffffc04, 0xfffffc05,
-
- /* burst write. (offset 20 in upm RAM) */
- _not_used_, _not_used_, _not_used_, _not_used_,
- _not_used_, _not_used_, _not_used_, _not_used_,
- _not_used_, _not_used_, _not_used_, _not_used_,
- _not_used_, _not_used_, _not_used_, _not_used_,
-
- /* refresh. (offset 30 in upm RAM) */
- _not_used_, _not_used_, _not_used_, _not_used_,
- _not_used_, _not_used_, _not_used_, _not_used_,
- _not_used_, _not_used_, _not_used_, _not_used_,
-
- /* exception. (offset 3c in upm RAM) */
- _not_used_, _not_used_, _not_used_, _not_used_,
-};
-
-/* Load FPGA very early in boot sequence, since it must be
- * loaded before the 16C2550 serial channels can be used as
- * console channels.
- *
- * Note: Much of the configuration is not complete. The
- * stack is in DPRAM since SDRAM has not been initialized,
- * so the stack must be kept small. Global variables
- * are still in FLASH, so they cannot be written.
- * Only the FLASH, DPRAM, immap and FPGA can be addressed,
- * the other chip selects may not have been initialized.
- * The clocks have been initialized, so udelay() can be
- * used.
- */
-#define FPGA_DONE 0x0080 /* PA8, input, high when FPGA load complete */
-#define FPGA_PROGRAM_L 0x0040 /* PA9, output, low to reset, high to start */
-#define FPGA_INIT_L 0x0020 /* PA10, input, low indicates not ready */
-#define fpga (*(volatile unsigned char *)(CFG_FPGA_PROG)) /* FPGA port */
-
-int board_postclk_init (void)
-{
-
- /* the data to load to the XCSxxXL FPGA */
- static const unsigned char fpgadata[] = {
-# include "fpgadata.c"
- };
-
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
-#define porta (immap->im_ioport.iop_padat)
- const unsigned char* pdata;
-
- /* /INITFPGA and DONEFPGA signals are inputs */
- immap->im_ioport.iop_padir &= ~(FPGA_INIT_L | FPGA_DONE);
-
- /* Force output pin to begin at 0, /PROGRAM asserted (0) resets FPGA */
- porta &= ~FPGA_PROGRAM_L;
-
- /* Set FPGA as an output */
- immap->im_ioport.iop_padir |= FPGA_PROGRAM_L;
-
- /* delay a little to make sure FPGA sees it, really
- * only need less than a microsecond.
- */
- udelay(10);
-
- /* unassert /PROGRAM */
- porta |= FPGA_PROGRAM_L;
-
- /* delay while FPGA does last erase, indicated by
- * /INITFPGA going high. This should happen within a
- * few milliseconds.
- */
- /* ### FIXME - a timeout check would be good, maybe flash
- * the status LED to indicate the error?
- */
- while ((porta & FPGA_INIT_L) == 0)
- ; /* waiting */
-
- /* write program data to FPGA at the programming address
- * so extra /CS1 strobes at end of configuration don't actually
- * write to any registers.
- */
- fpga = 0xff; /* first write is ignored */
- fpga = 0xff; /* fill byte */
- fpga = 0xff; /* fill byte */
- fpga = 0x4f; /* preamble code */
- fpga = 0x80; fpga = 0xaf; fpga = 0x9b; /* length (ignored) */
- fpga = 0x4b; /* field check code */
-
- pdata = fpgadata;
- /* while no error write out each of the 28 byte frames */
- while ((porta & (FPGA_INIT_L | FPGA_DONE)) == FPGA_INIT_L
- && pdata < fpgadata + sizeof(fpgadata)) {
-
- fpga = 0x4f; /* preamble code */
-
- /* 21 bytes of data in a frame */
- fpga = *(pdata++); fpga = *(pdata++);
- fpga = *(pdata++); fpga = *(pdata++);
- fpga = *(pdata++); fpga = *(pdata++);
- fpga = *(pdata++); fpga = *(pdata++);
- fpga = *(pdata++); fpga = *(pdata++);
- fpga = *(pdata++); fpga = *(pdata++);
- fpga = *(pdata++); fpga = *(pdata++);
- fpga = *(pdata++); fpga = *(pdata++);
- fpga = *(pdata++); fpga = *(pdata++);
- fpga = *(pdata++); fpga = *(pdata++);
- fpga = *(pdata++);
-
- fpga = 0x4b; /* field check code */
- fpga = 0xff; /* extended write cycle */
- fpga = 0x4b; /* extended write cycle
- * (actually 0x4b from bitgen.exe)
- */
- fpga = 0xff; /* extended write cycle */
- fpga = 0xff; /* extended write cycle */
- fpga = 0xff; /* extended write cycle */
- }
-
- fpga = 0xff; /* startup byte */
- fpga = 0xff; /* startup byte */
- fpga = 0xff; /* startup byte */
- fpga = 0xff; /* startup byte */
-
-#if 0 /* ### FIXME */
- /* If didn't load all the data or FPGA_DONE is low the load failed.
- * Maybe someday stop here and flash the status LED? The console
- * is not configured, so can't print an error message. Can't write
- * global variables to set a flag (except gd?).
- * For now it must work.
- */
-#endif
-
- /* Now that the FPGA is loaded, set up the Dual UART chip
- * selects. Must be done here since it may be used as the console.
- */
- upmconfig(UPMB, (uint *)duart_table, sizeof(duart_table)/sizeof(uint));
-
- memctl->memc_mbmr = DUART_MBMR;
- memctl->memc_or5 = DUART_OR_VALUE;
- memctl->memc_br5 = DUART_BR5_VALUE;
- memctl->memc_or6 = DUART_OR_VALUE;
- memctl->memc_br6 = DUART_BR6_VALUE;
-
- return (0);
-}
-
-/* ------------------------------------------------------------------------- */
-
-/* base address for SRAM, assume 32-bit port, valid */
-#define NVRAM_BR_VALUE (CFG_SRAM_BASE | BR_PS_32 | BR_V)
-
-/* up to 64MB - will be adjusted for actual size */
-#define NVRAM_OR_PRELIM (ORMASK(CFG_SRAM_SIZE) \
- | OR_CSNT_SAM | OR_ACS_DIV4 | OR_BI | OR_SCY_5_CLK | OR_EHTR)
-/*
- * Miscellaneous platform dependent initializations after running in RAM.
- */
-
-int misc_init_r (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- char* s;
- char* e;
- int reg;
- bd_t *bd = gd->bd;
-
- memctl->memc_or2 = NVRAM_OR_PRELIM;
- memctl->memc_br2 = NVRAM_BR_VALUE;
-
- /* Is there any SRAM? Is it 16 or 32 bits wide? */
-
- /* First look for 32-bit SRAM */
- bd->bi_sramsize = ram_size((ulong*)CFG_SRAM_BASE, CFG_SRAM_SIZE);
-
- if (bd->bi_sramsize == 0) {
- /* no 32-bit SRAM, but there could be 16-bit SRAM since
- * it would report size 0 when configured for 32-bit bus.
- * Try again with a 16-bit bus.
- */
- memctl->memc_br2 |= BR_PS_16;
- bd->bi_sramsize = ram_size((ulong*)CFG_SRAM_BASE, CFG_SRAM_SIZE);
- }
-
- if (bd->bi_sramsize == 0) {
- memctl->memc_br2 = 0; /* disable select since nothing there */
- }
- else {
- /* adjust or2 for actual size of SRAM */
- memctl->memc_or2 |= ORMASK(bd->bi_sramsize);
- bd->bi_sramstart = CFG_SRAM_BASE;
- printf("SRAM: %lu KB\n", bd->bi_sramsize >> 10);
- }
-
-
- /* set standard MPC8xx clock so kernel will see the time
- * even if it doesn't have a DS1306 clock driver.
- * This helps with experimenting with standard kernels.
- */
- {
- ulong tim;
- struct rtc_time tmp;
-
- rtc_get(&tmp); /* get time from DS1306 RTC */
-
- /* convert to seconds since 1970 */
- tim = mktime(tmp.tm_year, tmp.tm_mon, tmp.tm_mday,
- tmp.tm_hour, tmp.tm_min, tmp.tm_sec);
-
- immap->im_sitk.sitk_rtck = KAPWR_KEY;
- immap->im_sit.sit_rtc = tim;
- }
-
- /* set up ethernet address for SCC ethernet. If eth1addr
- * is present it gets a unique address, otherwise it
- * shares the FEC address.
- */
- s = getenv("eth1addr");
- if (s == NULL)
- s = getenv("ethaddr");
- for (reg=0; reg<6; ++reg) {
- bd->bi_enet1addr[reg] = s ? simple_strtoul(s, &e, 16) : 0;
- if (s)
- s = (*e) ? e+1 : e;
- }
-
- return (0);
-}
-
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
-void nand_init(void)
-{
- unsigned long totlen = nand_probe(CFG_DFLASH_BASE);
-
- printf ("%4lu MB\n", totlen >> 20);
-}
-#endif
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Check memory range for valid RAM. A simple memory test determines
- * the actually available RAM size between addresses `base' and
- * `base + maxsize'.
- *
- * The memory size MUST be a power of 2 for this to work.
- *
- * The only memory modified is 8 bytes at offset 0. This is important
- * since for the SRAM this location is reserved for autosizing, so if
- * it is modified and the board is reset before ram_size() completes
- * no damage is done. Normally even the memory at 0 is preserved. The
- * higher SRAM addresses may contain battery backed RAM disk data which
- * must never be corrupted.
- */
-
-static long ram_size(ulong *base, long maxsize)
-{
- volatile long *test_addr;
- volatile ulong *base_addr = base;
- ulong ofs; /* byte offset from base_addr */
- ulong save; /* to make test non-destructive */
- ulong save2; /* to make test non-destructive */
- long ramsize = -1; /* size not determined yet */
-
- save = *base_addr; /* save value at 0 so can restore */
- save2 = *(base_addr+1); /* save value at 4 so can restore */
-
- /* is any SRAM present? */
- *base_addr = 0x5555aaaa;
-
- /* It is important to drive the data bus with different data so
- * it doesn't remember the value and look like RAM that isn't there.
- */
- *(base_addr + 1) = 0xaaaa5555; /* use write to modify data bus */
-
- if (*base_addr != 0x5555aaaa)
- ramsize = 0; /* no RAM present, or defective */
- else {
- *base_addr = 0xaaaa5555;
- *(base_addr + 1) = 0x5555aaaa; /* use write to modify data bus */
- if (*base_addr != 0xaaaa5555)
- ramsize = 0; /* no RAM present, or defective */
- }
-
- /* now size it if any is present */
- for (ofs = 4; ofs < maxsize && ramsize < 0; ofs <<= 1) {
- test_addr = (long*)((long)base_addr + ofs); /* location to test */
-
- *base_addr = ~*test_addr;
- if (*base_addr == *test_addr)
- ramsize = ofs; /* wrapped back to 0, so this is the size */
- }
-
- *base_addr = save; /* restore value at 0 */
- *(base_addr+1) = save2; /* restore value at 4 */
- return (ramsize);
-}
-
-/* ------------------------------------------------------------------------- */
-/* sdram table based on the FADS manual */
-/* for chip MB811171622A-100 */
-
-/* this table is for 50MHz operation, it should work at all lower speeds */
-
-const uint sdram_table[] =
-{
- /* single read. (offset 0 in upm RAM) */
- 0x1f07fc04, 0xeeaefc04, 0x11adfc04, 0xefbbbc00,
- 0x1ff77c47,
-
- /* precharge and Mode Register Set initialization (offset 5).
- * This is also entered at offset 6 to do Mode Register Set
- * without the precharge.
- */
- 0x1ff77c34, 0xefeabc34, 0x1fb57c35,
-
- /* burst read. (offset 8 in upm RAM) */
- 0x1f07fc04, 0xeeaefc04, 0x10adfc04, 0xf0affc00,
- 0xf0affc00, 0xf1affc00, 0xefbbbc00, 0x1ff77c47,
- _not_used_, _not_used_, _not_used_, _not_used_,
- _not_used_, _not_used_, _not_used_, _not_used_,
-
- /* single write. (offset 18 in upm RAM) */
- /* FADS had 0x1f27fc04, ...
- * but most other boards have 0x1f07fc04, which
- * sets GPL0 from A11MPC to 0 1/4 clock earlier,
- * like the single read.
- * This seems better so I am going with the change.
- */
- 0x1f07fc04, 0xeeaebc00, 0x01b93c04, 0x1ff77c47,
- _not_used_, _not_used_, _not_used_, _not_used_,
-
- /* burst write. (offset 20 in upm RAM) */
- 0x1f07fc04, 0xeeaebc00, 0x10ad7c00, 0xf0affc00,
- 0xf0affc00, 0xe1bbbc04, 0x1ff77c47, _not_used_,
- _not_used_, _not_used_, _not_used_, _not_used_,
- _not_used_, _not_used_, _not_used_, _not_used_,
-
- /* refresh. (offset 30 in upm RAM) */
- 0x1ff5fc84, 0xfffffc04, 0xfffffc04, 0xfffffc04,
- 0xfffffc84, 0xfffffc07, _not_used_, _not_used_,
- _not_used_, _not_used_, _not_used_, _not_used_,
-
- /* exception. (offset 3c in upm RAM) */
- 0x7ffffc07, _not_used_, _not_used_, _not_used_ };
-
-/* ------------------------------------------------------------------------- */
-
-#define SDRAM_MAX_SIZE 0x10000000 /* max 256 MB SDRAM */
-
-/* precharge and set Mode Register */
-#define SDRAM_MCR_PRE (MCR_OP_RUN | MCR_UPM_A | /* select UPM */ \
- MCR_MB_CS3 | /* chip select */ \
- MCR_MLCF(1) | MCR_MAD(5)) /* 1 time at 0x05 */
-
-/* set Mode Register, no precharge */
-#define SDRAM_MCR_MRS (MCR_OP_RUN | MCR_UPM_A | /* select UPM */ \
- MCR_MB_CS3 | /* chip select */ \
- MCR_MLCF(1) | MCR_MAD(6)) /* 1 time at 0x06 */
-
-/* runs refresh loop twice so get 8 refresh cycles */
-#define SDRAM_MCR_REFR (MCR_OP_RUN | MCR_UPM_A | /* select UPM */ \
- MCR_MB_CS3 | /* chip select */ \
- MCR_MLCF(2) | MCR_MAD(0x30)) /* twice at 0x30 */
-
-/* MAMR values work in either mamr or mbmr */
-#define SDRAM_MAMR_BASE /* refresh at 50MHz */ \
- ((195 << MAMR_PTA_SHIFT) | MAMR_PTAE \
- | MAMR_DSA_1_CYCL /* 1 cycle disable */ \
- | MAMR_RLFA_1X /* Read loop 1 time */ \
- | MAMR_WLFA_1X /* Write loop 1 time */ \
- | MAMR_TLFA_4X) /* Timer loop 4 times */
-/* 8 column SDRAM */
-#define SDRAM_MAMR_8COL (SDRAM_MAMR_BASE \
- | MAMR_AMA_TYPE_0 /* Address MUX 0 */ \
- | MAMR_G0CLA_A11) /* GPL0 A11[MPC] */
-
-/* 9 column SDRAM */
-#define SDRAM_MAMR_9COL (SDRAM_MAMR_BASE \
- | MAMR_AMA_TYPE_1 /* Address MUX 1 */ \
- | MAMR_G0CLA_A10) /* GPL0 A10[MPC] */
-
-/* base address 0, 32-bit port, SDRAM UPM, valid */
-#define SDRAM_BR_VALUE (BR_PS_32 | BR_MS_UPMA | BR_V)
-
-/* up to 256MB, SAM, G5LS - will be adjusted for actual size */
-#define SDRAM_OR_PRELIM (ORMASK(SDRAM_MAX_SIZE) | OR_CSNT_SAM | OR_G5LS)
-
-/* This is the Mode Select Register value for the SDRAM.
- * Burst length: 4
- * Burst Type: sequential
- * CAS Latency: 2
- * Write Burst Length: burst
- */
-#define SDRAM_MODE 0x22 /* CAS latency 2, burst length 4 */
-
-/* ------------------------------------------------------------------------- */
-
-long int initdram(int board_type)
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- uint size_sdram = 0;
- uint size_sdram9 = 0;
- uint base = 0; /* SDRAM must start at 0 */
- int i;
-
- upmconfig(UPMA, (uint *)sdram_table, sizeof(sdram_table)/sizeof(uint));
-
- /* Configure the refresh (mostly). This needs to be
- * based upon processor clock speed and optimized to provide
- * the highest level of performance.
- *
- * Preliminary prescaler for refresh.
- * This value is selected for four cycles in 31.2 us,
- * which gives 8192 cycles in 64 milliseconds.
- * This may be too fast, but works for any memory.
- * It is adjusted to 4096 cycles in 64 milliseconds if
- * possible once we know what memory we have.
- *
- * We have to be careful changing UPM registers after we
- * ask it to run these commands.
- *
- * PTA - periodic timer period for our design is
- * 50 MHz x 31.2us
- * --------------- = 195
- * 1 x 8 x 1
- *
- * 50MHz clock
- * 31.2us refresh interval
- * SCCR[DFBRG] 0
- * PTP divide by 8
- * 1 chip select
- */
- memctl->memc_mptpr = MPTPR_PTP_DIV8; /* 0x0800 */
- memctl->memc_mamr = SDRAM_MAMR_8COL & (~MAMR_PTAE); /* no refresh yet */
-
- /* The SDRAM Mode Register value is shifted left 2 bits since
- * A30 and A31 don't connect to the SDRAM for 32-bit wide memory.
- */
- memctl->memc_mar = SDRAM_MODE << 2; /* MRS code */
- udelay(200); /* SDRAM needs 200uS before set it up */
-
- /* Now run the precharge/nop/mrs commands. */
- memctl->memc_mcr = SDRAM_MCR_PRE;
- udelay(2);
-
- /* Run 8 refresh cycles (2 sets of 4) */
- memctl->memc_mcr = SDRAM_MCR_REFR; /* run refresh twice */
- udelay(2);
-
- /* some brands want Mode Register set after the refresh
- * cycles. This shouldn't hurt anything for the brands
- * that were happy with the first time we set it.
- */
- memctl->memc_mcr = SDRAM_MCR_MRS;
- udelay(2);
-
- memctl->memc_mamr = SDRAM_MAMR_8COL; /* enable refresh */
- memctl->memc_or3 = SDRAM_OR_PRELIM;
- memctl->memc_br3 = SDRAM_BR_VALUE + base;
-
- /* Some brands need at least 10 DRAM accesses to stabilize.
- * It wont hurt the brands that don't.
- */
- for (i=0; i<10; ++i) {
- volatile ulong *addr = (volatile ulong *)base;
- ulong val;
-
- val = *(addr + i);
- *(addr + i) = val;
- }
-
- /* Check SDRAM memory Size in 8 column mode.
- * For a 9 column memory we will get half the actual size.
- */
- size_sdram = ram_size((ulong *)0, SDRAM_MAX_SIZE);
-
- /* Check SDRAM memory Size in 9 column mode.
- * For an 8 column memory we will see at most 4 megabytes.
- */
- memctl->memc_mamr = SDRAM_MAMR_9COL;
- size_sdram9 = ram_size((ulong *)0, SDRAM_MAX_SIZE);
-
- if (size_sdram < size_sdram9) /* leave configuration at 9 columns */
- size_sdram = size_sdram9;
- else /* go back to 8 columns */
- memctl->memc_mamr = SDRAM_MAMR_8COL;
-
- /* adjust or3 for actual size of SDRAM
- */
- memctl->memc_or3 |= ORMASK(size_sdram);
-
- /* Adjust refresh rate depending on SDRAM type.
- * For types > 128 MBit (32 Mbyte for 2 x16 devices) leave
- * it at the current (fast) rate.
- * For 16, 64 and 128 MBit half the rate will do.
- */
- if (size_sdram <= 32 * 1024 * 1024)
- memctl->memc_mptpr = MPTPR_PTP_DIV16; /* 0x0400 */
-
- return (size_sdram);
-}
diff --git a/board/sixnet/sixnet.h b/board/sixnet/sixnet.h
deleted file mode 100644
index e631874972..0000000000
--- a/board/sixnet/sixnet.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * Memory map:
- *
- * ff100000 -> ff13ffff : FPGA CS1
- * ff030000 -> ff03ffff : EXPANSION CS7
- * ff020000 -> ff02ffff : DATA FLASH CS4
- * ff018000 -> ff01ffff : UART B CS6/UPMB
- * ff010000 -> ff017fff : UART A CS5/UPMB
- * ff000000 -> ff00ffff : IMAP internal to the MPC855T
- * f8000000 -> fbffffff : FLASH CS0 up to 64MB
- * f4000000 -> f7ffffff : NVSRAM CS2 up to 64MB
- * 00000000 -> 0fffffff : SDRAM CS3/UPMA up to 256MB
- */
diff --git a/board/sixnet/u-boot.lds b/board/sixnet/u-boot.lds
deleted file mode 100644
index 1513a8517d..0000000000
--- a/board/sixnet/u-boot.lds
+++ /dev/null
@@ -1,130 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc8xx/start.o (.text)
- common/environment.o(.text)
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/sl8245/Makefile b/board/sl8245/Makefile
deleted file mode 100644
index 6d11240432..0000000000
--- a/board/sl8245/Makefile
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# (C) Copyright 2001 - 2003
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/sl8245/config.mk b/board/sl8245/config.mk
deleted file mode 100644
index 022512b0dd..0000000000
--- a/board/sl8245/config.mk
+++ /dev/null
@@ -1,31 +0,0 @@
-#
-# (C) Copyright 2001 - 2003
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# SL8245 board
-#
-
-TEXT_BASE = 0xFFF00000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE)
-PLATFORM_LIBS += $(shell $(CC) -print-libgcc-file-name)
diff --git a/board/sl8245/flash.c b/board/sl8245/flash.c
deleted file mode 100644
index 553dc98226..0000000000
--- a/board/sl8245/flash.c
+++ /dev/null
@@ -1,488 +0,0 @@
-/*
- * (C) Copyright 2001 - 2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc824x.h>
-#include <asm/processor.h>
-
-#if defined(CFG_ENV_IS_IN_FLASH)
-# ifndef CFG_ENV_ADDR
-# define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_ENV_OFFSET)
-# endif
-# ifndef CFG_ENV_SIZE
-# define CFG_ENV_SIZE CFG_ENV_SECT_SIZE
-# endif
-# ifndef CFG_ENV_SECT_SIZE
-# define CFG_ENV_SECT_SIZE CFG_ENV_SIZE
-# endif
-#endif
-
-#define FLASH_BANK_SIZE 0x800000
-#define MAIN_SECT_SIZE 0x40000
-#define PARAM_SECT1_SIZE 0x20000
-#define PARAM_SECT23_SIZE 0x8000
-#define PARAM_SECT4_SIZE 0x10000
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
-
-static int write_data (flash_info_t *info, ulong dest, ulong *data);
-static void write_via_fpu(vu_long *addr, ulong *data);
-static __inline__ unsigned long get_msr(void);
-static __inline__ void set_msr(unsigned long msr);
-
-/*---------------------------------------------------------------------*/
-#undef DEBUG_FLASH
-
-/*---------------------------------------------------------------------*/
-#ifdef DEBUG_FLASH
-#define DEBUGF(fmt,args...) printf(fmt ,##args)
-#else
-#define DEBUGF(fmt,args...)
-#endif
-/*---------------------------------------------------------------------*/
-
-#define __align__ __attribute__ ((aligned (8)))
-static __align__ ulong precmd0[2] = { 0x00aa00aa, 0x00aa00aa };
-static __align__ ulong precmd1[2] = { 0x00550055, 0x00550055 };
-static __align__ ulong cmdid[2] = { 0x00900090, 0x00900090 };
-static __align__ ulong cmderase[2] = { 0x00800080, 0x00800080 };
-static __align__ ulong cmdersusp[2] = { 0x00b000b0, 0x00b000b0 };
-static __align__ ulong cmdsecter[2] = { 0x00300030, 0x00300030 };
-static __align__ ulong cmdprog[2] = { 0x00a000a0, 0x00a000a0 };
-static __align__ ulong cmdres[2] = { 0x00f000f0, 0x00f000f0 };
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- int i, j;
- ulong size = 0;
-
- for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
- vu_long *addr = (vu_long *) (CFG_FLASH_BASE + i * FLASH_BANK_SIZE);
-
- write_via_fpu (&addr[0xaaa], precmd0);
- write_via_fpu (&addr[0x554], precmd1);
- write_via_fpu (&addr[0xaaa], cmdid);
-
- DEBUGF ("Flash bank # %d:\n"
- "\tManuf. ID @ 0x%08lX: 0x%08lX\n"
- "\tDevice ID @ 0x%08lX: 0x%08lX\n",
- i,
- (ulong) (&addr[0]), addr[0],
- (ulong) (&addr[2]), addr[2]);
-
- if ((addr[0] == addr[1]) && (addr[0] == AMD_MANUFACT) &&
- (addr[2] == addr[3]) && (addr[2] == AMD_ID_LV160T)) {
- flash_info[i].flash_id = (FLASH_MAN_AMD & FLASH_VENDMASK) |
- (FLASH_AM160T & FLASH_TYPEMASK);
- } else {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- write_via_fpu (addr, cmdres);
- goto Done;
- }
-
- DEBUGF ("flash_id = 0x%08lX\n", flash_info[i].flash_id);
-
- write_via_fpu (addr, cmdres);
-
- flash_info[i].size = FLASH_BANK_SIZE;
- flash_info[i].sector_count = CFG_MAX_FLASH_SECT;
- memset (flash_info[i].protect, 0, CFG_MAX_FLASH_SECT);
- for (j = 0; j < 32; j++) {
- flash_info[i].start[j] = CFG_FLASH_BASE +
- i * FLASH_BANK_SIZE + j * MAIN_SECT_SIZE;
- }
- flash_info[i].start[32] =
- flash_info[i].start[31] + PARAM_SECT1_SIZE;
- flash_info[i].start[33] =
- flash_info[i].start[32] + PARAM_SECT23_SIZE;
- flash_info[i].start[34] =
- flash_info[i].start[33] + PARAM_SECT23_SIZE;
- size += flash_info[i].size;
- }
-
- /* Protect monitor and environment sectors
- */
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE + FLASH_BANK_SIZE
- flash_protect ( FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE + monitor_flash_len - 1,
- &flash_info[1]);
-#else
- flash_protect ( FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE + monitor_flash_len - 1,
- &flash_info[0]);
-#endif
-#endif
-
-#if (CFG_ENV_IS_IN_FLASH == 1) && defined(CFG_ENV_ADDR)
-#if CFG_ENV_ADDR >= CFG_FLASH_BASE + FLASH_BANK_SIZE
- flash_protect ( FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[1]);
-#else
- flash_protect ( FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0]);
-#endif
-#endif
-
-Done:
- return size;
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t * info)
-{
- int i;
-
- switch ((i = info->flash_id & FLASH_VENDMASK)) {
- case (FLASH_MAN_AMD & FLASH_VENDMASK):
- printf ("Intel: ");
- break;
- default:
- printf ("Unknown Vendor 0x%04x ", i);
- break;
- }
-
- switch ((i = info->flash_id & FLASH_TYPEMASK)) {
- case (FLASH_AM160T & FLASH_TYPEMASK):
- printf ("AM29LV160BT (16Mbit)\n");
- break;
- default:
- printf ("Unknown Chip Type 0x%04x\n", i);
- goto Done;
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; i++) {
- if ((i % 5) == 0) {
- printf ("\n ");
- }
- printf (" %08lX%s", info->start[i],
- info->protect[i] ? " (RO)" : " ");
- }
- printf ("\n");
-
- Done:
- return;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t * info, int s_first, int s_last)
-{
- int flag, prot, sect;
- ulong start, now, last;
-
- DEBUGF ("Erase flash bank %d sect %d ... %d\n",
- info - &flash_info[0], s_first, s_last);
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- if ((info->flash_id & FLASH_VENDMASK) !=
- (FLASH_MAN_AMD & FLASH_VENDMASK)) {
- printf ("Can erase only AMD flash types - aborted\n");
- return 1;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- start = get_timer (0);
- last = start;
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- vu_long *addr = (vu_long *) (info->start[sect]);
-
- DEBUGF ("Erase sect %d @ 0x%08lX\n", sect, (ulong) addr);
-
- /* Disable interrupts which might cause a timeout
- * here.
- */
- flag = disable_interrupts ();
-
- write_via_fpu (&addr[0xaaa], precmd0);
- write_via_fpu (&addr[0x554], precmd1);
- write_via_fpu (&addr[0xaaa], cmderase);
- write_via_fpu (&addr[0xaaa], precmd0);
- write_via_fpu (&addr[0x554], precmd1);
- write_via_fpu (&addr[0xaaa], cmdsecter);
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts ();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- while (((addr[0] & 0x00800080) != 0x00800080) ||
- ((addr[1] & 0x00800080) != 0x00800080)) {
- if ((now = get_timer (start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- write_via_fpu (addr, cmdersusp);
- write_via_fpu (addr, cmdres);
- return 1;
- }
-
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- }
-
- write_via_fpu (addr, cmdres);
- }
- }
- printf (" done\n");
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- * 4 - Flash not identified
- */
-
-#define FLASH_WIDTH 8 /* flash bus width in bytes */
-
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- ulong wp, cp, msr;
- int l, rc, i;
- ulong data[2];
- ulong *datah = &data[0];
- ulong *datal = &data[1];
-
- DEBUGF ("Flash write_buff: @ 0x%08lx, src 0x%08lx len %ld\n",
- addr, (ulong) src, cnt);
-
- if (info->flash_id == FLASH_UNKNOWN) {
- return 4;
- }
-
- msr = get_msr ();
- set_msr (msr | MSR_FP);
-
- wp = (addr & ~(FLASH_WIDTH - 1)); /* get lower aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- *datah = *datal = 0;
-
- for (i = 0, cp = wp; i < l; i++, cp++) {
- if (i >= 4) {
- *datah = (*datah << 8) | ((*datal & 0xFF000000) >> 24);
- }
-
- *datal = (*datal << 8) | (*(uchar *) cp);
- }
- for (; i < FLASH_WIDTH && cnt > 0; ++i) {
- char tmp;
-
- tmp = *src;
-
- src++;
-
- if (i >= 4) {
- *datah = (*datah << 8) | ((*datal & 0xFF000000) >> 24);
- }
-
- *datal = (*datal << 8) | tmp;
-
- --cnt;
- ++cp;
- }
-
- for (; cnt == 0 && i < FLASH_WIDTH; ++i, ++cp) {
- if (i >= 4) {
- *datah = (*datah << 8) | ((*datal & 0xFF000000) >> 24);
- }
-
- *datal = (*datah << 8) | (*(uchar *) cp);
- }
-
- if ((rc = write_data (info, wp, data)) != 0) {
- set_msr (msr);
- return (rc);
- }
-
- wp += FLASH_WIDTH;
- }
-
- /*
- * handle FLASH_WIDTH aligned part
- */
- while (cnt >= FLASH_WIDTH) {
- *datah = *(ulong *) src;
- *datal = *(ulong *) (src + 4);
- if ((rc = write_data (info, wp, data)) != 0) {
- set_msr (msr);
- return (rc);
- }
- wp += FLASH_WIDTH;
- cnt -= FLASH_WIDTH;
- src += FLASH_WIDTH;
- }
-
- if (cnt == 0) {
- set_msr (msr);
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- *datah = *datal = 0;
- for (i = 0, cp = wp; i < FLASH_WIDTH && cnt > 0; ++i, ++cp) {
- char tmp;
-
- tmp = *src;
-
- src++;
-
- if (i >= 4) {
- *datah = (*datah << 8) | ((*datal & 0xFF000000) >> 24);
- }
-
- *datal = (*datal << 8) | tmp;
-
- --cnt;
- }
-
- for (; i < FLASH_WIDTH; ++i, ++cp) {
- if (i >= 4) {
- *datah = (*datah << 8) | ((*datal & 0xFF000000) >> 24);
- }
-
- *datal = (*datal << 8) | (*(uchar *) cp);
- }
-
- rc = write_data (info, wp, data);
- set_msr (msr);
-
- return (rc);
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_data (flash_info_t * info, ulong dest, ulong * data)
-{
- vu_long *chip = (vu_long *) (info->start[0]);
- vu_long *addr = (vu_long *) dest;
- ulong start;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if (((addr[0] & data[0]) != data[0]) ||
- ((addr[1] & data[1]) != data[1])) {
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
-
- write_via_fpu (&chip[0xaaa], precmd0);
- write_via_fpu (&chip[0x554], precmd1);
- write_via_fpu (&chip[0xaaa], cmdprog);
- write_via_fpu (addr, data);
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts ();
-
- start = get_timer (0);
-
- while (((addr[0] & 0x00800080) != (data[0] & 0x00800080)) ||
- ((addr[1] & 0x00800080) != (data[1] & 0x00800080))) {
- if (get_timer (start) > CFG_FLASH_WRITE_TOUT) {
- write_via_fpu (chip, cmdres);
- return (1);
- }
- }
-
- write_via_fpu (chip, cmdres);
-
- return (0);
-}
-
-/*-----------------------------------------------------------------------
- */
-static void write_via_fpu (vu_long * addr, ulong * data)
-{
- __asm__ __volatile__ ("lfd 1, 0(%0)"::"r" (data));
- __asm__ __volatile__ ("stfd 1, 0(%0)"::"r" (addr));
-}
-
-/*-----------------------------------------------------------------------
- */
-static __inline__ unsigned long get_msr (void)
-{
- unsigned long msr;
-
- __asm__ __volatile__ ("mfmsr %0":"=r" (msr):);
-
- return msr;
-}
-
-static __inline__ void set_msr (unsigned long msr)
-{
- __asm__ __volatile__ ("mtmsr %0"::"r" (msr));
-}
diff --git a/board/sl8245/sl8245.c b/board/sl8245/sl8245.c
deleted file mode 100644
index 593eb4ee80..0000000000
--- a/board/sl8245/sl8245.c
+++ /dev/null
@@ -1,68 +0,0 @@
-/*
- * (C) Copyright 2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc824x.h>
-#include <pci.h>
-
-int checkboard (void)
-{
- ulong busfreq = get_bus_freq(0);
- char buf[32];
-
- printf("Board: SL8245, local bus @ %s MHz\n", strmhz(buf, busfreq));
- return 0;
-}
-
-long int initdram (int board_type)
-{
-#ifndef CFG_RAMBOOT
- long size;
- long new_bank0_end;
- long mear1;
- long emear1;
-
- size = get_ram_size(CFG_SDRAM_BASE, CFG_MAX_RAM_SIZE);
-
- new_bank0_end = size - 1;
- mear1 = mpc824x_mpc107_getreg(MEAR1);
- emear1 = mpc824x_mpc107_getreg(EMEAR1);
- mear1 = (mear1 & 0xFFFFFF00) |
- ((new_bank0_end & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT);
- emear1 = (emear1 & 0xFFFFFF00) |
- ((new_bank0_end & MICR_ADDR_MASK) >> MICR_EADDR_SHIFT);
- mpc824x_mpc107_setreg(MEAR1, mear1);
- mpc824x_mpc107_setreg(EMEAR1, emear1);
-
- return (size);
-#else
- return CFG_MAX_RAM_SIZE;
-#endif
-}
-
-static struct pci_controller hose;
-
-void pci_init_board(void)
-{
- pci_mpc824x_init(&hose);
-}
diff --git a/board/sl8245/u-boot.lds b/board/sl8245/u-boot.lds
deleted file mode 100644
index acb9ffda3b..0000000000
--- a/board/sl8245/u-boot.lds
+++ /dev/null
@@ -1,135 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc824x/start.o (.text)
- lib_ppc/board.o (.text)
- lib_ppc/ppcstring.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
- lib_generic/zlib.o (.text)
-
- . = DEFINED(env_offset) ? env_offset : .;
- common/environment.o (.text)
-
- *(.text)
-
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
-
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/smdk2400/Makefile b/board/smdk2400/Makefile
deleted file mode 100644
index fc3d48faee..0000000000
--- a/board/smdk2400/Makefile
+++ /dev/null
@@ -1,47 +0,0 @@
-#
-# (C) Copyright 2000, 2001, 2002
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := smdk2400.o flash.o
-SOBJS := lowlevel_init.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS) $(SOBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/smdk2400/config.mk b/board/smdk2400/config.mk
deleted file mode 100644
index 82400bf8ab..0000000000
--- a/board/smdk2400/config.mk
+++ /dev/null
@@ -1,25 +0,0 @@
-#
-# (C) Copyright 2002
-# Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
-#
-# SAMSUNG board with S3C2400X (ARM920T) CPU
-#
-# see http://www.samsung.com/ for more information on SAMSUNG
-#
-
-#
-# SAMSUNG has 1 bank of 32 MB DRAM
-#
-# 0C00'0000 to 0E00'0000
-#
-# Linux-Kernel is expected to be at 0cf0'0000, entry 0cf0'0000
-# optionally with a ramdisk at 0c80'0000
-#
-# we load ourself to 0CF80000 (must be high enough not to be
-# overwritten by the uncompessing Linux kernel)
-#
-# download area is 0C80'0000
-#
-
-
-TEXT_BASE = 0x0CF80000
diff --git a/board/smdk2400/flash.c b/board/smdk2400/flash.c
deleted file mode 100644
index a108af7c72..0000000000
--- a/board/smdk2400/flash.c
+++ /dev/null
@@ -1,491 +0,0 @@
-/*
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * (C) Copyright 2002
- * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/* #define DEBUG */
-
-#include <common.h>
-#include <environment.h>
-
-#define FLASH_BANK_SIZE 0x1000000 /* 2 x 8 MB */
-#define MAIN_SECT_SIZE 0x40000 /* 2 x 128 kB */
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
-
-
-#define CMD_READ_ARRAY 0x00FF00FF
-#define CMD_IDENTIFY 0x00900090
-#define CMD_ERASE_SETUP 0x00200020
-#define CMD_ERASE_CONFIRM 0x00D000D0
-#define CMD_PROGRAM 0x00400040
-#define CMD_RESUME 0x00D000D0
-#define CMD_SUSPEND 0x00B000B0
-#define CMD_STATUS_READ 0x00700070
-#define CMD_STATUS_RESET 0x00500050
-
-#define BIT_BUSY 0x00800080
-#define BIT_ERASE_SUSPEND 0x00400040
-#define BIT_ERASE_ERROR 0x00200020
-#define BIT_PROGRAM_ERROR 0x00100010
-#define BIT_VPP_RANGE_ERROR 0x00080008
-#define BIT_PROGRAM_SUSPEND 0x00040004
-#define BIT_PROTECT_ERROR 0x00020002
-#define BIT_UNDEFINED 0x00010001
-
-#define BIT_SEQUENCE_ERROR 0x00300030
-#define BIT_TIMEOUT 0x80000000
-
-/*-----------------------------------------------------------------------
- */
-
-ulong flash_init (void)
-{
- int i, j;
- ulong size = 0;
-
- for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
- ulong flashbase = 0;
-
- flash_info[i].flash_id =
- (INTEL_MANUFACT & FLASH_VENDMASK) |
- (INTEL_ID_28F640J3A & FLASH_TYPEMASK);
- flash_info[i].size = FLASH_BANK_SIZE;
- flash_info[i].sector_count = CFG_MAX_FLASH_SECT;
- memset (flash_info[i].protect, 0, CFG_MAX_FLASH_SECT);
- if (i == 0)
- flashbase = CFG_FLASH_BASE;
- else
- panic ("configured too many flash banks!\n");
- for (j = 0; j < flash_info[i].sector_count; j++) {
- flash_info[i].start[j] = flashbase;
-
- /* uniform sector size */
- flashbase += MAIN_SECT_SIZE;
- }
- size += flash_info[i].size;
- }
-
- /*
- * Protect monitor and environment sectors
- */
- flash_protect ( FLAG_PROTECT_SET,
- CFG_FLASH_BASE,
- CFG_FLASH_BASE + monitor_flash_len - 1,
- &flash_info[0]);
-
- flash_protect ( FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0]);
-
-#ifdef CFG_ENV_ADDR_REDUND
- flash_protect ( FLAG_PROTECT_SET,
- CFG_ENV_ADDR_REDUND,
- CFG_ENV_ADDR_REDUND + CFG_ENV_SIZE_REDUND - 1,
- &flash_info[0]);
-#endif
-
- return size;
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t * info)
-{
- int i;
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case (INTEL_MANUFACT & FLASH_VENDMASK):
- printf ("Intel: ");
- break;
- default:
- printf ("Unknown Vendor ");
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case (INTEL_ID_28F640J3A & FLASH_TYPEMASK):
- printf ("2x 28F640J3A (64Mbit)\n");
- break;
- default:
- printf ("Unknown Chip Type\n");
- goto Done;
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; i++) {
- if ((i % 5) == 0) {
- printf ("\n ");
- }
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " ");
- }
- printf ("\n");
-
-Done: ;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_error (ulong code)
-{
- /* Check bit patterns */
- /* SR.7=0 is busy, SR.7=1 is ready */
- /* all other flags indicate error on 1 */
- /* SR.0 is undefined */
- /* Timeout is our faked flag */
-
- /* sequence is described in Intel 290644-005 document */
-
- /* check Timeout */
- if (code & BIT_TIMEOUT) {
- puts ("Timeout\n");
- return ERR_TIMOUT;
- }
-
- /* check Busy, SR.7 */
- if (~code & BIT_BUSY) {
- puts ("Busy\n");
- return ERR_PROG_ERROR;
- }
-
- /* check Vpp low, SR.3 */
- if (code & BIT_VPP_RANGE_ERROR) {
- puts ("Vpp range error\n");
- return ERR_PROG_ERROR;
- }
-
- /* check Device Protect Error, SR.1 */
- if (code & BIT_PROTECT_ERROR) {
- puts ("Device protect error\n");
- return ERR_PROG_ERROR;
- }
-
- /* check Command Seq Error, SR.4 & SR.5 */
- if (code & BIT_SEQUENCE_ERROR) {
- puts ("Command seqence error\n");
- return ERR_PROG_ERROR;
- }
-
- /* check Block Erase Error, SR.5 */
- if (code & BIT_ERASE_ERROR) {
- puts ("Block erase error\n");
- return ERR_PROG_ERROR;
- }
-
- /* check Program Error, SR.4 */
- if (code & BIT_PROGRAM_ERROR) {
- puts ("Program error\n");
- return ERR_PROG_ERROR;
- }
-
- /* check Block Erase Suspended, SR.6 */
- if (code & BIT_ERASE_SUSPEND) {
- puts ("Block erase suspended\n");
- return ERR_PROG_ERROR;
- }
-
- /* check Program Suspended, SR.2 */
- if (code & BIT_PROGRAM_SUSPEND) {
- puts ("Program suspended\n");
- return ERR_PROG_ERROR;
- }
-
- /* OK, no error */
- return ERR_OK;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t * info, int s_first, int s_last)
-{
- ulong result, result1;
- int iflag, prot, sect;
- int rc = ERR_OK;
-
-#ifdef USE_920T_MMU
- int cflag;
-#endif
-
- debug ("flash_erase: s_first %d s_last %d\n", s_first, s_last);
-
- /* first look for protection bits */
-
- if (info->flash_id == FLASH_UNKNOWN)
- return ERR_UNKNOWN_FLASH_TYPE;
-
- if ((s_first < 0) || (s_first > s_last)) {
- return ERR_INVAL;
- }
-
- if ((info->flash_id & FLASH_VENDMASK) !=
- (INTEL_MANUFACT & FLASH_VENDMASK)) {
- return ERR_UNKNOWN_FLASH_VENDOR;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- /*
- * Disable interrupts which might cause a timeout
- * here. Remember that our exception vectors are
- * at address 0 in the flash, and we don't want a
- * (ticker) exception to happen while the flash
- * chip is in programming mode.
- */
-#ifdef USE_920T_MMU
- cflag = dcache_status ();
- dcache_disable ();
-#endif
- iflag = disable_interrupts ();
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect <= s_last && !ctrlc (); sect++) {
-
- debug ("Erasing sector %2d @ %08lX... ",
- sect, info->start[sect]);
-
- /* arm simple, non interrupt dependent timer */
- reset_timer_masked ();
-
- if (info->protect[sect] == 0) { /* not protected */
- vu_long *addr = (vu_long *) (info->start[sect]);
- ulong bsR7, bsR7_2, bsR5, bsR5_2;
-
- /* *addr = CMD_STATUS_RESET; */
- *addr = CMD_ERASE_SETUP;
- *addr = CMD_ERASE_CONFIRM;
-
- /* wait until flash is ready */
- do {
- /* check timeout */
- if (get_timer_masked () > CFG_FLASH_ERASE_TOUT) {
- *addr = CMD_STATUS_RESET;
- result = BIT_TIMEOUT;
- break;
- }
-
- *addr = CMD_STATUS_READ;
- result = *addr;
- bsR7 = result & (1 << 7);
- bsR7_2 = result & (1 << 23);
- } while (!bsR7 | !bsR7_2);
-
- *addr = CMD_STATUS_READ;
- result1 = *addr;
- bsR5 = result1 & (1 << 5);
- bsR5_2 = result1 & (1 << 21);
-#ifdef SAMSUNG_FLASH_DEBUG
- printf ("bsR5 %lx bsR5_2 %lx\n", bsR5, bsR5_2);
- if (bsR5 != 0 && bsR5_2 != 0)
- printf ("bsR5 %lx bsR5_2 %lx\n", bsR5, bsR5_2);
-#endif
-
- *addr = CMD_READ_ARRAY;
- *addr = CMD_RESUME;
-
- if ((rc = flash_error (result)) != ERR_OK)
- goto outahere;
-#if 0
- printf ("ok.\n");
- } else { /* it was protected */
-
- printf ("protected!\n");
-#endif
- }
- }
-
-outahere:
- /* allow flash to settle - wait 10 ms */
- udelay_masked (10000);
-
- if (iflag)
- enable_interrupts ();
-
-#ifdef USE_920T_MMU
- if (cflag)
- dcache_enable ();
-#endif
- return rc;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash
- */
-
-volatile static int write_word (flash_info_t * info, ulong dest,
- ulong data)
-{
- vu_long *addr = (vu_long *) dest;
- ulong result;
- int rc = ERR_OK;
- int iflag;
-
-#ifdef USE_920T_MMU
- int cflag;
-#endif
-
- /*
- * Check if Flash is (sufficiently) erased
- */
- result = *addr;
- if ((result & data) != data)
- return ERR_NOT_ERASED;
-
- /*
- * Disable interrupts which might cause a timeout
- * here. Remember that our exception vectors are
- * at address 0 in the flash, and we don't want a
- * (ticker) exception to happen while the flash
- * chip is in programming mode.
- */
-#ifdef USE_920T_MMU
- cflag = dcache_status ();
- dcache_disable ();
-#endif
- iflag = disable_interrupts ();
-
- /* *addr = CMD_STATUS_RESET; */
- *addr = CMD_PROGRAM;
- *addr = data;
-
- /* arm simple, non interrupt dependent timer */
- reset_timer_masked ();
-
- /* wait until flash is ready */
- do {
- /* check timeout */
- if (get_timer_masked () > CFG_FLASH_ERASE_TOUT) {
- *addr = CMD_SUSPEND;
- result = BIT_TIMEOUT;
- break;
- }
-
- *addr = CMD_STATUS_READ;
- result = *addr;
- } while (~result & BIT_BUSY);
-
- /* *addr = CMD_READ_ARRAY; */
- *addr = CMD_STATUS_READ;
- result = *addr;
-
- rc = flash_error (result);
-
- if (iflag)
- enable_interrupts ();
-
-#ifdef USE_920T_MMU
- if (cflag)
- dcache_enable ();
-#endif
- *addr = CMD_READ_ARRAY;
- *addr = CMD_RESUME;
- return rc;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash.
- */
-
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int l;
- int i, rc;
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i = 0, cp = wp; i < l; ++i, ++cp) {
- data = (data >> 8) | (*(uchar *) cp << 24);
- }
- for (; i < 4 && cnt > 0; ++i) {
- data = (data >> 8) | (*src++ << 24);
- --cnt;
- ++cp;
- }
- for (; cnt == 0 && i < 4; ++i, ++cp) {
- data = (data >> 8) | (*(uchar *) cp << 24);
- }
-
- if ((rc = write_word (info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = *((vu_long *) src);
- if ((rc = write_word (info, wp, data)) != 0) {
- return (rc);
- }
- src += 4;
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return ERR_OK;
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i = 0, cp = wp; i < 4 && cnt > 0; ++i, ++cp) {
- data = (data >> 8) | (*src++ << 24);
- --cnt;
- }
- for (; i < 4; ++i, ++cp) {
- data = (data >> 8) | (*(uchar *) cp << 24);
- }
-
- return write_word (info, wp, data);
-}
diff --git a/board/smdk2400/lowlevel_init.S b/board/smdk2400/lowlevel_init.S
deleted file mode 100644
index a5de806af5..0000000000
--- a/board/smdk2400/lowlevel_init.S
+++ /dev/null
@@ -1,163 +0,0 @@
-/*
- * Memory Setup stuff - taken from blob memsetup.S
- *
- * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) and
- * Jan-Derk Bakker (J.D.Bakker@its.tudelft.nl)
- *
- * Modified for the Samsung development board by
- * (C) Copyright 2002
- * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-
-#include <config.h>
-#include <version.h>
-
-
-/* some parameters for the board */
-
-/*
- *
- * Taken from linux/arch/arm/boot/compressed/head-s3c2400.S
- *
- * Copyright (C) 2001 Samsung Electronics by chc, 010406
- *
- * S3C2400 specific tweaks.
- *
- */
-
-/* memory controller */
-#define BWSCON 0x14000000
-#define BANKCON3 0x14000010 /* for cs8900, ethernet */
-
-/* Bank0 */
-#define B0_Tacs 0x0 /* 0 clk */
-#define B0_Tcos 0x0 /* 0 clk */
-#define B0_Tacc 0x7 /* 14 clk */
-#define B0_Tcoh 0x0 /* 0 clk */
-#define B0_Tah 0x0 /* 0 clk */
-#define B0_Tacp 0x0
-#define B0_PMC 0x0 /* normal */
-
-/* Bank1 */
-#define B1_Tacs 0x0 /* 0 clk */
-#define B1_Tcos 0x0 /* 0 clk */
-#define B1_Tacc 0x7 /* 14 clk */
-#define B1_Tcoh 0x0 /* 0 clk */
-#define B1_Tah 0x0 /* 0 clk */
-#define B1_Tacp 0x0
-#define B1_PMC 0x0 /* normal */
-
-/* Bank2 */
-#define B2_Tacs 0x0 /* 0 clk */
-#define B2_Tcos 0x0 /* 0 clk */
-#define B2_Tacc 0x7 /* 14 clk */
-#define B2_Tcoh 0x0 /* 0 clk */
-#define B2_Tah 0x0 /* 0 clk */
-#define B2_Tacp 0x0
-#define B2_PMC 0x0 /* normal */
-
-/* Bank3 - setup for the cs8900 */
-#define B3_Tacs 0x0 /* 0 clk */
-#define B3_Tcos 0x3 /* 4 clk */
-#define B3_Tacc 0x7 /* 14 clk */
-#define B3_Tcoh 0x1 /* 1 clk */
-#define B3_Tah 0x0 /* 0 clk */
-#define B3_Tacp 0x3 /* 6 clk */
-#define B3_PMC 0x0 /* normal */
-
-/* Bank4 */
-#define B4_Tacs 0x0 /* 0 clk */
-#define B4_Tcos 0x0 /* 0 clk */
-#define B4_Tacc 0x7 /* 14 clk */
-#define B4_Tcoh 0x0 /* 0 clk */
-#define B4_Tah 0x0 /* 0 clk */
-#define B4_Tacp 0x0
-#define B4_PMC 0x0 /* normal */
-
-/* Bank5 */
-#define B5_Tacs 0x0 /* 0 clk */
-#define B5_Tcos 0x0 /* 0 clk */
-#define B5_Tacc 0x7 /* 14 clk */
-#define B5_Tcoh 0x0 /* 0 clk */
-#define B5_Tah 0x0 /* 0 clk */
-#define B5_Tacp 0x0
-#define B5_PMC 0x0 /* normal */
-
-/* Bank6 */
-#define B6_MT 0x3 /* SDRAM */
-#define B6_Trcd 0x1 /* 3clk */
-#define B6_SCAN 0x1 /* 9 bit */
-
-/* Bank7 */
-#define B7_MT 0x3 /* SDRAM */
-#define B7_Trcd 0x1 /* 3clk */
-#define B7_SCAN 0x1 /* 9 bit */
-
-/* refresh parameter */
-#define REFEN 0x1 /* enable refresh */
-#define TREFMD 0x0 /* CBR(CAS before RAS)/auto refresh */
-#define Trp 0x0 /* 2 clk */
-#define Trc 0x3 /* 7 clk */
-#define Tchr 0x2 /* 3 clk */
-
-#define REFCNT 1113 /* period=15.6 us, HCLK=60Mhz, (2048+1-15.6*66) */
-
-
-_TEXT_BASE:
- .word TEXT_BASE
-
-.globl lowlevel_init
-lowlevel_init:
- /* memory control configuration */
- /* make r0 relative the current location so that it */
- /* reads SMRDATA out of FLASH rather than memory ! */
- ldr r0, =SMRDATA
- ldr r1, _TEXT_BASE
- sub r0, r0, r1
- ldr r1, =BWSCON /* Bus Width Status Controller */
- add r2, r0, #52
-0:
- ldr r3, [r0], #4
- str r3, [r1], #4
- cmp r2, r0
- bne 0b
-
- /* everything is fine now */
- mov pc, lr
-
- .ltorg
-/* the literal pools origin */
-
-SMRDATA:
- .word 0x2211d114 /* d->Ethernet, BUSWIDTH=32 */
- .word ((B0_Tacs<<13)+(B0_Tcos<<11)+(B0_Tacc<<8)+(B0_Tcoh<<6)+(B0_Tah<<4)+(B0_Tacp<<2)+(B0_PMC)) /* GCS0 */
- .word ((B1_Tacs<<13)+(B1_Tcos<<11)+(B1_Tacc<<8)+(B1_Tcoh<<6)+(B1_Tah<<4)+(B1_Tacp<<2)+(B1_PMC)) /* GCS1 */
- .word ((B2_Tacs<<13)+(B2_Tcos<<11)+(B2_Tacc<<8)+(B2_Tcoh<<6)+(B2_Tah<<4)+(B2_Tacp<<2)+(B2_PMC)) /* GCS2 */
- .word ((B3_Tacs<<13)+(B3_Tcos<<11)+(B3_Tacc<<8)+(B3_Tcoh<<6)+(B3_Tah<<4)+(B3_Tacp<<2)+(B3_PMC)) /* GCS3 */
- .word ((B4_Tacs<<13)+(B4_Tcos<<11)+(B4_Tacc<<8)+(B4_Tcoh<<6)+(B4_Tah<<4)+(B4_Tacp<<2)+(B4_PMC)) /* GCS4 */
- .word ((B5_Tacs<<13)+(B5_Tcos<<11)+(B5_Tacc<<8)+(B5_Tcoh<<6)+(B5_Tah<<4)+(B5_Tacp<<2)+(B5_PMC)) /* GCS5 */
- .word ((B6_MT<<15)+(B6_Trcd<<2)+(B6_SCAN)) /* GCS6 */
- .word ((B7_MT<<15)+(B7_Trcd<<2)+(B7_SCAN)) /* GCS7 */
- .word ((REFEN<<23)+(TREFMD<<22)+(Trp<<20)+(Trc<<18)+(Tchr<<16)+REFCNT)
- .word 0x10 /* BUSWIDTH=32, SCLK power saving mode, BANKSIZE 32M/32M */
- .word 0x30 /* MRSR6, CL=3clk */
- .word 0x30 /* MRSR7 */
diff --git a/board/smdk2400/smdk2400.c b/board/smdk2400/smdk2400.c
deleted file mode 100644
index cb70218434..0000000000
--- a/board/smdk2400/smdk2400.c
+++ /dev/null
@@ -1,115 +0,0 @@
-/*
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * (C) Copyright 2002
- * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <s3c2400.h>
-
-/* ------------------------------------------------------------------------- */
-
-#ifdef CONFIG_MODEM_SUPPORT
-static int key_pressed(void);
-int mdm_init (bd_t *);
-extern void disable_putc(void);
-extern void enable_putc(void);
-extern int hwflow_onoff(int);
-extern int do_mdm_init; /* defined in common/main.c */
-#endif /* CONFIG_MODEM_SUPPORT */
-
-/*
- * Miscellaneous platform dependent initialisations
- */
-
-int board_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
- S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
- S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
-
- /* memory and cpu-speed are setup before relocation */
- /* change the clock to be 50 MHz 1:1:1 */
- clk_power->MPLLCON = 0x5c042;
- clk_power->CLKDIVN = 0;
- /* set up the I/O ports */
- gpio->PACON = 0x3ffff;
- gpio->PBCON = 0xaaaaaaaa;
- gpio->PBUP = 0xffff;
- gpio->PECON = 0x0;
- gpio->PEUP = 0x0;
-#ifdef CONFIG_HWFLOW
- /*CTS[0] RTS[0] INPUT INPUT TXD[0] INPUT RXD[0] */
- /* 10, 10, 00, 00, 10, 00, 10 */
- gpio->PFCON=0xa22;
- /* Disable pull-up on Rx, Tx, CTS and RTS pins */
- gpio->PFUP=0x35;
-#else
- /*INPUT INPUT INPUT INPUT TXD[0] INPUT RXD[0] */
- /* 00, 00, 00, 00, 10, 00, 10 */
- gpio->PFCON = 0x22;
- /* Disable pull-up on Rx and Tx pins */
- gpio->PFUP = 0x5;
-#endif /* CONFIG_HWFLOW */
- gpio->PGCON = 0x0;
- gpio->PGUP = 0x0;
- gpio->OPENCR = 0x0;
-
- /* arch number of SAMSUNG-Board to MACH_TYPE_SMDK2400 */
- gd->bd->bi_arch_number = MACH_TYPE_SMDK2400;
-
- /* adress of boot parameters */
- gd->bd->bi_boot_params = 0x0C000100;
-
-#ifdef CONFIG_MODEM_SUPPORT
- if (key_pressed()) {
- disable_putc(); /* modem doesn't understand banner etc */
- do_mdm_init = 1;
- }
-#endif /* CONFIG_MODEM_SUPPORT */
-
- return 0;
-}
-
-int dram_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
-
- return 0;
-}
-
-#ifdef CONFIG_MODEM_SUPPORT
-static int key_pressed(void)
-{
- int rc;
- if (1) { /* check for button push here, now just return 1 */
- rc = 1;
- }
-
- return rc;
-}
-#endif /* CONFIG_MODEM_SUPPORT */
diff --git a/board/smdk2400/u-boot.lds b/board/smdk2400/u-boot.lds
deleted file mode 100644
index f4fbf969c3..0000000000
--- a/board/smdk2400/u-boot.lds
+++ /dev/null
@@ -1,57 +0,0 @@
-/*
- * (C) Copyright 2002
- * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-/*OUTPUT_FORMAT("elf32-arm", "elf32-arm", "elf32-arm")*/
-OUTPUT_ARCH(arm)
-ENTRY(_start)
-SECTIONS
-{
- . = 0x00000000;
-
- . = ALIGN(4);
- .text :
- {
- cpu/arm920t/start.o (.text)
- *(.text)
- }
-
- . = ALIGN(4);
- .rodata : { *(.rodata) }
-
- . = ALIGN(4);
- .data : { *(.data) }
-
- . = ALIGN(4);
- .got : { *(.got) }
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = ALIGN(4);
- __bss_start = .;
- .bss : { *(.bss) }
- _end = .;
-}
diff --git a/board/smdk2410/Makefile b/board/smdk2410/Makefile
deleted file mode 100644
index 4ee21f5977..0000000000
--- a/board/smdk2410/Makefile
+++ /dev/null
@@ -1,47 +0,0 @@
-#
-# (C) Copyright 2000, 2001, 2002
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := smdk2410.o flash.o
-SOBJS := lowlevel_init.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS) $(SOBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/smdk2410/config.mk b/board/smdk2410/config.mk
deleted file mode 100644
index 1af85daa4c..0000000000
--- a/board/smdk2410/config.mk
+++ /dev/null
@@ -1,25 +0,0 @@
-#
-# (C) Copyright 2002
-# Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
-# David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
-#
-# SAMSUNG SMDK2410 board with S3C2410X (ARM920T) cpu
-#
-# see http://www.samsung.com/ for more information on SAMSUNG
-#
-
-#
-# SMDK2410 has 1 bank of 64 MB DRAM
-#
-# 3000'0000 to 3400'0000
-#
-# Linux-Kernel is expected to be at 3000'8000, entry 3000'8000
-# optionally with a ramdisk at 3080'0000
-#
-# we load ourself to 33F8'0000
-#
-# download area is 3300'0000
-#
-
-
-TEXT_BASE = 0x33F80000
diff --git a/board/smdk2410/flash.c b/board/smdk2410/flash.c
deleted file mode 100644
index 993946be93..0000000000
--- a/board/smdk2410/flash.c
+++ /dev/null
@@ -1,433 +0,0 @@
-/*
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Alex Zuepke <azu@sysgo.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-
-ulong myflush (void);
-
-
-#define FLASH_BANK_SIZE PHYS_FLASH_SIZE
-#define MAIN_SECT_SIZE 0x10000 /* 64 KB */
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
-
-
-#define CMD_READ_ARRAY 0x000000F0
-#define CMD_UNLOCK1 0x000000AA
-#define CMD_UNLOCK2 0x00000055
-#define CMD_ERASE_SETUP 0x00000080
-#define CMD_ERASE_CONFIRM 0x00000030
-#define CMD_PROGRAM 0x000000A0
-#define CMD_UNLOCK_BYPASS 0x00000020
-
-#define MEM_FLASH_ADDR1 (*(volatile u16 *)(CFG_FLASH_BASE + (0x00000555 << 1)))
-#define MEM_FLASH_ADDR2 (*(volatile u16 *)(CFG_FLASH_BASE + (0x000002AA << 1)))
-
-#define BIT_ERASE_DONE 0x00000080
-#define BIT_RDY_MASK 0x00000080
-#define BIT_PROGRAM_ERROR 0x00000020
-#define BIT_TIMEOUT 0x80000000 /* our flag */
-
-#define READY 1
-#define ERR 2
-#define TMO 4
-
-/*-----------------------------------------------------------------------
- */
-
-ulong flash_init (void)
-{
- int i, j;
- ulong size = 0;
-
- for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
- ulong flashbase = 0;
-
- flash_info[i].flash_id =
-#if defined(CONFIG_AMD_LV400)
- (AMD_MANUFACT & FLASH_VENDMASK) |
- (AMD_ID_LV400B & FLASH_TYPEMASK);
-#elif defined(CONFIG_AMD_LV800)
- (AMD_MANUFACT & FLASH_VENDMASK) |
- (AMD_ID_LV800B & FLASH_TYPEMASK);
-#else
-#error "Unknown flash configured"
-#endif
- flash_info[i].size = FLASH_BANK_SIZE;
- flash_info[i].sector_count = CFG_MAX_FLASH_SECT;
- memset (flash_info[i].protect, 0, CFG_MAX_FLASH_SECT);
- if (i == 0)
- flashbase = PHYS_FLASH_1;
- else
- panic ("configured too many flash banks!\n");
- for (j = 0; j < flash_info[i].sector_count; j++) {
- if (j <= 3) {
- /* 1st one is 16 KB */
- if (j == 0) {
- flash_info[i].start[j] =
- flashbase + 0;
- }
-
- /* 2nd and 3rd are both 8 KB */
- if ((j == 1) || (j == 2)) {
- flash_info[i].start[j] =
- flashbase + 0x4000 + (j -
- 1) *
- 0x2000;
- }
-
- /* 4th 32 KB */
- if (j == 3) {
- flash_info[i].start[j] =
- flashbase + 0x8000;
- }
- } else {
- flash_info[i].start[j] =
- flashbase + (j - 3) * MAIN_SECT_SIZE;
- }
- }
- size += flash_info[i].size;
- }
-
- flash_protect (FLAG_PROTECT_SET,
- CFG_FLASH_BASE,
- CFG_FLASH_BASE + monitor_flash_len - 1,
- &flash_info[0]);
-
- flash_protect (FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0]);
-
- return size;
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t * info)
-{
- int i;
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case (AMD_MANUFACT & FLASH_VENDMASK):
- printf ("AMD: ");
- break;
- default:
- printf ("Unknown Vendor ");
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case (AMD_ID_LV400B & FLASH_TYPEMASK):
- printf ("1x Amd29LV400BB (4Mbit)\n");
- break;
- case (AMD_ID_LV800B & FLASH_TYPEMASK):
- printf ("1x Amd29LV800BB (8Mbit)\n");
- break;
- default:
- printf ("Unknown Chip Type\n");
- goto Done;
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; i++) {
- if ((i % 5) == 0) {
- printf ("\n ");
- }
- printf (" %08lX%s", info->start[i],
- info->protect[i] ? " (RO)" : " ");
- }
- printf ("\n");
-
- Done:;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t * info, int s_first, int s_last)
-{
- ushort result;
- int iflag, cflag, prot, sect;
- int rc = ERR_OK;
- int chip;
-
- /* first look for protection bits */
-
- if (info->flash_id == FLASH_UNKNOWN)
- return ERR_UNKNOWN_FLASH_TYPE;
-
- if ((s_first < 0) || (s_first > s_last)) {
- return ERR_INVAL;
- }
-
- if ((info->flash_id & FLASH_VENDMASK) !=
- (AMD_MANUFACT & FLASH_VENDMASK)) {
- return ERR_UNKNOWN_FLASH_VENDOR;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
- if (prot)
- return ERR_PROTECTED;
-
- /*
- * Disable interrupts which might cause a timeout
- * here. Remember that our exception vectors are
- * at address 0 in the flash, and we don't want a
- * (ticker) exception to happen while the flash
- * chip is in programming mode.
- */
- cflag = icache_status ();
- icache_disable ();
- iflag = disable_interrupts ();
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect <= s_last && !ctrlc (); sect++) {
- printf ("Erasing sector %2d ... ", sect);
-
- /* arm simple, non interrupt dependent timer */
- reset_timer_masked ();
-
- if (info->protect[sect] == 0) { /* not protected */
- vu_short *addr = (vu_short *) (info->start[sect]);
-
- MEM_FLASH_ADDR1 = CMD_UNLOCK1;
- MEM_FLASH_ADDR2 = CMD_UNLOCK2;
- MEM_FLASH_ADDR1 = CMD_ERASE_SETUP;
-
- MEM_FLASH_ADDR1 = CMD_UNLOCK1;
- MEM_FLASH_ADDR2 = CMD_UNLOCK2;
- *addr = CMD_ERASE_CONFIRM;
-
- /* wait until flash is ready */
- chip = 0;
-
- do {
- result = *addr;
-
- /* check timeout */
- if (get_timer_masked () >
- CFG_FLASH_ERASE_TOUT) {
- MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
- chip = TMO;
- break;
- }
-
- if (!chip
- && (result & 0xFFFF) & BIT_ERASE_DONE)
- chip = READY;
-
- if (!chip
- && (result & 0xFFFF) & BIT_PROGRAM_ERROR)
- chip = ERR;
-
- } while (!chip);
-
- MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
-
- if (chip == ERR) {
- rc = ERR_PROG_ERROR;
- goto outahere;
- }
- if (chip == TMO) {
- rc = ERR_TIMOUT;
- goto outahere;
- }
-
- printf ("ok.\n");
- } else { /* it was protected */
-
- printf ("protected!\n");
- }
- }
-
- if (ctrlc ())
- printf ("User Interrupt!\n");
-
- outahere:
- /* allow flash to settle - wait 10 ms */
- udelay_masked (10000);
-
- if (iflag)
- enable_interrupts ();
-
- if (cflag)
- icache_enable ();
-
- return rc;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash
- */
-
-volatile static int write_hword (flash_info_t * info, ulong dest, ushort data)
-{
- vu_short *addr = (vu_short *) dest;
- ushort result;
- int rc = ERR_OK;
- int cflag, iflag;
- int chip;
-
- /*
- * Check if Flash is (sufficiently) erased
- */
- result = *addr;
- if ((result & data) != data)
- return ERR_NOT_ERASED;
-
-
- /*
- * Disable interrupts which might cause a timeout
- * here. Remember that our exception vectors are
- * at address 0 in the flash, and we don't want a
- * (ticker) exception to happen while the flash
- * chip is in programming mode.
- */
- cflag = icache_status ();
- icache_disable ();
- iflag = disable_interrupts ();
-
- MEM_FLASH_ADDR1 = CMD_UNLOCK1;
- MEM_FLASH_ADDR2 = CMD_UNLOCK2;
- MEM_FLASH_ADDR1 = CMD_UNLOCK_BYPASS;
- *addr = CMD_PROGRAM;
- *addr = data;
-
- /* arm simple, non interrupt dependent timer */
- reset_timer_masked ();
-
- /* wait until flash is ready */
- chip = 0;
- do {
- result = *addr;
-
- /* check timeout */
- if (get_timer_masked () > CFG_FLASH_ERASE_TOUT) {
- chip = ERR | TMO;
- break;
- }
- if (!chip && ((result & 0x80) == (data & 0x80)))
- chip = READY;
-
- if (!chip && ((result & 0xFFFF) & BIT_PROGRAM_ERROR)) {
- result = *addr;
-
- if ((result & 0x80) == (data & 0x80))
- chip = READY;
- else
- chip = ERR;
- }
-
- } while (!chip);
-
- *addr = CMD_READ_ARRAY;
-
- if (chip == ERR || *addr != data)
- rc = ERR_PROG_ERROR;
-
- if (iflag)
- enable_interrupts ();
-
- if (cflag)
- icache_enable ();
-
- return rc;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash.
- */
-
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- ulong cp, wp;
- int l;
- int i, rc;
- ushort data;
-
- wp = (addr & ~1); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i = 0, cp = wp; i < l; ++i, ++cp) {
- data = (data >> 8) | (*(uchar *) cp << 8);
- }
- for (; i < 2 && cnt > 0; ++i) {
- data = (data >> 8) | (*src++ << 8);
- --cnt;
- ++cp;
- }
- for (; cnt == 0 && i < 2; ++i, ++cp) {
- data = (data >> 8) | (*(uchar *) cp << 8);
- }
-
- if ((rc = write_hword (info, wp, data)) != 0) {
- return (rc);
- }
- wp += 2;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 2) {
- data = *((vu_short *) src);
- if ((rc = write_hword (info, wp, data)) != 0) {
- return (rc);
- }
- src += 2;
- wp += 2;
- cnt -= 2;
- }
-
- if (cnt == 0) {
- return ERR_OK;
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i = 0, cp = wp; i < 2 && cnt > 0; ++i, ++cp) {
- data = (data >> 8) | (*src++ << 8);
- --cnt;
- }
- for (; i < 2; ++i, ++cp) {
- data = (data >> 8) | (*(uchar *) cp << 8);
- }
-
- return write_hword (info, wp, data);
-}
diff --git a/board/smdk2410/lowlevel_init.S b/board/smdk2410/lowlevel_init.S
deleted file mode 100644
index 310f2a0a94..0000000000
--- a/board/smdk2410/lowlevel_init.S
+++ /dev/null
@@ -1,167 +0,0 @@
-/*
- * Memory Setup stuff - taken from blob memsetup.S
- *
- * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) and
- * Jan-Derk Bakker (J.D.Bakker@its.tudelft.nl)
- *
- * Modified for the Samsung SMDK2410 by
- * (C) Copyright 2002
- * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-
-#include <config.h>
-#include <version.h>
-
-
-/* some parameters for the board */
-
-/*
- *
- * Taken from linux/arch/arm/boot/compressed/head-s3c2410.S
- *
- * Copyright (C) 2002 Samsung Electronics SW.LEE <hitchcar@sec.samsung.com>
- *
- */
-
-#define BWSCON 0x48000000
-
-/* BWSCON */
-#define DW8 (0x0)
-#define DW16 (0x1)
-#define DW32 (0x2)
-#define WAIT (0x1<<2)
-#define UBLB (0x1<<3)
-
-#define B1_BWSCON (DW32)
-#define B2_BWSCON (DW16)
-#define B3_BWSCON (DW16 + WAIT + UBLB)
-#define B4_BWSCON (DW16)
-#define B5_BWSCON (DW16)
-#define B6_BWSCON (DW32)
-#define B7_BWSCON (DW32)
-
-/* BANK0CON */
-#define B0_Tacs 0x0 /* 0clk */
-#define B0_Tcos 0x0 /* 0clk */
-#define B0_Tacc 0x7 /* 14clk */
-#define B0_Tcoh 0x0 /* 0clk */
-#define B0_Tah 0x0 /* 0clk */
-#define B0_Tacp 0x0
-#define B0_PMC 0x0 /* normal */
-
-/* BANK1CON */
-#define B1_Tacs 0x0 /* 0clk */
-#define B1_Tcos 0x0 /* 0clk */
-#define B1_Tacc 0x7 /* 14clk */
-#define B1_Tcoh 0x0 /* 0clk */
-#define B1_Tah 0x0 /* 0clk */
-#define B1_Tacp 0x0
-#define B1_PMC 0x0
-
-#define B2_Tacs 0x0
-#define B2_Tcos 0x0
-#define B2_Tacc 0x7
-#define B2_Tcoh 0x0
-#define B2_Tah 0x0
-#define B2_Tacp 0x0
-#define B2_PMC 0x0
-
-#define B3_Tacs 0x0 /* 0clk */
-#define B3_Tcos 0x3 /* 4clk */
-#define B3_Tacc 0x7 /* 14clk */
-#define B3_Tcoh 0x1 /* 1clk */
-#define B3_Tah 0x0 /* 0clk */
-#define B3_Tacp 0x3 /* 6clk */
-#define B3_PMC 0x0 /* normal */
-
-#define B4_Tacs 0x0 /* 0clk */
-#define B4_Tcos 0x0 /* 0clk */
-#define B4_Tacc 0x7 /* 14clk */
-#define B4_Tcoh 0x0 /* 0clk */
-#define B4_Tah 0x0 /* 0clk */
-#define B4_Tacp 0x0
-#define B4_PMC 0x0 /* normal */
-
-#define B5_Tacs 0x0 /* 0clk */
-#define B5_Tcos 0x0 /* 0clk */
-#define B5_Tacc 0x7 /* 14clk */
-#define B5_Tcoh 0x0 /* 0clk */
-#define B5_Tah 0x0 /* 0clk */
-#define B5_Tacp 0x0
-#define B5_PMC 0x0 /* normal */
-
-#define B6_MT 0x3 /* SDRAM */
-#define B6_Trcd 0x1
-#define B6_SCAN 0x1 /* 9bit */
-
-#define B7_MT 0x3 /* SDRAM */
-#define B7_Trcd 0x1 /* 3clk */
-#define B7_SCAN 0x1 /* 9bit */
-
-/* REFRESH parameter */
-#define REFEN 0x1 /* Refresh enable */
-#define TREFMD 0x0 /* CBR(CAS before RAS)/Auto refresh */
-#define Trp 0x0 /* 2clk */
-#define Trc 0x3 /* 7clk */
-#define Tchr 0x2 /* 3clk */
-#define REFCNT 1113 /* period=15.6us, HCLK=60Mhz, (2048+1-15.6*60) */
-/**************************************/
-
-_TEXT_BASE:
- .word TEXT_BASE
-
-.globl lowlevel_init
-lowlevel_init:
- /* memory control configuration */
- /* make r0 relative the current location so that it */
- /* reads SMRDATA out of FLASH rather than memory ! */
- ldr r0, =SMRDATA
- ldr r1, _TEXT_BASE
- sub r0, r0, r1
- ldr r1, =BWSCON /* Bus Width Status Controller */
- add r2, r0, #13*4
-0:
- ldr r3, [r0], #4
- str r3, [r1], #4
- cmp r2, r0
- bne 0b
-
- /* everything is fine now */
- mov pc, lr
-
- .ltorg
-/* the literal pools origin */
-
-SMRDATA:
- .word (0+(B1_BWSCON<<4)+(B2_BWSCON<<8)+(B3_BWSCON<<12)+(B4_BWSCON<<16)+(B5_BWSCON<<20)+(B6_BWSCON<<24)+(B7_BWSCON<<28))
- .word ((B0_Tacs<<13)+(B0_Tcos<<11)+(B0_Tacc<<8)+(B0_Tcoh<<6)+(B0_Tah<<4)+(B0_Tacp<<2)+(B0_PMC))
- .word ((B1_Tacs<<13)+(B1_Tcos<<11)+(B1_Tacc<<8)+(B1_Tcoh<<6)+(B1_Tah<<4)+(B1_Tacp<<2)+(B1_PMC))
- .word ((B2_Tacs<<13)+(B2_Tcos<<11)+(B2_Tacc<<8)+(B2_Tcoh<<6)+(B2_Tah<<4)+(B2_Tacp<<2)+(B2_PMC))
- .word ((B3_Tacs<<13)+(B3_Tcos<<11)+(B3_Tacc<<8)+(B3_Tcoh<<6)+(B3_Tah<<4)+(B3_Tacp<<2)+(B3_PMC))
- .word ((B4_Tacs<<13)+(B4_Tcos<<11)+(B4_Tacc<<8)+(B4_Tcoh<<6)+(B4_Tah<<4)+(B4_Tacp<<2)+(B4_PMC))
- .word ((B5_Tacs<<13)+(B5_Tcos<<11)+(B5_Tacc<<8)+(B5_Tcoh<<6)+(B5_Tah<<4)+(B5_Tacp<<2)+(B5_PMC))
- .word ((B6_MT<<15)+(B6_Trcd<<2)+(B6_SCAN))
- .word ((B7_MT<<15)+(B7_Trcd<<2)+(B7_SCAN))
- .word ((REFEN<<23)+(TREFMD<<22)+(Trp<<20)+(Trc<<18)+(Tchr<<16)+REFCNT)
- .word 0x32
- .word 0x30
- .word 0x30
diff --git a/board/smdk2410/smdk2410.c b/board/smdk2410/smdk2410.c
deleted file mode 100644
index 9623aeff32..0000000000
--- a/board/smdk2410/smdk2410.c
+++ /dev/null
@@ -1,126 +0,0 @@
-/*
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * (C) Copyright 2002
- * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <s3c2410.h>
-
-/* ------------------------------------------------------------------------- */
-
-#define FCLK_SPEED 1
-
-#if FCLK_SPEED==0 /* Fout = 203MHz, Fin = 12MHz for Audio */
-#define M_MDIV 0xC3
-#define M_PDIV 0x4
-#define M_SDIV 0x1
-#elif FCLK_SPEED==1 /* Fout = 202.8MHz */
-#define M_MDIV 0xA1
-#define M_PDIV 0x3
-#define M_SDIV 0x1
-#endif
-
-#define USB_CLOCK 1
-
-#if USB_CLOCK==0
-#define U_M_MDIV 0xA1
-#define U_M_PDIV 0x3
-#define U_M_SDIV 0x1
-#elif USB_CLOCK==1
-#define U_M_MDIV 0x48
-#define U_M_PDIV 0x3
-#define U_M_SDIV 0x2
-#endif
-
-static inline void delay (unsigned long loops)
-{
- __asm__ volatile ("1:\n"
- "subs %0, %1, #1\n"
- "bne 1b":"=r" (loops):"0" (loops));
-}
-
-/*
- * Miscellaneous platform dependent initialisations
- */
-
-int board_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
- S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
- S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
-
- /* to reduce PLL lock time, adjust the LOCKTIME register */
- clk_power->LOCKTIME = 0xFFFFFF;
-
- /* configure MPLL */
- clk_power->MPLLCON = ((M_MDIV << 12) + (M_PDIV << 4) + M_SDIV);
-
- /* some delay between MPLL and UPLL */
- delay (4000);
-
- /* configure UPLL */
- clk_power->UPLLCON = ((U_M_MDIV << 12) + (U_M_PDIV << 4) + U_M_SDIV);
-
- /* some delay between MPLL and UPLL */
- delay (8000);
-
- /* set up the I/O ports */
- gpio->GPACON = 0x007FFFFF;
- gpio->GPBCON = 0x00044555;
- gpio->GPBUP = 0x000007FF;
- gpio->GPCCON = 0xAAAAAAAA;
- gpio->GPCUP = 0x0000FFFF;
- gpio->GPDCON = 0xAAAAAAAA;
- gpio->GPDUP = 0x0000FFFF;
- gpio->GPECON = 0xAAAAAAAA;
- gpio->GPEUP = 0x0000FFFF;
- gpio->GPFCON = 0x000055AA;
- gpio->GPFUP = 0x000000FF;
- gpio->GPGCON = 0xFF95FFBA;
- gpio->GPGUP = 0x0000FFFF;
- gpio->GPHCON = 0x002AFAAA;
- gpio->GPHUP = 0x000007FF;
-
- /* arch number of SMDK2410-Board */
- gd->bd->bi_arch_number = MACH_TYPE_SMDK2410;
-
- /* adress of boot parameters */
- gd->bd->bi_boot_params = 0x30000100;
-
- icache_enable();
- dcache_enable();
-
- return 0;
-}
-
-int dram_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
-
- return 0;
-}
diff --git a/board/smdk2410/u-boot.lds b/board/smdk2410/u-boot.lds
deleted file mode 100644
index f4fbf969c3..0000000000
--- a/board/smdk2410/u-boot.lds
+++ /dev/null
@@ -1,57 +0,0 @@
-/*
- * (C) Copyright 2002
- * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-/*OUTPUT_FORMAT("elf32-arm", "elf32-arm", "elf32-arm")*/
-OUTPUT_ARCH(arm)
-ENTRY(_start)
-SECTIONS
-{
- . = 0x00000000;
-
- . = ALIGN(4);
- .text :
- {
- cpu/arm920t/start.o (.text)
- *(.text)
- }
-
- . = ALIGN(4);
- .rodata : { *(.rodata) }
-
- . = ALIGN(4);
- .data : { *(.data) }
-
- . = ALIGN(4);
- .got : { *(.got) }
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = ALIGN(4);
- __bss_start = .;
- .bss : { *(.bss) }
- _end = .;
-}
diff --git a/board/snmc/qs850/Makefile b/board/snmc/qs850/Makefile
deleted file mode 100644
index e5d8446313..0000000000
--- a/board/snmc/qs850/Makefile
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# (C) Copyright 2000-2003
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/snmc/qs850/config.mk b/board/snmc/qs850/config.mk
deleted file mode 100644
index 905f692698..0000000000
--- a/board/snmc/qs850/config.mk
+++ /dev/null
@@ -1,29 +0,0 @@
-#
-# (C) Copyright 2002-2003
-# Simple Network Magic Corporation, dnevil@snmc.com
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# QS850
-# Start address of Bootloader in Flash
-#
-
-TEXT_BASE = 0xFFF00000
diff --git a/board/snmc/qs850/flash.c b/board/snmc/qs850/flash.c
deleted file mode 100644
index d2f169b88e..0000000000
--- a/board/snmc/qs850/flash.c
+++ /dev/null
@@ -1,616 +0,0 @@
-/*
- * (C) Copyright 2003
- * MuLogic B.V.
- *
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <ppc4xx.h>
-#include <asm/u-boot.h>
-#include <asm/processor.h>
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-
-#define FLASH_WORD_SIZE unsigned long
-#define FLASH_ID_MASK 0xFFFFFFFF
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-/* stolen from esteem192e/flash.c */
-ulong flash_get_size (volatile FLASH_WORD_SIZE *addr, flash_info_t *info);
-
-static int write_word (flash_info_t *info, ulong dest, ulong data);
-static void flash_get_offsets (ulong base, flash_info_t *info);
-
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- unsigned long size_b0, size_b1;
- int i;
- uint pbcr;
- unsigned long base_b0, base_b1;
- volatile FLASH_WORD_SIZE* flash_base;
-
- /* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* Static FLASH Bank configuration here */
- /* Test for 8M Flash first */
- debug ("\n## Get flash bank 1 size @ 0x%08x\n",FLASH_BASE0_8M_PRELIM);
- flash_base = (volatile FLASH_WORD_SIZE*)(FLASH_BASE0_8M_PRELIM);
- size_b0 = flash_get_size(flash_base, &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size_b0, size_b0<<20);
- return 0;
- }
-
- if (size_b0 < 8*1024*1024) {
- /* Not quite 8M, try 4M Flash base address */
- debug ("\n## Get flash bank 1 size @ 0x%08x\n",FLASH_BASE0_4M_PRELIM);
- flash_base = (volatile FLASH_WORD_SIZE*)(FLASH_BASE0_4M_PRELIM);
- size_b0 = flash_get_size(flash_base, &flash_info[0]);
- }
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size_b0, size_b0<<20);
- return 0;
- }
-
- /* Only one bank */
- if (CFG_MAX_FLASH_BANKS == 1) {
- /* Setup offsets */
- flash_get_offsets ((ulong)flash_base, &flash_info[0]);
-
- /* Monitor protection ON by default */
- (void)flash_protect(FLAG_PROTECT_SET, CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+CFG_MONITOR_LEN-1, &flash_info[0]);
- size_b1 = 0 ;
- flash_info[0].size = size_b0;
- return(size_b0);
- }
-
- /* We have 2 banks */
- size_b1 = flash_get_size(flash_base, &flash_info[1]);
-
- /* Re-do sizing to get full correct info */
- if (size_b1) {
- mtdcr(ebccfga, pb0cr);
- pbcr = mfdcr(ebccfgd);
- mtdcr(ebccfga, pb0cr);
- base_b1 = -size_b1;
- pbcr = (pbcr & 0x0001ffff) | base_b1 | (((size_b1/1024/1024)-1)<<17);
- mtdcr(ebccfgd, pbcr);
- }
-
- if (size_b0) {
- mtdcr(ebccfga, pb1cr);
- pbcr = mfdcr(ebccfgd);
- mtdcr(ebccfga, pb1cr);
- base_b0 = base_b1 - size_b0;
- pbcr = (pbcr & 0x0001ffff) | base_b0 | (((size_b0/1024/1024)-1)<<17);
- mtdcr(ebccfgd, pbcr);
- }
-
- size_b0 = flash_get_size((volatile FLASH_WORD_SIZE *)base_b0, &flash_info[0]);
- flash_get_offsets (base_b0, &flash_info[0]);
-
- /* monitor protection ON by default */
- (void)flash_protect(FLAG_PROTECT_SET, CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+CFG_MONITOR_LEN-1, &flash_info[0]);
-
- if (size_b1) {
- /* Re-do sizing to get full correct info */
- size_b1 = flash_get_size((volatile FLASH_WORD_SIZE *)base_b1, &flash_info[1]);
- flash_get_offsets (base_b1, &flash_info[1]);
-
- /* monitor protection ON by default */
- (void)flash_protect(FLAG_PROTECT_SET, base_b1+size_b1-CFG_MONITOR_LEN,
- base_b1+size_b1-1, &flash_info[1]);
-
- /* monitor protection OFF by default (one is enough) */
- (void)flash_protect(FLAG_PROTECT_CLEAR, base_b0+size_b0-CFG_MONITOR_LEN,
- base_b0+size_b0-1, &flash_info[0]);
- } else {
- flash_info[1].flash_id = FLASH_UNKNOWN;
- flash_info[1].sector_count = -1;
- }
-
- flash_info[0].size = size_b0;
- flash_info[1].size = size_b1;
- return (size_b0 + size_b1);
-}
-
-
-/*-----------------------------------------------------------------------
- This code is specific to the AM29DL163/AM29DL232 for the QS850/QS823.
- */
-
-static void flash_get_offsets (ulong base, flash_info_t *info)
-{
- int i;
- long large_sect_size;
- long small_sect_size;
-
- /* set up sector start adress table */
- large_sect_size = info->size / (info->sector_count - 8 + 1);
- small_sect_size = large_sect_size / 8;
-
- if (info->flash_id & FLASH_BTYPE) {
-
- /* set sector offsets for bottom boot block type */
- for (i = 0; i < 7; i++) {
- info->start[i] = base;
- base += small_sect_size;
- }
-
- for (; i < info->sector_count; i++) {
- info->start[i] = base;
- base += large_sect_size;
- }
- }
- else
- {
- /* set sector offsets for top boot block type */
- for (i = 0; i < (info->sector_count - 8); i++) {
- info->start[i] = base;
- base += large_sect_size;
- }
-
- for (; i < info->sector_count; i++) {
- info->start[i] = base;
- base += small_sect_size;
- }
- }
-}
-
-/*-----------------------------------------------------------------------
- */
-
-void flash_print_info (flash_info_t *info)
-{
- int i;
- uchar *boottype;
- uchar botboot[]=", bottom boot sect)\n";
- uchar topboot[]=", top boot sector)\n";
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD:
- printf ("AMD ");
- break;
- case FLASH_MAN_FUJ:
- printf ("FUJITSU ");
- break;
- case FLASH_MAN_SST:
- printf ("SST ");
- break;
- case FLASH_MAN_STM:
- printf ("STM ");
- break;
- case FLASH_MAN_INTEL:
- printf ("INTEL ");
- break;
- default:
- printf ("Unknown Vendor ");
- break;
- }
-
- if (info->flash_id & 0x0001 ) {
- boottype = botboot;
- } else {
- boottype = topboot;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM160B:
- printf ("AM29LV160B (16 Mbit%s",boottype);
- break;
- case FLASH_AM160T:
- printf ("AM29LV160T (16 Mbit%s",boottype);
- break;
- case FLASH_AMDL163T:
- printf ("AM29DL163T (16 Mbit%s",boottype);
- break;
- case FLASH_AMDL163B:
- printf ("AM29DL163B (16 Mbit%s",boottype);
- break;
- case FLASH_AM320B:
- printf ("AM29LV320B (32 Mbit%s",boottype);
- break;
- case FLASH_AM320T:
- printf ("AM29LV320T (32 Mbit%s",boottype);
- break;
- case FLASH_AMDL323T:
- printf ("AM29DL323T (32 Mbit%s",boottype);
- break;
- case FLASH_AMDL323B:
- printf ("AM29DL323B (32 Mbit%s",boottype);
- break;
- case FLASH_AMDL322T:
- printf ("AM29DL322T (32 Mbit%s",boottype);
- break;
- default:
- printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s", info->start[i],
- info->protect[i] ? " (RO)" : " ");
- }
- printf ("\n");
- return;
-}
-
-
-/*-----------------------------------------------------------------------
- * The following code cannot be run from FLASH!
- */
-ulong flash_get_size (volatile FLASH_WORD_SIZE *addr, flash_info_t *info)
-{
- short i;
- ulong base = (ulong)addr;
- FLASH_WORD_SIZE value;
-
- /* Write auto select command: read Manufacturer ID */
-
- /*
- * Note: if it is an AMD flash and the word at addr[0000]
- * is 0x00890089 this routine will think it is an Intel
- * flash device and may(most likely) cause trouble.
- */
-
- addr[0x0000] = 0x00900090;
- if(addr[0x0000] != 0x00890089){
- addr[0x0555] = 0x00AA00AA;
- addr[0x02AA] = 0x00550055;
- addr[0x0555] = 0x00900090;
- }
- value = addr[0];
-
- switch (value) {
- case (AMD_MANUFACT & FLASH_ID_MASK):
- info->flash_id = FLASH_MAN_AMD;
- break;
- case (FUJ_MANUFACT & FLASH_ID_MASK):
- info->flash_id = FLASH_MAN_FUJ;
- break;
- case (STM_MANUFACT & FLASH_ID_MASK):
- info->flash_id = FLASH_MAN_STM;
- break;
- case (SST_MANUFACT & FLASH_ID_MASK):
- info->flash_id = FLASH_MAN_SST;
- break;
- case (INTEL_MANUFACT & FLASH_ID_MASK):
- info->flash_id = FLASH_MAN_INTEL;
- break;
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- return (0); /* no or unknown flash */
- }
-
- value = addr[1]; /* device ID */
-
- switch (value) {
- case (AMD_ID_LV160T & FLASH_ID_MASK):
- info->flash_id += FLASH_AM160T;
- info->sector_count = 35;
- info->size = 0x00400000;
- break; /* => 4 MB */
-
- case (AMD_ID_LV160B & FLASH_ID_MASK):
- info->flash_id += FLASH_AM160B;
- info->sector_count = 35;
- info->size = 0x00400000;
- break; /* => 4 MB */
-
- case (AMD_ID_DL163T & FLASH_ID_MASK):
- info->flash_id += FLASH_AMDL163T;
- info->sector_count = 39;
- info->size = 0x00400000;
- break; /* => 4 MB */
-
- case (AMD_ID_DL163B & FLASH_ID_MASK):
- info->flash_id += FLASH_AMDL163B;
- info->sector_count = 39;
- info->size = 0x00400000;
- break; /* => 4 MB */
-
- case (AMD_ID_DL323T & FLASH_ID_MASK):
- info->flash_id += FLASH_AMDL323T;
- info->sector_count = 71;
- info->size = 0x00800000;
- break; /* => 8 MB */
-
- case (AMD_ID_DL323B & FLASH_ID_MASK):
- info->flash_id += FLASH_AMDL323B;
- info->sector_count = 71;
- info->size = 0x00800000;
- break; /* => 8 MB */
-
- case (AMD_ID_DL322T & FLASH_ID_MASK):
- info->flash_id += FLASH_AMDL322T;
- info->sector_count = 71;
- info->size = 0x00800000;
- break; /* => 8 MB */
-
- default:
- /* FIXME*/
- info->flash_id = FLASH_UNKNOWN;
- return (0); /* => no or unknown flash */
- }
-
- flash_get_offsets(base, info);
-
- /* check for protected sectors */
- for (i = 0; i < info->sector_count; i++) {
- /* read sector protection at sector address, (A7 .. A0) = 0x02 */
- /* D0 = 1 if protected */
- addr = (volatile FLASH_WORD_SIZE *)(info->start[i]);
- info->protect[i] = addr[2] & 1;
- }
-
- /*
- * Prevent writes to uninitialized FLASH.
- */
- if (info->flash_id != FLASH_UNKNOWN) {
- addr = (volatile FLASH_WORD_SIZE *)info->start[0];
- *addr = (0x00FF00FF & FLASH_ID_MASK); /* reset bank */
- }
-
- return (info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- volatile FLASH_WORD_SIZE *addr=(volatile FLASH_WORD_SIZE*)(info->start[0]);
- int flag, prot, sect, l_sect;
- ulong start, now, last;
- int rcode = 0;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- if ((info->flash_id == FLASH_UNKNOWN) ||
- (info->flash_id > FLASH_AMD_COMP) ) {
- printf ("Can't erase unknown flash type - aborted\n");
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- l_sect = -1;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
- addr[0x0555] = 0x00AA00AA;
- addr[0x02AA] = 0x00550055;
- addr[0x0555] = 0x00800080;
- addr[0x0555] = 0x00AA00AA;
- addr[0x02AA] = 0x00550055;
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr = (volatile FLASH_WORD_SIZE *)(info->start[sect]);
- addr[0] = (0x00300030 & FLASH_ID_MASK);
- l_sect = sect;
- }
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- /*
- * We wait for the last triggered sector
- */
- if (l_sect < 0)
- goto DONE;
-
- start = get_timer (0);
- last = start;
- addr = (volatile FLASH_WORD_SIZE*)(info->start[l_sect]);
- while ((addr[0] & (0x00800080&FLASH_ID_MASK)) !=
- (0x00800080&FLASH_ID_MASK) )
- {
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- return 1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- serial_putc ('.');
- last = now;
- }
- }
-
-DONE:
- /* reset to read mode */
- addr = (volatile FLASH_WORD_SIZE *)info->start[0];
- addr[0] = (0x00F000F0 & FLASH_ID_MASK); /* reset bank */
-
- printf (" done\n");
- return rcode;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int l;
- int i, rc;
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
- for (; i<4 && cnt>0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = 0;
- for (i=0; i<4; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- return (write_word(info, wp, data));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word (flash_info_t *info, ulong dest, ulong data)
-{
- vu_long *addr = (vu_long*)(info->start[0]);
- ulong start;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*((vu_long *)dest) & data) != data) {
- return (2);
- }
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- /* AMD stuff */
- addr[0x0555] = 0x00AA00AA;
- addr[0x02AA] = 0x00550055;
- addr[0x0555] = 0x00A000A0;
-
- *((vu_long *)dest) = data;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* data polling for D7 */
- start = get_timer(0);
-
- while ((*((vu_long *)dest) & 0x00800080) != (data & 0x00800080)) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- return (1);
- }
- }
-
- return (0);
-}
diff --git a/board/snmc/qs850/qs850.c b/board/snmc/qs850/qs850.c
deleted file mode 100644
index 637f1250e9..0000000000
--- a/board/snmc/qs850/qs850.c
+++ /dev/null
@@ -1,229 +0,0 @@
-/*
- * (C) Copyright 2003
- * MuLogic B.V.
- *
- * (C) Copyright 2002
- * Simple Network Magic Corporation, dnevil@snmc.com
- *
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/u-boot.h>
-#include <commproc.h>
-#include "mpc8xx.h"
-
-/* ------------------------------------------------------------------------- */
-
-static long int dram_size (long int, long int *, long int);
-
-/* ------------------------------------------------------------------------- */
-
-const uint sdram_table[] =
-{
- /*
- * Single Read. (Offset 0 in UPMA RAM)
- */
- 0x0f07cc04, 0x00adcc04, 0x00a74c00, 0x00bfcc04,
- 0x1fffcc05, 0xffffcc05, 0xffffcc05, 0xffffcc05,
- /*
- * Burst Read. (Offset 8 in UPMA RAM)
- */
- 0x0ff7fc04, 0x0ffffc04, 0x00bdfc04, 0x00fffc00,
- 0x00fffc00, 0x00fffc00, 0x0ff77c00, 0x1ffffc05,
- 0x1ffffc05, 0x1ffffc05, 0x1ffffc05, 0x1ffffc05,
- 0x1ffffc05, 0x1ffffc05, 0x1ffffc05, 0x1ffffc05,
- /*
- * Single Write. (Offset 18 in UPMA RAM)
- */
- 0x0f07cc04, 0x0fafcc00, 0x01ad0c04, 0x1ff74c07,
- 0xffffcc05, 0xffffcc05, 0xffffcc05, 0xffffcc05,
- /*
- * Burst Write. (Offset 20 in UPMA RAM)
- */
- 0x0ff7fc04, 0x0ffffc00, 0x00bd7c00, 0x00fffc00,
- 0x00fffc00, 0x00fffc00, 0x0ffffc04, 0x0ff77c04,
- 0x1ffffc05, 0x1ffffc05, 0x1ffffc05, 0x1ffffc05,
- 0x1ffffc05, 0x1ffffc05, 0x1ffffc05, 0x1ffffc05,
- /*
- * Refresh (Offset 30 in UPMA RAM)
- */
- 0xffffcc04, 0x1ff5cc84, 0xffffcc04, 0xffffcc04,
- 0xffffcc84, 0xffffcc05, 0xffffcc04, 0xffffcc04,
- 0xffffcc04, 0xffffcc04, 0xffffcc04, 0xffffcc04,
- /*
- * Exception. (Offset 3c in UPMA RAM)
- */
- 0x1ff74c04, 0xffffcc07, 0xffffaa34, 0x1fb54a37
-};
-
-/* ------------------------------------------------------------------------- */
-
-
-/*
- * Check Board Identity:
- *
- * Test ID string (QS850, QS823, ...)
- *
- * Always return 1
- */
-
-int checkboard (void)
-{
- char *s, *e;
- char buf[64];
- int i;
-
- i = getenv_r("serial#", buf, sizeof(buf));
- s = (i>0) ? buf : NULL;
-
-#ifdef CONFIG_QS850
- if (!s || strncmp(s, "QS850", 5)) {
- puts ("### No HW ID - assuming QS850");
-#endif
-#ifdef CONFIG_QS823
- if (!s || strncmp(s, "QS823", 5)) {
- puts ("### No HW ID - assuming QS823");
-#endif
- } else {
- for (e=s; *e; ++e) {
- if (*e == ' ')
- break;
- }
-
- for ( ; s<e; ++s) {
- putc (*s);
- }
- }
- putc ('\n');
-
- return (0);
-}
-
-/* ------------------------------------------------------------------------- */
-/* SDRAM Mode Register Definitions */
-
-/* Set SDRAM Burst Length to 4 (010) */
-/* See Motorola MPC850 User Manual, Page 13-14 */
-#define SDRAM_BURST_LENGTH (2)
-
-/* Set Wrap Type to Sequential (0) */
-/* See Motorola MPC850 User Manual, Page 13-14 */
-#define SDRAM_WRAP_TYPE (0 << 3)
-
-/* Set /CAS Latentcy to 2 clocks */
-#define SDRAM_CAS_LATENTCY (2 << 4)
-
-/* The Mode Register value must be shifted left by 2, since it is */
-/* placed on the address bus, and the 2 LSBs are ignored for 32-bit accesses */
-#define SDRAM_MODE_REG ((SDRAM_BURST_LENGTH|SDRAM_WRAP_TYPE|SDRAM_CAS_LATENTCY) << 2)
-
-#define UPMA_RUN(loops,index) (0x80002000 + (loops<<8) + index)
-
-/* Please note a value of zero = 16 loops */
-#define REFRESH_INIT_LOOPS (0)
-
-
-long int initdram (int board_type)
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- long int size;
-
- upmconfig(UPMA, (uint *)sdram_table, sizeof(sdram_table)/sizeof(uint));
-
- /*
- * Prescaler for refresh
- */
- memctl->memc_mptpr = CFG_MPTPR;
-
- /*
- * Map controller bank 1 to the SDRAM address
- */
- memctl->memc_or1 = CFG_OR1;
- memctl->memc_br1 = CFG_BR1;
- udelay(1000);
-
- /* perform SDRAM initialization sequence */
- memctl->memc_mamr = CFG_16M_MAMR;
- udelay(100);
-
- /* Program the SDRAM's Mode Register */
- memctl->memc_mar = SDRAM_MODE_REG;
-
- /* Run the Prechard Pattern at 0x3C */
- memctl->memc_mcr = UPMA_RUN(1,0x3c);
- udelay(1);
-
- /* Run the Refresh program residing at MAD index 0x30 */
- /* This contains the CBR Refresh command with a loop */
- /* The SDRAM must be refreshed at least 2 times */
- /* Please note a value of zero = 16 loops */
- memctl->memc_mcr = UPMA_RUN(REFRESH_INIT_LOOPS,0x30);
- udelay(1);
-
- /* Run the Exception program residing at MAD index 0x3E */
- /* This contains the Write Mode Register command */
- /* The Write Mode Register command uses the value written to MAR */
- memctl->memc_mcr = UPMA_RUN(1,0x3e);
-
- udelay (1000);
-
- /*
- * Check for 32M SDRAM Memory Size
- */
- size = dram_size(CFG_32M_MAMR|MAMR_PTAE,
- (long *)SDRAM_BASE, SDRAM_32M_MAX_SIZE);
- udelay (1000);
-
- /*
- * Check for 16M SDRAM Memory Size
- */
- if (size != SDRAM_32M_MAX_SIZE) {
- size = dram_size(CFG_16M_MAMR|MAMR_PTAE,
- (long *)SDRAM_BASE, SDRAM_16M_MAX_SIZE);
- udelay (1000);
- }
-
- udelay(10000);
- return (size);
-}
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Check memory range for valid RAM. A simple memory test determines
- * the actually available RAM size between addresses `base' and
- * `base + maxsize'. Some (not all) hardware errors are detected:
- * - short between address lines
- * - short between data lines
- */
-
-static long int dram_size (long int mamr_value, long int *base, long int maxsize)
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
-
- memctl->memc_mamr = mamr_value;
-
- return (get_ram_size(base, maxsize));
-}
diff --git a/board/snmc/qs850/u-boot.lds b/board/snmc/qs850/u-boot.lds
deleted file mode 100644
index cb3f456a0e..0000000000
--- a/board/snmc/qs850/u-boot.lds
+++ /dev/null
@@ -1,144 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc8xx/start.o (.text)
- cpu/mpc8xx/traps.o (.text)
- common/dlmalloc.o (.text)
- lib_ppc/ppcstring.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
- lib_generic/zlib.o (.text)
- lib_ppc/cache.o (.text)
- lib_ppc/time.o (.text)
-
- . = DEFINED(env_offset) ? env_offset : .;
- common/environment.o (.ppcenv)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/snmc/qs860t/Makefile b/board/snmc/qs860t/Makefile
deleted file mode 100644
index 13ce9fc9d2..0000000000
--- a/board/snmc/qs860t/Makefile
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/snmc/qs860t/config.mk b/board/snmc/qs860t/config.mk
deleted file mode 100644
index f6ab2607b4..0000000000
--- a/board/snmc/qs860t/config.mk
+++ /dev/null
@@ -1,29 +0,0 @@
-#
-# (C) Copyright 2002
-# Simple Network Magic Corporation, dnevil@snmc.com
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# QS860T
-# Start address of 512K Socketed Flash
-#
-
-TEXT_BASE = 0xFFF00000
diff --git a/board/snmc/qs860t/flash.c b/board/snmc/qs860t/flash.c
deleted file mode 100644
index c84d08d628..0000000000
--- a/board/snmc/qs860t/flash.c
+++ /dev/null
@@ -1,1120 +0,0 @@
-/*
- * (C) Copyright 2003
- * MuLogic B.V.
- *
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <ppc4xx.h>
-#include <asm/u-boot.h>
-#include <asm/processor.h>
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-
-#ifdef CFG_FLASH_16BIT
-#define FLASH_WORD_SIZE unsigned short
-#define FLASH_ID_MASK 0xFFFF
-#else
-#define FLASH_WORD_SIZE unsigned long
-#define FLASH_ID_MASK 0xFFFFFFFF
-#endif
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-/* stolen from esteem192e/flash.c */
-ulong flash_get_size (volatile FLASH_WORD_SIZE *addr, flash_info_t *info);
-
-#ifndef CFG_FLASH_16BIT
-static int write_word (flash_info_t *info, ulong dest, ulong data);
-#else
-static int write_short (flash_info_t *info, ulong dest, ushort data);
-#endif
-static void flash_get_offsets (ulong base, flash_info_t *info);
-
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- unsigned long size_b0, size_b1;
- int i;
- uint pbcr;
- unsigned long base_b0, base_b1;
-
- /* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* Static FLASH Bank configuration here - FIXME XXX */
-
- size_b0 = flash_get_size((volatile FLASH_WORD_SIZE *)FLASH_BASE1_PRELIM, &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size_b0, size_b0<<20);
- }
-
- /* Only one bank */
- if (CFG_MAX_FLASH_BANKS == 1)
- {
- /* Setup offsets */
- flash_get_offsets (FLASH_BASE1_PRELIM, &flash_info[0]);
-
- /* Monitor protection ON by default */
-#if 0 /* sand: */
- (void)flash_protect(FLAG_PROTECT_SET,
- FLASH_BASE1_PRELIM-CFG_MONITOR_LEN+size_b0,
- FLASH_BASE1_PRELIM-1+size_b0,
- &flash_info[0]);
-#else
- (void)flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+CFG_MONITOR_LEN-1,
- &flash_info[0]);
-#endif
- size_b1 = 0 ;
- flash_info[0].size = size_b0;
- }
- /* 2 banks */
- else
- {
- size_b1 = flash_get_size((volatile FLASH_WORD_SIZE *)FLASH_BASE1_PRELIM, &flash_info[1]);
-
- /* Re-do sizing to get full correct info */
- if (size_b1)
- {
- mtdcr(ebccfga, pb0cr);
- pbcr = mfdcr(ebccfgd);
- mtdcr(ebccfga, pb0cr);
- base_b1 = -size_b1;
- pbcr = (pbcr & 0x0001ffff) | base_b1 | (((size_b1/1024/1024)-1)<<17);
- mtdcr(ebccfgd, pbcr);
- }
-
- if (size_b0)
- {
- mtdcr(ebccfga, pb1cr);
- pbcr = mfdcr(ebccfgd);
- mtdcr(ebccfga, pb1cr);
- base_b0 = base_b1 - size_b0;
- pbcr = (pbcr & 0x0001ffff) | base_b0 | (((size_b0/1024/1024)-1)<<17);
- mtdcr(ebccfgd, pbcr);
- }
-
- size_b0 = flash_get_size((volatile FLASH_WORD_SIZE *)base_b0, &flash_info[0]);
-
- flash_get_offsets (base_b0, &flash_info[0]);
-
- /* monitor protection ON by default */
-#if 0 /* sand: */
- (void)flash_protect(FLAG_PROTECT_SET,
- FLASH_BASE1_PRELIM-CFG_MONITOR_LEN+size_b0,
- FLASH_BASE1_PRELIM-1+size_b0,
- &flash_info[0]);
-#else
- (void)flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+CFG_MONITOR_LEN-1,
- &flash_info[0]);
-#endif
-
- if (size_b1) {
- /* Re-do sizing to get full correct info */
- size_b1 = flash_get_size((volatile FLASH_WORD_SIZE *)base_b1, &flash_info[1]);
-
- flash_get_offsets (base_b1, &flash_info[1]);
-
- /* monitor protection ON by default */
- (void)flash_protect(FLAG_PROTECT_SET,
- base_b1+size_b1-CFG_MONITOR_LEN,
- base_b1+size_b1-1,
- &flash_info[1]);
- /* monitor protection OFF by default (one is enough) */
- (void)flash_protect(FLAG_PROTECT_CLEAR,
- base_b0+size_b0-CFG_MONITOR_LEN,
- base_b0+size_b0-1,
- &flash_info[0]);
- } else {
- flash_info[1].flash_id = FLASH_UNKNOWN;
- flash_info[1].sector_count = -1;
- }
-
- flash_info[0].size = size_b0;
- flash_info[1].size = size_b1;
- }/* else 2 banks */
- return (size_b0 + size_b1);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-static void flash_get_offsets (ulong base, flash_info_t *info)
-{
- int i;
-
- /* set up sector start adress table */
- if ((info->flash_id & FLASH_TYPEMASK) == INTEL_ID_28F320J3A ||
- (info->flash_id & FLASH_TYPEMASK) == INTEL_ID_28F640J3A ||
- (info->flash_id & FLASH_TYPEMASK) == INTEL_ID_28F128J3A) {
- for (i = 0; i < info->sector_count; i++) {
- info->start[i] = base + (i * info->size/info->sector_count);
- }
- }
- else if (info->flash_id & FLASH_BTYPE) {
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
-
-#ifndef CFG_FLASH_16BIT
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00004000;
- info->start[2] = base + 0x00008000;
- info->start[3] = base + 0x0000C000;
- info->start[4] = base + 0x00010000;
- info->start[5] = base + 0x00014000;
- info->start[6] = base + 0x00018000;
- info->start[7] = base + 0x0001C000;
- for (i = 8; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00020000) - 0x000E0000;
- }
- } else {
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00008000;
- info->start[2] = base + 0x0000C000;
- info->start[3] = base + 0x00010000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00020000) - 0x00060000;
- }
- }
-#else
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00002000;
- info->start[2] = base + 0x00004000;
- info->start[3] = base + 0x00006000;
- info->start[4] = base + 0x00008000;
- info->start[5] = base + 0x0000A000;
- info->start[6] = base + 0x0000C000;
- info->start[7] = base + 0x0000E000;
- for (i = 8; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00010000) - 0x00070000;
- }
- } else {
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00004000;
- info->start[2] = base + 0x00006000;
- info->start[3] = base + 0x00008000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00010000) - 0x00030000;
- }
- }
-#endif
- } else {
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
-
-#ifndef CFG_FLASH_16BIT
- info->start[i--] = base + info->size - 0x00004000;
- info->start[i--] = base + info->size - 0x00008000;
- info->start[i--] = base + info->size - 0x0000C000;
- info->start[i--] = base + info->size - 0x00010000;
- info->start[i--] = base + info->size - 0x00014000;
- info->start[i--] = base + info->size - 0x00018000;
- info->start[i--] = base + info->size - 0x0001C000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00020000;
- }
- } else {
-
- info->start[i--] = base + info->size - 0x00008000;
- info->start[i--] = base + info->size - 0x0000C000;
- info->start[i--] = base + info->size - 0x00010000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00020000;
- }
- }
-#else
- info->start[i--] = base + info->size - 0x00002000;
- info->start[i--] = base + info->size - 0x00004000;
- info->start[i--] = base + info->size - 0x00006000;
- info->start[i--] = base + info->size - 0x00008000;
- info->start[i--] = base + info->size - 0x0000A000;
- info->start[i--] = base + info->size - 0x0000C000;
- info->start[i--] = base + info->size - 0x0000E000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00010000;
- }
- } else {
- info->start[i--] = base + info->size - 0x00004000;
- info->start[i--] = base + info->size - 0x00006000;
- info->start[i--] = base + info->size - 0x00008000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00010000;
- }
- }
-#endif
- }
-}
-
-/*-----------------------------------------------------------------------
- */
-
-void flash_print_info (flash_info_t *info)
-{
- int i;
- uchar *boottype;
- uchar botboot[]=", bottom boot sect)\n";
- uchar topboot[]=", top boot sector)\n";
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD: printf ("AMD "); break;
- case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
- case FLASH_MAN_SST: printf ("SST "); break;
- case FLASH_MAN_STM: printf ("STM "); break;
- case FLASH_MAN_INTEL: printf ("INTEL "); break;
- default: printf ("Unknown Vendor "); break;
- }
-
- if (info->flash_id & 0x0001 ) {
- boottype = botboot;
- } else {
- boottype = topboot;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM400B: printf ("AM29LV400B (4 Mbit%s",boottype);
- break;
- case FLASH_AM400T: printf ("AM29LV400T (4 Mbit%s",boottype);
- break;
- case FLASH_AM800B: printf ("AM29LV800B (8 Mbit%s",boottype);
- break;
- case FLASH_AM800T: printf ("AM29LV800T (8 Mbit%s",boottype);
- break;
- case FLASH_AM160B: printf ("AM29LV160B (16 Mbit%s",boottype);
- break;
- case FLASH_AM160T: printf ("AM29LV160T (16 Mbit%s",boottype);
- break;
- case FLASH_AM320B: printf ("AM29LV320B (32 Mbit%s",boottype);
- break;
- case FLASH_AM320T: printf ("AM29LV320T (32 Mbit%s",boottype);
- break;
- case FLASH_INTEL800B: printf ("INTEL28F800B (8 Mbit%s",boottype);
- break;
- case FLASH_INTEL800T: printf ("INTEL28F800T (8 Mbit%s",boottype);
- break;
- case FLASH_INTEL160B: printf ("INTEL28F160B (16 Mbit%s",boottype);
- break;
- case FLASH_INTEL160T: printf ("INTEL28F160T (16 Mbit%s",boottype);
- break;
- case FLASH_INTEL320B: printf ("INTEL28F320B (32 Mbit%s",boottype);
- break;
- case FLASH_INTEL320T: printf ("INTEL28F320T (32 Mbit%s",boottype);
- break;
- case FLASH_AMDL322T: printf ("AM29DL322T (32 Mbit%s",boottype);
- break;
-
-#if 0 /* enable when devices are available */
-
- case FLASH_INTEL640B: printf ("INTEL28F640B (64 Mbit%s",boottype);
- break;
- case FLASH_INTEL640T: printf ("INTEL28F640T (64 Mbit%s",boottype);
- break;
-#endif
- case INTEL_ID_28F320J3A: printf ("INTEL28F320JA3 (32 Mbit%s",boottype);
- break;
- case INTEL_ID_28F640J3A: printf ("INTEL28F640JA3 (64 Mbit%s",boottype);
- break;
- case INTEL_ID_28F128J3A: printf ("INTEL28F128JA3 (128 Mbit%s",boottype);
- break;
-
- default: printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " "
- );
- }
- printf ("\n");
- return;
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-ulong flash_get_size (volatile FLASH_WORD_SIZE *addr, flash_info_t *info)
-{
- short i;
- ulong base = (ulong)addr;
- FLASH_WORD_SIZE value;
-
- /* Write auto select command: read Manufacturer ID */
-
-
-#ifndef CFG_FLASH_16BIT
-
- /*
- * Note: if it is an AMD flash and the word at addr[0000]
- * is 0x00890089 this routine will think it is an Intel
- * flash device and may(most likely) cause trouble.
- */
-
- addr[0x0000] = 0x00900090;
- if(addr[0x0000] != 0x00890089){
- addr[0x0555] = 0x00AA00AA;
- addr[0x02AA] = 0x00550055;
- addr[0x0555] = 0x00900090;
-#else
-
- /*
- * Note: if it is an AMD flash and the word at addr[0000]
- * is 0x0089 this routine will think it is an Intel
- * flash device and may(most likely) cause trouble.
- */
-
- addr[0x0000] = 0x0090;
-
- if(addr[0x0000] != 0x0089){
- addr[0x0555] = 0x00AA;
- addr[0x02AA] = 0x0055;
- addr[0x0555] = 0x0090;
-#endif
- }
- value = addr[0];
-
- switch (value) {
- case (AMD_MANUFACT & FLASH_ID_MASK):
- info->flash_id = FLASH_MAN_AMD;
- break;
- case (FUJ_MANUFACT & FLASH_ID_MASK):
- info->flash_id = FLASH_MAN_FUJ;
- break;
- case (STM_MANUFACT & FLASH_ID_MASK):
- info->flash_id = FLASH_MAN_STM;
- break;
- case (SST_MANUFACT & FLASH_ID_MASK):
- info->flash_id = FLASH_MAN_SST;
- break;
- case (INTEL_MANUFACT & FLASH_ID_MASK):
- info->flash_id = FLASH_MAN_INTEL;
- break;
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- return (0); /* no or unknown flash */
-
- }
-
- value = addr[1]; /* device ID */
-
- switch (value) {
-
- case (AMD_ID_LV400T & FLASH_ID_MASK):
- info->flash_id += FLASH_AM400T;
- info->sector_count = 11;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case (AMD_ID_LV400B & FLASH_ID_MASK):
- info->flash_id += FLASH_AM400B;
- info->sector_count = 11;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case (AMD_ID_LV800T & FLASH_ID_MASK):
- info->flash_id += FLASH_AM800T;
- info->sector_count = 19;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case (AMD_ID_LV800B & FLASH_ID_MASK):
- info->flash_id += FLASH_AM800B;
- info->sector_count = 19;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case (AMD_ID_LV160T & FLASH_ID_MASK):
- info->flash_id += FLASH_AM160T;
- info->sector_count = 35;
- info->size = 0x00400000;
- break; /* => 4 MB */
-
- case (AMD_ID_LV160B & FLASH_ID_MASK):
- info->flash_id += FLASH_AM160B;
- info->sector_count = 35;
- info->size = 0x00400000;
- break; /* => 4 MB */
-#if 0 /* enable when device IDs are available */
- case (AMD_ID_LV320T & FLASH_ID_MASK):
- info->flash_id += FLASH_AM320T;
- info->sector_count = 67;
- info->size = 0x00800000;
- break; /* => 8 MB */
-
- case (AMD_ID_LV320B & FLASH_ID_MASK):
- info->flash_id += FLASH_AM320B;
- info->sector_count = 67;
- info->size = 0x00800000;
- break; /* => 8 MB */
-#endif
-
- case (AMD_ID_DL322T & FLASH_ID_MASK):
- info->flash_id += FLASH_AMDL322T;
- info->sector_count = 71;
- info->size = 0x00800000;
- break; /* => 8 MB */
-
- case (INTEL_ID_28F800B3T & FLASH_ID_MASK):
- info->flash_id += FLASH_INTEL800T;
- info->sector_count = 23;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case (INTEL_ID_28F800B3B & FLASH_ID_MASK):
- info->flash_id += FLASH_INTEL800B;
- info->sector_count = 23;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case (INTEL_ID_28F160B3T & FLASH_ID_MASK):
- info->flash_id += FLASH_INTEL160T;
- info->sector_count = 39;
- info->size = 0x00400000;
- break; /* => 4 MB */
-
- case (INTEL_ID_28F160B3B & FLASH_ID_MASK):
- info->flash_id += FLASH_INTEL160B;
- info->sector_count = 39;
- info->size = 0x00400000;
- break; /* => 4 MB */
-
- case (INTEL_ID_28F320B3T & FLASH_ID_MASK):
- info->flash_id += FLASH_INTEL320T;
- info->sector_count = 71;
- info->size = 0x00800000;
- break; /* => 8 MB */
-
- case (INTEL_ID_28F320B3B & FLASH_ID_MASK):
- info->flash_id += FLASH_AM320B;
- info->sector_count = 71;
- info->size = 0x00800000;
- break; /* => 8 MB */
-
-#if 0 /* enable when devices are available */
- case (INTEL_ID_28F320B3T & FLASH_ID_MASK):
- info->flash_id += FLASH_INTEL320T;
- info->sector_count = 135;
- info->size = 0x01000000;
- break; /* => 16 MB */
-
- case (INTEL_ID_28F320B3B & FLASH_ID_MASK):
- info->flash_id += FLASH_AM320B;
- info->sector_count = 135;
- info->size = 0x01000000;
- break; /* => 16 MB */
-#endif
- case (INTEL_ID_28F320J3A & FLASH_ID_MASK):
- info->flash_id += FLASH_28F320J3A;
- info->sector_count = 32;
- info->size = 0x00400000;
- break; /* => 32 MBit */
- case (INTEL_ID_28F640J3A & FLASH_ID_MASK):
- info->flash_id += FLASH_28F640J3A;
- info->sector_count = 64;
- info->size = 0x00800000;
- break; /* => 64 MBit */
- case (INTEL_ID_28F128J3A & FLASH_ID_MASK):
- info->flash_id += FLASH_28F128J3A;
- info->sector_count = 128;
- info->size = 0x01000000;
- break; /* => 128 MBit */
-
- default:
- /* FIXME*/
- info->flash_id = FLASH_UNKNOWN;
- return (0); /* => no or unknown flash */
- }
-
- flash_get_offsets(base, info);
-
- /* check for protected sectors */
- for (i = 0; i < info->sector_count; i++) {
- /* read sector protection at sector address, (A7 .. A0) = 0x02 */
- /* D0 = 1 if protected */
- addr = (volatile FLASH_WORD_SIZE *)(info->start[i]);
- info->protect[i] = addr[2] & 1;
- }
-
- /*
- * Prevent writes to uninitialized FLASH.
- */
- if (info->flash_id != FLASH_UNKNOWN) {
- addr = (volatile FLASH_WORD_SIZE *)info->start[0];
- if( (info->flash_id & 0xFF00) == FLASH_MAN_INTEL){
- *addr = (0x00F000F0 & FLASH_ID_MASK); /* reset bank */
- } else {
- *addr = (0x00FF00FF & FLASH_ID_MASK); /* reset bank */
- }
- }
-
- return (info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
-
- volatile FLASH_WORD_SIZE *addr=(volatile FLASH_WORD_SIZE*)(info->start[0]);
- int flag, prot, sect, l_sect, barf;
- ulong start, now, last;
- int rcode = 0;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- if ((info->flash_id == FLASH_UNKNOWN) ||
- ((info->flash_id > FLASH_AMD_COMP) &&
- ( (info->flash_id & FLASH_VENDMASK) != FLASH_MAN_INTEL ) ) ){
- printf ("Can't erase unknown flash type - aborted\n");
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- l_sect = -1;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
- if(info->flash_id < FLASH_AMD_COMP) {
-#ifndef CFG_FLASH_16BIT
- addr[0x0555] = 0x00AA00AA;
- addr[0x02AA] = 0x00550055;
- addr[0x0555] = 0x00800080;
- addr[0x0555] = 0x00AA00AA;
- addr[0x02AA] = 0x00550055;
-#else
- addr[0x0555] = 0x00AA;
- addr[0x02AA] = 0x0055;
- addr[0x0555] = 0x0080;
- addr[0x0555] = 0x00AA;
- addr[0x02AA] = 0x0055;
-#endif
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr = (volatile FLASH_WORD_SIZE *)(info->start[sect]);
- addr[0] = (0x00300030 & FLASH_ID_MASK);
- l_sect = sect;
- }
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- /*
- * We wait for the last triggered sector
- */
- if (l_sect < 0)
- goto DONE;
-
- start = get_timer (0);
- last = start;
- addr = (volatile FLASH_WORD_SIZE*)(info->start[l_sect]);
- while ((addr[0] & (0x00800080&FLASH_ID_MASK)) !=
- (0x00800080&FLASH_ID_MASK) )
- {
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- return 1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- serial_putc ('.');
- last = now;
- }
- }
-
-DONE:
- /* reset to read mode */
- addr = (volatile FLASH_WORD_SIZE *)info->start[0];
- addr[0] = (0x00F000F0 & FLASH_ID_MASK); /* reset bank */
- } else {
-
-
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- barf = 0;
-#ifndef CFG_FLASH_16BIT
- addr = (vu_long*)(info->start[sect]);
- addr[0] = 0x00200020;
- addr[0] = 0x00D000D0;
- while(!(addr[0] & 0x00800080)); /* wait for error or finish */
- if( addr[0] & 0x003A003A) { /* check for error */
- barf = addr[0] & 0x003A0000;
- if( barf ) {
- barf >>=16;
- } else {
- barf = addr[0] & 0x0000003A;
- }
- }
-#else
- addr = (vu_short*)(info->start[sect]);
- addr[0] = 0x0020;
- addr[0] = 0x00D0;
- while(!(addr[0] & 0x0080)); /* wait for error or finish */
- if( addr[0] & 0x003A) /* check for error */
- barf = addr[0] & 0x003A;
-#endif
- if(barf) {
- printf("\nFlash error in sector at %lx\n",(unsigned long)addr);
- if(barf & 0x0002) printf("Block locked, not erased.\n");
- if((barf & 0x0030) == 0x0030)
- printf("Command Sequence error.\n");
- if((barf & 0x0030) == 0x0020)
- printf("Block Erase error.\n");
- if(barf & 0x0008) printf("Vpp Low error.\n");
- rcode = 1;
- } else printf(".");
- l_sect = sect;
- }
- addr = (volatile FLASH_WORD_SIZE *)info->start[0];
- addr[0] = (0x00FF00FF & FLASH_ID_MASK); /* reset bank */
-
- }
-
- }
- printf (" done\n");
- return rcode;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-/*flash_info_t *addr2info (ulong addr)
-{
- flash_info_t *info;
- int i;
-
- for (i=0, info=&flash_info[0]; i<CFG_MAX_FLASH_BANKS; ++i, ++info) {
- if ((addr >= info->start[0]) &&
- (addr < (info->start[0] + info->size)) ) {
- return (info);
- }
- }
-
- return (NULL);
-}
-*/
-/*-----------------------------------------------------------------------
- * Copy memory to flash.
- * Make sure all target addresses are within Flash bounds,
- * and no protected sectors are hit.
- * Returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- * 4 - target range includes protected sectors
- * 8 - target address not in Flash memory
- */
-
-/*int flash_write (uchar *src, ulong addr, ulong cnt)
-{
- int i;
- ulong end = addr + cnt - 1;
- flash_info_t *info_first = addr2info (addr);
- flash_info_t *info_last = addr2info (end );
- flash_info_t *info;
-
- if (cnt == 0) {
- return (0);
- }
-
- if (!info_first || !info_last) {
- return (8);
- }
-
- for (info = info_first; info <= info_last; ++info) {
- ulong b_end = info->start[0] + info->size;*/ /* bank end addr */
-/* short s_end = info->sector_count - 1;
- for (i=0; i<info->sector_count; ++i) {
- ulong e_addr = (i == s_end) ? b_end : info->start[i + 1];
-
- if ((end >= info->start[i]) && (addr < e_addr) &&
- (info->protect[i] != 0) ) {
- return (4);
- }
- }
- }
-
-*/ /* finally write data to flash */
-/* for (info = info_first; info <= info_last && cnt>0; ++info) {
- ulong len;
-
- len = info->start[0] + info->size - addr;
- if (len > cnt)
- len = cnt;
- if ((i = write_buff(info, src, addr, len)) != 0) {
- return (i);
- }
- cnt -= len;
- addr += len;
- src += len;
- }
- return (0);
-}
-*/
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
-#ifndef CFG_FLASH_16BIT
- ulong cp, wp, data;
- int l;
-#else
- ulong cp, wp;
- ushort data;
-#endif
- int i, rc;
-
-#ifndef CFG_FLASH_16BIT
-
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
- for (; i<4 && cnt>0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = 0;
- for (i=0; i<4; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- return (write_word(info, wp, data));
-
-#else
- wp = (addr & ~1); /* get lower word aligned address */
-
- /*
- * handle unaligned start byte
- */
- if (addr - wp) {
- data = 0;
- data = (data << 8) | *src++;
- --cnt;
- if ((rc = write_short(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 2;
- }
-
- /*
- * handle word aligned part
- */
-/* l = 0; used for debuging */
- while (cnt >= 2) {
- data = 0;
- for (i=0; i<2; ++i) {
- data = (data << 8) | *src++;
- }
-
-/* if(!l){
- printf("%x",data);
- l = 1;
- } used for debuging */
-
- if ((rc = write_short(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 2;
- cnt -= 2;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<2 && cnt>0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i<2; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- return (write_short(info, wp, data));
-
-
-#endif
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-#ifndef CFG_FLASH_16BIT
-static int write_word (flash_info_t *info, ulong dest, ulong data)
-{
- vu_long *addr = (vu_long*)(info->start[0]);
- ulong start,barf;
- int flag;
-
-
- /* Check if Flash is (sufficiently) erased */
- if ((*((vu_long *)dest) & data) != data) {
- return (2);
- }
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- if(info->flash_id > FLASH_AMD_COMP) {
- /* AMD stuff */
- addr[0x0555] = 0x00AA00AA;
- addr[0x02AA] = 0x00550055;
- addr[0x0555] = 0x00A000A0;
- } else {
- /* intel stuff */
- *addr = 0x00400040;
- }
- *((vu_long *)dest) = data;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* data polling for D7 */
- start = get_timer (0);
-
- if(info->flash_id > FLASH_AMD_COMP) {
- while ((*((vu_long *)dest) & 0x00800080) != (data & 0x00800080)) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- return (1);
- }
- }
- } else {
- while(!(addr[0] & 0x00800080)) { /* wait for error or finish */
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- return (1);
- }
-
- if( addr[0] & 0x003A003A) { /* check for error */
- barf = addr[0] & 0x003A0000;
- if( barf ) {
- barf >>=16;
- } else {
- barf = addr[0] & 0x0000003A;
- }
- printf("\nFlash write error at address %lx\n",(unsigned long)dest);
- if(barf & 0x0002) printf("Block locked, not erased.\n");
- if(barf & 0x0010) printf("Programming error.\n");
- if(barf & 0x0008) printf("Vpp Low error.\n");
- return(2);
- }
- }
-
- return (0);
-}
-
-#else
-
-static int write_short (flash_info_t *info, ulong dest, ushort data)
-{
- vu_short *addr = (vu_short*)(info->start[0]);
- ulong start,barf;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*((vu_short *)dest) & data) != data) {
- return (2);
- }
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- if(info->flash_id < FLASH_AMD_COMP) {
- /* AMD stuff */
- addr[0x0555] = 0x00AA;
- addr[0x02AA] = 0x0055;
- addr[0x0555] = 0x00A0;
- } else {
- /* intel stuff */
- *addr = 0x00D0;
- *addr = 0x0040;
- }
- *((vu_short *)dest) = data;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* data polling for D7 */
- start = get_timer (0);
-
- if(info->flash_id < FLASH_AMD_COMP) {
- /* AMD stuff */
- while ((*((vu_short *)dest) & 0x0080) != (data & 0x0080)) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- return (1);
- }
- }
-
- } else {
- /* intel stuff */
- while(!(addr[0] & 0x0080)){ /* wait for error or finish */
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) return (1);
- }
-
- if( addr[0] & 0x003A) { /* check for error */
- barf = addr[0] & 0x003A;
- printf("\nFlash write error at address %lx\n",(unsigned long)dest);
- if(barf & 0x0002) printf("Block locked, not erased.\n");
- if(barf & 0x0010) printf("Programming error.\n");
- if(barf & 0x0008) printf("Vpp Low error.\n");
- return(2);
- }
- *addr = 0x00B0;
- *addr = 0x0070;
- while(!(addr[0] & 0x0080)){ /* wait for error or finish */
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) return (1);
- }
- *addr = 0x00FF;
- }
- return (0);
-}
-
-
-#endif
-
-/*-----------------------------------------------------------------------
- */
diff --git a/board/snmc/qs860t/qs860t.c b/board/snmc/qs860t/qs860t.c
deleted file mode 100644
index a11d863010..0000000000
--- a/board/snmc/qs860t/qs860t.c
+++ /dev/null
@@ -1,236 +0,0 @@
-/*
- * (C) Copyright 2003
- * MuLogic B.V.
- *
- * (C) Copyright 2002
- * Simple Network Magic Corporation, dnevil@snmc.com
- *
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/u-boot.h>
-#include <commproc.h>
-#include "mpc8xx.h"
-
-/* ------------------------------------------------------------------------- */
-
-static long int dram_size (long int, long int *, long int);
-
-/* ------------------------------------------------------------------------- */
-
-const uint sdram_table[] =
-{
- /*
- * Single Read. (Offset 0 in UPMA RAM)
- */
- 0x1F07FC04, 0xEEAEFC04, 0x11ADFC04, 0xEFBBBC00,
- 0x1FF77C47, 0x1FF77C35, 0xEFEABC34, 0x1FB57C35,
- /*
- * Burst Read. (Offset 8 in UPMA RAM)
- */
- 0x1F07FC04, 0xEEAEFC04, 0x10ADFC04, 0xF0AFFC00,
- 0xF0AFFC00, 0xF1AFFC00, 0xEFBBBC00, 0x1FF77C47,
- 0xFFFFEC04, 0xFFFFEC04, 0xFFFFEC04, 0xFFFFEC04,
- 0xFFFFEC04, 0xFFFFEC04, 0xFFFFEC04, 0xFFFFEC04,
- /*
- * Single Write. (Offset 18 in UPMA RAM)
- */
- 0x1F27FC04, 0xEEAEBC00, 0x01B93C04, 0x1FF77C47,
- 0xFFFFEC04, 0xFFFFEC04, 0xFFFFEC04, 0xFFFFEC04,
- /*
- * Burst Write. (Offset 20 in UPMA RAM)
- */
- 0x1F07FC04, 0xEEAEBC00, 0x10AD7C00, 0xF0AFFC00,
- 0xF0AFFC00, 0xE1BBBC04, 0x1FF77C47, 0xFFFFEC04,
- 0xFFFFEC04, 0xFFFFEC04, 0xFFFFEC04, 0xFFFFEC04,
- 0xFFFFEC04, 0xFFFFEC04, 0xFFFFEC04, 0xFFFFEC04,
- /*
- * Refresh (Offset 30 in UPMA RAM)
- */
- 0x1FF5FC84, 0xFFFFFC04, 0xFFFFFC04, 0xFFFFFC04,
- 0xFFFFFC84, 0xFFFFFC07, 0xFFFFEC04, 0xFFFFEC04,
- 0xFFFFEC04, 0xFFFFEC04, 0xFFFFEC04, 0xFFFFEC04,
- /*
- * Exception. (Offset 3c in UPMA RAM)
- */
- 0x7FFFFC07, 0xFFFFEC04, 0xFFFFEC04, 0xFFFFEC04
-};
-
-/* ------------------------------------------------------------------------- */
-
-
-/*
- * Check Board Identity:
- *
- * Test ID string (QS860T...)
- *
- * Always return 1
- */
-
-int checkboard (void)
-{
- char *s, *e;
- char buf[64];
- int i;
-
- i = getenv_r("serial#", buf, sizeof(buf));
- s = (i>0) ? buf : NULL;
-
- if (!s || strncmp(s, "QS860T", 6)) {
- puts ("### No HW ID - assuming QS860T");
- } else {
- for (e=s; *e; ++e) {
- if (*e == ' ')
- break;
- }
-
- for ( ; s<e; ++s) {
- putc (*s);
- }
- }
- putc ('\n');
-
- return (0);
-}
-
-/* ------------------------------------------------------------------------- */
-
-long int initdram (int board_type)
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- long int size;
-
- upmconfig(UPMB, (uint *)sdram_table, sizeof(sdram_table)/sizeof(uint));
-
- /*
- * Prescaler for refresh
- */
- memctl->memc_mptpr = 0x0400;
-
- /*
- * Map controller bank 2 to the SDRAM address
- */
- memctl->memc_or2 = CFG_OR2;
- memctl->memc_br2 = CFG_BR2;
- udelay(200);
-
- /* perform SDRAM initialization sequence */
- memctl->memc_mbmr = CFG_16M_MBMR;
- udelay(100);
-
- memctl->memc_mar = 0x00000088;
- memctl->memc_mcr = 0x80804105; /* run precharge pattern */
- udelay(1);
-
- /* Run two refresh cycles on SDRAM */
- memctl->memc_mbmr = 0x18802118;
- memctl->memc_mcr = 0x80804130;
- memctl->memc_mbmr = 0x18802114;
- memctl->memc_mcr = 0x80804106;
-
- udelay (1000);
-
-#if 0
- /*
- * Check for 64M SDRAM Memory Size
- */
- size = dram_size (CFG_64M_MBMR, (ulong *)SDRAM_BASE, SDRAM_64M_MAX_SIZE);
- udelay (1000);
-
- /*
- * Check for 16M SDRAM Memory Size
- */
- if (size != SDRAM_64M_MAX_SIZE) {
-#endif
- size = dram_size (CFG_16M_MBMR, (long *)SDRAM_BASE, SDRAM_16M_MAX_SIZE);
- udelay (1000);
-#if 0
- }
-
- memctl->memc_or2 = ((-size) & 0xFFFF0000) | SDRAM_TIMING;
-#endif
-
-
- udelay(10000);
-
-
-#if 0
-
- /*
- * Also, map other memory to correct position
- */
-
- /*
- * Map the 8M Intel Flash device to chip select 1
- */
- memctl->memc_or1 = CFG_OR1;
- memctl->memc_br1 = CFG_BR1;
-
-
- /*
- * Map 64K NVRAM, Sipex Device, NAND Ctl Reg, and LED Ctl Reg
- * to chip select 3
- */
- memctl->memc_or3 = CFG_OR3;
- memctl->memc_br3 = CFG_BR3;
-
- /*
- * Map chip selects 4, 5, 6, & 7 for external expansion connector
- */
- memctl->memc_or4 = CFG_OR4;
- memctl->memc_br4 = CFG_BR4;
-
- memctl->memc_or5 = CFG_OR5;
- memctl->memc_br5 = CFG_BR5;
-
- memctl->memc_or6 = CFG_OR6;
- memctl->memc_br6 = CFG_BR6;
-
- memctl->memc_or7 = CFG_OR7;
- memctl->memc_br7 = CFG_BR7;
-
-#endif
-
- return (size);
-}
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Check memory range for valid RAM. A simple memory test determines
- * the actually available RAM size between addresses `base' and
- * `base + maxsize'. Some (not all) hardware errors are detected:
- * - short between address lines
- * - short between data lines
- */
-
-static long int dram_size (long int mbmr_value, long int *base, long int maxsize)
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
-
- memctl->memc_mbmr = mbmr_value;
-
- return (get_ram_size(base, maxsize));
-}
diff --git a/board/snmc/qs860t/u-boot.lds b/board/snmc/qs860t/u-boot.lds
deleted file mode 100644
index cb3f456a0e..0000000000
--- a/board/snmc/qs860t/u-boot.lds
+++ /dev/null
@@ -1,144 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc8xx/start.o (.text)
- cpu/mpc8xx/traps.o (.text)
- common/dlmalloc.o (.text)
- lib_ppc/ppcstring.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
- lib_generic/zlib.o (.text)
- lib_ppc/cache.o (.text)
- lib_ppc/time.o (.text)
-
- . = DEFINED(env_offset) ? env_offset : .;
- common/environment.o (.ppcenv)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/sorcery/Makefile b/board/sorcery/Makefile
deleted file mode 100644
index 3d6d673792..0000000000
--- a/board/sorcery/Makefile
+++ /dev/null
@@ -1,45 +0,0 @@
-# (C) Copyright 2005
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := $(BOARD).o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/sorcery/config.mk b/board/sorcery/config.mk
deleted file mode 100644
index 25de0b5a31..0000000000
--- a/board/sorcery/config.mk
+++ /dev/null
@@ -1,29 +0,0 @@
-#
-# (C) Copyright 2003-2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# sorcery board
-#
-
-TEXT_BASE = 0xfff00000
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
diff --git a/board/sorcery/sorcery.c b/board/sorcery/sorcery.c
deleted file mode 100644
index 35d6a06084..0000000000
--- a/board/sorcery/sorcery.c
+++ /dev/null
@@ -1,60 +0,0 @@
-/*
- * (C) Copyright 2004, Freescale Inc.
- * TsiChung Liew, Tsi-Chung.Liew@freescale.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc8220.h>
-#include <asm/processor.h>
-#include <asm/mmu.h>
-#include <pci.h>
-
-long int initdram (int board_type)
-{
- ulong size;
-
- size = dramSetup ();
-
- return get_ram_size((ulong *)CFG_SDRAM_BASE, size);
-}
-
-int checkboard (void)
-{
- puts ("Board: Sorcery-C MPC8220\n");
-
- return 0;
-}
-
-#if defined(CONFIG_PCI)
-/*
- * Initialize PCI devices, report devices found.
- */
-static struct pci_controller hose;
-
-#endif /* CONFIG_PCI */
-
-void pci_init_board (void)
-{
-#ifdef CONFIG_PCI
- extern void pci_mpc8220_init (struct pci_controller *hose);
- pci_mpc8220_init (&hose);
-#endif /* CONFIG_PCI */
-}
diff --git a/board/sorcery/u-boot.lds b/board/sorcery/u-boot.lds
deleted file mode 100644
index 889bc77d2f..0000000000
--- a/board/sorcery/u-boot.lds
+++ /dev/null
@@ -1,125 +0,0 @@
-/*
- * (C) Copyright 2003-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc8220/start.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/spd8xx/Makefile b/board/spd8xx/Makefile
deleted file mode 100644
index 13ce9fc9d2..0000000000
--- a/board/spd8xx/Makefile
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/spd8xx/config.mk b/board/spd8xx/config.mk
deleted file mode 100644
index e1e01929b3..0000000000
--- a/board/spd8xx/config.mk
+++ /dev/null
@@ -1,29 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-# Ulrich Lutz, Speech Design GmbH, ulutz@datalab.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# SPD823TS boards
-#
-
-TEXT_BASE = 0xFF000000
diff --git a/board/spd8xx/flash.c b/board/spd8xx/flash.c
deleted file mode 100644
index 8c0bb4f567..0000000000
--- a/board/spd8xx/flash.c
+++ /dev/null
@@ -1,57 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- /* All Speech Design board memory (DRAM and EPROM) initialisation is
- done in dram_init().
- The caller of ths function here expects the total size and will hang,
- if we give here back 0. So we return the EPROM size. */
-
- return (1024 * 1024); /* 1 MB */
-}
-
-/*-----------------------------------------------------------------------
- */
-
-void flash_print_info (flash_info_t *info)
-{
- printf("no FLASH memory in MPC823TS board\n");
- return;
-}
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- return 1;
-}
-
-/*-----------------------------------------------------------------------
- */
diff --git a/board/spd8xx/spd8xx.c b/board/spd8xx/spd8xx.c
deleted file mode 100644
index c79b9b0dd5..0000000000
--- a/board/spd8xx/spd8xx.c
+++ /dev/null
@@ -1,294 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- * Ulrich Lutz, Speech Design GmbH, ulutz@datalab.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-#include <commproc.h>
-
-/* ------------------------------------------------------------------------- */
-
-static long int dram_size (long int, long int *, long int);
-
-/* ------------------------------------------------------------------------- */
-
-#define _NOT_USED_ 0xFFFFFFFF
-
-const uint sharc_table[] = {
- /*
- * Single Read. (Offset 0 in UPM RAM)
- */
- 0x0FF3FC04, 0x0FF3EC00, 0x7FFFEC04, 0xFFFFEC04,
- 0xFFFFEC05, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Burst Read. (Offset 8 in UPM RAM)
- */
- /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Single Write. (Offset 18 in UPM RAM)
- */
- 0x0FAFFC04, 0x0FAFEC00, 0x7FFFEC04, 0xFFFFEC04,
- 0xFFFFEC05, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Burst Write. (Offset 20 in UPM RAM)
- */
- /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Refresh (Offset 30 in UPM RAM)
- */
- /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Exception. (Offset 3c in UPM RAM)
- */
- 0x7FFFFC07, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_,
-};
-
-
-const uint sdram_table[] = {
- /*
- * Single Read. (Offset 0 in UPM RAM)
- */
- 0x1F07FC04, 0xEEAEFC04, 0x11ADFC04, 0xEFBBBC00,
- 0x1FF77C47, /* last */
- /*
- * SDRAM Initialization (offset 5 in UPM RAM)
- *
- * This is no UPM entry point. The following definition uses
- * the remaining space to establish an initialization
- * sequence, which is executed by a RUN command.
- *
- */
- 0x1FF77C35, 0xEFEABC34, 0x1FB57C35, /* last */
- /*
- * Burst Read. (Offset 8 in UPM RAM)
- */
- 0x1F07FC04, 0xEEAEFC04, 0x10ADFC04, 0xF0AFFC00,
- 0xF0AFFC00, 0xF1AFFC00, 0xEFBBBC00, 0x1FF77C47, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Single Write. (Offset 18 in UPM RAM)
- */
- 0x1F27FC04, 0xEEAEBC00, 0x01B93C04, 0x1FF77C47, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Burst Write. (Offset 20 in UPM RAM)
- */
- 0x1F07FC04, 0xEEAEBC00, 0x10AD7C00, 0xF0AFFC00,
- 0xF0AFFC00, 0xE1BBBC04, 0x1FF77C47, /* last */
- _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Refresh (Offset 30 in UPM RAM)
- */
- 0x1FF5FC84, 0xFFFFFC04, 0xFFFFFC04, 0xFFFFFC04,
- 0xFFFFFC84, 0xFFFFFC07, /* last */
- _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Exception. (Offset 3c in UPM RAM)
- */
- 0x7FFFFC07, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_,
-};
-
-/* ------------------------------------------------------------------------- */
-
-
-/*
- * Check Board Identity:
- *
- */
-
-int checkboard (void)
-{
- puts ("Board: SPD823TS\n");
- return (0);
-}
-
-/* ------------------------------------------------------------------------- */
-
-long int initdram (int board_type)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- long int size_b0;
-
-#if 0
- /*
- * Map controller bank 2 to the SRAM bank at preliminary address.
- */
- memctl->memc_or2 = CFG_OR2;
- memctl->memc_br2 = CFG_BR2;
-#endif
-
- /*
- * Map controller bank 4 to the PER8 bank.
- */
- memctl->memc_or4 = CFG_OR4;
- memctl->memc_br4 = CFG_BR4;
-
-#if 0
- /* Configure SHARC at UMA */
- upmconfig (UPMA, (uint *) sharc_table,
- sizeof (sharc_table) / sizeof (uint));
- /* Map controller bank 5 to the SHARC */
- memctl->memc_or5 = CFG_OR5;
- memctl->memc_br5 = CFG_BR5;
-#endif
-
- memctl->memc_mamr = 0x00001000;
-
- /* Configure SDRAM at UMB */
- upmconfig (UPMB, (uint *) sdram_table,
- sizeof (sdram_table) / sizeof (uint));
-
- memctl->memc_mptpr = CFG_MPTPR_1BK_8K;
-
- memctl->memc_mar = 0x00000088;
-
- /*
- * Map controller bank 3 to the SDRAM bank at preliminary address.
- */
- memctl->memc_or3 = CFG_OR3_PRELIM;
- memctl->memc_br3 = CFG_BR3_PRELIM;
-
- memctl->memc_mbmr = CFG_MBMR_8COL; /* refresh not enabled yet */
-
- udelay (200);
- memctl->memc_mcr = 0x80806105;
- udelay (1);
- memctl->memc_mcr = 0x80806130;
- udelay (1);
- memctl->memc_mcr = 0x80806130;
- udelay (1);
- memctl->memc_mcr = 0x80806106;
-
- memctl->memc_mbmr |= MBMR_PTBE; /* refresh enabled */
-
- /*
- * Check Bank 0 Memory Size for re-configuration
- */
- size_b0 =
- dram_size (CFG_MBMR_8COL, SDRAM_BASE3_PRELIM,
- SDRAM_MAX_SIZE);
-
- memctl->memc_mbmr = CFG_MBMR_8COL | MBMR_PTBE;
-
- return (size_b0);
-}
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Check memory range for valid RAM. A simple memory test determines
- * the actually available RAM size between addresses `base' and
- * `base + maxsize'. Some (not all) hardware errors are detected:
- * - short between address lines
- * - short between data lines
- */
-
-static long int dram_size (long int mamr_value, long int *base,
- long int maxsize)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
-
- memctl->memc_mbmr = mamr_value;
-
- return (get_ram_size (base, maxsize));
-}
-
-/* ------------------------------------------------------------------------- */
-
-void reset_phy (void)
-{
- immap_t *immr = (immap_t *) CFG_IMMR;
- ushort sreg;
-
- /* Configure extra port pins for NS DP83843 PHY */
- immr->im_ioport.iop_papar &= ~(PA_ENET_MDC | PA_ENET_MDIO);
-
- sreg = immr->im_ioport.iop_padir;
- sreg |= PA_ENET_MDC; /* Mgmt. Data Clock is Output */
- sreg &= ~(PA_ENET_MDIO); /* Mgmt. Data I/O is bidirect. => Input */
- immr->im_ioport.iop_padir = sreg;
-
- immr->im_ioport.iop_padat &= ~(PA_ENET_MDC); /* set MDC = 0 */
-
- /*
- * RESET in implemented by a positive pulse of at least 1 us
- * at the reset pin.
- *
- * Configure RESET pins for NS DP83843 PHY, and RESET chip.
- *
- * Note: The RESET pin is high active, but there is an
- * inverter on the SPD823TS board...
- */
- immr->im_ioport.iop_pcpar &= ~(PC_ENET_RESET);
- immr->im_ioport.iop_pcdir |= PC_ENET_RESET;
- /* assert RESET signal of PHY */
- immr->im_ioport.iop_pcdat &= ~(PC_ENET_RESET);
- udelay (10);
- /* de-assert RESET signal of PHY */
- immr->im_ioport.iop_pcdat |= PC_ENET_RESET;
- udelay (10);
-}
-
-/* ------------------------------------------------------------------------- */
-
-void ide_set_reset (int on)
-{
- volatile immap_t *immr = (immap_t *) CFG_IMMR;
-
- /*
- * Configure PC for IDE Reset Pin
- */
- if (on) { /* assert RESET */
- immr->im_ioport.iop_pcdat &= ~(CFG_PC_IDE_RESET);
- } else { /* release RESET */
- immr->im_ioport.iop_pcdat |= CFG_PC_IDE_RESET;
- }
-
- /* program port pin as GPIO output */
- immr->im_ioport.iop_pcpar &= ~(CFG_PC_IDE_RESET);
- immr->im_ioport.iop_pcso &= ~(CFG_PC_IDE_RESET);
- immr->im_ioport.iop_pcdir |= CFG_PC_IDE_RESET;
-}
-
-/* ------------------------------------------------------------------------- */
diff --git a/board/spd8xx/u-boot.lds b/board/spd8xx/u-boot.lds
deleted file mode 100644
index f9150ab3d1..0000000000
--- a/board/spd8xx/u-boot.lds
+++ /dev/null
@@ -1,130 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc8xx/start.o (.text)
- common/environment.o(.text)
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/spd8xx/u-boot.lds.debug b/board/spd8xx/u-boot.lds.debug
deleted file mode 100644
index 650572d4d0..0000000000
--- a/board/spd8xx/u-boot.lds.debug
+++ /dev/null
@@ -1,138 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc8xx/start.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/extable.o (.text)
-
- . = env_offset;
- common/environment.o(.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/ssv/adnpesc1/Makefile b/board/ssv/adnpesc1/Makefile
deleted file mode 100644
index 9182a4ecfe..0000000000
--- a/board/ssv/adnpesc1/Makefile
+++ /dev/null
@@ -1,48 +0,0 @@
-#
-# (C) Copyright 2001-2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := $(BOARD).o flash.o misc.o
-
-SOBJS = vectors.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $^
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/ssv/adnpesc1/adnpesc1.c b/board/ssv/adnpesc1/adnpesc1.c
deleted file mode 100644
index 2f704a0af9..0000000000
--- a/board/ssv/adnpesc1/adnpesc1.c
+++ /dev/null
@@ -1,103 +0,0 @@
-/*
- * (C) Copyright 2004, Li-Pro.Net <www.li-pro.net>
- * Stephan Linz <linz@li-pro.net>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <nios-io.h>
-#include <spi.h>
-
-#if defined(CONFIG_HW_WATCHDOG)
-extern void ssv_wd_pio_init(void); /* comes from ../common/wd_pio.c
- included by ./misc.c */
-#endif
-
-void _default_hdlr (void)
-{
- printf ("default_hdlr\n");
-}
-
-int board_early_init_f (void)
-{
-#if defined(CONFIG_HW_WATCHDOG)
- ssv_wd_pio_init();
-#endif
- return 0;
-}
-
-int checkboard (void)
-{
- puts ( "Board: SSV DilNetPC ADNP/ESC1"
-#if defined(CONFIG_DNPEVA2)
- " on DNP/EVA2"
-#endif
- "\n");
-#if defined(CONFIG_NIOS_BASE_32)
- puts ("Conf.: SSV Base 32 (nios_32)\n");
-#endif
-
- return 0;
-}
-
-long int initdram (int board_type)
-{
- return (0);
-}
-
-/*
- * The following are used to control the SPI chip selects for the SPI command.
- */
-#if (CONFIG_COMMANDS & CFG_CMD_SPI) && CONFIG_NIOS_SPI
-
-#define SPI_RTC_CS_MASK 0x00000001
-
-void spi_rtc_chipsel(int cs)
-{
- nios_spi_t *spi = (nios_spi_t *)CFG_NIOS_SPIBASE;
-
- if (cs)
- spi->slaveselect = SPI_RTC_CS_MASK; /* activate (1) */
- else
- spi->slaveselect = 0; /* deactivate (0) */
-}
-
-/*
- * The SPI command uses this table of functions for controlling the SPI
- * chip selects: it calls the appropriate function to control the SPI
- * chip selects.
- */
-spi_chipsel_type spi_chipsel[] = {
- spi_rtc_chipsel
-};
-int spi_chipsel_cnt = sizeof(spi_chipsel) / sizeof(spi_chipsel[0]);
-
-#endif /* CFG_CMD_SPI */
-
-#if defined(CONFIG_POST)
-/*
- * Returns 1 if keys pressed to start the power-on long-running tests
- * Called from board_init_f().
- */
-int post_hotkeys_pressed(void)
-{
- return 0; /* No hotkeys supported */
-}
-#endif /* CONFIG_POST */
diff --git a/board/ssv/adnpesc1/config.mk b/board/ssv/adnpesc1/config.mk
deleted file mode 100644
index 7d8eb03d82..0000000000
--- a/board/ssv/adnpesc1/config.mk
+++ /dev/null
@@ -1,29 +0,0 @@
-#
-# (C) Copyright 2004
-# Li-Pro.Net <www.li-pro.net>
-# Stephan Linz <linz@li-pro.net>
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-TEXT_BASE = 0x02fc0000 # ATTENTION: notice your CFG_MONITOR_LEN setting
-
-ifeq ($(debug),1)
-PLATFORM_CPPFLAGS += -DDEBUG
-endif
diff --git a/board/ssv/adnpesc1/flash.c b/board/ssv/adnpesc1/flash.c
deleted file mode 100644
index fd8379b1b8..0000000000
--- a/board/ssv/adnpesc1/flash.c
+++ /dev/null
@@ -1,66 +0,0 @@
-/*
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2004, Li-Pro.Net <www.li-pro.net>
- * Stephan Linz <linz@li-pro.net>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-
-#include <common.h>
-#include <nios.h>
-
-/*
- * include common flash code (for ssv boards)
- */
-#include "../common/flash.c"
-
-/*---------------------------------------------------------------------*/
-#define BANKSZ (8 * 1024 * 1024)
-#define SECTSZ (64 * 1024)
-#define UBOOTSECS ((CFG_MONITOR_LEN + CFG_ENV_SIZE) / SECTSZ)
-#define UBOOTAREA (UBOOTSECS * 64 * 1024) /* monitor / env area */
-
-/*---------------------------------------------------------------------*/
-unsigned long flash_init (void)
-{
- int i;
- unsigned long addr;
- flash_info_t *fli = &flash_info[0];
-
- fli->size = BANKSZ;
- fli->sector_count = CFG_MAX_FLASH_SECT;
- fli->flash_id = FLASH_MAN_AMD + FLASH_AMLV640U;
-
- addr = CFG_FLASH_BASE;
- for (i = 0; i < fli->sector_count; ++i) {
- fli->start[i] = addr;
- addr += SECTSZ;
-
- /* Protect monitor / environment area */
- if (addr <= (CFG_FLASH_BASE + UBOOTAREA))
- fli->protect[i] = 1;
- else
- fli->protect[i] = 0;
- }
-
- return (BANKSZ);
-}
diff --git a/board/ssv/adnpesc1/misc.c b/board/ssv/adnpesc1/misc.c
deleted file mode 100644
index 1c5fcb9fca..0000000000
--- a/board/ssv/adnpesc1/misc.c
+++ /dev/null
@@ -1,40 +0,0 @@
-/*
- * (C) Copyright 2003, Li-Pro.Net <www.li-pro.net>
- * Stephan Linz <linz@li-pro.net>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- * board/ssv/adnpesc1/misc.c
- *
- * miscellaneous board interfaces / drivers
- */
-
-#include <common.h>
-
-#if defined(CONFIG_STATUS_LED)
-#include "../common/cmd_sled.c"
-#endif
-
-#if defined(CONFIG_HW_WATCHDOG)
-#include "../common/wd_pio.c"
-#endif
-
-#if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER)
-#include "../common/post.c"
-#endif
diff --git a/board/ssv/adnpesc1/u-boot.lds b/board/ssv/adnpesc1/u-boot.lds
deleted file mode 100644
index 8b01f45e55..0000000000
--- a/board/ssv/adnpesc1/u-boot.lds
+++ /dev/null
@@ -1,70 +0,0 @@
-/*
- * (C) Copyright 2003, Psyent Corporation <www.psyent.com>
- * Scott McNutt <smcnutt@psyent.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-
-OUTPUT_FORMAT("elf32-nios")
-OUTPUT_ARCH(nios)
-ENTRY(_start)
-
-SECTIONS
-{
- .text :
- {
- cpu/nios/start.o (.text)
- *(.text)
- }
- __text_end = .;
-
- . = ALIGN(4);
- .rodata :
- {
- *(.rodata)
- }
- __rodata_end = .;
-
- . = ALIGN(4);
- .data :
- {
- *(.data)
- }
- . = ALIGN(4);
- __data_end = .;
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd :
- {
- *(.u_boot_cmd)
- }
- . = ALIGN(4);
- __u_boot_cmd_end = .;
-
- __bss_start = .;
- . = ALIGN(4);
- .bss :
- {
- *(.bss)
- }
- . = ALIGN(4);
- __bss_end = .;
-}
diff --git a/board/ssv/adnpesc1/vectors.S b/board/ssv/adnpesc1/vectors.S
deleted file mode 100644
index fb7e17e43e..0000000000
--- a/board/ssv/adnpesc1/vectors.S
+++ /dev/null
@@ -1,138 +0,0 @@
-/*
- * (C) Copyright 2004, Li-Pro.Net <www.li-pro.net>
- * Stephan Linz <linz@li-pro.net>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <config.h>
-
-
-/*************************************************************************
- * Exception Vector Table
- *
- * This could have gone in the cpu soure tree, but the whole point of
- * Nios is customization -- and polluting the cpu source tree with
- * board-specific ifdef's really defeats the purpose, no? With this in
- * the board-specific tree, each board has the freedom to organize
- * vectors/traps, etc anyway it wants. The init code copies this table
- * to the proper location.
- *
- * Each board can do what it likes here. But there are four "standard"
- * handlers availble:
- *
- * _cwp_lolimit -Handles register window underflows.
- * _cwp_hilimit -Handles register window overflows.
- * _timebase_int -Increments the timebase.
- * _def_xhandler -Default exception handler.
- *
- * _timebase_int handles a Nios Timer interrupt and increments the
- * timestamp used for the get_timer(), reset_timer(), etc. routines. It
- * expects the timer to be configured like the standard-32 low priority
- * timer.
- *
- * _def_xhandler dispatches exceptions/traps via the external_interrupt()
- * routine. This lets you use the irq_install_handler() and handle your
- * interrupts/traps with code written in C.
- ************************************************************************/
-
- .data
- .global _vectors
- .align 4
-_vectors:
-
-#if defined(CFG_NIOS_CPU_OCI_BASE)
- /* OCI does the reset job */
- .long _def_xhandler@h /* Vector 0 - NMI / Reset */
-#else
- /* there is no OCI, so we have to do a direct reset jump here */
- .long CFG_NIOS_CPU_RST_VECT /* Vector 0 - Reset to GERMS */
-#endif
- .long _cwp_lolimit@h /* Vector 1 - underflow */
- .long _cwp_hilimit@h /* Vector 2 - overflow */
-
- .long _def_xhandler@h /* Vector 3 - GNUPro debug */
- .long _def_xhandler@h /* Vector 4 - GNUPro debug */
- .long _def_xhandler@h /* Vector 5 - GNUPro debug */
- .long _def_xhandler@h /* Vector 6 - future reserved */
- .long _def_xhandler@h /* Vector 7 - future reserved */
- .long _def_xhandler@h /* Vector 8 - future reserved */
- .long _def_xhandler@h /* Vector 9 - future reserved */
- .long _def_xhandler@h /* Vector 10 - future reserved */
- .long _def_xhandler@h /* Vector 11 - future reserved */
- .long _def_xhandler@h /* Vector 12 - future reserved */
- .long _def_xhandler@h /* Vector 13 - future reserved */
- .long _def_xhandler@h /* Vector 14 - future reserved */
- .long _def_xhandler@h /* Vector 15 - future reserved */
-#if (CFG_NIOS_TMRIRQ == 16)
- .long _timebase_int@h /* Vector 16 - lopri timer*/
-#else
- .long _def_xhandler@h /* Vector 16 */
-#endif
- .long _def_xhandler@h /* Vector 17 */
- .long _def_xhandler@h /* Vector 18 */
- .long _def_xhandler@h /* Vector 19 */
- .long _def_xhandler@h /* Vector 20 */
- .long _def_xhandler@h /* Vector 21 */
- .long _def_xhandler@h /* Vector 22 */
- .long _def_xhandler@h /* Vector 23 */
- .long _def_xhandler@h /* Vector 24 */
- .long _def_xhandler@h /* Vector 25 */
- .long _def_xhandler@h /* Vector 26 */
- .long _def_xhandler@h /* Vector 27 */
- .long _def_xhandler@h /* Vector 28 */
- .long _def_xhandler@h /* Vector 29 */
- .long _def_xhandler@h /* Vector 30 */
- .long _def_xhandler@h /* Vector 31 */
- .long _def_xhandler@h /* Vector 32 */
- .long _def_xhandler@h /* Vector 33 */
- .long _def_xhandler@h /* Vector 34 */
- .long _def_xhandler@h /* Vector 35 */
- .long _def_xhandler@h /* Vector 36 */
- .long _def_xhandler@h /* Vector 37 */
- .long _def_xhandler@h /* Vector 38 */
- .long _def_xhandler@h /* Vector 39 */
- .long _def_xhandler@h /* Vector 40 */
- .long _def_xhandler@h /* Vector 41 */
- .long _def_xhandler@h /* Vector 42 */
- .long _def_xhandler@h /* Vector 43 */
- .long _def_xhandler@h /* Vector 44 */
- .long _def_xhandler@h /* Vector 45 */
- .long _def_xhandler@h /* Vector 46 */
- .long _def_xhandler@h /* Vector 47 */
- .long _def_xhandler@h /* Vector 48 */
- .long _def_xhandler@h /* Vector 49 */
-#if (CFG_NIOS_TMRIRQ == 50)
- .long _timebase_int@h /* Vector 50 - lopri timer*/
-#else
- .long _def_xhandler@h /* Vector 50 */
-#endif
- .long _def_xhandler@h /* Vector 51 */
- .long _def_xhandler@h /* Vector 52 */
- .long _def_xhandler@h /* Vector 53 */
- .long _def_xhandler@h /* Vector 54 */
- .long _def_xhandler@h /* Vector 55 */
- .long _def_xhandler@h /* Vector 56 */
- .long _def_xhandler@h /* Vector 57 */
- .long _def_xhandler@h /* Vector 58 */
- .long _def_xhandler@h /* Vector 59 */
- .long _def_xhandler@h /* Vector 60 */
- .long _def_xhandler@h /* Vector 61 */
- .long _def_xhandler@h /* Vector 62 */
- .long _def_xhandler@h /* Vector 63 */
diff --git a/board/ssv/common/cmd_sled.c b/board/ssv/common/cmd_sled.c
deleted file mode 100644
index d61fa3ed47..0000000000
--- a/board/ssv/common/cmd_sled.c
+++ /dev/null
@@ -1,162 +0,0 @@
-/*
- * (C) Copyright 2004, Li-Pro.Net <www.li-pro.net>
- * Stephan Linz <linz@li-pro.net>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <command.h>
-#include <status_led.h>
-
-#if defined(CONFIG_STATUS_LED)
-
-/* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
- * !!!!! Q u i c k & D i r t y H a c k !!!!!
- * !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
- * !!!!! !!!!!
- * !!!!! Next type definition was coming from original !!!!!
- * !!!!! status LED driver drivers/status_led.c and !!!!!
- * !!!!! should exported for using here. !!!!!
- * !!!!! !!!!!
- * !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! */
-
-typedef struct {
- led_id_t mask;
- int state;
- int period;
- int cnt;
-} led_dev_t;
-
-extern led_dev_t led_dev[];
-
-#if (CONFIG_COMMANDS & CFG_CMD_BSP)
-int do_sled (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
-{
- int led_id = 0;
-
- if (argc > 1) {
-#ifdef STATUS_LED_BOOT
- if (!strcmp (argv[1], "boot")) {
- led_id = STATUS_LED_BOOT + 1;
- }
-#endif
-#ifdef STATUS_LED_RED
- if (!strcmp (argv[1], "red")) {
- led_id = STATUS_LED_RED + 1;
- }
-#endif
-#ifdef STATUS_LED_YELLOW
- if (!strcmp (argv[1], "yellow")) {
- led_id = STATUS_LED_YELLOW + 1;
- }
-#endif
-#ifdef STATUS_LED_GREEN
- if (!strcmp (argv[1], "green")) {
- led_id = STATUS_LED_GREEN + 1;
- }
-#endif
- }
-
- switch (argc) {
- case 1:
-#if (STATUS_LED_BITS > 3)
- for (; led_id < 4; led_id++)
-#elif (STATUS_LED_BITS > 2)
- for (; led_id < 3; led_id++)
-#elif (STATUS_LED_BITS > 1)
- for (; led_id < 2; led_id++)
-#elif (STATUS_LED_BITS > 0)
- for (; led_id < 1; led_id++)
-#else
-#error "*** STATUS_LED_BITS not correct defined ***"
-#endif
- {
- printf ("Status LED '%s' is %s\n",
- led_id == STATUS_LED_BOOT ? "boot"
- : led_id == STATUS_LED_RED ? "red"
- : led_id == STATUS_LED_YELLOW ? "yellow"
- : led_id ==
- STATUS_LED_GREEN ? "green" : "unknown",
- led_dev[led_id].state ==
- STATUS_LED_ON ? "on" : led_dev[led_id].
- state ==
- STATUS_LED_OFF ? "off" : led_dev[led_id].
- state ==
- STATUS_LED_BLINKING ? "blinking" : "unknown");
- }
- return 0;
- case 2:
- if (led_id) {
- printf ("Status LED '%s' is %s\n", argv[1],
- led_dev[led_id - 1].state ==
- STATUS_LED_ON ? "on" : led_dev[led_id -
- 1].state ==
- STATUS_LED_OFF ? "off" : led_dev[led_id -
- 1].state ==
- STATUS_LED_BLINKING ? "blinking" : "unknown");
- return 0;
- } else
- break;
- case 3:
- if (led_id) {
- if (!strcmp (argv[2], "on")) {
- status_led_set (led_id - 1, STATUS_LED_ON);
- return 0;
- } else if (!strcmp (argv[2], "off")) {
- status_led_set (led_id - 1, STATUS_LED_OFF);
- return 0;
- } else if (!strcmp (argv[2], "blink")) {
- status_led_set (led_id - 1,
- STATUS_LED_BLINKING);
- return 0;
- } else
- break;
- } else
- break;
- default:
- break;
- }
- printf ("Usage:\n%s\n", cmdtp->usage);
- return 1;
-}
-
-#ifdef STATUS_LED_BOOT
-#ifdef STATUS_LED_RED
-#ifdef STATUS_LED_YELLOW
-#ifdef STATUS_LED_GREEN
-#define __NAME_STR " - name: boot|red|yellow|green\n"
-#else
-#define __NAME_STR " - name: boot|red|yellow\n"
-#endif
-#else
-#define __NAME_STR " - name: boot|red\n"
-#endif
-#else
-#define __NAME_STR " - name: boot\n"
-#endif
-#else
-#define __NAME_STR " - name: (no such defined)\n"
-#endif
-
-U_BOOT_CMD (sled, 3, 0, do_sled,
- "sled - check and set status led\n",
- "sled [name [state]]\n" __NAME_STR " - state: on|off|blink\n");
-#endif /* CFG_CMD_BSP */
-#endif /* CONFIG_STATUS_LED */
diff --git a/board/ssv/common/flash.c b/board/ssv/common/flash.c
deleted file mode 100644
index 70cab7fa20..0000000000
--- a/board/ssv/common/flash.c
+++ /dev/null
@@ -1,207 +0,0 @@
-/*
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2004, Li-Pro.Net <www.li-pro.net>
- * Stephan Linz <linz@li-pro.net>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-
-#include <common.h>
-#include <watchdog.h>
-#include <nios.h>
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
-
-/*--------------------------------------------------------------------*/
-void flash_print_info (flash_info_t * info)
-{
- int i, k;
- unsigned long size;
- int erased;
- volatile unsigned char *flash;
-
- printf (" Size: %ld KB in %d Sectors\n",
- info->size >> 10, info->sector_count);
- printf (" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; ++i) {
-
- /* Check if whole sector is erased */
- if (i != (info->sector_count - 1))
- size = info->start[i + 1] - info->start[i];
- else
- size = info->start[0] + info->size - info->start[i];
- erased = 1;
- flash = (volatile unsigned char *) info->start[i];
- for (k = 0; k < size; k++) {
- if (*flash++ != 0xff) {
- erased = 0;
- break;
- }
- }
-
- /* Print the info */
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s%s", info->start[i], erased ? " E" : " ",
- info->protect[i] ? "RO " : " ");
- }
- printf ("\n");
-}
-
-/*-------------------------------------------------------------------*/
-
-
-int flash_erase (flash_info_t * info, int s_first, int s_last)
-{
- volatile CFG_FLASH_WORD_SIZE *addr = (CFG_FLASH_WORD_SIZE *) (info->start[0]);
- volatile CFG_FLASH_WORD_SIZE *addr2;
- int prot, sect, wait;
- unsigned oldpri;
- ulong start;
-
- /* Some sanity checking */
- if ((s_first < 0) || (s_first > s_last)) {
- printf ("- no sectors to erase\n");
- return 1;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
-#ifdef DEBUG
- for (sect = s_first; sect <= s_last; sect++) {
- printf("- Erase: Sect: %i @ 0x%08x\n", sect, info->start[sect]);
- }
-#endif
-
- /* NOTE: disabling interrupts on Nios can be very bad since it
- * also disables the LO_LIMIT exception. It's better here to
- * set the interrupt priority to 3 & restore it when we're done.
- */
- oldpri = ipri (3);
-
- /* It's ok to erase multiple sectors provided we don't delay more
- * than 50 usec between cmds ... at which point the erase time-out
- * occurs. So don't go and put printf() calls in the loop ... it
- * won't be very helpful ;-)
- */
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr2 = (CFG_FLASH_WORD_SIZE *) (info->start[sect]);
- *addr = 0xf0;
- *(addr+0xAAA/2) = 0xaa;
- *(addr+0x554/2) = 0x55;
- *(addr+0xAAA/2) = 0x80;
- *(addr+0xAAA/2) = 0xaa;
- *(addr+0x554/2) = 0x55;
- *addr2 = 0x30;
- /* Now just wait for 0xffff & provide some user
- * feedback while we wait. Here we have to grant
- * timer interrupts. Otherwise get_timer() can't
- * work right. */
- ipri(oldpri);
- start = get_timer (0);
- while (*addr2 != 0xffff) {
- for (wait = 8; wait; wait--) {
- udelay (125 * 1000);
- }
- putc ('.');
- if (get_timer (start) > CFG_FLASH_ERASE_TOUT) {
- printf ("timeout\n");
- return 1;
- }
- }
- oldpri = ipri (3); /* disallow non important irqs again */
- }
- }
-
- printf ("\n");
- *addr = 0xf0;
-
- /* Restore interrupt priority */
- ipri (oldpri);
-
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t * info, uchar * srcbuffer, ulong addr, ulong cnt)
-{
-
- volatile CFG_FLASH_WORD_SIZE *cmd = (vu_short *) info->start[0];
- volatile CFG_FLASH_WORD_SIZE *dst = (vu_short *) addr;
- CFG_FLASH_WORD_SIZE *src = (void *) srcbuffer;
- CFG_FLASH_WORD_SIZE b;
- unsigned oldpri;
- ulong start;
-
- cnt /= sizeof(CFG_FLASH_WORD_SIZE);
- while (cnt) {
- /* Check for sufficient erase */
- b = *src;
- if ((*dst & b) != b) {
- printf ("%02x : %02x\n", *dst, b);
- return (2);
- }
-
- /* Disable interrupts other than window underflow
- * (interrupt priority 2)
- */
- oldpri = ipri (3);
- *(cmd+0xAAA/2) = 0xaa;
- *(cmd+0x554/2) = 0x55;
- *(cmd+0xAAA/2) = 0xa0;
- ipri (oldpri);
- *dst = b;
-
- /* Verify write */
- start = get_timer (0);
- while (*dst != b) {
- if (get_timer (start) > CFG_FLASH_WRITE_TOUT) {
- *cmd = 0xf0;
- return 1;
- }
- }
- dst++;
- src++;
- cnt--;
- }
-
- *cmd = 0xf0;
- return (0);
-}
diff --git a/board/ssv/common/post.c b/board/ssv/common/post.c
deleted file mode 100644
index a5f29c1a30..0000000000
--- a/board/ssv/common/post.c
+++ /dev/null
@@ -1,44 +0,0 @@
-/*
- * (C) Copyright 2004, Li-Pro.Net <www.li-pro.net>
- * Stephan Linz <linz@li-pro.net>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-
-#if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER)
-
-#if !defined(CFG_NIOS_POST_WORD_ADDR)
-#error "*** CFG_NIOS_POST_WORD_ADDR not defined ***"
-#endif
-
-void post_word_store (ulong a)
-{
- volatile void *save_addr = (void *)(CFG_NIOS_POST_WORD_ADDR);
- *(volatile ulong *) save_addr = a;
-}
-
-ulong post_word_load (void)
-{
- volatile void *save_addr = (void *)(CFG_NIOS_POST_WORD_ADDR);
- return *(volatile ulong *) save_addr;
-}
-
-#endif /* CONFIG_POST || CONFIG_LOGBUFFER*/
diff --git a/board/ssv/common/wd_pio.c b/board/ssv/common/wd_pio.c
deleted file mode 100644
index 3215ac96aa..0000000000
--- a/board/ssv/common/wd_pio.c
+++ /dev/null
@@ -1,160 +0,0 @@
-/*
- * (C) Copyright 2004, Li-Pro.Net <www.li-pro.net>
- * Stephan Linz <linz@li-pro.net>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <command.h>
-#include <nios.h>
-#include <nios-io.h>
-
-#if defined(CONFIG_HW_WATCHDOG)
-
-#if !defined(CONFIG_HW_WDENA_BASE)
-#error "*** CONFIG_HW_WDENA_BASE not defined ***"
-#if !defined(CONFIG_HW_WDENA_BIT)
-#error "*** CONFIG_HW_WDENA_BIT not defined ***"
-#endif
-#endif
-
-#if !defined(CONFIG_HW_WDTOG_BASE)
-#error "*** CONFIG_HW_WDTOG_BASE not defined ***"
-#if !defined(CONFIG_HW_WDTOG_BIT)
-#error "*** CONFIG_HW_WDTOG_BIT not defined ***"
-#endif
-#endif
-
-#ifdef CONFIG_HW_WDPORT_WRONLY /* emulate read access */
-static unsigned __wd_ena_pio_portval = 0;
-#endif
-
-#define WD_PIO_INIT_DONE(V) ((V) & (1 << CONFIG_HW_WDENA_BIT))
-
-void ssv_wd_pio_init(void)
-{
- nios_pio_t *ena_piop = (nios_pio_t*)CONFIG_HW_WDENA_BASE;
- nios_pio_t *trg_piop = (nios_pio_t*)CONFIG_HW_WDTOG_BASE;
-
- trg_piop->data &= ~(1 << CONFIG_HW_WDTOG_BIT);
-
-#ifdef CONFIG_HW_WDPORT_WRONLY /* emulate read access */
-
- __wd_ena_pio_portval |= (1 << CONFIG_HW_WDENA_BIT);
- ena_piop->data = __wd_ena_pio_portval;
-
-#else /* !CONFIG_HW_WDPORT_WRONLY */
-
- trg_piop->direction |= (1 << CONFIG_HW_WDTOG_BIT);
-
- ena_piop->data |= (1 << CONFIG_HW_WDENA_BIT);
- ena_piop->direction |= (1 << CONFIG_HW_WDENA_BIT);
-
-#endif /* CONFIG_HW_WDPORT_WRONLY */
-}
-
-void ssv_wd_pio_done(void)
-{
- nios_pio_t *piop = (nios_pio_t*)CONFIG_HW_WDENA_BASE;
-
-#ifdef CONFIG_HW_WDPORT_WRONLY /* emulate read access */
-
- __wd_ena_pio_portval &= ~(1 << CONFIG_HW_WDENA_BIT);
- piop->data = __wd_ena_pio_portval;
-
-#else /* !CONFIG_HW_WDPORT_WRONLY */
-
- piop->data &= ~(1 << CONFIG_HW_WDENA_BIT);
-
-#endif /* CONFIG_HW_WDPORT_WRONLY */
-}
-
-void ssv_wd_pio_reset(void)
-{
- nios_pio_t *trg_piop = (nios_pio_t*)CONFIG_HW_WDTOG_BASE;
-
-#ifdef CONFIG_HW_WDPORT_WRONLY
- if (WD_PIO_INIT_DONE(__wd_ena_pio_portval))
-#else
- nios_pio_t *ena_piop = (nios_pio_t*)CONFIG_HW_WDENA_BASE;
-
- if (WD_PIO_INIT_DONE(ena_piop->data))
-#endif
- {
- trg_piop->data |= (1 << CONFIG_HW_WDTOG_BIT);
- trg_piop->data &= ~(1 << CONFIG_HW_WDTOG_BIT);
- }
-}
-
-void hw_watchdog_reset(void)
-{
- int re_enable = disable_interrupts ();
-
- ssv_wd_pio_reset();
- if (re_enable)
- enable_interrupts ();
-}
-
-#if (CONFIG_COMMANDS & CFG_CMD_BSP)
-int do_wd (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- nios_pio_t *ena_piop = (nios_pio_t*)CONFIG_HW_WDENA_BASE;
-
- switch (argc)
- {
- case 1:
- printf ("Watchdog timer status is %s\n",
-#ifdef CONFIG_HW_WDPORT_WRONLY
- WD_PIO_INIT_DONE(__wd_ena_pio_portval)
-#else
- WD_PIO_INIT_DONE(ena_piop->data)
-#endif
- ? "on" : "off");
- return 0;
- case 2:
- if (!strcmp(argv[1],"on"))
- {
- ssv_wd_pio_init();
- printf("Watchdog timer now is on\n");
- return 0;
- }
- else if (!strcmp(argv[1],"off"))
- {
- ssv_wd_pio_done();
- printf("Watchdog timer now is off\n");
- return 0;
- }
- break;
- default:
- break;
- }
- printf ("Usage:\n%s\n", cmdtp->usage);
- return 1;
-}
-
-U_BOOT_CMD(
- wd, 2, 1, do_wd,
- "wd - check and set watchdog\n",
- "on - switch watchDog on\n"
- "wd off - switch watchdog off\n"
- "wd - print current status\n"
-);
-#endif /* CFG_CMD_BSP */
-#endif /* CONFIG_HW_WATCHDOG */
diff --git a/board/stxgp3/Makefile b/board/stxgp3/Makefile
deleted file mode 100644
index d150df831c..0000000000
--- a/board/stxgp3/Makefile
+++ /dev/null
@@ -1,48 +0,0 @@
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := $(BOARD).o flash.o
-SOBJS := init.o
-#SOBJS :=
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(OBJS) $(SOBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/stxgp3/config.mk b/board/stxgp3/config.mk
deleted file mode 100644
index 2427818e0a..0000000000
--- a/board/stxgp3/config.mk
+++ /dev/null
@@ -1,32 +0,0 @@
-# Modified by Xianghua Xiao, X.Xiao@motorola.com
-# (C) Copyright 2002,2003 Motorola Inc.
-#
-# Copied from ADS85xx for STx GP3 - Dan Malek
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# default CCARBAR is at 0xff700000
-# assume U-Boot is less than 0.5MB
-#
-TEXT_BASE = 0xfff80000
-
-PLATFORM_CPPFLAGS += -DCONFIG_MPC85xx=1
-PLATFORM_CPPFLAGS += -DCONFIG_E500=1
diff --git a/board/stxgp3/flash.c b/board/stxgp3/flash.c
deleted file mode 100644
index 032989ba56..0000000000
--- a/board/stxgp3/flash.c
+++ /dev/null
@@ -1,515 +0,0 @@
-/*
- * (C) Copyright 2003, Dan Malek, Embedded Edge, LLC. <dan@embeddededge.com>
- * Copied from ADS85xx.
- * Updated to support the Silicon Tx GP3 8560. We should only find
- * two Intel 28F640 parts in 16-bit mode (i.e. 32-bit wide flash),
- * but I left other code here in case people order custom boards.
- *
- * (C) Copyright 2003 Motorola Inc.
- * Xianghua Xiao,(X.Xiao@motorola.com)
- *
- * (C) Copyright 2000, 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2001, Stuart Hughes, Lineo Inc, stuarth@lineo.com
- * Add support the Sharp chips on the mpc8260ads.
- * I started with board/ip860/flash.c and made changes I found in
- * the MTD project by David Schleef.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-
-#if !defined(CFG_NO_FLASH)
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-#if defined(CFG_ENV_IS_IN_FLASH)
-# ifndef CFG_ENV_ADDR
-# define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_ENV_OFFSET)
-# endif
-# ifndef CFG_ENV_SIZE
-# define CFG_ENV_SIZE CFG_ENV_SECT_SIZE
-# endif
-# ifndef CFG_ENV_SECT_SIZE
-# define CFG_ENV_SECT_SIZE CFG_ENV_SIZE
-# endif
-#endif
-
-#undef DEBUG
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (vu_long *addr, flash_info_t *info);
-static int write_word (flash_info_t *info, ulong dest, ulong data);
-static int clear_block_lock_bit(vu_long * addr);
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- unsigned long size;
- int i;
-
- /* Init: enable write,
- * or we cannot even write flash commands
- */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
-
- /* set the default sector offset */
- }
-
- /* Static FLASH Bank configuration here - FIXME XXX */
-
- size = flash_get_size((vu_long *)CFG_FLASH_BASE, &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size, size<<20);
- }
-
- /* Re-do sizing to get full correct info */
- size = flash_get_size((vu_long *)CFG_FLASH_BASE, &flash_info[0]);
-
- flash_info[0].size = size;
-
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
- /* monitor protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+monitor_flash_len-1,
- &flash_info[0]);
-
-#ifdef CFG_ENV_IS_IN_FLASH
- /* ENV protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR+CFG_ENV_SECT_SIZE-1,
- &flash_info[0]);
-#endif
-#endif
- return (size);
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_INTEL: printf ("Intel "); break;
- case FLASH_MAN_SHARP: printf ("Sharp "); break;
- default: printf ("Unknown Vendor "); break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_28F640C3T: printf ("28F640C3T (64 Mbit x 2, 128 x 128k)\n");
- break;
- default: printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " "
- );
- }
- printf ("\n");
-}
-
-/*
- * The following code cannot be run from FLASH!
- */
-
-static ulong flash_get_size (vu_long *addr, flash_info_t *info)
-{
- short i;
- ulong value;
- ulong base = (ulong)addr;
- ulong sector_offset;
-
-#ifdef DEBUG
- printf("Check flash at 0x%08x\n",(uint)addr);
-#endif
- /* Write "Intelligent Identifier" command: read Manufacturer ID */
- *addr = 0x90909090;
- udelay(20);
- asm("sync");
-
- value = addr[0] & 0x00FF00FF;
-
-#ifdef DEBUG
- printf("manufacturer=0x%x\n",(uint)value);
-#endif
- switch (value) {
- case MT_MANUFACT: /* SHARP, MT or => Intel */
- case INTEL_ALT_MANU:
- info->flash_id = FLASH_MAN_INTEL;
- break;
- default:
- printf("unknown manufacturer: %x\n", (unsigned int)value);
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- return (0); /* no or unknown flash */
- }
-
- value = addr[1]; /* device ID */
-
-#ifdef DEBUG
- printf("deviceID=0x%x\n",(uint)value);
-#endif
- switch (value) {
-
- case (INTEL_ID_28F640C3T):
- info->flash_id += FLASH_28F640C3T;
- info->sector_count = 135;
- info->size = 0x01000000;
- sector_offset = 0x20000;
- break; /* => 2x8 MB */
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- return (0); /* => no or unknown flash */
-
- }
-
- /* set up sector start address table
- * The first 127 blocks are large, the last 8 are small.
- */
- for (i = 0; i < 127; i++) {
- info->start[i] = base;
- base += sector_offset;
- /* Sectors are locked upon reset */
- info->protect[i] = 0;
- }
- for (i = 127; i < 135; i++) {
- info->start[i] = base;
- base += 0x4000;
- /* Sectors are locked upon reset */
- info->protect[i] = 0;
- }
-
-
- /*
- * Prevent writes to uninitialized FLASH.
- */
- if (info->flash_id != FLASH_UNKNOWN) {
- addr = (vu_long *)info->start[0];
- *addr = 0xFFFFFF; /* reset bank to read array mode */
- asm("sync");
- }
-
- return (info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- int flag, prot, sect;
- ulong start, now, last;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- if ( ((info->flash_id & FLASH_VENDMASK) != FLASH_MAN_INTEL)
- && ((info->flash_id & FLASH_VENDMASK) != FLASH_MAN_SHARP) ) {
- printf ("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
-#ifdef DEBUG
- printf("\nFlash Erase:\n");
-#endif
- /* Make Sure Block Lock Bit is not set. */
- if(clear_block_lock_bit((vu_long *)(info->start[s_first]))){
- return 1;
- }
-
- /* Start erase on unprotected sectors */
-#if defined(DEBUG)
- printf("Begin to erase now,s_first=0x%x s_last=0x%x...\n",s_first,s_last);
-#endif
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- vu_long *addr = (vu_long *)(info->start[sect]);
- asm("sync");
-
- last = start = get_timer (0);
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- /* Reset Array */
- *addr = 0xffffffff;
- asm("sync");
- /* Clear Status Register */
- *addr = 0x50505050;
- asm("sync");
- /* Single Block Erase Command */
- *addr = 0x20202020;
- asm("sync");
- /* Confirm */
- *addr = 0xD0D0D0D0;
- asm("sync");
-
- if((info->flash_id & FLASH_TYPEMASK) != FLASH_LH28F016SCT) {
- /* Resume Command, as per errata update */
- *addr = 0xD0D0D0D0;
- asm("sync");
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
- while ((*addr & 0x00800080) != 0x00800080) {
- if(*addr & 0x00200020){
- printf("Error in Block Erase - Lock Bit may be set!\n");
- printf("Status Register = 0x%X\n", (uint)*addr);
- *addr = 0xFFFFFFFF; /* reset bank */
- asm("sync");
- return 1;
- }
- if ((now=get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- *addr = 0xFFFFFFFF; /* reset bank */
- asm("sync");
- return 1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- }
-
- /* reset to read mode */
- *addr = 0xFFFFFFFF;
- asm("sync");
- }
- }
-
- printf ("flash erase done\n");
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int i, l, rc;
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
- for (; i<4 && cnt>0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = 0;
- for (i=0; i<4; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- return (write_word(info, wp, data));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word (flash_info_t *info, ulong dest, ulong data)
-{
- vu_long *addr = (vu_long *)dest;
- ulong start, csr;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*addr & data) != data) {
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- /* Write Command */
- *addr = 0x10101010;
- asm("sync");
-
- /* Write Data */
- *addr = data;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* data polling for D7 */
- start = get_timer (0);
- flag = 0;
-
- while (((csr = *addr) & 0x00800080) != 0x00800080) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- flag = 1;
- break;
- }
- }
- if (csr & 0x40404040) {
- printf ("CSR indicates write error (%08lx) at %08lx\n", csr, (ulong)addr);
- flag = 1;
- }
-
- /* Clear Status Registers Command */
- *addr = 0x50505050;
- asm("sync");
- /* Reset to read array mode */
- *addr = 0xFFFFFFFF;
- asm("sync");
-
- return (flag);
-}
-
-/*-----------------------------------------------------------------------
- * Clear Block Lock Bit, returns:
- * 0 - OK
- * 1 - Timeout
- */
-
-static int clear_block_lock_bit(vu_long * addr)
-{
- ulong start, now;
-
- /* Reset Array */
- *addr = 0xffffffff;
- asm("sync");
- /* Clear Status Register */
- *addr = 0x50505050;
- asm("sync");
-
- *addr = 0x60606060;
- asm("sync");
- *addr = 0xd0d0d0d0;
- asm("sync");
-
- start = get_timer (0);
- while((*addr & 0x00800080) != 0x00800080){
- if ((now=get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout on clearing Block Lock Bit\n");
- *addr = 0xFFFFFFFF; /* reset bank */
- asm("sync");
- return 1;
- }
- }
- return 0;
-}
-
-#endif /* !CFG_NO_FLASH */
diff --git a/board/stxgp3/init.S b/board/stxgp3/init.S
deleted file mode 100644
index d504289bb2..0000000000
--- a/board/stxgp3/init.S
+++ /dev/null
@@ -1,286 +0,0 @@
-/*
- * Copyright (C) 2004 Embedded Edge, LLC
- * Dan Malek <dan@embeddededge.com>
- * Copied from ADS85xx.
- * Updates for Silicon Tx GP3 8560. We only support 32-bit flash
- * and DDR with SPD EEPROM configuration.
- *
- * Copyright 2004 Freescale Semiconductor.
- * Copyright (C) 2002,2003, Motorola Inc.
- * Xianghua Xiao <X.Xiao@motorola.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <ppc_asm.tmpl>
-#include <ppc_defs.h>
-#include <asm/cache.h>
-#include <asm/mmu.h>
-#include <config.h>
-#include <mpc85xx.h>
-
-
-/*
- * TLB0 and TLB1 Entries
- *
- * Out of reset, TLB1's Entry 0 maps the highest 4K for CCSRBAR.
- * However, CCSRBAR is then relocated to CFG_CCSRBAR right after
- * these TLB entries are established.
- *
- * The TLB entries for DDR are dynamically setup in spd_sdram()
- * and use TLB1 Entries 8 through 15 as needed according to the
- * size of DDR memory.
- *
- * MAS0: tlbsel, esel, nv
- * MAS1: valid, iprot, tid, ts, tsize
- * MAS2: epn, sharen, x0, x1, w, i, m, g, e
- * MAS3: rpn, u0-u3, ux, sx, uw, sw, ur, sr
- */
-
-#define entry_start \
- mflr r1 ; \
- bl 0f ;
-
-#define entry_end \
-0: mflr r0 ; \
- mtlr r1 ; \
- blr ;
-
-
- .section .bootpg, "ax"
- .globl tlb1_entry
-tlb1_entry:
- entry_start
-
- /*
- * Number of TLB0 and TLB1 entries in the following table
- */
- .long 13
-
-#if (CFG_CCSRBAR_DEFAULT != CFG_CCSRBAR)
- /*
- * TLB0 4K Non-cacheable, guarded
- * 0xff700000 4K Initial CCSRBAR mapping
- *
- * This ends up at a TLB0 Index==0 entry, and must not collide
- * with other TLB0 Entries.
- */
- .long TLB1_MAS0(0, 0, 0)
- .long TLB1_MAS1(1, 0, 0, 0, 0)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_CCSRBAR_DEFAULT), 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_CCSRBAR_DEFAULT), 0,0,0,0,0,1,0,1,0,1)
-#else
-#error("Update the number of table entries in tlb1_entry")
-#endif
-
- /*
- * TLB0 16K Cacheable, non-guarded
- * 0xd001_0000 16K Temporary Global data for initialization
- *
- * Use four 4K TLB0 entries. These entries must be cacheable
- * as they provide the bootstrap memory before the memory
- * controler and real memory have been configured.
- *
- * These entries end up at TLB0 Indicies 0x10, 0x14, 0x18 and 0x1c,
- * and must not collide with other TLB0 entries.
- */
- .long TLB1_MAS0(0, 0, 0)
- .long TLB1_MAS1(1, 0, 0, 0, 0)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_INIT_RAM_ADDR), \
- 0,0,0,0,0,0,0,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_INIT_RAM_ADDR), \
- 0,0,0,0,0,1,0,1,0,1)
-
- .long TLB1_MAS0(0, 0, 0)
- .long TLB1_MAS1(1, 0, 0, 0, 0)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_INIT_RAM_ADDR + 4 * 1024), \
- 0,0,0,0,0,0,0,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_INIT_RAM_ADDR + 4 * 1024), \
- 0,0,0,0,0,1,0,1,0,1)
-
- .long TLB1_MAS0(0, 0, 0)
- .long TLB1_MAS1(1, 0, 0, 0, 0)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_INIT_RAM_ADDR + 8 * 1024), \
- 0,0,0,0,0,0,0,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_INIT_RAM_ADDR + 8 * 1024), \
- 0,0,0,0,0,1,0,1,0,1)
-
- .long TLB1_MAS0(0, 0, 0)
- .long TLB1_MAS1(1, 0, 0, 0, 0)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_INIT_RAM_ADDR + 12 * 1024), \
- 0,0,0,0,0,0,0,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_INIT_RAM_ADDR + 12 * 1024), \
- 0,0,0,0,0,1,0,1,0,1)
-
-
- /*
- * TLB 0: 16M Non-cacheable, guarded
- * 0xff000000 16M FLASH
- * Out of reset this entry is only 4K.
- */
- .long TLB1_MAS0(1, 0, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_16M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_FLASH_BASE), 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_FLASH_BASE), 0,0,0,0,0,1,0,1,0,1)
-
- /*
- * TLB 1: 256M Non-cacheable, guarded
- * 0x80000000 256M PCI1 MEM First half
- */
- .long TLB1_MAS0(1, 1, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_PCI1_MEM_BASE), 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_PCI1_MEM_BASE), 0,0,0,0,0,1,0,1,0,1)
-
- /*
- * TLB 2: 256M Non-cacheable, guarded
- * 0x90000000 256M PCI1 MEM Second half
- */
- .long TLB1_MAS0(1, 2, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_PCI1_MEM_BASE + 0x10000000), \
- 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_PCI1_MEM_BASE + 0x10000000), \
- 0,0,0,0,0,1,0,1,0,1)
-
- /*
- * TLB 3: 256M Non-cacheable, guarded
- * 0xc0000000 256M Rapid IO MEM First half
- */
- .long TLB1_MAS0(1, 3, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_RIO_MEM_BASE), 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_RIO_MEM_BASE), 0,0,0,0,0,1,0,1,0,1)
-
- /*
- * TLB 4: 256M Non-cacheable, guarded
- * 0xd0000000 256M Rapid IO MEM Second half
- */
- .long TLB1_MAS0(1, 4, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_RIO_MEM_BASE + 0x10000000), \
- 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_RIO_MEM_BASE + 0x10000000), \
- 0,0,0,0,0,1,0,1,0,1)
-
- /*
- * TLB 5: 64M Non-cacheable, guarded
- * 0xe000_0000 1M CCSRBAR
- * 0xe200_0000 16M PCI1 IO
- */
- .long TLB1_MAS0(1, 5, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_64M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_CCSRBAR), 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_CCSRBAR), 0,0,0,0,0,1,0,1,0,1)
-
- /*
- * TLB 6: 64M Cacheable, non-guarded
- * 0xf000_0000 64M LBC SDRAM
- */
- .long TLB1_MAS0(1, 6, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_64M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_LBC_SDRAM_BASE), 0,0,0,0,0,0,0,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_LBC_SDRAM_BASE), 0,0,0,0,0,1,0,1,0,1)
-
- /*
- * TLB 7: 16K Non-cacheable, guarded
- * 0xfc000000 16K Configuration Latch register
- */
- .long TLB1_MAS0(1, 7, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_64K)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_LBC_LCLDEVS_BASE), 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_LBC_LCLDEVS_BASE), 0,0,0,0,0,1,0,1,0,1)
-
-#if !defined(CONFIG_SPD_EEPROM)
- /*
- * TLB 8, 9: 128M DDR
- * 0x00000000 64M DDR System memory
- * 0x04000000 64M DDR System memory
- * Without SPD EEPROM configured DDR, this must be setup manually.
- * Make sure the TLB count at the top of this table is correct.
- * Likely it needs to be increased by two for these entries.
- */
-#error("Update the number of table entries in tlb1_entry")
- .long TLB1_MAS0(1, 8, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_64M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_DDR_SDRAM_BASE), 0,0,0,0,0,0,0,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_DDR_SDRAM_BASE), 0,0,0,0,0,1,0,1,0,1)
-
- .long TLB1_MAS0(1, 9, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_64M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_DDR_SDRAM_BASE + 0x4000000),
- 0,0,0,0,0,0,0,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_DDR_SDRAM_BASE + 0x4000000),
- 0,0,0,0,0,1,0,1,0,1)
-#endif
-
- entry_end
-
-/*
- * LAW(Local Access Window) configuration:
- *
- * 0x0000_0000 0x7fff_ffff DDR 2G
- * 0x8000_0000 0x9fff_ffff PCI1 MEM 512M
- * 0xc000_0000 0xdfff_ffff RapidIO 512M
- * 0xe000_0000 0xe000_ffff CCSR 1M
- * 0xe200_0000 0xe2ff_ffff PCI1 IO 16M
- * 0xf000_0000 0xf7ff_ffff SDRAM 128M
- * 0xfc00_0000 0xfc00_ffff Config Latch 64K
- * 0xff00_0000 0xffff_ffff FLASH (boot bank) 16M
- *
- * Notes:
- * CCSRBAR and L2-as-SRAM don't need a configured Local Access Window.
- * If flash is 8M at default position (last 8M), no LAW needed.
- */
-
-#if !defined(CONFIG_SPD_EEPROM)
-#define LAWBAR0 ((CFG_DDR_SDRAM_BASE>>12) & 0xfffff)
-#define LAWAR0 (LAWAR_EN | LAWAR_TRGT_IF_DDR | (LAWAR_SIZE & LAWAR_SIZE_128M))
-#else
-#define LAWBAR0 0
-#define LAWAR0 ((LAWAR_TRGT_IF_DDR | (LAWAR_SIZE & LAWAR_SIZE_128M)) & ~LAWAR_EN)
-#endif
-
-#define LAWBAR1 ((CFG_PCI1_MEM_BASE>>12) & 0xfffff)
-#define LAWAR1 (LAWAR_EN | LAWAR_TRGT_IF_PCIX | (LAWAR_SIZE & LAWAR_SIZE_512M))
-
-/*
- * This is not so much the SDRAM map as it is the whole localbus map.
- */
-#define LAWBAR2 ((CFG_LBC_SDRAM_BASE>>12) & 0xfffff)
-#define LAWAR2 (LAWAR_EN | LAWAR_TRGT_IF_LBC | (LAWAR_SIZE & LAWAR_SIZE_256M))
-
-#define LAWBAR3 ((CFG_PCI1_IO_BASE>>12) & 0xfffff)
-#define LAWAR3 (LAWAR_EN | LAWAR_TRGT_IF_PCIX | (LAWAR_SIZE & LAWAR_SIZE_16M))
-
-/*
- * Rapid IO at 0xc000_0000 for 512 M
- */
-#define LAWBAR4 ((CFG_RIO_MEM_BASE>>12) & 0xfffff)
-#define LAWAR4 (LAWAR_EN | LAWAR_TRGT_IF_RIO | (LAWAR_SIZE & LAWAR_SIZE_512M))
-
-
- .section .bootpg, "ax"
- .globl law_entry
-law_entry:
- entry_start
- .long 0x05
- .long LAWBAR0,LAWAR0,LAWBAR1,LAWAR1,LAWBAR2,LAWAR2,LAWBAR3,LAWAR3
- .long LAWBAR4,LAWAR4
- entry_end
diff --git a/board/stxgp3/stxgp3.c b/board/stxgp3/stxgp3.c
deleted file mode 100644
index 2b3949cd7b..0000000000
--- a/board/stxgp3/stxgp3.c
+++ /dev/null
@@ -1,382 +0,0 @@
-/*
- * (C) Copyright 2003, Embedded Edge, LLC
- * Dan Malek, <dan@embeddededge.com>
- * Copied from ADS85xx.
- * Updates for Silicon Tx GP3 8560
- *
- * (C) Copyright 2003,Motorola Inc.
- * Xianghua Xiao, (X.Xiao@motorola.com)
- *
- * (C) Copyright 2002 Scott McNutt <smcnutt@artesyncp.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-
-extern long int spd_sdram (void);
-
-#include <common.h>
-#include <pci.h>
-#include <asm/processor.h>
-#include <asm/immap_85xx.h>
-#include <ioports.h>
-#include <asm/io.h>
-#include <spd.h>
-#include <miiphy.h>
-
-long int fixed_sdram (void);
-
-/*
- * I/O Port configuration table
- *
- * if conf is 1, then that port pin will be configured at boot time
- * according to the five values podr/pdir/ppar/psor/pdat for that entry
- */
-
-const iop_conf_t iop_conf_tab[4][32] = {
-
- /* Port A configuration */
- { /* conf ppar psor pdir podr pdat */
- /* PA31 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 TxENB */
- /* PA30 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 TxClav */
- /* PA29 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 TxSOC */
- /* PA28 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 RxENB */
- /* PA27 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 RxSOC */
- /* PA26 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 RxClav */
- /* PA25 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[0] */
- /* PA24 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[1] */
- /* PA23 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[2] */
- /* PA22 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[3] */
- /* PA21 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[4] */
- /* PA20 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[5] */
- /* PA19 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[6] */
- /* PA18 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[7] */
- /* PA17 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[7] */
- /* PA16 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[6] */
- /* PA15 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[5] */
- /* PA14 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[4] */
- /* PA13 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[3] */
- /* PA12 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[2] */
- /* PA11 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[1] */
- /* PA10 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[0] */
- /* PA9 */ { 0, 1, 1, 1, 0, 0 }, /* FCC1 L1TXD */
- /* PA8 */ { 0, 1, 1, 0, 0, 0 }, /* FCC1 L1RXD */
- /* PA7 */ { 0, 0, 0, 1, 0, 0 }, /* PA7 */
- /* PA6 */ { 0, 1, 1, 1, 0, 0 }, /* TDM A1 L1RSYNC */
- /* PA5 */ { 0, 0, 0, 1, 0, 0 }, /* PA5 */
- /* PA4 */ { 0, 0, 0, 1, 0, 0 }, /* PA4 */
- /* PA3 */ { 0, 0, 0, 1, 0, 0 }, /* PA3 */
- /* PA2 */ { 0, 0, 0, 1, 0, 0 }, /* PA2 */
- /* PA1 */ { 1, 0, 0, 0, 0, 0 }, /* FREERUN */
- /* PA0 */ { 0, 0, 0, 1, 0, 0 } /* PA0 */
- },
-
- /* Port B configuration */
- { /* conf ppar psor pdir podr pdat */
- /* PB31 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TX_ER */
- /* PB30 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_DV */
- /* PB29 */ { 1, 1, 1, 1, 0, 0 }, /* FCC2 MII TX_EN */
- /* PB28 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_ER */
- /* PB27 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII COL */
- /* PB26 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII CRS */
- /* PB25 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[3] */
- /* PB24 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[2] */
- /* PB23 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[1] */
- /* PB22 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[0] */
- /* PB21 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[0] */
- /* PB20 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[1] */
- /* PB19 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[2] */
- /* PB18 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[3] */
- /* PB17 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:RX_DIV */
- /* PB16 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:RX_ERR */
- /* PB15 */ { 0, 1, 0, 1, 0, 0 }, /* FCC3:TX_ERR */
- /* PB14 */ { 0, 1, 0, 1, 0, 0 }, /* FCC3:TX_EN */
- /* PB13 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:COL */
- /* PB12 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:CRS */
- /* PB11 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:RXD */
- /* PB10 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:RXD */
- /* PB9 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:RXD */
- /* PB8 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:RXD */
- /* PB7 */ { 0, 1, 0, 1, 0, 0 }, /* FCC3:TXD */
- /* PB6 */ { 0, 1, 0, 1, 0, 0 }, /* FCC3:TXD */
- /* PB5 */ { 0, 1, 0, 1, 0, 0 }, /* FCC3:TXD */
- /* PB4 */ { 0, 1, 0, 1, 0, 0 }, /* FCC3:TXD */
- /* PB3 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PB2 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PB1 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PB0 */ { 0, 0, 0, 0, 0, 0 } /* pin doesn't exist */
- },
-
- /* Port C */
- { /* conf ppar psor pdir podr pdat */
- /* PC31 */ { 0, 0, 0, 1, 0, 0 }, /* PC31 */
- /* PC30 */ { 0, 0, 0, 1, 0, 0 }, /* PC30 */
- /* PC29 */ { 0, 1, 1, 0, 0, 0 }, /* SCC1 EN *CLSN */
- /* PC28 */ { 0, 0, 0, 1, 0, 0 }, /* PC28 */
- /* PC27 */ { 0, 0, 0, 1, 0, 0 }, /* UART Clock in */
- /* PC26 */ { 0, 0, 0, 1, 0, 0 }, /* PC26 */
- /* PC25 */ { 0, 0, 0, 1, 0, 0 }, /* PC25 */
- /* PC24 */ { 0, 0, 0, 1, 0, 0 }, /* PC24 */
- /* PC23 */ { 0, 1, 0, 1, 0, 0 }, /* ATMTFCLK */
- /* PC22 */ { 0, 1, 0, 0, 0, 0 }, /* ATMRFCLK */
- /* PC21 */ { 0, 1, 0, 0, 0, 0 }, /* SCC1 EN RXCLK */
- /* PC20 */ { 0, 1, 0, 0, 0, 0 }, /* SCC1 EN TXCLK */
- /* PC19 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_CLK CLK13 */
- /* PC18 */ { 1, 1, 0, 0, 0, 0 }, /* FCC Tx Clock (CLK14) */
- /* PC17 */ { 0, 0, 0, 1, 0, 0 }, /* PC17 */
- /* PC16 */ { 0, 1, 0, 0, 0, 0 }, /* FCC Tx Clock (CLK16) */
- /* PC15 */ { 0, 1, 0, 0, 0, 0 }, /* PC15 */
- /* PC14 */ { 0, 1, 0, 0, 0, 0 }, /* SCC1 EN *CD */
- /* PC13 */ { 0, 0, 0, 1, 0, 0 }, /* PC13 */
- /* PC12 */ { 0, 1, 0, 1, 0, 0 }, /* PC12 */
- /* PC11 */ { 0, 0, 0, 1, 0, 0 }, /* LXT971 transmit control */
- /* PC10 */ { 0, 0, 0, 1, 0, 0 }, /* FETHMDC */
- /* PC9 */ { 0, 0, 0, 0, 0, 0 }, /* FETHMDIO */
- /* PC8 */ { 0, 0, 0, 1, 0, 0 }, /* PC8 */
- /* PC7 */ { 0, 0, 0, 1, 0, 0 }, /* PC7 */
- /* PC6 */ { 0, 0, 0, 1, 0, 0 }, /* PC6 */
- /* PC5 */ { 0, 0, 0, 1, 0, 0 }, /* PC5 */
- /* PC4 */ { 0, 0, 0, 1, 0, 0 }, /* PC4 */
- /* PC3 */ { 0, 0, 0, 1, 0, 0 }, /* PC3 */
- /* PC2 */ { 0, 0, 0, 1, 0, 1 }, /* ENET FDE */
- /* PC1 */ { 0, 0, 0, 1, 0, 0 }, /* ENET DSQE */
- /* PC0 */ { 0, 0, 0, 1, 0, 0 }, /* ENET LBK */
- },
-
- /* Port D */
- { /* conf ppar psor pdir podr pdat */
- /* PD31 */ { 0, 1, 0, 0, 0, 0 }, /* SCC1 EN RxD */
- /* PD30 */ { 0, 1, 1, 1, 0, 0 }, /* SCC1 EN TxD */
- /* PD29 */ { 0, 1, 0, 1, 0, 0 }, /* SCC1 EN TENA */
- /* PD28 */ { 1, 1, 0, 0, 0, 0 }, /* SCC2 RxD */
- /* PD27 */ { 1, 1, 0, 1, 0, 0 }, /* SCC2 TxD */
- /* PD26 */ { 0, 0, 0, 1, 0, 0 }, /* PD26 */
- /* PD25 */ { 0, 0, 0, 1, 0, 0 }, /* PD25 */
- /* PD24 */ { 0, 0, 0, 1, 0, 0 }, /* PD24 */
- /* PD23 */ { 0, 0, 0, 1, 0, 0 }, /* PD23 */
- /* PD22 */ { 0, 0, 0, 1, 0, 0 }, /* PD22 */
- /* PD21 */ { 0, 0, 0, 1, 0, 0 }, /* PD21 */
- /* PD20 */ { 0, 0, 0, 1, 0, 0 }, /* PD20 */
- /* PD19 */ { 0, 0, 0, 1, 0, 0 }, /* PD19 */
- /* PD18 */ { 0, 0, 0, 1, 0, 0 }, /* PD18 */
- /* PD17 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXPRTY */
- /* PD16 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXPRTY */
- /* PD15 */ { 1, 1, 1, 0, 1, 0 }, /* I2C SDA */
- /* PD14 */ { 1, 1, 1, 0, 0, 0 }, /* I2C CLK */
- /* PD13 */ { 0, 0, 0, 0, 0, 0 }, /* PD13 */
- /* PD12 */ { 0, 0, 0, 0, 0, 0 }, /* PD12 */
- /* PD11 */ { 0, 0, 0, 0, 0, 0 }, /* PD11 */
- /* PD10 */ { 0, 0, 0, 0, 0, 0 }, /* PD10 */
- /* PD9 */ { 0, 1, 0, 1, 0, 0 }, /* SMC1 TXD */
- /* PD8 */ { 0, 1, 0, 0, 0, 0 }, /* SMC1 RXD */
- /* PD7 */ { 0, 0, 0, 1, 0, 1 }, /* PD7 */
- /* PD6 */ { 0, 0, 0, 1, 0, 1 }, /* PD6 */
- /* PD5 */ { 0, 0, 0, 1, 0, 1 }, /* PD5 */
- /* PD4 */ { 0, 0, 0, 1, 0, 1 }, /* PD4 */
- /* PD3 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PD2 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PD1 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PD0 */ { 0, 0, 0, 0, 0, 0 } /* pin doesn't exist */
- }
-};
-
-static uint64_t next_led_update;
-static uint led_bit;
-
-int
-board_early_init_f(void)
-{
-#if defined(CONFIG_PCI)
- volatile immap_t *immr = (immap_t *)CFG_IMMR;
- volatile ccsr_pcix_t *pci = &immr->im_pcix;
-
- pci->peer &= 0xfffffffdf; /* disable master abort */
-#endif
- return 0;
-}
-
-void
-reset_phy(void)
-{
- volatile uint *blatch;
-
- blatch = (volatile uint *)CFG_LBC_LCLDEVS_BASE;
-
- /* reset Giga bit Ethernet port if needed here */
-
- *blatch &= ~0x000000c0;
- udelay(100);
- *blatch = 0x000000c1; /* Light one led, too */
- udelay(1000);
-
-#if 0 /* This is the port we really want to use for debugging. */
- /* reset the CPM FEC port */
-#if (CONFIG_ETHER_INDEX == 2)
- bcsr->bcsr2 &= ~FETH2_RST;
- udelay(2);
- bcsr->bcsr2 |= FETH2_RST;
- udelay(1000);
-#elif (CONFIG_ETHER_INDEX == 3)
- bcsr->bcsr3 &= ~FETH3_RST;
- udelay(2);
- bcsr->bcsr3 |= FETH3_RST;
- udelay(1000);
-#endif
-#if defined(CONFIG_MII) && defined(CONFIG_ETHER_ON_FCC)
- /* reset PHY */
- miiphy_reset("FCC1 ETHERNET", 0x0);
-
- /* change PHY address to 0x02 */
- bb_miiphy_write(NULL, 0, PHY_MIPSCR, 0xf028);
-
- bb_miiphy_write(NULL, 0x02, PHY_BMCR,
- PHY_BMCR_AUTON | PHY_BMCR_RST_NEG);
-#endif /* CONFIG_MII */
-#endif
-}
-
-int
-checkboard(void)
-{
- printf ("Board: Silicon Tx GPPP 8560 Board\n");
- return (0);
-}
-
-/* Blinkin' LEDS for Robert.
-*/
-void
-show_activity(int flag)
-{
- volatile uint *blatch;
-
- if (next_led_update > get_ticks())
- return;
-
- blatch = (volatile uint *)CFG_LBC_LCLDEVS_BASE;
-
- led_bit >>= 1;
- if (led_bit == 0)
- led_bit = 0x08;
- *blatch = (0xc0 | led_bit);
- eieio();
- next_led_update += (get_tbclk() / 4);
-}
-
-long int
-initdram (int board_type)
-{
- long dram_size = 0;
- extern long spd_sdram (void);
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
-
-#if defined(CONFIG_DDR_DLL)
- {
- volatile ccsr_gur_t *gur= &immap->im_gur;
- uint temp_ddrdll = 0;
-
- /* Work around to stabilize DDR DLL */
- temp_ddrdll = gur->ddrdllcr;
- gur->ddrdllcr = ((temp_ddrdll & 0xff) << 16) | 0x80000000;
- asm("sync;isync;msync");
- }
-#endif
-
- dram_size = spd_sdram ();
-
-#if defined(CONFIG_DDR_ECC)
- /* Initialize and enable DDR ECC.
- */
- ddr_enable_ecc(dram_size);
-#endif
-
- return dram_size;
-}
-
-
-#if defined(CFG_DRAM_TEST)
-int testdram (void)
-{
- uint *pstart = (uint *) CFG_MEMTEST_START;
- uint *pend = (uint *) CFG_MEMTEST_END;
- uint *p;
-
- printf("SDRAM test phase 1:\n");
- for (p = pstart; p < pend; p++)
- *p = 0xaaaaaaaa;
-
- for (p = pstart; p < pend; p++) {
- if (*p != 0xaaaaaaaa) {
- printf ("SDRAM test fails at: %08x\n", (uint) p);
- return 1;
- }
- }
-
- printf("SDRAM test phase 2:\n");
- for (p = pstart; p < pend; p++)
- *p = 0x55555555;
-
- for (p = pstart; p < pend; p++) {
- if (*p != 0x55555555) {
- printf ("SDRAM test fails at: %08x\n", (uint) p);
- return 1;
- }
- }
-
- printf("SDRAM test passed.\n");
- return 0;
-}
-#endif
-
-#if defined(CONFIG_PCI)
-
-/*
- * Initialize PCI Devices, report devices found.
- */
-
-#ifndef CONFIG_PCI_PNP
-static struct pci_config_table pci_stxgp3_config_table[] = {
- { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
- PCI_IDSEL_NUMBER, PCI_ANY_ID,
- pci_cfgfunc_config_device, { PCI_ENET0_IOADDR,
- PCI_ENET0_MEMADDR,
- PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER
- } },
- { }
-};
-#endif
-
-
-static struct pci_controller hose = {
-#ifndef CONFIG_PCI_PNP
- config_table: pci_stxgp3_config_table,
-#endif
-};
-
-#endif /* CONFIG_PCI */
-
-
-void
-pci_init_board(void)
-{
-#ifdef CONFIG_PCI
- extern void pci_mpc85xx_init(struct pci_controller *hose);
-
- pci_mpc85xx_init(&hose);
-#endif /* CONFIG_PCI */
-}
diff --git a/board/stxgp3/u-boot.lds b/board/stxgp3/u-boot.lds
deleted file mode 100644
index 3bc615021d..0000000000
--- a/board/stxgp3/u-boot.lds
+++ /dev/null
@@ -1,159 +0,0 @@
-/*
- * (C) Copyright 2003 Embedded Edge, LLC
- * Dan Malek, <dan@embeddededge.com>
- * Copied from ADS85xx.
- * Updates for Silicon Tx GP3 8560.
- *
- * (C) Copyright 2002,2003,Motorola,Inc.
- * Xianghua Xiao, X.Xiao@motorola.com.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- .resetvec 0xFFFFFFFC :
- {
- *(.resetvec)
- } = 0xffff
-
- .bootpg 0xFFFFF000 :
- {
- cpu/mpc85xx/start.o (.bootpg)
- board/stxgp3/init.o (.bootpg)
- } = 0xffff
-
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc85xx/start.o (.text)
- board/stxgp3/init.o (.text)
- cpu/mpc85xx/commproc.o (.text)
- cpu/mpc85xx/traps.o (.text)
- cpu/mpc85xx/interrupts.o (.text)
- cpu/mpc85xx/serial_scc.o (.text)
- cpu/mpc85xx/ether_fcc.o (.text)
- cpu/mpc85xx/cpu_init.o (.text)
- cpu/mpc85xx/cpu.o (.text)
- cpu/mpc85xx/speed.o (.text)
- cpu/mpc85xx/i2c.o (.text)
- cpu/mpc85xx/spd_sdram.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/extable.o (.text)
- lib_generic/zlib.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/stxxtc/Makefile b/board/stxxtc/Makefile
deleted file mode 100644
index 11065cfd2c..0000000000
--- a/board/stxxtc/Makefile
+++ /dev/null
@@ -1,48 +0,0 @@
-#
-# (C) Copyright 2000-2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o oftree.o
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-%.dtb: %.dts
- dtc -f -V 0x10 -I dts -O dtb $< >$@
-
-%.c: %.dtb
- xxd -i $< \
- | sed -e "s/^unsigned char/const unsigned char/g" \
- | sed -e "s/^unsigned int/const unsigned int/g" > $@
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/stxxtc/config.mk b/board/stxxtc/config.mk
deleted file mode 100644
index f5dc034250..0000000000
--- a/board/stxxtc/config.mk
+++ /dev/null
@@ -1,28 +0,0 @@
-#
-# (C) Copyright 2000-2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# STx XTc
-#
-
-TEXT_BASE = 0x40F00000
diff --git a/board/stxxtc/oftree.dts b/board/stxxtc/oftree.dts
deleted file mode 100644
index e3f3017943..0000000000
--- a/board/stxxtc/oftree.dts
+++ /dev/null
@@ -1,52 +0,0 @@
-/ {
- model = "STXXTC V1";
- compatible = "STXXTC";
- #address-cells = <2>;
- #size-cells = <2>;
-
- cpus {
- linux,phandle = <1>;
- #address-cells = <1>;
- #size-cells = <0>;
- PowerPC,MPC870@0 {
- linux,phandle = <3>;
- name = "PowerPC,MPC870";
- device_type = "cpu";
- reg = <0>;
- clock-frequency = <0>; /* place-holder for runtime fillup */
- timebase-frequency = <0>; /* dido */
- linux,boot-cpu;
- i-cache-size = <2000>;
- d-cache-size = <2000>;
- 32-bit;
- };
- };
-
- memory@0 {
- device_type = "memory";
- reg = <00000000 00000000 00000000 20000000>;
- };
-
- /* copy of the bd_t information (place-holders) */
- bd_t {
- memstart = <0>;
- memsize = <0>;
- flashstart = <0>;
- flashsize = <0>;
- flashoffset = <0>;
- sramstart = <0>;
- sramsize = <0>;
-
- immr_base = <0>;
-
- bootflags = <0>;
- ip_addr = <0>;
- enetaddr = [ 00 00 00 00 00 00 ];
- ethspeed = <0>;
- intfreq = <0>;
- busfreq = <0>;
-
- baudrate = <0>;
- };
-
-};
diff --git a/board/stxxtc/stxxtc.c b/board/stxxtc/stxxtc.c
deleted file mode 100644
index aa3d129f9c..0000000000
--- a/board/stxxtc/stxxtc.c
+++ /dev/null
@@ -1,638 +0,0 @@
-/*
- * (C) Copyright 2000-2004
- * Pantelis Antoniou, Intracom S.A., panto@intracom.gr
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- * (C) Copyright 2005
- * Dan Malek, Embedded Edge, LLC, dan@embeddededge.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * U-Boot port on STx XTc board
- * Mostly copied from Netta
- */
-
-#include <common.h>
-#include <miiphy.h>
-
-#include "mpc8xx.h"
-
-#ifdef CONFIG_HW_WATCHDOG
-#include <watchdog.h>
-#endif
-
-/****************************************************************/
-
-/* some sane bit macros */
-#define _BD(_b) (1U << (31-(_b)))
-#define _BDR(_l, _h) (((((1U << (31-(_l))) - 1) << 1) | 1) & ~((1U << (31-(_h))) - 1))
-
-#define _BW(_b) (1U << (15-(_b)))
-#define _BWR(_l, _h) (((((1U << (15-(_l))) - 1) << 1) | 1) & ~((1U << (15-(_h))) - 1))
-
-#define _BB(_b) (1U << (7-(_b)))
-#define _BBR(_l, _h) (((((1U << (7-(_l))) - 1) << 1) | 1) & ~((1U << (7-(_h))) - 1))
-
-#define _B(_b) _BD(_b)
-#define _BR(_l, _h) _BDR(_l, _h)
-
-/****************************************************************/
-
-/*
- * Check Board Identity:
- *
- * Return 1 always.
- */
-
-int checkboard(void)
-{
- printf ("Silicon Turnkey eXpress XTc\n");
- return (0);
-}
-
-/****************************************************************/
-
-#define _NOT_USED_ 0xFFFFFFFF
-
-/****************************************************************/
-
-#define CS_0000 0x00000000
-#define CS_0001 0x10000000
-#define CS_0010 0x20000000
-#define CS_0011 0x30000000
-#define CS_0100 0x40000000
-#define CS_0101 0x50000000
-#define CS_0110 0x60000000
-#define CS_0111 0x70000000
-#define CS_1000 0x80000000
-#define CS_1001 0x90000000
-#define CS_1010 0xA0000000
-#define CS_1011 0xB0000000
-#define CS_1100 0xC0000000
-#define CS_1101 0xD0000000
-#define CS_1110 0xE0000000
-#define CS_1111 0xF0000000
-
-#define BS_0000 0x00000000
-#define BS_0001 0x01000000
-#define BS_0010 0x02000000
-#define BS_0011 0x03000000
-#define BS_0100 0x04000000
-#define BS_0101 0x05000000
-#define BS_0110 0x06000000
-#define BS_0111 0x07000000
-#define BS_1000 0x08000000
-#define BS_1001 0x09000000
-#define BS_1010 0x0A000000
-#define BS_1011 0x0B000000
-#define BS_1100 0x0C000000
-#define BS_1101 0x0D000000
-#define BS_1110 0x0E000000
-#define BS_1111 0x0F000000
-
-#define GPL0_AAAA 0x00000000
-#define GPL0_AAA0 0x00200000
-#define GPL0_AAA1 0x00300000
-#define GPL0_000A 0x00800000
-#define GPL0_0000 0x00A00000
-#define GPL0_0001 0x00B00000
-#define GPL0_111A 0x00C00000
-#define GPL0_1110 0x00E00000
-#define GPL0_1111 0x00F00000
-
-#define GPL1_0000 0x00000000
-#define GPL1_0001 0x00040000
-#define GPL1_1110 0x00080000
-#define GPL1_1111 0x000C0000
-
-#define GPL2_0000 0x00000000
-#define GPL2_0001 0x00010000
-#define GPL2_1110 0x00020000
-#define GPL2_1111 0x00030000
-
-#define GPL3_0000 0x00000000
-#define GPL3_0001 0x00004000
-#define GPL3_1110 0x00008000
-#define GPL3_1111 0x0000C000
-
-#define GPL4_0000 0x00000000
-#define GPL4_0001 0x00001000
-#define GPL4_1110 0x00002000
-#define GPL4_1111 0x00003000
-
-#define GPL5_0000 0x00000000
-#define GPL5_0001 0x00000400
-#define GPL5_1110 0x00000800
-#define GPL5_1111 0x00000C00
-#define LOOP 0x00000080
-
-#define EXEN 0x00000040
-
-#define AMX_COL 0x00000000
-#define AMX_ROW 0x00000020
-#define AMX_MAR 0x00000030
-
-#define NA 0x00000008
-
-#define UTA 0x00000004
-
-#define TODT 0x00000002
-
-#define LAST 0x00000001
-
-#define A10_AAAA GPL0_AAAA
-#define A10_AAA0 GPL0_AAA0
-#define A10_AAA1 GPL0_AAA1
-#define A10_000A GPL0_000A
-#define A10_0000 GPL0_0000
-#define A10_0001 GPL0_0001
-#define A10_111A GPL0_111A
-#define A10_1110 GPL0_1110
-#define A10_1111 GPL0_1111
-
-#define RAS_0000 GPL1_0000
-#define RAS_0001 GPL1_0001
-#define RAS_1110 GPL1_1110
-#define RAS_1111 GPL1_1111
-
-#define CAS_0000 GPL2_0000
-#define CAS_0001 GPL2_0001
-#define CAS_1110 GPL2_1110
-#define CAS_1111 GPL2_1111
-
-#define WE_0000 GPL3_0000
-#define WE_0001 GPL3_0001
-#define WE_1110 GPL3_1110
-#define WE_1111 GPL3_1111
-
-/* #define CAS_LATENCY 3 */
-#define CAS_LATENCY 2
-
-const uint sdram_table[0x40] = {
-
-#if CAS_LATENCY == 3
- /* RSS */
- CS_0001 | BS_1111 | A10_AAAA | RAS_0001 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* ACT */
- CS_1111 | BS_1111 | A10_0000 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* NOP */
- CS_0000 | BS_1111 | A10_0001 | RAS_1111 | CAS_0001 | WE_1111 | AMX_COL | UTA, /* READ */
- CS_0001 | BS_0001 | A10_1111 | RAS_0001 | CAS_1111 | WE_0001 | AMX_COL | UTA, /* PALL */
- CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL, /* NOP */
- CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA | TODT | LAST, /* NOP */
- _NOT_USED_, _NOT_USED_,
-
- /* RBS */
- CS_0001 | BS_1111 | A10_AAAA | RAS_0001 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* ACT */
- CS_1111 | BS_1111 | A10_0000 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* NOP */
- CS_0001 | BS_1111 | A10_0001 | RAS_1111 | CAS_0001 | WE_1111 | AMX_COL | UTA, /* READ */
- CS_1111 | BS_0000 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* NOP */
- CS_1111 | BS_0000 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL, /* NOP */
- CS_1111 | BS_0000 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL, /* NOP */
- CS_0001 | BS_0001 | A10_1111 | RAS_0001 | CAS_1111 | WE_0001 | AMX_COL, /* PALL */
- CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | TODT | LAST, /* NOP */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /* WSS */
- CS_0001 | BS_1111 | A10_AAAA | RAS_0001 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* ACT */
- CS_1111 | BS_1111 | A10_0000 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL, /* NOP */
- CS_0000 | BS_0001 | A10_0000 | RAS_1111 | CAS_0001 | WE_0000 | AMX_COL | UTA, /* WRITE */
- CS_0001 | BS_1111 | A10_1111 | RAS_0001 | CAS_1111 | WE_0001 | AMX_COL | UTA, /* PALL */
- CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA | TODT | LAST, /* NOP */
- _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /* WBS */
- CS_0001 | BS_1111 | A10_AAAA | RAS_0001 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* ACT */
- CS_1111 | BS_1111 | A10_0000 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL, /* NOP */
- CS_0001 | BS_0000 | A10_0000 | RAS_1111 | CAS_0001 | WE_0000 | AMX_COL, /* WRITE */
- CS_1111 | BS_0000 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL, /* NOP */
- CS_1111 | BS_0000 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL, /* NOP */
- CS_1111 | BS_0001 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* NOP */
- CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* NOP */
- CS_0001 | BS_1111 | A10_1111 | RAS_0001 | CAS_1111 | WE_0001 | AMX_COL | UTA, /* PALL */
- CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA | TODT | LAST, /* NOP */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_,
-#endif
-
-#if CAS_LATENCY == 2
- /* RSS */
- CS_0001 | BS_1111 | A10_AAAA | RAS_0001 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* ACT */
- CS_1110 | BS_1110 | A10_0000 | RAS_1111 | CAS_1110 | WE_1111 | AMX_COL | UTA, /* NOP */
- CS_0001 | BS_0001 | A10_0000 | RAS_1111 | CAS_0001 | WE_1111 | AMX_COL | UTA, /* READ */
- CS_1110 | BS_1111 | A10_0001 | RAS_1110 | CAS_1111 | WE_1110 | AMX_COL, /* NOP */
- CS_0001 | BS_1111 | A10_1111 | RAS_0001 | CAS_1111 | WE_0001 | AMX_COL | UTA | TODT | LAST, /* PALL */
- _NOT_USED_,
- _NOT_USED_, _NOT_USED_,
-
- /* RBS */
- CS_0001 | BS_1111 | A10_AAAA | RAS_0001 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* ACT */
- CS_1110 | BS_1110 | A10_0000 | RAS_1111 | CAS_1110 | WE_1111 | AMX_COL | UTA, /* NOP */
- CS_0001 | BS_0000 | A10_0000 | RAS_1111 | CAS_0001 | WE_1111 | AMX_COL | UTA, /* READ */
- CS_1111 | BS_0000 | A10_0000 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL, /* NOP */
- CS_1111 | BS_0000 | A10_0000 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL, /* NOP */
- CS_1111 | BS_0001 | A10_0000 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL, /* NOP */
- CS_1110 | BS_1111 | A10_0001 | RAS_1110 | CAS_1111 | WE_1110 | AMX_COL, /* NOP */
- CS_0001 | BS_1111 | A10_1111 | RAS_0001 | CAS_1111 | WE_0001 | AMX_COL | UTA | TODT | LAST, /* PALL */
- _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /* WSS */
- CS_0001 | BS_1111 | A10_AAA0 | RAS_0001 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* ACT */
- CS_1110 | BS_1110 | A10_0000 | RAS_1111 | CAS_1110 | WE_1110 | AMX_COL, /* NOP */
- CS_0000 | BS_0001 | A10_0001 | RAS_1110 | CAS_0001 | WE_0000 | AMX_COL | UTA, /* WRITE */
- CS_0001 | BS_1111 | A10_1111 | RAS_0001 | CAS_1111 | WE_0001 | AMX_COL | UTA | TODT | LAST, /* PALL */
- _NOT_USED_,
- _NOT_USED_, _NOT_USED_,
- _NOT_USED_,
-
- /* WBS */
- CS_0001 | BS_1111 | A10_AAAA | RAS_0001 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* ACT */
- CS_1110 | BS_1110 | A10_0000 | RAS_1111 | CAS_1110 | WE_1110 | AMX_COL, /* NOP */
- CS_0001 | BS_0000 | A10_0000 | RAS_1111 | CAS_0001 | WE_0001 | AMX_COL, /* WRITE */
- CS_1111 | BS_0000 | A10_0000 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL, /* NOP */
- CS_1111 | BS_0000 | A10_0000 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL, /* NOP */
- CS_1110 | BS_0001 | A10_0001 | RAS_1110 | CAS_1111 | WE_1110 | AMX_COL | UTA, /* NOP */
- CS_0001 | BS_1111 | A10_1111 | RAS_0001 | CAS_1111 | WE_0001 | AMX_COL | UTA | TODT | LAST, /* PALL */
- _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_,
-
-#endif
-
- /* UPT */
- CS_0001 | BS_1111 | A10_1111 | RAS_0001 | CAS_0001 | WE_1111 | AMX_COL | UTA | LOOP, /* ATRFR */
- CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* NOP */
- CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* NOP */
- CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA, /* NOP */
- CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA | LOOP, /* NOP */
- CS_1111 | BS_1111 | A10_1111 | RAS_1111 | CAS_1111 | WE_1111 | AMX_COL | UTA | TODT | LAST, /* NOP */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_,
-
- /* EXC */
- CS_0001 | BS_1111 | A10_1111 | RAS_0001 | CAS_1111 | WE_0001 | AMX_COL | UTA | LAST,
- _NOT_USED_,
-
- /* REG */
- CS_1110 | BS_1111 | A10_1110 | RAS_1110 | CAS_1110 | WE_1110 | AMX_MAR | UTA,
- CS_0001 | BS_1111 | A10_0001 | RAS_0001 | CAS_0001 | WE_0001 | AMX_MAR | UTA | LAST,
-};
-
-static const uint nandcs_table[0x40] = {
- /* RSS */
- CS_1000 | GPL4_1111 | GPL5_1111 | UTA,
- CS_0000 | GPL4_1110 | GPL5_1111 | UTA,
- CS_0000 | GPL4_0000 | GPL5_1111 | UTA,
- CS_0000 | GPL4_0000 | GPL5_1111 | UTA,
- CS_0000 | GPL4_0000 | GPL5_1111,
- CS_0000 | GPL4_0001 | GPL5_1111 | UTA,
- CS_0000 | GPL4_1111 | GPL5_1111 | UTA,
- CS_0011 | GPL4_1111 | GPL5_1111 | UTA | LAST, /* NOP */
-
- /* RBS */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /* WSS */
- CS_1000 | GPL4_1111 | GPL5_1110 | UTA,
- CS_0000 | GPL4_1111 | GPL5_0000 | UTA,
- CS_0000 | GPL4_1111 | GPL5_0000 | UTA,
- CS_0000 | GPL4_1111 | GPL5_0000 | UTA,
- CS_0000 | GPL4_1111 | GPL5_0001 | UTA,
- CS_0000 | GPL4_1111 | GPL5_1111 | UTA,
- CS_0000 | GPL4_1111 | GPL5_1111,
- CS_0011 | GPL4_1111 | GPL5_1111 | UTA | LAST,
-
- /* WBS */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /* UPT */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /* EXC */
- CS_0001 | LAST,
- _NOT_USED_,
-
- /* REG */
- CS_1110 ,
- CS_0001 | LAST,
-};
-
-/* 0xC8 = 0b11001000 , CAS3, >> 2 = 0b00 11 0 010 */
-/* 0x88 = 0b10001000 , CAS2, >> 2 = 0b00 10 0 010 */
-#define MAR_SDRAM_INIT ((CAS_LATENCY << 6) | 0x00000008LU)
-
-/* 9 */
-#define CFG_MAMR ((CFG_MAMR_PTA << MAMR_PTA_SHIFT) | MAMR_PTAE | \
- MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \
- MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X)
-
-void check_ram(unsigned int addr, unsigned int size)
-{
- unsigned int i, j, v, vv;
- volatile unsigned int *p;
- unsigned int pv;
-
- p = (unsigned int *)addr;
- pv = (unsigned int)p;
- for (i = 0; i < size / sizeof(unsigned int); i++, pv += sizeof(unsigned int))
- *p++ = pv;
-
- p = (unsigned int *)addr;
- for (i = 0; i < size / sizeof(unsigned int); i++) {
- v = (unsigned int)p;
- vv = *p;
- if (vv != v) {
- printf("%p: read %08x instead of %08x\n", p, vv, v);
- hang();
- }
- p++;
- }
-
- for (j = 0; j < 5; j++) {
- switch (j) {
- case 0: v = 0x00000000; break;
- case 1: v = 0xffffffff; break;
- case 2: v = 0x55555555; break;
- case 3: v = 0xaaaaaaaa; break;
- default:v = 0xdeadbeef; break;
- }
- p = (unsigned int *)addr;
- for (i = 0; i < size / sizeof(unsigned int); i++) {
- *p = v;
- vv = *p;
- if (vv != v) {
- printf("%p: read %08x instead of %08x\n", p, vv, v);
- hang();
- }
- *p = ~v;
- p++;
- }
- }
-}
-
-#define DO_LOOP do { for (;;) asm volatile ("nop" : : : "memory"); } while(0)
-
-long int initdram(int board_type)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- long int size;
- u32 d1, d2;
-
- upmconfig(UPMA, (uint *) sdram_table, sizeof(sdram_table) / sizeof(sdram_table[0]));
-
- /*
- * Preliminary prescaler for refresh
- */
- memctl->memc_mptpr = MPTPR_PTP_DIV8;
-
- memctl->memc_mar = MAR_SDRAM_INIT; /* 32-bit address to be output on the address bus if AMX = 0b11 */
-
- /*
- * Map controller bank 3 to the SDRAM bank at preliminary address.
- */
- memctl->memc_or4 = CFG_OR4_PRELIM;
- memctl->memc_br4 = CFG_BR4_PRELIM;
-
- memctl->memc_mamr = CFG_MAMR & ~MAMR_PTAE; /* no refresh yet */
-
- udelay(200);
-
- /* perform SDRAM initialisation sequence */
- memctl->memc_mcr = MCR_OP_RUN | MCR_UPM_A | MCR_MB_CS4 | MCR_MLCF(1) | MCR_MAD(0x3C); /* precharge all */
- udelay(1);
-
- memctl->memc_mcr = MCR_OP_RUN | MCR_UPM_A | MCR_MB_CS4 | MCR_MLCF(2) | MCR_MAD(0x30); /* refresh 2 times(0) */
- udelay(1);
-
- memctl->memc_mcr = MCR_OP_RUN | MCR_UPM_A | MCR_MB_CS4 | MCR_MLCF(1) | MCR_MAD(0x3E); /* exception program (write mar)*/
- udelay(1);
-
- memctl->memc_mamr |= MAMR_PTAE; /* enable refresh */
-
- udelay(10000);
-
-
- d1 = 0xAA55AA55;
- *(volatile u32 *)0 = d1;
- d2 = *(volatile u32 *)0;
- if (d1 != d2) {
- printf("DRAM fails: wrote 0x%08x read 0x%08x\n", d1, d2);
- DO_LOOP;
- }
-
- d1 = 0x55AA55AA;
- *(volatile u32 *)0 = d1;
- d2 = *(volatile u32 *)0;
- if (d1 != d2) {
- printf("DRAM fails: wrote 0x%08x read 0x%08x\n", d1, d2);
- DO_LOOP;
- }
-
- d1 = 0x12345678;
- *(volatile u32 *)0 = d1;
- d2 = *(volatile u32 *)0;
- if (d1 != d2) {
- printf("DRAM fails: wrote 0x%08x read 0x%08x\n", d1, d2);
- DO_LOOP;
- }
-
- size = get_ram_size((long *)0, SDRAM_MAX_SIZE);
-
- return size;
-}
-
-/* ------------------------------------------------------------------------- */
-
-void reset_phys(void)
-{
- int phyno;
- unsigned short v;
-
- udelay(10000);
- /* reset the damn phys */
- mii_init();
-
- for (phyno = 0; phyno < 32; ++phyno) {
- miiphy_read("FEC ETHERNET", phyno, PHY_PHYIDR1, &v);
- if (v == 0xFFFF)
- continue;
- miiphy_write("FEC ETHERNET", phyno, PHY_BMCR, PHY_BMCR_POWD);
- udelay(10000);
- miiphy_write("FEC ETHERNET", phyno, PHY_BMCR, PHY_BMCR_RESET | PHY_BMCR_AUTON);
- udelay(10000);
- }
-}
-
-/* ------------------------------------------------------------------------- */
-
-/* GP = general purpose, SP = special purpose (on chip peripheral) */
-
-/* bits that can have a special purpose or can be configured as inputs/outputs */
-#define PA_GP_INMASK _BW(6)
-#define PA_GP_OUTMASK (_BW(7))
-#define PA_SP_MASK 0
-#define PA_ODR_VAL 0
-#define PA_GP_OUTVAL (_BW(7))
-#define PA_SP_DIRVAL 0
-
-#define PB_GP_INMASK 0
-#define PB_GP_OUTMASK (_B(23))
-#define PB_SP_MASK 0
-#define PB_ODR_VAL 0
-#define PB_GP_OUTVAL (_B(23))
-#define PB_SP_DIRVAL 0
-
-#define PC_GP_INMASK 0
-#define PC_GP_OUTMASK (_BW(15))
-
-#define PC_SP_MASK 0
-#define PC_SOVAL 0
-#define PC_INTVAL 0
-#define PC_GP_OUTVAL 0
-#define PC_SP_DIRVAL 0
-
-#define PE_GP_INMASK 0
-#define PE_GP_OUTMASK 0
-#define PE_GP_OUTVAL 0
-
-#define PE_SP_MASK 0
-#define PE_ODR_VAL 0
-#define PE_SP_DIRVAL 0
-
-int board_early_init_f(void)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile iop8xx_t *ioport = &immap->im_ioport;
- volatile cpm8xx_t *cpm = &immap->im_cpm;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
-
- (void)ioport;
- (void)cpm;
-#if 1
- /* NAND chip select */
- upmconfig(UPMB, (uint *) nandcs_table, sizeof(nandcs_table) / sizeof(nandcs_table[0]));
- memctl->memc_or2 = ((0xFFFFFFFFLU & ~(NAND_SIZE - 1)) | OR_BI | OR_G5LS);
- memctl->memc_br2 = ((NAND_BASE & BR_BA_MSK) | BR_PS_8 | BR_V | BR_MS_UPMB);
- memctl->memc_mbmr = 0; /* all clear */
-#endif
-
- memctl->memc_br5 &= ~BR_V;
- memctl->memc_br6 &= ~BR_V;
- memctl->memc_br7 &= ~BR_V;
-
-#if 1
- ioport->iop_padat = PA_GP_OUTVAL;
- ioport->iop_paodr = PA_ODR_VAL;
- ioport->iop_padir = PA_GP_OUTMASK | PA_SP_DIRVAL;
- ioport->iop_papar = PA_SP_MASK;
-
- cpm->cp_pbdat = PB_GP_OUTVAL;
- cpm->cp_pbodr = PB_ODR_VAL;
- cpm->cp_pbdir = PB_GP_OUTMASK | PB_SP_DIRVAL;
- cpm->cp_pbpar = PB_SP_MASK;
-
- ioport->iop_pcdat = PC_GP_OUTVAL;
- ioport->iop_pcdir = PC_GP_OUTMASK | PC_SP_DIRVAL;
- ioport->iop_pcso = PC_SOVAL;
- ioport->iop_pcint = PC_INTVAL;
- ioport->iop_pcpar = PC_SP_MASK;
-
- cpm->cp_pedat = PE_GP_OUTVAL;
- cpm->cp_peodr = PE_ODR_VAL;
- cpm->cp_pedir = PE_GP_OUTMASK | PE_SP_DIRVAL;
- cpm->cp_pepar = PE_SP_MASK;
-#endif
-
- return 0;
-}
-
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
-
-#include <linux/mtd/nand.h>
-
-extern ulong nand_probe(ulong physadr);
-extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
-
-void nand_init(void)
-{
- unsigned long totlen;
-
- totlen = nand_probe(CFG_NAND_BASE);
- printf ("%4lu MB\n", totlen >> 20);
-}
-#endif
-
-#ifdef CONFIG_HW_WATCHDOG
-
-void hw_watchdog_reset(void)
-{
- /* XXX add here the really funky stuff */
-}
-
-#endif
-
-#ifdef CONFIG_SHOW_ACTIVITY
-
-/* called from timer interrupt every 1/CFG_HZ sec */
-void board_show_activity(ulong timestamp)
-{
-}
-
-/* called when looping */
-void show_activity(int arg)
-{
-}
-
-#endif
-
-#if defined(CFG_CONSOLE_IS_IN_ENV) && defined(CFG_CONSOLE_OVERWRITE_ROUTINE)
-int overwrite_console(void)
-{
- /* printf("overwrite_console called\n"); */
- return 0;
-}
-#endif
-
-extern int drv_phone_init(void);
-extern int drv_phone_use_me(void);
-extern int drv_phone_is_idle(void);
-
-int misc_init_r(void)
-{
- return 0;
-}
-
-int last_stage_init(void)
-{
- reset_phys();
-
- return 0;
-}
diff --git a/board/stxxtc/u-boot.lds b/board/stxxtc/u-boot.lds
deleted file mode 100644
index 9f2901c869..0000000000
--- a/board/stxxtc/u-boot.lds
+++ /dev/null
@@ -1,141 +0,0 @@
-/*
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc8xx/start.o (.text)
- cpu/mpc8xx/traps.o (.text)
- common/dlmalloc.o (.text)
- lib_ppc/ppcstring.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
- lib_generic/zlib.o (.text)
- lib_ppc/cache.o (.text)
- lib_ppc/time.o (.text)
-
- . = DEFINED(env_offset) ? env_offset : .;
- common/environment.o (.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/stxxtc/u-boot.lds.debug b/board/stxxtc/u-boot.lds.debug
deleted file mode 100644
index 004e7fd354..0000000000
--- a/board/stxxtc/u-boot.lds.debug
+++ /dev/null
@@ -1,137 +0,0 @@
-/*
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc8xx/start.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
-
- . = env_offset;
- common/environment.o(.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/svm_sc8xx/Makefile b/board/svm_sc8xx/Makefile
deleted file mode 100644
index 13ce9fc9d2..0000000000
--- a/board/svm_sc8xx/Makefile
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/svm_sc8xx/config.mk b/board/svm_sc8xx/config.mk
deleted file mode 100644
index 4bec9cbe84..0000000000
--- a/board/svm_sc8xx/config.mk
+++ /dev/null
@@ -1,24 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-TEXT_BASE = 0x40000000
diff --git a/board/svm_sc8xx/flash.c b/board/svm_sc8xx/flash.c
deleted file mode 100644
index 25e61dd5e5..0000000000
--- a/board/svm_sc8xx/flash.c
+++ /dev/null
@@ -1,797 +0,0 @@
-/*
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-
-#ifndef CFG_ENV_ADDR
-#define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_ENV_OFFSET)
-#endif
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static int write_word (flash_info_t *info, ulong dest, ulong data);
-#if 0
-static ulong flash_get_size (vu_long *addr, flash_info_t *info);
-static void flash_get_offsets (ulong base, flash_info_t *info);
-#endif
-#ifdef CONFIG_BOOT_8B
-static int my_in_8( unsigned char *addr);
-static void my_out_8( unsigned char *addr, int val);
-#endif
-#ifdef CONFIG_BOOT_16B
-static int my_in_be16( unsigned short *addr);
-static void my_out_be16( unsigned short *addr, int val);
-#endif
-#ifdef CONFIG_BOOT_32B
-static unsigned my_in_be32( unsigned *addr);
-static void my_out_be32( unsigned *addr, int val);
-#endif
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- unsigned long size_b0, size_b1;
- int i;
-
- size_b0=0;
- size_b1=0;
- /* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-#ifdef CFG_DOC_BASE
-#ifndef CONFIG_FEL8xx_AT
- memctl->memc_or5 = (0xffff8000 | CFG_OR_TIMING_DOC ); /* 32k bytes */
- memctl->memc_br5 = CFG_DOC_BASE | 0x401;
-#else
- memctl->memc_or3 = (0xffff8000 | CFG_OR_TIMING_DOC ); /* 32k bytes */
- memctl->memc_br3 = CFG_DOC_BASE | 0x401;
-#endif
-#endif
-#if defined( CONFIG_BOOT_8B)
-/* memctl->memc_or0 = 0xfff80ff4; /###* 4MB bytes */
-/* memctl->memc_br0 = 0x40000401; */
- size_b0 = 0x80000; /* 512 K */
- flash_info[0].flash_id = FLASH_MAN_AMD | FLASH_AM040;
- flash_info[0].sector_count = 8;
- flash_info[0].size = 0x00080000;
- /* set up sector start address table */
- for (i = 0; i < flash_info[0].sector_count; i++)
- flash_info[0].start[i] = 0x40000000 + (i * 0x10000);
- /* protect all sectors */
- for (i = 0; i < flash_info[0].sector_count; i++)
- flash_info[0].protect[i] = 0x1;
-#elif defined (CONFIG_BOOT_16B)
-/* memctl->memc_or0 = 0xfff80ff4; /###* 4MB bytes */
-/* memctl->memc_br0 = 0x40000401; */
- size_b0 = 0x400000; /* 4MB , assume AMD29LV320B */
- flash_info[0].flash_id = FLASH_MAN_AMD | FLASH_AM320B;
- flash_info[0].sector_count = 67;
- flash_info[0].size = 0x00400000;
- /* set up sector start address table */
- flash_info[0].start[0] = 0x40000000 ;
- flash_info[0].start[1] = 0x40000000 + 0x4000;
- flash_info[0].start[2] = 0x40000000 + 0x6000;
- flash_info[0].start[3] = 0x40000000 + 0x8000;
- for (i = 4; i < flash_info[0].sector_count; i++)
- flash_info[0].start[i] = 0x40000000 + 0x10000 + ((i-4) * 0x10000);
- /* protect all sectors */
- for (i = 0; i < flash_info[0].sector_count; i++)
- flash_info[0].protect[i] = 0x1;
-#endif
-
-
-#ifdef CONFIG_BOOT_32B
-
- /* Static FLASH Bank configuration here - FIXME XXX */
-
- size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size_b0, size_b0<<20);
- }
-
- size_b1 = flash_get_size((vu_long *)FLASH_BASE1_PRELIM, &flash_info[1]);
-
- if (size_b1 > size_b0) {
- printf ("## ERROR: "
- "Bank 1 (0x%08lx = %ld MB) > Bank 0 (0x%08lx = %ld MB)\n",
- size_b1, size_b1<<20,
- size_b0, size_b0<<20
- );
- flash_info[0].flash_id = FLASH_UNKNOWN;
- flash_info[1].flash_id = FLASH_UNKNOWN;
- flash_info[0].sector_count = -1;
- flash_info[1].sector_count = -1;
- flash_info[0].size = 0;
- flash_info[1].size = 0;
- return (0);
- }
-
- /* Remap FLASH according to real size */
- memctl->memc_or0 = CFG_OR_TIMING_FLASH | (-size_b0 & OR_AM_MSK);
- memctl->memc_br0 = (CFG_FLASH_BASE & BR_BA_MSK) | BR_MS_GPCM | BR_V;
-
- /* Re-do sizing to get full correct info */
- size_b0 = flash_get_size((vu_long *)CFG_FLASH_BASE, &flash_info[0]);
-
- flash_get_offsets (CFG_FLASH_BASE, &flash_info[0]);
-
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
- /* monitor protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+monitor_flash_len-1,
- &flash_info[0]);
-#endif
-
-#ifdef CFG_ENV_IS_IN_FLASH
- /* ENV protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR+CFG_ENV_SIZE-1,
- &flash_info[0]);
-#endif
-
- if (size_b1) {
- memctl->memc_or1 = CFG_OR_TIMING_FLASH | (-size_b1 & 0xFFFF8000);
- memctl->memc_br1 = ((CFG_FLASH_BASE + size_b0) & BR_BA_MSK) |
- BR_MS_GPCM | BR_V;
-
- /* Re-do sizing to get full correct info */
- size_b1 = flash_get_size((vu_long *)(CFG_FLASH_BASE + size_b0),
- &flash_info[1]);
-
- flash_get_offsets (CFG_FLASH_BASE + size_b0, &flash_info[1]);
-
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
- /* monitor protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+monitor_flash_len-1,
- &flash_info[1]);
-#endif
-
-#ifdef CFG_ENV_IS_IN_FLASH
- /* ENV protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR+CFG_ENV_SIZE-1,
- &flash_info[1]);
-#endif
- } else {
- memctl->memc_br1 = 0; /* invalidate bank */
-
- flash_info[1].flash_id = FLASH_UNKNOWN;
- flash_info[1].sector_count = -1;
- }
-
- flash_info[0].size = size_b0;
- flash_info[1].size = size_b1;
-
-
-#endif /* CONFIG_BOOT_32B */
-
- return (size_b0 + size_b1);
-}
-#if 0
-/*-----------------------------------------------------------------------
- */
-static void flash_get_offsets (ulong base, flash_info_t *info)
-{
- int i;
-
- /* set up sector start address table */
- if (info->flash_id & FLASH_BTYPE) {
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00008000;
- info->start[2] = base + 0x0000C000;
- info->start[3] = base + 0x00010000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00020000) - 0x00060000;
- }
- } else {
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- info->start[i--] = base + info->size - 0x00008000;
- info->start[i--] = base + info->size - 0x0000C000;
- info->start[i--] = base + info->size - 0x00010000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00020000;
- }
- }
-}
-#endif
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD: printf ("AMD "); break;
- case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
- default: printf ("Unknown Vendor "); break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM400B: printf ("AM29LV400B (4 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM400T: printf ("AM29LV400T (4 Mbit, top boot sector)\n");
- break;
- case FLASH_AM800B: printf ("AM29LV800B (8 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM800T: printf ("AM29LV800T (8 Mbit, top boot sector)\n");
- break;
- case FLASH_AM160B: printf ("AM29LV160B (16 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM160T: printf ("AM29LV160T (16 Mbit, top boot sector)\n");
- break;
- case FLASH_AM320B: printf ("AM29LV320B (32 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM320T: printf ("AM29LV320T (32 Mbit, top boot sector)\n");
- break;
- default: printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " "
- );
- }
- printf ("\n");
- return;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-#if 0
-static ulong flash_get_size (vu_long *addr, flash_info_t *info)
-{
- short i;
- ulong value;
- ulong base = (ulong)addr;
-
- /* Write auto select command: read Manufacturer ID */
- addr[0x0555] = 0x00AA00AA;
- addr[0x02AA] = 0x00550055;
- addr[0x0555] = 0x00900090;
-
- value = addr[0];
-
- switch (value) {
- case AMD_MANUFACT:
- info->flash_id = FLASH_MAN_AMD;
- break;
- case FUJ_MANUFACT:
- info->flash_id = FLASH_MAN_FUJ;
- break;
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- return (0); /* no or unknown flash */
- }
-
- value = addr[1]; /* device ID */
-
- switch (value) {
- case AMD_ID_LV400T:
- info->flash_id += FLASH_AM400T;
- info->sector_count = 11;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case AMD_ID_LV400B:
- info->flash_id += FLASH_AM400B;
- info->sector_count = 11;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case AMD_ID_LV800T:
- info->flash_id += FLASH_AM800T;
- info->sector_count = 19;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case AMD_ID_LV800B:
- info->flash_id += FLASH_AM800B;
- info->sector_count = 19;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case AMD_ID_LV160T:
- info->flash_id += FLASH_AM160T;
- info->sector_count = 35;
- info->size = 0x00400000;
- break; /* => 4 MB */
-
- case AMD_ID_LV160B:
- info->flash_id += FLASH_AM160B;
- info->sector_count = 35;
- info->size = 0x00400000;
- break; /* => 4 MB */
-#if 0 /* enable when device IDs are available */
- case AMD_ID_LV320T:
- info->flash_id += FLASH_AM320T;
- info->sector_count = 67;
- info->size = 0x00800000;
- break; /* => 8 MB */
-
- case AMD_ID_LV320B:
- info->flash_id += FLASH_AM320B;
- info->sector_count = 67;
- info->size = 0x00800000;
- break; /* => 8 MB */
-#endif
- default:
- info->flash_id = FLASH_UNKNOWN;
- return (0); /* => no or unknown flash */
- }
-
- /* set up sector start address table */
- if (info->flash_id & FLASH_BTYPE) {
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00008000;
- info->start[2] = base + 0x0000C000;
- info->start[3] = base + 0x00010000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00020000) - 0x00060000;
- }
- } else {
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- info->start[i--] = base + info->size - 0x00008000;
- info->start[i--] = base + info->size - 0x0000C000;
- info->start[i--] = base + info->size - 0x00010000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00020000;
- }
- }
-
- /* check for protected sectors */
- for (i = 0; i < info->sector_count; i++) {
- /* read sector protection at sector address, (A7 .. A0) = 0x02 */
- /* D0 = 1 if protected */
- addr = (volatile unsigned long *)(info->start[i]);
- info->protect[i] = addr[2] & 1;
- }
-
- /*
- * Prevent writes to uninitialized FLASH.
- */
- if (info->flash_id != FLASH_UNKNOWN) {
- addr = (volatile unsigned long *)info->start[0];
-
- *addr = 0x00F000F0; /* reset bank */
- }
-
- return (info->size);
-}
-#endif
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- vu_long *addr = (vu_long*)(info->start[0]);
- int flag, prot, sect, l_sect,in_mid,in_did;
- ulong start, now, last;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- if ((info->flash_id == FLASH_UNKNOWN) ||
- (info->flash_id > FLASH_AMD_COMP)) {
- printf ("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- l_sect = -1;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-#if defined (CONFIG_BOOT_8B )
- my_out_8( (unsigned char * ) ((ulong)addr+0x555) , 0xaa );
- my_out_8( (unsigned char * ) ((ulong)addr+0x2aa) , 0x55 );
- my_out_8( (unsigned char * ) ((ulong)addr+0x555) , 0x90 );
- in_mid=my_in_8( (unsigned char * ) addr );
- in_did=my_in_8( (unsigned char * ) ((ulong)addr+1) );
- printf(" man ID=0x%x, dev ID=0x%x.\n",in_mid,in_did );
- my_out_8( (unsigned char *)addr, 0xf0);
- udelay(1);
- my_out_8( (unsigned char *) ((ulong)addr+0x555),0xaa );
- my_out_8( (unsigned char *) ((ulong)addr+0x2aa),0x55 );
- my_out_8( (unsigned char *) ((ulong)addr+0x555),0x80 );
- my_out_8( (unsigned char *) ((ulong)addr+0x555),0xaa );
- my_out_8( (unsigned char *) ((ulong)addr+0x2aa),0x55 );
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr = (vu_long*)(info->start[sect]);
- /*addr[0] = 0x00300030; */
- my_out_8( (unsigned char *) ((ulong)addr),0x30 );
- l_sect = sect;
- }
- }
-#elif defined(CONFIG_BOOT_16B )
- my_out_be16( (unsigned short * ) ((ulong)addr+ (0xaaa)) , 0xaa );
- my_out_be16( (unsigned short * ) ((ulong)addr+ (0x554)) , 0x55 );
- my_out_be16( (unsigned short * ) ((ulong)addr+ (0xaaa)) , 0x90 );
- in_mid=my_in_be16( (unsigned short * ) addr );
- in_did=my_in_be16 ( (unsigned short * ) ((ulong)addr+2) );
- printf(" man ID=0x%x, dev ID=0x%x.\n",in_mid,in_did );
- my_out_be16( (unsigned short *)addr, 0xf0);
- udelay(1);
- my_out_be16( (unsigned short *) ((ulong)addr+ 0xaaa),0xaa );
- my_out_be16( (unsigned short *) ((ulong)addr+0x554),0x55 );
- my_out_be16( (unsigned short *) ((ulong)addr+0xaaa),0x80 );
- my_out_be16( (unsigned short *) ((ulong)addr+0xaaa),0xaa );
- my_out_be16( (unsigned short *) ((ulong)addr+0x554),0x55 );
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr = (vu_long*)(info->start[sect]);
- my_out_be16( (unsigned short *) ((ulong)addr),0x30 );
- l_sect = sect;
- }
- }
-
-#elif defined(CONFIG_BOOT_32B)
- my_out_be32( (unsigned * ) ((ulong)addr+0x1554) , 0xaa );
- my_out_be32( (unsigned * ) ((ulong)addr+0xaa8) , 0x55 );
- my_out_be32( (unsigned *) ((ulong)addr+0x1554) , 0x90 );
- in_mid=my_in_be32( (unsigned * ) addr );
- in_did=my_in_be32( (unsigned * ) ((ulong)addr+4) );
- printf(" man ID=0x%x, dev ID=0x%x.\n",in_mid,in_did );
- my_out_be32( (unsigned *)addr, 0xf0);
- udelay(1);
- my_out_be32( (unsigned *) ((ulong)addr+0x1554),0xaa );
- my_out_be32( (unsigned *) ((ulong)addr+0xaa8),0x55 );
- my_out_be32( (unsigned *) ((ulong)addr+0x1554),0x80 );
- my_out_be32( (unsigned *) ((ulong)addr+0x1554),0xaa );
- my_out_be32( (unsigned *) ((ulong)addr+0xaa8),0x55 );
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr = (vu_long*)(info->start[sect]);
- my_out_be32( (unsigned *) ((ulong)addr),0x00300030 );
- l_sect = sect;
- }
- }
-
-#else
-# error CONFIG_BOOT_(size)B missing.
-#endif
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- /*
- * We wait for the last triggered sector
- */
- if (l_sect < 0)
- goto DONE;
-
- start = get_timer (0);
- last = start;
- addr = (vu_long*)(info->start[l_sect]);
-#if defined (CONFIG_BOOT_8B)
- while ( (my_in_8((unsigned char *)addr) & 0x80) != 0x80 )
-#elif defined(CONFIG_BOOT_16B )
- while ( (my_in_be16((unsigned short *)addr) & 0x0080) != 0x0080 )
-#elif defined(CONFIG_BOOT_32B)
- while ( (my_in_be32((unsigned *)addr) & 0x00800080) != 0x00800080 )
-#else
-# error CONFIG_BOOT_(size)B missing.
-#endif
- {
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- return 1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- }
-DONE:
- /* reset to read mode */
- addr = (volatile unsigned long *)info->start[0];
-#if defined (CONFIG_BOOT_8B)
- my_out_8( (unsigned char *)addr, 0xf0);
-#elif defined(CONFIG_BOOT_16B )
- my_out_be16( (unsigned short * ) addr , 0x00f0 );
-#elif defined(CONFIG_BOOT_32B)
- my_out_be32 ( (unsigned *)addr, 0x00F000F0 ); /* reset bank */
-#else
-# error CONFIG_BOOT_(size)B missing.
-#endif
- printf (" done\n");
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int i, l, rc;
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
- for (; i<4 && cnt>0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = 0;
- for (i=0; i<4; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- return (write_word(info, wp, data));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word (flash_info_t *info, ulong dest, ulong data)
-{
- ulong addr = (ulong)(info->start[0]);
- ulong start,last;
- int flag;
- ulong i;
- int data_short[2];
-
- /* Check if Flash is (sufficiently) erased */
- if ( ((ulong) *(ulong *)dest & data) != data ) {
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-#if defined(CONFIG_BOOT_8B)
-#ifdef DEBUG
- {
- int in_mid,in_did;
- my_out_8( (unsigned char * ) (addr+0x555) , 0xaa );
- my_out_8( (unsigned char * ) (addr+0x2aa) , 0x55 );
- my_out_8( (unsigned char * ) (addr+0x555) , 0x90 );
- in_mid=my_in_8( (unsigned char * ) addr );
- in_did=my_in_8( (unsigned char * ) (addr+1) );
- printf(" man ID=0x%x, dev ID=0x%x.\n",in_mid,in_did );
- my_out_8( (unsigned char *)addr, 0xf0);
- udelay(1);
- }
-#endif
- {
- int data_ch[4];
- data_ch[0]=(int ) ((data>>24) & 0xff);
- data_ch[1]=(int ) ((data>>16) &0xff );
- data_ch[2]=(int ) ((data >>8) & 0xff);
- data_ch[3]=(int ) (data & 0xff);
- for (i=0;i<4;i++ ){
- my_out_8( (unsigned char *) (addr+0x555),0xaa);
- my_out_8((unsigned char *) (addr+0x2aa),0x55);
- my_out_8( (unsigned char *) (addr+0x555),0xa0);
- my_out_8((unsigned char *) (dest+i) ,data_ch[i]);
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- start = get_timer (0);
- last = start;
- while( ( my_in_8((unsigned char *) (dest+i)) ) != ( data_ch[i] ) ) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT ) {
- return 1;
- }
- }
- }/* for */
- }
-#elif defined( CONFIG_BOOT_16B)
- data_short[0]=(int) (data>>16) & 0xffff;
- data_short[1]=(int ) data & 0xffff ;
- for (i=0;i<2;i++ ){
- my_out_be16( (unsigned short *) ((ulong)addr+ 0xaaa),0xaa );
- my_out_be16( (unsigned short *) ((ulong)addr+ 0x554),0x55 );
- my_out_be16( (unsigned short *) ((ulong)addr+ 0xaaa),0xa0 );
- my_out_be16( (unsigned short *) (dest+(i*2)) ,data_short[i]);
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
- start = get_timer (0);
- last = start;
- while( ( my_in_be16((unsigned short *) (dest+(i*2))) ) != ( data_short[i] ) ) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT ) {
- return 1;
- }
- }
- }
-#elif defined( CONFIG_BOOT_32B)
- addr[0x0555] = 0x00AA00AA;
- addr[0x02AA] = 0x00550055;
- addr[0x0555] = 0x00A000A0;
-
- *((vu_long *)dest) = data;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* data polling for D7 */
- start = get_timer (0);
- while ((*((vu_long *)dest) & 0x00800080) != (data & 0x00800080)) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- return (1);
- }
- }
-#endif
-
-
- return (0);
-}
-#ifdef CONFIG_BOOT_8B
-static int my_in_8 ( unsigned char *addr)
-{
- int ret;
- __asm__ __volatile__("lbz%U1%X1 %0,%1; eieio" : "=r" (ret) : "m" (*addr));
- return ret;
-}
-
-static void my_out_8 ( unsigned char *addr, int val)
-{
- __asm__ __volatile__("stb%U0%X0 %1,%0; eieio" : "=m" (*addr) : "r" (val));
-}
-#endif
-#ifdef CONFIG_BOOT_16B
-static int my_in_be16( unsigned short *addr)
-{
- int ret;
- __asm__ __volatile__("lhz%U1%X1 %0,%1; eieio" : "=r" (ret) : "m" (*addr));
- return ret;
-}
-static void my_out_be16( unsigned short *addr, int val)
-{
- __asm__ __volatile__("sth%U0%X0 %1,%0; eieio" : "=m" (*addr) : "r" (val));
-}
-#endif
-#ifdef CONFIG_BOOT_32B
-static unsigned my_in_be32( unsigned *addr)
-{
- unsigned ret;
- __asm__ __volatile__("lwz%U1%X1 %0,%1; eieio" : "=r" (ret) : "m" (*addr));
- return ret;
-}
-static void my_out_be32( unsigned *addr, int val)
-{
- __asm__ __volatile__("stw%U0%X0 %1,%0; eieio" : "=m" (*addr) : "r" (val));
-}
-#endif
diff --git a/board/svm_sc8xx/svm_sc8xx.c b/board/svm_sc8xx/svm_sc8xx.c
deleted file mode 100644
index 9bb9fd019f..0000000000
--- a/board/svm_sc8xx/svm_sc8xx.c
+++ /dev/null
@@ -1,162 +0,0 @@
-/*
- * (C) Copyright 2000, 2001, 2002
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-
-/* ------------------------------------------------------------------------- */
-const uint sdram_table[] =
-{
-/*-----------------
- UPM A contents:
------------------ */
-/*---------------------------------------------------
- Read Single Beat Cycle. Offset 0 in the RAM array.
----------------------------------------------------- */
-0x1f07fc04, 0xeeaefc04, 0x11adfc04, 0xefbbbc00 ,
-0x1ff77c47, 0x1ff77c35, 0xefeabc34, 0x1fb57c35 ,
-/*------------------------------------------------
- Read Burst Cycle. Offset 0x8 in the RAM array.
------------------------------------------------- */
-0x1f07fc04, 0xeeaefc04, 0x10adfc04, 0xf0affc00,
-0xf0affc00, 0xf1affc00, 0xefbbbc00, 0x1ff77c47,
-0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
-0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
-/*-------------------------------------------------------
- Write Single Beat Cycle. Offset 0x18 in the RAM array
-------------------------------------------------------- */
-0x1f27fc04, 0xeeaebc00, 0x01b93c04, 0x1ff77c47 ,
-0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff ,
-/*-------------------------------------------------
- Write Burst Cycle. Offset 0x20 in the RAM array
-------------------------------------------------- */
-0x1f07fc04, 0xeeaebc00, 0x10ad7c00, 0xf0affc00,
-0xf0affc00, 0xe1bbbc04, 0x1ff77c47, 0xffffffff,
-0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff ,
-0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff ,
-/*------------------------------------------------------------------------
- Periodic Timer Expired. For DRAM refresh. Offset 0x30 in the RAM array
------------------------------------------------------------------------- */
-0x1ff5fc84, 0xfffffc04, 0xfffffc04, 0xfffffc04,
-0xfffffc84, 0xfffffc07, 0xffffffff, 0xffffffff,
-0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff ,
-/*-----------
-* Exception:
-* ----------- */
-0x7ffefc07, 0xffffffff, 0xffffffff, 0xffffffff ,
-};
-
-/* ------------------------------------------------------------------------- */
-/*
- * Check Board Identity:
- *
- * Test ID string (SVM8...)
- *
- * Return 1 for "SC8xx" type, 0 else.
- */
-
-int checkboard (void)
-{
- char *s = getenv("serial#");
- int board_type;
-
- if (!s || strncmp(s, "SVM8", 4)) {
- printf ("### No HW ID - assuming SVM SC8xx\n");
- return (0);
- }
-
- board_type = 1;
-
- for (; *s; ++s) {
- if (*s == ' ')
- break;
- putc (*s);
- }
-
- putc ('\n');
-
- return (0);
-}
-
-/* ------------------------------------------------------------------------- */
-
-long int initdram (int board_type)
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- long int size_b0 = 0;
-
- upmconfig(UPMA, (uint *)sdram_table, sizeof(sdram_table)/sizeof(uint));
-
- memctl->memc_mptpr = CFG_MPTPR;
-#if defined (CONFIG_SDRAM_16M)
- memctl->memc_mamr = 0x00802114 | CFG_MxMR_PTx;
- memctl->memc_mcr = 0x80002105; /* SDRAM bank 0 */
- udelay(1);
- memctl->memc_mcr = 0x80002830;
- udelay(1);
- memctl->memc_mar = 0x00000088;
- udelay(1);
- memctl->memc_mcr = 0x80002106;
- udelay(1);
- memctl->memc_or1 = 0xff000a00;
- size_b0 = 0x01000000;
-#elif defined (CONFIG_SDRAM_32M)
- memctl->memc_mamr = 0x00904114 | CFG_MxMR_PTx;
- memctl->memc_mcr = 0x80002105; /* SDRAM bank 0 */
- udelay(1);
- memctl->memc_mcr = 0x80002830;
- udelay(1);
- memctl->memc_mar = 0x00000088;
- udelay(1);
- memctl->memc_mcr = 0x80002106;
- udelay(1);
- memctl->memc_or1 = 0xfe000a00;
- size_b0 = 0x02000000;
-#elif defined (CONFIG_SDRAM_64M)
- memctl->memc_mamr = 0x00a04114 | CFG_MxMR_PTx;
- memctl->memc_mcr = 0x80002105; /* SDRAM bank 0 */
- udelay(1);
- memctl->memc_mcr = 0x80002830;
- udelay(1);
- memctl->memc_mar = 0x00000088;
- udelay(1);
- memctl->memc_mcr = 0x80002106;
- udelay(1);
- memctl->memc_or1 = 0xfc000a00;
- size_b0 = 0x04000000;
-#else
-#error SDRAM size configuration missing.
-#endif
- memctl->memc_br1 = 0x00000081;
- udelay(200);
- return (size_b0 );
-}
-
-#if (CONFIG_COMMANDS & CFG_CMD_DOC)
-extern void doc_probe (ulong physadr);
-void doc_init (void)
-{
- doc_probe (CFG_DOC_BASE);
-}
-#endif
diff --git a/board/svm_sc8xx/u-boot.lds b/board/svm_sc8xx/u-boot.lds
deleted file mode 100644
index d7f7dc1329..0000000000
--- a/board/svm_sc8xx/u-boot.lds
+++ /dev/null
@@ -1,145 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc8xx/start.o (.text)
- cpu/mpc8xx/traps.o (.text)
- common/dlmalloc.o (.text)
- lib_ppc/ppcstring.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
- lib_generic/zlib.o (.text)
- lib_ppc/cache.o (.text)
- lib_ppc/time.o (.text)
-
- . = env_offset;
- common/environment.o (.ppcenv)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/svm_sc8xx/u-boot.lds.debug b/board/svm_sc8xx/u-boot.lds.debug
deleted file mode 100644
index 894b9bd25b..0000000000
--- a/board/svm_sc8xx/u-boot.lds.debug
+++ /dev/null
@@ -1,132 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc8xx/start.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
-
- . = env_offset;
- common/environment.o(.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/sx1/Makefile b/board/sx1/Makefile
deleted file mode 100644
index 8fbdf2a5e3..0000000000
--- a/board/sx1/Makefile
+++ /dev/null
@@ -1,47 +0,0 @@
-#
-# (C) Copyright 2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := sx1.o
-SOBJS := lowlevel_init.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $^
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/sx1/config.mk b/board/sx1/config.mk
deleted file mode 100644
index 4902e82332..0000000000
--- a/board/sx1/config.mk
+++ /dev/null
@@ -1,19 +0,0 @@
-#
-# (C) Copyright 2004
-# Wolfgang Denk, DENX Software Engineering, <wd@denx.de>
-#
-# SX1 board with OMAP1510 (ARM925T) cpu
-# see http://www.ti.com/ for more information on Texas Insturments
-#
-# SX1 has 1 bank of 256 MB SDRAM
-# Physical Address:
-# 1000'0000 to 2000'0000
-#
-#
-# Linux-Kernel is expected to be at 1000'8000, entry 1000'8000 (mem base + reserved)
-#
-# we load ourself to 1108'0000
-#
-#
-
-TEXT_BASE = 0x11080000
diff --git a/board/sx1/lowlevel_init.S b/board/sx1/lowlevel_init.S
deleted file mode 100644
index bdf812e05a..0000000000
--- a/board/sx1/lowlevel_init.S
+++ /dev/null
@@ -1,397 +0,0 @@
-/*
- * Board specific setup info
- *
- * (C) Copyright 2003
- * Texas Instruments, <www.ti.com>
- *
- * -- Some bits of code used from rrload's head_OMAP1510.s --
- * Copyright (C) 2002 RidgeRun, Inc.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <config.h>
-#include <version.h>
-
-#if defined(CONFIG_OMAP1510)
-#include <./configs/omap1510.h>
-#endif
-
-#define OMAP1510_CLKS ((1<<EN_XORPCK)|(1<<EN_PERCK)|(1<<EN_TIMCK)|(1<<EN_GPIOCK))
-
-
-_TEXT_BASE:
- .word TEXT_BASE /* sdram load addr from config.mk */
-
-.globl lowlevel_init
-lowlevel_init:
-
- /*
- * Configure 1510 pins functions to match our board.
- */
- ldr r0, REG_PULL_DWN_CTRL_0
- ldr r1, VAL_PULL_DWN_CTRL_0
- str r1, [r0]
- ldr r0, REG_PULL_DWN_CTRL_1
- ldr r1, VAL_PULL_DWN_CTRL_1
- str r1, [r0]
- ldr r0, REG_PULL_DWN_CTRL_2
- ldr r1, VAL_PULL_DWN_CTRL_2
- str r1, [r0]
- ldr r0, REG_PULL_DWN_CTRL_3
- ldr r1, VAL_PULL_DWN_CTRL_3
- str r1, [r0]
- ldr r0, REG_FUNC_MUX_CTRL_4
- ldr r1, VAL_FUNC_MUX_CTRL_4
- str r1, [r0]
- ldr r0, REG_FUNC_MUX_CTRL_5
- ldr r1, VAL_FUNC_MUX_CTRL_5
- str r1, [r0]
- ldr r0, REG_FUNC_MUX_CTRL_6
- ldr r1, VAL_FUNC_MUX_CTRL_6
- str r1, [r0]
- ldr r0, REG_FUNC_MUX_CTRL_7
- ldr r1, VAL_FUNC_MUX_CTRL_7
- str r1, [r0]
- ldr r0, REG_FUNC_MUX_CTRL_8
- ldr r1, VAL_FUNC_MUX_CTRL_8
- str r1, [r0]
- ldr r0, REG_FUNC_MUX_CTRL_9
- ldr r1, VAL_FUNC_MUX_CTRL_9
- str r1, [r0]
- ldr r0, REG_FUNC_MUX_CTRL_A
- ldr r1, VAL_FUNC_MUX_CTRL_A
- str r1, [r0]
- ldr r0, REG_FUNC_MUX_CTRL_B
- ldr r1, VAL_FUNC_MUX_CTRL_B
- str r1, [r0]
- ldr r0, REG_FUNC_MUX_CTRL_C
- ldr r1, VAL_FUNC_MUX_CTRL_C
- str r1, [r0]
- ldr r0, REG_FUNC_MUX_CTRL_D
- ldr r1, VAL_FUNC_MUX_CTRL_D
- str r1, [r0]
- ldr r0, REG_VOLTAGE_CTRL_0
- ldr r1, VAL_VOLTAGE_CTRL_0
- str r1, [r0]
- ldr r0, REG_TEST_DBG_CTRL_0
- ldr r1, VAL_TEST_DBG_CTRL_0
- str r1, [r0]
- ldr r0, REG_MOD_CONF_CTRL_0
- ldr r1, VAL_MOD_CONF_CTRL_0
- str r1, [r0]
-
- /* Move to 1510 mode */
- ldr r0, REG_COMP_MODE_CTRL_0
- ldr r1, VAL_COMP_MODE_CTRL_0
- str r1, [r0]
-
- /* Set up Traffic Ctlr*/
- ldr r0, REG_TC_IMIF_PRIO
- mov r1, #0x0
- str r1, [r0]
- ldr r0, REG_TC_EMIFS_PRIO
- str r1, [r0]
- ldr r0, REG_TC_EMIFF_PRIO
- str r1, [r0]
-
- ldr r0, REG_TC_EMIFS_CONFIG
- ldr r1, [r0]
- bic r1, r1, #0x08 /* clear the global power-down enable PDE bit */
- bic r1, r1, #0x01 /* write protect flash by clearing the WP bit */
- str r1, [r0] /* EMIFS GlB Configuration. (value 0x12 most likely) */
-
- ldr r0, _GPIO_PIN_CONTROL_REG
- mov r1,#0
- orr r1, r1, #0x0001 /* M_PCM_SYNC */
- orr r1, r1, #0x4000 /* IPC_ACTIVE */
- strh r1,[r0]
-
- ldr r0, _GPIO_DIR_CONTROL_REG
- mov r1,#0
- bic r1, r1, #0x0001 /* M_PCM_SYNC */
- bic r1, r1, #0x4000 /* IPC_ACTIVE */
- strh r1,[r0]
-
- ldr r0, _GPIO_DATA_OUTPUT_REG
- mov r1,#0
- bic r1, r1, #0x0001 /* M_PCM_SYNC */
- orr r1, r1, #0x4000 /* IPC_ACTIVE */
- strh r1,[r0]
-
- /* Setup some clock domains */
- ldr r1, =OMAP1510_CLKS
- ldr r0, REG_ARM_IDLECT2
- strh r1, [r0] /* CLKM, Clock domain control. */
-
- mov r1, #0x01 /* PER_EN bit */
- ldr r0, REG_ARM_RSTCT2
- strh r1, [r0] /* CLKM; Peripheral reset. */
-
- /* Set CLKM to Sync-Scalable */
- /* I supposidly need to enable the dsp clock before switching */
- mov r1, #0x1000
- ldr r0, REG_ARM_SYSST
- strh r1, [r0]
- mov r0, #0x400
-1:
- subs r0, r0, #0x1 /* wait for any bubbles to finish */
- bne 1b
-
- ldr r1, VAL_ARM_CKCTL /* use 12Mhz ref, PER must be <= 50Mhz so /2 */
- ldr r0, REG_ARM_CKCTL
- strh r1, [r0]
-
- /* setup DPLL 1 */
- ldr r1, VAL_DPLL1_CTL
- ldr r0, REG_DPLL1_CTL
- strh r1, [r0]
- ands r1, r1, #0x10 /* Check if PLL is enabled. */
- beq lock_end /* Do not look for lock if BYPASS selected */
-2:
- ldrh r1, [r0]
- ands r1, r1, #0x01 /* Check the LOCK bit. */
- beq 2b /* ...loop until bit goes hi. */
-lock_end:
-
- /* Set memory timings corresponding to the new clock speed */
-
- /* Check execution location to determine current execution location
- * and branch to appropriate initialization code.
- */
- mov r0, #0x10000000 /* Load physical SDRAM base. */
- mov r1, pc /* Get current execution location. */
- cmp r1, r0 /* Compare. */
- bge skip_sdram /* Skip over EMIF-fast initialization if running from SDRAM. */
-
- /*
- * Delay for SDRAM initialization.
- */
- mov r3, #0x1800 /* value should be checked */
-3:
- subs r3, r3, #0x1 /* Decrement count */
- bne 3b
-
- /*
- * Set SDRAM control values. Disable refresh before MRS command.
- */
- ldr r0, VAL_TC_EMIFF_SDRAM_CONFIG /* get good value */
- bic r3, r0, #0xC /* (BIT3|BIT2) ulConfig with auto-refresh disabled. */
- orr r3, r3, #0x8000000 /* (BIT27) Disable CLK when Power down or Self-Refresh */
- orr r3, r3, #0x4000000 /* BIT26 Power Down Enable */
- ldr r2, REG_TC_EMIFF_SDRAM_CONFIG /* Point to configuration register. */
- str r3, [r2] /* Store the passed value with AR disabled. */
-
- ldr r1, VAL_TC_EMIFF_MRS /* get MRS value */
- ldr r2, REG_TC_EMIFF_MRS /* Point to MRS register. */
- str r1, [r2] /* Store the passed value.*/
-
- ldr r2, REG_TC_EMIFF_SDRAM_CONFIG /* Point to configuration register. */
- str r0, [r2] /* Store the passed value. */
-
- /*
- * Delay for SDRAM initialization.
- */
- mov r3, #0x1800
-4:
- subs r3, r3, #1 /* Decrement count. */
- bne 4b
-
-skip_sdram:
-
- /* slow interface */
- ldr r1, VAL_TC_EMIFS_CS0_CONFIG
- ldr r0, REG_TC_EMIFS_CS0_CONFIG
- str r1, [r0] /* Chip Select 0 */
- ldr r1, VAL_TC_EMIFS_CS1_CONFIG
- ldr r0, REG_TC_EMIFS_CS1_CONFIG
- str r1, [r0] /* Chip Select 1 */
- ldr r1, VAL_TC_EMIFS_CS2_CONFIG
- ldr r0, REG_TC_EMIFS_CS2_CONFIG
- str r1, [r0] /* Chip Select 2 */
- ldr r1, VAL_TC_EMIFS_CS3_CONFIG
- ldr r0, REG_TC_EMIFS_CS3_CONFIG
- str r1, [r0] /* Chip Select 3 */
-
- /* back to arch calling code */
- mov pc, lr
-
-/* the literal pools origin */
- .ltorg
-
-/* OMAP configuration registers */
-REG_FUNC_MUX_CTRL_0: /* 32 bits */
- .word 0xfffe1000
-REG_FUNC_MUX_CTRL_1: /* 32 bits */
- .word 0xfffe1004
-REG_FUNC_MUX_CTRL_2: /* 32 bits */
- .word 0xfffe1008
-REG_COMP_MODE_CTRL_0: /* 32 bits */
- .word 0xfffe100c
-REG_FUNC_MUX_CTRL_3: /* 32 bits */
- .word 0xfffe1010
-REG_FUNC_MUX_CTRL_4: /* 32 bits */
- .word 0xfffe1014
-REG_FUNC_MUX_CTRL_5: /* 32 bits */
- .word 0xfffe1018
-REG_FUNC_MUX_CTRL_6: /* 32 bits */
- .word 0xfffe101c
-REG_FUNC_MUX_CTRL_7: /* 32 bits */
- .word 0xfffe1020
-REG_FUNC_MUX_CTRL_8: /* 32 bits */
- .word 0xfffe1024
-REG_FUNC_MUX_CTRL_9: /* 32 bits */
- .word 0xfffe1028
-REG_FUNC_MUX_CTRL_A: /* 32 bits */
- .word 0xfffe102C
-REG_FUNC_MUX_CTRL_B: /* 32 bits */
- .word 0xfffe1030
-REG_FUNC_MUX_CTRL_C: /* 32 bits */
- .word 0xfffe1034
-REG_FUNC_MUX_CTRL_D: /* 32 bits */
- .word 0xfffe1038
-REG_PULL_DWN_CTRL_0: /* 32 bits */
- .word 0xfffe1040
-REG_PULL_DWN_CTRL_1: /* 32 bits */
- .word 0xfffe1044
-REG_PULL_DWN_CTRL_2: /* 32 bits */
- .word 0xfffe1048
-REG_PULL_DWN_CTRL_3: /* 32 bits */
- .word 0xfffe104c
-REG_VOLTAGE_CTRL_0: /* 32 bits */
- .word 0xfffe1060
-REG_TEST_DBG_CTRL_0: /* 32 bits */
- .word 0xfffe1070
-REG_MOD_CONF_CTRL_0: /* 32 bits */
- .word 0xfffe1080
-REG_TC_IMIF_PRIO: /* 32 bits */
- .word 0xfffecc00
-REG_TC_EMIFS_PRIO: /* 32 bits */
- .word 0xfffecc04
-REG_TC_EMIFF_PRIO: /* 32 bits */
- .word 0xfffecc08
-REG_TC_EMIFS_CONFIG: /* 32 bits */
- .word 0xfffecc0c
-REG_TC_EMIFS_CS0_CONFIG: /* 32 bits */
- .word 0xfffecc10
-REG_TC_EMIFS_CS1_CONFIG: /* 32 bits */
- .word 0xfffecc14
-REG_TC_EMIFS_CS2_CONFIG: /* 32 bits */
- .word 0xfffecc18
-REG_TC_EMIFS_CS3_CONFIG: /* 32 bits */
- .word 0xfffecc1c
-REG_TC_EMIFF_SDRAM_CONFIG: /* 32 bits */
- .word 0xfffecc20
-REG_TC_EMIFF_MRS: /* 32 bits */
- .word 0xfffecc24
-/* MPU clock/reset/power mode control registers */
-REG_ARM_CKCTL: /* 16 bits */
- .word 0xfffece00
-REG_ARM_IDLECT2: /* 16 bits */
- .word 0xfffece08
-REG_ARM_RSTCT2: /* 16 bits */
- .word 0xfffece14
-REG_ARM_SYSST: /* 16 bits */
- .word 0xfffece18
-/* DPLL control registers */
-REG_DPLL1_CTL: /* 16 bits */
- .word 0xfffecf00
-/* identification code register */
-REG_IDCODE: /* 32 bits */
- .word 0xfffed404
-
-/* SX1 specific */
-_GPIO_PIN_CONTROL_REG:
- .word GPIO_PIN_CONTROL_REG
-_GPIO_DIR_CONTROL_REG:
- .word GPIO_DIR_CONTROL_REG
-_GPIO_DATA_OUTPUT_REG:
- .word GPIO_DATA_OUTPUT_REG
-
-VAL_COMP_MODE_CTRL_0:
- .word 0x0000eaef
-VAL_FUNC_MUX_CTRL_4:
- .word 0x00000000
-VAL_FUNC_MUX_CTRL_5:
- .word 0x00000000
-VAL_FUNC_MUX_CTRL_6:
- .word 0x00000001
-VAL_FUNC_MUX_CTRL_7:
- .word 0x00001000
-VAL_FUNC_MUX_CTRL_8:
- .word 0x00001240 /*[Knoller] Value of Symbian Image Wing B2*/
-VAL_FUNC_MUX_CTRL_9:
- .word 0x00201008
-VAL_FUNC_MUX_CTRL_A:
- .word 0x00001000
-VAL_FUNC_MUX_CTRL_B:
- .word 0x00000000
-VAL_FUNC_MUX_CTRL_C:
- .word 0x09008001 /*[Knoller] Value of Symbian Image Wing B2*/
-VAL_FUNC_MUX_CTRL_D:
- .word 0x00000000
-VAL_PULL_DWN_CTRL_0:
- .word 0xfffeffff
-VAL_PULL_DWN_CTRL_1:
- .word 0xd1ffffec
-VAL_PULL_DWN_CTRL_2:
- .word 0xffa80c5b
-VAL_PULL_DWN_CTRL_3:
- .word 0xffffc0fe
-VAL_VOLTAGE_CTRL_0:
- .word 0x00000007
-VAL_TEST_DBG_CTRL_0:
- /* The OMAP5910 TRM says this register must be 0, but HelenConfRegs
- * says to write a 7. Don't know what the right thing is to do, so
- * I'm leaving it at 7 since that's what was already here.
- */
- .word 0x00000007
-VAL_MOD_CONF_CTRL_0:
- .word 0x0da20000 /*[Knoller] Value of Symbian Image Wing B2*/
-
-VAL_ARM_CKCTL:
- .word 0x010D
-
-VAL_DPLL1_CTL:
- .word 0x3A33 /*[Hertle] Value of Symbian Image*/
-
-VAL_TC_EMIFS_CS1_CONFIG_PRELIM:
- .word 0x00001149
-
-VAL_TC_EMIFS_CS2_CONFIG_PRELIM:
- .word 0x00004158
-
-VAL_TC_EMIFS_CS0_CONFIG:
- .word 0x00213090 /*[Knoller] Value of Symbian Image Wing B2*/
-
-VAL_TC_EMIFS_CS1_CONFIG:
- .word 0x00215070 /*[Knoller] Value of Symbian Image Wing B2*/
-
-VAL_TC_EMIFS_CS2_CONFIG:
- .word 0x00001139 /*[Knoller] Value of Symbian Image Wing B2*/
-
-VAL_TC_EMIFS_CS3_CONFIG:
- .word 0x00001139 /*[Knoller] Value of Symbian Image Wing B2*/
-
-VAL_TC_EMIFF_SDRAM_CONFIG:
- .word 0x0105f0b4 /*[Knoller] Value of Symbian Image Wing B2*/
-
-
-VAL_TC_EMIFF_MRS:
- .word 0x00000027 /*[Knoller] Value of Symbian Image Wing B2*/
diff --git a/board/sx1/sx1.c b/board/sx1/sx1.c
deleted file mode 100644
index e45f6ae4f3..0000000000
--- a/board/sx1/sx1.c
+++ /dev/null
@@ -1,125 +0,0 @@
-/*
- * (C) Copyright 2004
- * Wolfgang Denk, DENX Software Engineering, <wd@denx.de>
- *
- * (C) Copyright 2003
- * Texas Instruments, <www.ti.com>
- * Kshitij Gupta <Kshitij@ti.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-
-static void flash__init (void);
-static void ether__init (void);
-
-static inline void delay (unsigned long loops)
-{
- __asm__ volatile ("1:\n"
- "subs %0, %1, #1\n"
- "bne 1b":"=r" (loops):"0" (loops));
-}
-
-/*
- * Miscellaneous platform dependent initialisations
- */
-
-int board_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- /* arch number of SX1 Board */
- gd->bd->bi_arch_number = MACH_TYPE_SX1;
-
- /* adress of boot parameters */
- gd->bd->bi_boot_params = 0x10000100;
-
-/* kk - this speeds up your boot a quite a bit. However to make it
- * work, you need make sure your kernel startup flush bug is fixed.
- * ... rkw ...
- */
- icache_enable ();
-
- flash__init ();
- ether__init ();
- return 0;
-}
-
-
-int misc_init_r (void)
-{
- /* volatile ushort *gdir = (ushort *) (GPIO_DIR_CONTROL_REG); */
- /* volatile ushort *mdir = (ushort *) (MPUIO_DIR_CONTROL_REG); */
-
- /* setup gpio direction to match board (no floats!) */
- /**gdir = 0xCFF9; */
- /**mdir = 0x103F; */
-
- return (0);
-}
-
-/******************************
- Routine:
- Description:
-******************************/
-static void flash__init (void)
-{
-#define CS0_CHIP_SELECT_REG 0xfffecc10
-#define CS3_CHIP_SELECT_REG 0xfffecc1c
-#define EMIFS_GlB_Config_REG 0xfffecc0c
-
- unsigned int regval;
-
- regval = *((volatile unsigned int *) EMIFS_GlB_Config_REG);
- regval = regval | 0x0001; /* Turn off write protection for flash devices. */
- if (regval & 0x0002) {
- regval = regval & 0xfffd; /* Swap CS0 and CS3 so that flash is visible at 0x0 and eeprom at 0x0c000000. */
- /* If, instead, you want to reference flash at 0x0c000000, then it seemed the following were necessary. */
- /* *((volatile unsigned int *)CS0_CHIP_SELECT_REG) = 0x202090; / * Overrides head.S setting of 0x212090 */
- /* *((volatile unsigned int *)CS3_CHIP_SELECT_REG) = 0x202090; / * Let's flash chips be fully functional. */
- }
- *((volatile unsigned int *) EMIFS_GlB_Config_REG) = regval;
-}
-
-
-/******************************
- Routine:
- Description:
-******************************/
-static void ether__init (void)
-{
-#define ETH_CONTROL_REG 0x0800000b
- /* take the Ethernet controller out of reset and wait
- * for the EEPROM load to complete.
- */
- *((volatile unsigned char *) ETH_CONTROL_REG) &= ~0x01;
- udelay (3);
-}
-
-
-int dram_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
-
- return 0;
-}
diff --git a/board/sx1/u-boot.lds b/board/sx1/u-boot.lds
deleted file mode 100644
index d28155f4cb..0000000000
--- a/board/sx1/u-boot.lds
+++ /dev/null
@@ -1,57 +0,0 @@
-/*
- * (C) Copyright 2004
- * Wolfgang Denk, DENX Software Engineering, <wg@denx.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-/*OUTPUT_FORMAT("elf32-arm", "elf32-arm", "elf32-arm")*/
-OUTPUT_ARCH(arm)
-ENTRY(_start)
-SECTIONS
-{
- . = 0x00000000;
-
- . = ALIGN(4);
- .text :
- {
- cpu/arm925t/start.o (.text)
- *(.text)
- }
-
- . = ALIGN(4);
- .rodata : { *(.rodata) }
-
- . = ALIGN(4);
- .data : { *(.data) }
-
- . = ALIGN(4);
- .got : { *(.got) }
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = ALIGN(4);
- __bss_start = .;
- .bss : { *(.bss) }
- _end = .;
-}
diff --git a/board/tb0229/Makefile b/board/tb0229/Makefile
deleted file mode 100644
index 4375073af9..0000000000
--- a/board/tb0229/Makefile
+++ /dev/null
@@ -1,43 +0,0 @@
-#
-# (C) Masami Komiya <mkomiya@sonare.it> 2004
-#
-# (C) Copyright 2003-2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o vr4131-pci.o
-SOBJS = lowlevel_init.o
-
-$(LIB): .depend $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS) $(SOBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/tb0229/config.mk b/board/tb0229/config.mk
deleted file mode 100644
index 9a508502c2..0000000000
--- a/board/tb0229/config.mk
+++ /dev/null
@@ -1,30 +0,0 @@
-#
-# (C) Masami Komiya <mkomiya@sonare.it> 2004
-#
-# (C) Copyright 2003
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-# ROM version
-TEXT_BASE = 0xBFC00000
-
-# RAM version
-#TEXT_BASE = 0x80400000
diff --git a/board/tb0229/flash.c b/board/tb0229/flash.c
deleted file mode 100644
index e9f6418c4e..0000000000
--- a/board/tb0229/flash.c
+++ /dev/null
@@ -1,1198 +0,0 @@
-/*
- * (C) Masami Komiya <mkomiya@sonare.it> 2004
- *
- * (C) Copyright 2001-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <ppc4xx.h>
-#include <asm/processor.h>
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-
-#ifdef CFG_FLASH_16BIT
-#define FLASH_WORD_SIZE unsigned short
-#define FLASH_ID_MASK 0xFFFF
-#else
-#define FLASH_WORD_SIZE unsigned long
-#define FLASH_ID_MASK 0xFFFFFFFF
-#endif
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-/* stolen from esteem192e/flash.c */
-ulong flash_get_size (volatile FLASH_WORD_SIZE * addr, flash_info_t * info);
-
-#ifndef CFG_FLASH_16BIT
-static int write_word (flash_info_t * info, ulong dest, ulong data);
-#else
-static int write_short (flash_info_t * info, ulong dest, ushort data);
-#endif
-static void flash_get_offsets (ulong base, flash_info_t * info);
-
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- unsigned long size_b0, size_b1;
- int i;
- uint pbcr;
- unsigned long base_b0, base_b1;
-
- /* Init: no FLASHes known */
- for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* Static FLASH Bank configuration here - FIXME XXX */
-
- size_b0 =
- flash_get_size ((volatile FLASH_WORD_SIZE *) CFG_FLASH_BASE,
- &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n", size_b0, size_b0 << 20);
- }
-
- /* Only one bank */
- if (CFG_MAX_FLASH_BANKS == 1) {
- /* Setup offsets */
- flash_get_offsets (CFG_FLASH_BASE, &flash_info[0]);
-
- /* Monitor protection ON by default */
-#if 0 /* sand: */
- (void) flash_protect (FLAG_PROTECT_SET,
- FLASH_BASE0_PRELIM - monitor_flash_len +
- size_b0,
- FLASH_BASE0_PRELIM - 1 + size_b0,
- &flash_info[0]);
-#else
- (void) flash_protect (FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE + monitor_flash_len -
- 1, &flash_info[0]);
-#endif
- size_b1 = 0;
- flash_info[0].size = size_b0;
- }
-#ifdef CFG_FLASH_BASE_2
- /* 2 banks */
- else {
- size_b1 =
- flash_get_size ((volatile FLASH_WORD_SIZE *)
- CFG_FLASH_BASE_2, &flash_info[1]);
-
- /* Re-do sizing to get full correct info */
-
- if (size_b1) {
- mtdcr (ebccfga, pb0cr);
- pbcr = mfdcr (ebccfgd);
- mtdcr (ebccfga, pb0cr);
- base_b1 = -size_b1;
- pbcr = (pbcr & 0x0001ffff) | base_b1 |
- (((size_b1 / 1024 / 1024) - 1) << 17);
- mtdcr (ebccfgd, pbcr);
- /* printf("pb1cr = %x\n", pbcr); */
- }
-
- if (size_b0) {
- mtdcr (ebccfga, pb1cr);
- pbcr = mfdcr (ebccfgd);
- mtdcr (ebccfga, pb1cr);
- base_b0 = base_b1 - size_b0;
- pbcr = (pbcr & 0x0001ffff) | base_b0 |
- (((size_b0 / 1024 / 1024) - 1) << 17);
- mtdcr (ebccfgd, pbcr);
- /* printf("pb0cr = %x\n", pbcr); */
- }
-
- size_b0 =
- flash_get_size ((volatile FLASH_WORD_SIZE *) base_b0,
- &flash_info[0]);
-
- flash_get_offsets (base_b0, &flash_info[0]);
-
- /* monitor protection ON by default */
-#if 0 /* sand: */
- (void) flash_protect (FLAG_PROTECT_SET,
- FLASH_BASE0_PRELIM - monitor_flash_len +
- size_b0,
- FLASH_BASE0_PRELIM - 1 + size_b0,
- &flash_info[0]);
-#else
- (void) flash_protect (FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE + monitor_flash_len -
- 1, &flash_info[0]);
-#endif
-
- if (size_b1) {
- /* Re-do sizing to get full correct info */
- size_b1 =
- flash_get_size ((volatile FLASH_WORD_SIZE *)
- base_b1, &flash_info[1]);
-
- flash_get_offsets (base_b1, &flash_info[1]);
-
- /* monitor protection ON by default */
- (void) flash_protect (FLAG_PROTECT_SET,
- base_b1 + size_b1 -
- monitor_flash_len,
- base_b1 + size_b1 - 1,
- &flash_info[1]);
- /* monitor protection OFF by default (one is enough) */
- (void) flash_protect (FLAG_PROTECT_CLEAR,
- base_b0 + size_b0 -
- monitor_flash_len,
- base_b0 + size_b0 - 1,
- &flash_info[0]);
- } else {
- flash_info[1].flash_id = FLASH_UNKNOWN;
- flash_info[1].sector_count = -1;
- }
-
- flash_info[0].size = size_b0;
- flash_info[1].size = size_b1;
- } /* else 2 banks */
-#endif
- return (size_b0 + size_b1);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-static void flash_get_offsets (ulong base, flash_info_t * info)
-{
- int i;
-
- /* set up sector start adress table */
- if ((info->flash_id & FLASH_TYPEMASK) == FLASH_28F320J3A ||
- (info->flash_id & FLASH_TYPEMASK) == FLASH_28F640J3A ||
- (info->flash_id & FLASH_TYPEMASK) == FLASH_28F128J3A) {
- for (i = 0; i < info->sector_count; i++) {
- info->start[i] =
- base + (i * info->size / info->sector_count);
- }
- } else if (info->flash_id & FLASH_BTYPE) {
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
-
-#ifndef CFG_FLASH_16BIT
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00004000;
- info->start[2] = base + 0x00008000;
- info->start[3] = base + 0x0000C000;
- info->start[4] = base + 0x00010000;
- info->start[5] = base + 0x00014000;
- info->start[6] = base + 0x00018000;
- info->start[7] = base + 0x0001C000;
- for (i = 8; i < info->sector_count; i++) {
- info->start[i] =
- base + (i * 0x00020000) - 0x000E0000;
- }
- } else {
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00008000;
- info->start[2] = base + 0x0000C000;
- info->start[3] = base + 0x00010000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] =
- base + (i * 0x00020000) - 0x00060000;
- }
- }
-#else
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00002000;
- info->start[2] = base + 0x00004000;
- info->start[3] = base + 0x00006000;
- info->start[4] = base + 0x00008000;
- info->start[5] = base + 0x0000A000;
- info->start[6] = base + 0x0000C000;
- info->start[7] = base + 0x0000E000;
- for (i = 8; i < info->sector_count; i++) {
- info->start[i] =
- base + (i * 0x00010000) - 0x00070000;
- }
- } else {
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00004000;
- info->start[2] = base + 0x00006000;
- info->start[3] = base + 0x00008000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] =
- base + (i * 0x00010000) - 0x00030000;
- }
- }
-#endif
- } else {
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
-
-#ifndef CFG_FLASH_16BIT
- info->start[i--] = base + info->size - 0x00004000;
- info->start[i--] = base + info->size - 0x00008000;
- info->start[i--] = base + info->size - 0x0000C000;
- info->start[i--] = base + info->size - 0x00010000;
- info->start[i--] = base + info->size - 0x00014000;
- info->start[i--] = base + info->size - 0x00018000;
- info->start[i--] = base + info->size - 0x0001C000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00020000;
- }
-
- } else {
-
- info->start[i--] = base + info->size - 0x00008000;
- info->start[i--] = base + info->size - 0x0000C000;
- info->start[i--] = base + info->size - 0x00010000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00020000;
- }
- }
-#else
- info->start[i--] = base + info->size - 0x00002000;
- info->start[i--] = base + info->size - 0x00004000;
- info->start[i--] = base + info->size - 0x00006000;
- info->start[i--] = base + info->size - 0x00008000;
- info->start[i--] = base + info->size - 0x0000A000;
- info->start[i--] = base + info->size - 0x0000C000;
- info->start[i--] = base + info->size - 0x0000E000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00010000;
- }
-
- } else {
-
- info->start[i--] = base + info->size - 0x00004000;
- info->start[i--] = base + info->size - 0x00006000;
- info->start[i--] = base + info->size - 0x00008000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00010000;
- }
- }
-#endif
- }
-
-
-}
-
-/*-----------------------------------------------------------------------
- */
-
-void flash_print_info (flash_info_t * info)
-{
- int i;
- uchar *boottype;
- uchar botboot[] = ", bottom boot sect)\n";
- uchar topboot[] = ", top boot sector)\n";
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD:
- printf ("AMD ");
- break;
- case FLASH_MAN_FUJ:
- printf ("FUJITSU ");
- break;
- case FLASH_MAN_SST:
- printf ("SST ");
- break;
- case FLASH_MAN_STM:
- printf ("STM ");
- break;
- case FLASH_MAN_INTEL:
- printf ("INTEL ");
- break;
- default:
- printf ("Unknown Vendor ");
- break;
- }
-
- if (info->flash_id & 0x0001) {
- boottype = botboot;
- } else {
- boottype = topboot;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM400B:
- printf ("AM29LV400B (4 Mbit%s", boottype);
- break;
- case FLASH_AM400T:
- printf ("AM29LV400T (4 Mbit%s", boottype);
- break;
- case FLASH_AM800B:
- printf ("AM29LV800B (8 Mbit%s", boottype);
- break;
- case FLASH_AM800T:
- printf ("AM29LV800T (8 Mbit%s", boottype);
- break;
- case FLASH_AM160B:
- printf ("AM29LV160B (16 Mbit%s", boottype);
- break;
- case FLASH_AM160T:
- printf ("AM29LV160T (16 Mbit%s", boottype);
- break;
- case FLASH_AM320B:
- printf ("AM29LV320B (32 Mbit%s", boottype);
- break;
- case FLASH_AM320T:
- printf ("AM29LV320T (32 Mbit%s", boottype);
- break;
- case FLASH_INTEL800B:
- printf ("INTEL28F800B (8 Mbit%s", boottype);
- break;
- case FLASH_INTEL800T:
- printf ("INTEL28F800T (8 Mbit%s", boottype);
- break;
- case FLASH_INTEL160B:
- printf ("INTEL28F160B (16 Mbit%s", boottype);
- break;
- case FLASH_INTEL160T:
- printf ("INTEL28F160T (16 Mbit%s", boottype);
- break;
- case FLASH_INTEL320B:
- printf ("INTEL28F320B (32 Mbit%s", boottype);
- break;
- case FLASH_INTEL320T:
- printf ("INTEL28F320T (32 Mbit%s", boottype);
- break;
-
-#if 0 /* enable when devices are available */
-
- case FLASH_INTEL640B:
- printf ("INTEL28F640B (64 Mbit%s", boottype);
- break;
- case FLASH_INTEL640T:
- printf ("INTEL28F640T (64 Mbit%s", boottype);
- break;
-#endif
- case FLASH_28F320J3A:
- printf ("INTEL28F320J3A (32 Mbit%s", boottype);
- break;
- case FLASH_28F640J3A:
- printf ("INTEL28F640J3A (64 Mbit%s", boottype);
- break;
- case FLASH_28F128J3A:
- printf ("INTEL28F128J3A (128 Mbit%s", boottype);
- break;
-
- default:
- printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i], info->protect[i] ? " (RO)" : " ");
- }
- printf ("\n");
- return;
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-ulong flash_get_size (volatile FLASH_WORD_SIZE * addr, flash_info_t * info)
-{
- short i;
- ulong base = (ulong) addr;
- FLASH_WORD_SIZE value;
-
- /* Write auto select command: read Manufacturer ID */
-
-
-#ifndef CFG_FLASH_16BIT
-
- /*
- * Note: if it is an AMD flash and the word at addr[0000]
- * is 0x00890089 this routine will think it is an Intel
- * flash device and may(most likely) cause trouble.
- */
-
- addr[0x0000] = 0x00900090;
- if (addr[0x0000] != 0x00890089) {
- addr[0x0555] = 0x00AA00AA;
- addr[0x02AA] = 0x00550055;
- addr[0x0555] = 0x00900090;
-#else
-
- /*
- * Note: if it is an AMD flash and the word at addr[0000]
- * is 0x0089 this routine will think it is an Intel
- * flash device and may(most likely) cause trouble.
- */
-
- addr[0x0000] = 0x0090;
-
- if (addr[0x0000] != 0x0089) {
- addr[0x0555] = 0x00AA;
- addr[0x02AA] = 0x0055;
- addr[0x0555] = 0x0090;
-#endif
- }
- value = addr[0];
-
- switch (value) {
- case (AMD_MANUFACT & FLASH_ID_MASK):
- info->flash_id = FLASH_MAN_AMD;
- break;
- case (FUJ_MANUFACT & FLASH_ID_MASK):
- info->flash_id = FLASH_MAN_FUJ;
- break;
- case (STM_MANUFACT & FLASH_ID_MASK):
- info->flash_id = FLASH_MAN_STM;
- break;
- case (SST_MANUFACT & FLASH_ID_MASK):
- info->flash_id = FLASH_MAN_SST;
- break;
- case (INTEL_MANUFACT & FLASH_ID_MASK):
- info->flash_id = FLASH_MAN_INTEL;
- break;
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- return (0); /* no or unknown flash */
-
- }
-
- value = addr[1]; /* device ID */
-
- switch (value) {
-
- case (AMD_ID_LV400T & FLASH_ID_MASK):
- info->flash_id += FLASH_AM400T;
- info->sector_count = 11;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case (AMD_ID_LV400B & FLASH_ID_MASK):
- info->flash_id += FLASH_AM400B;
- info->sector_count = 11;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case (AMD_ID_LV800T & FLASH_ID_MASK):
- info->flash_id += FLASH_AM800T;
- info->sector_count = 19;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case (AMD_ID_LV800B & FLASH_ID_MASK):
- info->flash_id += FLASH_AM800B;
- info->sector_count = 19;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case (AMD_ID_LV160T & FLASH_ID_MASK):
- info->flash_id += FLASH_AM160T;
- info->sector_count = 35;
- info->size = 0x00400000;
- break; /* => 4 MB */
-
- case (AMD_ID_LV160B & FLASH_ID_MASK):
- info->flash_id += FLASH_AM160B;
- info->sector_count = 35;
- info->size = 0x00400000;
- break; /* => 4 MB */
-#if 0 /* enable when device IDs are available */
- case (AMD_ID_LV320T & FLASH_ID_MASK):
- info->flash_id += FLASH_AM320T;
- info->sector_count = 67;
- info->size = 0x00800000;
- break; /* => 8 MB */
-
- case (AMD_ID_LV320B & FLASH_ID_MASK):
- info->flash_id += FLASH_AM320B;
- info->sector_count = 67;
- info->size = 0x00800000;
- break; /* => 8 MB */
-#endif
-
- case (INTEL_ID_28F800B3T & FLASH_ID_MASK):
- info->flash_id += FLASH_INTEL800T;
- info->sector_count = 23;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case (INTEL_ID_28F800B3B & FLASH_ID_MASK):
- info->flash_id += FLASH_INTEL800B;
- info->sector_count = 23;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case (INTEL_ID_28F160B3T & FLASH_ID_MASK):
- info->flash_id += FLASH_INTEL160T;
- info->sector_count = 39;
- info->size = 0x00400000;
- break; /* => 4 MB */
-
- case (INTEL_ID_28F160B3B & FLASH_ID_MASK):
- info->flash_id += FLASH_INTEL160B;
- info->sector_count = 39;
- info->size = 0x00400000;
- break; /* => 4 MB */
-
- case (INTEL_ID_28F320B3T & FLASH_ID_MASK):
- info->flash_id += FLASH_INTEL320T;
- info->sector_count = 71;
- info->size = 0x00800000;
- break; /* => 8 MB */
-
- case (INTEL_ID_28F320B3B & FLASH_ID_MASK):
- info->flash_id += FLASH_AM320B;
- info->sector_count = 71;
- info->size = 0x00800000;
- break; /* => 8 MB */
-
-#if 0 /* enable when devices are available */
- case (INTEL_ID_28F320B3T & FLASH_ID_MASK):
- info->flash_id += FLASH_INTEL320T;
- info->sector_count = 135;
- info->size = 0x01000000;
- break; /* => 16 MB */
-
- case (INTEL_ID_28F320B3B & FLASH_ID_MASK):
- info->flash_id += FLASH_AM320B;
- info->sector_count = 135;
- info->size = 0x01000000;
- break; /* => 16 MB */
-#endif
- case (INTEL_ID_28F320J3A & FLASH_ID_MASK):
- info->flash_id += FLASH_28F320J3A;
- info->sector_count = 32;
- info->size = 0x00400000;
- break; /* => 32 MBit */
- case (INTEL_ID_28F640J3A & FLASH_ID_MASK):
- info->flash_id += FLASH_28F640J3A;
- info->sector_count = 64;
- info->size = 0x00800000;
- break; /* => 64 MBit */
- case (INTEL_ID_28F128J3A & FLASH_ID_MASK):
- info->flash_id += FLASH_28F128J3A;
- info->sector_count = 128;
- info->size = 0x01000000;
- break; /* => 128 MBit */
-
- default:
- /* FIXME */
- info->flash_id = FLASH_UNKNOWN;
- return (0); /* => no or unknown flash */
- }
-
- flash_get_offsets (base, info);
-
- /* check for protected sectors */
- for (i = 0; i < info->sector_count; i++) {
- /* read sector protection at sector address, (A7 .. A0) = 0x02 */
- /* D0 = 1 if protected */
- addr = (volatile FLASH_WORD_SIZE *) (info->start[i]);
- info->protect[i] = addr[2] & 1;
- }
-
- /*
- * Prevent writes to uninitialized FLASH.
- */
- if (info->flash_id != FLASH_UNKNOWN) {
- addr = (volatile FLASH_WORD_SIZE *) info->start[0];
- if ((info->flash_id & 0xFF00) == FLASH_MAN_INTEL) {
- *addr = (0x00F000F0 & FLASH_ID_MASK); /* reset bank */
- } else {
- *addr = (0x00FF00FF & FLASH_ID_MASK); /* reset bank */
- }
- }
-
- return (info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t * info, int s_first, int s_last)
-{
-
- volatile FLASH_WORD_SIZE *addr =
- (volatile FLASH_WORD_SIZE *) (info->start[0]);
- int flag, prot, sect, l_sect, barf;
- ulong start, now, last;
- int rcode = 0;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- if ((info->flash_id == FLASH_UNKNOWN) ||
- ((info->flash_id > FLASH_AMD_COMP) &&
- ((info->flash_id & FLASH_VENDMASK) != FLASH_MAN_INTEL))) {
- printf ("Can't erase unknown flash type - aborted\n");
- return 1;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n", prot);
- } else {
- printf ("\n");
- }
-
- l_sect = -1;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
- if (info->flash_id < FLASH_AMD_COMP) {
-#ifndef CFG_FLASH_16BIT
- addr[0x0555] = 0x00AA00AA;
- addr[0x02AA] = 0x00550055;
- addr[0x0555] = 0x00800080;
- addr[0x0555] = 0x00AA00AA;
- addr[0x02AA] = 0x00550055;
-#else
- addr[0x0555] = 0x00AA;
- addr[0x02AA] = 0x0055;
- addr[0x0555] = 0x0080;
- addr[0x0555] = 0x00AA;
- addr[0x02AA] = 0x0055;
-#endif
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr = (volatile FLASH_WORD_SIZE *) (info->
- start
- [sect]);
- addr[0] = (0x00300030 & FLASH_ID_MASK);
- l_sect = sect;
- }
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts ();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- /*
- * We wait for the last triggered sector
- */
- if (l_sect < 0)
- goto DONE;
-
- start = get_timer (0);
- last = start;
- addr = (volatile FLASH_WORD_SIZE *) (info->start[l_sect]);
- while ((addr[0] & (0x00800080 & FLASH_ID_MASK)) !=
- (0x00800080 & FLASH_ID_MASK)) {
- if ((now = get_timer (start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- return 1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000000) { /* every second */
- serial_putc ('.');
- last = now;
- }
- }
-
- DONE:
- /* reset to read mode */
- addr = (volatile FLASH_WORD_SIZE *) info->start[0];
- addr[0] = (0x00F000F0 & FLASH_ID_MASK); /* reset bank */
- } else {
-
-
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- barf = 0;
-#ifndef CFG_FLASH_16BIT
- addr = (vu_long *) (info->start[sect]);
- addr[0] = 0x00500050;
- addr[0] = 0x00200020;
- addr[0] = 0x00D000D0;
- while (!(addr[0] & 0x00800080)); /* wait for error or finish */
- if (addr[0] & 0x003A003A) { /* check for error */
- barf = addr[0] & 0x003A0000;
- if (barf) {
- barf >>= 16;
- } else {
- barf = addr[0] & 0x0000003A;
- }
- }
-#else
- addr = (vu_short *) (info->start[sect]);
- addr[0] = 0x0050; /* clear status register */
- addr[0] = 0x0020;
- addr[0] = 0x00D0;
- while (!(addr[0] & 0x0080)); /* wait for error or finish */
- if (addr[0] & 0x003A) /* check for error */
- barf = addr[0] & 0x003A;
-#endif
- if (barf) {
- printf ("\nFlash error in sector at %lx\n", (unsigned long) addr);
- if (barf & 0x0002)
- printf ("Block locked, not erased.\n");
- if ((barf & 0x0030) == 0x0030)
- printf ("Command Sequence error.\n");
- if ((barf & 0x0030) == 0x0020)
- printf ("Block Erase error.\n");
- if (barf & 0x0008)
- printf ("Vpp Low error.\n");
- rcode = 1;
- } else
- printf (".");
- l_sect = sect;
- }
- addr = (volatile FLASH_WORD_SIZE *) info->start[0];
-#ifndef CFG_FLASH_16BIT
- addr[0] = (0x00FF00FF & FLASH_ID_MASK); /* reset bank */
-#else
- addr[0] = (0x00FF & FLASH_ID_MASK); /* reset bank */
-#endif
- }
-
- }
- printf (" done\n");
- return rcode;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-/*flash_info_t *addr2info (ulong addr)
-{
- flash_info_t *info;
- int i;
-
- for (i=0, info=&flash_info[0]; i<CFG_MAX_FLASH_BANKS; ++i, ++info) {
- if ((addr >= info->start[0]) &&
- (addr < (info->start[0] + info->size)) ) {
- return (info);
- }
- }
-
- return (NULL);
-}
-*/
-/*-----------------------------------------------------------------------
- * Copy memory to flash.
- * Make sure all target addresses are within Flash bounds,
- * and no protected sectors are hit.
- * Returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- * 4 - target range includes protected sectors
- * 8 - target address not in Flash memory
- */
-
-/*int flash_write (uchar *src, ulong addr, ulong cnt)
-{
- int i;
- ulong end = addr + cnt - 1;
- flash_info_t *info_first = addr2info (addr);
- flash_info_t *info_last = addr2info (end );
- flash_info_t *info;
-
- if (cnt == 0) {
- return (0);
- }
-
- if (!info_first || !info_last) {
- return (8);
- }
-
- for (info = info_first; info <= info_last; ++info) {
- ulong b_end = info->start[0] + info->size;*/ /* bank end addr */
-/* short s_end = info->sector_count - 1;
- for (i=0; i<info->sector_count; ++i) {
- ulong e_addr = (i == s_end) ? b_end : info->start[i + 1];
-
- if ((end >= info->start[i]) && (addr < e_addr) &&
- (info->protect[i] != 0) ) {
- return (4);
- }
- }
- }
-
-*/ /* finally write data to flash */
-/* for (info = info_first; info <= info_last && cnt>0; ++info) {
- ulong len;
-
- len = info->start[0] + info->size - addr;
- if (len > cnt)
- len = cnt;
- if ((i = write_buff(info, src, addr, len)) != 0) {
- return (i);
- }
- cnt -= len;
- addr += len;
- src += len;
- }
- return (0);
-}
-*/
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
-#ifndef CFG_FLASH_16BIT
- ulong cp, wp, data;
- int l;
-#else
- ulong cp, wp;
- ushort data;
-#endif
- int i, rc;
-
-#ifndef CFG_FLASH_16BIT
-
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i = 0, cp = wp; i < l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
- for (; i < 4 && cnt > 0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt == 0 && i < 4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
-
- if ((rc = write_word (info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = 0;
- for (i = 0; i < 4; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_word (info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i = 0, cp = wp; i < 4 && cnt > 0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i < 4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
-
- return (write_word (info, wp, data));
-
-#else
- wp = (addr & ~1); /* get lower word aligned address */
-
- /*
- * handle unaligned start byte
- */
- if (addr - wp) {
- data = 0;
- data = (data << 8) | *src++;
- --cnt;
- if ((rc = write_short (info, wp, data)) != 0) {
- return (rc);
- }
- wp += 2;
- }
-
- /*
- * handle word aligned part
- */
-/* l = 0; used for debuging */
- while (cnt >= 2) {
- data = 0;
- for (i = 0; i < 2; ++i) {
- data = (data << 8) | *src++;
- }
-
-/* if(!l){
- printf("%x",data);
- l = 1;
- } used for debuging */
-
- if ((rc = write_short (info, wp, data)) != 0) {
- return (rc);
- }
- wp += 2;
- cnt -= 2;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i = 0, cp = wp; i < 2 && cnt > 0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i < 2; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
-
- return (write_short (info, wp, data));
-
-
-#endif
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-#ifndef CFG_FLASH_16BIT
-static int write_word (flash_info_t * info, ulong dest, ulong data)
-{
- vu_long *addr = (vu_long *) (info->start[0]);
- ulong start, barf;
- int flag;
-
-#if defined (__MIPSEL__)
- data = cpu_to_be32 (data);
-#endif
-
- /* Check if Flash is (sufficiently) erased */
- if ((*((vu_long *) dest) & data) != data) {
- return (2);
- }
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
-
- if (info->flash_id < FLASH_AMD_COMP) {
- /* AMD stuff */
- addr[0x0555] = 0x00AA00AA;
- addr[0x02AA] = 0x00550055;
- addr[0x0555] = 0x00A000A0;
- } else {
- /* intel stuff */
- *addr = 0x00400040;
- }
-
- *((vu_long *) dest) = data;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts ();
-
- /* data polling for D7 */
- start = get_timer (0);
-
- if (info->flash_id < FLASH_AMD_COMP) {
-
- while ((*((vu_long *) dest) & 0x00800080) !=
- (data & 0x00800080)) {
- if (get_timer (start) > CFG_FLASH_WRITE_TOUT) {
- printf ("timeout\n");
- return (1);
- }
- }
-
- } else {
-
- while (!(addr[0] & 0x00800080)) { /* wait for error or finish */
- if (get_timer (start) > CFG_FLASH_WRITE_TOUT) {
- printf ("timeout\n");
- return (1);
- }
- }
-
- if (addr[0] & 0x003A003A) { /* check for error */
- barf = addr[0] & 0x003A0000;
- if (barf) {
- barf >>= 16;
- } else {
- barf = addr[0] & 0x0000003A;
- }
- printf ("\nFlash write error at address %lx\n",
- (unsigned long) dest);
- if (barf & 0x0002)
- printf ("Block locked, not erased.\n");
- if (barf & 0x0010)
- printf ("Programming error.\n");
- if (barf & 0x0008)
- printf ("Vpp Low error.\n");
- return (2);
- }
-
-
- }
-
- return (0);
-}
-
-#else
-
-static int write_short (flash_info_t * info, ulong dest, ushort data)
-{
- vu_short *addr = (vu_short *) (info->start[0]);
- ulong start, barf;
- int flag;
-
-#if defined (__MIPSEL__)
- data = cpu_to_be16 (data);
-#endif
-
- /* Check if Flash is (sufficiently) erased */
- if ((*((vu_short *) dest) & data) != data) {
- return (2);
- }
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
-
- if (info->flash_id < FLASH_AMD_COMP) {
- /* AMD stuff */
- addr[0x0555] = 0x00AA;
- addr[0x02AA] = 0x0055;
- addr[0x0555] = 0x00A0;
- } else {
- /* intel stuff */
- *addr = 0x00D0;
- *addr = 0x0040;
- }
- *((vu_short *) dest) = data;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts ();
-
- /* data polling for D7 */
- start = get_timer (0);
-
- if (info->flash_id < FLASH_AMD_COMP) {
- /* AMD stuff */
- while ((*((vu_short *) dest) & 0x0080) != (data & 0x0080)) {
- if (get_timer (start) > CFG_FLASH_WRITE_TOUT) {
- return (1);
- }
- }
-
- } else {
- /* intel stuff */
- while (!(addr[0] & 0x0080)) { /* wait for error or finish */
- if (get_timer (start) > CFG_FLASH_WRITE_TOUT)
- return (1);
- }
-
- if (addr[0] & 0x003A) { /* check for error */
- barf = addr[0] & 0x003A;
- printf ("\nFlash write error at address %lx\n",
- (unsigned long) dest);
- if (barf & 0x0002)
- printf ("Block locked, not erased.\n");
- if (barf & 0x0010)
- printf ("Programming error.\n");
- if (barf & 0x0008)
- printf ("Vpp Low error.\n");
- return (2);
- }
- *addr = 0x00B0;
- *addr = 0x0070;
- while (!(addr[0] & 0x0080)) { /* wait for error or finish */
- if (get_timer (start) > CFG_FLASH_WRITE_TOUT)
- return (1);
- }
-
- *addr = 0x00FF;
-
- }
-
- return (0);
-
-}
-#endif
diff --git a/board/tb0229/lowlevel_init.S b/board/tb0229/lowlevel_init.S
deleted file mode 100644
index df318067b9..0000000000
--- a/board/tb0229/lowlevel_init.S
+++ /dev/null
@@ -1,71 +0,0 @@
-/*
- * Memory sub-system initialization code for TANBAC Evaluation board TB0229.
- *
- * Copyright (c) 2003 Masami Komiya <mkomiya@sonare.it>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2, or (at
- * your option) any later version.
- */
-
-#include <config.h>
-#include <version.h>
-#include <asm/regdef.h>
-
-
- .globl lowlevel_init
-lowlevel_init:
-
- /* BCUCNTREG1 = 0x0040 */
- la t0, 0xaf000000
- li t1, 0x0040
- sh t1, 0(t0)
-
- /* ROMSIZEREG = 0x3333 */
- la t0, 0xaf000004
- li t1, 0x3333
- sh t1, 0(t0)
-
- /* ROMSPEEDREG = 0x3003 */
- la t0, 0xaf000006
- li t1, 0x3003
- sh t1, 0(t0)
-
- /* BCUCNTREG3 = 0 */
- la t0, 0xaf000016
- li t1, 0x0000
- sh t1, 0(t0)
-
- /* CMUCLKMSK */
- la t0, 0xaf000060
- li t1, 0x39a2
- sh t1, 0(t0)
-
- /* PMUCNTREG */
- la t0, 0xaf0000c2
- li t1, 0x0006
- sh t1, 0(t0)
-
- /* SDRAMMODEREG = 0x8029 */
- la t0, 0xaf000400
- li t1, 0x8029
- sh t1, 0(t0)
-
- /* SDRAMCNTREG = 0x2322 */
- la t0, 0xaf000402
- li t1, 0x2322
- sh t1, 0(t0)
-
- /* BCURFCNTREG = 0x0106 */
- la t0, 0xaf000404
- li t1, 0x0106
- sh t1, 0(t0)
-
- /* RAMSZEREG = 0x5555 (64MB Bank) */
- la t0, 0xaf000408
- li t1, 0x5555
- sh t1, 0(t0)
-
- j ra
- nop
diff --git a/board/tb0229/tb0229.c b/board/tb0229/tb0229.c
deleted file mode 100644
index e7914bd15b..0000000000
--- a/board/tb0229/tb0229.c
+++ /dev/null
@@ -1,42 +0,0 @@
-/*
- * Board initialize code for TANBAC Evaluation board TB0229.
- *
- * (C) Masami Komiya <mkomiya@sonare.it> 2004
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2, or (at
- * your option) any later version.
- */
-
-#include <common.h>
-#include <command.h>
-#include <asm/addrspace.h>
-#include <asm/inca-ip.h>
-#include <pci.h>
-
-unsigned long mips_io_port_base = 0;
-
-#if defined(CONFIG_PCI)
-static struct pci_controller hose;
-
-void pci_init_board (void)
-{
- init_vr4131_pci(&hose);
-}
-#endif
-
-
-long int initdram(int board_type)
-{
- return get_ram_size (CFG_SDRAM_BASE, 0x8000000);
-}
-
-
-int checkboard (void)
-{
- printf("Board: TANBAC TB0229 ");
- printf("(CPU Speed %d MHz)\n", (int)CPU_CLOCK_RATE/1000000);
-
- return 0;
-}
diff --git a/board/tb0229/u-boot.lds b/board/tb0229/u-boot.lds
deleted file mode 100644
index 30a2bc57ea..0000000000
--- a/board/tb0229/u-boot.lds
+++ /dev/null
@@ -1,69 +0,0 @@
-/*
- * (C) Masami Komiya <mkomiya@sonare.it> 2004
- *
- * (C) Copyright 2003
- * Wolfgang Denk Engineering, <wd@denx.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT("elf32-tradlittlemips", "elf32-tradlittlemips", "elf32-tradlittlemips")
-
-OUTPUT_ARCH(mips)
-ENTRY(_start)
-SECTIONS
-{
- . = 0x00000000;
-
- . = ALIGN(4);
- .text :
- {
- *(.text)
- }
-
- . = ALIGN(4);
- .rodata : { *(.rodata) }
-
- . = ALIGN(4);
- .data : { *(.data) }
-
- . = ALIGN(4);
- .sdata : { *(.sdata) }
-
- _gp = ALIGN(16);
-
- __got_start = .;
- .got : { *(.got) }
- __got_end = .;
-
- .sdata : { *(.sdata) }
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- uboot_end_data = .;
- num_got_entries = (__got_end - __got_start) >> 2;
-
- . = ALIGN(4);
- .sbss : { *(.sbss) }
- .bss : { *(.bss) }
- uboot_end = .;
-}
diff --git a/board/tb0229/vr4131-pci.c b/board/tb0229/vr4131-pci.c
deleted file mode 100644
index 0ee4bf30ea..0000000000
--- a/board/tb0229/vr4131-pci.c
+++ /dev/null
@@ -1,254 +0,0 @@
-/*
- * VR4131 PCIU support code for TANBAC Evaluation board TB0229.
- *
- * (C) Masami Komiya <mkomiya@sonare.it> 2004
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2, or (at
- * your option) any later version.
- */
-
-#include <common.h>
-#include <pci.h>
-#include <asm/addrspace.h>
-
-#define VR4131_PCIMMAW1REG (volatile unsigned int*)(KSEG1 + 0x0f000c00)
-#define VR4131_PCIMMAW2REG (volatile unsigned int*)(KSEG1 + 0x0f000c04)
-#define VR4131_PCITAW1REG (volatile unsigned int*)(KSEG1 + 0x0f000c08)
-#define VR4131_PCITAW2REG (volatile unsigned int*)(KSEG1 + 0x0f000c0c)
-#define VR4131_PCIMIOAWREG (volatile unsigned int*)(KSEG1 + 0x0f000c10)
-#define VR4131_PCICONFDREG (volatile unsigned int*)(KSEG1 + 0x0f000c14)
-#define VR4131_PCICONFAREG (volatile unsigned int*)(KSEG1 + 0x0f000c18)
-#define VR4131_PCIMAILREG (volatile unsigned int*)(KSEG1 + 0x0f000c1c)
-#define VR4131_BUSERRADREG (volatile unsigned int*)(KSEG1 + 0x0f000c24)
-#define VR4131_INTCNTSTAREG (volatile unsigned int*)(KSEG1 + 0x0f000c28)
-#define VR4131_PCIEXACCREG (volatile unsigned int*)(KSEG1 + 0x0f000c2c)
-#define VR4131_PCIRECONTREG (volatile unsigned int*)(KSEG1 + 0x0f000c30)
-#define VR4131_PCIENREG (volatile unsigned int*)(KSEG1 + 0x0f000c34)
-#define VR4131_PCICLKSELREG (volatile unsigned int*)(KSEG1 + 0x0f000c38)
-#define VR4131_PCITRDYREG (volatile unsigned int*)(KSEG1 + 0x0f000c3c)
-#define VR4131_PCICLKRUNREG (volatile unsigned int*)(KSEG1 + 0x0f000c60)
-#define VR4131_PCIHOSTCONFIG (volatile unsigned int*)(KSEG1 + 0x0f000d00)
-#define VR4131_VENDORIDREG (volatile unsigned int*)(KSEG1 + 0x0f000d00)
-#define VR4131_DEVICEIDREG (volatile unsigned int*)(KSEG1 + 0x0f000d00)
-#define VR4131_COMMANDREG (volatile unsigned int*)(KSEG1 + 0x0f000d04)
-#define VR4131_STATUSREG (volatile unsigned int*)(KSEG1 + 0x0f000d04)
-#define VR4131_REVREG (volatile unsigned int*)(KSEG1 + 0x0f000d08)
-#define VR4131_CLASSREG (volatile unsigned int*)(KSEG1 + 0x0f000d08)
-#define VR4131_CACHELSREG (volatile unsigned int*)(KSEG1 + 0x0f000d0c)
-#define VR4131_LATTIMERRG (volatile unsigned int*)(KSEG1 + 0x0f000d0c)
-#define VR4131_MAILBAREG (volatile unsigned int*)(KSEG1 + 0x0f000d10)
-#define VR4131_PCIMBA1REG (volatile unsigned int*)(KSEG1 + 0x0f000d14)
-#define VR4131_PCIMBA2REG (volatile unsigned int*)(KSEG1 + 0x0f000d18)
-
-/*#define VR41XX_PCIIRQ_OFFSET (VR41XX_IRQ_MAX + 1) */
-/*#define VR41XX_PCIIRQ_MAX (VR41XX_IRQ_MAX + 12) */
-/*#define VR4122_PCI_HOST_BASE 0xa0000000 */
-
-volatile unsigned int *pciconfigaddr;
-volatile unsigned int *pciconfigdata;
-
-#define PCI_ACCESS_READ 0
-#define PCI_ACCESS_WRITE 1
-
-/*
- * Access PCI Configuration Register for VR4131
- */
-
-static int vr4131_pci_config_access (u8 access_type, u32 dev, u32 reg,
- u32 * data)
-{
- u32 bus;
- u32 device;
-
- bus = ((dev & 0xff0000) >> 16);
- device = ((dev & 0xf800) >> 11);
-
- if (bus == 0) {
- /* Type 0 Configuration */
- *VR4131_PCICONFAREG = (u32) (1UL << device | (reg & 0xfc));
- } else {
- /* Type 1 Configuration */
- *VR4131_PCICONFAREG = (u32) (dev | ((reg / 4) << 2) | 1);
- }
-
- if (access_type == PCI_ACCESS_WRITE) {
- *VR4131_PCICONFDREG = *data;
- } else {
- *data = *VR4131_PCICONFDREG;
- }
-
- return (0);
-}
-
-static int vr4131_pci_read_config_byte (u32 hose, u32 dev, u32 reg, u8 * val)
-{
- u32 data;
-
- if (vr4131_pci_config_access (PCI_ACCESS_READ, dev, reg, &data))
- return -1;
-
- *val = (data >> ((reg & 3) << 3)) & 0xff;
-
- return 0;
-}
-
-
-static int vr4131_pci_read_config_word (u32 hose, u32 dev, u32 reg, u16 * val)
-{
- u32 data;
-
- if (reg & 1)
- return -1;
-
- if (vr4131_pci_config_access (PCI_ACCESS_READ, dev, reg, &data))
- return -1;
-
- *val = (data >> ((reg & 3) << 3)) & 0xffff;
-
- return 0;
-}
-
-
-static int vr4131_pci_read_config_dword (u32 hose, u32 dev, u32 reg,
- u32 * val)
-{
- u32 data = 0;
-
- if (reg & 3)
- return -1;
-
- if (vr4131_pci_config_access (PCI_ACCESS_READ, dev, reg, &data))
- return -1;
-
- *val = data;
-
- return (0);
-}
-
-static int vr4131_pci_write_config_byte (u32 hose, u32 dev, u32 reg, u8 val)
-{
- u32 data = 0;
-
- if (vr4131_pci_config_access (PCI_ACCESS_READ, dev, reg, &data))
- return -1;
-
- data = (data & ~(0xff << ((reg & 3) << 3))) | (val <<
- ((reg & 3) << 3));
-
- if (vr4131_pci_config_access (PCI_ACCESS_WRITE, dev, reg, &data))
- return -1;
-
- return 0;
-}
-
-
-static int vr4131_pci_write_config_word (u32 hose, u32 dev, u32 reg, u16 val)
-{
- u32 data = 0;
-
- if (reg & 1)
- return -1;
-
- if (vr4131_pci_config_access (PCI_ACCESS_READ, dev, reg, &data))
- return -1;
-
- data = (data & ~(0xffff << ((reg & 3) << 3))) | (val <<
- ((reg & 3) << 3));
-
- if (vr4131_pci_config_access (PCI_ACCESS_WRITE, dev, reg, &data))
- return -1;
-
- return 0;
-}
-
-static int vr4131_pci_write_config_dword (u32 hose, u32 dev, u32 reg, u32 val)
-{
- u32 data;
-
- if (reg & 3) {
- return -1;
- }
-
- data = val;
-
- if (vr4131_pci_config_access (PCI_ACCESS_WRITE, dev, reg, &data))
- return -1;
-
- return (0);
-}
-
-
-/*
- * Initialize VR4131 PCIU
- */
-
-vr4131_pciu_init ()
-{
- /* PCI clock */
- *VR4131_PCICLKSELREG = 0x00000002;
-
- /* PCI memory and I/O space */
- *VR4131_PCIMMAW1REG = 0x100F9010;
- *VR4131_PCIMMAW2REG = 0x140FD014;
- *VR4131_PCIMIOAWREG = 0x160FD000;
-
- /* Target memory window */
- *VR4131_PCITAW1REG = 0x00081000; /* 64MB */
- *VR4131_PCITAW2REG = 0x00000000;
-
- *VR4131_MAILBAREG = 0UL;
- *VR4131_PCIMBA1REG = 0UL;
-
- *VR4131_PCITRDYREG = 0x00008004;
-
- *VR4131_PCIENREG = 0x00000004; /* PCI enable */
- *VR4131_COMMANDREG = 0x02000007;
-}
-
-/*
- * Initialize Module
- */
-
-void init_vr4131_pci (struct pci_controller *hose)
-{
- hose->first_busno = 0;
- hose->last_busno = 0xff;
-
- vr4131_pciu_init (); /* Initialize VR4131 PCIU */
-
- /* PCI memory space #1 */
- pci_set_region (hose->regions + 0,
- 0x10000000, 0xb0000000, 0x04000000, PCI_REGION_MEM);
-
- /* PCI memory space #2 */
- pci_set_region (hose->regions + 1,
- 0x14000000, 0xb4000000, 0x02000000, PCI_REGION_MEM);
-
-
- /* PCI I/O space */
- pci_set_region (hose->regions + 2,
- 0x16000000, 0xb6000000, 0x02000000, PCI_REGION_IO);
-
- /* System memory space */
- pci_set_region (hose->regions + 3,
- 0x00000000,
- 0x80000000,
- 0x04000000, PCI_REGION_MEM | PCI_REGION_MEMORY);
-
- hose->region_count = 4;
-
- hose->read_byte = vr4131_pci_read_config_byte;
- hose->read_word = vr4131_pci_read_config_word;
- hose->read_dword = vr4131_pci_read_config_dword;
- hose->write_byte = vr4131_pci_write_config_byte;
- hose->write_word = vr4131_pci_write_config_word;
- hose->write_dword = vr4131_pci_write_config_dword;
-
- pci_register_hose (hose);
-
- hose->last_busno = pci_hose_scan (hose);
-
- return;
-}
diff --git a/board/total5200/Makefile b/board/total5200/Makefile
deleted file mode 100644
index 232956a392..0000000000
--- a/board/total5200/Makefile
+++ /dev/null
@@ -1,46 +0,0 @@
-#
-# (C) Copyright 2003-2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := $(BOARD).o sdram.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/total5200/config.mk b/board/total5200/config.mk
deleted file mode 100644
index 1a7a7cfc1d..0000000000
--- a/board/total5200/config.mk
+++ /dev/null
@@ -1,43 +0,0 @@
-#
-# (C) Copyright 2003-2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# Total5200 board:
-#
-# Valid values for TEXT_BASE are:
-#
-# 0xFFF00000 boot high (standard configuration)
-# 0xFE000000 boot low
-# 0x00100000 boot from RAM (for testing only)
-#
-
-sinclude $(TOPDIR)/board/$(BOARDDIR)/config.tmp
-
-ifndef TEXT_BASE
-## Standard: boot high
-TEXT_BASE = 0xFFF00000
-## For testing: boot from RAM
-# TEXT_BASE = 0x00100000
-endif
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
diff --git a/board/total5200/mt48lc16m16a2-75.h b/board/total5200/mt48lc16m16a2-75.h
deleted file mode 100644
index 5b0923e3e8..0000000000
--- a/board/total5200/mt48lc16m16a2-75.h
+++ /dev/null
@@ -1,43 +0,0 @@
-/*
- * (C) Copyright 2004
- * Mark Jonas, Freescale Semiconductor, mark.jonas@freescale.com.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#define SDRAM_DDR 0 /* is SDR */
-
-#if defined(CONFIG_MPC5200)
-/* Settings for XLB = 132 MHz */
-#define SDRAM_MODE 0x00CD0000
-#define SDRAM_CONTROL 0x504F0000
-#define SDRAM_CONFIG1 0xD2322800
-#define SDRAM_CONFIG2 0x8AD70000
-
-#elif defined(CONFIG_MGT5100)
-/* Settings for XLB = 66 MHz */
-#define SDRAM_MODE 0x008D0000
-#define SDRAM_CONTROL 0x504F0000
-#define SDRAM_CONFIG1 0xC2222600
-#define SDRAM_CONFIG2 0x88B70004
-#define SDRAM_ADDRSEL 0x02000000
-
-#else
-#error Neither CONFIG_MPC5200 or CONFIG_MGT5100 defined
-#endif
diff --git a/board/total5200/mt48lc32m16a2-75.h b/board/total5200/mt48lc32m16a2-75.h
deleted file mode 100644
index 4b5ac80b35..0000000000
--- a/board/total5200/mt48lc32m16a2-75.h
+++ /dev/null
@@ -1,40 +0,0 @@
-/*
- * (C) Copyright 2004
- * Mark Jonas, Freescale Semiconductor, mark.jonas@freescale.com.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * Micron MT48LC32M16A2-75 is compatible to:
- * - Infineon HYB39S512160AT-75
- */
-
-#define SDRAM_DDR 0 /* is SDR */
-
-#if defined(CONFIG_MPC5200)
-/* Settings for XLB = 132 MHz */
-#define SDRAM_MODE 0x00CD0000
-#define SDRAM_CONTROL 0x514F0000
-#define SDRAM_CONFIG1 0xD2322800
-#define SDRAM_CONFIG2 0x8AD70000
-
-#else
-#error CONFIG_MPC5200 is not defined
-#endif
diff --git a/board/total5200/sdram.c b/board/total5200/sdram.c
deleted file mode 100644
index a1601f274d..0000000000
--- a/board/total5200/sdram.c
+++ /dev/null
@@ -1,227 +0,0 @@
-/*
- * (C) Copyright 2003-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2004
- * Mark Jonas, Freescale Semiconductor, mark.jonas@freescale.com.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc5xxx.h>
-
-#include "sdram.h"
-
-#ifndef CFG_RAMBOOT
-static void mpc5xxx_sdram_start (sdram_conf_t *sdram_conf, int hi_addr)
-{
- long hi_addr_bit = hi_addr ? 0x01000000 : 0;
-
- /* unlock mode register */
- *(vu_long *)MPC5XXX_SDRAM_CTRL = sdram_conf->control | 0x80000000 | hi_addr_bit;
- __asm__ volatile ("sync");
-
- /* precharge all banks */
- *(vu_long *)MPC5XXX_SDRAM_CTRL = sdram_conf->control | 0x80000002 | hi_addr_bit;
- __asm__ volatile ("sync");
-
- if (sdram_conf->ddr) {
- /* set mode register: extended mode */
- *(vu_long *)MPC5XXX_SDRAM_MODE = sdram_conf->emode;
- __asm__ volatile ("sync");
-
- /* set mode register: reset DLL */
- *(vu_long *)MPC5XXX_SDRAM_MODE = sdram_conf->mode | 0x04000000;
- __asm__ volatile ("sync");
- }
-
- /* precharge all banks */
- *(vu_long *)MPC5XXX_SDRAM_CTRL = sdram_conf->control | 0x80000002 | hi_addr_bit;
- __asm__ volatile ("sync");
-
- /* auto refresh */
- *(vu_long *)MPC5XXX_SDRAM_CTRL = sdram_conf->control | 0x80000004 | hi_addr_bit;
- __asm__ volatile ("sync");
-
- /* set mode register */
- *(vu_long *)MPC5XXX_SDRAM_MODE = sdram_conf->mode;
- __asm__ volatile ("sync");
-
- /* normal operation */
- *(vu_long *)MPC5XXX_SDRAM_CTRL = sdram_conf->control | hi_addr_bit;
- __asm__ volatile ("sync");
-}
-#endif
-
-/*
- * ATTENTION: Although partially referenced initdram does NOT make real use
- * use of CFG_SDRAM_BASE. The code does not work if CFG_SDRAM_BASE
- * is something else than 0x00000000.
- */
-
-#if defined(CONFIG_MPC5200)
-long int mpc5xxx_sdram_init (sdram_conf_t *sdram_conf)
-{
- ulong dramsize = 0;
- ulong dramsize2 = 0;
-#ifndef CFG_RAMBOOT
- ulong test1, test2;
-
- /* setup SDRAM chip selects */
- *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x0000001e;/* 2G at 0x0 */
- *(vu_long *)MPC5XXX_SDRAM_CS1CFG = 0x80000000;/* disabled */
- __asm__ volatile ("sync");
-
- /* setup config registers */
- *(vu_long *)MPC5XXX_SDRAM_CONFIG1 = sdram_conf->config1;
- *(vu_long *)MPC5XXX_SDRAM_CONFIG2 = sdram_conf->config2;
- __asm__ volatile ("sync");
-
- if (sdram_conf->ddr) {
- /* set tap delay */
- *(vu_long *)MPC5XXX_CDM_PORCFG = sdram_conf->tapdelay;
- __asm__ volatile ("sync");
- }
-
- /* find RAM size using SDRAM CS0 only */
- mpc5xxx_sdram_start(sdram_conf, 0);
- test1 = get_ram_size((long *)CFG_SDRAM_BASE, 0x80000000);
- mpc5xxx_sdram_start(sdram_conf, 1);
- test2 = get_ram_size((long *)CFG_SDRAM_BASE, 0x80000000);
- if (test1 > test2) {
- mpc5xxx_sdram_start(sdram_conf, 0);
- dramsize = test1;
- } else {
- dramsize = test2;
- }
-
- /* memory smaller than 1MB is impossible */
- if (dramsize < (1 << 20)) {
- dramsize = 0;
- }
-
- /* set SDRAM CS0 size according to the amount of RAM found */
- if (dramsize > 0) {
- *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x13 + __builtin_ffs(dramsize >> 20) - 1;
- } else {
- *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0; /* disabled */
- }
-
- /* let SDRAM CS1 start right after CS0 */
- *(vu_long *)MPC5XXX_SDRAM_CS1CFG = dramsize + 0x0000001e;/* 2G */
-
- /* find RAM size using SDRAM CS1 only */
- mpc5xxx_sdram_start(sdram_conf, 0);
- test1 = get_ram_size((long *)(CFG_SDRAM_BASE + dramsize), 0x80000000);
- mpc5xxx_sdram_start(sdram_conf, 1);
- test2 = get_ram_size((long *)(CFG_SDRAM_BASE + dramsize), 0x80000000);
- if (test1 > test2) {
- mpc5xxx_sdram_start(sdram_conf, 0);
- dramsize2 = test1;
- } else {
- dramsize2 = test2;
- }
-
- /* memory smaller than 1MB is impossible */
- if (dramsize2 < (1 << 20)) {
- dramsize2 = 0;
- }
-
- /* set SDRAM CS1 size according to the amount of RAM found */
- if (dramsize2 > 0) {
- *(vu_long *)MPC5XXX_SDRAM_CS1CFG = dramsize
- | (0x13 + __builtin_ffs(dramsize2 >> 20) - 1);
- } else {
- *(vu_long *)MPC5XXX_SDRAM_CS1CFG = dramsize; /* disabled */
- }
-
-#else /* CFG_RAMBOOT */
-
- /* retrieve size of memory connected to SDRAM CS0 */
- dramsize = *(vu_long *)MPC5XXX_SDRAM_CS0CFG & 0xFF;
- if (dramsize >= 0x13) {
- dramsize = (1 << (dramsize - 0x13)) << 20;
- } else {
- dramsize = 0;
- }
-
- /* retrieve size of memory connected to SDRAM CS1 */
- dramsize2 = *(vu_long *)MPC5XXX_SDRAM_CS1CFG & 0xFF;
- if (dramsize2 >= 0x13) {
- dramsize2 = (1 << (dramsize2 - 0x13)) << 20;
- } else {
- dramsize2 = 0;
- }
-
-#endif /* CFG_RAMBOOT */
-
- return dramsize + dramsize2;
-}
-
-#elif defined(CONFIG_MGT5100)
-
-long int mpc5xxx_sdram_init (sdram_conf_t *sdram_conf)
-{
- ulong dramsize = 0;
-#ifndef CFG_RAMBOOT
- ulong test1, test2;
-
- /* setup and enable SDRAM chip selects */
- *(vu_long *)MPC5XXX_SDRAM_START = 0x00000000;
- *(vu_long *)MPC5XXX_SDRAM_STOP = 0x0000ffff;/* 2G */
- *(vu_long *)MPC5XXX_ADDECR |= (1 << 22); /* Enable SDRAM */
- __asm__ volatile ("sync");
-
- /* setup config registers */
- *(vu_long *)MPC5XXX_SDRAM_CONFIG1 = sdram_conf->config1;
- *(vu_long *)MPC5XXX_SDRAM_CONFIG2 = sdram_conf->config2;
-
- /* address select register */
- *(vu_long *)MPC5XXX_SDRAM_XLBSEL = sdram_conf->addrsel;
- __asm__ volatile ("sync");
-
- /* find RAM size */
- mpc5xxx_sdram_start(sdram_conf, 0);
- test1 = get_ram_size((long *)CFG_SDRAM_BASE, 0x80000000);
- mpc5xxx_sdram_start(sdram_conf, 1);
- test2 = get_ram_size((long *)CFG_SDRAM_BASE, 0x80000000);
- if (test1 > test2) {
- mpc5xxx_sdram_start(sdram_conf, 0);
- dramsize = test1;
- } else {
- dramsize = test2;
- }
-
- /* set SDRAM end address according to size */
- *(vu_long *)MPC5XXX_SDRAM_STOP = ((dramsize - 1) >> 15);
-
-#else /* CFG_RAMBOOT */
-
- /* Retrieve amount of SDRAM available */
- dramsize = ((*(vu_long *)MPC5XXX_SDRAM_STOP + 1) << 15);
-
-#endif /* CFG_RAMBOOT */
-
- return dramsize;
-}
-
-#else
-#error Neither CONFIG_MPC5200 or CONFIG_MGT5100 defined
-#endif
diff --git a/board/total5200/sdram.h b/board/total5200/sdram.h
deleted file mode 100644
index bc21e1d300..0000000000
--- a/board/total5200/sdram.h
+++ /dev/null
@@ -1,39 +0,0 @@
-/*
- * (C) Copyright 2004
- * Mark Jonas, Freescale Semiconductor, mark.jonas@freescale.com.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-typedef struct {
- ulong ddr;
- ulong mode;
- ulong emode;
- ulong control;
- ulong config1;
- ulong config2;
-#if defined(CONFIG_MPC5200)
- ulong tapdelay;
-#endif
-#if defined(CONFIG_MGT5100)
- ulong addrsel;
-#endif
-} sdram_conf_t;
-
-long int mpc5xxx_sdram_init (sdram_conf_t *sdram_conf);
diff --git a/board/total5200/total5200.c b/board/total5200/total5200.c
deleted file mode 100644
index 1a35187260..0000000000
--- a/board/total5200/total5200.c
+++ /dev/null
@@ -1,310 +0,0 @@
-/*
- * (C) Copyright 2003-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2004
- * Mark Jonas, Freescale Semiconductor, mark.jonas@freescale.com.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc5xxx.h>
-#include <pci.h>
-
-#include "sdram.h"
-
-#if CONFIG_TOTAL5200_REV==2
-#include "mt48lc32m16a2-75.h"
-#else
-#include "mt48lc16m16a2-75.h"
-#endif
-
-long int initdram (int board_type)
-{
- sdram_conf_t sdram_conf;
-
- sdram_conf.ddr = SDRAM_DDR;
- sdram_conf.mode = SDRAM_MODE;
- sdram_conf.emode = 0;
- sdram_conf.control = SDRAM_CONTROL;
- sdram_conf.config1 = SDRAM_CONFIG1;
- sdram_conf.config2 = SDRAM_CONFIG2;
-#if defined(CONFIG_MPC5200)
- sdram_conf.tapdelay = 0;
-#endif
-#if defined(CONFIG_MGT5100)
- sdram_conf.addrsel = SDRAM_ADDRSEL;
-#endif
- return mpc5xxx_sdram_init (&sdram_conf);
-}
-
-int checkboard (void)
-{
-#if defined(CONFIG_MPC5200)
-#if CONFIG_TOTAL5200_REV==2
- puts ("Board: Total5200 Rev.2 ");
-#else
- puts ("Board: Total5200 ");
-#endif
-#elif defined(CONFIG_MGT5100)
- puts ("Board: Total5100 ");
-#endif
-
-/*
- * Retrieve FPGA Revision.
- */
-printf ("(FPGA %08X)\n", *(vu_long *) (CFG_FPGA_BASE + 0x400));
-
-/*
- * Take all peripherals in power-up mode.
- */
-#if CONFIG_TOTAL5200_REV==2
- *(vu_char *) (CFG_CPLD_BASE + 0x46) = 0x70;
-#else
- *(vu_long *) (CFG_CPLD_BASE + 0x400) = 0x70;
-#endif
-
- return 0;
-}
-
-#if defined(CONFIG_MGT5100)
-int board_early_init_r(void)
-{
- /*
- * Now, when we are in RAM, enable CS0
- * because CS_BOOT cannot be written.
- */
- *(vu_long *)MPC5XXX_ADDECR &= ~(1 << 25); /* disable CS_BOOT */
- *(vu_long *)MPC5XXX_ADDECR |= (1 << 16); /* enable CS0 */
-
- return 0;
-}
-#endif
-
-#ifdef CONFIG_PCI
-static struct pci_controller hose;
-
-extern void pci_mpc5xxx_init(struct pci_controller *);
-
-void pci_init_board(void)
-{
- pci_mpc5xxx_init(&hose);
-}
-#endif
-
-#if defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET)
-
-/* IRDA_1 aka PSC6_3 (pin C13) */
-#define GPIO_IRDA_1 0x20000000UL
-
-void init_ide_reset (void)
-{
- debug ("init_ide_reset\n");
-
- /* Configure IRDA_1 (PSC6_3) as GPIO output for ATA reset */
- *(vu_long *) MPC5XXX_GPIO_ENABLE |= GPIO_IRDA_1;
- *(vu_long *) MPC5XXX_GPIO_DIR |= GPIO_IRDA_1;
-}
-
-void ide_set_reset (int idereset)
-{
- debug ("ide_reset(%d)\n", idereset);
-
- if (idereset) {
- *(vu_long *) MPC5XXX_GPIO_DATA_O &= ~GPIO_IRDA_1;
- } else {
- *(vu_long *) MPC5XXX_GPIO_DATA_O |= GPIO_IRDA_1;
- }
-}
-#endif /* defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET) */
-
-#ifdef CONFIG_VIDEO_SED13806
-#include <sed13806.h>
-
-#define DISPLAY_WIDTH 640
-#define DISPLAY_HEIGHT 480
-
-#ifdef CONFIG_VIDEO_SED13806_8BPP
-#error CONFIG_VIDEO_SED13806_8BPP not supported.
-#endif /* CONFIG_VIDEO_SED13806_8BPP */
-
-#ifdef CONFIG_VIDEO_SED13806_16BPP
-static const S1D_REGS init_regs [] =
-{
- {0x0001,0x00}, /* Miscellaneous Register */
- {0x01FC,0x00}, /* Display Mode Register */
- {0x0004,0x00}, /* General IO Pins Configuration Register 0 */
- {0x0005,0x00}, /* General IO Pins Configuration Register 1 */
- {0x0008,0x00}, /* General IO Pins Control Register 0 */
- {0x0009,0x00}, /* General IO Pins Control Register 1 */
- {0x0010,0x02}, /* Memory Clock Configuration Register */
- {0x0014,0x02}, /* LCD Pixel Clock Configuration Register */
- {0x0018,0x02}, /* CRT/TV Pixel Clock Configuration Register */
- {0x001C,0x02}, /* MediaPlug Clock Configuration Register */
- {0x001E,0x01}, /* CPU To Memory Wait State Select Register */
- {0x0021,0x03}, /* DRAM Refresh Rate Register */
- {0x002A,0x00}, /* DRAM Timings Control Register 0 */
- {0x002B,0x01}, /* DRAM Timings Control Register 1 */
- {0x0020,0x80}, /* Memory Configuration Register */
- {0x0030,0x25}, /* Panel Type Register */
- {0x0031,0x00}, /* MOD Rate Register */
- {0x0032,0x4F}, /* LCD Horizontal Display Width Register */
- {0x0034,0x13}, /* LCD Horizontal Non-Display Period Register */
- {0x0035,0x01}, /* TFT FPLINE Start Position Register */
- {0x0036,0x0B}, /* TFT FPLINE Pulse Width Register */
- {0x0038,0xDF}, /* LCD Vertical Display Height Register 0 */
- {0x0039,0x01}, /* LCD Vertical Display Height Register 1 */
- {0x003A,0x2C}, /* LCD Vertical Non-Display Period Register */
- {0x003B,0x0A}, /* TFT FPFRAME Start Position Register */
- {0x003C,0x01}, /* TFT FPFRAME Pulse Width Register */
- {0x0040,0x05}, /* LCD Display Mode Register */
- {0x0041,0x00}, /* LCD Miscellaneous Register */
- {0x0042,0x00}, /* LCD Display Start Address Register 0 */
- {0x0043,0x00}, /* LCD Display Start Address Register 1 */
- {0x0044,0x00}, /* LCD Display Start Address Register 2 */
- {0x0046,0x80}, /* LCD Memory Address Offset Register 0 */
- {0x0047,0x02}, /* LCD Memory Address Offset Register 1 */
- {0x0048,0x00}, /* LCD Pixel Panning Register */
- {0x004A,0x00}, /* LCD Display FIFO High Threshold Control Register */
- {0x004B,0x00}, /* LCD Display FIFO Low Threshold Control Register */
- {0x0050,0x4F}, /* CRT/TV Horizontal Display Width Register */
- {0x0052,0x13}, /* CRT/TV Horizontal Non-Display Period Register */
- {0x0053,0x01}, /* CRT/TV HRTC Start Position Register */
- {0x0054,0x0B}, /* CRT/TV HRTC Pulse Width Register */
- {0x0056,0xDF}, /* CRT/TV Vertical Display Height Register 0 */
- {0x0057,0x01}, /* CRT/TV Vertical Display Height Register 1 */
- {0x0058,0x2B}, /* CRT/TV Vertical Non-Display Period Register */
- {0x0059,0x09}, /* CRT/TV VRTC Start Position Register */
- {0x005A,0x01}, /* CRT/TV VRTC Pulse Width Register */
- {0x005B,0x10}, /* TV Output Control Register */
- {0x0060,0x05}, /* CRT/TV Display Mode Register */
- {0x0062,0x00}, /* CRT/TV Display Start Address Register 0 */
- {0x0063,0x00}, /* CRT/TV Display Start Address Register 1 */
- {0x0064,0x00}, /* CRT/TV Display Start Address Register 2 */
- {0x0066,0x80}, /* CRT/TV Memory Address Offset Register 0 */
- {0x0067,0x02}, /* CRT/TV Memory Address Offset Register 1 */
- {0x0068,0x00}, /* CRT/TV Pixel Panning Register */
- {0x006A,0x00}, /* CRT/TV Display FIFO High Threshold Control Register */
- {0x006B,0x00}, /* CRT/TV Display FIFO Low Threshold Control Register */
- {0x0070,0x00}, /* LCD Ink/Cursor Control Register */
- {0x0071,0x01}, /* LCD Ink/Cursor Start Address Register */
- {0x0072,0x00}, /* LCD Cursor X Position Register 0 */
- {0x0073,0x00}, /* LCD Cursor X Position Register 1 */
- {0x0074,0x00}, /* LCD Cursor Y Position Register 0 */
- {0x0075,0x00}, /* LCD Cursor Y Position Register 1 */
- {0x0076,0x00}, /* LCD Ink/Cursor Blue Color 0 Register */
- {0x0077,0x00}, /* LCD Ink/Cursor Green Color 0 Register */
- {0x0078,0x00}, /* LCD Ink/Cursor Red Color 0 Register */
- {0x007A,0x1F}, /* LCD Ink/Cursor Blue Color 1 Register */
- {0x007B,0x3F}, /* LCD Ink/Cursor Green Color 1 Register */
- {0x007C,0x1F}, /* LCD Ink/Cursor Red Color 1 Register */
- {0x007E,0x00}, /* LCD Ink/Cursor FIFO Threshold Register */
- {0x0080,0x00}, /* CRT/TV Ink/Cursor Control Register */
- {0x0081,0x01}, /* CRT/TV Ink/Cursor Start Address Register */
- {0x0082,0x00}, /* CRT/TV Cursor X Position Register 0 */
- {0x0083,0x00}, /* CRT/TV Cursor X Position Register 1 */
- {0x0084,0x00}, /* CRT/TV Cursor Y Position Register 0 */
- {0x0085,0x00}, /* CRT/TV Cursor Y Position Register 1 */
- {0x0086,0x00}, /* CRT/TV Ink/Cursor Blue Color 0 Register */
- {0x0087,0x00}, /* CRT/TV Ink/Cursor Green Color 0 Register */
- {0x0088,0x00}, /* CRT/TV Ink/Cursor Red Color 0 Register */
- {0x008A,0x1F}, /* CRT/TV Ink/Cursor Blue Color 1 Register */
- {0x008B,0x3F}, /* CRT/TV Ink/Cursor Green Color 1 Register */
- {0x008C,0x1F}, /* CRT/TV Ink/Cursor Red Color 1 Register */
- {0x008E,0x00}, /* CRT/TV Ink/Cursor FIFO Threshold Register */
- {0x0100,0x00}, /* BitBlt Control Register 0 */
- {0x0101,0x00}, /* BitBlt Control Register 1 */
- {0x0102,0x00}, /* BitBlt ROP Code/Color Expansion Register */
- {0x0103,0x00}, /* BitBlt Operation Register */
- {0x0104,0x00}, /* BitBlt Source Start Address Register 0 */
- {0x0105,0x00}, /* BitBlt Source Start Address Register 1 */
- {0x0106,0x00}, /* BitBlt Source Start Address Register 2 */
- {0x0108,0x00}, /* BitBlt Destination Start Address Register 0 */
- {0x0109,0x00}, /* BitBlt Destination Start Address Register 1 */
- {0x010A,0x00}, /* BitBlt Destination Start Address Register 2 */
- {0x010C,0x00}, /* BitBlt Memory Address Offset Register 0 */
- {0x010D,0x00}, /* BitBlt Memory Address Offset Register 1 */
- {0x0110,0x00}, /* BitBlt Width Register 0 */
- {0x0111,0x00}, /* BitBlt Width Register 1 */
- {0x0112,0x00}, /* BitBlt Height Register 0 */
- {0x0113,0x00}, /* BitBlt Height Register 1 */
- {0x0114,0x00}, /* BitBlt Background Color Register 0 */
- {0x0115,0x00}, /* BitBlt Background Color Register 1 */
- {0x0118,0x00}, /* BitBlt Foreground Color Register 0 */
- {0x0119,0x00}, /* BitBlt Foreground Color Register 1 */
- {0x01E0,0x00}, /* Look-Up Table Mode Register */
- {0x01E2,0x00}, /* Look-Up Table Address Register */
- {0x01E4,0x00}, /* Look-Up Table Data Register */
- {0x01F0,0x00}, /* Power Save Configuration Register */
- {0x01F1,0x00}, /* Power Save Status Register */
- {0x01F4,0x00}, /* CPU-to-Memory Access Watchdog Timer Register */
- {0x01FC,0x01}, /* Display Mode Register */
- {0, 0}
-};
-#endif /* CONFIG_VIDEO_SED13806_16BPP */
-
-#ifdef CONFIG_CONSOLE_EXTRA_INFO
-/* Return text to be printed besides the logo. */
-void video_get_info_str (int line_number, char *info)
-{
- if (line_number == 1) {
-#ifdef CONFIG_MGT5100
- strcpy (info, " Total5100");
-#elif CONFIG_TOTAL5200_REV==1
- strcpy (info, " Total5200");
-#elif CONFIG_TOTAL5200_REV==2
- strcpy (info, " Total5200 Rev.2");
-#else
-#error CONFIG_TOTAL5200_REV must be 1 or 2.
-#endif
- } else {
- info [0] = '\0';
- }
-}
-#endif
-
-/* Returns SED13806 base address. First thing called in the driver. */
-unsigned int board_video_init (void)
-{
- return CFG_LCD_BASE;
-}
-
-/* Called after initializing the SED13806 and before clearing the screen. */
-void board_validate_screen (unsigned int base)
-{
-}
-
-/* Return a pointer to the initialization sequence. */
-const S1D_REGS *board_get_regs (void)
-{
- return init_regs;
-}
-
-int board_get_width (void)
-{
- return DISPLAY_WIDTH;
-}
-
-int board_get_height (void)
-{
- return DISPLAY_HEIGHT;
-}
-
-#endif /* CONFIG_VIDEO_SED13806 */
diff --git a/board/total5200/u-boot.lds b/board/total5200/u-boot.lds
deleted file mode 100644
index 3cc2968487..0000000000
--- a/board/total5200/u-boot.lds
+++ /dev/null
@@ -1,125 +0,0 @@
-/*
- * (C) Copyright 2003-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc5xxx/start.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/tqm5200/Makefile b/board/tqm5200/Makefile
deleted file mode 100644
index c234332566..0000000000
--- a/board/tqm5200/Makefile
+++ /dev/null
@@ -1,47 +0,0 @@
-#
-# (C) Copyright 2003-2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-#OBJS := $(BOARD).o flash.o
-OBJS := $(BOARD).o cmd_stk52xx.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/tqm5200/cmd_stk52xx.c b/board/tqm5200/cmd_stk52xx.c
deleted file mode 100755
index 8b9057f503..0000000000
--- a/board/tqm5200/cmd_stk52xx.c
+++ /dev/null
@@ -1,1221 +0,0 @@
-/*
- * (C) Copyright 2005
- * Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * SKT52XX specific functions
- */
-/*#define DEBUG*/
-
-#include <common.h>
-#include <command.h>
-
-#if (CONFIG_COMMANDS & CFG_CMD_BSP)
-
-#define DEFAULT_VOL 45
-#define DEFAULT_FREQ 500
-#define DEFAULT_DURATION 200
-#define LEFT 1
-#define RIGHT 2
-#define LEFT_RIGHT 3
-#define BL_OFF 0
-#define BL_ON 1
-
-#define SM501_GPIO_CTRL_LOW 0x00000008UL
-#define SM501_GPIO_CTRL_HIGH 0x0000000CUL
-#define SM501_POWER_MODE0_GATE 0x00000040UL
-#define SM501_POWER_MODE1_GATE 0x00000048UL
-#define POWER_MODE_GATE_GPIO_PWM_I2C 0x00000040UL
-#define SM501_GPIO_DATA_LOW 0x00010000UL
-#define SM501_GPIO_DATA_HIGH 0x00010004UL
-#define SM501_GPIO_DATA_DIR_LOW 0x00010008UL
-#define SM501_GPIO_DATA_DIR_HIGH 0x0001000CUL
-#define SM501_PANEL_DISPLAY_CONTROL 0x00080000UL
-
-static int i2s_squarewave(unsigned long duration, unsigned int freq,
- unsigned int channel);
-static int i2s_sawtooth(unsigned long duration, unsigned int freq,
- unsigned int channel);
-static void spi_init(void);
-static int spi_transmit(unsigned char data);
-static void pcm1772_write_reg(unsigned char addr, unsigned char data);
-static void set_attenuation(unsigned char attenuation);
-
-#ifdef CONFIG_STK52XX
-static void spi_init(void)
-{
- struct mpc5xxx_spi *spi = (struct mpc5xxx_spi*)MPC5XXX_SPI;
- struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio*)MPC5XXX_GPIO;
-
- /* PSC3 as SPI and GPIOs */
- gpio->port_config &= 0xFFFFF0FF;
- gpio->port_config |= 0x00000800;
- /*
- * Its important to use the correct order when initializing the
- * registers
- */
- spi->ddr = 0x0F; /* set all SPI pins as output */
- spi->pdr = 0x08; /* set SS high */
- spi->cr1 = 0x50; /* SPI is master, SS is general purpose output */
- spi->cr2 = 0x00; /* normal operation */
- spi->brr = 0xFF; /* baud rate: IPB clock / 2048 */
-}
-
-static int spi_transmit(unsigned char data)
-{
- int dummy;
- struct mpc5xxx_spi *spi = (struct mpc5xxx_spi*)MPC5XXX_SPI;
-
- spi->dr = data;
- /* wait for SPI transmission completed */
- while(!(spi->sr & 0x80))
- {
- if (spi->sr & 0x40) /* if write collision occured */
- {
- /* do dummy read to clear status register */
- dummy = spi->dr;
- printf ("SPI write collision\n");
- return -1;
- }
- }
- return (spi->dr);
-}
-
-static void pcm1772_write_reg(unsigned char addr, unsigned char data)
-{
- struct mpc5xxx_spi *spi = (struct mpc5xxx_spi*)MPC5XXX_SPI;
-
- spi->pdr = 0x00; /* Set SS low */
- spi_transmit(addr);
- spi_transmit(data);
- /* wait some time to meet MS# hold time of PCM1772 */
- udelay (1);
- spi->pdr = 0x08; /* set SS high */
-}
-
-static void set_attenuation(unsigned char attenuation)
-{
- pcm1772_write_reg(0x01, attenuation); /* left channel */
- debug ("PCM1772 attenuation left set to %d.\n", attenuation);
- pcm1772_write_reg(0x02, attenuation); /* right channel */
- debug ("PCM1772 attenuation right set to %d.\n", attenuation);
-}
-
-void amplifier_init(void)
-{
- static int init_done = 0;
- int i;
- struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio*)MPC5XXX_GPIO;
-
- /* Do this only once, because of the long time delay */
- if (!init_done) {
- /* configure PCM1772 audio format as I2S */
- pcm1772_write_reg(0x03, 0x01);
- /* enable audio amplifier */
- gpio->sint_gpioe |= 0x02; /* PSC3_5 as GPIO */
- gpio->sint_ode &= ~0x02; /* PSC3_5 is not open Drain */
- gpio->sint_dvo &= ~0x02; /* PSC3_5 is LOW */
- gpio->sint_ddr |= 0x02; /* PSC3_5 as output */
- /*
- * wait some time to allow amplifier to recover from shutdown
- * mode.
- */
- for(i = 0; i < 350; i++)
- udelay(1000);
- /*
- * The used amplifier (LM4867) has a so called "pop and click"
- * elmination filter. The input signal of the amplifier must
- * exceed a certain level once after power up to activate the
- * generation of the output signal. This is achieved by
- * sending a low frequent (nearly inaudible) sawtooth with a
- * sufficient signal level.
- */
- set_attenuation(50);
- i2s_sawtooth (200, 5, LEFT_RIGHT);
- init_done = 1;
- }
-}
-
-static void i2s_init(void)
-{
- unsigned long i;
- struct mpc5xxx_psc *psc = (struct mpc5xxx_psc*)MPC5XXX_PSC2;;
- struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio*)MPC5XXX_GPIO;
-
- gpio->port_config |= 0x00000070; /* PSC2 ports as Codec with MCLK */
- psc->command = (PSC_RX_DISABLE | PSC_TX_DISABLE);
- psc->sicr = 0x22E00000; /* 16 bit data; I2S */
-
- *(vu_long *)(CFG_MBAR + 0x22C) = 0x805d; /* PSC2 CDM MCLK config; MCLK
- * 5.617 MHz */
- *(vu_long *)(CFG_MBAR + 0x214) |= 0x00000040; /* CDM clock enable
- * register */
- psc->ccr = 0x1F03; /* 16 bit data width; 5.617MHz MCLK */
- psc->ctur = 0x0F; /* 16 bit frame width */
-
- for(i=0;i<128;i++)
- {
- psc->psc_buffer_32 = 0; /* clear tx fifo */
- }
-}
-
-static int i2s_play_wave(unsigned long addr, unsigned long len)
-{
- unsigned long i;
- unsigned char *wave_file = (uchar *)addr + 44; /* quick'n dirty: skip
- * wav header*/
- unsigned char swapped[4];
- struct mpc5xxx_psc *psc = (struct mpc5xxx_psc*)MPC5XXX_PSC2;
-
- /*
- * play wave file in memory; bytes/words are be swapped
- */
- psc->command = (PSC_RX_ENABLE | PSC_TX_ENABLE);
-
- for(i = 0;i < (len / 4); i++) {
- swapped[3]=*wave_file++;
- swapped[2]=*wave_file++;
- swapped[1]=*wave_file++;
- swapped[0]=*wave_file++;
- psc->psc_buffer_32 = *((unsigned long*)swapped);
- while (psc->tfnum > 400) {
- if(ctrlc())
- return 0;
- }
- }
- while (psc->tfnum > 0); /* wait for fifo empty */
- udelay (100);
- psc->command = (PSC_RX_DISABLE | PSC_TX_DISABLE);
- return 0;
-}
-
-static int i2s_sawtooth(unsigned long duration, unsigned int freq,
- unsigned int channel)
-{
- long i,j;
- unsigned long data;
- struct mpc5xxx_psc *psc = (struct mpc5xxx_psc*)MPC5XXX_PSC2;
-
- psc->command = (PSC_RX_ENABLE | PSC_TX_ENABLE);
-
- /*
- * Generate sawtooth. Start with middle level up to highest level. Then
- * go to lowest level and back to middle level.
- */
- for(j = 0; j < ((duration * freq) / 1000); j++) {
- for(i = 0; i <= 0x7FFF; i += (0x7FFF/(44100/(freq*4)))) {
- data = (i & 0xFFFF);
- /* data format: right data left data) */
- if (channel == LEFT_RIGHT)
- data |= (data<<16);
- if (channel == RIGHT)
- data = (data<<16);
- psc->psc_buffer_32 = data;
- while (psc->tfnum > 400);
- }
- for(i = 0x7FFF; i >= -0x7FFF; i -= (0xFFFF/(44100/(freq*2)))) {
- data = (i & 0xFFFF);
- /* data format: right data left data) */
- if (channel == LEFT_RIGHT)
- data |= (data<<16);
- if (channel == RIGHT)
- data = (data<<16);
- psc->psc_buffer_32 = data;
- while (psc->tfnum > 400);
- }
- for(i = -0x7FFF; i <= 0; i += (0x7FFF/(44100/(freq*4)))) {
- data = (i & 0xFFFF);
- /* data format: right data left data) */
- if (channel == LEFT_RIGHT)
- data |= (data<<16);
- if (channel == RIGHT)
- data = (data<<16);
- psc->psc_buffer_32 = data;
- while (psc->tfnum > 400);
- }
- }
- while (psc->tfnum > 0); /* wait for fifo empty */
- udelay (100);
- psc->command = (PSC_RX_DISABLE | PSC_TX_DISABLE);
-
- return 0;
-}
-
-static int i2s_squarewave(unsigned long duration, unsigned int freq,
- unsigned int channel)
-{
- long i,j;
- unsigned long data;
- struct mpc5xxx_psc *psc = (struct mpc5xxx_psc*)MPC5XXX_PSC2;
-
- psc->command = (PSC_RX_ENABLE | PSC_TX_ENABLE);
-
- /*
- * Generate sqarewave. Start with high level, duty cycle 1:1.
- */
- for(j = 0; j < ((duration * freq) / 1000); j++) {
- for(i = 0; i < (44100/(freq*2)); i ++) {
- data = 0x7FFF;
- /* data format: right data left data) */
- if (channel == LEFT_RIGHT)
- data |= (data<<16);
- if (channel == RIGHT)
- data = (data<<16);
- psc->psc_buffer_32 = data;
- while (psc->tfnum > 400);
- }
- for(i = 0; i < (44100/(freq*2)); i ++) {
- data = 0x8000;
- /* data format: right data left data) */
- if (channel == LEFT_RIGHT)
- data |= (data<<16);
- if (channel == RIGHT)
- data = (data<<16);
- psc->psc_buffer_32 = data;
- while (psc->tfnum > 400);
- }
- }
- while (psc->tfnum > 0); /* wait for fifo empty */
- udelay (100);
- psc->command = (PSC_RX_DISABLE | PSC_TX_DISABLE);
-
- return 0;
-}
-
-static int cmd_sound(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- unsigned long reg, val, duration;
- char *tmp;
- unsigned int freq, channel;
- unsigned char volume;
- int rcode = 1;
-
-#ifdef CONFIG_STK52XX_REV100
- printf ("Revision 100 of STK52XX not supported!\n");
- return 1;
-#endif
- spi_init();
- i2s_init();
- amplifier_init();
-
- if ((tmp = getenv ("volume")) != NULL) {
- volume = simple_strtoul (tmp, NULL, 10);
- } else {
- volume = DEFAULT_VOL;
- }
- set_attenuation(volume);
-
- switch (argc) {
- case 0:
- case 1:
- printf ("Usage:\n%s\n", cmdtp->usage);
- return 1;
- case 2:
- if (strncmp(argv[1],"saw",3) == 0) {
- printf ("Play sawtooth\n");
- rcode = i2s_sawtooth (DEFAULT_DURATION, DEFAULT_FREQ,
- LEFT_RIGHT);
- return rcode;
- } else if (strncmp(argv[1],"squ",3) == 0) {
- printf ("Play squarewave\n");
- rcode = i2s_squarewave (DEFAULT_DURATION, DEFAULT_FREQ,
- LEFT_RIGHT);
- return rcode;
- }
-
- printf ("Usage:\n%s\n", cmdtp->usage);
- return 1;
- case 3:
- if (strncmp(argv[1],"saw",3) == 0) {
- duration = simple_strtoul(argv[2], NULL, 10);
- printf ("Play sawtooth\n");
- rcode = i2s_sawtooth (duration, DEFAULT_FREQ,
- LEFT_RIGHT);
- return rcode;
- } else if (strncmp(argv[1],"squ",3) == 0) {
- duration = simple_strtoul(argv[2], NULL, 10);
- printf ("Play squarewave\n");
- rcode = i2s_squarewave (duration, DEFAULT_FREQ,
- LEFT_RIGHT);
- return rcode;
- }
- printf ("Usage:\n%s\n", cmdtp->usage);
- return 1;
- case 4:
- if (strncmp(argv[1],"saw",3) == 0) {
- duration = simple_strtoul(argv[2], NULL, 10);
- freq = (unsigned int)simple_strtoul(argv[3], NULL, 10);
- printf ("Play sawtooth\n");
- rcode = i2s_sawtooth (duration, freq,
- LEFT_RIGHT);
- return rcode;
- } else if (strncmp(argv[1],"squ",3) == 0) {
- duration = simple_strtoul(argv[2], NULL, 10);
- freq = (unsigned int)simple_strtoul(argv[3], NULL, 10);
- printf ("Play squarewave\n");
- rcode = i2s_squarewave (duration, freq,
- LEFT_RIGHT);
- return rcode;
- } else if (strcmp(argv[1],"pcm1772") == 0) {
- reg = simple_strtoul(argv[2], NULL, 10);
- val = simple_strtoul(argv[3], NULL, 10);
- printf("Set PCM1772 %lu. %lu\n", reg, val);
- pcm1772_write_reg((uchar)reg, (uchar)val);
- return 0;
- }
- printf ("Usage:\n%s\n", cmdtp->usage);
- return 1;
- case 5:
- if (strncmp(argv[1],"saw",3) == 0) {
- duration = simple_strtoul(argv[2], NULL, 10);
- freq = (unsigned int)simple_strtoul(argv[3], NULL, 10);
- if (strncmp(argv[4],"l",1) == 0)
- channel = LEFT;
- else if (strncmp(argv[4],"r",1) == 0)
- channel = RIGHT;
- else
- channel = LEFT_RIGHT;
- printf ("Play squarewave\n");
- rcode = i2s_sawtooth (duration, freq,
- channel);
- return rcode;
- } else if (strncmp(argv[1],"squ",3) == 0) {
- duration = simple_strtoul(argv[2], NULL, 10);
- freq = (unsigned int)simple_strtoul(argv[3], NULL, 10);
- if (strncmp(argv[4],"l",1) == 0)
- channel = LEFT;
- else if (strncmp(argv[4],"r",1) == 0)
- channel = RIGHT;
- else
- channel = LEFT_RIGHT;
- printf ("Play squarewave\n");
- rcode = i2s_squarewave (duration, freq,
- channel);
- return rcode;
- }
- printf ("Usage:\n%s\n", cmdtp->usage);
- return 1;
- }
- printf ("Usage:\nsound cmd [arg1] [arg2] ...\n");
- return 1;
-}
-
-static int cmd_wav(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- unsigned long length, addr;
- unsigned char volume;
- int rcode = 1;
- char *tmp;
-
-#ifdef CONFIG_STK52XX_REV100
- printf ("Revision 100 of STK52XX not supported!\n");
- return 1;
-#endif
- spi_init();
- i2s_init();
- amplifier_init();
-
- switch (argc) {
-
- case 3:
- length = simple_strtoul(argv[2], NULL, 16);
- addr = simple_strtoul(argv[1], NULL, 16);
- break;
-
- case 2:
- if ((tmp = getenv ("filesize")) != NULL) {
- length = simple_strtoul (tmp, NULL, 16);
- } else {
- puts ("No filesize provided\n");
- return 1;
- }
- addr = simple_strtoul(argv[1], NULL, 16);
-
- case 1:
- if ((tmp = getenv ("filesize")) != NULL) {
- length = simple_strtoul (tmp, NULL, 16);
- } else {
- puts ("No filesize provided\n");
- return 1;
- }
- if ((tmp = getenv ("loadaddr")) != NULL) {
- addr = simple_strtoul (tmp, NULL, 16);
- } else {
- puts ("No loadaddr provided\n");
- return 1;
- }
- break;
-
- default:
- printf("Usage:\nwav <addr> <length[s]\n");
- return 1;
- break;
- }
-
- if ((tmp = getenv ("volume")) != NULL) {
- volume = simple_strtoul (tmp, NULL, 10);
- } else {
- volume = DEFAULT_VOL;
- }
- set_attenuation(volume);
-
- printf("Play wave file at %#p with length %#x\n", addr, length);
- rcode = i2s_play_wave(addr, length);
-
- return rcode;
-}
-
-static int cmd_beep(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- unsigned char volume;
- unsigned int channel;
- int rcode;
- char *tmp;
-
-#ifdef CONFIG_STK52XX_REV100
- printf ("Revision 100 of STK52XX not supported!\n");
- return 1;
-#endif
- spi_init();
- i2s_init();
- amplifier_init();
-
- switch (argc) {
- case 0:
- case 1:
- channel = LEFT_RIGHT;
- break;
- case 2:
- if (strncmp(argv[1],"l",1) == 0)
- channel = LEFT;
- else if (strncmp(argv[1],"r",1) == 0)
- channel = RIGHT;
- else
- channel = LEFT_RIGHT;
- break;
- default:
- printf ("Usage:\n%s\n", cmdtp->usage);
- return 1;
- }
-
- if ((tmp = getenv ("volume")) != NULL) {
- volume = simple_strtoul (tmp, NULL, 10);
- } else {
- volume = DEFAULT_VOL;
- }
- set_attenuation(volume);
-
- printf("Beep on ");
- if (channel == LEFT)
- printf ("left ");
- else if (channel == RIGHT)
- printf ("right ");
- else
- printf ("left and right ");
- printf ("channel\n");
-
- rcode = i2s_squarewave (DEFAULT_DURATION, DEFAULT_FREQ, channel);
-
- return rcode;
-}
-
-void led_init(void)
-{
- struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio *)MPC5XXX_GPIO;
- struct mpc5xxx_gpt_0_7 *gpt = (struct mpc5xxx_gpt_0_7 *)MPC5XXX_GPT;
-
- /* configure PSC3 for SPI and GPIO */
- gpio->port_config &= ~(0x00000F00);
- gpio->port_config |= 0x00000800;
-
- gpio->simple_gpioe &= ~(0x00000F00);
- gpio->simple_gpioe |= 0x00000F00;
-
- gpio->simple_ddr &= ~(0x00000F00);
- gpio->simple_ddr |= 0x00000F00;
-
- /* configure timer 4-7 for simple GPIO output */
- gpt->gpt4.emsr |= 0x00000024;
- gpt->gpt5.emsr |= 0x00000024;
- gpt->gpt6.emsr |= 0x00000024;
- gpt->gpt7.emsr |= 0x00000024;
-
-
- /* enable SM501 GPIO control (in both power modes) */
- *(vu_long *) (SM501_MMIO_BASE+SM501_POWER_MODE0_GATE) |=
- POWER_MODE_GATE_GPIO_PWM_I2C;
- *(vu_long *) (SM501_MMIO_BASE+SM501_POWER_MODE1_GATE) |=
- POWER_MODE_GATE_GPIO_PWM_I2C;
-
- /* configure SM501 gpio pins 24-27 as output */
- *(vu_long *) (SM501_MMIO_BASE+SM501_GPIO_CTRL_LOW) &= ~(0xF << 24);
- *(vu_long *) (SM501_MMIO_BASE+SM501_GPIO_DATA_DIR_LOW) |= (0xF << 24);
-
- /* configure SM501 gpio pins 48-51 as output */
- *(vu_long *) (SM501_MMIO_BASE+SM501_GPIO_DATA_DIR_HIGH) |= (0xF << 16);
-}
-
-/*
- * return 1 if led number unknown
- * return 0 else
- */
-int do_led(char *argv[])
-{
- struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio *)MPC5XXX_GPIO;
- struct mpc5xxx_gpt_0_7 *gpt = (struct mpc5xxx_gpt_0_7 *)MPC5XXX_GPT;
-
- switch (simple_strtoul(argv[2], NULL, 10)) {
-
- case 0:
- if (strcmp (argv[3], "on") == 0) {
- gpio->simple_dvo |= (1 << 8);
- } else {
- gpio->simple_dvo &= ~(1 << 8);
- }
- break;
-
- case 1:
- if (strcmp (argv[3], "on") == 0) {
- gpio->simple_dvo |= (1 << 9);
- } else {
- gpio->simple_dvo &= ~(1 << 9);
- }
- break;
-
- case 2:
- if (strcmp (argv[3], "on") == 0) {
- gpio->simple_dvo |= (1 << 10);
- } else {
- gpio->simple_dvo &= ~(1 << 10);
- }
- break;
-
- case 3:
- if (strcmp (argv[3], "on") == 0) {
- gpio->simple_dvo |= (1 << 11);
- } else {
- gpio->simple_dvo &= ~(1 << 11);
- }
- break;
-
- case 4:
- if (strcmp (argv[3], "on") == 0) {
- gpt->gpt4.emsr |= (1 << 4);
- } else {
- gpt->gpt4.emsr &= ~(1 << 4);
- }
- break;
-
- case 5:
- if (strcmp (argv[3], "on") == 0) {
- gpt->gpt5.emsr |= (1 << 4);
- } else {
- gpt->gpt5.emsr &= ~(1 << 4);
- }
- break;
-
- case 6:
- if (strcmp (argv[3], "on") == 0) {
- gpt->gpt6.emsr |= (1 << 4);
- } else {
- gpt->gpt6.emsr &= ~(1 << 4);
- }
- break;
-
- case 7:
- if (strcmp (argv[3], "on") == 0) {
- gpt->gpt7.emsr |= (1 << 4);
- } else {
- gpt->gpt7.emsr &= ~(1 << 4);
- }
- break;
-
- case 24:
- if (strcmp (argv[3], "on") == 0) {
- *(vu_long *) (SM501_MMIO_BASE+SM501_GPIO_DATA_LOW) |=
- (0x1 << 24);
- } else {
- *(vu_long *) (SM501_MMIO_BASE+SM501_GPIO_DATA_LOW) &=
- ~(0x1 << 24);
- }
- break;
-
- case 25:
- if (strcmp (argv[3], "on") == 0) {
- *(vu_long *) (SM501_MMIO_BASE+SM501_GPIO_DATA_LOW) |=
- (0x1 << 25);
- } else {
- *(vu_long *) (SM501_MMIO_BASE+SM501_GPIO_DATA_LOW) &=
- ~(0x1 << 25);
- }
- break;
-
- case 26:
- if (strcmp (argv[3], "on") == 0) {
- *(vu_long *) (SM501_MMIO_BASE+SM501_GPIO_DATA_LOW) |=
- (0x1 << 26);
- } else {
- *(vu_long *) (SM501_MMIO_BASE+SM501_GPIO_DATA_LOW) &=
- ~(0x1 << 26);
- }
- break;
-
- case 27:
- if (strcmp (argv[3], "on") == 0) {
- *(vu_long *) (SM501_MMIO_BASE+SM501_GPIO_DATA_LOW) |=
- (0x1 << 27);
- } else {
- *(vu_long *) (SM501_MMIO_BASE+SM501_GPIO_DATA_LOW) &=
- ~(0x1 << 27);
- }
- break;
-
- case 48:
- if (strcmp (argv[3], "on") == 0) {
- *(vu_long *) (SM501_MMIO_BASE+SM501_GPIO_DATA_HIGH) |=
- (0x1 << 16);
- } else {
- *(vu_long *) (SM501_MMIO_BASE+SM501_GPIO_DATA_HIGH) &=
- ~(0x1 << 16);
- }
- break;
-
- case 49:
- if (strcmp (argv[3], "on") == 0) {
- *(vu_long *) (SM501_MMIO_BASE+SM501_GPIO_DATA_HIGH) |=
- (0x1 << 17);
- } else {
- *(vu_long *) (SM501_MMIO_BASE+SM501_GPIO_DATA_HIGH) &=
- ~(0x1 << 17);
- }
- break;
-
- case 50:
- if (strcmp (argv[3], "on") == 0) {
- *(vu_long *) (SM501_MMIO_BASE+SM501_GPIO_DATA_HIGH) |=
- (0x1 << 18);
- } else {
- *(vu_long *) (SM501_MMIO_BASE+SM501_GPIO_DATA_HIGH) &=
- ~(0x1 << 18);
- }
- break;
-
- case 51:
- if (strcmp (argv[3], "on") == 0) {
- *(vu_long *) (SM501_MMIO_BASE+SM501_GPIO_DATA_HIGH) |=
- (0x1 << 19);
- } else {
- *(vu_long *) (SM501_MMIO_BASE+SM501_GPIO_DATA_HIGH) &=
- ~(0x1 << 19);
- }
- break;
-
- default:
- printf ("%s: invalid led number %s\n", __FUNCTION__, argv[2]);
- return 1;
- }
-
- return 0;
-}
-
-/*
- * return 1 on CAN initialization failure
- * return 0 if no failure
- */
-int can_init(void)
-{
- static int init_done = 0;
- int i;
- struct mpc5xxx_mscan *can1 =
- (struct mpc5xxx_mscan *)(CFG_MBAR + 0x0900);
- struct mpc5xxx_mscan *can2 =
- (struct mpc5xxx_mscan *)(CFG_MBAR + 0x0980);
-
- /* GPIO configuration of the CAN pins is done in TQM5200.h */
-
- if (!init_done) {
- /* init CAN 1 */
- can1->canctl1 |= 0x80; /* CAN enable */
- udelay(100);
-
- i = 0;
- can1->canctl0 |= 0x02; /* sleep mode */
- /* wait until sleep mode reached */
- while (!(can1->canctl1 & 0x02)) {
- udelay(10);
- i++;
- if (i == 10) {
- printf ("%s: CAN1 initialize error, "
- "can not enter sleep mode!\n",
- __FUNCTION__);
- return 1;
- }
- }
- i = 0;
- can1->canctl0 = 0x01; /* enter init mode */
- /* wait until init mode reached */
- while (!(can1->canctl1 & 0x01)) {
- udelay(10);
- i++;
- if (i == 10) {
- printf ("%s: CAN1 initialize error, "
- "can not enter init mode!\n",
- __FUNCTION__);
- return 1;
- }
- }
- can1->canctl1 = 0x80;
- can1->canctl1 |= 0x40;
- can1->canbtr0 = 0x0F;
- can1->canbtr1 = 0x7F;
- can1->canidac &= ~(0x30);
- can1->canidar1 = 0x00;
- can1->canidar3 = 0x00;
- can1->canidar5 = 0x00;
- can1->canidar7 = 0x00;
- can1->canidmr0 = 0xFF;
- can1->canidmr1 = 0xFF;
- can1->canidmr2 = 0xFF;
- can1->canidmr3 = 0xFF;
- can1->canidmr4 = 0xFF;
- can1->canidmr5 = 0xFF;
- can1->canidmr6 = 0xFF;
- can1->canidmr7 = 0xFF;
-
- i = 0;
- can1->canctl0 &= ~(0x01); /* leave init mode */
- can1->canctl0 &= ~(0x02);
- /* wait until init and sleep mode left */
- while ((can1->canctl1 & 0x01) || (can1->canctl1 & 0x02)) {
- udelay(10);
- i++;
- if (i == 10) {
- printf ("%s: CAN1 initialize error, "
- "can not leave init/sleep mode!\n",
- __FUNCTION__);
- return 1;
- }
- }
-
- /* init CAN 2 */
- can2->canctl1 |= 0x80; /* CAN enable */
- udelay(100);
-
- i = 0;
- can2->canctl0 |= 0x02; /* sleep mode */
- /* wait until sleep mode reached */
- while (!(can2->canctl1 & 0x02)) {
- udelay(10);
- i++;
- if (i == 10) {
- printf ("%s: CAN2 initialize error, "
- "can not enter sleep mode!\n",
- __FUNCTION__);
- return 1;
- }
- }
- i = 0;
- can2->canctl0 = 0x01; /* enter init mode */
- /* wait until init mode reached */
- while (!(can2->canctl1 & 0x01)) {
- udelay(10);
- i++;
- if (i == 10) {
- printf ("%s: CAN2 initialize error, "
- "can not enter init mode!\n",
- __FUNCTION__);
- return 1;
- }
- }
- can2->canctl1 = 0x80;
- can2->canctl1 |= 0x40;
- can2->canbtr0 = 0x0F;
- can2->canbtr1 = 0x7F;
- can2->canidac &= ~(0x30);
- can2->canidar1 = 0x00;
- can2->canidar3 = 0x00;
- can2->canidar5 = 0x00;
- can2->canidar7 = 0x00;
- can2->canidmr0 = 0xFF;
- can2->canidmr1 = 0xFF;
- can2->canidmr2 = 0xFF;
- can2->canidmr3 = 0xFF;
- can2->canidmr4 = 0xFF;
- can2->canidmr5 = 0xFF;
- can2->canidmr6 = 0xFF;
- can2->canidmr7 = 0xFF;
- can2->canctl0 &= ~(0x01); /* leave init mode */
- can2->canctl0 &= ~(0x02);
-
- i = 0;
- /* wait until init mode left */
- while ((can2->canctl1 & 0x01) || (can2->canctl1 & 0x02)) {
- udelay(10);
- i++;
- if (i == 10) {
- printf ("%s: CAN2 initialize error, "
- "can not leave init/sleep mode!\n",
- __FUNCTION__);
- return 1;
- }
- }
- init_done = 1;
- }
- return 0;
-}
-
-/*
- * return 1 on CAN failure
- * return 0 if no failure
- */
-int do_can(char *argv[])
-{
- int i;
- struct mpc5xxx_mscan *can1 =
- (struct mpc5xxx_mscan *)(CFG_MBAR + 0x0900);
- struct mpc5xxx_mscan *can2 =
- (struct mpc5xxx_mscan *)(CFG_MBAR + 0x0980);
-
- /* send a message on CAN1 */
- can1->cantbsel = 0x01;
- can1->cantxfg.idr[0] = 0x55;
- can1->cantxfg.idr[1] = 0x00;
- can1->cantxfg.idr[1] &= ~0x8;
- can1->cantxfg.idr[1] &= ~0x10;
- can1->cantxfg.dsr[0] = 0xCC;
- can1->cantxfg.dlr = 1;
- can1->cantxfg.tbpr = 0;
- can1->cantflg = 0x01;
-
- i = 0;
- while ((can1->cantflg & 0x01) == 0) {
- i++;
- if (i == 10) {
- printf ("%s: CAN1 send timeout, "
- "can not send message!\n",
- __FUNCTION__);
- return 1;
- }
- udelay(1000);
- }
- udelay(1000);
-
- i = 0;
- while (!(can2->canrflg & 0x01)) {
- i++;
- if (i == 10) {
- printf ("%s: CAN2 receive timeout, "
- "no message received!\n",
- __FUNCTION__);
- return 1;
- }
- udelay(1000);
- }
-
- if (can2->canrxfg.dsr[0] != 0xCC) {
- printf ("%s: CAN2 receive error, "
- "data mismatch!\n",
- __FUNCTION__);
- return 1;
- }
-
- /* send a message on CAN2 */
- can2->cantbsel = 0x01;
- can2->cantxfg.idr[0] = 0x55;
- can2->cantxfg.idr[1] = 0x00;
- can2->cantxfg.idr[1] &= ~0x8;
- can2->cantxfg.idr[1] &= ~0x10;
- can2->cantxfg.dsr[0] = 0xCC;
- can2->cantxfg.dlr = 1;
- can2->cantxfg.tbpr = 0;
- can2->cantflg = 0x01;
-
- i = 0;
- while ((can2->cantflg & 0x01) == 0) {
- i++;
- if (i == 10) {
- printf ("%s: CAN2 send error, "
- "can not send message!\n",
- __FUNCTION__);
- return 1;
- }
- udelay(1000);
- }
- udelay(1000);
-
- i = 0;
- while (!(can1->canrflg & 0x01)) {
- i++;
- if (i == 10) {
- printf ("%s: CAN1 receive timeout, "
- "no message received!\n",
- __FUNCTION__);
- return 1;
- }
- udelay(1000);
- }
-
- if (can1->canrxfg.dsr[0] != 0xCC) {
- printf ("%s: CAN1 receive error 0x%02x\n",
- __FUNCTION__, (can1->canrxfg.dsr[0]));
- return 1;
- }
-
- return 0;
-}
-
-/*
- * return 1 if rs232 port unknown
- * return 2 on txd/rxd failure (only rs232 2)
- * return 3 on rts/cts failure
- * return 0 if no failure
- */
-int do_rs232(char *argv[])
-{
- int error_status = 0;
- struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio *)MPC5XXX_GPIO;
- struct mpc5xxx_psc *psc1 = (struct mpc5xxx_psc *)MPC5XXX_PSC1;
-
- switch (simple_strtoul(argv[2], NULL, 10)) {
-
- case 1:
- /* check RTS <-> CTS loop */
- /* set rts to 0 */
- psc1->op1 |= 0x01;
-
- /* wait some time before requesting status */
- udelay(10);
-
- /* check status at cts */
- if ((psc1->ip & 0x01) != 0) {
- error_status = 3;
- printf ("%s: failure at rs232_1, cts status is %d "
- "(should be 0)\n",
- __FUNCTION__, (psc1->ip & 0x01));
- }
-
- /* set rts to 1 */
- psc1->op0 |= 0x01;
-
- /* wait some time before requesting status */
- udelay(10);
-
- /* check status at cts */
- if ((psc1->ip & 0x01) != 1) {
- error_status = 3;
- printf ("%s: failure at rs232_1, cts status is %d "
- "(should be 1)\n",
- __FUNCTION__, (psc1->ip & 0x01));
- }
-
- break;
-
- case 2:
- /* set PSC3_0, PSC3_2 as output and PSC3_1, PSC3_3 as input */
- gpio->simple_ddr &= ~(0x00000F00);
- gpio->simple_ddr |= 0x00000500;
-
- /* check TXD <-> RXD loop */
- /* set TXD to 1 */
- gpio->simple_dvo |= (1 << 8);
-
- /* wait some time before requesting status */
- udelay(10);
-
- if ((gpio->simple_ival & 0x00000200) != 0x00000200) {
- error_status = 2;
- printf ("%s: failure at rs232_2, rxd status is %d "
- "(should be 1)\n",
- __FUNCTION__,
- (gpio->simple_ival & 0x00000200) >> 9);
- }
-
- /* set TXD to 0 */
- gpio->simple_dvo &= ~(1 << 8);
-
- /* wait some time before requesting status */
- udelay(10);
-
- if ((gpio->simple_ival & 0x00000200) != 0x00000000) {
- error_status = 2;
- printf ("%s: failure at rs232_2, rxd status is %d "
- "(should be 0)\n",
- __FUNCTION__,
- (gpio->simple_ival & 0x00000200) >> 9);
- }
-
- /* check RTS <-> CTS loop */
- /* set RTS to 1 */
- gpio->simple_dvo |= (1 << 10);
-
- /* wait some time before requesting status */
- udelay(10);
-
- if ((gpio->simple_ival & 0x00000800) != 0x00000800) {
- error_status = 3;
- printf ("%s: failure at rs232_2, cts status is %d "
- "(should be 1)\n",
- __FUNCTION__,
- (gpio->simple_ival & 0x00000800) >> 11);
- }
-
- /* set RTS to 0 */
- gpio->simple_dvo &= ~(1 << 10);
-
- /* wait some time before requesting status */
- udelay(10);
-
- if ((gpio->simple_ival & 0x00000800) != 0x00000000) {
- error_status = 3;
- printf ("%s: failure at rs232_2, cts status is %d "
- "(should be 0)\n",
- __FUNCTION__,
- (gpio->simple_ival & 0x00000800) >> 11);
- }
-
- /* set PSC3_0, PSC3_1, PSC3_2 and PSC3_3 as output */
- gpio->simple_ddr &= ~(0x00000F00);
- gpio->simple_ddr |= 0x00000F00;
- break;
-
- default:
- printf ("%s: invalid rs232 number %s\n", __FUNCTION__, argv[2]);
- error_status = 1;
- break;
- }
-
- return error_status;
-}
-
-static void sm501_backlight (unsigned int state)
-{
- if (state == BL_ON) {
- *(vu_long *)(SM501_MMIO_BASE+SM501_PANEL_DISPLAY_CONTROL) |=
- (1 << 26) | (1 << 27);
- } else if (state == BL_OFF)
- *(vu_long *)(SM501_MMIO_BASE+SM501_PANEL_DISPLAY_CONTROL) &=
- ~((1 << 26) | (1 << 27));
-}
-
-int cmd_fkt(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- int rcode;
-
-#ifdef CONFIG_STK52XX_REV100
- printf ("Revision 100 of STK52XX not supported!\n");
- return 1;
-#endif
- led_init();
- can_init();
-
- switch (argc) {
-
- case 0:
- case 1:
- break;
-
- case 2:
- if (strncmp (argv[1], "can", 3) == 0) {
- rcode = do_can (argv);
- if (rcode == 0)
- printf ("OK\n");
- else
- printf ("Error\n");
- return rcode;
- }
- break;
-
- case 3:
- if (strncmp (argv[1], "rs232", 3) == 0) {
- rcode = do_rs232 (argv);
- if (rcode == 0)
- printf ("OK\n");
- else
- printf ("Error\n");
- return rcode;
- } else if (strncmp (argv[1], "backlight", 4) == 0) {
- if (strncmp (argv[2], "on", 2) == 0) {
- sm501_backlight (BL_ON);
- return 0;
- }
- else if (strncmp (argv[2], "off", 3) == 0) {
- sm501_backlight (BL_OFF);
- return 0;
- }
- }
- break;
-
- case 4:
- if (strcmp (argv[1], "led") == 0) {
- return (do_led (argv));
- }
- break;
-
- default:
- break;
- }
-
- printf ("Usage:\nfkt cmd [arg1] [arg2] ...\n");
- return 1;
-}
-
-
-U_BOOT_CMD(
- sound , 5, 1, cmd_sound,
- "sound - Sound sub-system\n",
- "saw [duration] [freq] [channel]\n"
- " - generate sawtooth for 'duration' ms with frequency 'freq'\n"
- " on left \"l\" or right \"r\" channel\n"
- "sound square [duration] [freq] [channel]\n"
- " - generate squarewave for 'duration' ms with frequency 'freq'\n"
- " on left \"l\" or right \"r\" channel\n"
- "pcm1772 reg val\n"
-);
-
-U_BOOT_CMD(
- wav , 3, 1, cmd_wav,
- "wav - play wav file\n",
- "[addr] [bytes]\n"
- " - play wav file at address 'addr' with length 'bytes'\n"
-);
-
-U_BOOT_CMD(
- beep , 2, 1, cmd_beep,
- "beep - play short beep\n",
- "[channel]\n"
- " - play short beep on \"l\"eft or \"r\"ight channel\n"
-);
-
-U_BOOT_CMD(
- fkt , 4, 1, cmd_fkt,
- "fkt - Function test routines\n",
- "led number on/off\n"
- " - 'number's like printed on SKT52XX board\n"
- "fkt can\n"
- " - loopback plug for X83 required\n"
- "fkt rs232 number\n"
- " - loopback plug(s) for X2 required\n"
- "fkt backlight on/off\n"
- " - switch backlight on or off\n"
-);
-#endif /* CONFIG_STK52XX */
-#endif /* CFG_CMD_BSP */
diff --git a/board/tqm5200/config.mk b/board/tqm5200/config.mk
deleted file mode 100644
index 585a99a8c7..0000000000
--- a/board/tqm5200/config.mk
+++ /dev/null
@@ -1,41 +0,0 @@
-#
-# (C) Copyright 2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# TQM5200 board:
-#
-# Valid values for TEXT_BASE are:
-#
-# 0xFC000000 boot low (standard configuration with room for max 64 MByte
-# Flash ROM)
-# 0x00100000 boot from RAM (for testing only)
-#
-
-ifndef TEXT_BASE
-## Standard: boot low
-TEXT_BASE = 0xFC000000
-## For testing: boot from RAM
-# TEXT_BASE = 0x00100000
-endif
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
diff --git a/board/tqm5200/flash.c b/board/tqm5200/flash.c
deleted file mode 100644
index af4d78a956..0000000000
--- a/board/tqm5200/flash.c
+++ /dev/null
@@ -1,497 +0,0 @@
-/*
- * (C) Copyright 2003-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2004
- * Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/*
- * CPU to flash interface is 32-bit, so make declaration accordingly
- */
-typedef unsigned long FLASH_PORT_WIDTH;
-typedef volatile unsigned long FLASH_PORT_WIDTHV;
-
-#define FPW FLASH_PORT_WIDTH
-#define FPWV FLASH_PORT_WIDTHV
-
-#define FLASH_CYCLE1 0x0555
-#define FLASH_CYCLE2 0x02aa
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size(FPWV *addr, flash_info_t *info);
-static void flash_reset(flash_info_t *info);
-static int write_word_amd(flash_info_t *info, FPWV *dest, FPW data);
-static flash_info_t *flash_get_info(ulong base);
-
-/*-----------------------------------------------------------------------
- * flash_init()
- *
- * sets up flash_info and returns size of FLASH (bytes)
- */
-unsigned long flash_init (void)
-{
- unsigned long size = 0;
- extern void flash_preinit(void);
- ulong flashbase = CFG_FLASH_BASE;
-
- flash_preinit();
-
- /* Init: no FLASHes known */
- memset(&flash_info[0], 0, sizeof(flash_info_t));
-
- flash_info[0].size =
- flash_get_size((FPW *)flashbase, &flash_info[0]);
-
- size = flash_info[0].size;
-
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
- /* monitor protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+monitor_flash_len-1,
- flash_get_info(CFG_MONITOR_BASE));
-#endif
-
-#ifdef CFG_ENV_IS_IN_FLASH
- /* ENV protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR+CFG_ENV_SIZE-1,
- flash_get_info(CFG_ENV_ADDR));
-#endif
-
- return size ? size : 1;
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_reset(flash_info_t *info)
-{
- FPWV *base = (FPWV *)(info->start[0]);
-
- /* Put FLASH back in read mode */
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL)
- *base = (FPW)0x00FF00FF; /* Intel Read Mode */
- else if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD)
- *base = (FPW)0x00F000F0; /* AMD Read Mode */
-}
-
-/*-----------------------------------------------------------------------
- */
-
-static flash_info_t *flash_get_info(ulong base)
-{
- int i;
- flash_info_t * info;
-
- for (i = 0; i < CFG_MAX_FLASH_BANKS; i ++) {
- info = & flash_info[i];
- if (info->size && info->start[0] <= base &&
- base <= info->start[0] + info->size - 1)
- break;
- }
-
- return i == CFG_MAX_FLASH_BANKS ? 0 : info;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-void flash_print_info (flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD: printf ("AMD "); break;
- case FLASH_MAN_BM: printf ("BRIGHT MICRO "); break;
- case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
- case FLASH_MAN_SST: printf ("SST "); break;
- case FLASH_MAN_STM: printf ("STM "); break;
- case FLASH_MAN_INTEL: printf ("INTEL "); break;
- default: printf ("Unknown Vendor "); break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AMLV128U:
- printf ("AM29LV128ML (128Mbit, uniform sector size)\n");
- break;
- case FLASH_AM160B:
- printf ("AM29LV160B (16 Mbit, bottom boot sect)\n");
- break;
- default:
- printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20,
- info->sector_count);
-
- printf (" Sector Start Addresses:");
-
- for (i=0; i<info->sector_count; ++i) {
- if ((i % 5) == 0) {
- printf ("\n ");
- }
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " ");
- }
- printf ("\n");
- return;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-
-ulong flash_get_size (FPWV *addr, flash_info_t *info)
-{
- int i;
- ulong base = (ulong)addr;
-
- /* Write auto select command: read Manufacturer ID */
- /* Write auto select command sequence and test FLASH answer */
- addr[FLASH_CYCLE1] = (FPW)0x00AA00AA; /* for AMD, Intel ignores this */
- addr[FLASH_CYCLE2] = (FPW)0x00550055; /* for AMD, Intel ignores this */
- addr[FLASH_CYCLE1] = (FPW)0x00900090; /* selects Intel or AMD */
-
- /* The manufacturer codes are only 1 byte, so just use 1 byte.
- * This works for any bus width and any FLASH device width.
- */
- udelay(100);
- switch (addr[0] & 0xff) {
-
- case (uchar)AMD_MANUFACT:
- debug ("Manufacturer: AMD (Spansion)\n");
- info->flash_id = FLASH_MAN_AMD;
- break;
-
- case (uchar)INTEL_MANUFACT:
- debug ("Manufacturer: Intel (not supported yet)\n");
- info->flash_id = FLASH_MAN_INTEL;
- break;
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- break;
- }
-
- /* Check 16 bits or 32 bits of ID so work on 32 or 16 bit bus. */
- if (info->flash_id != FLASH_UNKNOWN) switch ((FPW)addr[1]) {
-
- case (FPW)AMD_ID_LV160B:
- debug ("Chip: AM29LV160MB\n");
- info->flash_id += FLASH_AM160B;
- info->sector_count = 35;
- info->size = 0x00400000;
- /*
- * The first 4 sectors are 16 kB, 8 kB, 8 kB and 32 kB, all
- * the other ones are 64 kB
- */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00008000;
- info->start[2] = base + 0x0000C000;
- info->start[3] = base + 0x00010000;
- for( i = 4; i < info->sector_count; i++ )
- info->start[i] =
- base + (i * 2 * (64 << 10)) - 0x00060000;
- break; /* => 4 MB */
-
- case AMD_ID_MIRROR:
- debug ("Mirror Bit flash: addr[14] = %08lX addr[15] = %08lX\n",
- addr[14], addr[15]);
-
- switch(addr[14]) {
- case AMD_ID_LV128U_2:
- if (addr[15] != AMD_ID_LV128U_3) {
- debug ("Chip: AM29LVxxxM -> unknown\n");
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- } else {
- debug ("Chip: AM29LV128M\n");
- info->flash_id += FLASH_AMLV128U;
- info->sector_count = 256;
- info->size = 0x02000000;
- for (i = 0; i < info->sector_count; i++) {
- info->start[i] = base;
- base += 0x20000;
- }
- }
- break; /* => 32 MB */
- default:
- debug ("Chip: *** unknown ***\n");
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- break;
- }
- break;
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- }
-
- /* Put FLASH back in read mode */
- flash_reset(info);
-
- return (info->size);
-}
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- vu_long *addr = (vu_long*)(info->start[0]);
- int flag, prot, sect, l_sect;
- ulong start, now, last;
-
- debug ("flash_erase: first: %d last: %d\n", s_first, s_last);
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- if ((info->flash_id == FLASH_UNKNOWN) ||
- (info->flash_id > FLASH_AMD_COMP)) {
- printf ("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- l_sect = -1;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[0x0555] = 0x00AA00AA;
- addr[0x02AA] = 0x00550055;
- addr[0x0555] = 0x00800080;
- addr[0x0555] = 0x00AA00AA;
- addr[0x02AA] = 0x00550055;
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr = (vu_long*)(info->start[sect]);
- addr[0] = 0x00300030;
- l_sect = sect;
- }
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- /*
- * We wait for the last triggered sector
- */
- if (l_sect < 0)
- goto DONE;
-
- start = get_timer (0);
- last = start;
- addr = (vu_long*)(info->start[l_sect]);
- while ((addr[0] & 0x00800080) != 0x00800080) {
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- return 1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- }
-
-DONE:
- /* reset to read mode */
- addr = (volatile unsigned long *)info->start[0];
- addr[0] = 0x00F000F0; /* reset bank */
-
- printf (" done\n");
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int i, l, rc;
-
- /*
- * Get lower word aligned address. Assumes 32 bit flash bus width.
- */
- wp = (addr & ~3);
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
- for (; i<4 && cnt>0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- if ((rc = write_word_amd(info, (FPW *)wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = 0;
- for (i=0; i<4; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_word_amd(info, (FPW *)wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- return (write_word_amd(info, (FPW *)wp, data));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash for AMD FLASH
- * A word is 16 or 32 bits, whichever the bus width of the flash bank
- * (not an individual chip) is.
- *
- * returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word_amd (flash_info_t *info, FPWV *dest, FPW data)
-{
- ulong start;
- int flag;
- FPWV *base; /* first address in flash bank */
-
- /* Check if Flash is (sufficiently) erased */
- if ((*dest & data) != data) {
- return (2);
- }
-
- base = (FPWV *)(info->start[0]);
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- base[FLASH_CYCLE1] = (FPW)0x00AA00AA; /* unlock */
- base[FLASH_CYCLE2] = (FPW)0x00550055; /* unlock */
- base[FLASH_CYCLE1] = (FPW)0x00A000A0; /* selects program mode */
-
- *dest = data; /* start programming the data */
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- start = get_timer (0);
-
- /* data polling for D7 */
- while ((*dest & (FPW)0x00800080) != (data & (FPW)0x00800080)) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- *dest = (FPW)0x00F000F0; /* reset bank */
- return (1);
- }
- }
- return (0);
-}
diff --git a/board/tqm5200/mt48lc16m16a2-75.h b/board/tqm5200/mt48lc16m16a2-75.h
deleted file mode 100644
index 3f1e1691bb..0000000000
--- a/board/tqm5200/mt48lc16m16a2-75.h
+++ /dev/null
@@ -1,47 +0,0 @@
-/*
- * (C) Copyright 2004
- * Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#define SDRAM_DDR 0 /* is SDR */
-
-#if defined(CONFIG_MPC5200)
-/* Settings for XLB = 132 MHz */
-#define SDRAM_MODE 0x00CD0000
-/* #define SDRAM_MODE 0x008D0000 */ /* CAS latency 2 */
-#define SDRAM_CONTROL 0x504F0000
-#define SDRAM_CONFIG1 0xD2322800
-/* #define SDRAM_CONFIG1 0xD2222800 */ /* CAS latency 2 */
-/*#define SDRAM_CONFIG1 0xD7322800 */ /* SDRAM controller bug workaround */
-#define SDRAM_CONFIG2 0x8AD70000
-/*#define SDRAM_CONFIG2 0xDDD70000 */ /* SDRAM controller bug workaround */
-
-#elif defined(CONFIG_MGT5100)
-/* Settings for XLB = 66 MHz */
-#define SDRAM_MODE 0x008D0000
-#define SDRAM_CONTROL 0x504F0000
-#define SDRAM_CONFIG1 0xC2222600
-#define SDRAM_CONFIG2 0x88B70004
-#define SDRAM_ADDRSEL 0x02000000
-
-#else
-#error Neither CONFIG_MPC5200 or CONFIG_MGT5100 defined
-#endif
diff --git a/board/tqm5200/tqm5200.c b/board/tqm5200/tqm5200.c
deleted file mode 100644
index 6aad920eda..0000000000
--- a/board/tqm5200/tqm5200.c
+++ /dev/null
@@ -1,673 +0,0 @@
-/*
- * (C) Copyright 2003-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2004
- * Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com.
- *
- * (C) Copyright 2004-2005
- * Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc5xxx.h>
-#include <pci.h>
-
-#ifdef CONFIG_VIDEO_SM501
-#include <sm501.h>
-#endif
-
-#if defined(CONFIG_MPC5200_DDR)
-#include "mt46v16m16-75.h"
-#else
-#include "mt48lc16m16a2-75.h"
-#endif
-
-#ifdef CONFIG_PS2MULT
-void ps2mult_early_init(void);
-#endif
-
-#ifndef CFG_RAMBOOT
-static void sdram_start (int hi_addr)
-{
- long hi_addr_bit = hi_addr ? 0x01000000 : 0;
-
- /* unlock mode register */
- *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000000 |
- hi_addr_bit;
- __asm__ volatile ("sync");
-
- /* precharge all banks */
- *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000002 |
- hi_addr_bit;
- __asm__ volatile ("sync");
-
-#if SDRAM_DDR
- /* set mode register: extended mode */
- *(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_EMODE;
- __asm__ volatile ("sync");
-
- /* set mode register: reset DLL */
- *(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_MODE | 0x04000000;
- __asm__ volatile ("sync");
-#endif
-
- /* precharge all banks */
- *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000002 |
- hi_addr_bit;
- __asm__ volatile ("sync");
-
- /* auto refresh */
- *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000004 |
- hi_addr_bit;
- __asm__ volatile ("sync");
-
- /* set mode register */
- *(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_MODE;
- __asm__ volatile ("sync");
-
- /* normal operation */
- *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | hi_addr_bit;
- __asm__ volatile ("sync");
-}
-#endif
-
-/*
- * ATTENTION: Although partially referenced initdram does NOT make real use
- * use of CFG_SDRAM_BASE. The code does not work if CFG_SDRAM_BASE
- * is something else than 0x00000000.
- */
-
-#if defined(CONFIG_MPC5200)
-long int initdram (int board_type)
-{
- ulong dramsize = 0;
- ulong dramsize2 = 0;
-#ifndef CFG_RAMBOOT
- ulong test1, test2;
-
- /* setup SDRAM chip selects */
- *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x0000001c; /* 512MB at 0x0 */
- *(vu_long *)MPC5XXX_SDRAM_CS1CFG = 0x40000000; /* disabled */
- __asm__ volatile ("sync");
-
- /* setup config registers */
- *(vu_long *)MPC5XXX_SDRAM_CONFIG1 = SDRAM_CONFIG1;
- *(vu_long *)MPC5XXX_SDRAM_CONFIG2 = SDRAM_CONFIG2;
- __asm__ volatile ("sync");
-
-#if SDRAM_DDR
- /* set tap delay */
- *(vu_long *)MPC5XXX_CDM_PORCFG = SDRAM_TAPDELAY;
- __asm__ volatile ("sync");
-#endif
-
- /* find RAM size using SDRAM CS0 only */
- sdram_start(0);
- test1 = get_ram_size((long *)CFG_SDRAM_BASE, 0x20000000);
- sdram_start(1);
- test2 = get_ram_size((long *)CFG_SDRAM_BASE, 0x20000000);
- if (test1 > test2) {
- sdram_start(0);
- dramsize = test1;
- } else {
- dramsize = test2;
- }
-
- /* memory smaller than 1MB is impossible */
- if (dramsize < (1 << 20)) {
- dramsize = 0;
- }
-
- /* set SDRAM CS0 size according to the amount of RAM found */
- if (dramsize > 0) {
- *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x13 +
- __builtin_ffs(dramsize >> 20) - 1;
- } else {
- *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0; /* disabled */
- }
-
- /* let SDRAM CS1 start right after CS0 */
- *(vu_long *)MPC5XXX_SDRAM_CS1CFG = dramsize + 0x0000001c; /* 512MB */
-
- /* find RAM size using SDRAM CS1 only */
- sdram_start(0);
- test1 = get_ram_size((long *)(CFG_SDRAM_BASE + dramsize), 0x20000000);
- sdram_start(1);
- test2 = get_ram_size((long *)(CFG_SDRAM_BASE + dramsize), 0x20000000);
- if (test1 > test2) {
- sdram_start(0);
- dramsize2 = test1;
- } else {
- dramsize2 = test2;
- }
-
- /* memory smaller than 1MB is impossible */
- if (dramsize2 < (1 << 20)) {
- dramsize2 = 0;
- }
-
- /* set SDRAM CS1 size according to the amount of RAM found */
- if (dramsize2 > 0) {
- *(vu_long *)MPC5XXX_SDRAM_CS1CFG = dramsize
- | (0x13 + __builtin_ffs(dramsize2 >> 20) - 1);
- } else {
- *(vu_long *)MPC5XXX_SDRAM_CS1CFG = dramsize; /* disabled */
- }
-
-#else /* CFG_RAMBOOT */
-
- /* retrieve size of memory connected to SDRAM CS0 */
- dramsize = *(vu_long *)MPC5XXX_SDRAM_CS0CFG & 0xFF;
- if (dramsize >= 0x13) {
- dramsize = (1 << (dramsize - 0x13)) << 20;
- } else {
- dramsize = 0;
- }
-
- /* retrieve size of memory connected to SDRAM CS1 */
- dramsize2 = *(vu_long *)MPC5XXX_SDRAM_CS1CFG & 0xFF;
- if (dramsize2 >= 0x13) {
- dramsize2 = (1 << (dramsize2 - 0x13)) << 20;
- } else {
- dramsize2 = 0;
- }
-
-#endif /* CFG_RAMBOOT */
-
-/* return dramsize + dramsize2; */
- return dramsize;
-}
-
-#elif defined(CONFIG_MGT5100)
-
-long int initdram (int board_type)
-{
- ulong dramsize = 0;
-#ifndef CFG_RAMBOOT
- ulong test1, test2;
-
- /* setup and enable SDRAM chip selects */
- *(vu_long *)MPC5XXX_SDRAM_START = 0x00000000;
- *(vu_long *)MPC5XXX_SDRAM_STOP = 0x0000ffff;/* 2G */
- *(vu_long *)MPC5XXX_ADDECR |= (1 << 22); /* Enable SDRAM */
- __asm__ volatile ("sync");
-
- /* setup config registers */
- *(vu_long *)MPC5XXX_SDRAM_CONFIG1 = SDRAM_CONFIG1;
- *(vu_long *)MPC5XXX_SDRAM_CONFIG2 = SDRAM_CONFIG2;
-
- /* address select register */
- *(vu_long *)MPC5XXX_SDRAM_XLBSEL = SDRAM_ADDRSEL;
- __asm__ volatile ("sync");
-
- /* find RAM size */
- sdram_start(0);
- test1 = get_ram_size((ulong *)CFG_SDRAM_BASE, 0x80000000);
- sdram_start(1);
- test2 = get_ram_size((ulong *)CFG_SDRAM_BASE, 0x80000000);
- if (test1 > test2) {
- sdram_start(0);
- dramsize = test1;
- } else {
- dramsize = test2;
- }
-
- /* set SDRAM end address according to size */
- *(vu_long *)MPC5XXX_SDRAM_STOP = ((dramsize - 1) >> 15);
-
-#else /* CFG_RAMBOOT */
-
- /* Retrieve amount of SDRAM available */
- dramsize = ((*(vu_long *)MPC5XXX_SDRAM_STOP + 1) << 15);
-
-#endif /* CFG_RAMBOOT */
-
- return dramsize;
-}
-
-#else
-#error Neither CONFIG_MPC5200 or CONFIG_MGT5100 defined
-#endif
-
-int checkboard (void)
-{
-#if defined (CONFIG_AEVFIFO)
- puts ("Board: AEVFIFO\n");
- return 0;
-#endif
-#if defined (CONFIG_TQM5200_AA)
- puts ("Board: TQM5200-AA (TQ-Components GmbH)\n");
-#elif defined (CONFIG_TQM5200_AB)
- puts ("Board: TQM5200-AB (TQ-Components GmbH)\n");
-#elif defined (CONFIG_TQM5200_AC)
- puts ("Board: TQM5200-AC (TQ-Components GmbH)\n");
-#elif defined (CONFIG_TQM5200)
- puts ("Board: TQM5200 (TQ-Components GmbH)\n");
-#endif
-#if defined (CONFIG_STK52XX)
- puts (" on a STK52XX baseboard\n");
-#endif
-
- return 0;
-}
-
-void flash_preinit(void)
-{
- /*
- * Now, when we are in RAM, enable flash write
- * access for detection process.
- * Note that CS_BOOT cannot be cleared when
- * executing in flash.
- */
-#if defined(CONFIG_MGT5100)
- *(vu_long *)MPC5XXX_ADDECR &= ~(1 << 25); /* disable CS_BOOT */
- *(vu_long *)MPC5XXX_ADDECR |= (1 << 16); /* enable CS0 */
-#endif
- *(vu_long *)MPC5XXX_BOOTCS_CFG &= ~0x1; /* clear RO */
-}
-
-
-#ifdef CONFIG_PCI
-static struct pci_controller hose;
-
-extern void pci_mpc5xxx_init(struct pci_controller *);
-
-void pci_init_board(void)
-{
- pci_mpc5xxx_init(&hose);
-}
-#endif
-
-#if defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET)
-
-#if defined (CONFIG_MINIFAP)
-#define SM501_POWER_MODE0_GATE 0x00000040UL
-#define SM501_POWER_MODE1_GATE 0x00000048UL
-#define POWER_MODE_GATE_GPIO_PWM_I2C 0x00000040UL
-#define SM501_GPIO_DATA_DIR_HIGH 0x0001000CUL
-#define SM501_GPIO_DATA_HIGH 0x00010004UL
-#define SM501_GPIO_51 0x00080000UL
-#else
-#define GPIO_PSC1_4 0x01000000UL
-#endif
-
-void init_ide_reset (void)
-{
- debug ("init_ide_reset\n");
-
-#if defined (CONFIG_MINIFAP)
- /* Configure GPIO_51 of the SM501 grafic controller as ATA reset */
-
- /* enable GPIO control (in both power modes) */
- *(vu_long *) (SM501_MMIO_BASE+SM501_POWER_MODE0_GATE) |=
- POWER_MODE_GATE_GPIO_PWM_I2C;
- *(vu_long *) (SM501_MMIO_BASE+SM501_POWER_MODE1_GATE) |=
- POWER_MODE_GATE_GPIO_PWM_I2C;
- /* configure GPIO51 as output */
- *(vu_long *) (SM501_MMIO_BASE+SM501_GPIO_DATA_DIR_HIGH) |=
- SM501_GPIO_51;
-#else
- /* Configure PSC1_4 as GPIO output for ATA reset */
- *(vu_long *) MPC5XXX_WU_GPIO_ENABLE |= GPIO_PSC1_4;
- *(vu_long *) MPC5XXX_WU_GPIO_DIR |= GPIO_PSC1_4;
-#endif
-}
-
-void ide_set_reset (int idereset)
-{
- debug ("ide_reset(%d)\n", idereset);
-
-#if defined (CONFIG_MINIFAP)
- if (idereset) {
- *(vu_long *) (SM501_MMIO_BASE+SM501_GPIO_DATA_HIGH) &=
- ~SM501_GPIO_51;
- } else {
- *(vu_long *) (SM501_MMIO_BASE+SM501_GPIO_DATA_HIGH) |=
- SM501_GPIO_51;
- }
-#else
- if (idereset) {
- *(vu_long *) MPC5XXX_WU_GPIO_DATA &= ~GPIO_PSC1_4;
- } else {
- *(vu_long *) MPC5XXX_WU_GPIO_DATA |= GPIO_PSC1_4;
- }
-#endif
-}
-#endif /* defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET) */
-
-#ifdef CONFIG_POST
-/*
- * Reads GPIO pin PSC6_3. A keypress is reported, if PSC6_3 is low. If PSC6_3
- * is left open, no keypress is detected.
- */
-int post_hotkeys_pressed(void)
-{
- struct mpc5xxx_gpio *gpio;
-
- gpio = (struct mpc5xxx_gpio*) MPC5XXX_GPIO;
-
- /*
- * Configure PSC6_1 and PSC6_3 as GPIO. PSC6 then couldn't be used in
- * CODEC or UART mode. Consumer IrDA should still be possible.
- */
- gpio->port_config &= ~(0x07000000);
- gpio->port_config |= 0x03000000;
-
- /* Enable GPIO for GPIO_IRDA_1 (IR_USB_CLK pin) = PSC6_3 */
- gpio->simple_gpioe |= 0x20000000;
-
- /* Configure GPIO_IRDA_1 as input */
- gpio->simple_ddr &= ~(0x20000000);
-
- return ((gpio->simple_ival & 0x20000000) ? 0 : 1);
-}
-#endif
-
-#if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER)
-
-void post_word_store (ulong a)
-{
- volatile ulong *save_addr =
- (volatile ulong *)(MPC5XXX_SRAM + MPC5XXX_SRAM_POST_SIZE);
-
- *save_addr = a;
-}
-
-ulong post_word_load (void)
-{
- volatile ulong *save_addr =
- (volatile ulong *)(MPC5XXX_SRAM + MPC5XXX_SRAM_POST_SIZE);
-
- return *save_addr;
-}
-#endif /* CONFIG_POST || CONFIG_LOGBUFFER*/
-
-#ifdef CONFIG_PS2MULT
-#ifdef CONFIG_BOARD_EARLY_INIT_R
-int board_early_init_r (void)
-{
- ps2mult_early_init();
- return (0);
-}
-#endif
-#endif /* CONFIG_PS2MULT */
-
-#if defined(CONFIG_CS_AUTOCONF)
-int last_stage_init (void)
-{
- /*
- * auto scan for really existing devices and re-set chip select
- * configuration.
- */
- u16 save, tmp;
- int restore;
-
- /*
- * Check for SRAM and SRAM size
- */
-
- /* save original SRAM content */
- save = *(volatile u16 *)CFG_CS2_START;
- restore = 1;
-
- /* write test pattern to SRAM */
- *(volatile u16 *)CFG_CS2_START = 0xA5A5;
- __asm__ volatile ("sync");
- /*
- * Put a different pattern on the data lines: otherwise they may float
- * long enough to read back what we wrote.
- */
- tmp = *(volatile u16 *)CFG_FLASH_BASE;
- if (tmp == 0xA5A5)
- puts ("!! possible error in SRAM detection\n");
-
- if (*(volatile u16 *)CFG_CS2_START != 0xA5A5) {
- /* no SRAM at all, disable cs */
- *(vu_long *)MPC5XXX_ADDECR &= ~(1 << 18);
- *(vu_long *)MPC5XXX_CS2_START = 0x0000FFFF;
- *(vu_long *)MPC5XXX_CS2_STOP = 0x0000FFFF;
- restore = 0;
- __asm__ volatile ("sync");
- } else if (*(volatile u16 *)(CFG_CS2_START + (1<<19)) == 0xA5A5) {
- /* make sure that we access a mirrored address */
- *(volatile u16 *)CFG_CS2_START = 0x1111;
- __asm__ volatile ("sync");
- if (*(volatile u16 *)(CFG_CS2_START + (1<<19)) == 0x1111) {
- /* SRAM size = 512 kByte */
- *(vu_long *)MPC5XXX_CS2_STOP = STOP_REG(CFG_CS2_START,
- 0x80000);
- __asm__ volatile ("sync");
- puts ("SRAM: 512 kB\n");
- }
- else
- puts ("!! possible error in SRAM detection\n");
- } else {
- puts ("SRAM: 1 MB\n");
- }
- /* restore origianl SRAM content */
- if (restore) {
- *(volatile u16 *)CFG_CS2_START = save;
- __asm__ volatile ("sync");
- }
-
- /*
- * Check for Grafic Controller
- */
-
- /* save origianl FB content */
- save = *(volatile u16 *)CFG_CS1_START;
- restore = 1;
-
- /* write test pattern to FB memory */
- *(volatile u16 *)CFG_CS1_START = 0xA5A5;
- __asm__ volatile ("sync");
- /*
- * Put a different pattern on the data lines: otherwise they may float
- * long enough to read back what we wrote.
- */
- tmp = *(volatile u16 *)CFG_FLASH_BASE;
- if (tmp == 0xA5A5)
- puts ("!! possible error in grafic controller detection\n");
-
- if (*(volatile u16 *)CFG_CS1_START != 0xA5A5) {
- /* no grafic controller at all, disable cs */
- *(vu_long *)MPC5XXX_ADDECR &= ~(1 << 17);
- *(vu_long *)MPC5XXX_CS1_START = 0x0000FFFF;
- *(vu_long *)MPC5XXX_CS1_STOP = 0x0000FFFF;
- restore = 0;
- __asm__ volatile ("sync");
- } else {
- puts ("VGA: SMI501 (Voyager) with 8 MB\n");
- }
- /* restore origianl FB content */
- if (restore) {
- *(volatile u16 *)CFG_CS1_START = save;
- __asm__ volatile ("sync");
- }
-
- return 0;
-}
-#endif /* CONFIG_CS_AUTOCONF */
-
-#ifdef CONFIG_VIDEO_SM501
-
-#define DISPLAY_WIDTH 640
-#define DISPLAY_HEIGHT 480
-
-#ifdef CONFIG_VIDEO_SM501_8BPP
-#error CONFIG_VIDEO_SM501_8BPP not supported.
-#endif /* CONFIG_VIDEO_SM501_8BPP */
-
-#ifdef CONFIG_VIDEO_SM501_16BPP
-#error CONFIG_VIDEO_SM501_16BPP not supported.
-#endif /* CONFIG_VIDEO_SM501_16BPP */
-#ifdef CONFIG_VIDEO_SM501_32BPP
-static const SMI_REGS init_regs [] =
-{
-#if 0 /* CRT only */
- {0x00004, 0x0},
- {0x00048, 0x00021807},
- {0x0004C, 0x10090a01},
- {0x00054, 0x1},
- {0x00040, 0x00021807},
- {0x00044, 0x10090a01},
- {0x00054, 0x0},
- {0x80200, 0x00010000},
- {0x80204, 0x0},
- {0x80208, 0x0A000A00},
- {0x8020C, 0x02fa027f},
- {0x80210, 0x004a028b},
- {0x80214, 0x020c01df},
- {0x80218, 0x000201e9},
- {0x80200, 0x00013306},
-#else /* panel + CRT */
- {0x00004, 0x0},
- {0x00048, 0x00021807},
- {0x0004C, 0x091a0a01},
- {0x00054, 0x1},
- {0x00040, 0x00021807},
- {0x00044, 0x091a0a01},
- {0x00054, 0x0},
- {0x80000, 0x0f013106},
- {0x80004, 0xc428bb17},
- {0x8000C, 0x00000000},
- {0x80010, 0x0a000a00},
- {0x80014, 0x02800000},
- {0x80018, 0x01e00000},
- {0x8001C, 0x00000000},
- {0x80020, 0x01e00280},
- {0x80024, 0x02fa027f},
- {0x80028, 0x004a028b},
- {0x8002C, 0x020c01df},
- {0x80030, 0x000201e9},
- {0x80200, 0x00010000},
-#endif
- {0, 0}
-};
-#endif /* CONFIG_VIDEO_SM501_32BPP */
-
-#ifdef CONFIG_CONSOLE_EXTRA_INFO
-/*
- * Return text to be printed besides the logo.
- */
-void video_get_info_str (int line_number, char *info)
-{
- if (line_number == 1) {
-#if defined (CONFIG_TQM5200_AA)
- strcpy (info, " Board: TQM5200-AA (TQ-Components GmbH)");
-#elif defined (CONFIG_TQM5200_AB)
- strcpy (info, " Board: TQM5200-AB (TQ-Components GmbH)");
-#elif defined (CONFIG_TQM5200_AC)
- strcpy (info, " Board: TQM5200-AC (TQ-Components GmbH)");
-#elif defined (CONFIG_TQM5200)
- strcpy (info, " Board: TQM5200 (TQ-Components GmbH)");
-#else
-#error No supported board selected
-#endif
-#if defined (CONFIG_STK52XX)
- } else if (line_number == 2) {
- strcpy (info, " on a STK52XX baseboard");
-#endif
- }
- else {
- info [0] = '\0';
- }
-}
-#endif
-
-/*
- * Returns SM501 register base address. First thing called in the
- * driver. Checks if SM501 is physically present.
- */
-unsigned int board_video_init (void)
-{
- u16 save, tmp;
- int restore, ret;
-
- /*
- * Check for Grafic Controller
- */
-
- /* save origianl FB content */
- save = *(volatile u16 *)CFG_CS1_START;
- restore = 1;
-
- /* write test pattern to FB memory */
- *(volatile u16 *)CFG_CS1_START = 0xA5A5;
- __asm__ volatile ("sync");
- /*
- * Put a different pattern on the data lines: otherwise they may float
- * long enough to read back what we wrote.
- */
- tmp = *(volatile u16 *)CFG_FLASH_BASE;
- if (tmp == 0xA5A5)
- puts ("!! possible error in grafic controller detection\n");
-
- if (*(volatile u16 *)CFG_CS1_START != 0xA5A5) {
- /* no grafic controller found */
- restore = 0;
- ret = 0;
- } else {
- ret = SM501_MMIO_BASE;
- }
-
- if (restore) {
- *(volatile u16 *)CFG_CS1_START = save;
- __asm__ volatile ("sync");
- }
- return ret;
-}
-
-/*
- * Returns SM501 framebuffer address
- */
-unsigned int board_video_get_fb (void)
-{
- return SM501_FB_BASE;
-}
-
-/*
- * Called after initializing the SM501 and before clearing the screen.
- */
-void board_validate_screen (unsigned int base)
-{
-}
-
-/*
- * Return a pointer to the initialization sequence.
- */
-const SMI_REGS *board_get_regs (void)
-{
- return init_regs;
-}
-
-int board_get_width (void)
-{
- return DISPLAY_WIDTH;
-}
-
-int board_get_height (void)
-{
- return DISPLAY_HEIGHT;
-}
-
-#endif /* CONFIG_VIDEO_SM501 */
diff --git a/board/tqm5200/u-boot.lds b/board/tqm5200/u-boot.lds
deleted file mode 100644
index 3cc2968487..0000000000
--- a/board/tqm5200/u-boot.lds
+++ /dev/null
@@ -1,125 +0,0 @@
-/*
- * (C) Copyright 2003-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc5xxx/start.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/tqm8260/Makefile b/board/tqm8260/Makefile
deleted file mode 100644
index c10b9fee68..0000000000
--- a/board/tqm8260/Makefile
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o ../tqm8xx/load_sernum_ethaddr.o
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/tqm8260/config.mk b/board/tqm8260/config.mk
deleted file mode 100644
index 1fe99524c6..0000000000
--- a/board/tqm8260/config.mk
+++ /dev/null
@@ -1,34 +0,0 @@
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# TQM8260 boards
-#
-
-# This should be equal to the CFG_FLASH_BASE define in config_TQM8260.h
-# for the "final" configuration, with U-Boot in flash, or the address
-# in RAM where U-Boot is loaded at for debugging.
-#
-TEXT_BASE = 0x40000000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)
diff --git a/board/tqm8260/flash.c b/board/tqm8260/flash.c
deleted file mode 100644
index 056fe810b3..0000000000
--- a/board/tqm8260/flash.c
+++ /dev/null
@@ -1,488 +0,0 @@
-/*
- * (C) Copyright 2001, 2002
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * Flash Routines for AMD devices on the TQM8260 board
- *
- *--------------------------------------------------------------------
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-
-#define V_ULONG(a) (*(volatile unsigned long *)( a ))
-#define V_BYTE(a) (*(volatile unsigned char *)( a ))
-
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
-
-
-/*-----------------------------------------------------------------------
- */
-void flash_reset (void)
-{
- if (flash_info[0].flash_id != FLASH_UNKNOWN) {
- V_ULONG (flash_info[0].start[0]) = 0x00F000F0;
- V_ULONG (flash_info[0].start[0] + 4) = 0x00F000F0;
- }
-}
-
-/*-----------------------------------------------------------------------
- */
-ulong flash_get_size (ulong baseaddr, flash_info_t * info)
-{
- short i;
- unsigned long flashtest_h, flashtest_l;
-
- /* Write auto select command sequence and test FLASH answer */
- V_ULONG (baseaddr + ((ulong) 0x0555 << 3)) = 0x00AA00AA;
- V_ULONG (baseaddr + ((ulong) 0x02AA << 3)) = 0x00550055;
- V_ULONG (baseaddr + ((ulong) 0x0555 << 3)) = 0x00900090;
- V_ULONG (baseaddr + 4 + ((ulong) 0x0555 << 3)) = 0x00AA00AA;
- V_ULONG (baseaddr + 4 + ((ulong) 0x02AA << 3)) = 0x00550055;
- V_ULONG (baseaddr + 4 + ((ulong) 0x0555 << 3)) = 0x00900090;
-
- flashtest_h = V_ULONG (baseaddr); /* manufacturer ID */
- flashtest_l = V_ULONG (baseaddr + 4);
-
- switch ((int) flashtest_h) {
- case AMD_MANUFACT:
- info->flash_id = FLASH_MAN_AMD;
- break;
- case FUJ_MANUFACT:
- info->flash_id = FLASH_MAN_FUJ;
- break;
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- return (0); /* no or unknown flash */
- }
-
- flashtest_h = V_ULONG (baseaddr + 8); /* device ID */
- flashtest_l = V_ULONG (baseaddr + 12);
- if (flashtest_h != flashtest_l) {
- info->flash_id = FLASH_UNKNOWN;
- } else {
- switch (flashtest_h) {
- case AMD_ID_LV800T:
- info->flash_id += FLASH_AM800T;
- info->sector_count = 19;
- info->size = 0x00400000;
- break; /* 4 * 1 MB = 4 MB */
- case AMD_ID_LV800B:
- info->flash_id += FLASH_AM800B;
- info->sector_count = 19;
- info->size = 0x00400000;
- break; /* 4 * 1 MB = 4 MB */
- case AMD_ID_LV160T:
- info->flash_id += FLASH_AM160T;
- info->sector_count = 35;
- info->size = 0x00800000;
- break; /* 4 * 2 MB = 8 MB */
- case AMD_ID_LV160B:
- info->flash_id += FLASH_AM160B;
- info->sector_count = 35;
- info->size = 0x00800000;
- break; /* 4 * 2 MB = 8 MB */
- case AMD_ID_DL322T:
- info->flash_id += FLASH_AMDL322T;
- info->sector_count = 71;
- info->size = 0x01000000;
- break; /* 4 * 4 MB = 16 MB */
- case AMD_ID_DL322B:
- info->flash_id += FLASH_AMDL322B;
- info->sector_count = 71;
- info->size = 0x01000000;
- break; /* 4 * 4 MB = 16 MB */
- case AMD_ID_DL323T:
- info->flash_id += FLASH_AMDL323T;
- info->sector_count = 71;
- info->size = 0x01000000;
- break; /* 4 * 4 MB = 16 MB */
- case AMD_ID_DL323B:
- info->flash_id += FLASH_AMDL323B;
- info->sector_count = 71;
- info->size = 0x01000000;
- break; /* 4 * 4 MB = 16 MB */
- case AMD_ID_LV640U:
- info->flash_id += FLASH_AM640U;
- info->sector_count = 128;
- info->size = 0x02000000;
- break; /* 4 * 8 MB = 32 MB */
- default:
- info->flash_id = FLASH_UNKNOWN;
- return (0); /* no or unknown flash */
- }
- }
-
- if (flashtest_h == AMD_ID_LV640U) {
-
- /* set up sector start adress table (uniform sector type) */
- for (i = 0; i < info->sector_count; i++)
- info->start[i] = baseaddr + (i * 0x00040000);
-
- } else if (info->flash_id & FLASH_BTYPE) {
-
- /* set up sector start adress table (bottom sector type) */
- info->start[0] = baseaddr + 0x00000000;
- info->start[1] = baseaddr + 0x00010000;
- info->start[2] = baseaddr + 0x00018000;
- info->start[3] = baseaddr + 0x00020000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] = baseaddr + (i * 0x00040000) - 0x000C0000;
- }
-
- } else {
-
- /* set up sector start adress table (top sector type) */
- i = info->sector_count - 1;
- info->start[i--] = baseaddr + info->size - 0x00010000;
- info->start[i--] = baseaddr + info->size - 0x00018000;
- info->start[i--] = baseaddr + info->size - 0x00020000;
- for (; i >= 0; i--) {
- info->start[i] = baseaddr + i * 0x00040000;
- }
- }
-
- /* check for protected sectors */
- for (i = 0; i < info->sector_count; i++) {
- /* read sector protection at sector address, (A7 .. A0) = 0x02 */
- if ((V_ULONG (info->start[i] + 16) & 0x00010001) ||
- (V_ULONG (info->start[i] + 20) & 0x00010001)) {
- info->protect[i] = 1; /* D0 = 1 if protected */
- } else {
- info->protect[i] = 0;
- }
- }
-
- flash_reset ();
- return (info->size);
-}
-
-/*-----------------------------------------------------------------------
- */
-unsigned long flash_init (void)
-{
- unsigned long size_b0 = 0;
- int i;
-
- /* Init: no FLASHes known */
- for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* Static FLASH Bank configuration here (only one bank) */
-
- size_b0 = flash_get_size (CFG_FLASH0_BASE, &flash_info[0]);
- if (flash_info[0].flash_id == FLASH_UNKNOWN || size_b0 == 0) {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size_b0, size_b0 >> 20);
- }
-
- /*
- * protect monitor and environment sectors
- */
-
-#if CFG_MONITOR_BASE >= CFG_FLASH0_BASE
- flash_protect (FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE + monitor_flash_len - 1, &flash_info[0]);
-#endif
-
-#if (CFG_ENV_IS_IN_FLASH == 1) && defined(CFG_ENV_ADDR)
-# ifndef CFG_ENV_SIZE
-# define CFG_ENV_SIZE CFG_ENV_SECT_SIZE
-# endif
- flash_protect (FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0]);
-#endif
-
- return (size_b0);
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t * info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD:
- printf ("AMD ");
- break;
- case FLASH_MAN_FUJ:
- printf ("FUJITSU ");
- break;
- default:
- printf ("Unknown Vendor ");
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM800T:
- printf ("29LV800T (8 M, top sector)\n");
- break;
- case FLASH_AM800B:
- printf ("29LV800T (8 M, bottom sector)\n");
- break;
- case FLASH_AM160T:
- printf ("29LV160T (16 M, top sector)\n");
- break;
- case FLASH_AM160B:
- printf ("29LV160B (16 M, bottom sector)\n");
- break;
- case FLASH_AMDL322T:
- printf ("29DL322T (32 M, top sector)\n");
- break;
- case FLASH_AMDL322B:
- printf ("29DL322B (32 M, bottom sector)\n");
- break;
- case FLASH_AMDL323T:
- printf ("29DL323T (32 M, top sector)\n");
- break;
- case FLASH_AMDL323B:
- printf ("29DL323B (32 M, bottom sector)\n");
- break;
- case FLASH_AM640U:
- printf ("29LV640D (64 M, uniform sector)\n");
- break;
- default:
- printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " "
- );
- }
- printf ("\n");
- return;
-}
-
-/*-----------------------------------------------------------------------
- */
-int flash_erase (flash_info_t * info, int s_first, int s_last)
-{
- int flag, prot, sect, l_sect;
- ulong start, now, last;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect])
- prot++;
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- l_sect = -1;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
-
- V_ULONG (info->start[0] + (0x0555 << 3)) = 0x00AA00AA;
- V_ULONG (info->start[0] + (0x02AA << 3)) = 0x00550055;
- V_ULONG (info->start[0] + (0x0555 << 3)) = 0x00800080;
- V_ULONG (info->start[0] + (0x0555 << 3)) = 0x00AA00AA;
- V_ULONG (info->start[0] + (0x02AA << 3)) = 0x00550055;
- V_ULONG (info->start[0] + 4 + (0x0555 << 3)) = 0x00AA00AA;
- V_ULONG (info->start[0] + 4 + (0x02AA << 3)) = 0x00550055;
- V_ULONG (info->start[0] + 4 + (0x0555 << 3)) = 0x00800080;
- V_ULONG (info->start[0] + 4 + (0x0555 << 3)) = 0x00AA00AA;
- V_ULONG (info->start[0] + 4 + (0x02AA << 3)) = 0x00550055;
- udelay (1000);
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- V_ULONG (info->start[sect]) = 0x00300030;
- V_ULONG (info->start[sect] + 4) = 0x00300030;
- l_sect = sect;
- }
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts ();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- /*
- * We wait for the last triggered sector
- */
- if (l_sect < 0)
- goto DONE;
-
- start = get_timer (0);
- last = start;
- while ((V_ULONG (info->start[l_sect]) & 0x00800080) != 0x00800080 ||
- (V_ULONG (info->start[l_sect] + 4) & 0x00800080) != 0x00800080)
- {
- if ((now = get_timer (start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- return 1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- serial_putc ('.');
- last = now;
- }
- }
-
- DONE:
- /* reset to read mode */
- flash_reset ();
-
- printf (" done\n");
- return 0;
-}
-
-static int write_dword (flash_info_t *, ulong, unsigned char *);
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- ulong dp;
- static unsigned char bb[8];
- int i, l, rc, cc = cnt;
-
- dp = (addr & ~7); /* get lower dword aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - dp) != 0) {
- for (i = 0; i < 8; i++)
- bb[i] = (i < l || (i - l) >= cc) ? V_BYTE (dp + i) : *src++;
- if ((rc = write_dword (info, dp, bb)) != 0) {
- return (rc);
- }
- dp += 8;
- cc -= 8 - l;
- }
-
- /*
- * handle word aligned part
- */
- while (cc >= 8) {
- if ((rc = write_dword (info, dp, src)) != 0) {
- return (rc);
- }
- dp += 8;
- src += 8;
- cc -= 8;
- }
-
- if (cc <= 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- for (i = 0; i < 8; i++) {
- bb[i] = (i < cc) ? *src++ : V_BYTE (dp + i);
- }
- return (write_dword (info, dp, bb));
-}
-
-/*-----------------------------------------------------------------------
- * Write a dword to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_dword (flash_info_t * info, ulong dest, unsigned char *pdata)
-{
- ulong start, cl, ch;
- int flag, i;
-
- for (ch = 0, i = 0; i < 4; i++)
- ch = (ch << 8) + *pdata++; /* high word */
- for (cl = 0, i = 0; i < 4; i++)
- cl = (cl << 8) + *pdata++; /* low word */
-
- /* Check if Flash is (sufficiently) erased */
- if ((*((vu_long *) dest) & ch) != ch
- || (*((vu_long *) (dest + 4)) & cl) != cl) {
- return (2);
- }
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
-
- V_ULONG (info->start[0] + (0x0555 << 3)) = 0x00AA00AA;
- V_ULONG (info->start[0] + (0x02AA << 3)) = 0x00550055;
- V_ULONG (info->start[0] + (0x0555 << 3)) = 0x00A000A0;
- V_ULONG (dest) = ch;
- V_ULONG (info->start[0] + 4 + (0x0555 << 3)) = 0x00AA00AA;
- V_ULONG (info->start[0] + 4 + (0x02AA << 3)) = 0x00550055;
- V_ULONG (info->start[0] + 4 + (0x0555 << 3)) = 0x00A000A0;
- V_ULONG (dest + 4) = cl;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts ();
-
- /* data polling for D7 */
- start = get_timer (0);
- while (((V_ULONG (dest) & 0x00800080) != (ch & 0x00800080)) ||
- ((V_ULONG (dest + 4) & 0x00800080) != (cl & 0x00800080))) {
- if (get_timer (start) > CFG_FLASH_WRITE_TOUT) {
- return (1);
- }
- }
- return (0);
-}
diff --git a/board/tqm8260/tqm8260.c b/board/tqm8260/tqm8260.c
deleted file mode 100644
index 029863b7d9..0000000000
--- a/board/tqm8260/tqm8260.c
+++ /dev/null
@@ -1,368 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <ioports.h>
-#include <mpc8260.h>
-
-/*
- * I/O Port configuration table
- *
- * if conf is 1, then that port pin will be configured at boot time
- * according to the five values podr/pdir/ppar/psor/pdat for that entry
- */
-
-const iop_conf_t iop_conf_tab[4][32] = {
-
- /* Port A configuration */
- { /* conf ppar psor pdir podr pdat */
- /* PA31 */ { 0, 0, 0, 1, 0, 0 }, /* FCC1 *ATMTXEN */
- /* PA30 */ { 0, 0, 0, 1, 0, 0 }, /* FCC1 ATMTCA */
- /* PA29 */ { 0, 0, 0, 1, 0, 0 }, /* FCC1 ATMTSOC */
- /* PA28 */ { 0, 0, 0, 1, 0, 0 }, /* FCC1 *ATMRXEN */
- /* PA27 */ { 0, 0, 0, 1, 0, 0 }, /* FCC1 ATMRSOC */
- /* PA26 */ { 0, 0, 0, 1, 0, 0 }, /* FCC1 ATMRCA */
- /* PA25 */ { 0, 0, 0, 1, 0, 0 }, /* FCC1 ATMTXD[0] */
- /* PA24 */ { 0, 0, 0, 1, 0, 0 }, /* FCC1 ATMTXD[1] */
- /* PA23 */ { 0, 0, 0, 1, 0, 0 }, /* FCC1 ATMTXD[2] */
- /* PA22 */ { 0, 0, 0, 1, 0, 0 }, /* FCC1 ATMTXD[3] */
- /* PA21 */ { 0, 0, 0, 1, 0, 0 }, /* FCC1 ATMTXD[4] */
- /* PA20 */ { 0, 0, 0, 1, 0, 0 }, /* FCC1 ATMTXD[5] */
- /* PA19 */ { 0, 0, 0, 1, 0, 0 }, /* FCC1 ATMTXD[6] */
- /* PA18 */ { 0, 0, 0, 1, 0, 0 }, /* FCC1 ATMTXD[7] */
- /* PA17 */ { 0, 0, 0, 1, 0, 0 }, /* FCC1 ATMRXD[7] */
- /* PA16 */ { 0, 0, 0, 1, 0, 0 }, /* FCC1 ATMRXD[6] */
- /* PA15 */ { 0, 0, 0, 1, 0, 0 }, /* FCC1 ATMRXD[5] */
- /* PA14 */ { 0, 0, 0, 1, 0, 0 }, /* FCC1 ATMRXD[4] */
- /* PA13 */ { 0, 0, 0, 1, 0, 0 }, /* FCC1 ATMRXD[3] */
- /* PA12 */ { 0, 0, 0, 1, 0, 0 }, /* FCC1 ATMRXD[2] */
- /* PA11 */ { 0, 0, 0, 1, 0, 0 }, /* FCC1 ATMRXD[1] */
- /* PA10 */ { 0, 0, 0, 1, 0, 0 }, /* FCC1 ATMRXD[0] */
- /* PA9 */ { 1, 1, 0, 1, 0, 0 }, /* SMC2 TXD */
- /* PA8 */ { 1, 1, 0, 0, 0, 0 }, /* SMC2 RXD */
- /* PA7 */ { 0, 0, 0, 1, 0, 0 }, /* PA7 */
- /* PA6 */ { 0, 0, 0, 1, 0, 0 }, /* PA6 */
- /* PA5 */ { 0, 0, 0, 1, 0, 0 }, /* PA5 */
- /* PA4 */ { 0, 0, 0, 1, 0, 0 }, /* PA4 */
- /* PA3 */ { 0, 0, 0, 1, 0, 0 }, /* PA3 */
- /* PA2 */ { 0, 0, 0, 1, 0, 0 }, /* PA2 */
- /* PA1 */ { 0, 0, 0, 1, 0, 0 }, /* PA1 */
- /* PA0 */ { 0, 0, 0, 1, 0, 0 } /* PA0 */
- },
-
- /* Port B configuration */
- { /* conf ppar psor pdir podr pdat */
- /* PB31 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TX_ER */
- /* PB30 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_DV */
- /* PB29 */ { 1, 1, 1, 1, 0, 0 }, /* FCC2 MII TX_EN */
- /* PB28 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_ER */
- /* PB27 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII COL */
- /* PB26 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII CRS */
- /* PB25 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[3] */
- /* PB24 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[2] */
- /* PB23 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[1] */
- /* PB22 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[0] */
- /* PB21 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[0] */
- /* PB20 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[1] */
- /* PB19 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[2] */
- /* PB18 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[3] */
- /* PB17 */ { 0, 0, 0, 0, 0, 0 }, /* PB17 */
- /* PB16 */ { 0, 0, 0, 0, 0, 0 }, /* PB16 */
- /* PB15 */ { 0, 0, 0, 0, 0, 0 }, /* PB15 */
- /* PB14 */ { 0, 0, 0, 0, 0, 0 }, /* PB14 */
- /* PB13 */ { 0, 0, 0, 0, 0, 0 }, /* PB13 */
- /* PB12 */ { 0, 0, 0, 0, 0, 0 }, /* PB12 */
- /* PB11 */ { 0, 0, 0, 0, 0, 0 }, /* PB11 */
- /* PB10 */ { 0, 0, 0, 0, 0, 0 }, /* PB10 */
- /* PB9 */ { 0, 0, 0, 0, 0, 0 }, /* PB9 */
- /* PB8 */ { 0, 0, 0, 0, 0, 0 }, /* PB8 */
- /* PB7 */ { 0, 0, 0, 0, 0, 0 }, /* PB7 */
- /* PB6 */ { 0, 0, 0, 0, 0, 0 }, /* PB6 */
- /* PB5 */ { 0, 0, 0, 0, 0, 0 }, /* PB5 */
- /* PB4 */ { 0, 0, 0, 0, 0, 0 }, /* PB4 */
- /* PB3 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PB2 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PB1 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PB0 */ { 0, 0, 0, 0, 0, 0 } /* pin doesn't exist */
- },
-
- /* Port C */
- { /* conf ppar psor pdir podr pdat */
- /* PC31 */ { 0, 0, 0, 1, 0, 0 }, /* PC31 */
- /* PC30 */ { 0, 0, 0, 1, 0, 0 }, /* PC30 */
- /* PC29 */ { 1, 1, 1, 0, 0, 0 }, /* SCC1 EN *CLSN */
- /* PC28 */ { 0, 0, 0, 1, 0, 0 }, /* PC28 */
- /* PC27 */ { 0, 0, 0, 1, 0, 0 }, /* PC27 */
- /* PC26 */ { 0, 0, 0, 1, 0, 0 }, /* PC26 */
- /* PC25 */ { 0, 0, 0, 1, 0, 0 }, /* PC25 */
- /* PC24 */ { 0, 0, 0, 1, 0, 0 }, /* PC24 */
- /* PC23 */ { 0, 1, 0, 1, 0, 0 }, /* ATMTFCLK */
- /* PC22 */ { 0, 1, 0, 0, 0, 0 }, /* ATMRFCLK */
- /* PC21 */ { 1, 1, 0, 0, 0, 0 }, /* SCC1 EN RXCLK */
- /* PC20 */ { 1, 1, 0, 0, 0, 0 }, /* SCC1 EN TXCLK */
- /* PC19 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_CLK */
- /* PC18 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII TX_CLK */
- /* PC17 */ { 0, 0, 0, 1, 0, 0 }, /* PC17 */
- /* PC16 */ { 0, 0, 0, 1, 0, 0 }, /* PC16 */
- /* PC15 */ { 0, 0, 0, 1, 0, 0 }, /* PC15 */
- /* PC14 */ { 1, 1, 0, 0, 0, 0 }, /* SCC1 EN *CD */
- /* PC13 */ { 0, 0, 0, 1, 0, 0 }, /* PC13 */
- /* PC12 */ { 0, 0, 0, 1, 0, 0 }, /* PC12 */
- /* PC11 */ { 0, 0, 0, 1, 0, 0 }, /* PC11 */
- /* PC10 */ { 0, 0, 0, 1, 0, 0 }, /* FCC2 MDC */
- /* PC9 */ { 0, 0, 0, 1, 0, 0 }, /* FCC2 MDIO */
- /* PC8 */ { 0, 0, 0, 1, 0, 0 }, /* PC8 */
- /* PC7 */ { 0, 0, 0, 1, 0, 0 }, /* PC7 */
- /* PC6 */ { 0, 0, 0, 1, 0, 0 }, /* PC6 */
- /* PC5 */ { 0, 0, 0, 1, 0, 0 }, /* PC5 */
- /* PC4 */ { 0, 0, 0, 1, 0, 0 }, /* PC4 */
- /* PC3 */ { 0, 0, 0, 1, 0, 0 }, /* PC3 */
- /* PC2 */ { 0, 0, 0, 1, 0, 1 }, /* ENET FDE */
- /* PC1 */ { 0, 0, 0, 1, 0, 0 }, /* ENET DSQE */
- /* PC0 */ { 0, 0, 0, 1, 0, 0 }, /* ENET LBK */
- },
-
- /* Port D */
- { /* conf ppar psor pdir podr pdat */
- /* PD31 */ { 1, 1, 0, 0, 0, 0 }, /* SCC1 EN RxD */
- /* PD30 */ { 1, 1, 1, 1, 0, 0 }, /* SCC1 EN TxD */
- /* PD29 */ { 1, 1, 0, 1, 0, 0 }, /* SCC1 EN TENA */
- /* PD28 */ { 0, 0, 0, 1, 0, 0 }, /* PD28 */
- /* PD27 */ { 0, 0, 0, 1, 0, 0 }, /* PD27 */
- /* PD26 */ { 0, 0, 0, 1, 0, 0 }, /* PD26 */
- /* PD25 */ { 0, 0, 0, 1, 0, 0 }, /* PD25 */
- /* PD24 */ { 0, 0, 0, 1, 0, 0 }, /* PD24 */
- /* PD23 */ { 0, 0, 0, 1, 0, 0 }, /* PD23 */
- /* PD22 */ { 0, 0, 0, 1, 0, 0 }, /* PD22 */
- /* PD21 */ { 0, 0, 0, 1, 0, 0 }, /* PD21 */
- /* PD20 */ { 0, 0, 0, 1, 0, 0 }, /* PD20 */
- /* PD19 */ { 0, 0, 0, 1, 0, 0 }, /* PD19 */
- /* PD18 */ { 0, 0, 0, 1, 0, 0 }, /* PD19 */
- /* PD17 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXPRTY */
- /* PD16 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXPRTY */
-#if defined(CONFIG_SOFT_I2C)
- /* PD15 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SDA */
- /* PD14 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SCL */
-#else
-#if defined(CONFIG_HARD_I2C)
- /* PD15 */ { 1, 1, 1, 0, 1, 0 }, /* I2C SDA */
- /* PD14 */ { 1, 1, 1, 0, 1, 0 }, /* I2C SCL */
-#else /* normal I/O port pins */
- /* PD15 */ { 0, 1, 1, 0, 1, 0 }, /* I2C SDA */
- /* PD14 */ { 0, 1, 1, 0, 1, 0 }, /* I2C SCL */
-#endif
-#endif
- /* PD13 */ { 0, 0, 0, 0, 0, 0 }, /* PD13 */
- /* PD12 */ { 0, 0, 0, 0, 0, 0 }, /* PD12 */
- /* PD11 */ { 0, 0, 0, 0, 0, 0 }, /* PD11 */
- /* PD10 */ { 0, 0, 0, 0, 0, 0 }, /* PD10 */
- /* PD9 */ { 1, 1, 0, 1, 0, 0 }, /* SMC1 TXD */
- /* PD8 */ { 1, 1, 0, 0, 0, 0 }, /* SMC1 RXD */
- /* PD7 */ { 0, 0, 0, 1, 0, 1 }, /* PD7 */
- /* PD6 */ { 0, 0, 0, 1, 0, 1 }, /* PD6 */
- /* PD5 */ { 0, 0, 0, 1, 0, 1 }, /* PD5 */
- /* PD4 */ { 0, 0, 0, 1, 0, 1 }, /* PD4 */
- /* PD3 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PD2 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PD1 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PD0 */ { 0, 0, 0, 0, 0, 0 } /* pin doesn't exist */
- }
-};
-
-/* ------------------------------------------------------------------------- */
-
-/* Check Board Identity:
- */
-int checkboard (void)
-{
- char str[64];
- int i = getenv_r ("serial#", str, sizeof (str));
-
- puts ("Board: ");
-
- if (!i || strncmp (str, "TQM82", 5)) {
- puts ("### No HW ID - assuming TQM8260\n");
- return (0);
- }
-
- puts (str);
- putc ('\n');
-
- return 0;
-}
-
-/* ------------------------------------------------------------------------- */
-
-/* Try SDRAM initialization with P/LSDMR=sdmr and ORx=orx
- *
- * This routine performs standard 8260 initialization sequence
- * and calculates the available memory size. It may be called
- * several times to try different SDRAM configurations on both
- * 60x and local buses.
- */
-static long int try_init (volatile memctl8260_t * memctl, ulong sdmr,
- ulong orx, volatile uchar * base)
-{
- volatile uchar c = 0xff;
- volatile uint *sdmr_ptr;
- volatile uint *orx_ptr;
- ulong maxsize, size;
- int i;
-
- /* We must be able to test a location outsize the maximum legal size
- * to find out THAT we are outside; but this address still has to be
- * mapped by the controller. That means, that the initial mapping has
- * to be (at least) twice as large as the maximum expected size.
- */
- maxsize = (1 + (~orx | 0x7fff)) / 2;
-
- /* Since CFG_SDRAM_BASE is always 0 (??), we assume that
- * we are configuring CS1 if base != 0
- */
- sdmr_ptr = base ? &memctl->memc_lsdmr : &memctl->memc_psdmr;
- orx_ptr = base ? &memctl->memc_or2 : &memctl->memc_or1;
-
- *orx_ptr = orx;
-
- /*
- * Quote from 8260 UM (10.4.2 SDRAM Power-On Initialization, 10-35):
- *
- * "At system reset, initialization software must set up the
- * programmable parameters in the memory controller banks registers
- * (ORx, BRx, P/LSDMR). After all memory parameters are configured,
- * system software should execute the following initialization sequence
- * for each SDRAM device.
- *
- * 1. Issue a PRECHARGE-ALL-BANKS command
- * 2. Issue eight CBR REFRESH commands
- * 3. Issue a MODE-SET command to initialize the mode register
- *
- * The initial commands are executed by setting P/LSDMR[OP] and
- * accessing the SDRAM with a single-byte transaction."
- *
- * The appropriate BRx/ORx registers have already been set when we
- * get here. The SDRAM can be accessed at the address CFG_SDRAM_BASE.
- */
-
- *sdmr_ptr = sdmr | PSDMR_OP_PREA;
- *base = c;
-
- *sdmr_ptr = sdmr | PSDMR_OP_CBRR;
- for (i = 0; i < 8; i++)
- *base = c;
-
- *sdmr_ptr = sdmr | PSDMR_OP_MRW;
- *(base + CFG_MRS_OFFS) = c; /* setting MR on address lines */
-
- *sdmr_ptr = sdmr | PSDMR_OP_NORM | PSDMR_RFEN;
- *base = c;
-
- size = get_ram_size((long *)base, maxsize);
- *orx_ptr = orx | ~(size - 1);
-
- return (size);
-}
-
-long int initdram (int board_type)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8260_t *memctl = &immap->im_memctl;
-
-#ifndef CFG_RAMBOOT
- long size8, size9;
-#endif
- long psize, lsize;
-
- psize = 16 * 1024 * 1024;
- lsize = 0;
-
- memctl->memc_psrt = CFG_PSRT;
- memctl->memc_mptpr = CFG_MPTPR;
-
-#if 0 /* Just for debugging */
-#define prt_br_or(brX,orX) do { \
- ulong start = memctl->memc_ ## brX & 0xFFFF8000; \
- ulong sizem = ~memctl->memc_ ## orX | 0x00007FFF; \
- printf ("\n" \
- #brX " 0x%08x " #orX " 0x%08x " \
- "==> 0x%08lx ... 0x%08lx = %ld MB\n", \
- memctl->memc_ ## brX, memctl->memc_ ## orX, \
- start, start+sizem, (sizem+1)>>20); \
- } while (0)
- prt_br_or (br0, or0);
- prt_br_or (br1, or1);
- prt_br_or (br2, or2);
- prt_br_or (br3, or3);
-#endif
-
-#ifndef CFG_RAMBOOT
- /* 60x SDRAM setup:
- */
- size8 = try_init (memctl, CFG_PSDMR_8COL, CFG_OR1_8COL,
- (uchar *) CFG_SDRAM_BASE);
- size9 = try_init (memctl, CFG_PSDMR_9COL, CFG_OR1_9COL,
- (uchar *) CFG_SDRAM_BASE);
-
- if (size8 < size9) {
- psize = size9;
- printf ("(60x:9COL - %ld MB, ", psize >> 20);
- } else {
- psize = try_init (memctl, CFG_PSDMR_8COL, CFG_OR1_8COL,
- (uchar *) CFG_SDRAM_BASE);
- printf ("(60x:8COL - %ld MB, ", psize >> 20);
- }
-
- /* Local SDRAM setup:
- */
-#ifdef CFG_INIT_LOCAL_SDRAM
- memctl->memc_lsrt = CFG_LSRT;
- size8 = try_init (memctl, CFG_LSDMR_8COL, CFG_OR2_8COL,
- (uchar *) SDRAM_BASE2_PRELIM);
- size9 = try_init (memctl, CFG_LSDMR_9COL, CFG_OR2_9COL,
- (uchar *) SDRAM_BASE2_PRELIM);
-
- if (size8 < size9) {
- lsize = size9;
- printf ("Local:9COL - %ld MB) using ", lsize >> 20);
- } else {
- lsize = try_init (memctl, CFG_LSDMR_8COL, CFG_OR2_8COL,
- (uchar *) SDRAM_BASE2_PRELIM);
- printf ("Local:8COL - %ld MB) using ", lsize >> 20);
- }
-
-#if 0
- /* Set up BR2 so that the local SDRAM goes
- * right after the 60x SDRAM
- */
- memctl->memc_br2 = (CFG_BR2_PRELIM & ~BRx_BA_MSK) |
- (CFG_SDRAM_BASE + psize);
-#endif
-#endif /* CFG_INIT_LOCAL_SDRAM */
-#endif /* CFG_RAMBOOT */
-
- icache_enable ();
-
- return (psize);
-}
-
-/* ------------------------------------------------------------------------- */
diff --git a/board/tqm8260/u-boot.lds b/board/tqm8260/u-boot.lds
deleted file mode 100644
index 05f29c6ed0..0000000000
--- a/board/tqm8260/u-boot.lds
+++ /dev/null
@@ -1,126 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc8260/start.o (.text)
- *(.text)
- common/environment.o(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/tqm834x/Makefile b/board/tqm834x/Makefile
deleted file mode 100644
index 3ecc7d090e..0000000000
--- a/board/tqm834x/Makefile
+++ /dev/null
@@ -1,45 +0,0 @@
-#
-# Copyright 2004 Freescale Semiconductor, Inc.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o pci.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/tqm834x/config.mk b/board/tqm834x/config.mk
deleted file mode 100644
index f172c4ede0..0000000000
--- a/board/tqm834x/config.mk
+++ /dev/null
@@ -1,23 +0,0 @@
-#
-# Copyright 2004 Freescale Semiconductor, Inc.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-TEXT_BASE = 0x80000000
diff --git a/board/tqm834x/pci.c b/board/tqm834x/pci.c
deleted file mode 100644
index 5a23e6c55e..0000000000
--- a/board/tqm834x/pci.c
+++ /dev/null
@@ -1,220 +0,0 @@
-/*
- * (C) Copyright 2005
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- */
-
-#include <asm/mmu.h>
-#include <common.h>
-#include <pci.h>
-
-#ifdef CONFIG_PCI
-
-/* System RAM mapped to PCI space */
-#define CONFIG_PCI_SYS_MEM_BUS CFG_SDRAM_BASE
-#define CONFIG_PCI_SYS_MEM_PHYS CFG_SDRAM_BASE
-#define CONFIG_PCI_SYS_MEM_SIZE (1024 * 1024 * 1024)
-
-#ifndef CONFIG_PCI_PNP
-static struct pci_config_table pci_tqm834x_config_table[] = {
- {PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
- PCI_IDSEL_NUMBER, PCI_ANY_ID,
- pci_cfgfunc_config_device, {PCI_ENET0_IOADDR,
- PCI_ENET0_MEMADDR,
- PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER
- }
- },
- {}
-};
-#endif
-
-static struct pci_controller pci1_hose = {
-#ifndef CONFIG_PCI_PNP
- config_table:pci_tqm834x_config_table,
-#endif
-};
-
-
-/**************************************************************************
- * pci_init_board()
- *
- * NOTICE: MPC8349 internally has two PCI controllers (PCI1 and PCI2) but since
- * per TQM834x design physical connections to external devices (PCI sockets)
- * are routed only to the PCI1 we do not account for the second one - this code
- * supports PCI1 module only. Should support for the PCI2 be required in the
- * future it needs a separate pci_controller structure (above) and handling -
- * please refer to other boards' implementation for dual PCI host controllers,
- * for example board/Marvell/db64360/pci.c, pci_init_board()
- *
- */
-void
-pci_init_board(void)
-{
- volatile immap_t * immr;
- volatile clk8349_t * clk;
- volatile law8349_t * pci_law;
- volatile pot8349_t * pci_pot;
- volatile pcictrl8349_t * pci_ctrl;
- volatile pciconf8349_t * pci_conf;
- u16 reg16;
- u32 reg32;
- struct pci_controller * hose;
-
- immr = (immap_t *)CFG_IMMRBAR;
- clk = (clk8349_t *)&immr->clk;
- pci_law = immr->sysconf.pcilaw;
- pci_pot = immr->ios.pot;
- pci_ctrl = immr->pci_ctrl;
- pci_conf = immr->pci_conf;
-
- hose = &pci1_hose;
-
- /*
- * Configure PCI controller and PCI_CLK_OUTPUT
- */
-
- /*
- * WARNING! only PCI_CLK_OUTPUT1 is enabled here as this is the one
- * line actually used for clocking all external PCI devices in TQM83xx.
- * Enabling other PCI_CLK_OUTPUT lines may lead to board's hang for
- * unknown reasons - particularly PCI_CLK_OUTPUT6 and PCI_CLK_OUTPUT7
- * are known to hang the board; this issue is under investigation
- * (13 oct 05)
- */
- reg32 = OCCR_PCICOE1;
-#if 0
- /* enabling all PCI_CLK_OUTPUT lines HANGS the board... */
- reg32 = 0xff000000;
-#endif
- if (clk->spmr & SPMR_CKID) {
- /* PCI Clock is half CONFIG_83XX_CLKIN so need to set up OCCR
- * fields accordingly */
- reg32 |= (OCCR_PCI1CR | OCCR_PCI2CR);
-
- reg32 |= (OCCR_PCICD0 | OCCR_PCICD1 | OCCR_PCICD2 \
- | OCCR_PCICD3 | OCCR_PCICD4 | OCCR_PCICD5 \
- | OCCR_PCICD6 | OCCR_PCICD7);
- }
-
- clk->occr = reg32;
- udelay(2000);
-
- /*
- * Release PCI RST Output signal
- */
- pci_ctrl[0].gcr = 0;
- udelay(2000);
- pci_ctrl[0].gcr = 1;
- udelay(2000);
-
- /*
- * Configure PCI Local Access Windows
- */
- pci_law[0].bar = CFG_PCI1_MEM_PHYS & LAWBAR_BAR;
- pci_law[0].ar = LAWAR_EN | LAWAR_SIZE_512M;
-
- pci_law[1].bar = CFG_PCI1_IO_PHYS & LAWBAR_BAR;
- pci_law[1].ar = LAWAR_EN | LAWAR_SIZE_16M;
-
- /*
- * Configure PCI Outbound Translation Windows
- */
-
- /* PCI1 mem space */
- pci_pot[0].potar = (CFG_PCI1_MEM_BASE >> 12) & POTAR_TA_MASK;
- pci_pot[0].pobar = (CFG_PCI1_MEM_PHYS >> 12) & POBAR_BA_MASK;
- pci_pot[0].pocmr = POCMR_EN | (POCMR_CM_512M & POCMR_CM_MASK);
-
- /* PCI1 IO space */
- pci_pot[1].potar = (CFG_PCI1_IO_BASE >> 12) & POTAR_TA_MASK;
- pci_pot[1].pobar = (CFG_PCI1_IO_PHYS >> 12) & POBAR_BA_MASK;
- pci_pot[1].pocmr = POCMR_EN | POCMR_IO | (POCMR_CM_16M & POCMR_CM_MASK);
-
- /*
- * Configure PCI Inbound Translation Windows
- */
-
- /* we need RAM mapped to PCI space for the devices to
- * access main memory */
- pci_ctrl[0].pitar1 = 0x0;
- pci_ctrl[0].pibar1 = 0x0;
- pci_ctrl[0].piebar1 = 0x0;
- pci_ctrl[0].piwar1 = PIWAR_EN | PIWAR_PF | PIWAR_RTT_SNOOP | PIWAR_WTT_SNOOP | PIWAR_IWS_256M;
-
- hose->first_busno = 0;
- hose->last_busno = 0xff;
-
- /* PCI memory space */
- pci_set_region(hose->regions + 0,
- CFG_PCI1_MEM_BASE,
- CFG_PCI1_MEM_PHYS,
- CFG_PCI1_MEM_SIZE,
- PCI_REGION_MEM);
-
- /* PCI IO space */
- pci_set_region(hose->regions + 1,
- CFG_PCI1_IO_BASE,
- CFG_PCI1_IO_PHYS,
- CFG_PCI1_IO_SIZE,
- PCI_REGION_IO);
-
- /* System memory space */
- pci_set_region(hose->regions + 2,
- CONFIG_PCI_SYS_MEM_BUS,
- CONFIG_PCI_SYS_MEM_PHYS,
- CONFIG_PCI_SYS_MEM_SIZE,
- PCI_REGION_MEM | PCI_REGION_MEMORY);
-
- hose->region_count = 3;
-
- pci_setup_indirect(hose,
- (CFG_IMMRBAR+0x8300),
- (CFG_IMMRBAR+0x8304));
-
- pci_register_hose(hose);
-
- /*
- * Write to Command register
- */
- reg16 = 0xff;
- pci_hose_read_config_word (hose, PCI_BDF(0,0,0), PCI_COMMAND,
- &reg16);
- reg16 |= PCI_COMMAND_SERR | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
- pci_hose_write_config_word(hose, PCI_BDF(0,0,0), PCI_COMMAND,
- reg16);
-
- /*
- * Clear non-reserved bits in status register.
- */
- pci_hose_write_config_word(hose, PCI_BDF(0,0,0), PCI_STATUS,
- 0xffff);
- pci_hose_write_config_byte(hose, PCI_BDF(0,0,0), PCI_LATENCY_TIMER,
- 0x80);
-
-#ifdef CONFIG_PCI_SCAN_SHOW
- printf("PCI: Bus Dev VenId DevId Class Int\n");
-#endif
- /*
- * Hose scan.
- */
- hose->last_busno = pci_hose_scan(hose);
-}
-#endif /* CONFIG_PCI */
diff --git a/board/tqm834x/tqm834x.c b/board/tqm834x/tqm834x.c
deleted file mode 100644
index dada6739b6..0000000000
--- a/board/tqm834x/tqm834x.c
+++ /dev/null
@@ -1,408 +0,0 @@
-/*
- * (C) Copyright 2005
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- */
-
-#include <common.h>
-#include <ioports.h>
-#include <mpc83xx.h>
-#include <asm/mpc8349_pci.h>
-#include <i2c.h>
-#include <spd.h>
-#include <miiphy.h>
-#include <asm-ppc/mmu.h>
-#include <pci.h>
-
-#define IOSYNC asm("eieio")
-#define ISYNC asm("isync")
-#define SYNC asm("sync")
-#define FPW FLASH_PORT_WIDTH
-#define FPWV FLASH_PORT_WIDTHV
-
-#define DDR_MAX_SIZE_PER_CS 0x20000000
-
-#if defined(DDR_CASLAT_20)
-#define TIMING_CASLAT TIMING_CFG1_CASLAT_20
-#define MODE_CASLAT DDR_MODE_CASLAT_20
-#else
-#define TIMING_CASLAT TIMING_CFG1_CASLAT_25
-#define MODE_CASLAT DDR_MODE_CASLAT_25
-#endif
-
-#define INITIAL_CS_CONFIG (CSCONFIG_EN | CSCONFIG_ROW_BIT_12 | \
- CSCONFIG_COL_BIT_9)
-
-/* Global variable used to store detected number of banks */
-int tqm834x_num_flash_banks;
-
-/* External definitions */
-ulong flash_get_size (ulong base, int banknum);
-extern flash_info_t flash_info[];
-extern long spd_sdram (void);
-
-/* Local functions */
-static int detect_num_flash_banks(void);
-static long int get_ddr_bank_size(short cs, volatile long *base);
-static void set_cs_bounds(short cs, long base, long size);
-static void set_cs_config(short cs, long config);
-static void set_ddr_config(void);
-
-/* Local variable */
-static volatile immap_t *im = (immap_t *)CFG_IMMRBAR;
-
-/**************************************************************************
- * Board initialzation after relocation to RAM. Used to detect the number
- * of Flash banks on TQM834x.
- */
-int board_early_init_r (void) {
- /* sanity check, IMMARBAR should be mirrored at offset zero of IMMR */
- if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32)im)
- return 0;
-
- /* detect the number of Flash banks */
- return detect_num_flash_banks();
-}
-
-/**************************************************************************
- * DRAM initalization and size detection
- */
-long int initdram (int board_type)
-{
- long bank_size;
- long size;
- int cs;
-
- /* during size detection, set up the max DDRLAW size */
- im->sysconf.ddrlaw[0].bar = CFG_DDR_BASE;
- im->sysconf.ddrlaw[0].ar = (LAWAR_EN | LAWAR_SIZE_2G);
-
- /* set CS bounds to maximum size */
- for(cs = 0; cs < 4; ++cs) {
- set_cs_bounds(cs,
- CFG_DDR_BASE + (cs * DDR_MAX_SIZE_PER_CS),
- DDR_MAX_SIZE_PER_CS);
-
- set_cs_config(cs, INITIAL_CS_CONFIG);
- }
-
- /* configure ddr controller */
- set_ddr_config();
-
- udelay(200);
-
- /* enable DDR controller */
- im->ddr.sdram_cfg = (SDRAM_CFG_MEM_EN |
- SDRAM_CFG_SREN |
- SDRAM_CFG_SDRAM_TYPE_DDR);
- SYNC;
-
- /* size detection */
- debug("\n");
- size = 0;
- for(cs = 0; cs < 4; ++cs) {
- debug("\nDetecting Bank%d\n", cs);
-
- bank_size = get_ddr_bank_size(cs,
- (volatile long*)(CFG_DDR_BASE + size));
- size += bank_size;
-
- debug("DDR Bank%d size: %d MiB\n\n", cs, bank_size >> 20);
-
- /* exit if less than one bank */
- if(size < DDR_MAX_SIZE_PER_CS) break;
- }
-
- return size;
-}
-
-/**************************************************************************
- * checkboard()
- */
-int checkboard (void)
-{
- puts("Board: TQM834x\n");
-
-#ifdef CONFIG_PCI
- DECLARE_GLOBAL_DATA_PTR;
- volatile immap_t * immr;
- u32 w, f;
-
- immr = (immap_t *)CFG_IMMRBAR;
- if (!(immr->reset.rcwh & RCWH_PCIHOST)) {
- printf("PCI: NOT in host mode..?!\n");
- return 0;
- }
-
- /* get bus width */
- w = 32;
- if (immr->reset.rcwh & RCWH_PCI64)
- w = 64;
-
- /* get clock */
- f = gd->pci_clk;
-
- printf("PCI1: %d bit, %d MHz\n", w, f / 1000000);
-#else
- printf("PCI: disabled\n");
-#endif
- return 0;
-}
-
-
-/**************************************************************************
- *
- * Local functions
- *
- *************************************************************************/
-
-/**************************************************************************
- * Detect the number of flash banks (1 or 2). Store it in
- * a global variable tqm834x_num_flash_banks.
- * Bank detection code based on the Monitor code.
- */
-static int detect_num_flash_banks(void)
-{
- typedef unsigned long FLASH_PORT_WIDTH;
- typedef volatile unsigned long FLASH_PORT_WIDTHV;
- FPWV *bank1_base;
- FPWV *bank2_base;
- FPW bank1_read;
- FPW bank2_read;
- ulong bank1_size;
- ulong bank2_size;
- ulong total_size;
-
- tqm834x_num_flash_banks = 2; /* assume two banks */
-
- /* Get bank 1 and 2 information */
- bank1_size = flash_get_size(CFG_FLASH_BASE, 0);
- debug("Bank1 size: %lu\n", bank1_size);
- bank2_size = flash_get_size(CFG_FLASH_BASE + bank1_size, 1);
- debug("Bank2 size: %lu\n", bank2_size);
- total_size = bank1_size + bank2_size;
-
- if (bank2_size > 0) {
- /* Seems like we've got bank 2, but maybe it's mirrored 1 */
-
- /* Set the base addresses */
- bank1_base = (FPWV *) (CFG_FLASH_BASE);
- bank2_base = (FPWV *) (CFG_FLASH_BASE + bank1_size);
-
- /* Put bank 2 into CFI command mode and read */
- bank2_base[0x55] = 0x00980098;
- IOSYNC;
- ISYNC;
- bank2_read = bank2_base[0x10];
-
- /* Read from bank 1 (it's in read mode) */
- bank1_read = bank1_base[0x10];
-
- /* Reset Flash */
- bank1_base[0] = 0x00F000F0;
- bank2_base[0] = 0x00F000F0;
-
- if (bank2_read == bank1_read) {
- /*
- * Looks like just one bank, but not sure yet. Let's
- * read from bank 2 in autosoelect mode.
- */
- bank2_base[0x0555] = 0x00AA00AA;
- bank2_base[0x02AA] = 0x00550055;
- bank2_base[0x0555] = 0x00900090;
- IOSYNC;
- ISYNC;
- bank2_read = bank2_base[0x10];
-
- /* Read from bank 1 (it's in read mode) */
- bank1_read = bank1_base[0x10];
-
- /* Reset Flash */
- bank1_base[0] = 0x00F000F0;
- bank2_base[0] = 0x00F000F0;
-
- if (bank2_read == bank1_read) {
- /*
- * In both CFI command and autoselect modes,
- * we got the some data reading from Flash.
- * There is only one mirrored bank.
- */
- tqm834x_num_flash_banks = 1;
- total_size = bank1_size;
- }
- }
- }
-
- debug("Number of flash banks detected: %d\n", tqm834x_num_flash_banks);
-
- /* set OR0 and BR0 */
- im->lbus.bank[0].or = CFG_OR_TIMING_FLASH |
- (-(total_size) & OR_GPCM_AM);
- im->lbus.bank[0].br = (CFG_FLASH_BASE & BR_BA) |
- (BR_MS_GPCM | BR_PS_32 | BR_V);
-
- return (0);
-}
-
-/*************************************************************************
- * Detect the size of a ddr bank. Sets CS bounds and CS config accordingly.
- */
-static long int get_ddr_bank_size(short cs, volatile long *base)
-{
- /* This array lists all valid DDR SDRAM configurations, with
- * Bank sizes in bytes. (Refer to Table 9-27 in the MPC8349E RM).
- * The last entry has to to have size equal 0 and is igonred during
- * autodection. Bank sizes must be in increasing order of size
- */
- struct {
- long row;
- long col;
- long size;
- } conf[] = {
- {CSCONFIG_ROW_BIT_12, CSCONFIG_COL_BIT_8, 32 << 20},
- {CSCONFIG_ROW_BIT_12, CSCONFIG_COL_BIT_9, 64 << 20},
- {CSCONFIG_ROW_BIT_12, CSCONFIG_COL_BIT_10, 128 << 20},
- {CSCONFIG_ROW_BIT_13, CSCONFIG_COL_BIT_9, 128 << 20},
- {CSCONFIG_ROW_BIT_13, CSCONFIG_COL_BIT_10, 256 << 20},
- {CSCONFIG_ROW_BIT_13, CSCONFIG_COL_BIT_11, 512 << 20},
- {CSCONFIG_ROW_BIT_14, CSCONFIG_COL_BIT_10, 512 << 20},
- {CSCONFIG_ROW_BIT_14, CSCONFIG_COL_BIT_11, 1024 << 20},
- {0, 0, 0}
- };
-
- int i;
- int detected;
- long size;
-
- detected = -1;
- for(i = 0; conf[i].size != 0; ++i) {
-
- /* set sdram bank configuration */
- set_cs_config(cs, CSCONFIG_EN | conf[i].col | conf[i].row);
-
- debug("Getting RAM size...\n");
- size = get_ram_size(base, DDR_MAX_SIZE_PER_CS);
-
- if((size == conf[i].size) && (i == detected + 1))
- detected = i;
-
- debug("Trying %ld x %ld (%ld MiB) at addr %p, detected: %ld MiB\n",
- conf[i].row,
- conf[i].col,
- conf[i].size >> 20,
- base,
- size >> 20);
- }
-
- if(detected == -1){
- /* disable empty cs */
- debug("\nNo valid configurations for CS%d, disabling...\n", cs);
- set_cs_config(cs, 0);
- return 0;
- }
-
- debug("\nDetected configuration %ld x %ld (%ld MiB) at addr %p\n",
- conf[detected].row, conf[detected].col, conf[detected].size >> 20, base);
-
- /* configure cs ro detected params */
- set_cs_config(cs, CSCONFIG_EN | conf[detected].row |
- conf[detected].col);
-
- set_cs_bounds(cs, (long)base, conf[detected].size);
-
- return(conf[detected].size);
-}
-
-/**************************************************************************
- * Sets DDR bank CS bounds.
- */
-static void set_cs_bounds(short cs, long base, long size)
-{
- debug("Setting bounds %08x, %08x for cs %d\n", base, size, cs);
- if(size == 0){
- im->ddr.csbnds[cs].csbnds = 0x00000000;
- } else {
- im->ddr.csbnds[cs].csbnds =
- ((base >> CSBNDS_SA_SHIFT) & CSBNDS_SA) |
- (((base + size - 1) >> CSBNDS_EA_SHIFT) &
- CSBNDS_EA);
- }
- SYNC;
-}
-
-/**************************************************************************
- * Sets DDR banks CS configuration.
- * config == 0x00000000 disables the CS.
- */
-static void set_cs_config(short cs, long config)
-{
- debug("Setting config %08x for cs %d\n", config, cs);
- im->ddr.cs_config[cs] = config;
- SYNC;
-}
-
-/**************************************************************************
- * Sets DDR clocks, timings and configuration.
- */
-static void set_ddr_config(void) {
- /* clock control */
- im->ddr.sdram_clk_cntl = DDR_SDRAM_CLK_CNTL_SS_EN |
- DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05;
- SYNC;
-
- /* timing configuration */
- im->ddr.timing_cfg_1 =
- (4 << TIMING_CFG1_PRETOACT_SHIFT) |
- (7 << TIMING_CFG1_ACTTOPRE_SHIFT) |
- (4 << TIMING_CFG1_ACTTORW_SHIFT) |
- (5 << TIMING_CFG1_REFREC_SHIFT) |
- (3 << TIMING_CFG1_WRREC_SHIFT) |
- (3 << TIMING_CFG1_ACTTOACT_SHIFT) |
- (1 << TIMING_CFG1_WRTORD_SHIFT) |
- (TIMING_CFG1_CASLAT & TIMING_CASLAT);
-
- im->ddr.timing_cfg_2 =
- TIMING_CFG2_CPO_DEF |
- (2 << TIMING_CFG2_WR_DATA_DELAY_SHIFT);
- SYNC;
-
- /* don't enable DDR controller yet */
- im->ddr.sdram_cfg =
- SDRAM_CFG_SREN |
- SDRAM_CFG_SDRAM_TYPE_DDR;
- SYNC;
-
- /* Set SDRAM mode */
- im->ddr.sdram_mode =
- ((DDR_MODE_EXT_MODEREG | DDR_MODE_WEAK) <<
- SDRAM_MODE_ESD_SHIFT) |
- ((DDR_MODE_MODEREG | DDR_MODE_BLEN_4) <<
- SDRAM_MODE_SD_SHIFT) |
- ((DDR_MODE_CASLAT << SDRAM_MODE_SD_SHIFT) &
- MODE_CASLAT);
- SYNC;
-
- /* Set fast SDRAM refresh rate */
- im->ddr.sdram_interval =
- (DDR_REFINT_166MHZ_7US << SDRAM_INTERVAL_REFINT_SHIFT) |
- (DDR_BSTOPRE << SDRAM_INTERVAL_BSTOPRE_SHIFT);
- SYNC;
-}
diff --git a/board/tqm834x/u-boot.lds b/board/tqm834x/u-boot.lds
deleted file mode 100644
index 020cfa66f8..0000000000
--- a/board/tqm834x/u-boot.lds
+++ /dev/null
@@ -1,122 +0,0 @@
-/*
- * Copyright 2004 Freescale Semiconductor, Inc.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc83xx/start.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
-ENTRY(_start)
diff --git a/board/tqm85xx/Makefile b/board/tqm85xx/Makefile
deleted file mode 100644
index 3933d46f0c..0000000000
--- a/board/tqm85xx/Makefile
+++ /dev/null
@@ -1,48 +0,0 @@
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := $(BOARD).o sdram.o
-SOBJS := init.o
-#SOBJS :=
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(OBJS) $(SOBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/tqm85xx/config.mk b/board/tqm85xx/config.mk
deleted file mode 100644
index 52e84ad772..0000000000
--- a/board/tqm85xx/config.mk
+++ /dev/null
@@ -1,29 +0,0 @@
-# Copyright 2004 Freescale Semiconductor.
-# Modified by Xianghua Xiao, X.Xiao@motorola.com
-# (C) Copyright 2002,Motorola Inc.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# tqm85xx board
-# default CCARBAR is at 0xff700000
-# assume U-Boot is less than 256k
-#
-TEXT_BASE = 0xfffc0000
diff --git a/board/tqm85xx/init.S b/board/tqm85xx/init.S
deleted file mode 100644
index 1f610385e6..0000000000
--- a/board/tqm85xx/init.S
+++ /dev/null
@@ -1,234 +0,0 @@
-/*
- * Copyright 2004 Freescale Semiconductor.
- * Copyright (C) 2002,2003, Motorola Inc.
- * Xianghua Xiao <X.Xiao@motorola.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <ppc_asm.tmpl>
-#include <ppc_defs.h>
-#include <asm/cache.h>
-#include <asm/mmu.h>
-#include <config.h>
-#include <mpc85xx.h>
-
-
-/*
- * TLB0 and TLB1 Entries
- *
- * Out of reset, TLB1's Entry 0 maps the highest 4K for CCSRBAR.
- * However, CCSRBAR is then relocated to CFG_CCSRBAR right after
- * these TLB entries are established.
- *
- * The TLB entries for DDR are dynamically setup in spd_sdram()
- * and use TLB1 Entries 8 through 15 as needed according to the
- * size of DDR memory.
- *
- * MAS0: tlbsel, esel, nv
- * MAS1: valid, iprot, tid, ts, tsize
- * MAS2: epn, sharen, x0, x1, w, i, m, g, e
- * MAS3: rpn, u0-u3, ux, sx, uw, sw, ur, sr
- */
-
-#define entry_start \
- mflr r1 ; \
- bl 0f ;
-
-#define entry_end \
-0: mflr r0 ; \
- mtlr r1 ; \
- blr ;
-
-
- .section .bootpg, "ax"
- .globl tlb1_entry
-tlb1_entry:
- entry_start
-
- /*
- * Number of TLB0 and TLB1 entries in the following table
- */
- .long 13
-
- /*
- * TLB0 16K Cacheable, non-guarded
- * 0xd001_0000 16K Temporary Global data for initialization
- *
- * Use four 4K TLB0 entries. These entries must be cacheable
- * as they provide the bootstrap memory before the memory
- * controler and real memory have been configured.
- *
- * These entries end up at TLB0 Indicies 0x10, 0x14, 0x18 and 0x1c,
- * and must not collide with other TLB0 entries.
- */
- .long TLB1_MAS0(0, 0, 0)
- .long TLB1_MAS1(1, 0, 0, 0, 0)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_INIT_RAM_ADDR),
- 0,0,0,0,0,0,0,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_INIT_RAM_ADDR),
- 0,0,0,0,0,1,0,1,0,1)
-
- .long TLB1_MAS0(0, 0, 0)
- .long TLB1_MAS1(1, 0, 0, 0, 0)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_INIT_RAM_ADDR + 4 * 1024),
- 0,0,0,0,0,0,0,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_INIT_RAM_ADDR + 4 * 1024),
- 0,0,0,0,0,1,0,1,0,1)
-
- .long TLB1_MAS0(0, 0, 0)
- .long TLB1_MAS1(1, 0, 0, 0, 0)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_INIT_RAM_ADDR + 8 * 1024),
- 0,0,0,0,0,0,0,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_INIT_RAM_ADDR + 8 * 1024),
- 0,0,0,0,0,1,0,1,0,1)
-
- .long TLB1_MAS0(0, 0, 0)
- .long TLB1_MAS1(1, 0, 0, 0, 0)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_INIT_RAM_ADDR + 12 * 1024),
- 0,0,0,0,0,0,0,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_INIT_RAM_ADDR + 12 * 1024),
- 0,0,0,0,0,1,0,1,0,1)
-
-
- /*
- * TLB 0, 1: 128M Non-cacheable, guarded
- * 0xf8000000 128M FLASH
- * Out of reset this entry is only 4K.
- */
- .long TLB1_MAS0(1, 1, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_64M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_FLASH_BASE), 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_FLASH_BASE), 0,0,0,0,0,1,0,1,0,1)
- .long TLB1_MAS0(1, 0, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_64M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_FLASH_BASE+0x4000000), 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_FLASH_BASE+0x4000000), 0,0,0,0,0,1,0,1,0,1)
-
- /*
- * TLB 2: 256M Non-cacheable, guarded
- * 0x80000000 256M PCI1 MEM First half
- */
- .long TLB1_MAS0(1, 2, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_PCI1_MEM_BASE), 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_PCI1_MEM_BASE), 0,0,0,0,0,1,0,1,0,1)
-
- /*
- * TLB 3: 256M Non-cacheable, guarded
- * 0x90000000 256M PCI1 MEM Second half
- */
- .long TLB1_MAS0(1, 3, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_PCI1_MEM_BASE + 0x10000000),
- 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_PCI1_MEM_BASE + 0x10000000),
- 0,0,0,0,0,1,0,1,0,1)
-
- /*
- * TLB 4: 256M Non-cacheable, guarded
- * 0xc0000000 256M Rapid IO MEM First half
- */
- .long TLB1_MAS0(1, 4, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_RIO_MEM_BASE), 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_RIO_MEM_BASE), 0,0,0,0,0,1,0,1,0,1)
-
- /*
- * TLB 5: 256M Non-cacheable, guarded
- * 0xd0000000 256M Rapid IO MEM Second half
- */
- .long TLB1_MAS0(1, 5, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_RIO_MEM_BASE + 0x10000000),
- 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_RIO_MEM_BASE + 0x10000000),
- 0,0,0,0,0,1,0,1,0,1)
-
- /*
- * TLB 6: 64M Non-cacheable, guarded
- * 0xe000_0000 1M CCSRBAR
- * 0xe200_0000 16M PCI1 IO
- */
- .long TLB1_MAS0(1, 6, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_64M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_CCSRBAR), 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_CCSRBAR), 0,0,0,0,0,1,0,1,0,1)
-
- /*
- * TLB 7+8: 512M DDR, cache disabled (needed for memory test)
- * 0x00000000 512M DDR System memory
- * Without SPD EEPROM configured DDR, this must be setup manually.
- * Make sure the TLB count at the top of this table is correct.
- * Likely it needs to be increased by two for these entries.
- */
- .long TLB1_MAS0(1, 7, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_DDR_SDRAM_BASE), 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_DDR_SDRAM_BASE), 0,0,0,0,0,1,0,1,0,1)
- .long TLB1_MAS0(1, 8, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_DDR_SDRAM_BASE+0x10000000), 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_DDR_SDRAM_BASE+0x10000000), 0,0,0,0,0,1,0,1,0,1)
-
- entry_end
-
-/*
- * LAW(Local Access Window) configuration:
- *
- * 0x0000_0000 0x7fff_ffff DDR 2G
- * 0x8000_0000 0x9fff_ffff PCI1 MEM 512M
- * 0xc000_0000 0xdfff_ffff RapidIO 512M
- * 0xe000_0000 0xe000_ffff CCSR 1M
- * 0xe200_0000 0xe2ff_ffff PCI1 IO 16M
- * 0xf800_0000 0xf80f_ffff BCSR 1M
- * 0xfe00_0000 0xffff_ffff FLASH (boot bank) 32M
- *
- * Notes:
- * CCSRBAR and L2-as-SRAM don't need a configured Local Access Window.
- * If flash is 8M at default position (last 8M), no LAW needed.
- */
-
-#define LAWBAR0 ((CFG_DDR_SDRAM_BASE>>12) & 0xfffff)
-#define LAWAR0 (LAWAR_EN | LAWAR_TRGT_IF_DDR | (LAWAR_SIZE & LAWAR_SIZE_512M))
-
-#define LAWBAR1 ((CFG_PCI1_MEM_BASE>>12) & 0xfffff)
-#define LAWAR1 (LAWAR_EN | LAWAR_TRGT_IF_PCIX | (LAWAR_SIZE & LAWAR_SIZE_512M))
-
-#define LAWBAR2 ((CFG_LBC_FLASH_BASE>>12) & 0xfffff)
-#define LAWAR2 (LAWAR_EN | LAWAR_TRGT_IF_LBC | (LAWAR_SIZE & LAWAR_SIZE_128M))
-
-#define LAWBAR3 ((CFG_PCI1_IO_BASE>>12) & 0xfffff)
-#define LAWAR3 (LAWAR_EN | LAWAR_TRGT_IF_PCIX | (LAWAR_SIZE & LAWAR_SIZE_16M))
-
-/*
- * Rapid IO at 0xc000_0000 for 512 M
- */
-#define LAWBAR4 ((CFG_RIO_MEM_BASE>>12) & 0xfffff)
-#define LAWAR4 (LAWAR_EN | LAWAR_TRGT_IF_RIO | (LAWAR_SIZE & LAWAR_SIZE_512M))
-
-
- .section .bootpg, "ax"
- .globl law_entry
-law_entry:
- entry_start
- .long 0x05
- .long LAWBAR0,LAWAR0,LAWBAR1,LAWAR1,LAWBAR2,LAWAR2,LAWBAR3,LAWAR3
- .long LAWBAR4,LAWAR4
- entry_end
diff --git a/board/tqm85xx/sdram.c b/board/tqm85xx/sdram.c
deleted file mode 100644
index 9c1f087687..0000000000
--- a/board/tqm85xx/sdram.c
+++ /dev/null
@@ -1,226 +0,0 @@
-/*
- * (C) Copyright 2005
- * Stefan Roese, DENX Software Engineering, sr@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-
-#include <common.h>
-#include <asm/processor.h>
-#include <asm/immap_85xx.h>
-#include <asm/processor.h>
-#include <asm/mmu.h>
-#include <spd.h>
-
-struct sdram_conf_s {
- unsigned long size;
- unsigned long reg;
-};
-
-typedef struct sdram_conf_s sdram_conf_t;
-
-sdram_conf_t ddr_cs_conf[] = {
- {(512 << 20), 0x80000202}, /* 512MB, 14x10(4) */
- {(256 << 20), 0x80000102}, /* 256MB, 13x10(4) */
- {(128 << 20), 0x80000101}, /* 128MB, 13x9(4) */
- {(64 << 20), 0x80000001}, /* 64MB, 12x9(4) */
-};
-
-#define N_DDR_CS_CONF (sizeof(ddr_cs_conf) / sizeof(ddr_cs_conf[0]))
-
-int cas_latency(void);
-
-/*
- * Autodetect onboard DDR SDRAM on 85xx platforms
- *
- * NOTE: Some of the hardcoded values are hardware dependant,
- * so this should be extended for other future boards
- * using this routine!
- */
-long int sdram_setup(int casl)
-{
- int i;
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile ccsr_ddr_t *ddr = &immap->im_ddr;
- unsigned long cfg_ddr_timing1;
- unsigned long cfg_ddr_mode;
-
- /*
- * Disable memory controller.
- */
- ddr->cs0_config = 0;
- ddr->sdram_cfg = 0;
-
- switch (casl) {
- case 20:
- cfg_ddr_timing1 = 0x47405331 | (3 << 16);
- cfg_ddr_mode = 0x40020002 | (2 << 4);
- break;
-
- case 25:
- cfg_ddr_timing1 = 0x47405331 | (4 << 16);
- cfg_ddr_mode = 0x40020002 | (6 << 4);
- break;
-
- case 30:
- default:
- cfg_ddr_timing1 = 0x47405331 | (5 << 16);
- cfg_ddr_mode = 0x40020002 | (3 << 4);
- break;
- }
-
- ddr->cs0_bnds = (ddr_cs_conf[0].size - 1) >> 24;
- ddr->cs0_config = ddr_cs_conf[0].reg;
- ddr->timing_cfg_1 = cfg_ddr_timing1;
- ddr->timing_cfg_2 = 0x00000800; /* P9-45,may need tuning */
- ddr->sdram_mode = cfg_ddr_mode;
- ddr->sdram_interval = 0x05160100; /* autocharge,no open page */
- ddr->err_disable = 0x0000000D;
-
- asm ("sync;isync;msync");
- udelay(1000);
-
- ddr->sdram_cfg = 0xc2000000; /* unbuffered,no DYN_PWR */
- asm ("sync; isync; msync");
- udelay(1000);
-
- for (i=0; i<N_DDR_CS_CONF; i++) {
- ddr->cs0_config = ddr_cs_conf[i].reg;
-
- if (get_ram_size(0, ddr_cs_conf[i].size) == ddr_cs_conf[i].size) {
- /*
- * OK, size detected -> all done
- */
- return ddr_cs_conf[i].size;
- }
- }
-
- return 0; /* nothing found ! */
-}
-
-void board_add_ram_info(int use_default)
-{
- int casl;
-
- if (use_default)
- casl = CONFIG_DDR_DEFAULT_CL;
- else
- casl = cas_latency();
-
- puts(" (CL=");
- switch (casl) {
- case 20:
- puts("2)");
- break;
-
- case 25:
- puts("2.5)");
- break;
-
- case 30:
- puts("3)");
- break;
- }
-}
-
-long int initdram (int board_type)
-{
- long dram_size = 0;
- int casl;
-
-#if defined(CONFIG_DDR_DLL)
- /*
- * This DLL-Override only used on TQM8540 and TQM8560
- */
- {
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile ccsr_gur_t *gur= &immap->im_gur;
- int i,x;
-
- x = 10;
-
- /*
- * Work around to stabilize DDR DLL
- */
- gur->ddrdllcr = 0x81000000;
- asm("sync;isync;msync");
- udelay (200);
- while (gur->ddrdllcr != 0x81000100) {
- gur->devdisr = gur->devdisr | 0x00010000;
- asm("sync;isync;msync");
- for (i=0; i<x; i++)
- ;
- gur->devdisr = gur->devdisr & 0xfff7ffff;
- asm("sync;isync;msync");
- x++;
- }
- }
-#endif
-
- casl = cas_latency();
- dram_size = sdram_setup(casl);
- if ((dram_size == 0) && (casl != CONFIG_DDR_DEFAULT_CL)) {
- /*
- * Try again with default CAS latency
- */
- puts("Problem with CAS lantency");
- board_add_ram_info(1);
- puts(", using default CL!\n");
- casl = CONFIG_DDR_DEFAULT_CL;
- dram_size = sdram_setup(casl);
- puts(" ");
- }
-
- return dram_size;
-}
-
-#if defined(CFG_DRAM_TEST)
-int testdram (void)
-{
- uint *pstart = (uint *) CFG_MEMTEST_START;
- uint *pend = (uint *) CFG_MEMTEST_END;
- uint *p;
-
- printf ("SDRAM test phase 1:\n");
- for (p = pstart; p < pend; p++)
- *p = 0xaaaaaaaa;
-
- for (p = pstart; p < pend; p++) {
- if (*p != 0xaaaaaaaa) {
- printf ("SDRAM test fails at: %08x\n", (uint) p);
- return 1;
- }
- }
-
- printf ("SDRAM test phase 2:\n");
- for (p = pstart; p < pend; p++)
- *p = 0x55555555;
-
- for (p = pstart; p < pend; p++) {
- if (*p != 0x55555555) {
- printf ("SDRAM test fails at: %08x\n", (uint) p);
- return 1;
- }
- }
-
- printf ("SDRAM test passed.\n");
- return 0;
-}
-#endif
diff --git a/board/tqm85xx/tqm85xx.c b/board/tqm85xx/tqm85xx.c
deleted file mode 100644
index 13ea6f48dd..0000000000
--- a/board/tqm85xx/tqm85xx.c
+++ /dev/null
@@ -1,411 +0,0 @@
-/*
- * (C) Copyright 2005
- * Stefan Roese, DENX Software Engineering, sr@denx.de.
- *
- * Copyright 2004 Freescale Semiconductor.
- * (C) Copyright 2002,2003, Motorola Inc.
- * Xianghua Xiao, (X.Xiao@motorola.com)
- *
- * (C) Copyright 2002 Scott McNutt <smcnutt@artesyncp.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-
-#include <common.h>
-#include <pci.h>
-#include <asm/processor.h>
-#include <asm/immap_85xx.h>
-#include <ioports.h>
-#include <spd.h>
-#include <flash.h>
-
-extern flash_info_t flash_info[]; /* FLASH chips info */
-
-void local_bus_init (void);
-long int fixed_sdram (void);
-ulong flash_get_size (ulong base, int banknum);
-
-#ifdef CONFIG_CPM2
-/*
- * I/O Port configuration table
- *
- * if conf is 1, then that port pin will be configured at boot time
- * according to the five values podr/pdir/ppar/psor/pdat for that entry
- */
-
-const iop_conf_t iop_conf_tab[4][32] = {
-
- /* Port A configuration */
- { /* conf ppar psor pdir podr pdat */
- /* PA31 */ { 1, 1, 1, 0, 0, 0 }, /* FCC1 MII COL */
- /* PA30 */ { 1, 1, 1, 0, 0, 0 }, /* FCC1 MII CRS */
- /* PA29 */ { 1, 1, 1, 1, 0, 0 }, /* FCC1 MII TX_ER */
- /* PA28 */ { 1, 1, 1, 1, 0, 0 }, /* FCC1 MII TX_EN */
- /* PA27 */ { 1, 1, 1, 0, 0, 0 }, /* FCC1 MII RX_DV */
- /* PA26 */ { 1, 1, 1, 0, 0, 0 }, /* FCC1 MII RX_ER */
- /* PA25 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[0] */
- /* PA24 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[1] */
- /* PA23 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[2] */
- /* PA22 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[3] */
- /* PA21 */ { 1, 1, 0, 1, 0, 0 }, /* FCC1 MII TxD[3] */
- /* PA20 */ { 1, 1, 0, 1, 0, 0 }, /* FCC1 MII TxD[2] */
- /* PA19 */ { 1, 1, 0, 1, 0, 0 }, /* FCC1 MII TxD[1] */
- /* PA18 */ { 1, 1, 0, 1, 0, 0 }, /* FCC1 MII TxD[0] */
- /* PA17 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 MII RxD[0] */
- /* PA16 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 MII RxD[1] */
- /* PA15 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 MII RxD[2] */
- /* PA14 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 MII RxD[3] */
- /* PA13 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[3] */
- /* PA12 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[2] */
- /* PA11 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[1] */
- /* PA10 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[0] */
- /* PA9 */ { 0, 1, 1, 1, 0, 0 }, /* FCC1 L1TXD */
- /* PA8 */ { 0, 1, 1, 0, 0, 0 }, /* FCC1 L1RXD */
- /* PA7 */ { 0, 0, 0, 1, 0, 0 }, /* PA7 */
- /* PA6 */ { 0, 1, 1, 1, 0, 0 }, /* TDM A1 L1RSYNC */
- /* PA5 */ { 0, 0, 0, 1, 0, 0 }, /* PA5 */
- /* PA4 */ { 0, 0, 0, 1, 0, 0 }, /* PA4 */
- /* PA3 */ { 0, 0, 0, 1, 0, 0 }, /* PA3 */
- /* PA2 */ { 0, 0, 0, 1, 0, 0 }, /* PA2 */
- /* PA1 */ { 0, 0, 0, 0, 0, 0 }, /* FREERUN */
- /* PA0 */ { 0, 0, 0, 1, 0, 0 } /* PA0 */
- },
-
- /* Port B configuration */
- { /* conf ppar psor pdir podr pdat */
- /* PB31 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TX_ER */
- /* PB30 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_DV */
- /* PB29 */ { 1, 1, 1, 1, 0, 0 }, /* FCC2 MII TX_EN */
- /* PB28 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_ER */
- /* PB27 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII COL */
- /* PB26 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII CRS */
- /* PB25 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[3] */
- /* PB24 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[2] */
- /* PB23 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[1] */
- /* PB22 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[0] */
- /* PB21 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[0] */
- /* PB20 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[1] */
- /* PB19 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[2] */
- /* PB18 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[3] */
- /* PB17 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3:RX_DIV */
- /* PB16 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3:RX_ERR */
- /* PB15 */ { 1, 1, 0, 1, 0, 0 }, /* FCC3:TX_ERR */
- /* PB14 */ { 1, 1, 0, 1, 0, 0 }, /* FCC3:TX_EN */
- /* PB13 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3:COL */
- /* PB12 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3:CRS */
- /* PB11 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3:RXD */
- /* PB10 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3:RXD */
- /* PB9 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3:RXD */
- /* PB8 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3:RXD */
- /* PB7 */ { 1, 1, 0, 1, 0, 0 }, /* FCC3:TXD */
- /* PB6 */ { 1, 1, 0, 1, 0, 0 }, /* FCC3:TXD */
- /* PB5 */ { 1, 1, 0, 1, 0, 0 }, /* FCC3:TXD */
- /* PB4 */ { 1, 1, 0, 1, 0, 0 }, /* FCC3:TXD */
- /* PB3 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PB2 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PB1 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PB0 */ { 0, 0, 0, 0, 0, 0 } /* pin doesn't exist */
- },
-
- /* Port C */
- { /* conf ppar psor pdir podr pdat */
- /* PC31 */ { 0, 0, 0, 1, 0, 0 }, /* PC31 */
- /* PC30 */ { 0, 0, 0, 1, 0, 0 }, /* PC30 */
- /* PC29 */ { 0, 1, 1, 0, 0, 0 }, /* SCC1 EN *CLSN */
- /* PC28 */ { 0, 0, 0, 1, 0, 0 }, /* PC28 */
- /* PC27 */ { 0, 0, 0, 1, 0, 0 }, /* UART Clock in */
- /* PC26 */ { 0, 0, 0, 1, 0, 0 }, /* PC26 */
- /* PC25 */ { 0, 0, 0, 1, 0, 0 }, /* PC25 */
- /* PC24 */ { 0, 0, 0, 1, 0, 0 }, /* PC24 */
- /* PC23 */ { 0, 1, 0, 1, 0, 0 }, /* ATMTFCLK */
- /* PC22 */ { 0, 1, 0, 0, 0, 0 }, /* ATMRFCLK */
- /* PC21 */ { 1, 1, 0, 0, 0, 0 }, /* SCC1 EN RXCLK */
- /* PC20 */ { 1, 1, 0, 0, 0, 0 }, /* SCC1 EN TXCLK */
- /* PC19 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_CLK CLK13 */
- /* PC18 */ { 1, 1, 0, 0, 0, 0 }, /* FCC Tx Clock (CLK14) */
- /* PC17 */ { 1, 1, 0, 0, 0, 0 }, /* PC17 */
- /* PC16 */ { 1, 1, 0, 0, 0, 0 }, /* FCC Tx Clock (CLK16) */
- /* PC15 */ { 0, 1, 0, 0, 0, 0 }, /* PC15 */
- /* PC14 */ { 0, 1, 0, 0, 0, 0 }, /* SCC1 EN *CD */
- /* PC13 */ { 0, 1, 0, 0, 0, 0 }, /* PC13 */
- /* PC12 */ { 0, 1, 0, 1, 0, 0 }, /* PC12 */
- /* PC11 */ { 0, 0, 0, 1, 0, 0 }, /* LXT971 transmit control */
- /* PC10 */ { 0, 0, 0, 1, 0, 0 }, /* FETHMDC */
- /* PC9 */ { 0, 0, 0, 0, 0, 0 }, /* FETHMDIO */
- /* PC8 */ { 0, 0, 0, 1, 0, 0 }, /* PC8 */
- /* PC7 */ { 0, 0, 0, 1, 0, 0 }, /* PC7 */
- /* PC6 */ { 0, 0, 0, 1, 0, 0 }, /* PC6 */
- /* PC5 */ { 0, 0, 0, 1, 0, 0 }, /* PC5 */
- /* PC4 */ { 0, 0, 0, 1, 0, 0 }, /* PC4 */
- /* PC3 */ { 0, 0, 0, 1, 0, 0 }, /* PC3 */
- /* PC2 */ { 0, 0, 0, 1, 0, 1 }, /* ENET FDE */
- /* PC1 */ { 0, 0, 0, 1, 0, 0 }, /* ENET DSQE */
- /* PC0 */ { 0, 0, 0, 1, 0, 0 }, /* ENET LBK */
- },
-
- /* Port D */
- { /* conf ppar psor pdir podr pdat */
- /* PD31 */ { 1, 1, 0, 0, 0, 0 }, /* SCC1 EN RxD */
- /* PD30 */ { 1, 1, 1, 1, 0, 0 }, /* SCC1 EN TxD */
- /* PD29 */ { 1, 1, 0, 1, 0, 0 }, /* SCC1 EN TENA */
- /* PD28 */ { 1, 1, 0, 0, 0, 0 }, /* PD28 */
- /* PD27 */ { 1, 1, 0, 1, 0, 0 }, /* PD27 */
- /* PD26 */ { 1, 1, 0, 1, 0, 0 }, /* PD26 */
- /* PD25 */ { 0, 0, 0, 1, 0, 0 }, /* PD25 */
- /* PD24 */ { 0, 0, 0, 1, 0, 0 }, /* PD24 */
- /* PD23 */ { 0, 0, 0, 1, 0, 0 }, /* PD23 */
- /* PD22 */ { 0, 0, 0, 1, 0, 0 }, /* PD22 */
- /* PD21 */ { 0, 0, 0, 1, 0, 0 }, /* PD21 */
- /* PD20 */ { 0, 0, 0, 1, 0, 0 }, /* PD20 */
- /* PD19 */ { 0, 0, 0, 1, 0, 0 }, /* PD19 */
- /* PD18 */ { 0, 0, 0, 1, 0, 0 }, /* PD18 */
- /* PD17 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXPRTY */
- /* PD16 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXPRTY */
- /* PD15 */ { 0, 1, 1, 0, 1, 0 }, /* I2C SDA */
- /* PD14 */ { 0, 0, 0, 1, 0, 0 }, /* LED */
- /* PD13 */ { 0, 0, 0, 0, 0, 0 }, /* PD13 */
- /* PD12 */ { 0, 0, 0, 0, 0, 0 }, /* PD12 */
- /* PD11 */ { 0, 0, 0, 0, 0, 0 }, /* PD11 */
- /* PD10 */ { 0, 0, 0, 0, 0, 0 }, /* PD10 */
- /* PD9 */ { 0, 1, 0, 1, 0, 0 }, /* SMC1 TXD */
- /* PD8 */ { 0, 1, 0, 0, 0, 0 }, /* SMC1 RXD */
- /* PD7 */ { 0, 0, 0, 1, 0, 1 }, /* PD7 */
- /* PD6 */ { 0, 0, 0, 1, 0, 1 }, /* PD6 */
- /* PD5 */ { 0, 0, 0, 1, 0, 1 }, /* PD5 */
- /* PD4 */ { 0, 0, 0, 1, 0, 1 }, /* PD4 */
- /* PD3 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PD2 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PD1 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PD0 */ { 0, 0, 0, 0, 0, 0 } /* pin doesn't exist */
- }
-};
-#endif /* CONFIG_CPM2 */
-
-#define CASL_STRING1 "casl=xx"
-#define CASL_STRING2 "casl="
-
-static const int casl_table[] = { 20, 25, 30 };
-#define N_CASL (sizeof(casl_table) / sizeof(casl_table[0]))
-
-int cas_latency(void)
-{
- char *s = getenv("serial#");
- int casl;
- int val;
- int i;
-
- casl = CONFIG_DDR_DEFAULT_CL;
-
- if (s != NULL) {
- if (strncmp(s + strlen(s) - strlen(CASL_STRING1), CASL_STRING2,
- strlen(CASL_STRING2)) == 0) {
- val = simple_strtoul(s + strlen(s) - 2, NULL, 10);
-
- for (i=0; i<N_CASL; ++i) {
- if (val == casl_table[i]) {
- return val;
- }
- }
- }
- }
-
- return casl;
-}
-
-int checkboard (void)
-{
- char *s = getenv("serial#");
-
- printf("Board: %s", CONFIG_BOARDNAME);
- if (s != NULL) {
- puts(", serial# ");
- puts(s);
- }
- putc('\n');
-
-#ifdef CONFIG_PCI
- printf ("PCI1: 32 bit, %d MHz (compiled)\n",
- CONFIG_SYS_CLK_FREQ / 1000000);
-#else
- printf ("PCI1: disabled\n");
-#endif
-
- /*
- * Initialize local bus.
- */
- local_bus_init ();
-
- return 0;
-}
-
-int misc_init_r (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile ccsr_lbc_t *memctl = &immap->im_lbc;
-
- /*
- * Adjust flash start and offset to detected values
- */
- gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize;
- gd->bd->bi_flashoffset = 0;
-
- /*
- * Check if boot FLASH isn't max size
- */
- if (gd->bd->bi_flashsize < (0 - CFG_FLASH0)) {
- memctl->or0 = gd->bd->bi_flashstart | (CFG_OR0_PRELIM & 0x00007fff);
- memctl->br0 = gd->bd->bi_flashstart | (CFG_BR0_PRELIM & 0x00007fff);
-
- /*
- * Re-check to get correct base address
- */
- flash_get_size(gd->bd->bi_flashstart, CFG_MAX_FLASH_BANKS - 1);
- }
-
- /*
- * Check if only one FLASH bank is available
- */
- if (gd->bd->bi_flashsize != CFG_MAX_FLASH_BANKS * (0 - CFG_FLASH0)) {
- memctl->or1 = 0;
- memctl->br1 = 0;
-
- /*
- * Re-do flash protection upon new addresses
- */
- flash_protect (FLAG_PROTECT_CLEAR,
- gd->bd->bi_flashstart, 0xffffffff,
- &flash_info[CFG_MAX_FLASH_BANKS - 1]);
-
- /* Monitor protection ON by default */
- flash_protect (FLAG_PROTECT_SET,
- CFG_MONITOR_BASE, 0xffffffff,
- &flash_info[CFG_MAX_FLASH_BANKS - 1]);
-
- /* Environment protection ON by default */
- flash_protect (FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1,
- &flash_info[CFG_MAX_FLASH_BANKS - 1]);
-
- /* Redundant environment protection ON by default */
- flash_protect (FLAG_PROTECT_SET,
- CFG_ENV_ADDR_REDUND,
- CFG_ENV_ADDR_REDUND + CFG_ENV_SIZE_REDUND - 1,
- &flash_info[CFG_MAX_FLASH_BANKS - 1]);
- }
-
- return 0;
-}
-
-/*
- * Initialize Local Bus
- */
-void local_bus_init (void)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile ccsr_gur_t *gur = &immap->im_gur;
- volatile ccsr_lbc_t *lbc = &immap->im_lbc;
-
- uint clkdiv;
- uint lbc_hz;
- sys_info_t sysinfo;
-
- /*
- * Errata LBC11.
- * Fix Local Bus clock glitch when DLL is enabled.
- *
- * If localbus freq is < 66Mhz, DLL bypass mode must be used.
- * If localbus freq is > 133Mhz, DLL can be safely enabled.
- * Between 66 and 133, the DLL is enabled with an override workaround.
- */
-
- get_sys_info (&sysinfo);
- clkdiv = lbc->lcrr & 0x0f;
- lbc_hz = sysinfo.freqSystemBus / 1000000 / clkdiv;
-
- if (lbc_hz < 66) {
- lbc->lcrr = CFG_LBC_LCRR | 0x80000000; /* DLL Bypass */
- lbc->ltedr = 0xa4c80000; /* DK: !!! */
-
- } else if (lbc_hz >= 133) {
- lbc->lcrr = CFG_LBC_LCRR & (~0x80000000); /* DLL Enabled */
-
- } else {
- /*
- * On REV1 boards, need to change CLKDIV before enable DLL.
- * Default CLKDIV is 8, change it to 4 temporarily.
- */
- uint pvr = get_pvr ();
- uint temp_lbcdll = 0;
-
- if (pvr == PVR_85xx_REV1) {
- /* FIXME: Justify the high bit here. */
- lbc->lcrr = 0x10000004;
- }
-
- lbc->lcrr = CFG_LBC_LCRR & (~0x80000000); /* DLL Enabled */
- udelay (200);
-
- /*
- * Sample LBC DLL ctrl reg, upshift it to set the
- * override bits.
- */
- temp_lbcdll = gur->lbcdllcr;
- gur->lbcdllcr = (((temp_lbcdll & 0xff) << 16) | 0x80000000);
- asm ("sync;isync;msync");
- }
-}
-
-#if defined(CONFIG_PCI)
-/*
- * Initialize PCI Devices, report devices found.
- */
-
-#ifndef CONFIG_PCI_PNP
-static struct pci_config_table pci_mpc85xxads_config_table[] = {
- {PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
- PCI_IDSEL_NUMBER, PCI_ANY_ID,
- pci_cfgfunc_config_device, {PCI_ENET0_IOADDR,
- PCI_ENET0_MEMADDR,
- PCI_COMMAND_MEMORY |
- PCI_COMMAND_MASTER}},
- {}
-};
-#endif
-
-
-static struct pci_controller hose = {
-#ifndef CONFIG_PCI_PNP
- config_table:pci_mpc85xxads_config_table,
-#endif
-};
-
-#endif /* CONFIG_PCI */
-
-
-void pci_init_board (void)
-{
-#ifdef CONFIG_PCI
- extern void pci_mpc85xx_init (struct pci_controller *hose);
-
- pci_mpc85xx_init (&hose);
-#endif /* CONFIG_PCI */
-}
diff --git a/board/tqm85xx/u-boot.lds b/board/tqm85xx/u-boot.lds
deleted file mode 100644
index 4cc825bcdb..0000000000
--- a/board/tqm85xx/u-boot.lds
+++ /dev/null
@@ -1,150 +0,0 @@
-/*
- * (C) Copyright 2002,2003, Motorola,Inc.
- * Xianghua Xiao, X.Xiao@motorola.com.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- .resetvec 0xFFFFFFFC :
- {
- *(.resetvec)
- } = 0xffff
-
- .bootpg 0xFFFFF000 :
- {
- cpu/mpc85xx/start.o (.bootpg)
- board/tqm85xx/init.o (.bootpg)
- } = 0xffff
-
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc85xx/start.o (.text)
- board/tqm85xx/init.o (.text)
- cpu/mpc85xx/traps.o (.text)
- cpu/mpc85xx/interrupts.o (.text)
- cpu/mpc85xx/cpu_init.o (.text)
- cpu/mpc85xx/cpu.o (.text)
- cpu/mpc85xx/speed.o (.text)
- cpu/mpc85xx/pci.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/extable.o (.text)
- lib_generic/zlib.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/tqm8xx/Makefile b/board/tqm8xx/Makefile
deleted file mode 100644
index 2ff9b4dab2..0000000000
--- a/board/tqm8xx/Makefile
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# (C) Copyright 2000-2003
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o load_sernum_ethaddr.o
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/tqm8xx/config.mk b/board/tqm8xx/config.mk
deleted file mode 100644
index 9d6080b84a..0000000000
--- a/board/tqm8xx/config.mk
+++ /dev/null
@@ -1,28 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# TQM8xxL boards
-#
-
-TEXT_BASE = 0x40000000
diff --git a/board/tqm8xx/flash.c b/board/tqm8xx/flash.c
deleted file mode 100644
index 97bb5c3ee4..0000000000
--- a/board/tqm8xx/flash.c
+++ /dev/null
@@ -1,829 +0,0 @@
-/*
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#if 0
-#define DEBUG
-#endif
-
-#include <common.h>
-#include <mpc8xx.h>
-#include <environment.h>
-
-#include <asm/processor.h>
-
-#if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M)
-# ifndef CFG_OR_TIMING_FLASH_AT_50MHZ
-# define CFG_OR_TIMING_FLASH_AT_50MHZ (OR_ACS_DIV1 | OR_TRLX | OR_CSNT_SAM | \
- OR_SCY_2_CLK | OR_EHTR | OR_BI)
-# endif
-#endif /* CONFIG_TQM8xxL/M, !TQM866M */
-
-#ifndef CFG_ENV_ADDR
-#define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_ENV_OFFSET)
-#endif
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (vu_long *addr, flash_info_t *info);
-static int write_word (flash_info_t *info, ulong dest, ulong data);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- unsigned long size_b0, size_b1;
- int i;
-
-#ifdef CFG_OR_TIMING_FLASH_AT_50MHZ
- int scy, trlx, flash_or_timing, clk_diff;
-
- DECLARE_GLOBAL_DATA_PTR;
-
- scy = (CFG_OR_TIMING_FLASH_AT_50MHZ & OR_SCY_MSK) >> 4;
- if (CFG_OR_TIMING_FLASH_AT_50MHZ & OR_TRLX) {
- trlx = OR_TRLX;
- scy *= 2;
- } else
- trlx = 0;
-
- /* We assume that each 10MHz of bus clock require 1-clk SCY
- * adjustment.
- */
- clk_diff = (gd->bus_clk / 1000000) - 50;
-
- /* We need proper rounding here. This is what the "+5" and "-5"
- * are here for.
- */
- if (clk_diff >= 0)
- scy += (clk_diff + 5) / 10;
- else
- scy += (clk_diff - 5) / 10;
-
- /* For bus frequencies above 50MHz, we want to use relaxed timing
- * (OR_TRLX).
- */
- if (gd->bus_clk >= 50000000)
- trlx = OR_TRLX;
- else
- trlx = 0;
-
- if (trlx)
- scy /= 2;
-
- if (scy > 0xf)
- scy = 0xf;
- if (scy < 1)
- scy = 1;
-
- flash_or_timing = (scy << 4) | trlx |
- (CFG_OR_TIMING_FLASH_AT_50MHZ & ~(OR_TRLX | OR_SCY_MSK));
-#endif
- /* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* Static FLASH Bank configuration here - FIXME XXX */
-
- debug ("\n## Get flash bank 1 size @ 0x%08x\n",FLASH_BASE0_PRELIM);
-
- size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
-
- debug ("## Get flash bank 2 size @ 0x%08x\n",FLASH_BASE1_PRELIM);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size_b0, size_b0<<20);
- }
-
- size_b1 = flash_get_size((vu_long *)FLASH_BASE1_PRELIM, &flash_info[1]);
-
- debug ("## Prelim. Flash bank sizes: %08lx + 0x%08lx\n",size_b0,size_b1);
-
- if (size_b1 > size_b0) {
- printf ("## ERROR: "
- "Bank 1 (0x%08lx = %ld MB) > Bank 0 (0x%08lx = %ld MB)\n",
- size_b1, size_b1<<20,
- size_b0, size_b0<<20
- );
- flash_info[0].flash_id = FLASH_UNKNOWN;
- flash_info[1].flash_id = FLASH_UNKNOWN;
- flash_info[0].sector_count = -1;
- flash_info[1].sector_count = -1;
- flash_info[0].size = 0;
- flash_info[1].size = 0;
- return (0);
- }
-
- debug ("## Before remap: "
- "BR0: 0x%08x OR0: 0x%08x "
- "BR1: 0x%08x OR1: 0x%08x\n",
- memctl->memc_br0, memctl->memc_or0,
- memctl->memc_br1, memctl->memc_or1);
-
- /* Remap FLASH according to real size */
-#ifndef CFG_OR_TIMING_FLASH_AT_50MHZ
- memctl->memc_or0 = CFG_OR_TIMING_FLASH | (-size_b0 & OR_AM_MSK);
-#else
- memctl->memc_or0 = flash_or_timing | (-size_b0 & OR_AM_MSK);
-#endif
- memctl->memc_br0 = (CFG_FLASH_BASE & BR_BA_MSK) | BR_MS_GPCM | BR_V;
-
- debug ("## BR0: 0x%08x OR0: 0x%08x\n",
- memctl->memc_br0, memctl->memc_or0);
-
- /* Re-do sizing to get full correct info */
- size_b0 = flash_get_size((vu_long *)CFG_FLASH_BASE, &flash_info[0]);
-
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
- /* monitor protection ON by default */
- debug ("Protect monitor: %08lx ... %08lx\n",
- (ulong)CFG_MONITOR_BASE,
- (ulong)CFG_MONITOR_BASE + monitor_flash_len - 1);
-
- flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE + monitor_flash_len - 1,
- &flash_info[0]);
-#endif
-
-#ifdef CFG_ENV_IS_IN_FLASH
- /* ENV protection ON by default */
-# ifdef CFG_ENV_ADDR_REDUND
- debug ("Protect primary environment: %08lx ... %08lx\n",
- (ulong)CFG_ENV_ADDR,
- (ulong)CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1);
-# else
- debug ("Protect environment: %08lx ... %08lx\n",
- (ulong)CFG_ENV_ADDR,
- (ulong)CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1);
-# endif
-
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1,
- &flash_info[0]);
-#endif
-
-#ifdef CFG_ENV_ADDR_REDUND
- debug ("Protect redundand environment: %08lx ... %08lx\n",
- (ulong)CFG_ENV_ADDR_REDUND,
- (ulong)CFG_ENV_ADDR_REDUND + CFG_ENV_SECT_SIZE - 1);
-
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR_REDUND,
- CFG_ENV_ADDR_REDUND + CFG_ENV_SECT_SIZE - 1,
- &flash_info[0]);
-#endif
-
- if (size_b1) {
-#ifndef CFG_OR_TIMING_FLASH_AT_50MHZ
- memctl->memc_or1 = CFG_OR_TIMING_FLASH | (-size_b1 & 0xFFFF8000);
-#else
- memctl->memc_or1 = flash_or_timing | (-size_b1 & 0xFFFF8000);
-#endif
- memctl->memc_br1 = ((CFG_FLASH_BASE + size_b0) & BR_BA_MSK) |
- BR_MS_GPCM | BR_V;
-
- debug ("## BR1: 0x%08x OR1: 0x%08x\n",
- memctl->memc_br1, memctl->memc_or1);
-
- /* Re-do sizing to get full correct info */
- size_b1 = flash_get_size((vu_long *)(CFG_FLASH_BASE + size_b0),
- &flash_info[1]);
-
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
- /* monitor protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+monitor_flash_len-1,
- &flash_info[1]);
-#endif
-
-#ifdef CFG_ENV_IS_IN_FLASH
- /* ENV protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR+CFG_ENV_SIZE-1,
- &flash_info[1]);
-#endif
- } else {
- memctl->memc_br1 = 0; /* invalidate bank */
-
- flash_info[1].flash_id = FLASH_UNKNOWN;
- flash_info[1].sector_count = -1;
- flash_info[1].size = 0;
-
- debug ("## DISABLE BR1: 0x%08x OR1: 0x%08x\n",
- memctl->memc_br1, memctl->memc_or1);
- }
-
- debug ("## Final Flash bank sizes: %08lx + 0x%08lx\n",size_b0,size_b1);
-
- flash_info[0].size = size_b0;
- flash_info[1].size = size_b1;
-
- return (size_b0 + size_b1);
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD: printf ("AMD "); break;
- case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
- default: printf ("Unknown Vendor "); break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
-#ifdef CONFIG_TQM8xxM /* mirror bit flash */
- case FLASH_AMLV128U: printf ("AM29LV128ML (128Mbit, uniform sector size)\n");
- break;
- case FLASH_AMLV320U: printf ("AM29LV320ML (32Mbit, uniform sector size)\n");
- break;
- case FLASH_AMLV640U: printf ("AM29LV640ML (64Mbit, uniform sector size)\n");
- break;
- case FLASH_AMLV320B: printf ("AM29LV320MB (32Mbit, bottom boot sect)\n");
- break;
-# else /* ! TQM8xxM */
- case FLASH_AM400B: printf ("AM29LV400B (4 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM400T: printf ("AM29LV400T (4 Mbit, top boot sector)\n");
- break;
- case FLASH_AM800B: printf ("AM29LV800B (8 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM800T: printf ("AM29LV800T (8 Mbit, top boot sector)\n");
- break;
- case FLASH_AM320B: printf ("AM29LV320B (32 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM320T: printf ("AM29LV320T (32 Mbit, top boot sector)\n");
- break;
-#endif /* TQM8xxM */
- case FLASH_AM160B: printf ("AM29LV160B (16 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM160T: printf ("AM29LV160T (16 Mbit, top boot sector)\n");
- break;
- case FLASH_AMDL163B: printf ("AM29DL163B (16 Mbit, bottom boot sect)\n");
- break;
- default: printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " "
- );
- }
- printf ("\n");
- return;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-
-static ulong flash_get_size (vu_long *addr, flash_info_t *info)
-{
- short i;
- ulong value;
- ulong base = (ulong)addr;
-
- /* Write auto select command: read Manufacturer ID */
- addr[0x0555] = 0x00AA00AA;
- addr[0x02AA] = 0x00550055;
- addr[0x0555] = 0x00900090;
-
- value = addr[0];
-
- debug ("Manuf. ID @ 0x%08lx: 0x%08lx\n", (ulong)addr, value);
-
- switch (value) {
- case AMD_MANUFACT:
- debug ("Manufacturer: AMD\n");
- info->flash_id = FLASH_MAN_AMD;
- break;
- case FUJ_MANUFACT:
- debug ("Manufacturer: FUJITSU\n");
- info->flash_id = FLASH_MAN_FUJ;
- break;
- default:
- debug ("Manufacturer: *** unknown ***\n");
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- return (0); /* no or unknown flash */
- }
-
- value = addr[1]; /* device ID */
-
- debug ("Device ID @ 0x%08lx: 0x%08lx\n", (ulong)(&addr[1]), value);
-
- switch (value) {
-#ifdef CONFIG_TQM8xxM /* mirror bit flash */
- case AMD_ID_MIRROR:
- debug ("Mirror Bit flash: addr[14] = %08lX addr[15] = %08lX\n",
- addr[14], addr[15]);
- /* Special case for AMLV320MH/L */
- if ((addr[14] & 0x00ff00ff) == 0x001d001d &&
- (addr[15] & 0x00ff00ff) == 0x00000000) {
- debug ("Chip: AMLV320MH/L\n");
- info->flash_id += FLASH_AMLV320U;
- info->sector_count = 64;
- info->size = 0x00800000; /* => 8 MB */
- break;
- }
- switch(addr[14]) {
- case AMD_ID_LV128U_2:
- if (addr[15] != AMD_ID_LV128U_3) {
- debug ("Chip: AMLV128U -> unknown\n");
- info->flash_id = FLASH_UNKNOWN;
- } else {
- debug ("Chip: AMLV128U\n");
- info->flash_id += FLASH_AMLV128U;
- info->sector_count = 256;
- info->size = 0x02000000;
- }
- break; /* => 32 MB */
- case AMD_ID_LV640U_2:
- if (addr[15] != AMD_ID_LV640U_3) {
- debug ("Chip: AMLV640U -> unknown\n");
- info->flash_id = FLASH_UNKNOWN;
- } else {
- debug ("Chip: AMLV640U\n");
- info->flash_id += FLASH_AMLV640U;
- info->sector_count = 128;
- info->size = 0x01000000;
- }
- break; /* => 16 MB */
- case AMD_ID_LV320B_2:
- if (addr[15] != AMD_ID_LV320B_3) {
- debug ("Chip: AMLV320B -> unknown\n");
- info->flash_id = FLASH_UNKNOWN;
- } else {
- debug ("Chip: AMLV320B\n");
- info->flash_id += FLASH_AMLV320B;
- info->sector_count = 71;
- info->size = 0x00800000;
- }
- break; /* => 8 MB */
- default:
- debug ("Chip: *** unknown ***\n");
- info->flash_id = FLASH_UNKNOWN;
- break;
- }
- break;
-# else /* ! TQM8xxM */
- case AMD_ID_LV400T:
- info->flash_id += FLASH_AM400T;
- info->sector_count = 11;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case AMD_ID_LV400B:
- info->flash_id += FLASH_AM400B;
- info->sector_count = 11;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case AMD_ID_LV800T:
- info->flash_id += FLASH_AM800T;
- info->sector_count = 19;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case AMD_ID_LV800B:
- info->flash_id += FLASH_AM800B;
- info->sector_count = 19;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case AMD_ID_LV320T:
- info->flash_id += FLASH_AM320T;
- info->sector_count = 71;
- info->size = 0x00800000;
- break; /* => 8 MB */
-
- case AMD_ID_LV320B:
- info->flash_id += FLASH_AM320B;
- info->sector_count = 71;
- info->size = 0x00800000;
- break; /* => 8 MB */
-#endif /* TQM8xxM */
-
- case AMD_ID_LV160T:
- info->flash_id += FLASH_AM160T;
- info->sector_count = 35;
- info->size = 0x00400000;
- break; /* => 4 MB */
-
- case AMD_ID_LV160B:
- info->flash_id += FLASH_AM160B;
- info->sector_count = 35;
- info->size = 0x00400000;
- break; /* => 4 MB */
-
- case AMD_ID_DL163B:
- info->flash_id += FLASH_AMDL163B;
- info->sector_count = 39;
- info->size = 0x00400000;
- break; /* => 4 MB */
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- return (0); /* => no or unknown flash */
- }
-
- /* set up sector start address table */
- switch (value) {
-#ifdef CONFIG_TQM8xxM /* mirror bit flash */
- case AMD_ID_MIRROR:
- switch (info->flash_id & FLASH_TYPEMASK) {
- /* only known types here - no default */
- case FLASH_AMLV128U:
- case FLASH_AMLV640U:
- case FLASH_AMLV320U:
- for (i = 0; i < info->sector_count; i++) {
- info->start[i] = base;
- base += 0x20000;
- }
- break;
- case FLASH_AMLV320B:
- for (i = 0; i < info->sector_count; i++) {
- info->start[i] = base;
- /*
- * The first 8 sectors are 8 kB,
- * all the other ones are 64 kB
- */
- base += (i < 8)
- ? 2 * ( 8 << 10)
- : 2 * (64 << 10);
- }
- break;
- }
- break;
-# else /* ! TQM8xxM */
- case AMD_ID_LV400B:
- case AMD_ID_LV800B:
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00008000;
- info->start[2] = base + 0x0000C000;
- info->start[3] = base + 0x00010000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00020000) - 0x00060000;
- }
- break;
- case AMD_ID_LV400T:
- case AMD_ID_LV800T:
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- info->start[i--] = base + info->size - 0x00008000;
- info->start[i--] = base + info->size - 0x0000C000;
- info->start[i--] = base + info->size - 0x00010000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00020000;
- }
- break;
- case AMD_ID_LV320B:
- for (i = 0; i < info->sector_count; i++) {
- info->start[i] = base;
- /*
- * The first 8 sectors are 8 kB,
- * all the other ones are 64 kB
- */
- base += (i < 8)
- ? 2 * ( 8 << 10)
- : 2 * (64 << 10);
- }
- break;
- case AMD_ID_LV320T:
- for (i = 0; i < info->sector_count; i++) {
- info->start[i] = base;
- /*
- * The last 8 sectors are 8 kB,
- * all the other ones are 64 kB
- */
- base += (i < (info->sector_count - 8))
- ? 2 * (64 << 10)
- : 2 * ( 8 << 10);
- }
- break;
-#endif /* TQM8xxM */
- case AMD_ID_LV160B:
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00008000;
- info->start[2] = base + 0x0000C000;
- info->start[3] = base + 0x00010000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00020000) - 0x00060000;
- }
- break;
- case AMD_ID_LV160T:
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- info->start[i--] = base + info->size - 0x00008000;
- info->start[i--] = base + info->size - 0x0000C000;
- info->start[i--] = base + info->size - 0x00010000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00020000;
- }
- break;
- case AMD_ID_DL163B:
- for (i = 0; i < info->sector_count; i++) {
- info->start[i] = base;
- /*
- * The first 8 sectors are 8 kB,
- * all the other ones are 64 kB
- */
- base += (i < 8)
- ? 2 * ( 8 << 10)
- : 2 * (64 << 10);
- }
- break;
- default:
- return (0);
- break;
- }
-
-#if 0
- /* check for protected sectors */
- for (i = 0; i < info->sector_count; i++) {
- /* read sector protection at sector address, (A7 .. A0) = 0x02 */
- /* D0 = 1 if protected */
- addr = (volatile unsigned long *)(info->start[i]);
- info->protect[i] = addr[2] & 1;
- }
-#endif
-
- /*
- * Prevent writes to uninitialized FLASH.
- */
- if (info->flash_id != FLASH_UNKNOWN) {
- addr = (volatile unsigned long *)info->start[0];
-
- *addr = 0x00F000F0; /* reset bank */
- }
-
- return (info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- vu_long *addr = (vu_long*)(info->start[0]);
- int flag, prot, sect, l_sect;
- ulong start, now, last;
-
- debug ("flash_erase: first: %d last: %d\n", s_first, s_last);
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- if ((info->flash_id == FLASH_UNKNOWN) ||
- (info->flash_id > FLASH_AMD_COMP)) {
- printf ("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- l_sect = -1;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[0x0555] = 0x00AA00AA;
- addr[0x02AA] = 0x00550055;
- addr[0x0555] = 0x00800080;
- addr[0x0555] = 0x00AA00AA;
- addr[0x02AA] = 0x00550055;
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr = (vu_long*)(info->start[sect]);
- addr[0] = 0x00300030;
- l_sect = sect;
- }
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- /*
- * We wait for the last triggered sector
- */
- if (l_sect < 0)
- goto DONE;
-
- start = get_timer (0);
- last = start;
- addr = (vu_long*)(info->start[l_sect]);
- while ((addr[0] & 0x00800080) != 0x00800080) {
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- return 1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- }
-
-DONE:
- /* reset to read mode */
- addr = (volatile unsigned long *)info->start[0];
- addr[0] = 0x00F000F0; /* reset bank */
-
- printf (" done\n");
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int i, l, rc;
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
- for (; i<4 && cnt>0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = 0;
- for (i=0; i<4; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- return (write_word(info, wp, data));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word (flash_info_t *info, ulong dest, ulong data)
-{
- vu_long *addr = (vu_long*)(info->start[0]);
- ulong start;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*((vu_long *)dest) & data) != data) {
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[0x0555] = 0x00AA00AA;
- addr[0x02AA] = 0x00550055;
- addr[0x0555] = 0x00A000A0;
-
- *((vu_long *)dest) = data;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* data polling for D7 */
- start = get_timer (0);
- while ((*((vu_long *)dest) & 0x00800080) != (data & 0x00800080)) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- return (1);
- }
- }
- return (0);
-}
-
-/*-----------------------------------------------------------------------
- */
diff --git a/board/tqm8xx/load_sernum_ethaddr.c b/board/tqm8xx/load_sernum_ethaddr.c
deleted file mode 100644
index 143f36801d..0000000000
--- a/board/tqm8xx/load_sernum_ethaddr.c
+++ /dev/null
@@ -1,105 +0,0 @@
-/*
- * (C) Copyright 2000, 2001, 2002
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-
-/*-----------------------------------------------------------------------
- * Process Hardware Information Block:
- *
- * If we boot on a system fresh from factory, check if the Hardware
- * Information Block exists and save the information it contains.
- *
- * The TQM8xxL / TQM82xx Hardware Information Block is defined as
- * follows:
- * - located in first flash bank
- * - starts at offset 0x0003FFC0
- * - size 0x00000040
- *
- * Internal structure:
- * - sequence of ASCII character strings
- * - fields separated by a single space character (0x20)
- * - last field terminated by NUL character (0x00)
- * - remaining space filled with NUL characters (0x00)
- *
- * Fields in Hardware Information Block:
- * 1) Module Type
- * 2) Serial Number
- * 3) First MAC Address
- * 4) Number of additional MAC addresses
- */
-
-void load_sernum_ethaddr (void)
-{
- unsigned char *hwi;
- unsigned char serial [CFG_HWINFO_SIZE];
- unsigned char ethaddr[CFG_HWINFO_SIZE];
- unsigned short ih, is, ie, part;
-
- hwi = (unsigned char *)(CFG_FLASH_BASE + CFG_HWINFO_OFFSET);
- ih = is = ie = 0;
-
- if (*((unsigned long *)hwi) != (unsigned long)CFG_HWINFO_MAGIC) {
- return;
- }
-
- part = 1;
-
- /* copy serial # / MAC address */
- while ((hwi[ih] != '\0') && (ih < CFG_HWINFO_SIZE)) {
- if (hwi[ih] < ' ' || hwi[ih] > '~') { /* ASCII strings! */
- return;
- }
- switch (part) {
- default: /* Copy serial # */
- if (hwi[ih] == ' ') {
- ++part;
- }
- serial[is++] = hwi[ih];
- break;
- case 3: /* Copy MAC address */
- if (hwi[ih] == ' ') {
- ++part;
- break;
- }
- ethaddr[ie++] = hwi[ih];
- if ((ie % 3) == 2)
- ethaddr[ie++] = ':';
- break;
- }
- ++ih;
- }
- serial[is] = '\0';
- if (ie && ethaddr[ie-1] == ':')
- --ie;
- ethaddr[ie] = '\0';
-
- /* set serial# and ethaddr if not yet defined */
- if (getenv("serial#") == NULL) {
- setenv ((char *)"serial#", (char *)serial);
- }
-
- if (getenv("ethaddr") == NULL) {
- setenv ((char *)"ethaddr", (char *)ethaddr);
- }
-}
diff --git a/board/tqm8xx/tqm8xx.c b/board/tqm8xx/tqm8xx.c
deleted file mode 100644
index 017bdf9442..0000000000
--- a/board/tqm8xx/tqm8xx.c
+++ /dev/null
@@ -1,501 +0,0 @@
-/*
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#if 0
-#define DEBUG
-#endif
-
-#include <common.h>
-#include <mpc8xx.h>
-#ifdef CONFIG_PS2MULT
-#include <ps2mult.h>
-#endif
-
-/* ------------------------------------------------------------------------- */
-
-static long int dram_size (long int, long int *, long int);
-
-/* ------------------------------------------------------------------------- */
-
-#define _NOT_USED_ 0xFFFFFFFF
-
-const uint sdram_table[] =
-{
- /*
- * Single Read. (Offset 0 in UPMA RAM)
- */
- 0x1F0DFC04, 0xEEAFBC04, 0x11AF7C04, 0xEFBAFC00,
- 0x1FF5FC47, /* last */
- /*
- * SDRAM Initialization (offset 5 in UPMA RAM)
- *
- * This is no UPM entry point. The following definition uses
- * the remaining space to establish an initialization
- * sequence, which is executed by a RUN command.
- *
- */
- 0x1FF5FC34, 0xEFEABC34, 0x1FB57C35, /* last */
- /*
- * Burst Read. (Offset 8 in UPMA RAM)
- */
- 0x1F0DFC04, 0xEEAFBC04, 0x10AF7C04, 0xF0AFFC00,
- 0xF0AFFC00, 0xF1AFFC00, 0xEFBAFC00, 0x1FF5FC47, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Single Write. (Offset 18 in UPMA RAM)
- */
- 0x1F0DFC04, 0xEEABBC00, 0x01B27C04, 0x1FF5FC47, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Burst Write. (Offset 20 in UPMA RAM)
- */
- 0x1F0DFC04, 0xEEABBC00, 0x10A77C00, 0xF0AFFC00,
- 0xF0AFFC00, 0xE1BAFC04, 0x1FF5FC47, /* last */
- _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Refresh (Offset 30 in UPMA RAM)
- */
- 0x1FFD7C84, 0xFFFFFC04, 0xFFFFFC04, 0xFFFFFC04,
- 0xFFFFFC84, 0xFFFFFC07, /* last */
- _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Exception. (Offset 3c in UPMA RAM)
- */
- 0x7FFFFC07, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_,
-};
-
-/* ------------------------------------------------------------------------- */
-
-
-/*
- * Check Board Identity:
- *
- * Test TQ ID string (TQM8xx...)
- * If present, check for "L" type (no second DRAM bank),
- * otherwise "L" type is assumed as default.
- *
- * Set board_type to 'L' for "L" type, 'M' for "M" type, 0 else.
- */
-
-int checkboard (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- char *s = getenv ("serial#");
-
- puts ("Board: ");
-
- if (!s || strncmp (s, "TQM8", 4)) {
- puts ("### No HW ID - assuming TQM8xxL\n");
- return (0);
- }
-
- if ((*(s + 6) == 'L')) { /* a TQM8xxL type */
- gd->board_type = 'L';
- }
-
- if ((*(s + 6) == 'M')) { /* a TQM8xxM type */
- gd->board_type = 'M';
- }
-
- for (; *s; ++s) {
- if (*s == ' ')
- break;
- putc (*s);
- }
- putc ('\n');
-
- return (0);
-}
-
-/* ------------------------------------------------------------------------- */
-
-long int initdram (int board_type)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- long int size8, size9, size10;
- long int size_b0 = 0;
- long int size_b1 = 0;
-
- upmconfig (UPMA, (uint *) sdram_table,
- sizeof (sdram_table) / sizeof (uint));
-
- /*
- * Preliminary prescaler for refresh (depends on number of
- * banks): This value is selected for four cycles every 62.4 us
- * with two SDRAM banks or four cycles every 31.2 us with one
- * bank. It will be adjusted after memory sizing.
- */
- memctl->memc_mptpr = CFG_MPTPR_2BK_8K;
-
- /*
- * The following value is used as an address (i.e. opcode) for
- * the LOAD MODE REGISTER COMMAND during SDRAM initialisation. If
- * the port size is 32bit the SDRAM does NOT "see" the lower two
- * address lines, i.e. mar=0x00000088 -> opcode=0x00000022 for
- * MICRON SDRAMs:
- * -> 0 00 010 0 010
- * | | | | +- Burst Length = 4
- * | | | +----- Burst Type = Sequential
- * | | +------- CAS Latency = 2
- * | +----------- Operating Mode = Standard
- * +-------------- Write Burst Mode = Programmed Burst Length
- */
- memctl->memc_mar = 0x00000088;
-
- /*
- * Map controller banks 2 and 3 to the SDRAM banks 2 and 3 at
- * preliminary addresses - these have to be modified after the
- * SDRAM size has been determined.
- */
- memctl->memc_or2 = CFG_OR2_PRELIM;
- memctl->memc_br2 = CFG_BR2_PRELIM;
-
-#ifndef CONFIG_CAN_DRIVER
- if ((board_type != 'L') &&
- (board_type != 'M') ) { /* "L" and "M" type boards have only one bank SDRAM */
- memctl->memc_or3 = CFG_OR3_PRELIM;
- memctl->memc_br3 = CFG_BR3_PRELIM;
- }
-#endif /* CONFIG_CAN_DRIVER */
-
- memctl->memc_mamr = CFG_MAMR_8COL & (~(MAMR_PTAE)); /* no refresh yet */
-
- udelay (200);
-
- /* perform SDRAM initializsation sequence */
-
- memctl->memc_mcr = 0x80004105; /* SDRAM bank 0 */
- udelay (1);
- memctl->memc_mcr = 0x80004230; /* SDRAM bank 0 - execute twice */
- udelay (1);
-
-#ifndef CONFIG_CAN_DRIVER
- if ((board_type != 'L') &&
- (board_type != 'M') ) { /* "L" and "M" type boards have only one bank SDRAM */
- memctl->memc_mcr = 0x80006105; /* SDRAM bank 1 */
- udelay (1);
- memctl->memc_mcr = 0x80006230; /* SDRAM bank 1 - execute twice */
- udelay (1);
- }
-#endif /* CONFIG_CAN_DRIVER */
-
- memctl->memc_mamr |= MAMR_PTAE; /* enable refresh */
-
- udelay (1000);
-
- /*
- * Check Bank 0 Memory Size for re-configuration
- *
- * try 8 column mode
- */
- size8 = dram_size (CFG_MAMR_8COL, SDRAM_BASE2_PRELIM,
- SDRAM_MAX_SIZE);
- debug ("SDRAM Bank 0 in 8 column mode: %ld MB\n", size8 >> 20);
-
- udelay (1000);
-
- /*
- * try 9 column mode
- */
- size9 = dram_size (CFG_MAMR_9COL, SDRAM_BASE2_PRELIM,
- SDRAM_MAX_SIZE);
- debug ("SDRAM Bank 0 in 9 column mode: %ld MB\n", size9 >> 20);
-
- udelay(1000);
-
-#if defined(CFG_MAMR_10COL)
- /*
- * try 10 column mode
- */
- size10 = dram_size (CFG_MAMR_10COL, (ulong *) SDRAM_BASE2_PRELIM,
- SDRAM_MAX_SIZE);
- debug ("SDRAM Bank 0 in 10 column mode: %ld MB\n", size10 >> 20);
-#else
- size10 = 0;
-#endif /* CFG_MAMR_10COL */
-
- if ((size8 < size10) && (size9 < size10)) {
- size_b0 = size10;
- } else if ((size8 < size9) && (size10 < size9)) {
- size_b0 = size9;
- memctl->memc_mamr = CFG_MAMR_9COL;
- udelay (500);
- } else {
- size_b0 = size8;
- memctl->memc_mamr = CFG_MAMR_8COL;
- udelay (500);
- }
- debug ("SDRAM Bank 0: %ld MB\n", size_b0 >> 20);
-
-#ifndef CONFIG_CAN_DRIVER
- if ((board_type != 'L') &&
- (board_type != 'M') ) { /* "L" and "M" type boards have only one bank SDRAM */
- /*
- * Check Bank 1 Memory Size
- * use current column settings
- * [9 column SDRAM may also be used in 8 column mode,
- * but then only half the real size will be used.]
- */
- size_b1 = dram_size (memctl->memc_mamr, (long int *)SDRAM_BASE3_PRELIM,
- SDRAM_MAX_SIZE);
- debug ("SDRAM Bank 1: %ld MB\n", size_b1 >> 20);
- } else {
- size_b1 = 0;
- }
-#endif /* CONFIG_CAN_DRIVER */
-
- udelay (1000);
-
- /*
- * Adjust refresh rate depending on SDRAM type, both banks
- * For types > 128 MBit leave it at the current (fast) rate
- */
- if ((size_b0 < 0x02000000) && (size_b1 < 0x02000000)) {
- /* reduce to 15.6 us (62.4 us / quad) */
- memctl->memc_mptpr = CFG_MPTPR_2BK_4K;
- udelay (1000);
- }
-
- /*
- * Final mapping: map bigger bank first
- */
- if (size_b1 > size_b0) { /* SDRAM Bank 1 is bigger - map first */
-
- memctl->memc_or3 = ((-size_b1) & 0xFFFF0000) | CFG_OR_TIMING_SDRAM;
- memctl->memc_br3 = (CFG_SDRAM_BASE & BR_BA_MSK) | BR_MS_UPMA | BR_V;
-
- if (size_b0 > 0) {
- /*
- * Position Bank 0 immediately above Bank 1
- */
- memctl->memc_or2 = ((-size_b0) & 0xFFFF0000) | CFG_OR_TIMING_SDRAM;
- memctl->memc_br2 = ((CFG_SDRAM_BASE & BR_BA_MSK) | BR_MS_UPMA | BR_V)
- + size_b1;
- } else {
- unsigned long reg;
-
- /*
- * No bank 0
- *
- * invalidate bank
- */
- memctl->memc_br2 = 0;
-
- /* adjust refresh rate depending on SDRAM type, one bank */
- reg = memctl->memc_mptpr;
- reg >>= 1; /* reduce to CFG_MPTPR_1BK_8K / _4K */
- memctl->memc_mptpr = reg;
- }
-
- } else { /* SDRAM Bank 0 is bigger - map first */
-
- memctl->memc_or2 = ((-size_b0) & 0xFFFF0000) | CFG_OR_TIMING_SDRAM;
- memctl->memc_br2 =
- (CFG_SDRAM_BASE & BR_BA_MSK) | BR_MS_UPMA | BR_V;
-
- if (size_b1 > 0) {
- /*
- * Position Bank 1 immediately above Bank 0
- */
- memctl->memc_or3 =
- ((-size_b1) & 0xFFFF0000) | CFG_OR_TIMING_SDRAM;
- memctl->memc_br3 =
- ((CFG_SDRAM_BASE & BR_BA_MSK) | BR_MS_UPMA | BR_V)
- + size_b0;
- } else {
- unsigned long reg;
-
-#ifndef CONFIG_CAN_DRIVER
- /*
- * No bank 1
- *
- * invalidate bank
- */
- memctl->memc_br3 = 0;
-#endif /* CONFIG_CAN_DRIVER */
-
- /* adjust refresh rate depending on SDRAM type, one bank */
- reg = memctl->memc_mptpr;
- reg >>= 1; /* reduce to CFG_MPTPR_1BK_8K / _4K */
- memctl->memc_mptpr = reg;
- }
- }
-
- udelay (10000);
-
-#ifdef CONFIG_CAN_DRIVER
- /* Initialize OR3 / BR3 */
- memctl->memc_or3 = CFG_OR3_CAN;
- memctl->memc_br3 = CFG_BR3_CAN;
-
- /* Initialize MBMR */
- memctl->memc_mbmr = MBMR_GPL_B4DIS; /* GPL_B4 ouput line Disable */
-
- /* Initialize UPMB for CAN: single read */
- memctl->memc_mdr = 0xFFFFC004;
- memctl->memc_mcr = 0x0100 | UPMB;
-
- memctl->memc_mdr = 0x0FFFD004;
- memctl->memc_mcr = 0x0101 | UPMB;
-
- memctl->memc_mdr = 0x0FFFC000;
- memctl->memc_mcr = 0x0102 | UPMB;
-
- memctl->memc_mdr = 0x3FFFC004;
- memctl->memc_mcr = 0x0103 | UPMB;
-
- memctl->memc_mdr = 0xFFFFDC05;
- memctl->memc_mcr = 0x0104 | UPMB;
-
- /* Initialize UPMB for CAN: single write */
- memctl->memc_mdr = 0xFFFCC004;
- memctl->memc_mcr = 0x0118 | UPMB;
-
- memctl->memc_mdr = 0xCFFCD004;
- memctl->memc_mcr = 0x0119 | UPMB;
-
- memctl->memc_mdr = 0x0FFCC000;
- memctl->memc_mcr = 0x011A | UPMB;
-
- memctl->memc_mdr = 0x7FFCC004;
- memctl->memc_mcr = 0x011B | UPMB;
-
- memctl->memc_mdr = 0xFFFDCC05;
- memctl->memc_mcr = 0x011C | UPMB;
-#endif /* CONFIG_CAN_DRIVER */
-
-#ifdef CONFIG_ISP1362_USB
- /* Initialize OR5 / BR5 */
- memctl->memc_or5 = CFG_OR5_ISP1362;
- memctl->memc_br5 = CFG_BR5_ISP1362;
-#endif /* CONFIG_ISP1362_USB */
-
-
- return (size_b0 + size_b1);
-}
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Check memory range for valid RAM. A simple memory test determines
- * the actually available RAM size between addresses `base' and
- * `base + maxsize'. Some (not all) hardware errors are detected:
- * - short between address lines
- * - short between data lines
- */
-
-static long int dram_size (long int mamr_value, long int *base, long int maxsize)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
-
- memctl->memc_mamr = mamr_value;
-
- return (get_ram_size(base, maxsize));
-}
-
-/* ------------------------------------------------------------------------- */
-
-#ifdef CONFIG_PS2MULT
-
-#ifdef CONFIG_HMI10
-#define BASE_BAUD ( 1843200 / 16 )
-struct serial_state rs_table[] = {
- { BASE_BAUD, 4, (void*)0xec140000 },
- { BASE_BAUD, 2, (void*)0xec150000 },
- { BASE_BAUD, 6, (void*)0xec160000 },
- { BASE_BAUD, 10, (void*)0xec170000 },
-};
-
-#ifdef CONFIG_BOARD_EARLY_INIT_R
-int board_early_init_r (void)
-{
- ps2mult_early_init();
- return (0);
-}
-#endif
-#endif /* CONFIG_HMI10 */
-
-#endif /* CONFIG_PS2MULT */
-
-/* ---------------------------------------------------------------------------- */
-/* HMI10 specific stuff */
-/* ---------------------------------------------------------------------------- */
-#ifdef CONFIG_HMI10
-
-int misc_init_r (void)
-{
-# ifdef CONFIG_IDE_LED
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
-
- /* Configure PA15 as output port */
- immap->im_ioport.iop_padir |= 0x0001;
- immap->im_ioport.iop_paodr |= 0x0001;
- immap->im_ioport.iop_papar &= ~0x0001;
- immap->im_ioport.iop_padat &= ~0x0001; /* turn it off */
-# endif
- return (0);
-}
-
-# ifdef CONFIG_IDE_LED
-void ide_led (uchar led, uchar status)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
-
- /* We have one led for both pcmcia slots */
- if (status) { /* led on */
- immap->im_ioport.iop_padat |= 0x0001;
- } else {
- immap->im_ioport.iop_padat &= ~0x0001;
- }
-}
-# endif
-#endif /* CONFIG_HMI10 */
-
-/* ---------------------------------------------------------------------------- */
-/* NSCU specific stuff */
-/* ---------------------------------------------------------------------------- */
-#ifdef CONFIG_NSCU
-
-int misc_init_r (void)
-{
- volatile immap_t *immr = (immap_t *) CFG_IMMR;
-
- /* wake up ethernet module */
- immr->im_ioport.iop_pcpar &= ~0x0004; /* GPIO pin */
- immr->im_ioport.iop_pcdir |= 0x0004; /* output */
- immr->im_ioport.iop_pcso &= ~0x0004; /* for clarity */
- immr->im_ioport.iop_pcdat |= 0x0004; /* enable */
-
- return (0);
-}
-#endif /* CONFIG_NSCU */
-
-/* ------------------------------------------------------------------------- */
diff --git a/board/tqm8xx/u-boot.lds b/board/tqm8xx/u-boot.lds
deleted file mode 100644
index d526d1d07d..0000000000
--- a/board/tqm8xx/u-boot.lds
+++ /dev/null
@@ -1,144 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc8xx/start.o (.text)
- cpu/mpc8xx/traps.o (.text)
- common/dlmalloc.o (.text)
- lib_ppc/ppcstring.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
- lib_generic/zlib.o (.text)
- lib_ppc/cache.o (.text)
- lib_ppc/time.o (.text)
-
- . = DEFINED(env_offset) ? env_offset : .;
- common/environment.o (.ppcenv)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/tqm8xx/u-boot.lds.debug b/board/tqm8xx/u-boot.lds.debug
deleted file mode 100644
index ddd4678ee8..0000000000
--- a/board/tqm8xx/u-boot.lds.debug
+++ /dev/null
@@ -1,137 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc8xx/start.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
-
- . = env_offset;
- common/environment.o(.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/trab/Makefile b/board/trab/Makefile
deleted file mode 100644
index ced9bc5bc8..0000000000
--- a/board/trab/Makefile
+++ /dev/null
@@ -1,65 +0,0 @@
-#
-# (C) Copyright 2000-2002
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := trab.o flash.o vfd.o cmd_trab.o memory.o tsc2000.o auto_update.o
-SOBJS := lowlevel_init.o
-
-gcclibdir := $(shell dirname `$(CC) -print-libgcc-file-name`)
-
-LOAD_ADDR = 0xc100000
-
-#########################################################################
-
-all: $(LIB) trab_fkt.srec trab_fkt.bin
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS) $(SOBJS)
-
-trab_fkt.srec: trab_fkt.o rs485.o tsc2000.o $(LIB)
- $(LD) -g -Ttext $(LOAD_ADDR) -o $(<:.o=) -e $(<:.o=) $^ $(LIB) \
- -L../../examples -lstubs \
- -L../../lib_generic -lgeneric \
- -L$(gcclibdir) -lgcc
- $(OBJCOPY) -O srec $(<:.o=) $@
-
-trab_fkt.bin: trab_fkt.srec
- $(OBJCOPY) -O binary $< $@ 2>/dev/null
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/trab/Pt1000_temp_data.h b/board/trab/Pt1000_temp_data.h
deleted file mode 100644
index 17e9ed7ae8..0000000000
--- a/board/trab/Pt1000_temp_data.h
+++ /dev/null
@@ -1,71 +0,0 @@
-/*
- * Data file for tsc2000 driver.
- * Copyright (C) 2002, 2003 DENX Software Engineering, Wolfgang Denk, wd@denx.de
- */
-
-#ifndef _PT1000_TEMP_DATA_H
-#define _PT1000_TEMP_DATA_H
-
-long Pt1000_temp_table[][2] = {
- /* For quick range checking the largest element
- * is placed at index 0.
- * U, nV T, C*100
- */
- { 44000000 , 12165 },
- { -10000000 , -2644 },
- { -9000000 , -2381 },
- { -8000000 , -2118 },
- { -7000000 , -1855 },
- { -6000000 , -1591 },
- { -5000000 , -1327 },
- { -4000000 , -1063 },
- { -3000000 , -798 },
- { -2000000 , -532 },
- { -1000000 , -266 },
- { 0 , 000 },
- { 1000000 , 267 },
- { 2000000 , 534 },
- { 3000000 , 802 },
- { 4000000 , 1070 },
- { 5000000 , 1338 },
- { 6000000 , 1607 },
- { 7000000 , 1876 },
- { 8000000 , 2146 },
- { 9000000 , 2416 },
- { 10000000 , 2687 },
- { 11000000 , 2958 },
- { 12000000 , 3230 },
- { 13000000 , 3502 },
- { 14000000 , 3774 },
- { 15000000 , 4047 },
- { 16000000 , 4321 },
- { 17000000 , 4595 },
- { 18000000 , 4869 },
- { 19000000 , 5144 },
- { 20000000 , 5419 },
- { 21000000 , 5694 },
- { 22000000 , 5971 },
- { 23000000 , 6247 },
- { 24000000 , 6524 },
- { 25000000 , 6802 },
- { 26000000 , 7080 },
- { 27000000 , 7358 },
- { 28000000 , 7637 },
- { 29000000 , 7916 },
- { 30000000 , 8196 },
- { 31000000 , 8476 },
- { 32000000 , 8757 },
- { 33000000 , 9039 },
- { 34000000 , 9320 },
- { 35000000 , 9602 },
- { 36000000 , 9885 },
- { 37000000 , 10168 },
- { 38000000 , 10452 },
- { 39000000 , 10736 },
- { 40000000 , 11021 },
- { 41000000 , 11306 },
- { 42000000 , 11592 },
- { 43000000 , 11879 },
- { 44000000 , 12165 },
-};
-#endif /* _PT1000_TEMP_DATA_H */
diff --git a/board/trab/README.kbd b/board/trab/README.kbd
deleted file mode 100644
index 3db00bccec..0000000000
--- a/board/trab/README.kbd
+++ /dev/null
@@ -1,44 +0,0 @@
-
-The TRAB keyboard implementation is similar to that for LWMON and
-R360MPI boards. The only difference concerns key naming. There are 4
-keys on TRAB: 1, 2, 3, 4.
-
-1) The "kbd" command provides information about the current state of
- the keys. For example,
-
- TRAB # kbd
- Keys: 1 0 1 0
-
- means that keys 1 and 3 are pressed. The keyboard status is also
- stored in the "keybd" environment variable. In this example we get
-
- keybd=1010
-
-2) The "preboot" variable is set according to current environment
- settings and keys pressed. This is an example:
-
- TRAB # setenv magic_keys XY
- TRAB # setenv key_magicX 12
- TRAB # setenv key_cmdX echo ## Keys 1 + 2 pressed ##\;echo
- TRAB # setenv key_magicY 13
- TRAB # setenv key_cmdY echo ## Keys 1 + 3 pressed ##\;echo
-
- Here "magic_keys=XY" means that the "key_magicX" and "key_magicY"
- variables will be checked for a match. Each variable "key_magic*"
- defines a set of keys. In the our example, if keys 1 and 3 are
- pressed during reset, then "key_magicY" matches, so the "preboot"
- variable will be set to the contents of "key_cmdY":
-
- preboot=echo ## Keys 1 + 3 pressed ##;echo
-
-3) The TRAB board has optional modem support. When a certain key
- combination is pressed on the keyboard at power-on, the firmware
- performs the necessary initialization of the modem and allows for
- dial-in. The key combination is specified in the
- "include/configs/trab.h" file. For example:
-
- #define CONFIG_MODEM_KEY_MAGIC "23"
-
- means that modem will be initialized if and only if both keys 2, 3
- are pressed. Note that the format of this string is similar to the
- format of "key_magic*" environment variables described above.
diff --git a/board/trab/auto_update.c b/board/trab/auto_update.c
deleted file mode 100644
index 056e562bfe..0000000000
--- a/board/trab/auto_update.c
+++ /dev/null
@@ -1,656 +0,0 @@
-/*
- * (C) Copyright 2003
- * Gary Jennejohn, DENX Software Engineering, gj@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <command.h>
-#include <malloc.h>
-#include <image.h>
-#include <asm/byteorder.h>
-#include <usb.h>
-
-#ifdef CFG_HUSH_PARSER
-#include <hush.h>
-#endif
-
-#ifdef CONFIG_AUTO_UPDATE
-
-#ifndef CONFIG_USB_OHCI
-#error "must define CONFIG_USB_OHCI"
-#endif
-
-#ifndef CONFIG_USB_STORAGE
-#error "must define CONFIG_USB_STORAGE"
-#endif
-
-#ifndef CFG_HUSH_PARSER
-#error "must define CFG_HUSH_PARSER"
-#endif
-
-#if !(CONFIG_COMMANDS & CFG_CMD_FAT)
-#error "must define CFG_CMD_FAT"
-#endif
-
-/*
- * Check whether a USB memory stick is plugged in.
- * If one is found:
- * 1) if prepare.img ist found load it into memory. If it is
- * valid then run it.
- * 2) if preinst.img is found load it into memory. If it is
- * valid then run it. Update the EEPROM.
- * 3) if firmware.img is found load it into memory. If it is valid,
- * burn it into FLASH and update the EEPROM.
- * 4) if kernel.img is found load it into memory. If it is valid,
- * burn it into FLASH and update the EEPROM.
- * 5) if app.img is found load it into memory. If it is valid,
- * burn it into FLASH and update the EEPROM.
- * 6) if disk.img is found load it into memory. If it is valid,
- * burn it into FLASH and update the EEPROM.
- * 7) if postinst.img is found load it into memory. If it is
- * valid then run it. Update the EEPROM.
- */
-
-#undef AU_DEBUG
-
-#undef debug
-#ifdef AU_DEBUG
-#define debug(fmt,args...) printf (fmt ,##args)
-#else
-#define debug(fmt,args...)
-#endif /* AU_DEBUG */
-
-/* possible names of files on the USB stick. */
-#define AU_PREPARE "prepare.img"
-#define AU_PREINST "preinst.img"
-#define AU_FIRMWARE "firmware.img"
-#define AU_KERNEL "kernel.img"
-#define AU_APP "app.img"
-#define AU_DISK "disk.img"
-#define AU_POSTINST "postinst.img"
-
-struct flash_layout
-{
- long start;
- long end;
-};
-
-/* layout of the FLASH. ST = start address, ND = end address. */
-#ifndef CONFIG_FLASH_8MB /* 16 MB Flash, 32 MB RAM */
-#define AU_FL_FIRMWARE_ST 0x00000000
-#define AU_FL_FIRMWARE_ND 0x0009FFFF
-#define AU_FL_VFD_ST 0x000A0000
-#define AU_FL_VFD_ND 0x000BFFFF
-#define AU_FL_KERNEL_ST 0x000C0000
-#define AU_FL_KERNEL_ND 0x001BFFFF
-#define AU_FL_APP_ST 0x001C0000
-#define AU_FL_APP_ND 0x005BFFFF
-#define AU_FL_DISK_ST 0x005C0000
-#define AU_FL_DISK_ND 0x00FFFFFF
-#else /* 8 MB Flash, 32 MB RAM */
-#define AU_FL_FIRMWARE_ST 0x00000000
-#define AU_FL_FIRMWARE_ND 0x0005FFFF
-#define AU_FL_KERNEL_ST 0x00060000
-#define AU_FL_KERNEL_ND 0x0013FFFF
-#define AU_FL_APP_ST 0x00140000
-#define AU_FL_APP_ND 0x0067FFFF
-#define AU_FL_DISK_ST 0x00680000
-#define AU_FL_DISK_ND 0x007DFFFF
-#define AU_FL_VFD_ST 0x007E0000
-#define AU_FL_VFD_ND 0x007FFFFF
-#endif /* CONFIG_FLASH_8MB */
-
-/* a structure with the offsets to values in the EEPROM */
-struct eeprom_layout
-{
- int time;
- int size;
- int dcrc;
-};
-
-/* layout of the EEPROM - offset from the start. All entries are 32 bit. */
-#define AU_EEPROM_TIME_PREINST 64
-#define AU_EEPROM_SIZE_PREINST 68
-#define AU_EEPROM_DCRC_PREINST 72
-#define AU_EEPROM_TIME_FIRMWARE 76
-#define AU_EEPROM_SIZE_FIRMWARE 80
-#define AU_EEPROM_DCRC_FIRMWARE 84
-#define AU_EEPROM_TIME_KERNEL 88
-#define AU_EEPROM_SIZE_KERNEL 92
-#define AU_EEPROM_DCRC_KERNEL 96
-#define AU_EEPROM_TIME_APP 100
-#define AU_EEPROM_SIZE_APP 104
-#define AU_EEPROM_DCRC_APP 108
-#define AU_EEPROM_TIME_DISK 112
-#define AU_EEPROM_SIZE_DISK 116
-#define AU_EEPROM_DCRC_DISK 120
-#define AU_EEPROM_TIME_POSTINST 124
-#define AU_EEPROM_SIZE_POSTINST 128
-#define AU_EEPROM_DCRC_POSTINST 132
-
-static int au_usb_stor_curr_dev; /* current device */
-
-/* index of each file in the following arrays */
-#define IDX_PREPARE 0
-#define IDX_PREINST 1
-#define IDX_FIRMWARE 2
-#define IDX_KERNEL 3
-#define IDX_APP 4
-#define IDX_DISK 5
-#define IDX_POSTINST 6
-/* max. number of files which could interest us */
-#define AU_MAXFILES 7
-/* pointers to file names */
-char *aufile[AU_MAXFILES];
-/* sizes of flash areas for each file */
-long ausize[AU_MAXFILES];
-/* offsets into the EEEPROM */
-struct eeprom_layout auee_off[AU_MAXFILES] = { \
- {0}, \
- {AU_EEPROM_TIME_PREINST, AU_EEPROM_SIZE_PREINST, AU_EEPROM_DCRC_PREINST,}, \
- {AU_EEPROM_TIME_FIRMWARE, AU_EEPROM_SIZE_FIRMWARE, AU_EEPROM_DCRC_FIRMWARE,}, \
- {AU_EEPROM_TIME_KERNEL, AU_EEPROM_SIZE_KERNEL, AU_EEPROM_DCRC_KERNEL,}, \
- {AU_EEPROM_TIME_APP, AU_EEPROM_SIZE_APP, AU_EEPROM_DCRC_APP,}, \
- {AU_EEPROM_TIME_DISK, AU_EEPROM_SIZE_DISK, AU_EEPROM_DCRC_DISK,}, \
- {AU_EEPROM_TIME_POSTINST, AU_EEPROM_SIZE_POSTINST, AU_EEPROM_DCRC_POSTINST,} \
- };
-/* array of flash areas start and end addresses */
-struct flash_layout aufl_layout[AU_MAXFILES - 3] = { \
- {AU_FL_FIRMWARE_ST, AU_FL_FIRMWARE_ND,}, \
- {AU_FL_KERNEL_ST, AU_FL_KERNEL_ND,}, \
- {AU_FL_APP_ST, AU_FL_APP_ND,}, \
- {AU_FL_DISK_ST, AU_FL_DISK_ND,}, \
-};
-/* convert the index into aufile[] to an index into aufl_layout[] */
-#define FIDX_TO_LIDX(idx) ((idx) - 2)
-
-/* where to load files into memory */
-#define LOAD_ADDR ((unsigned char *)0x0C100000)
-/* the app is the largest image */
-#define MAX_LOADSZ ausize[IDX_APP]
-
-/* externals */
-extern int fat_register_device(block_dev_desc_t *, int);
-extern int file_fat_detectfs(void);
-extern long file_fat_read(const char *, void *, unsigned long);
-extern int i2c_read (unsigned char, unsigned int, int , unsigned char* , int);
-extern int i2c_write (uchar, uint, int , uchar* , int);
-#ifdef CONFIG_VFD
-extern int trab_vfd (ulong);
-extern int transfer_pic(unsigned char, unsigned char *, int, int);
-#endif
-extern int flash_sect_erase(ulong, ulong);
-extern int flash_sect_protect (int, ulong, ulong);
-extern int flash_write (char *, ulong, ulong);
-/* change char* to void* to shutup the compiler */
-extern int i2c_write_multiple (uchar, uint, int, void *, int);
-extern int i2c_read_multiple (uchar, uint, int, void *, int);
-extern block_dev_desc_t *get_dev (char*, int);
-extern int u_boot_hush_start(void);
-
-int
-au_check_cksum_valid(int idx, long nbytes)
-{
- image_header_t *hdr;
- unsigned long checksum;
-
- hdr = (image_header_t *)LOAD_ADDR;
-
- if (nbytes != (sizeof(*hdr) + ntohl(hdr->ih_size)))
- {
- printf ("Image %s bad total SIZE\n", aufile[idx]);
- return -1;
- }
- /* check the data CRC */
- checksum = ntohl(hdr->ih_dcrc);
-
- if (crc32 (0, (char *)(LOAD_ADDR + sizeof(*hdr)), ntohl(hdr->ih_size))
- != checksum)
- {
- printf ("Image %s bad data checksum\n", aufile[idx]);
- return -1;
- }
- return 0;
-}
-
-int
-au_check_header_valid(int idx, long nbytes)
-{
- image_header_t *hdr;
- unsigned long checksum;
- unsigned char buf[4];
-
- hdr = (image_header_t *)LOAD_ADDR;
- /* check the easy ones first */
-#undef CHECK_VALID_DEBUG
-#ifdef CHECK_VALID_DEBUG
- printf("magic %#x %#x ", ntohl(hdr->ih_magic), IH_MAGIC);
- printf("arch %#x %#x ", hdr->ih_arch, IH_CPU_ARM);
- printf("size %#x %#lx ", ntohl(hdr->ih_size), nbytes);
- printf("type %#x %#x ", hdr->ih_type, IH_TYPE_KERNEL);
-#endif
- if (nbytes < sizeof(*hdr))
- {
- printf ("Image %s bad header SIZE\n", aufile[idx]);
- return -1;
- }
- if (ntohl(hdr->ih_magic) != IH_MAGIC || hdr->ih_arch != IH_CPU_ARM)
- {
- printf ("Image %s bad MAGIC or ARCH\n", aufile[idx]);
- return -1;
- }
- /* check the hdr CRC */
- checksum = ntohl(hdr->ih_hcrc);
- hdr->ih_hcrc = 0;
-
- if (crc32 (0, (char *)hdr, sizeof(*hdr)) != checksum) {
- printf ("Image %s bad header checksum\n", aufile[idx]);
- return -1;
- }
- hdr->ih_hcrc = htonl(checksum);
- /* check the type - could do this all in one gigantic if() */
- if ((idx == IDX_FIRMWARE) && (hdr->ih_type != IH_TYPE_FIRMWARE)) {
- printf ("Image %s wrong type\n", aufile[idx]);
- return -1;
- }
- if ((idx == IDX_KERNEL) && (hdr->ih_type != IH_TYPE_KERNEL)) {
- printf ("Image %s wrong type\n", aufile[idx]);
- return -1;
- }
- if ((idx == IDX_DISK) && (hdr->ih_type != IH_TYPE_FILESYSTEM)) {
- printf ("Image %s wrong type\n", aufile[idx]);
- return -1;
- }
- if ((idx == IDX_APP) && (hdr->ih_type != IH_TYPE_RAMDISK)
- && (hdr->ih_type != IH_TYPE_FILESYSTEM)) {
- printf ("Image %s wrong type\n", aufile[idx]);
- return -1;
- }
- if ((idx == IDX_PREPARE || idx == IDX_PREINST || idx == IDX_POSTINST)
- && (hdr->ih_type != IH_TYPE_SCRIPT))
- {
- printf ("Image %s wrong type\n", aufile[idx]);
- return -1;
- }
- /* special case for prepare.img */
- if (idx == IDX_PREPARE)
- return 0;
- /* recycle checksum */
- checksum = ntohl(hdr->ih_size);
- /* for kernel and app the image header must also fit into flash */
- if ((idx != IDX_DISK) && (idx != IDX_FIRMWARE))
- checksum += sizeof(*hdr);
- /* check the size does not exceed space in flash. HUSH scripts */
- /* all have ausize[] set to 0 */
- if ((ausize[idx] != 0) && (ausize[idx] < checksum)) {
- printf ("Image %s is bigger than FLASH\n", aufile[idx]);
- return -1;
- }
- /* check the time stamp from the EEPROM */
- /* read it in */
- i2c_read_multiple(0x54, auee_off[idx].time, 1, buf, sizeof(buf));
-#ifdef CHECK_VALID_DEBUG
- printf ("buf[0] %#x buf[1] %#x buf[2] %#x buf[3] %#x "
- "as int %#x time %#x\n",
- buf[0], buf[1], buf[2], buf[3],
- *((unsigned int *)buf), ntohl(hdr->ih_time));
-#endif
- /* check it */
- if (*((unsigned int *)buf) >= ntohl(hdr->ih_time)) {
- printf ("Image %s is too old\n", aufile[idx]);
- return -1;
- }
-
- return 0;
-}
-
-/* power control defines */
-#define CPLD_VFD_BK ((volatile char *)0x04038002)
-#define POWER_OFF (1 << 1)
-
-int
-au_do_update(int idx, long sz)
-{
- image_header_t *hdr;
- char *addr;
- long start, end;
- int off, rc;
- uint nbytes;
-
- hdr = (image_header_t *)LOAD_ADDR;
-
- /* disable the power switch */
- *CPLD_VFD_BK |= POWER_OFF;
-
- /* execute a script */
- if (hdr->ih_type == IH_TYPE_SCRIPT) {
- addr = (char *)((char *)hdr + sizeof(*hdr));
- /* stick a NULL at the end of the script, otherwise */
- /* parse_string_outer() runs off the end. */
- addr[ntohl(hdr->ih_size)] = 0;
- addr += 8;
- parse_string_outer(addr, FLAG_PARSE_SEMICOLON);
- return 0;
- }
-
- start = aufl_layout[FIDX_TO_LIDX(idx)].start;
- end = aufl_layout[FIDX_TO_LIDX(idx)].end;
-
- /* unprotect the address range */
- /* this assumes that ONLY the firmware is protected! */
- if (idx == IDX_FIRMWARE) {
-#undef AU_UPDATE_TEST
-#ifdef AU_UPDATE_TEST
- /* erase it where Linux goes */
- start = aufl_layout[1].start;
- end = aufl_layout[1].end;
-#endif
- flash_sect_protect(0, start, end);
- }
-
- /*
- * erase the address range.
- */
- debug ("flash_sect_erase(%lx, %lx);\n", start, end);
- flash_sect_erase(start, end);
- wait_ms(100);
- /* strip the header - except for the kernel and ramdisk */
- if (hdr->ih_type == IH_TYPE_KERNEL || hdr->ih_type == IH_TYPE_RAMDISK) {
- addr = (char *)hdr;
- off = sizeof(*hdr);
- nbytes = sizeof(*hdr) + ntohl(hdr->ih_size);
- } else {
- addr = (char *)((char *)hdr + sizeof(*hdr));
-#ifdef AU_UPDATE_TEST
- /* copy it to where Linux goes */
- if (idx == IDX_FIRMWARE)
- start = aufl_layout[1].start;
-#endif
- off = 0;
- nbytes = ntohl(hdr->ih_size);
- }
-
- /* copy the data from RAM to FLASH */
- debug ("flash_write(%p, %lx %x)\n", addr, start, nbytes);
- rc = flash_write(addr, start, nbytes);
- if (rc != 0) {
- printf("Flashing failed due to error %d\n", rc);
- return -1;
- }
-
- /* check the dcrc of the copy */
- if (crc32 (0, (char *)(start + off), ntohl(hdr->ih_size)) != ntohl(hdr->ih_dcrc)) {
- printf ("Image %s Bad Data Checksum After COPY\n", aufile[idx]);
- return -1;
- }
-
- /* protect the address range */
- /* this assumes that ONLY the firmware is protected! */
- if (idx == IDX_FIRMWARE)
- flash_sect_protect(1, start, end);
- return 0;
-}
-
-int
-au_update_eeprom(int idx)
-{
- image_header_t *hdr;
- int off;
- uint32_t val;
-
- /* special case for prepare.img */
- if (idx == IDX_PREPARE) {
- /* enable the power switch */
- *CPLD_VFD_BK &= ~POWER_OFF;
- return 0;
- }
-
- hdr = (image_header_t *)LOAD_ADDR;
- /* write the time field into EEPROM */
- off = auee_off[idx].time;
- val = ntohl(hdr->ih_time);
- i2c_write_multiple(0x54, off, 1, &val, sizeof(val));
- /* write the size field into EEPROM */
- off = auee_off[idx].size;
- val = ntohl(hdr->ih_size);
- i2c_write_multiple(0x54, off, 1, &val, sizeof(val));
- /* write the dcrc field into EEPROM */
- off = auee_off[idx].dcrc;
- val = ntohl(hdr->ih_dcrc);
- i2c_write_multiple(0x54, off, 1, &val, sizeof(val));
- /* enable the power switch */
- *CPLD_VFD_BK &= ~POWER_OFF;
- return 0;
-}
-
-/*
- * this is called from board_init() after the hardware has been set up
- * and is usable. That seems like a good time to do this.
- * Right now the return value is ignored.
- */
-int
-do_auto_update(void)
-{
- block_dev_desc_t *stor_dev;
- long sz;
- int i, res, bitmap_first, cnt, old_ctrlc, got_ctrlc;
- char *env;
- long start, end;
-
-#undef ERASE_EEPROM
-#ifdef ERASE_EEPROM
- int arr[18];
- memset(arr, 0, sizeof(arr));
- i2c_write_multiple(0x54, 64, 1, arr, sizeof(arr));
-#endif
- au_usb_stor_curr_dev = -1;
- /* start USB */
- if (usb_stop() < 0) {
- debug ("usb_stop failed\n");
- return -1;
- }
- if (usb_init() < 0) {
- debug ("usb_init failed\n");
- return -1;
- }
- /*
- * check whether a storage device is attached (assume that it's
- * a USB memory stick, since nothing else should be attached).
- */
- au_usb_stor_curr_dev = usb_stor_scan(0);
- if (au_usb_stor_curr_dev == -1) {
- debug ("No device found. Not initialized?\n");
- return -1;
- }
- /* check whether it has a partition table */
- stor_dev = get_dev("usb", 0);
- if (stor_dev == NULL) {
- debug ("uknown device type\n");
- return -1;
- }
- if (fat_register_device(stor_dev, 1) != 0) {
- debug ("Unable to use USB %d:%d for fatls\n",
- au_usb_stor_curr_dev, 1);
- return -1;
- }
- if (file_fat_detectfs() != 0) {
- debug ("file_fat_detectfs failed\n");
- }
-
- /* initialize the array of file names */
- memset(aufile, 0, sizeof(aufile));
- aufile[IDX_PREPARE] = AU_PREPARE;
- aufile[IDX_PREINST] = AU_PREINST;
- aufile[IDX_FIRMWARE] = AU_FIRMWARE;
- aufile[IDX_KERNEL] = AU_KERNEL;
- aufile[IDX_APP] = AU_APP;
- aufile[IDX_DISK] = AU_DISK;
- aufile[IDX_POSTINST] = AU_POSTINST;
- /* initialize the array of flash sizes */
- memset(ausize, 0, sizeof(ausize));
- ausize[IDX_FIRMWARE] = (AU_FL_FIRMWARE_ND + 1) - AU_FL_FIRMWARE_ST;
- ausize[IDX_KERNEL] = (AU_FL_KERNEL_ND + 1) - AU_FL_KERNEL_ST;
- ausize[IDX_APP] = (AU_FL_APP_ND + 1) - AU_FL_APP_ST;
- ausize[IDX_DISK] = (AU_FL_DISK_ND + 1) - AU_FL_DISK_ST;
- /*
- * now check whether start and end are defined using environment
- * variables.
- */
- start = -1;
- end = 0;
- env = getenv("firmware_st");
- if (env != NULL)
- start = simple_strtoul(env, NULL, 16);
- env = getenv("firmware_nd");
- if (env != NULL)
- end = simple_strtoul(env, NULL, 16);
- if (start >= 0 && end && end > start) {
- ausize[IDX_FIRMWARE] = (end + 1) - start;
- aufl_layout[0].start = start;
- aufl_layout[0].end = end;
- }
- start = -1;
- end = 0;
- env = getenv("kernel_st");
- if (env != NULL)
- start = simple_strtoul(env, NULL, 16);
- env = getenv("kernel_nd");
- if (env != NULL)
- end = simple_strtoul(env, NULL, 16);
- if (start >= 0 && end && end > start) {
- ausize[IDX_KERNEL] = (end + 1) - start;
- aufl_layout[1].start = start;
- aufl_layout[1].end = end;
- }
- start = -1;
- end = 0;
- env = getenv("app_st");
- if (env != NULL)
- start = simple_strtoul(env, NULL, 16);
- env = getenv("app_nd");
- if (env != NULL)
- end = simple_strtoul(env, NULL, 16);
- if (start >= 0 && end && end > start) {
- ausize[IDX_APP] = (end + 1) - start;
- aufl_layout[2].start = start;
- aufl_layout[2].end = end;
- }
- start = -1;
- end = 0;
- env = getenv("disk_st");
- if (env != NULL)
- start = simple_strtoul(env, NULL, 16);
- env = getenv("disk_nd");
- if (env != NULL)
- end = simple_strtoul(env, NULL, 16);
- if (start >= 0 && end && end > start) {
- ausize[IDX_DISK] = (end + 1) - start;
- aufl_layout[3].start = start;
- aufl_layout[3].end = end;
- }
- /* make certain that HUSH is runnable */
- u_boot_hush_start();
- /* make sure that we see CTRL-C and save the old state */
- old_ctrlc = disable_ctrlc(0);
-
- bitmap_first = 0;
- /* just loop thru all the possible files */
- for (i = 0; i < AU_MAXFILES; i++) {
- /* just read the header */
- sz = file_fat_read(aufile[i], LOAD_ADDR, sizeof(image_header_t));
- debug ("read %s sz %ld hdr %d\n",
- aufile[i], sz, sizeof(image_header_t));
- if (sz <= 0 || sz < sizeof(image_header_t)) {
- debug ("%s not found\n", aufile[i]);
- continue;
- }
- if (au_check_header_valid(i, sz) < 0) {
- debug ("%s header not valid\n", aufile[i]);
- continue;
- }
- sz = file_fat_read(aufile[i], LOAD_ADDR, MAX_LOADSZ);
- debug ("read %s sz %ld hdr %d\n",
- aufile[i], sz, sizeof(image_header_t));
- if (sz <= 0 || sz <= sizeof(image_header_t)) {
- debug ("%s not found\n", aufile[i]);
- continue;
- }
- if (au_check_cksum_valid(i, sz) < 0) {
- debug ("%s checksum not valid\n", aufile[i]);
- continue;
- }
-#ifdef CONFIG_VFD
- /* now that we have a valid file we can display the */
- /* bitmap. */
- if (bitmap_first == 0) {
- env = getenv("bitmap2");
- if (env == NULL) {
- trab_vfd(0);
- } else {
- /* not so simple - bitmap2 is supposed to */
- /* contain the address of the bitmap */
- env = (char *)simple_strtoul(env, NULL, 16);
-/* NOTE: these are taken from vfd_logo.h. If that file changes then */
-/* these defines MUST also be updated! These may be wrong for bitmap2. */
-#define VFD_LOGO_WIDTH 112
-#define VFD_LOGO_HEIGHT 72
- /* must call transfer_pic directly */
- transfer_pic(3, env, VFD_LOGO_HEIGHT, VFD_LOGO_WIDTH);
- }
- bitmap_first = 1;
- }
-#endif
- /* this is really not a good idea, but it's what the */
- /* customer wants. */
- cnt = 0;
- got_ctrlc = 0;
- do {
- res = au_do_update(i, sz);
- /* let the user break out of the loop */
- if (ctrlc() || had_ctrlc()) {
- clear_ctrlc();
- if (res < 0)
- got_ctrlc = 1;
- break;
- }
- cnt++;
-#ifdef AU_TEST_ONLY
- } while (res < 0 && cnt < 3);
- if (cnt < 3)
-#else
- } while (res < 0);
-#endif
- /*
- * it doesn't make sense to update the EEPROM if the
- * update was interrupted by the user due to errors.
- */
- if (got_ctrlc == 0)
- au_update_eeprom(i);
- else
- /* enable the power switch */
- *CPLD_VFD_BK &= ~POWER_OFF;
- }
- usb_stop();
- /* restore the old state */
- disable_ctrlc(old_ctrlc);
- return 0;
-}
-#endif /* CONFIG_AUTO_UPDATE */
diff --git a/board/trab/cmd_trab.c b/board/trab/cmd_trab.c
deleted file mode 100644
index 00eb385fdf..0000000000
--- a/board/trab/cmd_trab.c
+++ /dev/null
@@ -1,895 +0,0 @@
-/*
- * (C) Copyright 2003
- * Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#undef DEBUG
-
-#include <common.h>
-#include <command.h>
-#include <s3c2400.h>
-#include <rtc.h>
-
-/*
- * TRAB board specific commands. Especially commands for burn-in and function
- * test.
- */
-#if (CONFIG_COMMANDS & CFG_CMD_BSP)
-
-/* limits for valid range of VCC5V in mV */
-#define VCC5V_MIN 4500
-#define VCC5V_MAX 5500
-
-/*
- * Test strings for EEPROM test. Length of string 2 must not exceed length of
- * string 1. Otherwise a buffer overrun could occur!
- */
-#define EEPROM_TEST_STRING_1 "0987654321 :tset a si siht"
-#define EEPROM_TEST_STRING_2 "this is a test: 1234567890"
-
-/*
- * min/max limits for valid contact temperature during burn in test (in
- * degree Centigrade * 100)
- */
-#define MIN_CONTACT_TEMP -1000
-#define MAX_CONTACT_TEMP +9000
-
-/* blinking frequency of status LED */
-#define LED_BLINK_FREQ 5
-
-/* delay time between burn in cycles in seconds */
-#ifndef BURN_IN_CYCLE_DELAY /* if not defined in include/configs/trab.h */
-#define BURN_IN_CYCLE_DELAY 5
-#endif
-
-/* physical SRAM parameters */
-#define SRAM_ADDR 0x02000000 /* GCS1 */
-#define SRAM_SIZE 0x40000 /* 256 kByte */
-
-/* CPLD-Register for controlling TRAB hardware functions */
-#define CPLD_BUTTONS ((volatile unsigned long *)0x04020000)
-#define CPLD_FILL_LEVEL ((volatile unsigned long *)0x04008000)
-#define CPLD_ROTARY_SWITCH ((volatile unsigned long *)0x04018000)
-#define CPLD_RS485_RE ((volatile unsigned long *)0x04028000)
-
-/* I2C EEPROM device address */
-#define I2C_EEPROM_DEV_ADDR 0x54
-
-/* EEPROM address map */
-#define EE_ADDR_TEST 192
-#define EE_ADDR_MAX_CYCLES 256
-#define EE_ADDR_STATUS 258
-#define EE_ADDR_PASS_CYCLES 259
-#define EE_ADDR_FIRST_ERROR_CYCLE 261
-#define EE_ADDR_FIRST_ERROR_NUM 263
-#define EE_ADDR_FIRST_ERROR_NAME 264
-#define EE_ADDR_ACT_CYCLE 280
-
-/* Bit definitions for ADCCON */
-#define ADC_ENABLE_START 0x1
-#define ADC_READ_START 0x2
-#define ADC_STDBM 0x4
-#define ADC_INP_AIN0 (0x0 << 3)
-#define ADC_INP_AIN1 (0x1 << 3)
-#define ADC_INP_AIN2 (0x2 << 3)
-#define ADC_INP_AIN3 (0x3 << 3)
-#define ADC_INP_AIN4 (0x4 << 3)
-#define ADC_INP_AIN5 (0x5 << 3)
-#define ADC_INP_AIN6 (0x6 << 3)
-#define ADC_INP_AIN7 (0x7 << 3)
-#define ADC_PRSCEN 0x4000
-#define ADC_ECFLG 0x800
-
-/* misc */
-
-/* externals */
-extern int memory_post_tests (unsigned long start, unsigned long size);
-extern int i2c_write (uchar, uint, int , uchar* , int);
-extern int i2c_read (uchar, uint, int , uchar* , int);
-extern void tsc2000_reg_init (void);
-extern s32 tsc2000_contact_temp (void);
-extern void spi_init(void);
-
-/* function declarations */
-int do_dip (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
-int do_vcc5v (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
-int do_burn_in (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
-int do_contact_temp (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
-int do_burn_in_status (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
-int i2c_write_multiple (uchar chip, uint addr, int alen,
- uchar *buffer, int len);
-int i2c_read_multiple (uchar chip, uint addr, int alen,
- uchar *buffer, int len);
-int do_temp_log (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
-
-/* helper functions */
-static void adc_init (void);
-static int adc_read (unsigned int channel);
-static int read_dip (void);
-static int read_vcc5v (void);
-static int test_dip (void);
-static int test_vcc5v (void);
-static int test_rotary_switch (void);
-static int test_sram (void);
-static int test_eeprom (void);
-static int test_contact_temp (void);
-static void led_set (unsigned int);
-static void led_blink (void);
-static void led_init (void);
-static void sdelay (unsigned long seconds); /* delay in seconds */
-static int dummy (void);
-static int read_max_cycles(void);
-static void test_function_table_init (void);
-static void global_vars_init (void);
-static int global_vars_write_to_eeprom (void);
-
-/* globals */
-u16 max_cycles;
-u8 status;
-u16 pass_cycles;
-u16 first_error_cycle;
-u8 first_error_num;
-unsigned char first_error_name[16];
-u16 act_cycle;
-
-typedef struct test_function_s {
- unsigned char *name;
- int (*pf)(void);
-} test_function_t;
-
-/* max number of Burn In Functions */
-#define BIF_MAX 6
-
-/* table with burn in functions */
-test_function_t test_function[BIF_MAX];
-
-
-int do_burn_in (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- int i;
- int cycle_status;
-
- if (argc > 1) {
- printf ("Usage:\n%s\n", cmdtp->usage);
- return 1;
- }
-
- led_init ();
- global_vars_init ();
- test_function_table_init ();
- spi_init ();
-
- if (global_vars_write_to_eeprom () != 0) {
- printf ("%s: error writing global_vars to eeprom\n",
- __FUNCTION__);
- return (1);
- }
-
- if (read_max_cycles () != 0) {
- printf ("%s: error reading max_cycles from eeprom\n",
- __FUNCTION__);
- return (1);
- }
-
- if (max_cycles == 0) {
- printf ("%s: error, burn in max_cycles = 0\n", __FUNCTION__);
- return (1);
- }
-
- status = 0;
- for (act_cycle = 1; act_cycle <= max_cycles; act_cycle++) {
-
- cycle_status = 0;
-
- /*
- * avoid timestamp overflow problem after about 68 minutes of
- * udelay() time.
- */
- reset_timer_masked ();
- for (i = 0; i < BIF_MAX; i++) {
-
- /* call test function */
- if ((*test_function[i].pf)() != 0) {
- printf ("error in %s test\n",
- test_function[i].name);
-
- /* is it the first error? */
- if (status == 0) {
- status = 1;
- first_error_cycle = act_cycle;
-
- /* do not use error_num 0 */
- first_error_num = i+1;
- strncpy (first_error_name,
- test_function[i].name,
- sizeof (first_error_name));
- led_set (0);
- }
- cycle_status = 1;
- }
- }
- /* were all tests of actual cycle OK? */
- if (cycle_status == 0)
- pass_cycles++;
-
- /* set status LED if no error is occoured since yet */
- if (status == 0)
- led_set (1);
-
- printf ("%s: cycle %d finished\n", __FUNCTION__, act_cycle);
-
- /* pause between cycles */
- sdelay (BURN_IN_CYCLE_DELAY);
- }
-
- if (global_vars_write_to_eeprom () != 0) {
- led_set (0);
- printf ("%s: error writing global_vars to eeprom\n",
- __FUNCTION__);
- status = 1;
- }
-
- if (status == 0) {
- led_blink (); /* endless loop!! */
- return (0);
- } else {
- led_set (0);
- return (1);
- }
-}
-
-U_BOOT_CMD(
- burn_in, 1, 1, do_burn_in,
- "burn_in - start burn-in test application on TRAB\n",
- "\n"
- " - start burn-in test application\n"
- " The burn-in test could took a while to finish!\n"
- " The content of the onboard EEPROM is modified!\n"
-);
-
-
-int do_dip (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- int i, dip;
-
- if (argc > 1) {
- printf ("Usage:\n%s\n", cmdtp->usage);
- return 1;
- }
-
- if ((dip = read_dip ()) == -1) {
- return 1;
- }
-
- for (i = 0; i < 4; i++) {
- if ((dip & (1 << i)) == 0)
- printf("0");
- else
- printf("1");
- }
- printf("\n");
-
- return 0;
-}
-
-U_BOOT_CMD(
- dip, 1, 1, do_dip,
- "dip - read dip switch on TRAB\n",
- "\n"
- " - read state of dip switch (S1) on TRAB board\n"
- " read sequence: 1-2-3-4; ON=1; OFF=0; e.g.: \"0100\"\n"
-);
-
-
-int do_vcc5v (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- int vcc5v;
-
- if (argc > 1) {
- printf ("Usage:\n%s\n", cmdtp->usage);
- return 1;
- }
-
- if ((vcc5v = read_vcc5v ()) == -1) {
- return (1);
- }
-
- printf ("%d", (vcc5v / 1000));
- printf (".%d", (vcc5v % 1000) / 100);
- printf ("%d V\n", (vcc5v % 100) / 10) ;
-
- return 0;
-}
-
-U_BOOT_CMD(
- vcc5v, 1, 1, do_vcc5v,
- "vcc5v - read VCC5V on TRAB\n",
- "\n"
- " - read actual value of voltage VCC5V\n"
-);
-
-
-int do_contact_temp (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- int contact_temp;
-
- if (argc > 1) {
- printf ("Usage:\n%s\n", cmdtp->usage);
- return 1;
- }
-
- spi_init ();
-
- contact_temp = tsc2000_contact_temp();
- printf ("%d degree C * 100\n", contact_temp) ;
-
- return 0;
-}
-
-U_BOOT_CMD(
- c_temp, 1, 1, do_contact_temp,
- "c_temp - read contact temperature on TRAB\n",
- "\n"
- " - reads the onboard temperature (=contact temperature)\n"
-);
-
-
-int do_burn_in_status (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- if (argc > 1) {
- printf ("Usage:\n%s\n", cmdtp->usage);
- return 1;
- }
-
- if (i2c_read_multiple (I2C_EEPROM_DEV_ADDR, EE_ADDR_STATUS, 1,
- (unsigned char*) &status, 1)) {
- return (1);
- }
- if (i2c_read_multiple (I2C_EEPROM_DEV_ADDR, EE_ADDR_PASS_CYCLES, 1,
- (unsigned char*) &pass_cycles, 2)) {
- return (1);
- }
- if (i2c_read_multiple (I2C_EEPROM_DEV_ADDR, EE_ADDR_FIRST_ERROR_CYCLE,
- 1, (unsigned char*) &first_error_cycle, 2)) {
- return (1);
- }
- if (i2c_read_multiple (I2C_EEPROM_DEV_ADDR, EE_ADDR_FIRST_ERROR_NUM,
- 1, (unsigned char*) &first_error_num, 1)) {
- return (1);
- }
- if (i2c_read_multiple (I2C_EEPROM_DEV_ADDR, EE_ADDR_FIRST_ERROR_NAME,
- 1, first_error_name,
- sizeof (first_error_name))) {
- return (1);
- }
-
- if (read_max_cycles () != 0) {
- return (1);
- }
-
- printf ("max_cycles = %d\n", max_cycles);
- printf ("status = %d\n", status);
- printf ("pass_cycles = %d\n", pass_cycles);
- printf ("first_error_cycle = %d\n", first_error_cycle);
- printf ("first_error_num = %d\n", first_error_num);
- printf ("first_error_name = %.*s\n",(int) sizeof(first_error_name),
- first_error_name);
-
- return 0;
-}
-
-U_BOOT_CMD(
- bis, 1, 1, do_burn_in_status,
- "bis - print burn in status on TRAB\n",
- "\n"
- " - prints the status variables of the last burn in test\n"
- " stored in the onboard EEPROM on TRAB board\n"
-);
-
-static int read_dip (void)
-{
- unsigned int result = 0;
- int adc_val;
- int i;
-
- /***********************************************************
- DIP switch connection (according to wa4-cpu.sp.301.pdf, page 3):
- SW1 - AIN4
- SW2 - AIN5
- SW3 - AIN6
- SW4 - AIN7
-
- "On" DIP switch position short-circuits the voltage from
- the input channel (i.e. '0' conversion result means "on").
- *************************************************************/
-
- for (i = 7; i > 3; i--) {
-
- if ((adc_val = adc_read (i)) == -1) {
- printf ("%s: Channel %d could not be read\n",
- __FUNCTION__, i);
- return (-1);
- }
-
- /*
- * Input voltage (switch open) is 1.8 V.
- * (Vin_High/VRef)*adc_res = (1,8V/2,5V)*1023) = 736
- * Set trigger at halve that value.
- */
- if (adc_val < 368)
- result |= (1 << (i-4));
- }
- return (result);
-}
-
-
-static int read_vcc5v (void)
-{
- s32 result;
-
- /* VCC5V is connected to channel 2 */
-
- if ((result = adc_read (2)) == -1) {
- printf ("%s: VCC5V could not be read\n", __FUNCTION__);
- return (-1);
- }
- /*
- * Calculate voltage value. Split in two parts because there is no
- * floating point support. VCC5V is connected over an resistor divider:
- * VCC5V=ADCval*2,5V/1023*(10K+30K)/10K.
- */
- result = result * 10 * 1000 / 1023; /* result in mV */
-
- return (result);
-}
-
-
-static int test_dip (void)
-{
- static int first_run = 1;
- static int first_dip;
-
- if (first_run) {
- if ((first_dip = read_dip ()) == -1) {
- return (1);
- }
- first_run = 0;
- debug ("%s: first_dip=%d\n", __FUNCTION__, first_dip);
- }
- if (first_dip != read_dip ()) {
- return (1);
- } else {
- return (0);
- }
-}
-
-
-static int test_vcc5v (void)
-{
- int vcc5v;
-
- if ((vcc5v = read_vcc5v ()) == -1) {
- return (1);
- }
-
- if ((vcc5v > VCC5V_MAX) || (vcc5v < VCC5V_MIN)) {
- printf ("%s: vcc5v[V/100]=%d\n", __FUNCTION__, vcc5v);
- return (1);
- } else {
- return (0);
- }
-}
-
-
-static int test_rotary_switch (void)
-{
- static int first_run = 1;
- static int first_rs;
-
- if (first_run) {
- /*
- * clear bits in CPLD, because they have random values after
- * power-up or reset.
- */
- *CPLD_ROTARY_SWITCH |= (1 << 16) | (1 << 17);
-
- first_rs = ((*CPLD_ROTARY_SWITCH >> 16) & 0x7);
- first_run = 0;
- debug ("%s: first_rs=%d\n", __FUNCTION__, first_rs);
- }
-
- if (first_rs != ((*CPLD_ROTARY_SWITCH >> 16) & 0x7)) {
- return (1);
- } else {
- return (0);
- }
-}
-
-
-static int test_sram (void)
-{
- return (memory_post_tests (SRAM_ADDR, SRAM_SIZE));
-}
-
-
-static int test_eeprom (void)
-{
- unsigned char temp[sizeof (EEPROM_TEST_STRING_1)];
- int result = 0;
-
- /* write test string 1, read back and verify */
- if (i2c_write_multiple (I2C_EEPROM_DEV_ADDR, EE_ADDR_TEST, 1,
- EEPROM_TEST_STRING_1,
- sizeof (EEPROM_TEST_STRING_1))) {
- return (1);
- }
-
- if (i2c_read_multiple (I2C_EEPROM_DEV_ADDR, EE_ADDR_TEST, 1,
- temp, sizeof (EEPROM_TEST_STRING_1))) {
- return (1);
- }
-
- if (strcmp (temp, EEPROM_TEST_STRING_1) != 0) {
- result = 1;
- printf ("%s: error; read_str = \"%s\"\n", __FUNCTION__, temp);
- }
-
- /* write test string 2, read back and verify */
- if (result == 0) {
- if (i2c_write_multiple (I2C_EEPROM_DEV_ADDR, EE_ADDR_TEST, 1,
- EEPROM_TEST_STRING_2,
- sizeof (EEPROM_TEST_STRING_2))) {
- return (1);
- }
-
- if (i2c_read_multiple (I2C_EEPROM_DEV_ADDR, EE_ADDR_TEST, 1,
- temp, sizeof (EEPROM_TEST_STRING_2))) {
- return (1);
- }
-
- if (strcmp (temp, EEPROM_TEST_STRING_2) != 0) {
- result = 1;
- printf ("%s: error; read str = \"%s\"\n",
- __FUNCTION__, temp);
- }
- }
- return (result);
-}
-
-
-static int test_contact_temp (void)
-{
- int contact_temp;
-
- contact_temp = tsc2000_contact_temp ();
-
- if ((contact_temp < MIN_CONTACT_TEMP)
- || (contact_temp > MAX_CONTACT_TEMP))
- return (1);
- else
- return (0);
-}
-
-
-int i2c_write_multiple (uchar chip, uint addr, int alen,
- uchar *buffer, int len)
-{
- int i;
-
- if (alen != 1) {
- printf ("%s: addr len other than 1 not supported\n",
- __FUNCTION__);
- return (1);
- }
-
- for (i = 0; i < len; i++) {
- if (i2c_write (chip, addr+i, alen, buffer+i, 1)) {
- printf ("%s: could not write to i2c device %d"
- ", addr %d\n", __FUNCTION__, chip, addr);
- return (1);
- }
-#if 0
- printf ("chip=%#x, addr+i=%#x+%d=%p, alen=%d, *buffer+i="
- "%#x+%d=%p=\"%.1s\"\n", chip, addr, i, addr+i,
- alen, buffer, i, buffer+i, buffer+i);
-#endif
-
- udelay (30000);
- }
- return (0);
-}
-
-
-int i2c_read_multiple ( uchar chip, uint addr, int alen,
- uchar *buffer, int len)
-{
- int i;
-
- if (alen != 1) {
- printf ("%s: addr len other than 1 not supported\n",
- __FUNCTION__);
- return (1);
- }
-
- for (i = 0; i < len; i++) {
- if (i2c_read (chip, addr+i, alen, buffer+i, 1)) {
- printf ("%s: could not read from i2c device %#x"
- ", addr %d\n", __FUNCTION__, chip, addr);
- return (1);
- }
- }
- return (0);
-}
-
-
-static int adc_read (unsigned int channel)
-{
- int j = 1000; /* timeout value for wait loop in us */
- int result;
- S3C2400_ADC *padc;
-
- padc = S3C2400_GetBase_ADC();
- channel &= 0x7;
-
- adc_init ();
-
- padc->ADCCON &= ~ADC_STDBM; /* select normal mode */
- padc->ADCCON &= ~(0x7 << 3); /* clear the channel bits */
- padc->ADCCON |= ((channel << 3) | ADC_ENABLE_START);
-
- while (j--) {
- if ((padc->ADCCON & ADC_ENABLE_START) == 0)
- break;
- udelay (1);
- }
-
- if (j == 0) {
- printf("%s: ADC timeout\n", __FUNCTION__);
- padc->ADCCON |= ADC_STDBM; /* select standby mode */
- return -1;
- }
-
- result = padc->ADCDAT & 0x3FF;
-
- padc->ADCCON |= ADC_STDBM; /* select standby mode */
-
- debug ("%s: channel %d, result[DIGIT]=%d\n", __FUNCTION__,
- (padc->ADCCON >> 3) & 0x7, result);
-
- /*
- * Wait for ADC to be ready for next conversion. This delay value was
- * estimated, because the datasheet does not specify a value.
- */
- udelay (1000);
-
- return (result);
-}
-
-
-static void adc_init (void)
-{
- S3C2400_ADC *padc;
-
- padc = S3C2400_GetBase_ADC();
-
- padc->ADCCON &= ~(0xff << 6); /* clear prescaler bits */
- padc->ADCCON |= ((65 << 6) | ADC_PRSCEN); /* set prescaler */
-
- /*
- * Wait some time to avoid problem with very first call of
- * adc_read(). Without this delay, sometimes the first read
- * adc value is 0. Perhaps because the adjustment of prescaler
- * takes some clock cycles?
- */
- udelay (1000);
-
- return;
-}
-
-
-static void led_set (unsigned int state)
-{
- S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
-
- led_init ();
-
- switch (state) {
- case 0: /* turn LED off */
- gpio->PADAT |= (1 << 12);
- break;
- case 1: /* turn LED on */
- gpio->PADAT &= ~(1 << 12);
- break;
- default:
- break;
- }
-}
-
-static void led_blink (void)
-{
- led_init ();
-
- /* blink LED. This function does not return! */
- while (1) {
- led_set (1);
- udelay (1000000 / LED_BLINK_FREQ / 2);
- led_set (0);
- udelay (1000000 / LED_BLINK_FREQ / 2);
- }
-}
-
-
-static void led_init (void)
-{
- S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
-
- /* configure GPA12 as output and set to High -> LED off */
- gpio->PACON &= ~(1 << 12);
- gpio->PADAT |= (1 << 12);
-}
-
-
-static void sdelay (unsigned long seconds)
-{
- unsigned long i;
-
- for (i = 0; i < seconds; i++) {
- udelay (1000000);
- }
-}
-
-
-static int global_vars_write_to_eeprom (void)
-{
- if (i2c_write_multiple (I2C_EEPROM_DEV_ADDR, EE_ADDR_STATUS, 1,
- (unsigned char*) &status, 1)) {
- return (1);
- }
- if (i2c_write_multiple (I2C_EEPROM_DEV_ADDR, EE_ADDR_PASS_CYCLES, 1,
- (unsigned char*) &pass_cycles, 2)) {
- return (1);
- }
- if (i2c_write_multiple (I2C_EEPROM_DEV_ADDR, EE_ADDR_FIRST_ERROR_CYCLE,
- 1, (unsigned char*) &first_error_cycle, 2)) {
- return (1);
- }
- if (i2c_write_multiple (I2C_EEPROM_DEV_ADDR, EE_ADDR_FIRST_ERROR_NUM,
- 1, (unsigned char*) &first_error_num, 1)) {
- return (1);
- }
- if (i2c_write_multiple (I2C_EEPROM_DEV_ADDR, EE_ADDR_FIRST_ERROR_NAME,
- 1, first_error_name,
- sizeof(first_error_name))) {
- return (1);
- }
- return (0);
-}
-
-static void global_vars_init (void)
-{
- status = 1; /* error */
- pass_cycles = 0;
- first_error_cycle = 0;
- first_error_num = 0;
- first_error_name[0] = '\0';
- act_cycle = 0;
- max_cycles = 0;
-}
-
-
-static void test_function_table_init (void)
-{
- int i;
-
- for (i = 0; i < BIF_MAX; i++)
- test_function[i].pf = dummy;
-
- /*
- * the length of "name" must not exceed 16, including the '\0'
- * termination. See also the EEPROM address map.
- */
- test_function[0].pf = test_dip;
- test_function[0].name = "dip";
-
- test_function[1].pf = test_vcc5v;
- test_function[1].name = "vcc5v";
-
- test_function[2].pf = test_rotary_switch;
- test_function[2].name = "rotary_switch";
-
- test_function[3].pf = test_sram;
- test_function[3].name = "sram";
-
- test_function[4].pf = test_eeprom;
- test_function[4].name = "eeprom";
-
- test_function[5].pf = test_contact_temp;
- test_function[5].name = "contact_temp";
-}
-
-
-static int read_max_cycles (void)
-{
- if (i2c_read_multiple (I2C_EEPROM_DEV_ADDR, EE_ADDR_MAX_CYCLES, 1,
- (unsigned char *) &max_cycles, 2) != 0) {
- return (1);
- }
-
- return (0);
-}
-
-static int dummy(void)
-{
- return (0);
-}
-
-int do_temp_log (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- int contact_temp;
- int delay = 0;
-#if (CONFIG_COMMANDS & CFG_CMD_DATE)
- struct rtc_time tm;
-#endif
-
- if (argc > 2) {
- printf ("Usage:\n%s\n", cmdtp->usage);
- return 1;
- }
-
- if (argc > 1) {
- delay = simple_strtoul(argv[1], NULL, 10);
- }
-
- spi_init ();
- while (1) {
-
-#if (CONFIG_COMMANDS & CFG_CMD_DATE)
- rtc_get (&tm);
- printf ("%4d-%02d-%02d %2d:%02d:%02d - ",
- tm.tm_year, tm.tm_mon, tm.tm_mday,
- tm.tm_hour, tm.tm_min, tm.tm_sec);
-#endif
-
- contact_temp = tsc2000_contact_temp();
- printf ("%d\n", contact_temp) ;
-
- if (delay != 0)
- /*
- * reset timer to avoid timestamp overflow problem
- * after about 68 minutes of udelay() time.
- */
- reset_timer_masked ();
- sdelay (delay);
- }
-
- return 0;
-}
-
-U_BOOT_CMD(
- tlog, 2, 1, do_temp_log,
- "tlog - log contact temperature [1/100 C] to console (endlessly)\n",
- "delay\n"
- " - contact temperature [1/100 C] is printed endlessly to console\n"
- " <delay> specifies the seconds to wait between two measurements\n"
- " For each measurment a timestamp is printeted\n"
-);
-
-#endif /* CFG_CMD_BSP */
diff --git a/board/trab/config.mk b/board/trab/config.mk
deleted file mode 100644
index f2411d009c..0000000000
--- a/board/trab/config.mk
+++ /dev/null
@@ -1,26 +0,0 @@
-#
-# (C) Copyright 2002
-# Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
-#
-# TRAB board with S3C2400X (arm920t) cpu
-#
-# see http://www.samsung.com/ for more information on SAMSUNG
-#
-
-#
-# TRAB has 1 bank of 16 MB or 32 MB DRAM
-#
-# 0c00'0000 to 0e00'0000
-#
-# Linux-Kernel is expected to be at 0c00'8000, entry 0c00'8000
-#
-# we load ourself to 0CF0'0000 / 0DF0'0000
-#
-# download areas is 0C80'0000
-#
-
-sinclude $(TOPDIR)/board/$(BOARDDIR)/config.tmp
-
-ifndef TEXT_BASE
-TEXT_BASE = 0x0DF40000
-endif
diff --git a/board/trab/flash.c b/board/trab/flash.c
deleted file mode 100644
index b4435e390f..0000000000
--- a/board/trab/flash.c
+++ /dev/null
@@ -1,568 +0,0 @@
-/*
- * (C) Copyright 2002
- * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/* #define DEBUG */
-
-#include <common.h>
-#include <environment.h>
-
-static ulong flash_get_size (vu_long *addr, flash_info_t *info);
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
-
-
-#define CMD_READ_ARRAY 0x00F000F0
-#define CMD_UNLOCK1 0x00AA00AA
-#define CMD_UNLOCK2 0x00550055
-#define CMD_ERASE_SETUP 0x00800080
-#define CMD_ERASE_CONFIRM 0x00300030
-#define CMD_PROGRAM 0x00A000A0
-#define CMD_UNLOCK_BYPASS 0x00200020
-#define CMD_READ_MANF_ID 0x00900090
-#define CMD_UNLOCK_BYPASS_RES1 0x00900090
-#define CMD_UNLOCK_BYPASS_RES2 0x00000000
-
-#define MEM_FLASH_ADDR (*(volatile u32 *)CFG_FLASH_BASE)
-#define MEM_FLASH_ADDR1 (*(volatile u32 *)(CFG_FLASH_BASE + (0x00000555 << 2)))
-#define MEM_FLASH_ADDR2 (*(volatile u32 *)(CFG_FLASH_BASE + (0x000002AA << 2)))
-
-#define BIT_ERASE_DONE 0x00800080
-#define BIT_RDY_MASK 0x00800080
-#define BIT_PROGRAM_ERROR 0x00200020
-#define BIT_TIMEOUT 0x80000000 /* our flag */
-
-#define READY 1
-#define ERR 2
-#define TMO 4
-
-/*-----------------------------------------------------------------------
- */
-
-ulong flash_init (void)
-{
- int i, j;
- ulong size = 0;
-
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- ulong flashbase = 0;
- flash_info_t *info = &flash_info[i];
-
- /* Init: no FLASHes known */
- info->flash_id = FLASH_UNKNOWN;
-
- size += flash_get_size (CFG_FLASH_BASE, info);
-
- if (i == 0)
- flashbase = CFG_FLASH_BASE;
- else
- panic ("configured too many flash banks!\n");
- for (j = 0; j < info->sector_count; j++) {
-
- info->protect[j] = 0;
- info->start[j] = flashbase;
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case (FLASH_AM320B & FLASH_TYPEMASK):
- case (FLASH_MXLV320B & FLASH_TYPEMASK):
- /* Boot sector type: 8 x 8 + N x 128 kB */
- flashbase += (j < 8) ? 0x4000 : 0x20000;
- break;
- case (FLASH_AM640U & FLASH_TYPEMASK):
- /* Uniform sector type: 128 kB */
- flashbase += 0x20000;
- break;
- default:
- printf ("## Bad flash chip type 0x%04lX\n",
- info->flash_id & FLASH_TYPEMASK);
- }
- }
- }
-
- /*
- * Protect monitor and environment sectors
- */
- flash_protect ( FLAG_PROTECT_SET,
- CFG_FLASH_BASE,
- CFG_FLASH_BASE + monitor_flash_len - 1,
- &flash_info[0]);
-
- flash_protect ( FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0]);
-
-#ifdef CFG_ENV_ADDR_REDUND
- flash_protect ( FLAG_PROTECT_SET,
- CFG_ENV_ADDR_REDUND,
- CFG_ENV_ADDR_REDUND + CFG_ENV_SIZE_REDUND - 1,
- &flash_info[0]);
-#endif
-
- return size;
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t * info)
-{
- int i;
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case (FLASH_MAN_AMD & FLASH_VENDMASK):
- printf ("AMD "); break;
- case (FLASH_MAN_FUJ & FLASH_VENDMASK):
- printf ("FUJITSU "); break;
- case (FLASH_MAN_MX & FLASH_VENDMASK):
- printf ("MACRONIX "); break;
- default: printf ("Unknown Vendor "); break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case (FLASH_AM320B & FLASH_TYPEMASK):
- printf ("2x Am29LV320DB (32Mbit)\n");
- break;
- case (FLASH_MXLV320B & FLASH_TYPEMASK):
- printf ("2x MX29LV320DB (32Mbit)\n");
- break;
- case (FLASH_AM640U & FLASH_TYPEMASK):
- printf ("2x Am29LV640D (64Mbit)\n");
- break;
- default:
- printf ("Unknown Chip Type\n");
- goto Done;
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; i++) {
- if ((i % 5) == 0) {
- printf ("\n ");
- }
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " ");
- }
- printf ("\n");
-
-Done: ;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t * info, int s_first, int s_last)
-{
- ulong result;
-
-#if 0
- int cflag;
-#endif
- int iflag, prot, sect;
- int rc = ERR_OK;
- int chip1, chip2;
-
- debug ("flash_erase: s_first %d s_last %d\n", s_first, s_last);
-
- /* first look for protection bits */
-
- if (info->flash_id == FLASH_UNKNOWN)
- return ERR_UNKNOWN_FLASH_TYPE;
-
- if ((s_first < 0) || (s_first > s_last)) {
- return ERR_INVAL;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case (FLASH_MAN_AMD & FLASH_VENDMASK): break; /* OK */
- case (FLASH_MAN_FUJ & FLASH_VENDMASK): break; /* OK */
- case (FLASH_MAN_MX & FLASH_VENDMASK): break; /* OK */
- default:
- debug ("## flash_erase: unknown manufacturer\n");
- return (ERR_UNKNOWN_FLASH_VENDOR);
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- /*
- * Disable interrupts which might cause a timeout
- * here. Remember that our exception vectors are
- * at address 0 in the flash, and we don't want a
- * (ticker) exception to happen while the flash
- * chip is in programming mode.
- */
-#if 0
- cflag = icache_status ();
- icache_disable ();
-#endif
- iflag = disable_interrupts ();
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect <= s_last && !ctrlc (); sect++) {
-
- debug ("Erasing sector %2d @ %08lX... ",
- sect, info->start[sect]);
-
- /* arm simple, non interrupt dependent timer */
- reset_timer_masked ();
-
- if (info->protect[sect] == 0) { /* not protected */
- vu_long *addr = (vu_long *) (info->start[sect]);
-
- MEM_FLASH_ADDR1 = CMD_UNLOCK1;
- MEM_FLASH_ADDR2 = CMD_UNLOCK2;
- MEM_FLASH_ADDR1 = CMD_ERASE_SETUP;
-
- MEM_FLASH_ADDR1 = CMD_UNLOCK1;
- MEM_FLASH_ADDR2 = CMD_UNLOCK2;
- *addr = CMD_ERASE_CONFIRM;
-
- /* wait until flash is ready */
- chip1 = chip2 = 0;
-
- do {
- result = *addr;
-
- /* check timeout */
- if (get_timer_masked () > CFG_FLASH_ERASE_TOUT) {
- MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
- chip1 = TMO;
- break;
- }
-
- if (!chip1 && (result & 0xFFFF) & BIT_ERASE_DONE)
- chip1 = READY;
-
- if (!chip1 && (result & 0xFFFF) & BIT_PROGRAM_ERROR)
- chip1 = ERR;
-
- if (!chip2 && (result >> 16) & BIT_ERASE_DONE)
- chip2 = READY;
-
- if (!chip2 && (result >> 16) & BIT_PROGRAM_ERROR)
- chip2 = ERR;
-
- } while (!chip1 || !chip2);
-
- MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
-
- if (chip1 == ERR || chip2 == ERR) {
- rc = ERR_PROG_ERROR;
- goto outahere;
- }
- if (chip1 == TMO) {
- rc = ERR_TIMOUT;
- goto outahere;
- }
- }
- }
-
-outahere:
- /* allow flash to settle - wait 10 ms */
- udelay_masked (10000);
-
- if (iflag)
- enable_interrupts ();
-
-#if 0
- if (cflag)
- icache_enable ();
-#endif
- return rc;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash
- */
-
-volatile static int write_word (flash_info_t * info, ulong dest,
- ulong data)
-{
- vu_long *addr = (vu_long *) dest;
- ulong result;
- int rc = ERR_OK;
-
-#if 0
- int cflag;
-#endif
- int iflag;
- int chip1, chip2;
-
- /*
- * Check if Flash is (sufficiently) erased
- */
- result = *addr;
- if ((result & data) != data)
- return ERR_NOT_ERASED;
-
- /*
- * Disable interrupts which might cause a timeout
- * here. Remember that our exception vectors are
- * at address 0 in the flash, and we don't want a
- * (ticker) exception to happen while the flash
- * chip is in programming mode.
- */
-#if 0
- cflag = icache_status ();
- icache_disable ();
-#endif
- iflag = disable_interrupts ();
-
- *addr = CMD_PROGRAM;
- *addr = data;
-
- /* arm simple, non interrupt dependent timer */
- reset_timer_masked ();
-
- /* wait until flash is ready */
- chip1 = chip2 = 0;
- do {
- result = *addr;
-
- /* check timeout */
- if (get_timer_masked () > CFG_FLASH_ERASE_TOUT) {
- chip1 = ERR | TMO;
- break;
- }
- if (!chip1 && ((result & 0x80) == (data & 0x80)))
- chip1 = READY;
-
- if (!chip1 && ((result & 0xFFFF) & BIT_PROGRAM_ERROR)) {
- result = *addr;
-
- if ((result & 0x80) == (data & 0x80))
- chip1 = READY;
- else
- chip1 = ERR;
- }
-
- if (!chip2 && ((result & (0x80 << 16)) == (data & (0x80 << 16))))
- chip2 = READY;
-
- if (!chip2 && ((result >> 16) & BIT_PROGRAM_ERROR)) {
- result = *addr;
-
- if ((result & (0x80 << 16)) == (data & (0x80 << 16)))
- chip2 = READY;
- else
- chip2 = ERR;
- }
-
- } while (!chip1 || !chip2);
-
- *addr = CMD_READ_ARRAY;
-
- if (chip1 == ERR || chip2 == ERR || *addr != data)
- rc = ERR_PROG_ERROR;
-
- if (iflag)
- enable_interrupts ();
-
-#if 0
- if (cflag)
- icache_enable ();
-#endif
-
- return rc;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash.
- */
-
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int l;
- int i, rc;
-
- MEM_FLASH_ADDR1 = CMD_UNLOCK1;
- MEM_FLASH_ADDR2 = CMD_UNLOCK2;
- MEM_FLASH_ADDR1 = CMD_UNLOCK_BYPASS;
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i = 0, cp = wp; i < l; ++i, ++cp) {
- data = (data >> 8) | (*(uchar *) cp << 24);
- }
- for (; i < 4 && cnt > 0; ++i) {
- data = (data >> 8) | (*src++ << 24);
- --cnt;
- ++cp;
- }
- for (; cnt == 0 && i < 4; ++i, ++cp) {
- data = (data >> 8) | (*(uchar *) cp << 24);
- }
-
- if ((rc = write_word (info, wp, data)) != 0) {
- goto Done;
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- if (((ulong)src) & 0x3) {
- for (i = 0; i < 4; i++) {
- ((char *)&data)[i] = ((vu_char *)src)[i];
- }
- }
- else {
- data = *((vu_long *) src);
- }
-
- if ((rc = write_word (info, wp, data)) != 0) {
- goto Done;
- }
- src += 4;
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- rc = ERR_OK;
- goto Done;
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i = 0, cp = wp; i < 4 && cnt > 0; ++i, ++cp) {
- data = (data >> 8) | (*src++ << 24);
- --cnt;
- }
- for (; i < 4; ++i, ++cp) {
- data = (data >> 8) | (*(uchar *) cp << 24);
- }
-
- rc = write_word (info, wp, data);
-
- Done:
-
- MEM_FLASH_ADDR = CMD_UNLOCK_BYPASS_RES1;
- MEM_FLASH_ADDR = CMD_UNLOCK_BYPASS_RES2;
-
- return (rc);
-}
-
-/*-----------------------------------------------------------------------
- */
-
-static ulong flash_get_size (vu_long *addr, flash_info_t *info)
-{
- ulong value;
-
- /* Write auto select command sequence and read Manufacturer ID */
- addr[0x0555] = CMD_UNLOCK1;
- addr[0x02AA] = CMD_UNLOCK2;
- addr[0x0555] = CMD_READ_MANF_ID;
-
- value = addr[0];
-
- debug ("Manuf. ID @ 0x%08lx: 0x%08lx\n", (ulong)addr, value);
-
- switch (value) {
- case AMD_MANUFACT:
- info->flash_id = FLASH_MAN_AMD;
- break;
- case FUJ_MANUFACT:
- info->flash_id = FLASH_MAN_FUJ;
- break;
- case MX_MANUFACT:
- info->flash_id = FLASH_MAN_MX;
- break;
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- addr[0] = 0x00FF00FF; /* restore read mode */
- debug ("## flash_init: unknown manufacturer\n");
- return (0); /* no or unknown flash */
- }
-
- value = addr[1]; /* device ID */
-
- debug ("Device ID @ 0x%08lx: 0x%08lx\n", (ulong)(&addr[1]), value);
-
- switch (value) {
- case AMD_ID_LV320B:
- info->flash_id += FLASH_AM320B;
- info->sector_count = 71;
- info->size = 0x00800000;
-
- addr[0] = 0x00FF00FF; /* restore read mode */
- break; /* => 8 MB */
-
- case AMD_ID_LV640U:
- info->flash_id += FLASH_AM640U;
- info->sector_count = 128;
- info->size = 0x01000000;
-
- addr[0] = 0x00F000F0; /* restore read mode */
- break; /* => 16 MB */
-
- case MX_ID_LV320B:
- info->flash_id += FLASH_MXLV320B;
- info->sector_count = 71;
- info->size = 0x00800000;
-
- addr[0] = 0x00FF00FF; /* restore read mode */
- break; /* => 8 MB */
-
- default:
- debug ("## flash_init: unknown flash chip\n");
- info->flash_id = FLASH_UNKNOWN;
- addr[0] = 0x00FF00FF; /* restore read mode */
- return (0); /* => no or unknown flash */
-
- }
-
- if (info->sector_count > CFG_MAX_FLASH_SECT) {
- printf ("** ERROR: sector count %d > max (%d) **\n",
- info->sector_count, CFG_MAX_FLASH_SECT);
- info->sector_count = CFG_MAX_FLASH_SECT;
- }
-
- return (info->size);
-}
diff --git a/board/trab/lowlevel_init.S b/board/trab/lowlevel_init.S
deleted file mode 100644
index 128ae7e4aa..0000000000
--- a/board/trab/lowlevel_init.S
+++ /dev/null
@@ -1,182 +0,0 @@
-/*
- * Memory Setup stuff - taken from blob memsetup.S
- *
- * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) and
- * Jan-Derk Bakker (J.D.Bakker@its.tudelft.nl)
- *
- * Modified for the TRAB board by
- * (C) Copyright 2002-2003
- * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-
-#include <config.h>
-#include <version.h>
-
-
-/* some parameters for the board */
-
-/*
- *
- * Copied from linux/arch/arm/boot/compressed/head-s3c2400.S
- *
- * Copyright (C) 2001 Samsung Electronics by chc, 010406
- *
- * TRAB specific tweaks.
- *
- */
-
-/* memory controller */
-#define BWSCON 0x14000000
-
-/* Bank0 */
-#define B0_Tacs 0x1 /* 1 clk */
-#define B0_Tcos 0x1 /* 1 clk */
-#define B0_Tacc 0x5 /* 8 clk */
-#define B0_Tcoh 0x1 /* 1 clk */
-#define B0_Tah 0x1 /* 1 clk */
-#define B0_Tacp 0x0
-#define B0_PMC 0x0 /* normal */
-
-/* Bank1 - SRAM */
-#define B1_Tacs 0x1 /* 1 clk */
-#define B1_Tcos 0x1 /* 1 clk */
-#define B1_Tacc 0x5 /* 8 clk */
-#define B1_Tcoh 0x1 /* 1 clk */
-#define B1_Tah 0x1 /* 1 clk */
-#define B1_Tacp 0x0
-#define B1_PMC 0x0 /* normal */
-
-/* Bank2 - CPLD */
-#define B2_Tacs 0x1 /* 1 clk */
-#define B2_Tcos 0x1 /* 1 clk */
-#define B2_Tacc 0x5 /* 8 clk */
-#define B2_Tcoh 0x1 /* 1 clk */
-#define B2_Tah 0x1 /* 1 clk */
-#define B2_Tacp 0x0
-#define B2_PMC 0x0 /* normal */
-
-/* Bank3 - setup for the cs8900 */
-#define B3_Tacs 0x3 /* 4 clk */
-#define B3_Tcos 0x3 /* 4 clk */
-#define B3_Tacc 0x7 /* 14 clk */
-#define B3_Tcoh 0x1 /* 1 clk */
-#define B3_Tah 0x0 /* 0 clk */
-#define B3_Tacp 0x3 /* 6 clk */
-#define B3_PMC 0x0 /* normal */
-
-/* Bank4 */
-#define B4_Tacs 0x0 /* 0 clk */
-#define B4_Tcos 0x0 /* 0 clk */
-#define B4_Tacc 0x7 /* 14 clk */
-#define B4_Tcoh 0x0 /* 0 clk */
-#define B4_Tah 0x0 /* 0 clk */
-#define B4_Tacp 0x0
-#define B4_PMC 0x0 /* normal */
-
-/* Bank5 */
-#define B5_Tacs 0x0 /* 0 clk */
-#define B5_Tcos 0x0 /* 0 clk */
-#define B5_Tacc 0x7 /* 14 clk */
-#define B5_Tcoh 0x0 /* 0 clk */
-#define B5_Tah 0x0 /* 0 clk */
-#define B5_Tacp 0x0
-#define B5_PMC 0x0 /* normal */
-
-#ifndef CONFIG_RAM_16MB /* 32 MB RAM */
-/* Bank6 */
-#define B6_MT 0x3 /* SDRAM */
-#define B6_Trcd 0x0 /* 2clk */
-#define B6_SCAN 0x1 /* 9 bit */
-
-/* Bank7 */
-#define B7_MT 0x3 /* SDRAM */
-#define B7_Trcd 0x0 /* 2clk */
-#define B7_SCAN 0x1 /* 9 bit */
-#else /* CONFIG_RAM_16MB = 16 MB RAM */
-/* Bank6 */
-#define B6_MT 0x3 /* SDRAM */
-#define B6_Trcd 0x1 /* 2clk */
-#define B6_SCAN 0x0 /* 8 bit */
-
-/* Bank7 */
-#define B7_MT 0x3 /* SDRAM */
-#define B7_Trcd 0x1 /* 2clk */
-#define B7_SCAN 0x0 /* 8 bit */
-#endif /* CONFIG_RAM_16MB */
-
-/* refresh parameter */
-#define REFEN 0x1 /* enable refresh */
-#define TREFMD 0x0 /* CBR(CAS before RAS)/auto refresh */
-#define Trp 0x0 /* 2 clk */
-#define Trc 0x3 /* 7 clk */
-#define Tchr 0x2 /* 3 clk */
-
-#ifdef CONFIG_TRAB_50MHZ
-#define REFCNT 1269 /* period=15.6 us, HCLK=50Mhz, (2048+1-15.6*50) */
-#else
-#define REFCNT 1011 /* period=15.6 us, HCLK=66.5Mhz, (2048+1-15.6*66.5) */
-#endif
-
-
-_TEXT_BASE:
- .word TEXT_BASE
-
-.globl lowlevel_init
-lowlevel_init:
- /* memory control configuration */
- /* make r0 relative the current location so that it */
- /* reads SMRDATA out of FLASH rather than memory ! */
- ldr r0, =SMRDATA
- ldr r1, _TEXT_BASE
- sub r0, r0, r1
- ldr r1, =BWSCON /* Bus Width Status Controller */
- add r2, r0, #52
-0:
- ldr r3, [r0], #4
- str r3, [r1], #4
- cmp r2, r0
- bne 0b
-
- /* everything is fine now */
- mov pc, lr
-
- .ltorg
-/* the literal pools origin */
-
-SMRDATA:
- .word 0x2211d644 /* d->Ethernet, 6->CPLD, 4->SRAM, 4->FLASH */
- .word ((B0_Tacs<<13)+(B0_Tcos<<11)+(B0_Tacc<<8)+(B0_Tcoh<<6)+(B0_Tah<<4)+(B0_Tacp<<2)+(B0_PMC)) /* GCS0 */
- .word ((B1_Tacs<<13)+(B1_Tcos<<11)+(B1_Tacc<<8)+(B1_Tcoh<<6)+(B1_Tah<<4)+(B1_Tacp<<2)+(B1_PMC)) /* GCS1 */
- .word ((B2_Tacs<<13)+(B2_Tcos<<11)+(B2_Tacc<<8)+(B2_Tcoh<<6)+(B2_Tah<<4)+(B2_Tacp<<2)+(B2_PMC)) /* GCS2 */
- .word ((B3_Tacs<<13)+(B3_Tcos<<11)+(B3_Tacc<<8)+(B3_Tcoh<<6)+(B3_Tah<<4)+(B3_Tacp<<2)+(B3_PMC)) /* GCS3 */
- .word ((B4_Tacs<<13)+(B4_Tcos<<11)+(B4_Tacc<<8)+(B4_Tcoh<<6)+(B4_Tah<<4)+(B4_Tacp<<2)+(B4_PMC)) /* GCS4 */
- .word ((B5_Tacs<<13)+(B5_Tcos<<11)+(B5_Tacc<<8)+(B5_Tcoh<<6)+(B5_Tah<<4)+(B5_Tacp<<2)+(B5_PMC)) /* GCS5 */
- .word ((B6_MT<<15)+(B6_Trcd<<2)+(B6_SCAN)) /* GCS6 */
- .word ((B7_MT<<15)+(B7_Trcd<<2)+(B7_SCAN)) /* GCS7 */
- .word ((REFEN<<23)+(TREFMD<<22)+(Trp<<20)+(Trc<<18)+(Tchr<<16)+REFCNT)
-#ifndef CONFIG_RAM_16MB /* 32 MB RAM */
- .word 0x10 /* BUSWIDTH=32, SCLK power saving mode, BANKSIZE 32M/32M */
-#else /* CONFIG_RAM_16MB = 16 MB RAM */
- .word 0x17 /* BUSWIDTH=32, SCLK power saving mode, BANKSIZE 16M/16M */
-#endif /* CONFIG_RAM_16MB */
- .word 0x20 /* MRSR6, CL=2clk */
- .word 0x20 /* MRSR7 */
diff --git a/board/trab/memory.c b/board/trab/memory.c
deleted file mode 100644
index 9104413098..0000000000
--- a/board/trab/memory.c
+++ /dev/null
@@ -1,485 +0,0 @@
-/*
- * (C) Copyright 2002-2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-
-/* Memory test
- *
- * General observations:
- * o The recommended test sequence is to test the data lines: if they are
- * broken, nothing else will work properly. Then test the address
- * lines. Finally, test the cells in the memory now that the test
- * program knows that the address and data lines work properly.
- * This sequence also helps isolate and identify what is faulty.
- *
- * o For the address line test, it is a good idea to use the base
- * address of the lowest memory location, which causes a '1' bit to
- * walk through a field of zeros on the address lines and the highest
- * memory location, which causes a '0' bit to walk through a field of
- * '1's on the address line.
- *
- * o Floating buses can fool memory tests if the test routine writes
- * a value and then reads it back immediately. The problem is, the
- * write will charge the residual capacitance on the data bus so the
- * bus retains its state briefely. When the test program reads the
- * value back immediately, the capacitance of the bus can allow it
- * to read back what was written, even though the memory circuitry
- * is broken. To avoid this, the test program should write a test
- * pattern to the target location, write a different pattern elsewhere
- * to charge the residual capacitance in a differnt manner, then read
- * the target location back.
- *
- * o Always read the target location EXACTLY ONCE and save it in a local
- * variable. The problem with reading the target location more than
- * once is that the second and subsequent reads may work properly,
- * resulting in a failed test that tells the poor technician that
- * "Memory error at 00000000, wrote aaaaaaaa, read aaaaaaaa" which
- * doesn't help him one bit and causes puzzled phone calls. Been there,
- * done that.
- *
- * Data line test:
- * ---------------
- * This tests data lines for shorts and opens by forcing adjacent data
- * to opposite states. Because the data lines could be routed in an
- * arbitrary manner the must ensure test patterns ensure that every case
- * is tested. By using the following series of binary patterns every
- * combination of adjacent bits is test regardless of routing.
- *
- * ...101010101010101010101010
- * ...110011001100110011001100
- * ...111100001111000011110000
- * ...111111110000000011111111
- *
- * Carrying this out, gives us six hex patterns as follows:
- *
- * 0xaaaaaaaaaaaaaaaa
- * 0xcccccccccccccccc
- * 0xf0f0f0f0f0f0f0f0
- * 0xff00ff00ff00ff00
- * 0xffff0000ffff0000
- * 0xffffffff00000000
- *
- * To test for short and opens to other signals on our boards, we
- * simply test with the 1's complemnt of the paterns as well, resulting
- * in twelve patterns total.
- *
- * After writing a test pattern. a special pattern 0x0123456789ABCDEF is
- * written to a different address in case the data lines are floating.
- * Thus, if a byte lane fails, you will see part of the special
- * pattern in that byte lane when the test runs. For example, if the
- * xx__xxxxxxxxxxxx byte line fails, you will see aa23aaaaaaaaaaaa
- * (for the 'a' test pattern).
- *
- * Address line test:
- * ------------------
- * This function performs a test to verify that all the address lines
- * hooked up to the RAM work properly. If there is an address line
- * fault, it usually shows up as two different locations in the address
- * map (related by the faulty address line) mapping to one physical
- * memory storage location. The artifact that shows up is writing to
- * the first location "changes" the second location.
- *
- * To test all address lines, we start with the given base address and
- * xor the address with a '1' bit to flip one address line. For each
- * test, we shift the '1' bit left to test the next address line.
- *
- * In the actual code, we start with address sizeof(ulong) since our
- * test pattern we use is a ulong and thus, if we tried to test lower
- * order address bits, it wouldn't work because our pattern would
- * overwrite itself.
- *
- * Example for a 4 bit address space with the base at 0000:
- * 0000 <- base
- * 0001 <- test 1
- * 0010 <- test 2
- * 0100 <- test 3
- * 1000 <- test 4
- * Example for a 4 bit address space with the base at 0010:
- * 0010 <- base
- * 0011 <- test 1
- * 0000 <- (below the base address, skipped)
- * 0110 <- test 2
- * 1010 <- test 3
- *
- * The test locations are successively tested to make sure that they are
- * not "mirrored" onto the base address due to a faulty address line.
- * Note that the base and each test location are related by one address
- * line flipped. Note that the base address need not be all zeros.
- *
- * Memory tests 1-4:
- * -----------------
- * These tests verify RAM using sequential writes and reads
- * to/from RAM. There are several test cases that use different patterns to
- * verify RAM. Each test case fills a region of RAM with one pattern and
- * then reads the region back and compares its contents with the pattern.
- * The following patterns are used:
- *
- * 1a) zero pattern (0x00000000)
- * 1b) negative pattern (0xffffffff)
- * 1c) checkerboard pattern (0x55555555)
- * 1d) checkerboard pattern (0xaaaaaaaa)
- * 2) bit-flip pattern ((1 << (offset % 32))
- * 3) address pattern (offset)
- * 4) address pattern (~offset)
- *
- * Being run in normal mode, the test verifies only small 4Kb
- * regions of RAM around each 1Mb boundary. For example, for 64Mb
- * RAM the following areas are verified: 0x00000000-0x00000800,
- * 0x000ff800-0x00100800, 0x001ff800-0x00200800, ..., 0x03fff800-
- * 0x04000000. If the test is run in slow-test mode, it verifies
- * the whole RAM.
- */
-
-/* #ifdef CONFIG_POST */
-
-#include <post.h>
-#include <watchdog.h>
-
-/* #if CONFIG_POST & CFG_POST_MEMORY */
-
-/*
- * Define INJECT_*_ERRORS for testing error detection in the presence of
- * _good_ hardware.
- */
-#undef INJECT_DATA_ERRORS
-#undef INJECT_ADDRESS_ERRORS
-
-#ifdef INJECT_DATA_ERRORS
-#warning "Injecting data line errors for testing purposes"
-#endif
-
-#ifdef INJECT_ADDRESS_ERRORS
-#warning "Injecting address line errors for testing purposes"
-#endif
-
-
-/*
- * This function performs a double word move from the data at
- * the source pointer to the location at the destination pointer.
- * This is helpful for testing memory on processors which have a 64 bit
- * wide data bus.
- *
- * On those PowerPC with FPU, use assembly and a floating point move:
- * this does a 64 bit move.
- *
- * For other processors, let the compiler generate the best code it can.
- */
-static void move64(unsigned long long *src, unsigned long long *dest)
-{
-#if defined(CONFIG_MPC8260) || defined(CONFIG_MPC824X)
- asm ("lfd 0, 0(3)\n\t" /* fpr0 = *scr */
- "stfd 0, 0(4)" /* *dest = fpr0 */
- : : : "fr0" ); /* Clobbers fr0 */
- return;
-#else
- *dest = *src;
-#endif
-}
-
-/*
- * This is 64 bit wide test patterns. Note that they reside in ROM
- * (which presumably works) and the tests write them to RAM which may
- * not work.
- *
- * The "otherpattern" is written to drive the data bus to values other
- * than the test pattern. This is for detecting floating bus lines.
- *
- */
-const static unsigned long long pattern[] = {
- 0xaaaaaaaaaaaaaaaaULL,
- 0xccccccccccccccccULL,
- 0xf0f0f0f0f0f0f0f0ULL,
- 0xff00ff00ff00ff00ULL,
- 0xffff0000ffff0000ULL,
- 0xffffffff00000000ULL,
- 0x00000000ffffffffULL,
- 0x0000ffff0000ffffULL,
- 0x00ff00ff00ff00ffULL,
- 0x0f0f0f0f0f0f0f0fULL,
- 0x3333333333333333ULL,
- 0x5555555555555555ULL,
-};
-const unsigned long long otherpattern = 0x0123456789abcdefULL;
-
-
-static int memory_post_dataline(unsigned long long * pmem)
-{
- unsigned long long temp64;
- int num_patterns = sizeof(pattern)/ sizeof(pattern[0]);
- int i;
- unsigned int hi, lo, pathi, patlo;
- int ret = 0;
-
- for ( i = 0; i < num_patterns; i++) {
- move64((unsigned long long *)&(pattern[i]), pmem++);
- /*
- * Put a different pattern on the data lines: otherwise they
- * may float long enough to read back what we wrote.
- */
- move64((unsigned long long *)&otherpattern, pmem--);
- move64(pmem, &temp64);
-
-#ifdef INJECT_DATA_ERRORS
- temp64 ^= 0x00008000;
-#endif
-
- if (temp64 != pattern[i]){
- pathi = (pattern[i]>>32) & 0xffffffff;
- patlo = pattern[i] & 0xffffffff;
-
- hi = (temp64>>32) & 0xffffffff;
- lo = temp64 & 0xffffffff;
-
- printf ("Memory (date line) error at %08lx, "
- "wrote %08x%08x, read %08x%08x !\n",
- (ulong)pmem, pathi, patlo, hi, lo);
- ret = -1;
- }
- }
- return ret;
-}
-
-static int memory_post_addrline(ulong *testaddr, ulong *base, ulong size)
-{
- ulong *target;
- ulong *end;
- ulong readback;
- ulong xor;
- int ret = 0;
-
- end = (ulong *)((ulong)base + size); /* pointer arith! */
- xor = 0;
- for(xor = sizeof(ulong); xor > 0; xor <<= 1) {
- target = (ulong *)((ulong)testaddr ^ xor);
- if((target >= base) && (target < end)) {
- *testaddr = ~*target;
- readback = *target;
-
-#ifdef INJECT_ADDRESS_ERRORS
- if(xor == 0x00008000) {
- readback = *testaddr;
- }
-#endif
- if(readback == *testaddr) {
- printf ("Memory (address line) error at %08lx<->%08lx, "
- "XOR value %08lx !\n",
- (ulong)testaddr, (ulong)target,
- xor);
- ret = -1;
- }
- }
- }
- return ret;
-}
-
-static int memory_post_test1 (unsigned long start,
- unsigned long size,
- unsigned long val)
-{
- unsigned long i;
- ulong *mem = (ulong *) start;
- ulong readback;
- int ret = 0;
-
- for (i = 0; i < size / sizeof (ulong); i++) {
- mem[i] = val;
- if (i % 1024 == 0)
- WATCHDOG_RESET ();
- }
-
- for (i = 0; i < size / sizeof (ulong) && ret == 0; i++) {
- readback = mem[i];
- if (readback != val) {
- printf ("Memory error at %08lx, "
- "wrote %08lx, read %08lx !\n",
- (ulong)(mem + i), val, readback);
-
- ret = -1;
- break;
- }
- if (i % 1024 == 0)
- WATCHDOG_RESET ();
- }
-
- return ret;
-}
-
-static int memory_post_test2 (unsigned long start, unsigned long size)
-{
- unsigned long i;
- ulong *mem = (ulong *) start;
- ulong readback;
- int ret = 0;
-
- for (i = 0; i < size / sizeof (ulong); i++) {
- mem[i] = 1 << (i % 32);
- if (i % 1024 == 0)
- WATCHDOG_RESET ();
- }
-
- for (i = 0; i < size / sizeof (ulong) && ret == 0; i++) {
- readback = mem[i];
- if (readback != (1 << (i % 32))) {
- printf ("Memory error at %08lx, "
- "wrote %08x, read %08lx !\n",
- (ulong)(mem + i), 1 << (i % 32), readback);
-
- ret = -1;
- break;
- }
- if (i % 1024 == 0)
- WATCHDOG_RESET ();
- }
-
- return ret;
-}
-
-static int memory_post_test3 (unsigned long start, unsigned long size)
-{
- unsigned long i;
- ulong *mem = (ulong *) start;
- ulong readback;
- int ret = 0;
-
- for (i = 0; i < size / sizeof (ulong); i++) {
- mem[i] = i;
- if (i % 1024 == 0)
- WATCHDOG_RESET ();
- }
-
- for (i = 0; i < size / sizeof (ulong) && ret == 0; i++) {
- readback = mem[i];
- if (readback != i) {
- printf ("Memory error at %08lx, "
- "wrote %08lx, read %08lx !\n",
- (ulong)(mem + i), i, readback);
-
- ret = -1;
- break;
- }
- if (i % 1024 == 0)
- WATCHDOG_RESET ();
- }
-
- return ret;
-}
-
-static int memory_post_test4 (unsigned long start, unsigned long size)
-{
- unsigned long i;
- ulong *mem = (ulong *) start;
- ulong readback;
- int ret = 0;
-
- for (i = 0; i < size / sizeof (ulong); i++) {
- mem[i] = ~i;
- if (i % 1024 == 0)
- WATCHDOG_RESET ();
- }
-
- for (i = 0; i < size / sizeof (ulong) && ret == 0; i++) {
- readback = mem[i];
- if (readback != ~i) {
- printf ("Memory error at %08lx, "
- "wrote %08lx, read %08lx !\n",
- (ulong)(mem + i), ~i, readback);
-
- ret = -1;
- break;
- }
- if (i % 1024 == 0)
- WATCHDOG_RESET ();
- }
-
- return ret;
-}
-
-int memory_post_tests (unsigned long start, unsigned long size)
-{
- int ret = 0;
-
- if (ret == 0)
- ret = memory_post_dataline ((long long *)start);
- WATCHDOG_RESET ();
- if (ret == 0)
- ret = memory_post_addrline ((long *)start, (long *)start, size);
- WATCHDOG_RESET ();
- if (ret == 0)
- ret = memory_post_addrline ((long *)(start + size - 8),
- (long *)start, size);
- WATCHDOG_RESET ();
- if (ret == 0)
- ret = memory_post_test1 (start, size, 0x00000000);
- WATCHDOG_RESET ();
- if (ret == 0)
- ret = memory_post_test1 (start, size, 0xffffffff);
- WATCHDOG_RESET ();
- if (ret == 0)
- ret = memory_post_test1 (start, size, 0x55555555);
- WATCHDOG_RESET ();
- if (ret == 0)
- ret = memory_post_test1 (start, size, 0xaaaaaaaa);
- WATCHDOG_RESET ();
- if (ret == 0)
- ret = memory_post_test2 (start, size);
- WATCHDOG_RESET ();
- if (ret == 0)
- ret = memory_post_test3 (start, size);
- WATCHDOG_RESET ();
- if (ret == 0)
- ret = memory_post_test4 (start, size);
- WATCHDOG_RESET ();
-
- return ret;
-}
-
-#if 0
-int memory_post_test (int flags)
-{
- int ret = 0;
- DECLARE_GLOBAL_DATA_PTR;
- bd_t *bd = gd->bd;
- unsigned long memsize = (bd->bi_memsize >= 256 << 20 ?
- 256 << 20 : bd->bi_memsize) - (1 << 20);
-
-
- if (flags & POST_SLOWTEST) {
- ret = memory_post_tests (CFG_SDRAM_BASE, memsize);
- } else { /* POST_NORMAL */
-
- unsigned long i;
-
- for (i = 0; i < (memsize >> 20) && ret == 0; i++) {
- if (ret == 0)
- ret = memory_post_tests (i << 20, 0x800);
- if (ret == 0)
- ret = memory_post_tests ((i << 20) + 0xff800, 0x800);
- }
- }
-
- return ret;
-}
-#endif /* 0 */
-
-/* #endif */ /* CONFIG_POST & CFG_POST_MEMORY */
-/* #endif */ /* CONFIG_POST */
diff --git a/board/trab/rs485.c b/board/trab/rs485.c
deleted file mode 100644
index 2aedd2dc53..0000000000
--- a/board/trab/rs485.c
+++ /dev/null
@@ -1,203 +0,0 @@
-/*
- * (C) Copyright 2003
- * Martin Krause, TQ-Systems GmbH, <martin.krause@tqs.de>
- *
- * Based on cpu/arm920t/serial.c, by Gary Jennejohn
- * (C) Copyright 2002 Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- *
- */
-
-#include <common.h>
-#include <s3c2400.h>
-#include "rs485.h"
-
-static void rs485_setbrg (void);
-static void rs485_cfgio (void);
-static void set_rs485re(unsigned char rs485re_state);
-static void set_rs485de(unsigned char rs485de_state);
-static void rs485_setbrg (void);
-#ifdef NOT_USED
-static void trab_rs485_disable_tx(void);
-static void trab_rs485_disable_rx(void);
-#endif
-
-#define UART_NR S3C24X0_UART1
-
-/* CPLD-Register for controlling TRAB hardware functions */
-#define CPLD_RS485_RE ((volatile unsigned long *)0x04028000)
-
-static void rs485_setbrg (void)
-{
- S3C24X0_UART * const uart = S3C24X0_GetBase_UART(UART_NR);
- int i;
- unsigned int reg = 0;
-
- /* value is calculated so : (int)(PCLK/16./baudrate) -1 */
- /* reg = (33000000 / (16 * gd->baudrate)) - 1; */
- reg = (33000000 / (16 * 38400)) - 1;
-
- /* FIFO enable, Tx/Rx FIFO clear */
- uart->UFCON = 0x07;
- uart->UMCON = 0x0;
- /* Normal,No parity,1 stop,8 bit */
- uart->ULCON = 0x3;
- /*
- * tx=level,rx=edge,disable timeout int.,enable rx error int.,
- * normal,interrupt or polling
- */
- uart->UCON = 0x245;
- uart->UBRDIV = reg;
-
- for (i = 0; i < 100; i++);
-}
-
-static void rs485_cfgio (void)
-{
- S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
-
- gpio->PFCON &= ~(0x3 << 2);
- gpio->PFCON |= (0x2 << 2); /* configure GPF1 as RXD1 */
-
- gpio->PFCON &= ~(0x3 << 6);
- gpio->PFCON |= (0x2 << 6); /* configure GPF3 as TXD1 */
-
- gpio->PFUP |= (1 << 1); /* disable pullup on GPF1 */
- gpio->PFUP |= (1 << 3); /* disable pullup on GPF3 */
-
- gpio->PACON &= ~(1 << 11); /* set GPA11 (RS485_DE) to output */
-}
-
-/*
- * Initialise the rs485 port with the given baudrate. The settings
- * are always 8 data bits, no parity, 1 stop bit, no start bits.
- *
- */
-int rs485_init (void)
-{
- rs485_cfgio ();
- rs485_setbrg ();
-
- return (0);
-}
-
-/*
- * Read a single byte from the rs485 port. Returns 1 on success, 0
- * otherwise. When the function is succesfull, the character read is
- * written into its argument c.
- */
-int rs485_getc (void)
-{
- S3C24X0_UART * const uart = S3C24X0_GetBase_UART(UART_NR);
-
- /* wait for character to arrive */
- while (!(uart->UTRSTAT & 0x1));
-
- return uart->URXH & 0xff;
-}
-
-/*
- * Output a single byte to the rs485 port.
- */
-void rs485_putc (const char c)
-{
- S3C24X0_UART * const uart = S3C24X0_GetBase_UART(UART_NR);
-
- /* wait for room in the tx FIFO */
- while (!(uart->UTRSTAT & 0x2));
-
- uart->UTXH = c;
-
- /* If \n, also do \r */
- if (c == '\n')
- rs485_putc ('\r');
-}
-
-/*
- * Test whether a character is in the RX buffer
- */
-int rs485_tstc (void)
-{
- S3C24X0_UART * const uart = S3C24X0_GetBase_UART(UART_NR);
-
- return uart->UTRSTAT & 0x1;
-}
-
-void rs485_puts (const char *s)
-{
- while (*s) {
- rs485_putc (*s++);
- }
-}
-
-
-/*
- * State table:
- * RE DE Result
- * 1 1 XMIT
- * 0 0 RCV
- * 1 0 Shutdown
- */
-
-/* function that controls the receiver enable for the rs485 */
-/* rs485re_state reflects the level (0/1) of the RE pin */
-
-static void set_rs485re(unsigned char rs485re_state)
-{
- if(rs485re_state)
- *CPLD_RS485_RE = 0x010000;
- else
- *CPLD_RS485_RE = 0x0;
-}
-
-/* function that controls the sender enable for the rs485 */
-/* rs485de_state reflects the level (0/1) of the DE pin */
-
-static void set_rs485de(unsigned char rs485de_state)
-{
- S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
-
- /* This is on PORT A bit 11 */
- if(rs485de_state)
- gpio->PADAT |= (1 << 11);
- else
- gpio->PADAT &= ~(1 << 11);
-}
-
-
-void trab_rs485_enable_tx(void)
-{
- set_rs485de(1);
- set_rs485re(1);
-}
-
-void trab_rs485_enable_rx(void)
-{
- set_rs485re(0);
- set_rs485de(0);
-}
-
-#ifdef NOT_USED
-static void trab_rs485_disable_tx(void)
-{
- set_rs485de(0);
-}
-
-static void trab_rs485_disable_rx(void)
-{
- set_rs485re(1);
-}
-#endif
diff --git a/board/trab/rs485.h b/board/trab/rs485.h
deleted file mode 100644
index d4a008a323..0000000000
--- a/board/trab/rs485.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/*
- * (C) Copyright 2003
- * Martin Krause, TQ-Systems GmbH, <martin.krause@tqs.de>
- *
- * Based on cpu/arm920t/serial.c, by Gary Jennejohn
- * (C) Copyright 2002 Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- *
- */
-
-#ifndef _RS485_H_
-#define _RS485_H_
-
-#include <s3c2400.h>
-
-int rs485_init (void);
-int rs485_getc (void);
-void rs485_putc (const char c);
-int rs485_tstc (void);
-void rs485_puts (const char *s);
-void trab_rs485_enable_tx(void);
-void trab_rs485_enable_rx(void);
-
-#endif /* _RS485_H_ */
diff --git a/board/trab/trab.c b/board/trab/trab.c
deleted file mode 100644
index e8dfd2ceb0..0000000000
--- a/board/trab/trab.c
+++ /dev/null
@@ -1,412 +0,0 @@
-/*
- * (C) Copyright 2002
- * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/* #define DEBUG */
-
-#include <common.h>
-#include <malloc.h>
-#include <s3c2400.h>
-#include <command.h>
-
-/* ------------------------------------------------------------------------- */
-
-#ifdef CFG_BRIGHTNESS
-static void spi_init(void);
-static void wait_transmit_done(void);
-static void tsc2000_write(unsigned int page, unsigned int reg,
- unsigned int data);
-static void tsc2000_set_brightness(void);
-#endif
-#ifdef CONFIG_MODEM_SUPPORT
-static int key_pressed(void);
-extern void disable_putc(void);
-extern int do_mdm_init; /* defined in common/main.c */
-
-/*
- * We need a delay of at least 500 us after turning on the VFD clock
- * before we can read any useful information for the CPLD controlling
- * the keyboard switches. Let's play safe and wait 5 ms. The problem
- * is that timers are not available yet, so we use a manually timed
- * loop.
- */
-#define KBD_MDELAY 5000
-static void udelay_no_timer (int usec)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- int i;
- int delay = usec * 3;
-
- for (i = 0; i < delay; i ++) gd->bd->bi_arch_number = MACH_TYPE_TRAB;
-}
-#endif /* CONFIG_MODEM_SUPPORT */
-
-/*
- * Miscellaneous platform dependent initialisations
- */
-
-int board_init ()
-{
-#if defined(CONFIG_VFD)
- extern int vfd_init_clocks(void);
-#endif
- DECLARE_GLOBAL_DATA_PTR;
- S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
- S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
-
- /* memory and cpu-speed are setup before relocation */
-#ifdef CONFIG_TRAB_50MHZ
- /* change the clock to be 50 MHz 1:1:1 */
- /* MDIV:0x5c PDIV:4 SDIV:2 */
- clk_power->MPLLCON = 0x5c042;
- clk_power->CLKDIVN = 0;
-#else
- /* change the clock to be 133 MHz 1:2:4 */
- /* MDIV:0x7d PDIV:4 SDIV:1 */
- clk_power->MPLLCON = 0x7d041;
- clk_power->CLKDIVN = 3;
-#endif
-
- /* set up the I/O ports */
- gpio->PACON = 0x3ffff;
- gpio->PBCON = 0xaaaaaaaa;
- gpio->PBUP = 0xffff;
- /* INPUT nCTS0 nRTS0 TXD[1] TXD[0] RXD[1] RXD[0] */
- /* 00, 10, 10, 10, 10, 10, 10 */
- gpio->PFCON = (2<<0) | (2<<2) | (2<<4) | (2<<6) | (2<<8) | (2<<10);
-#ifdef CONFIG_HWFLOW
- /* do not pull up RXD0, RXD1, TXD0, TXD1, CTS0, RTS0 */
- gpio->PFUP = (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5);
-#else
- /* do not pull up RXD0, RXD1, TXD0, TXD1 */
- gpio->PFUP = (1<<0) | (1<<1) | (1<<2) | (1<<3);
-#endif
- gpio->PGCON = 0x0;
- gpio->PGUP = 0x0;
- gpio->OPENCR= 0x0;
-
- /* suppress flicker of the VFDs */
- gpio->MISCCR = 0x40;
- gpio->PFCON |= (2<<12);
-
- gd->bd->bi_arch_number = MACH_TYPE_TRAB;
-
- /* adress of boot parameters */
- gd->bd->bi_boot_params = 0x0c000100;
-
- /* Make sure both buzzers are turned off */
- gpio->PDCON |= 0x5400;
- gpio->PDDAT &= ~0xE0;
-
-#ifdef CONFIG_VFD
- vfd_init_clocks();
-#endif /* CONFIG_VFD */
-
-#ifdef CONFIG_MODEM_SUPPORT
- udelay_no_timer (KBD_MDELAY);
-
- if (key_pressed()) {
- disable_putc(); /* modem doesn't understand banner etc */
- do_mdm_init = 1;
- }
-#endif /* CONFIG_MODEM_SUPPORT */
-
-#ifdef CONFIG_DRIVER_S3C24X0_I2C
- /* Configure I/O ports PG5 und PG6 for I2C */
- gpio->PGCON = (gpio->PGCON & 0x003c00) | 0x003c00;
-#endif /* CONFIG_DRIVER_S3C24X0_I2C */
-
- return 0;
-}
-
-int dram_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Keyboard Controller
- */
-
-/* Maximum key number */
-#define KEYBD_KEY_NUM 4
-
-#define KBD_DATA (((*(volatile ulong *)0x04020000) >> 16) & 0xF)
-
-static uchar *key_match (ulong);
-
-int misc_init_r (void)
-{
- ulong kbd_data = KBD_DATA;
- uchar keybd_env[KEYBD_KEY_NUM + 1];
- uchar *str;
- int i;
-
-#ifdef CONFIG_AUTO_UPDATE
- extern int do_auto_update(void);
- /* this has priority over all else */
- do_auto_update();
-#endif
-
- for (i = 0; i < KEYBD_KEY_NUM; ++i) {
- keybd_env[i] = '0' + ((kbd_data >> i) & 1);
- }
- keybd_env[i] = '\0';
- debug ("** Setting keybd=\"%s\"\n", keybd_env);
- setenv ("keybd", keybd_env);
-
- str = strdup (key_match (kbd_data)); /* decode keys */
-
-#ifdef CONFIG_PREBOOT /* automatically configure "preboot" command on key match */
- debug ("** Setting preboot=\"%s\"\n", str);
- setenv ("preboot", str); /* set or delete definition */
-#endif /* CONFIG_PREBOOT */
- if (str != NULL) {
- free (str);
- }
-
-#ifdef CFG_BRIGHTNESS
- tsc2000_set_brightness();
-#endif
- return (0);
-}
-
-#ifdef CONFIG_PREBOOT
-
-static uchar kbd_magic_prefix[] = "key_magic";
-static uchar kbd_command_prefix[] = "key_cmd";
-
-static int compare_magic (ulong kbd_data, uchar *str)
-{
- uchar key_mask;
-
- debug ("compare_magic: kbd: %04lx str: \"%s\"\n",kbd_data,str);
- for (; *str; str++)
- {
- uchar c = *str - '1';
-
- if (c >= KEYBD_KEY_NUM) /* bad key number */
- return -1;
-
- key_mask = 1 << c;
-
- if (!(kbd_data & key_mask)) { /* key not pressed */
- debug ( "compare_magic: "
- "kbd: %04lx mask: %04lx - key not pressed\n",
- kbd_data, key_mask );
- return -1;
- }
-
- kbd_data &= ~key_mask;
- }
-
- if (kbd_data) { /* key(s) not released */
- debug ( "compare_magic: "
- "kbd: %04lx - key(s) not released\n", kbd_data);
- return -1;
- }
-
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Check if pressed key(s) match magic sequence,
- * and return the command string associated with that key(s).
- *
- * If no key press was decoded, NULL is returned.
- *
- * Note: the first character of the argument will be overwritten with
- * the "magic charcter code" of the decoded key(s), or '\0'.
- *
- *
- * Note: the string points to static environment data and must be
- * saved before you call any function that modifies the environment.
- */
-static uchar *key_match (ulong kbd_data)
-{
- uchar magic[sizeof (kbd_magic_prefix) + 1];
- uchar cmd_name[sizeof (kbd_command_prefix) + 1];
- uchar *suffix;
- uchar *kbd_magic_keys;
-
- /*
- * The following string defines the characters that can pe appended
- * to "key_magic" to form the names of environment variables that
- * hold "magic" key codes, i. e. such key codes that can cause
- * pre-boot actions. If the string is empty (""), then only
- * "key_magic" is checked (old behaviour); the string "125" causes
- * checks for "key_magic1", "key_magic2" and "key_magic5", etc.
- */
- if ((kbd_magic_keys = getenv ("magic_keys")) == NULL)
- kbd_magic_keys = "";
-
- debug ("key_match: magic_keys=\"%s\"\n", kbd_magic_keys);
-
- /* loop over all magic keys;
- * use '\0' suffix in case of empty string
- */
- for (suffix=kbd_magic_keys; *suffix || suffix==kbd_magic_keys; ++suffix)
- {
- sprintf (magic, "%s%c", kbd_magic_prefix, *suffix);
-
- debug ("key_match: magic=\"%s\"\n",
- getenv(magic) ? getenv(magic) : "<UNDEFINED>");
-
- if (compare_magic(kbd_data, getenv(magic)) == 0)
- {
- sprintf (cmd_name, "%s%c", kbd_command_prefix, *suffix);
- debug ("key_match: cmdname %s=\"%s\"\n",
- cmd_name,
- getenv (cmd_name) ?
- getenv (cmd_name) :
- "<UNDEFINED>");
- return (getenv (cmd_name));
- }
- }
- debug ("key_match: no match\n");
- return (NULL);
-}
-#endif /* CONFIG_PREBOOT */
-
-/* Read Keyboard status */
-int do_kbd (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
-{
- ulong kbd_data = KBD_DATA;
- uchar keybd_env[KEYBD_KEY_NUM + 1];
- int i;
-
- puts ("Keys:");
- for (i = 0; i < KEYBD_KEY_NUM; ++i) {
- keybd_env[i] = '0' + ((kbd_data >> i) & 1);
- printf (" %c", keybd_env[i]);
- }
- keybd_env[i] = '\0';
- putc ('\n');
- setenv ("keybd", keybd_env);
- return 0;
-}
-
-U_BOOT_CMD(
- kbd, 1, 1, do_kbd,
- "kbd - read keyboard status\n",
- NULL
-);
-
-#ifdef CONFIG_MODEM_SUPPORT
-static int key_pressed(void)
-{
- return (compare_magic(KBD_DATA, CONFIG_MODEM_KEY_MAGIC) == 0);
-}
-#endif /* CONFIG_MODEM_SUPPORT */
-
-#ifdef CFG_BRIGHTNESS
-
-static inline void SET_CS_TOUCH(void)
-{
- S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
-
- gpio->PDDAT &= 0x5FF;
-}
-
-static inline void CLR_CS_TOUCH(void)
-{
- S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
-
- gpio->PDDAT |= 0x200;
-}
-
-static void spi_init(void)
-{
- S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
- S3C24X0_SPI * const spi = S3C24X0_GetBase_SPI();
- int i;
-
- /* Configure I/O ports. */
- gpio->PDCON = (gpio->PDCON & 0xF3FFFF) | 0x040000;
- gpio->PGCON = (gpio->PGCON & 0x0F3FFF) | 0x008000;
- gpio->PGCON = (gpio->PGCON & 0x0CFFFF) | 0x020000;
- gpio->PGCON = (gpio->PGCON & 0x03FFFF) | 0x080000;
-
- CLR_CS_TOUCH();
-
- spi->ch[0].SPPRE = 0x1F; /* Baudrate ca. 514kHz */
- spi->ch[0].SPPIN = 0x01; /* SPI-MOSI holds Level after last bit */
- spi->ch[0].SPCON = 0x1A; /* Polling, Prescaler, Master, CPOL=0, CPHA=1 */
-
- /* Dummy byte ensures clock to be low. */
- for (i = 0; i < 10; i++) {
- spi->ch[0].SPTDAT = 0xFF;
- }
- wait_transmit_done();
-}
-
-static void wait_transmit_done(void)
-{
- S3C24X0_SPI * const spi = S3C24X0_GetBase_SPI();
-
- while (!(spi->ch[0].SPSTA & 0x01)); /* wait until transfer is done */
-}
-
-static void tsc2000_write(unsigned int page, unsigned int reg,
- unsigned int data)
-{
- S3C24X0_SPI * const spi = S3C24X0_GetBase_SPI();
- unsigned int command;
-
- SET_CS_TOUCH();
- command = 0x0000;
- command |= (page << 11);
- command |= (reg << 5);
-
- spi->ch[0].SPTDAT = (command & 0xFF00) >> 8;
- wait_transmit_done();
- spi->ch[0].SPTDAT = (command & 0x00FF);
- wait_transmit_done();
- spi->ch[0].SPTDAT = (data & 0xFF00) >> 8;
- wait_transmit_done();
- spi->ch[0].SPTDAT = (data & 0x00FF);
- wait_transmit_done();
-
- CLR_CS_TOUCH();
-}
-
-static void tsc2000_set_brightness(void)
-{
- uchar tmp[10];
- int i, br;
-
- spi_init();
- tsc2000_write(1, 2, 0x0); /* Power up DAC */
-
- i = getenv_r("brightness", tmp, sizeof(tmp));
- br = (i > 0)
- ? (int) simple_strtoul (tmp, NULL, 10)
- : CFG_BRIGHTNESS;
-
- tsc2000_write(0, 0xb, br & 0xff);
-}
-#endif
diff --git a/board/trab/trab_fkt.c b/board/trab/trab_fkt.c
deleted file mode 100644
index abb3b29c8c..0000000000
--- a/board/trab/trab_fkt.c
+++ /dev/null
@@ -1,1411 +0,0 @@
-/*
- * (C) Copyright 2003
- * Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#define DEBUG
-
-#include <common.h>
-#include <exports.h>
-#include <s3c2400.h>
-#include "tsc2000.h"
-#include "rs485.h"
-
-/*
- * define, to wait for the touch to be pressed, before reading coordinates in
- * command do_touch. If not defined, an error message is printed, when the
- * command do_touch is invoked and the touch is not pressed within an specific
- * interval.
- */
-#undef CONFIG_TOUCH_WAIT_PRESSED
-
-/* max time to wait for touch is pressed */
-#ifndef CONFIG_TOUCH_WAIT_PRESSED
-#define TOUCH_TIMEOUT 5
-#endif /* !CONFIG_TOUCH_WAIT_PRESSED */
-
-/* assignment of CPU internal ADC channels with TRAB hardware */
-#define VCC5V 2
-#define VCC12V 3
-
-/* CPLD-Register for controlling TRAB hardware functions */
-#define CPLD_BUTTONS ((volatile unsigned long *)0x04020000)
-#define CPLD_FILL_LEVEL ((volatile unsigned long *)0x04008000)
-#define CPLD_ROTARY_SWITCH ((volatile unsigned long *)0x04018000)
-#define CPLD_RS485_RE ((volatile unsigned long *)0x04028000)
-
-/* timer configuration bits for buzzer and PWM */
-#define START2 (1 << 12)
-#define UPDATE2 (1 << 13)
-#define INVERT2 (1 << 14)
-#define RELOAD2 (1 << 15)
-#define START3 (1 << 16)
-#define UPDATE3 (1 << 17)
-#define INVERT3 (1 << 18)
-#define RELOAD3 (1 << 19)
-
-#define PCLK 66000000
-#define BUZZER_FREQ 1000 /* frequency in Hz */
-#define PWM_FREQ 500
-
-
-/* definitions of I2C EEPROM device address */
-#define I2C_EEPROM_DEV_ADDR 0x54
-
-/* definition for touch panel calibration points */
-#define CALIB_TL 0 /* calibration point in (T)op (L)eft corner */
-#define CALIB_DR 1 /* calibration point in (D)own (R)ight corner */
-
-/* EEPROM address map */
-#define SERIAL_NUMBER 8
-#define TOUCH_X0 52
-#define TOUCH_Y0 54
-#define TOUCH_X1 56
-#define TOUCH_Y1 58
-#define CRC16 60
-
-/* EEPROM stuff */
-#define EEPROM_MAX_CRC_BUF 64
-
-/* RS485 stuff */
-#define RS485_MAX_RECEIVE_BUF_LEN 100
-
-/* Bit definitions for ADCCON */
-#define ADC_ENABLE_START 0x1
-#define ADC_READ_START 0x2
-#define ADC_STDBM 0x4
-#define ADC_INP_AIN0 (0x0 << 3)
-#define ADC_INP_AIN1 (0x1 << 3)
-#define ADC_INP_AIN2 (0x2 << 3)
-#define ADC_INP_AIN3 (0x3 << 3)
-#define ADC_INP_AIN4 (0x4 << 3)
-#define ADC_INP_AIN5 (0x5 << 3)
-#define ADC_INP_AIN6 (0x6 << 3)
-#define ADC_INP_AIN7 (0x7 << 3)
-#define ADC_PRSCEN 0x4000
-#define ADC_ECFLG 0x8000
-
-/* function test functions */
-int do_dip (void);
-int do_info (void);
-int do_vcc5v (void);
-int do_vcc12v (void);
-int do_buttons (void);
-int do_fill_level (void);
-int do_rotary_switch (void);
-int do_pressure (void);
-int do_v_bat (void);
-int do_vfd_id (void);
-int do_buzzer (char **);
-int do_led (char **);
-int do_full_bridge (char **);
-int do_dac (char **);
-int do_motor_contact (void);
-int do_motor (char **);
-int do_pwm (char **);
-int do_thermo (char **);
-int do_touch (char **);
-int do_rs485 (char **);
-int do_serial_number (char **);
-int do_crc16 (void);
-int do_power_switch (void);
-int do_gain (char **);
-int do_eeprom (char **);
-
-/* helper functions */
-static void adc_init (void);
-static int adc_read (unsigned int channel);
-static void print_identifier (void);
-
-#ifdef CONFIG_TOUCH_WAIT_PRESSED
-static void touch_wait_pressed (void);
-#else
-static int touch_check_pressed (void);
-#endif /* CONFIG_TOUCH_WAIT_PRESSED */
-
-static void touch_read_x_y (int *x, int *y);
-static int touch_write_clibration_values (int calib_point, int x, int y);
-static int rs485_send_line (const char *data);
-static int rs485_receive_chars (char *data, int timeout);
-static unsigned short updcrc(unsigned short icrc, unsigned char *icp,
- unsigned int icnt);
-
-#if (CONFIG_COMMANDS & CFG_CMD_I2C)
-static int trab_eeprom_read (char **argv);
-static int trab_eeprom_write (char **argv);
-int i2c_write_multiple (uchar chip, uint addr, int alen, uchar *buffer,
- int len);
-int i2c_read_multiple ( uchar chip, uint addr, int alen, uchar *buffer,
- int len);
-#endif /* CFG_CMD_I2C */
-
-/*
- * TRAB board specific commands. Especially commands for burn-in and function
- * test.
- */
-
-int trab_fkt (int argc, char *argv[])
-{
- int i;
-
- app_startup(argv);
- if (get_version () != XF_VERSION) {
- printf ("Wrong XF_VERSION. Please re-compile with actual "
- "u-boot sources\n");
- printf ("Example expects ABI version %d\n", XF_VERSION);
- printf ("Actual U-Boot ABI version %d\n", (int)get_version());
- return 1;
- }
-
- debug ("argc = %d\n", argc);
-
- for (i=0; i<=argc; ++i) {
- debug ("argv[%d] = \"%s\"\n", i, argv[i] ? argv[i] : "<NULL>");
- }
-
- adc_init ();
-
- switch (argc) {
-
- case 0:
- case 1:
- break;
-
- case 2:
- if (strcmp (argv[1], "info") == 0) {
- return (do_info ());
- }
- if (strcmp (argv[1], "dip") == 0) {
- return (do_dip ());
- }
- if (strcmp (argv[1], "vcc5v") == 0) {
- return (do_vcc5v ());
- }
- if (strcmp (argv[1], "vcc12v") == 0) {
- return (do_vcc12v ());
- }
- if (strcmp (argv[1], "buttons") == 0) {
- return (do_buttons ());
- }
- if (strcmp (argv[1], "fill_level") == 0) {
- return (do_fill_level ());
- }
- if (strcmp (argv[1], "rotary_switch") == 0) {
- return (do_rotary_switch ());
- }
- if (strcmp (argv[1], "pressure") == 0) {
- return (do_pressure ());
- }
- if (strcmp (argv[1], "v_bat") == 0) {
- return (do_v_bat ());
- }
- if (strcmp (argv[1], "vfd_id") == 0) {
- return (do_vfd_id ());
- }
- if (strcmp (argv[1], "motor_contact") == 0) {
- return (do_motor_contact ());
- }
- if (strcmp (argv[1], "crc16") == 0) {
- return (do_crc16 ());
- }
- if (strcmp (argv[1], "power_switch") == 0) {
- return (do_power_switch ());
- }
- break;
-
- case 3:
- if (strcmp (argv[1], "full_bridge") == 0) {
- return (do_full_bridge (argv));
- }
- if (strcmp (argv[1], "dac") == 0) {
- return (do_dac (argv));
- }
- if (strcmp (argv[1], "motor") == 0) {
- return (do_motor (argv));
- }
- if (strcmp (argv[1], "pwm") == 0) {
- return (do_pwm (argv));
- }
- if (strcmp (argv[1], "thermo") == 0) {
- return (do_thermo (argv));
- }
- if (strcmp (argv[1], "touch") == 0) {
- return (do_touch (argv));
- }
- if (strcmp (argv[1], "serial_number") == 0) {
- return (do_serial_number (argv));
- }
- if (strcmp (argv[1], "buzzer") == 0) {
- return (do_buzzer (argv));
- }
- if (strcmp (argv[1], "gain") == 0) {
- return (do_gain (argv));
- }
- break;
-
- case 4:
- if (strcmp (argv[1], "led") == 0) {
- return (do_led (argv));
- }
- if (strcmp (argv[1], "rs485") == 0) {
- return (do_rs485 (argv));
- }
- if (strcmp (argv[1], "serial_number") == 0) {
- return (do_serial_number (argv));
- }
- break;
-
- case 5:
- if (strcmp (argv[1], "eeprom") == 0) {
- return (do_eeprom (argv));
- }
- break;
-
- case 6:
- if (strcmp (argv[1], "eeprom") == 0) {
- return (do_eeprom (argv));
- }
- break;
-
- default:
- break;
- }
-
- printf ("Usage:\n<command> <parameter1> <parameter2> ...\n");
- return 1;
-}
-
-int do_info (void)
-{
- printf ("Stand-alone application for TRAB board function test\n");
- printf ("Built: %s at %s\n", __DATE__ , __TIME__ );
-
- return 0;
-}
-
-int do_dip (void)
-{
- unsigned int result = 0;
- int adc_val;
- int i;
-
- /***********************************************************
- DIP switch connection (according to wa4-cpu.sp.301.pdf, page 3):
- SW1 - AIN4
- SW2 - AIN5
- SW3 - AIN6
- SW4 - AIN7
-
- "On" DIP switch position short-circuits the voltage from
- the input channel (i.e. '0' conversion result means "on").
- *************************************************************/
-
- for (i = 7; i > 3; i--) {
-
- if ((adc_val = adc_read (i)) == -1) {
- printf ("Channel %d could not be read\n", i);
- return 1;
- }
-
- /*
- * Input voltage (switch open) is 1.8 V.
- * (Vin_High/VRef)*adc_res = (1,8V/2,5V)*1023) = 736
- * Set trigger at halve that value.
- */
- if (adc_val < 368)
- result |= (1 << (i-4));
- }
-
- /* print result to console */
- print_identifier ();
- for (i = 0; i < 4; i++) {
- if ((result & (1 << i)) == 0)
- printf("0");
- else
- printf("1");
- }
- printf("\n");
-
- return 0;
-}
-
-
-int do_vcc5v (void)
-{
- int result;
-
- /* VCC5V is connected to channel 2 */
-
- if ((result = adc_read (VCC5V)) == -1) {
- printf ("VCC5V could not be read\n");
- return 1;
- }
-
- /*
- * Calculate voltage value. Split in two parts because there is no
- * floating point support. VCC5V is connected over an resistor divider:
- * VCC5V=ADCval*2,5V/1023*(10K+30K)/10K.
- */
- print_identifier ();
- printf ("%d", (result & 0x3FF)* 10 / 1023);
- printf (".%d", ((result & 0x3FF)* 10 % 1023)* 10 / 1023);
- printf ("%d V\n", (((result & 0x3FF) * 10 % 1023 ) * 10 % 1023)
- * 10 / 1024);
-
- return 0;
-}
-
-
-int do_vcc12v (void)
-{
- int result;
-
- if ((result = adc_read (VCC12V)) == -1) {
- printf ("VCC12V could not be read\n");
- return 1;
- }
-
- /*
- * Calculate voltage value. Split in two parts because there is no
- * floating point support. VCC5V is connected over an resistor divider:
- * VCC12V=ADCval*2,5V/1023*(30K+270K)/30K.
- */
- print_identifier ();
- printf ("%d", (result & 0x3FF)* 25 / 1023);
- printf (".%d V\n", ((result & 0x3FF)* 25 % 1023) * 10 / 1023);
-
- return 0;
-}
-
-static int adc_read (unsigned int channel)
-{
- int j = 1000; /* timeout value for wait loop in us */
- int result;
- S3C2400_ADC *padc;
-
- padc = S3C2400_GetBase_ADC();
- channel &= 0x7;
-
- padc->ADCCON &= ~ADC_STDBM; /* select normal mode */
- padc->ADCCON &= ~(0x7 << 3); /* clear the channel bits */
- padc->ADCCON |= ((channel << 3) | ADC_ENABLE_START);
-
- while (j--) {
- if ((padc->ADCCON & ADC_ENABLE_START) == 0)
- break;
- udelay (1);
- }
-
- if (j == 0) {
- printf("%s: ADC timeout\n", __FUNCTION__);
- padc->ADCCON |= ADC_STDBM; /* select standby mode */
- return -1;
- }
-
- result = padc->ADCDAT & 0x3FF;
-
- padc->ADCCON |= ADC_STDBM; /* select standby mode */
-
- debug ("%s: channel %d, result[DIGIT]=%d\n", __FUNCTION__,
- (padc->ADCCON >> 3) & 0x7, result);
-
- /*
- * Wait for ADC to be ready for next conversion. This delay value was
- * estimated, because the datasheet does not specify a value.
- */
- udelay (1000);
-
- return (result);
-}
-
-
-static void adc_init (void)
-{
- S3C2400_ADC *padc;
-
- padc = S3C2400_GetBase_ADC();
-
- padc->ADCCON &= ~(0xff << 6); /* clear prescaler bits */
- padc->ADCCON |= ((65 << 6) | ADC_PRSCEN); /* set prescaler */
-
- /*
- * Wait some time to avoid problem with very first call of
- * adc_read(). Without * this delay, sometimes the first read adc
- * value is 0. Perhaps because the * adjustment of prescaler takes
- * some clock cycles?
- */
- udelay (1000);
-
- return;
-}
-
-
-int do_buttons (void)
-{
- int result;
- int i;
-
- result = *CPLD_BUTTONS; /* read CPLD */
- debug ("%s: cpld_taster (32 bit) %#x\n", __FUNCTION__, result);
-
- /* print result to console */
- print_identifier ();
- for (i = 16; i <= 19; i++) {
- if ((result & (1 << i)) == 0)
- printf("0");
- else
- printf("1");
- }
- printf("\n");
- return 0;
-}
-
-
-int do_power_switch (void)
-{
- int result;
-
- S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
-
- /* configure GPE7 as input */
- gpio->PECON &= ~(0x3 << (2 * 7));
-
- /* signal GPE7 from power switch is low active: 0=on , 1=off */
- result = ((gpio->PEDAT & (1 << 7)) == (1 << 7)) ? 0 : 1;
-
- print_identifier ();
- printf("%d\n", result);
- return 0;
-}
-
-
-int do_fill_level (void)
-{
- int result;
-
- result = *CPLD_FILL_LEVEL; /* read CPLD */
- debug ("%s: cpld_fuellstand (32 bit) %#x\n", __FUNCTION__, result);
-
- /* print result to console */
- print_identifier ();
- if ((result & (1 << 16)) == 0)
- printf("0\n");
- else
- printf("1\n");
- return 0;
-}
-
-
-int do_rotary_switch (void)
-{
- int result;
- /*
- * Please note, that the default values of the direction bits are
- * undefined after reset. So it is a good idea, to make first a dummy
- * call to this function, to clear the direction bits and set so to
- * proper values.
- */
-
- result = *CPLD_ROTARY_SWITCH; /* read CPLD */
- debug ("%s: cpld_inc (32 bit) %#x\n", __FUNCTION__, result);
-
- *CPLD_ROTARY_SWITCH |= (3 << 16); /* clear direction bits in CPLD */
-
- /* print result to console */
- print_identifier ();
- if ((result & (1 << 16)) == (1 << 16))
- printf("R");
- if ((result & (1 << 17)) == (1 << 17))
- printf("L");
- if (((result & (1 << 16)) == 0) && ((result & (1 << 17)) == 0))
- printf("0");
- if ((result & (1 << 18)) == 0)
- printf("0\n");
- else
- printf("1\n");
- return 0;
-}
-
-
-int do_vfd_id (void)
-{
- int i;
- long int pcup_old, pccon_old;
- int vfd_board_id;
- S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
-
- /* try to red vfd board id from the value defined by pull-ups */
-
- pcup_old = gpio->PCUP;
- pccon_old = gpio->PCCON;
-
- gpio->PCUP = (gpio->PCUP & 0xFFF0); /* activate GPC0...GPC3 pull-ups */
- gpio->PCCON = (gpio->PCCON & 0xFFFFFF00); /* configure GPC0...GPC3 as
- * inputs */
- udelay (10); /* allow signals to settle */
- vfd_board_id = (~gpio->PCDAT) & 0x000F; /* read GPC0...GPC3 port pins */
-
- gpio->PCCON = pccon_old;
- gpio->PCUP = pcup_old;
-
- /* print vfd_board_id to console */
- print_identifier ();
- for (i = 0; i < 4; i++) {
- if ((vfd_board_id & (1 << i)) == 0)
- printf("0");
- else
- printf("1");
- }
- printf("\n");
- return 0;
-}
-
-int do_buzzer (char **argv)
-{
- int counter;
-
- S3C24X0_TIMERS * const timers = S3C24X0_GetBase_TIMERS();
- S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
-
- /* set prescaler for timer 2, 3 and 4 */
- timers->TCFG0 &= ~0xFF00;
- timers->TCFG0 |= 0x0F00;
-
- /* set divider for timer 2 */
- timers->TCFG1 &= ~0xF00;
- timers->TCFG1 |= 0x300;
-
- /* set frequency */
- counter = (PCLK / BUZZER_FREQ) >> 9;
- timers->ch[2].TCNTB = counter;
- timers->ch[2].TCMPB = counter / 2;
-
- if (strcmp (argv[2], "on") == 0) {
- debug ("%s: frequency: %d\n", __FUNCTION__,
- BUZZER_FREQ);
-
- /* configure pin GPD7 as TOUT2 */
- gpio->PDCON &= ~0xC000;
- gpio->PDCON |= 0x8000;
-
- /* start */
- timers->TCON = (timers->TCON | UPDATE2 | RELOAD2) &
- ~INVERT2;
- timers->TCON = (timers->TCON | START2) & ~UPDATE2;
- return (0);
- }
- else if (strcmp (argv[2], "off") == 0) {
- /* stop */
- timers->TCON &= ~(START2 | RELOAD2);
-
- /* configure GPD7 as output and set to low */
- gpio->PDCON &= ~0xC000;
- gpio->PDCON |= 0x4000;
- gpio->PDDAT &= ~0x80;
- return (0);
- }
-
- printf ("%s: invalid parameter %s\n", __FUNCTION__, argv[2]);
- return 1;
-}
-
-
-int do_led (char **argv)
-{
- S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
-
- /* configure PC14 and PC15 as output */
- gpio->PCCON &= ~(0xF << 28);
- gpio->PCCON |= (0x5 << 28);
-
- /* configure PD0 and PD4 as output */
- gpio->PDCON &= ~((0x3 << 8) | 0x3);
- gpio->PDCON |= ((0x1 << 8) | 0x1);
-
- switch (simple_strtoul(argv[2], NULL, 10)) {
-
- case 0:
- case 1:
- break;
-
- case 2:
- if (strcmp (argv[3], "on") == 0)
- gpio->PCDAT |= (1 << 14);
- else
- gpio->PCDAT &= ~(1 << 14);
- return 0;
-
- case 3:
- if (strcmp (argv[3], "on") == 0)
- gpio->PCDAT |= (1 << 15);
- else
- gpio->PCDAT &= ~(1 << 15);
- return 0;
-
- case 4:
- if (strcmp (argv[3], "on") == 0)
- gpio->PDDAT |= (1 << 0);
- else
- gpio->PDDAT &= ~(1 << 0);
- return 0;
-
- case 5:
- if (strcmp (argv[3], "on") == 0)
- gpio->PDDAT |= (1 << 4);
- else
- gpio->PDDAT &= ~(1 << 4);
- return 0;
-
- default:
- break;
-
- }
- printf ("%s: invalid parameter %s\n", __FUNCTION__, argv[2]);
- return 1;
-}
-
-
-int do_full_bridge (char **argv)
-{
- S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
-
- /* configure PD5 and PD6 as output */
- gpio->PDCON &= ~((0x3 << 5*2) | (0x3 << 6*2));
- gpio->PDCON |= ((0x1 << 5*2) | (0x1 << 6*2));
-
- if (strcmp (argv[2], "+") == 0) {
- gpio->PDDAT |= (1 << 5);
- gpio->PDDAT |= (1 << 6);
- return 0;
- }
- else if (strcmp (argv[2], "-") == 0) {
- gpio->PDDAT &= ~(1 << 5);
- gpio->PDDAT |= (1 << 6);
- return 0;
- }
- else if (strcmp (argv[2], "off") == 0) {
- gpio->PDDAT &= ~(1 << 5);
- gpio->PDDAT &= ~(1 << 6);
- return 0;
- }
- printf ("%s: invalid parameter %s\n", __FUNCTION__, argv[2]);
- return 1;
-}
-
-/* val must be in [0, 4095] */
-static inline unsigned long tsc2000_to_uv (u16 val)
-{
- return ((250000 * val) / 4096) * 10;
-}
-
-
-int do_dac (char **argv)
-{
- int brightness;
-
- /* initialize SPI */
- spi_init ();
-
- if (((brightness = simple_strtoul (argv[2], NULL, 10)) < 0) ||
- (brightness > 255)) {
- printf ("%s: invalid parameter %s\n", __FUNCTION__, argv[2]);
- return 1;
- }
- tsc2000_write(TSC2000_REG_DACCTL, 0x0); /* Power up DAC */
- tsc2000_write(TSC2000_REG_DAC, brightness & 0xff);
-
- return 0;
-}
-
-
-int do_v_bat (void)
-{
- unsigned long ret, res;
-
- /* initialize SPI */
- spi_init ();
-
- tsc2000_write(TSC2000_REG_ADC, 0x1836);
-
- /* now wait for data available */
- adc_wait_conversion_done();
-
- ret = tsc2000_read(TSC2000_REG_BAT1);
- res = (tsc2000_to_uv(ret) + 1250) / 2500;
- res += (ERROR_BATTERY * res) / 1000;
-
- print_identifier ();
- printf ("%ld", (res / 100));
- printf (".%ld", ((res % 100) / 10));
- printf ("%ld V\n", (res % 10));
- return 0;
-}
-
-
-int do_pressure (void)
-{
- /* initialize SPI */
- spi_init ();
-
- tsc2000_write(TSC2000_REG_ADC, 0x2436);
-
- /* now wait for data available */
- adc_wait_conversion_done();
-
- print_identifier ();
- printf ("%d\n", tsc2000_read(TSC2000_REG_AUX2));
- return 0;
-}
-
-
-int do_motor_contact (void)
-{
- int result;
-
- result = *CPLD_FILL_LEVEL; /* read CPLD */
- debug ("%s: cpld_fuellstand (32 bit) %#x\n", __FUNCTION__, result);
-
- /* print result to console */
- print_identifier ();
- if ((result & (1 << 17)) == 0)
- printf("0\n");
- else
- printf("1\n");
- return 0;
-}
-
-int do_motor (char **argv)
-{
- S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
-
- /* Configure I/O port */
- gpio->PGCON &= ~(0x3 << 0);
- gpio->PGCON |= (0x1 << 0);
-
- if (strcmp (argv[2], "on") == 0) {
- gpio->PGDAT &= ~(1 << 0);
- return 0;
- }
- if (strcmp (argv[2], "off") == 0) {
- gpio->PGDAT |= (1 << 0);
- return 0;
- }
- printf ("%s: invalid parameter %s\n", __FUNCTION__, argv[2]);
- return 1;
-}
-
-static void print_identifier (void)
-{
- printf ("## FKT: ");
-}
-
-int do_pwm (char **argv)
-{
- int counter;
- S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
- S3C24X0_TIMERS * const timers = S3C24X0_GetBase_TIMERS();
-
- if (strcmp (argv[2], "on") == 0) {
- /* configure pin GPD8 as TOUT3 */
- gpio->PDCON &= ~(0x3 << 8*2);
- gpio->PDCON |= (0x2 << 8*2);
-
- /* set prescaler for timer 2, 3 and 4 */
- timers->TCFG0 &= ~0xFF00;
- timers->TCFG0 |= 0x0F00;
-
- /* set divider for timer 3 */
- timers->TCFG1 &= ~(0xf << 12);
- timers->TCFG1 |= (0x3 << 12);
-
- /* set frequency */
- counter = (PCLK / PWM_FREQ) >> 9;
- timers->ch[3].TCNTB = counter;
- timers->ch[3].TCMPB = counter / 2;
-
- /* start timer */
- timers->TCON = (timers->TCON | UPDATE3 | RELOAD3) & ~INVERT3;
- timers->TCON = (timers->TCON | START3) & ~UPDATE3;
- return 0;
- }
- if (strcmp (argv[2], "off") == 0) {
-
- /* stop timer */
- timers->TCON &= ~(START2 | RELOAD2);
-
- /* configure pin GPD8 as output and set to 0 */
- gpio->PDCON &= ~(0x3 << 8*2);
- gpio->PDCON |= (0x1 << 8*2);
- gpio->PDDAT &= ~(1 << 8);
- return 0;
- }
- printf ("%s: invalid parameter %s\n", __FUNCTION__, argv[2]);
- return 1;
-}
-
-
-int do_thermo (char **argv)
-{
- int channel, res;
-
- tsc2000_reg_init ();
-
- if (strcmp (argv[2], "all") == 0) {
- int i;
- for (i=0; i <= 15; i++) {
- res = tsc2000_read_channel(i);
- print_identifier ();
- printf ("c%d: %d\n", i, res);
- }
- return 0;
- }
- channel = simple_strtoul (argv[2], NULL, 10);
- res = tsc2000_read_channel(channel);
- print_identifier ();
- printf ("%d\n", res);
- return 0; /* return OK */
-}
-
-
-int do_touch (char **argv)
-{
- int x, y;
-
- if (strcmp (argv[2], "tl") == 0) {
-#ifdef CONFIG_TOUCH_WAIT_PRESSED
- touch_wait_pressed();
-#else
- {
- int i;
- for (i = 0; i < (TOUCH_TIMEOUT * 1000); i++) {
- if (touch_check_pressed ()) {
- break;
- }
- udelay (1000); /* pause 1 ms */
- }
- }
- if (!touch_check_pressed()) {
- print_identifier ();
- printf ("error: touch not pressed\n");
- return 1;
- }
-#endif /* CONFIG_TOUCH_WAIT_PRESSED */
- touch_read_x_y (&x, &y);
-
- print_identifier ();
- printf ("x=%d y=%d\n", x, y);
- return touch_write_clibration_values (CALIB_TL, x, y);
- }
- else if (strcmp (argv[2], "dr") == 0) {
-#ifdef CONFIG_TOUCH_WAIT_PRESSED
- touch_wait_pressed();
-#else
- {
- int i;
- for (i = 0; i < (TOUCH_TIMEOUT * 1000); i++) {
- if (touch_check_pressed ()) {
- break;
- }
- udelay (1000); /* pause 1 ms */
- }
- }
- if (!touch_check_pressed()) {
- print_identifier ();
- printf ("error: touch not pressed\n");
- return 1;
- }
-#endif /* CONFIG_TOUCH_WAIT_PRESSED */
- touch_read_x_y (&x, &y);
-
- print_identifier ();
- printf ("x=%d y=%d\n", x, y);
-
- return touch_write_clibration_values (CALIB_DR, x, y);
- }
- return 1; /* not "tl", nor "dr", so return error */
-}
-
-
-#ifdef CONFIG_TOUCH_WAIT_PRESSED
-static void touch_wait_pressed (void)
-{
- while (!(tsc2000_read(TSC2000_REG_ADC) & TC_PSM));
-}
-
-#else
-static int touch_check_pressed (void)
-{
- return (tsc2000_read(TSC2000_REG_ADC) & TC_PSM);
-}
-#endif /* CONFIG_TOUCH_WAIT_PRESSED */
-
-static int touch_write_clibration_values (int calib_point, int x, int y)
-{
-#if (CONFIG_COMMANDS & CFG_CMD_I2C)
- int x_verify = 0;
- int y_verify = 0;
-
- tsc2000_reg_init ();
-
- if (calib_point == CALIB_TL) {
- if (i2c_write_multiple (I2C_EEPROM_DEV_ADDR, TOUCH_X0, 1,
- (char *)&x, 2)) {
- return 1;
- }
- if (i2c_write_multiple (I2C_EEPROM_DEV_ADDR, TOUCH_Y0, 1,
- (char *)&y, 2)) {
- return 1;
- }
-
- /* verify written values */
- if (i2c_read_multiple (I2C_EEPROM_DEV_ADDR, TOUCH_X0, 1,
- (char *)&x_verify, 2)) {
- return 1;
- }
- if (i2c_read_multiple (I2C_EEPROM_DEV_ADDR, TOUCH_Y0, 1,
- (char *)&y_verify, 2)) {
- return 1;
- }
- if ((y != y_verify) || (x != x_verify)) {
- print_identifier ();
- printf ("error: verify error\n");
- return 1;
- }
- return 0; /* no error */
- }
- else if (calib_point == CALIB_DR) {
- if (i2c_write_multiple (I2C_EEPROM_DEV_ADDR, TOUCH_X1, 1,
- (char *)&x, 2)) {
- return 1;
- }
- if (i2c_write_multiple (I2C_EEPROM_DEV_ADDR, TOUCH_Y1, 1,
- (char *)&y, 2)) {
- return 1;
- }
-
- /* verify written values */
- if (i2c_read_multiple (I2C_EEPROM_DEV_ADDR, TOUCH_X1, 1,
- (char *)&x_verify, 2)) {
- return 1;
- }
- if (i2c_read_multiple (I2C_EEPROM_DEV_ADDR, TOUCH_Y1, 1,
- (char *)&y_verify, 2)) {
- return 1;
- }
- if ((y != y_verify) || (x != x_verify)) {
- print_identifier ();
- printf ("error: verify error\n");
- return 1;
- }
- return 0;
- }
- return 1;
-#else
- printf ("No I2C support enabled (CFG_CMD_I2C), could not write "
- "to EEPROM\n");
- return (1);
-#endif /* CFG_CMD_I2C */
-}
-
-
-static void touch_read_x_y (int *px, int *py)
-{
- tsc2000_write(TSC2000_REG_ADC, DEFAULT_ADC | TC_AD0 | TC_AD1);
- adc_wait_conversion_done();
- *px = tsc2000_read(TSC2000_REG_X);
-
- tsc2000_write(TSC2000_REG_ADC, DEFAULT_ADC | TC_AD2);
- adc_wait_conversion_done();
- *py = tsc2000_read(TSC2000_REG_Y);
-}
-
-
-int do_rs485 (char **argv)
-{
- int timeout;
- char data[RS485_MAX_RECEIVE_BUF_LEN];
-
- if (strcmp (argv[2], "send") == 0) {
- return (rs485_send_line (argv[3]));
- }
- else if (strcmp (argv[2], "receive") == 0) {
- timeout = simple_strtoul(argv[3], NULL, 10);
- if (rs485_receive_chars (data, timeout) != 0) {
- print_identifier ();
- printf ("## nothing received\n");
- return (1);
- }
- else {
- print_identifier ();
- printf ("%s\n", data);
- return (0);
- }
- }
- printf ("%s: unknown command %s\n", __FUNCTION__, argv[2]);
- return (1); /* unknown command, return error */
-}
-
-
-static int rs485_send_line (const char *data)
-{
- rs485_init ();
- trab_rs485_enable_tx ();
- rs485_puts (data);
- rs485_putc ('\n');
-
- return (0);
-}
-
-
-static int rs485_receive_chars (char *data, int timeout)
-{
- int i;
- int receive_count = 0;
-
- rs485_init ();
- trab_rs485_enable_rx ();
-
- /* test every 1 ms for received characters to avoid a receive FIFO
- * overrun (@ 38.400 Baud) */
- for (i = 0; i < (timeout * 1000); i++) {
- while (rs485_tstc ()) {
- if (receive_count >= RS485_MAX_RECEIVE_BUF_LEN-1)
- break;
- *data++ = rs485_getc ();
- receive_count++;
- }
- udelay (1000); /* pause 1 ms */
- }
- *data = '\0'; /* terminate string */
-
- if (receive_count == 0)
- return (1);
- else
- return (0);
-}
-
-
-int do_serial_number (char **argv)
-{
-#if (CONFIG_COMMANDS & CFG_CMD_I2C)
- unsigned int serial_number;
-
- if (strcmp (argv[2], "read") == 0) {
- if (i2c_read (I2C_EEPROM_DEV_ADDR, SERIAL_NUMBER, 1,
- (char *)&serial_number, 4)) {
- printf ("could not read from eeprom\n");
- return (1);
- }
- print_identifier ();
- printf ("%08d\n", serial_number);
- return (0);
- }
- else if (strcmp (argv[2], "write") == 0) {
- serial_number = simple_strtoul(argv[3], NULL, 10);
- if (i2c_write (I2C_EEPROM_DEV_ADDR, SERIAL_NUMBER, 1,
- (char *)&serial_number, 4)) {
- printf ("could not write to eeprom\n");
- return (1);
- }
- return (0);
- }
- printf ("%s: unknown command %s\n", __FUNCTION__, argv[2]);
- return (1); /* unknown command, return error */
-#else
- printf ("No I2C support enabled (CFG_CMD_I2C), could not write "
- "to EEPROM\n");
- return (1);
-#endif /* CFG_CMD_I2C */
-}
-
-
-int do_crc16 (void)
-{
-#if (CONFIG_COMMANDS & CFG_CMD_I2C)
- int crc;
- char buf[EEPROM_MAX_CRC_BUF];
-
- if (i2c_read (I2C_EEPROM_DEV_ADDR, 0, 1, buf, 60)) {
- printf ("could not read from eeprom\n");
- return (1);
- }
- crc = 0; /* start value of crc calculation */
- crc = updcrc (crc, buf, 60);
-
- print_identifier ();
- printf ("crc16=%#04x\n", crc);
-
- if (i2c_write (I2C_EEPROM_DEV_ADDR, CRC16, 1, (char *)&crc,
- sizeof (crc))) {
- printf ("could not read from eeprom\n");
- return (1);
- }
- return (0);
-#else
- printf ("No I2C support enabled (CFG_CMD_I2C), could not write "
- "to EEPROM\n");
- return (1);
-#endif /* CFG_CMD_I2C */
-}
-
-
-/*
- * Calculate, intelligently, the CRC of a dataset incrementally given a
- * buffer full at a time.
- * Initialize crc to 0 for XMODEM, -1 for CCITT.
- *
- * Usage:
- * newcrc = updcrc( oldcrc, bufadr, buflen )
- * unsigned int oldcrc, buflen;
- * char *bufadr;
- *
- * Compile with -DTEST to generate program that prints CRC of stdin to stdout.
- * Compile with -DMAKETAB to print values for crctab to stdout
- */
-
- /* the CRC polynomial. This is used by XMODEM (almost CCITT).
- * If you change P, you must change crctab[]'s initial value to what is
- * printed by initcrctab()
- */
-#define P 0x1021
-
- /* number of bits in CRC: don't change it. */
-#define W 16
-
- /* this the number of bits per char: don't change it. */
-#define B 8
-
-static unsigned short crctab[1<<B] = { /* as calculated by initcrctab() */
- 0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50a5, 0x60c6, 0x70e7,
- 0x8108, 0x9129, 0xa14a, 0xb16b, 0xc18c, 0xd1ad, 0xe1ce, 0xf1ef,
- 0x1231, 0x0210, 0x3273, 0x2252, 0x52b5, 0x4294, 0x72f7, 0x62d6,
- 0x9339, 0x8318, 0xb37b, 0xa35a, 0xd3bd, 0xc39c, 0xf3ff, 0xe3de,
- 0x2462, 0x3443, 0x0420, 0x1401, 0x64e6, 0x74c7, 0x44a4, 0x5485,
- 0xa56a, 0xb54b, 0x8528, 0x9509, 0xe5ee, 0xf5cf, 0xc5ac, 0xd58d,
- 0x3653, 0x2672, 0x1611, 0x0630, 0x76d7, 0x66f6, 0x5695, 0x46b4,
- 0xb75b, 0xa77a, 0x9719, 0x8738, 0xf7df, 0xe7fe, 0xd79d, 0xc7bc,
- 0x48c4, 0x58e5, 0x6886, 0x78a7, 0x0840, 0x1861, 0x2802, 0x3823,
- 0xc9cc, 0xd9ed, 0xe98e, 0xf9af, 0x8948, 0x9969, 0xa90a, 0xb92b,
- 0x5af5, 0x4ad4, 0x7ab7, 0x6a96, 0x1a71, 0x0a50, 0x3a33, 0x2a12,
- 0xdbfd, 0xcbdc, 0xfbbf, 0xeb9e, 0x9b79, 0x8b58, 0xbb3b, 0xab1a,
- 0x6ca6, 0x7c87, 0x4ce4, 0x5cc5, 0x2c22, 0x3c03, 0x0c60, 0x1c41,
- 0xedae, 0xfd8f, 0xcdec, 0xddcd, 0xad2a, 0xbd0b, 0x8d68, 0x9d49,
- 0x7e97, 0x6eb6, 0x5ed5, 0x4ef4, 0x3e13, 0x2e32, 0x1e51, 0x0e70,
- 0xff9f, 0xefbe, 0xdfdd, 0xcffc, 0xbf1b, 0xaf3a, 0x9f59, 0x8f78,
- 0x9188, 0x81a9, 0xb1ca, 0xa1eb, 0xd10c, 0xc12d, 0xf14e, 0xe16f,
- 0x1080, 0x00a1, 0x30c2, 0x20e3, 0x5004, 0x4025, 0x7046, 0x6067,
- 0x83b9, 0x9398, 0xa3fb, 0xb3da, 0xc33d, 0xd31c, 0xe37f, 0xf35e,
- 0x02b1, 0x1290, 0x22f3, 0x32d2, 0x4235, 0x5214, 0x6277, 0x7256,
- 0xb5ea, 0xa5cb, 0x95a8, 0x8589, 0xf56e, 0xe54f, 0xd52c, 0xc50d,
- 0x34e2, 0x24c3, 0x14a0, 0x0481, 0x7466, 0x6447, 0x5424, 0x4405,
- 0xa7db, 0xb7fa, 0x8799, 0x97b8, 0xe75f, 0xf77e, 0xc71d, 0xd73c,
- 0x26d3, 0x36f2, 0x0691, 0x16b0, 0x6657, 0x7676, 0x4615, 0x5634,
- 0xd94c, 0xc96d, 0xf90e, 0xe92f, 0x99c8, 0x89e9, 0xb98a, 0xa9ab,
- 0x5844, 0x4865, 0x7806, 0x6827, 0x18c0, 0x08e1, 0x3882, 0x28a3,
- 0xcb7d, 0xdb5c, 0xeb3f, 0xfb1e, 0x8bf9, 0x9bd8, 0xabbb, 0xbb9a,
- 0x4a75, 0x5a54, 0x6a37, 0x7a16, 0x0af1, 0x1ad0, 0x2ab3, 0x3a92,
- 0xfd2e, 0xed0f, 0xdd6c, 0xcd4d, 0xbdaa, 0xad8b, 0x9de8, 0x8dc9,
- 0x7c26, 0x6c07, 0x5c64, 0x4c45, 0x3ca2, 0x2c83, 0x1ce0, 0x0cc1,
- 0xef1f, 0xff3e, 0xcf5d, 0xdf7c, 0xaf9b, 0xbfba, 0x8fd9, 0x9ff8,
- 0x6e17, 0x7e36, 0x4e55, 0x5e74, 0x2e93, 0x3eb2, 0x0ed1, 0x1ef0
- };
-
-static unsigned short updcrc(unsigned short icrc, unsigned char *icp,
- unsigned int icnt )
-{
- register unsigned short crc = icrc;
- register unsigned char *cp = icp;
- register unsigned int cnt = icnt;
-
- while (cnt--)
- crc = (crc<<B) ^ crctab[(crc>>(W-B)) ^ *cp++];
-
- return (crc);
-}
-
-
-int do_gain (char **argv)
-{
- int range;
-
- range = simple_strtoul (argv[2], NULL, 10);
- if ((range < 1) || (range > 3))
- {
- printf ("%s: invalid parameter %s\n", __FUNCTION__, argv[2]);
- return 1;
- }
-
- tsc2000_set_range (range);
- return (0);
-}
-
-
-int do_eeprom (char **argv)
-{
-#if (CONFIG_COMMANDS & CFG_CMD_I2C)
- if (strcmp (argv[2], "read") == 0) {
- return (trab_eeprom_read (argv));
- }
-
- else if (strcmp (argv[2], "write") == 0) {
- return (trab_eeprom_write (argv));
- }
-
- printf ("%s: invalid parameter %s\n", __FUNCTION__, argv[2]);
- return (1);
-#else
- printf ("No I2C support enabled (CFG_CMD_I2C), could not write "
- "to EEPROM\n");
- return (1);
-#endif /* CFG_CMD_I2C */
-}
-
-#if (CONFIG_COMMANDS & CFG_CMD_I2C)
-static int trab_eeprom_read (char **argv)
-{
- int i;
- int len;
- unsigned int addr;
- long int value = 0;
- uchar *buffer;
-
- buffer = (uchar *) &value;
- addr = simple_strtoul (argv[3], NULL, 10);
- addr &= 0xfff;
- len = simple_strtoul (argv[4], NULL, 10);
- if ((len < 1) || (len > 4)) {
- printf ("%s: invalid parameter %s\n", __FUNCTION__,
- argv[4]);
- return (1);
- }
- for (i = 0; i < len; i++) {
- if (i2c_read (I2C_EEPROM_DEV_ADDR, addr+i, 1, buffer+i, 1)) {
- printf ("%s: could not read from i2c device %#x"
- ", addr %d\n", __FUNCTION__,
- I2C_EEPROM_DEV_ADDR, addr);
- return (1);
- }
- }
- print_identifier ();
- if (strcmp (argv[5], "-") == 0) {
- if (len == 1)
- printf ("%d\n", (signed char) value);
- else if (len == 2)
- printf ("%d\n", (signed short int) value);
- else
- printf ("%ld\n", value);
- }
- else {
- if (len == 1)
- printf ("%d\n", (unsigned char) value);
- else if (len == 2)
- printf ("%d\n", (unsigned short int) value);
- else
- printf ("%ld\n", (unsigned long int) value);
- }
- return (0);
-}
-
-static int trab_eeprom_write (char **argv)
-{
- int i;
- int len;
- unsigned int addr;
- long int value = 0;
- uchar *buffer;
-
- buffer = (uchar *) &value;
- addr = simple_strtoul (argv[3], NULL, 10);
- addr &= 0xfff;
- len = simple_strtoul (argv[4], NULL, 10);
- if ((len < 1) || (len > 4)) {
- printf ("%s: invalid parameter %s\n", __FUNCTION__,
- argv[4]);
- return (1);
- }
- value = simple_strtol (argv[5], NULL, 10);
- debug ("value=%ld\n", value);
- for (i = 0; i < len; i++) {
- if (i2c_write (I2C_EEPROM_DEV_ADDR, addr+i, 1, buffer+i, 1)) {
- printf ("%s: could not write to i2c device %d"
- ", addr %d\n", __FUNCTION__,
- I2C_EEPROM_DEV_ADDR, addr);
- return (1);
- }
-#if 0
- printf ("chip=%#x, addr+i=%#x+%d=%p, alen=%d, *buffer+i="
- "%#x+%d=%p=%#x \n",I2C_EEPROM_DEV_ADDR_DEV_ADDR , addr,
- i, addr+i, 1, buffer, i, buffer+i, *(buffer+i));
-#endif
- udelay (30000); /* wait for EEPROM ready */
- }
- return (0);
-}
-
-int i2c_write_multiple (uchar chip, uint addr, int alen,
- uchar *buffer, int len)
-{
- int i;
-
- if (alen != 1) {
- printf ("%s: addr len other than 1 not supported\n",
- __FUNCTION__);
- return (1);
- }
-
- for (i = 0; i < len; i++) {
- if (i2c_write (chip, addr+i, alen, buffer+i, 1)) {
- printf ("%s: could not write to i2c device %d"
- ", addr %d\n", __FUNCTION__, chip, addr);
- return (1);
- }
-#if 0
- printf ("chip=%#x, addr+i=%#x+%d=%p, alen=%d, *buffer+i="
- "%#x+%d=%p=\"%.1s\"\n", chip, addr, i, addr+i,
- alen, buffer, i, buffer+i, buffer+i);
-#endif
-
- udelay (30000);
- }
- return (0);
-}
-
-int i2c_read_multiple ( uchar chip, uint addr, int alen,
- uchar *buffer, int len)
-{
- int i;
-
- if (alen != 1) {
- printf ("%s: addr len other than 1 not supported\n",
- __FUNCTION__);
- return (1);
- }
-
- for (i = 0; i < len; i++) {
- if (i2c_read (chip, addr+i, alen, buffer+i, 1)) {
- printf ("%s: could not read from i2c device %#x"
- ", addr %d\n", __FUNCTION__, chip, addr);
- return (1);
- }
- }
- return (0);
-}
-#endif /* CFG_CMD_I2C */
diff --git a/board/trab/tsc2000.c b/board/trab/tsc2000.c
deleted file mode 100644
index ca6868212e..0000000000
--- a/board/trab/tsc2000.c
+++ /dev/null
@@ -1,362 +0,0 @@
-/*
- * Functions to access the TSC2000 controller on TRAB board (used for scanning
- * thermo sensors)
- *
- * Copyright (C) 2003 Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de
- *
- * Copyright (C) 2002 DENX Software Engineering, Wolfgang Denk, wd@denx.de
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <s3c2400.h>
-#include "tsc2000.h"
-
-#include "Pt1000_temp_data.h"
-
-/* helper function */
-#define abs(value) (((value) < 0) ? ((value)*-1) : (value))
-
-/*
- * Maximal allowed deviation between two immediate meassurments of an analog
- * thermo channel. 1 DIGIT = 0.0276 °C. This is used to filter sporadic
- * "jumps" in measurment.
- */
-#define MAX_DEVIATION 18 /* unit: DIGITs of adc; 18 DIGIT = 0.5 °C */
-
-void spi_init(void)
-{
- S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
- S3C24X0_SPI * const spi = S3C24X0_GetBase_SPI();
- int i;
-
- /* Configure I/O ports. */
- gpio->PDCON = (gpio->PDCON & 0xF3FFFF) | 0x040000;
- gpio->PGCON = (gpio->PGCON & 0x0F3FFF) | 0x008000;
- gpio->PGCON = (gpio->PGCON & 0x0CFFFF) | 0x020000;
- gpio->PGCON = (gpio->PGCON & 0x03FFFF) | 0x080000;
-
- CLR_CS_TOUCH();
-
- spi->ch[0].SPPRE = 0x1F; /* Baud-rate ca. 514kHz */
- spi->ch[0].SPPIN = 0x01; /* SPI-MOSI holds Level after last bit */
- spi->ch[0].SPCON = 0x1A; /* Polling, Prescaler, Master, CPOL=0,
- CPHA=1 */
-
- /* Dummy byte ensures clock to be low. */
- for (i = 0; i < 10; i++) {
- spi->ch[0].SPTDAT = 0xFF;
- }
- spi_wait_transmit_done();
-}
-
-
-void spi_wait_transmit_done(void)
-{
- S3C24X0_SPI * const spi = S3C24X0_GetBase_SPI();
-
- while (!(spi->ch[0].SPSTA & 0x01)); /* wait until transfer is done */
-}
-
-
-void tsc2000_write(unsigned short reg, unsigned short data)
-{
- S3C24X0_SPI * const spi = S3C24X0_GetBase_SPI();
- unsigned int command;
-
- SET_CS_TOUCH();
- command = reg;
- spi->ch[0].SPTDAT = (command & 0xFF00) >> 8;
- spi_wait_transmit_done();
- spi->ch[0].SPTDAT = (command & 0x00FF);
- spi_wait_transmit_done();
- spi->ch[0].SPTDAT = (data & 0xFF00) >> 8;
- spi_wait_transmit_done();
- spi->ch[0].SPTDAT = (data & 0x00FF);
- spi_wait_transmit_done();
-
- CLR_CS_TOUCH();
-}
-
-
-unsigned short tsc2000_read (unsigned short reg)
-{
- unsigned short command, data;
- S3C24X0_SPI * const spi = S3C24X0_GetBase_SPI();
-
- SET_CS_TOUCH();
- command = 0x8000 | reg;
-
- spi->ch[0].SPTDAT = (command & 0xFF00) >> 8;
- spi_wait_transmit_done();
- spi->ch[0].SPTDAT = (command & 0x00FF);
- spi_wait_transmit_done();
-
- spi->ch[0].SPTDAT = 0xFF;
- spi_wait_transmit_done();
- data = spi->ch[0].SPRDAT;
- spi->ch[0].SPTDAT = 0xFF;
- spi_wait_transmit_done();
-
- CLR_CS_TOUCH();
- return (spi->ch[0].SPRDAT & 0x0FF) | (data << 8);
-}
-
-
-void tsc2000_set_mux (unsigned int channel)
-{
- S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
-
- CLR_MUX1_ENABLE; CLR_MUX2_ENABLE;
- CLR_MUX3_ENABLE; CLR_MUX4_ENABLE;
- switch (channel) {
- case 0:
- CLR_MUX0; CLR_MUX1;
- SET_MUX1_ENABLE;
- break;
- case 1:
- SET_MUX0; CLR_MUX1;
- SET_MUX1_ENABLE;
- break;
- case 2:
- CLR_MUX0; SET_MUX1;
- SET_MUX1_ENABLE;
- break;
- case 3:
- SET_MUX0; SET_MUX1;
- SET_MUX1_ENABLE;
- break;
- case 4:
- CLR_MUX0; CLR_MUX1;
- SET_MUX2_ENABLE;
- break;
- case 5:
- SET_MUX0; CLR_MUX1;
- SET_MUX2_ENABLE;
- break;
- case 6:
- CLR_MUX0; SET_MUX1;
- SET_MUX2_ENABLE;
- break;
- case 7:
- SET_MUX0; SET_MUX1;
- SET_MUX2_ENABLE;
- break;
- case 8:
- CLR_MUX0; CLR_MUX1;
- SET_MUX3_ENABLE;
- break;
- case 9:
- SET_MUX0; CLR_MUX1;
- SET_MUX3_ENABLE;
- break;
- case 10:
- CLR_MUX0; SET_MUX1;
- SET_MUX3_ENABLE;
- break;
- case 11:
- SET_MUX0; SET_MUX1;
- SET_MUX3_ENABLE;
- break;
- case 12:
- CLR_MUX0; CLR_MUX1;
- SET_MUX4_ENABLE;
- break;
- case 13:
- SET_MUX0; CLR_MUX1;
- SET_MUX4_ENABLE;
- break;
- case 14:
- CLR_MUX0; SET_MUX1;
- SET_MUX4_ENABLE;
- break;
- case 15:
- SET_MUX0; SET_MUX1;
- SET_MUX4_ENABLE;
- break;
- default:
- CLR_MUX0; CLR_MUX1;
- }
-}
-
-
-void tsc2000_set_range (unsigned int range)
-{
- S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
-
- switch (range) {
- case 1:
- CLR_SEL_TEMP_V_0; SET_SEL_TEMP_V_1;
- CLR_SEL_TEMP_V_2; CLR_SEL_TEMP_V_3;
- break;
- case 2:
- CLR_SEL_TEMP_V_0; CLR_SEL_TEMP_V_1;
- CLR_SEL_TEMP_V_2; SET_SEL_TEMP_V_3;
- break;
- case 3:
- SET_SEL_TEMP_V_0; CLR_SEL_TEMP_V_1;
- SET_SEL_TEMP_V_2; CLR_SEL_TEMP_V_3;
- break;
- }
-}
-
-
-u16 tsc2000_read_channel (unsigned int channel)
-{
- u16 res;
-
- tsc2000_set_mux(channel);
- udelay(3 * TSC2000_DELAY_BASE);
-
- tsc2000_write(TSC2000_REG_ADC, 0x2036);
- adc_wait_conversion_done ();
- res = tsc2000_read(TSC2000_REG_AUX1);
- return res;
-}
-
-
-s32 tsc2000_contact_temp (void)
-{
- long adc_pt1000, offset;
- long u_pt1000;
- long contact_temp;
- long temp1, temp2;
-
- tsc2000_reg_init ();
- tsc2000_set_range (3);
-
- /*
- * Because of sporadic "jumps" in the measured adc values every
- * channel is read two times. If there is a significant difference
- * between the two measurements, then print an error and do a third
- * measurement, because it is very unlikely that a successive third
- * measurement goes also wrong.
- */
- temp1 = tsc2000_read_channel (14);
- temp2 = tsc2000_read_channel (14);
- if (abs(temp2 - temp1) < MAX_DEVIATION)
- adc_pt1000 = temp2;
- else {
- printf ("%s: read adc value (channel 14) exceeded max allowed "
- "deviation: %d * 0.0276 °C\n",
- __FUNCTION__, MAX_DEVIATION);
- printf ("adc value 1: %ld DIGITs\nadc value 2: %ld DIGITs\n",
- temp1, temp2);
- adc_pt1000 = tsc2000_read_channel (14);
- printf ("use (third read) adc value: adc_pt1000 = "
- "%ld DIGITs\n", adc_pt1000);
- }
- debug ("read channel 14 (pt1000 adc value): %ld\n", adc_pt1000);
-
- temp1 = tsc2000_read_channel (15);
- temp2 = tsc2000_read_channel (15);
- if (abs(temp2 - temp1) < MAX_DEVIATION)
- offset = temp2;
- else {
- printf ("%s: read adc value (channel 15) exceeded max allowed "
- "deviation: %d * 0.0276 °C\n",
- __FUNCTION__, MAX_DEVIATION);
- printf ("adc value 1: %ld DIGITs\nadc value 2: %ld DIGITs\n",
- temp1, temp2);
- offset = tsc2000_read_channel (15);
- printf ("use (third read) adc value: offset = %ld DIGITs\n",
- offset);
- }
- debug ("read channel 15 (offset): %ld\n", offset);
-
- /*
- * Formula for calculating voltage drop on PT1000 resistor: u_pt1000 =
- * x_range3 * (adc_raw - offset) / 10. Formula to calculate x_range3:
- * x_range3 = (2500 * (1000000 + err_vref + err_amp3)) / (4095*6). The
- * error correction Values err_vref and err_amp3 are assumed as 0 in
- * u-boot, because this could cause only a very small error (< 1%).
- */
- u_pt1000 = (101750 * (adc_pt1000 - offset)) / 10;
- debug ("u_pt1000: %ld\n", u_pt1000);
-
- if (tsc2000_interpolate(u_pt1000, Pt1000_temp_table,
- &contact_temp) == -1) {
- printf ("%s: error interpolating PT1000 vlaue\n",
- __FUNCTION__);
- return (-1000);
- }
- debug ("contact_temp: %ld\n", contact_temp);
-
- return contact_temp;
-}
-
-
-void tsc2000_reg_init (void)
-{
- S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
-
- tsc2000_write(TSC2000_REG_ADC, 0x2036);
- tsc2000_write(TSC2000_REG_REF, 0x0011);
- tsc2000_write(TSC2000_REG_DACCTL, 0x0000);
-
- CON_MUX0;
- CON_MUX1;
-
- CON_MUX1_ENABLE;
- CON_MUX2_ENABLE;
- CON_MUX3_ENABLE;
- CON_MUX4_ENABLE;
-
- CON_SEL_TEMP_V_0;
- CON_SEL_TEMP_V_1;
- CON_SEL_TEMP_V_2;
- CON_SEL_TEMP_V_3;
-
- tsc2000_set_mux(0);
- tsc2000_set_range(0);
-}
-
-
-int tsc2000_interpolate(long value, long data[][2], long *result)
-{
- int i;
-
- /* the data is sorted and the first element is upper
- * limit so we can easily check for out-of-band values
- */
- if (data[0][0] < value || data[1][0] > value)
- return -1;
-
- i = 1;
- while (data[i][0] < value)
- i++;
-
- /* To prevent overflow we have to store the intermediate
- result in 'long long'.
- */
-
- *result = data[i-1][1] +
- ((unsigned long long)(data[i][1] - data[i-1][1])
- * (unsigned long long)(value - data[i-1][0]))
- / (data[i][0] - data[i-1][0]);
-
- return 0;
-}
-
-
-void adc_wait_conversion_done(void)
-{
- while (!(tsc2000_read(TSC2000_REG_ADC) & (1 << 14)));
-}
diff --git a/board/trab/tsc2000.h b/board/trab/tsc2000.h
deleted file mode 100644
index aac9c0c77e..0000000000
--- a/board/trab/tsc2000.h
+++ /dev/null
@@ -1,145 +0,0 @@
-/*
- * Functions to access the TSC2000 controller on TRAB board (used for scanning
- * thermo sensors)
- *
- * Copyright (C) 2003 Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de
- *
- * Copyright (C) 2002 DENX Software Engineering, Wolfgang Denk, wd@denx.de
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef _TSC2000_H_
-#define _TSC2000_H_
-
-/* temperature channel multiplexer definitions */
-#define CON_MUX0 (gpio->PCCON = (gpio->PCCON & 0x0FFFFFCFF) | 0x00000100)
-#define CLR_MUX0 (gpio->PCDAT &= 0x0FFEF)
-#define SET_MUX0 (gpio->PCDAT |= 0x00010)
-
-#define CON_MUX1 (gpio->PCCON = (gpio->PCCON & 0x0FFFFF3FF) | 0x00000400)
-#define CLR_MUX1 (gpio->PCDAT &= 0x0FFDF)
-#define SET_MUX1 (gpio->PCDAT |= 0x00020)
-
-#define CON_MUX1_ENABLE (gpio->PCCON = (gpio->PCCON & 0x0FFFFCFFF) | 0x00001000)
-#define CLR_MUX1_ENABLE (gpio->PCDAT |= 0x00040)
-#define SET_MUX1_ENABLE (gpio->PCDAT &= 0x0FFBF)
-
-#define CON_MUX2_ENABLE (gpio->PCCON = (gpio->PCCON & 0x0FFFF3FFF) | 0x00004000)
-#define CLR_MUX2_ENABLE (gpio->PCDAT |= 0x00080)
-#define SET_MUX2_ENABLE (gpio->PCDAT &= 0x0FF7F)
-
-#define CON_MUX3_ENABLE (gpio->PCCON = (gpio->PCCON & 0x0FFFCFFFF) | 0x00010000)
-#define CLR_MUX3_ENABLE (gpio->PCDAT |= 0x00100)
-#define SET_MUX3_ENABLE (gpio->PCDAT &= 0x0FEFF)
-
-#define CON_MUX4_ENABLE (gpio->PCCON = (gpio->PCCON & 0x0FFF3FFFF) | 0x00040000)
-#define CLR_MUX4_ENABLE (gpio->PCDAT |= 0x00200)
-#define SET_MUX4_ENABLE (gpio->PCDAT &= 0x0FDFF)
-
-#define CON_SEL_TEMP_V_0 (gpio->PCCON = (gpio->PCCON & 0x0FFCFFFFF) | 0x00100000)
-#define CLR_SEL_TEMP_V_0 (gpio->PCDAT &= 0x0FBFF)
-#define SET_SEL_TEMP_V_0 (gpio->PCDAT |= 0x00400)
-
-#define CON_SEL_TEMP_V_1 (gpio->PCCON = (gpio->PCCON & 0x0FF3FFFFF) | 0x00400000)
-#define CLR_SEL_TEMP_V_1 (gpio->PCDAT &= 0x0F7FF)
-#define SET_SEL_TEMP_V_1 (gpio->PCDAT |= 0x00800)
-
-#define CON_SEL_TEMP_V_2 (gpio->PCCON = (gpio->PCCON & 0x0FCFFFFFF) | 0x01000000)
-#define CLR_SEL_TEMP_V_2 (gpio->PCDAT &= 0x0EFFF)
-#define SET_SEL_TEMP_V_2 (gpio->PCDAT |= 0x01000)
-
-#define CON_SEL_TEMP_V_3 (gpio->PCCON = (gpio->PCCON & 0x0F3FFFFFF) | 0x04000000)
-#define CLR_SEL_TEMP_V_3 (gpio->PCDAT &= 0x0DFFF)
-#define SET_SEL_TEMP_V_3 (gpio->PCDAT |= 0x02000)
-
-/* TSC2000 register definition */
-#define TSC2000_REG_X ((0 << 11) | (0 << 5))
-#define TSC2000_REG_Y ((0 << 11) | (1 << 5))
-#define TSC2000_REG_Z1 ((0 << 11) | (2 << 5))
-#define TSC2000_REG_Z2 ((0 << 11) | (3 << 5))
-#define TSC2000_REG_BAT1 ((0 << 11) | (5 << 5))
-#define TSC2000_REG_BAT2 ((0 << 11) | (6 << 5))
-#define TSC2000_REG_AUX1 ((0 << 11) | (7 << 5))
-#define TSC2000_REG_AUX2 ((0 << 11) | (8 << 5))
-#define TSC2000_REG_TEMP1 ((0 << 11) | (9 << 5))
-#define TSC2000_REG_TEMP2 ((0 << 11) | (0xA << 5))
-#define TSC2000_REG_DAC ((0 << 11) | (0xB << 5))
-#define TSC2000_REG_ZERO ((0 << 11) | (0x10 << 5))
-#define TSC2000_REG_ADC ((1 << 11) | (0 << 5))
-#define TSC2000_REG_DACCTL ((1 << 11) | (2 << 5))
-#define TSC2000_REG_REF ((1 << 11) | (3 << 5))
-#define TSC2000_REG_RESET ((1 << 11) | (4 << 5))
-#define TSC2000_REG_CONFIG ((1 << 11) | (5 << 5))
-
-/* bit definition of TSC2000 ADC register */
-#define TC_PSM (1 << 15)
-#define TC_STS (1 << 14)
-#define TC_AD3 (1 << 13)
-#define TC_AD2 (1 << 12)
-#define TC_AD1 (1 << 11)
-#define TC_AD0 (1 << 10)
-#define TC_RS1 (1 << 9)
-#define TC_RS0 (1 << 8)
-#define TC_AV1 (1 << 7)
-#define TC_AV0 (1 << 6)
-#define TC_CL1 (1 << 5)
-#define TC_CL0 (1 << 4)
-#define TC_PV2 (1 << 3)
-#define TC_PV1 (1 << 2)
-#define TC_PV0 (1 << 1)
-
-/* default value for TSC2000 ADC register for use with touch functions */
-#define DEFAULT_ADC (TC_PV1 | TC_AV0 | TC_AV1 | TC_RS0)
-
-#define TSC2000_DELAY_BASE 500
-#define TSC2000_NO_SENSOR -0x10000
-
-#define ERROR_BATTERY 220 /* must be adjusted, if R68 is changed on
- * TRAB */
-
-void tsc2000_write(unsigned short, unsigned short);
-unsigned short tsc2000_read (unsigned short);
-u16 tsc2000_read_channel (unsigned int);
-void tsc2000_set_mux (unsigned int);
-void tsc2000_set_range (unsigned int);
-void tsc2000_reg_init (void);
-s32 tsc2000_contact_temp (void);
-void spi_wait_transmit_done (void);
-void spi_init(void);
-int tsc2000_interpolate(long value, long data[][2], long *result);
-void adc_wait_conversion_done(void);
-
-
-static inline void SET_CS_TOUCH(void)
-{
- S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
-
- gpio->PDDAT &= 0x5FF;
-}
-
-
-static inline void CLR_CS_TOUCH(void)
-{
- S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
-
- gpio->PDDAT |= 0x200;
-}
-
-#endif /* _TSC2000_H_ */
diff --git a/board/trab/u-boot.lds b/board/trab/u-boot.lds
deleted file mode 100644
index e56cdd3cad..0000000000
--- a/board/trab/u-boot.lds
+++ /dev/null
@@ -1,65 +0,0 @@
-/*
- * (C) Copyright 2002
- * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-/*OUTPUT_FORMAT("elf32-arm", "elf32-arm", "elf32-arm")*/
-OUTPUT_ARCH(arm)
-ENTRY(_start)
-SECTIONS
-{
- . = 0x00000000;
-
- . = ALIGN(4);
- .text :
- {
- cpu/arm920t/start.o (.text)
- lib_arm/_umodsi3.o (.text)
- lib_generic/zlib.o (.text)
- lib_generic/crc32.o (.text)
- lib_generic/string.o (.text)
-
- . = DEFINED(env_offset) ? env_offset : .;
- common/environment.o (.ppcenv)
-
- *(.text)
- }
-
- . = ALIGN(4);
- .rodata : { *(.rodata) }
-
- . = ALIGN(4);
- .data : { *(.data) }
-
- . = ALIGN(4);
- .got : { *(.got) }
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = ALIGN(4);
- __bss_start = .;
- .bss : { *(.bss) }
- _end = .;
-}
diff --git a/board/trab/vfd.c b/board/trab/vfd.c
deleted file mode 100644
index f510ee55b0..0000000000
--- a/board/trab/vfd.c
+++ /dev/null
@@ -1,571 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering -- wd@denx.de
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/************************************************************************/
-/* ** DEBUG SETTINGS */
-/************************************************************************/
-
-/* #define DEBUG */
-
-/************************************************************************/
-/* ** HEADER FILES */
-/************************************************************************/
-
-#include <config.h>
-#include <common.h>
-#include <version.h>
-#include <stdarg.h>
-#include <linux/types.h>
-#include <devices.h>
-#include <s3c2400.h>
-
-#ifdef CONFIG_VFD
-
-/************************************************************************/
-/* ** CONFIG STUFF -- should be moved to board config file */
-/************************************************************************/
-
-/************************************************************************/
-
-#ifndef PAGE_SIZE
-#define PAGE_SIZE 4096
-#endif
-
-#define ROT 0x09
-#define BLAU 0x0C
-#define VIOLETT 0X0D
-
-/* MAGIC */
-#define FRAME_BUF_SIZE ((256*4*56)/8)
-#define frame_buf_offs 4
-
-/* defines for starting Timer3 as CPLD-Clk */
-#define START3 (1 << 16)
-#define UPDATE3 (1 << 17)
-#define INVERT3 (1 << 18)
-#define RELOAD3 (1 << 19)
-
-/* CPLD-Register for controlling vfd-blank-signal */
-#define VFD_DISABLE (*(volatile uchar *)0x04038000=0x0000)
-#define VFD_ENABLE (*(volatile uchar *)0x04038000=0x0001)
-
-/* Supported VFD Types */
-#define VFD_TYPE_T119C 1 /* Noritake T119C VFD */
-#define VFD_TYPE_MN11236 2
-
-/*#define NEW_CPLD_CLK*/
-
-int vfd_board_id;
-
-/* taken from armboot/common/vfd.c */
-unsigned long adr_vfd_table[112][18][2][4][2];
-unsigned char bit_vfd_table[112][18][2][4][2];
-
-/*
- * initialize the values for the VFD-grid-control in the framebuffer
- */
-void init_grid_ctrl(void)
-{
- DECLARE_GLOBAL_DATA_PTR;
- ulong adr, grid_cycle;
- unsigned int bit, display;
- unsigned char temp, bit_nr;
-
- /*
- * clear frame buffer (logical clear => set to "black")
- */
- memset ((void *)(gd->fb_base), 0, FRAME_BUF_SIZE);
-
- switch (gd->vfd_type) {
- case VFD_TYPE_T119C:
- for (display=0; display<4; display++) {
- for(grid_cycle=0; grid_cycle<56; grid_cycle++) {
- bit = grid_cycle * 256 * 4 +
- (grid_cycle + 200) * 4 +
- frame_buf_offs + display;
- /* wrap arround if offset (see manual S3C2400) */
- if (bit>=FRAME_BUF_SIZE*8)
- bit = bit - (FRAME_BUF_SIZE * 8);
- adr = gd->fb_base + (bit/32) * 4 + (3 - (bit%32) / 8);
- bit_nr = bit % 8;
- bit_nr = (bit_nr > 3) ? bit_nr-4 : bit_nr+4;
- temp=(*(volatile unsigned char*)(adr));
- temp |= (1<<bit_nr);
- (*(volatile unsigned char*)(adr))=temp;
-
- if(grid_cycle<55)
- bit = grid_cycle*256*4+(grid_cycle+201)*4+frame_buf_offs+display;
- else
- bit = grid_cycle*256*4+200*4+frame_buf_offs+display-4; /* grid nr. 0 */
- /* wrap arround if offset (see manual S3C2400) */
- if (bit>=FRAME_BUF_SIZE*8)
- bit = bit-(FRAME_BUF_SIZE*8);
- adr = gd->fb_base+(bit/32)*4+(3-(bit%32)/8);
- bit_nr = bit%8;
- bit_nr = (bit_nr>3)?bit_nr-4:bit_nr+4;
- temp=(*(volatile unsigned char*)(adr));
- temp |= (1<<bit_nr);
- (*(volatile unsigned char*)(adr))=temp;
- }
- }
- break;
- case VFD_TYPE_MN11236:
- for (display=0; display<4; display++) {
- for (grid_cycle=0; grid_cycle<38; grid_cycle++) {
- bit = grid_cycle * 256 * 4 +
- (253 - grid_cycle) * 4 +
- frame_buf_offs + display;
- /* wrap arround if offset (see manual S3C2400) */
- if (bit>=FRAME_BUF_SIZE*8)
- bit = bit - (FRAME_BUF_SIZE * 8);
- adr = gd->fb_base + (bit/32) * 4 + (3 - (bit%32) / 8);
- bit_nr = bit % 8;
- bit_nr = (bit_nr > 3) ? bit_nr-4 : bit_nr+4;
- temp=(*(volatile unsigned char*)(adr));
- temp |= (1<<bit_nr);
- (*(volatile unsigned char*)(adr))=temp;
-
- if(grid_cycle<37)
- bit = grid_cycle*256*4+(252-grid_cycle)*4+frame_buf_offs+display;
-
- /* wrap arround if offset (see manual S3C2400) */
- if (bit>=FRAME_BUF_SIZE*8)
- bit = bit-(FRAME_BUF_SIZE*8);
- adr = gd->fb_base+(bit/32)*4+(3-(bit%32)/8);
- bit_nr = bit%8;
- bit_nr = (bit_nr>3)?bit_nr-4:bit_nr+4;
- temp=(*(volatile unsigned char*)(adr));
- temp |= (1<<bit_nr);
- (*(volatile unsigned char*)(adr))=temp;
- }
- }
- break;
- default:
- printf ("Warning: unknown display type\n");
- break;
- }
-}
-
-/*
- *create translation table for getting easy the right position in the
- *physical framebuffer for some x/y-coordinates of the VFDs
- */
-void create_vfd_table(void)
-{
- DECLARE_GLOBAL_DATA_PTR;
- unsigned long vfd_table[112][18][2][4][2];
- unsigned int x, y, color, display, entry, pixel;
- unsigned int x_abcdef = 0;
-
- switch (gd->vfd_type) {
- case VFD_TYPE_T119C:
- for(y=0; y<=17; y++) { /* Line */
- for(x=0; x<=111; x++) { /* Column */
- for(display=0; display <=3; display++) {
-
- /* Display 0 blue pixels */
- vfd_table[x][y][0][display][0] =
- (x==0) ? y*16+display
- : (x%4)*4+y*16+((x-1)/2)*1024+display;
- /* Display 0 red pixels */
- vfd_table[x][y][1][display][0] =
- (x==0) ? y*16+512+display
- : (x%4)*4+y*16+((x-1)/2)*1024+512+display;
- }
- }
- }
- break;
- case VFD_TYPE_MN11236:
- for(y=0; y<=17; y++) { /* Line */
- for(x=0; x<=111; x++) { /* Column */
- for(display=0; display <=3; display++) {
-
- vfd_table[x][y][0][display][0]=0;
- vfd_table[x][y][0][display][1]=0;
- vfd_table[x][y][1][display][0]=0;
- vfd_table[x][y][1][display][1]=0;
-
- switch (x%6) {
- case 0: x_abcdef=0; break; /* a -> a */
- case 1: x_abcdef=2; break; /* b -> c */
- case 2: x_abcdef=4; break; /* c -> e */
- case 3: x_abcdef=5; break; /* d -> f */
- case 4: x_abcdef=3; break; /* e -> d */
- case 5: x_abcdef=1; break; /* f -> b */
- }
-
- /* blue pixels */
- vfd_table[x][y][0][display][0] =
- (x>1) ? x_abcdef*4+((x-1)/3)*1024+y*48+display
- : x_abcdef*4+ 0+y*48+display;
- /* blue pixels */
- if (x>1 && (x-1)%3)
- vfd_table[x][y][0][display][1] = x_abcdef*4+((x-1)/3+1)*1024+y*48+display;
-
- /* red pixels */
- vfd_table[x][y][1][display][0] =
- (x>1) ? x_abcdef*4+24+((x-1)/3)*1024+y*48+display
- : x_abcdef*4+24+ 0+y*48+display;
- /* red pixels */
- if (x>1 && (x-1)%3)
- vfd_table[x][y][1][display][1] = x_abcdef*4+24+((x-1)/3+1)*1024+y*48+display;
- }
- }
- }
- break;
- default:
- /* do nothing */
- return;
- }
-
- /*
- * Create table with entries for physical byte adresses and
- * bit-number within the byte
- * from table with bit-numbers within the total framebuffer
- */
- for(y=0;y<18;y++) {
- for(x=0;x<112;x++) {
- for(color=0;color<2;color++) {
- for(display=0;display<4;display++) {
- for(entry=0;entry<2;entry++) {
- unsigned long adr = gd->fb_base;
- unsigned int bit_nr = 0;
-
- if (vfd_table[x][y][color][display][entry]) {
-
- pixel = vfd_table[x][y][color][display][entry] + frame_buf_offs;
- /*
- * wrap arround if offset
- * (see manual S3C2400)
- */
- if (pixel>=FRAME_BUF_SIZE*8)
- pixel = pixel-(FRAME_BUF_SIZE*8);
- adr = gd->fb_base+(pixel/32)*4+(3-(pixel%32)/8);
- bit_nr = pixel%8;
- bit_nr = (bit_nr>3)?bit_nr-4:bit_nr+4;
- }
- adr_vfd_table[x][y][color][display][entry] = adr;
- bit_vfd_table[x][y][color][display][entry] = bit_nr;
- }
- }
- }
- }
- }
-}
-
-/*
- * Set/clear pixel of the VFDs
- */
-void set_vfd_pixel(unsigned char x, unsigned char y,
- unsigned char color, unsigned char display,
- unsigned char value)
-{
- DECLARE_GLOBAL_DATA_PTR;
- ulong adr;
- unsigned char bit_nr, temp;
-
- if (! gd->vfd_type) {
- /* Unknown type. */
- return;
- }
-
- /* Pixel-Eintrag Nr. 1 */
- adr = adr_vfd_table[x][y][color][display][0];
- /* Pixel-Eintrag Nr. 1 */
- bit_nr = bit_vfd_table[x][y][color][display][0];
- temp=(*(volatile unsigned char*)(adr));
-
- if (value)
- temp |= (1<<bit_nr);
- else
- temp &= ~(1<<bit_nr);
-
- (*(volatile unsigned char*)(adr))=temp;
-}
-
-/*
- * transfer image from BMP-File
- */
-void transfer_pic(int display, unsigned char *adr, int height, int width)
-{
- int x, y;
- unsigned char temp;
-
- for (; height > 0; height -= 18)
- {
- if (height > 18)
- y = 18;
- else
- y = height;
- for (; y > 0; y--)
- {
- for (x = 0; x < width; x += 2)
- {
- temp = *adr++;
- set_vfd_pixel(x, y-1, 0, display, 0);
- set_vfd_pixel(x, y-1, 1, display, 0);
- if ((temp >> 4) == BLAU)
- set_vfd_pixel(x, y-1, 0, display, 1);
- else if ((temp >> 4) == ROT)
- set_vfd_pixel(x, y-1, 1, display, 1);
- else if ((temp >> 4) == VIOLETT)
- {
- set_vfd_pixel(x, y-1, 0, display, 1);
- set_vfd_pixel(x, y-1, 1, display, 1);
- }
- set_vfd_pixel(x+1, y-1, 0, display, 0);
- set_vfd_pixel(x+1, y-1, 1, display, 0);
- if ((temp & 0x0F) == BLAU)
- set_vfd_pixel(x+1, y-1, 0, display, 1);
- else if ((temp & 0x0F) == ROT)
- set_vfd_pixel(x+1, y-1, 1, display, 1);
- else if ((temp & 0x0F) == VIOLETT)
- {
- set_vfd_pixel(x+1, y-1, 0, display, 1);
- set_vfd_pixel(x+1, y-1, 1, display, 1);
- }
- }
- }
- if (display > 0)
- display--;
- else
- display = 3;
- }
-}
-
-/*
- * This function initializes VFD clock that is needed for the CPLD that
- * manages the keyboard.
- */
-int vfd_init_clocks (void)
-{
- S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
- S3C24X0_TIMERS * const timers = S3C24X0_GetBase_TIMERS();
- S3C24X0_LCD * const lcd = S3C24X0_GetBase_LCD();
-
- /* try to determine display type from the value
- * defined by pull-ups
- */
- gpio->PCUP = (gpio->PCUP & 0xFFF0); /* activate GPC0...GPC3 pullups */
- gpio->PCCON = (gpio->PCCON & 0xFFFFFF00); /* configure GPC0...GPC3 as inputs */
- udelay (10); /* allow signals to settle */
- vfd_board_id = (~gpio->PCDAT) & 0x000F; /* read GPC0...GPC3 port pins */
-
- VFD_DISABLE; /* activate blank for the vfd */
-
-#define NEW_CPLD_CLK
-
-#ifdef NEW_CPLD_CLK
- if (vfd_board_id) {
- /* If new board revision, then use PWM 3 as cpld-clock */
- /* Enable 500 Hz timer for fill level sensor to operate properly */
- /* Configure TOUT3 as functional pin, disable pull-up */
- gpio->PDCON &= ~0x30000;
- gpio->PDCON |= 0x20000;
- gpio->PDUP |= (1 << 8);
-
- /* Configure the prescaler */
- timers->TCFG0 &= ~0xff00;
- timers->TCFG0 |= 0x0f00;
-
- /* Select MUX input (divider) for timer3 (1/16) */
- timers->TCFG1 &= ~0xf000;
- timers->TCFG1 |= 0x3000;
-
- /* Enable autoreload and set the counter and compare
- * registers to values for the 500 Hz clock
- * (for a given prescaler (15) and divider (16)):
- * counter = (66000000 / 500) >> 9;
- */
- timers->ch[3].TCNTB = 0x101;
- timers->ch[3].TCMPB = 0x101 / 2;
-
- /* Start timer */
- timers->TCON = (timers->TCON | UPDATE3 | RELOAD3) & ~INVERT3;
- timers->TCON = (timers->TCON | START3) & ~UPDATE3;
- }
-#endif
- /* If old board revision, then use vm-signal as cpld-clock */
- lcd->LCDCON2 = 0x00FFC000;
- lcd->LCDCON3 = 0x0007FF00;
- lcd->LCDCON4 = 0x00000000;
- lcd->LCDCON5 = 0x00000400;
- lcd->LCDCON1 = 0x00000B75;
- /* VM (GPD1) is used as clock for the CPLD */
- gpio->PDCON = (gpio->PDCON & 0xFFFFFFF3) | 0x00000008;
-
- return 0;
-}
-
-/*
- * initialize LCD-Controller of the S3C2400 for using VFDs
- *
- * VFD detection depends on the board revision:
- * starting from Rev. 200 a type code can be read from the data pins,
- * driven by some pull-up resistors; all earlier systems must be
- * manually configured. The type is set in the "vfd_type" environment
- * variable.
- */
-int drv_vfd_init(void)
-{
- S3C24X0_LCD * const lcd = S3C24X0_GetBase_LCD();
- S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
- char *tmp;
- ulong palette;
- static int vfd_init_done = 0;
- int vfd_inv_data = 0;
-
- DECLARE_GLOBAL_DATA_PTR;
-
- if (vfd_init_done != 0)
- return (0);
- vfd_init_done = 1;
-
- debug("Detecting Revison of WA4-VFD: ID=0x%X\n", vfd_board_id);
-
- switch (vfd_board_id) {
- case 0: /* board revision < Rev.200 */
- if ((tmp = getenv ("vfd_type")) == NULL) {
- break;
- }
- if (strcmp(tmp, "T119C") == 0) {
- gd->vfd_type = VFD_TYPE_T119C;
- } else if (strcmp(tmp, "MN11236") == 0) {
- gd->vfd_type = VFD_TYPE_MN11236;
- } else {
- /* cannot use printf for a warning here */
- gd->vfd_type = 0; /* unknown */
- }
-
- break;
- default: /* default to MN11236, data inverted */
- gd->vfd_type = VFD_TYPE_MN11236;
- vfd_inv_data = 1;
- setenv ("vfd_type", "MN11236");
- }
- debug ("VFD type: %s%s\n",
- (gd->vfd_type == VFD_TYPE_T119C) ? "T119C" :
- (gd->vfd_type == VFD_TYPE_MN11236) ? "MN11236" :
- "unknown",
- vfd_inv_data ? ", inverted data" : "");
-
- gd->fb_base = gd->fb_base;
- create_vfd_table();
- init_grid_ctrl();
-
- for (palette=0; palette < 16; palette++)
- (*(volatile unsigned int*)(PALETTE+(palette*4)))=palette;
- for (palette=16; palette < 256; palette++)
- (*(volatile unsigned int*)(PALETTE+(palette*4)))=0x00;
-
- /*
- * Hinweis: Der Framebuffer ist um genau ein Nibble verschoben
- * Das erste angezeigte Pixel wird aus dem zweiten Nibble geholt
- * das letzte angezeigte Pixel wird aus dem ersten Nibble geholt
- * (wrap around)
- * see manual S3C2400
- */
- /* Stopp LCD-Controller */
- lcd->LCDCON1 = 0x00000000;
- /* frame buffer startadr */
- lcd->LCDSADDR1 = gd->fb_base >> 1;
- /* frame buffer endadr */
- lcd->LCDSADDR2 = (gd->fb_base + FRAME_BUF_SIZE) >> 1;
- lcd->LCDSADDR3 = ((256/4));
- lcd->LCDCON2 = 0x000DC000;
- if(gd->vfd_type == VFD_TYPE_MN11236)
- lcd->LCDCON2 = 37 << 14; /* MN11236: 38 lines */
- else
- lcd->LCDCON2 = 55 << 14; /* T119C: 56 lines */
- lcd->LCDCON3 = 0x0051000A;
- lcd->LCDCON4 = 0x00000001;
- if (gd->vfd_type && vfd_inv_data)
- lcd->LCDCON5 = 0x000004C0;
- else
- lcd->LCDCON5 = 0x00000440;
-
- /* Port pins as LCD output */
- gpio->PCCON = (gpio->PCCON & 0xFFFFFF00)| 0x000000AA;
- gpio->PDCON = (gpio->PDCON & 0xFFFFFF03)| 0x000000A8;
-
- /* Synchronize VFD enable with LCD controller to avoid flicker */
- lcd->LCDCON1 = 0x00000B75; /* Start LCD-Controller */
- while((lcd->LCDCON5 & 0x180000)!=0x100000); /* Wait for end of VSYNC */
- while((lcd->LCDCON5 & 0x060000)!=0x040000); /* Wait for next HSYNC */
- while((lcd->LCDCON5 & 0x060000)==0x040000);
- while((lcd->LCDCON5 & 0x060000)!=0x000000);
- if(gd->vfd_type)
- VFD_ENABLE;
-
- debug ("LCDSADDR1: %lX\n", lcd->LCDSADDR1);
- debug ("LCDSADDR2: %lX\n", lcd->LCDSADDR2);
- debug ("LCDSADDR3: %lX\n", lcd->LCDSADDR3);
-
- return 0;
-}
-
-/*
- * Disable VFD: should be run before resetting the system:
- * disable VM, enable pull-up
- */
-void disable_vfd (void)
-{
- S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
-
- VFD_DISABLE;
- gpio->PDCON &= ~0xC;
- gpio->PDUP &= ~0x2;
-}
-
-/************************************************************************/
-/* ** ROM capable initialization part - needed to reserve FB memory */
-/************************************************************************/
-
-/*
- * This is called early in the system initialization to grab memory
- * for the VFD controller.
- *
- * Note that this is running from ROM, so no write access to global data.
- */
-ulong vfd_setmem (ulong addr)
-{
- ulong size;
-
- /* Round up to nearest full page */
- size = (FRAME_BUF_SIZE + (PAGE_SIZE - 1)) & ~(PAGE_SIZE - 1);
-
- debug ("Reserving %ldk for VFD Framebuffer at: %08lx\n", size>>10, addr);
-
- return (size);
-}
-
-/*
- * Calculate fb size for VIDEOLFB_ATAG. Size returned contains fb,
- * descriptors and palette areas.
- */
-ulong calc_fbsize (void)
-{
- return FRAME_BUF_SIZE;
-}
-
-#endif /* CONFIG_VFD */
diff --git a/board/uc100/Makefile b/board/uc100/Makefile
deleted file mode 100644
index eb81625fef..0000000000
--- a/board/uc100/Makefile
+++ /dev/null
@@ -1,41 +0,0 @@
-#
-# (C) Copyright 2000-2003
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-#OBJS = $(BOARD).o flash.o
-OBJS = $(BOARD).o
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/uc100/config.mk b/board/uc100/config.mk
deleted file mode 100644
index a65a8ba2c7..0000000000
--- a/board/uc100/config.mk
+++ /dev/null
@@ -1,29 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# UC100 boards
-#
-
-#TEXT_BASE = 0x40000000
-TEXT_BASE = 0x40700000
diff --git a/board/uc100/u-boot.lds b/board/uc100/u-boot.lds
deleted file mode 100644
index d7c798ebb6..0000000000
--- a/board/uc100/u-boot.lds
+++ /dev/null
@@ -1,143 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc8xx/start.o (.text)
- cpu/mpc8xx/traps.o (.text)
- common/dlmalloc.o (.text)
- lib_ppc/ppcstring.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
- lib_generic/zlib.o (.text)
- lib_ppc/cache.o (.text)
- lib_ppc/time.o (.text)
-
- common/environment.o (.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/uc100/u-boot.lds.debug b/board/uc100/u-boot.lds.debug
deleted file mode 100644
index d9bb868363..0000000000
--- a/board/uc100/u-boot.lds.debug
+++ /dev/null
@@ -1,136 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc8xx/start.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
-
- common/environment.o(.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/uc100/uc100.c b/board/uc100/uc100.c
deleted file mode 100644
index 4f2cff624f..0000000000
--- a/board/uc100/uc100.c
+++ /dev/null
@@ -1,282 +0,0 @@
-/*
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#if 0
-#define DEBUG
-#endif
-
-#include <common.h>
-#include <mpc8xx.h>
-#include <i2c.h>
-#include <miiphy.h>
-
-int fec8xx_miiphy_write(char *devname, unsigned char addr,
- unsigned char reg, unsigned short value);
-
-/*********************************************************************/
-/* UPMA Pre Initilization Table by WV (Miron MT48LC16M16A2-7E B) */
-/*********************************************************************/
-const uint sdram_init_upm_table[] = {
- /* SDRAM Initialisation Sequence (offset 0 in UPMA RAM) WV */
- /* NOP - Precharge - AutoRefr - NOP - NOP */
- /* NOP - AutoRefr - NOP */
- /* NOP - NOP - LoadModeR - NOP - Active */
- /* Position of Single Read */
- 0x0ffffc04, 0x0ff77c04, 0x0ff5fc04, 0x0ffffc04, 0x0ffffc04,
- 0x0ffffc04, 0x0ff5fc04, 0x0ffffc04,
-
- /* Burst Read. (offset 8 in UPMA RAM) */
- /* Cycle lent for Initialisation WV */
- 0x0ffffc04, 0x0ffffc34, 0x0f057c34, 0x0ffffc30, 0x1ff7fc05,
- 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
- 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-
- /* Single Write. (offset 18 in UPMA RAM) */
- 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
- 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-
- /* Burst Write. (offset 20 in UPMA RAM) */
- 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
- 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
- 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-
- /* Refresh (offset 30 in UPMA RAM) */
- 0x0FF77C04, 0x0FFFFC04, 0x0FF5FC84, 0x0FFFFC04, 0x0FFFFC04,
- 0x0FFFFC84, 0x1FFFFC05, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
- 0xFFFFFFFF, 0xFFFFFFFF,
-
- /* Exception. (offset 3c in UPMA RAM) */
- 0x7FFFFC05, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-};
-
-/*********************************************************************/
-/* UPMA initilization table. */
-/*********************************************************************/
-const uint sdram_upm_table[] = {
- /* single read. (offset 0 in UPMA RAM) */
- 0x0F07FC04, 0x0FFFFC04, 0x00BDFC04, 0x0FF77C00, 0x1FFFFC05,
- 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, /* 0x05-0x07 new WV */
-
- /* Burst Read. (offset 8 in UPMA RAM) */
- 0x0F07FC04, 0x0FFFFC04, 0x00BDFC04, 0x00FFFC00, 0x00FFFC00,
- 0x00FFFC00, 0x0FF77C00, 0x1FFFFC05, 0xFFFFFFFF, 0xFFFFFFFF,
- 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-
- /* Single Write. (offset 18 in UPMA RAM) */
- 0x0F07FC04, 0x0FFFFC00, 0x00BD7C04, 0x0FFFFC04, 0x0FF77C04,
- 0x1FFFFC05, 0xFFFFFFFF, 0xFFFFFFFF,
-
- /* Burst Write. (offset 20 in UPMA RAM) */
- 0x0F07FC04, 0x0FFFFC00, 0x00BD7C00, 0x00FFFC00, 0x00FFFC00,
- 0x00FFFC04, 0x0FFFFC04, 0x0FF77C04, 0x1FFFFC05, 0xFFFFFFFF,
- 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-
- /* Refresh (offset 30 in UPMA RAM) */
- 0x0FF77C04, 0x0FFFFC04, 0x0FF5FC84, 0x0FFFFC04, 0x0FFFFC04,
- 0x0FFFFC84, 0x1FFFFC05, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
- 0xFFFFFFFF, 0xFFFFFFFF,
-
- /* Exception. (offset 3c in UPMA RAM) */
- 0x7FFFFC05, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, /* 0x3C new WV */
-};
-
-/*********************************************************************/
-/* UPMB initilization table. */
-/*********************************************************************/
-const uint mpm_upm_table[] = {
- /* single read. (offset 0 in upm RAM) */
- 0x8FF00004, 0x0FF00004, 0x0FF81004, 0x1FF00001,
- 0x1FF00001, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-
- /* burst read. (Offset 8 in upm RAM) */
- 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
- 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
- 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
- 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-
- /* single write. (Offset 0x18 in upm RAM) */
- 0x8FF00004, 0x0FF00004, 0x0FF81004, 0x0FF00004,
- 0x0FF00004, 0x1FF00001, 0xFFFFFFFF, 0xFFFFFFFF,
-
- /* burst write. (Offset 0x20 in upm RAM) */
- 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
- 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
- 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
- 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-
- /* Refresh cycle, offset 0x30 */
- 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
- 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
- 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-
- /* Exception, 0ffset 0x3C */
- 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-};
-
-
-int board_switch(void)
-{
- volatile pcmconf8xx_t *pcmp;
-
- pcmp = (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
-
- return ((pcmp->pcmc_pipr >> 24) & 0xf);
-}
-
-
-/*
- * Check Board Identity:
- */
-int checkboard (void)
-{
- char str[64];
- int i = getenv_r ("serial#", str, sizeof(str));
-
- puts ("Board: ");
-
- if (i == -1) {
- puts ("### No HW ID - assuming UC100");
- } else {
- puts(str);
- }
-
- printf (" (SWITCH=%1X)\n", board_switch());
-
- return 0;
-}
-
-
-/*
- * Initialize SDRAM
- */
-long int initdram (int board_type)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
-
- /*---------------------------------------------------------------------*/
- /* Initialize the UPMA/UPMB registers with the appropriate table. */
- /*---------------------------------------------------------------------*/
- upmconfig (UPMA, (uint *) sdram_init_upm_table,
- sizeof (sdram_init_upm_table) / sizeof (uint));
- upmconfig (UPMB, (uint *) mpm_upm_table,
- sizeof (mpm_upm_table) / sizeof (uint));
-
- /*---------------------------------------------------------------------*/
- /* Memory Periodic Timer Prescaler: divide by 16 */
- /*---------------------------------------------------------------------*/
- memctl->memc_mptpr = 0x0200; /* Divide by 32 WV */
-
- memctl->memc_mamr = CFG_MAMR_VAL & 0xFF7FFFFF; /* Bit 8 := "0" Kein Refresh WV */
- memctl->memc_mbmr = CFG_MBMR_VAL;
-
- /*---------------------------------------------------------------------*/
- /* Initialize the Memory Controller registers, MPTPR, Chip Select 1 */
- /* for SDRAM */
- /* */
- /* NOTE: The refresh rate in MAMR reg is set according to the lowest */
- /* clock rate (16.67MHz) to allow proper operation for all ADS */
- /* clock frequencies. */
- /*---------------------------------------------------------------------*/
- memctl->memc_or1 = CFG_OR1_PRELIM;
- memctl->memc_br1 = CFG_BR1_PRELIM;
-
- /*-------------------------------------------------------------------*/
- /* Wait at least 200 usec for DRAM to stabilize, this magic number */
- /* obtained from the init code. */
- /*-------------------------------------------------------------------*/
- udelay(200);
-
- memctl->memc_mamr = (memctl->memc_mamr | 0x04) & ~0x08;
-
- memctl->memc_br1 = CFG_BR1_PRELIM;
- memctl->memc_or1 = CFG_OR1_PRELIM;
-
- /*---------------------------------------------------------------------*/
- /* run MRS command in location 5-8 of UPMB. */
- /*---------------------------------------------------------------------*/
- memctl->memc_mar = 0x88;
- /* RUN UPMA on CS1 1-time from UPMA addr 0x05 */
-
- memctl->memc_mcr = 0x80002100;
- /* RUN UPMA on CS1 1-time from UPMA addr 0x00 WV */
-
- udelay(200);
-
- /*---------------------------------------------------------------------*/
- /* Initialisation for normal access WV */
- /*---------------------------------------------------------------------*/
-
- /*---------------------------------------------------------------------*/
- /* Initialize the UPMA register with the appropriate table. */
- /*---------------------------------------------------------------------*/
- upmconfig (UPMA, (uint *) sdram_upm_table,
- sizeof (sdram_upm_table) / sizeof (uint));
-
- /*---------------------------------------------------------------------*/
- /* rerstore MBMR value (4-beat refresh burst.) */
- /*---------------------------------------------------------------------*/
- memctl->memc_mamr = CFG_MAMR_VAL | 0x00800000; /* Bit 8 := "1" Refresh Enable WV */
-
- udelay(200);
-
- return (64 * 1024 * 1024); /* fixed setup for 64MBytes! */
-}
-
-
-int misc_init_r (void)
-{
- uchar val;
-
- /*
- * Make sure that RTC has clock output enabled (triggers watchdog!)
- */
- val = i2c_reg_read (CFG_I2C_RTC_ADDR, 0x0D);
- val |= 0x80;
- i2c_reg_write (CFG_I2C_RTC_ADDR, 0x0D, val);
-
- /*
- * Configure PHY to setup LED's correctly and use 100MBit, FD
- */
- mii_init();
-
- /* disable auto-negotiation, 100mbit, full-duplex */
- fec8xx_miiphy_write(NULL, 0, PHY_BMCR, 0x2100);
-
- /* set LED's to Link, Transmit, Receive */
- fec8xx_miiphy_write(NULL, 0, PHY_FCSCR, 0x4122);
-
- return 0;
-}
-
-
-#ifdef CONFIG_POST
-/*
- * Returns 1 if keys pressed to start the power-on long-running tests
- * Called from board_init_f().
- */
-int post_hotkeys_pressed (void)
-{
- return 0; /* No hotkeys supported */
-}
-#endif
diff --git a/board/utx8245/Makefile b/board/utx8245/Makefile
deleted file mode 100644
index e698afc7f9..0000000000
--- a/board/utx8245/Makefile
+++ /dev/null
@@ -1,47 +0,0 @@
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# (C) Copyright 2002
-# Gregory E. Allen, gallen@arlut.utexas.edu
-# Matthew E. Karger, karger@arlut.utexas.edu
-# Applied Research Laboratories, The University of Texas at Austin
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o
-
-SOBJS =
-
-$(LIB): .depend $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/utx8245/config.mk b/board/utx8245/config.mk
deleted file mode 100644
index a33faa7424..0000000000
--- a/board/utx8245/config.mk
+++ /dev/null
@@ -1,33 +0,0 @@
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# (C) Copyright 2002
-# Gregory E. Allen, gallen@arlut.utexas.edu
-# Matthew E. Karger, karger@arlut.utexas.edu
-# Applied Research Laboratories, The University of Texas at Austin
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# UTX8245 boards
-#
-TEXT_BASE = 0xFFF00000
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE)
diff --git a/board/utx8245/flash.c b/board/utx8245/flash.c
deleted file mode 100644
index 3271827081..0000000000
--- a/board/utx8245/flash.c
+++ /dev/null
@@ -1,560 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2002
- * Gregory E. Allen, gallen@arlut.utexas.edu
- * Matthew E. Karger, karger@arlut.utexas.edu
- * Applied Research Laboratories, The University of Texas at Austin
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc824x.h>
-#include <asm/processor.h>
-
-#define ROM_CS0_START 0xFF800000
-#define ROM_CS1_START 0xFF000000
-
-#if defined(CFG_ENV_IS_IN_FLASH)
-# ifndef CFG_ENV_ADDR
-# define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_ENV_OFFSET)
-# endif
-# ifndef CFG_ENV_SIZE
-# define CFG_ENV_SIZE CFG_ENV_SECT_SIZE
-# endif
-# ifndef CFG_ENV_SECT_SIZE
-# define CFG_ENV_SECT_SIZE CFG_ENV_SIZE
-# endif
-#endif
-
-#define FLASH_BANK_SIZE ((uint)(16 * 1024 * 1024)) /* max 16Mbyte */
-#define MAIN_SECT_SIZE 0x10000
-#define SECT_SIZE_32KB 0x8000
-#define SECT_SIZE_8KB 0x2000
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
-
-static int write_word (flash_info_t * info, ulong dest, ulong data);
-#if 0
-static void write_via_fpu (vu_long * addr, ulong * data);
-#endif
-static __inline__ unsigned long get_msr (void);
-static __inline__ void set_msr (unsigned long msr);
-
-/*flash command address offsets*/
-#define ADDR0 (0x555)
-#define ADDR1 (0xAAA)
-#define ADDR3 (0x001)
-
-#define FLASH_WORD_SIZE unsigned char
-
-/*---------------------------------------------------------------------*/
-/*#define DEBUG_FLASH 1 */
-
-/*---------------------------------------------------------------------*/
-
-unsigned long flash_init (void)
-{
- int i; /* flash bank counter */
- int j; /* flash device sector counter */
- int k; /* flash size calculation loop counter */
- int N; /* pow(2,N) is flash size, but we don't have <math.h> */
- ulong total_size = 0, device_size = 1;
- unsigned char manuf_id, device_id;
-
- for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
- vu_char *addr = (vu_char *) (CFG_FLASH_BASE + i * FLASH_BANK_SIZE);
-
- addr[0x555] = 0xAA; /* get manuf/device info command */
- addr[0x2AA] = 0x55; /* 3-cycle command */
- addr[0x555] = 0x90;
-
- manuf_id = addr[0]; /* read back manuf/device info */
- device_id = addr[1];
-
- addr[0x55] = 0x98; /* CFI command */
- N = addr[0x27]; /* read back device_size = pow(2,N) */
-
- for (k = 0; k < N; k++) /* calculate device_size = pow(2,N) */
- device_size *= 2;
-
- flash_info[i].size = device_size;
- flash_info[i].sector_count = CFG_MAX_FLASH_SECT;
-
-#if defined DEBUG_FLASH
- printf ("manuf_id = %x, device_id = %x\n", manuf_id, device_id);
-#endif
- /* find out what kind of flash we are using */
- if ((manuf_id == (uchar) (AMD_MANUFACT))
- && (device_id == AMD_ID_LV033C)) {
- flash_info[i].flash_id =
- ((FLASH_MAN_AMD & FLASH_VENDMASK) << 16) |
- (FLASH_AM033C & FLASH_TYPEMASK);
-
- /* set individual sector start addresses */
- for (j = 0; j < flash_info[i].sector_count; j++) {
- flash_info[i].start[j] =
- (CFG_FLASH_BASE + i * FLASH_BANK_SIZE +
- j * MAIN_SECT_SIZE);
- }
- }
-
- else if ((manuf_id == (uchar) (AMD_MANUFACT)) &&
- (device_id == AMD_ID_LV116DT)) {
- flash_info[i].flash_id =
- ((FLASH_MAN_AMD & FLASH_VENDMASK) << 16) |
- (FLASH_AM160T & FLASH_TYPEMASK);
-
- /* set individual sector start addresses */
- for (j = 0; j < flash_info[i].sector_count; j++) {
- flash_info[i].start[j] =
- (CFG_FLASH_BASE + i * FLASH_BANK_SIZE +
- j * MAIN_SECT_SIZE);
-
- if (j < (CFG_MAX_FLASH_SECT - 3)) {
- flash_info[i].start[j] =
- (CFG_FLASH_BASE + i * FLASH_BANK_SIZE +
- j * MAIN_SECT_SIZE);
- } else if (j == (CFG_MAX_FLASH_SECT - 3)) {
- flash_info[i].start[j] =
- (flash_info[i].start[j - 1] + SECT_SIZE_32KB);
-
- } else {
- flash_info[i].start[j] =
- (flash_info[i].start[j - 1] + SECT_SIZE_8KB);
- }
- }
- }
-
- else {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- addr[0] = 0xFF;
- goto Done;
- }
-
-#if defined DEBUG_FLASH
- printf ("flash_id = 0x%08lX\n", flash_info[i].flash_id);
-#endif
-
- addr[0] = 0xFF;
-
- memset (flash_info[i].protect, 0, CFG_MAX_FLASH_SECT);
-
- total_size += flash_info[i].size;
- }
-
- /* Protect monitor and environment sectors
- */
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
- flash_protect (FLAG_PROTECT_SET, CFG_MONITOR_BASE,
- CFG_MONITOR_BASE + monitor_flash_len - 1,
- &flash_info[0]);
-#endif
-
-#if (CFG_ENV_IS_IN_FLASH == 1) && defined(CFG_ENV_ADDR)
- flash_protect (FLAG_PROTECT_SET, CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0]);
-#endif
-
- Done:
- return total_size;
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t * info)
-{
- static const char unk[] = "Unknown";
- const char *mfct = unk, *type = unk;
- unsigned int i;
-
- if (info->flash_id != FLASH_UNKNOWN) {
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD:
- mfct = "AMD";
- break;
- case FLASH_MAN_FUJ:
- mfct = "FUJITSU";
- break;
- case FLASH_MAN_STM:
- mfct = "STM";
- break;
- case FLASH_MAN_SST:
- mfct = "SST";
- break;
- case FLASH_MAN_BM:
- mfct = "Bright Microelectonics";
- break;
- case FLASH_MAN_INTEL:
- mfct = "Intel";
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM033C:
- type = "AM29LV033C (32 Mbit, uniform sector size)";
- break;
- case FLASH_AM160T:
- type = "AM29LV160T (16 Mbit, top boot sector)";
- break;
- case FLASH_AM040:
- type = "AM29F040B (512K * 8, uniform sector size)";
- break;
- case FLASH_AM400B:
- type = "AM29LV400B (4 Mbit, bottom boot sect)";
- break;
- case FLASH_AM400T:
- type = "AM29LV400T (4 Mbit, top boot sector)";
- break;
- case FLASH_AM800B:
- type = "AM29LV800B (8 Mbit, bottom boot sect)";
- break;
- case FLASH_AM800T:
- type = "AM29LV800T (8 Mbit, top boot sector)";
- break;
- case FLASH_AM320B:
- type = "AM29LV320B (32 Mbit, bottom boot sect)";
- break;
- case FLASH_AM320T:
- type = "AM29LV320T (32 Mbit, top boot sector)";
- break;
- case FLASH_STM800AB:
- type = "M29W800AB (8 Mbit, bottom boot sect)";
- break;
- case FLASH_SST800A:
- type = "SST39LF/VF800 (8 Mbit, uniform sector size)";
- break;
- case FLASH_SST160A:
- type = "SST39LF/VF160 (16 Mbit, uniform sector size)";
- break;
- }
- }
-
- printf ("\n Brand: %s Type: %s\n"
- " Size: %lu KB in %d Sectors\n",
- mfct, type, info->size >> 10, info->sector_count);
-
- printf (" Sector Start Addresses:");
-
- for (i = 0; i < info->sector_count; i++) {
- unsigned long size;
- unsigned int erased;
- unsigned long *flash = (unsigned long *) info->start[i];
-
- /*
- * Check if whole sector is erased
- */
- size = (i != (info->sector_count - 1)) ?
- (info->start[i + 1] - info->start[i]) >> 2 :
- (info->start[0] + info->size - info->start[i]) >> 2;
-
- for (flash = (unsigned long *) info->start[i], erased = 1;
- (flash != (unsigned long *) info->start[i] + size) && erased;
- flash++)
- erased = *flash == ~0x0UL;
-
- printf ("%s %08lX %s %s",
- (i % 5) ? "" : "\n ",
- info->start[i],
- erased ? "E" : " ", info->protect[i] ? "RO" : " ");
- }
-
- puts ("\n");
- return;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t * info, int s_first, int s_last)
-{
- volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *) (info->start[0]);
- int flag, prot, sect, l_sect;
- ulong start, now, last;
- unsigned char sh8b;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- if ((info->flash_id == FLASH_UNKNOWN) ||
- (info->flash_id > (FLASH_MAN_STM | FLASH_AMD_COMP))) {
- printf ("Can't erase unknown flash type - aborted\n");
- return 1;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- l_sect = -1;
-
- /* Check the ROM CS */
- if ((info->start[0] >= ROM_CS1_START)
- && (info->start[0] < ROM_CS0_START))
- sh8b = 3;
- else
- sh8b = 0;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
-
- addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE) 0x00AA00AA;
- addr[ADDR1 << sh8b] = (FLASH_WORD_SIZE) 0x00550055;
- addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE) 0x00800080;
- addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE) 0x00AA00AA;
- addr[ADDR1 << sh8b] = (FLASH_WORD_SIZE) 0x00550055;
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr = (FLASH_WORD_SIZE *) (info->start[0] + ((info->
- start[sect] -
- info->
- start[0]) <<
- sh8b));
-
- if (info->flash_id & FLASH_MAN_SST) {
- addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE) 0x00AA00AA;
- addr[ADDR1 << sh8b] = (FLASH_WORD_SIZE) 0x00550055;
- addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE) 0x00800080;
- addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE) 0x00AA00AA;
- addr[ADDR1 << sh8b] = (FLASH_WORD_SIZE) 0x00550055;
- addr[0] = (FLASH_WORD_SIZE) 0x00500050; /* block erase */
- udelay (30000); /* wait 30 ms */
- } else {
- addr[0] = (FLASH_WORD_SIZE) 0x00300030; /* sector erase */
- }
-
- l_sect = sect;
- }
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts ();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- /*
- * We wait for the last triggered sector
- */
- if (l_sect < 0)
- goto DONE;
-
- start = get_timer (0);
- last = start;
- addr = (FLASH_WORD_SIZE *) (info->start[0] + ((info->start[l_sect] -
- info->
- start[0]) << sh8b));
- while ((addr[0] & (FLASH_WORD_SIZE) 0x00800080) !=
- (FLASH_WORD_SIZE) 0x00800080) {
- if ((now = get_timer (start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- return 1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- serial_putc ('.');
- last = now;
- }
- }
-
- DONE:
- /* reset to read mode */
- addr = (FLASH_WORD_SIZE *) info->start[0];
- addr[0] = (FLASH_WORD_SIZE) 0x00F000F0; /* reset bank */
-
- printf (" done\n");
- return 0;
-}
-
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int i, l, rc;
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i = 0, cp = wp; i < l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
- for (; i < 4 && cnt > 0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt == 0 && i < 4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
-
- if ((rc = write_word (info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = 0;
- for (i = 0; i < 4; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_word (info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i = 0, cp = wp; i < 4 && cnt > 0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i < 4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
-
- return (write_word (info, wp, data));
-}
-
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word (flash_info_t * info, ulong dest, ulong data)
-{
- volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *) info->start[0];
- volatile FLASH_WORD_SIZE *dest2;
- volatile FLASH_WORD_SIZE *data2 = (FLASH_WORD_SIZE *) & data;
- ulong start;
- int flag;
- int i;
- unsigned char sh8b;
-
- /* Check the ROM CS */
- if ((info->start[0] >= ROM_CS1_START)
- && (info->start[0] < ROM_CS0_START))
- sh8b = 3;
- else
- sh8b = 0;
-
- dest2 = (FLASH_WORD_SIZE *) (((dest - info->start[0]) << sh8b) +
- info->start[0]);
-
- /* Check if Flash is (sufficiently) erased */
- if ((*dest2 & (FLASH_WORD_SIZE) data) != (FLASH_WORD_SIZE) data) {
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
-
- for (i = 0; i < 4 / sizeof (FLASH_WORD_SIZE); i++) {
- addr2[ADDR0 << sh8b] = (FLASH_WORD_SIZE) 0x00AA00AA;
- addr2[ADDR1 << sh8b] = (FLASH_WORD_SIZE) 0x00550055;
- addr2[ADDR0 << sh8b] = (FLASH_WORD_SIZE) 0x00A000A0;
-
- dest2[i << sh8b] = data2[i];
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts ();
-
- /* data polling for D7 */
- start = get_timer (0);
- while ((dest2[i << sh8b] & (FLASH_WORD_SIZE) 0x00800080) !=
- (data2[i] & (FLASH_WORD_SIZE) 0x00800080)) {
- if (get_timer (start) > CFG_FLASH_WRITE_TOUT) {
- return (1);
- }
- }
- }
-
- return (0);
-}
-
-/*-----------------------------------------------------------------------
- */
-#if 0
-static void write_via_fpu (vu_long * addr, ulong * data)
-{
- __asm__ __volatile__ ("lfd 1, 0(%0)"::"r" (data));
- __asm__ __volatile__ ("stfd 1, 0(%0)"::"r" (addr));
-}
-#endif
-
-/*-----------------------------------------------------------------------
- */
-static __inline__ unsigned long get_msr (void)
-{
- unsigned long msr;
-
- __asm__ __volatile__ ("mfmsr %0":"=r" (msr):);
-
- return msr;
-}
-
-static __inline__ void set_msr (unsigned long msr)
-{
- __asm__ __volatile__ ("mtmsr %0"::"r" (msr));
-}
diff --git a/board/utx8245/u-boot.lds b/board/utx8245/u-boot.lds
deleted file mode 100644
index 45f3018bb9..0000000000
--- a/board/utx8245/u-boot.lds
+++ /dev/null
@@ -1,141 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2002
- * Gregory E. Allen, gallen@arlut.utexas.edu
- * Matthew E. Karger, karger@arlut.utexas.edu
- * Applied Research Laboratories, The University of Texas at Austin
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc824x/start.o (.text)
- lib_ppc/board.o (.text)
- lib_ppc/ppcstring.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
- lib_generic/zlib.o (.text)
-
- . = DEFINED(env_offset) ? env_offset : .;
- common/environment.o (.text)
-
- *(.text)
-
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
-
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/utx8245/utx8245.c b/board/utx8245/utx8245.c
deleted file mode 100644
index 834fd84079..0000000000
--- a/board/utx8245/utx8245.c
+++ /dev/null
@@ -1,129 +0,0 @@
-/*
- * (C) Copyright 2001
- * Rob Taylor, Flying Pig Systems. robt@flyingpig.com.
- *
- * (C) Copyright 2002
- * Gregory E. Allen, gallen@arlut.utexas.edu
- * Matthew E. Karger, karger@arlut.utexas.edu
- * Applied Research Laboratories, The University of Texas at Austin
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc824x.h>
-#include <asm/processor.h>
-#include <asm/io.h>
-#include <asm/mmu.h>
-#include <pci.h>
-
-#define SAVE_SZ 32
-
-
-int checkboard(void)
-{
- ulong busfreq = get_bus_freq(0);
- char buf[32];
-
- printf("Board: UTX8245 Local Bus at %s MHz\n", strmhz(buf, busfreq));
- return 0;
-}
-
-
-long int initdram(int board_type)
-{
- long size;
- long new_bank0_end;
- long new_bank1_end;
- long mear1;
- long emear1;
-
- size = get_ram_size(CFG_SDRAM_BASE, CFG_MAX_RAM_SIZE);
-
- new_bank0_end = size/2 - 1;
- new_bank1_end = size - 1;
- mear1 = mpc824x_mpc107_getreg(MEAR1);
- emear1 = mpc824x_mpc107_getreg(EMEAR1);
-
- mear1 = (mear1 & 0xFFFF0000) |
- ((new_bank0_end & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) |
- ((new_bank1_end & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT << 8);
- emear1 = (emear1 & 0xFFFF0000) |
- ((new_bank0_end & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) |
- ((new_bank1_end & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT << 8);
-
- mpc824x_mpc107_setreg(MEAR1, mear1);
- mpc824x_mpc107_setreg(EMEAR1, emear1);
-
- return (size);
-}
-
-
-/*
- * Initialize PCI Devices, report devices found.
- */
-
-static struct pci_config_table pci_utx8245_config_table[] = {
-#ifndef CONFIG_PCI_PNP
- { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x0C, PCI_ANY_ID,
- pci_cfgfunc_config_device, { PCI_ENET0_IOADDR,
- PCI_ENET0_MEMADDR,
- PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }},
- { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x0B, PCI_ANY_ID,
- pci_cfgfunc_config_device, { PCI_FIREWIRE_IOADDR,
- PCI_FIREWIRE_MEMADDR,
- PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }},
-#endif /*CONFIG_PCI_PNP*/
- { }
-};
-
-
-static void pci_utx8245_fixup_irq(struct pci_controller *hose, pci_dev_t dev)
-{
- if (PCI_DEV(dev) == 11)
- /* assign serial interrupt line 9 (int25) to FireWire */
- pci_hose_write_config_byte(hose, dev, PCI_INTERRUPT_LINE, 25);
-
- else if (PCI_DEV(dev) == 12)
- /* assign serial interrupt line 8 (int24) to Ethernet */
- pci_hose_write_config_byte(hose, dev, PCI_INTERRUPT_LINE, 24);
-
- else if (PCI_DEV(dev) == 14)
- /* assign serial interrupt line 0 (int16) to PMC slot 0 */
- pci_hose_write_config_byte(hose, dev, PCI_INTERRUPT_LINE, 16);
-
- else if (PCI_DEV(dev) == 15)
- /* assign serial interrupt line 1 (int17) to PMC slot 1 */
- pci_hose_write_config_byte(hose, dev, PCI_INTERRUPT_LINE, 17);
-}
-
-static struct pci_controller utx8245_hose = {
-#ifndef CONFIG_PCI_PNP
- config_table: pci_utx8245_config_table,
- fixup_irq: pci_utx8245_fixup_irq,
- write_byte: pci_hose_write_config_byte
-#endif /*CONFIG_PCI_PNP*/
-};
-
-void pci_init_board (void)
-{
- pci_mpc824x_init(&utx8245_hose);
-
- icache_enable();
-}
diff --git a/board/v37/Makefile b/board/v37/Makefile
deleted file mode 100644
index 7a17067936..0000000000
--- a/board/v37/Makefile
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# (C) Copyright 2003
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/v37/config.mk b/board/v37/config.mk
deleted file mode 100644
index 50cac972e1..0000000000
--- a/board/v37/config.mk
+++ /dev/null
@@ -1,27 +0,0 @@
-#
-# (C) Copyright 2003
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# Marel V37 boards
-#
-TEXT_BASE = 0x40000000
diff --git a/board/v37/flash.c b/board/v37/flash.c
deleted file mode 100644
index 6a319721b2..0000000000
--- a/board/v37/flash.c
+++ /dev/null
@@ -1,559 +0,0 @@
-/*
- * (C) Copyright 2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * Yoo. Jonghoon, IPone, yooth@ipone.co.kr
- * U-Boot port on RPXlite board
- *
- * Some of flash control words are modified. (from 2x16bit device
- * to 4x8bit device)
- * RPXLite board I tested has only 4 AM29LV800BB devices. Other devices
- * are not tested.
- *
- * (?) Does an RPXLite board which
- * does not use AM29LV800 flash memory exist ?
- * I don't know...
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size ( short manu, short dev_id, flash_info_t *info);
-static int write_word (flash_info_t *info, ulong dest, ulong data);
-static void flash_get_offsets (ulong base, flash_info_t *info, int two_chips);
-static void flash_get_id_word( void *ptr, short *ptr_manuf, short *ptr_dev_id);
-static void flash_get_id_long( void *ptr, short *ptr_manuf, short *ptr_dev_id);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- unsigned long size_b0, size_b1;
- short manu, dev_id;
- int i;
-
- /* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* Do sizing to get full correct info */
-
- flash_get_id_word((void*)CFG_FLASH_BASE0,&manu,&dev_id);
-
- size_b0 = flash_get_size(manu, dev_id, &flash_info[0]);
-
- flash_get_offsets (CFG_FLASH_BASE0, &flash_info[0],0);
-
- memctl->memc_or0 = CFG_OR_TIMING_FLASH | (0 - size_b0);
-
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE0
- /* monitor protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+monitor_flash_len-1,
- &flash_info[0]);
-#endif
-
- flash_get_id_long((void*)CFG_FLASH_BASE1,&manu,&dev_id);
-
- size_b1 = 2 * flash_get_size(manu, dev_id, &flash_info[1]);
-
- flash_get_offsets(CFG_FLASH_BASE1, &flash_info[1],1);
-
- memctl->memc_or1 = CFG_OR_TIMING_FLASH | (0 - size_b1);
-
- flash_info[0].size = size_b0;
- flash_info[1].size = size_b1;
-
- return (size_b0+size_b1);
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_get_offsets (ulong base, flash_info_t *info, int two_chips)
-{
- int i, addr_shift;
- vu_short *addr = (vu_short*)base;
-
- addr[0x555] = 0x00AA ;
- addr[0xAAA] = 0x0055 ;
- addr[0x555] = 0x0090 ;
-
- addr_shift = (two_chips ? 2 : 1 );
-
- /* set up sector start address table */
- if (info->flash_id & FLASH_BTYPE) {
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + (0x00000000<<addr_shift);
- info->start[1] = base + (0x00002000<<addr_shift);
- info->start[2] = base + (0x00003000<<addr_shift);
- info->start[3] = base + (0x00004000<<addr_shift);
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] = base + ((i-3) * (0x00008000<<addr_shift)) ;
- }
- } else {
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- info->start[i--] = base + info->size - (0x00002000<<addr_shift);
- info->start[i--] = base + info->size - (0x00003000<<addr_shift);
- info->start[i--] = base + info->size - (0x00004000<<addr_shift);
- for (; i >= 0; i--) {
- info->start[i] = base + i * (0x00008000<<addr_shift);
- }
- }
-
- /* check for protected sectors */
- for (i = 0; i < info->sector_count; i++) {
- /* read sector protection at sector address, (A7 .. A0) = 0x02 */
- /* D0 = 1 if protected */
- addr = (vu_short *)(info->start[i]);
- info->protect[i] = addr[1<<addr_shift] & 1 ;
- }
-
- addr = (vu_short *)info->start[0];
- *addr = 0xF0F0; /* reset bank */
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD: printf ("AMD "); break;
- case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
- case FLASH_MAN_TOSH: printf ("TOSHIBA "); break;
- default: printf ("Unknown Vendor "); break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM400B: printf ("AM29LV400B (4 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM400T: printf ("AM29LV400T (4 Mbit, top boot sector)\n");
- break;
- case FLASH_AM800B: printf ("AM29LV800B (8 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM800T: printf ("AM29LV800T (8 Mbit, top boot sector)\n");
- break;
- case FLASH_AM160B: printf ("AM29LV160B (16 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM160T: printf ("AM29LV160T (16 Mbit, top boot sector)\n");
- break;
- case FLASH_AM320B: printf ("AM29LV320B (32 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM320T: printf ("AM29LV320T (32 Mbit, top boot sector)\n");
- break;
- default: printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " "
- );
- }
- printf ("\n");
-}
-
-/*-----------------------------------------------------------------------
- */
-
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-
-static void flash_get_id_word( void *ptr, short *ptr_manuf, short *ptr_dev_id)
-{
- vu_short *addr = (vu_short*)ptr;
-
- addr[0x555] = 0x00AA ;
- addr[0xAAA] = 0x0055 ;
- addr[0x555] = 0x0090 ;
-
- *ptr_manuf = addr[0];
- *ptr_dev_id = addr[1];
-
- addr[0] = 0xf0f0; /* return to normal */
-}
-
-static void flash_get_id_long( void *ptr, short *ptr_manuf, short *ptr_dev_id)
-{
- vu_short *addr = (vu_short*)ptr;
- vu_short *addr1, *addr2, *addr3;
-
- addr1 = (vu_short*) ( ((int)ptr) + (0x5555<<2) );
- addr2 = (vu_short*) ( ((int)ptr) + (0x2AAA<<2) );
- addr3 = (vu_short*) ( ((int)ptr) + (0x5555<<2) );
-
- *addr1 = 0xAAAA;
- *addr2 = 0x5555;
- *addr3 = 0x9090;
-
- *ptr_manuf = addr[0];
- *ptr_dev_id = addr[2];
-
- addr[0] = 0xf0f0; /* return to normal */
-}
-
-static ulong flash_get_size ( short manu, short dev_id, flash_info_t *info)
-{
- switch (manu) {
- case ((short)AMD_MANUFACT):
- info->flash_id = FLASH_MAN_AMD;
- break;
- case ((short)FUJ_MANUFACT):
- info->flash_id = FLASH_MAN_FUJ;
- break;
- case ((short)TOSH_MANUFACT):
- info->flash_id = FLASH_MAN_TOSH;
- break;
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- return (0); /* no or unknown flash */
- }
-
-
- switch (dev_id) {
- case ((short)TOSH_ID_FVT160):
- info->flash_id += FLASH_AM160T;
- info->sector_count = 35;
- info->size = 0x00200000;
- break; /* => 1 MB */
-
- case ((short)TOSH_ID_FVB160):
- info->flash_id += FLASH_AM160B;
- info->sector_count = 35;
- info->size = 0x00200000;
- break; /* => 1 MB */
-
- case ((short)AMD_ID_LV400T):
- info->flash_id += FLASH_AM400T;
- info->sector_count = 11;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case ((short)AMD_ID_LV400B):
- info->flash_id += FLASH_AM400B;
- info->sector_count = 11;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case ((short)AMD_ID_LV800T):
- info->flash_id += FLASH_AM800T;
- info->sector_count = 19;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case ((short)AMD_ID_LV800B):
- info->flash_id += FLASH_AM800B;
- info->sector_count = 19;
- info->size = 0x00400000; /*%%% Size doubled by yooth */
- break; /* => 4 MB */
-
- case ((short)AMD_ID_LV160T):
- info->flash_id += FLASH_AM160T;
- info->sector_count = 35;
- info->size = 0x00200000;
- break; /* => 4 MB */
-
- case ((short)AMD_ID_LV160B):
- info->flash_id += FLASH_AM160B;
- info->sector_count = 35;
- info->size = 0x00200000;
- break; /* => 4 MB */
- default:
- info->flash_id = FLASH_UNKNOWN;
- return (0); /* => no or unknown flash */
-
- }
-
- return(info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- vu_short *addr = (vu_short*)(info->start[0]);
- int flag, prot, sect, l_sect;
- ulong start, now, last;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- if ((info->flash_id == FLASH_UNKNOWN) ||
- (info->flash_id > FLASH_AMD_COMP)) {
- printf ("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- l_sect = -1;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[0x555] = (vu_short)0xAAAAAAAA;
- addr[0xAAA] = (vu_short)0x55555555;
- addr[0x555] = (vu_short)0x80808080;
- addr[0x555] = (vu_short)0xAAAAAAAA;
- addr[0xAAA] = (vu_short)0x55555555;
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr = (vu_short *)(info->start[sect]) ;
- addr[0] = (vu_short)0x30303030 ;
- l_sect = sect;
- }
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- /*
- * We wait for the last triggered sector
- */
- if (l_sect < 0)
- goto DONE;
-
- start = get_timer (0);
- last = start;
- addr = (vu_short *)(info->start[l_sect]);
- while ((addr[0] & 0x8080) != 0x8080) {
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- return 1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- }
-
-DONE:
- /* reset to read mode */
- addr = (vu_short *)info->start[0];
- addr[0] = (vu_short)0xF0F0F0F0; /* reset bank */
-
- printf (" done\n");
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int i, l, rc;
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
- for (; i<4 && cnt>0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = 0;
- for (i=0; i<4; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- return (write_word(info, wp, data));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word (flash_info_t *info, ulong dest, ulong data)
-{
- vu_short *addr = (vu_short *)(info->start[0]);
- vu_short sdata;
-
- ulong start;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*((vu_long *)dest) & data) != data) {
- return (2);
- }
-
- /* First write upper 16 bits */
- sdata = (short)(data>>16);
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[0x555] = 0xAAAA;
- addr[0xAAA] = 0x5555;
- addr[0x555] = 0xA0A0;
-
- *((vu_short *)dest) = sdata;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* data polling for D7 */
- start = get_timer (0);
- while ((*((vu_short *)dest) & 0x8080) != (sdata & 0x8080)) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- return (1);
- }
- }
-
- /* Now write lower 16 bits */
- sdata = (short)(data&0xffff);
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[0x555] = 0xAAAA;
- addr[0xAAA] = 0x5555;
- addr[0x555] = 0xA0A0;
-
- *((vu_short *)dest + 1) = sdata;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* data polling for D7 */
- start = get_timer (0);
- while ((*((vu_short *)dest + 1) & 0x8080) != (sdata & 0x8080)) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- return (1);
- }
- }
- return (0);
-}
-
-/*-----------------------------------------------------------------------
- */
diff --git a/board/v37/u-boot.lds b/board/v37/u-boot.lds
deleted file mode 100644
index f9722dbb6b..0000000000
--- a/board/v37/u-boot.lds
+++ /dev/null
@@ -1,146 +0,0 @@
-/*
- * (C) Copyright 2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc8xx/start.o (.text)
- cpu/mpc8xx/traps.o (.text)
- common/dlmalloc.o (.text)
- lib_ppc/ppcstring.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
- lib_generic/zlib.o (.text)
- lib_ppc/cache.o (.text)
- lib_ppc/time.o (.text)
-
-/*
- . = env_offset;
-*/
- common/environment.o (.ppcenv)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/v37/v37.c b/board/v37/v37.c
deleted file mode 100644
index 1ef879d5f1..0000000000
--- a/board/v37/v37.c
+++ /dev/null
@@ -1,218 +0,0 @@
-/*
- * (C) Copyright 2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * Yoo. Jonghoon, IPone, yooth@ipone.co.kr
- * U-Boot port on RPXlite board
- *
- * DRAM related UPMA register values are modified.
- * See RPXLite engineering note : 50MHz/60ns - UPM RAM WORDS
- */
-
-#include <common.h>
-#include "mpc8xx.h"
-
-/* ------------------------------------------------------------------------- */
-
-static long int dram_size (void);
-
-/* ------------------------------------------------------------------------- */
-
-#define MBYTE (1024*1024)
-#define DRAM_DELAY 0x00000379 /* DRAM delay count */
-#define _NOT_USED_ 0xFFFFCC25
-
-const uint sdram_table[] =
-{
- /* single read. (offset 0 in upm RAM) */
- 0x1F07D004, 0xEEAEE004, 0x11ADD004, 0xEFBBA000,
- 0x1FF75447, 0x1FF77C34, 0xEFEABC34, 0x1FB57C35,
-
- /* burst read. (Offset 8 in upm RAM) */
- 0x1F07D004, 0xEEAEE004, 0x00ADC004, 0x00AFC000,
- 0x00AFC000, 0x01AFC000, 0x0FBB8000, 0x1FF75447,
- 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
- 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-
- /* single write. (Offset 0x18 in upm RAM) */
- 0x1F27D004, 0xEEAEA000, 0x01B90004, 0x1FF75447,
- 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-
- /* burst write. (Offset 0x20 in upm RAM) */
- 0x1F07D004, 0xEEAEA000, 0x00AD4000, 0x00AFC000,
- 0x00AFC000, 0x01BB8004, 0x1FF75447, 0xFFFFFFFF,
- 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
- 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-
- /* Refresh cycle, offset 0x30 */
- 0x1FF5DC84, 0xFFFFFC04, 0xFFFFFC04, 0xFFFFFC04,
- 0xFFFFFC84, 0xFFFFFC07, 0xFFFFFFFF, 0xFFFFFFFF,
- 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-
- /* Exception, 0ffset 0x3C */
- 0x7FFFFC07, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-};
-/* ------------------------------------------------------------------------- */
-
-
-/*
- * Check Board Identity:
- *
- * Return 1 for now.
- *
- */
-
-int checkboard (void)
-{
- printf("Marel V37\n") ;
- return (0) ;
-}
-
-/* ------------------------------------------------------------------------- */
-
-long int initdram (int board_type)
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- unsigned long temp;
- volatile int delay_cnt;
- long int ramsize;
-
- ramsize = dram_size();
-
- /* Refresh clock prescalar */
- memctl->memc_mptpr = 0x400 ;
-
- if( ramsize == 32*MBYTE )
- temp = 0xd0904110;
- else /* 16MB */
- temp = 0xd0802110;
-
- memctl->memc_mbmr = temp;
-
- upmconfig(UPMB, (uint *)sdram_table, sizeof(sdram_table)/sizeof(uint));
-
- /* Map controller banks 2 to the SDRAM bank */
- memctl->memc_or2 = 0xA00 | (0 - ramsize);
- memctl->memc_br2 = 0xC1;
-
- memctl->memc_mbmr = temp | 0x08;
- memctl->memc_mcr = 0x80804130;
-
- delay_cnt = 0;
- while( delay_cnt++ < DRAM_DELAY )
- ;
-
- /* Run MRS command in location 5-8 of UPMB */
-
- memctl->memc_mbmr = temp | 0x04;
- memctl->memc_mar = 0x88;
-
- memctl->memc_mcr = 0x80804105;
-
- delay_cnt = 0;
- while( delay_cnt++ < DRAM_DELAY )
- ;
-
-#ifdef CONFIG_CAN_DRIVER
- /* Initialize OR3 / BR3 */
- memctl->memc_or3 = CFG_OR3_CAN;
- memctl->memc_br3 = CFG_BR3_CAN;
-
- /* Initialize MBMR */
- memctl->memc_mamr = MAMR_GPL_A4DIS; /* GPL_A4 ouput line Disable */
-
- /* Initialize UPMB for CAN: single read */
- memctl->memc_mdr = 0xFFFFC004;
- memctl->memc_mcr = 0x0100 | UPMA;
-
- memctl->memc_mdr = 0x0FFFD004;
- memctl->memc_mcr = 0x0101 | UPMA;
-
- memctl->memc_mdr = 0x0FFFC000;
- memctl->memc_mcr = 0x0102 | UPMA;
-
- memctl->memc_mdr = 0x3FFFC004;
- memctl->memc_mcr = 0x0103 | UPMA;
-
- memctl->memc_mdr = 0xFFFFDC05;
- memctl->memc_mcr = 0x0104 | UPMA;
-
- /* Initialize UPMB for CAN: single write */
- memctl->memc_mdr = 0xFFFCC004;
- memctl->memc_mcr = 0x0118 | UPMA;
-
- memctl->memc_mdr = 0xCFFCD004;
- memctl->memc_mcr = 0x0119 | UPMA;
-
- memctl->memc_mdr = 0x0FFCC000;
- memctl->memc_mcr = 0x011A | UPMA;
-
- memctl->memc_mdr = 0x7FFCC004;
- memctl->memc_mcr = 0x011B | UPMA;
-
- memctl->memc_mdr = 0xFFFDCC05;
- memctl->memc_mcr = 0x011C | UPMA;
-#endif /* CONFIG_CAN_DRIVER */
-
- return (dram_size());
-}
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Find size of RAM from configuration pins.
- * The input pins that contain the memory size are also the debug port
- * pins. Normally they are configured as debug port pins. To be able
- * to read the memory configuration, we must deactivate the debug port
- * and enable the pcmcia input pins. Then return the register to
- * previous state.
- */
-
-static long int dram_size ()
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile sysconf8xx_t *siu = &immap->im_siu_conf;
- volatile pcmconf8xx_t *pcm = &immap->im_pcmcia;
- long int i, memory=1;
- unsigned long siu_mcr;
-
- siu_mcr = siu->sc_siumcr;
- siu->sc_siumcr = siu_mcr & 0xFF9FFFFF;
- for(i=0; i<10; i++) i = i;
-
- memory = (pcm->pcmc_pipr>>12) & 0x3;
-
- siu->sc_siumcr = siu_mcr;
-
- switch( memory )
- {
- case 1:
- return( 32*MBYTE );
- case 2:
- return( 64*MBYTE );
- default:
- break;
- }
- return( 16*MBYTE );
-}
diff --git a/board/versatile/Makefile b/board/versatile/Makefile
deleted file mode 100644
index fbdc627e38..0000000000
--- a/board/versatile/Makefile
+++ /dev/null
@@ -1,47 +0,0 @@
-#
-# (C) Copyright 2000-2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := versatile.o flash.o
-SOBJS := lowlevel_init.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $^
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/versatile/config.mk b/board/versatile/config.mk
deleted file mode 100644
index 25b79b3e79..0000000000
--- a/board/versatile/config.mk
+++ /dev/null
@@ -1,5 +0,0 @@
-#
-# image should be loaded at 0x01000000
-#
-
-TEXT_BASE = 0x01000000
diff --git a/board/versatile/flash.c b/board/versatile/flash.c
deleted file mode 100644
index 71533719f7..0000000000
--- a/board/versatile/flash.c
+++ /dev/null
@@ -1,514 +0,0 @@
-/*
- * (C) Copyright 2001
- * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
- *
- * (C) Copyright 2001-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2003
- * Texas Instruments, <www.ti.com>
- * Kshitij Gupta <Kshitij@ti.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <linux/byteorder/swab.h>
-
-#define PHYS_FLASH_SECT_SIZE 0x00020000 /* 256 KB sectors (x2) */
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/* Board support for 1 or 2 flash devices */
-#define FLASH_PORT_WIDTH32
-#undef FLASH_PORT_WIDTH16
-
-#ifdef FLASH_PORT_WIDTH16
-#define FLASH_PORT_WIDTH ushort
-#define FLASH_PORT_WIDTHV vu_short
-#define SWAP(x) __swab16(x)
-#else
-#define FLASH_PORT_WIDTH ulong
-#define FLASH_PORT_WIDTHV vu_long
-#define SWAP(x) __swab32(x)
-#endif
-
-#define FPW FLASH_PORT_WIDTH
-#define FPWV FLASH_PORT_WIDTHV
-
-#define mb() __asm__ __volatile__ ("" : : : "memory")
-
-
-/* Flash Organization Structure */
-typedef struct OrgDef {
- unsigned int sector_number;
- unsigned int sector_size;
-} OrgDef;
-
-
-/* Flash Organizations */
-OrgDef OrgIntel_28F256K3[] = {
- {256, 128 * 1024}, /* 256 * 128kBytes sectors */
-};
-
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-unsigned long flash_init (void);
-static ulong flash_get_size (FPW * addr, flash_info_t * info);
-static int write_data (flash_info_t * info, ulong dest, FPW data);
-static void flash_get_offsets (ulong base, flash_info_t * info);
-void inline spin_wheel (void);
-void flash_print_info (flash_info_t * info);
-void flash_unprotect_sectors (FPWV * addr);
-int flash_erase (flash_info_t * info, int s_first, int s_last);
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt);
-
-/*-----------------------------------------------------------------------
- */
-
-static void flash_vpp(int on)
-{
- unsigned int tmp;
-
- tmp = *(unsigned int *)(VERSATILE_FLASHCTRL);
-
- if (on)
- tmp |= VERSATILE_FLASHPROG_FLVPPEN;
- else
- tmp &= ~VERSATILE_FLASHPROG_FLVPPEN;
-
- *(unsigned int *)(VERSATILE_FLASHCTRL) = tmp;
-}
-
-unsigned long flash_init (void)
-{
- int i;
- ulong size = 0;
- for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
- switch (i) {
- case 0:
- flash_vpp(1);
- flash_get_size ((FPW *) PHYS_FLASH_1, &flash_info[i]);
- flash_get_offsets (PHYS_FLASH_1, &flash_info[i]);
- flash_vpp(0);
- break;
- default:
- panic ("configured too many flash banks!\n");
- break;
- }
- size += flash_info[i].size;
- }
-
- /* Protect monitor and environment sectors
- */
- flash_protect (FLAG_PROTECT_SET,
- CFG_FLASH_BASE,
- CFG_FLASH_BASE + monitor_flash_len - 1, &flash_info[0]);
-
- return size;
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_get_offsets (ulong base, flash_info_t * info)
-{
- int i;
- OrgDef *pOrgDef;
-
- pOrgDef = OrgIntel_28F256K3;
- if (info->flash_id == FLASH_UNKNOWN) {
- return;
- }
-
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
- for (i = 0; i < info->sector_count; i++) {
- if (i > 255) {
- info->start[i] = base + (i * 0x8000);
- info->protect[i] = 0;
- } else {
- info->start[i] = base +
- (i * PHYS_FLASH_SECT_SIZE);
- info->protect[i] = 0;
- }
- }
- }
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t * info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_INTEL:
- printf ("INTEL ");
- break;
- default:
- printf ("Unknown Vendor ");
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_28F256L18T:
- printf ("FLASH 28F256L18T\n");
- break;
- case FLASH_28F256K3:
- printf ("FLASH 28F256K3\n");
- break;
- default:
- printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i], info->protect[i] ? " (RO)" : " ");
- }
- printf ("\n");
- return;
-}
-
-/*
- * The following code cannot be run from FLASH!
- */
-static ulong flash_get_size (FPW * addr, flash_info_t * info)
-{
- volatile FPW value;
-
- /* Write auto select command: read Manufacturer ID */
- addr[0x5555] = (FPW) 0x00AA00AA;
- addr[0x2AAA] = (FPW) 0x00550055;
- addr[0x5555] = (FPW) 0x00900090;
-
- mb ();
- value = addr[0];
- switch (value) {
-
- case (FPW) INTEL_MANUFACT:
- info->flash_id = FLASH_MAN_INTEL;
- break;
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
- return (0); /* no or unknown flash */
- }
-
- mb ();
- value = addr[1]; /* device ID */
- switch (value) {
-
- case (FPW) (INTEL_ID_28F256L18T):
- info->flash_id += FLASH_28F256L18T;
- info->sector_count = 259;
- info->size = 0x02000000;
- break; /* => 32 MB */
-
- case (FPW)(INTEL_ID_28F256K3):
- info->flash_id += FLASH_28F256K3;
- info->sector_count = 256;
- info->size = 0x02000000;
- break;
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- break;
- }
-
- if (info->sector_count > CFG_MAX_FLASH_SECT) {
- printf ("** ERROR: sector count %d > max (%d) **\n",
- info->sector_count, CFG_MAX_FLASH_SECT);
- info->sector_count = CFG_MAX_FLASH_SECT;
- }
-
- addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
-
- return (info->size);
-}
-
-
-/* unprotects a sector for write and erase
- * on some intel parts, this unprotects the entire chip, but it
- * wont hurt to call this additional times per sector...
- */
-void flash_unprotect_sectors (FPWV * addr)
-{
-#define PD_FINTEL_WSMS_READY_MASK 0x0080
-
- *addr = (FPW) 0x00500050; /* clear status register */
-
- /* this sends the clear lock bit command */
- *addr = (FPW) 0x00600060;
- *addr = (FPW) 0x00D000D0;
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t * info, int s_first, int s_last)
-{
- int flag, prot, sect;
- ulong type, start, last;
- int rcode = 0;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- type = (info->flash_id & FLASH_VENDMASK);
- if ((type != FLASH_MAN_INTEL)) {
- printf ("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- return 1;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- flash_vpp(1);
-
- start = get_timer (0);
- last = start;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- FPWV *addr = (FPWV *) (info->start[sect]);
- FPW status;
-
- printf ("Erasing sector %2d ... ", sect);
-
- flash_unprotect_sectors (addr);
-
- /* arm simple, non interrupt dependent timer */
- reset_timer_masked ();
-
- *addr = (FPW) 0x00500050;/* clear status register */
- *addr = (FPW) 0x00200020;/* erase setup */
- *addr = (FPW) 0x00D000D0;/* erase confirm */
-
- while (((status =
- *addr) & (FPW) 0x00800080) !=
- (FPW) 0x00800080) {
- if (get_timer_masked () >
- CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- /* suspend erase */
- *addr = (FPW) 0x00B000B0;
- /* reset to read mode */
- *addr = (FPW) 0x00FF00FF;
- rcode = 1;
- break;
- }
- }
-
- /* clear status register cmd. */
- *addr = (FPW) 0x00500050;
- *addr = (FPW) 0x00FF00FF;/* resest to read mode */
- printf (" done\n");
- }
- }
-
- flash_vpp(0);
-
- return rcode;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- * 4 - Flash not identified
- */
-
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- ulong cp, wp;
- FPW data;
- int count, i, l, rc, port_width;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- return 4;
- }
-/* get lower word aligned address */
-#ifdef FLASH_PORT_WIDTH16
- wp = (addr & ~1);
- port_width = 2;
-#else
- wp = (addr & ~3);
- port_width = 4;
-#endif
-
- flash_vpp(1);
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i = 0, cp = wp; i < l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
- for (; i < port_width && cnt > 0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt == 0 && i < port_width; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
-
- if ((rc = write_data (info, wp, SWAP (data))) != 0) {
- flash_vpp(0);
- return (rc);
- }
- wp += port_width;
- }
-
- /*
- * handle word aligned part
- */
- count = 0;
- while (cnt >= port_width) {
- data = 0;
- for (i = 0; i < port_width; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_data (info, wp, SWAP (data))) != 0) {
- flash_vpp(0);
- return (rc);
- }
- wp += port_width;
- cnt -= port_width;
- if (count++ > 0x800) {
- spin_wheel ();
- count = 0;
- }
- }
-
- if (cnt == 0) {
- flash_vpp(0);
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i < port_width; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
-
- rc = write_data (info, wp, SWAP (data));
-
- flash_vpp(0);
-
- return rc;
-}
-
-/*-----------------------------------------------------------------------
- * Write a word or halfword to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_data (flash_info_t * info, ulong dest, FPW data)
-{
- FPWV *addr = (FPWV *) dest;
- ulong status;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*addr & data) != data) {
- printf ("not erased at %08lx (%x)\n", (ulong) addr, *addr);
- return (2);
- }
-
- flash_vpp(1);
-
- flash_unprotect_sectors (addr);
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
- *addr = (FPW) 0x00400040; /* write setup */
- *addr = data;
-
- /* arm simple, non interrupt dependent timer */
- reset_timer_masked ();
-
- /* wait while polling the status register */
- while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
- if (get_timer_masked () > CFG_FLASH_WRITE_TOUT) {
- *addr = (FPW) 0x00FF00FF; /* restore read mode */
- flash_vpp(0);
- return (1);
- }
- }
- *addr = (FPW) 0x00FF00FF; /* restore read mode */
- flash_vpp(0);
- return (0);
-}
-
-void inline spin_wheel (void)
-{
- static int p = 0;
- static char w[] = "\\/-";
-
- printf ("\010%c", w[p]);
- (++p == 3) ? (p = 0) : 0;
-}
diff --git a/board/versatile/lowlevel_init.S b/board/versatile/lowlevel_init.S
deleted file mode 100644
index bdfce2d3c1..0000000000
--- a/board/versatile/lowlevel_init.S
+++ /dev/null
@@ -1,34 +0,0 @@
-/*
- * Board specific setup info
- *
- * (C) Copyright 2003, ARM Ltd.
- * Philippe Robin, <philippe.robin@arm.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <config.h>
-#include <version.h>
-
-/* Set up the platform, once the cpu has been initialized */
-.globl lowlevel_init
-lowlevel_init:
-
- /* All done by Versatile's boot monitor! */
- mov pc, lr
diff --git a/board/versatile/split_by_variant.sh b/board/versatile/split_by_variant.sh
deleted file mode 100755
index 35c663e6a5..0000000000
--- a/board/versatile/split_by_variant.sh
+++ /dev/null
@@ -1,40 +0,0 @@
-#!/bin/sh
-# ---------------------------------------------------------
-# Set the core module defines according to Core Module
-# ---------------------------------------------------------
-# ---------------------------------------------------------
-# Set up the Versatile type define
-# ---------------------------------------------------------
-variant=PB926EJ-S
-if [ "$1" == "" ]
-then
- echo "$0:: No parameters - using versatilepb_config"
- echo "#define CONFIG_ARCH_VERSATILE_PB" > ./include/config.h
- variant=PB926EJ-S
-else
- case "$1" in
- versatilepb_config | \
- versatile_config)
- echo "#define CONFIG_ARCH_VERSATILE_PB" > ./include/config.h
- ;;
-
- versatileab_config)
- echo "#define CONFIG_ARCH_VERSATILE_AB" > ./include/config.h
- variant=AB926EJ-S
- ;;
-
-
- *)
- echo "$0:: Unrecognised config - using versatilepb_config"
- echo "#define CONFIG_ARCH_VERSATILE_PB" > ./include/config.h
- variant=PB926EJ-S
- ;;
-
- esac
-
-fi
-# ---------------------------------------------------------
-# Complete the configuration
-# ---------------------------------------------------------
-./mkconfig -a versatile arm arm926ejs versatile
-echo "Variant:: $variant"
diff --git a/board/versatile/u-boot.lds b/board/versatile/u-boot.lds
deleted file mode 100644
index cb6ee188b1..0000000000
--- a/board/versatile/u-boot.lds
+++ /dev/null
@@ -1,51 +0,0 @@
-/*
- * (C) Copyright 2002
- * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-ENTRY(_start)
-SECTIONS
-{
- . = 0x00000000;
- . = ALIGN(4);
- .text :
- {
- cpu/arm926ejs/start.o (.text)
- *(.text)
- }
- .rodata : { *(.rodata) }
- . = ALIGN(4);
- .data : { *(.data) }
- . = ALIGN(4);
- .got : { *(.got) }
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = ALIGN(4);
- __bss_start = .;
- .bss : { *(.bss) }
- _end = .;
-}
diff --git a/board/versatile/versatile.c b/board/versatile/versatile.c
deleted file mode 100644
index 0274027096..0000000000
--- a/board/versatile/versatile.c
+++ /dev/null
@@ -1,121 +0,0 @@
-/*
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * (C) Copyright 2002
- * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
- *
- * (C) Copyright 2003
- * Texas Instruments, <www.ti.com>
- * Kshitij Gupta <Kshitij@ti.com>
- *
- * (C) Copyright 2004
- * ARM Ltd.
- * Philippe Robin, <philippe.robin@arm.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-
-void flash__init (void);
-void ether__init (void);
-void peripheral_power_enable (void);
-
-#if defined(CONFIG_SHOW_BOOT_PROGRESS)
-void show_boot_progress(int progress)
-{
- printf("Boot reached stage %d\n", progress);
-}
-#endif
-
-#define COMP_MODE_ENABLE ((unsigned int)0x0000EAEF)
-
-static inline void delay (unsigned long loops)
-{
- __asm__ volatile ("1:\n"
- "subs %0, %1, #1\n"
- "bne 1b":"=r" (loops):"0" (loops));
-}
-
-/*
- * Miscellaneous platform dependent initialisations
- */
-
-int board_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
-
- /*
- * set clock frequency:
- * VERSATILE_REFCLK is 32KHz
- * VERSATILE_TIMCLK is 1MHz
- */
- *(volatile unsigned int *)(VERSATILE_SCTL_BASE) |=
- ((VERSATILE_TIMCLK << VERSATILE_TIMER1_EnSel) | (VERSATILE_TIMCLK << VERSATILE_TIMER2_EnSel) |
- (VERSATILE_TIMCLK << VERSATILE_TIMER3_EnSel) | (VERSATILE_TIMCLK << VERSATILE_TIMER4_EnSel));
-
- /* arch number of Versatile Board */
- gd->bd->bi_arch_number = MACH_TYPE_VERSATILE_PB;
-
- /* adress of boot parameters */
- gd->bd->bi_boot_params = 0x00000100;
-
- gd->flags = 0;
-
- icache_enable ();
-
- flash__init ();
- ether__init ();
- return 0;
-}
-
-
-int misc_init_r (void)
-{
- setenv("verify", "n");
- return (0);
-}
-
-/******************************
- Routine:
- Description:
-******************************/
-void flash__init (void)
-{
-}
-/*************************************************************
- Routine:ether__init
- Description: take the Ethernet controller out of reset and wait
- for the EEPROM load to complete.
-*************************************************************/
-void ether__init (void)
-{
-}
-
-/******************************
- Routine:
- Description:
-******************************/
-int dram_init (void)
-{
- return 0;
-}
diff --git a/board/voiceblue/Makefile b/board/voiceblue/Makefile
deleted file mode 100644
index 6302fa854a..0000000000
--- a/board/voiceblue/Makefile
+++ /dev/null
@@ -1,66 +0,0 @@
-# (C) Copyright 2000-2002
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de
-#
-# (C) Copyright 2005
-# Ladislav Michl, 2N Telekomunikace, michl@2n.cz
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License version 2 as
-# published by the Free Software Foundation.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := voiceblue.o
-SOBJS := setup.o
-
-gcclibdir := $(shell dirname `$(CC) -print-libgcc-file-name`)
-
-LOAD_ADDR = 0x10400000
-LDSCRIPT = $(TOPDIR)/board/$(BOARDDIR)/eeprom.lds
-
-all: $(LIB) eeprom.srec eeprom.bin
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS) $(SOBJS)
-
-eeprom.srec: eeprom.o eeprom_start.o
- $(LD) -T $(LDSCRIPT) -g -Ttext $(LOAD_ADDR) \
- -o $(<:.o=) -e $(<:.o=) $^ \
- -L../../examples -lstubs \
- -L../../lib_generic -lgeneric \
- -L$(gcclibdir) -lgcc
- $(OBJCOPY) -O srec $(<:.o=) $@
-
-eeprom.bin: eeprom.srec
- $(OBJCOPY) -I srec -O binary $< $@ 2>/dev/null
-
-clean:
- rm -f $(SOBJS) $(OBJS) eeprom eeprom.srec eeprom.bin
-
-distclean: clean
- rm -f $(LIB) core config.tmp *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/voiceblue/config.mk b/board/voiceblue/config.mk
deleted file mode 100644
index c73cd27bf1..0000000000
--- a/board/voiceblue/config.mk
+++ /dev/null
@@ -1,16 +0,0 @@
-#
-# Linux-Kernel is expected to be at 1000'8000,
-# entry 1000'8000 (mem base + reserved)
-#
-
-sinclude $(TOPDIR)/board/$(BOARDDIR)/config.tmp
-
-ifeq ($(VOICEBLUE_SMALL_FLASH),y)
-# We load ourself to internal SRAM at 2001'2000
-# Check map file when changing TEXT_BASE.
-# Everything has fit into 192kB internal SRAM!
-TEXT_BASE = 0x20012000
-else
-# Running in SDRAM...
-TEXT_BASE = 0x13000000
-endif
diff --git a/board/voiceblue/eeprom.c b/board/voiceblue/eeprom.c
deleted file mode 100644
index 0ad1b666b9..0000000000
--- a/board/voiceblue/eeprom.c
+++ /dev/null
@@ -1,211 +0,0 @@
-/*
- * (C) Copyright 2005
- * Ladislav Michl, 2N Telekomunikace, michl@2n.cz
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- * Some code shamelessly stolen back from Robin Getz.
- */
-
-#define DEBUG
-
-#include <common.h>
-#include <exports.h>
-#include "../drivers/smc91111.h"
-
-#define SMC_BASE_ADDRESS CONFIG_SMC91111_BASE
-
-static u16 read_eeprom_reg(u16 reg)
-{
- int timeout;
-
- SMC_SELECT_BANK(2);
- SMC_outw(reg, PTR_REG);
-
- SMC_SELECT_BANK(1);
- SMC_outw(SMC_inw (CTL_REG) | CTL_EEPROM_SELECT | CTL_RELOAD,
- CTL_REG);
- timeout = 100;
- while((SMC_inw (CTL_REG) & CTL_RELOAD) && --timeout)
- udelay(100);
- if (timeout == 0) {
- printf("Timeout Reading EEPROM register %02x\n", reg);
- return 0;
- }
-
- return SMC_inw (GP_REG);
-}
-
-static int write_eeprom_reg(u16 value, u16 reg)
-{
- int timeout;
-
- SMC_SELECT_BANK(2);
- SMC_outw(reg, PTR_REG);
-
- SMC_SELECT_BANK(1);
- SMC_outw(value, GP_REG);
- SMC_outw(SMC_inw (CTL_REG) | CTL_EEPROM_SELECT | CTL_STORE, CTL_REG);
- timeout = 100;
- while ((SMC_inw(CTL_REG) & CTL_STORE) && --timeout)
- udelay (100);
- if (timeout == 0) {
- printf("Timeout Writing EEPROM register %02x\n", reg);
- return 0;
- }
-
- return 1;
-}
-
-static int write_data(u16 *buf, int len)
-{
- u16 reg = 0x23;
-
- while (len--)
- write_eeprom_reg(*buf++, reg++);
-
- return 0;
-}
-
-static int verify_macaddr(char *s)
-{
- u16 reg;
- int i, err = 0;
-
- printf("MAC Address: ");
- err = i = 0;
- for (i = 0; i < 3; i++) {
- reg = read_eeprom_reg(0x20 + i);
- printf("%02x:%02x%c", reg & 0xff, reg >> 8, i != 2 ? ':' : '\n');
- if (s)
- err |= reg != ((u16 *)s)[i];
- }
-
- return err ? 0 : 1;
-}
-
-static int set_mac(char *s)
-{
- int i;
- char *e, eaddr[6];
-
- /* turn string into mac value */
- for (i = 0; i < 6; i++) {
- eaddr[i] = simple_strtoul(s, &e, 16);
- s = (*e) ? e+1 : e;
- }
-
- for (i = 0; i < 3; i++)
- write_eeprom_reg(*(((u16 *)eaddr) + i), 0x20 + i);
-
- return 0;
-}
-
-static int parse_element(char *s, unsigned char *buf, int len)
-{
- int cnt;
- char *p, num[3];
- unsigned char id;
-
- id = simple_strtoul(s, &p, 16);
- if (*p++ != ':')
- return -1;
- cnt = 2;
- num[2] = 0;
- for (; *p; p += 2) {
- if (p[1] == 0)
- return -2;
- if (cnt + 3 > len)
- return -3;
- num[0] = p[0];
- num[1] = p[1];
- buf[cnt++] = simple_strtoul(num, NULL, 16);
- }
- buf[0] = id;
- buf[1] = cnt - 2;
-
- return cnt;
-}
-
-int eeprom(int argc, char *argv[])
-{
- int i, len, ret;
- unsigned char buf[58], *p;
-
- app_startup(argv);
- if (get_version() != XF_VERSION) {
- printf("Wrong XF_VERSION.\n");
- printf("Application expects ABI version %d\n", XF_VERSION);
- printf("Actual U-Boot ABI version %d\n", (int)get_version());
- return 1;
- }
-
- if ((SMC_inw (BANK_SELECT) & 0xFF00) != 0x3300) {
- printf("SMSC91111 not found.\n");
- return 2;
- }
-
- /* Called without parameters - print MAC address */
- if (argc < 2) {
- verify_macaddr(NULL);
- return 0;
- }
-
- /* Print help message */
- if (argv[1][1] == 'h') {
- printf("VoiceBlue EEPROM writer\n");
- printf("Built: %s at %s\n", __DATE__ , __TIME__ );
- printf("Usage:\n\t<mac_address> [<element_1>] [<...>]\n");
- return 0;
- }
-
- /* Try to parse information elements */
- len = sizeof(buf);
- p = buf;
- for (i = 2; i < argc; i++) {
- ret = parse_element(argv[i], p, len);
- switch (ret) {
- case -1:
- printf("Element %d: malformed\n", i - 1);
- return 3;
- case -2:
- printf("Element %d: odd character count\n", i - 1);
- return 3;
- case -3:
- printf("Out of EEPROM memory\n");
- return 3;
- default:
- p += ret;
- len -= ret;
- }
- }
-
- /* First argument (MAC) is mandatory */
- set_mac(argv[1]);
- if (verify_macaddr(argv[1])) {
- printf("*** MAC address does not match! ***\n");
- return 4;
- }
-
- while (len--)
- *p++ = 0;
-
- write_data((u16 *)buf, sizeof(buf) >> 1);
-
- return 0;
-}
diff --git a/board/voiceblue/eeprom.lds b/board/voiceblue/eeprom.lds
deleted file mode 100644
index 317550dbad..0000000000
--- a/board/voiceblue/eeprom.lds
+++ /dev/null
@@ -1,51 +0,0 @@
-/*
- * (C) Copyright 2002
- * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
- * (C) Copyright 2005
- * Ladislav Michl, 2N Telekomunikace, <michl@2n.cz>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-ENTRY(_start)
-SECTIONS
-{
- . = ALIGN(4);
- .text :
- {
- eeprom_start.o (.text)
- *(.text)
- }
-
- . = ALIGN(4);
- .rodata : { *(.rodata) }
-
- . = ALIGN(4);
- .data : { *(.data) }
-
- . = ALIGN(4);
- .got : { *(.got) }
-
- . = ALIGN(4);
- __bss_start = .;
- .bss : { *(.bss) }
- _end = .;
-}
diff --git a/board/voiceblue/eeprom_start.S b/board/voiceblue/eeprom_start.S
deleted file mode 100644
index 8f88de5c3b..0000000000
--- a/board/voiceblue/eeprom_start.S
+++ /dev/null
@@ -1,11 +0,0 @@
-/*
- * Copyright (c) 2005 2N Telekomunikace
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * version 2 as published by the Free Software Foundation.
- *
- */
-
-.globl _start
-_start: b eeprom
diff --git a/board/voiceblue/setup.S b/board/voiceblue/setup.S
deleted file mode 100644
index dcf37b5dce..0000000000
--- a/board/voiceblue/setup.S
+++ /dev/null
@@ -1,280 +0,0 @@
-/*
- * Board specific setup info
- *
- * (C) Copyright 2004 Ales Jindra <jindra@2n.cz>
- * (C) Copyright 2005 Ladislav Michl <michl@2n.cz>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * version 2 published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <config.h>
-#include <version.h>
-
-_TEXT_BASE:
- .word TEXT_BASE /* SDRAM load addr from config.mk */
-
-OMAP5910_LPG1_BASE: .word 0xfffbd000
-OMAP5910_TIPB_SWITCHES_BASE: .word 0xfffbc800
-OMAP5910_MPU_TC_BASE: .word 0xfffecc00
-OMAP5910_MPU_CLKM_BASE: .word 0xfffece00
-OMAP5910_ULPD_PWR_MNG_BASE: .word 0xfffe0800
-OMAP5910_DPLL1_BASE: .word 0xfffecf00
-OMAP5910_GPIO_BASE: .word 0xfffce000
-OMAP5910_MPU_WD_TIMER_BASE: .word 0xfffec800
-OMAP5910_MPUI_BASE: .word 0xfffec900
-
-_OMAP5910_ARM_CKCTL: .word OMAP5910_ARM_CKCTL
-_OMAP5910_ARM_EN_CLK: .word OMAP5910_ARM_EN_CLK
-
-OMAP5910_MPUI_CTRL: .word 0x0000ff1b
-
-VAL_EMIFS_CS0_CONFIG: .word 0x00009090
-VAL_EMIFS_CS1_CONFIG: .word 0x00003031
-VAL_EMIFS_CS2_CONFIG: .word 0x00003031
-VAL_EMIFS_CS3_CONFIG: .word 0x0000c0c0
-VAL_EMIFS_DYN_WAIT: .word 0x00000000
-/* autorefresh counter 0x246 ((64000000/13.4)-400)/8192) */
- /* SLRF SD_RET ARE SDRAM_TYPE ARCV SDRAM_FREQUENCY PWD CLK */
-VAL_EMIFF_SDRAM_CONFIG: .word ((0 << 0) | (0 << 1) | (3 << 2) | (0xd << 4) | (0x246 << 8) | (0 << 24) | (0 << 26) | (0 << 27))
-VAL_EMIFF_SDRAM_CONFIG2: .word 0x00000003
-VAL_EMIFF_MRS: .word 0x00000037
-
-/*
- * GPIO04 - D4 (Onboard LED)
- * GPIO07 - LAN91C111 reset
- */
-GPIO_DIRECTION:
- .word 0x0000ff6f
-/*
- * Disable everything, but D4 LED (connected through invertor)
- */
-GPIO_OUTPUT:
- .word 0x00000010
-
-MUX_CONFIG_BASE:
- .word 0xfffe1000
-
-MUX_CONFIG_VALUES:
- .align 4
- .word 0x00000000 @ FUNC_MUX_CTRL_0
- .word 0x00000000 @ FUNC_MUX_CTRL_1
- .word 0x00000000 @ FUNC_MUX_CTRL_2
- .word 0x00000000 @ FUNC_MUX_CTRL_3
- .word 0x00000000 @ FUNC_MUX_CTRL_4
- .word 0x12082480 @ FUNC_MUX_CTRL_5
- .word 0x00000004 @ FUNC_MUX_CTRL_6
- .word 0x00000003 @ FUNC_MUX_CTRL_7
- .word 0x10001200 @ FUNC_MUX_CTRL_8
- .word 0x01201012 @ FUNC_MUX_CTRL_9
- .word 0x02081248 @ FUNC_MUX_CTRL_A
- .word 0x00001248 @ FUNC_MUX_CTRL_B
- .word 0x12240000 @ FUNC_MUX_CTRL_C
- .word 0x00002000 @ FUNC_MUX_CTRL_D
- .word 0x00000000 @ PULL_DWN_CTRL_0
- .word 0x0000085f @ PULL_DWN_CTRL_1
- .word 0x01001000 @ PULL_DWN_CTRL_2
- .word 0x00000000 @ PULL_DWN_CTRL_3
- .word 0x00000000 @ GATE_INH_CTRL_0
- .word 0x00000000 @ VOLTAGE_CTRL_0
- .word 0x00000000 @ TEST_DBG_CTRL_0
- .word 0x00000006 @ MOD_CONF_CTRL_0
- .word 0x0000eaef @ COMP_MODE_CTRL_0
-
-MUX_CONFIG_OFFSETS:
- .align 1
- .byte 0x00 @ FUNC_MUX_CTRL_0
- .byte 0x04 @ FUNC_MUX_CTRL_1
- .byte 0x08 @ FUNC_MUX_CTRL_2
- .byte 0x10 @ FUNC_MUX_CTRL_3
- .byte 0x14 @ FUNC_MUX_CTRL_4
- .byte 0x18 @ FUNC_MUX_CTRL_5
- .byte 0x1c @ FUNC_MUX_CTRL_6
- .byte 0x20 @ FUNC_MUX_CTRL_7
- .byte 0x24 @ FUNC_MUX_CTRL_8
- .byte 0x28 @ FUNC_MUX_CTRL_9
- .byte 0x2c @ FUNC_MUX_CTRL_A
- .byte 0x30 @ FUNC_MUX_CTRL_B
- .byte 0x34 @ FUNC_MUX_CTRL_C
- .byte 0x38 @ FUNC_MUX_CTRL_D
- .byte 0x40 @ PULL_DWN_CTRL_0
- .byte 0x44 @ PULL_DWN_CTRL_1
- .byte 0x48 @ PULL_DWN_CTRL_2
- .byte 0x4c @ PULL_DWN_CTRL_3
- .byte 0x50 @ GATE_INH_CTRL_0
- .byte 0x60 @ VOLTAGE_CTRL_0
- .byte 0x70 @ TEST_DBG_CTRL_0
- .byte 0x80 @ MOD_CONF_CTRL_0
- .byte 0x0c @ COMP_MODE_CTRL_0
- .byte 0xff
-
-.globl lowlevel_init
-lowlevel_init:
- /* Improve performance a bit... */
- mrc p15, 0, r1, c0, c0, 0 @ read C15 ID register
- mrc p15, 0, r1, c0, c0, 1 @ read C15 Cache information register
- mrc p15, 0, r1, c1, c0, 0 @ read C15 Control register
- orr r1, r1, #0x1000 @ enable I-cache, map interrupt vector 0xffff0000
- mcr p15, 0, r1, c1, c0, 0 @ write C15 Control register
- mov r1, #0x00
- mcr p15, 0, r1, c7, c5, 0 @ Flush I-cache
- nop
- nop
- nop
- nop
-
- /* Setup clocking mode */
- ldr r0, OMAP5910_MPU_CLKM_BASE @ prepare base of CLOCK unit
- ldrh r1, [r0, #0x18] @ get reset status
- bic r1, r1, #(7 << 11) @ clear clock select
- orr r1, r1, #(2 << 11) @ set synchronous scalable
- mov r2, #0 @ set wait counter to 100 clock cycles
-
-icache_loop:
- cmp r2, #0x01
- streqh r1, [r0, #0x18]
- add r2, r2, #0x01
- cmp r2, #0x10
- bne icache_loop
- nop
-
- /* Setup clock divisors */
- ldr r0, OMAP5910_MPU_CLKM_BASE @ base of CLOCK unit
- ldr r1, _OMAP5910_ARM_CKCTL
- orr r1, r1, #0x2000 @ enable DSP clock
- strh r1, [r0, #0x00] @ setup clock divisors
-
- /* Setup DPLL to generate requested freq */
- ldr r0, OMAP5910_DPLL1_BASE @ base of DPLL1 register
- mov r1, #0x0010 @ set PLL_ENABLE
- orr r1, r1, #0x2000 @ set IOB to new locking
- orr r1, r1, #(OMAP5910_DPLL_MUL << 7) @ setup multiplier CLKREF
- orr r1, r1, #(OMAP5910_DPLL_DIV << 5) @ setup divider CLKREF
- strh r1, [r0] @ write
-
-locking:
- ldrh r1, [r0] @ get DPLL value
- tst r1, #0x01
- beq locking @ while LOCK not set
-
- /* Enable clock */
- ldr r0, OMAP5910_MPU_CLKM_BASE @ base of CLOCK unit
- mov r1, #(1 << 10) @ disable idle mode do not check
- @ nWAKEUP pin, other remain active
- strh r1, [r0, #0x04]
- ldr r1, _OMAP5910_ARM_EN_CLK
- strh r1, [r0, #0x08]
- mov r1, #0x003f @ FLASH.RP not enabled in idle and
- @ max delayed ( 32 x CLKIN )
- strh r1, [r0, #0x0c]
-
- /* Configure 5910 pins functions to match our board. */
- ldr r0, MUX_CONFIG_BASE
- adr r1, MUX_CONFIG_VALUES
- adr r2, MUX_CONFIG_OFFSETS
-next_mux_cfg:
- ldrb r3, [r2], #1
- ldr r4, [r1], #4
- cmp r3, #0xff
- strne r4, [r0, r3]
- bne next_mux_cfg
-
- /* Configure GPIO pins (also enables onboard LED) */
- ldr r0, OMAP5910_GPIO_BASE
- ldr r1, GPIO_OUTPUT
- strh r1, [r0, #0x04]
- ldr r1, GPIO_DIRECTION
- strh r1, [r0, #0x08]
-
- /* EnablePeripherals */
- ldr r0, OMAP5910_MPU_CLKM_BASE @ CLOCK unit
- mov r1, #0x0001 @ Peripheral enable
- strh r1, [r0, #0x14]
-
- /* Program LED Pulse Generator */
- ldr r0, OMAP5910_LPG1_BASE @ 1st LED Pulse Generator
- mov r1, #0x7F @ Set obscure frequency in
- strb r1, [r0, #0x00] @ LCR
- mov r1, #0x01 @ Enable clock (CLK_EN) in
- strb r1, [r0, #0x04] @ PMR
-
- /* TIPB Lock UART1 */
- ldr r0, OMAP5910_TIPB_SWITCHES_BASE @ prepare base of TIPB switches
- mov r1, #1 @ ARM allocated
- strh r1, [r0,#0x04] @ clear IRQ line and status bits
- strh r1, [r0,#0x00]
- ldrh r1, [r0,#0x04]
-
- /* Disable watchdog */
- ldr r0, OMAP5910_MPU_WD_TIMER_BASE
- mov r1, #0xf5
- strh r1, [r0, #0x8]
- mov r1, #0xa0
- strh r1, [r0, #0x8]
-
- /* Enable MCLK */
- ldr r0, OMAP5910_ULPD_PWR_MNG_BASE
- mov r1, #0x6
- strh r1, [r0, #0x34]
- strh r1, [r0, #0x34]
-
- /* Setup clock divisors */
- ldr r0, OMAP5910_ULPD_PWR_MNG_BASE @ base of ULDPL DPLL1 register
-
- mov r1, #0x0010 @ set PLL_ENABLE
- orr r1, r1, #0x2000 @ set IOB to new locking
- strh r1, [r0] @ write
-
-ulocking:
- ldrh r1, [r0] @ get DPLL value
- tst r1, #1
- beq ulocking @ while LOCK not set
-
- /* EMIF init */
- ldr r0, OMAP5910_MPU_TC_BASE
- ldrh r1, [r0, #0x0c] @ EMIFS_CONFIG_REG
- bic r1, r1, #0x0c @ pwr down disabled, flash WP
- orr r1, r1, #0x01
- str r1, [r0, #0x0c]
-
- ldr r1, VAL_EMIFS_CS0_CONFIG
- str r1, [r0, #0x10] @ EMIFS_CS0_CONFIG
- ldr r1, VAL_EMIFS_CS1_CONFIG
- str r1, [r0, #0x14] @ EMIFS_CS1_CONFIG
- ldr r1, VAL_EMIFS_CS2_CONFIG
- str r1, [r0, #0x18] @ EMIFS_CS2_CONFIG
- ldr r1, VAL_EMIFS_CS3_CONFIG
- str r1, [r0, #0x1c] @ EMIFS_CS3_CONFIG
- ldr r1, VAL_EMIFS_DYN_WAIT
- str r1, [r0, #0x40] @ EMIFS_CFG_DYN_WAIT
-
- /* Setup SDRAM */
- ldr r1, VAL_EMIFF_SDRAM_CONFIG
- str r1, [r0, #0x20] @ EMIFF_SDRAM_CONFIG
- ldr r1, VAL_EMIFF_SDRAM_CONFIG2
- str r1, [r0, #0x3c] @ EMIFF_SDRAM_CONFIG2
- ldr r1, VAL_EMIFF_MRS
- str r1, [r0, #0x24] @ EMIFF_MRS
- /* SDRAM needs 100us to stabilize */
- mov r0, #0x4000
-sdelay:
- subs r0, r0, #0x1
- bne sdelay
-
- /* back to arch calling code */
- mov pc, lr
-.end
diff --git a/board/voiceblue/u-boot.lds b/board/voiceblue/u-boot.lds
deleted file mode 100644
index f35a3ab024..0000000000
--- a/board/voiceblue/u-boot.lds
+++ /dev/null
@@ -1,56 +0,0 @@
-/*
- * (C) Copyright 2002
- * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-ENTRY(_start)
-SECTIONS
-{
- . = 0x00000000;
-
- . = ALIGN(4);
- .text :
- {
- cpu/arm925t/start.o (.text)
- *(.text)
- }
-
- . = ALIGN(4);
- .rodata : { *(.rodata) }
-
- . = ALIGN(4);
- .data : { *(.data) }
-
- . = ALIGN(4);
- .got : { *(.got) }
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = ALIGN(4);
- __bss_start = .;
- .bss : { *(.bss) }
- _end = .;
-}
diff --git a/board/voiceblue/voiceblue.c b/board/voiceblue/voiceblue.c
deleted file mode 100644
index 7a2d243ef8..0000000000
--- a/board/voiceblue/voiceblue.c
+++ /dev/null
@@ -1,71 +0,0 @@
-/*
- * (C) Copyright 2005 2N TELEKOMUNIKACE, Ladislav Michl
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-
-int board_init(void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- *((volatile unsigned char *) VOICEBLUE_LED_REG) = 0xaa;
-
- /* arch number of VoiceBlue board */
- /* TODO: use define from asm/mach-types.h */
- gd->bd->bi_arch_number = 218;
-
- /* adress of boot parameters */
- gd->bd->bi_boot_params = 0x10000100;
-
- return 0;
-}
-
-int dram_init(void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- *((volatile unsigned short *) VOICEBLUE_LED_REG) = 0xff;
-
- /* Take the Ethernet controller out of reset and wait
- * for the EEPROM load to complete. */
- *((volatile unsigned short *) GPIO_DATA_OUTPUT_REG) |= 0x80;
- udelay(10); /* doesn't work before interrupt_init call */
- *((volatile unsigned short *) GPIO_DATA_OUTPUT_REG) &= ~0x80;
- udelay(500);
-
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
-
- return 0;
-}
-
-int misc_init_r(void)
-{
- *((volatile unsigned short *) VOICEBLUE_LED_REG) = 0x55;
-
- return 0;
-}
-
-int board_late_init(void)
-{
- *((volatile unsigned char *) VOICEBLUE_LED_REG) = 0x00;
-
- return 0;
-}
diff --git a/board/w7o/Makefile b/board/w7o/Makefile
deleted file mode 100644
index d008f896cd..0000000000
--- a/board/w7o/Makefile
+++ /dev/null
@@ -1,48 +0,0 @@
-#
-# (C) Copyright 2001
-# Erik Theisen, Wave 7 Optics, etheisen@mindspring.com.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o fpga.o fsboot.o post2.o vpd.o cmd_vpd.o \
- watchdog.o
-SOBJS = init.o post1.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $^
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/w7o/cmd_vpd.c b/board/w7o/cmd_vpd.c
deleted file mode 100644
index 449089e4e6..0000000000
--- a/board/w7o/cmd_vpd.c
+++ /dev/null
@@ -1,66 +0,0 @@
-/*
- * (C) Copyright 2001
- * Erik Theisen, Wave 7 Optics, etheisen@mindspring.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <command.h>
-
-#if (CONFIG_COMMANDS & CFG_CMD_BSP)
-
-#include "vpd.h"
-
-/* ======================================================================
- * Interpreter command to retrieve board specific Vital Product Data, "VPD"
- * ======================================================================
- */
-int do_vpd (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
-{
- VPD vpd; /* Board specific data struct */
- uchar dev_addr = CFG_DEF_EEPROM_ADDR;
-
- /* Validate usage */
- if (argc > 2) {
- printf ("Usage:\n%s\n", cmdtp->usage);
- return 1;
- }
-
- /* Passed in EEPROM address */
- if (argc == 2)
- dev_addr = (uchar) simple_strtoul (argv[1], NULL, 16);
-
- /* Read VPD and output it */
- if (!vpd_get_data (dev_addr, &vpd)) {
- vpd_print (&vpd);
- return 0;
- }
-
- return 1;
-}
-
-U_BOOT_CMD(
- vpd, 2, 1, do_vpd,
- "vpd - Read Vital Product Data\n",
- "[dev_addr]\n"
- " - Read VPD Data from default address, or device address 'dev_addr'.\n"
-);
-
-#endif /* (CONFIG_COMMANDS & CFG_CMD_BSP) */
diff --git a/board/w7o/config.mk b/board/w7o/config.mk
deleted file mode 100644
index bc341ca755..0000000000
--- a/board/w7o/config.mk
+++ /dev/null
@@ -1,31 +0,0 @@
-#
-# (C) Copyright 2001
-# Erik Theisen, Wave 7 Optics, etheisen@mindspring.com.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# Wave 7 Optics boards
-#
-
-#TEXT_BASE = 0xFFF80000
-TEXT_BASE = 0xFFFC0000
-
-#PLATFORM_CPPFLAGS += -I$(TOPDIR)/board/$(BOARD)
diff --git a/board/w7o/errors.h b/board/w7o/errors.h
deleted file mode 100644
index 05b4eae457..0000000000
--- a/board/w7o/errors.h
+++ /dev/null
@@ -1,97 +0,0 @@
-/*
- * (C) Copyright 2001
- * Bill Hunter, Wave 7 Optics, william.hunter@mediaone.net
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-#ifndef _ERRORS_H_
-#define _ERRORS_H_
-
-#define ERR_FF -1 /* led test value(2) */
-#define ERR_00 0x0000 /* led test value(2) */
-#define ERR_LED 0x01 /* led test failed (1)(3)(4) */
-#define ERR_RAMG 0x04 /* start SDRAM data bus test (2) */
-#define ERR_RAML 0x05 /* SDRAM data bus fault in LSW chip (5) */
-#define ERR_RAMH 0x06 /* SDRAM data bus fault in MSW chip (6) */
-#define ERR_RAMB 0x07 /* SDRAM data bus fault both chips (5)(6)(7) */
-#define ERR_ADDG 0x08 /* start Address ghosting test (13) */
-#define ERR_ADDF 0x09 /* fault during Address ghosting test (13) */
-#define ERR_POST1 0x0a /* post1 tests complete */
-#define ERR_TMP1 0x0b /* */
-#define ERR_R55G 0x0c /* start SDRAM fill 55 test (2) */
-#define ERR_R55L 0x0d /* SDRAM fill test 55 failed in LSW chip (8) */
-#define ERR_R55H 0x0e /* SDRAM fill test 55 failed in MSW chip (9) */
-#define ERR_R55B 0x0f /* SDRAM fill test 55 fail in both chips (10) */
-#define ERR_RAAG 0x10 /* start SDRAM fill aa test (2) */
-#define ERR_RAAL 0x11 /* SDRAM fill test aa failed in LSW chip (8) */
-#define ERR_RAAH 0x12 /* SDRAM fill test aa failed in MSW chip (9) */
-#define ERR_RAAB 0x13 /* SDRAM fill test aa fail in both chips (10) */
-#define ERR_R00G 0x14 /* start SDRAM fill 00 test (2) */
-#define ERR_R00L 0x15 /* SDRAM fill test 00 failed in LSW chip (8) */
-#define ERR_R00H 0x16 /* SDRAM fill test 00 failed in MSW chip (9) */
-#define ERR_R00B 0x17 /* SDRAM fill test 00 fail in both chips (10) */
-#define ERR_RTCG 0x18 /* start RTC test */
-#define ERR_RTCBAT 0x19 /* RTC battery failure */
-#define ERR_RTCTIM 0x1A /* RTC invalid time/date values */
-#define ERR_RTCVAL 0x1B /* RTC NVRAM not accessable */
-#define ERR_FPGAG 0x20 /* fault during FPGA programming */
-#define ERR_XRW1 0x21 /* Xilinx - can't read/write regs on FPGA 1 */
-#define ERR_XRW2 0x22 /* Xilinx - can't read/write regs on FPGA 2 */
-#define ERR_XRW3 0x23 /* Xilinx - can't read/write regs on FPGA 3 */
-#define ERR_XRW4 0x24 /* Xilinx - can't read/write regs on FPGA 4 */
-#define ERR_XRW5 0x25 /* Xilinx - can't read/write regs on FPGA 5 */
-#define ERR_XRW6 0x26 /* Xilinx - can't read/write regs on FPGA 6 */
-#define ERR_XINIT0 0x27 /* Xilinx - INIT line failed to go low */
-#define ERR_XINIT1 0x28 /* Xilinx - INIT line failed to go high */
-#define ERR_XDONE1 0x29 /* Xilinx - DONE line failed to go high */
-#define ERR_XIMAGE 0x2A /* Xilinx - Bad FPGA image in Flash */
-#define ERR_TempG 0x2b /* start temp sensor tests */
-#define ERR_Tinit0 0x2C /* temp sensor 0 failed to init */
-#define ERR_Tinit1 0x2D /* temp sensor 1 failed to init */
-#define ERR_Ttest0 0x2E /* temp sensor 0 failed test */
-#define ERR_Ttest1 0x2F /* temp sensor 1 failed test */
-#define ERR_lm75r 0x30 /* temp sensor read failure */
-#define ERR_lm75w 0x31 /* temp sensor write failure */
-
-
-#define ERR_POSTOK 0x55 /* PANIC: psych... OK */
-
-#if !defined(__ASSEMBLY__)
-extern void log_stat(int errcode);
-extern void log_warn(int errcode);
-extern void log_err(int errcode);
-#endif
-
-/*
-Debugging suggestions:
-(1) periferal data bus shorted or crossed
-(2) general processor halt, check reset, watch dog, power supply ripple, processor clock.
-(3) check p_we, p_r/w, p_oe, p_rdy lines.
-(4) check LED buffers
-(5) check SDRAM data bus bits 16-31, check LSW SDRAM chip.
-(6) check SDRAM data bus bits 0-15, check MSW SDRAM chip.
-(7) check SDRAM control lines and clocks
-(8) check decoupling caps, replace LSW SDRAM
-(9) check decoupling caps, replace MSW SDRAM
-(10)
-(11)
-(12)
-(13) SDRAM address shorted or unconnected, check sdram caps
-*/
-#endif /* _ERRORS_H_ */
diff --git a/board/w7o/flash.c b/board/w7o/flash.c
deleted file mode 100644
index 32815fb63e..0000000000
--- a/board/w7o/flash.c
+++ /dev/null
@@ -1,940 +0,0 @@
-/*
- * (C) Copyright 2001
- * Erik Theisen, Wave 7 Optics, etheisen@mindspring.com.
- * Based on code by:
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <ppc4xx.h>
-#include <asm/processor.h>
-
-#include <watchdog.h>
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (vu_long *addr, flash_info_t *info);
-static int write_word8(flash_info_t *info, ulong dest, ulong data);
-static int write_word32 (flash_info_t *info, ulong dest, ulong data);
-static void flash_get_offsets (ulong base, flash_info_t *info);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- int i;
- unsigned long size_b0, base_b0;
- unsigned long size_b1, base_b1;
-
- /* Init: no FLASHes known */
- for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* Get Size of Boot and Main Flashes */
- size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size_b0, size_b0<<20);
- return 0;
- }
- size_b1 = flash_get_size((vu_long *)FLASH_BASE1_PRELIM, &flash_info[1]);
- if (flash_info[1].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank 1 - Size = 0x%08lx = %ld MB\n",
- size_b1, size_b1<<20);
- return 0;
- }
-
- /* Calculate base addresses */
- base_b0 = -size_b0;
- base_b1 = -size_b1;
-
- /* Setup offsets for Boot Flash */
- flash_get_offsets (base_b0, &flash_info[0]);
-
- /* Protect board level data */
- (void)flash_protect(FLAG_PROTECT_SET,
- base_b0,
- flash_info[0].start[1] - 1,
- &flash_info[0]);
-
-
- /* Monitor protection ON by default */
- (void)flash_protect(FLAG_PROTECT_SET,
- base_b0 + size_b0 - monitor_flash_len,
- base_b0 + size_b0 - 1,
- &flash_info[0]);
-
- /* Protect the FPGA image */
- (void)flash_protect(FLAG_PROTECT_SET,
- FLASH_BASE1_PRELIM,
- FLASH_BASE1_PRELIM + CFG_FPGA_IMAGE_LEN - 1,
- &flash_info[1]);
-
- /* Protect the default boot image */
- (void)flash_protect(FLAG_PROTECT_SET,
- FLASH_BASE1_PRELIM + CFG_FPGA_IMAGE_LEN,
- FLASH_BASE1_PRELIM + CFG_FPGA_IMAGE_LEN + 0x600000 - 1,
- &flash_info[1]);
-
- /* Setup offsets for Main Flash */
- flash_get_offsets (FLASH_BASE1_PRELIM, &flash_info[1]);
-
- return (size_b0 + size_b1);
-} /* end flash_init() */
-
-/*-----------------------------------------------------------------------
- */
-static void flash_get_offsets (ulong base, flash_info_t *info)
-{
- int i;
-
- /* set up sector start address table - FOR BOOT ROM ONLY!!! */
- if ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM040) {
- for (i = 0; i < info->sector_count; i++)
- info->start[i] = base + (i * 0x00010000);
- }
-} /* end flash_get_offsets() */
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t *info)
-{
- int i;
- int k;
- int size;
- int erased;
- volatile unsigned long *flash;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD: printf ("1 x AMD "); break;
- case FLASH_MAN_STM: printf ("1 x STM "); break;
- case FLASH_MAN_INTEL: printf ("2 x Intel "); break;
- default: printf ("Unknown Vendor ");
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM040:
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD)
- printf ("AM29LV040 (4096 Kbit, uniform sector size)\n");
- else if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_STM)
- printf ("M29W040B (4096 Kbit, uniform block size)\n");
- else
- printf ("UNKNOWN 29x040x (4096 Kbit, uniform sector size)\n");
- break;
- case FLASH_28F320J3A:
- printf ("28F320J3A (32 Mbit = 128K x 32)\n");
- break;
- case FLASH_28F640J3A:
- printf ("28F640J3A (64 Mbit = 128K x 64)\n");
- break;
- case FLASH_28F128J3A:
- printf ("28F128J3A (128 Mbit = 128K x 128)\n");
- break;
- default:
- printf ("Unknown Chip Type\n");
- }
-
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_STM) {
- printf (" Size: %ld KB in %d Blocks\n",
- info->size >> 10, info->sector_count);
- } else {
- printf (" Size: %ld KB in %d Sectors\n",
- info->size >> 10, info->sector_count);
- }
-
- printf (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
- /*
- * Check if whole sector is erased
- */
- if (i != (info->sector_count-1))
- size = info->start[i+1] - info->start[i];
- else
- size = info->start[0] + info->size - info->start[i];
- erased = 1;
- flash = (volatile unsigned long *)info->start[i];
- size = size >> 2; /* divide by 4 for longword access */
- for (k=0; k<size; k++)
- {
- if (*flash++ != 0xffffffff)
- {
- erased = 0;
- break;
- }
- }
-
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s%s",
- info->start[i],
- erased ? " E" : " ",
- info->protect[i] ? "RO " : " "
- );
- }
- printf ("\n");
-} /* end flash_print_info() */
-
-/*
- * The following code cannot be run from FLASH!
- */
-static ulong flash_get_size (vu_long *addr, flash_info_t *info)
-{
- short i;
- ulong base = (ulong)addr;
-
- /* Setup default type */
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count =0;
- info->size = 0;
-
- /* Test for Boot Flash */
- if (base == FLASH_BASE0_PRELIM) {
- unsigned char value;
- volatile unsigned char * addr2 = (unsigned char *)addr;
-
- /* Write auto select command: read Manufacturer ID */
- *(addr2 + 0x555) = 0xaa;
- *(addr2 + 0x2aa) = 0x55;
- *(addr2 + 0x555) = 0x90;
-
- /* Manufacture ID */
- value = *addr2;
- switch (value) {
- case (unsigned char)AMD_MANUFACT:
- info->flash_id = FLASH_MAN_AMD;
- break;
- case (unsigned char)STM_MANUFACT:
- info->flash_id = FLASH_MAN_STM;
- break;
- default:
- *addr2 = 0xf0; /* no or unknown flash */
- return 0;
- }
-
- /* Device ID */
- value = *(addr2 + 1);
- switch (value) {
- case (unsigned char)AMD_ID_LV040B:
- case (unsigned char)STM_ID_29W040B:
- info->flash_id += FLASH_AM040;
- info->sector_count = 8;
- info->size = 0x00080000;
- break; /* => 512Kb */
- default:
- *addr2 = 0xf0; /* => no or unknown flash */
- return 0;
- }
- }
- else { /* MAIN Flash */
- unsigned long value;
- volatile unsigned long * addr2 = (unsigned long *)addr;
-
- /* Write auto select command: read Manufacturer ID */
- *addr2 = 0x90909090;
-
- /* Manufacture ID */
- value = *addr2;
- switch (value) {
- case (unsigned long)INTEL_MANUFACT:
- info->flash_id = FLASH_MAN_INTEL;
- break;
- default:
- *addr2 = 0xff; /* no or unknown flash */
- return 0;
- }
-
- /* Device ID - This shit is interleaved... */
- value = *(addr2 + 1);
- switch (value) {
- case (unsigned long)INTEL_ID_28F320J3A:
- info->flash_id += FLASH_28F320J3A;
- info->sector_count = 32;
- info->size = 0x00400000 * 2;
- break; /* => 2 X 4 MB */
- case (unsigned long)INTEL_ID_28F640J3A:
- info->flash_id += FLASH_28F640J3A;
- info->sector_count = 64;
- info->size = 0x00800000 * 2;
- break; /* => 2 X 8 MB */
- case (unsigned long)INTEL_ID_28F128J3A:
- info->flash_id += FLASH_28F128J3A;
- info->sector_count = 128;
- info->size = 0x01000000 * 2;
- break; /* => 2 X 16 MB */
- default:
- *addr2 = 0xff; /* => no or unknown flash */
- }
- }
-
- /* Make sure we don't exceed CFG_MAX_FLASH_SECT */
- if (info->sector_count > CFG_MAX_FLASH_SECT) {
- printf ("** ERROR: sector count %d > max (%d) **\n",
- info->sector_count, CFG_MAX_FLASH_SECT);
- info->sector_count = CFG_MAX_FLASH_SECT;
- }
-
- /* set up sector start address table */
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM040:
- for (i = 0; i < info->sector_count; i++)
- info->start[i] = base + (i * 0x00010000);
- break;
- case FLASH_28F320J3A:
- case FLASH_28F640J3A:
- case FLASH_28F128J3A:
- for (i = 0; i < info->sector_count; i++)
- info->start[i] = base + (i * 0x00020000 * 2); /* 2 Banks */
- break;
- }
-
- /* Test for Boot Flash */
- if (base == FLASH_BASE0_PRELIM) {
- volatile unsigned char *addr2;
- /* check for protected sectors */
- for (i = 0; i < info->sector_count; i++) {
- /* read sector protection at sector address, (AX .. A0) = 0x02 */
- /* D0 = 1 if protected */
- addr2 = (volatile unsigned char *)(info->start[i]);
- info->protect[i] = *(addr2 + 2) & 1;
- }
-
- /* Restore read mode */
- *(unsigned char *)base = 0xF0; /* Reset NORMAL Flash */
- }
- else { /* Main Flash */
- volatile unsigned long *addr2;
- /* check for protected sectors */
- for (i = 0; i < info->sector_count; i++) {
- /* read sector protection at sector address, (AX .. A0) = 0x02 */
- /* D0 = 1 if protected */
- addr2 = (volatile unsigned long *)(info->start[i]);
- info->protect[i] = *(addr2 + 2) & 0x1;
- }
-
- /* Restore read mode */
- *(unsigned long *)base = 0xFFFFFFFF; /* Reset Flash */
- }
-
- return (info->size);
-} /* end flash_get_size() */
-
-/*-----------------------------------------------------------------------
- */
-
-static int wait_for_DQ7(ulong addr, uchar cmp_val, ulong tout)
-{
- int i;
-
- volatile uchar *vaddr = (uchar *)addr;
-
- /* Loop X times */
- for (i = 1; i <= (100 * tout); i++) { /* Wait up to tout ms */
- udelay(10);
- /* Pause 10 us */
-
- /* Check for completion */
- if ((vaddr[0] & 0x80) == (cmp_val & 0x80)) {
- return 0;
- }
-
- /* KEEP THE LUSER HAPPY - Print a dot every 1.1 seconds */
- if (!(i % 110000))
- putc('.');
-
- /* Kick the dog if needed */
- WATCHDOG_RESET();
- }
-
- return 1;
-} /* wait_for_DQ7() */
-
-/*-----------------------------------------------------------------------
- */
-
-static int flash_erase8(flash_info_t *info, int s_first, int s_last)
-{
- int tcode, rcode = 0;
- volatile uchar *addr = (uchar *)(info->start[0]);
- volatile uchar *sector_addr;
- int flag, prot, sect;
-
- /* Validate arguments */
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN)
- printf ("- missing\n");
- else
- printf ("- no sectors to erase\n");
- return 1;
- }
-
- /* Check for KNOWN flash type */
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("Can't erase unknown flash type - aborted\n");
- return 1;
- }
-
- /* Check for protected sectors */
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect])
- prot++;
- }
- if (prot)
- printf ("- Warning: %d protected sectors will not be erased!\n", prot);
- else
- printf ("\n");
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- sector_addr = (uchar *)(info->start[sect]);
-
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_STM)
- printf("Erasing block %p\n", sector_addr);
- else
- printf("Erasing sector %p\n", sector_addr);
-
- /* Disable interrupts which might cause Flash to timeout */
- flag = disable_interrupts();
-
- *(addr + 0x555) = (uchar)0xAA;
- *(addr + 0x2aa) = (uchar)0x55;
- *(addr + 0x555) = (uchar)0x80;
- *(addr + 0x555) = (uchar)0xAA;
- *(addr + 0x2aa) = (uchar)0x55;
- *sector_addr = (uchar)0x30; /* sector erase */
-
- /*
- * Wait for each sector to complete, it's more
- * reliable. According to AMD Spec, you must
- * issue all erase commands within a specified
- * timeout. This has been seen to fail, especially
- * if printf()s are included (for debug)!!
- * Takes up to 6 seconds.
- */
- tcode = wait_for_DQ7((ulong)sector_addr, 0x80, 6000);
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* Make sure we didn't timeout */
- if (tcode) {
- printf ("Timeout\n");
- rcode = 1;
- }
- }
- }
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- /* reset to read mode */
- addr = (uchar *)info->start[0];
- *addr = (uchar)0xF0; /* reset bank */
-
- printf (" done\n");
- return rcode;
-} /* end flash_erase8() */
-
-static int flash_erase32(flash_info_t *info, int s_first, int s_last)
-{
- int flag, sect;
- ulong start, now, last;
- int prot = 0;
-
- /* Validate arguments */
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN)
- printf ("- missing\n");
- else
- printf ("- no sectors to erase\n");
- return 1;
- }
-
- /* Check for KNOWN flash type */
- if ((info->flash_id & FLASH_VENDMASK) != FLASH_MAN_INTEL) {
- printf ("Can erase only Intel flash types - aborted\n");
- return 1;
- }
-
- /* Check for protected sectors */
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect])
- prot++;
- }
- if (prot)
- printf ("- Warning: %d protected sectors will not be erased!\n", prot);
- else
- printf ("\n");
-
- start = get_timer (0);
- last = start;
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect <= s_last; sect++) {
- WATCHDOG_RESET();
- if (info->protect[sect] == 0) { /* not protected */
- vu_long *addr = (vu_long *)(info->start[sect]);
- unsigned long status;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- *addr = 0x00500050; /* clear status register */
- *addr = 0x00200020; /* erase setup */
- *addr = 0x00D000D0; /* erase confirm */
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* Wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- while (((status = *addr) & 0x00800080) != 0x00800080) {
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- *addr = 0x00B000B0; /* suspend erase */
- *addr = 0x00FF00FF; /* reset to read mode */
- return 1;
- }
-
- /* show that we're waiting */
- if ((now - last) > 990) { /* every second */
- putc ('.');
- last = now;
- }
- }
- *addr = 0x00FF00FF; /* reset to read mode */
- }
- }
- printf (" done\n");
- return 0;
-} /* end flash_erase32() */
-
-int flash_erase(flash_info_t *info, int s_first, int s_last)
-{
- if ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM040)
- return flash_erase8(info, s_first, s_last);
- else
- return flash_erase32(info, s_first, s_last);
-} /* end flash_erase() */
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_buff8(flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- ulong start;
- int i, l, rc;
-
- start = get_timer (0);
-
- wp = (addr & ~3); /* get lower word
- aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
- for (; i<4 && cnt>0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- if ((rc = write_word8(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = 0;
- for (i=0; i<4; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_word8(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- cnt -= 4;
- if (get_timer(start) > 1000) { /* every second */
- WATCHDOG_RESET();
- putc ('.');
- start = get_timer(0);
- }
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- return (write_word8(info, wp, data));
-} /* end write_buff8() */
-
-#define FLASH_WIDTH 4 /* flash bus width in bytes */
-static int write_buff32 (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int i, l, rc;
- ulong start;
-
- start = get_timer (0);
-
- if (info->flash_id == FLASH_UNKNOWN) {
- return 4;
- }
-
- wp = (addr & ~(FLASH_WIDTH-1)); /* get lower FLASH_WIDTH aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
- for (; i<FLASH_WIDTH && cnt>0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<FLASH_WIDTH; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- if ((rc = write_word32(info, wp, data)) != 0) {
- return (rc);
- }
- wp += FLASH_WIDTH;
- }
-
- /*
- * handle FLASH_WIDTH aligned part
- */
- while (cnt >= FLASH_WIDTH) {
- data = 0;
- for (i=0; i<FLASH_WIDTH; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_word32(info, wp, data)) != 0) {
- return (rc);
- }
- wp += FLASH_WIDTH;
- cnt -= FLASH_WIDTH;
- if (get_timer(start) > 990) { /* every second */
- putc ('.');
- start = get_timer(0);
- }
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<FLASH_WIDTH && cnt>0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i<FLASH_WIDTH; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- return (write_word32(info, wp, data));
-} /* write_buff32() */
-
-int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- int retval;
-
- if ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM040)
- retval = write_buff8(info, src, addr, cnt);
- else
- retval = write_buff32(info, src, addr, cnt);
-
- return retval;
-} /* end write_buff() */
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-static int write_word8(flash_info_t *info, ulong dest, ulong data)
-{
- volatile uchar *addr2 = (uchar *)(info->start[0]);
- volatile uchar *dest2 = (uchar *)dest;
- volatile uchar *data2 = (uchar *)&data;
- int flag;
- int i, tcode, rcode = 0;
-
- /* Check if Flash is (sufficently) erased */
- if ((*((volatile uchar *)dest) &
- (uchar)data) != (uchar)data) {
- return (2);
- }
-
- for (i=0; i < (4 / sizeof(uchar)); i++) {
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- *(addr2 + 0x555) = (uchar)0xAA;
- *(addr2 + 0x2aa) = (uchar)0x55;
- *(addr2 + 0x555) = (uchar)0xA0;
-
- dest2[i] = data2[i];
-
- /* Wait for write to complete, up to 1ms */
- tcode = wait_for_DQ7((ulong)&dest2[i], data2[i], 1);
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* Make sure we didn't timeout */
- if (tcode) {
- rcode = 1;
- }
- }
-
- return rcode;
-} /* end write_word8() */
-
-static int write_word32(flash_info_t *info, ulong dest, ulong data)
-{
- vu_long *addr = (vu_long *)dest;
- ulong status;
- ulong start;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*addr & data) != data) {
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- *addr = 0x00400040; /* write setup */
- *addr = data;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- start = get_timer (0);
-
- while (((status = *addr) & 0x00800080) != 0x00800080) {
- WATCHDOG_RESET();
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- *addr = 0x00FF00FF; /* restore read mode */
- return (1);
- }
- }
-
- *addr = 0x00FF00FF; /* restore read mode */
-
- return (0);
-} /* end write_word32() */
-
-
-static int _flash_protect(flash_info_t *info, long sector)
-{
- int i;
- int flag;
- ulong status;
- int rcode = 0;
- volatile long *addr = (long *)sector;
-
- switch(info->flash_id & FLASH_TYPEMASK) {
- case FLASH_28F320J3A:
- case FLASH_28F640J3A:
- case FLASH_28F128J3A:
- /* Disable interrupts which might cause Flash to timeout */
- flag = disable_interrupts();
-
- /* Issue command */
- *addr = 0x00500050L; /* Clear the status register */
- *addr = 0x00600060L; /* Set lock bit setup */
- *addr = 0x00010001L; /* Set lock bit confirm */
-
- /* Wait for command completion */
- for (i = 0; i < 10; i++) { /* 75us timeout, wait 100us */
- udelay(10);
- if ((*addr & 0x00800080L) == 0x00800080L)
- break;
- }
-
- /* Not successful? */
- status = *addr;
- if (status != 0x00800080L) {
- printf("Protect %x sector failed: %x\n",
- (uint)sector, (uint)status);
- rcode = 1;
- }
-
- /* Restore read mode */
- *addr = 0x00ff00ffL;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- break;
- case FLASH_AM040: /* No soft sector protection */
- break;
- }
-
- /* Turn protection on for this sector */
- for (i = 0; i < info->sector_count; i++) {
- if (info->start[i] == sector) {
- info->protect[i] = 1;
- break;
- }
- }
-
- return rcode;
-} /* end _flash_protect() */
-
-static int _flash_unprotect(flash_info_t *info, long sector)
-{
- int i;
- int flag;
- ulong status;
- int rcode = 0;
- volatile long *addr = (long *)sector;
-
- switch(info->flash_id & FLASH_TYPEMASK) {
- case FLASH_28F320J3A:
- case FLASH_28F640J3A:
- case FLASH_28F128J3A:
- /* Disable interrupts which might cause Flash to timeout */
- flag = disable_interrupts();
-
- *addr = 0x00500050L; /* Clear the status register */
- *addr = 0x00600060L; /* Clear lock bit setup */
- *addr = 0x00D000D0L; /* Clear lock bit confirm */
-
- /* Wait for command completion */
- for (i = 0; i < 80 ; i++) { /* 700ms timeout, wait 800 */
- udelay(10000); /* Delay 10ms */
- if ((*addr & 0x00800080L) == 0x00800080L)
- break;
- }
-
- /* Not successful? */
- status = *addr;
- if (status != 0x00800080L) {
- printf("Un-protect %x sector failed: %x\n",
- (uint)sector, (uint)status);
- *addr = 0x00ff00ffL;
- rcode = 1;
- }
-
- /* restore read mode */
- *addr = 0x00ff00ffL;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- break;
- case FLASH_AM040: /* No soft sector protection */
- break;
- }
-
- /*
- * Fix Intel's little red wagon. Reprotect
- * sectors that were protected before we undid
- * protection on a specific sector.
- */
- for (i = 0; i < info->sector_count; i++) {
- if (info->start[i] != sector) {
- if (info->protect[i]) {
- if (_flash_protect(info, info->start[i]))
- rcode = 1;
- }
- }
- else /* Turn protection off for this sector */
- info->protect[i] = 0;
- }
-
- return rcode;
-} /* end _flash_unprotect() */
-
-
-int flash_real_protect(flash_info_t *info, long sector, int prot)
-{
- int rcode;
-
- if (prot)
- rcode = _flash_protect(info, info->start[sector]);
- else
- rcode = _flash_unprotect(info, info->start[sector]);
-
- return rcode;
-} /* end flash_real_protect() */
-
-/*-----------------------------------------------------------------------
- */
diff --git a/board/w7o/fpga.c b/board/w7o/fpga.c
deleted file mode 100644
index 100bce4722..0000000000
--- a/board/w7o/fpga.c
+++ /dev/null
@@ -1,379 +0,0 @@
-/*
- * (C) Copyright 2001
- * Erik Theisen, Wave 7 Optics, etheisen@mindspring.com
- * and
- * Bill Hunter, Wave 7 Optics, william.hunter@mediaone.net
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-#include <config.h>
-#include <common.h>
-#include "w7o.h"
-#include <asm/processor.h>
-#include "errors.h"
-
-static void
-fpga_img_write(unsigned long *src, unsigned long len, unsigned short *daddr)
-{
- unsigned long i;
- volatile unsigned long val;
- volatile unsigned short *dest = daddr; /* volatile-bypass optimizer */
-
- for (i = 0; i < len; i++, src++) {
- val = *src;
- *dest = (unsigned short)((val & 0xff000000L) >> 16);
- *dest = (unsigned short)((val & 0x00ff0000L) >> 8);
- *dest = (unsigned short)(val & 0x0000ff00L);
- *dest = (unsigned short)((val & 0x000000ffL) << 8);
- }
-
- /* Terminate programming with 4 C clocks */
- dest = daddr;
- val = *(unsigned short *)dest;
- val = *(unsigned short *)dest;
- val = *(unsigned short *)dest;
- val = *(unsigned short *)dest;
-
-}
-
-
-int
-fpgaDownload(unsigned char *saddr,
- unsigned long size,
- unsigned short *daddr)
-{
- int i; /* index, intr disable flag */
- int start; /* timer */
- unsigned long greg, grego; /* GPIO & output register */
- unsigned long length; /* image size in words */
- unsigned long *source; /* image source addr */
- unsigned short *dest; /* destination FPGA addr */
- volatile unsigned short *ndest; /* temp dest FPGA addr */
- volatile unsigned short val; /* temp val */
- unsigned long cnfg = GPIO_XCV_CNFG; /* FPGA CNFG */
- unsigned long eirq = GPIO_XCV_IRQ;
- int retval = -1; /* Function return value */
-
- /* Setup some basic values */
- length = (size / 4) + 1; /* size in words, rounding UP
- is OK */
- source = (unsigned long *)saddr;
- dest = (unsigned short *)daddr;
-
- /* Get DCR output register */
- grego = in32(PPC405GP_GPIO0_OR);
-
- /* Reset FPGA */
- grego &= ~GPIO_XCV_PROG; /* PROG line low */
- out32(PPC405GP_GPIO0_OR, grego);
-
- /* Setup timeout timer */
- start = get_timer(0);
-
- /* Wait for FPGA init line */
- while(in32(PPC405GP_GPIO0_IR) & GPIO_XCV_INIT) { /* Wait INIT line low */
- /* Check for timeout - 100us max, so use 3ms */
- if (get_timer(start) > 3) {
- printf(" failed to start init.\n");
- log_warn(ERR_XINIT0); /* Don't halt */
-
- /* Reset line stays low */
- goto done; /* I like gotos... */
- }
- }
-
- /* Unreset FPGA */
- grego |= GPIO_XCV_PROG; /* PROG line high */
- out32(PPC405GP_GPIO0_OR, grego);
-
- /* Wait for FPGA end of init period . */
- while(!(in32(PPC405GP_GPIO0_IR) & GPIO_XCV_INIT)) { /* Wait for INIT hi */
-
- /* Check for timeout */
- if (get_timer(start) > 3) {
- printf(" failed to exit init.\n");
- log_warn(ERR_XINIT1);
-
- /* Reset FPGA */
- grego &= ~GPIO_XCV_PROG; /* PROG line low */
- out32(PPC405GP_GPIO0_OR, grego);
-
- goto done;
- }
- }
-
- /* Now program FPGA ... */
- ndest = dest;
- for (i = 0; i < CONFIG_NUM_FPGAS; i++) {
- /* Toggle IRQ/GPIO */
- greg = mfdcr(CPC0_CR0); /* get chip ctrl register */
- greg |= eirq; /* toggle irq/gpio */
- mtdcr(CPC0_CR0, greg); /* ... just do it */
-
- /* turn on open drain for CNFG */
- greg = in32(PPC405GP_GPIO0_ODR); /* get open drain register */
- greg |= cnfg; /* CNFG open drain */
- out32(PPC405GP_GPIO0_ODR, greg); /* .. just do it */
-
- /* Turn output enable on for CNFG */
- greg = in32(PPC405GP_GPIO0_TCR); /* get tristate register */
- greg |= cnfg; /* CNFG tristate inactive */
- out32(PPC405GP_GPIO0_TCR, greg); /* ... just do it */
-
- /* Setup FPGA for programming */
- grego &= ~cnfg; /* CONFIG line low */
- out32(PPC405GP_GPIO0_OR, grego);
-
- /*
- * Program the FPGA
- */
- printf("\n destination: 0x%lx ", (unsigned long)ndest);
-
- fpga_img_write(source, length, (unsigned short *)ndest);
-
- /* Done programming */
- grego |= cnfg; /* CONFIG line high */
- out32(PPC405GP_GPIO0_OR, grego);
-
- /* Turn output enable OFF for CNFG */
- greg = in32(PPC405GP_GPIO0_TCR); /* get tristate register */
- greg &= ~cnfg; /* CNFG tristate inactive */
- out32(PPC405GP_GPIO0_TCR, greg); /* ... just do it */
-
- /* Toggle IRQ/GPIO */
- greg = mfdcr(CPC0_CR0); /* get chip ctrl register */
- greg &= ~eirq; /* toggle irq/gpio */
- mtdcr(CPC0_CR0, greg); /* ... just do it */
-
- ndest = (unsigned short *)((char *)ndest + 0x00100000L); /* XXX - Next FPGA addr */
- cnfg >>= 1; /* XXX - Next */
- eirq >>= 1;
- }
-
- /* Terminate programming with 4 C clocks */
- ndest = dest;
- for (i = 0; i < CONFIG_NUM_FPGAS; i++) {
- val = *ndest;
- val = *ndest;
- val = *ndest;
- val = *ndest;
- ndest = (unsigned short *)((char *)ndest + 0x00100000L);
- }
-
- /* Setup timer */
- start = get_timer(0);
-
- /* Wait for FPGA end of programming period . */
- while(!(in32(PPC405GP_GPIO0_IR) & GPIO_XCV_DONE)) { /* Test DONE low */
-
- /* Check for timeout */
- if (get_timer(start) > 3) {
- printf(" done failed to come high.\n");
- log_warn(ERR_XDONE1);
-
- /* Reset FPGA */
- grego &= ~GPIO_XCV_PROG; /* PROG line low */
- out32(PPC405GP_GPIO0_OR, grego);
-
- goto done;
- }
- }
-
- printf("\n FPGA load succeeded\n");
- retval = 0; /* Program OK */
-
-done:
- return retval;
-}
-
-/* FPGA image is stored in flash */
-extern flash_info_t flash_info[];
-
-int init_fpga(void)
-{
- unsigned int i,j,ptr; /* General purpose */
- unsigned char bufchar; /* General purpose character */
- unsigned char *buf; /* Start of image pointer */
- unsigned long len; /* Length of image */
- unsigned char *fn_buf; /* Start of filename string */
- unsigned int fn_len; /* Length of filename string */
- unsigned char *xcv_buf; /* Pointer to start of image */
- unsigned long xcv_len; /* Length of image */
- unsigned long crc; /* 30bit crc in image */
- unsigned long calc_crc; /* Calc'd 30bit crc */
- int retval = -1;
-
- /* Tell the world what we are doing */
- printf("FPGA: ");
-
- /*
- * Get address of first sector where the FPGA
- * image is stored.
- */
- buf = (unsigned char *)flash_info[1].start[0];
-
- /*
- * Get the stored image's CRC & length.
- */
- crc = *(unsigned long *)(buf+4); /* CRC is first long word */
- len = *(unsigned long *)(buf+8); /* Image len is next long */
-
- /* Pedantic */
- if ((len < 0x133A4) || (len > 0x80000))
- goto bad_image;
-
- /*
- * Get the file name pointer and length.
- */
- fn_len = (*(unsigned short *)(buf+12) & 0xff); /* filename length
- is next short */
- fn_buf = buf + 14;
-
- /*
- * Get the FPGA image pointer and length length.
- */
- xcv_buf = fn_buf + fn_len; /* pointer to fpga image */
- xcv_len = len - 14 - fn_len; /* fpga image length */
-
- /* Check for uninitialized FLASH */
- if ((strncmp((char *)buf, "w7o", 3)!=0) || (len > 0x0007ffffL) || (len == 0))
- goto bad_image;
-
- /*
- * Calculate and Check the image's CRC.
- */
- calc_crc = crc32(0, xcv_buf, xcv_len);
- if (crc != calc_crc) {
- printf("\nfailed - bad CRC\n");
- goto done;
- }
-
- /* Output the file name */
- printf("file name : ");
- for (i=0;i<fn_len;i++) {
- bufchar = fn_buf[+i];
- if (bufchar<' ' || bufchar>'~') bufchar = '.';
- putc(bufchar);
- }
-
- /*
- * find rest of display data
- */
- ptr = 15; /* Offset to ncd filename
- length in fpga image */
- j = xcv_buf[ptr]; /* Get len of ncd filename */
- if (j > 32) goto bad_image;
- ptr = ptr + j + 3; /* skip ncd filename string +
- 3 bytes more bytes */
-
- /*
- * output target device string
- */
- j = xcv_buf[ptr++] - 1; /* len of targ str less term */
- if (j > 32) goto bad_image;
- printf("\n target : ");
- for (i = 0; i < j; i++) {
- bufchar = (xcv_buf[ptr++]);
- if (bufchar<' ' || bufchar>'~') bufchar = '.';
- putc(bufchar);
- }
-
- /*
- * output compilation date string and time string
- */
- ptr += 3; /* skip 2 bytes */
- printf("\n synth time : ");
- j = (xcv_buf[ptr++] - 1); /* len of date str less term */
- if (j > 32) goto bad_image;
- for (i = 0; i < j; i++) {
- bufchar = (xcv_buf[ptr++]);
- if (bufchar<' ' || bufchar>'~') bufchar = '.';
- putc(bufchar);
- }
-
- ptr += 3; /* Skip 2 bytes */
- printf(" - ");
- j = (xcv_buf[ptr++] - 1); /* slen = targ dev str len */
- if (j > 32) goto bad_image;
- for (i = 0; i < j; i++) {
- bufchar = (xcv_buf[ptr++]);
- if (bufchar<' ' || bufchar>'~') bufchar = '.';
- putc(bufchar);
- }
-
- /*
- * output crc and length strings
- */
- printf("\n len & crc : 0x%lx 0x%lx", len, crc);
-
- /*
- * Program the FPGA.
- */
- retval = fpgaDownload((unsigned char*)xcv_buf, xcv_len,
- (unsigned short *)0xfd000000L);
- return retval;
-
-bad_image:
- printf("\n BAD FPGA image format @ %lx\n", flash_info[1].start[0]);
- log_warn(ERR_XIMAGE);
-done:
- return retval;
-}
-
-void test_fpga(unsigned short *daddr)
-{
- int i;
- volatile unsigned short *ndest = daddr;
-
- for (i = 0; i < CONFIG_NUM_FPGAS; i++) {
-#if defined(CONFIG_W7OLMG)
- ndest[0x7e] = 0x55aa;
- if (ndest[0x7e] != 0x55aa)
- log_warn(ERR_XRW1 + i);
- ndest[0x7e] = 0xaa55;
- if (ndest[0x7e] != 0xaa55)
- log_warn(ERR_XRW1 + i);
- ndest[0x7e] = 0xc318;
- if (ndest[0x7e] != 0xc318)
- log_warn(ERR_XRW1 + i);
-
-#elif defined(CONFIG_W7OLMC)
- ndest[0x800] = 0x55aa;
- ndest[0x801] = 0xaa55;
- ndest[0x802] = 0xc318;
- ndest[0x4800] = 0x55aa;
- ndest[0x4801] = 0xaa55;
- ndest[0x4802] = 0xc318;
- if ((ndest[0x800] != 0x55aa) ||
- (ndest[0x801] != 0xaa55) ||
- (ndest[0x802] != 0xc318))
- log_warn(ERR_XRW1 + (2 * i)); /* Auto gen error code */
- if ((ndest[0x4800] != 0x55aa) ||
- (ndest[0x4801] != 0xaa55) ||
- (ndest[0x4802] != 0xc318))
- log_warn(ERR_XRW2 + (2 * i)); /* Auto gen error code */
-
-#else
-# error "Unknown W7O board configuration"
-#endif
- }
-
- printf(" FPGA ready\n");
- return;
-}
diff --git a/board/w7o/fsboot.c b/board/w7o/fsboot.c
deleted file mode 100644
index 0ef9a61be6..0000000000
--- a/board/w7o/fsboot.c
+++ /dev/null
@@ -1,90 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wave 7 Optics, Inc.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <config.h>
-#include <command.h>
-
-/*
- * FIXME: Add code to test image and it's header.
- */
-extern int valid_elf_image (unsigned long addr);
-
-static int
-image_check(ulong addr)
-{
- return valid_elf_image(addr);
-}
-
-void
-init_fsboot(void)
-{
- char *envp;
- ulong loadaddr;
- ulong testaddr;
- ulong alt_loadaddr;
- char buf[9];
-
- /*
- * Get test image address
- */
- if ((envp = getenv("testaddr")) != NULL)
- testaddr = simple_strtoul(envp, NULL, 16);
- else
- testaddr = -1;
-
- /*
- * Are we going to test boot and image?
- */
- if ((testaddr != -1) && image_check(testaddr)) {
-
- /* Set alt_loadaddr */
- alt_loadaddr = testaddr;
- sprintf(buf, "%lX", alt_loadaddr);
- setenv("alt_loadaddr", buf);
-
- /* Clear test_addr */
- setenv("testaddr", NULL);
-
- /*
- * Save current environment with alt_loadaddr,
- * and cleared testaddr.
- */
- saveenv();
-
- /*
- * Setup temporary loadaddr to alt_loadaddr
- * XXX - DO NOT SAVE ENVIRONMENT!
- */
- loadaddr = alt_loadaddr;
- sprintf(buf, "%lX", loadaddr);
- setenv("loadaddr", buf);
-
- } else { /* Normal boot */
- setenv("alt_loadaddr", NULL); /* Clear alt_loadaddr */
- setenv("testaddr", NULL); /* Clear testaddr */
- saveenv();
- }
-
- return;
-}
diff --git a/board/w7o/init.S b/board/w7o/init.S
deleted file mode 100644
index 35d7dbceb4..0000000000
--- a/board/w7o/init.S
+++ /dev/null
@@ -1,264 +0,0 @@
-/******************************************************************************
- *
- * This source code has been made available to you by IBM on an AS-IS
- * basis. Anyone receiving this source is licensed under IBM
- * copyrights to use it in any way he or she deems fit, including
- * copying it, modifying it, compiling it, and redistributing it either
- * with or without modifications. No license under IBM patents or
- * patent applications is to be implied by the copyright license.
- *
- * Any user of this software should understand that IBM cannot provide
- * technical support for this software and will not be responsible for
- * any consequences resulting from the use of this software.
- *
- * Any person who transfers this source code or any derivative work
- * must include the IBM copyright notice, this paragraph, and the
- * preceding two paragraphs in the transferred software.
- *
- * COPYRIGHT I B M CORPORATION 1995
- * LICENSED MATERIAL - PROGRAM PROPERTY OF I B M
- *
- *****************************************************************************/
-#include <config.h>
-#include <ppc4xx.h>
-
-#define _LINUX_CONFIG_H 1 /* avoid reading Linux autoconf.h file */
-
-#include <ppc_asm.tmpl>
-#include <ppc_defs.h>
-
-#include <asm/cache.h>
-#include <asm/mmu.h>
-
-/******************************************************************************
- * Function: ext_bus_cntlr_init
- *
- * Description: Configures EBC Controller and a few basic chip selects.
- *
- * CS0 is setup to get the Boot Flash out of the addresss range
- * so that we may setup a stack. CS7 is setup so that we can
- * access and reset the hardware watchdog.
- *
- * IMPORTANT: For pass1 this code must run from
- * cache since you can not reliably change a peripheral banks
- * timing register (pbxap) while running code from that bank.
- * For ex., since we are running from ROM on bank 0, we can NOT
- * execute the code that modifies bank 0 timings from ROM, so
- * we run it from cache.
- *
- * Notes: Does NOT use the stack.
- *****************************************************************************/
- .section ".text"
- .align 2
- .globl ext_bus_cntlr_init
- .type ext_bus_cntlr_init, @function
-ext_bus_cntlr_init:
- mflr r0
- /********************************************************************
- * Prefetch entire ext_bus_cntrl_init function into the icache.
- * This is necessary because we are going to change the same CS we
- * are executing from. Otherwise a CPU lockup may occur.
- *******************************************************************/
- bl ..getAddr
-..getAddr:
- mflr r3 /* get address of ..getAddr */
-
- /* Calculate number of cache lines for this function */
- addi r4, 0, (((.Lfe0 - ..getAddr) / CFG_CACHELINE_SIZE) + 2)
- mtctr r4
-..ebcloop:
- icbt r0, r3 /* prefetch cache line for addr in r3*/
- addi r3, r3, CFG_CACHELINE_SIZE /* move to next cache line */
- bdnz ..ebcloop /* continue for $CTR cache lines */
-
- /********************************************************************
- * Delay to ensure all accesses to ROM are complete before changing
- * bank 0 timings. 200usec should be enough.
- * 200,000,000 (cycles/sec) X .000200 (sec) = 0x9C40 cycles.
- *******************************************************************/
- addis r3, 0, 0x0
- ori r3, r3, 0xA000 /* wait 200us from reset */
- mtctr r3
-..spinlp:
- bdnz ..spinlp /* spin loop */
-
- /********************************************************************
- * Setup External Bus Controller (EBC).
- *******************************************************************/
- addi r3, 0, epcr
- mtdcr ebccfga, r3
- addis r4, 0, 0xb040 /* Device base timeout = 1024 cycles */
- ori r4, r4, 0x0 /* Drive CS with external master */
- mtdcr ebccfgd, r4
-
- /********************************************************************
- * Change PCIINT signal to PerWE
- *******************************************************************/
- mfdcr r4, cntrl1
- ori r4, r4, 0x4000
- mtdcr cntrl1, r4
-
- /********************************************************************
- * Memory Bank 0 (Flash Bank 0) initialization
- *******************************************************************/
- addi r3, 0, pb0ap
- mtdcr ebccfga, r3
- addis r4, 0, CFG_W7O_EBC_PB0AP@h
- ori r4, r4, CFG_W7O_EBC_PB0AP@l
- mtdcr ebccfgd, r4
-
- addi r3, 0, pb0cr
- mtdcr ebccfga, r3
- addis r4, 0, CFG_W7O_EBC_PB0CR@h
- ori r4, r4, CFG_W7O_EBC_PB0CR@l
- mtdcr ebccfgd, r4
-
- /********************************************************************
- * Memory Bank 7 LEDs - NEEDED BECAUSE OF HW WATCHDOG AND LEDs.
- *******************************************************************/
- addi r3, 0, pb7ap
- mtdcr ebccfga, r3
- addis r4, 0, CFG_W7O_EBC_PB7AP@h
- ori r4, r4, CFG_W7O_EBC_PB7AP@l
- mtdcr ebccfgd, r4
-
- addi r3, 0, pb7cr
- mtdcr ebccfga, r3
- addis r4, 0, CFG_W7O_EBC_PB7CR@h
- ori r4, r4, CFG_W7O_EBC_PB7CR@l
- mtdcr ebccfgd, r4
-
- /* We are all done */
- mtlr r0 /* Restore link register */
- blr /* Return to calling function */
-.Lfe0: .size ext_bus_cntlr_init,.Lfe0-ext_bus_cntlr_init
-/* end ext_bus_cntlr_init() */
-
-/******************************************************************************
- * Function: sdram_init
- *
- * Description: Configures SDRAM memory banks.
- *
- * Serial Presence Detect, "SPD," reads the SDRAM EEPROM
- * via the IIC bus and then configures the SDRAM memory
- * banks appropriately. If Auto Memory Configuration is
- * is not used, it is assumed that a 4MB 11x8x2, non-ECC,
- * SDRAM is soldered down.
- *
- * Notes: Expects that the stack is already setup.
- *****************************************************************************/
- .section ".text"
- .align 2
- .globl sdram_init
- .type sdram_init, @function
-sdram_init:
- /* save the return info on stack */
- mflr r0 /* Get link register */
- stwu r1, -8(r1) /* Save back chain and move SP */
- stw r0, +12(r1) /* Save link register */
-
- /*
- * First call spd_sdram to try to init SDRAM according to the
- * contents of the SPD EEPROM. If the SPD EEPROM is blank or
- * erronious, spd_sdram returns 0 in R3.
- */
- li r3,0
- bl spd_sdram
- addic. r3, r3, 0 /* Check for error, save dram size */
- bne ..sdri_done /* If it worked, we're done... */
-
- /********************************************************************
- * If SPD detection fails, we'll default to 4MB, 11x8x2, as this
- * is the SMALLEST SDRAM size the 405 supports. We can do this
- * because W7O boards have soldered on RAM, and there will always
- * be some amount present. If we were using DIMMs, we should hang
- * the board instead, since it doesn't have any RAM to continue
- * running with.
- *******************************************************************/
-
- /*
- * Disable memory controller to allow
- * values to be changed.
- */
- addi r3, 0, mem_mcopt1
- mtdcr memcfga, r3
- addis r4, 0, 0x0
- ori r4, r4, 0x0
- mtdcr memcfgd, r4
-
- /*
- * Set MB0CF for ext bank 0. (0-4MB) Address Mode 5 since 11x8x2
- * All other banks are disabled.
- */
- addi r3, 0, mem_mb0cf
- mtdcr memcfga, r3
- addis r4, 0, 0x0000 /* BA=0x0, SZ=4MB */
- ori r4, r4, 0x8001 /* Mode is 5, 11x8x2or4, BE=Enabled */
- mtdcr memcfgd, r4
-
- /* Clear MB1CR,MB2CR,MB3CR to turn other banks off */
- addi r4, 0, 0 /* Zero the data reg */
-
- addi r3, r3, 4 /* Point to MB1CF reg */
- mtdcr memcfga, r3 /* Set the address */
- mtdcr memcfgd, r4 /* Zero the reg */
-
- addi r3, r3, 4 /* Point to MB2CF reg */
- mtdcr memcfga, r3 /* Set the address */
- mtdcr memcfgd, r4 /* Zero the reg */
-
- addi r3, r3, 4 /* Point to MB3CF reg */
- mtdcr memcfga, r3 /* Set the address */
- mtdcr memcfgd, r4 /* Zero the reg */
-
- /********************************************************************
- * Set the SDRAM Timing reg, SDTR1 and the refresh timer reg, RTR.
- * To set the appropriate timings, we assume sdram is
- * 100MHz (pc100 compliant).
- *******************************************************************/
-
- /*
- * Set up SDTR1
- */
- addi r3, 0, mem_sdtr1
- mtdcr memcfga, r3
- addis r4, 0, 0x0086 /* SDTR1 value for 100Mhz */
- ori r4, r4, 0x400D
- mtdcr memcfgd, r4
-
- /*
- * Set RTR
- */
- addi r3, 0, mem_rtr
- mtdcr memcfga, r3
- addis r4, 0, 0x05F0 /* RTR refresh val = 15.625ms@100Mhz */
- mtdcr memcfgd, r4
-
- /********************************************************************
- * Delay to ensure 200usec have elapsed since reset. Assume worst
- * case that the core is running 200Mhz:
- * 200,000,000 (cycles/sec) X .000200 (sec) = 0x9C40 cycles
- *******************************************************************/
- addis r3, 0, 0x0000
- ori r3, r3, 0xA000 /* Wait 200us from reset */
- mtctr r3
-..spinlp2:
- bdnz ..spinlp2 /* spin loop */
-
- /********************************************************************
- * Set memory controller options reg, MCOPT1.
- *******************************************************************/
- addi r3, 0, mem_mcopt1
- mtdcr memcfga, r3
- addis r4, 0, 0x80E0 /* DC_EN=1,SRE=0,PME=0,MEMCHK=0 */
- ori r4, r4, 0x0000 /* REGEN=0,DRW=00,BRPF=01,ECCDD=1 */
- mtdcr memcfgd, r4 /* EMDULR=1 */
-
-..sdri_done:
- /* restore and return */
- lwz r0, +12(r1) /* Get saved link register */
- addi r1, r1, +8 /* Remove frame from stack */
- mtlr r0 /* Restore link register */
- blr /* Return to calling function */
-.Lfe1: .size sdram_init,.Lfe1-sdram_init
-/* end sdram_init() */
diff --git a/board/w7o/post1.S b/board/w7o/post1.S
deleted file mode 100644
index 21d206e7cf..0000000000
--- a/board/w7o/post1.S
+++ /dev/null
@@ -1,742 +0,0 @@
-/*
- * (C) Copyright 2001
- * Bill Hunter, Wave 7 Optics, william.hunter@mediaone.net
- * and
- * Erik Theisen, Wave 7 Optics, etheisen@mindspring.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-/*
- * Description:
- * Routine to exercise memory for the bringing up of our boards.
- */
-#include <config.h>
-#include <ppc4xx.h>
-
-#define _LINUX_CONFIG_H 1 /* avoid reading Linux autoconf.h file */
-
-#include <ppc_asm.tmpl>
-#include <ppc_defs.h>
-
-#include <asm/cache.h>
-#include <asm/mmu.h>
-
-#include <watchdog.h>
-
-#include "errors.h"
-
-#define _ASMLANGUAGE
-
- .globl test_sdram
- .globl test_led
- .globl log_stat
- .globl log_warn
- .globl log_err
- .globl temp_uart_init
- .globl post_puts
- .globl disp_hex
-
-/*****************************************************
-******* Text Strings for low level printing ******
-******* In section got2 *******
-*****************************************************/
-
-/*
- * Define the text strings for errors and warnings.
- * Switch to .data section.
- */
- .section ".data"
-err_str: .asciz "*** POST ERROR = "
-warn_str: .asciz "*** POST WARNING = "
-end_str: .asciz "\r\n"
-
-/*
- * Enter the labels in Global Entry Table (GOT).
- * Switch to .got2 section.
- */
- START_GOT
- GOT_ENTRY(err_str)
- GOT_ENTRY(warn_str)
- GOT_ENTRY(end_str)
- END_GOT
-
-/*
- * Switch back to .text section.
- */
- .text
-
-/****************************************
- ****************************************
- ******** LED register test ********
- ****************************************
- ***************************************/
-test_led:
- /* save the return info on stack */
- mflr r0 /* Get link register */
- stwu r1, -12(r1) /* Save back chain and move SP */
- stw r0, +16(r1) /* Save link register */
- stw r4, +8(r1) /* save R4 */
-
- WATCHDOG_RESET /* Reset the watchdog */
-
- addi r3, 0, ERR_FF /* first test value is ffff */
- addi r4, r3, 0 /* save copy of pattern */
- bl set_led /* store first test value */
- bl get_led /* read it back */
- xor. r4, r4, r3 /* compare to original */
-#if defined(CONFIG_W7OLMC)
- andi. r4, r4, 0x00ff /* lmc has 8 bits */
-#else
- andi. r4, r4, 0xffff /* lmg has 16 bits */
-#endif
- beq LED2 /* next test */
- addi r3, 0, ERR_LED /* error code = 1 */
- bl log_err /* display error and halt */
-LED2: addi r3, 0, ERR_00 /* 2nd test value is 0000 */
- addi r4, r3, 0 /* save copy of pattern */
- bl set_led /* store first test value */
- bl get_led /* read it back */
- xor. r4, r4, r3 /* compare to original */
-#if defined(CONFIG_W7OLMC)
- andi. r4, r4, 0x00ff /* lmc has 8 bits */
-#else
- andi. r4, r4, 0xffff /* lmg has 16 bits */
-#endif
- beq LED3 /* next test */
- addi r3, 0, ERR_LED /* error code = 1 */
- bl log_err /* display error and halt */
-
-LED3: /* restore stack and return */
- lwz r0, +16(r1) /* Get saved link register */
- mtlr r0 /* Restore link register */
- lwz r4, +8(r1) /* restore r4 */
- addi r1, r1, +12 /* Remove frame from stack */
- blr /* Return to calling function */
-
-/****************************************
- ****************************************
- ******** SDRAM TESTS ********
- ****************************************
- ***************************************/
-test_sdram:
- /* called with mem size in r3 */
- /* save the return info on stack */
- mflr r0 /* Get link register */
- stwu r1, -16(r1) /* Save back chain and move SP */
- stw r0, +20(r1) /* Save link register */
- stmw r30, +8(r1) /* save R30,R31 */
- /* r30 is log2(mem size) */
- /* r31 is mem size */
-
- /* take log2 of total mem size */
- addi r31, r3, 0 /* save total mem size */
- addi r30, 0, 0 /* clear r30 */
-l2_loop:
- srwi. r31, r31, 1 /* shift right 1 */
- addi r30, r30, 1 /* count shifts */
- bne l2_loop /* loop till done */
- addi r30, r30, -1 /* correct for over count */
- addi r31, r3, 0 /* save original size */
-
- /* now kick the dog and test the mem */
- WATCHDOG_RESET /* Reset the watchdog */
- bl Data_Buster /* test crossed/shorted data lines */
- addi r3, r30, 0 /* get log2(memsize) */
- addi r4, r31, 0 /* get memsize */
- bl Ghost_Buster /* test crossed/shorted addr lines */
- addi r3, r31, 0 /* get mem size */
- bl Bit_Buster /* check for bad internal bits */
-
- /* restore stack and return */
- lmw r30, +8(r1) /* Restore r30, r31 */
- lwz r0, +20(r1) /* Get saved link register */
- mtlr r0 /* Restore link register */
- addi r1, r1, +16 /* Remove frame from stack */
- blr /* Return to calling function */
-
-
-/****************************************
- ******** sdram data bus test ********
- ***************************************/
-Data_Buster:
- /* save the return info on stack */
- mflr r0 /* Get link register */
- stwu r1, -24(r1) /* Save back chain and move SP */
- stw r0, +28(r1) /* Save link register */
- stmw r28, 8(r1) /* save r28 - r31 on stack */
- /* r31 i/o register */
- /* r30 sdram base address */
- /* r29 5555 syndrom */
- /* r28 aaaa syndrom */
-
- /* set up led register for this test */
- addi r3, 0, ERR_RAMG /* set led code to 1 */
- bl log_stat /* store test value */
- /* now test the dram data bus */
- xor r30, r30, r30 /* load r30 with base addr of sdram */
- addis r31, 0, 0x5555 /* load r31 with test value */
- ori r31, r31, 0x5555
- stw r31,0(r30) /* sto the value */
- lwz r29,0(r30) /* read it back */
- xor r29,r31,r29 /* compare it to original */
- addis r31, 0, 0xaaaa /* load r31 with test value */
- ori r31, r31, 0xaaaa
- stw r31,0(r30) /* sto the value */
- lwz r28,0(r30) /* read it back */
- xor r28,r31,r28 /* compare it to original */
- or r3,r28,r29 /* or together both error terms */
- /*
- * Now that we have the error bits,
- * we have to decide which part they are in.
- */
- bl get_idx /* r5 is now index to error */
- addi r3, r3, ERR_RAMG
- cmpwi r3, ERR_RAMG /* check for errors */
- beq db_done /* skip if no errors */
- bl log_err /* log the error */
-
-db_done:
- lmw r28, 8(r1) /* restore r28 - r31 from stack */
- lwz r0, +28(r1) /* Get saved link register */
- addi r1, r1, +24 /* Remove frame from stack */
- mtlr r0 /* Restore link register */
- blr /* Return to calling function */
-
-
-/****************************************************
- ******** test for address ghosting in dram ********
- ***************************************************/
-
-Ghost_Buster:
- /* save the return info on stack */
- mflr r0 /* Get link register */
- stwu r1, -36(r1) /* Save back chain and move SP */
- stw r0, +40(r1) /* Save link register */
- stmw r25, 8(r1) /* save r25 - r31 on stack */
- /* r31 = scratch register */
- /* r30 is main referance loop counter,
- 0 to 23 */
- /* r29 is ghost loop count, 0 to 22 */
- /* r28 is referance address */
- /* r27 is ghost address */
- /* r26 is log2 (mem size) =
- number of byte addr bits */
- /* r25 is mem size */
-
- /* save the log2(mem size) and mem size */
- addi r26, r3, 0 /* r26 is number of byte addr bits */
- addi r25, r4, 0 /* r25 is mem size in bytes */
-
- /* set the leds for address ghost test */
- addi r3, 0, ERR_ADDG
- bl set_led
-
- /* first fill memory with zeros */
- srwi r31, r25, 2 /* convert bytes to longs */
- mtctr r31 /* setup byte counter */
- addi r28, 0, 0 /* start at address at 0 */
- addi r31, 0, 0 /* data value = 0 */
-clr_loop:
- stw r31, 0(r28) /* Store zero value */
- addi r28, r28, 4 /* Increment to next word */
- andi. r27, r28, 0xffff /* check for 2^16 loops */
- bne clr_skip /* if not there, then skip */
- WATCHDOG_RESET /* kick the dog every now and then */
-clr_skip:
- bdnz clr_loop /* Round and round... */
-
- /* now do main test */
- addi r30, 0, 0 /* start referance counter at 0 */
-outside:
- /*
- * Calculate the referance address
- * the referance address is calculated by setting the (r30-1)
- * bit of the base address
- * when r30=0, the referance address is the base address.
- * thus the sequence 0,1,2,4,8,..,2^(n-1)
- * setting the bit is done with the following shift functions.
- */
- WATCHDOG_RESET /* Reset the watchdog */
-
- addi r31, 0, 1 /* r31 = 1 */
- slw r28, r31, r30 /* set bit coresponding to loop cnt */
- srwi r28, r28, 1 /* then shift it right one so */
- /* we start at location 0 */
- /* fill referance address with Fs */
- addi r31, 0, 0x00ff /* r31 = one byte of set bits */
- stb r31,0(r28) /* save ff in referance address */
-
- /* ghost (inner) loop, now check all posible ghosted addresses */
- addi r29, 0, 0 /* start ghosted loop counter at 0 */
-inside:
- /*
- * Calculate the ghost address by flipping one
- * bit of referance address. This gives the
- * sequence 1,2,4,8,...,2^(n-1)
- */
- addi r31, 0, 1 /* r31 = 1 */
- slw r27, r31, r29 /* set bit coresponding to loop cnt */
- xor r27, r28, r27 /* ghost address = ref addr with
- bit flipped*/
-
- /* now check for ghosting */
- lbz r31,0(r27) /* get content of ghost addr */
- cmpwi r31, 0 /* compare read value to 0 */
- bne Casper /* we found a ghost! */
-
- /* now close ghost ( inner ) loop */
- addi r29, r29, 1 /* increment inner loop counter */
- cmpw r29, r26 /* check for last inner loop */
- blt inside /* do more inner loops */
-
- /* now close referance ( outer ) loop */
- addi r31, 0, 0 /* r31 = zero */
- stb r31, 0(28) /* zero out the altered address loc. */
- /*
- * Increment and check for end, count is zero based.
- * With the ble, this gives us one more loops than
- * address bits for sequence 0,1,2,4,8,...2^(n-1)
- */
- addi r30, r30, 1 /* increment outer loop counter */
- cmpw r30, r26 /* check for last inner loop */
- ble outside /* do more outer loops */
-
- /* were done, lets go home */
- b gb_done
-Casper: /* we found a ghost !! */
- addi r3, 0, ERR_ADDF /* get indexed error message */
- bl log_err /* log error led error code */
-gb_done: /* pack your bags, and go home */
- lmw r25, 8(r1) /* restore r25 - r31 from stack */
- lwz r0, +40(r1) /* Get saved link register */
- addi r1, r1, +36 /* Remove frame from stack */
- mtlr r0 /* Restore link register */
- blr /* Return to calling function */
-
-/****************************************************
- ******** SDRAM data fill tests **********
- ***************************************************/
-Bit_Buster:
- /* called with mem size in r3 */
- /* save the return info on stack */
- mflr r0 /* Get link register */
- stwu r1, -16(r1) /* Save back chain and move SP */
- stw r0, +20(r1) /* Save link register */
- stw r4, +8(r1) /* save R4 */
- stw r5, +12(r1) /* save r5 */
-
- addis r5, r3, 0 /* save mem size */
-
- /* Test 55555555 */
- addi r3, 0, ERR_R55G /* set up error code in case we fail */
- bl log_stat /* store test value */
- addis r4, 0, 0x5555
- ori r4, r4, 0x5555
- bl fill_test
-
- /* Test aaaaaaaa */
- addi r3, 0, ERR_RAAG /* set up error code in case we fail */
- bl log_stat /* store test value */
- addis r4, 0, 0xAAAA
- ori r4, r4, 0xAAAA
- bl fill_test
-
- /* Test 00000000 */
- addi r3, 0, ERR_R00G /* set up error code in case we fail */
- bl log_stat /* store test value */
- addis r4, 0, 0
- ori r4, r4, 0
- bl fill_test
-
- /* restore stack and return */
- lwz r5, +12(r1) /* restore r4 */
- lwz r4, +8(r1) /* restore r4 */
- lwz r0, +20(r1) /* Get saved link register */
- addi r1, r1, +16 /* Remove frame from stack */
- mtlr r0 /* Restore link register */
- blr /* Return to calling function */
-
-
-/****************************************************
- ******** fill test ********
- ***************************************************/
-/* tests memory by filling with value, and reading back */
-/* r5 = Size of memory in bytes */
-/* r4 = Value to write */
-/* r3 = Error code */
-fill_test:
- mflr r0 /* Get link register */
- stwu r1, -32(r1) /* Save back chain and move SP */
- stw r0, +36(r1) /* Save link register */
- stmw r27, 8(r1) /* save r27 - r31 on stack */
- /* r31 - scratch register */
- /* r30 - memory address */
- mr r27, r3
- mr r28, r4
- mr r29, r5
-
- WATCHDOG_RESET /* Reset the watchdog */
-
- /* first fill memory with Value */
- srawi r31, r29, 2 /* convert bytes to longs */
- mtctr r31 /* setup counter */
- addi r30, 0, 0 /* Make r30 = addr 0 */
-ft_0: stw r28, 0(r30) /* Store value */
- addi r30, r30, 4 /* Increment to next word */
- andi. r31, r30, 0xffff /* check for 2^16 loops */
- bne ft_0a /* if not there, then skip */
- WATCHDOG_RESET /* kick the dog every now and then */
-ft_0a: bdnz ft_0 /* Round and round... */
-
- WATCHDOG_RESET /* Reset the watchdog */
-
- /* Now confirm Value is in memory */
- srawi r31, r29, 2 /* convert bytes to longs */
- mtctr r31 /* setup counter */
- addi r30, 0, 0 /* Make r30 = addr 0 */
-ft_1: lwz r31, 0(r30) /* get value from memory */
- xor. r31, r31, r28 /* Writen = Read ? */
- bne ft_err /* If bad, than halt */
- addi r30, r30, 4 /* Increment to next word */
- andi. r31, r30, 0xffff /* check for 2^16 loops*/
- bne ft_1a /* if not there, then skip */
- WATCHDOG_RESET /* kick the dog every now and then */
-ft_1a: bdnz ft_1 /* Round and round... */
-
- WATCHDOG_RESET /* Reset the watchdog */
-
- b fill_done /* restore and return */
-
-ft_err: addi r29, r27, 0 /* save current led code */
- addi r27, r31, 0 /* get pattern in r27 */
- bl get_idx /* get index from r27 */
- add r27, r27, r29 /* add index to old led code */
- bl log_err /* output led err code, halt CPU */
-
-fill_done:
- lmw r27, 8(r1) /* restore r27 - r31 from stack */
- lwz r0, +36(r1) /* Get saved link register */
- addi r1, r1, +32 /* Remove frame from stack */
- mtlr r0 /* Restore link register */
- blr /* Return to calling function */
-
-
-/****************************************************
- ******* get error index from r3 pattern ********
- ***************************************************/
-get_idx: /* r3 = (MSW(r3) !=0)*2 +
- (LSW(r3) !=0) */
- /* save the return info on stack */
- mflr r0 /* Get link register */
- stwu r1, -12(r1) /* Save back chain and move SP */
- stw r0, +16(r1) /* Save link register */
- stw r4, +8(r1) /* save R4 */
-
- andi. r4, r3, 0xffff /* check for lower bits */
- beq gi2 /* skip if no bits set */
- andis. r4, r3, 0xffff /* check for upper bits */
- beq gi3 /* skip if no bits set */
- addi r3, 0, 3 /* both upper and lower bits set */
- b gi_done
-gi2: andis. r4, r3, 0xffff /* check for upper bits*/
- beq gi4 /* skip if no bits set */
- addi r3, 0, 2 /* only upper bits set */
- b gi_done
-gi3: addi r3, 0, 1 /* only lower bits set */
- b gi_done
-gi4: addi r3, 0, 0 /* no bits set */
-gi_done:
- /* restore stack and return */
- lwz r0, +16(r1) /* Get saved link register */
- mtlr r0 /* Restore link register */
- lwz r4, +8(r1) /* restore r4 */
- addi r1, r1, +12 /* Remove frame from stack */
- blr /* Return to calling function */
-
-/****************************************************
- ******** set LED to R5 and hang ********
- ***************************************************/
-log_stat: /* output a led code and continue */
-set_led:
- /* save the return info on stack */
- mflr r0 /* Get link register */
- stwu r1, -12(r1) /* Save back chain and move SP */
- stw r0, +16(r1) /* Save link register */
- stw r4, +8(r1) /* save R4 */
-
- addis r4, 0, 0xfe00 /* LED buffer is at 0xfe000000 */
-#if defined(CONFIG_W7OLMG) /* only on gateway, invert outputs */
- xori r3,r3, 0xffff /* complement led code, active low */
- sth r3, 0(r4) /* store first test value */
- xori r3,r3, 0xffff /* complement led code, active low */
-#else /* if not gateway, then don't invert */
- sth r3, 0(r4) /* store first test value */
-#endif
-
- /* restore stack and return */
- lwz r0, +16(r1) /* Get saved link register */
- mtlr r0 /* Restore link register */
- lwz r4, +8(r1) /* restore r4 */
- addi r1, r1, +12 /* Remove frame from stack */
- blr /* Return to calling function */
-
-get_led:
- /* save the return info on stack */
- mflr r0 /* Get link register */
- stwu r1, -12(r1) /* Save back chain and move SP */
- stw r0, +16(r1) /* Save link register */
- stw r4, +8(r1) /* save R4 */
-
- addis r4, 0, 0xfe00 /* LED buffer is at 0xfe000000 */
- lhz r3, 0(r4) /* store first test value */
-#if defined(CONFIG_W7OLMG) /* only on gateway, invert inputs */
- xori r3,r3, 0xffff /* complement led code, active low */
-#endif
-
- /* restore stack and return */
- lwz r0, +16(r1) /* Get saved link register */
- mtlr r0 /* Restore link register */
- lwz r4, +8(r1) /* restore r4 */
- addi r1, r1, +12 /* Remove frame from stack */
- blr /* Return to calling function */
-
-log_err: /* output the error and hang the board ( for now ) */
- /* save the return info on stack */
- mflr r0 /* Get link register */
- stwu r1, -12(r1) /* Save back chain and move SP */
- stw r0, +16(r1) /* Save link register */
- stw r3, +8(r1) /* save a copy of error code */
- bl set_led /* set the led pattern */
- GET_GOT /* get GOT address in r14 */
- lwz r3,GOT(err_str) /* get address of string */
- bl post_puts /* output the warning string */
- lwz r3, +8(r1) /* get error code */
- addi r4, 0, 2 /* set disp length to 2 nibbles */
- bl disp_hex /* output the error code */
- lwz r3,GOT(end_str) /* get address of string */
- bl post_puts /* output the warning string */
-halt:
- b halt /* hang */
-
- /* restore stack and return */
- lwz r0, +16(r1) /* Get saved link register */
- mtlr r0 /* Restore link register */
- addi r1, r1, +12 /* Remove frame from stack */
- blr /* Return to calling function */
-
-log_warn: /* output a warning, then continue with operations */
- /* save the return info on stack */
- mflr r0 /* Get link register */
- stwu r1, -16(r1) /* Save back chain and move SP */
- stw r0, +20(r1) /* Save link register */
- stw r3, +8(r1) /* save a copy of error code */
- stw r14, +12(r1) /* save a copy of r14 (used by GOT) */
-
- bl set_led /* set the led pattern */
- GET_GOT /* get GOT address in r14 */
- lwz r3,GOT(warn_str) /* get address of string */
- bl post_puts /* output the warning string */
- lwz r3, +8(r1) /* get error code */
- addi r4, 0, 2 /* set disp length to 2 nibbles */
- bl disp_hex /* output the error code */
- lwz r3,GOT(end_str) /* get address of string */
- bl post_puts /* output the warning string */
-
- addis r3, 0, 64 /* has a long delay */
- mtctr r3
-log_2:
- WATCHDOG_RESET /* this keeps dog from barking, */
- /* and takes time */
- bdnz log_2 /* loop till time expires */
-
- /* restore stack and return */
- lwz r0, +20(r1) /* Get saved link register */
- lwz r14, +12(r1) /* restore r14 */
- mtlr r0 /* Restore link register */
- addi r1, r1, +16 /* Remove frame from stack */
- blr /* Return to calling function */
-
-/*******************************************************************
- * temp_uart_init
- * Temporary UART initialization routine
- * Sets up UART0 to run at 9600N81 off of the internal clock.
- * R3-R4 are used.
- ******************************************************************/
-temp_uart_init:
- /* save the return info on stack */
- mflr r0 /* Get link register */
- stwu r1, -8(r1) /* Save back chain and move SP */
- stw r0, +12(r1) /* Save link register */
-
- addis r3, 0, 0xef60
- ori r3, r3, 0x0303 /* r3 = UART0_LCR */
- addi r4, 0, 0x83 /* n81 format, divisor regs enabled */
- stb r4, 0(r3)
-
- /* set baud rate to use internal clock,
- baud = (200e6/16)/31/42 = 9600 */
-
- addis r3, 0, 0xef60 /* Address of baud divisor reg */
- ori r3, r3, 0x0300 /* UART0_DLM */
- addi r4, 0, +42 /* uart baud divisor LSB = 93 */
- stb r4, 0(r3) /* baud = (200 /16)/14/93 */
-
- addi r3, r3, 0x0001 /* uart baud divisor addr */
- addi r4, 0, 0
- stb r4, 0(r3) /* Divisor Latch MSB = 0 */
-
- addis r3, 0, 0xef60
- ori r3, r3, 0x0303 /* r3 = UART0_LCR */
- addi r4, 0, 0x03 /* n81 format, tx/rx regs enabled */
- stb r4, 0(r3)
-
- /* output a few line feeds */
- addi r3, 0, '\n' /* load line feed */
- bl post_putc /* output the char */
- addi r3, 0, '\n' /* load line feed */
- bl post_putc /* output the char */
-
- /* restore stack and return */
- lwz r0, +12(r1) /* Get saved link register */
- mtlr r0 /* Restore link register */
- addi r1, r1, +8 /* Remove frame from stack */
- blr /* Return to calling function */
-
-/**********************************************************************
- ** post_putc
- ** outputs charactor in R3
- ** r3 returns the error code ( -1 if there is an error )
- *********************************************************************/
-
-post_putc:
-
- /* save the return info on stack */
- mflr r0 /* Get link register */
- stwu r1, -20(r1) /* Save back chain and move SP */
- stw r0, +24(r1) /* Save link register */
- stmw r29, 8(r1) /* save r29 - r31 on stack
- r31 - uart base address
- r30 - delay counter
- r29 - scratch reg */
-
- addis r31, 0, 0xef60 /* Point to uart base */
- ori r31, r31, 0x0300
- addis r30, 0, 152 /* Load about 10,000,000 ticks. */
-pputc_lp:
- lbz r29, 5(r31) /* Read Line Status Register */
- andi. r29, r29, 0x20 /* Check THRE status */
- bne thre_set /* Branch if FIFO empty */
- addic. r30, r30, -1 /* Decrement and check if empty. */
- bne pputc_lp /* Try, try again */
- addi r3, 0, -1 /* Load error code for timeout */
- b pputc_done /* Bail out with error code set */
-thre_set:
- stb r3, 0(r31) /* Store character to UART */
- addi r3, 0, 0 /* clear error code */
-pputc_done:
- lmw r29, 8(r1) /*restore r29 - r31 from stack */
- lwz r0, +24(r1) /* Get saved link register */
- addi r1, r1, +20 /* Remove frame from stack */
- mtlr r0 /* Restore link register */
- blr /* Return to calling function */
-
-
-/****************************************************************
- post_puts
- Accepts a null-terminated string pointed to by R3
- Outputs to the serial port until 0x00 is found.
- r3 returns the error code ( -1 if there is an error )
-*****************************************************************/
-post_puts:
-
- /* save the return info on stack */
- mflr r0 /* Get link register */
- stwu r1, -12(r1) /* Save back chain and move SP */
- stw r0, +16(r1) /* Save link register */
- stw r31, 8(r1) /* save r31 - char pointer */
-
- addi r31, r3, 0 /* move pointer to R31 */
-pputs_nxt:
- lbz r3, 0(r31) /* Get next character */
- addic. r3, r3, 0 /* Check for zero */
- beq pputs_term /* bail out if zero */
- bl post_putc /* output the char */
- addic. r3, r3, 0 /* check for error */
- bne pputs_err
- addi r31, r31, 1 /* point to next char */
- b pputs_nxt /* loop till term */
-pputs_err:
- addi r3, 0, -1 /* set error code */
- b pputs_end /* were outa here */
-pputs_term:
- addi r3, 0, 1 /* set success code */
- /* restore stack and return */
-pputs_end:
- lwz r31, 8(r1) /* restore r27 - r31 from stack */
- lwz r0, +16(r1) /* Get saved link register */
- addi r1, r1, +12 /* Remove frame from stack */
- mtlr r0 /* Restore link register */
- blr /* Return to calling function */
-
-
-/********************************************************************
- ***** disp_hex
- ***** Routine to display a hex value from a register.
- ***** R3 is value to display
- ***** R4 is number of nibbles to display ie 2 for byte 8 for (long)word
- ***** Returns -1 in R3 if there is an error ( ie serial port hangs )
- ***** Returns 0 in R3 if no error
- *******************************************************************/
-disp_hex:
- /* save the return info on stack */
- mflr r0 /* Get link register */
- stwu r1, -16(r1) /* Save back chain and move SP */
- stw r0, +20(r1) /* Save link register */
- stmw r30, 8(r1) /* save r30 - r31 on stack */
- /* r31 output char */
- /* r30 uart base address */
- addi r30, 0, 8 /* Go through 8 nibbles. */
- addi r31, r3, 0
-pputh_nxt:
- rlwinm r31, r31, 4, 0, 31 /* Rotate next nibble into position */
- andi. r3, r31, 0x0f /* Get nibble. */
- addi r3, r3, 0x30 /* Add zero's ASCII code. */
- cmpwi r3, 0x03a
- blt pputh_out
- addi r3, r3, 0x07 /* 0x27 for lower case. */
-pputh_out:
- cmpw r30, r4
- bgt pputh_skip
- bl post_putc
- addic. r3, r3, 0 /* check for error */
- bne pputh_err
-pputh_skip:
- addic. r30, r30, -1
- bne pputh_nxt
- xor r3, r3, r3 /* Clear error code */
- b pputh_done
-pputh_err:
- addi r3, 0, -1 /* set error code */
-pputh_done:
- /* restore stack and return */
- lmw r30, 8(r1) /* restore r30 - r31 from stack */
- lwz r0, +20(r1) /* Get saved link register */
- addi r1, r1, +16 /* Remove frame from stack */
- mtlr r0 /* Restore link register */
- blr /* Return to calling function */
diff --git a/board/w7o/post2.c b/board/w7o/post2.c
deleted file mode 100644
index e590128244..0000000000
--- a/board/w7o/post2.c
+++ /dev/null
@@ -1,108 +0,0 @@
-/*
- * (C) Copyright 2001
- * Bill Hunter, Wave 7 Optics, williamhunter@mediaone.net
- * and
- * Erik Theisen, Wave 7 Optics, etheisen@mindspring.com.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <config.h>
-#include <rtc.h>
-#include "errors.h"
-#include "dtt.h"
-
-#if defined(CONFIG_RTC_M48T35A)
-void rtctest(void)
-{
- volatile uchar *tchar = (uchar*)(CFG_NVRAM_BASE_ADDR + CFG_NVRAM_SIZE - 9);
- struct rtc_time tmp;
-
- /* set up led code for RTC tests */
- log_stat(ERR_RTCG);
-
- /*
- * Do RTC battery test. The first write after power up
- * fails if battery is low.
- */
- *tchar = 0xaa;
- if ((*tchar ^ 0xaa) != 0x0) log_warn(ERR_RTCBAT);
- *tchar = 0x55; /* Reset test address */
-
- /*
- * Now lets check the validity of the values in the RTC.
- */
- rtc_get(&tmp);
- if ((tmp.tm_sec < 0) | (tmp.tm_sec > 59) |
- (tmp.tm_min < 0) | (tmp.tm_min > 59) |
- (tmp.tm_hour < 0) | (tmp.tm_hour > 23) |
- (tmp.tm_mday < 1 ) | (tmp.tm_mday > 31) |
- (tmp.tm_mon < 1 ) | (tmp.tm_mon > 12) |
- (tmp.tm_year < 2000) | (tmp.tm_year > 2500) |
- (tmp.tm_wday < 1 ) | (tmp.tm_wday > 7)) {
- log_warn(ERR_RTCTIM);
- rtc_reset();
- }
-
- /*
- * Now lets do a check to see if the NV RAM is there.
- */
- *tchar = 0xaa;
- if ((*tchar ^ 0xaa) != 0x0) log_err(ERR_RTCVAL);
- *tchar = 0x55; /* Reset test address */
-
-} /* rtctest() */
-#endif /* CONFIG_RTC_M48T35A */
-
-
-#ifdef CONFIG_DTT_LM75
-int dtt_test(int sensor)
-{
- short temp, trip, hyst;
-
- /* get values */
- temp = dtt_read(sensor, DTT_READ_TEMP) / 256;
- trip = dtt_read(sensor, DTT_TEMP_SET) / 256;
- hyst = dtt_read(sensor, DTT_TEMP_HYST) / 256;
-
- /* check values */
- if ((hyst != (CFG_DTT_MAX_TEMP - CFG_DTT_HYSTERESIS)) ||
- (trip != CFG_DTT_MAX_TEMP) ||
- (temp < CFG_DTT_LOW_TEMP) || (temp > CFG_DTT_MAX_TEMP))
- return 1;
-
- return 0;
-} /* dtt_test() */
-#endif /* CONFIG_DTT_LM75 */
-
-/*****************************************/
-
-void post2(void)
-{
-#if defined(CONFIG_RTC_M48T35A)
- rtctest();
-#endif /* CONFIG_RTC_M48T35A */
-
-#ifdef CONFIG_DTT_LM75
- log_stat(ERR_TempG);
- if(dtt_test(2) != 0) log_warn(ERR_Ttest0);
- if(dtt_test(4) != 0) log_warn(ERR_Ttest1);
-#endif /* CONFIG_DTT_LM75 */
-} /* post2() */
diff --git a/board/w7o/u-boot.lds b/board/w7o/u-boot.lds
deleted file mode 100644
index 7e3e15dc2e..0000000000
--- a/board/w7o/u-boot.lds
+++ /dev/null
@@ -1,135 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- .resetvec 0xFFFFFFFC :
- {
- *(.resetvec)
- } = 0xffff
-
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/ppc4xx/start.o (.text)
- board/w7o/init.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/w7o/u-boot.lds.debug b/board/w7o/u-boot.lds.debug
deleted file mode 100644
index a0c72c9210..0000000000
--- a/board/w7o/u-boot.lds.debug
+++ /dev/null
@@ -1,137 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- mpc8xx/start.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/extable.o (.text)
-
- common/environment.o(.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/w7o/vpd.c b/board/w7o/vpd.c
deleted file mode 100644
index 2ce15680e1..0000000000
--- a/board/w7o/vpd.c
+++ /dev/null
@@ -1,407 +0,0 @@
-/*
- * (C) Copyright 2001
- * Erik Theisen, Wave 7 Optics, etheisen@mindspring.com.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#if defined(VXWORKS)
-# include <stdio.h>
-# include <string.h>
-# define CFG_DEF_EEPROM_ADDR 0xa0
-extern char iicReadByte( char, char );
-extern ulong_t crc32( unsigned char *, unsigned long );
-#else
-#include <common.h>
-#endif
-
-#include "vpd.h"
-
-/*
- * vpd_reader() - reads VPD data from I2C EEPROMS.
- * returns pointer to buffer or NULL.
- */
-static unsigned char *
-vpd_reader(unsigned char *buf, unsigned dev_addr, unsigned off, unsigned count)
-{
- unsigned offset = off; /* Calculated offset */
-
- /*
- * The main board EEPROM contains
- * SDRAM SPD in the first 128 bytes,
- * so skew the offset.
- */
- if (dev_addr == CFG_DEF_EEPROM_ADDR)
- offset += SDRAM_SPD_DATA_SIZE;
-
- /* Try to read the I2C EEPROM */
-#if defined(VXWORKS)
- {
- int i;
- for( i = 0; i < count; ++i ) {
- buf[ i ] = iicReadByte( dev_addr, offset+i );
- }
- }
-#else
- if (eeprom_read(dev_addr, offset, buf, count)) {
- printf("Failed to read %d bytes from VPD EEPROM 0x%x @ 0x%x\n",
- count, dev_addr, offset);
- return NULL;
- }
-#endif
-
- return buf;
-} /* vpd_reader() */
-
-
-/*
- * vpd_get_packet() - returns next VPD packet or NULL.
- */
-static vpd_packet_t *vpd_get_packet(vpd_packet_t *vpd_packet)
-{
- vpd_packet_t *packet = vpd_packet;
-
- if (packet != NULL) {
- if (packet->identifier == VPD_PID_TERM)
- return NULL;
- else
- packet = (vpd_packet_t *)((char *)packet + packet->size + 2);
- }
-
- return packet;
-} /* vpd_get_packet() */
-
-
-/*
- * vpd_find_packet() - Locates and returns the specified
- * VPD packet or NULL on error.
- */
-static vpd_packet_t *vpd_find_packet(vpd_t *vpd, unsigned char ident)
-{
- vpd_packet_t *packet = (vpd_packet_t *)&vpd->packets;
-
- /* Guaranteed illegal */
- if (ident == VPD_PID_GI)
- return NULL;
-
- /* Scan tuples looking for a match */
- while ((packet->identifier != ident) &&
- (packet->identifier != VPD_PID_TERM))
- packet = vpd_get_packet(packet);
-
- /* Did we find it? */
- if ((packet->identifier) && (packet->identifier != ident))
- return NULL;
- return packet;
-}
-
-
-/*
- * vpd_is_valid() - Validates contents of VPD data
- * in I2C EEPROM. Returns 1 for
- * success or 0 for failure.
- */
-static int vpd_is_valid(unsigned dev_addr, unsigned char *buf)
-{
- unsigned num_bytes;
- vpd_packet_t *packet;
- vpd_t *vpd = (vpd_t *)buf;
- unsigned short stored_crc16, calc_crc16 = 0xffff;
-
- /* Check Eyecatcher */
- if (strncmp((char *)(vpd->header.eyecatcher), VPD_EYECATCHER, VPD_EYE_SIZE) != 0) {
- unsigned offset = 0;
- if (dev_addr == CFG_DEF_EEPROM_ADDR)
- offset += SDRAM_SPD_DATA_SIZE;
- printf("Error: VPD EEPROM 0x%x corrupt @ 0x%x\n", dev_addr, offset);
-
- return 0;
- }
-
- /* Check Length */
- if (vpd->header.size> VPD_MAX_EEPROM_SIZE) {
- printf("Error: VPD EEPROM 0x%x contains bad size 0x%x\n",
- dev_addr, vpd->header.size);
- return 0;
- }
-
- /* Now find the termination packet */
- if ((packet = vpd_find_packet(vpd, VPD_PID_TERM)) == NULL) {
- printf("Error: VPD EEPROM 0x%x missing termination packet\n",
- dev_addr);
- return 0;
- }
-
- /* Calculate data size */
- num_bytes = (unsigned long)((unsigned char *)packet -
- (unsigned char *)vpd + sizeof(vpd_packet_t));
-
- /* Find stored CRC and clear it */
- if ((packet = vpd_find_packet(vpd, VPD_PID_CRC)) == NULL) {
- printf("Error: VPD EEPROM 0x%x missing CRC\n", dev_addr);
- return 0;
- }
- stored_crc16 = *((ushort *)packet->data);
- *(ushort *)packet->data = 0;
-
- /* OK, lets calculate the CRC and check it */
-#if defined(VXWORKS)
- calc_crc16 = (0xffff & crc32(buf, num_bytes));
-#else
- calc_crc16 = (0xffff & crc32(0, buf, num_bytes));
-#endif
- *(ushort *)packet->data = stored_crc16; /* Now restore the CRC */
- if (stored_crc16 != calc_crc16) {
- printf("Error: VPD EEPROM 0x%x has bad CRC 0x%x\n",
- dev_addr, stored_crc16);
- return 0;
- }
-
- return 1;
-} /* vpd_is_valid() */
-
-
-/*
- * size_ok() - Check to see if packet size matches
- * size of data we want. Returns 1 for
- * good match or 0 for failure.
- */
-static int size_ok(vpd_packet_t *packet, unsigned long size)
-{
- if (packet->size != size) {
- printf("VPD Packet 0x%x corrupt.\n", packet->identifier);
- return 0;
- }
- return 1;
-} /* size_ok() */
-
-
-/*
- * strlen_ok() - Check to see if packet size matches
- * strlen of the string we want to populate.
- * Returns 1 for valid length or 0 for failure.
- */
-static int strlen_ok(vpd_packet_t *packet, unsigned long length)
-{
- if (packet->size >= length) {
- printf("VPD Packet 0x%x corrupt.\n", packet->identifier);
- return 0;
- }
- return 1;
-} /* strlen_ok() */
-
-
-/*
- * get_vpd_data() - populates the passed VPD structure 'vpdInfo'
- * with data obtained from the specified
- * I2C EEPROM 'dev_addr'. Returns 0 for
- * success or 1 for failure.
- */
-int vpd_get_data(unsigned char dev_addr, VPD *vpdInfo)
-{
- unsigned char buf[VPD_EEPROM_SIZE];
- vpd_t *vpd = (vpd_t *)buf;
- vpd_packet_t *packet;
-
- if (vpdInfo == NULL)
- return 1;
-
- /*
- * Fill vpdInfo with 0s to blank out
- * unused fields, fill vpdInfo->ethAddrs
- * with all 0xffs so that other's code can
- * determine how many real Ethernet addresses
- * there are. OUIs starting with 0xff are
- * broadcast addresses, and would never be
- * permantely stored.
- */
- memset((void *)vpdInfo, 0, sizeof(VPD));
- memset((void *)&vpdInfo->ethAddrs, 0xff, sizeof(vpdInfo->ethAddrs));
- vpdInfo->_devAddr = dev_addr;
-
- /* Read the minimum size first */
- if (vpd_reader(buf, dev_addr, 0, VPD_EEPROM_SIZE) == NULL) {
- return 1;
- }
-
- /* Check validity of VPD data */
- if (!vpd_is_valid(dev_addr, buf)) {
- printf("VPD Data is INVALID!\n");
- return 1;
- }
-
- /*
- * Walk all the packets and populate
- * the VPD info structure.
- */
- packet = (vpd_packet_t *)&vpd->packets;
- do {
- switch (packet->identifier) {
- case VPD_PID_GI:
- printf("Error: Illegal VPD value\n");
- break;
- case VPD_PID_PID:
- if (strlen_ok(packet, MAX_PROD_ID)) {
- strncpy(vpdInfo->productId,
- (char *)(packet->data), packet->size);
- }
- break;
- case VPD_PID_REV:
- if (size_ok(packet, sizeof(char)))
- vpdInfo->revisionId = *packet->data;
- break;
- case VPD_PID_SN:
- if (size_ok(packet, sizeof(unsigned long))) {
- vpdInfo->serialNum =
- *(unsigned long *)packet->data;
- }
- break;
- case VPD_PID_MANID:
- if (size_ok(packet, sizeof(unsigned char)))
- vpdInfo->manuID = *packet->data;
- break;
- case VPD_PID_PCO:
- if (size_ok(packet, sizeof(unsigned long))) {
- vpdInfo->configOpt =
- *(unsigned long *)packet->data;
- }
- break;
- case VPD_PID_SYSCLK:
- if (size_ok(packet, sizeof(unsigned long)))
- vpdInfo->sysClk = *(unsigned long *)packet->data;
- break;
- case VPD_PID_SERCLK:
- if (size_ok(packet, sizeof(unsigned long)))
- vpdInfo->serClk = *(unsigned long *)packet->data;
- break;
- case VPD_PID_FLASH:
- if (size_ok(packet, 9)) { /* XXX - hardcoded,
- padding in struct */
- memcpy(&vpdInfo->flashCfg, packet->data, 9);
- }
- break;
- case VPD_PID_ETHADDR:
- memcpy(vpdInfo->ethAddrs, packet->data, packet->size);
- break;
- case VPD_PID_POTS:
- if (size_ok(packet, sizeof(char)))
- vpdInfo->numPOTS = (unsigned)*packet->data;
- break;
- case VPD_PID_DS1:
- if (size_ok(packet, sizeof(char)))
- vpdInfo->numDS1 = (unsigned)*packet->data;
- case VPD_PID_GAL:
- case VPD_PID_CRC:
- case VPD_PID_TERM:
- break;
- default:
- printf("Warning: Found unknown VPD packet ID 0x%x\n",
- packet->identifier);
- break;
- }
- } while ((packet = vpd_get_packet(packet)));
-
- return 0;
-} /* end get_vpd_data() */
-
-
-/*
- * vpd_init() - Initialize default VPD environment
- */
-int vpd_init(unsigned char dev_addr)
-{
- return (0);
-} /* vpd_init() */
-
-
-/*
- * vpd_print() - Pretty print the VPD data.
- */
-void vpd_print(VPD *vpdInfo)
-{
- const char *const sp = "";
- const char *const sfmt = "%4s%-20s: \"%s\"\n";
- const char *const cfmt = "%4s%-20s: '%c'\n";
- const char *const dfmt = "%4s%-20s: %ld\n";
- const char *const hfmt = "%4s%-20s: %08lX\n";
- const char *const dsfmt = "%4s%-20s: %d\n";
- const char *const hsfmt = "%4s%-20s: %04X\n";
- const char *const dhfmt = "%4s%-20s: %ld (%lX)\n";
-
- printf("VPD read from I2C device: %02X\n", vpdInfo->_devAddr);
-
- if (vpdInfo->productId[0])
- printf(sfmt, sp, "Product ID", vpdInfo->productId);
- else
- printf(sfmt, sp, "Product ID", "UNKNOWN");
-
- if (vpdInfo->revisionId)
- printf(cfmt, sp, "Revision ID", vpdInfo->revisionId);
-
- if (vpdInfo->serialNum)
- printf(dfmt, sp, "Serial Number", vpdInfo->serialNum);
-
- if (vpdInfo->manuID)
- printf(dfmt, sp, "Manufacture ID", (long)vpdInfo->manuID);
-
- if (vpdInfo->configOpt)
- printf(hfmt, sp, "Configuration", vpdInfo->configOpt);
-
- if (vpdInfo->sysClk)
- printf(dhfmt, sp, "System Clock", vpdInfo->sysClk, vpdInfo->sysClk);
-
- if (vpdInfo->serClk)
- printf(dhfmt, sp, "Serial Clock", vpdInfo->serClk, vpdInfo->serClk);
-
- if (vpdInfo->numPOTS)
- printf(dfmt, sp, "Number of POTS lines", vpdInfo->numPOTS);
-
- if (vpdInfo->numDS1)
- printf(dfmt, sp, "Number of DS1s", vpdInfo->numDS1);
-
- /* Print Ethernet Addresses */
- if (vpdInfo->ethAddrs[0][0] != 0xff) {
- int i, j;
- printf("%4sEtherNet Address(es): ", sp);
- for (i = 0; i < MAX_ETH_ADDRS; i++) {
- if (vpdInfo->ethAddrs[i][0] != 0xff) {
- for (j = 0; j < 6; j++) {
- printf("%02X", vpdInfo->ethAddrs[i][j]);
- if (((j + 1) % 6) != 0)
- printf(":");
- else
- printf(" ");
- }
- if (((i + 1) % 3) == 0) printf("\n%24s: ", sp);
- }
- }
- printf("\n");
- }
-
- if (vpdInfo->flashCfg.mfg && vpdInfo->flashCfg.dev) {
- printf("Main Flash Configuration:\n");
- printf(hsfmt, sp, "Manufacture ID", vpdInfo->flashCfg.mfg);
- printf(hsfmt, sp, "Device ID", vpdInfo->flashCfg.dev);
- printf(dsfmt, sp, "Device Width", vpdInfo->flashCfg.devWidth);
- printf(dsfmt, sp, "Num. Devices", vpdInfo->flashCfg.numDevs);
- printf(dsfmt, sp, "Num. Columns", vpdInfo->flashCfg.numCols);
- printf(dsfmt, sp, "Column Width", vpdInfo->flashCfg.colWidth);
- printf(dsfmt, sp, "WE Data Width", vpdInfo->flashCfg.weDataWidth);
- }
-} /* vpd_print() */
diff --git a/board/w7o/vpd.h b/board/w7o/vpd.h
deleted file mode 100644
index 1b71c8d0fa..0000000000
--- a/board/w7o/vpd.h
+++ /dev/null
@@ -1,134 +0,0 @@
-/*
- * (C) Copyright 2001
- * Erik Theisen, Wave 7 Optics, etheisen@mindspring.com.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef _VPD_H_
-#define _VPD_H_
-
-/*
- * Main Flash Configuration.
- */
-typedef struct flashCfg_s {
- unsigned short mfg; /* Manufacture ID */
- unsigned short dev; /* Device ID */
- unsigned char devWidth; /* Device Width */
- unsigned char numDevs; /* Number of devices */
- unsigned char numCols; /* Number of columns */
- unsigned char colWidth; /* Width of a column */
- unsigned char weDataWidth; /* Write/Erase Data Width */
-} flashCfg_t;
-
-/*
- * Vital Product Data - VPD
- */
-#define MAX_PROD_ID 15
-#define MAX_ETH_ADDRS 10
-typedef unsigned char EthAddr[6];
-typedef struct vpd {
- unsigned char _devAddr; /* Device address during read */
- char productId[MAX_PROD_ID]; /* Product ID */
- char revisionId; /* Revision ID as a char */
- unsigned long serialNum; /* Serial number */
- unsigned char manuID; /* Manufact ID - byte int */
- unsigned long configOpt; /* Config Option - bit field */
- unsigned long sysClk; /* System clock in Hertz */
- unsigned long serClk; /* Ext. clock in Hertz */
- flashCfg_t flashCfg; /* Flash configuration */
- unsigned long numPOTS; /* Number of POTS lines */
- unsigned long numDS1; /* Number of DS1 circuits */
- EthAddr ethAddrs[MAX_ETH_ADDRS]; /* Ethernet MAC, 1st = craft */
-} VPD;
-
-
-#define VPD_MAX_EEPROM_SIZE 512 /* Max size VPD EEPROM */
-#define SDRAM_SPD_DATA_SIZE 128 /* Size SPD in VPD EEPROM */
-
-/*
- * PIDs - Packet Identifiers
- */
-#define VPD_PID_GI 0x0 /* Guaranted Illegal */
-#define VPD_PID_PID 0x1 /* Product Identifier */
-#define VPD_PID_REV 0x2 /* Product Revision */
-#define VPD_PID_SN 0x3 /* Serial Number */
-#define VPD_PID_MANID 0x4 /* Manufacture ID */
-#define VPD_PID_PCO 0x5 /* Product configuration */
-#define VPD_PID_SYSCLK 0x6 /* System Clock */
-#define VPD_PID_SERCLK 0x7 /* Ser. Clk. Speed in Hertz */
-#define VPD_PID_CRC 0x8 /* VPD CRC */
-#define VPD_PID_FLASH 0x9 /* Flash Configuration */
-#define VPD_PID_ETHADDR 0xA /* Ethernet Address(es) */
-#define VPD_PID_GAL 0xB /* Galileo Switch Config */
-#define VPD_PID_POTS 0xC /* Number of POTS Lines */
-#define VPD_PID_DS1 0xD /* Number of DS1s */
-#define VPD_PID_TERM 0xFF /* Termination packet */
-
-/*
- * VPD - Eyecatcher/Magic
- */
-#define VPD_EYECATCHER "W7O"
-#define VPD_EYE_SIZE 3
-typedef struct vpd_header {
- unsigned char eyecatcher[VPD_EYE_SIZE]; /* eyecatcher - "W7O" */
- unsigned short size __attribute__((packed)); /* size of EEPROM */
-} vpd_header_t;
-
-
-#define VPD_DATA_SIZE (VPD_MAX_EEPROM_SIZE - SDRAM_SPD_DATA_SIZE - \
- sizeof(vpd_header_t))
-typedef struct vpd_s {
- vpd_header_t header;
- unsigned char packets[VPD_DATA_SIZE];
-} vpd_t;
-
-typedef struct vpd_packet {
- unsigned char identifier;
- unsigned char size;
- unsigned char data[1];
-} vpd_packet_t;
-
-/*
- * VPD configOpt bit mask
- */
-#define VPD_HAS_BBRAM 0x1 /* Battery backed SRAM */
-#define VPD_HAS_RTC 0x2 /* Battery backed RTC */
-#define VPD_HAS_EXT_SER_CLK 0x4 /* External serial clock */
-#define VPD_HAS_SER_TRANS_1 0x8 /* COM1 transceiver */
-#define VPD_HAS_SER_TRANS_2 0x10 /* COM2 transceiver */
-#define VPD_HAS_CRAFT_PHY 0x20 /* CRAFT Ethernet */
-#define VPD_HAS_DTT_1 0x40 /* I2C Digital therm. #1 */
-#define VPD_HAS_DTT_2 0x80 /* I2C Digital therm. #2 */
-#define VPD_HAS_1000_UP_LASER 0x100 /* GMM - 1000Mbit Uplink */
-#define VPD_HAS_70KM_UP_LASER 0x200 /* CMM - 70KM Uplink laser */
-#define VPD_HAS_2_UPLINKS 0x400 /* CMM - 2 uplink lasers */
-#define VPD_HAS_FPGA 0x800 /* Has 1 or more FPGAs */
-#define VPD_HAS_DFA 0x1000 /* CLM - Has 2 Fiber Inter. */
-#define VPD_HAS_GAL_SWITCH 0x2000 /* GMM - Has a Gal switch */
-#define VPD_HAS_POTS_LINES 0x4000 /* GMM - Has POTS lines */
-#define VPD_HAS_DS1_CHANNELS 0x8000 /* GMM - Has DS1 channels */
-#define VPD_HAS_CABLE_RETURN 0x10000 /* GBM/GBR - Cable ret. path */
-
-#define VPD_EEPROM_SIZE (256 - SDRAM_SPD_DATA_SIZE) /* Size EEPROM */
-
-extern int vpd_get_data(unsigned char dev_addr, VPD *vpd);
-extern void vpd_print(VPD *vpdInfo);
-
-#endif /* _VPD_H_ */
diff --git a/board/w7o/w7o.c b/board/w7o/w7o.c
deleted file mode 100644
index c56c269dae..0000000000
--- a/board/w7o/w7o.c
+++ /dev/null
@@ -1,272 +0,0 @@
-/*
- * (C) Copyright 2001
- * Erik Theisen, Wave 7 Optics, etheisen@mindspring.com.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <command.h>
-#include "w7o.h"
-#include <asm/processor.h>
-
-#include "vpd.h"
-#include "errors.h"
-#include <watchdog.h>
-
-unsigned long get_dram_size (void);
-
-/*
- * Macros to transform values
- * into environment strings.
- */
-#define XMK_STR(x) #x
-#define MK_STR(x) XMK_STR(x)
-
-/* ------------------------------------------------------------------------- */
-
-int board_early_init_f (void)
-{
-#if defined(CONFIG_W7OLMG)
- /*
- * Setup GPIO pins - reset devices.
- */
- out32 (PPC405GP_GPIO0_ODR, 0x10000000); /* one open drain pin */
- out32 (PPC405GP_GPIO0_OR, 0x3E000000); /* set output pins to default */
- out32 (PPC405GP_GPIO0_TCR, 0x7f800000); /* setup for output */
-
- /*
- * IRQ 0-15 405GP internally generated; active high; level sensitive
- * IRQ 16 405GP internally generated; active low; level sensitive
- * IRQ 17-24 RESERVED
- * IRQ 25 (EXT IRQ 0) XILINX; active low; level sensitive
- * IRQ 26 (EXT IRQ 1) PCI INT A; active low; level sensitive
- * IRQ 27 (EXT IRQ 2) PCI INT B; active low; level sensitive
- * IRQ 28 (EXT IRQ 3) SAM 2; active low; level sensitive
- * IRQ 29 (EXT IRQ 4) Battery Bad; active low; level sensitive
- * IRQ 30 (EXT IRQ 5) Level One PHY; active low; level sensitive
- * IRQ 31 (EXT IRQ 6) SAM 1; active high; level sensitive
- */
- mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
- mtdcr (uicer, 0x00000000); /* disable all ints */
-
- mtdcr (uiccr, 0x00000000); /* set all to be non-critical */
- mtdcr (uicpr, 0xFFFFFF80); /* set int polarities */
- mtdcr (uictr, 0x10000000); /* set int trigger levels */
- mtdcr (uicvcr, 0x00000001); /* set vect base=0,
- INT0 highest priority */
-
- mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
-
-#elif defined(CONFIG_W7OLMC)
- /*
- * Setup GPIO pins
- */
- out32 (PPC405GP_GPIO0_ODR, 0x01800000); /* XCV Done Open Drain */
- out32 (PPC405GP_GPIO0_OR, 0x03800000); /* set out pins to default */
- out32 (PPC405GP_GPIO0_TCR, 0x66C00000); /* setup for output */
-
- /*
- * IRQ 0-15 405GP internally generated; active high; level sensitive
- * IRQ 16 405GP internally generated; active low; level sensitive
- * IRQ 17-24 RESERVED
- * IRQ 25 (EXT IRQ 0) DBE 0; active low; level sensitive
- * IRQ 26 (EXT IRQ 1) DBE 1; active low; level sensitive
- * IRQ 27 (EXT IRQ 2) DBE 2; active low; level sensitive
- * IRQ 28 (EXT IRQ 3) DBE Common; active low; level sensitive
- * IRQ 29 (EXT IRQ 4) PCI; active low; level sensitive
- * IRQ 30 (EXT IRQ 5) RCMM Reset; active low; level sensitive
- * IRQ 31 (EXT IRQ 6) PHY; active high; level sensitive
- */
- mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
- mtdcr (uicer, 0x00000000); /* disable all ints */
-
- mtdcr (uiccr, 0x00000000); /* set all to be non-critical */
- mtdcr (uicpr, 0xFFFFFF80); /* set int polarities */
- mtdcr (uictr, 0x10000000); /* set int trigger levels */
- mtdcr (uicvcr, 0x00000001); /* set vect base=0,
- INT0 highest priority */
-
- mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
-
-#else /* Unknown */
-# error "Unknown W7O board configuration"
-#endif
-
- WATCHDOG_RESET (); /* Reset the watchdog */
- temp_uart_init (); /* init the uart for debug */
- WATCHDOG_RESET (); /* Reset the watchdog */
- test_led (); /* test the LEDs */
- test_sdram (get_dram_size ()); /* test the dram */
- log_stat (ERR_POST1); /* log status,post1 complete */
- return 0;
-}
-
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Check Board Identity:
- */
-int checkboard (void)
-{
- VPD vpd;
-
- puts ("Board: ");
-
- /* VPD data present in I2C EEPROM */
- if (vpd_get_data (CFG_DEF_EEPROM_ADDR, &vpd) == 0) {
- /*
- * Known board type.
- */
- if (vpd.productId[0] &&
- ((strncmp (vpd.productId, "GMM", 3) == 0) ||
- (strncmp (vpd.productId, "CMM", 3) == 0))) {
-
- /* Output board information on startup */
- printf ("\"%s\", revision '%c', serial# %ld, manufacturer %u\n", vpd.productId, vpd.revisionId, vpd.serialNum, vpd.manuID);
- return (0);
- }
- }
-
- puts ("### Unknown HW ID - assuming NOTHING\n");
- return (0);
-}
-
-/* ------------------------------------------------------------------------- */
-
-long int initdram (int board_type)
-{
- return get_dram_size ();
-}
-
-unsigned long get_dram_size (void)
-{
- int tmp, i, regs[4];
- int size = 0;
-
- /* Get bank Size registers */
- mtdcr (memcfga, mem_mb0cf); /* get bank 0 config reg */
- regs[0] = mfdcr (memcfgd);
-
- mtdcr (memcfga, mem_mb1cf); /* get bank 1 config reg */
- regs[1] = mfdcr (memcfgd);
-
- mtdcr (memcfga, mem_mb2cf); /* get bank 2 config reg */
- regs[2] = mfdcr (memcfgd);
-
- mtdcr (memcfga, mem_mb3cf); /* get bank 3 config reg */
- regs[3] = mfdcr (memcfgd);
-
- /* compute the size, add each bank if enabled */
- for (i = 0; i < 4; i++) {
- if (regs[i] & 0x0001) { /* if enabled, */
- tmp = ((regs[i] >> (31 - 14)) & 0x7); /* get size bits */
- tmp = 0x400000 << tmp; /* Size bits X 4MB = size */
- size += tmp;
- }
- }
-
- return size;
-}
-
-int misc_init_f (void)
-{
- return 0;
-}
-
-static void w7o_env_init (VPD * vpd)
-{
- /*
- * Read VPD
- */
- if (vpd_get_data (CFG_DEF_EEPROM_ADDR, vpd) != 0)
- return;
-
- /*
- * Known board type.
- */
- if (vpd->productId[0] &&
- ((strncmp (vpd->productId, "GMM", 3) == 0) ||
- (strncmp (vpd->productId, "CMM", 3) == 0))) {
- char buf[30];
- char *eth;
- char *serial = getenv ("serial#");
- char *ethaddr = getenv ("ethaddr");
-
- /* Set 'serial#' envvar if serial# isn't set */
- if (!serial) {
- sprintf (buf, "%s-%ld", vpd->productId,
- vpd->serialNum);
- setenv ("serial#", buf);
- }
-
- /* Set 'ethaddr' envvar if 'ethaddr' envvar is the default */
- eth = (char *)(vpd->ethAddrs[0]);
- if (ethaddr
- && (strcmp (ethaddr, MK_STR (CONFIG_ETHADDR)) == 0)) {
- /* Now setup ethaddr */
- sprintf (buf, "%02x:%02x:%02x:%02x:%02x:%02x",
- eth[0], eth[1], eth[2], eth[3], eth[4],
- eth[5]);
- setenv ("ethaddr", buf);
- }
- }
-} /* w7o_env_init() */
-
-
-int misc_init_r (void)
-{
- VPD vpd; /* VPD information */
-
-#if defined(CONFIG_W7OLMG)
- unsigned long greg; /* GPIO Register */
-
- greg = in32 (PPC405GP_GPIO0_OR);
-
- /*
- * XXX - Unreset devices - this should be moved into VxWorks driver code
- */
- greg |= 0x41800000L; /* SAM, PHY, Galileo */
-
- out32 (PPC405GP_GPIO0_OR, greg); /* set output pins to default */
-#endif /* CONFIG_W7OLMG */
-
- /*
- * Initialize W7O environment variables
- */
- w7o_env_init (&vpd);
-
- /*
- * Initialize the FPGA(s).
- */
- if (init_fpga () == 0)
- test_fpga ((unsigned short *) CONFIG_FPGAS_BASE);
-
- /* More POST testing. */
- post2 ();
-
- /* Done with hardware initialization and POST. */
- log_stat (ERR_POSTOK);
-
- /* Call silly, fail safe boot init routine */
- init_fsboot ();
-
- return (0);
-}
diff --git a/board/w7o/w7o.h b/board/w7o/w7o.h
deleted file mode 100644
index d6f50e2e67..0000000000
--- a/board/w7o/w7o.h
+++ /dev/null
@@ -1,92 +0,0 @@
-/*
- * (C) Copyright 2001
- * Erik Theisen, Wave 7 Optics, etheisen@mindspring.com.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef _W7O_H_
-#define _W7O_H_
-#include <config.h>
-
-/* AMCC 405GP PowerPC GPIO registers */
-#define PPC405GP_GPIO0_OR 0xef600700L /* GPIO Output */
-#define PPC405GP_GPIO0_TCR 0xef600704L /* GPIO Three-State Control */
-#define PPC405GP_GPIO0_ODR 0xef600718L /* GPIO Open Drain */
-#define PPC405GP_GPIO0_IR 0xef60071cL /* GPIO Input */
-
-/* AMCC 405GP DCRs */
-#define CPC0_CR0 0xb1 /* Chip control register 0 */
-
-/* LMG FPGA <=> CPU GPIO signals */
-#define LMG_XCV_INIT 0x10000000L
-#define LMG_XCV_PROG 0x04000000L
-#define LMG_XCV_DONE 0x00400000L
-#define LMG_XCV_CNFG_0 0x08000000L
-#define LMG_XCV_IRQ_0 0x0L
-
-/* LMC FPGA <=> CPU GPIO signals */
-#define LMC_XCV_INIT 0x00800000L
-#define LMC_XCV_PROG 0x40000000L
-#define LMC_XCV_DONE 0x01000000L
-#define LMC_XCV_CNFG_0 0x00004000L /* Shared with IRQ 0 */
-#define LMC_XCV_CNFG_1 0x00002000L /* Shared with IRQ 1 */
-#define LMC_XCV_CNFG_2 0x00001000L /* Shared with IRQ 2 */
-#define LMC_XCV_IRQ_0 0x00080000L /* Shared with GPIO 17 */
-#define LMC_XCV_IRQ_1 0x00040000L /* Shared with GPIO 18 */
-#define LMC_XCV_IRQ_3 0x00020000L /* Shared tiwht GPIO 19 */
-
-
-/*
- * Setup FPGA <=> GPIO mappings
- */
-#if defined(CONFIG_W7OLMG)
-# define GPIO_XCV_INIT LMG_XCV_INIT
-# define GPIO_XCV_PROG LMG_XCV_PROG
-# define GPIO_XCV_DONE LMG_XCV_DONE
-# define GPIO_XCV_CNFG LMG_XCV_CNFG_0
-# define GPIO_XCV_IRQ LMG_XCV_IRQ_0
-# define GPIO_GPIO_1 0x40000000L
-# define GPIO_GPIO_6 0x02000000L
-# define GPIO_GPIO_7 0x01000000L
-# define GPIO_GPIO_8 0x00800000L
-#elif defined(CONFIG_W7OLMC)
-# define GPIO_XCV_INIT LMC_XCV_INIT
-# define GPIO_XCV_PROG LMC_XCV_PROG
-# define GPIO_XCV_DONE LMC_XCV_DONE
-# define GPIO_XCV_CNFG LMC_XCV_CNFG_0
-# define GPIO_XCV_IRQ LMC_XCV_IRQ_0
-#else
-# error "Unknown W7O board configuration"
-#endif
-
-/* Power On Self Tests */
-extern void post2(void);
-extern int test_led(void);
-extern int test_sdram(unsigned long size);
-extern void test_fpga(unsigned short *daddr);
-
-/* FGPA */
-extern int init_fpga(void);
-
-/* Misc */
-extern int temp_uart_init(void);
-extern void init_fsboot(void);
-
-#endif /* _W7O_H_ */
diff --git a/board/w7o/watchdog.c b/board/w7o/watchdog.c
deleted file mode 100644
index 4bbd94f608..0000000000
--- a/board/w7o/watchdog.c
+++ /dev/null
@@ -1,47 +0,0 @@
-/*
- * (C) Copyright 2001
- * Erik Theisen, Wave 7 Optics, etheisen@mindspring.com.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * W7O board level hardware watchdog.
- */
-#include <common.h>
-#include <config.h>
-
-#ifdef CONFIG_HW_WATCHDOG
-#include <watchdog.h>
-
-void hw_watchdog_reset(void)
-{
- volatile ushort *hwd = (ushort *)(CFG_W7O_EBC_PB7CR & 0xfff00000);
-
- /*
- * Read the LMG's hwd register and toggle the
- * watchdog bit to reset it. On the LMC, just
- * reading it is enough, but toggling the bit
- * doen't hurt either.
- */
- *hwd = *hwd ^ 0x8000;
-
-} /* hw_watchdog_reset() */
-
-#endif /* CONFIG_HW_WATCHDOG */
diff --git a/board/wepep250/Makefile b/board/wepep250/Makefile
deleted file mode 100644
index 11ad8fbecc..0000000000
--- a/board/wepep250/Makefile
+++ /dev/null
@@ -1,47 +0,0 @@
-#
-# (C) Copyright 2000, 2002
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := wepep250.o flash.o
-SOBJS := lowlevel_init.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS) $(SOBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/wepep250/config.mk b/board/wepep250/config.mk
deleted file mode 100644
index 8701581d24..0000000000
--- a/board/wepep250/config.mk
+++ /dev/null
@@ -1,11 +0,0 @@
-#
-# This is config used for compilation of WEP EP250 sources
-#
-# You might change location of U-Boot in memory by setting right TEXT_BASE.
-# This allows for example having one copy located at the end of ram and stored
-# in flash device and later on while developing use other location to test
-# the code in RAM device only.
-#
-
-TEXT_BASE = 0xa1fe0000
-#TEXT_BASE = 0xa1001000
diff --git a/board/wepep250/flash.c b/board/wepep250/flash.c
deleted file mode 100644
index 2a322903d5..0000000000
--- a/board/wepep250/flash.c
+++ /dev/null
@@ -1,321 +0,0 @@
-/*
- * Copyright (C) 2003 ETC s.r.o.
- *
- * This code was inspired by Marius Groeger and Kyle Harris code
- * available in other board ports for U-Boot
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- * Written by Peter Figuli <peposh@etc.sk>, 2003.
- *
- */
-
-#include <common.h>
-#include "intel.h"
-
-
-/*
- * This code should handle CFI FLASH memory device. This code is very
- * minimalistic approach without many essential error handling code as well.
- * Because U-Boot actually is missing smart handling of FLASH device,
- * we just set flash_id to anything else to FLASH_UNKNOW, so common code
- * can call us without any restrictions.
- * TODO: Add CFI Query, to be able to determine FLASH device.
- * TODO: Add error handling code
- * NOTE: This code was tested with BUS_WIDTH 4 and ITERLEAVE 2 only, but
- * hopefully may work with other configurations.
- */
-
-#if ( WEP_FLASH_BUS_WIDTH == 1 )
-# define FLASH_BUS vu_char
-# if ( WEP_FLASH_INTERLEAVE == 1 )
-# define FLASH_CMD( x ) x
-# else
-# error "With 8bit bus only one chip is allowed"
-# endif
-
-
-#elif ( WEP_FLASH_BUS_WIDTH == 2 )
-# define FLASH_BUS vu_short
-# if ( WEP_FLASH_INTERLEAVE == 1 )
-# define FLASH_CMD( x ) x
-# elif ( WEP_FLASH_INTERLEAVE == 2 )
-# define FLASH_CMD( x ) (( x << 8 )| x )
-# else
-# error "With 16bit bus only 1 or 2 chip(s) are allowed"
-# endif
-
-
-#elif ( WEP_FLASH_BUS_WIDTH == 4 )
-# define FLASH_BUS vu_long
-# if ( WEP_FLASH_INTERLEAVE == 1 )
-# define FLASH_CMD( x ) x
-# elif ( WEP_FLASH_INTERLEAVE == 2 )
-# define FLASH_CMD( x ) (( x << 16 )| x )
-# elif ( WEP_FLASH_INTERLEAVE == 4 )
-# define FLASH_CMD( x ) (( x << 24 )|( x << 16 ) ( x << 8 )| x )
-# else
-# error "With 32bit bus only 1,2 or 4 chip(s) are allowed"
-# endif
-
-#else
-# error "Flash bus width might be 1,2,4 for 8,16,32 bit configuration"
-#endif
-
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
-
-static FLASH_BUS flash_status_reg (void)
-{
-
- FLASH_BUS *addr = (FLASH_BUS *) 0;
-
- *addr = FLASH_CMD (CFI_INTEL_CMD_READ_STATUS_REGISTER);
-
- return *addr;
-}
-
-static int flash_ready (ulong timeout)
-{
- int ok = 1;
-
- reset_timer_masked ();
- while ((flash_status_reg () & FLASH_CMD (CFI_INTEL_SR_READY)) !=
- FLASH_CMD (CFI_INTEL_SR_READY)) {
- if (get_timer_masked () > timeout && timeout != 0) {
- ok = 0;
- break;
- }
- }
- return ok;
-}
-
-#if ( CFG_MAX_FLASH_BANKS != 1 )
-# error "WEP platform has only one flash bank!"
-#endif
-
-
-ulong flash_init (void)
-{
- int i;
- FLASH_BUS address = WEP_FLASH_BASE;
-
- flash_info[0].size = WEP_FLASH_BANK_SIZE;
- flash_info[0].sector_count = CFG_MAX_FLASH_SECT;
- flash_info[0].flash_id = INTEL_MANUFACT;
- memset (flash_info[0].protect, 0, CFG_MAX_FLASH_SECT);
-
- for (i = 0; i < CFG_MAX_FLASH_SECT; i++) {
- flash_info[0].start[i] = address;
-#ifdef WEP_FLASH_UNLOCK
- /* Some devices are hw locked after start. */
- *((FLASH_BUS *) address) = FLASH_CMD (CFI_INTEL_CMD_LOCK_SETUP);
- *((FLASH_BUS *) address) = FLASH_CMD (CFI_INTEL_CMD_UNLOCK_BLOCK);
- flash_ready (0);
- *((FLASH_BUS *) address) = FLASH_CMD (CFI_INTEL_CMD_READ_ARRAY);
-#endif
- address += WEP_FLASH_SECT_SIZE;
- }
-
- flash_protect (FLAG_PROTECT_SET,
- CFG_FLASH_BASE,
- CFG_FLASH_BASE + monitor_flash_len - 1,
- &flash_info[0]);
-
- flash_protect (FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0]);
-
- return WEP_FLASH_BANK_SIZE;
-}
-
-void flash_print_info (flash_info_t * info)
-{
- int i;
-
- printf (" Intel vendor\n");
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; i++) {
- if (!(i % 5)) {
- printf ("\n");
- }
-
- printf (" %08lX%s", info->start[i],
- info->protect[i] ? " (RO)" : " ");
- }
- printf ("\n");
-}
-
-
-int flash_erase (flash_info_t * info, int s_first, int s_last)
-{
- int flag, non_protected = 0, sector;
- int rc = ERR_OK;
-
- FLASH_BUS *address;
-
- for (sector = s_first; sector <= s_last; sector++) {
- if (!info->protect[sector]) {
- non_protected++;
- }
- }
-
- if (!non_protected) {
- return ERR_PROTECTED;
- }
-
- /*
- * Disable interrupts which might cause a timeout
- * here. Remember that our exception vectors are
- * at address 0 in the flash, and we don't want a
- * (ticker) exception to happen while the flash
- * chip is in programming mode.
- */
- flag = disable_interrupts ();
-
-
- /* Start erase on unprotected sectors */
- for (sector = s_first; sector <= s_last && !ctrlc (); sector++) {
- if (info->protect[sector]) {
- printf ("Protected sector %2d skipping...\n", sector);
- continue;
- } else {
- printf ("Erasing sector %2d ... ", sector);
- }
-
- address = (FLASH_BUS *) (info->start[sector]);
-
- *address = FLASH_CMD (CFI_INTEL_CMD_BLOCK_ERASE);
- *address = FLASH_CMD (CFI_INTEL_CMD_CONFIRM);
- if (flash_ready (CFG_FLASH_ERASE_TOUT)) {
- *address = FLASH_CMD (CFI_INTEL_CMD_CLEAR_STATUS_REGISTER);
- printf ("ok.\n");
- } else {
- *address = FLASH_CMD (CFI_INTEL_CMD_SUSPEND);
- rc = ERR_TIMOUT;
- printf ("timeout! Aborting...\n");
- break;
- }
- *address = FLASH_CMD (CFI_INTEL_CMD_READ_ARRAY);
- }
- if (ctrlc ())
- printf ("User Interrupt!\n");
-
- /* allow flash to settle - wait 10 ms */
- udelay_masked (10000);
- if (flag) {
- enable_interrupts ();
- }
-
- return rc;
-}
-
-static int write_data (flash_info_t * info, ulong dest, FLASH_BUS data)
-{
- FLASH_BUS *address = (FLASH_BUS *) dest;
- int rc = ERR_OK;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*address & data) != data) {
- return ERR_NOT_ERASED;
- }
-
- /*
- * Disable interrupts which might cause a timeout
- * here. Remember that our exception vectors are
- * at address 0 in the flash, and we don't want a
- * (ticker) exception to happen while the flash
- * chip is in programming mode.
- */
-
- flag = disable_interrupts ();
-
- *address = FLASH_CMD (CFI_INTEL_CMD_CLEAR_STATUS_REGISTER);
- *address = FLASH_CMD (CFI_INTEL_CMD_PROGRAM1);
- *address = data;
-
- if (!flash_ready (CFG_FLASH_WRITE_TOUT)) {
- *address = FLASH_CMD (CFI_INTEL_CMD_SUSPEND);
- rc = ERR_TIMOUT;
- printf ("timeout! Aborting...\n");
- }
-
- *address = FLASH_CMD (CFI_INTEL_CMD_READ_ARRAY);
- if (flag) {
- enable_interrupts ();
- }
-
- return rc;
-}
-
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- ulong read_addr, write_addr;
- FLASH_BUS data;
- int i, result = ERR_OK;
-
-
- read_addr = addr & ~(sizeof (FLASH_BUS) - 1);
- write_addr = read_addr;
- if (read_addr != addr) {
- data = 0;
- for (i = 0; i < sizeof (FLASH_BUS); i++) {
- if (read_addr < addr || cnt == 0) {
- data |= *((uchar *) read_addr) << i * 8;
- } else {
- data |= (*src++) << i * 8;
- cnt--;
- }
- read_addr++;
- }
- if ((result = write_data (info, write_addr, data)) != ERR_OK) {
- return result;
- }
- write_addr += sizeof (FLASH_BUS);
- }
- for (; cnt >= sizeof (FLASH_BUS); cnt -= sizeof (FLASH_BUS)) {
- if ((result = write_data (info, write_addr,
- *((FLASH_BUS *) src))) != ERR_OK) {
- return result;
- }
- write_addr += sizeof (FLASH_BUS);
- src += sizeof (FLASH_BUS);
- }
- if (cnt > 0) {
- read_addr = write_addr;
- data = 0;
- for (i = 0; i < sizeof (FLASH_BUS); i++) {
- if (cnt > 0) {
- data |= (*src++) << i * 8;
- cnt--;
- } else {
- data |= *((uchar *) read_addr) << i * 8;
- }
- read_addr++;
- }
- if ((result = write_data (info, write_addr, data)) != 0) {
- return result;
- }
- }
- return ERR_OK;
-}
diff --git a/board/wepep250/intel.h b/board/wepep250/intel.h
deleted file mode 100644
index 77498b6e1d..0000000000
--- a/board/wepep250/intel.h
+++ /dev/null
@@ -1,99 +0,0 @@
-/*
- * Copyright (C) 2002 ETC s.r.o.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the ETC s.r.o. nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * Written by Marcel Telka <marcel@telka.sk>, 2002.
- *
- * Documentation:
- * [1] Intel Corporation, "3 Volt Intel Strata Flash Memory 28F128J3A, 28F640J3A,
- * 28F320J3A (x8/x16)", April 2002, Order Number: 290667-011
- * [2] Intel Corporation, "3 Volt Synchronous Intel Strata Flash Memory 28F640K3, 28F640K18,
- * 28F128K3, 28F128K18, 28F256K3, 28F256K18 (x16)", June 2002, Order Number: 290737-005
- *
- * This file is taken from OpenWinCE project hosted by SourceForge.net
- *
- */
-
-#ifndef FLASH_INTEL_H
-#define FLASH_INTEL_H
-
-#include <common.h>
-
-/* Intel CFI commands - see Table 4. in [1] and Table 3. in [2] */
-
-#define CFI_INTEL_CMD_READ_ARRAY 0xFF /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
-#define CFI_INTEL_CMD_READ_IDENTIFIER 0x90 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
-#define CFI_INTEL_CMD_READ_QUERY 0x98 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
-#define CFI_INTEL_CMD_READ_STATUS_REGISTER 0x70 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
-#define CFI_INTEL_CMD_CLEAR_STATUS_REGISTER 0x50 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
-#define CFI_INTEL_CMD_PROGRAM1 0x40 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
-#define CFI_INTEL_CMD_PROGRAM2 0x10 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
-#define CFI_INTEL_CMD_WRITE_TO_BUFFER 0xE8 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
-#define CFI_INTEL_CMD_CONFIRM 0xD0 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
-#define CFI_INTEL_CMD_BLOCK_ERASE 0x20 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
-#define CFI_INTEL_CMD_SUSPEND 0xB0 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
-#define CFI_INTEL_CMD_RESUME 0xD0 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
-#define CFI_INTEL_CMD_LOCK_SETUP 0x60 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
-#define CFI_INTEL_CMD_LOCK_BLOCK 0x01 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
-#define CFI_INTEL_CMD_UNLOCK_BLOCK 0xD0 /* 28FxxxJ3A - unlocks all blocks, 28FFxxxK3, 28FxxxK18 */
-#define CFI_INTEL_CMD_LOCK_DOWN_BLOCK 0x2F /* 28FxxxK3, 28FxxxK18 */
-
-/* Intel CFI Status Register bits - see Table 6. in [1] and Table 7. in [2] */
-
-#define CFI_INTEL_SR_READY 1 << 7 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
-#define CFI_INTEL_SR_ERASE_SUSPEND 1 << 6 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
-#define CFI_INTEL_SR_ERASE_ERROR 1 << 5 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
-#define CFI_INTEL_SR_PROGRAM_ERROR 1 << 4 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
-#define CFI_INTEL_SR_VPEN_ERROR 1 << 3 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
-#define CFI_INTEL_SR_PROGRAM_SUSPEND 1 << 2 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
-#define CFI_INTEL_SR_BLOCK_LOCKED 1 << 1 /* 28FxxxJ3A, 28FxxxK3, 28FxxxK18 */
-#define CFI_INTEL_SR_BEFP 1 << 0 /* 28FxxxK3, 28FxxxK18 */
-
-/* Intel flash device ID codes for 28FxxxJ3A - see Table 5. in [1] */
-
-#define CFI_CHIP_INTEL_28F320J3A 0x0016
-#define CFI_CHIPN_INTEL_28F320J3A "28F320J3A"
-#define CFI_CHIP_INTEL_28F640J3A 0x0017
-#define CFI_CHIPN_INTEL_28F640J3A "28F640J3A"
-#define CFI_CHIP_INTEL_28F128J3A 0x0018
-#define CFI_CHIPN_INTEL_28F128J3A "28F128J3A"
-
-/* Intel flash device ID codes for 28FxxxK3 and 28FxxxK18 - see Table 8. in [2] */
-
-#define CFI_CHIP_INTEL_28F640K3 0x8801
-#define CFI_CHIPN_INTEL_28F640K3 "28F640K3"
-#define CFI_CHIP_INTEL_28F128K3 0x8802
-#define CFI_CHIPN_INTEL_28F128K3 "28F128K3"
-#define CFI_CHIP_INTEL_28F256K3 0x8803
-#define CFI_CHIPN_INTEL_28F256K3 "28F256K3"
-#define CFI_CHIP_INTEL_28F640K18 0x8805
-#define CFI_CHIPN_INTEL_28F640K18 "28F640K18"
-#define CFI_CHIP_INTEL_28F128K18 0x8806
-#define CFI_CHIPN_INTEL_28F128K18 "28F128K18"
-#define CFI_CHIP_INTEL_28F256K18 0x8807
-#define CFI_CHIPN_INTEL_28F256K18 "28F256K18"
-
-#endif /* FLASH_INTEL_H */
diff --git a/board/wepep250/lowlevel_init.S b/board/wepep250/lowlevel_init.S
deleted file mode 100644
index b172ceaa61..0000000000
--- a/board/wepep250/lowlevel_init.S
+++ /dev/null
@@ -1,145 +0,0 @@
-/*
- * Copyright (C) 2001, 2002 ETC s.r.o.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version 2
- * of the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
- * 02111-1307, USA.
- *
- * Written by Marcel Telka <marcel@telka.sk>, 2001, 2002.
- * Changes for U-Boot Peter Figuli <peposh@etc.sk>, 2003.
- *
- * This file is taken from OpenWinCE project hosted by SourceForge.net
- *
- * Documentation:
- * [1] Intel Corporation, "Intel PXA250 and PXA210 Application Processors
- * Developer's Manual", February 2002, Order Number: 278522-001
- * [2] Samsung Electronics, "8Mx16 SDRAM 54CSP K4S281633D-RL/N/P",
- * Revision 1.0, February 2002
- * [3] Samsung Electronics, "16Mx16 SDRAM 54CSP K4S561633C-RL(N)",
- * Revision 1.0, February 2002
- *
-*/
-
-#include <config.h>
-#include <version.h>
-#include <asm/arch/pxa-regs.h>
-
-.globl lowlevel_init
-lowlevel_init:
-
- mov r10, lr
-
-/* setup memory - see 6.12 in [1]
- * Step 1 - wait 200 us
- */
- mov r0,#0x2700 /* wait 200 us @ 99.5 MHz */
-1: subs r0, r0, #1
- bne 1b
-/* TODO: complete step 1 for Synchronous Static memory*/
-
- ldr r0, =0x48000000 /* MC_BASE */
-
-
-/* step 1.a - setup MSCx
- */
- ldr r1, =0x000012B3 /* MSC0_RRR0(1) | MSC0_RDN0(2) | MSC0_RDF0(11) | MSC0_RT0(3) */
- str r1, [r0, #0x8] /* MSC0_OFFSET */
-
-/* step 1.c - clear MDREFR:K1FREE, set MDREFR:DRI
- * see AUTO REFRESH chapter in section D. in [2] and in [3]
- * DRI = (64ms / 4096) * 99.53MHz / 32 = 48 for K4S281633
- * DRI = (64ms / 8192) * 99.52MHz / 32 = 24 for K4S561633
- * TODO: complete for Synchronous Static memory
- */
- ldr r1, [r0, #4] /* MDREFR_OFFSET */
- ldr r2, =0x01000FFF /* MDREFR_K1FREE | MDREFR_DRI_MASK */
- bic r1, r1, r2
-#if defined( WEP_SDRAM_K4S281633 )
- orr r1, r1, #48 /* MDREFR_DRI(48) */
-#elif defined( WEP_SDRAM_K4S561633 )
- orr r1, r1, #24 /* MDREFR_DRI(24) */
-#else
-#error SDRAM chip is not defined
-#endif
-
- str r1, [r0, #4] /* MDREFR_OFFSET */
-
-/* Step 2 - only for Synchronous Static memory (TODO)
- *
- * Step 3 - same as step 4
- *
- * Step 4
- *
- * Step 4.a - set MDREFR:K1RUN, clear MDREFR:K1DB2
- */
- orr r1, r1, #0x00010000 /* MDREFR_K1RUN */
- bic r1, r1, #0x00020000 /* MDREFR_K1DB2 */
- str r1, [r0, #4] /* MDREFR_OFFSET */
-
-/* Step 4.b - clear MDREFR:SLFRSH */
- bic r1, r1, #0x00400000 /* MDREFR_SLFRSH */
- str r1, [r0, #4] /* MDREFR_OFFSET */
-
-/* Step 4.c - set MDREFR:E1PIN */
- orr r1, r1, #0x00008000 /* MDREFR_E1PIN */
- str r1, [r0, #4] /* MDREFR_OFFSET */
-
-/* Step 4.d - automatically done
- *
- * Steps 4.e and 4.f - configure SDRAM
- */
-#if defined( WEP_SDRAM_K4S281633 )
- ldr r1, =0x00000AA8 /* MDCNFG_DTC0(2) | MDCNFG_DLATCH0 | MDCNFG_DCAC0(1) | MDCNFG_DRAC0(1) | MDCNFG_DNB0 */
-#elif defined( WEP_SDRAM_K4S561633 )
- ldr r1, =0x00000AC8 /* MDCNFG_DTC0(2) | MDCNFG_DLATCH0 | MDCNFG_DCAC0(1) | MDCNFG_DRAC0(2) | MDCNFG_DNB0 */
-#else
-#error SDRAM chip is not defined
-#endif
- str r1, [r0, #0] /* MDCNFG_OFFSET */
-
-/* Step 5 - wait at least 200 us for SDRAM
- * see section B. in [2]
- */
- mov r2,#0x2700 /* wait 200 us @ 99.5 MHz */
-1: subs r2, r2, #1
- bne 1b
-
-/* Step 6 - after reset dcache is disabled, so automatically done
- *
- * Step 7 - eight refresh cycles
- */
- mov r2, #0xA0000000
- ldr r3, [r2]
- ldr r3, [r2]
- ldr r3, [r2]
- ldr r3, [r2]
- ldr r3, [r2]
- ldr r3, [r2]
- ldr r3, [r2]
- ldr r3, [r2]
-
-/* Step 8 - we don't need dcache now
- *
- * Step 9 - enable SDRAM partition 0
- */
- orr r1, r1, #1 /* MDCNFG_DE0 */
- str r1, [r0, #0] /* MDCNFG_OFFSET */
-
-/* Step 10 - write MDMRS */
- mov r1, #0
- str r1, [r0, #0x40] /* MDMRS_OFFSET */
-
-/* Step 11 - optional (TODO) */
-
- mov pc,r10
diff --git a/board/wepep250/u-boot.lds b/board/wepep250/u-boot.lds
deleted file mode 100644
index f0102391b3..0000000000
--- a/board/wepep250/u-boot.lds
+++ /dev/null
@@ -1,56 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-ENTRY(_start)
-SECTIONS
-{
- . = 0x00000000;
-
- . = ALIGN(4);
- .text :
- {
- cpu/pxa/start.o (.text)
- *(.text)
- }
-
- . = ALIGN(4);
- .rodata : { *(.rodata) }
-
- . = ALIGN(4);
- .data : { *(.data) }
-
- . = ALIGN(4);
- .got : { *(.got) }
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = ALIGN(4);
- __bss_start = .;
- .bss : { *(.bss) }
- _end = .;
-}
diff --git a/board/wepep250/wepep250.c b/board/wepep250/wepep250.c
deleted file mode 100644
index 56cb855af0..0000000000
--- a/board/wepep250/wepep250.c
+++ /dev/null
@@ -1,67 +0,0 @@
-/*
- * Copyright (C) 2003 ETC s.r.o.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- * Written by Peter Figuli <peposh@etc.sk>, 2003.
- *
- */
-
-#include <common.h>
-#include <asm/arch/pxa-regs.h>
-
-int board_init( void ){
- DECLARE_GLOBAL_DATA_PTR;
-
- gd->bd->bi_arch_number = MACH_TYPE_WEP_EP250;
- gd->bd->bi_boot_params = 0xa0000000;
-/*
- * Setup GPIO stuff to get serial working
- */
-#if defined( CONFIG_FFUART )
- GPDR1 = 0x80;
- GAFR1_L = 0x8010;
-#elif defined( CONFIG_BTUART )
- GPDR1 = 0x800;
- GAFR1_L = 0x900000;
-#endif
- PSSR = 0x20;
-
- return 0;
-}
-
-int dram_init( void ){
- DECLARE_GLOBAL_DATA_PTR;
-
-#if ( CONFIG_NR_DRAM_BANKS > 0 )
- gd->bd->bi_dram[0].start = WEP_SDRAM_1;
- gd->bd->bi_dram[0].size = WEP_SDRAM_1_SIZE;
-#endif
-#if ( CONFIG_NR_DRAM_BANKS > 1 )
- gd->bd->bi_dram[1].start = WEP_SDRAM_2;
- gd->bd->bi_dram[1].size = WEP_SDRAM_2_SIZE;
-#endif
-#if ( CONFIG_NR_DRAM_BANKS > 2 )
- gd->bd->bi_dram[2].start = WEP_SDRAM_3;
- gd->bd->bi_dram[2].size = WEP_SDRAM_3_SIZE;
-#endif
-#if ( CONFIG_NR_DRAM_BANKS > 3 )
- gd->bd->bi_dram[3].start = WEP_SDRAM_4;
- gd->bd->bi_dram[3].size = WEP_SDRAM_4_SIZE;
-#endif
-
- return 0;
-}
diff --git a/board/westel/amx860/Makefile b/board/westel/amx860/Makefile
deleted file mode 100644
index 7a2014d466..0000000000
--- a/board/westel/amx860/Makefile
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o flash.o
-
-$(LIB): .depend $(OBJS)
- $(AR) crv $@ $(OBJS)
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/westel/amx860/amx860.c b/board/westel/amx860/amx860.c
deleted file mode 100644
index 8826667cdc..0000000000
--- a/board/westel/amx860/amx860.c
+++ /dev/null
@@ -1,93 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <config.h>
-#include <mpc8xx.h>
-
-/* ------------------------------------------------------------------------- */
-
-#define _NOT_USED_ 0xFFFFFFFF
-
-const uint edo_60ns[] =
-{ 0x8ffbec24, 0x0ff3ec04, 0x0cf3ec04, 0x00f3ec04,
- 0x00f3ec00, 0x37f7ec47, _NOT_USED_, _NOT_USED_,
- 0x8fffec24, 0x0ffbec04, 0x08f3ec04, 0x07f3ec08,
- 0x08f3ec04, 0x07f3ec48, 0x08f3ec04, 0x07f3ec48,
- 0x08f3ec04, 0x07f3ec48, 0x1ff7ec47, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- 0x8fffcc24, 0x0fefcc04, 0x0cafcc00, 0x11bfcc47,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- 0x8fffcc24, 0x0fefcc04, 0x0cafcc00, 0x03afcc4c,
- 0x0cafcc00, 0x03afcc4c, 0x0cafcc00, 0x03afcc4c,
- 0x0cafcc00, 0x33bfcc4f, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- 0xc0ffcc84, 0x00ffcc04, 0x07ffcc04, 0x3fffcc06,
- 0xffffcc85, 0xffffcc05, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- 0x33ffcc07, _NOT_USED_, _NOT_USED_, _NOT_USED_ };
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Check Board Identity:
- */
-
-int checkboard (void)
-{
- puts ("Board: AMX860\n");
- return 0;
-}
-
-/* ------------------------------------------------------------------------- */
-
-long int initdram (int board_type)
-{
-
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
-
- /* AMX860: has 4 Mb of 60ns EDO DRAM, so start DRAM at 0 */
-
- upmconfig(UPMA, (uint *) edo_60ns, sizeof(edo_60ns)/sizeof(uint));
-
-#ifndef CONFIG_AMX_RAM_EXT
- memctl->memc_mptpr = 0x0400; /* divide by 16 */
-#else
- memctl->memc_mptpr = 0x0200;
-#endif
-
- memctl->memc_mamr = 0x30a21114;
- memctl->memc_or2 = 0xffc00800;
-#ifndef CONFIG_AMX_RAM_EXT
- memctl->memc_br2 = 0x81;
-
- return (4 << 20);
-#else
- memctl->memc_or1 = 0xff000800;
- memctl->memc_br1 = 0x00000081;
- memctl->memc_br2 = 0x01000081;
-
- return (20 << 20);
-#endif
-}
diff --git a/board/westel/amx860/config.mk b/board/westel/amx860/config.mk
deleted file mode 100644
index d0ee4a2864..0000000000
--- a/board/westel/amx860/config.mk
+++ /dev/null
@@ -1,26 +0,0 @@
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#TEXT_BASE = 0xFE000000
-TEXT_BASE = 0x40000000
-OBJCFLAGS = --set-section-flags=.ppcenv=contents,alloc,load,data
diff --git a/board/westel/amx860/flash.c b/board/westel/amx860/flash.c
deleted file mode 100644
index 12a1335b75..0000000000
--- a/board/westel/amx860/flash.c
+++ /dev/null
@@ -1,637 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-#if defined(CFG_ENV_IS_IN_FLASH)
-# ifndef CFG_ENV_ADDR
-# define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_ENV_OFFSET)
-# endif
-# ifndef CFG_ENV_SIZE
-# define CFG_ENV_SIZE CFG_ENV_SECT_SIZE
-# endif
-# ifndef CFG_ENV_SECT_SIZE
-# define CFG_ENV_SECT_SIZE CFG_ENV_SIZE
-# endif
-#endif
-
-/*---------------------------------------------------------------------*/
-#undef DEBUG_FLASH
-
-#ifdef DEBUG_FLASH
-#define DEBUGF(fmt,args...) printf(fmt ,##args)
-#else
-#define DEBUGF(fmt,args...)
-#endif
-/*---------------------------------------------------------------------*/
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (vu_long *addr, flash_info_t *info);
-static int write_word (flash_info_t *info, ulong dest, ulong data);
-static void flash_get_offsets (ulong base, flash_info_t *info);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- unsigned long size_b0, size_b1;
- int i;
-
- /* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* Static FLASH Bank configuration here - FIXME XXX */
-
- DEBUGF("\n## Get flash bank 1 size @ 0x%08x\n",FLASH_BASE0_PRELIM);
-
- size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size_b0, size_b0<<20);
- }
-
-#if defined(FLASH_BASE1_PRELIM) && (FLASH_BASE1_PRELIM != 0)
- DEBUGF("## Get flash bank 2 size @ 0x%08x\n",FLASH_BASE1_PRELIM);
-
- size_b1 = flash_get_size((vu_long *)FLASH_BASE1_PRELIM, &flash_info[1]);
-
- if (size_b1 > size_b0) {
- printf ("## ERROR: "
- "Bank 1 (0x%08lx = %ld MB) > Bank 0 (0x%08lx = %ld MB)\n",
- size_b1, size_b1<<20,
- size_b0, size_b0<<20
- );
- flash_info[0].flash_id = FLASH_UNKNOWN;
- flash_info[1].flash_id = FLASH_UNKNOWN;
- flash_info[0].sector_count = -1;
- flash_info[1].sector_count = -1;
- flash_info[0].size = 0;
- flash_info[1].size = 0;
- return (0);
- }
-#else
- size_b1 = 0;
-#endif /* FLASH_BASE1_PRELIM */
-
- DEBUGF("## Prelim. Flash bank sizes: %08lx + 0x%08lx\n",size_b0,size_b1);
-
- DEBUGF ("## Before remap: "
- "BR0: 0x%08x OR0: 0x%08x "
- "BR1: 0x%08x OR1: 0x%08x\n",
- memctl->memc_br0, memctl->memc_or0,
- memctl->memc_br1, memctl->memc_or1);
-
- /* Remap FLASH according to real size */
- memctl->memc_or0 = CFG_OR_TIMING_FLASH | (-size_b0 & OR_AM_MSK);
- memctl->memc_br0 = (CFG_FLASH_BASE & BR_BA_MSK) | BR_MS_GPCM | BR_V;
-
- DEBUGF("## BR0: 0x%08x OR0: 0x%08x\n",
- memctl->memc_br0, memctl->memc_or0);
-
- /* Re-do sizing to get full correct info */
- size_b0 = flash_get_size((vu_long *)CFG_FLASH_BASE, &flash_info[0]);
-
- flash_get_offsets (CFG_FLASH_BASE, &flash_info[0]);
-
- flash_info[0].size = size_b0;
-
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
- /* monitor protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+monitor_flash_len-1,
- &flash_info[0]);
-#endif
-
-#ifdef CFG_ENV_IS_IN_FLASH
- /* ENV protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR+CFG_ENV_SECT_SIZE-1,
- &flash_info[0]);
-#endif
-
- if (size_b1) {
- memctl->memc_or1 = CFG_OR_TIMING_FLASH | (-size_b1 & OR_AM_MSK);
- memctl->memc_br1 = ((CFG_FLASH_BASE + size_b0) & BR_BA_MSK) |
- BR_MS_GPCM | BR_V;
-
- DEBUGF("## BR1: 0x%08x OR1: 0x%08x\n",
- memctl->memc_br1, memctl->memc_or1);
-
- /* Re-do sizing to get full correct info */
- size_b1 = flash_get_size((vu_long *)(CFG_FLASH_BASE + size_b0),
- &flash_info[1]);
-
- flash_info[1].size = size_b1;
-
- flash_get_offsets (CFG_FLASH_BASE + size_b0, &flash_info[1]);
-
-# if CFG_MONITOR_BASE >= CFG_FLASH_BASE
- /* monitor protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+monitor_flash_len-1,
- &flash_info[1]);
-# endif
-
-# ifdef CFG_ENV_IS_IN_FLASH
- /* ENV protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR+CFG_ENV_SECT_SIZE-1,
- &flash_info[1]);
-#endif
- } else {
-#ifndef CONFIG_AMX_RAM_EXT
- memctl->memc_br1 = 0; /* invalidate bank */
- memctl->memc_or1 = 0; /* invalidate bank */
-#endif
-
- DEBUGF("## DISABLE BR1: 0x%08x OR1: 0x%08x\n",
- memctl->memc_br1, memctl->memc_or1);
-
- flash_info[1].flash_id = FLASH_UNKNOWN;
- flash_info[1].sector_count = -1;
- flash_info[1].size = 0;
- }
-
- DEBUGF("## Final Flash bank sizes: %08lx + 0x%08lx\n",size_b0,size_b1);
-
- return (size_b0 + size_b1);
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_get_offsets (ulong base, flash_info_t *info)
-{
- int i;
-
- /* set up sector start address table */
- if ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM040) {
- /* set sector offsets for uniform sector type */
- for (i = 0; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00040000);
- }
- } else if (info->flash_id & FLASH_BTYPE) {
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00008000;
- info->start[2] = base + 0x0000C000;
- info->start[3] = base + 0x00010000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00020000) - 0x00060000;
- }
- } else {
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- info->start[i--] = base + info->size - 0x00008000;
- info->start[i--] = base + info->size - 0x0000C000;
- info->start[i--] = base + info->size - 0x00010000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00020000;
- }
- }
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD: printf ("AMD "); break;
- case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
- case FLASH_MAN_BM: printf ("BRIGHT MICRO "); break;
- default: printf ("Unknown Vendor "); break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM040: printf ("29F040 or 29LV040 (4 Mbit, uniform sectors)\n");
- break;
- case FLASH_AM400B: printf ("AM29LV400B (4 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM400T: printf ("AM29LV400T (4 Mbit, top boot sector)\n");
- break;
- case FLASH_AM800B: printf ("AM29LV800B (8 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM800T: printf ("AM29LV800T (8 Mbit, top boot sector)\n");
- break;
- case FLASH_AM160B: printf ("AM29LV160B (16 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM160T: printf ("AM29LV160T (16 Mbit, top boot sector)\n");
- break;
- case FLASH_AM320B: printf ("AM29LV320B (32 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM320T: printf ("AM29LV320T (32 Mbit, top boot sector)\n");
- break;
- default: printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " "
- );
- }
- printf ("\n");
-}
-
-/*-----------------------------------------------------------------------
- */
-
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-
-static ulong flash_get_size (vu_long *addr, flash_info_t *info)
-{
- short i;
- ulong value;
- ulong base = (ulong)addr;
-
- /* Write auto select command: read Manufacturer ID */
- addr[0x0555] = 0x00AA00AA;
- addr[0x02AA] = 0x00550055;
- addr[0x0555] = 0x00900090;
-
- value = addr[0];
-
- DEBUGF("Manuf. ID @ 0x%08lx: 0x%08lx\n", (ulong)addr, value);
-
- switch (value) {
- case AMD_MANUFACT:
- info->flash_id = FLASH_MAN_AMD;
- break;
- case FUJ_MANUFACT:
- info->flash_id = FLASH_MAN_FUJ;
- break;
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- return (0); /* no or unknown flash */
- }
-
- value = addr[1]; /* device ID */
-
- DEBUGF("Device ID @ 0x%08lx: 0x%08lx\n", (ulong)(&addr[1]), value);
-
- switch (value) {
- case AMD_ID_F040B:
- info->flash_id += FLASH_AM040;
- info->sector_count = 8;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case AMD_ID_LV400T:
- info->flash_id += FLASH_AM400T;
- info->sector_count = 11;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case AMD_ID_LV400B:
- info->flash_id += FLASH_AM400B;
- info->sector_count = 11;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case AMD_ID_LV800T:
- info->flash_id += FLASH_AM800T;
- info->sector_count = 19;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case AMD_ID_LV800B:
- info->flash_id += FLASH_AM800B;
- info->sector_count = 19;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case AMD_ID_LV160T:
- info->flash_id += FLASH_AM160T;
- info->sector_count = 35;
- info->size = 0x00400000;
- break; /* => 4 MB */
-
- case AMD_ID_LV160B:
- info->flash_id += FLASH_AM160B;
- info->sector_count = 35;
- info->size = 0x00400000;
- break; /* => 4 MB */
-#if 0 /* enable when device IDs are available */
- case AMD_ID_LV320T:
- info->flash_id += FLASH_AM320T;
- info->sector_count = 67;
- info->size = 0x00800000;
- break; /* => 8 MB */
-
- case AMD_ID_LV320B:
- info->flash_id += FLASH_AM320B;
- info->sector_count = 67;
- info->size = 0x00800000;
- break; /* => 8 MB */
-#endif
- default:
- info->flash_id = FLASH_UNKNOWN;
- return (0); /* => no or unknown flash */
- }
-
- /* set up sector start address table */
- if (info->flash_id & FLASH_BTYPE) {
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00008000;
- info->start[2] = base + 0x0000C000;
- info->start[3] = base + 0x00010000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00020000) - 0x00060000;
- }
- } else {
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- info->start[i--] = base + info->size - 0x00008000;
- info->start[i--] = base + info->size - 0x0000C000;
- info->start[i--] = base + info->size - 0x00010000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00020000;
- }
- }
-
- /* check for protected sectors */
- for (i = 0; i < info->sector_count; i++) {
- /* read sector protection at sector address, (A7 .. A0) = 0x02 */
- /* D0 = 1 if protected */
- addr = (volatile unsigned long *)(info->start[i]);
- info->protect[i] = addr[2] & 1;
- }
-
- /*
- * Prevent writes to uninitialized FLASH.
- */
- if (info->flash_id != FLASH_UNKNOWN) {
- addr = (volatile unsigned long *)info->start[0];
-
- *addr = 0x00F000F0; /* reset bank */
- }
-
- return (info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- vu_long *addr = (vu_long*)(info->start[0]);
- int flag, prot, sect, l_sect;
- ulong start, now, last;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- if ((info->flash_id == FLASH_UNKNOWN) ||
- (info->flash_id > FLASH_AMD_COMP)) {
- printf ("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- l_sect = -1;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[0x0555] = 0x00AA00AA;
- addr[0x02AA] = 0x00550055;
- addr[0x0555] = 0x00800080;
- addr[0x0555] = 0x00AA00AA;
- addr[0x02AA] = 0x00550055;
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr = (vu_long*)(info->start[sect]);
- addr[0] = 0x00300030;
- l_sect = sect;
- }
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- /*
- * We wait for the last triggered sector
- */
- if (l_sect < 0)
- goto DONE;
-
- start = get_timer (0);
- last = start;
- addr = (vu_long*)(info->start[l_sect]);
- while ((addr[0] & 0x00800080) != 0x00800080) {
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- return 1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- }
-
-DONE:
- /* reset to read mode */
- addr = (volatile unsigned long *)info->start[0];
- addr[0] = 0x00F000F0; /* reset bank */
-
- printf (" done\n");
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int i, l, rc;
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
- for (; i<4 && cnt>0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = 0;
- for (i=0; i<4; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- return (write_word(info, wp, data));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word (flash_info_t *info, ulong dest, ulong data)
-{
- vu_long *addr = (vu_long*)(info->start[0]);
- ulong start;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*((vu_long *)dest) & data) != data) {
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[0x0555] = 0x00AA00AA;
- addr[0x02AA] = 0x00550055;
- addr[0x0555] = 0x00A000A0;
-
- *((vu_long *)dest) = data;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* data polling for D7 */
- start = get_timer (0);
- while ((*((vu_long *)dest) & 0x00800080) != (data & 0x00800080)) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- return (1);
- }
- }
- return (0);
-}
-
-/*-----------------------------------------------------------------------
- */
diff --git a/board/westel/amx860/u-boot.lds b/board/westel/amx860/u-boot.lds
deleted file mode 100644
index cdf550f67b..0000000000
--- a/board/westel/amx860/u-boot.lds
+++ /dev/null
@@ -1,141 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc8xx/start.o (.text)
- common/dlmalloc.o (.text)
- lib_ppc/ppcstring.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
- lib_generic/zlib.o (.text)
-
- . = env_offset;
- common/environment.o(.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/westel/amx860/u-boot.lds.debug b/board/westel/amx860/u-boot.lds.debug
deleted file mode 100644
index 87f228beed..0000000000
--- a/board/westel/amx860/u-boot.lds.debug
+++ /dev/null
@@ -1,138 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc8xx/start.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/extable.o (.text)
-
- . = env_offset;
- common/environment.o(.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/xaeniax/Makefile b/board/xaeniax/Makefile
deleted file mode 100644
index 7c5f0cd1a1..0000000000
--- a/board/xaeniax/Makefile
+++ /dev/null
@@ -1,47 +0,0 @@
-#
-# (C) Copyright 2000, 2002
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := xaeniax.o flash.o
-SOBJS := lowlevel_init.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS) $(SOBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/xaeniax/config.mk b/board/xaeniax/config.mk
deleted file mode 100644
index 45079a079e..0000000000
--- a/board/xaeniax/config.mk
+++ /dev/null
@@ -1,2 +0,0 @@
-TEXT_BASE = 0xa3FB0000
-#TEXT_BASE = 0
diff --git a/board/xaeniax/flash.c b/board/xaeniax/flash.c
deleted file mode 100644
index 9874a14fb3..0000000000
--- a/board/xaeniax/flash.c
+++ /dev/null
@@ -1,431 +0,0 @@
-/*
- * (C) Copyright 2001
- * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
- *
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <linux/byteorder/swab.h>
-
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/* Board support for 1 or 2 flash devices */
-#define FLASH_PORT_WIDTH32
-#undef FLASH_PORT_WIDTH16
-
-#ifdef FLASH_PORT_WIDTH16
-#define FLASH_PORT_WIDTH ushort
-#define FLASH_PORT_WIDTHV vu_short
-#define SWAP(x) __swab16(x)
-#else
-#define FLASH_PORT_WIDTH ulong
-#define FLASH_PORT_WIDTHV vu_long
-#define SWAP(x) __swab32(x)
-#endif
-
-#define FPW FLASH_PORT_WIDTH
-#define FPWV FLASH_PORT_WIDTHV
-
-#define mb() __asm__ __volatile__ ("" : : : "memory")
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (FPW *addr, flash_info_t *info);
-static int write_data (flash_info_t *info, ulong dest, FPW data);
-static void flash_get_offsets (ulong base, flash_info_t *info);
-void inline spin_wheel (void);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- int i;
- ulong size = 0;
-
- for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
- switch (i) {
- case 0:
- flash_get_size ((FPW *) PHYS_FLASH_1, &flash_info[i]);
- flash_get_offsets (PHYS_FLASH_1, &flash_info[i]);
- break;
- case 1:
- flash_get_size ((FPW *) PHYS_FLASH_2, &flash_info[i]);
- flash_get_offsets (PHYS_FLASH_2, &flash_info[i]);
- break;
- default:
- panic ("configured too many flash banks!\n");
- break;
- }
- size += flash_info[i].size;
- }
-
- /* Protect monitor and environment sectors
- */
- flash_protect ( FLAG_PROTECT_SET,
- CFG_FLASH_BASE,
- CFG_FLASH_BASE + monitor_flash_len - 1,
- &flash_info[0] );
-
- flash_protect ( FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0] );
-
- return size;
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_get_offsets (ulong base, flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- return;
- }
-
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
- for (i = 0; i < info->sector_count; i++) {
- info->start[i] = base + (i * PHYS_FLASH_SECT_SIZE);
- info->protect[i] = 0;
- }
- }
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_INTEL:
- printf ("INTEL ");
- break;
- default:
- printf ("Unknown Vendor ");
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_28F128J3A:
- printf ("28F128J3A\n");
- break;
- default:
- printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " ");
- }
- printf ("\n");
- return;
-}
-
-/*
- * The following code cannot be run from FLASH!
- */
-static ulong flash_get_size (FPW *addr, flash_info_t *info)
-{
- volatile FPW value;
-
- /* Write auto select command: read Manufacturer ID */
- addr[0x5555] = (FPW) 0x00AA00AA;
- addr[0x2AAA] = (FPW) 0x00550055;
- addr[0x5555] = (FPW) 0x00900090;
-
- mb ();
- value = addr[0];
-
- switch (value) {
-
- case (FPW) INTEL_MANUFACT:
- info->flash_id = FLASH_MAN_INTEL;
- break;
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
- return (0); /* no or unknown flash */
- }
-
- mb ();
- value = addr[1]; /* device ID */
-
- switch (value) {
-
- case (FPW) INTEL_ID_28F128J3A:
- info->flash_id += FLASH_28F128J3A;
- info->sector_count = 128;
- info->size = 0x02000000;
- break; /* => 16 MB */
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- break;
- }
-
- if (info->sector_count > CFG_MAX_FLASH_SECT) {
- printf ("** ERROR: sector count %d > max (%d) **\n",
- info->sector_count, CFG_MAX_FLASH_SECT);
- info->sector_count = CFG_MAX_FLASH_SECT;
- }
-
- addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
-
- return (info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- int flag, prot, sect;
- ulong type, start, last;
- int rcode = 0;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- type = (info->flash_id & FLASH_VENDMASK);
- if ((type != FLASH_MAN_INTEL)) {
- printf ("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- return 1;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- start = get_timer (0);
- last = start;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- FPWV *addr = (FPWV *) (info->start[sect]);
- FPW status;
-
- printf ("Erasing sector %2d ... ", sect);
-
- /* arm simple, non interrupt dependent timer */
- reset_timer_masked ();
-
- *addr = (FPW) 0x00500050; /* clear status register */
- *addr = (FPW) 0x00200020; /* erase setup */
- *addr = (FPW) 0x00D000D0; /* erase confirm */
-
- while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
- if (get_timer_masked () > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- *addr = (FPW) 0x00B000B0; /* suspend erase */
- *addr = (FPW) 0x00FF00FF; /* reset to read mode */
- rcode = 1;
- break;
- }
- }
-
- *addr = 0x00500050; /* clear status register cmd. */
- *addr = 0x00FF00FF; /* resest to read mode */
-
- printf (" done\n");
- }
- }
- return rcode;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- * 4 - Flash not identified
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp;
- FPW data;
- int count, i, l, rc, port_width;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- return 4;
- }
-/* get lower word aligned address */
-#ifdef FLASH_PORT_WIDTH16
- wp = (addr & ~1);
- port_width = 2;
-#else
- wp = (addr & ~3);
- port_width = 4;
-#endif
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i = 0, cp = wp; i < l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
- for (; i < port_width && cnt > 0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt == 0 && i < port_width; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
-
- if ((rc = write_data (info, wp, SWAP (data))) != 0) {
- return (rc);
- }
- wp += port_width;
- }
-
- /*
- * handle word aligned part
- */
- count = 0;
- while (cnt >= port_width) {
- data = 0;
- for (i = 0; i < port_width; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_data (info, wp, SWAP (data))) != 0) {
- return (rc);
- }
- wp += port_width;
- cnt -= port_width;
- if (count++ > 0x800) {
- spin_wheel ();
- count = 0;
- }
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i < port_width; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
-
- return (write_data (info, wp, SWAP (data)));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word or halfword to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_data (flash_info_t *info, ulong dest, FPW data)
-{
- FPWV *addr = (FPWV *) dest;
- ulong status;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*addr & data) != data) {
- printf ("not erased at %08lx (%lx)\n", (ulong) addr, *addr);
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
-
- *addr = (FPW) 0x00400040; /* write setup */
- *addr = data;
-
- /* arm simple, non interrupt dependent timer */
- reset_timer_masked ();
-
- /* wait while polling the status register */
- while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
- if (get_timer_masked () > CFG_FLASH_WRITE_TOUT) {
- *addr = (FPW) 0x00FF00FF; /* restore read mode */
- return (1);
- }
- }
-
- *addr = (FPW) 0x00FF00FF; /* restore read mode */
-
- return (0);
-}
-
-void inline spin_wheel (void)
-{
- static int p = 0;
- static char w[] = "\\/-";
-
- printf ("\010%c", w[p]);
- (++p == 3) ? (p = 0) : 0;
-}
diff --git a/board/xaeniax/lowlevel_init.S b/board/xaeniax/lowlevel_init.S
deleted file mode 100644
index fe3e7128a4..0000000000
--- a/board/xaeniax/lowlevel_init.S
+++ /dev/null
@@ -1,424 +0,0 @@
- /*
- * Most of this taken from Redboot hal_platform_setup.h with cleanup
- *
- * NOTE: I haven't clean this up considerably, just enough to get it
- * running. See hal_platform_setup.h for the source. See
- * board/cradle/lowlevel_init.S for another PXA250 setup that is
- * much cleaner.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <config.h>
-#include <version.h>
-#include <asm/arch/pxa-regs.h>
-
-DRAM_SIZE: .long CFG_DRAM_SIZE
-
-/* wait for coprocessor write complete */
- .macro CPWAIT reg
- mrc p15,0,\reg,c2,c0,0
- mov \reg,\reg
- sub pc,pc,#4
- .endm
-
-
-.globl lowlevel_init
-lowlevel_init:
-
- mov r10, lr
-
- /* Set up GPIO pins first ----------------------------------------- */
-
- ldr r0,=GPSR0
- ldr r1,=CFG_GPSR0_VAL
- str r1,[r0]
-
- ldr r0,=GPSR1
- ldr r1,=CFG_GPSR1_VAL
- str r1,[r0]
-
- ldr r0,=GPSR2
- ldr r1,=CFG_GPSR2_VAL
- str r1,[r0]
-
- ldr r0,=GPCR0
- ldr r1,=CFG_GPCR0_VAL
- str r1,[r0]
-
- ldr r0,=GPCR1
- ldr r1,=CFG_GPCR1_VAL
- str r1,[r0]
-
- ldr r0,=GPCR2
- ldr r1,=CFG_GPCR2_VAL
- str r1,[r0]
-
- ldr r0,=GPDR0
- ldr r1,=CFG_GPDR0_VAL
- str r1,[r0]
-
- ldr r0,=GPDR1
- ldr r1,=CFG_GPDR1_VAL
- str r1,[r0]
-
- ldr r0,=GPDR2
- ldr r1,=CFG_GPDR2_VAL
- str r1,[r0]
-
- ldr r0,=GAFR0_L
- ldr r1,=CFG_GAFR0_L_VAL
- str r1,[r0]
-
- ldr r0,=GAFR0_U
- ldr r1,=CFG_GAFR0_U_VAL
- str r1,[r0]
-
- ldr r0,=GAFR1_L
- ldr r1,=CFG_GAFR1_L_VAL
- str r1,[r0]
-
- ldr r0,=GAFR1_U
- ldr r1,=CFG_GAFR1_U_VAL
- str r1,[r0]
-
- ldr r0,=GAFR2_L
- ldr r1,=CFG_GAFR2_L_VAL
- str r1,[r0]
-
- ldr r0,=GAFR2_U
- ldr r1,=CFG_GAFR2_U_VAL
- str r1,[r0]
-
- ldr r0,=PSSR /* enable GPIO pins */
- ldr r1,=CFG_PSSR_VAL
- str r1,[r0]
-
- /* ---------------------------------------------------------------- */
- /* Enable memory interface */
- /* */
- /* The sequence below is based on the recommended init steps */
- /* detailed in the Intel PXA250 Operating Systems Developers Guide, */
- /* Chapter 10. */
- /* ---------------------------------------------------------------- */
-
- /* ---------------------------------------------------------------- */
- /* Step 1: Wait for at least 200 microsedonds to allow internal */
- /* clocks to settle. Only necessary after hard reset... */
- /* FIXME: can be optimized later */
- /* ---------------------------------------------------------------- */
-
- ldr r3, =OSCR /* reset the OS Timer Count to zero */
- mov r2, #0
- str r2, [r3]
- ldr r4, =0x300 /* really 0x2E1 is about 200usec, */
- /* so 0x300 should be plenty */
-1:
- ldr r2, [r3]
- cmp r4, r2
- bgt 1b
-
-mem_init:
-
- ldr r1,=MEMC_BASE /* get memory controller base addr. */
-
- /* ---------------------------------------------------------------- */
- /* Step 2a: Initialize Asynchronous static memory controller */
- /* ---------------------------------------------------------------- */
-
- /* MSC registers: timing, bus width, mem type */
-
- /* MSC0: nCS(0,1) */
- ldr r2,=CFG_MSC0_VAL
- str r2,[r1, #MSC0_OFFSET]
- ldr r2,[r1, #MSC0_OFFSET] /* read back to ensure data latches */
-
- /* MSC1: nCS(2,3) */
- ldr r2,=CFG_MSC1_VAL
- str r2,[r1, #MSC1_OFFSET]
- ldr r2,[r1, #MSC1_OFFSET]
-
- /* MSC2: nCS(4,5) */
- ldr r2,=CFG_MSC2_VAL
- str r2,[r1, #MSC2_OFFSET]
- ldr r2,[r1, #MSC2_OFFSET]
-
- /* ---------------------------------------------------------------- */
- /* Step 2b: Initialize Card Interface */
- /* ---------------------------------------------------------------- */
-
- /* MECR: Memory Expansion Card Register */
- ldr r2,=CFG_MECR_VAL
- str r2,[r1, #MECR_OFFSET]
- ldr r2,[r1, #MECR_OFFSET]
-
- /* MCMEM0: Card Interface slot 0 timing */
- ldr r2,=CFG_MCMEM0_VAL
- str r2,[r1, #MCMEM0_OFFSET]
- ldr r2,[r1, #MCMEM0_OFFSET]
-
- /* MCMEM1: Card Interface slot 1 timing */
- ldr r2,=CFG_MCMEM1_VAL
- str r2,[r1, #MCMEM1_OFFSET]
- ldr r2,[r1, #MCMEM1_OFFSET]
-
- /* MCATT0: Card Interface Attribute Space Timing, slot 0 */
- ldr r2,=CFG_MCATT0_VAL
- str r2,[r1, #MCATT0_OFFSET]
- ldr r2,[r1, #MCATT0_OFFSET]
-
- /* MCATT1: Card Interface Attribute Space Timing, slot 1 */
- ldr r2,=CFG_MCATT1_VAL
- str r2,[r1, #MCATT1_OFFSET]
- ldr r2,[r1, #MCATT1_OFFSET]
-
- /* MCIO0: Card Interface I/O Space Timing, slot 0 */
- ldr r2,=CFG_MCIO0_VAL
- str r2,[r1, #MCIO0_OFFSET]
- ldr r2,[r1, #MCIO0_OFFSET]
-
- /* MCIO1: Card Interface I/O Space Timing, slot 1 */
- ldr r2,=CFG_MCIO1_VAL
- str r2,[r1, #MCIO1_OFFSET]
- ldr r2,[r1, #MCIO1_OFFSET]
-
- /* ---------------------------------------------------------------- */
- /* Step 2c: Write FLYCNFG FIXME: what's that??? */
- /* ---------------------------------------------------------------- */
-
- /* ---------------------------------------------------------------- */
- /* Step 2d: Initialize Timing for Sync Memory (SDCLK0) */
- /* ---------------------------------------------------------------- */
-
- @ get the mdrefr settings
- ldr r4,=CFG_MDREFR_VAL
-
- @ write back mdrefr
- str r4,[r1, #MDREFR_OFFSET]
- ldr r4,[r1, #MDREFR_OFFSET]
-
- /* ---------------------------------------------------------------- */
- /* Step 3: Initialize Synchronous Static Memory (Flash/Peripherals) */
- /* ---------------------------------------------------------------- */
-
- /* Initialize SXCNFG register. Assert the enable bits */
-
- /* Write SXMRS to cause an MRS command to all enabled banks of */
- /* synchronous static memory. Note that SXLCR need not be written */
- /* at this time. */
-
- /* FIXME: we use async mode for now */
-
- /* ---------------------------------------------------------------- */
- /* Step 4: Initialize SDRAM */
- /* ---------------------------------------------------------------- */
-
- @ set K1RUN for bank 0
- @
- orr r4, r4, #MDREFR_K1RUN
-
- @ write back mdrefr
- @
- str r4, [r1, #MDREFR_OFFSET]
- ldr r4, [r1, #MDREFR_OFFSET]
-
- @ deassert SLFRSH
- @
- bic r4, r4, #MDREFR_SLFRSH
-
- @ write back mdrefr
- @
- str r4, [r1, #MDREFR_OFFSET]
- ldr r4, [r1, #MDREFR_OFFSET]
-
- @ assert E1PIN
- @ if E0PIN is also used: #(MDREFR_E1PIN|MDREFR_E0PIN)
- orr r4, r4, #(MDREFR_E1PIN)
-
- @ write back mdrefr
- @
- str r4, [r1, #MDREFR_OFFSET]
- ldr r4, [r1, #MDREFR_OFFSET]
- nop
- nop
-
- /* Step 4d: */
- /* fetch platform value of mdcnfg */
- @
- ldr r2, =CFG_MDCNFG_VAL
-
- @ disable all sdram banks
- @
- bic r2, r2, #(MDCNFG_DE0 | MDCNFG_DE1)
- bic r2, r2, #(MDCNFG_DE2 | MDCNFG_DE3)
-
- @ program banks 0/1 for bus width
- @
- bic r2, r2, #MDCNFG_DWID0 @0=32-bit
-
- @ write initial value of mdcnfg, w/o enabling sdram banks
- @
- str r2, [r1, #MDCNFG_OFFSET]
-
- /* Step 4e: Wait for the clock to the SDRAMs to stabilize, */
- /* 100..200 µsec. */
-
- ldr r3, =OSCR /* reset the OS Timer Count to zero */
- mov r2, #0
- str r2, [r3]
- ldr r4, =0x300 /* really 0x2E1 is about 200usec, */
- /* so 0x300 should be plenty */
-1:
- ldr r2, [r3]
- cmp r4, r2
- bgt 1b
-
-
- /* Step 4f: Trigger a number (usually 8) refresh cycles by */
- /* attempting non-burst read or write accesses to disabled */
- /* SDRAM, as commonly specified in the power up sequence */
- /* documented in SDRAM data sheets. The address(es) used */
- /* for this purpose must not be cacheable. */
-
- ldr r3, =CFG_DRAM_BASE
- str r2, [r3]
- str r2, [r3]
- str r2, [r3]
- str r2, [r3]
- str r2, [r3]
- str r2, [r3]
- str r2, [r3]
- str r2, [r3]
- str r2, [r3]
-
-
- /* Step 4g: Write MDCNFG with enable bits asserted */
- /* get memory controller base address */
- ldr r1, =MEMC_BASE
-
- @fetch current mdcnfg value
- @
- ldr r3, [r1, #MDCNFG_OFFSET]
-
- @enable sdram bank 0 if installed (must do for any populated bank)
- @
- orr r3, r3, #MDCNFG_DE0
-
- @write back mdcnfg, enabling the sdram bank(s)
- @
- str r3, [r1, #MDCNFG_OFFSET]
-
- /* Step 4h: Write MDMRS. */
-
- ldr r2, =CFG_MDMRS_VAL
- str r2, [r1, #MDMRS_OFFSET]
-
-
- /* We are finished with Intel's memory controller initialisation */
-
-
- /* ---------------------------------------------------------------- */
- /* Disable (mask) all interrupts at interrupt controller */
- /* ---------------------------------------------------------------- */
-
-initirqs:
- mov r1, #0 /* clear int. level register (IRQ, not FIQ) */
- ldr r2, =ICLR
- str r1, [r2]
-
- ldr r1, =CFG_ICMR_VAL /* mask all interrupts at the controller */
- ldr r2, =ICMR
- str r1, [r2]
-
-
- /* ---------------------------------------------------------------- */
- /* Clock initialisation */
- /* ---------------------------------------------------------------- */
-
-initclks:
-
- /* Disable the peripheral clocks, and set the core clock frequency */
- /* (hard-coding at 398.12MHz for now). */
- /* Turn Off ALL on-chip peripheral clocks for re-configuration */
- /* Note: See label 'ENABLECLKS' for the re-enabling */
- ldr r1, =CKEN
- mov r2, #0
- str r2, [r1]
-
-
- /* default value */
- ldr r2, =(CCCR_L27|CCCR_M2|CCCR_N10) /* DEFAULT: {200/200/100} */
-
- /* ... and write the core clock config register */
- ldr r1, =CCCR
- str r2, [r1]
-
-#ifdef RTC
- /* enable the 32Khz oscillator for RTC and PowerManager */
-
- ldr r1, =OSCC
- mov r2, #OSCC_OON
- str r2, [r1]
-
- /* NOTE: spin here until OSCC.OOK get set, meaning the PLL */
- /* has settled. */
-60:
- ldr r2, [r1]
- ands r2, r2, #1
- beq 60b
-#endif
-
- @ Turn on needed clocks
- @
-test:
- ldr r1, =CKEN
- ldr r2, =CFG_CKEN_VAL
- str r2, [r1]
-
- /* ---------------------------------------------------------------- */
- /* */
- /* ---------------------------------------------------------------- */
-
- /* Save SDRAM size ?*/
- ldr r1, =DRAM_SIZE
- str r8, [r1]
-
- /* FIXME */
-
-#define NODEBUG
-#ifdef NODEBUG
- /*Disable software and data breakpoints */
- mov r0,#0
- mcr p15,0,r0,c14,c8,0 /* ibcr0 */
- mcr p15,0,r0,c14,c9,0 /* ibcr1 */
- mcr p15,0,r0,c14,c4,0 /* dbcon */
-
- /*Enable all debug functionality */
- mov r0,#0x80000000
- mcr p14,0,r0,c10,c0,0 /* dcsr */
-
-#endif
-
- /* ---------------------------------------------------------------- */
- /* End lowlevel_init */
- /* ---------------------------------------------------------------- */
-
-endlowlevel_init:
-
- mov pc, lr
diff --git a/board/xaeniax/u-boot.lds b/board/xaeniax/u-boot.lds
deleted file mode 100644
index f0102391b3..0000000000
--- a/board/xaeniax/u-boot.lds
+++ /dev/null
@@ -1,56 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-ENTRY(_start)
-SECTIONS
-{
- . = 0x00000000;
-
- . = ALIGN(4);
- .text :
- {
- cpu/pxa/start.o (.text)
- *(.text)
- }
-
- . = ALIGN(4);
- .rodata : { *(.rodata) }
-
- . = ALIGN(4);
- .data : { *(.data) }
-
- . = ALIGN(4);
- .got : { *(.got) }
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = ALIGN(4);
- __bss_start = .;
- .bss : { *(.bss) }
- _end = .;
-}
diff --git a/board/xaeniax/xaeniax.c b/board/xaeniax/xaeniax.c
deleted file mode 100644
index 26fb312fd0..0000000000
--- a/board/xaeniax/xaeniax.c
+++ /dev/null
@@ -1,78 +0,0 @@
-/*
- * (C) Copyright 2004
- * Vincent Dubey, Xa SA, vincent.dubey@xa-ch.com
- *
- * (C) Copyright 2002
- * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
- *
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-
-/* ------------------------------------------------------------------------- */
-
-
-/*
- * Miscelaneous platform dependent initialisations
- */
-
-int board_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- /* memory and cpu-speed are setup before relocation */
- /* so we do _nothing_ here */
-
- /* arch number of xaeniax */
- gd->bd->bi_arch_number = 585;
-
- /* adress of boot parameters */
- gd->bd->bi_boot_params = 0xa0000100;
-
- return 0;
-}
-
-int board_late_init(void)
-{
- setenv("stdout", "serial");
- setenv("stderr", "serial");
- return 0;
-}
-
-
-int dram_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
- /* gd->bd->bi_dram[1].start = PHYS_SDRAM_2;*/
- /* gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;*/
- /* gd->bd->bi_dram[2].start = PHYS_SDRAM_3; */
- /* gd->bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE; */
- /* gd->bd->bi_dram[3].start = PHYS_SDRAM_4; */
- /* gd->bd->bi_dram[3].size = PHYS_SDRAM_4_SIZE; */
-
- return 0;
-}
diff --git a/board/xilinx/common/xbasic_types.c b/board/xilinx/common/xbasic_types.c
deleted file mode 100644
index c3a171a356..0000000000
--- a/board/xilinx/common/xbasic_types.c
+++ /dev/null
@@ -1,165 +0,0 @@
-/******************************************************************************
-*
-* Author: Xilinx, Inc.
-*
-*
-* This program is free software; you can redistribute it and/or modify it
-* under the terms of the GNU General Public License as published by the
-* Free Software Foundation; either version 2 of the License, or (at your
-* option) any later version.
-*
-*
-* XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A
-* COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS
-* ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD,
-* XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE
-* FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING
-* ANY THIRD PARTY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.
-* XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO
-* THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY
-* WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM
-* CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND
-* FITNESS FOR A PARTICULAR PURPOSE.
-*
-*
-* Xilinx hardware products are not intended for use in life support
-* appliances, devices, or systems. Use in such applications is
-* expressly prohibited.
-*
-*
-* (c) Copyright 2002-2004 Xilinx Inc.
-* All rights reserved.
-*
- *
-* You should have received a copy of the GNU General Public License along
-* with this program; if not, write to the Free Software Foundation, Inc.,
-* 675 Mass Ave, Cambridge, MA 02139, USA.
-*
-******************************************************************************/
-/*****************************************************************************/
-/**
-*
-* @file xbasic_types.c
-*
-* This file contains basic functions for Xilinx software IP.
-*
-* <pre>
-* MODIFICATION HISTORY:
-*
-* Ver Who Date Changes
-* ----- ---- -------- -------------------------------------------------------
-* 1.00a rpm 11/07/03 Added XNullHandler function as a stub interrupt handler
-* </pre>
-*
-******************************************************************************/
-
-/***************************** Include Files *********************************/
-
-#include "xbasic_types.h"
-
-/************************** Constant Definitions *****************************/
-
-/**************************** Type Definitions *******************************/
-
-/***************** Macros (Inline Functions) Definitions *********************/
-
-/************************** Variable Definitions *****************************/
-
-/**
- * This variable allows testing to be done easier with asserts. An assert
- * sets this variable such that a driver can evaluate this variable
- * to determine if an assert occurred.
- */
-unsigned int XAssertStatus;
-
-/**
- * This variable allows the assert functionality to be changed for testing
- * such that it does not wait infinitely. Use the debugger to disable the
- * waiting during testing of asserts.
- */
-u32 XWaitInAssert = TRUE;
-
-/* The callback function to be invoked when an assert is taken */
-static XAssertCallback XAssertCallbackRoutine = (XAssertCallback) NULL;
-
-/************************** Function Prototypes ******************************/
-
-/*****************************************************************************/
-/**
-*
-* Implements assert. Currently, it calls a user-defined callback function
-* if one has been set. Then, it potentially enters an infinite loop depending
-* on the value of the XWaitInAssert variable.
-*
-* @param File is the name of the filename of the source
-* @param Line is the linenumber within File
-*
-* @return
-*
-* None.
-*
-* @note
-*
-* None.
-*
-******************************************************************************/
-void
-XAssert(char *File, int Line)
-{
- /* if the callback has been set then invoke it */
- if (XAssertCallbackRoutine != NULL) {
- (*XAssertCallbackRoutine) (File, Line);
- }
-
- /* if specified, wait indefinitely such that the assert will show up
- * in testing
- */
- while (XWaitInAssert) {
- }
-}
-
-/*****************************************************************************/
-/**
-*
-* Sets up a callback function to be invoked when an assert occurs. If there
-* was already a callback installed, then it is replaced.
-*
-* @param Routine is the callback to be invoked when an assert is taken
-*
-* @return
-*
-* None.
-*
-* @note
-*
-* This function has no effect if NDEBUG is set
-*
-******************************************************************************/
-void
-XAssertSetCallback(XAssertCallback Routine)
-{
- XAssertCallbackRoutine = Routine;
-}
-
-/*****************************************************************************/
-/**
-*
-* Null handler function. This follows the XInterruptHandler signature for
-* interrupt handlers. It can be used to assign a null handler (a stub) to an
-* interrupt controller vector table.
-*
-* @param NullParameter is an arbitrary void pointer and not used.
-*
-* @return
-*
-* None.
-*
-* @note
-*
-* None.
-*
-******************************************************************************/
-void
-XNullHandler(void *NullParameter)
-{
-}
diff --git a/board/xilinx/common/xbasic_types.h b/board/xilinx/common/xbasic_types.h
deleted file mode 100644
index ef0b7c255f..0000000000
--- a/board/xilinx/common/xbasic_types.h
+++ /dev/null
@@ -1,283 +0,0 @@
-/******************************************************************************
-*
-* Author: Xilinx, Inc.
-*
-*
-* This program is free software; you can redistribute it and/or modify it
-* under the terms of the GNU General Public License as published by the
-* Free Software Foundation; either version 2 of the License, or (at your
-* option) any later version.
-*
-*
-* XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A
-* COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS
-* ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD,
-* XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE
-* FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING
-* ANY THIRD PARTY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.
-* XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO
-* THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY
-* WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM
-* CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND
-* FITNESS FOR A PARTICULAR PURPOSE.
-*
-*
-* Xilinx hardware products are not intended for use in life support
-* appliances, devices, or systems. Use in such applications is
-* expressly prohibited.
-*
-*
-* (c) Copyright 2002-2004 Xilinx Inc.
-* All rights reserved.
-*
-*
-* You should have received a copy of the GNU General Public License along
-* with this program; if not, write to the Free Software Foundation, Inc.,
-* 675 Mass Ave, Cambridge, MA 02139, USA.
-*
-******************************************************************************/
-/*****************************************************************************/
-/**
-*
-* @file xbasic_types.h
-*
-* This file contains basic types for Xilinx software IP. These types do not
-* follow the standard naming convention with respect to using the component
-* name in front of each name because they are considered to be primitives.
-*
-* @note
-*
-* This file contains items which are architecture dependent.
-*
-* <pre>
-* MODIFICATION HISTORY:
-*
-* Ver Who Date Changes
-* ----- ---- -------- -------------------------------------------------------
-* 1.00a rmm 12/14/01 First release
-* rmm 05/09/03 Added "xassert always" macros to rid ourselves of diab
-* compiler warnings
-* 1.00a rpm 11/07/03 Added XNullHandler function as a stub interrupt handler
-* </pre>
-*
-******************************************************************************/
-
-#ifndef XBASIC_TYPES_H /* prevent circular inclusions */
-#define XBASIC_TYPES_H /* by using protection macros */
-
-/***************************** Include Files *********************************/
-
-/************************** Constant Definitions *****************************/
-
-#ifndef TRUE
-#define TRUE 1
-#endif
-#ifndef FALSE
-#define FALSE 0
-#endif
-
-#ifndef NULL
-#define NULL 0
-#endif
-/** Null */
-
-#define XCOMPONENT_IS_READY 0x11111111 /* component has been initialized */
-#define XCOMPONENT_IS_STARTED 0x22222222 /* component has been started */
-
-/* the following constants and declarations are for unit test purposes and are
- * designed to be used in test applications.
- */
-#define XTEST_PASSED 0
-#define XTEST_FAILED 1
-
-#define XASSERT_NONE 0
-#define XASSERT_OCCURRED 1
-
-extern unsigned int XAssertStatus;
-extern void XAssert(char *, int);
-
-/**************************** Type Definitions *******************************/
-
-/** @name Primitive types
- * These primitive types are created for transportability.
- * They are dependent upon the target architecture.
- * @{
- */
-#include <linux/types.h>
-
-typedef struct {
- u32 Upper;
- u32 Lower;
-} Xuint64;
-
-/*@}*/
-
-/**
- * This data type defines an interrupt handler for a device.
- * The argument points to the instance of the component
- */
-typedef void (*XInterruptHandler) (void *InstancePtr);
-
-/**
- * This data type defines a callback to be invoked when an
- * assert occurs. The callback is invoked only when asserts are enabled
- */
-typedef void (*XAssertCallback) (char *FilenamePtr, int LineNumber);
-
-/***************** Macros (Inline Functions) Definitions *********************/
-
-/*****************************************************************************/
-/**
-* Return the most significant half of the 64 bit data type.
-*
-* @param x is the 64 bit word.
-*
-* @return
-*
-* The upper 32 bits of the 64 bit word.
-*
-* @note
-*
-* None.
-*
-******************************************************************************/
-#define XUINT64_MSW(x) ((x).Upper)
-
-/*****************************************************************************/
-/**
-* Return the least significant half of the 64 bit data type.
-*
-* @param x is the 64 bit word.
-*
-* @return
-*
-* The lower 32 bits of the 64 bit word.
-*
-* @note
-*
-* None.
-*
-******************************************************************************/
-#define XUINT64_LSW(x) ((x).Lower)
-
-#ifndef NDEBUG
-
-/*****************************************************************************/
-/**
-* This assert macro is to be used for functions that do not return anything
-* (void). This in conjunction with the XWaitInAssert boolean can be used to
-* accomodate tests so that asserts which fail allow execution to continue.
-*
-* @param expression is the expression to evaluate. If it evaluates to false,
-* the assert occurs.
-*
-* @return
-*
-* Returns void unless the XWaitInAssert variable is true, in which case
-* no return is made and an infinite loop is entered.
-*
-* @note
-*
-* None.
-*
-******************************************************************************/
-#define XASSERT_VOID(expression) \
-{ \
- if (expression) { \
- XAssertStatus = XASSERT_NONE; \
- } else { \
- XAssert(__FILE__, __LINE__); \
- XAssertStatus = XASSERT_OCCURRED; \
- return; \
- } \
-}
-
-/*****************************************************************************/
-/**
-* This assert macro is to be used for functions that do return a value. This in
-* conjunction with the XWaitInAssert boolean can be used to accomodate tests so
-* that asserts which fail allow execution to continue.
-*
-* @param expression is the expression to evaluate. If it evaluates to false,
-* the assert occurs.
-*
-* @return
-*
-* Returns 0 unless the XWaitInAssert variable is true, in which case
-* no return is made and an infinite loop is entered.
-*
-* @note
-*
-* None.
-*
-******************************************************************************/
-#define XASSERT_NONVOID(expression) \
-{ \
- if (expression) { \
- XAssertStatus = XASSERT_NONE; \
- } else { \
- XAssert(__FILE__, __LINE__); \
- XAssertStatus = XASSERT_OCCURRED; \
- return 0; \
- } \
-}
-
-/*****************************************************************************/
-/**
-* Always assert. This assert macro is to be used for functions that do not
-* return anything (void). Use for instances where an assert should always
-* occur.
-*
-* @return
-*
-* Returns void unless the XWaitInAssert variable is true, in which case
-* no return is made and an infinite loop is entered.
-*
-* @note
-*
-* None.
-*
-******************************************************************************/
-#define XASSERT_VOID_ALWAYS() \
-{ \
- XAssert(__FILE__, __LINE__); \
- XAssertStatus = XASSERT_OCCURRED; \
- return; \
-}
-
-/*****************************************************************************/
-/**
-* Always assert. This assert macro is to be used for functions that do return
-* a value. Use for instances where an assert should always occur.
-*
-* @return
-*
-* Returns void unless the XWaitInAssert variable is true, in which case
-* no return is made and an infinite loop is entered.
-*
-* @note
-*
-* None.
-*
-******************************************************************************/
-#define XASSERT_NONVOID_ALWAYS() \
-{ \
- XAssert(__FILE__, __LINE__); \
- XAssertStatus = XASSERT_OCCURRED; \
- return 0; \
-}
-
-#else
-
-#define XASSERT_VOID(expression)
-#define XASSERT_VOID_ALWAYS()
-#define XASSERT_NONVOID(expression)
-#define XASSERT_NONVOID_ALWAYS()
-#endif
-
-/************************** Function Prototypes ******************************/
-
-void XAssertSetCallback(XAssertCallback Routine);
-void XNullHandler(void *NullParameter);
-
-#endif /* end of protection macro */
diff --git a/board/xilinx/common/xbuf_descriptor.h b/board/xilinx/common/xbuf_descriptor.h
deleted file mode 100644
index fdd51d58d4..0000000000
--- a/board/xilinx/common/xbuf_descriptor.h
+++ /dev/null
@@ -1,252 +0,0 @@
-/******************************************************************************
-*
-* Author: Xilinx, Inc.
-*
-*
-* This program is free software; you can redistribute it and/or modify it
-* under the terms of the GNU General Public License as published by the
-* Free Software Foundation; either version 2 of the License, or (at your
-* option) any later version.
-*
-*
-* XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A
-* COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS
-* ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD,
-* XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE
-* FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING
-* ANY THIRD PARTY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.
-* XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO
-* THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY
-* WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM
-* CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND
-* FITNESS FOR A PARTICULAR PURPOSE.
-*
-*
-* Xilinx hardware products are not intended for use in life support
-* appliances, devices, or systems. Use in such applications is
-* expressly prohibited.
-*
-*
-* (c) Copyright 2002-2004 Xilinx Inc.
-* All rights reserved.
-*
-*
-* You should have received a copy of the GNU General Public License along
-* with this program; if not, write to the Free Software Foundation, Inc.,
-* 675 Mass Ave, Cambridge, MA 02139, USA.
-*
-* FILENAME:
-*
-* xbuf_descriptor.h
-*
-* DESCRIPTION:
-*
-* This file contains the interface for the XBufDescriptor component.
-* The XBufDescriptor component is a passive component that only maps over
-* a buffer descriptor data structure shared by the scatter gather DMA hardware
-* and software. The component's primary purpose is to provide encapsulation of
-* the buffer descriptor processing. See the source file xbuf_descriptor.c for
-* details.
-*
-* NOTES:
-*
-* Most of the functions of this component are implemented as macros in order
-* to optimize the processing. The names are not all uppercase such that they
-* can be switched between macros and functions easily.
-*
-******************************************************************************/
-
-#ifndef XBUF_DESCRIPTOR_H /* prevent circular inclusions */
-#define XBUF_DESCRIPTOR_H /* by using protection macros */
-
-/***************************** Include Files *********************************/
-
-#include "xbasic_types.h"
-#include "xdma_channel_i.h"
-
-/************************** Constant Definitions *****************************/
-
-/* The following constants allow access to all fields of a buffer descriptor
- * and are necessary at this level of visibility to allow macros to access
- * and modify the fields of a buffer descriptor. It is not expected that the
- * user of a buffer descriptor would need to use these constants.
- */
-
-#define XBD_DEVICE_STATUS_OFFSET 0
-#define XBD_CONTROL_OFFSET 1
-#define XBD_SOURCE_OFFSET 2
-#define XBD_DESTINATION_OFFSET 3
-#define XBD_LENGTH_OFFSET 4
-#define XBD_STATUS_OFFSET 5
-#define XBD_NEXT_PTR_OFFSET 6
-#define XBD_ID_OFFSET 7
-#define XBD_FLAGS_OFFSET 8
-#define XBD_RQSTED_LENGTH_OFFSET 9
-
-#define XBD_SIZE_IN_WORDS 10
-
-/*
- * The following constants define the bits of the flags field of a buffer
- * descriptor
- */
-
-#define XBD_FLAGS_LOCKED_MASK 1UL
-
-/**************************** Type Definitions *******************************/
-
-typedef u32 XBufDescriptor[XBD_SIZE_IN_WORDS];
-
-/***************** Macros (Inline Functions) Definitions *********************/
-
-/* each of the following macros are named the same as functions rather than all
- * upper case in order to allow either the macros or the functions to be
- * used, see the source file xbuf_descriptor.c for documentation
- */
-
-#define XBufDescriptor_Initialize(InstancePtr) \
-{ \
- (*((u32 *)InstancePtr + XBD_CONTROL_OFFSET) = 0); \
- (*((u32 *)InstancePtr + XBD_SOURCE_OFFSET) = 0); \
- (*((u32 *)InstancePtr + XBD_DESTINATION_OFFSET) = 0); \
- (*((u32 *)InstancePtr + XBD_LENGTH_OFFSET) = 0); \
- (*((u32 *)InstancePtr + XBD_STATUS_OFFSET) = 0); \
- (*((u32 *)InstancePtr + XBD_DEVICE_STATUS_OFFSET) = 0); \
- (*((u32 *)InstancePtr + XBD_NEXT_PTR_OFFSET) = 0); \
- (*((u32 *)InstancePtr + XBD_ID_OFFSET) = 0); \
- (*((u32 *)InstancePtr + XBD_FLAGS_OFFSET) = 0); \
- (*((u32 *)InstancePtr + XBD_RQSTED_LENGTH_OFFSET) = 0); \
-}
-
-#define XBufDescriptor_GetControl(InstancePtr) \
- (u32)(*((u32 *)InstancePtr + XBD_CONTROL_OFFSET))
-
-#define XBufDescriptor_SetControl(InstancePtr, Control) \
- (*((u32 *)InstancePtr + XBD_CONTROL_OFFSET) = (u32)Control)
-
-#define XBufDescriptor_IsLastControl(InstancePtr) \
- (u32)(*((u32 *)InstancePtr + XBD_CONTROL_OFFSET) & \
- XDC_CONTROL_LAST_BD_MASK)
-
-#define XBufDescriptor_SetLast(InstancePtr) \
- (*((u32 *)InstancePtr + XBD_CONTROL_OFFSET) |= XDC_CONTROL_LAST_BD_MASK)
-
-#define XBufDescriptor_GetSrcAddress(InstancePtr) \
- ((u32 *)(*((u32 *)InstancePtr + XBD_SOURCE_OFFSET)))
-
-#define XBufDescriptor_SetSrcAddress(InstancePtr, Source) \
- (*((u32 *)InstancePtr + XBD_SOURCE_OFFSET) = (u32)Source)
-
-#define XBufDescriptor_GetDestAddress(InstancePtr) \
- ((u32 *)(*((u32 *)InstancePtr + XBD_DESTINATION_OFFSET)))
-
-#define XBufDescriptor_SetDestAddress(InstancePtr, Destination) \
- (*((u32 *)InstancePtr + XBD_DESTINATION_OFFSET) = (u32)Destination)
-
-#define XBufDescriptor_GetLength(InstancePtr) \
- (u32)(*((u32 *)InstancePtr + XBD_RQSTED_LENGTH_OFFSET) - \
- *((u32 *)InstancePtr + XBD_LENGTH_OFFSET))
-
-#define XBufDescriptor_SetLength(InstancePtr, Length) \
-{ \
- (*((u32 *)InstancePtr + XBD_LENGTH_OFFSET) = (u32)(Length)); \
- (*((u32 *)InstancePtr + XBD_RQSTED_LENGTH_OFFSET) = (u32)(Length));\
-}
-
-#define XBufDescriptor_GetStatus(InstancePtr) \
- (u32)(*((u32 *)InstancePtr + XBD_STATUS_OFFSET))
-
-#define XBufDescriptor_SetStatus(InstancePtr, Status) \
- (*((u32 *)InstancePtr + XBD_STATUS_OFFSET) = (u32)Status)
-
-#define XBufDescriptor_IsLastStatus(InstancePtr) \
- (u32)(*((u32 *)InstancePtr + XBD_STATUS_OFFSET) & \
- XDC_STATUS_LAST_BD_MASK)
-
-#define XBufDescriptor_GetDeviceStatus(InstancePtr) \
- ((u32)(*((u32 *)InstancePtr + XBD_DEVICE_STATUS_OFFSET)))
-
-#define XBufDescriptor_SetDeviceStatus(InstancePtr, Status) \
- (*((u32 *)InstancePtr + XBD_DEVICE_STATUS_OFFSET) = (u32)Status)
-
-#define XBufDescriptor_GetNextPtr(InstancePtr) \
- (XBufDescriptor *)(*((u32 *)InstancePtr + XBD_NEXT_PTR_OFFSET))
-
-#define XBufDescriptor_SetNextPtr(InstancePtr, NextPtr) \
- (*((u32 *)InstancePtr + XBD_NEXT_PTR_OFFSET) = (u32)NextPtr)
-
-#define XBufDescriptor_GetId(InstancePtr) \
- (u32)(*((u32 *)InstancePtr + XBD_ID_OFFSET))
-
-#define XBufDescriptor_SetId(InstancePtr, Id) \
- (*((u32 *)InstancePtr + XBD_ID_OFFSET) = (u32)Id)
-
-#define XBufDescriptor_GetFlags(InstancePtr) \
- (u32)(*((u32 *)InstancePtr + XBD_FLAGS_OFFSET))
-
-#define XBufDescriptor_SetFlags(InstancePtr, Flags) \
- (*((u32 *)InstancePtr + XBD_FLAGS_OFFSET) = (u32)Flags)
-
-#define XBufDescriptor_Lock(InstancePtr) \
- (*((u32 *)InstancePtr + XBD_FLAGS_OFFSET) |= XBD_FLAGS_LOCKED_MASK)
-
-#define XBufDescriptor_Unlock(InstancePtr) \
- (*((u32 *)InstancePtr + XBD_FLAGS_OFFSET) &= ~XBD_FLAGS_LOCKED_MASK)
-
-#define XBufDescriptor_IsLocked(InstancePtr) \
- (*((u32 *)InstancePtr + XBD_FLAGS_OFFSET) & XBD_FLAGS_LOCKED_MASK)
-
-/************************** Function Prototypes ******************************/
-
-/* The following prototypes are provided to allow each of the functions to
- * be implemented as a function rather than a macro, and to provide the
- * syntax to allow users to understand how to call the macros, they are
- * commented out to prevent linker errors
- *
-
-u32 XBufDescriptor_Initialize(XBufDescriptor* InstancePtr);
-
-u32 XBufDescriptor_GetControl(XBufDescriptor* InstancePtr);
-void XBufDescriptor_SetControl(XBufDescriptor* InstancePtr, u32 Control);
-
-u32 XBufDescriptor_IsLastControl(XBufDescriptor* InstancePtr);
-void XBufDescriptor_SetLast(XBufDescriptor* InstancePtr);
-
-u32 XBufDescriptor_GetLength(XBufDescriptor* InstancePtr);
-void XBufDescriptor_SetLength(XBufDescriptor* InstancePtr, u32 Length);
-
-u32 XBufDescriptor_GetStatus(XBufDescriptor* InstancePtr);
-void XBufDescriptor_SetStatus(XBufDescriptor* InstancePtr, u32 Status);
-u32 XBufDescriptor_IsLastStatus(XBufDescriptor* InstancePtr);
-
-u32 XBufDescriptor_GetDeviceStatus(XBufDescriptor* InstancePtr);
-void XBufDescriptor_SetDeviceStatus(XBufDescriptor* InstancePtr,
- u32 Status);
-
-u32 XBufDescriptor_GetSrcAddress(XBufDescriptor* InstancePtr);
-void XBufDescriptor_SetSrcAddress(XBufDescriptor* InstancePtr,
- u32 SourceAddress);
-
-u32 XBufDescriptor_GetDestAddress(XBufDescriptor* InstancePtr);
-void XBufDescriptor_SetDestAddress(XBufDescriptor* InstancePtr,
- u32 DestinationAddress);
-
-XBufDescriptor* XBufDescriptor_GetNextPtr(XBufDescriptor* InstancePtr);
-void XBufDescriptor_SetNextPtr(XBufDescriptor* InstancePtr,
- XBufDescriptor* NextPtr);
-
-u32 XBufDescriptor_GetId(XBufDescriptor* InstancePtr);
-void XBufDescriptor_SetId(XBufDescriptor* InstancePtr, u32 Id);
-
-u32 XBufDescriptor_GetFlags(XBufDescriptor* InstancePtr);
-void XBufDescriptor_SetFlags(XBufDescriptor* InstancePtr, u32 Flags);
-
-void XBufDescriptor_Lock(XBufDescriptor* InstancePtr);
-void XBufDescriptor_Unlock(XBufDescriptor* InstancePtr);
-u32 XBufDescriptor_IsLocked(XBufDescriptor* InstancePtr);
-
-void XBufDescriptor_Copy(XBufDescriptor* InstancePtr,
- XBufDescriptor* DestinationPtr);
-
-*/
-
-#endif /* end of protection macro */
diff --git a/board/xilinx/common/xdma_channel.c b/board/xilinx/common/xdma_channel.c
deleted file mode 100644
index 3d5fc75e36..0000000000
--- a/board/xilinx/common/xdma_channel.c
+++ /dev/null
@@ -1,738 +0,0 @@
-/******************************************************************************
-*
-* Author: Xilinx, Inc.
-*
-*
-* This program is free software; you can redistribute it and/or modify it
-* under the terms of the GNU General Public License as published by the
-* Free Software Foundation; either version 2 of the License, or (at your
-* option) any later version.
-*
-*
-* XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A
-* COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS
-* ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD,
-* XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE
-* FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING
-* ANY THIRD PARTY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.
-* XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO
-* THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY
-* WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM
-* CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND
-* FITNESS FOR A PARTICULAR PURPOSE.
-*
-*
-* Xilinx hardware products are not intended for use in life support
-* appliances, devices, or systems. Use in such applications is
-* expressly prohibited.
-*
-*
-* (c) Copyright 2002-2004 Xilinx Inc.
-* All rights reserved.
-*
-*
-* You should have received a copy of the GNU General Public License along
-* with this program; if not, write to the Free Software Foundation, Inc.,
-* 675 Mass Ave, Cambridge, MA 02139, USA.
-*
-* FILENAME:
-*
-* xdma_channel.c
-*
-* DESCRIPTION:
-*
-* This file contains the DMA channel component. This component supports
-* a distributed DMA design in which each device can have it's own dedicated
-* DMA channel, as opposed to a centralized DMA design. This component
-* performs processing for DMA on all devices.
-*
-* See xdma_channel.h for more information about this component.
-*
-* NOTES:
-*
-* None.
-*
-******************************************************************************/
-
-/***************************** Include Files *********************************/
-
-#include "xdma_channel.h"
-#include "xbasic_types.h"
-#include "xio.h"
-
-/************************** Constant Definitions *****************************/
-
-/**************************** Type Definitions *******************************/
-
-/***************** Macros (Inline Functions) Definitions *********************/
-
-/************************** Function Prototypes ******************************/
-
-/******************************************************************************
-*
-* FUNCTION:
-*
-* XDmaChannel_Initialize
-*
-* DESCRIPTION:
-*
-* This function initializes a DMA channel. This function must be called
-* prior to using a DMA channel. Initialization of a channel includes setting
-* up the registers base address, and resetting the channel such that it's in a
-* known state. Interrupts for the channel are disabled when the channel is
-* reset.
-*
-* ARGUMENTS:
-*
-* InstancePtr contains a pointer to the DMA channel to operate on.
-*
-* BaseAddress contains the base address of the registers for the DMA channel.
-*
-* RETURN VALUE:
-*
-* XST_SUCCESS indicating initialization was successful.
-*
-* NOTES:
-*
-* None.
-*
-******************************************************************************/
-XStatus
-XDmaChannel_Initialize(XDmaChannel * InstancePtr, u32 BaseAddress)
-{
- /* assert to verify input arguments, don't assert base address */
-
- XASSERT_NONVOID(InstancePtr != NULL);
-
- /* setup the base address of the registers for the DMA channel such
- * that register accesses can be done
- */
- InstancePtr->RegBaseAddress = BaseAddress;
-
- /* initialize the scatter gather list such that it indicates it has not
- * been created yet and the DMA channel is ready to use (initialized)
- */
- InstancePtr->GetPtr = NULL;
- InstancePtr->PutPtr = NULL;
- InstancePtr->CommitPtr = NULL;
- InstancePtr->LastPtr = NULL;
-
- InstancePtr->TotalDescriptorCount = 0;
- InstancePtr->ActiveDescriptorCount = 0;
- InstancePtr->IsReady = XCOMPONENT_IS_READY;
-
- /* initialize the version of the component
- */
- XVersion_FromString(&InstancePtr->Version, (s8 *)"1.00a");
-
- /* reset the DMA channel such that it's in a known state and ready
- * and indicate the initialization occured with no errors, note that
- * the is ready variable must be set before this call or reset will assert
- */
- XDmaChannel_Reset(InstancePtr);
-
- return XST_SUCCESS;
-}
-
-/******************************************************************************
-*
-* FUNCTION:
-*
-* XDmaChannel_IsReady
-*
-* DESCRIPTION:
-*
-* This function determines if a DMA channel component has been successfully
-* initialized such that it's ready to use.
-*
-* ARGUMENTS:
-*
-* InstancePtr contains a pointer to the DMA channel to operate on.
-*
-* RETURN VALUE:
-*
-* TRUE if the DMA channel component is ready, FALSE otherwise.
-*
-* NOTES:
-*
-* None.
-*
-******************************************************************************/
-u32
-XDmaChannel_IsReady(XDmaChannel * InstancePtr)
-{
- /* assert to verify input arguments used by the base component */
-
- XASSERT_NONVOID(InstancePtr != NULL);
-
- return InstancePtr->IsReady == XCOMPONENT_IS_READY;
-}
-
-/******************************************************************************
-*
-* FUNCTION:
-*
-* XDmaChannel_GetVersion
-*
-* DESCRIPTION:
-*
-* This function gets the software version for the specified DMA channel
-* component.
-*
-* ARGUMENTS:
-*
-* InstancePtr contains a pointer to the DMA channel to operate on.
-*
-* RETURN VALUE:
-*
-* A pointer to the software version of the specified DMA channel.
-*
-* NOTES:
-*
-* None.
-*
-******************************************************************************/
-XVersion *
-XDmaChannel_GetVersion(XDmaChannel * InstancePtr)
-{
- /* assert to verify input arguments */
-
- XASSERT_NONVOID(InstancePtr != NULL);
- XASSERT_NONVOID(InstancePtr->IsReady == XCOMPONENT_IS_READY);
-
- /* return a pointer to the version of the DMA channel */
-
- return &InstancePtr->Version;
-}
-
-/******************************************************************************
-*
-* FUNCTION:
-*
-* XDmaChannel_SelfTest
-*
-* DESCRIPTION:
-*
-* This function performs a self test on the specified DMA channel. This self
-* test is destructive as the DMA channel is reset and a register default is
-* verified.
-*
-* ARGUMENTS:
-*
-* InstancePtr is a pointer to the DMA channel to be operated on.
-*
-* RETURN VALUE:
-*
-* XST_SUCCESS is returned if the self test is successful, or one of the
-* following errors.
-*
-* XST_DMA_RESET_REGISTER_ERROR Indicates the control register value
-* after a reset was not correct
-*
-* NOTES:
-*
-* This test does not performs a DMA transfer to test the channel because the
-* DMA hardware will not currently allow a non-local memory transfer to non-local
-* memory (memory copy), but only allows a non-local memory to or from the device
-* memory (typically a FIFO).
-*
-******************************************************************************/
-
-#define XDC_CONTROL_REG_RESET_MASK 0x98000000UL /* control reg reset value */
-
-XStatus
-XDmaChannel_SelfTest(XDmaChannel * InstancePtr)
-{
- u32 ControlReg;
-
- /* assert to verify input arguments */
-
- XASSERT_NONVOID(InstancePtr != NULL);
- XASSERT_NONVOID(InstancePtr->IsReady == XCOMPONENT_IS_READY);
-
- /* reset the DMA channel such that it's in a known state before the test
- * it resets to no interrupts enabled, the desired state for the test
- */
- XDmaChannel_Reset(InstancePtr);
-
- /* this should be the first test to help prevent a lock up with the polling
- * loop that occurs later in the test, check the reset value of the DMA
- * control register to make sure it's correct, return with an error if not
- */
- ControlReg = XDmaChannel_GetControl(InstancePtr);
- if (ControlReg != XDC_CONTROL_REG_RESET_MASK) {
- return XST_DMA_RESET_REGISTER_ERROR;
- }
-
- return XST_SUCCESS;
-}
-
-/******************************************************************************
-*
-* FUNCTION:
-*
-* XDmaChannel_Reset
-*
-* DESCRIPTION:
-*
-* This function resets the DMA channel. This is a destructive operation such
-* that it should not be done while a channel is being used. If the DMA channel
-* is transferring data into other blocks, such as a FIFO, it may be necessary
-* to reset other blocks. This function does not modify the contents of a
-* scatter gather list for a DMA channel such that the user is responsible for
-* getting buffer descriptors from the list if necessary.
-*
-* ARGUMENTS:
-*
-* InstancePtr contains a pointer to the DMA channel to operate on.
-*
-* RETURN VALUE:
-*
-* None.
-*
-* NOTES:
-*
-* None.
-*
-******************************************************************************/
-void
-XDmaChannel_Reset(XDmaChannel * InstancePtr)
-{
- /* assert to verify input arguments */
-
- XASSERT_VOID(InstancePtr != NULL);
- XASSERT_VOID(InstancePtr->IsReady == XCOMPONENT_IS_READY);
-
- /* reset the DMA channel such that it's in a known state, the reset
- * register is self clearing such that it only has to be set
- */
- XIo_Out32(InstancePtr->RegBaseAddress + XDC_RST_REG_OFFSET,
- XDC_RESET_MASK);
-}
-
-/******************************************************************************
-*
-* FUNCTION:
-*
-* XDmaChannel_GetControl
-*
-* DESCRIPTION:
-*
-* This function gets the control register contents of the DMA channel.
-*
-* ARGUMENTS:
-*
-* InstancePtr contains a pointer to the DMA channel to operate on.
-*
-* RETURN VALUE:
-*
-* The control register contents of the DMA channel. One or more of the
-* following values may be contained the register. Each of the values are
-* unique bit masks.
-*
-* XDC_DMACR_SOURCE_INCR_MASK Increment the source address
-* XDC_DMACR_DEST_INCR_MASK Increment the destination address
-* XDC_DMACR_SOURCE_LOCAL_MASK Local source address
-* XDC_DMACR_DEST_LOCAL_MASK Local destination address
-* XDC_DMACR_SG_ENABLE_MASK Scatter gather enable
-* XDC_DMACR_GEN_BD_INTR_MASK Individual buffer descriptor interrupt
-* XDC_DMACR_LAST_BD_MASK Last buffer descriptor in a packet
-*
-* NOTES:
-*
-* None.
-*
-******************************************************************************/
-u32
-XDmaChannel_GetControl(XDmaChannel * InstancePtr)
-{
- /* assert to verify input arguments */
-
- XASSERT_NONVOID(InstancePtr != NULL);
- XASSERT_NONVOID(InstancePtr->IsReady == XCOMPONENT_IS_READY);
-
- /* return the contents of the DMA control register */
-
- return XIo_In32(InstancePtr->RegBaseAddress + XDC_DMAC_REG_OFFSET);
-}
-
-/******************************************************************************
-*
-* FUNCTION:
-*
-* XDmaChannel_SetControl
-*
-* DESCRIPTION:
-*
-* This function sets the control register of the specified DMA channel.
-*
-* ARGUMENTS:
-*
-* InstancePtr contains a pointer to the DMA channel to operate on.
-*
-* Control contains the value to be written to the control register of the DMA
-* channel. One or more of the following values may be contained the register.
-* Each of the values are unique bit masks such that they may be ORed together
-* to enable multiple bits or inverted and ANDed to disable multiple bits.
-*
-* XDC_DMACR_SOURCE_INCR_MASK Increment the source address
-* XDC_DMACR_DEST_INCR_MASK Increment the destination address
-* XDC_DMACR_SOURCE_LOCAL_MASK Local source address
-* XDC_DMACR_DEST_LOCAL_MASK Local destination address
-* XDC_DMACR_SG_ENABLE_MASK Scatter gather enable
-* XDC_DMACR_GEN_BD_INTR_MASK Individual buffer descriptor interrupt
-* XDC_DMACR_LAST_BD_MASK Last buffer descriptor in a packet
-*
-* RETURN VALUE:
-*
-* None.
-*
-* NOTES:
-*
-* None.
-*
-******************************************************************************/
-void
-XDmaChannel_SetControl(XDmaChannel * InstancePtr, u32 Control)
-{
- /* assert to verify input arguments except the control which can't be
- * asserted since all values are valid
- */
- XASSERT_VOID(InstancePtr != NULL);
- XASSERT_VOID(InstancePtr->IsReady == XCOMPONENT_IS_READY);
-
- /* set the DMA control register to the specified value */
-
- XIo_Out32(InstancePtr->RegBaseAddress + XDC_DMAC_REG_OFFSET, Control);
-}
-
-/******************************************************************************
-*
-* FUNCTION:
-*
-* XDmaChannel_GetStatus
-*
-* DESCRIPTION:
-*
-* This function gets the status register contents of the DMA channel.
-*
-* ARGUMENTS:
-*
-* InstancePtr contains a pointer to the DMA channel to operate on.
-*
-* RETURN VALUE:
-*
-* The status register contents of the DMA channel. One or more of the
-* following values may be contained the register. Each of the values are
-* unique bit masks.
-*
-* XDC_DMASR_BUSY_MASK The DMA channel is busy
-* XDC_DMASR_BUS_ERROR_MASK A bus error occurred
-* XDC_DMASR_BUS_TIMEOUT_MASK A bus timeout occurred
-* XDC_DMASR_LAST_BD_MASK The last buffer descriptor of a packet
-*
-* NOTES:
-*
-* None.
-*
-******************************************************************************/
-u32
-XDmaChannel_GetStatus(XDmaChannel * InstancePtr)
-{
- /* assert to verify input arguments */
-
- XASSERT_NONVOID(InstancePtr != NULL);
- XASSERT_NONVOID(InstancePtr->IsReady == XCOMPONENT_IS_READY);
-
- /* return the contents of the DMA status register */
-
- return XIo_In32(InstancePtr->RegBaseAddress + XDC_DMAS_REG_OFFSET);
-}
-
-/******************************************************************************
-*
-* FUNCTION:
-*
-* XDmaChannel_SetIntrStatus
-*
-* DESCRIPTION:
-*
-* This function sets the interrupt status register of the specified DMA channel.
-* Setting any bit of the interrupt status register will clear the bit to
-* indicate the interrupt processing has been completed. The definitions of each
-* bit in the register match the definition of the bits in the interrupt enable
-* register.
-*
-* ARGUMENTS:
-*
-* InstancePtr contains a pointer to the DMA channel to operate on.
-*
-* Status contains the value to be written to the status register of the DMA
-* channel. One or more of the following values may be contained the register.
-* Each of the values are unique bit masks such that they may be ORed together
-* to enable multiple bits or inverted and ANDed to disable multiple bits.
-*
-* XDC_IXR_DMA_DONE_MASK The dma operation is done
-* XDC_IXR_DMA_ERROR_MASK The dma operation had an error
-* XDC_IXR_PKT_DONE_MASK A packet is complete
-* XDC_IXR_PKT_THRESHOLD_MASK The packet count threshold reached
-* XDC_IXR_PKT_WAIT_BOUND_MASK The packet wait bound reached
-* XDC_IXR_SG_DISABLE_ACK_MASK The scatter gather disable completed
-* XDC_IXR_BD_MASK A buffer descriptor is done
-*
-* RETURN VALUE:
-*
-* None.
-*
-* NOTES:
-*
-* None.
-*
-******************************************************************************/
-void
-XDmaChannel_SetIntrStatus(XDmaChannel * InstancePtr, u32 Status)
-{
- /* assert to verify input arguments except the status which can't be
- * asserted since all values are valid
- */
- XASSERT_VOID(InstancePtr != NULL);
- XASSERT_VOID(InstancePtr->IsReady == XCOMPONENT_IS_READY);
-
- /* set the interrupt status register with the specified value such that
- * all bits which are set in the register are cleared effectively clearing
- * any active interrupts
- */
- XIo_Out32(InstancePtr->RegBaseAddress + XDC_IS_REG_OFFSET, Status);
-}
-
-/******************************************************************************
-*
-* FUNCTION:
-*
-* XDmaChannel_GetIntrStatus
-*
-* DESCRIPTION:
-*
-* This function gets the interrupt status register of the specified DMA channel.
-* The interrupt status register indicates which interrupts are active
-* for the DMA channel. If an interrupt is active, the status register must be
-* set (written) with the bit set for each interrupt which has been processed
-* in order to clear the interrupts. The definitions of each bit in the register
-* match the definition of the bits in the interrupt enable register.
-*
-* ARGUMENTS:
-*
-* InstancePtr contains a pointer to the DMA channel to operate on.
-*
-* RETURN VALUE:
-*
-* The interrupt status register contents of the specified DMA channel.
-* One or more of the following values may be contained the register.
-* Each of the values are unique bit masks.
-*
-* XDC_IXR_DMA_DONE_MASK The dma operation is done
-* XDC_IXR_DMA_ERROR_MASK The dma operation had an error
-* XDC_IXR_PKT_DONE_MASK A packet is complete
-* XDC_IXR_PKT_THRESHOLD_MASK The packet count threshold reached
-* XDC_IXR_PKT_WAIT_BOUND_MASK The packet wait bound reached
-* XDC_IXR_SG_DISABLE_ACK_MASK The scatter gather disable completed
-* XDC_IXR_SG_END_MASK Current descriptor was the end of the list
-* XDC_IXR_BD_MASK A buffer descriptor is done
-*
-* NOTES:
-*
-* None.
-*
-******************************************************************************/
-u32
-XDmaChannel_GetIntrStatus(XDmaChannel * InstancePtr)
-{
- /* assert to verify input arguments */
-
- XASSERT_NONVOID(InstancePtr != NULL);
- XASSERT_NONVOID(InstancePtr->IsReady == XCOMPONENT_IS_READY);
-
- /* return the contents of the interrupt status register */
-
- return XIo_In32(InstancePtr->RegBaseAddress + XDC_IS_REG_OFFSET);
-}
-
-/******************************************************************************
-*
-* FUNCTION:
-*
-* XDmaChannel_SetIntrEnable
-*
-* DESCRIPTION:
-*
-* This function sets the interrupt enable register of the specified DMA
-* channel. The interrupt enable register contains bits which enable
-* individual interrupts for the DMA channel. The definitions of each bit
-* in the register match the definition of the bits in the interrupt status
-* register.
-*
-* ARGUMENTS:
-*
-* InstancePtr contains a pointer to the DMA channel to operate on.
-*
-* Enable contains the interrupt enable register contents to be written
-* in the DMA channel. One or more of the following values may be contained
-* the register. Each of the values are unique bit masks such that they may be
-* ORed together to enable multiple bits or inverted and ANDed to disable
-* multiple bits.
-*
-* XDC_IXR_DMA_DONE_MASK The dma operation is done
-* XDC_IXR_DMA_ERROR_MASK The dma operation had an error
-* XDC_IXR_PKT_DONE_MASK A packet is complete
-* XDC_IXR_PKT_THRESHOLD_MASK The packet count threshold reached
-* XDC_IXR_PKT_WAIT_BOUND_MASK The packet wait bound reached
-* XDC_IXR_SG_DISABLE_ACK_MASK The scatter gather disable completed
-* XDC_IXR_SG_END_MASK Current descriptor was the end of the list
-* XDC_IXR_BD_MASK A buffer descriptor is done
-*
-* RETURN VALUE:
-*
-* None.
-*
-* NOTES:
-*
-* None.
-*
-******************************************************************************/
-void
-XDmaChannel_SetIntrEnable(XDmaChannel * InstancePtr, u32 Enable)
-{
- /* assert to verify input arguments except the enable which can't be
- * asserted since all values are valid
- */
- XASSERT_VOID(InstancePtr != NULL);
- XASSERT_VOID(InstancePtr->IsReady == XCOMPONENT_IS_READY);
-
- /* set the interrupt enable register to the specified value */
-
- XIo_Out32(InstancePtr->RegBaseAddress + XDC_IE_REG_OFFSET, Enable);
-}
-
-/******************************************************************************
-*
-* FUNCTION:
-*
-* XDmaChannel_GetIntrEnable
-*
-* DESCRIPTION:
-*
-* This function gets the interrupt enable of the DMA channel. The
-* interrupt enable contains flags which enable individual interrupts for the
-* DMA channel. The definitions of each bit in the register match the definition
-* of the bits in the interrupt status register.
-*
-* ARGUMENTS:
-*
-* InstancePtr contains a pointer to the DMA channel to operate on.
-*
-* RETURN VALUE:
-*
-* The interrupt enable of the DMA channel. One or more of the following values
-* may be contained the register. Each of the values are unique bit masks.
-*
-* XDC_IXR_DMA_DONE_MASK The dma operation is done
-* XDC_IXR_DMA_ERROR_MASK The dma operation had an error
-* XDC_IXR_PKT_DONE_MASK A packet is complete
-* XDC_IXR_PKT_THRESHOLD_MASK The packet count threshold reached
-* XDC_IXR_PKT_WAIT_BOUND_MASK The packet wait bound reached
-* XDC_IXR_SG_DISABLE_ACK_MASK The scatter gather disable completed
-* XDC_IXR_BD_MASK A buffer descriptor is done
-*
-* NOTES:
-*
-* None.
-*
-******************************************************************************/
-u32
-XDmaChannel_GetIntrEnable(XDmaChannel * InstancePtr)
-{
- /* assert to verify input arguments */
-
- XASSERT_NONVOID(InstancePtr != NULL);
- XASSERT_NONVOID(InstancePtr->IsReady == XCOMPONENT_IS_READY);
-
- /* return the contents of the interrupt enable register */
-
- return XIo_In32(InstancePtr->RegBaseAddress + XDC_IE_REG_OFFSET);
-}
-
-/******************************************************************************
-*
-* FUNCTION:
-*
-* XDmaChannel_Transfer
-*
-* DESCRIPTION:
-*
-* This function starts the DMA channel transferring data from a memory source
-* to a memory destination. This function only starts the operation and returns
-* before the operation may be complete. If the interrupt is enabled, an
-* interrupt will be generated when the operation is complete, otherwise it is
-* necessary to poll the channel status to determine when it's complete. It is
-* the responsibility of the caller to determine when the operation is complete
-* by handling the generated interrupt or polling the status. It is also the
-* responsibility of the caller to ensure that the DMA channel is not busy with
-* another transfer before calling this function.
-*
-* ARGUMENTS:
-*
-* InstancePtr contains a pointer to the DMA channel to operate on.
-*
-* SourcePtr contains a pointer to the source memory where the data is to
-* be tranferred from and must be 32 bit aligned.
-*
-* DestinationPtr contains a pointer to the destination memory where the data
-* is to be transferred and must be 32 bit aligned.
-*
-* ByteCount contains the number of bytes to transfer during the DMA operation.
-*
-* RETURN VALUE:
-*
-* None.
-*
-* NOTES:
-*
-* The DMA h/w will not currently allow a non-local memory transfer to non-local
-* memory (memory copy), but only allows a non-local memory to or from the device
-* memory (typically a FIFO).
-*
-* It is the responsibility of the caller to ensure that the cache is
-* flushed and invalidated both before and after the DMA operation completes
-* if the memory pointed to is cached. The caller must also ensure that the
-* pointers contain a physical address rather than a virtual address
-* if address translation is being used.
-*
-******************************************************************************/
-void
-XDmaChannel_Transfer(XDmaChannel * InstancePtr,
- u32 * SourcePtr, u32 * DestinationPtr, u32 ByteCount)
-{
- /* assert to verify input arguments and the alignment of any arguments
- * which have expected alignments
- */
- XASSERT_VOID(InstancePtr != NULL);
- XASSERT_VOID(SourcePtr != NULL);
- XASSERT_VOID(((u32) SourcePtr & 3) == 0);
- XASSERT_VOID(DestinationPtr != NULL);
- XASSERT_VOID(((u32) DestinationPtr & 3) == 0);
- XASSERT_VOID(ByteCount != 0);
- XASSERT_VOID(InstancePtr->IsReady == XCOMPONENT_IS_READY);
-
- /* setup the source and destination address registers for the transfer */
-
- XIo_Out32(InstancePtr->RegBaseAddress + XDC_SA_REG_OFFSET,
- (u32) SourcePtr);
-
- XIo_Out32(InstancePtr->RegBaseAddress + XDC_DA_REG_OFFSET,
- (u32) DestinationPtr);
-
- /* start the DMA transfer to copy from the source buffer to the
- * destination buffer by writing the length to the length register
- */
- XIo_Out32(InstancePtr->RegBaseAddress + XDC_LEN_REG_OFFSET, ByteCount);
-}
diff --git a/board/xilinx/common/xdma_channel.h b/board/xilinx/common/xdma_channel.h
deleted file mode 100644
index 06976c3e04..0000000000
--- a/board/xilinx/common/xdma_channel.h
+++ /dev/null
@@ -1,291 +0,0 @@
-/******************************************************************************
-*
-* Author: Xilinx, Inc.
-*
-*
-* This program is free software; you can redistribute it and/or modify it
-* under the terms of the GNU General Public License as published by the
-* Free Software Foundation; either version 2 of the License, or (at your
-* option) any later version.
-*
-*
-* XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A
-* COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS
-* ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD,
-* XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE
-* FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING
-* ANY THIRD PARTY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.
-* XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO
-* THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY
-* WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM
-* CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND
-* FITNESS FOR A PARTICULAR PURPOSE.
-*
-*
-* Xilinx hardware products are not intended for use in life support
-* appliances, devices, or systems. Use in such applications is
-* expressly prohibited.
-*
-*
-* (c) Copyright 2002-2004 Xilinx Inc.
-* All rights reserved.
-*
-*
-* You should have received a copy of the GNU General Public License along
-* with this program; if not, write to the Free Software Foundation, Inc.,
-* 675 Mass Ave, Cambridge, MA 02139, USA.
-*
-* FILENAME:
-*
-* xdma_channel.h
-*
-* DESCRIPTION:
-*
-* This file contains the DMA channel component implementation. This component
-* supports a distributed DMA design in which each device can have it's own
-* dedicated DMA channel, as opposed to a centralized DMA design.
-* A device which uses DMA typically contains two DMA channels, one for
-* sending data and the other for receiving data.
-*
-* This component is designed to be used as a basic building block for
-* designing a device driver. It provides registers accesses such that all
-* DMA processing can be maintained easier, but the device driver designer
-* must still understand all the details of the DMA channel.
-*
-* The DMA channel allows a CPU to minimize the CPU interaction required to move
-* data between a memory and a device. The CPU requests the DMA channel to
-* perform a DMA operation and typically continues performing other processing
-* until the DMA operation completes. DMA could be considered a primitive form
-* of multiprocessing such that caching and address translation can be an issue.
-*
-* Scatter Gather Operations
-*
-* The DMA channel may support scatter gather operations. A scatter gather
-* operation automates the DMA channel such that multiple buffers can be
-* sent or received with minimal software interaction with the hardware. Buffer
-* descriptors, contained in the XBufDescriptor component, are used by the
-* scatter gather operations of the DMA channel to describe the buffers to be
-* processed.
-*
-* Scatter Gather List Operations
-*
-* A scatter gather list may be supported by each DMA channel. The scatter
-* gather list allows buffer descriptors to be put into the list by a device
-* driver which requires scatter gather. The hardware processes the buffer
-* descriptors which are contained in the list and modifies the buffer
-* descriptors to reflect the status of the DMA operations. The device driver
-* is notified by interrupt that specific DMA events occur including scatter
-* gather events. The device driver removes the completed buffer descriptors
-* from the scatter gather list to evaluate the status of each DMA operation.
-*
-* The scatter gather list is created and buffer descriptors are inserted into
-* the list. Buffer descriptors are never removed from the list after it's
-* creation such that a put operation copies from a temporary buffer descriptor
-* to a buffer descriptor in the list. Get operations don't copy from the list
-* to a temporary, but return a pointer to the buffer descriptor in the list.
-* A buffer descriptor in the list may be locked to prevent it from being
-* overwritten by a put operation. This allows the device driver to get a
-* descriptor from a scatter gather list and prevent it from being overwritten
-* until the buffer associated with the buffer descriptor has been processed.
-*
-* Typical Scatter Gather Processing
-*
-* The following steps illustrate the typical processing to use the
-* scatter gather features of a DMA channel.
-*
-* 1. Create a scatter gather list for the DMA channel which puts empty buffer
-* descriptors into the list.
-* 2. Create buffer descriptors which describe the buffers to be filled with
-* receive data or the buffers which contain data to be sent.
-* 3. Put buffer descriptors into the DMA channel scatter list such that scatter
-* gather operations are requested.
-* 4. Commit the buffer descriptors in the list such that they are ready to be
-* used by the DMA channel hardware.
-* 5. Start the scatter gather operations of the DMA channel.
-* 6. Process any interrupts which occur as a result of the scatter gather
-* operations or poll the DMA channel to determine the status.
-*
-* Interrupts
-*
-* Each DMA channel has the ability to generate an interrupt. This component
-* does not perform processing for the interrupt as this processing is typically
-* tightly coupled with the device which is using the DMA channel. It is the
-* responsibility of the caller of DMA functions to manage the interrupt
-* including connecting to the interrupt and enabling/disabling the interrupt.
-*
-* Critical Sections
-*
-* It is the responsibility of the device driver designer to use critical
-* sections as necessary when calling functions of the DMA channel. This
-* component does not use critical sections and it does access registers using
-* read-modify-write operations. Calls to DMA functions from a main thread
-* and from an interrupt context could produce unpredictable behavior such that
-* the caller must provide the appropriate critical sections.
-*
-* Address Translation
-*
-* All addresses of data structures which are passed to DMA functions must
-* be physical (real) addresses as opposed to logical (virtual) addresses.
-*
-* Caching
-*
-* The memory which is passed to the function which creates the scatter gather
-* list must not be cached such that buffer descriptors are non-cached. This
-* is necessary because the buffer descriptors are kept in a ring buffer and
-* not directly accessible to the caller of DMA functions.
-*
-* The caller of DMA functions is responsible for ensuring that any data
-* buffers which are passed to the DMA channel are cache-line aligned if
-* necessary.
-*
-* The caller of DMA functions is responsible for ensuring that any data
-* buffers which are passed to the DMA channel have been flushed from the cache.
-*
-* The caller of DMA functions is responsible for ensuring that the cache is
-* invalidated prior to using any data buffers which are the result of a DMA
-* operation.
-*
-* Memory Alignment
-*
-* The addresses of data buffers which are passed to DMA functions must be
-* 32 bit word aligned since the DMA hardware performs 32 bit word transfers.
-*
-* Mutual Exclusion
-*
-* The functions of the DMA channel are not thread safe such that the caller
-* of all DMA functions is responsible for ensuring mutual exclusion for a
-* DMA channel. Mutual exclusion across multiple DMA channels is not
-* necessary.
-*
-* NOTES:
-*
-* Many of the provided functions which are register accessors don't provide
-* a lot of error detection. The caller is expected to understand the impact
-* of a function call based upon the current state of the DMA channel. This
-* is done to minimize the overhead in this component.
-*
-******************************************************************************/
-
-#ifndef XDMA_CHANNEL_H /* prevent circular inclusions */
-#define XDMA_CHANNEL_H /* by using protection macros */
-
-/***************************** Include Files *********************************/
-
-#include "xdma_channel_i.h" /* constants shared with buffer descriptor */
-#include "xbasic_types.h"
-#include "xstatus.h"
-#include "xversion.h"
-#include "xbuf_descriptor.h"
-
-/************************** Constant Definitions *****************************/
-
-/* the following constants provide access to the bit fields of the DMA control
- * register (DMACR)
- */
-#define XDC_DMACR_SOURCE_INCR_MASK 0x80000000UL /* increment source address */
-#define XDC_DMACR_DEST_INCR_MASK 0x40000000UL /* increment dest address */
-#define XDC_DMACR_SOURCE_LOCAL_MASK 0x20000000UL /* local source address */
-#define XDC_DMACR_DEST_LOCAL_MASK 0x10000000UL /* local dest address */
-#define XDC_DMACR_SG_DISABLE_MASK 0x08000000UL /* scatter gather disable */
-#define XDC_DMACR_GEN_BD_INTR_MASK 0x04000000UL /* descriptor interrupt */
-#define XDC_DMACR_LAST_BD_MASK XDC_CONTROL_LAST_BD_MASK /* last buffer */
- /* descriptor */
-
-/* the following constants provide access to the bit fields of the DMA status
- * register (DMASR)
- */
-#define XDC_DMASR_BUSY_MASK 0x80000000UL /* channel is busy */
-#define XDC_DMASR_BUS_ERROR_MASK 0x40000000UL /* bus error occurred */
-#define XDC_DMASR_BUS_TIMEOUT_MASK 0x20000000UL /* bus timeout occurred */
-#define XDC_DMASR_LAST_BD_MASK XDC_STATUS_LAST_BD_MASK /* last buffer */
- /* descriptor */
-#define XDC_DMASR_SG_BUSY_MASK 0x08000000UL /* scatter gather is busy */
-
-/* the following constants provide access to the bit fields of the interrupt
- * status register (ISR) and the interrupt enable register (IER), bit masks
- * match for both registers such that they are named IXR
- */
-#define XDC_IXR_DMA_DONE_MASK 0x1UL /* dma operation done */
-#define XDC_IXR_DMA_ERROR_MASK 0x2UL /* dma operation error */
-#define XDC_IXR_PKT_DONE_MASK 0x4UL /* packet done */
-#define XDC_IXR_PKT_THRESHOLD_MASK 0x8UL /* packet count threshold */
-#define XDC_IXR_PKT_WAIT_BOUND_MASK 0x10UL /* packet wait bound reached */
-#define XDC_IXR_SG_DISABLE_ACK_MASK 0x20UL /* scatter gather disable
- acknowledge occurred */
-#define XDC_IXR_SG_END_MASK 0x40UL /* last buffer descriptor
- disabled scatter gather */
-#define XDC_IXR_BD_MASK 0x80UL /* buffer descriptor done */
-
-/**************************** Type Definitions *******************************/
-
-/*
- * the following structure contains data which is on a per instance basis
- * for the XDmaChannel component
- */
-typedef struct XDmaChannelTag {
- XVersion Version; /* version of the driver */
- u32 RegBaseAddress; /* base address of registers */
- u32 IsReady; /* device is initialized and ready */
-
- XBufDescriptor *PutPtr; /* keep track of where to put into list */
- XBufDescriptor *GetPtr; /* keep track of where to get from list */
- XBufDescriptor *CommitPtr; /* keep track of where to commit in list */
- XBufDescriptor *LastPtr; /* keep track of the last put in the list */
- u32 TotalDescriptorCount; /* total # of descriptors in the list */
- u32 ActiveDescriptorCount; /* # of descriptors pointing to buffers
- * in the buffer descriptor list */
-} XDmaChannel;
-
-/***************** Macros (Inline Functions) Definitions *********************/
-
-/************************** Function Prototypes ******************************/
-
-XStatus XDmaChannel_Initialize(XDmaChannel * InstancePtr, u32 BaseAddress);
-u32 XDmaChannel_IsReady(XDmaChannel * InstancePtr);
-XVersion *XDmaChannel_GetVersion(XDmaChannel * InstancePtr);
-XStatus XDmaChannel_SelfTest(XDmaChannel * InstancePtr);
-void XDmaChannel_Reset(XDmaChannel * InstancePtr);
-
-/* Control functions */
-
-u32 XDmaChannel_GetControl(XDmaChannel * InstancePtr);
-void XDmaChannel_SetControl(XDmaChannel * InstancePtr, u32 Control);
-
-/* Status functions */
-
-u32 XDmaChannel_GetStatus(XDmaChannel * InstancePtr);
-void XDmaChannel_SetIntrStatus(XDmaChannel * InstancePtr, u32 Status);
-u32 XDmaChannel_GetIntrStatus(XDmaChannel * InstancePtr);
-void XDmaChannel_SetIntrEnable(XDmaChannel * InstancePtr, u32 Enable);
-u32 XDmaChannel_GetIntrEnable(XDmaChannel * InstancePtr);
-
-/* DMA without scatter gather functions */
-
-void XDmaChannel_Transfer(XDmaChannel * InstancePtr,
- u32 * SourcePtr, u32 * DestinationPtr, u32 ByteCount);
-
-/* Scatter gather functions */
-
-XStatus XDmaChannel_SgStart(XDmaChannel * InstancePtr);
-XStatus XDmaChannel_SgStop(XDmaChannel * InstancePtr,
- XBufDescriptor ** BufDescriptorPtr);
-XStatus XDmaChannel_CreateSgList(XDmaChannel * InstancePtr,
- u32 * MemoryPtr, u32 ByteCount);
-u32 XDmaChannel_IsSgListEmpty(XDmaChannel * InstancePtr);
-
-XStatus XDmaChannel_PutDescriptor(XDmaChannel * InstancePtr,
- XBufDescriptor * BufDescriptorPtr);
-XStatus XDmaChannel_CommitPuts(XDmaChannel * InstancePtr);
-XStatus XDmaChannel_GetDescriptor(XDmaChannel * InstancePtr,
- XBufDescriptor ** BufDescriptorPtr);
-
-/* Packet functions for interrupt collescing */
-
-u32 XDmaChannel_GetPktCount(XDmaChannel * InstancePtr);
-void XDmaChannel_DecrementPktCount(XDmaChannel * InstancePtr);
-XStatus XDmaChannel_SetPktThreshold(XDmaChannel * InstancePtr, u8 Threshold);
-u8 XDmaChannel_GetPktThreshold(XDmaChannel * InstancePtr);
-void XDmaChannel_SetPktWaitBound(XDmaChannel * InstancePtr, u32 WaitBound);
-u32 XDmaChannel_GetPktWaitBound(XDmaChannel * InstancePtr);
-
-#endif /* end of protection macro */
diff --git a/board/xilinx/common/xdma_channel_i.h b/board/xilinx/common/xdma_channel_i.h
deleted file mode 100644
index e9f343bbbe..0000000000
--- a/board/xilinx/common/xdma_channel_i.h
+++ /dev/null
@@ -1,110 +0,0 @@
-/******************************************************************************
-*
-* Author: Xilinx, Inc.
-*
-*
-* This program is free software; you can redistribute it and/or modify it
-* under the terms of the GNU General Public License as published by the
-* Free Software Foundation; either version 2 of the License, or (at your
-* option) any later version.
-*
-*
-* XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A
-* COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS
-* ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD,
-* XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE
-* FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING
-* ANY THIRD PARTY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.
-* XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO
-* THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY
-* WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM
-* CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND
-* FITNESS FOR A PARTICULAR PURPOSE.
-*
-*
-* Xilinx hardware products are not intended for use in life support
-* appliances, devices, or systems. Use in such applications is
-* expressly prohibited.
-*
-*
-* (c) Copyright 2002-2004 Xilinx Inc.
-* All rights reserved.
-*
-*
-* You should have received a copy of the GNU General Public License along
-* with this program; if not, write to the Free Software Foundation, Inc.,
-* 675 Mass Ave, Cambridge, MA 02139, USA.
-*
-* FILENAME:
-*
-* xdma_channel_i.h
-*
-* DESCRIPTION:
-*
-* This file contains data which is shared internal data for the DMA channel
-* component. It is also shared with the buffer descriptor component which is
-* very tightly coupled with the DMA channel component.
-*
-* NOTES:
-*
-* The last buffer descriptor constants must be located here to prevent a
-* circular dependency between the DMA channel component and the buffer
-* descriptor component.
-*
-******************************************************************************/
-
-#ifndef XDMA_CHANNEL_I_H /* prevent circular inclusions */
-#define XDMA_CHANNEL_I_H /* by using protection macros */
-
-/***************************** Include Files *********************************/
-
-#include "xbasic_types.h"
-#include "xstatus.h"
-#include "xversion.h"
-
-/************************** Constant Definitions *****************************/
-
-#define XDC_DMA_CHANNEL_V1_00_A "1.00a"
-
-/* the following constant provides access to the bit fields of the DMA control
- * register (DMACR) which must be shared between the DMA channel component
- * and the buffer descriptor component
- */
-#define XDC_CONTROL_LAST_BD_MASK 0x02000000UL /* last buffer descriptor */
-
-/* the following constant provides access to the bit fields of the DMA status
- * register (DMASR) which must be shared between the DMA channel component
- * and the buffer descriptor component
- */
-#define XDC_STATUS_LAST_BD_MASK 0x10000000UL /* last buffer descriptor */
-
-/* the following constants provide access to each of the registers of a DMA
- * channel
- */
-#define XDC_RST_REG_OFFSET 0 /* reset register */
-#define XDC_MI_REG_OFFSET 0 /* module information register */
-#define XDC_DMAC_REG_OFFSET 4 /* DMA control register */
-#define XDC_SA_REG_OFFSET 8 /* source address register */
-#define XDC_DA_REG_OFFSET 12 /* destination address register */
-#define XDC_LEN_REG_OFFSET 16 /* length register */
-#define XDC_DMAS_REG_OFFSET 20 /* DMA status register */
-#define XDC_BDA_REG_OFFSET 24 /* buffer descriptor address register */
-#define XDC_SWCR_REG_OFFSET 28 /* software control register */
-#define XDC_UPC_REG_OFFSET 32 /* unserviced packet count register */
-#define XDC_PCT_REG_OFFSET 36 /* packet count threshold register */
-#define XDC_PWB_REG_OFFSET 40 /* packet wait bound register */
-#define XDC_IS_REG_OFFSET 44 /* interrupt status register */
-#define XDC_IE_REG_OFFSET 48 /* interrupt enable register */
-
-/* the following constant is written to the reset register to reset the
- * DMA channel
- */
-#define XDC_RESET_MASK 0x0000000AUL
-
-/**************************** Type Definitions *******************************/
-
-/***************** Macros (Inline Functions) Definitions *********************/
-
-/************************** Function Prototypes ******************************/
-
-#endif /* end of protection macro */
diff --git a/board/xilinx/common/xdma_channel_sg.c b/board/xilinx/common/xdma_channel_sg.c
deleted file mode 100644
index a8e94625bf..0000000000
--- a/board/xilinx/common/xdma_channel_sg.c
+++ /dev/null
@@ -1,1317 +0,0 @@
-/* $Id: xdma_channel_sg.c,v 1.6 2003/02/03 19:50:33 moleres Exp $ */
-/******************************************************************************
-*
-* Author: Xilinx, Inc.
-*
-*
-* This program is free software; you can redistribute it and/or modify it
-* under the terms of the GNU General Public License as published by the
-* Free Software Foundation; either version 2 of the License, or (at your
-* option) any later version.
-*
-*
-* XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A
-* COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS
-* ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD,
-* XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE
-* FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING
-* ANY THIRD PARTY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.
-* XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO
-* THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY
-* WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM
-* CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND
-* FITNESS FOR A PARTICULAR PURPOSE.
-*
-*
-* Xilinx hardware products are not intended for use in life support
-* appliances, devices, or systems. Use in such applications is
-* expressly prohibited.
-*
-*
-* (c) Copyright 2002-2004 Xilinx Inc.
-* All rights reserved.
-*
-*
-* You should have received a copy of the GNU General Public License along
-* with this program; if not, write to the Free Software Foundation, Inc.,
-* 675 Mass Ave, Cambridge, MA 02139, USA.
-*
-* FILENAME:
-*
-* xdma_channel_sg.c
-*
-* DESCRIPTION:
-*
-* This file contains the implementation of the XDmaChannel component which is
-* related to scatter gather operations.
-*
-* Scatter Gather Operations
-*
-* The DMA channel may support scatter gather operations. A scatter gather
-* operation automates the DMA channel such that multiple buffers can be
-* sent or received with minimal software interaction with the hardware. Buffer
-* descriptors, contained in the XBufDescriptor component, are used by the
-* scatter gather operations of the DMA channel to describe the buffers to be
-* processed.
-*
-* Scatter Gather List Operations
-*
-* A scatter gather list may be supported by each DMA channel. The scatter
-* gather list allows buffer descriptors to be put into the list by a device
-* driver which requires scatter gather. The hardware processes the buffer
-* descriptors which are contained in the list and modifies the buffer
-* descriptors to reflect the status of the DMA operations. The device driver
-* is notified by interrupt that specific DMA events occur including scatter
-* gather events. The device driver removes the completed buffer descriptors
-* from the scatter gather list to evaluate the status of each DMA operation.
-*
-* The scatter gather list is created and buffer descriptors are inserted into
-* the list. Buffer descriptors are never removed from the list after it's
-* creation such that a put operation copies from a temporary buffer descriptor
-* to a buffer descriptor in the list. Get operations don't copy from the list
-* to a temporary, but return a pointer to the buffer descriptor in the list.
-* A buffer descriptor in the list may be locked to prevent it from being
-* overwritten by a put operation. This allows the device driver to get a
-* descriptor from a scatter gather list and prevent it from being overwritten
-* until the buffer associated with the buffer descriptor has been processed.
-*
-* The get and put functions only operate on the list and are asynchronous from
-* the hardware which may be using the list of descriptors. This is important
-* because there are no checks in the get and put functions to ensure that the
-* hardware has processed the descriptors. This must be handled by the driver
-* using the DMA scatter gather channel through the use of the other functions.
-* When a scatter gather operation is started, the start function does ensure
-* that the descriptor to start has not already been processed by the hardware
-* and is not the first of a series of descriptors that have not been committed
-* yet.
-*
-* Descriptors are put into the list but not marked as ready to use by the
-* hardware until a commit operation is done. This allows multiple descriptors
-* which may contain a single packet of information for a protocol to be
-* guaranteed not to cause any underflow conditions during transmission. The
-* hardware design only allows descriptors to cause it to stop after a descriptor
-* has been processed rather than before it is processed. A series of
-* descriptors are put into the list followed by a commit operation, or each
-* descriptor may be commited. A commit operation is performed by changing a
-* single descriptor, the first of the series of puts, to indicate that the
-* hardware may now use all descriptors after it. The last descriptor in the
-* list is always set to cause the hardware to stop after it is processed.
-*
-* Typical Scatter Gather Processing
-*
-* The following steps illustrate the typical processing to use the
-* scatter gather features of a DMA channel.
-*
-* 1. Create a scatter gather list for the DMA channel which puts empty buffer
-* descriptors into the list.
-* 2. Create buffer descriptors which describe the buffers to be filled with
-* receive data or the buffers which contain data to be sent.
-* 3. Put buffer descriptors into the DMA channel scatter list such that scatter
-* gather operations are requested.
-* 4. Commit the buffer descriptors in the list such that they are ready to be
-* used by the DMA channel hardware.
-* 5. Start the scatter gather operations of the DMA channel.
-* 6. Process any interrupts which occur as a result of the scatter gather
-* operations or poll the DMA channel to determine the status. This may
-* be accomplished by getting the packet count for the channel and then
-* getting the appropriate number of descriptors from the list for that
-* number of packets.
-*
-* Minimizing Interrupts
-*
-* The Scatter Gather operating mode is designed to reduce the amount of CPU
-* throughput necessary to manage the hardware for devices. A key to the CPU
-* throughput is the number and rate of interrupts that the CPU must service.
-* Devices with higher data rates can cause larger numbers of interrupts and
-* higher frequency interrupts. Ideally the number of interrupts can be reduced
-* by only generating an interrupt when a specific amount of data has been
-* received from the interface. This design suffers from a lack of interrupts
-* when the amount of data received is less than the specified amount of data
-* to generate an interrupt. In order to help minimize the number of interrupts
-* which the CPU must service, an algorithm referred to as "interrupt coalescing"
-* is utilized.
-*
-* Interrupt Coalescing
-*
-* The principle of interrupt coalescing is to wait before generating an
-* interrupt until a certain number of packets have been received or sent. An
-* interrupt is also generated if a smaller number of packets have been received
-* followed by a certain period of time with no packet reception. This is a
-* trade-off of latency for bandwidth and is accomplished using several
-* mechanisms of the hardware including a counter for packets received or
-* transmitted and a packet timer. These two hardware mechanisms work in
-* combination to allow a reduction in the number of interrupts processed by the
-* CPU for packet reception.
-*
-* Unserviced Packet Count
-*
-* The purpose of the packet counter is to count the number of packets received
-* or transmitted and provide an interrupt when a specific number of packets
-* have been processed by the hardware. An interrupt is generated whenever the
-* counter is greater than or equal to the Packet Count Threshold. This counter
-* contains an accurate count of the number of packets that the hardware has
-* processed, either received or transmitted, and the software has not serviced.
-*
-* The packet counter allows the number of interrupts to be reduced by waiting
-* to generate an interrupt until enough packets are received. For packet
-* reception, packet counts of less than the number to generate an interrupt
-* would not be serviced without the addition of a packet timer. This counter is
-* continuously updated by the hardware, not latched to the value at the time
-* the interrupt occurred.
-*
-* The packet counter can be used within the interrupt service routine for the
-* device to reduce the number of interrupts. The interrupt service routine
-* loops while performing processing for each packet which has been received or
-* transmitted and decrements the counter by a specified value. At the same time,
-* the hardware is possibly continuing to receive or transmit more packets such
-* that the software may choose, based upon the value in the packet counter, to
-* remain in the interrupt service routine rather than exiting and immediately
-* returning. This feature should be used with caution as reducing the number of
-* interrupts is beneficial, but unbounded interrupt processing is not desirable.
-*
-* Since the hardware may be incrementing the packet counter simultaneously
-* with the software decrementing the counter, there is a need for atomic
-* operations. The hardware ensures that the operation is atomic such that
-* simultaneous accesses are properly handled.
-*
-* Packet Wait Bound
-*
-* The purpose of the packet wait bound is to augment the unserviced packet
-* count. Whenever there is no pending interrupt for the channel and the
-* unserviced packet count is non-zero, a timer starts counting timeout at the
-* value contained the the packet wait bound register. If the timeout is
-* reached, an interrupt is generated such that the software may service the
-* data which was buffered.
-*
-* NOTES:
-*
-* Special Test Conditions:
-*
-* The scatter gather list processing must be thoroughly tested if changes are
-* made. Testing should include putting and committing single descriptors and
-* putting multiple descriptors followed by a single commit. There are some
-* conditions in the code which handle the exception conditions.
-*
-* The Put Pointer points to the next location in the descriptor list to copy
-* in a new descriptor. The Get Pointer points to the next location in the
-* list to get a descriptor from. The Get Pointer only allows software to
-* have a traverse the list after the hardware has finished processing some
-* number of descriptors. The Commit Pointer points to the descriptor in the
-* list which is to be committed. It is also used to determine that no
-* descriptor is waiting to be commited (NULL). The Last Pointer points to
-* the last descriptor that was put into the list. It typically points
-* to the previous descriptor to the one pointed to by the Put Pointer.
-* Comparisons are done between these pointers to determine when the following
-* special conditions exist.
-
-* Single Put And Commit
-*
-* The buffer descriptor is ready to be used by the hardware so it is important
-* for the descriptor to not appear to be waiting to be committed. The commit
-* pointer is reset when a commit is done indicating there are no descriptors
-* waiting to be committed. In all cases but this one, the descriptor is
-* changed to cause the hardware to go to the next descriptor after processing
-* this one. But in this case, this is the last descriptor in the list such
-* that it must not be changed.
-*
-* 3 Or More Puts And Commit
-*
-* A series of 3 or more puts followed by a single commit is different in that
-* only the 1st descriptor put into the list is changed when the commit is done.
-* This requires each put starting on the 3rd to change the previous descriptor
-* so that it allows the hardware to continue to the next descriptor in the list.
-*
-* The 1st Put Following A Commit
-*
-* The commit caused the commit pointer to be NULL indicating that there are no
-* descriptors waiting to be committed. It is necessary for the next put to set
-* the commit pointer so that a commit must follow the put for the hardware to
-* use the descriptor.
-*
-* <pre>
-* MODIFICATION HISTORY:
-*
-* Ver Who Date Changes
-* ----- ---- -------- ------------------------------------------------------
-* 1.00a rpm 02/03/03 Removed the XST_DMA_SG_COUNT_EXCEEDED return code
-* from SetPktThreshold.
-* </pre>
-*
-******************************************************************************/
-
-/***************************** Include Files *********************************/
-
-#include "xdma_channel.h"
-#include "xbasic_types.h"
-#include "xio.h"
-#include "xbuf_descriptor.h"
-#include "xstatus.h"
-
-/************************** Constant Definitions *****************************/
-
-#define XDC_SWCR_SG_ENABLE_MASK 0x80000000UL /* scatter gather enable */
-
-/**************************** Type Definitions *******************************/
-
-/***************** Macros (Inline Functions) Definitions *********************/
-
-/* the following macro copies selected fields of a buffer descriptor to another
- * buffer descriptor, this was provided by the buffer descriptor component but
- * was moved here since it is only used internally to this component and since
- * it does not copy all fields
- */
-#define CopyBufferDescriptor(InstancePtr, DestinationPtr) \
-{ \
- *((u32 *)DestinationPtr + XBD_CONTROL_OFFSET) = \
- *((u32 *)InstancePtr + XBD_CONTROL_OFFSET); \
- *((u32 *)DestinationPtr + XBD_SOURCE_OFFSET) = \
- *((u32 *)InstancePtr + XBD_SOURCE_OFFSET); \
- *((u32 *)DestinationPtr + XBD_DESTINATION_OFFSET) = \
- *((u32 *)InstancePtr + XBD_DESTINATION_OFFSET); \
- *((u32 *)DestinationPtr + XBD_LENGTH_OFFSET) = \
- *((u32 *)InstancePtr + XBD_LENGTH_OFFSET); \
- *((u32 *)DestinationPtr + XBD_STATUS_OFFSET) = \
- *((u32 *)InstancePtr + XBD_STATUS_OFFSET); \
- *((u32 *)DestinationPtr + XBD_DEVICE_STATUS_OFFSET) = \
- *((u32 *)InstancePtr + XBD_DEVICE_STATUS_OFFSET); \
- *((u32 *)DestinationPtr + XBD_ID_OFFSET) = \
- *((u32 *)InstancePtr + XBD_ID_OFFSET); \
- *((u32 *)DestinationPtr + XBD_FLAGS_OFFSET) = \
- *((u32 *)InstancePtr + XBD_FLAGS_OFFSET); \
- *((u32 *)DestinationPtr + XBD_RQSTED_LENGTH_OFFSET) = \
- *((u32 *)InstancePtr + XBD_RQSTED_LENGTH_OFFSET); \
-}
-
-/************************** Variable Definitions *****************************/
-
-/************************** Function Prototypes ******************************/
-
-/******************************************************************************
-*
-* FUNCTION:
-*
-* XDmaChannel_SgStart
-*
-* DESCRIPTION:
-*
-* This function starts a scatter gather operation for a scatter gather
-* DMA channel. The first buffer descriptor in the buffer descriptor list
-* will be started with the scatter gather operation. A scatter gather list
-* should have previously been created for the DMA channel and buffer
-* descriptors put into the scatter gather list such that there are scatter
-* operations ready to be performed.
-*
-* ARGUMENTS:
-*
-* InstancePtr contains a pointer to the DMA channel to operate on. The DMA
-* channel should be configured to use scatter gather in order for this function
-* to be called.
-*
-* RETURN VALUE:
-*
-* A status containing XST_SUCCESS if scatter gather was started successfully
-* for the DMA channel.
-*
-* A value of XST_DMA_SG_NO_LIST indicates the scatter gather list has not
-* been created.
-*
-* A value of XST_DMA_SG_LIST_EMPTY indicates scatter gather was not started
-* because the scatter gather list of the DMA channel does not contain any
-* buffer descriptors that are ready to be processed by the hardware.
-*
-* A value of XST_DMA_SG_IS_STARTED indicates scatter gather was not started
-* because the scatter gather was not stopped, but was already started.
-*
-* A value of XST_DMA_SG_BD_NOT_COMMITTED indicates the buffer descriptor of
-* scatter gather list which was to be started is not committed to the list.
-* This status is more likely if this function is being called from an ISR
-* and non-ISR processing is putting descriptors into the list.
-*
-* A value of XST_DMA_SG_NO_DATA indicates that the buffer descriptor of the
-* scatter gather list which was to be started had already been used by the
-* hardware for a DMA transfer that has been completed.
-*
-* NOTES:
-*
-* It is the responsibility of the caller to get all the buffer descriptors
-* after performing a stop operation and before performing a start operation.
-* If buffer descriptors are not retrieved between stop and start operations,
-* buffer descriptors may be processed by the hardware more than once.
-*
-******************************************************************************/
-XStatus
-XDmaChannel_SgStart(XDmaChannel * InstancePtr)
-{
- u32 Register;
- XBufDescriptor *LastDescriptorPtr;
-
- /* assert to verify input arguments */
-
- XASSERT_NONVOID(InstancePtr != NULL);
- XASSERT_NONVOID(InstancePtr->IsReady == XCOMPONENT_IS_READY);
-
- /* if a scatter gather list has not been created yet, return a status */
-
- if (InstancePtr->TotalDescriptorCount == 0) {
- return XST_DMA_SG_NO_LIST;
- }
-
- /* if the scatter gather list exists but is empty then return a status */
-
- if (XDmaChannel_IsSgListEmpty(InstancePtr)) {
- return XST_DMA_SG_LIST_EMPTY;
- }
-
- /* if scatter gather is busy for the DMA channel, return a status because
- * restarting it could lose data
- */
-
- Register = XIo_In32(InstancePtr->RegBaseAddress + XDC_DMAS_REG_OFFSET);
- if (Register & XDC_DMASR_SG_BUSY_MASK) {
- return XST_DMA_SG_IS_STARTED;
- }
-
- /* get the address of the last buffer descriptor which the DMA hardware
- * finished processing
- */
- LastDescriptorPtr =
- (XBufDescriptor *) XIo_In32(InstancePtr->RegBaseAddress +
- XDC_BDA_REG_OFFSET);
-
- /* setup the first buffer descriptor that will be sent when the scatter
- * gather channel is enabled, this is only necessary one time since
- * the BDA register of the channel maintains the last buffer descriptor
- * processed
- */
- if (LastDescriptorPtr == NULL) {
- XIo_Out32(InstancePtr->RegBaseAddress + XDC_BDA_REG_OFFSET,
- (u32) InstancePtr->GetPtr);
- } else {
- XBufDescriptor *NextDescriptorPtr;
-
- /* get the next descriptor to be started, if the status indicates it
- * hasn't already been used by the h/w, then it's OK to start it,
- * s/w sets the status of each descriptor to busy and then h/w clears
- * the busy when it is complete
- */
- NextDescriptorPtr =
- XBufDescriptor_GetNextPtr(LastDescriptorPtr);
-
- if ((XBufDescriptor_GetStatus(NextDescriptorPtr) &
- XDC_DMASR_BUSY_MASK) == 0) {
- return XST_DMA_SG_NO_DATA;
- }
- /* don't start the DMA SG channel if the descriptor to be processed
- * by h/w is to be committed by the s/w, this function can be called
- * such that it interrupts a thread that was putting into the list
- */
- if (NextDescriptorPtr == InstancePtr->CommitPtr) {
- return XST_DMA_SG_BD_NOT_COMMITTED;
- }
- }
-
- /* start the scatter gather operation by clearing the stop bit in the
- * control register and setting the enable bit in the s/w control register,
- * both of these are necessary to cause it to start, right now the order of
- * these statements is important, the software control register should be
- * set 1st. The other order can cause the CPU to have a loss of sync
- * because it cannot read/write the register while the DMA operation is
- * running
- */
-
- Register = XIo_In32(InstancePtr->RegBaseAddress + XDC_SWCR_REG_OFFSET);
-
- XIo_Out32(InstancePtr->RegBaseAddress + XDC_SWCR_REG_OFFSET,
- Register | XDC_SWCR_SG_ENABLE_MASK);
-
- Register = XIo_In32(InstancePtr->RegBaseAddress + XDC_DMAC_REG_OFFSET);
-
- XIo_Out32(InstancePtr->RegBaseAddress + XDC_DMAC_REG_OFFSET,
- Register & ~XDC_DMACR_SG_DISABLE_MASK);
-
- /* indicate the DMA channel scatter gather operation was started
- * successfully
- */
- return XST_SUCCESS;
-}
-
-/******************************************************************************
-*
-* FUNCTION:
-*
-* XDmaChannel_SgStop
-*
-* DESCRIPTION:
-*
-* This function stops a scatter gather operation for a scatter gather
-* DMA channel. This function starts the process of stopping a scatter
-* gather operation that is in progress and waits for the stop to be completed.
-* Since it waits for the operation to stopped before returning, this function
-* could take an amount of time relative to the size of the DMA scatter gather
-* operation which is in progress. The scatter gather list of the DMA channel
-* is not modified by this function such that starting the scatter gather
-* channel after stopping it will cause it to resume. This operation is
-* considered to be a graceful stop in that the scatter gather operation
-* completes the current buffer descriptor before stopping.
-*
-* If the interrupt is enabled, an interrupt will be generated when the
-* operation is stopped and the caller is responsible for handling the
-* interrupt.
-*
-* ARGUMENTS:
-*
-* InstancePtr contains a pointer to the DMA channel to operate on. The DMA
-* channel should be configured to use scatter gather in order for this function
-* to be called.
-*
-* BufDescriptorPtr is also a return value which contains a pointer to the
-* buffer descriptor which the scatter gather operation completed when it
-* was stopped.
-*
-* RETURN VALUE:
-*
-* A status containing XST_SUCCESS if scatter gather was stopped successfully
-* for the DMA channel.
-*
-* A value of XST_DMA_SG_IS_STOPPED indicates scatter gather was not stoppped
-* because the scatter gather is not started, but was already stopped.
-*
-* BufDescriptorPtr contains a pointer to the buffer descriptor which was
-* completed when the operation was stopped.
-*
-* NOTES:
-*
-* This function implements a loop which polls the hardware for an infinite
-* amount of time. If the hardware is not operating correctly, this function
-* may never return.
-*
-******************************************************************************/
-XStatus
-XDmaChannel_SgStop(XDmaChannel * InstancePtr,
- XBufDescriptor ** BufDescriptorPtr)
-{
- u32 Register;
-
- /* assert to verify input arguments */
-
- XASSERT_NONVOID(InstancePtr != NULL);
- XASSERT_NONVOID(BufDescriptorPtr != NULL);
- XASSERT_NONVOID(InstancePtr->IsReady == XCOMPONENT_IS_READY);
-
- /* get the contents of the software control register, if scatter gather is not
- * enabled (started), then return a status because the disable acknowledge
- * would not be generated
- */
- Register = XIo_In32(InstancePtr->RegBaseAddress + XDC_SWCR_REG_OFFSET);
-
- if ((Register & XDC_SWCR_SG_ENABLE_MASK) == 0) {
- return XST_DMA_SG_IS_STOPPED;
- }
-
- /* Ensure the interrupt status for the scatter gather is cleared such
- * that this function will wait til the disable has occurred, writing
- * a 1 to only that bit in the register will clear only it
- */
- XIo_Out32(InstancePtr->RegBaseAddress + XDC_IS_REG_OFFSET,
- XDC_IXR_SG_DISABLE_ACK_MASK);
-
- /* disable scatter gather by writing to the software control register
- * without modifying any other bits of the register
- */
- XIo_Out32(InstancePtr->RegBaseAddress + XDC_SWCR_REG_OFFSET,
- Register & ~XDC_SWCR_SG_ENABLE_MASK);
-
- /* scatter gather does not disable immediately, but after the current
- * buffer descriptor is complete, so wait for the DMA channel to indicate
- * the disable is complete
- */
- do {
- Register =
- XIo_In32(InstancePtr->RegBaseAddress + XDC_IS_REG_OFFSET);
- } while ((Register & XDC_IXR_SG_DISABLE_ACK_MASK) == 0);
-
- /* Ensure the interrupt status for the scatter gather disable is cleared,
- * writing a 1 to only that bit in the register will clear only it
- */
- XIo_Out32(InstancePtr->RegBaseAddress + XDC_IS_REG_OFFSET,
- XDC_IXR_SG_DISABLE_ACK_MASK);
-
- /* set the specified buffer descriptor pointer to point to the buffer
- * descriptor that the scatter gather DMA channel was processing
- */
- *BufDescriptorPtr =
- (XBufDescriptor *) XIo_In32(InstancePtr->RegBaseAddress +
- XDC_BDA_REG_OFFSET);
-
- return XST_SUCCESS;
-}
-
-/******************************************************************************
-*
-* FUNCTION:
-*
-* XDmaChannel_CreateSgList
-*
-* DESCRIPTION:
-*
-* This function creates a scatter gather list in the DMA channel. A scatter
-* gather list consists of a list of buffer descriptors that are available to
-* be used for scatter gather operations. Buffer descriptors are put into the
-* list to request a scatter gather operation to be performed.
-*
-* A number of buffer descriptors are created from the specified memory and put
-* into a buffer descriptor list as empty buffer descriptors. This function must
-* be called before non-empty buffer descriptors may be put into the DMA channel
-* to request scatter gather operations.
-*
-* ARGUMENTS:
-*
-* InstancePtr contains a pointer to the DMA channel to operate on. The DMA
-* channel should be configured to use scatter gather in order for this function
-* to be called.
-*
-* MemoryPtr contains a pointer to the memory which is to be used for buffer
-* descriptors and must not be cached.
-*
-* ByteCount contains the number of bytes for the specified memory to be used
-* for buffer descriptors.
-*
-* RETURN VALUE:
-*
-* A status contains XST_SUCCESS if the scatter gather list was successfully
-* created.
-*
-* A value of XST_DMA_SG_LIST_EXISTS indicates that the scatter gather list
-* was not created because the list has already been created.
-*
-* NOTES:
-*
-* None.
-*
-******************************************************************************/
-XStatus
-XDmaChannel_CreateSgList(XDmaChannel * InstancePtr,
- u32 * MemoryPtr, u32 ByteCount)
-{
- XBufDescriptor *BufferDescriptorPtr = (XBufDescriptor *) MemoryPtr;
- XBufDescriptor *PreviousDescriptorPtr = NULL;
- XBufDescriptor *StartOfListPtr = BufferDescriptorPtr;
- u32 UsedByteCount;
-
- /* assert to verify valid input arguments, alignment for those
- * arguments that have alignment restrictions, and at least enough
- * memory for one buffer descriptor
- */
- XASSERT_NONVOID(InstancePtr != NULL);
- XASSERT_NONVOID(MemoryPtr != NULL);
- XASSERT_NONVOID(((u32) MemoryPtr & 3) == 0);
- XASSERT_NONVOID(ByteCount != 0);
- XASSERT_NONVOID(ByteCount >= sizeof (XBufDescriptor));
- XASSERT_NONVOID(InstancePtr->IsReady == XCOMPONENT_IS_READY);
-
- /* if the scatter gather list has already been created, then return
- * with a status
- */
- if (InstancePtr->TotalDescriptorCount != 0) {
- return XST_DMA_SG_LIST_EXISTS;
- }
-
- /* loop thru the specified memory block and create as many buffer
- * descriptors as possible putting each into the list which is
- * implemented as a ring buffer, make sure not to use any memory which
- * is not large enough for a complete buffer descriptor
- */
- UsedByteCount = 0;
- while ((UsedByteCount + sizeof (XBufDescriptor)) <= ByteCount) {
- /* setup a pointer to the next buffer descriptor in the memory and
- * update # of used bytes to know when all of memory is used
- */
- BufferDescriptorPtr = (XBufDescriptor *) ((u32) MemoryPtr +
- UsedByteCount);
-
- /* initialize the new buffer descriptor such that it doesn't contain
- * garbage which could be used by the DMA hardware
- */
- XBufDescriptor_Initialize(BufferDescriptorPtr);
-
- /* if this is not the first buffer descriptor to be created,
- * then link it to the last created buffer descriptor
- */
- if (PreviousDescriptorPtr != NULL) {
- XBufDescriptor_SetNextPtr(PreviousDescriptorPtr,
- BufferDescriptorPtr);
- }
-
- /* always keep a pointer to the last created buffer descriptor such
- * that they can be linked together in the ring buffer
- */
- PreviousDescriptorPtr = BufferDescriptorPtr;
-
- /* keep a count of the number of descriptors in the list to allow
- * error processing to be performed
- */
- InstancePtr->TotalDescriptorCount++;
-
- UsedByteCount += sizeof (XBufDescriptor);
- }
-
- /* connect the last buffer descriptor created and inserted in the list
- * to the first such that a ring buffer is created
- */
- XBufDescriptor_SetNextPtr(BufferDescriptorPtr, StartOfListPtr);
-
- /* initialize the ring buffer to indicate that there are no
- * buffer descriptors in the list which point to valid data buffers
- */
- InstancePtr->PutPtr = BufferDescriptorPtr;
- InstancePtr->GetPtr = BufferDescriptorPtr;
- InstancePtr->CommitPtr = NULL;
- InstancePtr->LastPtr = BufferDescriptorPtr;
- InstancePtr->ActiveDescriptorCount = 0;
-
- /* indicate the scatter gather list was successfully created */
-
- return XST_SUCCESS;
-}
-
-/******************************************************************************
-*
-* FUNCTION:
-*
-* XDmaChannel_IsSgListEmpty
-*
-* DESCRIPTION:
-*
-* This function determines if the scatter gather list of a DMA channel is
-* empty with regard to buffer descriptors which are pointing to buffers to be
-* used for scatter gather operations.
-*
-* ARGUMENTS:
-*
-* InstancePtr contains a pointer to the DMA channel to operate on. The DMA
-* channel should be configured to use scatter gather in order for this function
-* to be called.
-*
-* RETURN VALUE:
-*
-* A value of TRUE if the scatter gather list is empty, otherwise a value of
-* FALSE.
-*
-* NOTES:
-*
-* None.
-*
-******************************************************************************/
-u32
-XDmaChannel_IsSgListEmpty(XDmaChannel * InstancePtr)
-{
- /* assert to verify valid input arguments */
-
- XASSERT_NONVOID(InstancePtr != NULL);
- XASSERT_NONVOID(InstancePtr->IsReady == XCOMPONENT_IS_READY);
-
- /* if the number of descriptors which are being used in the list is zero
- * then the list is empty
- */
- return (InstancePtr->ActiveDescriptorCount == 0);
-}
-
-/******************************************************************************
-*
-* FUNCTION:
-*
-* XDmaChannel_PutDescriptor
-*
-* DESCRIPTION:
-*
-* This function puts a buffer descriptor into the DMA channel scatter
-* gather list. A DMA channel maintains a list of buffer descriptors which are
-* to be processed. This function puts the specified buffer descriptor
-* at the next location in the list. Note that since the list is already intact,
-* the information in the parameter is copied into the list (rather than modify
-* list pointers on the fly).
-*
-* After buffer descriptors are put into the list, they must also be committed
-* by calling another function. This allows multiple buffer descriptors which
-* span a single packet to be put into the list while preventing the hardware
-* from starting the first buffer descriptor of the packet.
-*
-* ARGUMENTS:
-*
-* InstancePtr contains a pointer to the DMA channel to operate on. The DMA
-* channel should be configured to use scatter gather in order for this function
-* to be called.
-*
-* BufferDescriptorPtr is a pointer to the buffer descriptor to be put into
-* the next available location of the scatter gather list.
-*
-* RETURN VALUE:
-*
-* A status which indicates XST_SUCCESS if the buffer descriptor was
-* successfully put into the scatter gather list.
-*
-* A value of XST_DMA_SG_NO_LIST indicates the scatter gather list has not
-* been created.
-*
-* A value of XST_DMA_SG_LIST_FULL indicates the buffer descriptor was not
-* put into the list because the list was full.
-*
-* A value of XST_DMA_SG_BD_LOCKED indicates the buffer descriptor was not
-* put into the list because the buffer descriptor in the list which is to
-* be overwritten was locked. A locked buffer descriptor indicates the higher
-* layered software is still using the buffer descriptor.
-*
-* NOTES:
-*
-* It is necessary to create a scatter gather list for a DMA channel before
-* putting buffer descriptors into it.
-*
-******************************************************************************/
-XStatus
-XDmaChannel_PutDescriptor(XDmaChannel * InstancePtr,
- XBufDescriptor * BufferDescriptorPtr)
-{
- u32 Control;
-
- /* assert to verify valid input arguments and alignment for those
- * arguments that have alignment restrictions
- */
- XASSERT_NONVOID(InstancePtr != NULL);
- XASSERT_NONVOID(BufferDescriptorPtr != NULL);
- XASSERT_NONVOID(((u32) BufferDescriptorPtr & 3) == 0);
- XASSERT_NONVOID(InstancePtr->IsReady == XCOMPONENT_IS_READY);
-
- /* if a scatter gather list has not been created yet, return a status */
-
- if (InstancePtr->TotalDescriptorCount == 0) {
- return XST_DMA_SG_NO_LIST;
- }
-
- /* if the list is full because all descriptors are pointing to valid
- * buffers, then indicate an error, this code assumes no list or an
- * empty list is detected above
- */
- if (InstancePtr->ActiveDescriptorCount ==
- InstancePtr->TotalDescriptorCount) {
- return XST_DMA_SG_LIST_FULL;
- }
-
- /* if the buffer descriptor in the list which is to be overwritten is
- * locked, then don't overwrite it and return a status
- */
- if (XBufDescriptor_IsLocked(InstancePtr->PutPtr)) {
- return XST_DMA_SG_BD_LOCKED;
- }
-
- /* set the scatter gather stop bit in the control word of the descriptor
- * to cause the h/w to stop after it processes this descriptor since it
- * will be the last in the list
- */
- Control = XBufDescriptor_GetControl(BufferDescriptorPtr);
- XBufDescriptor_SetControl(BufferDescriptorPtr,
- Control | XDC_DMACR_SG_DISABLE_MASK);
-
- /* set both statuses in the descriptor so we tell if they are updated with
- * the status of the transfer, the hardware should change the busy in the
- * DMA status to be false when it completes
- */
- XBufDescriptor_SetStatus(BufferDescriptorPtr, XDC_DMASR_BUSY_MASK);
- XBufDescriptor_SetDeviceStatus(BufferDescriptorPtr, 0);
-
- /* copy the descriptor into the next position in the list so it's ready to
- * be used by the h/w, this assumes the descriptor in the list prior to this
- * one still has the stop bit in the control word set such that the h/w
- * use this one yet
- */
- CopyBufferDescriptor(BufferDescriptorPtr, InstancePtr->PutPtr);
-
- /* only the last in the list and the one to be committed have scatter gather
- * disabled in the control word, a commit requires only one descriptor
- * to be changed, when # of descriptors to commit > 2 all others except the
- * 1st and last have scatter gather enabled
- */
- if ((InstancePtr->CommitPtr != InstancePtr->LastPtr) &&
- (InstancePtr->CommitPtr != NULL)) {
- Control = XBufDescriptor_GetControl(InstancePtr->LastPtr);
- XBufDescriptor_SetControl(InstancePtr->LastPtr,
- Control & ~XDC_DMACR_SG_DISABLE_MASK);
- }
-
- /* update the list data based upon putting a descriptor into the list,
- * these operations must be last
- */
- InstancePtr->ActiveDescriptorCount++;
-
- /* only update the commit pointer if it is not already active, this allows
- * it to be deactivated after every commit such that a single descriptor
- * which is committed does not appear to be waiting to be committed
- */
- if (InstancePtr->CommitPtr == NULL) {
- InstancePtr->CommitPtr = InstancePtr->LastPtr;
- }
-
- /* these updates MUST BE LAST after the commit pointer update in order for
- * the commit pointer to track the correct descriptor to be committed
- */
- InstancePtr->LastPtr = InstancePtr->PutPtr;
- InstancePtr->PutPtr = XBufDescriptor_GetNextPtr(InstancePtr->PutPtr);
-
- return XST_SUCCESS;
-}
-
-/******************************************************************************
-*
-* FUNCTION:
-*
-* XDmaChannel_CommitPuts
-*
-* DESCRIPTION:
-*
-* This function commits the buffer descriptors which have been put into the
-* scatter list for the DMA channel since the last commit operation was
-* performed. This enables the calling functions to put several buffer
-* descriptors into the list (e.g.,a packet's worth) before allowing the scatter
-* gather operations to start. This prevents the DMA channel hardware from
-* starting to use the buffer descriptors in the list before they are ready
-* to be used (multiple buffer descriptors for a single packet).
-*
-* ARGUMENTS:
-*
-* InstancePtr contains a pointer to the DMA channel to operate on. The DMA
-* channel should be configured to use scatter gather in order for this function
-* to be called.
-*
-* RETURN VALUE:
-*
-* A status indicating XST_SUCCESS if the buffer descriptors of the list were
-* successfully committed.
-*
-* A value of XST_DMA_SG_NOTHING_TO_COMMIT indicates that the buffer descriptors
-* were not committed because there was nothing to commit in the list. All the
-* buffer descriptors which are in the list are commited.
-*
-* NOTES:
-*
-* None.
-*
-******************************************************************************/
-XStatus
-XDmaChannel_CommitPuts(XDmaChannel * InstancePtr)
-{
- /* assert to verify input arguments */
-
- XASSERT_NONVOID(InstancePtr != NULL);
- XASSERT_NONVOID(InstancePtr->IsReady == XCOMPONENT_IS_READY);
-
- /* if the buffer descriptor to be committed is already committed or
- * the list is empty (none have been put in), then indicate an error
- */
- if ((InstancePtr->CommitPtr == NULL) ||
- XDmaChannel_IsSgListEmpty(InstancePtr)) {
- return XST_DMA_SG_NOTHING_TO_COMMIT;
- }
-
- /* last descriptor in the list must have scatter gather disabled so the end
- * of the list is hit by h/w, if descriptor to commit is not last in list,
- * commit descriptors by enabling scatter gather in the descriptor
- */
- if (InstancePtr->CommitPtr != InstancePtr->LastPtr) {
- u32 Control;
-
- Control = XBufDescriptor_GetControl(InstancePtr->CommitPtr);
- XBufDescriptor_SetControl(InstancePtr->CommitPtr, Control &
- ~XDC_DMACR_SG_DISABLE_MASK);
- }
- /* Update the commit pointer to indicate that there is nothing to be
- * committed, this state is used by start processing to know that the
- * buffer descriptor to start is not waiting to be committed
- */
- InstancePtr->CommitPtr = NULL;
-
- return XST_SUCCESS;
-}
-
-/******************************************************************************
-*
-* FUNCTION:
-*
-* XDmaChannel_GetDescriptor
-*
-* DESCRIPTION:
-*
-* This function gets a buffer descriptor from the scatter gather list of the
-* DMA channel. The buffer descriptor is retrieved from the scatter gather list
-* and the scatter gather list is updated to not include the retrieved buffer
-* descriptor. This is typically done after a scatter gather operation
-* completes indicating that a data buffer has been successfully sent or data
-* has been received into the data buffer. The purpose of this function is to
-* allow the device using the scatter gather operation to get the results of the
-* operation.
-*
-* ARGUMENTS:
-*
-* InstancePtr contains a pointer to the DMA channel to operate on. The DMA
-* channel should be configured to use scatter gather in order for this function
-* to be called.
-*
-* BufDescriptorPtr is a pointer to a pointer to the buffer descriptor which
-* was retrieved from the list. The buffer descriptor is not really removed
-* from the list, but it is changed to a state such that the hardware will not
-* use it again until it is put into the scatter gather list of the DMA channel.
-*
-* RETURN VALUE:
-*
-* A status indicating XST_SUCCESS if a buffer descriptor was retrieved from
-* the scatter gather list of the DMA channel.
-*
-* A value of XST_DMA_SG_NO_LIST indicates the scatter gather list has not
-* been created.
-*
-* A value of XST_DMA_SG_LIST_EMPTY indicates no buffer descriptor was
-* retrieved from the list because there are no buffer descriptors to be
-* processed in the list.
-*
-* BufDescriptorPtr is updated to point to the buffer descriptor which was
-* retrieved from the list if the status indicates success.
-*
-* NOTES:
-*
-* None.
-*
-******************************************************************************/
-XStatus
-XDmaChannel_GetDescriptor(XDmaChannel * InstancePtr,
- XBufDescriptor ** BufDescriptorPtr)
-{
- u32 Control;
-
- /* assert to verify input arguments */
-
- XASSERT_NONVOID(InstancePtr != NULL);
- XASSERT_NONVOID(BufDescriptorPtr != NULL);
- XASSERT_NONVOID(InstancePtr->IsReady == XCOMPONENT_IS_READY);
-
- /* if a scatter gather list has not been created yet, return a status */
-
- if (InstancePtr->TotalDescriptorCount == 0) {
- return XST_DMA_SG_NO_LIST;
- }
-
- /* if the buffer descriptor list is empty, then indicate an error */
-
- if (XDmaChannel_IsSgListEmpty(InstancePtr)) {
- return XST_DMA_SG_LIST_EMPTY;
- }
-
- /* retrieve the next buffer descriptor which is ready to be processed from
- * the buffer descriptor list for the DMA channel, set the control word
- * such that hardware will stop after the descriptor has been processed
- */
- Control = XBufDescriptor_GetControl(InstancePtr->GetPtr);
- XBufDescriptor_SetControl(InstancePtr->GetPtr,
- Control | XDC_DMACR_SG_DISABLE_MASK);
-
- /* set the input argument, which is also an output, to point to the
- * buffer descriptor which is to be retrieved from the list
- */
- *BufDescriptorPtr = InstancePtr->GetPtr;
-
- /* update the pointer of the DMA channel to reflect the buffer descriptor
- * was retrieved from the list by setting it to the next buffer descriptor
- * in the list and indicate one less descriptor in the list now
- */
- InstancePtr->GetPtr = XBufDescriptor_GetNextPtr(InstancePtr->GetPtr);
- InstancePtr->ActiveDescriptorCount--;
-
- return XST_SUCCESS;
-}
-
-/*********************** Interrupt Collescing Functions **********************/
-
-/******************************************************************************
-*
-* FUNCTION:
-*
-* XDmaChannel_GetPktCount
-*
-* DESCRIPTION:
-*
-* This function returns the value of the unserviced packet count register of
-* the DMA channel. This count represents the number of packets that have been
-* sent or received by the hardware, but not processed by software.
-*
-* ARGUMENTS:
-*
-* InstancePtr contains a pointer to the DMA channel to operate on. The DMA
-* channel should be configured to use scatter gather in order for this function
-* to be called.
-*
-* RETURN VALUE:
-*
-* The unserviced packet counter register contents for the DMA channel.
-*
-* NOTES:
-*
-* None.
-*
-******************************************************************************/
-u32
-XDmaChannel_GetPktCount(XDmaChannel * InstancePtr)
-{
- /* assert to verify input arguments */
-
- XASSERT_NONVOID(InstancePtr != NULL);
- XASSERT_NONVOID(InstancePtr->IsReady == XCOMPONENT_IS_READY);
-
- /* get the unserviced packet count from the register and return it */
-
- return XIo_In32(InstancePtr->RegBaseAddress + XDC_UPC_REG_OFFSET);
-}
-
-/******************************************************************************
-*
-* FUNCTION:
-*
-* XDmaChannel_DecrementPktCount
-*
-* DESCRIPTION:
-*
-* This function decrements the value of the unserviced packet count register.
-* This informs the hardware that the software has processed a packet. The
-* unserviced packet count register may only be decremented by one in the
-* hardware.
-*
-* ARGUMENTS:
-*
-* InstancePtr contains a pointer to the DMA channel to operate on. The DMA
-* channel should be configured to use scatter gather in order for this function
-* to be called.
-*
-* RETURN VALUE:
-*
-* None.
-*
-* NOTES:
-*
-* None.
-*
-******************************************************************************/
-void
-XDmaChannel_DecrementPktCount(XDmaChannel * InstancePtr)
-{
- u32 Register;
-
- /* assert to verify input arguments */
-
- XASSERT_VOID(InstancePtr != NULL);
- XASSERT_VOID(InstancePtr->IsReady == XCOMPONENT_IS_READY);
-
- /* if the unserviced packet count register can be decremented (rather
- * than rolling over) decrement it by writing a 1 to the register,
- * this is the only valid write to the register as it serves as an
- * acknowledge that a packet was handled by the software
- */
- Register = XIo_In32(InstancePtr->RegBaseAddress + XDC_UPC_REG_OFFSET);
- if (Register > 0) {
- XIo_Out32(InstancePtr->RegBaseAddress + XDC_UPC_REG_OFFSET,
- 1UL);
- }
-}
-
-/******************************************************************************
-*
-* FUNCTION:
-*
-* XDmaChannel_SetPktThreshold
-*
-* DESCRIPTION:
-*
-* This function sets the value of the packet count threshold register of the
-* DMA channel. It reflects the number of packets that must be sent or
-* received before generating an interrupt. This value helps implement
-* a concept called "interrupt coalescing", which is used to reduce the number
-* of interrupts from devices with high data rates.
-*
-* ARGUMENTS:
-*
-* InstancePtr contains a pointer to the DMA channel to operate on. The DMA
-* channel should be configured to use scatter gather in order for this function
-* to be called.
-*
-* Threshold is the value that is written to the threshold register of the
-* DMA channel.
-*
-* RETURN VALUE:
-*
-* A status containing XST_SUCCESS if the packet count threshold was
-* successfully set.
-*
-* NOTES:
-*
-* The packet threshold could be set to larger than the number of descriptors
-* allocated to the DMA channel. In this case, the wait bound will take over
-* and always indicate data arrival. There was a check in this function that
-* returned an error if the treshold was larger than the number of descriptors,
-* but that was removed because users would then have to set the threshold
-* only after they set descriptor space, which is an order dependency that
-* caused confustion.
-*
-******************************************************************************/
-XStatus
-XDmaChannel_SetPktThreshold(XDmaChannel * InstancePtr, u8 Threshold)
-{
- /* assert to verify input arguments, don't assert the threshold since
- * it's range is unknown
- */
- XASSERT_NONVOID(InstancePtr != NULL);
- XASSERT_NONVOID(InstancePtr->IsReady == XCOMPONENT_IS_READY);
-
- /* set the packet count threshold in the register such that an interrupt
- * may be generated, if enabled, when the packet count threshold is
- * reached or exceeded
- */
- XIo_Out32(InstancePtr->RegBaseAddress + XDC_PCT_REG_OFFSET,
- (u32) Threshold);
-
- /* indicate the packet count threshold was successfully set */
-
- return XST_SUCCESS;
-}
-
-/******************************************************************************
-*
-* FUNCTION:
-*
-* XDmaChannel_GetPktThreshold
-*
-* DESCRIPTION:
-*
-* This function gets the value of the packet count threshold register of the
-* DMA channel. This value reflects the number of packets that must be sent or
-* received before generating an interrupt. This value helps implement a concept
-* called "interrupt coalescing", which is used to reduce the number of
-* interrupts from devices with high data rates.
-*
-* ARGUMENTS:
-*
-* InstancePtr contains a pointer to the DMA channel to operate on. The DMA
-* channel should be configured to use scatter gather in order for this function
-* to be called.
-*
-* RETURN VALUE:
-*
-* The packet threshold register contents for the DMA channel and is a value in
-* the range 0 - 1023. A value of 0 indicates the packet wait bound timer is
-* disabled.
-*
-* NOTES:
-*
-* None.
-*
-******************************************************************************/
-u8
-XDmaChannel_GetPktThreshold(XDmaChannel * InstancePtr)
-{
- /* assert to verify input arguments */
-
- XASSERT_NONVOID(InstancePtr != NULL);
- XASSERT_NONVOID(InstancePtr->IsReady == XCOMPONENT_IS_READY);
-
- /* get the packet count threshold from the register and return it,
- * since only 8 bits are used, cast it to return only those bits */
-
- return (u8) XIo_In32(InstancePtr->RegBaseAddress + XDC_PCT_REG_OFFSET);
-}
-
-/******************************************************************************
-*
-* FUNCTION:
-*
-* XDmaChannel_SetPktWaitBound
-*
-* DESCRIPTION:
-*
-* This function sets the value of the packet wait bound register of the
-* DMA channel. This value reflects the timer value used to trigger an
-* interrupt when not enough packets have been received to reach the packet
-* count threshold.
-*
-* The timer is in millisecond units with +/- 33% accuracy.
-*
-* ARGUMENTS:
-*
-* InstancePtr contains a pointer to the DMA channel to operate on. The DMA
-* channel should be configured to use scatter gather in order for this function
-* to be called.
-*
-* WaitBound is the value, in milliseconds, to be stored in the wait bound
-* register of the DMA channel and is a value in the range 0 - 1023. A value
-* of 0 disables the packet wait bound timer.
-*
-* RETURN VALUE:
-*
-* None.
-*
-* NOTES:
-*
-* None.
-*
-******************************************************************************/
-void
-XDmaChannel_SetPktWaitBound(XDmaChannel * InstancePtr, u32 WaitBound)
-{
- /* assert to verify input arguments */
-
- XASSERT_VOID(InstancePtr != NULL);
- XASSERT_VOID(WaitBound < 1024);
- XASSERT_VOID(InstancePtr->IsReady == XCOMPONENT_IS_READY);
-
- /* set the packet wait bound in the register such that interrupt may be
- * generated, if enabled, when packets have not been handled for a specific
- * amount of time
- */
- XIo_Out32(InstancePtr->RegBaseAddress + XDC_PWB_REG_OFFSET, WaitBound);
-}
-
-/******************************************************************************
-*
-* FUNCTION:
-*
-* XDmaChannel_GetPktWaitBound
-*
-* DESCRIPTION:
-*
-* This function gets the value of the packet wait bound register of the
-* DMA channel. This value contains the timer value used to trigger an
-* interrupt when not enough packets have been received to reach the packet
-* count threshold.
-*
-* The timer is in millisecond units with +/- 33% accuracy.
-*
-* ARGUMENTS:
-*
-* InstancePtr contains a pointer to the DMA channel to operate on. The DMA
-* channel should be configured to use scatter gather in order for this function
-* to be called.
-*
-* RETURN VALUE:
-*
-* The packet wait bound register contents for the DMA channel.
-*
-* NOTES:
-*
-* None.
-*
-******************************************************************************/
-u32
-XDmaChannel_GetPktWaitBound(XDmaChannel * InstancePtr)
-{
- /* assert to verify input arguments */
-
- XASSERT_NONVOID(InstancePtr != NULL);
- XASSERT_NONVOID(InstancePtr->IsReady == XCOMPONENT_IS_READY);
-
- /* get the packet wait bound from the register and return it */
-
- return XIo_In32(InstancePtr->RegBaseAddress + XDC_PWB_REG_OFFSET);
-}
diff --git a/board/xilinx/common/xio.h b/board/xilinx/common/xio.h
deleted file mode 100644
index 5bb09c8940..0000000000
--- a/board/xilinx/common/xio.h
+++ /dev/null
@@ -1,81 +0,0 @@
-/*
- * xio.h
- *
- * Defines XIo functions for Xilinx OCP in terms of Linux primitives
- *
- * Author: MontaVista Software, Inc.
- * source@mvista.com
- *
- * Copyright 2002 MontaVista Software Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
- * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
- * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#ifndef XIO_H
-#define XIO_H
-
-#include "xbasic_types.h"
-#include <asm/io.h>
-
-typedef u32 XIo_Address;
-
-extern inline u8
-XIo_In8(XIo_Address InAddress)
-{
- return (u8) in_8((volatile unsigned char *) InAddress);
-}
-extern inline u16
-XIo_In16(XIo_Address InAddress)
-{
- return (u16) in_be16((volatile unsigned short *) InAddress);
-}
-extern inline u32
-XIo_In32(XIo_Address InAddress)
-{
- return (u32) in_be32((volatile unsigned *) InAddress);
-}
-extern inline void
-XIo_Out8(XIo_Address OutAddress, u8 Value)
-{
- out_8((volatile unsigned char *) OutAddress, Value);
-}
-extern inline void
-XIo_Out16(XIo_Address OutAddress, u16 Value)
-{
- out_be16((volatile unsigned short *) OutAddress, Value);
-}
-extern inline void
-XIo_Out32(XIo_Address OutAddress, u32 Value)
-{
- out_be32((volatile unsigned *) OutAddress, Value);
-}
-
-#define XIo_ToLittleEndian16(s,d) (*(u16*)(d) = cpu_to_le16((u16)(s)))
-#define XIo_ToLittleEndian32(s,d) (*(u32*)(d) = cpu_to_le32((u32)(s)))
-#define XIo_ToBigEndian16(s,d) (*(u16*)(d) = cpu_to_be16((u16)(s)))
-#define XIo_ToBigEndian32(s,d) (*(u32*)(d) = cpu_to_be32((u32)(s)))
-
-#define XIo_FromLittleEndian16(s,d) (*(u16*)(d) = le16_to_cpu((u16)(s)))
-#define XIo_FromLittleEndian32(s,d) (*(u32*)(d) = le32_to_cpu((u32)(s)))
-#define XIo_FromBigEndian16(s,d) (*(u16*)(d) = be16_to_cpu((u16)(s)))
-#define XIo_FromBigEndian32(s,d) (*(u32*)(d) = be32_to_cpu((u32)(s)))
-
-#endif /* XIO_H */
diff --git a/board/xilinx/common/xipif_v1_23_b.c b/board/xilinx/common/xipif_v1_23_b.c
deleted file mode 100644
index c7311ab9be..0000000000
--- a/board/xilinx/common/xipif_v1_23_b.c
+++ /dev/null
@@ -1,331 +0,0 @@
-/* $Id: xipif_v1_23_b.c,v 1.1 2002/03/18 23:24:52 linnj Exp $ */
-/******************************************************************************
-*
-* XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS"
-* AS A COURTESY TO YOU, SOLELY FOR USE IN DEVELOPING PROGRAMS AND
-* SOLUTIONS FOR XILINX DEVICES. BY PROVIDING THIS DESIGN, CODE,
-* OR INFORMATION AS ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE,
-* APPLICATION OR STANDARD, XILINX IS MAKING NO REPRESENTATION
-* THAT THIS IMPLEMENTATION IS FREE FROM ANY CLAIMS OF INFRINGEMENT,
-* AND YOU ARE RESPONSIBLE FOR OBTAINING ANY RIGHTS YOU MAY REQUIRE
-* FOR YOUR IMPLEMENTATION. XILINX EXPRESSLY DISCLAIMS ANY
-* WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE
-* IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR
-* REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF
-* INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE.
-*
-* (c) Copyright 2002 Xilinx Inc.
-* All rights reserved.
-*
-******************************************************************************/
-/******************************************************************************
-*
-* FILENAME:
-*
-* xipif.c
-*
-* DESCRIPTION:
-*
-* This file contains the implementation of the XIpIf component. The
-* XIpIf component encapsulates the IPIF, which is the standard interface
-* that IP must adhere to when connecting to a bus. The purpose of this
-* component is to encapsulate the IPIF processing such that maintainability
-* is increased. This component does not provide a lot of abstraction from
-* from the details of the IPIF as it is considered a building block for
-* device drivers. A device driver designer must be familiar with the
-* details of the IPIF hardware to use this component.
-*
-* The IPIF hardware provides a building block for all hardware devices such
-* that each device does not need to reimplement these building blocks. The
-* IPIF contains other building blocks, such as FIFOs and DMA channels, which
-* are also common to many devices. These blocks are implemented as separate
-* hardware blocks and instantiated within the IPIF. The primary hardware of
-* the IPIF which is implemented by this software component is the interrupt
-* architecture. Since there are many blocks of a device which may generate
-* interrupts, all the interrupt processing is contained in the common part
-* of the device, the IPIF. This interrupt processing is for the device level
-* only and does not include any processing for the interrupt controller.
-*
-* A device is a mechanism such as an Ethernet MAC. The device is made
-* up of several parts which include an IPIF and the IP. The IPIF contains most
-* of the device infrastructure which is common to all devices, such as
-* interrupt processing, DMA channels, and FIFOs. The infrastructure may also
-* be referred to as IPIF internal blocks since they are part of the IPIF and
-* are separate blocks that can be selected based upon the needs of the device.
-* The IP of the device is the logic that is unique to the device and interfaces
-* to the IPIF of the device.
-*
-* In general, there are two levels of registers within the IPIF. The first
-* level, referred to as the device level, contains registers which are for the
-* entire device. The second level, referred to as the IP level, contains
-* registers which are specific to the IP of the device. The two levels of
-* registers are designed to be hierarchical such that the device level is
-* is a more general register set above the more specific registers of the IP.
-* The IP level of registers provides functionality which is typically common
-* across all devices and allows IP designers to focus on the unique aspects
-* of the IP.
-*
-* The interrupt registers of the IPIF are parameterizable such that the only
-* the number of bits necessary for the device are implemented. The functions
-* of this component do not attempt to validate that the passed in arguments are
-* valid based upon the number of implemented bits. This is necessary to
-* maintain the level of performance required for the common components. Bits
-* of the registers are assigned starting at the least significant bit of the
-* registers.
-*
-* Critical Sections
-*
-* It is the responsibility of the device driver designer to use critical
-* sections as necessary when calling functions of the IPIF. This component
-* does not use critical sections and it does access registers using
-* read-modify-write operations. Calls to IPIF functions from a main thread
-* and from an interrupt context could produce unpredictable behavior such that
-* the caller must provide the appropriate critical sections.
-*
-* Mutual Exclusion
-*
-* The functions of the IPIF are not thread safe such that the caller of all
-* functions is responsible for ensuring mutual exclusion for an IPIF. Mutual
-* exclusion across multiple IPIF components is not necessary.
-*
-* NOTES:
-*
-* None.
-*
-* MODIFICATION HISTORY:
-*
-* Ver Who Date Changes
-* ----- ---- -------- -----------------------------------------------
-* 1.23b jhl 02/27/01 Repartioned to reduce size
-*
-******************************************************************************/
-
-/***************************** Include Files *********************************/
-
-#include "xipif_v1_23_b.h"
-#include "xio.h"
-
-/************************** Constant Definitions *****************************/
-
-/* the following constant is used to generate bit masks for register testing
- * in the self test functions, it defines the starting bit mask that is to be
- * shifted from the LSB to MSB in creating a register test mask
- */
-#define XIIF_V123B_FIRST_BIT_MASK 1UL
-
-/**************************** Type Definitions *******************************/
-
-/***************** Macros (Inline Functions) Definitions *********************/
-
-/************************** Variable Definitions *****************************/
-
-/************************** Function Prototypes ******************************/
-
-static XStatus IpIntrSelfTest(u32 RegBaseAddress, u32 IpRegistersWidth);
-
-/******************************************************************************
-*
-* FUNCTION:
-*
-* XIpIf_SelfTest
-*
-* DESCRIPTION:
-*
-* This function performs a self test on the specified IPIF component. Many
-* of the registers in the IPIF are tested to ensure proper operation. This
-* function is destructive because the IPIF is reset at the start of the test
-* and at the end of the test to ensure predictable results. The IPIF reset
-* also resets the entire device that uses the IPIF. This function exits with
-* all interrupts for the device disabled.
-*
-* ARGUMENTS:
-*
-* InstancePtr points to the XIpIf to operate on.
-*
-* DeviceRegistersWidth contains the number of bits in the device interrupt
-* registers. The hardware is parameterizable such that only the number of bits
-* necessary to support a device are implemented. This value must be between 0
-* and 32 with 0 indicating there are no device interrupt registers used.
-*
-* IpRegistersWidth contains the number of bits in the IP interrupt registers
-* of the device. The hardware is parameterizable such that only the number of
-* bits necessary to support a device are implemented. This value must be
-* between 0 and 32 with 0 indicating there are no IP interrupt registers used.
-*
-* RETURN VALUE:
-*
-* A value of XST_SUCCESS indicates the test was successful with no errors.
-* Any one of the following error values may also be returned.
-*
-* XST_IPIF_RESET_REGISTER_ERROR The value of a register at reset was
-* not valid
-* XST_IPIF_IP_STATUS_ERROR A write to the IP interrupt status
-* register did not read back correctly
-* XST_IPIF_IP_ACK_ERROR One or more bits in the IP interrupt
-* status register did not reset when acked
-* XST_IPIF_IP_ENABLE_ERROR The IP interrupt enable register
-* did not read back correctly based upon
-* what was written to it
-*
-* NOTES:
-*
-* None.
-*
-******************************************************************************/
-
-/* the following constant defines the maximum number of bits which may be
- * used in the registers at the device and IP levels, this is based upon the
- * number of bits available in the registers
- */
-#define XIIF_V123B_MAX_REG_BIT_COUNT 32
-
-XStatus
-XIpIfV123b_SelfTest(u32 RegBaseAddress, u8 IpRegistersWidth)
-{
- XStatus Status;
-
- /* assert to verify arguments are valid */
-
- XASSERT_NONVOID(IpRegistersWidth <= XIIF_V123B_MAX_REG_BIT_COUNT);
-
- /* reset the IPIF such that it's in a known state before the test
- * and interrupts are globally disabled
- */
- XIIF_V123B_RESET(RegBaseAddress);
-
- /* perform the self test on the IP interrupt registers, if
- * it is not successful exit with the status
- */
- Status = IpIntrSelfTest(RegBaseAddress, IpRegistersWidth);
- if (Status != XST_SUCCESS) {
- return Status;
- }
-
- /* reset the IPIF such that it's in a known state before exiting test */
-
- XIIF_V123B_RESET(RegBaseAddress);
-
- /* reaching this point means there were no errors, return success */
-
- return XST_SUCCESS;
-}
-
-/******************************************************************************
-*
-* FUNCTION:
-*
-* IpIntrSelfTest
-*
-* DESCRIPTION:
-*
-* Perform a self test on the IP interrupt registers of the IPIF. This
-* function modifies registers of the IPIF such that they are not guaranteed
-* to be in the same state when it returns. Any bits in the IP interrupt
-* status register which are set are assumed to be set by default after a reset
-* and are not tested in the test.
-*
-* ARGUMENTS:
-*
-* InstancePtr points to the XIpIf to operate on.
-*
-* IpRegistersWidth contains the number of bits in the IP interrupt registers
-* of the device. The hardware is parameterizable such that only the number of
-* bits necessary to support a device are implemented. This value must be
-* between 0 and 32 with 0 indicating there are no IP interrupt registers used.
-*
-* RETURN VALUE:
-*
-* A status indicating XST_SUCCESS if the test was successful. Otherwise, one
-* of the following values is returned.
-*
-* XST_IPIF_RESET_REGISTER_ERROR The value of a register at reset was
-* not valid
-* XST_IPIF_IP_STATUS_ERROR A write to the IP interrupt status
-* register did not read back correctly
-* XST_IPIF_IP_ACK_ERROR One or more bits in the IP status
-* register did not reset when acked
-* XST_IPIF_IP_ENABLE_ERROR The IP interrupt enable register
-* did not read back correctly based upon
-* what was written to it
-* NOTES:
-*
-* None.
-*
-******************************************************************************/
-static XStatus
-IpIntrSelfTest(u32 RegBaseAddress, u32 IpRegistersWidth)
-{
- /* ensure that the IP interrupt interrupt enable register is zero
- * as it should be at reset, the interrupt status is dependent upon the
- * IP such that it's reset value is not known
- */
- if (XIIF_V123B_READ_IIER(RegBaseAddress) != 0) {
- return XST_IPIF_RESET_REGISTER_ERROR;
- }
-
- /* if there are any used IP interrupts, then test all of the interrupt
- * bits in all testable registers
- */
- if (IpRegistersWidth > 0) {
- u32 BitCount;
- u32 IpInterruptMask = XIIF_V123B_FIRST_BIT_MASK;
- u32 Mask = XIIF_V123B_FIRST_BIT_MASK; /* bits assigned MSB to LSB */
- u32 InterruptStatus;
-
- /* generate the register masks to be used for IP register tests, the
- * number of bits supported by the hardware is parameterizable such
- * that only that number of bits are implemented in the registers, the
- * bits are allocated starting at the MSB of the registers
- */
- for (BitCount = 1; BitCount < IpRegistersWidth; BitCount++) {
- Mask = Mask << 1;
- IpInterruptMask |= Mask;
- }
-
- /* get the current IP interrupt status register contents, any bits
- * already set must default to 1 at reset in the device and these
- * bits can't be tested in the following test, remove these bits from
- * the mask that was generated for the test
- */
- InterruptStatus = XIIF_V123B_READ_IISR(RegBaseAddress);
- IpInterruptMask &= ~InterruptStatus;
-
- /* set the bits in the device status register and verify them by reading
- * the register again, all bits of the register are latched
- */
- XIIF_V123B_WRITE_IISR(RegBaseAddress, IpInterruptMask);
- InterruptStatus = XIIF_V123B_READ_IISR(RegBaseAddress);
- if ((InterruptStatus & IpInterruptMask) != IpInterruptMask)
- {
- return XST_IPIF_IP_STATUS_ERROR;
- }
-
- /* test to ensure that the bits set in the IP interrupt status register
- * can be cleared by acknowledging them in the IP interrupt status
- * register then read it again and verify it was cleared
- */
- XIIF_V123B_WRITE_IISR(RegBaseAddress, IpInterruptMask);
- InterruptStatus = XIIF_V123B_READ_IISR(RegBaseAddress);
- if ((InterruptStatus & IpInterruptMask) != 0) {
- return XST_IPIF_IP_ACK_ERROR;
- }
-
- /* set the IP interrupt enable set register and then read the IP
- * interrupt enable register and verify the interrupts were enabled
- */
- XIIF_V123B_WRITE_IIER(RegBaseAddress, IpInterruptMask);
- if (XIIF_V123B_READ_IIER(RegBaseAddress) != IpInterruptMask) {
- return XST_IPIF_IP_ENABLE_ERROR;
- }
-
- /* clear the IP interrupt enable register and then read the
- * IP interrupt enable register and verify the interrupts were disabled
- */
- XIIF_V123B_WRITE_IIER(RegBaseAddress, 0);
- if (XIIF_V123B_READ_IIER(RegBaseAddress) != 0) {
- return XST_IPIF_IP_ENABLE_ERROR;
- }
- }
- return XST_SUCCESS;
-}
diff --git a/board/xilinx/common/xipif_v1_23_b.h b/board/xilinx/common/xipif_v1_23_b.h
deleted file mode 100644
index 3ce1fffba5..0000000000
--- a/board/xilinx/common/xipif_v1_23_b.h
+++ /dev/null
@@ -1,746 +0,0 @@
-/* $Id: xipif_v1_23_b.h,v 1.1 2002/03/18 23:24:52 linnj Exp $ */
-/******************************************************************************
-*
-* XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS"
-* AS A COURTESY TO YOU, SOLELY FOR USE IN DEVELOPING PROGRAMS AND
-* SOLUTIONS FOR XILINX DEVICES. BY PROVIDING THIS DESIGN, CODE,
-* OR INFORMATION AS ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE,
-* APPLICATION OR STANDARD, XILINX IS MAKING NO REPRESENTATION
-* THAT THIS IMPLEMENTATION IS FREE FROM ANY CLAIMS OF INFRINGEMENT,
-* AND YOU ARE RESPONSIBLE FOR OBTAINING ANY RIGHTS YOU MAY REQUIRE
-* FOR YOUR IMPLEMENTATION. XILINX EXPRESSLY DISCLAIMS ANY
-* WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE
-* IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR
-* REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF
-* INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE.
-*
-* (c) Copyright 2002 Xilinx Inc.
-* All rights reserved.
-*
-******************************************************************************/
-/******************************************************************************
-*
-* FILENAME:
-*
-* xipif.h
-*
-* DESCRIPTION:
-*
-* The XIpIf component encapsulates the IPIF, which is the standard interface
-* that IP must adhere to when connecting to a bus. The purpose of this
-* component is to encapsulate the IPIF processing such that maintainability
-* is increased. This component does not provide a lot of abstraction from
-* from the details of the IPIF as it is considered a building block for
-* device drivers. A device driver designer must be familiar with the
-* details of the IPIF hardware to use this component.
-*
-* The IPIF hardware provides a building block for all hardware devices such
-* that each device does not need to reimplement these building blocks. The
-* IPIF contains other building blocks, such as FIFOs and DMA channels, which
-* are also common to many devices. These blocks are implemented as separate
-* hardware blocks and instantiated within the IPIF. The primary hardware of
-* the IPIF which is implemented by this software component is the interrupt
-* architecture. Since there are many blocks of a device which may generate
-* interrupts, all the interrupt processing is contained in the common part
-* of the device, the IPIF. This interrupt processing is for the device level
-* only and does not include any processing for the interrupt controller.
-*
-* A device is a mechanism such as an Ethernet MAC. The device is made
-* up of several parts which include an IPIF and the IP. The IPIF contains most
-* of the device infrastructure which is common to all devices, such as
-* interrupt processing, DMA channels, and FIFOs. The infrastructure may also
-* be referred to as IPIF internal blocks since they are part of the IPIF and
-* are separate blocks that can be selected based upon the needs of the device.
-* The IP of the device is the logic that is unique to the device and interfaces
-* to the IPIF of the device.
-*
-* In general, there are two levels of registers within the IPIF. The first
-* level, referred to as the device level, contains registers which are for the
-* entire device. The second level, referred to as the IP level, contains
-* registers which are specific to the IP of the device. The two levels of
-* registers are designed to be hierarchical such that the device level is
-* is a more general register set above the more specific registers of the IP.
-* The IP level of registers provides functionality which is typically common
-* across all devices and allows IP designers to focus on the unique aspects
-* of the IP.
-*
-* Critical Sections
-*
-* It is the responsibility of the device driver designer to use critical
-* sections as necessary when calling functions of the IPIF. This component
-* does not use critical sections and it does access registers using
-* read-modify-write operations. Calls to IPIF functions from a main thread
-* and from an interrupt context could produce unpredictable behavior such that
-* the caller must provide the appropriate critical sections.
-*
-* Mutual Exclusion
-*
-* The functions of the IPIF are not thread safe such that the caller of all
-* functions is responsible for ensuring mutual exclusion for an IPIF. Mutual
-* exclusion across multiple IPIF components is not necessary.
-*
-* NOTES:
-*
-* None.
-*
-* MODIFICATION HISTORY:
-*
-* Ver Who Date Changes
-* ----- ---- -------- -----------------------------------------------
-* 1.23b jhl 02/27/01 Repartioned to minimize size
-*
-******************************************************************************/
-
-#ifndef XIPIF_H /* prevent circular inclusions */
-#define XIPIF_H /* by using protection macros */
-
-/***************************** Include Files *********************************/
-#include "xbasic_types.h"
-#include "xstatus.h"
-#include "xversion.h"
-
-/************************** Constant Definitions *****************************/
-
-/* the following constants define the register offsets for the registers of the
- * IPIF, there are some holes in the memory map for reserved addresses to allow
- * other registers to be added and still match the memory map of the interrupt
- * controller registers
- */
-#define XIIF_V123B_DISR_OFFSET 0UL /* device interrupt status register */
-#define XIIF_V123B_DIPR_OFFSET 4UL /* device interrupt pending register */
-#define XIIF_V123B_DIER_OFFSET 8UL /* device interrupt enable register */
-#define XIIF_V123B_DIIR_OFFSET 24UL /* device interrupt ID register */
-#define XIIF_V123B_DGIER_OFFSET 28UL /* device global interrupt enable reg */
-#define XIIF_V123B_IISR_OFFSET 32UL /* IP interrupt status register */
-#define XIIF_V123B_IIER_OFFSET 40UL /* IP interrupt enable register */
-#define XIIF_V123B_RESETR_OFFSET 64UL /* reset register */
-
-#define XIIF_V123B_RESET_MASK 0xAUL
-
-/* the following constant is used for the device global interrupt enable
- * register, to enable all interrupts for the device, this is the only bit
- * in the register
- */
-#define XIIF_V123B_GINTR_ENABLE_MASK 0x80000000UL
-
-/* the following constants contain the masks to identify each internal IPIF
- * condition in the device registers of the IPIF, interrupts are assigned
- * in the register from LSB to the MSB
- */
-#define XIIF_V123B_ERROR_MASK 1UL /* LSB of the register */
-
-/* The following constants contain interrupt IDs which identify each internal
- * IPIF condition, this value must correlate with the mask constant for the
- * error
- */
-#define XIIF_V123B_ERROR_INTERRUPT_ID 0 /* interrupt bit #, (LSB = 0) */
-#define XIIF_V123B_NO_INTERRUPT_ID 128 /* no interrupts are pending */
-
-/**************************** Type Definitions *******************************/
-
-/***************** Macros (Inline Functions) Definitions *********************/
-
-/******************************************************************************
-*
-* MACRO:
-*
-* XIIF_V123B_RESET
-*
-* DESCRIPTION:
-*
-* Reset the IPIF component and hardware. This is a destructive operation that
-* could cause the loss of data since resetting the IPIF of a device also
-* resets the device using the IPIF and any blocks, such as FIFOs or DMA
-* channels, within the IPIF. All registers of the IPIF will contain their
-* reset value when this function returns.
-*
-* ARGUMENTS:
-*
-* RegBaseAddress contains the base address of the IPIF registers.
-*
-* RETURN VALUE:
-*
-* None.
-*
-* NOTES:
-*
-* None.
-*
-******************************************************************************/
-
-/* the following constant is used in the reset register to cause the IPIF to
- * reset
- */
-#define XIIF_V123B_RESET(RegBaseAddress) \
- XIo_Out32(RegBaseAddress + XIIF_V123B_RESETR_OFFSET, XIIF_V123B_RESET_MASK)
-
-/******************************************************************************
-*
-* MACRO:
-*
-* XIIF_V123B_WRITE_DISR
-*
-* DESCRIPTION:
-*
-* This function sets the device interrupt status register to the value.
-* This register indicates the status of interrupt sources for a device
-* which contains the IPIF. The status is independent of whether interrupts
-* are enabled and could be used for polling a device at a higher level rather
-* than a more detailed level.
-*
-* Each bit of the register correlates to a specific interrupt source within the
-* device which contains the IPIF. With the exception of some internal IPIF
-* conditions, the contents of this register are not latched but indicate
-* the live status of the interrupt sources within the device. Writing any of
-* the non-latched bits of the register will have no effect on the register.
-*
-* For the latched bits of this register only, setting a bit which is zero
-* within this register causes an interrupt to generated. The device global
-* interrupt enable register and the device interrupt enable register must be set
-* appropriately to allow an interrupt to be passed out of the device. The
-* interrupt is cleared by writing to this register with the bits to be
-* cleared set to a one and all others to zero. This register implements a
-* toggle on write functionality meaning any bits which are set in the value
-* written cause the bits in the register to change to the opposite state.
-*
-* This function writes the specified value to the register such that
-* some bits may be set and others cleared. It is the caller's responsibility
-* to get the value of the register prior to setting the value to prevent a
-* destructive behavior.
-*
-* ARGUMENTS:
-*
-* RegBaseAddress contains the base address of the IPIF registers.
-*
-* Status contains the value to be written to the interrupt status register of
-* the device. The only bits which can be written are the latched bits which
-* contain the internal IPIF conditions. The following values may be used to
-* set the status register or clear an interrupt condition.
-*
-* XIIF_V123B_ERROR_MASK Indicates a device error in the IPIF
-*
-* RETURN VALUE:
-*
-* None.
-*
-* NOTES:
-*
-* None.
-*
-******************************************************************************/
-#define XIIF_V123B_WRITE_DISR(RegBaseAddress, Status) \
- XIo_Out32((RegBaseAddress) + XIIF_V123B_DISR_OFFSET, (Status))
-
-/******************************************************************************
-*
-* MACRO:
-*
-* XIIF_V123B_READ_DISR
-*
-* DESCRIPTION:
-*
-* This function gets the device interrupt status register contents.
-* This register indicates the status of interrupt sources for a device
-* which contains the IPIF. The status is independent of whether interrupts
-* are enabled and could be used for polling a device at a higher level.
-*
-* Each bit of the register correlates to a specific interrupt source within the
-* device which contains the IPIF. With the exception of some internal IPIF
-* conditions, the contents of this register are not latched but indicate
-* the live status of the interrupt sources within the device.
-*
-* For only the latched bits of this register, the interrupt may be cleared by
-* writing to these bits in the status register.
-*
-* ARGUMENTS:
-*
-* RegBaseAddress contains the base address of the IPIF registers.
-*
-* RETURN VALUE:
-*
-* A status which contains the value read from the interrupt status register of
-* the device. The bit definitions are specific to the device with
-* the exception of the latched internal IPIF condition bits. The following
-* values may be used to detect internal IPIF conditions in the status.
-*
-* XIIF_V123B_ERROR_MASK Indicates a device error in the IPIF
-*
-* NOTES:
-*
-* None.
-*
-******************************************************************************/
-#define XIIF_V123B_READ_DISR(RegBaseAddress) \
- XIo_In32((RegBaseAddress) + XIIF_V123B_DISR_OFFSET)
-
-/******************************************************************************
-*
-* MACRO:
-*
-* XIIF_V123B_WRITE_DIER
-*
-* DESCRIPTION:
-*
-* This function sets the device interrupt enable register contents.
-* This register controls which interrupt sources of the device are allowed to
-* generate an interrupt. The device global interrupt enable register must also
-* be set appropriately for an interrupt to be passed out of the device.
-*
-* Each bit of the register correlates to a specific interrupt source within the
-* device which contains the IPIF. Setting a bit in this register enables that
-* interrupt source to generate an interrupt. Clearing a bit in this register
-* disables interrupt generation for that interrupt source.
-*
-* This function writes only the specified value to the register such that
-* some interrupts source may be enabled and others disabled. It is the
-* caller's responsibility to get the value of the interrupt enable register
-* prior to setting the value to prevent an destructive behavior.
-*
-* An interrupt source may not be enabled to generate an interrupt, but can
-* still be polled in the interrupt status register.
-*
-* ARGUMENTS:
-*
-* RegBaseAddress contains the base address of the IPIF registers.
-*
-* Enable contains the value to be written to the interrupt enable register
-* of the device. The bit definitions are specific to the device with
-* the exception of the internal IPIF conditions. The following
-* values may be used to enable the internal IPIF conditions interrupts.
-*
-* XIIF_V123B_ERROR_MASK Indicates a device error in the IPIF
-*
-* RETURN VALUE:
-*
-* None.
-*
-* NOTES:
-*
-* Signature: u32 XIIF_V123B_WRITE_DIER(u32 RegBaseAddress,
-* u32 Enable)
-*
-******************************************************************************/
-#define XIIF_V123B_WRITE_DIER(RegBaseAddress, Enable) \
- XIo_Out32((RegBaseAddress) + XIIF_V123B_DIER_OFFSET, (Enable))
-
-/******************************************************************************
-*
-* MACRO:
-*
-* XIIF_V123B_READ_DIER
-*
-* DESCRIPTION:
-*
-* This function gets the device interrupt enable register contents.
-* This register controls which interrupt sources of the device
-* are allowed to generate an interrupt. The device global interrupt enable
-* register and the device interrupt enable register must also be set
-* appropriately for an interrupt to be passed out of the device.
-*
-* Each bit of the register correlates to a specific interrupt source within the
-* device which contains the IPIF. Setting a bit in this register enables that
-* interrupt source to generate an interrupt if the global enable is set
-* appropriately. Clearing a bit in this register disables interrupt generation
-* for that interrupt source regardless of the global interrupt enable.
-*
-* ARGUMENTS:
-*
-* RegBaseAddress contains the base address of the IPIF registers.
-*
-* RETURN VALUE:
-*
-* The value read from the interrupt enable register of the device. The bit
-* definitions are specific to the device with the exception of the internal
-* IPIF conditions. The following values may be used to determine from the
-* value if the internal IPIF conditions interrupts are enabled.
-*
-* XIIF_V123B_ERROR_MASK Indicates a device error in the IPIF
-*
-* NOTES:
-*
-* None.
-*
-******************************************************************************/
-#define XIIF_V123B_READ_DIER(RegBaseAddress) \
- XIo_In32((RegBaseAddress) + XIIF_V123B_DIER_OFFSET)
-
-/******************************************************************************
-*
-* MACRO:
-*
-* XIIF_V123B_READ_DIPR
-*
-* DESCRIPTION:
-*
-* This function gets the device interrupt pending register contents.
-* This register indicates the pending interrupt sources, those that are waiting
-* to be serviced by the software, for a device which contains the IPIF.
-* An interrupt must be enabled in the interrupt enable register of the IPIF to
-* be pending.
-*
-* Each bit of the register correlates to a specific interrupt source within the
-* the device which contains the IPIF. With the exception of some internal IPIF
-* conditions, the contents of this register are not latched since the condition
-* is latched in the IP interrupt status register, by an internal block of the
-* IPIF such as a FIFO or DMA channel, or by the IP of the device. This register
-* is read only and is not latched, but it is necessary to acknowledge (clear)
-* the interrupt condition by performing the appropriate processing for the IP
-* or block within the IPIF.
-*
-* This register can be thought of as the contents of the interrupt status
-* register ANDed with the contents of the interrupt enable register.
-*
-* ARGUMENTS:
-*
-* RegBaseAddress contains the base address of the IPIF registers.
-*
-* RETURN VALUE:
-*
-* The value read from the interrupt pending register of the device. The bit
-* definitions are specific to the device with the exception of the latched
-* internal IPIF condition bits. The following values may be used to detect
-* internal IPIF conditions in the value.
-*
-* XIIF_V123B_ERROR_MASK Indicates a device error in the IPIF
-*
-* NOTES:
-*
-* None.
-*
-******************************************************************************/
-#define XIIF_V123B_READ_DIPR(RegBaseAddress) \
- XIo_In32((RegBaseAddress) + XIIF_V123B_DIPR_OFFSET)
-
-/******************************************************************************
-*
-* MACRO:
-*
-* XIIF_V123B_READ_DIIR
-*
-* DESCRIPTION:
-*
-* This function gets the device interrupt ID for the highest priority interrupt
-* which is pending from the interrupt ID register. This function provides
-* priority resolution such that faster interrupt processing is possible.
-* Without priority resolution, it is necessary for the software to read the
-* interrupt pending register and then check each interrupt source to determine
-* if an interrupt is pending. Priority resolution becomes more important as the
-* number of interrupt sources becomes larger.
-*
-* Interrupt priorities are based upon the bit position of the interrupt in the
-* interrupt pending register with bit 0 being the highest priority. The
-* interrupt ID is the priority of the interrupt, 0 - 31, with 0 being the
-* highest priority. The interrupt ID register is live rather than latched such
-* that multiple calls to this function may not yield the same results. A
-* special value, outside of the interrupt priority range of 0 - 31, is
-* contained in the register which indicates that no interrupt is pending. This
-* may be useful for allowing software to continue processing interrupts in a
-* loop until there are no longer any interrupts pending.
-*
-* The interrupt ID is designed to allow a function pointer table to be used
-* in the software such that the interrupt ID is used as an index into that
-* table. The function pointer table could contain an instance pointer, such
-* as to DMA channel, and a function pointer to the function which handles
-* that interrupt. This design requires the interrupt processing of the device
-* driver to be partitioned into smaller more granular pieces based upon
-* hardware used by the device, such as DMA channels and FIFOs.
-*
-* It is not mandatory that this function be used by the device driver software.
-* It may choose to read the pending register and resolve the pending interrupt
-* priorities on it's own.
-*
-* ARGUMENTS:
-*
-* RegBaseAddress contains the base address of the IPIF registers.
-*
-* RETURN VALUE:
-*
-* An interrupt ID, 0 - 31, which identifies the highest priority interrupt
-* which is pending. A value of XIIF_NO_INTERRUPT_ID indicates that there is
-* no interrupt pending. The following values may be used to identify the
-* interrupt ID for the internal IPIF interrupts.
-*
-* XIIF_V123B_ERROR_INTERRUPT_ID Indicates a device error in the IPIF
-*
-* NOTES:
-*
-* None.
-*
-******************************************************************************/
-#define XIIF_V123B_READ_DIIR(RegBaseAddress) \
- XIo_In32((RegBaseAddress) + XIIF_V123B_DIIR_OFFSET)
-
-/******************************************************************************
-*
-* MACRO:
-*
-* XIIF_V123B_GLOBAL_INTR_DISABLE
-*
-* DESCRIPTION:
-*
-* This function disables all interrupts for the device by writing to the global
-* interrupt enable register. This register provides the ability to disable
-* interrupts without any modifications to the interrupt enable register such
-* that it is minimal effort to restore the interrupts to the previous enabled
-* state. The corresponding function, XIpIf_GlobalIntrEnable, is provided to
-* restore the interrupts to the previous enabled state. This function is
-* designed to be used in critical sections of device drivers such that it is
-* not necessary to disable other device interrupts.
-*
-* ARGUMENTS:
-*
-* RegBaseAddress contains the base address of the IPIF registers.
-*
-* RETURN VALUE:
-*
-* None.
-*
-* NOTES:
-*
-* None.
-*
-******************************************************************************/
-#define XIIF_V123B_GINTR_DISABLE(RegBaseAddress) \
- XIo_Out32((RegBaseAddress) + XIIF_V123B_DGIER_OFFSET, 0)
-
-/******************************************************************************
-*
-* MACRO:
-*
-* XIIF_V123B_GINTR_ENABLE
-*
-* DESCRIPTION:
-*
-* This function writes to the global interrupt enable register to enable
-* interrupts from the device. This register provides the ability to enable
-* interrupts without any modifications to the interrupt enable register such
-* that it is minimal effort to restore the interrupts to the previous enabled
-* state. This function does not enable individual interrupts as the interrupt
-* enable register must be set appropriately. This function is designed to be
-* used in critical sections of device drivers such that it is not necessary to
-* disable other device interrupts.
-*
-* ARGUMENTS:
-*
-* RegBaseAddress contains the base address of the IPIF registers.
-*
-* RETURN VALUE:
-*
-* None.
-*
-* NOTES:
-*
-* None.
-*
-******************************************************************************/
-#define XIIF_V123B_GINTR_ENABLE(RegBaseAddress) \
- XIo_Out32((RegBaseAddress) + XIIF_V123B_DGIER_OFFSET, \
- XIIF_V123B_GINTR_ENABLE_MASK)
-
-/******************************************************************************
-*
-* MACRO:
-*
-* XIIF_V123B_IS_GINTR_ENABLED
-*
-* DESCRIPTION:
-*
-* This function determines if interrupts are enabled at the global level by
-* reading the gloabl interrupt register. This register provides the ability to
-* disable interrupts without any modifications to the interrupt enable register
-* such that it is minimal effort to restore the interrupts to the previous
-* enabled state.
-*
-* ARGUMENTS:
-*
-* RegBaseAddress contains the base address of the IPIF registers.
-*
-* RETURN VALUE:
-*
-* XTRUE if interrupts are enabled for the IPIF, XFALSE otherwise.
-*
-* NOTES:
-*
-* None.
-*
-******************************************************************************/
-#define XIIF_V123B_IS_GINTR_ENABLED(RegBaseAddress) \
- (XIo_In32((RegBaseAddress) + XIIF_V123B_DGIER_OFFSET) == \
- XIIF_V123B_GINTR_ENABLE_MASK)
-
-/******************************************************************************
-*
-* MACRO:
-*
-* XIIF_V123B_WRITE_IISR
-*
-* DESCRIPTION:
-*
-* This function sets the IP interrupt status register to the specified value.
-* This register indicates the status of interrupt sources for the IP of the
-* device. The IP is defined as the part of the device that connects to the
-* IPIF. The status is independent of whether interrupts are enabled such that
-* the status register may also be polled when interrupts are not enabled.
-*
-* Each bit of the register correlates to a specific interrupt source within the
-* IP. All bits of this register are latched. Setting a bit which is zero
-* within this register causes an interrupt to be generated. The device global
-* interrupt enable register and the device interrupt enable register must be set
-* appropriately to allow an interrupt to be passed out of the device. The
-* interrupt is cleared by writing to this register with the bits to be
-* cleared set to a one and all others to zero. This register implements a
-* toggle on write functionality meaning any bits which are set in the value
-* written cause the bits in the register to change to the opposite state.
-*
-* This function writes only the specified value to the register such that
-* some status bits may be set and others cleared. It is the caller's
-* responsibility to get the value of the register prior to setting the value
-* to prevent an destructive behavior.
-*
-* ARGUMENTS:
-*
-* RegBaseAddress contains the base address of the IPIF registers.
-*
-* Status contains the value to be written to the IP interrupt status
-* register. The bit definitions are specific to the device IP.
-*
-* RETURN VALUE:
-*
-* None.
-*
-* NOTES:
-*
-* None.
-*
-******************************************************************************/
-#define XIIF_V123B_WRITE_IISR(RegBaseAddress, Status) \
- XIo_Out32((RegBaseAddress) + XIIF_V123B_IISR_OFFSET, (Status))
-
-/******************************************************************************
-*
-* MACRO:
-*
-* XIIF_V123B_READ_IISR
-*
-* DESCRIPTION:
-*
-* This function gets the contents of the IP interrupt status register.
-* This register indicates the status of interrupt sources for the IP of the
-* device. The IP is defined as the part of the device that connects to the
-* IPIF. The status is independent of whether interrupts are enabled such
-* that the status register may also be polled when interrupts are not enabled.
-*
-* Each bit of the register correlates to a specific interrupt source within the
-* device. All bits of this register are latched. Writing a 1 to a bit within
-* this register causes an interrupt to be generated if enabled in the interrupt
-* enable register and the global interrupt enable is set. Since the status is
-* latched, each status bit must be acknowledged in order for the bit in the
-* status register to be updated. Each bit can be acknowledged by writing a
-* 0 to the bit in the status register.
-
-* ARGUMENTS:
-*
-* RegBaseAddress contains the base address of the IPIF registers.
-*
-* RETURN VALUE:
-*
-* A status which contains the value read from the IP interrupt status register.
-* The bit definitions are specific to the device IP.
-*
-* NOTES:
-*
-* None.
-*
-******************************************************************************/
-#define XIIF_V123B_READ_IISR(RegBaseAddress) \
- XIo_In32((RegBaseAddress) + XIIF_V123B_IISR_OFFSET)
-
-/******************************************************************************
-*
-* MACRO:
-*
-* XIIF_V123B_WRITE_IIER
-*
-* DESCRIPTION:
-*
-* This function sets the IP interrupt enable register contents. This register
-* controls which interrupt sources of the IP are allowed to generate an
-* interrupt. The global interrupt enable register and the device interrupt
-* enable register must also be set appropriately for an interrupt to be
-* passed out of the device containing the IPIF and the IP.
-*
-* Each bit of the register correlates to a specific interrupt source within the
-* IP. Setting a bit in this register enables the interrupt source to generate
-* an interrupt. Clearing a bit in this register disables interrupt generation
-* for that interrupt source.
-*
-* This function writes only the specified value to the register such that
-* some interrupt sources may be enabled and others disabled. It is the
-* caller's responsibility to get the value of the interrupt enable register
-* prior to setting the value to prevent an destructive behavior.
-*
-* ARGUMENTS:
-*
-* RegBaseAddress contains the base address of the IPIF registers.
-*
-* Enable contains the value to be written to the IP interrupt enable register.
-* The bit definitions are specific to the device IP.
-*
-* RETURN VALUE:
-*
-* None.
-*
-* NOTES:
-*
-* None.
-*
-******************************************************************************/
-#define XIIF_V123B_WRITE_IIER(RegBaseAddress, Enable) \
- XIo_Out32((RegBaseAddress) + XIIF_V123B_IIER_OFFSET, (Enable))
-
-/******************************************************************************
-*
-* MACRO:
-*
-* XIIF_V123B_READ_IIER
-*
-* DESCRIPTION:
-*
-*
-* This function gets the IP interrupt enable register contents. This register
-* controls which interrupt sources of the IP are allowed to generate an
-* interrupt. The global interrupt enable register and the device interrupt
-* enable register must also be set appropriately for an interrupt to be
-* passed out of the device containing the IPIF and the IP.
-*
-* Each bit of the register correlates to a specific interrupt source within the
-* IP. Setting a bit in this register enables the interrupt source to generate
-* an interrupt. Clearing a bit in this register disables interrupt generation
-* for that interrupt source.
-*
-* ARGUMENTS:
-*
-* RegBaseAddress contains the base address of the IPIF registers.
-*
-* RETURN VALUE:
-*
-* The contents read from the IP interrupt enable register. The bit definitions
-* are specific to the device IP.
-*
-* NOTES:
-*
-* Signature: u32 XIIF_V123B_READ_IIER(u32 RegBaseAddress)
-*
-******************************************************************************/
-#define XIIF_V123B_READ_IIER(RegBaseAddress) \
- XIo_In32((RegBaseAddress) + XIIF_V123B_IIER_OFFSET)
-
-/************************** Function Prototypes ******************************/
-
-/*
- * Initialization Functions
- */
-XStatus XIpIfV123b_SelfTest(u32 RegBaseAddress, u8 IpRegistersWidth);
-
-#endif /* end of protection macro */
diff --git a/board/xilinx/common/xpacket_fifo_v1_00_b.c b/board/xilinx/common/xpacket_fifo_v1_00_b.c
deleted file mode 100644
index ae2d6d43c5..0000000000
--- a/board/xilinx/common/xpacket_fifo_v1_00_b.c
+++ /dev/null
@@ -1,448 +0,0 @@
-/******************************************************************************
-*
-* Author: Xilinx, Inc.
-*
-*
-* This program is free software; you can redistribute it and/or modify it
-* under the terms of the GNU General Public License as published by the
-* Free Software Foundation; either version 2 of the License, or (at your
-* option) any later version.
-*
-*
-* XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A
-* COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS
-* ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD,
-* XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE
-* FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING
-* ANY THIRD PARTY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.
-* XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO
-* THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY
-* WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM
-* CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND
-* FITNESS FOR A PARTICULAR PURPOSE.
-*
-*
-* Xilinx hardware products are not intended for use in life support
-* appliances, devices, or systems. Use in such applications is
-* expressly prohibited.
-*
-*
-* (c) Copyright 2002-2004 Xilinx Inc.
-* All rights reserved.
-*
-*
-* You should have received a copy of the GNU General Public License along
-* with this program; if not, write to the Free Software Foundation, Inc.,
-* 675 Mass Ave, Cambridge, MA 02139, USA.
-*
-******************************************************************************/
-/*****************************************************************************/
-/*
-*
-* @file xpacket_fifo_v1_00_b.c
-*
-* Contains functions for the XPacketFifoV100b component. See xpacket_fifo_v1_00_b.h
-* for more information about the component.
-*
-* <pre>
-* MODIFICATION HISTORY:
-*
-* Ver Who Date Changes
-* ----- ---- -------- -----------------------------------------------
-* 1.00b rpm 03/26/02 First release
-* </pre>
-*
-*****************************************************************************/
-
-/***************************** Include Files *********************************/
-
-#include "xbasic_types.h"
-#include "xio.h"
-#include "xstatus.h"
-#include "xpacket_fifo_v1_00_b.h"
-
-/************************** Constant Definitions *****************************/
-
-/* width of a FIFO word */
-
-#define XPF_FIFO_WIDTH_BYTE_COUNT 4UL
-
-/**************************** Type Definitions *******************************/
-
-/***************** Macros (Inline Functions) Definitions *********************/
-
-/************************* Variable Definitions ******************************/
-
-/************************** Function Prototypes ******************************/
-
-/*****************************************************************************/
-/*
-*
-* This function initializes a packet FIFO. Initialization resets the
-* FIFO such that it's empty and ready to use.
-*
-* @param InstancePtr contains a pointer to the FIFO to operate on.
-* @param RegBaseAddress contains the base address of the registers for
-* the packet FIFO.
-* @param DataBaseAddress contains the base address of the data for
-* the packet FIFO.
-*
-* @return
-*
-* Always returns XST_SUCCESS.
-*
-* @note
-*
-* None.
-*
-******************************************************************************/
-XStatus
-XPacketFifoV100b_Initialize(XPacketFifoV100b * InstancePtr,
- u32 RegBaseAddress, u32 DataBaseAddress)
-{
- /* assert to verify input argument are valid */
-
- XASSERT_NONVOID(InstancePtr != NULL);
-
- /* initialize the component variables to the specified state */
-
- InstancePtr->RegBaseAddress = RegBaseAddress;
- InstancePtr->DataBaseAddress = DataBaseAddress;
- InstancePtr->IsReady = XCOMPONENT_IS_READY;
-
- /* reset the FIFO such that it's empty and ready to use and indicate the
- * initialization was successful, note that the is ready variable must be
- * set prior to calling the reset function to prevent an assert
- */
- XPF_V100B_RESET(InstancePtr);
-
- return XST_SUCCESS;
-}
-
-/*****************************************************************************/
-/*
-*
-* This function performs a self-test on the specified packet FIFO. The self
-* test resets the FIFO and reads a register to determine if it is the correct
-* reset value. This test is destructive in that any data in the FIFO will
-* be lost.
-*
-* @param InstancePtr is a pointer to the packet FIFO to be operated on.
-*
-* @param FifoType specifies the type of FIFO, read or write, for the self test.
-* The FIFO type is specified by the values XPF_READ_FIFO_TYPE or
-* XPF_WRITE_FIFO_TYPE.
-*
-* @return
-*
-* XST_SUCCESS is returned if the selftest is successful, or
-* XST_PFIFO_BAD_REG_VALUE indicating that the value readback from the
-* occupancy/vacancy count register after a reset does not match the
-* specified reset value.
-*
-* @note
-*
-* None.
-*
-******************************************************************************/
-XStatus
-XPacketFifoV100b_SelfTest(XPacketFifoV100b * InstancePtr, u32 FifoType)
-{
- u32 Register;
-
- /* assert to verify valid input arguments */
-
- XASSERT_NONVOID(InstancePtr != NULL);
- XASSERT_NONVOID((FifoType == XPF_READ_FIFO_TYPE) ||
- (FifoType == XPF_WRITE_FIFO_TYPE));
- XASSERT_NONVOID(InstancePtr->IsReady == XCOMPONENT_IS_READY);
-
- /* reset the fifo and then check to make sure the occupancy/vacancy
- * register contents are correct for a reset condition
- */
- XPF_V100B_RESET(InstancePtr);
-
- Register = XIo_In32(InstancePtr->RegBaseAddress +
- XPF_COUNT_STATUS_REG_OFFSET);
-
- /* check the value of the register to ensure that it's correct for the
- * specified FIFO type since both FIFO types reset to empty, but a bit
- * in the register changes definition based upon FIFO type
- */
-
- if (FifoType == XPF_READ_FIFO_TYPE) {
- /* check the regiser value for a read FIFO which should be empty */
-
- if (Register != XPF_EMPTY_FULL_MASK) {
- return XST_PFIFO_BAD_REG_VALUE;
- }
- } else {
- /* check the register value for a write FIFO which should not be full
- * on reset
- */
- if ((Register & XPF_EMPTY_FULL_MASK) != 0) {
- return XST_PFIFO_BAD_REG_VALUE;
- }
- }
-
- /* the test was successful */
-
- return XST_SUCCESS;
-}
-
-/*****************************************************************************/
-/*
-*
-* Read data from a FIFO and puts it into a specified buffer. The packet FIFO is
-* currently 32 bits wide such that an input buffer which is a series of bytes
-* is filled from the FIFO a word at a time. If the requested byte count is not
-* a multiple of 32 bit words, it is necessary for this function to format the
-* remaining 32 bit word from the FIFO into a series of bytes in the buffer.
-* There may be up to 3 extra bytes which must be extracted from the last word
-* of the FIFO and put into the buffer.
-*
-* @param InstancePtr contains a pointer to the FIFO to operate on.
-* @param BufferPtr points to the memory buffer to write the data into. This
-* buffer must be 32 bit aligned or an alignment exception could be
-* generated. Since this buffer is a byte buffer, the data is assumed to
-* be endian independent.
-* @param ByteCount contains the number of bytes to read from the FIFO. This
-* number of bytes must be present in the FIFO or an error will be
-* returned.
-*
-* @return
-*
-* XST_SUCCESS indicates the operation was successful. If the number of
-* bytes specified by the byte count is not present in the FIFO
-* XST_PFIFO_LACK_OF_DATA is returned.
-*
-* If the function was successful, the specified buffer is modified to contain
-* the bytes which were removed from the FIFO.
-*
-* @note
-*
-* Note that the exact number of bytes which are present in the FIFO is
-* not known by this function. It can only check for a number of 32 bit
-* words such that if the byte count specified is incorrect, but is still
-* possible based on the number of words in the FIFO, up to 3 garbage bytes
-* may be present at the end of the buffer.
-* <br><br>
-* This function assumes that if the device consuming data from the FIFO is
-* a byte device, the order of the bytes to be consumed is from the most
-* significant byte to the least significant byte of a 32 bit word removed
-* from the FIFO.
-*
-******************************************************************************/
-XStatus
-XPacketFifoV100b_Read(XPacketFifoV100b * InstancePtr,
- u8 * BufferPtr, u32 ByteCount)
-{
- u32 FifoCount;
- u32 WordCount;
- u32 ExtraByteCount;
- u32 *WordBuffer = (u32 *) BufferPtr;
-
- /* assert to verify valid input arguments including 32 bit alignment of
- * the buffer pointer
- */
- XASSERT_NONVOID(InstancePtr != NULL);
- XASSERT_NONVOID(BufferPtr != NULL);
- XASSERT_NONVOID(((u32) BufferPtr &
- (XPF_FIFO_WIDTH_BYTE_COUNT - 1)) == 0);
- XASSERT_NONVOID(ByteCount != 0);
- XASSERT_NONVOID(InstancePtr->IsReady == XCOMPONENT_IS_READY);
-
- /* get the count of how many 32 bit words are in the FIFO, if there aren't
- * enought words to satisfy the request, return an error
- */
-
- FifoCount = XIo_In32(InstancePtr->RegBaseAddress +
- XPF_COUNT_STATUS_REG_OFFSET) & XPF_COUNT_MASK;
-
- if ((FifoCount * XPF_FIFO_WIDTH_BYTE_COUNT) < ByteCount) {
- return XST_PFIFO_LACK_OF_DATA;
- }
-
- /* calculate the number of words to read from the FIFO before the word
- * containing the extra bytes, and calculate the number of extra bytes
- * the extra bytes are defined as those at the end of the buffer when
- * the buffer does not end on a 32 bit boundary
- */
- WordCount = ByteCount / XPF_FIFO_WIDTH_BYTE_COUNT;
- ExtraByteCount = ByteCount % XPF_FIFO_WIDTH_BYTE_COUNT;
-
- /* Read the 32 bit words from the FIFO for all the buffer except the
- * last word which contains the extra bytes, the following code assumes
- * that the buffer is 32 bit aligned, otherwise an alignment exception could
- * be generated
- */
- for (FifoCount = 0; FifoCount < WordCount; FifoCount++) {
- WordBuffer[FifoCount] = XIo_In32(InstancePtr->DataBaseAddress);
- }
-
- /* if there are extra bytes to handle, read the last word from the FIFO
- * and insert the extra bytes into the buffer
- */
- if (ExtraByteCount > 0) {
- u32 LastWord;
- u8 *ExtraBytesBuffer = (u8 *) (WordBuffer + WordCount);
-
- /* get the last word from the FIFO for the extra bytes */
-
- LastWord = XIo_In32(InstancePtr->DataBaseAddress);
-
- /* one extra byte in the last word, put the byte into the next location
- * of the buffer, bytes in a word of the FIFO are ordered from most
- * significant byte to least
- */
- if (ExtraByteCount == 1) {
- ExtraBytesBuffer[0] = (u8) (LastWord >> 24);
- }
-
- /* two extra bytes in the last word, put each byte into the next two
- * locations of the buffer
- */
- else if (ExtraByteCount == 2) {
- ExtraBytesBuffer[0] = (u8) (LastWord >> 24);
- ExtraBytesBuffer[1] = (u8) (LastWord >> 16);
- }
- /* three extra bytes in the last word, put each byte into the next three
- * locations of the buffer
- */
- else if (ExtraByteCount == 3) {
- ExtraBytesBuffer[0] = (u8) (LastWord >> 24);
- ExtraBytesBuffer[1] = (u8) (LastWord >> 16);
- ExtraBytesBuffer[2] = (u8) (LastWord >> 8);
- }
- }
- return XST_SUCCESS;
-}
-
-/*****************************************************************************/
-/*
-*
-* Write data into a packet FIFO. The packet FIFO is currently 32 bits wide
-* such that an input buffer which is a series of bytes must be written into the
-* FIFO a word at a time. If the buffer is not a multiple of 32 bit words, it is
-* necessary for this function to format the remaining bytes into a single 32
-* bit word to be inserted into the FIFO. This is necessary to avoid any
-* accesses past the end of the buffer.
-*
-* @param InstancePtr contains a pointer to the FIFO to operate on.
-* @param BufferPtr points to the memory buffer that data is to be read from
-* and written into the FIFO. Since this buffer is a byte buffer, the data
-* is assumed to be endian independent. This buffer must be 32 bit aligned
-* or an alignment exception could be generated.
-* @param ByteCount contains the number of bytes to read from the buffer and to
-* write to the FIFO.
-*
-* @return
-*
-* XST_SUCCESS is returned if the operation succeeded. If there is not enough
-* room in the FIFO to hold the specified bytes, XST_PFIFO_NO_ROOM is
-* returned.
-*
-* @note
-*
-* This function assumes that if the device inserting data into the FIFO is
-* a byte device, the order of the bytes in each 32 bit word is from the most
-* significant byte to the least significant byte.
-*
-******************************************************************************/
-XStatus
-XPacketFifoV100b_Write(XPacketFifoV100b * InstancePtr,
- u8 * BufferPtr, u32 ByteCount)
-{
- u32 FifoCount;
- u32 WordCount;
- u32 ExtraByteCount;
- u32 *WordBuffer = (u32 *) BufferPtr;
-
- /* assert to verify valid input arguments including 32 bit alignment of
- * the buffer pointer
- */
- XASSERT_NONVOID(InstancePtr != NULL);
- XASSERT_NONVOID(BufferPtr != NULL);
- XASSERT_NONVOID(((u32) BufferPtr &
- (XPF_FIFO_WIDTH_BYTE_COUNT - 1)) == 0);
- XASSERT_NONVOID(ByteCount != 0);
- XASSERT_NONVOID(InstancePtr->IsReady == XCOMPONENT_IS_READY);
-
- /* get the count of how many words may be inserted into the FIFO */
-
- FifoCount = XIo_In32(InstancePtr->RegBaseAddress +
- XPF_COUNT_STATUS_REG_OFFSET) & XPF_COUNT_MASK;
-
- /* Calculate the number of 32 bit words required to insert the specified
- * number of bytes in the FIFO and determine the number of extra bytes
- * if the buffer length is not a multiple of 32 bit words
- */
-
- WordCount = ByteCount / XPF_FIFO_WIDTH_BYTE_COUNT;
- ExtraByteCount = ByteCount % XPF_FIFO_WIDTH_BYTE_COUNT;
-
- /* take into account the extra bytes in the total word count */
-
- if (ExtraByteCount > 0) {
- WordCount++;
- }
-
- /* if there's not enough room in the FIFO to hold the specified
- * number of bytes, then indicate an error,
- */
- if (FifoCount < WordCount) {
- return XST_PFIFO_NO_ROOM;
- }
-
- /* readjust the word count to not take into account the extra bytes */
-
- if (ExtraByteCount > 0) {
- WordCount--;
- }
-
- /* Write all the bytes of the buffer which can be written as 32 bit
- * words into the FIFO, waiting to handle the extra bytes seperately
- */
- for (FifoCount = 0; FifoCount < WordCount; FifoCount++) {
- XIo_Out32(InstancePtr->DataBaseAddress, WordBuffer[FifoCount]);
- }
-
- /* if there are extra bytes to handle, extract them from the buffer
- * and create a 32 bit word and write it to the FIFO
- */
- if (ExtraByteCount > 0) {
- u32 LastWord = 0;
- u8 *ExtraBytesBuffer = (u8 *) (WordBuffer + WordCount);
-
- /* one extra byte in the buffer, put the byte into the last word
- * to be inserted into the FIFO, perform this processing inline rather
- * than in a loop to help performance
- */
- if (ExtraByteCount == 1) {
- LastWord = ExtraBytesBuffer[0] << 24;
- }
-
- /* two extra bytes in the buffer, put each byte into the last word
- * to be inserted into the FIFO
- */
- else if (ExtraByteCount == 2) {
- LastWord = ExtraBytesBuffer[0] << 24 |
- ExtraBytesBuffer[1] << 16;
- }
-
- /* three extra bytes in the buffer, put each byte into the last word
- * to be inserted into the FIFO
- */
- else if (ExtraByteCount == 3) {
- LastWord = ExtraBytesBuffer[0] << 24 |
- ExtraBytesBuffer[1] << 16 |
- ExtraBytesBuffer[2] << 8;
- }
-
- /* write the last 32 bit word to the FIFO and return with no errors */
-
- XIo_Out32(InstancePtr->DataBaseAddress, LastWord);
- }
-
- return XST_SUCCESS;
-}
diff --git a/board/xilinx/common/xpacket_fifo_v1_00_b.h b/board/xilinx/common/xpacket_fifo_v1_00_b.h
deleted file mode 100644
index 1cda0e8cc4..0000000000
--- a/board/xilinx/common/xpacket_fifo_v1_00_b.h
+++ /dev/null
@@ -1,306 +0,0 @@
-/******************************************************************************
-*
-* Author: Xilinx, Inc.
-*
-*
-* This program is free software; you can redistribute it and/or modify it
-* under the terms of the GNU General Public License as published by the
-* Free Software Foundation; either version 2 of the License, or (at your
-* option) any later version.
-*
-*
-* XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A
-* COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS
-* ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD,
-* XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE
-* FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING
-* ANY THIRD PARTY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.
-* XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO
-* THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY
-* WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM
-* CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND
-* FITNESS FOR A PARTICULAR PURPOSE.
-*
-*
-* Xilinx hardware products are not intended for use in life support
-* appliances, devices, or systems. Use in such applications is
-* expressly prohibited.
-*
-*
-* (c) Copyright 2002-2004 Xilinx Inc.
-* All rights reserved.
-*
-*
-* You should have received a copy of the GNU General Public License along
-* with this program; if not, write to the Free Software Foundation, Inc.,
-* 675 Mass Ave, Cambridge, MA 02139, USA.
-*
-******************************************************************************/
-/*****************************************************************************/
-/*
-*
-* @file xpacket_fifo_v1_00_b.h
-*
-* This component is a common component because it's primary purpose is to
-* prevent code duplication in drivers. A driver which must handle a packet
-* FIFO uses this component rather than directly manipulating a packet FIFO.
-*
-* A FIFO is a device which has dual port memory such that one user may be
-* inserting data into the FIFO while another is consuming data from the FIFO.
-* A packet FIFO is designed for use with packet protocols such as Ethernet and
-* ATM. It is typically only used with devices when DMA and/or Scatter Gather
-* is used. It differs from a nonpacket FIFO in that it does not provide any
-* interrupts for thresholds of the FIFO such that it is less useful without
-* DMA.
-*
-* @note
-*
-* This component has the capability to generate an interrupt when an error
-* condition occurs. It is the user's responsibility to provide the interrupt
-* processing to handle the interrupt. This component provides the ability to
-* determine if that interrupt is active, a deadlock condition, and the ability
-* to reset the FIFO to clear the condition. In this condition, the device which
-* is using the FIFO should also be reset to prevent other problems. This error
-* condition could occur as a normal part of operation if the size of the FIFO
-* is not setup correctly. See the hardware IP specification for more details.
-*
-* <pre>
-* MODIFICATION HISTORY:
-*
-* Ver Who Date Changes
-* ----- ---- -------- -----------------------------------------------
-* 1.00b rpm 03/26/02 First release
-* </pre>
-*
-*****************************************************************************/
-#ifndef XPACKET_FIFO_H /* prevent circular inclusions */
-#define XPACKET_FIFO_H /* by using protection macros */
-
-/***************************** Include Files *********************************/
-
-#include "xbasic_types.h"
-#include "xstatus.h"
-
-/************************** Constant Definitions *****************************/
-
-/*
- * These constants specify the FIFO type and are mutually exclusive
- */
-#define XPF_READ_FIFO_TYPE 0 /* a read FIFO */
-#define XPF_WRITE_FIFO_TYPE 1 /* a write FIFO */
-
-/*
- * These constants define the offsets to each of the registers from the
- * register base address, each of the constants are a number of bytes
- */
-#define XPF_RESET_REG_OFFSET 0UL
-#define XPF_MODULE_INFO_REG_OFFSET 0UL
-#define XPF_COUNT_STATUS_REG_OFFSET 4UL
-
-/*
- * This constant is used with the Reset Register
- */
-#define XPF_RESET_FIFO_MASK 0x0000000A
-
-/*
- * These constants are used with the Occupancy/Vacancy Count Register. This
- * register also contains FIFO status
- */
-#define XPF_COUNT_MASK 0x0000FFFF
-#define XPF_DEADLOCK_MASK 0x20000000
-#define XPF_ALMOST_EMPTY_FULL_MASK 0x40000000
-#define XPF_EMPTY_FULL_MASK 0x80000000
-
-/**************************** Type Definitions *******************************/
-
-/*
- * The XPacketFifo driver instance data. The driver is required to allocate a
- * variable of this type for every packet FIFO in the device.
- */
-typedef struct {
- u32 RegBaseAddress; /* Base address of registers */
- u32 IsReady; /* Device is initialized and ready */
- u32 DataBaseAddress; /* Base address of data for FIFOs */
-} XPacketFifoV100b;
-
-/***************** Macros (Inline Functions) Definitions *********************/
-
-/*****************************************************************************/
-/*
-*
-* Reset the specified packet FIFO. Resetting a FIFO will cause any data
-* contained in the FIFO to be lost.
-*
-* @param InstancePtr contains a pointer to the FIFO to operate on.
-*
-* @return
-*
-* None.
-*
-* @note
-*
-* Signature: void XPF_V100B_RESET(XPacketFifoV100b *InstancePtr)
-*
-******************************************************************************/
-#define XPF_V100B_RESET(InstancePtr) \
- XIo_Out32((InstancePtr)->RegBaseAddress + XPF_RESET_REG_OFFSET, XPF_RESET_FIFO_MASK);
-
-/*****************************************************************************/
-/*
-*
-* Get the occupancy count for a read packet FIFO and the vacancy count for a
-* write packet FIFO. These counts indicate the number of 32-bit words
-* contained (occupancy) in the FIFO or the number of 32-bit words available
-* to write (vacancy) in the FIFO.
-*
-* @param InstancePtr contains a pointer to the FIFO to operate on.
-*
-* @return
-*
-* The occupancy or vacancy count for the specified packet FIFO.
-*
-* @note
-*
-* Signature: u32 XPF_V100B_GET_COUNT(XPacketFifoV100b *InstancePtr)
-*
-******************************************************************************/
-#define XPF_V100B_GET_COUNT(InstancePtr) \
- (XIo_In32((InstancePtr)->RegBaseAddress + XPF_COUNT_STATUS_REG_OFFSET) & \
- XPF_COUNT_MASK)
-
-/*****************************************************************************/
-/*
-*
-* Determine if the specified packet FIFO is almost empty. Almost empty is
-* defined for a read FIFO when there is only one data word in the FIFO.
-*
-* @param InstancePtr contains a pointer to the FIFO to operate on.
-*
-* @return
-*
-* TRUE if the packet FIFO is almost empty, FALSE otherwise.
-*
-* @note
-*
-* Signature: u32 XPF_V100B_IS_ALMOST_EMPTY(XPacketFifoV100b *InstancePtr)
-*
-******************************************************************************/
-#define XPF_V100B_IS_ALMOST_EMPTY(InstancePtr) \
- (XIo_In32((InstancePtr)->RegBaseAddress + XPF_COUNT_STATUS_REG_OFFSET) & \
- XPF_ALMOST_EMPTY_FULL_MASK)
-
-/*****************************************************************************/
-/*
-*
-* Determine if the specified packet FIFO is almost full. Almost full is
-* defined for a write FIFO when there is only one available data word in the
-* FIFO.
-*
-* @param InstancePtr contains a pointer to the FIFO to operate on.
-*
-* @return
-*
-* TRUE if the packet FIFO is almost full, FALSE otherwise.
-*
-* @note
-*
-* Signature: u32 XPF_V100B_IS_ALMOST_FULL(XPacketFifoV100b *InstancePtr)
-*
-******************************************************************************/
-#define XPF_V100B_IS_ALMOST_FULL(InstancePtr) \
- (XIo_In32((InstancePtr)->RegBaseAddress + XPF_COUNT_STATUS_REG_OFFSET) & \
- XPF_ALMOST_EMPTY_FULL_MASK)
-
-/*****************************************************************************/
-/*
-*
-* Determine if the specified packet FIFO is empty. This applies only to a
-* read FIFO.
-*
-* @param InstancePtr contains a pointer to the FIFO to operate on.
-*
-* @return
-*
-* TRUE if the packet FIFO is empty, FALSE otherwise.
-*
-* @note
-*
-* Signature: u32 XPF_V100B_IS_EMPTY(XPacketFifoV100b *InstancePtr)
-*
-******************************************************************************/
-#define XPF_V100B_IS_EMPTY(InstancePtr) \
- (XIo_In32((InstancePtr)->RegBaseAddress + XPF_COUNT_STATUS_REG_OFFSET) & \
- XPF_EMPTY_FULL_MASK)
-
-/*****************************************************************************/
-/*
-*
-* Determine if the specified packet FIFO is full. This applies only to a
-* write FIFO.
-*
-* @param InstancePtr contains a pointer to the FIFO to operate on.
-*
-* @return
-*
-* TRUE if the packet FIFO is full, FALSE otherwise.
-*
-* @note
-*
-* Signature: u32 XPF_V100B_IS_FULL(XPacketFifoV100b *InstancePtr)
-*
-******************************************************************************/
-#define XPF_V100B_IS_FULL(InstancePtr) \
- (XIo_In32((InstancePtr)->RegBaseAddress + XPF_COUNT_STATUS_REG_OFFSET) & \
- XPF_EMPTY_FULL_MASK)
-
-/*****************************************************************************/
-/*
-*
-* Determine if the specified packet FIFO is deadlocked. This condition occurs
-* when the FIFO is full and empty at the same time and is caused by a packet
-* being written to the FIFO which exceeds the total data capacity of the FIFO.
-* It occurs because of the mark/restore features of the packet FIFO which allow
-* retransmission of a packet. The software should reset the FIFO and any devices
-* using the FIFO when this condition occurs.
-*
-* @param InstancePtr contains a pointer to the FIFO to operate on.
-*
-* @return
-*
-* TRUE if the packet FIFO is deadlocked, FALSE otherwise.
-*
-* @note
-*
-* This component has the capability to generate an interrupt when an error
-* condition occurs. It is the user's responsibility to provide the interrupt
-* processing to handle the interrupt. This function provides the ability to
-* determine if a deadlock condition, and the ability to reset the FIFO to
-* clear the condition.
-*
-* In this condition, the device which is using the FIFO should also be reset
-* to prevent other problems. This error condition could occur as a normal part
-* of operation if the size of the FIFO is not setup correctly.
-*
-* Signature: u32 XPF_V100B_IS_DEADLOCKED(XPacketFifoV100b *InstancePtr)
-*
-******************************************************************************/
-#define XPF_V100B_IS_DEADLOCKED(InstancePtr) \
- (XIo_In32((InstancePtr)->RegBaseAddress + XPF_COUNT_STATUS_REG_OFFSET) & \
- XPF_DEADLOCK_MASK)
-
-/************************** Function Prototypes ******************************/
-
-/* Standard functions */
-
-XStatus XPacketFifoV100b_Initialize(XPacketFifoV100b * InstancePtr,
- u32 RegBaseAddress, u32 DataBaseAddress);
-XStatus XPacketFifoV100b_SelfTest(XPacketFifoV100b * InstancePtr, u32 FifoType);
-
-/* Data functions */
-
-XStatus XPacketFifoV100b_Read(XPacketFifoV100b * InstancePtr,
- u8 * ReadBufferPtr, u32 ByteCount);
-XStatus XPacketFifoV100b_Write(XPacketFifoV100b * InstancePtr,
- u8 * WriteBufferPtr, u32 ByteCount);
-
-#endif /* end of protection macro */
diff --git a/board/xilinx/common/xstatus.h b/board/xilinx/common/xstatus.h
deleted file mode 100644
index ffda4d7d4d..0000000000
--- a/board/xilinx/common/xstatus.h
+++ /dev/null
@@ -1,347 +0,0 @@
-/******************************************************************************
-*
-* Author: Xilinx, Inc.
-*
-*
-* This program is free software; you can redistribute it and/or modify it
-* under the terms of the GNU General Public License as published by the
-* Free Software Foundation; either version 2 of the License, or (at your
-* option) any later version.
-*
-*
-* XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A
-* COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS
-* ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD,
-* XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE
-* FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING
-* ANY THIRD PARTY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.
-* XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO
-* THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY
-* WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM
-* CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND
-* FITNESS FOR A PARTICULAR PURPOSE.
-*
-*
-* Xilinx hardware products are not intended for use in life support
-* appliances, devices, or systems. Use in such applications is
-* expressly prohibited.
-*
-*
-* (c) Copyright 2002-2004 Xilinx Inc.
-* All rights reserved.
-*
-*
-* You should have received a copy of the GNU General Public License along
-* with this program; if not, write to the Free Software Foundation, Inc.,
-* 675 Mass Ave, Cambridge, MA 02139, USA.
-*
-******************************************************************************/
-/*****************************************************************************/
-/**
-*
-* @file xstatus.h
-*
-* This file contains Xilinx software status codes. Status codes have their
-* own data type called XStatus. These codes are used throughout the Xilinx
-* device drivers.
-*
-******************************************************************************/
-
-#ifndef XSTATUS_H /* prevent circular inclusions */
-#define XSTATUS_H /* by using protection macros */
-
-/***************************** Include Files *********************************/
-
-#include "xbasic_types.h"
-
-/************************** Constant Definitions *****************************/
-
-/*********************** Common statuses 0 - 500 *****************************/
-
-#define XST_SUCCESS 0L
-#define XST_FAILURE 1L
-#define XST_DEVICE_NOT_FOUND 2L
-#define XST_DEVICE_BLOCK_NOT_FOUND 3L
-#define XST_INVALID_VERSION 4L
-#define XST_DEVICE_IS_STARTED 5L
-#define XST_DEVICE_IS_STOPPED 6L
-#define XST_FIFO_ERROR 7L /* an error occurred during an
- operation with a FIFO such as
- an underrun or overrun, this
- error requires the device to
- be reset */
-#define XST_RESET_ERROR 8L /* an error occurred which requires
- the device to be reset */
-#define XST_DMA_ERROR 9L /* a DMA error occurred, this error
- typically requires the device
- using the DMA to be reset */
-#define XST_NOT_POLLED 10L /* the device is not configured for
- polled mode operation */
-#define XST_FIFO_NO_ROOM 11L /* a FIFO did not have room to put
- the specified data into */
-#define XST_BUFFER_TOO_SMALL 12L /* the buffer is not large enough
- to hold the expected data */
-#define XST_NO_DATA 13L /* there was no data available */
-#define XST_REGISTER_ERROR 14L /* a register did not contain the
- expected value */
-#define XST_INVALID_PARAM 15L /* an invalid parameter was passed
- into the function */
-#define XST_NOT_SGDMA 16L /* the device is not configured for
- scatter-gather DMA operation */
-#define XST_LOOPBACK_ERROR 17L /* a loopback test failed */
-#define XST_NO_CALLBACK 18L /* a callback has not yet been
- * registered */
-#define XST_NO_FEATURE 19L /* device is not configured with
- * the requested feature */
-#define XST_NOT_INTERRUPT 20L /* device is not configured for
- * interrupt mode operation */
-#define XST_DEVICE_BUSY 21L /* device is busy */
-#define XST_ERROR_COUNT_MAX 22L /* the error counters of a device
- * have maxed out */
-#define XST_IS_STARTED 23L /* used when part of device is
- * already started i.e.
- * sub channel */
-#define XST_IS_STOPPED 24L /* used when part of device is
- * already stopped i.e.
- * sub channel */
-
-/***************** Utility Component statuses 401 - 500 *********************/
-
-#define XST_MEMTEST_FAILED 401L /* memory test failed */
-
-/***************** Common Components statuses 501 - 1000 *********************/
-
-/********************* Packet Fifo statuses 501 - 510 ************************/
-
-#define XST_PFIFO_LACK_OF_DATA 501L /* not enough data in FIFO */
-#define XST_PFIFO_NO_ROOM 502L /* not enough room in FIFO */
-#define XST_PFIFO_BAD_REG_VALUE 503L /* self test, a register value
- was invalid after reset */
-
-/************************** DMA statuses 511 - 530 ***************************/
-
-#define XST_DMA_TRANSFER_ERROR 511L /* self test, DMA transfer
- failed */
-#define XST_DMA_RESET_REGISTER_ERROR 512L /* self test, a register value
- was invalid after reset */
-#define XST_DMA_SG_LIST_EMPTY 513L /* scatter gather list contains
- no buffer descriptors ready
- to be processed */
-#define XST_DMA_SG_IS_STARTED 514L /* scatter gather not stopped */
-#define XST_DMA_SG_IS_STOPPED 515L /* scatter gather not running */
-#define XST_DMA_SG_LIST_FULL 517L /* all the buffer desciptors of
- the scatter gather list are
- being used */
-#define XST_DMA_SG_BD_LOCKED 518L /* the scatter gather buffer
- descriptor which is to be
- copied over in the scatter
- list is locked */
-#define XST_DMA_SG_NOTHING_TO_COMMIT 519L /* no buffer descriptors have been
- put into the scatter gather
- list to be commited */
-#define XST_DMA_SG_COUNT_EXCEEDED 521L /* the packet count threshold
- specified was larger than the
- total # of buffer descriptors
- in the scatter gather list */
-#define XST_DMA_SG_LIST_EXISTS 522L /* the scatter gather list has
- already been created */
-#define XST_DMA_SG_NO_LIST 523L /* no scatter gather list has
- been created */
-#define XST_DMA_SG_BD_NOT_COMMITTED 524L /* the buffer descriptor which was
- being started was not committed
- to the list */
-#define XST_DMA_SG_NO_DATA 525L /* the buffer descriptor to start
- has already been used by the
- hardware so it can't be reused
- */
-
-/************************** IPIF statuses 531 - 550 ***************************/
-
-#define XST_IPIF_REG_WIDTH_ERROR 531L /* an invalid register width
- was passed into the function */
-#define XST_IPIF_RESET_REGISTER_ERROR 532L /* the value of a register at
- reset was not valid */
-#define XST_IPIF_DEVICE_STATUS_ERROR 533L /* a write to the device interrupt
- status register did not read
- back correctly */
-#define XST_IPIF_DEVICE_ACK_ERROR 534L /* the device interrupt status
- register did not reset when
- acked */
-#define XST_IPIF_DEVICE_ENABLE_ERROR 535L /* the device interrupt enable
- register was not updated when
- other registers changed */
-#define XST_IPIF_IP_STATUS_ERROR 536L /* a write to the IP interrupt
- status register did not read
- back correctly */
-#define XST_IPIF_IP_ACK_ERROR 537L /* the IP interrupt status register
- did not reset when acked */
-#define XST_IPIF_IP_ENABLE_ERROR 538L /* IP interrupt enable register was
- not updated correctly when other
- registers changed */
-#define XST_IPIF_DEVICE_PENDING_ERROR 539L /* The device interrupt pending
- register did not indicate the
- expected value */
-#define XST_IPIF_DEVICE_ID_ERROR 540L /* The device interrupt ID register
- did not indicate the expected
- value */
-
-/****************** Device specific statuses 1001 - 4095 *********************/
-
-/********************* Ethernet statuses 1001 - 1050 *************************/
-
-#define XST_EMAC_MEMORY_SIZE_ERROR 1001L /* Memory space is not big enough
- * to hold the minimum number of
- * buffers or descriptors */
-#define XST_EMAC_MEMORY_ALLOC_ERROR 1002L /* Memory allocation failed */
-#define XST_EMAC_MII_READ_ERROR 1003L /* MII read error */
-#define XST_EMAC_MII_BUSY 1004L /* An MII operation is in progress */
-#define XST_EMAC_OUT_OF_BUFFERS 1005L /* Adapter is out of buffers */
-#define XST_EMAC_PARSE_ERROR 1006L /* Invalid adapter init string */
-#define XST_EMAC_COLLISION_ERROR 1007L /* Excess deferral or late
- * collision on polled send */
-
-/*********************** UART statuses 1051 - 1075 ***************************/
-#define XST_UART
-
-#define XST_UART_INIT_ERROR 1051L
-#define XST_UART_START_ERROR 1052L
-#define XST_UART_CONFIG_ERROR 1053L
-#define XST_UART_TEST_FAIL 1054L
-#define XST_UART_BAUD_ERROR 1055L
-#define XST_UART_BAUD_RANGE 1056L
-
-/************************ IIC statuses 1076 - 1100 ***************************/
-
-#define XST_IIC_SELFTEST_FAILED 1076 /* self test failed */
-#define XST_IIC_BUS_BUSY 1077 /* bus found busy */
-#define XST_IIC_GENERAL_CALL_ADDRESS 1078 /* mastersend attempted with */
- /* general call address */
-#define XST_IIC_STAND_REG_RESET_ERROR 1079 /* A non parameterizable reg */
- /* value after reset not valid */
-#define XST_IIC_TX_FIFO_REG_RESET_ERROR 1080 /* Tx fifo included in design */
- /* value after reset not valid */
-#define XST_IIC_RX_FIFO_REG_RESET_ERROR 1081 /* Rx fifo included in design */
- /* value after reset not valid */
-#define XST_IIC_TBA_REG_RESET_ERROR 1082 /* 10 bit addr incl in design */
- /* value after reset not valid */
-#define XST_IIC_CR_READBACK_ERROR 1083 /* Read of the control register */
- /* didn't return value written */
-#define XST_IIC_DTR_READBACK_ERROR 1084 /* Read of the data Tx reg */
- /* didn't return value written */
-#define XST_IIC_DRR_READBACK_ERROR 1085 /* Read of the data Receive reg */
- /* didn't return value written */
-#define XST_IIC_ADR_READBACK_ERROR 1086 /* Read of the data Tx reg */
- /* didn't return value written */
-#define XST_IIC_TBA_READBACK_ERROR 1087 /* Read of the 10 bit addr reg */
- /* didn't return written value */
-#define XST_IIC_NOT_SLAVE 1088 /* The device isn't a slave */
-
-/*********************** ATMC statuses 1101 - 1125 ***************************/
-
-#define XST_ATMC_ERROR_COUNT_MAX 1101L /* the error counters in the ATM
- controller hit the max value
- which requires the statistics
- to be cleared */
-
-/*********************** Flash statuses 1126 - 1150 **************************/
-
-#define XST_FLASH_BUSY 1126L /* Flash is erasing or programming */
-#define XST_FLASH_READY 1127L /* Flash is ready for commands */
-#define XST_FLASH_ERROR 1128L /* Flash had detected an internal
- error. Use XFlash_DeviceControl
- to retrieve device specific codes */
-#define XST_FLASH_ERASE_SUSPENDED 1129L /* Flash is in suspended erase state */
-#define XST_FLASH_WRITE_SUSPENDED 1130L /* Flash is in suspended write state */
-#define XST_FLASH_PART_NOT_SUPPORTED 1131L /* Flash type not supported by
- driver */
-#define XST_FLASH_NOT_SUPPORTED 1132L /* Operation not supported */
-#define XST_FLASH_TOO_MANY_REGIONS 1133L /* Too many erase regions */
-#define XST_FLASH_TIMEOUT_ERROR 1134L /* Programming or erase operation
- aborted due to a timeout */
-#define XST_FLASH_ADDRESS_ERROR 1135L /* Accessed flash outside its
- addressible range */
-#define XST_FLASH_ALIGNMENT_ERROR 1136L /* Write alignment error */
-#define XST_FLASH_BLOCKING_CALL_ERROR 1137L /* Couldn't return immediately from
- write/erase function with
- XFL_NON_BLOCKING_WRITE/ERASE
- option cleared */
-#define XST_FLASH_CFI_QUERY_ERROR 1138L /* Failed to query the device */
-
-/*********************** SPI statuses 1151 - 1175 ****************************/
-
-#define XST_SPI_MODE_FAULT 1151 /* master was selected as slave */
-#define XST_SPI_TRANSFER_DONE 1152 /* data transfer is complete */
-#define XST_SPI_TRANSMIT_UNDERRUN 1153 /* slave underruns transmit register */
-#define XST_SPI_RECEIVE_OVERRUN 1154 /* device overruns receive register */
-#define XST_SPI_NO_SLAVE 1155 /* no slave has been selected yet */
-#define XST_SPI_TOO_MANY_SLAVES 1156 /* more than one slave is being
- * selected */
-#define XST_SPI_NOT_MASTER 1157 /* operation is valid only as master */
-#define XST_SPI_SLAVE_ONLY 1158 /* device is configured as slave-only */
-#define XST_SPI_SLAVE_MODE_FAULT 1159 /* slave was selected while disabled */
-
-/********************** OPB Arbiter statuses 1176 - 1200 *********************/
-
-#define XST_OPBARB_INVALID_PRIORITY 1176 /* the priority registers have either
- * one master assigned to two or more
- * priorities, or one master not
- * assigned to any priority
- */
-#define XST_OPBARB_NOT_SUSPENDED 1177 /* an attempt was made to modify the
- * priority levels without first
- * suspending the use of priority
- * levels
- */
-#define XST_OPBARB_PARK_NOT_ENABLED 1178 /* bus parking by id was enabled but
- * bus parking was not enabled
- */
-#define XST_OPBARB_NOT_FIXED_PRIORITY 1179 /* the arbiter must be in fixed
- * priority mode to allow the
- * priorities to be changed
- */
-
-/************************ Intc statuses 1201 - 1225 **************************/
-
-#define XST_INTC_FAIL_SELFTEST 1201 /* self test failed */
-#define XST_INTC_CONNECT_ERROR 1202 /* interrupt already in use */
-
-/********************** TmrCtr statuses 1226 - 1250 **************************/
-
-#define XST_TMRCTR_TIMER_FAILED 1226 /* self test failed */
-
-/********************** WdtTb statuses 1251 - 1275 ***************************/
-
-#define XST_WDTTB_TIMER_FAILED 1251L
-
-/********************** PlbArb statuses 1276 - 1300 **************************/
-
-#define XST_PLBARB_FAIL_SELFTEST 1276L
-
-/********************** Plb2Opb statuses 1301 - 1325 *************************/
-
-#define XST_PLB2OPB_FAIL_SELFTEST 1301L
-
-/********************** Opb2Plb statuses 1326 - 1350 *************************/
-
-#define XST_OPB2PLB_FAIL_SELFTEST 1326L
-
-/********************** SysAce statuses 1351 - 1360 **************************/
-
-#define XST_SYSACE_NO_LOCK 1351L /* No MPU lock has been granted */
-
-/********************** PCI Bridge statuses 1361 - 1375 **********************/
-
-#define XST_PCI_INVALID_ADDRESS 1361L
-
-/**************************** Type Definitions *******************************/
-
-/**
- * The status typedef.
- */
-typedef u32 XStatus;
-
-/***************** Macros (Inline Functions) Definitions *********************/
-
-/************************** Function Prototypes ******************************/
-
-#endif /* end of protection macro */
diff --git a/board/xilinx/common/xversion.c b/board/xilinx/common/xversion.c
deleted file mode 100644
index c8a6915858..0000000000
--- a/board/xilinx/common/xversion.c
+++ /dev/null
@@ -1,350 +0,0 @@
-/******************************************************************************
-*
-* Author: Xilinx, Inc.
-*
-*
-* This program is free software; you can redistribute it and/or modify it
-* under the terms of the GNU General Public License as published by the
-* Free Software Foundation; either version 2 of the License, or (at your
-* option) any later version.
-*
-*
-* XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A
-* COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS
-* ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD,
-* XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE
-* FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING
-* ANY THIRD PARTY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.
-* XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO
-* THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY
-* WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM
-* CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND
-* FITNESS FOR A PARTICULAR PURPOSE.
-*
-*
-* Xilinx hardware products are not intended for use in life support
-* appliances, devices, or systems. Use in such applications is
-* expressly prohibited.
-*
-*
-* (c) Copyright 2002-2004 Xilinx Inc.
-* All rights reserved.
-*
-*
-* You should have received a copy of the GNU General Public License along
-* with this program; if not, write to the Free Software Foundation, Inc.,
-* 675 Mass Ave, Cambridge, MA 02139, USA.
-*
-******************************************************************************/
-/*****************************************************************************
-*
-* This file contains the implementation of the XVersion component. This
-* component represents a version ID. It is encapsulated within a component
-* so that it's type and implementation can change without affecting users of
-* it.
-*
-* The version is formatted as X.YYZ where X = 0 - 9, Y = 00 - 99, Z = a - z
-* X is the major revision, YY is the minor revision, and Z is the
-* compatability revision.
-*
-* Packed versions are also utilized for the configuration ROM such that
-* memory is minimized. A packed version consumes only 16 bits and is
-* formatted as follows.
-*
-* <pre>
-* Revision Range Bit Positions
-*
-* Major Revision 0 - 9 Bits 15 - 12
-* Minor Revision 0 - 99 Bits 11 - 5
-* Compatability Revision a - z Bits 4 - 0
-</pre>
-*
-******************************************************************************/
-
-/***************************** Include Files *********************************/
-
-#include "xbasic_types.h"
-#include "xversion.h"
-
-/************************** Constant Definitions *****************************/
-
-/* the following constants define the masks and shift values to allow the
- * revisions to be packed and unpacked, a packed version is packed into a 16
- * bit value in the following format, XXXXYYYYYYYZZZZZ, where XXXX is the
- * major revision, YYYYYYY is the minor revision, and ZZZZZ is the compatability
- * revision
- */
-#define XVE_MAJOR_SHIFT_VALUE 12
-#define XVE_MINOR_ONLY_MASK 0x0FE0
-#define XVE_MINOR_SHIFT_VALUE 5
-#define XVE_COMP_ONLY_MASK 0x001F
-
-/* the following constants define the specific characters of a version string
- * for each character of the revision, a version string is in the following
- * format, "X.YYZ" where X is the major revision (0 - 9), YY is the minor
- * revision (00 - 99), and Z is the compatability revision (a - z)
- */
-#define XVE_MAJOR_CHAR 0 /* major revision 0 - 9 */
-#define XVE_MINOR_TENS_CHAR 2 /* minor revision tens 0 - 9 */
-#define XVE_MINOR_ONES_CHAR 3 /* minor revision ones 0 - 9 */
-#define XVE_COMP_CHAR 4 /* compatability revision a - z */
-#define XVE_END_STRING_CHAR 5
-
-/**************************** Type Definitions *******************************/
-
-/***************** Macros (Inline Functions) Definitions *********************/
-
-/************************** Function Prototypes ******************************/
-
-static u32 IsVersionStringValid(s8 * StringPtr);
-
-/*****************************************************************************
-*
-* Unpacks a packed version into the specified version. Versions are packed
-* into the configuration ROM to reduce the amount storage. A packed version
-* is a binary format as oppossed to a non-packed version which is implemented
-* as a string.
-*
-* @param InstancePtr points to the version to unpack the packed version into.
-* @param PackedVersion contains the packed version to unpack.
-*
-* @return
-*
-* None.
-*
-* @note
-*
-* None.
-*
-******************************************************************************/
-void
-XVersion_UnPack(XVersion * InstancePtr, u16 PackedVersion)
-{
- /* not implemented yet since CROM related */
-}
-
-/*****************************************************************************
-*
-* Packs a version into the specified packed version. Versions are packed into
-* the configuration ROM to reduce the amount storage.
-*
-* @param InstancePtr points to the version to pack.
-* @param PackedVersionPtr points to the packed version which will receive
-* the new packed version.
-*
-* @return
-*
-* A status, XST_SUCCESS, indicating the packing was accomplished
-* successfully, or an error, XST_INVALID_VERSION, indicating the specified
-* input version was not valid such that the pack did not occur
-* <br><br>
-* The packed version pointed to by PackedVersionPtr is modified with the new
-* packed version if the status indicates success.
-*
-* @note
-*
-* None.
-*
-******************************************************************************/
-XStatus
-XVersion_Pack(XVersion * InstancePtr, u16 * PackedVersionPtr)
-{
- /* not implemented yet since CROM related */
-
- return XST_SUCCESS;
-}
-
-/*****************************************************************************
-*
-* Determines if two versions are equal.
-*
-* @param InstancePtr points to the first version to be compared.
-* @param VersionPtr points to a second version to be compared.
-*
-* @return
-*
-* TRUE if the versions are equal, FALSE otherwise.
-*
-* @note
-*
-* None.
-*
-******************************************************************************/
-u32
-XVersion_IsEqual(XVersion * InstancePtr, XVersion * VersionPtr)
-{
- u8 *Version1 = (u8 *) InstancePtr;
- u8 *Version2 = (u8 *) VersionPtr;
- int Index;
-
- /* assert to verify input arguments */
-
- XASSERT_NONVOID(InstancePtr != NULL);
- XASSERT_NONVOID(VersionPtr != NULL);
-
- /* check each byte of the versions to see if they are the same,
- * return at any point a byte differs between them
- */
- for (Index = 0; Index < sizeof (XVersion); Index++) {
- if (Version1[Index] != Version2[Index]) {
- return FALSE;
- }
- }
-
- /* No byte was found to be different between the versions, so indicate
- * the versions are equal
- */
- return TRUE;
-}
-
-/*****************************************************************************
-*
-* Converts a version to a null terminated string.
-*
-* @param InstancePtr points to the version to convert.
-* @param StringPtr points to the string which will be the result of the
-* conversion. This does not need to point to a null terminated
-* string as an input, but must point to storage which is an adequate
-* amount to hold the result string.
-*
-* @return
-*
-* The null terminated string is inserted at the location pointed to by
-* StringPtr if the status indicates success.
-*
-* @note
-*
-* It is necessary for the caller to have already allocated the storage to
-* contain the string. The amount of memory necessary for the string is
-* specified in the version header file.
-*
-******************************************************************************/
-void
-XVersion_ToString(XVersion * InstancePtr, s8 * StringPtr)
-{
- /* assert to verify input arguments */
-
- XASSERT_VOID(InstancePtr != NULL);
- XASSERT_VOID(StringPtr != NULL);
-
- /* since version is implemented as a string, just copy the specified
- * input into the specified output
- */
- XVersion_Copy(InstancePtr, (XVersion *) StringPtr);
-}
-
-/*****************************************************************************
-*
-* Initializes a version from a null terminated string. Since the string may not
-* be a format which is compatible with the version, an error could occur.
-*
-* @param InstancePtr points to the version which is to be initialized.
-* @param StringPtr points to a null terminated string which will be
-* converted to a version. The format of the string must match the
-* version string format which is X.YYX where X = 0 - 9, YY = 00 - 99,
-* Z = a - z.
-*
-* @return
-*
-* A status, XST_SUCCESS, indicating the conversion was accomplished
-* successfully, or XST_INVALID_VERSION indicating the version string format
-* was not valid.
-*
-* @note
-*
-* None.
-*
-******************************************************************************/
-XStatus
-XVersion_FromString(XVersion * InstancePtr, s8 * StringPtr)
-{
- /* assert to verify input arguments */
-
- XASSERT_NONVOID(InstancePtr != NULL);
- XASSERT_NONVOID(StringPtr != NULL);
-
- /* if the version string specified is not valid, return an error */
-
- if (!IsVersionStringValid(StringPtr)) {
- return XST_INVALID_VERSION;
- }
-
- /* copy the specified string into the specified version and indicate the
- * conversion was successful
- */
- XVersion_Copy((XVersion *) StringPtr, InstancePtr);
-
- return XST_SUCCESS;
-}
-
-/*****************************************************************************
-*
-* Copies the contents of a version to another version.
-*
-* @param InstancePtr points to the version which is the source of data for
-* the copy operation.
-* @param VersionPtr points to another version which is the destination of
-* the copy operation.
-*
-* @return
-*
-* None.
-*
-* @note
-*
-* None.
-*
-******************************************************************************/
-void
-XVersion_Copy(XVersion * InstancePtr, XVersion * VersionPtr)
-{
- u8 *Source = (u8 *) InstancePtr;
- u8 *Destination = (u8 *) VersionPtr;
- int Index;
-
- /* assert to verify input arguments */
-
- XASSERT_VOID(InstancePtr != NULL);
- XASSERT_VOID(VersionPtr != NULL);
-
- /* copy each byte of the source version to the destination version */
-
- for (Index = 0; Index < sizeof (XVersion); Index++) {
- Destination[Index] = Source[Index];
- }
-}
-
-/*****************************************************************************
-*
-* Determines if the specified version is valid.
-*
-* @param StringPtr points to the string to be validated.
-*
-* @return
-*
-* TRUE if the version string is a valid format, FALSE otherwise.
-*
-* @note
-*
-* None.
-*
-******************************************************************************/
-static u32
-IsVersionStringValid(s8 * StringPtr)
-{
- /* if the input string is not a valid format, "X.YYZ" where X = 0 - 9,
- * YY = 00 - 99, and Z = a - z, then indicate it's not valid
- */
- if ((StringPtr[XVE_MAJOR_CHAR] < '0') ||
- (StringPtr[XVE_MAJOR_CHAR] > '9') ||
- (StringPtr[XVE_MINOR_TENS_CHAR] < '0') ||
- (StringPtr[XVE_MINOR_TENS_CHAR] > '9') ||
- (StringPtr[XVE_MINOR_ONES_CHAR] < '0') ||
- (StringPtr[XVE_MINOR_ONES_CHAR] > '9') ||
- (StringPtr[XVE_COMP_CHAR] < 'a') ||
- (StringPtr[XVE_COMP_CHAR] > 'z')) {
- return FALSE;
- }
-
- return TRUE;
-}
diff --git a/board/xilinx/common/xversion.h b/board/xilinx/common/xversion.h
deleted file mode 100644
index 17f9da7a02..0000000000
--- a/board/xilinx/common/xversion.h
+++ /dev/null
@@ -1,97 +0,0 @@
-/******************************************************************************
-*
-* Author: Xilinx, Inc.
-*
-*
-* This program is free software; you can redistribute it and/or modify it
-* under the terms of the GNU General Public License as published by the
-* Free Software Foundation; either version 2 of the License, or (at your
-* option) any later version.
-*
-*
-* XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A
-* COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS
-* ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD,
-* XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE
-* FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING
-* ANY THIRD PARTY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.
-* XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO
-* THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY
-* WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM
-* CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND
-* FITNESS FOR A PARTICULAR PURPOSE.
-*
-*
-* Xilinx hardware products are not intended for use in life support
-* appliances, devices, or systems. Use in such applications is
-* expressly prohibited.
-*
-*
-* (c) Copyright 2002-2004 Xilinx Inc.
-* All rights reserved.
-*
-*
-* You should have received a copy of the GNU General Public License along
-* with this program; if not, write to the Free Software Foundation, Inc.,
-* 675 Mass Ave, Cambridge, MA 02139, USA.
-*
-******************************************************************************/
-/*****************************************************************************
-*
-* This file contains the interface for the XVersion component. This
-* component represents a version ID. It is encapsulated within a component
-* so that it's type and implementation can change without affecting users of
-* it.
-*
-* The version is formatted as X.YYZ where X = 0 - 9, Y = 00 - 99, Z = a - z
-* X is the major revision, YY is the minor revision, and Z is the
-* compatability revision.
-*
-* Packed versions are also utilized for the configuration ROM such that
-* memory is minimized. A packed version consumes only 16 bits and is
-* formatted as follows.
-*
-* <pre>
-* Revision Range Bit Positions
-*
-* Major Revision 0 - 9 Bits 15 - 12
-* Minor Revision 0 - 99 Bits 11 - 5
-* Compatability Revision a - z Bits 4 - 0
-* </pre>
-*
-******************************************************************************/
-
-#ifndef XVERSION_H /* prevent circular inclusions */
-#define XVERSION_H /* by using protection macros */
-
-/***************************** Include Files *********************************/
-
-#include "xbasic_types.h"
-#include "xstatus.h"
-
-/************************** Constant Definitions *****************************/
-
-/**************************** Type Definitions *******************************/
-
-/* the following data type is used to hold a null terminated version string
- * consisting of the following format, "X.YYX"
- */
-typedef s8 XVersion[6];
-
-/***************** Macros (Inline Functions) Definitions *********************/
-
-/************************** Function Prototypes ******************************/
-
-void XVersion_UnPack(XVersion * InstancePtr, u16 PackedVersion);
-
-XStatus XVersion_Pack(XVersion * InstancePtr, u16 * PackedVersion);
-
-u32 XVersion_IsEqual(XVersion * InstancePtr, XVersion * VersionPtr);
-
-void XVersion_ToString(XVersion * InstancePtr, s8 * StringPtr);
-
-XStatus XVersion_FromString(XVersion * InstancePtr, s8 * StringPtr);
-
-void XVersion_Copy(XVersion * InstancePtr, XVersion * VersionPtr);
-
-#endif /* end of protection macro */
diff --git a/board/xilinx/ml300/Makefile b/board/xilinx/ml300/Makefile
deleted file mode 100644
index 880c494c99..0000000000
--- a/board/xilinx/ml300/Makefile
+++ /dev/null
@@ -1,58 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-
-include $(TOPDIR)/config.mk
-
-CFLAGS += -I../ml300 -I../common -I../xilinx_enet -I../xilinx_iic
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o \
- serial.o \
- ../xilinx_enet/emac_adapter.o ../xilinx_enet/xemac.o \
- ../xilinx_enet/xemac_options.o ../xilinx_enet/xemac_polled.o \
- ../xilinx_enet/xemac_intr.o ../xilinx_enet/xemac_g.o \
- ../xilinx_enet/xemac_intr_dma.o ../xilinx_iic/iic_adapter.o \
- ../xilinx_iic/xiic_l.o ../common/xipif_v1_23_b.o \
- ../common/xbasic_types.o ../common/xdma_channel.o \
- ../common/xdma_channel_sg.o ../common/xpacket_fifo_v1_00_b.o \
- ../common/xversion.o \
-
-SOBJS = init.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $^
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/xilinx/ml300/config.mk b/board/xilinx/ml300/config.mk
deleted file mode 100644
index 57ddb2fd7a..0000000000
--- a/board/xilinx/ml300/config.mk
+++ /dev/null
@@ -1,29 +0,0 @@
-#
-# (C) Copyright 2000
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# esd ADCIOP boards
-#
-
-#TEXT_BASE = 0xFFFE0000
-TEXT_BASE = 0x04000000
diff --git a/board/xilinx/ml300/init.S b/board/xilinx/ml300/init.S
deleted file mode 100644
index f753df851a..0000000000
--- a/board/xilinx/ml300/init.S
+++ /dev/null
@@ -1,48 +0,0 @@
-/*
- * init.S: Stubs for U-Boot initialization
- *
- * Author: Xilinx, Inc.
- *
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- *
- * XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A
- * COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS
- * ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD,
- * XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE
- * FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING
- * ANY THIRD PARTY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.
- * XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO
- * THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY
- * WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM
- * CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND
- * FITNESS FOR A PARTICULAR PURPOSE.
- *
- *
- * Xilinx hardware products are not intended for use in life support
- * appliances, devices, or systems. Use in such applications is
- * expressly prohibited.
- *
- *
- * (c) Copyright 2002-2004 Xilinx Inc.
- * All rights reserved.
- *
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- *
- */
-
- .globl ext_bus_cntlr_init
-ext_bus_cntlr_init:
- blr
-
- .globl sdram_init
-sdram_init:
- blr
diff --git a/board/xilinx/ml300/ml300.c b/board/xilinx/ml300/ml300.c
deleted file mode 100644
index dad562f1c7..0000000000
--- a/board/xilinx/ml300/ml300.c
+++ /dev/null
@@ -1,128 +0,0 @@
-/*
- * ml300.c: U-Boot platform support for Xilinx ML300 board
- *
- * Author: Xilinx, Inc.
- *
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- *
- * XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A
- * COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS
- * ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD,
- * XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE
- * FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING
- * ANY THIRD PARTY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.
- * XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO
- * THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY
- * WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM
- * CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND
- * FITNESS FOR A PARTICULAR PURPOSE.
- *
- *
- * Xilinx hardware products are not intended for use in life support
- * appliances, devices, or systems. Use in such applications is
- * expressly prohibited.
- *
- *
- * (c) Copyright 2002-2004 Xilinx Inc.
- * All rights reserved.
- *
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- */
-
-#include <common.h>
-#include <asm/processor.h>
-#include "xparameters.h"
-
-#ifdef CFG_ENV_IS_IN_EEPROM
-extern void convert_env(void);
-#endif
-
-int
-board_pre_init(void)
-{
- return 0;
-}
-
-int
-checkboard(void)
-{
- char tmp[64]; /* long enough for environment variables */
- char *s, *e;
- int i = getenv_r("L", tmp, sizeof (tmp));
-
- if (i < 0) {
- printf("### No HW ID - assuming ML300");
- } else {
- for (e = tmp; *e; ++e) {
- if (*e == ' ')
- break;
- }
-
- printf("### Board Serial# is ");
-
- for (s = tmp; s < e; ++s) {
- putc(*s);
- }
-
- }
- putc('\n');
-
- return (0);
-}
-
-long int
-initdram(int board_type)
-{
- return 128 * 1024 * 1024;
-}
-
-int
-testdram(void)
-{
- printf("test: xxx MB - ok\n");
-
- return (0);
-}
-
-/* implement functions originally in cpu/ppc4xx/speed.c */
-void
-get_sys_info(sys_info_t * sysInfo)
-{
- sysInfo->freqProcessor = XPAR_CORE_CLOCK_FREQ_HZ;
-
- /* only correct if the PLB and OPB run at the same frequency */
- sysInfo->freqPLB = XPAR_UARTNS550_0_CLOCK_FREQ_HZ;
- sysInfo->freqPCI = XPAR_UARTNS550_0_CLOCK_FREQ_HZ / 3;
-}
-
-ulong
-get_PCI_freq(void)
-{
- ulong val;
- PPC405_SYS_INFO sys_info;
-
- get_sys_info(&sys_info);
- val = sys_info.freqPCI;
- return val;
-}
-
-#ifdef CONFIG_MISC_INIT_R
-
-int
-misc_init_r()
-{
- /* convert env name and value to u-boot standard */
- convert_env();
- return 0;
-}
-
-#endif
diff --git a/board/xilinx/ml300/serial.c b/board/xilinx/ml300/serial.c
deleted file mode 100644
index 19bcc6ff33..0000000000
--- a/board/xilinx/ml300/serial.c
+++ /dev/null
@@ -1,155 +0,0 @@
-/*
- * Author: Xilinx, Inc.
- *
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- *
- * XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A
- * COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS
- * ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD,
- * XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE
- * FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING
- * ANY THIRD PARTY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.
- * XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO
- * THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY
- * WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM
- * CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND
- * FITNESS FOR A PARTICULAR PURPOSE.
- *
- *
- * Xilinx hardware products are not intended for use in life support
- * appliances, devices, or systems. Use in such applications is
- * expressly prohibited.
- *
- *
- * (c) Copyright 2002-2004 Xilinx Inc.
- * All rights reserved.
- *
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- */
-
-#include <asm/u-boot.h>
-#include <asm/processor.h>
-#include <common.h>
-#include <command.h>
-#include <configs/ml300.h>
-#include "xparameters.h"
-
-#define USE_CHAN1 \
- ((defined XPAR_UARTNS550_0_BASEADDR) && (defined CFG_INIT_CHAN1))
-#define USE_CHAN2 \
- ((defined XPAR_UARTNS550_1_BASEADDR) && (defined CFG_INIT_CHAN2))
-
-#if USE_CHAN1
-#include <ns16550.h>
-#endif
-
-#if USE_CHAN1
-const NS16550_t COM_PORTS[] = { (NS16550_t) (XPAR_UARTNS550_0_BASEADDR + 3)
-#if USE_CHAN2
- , (NS16550_t) (XPAR_UARTNS550_1_BASEADDR + 3)
-#endif
-};
-#endif
-
-int
-serial_init(void)
-{
-#if USE_CHAN1
- DECLARE_GLOBAL_DATA_PTR;
- int clock_divisor;
-
- clock_divisor = XPAR_UARTNS550_0_CLOCK_FREQ_HZ / 16 / gd->baudrate;
- (void) NS16550_init(COM_PORTS[0], clock_divisor);
-#if USE_CHAN2
- clock_divisor = XPAR_UARTNS550_1_CLOCK_FREQ_HZ / 16 / gd->baudrate;
- (void) NS16550_init(COM_PORTS[1], clock_divisor);
-#endif
-#endif
- return 0;
-
-}
-
-void
-serial_putc(const char c)
-{
- if (c == '\n')
- NS16550_putc(COM_PORTS[CFG_DUART_CHAN], '\r');
-
- NS16550_putc(COM_PORTS[CFG_DUART_CHAN], c);
-}
-
-int
-serial_getc(void)
-{
- return NS16550_getc(COM_PORTS[CFG_DUART_CHAN]);
-}
-
-int
-serial_tstc(void)
-{
- return NS16550_tstc(COM_PORTS[CFG_DUART_CHAN]);
-}
-
-void
-serial_setbrg(void)
-{
-#if USE_CHAN1
- DECLARE_GLOBAL_DATA_PTR;
- int clock_divisor;
-
- clock_divisor = XPAR_UARTNS550_0_CLOCK_FREQ_HZ / 16 / gd->baudrate;
- NS16550_reinit(COM_PORTS[0], clock_divisor);
-#if USE_CHAN2
- clock_divisor = XPAR_UARTNS550_1_CLOCK_FREQ_HZ / 16 / gd->baudrate;
- NS16550_reinit(COM_PORTS[1], clock_divisor);
-#endif
-#endif
-}
-
-void
-serial_puts(const char *s)
-{
- while (*s) {
- serial_putc(*s++);
- }
-}
-
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
-void
-kgdb_serial_init(void)
-{
-}
-
-void
-putDebugChar(int c)
-{
- serial_putc(c);
-}
-
-void
-putDebugStr(const char *str)
-{
- serial_puts(str);
-}
-
-int
-getDebugChar(void)
-{
- return serial_getc();
-}
-
-void
-kgdb_interruptible(int yes)
-{
- return;
-}
-#endif /* CFG_CMD_KGDB */
diff --git a/board/xilinx/ml300/sw_services/uboot_v1_00_a/data/Ltypes b/board/xilinx/ml300/sw_services/uboot_v1_00_a/data/Ltypes
deleted file mode 100644
index 9daf147096..0000000000
--- a/board/xilinx/ml300/sw_services/uboot_v1_00_a/data/Ltypes
+++ /dev/null
@@ -1,55 +0,0 @@
-#!/bin/bash
-
-if [ $# -ne 1 ]
-then
- echo "usage: Ltypes filename" >&2
- exit 2
-fi
-
-FILE="$1"
-#TMPFILE='mktemp "${FILE}.XXXXXX"' || exit 1
-TMPFILE=${FILE}.`date "+%s"`
-touch $TMPFILE || exit 1
-
-# Change all the Xilinx types to Linux types and put the result into a temp file
-sed \
- -e 's/\bXTRUE\b/TRUE/g' \
- -e 's/\bXFALSE\b/FALSE/g' \
- -e 's/\bXNULL\b/NULL/g' \
- -e 's/"xenv.h"/<asm\/delay.h>/g' \
- -e 's/\bXENV_USLEEP\b/udelay/g' \
- -e 's/\bXuint8\b/u8/g' \
- -e 's/\bXuint16\b/u16/g' \
- -e 's/\bXuint32\b/u32/g' \
- -e 's/\bXint8\b/s8/g' \
- -e 's/\bXint16\b/s16/g' \
- -e 's/\bXint32\b/s32/g' \
- -e 's/\bXboolean\b/u32/g' \
- "${FILE}" > "${TMPFILE}"
-
-# Overlay the original file with the temp file
-mv "${TMPFILE}" "${FILE}"
-
-# Are we doing xbasic_types.h?
-if [ "${FILE##*/}" = xbasic_types.h ]
-then
- # Remember as you're reading this that we've already gone through the prior
- # sed script. We need to do some other things to xbasic_types.h:
- # 1) Add ifndefs around TRUE and FALSE defines
- # 2) Remove definition of NULL as NULL
- # 3) Replace most of the primitive types section with a #include
- sed \
- -e '/u32 true/,/#define false/Ic\
-#ifndef TRUE\
-#define TRUE 1\
-#endif\
-#ifndef FALSE\
-#define FALSE 0\
-#endif' \
- -e '/#define[[:space:]][[:space:]]*NULL[[:space:]][[:space:]]*NULL/d' \
- -e '/typedef[[:space:]][[:space:]]*unsigned[[:space:]][[:space:]]*char[[:space:]][[:space:]]*u8/,/typedef[[:space:]][[:space:]]*unsigned[[:space:]][[:space:]]*long[[:space:]][[:space:]]*u32.*boolean/c\
-#include <linux/types.h>' \
- "${FILE}" > "${TMPFILE}"
-
- mv "${TMPFILE}" "${FILE}"
-fi
diff --git a/board/xilinx/ml300/sw_services/uboot_v1_00_a/data/uboot_v2_1_0.mld b/board/xilinx/ml300/sw_services/uboot_v1_00_a/data/uboot_v2_1_0.mld
deleted file mode 100644
index 516924126d..0000000000
--- a/board/xilinx/ml300/sw_services/uboot_v1_00_a/data/uboot_v2_1_0.mld
+++ /dev/null
@@ -1,52 +0,0 @@
-# (c) Copyright 2004 Xilinx Inc.
-# Author: Xilinx, Inc.
-#
-#
-# This program is free software; you can redistribute it and/or modify it
-# under the terms of the GNU General Public License as published by the
-# Free Software Foundation; either version 2 of the License, or (at your
-# option) any later version.
-#
-#
-# XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A
-# COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS
-# ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD,
-# XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE
-# FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING
-# ANY THIRD PARTY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.
-# XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO
-# THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY
-# WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM
-# CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND
-# FITNESS FOR A PARTICULAR PURPOSE.
-#
-#
-# Xilinx hardware products are not intended for use in life support
-# appliances, devices, or systems. Use in such applications is
-# expressly prohibited.
-#
-#
-# (c) Copyright 2002-2004 Xilinx Inc.
-# All rights reserved.
-#
-#
-# You should have received a copy of the GNU General Public License along
-# with this program; if not, write to the Free Software Foundation, Inc.,
-# 675 Mass Ave, Cambridge, MA 02139, USA.
-
-OPTION psf_version = 2.1;
-
-BEGIN LIBRARY uboot OPTION DRC = uboot_drc;
-
-BEGIN ARRAY connected_periphs PROPERTY desc = "Peripherals connected to U-Boot";
-PROPERTY size = 0;
-PARAM name = periph_name, desc = "Name of Peripheral connected", type = string;
-END ARRAY
- PARAMETER name = TARGET_DIR, desc = "Target Directory for U-Boot BSP", type = string;
-
-# location of persistent storage in the IIC EEPROM (defaults are set for ML300)
-PARAMETER name = IIC_PERSISTENT_BASEADDR, desc = "Start of persistent storage block in the EEPROM address space", type = int, default = 1024;
-PARAMETER name = IIC_PERSISTENT_HIGHADDR, desc = "End of persistent storage block in the EEPROM address space", type = int, default = 2047;
-PARAMETER name = IIC_PERSISTENT_EEPROMADDR, desc = "Address of the EEPROM on the IIC bus", type = int, default = 0xA0;
-
-END LIBRARY
diff --git a/board/xilinx/ml300/sw_services/uboot_v1_00_a/data/uboot_v2_1_0.tcl b/board/xilinx/ml300/sw_services/uboot_v1_00_a/data/uboot_v2_1_0.tcl
deleted file mode 100644
index 9d44f4493d..0000000000
--- a/board/xilinx/ml300/sw_services/uboot_v1_00_a/data/uboot_v2_1_0.tcl
+++ /dev/null
@@ -1,325 +0,0 @@
-#
-# Author: Xilinx, Inc.
-#
-#
-# This program is free software; you can redistribute it and/or modify it
-# under the terms of the GNU General Public License as published by the
-# Free Software Foundation; either version 2 of the License, or (at your
-# option) any later version.
-#
-#
-# XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A
-# COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS
-# ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD,
-# XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE
-# FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING
-# ANY THIRD PARTY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.
-# XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO
-# THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY
-# WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM
-# CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND
-# FITNESS FOR A PARTICULAR PURPOSE.
-#
-#
-# Xilinx hardware products are not intended for use in life support
-# appliances, devices, or systems. Use in such applications is
-# expressly prohibited.
-#
-#
-# (c) Copyright 2002-2004 Xilinx Inc.
-# All rights reserved.
-#
-#
-# You should have received a copy of the GNU General Public License along
-# with this program; if not, write to the Free Software Foundation, Inc.,
-# 675 Mass Ave, Cambridge, MA 02139, USA.
-#
-# Globals
-lappend drvlist
-set ltypes "../../../sw_services/uboot_v1_00_a/data/Ltypes"
-
-proc uboot_drc {lib_handle} {
- puts "U-Boot DRC..."
-}
-
-proc generate {libname} {
-
- global drvlist
-
- # Get list of peripherals connected to uboot
- set conn_periphs [xget_handle $libname "ARRAY" "connected_periphs"]
- #lappend drvlist
- if {[string compare -nocase $conn_periphs ""] != 0} {
- set conn_periphs_elems [xget_handle $conn_periphs "ELEMENTS" "*"]
- # For each periph
- foreach periph_elem $conn_periphs_elems {
- set periph [xget_value $periph_elem "PARAMETER" "periph_name"]
- # 1. Get driver
- set drv [xget_swhandle $periph]
- set posn [lsearch -exact $drvlist $drv]
- if {$posn == -1} {
- lappend drvlist $drv
- }
- }
-
- set file_handle [xopen_include_file "xparameters.h"]
- puts $file_handle "\n/******************************************************************/\n"
- puts $file_handle "/* U-Boot Redefines */"
- puts $file_handle "\n/******************************************************************/\n"
- close $file_handle
-
- foreach drv $drvlist {
- set drvname [xget_value $drv "NAME"]
-
- #Redefines xparameters.h
- if {[string compare -nocase $drvname "uartns550"] == 0} {
- xredefine_uartns550 $drv "xparameters.h"
- } elseif {[string compare -nocase $drvname "emac"] == 0} {
- xredefine_emac $drv "xparameters.h"
- } elseif {[string compare -nocase $drvname "iic"] == 0} {
- xredefine_iic $drv "xparameters.h"
- }
- }
- }
-
- # define core_clock
- xredefine_params $libname "xparameters.h" "CORE_CLOCK_FREQ_HZ"
-
- # define the values for the persistent storage in IIC
- xredefine_params $libname "xparameters.h" "IIC_PERSISTENT_BASEADDR" "IIC_PERSISTENT_HIGHADDR" "IIC_PERSISTENT_EEPROMADDR"
-
-}
-
-proc xget_corefreq {} {
- set processor [xget_processor]
- set name [xget_value $processor "NAME"]
- puts "procname : $name"
- set processor_driver [xget_swhandle [xget_value $processor "NAME"]]
- puts "procdrv : $processor_driver"
- if {[string compare -nocase $processor_driver ""] != 0} {
- set arg "CORE_CLOCK_FREQ_HZ"
- #set retval [xget_value $processor_driver "PARAMETER" $arg]
- set retval [xget_dname [xget_value $processor_driver "NAME"] $arg]
- return $retval
- }
-}
-
-# procedure that adds # defines to xparameters.h as XPAR_argument
-proc xredefine_params {handle file_name args} {
-
- puts "xredfine ..."
- # Open include file
- set file_handle [xopen_include_file $file_name]
- puts "args : $args"
-
- foreach arg $args {
- if {[string compare -nocase $arg "CORE_CLOCK_FREQ_HZ"] == 0} {
- set value [xget_corefreq]
- puts "corefreq : $value"
- } else {
- set value [xget_value $handle "PARAMETER" $arg]
- puts "value : $value"
- }
-
- if {$value != ""} {
- set value [xformat_addr_string $value $arg]
-
- if {[string compare -nocase $arg "IIC_PERSISTENT_BASEADDR"] == 0} {
- set name "PERSISTENT_0_IIC_0_BASEADDR"
- } elseif {[string compare -nocase $arg "IIC_PERSISTENT_HIGHADDR"] == 0} {
- set name "PERSISTENT_0_IIC_0_HIGHADDR"
- } elseif {[string compare -nocase $arg "IIC_PERSISTENT_EEPROMADDR"] == 0} {
- set name "PERSISTENT_0_IIC_0_EEPROMADDR"
- } else {
- set name [string toupper $arg]
- }
- set name [format "XPAR_%s" $name]
- puts $file_handle "#define $name $value"
- }
- }
-
- puts $file_handle "\n/******************************************************************/\n"
- close $file_handle
-}
-
-# uart redefines...
-proc xredefine_uartns550 {drvhandle file_name} {
-
- xredefine_include_file $drvhandle $file_name "uartns550" "C_BASEADDR" "C_HIGHADDR" "CLOCK_HZ" "DEVICE_ID"
-
-}
-
-proc xredefine_emac {drvhandle file_name} {
-
- xredefine_include_file $drvhandle $file_name "emac" "C_BASEADDR" "C_HIGHADDR" "C_DMA_PRESENT" "C_MII_EXIST" "C_ERR_COUNT_EXIST" "DEVICE_ID"
-
-}
-
-proc xredefine_iic {drvhandle file_name} {
- xredefine_include_file $drvhandle $file_name "iic" "C_BASEADDR" "C_HIGHADDR" "C_TEN_BIT_ADR" "DEVICE_ID"
-
-}
-
-#######################
-
-proc xredefine_include_file {drv_handle file_name drv_string args} {
-
- # Open include file
- set file_handle [xopen_include_file $file_name]
-
- # Get all peripherals connected to this driver
- set periphs [xget_periphs $drv_handle]
-
- set pname [format "XPAR_%s_" [string toupper $drv_string]]
-
- # Print all parameters for all peripherals
- set device_id 0
- set sub_periphs 1
- foreach periph $periphs {
- puts "$periph : $drv_string : $sub_periphs"
-
- for {set i 0} {$i < $sub_periphs} {incr i} {
- foreach arg $args {
- set name "${pname}${device_id}_"
-
- if {[string compare -nocase "CLOCK_HZ" $arg] == 0} {
- set xdrv_string [format "%s%s" "X" $drv_string]
- set value [xget_dname $xdrv_string $arg]
- set name "${name}CLOCK_FREQ_HZ"
- } else {
- if {[string match C_* $arg]} {
- set name [format "%s%s" $name [string range $arg 2 end]]
- } else {
- set name "${name}${arg}"
- }
- set value [xget_name $periph $arg]
- }
-
- if {[string compare -nocase "uartns550" $drv_string] == 0} {
- if {[string compare -nocase "C_BASEADDR" $arg] == 0} {
- set value [format "(%s%s%s)" $value "+" "0x1000"]
- }
- }
-
- puts $file_handle "#define $name $value"
- if {[string compare -nocase "DEVICE_ID" $arg] == 0} {
- incr device_id
- }
- }
- }
- }
- puts $file_handle "\n/******************************************************************/\n"
- close $file_handle
-}
-
-##################################################
-# procedure post_generate
-# This generates the drivers directory for uboot
-# and runs the ltypes script
-##################################################
-
-proc post_generate {lib_handle} {
-
- global drvlist
-
- # Create U-Boot tree structure
- set pwd [pwd]
- set common_dir "uboot/board/xilinx/common"
- set xilinx_enet_dir "uboot/board/xilinx/xilinx_enet"
- set ml300_dir "uboot/board/xilinx/ml300"
-
- exec bash -c "mkdir -p $common_dir $xilinx_enet_dir $ml300_dir"
-
- # Copy files for xilinx_ocp
- xcopy_commonfiles
-
- foreach drv $drvlist {
- set drvname [xget_value $drv "NAME"]
- set ver [xget_value $drv "PARAMETER" "DRIVER_VER"]
- set ver [string map {. _} $ver]
- set dirname [format "%s_v%s" $drvname $ver]
-
- if {[string compare -nocase $drvname "emac"] == 0} {
- xcopy_emac $drv $dirname
- } elseif {[string compare -nocase $drvname "iic"] == 0} {
- xcopy_iic $drv $dirname
- }
- }
-
- # Call Ltypes Script here
- set uboot "uboot"
- xltype_file $uboot
-
- # Move xparameters.h around
- exec bash -c "cp ../../include/xparameters.h $ml300_dir"
-
- # copy the whole U-Boot BSP to its final destination
- set value [xget_value $lib_handle "PARAMETER" TARGET_DIR]
- puts "TARGET_DIR : $value"
-
- if {$value != ""} {
- if {[file isdirectory $value] == 0} {
- exec bash -c "mkdir -p $value"
- }
- exec bash -c "cp -Rp uboot/* $value"
- }
-}
-
-proc xcopy_commonfiles {} {
-
- global drvlist
-
- set common_dir "uboot/board/xilinx/common"
-
- foreach drv $drvlist {
- set depends [xget_value $drv "OPTION" "DEPENDS"]
- foreach dep $depends {
- puts "dep : $dep"
- if {[file isdirectory "../$dep"] == 1} {
- exec bash -c "cp -f ../$dep/src/*.c $common_dir"
- exec bash -c "cp -f ../$dep/src/*.h $common_dir"
- }
- }
- }
-
-}
-
-proc xcopy_emac {drv_handle dirname} {
- set emac "board/xilinx/xilinx_enet"
- xcopy_dir $dirname $emac
-}
-
-proc xcopy_iic {drv_handle dirname} {
- set iic "board/xilinx/xilinx_iic"
- xcopy_dir $dirname $iic
-}
-
-proc xcopy_dir {srcdir dstdir} {
-
- set dstdirname [format "%s%s" "uboot/" $dstdir]
- if {[file isdirectory "../$srcdir"] == 1} {
- # Copy files from src to dst
- exec bash -c "mkdir -p $dstdirname"
- exec bash -c "cp -f ../$srcdir/src/*.c $dstdirname"
- exec bash -c "cp -f ../$srcdir/src/*.h $dstdirname"
- } else {
- puts "$srcdir does not exist ..."
- }
-}
-
-
-proc xltype_file {filename} {
-
- global ltypes
-
- puts $filename
-
- if {[file isdirectory $filename]} {
- foreach entry [glob -nocomplain [file join $filename *]] {
- xltype_file $entry
- }
- } else {
- exec bash -c "$ltypes $filename"
- }
-
-}
diff --git a/board/xilinx/ml300/u-boot.lds b/board/xilinx/ml300/u-boot.lds
deleted file mode 100644
index b6d748e1d9..0000000000
--- a/board/xilinx/ml300/u-boot.lds
+++ /dev/null
@@ -1,149 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-ENTRY(_start)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-/*
- cpu/ppc4xx/start.o (.text)
- board/xilinx/ml300/init.o (.text)
- cpu/ppc4xx/kgdb.o (.text)
- cpu/ppc4xx/traps.o (.text)
- cpu/ppc4xx/interrupts.o (.text)
- cpu/ppc4xx/serial.o (.text)
- cpu/ppc4xx/cpu_init.o (.text)
- cpu/ppc4xx/speed.o (.text)
- cpu/ppc4xx/4xx_enet.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/extable.o (.text)
- lib_generic/zlib.o (.text)
-*/
-/* . = env_offset;*/
-/* common/environment.o(.text)*/
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/xilinx/ml300/u-boot.lds.debug b/board/xilinx/ml300/u-boot.lds.debug
deleted file mode 100644
index 1608f8cdaa..0000000000
--- a/board/xilinx/ml300/u-boot.lds.debug
+++ /dev/null
@@ -1,137 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- mpc8xx/start.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/extable.o (.text)
-
- common/environment.o(.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/xilinx/ml300/xparameters.h b/board/xilinx/ml300/xparameters.h
deleted file mode 100644
index 2c56737dc5..0000000000
--- a/board/xilinx/ml300/xparameters.h
+++ /dev/null
@@ -1,196 +0,0 @@
-/*******************************************************************
-*
-* CAUTION: This file is automatically generated by libgen.
-* Version: Xilinx EDK 6.2 EDK_Gm.11
-* DO NOT EDIT.
-*
-* Copyright (c) 2003 Xilinx, Inc. All rights reserved.
-*
-* Description: Driver parameters
-*
-*******************************************************************/
-
-/******************************************************************/
-
-/* U-Boot Redefines */
-
-/******************************************************************/
-
-#define XPAR_UARTNS550_0_BASEADDR (XPAR_OPB_UART16550_0_BASEADDR+0x1000)
-#define XPAR_UARTNS550_0_HIGHADDR XPAR_OPB_UART16550_0_HIGHADDR
-#define XPAR_UARTNS550_0_CLOCK_FREQ_HZ XPAR_XUARTNS550_CLOCK_HZ
-#define XPAR_UARTNS550_0_DEVICE_ID XPAR_OPB_UART16550_0_DEVICE_ID
-#define XPAR_UARTNS550_1_BASEADDR (XPAR_OPB_UART16550_1_BASEADDR+0x1000)
-#define XPAR_UARTNS550_1_HIGHADDR XPAR_OPB_UART16550_1_HIGHADDR
-#define XPAR_UARTNS550_1_CLOCK_FREQ_HZ XPAR_XUARTNS550_CLOCK_HZ
-#define XPAR_UARTNS550_1_DEVICE_ID XPAR_OPB_UART16550_1_DEVICE_ID
-
-/******************************************************************/
-
-#define XPAR_IIC_0_BASEADDR XPAR_OPB_IIC_0_BASEADDR
-#define XPAR_IIC_0_HIGHADDR XPAR_OPB_IIC_0_HIGHADDR
-#define XPAR_IIC_0_TEN_BIT_ADR XPAR_OPB_IIC_0_TEN_BIT_ADR
-#define XPAR_IIC_0_DEVICE_ID XPAR_OPB_IIC_0_DEVICE_ID
-
-/******************************************************************/
-
-#define XPAR_EMAC_0_BASEADDR XPAR_OPB_ETHERNET_0_BASEADDR
-#define XPAR_EMAC_0_HIGHADDR XPAR_OPB_ETHERNET_0_HIGHADDR
-#define XPAR_EMAC_0_DMA_PRESENT XPAR_OPB_ETHERNET_0_DMA_PRESENT
-#define XPAR_EMAC_0_MII_EXIST XPAR_OPB_ETHERNET_0_MII_EXIST
-#define XPAR_EMAC_0_ERR_COUNT_EXIST XPAR_OPB_ETHERNET_0_ERR_COUNT_EXIST
-#define XPAR_EMAC_0_DEVICE_ID XPAR_OPB_ETHERNET_0_DEVICE_ID
-
-/******************************************************************/
-
-#define XPAR_CORE_CLOCK_FREQ_HZ XPAR_CPU_PPC405_CORE_CLOCK_FREQ_HZ
-
-/******************************************************************/
-
-#define XPAR_PERSISTENT_0_IIC_0_BASEADDR 0x00000400
-#define XPAR_PERSISTENT_0_IIC_0_HIGHADDR 0x000007FF
-#define XPAR_PERSISTENT_0_IIC_0_EEPROMADDR 0xA0
-
-/******************************************************************/
-
-#define XPAR_XPCI_NUM_INSTANCES 1
-#define XPAR_XPCI_CLOCK_HZ 33333333
-#define XPAR_OPB_PCI_REF_0_DEVICE_ID 0
-#define XPAR_OPB_PCI_REF_0_BASEADDR 0x20000000
-#define XPAR_OPB_PCI_REF_0_HIGHADDR 0x3FFFFFFF
-#define XPAR_OPB_PCI_REF_0_CONFIG_ADDR 0x3C000000
-#define XPAR_OPB_PCI_REF_0_CONFIG_DATA 0x3C000004
-#define XPAR_OPB_PCI_REF_0_LCONFIG_ADDR 0x3E000000
-#define XPAR_OPB_PCI_REF_0_MEM_BASEADDR 0x20000000
-#define XPAR_OPB_PCI_REF_0_MEM_HIGHADDR 0x37FFFFFF
-#define XPAR_OPB_PCI_REF_0_IO_BASEADDR 0x38000000
-#define XPAR_OPB_PCI_REF_0_IO_HIGHADDR 0x3BFFFFFF
-
-/******************************************************************/
-
-#define XPAR_XEMAC_NUM_INSTANCES 1
-#define XPAR_OPB_ETHERNET_0_BASEADDR 0x60000000
-#define XPAR_OPB_ETHERNET_0_HIGHADDR 0x60003FFF
-#define XPAR_OPB_ETHERNET_0_DEVICE_ID 0
-#define XPAR_OPB_ETHERNET_0_ERR_COUNT_EXIST 1
-#define XPAR_OPB_ETHERNET_0_DMA_PRESENT 1
-#define XPAR_OPB_ETHERNET_0_MII_EXIST 1
-
-/******************************************************************/
-
-#define XPAR_MY_OPB_GPIO_0_DEVICE_ID_0 0
-#define XPAR_MY_OPB_GPIO_0_BASEADDR_0 0x90000000
-#define XPAR_MY_OPB_GPIO_0_HIGHADDR_0 (0x90000000+0x7)
-#define XPAR_MY_OPB_GPIO_0_DEVICE_ID_1 1
-#define XPAR_MY_OPB_GPIO_0_BASEADDR_1 (0x90000000+0x8)
-#define XPAR_MY_OPB_GPIO_0_HIGHADDR_1 (0x90000000+0x1F)
-#define XPAR_XGPIO_NUM_INSTANCES 2
-
-/******************************************************************/
-
-#define XPAR_XIIC_NUM_INSTANCES 1
-#define XPAR_OPB_IIC_0_BASEADDR 0xA8000000
-#define XPAR_OPB_IIC_0_HIGHADDR 0xA80001FF
-#define XPAR_OPB_IIC_0_DEVICE_ID 0
-#define XPAR_OPB_IIC_0_TEN_BIT_ADR 0
-
-/******************************************************************/
-
-#define XPAR_XUARTNS550_NUM_INSTANCES 2
-#define XPAR_XUARTNS550_CLOCK_HZ 100000000
-#define XPAR_OPB_UART16550_0_BASEADDR 0xA0000000
-#define XPAR_OPB_UART16550_0_HIGHADDR 0xA0001FFF
-#define XPAR_OPB_UART16550_0_DEVICE_ID 0
-#define XPAR_OPB_UART16550_1_BASEADDR 0xA0010000
-#define XPAR_OPB_UART16550_1_HIGHADDR 0xA0011FFF
-#define XPAR_OPB_UART16550_1_DEVICE_ID 1
-
-/******************************************************************/
-
-#define XPAR_XSPI_NUM_INSTANCES 1
-#define XPAR_OPB_SPI_0_BASEADDR 0xA4000000
-#define XPAR_OPB_SPI_0_HIGHADDR 0xA400007F
-#define XPAR_OPB_SPI_0_DEVICE_ID 0
-#define XPAR_OPB_SPI_0_FIFO_EXIST 1
-#define XPAR_OPB_SPI_0_SPI_SLAVE_ONLY 0
-#define XPAR_OPB_SPI_0_NUM_SS_BITS 1
-
-/******************************************************************/
-
-#define XPAR_XPS2_NUM_INSTANCES 2
-#define XPAR_OPB_PS2_DUAL_REF_0_DEVICE_ID_0 0
-#define XPAR_OPB_PS2_DUAL_REF_0_BASEADDR_0 0xA9000000
-#define XPAR_OPB_PS2_DUAL_REF_0_HIGHADDR_0 (0xA9000000+0x3F)
-#define XPAR_OPB_PS2_DUAL_REF_0_DEVICE_ID_1 1
-#define XPAR_OPB_PS2_DUAL_REF_0_BASEADDR_1 (0xA9000000+0x1000)
-#define XPAR_OPB_PS2_DUAL_REF_0_HIGHADDR_1 (0xA9000000+0x103F)
-
-/******************************************************************/
-
-#define XPAR_XTOUCHSCREEN_NUM_INSTANCES 1
-#define XPAR_OPB_TSD_REF_0_BASEADDR 0xAA000000
-#define XPAR_OPB_TSD_REF_0_HIGHADDR 0xAA000007
-#define XPAR_OPB_TSD_REF_0_DEVICE_ID 0
-
-/******************************************************************/
-
-#define XPAR_OPB_AC97_CONTROLLER_REF_0_BASEADDR 0xA6000000
-#define XPAR_OPB_AC97_CONTROLLER_REF_0_HIGHADDR 0xA60000FF
-#define XPAR_OPB_PAR_PORT_REF_0_BASEADDR 0x90010000
-#define XPAR_OPB_PAR_PORT_REF_0_HIGHADDR 0x900100FF
-#define XPAR_PLB_DDR_0_BASEADDR 0x00000000
-#define XPAR_PLB_DDR_0_HIGHADDR 0x0FFFFFFF
-
-/******************************************************************/
-
-#define XPAR_XINTC_HAS_IPR 1
-#define XPAR_INTC_MAX_NUM_INTR_INPUTS 18
-#define XPAR_XINTC_USE_DCR 0
-#define XPAR_XINTC_NUM_INSTANCES 1
-#define XPAR_DCR_INTC_0_BASEADDR 0xD0000FC0
-#define XPAR_DCR_INTC_0_HIGHADDR 0xD0000FDF
-#define XPAR_DCR_INTC_0_DEVICE_ID 0
-#define XPAR_DCR_INTC_0_KIND_OF_INTR 0x00038000
-
-/******************************************************************/
-
-#define XPAR_DCR_INTC_0_MISC_LOGIC_0_PHY_MII_INT_INTR 0
-#define XPAR_DCR_INTC_0_OPB_ETHERNET_0_IP2INTC_IRPT_INTR 1
-#define XPAR_DCR_INTC_0_MISC_LOGIC_0_IIC_TEMP_CRIT_INTR 2
-#define XPAR_DCR_INTC_0_MISC_LOGIC_0_IIC_IRQ_INTR 3
-#define XPAR_DCR_INTC_0_OPB_IIC_0_IP2INTC_IRPT_INTR 4
-#define XPAR_DCR_INTC_0_OPB_SYSACE_0_SYSACE_IRQ_INTR 5
-#define XPAR_DCR_INTC_0_OPB_UART16550_0_IP2INTC_IRPT_INTR 6
-#define XPAR_DCR_INTC_0_OPB_UART16550_1_IP2INTC_IRPT_INTR 7
-#define XPAR_DCR_INTC_0_OPB_PS2_DUAL_REF_0_SYS_INTR1_INTR 8
-#define XPAR_DCR_INTC_0_OPB_PS2_DUAL_REF_0_SYS_INTR2_INTR 9
-#define XPAR_DCR_INTC_0_OPB_SPI_0_IP2INTC_IRPT_INTR 10
-#define XPAR_DCR_INTC_0_OPB_TSD_REF_0_INTR_INTR 11
-#define XPAR_DCR_INTC_0_OPB_AC97_CONTROLLER_REF_0_PLAYBACK_INTERRUPT_INTR 12
-#define XPAR_DCR_INTC_0_OPB_AC97_CONTROLLER_REF_0_RECORD_INTERRUPT_INTR 13
-#define XPAR_DCR_INTC_0_OPB_PCI_REF_0_INTR_OUT_INTR 14
-#define XPAR_DCR_INTC_0_PLB2OPB_BRIDGE_0_BUS_ERROR_DET_INTR 15
-#define XPAR_DCR_INTC_0_PLB_V34_0_BUS_ERROR_DET_INTR 16
-#define XPAR_DCR_INTC_0_OPB2PLB_BRIDGE_0_BUS_ERROR_DET_INTR 17
-
-/******************************************************************/
-
-#define XPAR_XTFT_NUM_INSTANCES 1
-#define XPAR_PLB_TFT_CNTLR_REF_0_DCR_BASEADDR 0xD0000200
-#define XPAR_PLB_TFT_CNTLR_REF_0_DCR_HIGHADDR 0xD0000207
-#define XPAR_PLB_TFT_CNTLR_REF_0_DEVICE_ID 0
-
-/******************************************************************/
-
-#define XPAR_XSYSACE_MEM_WIDTH 8
-#define XPAR_XSYSACE_NUM_INSTANCES 1
-#define XPAR_OPB_SYSACE_0_BASEADDR 0xCF000000
-#define XPAR_OPB_SYSACE_0_HIGHADDR 0xCF0001FF
-#define XPAR_OPB_SYSACE_0_DEVICE_ID 0
-#define XPAR_OPB_SYSACE_0_MEM_WIDTH 8
-
-/******************************************************************/
-
-#define XPAR_CPU_PPC405_CORE_CLOCK_FREQ_HZ 300000000
-
-/******************************************************************/
diff --git a/board/xilinx/xilinx_enet/emac_adapter.c b/board/xilinx/xilinx_enet/emac_adapter.c
deleted file mode 100644
index 1076345752..0000000000
--- a/board/xilinx/xilinx_enet/emac_adapter.c
+++ /dev/null
@@ -1,158 +0,0 @@
-/******************************************************************************
-*
-* Author: Xilinx, Inc.
-*
-*
-* This program is free software; you can redistribute it and/or modify it
-* under the terms of the GNU General Public License as published by the
-* Free Software Foundation; either version 2 of the License, or (at your
-* option) any later version.
-*
-*
-* XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A
-* COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS
-* ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD,
-* XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE
-* FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING
-* ANY THIRD PARTY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.
-* XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO
-* THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY
-* WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM
-* CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND
-* FITNESS FOR A PARTICULAR PURPOSE.
-*
-*
-* Xilinx hardware products are not intended for use in life support
-* appliances, devices, or systems. Use in such applications is
-* expressly prohibited.
-*
-*
-* (c) Copyright 2002-2004 Xilinx Inc.
-* All rights reserved.
-*
-*
-* You should have received a copy of the GNU General Public License along
-* with this program; if not, write to the Free Software Foundation, Inc.,
-* 675 Mass Ave, Cambridge, MA 02139, USA.
-*
-******************************************************************************/
-
-#include <common.h>
-#include <net.h>
-#include <configs/ml300.h>
-#include "xparameters.h"
-#include "xemac.h"
-
-#if defined(XPAR_EMAC_0_DEVICE_ID)
-/*
- * ENET_MAX_MTU and ENET_MAX_MTU_ALIGNED are set from
- * PKTSIZE and PKTSIZE_ALIGN (include/net.h)
- */
-
-#define ENET_MAX_MTU PKTSIZE
-#define ENET_MAX_MTU_ALIGNED PKTSIZE_ALIGN
-#define ENET_ADDR_LENGTH 6
-
-static XEmac Emac;
-static char etherrxbuff[PKTSIZE_ALIGN]; /* Receive buffer */
-
-/* hardcoded MAC address for the Xilinx EMAC Core when env is nowhere*/
-#ifdef CFG_ENV_IS_NOWHERE
-static u8 EMACAddr[ENET_ADDR_LENGTH] = { 0x00, 0x0a, 0x35, 0x00, 0x22, 0x01 };
-#endif
-
-static int initialized = 0;
-
-void
-eth_halt(void)
-{
- if (initialized)
- (void) XEmac_Stop(&Emac);
-}
-
-int
-eth_init(bd_t * bis)
-{
- u32 Options;
- XStatus Result;
-
-#ifdef DEBUG
- printf("EMAC Initialization Started\n\r");
-#endif
-
- Result = XEmac_Initialize(&Emac, XPAR_EMAC_0_DEVICE_ID);
- if (Result != XST_SUCCESS) {
- return 0;
- }
-
- /* make sure the Emac is stopped before it is started */
- (void) XEmac_Stop(&Emac);
-
-#ifdef CFG_ENV_IS_NOWHERE
- memcpy(bis->bi_enetaddr, EMACAddr, 6);
-#endif
-
- Result = XEmac_SetMacAddress(&Emac, bis->bi_enetaddr);
- if (Result != XST_SUCCESS) {
- return 0;
- }
-
- Options =
- (XEM_POLLED_OPTION | XEM_UNICAST_OPTION | XEM_BROADCAST_OPTION |
- XEM_FDUPLEX_OPTION | XEM_INSERT_FCS_OPTION |
- XEM_INSERT_PAD_OPTION);
- Result = XEmac_SetOptions(&Emac, Options);
- if (Result != XST_SUCCESS) {
- return 0;
- }
-
- Result = XEmac_Start(&Emac);
- if (Result != XST_SUCCESS) {
- return 0;
- }
-#ifdef DEBUG
- printf("EMAC Initialization complete\n\r");
-#endif
-
- initialized = 1;
-
- return (0);
-}
-
-/*-----------------------------------------------------------------------------+
-+-----------------------------------------------------------------------------*/
-int
-eth_send(volatile void *ptr, int len)
-{
- XStatus Result;
-
- if (len > ENET_MAX_MTU)
- len = ENET_MAX_MTU;
-
- Result = XEmac_PollSend(&Emac, (u8 *) ptr, len);
- if (Result == XST_SUCCESS) {
- return (1);
- } else {
- printf("Error while sending frame\n\r");
- return (0);
- }
-
-}
-
-int
-eth_rx(void)
-{
- u32 RecvFrameLength;
- XStatus Result;
-
- RecvFrameLength = PKTSIZE;
- Result = XEmac_PollRecv(&Emac, (u8 *) etherrxbuff, &RecvFrameLength);
- if (Result == XST_SUCCESS) {
- NetReceive((uchar)etherrxbuff, RecvFrameLength);
- return (1);
- } else {
- return (0);
- }
-}
-
-#endif
diff --git a/board/xilinx/xilinx_enet/xemac.c b/board/xilinx/xilinx_enet/xemac.c
deleted file mode 100644
index 48b4ede704..0000000000
--- a/board/xilinx/xilinx_enet/xemac.c
+++ /dev/null
@@ -1,844 +0,0 @@
-/******************************************************************************
-*
-* Author: Xilinx, Inc.
-*
-*
-* This program is free software; you can redistribute it and/or modify it
-* under the terms of the GNU General Public License as published by the
-* Free Software Foundation; either version 2 of the License, or (at your
-* option) any later version.
-*
-*
-* XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A
-* COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS
-* ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD,
-* XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE
-* FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING
-* ANY THIRD PARTY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.
-* XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO
-* THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY
-* WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM
-* CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND
-* FITNESS FOR A PARTICULAR PURPOSE.
-*
-*
-* Xilinx hardware products are not intended for use in life support
-* appliances, devices, or systems. Use in such applications is
-* expressly prohibited.
-*
-*
-* (c) Copyright 2002-2004 Xilinx Inc.
-* All rights reserved.
-*
-*
-* You should have received a copy of the GNU General Public License along
-* with this program; if not, write to the Free Software Foundation, Inc.,
-* 675 Mass Ave, Cambridge, MA 02139, USA.
-*
-******************************************************************************/
-/*****************************************************************************/
-/**
-*
-* @file xemac.c
-*
-* The XEmac driver. Functions in this file are the minimum required functions
-* for this driver. See xemac.h for a detailed description of the driver.
-*
-* <pre>
-* MODIFICATION HISTORY:
-*
-* Ver Who Date Changes
-* ----- ---- -------- -------------------------------------------------------
-* 1.00a rpm 07/31/01 First release
-* 1.00b rpm 02/20/02 Repartitioned files and functions
-* 1.00b rpm 07/23/02 Removed the PHY reset from Initialize()
-* 1.00b rmm 09/23/02 Removed commented code in Initialize(). Recycled as
-* XEmac_mPhyReset macro in xemac_l.h.
-* 1.00c rpm 12/05/02 New version includes support for simple DMA
-* 1.00c rpm 12/12/02 Changed location of IsStarted assignment in XEmac_Start
-* to be sure the flag is set before the device and
-* interrupts are enabled.
-* 1.00c rpm 02/03/03 SelfTest was not clearing polled mode. Take driver out
-* of polled mode in XEmac_Reset() to fix this problem.
-* 1.00c rmm 05/13/03 Fixed diab compiler warnings relating to asserts.
-* </pre>
-******************************************************************************/
-
-/***************************** Include Files *********************************/
-
-#include "xbasic_types.h"
-#include "xemac_i.h"
-#include "xio.h"
-#include "xipif_v1_23_b.h" /* Uses v1.23b of the IPIF */
-
-/************************** Constant Definitions *****************************/
-
-/**************************** Type Definitions *******************************/
-
-/***************** Macros (Inline Functions) Definitions *********************/
-
-/************************** Function Prototypes ******************************/
-
-static XStatus ConfigureDma(XEmac * InstancePtr);
-static XStatus ConfigureFifo(XEmac * InstancePtr);
-static void StubFifoHandler(void *CallBackRef);
-static void StubErrorHandler(void *CallBackRef, XStatus ErrorCode);
-static void StubSgHandler(void *CallBackRef, XBufDescriptor * BdPtr,
- u32 NumBds);
-
-/************************** Variable Definitions *****************************/
-
-/*****************************************************************************/
-/**
-*
-* Initialize a specific XEmac instance/driver. The initialization entails:
-* - Initialize fields of the XEmac structure
-* - Clear the Ethernet statistics for this device
-* - Initialize the IPIF component with its register base address
-* - Configure the FIFO components with their register base addresses.
-* - If the device is configured with DMA, configure the DMA channel components
-* with their register base addresses. At some later time, memory pools for
-* the scatter-gather descriptor lists may be passed to the driver.
-* - Reset the Ethernet MAC
-*
-* @param InstancePtr is a pointer to the XEmac instance to be worked on.
-* @param DeviceId is the unique id of the device controlled by this XEmac
-* instance. Passing in a device id associates the generic XEmac
-* instance to a specific device, as chosen by the caller or application
-* developer.
-*
-* @return
-*
-* - XST_SUCCESS if initialization was successful
-* - XST_DEVICE_IS_STARTED if the device has already been started
-* - XST_DEVICE_NOT_FOUND if device configuration information was not found for
-* a device with the supplied device ID.
-*
-* @note
-*
-* None.
-*
-******************************************************************************/
-XStatus
-XEmac_Initialize(XEmac * InstancePtr, u16 DeviceId)
-{
- XStatus Result;
- XEmac_Config *ConfigPtr; /* configuration information */
-
- XASSERT_NONVOID(InstancePtr != NULL);
-
- /*
- * If the device is started, disallow the initialize and return a status
- * indicating it is started. This allows the user to stop the device
- * and reinitialize, but prevents a user from inadvertently initializing
- */
- if (InstancePtr->IsStarted == XCOMPONENT_IS_STARTED) {
- return XST_DEVICE_IS_STARTED;
- }
-
- /*
- * Lookup the device configuration in the temporary CROM table. Use this
- * configuration info down below when initializing this component.
- */
- ConfigPtr = XEmac_LookupConfig(DeviceId);
- if (ConfigPtr == NULL) {
- return XST_DEVICE_NOT_FOUND;
- }
-
- /*
- * Set some default values
- */
- InstancePtr->IsReady = 0;
- InstancePtr->IsStarted = 0;
- InstancePtr->IpIfDmaConfig = ConfigPtr->IpIfDmaConfig;
- InstancePtr->HasMii = ConfigPtr->HasMii;
- InstancePtr->HasMulticastHash = FALSE;
-
- /* Always default polled to false, let user configure this mode */
- InstancePtr->IsPolled = FALSE;
- InstancePtr->FifoRecvHandler = StubFifoHandler;
- InstancePtr->FifoSendHandler = StubFifoHandler;
- InstancePtr->ErrorHandler = StubErrorHandler;
- InstancePtr->SgRecvHandler = StubSgHandler;
- InstancePtr->SgSendHandler = StubSgHandler;
-
- /*
- * Clear the statistics for this driver
- */
- XEmac_mClearStruct((u8 *) & InstancePtr->Stats, sizeof (XEmac_Stats));
-
- /*
- * Initialize the device register base addresses
- */
- InstancePtr->BaseAddress = ConfigPtr->BaseAddress;
-
- /*
- * Configure the send and receive FIFOs in the MAC
- */
- Result = ConfigureFifo(InstancePtr);
- if (Result != XST_SUCCESS) {
- return Result;
- }
-
- /*
- * If the device is configured for DMA, configure the send and receive DMA
- * channels in the MAC.
- */
- if (XEmac_mIsDma(InstancePtr)) {
- Result = ConfigureDma(InstancePtr);
- if (Result != XST_SUCCESS) {
- return Result;
- }
- }
-
- /*
- * Indicate the component is now ready to use. Note that this is done before
- * we reset the device and the PHY below, which may seem a bit odd. The
- * choice was made to move it here rather than remove the asserts in various
- * functions (e.g., Reset() and all functions that it calls). Applications
- * that use multiple threads, one to initialize the XEmac driver and one
- * waiting on the IsReady condition could have a problem with this sequence.
- */
- InstancePtr->IsReady = XCOMPONENT_IS_READY;
-
- /*
- * Reset the MAC to get it into its initial state. It is expected that
- * device configuration by the user will take place after this
- * initialization is done, but before the device is started.
- */
- XEmac_Reset(InstancePtr);
-
- return XST_SUCCESS;
-}
-
-/*****************************************************************************/
-/**
-*
-* Start the Ethernet controller as follows:
-* - If not in polled mode
-* - Set the internal interrupt enable registers appropriately
-* - Enable interrupts within the device itself. Note that connection of
-* the driver's interrupt handler to the interrupt source (typically
-* done using the interrupt controller component) is done by the higher
-* layer software.
-* - If the device is configured with scatter-gather DMA, start the DMA
-* channels if the descriptor lists are not empty
-* - Enable the transmitter
-* - Enable the receiver
-*
-* The PHY is enabled after driver initialization. We assume the upper layer
-* software has configured it and the EMAC appropriately before this function
-* is called.
-*
-* @param InstancePtr is a pointer to the XEmac instance to be worked on.
-*
-* @return
-*
-* - XST_SUCCESS if the device was started successfully
-* - XST_NO_CALLBACK if a callback function has not yet been registered using
-* the SetxxxHandler function. This is required if in interrupt mode.
-* - XST_DEVICE_IS_STARTED if the device is already started
-* - XST_DMA_SG_NO_LIST if configured for scatter-gather DMA and a descriptor
-* list has not yet been created for the send or receive channel.
-*
-* @note
-*
-* The driver tries to match the hardware configuration. So if the hardware
-* is configured with scatter-gather DMA, the driver expects to start the
-* scatter-gather channels and expects that the user has set up the buffer
-* descriptor lists already. If the user expects to use the driver in a mode
-* different than how the hardware is configured, the user should modify the
-* configuration table to reflect the mode to be used. Modifying the config
-* table is a workaround for now until we get some experience with how users
-* are intending to use the hardware in its different configurations. For
-* example, if the hardware is built with scatter-gather DMA but the user is
-* intending to use only simple DMA, the user either needs to modify the config
-* table as a workaround or rebuild the hardware with only simple DMA.
-*
-* This function makes use of internal resources that are shared between the
-* Start, Stop, and SetOptions functions. So if one task might be setting device
-* options while another is trying to start the device, the user is required to
-* provide protection of this shared data (typically using a semaphore).
-*
-******************************************************************************/
-XStatus
-XEmac_Start(XEmac * InstancePtr)
-{
- u32 ControlReg;
- XStatus Result;
-
- XASSERT_NONVOID(InstancePtr != NULL);
- XASSERT_NONVOID(InstancePtr->IsReady == XCOMPONENT_IS_READY);
-
- /*
- * If it is already started, return a status indicating so
- */
- if (InstancePtr->IsStarted == XCOMPONENT_IS_STARTED) {
- return XST_DEVICE_IS_STARTED;
- }
-
- /*
- * If not polled, enable interrupts
- */
- if (!InstancePtr->IsPolled) {
- /*
- * Verify that the callbacks have been registered, then enable
- * interrupts
- */
- if (XEmac_mIsSgDma(InstancePtr)) {
- if ((InstancePtr->SgRecvHandler == StubSgHandler) ||
- (InstancePtr->SgSendHandler == StubSgHandler)) {
- return XST_NO_CALLBACK;
- }
-
- /* Enable IPIF interrupts */
- XIIF_V123B_WRITE_DIER(InstancePtr->BaseAddress,
- XEM_IPIF_DMA_DFT_MASK |
- XIIF_V123B_ERROR_MASK);
- XIIF_V123B_WRITE_IIER(InstancePtr->BaseAddress,
- XEM_EIR_DFT_SG_MASK);
-
- /* Enable scatter-gather DMA interrupts */
- XDmaChannel_SetIntrEnable(&InstancePtr->RecvChannel,
- XEM_DMA_SG_INTR_MASK);
- XDmaChannel_SetIntrEnable(&InstancePtr->SendChannel,
- XEM_DMA_SG_INTR_MASK);
- } else {
- if ((InstancePtr->FifoRecvHandler == StubFifoHandler) ||
- (InstancePtr->FifoSendHandler == StubFifoHandler)) {
- return XST_NO_CALLBACK;
- }
-
- /* Enable IPIF interrupts (used by simple DMA also) */
- XIIF_V123B_WRITE_DIER(InstancePtr->BaseAddress,
- XEM_IPIF_FIFO_DFT_MASK |
- XIIF_V123B_ERROR_MASK);
- XIIF_V123B_WRITE_IIER(InstancePtr->BaseAddress,
- XEM_EIR_DFT_FIFO_MASK);
- }
-
- /* Enable the global IPIF interrupt output */
- XIIF_V123B_GINTR_ENABLE(InstancePtr->BaseAddress);
- }
-
- /*
- * Indicate that the device is started before we enable the transmitter
- * or receiver. This needs to be done before because as soon as the
- * receiver is enabled we may get an interrupt, and there are functions
- * in the interrupt handling path that rely on the IsStarted flag.
- */
- InstancePtr->IsStarted = XCOMPONENT_IS_STARTED;
-
- /*
- * Enable the transmitter, and receiver (do a read/modify/write to preserve
- * current settings). There is no critical section here since this register
- * is not modified during interrupt context.
- */
- ControlReg = XIo_In32(InstancePtr->BaseAddress + XEM_ECR_OFFSET);
- ControlReg &= ~(XEM_ECR_XMIT_RESET_MASK | XEM_ECR_RECV_RESET_MASK);
- ControlReg |= (XEM_ECR_XMIT_ENABLE_MASK | XEM_ECR_RECV_ENABLE_MASK);
-
- XIo_Out32(InstancePtr->BaseAddress + XEM_ECR_OFFSET, ControlReg);
-
- /*
- * If configured with scatter-gather DMA and not polled, restart the
- * DMA channels in case there are buffers ready to be sent or received into.
- * The DMA SgStart function uses data that can be modified during interrupt
- * context, so a critical section is required here.
- */
- if ((XEmac_mIsSgDma(InstancePtr)) && (!InstancePtr->IsPolled)) {
- XIIF_V123B_GINTR_DISABLE(InstancePtr->BaseAddress);
-
- /*
- * The only error we care about is if the list has not yet been
- * created, or on receive, if no buffer descriptors have been
- * added yet (the list is empty). Other errors are benign at this point.
- */
- Result = XDmaChannel_SgStart(&InstancePtr->RecvChannel);
- if ((Result == XST_DMA_SG_NO_LIST)
- || (Result == XST_DMA_SG_LIST_EMPTY)) {
- XIIF_V123B_GINTR_ENABLE(InstancePtr->BaseAddress);
- return Result;
- }
-
- Result = XDmaChannel_SgStart(&InstancePtr->SendChannel);
- if (Result == XST_DMA_SG_NO_LIST) {
- XIIF_V123B_GINTR_ENABLE(InstancePtr->BaseAddress);
- return Result;
- }
-
- XIIF_V123B_GINTR_ENABLE(InstancePtr->BaseAddress);
- }
-
- return XST_SUCCESS;
-}
-
-/*****************************************************************************/
-/**
-*
-* Stop the Ethernet MAC as follows:
-* - If the device is configured with scatter-gather DMA, stop the DMA
-* channels (wait for acknowledgment of stop)
-* - Disable the transmitter and receiver
-* - Disable interrupts if not in polled mode (the higher layer software is
-* responsible for disabling interrupts at the interrupt controller)
-*
-* The PHY is left enabled after a Stop is called.
-*
-* If the device is configured for scatter-gather DMA, the DMA engine stops at
-* the next buffer descriptor in its list. The remaining descriptors in the list
-* are not removed, so anything in the list will be transmitted or received when
-* the device is restarted. The side effect of doing this is that the last
-* buffer descriptor processed by the DMA engine before stopping may not be the
-* last descriptor in the Ethernet frame. So when the device is restarted, a
-* partial frame (i.e., a bad frame) may be transmitted/received. This is only a
-* concern if a frame can span multiple buffer descriptors, which is dependent
-* on the size of the network buffers.
-*
-* @param InstancePtr is a pointer to the XEmac instance to be worked on.
-*
-* @return
-*
-* - XST_SUCCESS if the device was stopped successfully
-* - XST_DEVICE_IS_STOPPED if the device is already stopped
-*
-* @note
-*
-* This function makes use of internal resources that are shared between the
-* Start, Stop, and SetOptions functions. So if one task might be setting device
-* options while another is trying to start the device, the user is required to
-* provide protection of this shared data (typically using a semaphore).
-*
-******************************************************************************/
-XStatus
-XEmac_Stop(XEmac * InstancePtr)
-{
- u32 ControlReg;
-
- XASSERT_NONVOID(InstancePtr != NULL);
- XASSERT_NONVOID(InstancePtr->IsReady == XCOMPONENT_IS_READY);
-
- /*
- * If the device is already stopped, do nothing but return a status
- * indicating so
- */
- if (InstancePtr->IsStarted != XCOMPONENT_IS_STARTED) {
- return XST_DEVICE_IS_STOPPED;
- }
-
- /*
- * If configured for scatter-gather DMA, stop the DMA channels. Ignore
- * the XST_DMA_SG_IS_STOPPED return code. There is a critical section
- * here between SgStart and SgStop, and SgStart can be called in interrupt
- * context, so disable interrupts while calling SgStop.
- */
- if (XEmac_mIsSgDma(InstancePtr)) {
- XBufDescriptor *BdTemp; /* temporary descriptor pointer */
-
- XIIF_V123B_GINTR_DISABLE(InstancePtr->BaseAddress);
-
- (void) XDmaChannel_SgStop(&InstancePtr->SendChannel, &BdTemp);
- (void) XDmaChannel_SgStop(&InstancePtr->RecvChannel, &BdTemp);
-
- XIIF_V123B_GINTR_ENABLE(InstancePtr->BaseAddress);
- }
-
- /*
- * Disable the transmitter and receiver. There is no critical section
- * here since this register is not modified during interrupt context.
- */
- ControlReg = XIo_In32(InstancePtr->BaseAddress + XEM_ECR_OFFSET);
- ControlReg &= ~(XEM_ECR_XMIT_ENABLE_MASK | XEM_ECR_RECV_ENABLE_MASK);
- XIo_Out32(InstancePtr->BaseAddress + XEM_ECR_OFFSET, ControlReg);
-
- /*
- * If not in polled mode, disable interrupts for IPIF (includes MAC and
- * DMAs)
- */
- if (!InstancePtr->IsPolled) {
- XIIF_V123B_GINTR_DISABLE(InstancePtr->BaseAddress);
- }
-
- InstancePtr->IsStarted = 0;
-
- return XST_SUCCESS;
-}
-
-/*****************************************************************************/
-/**
-*
-* Reset the Ethernet MAC. This is a graceful reset in that the device is stopped
-* first. Resets the DMA channels, the FIFOs, the transmitter, and the receiver.
-* The PHY is not reset. Any frames in the scatter-gather descriptor lists will
-* remain in the lists. The side effect of doing this is that after a reset and
-* following a restart of the device, frames that were in the list before the
-* reset may be transmitted or received. Reset must only be called after the
-* driver has been initialized.
-*
-* The driver is also taken out of polled mode if polled mode was set. The user
-* is responsbile for re-configuring the driver into polled mode after the
-* reset if desired.
-*
-* The configuration after this reset is as follows:
-* - Half duplex
-* - Disabled transmitter and receiver
-* - Enabled PHY (the PHY is not reset)
-* - MAC transmitter does pad insertion, FCS insertion, and source address
-* overwrite.
-* - MAC receiver does not strip padding or FCS
-* - Interframe Gap as recommended by IEEE Std. 802.3 (96 bit times)
-* - Unicast addressing enabled
-* - Broadcast addressing enabled
-* - Multicast addressing disabled (addresses are preserved)
-* - Promiscuous addressing disabled
-* - Default packet threshold and packet wait bound register values for
-* scatter-gather DMA operation
-* - MAC address of all zeros
-* - Non-polled mode
-*
-* The upper layer software is responsible for re-configuring (if necessary)
-* and restarting the MAC after the reset. Note that the PHY is not reset. PHY
-* control is left to the upper layer software. Note also that driver statistics
-* are not cleared on reset. It is up to the upper layer software to clear the
-* statistics if needed.
-*
-* When a reset is required due to an internal error, the driver notifies the
-* upper layer software of this need through the ErrorHandler callback and
-* specific status codes. The upper layer software is responsible for calling
-* this Reset function and then re-configuring the device.
-*
-* @param InstancePtr is a pointer to the XEmac instance to be worked on.
-*
-* @return
-*
-* None.
-*
-* @note
-*
-* None.
-*
-* @internal
-*
-* The reset is accomplished by setting the IPIF reset register. This takes
-* care of resetting all hardware blocks, including the MAC.
-*
-******************************************************************************/
-void
-XEmac_Reset(XEmac * InstancePtr)
-{
- XASSERT_VOID(InstancePtr != NULL);
- XASSERT_VOID(InstancePtr->IsReady == XCOMPONENT_IS_READY);
-
- /*
- * Stop the device first
- */
- (void) XEmac_Stop(InstancePtr);
-
- /*
- * Take the driver out of polled mode
- */
- InstancePtr->IsPolled = FALSE;
-
- /*
- * Reset the entire IPIF at once. If we choose someday to reset each
- * hardware block separately, the reset should occur in the direction of
- * data flow. For example, for the send direction the reset order is DMA
- * first, then FIFO, then the MAC transmitter.
- */
- XIIF_V123B_RESET(InstancePtr->BaseAddress);
-
- if (XEmac_mIsSgDma(InstancePtr)) {
- /*
- * After reset, configure the scatter-gather DMA packet threshold and
- * packet wait bound registers to default values. Ignore the return
- * values of these functions since they only return error if the device
- * is not stopped.
- */
- (void) XEmac_SetPktThreshold(InstancePtr, XEM_SEND,
- XEM_SGDMA_DFT_THRESHOLD);
- (void) XEmac_SetPktThreshold(InstancePtr, XEM_RECV,
- XEM_SGDMA_DFT_THRESHOLD);
- (void) XEmac_SetPktWaitBound(InstancePtr, XEM_SEND,
- XEM_SGDMA_DFT_WAITBOUND);
- (void) XEmac_SetPktWaitBound(InstancePtr, XEM_RECV,
- XEM_SGDMA_DFT_WAITBOUND);
- }
-}
-
-/*****************************************************************************/
-/**
-*
-* Set the MAC address for this driver/device. The address is a 48-bit value.
-* The device must be stopped before calling this function.
-*
-* @param InstancePtr is a pointer to the XEmac instance to be worked on.
-* @param AddressPtr is a pointer to a 6-byte MAC address.
-*
-* @return
-*
-* - XST_SUCCESS if the MAC address was set successfully
-* - XST_DEVICE_IS_STARTED if the device has not yet been stopped
-*
-* @note
-*
-* None.
-*
-******************************************************************************/
-XStatus
-XEmac_SetMacAddress(XEmac * InstancePtr, u8 * AddressPtr)
-{
- u32 MacAddr = 0;
-
- XASSERT_NONVOID(InstancePtr != NULL);
- XASSERT_NONVOID(AddressPtr != NULL);
- XASSERT_NONVOID(InstancePtr->IsReady == XCOMPONENT_IS_READY);
-
- /*
- * The device must be stopped before setting the MAC address
- */
- if (InstancePtr->IsStarted == XCOMPONENT_IS_STARTED) {
- return XST_DEVICE_IS_STARTED;
- }
-
- /*
- * Set the device station address high and low registers
- */
- MacAddr = (AddressPtr[0] << 8) | AddressPtr[1];
- XIo_Out32(InstancePtr->BaseAddress + XEM_SAH_OFFSET, MacAddr);
-
- MacAddr = (AddressPtr[2] << 24) | (AddressPtr[3] << 16) |
- (AddressPtr[4] << 8) | AddressPtr[5];
-
- XIo_Out32(InstancePtr->BaseAddress + XEM_SAL_OFFSET, MacAddr);
-
- return XST_SUCCESS;
-}
-
-/*****************************************************************************/
-/**
-*
-* Get the MAC address for this driver/device.
-*
-* @param InstancePtr is a pointer to the XEmac instance to be worked on.
-* @param BufferPtr is an output parameter, and is a pointer to a buffer into
-* which the current MAC address will be copied. The buffer must be at
-* least 6 bytes.
-*
-* @return
-*
-* None.
-*
-* @note
-*
-* None.
-*
-******************************************************************************/
-void
-XEmac_GetMacAddress(XEmac * InstancePtr, u8 * BufferPtr)
-{
- u32 MacAddrHi;
- u32 MacAddrLo;
-
- XASSERT_VOID(InstancePtr != NULL);
- XASSERT_VOID(BufferPtr != NULL);
- XASSERT_VOID(InstancePtr->IsReady == XCOMPONENT_IS_READY);
-
- MacAddrHi = XIo_In32(InstancePtr->BaseAddress + XEM_SAH_OFFSET);
- MacAddrLo = XIo_In32(InstancePtr->BaseAddress + XEM_SAL_OFFSET);
-
- BufferPtr[0] = (u8) (MacAddrHi >> 8);
- BufferPtr[1] = (u8) MacAddrHi;
- BufferPtr[2] = (u8) (MacAddrLo >> 24);
- BufferPtr[3] = (u8) (MacAddrLo >> 16);
- BufferPtr[4] = (u8) (MacAddrLo >> 8);
- BufferPtr[5] = (u8) MacAddrLo;
-}
-
-/******************************************************************************/
-/**
-*
-* Configure DMA capabilities.
-*
-* @param InstancePtr is a pointer to the XEmac instance to be worked on.
-*
-* @return
-*
-* - XST_SUCCESS if successful initialization of DMA
-*
-* @note
-*
-* None.
-*
-******************************************************************************/
-static XStatus
-ConfigureDma(XEmac * InstancePtr)
-{
- XStatus Result;
-
- /*
- * Initialize the DMA channels with their base addresses. We assume
- * scatter-gather DMA is the only possible configuration. Descriptor space
- * will need to be set later by the upper layer.
- */
- Result = XDmaChannel_Initialize(&InstancePtr->RecvChannel,
- InstancePtr->BaseAddress +
- XEM_DMA_RECV_OFFSET);
- if (Result != XST_SUCCESS) {
- return Result;
- }
-
- Result = XDmaChannel_Initialize(&InstancePtr->SendChannel,
- InstancePtr->BaseAddress +
- XEM_DMA_SEND_OFFSET);
-
- return Result;
-}
-
-/******************************************************************************/
-/**
-*
-* Configure the send and receive FIFO components with their base addresses
-* and interrupt masks. Currently the base addresses are defined constants.
-*
-* @param InstancePtr is a pointer to the XEmac instance to be worked on.
-*
-* @return
-*
-* XST_SUCCESS if successful initialization of the packet FIFOs
-*
-* @note
-*
-* None.
-*
-******************************************************************************/
-static XStatus
-ConfigureFifo(XEmac * InstancePtr)
-{
- XStatus Result;
-
- /*
- * Return status from the packet FIFOs initialization is ignored since
- * they always return success.
- */
- Result = XPacketFifoV100b_Initialize(&InstancePtr->RecvFifo,
- InstancePtr->BaseAddress +
- XEM_PFIFO_RXREG_OFFSET,
- InstancePtr->BaseAddress +
- XEM_PFIFO_RXDATA_OFFSET);
- if (Result != XST_SUCCESS) {
- return Result;
- }
-
- Result = XPacketFifoV100b_Initialize(&InstancePtr->SendFifo,
- InstancePtr->BaseAddress +
- XEM_PFIFO_TXREG_OFFSET,
- InstancePtr->BaseAddress +
- XEM_PFIFO_TXDATA_OFFSET);
- return Result;
-}
-
-/******************************************************************************/
-/**
-*
-* This is a stub for the scatter-gather send and recv callbacks. The stub
-* is here in case the upper layers forget to set the handlers.
-*
-* @param CallBackRef is a pointer to the upper layer callback reference
-* @param BdPtr is a pointer to the first buffer descriptor in a list
-* @param NumBds is the number of descriptors in the list.
-*
-* @return
-*
-* None.
-*
-* @note
-*
-* None.
-*
-******************************************************************************/
-static void
-StubSgHandler(void *CallBackRef, XBufDescriptor * BdPtr, u32 NumBds)
-{
- XASSERT_VOID_ALWAYS();
-}
-
-/******************************************************************************/
-/**
-*
-* This is a stub for the non-DMA send and recv callbacks. The stub is here in
-* case the upper layers forget to set the handlers.
-*
-* @param CallBackRef is a pointer to the upper layer callback reference
-*
-* @return
-*
-* None.
-*
-* @note
-*
-* None.
-*
-******************************************************************************/
-static void
-StubFifoHandler(void *CallBackRef)
-{
- XASSERT_VOID_ALWAYS();
-}
-
-/******************************************************************************/
-/**
-*
-* This is a stub for the asynchronous error callback. The stub is here in
-* case the upper layers forget to set the handler.
-*
-* @param CallBackRef is a pointer to the upper layer callback reference
-* @param ErrorCode is the Xilinx error code, indicating the cause of the error
-*
-* @return
-*
-* None.
-*
-* @note
-*
-* None.
-*
-******************************************************************************/
-static void
-StubErrorHandler(void *CallBackRef, XStatus ErrorCode)
-{
- XASSERT_VOID_ALWAYS();
-}
-
-/*****************************************************************************/
-/**
-*
-* Lookup the device configuration based on the unique device ID. The table
-* EmacConfigTable contains the configuration info for each device in the system.
-*
-* @param DeviceId is the unique device ID of the device being looked up.
-*
-* @return
-*
-* A pointer to the configuration table entry corresponding to the given
-* device ID, or NULL if no match is found.
-*
-* @note
-*
-* None.
-*
-******************************************************************************/
-XEmac_Config *
-XEmac_LookupConfig(u16 DeviceId)
-{
- XEmac_Config *CfgPtr = NULL;
- int i;
-
- for (i = 0; i < XPAR_XEMAC_NUM_INSTANCES; i++) {
- if (XEmac_ConfigTable[i].DeviceId == DeviceId) {
- CfgPtr = &XEmac_ConfigTable[i];
- break;
- }
- }
-
- return CfgPtr;
-}
diff --git a/board/xilinx/xilinx_enet/xemac.h b/board/xilinx/xilinx_enet/xemac.h
deleted file mode 100644
index ed704bf29b..0000000000
--- a/board/xilinx/xilinx_enet/xemac.h
+++ /dev/null
@@ -1,673 +0,0 @@
-/******************************************************************************
-*
-* Author: Xilinx, Inc.
-*
-*
-* This program is free software; you can redistribute it and/or modify it
-* under the terms of the GNU General Public License as published by the
-* Free Software Foundation; either version 2 of the License, or (at your
-* option) any later version.
-*
-*
-* XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A
-* COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS
-* ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD,
-* XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE
-* FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING
-* ANY THIRD PARTY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.
-* XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO
-* THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY
-* WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM
-* CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND
-* FITNESS FOR A PARTICULAR PURPOSE.
-*
-*
-* Xilinx hardware products are not intended for use in life support
-* appliances, devices, or systems. Use in such applications is
-* expressly prohibited.
-*
-*
-* (c) Copyright 2002-2004 Xilinx Inc.
-* All rights reserved.
-*
-*
-* You should have received a copy of the GNU General Public License along
-* with this program; if not, write to the Free Software Foundation, Inc.,
-* 675 Mass Ave, Cambridge, MA 02139, USA.
-*
-******************************************************************************/
-/*****************************************************************************/
-/**
-*
-* @file xemac.h
-*
-* The Xilinx Ethernet driver component. This component supports the Xilinx
-* Ethernet 10/100 MAC (EMAC).
-*
-* The Xilinx Ethernet 10/100 MAC supports the following features:
-* - Simple and scatter-gather DMA operations, as well as simple memory
-* mapped direct I/O interface (FIFOs).
-* - Media Independent Interface (MII) for connection to external
-* 10/100 Mbps PHY transceivers.
-* - MII management control reads and writes with MII PHYs
-* - Independent internal transmit and receive FIFOs
-* - CSMA/CD compliant operations for half-duplex modes
-* - Programmable PHY reset signal
-* - Unicast, broadcast, and promiscuous address filtering (no multicast yet)
-* - Internal loopback
-* - Automatic source address insertion or overwrite (programmable)
-* - Automatic FCS insertion and stripping (programmable)
-* - Automatic pad insertion and stripping (programmable)
-* - Pause frame (flow control) detection in full-duplex mode
-* - Programmable interframe gap
-* - VLAN frame support.
-* - Pause frame support
-*
-* The device driver supports all the features listed above.
-*
-* <b>Driver Description</b>
-*
-* The device driver enables higher layer software (e.g., an application) to
-* communicate to the EMAC. The driver handles transmission and reception of
-* Ethernet frames, as well as configuration of the controller. It does not
-* handle protocol stack functionality such as Link Layer Control (LLC) or the
-* Address Resolution Protocol (ARP). The protocol stack that makes use of the
-* driver handles this functionality. This implies that the driver is simply a
-* pass-through mechanism between a protocol stack and the EMAC. A single device
-* driver can support multiple EMACs.
-*
-* The driver is designed for a zero-copy buffer scheme. That is, the driver will
-* not copy buffers. This avoids potential throughput bottlenecks within the
-* driver.
-*
-* Since the driver is a simple pass-through mechanism between a protocol stack
-* and the EMAC, no assembly or disassembly of Ethernet frames is done at the
-* driver-level. This assumes that the protocol stack passes a correctly
-* formatted Ethernet frame to the driver for transmission, and that the driver
-* does not validate the contents of an incoming frame
-*
-* <b>PHY Communication</b>
-*
-* The driver provides rudimentary read and write functions to allow the higher
-* layer software to access the PHY. The EMAC provides MII registers for the
-* driver to access. This management interface can be parameterized away in the
-* FPGA implementation process. If this is the case, the PHY read and write
-* functions of the driver return XST_NO_FEATURE.
-*
-* External loopback is usually supported at the PHY. It is up to the user to
-* turn external loopback on or off at the PHY. The driver simply provides pass-
-* through functions for configuring the PHY. The driver does not read, write,
-* or reset the PHY on its own. All control of the PHY must be done by the user.
-*
-* <b>Asynchronous Callbacks</b>
-*
-* The driver services interrupts and passes Ethernet frames to the higher layer
-* software through asynchronous callback functions. When using the driver
-* directly (i.e., not with the RTOS protocol stack), the higher layer
-* software must register its callback functions during initialization. The
-* driver requires callback functions for received frames, for confirmation of
-* transmitted frames, and for asynchronous errors.
-*
-* <b>Interrupts</b>
-*
-* The driver has no dependencies on the interrupt controller. The driver
-* provides two interrupt handlers. XEmac_IntrHandlerDma() handles interrupts
-* when the EMAC is configured with scatter-gather DMA. XEmac_IntrHandlerFifo()
-* handles interrupts when the EMAC is configured for direct FIFO I/O or simple
-* DMA. Either of these routines can be connected to the system interrupt
-* controller by the user.
-*
-* <b>Interrupt Frequency</b>
-*
-* When the EMAC is configured with scatter-gather DMA, the frequency of
-* interrupts can be controlled with the interrupt coalescing features of the
-* scatter-gather DMA engine. The frequency of interrupts can be adjusted using
-* the driver API functions for setting the packet count threshold and the packet
-* wait bound values.
-*
-* The scatter-gather DMA engine only interrupts when the packet count threshold
-* is reached, instead of interrupting for each packet. A packet is a generic
-* term used by the scatter-gather DMA engine, and is equivalent to an Ethernet
-* frame in our case.
-*
-* The packet wait bound is a timer value used during interrupt coalescing to
-* trigger an interrupt when not enough packets have been received to reach the
-* packet count threshold.
-*
-* These values can be tuned by the user to meet their needs. If there appear to
-* be interrupt latency problems or delays in packet arrival that are longer than
-* might be expected, the user should verify that the packet count threshold is
-* set low enough to receive interrupts before the wait bound timer goes off.
-*
-* <b>Device Reset</b>
-*
-* Some errors that can occur in the device require a device reset. These errors
-* are listed in the XEmac_SetErrorHandler() function header. The user's error
-* handler is responsible for resetting the device and re-configuring it based on
-* its needs (the driver does not save the current configuration). When
-* integrating into an RTOS, these reset and re-configure obligations are
-* taken care of by the Xilinx adapter software if it exists for that RTOS.
-*
-* <b>Device Configuration</b>
-*
-* The device can be configured in various ways during the FPGA implementation
-* process. Configuration parameters are stored in the xemac_g.c files.
-* A table is defined where each entry contains configuration information
-* for an EMAC device. This information includes such things as the base address
-* of the memory-mapped device, the base addresses of IPIF, DMA, and FIFO modules
-* within the device, and whether the device has DMA, counter registers,
-* multicast support, MII support, and flow control.
-*
-* The driver tries to use the features built into the device. So if, for
-* example, the hardware is configured with scatter-gather DMA, the driver
-* expects to start the scatter-gather channels and expects that the user has set
-* up the buffer descriptor lists already. If the user expects to use the driver
-* in a mode different than how the hardware is configured, the user should
-* modify the configuration table to reflect the mode to be used. Modifying the
-* configuration table is a workaround for now until we get some experience with
-* how users are intending to use the hardware in its different configurations.
-* For example, if the hardware is built with scatter-gather DMA but the user is
-* intending to use only simple DMA, the user either needs to modify the config
-* table as a workaround or rebuild the hardware with only simple DMA. The
-* recommendation at this point is to build the hardware with the features you
-* intend to use. If you're inclined to modify the table, do so before the call
-* to XEmac_Initialize(). Here is a snippet of code that changes a device to
-* simple DMA (the hardware needs to have DMA for this to work of course):
-* <pre>
-* XEmac_Config *ConfigPtr;
-*
-* ConfigPtr = XEmac_LookupConfig(DeviceId);
-* ConfigPtr->IpIfDmaConfig = XEM_CFG_SIMPLE_DMA;
-* </pre>
-*
-* <b>Simple DMA</b>
-*
-* Simple DMA is supported through the FIFO functions, FifoSend and FifoRecv, of
-* the driver (i.e., there is no separate interface for it). The driver makes use
-* of the DMA engine for a simple DMA transfer if the device is configured with
-* DMA, otherwise it uses the FIFOs directly. While the simple DMA interface is
-* therefore transparent to the user, the caching of network buffers is not.
-* If the device is configured with DMA and the FIFO interface is used, the user
-* must ensure that the network buffers are not cached or are cache coherent,
-* since DMA will be used to transfer to and from the Emac device. If the device
-* is configured with DMA and the user really wants to use the FIFOs directly,
-* the user should rebuild the hardware without DMA. If unable to do this, there
-* is a workaround (described above in Device Configuration) to modify the
-* configuration table of the driver to fake the driver into thinking the device
-* has no DMA. A code snippet follows:
-* <pre>
-* XEmac_Config *ConfigPtr;
-*
-* ConfigPtr = XEmac_LookupConfig(DeviceId);
-* ConfigPtr->IpIfDmaConfig = XEM_CFG_NO_DMA;
-* </pre>
-*
-* <b>Asserts</b>
-*
-* Asserts are used within all Xilinx drivers to enforce constraints on argument
-* values. Asserts can be turned off on a system-wide basis by defining, at
-* compile time, the NDEBUG identifier. By default, asserts are turned on and it
-* is recommended that users leave asserts on during development.
-*
-* <b>Building the driver</b>
-*
-* The XEmac driver is composed of several source files. Why so many? This
-* allows the user to build and link only those parts of the driver that are
-* necessary. Since the EMAC hardware can be configured in various ways (e.g.,
-* with or without DMA), the driver too can be built with varying features.
-* For the most part, this means that besides always linking in xemac.c, you
-* link in only the driver functionality you want. Some of the choices you have
-* are polled vs. interrupt, interrupt with FIFOs only vs. interrupt with DMA,
-* self-test diagnostics, and driver statistics. Note that currently the DMA code
-* must be linked in, even if you don't have DMA in the device.
-*
-* @note
-*
-* Xilinx drivers are typically composed of two components, one is the driver
-* and the other is the adapter. The driver is independent of OS and processor
-* and is intended to be highly portable. The adapter is OS-specific and
-* facilitates communication between the driver and an OS.
-* <br><br>
-* This driver is intended to be RTOS and processor independent. It works
-* with physical addresses only. Any needs for dynamic memory management,
-* threads or thread mutual exclusion, virtual memory, or cache control must
-* be satisfied by the layer above this driver.
-*
-* <pre>
-* MODIFICATION HISTORY:
-*
-* Ver Who Date Changes
-* ----- ---- -------- -------------------------------------------------------
-* 1.00a rpm 07/31/01 First release
-* 1.00b rpm 02/20/02 Repartitioned files and functions
-* 1.00b rpm 10/08/02 Replaced HasSgDma boolean with IpifDmaConfig enumerated
-* configuration parameter
-* 1.00c rpm 12/05/02 New version includes support for simple DMA and the delay
-* argument to SgSend
-* 1.00c rpm 02/03/03 The XST_DMA_SG_COUNT_EXCEEDED return code was removed
-* from SetPktThreshold in the internal DMA driver. Also
-* avoided compiler warnings by initializing Result in the
-* DMA interrupt service routines.
-* </pre>
-*
-******************************************************************************/
-
-#ifndef XEMAC_H /* prevent circular inclusions */
-#define XEMAC_H /* by using protection macros */
-
-/***************************** Include Files *********************************/
-
-#include "xbasic_types.h"
-#include "xstatus.h"
-#include "xparameters.h"
-#include "xpacket_fifo_v1_00_b.h" /* Uses v1.00b of Packet Fifo */
-#include "xdma_channel.h"
-
-/************************** Constant Definitions *****************************/
-
-/*
- * Device information
- */
-#define XEM_DEVICE_NAME "xemac"
-#define XEM_DEVICE_DESC "Xilinx Ethernet 10/100 MAC"
-
-/** @name Configuration options
- *
- * Device configuration options (see the XEmac_SetOptions() and
- * XEmac_GetOptions() for information on how to use these options)
- * @{
- */
-/**
- * <pre>
- * XEM_BROADCAST_OPTION Broadcast addressing on or off (default is on)
- * XEM_UNICAST_OPTION Unicast addressing on or off (default is on)
- * XEM_PROMISC_OPTION Promiscuous addressing on or off (default is off)
- * XEM_FDUPLEX_OPTION Full duplex on or off (default is off)
- * XEM_POLLED_OPTION Polled mode on or off (default is off)
- * XEM_LOOPBACK_OPTION Internal loopback on or off (default is off)
- * XEM_FLOW_CONTROL_OPTION Interpret pause frames in full duplex mode
- * (default is off)
- * XEM_INSERT_PAD_OPTION Pad short frames on transmit (default is on)
- * XEM_INSERT_FCS_OPTION Insert FCS (CRC) on transmit (default is on)
- * XEM_INSERT_ADDR_OPTION Insert source address on transmit (default is on)
- * XEM_OVWRT_ADDR_OPTION Overwrite source address on transmit. This is
- * only used if source address insertion is on.
- * (default is on)
- * XEM_STRIP_PAD_FCS_OPTION Strip FCS and padding from received frames
- * (default is off)
- * </pre>
- */
-#define XEM_UNICAST_OPTION 0x00000001UL
-#define XEM_BROADCAST_OPTION 0x00000002UL
-#define XEM_PROMISC_OPTION 0x00000004UL
-#define XEM_FDUPLEX_OPTION 0x00000008UL
-#define XEM_POLLED_OPTION 0x00000010UL
-#define XEM_LOOPBACK_OPTION 0x00000020UL
-#define XEM_FLOW_CONTROL_OPTION 0x00000080UL
-#define XEM_INSERT_PAD_OPTION 0x00000100UL
-#define XEM_INSERT_FCS_OPTION 0x00000200UL
-#define XEM_INSERT_ADDR_OPTION 0x00000400UL
-#define XEM_OVWRT_ADDR_OPTION 0x00000800UL
-#define XEM_STRIP_PAD_FCS_OPTION 0x00002000UL
-/*@}*/
-/*
- * Not supported yet:
- * XEM_MULTICAST_OPTION Multicast addressing on or off (default is off)
- */
-/* NOT SUPPORTED YET... */
-#define XEM_MULTICAST_OPTION 0x00000040UL
-
-/*
- * Some default values for interrupt coalescing within the scatter-gather
- * DMA engine.
- */
-#define XEM_SGDMA_DFT_THRESHOLD 1 /* Default pkt threshold */
-#define XEM_SGDMA_MAX_THRESHOLD 255 /* Maximum pkt theshold */
-#define XEM_SGDMA_DFT_WAITBOUND 5 /* Default pkt wait bound (msec) */
-#define XEM_SGDMA_MAX_WAITBOUND 1023 /* Maximum pkt wait bound (msec) */
-
-/*
- * Direction identifiers. These are used for setting values like packet
- * thresholds and wait bound for specific channels
- */
-#define XEM_SEND 1
-#define XEM_RECV 2
-
-/*
- * Arguments to SgSend function to indicate whether to hold off starting
- * the scatter-gather engine.
- */
-#define XEM_SGDMA_NODELAY 0 /* start SG DMA immediately */
-#define XEM_SGDMA_DELAY 1 /* do not start SG DMA */
-
-/*
- * Constants to determine the configuration of the hardware device. They are
- * used to allow the driver to verify it can operate with the hardware.
- */
-#define XEM_CFG_NO_IPIF 0 /* Not supported by the driver */
-#define XEM_CFG_NO_DMA 1 /* No DMA */
-#define XEM_CFG_SIMPLE_DMA 2 /* Simple DMA */
-#define XEM_CFG_DMA_SG 3 /* DMA scatter gather */
-
-/*
- * The next few constants help upper layers determine the size of memory
- * pools used for Ethernet buffers and descriptor lists.
- */
-#define XEM_MAC_ADDR_SIZE 6 /* six-byte MAC address */
-#define XEM_MTU 1500 /* max size of Ethernet frame */
-#define XEM_HDR_SIZE 14 /* size of Ethernet header */
-#define XEM_HDR_VLAN_SIZE 18 /* size of Ethernet header with VLAN */
-#define XEM_TRL_SIZE 4 /* size of Ethernet trailer (FCS) */
-#define XEM_MAX_FRAME_SIZE (XEM_MTU + XEM_HDR_SIZE + XEM_TRL_SIZE)
-#define XEM_MAX_VLAN_FRAME_SIZE (XEM_MTU + XEM_HDR_VLAN_SIZE + XEM_TRL_SIZE)
-
-/*
- * Define a default number of send and receive buffers
- */
-#define XEM_MIN_RECV_BUFS 32 /* minimum # of recv buffers */
-#define XEM_DFT_RECV_BUFS 64 /* default # of recv buffers */
-
-#define XEM_MIN_SEND_BUFS 16 /* minimum # of send buffers */
-#define XEM_DFT_SEND_BUFS 32 /* default # of send buffers */
-
-#define XEM_MIN_BUFFERS (XEM_MIN_RECV_BUFS + XEM_MIN_SEND_BUFS)
-#define XEM_DFT_BUFFERS (XEM_DFT_RECV_BUFS + XEM_DFT_SEND_BUFS)
-
-/*
- * Define the number of send and receive buffer descriptors, used for
- * scatter-gather DMA
- */
-#define XEM_MIN_RECV_DESC 16 /* minimum # of recv descriptors */
-#define XEM_DFT_RECV_DESC 32 /* default # of recv descriptors */
-
-#define XEM_MIN_SEND_DESC 8 /* minimum # of send descriptors */
-#define XEM_DFT_SEND_DESC 16 /* default # of send descriptors */
-
-/**************************** Type Definitions *******************************/
-
-/**
- * Ethernet statistics (see XEmac_GetStats() and XEmac_ClearStats())
- */
-typedef struct {
- u32 XmitFrames; /**< Number of frames transmitted */
- u32 XmitBytes; /**< Number of bytes transmitted */
- u32 XmitLateCollisionErrors;
- /**< Number of transmission failures
- due to late collisions */
- u32 XmitExcessDeferral; /**< Number of transmission failures
- due o excess collision deferrals */
- u32 XmitOverrunErrors; /**< Number of transmit overrun errors */
- u32 XmitUnderrunErrors; /**< Number of transmit underrun errors */
- u32 RecvFrames; /**< Number of frames received */
- u32 RecvBytes; /**< Number of bytes received */
- u32 RecvFcsErrors; /**< Number of frames discarded due
- to FCS errors */
- u32 RecvAlignmentErrors; /**< Number of frames received with
- alignment errors */
- u32 RecvOverrunErrors; /**< Number of frames discarded due
- to overrun errors */
- u32 RecvUnderrunErrors; /**< Number of recv underrun errors */
- u32 RecvMissedFrameErrors;
- /**< Number of frames missed by MAC */
- u32 RecvCollisionErrors; /**< Number of frames discarded due
- to collisions */
- u32 RecvLengthFieldErrors;
- /**< Number of frames discarded with
- invalid length field */
- u32 RecvShortErrors; /**< Number of short frames discarded */
- u32 RecvLongErrors; /**< Number of long frames discarded */
- u32 DmaErrors; /**< Number of DMA errors since init */
- u32 FifoErrors; /**< Number of FIFO errors since init */
- u32 RecvInterrupts; /**< Number of receive interrupts */
- u32 XmitInterrupts; /**< Number of transmit interrupts */
- u32 EmacInterrupts; /**< Number of MAC (device) interrupts */
- u32 TotalIntrs; /**< Total interrupts */
-} XEmac_Stats;
-
-/**
- * This typedef contains configuration information for a device.
- */
-typedef struct {
- u16 DeviceId; /**< Unique ID of device */
- u32 BaseAddress; /**< Register base address */
- u32 HasCounters; /**< Does device have counters? */
- u8 IpIfDmaConfig; /**< IPIF/DMA hardware configuration */
- u32 HasMii; /**< Does device support MII? */
-
-} XEmac_Config;
-
-/** @name Typedefs for callbacks
- * Callback functions.
- * @{
- */
-/**
- * Callback when data is sent or received with scatter-gather DMA.
- *
- * @param CallBackRef is a callback reference passed in by the upper layer
- * when setting the callback functions, and passed back to the upper
- * layer when the callback is invoked.
- * @param BdPtr is a pointer to the first buffer descriptor in a list of
- * buffer descriptors.
- * @param NumBds is the number of buffer descriptors in the list pointed
- * to by BdPtr.
- */
-typedef void (*XEmac_SgHandler) (void *CallBackRef, XBufDescriptor * BdPtr,
- u32 NumBds);
-
-/**
- * Callback when data is sent or received with direct FIFO communication or
- * simple DMA. The user typically defines two callacks, one for send and one
- * for receive.
- *
- * @param CallBackRef is a callback reference passed in by the upper layer
- * when setting the callback functions, and passed back to the upper
- * layer when the callback is invoked.
- */
-typedef void (*XEmac_FifoHandler) (void *CallBackRef);
-
-/**
- * Callback when an asynchronous error occurs.
- *
- * @param CallBackRef is a callback reference passed in by the upper layer
- * when setting the callback functions, and passed back to the upper
- * layer when the callback is invoked.
- * @param ErrorCode is a Xilinx error code defined in xstatus.h. Also see
- * XEmac_SetErrorHandler() for a description of possible errors.
- */
-typedef void (*XEmac_ErrorHandler) (void *CallBackRef, XStatus ErrorCode);
-/*@}*/
-
-/**
- * The XEmac driver instance data. The user is required to allocate a
- * variable of this type for every EMAC device in the system. A pointer
- * to a variable of this type is then passed to the driver API functions.
- */
-typedef struct {
- u32 BaseAddress; /* Base address (of IPIF) */
- u32 IsStarted; /* Device is currently started */
- u32 IsReady; /* Device is initialized and ready */
- u32 IsPolled; /* Device is in polled mode */
- u8 IpIfDmaConfig; /* IPIF/DMA hardware configuration */
- u32 HasMii; /* Does device support MII? */
- u32 HasMulticastHash; /* Does device support multicast hash table? */
-
- XEmac_Stats Stats;
- XPacketFifoV100b RecvFifo; /* FIFO used to receive frames */
- XPacketFifoV100b SendFifo; /* FIFO used to send frames */
-
- /*
- * Callbacks
- */
- XEmac_FifoHandler FifoRecvHandler; /* for non-DMA/simple DMA interrupts */
- void *FifoRecvRef;
- XEmac_FifoHandler FifoSendHandler; /* for non-DMA/simple DMA interrupts */
- void *FifoSendRef;
- XEmac_ErrorHandler ErrorHandler; /* for asynchronous errors */
- void *ErrorRef;
-
- XDmaChannel RecvChannel; /* DMA receive channel driver */
- XDmaChannel SendChannel; /* DMA send channel driver */
-
- XEmac_SgHandler SgRecvHandler; /* callback for scatter-gather DMA */
- void *SgRecvRef;
- XEmac_SgHandler SgSendHandler; /* callback for scatter-gather DMA */
- void *SgSendRef;
-} XEmac;
-
-/***************** Macros (Inline Functions) Definitions *********************/
-
-/*****************************************************************************/
-/**
-*
-* This macro determines if the device is currently configured for
-* scatter-gather DMA.
-*
-* @param InstancePtr is a pointer to the XEmac instance to be worked on.
-*
-* @return
-*
-* Boolean TRUE if the device is configured for scatter-gather DMA, or FALSE
-* if it is not.
-*
-* @note
-*
-* Signature: u32 XEmac_mIsSgDma(XEmac *InstancePtr)
-*
-******************************************************************************/
-#define XEmac_mIsSgDma(InstancePtr) \
- ((InstancePtr)->IpIfDmaConfig == XEM_CFG_DMA_SG)
-
-/*****************************************************************************/
-/**
-*
-* This macro determines if the device is currently configured for simple DMA.
-*
-* @param InstancePtr is a pointer to the XEmac instance to be worked on.
-*
-* @return
-*
-* Boolean TRUE if the device is configured for simple DMA, or FALSE otherwise
-*
-* @note
-*
-* Signature: u32 XEmac_mIsSimpleDma(XEmac *InstancePtr)
-*
-******************************************************************************/
-#define XEmac_mIsSimpleDma(InstancePtr) \
- ((InstancePtr)->IpIfDmaConfig == XEM_CFG_SIMPLE_DMA)
-
-/*****************************************************************************/
-/**
-*
-* This macro determines if the device is currently configured with DMA (either
-* simple DMA or scatter-gather DMA)
-*
-* @param InstancePtr is a pointer to the XEmac instance to be worked on.
-*
-* @return
-*
-* Boolean TRUE if the device is configured with DMA, or FALSE otherwise
-*
-* @note
-*
-* Signature: u32 XEmac_mIsDma(XEmac *InstancePtr)
-*
-******************************************************************************/
-#define XEmac_mIsDma(InstancePtr) \
- (XEmac_mIsSimpleDma(InstancePtr) || XEmac_mIsSgDma(InstancePtr))
-
-/************************** Function Prototypes ******************************/
-
-/*
- * Initialization functions in xemac.c
- */
-XStatus XEmac_Initialize(XEmac * InstancePtr, u16 DeviceId);
-XStatus XEmac_Start(XEmac * InstancePtr);
-XStatus XEmac_Stop(XEmac * InstancePtr);
-void XEmac_Reset(XEmac * InstancePtr);
-XEmac_Config *XEmac_LookupConfig(u16 DeviceId);
-
-/*
- * Diagnostic functions in xemac_selftest.c
- */
-XStatus XEmac_SelfTest(XEmac * InstancePtr);
-
-/*
- * Polled functions in xemac_polled.c
- */
-XStatus XEmac_PollSend(XEmac * InstancePtr, u8 * BufPtr, u32 ByteCount);
-XStatus XEmac_PollRecv(XEmac * InstancePtr, u8 * BufPtr, u32 * ByteCountPtr);
-
-/*
- * Interrupts with scatter-gather DMA functions in xemac_intr_dma.c
- */
-XStatus XEmac_SgSend(XEmac * InstancePtr, XBufDescriptor * BdPtr, int Delay);
-XStatus XEmac_SgRecv(XEmac * InstancePtr, XBufDescriptor * BdPtr);
-XStatus XEmac_SetPktThreshold(XEmac * InstancePtr, u32 Direction, u8 Threshold);
-XStatus XEmac_GetPktThreshold(XEmac * InstancePtr, u32 Direction,
- u8 * ThreshPtr);
-XStatus XEmac_SetPktWaitBound(XEmac * InstancePtr, u32 Direction,
- u32 TimerValue);
-XStatus XEmac_GetPktWaitBound(XEmac * InstancePtr, u32 Direction,
- u32 * WaitPtr);
-XStatus XEmac_SetSgRecvSpace(XEmac * InstancePtr, u32 * MemoryPtr,
- u32 ByteCount);
-XStatus XEmac_SetSgSendSpace(XEmac * InstancePtr, u32 * MemoryPtr,
- u32 ByteCount);
-void XEmac_SetSgRecvHandler(XEmac * InstancePtr, void *CallBackRef,
- XEmac_SgHandler FuncPtr);
-void XEmac_SetSgSendHandler(XEmac * InstancePtr, void *CallBackRef,
- XEmac_SgHandler FuncPtr);
-
-void XEmac_IntrHandlerDma(void *InstancePtr); /* interrupt handler */
-
-/*
- * Interrupts with direct FIFO functions in xemac_intr_fifo.c. Also used
- * for simple DMA.
- */
-XStatus XEmac_FifoSend(XEmac * InstancePtr, u8 * BufPtr, u32 ByteCount);
-XStatus XEmac_FifoRecv(XEmac * InstancePtr, u8 * BufPtr, u32 * ByteCountPtr);
-void XEmac_SetFifoRecvHandler(XEmac * InstancePtr, void *CallBackRef,
- XEmac_FifoHandler FuncPtr);
-void XEmac_SetFifoSendHandler(XEmac * InstancePtr, void *CallBackRef,
- XEmac_FifoHandler FuncPtr);
-
-void XEmac_IntrHandlerFifo(void *InstancePtr); /* interrupt handler */
-
-/*
- * General interrupt-related functions in xemac_intr.c
- */
-void XEmac_SetErrorHandler(XEmac * InstancePtr, void *CallBackRef,
- XEmac_ErrorHandler FuncPtr);
-
-/*
- * MAC configuration in xemac_options.c
- */
-XStatus XEmac_SetOptions(XEmac * InstancePtr, u32 OptionFlag);
-u32 XEmac_GetOptions(XEmac * InstancePtr);
-XStatus XEmac_SetMacAddress(XEmac * InstancePtr, u8 * AddressPtr);
-void XEmac_GetMacAddress(XEmac * InstancePtr, u8 * BufferPtr);
-XStatus XEmac_SetInterframeGap(XEmac * InstancePtr, u8 Part1, u8 Part2);
-void XEmac_GetInterframeGap(XEmac * InstancePtr, u8 * Part1Ptr, u8 * Part2Ptr);
-
-/*
- * Multicast functions in xemac_multicast.c (not supported by EMAC yet)
- */
-XStatus XEmac_MulticastAdd(XEmac * InstancePtr, u8 * AddressPtr);
-XStatus XEmac_MulticastClear(XEmac * InstancePtr);
-
-/*
- * PHY configuration in xemac_phy.c
- */
-XStatus XEmac_PhyRead(XEmac * InstancePtr, u32 PhyAddress,
- u32 RegisterNum, u16 * PhyDataPtr);
-XStatus XEmac_PhyWrite(XEmac * InstancePtr, u32 PhyAddress,
- u32 RegisterNum, u16 PhyData);
-
-/*
- * Statistics in xemac_stats.c
- */
-void XEmac_GetStats(XEmac * InstancePtr, XEmac_Stats * StatsPtr);
-void XEmac_ClearStats(XEmac * InstancePtr);
-
-#endif /* end of protection macro */
diff --git a/board/xilinx/xilinx_enet/xemac_g.c b/board/xilinx/xilinx_enet/xemac_g.c
deleted file mode 100644
index 9340f911f8..0000000000
--- a/board/xilinx/xilinx_enet/xemac_g.c
+++ /dev/null
@@ -1,60 +0,0 @@
-/*******************************************************************
-*
-* CAUTION: This file is automatically generated by libgen.
-* Version: Xilinx EDK 6.1.2 EDK_G.14
-* DO NOT EDIT.
-*
-* Author: Xilinx, Inc.
-*
-*
-* This program is free software; you can redistribute it and/or modify it
-* under the terms of the GNU General Public License as published by the
-* Free Software Foundation; either version 2 of the License, or (at your
-* option) any later version.
-*
-*
-* XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A
-* COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS
-* ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD,
-* XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE
-* FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING
-* ANY THIRD PARTY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.
-* XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO
-* THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY
-* WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM
-* CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND
-* FITNESS FOR A PARTICULAR PURPOSE.
-*
-*
-* Xilinx hardware products are not intended for use in life support
-* appliances, devices, or systems. Use in such applications is
-* expressly prohibited.
-*
-*
-* (c) Copyright 2002-2004 Xilinx Inc.
-* All rights reserved.
-*
-*
-* You should have received a copy of the GNU General Public License along
-* with this program; if not, write to the Free Software Foundation, Inc.,
-* 675 Mass Ave, Cambridge, MA 02139, USA.
-*
-* Description: Driver configuration
-*
-*******************************************************************/
-
-#include "xparameters.h"
-#include "xemac.h"
-
-/*
-* The configuration table for devices
-*/
-
-XEmac_Config XEmac_ConfigTable[] = {
- {
- XPAR_OPB_ETHERNET_0_DEVICE_ID,
- XPAR_OPB_ETHERNET_0_BASEADDR,
- XPAR_OPB_ETHERNET_0_ERR_COUNT_EXIST,
- XPAR_OPB_ETHERNET_0_DMA_PRESENT,
- XPAR_OPB_ETHERNET_0_MII_EXIST}
-};
diff --git a/board/xilinx/xilinx_enet/xemac_i.h b/board/xilinx/xilinx_enet/xemac_i.h
deleted file mode 100644
index 9c160f3880..0000000000
--- a/board/xilinx/xilinx_enet/xemac_i.h
+++ /dev/null
@@ -1,207 +0,0 @@
-/******************************************************************************
-*
-* Author: Xilinx, Inc.
-*
-*
-* This program is free software; you can redistribute it and/or modify it
-* under the terms of the GNU General Public License as published by the
-* Free Software Foundation; either version 2 of the License, or (at your
-* option) any later version.
-*
-*
-* XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A
-* COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS
-* ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD,
-* XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE
-* FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING
-* ANY THIRD PARTY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.
-* XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO
-* THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY
-* WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM
-* CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND
-* FITNESS FOR A PARTICULAR PURPOSE.
-*
-*
-* Xilinx hardware products are not intended for use in life support
-* appliances, devices, or systems. Use in such applications is
-* expressly prohibited.
-*
-*
-* (c) Copyright 2002-2004 Xilinx Inc.
-* All rights reserved.
-*
-*
-* You should have received a copy of the GNU General Public License along
-* with this program; if not, write to the Free Software Foundation, Inc.,
-* 675 Mass Ave, Cambridge, MA 02139, USA.
-*
-******************************************************************************/
-/*****************************************************************************/
-/**
-*
-* @file xemac_i.h
-*
-* This header file contains internal identifiers, which are those shared
-* between XEmac components. The identifiers in this file are not intended for
-* use external to the driver.
-*
-* <pre>
-* MODIFICATION HISTORY:
-*
-* Ver Who Date Changes
-* ----- ---- -------- -----------------------------------------------
-* 1.00a rpm 07/31/01 First release
-* 1.00b rpm 02/20/02 Repartitioned files and functions
-* 1.00b rpm 04/29/02 Moved register definitions to xemac_l.h
-* 1.00c rpm 12/05/02 New version includes support for simple DMA
-* </pre>
-*
-******************************************************************************/
-
-#ifndef XEMAC_I_H /* prevent circular inclusions */
-#define XEMAC_I_H /* by using protection macros */
-
-/***************************** Include Files *********************************/
-
-#include "xemac.h"
-#include "xemac_l.h"
-
-/************************** Constant Definitions *****************************/
-
-/*
- * Default buffer descriptor control word masks. The default send BD control
- * is set for incrementing the source address by one for each byte transferred,
- * and specify that the destination address (FIFO) is local to the device. The
- * default receive BD control is set for incrementing the destination address
- * by one for each byte transferred, and specify that the source address is
- * local to the device.
- */
-#define XEM_DFT_SEND_BD_MASK (XDC_DMACR_SOURCE_INCR_MASK | \
- XDC_DMACR_DEST_LOCAL_MASK)
-#define XEM_DFT_RECV_BD_MASK (XDC_DMACR_DEST_INCR_MASK | \
- XDC_DMACR_SOURCE_LOCAL_MASK)
-
-/*
- * Masks for the IPIF Device Interrupt enable and status registers.
- */
-#define XEM_IPIF_EMAC_MASK 0x00000004UL /* MAC interrupt */
-#define XEM_IPIF_SEND_DMA_MASK 0x00000008UL /* Send DMA interrupt */
-#define XEM_IPIF_RECV_DMA_MASK 0x00000010UL /* Receive DMA interrupt */
-#define XEM_IPIF_RECV_FIFO_MASK 0x00000020UL /* Receive FIFO interrupt */
-#define XEM_IPIF_SEND_FIFO_MASK 0x00000040UL /* Send FIFO interrupt */
-
-/*
- * Default IPIF Device Interrupt mask when configured for DMA
- */
-#define XEM_IPIF_DMA_DFT_MASK (XEM_IPIF_SEND_DMA_MASK | \
- XEM_IPIF_RECV_DMA_MASK | \
- XEM_IPIF_EMAC_MASK | \
- XEM_IPIF_SEND_FIFO_MASK | \
- XEM_IPIF_RECV_FIFO_MASK)
-
-/*
- * Default IPIF Device Interrupt mask when configured without DMA
- */
-#define XEM_IPIF_FIFO_DFT_MASK (XEM_IPIF_EMAC_MASK | \
- XEM_IPIF_SEND_FIFO_MASK | \
- XEM_IPIF_RECV_FIFO_MASK)
-
-#define XEM_IPIF_DMA_DEV_INTR_COUNT 7 /* Number of interrupt sources */
-#define XEM_IPIF_FIFO_DEV_INTR_COUNT 5 /* Number of interrupt sources */
-#define XEM_IPIF_DEVICE_INTR_COUNT 7 /* Number of interrupt sources */
-#define XEM_IPIF_IP_INTR_COUNT 22 /* Number of MAC interrupts */
-
-/* a mask for all transmit interrupts, used in polled mode */
-#define XEM_EIR_XMIT_ALL_MASK (XEM_EIR_XMIT_DONE_MASK | \
- XEM_EIR_XMIT_ERROR_MASK | \
- XEM_EIR_XMIT_SFIFO_EMPTY_MASK | \
- XEM_EIR_XMIT_LFIFO_FULL_MASK)
-
-/* a mask for all receive interrupts, used in polled mode */
-#define XEM_EIR_RECV_ALL_MASK (XEM_EIR_RECV_DONE_MASK | \
- XEM_EIR_RECV_ERROR_MASK | \
- XEM_EIR_RECV_LFIFO_EMPTY_MASK | \
- XEM_EIR_RECV_LFIFO_OVER_MASK | \
- XEM_EIR_RECV_LFIFO_UNDER_MASK | \
- XEM_EIR_RECV_DFIFO_OVER_MASK | \
- XEM_EIR_RECV_MISSED_FRAME_MASK | \
- XEM_EIR_RECV_COLLISION_MASK | \
- XEM_EIR_RECV_FCS_ERROR_MASK | \
- XEM_EIR_RECV_LEN_ERROR_MASK | \
- XEM_EIR_RECV_SHORT_ERROR_MASK | \
- XEM_EIR_RECV_LONG_ERROR_MASK | \
- XEM_EIR_RECV_ALIGN_ERROR_MASK)
-
-/* a default interrupt mask for scatter-gather DMA operation */
-#define XEM_EIR_DFT_SG_MASK (XEM_EIR_RECV_ERROR_MASK | \
- XEM_EIR_RECV_LFIFO_OVER_MASK | \
- XEM_EIR_RECV_LFIFO_UNDER_MASK | \
- XEM_EIR_XMIT_SFIFO_OVER_MASK | \
- XEM_EIR_XMIT_SFIFO_UNDER_MASK | \
- XEM_EIR_XMIT_LFIFO_OVER_MASK | \
- XEM_EIR_XMIT_LFIFO_UNDER_MASK | \
- XEM_EIR_RECV_DFIFO_OVER_MASK | \
- XEM_EIR_RECV_MISSED_FRAME_MASK | \
- XEM_EIR_RECV_COLLISION_MASK | \
- XEM_EIR_RECV_FCS_ERROR_MASK | \
- XEM_EIR_RECV_LEN_ERROR_MASK | \
- XEM_EIR_RECV_SHORT_ERROR_MASK | \
- XEM_EIR_RECV_LONG_ERROR_MASK | \
- XEM_EIR_RECV_ALIGN_ERROR_MASK)
-
-/* a default interrupt mask for non-DMA operation (direct FIFOs) */
-#define XEM_EIR_DFT_FIFO_MASK (XEM_EIR_XMIT_DONE_MASK | \
- XEM_EIR_RECV_DONE_MASK | \
- XEM_EIR_DFT_SG_MASK)
-
-/*
- * Mask for the DMA interrupt enable and status registers when configured
- * for scatter-gather DMA.
- */
-#define XEM_DMA_SG_INTR_MASK (XDC_IXR_DMA_ERROR_MASK | \
- XDC_IXR_PKT_THRESHOLD_MASK | \
- XDC_IXR_PKT_WAIT_BOUND_MASK | \
- XDC_IXR_SG_END_MASK)
-
-/**************************** Type Definitions *******************************/
-
-/***************** Macros (Inline Functions) Definitions *********************/
-
-/*****************************************************************************/
-/*
-*
-* Clears a structure of given size, in bytes, by setting each byte to 0.
-*
-* @param StructPtr is a pointer to the structure to be cleared.
-* @param NumBytes is the number of bytes in the structure.
-*
-* @return
-*
-* None.
-*
-* @note
-*
-* Signature: void XEmac_mClearStruct(u8 *StructPtr, unsigned int NumBytes)
-*
-******************************************************************************/
-#define XEmac_mClearStruct(StructPtr, NumBytes) \
-{ \
- int i; \
- u8 *BytePtr = (u8 *)(StructPtr); \
- for (i=0; i < (unsigned int)(NumBytes); i++) \
- { \
- *BytePtr++ = 0; \
- } \
-}
-
-/************************** Variable Definitions *****************************/
-
-extern XEmac_Config XEmac_ConfigTable[];
-
-/************************** Function Prototypes ******************************/
-
-void XEmac_CheckEmacError(XEmac * InstancePtr, u32 IntrStatus);
-void XEmac_CheckFifoRecvError(XEmac * InstancePtr);
-void XEmac_CheckFifoSendError(XEmac * InstancePtr);
-
-#endif /* end of protection macro */
diff --git a/board/xilinx/xilinx_enet/xemac_intr.c b/board/xilinx/xilinx_enet/xemac_intr.c
deleted file mode 100644
index b9a2621564..0000000000
--- a/board/xilinx/xilinx_enet/xemac_intr.c
+++ /dev/null
@@ -1,402 +0,0 @@
-/******************************************************************************
-*
-* Author: Xilinx, Inc.
-*
-*
-* This program is free software; you can redistribute it and/or modify it
-* under the terms of the GNU General Public License as published by the
-* Free Software Foundation; either version 2 of the License, or (at your
-* option) any later version.
-*
-*
-* XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A
-* COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS
-* ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD,
-* XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE
-* FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING
-* ANY THIRD PARTY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.
-* XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO
-* THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY
-* WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM
-* CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND
-* FITNESS FOR A PARTICULAR PURPOSE.
-*
-*
-* Xilinx hardware products are not intended for use in life support
-* appliances, devices, or systems. Use in such applications is
-* expressly prohibited.
-*
-*
-* (c) Copyright 2002-2004 Xilinx Inc.
-* All rights reserved.
-*
-*
-* You should have received a copy of the GNU General Public License along
-* with this program; if not, write to the Free Software Foundation, Inc.,
-* 675 Mass Ave, Cambridge, MA 02139, USA.
-*
-******************************************************************************/
-/*****************************************************************************/
-/**
-*
-* @file xemac_intr.c
-*
-* This file contains general interrupt-related functions of the XEmac driver.
-*
-* <pre>
-* MODIFICATION HISTORY:
-*
-* Ver Who Date Changes
-* ----- ---- -------- -----------------------------------------------
-* 1.00a rpm 07/31/01 First release
-* 1.00b rpm 02/20/02 Repartitioned files and functions
-* 1.00c rpm 12/05/02 New version includes support for simple DMA
-* 1.00c rpm 03/31/03 Added comment to indicate that no Receive Length FIFO
-* overrun interrupts occur in v1.00l and later of the EMAC
-* device. This avoids the need to reset the device on
-* receive overruns.
-* </pre>
-*
-******************************************************************************/
-
-/***************************** Include Files *********************************/
-
-#include "xbasic_types.h"
-#include "xemac_i.h"
-#include "xio.h"
-#include "xipif_v1_23_b.h" /* Uses v1.23b of the IPIF */
-
-/************************** Constant Definitions *****************************/
-
-/**************************** Type Definitions *******************************/
-
-/***************** Macros (Inline Functions) Definitions *********************/
-
-/************************** Variable Definitions *****************************/
-
-/************************** Function Prototypes ******************************/
-
-/*****************************************************************************/
-/**
-*
-* Set the callback function for handling asynchronous errors. The upper layer
-* software should call this function during initialization.
-*
-* The error callback is invoked by the driver within interrupt context, so it
-* needs to do its job quickly. If there are potentially slow operations within
-* the callback, these should be done at task-level.
-*
-* The Xilinx errors that must be handled by the callback are:
-* - XST_DMA_ERROR indicates an unrecoverable DMA error occurred. This is
-* typically a bus error or bus timeout. The handler must reset and
-* re-configure the device.
-* - XST_FIFO_ERROR indicates an unrecoverable FIFO error occurred. This is a
-* deadlock condition in the packet FIFO. The handler must reset and
-* re-configure the device.
-* - XST_RESET_ERROR indicates an unrecoverable MAC error occurred, usually an
-* overrun or underrun. The handler must reset and re-configure the device.
-* - XST_DMA_SG_NO_LIST indicates an attempt was made to access a scatter-gather
-* DMA list that has not yet been created.
-* - XST_DMA_SG_LIST_EMPTY indicates the driver tried to get a descriptor from
-* the receive descriptor list, but the list was empty.
-*
-* @param InstancePtr is a pointer to the XEmac instance to be worked on.
-* @param CallBackRef is a reference pointer to be passed back to the adapter in
-* the callback. This helps the adapter correlate the callback to a
-* particular driver.
-* @param FuncPtr is the pointer to the callback function.
-*
-* @return
-*
-* None.
-*
-* @note
-*
-* None.
-*
-******************************************************************************/
-void
-XEmac_SetErrorHandler(XEmac * InstancePtr, void *CallBackRef,
- XEmac_ErrorHandler FuncPtr)
-{
- XASSERT_VOID(InstancePtr != NULL);
- XASSERT_VOID(FuncPtr != NULL);
- XASSERT_VOID(InstancePtr->IsReady == XCOMPONENT_IS_READY);
-
- InstancePtr->ErrorHandler = FuncPtr;
- InstancePtr->ErrorRef = CallBackRef;
-}
-
-/****************************************************************************/
-/*
-*
-* Check the interrupt status bits of the Ethernet MAC for errors. Errors
-* currently handled are:
-* - Receive length FIFO overrun. Indicates data was lost due to the receive
-* length FIFO becoming full during the reception of a packet. Only a device
-* reset clears this condition.
-* - Receive length FIFO underrun. An attempt to read an empty FIFO. Only a
-* device reset clears this condition.
-* - Transmit status FIFO overrun. Indicates data was lost due to the transmit
-* status FIFO becoming full following the transmission of a packet. Only a
-* device reset clears this condition.
-* - Transmit status FIFO underrun. An attempt to read an empty FIFO. Only a
-* device reset clears this condition.
-* - Transmit length FIFO overrun. Indicates data was lost due to the transmit
-* length FIFO becoming full following the transmission of a packet. Only a
-* device reset clears this condition.
-* - Transmit length FIFO underrun. An attempt to read an empty FIFO. Only a
-* device reset clears this condition.
-* - Receive data FIFO overrun. Indicates data was lost due to the receive data
-* FIFO becoming full during the reception of a packet.
-* - Receive data errors:
-* - Receive missed frame error. Valid data was lost by the MAC.
-* - Receive collision error. Data was lost by the MAC due to a collision.
-* - Receive FCS error. Data was dicarded by the MAC due to FCS error.
-* - Receive length field error. Data was dicarded by the MAC due to an invalid
-* length field in the packet.
-* - Receive short error. Data was dicarded by the MAC because a packet was
-* shorter than allowed.
-* - Receive long error. Data was dicarded by the MAC because a packet was
-* longer than allowed.
-* - Receive alignment error. Data was truncated by the MAC because its length
-* was not byte-aligned.
-*
-* @param InstancePtr is a pointer to the XEmac instance to be worked on.
-* @param IntrStatus is the contents of the interrupt status register to be checked
-*
-* @return
-*
-* None.
-*
-* @note
-*
-* This function is intended for internal use only.
-*
-******************************************************************************/
-void
-XEmac_CheckEmacError(XEmac * InstancePtr, u32 IntrStatus)
-{
- u32 ResetError = FALSE;
-
- /*
- * First check for receive fifo overrun/underrun errors. Most require a
- * reset by the user to clear, but the data FIFO overrun error does not.
- */
- if (IntrStatus & XEM_EIR_RECV_DFIFO_OVER_MASK) {
- InstancePtr->Stats.RecvOverrunErrors++;
- InstancePtr->Stats.FifoErrors++;
- }
-
- if (IntrStatus & XEM_EIR_RECV_LFIFO_OVER_MASK) {
- /*
- * Receive Length FIFO overrun interrupts no longer occur in v1.00l
- * and later of the EMAC device. Frames are just dropped by the EMAC
- * if the length FIFO is full. The user would notice the Receive Missed
- * Frame count incrementing without any other errors being reported.
- * This code is left here for backward compatibility with v1.00k and
- * older EMAC devices.
- */
- InstancePtr->Stats.RecvOverrunErrors++;
- InstancePtr->Stats.FifoErrors++;
- ResetError = TRUE; /* requires a reset */
- }
-
- if (IntrStatus & XEM_EIR_RECV_LFIFO_UNDER_MASK) {
- InstancePtr->Stats.RecvUnderrunErrors++;
- InstancePtr->Stats.FifoErrors++;
- ResetError = TRUE; /* requires a reset */
- }
-
- /*
- * Now check for general receive errors. Get the latest count where
- * available, otherwise just bump the statistic so we know the interrupt
- * occurred.
- */
- if (IntrStatus & XEM_EIR_RECV_ERROR_MASK) {
- if (IntrStatus & XEM_EIR_RECV_MISSED_FRAME_MASK) {
- /*
- * Caused by length FIFO or data FIFO overruns on receive side
- */
- InstancePtr->Stats.RecvMissedFrameErrors =
- XIo_In32(InstancePtr->BaseAddress +
- XEM_RMFC_OFFSET);
- }
-
- if (IntrStatus & XEM_EIR_RECV_COLLISION_MASK) {
- InstancePtr->Stats.RecvCollisionErrors =
- XIo_In32(InstancePtr->BaseAddress + XEM_RCC_OFFSET);
- }
-
- if (IntrStatus & XEM_EIR_RECV_FCS_ERROR_MASK) {
- InstancePtr->Stats.RecvFcsErrors =
- XIo_In32(InstancePtr->BaseAddress +
- XEM_RFCSEC_OFFSET);
- }
-
- if (IntrStatus & XEM_EIR_RECV_LEN_ERROR_MASK) {
- InstancePtr->Stats.RecvLengthFieldErrors++;
- }
-
- if (IntrStatus & XEM_EIR_RECV_SHORT_ERROR_MASK) {
- InstancePtr->Stats.RecvShortErrors++;
- }
-
- if (IntrStatus & XEM_EIR_RECV_LONG_ERROR_MASK) {
- InstancePtr->Stats.RecvLongErrors++;
- }
-
- if (IntrStatus & XEM_EIR_RECV_ALIGN_ERROR_MASK) {
- InstancePtr->Stats.RecvAlignmentErrors =
- XIo_In32(InstancePtr->BaseAddress +
- XEM_RAEC_OFFSET);
- }
-
- /*
- * Bump recv interrupts stats only if not scatter-gather DMA (this
- * stat gets bumped elsewhere in that case)
- */
- if (!XEmac_mIsSgDma(InstancePtr)) {
- InstancePtr->Stats.RecvInterrupts++; /* TODO: double bump? */
- }
-
- }
-
- /*
- * Check for transmit errors. These apply to both DMA and non-DMA modes
- * of operation. The entire device should be reset after overruns or
- * underruns.
- */
- if (IntrStatus & (XEM_EIR_XMIT_SFIFO_OVER_MASK |
- XEM_EIR_XMIT_LFIFO_OVER_MASK)) {
- InstancePtr->Stats.XmitOverrunErrors++;
- InstancePtr->Stats.FifoErrors++;
- ResetError = TRUE;
- }
-
- if (IntrStatus & (XEM_EIR_XMIT_SFIFO_UNDER_MASK |
- XEM_EIR_XMIT_LFIFO_UNDER_MASK)) {
- InstancePtr->Stats.XmitUnderrunErrors++;
- InstancePtr->Stats.FifoErrors++;
- ResetError = TRUE;
- }
-
- if (ResetError) {
- /*
- * If a reset error occurred, disable the EMAC interrupts since the
- * reset-causing interrupt(s) is latched in the EMAC - meaning it will
- * keep occurring until the device is reset. In order to give the higher
- * layer software time to reset the device, we have to disable the
- * overrun/underrun interrupts until that happens. We trust that the
- * higher layer resets the device. We are able to get away with disabling
- * all EMAC interrupts since the only interrupts it generates are for
- * error conditions, and we don't care about any more errors right now.
- */
- XIIF_V123B_WRITE_IIER(InstancePtr->BaseAddress, 0);
-
- /*
- * Invoke the error handler callback, which should result in a reset
- * of the device by the upper layer software.
- */
- InstancePtr->ErrorHandler(InstancePtr->ErrorRef,
- XST_RESET_ERROR);
- }
-}
-
-/*****************************************************************************/
-/*
-*
-* Check the receive packet FIFO for errors. FIFO error interrupts are:
-* - Deadlock. See the XPacketFifo component for a description of deadlock on a
-* FIFO.
-*
-* @param InstancePtr is a pointer to the XEmac instance to be worked on.
-*
-* @return
-*
-* Although the function returns void, it can return an asynchronous error to the
-* application through the error handler. It can return XST_FIFO_ERROR if a FIFO
-* error occurred.
-*
-* @note
-*
-* This function is intended for internal use only.
-*
-******************************************************************************/
-void
-XEmac_CheckFifoRecvError(XEmac * InstancePtr)
-{
- /*
- * Although the deadlock is currently the only interrupt from a packet
- * FIFO, make sure it is deadlocked before taking action. There is no
- * need to clear this interrupt since it requires a reset of the device.
- */
- if (XPF_V100B_IS_DEADLOCKED(&InstancePtr->RecvFifo)) {
- u32 IntrEnable;
-
- InstancePtr->Stats.FifoErrors++;
-
- /*
- * Invoke the error callback function, which should result in a reset
- * of the device by the upper layer software. We first need to disable
- * the FIFO interrupt, since otherwise the upper layer thread that
- * handles the reset may never run because this interrupt condition
- * doesn't go away until a reset occurs (there is no way to ack it).
- */
- IntrEnable = XIIF_V123B_READ_DIER(InstancePtr->BaseAddress);
- XIIF_V123B_WRITE_DIER(InstancePtr->BaseAddress,
- IntrEnable & ~XEM_IPIF_RECV_FIFO_MASK);
-
- InstancePtr->ErrorHandler(InstancePtr->ErrorRef,
- XST_FIFO_ERROR);
- }
-}
-
-/*****************************************************************************/
-/*
-*
-* Check the send packet FIFO for errors. FIFO error interrupts are:
-* - Deadlock. See the XPacketFifo component for a description of deadlock on a
-* FIFO.
-*
-* @param InstancePtr is a pointer to the XEmac instance to be worked on.
-*
-* @return
-*
-* Although the function returns void, it can return an asynchronous error to the
-* application through the error handler. It can return XST_FIFO_ERROR if a FIFO
-* error occurred.
-*
-* @note
-*
-* This function is intended for internal use only.
-*
-******************************************************************************/
-void
-XEmac_CheckFifoSendError(XEmac * InstancePtr)
-{
- /*
- * Although the deadlock is currently the only interrupt from a packet
- * FIFO, make sure it is deadlocked before taking action. There is no
- * need to clear this interrupt since it requires a reset of the device.
- */
- if (XPF_V100B_IS_DEADLOCKED(&InstancePtr->SendFifo)) {
- u32 IntrEnable;
-
- InstancePtr->Stats.FifoErrors++;
-
- /*
- * Invoke the error callback function, which should result in a reset
- * of the device by the upper layer software. We first need to disable
- * the FIFO interrupt, since otherwise the upper layer thread that
- * handles the reset may never run because this interrupt condition
- * doesn't go away until a reset occurs (there is no way to ack it).
- */
- IntrEnable = XIIF_V123B_READ_DIER(InstancePtr->BaseAddress);
- XIIF_V123B_WRITE_DIER(InstancePtr->BaseAddress,
- IntrEnable & ~XEM_IPIF_SEND_FIFO_MASK);
-
- InstancePtr->ErrorHandler(InstancePtr->ErrorRef,
- XST_FIFO_ERROR);
- }
-}
diff --git a/board/xilinx/xilinx_enet/xemac_intr_dma.c b/board/xilinx/xilinx_enet/xemac_intr_dma.c
deleted file mode 100644
index 567abb42ab..0000000000
--- a/board/xilinx/xilinx_enet/xemac_intr_dma.c
+++ /dev/null
@@ -1,1344 +0,0 @@
-/******************************************************************************
-*
-* Author: Xilinx, Inc.
-*
-*
-* This program is free software; you can redistribute it and/or modify it
-* under the terms of the GNU General Public License as published by the
-* Free Software Foundation; either version 2 of the License, or (at your
-* option) any later version.
-*
-*
-* XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A
-* COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS
-* ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD,
-* XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE
-* FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING
-* ANY THIRD PARTY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.
-* XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO
-* THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY
-* WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM
-* CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND
-* FITNESS FOR A PARTICULAR PURPOSE.
-*
-*
-* Xilinx hardware products are not intended for use in life support
-* appliances, devices, or systems. Use in such applications is
-* expressly prohibited.
-*
-*
-* (c) Copyright 2002-2004 Xilinx Inc.
-* All rights reserved.
-*
-*
-* You should have received a copy of the GNU General Public License along
-* with this program; if not, write to the Free Software Foundation, Inc.,
-* 675 Mass Ave, Cambridge, MA 02139, USA.
-*
-******************************************************************************/
-/*****************************************************************************/
-/**
-*
-* @file xemac_intr_dma.c
-*
-* Contains functions used in interrupt mode when configured with scatter-gather
-* DMA.
-*
-* The interrupt handler, XEmac_IntrHandlerDma(), must be connected by the user
-* to the interrupt controller.
-*
-* <pre>
-* MODIFICATION HISTORY:
-*
-* Ver Who Date Changes
-* ----- ---- -------- ---------------------------------------------------------
-* 1.00a rpm 07/31/01 First release
-* 1.00b rpm 02/20/02 Repartitioned files and functions
-* 1.00c rpm 12/05/02 New version includes support for simple DMA and the delay
-* argument to SgSend
-* 1.00c rpm 02/03/03 The XST_DMA_SG_COUNT_EXCEEDED return code was removed
-* from SetPktThreshold in the internal DMA driver. Also
-* avoided compiler warnings by initializing Result in the
-* interrupt service routines.
-* 1.00c rpm 03/26/03 Fixed a problem in the interrupt service routines where
-* the interrupt status was toggled clear after a call to
-* ErrorHandler, but if ErrorHandler reset the device the
-* toggle actually asserted the interrupt because the
-* reset had cleared it.
-* </pre>
-*
-******************************************************************************/
-
-/***************************** Include Files *********************************/
-
-#include "xbasic_types.h"
-#include "xemac_i.h"
-#include "xio.h"
-#include "xbuf_descriptor.h"
-#include "xdma_channel.h"
-#include "xipif_v1_23_b.h" /* Uses v1.23b of the IPIF */
-
-/************************** Constant Definitions *****************************/
-
-/**************************** Type Definitions *******************************/
-
-/***************** Macros (Inline Functions) Definitions *********************/
-
-/************************** Variable Definitions *****************************/
-
-/************************** Function Prototypes ******************************/
-
-static void HandleDmaRecvIntr(XEmac * InstancePtr);
-static void HandleDmaSendIntr(XEmac * InstancePtr);
-static void HandleEmacDmaIntr(XEmac * InstancePtr);
-
-/*****************************************************************************/
-/**
-*
-* Send an Ethernet frame using scatter-gather DMA. The caller attaches the
-* frame to one or more buffer descriptors, then calls this function once for
-* each descriptor. The caller is responsible for allocating and setting up the
-* descriptor. An entire Ethernet frame may or may not be contained within one
-* descriptor. This function simply inserts the descriptor into the scatter-
-* gather engine's transmit list. The caller is responsible for providing mutual
-* exclusion to guarantee that a frame is contiguous in the transmit list. The
-* buffer attached to the descriptor must be word-aligned.
-*
-* The driver updates the descriptor with the device control register before
-* being inserted into the transmit list. If this is the last descriptor in
-* the frame, the inserts are committed, which means the descriptors for this
-* frame are now available for transmission.
-*
-* It is assumed that the upper layer software supplies a correctly formatted
-* Ethernet frame, including the destination and source addresses, the
-* type/length field, and the data field. It is also assumed that upper layer
-* software does not append FCS at the end of the frame.
-*
-* The buffer attached to the descriptor must be word-aligned on the front end.
-*
-* This call is non-blocking. Notification of error or successful transmission
-* is done asynchronously through the send or error callback function.
-*
-* @param InstancePtr is a pointer to the XEmac instance to be worked on.
-* @param BdPtr is the address of a descriptor to be inserted into the transmit
-* ring.
-* @param Delay indicates whether to start the scatter-gather DMA channel
-* immediately, or whether to wait. This allows the user to build up a
-* list of more than one descriptor before starting the transmission of
-* the packets, which allows the application to keep up with DMA and have
-* a constant stream of frames being transmitted. Use XEM_SGDMA_NODELAY or
-* XEM_SGDMA_DELAY, defined in xemac.h, as the value of this argument. If
-* the user chooses to delay and build a list, the user must call this
-* function with the XEM_SGDMA_NODELAY option or call XEmac_Start() to
-* kick off the tranmissions.
-*
-* @return
-*
-* - XST_SUCCESS if the buffer was successfull sent
-* - XST_DEVICE_IS_STOPPED if the Ethernet MAC has not been started yet
-* - XST_NOT_SGDMA if the device is not in scatter-gather DMA mode
-* - XST_DMA_SG_LIST_FULL if the descriptor list for the DMA channel is full
-* - XST_DMA_SG_BD_LOCKED if the DMA channel cannot insert the descriptor into
-* the list because a locked descriptor exists at the insert point
-* - XST_DMA_SG_NOTHING_TO_COMMIT if even after inserting a descriptor into the
-* list, the DMA channel believes there are no new descriptors to commit. If
-* this is ever encountered, there is likely a thread mutual exclusion problem
-* on transmit.
-*
-* @note
-*
-* This function is not thread-safe. The user must provide mutually exclusive
-* access to this function if there are to be multiple threads that can call it.
-*
-* @internal
-*
-* A status that should never be returned from this function, although
-* the code is set up to handle it, is XST_DMA_SG_NO_LIST. Starting the device
-* requires a list to be created, and this function requires the device to be
-* started.
-*
-******************************************************************************/
-XStatus
-XEmac_SgSend(XEmac * InstancePtr, XBufDescriptor * BdPtr, int Delay)
-{
- XStatus Result;
- u32 BdControl;
-
- XASSERT_NONVOID(InstancePtr != NULL);
- XASSERT_NONVOID(BdPtr != NULL);
- XASSERT_NONVOID(InstancePtr->IsReady == XCOMPONENT_IS_READY);
-
- /*
- * Be sure the device is configured for scatter-gather DMA, then be sure
- * it is started.
- */
- if (!XEmac_mIsSgDma(InstancePtr)) {
- return XST_NOT_SGDMA;
- }
-
- /*
- * Set some descriptor control word defaults (source address increment
- * and local destination address) and the destination address
- * (the FIFO). These are the same for every transmit descriptor.
- */
- BdControl = XBufDescriptor_GetControl(BdPtr);
- XBufDescriptor_SetControl(BdPtr, BdControl | XEM_DFT_SEND_BD_MASK);
-
- XBufDescriptor_SetDestAddress(BdPtr,
- InstancePtr->BaseAddress +
- XEM_PFIFO_TXDATA_OFFSET);
-
- /*
- * Put the descriptor in the send list. The DMA component accesses data
- * here that can also be modified in interrupt context, so a critical
- * section is required.
- */
- XIIF_V123B_GINTR_DISABLE(InstancePtr->BaseAddress);
-
- Result = XDmaChannel_PutDescriptor(&InstancePtr->SendChannel, BdPtr);
- if (Result != XST_SUCCESS) {
- XIIF_V123B_GINTR_ENABLE(InstancePtr->BaseAddress);
- return Result;
- }
-
- /*
- * If this is the last buffer in the frame, commit the inserts and start
- * the DMA engine if necessary
- */
- if (XBufDescriptor_IsLastControl(BdPtr)) {
- Result = XDmaChannel_CommitPuts(&InstancePtr->SendChannel);
- if (Result != XST_SUCCESS) {
- XIIF_V123B_GINTR_ENABLE(InstancePtr->BaseAddress);
- return Result;
- }
-
- if (Delay == XEM_SGDMA_NODELAY) {
- /*
- * Start the DMA channel. Ignore the return status since we know the
- * list exists and has at least one entry and we don't care if the
- * channel is already started. The DMA component accesses data here
- * that can be modified at interrupt or task levels, so a critical
- * section is required.
- */
- (void) XDmaChannel_SgStart(&InstancePtr->SendChannel);
- }
- }
-
- XIIF_V123B_GINTR_ENABLE(InstancePtr->BaseAddress);
-
- return XST_SUCCESS;
-}
-
-/*****************************************************************************/
-/**
-*
-* Add a descriptor, with an attached empty buffer, into the receive descriptor
-* list. The buffer attached to the descriptor must be word-aligned. This is
-* used by the upper layer software during initialization when first setting up
-* the receive descriptors, and also during reception of frames to replace
-* filled buffers with empty buffers. This function can be called when the
-* device is started or stopped. Note that it does start the scatter-gather DMA
-* engine. Although this is not necessary during initialization, it is not a
-* problem during initialization because the MAC receiver is not yet started.
-*
-* The buffer attached to the descriptor must be word-aligned on both the front
-* end and the back end.
-*
-* Notification of received frames are done asynchronously through the receive
-* callback function.
-*
-* @param InstancePtr is a pointer to the XEmac instance to be worked on.
-* @param BdPtr is a pointer to the buffer descriptor that will be added to the
-* descriptor list.
-*
-* @return
-*
-* - XST_SUCCESS if a descriptor was successfully returned to the driver
-* - XST_NOT_SGDMA if the device is not in scatter-gather DMA mode
-* - XST_DMA_SG_LIST_FULL if the receive descriptor list is full
-* - XST_DMA_SG_BD_LOCKED if the DMA channel cannot insert the descriptor into
-* the list because a locked descriptor exists at the insert point.
-* - XST_DMA_SG_NOTHING_TO_COMMIT if even after inserting a descriptor into the
-* list, the DMA channel believes there are no new descriptors to commit.
-*
-* @internal
-*
-* A status that should never be returned from this function, although
-* the code is set up to handle it, is XST_DMA_SG_NO_LIST. Starting the device
-* requires a list to be created, and this function requires the device to be
-* started.
-*
-******************************************************************************/
-XStatus
-XEmac_SgRecv(XEmac * InstancePtr, XBufDescriptor * BdPtr)
-{
- XStatus Result;
- u32 BdControl;
-
- XASSERT_NONVOID(InstancePtr != NULL);
- XASSERT_NONVOID(BdPtr != NULL);
- XASSERT_NONVOID(InstancePtr->IsReady == XCOMPONENT_IS_READY);
-
- /*
- * Be sure the device is configured for scatter-gather DMA
- */
- if (!XEmac_mIsSgDma(InstancePtr)) {
- return XST_NOT_SGDMA;
- }
-
- /*
- * Set some descriptor control word defaults (destination address increment
- * and local source address) and the source address (the FIFO). These are
- * the same for every receive descriptor.
- */
- BdControl = XBufDescriptor_GetControl(BdPtr);
- XBufDescriptor_SetControl(BdPtr, BdControl | XEM_DFT_RECV_BD_MASK);
- XBufDescriptor_SetSrcAddress(BdPtr,
- InstancePtr->BaseAddress +
- XEM_PFIFO_RXDATA_OFFSET);
-
- /*
- * Put the descriptor into the channel's descriptor list and commit.
- * Although this function is likely called within interrupt context, there
- * is the possibility that the upper layer software queues it to a task.
- * In this case, a critical section is needed here to protect shared data
- * in the DMA component.
- */
- XIIF_V123B_GINTR_DISABLE(InstancePtr->BaseAddress);
-
- Result = XDmaChannel_PutDescriptor(&InstancePtr->RecvChannel, BdPtr);
- if (Result != XST_SUCCESS) {
- XIIF_V123B_GINTR_ENABLE(InstancePtr->BaseAddress);
- return Result;
- }
-
- Result = XDmaChannel_CommitPuts(&InstancePtr->RecvChannel);
- if (Result != XST_SUCCESS) {
- XIIF_V123B_GINTR_ENABLE(InstancePtr->BaseAddress);
- return Result;
- }
-
- /*
- * Start the DMA channel. Ignore the return status since we know the list
- * exists and has at least one entry and we don't care if the channel is
- * already started. The DMA component accesses data here that can be
- * modified at interrupt or task levels, so a critical section is required.
- */
- (void) XDmaChannel_SgStart(&InstancePtr->RecvChannel);
-
- XIIF_V123B_GINTR_ENABLE(InstancePtr->BaseAddress);
-
- return XST_SUCCESS;
-}
-
-/*****************************************************************************/
-/**
-*
-* The interrupt handler for the Ethernet driver when configured with scatter-
-* gather DMA.
-*
-* Get the interrupt status from the IpIf to determine the source of the
-* interrupt. The source can be: MAC, Recv Packet FIFO, Send Packet FIFO, Recv
-* DMA channel, or Send DMA channel. The packet FIFOs only interrupt during
-* "deadlock" conditions.
-*
-* @param InstancePtr is a pointer to the XEmac instance that just interrupted.
-*
-* @return
-*
-* None.
-*
-* @note
-*
-* None.
-*
-******************************************************************************/
-void
-XEmac_IntrHandlerDma(void *InstancePtr)
-{
- u32 IntrStatus;
- XEmac *EmacPtr = (XEmac *) InstancePtr;
-
- EmacPtr->Stats.TotalIntrs++;
-
- /*
- * Get the interrupt status from the IPIF. There is no clearing of
- * interrupts in the IPIF. Interrupts must be cleared at the source.
- */
- IntrStatus = XIIF_V123B_READ_DIPR(EmacPtr->BaseAddress);
-
- /*
- * See which type of interrupt is being requested, and service it
- */
- if (IntrStatus & XEM_IPIF_RECV_DMA_MASK) { /* Receive DMA interrupt */
- EmacPtr->Stats.RecvInterrupts++;
- HandleDmaRecvIntr(EmacPtr);
- }
-
- if (IntrStatus & XEM_IPIF_SEND_DMA_MASK) { /* Send DMA interrupt */
- EmacPtr->Stats.XmitInterrupts++;
- HandleDmaSendIntr(EmacPtr);
- }
-
- if (IntrStatus & XEM_IPIF_EMAC_MASK) { /* MAC interrupt */
- EmacPtr->Stats.EmacInterrupts++;
- HandleEmacDmaIntr(EmacPtr);
- }
-
- if (IntrStatus & XEM_IPIF_RECV_FIFO_MASK) { /* Receive FIFO interrupt */
- EmacPtr->Stats.RecvInterrupts++;
- XEmac_CheckFifoRecvError(EmacPtr);
- }
-
- if (IntrStatus & XEM_IPIF_SEND_FIFO_MASK) { /* Send FIFO interrupt */
- EmacPtr->Stats.XmitInterrupts++;
- XEmac_CheckFifoSendError(EmacPtr);
- }
-
- if (IntrStatus & XIIF_V123B_ERROR_MASK) {
- /*
- * An error occurred internal to the IPIF. This is more of a debug and
- * integration issue rather than a production error. Don't do anything
- * other than clear it, which provides a spot for software to trap
- * on the interrupt and begin debugging.
- */
- XIIF_V123B_WRITE_DISR(EmacPtr->BaseAddress,
- XIIF_V123B_ERROR_MASK);
- }
-}
-
-/*****************************************************************************/
-/**
-*
-* Set the packet count threshold for this device. The device must be stopped
-* before setting the threshold. The packet count threshold is used for interrupt
-* coalescing, which reduces the frequency of interrupts from the device to the
-* processor. In this case, the scatter-gather DMA engine only interrupts when
-* the packet count threshold is reached, instead of interrupting for each packet.
-* A packet is a generic term used by the scatter-gather DMA engine, and is
-* equivalent to an Ethernet frame in our case.
-*
-* @param InstancePtr is a pointer to the XEmac instance to be worked on.
-* @param Direction indicates the channel, send or receive, from which the
-* threshold register is read.
-* @param Threshold is the value of the packet threshold count used during
-* interrupt coalescing. A value of 0 disables the use of packet threshold
-* by the hardware.
-*
-* @return
-*
-* - XST_SUCCESS if the threshold was successfully set
-* - XST_NOT_SGDMA if the MAC is not configured for scatter-gather DMA
-* - XST_DEVICE_IS_STARTED if the device has not been stopped
-* - XST_INVALID_PARAM if the Direction parameter is invalid. Turning on
-* asserts would also catch this error.
-*
-* @note
-*
-* The packet threshold could be set to larger than the number of descriptors
-* allocated to the DMA channel. In this case, the wait bound will take over
-* and always indicate data arrival. There was a check in this function that
-* returned an error if the treshold was larger than the number of descriptors,
-* but that was removed because users would then have to set the threshold
-* only after they set descriptor space, which is an order dependency that
-* caused confustion.
-*
-******************************************************************************/
-XStatus
-XEmac_SetPktThreshold(XEmac * InstancePtr, u32 Direction, u8 Threshold)
-{
- XASSERT_NONVOID(InstancePtr != NULL);
- XASSERT_NONVOID(Direction == XEM_SEND || Direction == XEM_RECV);
- XASSERT_NONVOID(InstancePtr->IsReady == XCOMPONENT_IS_READY);
-
- /*
- * Be sure device is configured for scatter-gather DMA and has been stopped
- */
- if (!XEmac_mIsSgDma(InstancePtr)) {
- return XST_NOT_SGDMA;
- }
-
- if (InstancePtr->IsStarted == XCOMPONENT_IS_STARTED) {
- return XST_DEVICE_IS_STARTED;
- }
-
- /*
- * Based on the direction, set the packet threshold in the
- * corresponding DMA channel component. Default to the receive
- * channel threshold register (if an invalid Direction is passed).
- */
- switch (Direction) {
- case XEM_SEND:
- return XDmaChannel_SetPktThreshold(&InstancePtr->SendChannel,
- Threshold);
-
- case XEM_RECV:
- return XDmaChannel_SetPktThreshold(&InstancePtr->RecvChannel,
- Threshold);
-
- default:
- return XST_INVALID_PARAM;
- }
-}
-
-/*****************************************************************************/
-/**
-*
-* Get the value of the packet count threshold for this driver/device. The packet
-* count threshold is used for interrupt coalescing, which reduces the frequency
-* of interrupts from the device to the processor. In this case, the
-* scatter-gather DMA engine only interrupts when the packet count threshold is
-* reached, instead of interrupting for each packet. A packet is a generic term
-* used by the scatter-gather DMA engine, and is equivalent to an Ethernet frame
-* in our case.
-*
-* @param InstancePtr is a pointer to the XEmac instance to be worked on.
-* @param Direction indicates the channel, send or receive, from which the
-* threshold register is read.
-* @param ThreshPtr is a pointer to the byte into which the current value of the
-* packet threshold register will be copied. An output parameter. A value
-* of 0 indicates the use of packet threshold by the hardware is disabled.
-*
-* @return
-*
-* - XST_SUCCESS if the packet threshold was retrieved successfully
-* - XST_NOT_SGDMA if the MAC is not configured for scatter-gather DMA
-* - XST_INVALID_PARAM if the Direction parameter is invalid. Turning on
-* asserts would also catch this error.
-*
-* @note
-*
-* None.
-*
-******************************************************************************/
-XStatus
-XEmac_GetPktThreshold(XEmac * InstancePtr, u32 Direction, u8 * ThreshPtr)
-{
- XASSERT_NONVOID(InstancePtr != NULL);
- XASSERT_NONVOID(Direction == XEM_SEND || Direction == XEM_RECV);
- XASSERT_NONVOID(ThreshPtr != NULL);
- XASSERT_NONVOID(InstancePtr->IsReady == XCOMPONENT_IS_READY);
-
- if (!XEmac_mIsSgDma(InstancePtr)) {
- return XST_NOT_SGDMA;
- }
-
- /*
- * Based on the direction, return the packet threshold set in the
- * corresponding DMA channel component. Default to the value in
- * the receive channel threshold register (if an invalid Direction
- * is passed).
- */
- switch (Direction) {
- case XEM_SEND:
- *ThreshPtr =
- XDmaChannel_GetPktThreshold(&InstancePtr->SendChannel);
- break;
-
- case XEM_RECV:
- *ThreshPtr =
- XDmaChannel_GetPktThreshold(&InstancePtr->RecvChannel);
- break;
-
- default:
- return XST_INVALID_PARAM;
- }
-
- return XST_SUCCESS;
-}
-
-/*****************************************************************************/
-/**
-*
-* Set the packet wait bound timer for this driver/device. The device must be
-* stopped before setting the timer value. The packet wait bound is used during
-* interrupt coalescing to trigger an interrupt when not enough packets have been
-* received to reach the packet count threshold. A packet is a generic term used
-* by the scatter-gather DMA engine, and is equivalent to an Ethernet frame in
-* our case. The timer is in milliseconds.
-*
-* @param InstancePtr is a pointer to the XEmac instance to be worked on.
-* @param Direction indicates the channel, send or receive, from which the
-* threshold register is read.
-* @param TimerValue is the value of the packet wait bound used during interrupt
-* coalescing. It is in milliseconds in the range 0 - 1023. A value of 0
-* disables the packet wait bound timer.
-*
-* @return
-*
-* - XST_SUCCESS if the packet wait bound was set successfully
-* - XST_NOT_SGDMA if the MAC is not configured for scatter-gather DMA
-* - XST_DEVICE_IS_STARTED if the device has not been stopped
-* - XST_INVALID_PARAM if the Direction parameter is invalid. Turning on
-* asserts would also catch this error.
-*
-* @note
-*
-* None.
-*
-******************************************************************************/
-XStatus
-XEmac_SetPktWaitBound(XEmac * InstancePtr, u32 Direction, u32 TimerValue)
-{
- XASSERT_NONVOID(InstancePtr != NULL);
- XASSERT_NONVOID(Direction == XEM_SEND || Direction == XEM_RECV);
- XASSERT_NONVOID(TimerValue <= XEM_SGDMA_MAX_WAITBOUND);
- XASSERT_NONVOID(InstancePtr->IsReady == XCOMPONENT_IS_READY);
-
- /*
- * Be sure device is configured for scatter-gather DMA and has been stopped
- */
- if (!XEmac_mIsSgDma(InstancePtr)) {
- return XST_NOT_SGDMA;
- }
-
- if (InstancePtr->IsStarted == XCOMPONENT_IS_STARTED) {
- return XST_DEVICE_IS_STARTED;
- }
-
- /*
- * Based on the direction, set the packet wait bound in the
- * corresponding DMA channel component. Default to the receive
- * channel wait bound register (if an invalid Direction is passed).
- */
- switch (Direction) {
- case XEM_SEND:
- XDmaChannel_SetPktWaitBound(&InstancePtr->SendChannel,
- TimerValue);
- break;
-
- case XEM_RECV:
- XDmaChannel_SetPktWaitBound(&InstancePtr->RecvChannel,
- TimerValue);
- break;
-
- default:
- return XST_INVALID_PARAM;
- }
-
- return XST_SUCCESS;
-}
-
-/*****************************************************************************/
-/**
-*
-* Get the packet wait bound timer for this driver/device. The packet wait bound
-* is used during interrupt coalescing to trigger an interrupt when not enough
-* packets have been received to reach the packet count threshold. A packet is a
-* generic term used by the scatter-gather DMA engine, and is equivalent to an
-* Ethernet frame in our case. The timer is in milliseconds.
-*
-* @param InstancePtr is a pointer to the XEmac instance to be worked on.
-* @param Direction indicates the channel, send or receive, from which the
-* threshold register is read.
-* @param WaitPtr is a pointer to the byte into which the current value of the
-* packet wait bound register will be copied. An output parameter. Units
-* are in milliseconds in the range 0 - 1023. A value of 0 indicates the
-* packet wait bound timer is disabled.
-*
-* @return
-*
-* - XST_SUCCESS if the packet wait bound was retrieved successfully
-* - XST_NOT_SGDMA if the MAC is not configured for scatter-gather DMA
-* - XST_INVALID_PARAM if the Direction parameter is invalid. Turning on
-* asserts would also catch this error.
-*
-* @note
-*
-* None.
-*
-******************************************************************************/
-XStatus
-XEmac_GetPktWaitBound(XEmac * InstancePtr, u32 Direction, u32 * WaitPtr)
-{
- XASSERT_NONVOID(InstancePtr != NULL);
- XASSERT_NONVOID(Direction == XEM_SEND || Direction == XEM_RECV);
- XASSERT_NONVOID(WaitPtr != NULL);
- XASSERT_NONVOID(InstancePtr->IsReady == XCOMPONENT_IS_READY);
-
- if (!XEmac_mIsSgDma(InstancePtr)) {
- return XST_NOT_SGDMA;
- }
-
- /*
- * Based on the direction, return the packet wait bound set in the
- * corresponding DMA channel component. Default to the value in
- * the receive channel wait bound register (if an invalid Direction
- * is passed).
- */
- switch (Direction) {
- case XEM_SEND:
- *WaitPtr =
- XDmaChannel_GetPktWaitBound(&InstancePtr->SendChannel);
- break;
-
- case XEM_RECV:
- *WaitPtr =
- XDmaChannel_GetPktWaitBound(&InstancePtr->RecvChannel);
- break;
-
- default:
- return XST_INVALID_PARAM;
- }
-
- return XST_SUCCESS;
-}
-
-/*****************************************************************************/
-/**
-*
-* Give the driver the memory space to be used for the scatter-gather DMA
-* receive descriptor list. This function should only be called once, during
-* initialization of the Ethernet driver. The memory space must be big enough
-* to hold some number of descriptors, depending on the needs of the system.
-* The xemac.h file defines minimum and default numbers of descriptors
-* which can be used to allocate this memory space.
-*
-* The memory space must be word-aligned. An assert will occur if asserts are
-* turned on and the memory is not word-aligned.
-*
-* @param InstancePtr is a pointer to the XEmac instance to be worked on.
-* @param MemoryPtr is a pointer to the word-aligned memory.
-* @param ByteCount is the length, in bytes, of the memory space.
-*
-* @return
-*
-* - XST_SUCCESS if the space was initialized successfully
-* - XST_NOT_SGDMA if the MAC is not configured for scatter-gather DMA
-* - XST_DMA_SG_LIST_EXISTS if this list space has already been created
-*
-* @note
-*
-* If the device is configured for scatter-gather DMA, this function must be
-* called AFTER the XEmac_Initialize() function because the DMA channel
-* components must be initialized before the memory space is set.
-*
-******************************************************************************/
-XStatus
-XEmac_SetSgRecvSpace(XEmac * InstancePtr, u32 * MemoryPtr, u32 ByteCount)
-{
- XASSERT_NONVOID(InstancePtr != NULL);
- XASSERT_NONVOID(MemoryPtr != NULL);
- XASSERT_NONVOID(ByteCount != 0);
- XASSERT_NONVOID(InstancePtr->IsReady == XCOMPONENT_IS_READY);
-
- if (!XEmac_mIsSgDma(InstancePtr)) {
- return XST_NOT_SGDMA;
- }
-
- return XDmaChannel_CreateSgList(&InstancePtr->RecvChannel, MemoryPtr,
- ByteCount);
-}
-
-/*****************************************************************************/
-/**
-*
-* Give the driver the memory space to be used for the scatter-gather DMA
-* transmit descriptor list. This function should only be called once, during
-* initialization of the Ethernet driver. The memory space must be big enough
-* to hold some number of descriptors, depending on the needs of the system.
-* The xemac.h file defines minimum and default numbers of descriptors
-* which can be used to allocate this memory space.
-*
-* The memory space must be word-aligned. An assert will occur if asserts are
-* turned on and the memory is not word-aligned.
-*
-* @param InstancePtr is a pointer to the XEmac instance to be worked on.
-* @param MemoryPtr is a pointer to the word-aligned memory.
-* @param ByteCount is the length, in bytes, of the memory space.
-*
-* @return
-*
-* - XST_SUCCESS if the space was initialized successfully
-* - XST_NOT_SGDMA if the MAC is not configured for scatter-gather DMA
-* - XST_DMA_SG_LIST_EXISTS if this list space has already been created
-*
-* @note
-*
-* If the device is configured for scatter-gather DMA, this function must be
-* called AFTER the XEmac_Initialize() function because the DMA channel
-* components must be initialized before the memory space is set.
-*
-******************************************************************************/
-XStatus
-XEmac_SetSgSendSpace(XEmac * InstancePtr, u32 * MemoryPtr, u32 ByteCount)
-{
- XASSERT_NONVOID(InstancePtr != NULL);
- XASSERT_NONVOID(MemoryPtr != NULL);
- XASSERT_NONVOID(ByteCount != 0);
- XASSERT_NONVOID(InstancePtr->IsReady == XCOMPONENT_IS_READY);
-
- if (!XEmac_mIsSgDma(InstancePtr)) {
- return XST_NOT_SGDMA;
- }
-
- return XDmaChannel_CreateSgList(&InstancePtr->SendChannel, MemoryPtr,
- ByteCount);
-}
-
-/*****************************************************************************/
-/**
-*
-* Set the callback function for handling received frames in scatter-gather DMA
-* mode. The upper layer software should call this function during
-* initialization. The callback is called once per frame received. The head of
-* a descriptor list is passed in along with the number of descriptors in the
-* list. Before leaving the callback, the upper layer software should attach a
-* new buffer to each descriptor in the list.
-*
-* The callback is invoked by the driver within interrupt context, so it needs
-* to do its job quickly. Sending the received frame up the protocol stack
-* should be done at task-level. If there are other potentially slow operations
-* within the callback, these too should be done at task-level.
-*
-* @param InstancePtr is a pointer to the XEmac instance to be worked on.
-* @param CallBackRef is a reference pointer to be passed back to the adapter in
-* the callback. This helps the adapter correlate the callback to a
-* particular driver.
-* @param FuncPtr is the pointer to the callback function.
-*
-* @return
-*
-* None.
-*
-* @note
-*
-* None.
-*
-******************************************************************************/
-void
-XEmac_SetSgRecvHandler(XEmac * InstancePtr, void *CallBackRef,
- XEmac_SgHandler FuncPtr)
-{
- /*
- * Asserted IsDmaSg here instead of run-time check because there is really
- * no ill-effects of setting these when not configured for scatter-gather.
- */
- XASSERT_VOID(InstancePtr != NULL);
- XASSERT_VOID(FuncPtr != NULL);
- XASSERT_VOID(XEmac_mIsSgDma(InstancePtr));
- XASSERT_VOID(InstancePtr->IsReady == XCOMPONENT_IS_READY);
-
- InstancePtr->SgRecvHandler = FuncPtr;
- InstancePtr->SgRecvRef = CallBackRef;
-}
-
-/*****************************************************************************/
-/**
-*
-* Set the callback function for handling confirmation of transmitted frames in
-* scatter-gather DMA mode. The upper layer software should call this function
-* during initialization. The callback is called once per frame sent. The head
-* of a descriptor list is passed in along with the number of descriptors in
-* the list. The callback is responsible for freeing buffers attached to these
-* descriptors.
-*
-* The callback is invoked by the driver within interrupt context, so it needs
-* to do its job quickly. If there are potentially slow operations within the
-* callback, these should be done at task-level.
-*
-* @param InstancePtr is a pointer to the XEmac instance to be worked on.
-* @param CallBackRef is a reference pointer to be passed back to the adapter in
-* the callback. This helps the adapter correlate the callback to a
-* particular driver.
-* @param FuncPtr is the pointer to the callback function.
-*
-* @return
-*
-* None.
-*
-* @note
-*
-* None.
-*
-******************************************************************************/
-void
-XEmac_SetSgSendHandler(XEmac * InstancePtr, void *CallBackRef,
- XEmac_SgHandler FuncPtr)
-{
- /*
- * Asserted IsDmaSg here instead of run-time check because there is really
- * no ill-effects of setting these when not configured for scatter-gather.
- */
- XASSERT_VOID(InstancePtr != NULL);
- XASSERT_VOID(FuncPtr != NULL);
- XASSERT_VOID(XEmac_mIsSgDma(InstancePtr));
- XASSERT_VOID(InstancePtr->IsReady == XCOMPONENT_IS_READY);
-
- InstancePtr->SgSendHandler = FuncPtr;
- InstancePtr->SgSendRef = CallBackRef;
-}
-
-/*****************************************************************************/
-/*
-*
-* Handle an interrupt from the DMA receive channel. DMA interrupts are:
-*
-* - DMA error. DMA encountered a bus error or timeout. This is a fatal error
-* that requires reset of the channel. The driver calls the error handler
-* of the upper layer software with an error code indicating the device should
-* be reset.
-* - Packet count threshold reached. For scatter-gather operations, indicates
-* the threshold for the number of packets not serviced by software has been
-* reached. The driver behaves as follows:
-* - Get the value of the packet counter, which tells us how many packets
-* are ready to be serviced
-* - For each packet
-* - For each descriptor, remove it from the scatter-gather list
-* - Check for the last descriptor in the frame, and if set
-* - Bump frame statistics
-* - Call the scatter-gather receive callback function
-* - Decrement the packet counter by one
-* Note that there are no receive errors reported in the status word of
-* the buffer descriptor. If receive errors occur, the MAC drops the
-* packet, and we only find out about the errors through various error
-* count registers.
-* - Packet wait bound reached. For scatter-gather, indicates the time to wait
-* for the next packet has expired. The driver follows the same logic as when
-* the packet count threshold interrupt is received.
-* - Scatter-gather end acknowledge. Hardware has reached the end of the
-* descriptor list. The driver follows the same logic as when the packet count
-* threshold interrupt is received. In addition, the driver restarts the DMA
-* scatter-gather channel in case there are newly inserted descriptors.
-*
-* @param InstancePtr is a pointer to the XEmac instance to be worked on.
-*
-* @return
-*
-* Although the function returns void, there are asynchronous errors that can
-* be generated (by calling the ErrorHandler) from this function. These are:
-* - XST_DMA_SG_LIST_EMPTY indicates we tried to get a buffer descriptor from the
-* DMA channel, but there was not one ready for software.
-* - XST_DMA_ERROR indicates a DMA bus error or timeout occurred. This is a fatal
-* error that requires reset.
-*
-* @note
-*
-* None.
-*
-******************************************************************************/
-static void
-HandleDmaRecvIntr(XEmac * InstancePtr)
-{
- u32 IntrStatus;
-
- /*
- * Read the interrupt status
- */
- IntrStatus = XDmaChannel_GetIntrStatus(&InstancePtr->RecvChannel);
-
- /*
- * For packet threshold or wait bound interrupts, process desciptors. Also
- * process descriptors on a SG end acknowledgement, which means the end of
- * the descriptor list has been reached by the hardware. For receive, this
- * is potentially trouble since it means the descriptor list is full,
- * unless software can process enough packets quickly enough so the
- * hardware has room to put new packets.
- */
- if (IntrStatus & (XDC_IXR_PKT_THRESHOLD_MASK |
- XDC_IXR_PKT_WAIT_BOUND_MASK | XDC_IXR_SG_END_MASK)) {
- XStatus Result = XST_SUCCESS;
- u32 NumFrames;
- u32 NumProcessed;
- u32 NumBuffers;
- u32 NumBytes;
- u32 IsLast;
- XBufDescriptor *FirstBdPtr;
- XBufDescriptor *BdPtr;
-
- /*
- * Get the number of unserviced packets
- */
- NumFrames = XDmaChannel_GetPktCount(&InstancePtr->RecvChannel);
-
- for (NumProcessed = 0; NumProcessed < NumFrames; NumProcessed++) {
- IsLast = FALSE;
- FirstBdPtr = NULL;
- NumBuffers = 0;
- NumBytes = 0;
-
- /*
- * For each packet, get the descriptor from the list. On the
- * last one in the frame, make the callback to the upper layer.
- */
- while (!IsLast) {
- Result =
- XDmaChannel_GetDescriptor(&InstancePtr->
- RecvChannel,
- &BdPtr);
- if (Result != XST_SUCCESS) {
- /*
- * An error getting a buffer descriptor from the list.
- * This should not happen, but if it does, report it to
- * the error callback and break out of the loops to service
- * other interrupts.
- */
- InstancePtr->ErrorHandler(InstancePtr->
- ErrorRef,
- Result);
- break;
- }
-
- /*
- * Keep a pointer to the first descriptor in the list, as it
- * will be passed to the upper layers in a bit. By the fact
- * that we received this packet means no errors occurred, so
- * no need to check the device status word for errors.
- */
- if (FirstBdPtr == NULL) {
- FirstBdPtr = BdPtr;
- }
-
- NumBytes += XBufDescriptor_GetLength(BdPtr);
-
- /*
- * Check to see if this is the last descriptor in the frame,
- * and if so, set the IsLast flag to get out of the loop.
- */
- if (XBufDescriptor_IsLastStatus(BdPtr)) {
- IsLast = TRUE;
- }
-
- /*
- * Bump the number of buffers in this packet
- */
- NumBuffers++;
-
- } /* end while loop */
-
- /*
- * Check for error that occurred inside the while loop, and break
- * out of the for loop if there was one so other interrupts can
- * be serviced.
- */
- if (Result != XST_SUCCESS) {
- break;
- }
-
- InstancePtr->Stats.RecvFrames++;
- InstancePtr->Stats.RecvBytes += NumBytes;
-
- /*
- * Make the callback to the upper layers, passing it the first
- * descriptor in the packet and the number of descriptors in the
- * packet.
- */
- InstancePtr->SgRecvHandler(InstancePtr->SgRecvRef,
- FirstBdPtr, NumBuffers);
-
- /*
- * Decrement the packet count register to reflect the fact we
- * just processed a packet
- */
- XDmaChannel_DecrementPktCount(&InstancePtr->
- RecvChannel);
-
- } /* end for loop */
-
- /*
- * If the interrupt was an end-ack, check the descriptor list again to
- * see if it is empty. If not, go ahead and restart the scatter-gather
- * channel. This is to fix a possible race condition where, on receive,
- * the driver attempted to start a scatter-gather channel that was
- * already started, which resulted in no action from the XDmaChannel
- * component. But, just after the XDmaChannel component saw that the
- * hardware was already started, the hardware stopped because it
- * reached the end of the list. In that case, this interrupt is
- * generated and we can restart the hardware here.
- */
- if (IntrStatus & XDC_IXR_SG_END_MASK) {
- /*
- * Ignore the return status since we know the list exists and we
- * don't care if the list is empty or the channel is already started.
- */
- (void) XDmaChannel_SgStart(&InstancePtr->RecvChannel);
- }
- }
-
- /*
- * All interrupts are handled (except the error below) so acknowledge
- * (clear) the interrupts by writing the value read above back to the status
- * register. The packet count interrupt must be acknowledged after the
- * decrement, otherwise it will come right back. We clear the interrupts
- * before we handle the error interrupt because the ErrorHandler should
- * result in a reset, which clears the interrupt status register. So we
- * don't want to toggle the interrupt back on by writing the interrupt
- * status register with an old value after a reset.
- */
- XDmaChannel_SetIntrStatus(&InstancePtr->RecvChannel, IntrStatus);
-
- /*
- * Check for DMA errors and call the error callback function if an error
- * occurred (DMA bus or timeout error), which should result in a reset of
- * the device by the upper layer software.
- */
- if (IntrStatus & XDC_IXR_DMA_ERROR_MASK) {
- InstancePtr->Stats.DmaErrors++;
- InstancePtr->ErrorHandler(InstancePtr->ErrorRef, XST_DMA_ERROR);
- }
-}
-
-/*****************************************************************************/
-/*
-*
-* Handle an interrupt from the DMA send channel. DMA interrupts are:
-*
-* - DMA error. DMA encountered a bus error or timeout. This is a fatal error
-* that requires reset of the channel. The driver calls the error handler
-* of the upper layer software with an error code indicating the device should
-* be reset.
-* - Packet count threshold reached. For scatter-gather operations, indicates
-* the threshold for the number of packets not serviced by software has been
-* reached. The driver behaves as follows:
-* - Get the value of the packet counter, which tells us how many packets
-* are ready to be serviced
-* - For each packet
-* - For each descriptor, remove it from the scatter-gather list
-* - Check for the last descriptor in the frame, and if set
-* - Bump frame statistics
-* - Call the scatter-gather receive callback function
-* - Decrement the packet counter by one
-* Note that there are no receive errors reported in the status word of
-* the buffer descriptor. If receive errors occur, the MAC drops the
-* packet, and we only find out about the errors through various error
-* count registers.
-* - Packet wait bound reached. For scatter-gather, indicates the time to wait
-* for the next packet has expired. The driver follows the same logic as when
-* the packet count threshold interrupt is received.
-* - Scatter-gather end acknowledge. Hardware has reached the end of the
-* descriptor list. The driver follows the same logic as when the packet count
-* threshold interrupt is received. In addition, the driver restarts the DMA
-* scatter-gather channel in case there are newly inserted descriptors.
-*
-* @param InstancePtr is a pointer to the XEmac instance to be worked on.
-*
-* @return
-*
-* Although the function returns void, there are asynchronous errors
-* that can be generated from this function. These are:
-* - XST_DMA_SG_LIST_EMPTY indicates we tried to get a buffer descriptor from
-* the DMA channel, but there was not one ready for software.
-* - XST_DMA_ERROR indicates a DMA bus error or timeout occurred. This is a
-* fatal error that requires reset.
-*
-* @note
-*
-* None.
-*
-******************************************************************************/
-static void
-HandleDmaSendIntr(XEmac * InstancePtr)
-{
- u32 IntrStatus;
-
- /*
- * Read the interrupt status
- */
- IntrStatus = XDmaChannel_GetIntrStatus(&InstancePtr->SendChannel);
-
- /*
- * For packet threshold or wait bound interrupt, process descriptors. Also
- * process descriptors on a SG end acknowledgement, which means the end of
- * the descriptor list has been reached by the hardware. For transmit,
- * this is a normal condition during times of light traffic. In fact, the
- * wait bound interrupt may be masked for transmit since the end-ack would
- * always occur before the wait bound expires.
- */
- if (IntrStatus & (XDC_IXR_PKT_THRESHOLD_MASK |
- XDC_IXR_PKT_WAIT_BOUND_MASK | XDC_IXR_SG_END_MASK)) {
- XStatus Result = XST_SUCCESS;
- u32 NumFrames;
- u32 NumProcessed;
- u32 NumBuffers;
- u32 NumBytes;
- u32 IsLast;
- XBufDescriptor *FirstBdPtr;
- XBufDescriptor *BdPtr;
-
- /*
- * Get the number of unserviced packets
- */
- NumFrames = XDmaChannel_GetPktCount(&InstancePtr->SendChannel);
-
- for (NumProcessed = 0; NumProcessed < NumFrames; NumProcessed++) {
- IsLast = FALSE;
- FirstBdPtr = NULL;
- NumBuffers = 0;
- NumBytes = 0;
-
- /*
- * For each frame, traverse the descriptor list and look for
- * errors. On the last one in the frame, make the callback.
- */
- while (!IsLast) {
- Result =
- XDmaChannel_GetDescriptor(&InstancePtr->
- SendChannel,
- &BdPtr);
- if (Result != XST_SUCCESS) {
- /*
- * An error getting a buffer descriptor from the list.
- * This should not happen, but if it does, report it to
- * the error callback and break out of the loops to service
- * other interrupts
- */
- InstancePtr->ErrorHandler(InstancePtr->
- ErrorRef,
- Result);
- break;
- }
-
- /*
- * Keep a pointer to the first descriptor in the list and
- * check the device status for errors. The device status is
- * only available in the first descriptor of a packet.
- */
- if (FirstBdPtr == NULL) {
- u32 XmitStatus;
-
- FirstBdPtr = BdPtr;
-
- XmitStatus =
- XBufDescriptor_GetDeviceStatus
- (BdPtr);
- if (XmitStatus &
- XEM_TSR_EXCESS_DEFERRAL_MASK) {
- InstancePtr->Stats.
- XmitExcessDeferral++;
- }
-
- if (XmitStatus &
- XEM_TSR_LATE_COLLISION_MASK) {
- InstancePtr->Stats.
- XmitLateCollisionErrors++;
- }
- }
-
- NumBytes += XBufDescriptor_GetLength(BdPtr);
-
- /*
- * Check to see if this is the last descriptor in the frame,
- * and if so, set the IsLast flag to get out of the loop. The
- * transmit channel must check the last bit in the control
- * word, not the status word (the DMA engine does not update
- * the last bit in the status word for the transmit direction).
- */
- if (XBufDescriptor_IsLastControl(BdPtr)) {
- IsLast = TRUE;
- }
-
- /*
- * Bump the number of buffers in this packet
- */
- NumBuffers++;
-
- } /* end while loop */
-
- /*
- * Check for error that occurred inside the while loop, and break
- * out of the for loop if there was one so other interrupts can
- * be serviced.
- */
- if (Result != XST_SUCCESS) {
- break;
- }
-
- InstancePtr->Stats.XmitFrames++;
- InstancePtr->Stats.XmitBytes += NumBytes;
-
- /*
- * Make the callback to the upper layers, passing it the first
- * descriptor in the packet and the number of descriptors in the
- * packet.
- */
- InstancePtr->SgSendHandler(InstancePtr->SgSendRef,
- FirstBdPtr, NumBuffers);
-
- /*
- * Decrement the packet count register to reflect the fact we
- * just processed a packet
- */
- XDmaChannel_DecrementPktCount(&InstancePtr->
- SendChannel);
-
- } /* end for loop */
-
- /*
- * If the interrupt was an end-ack, check the descriptor list again to
- * see if it is empty. If not, go ahead and restart the scatter-gather
- * channel. This is to fix a possible race condition where, on transmit,
- * the driver attempted to start a scatter-gather channel that was
- * already started, which resulted in no action from the XDmaChannel
- * component. But, just after the XDmaChannel component saw that the
- * hardware was already started, the hardware stopped because it
- * reached the end of the list. In that case, this interrupt is
- * generated and we can restart the hardware here.
- */
- if (IntrStatus & XDC_IXR_SG_END_MASK) {
- /*
- * Ignore the return status since we know the list exists and we
- * don't care if the list is empty or the channel is already started.
- */
- (void) XDmaChannel_SgStart(&InstancePtr->SendChannel);
- }
- }
-
- /*
- * All interrupts are handled (except the error below) so acknowledge
- * (clear) the interrupts by writing the value read above back to the status
- * register. The packet count interrupt must be acknowledged after the
- * decrement, otherwise it will come right back. We clear the interrupts
- * before we handle the error interrupt because the ErrorHandler should
- * result in a reset, which clears the interrupt status register. So we
- * don't want to toggle the interrupt back on by writing the interrupt
- * status register with an old value after a reset.
- */
- XDmaChannel_SetIntrStatus(&InstancePtr->SendChannel, IntrStatus);
-
- /*
- * Check for DMA errors and call the error callback function if an error
- * occurred (DMA bus or timeout error), which should result in a reset of
- * the device by the upper layer software.
- */
- if (IntrStatus & XDC_IXR_DMA_ERROR_MASK) {
- InstancePtr->Stats.DmaErrors++;
- InstancePtr->ErrorHandler(InstancePtr->ErrorRef, XST_DMA_ERROR);
- }
-}
-
-/*****************************************************************************/
-/*
-*
-* Handle an interrupt from the Ethernet MAC when configured with scatter-gather
-* DMA. The only interrupts handled in this case are errors.
-*
-* @param InstancePtr is a pointer to the XEmac instance to be worked on.
-*
-* @return
-*
-* None.
-*
-* @note
-*
-* None.
-*
-******************************************************************************/
-static void
-HandleEmacDmaIntr(XEmac * InstancePtr)
-{
- u32 IntrStatus;
-
- /*
- * When configured with DMA, the EMAC generates interrupts only when errors
- * occur. We clear the interrupts immediately so that any latched status
- * interrupt bits will reflect the true status of the device, and so any
- * pulsed interrupts (non-status) generated during the Isr will not be lost.
- */
- IntrStatus = XIIF_V123B_READ_IISR(InstancePtr->BaseAddress);
- XIIF_V123B_WRITE_IISR(InstancePtr->BaseAddress, IntrStatus);
-
- /*
- * Check the MAC for errors
- */
- XEmac_CheckEmacError(InstancePtr, IntrStatus);
-}
diff --git a/board/xilinx/xilinx_enet/xemac_l.h b/board/xilinx/xilinx_enet/xemac_l.h
deleted file mode 100644
index a463937dbd..0000000000
--- a/board/xilinx/xilinx_enet/xemac_l.h
+++ /dev/null
@@ -1,462 +0,0 @@
-/******************************************************************************
-*
-* Author: Xilinx, Inc.
-*
-*
-* This program is free software; you can redistribute it and/or modify it
-* under the terms of the GNU General Public License as published by the
-* Free Software Foundation; either version 2 of the License, or (at your
-* option) any later version.
-*
-*
-* XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A
-* COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS
-* ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD,
-* XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE
-* FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING
-* ANY THIRD PARTY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.
-* XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO
-* THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY
-* WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM
-* CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND
-* FITNESS FOR A PARTICULAR PURPOSE.
-*
-*
-* Xilinx hardware products are not intended for use in life support
-* appliances, devices, or systems. Use in such applications is
-* expressly prohibited.
-*
-*
-* (c) Copyright 2002-2004 Xilinx Inc.
-* All rights reserved.
-*
-*
-* You should have received a copy of the GNU General Public License along
-* with this program; if not, write to the Free Software Foundation, Inc.,
-* 675 Mass Ave, Cambridge, MA 02139, USA.
-*
-******************************************************************************/
-/*****************************************************************************/
-/**
-*
-* @file xemac_l.h
-*
-* This header file contains identifiers and low-level driver functions (or
-* macros) that can be used to access the device. High-level driver functions
-* are defined in xemac.h.
-*
-* <pre>
-* MODIFICATION HISTORY:
-*
-* Ver Who Date Changes
-* ----- ---- -------- -----------------------------------------------
-* 1.00b rpm 04/26/02 First release
-* 1.00b rmm 09/23/02 Added XEmac_mPhyReset macro
-* 1.00c rpm 12/05/02 New version includes support for simple DMA
-* </pre>
-*
-******************************************************************************/
-
-#ifndef XEMAC_L_H /* prevent circular inclusions */
-#define XEMAC_L_H /* by using protection macros */
-
-/***************************** Include Files *********************************/
-
-#include "xbasic_types.h"
-#include "xio.h"
-
-/************************** Constant Definitions *****************************/
-
-/* Offset of the MAC registers from the IPIF base address */
-#define XEM_REG_OFFSET 0x1100UL
-
-/*
- * Register offsets for the Ethernet MAC. Each register is 32 bits.
- */
-#define XEM_EMIR_OFFSET (XEM_REG_OFFSET + 0x0) /* EMAC Module ID */
-#define XEM_ECR_OFFSET (XEM_REG_OFFSET + 0x4) /* MAC Control */
-#define XEM_IFGP_OFFSET (XEM_REG_OFFSET + 0x8) /* Interframe Gap */
-#define XEM_SAH_OFFSET (XEM_REG_OFFSET + 0xC) /* Station addr, high */
-#define XEM_SAL_OFFSET (XEM_REG_OFFSET + 0x10) /* Station addr, low */
-#define XEM_MGTCR_OFFSET (XEM_REG_OFFSET + 0x14) /* MII mgmt control */
-#define XEM_MGTDR_OFFSET (XEM_REG_OFFSET + 0x18) /* MII mgmt data */
-#define XEM_RPLR_OFFSET (XEM_REG_OFFSET + 0x1C) /* Rx packet length */
-#define XEM_TPLR_OFFSET (XEM_REG_OFFSET + 0x20) /* Tx packet length */
-#define XEM_TSR_OFFSET (XEM_REG_OFFSET + 0x24) /* Tx status */
-#define XEM_RMFC_OFFSET (XEM_REG_OFFSET + 0x28) /* Rx missed frames */
-#define XEM_RCC_OFFSET (XEM_REG_OFFSET + 0x2C) /* Rx collisions */
-#define XEM_RFCSEC_OFFSET (XEM_REG_OFFSET + 0x30) /* Rx FCS errors */
-#define XEM_RAEC_OFFSET (XEM_REG_OFFSET + 0x34) /* Rx alignment errors */
-#define XEM_TEDC_OFFSET (XEM_REG_OFFSET + 0x38) /* Transmit excess
- * deferral cnt */
-
-/*
- * Register offsets for the IPIF components
- */
-#define XEM_ISR_OFFSET 0x20UL /* Interrupt status */
-
-#define XEM_DMA_OFFSET 0x2300UL
-#define XEM_DMA_SEND_OFFSET (XEM_DMA_OFFSET + 0x0) /* DMA send channel */
-#define XEM_DMA_RECV_OFFSET (XEM_DMA_OFFSET + 0x40) /* DMA recv channel */
-
-#define XEM_PFIFO_OFFSET 0x2000UL
-#define XEM_PFIFO_TXREG_OFFSET (XEM_PFIFO_OFFSET + 0x0) /* Tx registers */
-#define XEM_PFIFO_RXREG_OFFSET (XEM_PFIFO_OFFSET + 0x10) /* Rx registers */
-#define XEM_PFIFO_TXDATA_OFFSET (XEM_PFIFO_OFFSET + 0x100) /* Tx keyhole */
-#define XEM_PFIFO_RXDATA_OFFSET (XEM_PFIFO_OFFSET + 0x200) /* Rx keyhole */
-
-/*
- * EMAC Module Identification Register (EMIR)
- */
-#define XEM_EMIR_VERSION_MASK 0xFFFF0000UL /* Device version */
-#define XEM_EMIR_TYPE_MASK 0x0000FF00UL /* Device type */
-
-/*
- * EMAC Control Register (ECR)
- */
-#define XEM_ECR_FULL_DUPLEX_MASK 0x80000000UL /* Full duplex mode */
-#define XEM_ECR_XMIT_RESET_MASK 0x40000000UL /* Reset transmitter */
-#define XEM_ECR_XMIT_ENABLE_MASK 0x20000000UL /* Enable transmitter */
-#define XEM_ECR_RECV_RESET_MASK 0x10000000UL /* Reset receiver */
-#define XEM_ECR_RECV_ENABLE_MASK 0x08000000UL /* Enable receiver */
-#define XEM_ECR_PHY_ENABLE_MASK 0x04000000UL /* Enable PHY */
-#define XEM_ECR_XMIT_PAD_ENABLE_MASK 0x02000000UL /* Enable xmit pad insert */
-#define XEM_ECR_XMIT_FCS_ENABLE_MASK 0x01000000UL /* Enable xmit FCS insert */
-#define XEM_ECR_XMIT_ADDR_INSERT_MASK 0x00800000UL /* Enable xmit source addr
- * insertion */
-#define XEM_ECR_XMIT_ERROR_INSERT_MASK 0x00400000UL /* Insert xmit error */
-#define XEM_ECR_XMIT_ADDR_OVWRT_MASK 0x00200000UL /* Enable xmit source addr
- * overwrite */
-#define XEM_ECR_LOOPBACK_MASK 0x00100000UL /* Enable internal
- * loopback */
-#define XEM_ECR_RECV_STRIP_ENABLE_MASK 0x00080000UL /* Enable recv pad/fcs strip */
-#define XEM_ECR_UNICAST_ENABLE_MASK 0x00020000UL /* Enable unicast addr */
-#define XEM_ECR_MULTI_ENABLE_MASK 0x00010000UL /* Enable multicast addr */
-#define XEM_ECR_BROAD_ENABLE_MASK 0x00008000UL /* Enable broadcast addr */
-#define XEM_ECR_PROMISC_ENABLE_MASK 0x00004000UL /* Enable promiscuous mode */
-#define XEM_ECR_RECV_ALL_MASK 0x00002000UL /* Receive all frames */
-#define XEM_ECR_RESERVED2_MASK 0x00001000UL /* Reserved */
-#define XEM_ECR_MULTI_HASH_ENABLE_MASK 0x00000800UL /* Enable multicast hash */
-#define XEM_ECR_PAUSE_FRAME_MASK 0x00000400UL /* Interpret pause frames */
-#define XEM_ECR_CLEAR_HASH_MASK 0x00000200UL /* Clear hash table */
-#define XEM_ECR_ADD_HASH_ADDR_MASK 0x00000100UL /* Add hash table address */
-
-/*
- * Interframe Gap Register (IFGR)
- */
-#define XEM_IFGP_PART1_MASK 0xF8000000UL /* Interframe Gap Part1 */
-#define XEM_IFGP_PART1_SHIFT 27
-#define XEM_IFGP_PART2_MASK 0x07C00000UL /* Interframe Gap Part2 */
-#define XEM_IFGP_PART2_SHIFT 22
-
-/*
- * Station Address High Register (SAH)
- */
-#define XEM_SAH_ADDR_MASK 0x0000FFFFUL /* Station address high bytes */
-
-/*
- * Station Address Low Register (SAL)
- */
-#define XEM_SAL_ADDR_MASK 0xFFFFFFFFUL /* Station address low bytes */
-
-/*
- * MII Management Control Register (MGTCR)
- */
-#define XEM_MGTCR_START_MASK 0x80000000UL /* Start/Busy */
-#define XEM_MGTCR_RW_NOT_MASK 0x40000000UL /* Read/Write Not (direction) */
-#define XEM_MGTCR_PHY_ADDR_MASK 0x3E000000UL /* PHY address */
-#define XEM_MGTCR_PHY_ADDR_SHIFT 25 /* PHY address shift */
-#define XEM_MGTCR_REG_ADDR_MASK 0x01F00000UL /* Register address */
-#define XEM_MGTCR_REG_ADDR_SHIFT 20 /* Register addr shift */
-#define XEM_MGTCR_MII_ENABLE_MASK 0x00080000UL /* Enable MII from EMAC */
-#define XEM_MGTCR_RD_ERROR_MASK 0x00040000UL /* MII mgmt read error */
-
-/*
- * MII Management Data Register (MGTDR)
- */
-#define XEM_MGTDR_DATA_MASK 0x0000FFFFUL /* MII data */
-
-/*
- * Receive Packet Length Register (RPLR)
- */
-#define XEM_RPLR_LENGTH_MASK 0x0000FFFFUL /* Receive packet length */
-
-/*
- * Transmit Packet Length Register (TPLR)
- */
-#define XEM_TPLR_LENGTH_MASK 0x0000FFFFUL /* Transmit packet length */
-
-/*
- * Transmit Status Register (TSR)
- */
-#define XEM_TSR_EXCESS_DEFERRAL_MASK 0x80000000UL /* Transmit excess deferral */
-#define XEM_TSR_FIFO_UNDERRUN_MASK 0x40000000UL /* Packet FIFO underrun */
-#define XEM_TSR_ATTEMPTS_MASK 0x3E000000UL /* Transmission attempts */
-#define XEM_TSR_LATE_COLLISION_MASK 0x01000000UL /* Transmit late collision */
-
-/*
- * Receive Missed Frame Count (RMFC)
- */
-#define XEM_RMFC_DATA_MASK 0x0000FFFFUL
-
-/*
- * Receive Collision Count (RCC)
- */
-#define XEM_RCC_DATA_MASK 0x0000FFFFUL
-
-/*
- * Receive FCS Error Count (RFCSEC)
- */
-#define XEM_RFCSEC_DATA_MASK 0x0000FFFFUL
-
-/*
- * Receive Alignment Error Count (RALN)
- */
-#define XEM_RAEC_DATA_MASK 0x0000FFFFUL
-
-/*
- * Transmit Excess Deferral Count (TEDC)
- */
-#define XEM_TEDC_DATA_MASK 0x0000FFFFUL
-
-/*
- * EMAC Interrupt Registers (Status and Enable) masks. These registers are
- * part of the IPIF IP Interrupt registers
- */
-#define XEM_EIR_XMIT_DONE_MASK 0x00000001UL /* Xmit complete */
-#define XEM_EIR_RECV_DONE_MASK 0x00000002UL /* Recv complete */
-#define XEM_EIR_XMIT_ERROR_MASK 0x00000004UL /* Xmit error */
-#define XEM_EIR_RECV_ERROR_MASK 0x00000008UL /* Recv error */
-#define XEM_EIR_XMIT_SFIFO_EMPTY_MASK 0x00000010UL /* Xmit status fifo empty */
-#define XEM_EIR_RECV_LFIFO_EMPTY_MASK 0x00000020UL /* Recv length fifo empty */
-#define XEM_EIR_XMIT_LFIFO_FULL_MASK 0x00000040UL /* Xmit length fifo full */
-#define XEM_EIR_RECV_LFIFO_OVER_MASK 0x00000080UL /* Recv length fifo
- * overrun */
-#define XEM_EIR_RECV_LFIFO_UNDER_MASK 0x00000100UL /* Recv length fifo
- * underrun */
-#define XEM_EIR_XMIT_SFIFO_OVER_MASK 0x00000200UL /* Xmit status fifo
- * overrun */
-#define XEM_EIR_XMIT_SFIFO_UNDER_MASK 0x00000400UL /* Transmit status fifo
- * underrun */
-#define XEM_EIR_XMIT_LFIFO_OVER_MASK 0x00000800UL /* Transmit length fifo
- * overrun */
-#define XEM_EIR_XMIT_LFIFO_UNDER_MASK 0x00001000UL /* Transmit length fifo
- * underrun */
-#define XEM_EIR_XMIT_PAUSE_MASK 0x00002000UL /* Transmit pause pkt
- * received */
-#define XEM_EIR_RECV_DFIFO_OVER_MASK 0x00004000UL /* Receive data fifo
- * overrun */
-#define XEM_EIR_RECV_MISSED_FRAME_MASK 0x00008000UL /* Receive missed frame
- * error */
-#define XEM_EIR_RECV_COLLISION_MASK 0x00010000UL /* Receive collision
- * error */
-#define XEM_EIR_RECV_FCS_ERROR_MASK 0x00020000UL /* Receive FCS error */
-#define XEM_EIR_RECV_LEN_ERROR_MASK 0x00040000UL /* Receive length field
- * error */
-#define XEM_EIR_RECV_SHORT_ERROR_MASK 0x00080000UL /* Receive short frame
- * error */
-#define XEM_EIR_RECV_LONG_ERROR_MASK 0x00100000UL /* Receive long frame
- * error */
-#define XEM_EIR_RECV_ALIGN_ERROR_MASK 0x00200000UL /* Receive alignment
- * error */
-
-/**************************** Type Definitions *******************************/
-
-/***************** Macros (Inline Functions) Definitions *********************/
-
-/*****************************************************************************
-*
-* Low-level driver macros and functions. The list below provides signatures
-* to help the user use the macros.
-*
-* u32 XEmac_mReadReg(u32 BaseAddress, int RegOffset)
-* void XEmac_mWriteReg(u32 BaseAddress, int RegOffset, u32 Mask)
-*
-* void XEmac_mSetControlReg(u32 BaseAddress, u32 Mask)
-* void XEmac_mSetMacAddress(u32 BaseAddress, u8 *AddressPtr)
-*
-* void XEmac_mEnable(u32 BaseAddress)
-* void XEmac_mDisable(u32 BaseAddress)
-*
-* u32 XEmac_mIsTxDone(u32 BaseAddress)
-* u32 XEmac_mIsRxEmpty(u32 BaseAddress)
-*
-* void XEmac_SendFrame(u32 BaseAddress, u8 *FramePtr, int Size)
-* int XEmac_RecvFrame(u32 BaseAddress, u8 *FramePtr)
-*
-*****************************************************************************/
-
-/****************************************************************************/
-/**
-*
-* Read the given register.
-*
-* @param BaseAddress is the base address of the device
-* @param RegOffset is the register offset to be read
-*
-* @return The 32-bit value of the register
-*
-* @note None.
-*
-*****************************************************************************/
-#define XEmac_mReadReg(BaseAddress, RegOffset) \
- XIo_In32((BaseAddress) + (RegOffset))
-
-/****************************************************************************/
-/**
-*
-* Write the given register.
-*
-* @param BaseAddress is the base address of the device
-* @param RegOffset is the register offset to be written
-* @param Data is the 32-bit value to write to the register
-*
-* @return None.
-*
-* @note None.
-*
-*****************************************************************************/
-#define XEmac_mWriteReg(BaseAddress, RegOffset, Data) \
- XIo_Out32((BaseAddress) + (RegOffset), (Data))
-
-/****************************************************************************/
-/**
-*
-* Set the contents of the control register. Use the XEM_ECR_* constants
-* defined above to create the bit-mask to be written to the register.
-*
-* @param BaseAddress is the base address of the device
-* @param Mask is the 16-bit value to write to the control register
-*
-* @return None.
-*
-* @note None.
-*
-*****************************************************************************/
-#define XEmac_mSetControlReg(BaseAddress, Mask) \
- XIo_Out32((BaseAddress) + XEM_ECR_OFFSET, (Mask))
-
-/****************************************************************************/
-/**
-*
-* Set the station address of the EMAC device.
-*
-* @param BaseAddress is the base address of the device
-* @param AddressPtr is a pointer to a 6-byte MAC address
-*
-* @return None.
-*
-* @note None.
-*
-*****************************************************************************/
-#define XEmac_mSetMacAddress(BaseAddress, AddressPtr) \
-{ \
- u32 MacAddr; \
- \
- MacAddr = ((AddressPtr)[0] << 8) | (AddressPtr)[1]; \
- XIo_Out32((BaseAddress) + XEM_SAH_OFFSET, MacAddr); \
- \
- MacAddr = ((AddressPtr)[2] << 24) | ((AddressPtr)[3] << 16) | \
- ((AddressPtr)[4] << 8) | (AddressPtr)[5]; \
- \
- XIo_Out32((BaseAddress) + XEM_SAL_OFFSET, MacAddr); \
-}
-
-/****************************************************************************/
-/**
-*
-* Enable the transmitter and receiver. Preserve the contents of the control
-* register.
-*
-* @param BaseAddress is the base address of the device
-*
-* @return None.
-*
-* @note None.
-*
-*****************************************************************************/
-#define XEmac_mEnable(BaseAddress) \
-{ \
- u32 Control; \
- Control = XIo_In32((BaseAddress) + XEM_ECR_OFFSET); \
- Control &= ~(XEM_ECR_XMIT_RESET_MASK | XEM_ECR_RECV_RESET_MASK); \
- Control |= (XEM_ECR_XMIT_ENABLE_MASK | XEM_ECR_RECV_ENABLE_MASK); \
- XIo_Out32((BaseAddress) + XEM_ECR_OFFSET, Control); \
-}
-
-/****************************************************************************/
-/**
-*
-* Disable the transmitter and receiver. Preserve the contents of the control
-* register.
-*
-* @param BaseAddress is the base address of the device
-*
-* @return None.
-*
-* @note None.
-*
-*****************************************************************************/
-#define XEmac_mDisable(BaseAddress) \
- XIo_Out32((BaseAddress) + XEM_ECR_OFFSET, \
- XIo_In32((BaseAddress) + XEM_ECR_OFFSET) & \
- ~(XEM_ECR_XMIT_ENABLE_MASK | XEM_ECR_RECV_ENABLE_MASK))
-
-/****************************************************************************/
-/**
-*
-* Check to see if the transmission is complete.
-*
-* @param BaseAddress is the base address of the device
-*
-* @return TRUE if it is done, or FALSE if it is not.
-*
-* @note None.
-*
-*****************************************************************************/
-#define XEmac_mIsTxDone(BaseAddress) \
- (XIo_In32((BaseAddress) + XEM_ISR_OFFSET) & XEM_EIR_XMIT_DONE_MASK)
-
-/****************************************************************************/
-/**
-*
-* Check to see if the receive FIFO is empty.
-*
-* @param BaseAddress is the base address of the device
-*
-* @return TRUE if it is empty, or FALSE if it is not.
-*
-* @note None.
-*
-*****************************************************************************/
-#define XEmac_mIsRxEmpty(BaseAddress) \
- (!(XIo_In32((BaseAddress) + XEM_ISR_OFFSET) & XEM_EIR_RECV_DONE_MASK))
-
-/****************************************************************************/
-/**
-*
-* Reset MII compliant PHY
-*
-* @param BaseAddress is the base address of the device
-*
-* @return None.
-*
-* @note None.
-*
-*****************************************************************************/
-#define XEmac_mPhyReset(BaseAddress) \
-{ \
- u32 Control; \
- Control = XIo_In32((BaseAddress) + XEM_ECR_OFFSET); \
- Control &= ~XEM_ECR_PHY_ENABLE_MASK; \
- XIo_Out32((BaseAddress) + XEM_ECR_OFFSET, Control); \
- Control |= XEM_ECR_PHY_ENABLE_MASK; \
- XIo_Out32((BaseAddress) + XEM_ECR_OFFSET, Control); \
-}
-
-/************************** Function Prototypes ******************************/
-
-void XEmac_SendFrame(u32 BaseAddress, u8 * FramePtr, int Size);
-int XEmac_RecvFrame(u32 BaseAddress, u8 * FramePtr);
-
-#endif /* end of protection macro */
diff --git a/board/xilinx/xilinx_enet/xemac_options.c b/board/xilinx/xilinx_enet/xemac_options.c
deleted file mode 100644
index 1f225f8f52..0000000000
--- a/board/xilinx/xilinx_enet/xemac_options.c
+++ /dev/null
@@ -1,318 +0,0 @@
-/******************************************************************************
-*
-* Author: Xilinx, Inc.
-*
-*
-* This program is free software; you can redistribute it and/or modify it
-* under the terms of the GNU General Public License as published by the
-* Free Software Foundation; either version 2 of the License, or (at your
-* option) any later version.
-*
-*
-* XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A
-* COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS
-* ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD,
-* XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE
-* FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING
-* ANY THIRD PARTY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.
-* XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO
-* THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY
-* WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM
-* CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND
-* FITNESS FOR A PARTICULAR PURPOSE.
-*
-*
-* Xilinx hardware products are not intended for use in life support
-* appliances, devices, or systems. Use in such applications is
-* expressly prohibited.
-*
-*
-* (c) Copyright 2002-2004 Xilinx Inc.
-* All rights reserved.
-*
-*
-* You should have received a copy of the GNU General Public License along
-* with this program; if not, write to the Free Software Foundation, Inc.,
-* 675 Mass Ave, Cambridge, MA 02139, USA.
-*
-******************************************************************************/
-/*****************************************************************************/
-/**
-*
-* @file xemac_options.c
-*
-* Functions in this file handle configuration of the XEmac driver.
-*
-* <pre>
-* MODIFICATION HISTORY:
-*
-* Ver Who Date Changes
-* ----- ---- -------- -----------------------------------------------
-* 1.00a rpm 07/31/01 First release
-* 1.00b rpm 02/20/02 Repartitioned files and functions
-* 1.00c rpm 12/05/02 New version includes support for simple DMA
-* </pre>
-*
-******************************************************************************/
-
-/***************************** Include Files *********************************/
-
-#include "xbasic_types.h"
-#include "xemac_i.h"
-#include "xio.h"
-
-/************************** Constant Definitions *****************************/
-
-#define XEM_MAX_IFG 32 /* Maximum Interframe gap value */
-
-/**************************** Type Definitions *******************************/
-
-/***************** Macros (Inline Functions) Definitions *********************/
-
-/************************** Function Prototypes ******************************/
-
-/************************** Variable Definitions *****************************/
-
-/*
- * A table of options and masks. This table maps the user-visible options with
- * the control register masks. It is used in Set/GetOptions as an alternative
- * to a series of if/else pairs. Note that the polled options does not have a
- * corresponding entry in the control register, so it does not exist in the
- * table.
- */
-typedef struct {
- u32 Option;
- u32 Mask;
-} OptionMap;
-
-static OptionMap OptionsTable[] = {
- {XEM_UNICAST_OPTION, XEM_ECR_UNICAST_ENABLE_MASK},
- {XEM_BROADCAST_OPTION, XEM_ECR_BROAD_ENABLE_MASK},
- {XEM_PROMISC_OPTION, XEM_ECR_PROMISC_ENABLE_MASK},
- {XEM_FDUPLEX_OPTION, XEM_ECR_FULL_DUPLEX_MASK},
- {XEM_LOOPBACK_OPTION, XEM_ECR_LOOPBACK_MASK},
- {XEM_MULTICAST_OPTION, XEM_ECR_MULTI_ENABLE_MASK},
- {XEM_FLOW_CONTROL_OPTION, XEM_ECR_PAUSE_FRAME_MASK},
- {XEM_INSERT_PAD_OPTION, XEM_ECR_XMIT_PAD_ENABLE_MASK},
- {XEM_INSERT_FCS_OPTION, XEM_ECR_XMIT_FCS_ENABLE_MASK},
- {XEM_INSERT_ADDR_OPTION, XEM_ECR_XMIT_ADDR_INSERT_MASK},
- {XEM_OVWRT_ADDR_OPTION, XEM_ECR_XMIT_ADDR_OVWRT_MASK},
- {XEM_STRIP_PAD_FCS_OPTION, XEM_ECR_RECV_STRIP_ENABLE_MASK}
-};
-
-#define XEM_NUM_OPTIONS (sizeof(OptionsTable) / sizeof(OptionMap))
-
-/*****************************************************************************/
-/**
-*
-* Set Ethernet driver/device options. The device must be stopped before
-* calling this function. The options are contained within a bit-mask with each
-* bit representing an option (i.e., you can OR the options together). A one (1)
-* in the bit-mask turns an option on, and a zero (0) turns the option off.
-*
-* @param InstancePtr is a pointer to the XEmac instance to be worked on.
-* @param OptionsFlag is a bit-mask representing the Ethernet options to turn on
-* or off. See xemac.h for a description of the available options.
-*
-* @return
-*
-* - XST_SUCCESS if the options were set successfully
-* - XST_DEVICE_IS_STARTED if the device has not yet been stopped
-*
-* @note
-*
-* This function is not thread-safe and makes use of internal resources that are
-* shared between the Start, Stop, and SetOptions functions, so if one task
-* might be setting device options while another is trying to start the device,
-* protection of this shared data (typically using a semaphore) is required.
-*
-******************************************************************************/
-XStatus
-XEmac_SetOptions(XEmac * InstancePtr, u32 OptionsFlag)
-{
- u32 ControlReg;
- int Index;
-
- XASSERT_NONVOID(InstancePtr != NULL);
- XASSERT_NONVOID(InstancePtr->IsReady == XCOMPONENT_IS_READY);
-
- if (InstancePtr->IsStarted == XCOMPONENT_IS_STARTED) {
- return XST_DEVICE_IS_STARTED;
- }
-
- ControlReg = XIo_In32(InstancePtr->BaseAddress + XEM_ECR_OFFSET);
-
- /*
- * Loop through the options table, turning the option on or off
- * depending on whether the bit is set in the incoming options flag.
- */
- for (Index = 0; Index < XEM_NUM_OPTIONS; Index++) {
- if (OptionsFlag & OptionsTable[Index].Option) {
- ControlReg |= OptionsTable[Index].Mask; /* turn it on */
- } else {
- ControlReg &= ~OptionsTable[Index].Mask; /* turn it off */
- }
- }
-
- /*
- * TODO: need to validate addr-overwrite only if addr-insert?
- */
-
- /*
- * Now write the control register. Leave it to the upper layers
- * to restart the device.
- */
- XIo_Out32(InstancePtr->BaseAddress + XEM_ECR_OFFSET, ControlReg);
-
- /*
- * Check the polled option
- */
- if (OptionsFlag & XEM_POLLED_OPTION) {
- InstancePtr->IsPolled = TRUE;
- } else {
- InstancePtr->IsPolled = FALSE;
- }
-
- return XST_SUCCESS;
-}
-
-/*****************************************************************************/
-/**
-*
-* Get Ethernet driver/device options. The 32-bit value returned is a bit-mask
-* representing the options. A one (1) in the bit-mask means the option is on,
-* and a zero (0) means the option is off.
-*
-* @param InstancePtr is a pointer to the XEmac instance to be worked on.
-*
-* @return
-*
-* The 32-bit value of the Ethernet options. The value is a bit-mask
-* representing all options that are currently enabled. See xemac.h for a
-* description of the available options.
-*
-* @note
-*
-* None.
-*
-******************************************************************************/
-u32
-XEmac_GetOptions(XEmac * InstancePtr)
-{
- u32 OptionsFlag = 0;
- u32 ControlReg;
- int Index;
-
- XASSERT_NONVOID(InstancePtr != NULL);
- XASSERT_NONVOID(InstancePtr->IsReady == XCOMPONENT_IS_READY);
-
- /*
- * Get the control register to determine which options are currently set.
- */
- ControlReg = XIo_In32(InstancePtr->BaseAddress + XEM_ECR_OFFSET);
-
- /*
- * Loop through the options table to determine which options are set
- */
- for (Index = 0; Index < XEM_NUM_OPTIONS; Index++) {
- if (ControlReg & OptionsTable[Index].Mask) {
- OptionsFlag |= OptionsTable[Index].Option;
- }
- }
-
- if (InstancePtr->IsPolled) {
- OptionsFlag |= XEM_POLLED_OPTION;
- }
-
- return OptionsFlag;
-}
-
-/*****************************************************************************/
-/**
-*
-* Set the Interframe Gap (IFG), which is the time the MAC delays between
-* transmitting frames. There are two parts required. The total interframe gap
-* is the total of the two parts. The values provided for the Part1 and Part2
-* parameters are multiplied by 4 to obtain the bit-time interval. The first
-* part should be the first 2/3 of the total interframe gap. The MAC will reset
-* the interframe gap timer if carrier sense becomes true during the period
-* defined by interframe gap Part1. Part1 may be shorter than 2/3 the total and
-* can be as small as zero. The second part should be the last 1/3 of the total
-* interframe gap, but can be as large as the total interframe gap. The MAC
-* will not reset the interframe gap timer if carrier sense becomes true during
-* the period defined by interframe gap Part2.
-*
-* The device must be stopped before setting the interframe gap.
-*
-* @param InstancePtr is a pointer to the XEmac instance to be worked on.
-* @param Part1 is the interframe gap part 1 (which will be multiplied by 4 to
-* get the bit-time interval).
-* @param Part2 is the interframe gap part 2 (which will be multiplied by 4 to
-* get the bit-time interval).
-*
-* @return
-*
-* - XST_SUCCESS if the interframe gap was set successfully
-* - XST_DEVICE_IS_STARTED if the device has not been stopped
-*
-* @note
-*
-* None.
-*
-******************************************************************************/
-XStatus
-XEmac_SetInterframeGap(XEmac * InstancePtr, u8 Part1, u8 Part2)
-{
- u32 Ifg;
-
- XASSERT_NONVOID(InstancePtr != NULL);
- XASSERT_NONVOID(Part1 < XEM_MAX_IFG);
- XASSERT_NONVOID(Part2 < XEM_MAX_IFG);
- XASSERT_NONVOID(InstancePtr->IsReady == XCOMPONENT_IS_READY);
-
- /*
- * Be sure device has been stopped
- */
- if (InstancePtr->IsStarted == XCOMPONENT_IS_STARTED) {
- return XST_DEVICE_IS_STARTED;
- }
-
- Ifg = Part1 << XEM_IFGP_PART1_SHIFT;
- Ifg |= (Part2 << XEM_IFGP_PART2_SHIFT);
- XIo_Out32(InstancePtr->BaseAddress + XEM_IFGP_OFFSET, Ifg);
-
- return XST_SUCCESS;
-}
-
-/*****************************************************************************/
-/**
-*
-* Get the interframe gap, parts 1 and 2. See the description of interframe gap
-* above in XEmac_SetInterframeGap().
-*
-* @param InstancePtr is a pointer to the XEmac instance to be worked on.
-* @param Part1Ptr is a pointer to an 8-bit buffer into which the interframe gap
-* part 1 value will be copied.
-* @param Part2Ptr is a pointer to an 8-bit buffer into which the interframe gap
-* part 2 value will be copied.
-*
-* @return
-*
-* None. The values of the interframe gap parts are copied into the
-* output parameters.
-*
-******************************************************************************/
-void
-XEmac_GetInterframeGap(XEmac * InstancePtr, u8 * Part1Ptr, u8 * Part2Ptr)
-{
- u32 Ifg;
-
- XASSERT_VOID(InstancePtr != NULL);
- XASSERT_VOID(Part1Ptr != NULL);
- XASSERT_VOID(Part2Ptr != NULL);
- XASSERT_VOID(InstancePtr->IsReady == XCOMPONENT_IS_READY);
-
- Ifg = XIo_In32(InstancePtr->BaseAddress + XEM_IFGP_OFFSET);
- *Part1Ptr = (Ifg & XEM_IFGP_PART1_MASK) >> XEM_IFGP_PART1_SHIFT;
- *Part2Ptr = (Ifg & XEM_IFGP_PART2_MASK) >> XEM_IFGP_PART2_SHIFT;
-}
diff --git a/board/xilinx/xilinx_enet/xemac_polled.c b/board/xilinx/xilinx_enet/xemac_polled.c
deleted file mode 100644
index 23768bca79..0000000000
--- a/board/xilinx/xilinx_enet/xemac_polled.c
+++ /dev/null
@@ -1,482 +0,0 @@
-/******************************************************************************
-*
-* Author: Xilinx, Inc.
-*
-*
-* This program is free software; you can redistribute it and/or modify it
-* under the terms of the GNU General Public License as published by the
-* Free Software Foundation; either version 2 of the License, or (at your
-* option) any later version.
-*
-*
-* XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A
-* COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS
-* ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD,
-* XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE
-* FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING
-* ANY THIRD PARTY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.
-* XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO
-* THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY
-* WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM
-* CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND
-* FITNESS FOR A PARTICULAR PURPOSE.
-*
-*
-* Xilinx hardware products are not intended for use in life support
-* appliances, devices, or systems. Use in such applications is
-* expressly prohibited.
-*
-*
-* (c) Copyright 2002-2004 Xilinx Inc.
-* All rights reserved.
-*
-*
-* You should have received a copy of the GNU General Public License along
-* with this program; if not, write to the Free Software Foundation, Inc.,
-* 675 Mass Ave, Cambridge, MA 02139, USA.
-*
-******************************************************************************/
-/*****************************************************************************/
-/**
-*
-* @file xemac_polled.c
-*
-* Contains functions used when the driver is in polled mode. Use the
-* XEmac_SetOptions() function to put the driver into polled mode.
-*
-* <pre>
-* MODIFICATION HISTORY:
-*
-* Ver Who Date Changes
-* ----- ---- -------- -----------------------------------------------
-* 1.00a rpm 07/31/01 First release
-* 1.00b rpm 02/20/02 Repartitioned files and functions
-* 1.00c rpm 12/05/02 New version includes support for simple DMA
-* </pre>
-*
-******************************************************************************/
-
-/***************************** Include Files *********************************/
-
-#include "xbasic_types.h"
-#include "xemac_i.h"
-#include "xio.h"
-#include "xipif_v1_23_b.h" /* Uses v1.23b of the IPIF */
-
-/************************** Constant Definitions *****************************/
-
-/**************************** Type Definitions *******************************/
-
-/***************** Macros (Inline Functions) Definitions *********************/
-
-/************************** Variable Definitions *****************************/
-
-/************************** Function Prototypes ******************************/
-
-/*****************************************************************************/
-/**
-*
-* Send an Ethernet frame in polled mode. The device/driver must be in polled
-* mode before calling this function. The driver writes the frame directly to
-* the MAC's packet FIFO, then enters a loop checking the device status for
-* completion or error. Statistics are updated if an error occurs. The buffer
-* to be sent must be word-aligned.
-*
-* It is assumed that the upper layer software supplies a correctly formatted
-* Ethernet frame, including the destination and source addresses, the
-* type/length field, and the data field. It is also assumed that upper layer
-* software does not append FCS at the end of the frame.
-*
-* @param InstancePtr is a pointer to the XEmac instance to be worked on.
-* @param BufPtr is a pointer to a word-aligned buffer containing the Ethernet
-* frame to be sent.
-* @param ByteCount is the size of the Ethernet frame.
-*
-* @return
-*
-* - XST_SUCCESS if the frame was sent successfully
-* - XST_DEVICE_IS_STOPPED if the device has not yet been started
-* - XST_NOT_POLLED if the device is not in polled mode
-* - XST_FIFO_NO_ROOM if there is no room in the EMAC's length FIFO for this frame
-* - XST_FIFO_ERROR if the FIFO was overrun or underrun. This error is critical
-* and requires the caller to reset the device.
-* - XST_EMAC_COLLISION if the send failed due to excess deferral or late
-* collision
-*
-* @note
-*
-* There is the possibility that this function will not return if the hardware
-* is broken (i.e., it never sets the status bit indicating that transmission is
-* done). If this is of concern to the user, the user should provide protection
-* from this problem - perhaps by using a different timer thread to monitor the
-* PollSend thread. On a 10Mbps MAC, it takes about 1.21 msecs to transmit a
-* maximum size Ethernet frame (1518 bytes). On a 100Mbps MAC, it takes about
-* 121 usecs to transmit a maximum size Ethernet frame.
-*
-* @internal
-*
-* The EMAC uses FIFOs behind its length and status registers. For this reason,
-* it is important to keep the length, status, and data FIFOs in sync when
-* reading or writing to them.
-*
-******************************************************************************/
-XStatus
-XEmac_PollSend(XEmac * InstancePtr, u8 * BufPtr, u32 ByteCount)
-{
- u32 IntrStatus;
- u32 XmitStatus;
- XStatus Result;
-
- XASSERT_NONVOID(InstancePtr != NULL);
- XASSERT_NONVOID(BufPtr != NULL);
- XASSERT_NONVOID(ByteCount > XEM_HDR_SIZE); /* send at least 1 byte */
- XASSERT_NONVOID(InstancePtr->IsReady == XCOMPONENT_IS_READY);
-
- /*
- * Be sure the device is configured for polled mode and it is started
- */
- if (!InstancePtr->IsPolled) {
- return XST_NOT_POLLED;
- }
-
- if (InstancePtr->IsStarted != XCOMPONENT_IS_STARTED) {
- return XST_DEVICE_IS_STOPPED;
- }
-
- /*
- * Check for overruns and underruns for the transmit status and length
- * FIFOs and make sure the send packet FIFO is not deadlocked. Any of these
- * conditions is bad enough that we do not want to continue. The upper layer
- * software should reset the device to resolve the error.
- */
- IntrStatus = XIIF_V123B_READ_IISR(InstancePtr->BaseAddress);
-
- /*
- * Overrun errors
- */
- if (IntrStatus & (XEM_EIR_XMIT_SFIFO_OVER_MASK |
- XEM_EIR_XMIT_LFIFO_OVER_MASK)) {
- InstancePtr->Stats.XmitOverrunErrors++;
- InstancePtr->Stats.FifoErrors++;
- return XST_FIFO_ERROR;
- }
-
- /*
- * Underrun errors
- */
- if (IntrStatus & (XEM_EIR_XMIT_SFIFO_UNDER_MASK |
- XEM_EIR_XMIT_LFIFO_UNDER_MASK)) {
- InstancePtr->Stats.XmitUnderrunErrors++;
- InstancePtr->Stats.FifoErrors++;
- return XST_FIFO_ERROR;
- }
-
- if (XPF_V100B_IS_DEADLOCKED(&InstancePtr->SendFifo)) {
- InstancePtr->Stats.FifoErrors++;
- return XST_FIFO_ERROR;
- }
-
- /*
- * Before writing to the data FIFO, make sure the length FIFO is not
- * full. The data FIFO might not be full yet even though the length FIFO
- * is. This avoids an overrun condition on the length FIFO and keeps the
- * FIFOs in sync.
- */
- if (IntrStatus & XEM_EIR_XMIT_LFIFO_FULL_MASK) {
- /*
- * Clear the latched LFIFO_FULL bit so next time around the most
- * current status is represented
- */
- XIIF_V123B_WRITE_IISR(InstancePtr->BaseAddress,
- XEM_EIR_XMIT_LFIFO_FULL_MASK);
- return XST_FIFO_NO_ROOM;
- }
-
- /*
- * This is a non-blocking write. The packet FIFO returns an error if there
- * is not enough room in the FIFO for this frame.
- */
- Result =
- XPacketFifoV100b_Write(&InstancePtr->SendFifo, BufPtr, ByteCount);
- if (Result != XST_SUCCESS) {
- return Result;
- }
-
- /*
- * Loop on the MAC's status to wait for any pause to complete.
- */
- IntrStatus = XIIF_V123B_READ_IISR(InstancePtr->BaseAddress);
-
- while ((IntrStatus & XEM_EIR_XMIT_PAUSE_MASK) != 0) {
- IntrStatus = XIIF_V123B_READ_IISR(InstancePtr->BaseAddress);
- /*
- * Clear the pause status from the transmit status register
- */
- XIIF_V123B_WRITE_IISR(InstancePtr->BaseAddress,
- IntrStatus & XEM_EIR_XMIT_PAUSE_MASK);
- }
-
- /*
- * Set the MAC's transmit packet length register to tell it to transmit
- */
- XIo_Out32(InstancePtr->BaseAddress + XEM_TPLR_OFFSET, ByteCount);
-
- /*
- * Loop on the MAC's status to wait for the transmit to complete. The
- * transmit status is in the FIFO when the XMIT_DONE bit is set.
- */
- do {
- IntrStatus = XIIF_V123B_READ_IISR(InstancePtr->BaseAddress);
- }
- while ((IntrStatus & XEM_EIR_XMIT_DONE_MASK) == 0);
-
- XmitStatus = XIo_In32(InstancePtr->BaseAddress + XEM_TSR_OFFSET);
-
- InstancePtr->Stats.XmitFrames++;
- InstancePtr->Stats.XmitBytes += ByteCount;
-
- /*
- * Check for various errors, bump statistics, and return an error status.
- */
-
- /*
- * Overrun errors
- */
- if (IntrStatus & (XEM_EIR_XMIT_SFIFO_OVER_MASK |
- XEM_EIR_XMIT_LFIFO_OVER_MASK)) {
- InstancePtr->Stats.XmitOverrunErrors++;
- InstancePtr->Stats.FifoErrors++;
- return XST_FIFO_ERROR;
- }
-
- /*
- * Underrun errors
- */
- if (IntrStatus & (XEM_EIR_XMIT_SFIFO_UNDER_MASK |
- XEM_EIR_XMIT_LFIFO_UNDER_MASK)) {
- InstancePtr->Stats.XmitUnderrunErrors++;
- InstancePtr->Stats.FifoErrors++;
- return XST_FIFO_ERROR;
- }
-
- /*
- * Clear the interrupt status register of transmit statuses
- */
- XIIF_V123B_WRITE_IISR(InstancePtr->BaseAddress,
- IntrStatus & XEM_EIR_XMIT_ALL_MASK);
-
- /*
- * Collision errors are stored in the transmit status register
- * instead of the interrupt status register
- */
- if (XmitStatus & XEM_TSR_EXCESS_DEFERRAL_MASK) {
- InstancePtr->Stats.XmitExcessDeferral++;
- return XST_EMAC_COLLISION_ERROR;
- }
-
- if (XmitStatus & XEM_TSR_LATE_COLLISION_MASK) {
- InstancePtr->Stats.XmitLateCollisionErrors++;
- return XST_EMAC_COLLISION_ERROR;
- }
-
- return XST_SUCCESS;
-}
-
-/*****************************************************************************/
-/**
-*
-* Receive an Ethernet frame in polled mode. The device/driver must be in polled
-* mode before calling this function. The driver receives the frame directly
-* from the MAC's packet FIFO. This is a non-blocking receive, in that if there
-* is no frame ready to be received at the device, the function returns with an
-* error. The MAC's error status is not checked, so statistics are not updated
-* for polled receive. The buffer into which the frame will be received must be
-* word-aligned.
-*
-* @param InstancePtr is a pointer to the XEmac instance to be worked on.
-* @param BufPtr is a pointer to a word-aligned buffer into which the received
-* Ethernet frame will be copied.
-* @param ByteCountPtr is both an input and an output parameter. It is a pointer
-* to a 32-bit word that contains the size of the buffer on entry into the
-* function and the size the received frame on return from the function.
-*
-* @return
-*
-* - XST_SUCCESS if the frame was sent successfully
-* - XST_DEVICE_IS_STOPPED if the device has not yet been started
-* - XST_NOT_POLLED if the device is not in polled mode
-* - XST_NO_DATA if there is no frame to be received from the FIFO
-* - XST_BUFFER_TOO_SMALL if the buffer to receive the frame is too small for
-* the frame waiting in the FIFO.
-*
-* @note
-*
-* Input buffer must be big enough to hold the largest Ethernet frame. Buffer
-* must also be 32-bit aligned.
-*
-* @internal
-*
-* The EMAC uses FIFOs behind its length and status registers. For this reason,
-* it is important to keep the length, status, and data FIFOs in sync when
-* reading or writing to them.
-*
-******************************************************************************/
-XStatus
-XEmac_PollRecv(XEmac * InstancePtr, u8 * BufPtr, u32 * ByteCountPtr)
-{
- XStatus Result;
- u32 PktLength;
- u32 IntrStatus;
-
- XASSERT_NONVOID(InstancePtr != NULL);
- XASSERT_NONVOID(BufPtr != NULL);
- XASSERT_NONVOID(ByteCountPtr != NULL);
- XASSERT_NONVOID(InstancePtr->IsReady == XCOMPONENT_IS_READY);
-
- /*
- * Be sure the device is configured for polled mode and it is started
- */
- if (!InstancePtr->IsPolled) {
- return XST_NOT_POLLED;
- }
-
- if (InstancePtr->IsStarted != XCOMPONENT_IS_STARTED) {
- return XST_DEVICE_IS_STOPPED;
- }
-
- /*
- * Make sure the buffer is big enough to hold the maximum frame size.
- * We need to do this because as soon as we read the MAC's packet length
- * register, which is actually a FIFO, we remove that length from the
- * FIFO. We do not want to read the length FIFO without also reading the
- * data FIFO since this would get the FIFOs out of sync. So we have to
- * make this restriction.
- */
- if (*ByteCountPtr < XEM_MAX_FRAME_SIZE) {
- return XST_BUFFER_TOO_SMALL;
- }
-
- /*
- * First check for packet FIFO deadlock and return an error if it has
- * occurred. A reset by the caller is necessary to correct this problem.
- */
- if (XPF_V100B_IS_DEADLOCKED(&InstancePtr->RecvFifo)) {
- InstancePtr->Stats.FifoErrors++;
- return XST_FIFO_ERROR;
- }
-
- /*
- * Get the interrupt status to know what happened (whether an error occurred
- * and/or whether frames have been received successfully). When clearing the
- * intr status register, clear only statuses that pertain to receive.
- */
- IntrStatus = XIIF_V123B_READ_IISR(InstancePtr->BaseAddress);
- XIIF_V123B_WRITE_IISR(InstancePtr->BaseAddress,
- IntrStatus & XEM_EIR_RECV_ALL_MASK);
-
- /*
- * Check receive errors and bump statistics so the caller will have a clue
- * as to why data may not have been received. We continue on if an error
- * occurred since there still may be frames that were received successfully.
- */
- if (IntrStatus & (XEM_EIR_RECV_LFIFO_OVER_MASK |
- XEM_EIR_RECV_DFIFO_OVER_MASK)) {
- InstancePtr->Stats.RecvOverrunErrors++;
- InstancePtr->Stats.FifoErrors++;
- }
-
- if (IntrStatus & XEM_EIR_RECV_LFIFO_UNDER_MASK) {
- InstancePtr->Stats.RecvUnderrunErrors++;
- InstancePtr->Stats.FifoErrors++;
- }
-
- /*
- * General receive errors
- */
- if (IntrStatus & XEM_EIR_RECV_ERROR_MASK) {
- if (IntrStatus & XEM_EIR_RECV_MISSED_FRAME_MASK) {
- InstancePtr->Stats.RecvMissedFrameErrors =
- XIo_In32(InstancePtr->BaseAddress +
- XEM_RMFC_OFFSET);
- }
-
- if (IntrStatus & XEM_EIR_RECV_COLLISION_MASK) {
- InstancePtr->Stats.RecvCollisionErrors =
- XIo_In32(InstancePtr->BaseAddress + XEM_RCC_OFFSET);
- }
-
- if (IntrStatus & XEM_EIR_RECV_FCS_ERROR_MASK) {
- InstancePtr->Stats.RecvFcsErrors =
- XIo_In32(InstancePtr->BaseAddress +
- XEM_RFCSEC_OFFSET);
- }
-
- if (IntrStatus & XEM_EIR_RECV_LEN_ERROR_MASK) {
- InstancePtr->Stats.RecvLengthFieldErrors++;
- }
-
- if (IntrStatus & XEM_EIR_RECV_SHORT_ERROR_MASK) {
- InstancePtr->Stats.RecvShortErrors++;
- }
-
- if (IntrStatus & XEM_EIR_RECV_LONG_ERROR_MASK) {
- InstancePtr->Stats.RecvLongErrors++;
- }
-
- if (IntrStatus & XEM_EIR_RECV_ALIGN_ERROR_MASK) {
- InstancePtr->Stats.RecvAlignmentErrors =
- XIo_In32(InstancePtr->BaseAddress +
- XEM_RAEC_OFFSET);
- }
- }
-
- /*
- * Before reading from the length FIFO, make sure the length FIFO is not
- * empty. We could cause an underrun error if we try to read from an
- * empty FIFO.
- */
- if ((IntrStatus & XEM_EIR_RECV_DONE_MASK) == 0) {
- return XST_NO_DATA;
- }
-
- /*
- * Determine, from the MAC, the length of the next packet available
- * in the data FIFO (there should be a non-zero length here)
- */
- PktLength = XIo_In32(InstancePtr->BaseAddress + XEM_RPLR_OFFSET);
- if (PktLength == 0) {
- return XST_NO_DATA;
- }
-
- /*
- * Write the RECV_DONE bit in the status register to clear it. This bit
- * indicates the RPLR is non-empty, and we know it's set at this point.
- * We clear it so that subsequent entry into this routine will reflect the
- * current status. This is done because the non-empty bit is latched in the
- * IPIF, which means it may indicate a non-empty condition even though
- * there is something in the FIFO.
- */
- XIIF_V123B_WRITE_IISR(InstancePtr->BaseAddress, XEM_EIR_RECV_DONE_MASK);
-
- /*
- * We assume that the MAC never has a length bigger than the largest
- * Ethernet frame, so no need to make another check here.
- */
-
- /*
- * This is a non-blocking read. The FIFO returns an error if there is
- * not at least the requested amount of data in the FIFO.
- */
- Result =
- XPacketFifoV100b_Read(&InstancePtr->RecvFifo, BufPtr, PktLength);
- if (Result != XST_SUCCESS) {
- return Result;
- }
-
- InstancePtr->Stats.RecvFrames++;
- InstancePtr->Stats.RecvBytes += PktLength;
-
- *ByteCountPtr = PktLength;
-
- return XST_SUCCESS;
-}
diff --git a/board/xilinx/xilinx_iic/iic_adapter.c b/board/xilinx/xilinx_iic/iic_adapter.c
deleted file mode 100644
index f3ecba72dc..0000000000
--- a/board/xilinx/xilinx_iic/iic_adapter.c
+++ /dev/null
@@ -1,530 +0,0 @@
-/******************************************************************************
-*
-* Author: Xilinx, Inc.
-*
-*
-* This program is free software; you can redistribute it and/or modify it
-* under the terms of the GNU General Public License as published by the
-* Free Software Foundation; either version 2 of the License, or (at your
-* option) any later version.
-*
-*
-* XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A
-* COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS
-* ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD,
-* XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE
-* FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING
-* ANY THIRD PARTY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.
-* XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO
-* THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY
-* WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM
-* CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND
-* FITNESS FOR A PARTICULAR PURPOSE.
-*
-*
-* Xilinx hardware products are not intended for use in life support
-* appliances, devices, or systems. Use in such applications is
-* expressly prohibited.
-*
-*
-* (c) Copyright 2002-2004 Xilinx Inc.
-* All rights reserved.
-*
-*
-* You should have received a copy of the GNU General Public License along
-* with this program; if not, write to the Free Software Foundation, Inc.,
-* 675 Mass Ave, Cambridge, MA 02139, USA.
-*
-******************************************************************************/
-
-#include <common.h>
-#include <environment.h>
-#include <net.h>
-#include <configs/ml300.h>
-#include "xparameters.h"
-
-#ifdef CFG_ENV_IS_IN_EEPROM
-#include <i2c.h>
-#include "xiic_l.h"
-
-#define IIC_DELAY 5000
-
-static u8 envStep = 0; /* 0 means crc has not been read */
-const u8 hex[] = "0123456789ABCDEF"; /* lookup table for ML300 CRC */
-
-/************************************************************************
- * Use Xilinx provided driver to send data to EEPROM using iic bus.
- */
-static void
-send(u32 adr, u8 * data, u32 len)
-{
- u8 sendBuf[34]; /* first 2-bit is address and others are data */
- u32 pos, wlen;
- u32 ret;
-
- wlen = 32;
- for (pos = 0; pos < len; pos += 32) {
- if ((len - pos) < 32)
- wlen = len - pos;
-
- /* Put address and data bits together */
- sendBuf[0] = (u8) ((adr + pos) >> 8);
- sendBuf[1] = (u8) (adr + pos);
- memcpy(&sendBuf[2], &data[pos], wlen);
-
- /* Send to EEPROM through iic bus */
- ret = XIic_Send(XPAR_IIC_0_BASEADDR, CFG_I2C_EEPROM_ADDR >> 1,
- sendBuf, wlen + 2);
-
- udelay(IIC_DELAY);
- }
-}
-
-/************************************************************************
- * Use Xilinx provided driver to read data from EEPROM using the iic bus.
- */
-static void
-receive(u32 adr, u8 * data, u32 len)
-{
- u8 address[2];
- u32 ret;
-
- address[0] = (u8) (adr >> 8);
- address[1] = (u8) adr;
-
- /* Provide EEPROM address */
- ret =
- XIic_Send(XPAR_IIC_0_BASEADDR, CFG_I2C_EEPROM_ADDR >> 1, address,
- 2);
- /* Receive data from EEPROM */
- ret =
- XIic_Recv(XPAR_IIC_0_BASEADDR, CFG_I2C_EEPROM_ADDR >> 1, data, len);
-}
-
-/************************************************************************
- * Convert a hexadecimal string to its equivalent integer value.
- */
-static u8
-axtoi(u8 * hexStg)
-{
- u8 n; /* position in string */
- u8 m; /* position in digit[] to shift */
- u8 count; /* loop index */
- u8 intValue; /* integer value of hex string */
- u8 digit[2]; /* hold values to convert */
-
- for (n = 0; n < 2; n++) {
- if (hexStg[n] == '\0')
- break;
- if (hexStg[n] > 0x29 && hexStg[n] < 0x40)
- digit[n] = hexStg[n] & 0x0f;
- else if (hexStg[n] >= 'a' && hexStg[n] <= 'f')
- digit[n] = (hexStg[n] & 0x0f) + 9;
- else if (hexStg[n] >= 'A' && hexStg[n] <= 'F')
- digit[n] = (hexStg[n] & 0x0f) + 9;
- else
- break;
- }
-
- intValue = 0;
- count = n;
- m = n - 1;
- n = 0;
- while (n < count) {
- intValue = intValue | (digit[n] << (m << 2));
- m--; /* adjust the position to set */
- n++; /* next digit to process */
- }
-
- return (intValue);
-}
-
-/************************************************************************
- * Convert an integer string to its equivalent value.
- */
-static u8
-atoi(uchar * string)
-{
- u8 res = 0;
- while (*string >= '0' && *string <= '9') {
- res *= 10;
- res += *string - '0';
- string++;
- }
-
- return res;
-}
-
-/************************************************************************
- * Key-value pairs are separated by "=" sign.
- */
-static void
-findKey(uchar * buffer, int *loc, u8 len)
-{
- u32 i;
-
- for (i = 0; i < len; i++)
- if (buffer[i] == '=') {
- *loc = i;
- return;
- }
-
- /* return -1 is no "=" sign found */
- *loc = -1;
-}
-
-/************************************************************************
- * Compute a new ML300 CRC when user calls the saveenv command.
- * Also update EEPROM with new CRC value.
- */
-static u8
-update_crc(u32 len, uchar * data)
-{
- uchar temp[6] = { 'C', '=', 0x00, 0x00, 0x00, 0x00 };
- u32 crc; /* new crc value */
- u32 i;
-
- crc = 0;
-
- /* calculate new CRC */
- for (i = 0; i < len; i++)
- crc += data[i];
-
- /* CRC includes key for check sum */
- crc += 'C' + '=';
-
- /* compose new CRC to be updated */
- temp[2] = hex[(crc >> 4) & 0xf];
- temp[3] = hex[crc & 0xf];
-
- /* check to see if env size exceeded */
- if (len + 6 > ENV_SIZE) {
- printf("ERROR: not enough space to store CRC on EEPROM");
- return 1;
- }
-
- memcpy(data + len, temp, 6);
- return 0;
-}
-
-/************************************************************************
- * Read out ML300 CRC and compare it with a runtime calculated ML300 CRC.
- * If equal, then pass back a u-boot CRC value, otherwise pass back
- * junk to indicate CRC error.
-*/
-static void
-read_crc(uchar * buffer, int len)
-{
- u32 addr, n;
- u32 crc; /* runtime crc */
- u8 old[2] = { 0xff, 0xff }; /* current CRC in EEPROM */
- u8 stop; /* indication of end of env data */
- u8 pre; /* previous EEPROM data bit */
- int i, loc;
-
- addr = CFG_ENV_OFFSET; /* start from first env address */
- n = 0;
- pre = 1;
- stop = 1;
- crc = 0;
-
- /* calculate runtime CRC according to ML300 and read back
- old CRC stored in the EEPROM */
- while (n < CFG_ENV_SIZE) {
- receive(addr, buffer, len);
-
- /* found two null chars, end of env */
- if ((pre || buffer[0]) == 0)
- break;
-
- findKey(buffer, &loc, len);
-
- /* found old check sum, read and store old CRC */
- if ((loc == 0 && pre == 'C')
- || (loc > 0 && buffer[loc - 1] == 'C'))
- receive(addr + loc + 1, old, 2);
-
- pre = buffer[len - 1];
-
- /* calculate runtime ML300 CRC */
- crc += buffer[0];
- i = 1;
- do {
- crc += buffer[i];
- stop = buffer[i] || buffer[i - 1];
- i++;
- } while (stop && (i < len));
-
- if (stop == 0)
- break;
-
- n += len;
- addr += len;
- }
-
- /* exclude old CRC from runtime calculation */
- crc -= (old[0] + old[1]);
-
- /* match CRC values, send back u-boot CRC */
- if ((old[0] == hex[(crc >> 4) & 0xf])
- && (old[1] == hex[crc & 0xf])) {
- crc = 0;
- n = 0;
- addr =
- CFG_ENV_OFFSET - offsetof(env_t, crc) + offsetof(env_t,
- data);
- /* calculate u-boot crc */
- while (n < ENV_SIZE) {
- receive(addr, buffer, len);
- crc = crc32(crc, buffer, len);
- n += len;
- addr += len;
- }
-
- memcpy(buffer, &crc, 4);
- }
-}
-
-/************************************************************************
- * Convert IP address to hexadecimals.
- */
-static void
-ip_ml300(uchar * s, uchar * res)
-{
- char temp[2];
- u8 i;
-
- res[0] = 0x00;
-
- for (i = 0; i < 4; i++) {
- sprintf(temp, "%02x", atoi(s));
- s = (uchar *)strchr((char *)s, '.') + 1;
- strcat((char *)res, temp);
- }
-}
-
-/************************************************************************
- * Change 0xff (255), a dummy null char to 0x00.
- */
-static void
-change_null(uchar * s)
-{
- if (s != NULL) {
- change_null((uchar *)strchr((char *)s + 1, 255));
- *(strchr((char *)s, 255)) = '\0';
- }
-}
-
-/************************************************************************
- * Update environment variable name and values to u-boot standard.
- */
-void
-convert_env(void)
-{
- char *s; /* pointer to env value */
- char temp[20]; /* temp storage for addresses */
-
- /* E -> ethaddr */
- s = getenv("E");
- if (s != NULL) {
- sprintf(temp, "%c%c.%c%c.%c%c.%c%c.%c%c.%c%c",
- s[0], s[1], s[ 2], s[ 3],
- s[4], s[5], s[ 6], s[ 7],
- s[8], s[9], s[10], s[11] );
- setenv("ethaddr", temp);
- setenv("E", NULL);
- }
-
- /* L -> serial# */
- s = getenv("L");
- if (s != NULL) {
- setenv("serial#", s);
- setenv("L", NULL);
- }
-
- /* I -> ipaddr */
- s = getenv("I");
- if (s != NULL) {
- sprintf(temp, "%d.%d.%d.%d", axtoi((u8 *)s), axtoi((u8 *)(s + 2)),
- axtoi((u8 *)(s + 4)), axtoi((u8 *)(s + 6)));
- setenv("ipaddr", temp);
- setenv("I", NULL);
- }
-
- /* S -> serverip */
- s = getenv("S");
- if (s != NULL) {
- sprintf(temp, "%d.%d.%d.%d", axtoi((u8 *)s), axtoi((u8 *)(s + 2)),
- axtoi((u8 *)(s + 4)), axtoi((u8 *)(s + 6)));
- setenv("serverip", temp);
- setenv("S", NULL);
- }
-
- /* A -> bootargs */
- s = getenv("A");
- if (s != NULL) {
- setenv("bootargs", s);
- setenv("A", NULL);
- }
-
- /* F -> bootfile */
- s = getenv("F");
- if (s != NULL) {
- setenv("bootfile", s);
- setenv("F", NULL);
- }
-
- /* M -> bootcmd */
- s = getenv("M");
- if (s != NULL) {
- setenv("bootcmd", s);
- setenv("M", NULL);
- }
-
- /* Don't include C (CRC) */
- setenv("C", NULL);
-}
-
-/************************************************************************
- * Save user modified environment values back to EEPROM.
- */
-static void
-save_env(void)
-{
- char eprom[ENV_SIZE]; /* buffer to be written back to EEPROM */
- char *s, temp[20];
- char ff[] = { 0xff, 0x00 }; /* dummy null value */
- u32 len; /* length of env to be written to EEPROM */
-
- eprom[0] = 0x00;
-
- /* ethaddr -> E */
- s = getenv("ethaddr");
- if (s != NULL) {
- strcat(eprom, "E=");
- sprintf(temp, "%c%c%c%c%c%c%c%c%c%c%c%c",
- *s, *(s + 1), *(s + 3), *(s + 4), *(s + 6), *(s + 7),
- *(s + 9), *(s + 10), *(s + 12), *(s + 13), *(s + 15),
- *(s + 16));
- strcat(eprom, temp);
- strcat(eprom, ff);
- }
-
- /* serial# -> L */
- s = getenv("serial#");
- if (s != NULL) {
- strcat(eprom, "L=");
- strcat(eprom, s);
- strcat(eprom, ff);
- }
-
- /* ipaddr -> I */
- s = getenv("ipaddr");
- if (s != NULL) {
- strcat(eprom, "I=");
- ip_ml300((uchar *)s, (uchar *)temp);
- strcat(eprom, temp);
- strcat(eprom, ff);
- }
-
- /* serverip -> S */
- s = getenv("serverip");
- if (s != NULL) {
- strcat(eprom, "S=");
- ip_ml300((uchar *)s, (uchar *)temp);
- strcat(eprom, temp);
- strcat(eprom, ff);
- }
-
- /* bootargs -> A */
- s = getenv("bootargs");
- if (s != NULL) {
- strcat(eprom, "A=");
- strcat(eprom, s);
- strcat(eprom, ff);
- }
-
- /* bootfile -> F */
- s = getenv("bootfile");
- if (s != NULL) {
- strcat(eprom, "F=");
- strcat(eprom, s);
- strcat(eprom, ff);
- }
-
- /* bootcmd -> M */
- s = getenv("bootcmd");
- if (s != NULL) {
- strcat(eprom, "M=");
- strcat(eprom, s);
- strcat(eprom, ff);
- }
-
- len = strlen(eprom); /* find env length without crc */
- change_null((uchar *)eprom); /* change 0xff to 0x00 */
-
- /* update EEPROM env values if there is enough space */
- if (update_crc(len, (uchar *)eprom) == 0)
- send(CFG_ENV_OFFSET, (uchar *)eprom, len + 6);
-}
-
-/************************************************************************
- * U-boot call for EEPROM read associated activities.
- */
-int
-i2c_read(uchar chip, uint addr, int alen, uchar * buffer, int len)
-{
-
- if (envStep == 0) {
- /* first read call is for crc */
- read_crc(buffer, len);
- ++envStep;
- return 0;
- } else if (envStep == 1) {
- /* then read out EEPROM content for runtime u-boot CRC calculation */
- receive(addr, buffer, len);
-
- if (addr + len - CFG_ENV_OFFSET == CFG_ENV_SIZE)
- /* end of runtime crc read */
- ++envStep;
- return 0;
- }
-
- if (len < 2) {
- /* when call getenv_r */
- receive(addr, buffer, len);
- } else if (addr + len < CFG_ENV_OFFSET + CFG_ENV_SIZE) {
- /* calling env_relocate(), but don't read out
- crc value from EEPROM */
- receive(addr, buffer + 4, len);
- } else {
- receive(addr, buffer + 4, len - 4);
- }
-
- return 0;
-
-}
-
-/************************************************************************
- * U-boot call for EEPROM write acativities.
- */
-int
-i2c_write(uchar chip, uint addr, int alen, uchar * buffer, int len)
-{
- /* save env on last page write called by u-boot */
- if (addr + len >= CFG_ENV_OFFSET + CFG_ENV_SIZE)
- save_env();
-
- return 0;
-}
-
-/************************************************************************
- * Dummy function.
- */
-int
-i2c_probe(uchar chip)
-{
- return 1;
-}
-
-#endif
diff --git a/board/xilinx/xilinx_iic/xiic_l.c b/board/xilinx/xilinx_iic/xiic_l.c
deleted file mode 100644
index 6b7816373e..0000000000
--- a/board/xilinx/xilinx_iic/xiic_l.c
+++ /dev/null
@@ -1,484 +0,0 @@
-/* $Id: xiic_l.c,v 1.2 2002/12/05 19:32:40 meinelte Exp $ */
-/******************************************************************************
-*
-* XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS"
-* AS A COURTESY TO YOU, SOLELY FOR USE IN DEVELOPING PROGRAMS AND
-* SOLUTIONS FOR XILINX DEVICES. BY PROVIDING THIS DESIGN, CODE,
-* OR INFORMATION AS ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE,
-* APPLICATION OR STANDARD, XILINX IS MAKING NO REPRESENTATION
-* THAT THIS IMPLEMENTATION IS FREE FROM ANY CLAIMS OF INFRINGEMENT,
-* AND YOU ARE RESPONSIBLE FOR OBTAINING ANY RIGHTS YOU MAY REQUIRE
-* FOR YOUR IMPLEMENTATION. XILINX EXPRESSLY DISCLAIMS ANY
-* WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE
-* IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR
-* REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF
-* INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE.
-*
-* (c) Copyright 2002 Xilinx Inc.
-* All rights reserved.
-*
-******************************************************************************/
-/*****************************************************************************/
-/**
-*
-* @file xiic_l.c
-*
-* This file contains low-level driver functions that can be used to access the
-* device. The user should refer to the hardware device specification for more
-* details of the device operation.
-*
-* <pre>
-* MODIFICATION HISTORY:
-*
-* Ver Who Date Changes
-* ----- --- ------- -----------------------------------------------
-* 1.01b jhl 5/13/02 First release
-* 1.01b jhl 10/14/02 Corrected bug in the receive function, the setup of the
-* interrupt status mask was not being done in the loop such
-* that a read would sometimes fail on the last byte because
-* the transmit error which should have been ignored was
-* being used. This would leave an extra byte in the FIFO
-* and the bus throttled such that the next operation would
-* also fail. Also updated the receive function to not
-* disable the device after the last byte until after the
-* bus transitions to not busy which is more consistent
-* with the expected behavior.
-* 1.01c ecm 12/05/02 new rev
-* </pre>
-*
-****************************************************************************/
-
-/***************************** Include Files *******************************/
-
-#include "xbasic_types.h"
-#include "xio.h"
-#include "xipif_v1_23_b.h"
-#include "xiic_l.h"
-
-/************************** Constant Definitions ***************************/
-
-/**************************** Type Definitions *****************************/
-
-
-/***************** Macros (Inline Functions) Definitions *******************/
-
-
-/******************************************************************************
-*
-* This macro clears the specified interrupt in the IPIF interrupt status
-* register. It is non-destructive in that the register is read and only the
-* interrupt specified is cleared. Clearing an interrupt acknowledges it.
-*
-* @param BaseAddress contains the IPIF registers base address.
-*
-* @param InterruptMask contains the interrupts to be disabled
-*
-* @return
-*
-* None.
-*
-* @note
-*
-* Signature: void XIic_mClearIisr(u32 BaseAddress,
-* u32 InterruptMask);
-*
-******************************************************************************/
-#define XIic_mClearIisr(BaseAddress, InterruptMask) \
- XIIF_V123B_WRITE_IISR((BaseAddress), \
- XIIF_V123B_READ_IISR(BaseAddress) & (InterruptMask))
-
-/******************************************************************************
-*
-* This macro sends the address for a 7 bit address during both read and write
-* operations. It takes care of the details to format the address correctly.
-* This macro is designed to be called internally to the drivers.
-*
-* @param SlaveAddress contains the address of the slave to send to.
-*
-* @param Operation indicates XIIC_READ_OPERATION or XIIC_WRITE_OPERATION
-*
-* @return
-*
-* None.
-*
-* @note
-*
-* Signature: void XIic_mSend7BitAddr(u16 SlaveAddress, u8 Operation);
-*
-******************************************************************************/
-#define XIic_mSend7BitAddress(BaseAddress, SlaveAddress, Operation) \
-{ \
- u8 LocalAddr = (u8)(SlaveAddress << 1); \
- LocalAddr = (LocalAddr & 0xFE) | (Operation); \
- XIo_Out8(BaseAddress + XIIC_DTR_REG_OFFSET, LocalAddr); \
-}
-
-/************************** Function Prototypes ****************************/
-
-static unsigned RecvData (u32 BaseAddress, u8 * BufferPtr,
- unsigned ByteCount);
-static unsigned SendData (u32 BaseAddress, u8 * BufferPtr,
- unsigned ByteCount);
-
-/************************** Variable Definitions **************************/
-
-
-/****************************************************************************/
-/**
-* Receive data as a master on the IIC bus. This function receives the data
-* using polled I/O and blocks until the data has been received. It only
-* supports 7 bit addressing and non-repeated start modes of operation. The
-* user is responsible for ensuring the bus is not busy if multiple masters
-* are present on the bus.
-*
-* @param BaseAddress contains the base address of the IIC device.
-* @param Address contains the 7 bit IIC address of the device to send the
-* specified data to.
-* @param BufferPtr points to the data to be sent.
-* @param ByteCount is the number of bytes to be sent.
-*
-* @return
-*
-* The number of bytes received.
-*
-* @note
-*
-* None
-*
-******************************************************************************/
-unsigned XIic_Recv (u32 BaseAddress, u8 Address,
- u8 * BufferPtr, unsigned ByteCount)
-{
- u8 CntlReg;
- unsigned RemainingByteCount;
-
- /* Tx error is enabled incase the address (7 or 10) has no device to answer
- * with Ack. When only one byte of data, must set NO ACK before address goes
- * out therefore Tx error must not be enabled as it will go off immediately
- * and the Rx full interrupt will be checked. If full, then the one byte
- * was received and the Tx error will be disabled without sending an error
- * callback msg.
- */
- XIic_mClearIisr (BaseAddress,
- XIIC_INTR_RX_FULL_MASK | XIIC_INTR_TX_ERROR_MASK |
- XIIC_INTR_ARB_LOST_MASK);
-
- /* Set receive FIFO occupancy depth for 1 byte (zero based)
- */
- XIo_Out8 (BaseAddress + XIIC_RFD_REG_OFFSET, 0);
-
- /* 7 bit slave address, send the address for a read operation
- * and set the state to indicate the address has been sent
- */
- XIic_mSend7BitAddress (BaseAddress, Address, XIIC_READ_OPERATION);
-
- /* MSMS gets set after putting data in FIFO. Start the master receive
- * operation by setting CR Bits MSMS to Master, if the buffer is only one
- * byte, then it should not be acknowledged to indicate the end of data
- */
- CntlReg = XIIC_CR_MSMS_MASK | XIIC_CR_ENABLE_DEVICE_MASK;
- if (ByteCount == 1) {
- CntlReg |= XIIC_CR_NO_ACK_MASK;
- }
-
- /* Write out the control register to start receiving data and call the
- * function to receive each byte into the buffer
- */
- XIo_Out8 (BaseAddress + XIIC_CR_REG_OFFSET, CntlReg);
-
- /* Clear the latched interrupt status for the bus not busy bit which must
- * be done while the bus is busy
- */
- XIic_mClearIisr (BaseAddress, XIIC_INTR_BNB_MASK);
-
- /* Try to receive the data from the IIC bus */
-
- RemainingByteCount = RecvData (BaseAddress, BufferPtr, ByteCount);
- /*
- * The receive is complete, disable the IIC device and return the number of
- * bytes that was received
- */
- XIo_Out8 (BaseAddress + XIIC_CR_REG_OFFSET, 0);
-
- /* Return the number of bytes that was received */
-
- return ByteCount - RemainingByteCount;
-}
-
-/******************************************************************************
-*
-* Receive the specified data from the device that has been previously addressed
-* on the IIC bus. This function assumes that the 7 bit address has been sent
-* and it should wait for the transmit of the address to complete.
-*
-* @param BaseAddress contains the base address of the IIC device.
-* @param BufferPtr points to the buffer to hold the data that is received.
-* @param ByteCount is the number of bytes to be received.
-*
-* @return
-*
-* The number of bytes remaining to be received.
-*
-* @note
-*
-* This function does not take advantage of the receive FIFO because it is
-* designed for minimal code space and complexity. It contains loops that
-* that could cause the function not to return if the hardware is not working.
-*
-* This function assumes that the calling function will disable the IIC device
-* after this function returns.
-*
-******************************************************************************/
-static unsigned RecvData (u32 BaseAddress, u8 * BufferPtr, unsigned ByteCount)
-{
- u8 CntlReg;
- u32 IntrStatusMask;
- u32 IntrStatus;
-
- /* Attempt to receive the specified number of bytes on the IIC bus */
-
- while (ByteCount > 0) {
- /* Setup the mask to use for checking errors because when receiving one
- * byte OR the last byte of a multibyte message an error naturally
- * occurs when the no ack is done to tell the slave the last byte
- */
- if (ByteCount == 1) {
- IntrStatusMask =
- XIIC_INTR_ARB_LOST_MASK | XIIC_INTR_BNB_MASK;
- } else {
- IntrStatusMask =
- XIIC_INTR_ARB_LOST_MASK |
- XIIC_INTR_TX_ERROR_MASK | XIIC_INTR_BNB_MASK;
- }
-
- /* Wait for the previous transmit and the 1st receive to complete
- * by checking the interrupt status register of the IPIF
- */
- while (1) {
- IntrStatus = XIIF_V123B_READ_IISR (BaseAddress);
- if (IntrStatus & XIIC_INTR_RX_FULL_MASK) {
- break;
- }
- /* Check the transmit error after the receive full because when
- * sending only one byte transmit error will occur because of the
- * no ack to indicate the end of the data
- */
- if (IntrStatus & IntrStatusMask) {
- return ByteCount;
- }
- }
-
- CntlReg = XIo_In8 (BaseAddress + XIIC_CR_REG_OFFSET);
-
- /* Special conditions exist for the last two bytes so check for them
- * Note that the control register must be setup for these conditions
- * before the data byte which was already received is read from the
- * receive FIFO (while the bus is throttled
- */
- if (ByteCount == 1) {
- /* For the last data byte, it has already been read and no ack
- * has been done, so clear MSMS while leaving the device enabled
- * so it can get off the IIC bus appropriately with a stop.
- */
- XIo_Out8 (BaseAddress + XIIC_CR_REG_OFFSET,
- XIIC_CR_ENABLE_DEVICE_MASK);
- }
-
- /* Before the last byte is received, set NOACK to tell the slave IIC
- * device that it is the end, this must be done before reading the byte
- * from the FIFO
- */
- if (ByteCount == 2) {
- /* Write control reg with NO ACK allowing last byte to
- * have the No ack set to indicate to slave last byte read.
- */
- XIo_Out8 (BaseAddress + XIIC_CR_REG_OFFSET,
- CntlReg | XIIC_CR_NO_ACK_MASK);
- }
-
- /* Read in data from the FIFO and unthrottle the bus such that the
- * next byte is read from the IIC bus
- */
- *BufferPtr++ = XIo_In8 (BaseAddress + XIIC_DRR_REG_OFFSET);
-
- /* Clear the latched interrupt status so that it will be updated with
- * the new state when it changes, this must be done after the receive
- * register is read
- */
- XIic_mClearIisr (BaseAddress, XIIC_INTR_RX_FULL_MASK |
- XIIC_INTR_TX_ERROR_MASK |
- XIIC_INTR_ARB_LOST_MASK);
- ByteCount--;
- }
-
- /* Wait for the bus to transition to not busy before returning, the IIC
- * device cannot be disabled until this occurs. It should transition as
- * the MSMS bit of the control register was cleared before the last byte
- * was read from the FIFO.
- */
- while (1) {
- if (XIIF_V123B_READ_IISR (BaseAddress) & XIIC_INTR_BNB_MASK) {
- break;
- }
- }
-
- return ByteCount;
-}
-
-/****************************************************************************/
-/**
-* Send data as a master on the IIC bus. This function sends the data
-* using polled I/O and blocks until the data has been sent. It only supports
-* 7 bit addressing and non-repeated start modes of operation. The user is
-* responsible for ensuring the bus is not busy if multiple masters are present
-* on the bus.
-*
-* @param BaseAddress contains the base address of the IIC device.
-* @param Address contains the 7 bit IIC address of the device to send the
-* specified data to.
-* @param BufferPtr points to the data to be sent.
-* @param ByteCount is the number of bytes to be sent.
-*
-* @return
-*
-* The number of bytes sent.
-*
-* @note
-*
-* None
-*
-******************************************************************************/
-unsigned XIic_Send (u32 BaseAddress, u8 Address,
- u8 * BufferPtr, unsigned ByteCount)
-{
- unsigned RemainingByteCount;
-
- /* Put the address into the FIFO to be sent and indicate that the operation
- * to be performed on the bus is a write operation
- */
- XIic_mSend7BitAddress (BaseAddress, Address, XIIC_WRITE_OPERATION);
-
- /* Clear the latched interrupt status so that it will be updated with the
- * new state when it changes, this must be done after the address is put
- * in the FIFO
- */
- XIic_mClearIisr (BaseAddress, XIIC_INTR_TX_EMPTY_MASK |
- XIIC_INTR_TX_ERROR_MASK | XIIC_INTR_ARB_LOST_MASK);
-
- /* MSMS must be set after putting data into transmit FIFO, indicate the
- * direction is transmit, this device is master and enable the IIC device
- */
- XIo_Out8 (BaseAddress + XIIC_CR_REG_OFFSET,
- XIIC_CR_MSMS_MASK | XIIC_CR_DIR_IS_TX_MASK |
- XIIC_CR_ENABLE_DEVICE_MASK);
-
- /* Clear the latched interrupt
- * status for the bus not busy bit which must be done while the bus is busy
- */
- XIic_mClearIisr (BaseAddress, XIIC_INTR_BNB_MASK);
-
- /* Send the specified data to the device on the IIC bus specified by the
- * the address
- */
- RemainingByteCount = SendData (BaseAddress, BufferPtr, ByteCount);
-
- /*
- * The send is complete, disable the IIC device and return the number of
- * bytes that was sent
- */
- XIo_Out8 (BaseAddress + XIIC_CR_REG_OFFSET, 0);
-
- return ByteCount - RemainingByteCount;
-}
-
-/******************************************************************************
-*
-* Send the specified buffer to the device that has been previously addressed
-* on the IIC bus. This function assumes that the 7 bit address has been sent
-* and it should wait for the transmit of the address to complete.
-*
-* @param BaseAddress contains the base address of the IIC device.
-* @param BufferPtr points to the data to be sent.
-* @param ByteCount is the number of bytes to be sent.
-*
-* @return
-*
-* The number of bytes remaining to be sent.
-*
-* @note
-*
-* This function does not take advantage of the transmit FIFO because it is
-* designed for minimal code space and complexity. It contains loops that
-* that could cause the function not to return if the hardware is not working.
-*
-******************************************************************************/
-static unsigned SendData (u32 BaseAddress, u8 * BufferPtr, unsigned ByteCount)
-{
- u32 IntrStatus;
-
- /* Send the specified number of bytes in the specified buffer by polling
- * the device registers and blocking until complete
- */
- while (ByteCount > 0) {
- /* Wait for the transmit to be empty before sending any more data
- * by polling the interrupt status register
- */
- while (1) {
- IntrStatus = XIIF_V123B_READ_IISR (BaseAddress);
-
- if (IntrStatus & (XIIC_INTR_TX_ERROR_MASK |
- XIIC_INTR_ARB_LOST_MASK |
- XIIC_INTR_BNB_MASK)) {
- return ByteCount;
- }
-
- if (IntrStatus & XIIC_INTR_TX_EMPTY_MASK) {
- break;
- }
- }
- /* If there is more than one byte to send then put the next byte to send
- * into the transmit FIFO
- */
- if (ByteCount > 1) {
- XIo_Out8 (BaseAddress + XIIC_DTR_REG_OFFSET,
- *BufferPtr++);
- } else {
- /* Set the stop condition before sending the last byte of data so that
- * the stop condition will be generated immediately following the data
- * This is done by clearing the MSMS bit in the control register.
- */
- XIo_Out8 (BaseAddress + XIIC_CR_REG_OFFSET,
- XIIC_CR_ENABLE_DEVICE_MASK |
- XIIC_CR_DIR_IS_TX_MASK);
-
- /* Put the last byte to send in the transmit FIFO */
-
- XIo_Out8 (BaseAddress + XIIC_DTR_REG_OFFSET,
- *BufferPtr++);
- }
-
- /* Clear the latched interrupt status register and this must be done after
- * the transmit FIFO has been written to or it won't clear
- */
- XIic_mClearIisr (BaseAddress, XIIC_INTR_TX_EMPTY_MASK);
-
- /* Update the byte count to reflect the byte sent and clear the latched
- * interrupt status so it will be updated for the new state
- */
- ByteCount--;
- }
-
- /* Wait for the bus to transition to not busy before returning, the IIC
- * device cannot be disabled until this occurs.
- * Note that this is different from a receive operation because the stop
- * condition causes the bus to go not busy.
- */
- while (1) {
- if (XIIF_V123B_READ_IISR (BaseAddress) & XIIC_INTR_BNB_MASK) {
- break;
- }
- }
-
- return ByteCount;
-}
diff --git a/board/xilinx/xilinx_iic/xiic_l.h b/board/xilinx/xilinx_iic/xiic_l.h
deleted file mode 100644
index a2c4c496a9..0000000000
--- a/board/xilinx/xilinx_iic/xiic_l.h
+++ /dev/null
@@ -1,150 +0,0 @@
-/* $Id: xiic_l.h,v 1.2 2002/12/05 19:32:40 meinelte Exp $ */
-/*****************************************************************************
-*
-* XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS"
-* AS A COURTESY TO YOU, SOLELY FOR USE IN DEVELOPING PROGRAMS AND
-* SOLUTIONS FOR XILINX DEVICES. BY PROVIDING THIS DESIGN, CODE,
-* OR INFORMATION AS ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE,
-* APPLICATION OR STANDARD, XILINX IS MAKING NO REPRESENTATION
-* THAT THIS IMPLEMENTATION IS FREE FROM ANY CLAIMS OF INFRINGEMENT,
-* AND YOU ARE RESPONSIBLE FOR OBTAINING ANY RIGHTS YOU MAY REQUIRE
-* FOR YOUR IMPLEMENTATION. XILINX EXPRESSLY DISCLAIMS ANY
-* WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE
-* IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR
-* REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF
-* INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE.
-*
-* (c) Copyright 2002 Xilinx Inc.
-* All rights reserved.
-*
-*****************************************************************************/
-/****************************************************************************/
-/**
-*
-* @file xiic_l.h
-*
-* This header file contains identifiers and low-level driver functions (or
-* macros) that can be used to access the device. High-level driver functions
-* are defined in xiic.h.
-*
-* <pre>
-* MODIFICATION HISTORY:
-*
-* Ver Who Date Changes
-* ----- ---- -------- -----------------------------------------------
-* 1.00b jhl 05/07/02 First release
-* 1.01c ecm 12/05/02 new rev
-* </pre>
-*
-*****************************************************************************/
-
-#ifndef XIIC_L_H /* prevent circular inclusions */
-#define XIIC_L_H /* by using protection macros */
-
-/***************************** Include Files ********************************/
-
-#include "xbasic_types.h"
-
-/************************** Constant Definitions ****************************/
-
-#define XIIC_MSB_OFFSET 3
-
-#define XIIC_REG_OFFSET 0x100 + XIIC_MSB_OFFSET
-
-/*
- * Register offsets in bytes from RegisterBase. Three is added to the
- * base offset to access LSB (IBM style) of the word
- */
-#define XIIC_CR_REG_OFFSET 0x00+XIIC_REG_OFFSET /* Control Register */
-#define XIIC_SR_REG_OFFSET 0x04+XIIC_REG_OFFSET /* Status Register */
-#define XIIC_DTR_REG_OFFSET 0x08+XIIC_REG_OFFSET /* Data Tx Register */
-#define XIIC_DRR_REG_OFFSET 0x0C+XIIC_REG_OFFSET /* Data Rx Register */
-#define XIIC_ADR_REG_OFFSET 0x10+XIIC_REG_OFFSET /* Address Register */
-#define XIIC_TFO_REG_OFFSET 0x14+XIIC_REG_OFFSET /* Tx FIFO Occupancy */
-#define XIIC_RFO_REG_OFFSET 0x18+XIIC_REG_OFFSET /* Rx FIFO Occupancy */
-#define XIIC_TBA_REG_OFFSET 0x1C+XIIC_REG_OFFSET /* 10 Bit Address reg */
-#define XIIC_RFD_REG_OFFSET 0x20+XIIC_REG_OFFSET /* Rx FIFO Depth reg */
-
-/* Control Register masks */
-
-#define XIIC_CR_ENABLE_DEVICE_MASK 0x01 /* Device enable = 1 */
-#define XIIC_CR_TX_FIFO_RESET_MASK 0x02 /* Transmit FIFO reset=1 */
-#define XIIC_CR_MSMS_MASK 0x04 /* Master starts Txing=1 */
-#define XIIC_CR_DIR_IS_TX_MASK 0x08 /* Dir of tx. Txing=1 */
-#define XIIC_CR_NO_ACK_MASK 0x10 /* Tx Ack. NO ack = 1 */
-#define XIIC_CR_REPEATED_START_MASK 0x20 /* Repeated start = 1 */
-#define XIIC_CR_GENERAL_CALL_MASK 0x40 /* Gen Call enabled = 1 */
-
-/* Status Register masks */
-
-#define XIIC_SR_GEN_CALL_MASK 0x01 /* 1=a mstr issued a GC */
-#define XIIC_SR_ADDR_AS_SLAVE_MASK 0x02 /* 1=when addr as slave */
-#define XIIC_SR_BUS_BUSY_MASK 0x04 /* 1 = bus is busy */
-#define XIIC_SR_MSTR_RDING_SLAVE_MASK 0x08 /* 1=Dir: mstr <-- slave */
-#define XIIC_SR_TX_FIFO_FULL_MASK 0x10 /* 1 = Tx FIFO full */
-#define XIIC_SR_RX_FIFO_FULL_MASK 0x20 /* 1 = Rx FIFO full */
-#define XIIC_SR_RX_FIFO_EMPTY_MASK 0x40 /* 1 = Rx FIFO empty */
-
-/* IPIF Interrupt Status Register masks Interrupt occurs when... */
-
-#define XIIC_INTR_ARB_LOST_MASK 0x01 /* 1 = arbitration lost */
-#define XIIC_INTR_TX_ERROR_MASK 0x02 /* 1=Tx error/msg complete*/
-#define XIIC_INTR_TX_EMPTY_MASK 0x04 /* 1 = Tx FIFO/reg empty */
-#define XIIC_INTR_RX_FULL_MASK 0x08 /* 1=Rx FIFO/reg=OCY level*/
-#define XIIC_INTR_BNB_MASK 0x10 /* 1 = Bus not busy */
-#define XIIC_INTR_AAS_MASK 0x20 /* 1 = when addr as slave */
-#define XIIC_INTR_NAAS_MASK 0x40 /* 1 = not addr as slave */
-#define XIIC_INTR_TX_HALF_MASK 0x80 /* 1 = TX FIFO half empty */
-
-/* IPIF Device Interrupt Register masks */
-
-#define XIIC_IPIF_IIC_MASK 0x00000004UL /* 1=inter enabled */
-#define XIIC_IPIF_ERROR_MASK 0x00000001UL /* 1=inter enabled */
-#define XIIC_IPIF_INTER_ENABLE_MASK (XIIC_IPIF_IIC_MASK | \
- XIIC_IPIF_ERROR_MASK)
-
-#define XIIC_TX_ADDR_SENT 0x00
-#define XIIC_TX_ADDR_MSTR_RECV_MASK 0x02
-
-/* The following constants specify the depth of the FIFOs */
-
-#define IIC_RX_FIFO_DEPTH 16 /* Rx fifo capacity */
-#define IIC_TX_FIFO_DEPTH 16 /* Tx fifo capacity */
-
-/* The following constants specify groups of interrupts that are typically
- * enabled or disables at the same time
- */
-#define XIIC_TX_INTERRUPTS \
- (XIIC_INTR_TX_ERROR_MASK | XIIC_INTR_TX_EMPTY_MASK | \
- XIIC_INTR_TX_HALF_MASK)
-
-#define XIIC_TX_RX_INTERRUPTS (XIIC_INTR_RX_FULL_MASK | XIIC_TX_INTERRUPTS)
-
-/* The following constants are used with the following macros to specify the
- * operation, a read or write operation.
- */
-#define XIIC_READ_OPERATION 1
-#define XIIC_WRITE_OPERATION 0
-
-/* The following constants are used with the transmit FIFO fill function to
- * specify the role which the IIC device is acting as, a master or a slave.
- */
-#define XIIC_MASTER_ROLE 1
-#define XIIC_SLAVE_ROLE 0
-
-/**************************** Type Definitions ******************************/
-
-
-/***************** Macros (Inline Functions) Definitions ********************/
-
-
-/************************** Function Prototypes *****************************/
-
-unsigned XIic_Recv(u32 BaseAddress, u8 Address,
- u8 *BufferPtr, unsigned ByteCount);
-
-unsigned XIic_Send(u32 BaseAddress, u8 Address,
- u8 *BufferPtr, unsigned ByteCount);
-
-#endif /* end of protection macro */
diff --git a/board/xm250/Makefile b/board/xm250/Makefile
deleted file mode 100644
index 1b0a3f0178..0000000000
--- a/board/xm250/Makefile
+++ /dev/null
@@ -1,47 +0,0 @@
-#
-# (C) Copyright 2000-2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := xm250.o flash.o
-SOBJS := lowlevel_init.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $^
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/xm250/config.mk b/board/xm250/config.mk
deleted file mode 100644
index 8ce0c48414..0000000000
--- a/board/xm250/config.mk
+++ /dev/null
@@ -1,35 +0,0 @@
-#
-# (C) Copyright 2003-2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# MicroSys XM250 board:
-#
-
-
-# This is the address where U-Boot lives in flash:
-#TEXT_BASE = 0
-
-# FIXME: armboot does only work correctly when being compiled
-# for the addresses _after_ relocation to RAM!! Otherwhise the
-# .bss segment is assumed in flash...
-TEXT_BASE = 0xA3F80000
diff --git a/board/xm250/flash.c b/board/xm250/flash.c
deleted file mode 100644
index aab47a0a55..0000000000
--- a/board/xm250/flash.c
+++ /dev/null
@@ -1,536 +0,0 @@
-/*
- * (C) Copyright 2001
- * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
- *
- * (C) Copyright 2001-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <linux/byteorder/swab.h>
-
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/* Board support for 1 or 2 flash devices */
-#define FLASH_PORT_WIDTH32
-#undef FLASH_PORT_WIDTH16
-
-#ifdef FLASH_PORT_WIDTH16
-#define FLASH_PORT_WIDTH ushort
-#define FLASH_PORT_WIDTHV vu_short
-#define SWAP(x) __swab16(x)
-#else
-#define FLASH_PORT_WIDTH ulong
-#define FLASH_PORT_WIDTHV vu_long
-#define SWAP(x) __swab32(x)
-#endif
-
-/* Intel-compatible flash ID */
-#define INTEL_COMPAT 0x00890089
-#define INTEL_ALT 0x00B000B0
-
-/* Intel-compatible flash commands */
-#define INTEL_PROGRAM 0x00100010
-#define INTEL_ERASE 0x00200020
-#define INTEL_CLEAR 0x00500050
-#define INTEL_LOCKBIT 0x00600060
-#define INTEL_PROTECT 0x00010001
-#define INTEL_STATUS 0x00700070
-#define INTEL_READID 0x00900090
-#define INTEL_CONFIRM 0x00D000D0
-#define INTEL_RESET 0xFFFFFFFF
-
-/* Intel-compatible flash status bits */
-#define INTEL_FINISHED 0x00800080
-#define INTEL_OK 0x00800080
-
-#define FPW FLASH_PORT_WIDTH
-#define FPWV FLASH_PORT_WIDTHV
-
-#define mb() __asm__ __volatile__ ("" : : : "memory")
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (FPW *addr, flash_info_t *info);
-static int write_data (flash_info_t *info, ulong dest, FPW data);
-static void flash_get_offsets (ulong base, flash_info_t *info);
-void inline spin_wheel (void);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- int i;
- ulong size = 0;
-
- for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
- switch (i) {
- case 0:
- flash_get_size ((FPW *) PHYS_FLASH_1, &flash_info[i]);
- flash_get_offsets (PHYS_FLASH_1, &flash_info[i]);
- break;
- case 1:
- flash_get_size ((FPW *) PHYS_FLASH_2, &flash_info[i]);
- flash_get_offsets (PHYS_FLASH_2, &flash_info[i]);
- break;
- default:
- panic ("configured to many flash banks!\n");
- break;
- }
- size += flash_info[i].size;
- }
-
- /* Protect monitor and environment sectors
- */
- flash_protect ( FLAG_PROTECT_SET,
- CFG_FLASH_BASE,
- CFG_FLASH_BASE + monitor_flash_len - 1,
- &flash_info[0] );
-
- flash_protect ( FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0] );
-
- return size;
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_get_offsets (ulong base, flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- return;
- }
-
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
- for (i = 0; i < info->sector_count; i++) {
- info->start[i] = base + (i * PHYS_FLASH_SECT_SIZE);
- info->protect[i] = 0;
- }
- }
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_INTEL:
- printf ("INTEL ");
- break;
- default:
- printf ("Unknown Vendor ");
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_28F128J3A:
- printf ("28F128J3A\n");
- break;
-
- case FLASH_28F640J3A:
- printf ("28F640J3A\n");
- break;
- default:
- printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " ");
- }
- printf ("\n");
- return;
-}
-
-/*
- * The following code cannot be run from FLASH!
- */
-static ulong flash_get_size (FPW *addr, flash_info_t *info)
-{
- volatile FPW value;
-
- /* Write auto select command: read Manufacturer ID */
- addr[0x5555] = (FPW) 0x00AA00AA;
- addr[0x2AAA] = (FPW) 0x00550055;
- addr[0x5555] = (FPW) 0x00900090;
-
- mb ();
- value = addr[0];
-
- switch (value) {
-
- case (FPW) INTEL_MANUFACT:
- info->flash_id = FLASH_MAN_INTEL;
- break;
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
- return (0); /* no or unknown flash */
- }
-
- mb ();
- value = addr[1]; /* device ID */
-
- switch (value) {
-
- case (FPW) INTEL_ID_28F128J3A:
- info->flash_id += FLASH_28F128J3A;
- info->sector_count = 128;
- info->size = 0x02000000;
- break; /* => 32 MB */
-
- case (FPW) INTEL_ID_28F640J3A:
- info->flash_id += FLASH_28F640J3A;
- info->sector_count = 64;
- info->size = 0x01000000;
- break; /* => 16 MB */
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- break;
- }
-
- if (info->sector_count > CFG_MAX_FLASH_SECT) {
- printf ("** ERROR: sector count %d > max (%d) **\n",
- info->sector_count, CFG_MAX_FLASH_SECT);
- info->sector_count = CFG_MAX_FLASH_SECT;
- }
-
- addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
-
- return (info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- int flag, prot, sect;
- ulong type, start, last;
- int rcode = 0;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- type = (info->flash_id & FLASH_VENDMASK);
- if ((type != FLASH_MAN_INTEL)) {
- printf ("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- return 1;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- start = get_timer (0);
- last = start;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- FPWV *addr = (FPWV *) (info->start[sect]);
- FPW status;
-
- printf ("Erasing sector %2d ... ", sect);
-
- /* arm simple, non interrupt dependent timer */
- reset_timer_masked ();
-
- *addr = (FPW) 0x00500050; /* clear status register */
- *addr = (FPW) 0x00200020; /* erase setup */
- *addr = (FPW) 0x00D000D0; /* erase confirm */
-
- while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
- if (get_timer_masked () > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- *addr = (FPW) 0x00B000B0; /* suspend erase */
- *addr = (FPW) 0x00FF00FF; /* reset to read mode */
- rcode = 1;
- break;
- }
- }
-
- *addr = 0x00500050; /* clear status register cmd. */
- *addr = 0x00FF00FF; /* resest to read mode */
-
- printf (" done\n");
- }
- }
- return rcode;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- * 4 - Flash not identified
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp;
- FPW data;
- int count, i, l, rc, port_width;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- return 4;
- }
-/* get lower word aligned address */
-#ifdef FLASH_PORT_WIDTH16
- wp = (addr & ~1);
- port_width = 2;
-#else
- wp = (addr & ~3);
- port_width = 4;
-#endif
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i = 0, cp = wp; i < l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
- for (; i < port_width && cnt > 0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt == 0 && i < port_width; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
-
- if ((rc = write_data (info, wp, SWAP (data))) != 0) {
- return (rc);
- }
- wp += port_width;
- }
-
- /*
- * handle word aligned part
- */
- count = 0;
- while (cnt >= port_width) {
- data = 0;
- for (i = 0; i < port_width; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_data (info, wp, SWAP (data))) != 0) {
- return (rc);
- }
- wp += port_width;
- cnt -= port_width;
- if (count++ > 0x800) {
- spin_wheel ();
- count = 0;
- }
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i < port_width; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
-
- return (write_data (info, wp, SWAP (data)));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word or halfword to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_data (flash_info_t *info, ulong dest, FPW data)
-{
- FPWV *addr = (FPWV *) dest;
- ulong status;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*addr & data) != data) {
- printf ("not erased at %08lx (%lx)\n", (ulong) addr, *addr);
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
-
- *addr = (FPW) 0x00400040; /* write setup */
- *addr = data;
-
- /* arm simple, non interrupt dependent timer */
- reset_timer_masked ();
-
- /* wait while polling the status register */
- while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
- if (get_timer_masked () > CFG_FLASH_WRITE_TOUT) {
- *addr = (FPW) 0x00FF00FF; /* restore read mode */
- return (1);
- }
- }
-
- *addr = (FPW) 0x00FF00FF; /* restore read mode */
-
- return (0);
-}
-
-void inline spin_wheel (void)
-{
- static int p = 0;
- static char w[] = "\\/-";
-
- printf ("\010%c", w[p]);
- (++p == 3) ? (p = 0) : 0;
-}
-
-/*-----------------------------------------------------------------------
- * Set/Clear sector's lock bit, returns:
- * 0 - OK
- * 1 - Error (timeout, voltage problems, etc.)
- */
-int flash_real_protect(flash_info_t *info, long sector, int prot)
-{
- int i;
- int rc = 0;
- vu_long *addr = (vu_long *)(info->start[sector]);
- int flag = disable_interrupts();
-
- *addr = INTEL_CLEAR; /* Clear status register */
- if (prot) { /* Set sector lock bit */
- *addr = INTEL_LOCKBIT; /* Sector lock bit */
- *addr = INTEL_PROTECT; /* set */
- }
- else { /* Clear sector lock bit */
- *addr = INTEL_LOCKBIT; /* All sectors lock bits */
- *addr = INTEL_CONFIRM; /* clear */
- }
-
- reset_timer_masked ();
-
- while ((*addr & INTEL_FINISHED) != INTEL_FINISHED) {
- if (get_timer_masked () > CFG_FLASH_UNLOCK_TOUT) {
- printf("Flash lock bit operation timed out\n");
- rc = 1;
- break;
- }
- }
-
- if (*addr != INTEL_OK) {
- printf("Flash lock bit operation failed at %08X, CSR=%08X\n",
- (uint)addr, (uint)*addr);
- rc = 1;
- }
-
- if (!rc)
- info->protect[sector] = prot;
-
- /*
- * Clear lock bit command clears all sectors lock bits, so
- * we have to restore lock bits of protected sectors.
- */
- if (!prot)
- {
- for (i = 0; i < info->sector_count; i++)
- {
- if (info->protect[i])
- {
- reset_timer_masked ();
- addr = (vu_long *)(info->start[i]);
- *addr = INTEL_LOCKBIT; /* Sector lock bit */
- *addr = INTEL_PROTECT; /* set */
- while ((*addr & INTEL_FINISHED) != INTEL_FINISHED)
- {
- if (get_timer_masked () > CFG_FLASH_UNLOCK_TOUT)
- {
- printf("Flash lock bit operation timed out\n");
- rc = 1;
- break;
- }
- }
- }
- }
- }
-
- if (flag)
- enable_interrupts();
-
- *addr = INTEL_RESET; /* Reset to read array mode */
-
- return rc;
-}
diff --git a/board/xm250/lowlevel_init.S b/board/xm250/lowlevel_init.S
deleted file mode 100644
index 2ebd39554a..0000000000
--- a/board/xm250/lowlevel_init.S
+++ /dev/null
@@ -1,519 +0,0 @@
-/*
- * Most of this taken from Redboot hal_platform_setup.h with cleanup
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <config.h>
-#include <version.h>
-#include <asm/arch/pxa-regs.h>
-
-DRAM_SIZE: .long CFG_DRAM_SIZE
-
-/* wait for coprocessor write complete */
- .macro CPWAIT reg
- mrc p15,0,\reg,c2,c0,0
- mov \reg,\reg
- sub pc,pc,#4
- .endm
-/*
- .macro SET_LED val
- ldr r6, =CRADLE_LED_CLR_REG
- ldr r7, =0
- str r7, [r6]
- ldr r6, =CRADLE_LED_SET_REG
- ldr r7, =\val
- str r7, [r6]
- .endm
-*/
-
-.globl lowlevel_init
-lowlevel_init:
-
- mov r10, lr
-
- /* Set up GPIO pins first */
-
- ldr r0, =GPSR0
- ldr r1, =CFG_GPSR0_VAL
- str r1, [r0]
-
- ldr r0, =GPSR1
- ldr r1, =CFG_GPSR1_VAL
- str r1, [r0]
-
- ldr r0, =GPSR2
- ldr r1, =CFG_GPSR2_VAL
- str r1, [r0]
-
- ldr r0, =GPCR0
- ldr r1, =CFG_GPCR0_VAL
- str r1, [r0]
-
- ldr r0, =GPCR1
- ldr r1, =CFG_GPCR1_VAL
- str r1, [r0]
-
- ldr r0, =GPCR2
- ldr r1, =CFG_GPCR2_VAL
- str r1, [r0]
-
- ldr r0, =GRER0
- ldr r1, =CFG_GRER0_VAL
- str r1, [r0]
-
- ldr r0, =GRER1
- ldr r1, =CFG_GRER1_VAL
- str r1, [r0]
-
- ldr r0, =GRER2
- ldr r1, =CFG_GRER2_VAL
- str r1, [r0]
-
- ldr r0, =GFER0
- ldr r1, =CFG_GFER0_VAL
- str r1, [r0]
-
- ldr r0, =GFER1
- ldr r1, =CFG_GFER1_VAL
- str r1, [r0]
-
- ldr r0, =GFER2
- ldr r1, =CFG_GFER2_VAL
- str r1, [r0]
-
- ldr r0, =GPDR0
- ldr r1, =CFG_GPDR0_VAL
- str r1, [r0]
-
- ldr r0, =GPDR1
- ldr r1, =CFG_GPDR1_VAL
- str r1, [r0]
-
- ldr r0, =GPDR2
- ldr r1, =CFG_GPDR2_VAL
- str r1, [r0]
-
- ldr r0, =GAFR0_L
- ldr r1, =CFG_GAFR0_L_VAL
- str r1, [r0]
-
- ldr r0, =GAFR0_U
- ldr r1, =CFG_GAFR0_U_VAL
- str r1, [r0]
-
- ldr r0, =GAFR1_L
- ldr r1, =CFG_GAFR1_L_VAL
- str r1, [r0]
-
- ldr r0, =GAFR1_U
- ldr r1, =CFG_GAFR1_U_VAL
- str r1, [r0]
-
- ldr r0, =GAFR2_L
- ldr r1, =CFG_GAFR2_L_VAL
- str r1, [r0]
-
- ldr r0, =GAFR2_U
- ldr r1, =CFG_GAFR2_U_VAL
- str r1, [r0]
-
- /* enable GPIO pins */
- ldr r0, =PSSR
- ldr r1, =CFG_PSSR_VAL
- str r1, [r0]
-
- /* SET_LED 1 */
-
- ldr r3, =MSC1 /* low - bank 2 Lubbock Registers / SRAM */
- ldr r2, =CFG_MSC1_VAL /* high - bank 3 Ethernet Controller */
- str r2, [r3] /* need to set MSC1 before trying to write to the HEX LEDs */
- ldr r2, [r3] /* need to read it back to make sure the value latches (see MSC section of manual) */
-
-
-/*********************************************************************
- * Initlialize Memory Controller
- *
- * See PXA250 Operating System Developer's Guide
- *
- * pause for 200 uSecs- allow internal clocks to settle
- * *Note: only need this if hard reset... doing it anyway for now
- */
-
- @ Step 1
- @ ---- Wait 200 usec
- ldr r3, =OSCR @ reset the OS Timer Count to zero
- mov r2, #0
- str r2, [r3]
- ldr r4, =0x300 @ really 0x2E1 is about 200usec, so 0x300 should be plenty
-1:
- ldr r2, [r3]
- cmp r4, r2
- bgt 1b
-
- /* SET_LED 2 */
-
-mem_init:
- @ get memory controller base address
- ldr r1, =MEMC_BASE
-
-
-@****************************************************************************
-@ Step 2
-@
-
- @ Step 2a
- @ write msc0, read back to ensure data latches
- @
- ldr r2, =CFG_MSC0_VAL
- str r2, [r1, #MSC0_OFFSET]
- ldr r2, [r1, #MSC0_OFFSET]
-
- @ write msc1
- ldr r2, =CFG_MSC1_VAL
- str r2, [r1, #MSC1_OFFSET]
- ldr r2, [r1, #MSC1_OFFSET]
-
- @ write msc2
- ldr r2, =CFG_MSC2_VAL
- str r2, [r1, #MSC2_OFFSET]
- ldr r2, [r1, #MSC2_OFFSET]
-
- @ Step 2b
- @ write mecr
- ldr r2, =CFG_MECR_VAL
- str r2, [r1, #MECR_OFFSET]
-
- @ write mcmem0
- ldr r2, =CFG_MCMEM0_VAL
- str r2, [r1, #MCMEM0_OFFSET]
-
- @ write mcmem1
- ldr r2, =CFG_MCMEM1_VAL
- str r2, [r1, #MCMEM1_OFFSET]
-
- @ write mcatt0
- ldr r2, =CFG_MCATT0_VAL
- str r2, [r1, #MCATT0_OFFSET]
-
- @ write mcatt1
- ldr r2, =CFG_MCATT1_VAL
- str r2, [r1, #MCATT1_OFFSET]
-
- @ write mcio0
- ldr r2, =CFG_MCIO0_VAL
- str r2, [r1, #MCIO0_OFFSET]
-
- @ write mcio1
- ldr r2, =CFG_MCIO1_VAL
- str r2, [r1, #MCIO1_OFFSET]
-
- /*SET_LED 3 */
-
- @ Step 2c
- @ fly-by-dma is defeatured on this part
- @ write flycnfg
- @ldr r2, =CFG_FLYCNFG_VAL
- @str r2, [r1, #FLYCNFG_OFFSET]
-
-/* FIXME Does this sequence really make sense */
-#ifdef REDBOOT_WAY
- @ Step 2d
- @ get the mdrefr settings
- ldr r3, =CFG_MDREFR_VAL
-
- @ extract DRI field (we need a valid DRI field)
- @
- ldr r2, =0xFFF
-
- @ valid DRI field in r3
- @
- and r3, r3, r2
-
- @ get the reset state of MDREFR
- @
- ldr r4, [r1, #MDREFR_OFFSET]
-
- @ clear the DRI field
- @
- bic r4, r4, r2
-
- @ insert the valid DRI field loaded above
- @
- orr r4, r4, r3
-
- @ write back mdrefr
- @
- str r4, [r1, #MDREFR_OFFSET]
-
- @ *Note: preserve the mdrefr value in r4 *
-
- /*SET_LED 4 */
-
-@****************************************************************************
-@ Step 3
-@
-@ NO SRAM
-
- mov pc, r10
-
-
-@****************************************************************************
-@ Step 4
-@
-
- @ Assumes previous mdrefr value in r4, if not then read current mdrefr
-
- @ clear the free-running clock bits
- @ (clear K0Free, K1Free, K2Free
- @
- bic r4, r4, #(0x00800000 | 0x01000000 | 0x02000000)
-
- @ set K0RUN for CPLD clock
- @
- orr r4, r4, #0x00002000
-
- @ set K1RUN if bank 0 installed
- @
- orr r4, r4, #0x00010000
-
- @ write back mdrefr
- @
- str r4, [r1, #MDREFR_OFFSET]
- ldr r4, [r1, #MDREFR_OFFSET]
-
- @ deassert SLFRSH
- @
- bic r4, r4, #0x00400000
-
- @ write back mdrefr
- @
- str r4, [r1, #MDREFR_OFFSET]
-
- @ assert E1PIN
- @
- orr r4, r4, #0x00008000
-
- @ write back mdrefr
- @
- str r4, [r1, #MDREFR_OFFSET]
- ldr r4, [r1, #MDREFR_OFFSET]
- nop
- nop
-#else
- @ Step 2d
- @ get the mdrefr settings
- ldr r4, =CFG_MDREFR_VAL
-
- @ write back mdrefr
- @
- str r4, [r1, #MDREFR_OFFSET]
-
- @ Step 4
-
- @ set K0RUN for FLASH clock
- @
- orr r4, r4, #0x00002000
-
- @ set K1RUN for bank DRAM 0
- @
- orr r4, r4, #0x00010000
-
- @ set K2RUN for bank PLD
- @
- orr r4, r4, #0x00040000
-
- @ write back mdrefr
- @
- str r4, [r1, #MDREFR_OFFSET]
- ldr r4, [r1, #MDREFR_OFFSET]
-
- @ deassert SLFRSH
- @
- bic r4, r4, #0x00400000
-
- @ write back mdrefr
- @
- str r4, [r1, #MDREFR_OFFSET]
-
- @ assert E1PIN
- @
- orr r4, r4, #0x00008000
-
- @ write back mdrefr
- @
- str r4, [r1, #MDREFR_OFFSET]
- ldr r4, [r1, #MDREFR_OFFSET]
- nop
- nop
-#endif
-
- @ Step 4d
- @ fetch platform value of mdcnfg
- @
- ldr r2, =CFG_MDCNFG_VAL
-
- @ disable all sdram banks
- @
- bic r2, r2, #(MDCNFG_DE0 | MDCNFG_DE1)
- bic r2, r2, #(MDCNFG_DE2 | MDCNFG_DE3)
-
- @ program banks 0/1 for bus width
- @
- bic r2, r2, #MDCNFG_DWID0 @0=32-bit
-
- @ write initial value of mdcnfg, w/o enabling sdram banks
- @
- str r2, [r1, #MDCNFG_OFFSET]
-
- @ Step 4e
- @ pause for 200 uSecs
- @
- ldr r3, =OSCR @ reset the OS Timer Count to zero
- mov r2, #0
- str r2, [r3]
- ldr r4, =0x300 @ really 0x2E1 is about 200usec, so 0x300 should be plenty
-1:
- ldr r2, [r3]
- cmp r4, r2
- bgt 1b
-
- /*SET_LED 5 */
-
- /* Why is this here??? */
- mov r0, #0x78 @turn everything off
- mcr p15, 0, r0, c1, c0, 0 @(caches off, MMU off, etc.)
-
- @ Step 4f
- @ Access memory *not yet enabled* for CBR refresh cycles (8)
- @ - CBR is generated for all banks
-
- ldr r2, =CFG_DRAM_BASE
- str r2, [r2]
- str r2, [r2]
- str r2, [r2]
- str r2, [r2]
- str r2, [r2]
- str r2, [r2]
- str r2, [r2]
- str r2, [r2]
-
- @ Step 4g
- @get memory controller base address
- @
- ldr r1, =MEMC_BASE
-
- @fetch current mdcnfg value
- @
- ldr r3, [r1, #MDCNFG_OFFSET]
-
- @enable sdram bank 0 if installed (must do for any populated bank)
- @
- orr r3, r3, #MDCNFG_DE0
-
- @write back mdcnfg, enabling the sdram bank(s)
- @
- str r3, [r1, #MDCNFG_OFFSET]
-
- @ Step 4h
- @ write mdmrs
- @
- ldr r2, =CFG_MDMRS_VAL
- str r2, [r1, #MDMRS_OFFSET]
-
- @ Done Memory Init
-
- /*SET_LED 6 */
-
- @********************************************************************
- @ Disable (mask) all interrupts at the interrupt controller
- @
-
- @ clear the interrupt level register (use IRQ, not FIQ)
- @
- mov r1, #0
- ldr r2, =ICLR
- str r1, [r2]
-
- @ Set interrupt mask register
- @
- ldr r1, =CFG_ICMR_VAL
- ldr r2, =ICMR
- str r1, [r2]
-
- @ ********************************************************************
- @ Disable the peripheral clocks, and set the core clock
- @
-
- @ Turn Off ALL on-chip peripheral clocks for re-configuration
- @
- ldr r1, =CKEN
- mov r2, #0
- str r2, [r1]
-
- @ set core clocks
- @
- ldr r2, =CFG_CCCR_VAL
- ldr r1, =CCCR
- str r2, [r1]
-
-#ifdef ENABLE32KHZ
- @ enable the 32Khz oscillator for RTC and PowerManager
- @
- ldr r1, =OSCC
- mov r2, #OSCC_OON
- str r2, [r1]
-
- @ NOTE: spin here until OSCC.OOK get set,
- @ meaning the PLL has settled.
- @
-60:
- ldr r2, [r1]
- ands r2, r2, #1
- beq 60b
-#endif
-
- @ Turn on needed clocks
- @
- ldr r1, =CKEN
- ldr r2, =CFG_CKEN_VAL
- str r2, [r1]
-
- /*SET_LED 7 */
-
-/* Is this needed???? */
-#define NODEBUG
-#ifdef NODEBUG
- /*Disable software and data breakpoints */
- mov r0,#0
- mcr p15,0,r0,c14,c8,0 /* ibcr0 */
- mcr p15,0,r0,c14,c9,0 /* ibcr1 */
- mcr p15,0,r0,c14,c4,0 /* dbcon */
-
- /*Enable all debug functionality */
- mov r0,#0x80000000
- mcr p14,0,r0,c10,c0,0 /* dcsr */
-
-#endif
-
- /*SET_LED 8 */
-
- mov pc, r10
-
-@ End lowlevel_init
diff --git a/board/xm250/u-boot.lds b/board/xm250/u-boot.lds
deleted file mode 100644
index db8387520e..0000000000
--- a/board/xm250/u-boot.lds
+++ /dev/null
@@ -1,56 +0,0 @@
-/*
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-ENTRY(_start)
-SECTIONS
-{
- . = 0x00000000;
-
- . = ALIGN(4);
- .text :
- {
- cpu/pxa/start.o (.text)
- *(.text)
- }
-
- . = ALIGN(4);
- .rodata : { *(.rodata) }
-
- . = ALIGN(4);
- .data : { *(.data) }
-
- . = ALIGN(4);
- .got : { *(.got) }
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = ALIGN(4);
- __bss_start = .;
- .bss : { *(.bss) }
- _end = .;
-}
diff --git a/board/xm250/xm250.c b/board/xm250/xm250.c
deleted file mode 100644
index ef5e9da0e3..0000000000
--- a/board/xm250/xm250.c
+++ /dev/null
@@ -1,91 +0,0 @@
-/*
- * (C) Copyright 2002
- * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
- *
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <asm/arch/pxa-regs.h>
-#include <common.h>
-
-/* ------------------------------------------------------------------------- */
-
-/* local prototypes */
-
-inline void sleep (int i);
-
-inline void
-/**********************************************************/
-sleep (int i)
-/**********************************************************/
-{
- while (i--) {
- udelay (1000000);
- }
-}
-
-/*
- * Miscelaneous platform dependent initialisations
- */
-
-int
-/**********************************************************/
-board_post_init (void)
-/**********************************************************/
-{
- return (0);
-}
-
-int
-/**********************************************************/
-board_init (void)
-/**********************************************************/
-{
- DECLARE_GLOBAL_DATA_PTR;
- /* arch number of MicroSys XM250 */
- gd->bd->bi_arch_number = MACH_TYPE_XM250;
-
- /* adress of boot parameters */
- gd->bd->bi_boot_params = 0xa0000100;
-
- return 0;
-}
-
-int
-/**********************************************************/
-dram_init (void)
-/**********************************************************/
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
- gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
- gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
- gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
- gd->bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE;
- gd->bd->bi_dram[3].start = PHYS_SDRAM_4;
- gd->bd->bi_dram[3].size = PHYS_SDRAM_4_SIZE;
-
- return (0);
-}
diff --git a/board/xpedite1k/Makefile b/board/xpedite1k/Makefile
deleted file mode 100644
index c5c09152d8..0000000000
--- a/board/xpedite1k/Makefile
+++ /dev/null
@@ -1,48 +0,0 @@
-#
-# (C) Copyright 2002-2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS = $(BOARD).o
-OBJS +=flash.o
-SOBJS = init.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
-sinclude .depend
-
-#########################################################################
diff --git a/board/xpedite1k/config.mk b/board/xpedite1k/config.mk
deleted file mode 100644
index e42b273a41..0000000000
--- a/board/xpedite1k/config.mk
+++ /dev/null
@@ -1,42 +0,0 @@
-#
-# (C) Copyright 2002-2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# XES XPedite1000 PPC440GX
-#
-
-ifeq ($(ramsym),1)
-TEXT_BASE = 0x07FD0000
-else
-TEXT_BASE = 0xFFF80000
-endif
-
-PLATFORM_CPPFLAGS += -DCONFIG_440=1
-
-ifeq ($(debug),1)
-PLATFORM_CPPFLAGS += -DDEBUG
-endif
-
-ifeq ($(dbcr),1)
-PLATFORM_CPPFLAGS += -DCFG_INIT_DBCR=0x8cff0000
-endif
diff --git a/board/xpedite1k/flash.c b/board/xpedite1k/flash.c
deleted file mode 100644
index ce5d4e180a..0000000000
--- a/board/xpedite1k/flash.c
+++ /dev/null
@@ -1,607 +0,0 @@
-/*
- * (C) Copyright 2002-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2002 Jun Gu <jung@artesyncp.com>
- * Add support for Am29F016D and dynamic switch setting.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * Modified 4/5/2001
- * Wait for completion of each sector erase command issued
- * 4/5/2001
- * Chris Hallinan - DS4.COM, Inc. - clh@net1plus.com
- */
-
-/*
- * Ported to XPedite1000, 1/2 mb boot flash only
- * Travis B. Sawyer, <travis.sawyer@sandburst.com>
- */
-
-#include <common.h>
-#include <ppc4xx.h>
-#include <asm/processor.h>
-
-
-#undef DEBUG
-#ifdef DEBUG
-#define DEBUGF(x...) printf(x)
-#else
-#define DEBUGF(x...)
-#endif /* DEBUG */
-
-#define BOOT_SMALL_FLASH 32 /* 00100000 */
-#define FLASH_ONBD_N 2 /* 00000010 */
-#define FLASH_SRAM_SEL 1 /* 00000001 */
-
-#define BOOT_SMALL_FLASH_VAL 4
-#define FLASH_ONBD_N_VAL 2
-#define FLASH_SRAM_SEL_VAL 1
-
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-static unsigned long flash_addr_table[8][CFG_MAX_FLASH_BANKS] = {
- {0xfff80000}, /* 0:000: configuraton 3 */
- {0xfff90000}, /* 1:001: configuraton 4 */
- {0xfffa0000}, /* 2:010: configuraton 7 */
- {0xfffb0000}, /* 3:011: configuraton 8 */
- {0xfffc0000}, /* 4:100: configuraton 1 */
- {0xfffd0000}, /* 5:101: configuraton 2 */
- {0xfffe0000}, /* 6:110: configuraton 5 */
- {0xffff0000} /* 7:111: configuraton 6 */
-};
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (vu_long *addr, flash_info_t *info);
-static int write_word (flash_info_t *info, ulong dest, ulong data);
-
-
-#ifdef CONFIG_XPEDITE1K
-#define ADDR0 0x5555
-#define ADDR1 0x2aaa
-#define FLASH_WORD_SIZE unsigned char
-#endif
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- unsigned long total_b = 0;
- unsigned long size_b[CFG_MAX_FLASH_BANKS];
- unsigned short index = 0;
- int i;
-
-
- DEBUGF("\n");
- DEBUGF("FLASH: Index: %d\n", index);
-
- /* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- flash_info[i].sector_count = -1;
- flash_info[i].size = 0;
-
- /* check whether the address is 0 */
- if (flash_addr_table[index][i] == 0) {
- continue;
- }
-
- /* call flash_get_size() to initialize sector address */
- size_b[i] = flash_get_size(
- (vu_long *)flash_addr_table[index][i], &flash_info[i]);
- flash_info[i].size = size_b[i];
- if (flash_info[i].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n",
- i, size_b[i], size_b[i]<<20);
- flash_info[i].sector_count = -1;
- flash_info[i].size = 0;
- }
-
- total_b += flash_info[i].size;
- }
-
- return total_b;
-}
-
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t *info)
-{
- int i;
- int k;
- int size;
- int erased;
- volatile unsigned long *flash;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD: printf ("AMD "); break;
- case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
- case FLASH_MAN_SST: printf ("SST "); break;
- default: printf ("Unknown Vendor "); break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AMD016: printf ("AM29F016D (16 Mbit, uniform sector size)\n");
- break;
- case FLASH_AM040: printf ("AM29F040 (512 Kbit, uniform sector size)\n");
- break;
- case FLASH_AM400B: printf ("AM29LV400B (4 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM400T: printf ("AM29LV400T (4 Mbit, top boot sector)\n");
- break;
- case FLASH_AM800B: printf ("AM29LV800B (8 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM800T: printf ("AM29LV800T (8 Mbit, top boot sector)\n");
- break;
- case FLASH_AM160B: printf ("AM29LV160B (16 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM160T: printf ("AM29LV160T (16 Mbit, top boot sector)\n");
- break;
- case FLASH_AM320B: printf ("AM29LV320B (32 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM320T: printf ("AM29LV320T (32 Mbit, top boot sector)\n");
- break;
- case FLASH_SST800A: printf ("SST39LF/VF800 (8 Mbit, uniform sector size)\n");
- break;
- case FLASH_SST160A: printf ("SST39LF/VF160 (16 Mbit, uniform sector size)\n");
- break;
- default: printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld KB in %d Sectors\n",
- info->size >> 10, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
- /*
- * Check if whole sector is erased
- */
- if (i != (info->sector_count-1))
- size = info->start[i+1] - info->start[i];
- else
- size = info->start[0] + info->size - info->start[i];
- erased = 1;
- flash = (volatile unsigned long *)info->start[i];
- size = size >> 2; /* divide by 4 for longword access */
- for (k=0; k<size; k++)
- {
- if (*flash++ != 0xffffffff)
- {
- erased = 0;
- break;
- }
- }
-
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s%s",
- info->start[i],
- erased ? " E" : " ",
- info->protect[i] ? "RO " : " "
- );
- }
- printf ("\n");
- return;
- }
-
-/*-----------------------------------------------------------------------
- */
-
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-static ulong flash_get_size (vu_long *addr, flash_info_t *info)
-{
- short i;
- FLASH_WORD_SIZE value;
- ulong base = (ulong)addr;
- volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *)addr;
-
- DEBUGF("FLASH ADDR: %08x\n", (unsigned)addr );
-
- /* Write auto select command: read Manufacturer ID */
- udelay(10000);
- addr2[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
- udelay(1000);
- addr2[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
- udelay(1000);
- addr2[ADDR0] = (FLASH_WORD_SIZE)0x00900090;
- udelay(1000);
-
-#ifdef CONFIG_ADCIOP
- value = addr2[2];
-#else
- value = addr2[0];
-#endif
-
- DEBUGF("FLASH MANUFACT: %x\n", value);
-
- switch (value) {
- case (FLASH_WORD_SIZE)AMD_MANUFACT:
- info->flash_id = FLASH_MAN_AMD;
- break;
- case (FLASH_WORD_SIZE)FUJ_MANUFACT:
- info->flash_id = FLASH_MAN_FUJ;
- break;
- case (FLASH_WORD_SIZE)SST_MANUFACT:
- info->flash_id = FLASH_MAN_SST;
- break;
- case (FLASH_WORD_SIZE)STM_MANUFACT:
- info->flash_id = FLASH_MAN_STM;
- break;
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- return (0); /* no or unknown flash */
- }
-
-#ifdef CONFIG_ADCIOP
- value = addr2[0]; /* device ID */
- debug ("\ndev_code=%x\n", value);
-#else
- value = addr2[1]; /* device ID */
-#endif
-
- DEBUGF("\nFLASH DEVICEID: %x\n", value);
-
- switch (value) {
- case (FLASH_WORD_SIZE)AMD_ID_LV040B:
- info->flash_id += FLASH_AM040;
- info->sector_count = 8;
- info->size = 0x00080000; /* => 512 kb */
- break;
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- return (0); /* => no or unknown flash */
-
- }
-
- /* set up sector start address table */
- if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) ||
- (info->flash_id == FLASH_AM040) ||
- (info->flash_id == FLASH_AMD016)) {
- for (i = 0; i < info->sector_count; i++)
- info->start[i] = base + (i * 0x00010000);
- } else {
- if (info->flash_id & FLASH_BTYPE) {
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00004000;
- info->start[2] = base + 0x00006000;
- info->start[3] = base + 0x00008000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00010000) - 0x00030000;
- }
- } else {
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- info->start[i--] = base + info->size - 0x00004000;
- info->start[i--] = base + info->size - 0x00006000;
- info->start[i--] = base + info->size - 0x00008000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00010000;
- }
- }
- }
-
- /* check for protected sectors */
- for (i = 0; i < info->sector_count; i++) {
- /* read sector protection at sector address, (A7 .. A0) = 0x02 */
- /* D0 = 1 if protected */
-#ifdef CONFIG_ADCIOP
- addr2 = (volatile FLASH_WORD_SIZE *)(info->start[i]);
- info->protect[i] = addr2[4] & 1;
-#else
- addr2 = (volatile FLASH_WORD_SIZE *)(info->start[i]);
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST)
- info->protect[i] = 0;
- else
- info->protect[i] = addr2[2] & 1;
-#endif
- }
-
- /*
- * Prevent writes to uninitialized FLASH.
- */
- if (info->flash_id != FLASH_UNKNOWN) {
-#if 0 /* test-only */
-#ifdef CONFIG_ADCIOP
- addr2 = (volatile unsigned char *)info->start[0];
- addr2[ADDR0] = 0xAA;
- addr2[ADDR1] = 0x55;
- addr2[ADDR0] = 0xF0; /* reset bank */
-#else
- addr2 = (FLASH_WORD_SIZE *)info->start[0];
- *addr2 = (FLASH_WORD_SIZE)0x00F000F0; /* reset bank */
-#endif
-#else /* test-only */
- addr2 = (FLASH_WORD_SIZE *)info->start[0];
- *addr2 = (FLASH_WORD_SIZE)0x00F000F0; /* reset bank */
-#endif /* test-only */
- }
-
- return (info->size);
-}
-
-int wait_for_DQ7(flash_info_t *info, int sect)
-{
- ulong start, now, last;
- volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[sect]);
-
- start = get_timer (0);
- last = start;
- while ((addr[0] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080) {
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- return -1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- }
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[0]);
- volatile FLASH_WORD_SIZE *addr2;
- int flag, prot, sect, l_sect;
- int i;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("Can't erase unknown flash type - aborted\n");
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- l_sect = -1;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr2 = (FLASH_WORD_SIZE *)(info->start[sect]);
- printf("Erasing sector %p\n", addr2);
-
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) {
- addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
- addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
- addr[ADDR0] = (FLASH_WORD_SIZE)0x00800080;
- addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
- addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
- addr2[0] = (FLASH_WORD_SIZE)0x00500050; /* block erase */
- for (i=0; i<50; i++)
- udelay(1000); /* wait 1 ms */
- } else {
- addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
- addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
- addr[ADDR0] = (FLASH_WORD_SIZE)0x00800080;
- addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
- addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
- addr2[0] = (FLASH_WORD_SIZE)0x00300030; /* sector erase */
- }
- l_sect = sect;
- /*
- * Wait for each sector to complete, it's more
- * reliable. According to AMD Spec, you must
- * issue all erase commands within a specified
- * timeout. This has been seen to fail, especially
- * if printf()s are included (for debug)!!
- */
- wait_for_DQ7(info, sect);
- }
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
-#if 0
- /*
- * We wait for the last triggered sector
- */
- if (l_sect < 0)
- goto DONE;
- wait_for_DQ7(info, l_sect);
-
-DONE:
-#endif
- /* reset to read mode */
- addr = (FLASH_WORD_SIZE *)info->start[0];
- addr[0] = (FLASH_WORD_SIZE)0x00F000F0; /* reset bank */
-
- printf (" done\n");
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int i, l, rc;
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
- for (; i<4 && cnt>0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = 0;
- for (i=0; i<4; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- return (write_word(info, wp, data));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word (flash_info_t * info, ulong dest, ulong data)
-{
- volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *) (info->start[0]);
- volatile FLASH_WORD_SIZE *dest2 = (FLASH_WORD_SIZE *) dest;
- volatile FLASH_WORD_SIZE *data2 = (FLASH_WORD_SIZE *) & data;
- ulong start;
- int i;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*((volatile FLASH_WORD_SIZE *) dest) &
- (FLASH_WORD_SIZE) data) != (FLASH_WORD_SIZE) data) {
- return (2);
- }
-
- for (i = 0; i < 4 / sizeof (FLASH_WORD_SIZE); i++) {
- int flag;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
-
- addr2[ADDR0] = (FLASH_WORD_SIZE) 0x00AA00AA;
- addr2[ADDR1] = (FLASH_WORD_SIZE) 0x00550055;
- addr2[ADDR0] = (FLASH_WORD_SIZE) 0x00A000A0;
-
- dest2[i] = data2[i];
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts ();
-
- /* data polling for D7 */
- start = get_timer (0);
- while ((dest2[i] & (FLASH_WORD_SIZE) 0x00800080) !=
- (data2[i] & (FLASH_WORD_SIZE) 0x00800080)) {
-
- if (get_timer (start) > CFG_FLASH_WRITE_TOUT) {
- return (1);
- }
- }
- }
-
- return (0);
-}
-
-/*-----------------------------------------------------------------------
- */
diff --git a/board/xpedite1k/init.S b/board/xpedite1k/init.S
deleted file mode 100644
index 6cb20e40fc..0000000000
--- a/board/xpedite1k/init.S
+++ /dev/null
@@ -1,96 +0,0 @@
-/*
-* Copyright (C) 2002 Scott McNutt <smcnutt@artesyncp.com>
-*
-* See file CREDITS for list of people who contributed to this
-* project.
-*
-* This program is free software; you can redistribute it and/or
-* modify it under the terms of the GNU General Public License as
-* published by the Free Software Foundation; either version 2 of
-* the License, or (at your option) any later version.
-*
-* This program is distributed in the hope that it will be useful,
-* but WITHOUT ANY WARRANTY; without even the implied warranty of
-* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-* GNU General Public License for more details.
-*
-* You should have received a copy of the GNU General Public License
-* along with this program; if not, write to the Free Software
-* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-* MA 02111-1307 USA
-*/
-
-#include <ppc_asm.tmpl>
-#include <config.h>
-
-/* General */
-#define TLB_VALID 0x00000200
-
-/* Supported page sizes */
-
-#define SZ_1K 0x00000000
-#define SZ_4K 0x00000010
-#define SZ_16K 0x00000020
-#define SZ_64K 0x00000030
-#define SZ_256K 0x00000040
-#define SZ_1M 0x00000050
-#define SZ_16M 0x00000070
-#define SZ_256M 0x00000090
-
-/* Storage attributes */
-#define SA_W 0x00000800 /* Write-through */
-#define SA_I 0x00000400 /* Caching inhibited */
-#define SA_M 0x00000200 /* Memory coherence */
-#define SA_G 0x00000100 /* Guarded */
-#define SA_E 0x00000080 /* Endian */
-
-/* Access control */
-#define AC_X 0x00000024 /* Execute */
-#define AC_W 0x00000012 /* Write */
-#define AC_R 0x00000009 /* Read */
-
-/* Some handy macros */
-
-#define EPN(e) ((e) & 0xfffffc00)
-#define TLB0(epn,sz) ( (EPN((epn)) | (sz) | TLB_VALID ) )
-#define TLB1(rpn,erpn) ( ((rpn)&0xfffffc00) | (erpn) )
-#define TLB2(a) ( (a)&0x00000fbf )
-
-#define tlbtab_start\
- mflr r1 ;\
- bl 0f ;
-
-#define tlbtab_end\
- .long 0, 0, 0 ; \
-0: mflr r0 ; \
- mtlr r1 ; \
- blr ;
-
-#define tlbentry(epn,sz,rpn,erpn,attr)\
- .long TLB0(epn,sz),TLB1(rpn,erpn),TLB2(attr)
-
-
-/**************************************************************************
- * TLB TABLE
- *
- * This table is used by the cpu boot code to setup the initial tlb
- * entries. Rather than make broad assumptions in the cpu source tree,
- * this table lets each board set things up however they like.
- *
- * Pointer to the table is returned in r1
- *
- *************************************************************************/
-
- .section .bootpg,"ax"
- .globl tlbtab
-
-tlbtab:
- tlbtab_start
- tlbentry( 0xf0000000, SZ_256M, 0xf0000000, 1, AC_R|AC_W|AC_X|SA_G|SA_I)
- tlbentry( CFG_PERIPHERAL_BASE, SZ_256M, 0x40000000, 1, AC_R|AC_W|SA_G|SA_I)
- tlbentry( CFG_ISRAM_BASE, SZ_256K, 0x80000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I)
- tlbentry( CFG_SDRAM_BASE, SZ_256M, 0x00000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I )
- tlbentry( CFG_SDRAM_BASE+0x10000000, SZ_256M, 0x10000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I )
- tlbentry( CFG_PCI_BASE, SZ_256M, 0x00000000, 2, AC_R|AC_W|SA_G|SA_I )
- tlbentry( CFG_PCI_MEMBASE, SZ_256M, 0x00000000, 3, AC_R|AC_W|SA_G|SA_I )
- tlbtab_end
diff --git a/board/xpedite1k/u-boot.lds b/board/xpedite1k/u-boot.lds
deleted file mode 100644
index 0f08637107..0000000000
--- a/board/xpedite1k/u-boot.lds
+++ /dev/null
@@ -1,157 +0,0 @@
-/*
- * (C) Copyright 2002-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- .resetvec 0xFFFFFFFC :
- {
- *(.resetvec)
- } = 0xffff
-
- .bootpg 0xFFFFF000 :
- {
- cpu/ppc4xx/start.o (.bootpg)
- } = 0xffff
-
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/ppc4xx/start.o (.text)
- board/xpedite1k/init.o (.text)
- cpu/ppc4xx/kgdb.o (.text)
- cpu/ppc4xx/traps.o (.text)
- cpu/ppc4xx/interrupts.o (.text)
- cpu/ppc4xx/serial.o (.text)
- cpu/ppc4xx/cpu_init.o (.text)
- cpu/ppc4xx/speed.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/extable.o (.text)
- lib_generic/zlib.o (.text)
-
-/* . = env_offset;*/
-/* common/environment.o(.text)*/
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/xpedite1k/u-boot.lds.debug b/board/xpedite1k/u-boot.lds.debug
deleted file mode 100644
index 5066326927..0000000000
--- a/board/xpedite1k/u-boot.lds.debug
+++ /dev/null
@@ -1,144 +0,0 @@
-/*
- * (C) Copyright 2002-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/ppc4xx/start.o (.text)
- board/xpedite1k/init.o (.text)
- cpu/ppc4xx/kgdb.o (.text)
- cpu/ppc4xx/traps.o (.text)
- cpu/ppc4xx/interrupts.o (.text)
- cpu/ppc4xx/serial.o (.text)
- cpu/ppc4xx/cpu_init.o (.text)
- cpu/ppc4xx/speed.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/extable.o (.text)
- lib_generic/zlib.o (.text)
-
-/* common/environment.o(.text) */
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/xpedite1k/xpedite1k.c b/board/xpedite1k/xpedite1k.c
deleted file mode 100644
index bb36c96523..0000000000
--- a/board/xpedite1k/xpedite1k.c
+++ /dev/null
@@ -1,351 +0,0 @@
-/*
- * Copyright (C) 2003 Travis B. Sawyer <travis.sawyer@sandburst.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-
-#include <common.h>
-#include <asm/processor.h>
-#include <spd_sdram.h>
-#include <i2c.h>
-
-#define BOOT_SMALL_FLASH 32 /* 00100000 */
-#define FLASH_ONBD_N 2 /* 00000010 */
-#define FLASH_SRAM_SEL 1 /* 00000001 */
-
-long int fixed_sdram (void);
-
-int board_early_init_f(void)
-{
- unsigned long sdrreg;
- /* TBS: Setup the GPIO access for the user LEDs */
- mfsdr(sdr_pfc0, sdrreg);
- mtsdr(sdr_pfc0, (sdrreg & ~0x00000100) | 0x00000E00);
- out32(CFG_GPIO_BASE + 0x018, (USR_LED0 | USR_LED1 | USR_LED2 | USR_LED3));
- LED0_OFF();
- LED1_OFF();
- LED2_OFF();
- LED3_OFF();
-
- /*--------------------------------------------------------------------
- * Setup the external bus controller/chip selects
- *-------------------------------------------------------------------*/
-
- /* set the bus controller */
- mtebc (pb0ap, 0x04055200); /* FLASH/SRAM */
- mtebc (pb0cr, 0xfff18000); /* BAS=0xfff 1MB R/W 8-bit */
- mtebc (pb1ap, 0x04055200); /* FLASH/SRAM */
- mtebc (pb1cr, 0xfe098000); /* BAS=0xff8 16MB R/W 8-bit */
-
- /*--------------------------------------------------------------------
- * Setup the interrupt controller polarities, triggers, etc.
- *-------------------------------------------------------------------*/
- mtdcr (uic0sr, 0xffffffff); /* clear all */
- mtdcr (uic0er, 0x00000000); /* disable all */
- mtdcr (uic0cr, 0x00000003); /* SMI & UIC1 crit are critical */
- mtdcr (uic0pr, 0xfffffe00); /* per ref-board manual */
- mtdcr (uic0tr, 0x01c00000); /* per ref-board manual */
- mtdcr (uic0vr, 0x00000001); /* int31 highest, base=0x000 */
- mtdcr (uic0sr, 0xffffffff); /* clear all */
-
- mtdcr (uic1sr, 0xffffffff); /* clear all */
- mtdcr (uic1er, 0x00000000); /* disable all */
- mtdcr (uic1cr, 0x00000000); /* all non-critical */
- mtdcr (uic1pr, 0xffffc0ff); /* per ref-board manual */
- mtdcr (uic1tr, 0x00ff8000); /* per ref-board manual */
- mtdcr (uic1vr, 0x00000001); /* int31 highest, base=0x000 */
- mtdcr (uic1sr, 0xffffffff); /* clear all */
-
- mtdcr (uic2sr, 0xffffffff); /* clear all */
- mtdcr (uic2er, 0x00000000); /* disable all */
- mtdcr (uic2cr, 0x00000000); /* all non-critical */
- mtdcr (uic2pr, 0xffffffff); /* per ref-board manual */
- mtdcr (uic2tr, 0x00ff8c0f); /* per ref-board manual */
- mtdcr (uic2vr, 0x00000001); /* int31 highest, base=0x000 */
- mtdcr (uic2sr, 0xffffffff); /* clear all */
-
- mtdcr (uicb0sr, 0xfc000000); /* clear all */
- mtdcr (uicb0er, 0x00000000); /* disable all */
- mtdcr (uicb0cr, 0x00000000); /* all non-critical */
- mtdcr (uicb0pr, 0xfc000000); /* */
- mtdcr (uicb0tr, 0x00000000); /* */
- mtdcr (uicb0vr, 0x00000001); /* */
-
- LED0_ON();
-
-
- return 0;
-}
-
-int checkboard (void)
-{
- printf ("Board: XES XPedite1000 440GX\n");
-
- return (0);
-}
-
-
-long int initdram (int board_type)
-{
- long dram_size = 0;
-
-#if defined(CONFIG_SPD_EEPROM)
- dram_size = spd_sdram (0);
-#else
- dram_size = fixed_sdram ();
-#endif
- return dram_size;
-}
-
-
-#if defined(CFG_DRAM_TEST)
-int testdram (void)
-{
- uint *pstart = (uint *) 0x00000000;
- uint *pend = (uint *) 0x08000000;
- uint *p;
-
- for (p = pstart; p < pend; p++)
- *p = 0xaaaaaaaa;
-
- for (p = pstart; p < pend; p++) {
- if (*p != 0xaaaaaaaa) {
- printf ("SDRAM test fails at: %08x\n", (uint) p);
- return 1;
- }
- }
-
- for (p = pstart; p < pend; p++)
- *p = 0x55555555;
-
- for (p = pstart; p < pend; p++) {
- if (*p != 0x55555555) {
- printf ("SDRAM test fails at: %08x\n", (uint) p);
- return 1;
- }
- }
- return 0;
-}
-#endif
-
-#if !defined(CONFIG_SPD_EEPROM)
-/*************************************************************************
- * fixed sdram init -- doesn't use serial presence detect.
- *
- * Assumes: 128 MB, non-ECC, non-registered
- * PLB @ 133 MHz
- *
- ************************************************************************/
-long int fixed_sdram (void)
-{
- uint reg;
-
- /*--------------------------------------------------------------------
- * Setup some default
- *------------------------------------------------------------------*/
- mtsdram (mem_uabba, 0x00000000); /* ubba=0 (default) */
- mtsdram (mem_slio, 0x00000000); /* rdre=0 wrre=0 rarw=0 */
- mtsdram (mem_devopt, 0x00000000); /* dll=0 ds=0 (normal) */
- mtsdram (mem_wddctr, 0x00000000); /* wrcp=0 dcd=0 */
- mtsdram (mem_clktr, 0x40000000); /* clkp=1 (90 deg wr) dcdt=0 */
-
- /*--------------------------------------------------------------------
- * Setup for board-specific specific mem
- *------------------------------------------------------------------*/
- /*
- * Following for CAS Latency = 2.5 @ 133 MHz PLB
- */
- mtsdram (mem_b0cr, 0x000a4001); /* SDBA=0x000 128MB, Mode 3, enabled */
- mtsdram (mem_tr0, 0x410a4012); /* WR=2 WD=1 CL=2.5 PA=3 CP=4 LD=2 */
- /* RA=10 RD=3 */
- mtsdram (mem_tr1, 0x8080082f); /* SS=T2 SL=STAGE 3 CD=1 CT=0x02f */
- mtsdram (mem_rtr, 0x08200000); /* Rate 15.625 ns @ 133 MHz PLB */
- mtsdram (mem_cfg1, 0x00000000); /* Self-refresh exit, disable PM */
- udelay (400); /* Delay 200 usecs (min) */
-
- /*--------------------------------------------------------------------
- * Enable the controller, then wait for DCEN to complete
- *------------------------------------------------------------------*/
- mtsdram (mem_cfg0, 0x86000000); /* DCEN=1, PMUD=1, 64-bit */
- for (;;) {
- mfsdram (mem_mcsts, reg);
- if (reg & 0x80000000)
- break;
- }
-
- return (128 * 1024 * 1024); /* 128 MB */
-}
-#endif /* !defined(CONFIG_SPD_EEPROM) */
-
-
-/*************************************************************************
- * pci_pre_init
- *
- * This routine is called just prior to registering the hose and gives
- * the board the opportunity to check things. Returning a value of zero
- * indicates that things are bad & PCI initialization should be aborted.
- *
- * Different boards may wish to customize the pci controller structure
- * (add regions, override default access routines, etc) or perform
- * certain pre-initialization actions.
- *
- ************************************************************************/
-#if defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT)
-int pci_pre_init(struct pci_controller * hose )
-{
- unsigned long strap;
- /* See if we're supposed to setup the pci */
- mfsdr(sdr_sdstp1, strap);
- if ((strap & 0x00010000) == 0) {
- return (0);
- }
-
-#if defined(CFG_PCI_FORCE_PCI_CONV)
- /* Setup System Device Register PCIX0_XCR */
- mfsdr(sdr_xcr, strap);
- strap &= 0x0f000000;
- mtsdr(sdr_xcr, strap);
-#endif
- return 1;
-}
-#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT) */
-
-/*************************************************************************
- * pci_target_init
- *
- * The bootstrap configuration provides default settings for the pci
- * inbound map (PIM). But the bootstrap config choices are limited and
- * may not be sufficient for a given board.
- *
- ************************************************************************/
-#if defined(CONFIG_PCI) && defined(CFG_PCI_TARGET_INIT)
-void pci_target_init(struct pci_controller * hose )
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- /*--------------------------------------------------------------------------+
- * Disable everything
- *--------------------------------------------------------------------------*/
- out32r( PCIX0_PIM0SA, 0 ); /* disable */
- out32r( PCIX0_PIM1SA, 0 ); /* disable */
- out32r( PCIX0_PIM2SA, 0 ); /* disable */
- out32r( PCIX0_EROMBA, 0 ); /* disable expansion rom */
-
- /*--------------------------------------------------------------------------+
- * Map all of SDRAM to PCI address 0x0000_0000. Note that the 440 strapping
- * options to not support sizes such as 128/256 MB.
- *--------------------------------------------------------------------------*/
- out32r( PCIX0_PIM0LAL, CFG_SDRAM_BASE );
- out32r( PCIX0_PIM0LAH, 0 );
- out32r( PCIX0_PIM0SA, ~(gd->ram_size - 1) | 1 );
-
- out32r( PCIX0_BAR0, 0 );
-
- /*--------------------------------------------------------------------------+
- * Program the board's subsystem id/vendor id
- *--------------------------------------------------------------------------*/
- out16r( PCIX0_SBSYSVID, CFG_PCI_SUBSYS_VENDORID );
- out16r( PCIX0_SBSYSID, CFG_PCI_SUBSYS_DEVICEID );
-
- out16r( PCIX0_CMD, in16r(PCIX0_CMD) | PCI_COMMAND_MEMORY );
-}
-#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_TARGET_INIT) */
-
-
-/*************************************************************************
- * is_pci_host
- *
- * This routine is called to determine if a pci scan should be
- * performed. With various hardware environments (especially cPCI and
- * PPMC) it's insufficient to depend on the state of the arbiter enable
- * bit in the strap register, or generic host/adapter assumptions.
- *
- * Rather than hard-code a bad assumption in the general 440 code, the
- * 440 pci code requires the board to decide at runtime.
- *
- * Return 0 for adapter mode, non-zero for host (monarch) mode.
- *
- *
- ************************************************************************/
-#if defined(CONFIG_PCI)
-int is_pci_host(struct pci_controller *hose)
-{
- return ((in32(CFG_GPIO_BASE + 0x1C) & 0x00000800) == 0);
-}
-#endif /* defined(CONFIG_PCI) */
-
-#ifdef CONFIG_POST
-/*
- * Returns 1 if keys pressed to start the power-on long-running tests
- * Called from board_init_f().
- */
-int post_hotkeys_pressed(void)
-{
-
- return (ctrlc());
-}
-
-void post_word_store (ulong a)
-{
- volatile ulong *save_addr =
- (volatile ulong *)(CFG_POST_WORD_ADDR);
-
- *save_addr = a;
-}
-
-ulong post_word_load (void)
-{
- volatile ulong *save_addr =
- (volatile ulong *)(CFG_POST_WORD_ADDR);
-
- return *save_addr;
-}
-#endif
-
-/*-----------------------------------------------------------------------------
- * board_get_enetaddr -- Read the MAC Addresses in the I2C EEPROM
- *-----------------------------------------------------------------------------
- */
-static int enetaddr_num = 0;
-void board_get_enetaddr (uchar * enet)
-{
- int i;
- unsigned char buff[0x100], *cp;
-
- /* Initialize I2C */
- i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
-
- /* Read 256 bytes in EEPROM */
- i2c_read (0x50, 0, 1, buff, 0x100);
-
- if (enetaddr_num == 0) {
- cp = &buff[0xF4];
- enetaddr_num = 1;
- }
- else
- cp = &buff[0xFA];
-
- for (i = 0; i < 6; i++,cp++)
- enet[i] = *cp;
-
- printf ("MAC address = %02x:%02x:%02x:%02x:%02x:%02x\n",
- enet[0], enet[1], enet[2], enet[3], enet[4], enet[5]);
-
-}
diff --git a/board/xsengine/Makefile b/board/xsengine/Makefile
deleted file mode 100644
index ed1464af3e..0000000000
--- a/board/xsengine/Makefile
+++ /dev/null
@@ -1,47 +0,0 @@
-#
-# (C) Copyright 2000-2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := xsengine.o flash.o
-SOBJS := lowlevel_init.o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS) $(SOBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/xsengine/config.mk b/board/xsengine/config.mk
deleted file mode 100644
index 148c5199d3..0000000000
--- a/board/xsengine/config.mk
+++ /dev/null
@@ -1 +0,0 @@
-TEXT_BASE = 0xA3F80000
diff --git a/board/xsengine/flash.c b/board/xsengine/flash.c
deleted file mode 100644
index 2b9afc7a77..0000000000
--- a/board/xsengine/flash.c
+++ /dev/null
@@ -1,470 +0,0 @@
-/*
- * (C) Copyright 2002
- * Robert Schwebel, Pengutronix, <r.schwebel@pengutronix.de>
- *
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <linux/byteorder/swab.h>
-
-#define SWAP(x) __swab32(x)
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/* Functions */
-static ulong flash_get_size (vu_long *addr, flash_info_t *info);
-static int write_word (flash_info_t *info, ulong dest, ulong data);
-static void flash_get_offsets (ulong base, flash_info_t *info);
-
-/*-----------------------------------------------------------------------
- */
-unsigned long flash_init (void)
-{
- int i;
- ulong size = 0;
-
- for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
- switch (i) {
- case 0:
- flash_get_size ((long *) PHYS_FLASH_1, &flash_info[i]);
- flash_get_offsets (PHYS_FLASH_1, &flash_info[i]);
- break;
- case 1:
- flash_get_size ((long *) PHYS_FLASH_2, &flash_info[i]);
- flash_get_offsets (PHYS_FLASH_2, &flash_info[i]);
- break;
- default:
- panic ("configured too many flash banks!\n");
- break;
- }
- size += flash_info[i].size;
- }
-
- /* Protect monitor and environment sectors */
- flash_protect ( FLAG_PROTECT_SET,CFG_FLASH_BASE,CFG_FLASH_BASE + monitor_flash_len - 1,&flash_info[0] );
- flash_protect ( FLAG_PROTECT_SET,CFG_ENV_ADDR,CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0] );
-
- return size;
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_get_offsets (ulong base, flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) return;
-
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD) {
- for (i = 0; i < info->sector_count; i++) {
- info->start[i] = base + (i * PHYS_FLASH_SECT_SIZE);
- info->protect[i] = 0;
- }
- }
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD: printf ("AMD "); break;
- case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
- default: printf ("Unknown Vendor "); break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AMLV640U: printf ("AM29LV640ML (64Mbit, uniform sector size)\n");
- break;
- case FLASH_S29GL064M: printf ("S29GL064M (64Mbit, top boot sector size)\n");
- break;
- default: printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " "
- );
- }
- printf ("\n");
- return;
-}
-
-/*
- * The following code cannot be run from FLASH!
- */
-static ulong flash_get_size (vu_long *addr, flash_info_t *info)
-{
- short i;
- ulong value;
- ulong base = (ulong)addr;
-
- /* Write auto select command: read Manufacturer ID */
- addr[0x0555] = 0x00AA00AA;
- addr[0x02AA] = 0x00550055;
- addr[0x0555] = 0x00900090;
-
- value = addr[0];
-
- debug ("Manuf. ID @ 0x%08lx: 0x%08lx\n", (ulong)addr, value);
-
- switch (value) {
- case AMD_MANUFACT:
- debug ("Manufacturer: AMD\n");
- info->flash_id = FLASH_MAN_AMD;
- break;
- case FUJ_MANUFACT:
- debug ("Manufacturer: FUJITSU\n");
- info->flash_id = FLASH_MAN_FUJ;
- break;
- default:
- debug ("Manufacturer: *** unknown ***\n");
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- return (0); /* no or unknown flash */
- }
-
- value = addr[1]; /* device ID */
-
- debug ("Device ID @ 0x%08lx: 0x%08lx\n", (ulong)(&addr[1]), value);
-
- switch (value) {
-
- case AMD_ID_MIRROR:
- debug ("Mirror Bit flash: addr[14] = %08lX addr[15] = %08lX\n",
- addr[14], addr[15]);
- switch(addr[14]) {
- case AMD_ID_LV640U_2:
- if (addr[15] != AMD_ID_LV640U_3) {
- debug ("Chip: AMLV640U -> unknown\n");
- info->flash_id = FLASH_UNKNOWN;
- } else {
- debug ("Chip: AMLV640U\n");
- info->flash_id += FLASH_AMLV640U;
- info->sector_count = 128;
- info->size = 0x01000000;
- }
- break; /* => 16 MB */
- case AMD_ID_GL064MT_2:
- if (addr[15] != AMD_ID_GL064MT_3) {
- debug ("Chip: S29GL064M-R3 -> unknown\n");
- info->flash_id = FLASH_UNKNOWN;
- } else {
- debug ("Chip: S29GL064M-R3\n");
- info->flash_id += FLASH_S29GL064M;
- info->sector_count = 128;
- info->size = 0x01000000;
- }
- break; /* => 16 MB */
- default:
- debug ("Chip: *** unknown ***\n");
- info->flash_id = FLASH_UNKNOWN;
- break;
- }
- break;
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- return (0); /* => no or unknown flash */
- }
-
- /* set up sector start address table */
- switch (value) {
- case AMD_ID_MIRROR:
- switch (info->flash_id & FLASH_TYPEMASK) {
- /* only known types here - no default */
- case FLASH_AMLV128U:
- case FLASH_AMLV640U:
- case FLASH_AMLV320U:
- for (i = 0; i < info->sector_count; i++) {
- info->start[i] = base;
- base += 0x20000;
- }
- break;
- case FLASH_AMLV320B:
- for (i = 0; i < info->sector_count; i++) {
- info->start[i] = base;
- /*
- * The first 8 sectors are 8 kB,
- * all the other ones are 64 kB
- */
- base += (i < 8)
- ? 2 * ( 8 << 10)
- : 2 * (64 << 10);
- }
- break;
- }
- break;
-
- default:
- return (0);
- break;
- }
-
-#if 0
- /* check for protected sectors */
- for (i = 0; i < info->sector_count; i++) {
- /* read sector protection at sector address, (A7 .. A0) = 0x02 */
- /* D0 = 1 if protected */
- addr = (volatile unsigned long *)(info->start[i]);
- info->protect[i] = addr[2] & 1;
- }
-#endif
-
- /*
- * Prevent writes to uninitialized FLASH.
- */
- if (info->flash_id != FLASH_UNKNOWN) {
- addr = (volatile unsigned long *)info->start[0];
-
- *addr = 0x00F000F0; /* reset bank */
- }
-
- return (info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- vu_long *addr = (vu_long*)(info->start[0]);
- int flag, prot, sect, l_sect;
- ulong start, now, last;
-
- debug ("flash_erase: first: %d last: %d\n", s_first, s_last);
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- if ((info->flash_id == FLASH_UNKNOWN) ||
- (info->flash_id > FLASH_AMD_COMP)) {
- printf ("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- l_sect = -1;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[0x0555] = 0x00AA00AA;
- addr[0x02AA] = 0x00550055;
- addr[0x0555] = 0x00800080;
- addr[0x0555] = 0x00AA00AA;
- addr[0x02AA] = 0x00550055;
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr = (vu_long*)(info->start[sect]);
- addr[0] = 0x00300030;
- l_sect = sect;
- }
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- /*
- * We wait for the last triggered sector
- */
- if (l_sect < 0)
- goto DONE;
-
- start = get_timer (0);
- last = start;
- addr = (vu_long*)(info->start[l_sect]);
- while ((addr[0] & 0x00800080) != 0x00800080) {
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- return 1;
- }
- /* show that we're waiting */
- if ((now - last) > 100000) { /* every second */
- putc ('.');
- last = now;
- }
- }
-
-DONE:
- /* reset to read mode */
- addr = (volatile unsigned long *)info->start[0];
- addr[0] = 0x00F000F0; /* reset bank */
-
- printf (" done\n");
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int i, l, rc;
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
- for (; i<4 && cnt>0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- if ((rc = write_word(info, wp, SWAP(data))) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = 0;
- for (i=0; i<4; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_word(info, wp, SWAP(data))) != 0) {
- return (rc);
- }
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- return (write_word(info, wp, SWAP(data)));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word (flash_info_t *info, ulong dest, ulong data)
-{
- vu_long *addr = (vu_long*)(info->start[0]);
- ulong start;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*((vu_long *)dest) & data) != data) {
- return (2);
- }
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[0x0555] = 0x00AA00AA;
- addr[0x02AA] = 0x00550055;
- addr[0x0555] = 0x00A000A0;
-
- *((vu_long *)dest) = data;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* data polling for D7 */
- start = get_timer (0);
- while ((*((vu_long *)dest) & 0x00800080) != (data & 0x00800080)) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
- return (1);
- }
- }
- return (0);
-}
diff --git a/board/xsengine/lowlevel_init.S b/board/xsengine/lowlevel_init.S
deleted file mode 100644
index 309faabd92..0000000000
--- a/board/xsengine/lowlevel_init.S
+++ /dev/null
@@ -1,221 +0,0 @@
-#include <config.h>
-#include <version.h>
-#include <asm/arch/pxa-regs.h>
-
-DRAM_SIZE: .long CFG_DRAM_SIZE
-
-.globl lowlevel_init
-lowlevel_init:
-
- mov r10, lr
-
-/* ---- GPIO INITIALISATION ---- */
-/* Set up GPIO pins first (3 groups [31:0] [63:32] [80:64]) */
-
- /* General purpose set registers */
- ldr r0, =GPSR0
- ldr r1, =CFG_GPSR0_VAL
- str r1, [r0]
- ldr r0, =GPSR1
- ldr r1, =CFG_GPSR1_VAL
- str r1, [r0]
- ldr r0, =GPSR2
- ldr r1, =CFG_GPSR2_VAL
- str r1, [r0]
-
- /* General purpose clear registers */
- ldr r0, =GPCR0
- ldr r1, =CFG_GPCR0_VAL
- str r1, [r0]
- ldr r0, =GPCR1
- ldr r1, =CFG_GPCR1_VAL
- str r1, [r0]
- ldr r0, =GPCR2
- ldr r1, =CFG_GPCR2_VAL
- str r1, [r0]
-
- /* General rising edge registers */
- ldr r0, =GRER0
- ldr r1, =CFG_GRER0_VAL
- str r1, [r0]
- ldr r0, =GRER1
- ldr r1, =CFG_GRER1_VAL
- str r1, [r0]
- ldr r0, =GRER2
- ldr r1, =CFG_GRER2_VAL
- str r1, [r0]
-
- /* General falling edge registers */
- ldr r0, =GFER0
- ldr r1, =CFG_GFER0_VAL
- str r1, [r0]
- ldr r0, =GFER1
- ldr r1, =CFG_GFER1_VAL
- str r1, [r0]
- ldr r0, =GFER2
- ldr r1, =CFG_GFER2_VAL
- str r1, [r0]
-
- /* General edge detect registers */
- ldr r0, =GPDR0
- ldr r1, =CFG_GPDR0_VAL
- str r1, [r0]
- ldr r0, =GPDR1
- ldr r1, =CFG_GPDR1_VAL
- str r1, [r0]
- ldr r0, =GPDR2
- ldr r1, =CFG_GPDR2_VAL
- str r1, [r0]
-
- /* General alternate function registers */
- ldr r0, =GAFR0_L /* [0:15] */
- ldr r1, =CFG_GAFR0_L_VAL
- str r1, [r0]
- ldr r0, =GAFR0_U /* [31:16] */
- ldr r1, =CFG_GAFR0_U_VAL
- str r1, [r0]
- ldr r0, =GAFR1_L /* [47:32] */
- ldr r1, =CFG_GAFR1_L_VAL
- str r1, [r0]
- ldr r0, =GAFR1_U /* [63:48] */
- ldr r1, =CFG_GAFR1_U_VAL
- str r1, [r0]
- ldr r0, =GAFR2_L /* [79:64] */
- ldr r1, =CFG_GAFR2_L_VAL
- str r1, [r0]
- ldr r0, =GAFR2_U /* [80] */
- ldr r1, =CFG_GAFR2_U_VAL
- str r1, [r0]
-
- /* General purpose direction registers */
- ldr r0, =GPDR0
- ldr r1, =CFG_GPDR0_VAL
- str r1, [r0]
- ldr r0, =GPDR1
- ldr r1, =CFG_GPDR1_VAL
- str r1, [r0]
- ldr r0, =GPDR2
- ldr r1, =CFG_GPDR2_VAL
- str r1, [r0]
-
- /* Power manager sleep status */
- ldr r0, =PSSR
- ldr r1, =CFG_PSSR_VAL
- str r1, [r0]
-
-/* ---- MEMORY INITIALISATION ---- */
-/* Initialize Memory Controller, see PXA250 Operating System Developer's Guide */
-/* pause for 200 uSecs- allow internal clocks to settle */
- ldr r3, =OSCR /* reset the OS Timer Count to zero */
- mov r2, #0
- str r2, [r3]
- ldr r4, =0x300 /* really 0x2E1 is about 200usec, so 0x300 should be plenty */
-1:
- ldr r2, [r3]
- cmp r4, r2
- bgt 1b
-
-mem_init:
-/* get memory controller base address */
- ldr r1, =MEMC_BASE
-
-/* ---- FLASH INITIALISATION ---- */
-/* Write MSC0 and read back to ensure data change is accepted by cpu */
- ldr r2, =CFG_MSC0_VAL
- str r2, [r1, #MSC0_OFFSET]
- ldr r2, [r1, #MSC0_OFFSET]
-
-/* ---- SDRAM INITIALISATION ---- */
-/* get the MDREFR settings */
- ldr r2, =CFG_MDREFR_VAL
- str r2, [r1, #MDREFR_OFFSET]
-
-/* fetch platform value of MDCNFG */
- ldr r2, =CFG_MDCNFG_VAL
-
-/* disable all sdram banks */
- bic r2, r2, #(MDCNFG_DE0 | MDCNFG_DE1)
- bic r2, r2, #(MDCNFG_DE2 | MDCNFG_DE3)
-
-/* write initial value of MDCNFG, w/o enabling sdram banks */
- str r2, [r1, #MDCNFG_OFFSET]
-
-/* pause for 200 uSecs */
- ldr r3, =OSCR /* reset the OS Timer Count to zero */
- mov r2, #0
- str r2, [r3]
- ldr r4, =0x300 /* about 200 usec */
-1:
- ldr r2, [r3]
- cmp r4, r2
- bgt 1b
-
-/* Access memory *not yet enabled* for CBR refresh cycles (8) */
-/* CBR is generated for all banks */
-
- ldr r2, =CFG_DRAM_BASE
- str r2, [r2]
- str r2, [r2]
- str r2, [r2]
- str r2, [r2]
- str r2, [r2]
- str r2, [r2]
- str r2, [r2]
- str r2, [r2]
-
-/* get memory controller base address */
- ldr r2, =MEMC_BASE
-
-/* Enable SDRAM bank 0 in MDCNFG register */
- ldr r2, [r1, #MDCNFG_OFFSET]
- orr r2, r2, #MDCNFG_DE0
- str r2, [r1, #MDCNFG_OFFSET]
-
-/* write MDMRS to trigger an MSR command to all enabled SDRAM banks */
- ldr r2, =CFG_MDMRS_VAL
- str r2, [r1, #MDMRS_OFFSET]
-
-/* ---- INTERRUPT INITIALISATION ---- */
-/* Disable (mask) all interrupts at the interrupt controller */
-/* clear the interrupt level register (use IRQ, not FIQ) */
- mov r1, #0
- ldr r2, =ICLR
- str r1, [r2]
-
-/* Set interrupt mask register */
- ldr r1, =CFG_ICMR_VAL
- ldr r2, =ICMR
- str r1, [r2]
-
-/* ---- CLOCK INITIALISATION ---- */
-/* Disable the peripheral clocks, and set the core clock */
-
-/* Turn Off ALL on-chip peripheral clocks for re-configuration */
- ldr r1, =CKEN
- mov r2, #0
- str r2, [r1]
-
-/* set core clocks */
- ldr r2, =CFG_CCCR_VAL
- ldr r1, =CCCR
- str r2, [r1]
-
-#ifdef ENABLE32KHZ
-/* enable the 32Khz oscillator for RTC and PowerManager */
- ldr r1, =OSCC
- mov r2, #OSCC_OON
- str r2, [r1]
-
-/* NOTE: spin here until OSCC.OOK get set, meaning the PLL has settled. */
-60:
- ldr r2, [r1]
- ands r2, r2, #1
- beq 60b
-#endif
-
-/* Turn on needed clocks */
- ldr r1, =CKEN
- ldr r2, =CFG_CKEN_VAL
- str r2, [r1]
-
- mov pc, r10
diff --git a/board/xsengine/u-boot.lds b/board/xsengine/u-boot.lds
deleted file mode 100644
index db8387520e..0000000000
--- a/board/xsengine/u-boot.lds
+++ /dev/null
@@ -1,56 +0,0 @@
-/*
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-ENTRY(_start)
-SECTIONS
-{
- . = 0x00000000;
-
- . = ALIGN(4);
- .text :
- {
- cpu/pxa/start.o (.text)
- *(.text)
- }
-
- . = ALIGN(4);
- .rodata : { *(.rodata) }
-
- . = ALIGN(4);
- .data : { *(.data) }
-
- . = ALIGN(4);
- .got : { *(.got) }
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = ALIGN(4);
- __bss_start = .;
- .bss : { *(.bss) }
- _end = .;
-}
diff --git a/board/xsengine/xsengine.c b/board/xsengine/xsengine.c
deleted file mode 100644
index a9919dbaa6..0000000000
--- a/board/xsengine/xsengine.c
+++ /dev/null
@@ -1,65 +0,0 @@
-/*
- * (C) Copyright 2002
- * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
- *
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-
-/*
- * Miscelaneous platform dependent initialisations
- */
-
-int board_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- /* memory and cpu-speed are setup before relocation */
- /* so we do _nothing_ here */
-
- /* arch number */
- gd->bd->bi_arch_number = MACH_TYPE_XSENGINE;
-
- /* adress of boot parameters */
- gd->bd->bi_boot_params = 0xa0000100;
-
- return 0;
-}
-
-int board_post_init (void)
-{
- setenv ("stdout", "serial");
- setenv ("stderr", "serial");
- return 0;
-}
-
-int dram_init (void)
-{
- DECLARE_GLOBAL_DATA_PTR;
-
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
-
- return 0;
-}
diff --git a/board/zpc1900/Makefile b/board/zpc1900/Makefile
deleted file mode 100644
index 8b10993194..0000000000
--- a/board/zpc1900/Makefile
+++ /dev/null
@@ -1,46 +0,0 @@
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).a
-
-OBJS := $(BOARD).o
-
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) crv $@ $(OBJS)
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-
--include .depend
-
-#########################################################################
diff --git a/board/zpc1900/config.mk b/board/zpc1900/config.mk
deleted file mode 100644
index 1072dc7905..0000000000
--- a/board/zpc1900/config.mk
+++ /dev/null
@@ -1,30 +0,0 @@
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# Modified by, Yuli Barcohen, Arabella Software Ltd. <yuli@arabellasw.com>
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# ZPC.1900 board
-#
-
-TEXT_BASE = 0xFFE00000
diff --git a/board/zpc1900/u-boot.lds b/board/zpc1900/u-boot.lds
deleted file mode 100644
index 18c4b46f47..0000000000
--- a/board/zpc1900/u-boot.lds
+++ /dev/null
@@ -1,125 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * Modified by Yuli Barcohen <yuli@arabellasw.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc8260/start.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
-ENTRY(_start)
diff --git a/board/zpc1900/zpc1900.c b/board/zpc1900/zpc1900.c
deleted file mode 100644
index 6d16a0d192..0000000000
--- a/board/zpc1900/zpc1900.c
+++ /dev/null
@@ -1,308 +0,0 @@
-/*
- * (C) Copyright 2001-2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2003 Arabella Software Ltd.
- * Yuli Barcohen <yuli@arabellasw.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <ioports.h>
-#include <mpc8260.h>
-#include <asm/m8260_pci.h>
-#include <i2c.h>
-#include <spd.h>
-#include <miiphy.h>
-
-/*
- * I/O Port configuration table
- *
- * if conf is 1, then that port pin will be configured at boot time
- * according to the five values podr/pdir/ppar/psor/pdat for that entry
- */
-
-const iop_conf_t iop_conf_tab[4][32] = {
-
- /* Port A */
- { /* conf ppar psor pdir podr pdat */
- /* PA31 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 TxENB */
- /* PA30 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 TxClav */
- /* PA29 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 TxSOC */
- /* PA28 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 RxENB */
- /* PA27 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 RxSOC */
- /* PA26 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 RxClav */
- /* PA25 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[0] */
- /* PA24 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[1] */
- /* PA23 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[2] */
- /* PA22 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[3] */
- /* PA21 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[4] */
- /* PA20 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[5] */
- /* PA19 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[6] */
- /* PA18 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[7] */
- /* PA17 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[7] */
- /* PA16 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[6] */
- /* PA15 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[5] */
- /* PA14 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[4] */
- /* PA13 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[3] */
- /* PA12 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[2] */
- /* PA11 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[1] */
- /* PA10 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[0] */
- /* PA9 */ { 0, 1, 1, 1, 0, 0 }, /* SMC2 TXD */
- /* PA8 */ { 0, 1, 1, 0, 0, 0 }, /* SMC2 RXD */
- /* PA7 */ { 0, 0, 0, 0, 0, 0 }, /* PA7 */
- /* PA6 */ { 0, 0, 0, 0, 0, 0 }, /* PA6 */
- /* PA5 */ { 0, 0, 0, 0, 0, 0 }, /* PA5 */
- /* PA4 */ { 0, 0, 0, 0, 0, 0 }, /* PA4 */
- /* PA3 */ { 0, 0, 0, 0, 0, 0 }, /* PA3 */
- /* PA2 */ { 0, 0, 0, 0, 0, 0 }, /* PA2 */
- /* PA1 */ { 0, 0, 0, 0, 0, 0 }, /* PA1 */
- /* PA0 */ { 0, 0, 0, 0, 0, 0 } /* PA0 */
- },
-
- /* Port B */
- { /* conf ppar psor pdir podr pdat */
- /* PB31 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TX_ER */
- /* PB30 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_DV */
- /* PB29 */ { 1, 1, 1, 1, 0, 0 }, /* FCC2 MII TX_EN */
- /* PB28 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_ER */
- /* PB27 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII COL */
- /* PB26 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII CRS */
- /* PB25 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[3] */
- /* PB24 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[2] */
- /* PB23 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[1] */
- /* PB22 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[0] */
- /* PB21 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[0] */
- /* PB20 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[1] */
- /* PB19 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[2] */
- /* PB18 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[3] */
- /* PB17 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:RX_DIV */
- /* PB16 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:RX_ERR */
- /* PB15 */ { 0, 1, 0, 1, 0, 0 }, /* FCC3:TX_ERR */
- /* PB14 */ { 0, 1, 0, 1, 0, 0 }, /* FCC3:TX_EN */
- /* PB13 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:COL */
- /* PB12 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:CRS */
- /* PB11 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:RXD */
- /* PB10 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:RXD */
- /* PB9 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:RXD */
- /* PB8 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:RXD */
- /* PB7 */ { 0, 1, 0, 1, 0, 0 }, /* FCC3:TXD */
- /* PB6 */ { 0, 1, 0, 1, 0, 0 }, /* FCC3:TXD */
- /* PB5 */ { 0, 1, 0, 1, 0, 0 }, /* FCC3:TXD */
- /* PB4 */ { 0, 1, 0, 1, 0, 0 }, /* FCC3:TXD */
- /* PB3 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PB2 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PB1 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PB0 */ { 0, 0, 0, 0, 0, 0 } /* pin doesn't exist */
- },
-
- /* Port C */
- { /* conf ppar psor pdir podr pdat */
- /* PC31 */ { 0, 0, 0, 0, 0, 0 }, /* PC31 */
- /* PC30 */ { 0, 0, 0, 0, 0, 0 }, /* PC30 */
- /* PC29 */ { 0, 1, 1, 0, 0, 0 }, /* SCC1 EN CLSN */
- /* PC28 */ { 0, 0, 0, 0, 0, 0 }, /* PC28 */
- /* PC27 */ { 0, 0, 0, 0, 0, 0 }, /* PC27 */
- /* PC26 */ { 0, 0, 0, 0, 0, 0 }, /* PC26 */
- /* PC25 */ { 0, 0, 0, 0, 0, 0 }, /* PC25 */
- /* PC24 */ { 0, 0, 0, 0, 0, 0 }, /* PC24 */
- /* PC23 */ { 0, 1, 0, 0, 0, 0 }, /* SCC1 EN RXCLK */
- /* PC22 */ { 0, 1, 0, 0, 0, 0 }, /* SCC1 EN TXCLK */
- /* PC21 */ { 0, 0, 0, 0, 0, 0 }, /* PC21 */
- /* PC20 */ { 0, 0, 0, 0, 0, 0 }, /* PC20 */
- /* PC19 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII Rx Clock (CLK13) */
- /* PC18 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII Tx Clock (CLK14) */
- /* PC17 */ { 0, 0, 0, 0, 0, 0 }, /* PC17 */
- /* PC16 */ { 0, 0, 0, 0, 0, 0 }, /* PC16 */
- /* PC15 */ { 0, 0, 0, 0, 0, 0 }, /* PC15 */
- /* PC14 */ { 0, 1, 0, 0, 0, 0 }, /* SCC1 EN RENA */
- /* PC13 */ { 0, 0, 0, 0, 0, 0 }, /* PC13 */
- /* PC12 */ { 0, 0, 0, 0, 0, 0 }, /* PC12 */
- /* PC11 */ { 0, 0, 0, 0, 0, 0 }, /* PC11 */
- /* PC10 */ { 1, 0, 0, 1, 0, 0 }, /* LXT972 MDC */
- /* PC9 */ { 1, 0, 0, 0, 0, 0 }, /* LXT972 MDIO */
- /* PC8 */ { 0, 0, 0, 0, 0, 0 }, /* PC8 */
- /* PC7 */ { 0, 0, 0, 0, 0, 0 }, /* PC7 */
- /* PC6 */ { 0, 0, 0, 0, 0, 0 }, /* PC6 */
- /* PC5 */ { 0, 0, 0, 0, 0, 0 }, /* PC5 */
- /* PC4 */ { 0, 0, 0, 0, 0, 0 }, /* PC4 */
- /* PC3 */ { 0, 0, 0, 0, 0, 0 }, /* PC3 */
- /* PC2 */ { 0, 0, 0, 0, 0, 0 }, /* PC2 */
- /* PC1 */ { 0, 0, 0, 0, 0, 0 }, /* PC1 */
- /* PC0 */ { 0, 0, 0, 0, 0, 0 }, /* PC0 */
- },
-
- /* Port D */
- { /* conf ppar psor pdir podr pdat */
- /* PD31 */ { 0, 1, 0, 0, 0, 0 }, /* SCC1 EN RxD */
- /* PD30 */ { 0, 1, 1, 1, 0, 0 }, /* SCC1 EN TxD */
- /* PD29 */ { 0, 1, 0, 1, 0, 0 }, /* SCC1 EN TENA */
- /* PD28 */ { 0, 0, 0, 0, 0, 0 }, /* PD28 */
- /* PD27 */ { 0, 0, 0, 0, 0, 0 }, /* PD27 */
- /* PD26 */ { 0, 0, 0, 0, 0, 0 }, /* PD26 */
- /* PD25 */ { 0, 0, 0, 0, 0, 0 }, /* PD25 */
- /* PD24 */ { 0, 0, 0, 0, 0, 0 }, /* PD24 */
- /* PD23 */ { 0, 0, 0, 0, 0, 0 }, /* PD23 */
- /* PD22 */ { 0, 0, 0, 0, 0, 0 }, /* PD22 */
- /* PD21 */ { 0, 0, 0, 0, 0, 0 }, /* PD21 */
- /* PD20 */ { 0, 0, 0, 0, 0, 0 }, /* PD20 */
- /* PD19 */ { 0, 0, 0, 0, 0, 0 }, /* PD19 */
- /* PD18 */ { 0, 0, 0, 0, 0, 0 }, /* PD18 */
- /* PD17 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXPRTY */
- /* PD16 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXPRTY */
- /* PD15 */ { 1, 1, 1, 0, 1, 0 }, /* I2C SDA */
- /* PD14 */ { 1, 1, 1, 0, 1, 0 }, /* I2C SCL */
- /* PD13 */ { 0, 0, 0, 0, 0, 0 }, /* PD13 */
- /* PD12 */ { 0, 0, 0, 0, 0, 0 }, /* PD12 */
- /* PD11 */ { 0, 0, 0, 0, 0, 0 }, /* PD11 */
- /* PD10 */ { 0, 0, 0, 0, 0, 0 }, /* PD10 */
- /* PD9 */ { 1, 1, 0, 1, 0, 0 }, /* SMC1 TXD */
- /* PD8 */ { 1, 1, 0, 0, 0, 0 }, /* SMC1 RXD */
- /* PD7 */ { 0, 0, 0, 0, 0, 0 }, /* PD7 */
- /* PD6 */ { 0, 0, 0, 0, 0, 0 }, /* PD6 */
- /* PD5 */ { 0, 0, 0, 0, 0, 0 }, /* PD5 */
- /* PD4 */ { 0, 0, 0, 0, 0, 0 }, /* PD4 */
- /* PD3 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PD2 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PD1 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PD0 */ { 0, 0, 0, 0, 0, 0 } /* pin doesn't exist */
- }
-};
-
-#ifdef CFG_NVRAM_ACCESS_ROUTINE
-void *nvram_read(void *dest, long src, size_t count)
-{
- return memcpy(dest, (const void *)src, count);
-}
-
-void nvram_write(long dest, const void *src, size_t count)
-{
- vu_char *p1 = (vu_char *)(CFG_EEPROM + 0x1555);
- vu_char *p2 = (vu_char *)(CFG_EEPROM + 0x0AAA);
- vu_char *d = (vu_char *)dest;
- const uchar *s = (const uchar *)src;
-
- /* Unprotect the EEPROM */
- *p1 = 0xAA;
- *p2 = 0x55;
- *p1 = 0x80;
- *p1 = 0xAA;
- *p2 = 0x55;
- *p1 = 0x20;
- udelay(10000);
-
- /* Write the data to the EEPROM */
- while (count--) {
- *d++ = *s++;
- while (*(d - 1) != *(s - 1))
- /* wait */;
- }
-
- /* Protect the EEPROM */
- *p1 = 0xAA;
- *p2 = 0x55;
- *p1 = 0xA0;
- udelay(10000);
-}
-#endif /* CFG_NVRAM_ACCESS_ROUTINE */
-
-long int initdram(int board_type)
-{
- vu_char *bcsr = (vu_char *)CFG_BCSR;
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile memctl8260_t *memctl = &immap->im_memctl;
- vu_char *ramaddr;
- uchar c = 0xFF;
- long int msize = CFG_SDRAM_SIZE;
- uint psdmr = CFG_PSDMR;
- int i;
-
- if (bcsr[4] & BCSR_PCI_MODE) { /* PCI mode selected by JP9 */
- immap->im_clkrst.car_sccr |= M826X_SCCR_PCI_MODE_EN;
- immap->im_siu_conf.sc_siumcr =
- (immap->im_siu_conf.sc_siumcr & ~SIUMCR_LBPC11)
- | SIUMCR_LBPC01;
- }
-
-#ifndef CFG_RAMBOOT
- immap->im_siu_conf.sc_ppc_acr = 0x03;
- immap->im_siu_conf.sc_ppc_alrh = 0x30126745;
- immap->im_siu_conf.sc_tescr1 = 0x00004000;
-
- memctl->memc_mptpr = CFG_MPTPR;
-
-#ifdef CFG_LSDRAM_BASE
- /*
- Initialise local bus SDRAM only if the pins
- are configured as local bus pins and not as PCI.
- */
- if ((immap->im_siu_conf.sc_siumcr & SIUMCR_LBPC11) == SIUMCR_LBPC00) {
- memctl->memc_lsrt = CFG_LSRT;
- memctl->memc_or4 = 0xFFC01480;
- memctl->memc_br4 = CFG_LSDRAM_BASE | 0x00001861;
- memctl->memc_lsdmr = CFG_LSDMR | PSDMR_OP_PREA;
- ramaddr = (vu_char *)CFG_LSDRAM_BASE;
- *ramaddr = c;
- memctl->memc_lsdmr = CFG_LSDMR | PSDMR_OP_CBRR;
- for (i = 0; i < 8; i++)
- *ramaddr = c;
- memctl->memc_lsdmr = CFG_LSDMR | PSDMR_OP_MRW;
- *ramaddr = c;
- memctl->memc_lsdmr = CFG_LSDMR | PSDMR_RFEN;
- }
-#endif /* CFG_LSDRAM_BASE */
-
- /* Initialise 60x bus SDRAM */
- memctl->memc_psrt = CFG_PSRT;
- memctl->memc_or2 = 0xFC0028C0;
- memctl->memc_br2 = CFG_SDRAM_BASE | 0x00000041;
- /*
- * The mode data for Mode Register Write command must appear on
- * the address lines during a mode-set cycle. It is driven by
- * the memory controller, in single PowerQUICC II mode,
- * according to PSDMR[CL] and PSDMR[BL] fields. In
- * 60x-compatible mode, software must drive the correct value on
- * the address lines. BL=0 because for 64-bit port size burst
- * length must be 4.
- */
- ramaddr = (vu_char *)(CFG_SDRAM_BASE |
- ((psdmr & PSDMR_CL_MSK) << 7) | 0x10);
- memctl->memc_psdmr = psdmr | PSDMR_OP_PREA; /* Precharge all banks */
- *ramaddr = c;
- memctl->memc_psdmr = psdmr | PSDMR_OP_CBRR; /* CBR refresh */
- for (i = 0; i < 8; i++)
- *ramaddr = c;
- memctl->memc_psdmr = psdmr | PSDMR_OP_MRW; /* Mode Register write */
- *ramaddr = c;
- memctl->memc_psdmr = psdmr | PSDMR_RFEN; /* Refresh enable */
- *ramaddr = c;
-#endif /* CFG_RAMBOOT */
-
- /* Return total 60x bus SDRAM size */
- return msize * 1024 * 1024;
-}
-
-int checkboard(void)
-{
- vu_char *bcsr = (vu_char *)CFG_BCSR;
-
- printf("Board: Zephyr ZPC.1900 Rev. %c\n", bcsr[2] + 0x40);
- return 0;
-}
diff --git a/common/Makefile b/common/Makefile
index 7dbf84a555..e588c73119 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -38,20 +38,21 @@ COBJS = main.o ACEX1K.o altera.o bedbug.o circbuf.o \
cmd_load.o cmd_log.o \
cmd_mem.o cmd_mii.o cmd_misc.o cmd_mmc.o \
cmd_nand.o cmd_net.o cmd_nvedit.o \
+ cmd_onenand.o \
cmd_pci.o cmd_pcmcia.o cmd_portio.o \
cmd_reginfo.o cmd_reiser.o cmd_scsi.o cmd_spi.o cmd_universe.o \
cmd_usb.o cmd_vfd.o \
command.o console.o devices.o dlmalloc.o docecc.o \
environment.o env_common.o \
env_nand.o env_dataflash.o env_flash.o env_eeprom.o \
- env_nvram.o env_nowhere.o \
+ env_nvram.o env_nowhere.o env_onenand.o \
exports.o \
flash.o fpga.o ft_build.o \
hush.o kgdb.o lcd.o lists.o lynxkdi.o \
memsize.o miiphybb.o miiphyutil.o \
s_record.o serial.o soft_i2c.o soft_spi.o spartan2.o spartan3.o \
usb.o usb_kbd.o usb_storage.o \
- virtex2.o xilinx.o
+ virtex2.o xilinx.o crc16.o xyzModem.o
OBJS = $(AOBJS) $(COBJS)
diff --git a/common/cmd_bdinfo.c b/common/cmd_bdinfo.c
index 40e28dd9d2..256e4bc796 100644
--- a/common/cmd_bdinfo.c
+++ b/common/cmd_bdinfo.c
@@ -28,6 +28,7 @@
#include <command.h>
#include <net.h> /* for print_IPaddr */
+DECLARE_GLOBAL_DATA_PTR;
#if (CONFIG_COMMANDS & CFG_CMD_BDI)
static void print_num(const char *, ulong);
@@ -39,8 +40,6 @@ static void print_str(const char *, const char *);
int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
- DECLARE_GLOBAL_DATA_PTR;
-
int i;
bd_t *bd = gd->bd;
char buf[32];
@@ -62,11 +61,12 @@ int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
print_num ("bootflags", bd->bi_bootflags );
#if defined(CONFIG_405GP) || defined(CONFIG_405CR) || \
defined(CONFIG_405EP) || defined(CONFIG_XILINX_ML300) || \
- defined(CONFIG_440EP) || defined(CONFIG_440GR)
+ defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
+ defined(CONFIG_440SP)
print_str ("procfreq", strmhz(buf, bd->bi_procfreq));
print_str ("plb_busfreq", strmhz(buf, bd->bi_plb_busfreq));
#if defined(CONFIG_405GP) || defined(CONFIG_405EP) || defined(CONFIG_XILINX_ML300) || \
- defined(CONFIG_440EP) || defined(CONFIG_440GR)
+ defined(CONFIG_440EP) || defined(CONFIG_440GR) || defined(CONFIG_440SPE)
print_str ("pci_busfreq", strmhz(buf, bd->bi_pci_busfreq));
#endif
#else /* ! CONFIG_405GP, CONFIG_405CR, CONFIG_405EP, CONFIG_XILINX_ML300, CONFIG_440EP CONFIG_440GR */
@@ -127,8 +127,6 @@ int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
- DECLARE_GLOBAL_DATA_PTR;
-
int i;
bd_t *bd = gd->bd;
@@ -153,8 +151,6 @@ int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
- DECLARE_GLOBAL_DATA_PTR;
-
int i;
bd_t *bd = gd->bd;
@@ -187,8 +183,6 @@ int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
- DECLARE_GLOBAL_DATA_PTR;
-
int i;
bd_t *bd = gd->bd;
@@ -215,8 +209,6 @@ int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
- DECLARE_GLOBAL_DATA_PTR;
-
int i;
bd_t *bd = gd->bd;
diff --git a/common/cmd_bedbug.c b/common/cmd_bedbug.c
index cdb379de21..48086a6280 100644
--- a/common/cmd_bedbug.c
+++ b/common/cmd_bedbug.c
@@ -11,187 +11,183 @@
#include <bedbug/regs.h>
#include <bedbug/ppc.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#if (CONFIG_COMMANDS & CFG_CMD_BEDBUG)
#ifndef MAX
#define MAX(a,b) ((a) > (b) ? (a) : (b))
#endif
-extern void show_regs __P((struct pt_regs*));
-extern int run_command __P((const char*, int));
+extern void show_regs __P ((struct pt_regs *));
+extern int run_command __P ((const char *, int));
extern char console_buffer[];
-ulong dis_last_addr = 0; /* Last address disassembled */
-ulong dis_last_len = 20; /* Default disassembler length */
-CPU_DEBUG_CTX bug_ctx; /* Bedbug context structure */
-
+ulong dis_last_addr = 0; /* Last address disassembled */
+ulong dis_last_len = 20; /* Default disassembler length */
+CPU_DEBUG_CTX bug_ctx; /* Bedbug context structure */
+
/* ======================================================================
* U-Boot's puts function does not append a newline, so the bedbug stuff
* will use this for the output of the dis/assembler.
* ====================================================================== */
-int bedbug_puts(const char *str)
+int bedbug_puts (const char *str)
{
- /* -------------------------------------------------- */
+ /* -------------------------------------------------- */
- printf( "%s\r\n", str );
- return 0;
-} /* bedbug_puts */
+ printf ("%s\r\n", str);
+ return 0;
+} /* bedbug_puts */
+
-
/* ======================================================================
* Initialize the bug_ctx structure used by the bedbug debugger. This is
* specific to the CPU since each has different debug registers and
* settings.
* ====================================================================== */
-void bedbug_init( void )
+void bedbug_init (void)
{
- /* -------------------------------------------------- */
+ /* -------------------------------------------------- */
#if defined(CONFIG_4xx)
- void bedbug405_init( void );
- bedbug405_init();
+ void bedbug405_init (void);
+
+ bedbug405_init ();
#elif defined(CONFIG_8xx)
- void bedbug860_init( void );
- bedbug860_init();
+ void bedbug860_init (void);
+
+ bedbug860_init ();
#endif
#if defined(CONFIG_MPC824X) || defined(CONFIG_MPC8260)
- /* Processors that are 603e core based */
- void bedbug603e_init( void );
+ /* Processors that are 603e core based */
+ void bedbug603e_init (void);
- bedbug603e_init();
+ bedbug603e_init ();
#endif
- return;
-} /* bedbug_init */
+ return;
+} /* bedbug_init */
+
-
/* ======================================================================
* Entry point from the interpreter to the disassembler. Repeated calls
* will resume from the last disassembled address.
* ====================================================================== */
-int do_bedbug_dis (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_bedbug_dis (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
{
- ulong addr; /* Address to start disassembly from */
- ulong len; /* # of instructions to disassemble */
- /* -------------------------------------------------- */
-
- /* Setup to go from the last address if none is given */
- addr = dis_last_addr;
- len = dis_last_len;
-
- if (argc < 2)
- {
- printf ("Usage:\n%s\n", cmdtp->usage);
- return 1;
- }
-
- if(( flag & CMD_FLAG_REPEAT ) == 0 )
- {
- /* New command */
- addr = simple_strtoul( argv[1], NULL, 16 );
-
- /* If an extra param is given then it is the length */
- if( argc > 2 )
- len = simple_strtoul( argv[2], NULL, 16 );
- }
-
- /* Run the disassembler */
- disppc( (unsigned char *)addr, 0, len, bedbug_puts, F_RADHEX );
-
- dis_last_addr = addr + (len * 4);
- dis_last_len = len;
- return 0;
-} /* do_bedbug_dis */
-U_BOOT_CMD(
- ds, 3, 1, do_bedbug_dis,
- "ds - disassemble memory\n",
- "ds <address> [# instructions]\n"
-);
+ ulong addr; /* Address to start disassembly from */
+ ulong len; /* # of instructions to disassemble */
+
+ /* -------------------------------------------------- */
+
+ /* Setup to go from the last address if none is given */
+ addr = dis_last_addr;
+ len = dis_last_len;
+
+ if (argc < 2) {
+ printf ("Usage:\n%s\n", cmdtp->usage);
+ return 1;
+ }
+
+ if ((flag & CMD_FLAG_REPEAT) == 0) {
+ /* New command */
+ addr = simple_strtoul (argv[1], NULL, 16);
+
+ /* If an extra param is given then it is the length */
+ if (argc > 2)
+ len = simple_strtoul (argv[2], NULL, 16);
+ }
+
+ /* Run the disassembler */
+ disppc ((unsigned char *) addr, 0, len, bedbug_puts, F_RADHEX);
+
+ dis_last_addr = addr + (len * 4);
+ dis_last_len = len;
+ return 0;
+} /* do_bedbug_dis */
+
+U_BOOT_CMD (ds, 3, 1, do_bedbug_dis,
+ "ds - disassemble memory\n",
+ "ds <address> [# instructions]\n");
/* ======================================================================
* Entry point from the interpreter to the assembler. Assembles
* instructions in consecutive memory locations until a '.' (period) is
* entered on a line by itself.
* ====================================================================== */
-int do_bedbug_asm (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_bedbug_asm (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
{
- long mem_addr; /* Address to assemble into */
- unsigned long instr; /* Machine code for text */
- char prompt[ 15 ]; /* Prompt string for user input */
- int asm_err; /* Error code from the assembler*/
- /* -------------------------------------------------- */
- int rcode = 0;
-
- if (argc < 2)
- {
- printf ("Usage:\n%s\n", cmdtp->usage);
- return 1;
- }
-
- printf( "\nEnter '.' when done\n" );
- mem_addr = simple_strtoul( argv[ 1 ], NULL, 16 );
-
- while( 1 )
- {
- putc( '\n' );
- disppc( (unsigned char *)mem_addr, 0, 1, bedbug_puts, F_RADHEX );
-
- sprintf( prompt, "%08lx: ", mem_addr );
- readline( prompt );
-
- if( console_buffer[ 0 ] && strcmp( console_buffer, "." ))
- {
- if(( instr = asmppc( mem_addr, console_buffer, &asm_err )) != 0 )
- {
- *(unsigned long *)mem_addr = instr;
- mem_addr += 4;
- }
- else
- {
- printf( "*** Error: %s ***\n", asm_error_str( asm_err ));
- rcode = 1;
- }
- }
- else
- {
- break;
- }
- }
- return rcode;
-} /* do_bedbug_asm */
-U_BOOT_CMD(
- as, 2, 0, do_bedbug_asm,
- "as - assemble memory\n",
- "as <address>\n"
-);
+ long mem_addr; /* Address to assemble into */
+ unsigned long instr; /* Machine code for text */
+ char prompt[15]; /* Prompt string for user input */
+ int asm_err; /* Error code from the assembler */
+
+ /* -------------------------------------------------- */
+ int rcode = 0;
+
+ if (argc < 2) {
+ printf ("Usage:\n%s\n", cmdtp->usage);
+ return 1;
+ }
+
+ printf ("\nEnter '.' when done\n");
+ mem_addr = simple_strtoul (argv[1], NULL, 16);
+
+ while (1) {
+ putc ('\n');
+ disppc ((unsigned char *) mem_addr, 0, 1, bedbug_puts,
+ F_RADHEX);
+
+ sprintf (prompt, "%08lx: ", mem_addr);
+ readline (prompt);
+
+ if (console_buffer[0] && strcmp (console_buffer, ".")) {
+ if ((instr =
+ asmppc (mem_addr, console_buffer,
+ &asm_err)) != 0) {
+ *(unsigned long *) mem_addr = instr;
+ mem_addr += 4;
+ } else {
+ printf ("*** Error: %s ***\n",
+ asm_error_str (asm_err));
+ rcode = 1;
+ }
+ } else {
+ break;
+ }
+ }
+ return rcode;
+} /* do_bedbug_asm */
+
+U_BOOT_CMD (as, 2, 0, do_bedbug_asm,
+ "as - assemble memory\n", "as <address>\n");
/* ======================================================================
* Used to set a break point from the interpreter. Simply calls into the
* CPU-specific break point set routine.
* ====================================================================== */
-int do_bedbug_break (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_bedbug_break (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
{
- /* -------------------------------------------------- */
- if( bug_ctx.do_break )
- (*bug_ctx.do_break)( cmdtp, flag, argc, argv );
- return 0;
-
-} /* do_bedbug_break */
-U_BOOT_CMD(
- break, 3, 0, do_bedbug_break,
- "break - set or clear a breakpoint\n",
- " - Set or clear a breakpoint\n"
- "break <address> - Break at an address\n"
- "break off <bp#> - Disable breakpoint.\n"
- "break show - List breakpoints.\n"
-);
+ /* -------------------------------------------------- */
+ if (bug_ctx.do_break)
+ (*bug_ctx.do_break) (cmdtp, flag, argc, argv);
+ return 0;
+
+} /* do_bedbug_break */
+
+U_BOOT_CMD (break, 3, 0, do_bedbug_break,
+ "break - set or clear a breakpoint\n",
+ " - Set or clear a breakpoint\n"
+ "break <address> - Break at an address\n"
+ "break off <bp#> - Disable breakpoint.\n"
+ "break show - List breakpoints.\n");
/* ======================================================================
* Called from the debug interrupt routine. Simply calls the CPU-specific
@@ -200,16 +196,16 @@ U_BOOT_CMD(
void do_bedbug_breakpoint (struct pt_regs *regs)
{
- /* -------------------------------------------------- */
+ /* -------------------------------------------------- */
- if( bug_ctx.break_isr )
- (*bug_ctx.break_isr)( regs );
+ if (bug_ctx.break_isr)
+ (*bug_ctx.break_isr) (regs);
- return;
-} /* do_bedbug_breakpoint */
+ return;
+} /* do_bedbug_breakpoint */
+
-
/* ======================================================================
* Called from the CPU-specific breakpoint handling routine. Enter a
* mini main loop until the stopped flag is cleared from the breakpoint
@@ -218,81 +214,77 @@ void do_bedbug_breakpoint (struct pt_regs *regs)
* This handles the parts of the debugger that are common to all CPU's.
* ====================================================================== */
-void bedbug_main_loop( unsigned long addr, struct pt_regs *regs )
+void bedbug_main_loop (unsigned long addr, struct pt_regs *regs)
{
- int len; /* Length of command line */
- int flag; /* Command flags */
- int rc = 0; /* Result from run_command*/
- char prompt_str[ 20 ]; /* Prompt string */
- static char lastcommand[ CFG_CBSIZE ] = {0}; /* previous command */
- /* -------------------------------------------------- */
+ int len; /* Length of command line */
+ int flag; /* Command flags */
+ int rc = 0; /* Result from run_command */
+ char prompt_str[20]; /* Prompt string */
+ static char lastcommand[CFG_CBSIZE] = { 0 }; /* previous command */
+ /* -------------------------------------------------- */
- if( bug_ctx.clear )
- (*bug_ctx.clear)( bug_ctx.current_bp );
+ if (bug_ctx.clear)
+ (*bug_ctx.clear) (bug_ctx.current_bp);
- printf( "Breakpoint %d: ", bug_ctx.current_bp );
- disppc( (unsigned char *)addr, 0, 1, bedbug_puts, F_RADHEX );
+ printf ("Breakpoint %d: ", bug_ctx.current_bp);
+ disppc ((unsigned char *) addr, 0, 1, bedbug_puts, F_RADHEX);
- bug_ctx.stopped = 1;
- bug_ctx.regs = regs;
+ bug_ctx.stopped = 1;
+ bug_ctx.regs = regs;
- sprintf( prompt_str, "BEDBUG.%d =>", bug_ctx.current_bp );
+ sprintf (prompt_str, "BEDBUG.%d =>", bug_ctx.current_bp);
- /* A miniature main loop */
- while( bug_ctx.stopped )
- {
- len = readline( prompt_str );
+ /* A miniature main loop */
+ while (bug_ctx.stopped) {
+ len = readline (prompt_str);
- flag = 0; /* assume no special flags for now */
+ flag = 0; /* assume no special flags for now */
- if (len > 0)
- strcpy( lastcommand, console_buffer );
- else if( len == 0 )
- flag |= CMD_FLAG_REPEAT;
+ if (len > 0)
+ strcpy (lastcommand, console_buffer);
+ else if (len == 0)
+ flag |= CMD_FLAG_REPEAT;
- if (len == -1)
- printf ("<INTERRUPT>\n");
- else
- rc = run_command( lastcommand, flag );
+ if (len == -1)
+ printf ("<INTERRUPT>\n");
+ else
+ rc = run_command (lastcommand, flag);
- if (rc <= 0) {
- /* invalid command or not repeatable, forget it */
- lastcommand[0] = 0;
- }
- }
+ if (rc <= 0) {
+ /* invalid command or not repeatable, forget it */
+ lastcommand[0] = 0;
+ }
+ }
- bug_ctx.regs = NULL;
- bug_ctx.current_bp = 0;
+ bug_ctx.regs = NULL;
+ bug_ctx.current_bp = 0;
- return;
-} /* bedbug_main_loop */
+ return;
+} /* bedbug_main_loop */
+
-
/* ======================================================================
* Interpreter command to continue from a breakpoint. Just clears the
* stopped flag in the context so that the breakpoint routine will
* return.
* ====================================================================== */
-int do_bedbug_continue (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-
+int do_bedbug_continue (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
{
- /* -------------------------------------------------- */
-
- if( ! bug_ctx.stopped )
- {
- printf( "Not at a breakpoint\n" );
- return 1;
- }
-
- bug_ctx.stopped = 0;
- return 0;
-} /* do_bedbug_continue */
-U_BOOT_CMD(
- continue, 1, 0, do_bedbug_continue,
- "continue- continue from a breakpoint\n",
- " - continue from a breakpoint.\n"
-);
+ /* -------------------------------------------------- */
+
+ if (!bug_ctx.stopped) {
+ printf ("Not at a breakpoint\n");
+ return 1;
+ }
+
+ bug_ctx.stopped = 0;
+ return 0;
+} /* do_bedbug_continue */
+
+U_BOOT_CMD (continue, 1, 0, do_bedbug_continue,
+ "continue- continue from a breakpoint\n",
+ " - continue from a breakpoint.\n");
/* ======================================================================
* Interpreter command to continue to the next instruction, stepping into
@@ -300,31 +292,30 @@ U_BOOT_CMD(
* the address passes control to the CPU-specific set breakpoint routine
* for the current breakpoint number.
* ====================================================================== */
-int do_bedbug_step (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_bedbug_step (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
{
- unsigned long addr; /* Address to stop at */
- /* -------------------------------------------------- */
-
- if( ! bug_ctx.stopped )
- {
- printf( "Not at a breakpoint\n" );
- return 1;
- }
-
- if( !find_next_address( (unsigned char *)&addr, FALSE, bug_ctx.regs ))
- return 1;
-
- if( bug_ctx.set )
- (*bug_ctx.set)( bug_ctx.current_bp, addr );
-
- bug_ctx.stopped = 0;
- return 0;
-} /* do_bedbug_step */
-U_BOOT_CMD(
- step, 1, 1, do_bedbug_step,
- "step - single step execution.\n",
- " - single step execution.\n"
-);
+ unsigned long addr; /* Address to stop at */
+
+ /* -------------------------------------------------- */
+
+ if (!bug_ctx.stopped) {
+ printf ("Not at a breakpoint\n");
+ return 1;
+ }
+
+ if (!find_next_address ((unsigned char *) &addr, FALSE, bug_ctx.regs))
+ return 1;
+
+ if (bug_ctx.set)
+ (*bug_ctx.set) (bug_ctx.current_bp, addr);
+
+ bug_ctx.stopped = 0;
+ return 0;
+} /* do_bedbug_step */
+
+U_BOOT_CMD (step, 1, 1, do_bedbug_step,
+ "step - single step execution.\n",
+ " - single step execution.\n");
/* ======================================================================
* Interpreter command to continue to the next instruction, stepping over
@@ -332,105 +323,97 @@ U_BOOT_CMD(
* the address passes control to the CPU-specific set breakpoint routine
* for the current breakpoint number.
* ====================================================================== */
-int do_bedbug_next (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_bedbug_next (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
{
- unsigned long addr; /* Address to stop at */
- /* -------------------------------------------------- */
-
- if( ! bug_ctx.stopped )
- {
- printf( "Not at a breakpoint\n" );
- return 1;
- }
-
- if( !find_next_address( (unsigned char *)&addr, TRUE, bug_ctx.regs ))
- return 1;
-
- if( bug_ctx.set )
- (*bug_ctx.set)( bug_ctx.current_bp, addr );
-
- bug_ctx.stopped = 0;
- return 0;
-} /* do_bedbug_next */
-U_BOOT_CMD(
- next, 1, 1, do_bedbug_next,
- "next - single step execution, stepping over subroutines.\n",
- " - single step execution, stepping over subroutines.\n"
-);
+ unsigned long addr; /* Address to stop at */
+
+ /* -------------------------------------------------- */
+
+ if (!bug_ctx.stopped) {
+ printf ("Not at a breakpoint\n");
+ return 1;
+ }
+
+ if (!find_next_address ((unsigned char *) &addr, TRUE, bug_ctx.regs))
+ return 1;
+
+ if (bug_ctx.set)
+ (*bug_ctx.set) (bug_ctx.current_bp, addr);
+
+ bug_ctx.stopped = 0;
+ return 0;
+} /* do_bedbug_next */
+
+U_BOOT_CMD (next, 1, 1, do_bedbug_next,
+ "next - single step execution, stepping over subroutines.\n",
+ " - single step execution, stepping over subroutines.\n");
/* ======================================================================
* Interpreter command to print the current stack. This assumes an EABI
* architecture, so it starts with GPR R1 and works back up the stack.
* ====================================================================== */
-int do_bedbug_stack (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_bedbug_stack (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
{
- DECLARE_GLOBAL_DATA_PTR;
-
- unsigned long sp; /* Stack pointer */
- unsigned long func; /* LR from stack */
- int depth; /* Stack iteration level */
- int skip = 1; /* Flag to skip the first entry */
- unsigned long top; /* Top of memory address */
- /* -------------------------------------------------- */
-
- if( ! bug_ctx.stopped )
- {
- printf( "Not at a breakpoint\n" );
- return 1;
- }
-
- top = gd->bd->bi_memstart + gd->bd->bi_memsize;
- depth = 0;
-
- printf( "Depth PC\n" );
- printf( "----- --------\n" );
- printf( "%5d %08lx\n", depth++, bug_ctx.regs->nip );
-
- sp = bug_ctx.regs->gpr[ 1 ];
- func = *(unsigned long *)(sp+4);
-
- while(( func < top ) && ( sp < top ))
- {
- if( !skip )
- printf( "%5d %08lx\n", depth++, func );
- else
- --skip;
-
- sp = *(unsigned long *)sp;
- func = *(unsigned long *)(sp+4);
- }
- return 0;
-} /* do_bedbug_stack */
-U_BOOT_CMD(
- where, 1, 1, do_bedbug_stack,
- "where - Print the running stack.\n",
- " - Print the running stack.\n"
-);
+ unsigned long sp; /* Stack pointer */
+ unsigned long func; /* LR from stack */
+ int depth; /* Stack iteration level */
+ int skip = 1; /* Flag to skip the first entry */
+ unsigned long top; /* Top of memory address */
+
+ /* -------------------------------------------------- */
+
+ if (!bug_ctx.stopped) {
+ printf ("Not at a breakpoint\n");
+ return 1;
+ }
+
+ top = gd->bd->bi_memstart + gd->bd->bi_memsize;
+ depth = 0;
+
+ printf ("Depth PC\n");
+ printf ("----- --------\n");
+ printf ("%5d %08lx\n", depth++, bug_ctx.regs->nip);
+
+ sp = bug_ctx.regs->gpr[1];
+ func = *(unsigned long *) (sp + 4);
+
+ while ((func < top) && (sp < top)) {
+ if (!skip)
+ printf ("%5d %08lx\n", depth++, func);
+ else
+ --skip;
+
+ sp = *(unsigned long *) sp;
+ func = *(unsigned long *) (sp + 4);
+ }
+ return 0;
+} /* do_bedbug_stack */
+
+U_BOOT_CMD (where, 1, 1, do_bedbug_stack,
+ "where - Print the running stack.\n",
+ " - Print the running stack.\n");
/* ======================================================================
* Interpreter command to dump the registers. Calls the CPU-specific
* show registers routine.
* ====================================================================== */
-int do_bedbug_rdump (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_bedbug_rdump (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
{
- /* -------------------------------------------------- */
-
- if( ! bug_ctx.stopped )
- {
- printf( "Not at a breakpoint\n" );
- return 1;
- }
-
- show_regs( bug_ctx.regs );
- return 0;
-} /* do_bedbug_rdump */
-U_BOOT_CMD(
- rdump, 1, 1, do_bedbug_rdump,
- "rdump - Show registers.\n",
- " - Show registers.\n"
-);
+ /* -------------------------------------------------- */
+
+ if (!bug_ctx.stopped) {
+ printf ("Not at a breakpoint\n");
+ return 1;
+ }
+
+ show_regs (bug_ctx.regs);
+ return 0;
+} /* do_bedbug_rdump */
+
+U_BOOT_CMD (rdump, 1, 1, do_bedbug_rdump,
+ "rdump - Show registers.\n", " - Show registers.\n");
/* ====================================================================== */
-#endif /* CFG_CMD_BEDBUG */
+#endif /* CFG_CMD_BEDBUG */
/*
diff --git a/common/cmd_boot.c b/common/cmd_boot.c
index 5b58d4e2f1..e68f16f9da 100644
--- a/common/cmd_boot.c
+++ b/common/cmd_boot.c
@@ -28,14 +28,12 @@
#include <command.h>
#include <net.h>
-
-/* -------------------------------------------------------------------- */
+#if defined(CONFIG_I386)
+DECLARE_GLOBAL_DATA_PTR;
+#endif
int do_go (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
-#if defined(CONFIG_I386)
- DECLARE_GLOBAL_DATA_PTR;
-#endif
ulong addr, rc;
int rcode = 0;
diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c
index 8599a49d05..31eb385d54 100644
--- a/common/cmd_bootm.c
+++ b/common/cmd_bootm.c
@@ -34,10 +34,6 @@
#include <environment.h>
#include <asm/byteorder.h>
-#ifdef CONFIG_OF_FLAT_TREE
-#include <ft_build.h>
-#endif
-
/*cmd_boot.c*/
extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
@@ -88,7 +84,7 @@ static int image_info (unsigned long addr);
#if (CONFIG_COMMANDS & CFG_CMD_IMLS)
#include <flash.h>
-extern flash_info_t flash_info[]; /* info for FLASH chips */
+extern flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
static int do_imls (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
#endif
@@ -201,31 +197,29 @@ int do_bootm (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
checksum = ntohl(hdr->ih_hcrc);
hdr->ih_hcrc = 0;
- if (crc32 (0, (uchar *)data, len) != checksum) {
+ if (crc32 (0, (unsigned char *)data, len) != checksum) {
puts ("Bad Header Checksum\n");
SHOW_BOOT_PROGRESS (-2);
return 1;
}
SHOW_BOOT_PROGRESS (3);
-#ifdef CONFIG_HAS_DATAFLASH
- if (addr_dataflash(addr)){
- len = ntohl(hdr->ih_size) + sizeof(image_header_t);
- read_dataflash(addr, len, (char *)CFG_LOAD_ADDR);
- addr = CFG_LOAD_ADDR;
- }
-#endif
-
-
/* for multi-file images we need the data part, too */
print_image_hdr ((image_header_t *)addr);
data = addr + sizeof(image_header_t);
len = ntohl(hdr->ih_size);
+#ifdef CONFIG_HAS_DATAFLASH
+ if (addr_dataflash(addr)){
+ read_dataflash(data, len, (char *)CFG_LOAD_ADDR);
+ data = CFG_LOAD_ADDR;
+ }
+#endif
+
if (verify) {
puts (" Verifying Checksum ... ");
- if (crc32 (0, (uchar *)data, len) != ntohl(hdr->ih_dcrc)) {
+ if (crc32 (0, (unsigned char *)data, len) != ntohl(hdr->ih_dcrc)) {
printf ("Bad Data CRC\n");
SHOW_BOOT_PROGRESS (-3);
return 1;
@@ -267,7 +261,7 @@ int do_bootm (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
name = "Standalone Application";
/* A second argument overwrites the load address */
if (argc > 2) {
- hdr->ih_load = htonl(simple_strtoul(argv[2], NULL, 16));
+ hdr->ih_load = simple_strtoul(argv[2], NULL, 16);
}
break;
case IH_TYPE_KERNEL:
@@ -493,11 +487,6 @@ fixup_silent_linux ()
}
#endif /* CONFIG_SILENT_CONSOLE */
-#ifdef CONFIG_OF_FLAT_TREE
-extern const unsigned char oftree_dtb[];
-extern const unsigned int oftree_dtb_len;
-#endif
-
#ifdef CONFIG_PPC
static void
do_bootm_linux (cmd_tbl_t *cmdtp, int flag,
@@ -520,9 +509,6 @@ do_bootm_linux (cmd_tbl_t *cmdtp, int flag,
bd_t *kbd;
void (*kernel)(bd_t *, ulong, ulong, ulong, ulong);
image_header_t *hdr = &header;
-#ifdef CONFIG_OF_FLAT_TREE
- char *of_flat_tree;
-#endif
if ((s = getenv ("initrd_high")) != NULL) {
/* a value of "no" or a similar string will act like 0,
@@ -594,12 +580,12 @@ do_bootm_linux (cmd_tbl_t *cmdtp, int flag,
kbd->bi_flbfreq /= 1000000L;
kbd->bi_vcofreq /= 1000000L;
#endif
-#if defined(CONFIG_CPM2)
+#if defined(CONFIG_8260) || defined(CONFIG_MPC8560)
kbd->bi_cpmfreq /= 1000000L;
kbd->bi_brgfreq /= 1000000L;
kbd->bi_sccfreq /= 1000000L;
kbd->bi_vco /= 1000000L;
-#endif
+#endif /* CONFIG_8260 */
#if defined(CONFIG_MPC5xxx)
kbd->bi_ipbfreq /= 1000000L;
kbd->bi_pcifreq /= 1000000L;
@@ -633,7 +619,7 @@ do_bootm_linux (cmd_tbl_t *cmdtp, int flag,
checksum = hdr->ih_hcrc;
hdr->ih_hcrc = 0;
- if (crc32 (0, (uchar *)data, len) != checksum) {
+ if (crc32 (0, (char *)data, len) != checksum) {
puts ("Bad Header Checksum\n");
SHOW_BOOT_PROGRESS (-11);
do_reset (cmdtp, flag, argc, argv);
@@ -661,13 +647,13 @@ do_bootm_linux (cmd_tbl_t *cmdtp, int flag,
if (chunk > CHUNKSZ)
chunk = CHUNKSZ;
- csum = crc32 (csum, (uchar *)cdata, chunk);
+ csum = crc32 (csum, (char *)cdata, chunk);
cdata += chunk;
WATCHDOG_RESET();
}
#else /* !(CONFIG_HW_WATCHDOG || CONFIG_WATCHDOG) */
- csum = crc32 (0, (uchar *)data, len);
+ csum = crc32 (0, (char *)data, len);
#endif /* CONFIG_HW_WATCHDOG || CONFIG_WATCHDOG */
if (csum != hdr->ih_dcrc) {
@@ -788,26 +774,15 @@ do_bootm_linux (cmd_tbl_t *cmdtp, int flag,
initrd_end = 0;
}
-#ifdef CONFIG_OF_FLAT_TREE
- if (initrd_start == 0)
- of_flat_tree = (char *)(((ulong)kbd - OF_FLAT_TREE_MAX_SIZE -
- sizeof(bd_t)) & ~0xF);
- else
- of_flat_tree = (char *)((initrd_start - OF_FLAT_TREE_MAX_SIZE -
- sizeof(bd_t)) & ~0xF);
-#endif
debug ("## Transferring control to Linux (at address %08lx) ...\n",
(ulong)kernel);
SHOW_BOOT_PROGRESS (15);
-#ifndef CONFIG_OF_FLAT_TREE
-
#if defined(CFG_INIT_RAM_LOCK) && !defined(CONFIG_E500)
unlock_ram_in_cache();
#endif
-
/*
* Linux Kernel Parameters:
* r3: ptr to board info data
@@ -817,25 +792,6 @@ do_bootm_linux (cmd_tbl_t *cmdtp, int flag,
* r7: End of command line string
*/
(*kernel) (kbd, initrd_start, initrd_end, cmd_start, cmd_end);
-
-#else
- ft_setup(of_flat_tree, OF_FLAT_TREE_MAX_SIZE, kbd);
- /* ft_dump_blob(of_flat_tree); */
-
-#if defined(CFG_INIT_RAM_LOCK) && !defined(CONFIG_E500)
- unlock_ram_in_cache();
-#endif
- /*
- * Linux Kernel Parameters:
- * r3: ptr to OF flat tree, followed by the board info data
- * r4: initrd_start or 0 if no initrd
- * r5: initrd_end - unused if r4 is 0
- * r6: Start of command line string
- * r7: End of command line string
- */
- (*kernel) ((bd_t *)of_flat_tree, initrd_start, initrd_end, cmd_start, cmd_end);
-
-#endif
}
#endif /* CONFIG_PPC */
@@ -1079,7 +1035,7 @@ static int image_info (ulong addr)
checksum = ntohl(hdr->ih_hcrc);
hdr->ih_hcrc = 0;
- if (crc32 (0, (uchar *)data, len) != checksum) {
+ if (crc32 (0, (unsigned char *)data, len) != checksum) {
puts (" Bad Header Checksum\n");
return 1;
}
@@ -1091,7 +1047,7 @@ static int image_info (ulong addr)
len = ntohl(hdr->ih_size);
puts (" Verifying Checksum ... ");
- if (crc32 (0, (uchar *)data, len) != ntohl(hdr->ih_dcrc)) {
+ if (crc32 (0, (unsigned char *)data, len) != ntohl(hdr->ih_dcrc)) {
puts (" Bad Data CRC\n");
return 1;
}
@@ -1124,7 +1080,7 @@ int do_imls (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
for (i=0, info=&flash_info[0]; i<CFG_MAX_FLASH_BANKS; ++i, ++info) {
if (info->flash_id == FLASH_UNKNOWN)
goto next_bank;
- for (j=0; j<info->sector_count; ++j) {
+ for (j=0; j<CFG_MAX_FLASH_SECT; ++j) {
if (!(hdr=(image_header_t *)info->start[j]) ||
(ntohl(hdr->ih_magic) != IH_MAGIC))
@@ -1136,7 +1092,7 @@ int do_imls (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
checksum = ntohl(header.ih_hcrc);
header.ih_hcrc = 0;
- if (crc32 (0, (uchar *)&header, sizeof(image_header_t))
+ if (crc32 (0, (unsigned char *)&header, sizeof(image_header_t))
!= checksum)
goto next_sector;
@@ -1147,7 +1103,7 @@ int do_imls (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
len = ntohl(hdr->ih_size);
puts (" Verifying Checksum ... ");
- if (crc32 (0, (uchar *)data, len) != ntohl(hdr->ih_dcrc)) {
+ if (crc32 (0, (unsigned char *)data, len) != ntohl(hdr->ih_dcrc)) {
puts (" Bad Data CRC\n");
}
puts ("OK\n");
@@ -1241,8 +1197,6 @@ print_type (image_header_t *hdr)
case IH_CPU_SPARC64: arch = "SPARC 64 Bit"; break;
case IH_CPU_M68K: arch = "M68K"; break;
case IH_CPU_MICROBLAZE: arch = "Microblaze"; break;
- case IH_CPU_NIOS: arch = "Nios"; break;
- case IH_CPU_NIOS2: arch = "Nios-II"; break;
default: arch = "Unknown Architecture"; break;
}
diff --git a/common/cmd_date.c b/common/cmd_date.c
index a569d78cad..84932f7568 100644
--- a/common/cmd_date.c
+++ b/common/cmd_date.c
@@ -28,6 +28,8 @@
#include <command.h>
#include <rtc.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#if (CONFIG_COMMANDS & CFG_CMD_DATE)
const char *weekdays[] = {
@@ -40,7 +42,6 @@ int mk_date (char *, struct rtc_time *);
int do_date (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
- DECLARE_GLOBAL_DATA_PTR;
struct rtc_time tm;
int rcode = 0;
diff --git a/common/cmd_doc.c b/common/cmd_doc.c
index 5e9bea3045..ab37516953 100644
--- a/common/cmd_doc.c
+++ b/common/cmd_doc.c
@@ -22,10 +22,7 @@
#if (CONFIG_COMMANDS & CFG_CMD_DOC)
#include <linux/mtd/nftl.h>
-#include <linux/mtd/nand.h>
-#include <linux/mtd/nand_ids.h>
#include <linux/mtd/doc2000.h>
-#include <linux/mtd/nftl.h>
#ifdef CFG_DOC_SUPPORT_2000
#define DoC_is_2000(doc) (doc->ChipID == DOC_ChipID_Doc2k)
@@ -68,6 +65,32 @@ static struct DiskOnChip doc_dev_desc[CFG_MAX_DOC_DEVICE];
/* Current DOC Device */
static int curr_device = -1;
+/* Supported NAND flash devices */
+static struct nand_flash_dev nand_flash_ids[] = {
+ {"Toshiba TC5816BDC", NAND_MFR_TOSHIBA, 0x64, 21, 1, 2, 0x1000, 0},
+ {"Toshiba TC5832DC", NAND_MFR_TOSHIBA, 0x6b, 22, 0, 2, 0x2000, 0},
+ {"Toshiba TH58V128DC", NAND_MFR_TOSHIBA, 0x73, 24, 0, 2, 0x4000, 0},
+ {"Toshiba TC58256FT/DC", NAND_MFR_TOSHIBA, 0x75, 25, 0, 2, 0x4000, 0},
+ {"Toshiba TH58512FT", NAND_MFR_TOSHIBA, 0x76, 26, 0, 3, 0x4000, 0},
+ {"Toshiba TC58V32DC", NAND_MFR_TOSHIBA, 0xe5, 22, 0, 2, 0x2000, 0},
+ {"Toshiba TC58V64AFT/DC", NAND_MFR_TOSHIBA, 0xe6, 23, 0, 2, 0x2000, 0},
+ {"Toshiba TC58V16BDC", NAND_MFR_TOSHIBA, 0xea, 21, 1, 2, 0x1000, 0},
+ {"Toshiba TH58100FT", NAND_MFR_TOSHIBA, 0x79, 27, 0, 3, 0x4000, 0},
+ {"Samsung KM29N16000", NAND_MFR_SAMSUNG, 0x64, 21, 1, 2, 0x1000, 0},
+ {"Samsung unknown 4Mb", NAND_MFR_SAMSUNG, 0x6b, 22, 0, 2, 0x2000, 0},
+ {"Samsung KM29U128T", NAND_MFR_SAMSUNG, 0x73, 24, 0, 2, 0x4000, 0},
+ {"Samsung KM29U256T", NAND_MFR_SAMSUNG, 0x75, 25, 0, 2, 0x4000, 0},
+ {"Samsung unknown 64Mb", NAND_MFR_SAMSUNG, 0x76, 26, 0, 3, 0x4000, 0},
+ {"Samsung KM29W32000", NAND_MFR_SAMSUNG, 0xe3, 22, 0, 2, 0x2000, 0},
+ {"Samsung unknown 4Mb", NAND_MFR_SAMSUNG, 0xe5, 22, 0, 2, 0x2000, 0},
+ {"Samsung KM29U64000", NAND_MFR_SAMSUNG, 0xe6, 23, 0, 2, 0x2000, 0},
+ {"Samsung KM29W16000", NAND_MFR_SAMSUNG, 0xea, 21, 1, 2, 0x1000, 0},
+ {"Samsung K9F5616Q0C", NAND_MFR_SAMSUNG, 0x45, 25, 0, 2, 0x4000, 1},
+ {"Samsung K9K1216Q0C", NAND_MFR_SAMSUNG, 0x46, 26, 0, 3, 0x4000, 1},
+ {"Samsung K9F1G08U0M", NAND_MFR_SAMSUNG, 0xf1, 27, 0, 2, 0, 0},
+ {NULL,}
+};
+
/* ------------------------------------------------------------------------- */
int do_doc (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
@@ -249,7 +272,7 @@ int do_docboot (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
print_image_hdr (hdr);
- cnt = (hdr->ih_size + sizeof(image_header_t));
+ cnt = (ntohl(hdr->ih_size) + sizeof(image_header_t));
cnt -= SECTORSIZE;
} else {
puts ("\n** Bad Magic Number **\n");
diff --git a/common/cmd_elf.c b/common/cmd_elf.c
index eccf2e9e7b..1d92bb37d3 100644
--- a/common/cmd_elf.c
+++ b/common/cmd_elf.c
@@ -19,6 +19,9 @@
#include <net.h>
#include <elf.h>
+#if defined(CONFIG_WALNUT) || defined(CFG_VXWORKS_MAC_PTR)
+DECLARE_GLOBAL_DATA_PTR;
+#endif
#if (CONFIG_COMMANDS & CFG_CMD_ELF)
@@ -78,11 +81,6 @@ int do_bootelf (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
* ====================================================================== */
int do_bootvx ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
-#if defined(CONFIG_WALNUT) || \
- defined(CFG_VXWORKS_MAC_PTR)
- DECLARE_GLOBAL_DATA_PTR;
-#endif
-
unsigned long addr; /* Address of image */
unsigned long bootaddr; /* Address to put the bootline */
char *bootline; /* Text of the bootline */
diff --git a/common/cmd_fdc.c b/common/cmd_fdc.c
index 02dffa38e5..03f4ce6d34 100644
--- a/common/cmd_fdc.c
+++ b/common/cmd_fdc.c
@@ -836,13 +836,13 @@ int do_fdcboot (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
return 1;
}
hdr = (image_header_t *)addr;
- if (hdr->ih_magic != IH_MAGIC) {
+ if (ntohl(hdr->ih_magic) != IH_MAGIC) {
printf ("Bad Magic Number\n");
return 1;
}
print_image_hdr(hdr);
- imsize= hdr->ih_size+sizeof(image_header_t);
+ imsize= ntohl(hdr->ih_size)+sizeof(image_header_t);
nrofblk=imsize/512;
if((imsize%512)>0)
nrofblk++;
diff --git a/common/cmd_flash.c b/common/cmd_flash.c
index 0aa478306b..cb1c5bb432 100644
--- a/common/cmd_flash.c
+++ b/common/cmd_flash.c
@@ -125,13 +125,16 @@ abbrev_spec (char *str, flash_info_t ** pinfo, int *psf, int *psl)
static int
addr_spec(char *arg1, char *arg2, ulong *addr_first, ulong *addr_last)
{
- char len_used = 0; /* indicates if the "start +length" form used */
char *ep;
+ char len_used; /* indicates if the "start +length" form used */
+ char found;
+ ulong bank;
*addr_first = simple_strtoul(arg1, &ep, 16);
if (ep == arg1 || *ep != '\0')
return -1;
+ len_used = 0;
if (arg2 && *arg2 == '+'){
len_used = 1;
++arg2;
@@ -142,9 +145,6 @@ addr_spec(char *arg1, char *arg2, ulong *addr_first, ulong *addr_last)
return -1;
if (len_used){
- char found = 0;
- ulong bank;
-
/*
* *addr_last has the length, compute correct *addr_last
* XXX watch out for the integer overflow! Right now it is
@@ -159,6 +159,7 @@ addr_spec(char *arg1, char *arg2, ulong *addr_first, ulong *addr_last)
*/
/* find the end addr of the sector where the *addr_last is */
+ found = 0;
for (bank = 0; bank < CFG_MAX_FLASH_BANKS && !found; ++bank){
int i;
flash_info_t *info = &flash_info[bank];
@@ -455,6 +456,7 @@ int do_protect (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
#ifdef CONFIG_HAS_DATAFLASH
int status;
#endif
+
if (argc < 3) {
printf ("Usage:\n%s\n", cmdtp->usage);
return 1;
@@ -505,12 +507,10 @@ int do_protect (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
info->protect[i] = p;
#endif /* CFG_FLASH_PROTECTION */
}
- }
-
#if defined(CFG_FLASH_PROTECTION)
- if (!rcode) puts (" done\n");
+ if (!rcode) puts (" done\n");
#endif /* CFG_FLASH_PROTECTION */
-
+ }
return rcode;
}
@@ -655,10 +655,10 @@ int flash_sect_protect (int p, ulong addr_first, ulong addr_last)
#endif /* CFG_FLASH_PROTECTION */
}
}
+ }
#if defined(CFG_FLASH_PROTECTION)
- if (!rcode) putc ('\n');
+ puts (" done\n");
#endif /* CFG_FLASH_PROTECTION */
- }
printf ("%sProtected %d sectors\n",
p ? "" : "Un-", protected);
diff --git a/common/cmd_i2c.c b/common/cmd_i2c.c
index c543bb5314..9d816f8ec1 100644
--- a/common/cmd_i2c.c
+++ b/common/cmd_i2c.c
@@ -874,6 +874,26 @@ int do_sdram ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
#endif /* CFG_CMD_SDRAM */
+#if defined(CFG_I2C_BUS_SELECT)
+int do_i2c_bus(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+{
+ int bus_idx, bus_spd, res = 0;
+ if (argc < 3) {
+ printf("Usage[%d]:\n%s\n", argc, cmdtp->usage);
+ return 1;
+ }
+ bus_idx = simple_strtoul(argv[1], NULL, 16);
+ bus_spd = simple_strtoul(argv[2], NULL, 16);
+ printf("Setting bus[%d] to Speed[%d]: ", bus_idx, bus_spd);
+ res = select_bus(bus_idx, bus_spd);
+ if (res) {
+ printf("FAILED\n");
+ } else {
+ printf("PASS\n");
+ }
+ return res;
+}
+#endif /* bus select */
/***************************************************/
U_BOOT_CMD(
@@ -930,4 +950,12 @@ U_BOOT_CMD(
" (valid chip values 50..57)\n"
);
#endif
+
+#if defined(CFG_I2C_BUS_SELECT)
+U_BOOT_CMD(ibus, 3, 1, do_i2c_bus,
+ "ibus - Select i2c Bus\n",
+ "bus_index speed\n - Selects the bus index and sets the speed (0x64(ST),0x190(FS),0xD48(HS))\n"
+ " (reports success/failure)\n");
+#endif
+
#endif /* CFG_CMD_I2C */
diff --git a/common/cmd_ide.c b/common/cmd_ide.c
index b67d35a5a4..a4155029a7 100644
--- a/common/cmd_ide.c
+++ b/common/cmd_ide.c
@@ -60,6 +60,10 @@ unsigned long mips_io_port_base = 0;
# define SHOW_BOOT_PROGRESS(arg)
#endif
+#ifdef CONFIG_IDE_8xx_DIRECT
+DECLARE_GLOBAL_DATA_PTR;
+#endif
+
#ifdef __PPC__
# define EIEIO __asm__ volatile ("eieio")
# define SYNC __asm__ volatile ("sync")
@@ -498,7 +502,6 @@ void ide_init (void)
{
#ifdef CONFIG_IDE_8xx_DIRECT
- DECLARE_GLOBAL_DATA_PTR;
volatile immap_t *immr = (immap_t *)CFG_IMMR;
volatile pcmconf8xx_t *pcmp = &(immr->im_pcmcia);
#endif
@@ -852,7 +855,7 @@ output_data_short(int dev, ulong *sect_buf, int words)
/* We only need to swap data if we are running on a big endian cpu. */
/* But Au1x00 cpu:s already swaps data in big endian mode! */
-#if defined(__LITTLE_ENDIAN) || defined(CONFIG_AU1X00)
+#if defined(__LITTLE_ENDIAN) || ( defined(CONFIG_AU1X00) && !defined(CONFIG_GTH2) )
#define input_swap_data(x,y,z) input_data(x,y,z)
#else
static void
@@ -878,8 +881,13 @@ input_swap_data(int dev, ulong *sect_buf, int words)
debug("in input swap data base for read is %lx\n", (unsigned long) pbuf);
while (words--) {
+#ifdef __MIPS__
+ *dbuf++ = swab16p((u16*)pbuf);
+ *dbuf++ = swab16p((u16*)pbuf);
+#else
*dbuf++ = ld_le16(pbuf);
*dbuf++ = ld_le16(pbuf);
+#endif /* !MIPS */
}
#endif
}
diff --git a/common/cmd_immap.c b/common/cmd_immap.c
index 559d7b4c30..fa79b45a3c 100644
--- a/common/cmd_immap.c
+++ b/common/cmd_immap.c
@@ -41,6 +41,10 @@
#include <asm/iopin_8260.h>
#endif
+#if defined(CONFIG_8xx) || defined(CONFIG_8260)
+DECLARE_GLOBAL_DATA_PTR;
+#endif
+
static void
unimplemented ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
@@ -450,10 +454,8 @@ static void prbrg (int n, uint val)
uint div16 = (val & CPM_BRG_DIV16) != 0;
#if defined(CONFIG_8xx)
- DECLARE_GLOBAL_DATA_PTR;
ulong clock = gd->cpu_clk;
#elif defined(CONFIG_8260)
- DECLARE_GLOBAL_DATA_PTR;
ulong clock = gd->brg_clk;
#endif
diff --git a/common/cmd_jffs2.c b/common/cmd_jffs2.c
index 34920b1abd..201c3c1553 100644
--- a/common/cmd_jffs2.c
+++ b/common/cmd_jffs2.c
@@ -91,7 +91,6 @@
#include <command.h>
#include <malloc.h>
#include <jffs2/jffs2.h>
-#include <linux/mtd/nand.h>
#include <linux/list.h>
#include <linux/ctype.h>
@@ -99,11 +98,19 @@
#include <cramfs/cramfs_fs.h>
+#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+#ifdef CFG_NAND_LEGACY
+#include <linux/mtd/nand_legacy.h>
+#else /* !CFG_NAND_LEGACY */
+#include <linux/mtd/nand.h>
+#include <nand.h>
+#endif /* !CFG_NAND_LEGACY */
+#endif /* (CONFIG_COMMANDS & CFG_CMD_NAND) */
/* enable/disable debugging messages */
-#define DEBUG
-#undef DEBUG
+#define DEBUG_JFFS
+#undef DEBUG_JFFS
-#ifdef DEBUG
+#ifdef DEBUG_JFFS
# define DEBUGF(fmt, args...) printf(fmt ,##args)
#else
# define DEBUGF(fmt, args...)
@@ -123,7 +130,7 @@
/* this flag needs to be set in part_info struct mask_flags
* field for read-only partitions */
-#define MTD_WRITEABLE 1
+#define MTD_WRITEABLE_CMD 1
#ifdef CONFIG_JFFS2_CMDLINE
/* default values for mtdids and mtdparts variables */
@@ -365,10 +372,9 @@ static int part_validate_nand(struct mtdids *id, struct part_info *part)
{
#if defined(CONFIG_JFFS2_NAND) && (CONFIG_COMMANDS & CFG_CMD_NAND)
/* info for NAND chips */
- extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
- struct nand_chip *nand;
+ nand_info_t *nand;
- nand = &nand_dev_desc[id->num];
+ nand = &nand_info[id->num];
if ((unsigned long)(part->offset) % nand->erasesize) {
printf("%s%d: partition (%s) start offset alignment incorrect\n",
@@ -464,7 +470,9 @@ static int part_del(struct mtd_device *dev, struct part_info *part)
}
}
+#ifdef CFG_NAND_LEGACY
jffs2_free_cache(part);
+#endif
list_del(&part->link);
free(part);
dev->num_parts--;
@@ -491,7 +499,9 @@ static void part_delall(struct list_head *head)
list_for_each_safe(entry, n, head) {
part_tmp = list_entry(entry, struct part_info, link);
+#ifdef CFG_NAND_LEGACY
jffs2_free_cache(part_tmp);
+#endif
list_del(entry);
free(part_tmp);
}
@@ -646,7 +656,7 @@ static int part_parse(const char *const partdef, const char **ret, struct part_i
/* test for options */
mask_flags = 0;
if (strncmp(p, "ro", 2) == 0) {
- mask_flags |= MTD_WRITEABLE;
+ mask_flags |= MTD_WRITEABLE_CMD;
p += 2;
}
@@ -713,6 +723,7 @@ static int device_validate(u8 type, u8 num, u32 *size)
if (num < CFG_MAX_FLASH_BANKS) {
extern flash_info_t flash_info[];
*size = flash_info[num].size;
+
return 0;
}
@@ -724,8 +735,12 @@ static int device_validate(u8 type, u8 num, u32 *size)
} else if (type == MTD_DEV_TYPE_NAND) {
#if defined(CONFIG_JFFS2_NAND) && (CONFIG_COMMANDS & CFG_CMD_NAND)
if (num < CFG_MAX_NAND_DEVICE) {
+#ifndef CFG_NAND_LEGACY
+ *size = nand_info[num].size;
+#else
extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
*size = nand_dev_desc[num].totlen;
+#endif
return 0;
}
@@ -1169,7 +1184,7 @@ static int generate_mtdparts(char *buf, u32 buflen)
}
/* ro mask flag */
- if (part->mask_flags && MTD_WRITEABLE) {
+ if (part->mask_flags && MTD_WRITEABLE_CMD) {
len = 2;
if (len > maxlen)
goto cleanup;
diff --git a/common/cmd_load.c b/common/cmd_load.c
index 749849711a..f63b8e8056 100644
--- a/common/cmd_load.c
+++ b/common/cmd_load.c
@@ -29,7 +29,13 @@
#include <s_record.h>
#include <net.h>
#include <exports.h>
+#include <xyzModem.h>
+DECLARE_GLOBAL_DATA_PTR;
+
+#if (CONFIG_COMMANDS & CFG_CMD_LOADB)
+static ulong load_serial_ymodem (ulong offset);
+#endif
#if (CONFIG_COMMANDS & CFG_CMD_LOADS)
static ulong load_serial (ulong offset);
@@ -53,7 +59,6 @@ int do_load_serial (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
char *env_echo;
int rcode = 0;
#ifdef CFG_LOADS_BAUD_CHANGE
- DECLARE_GLOBAL_DATA_PTR;
int load_baudrate, current_baudrate;
load_baudrate = current_baudrate = gd->baudrate;
@@ -213,7 +218,6 @@ load_serial (ulong offset)
static int
read_record (char *buf, ulong len)
{
- DECLARE_GLOBAL_DATA_PTR;
char *p;
char c;
@@ -256,7 +260,6 @@ int do_save_serial (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
ulong offset = 0;
ulong size = 0;
#ifdef CFG_LOADS_BAUD_CHANGE
- DECLARE_GLOBAL_DATA_PTR;
int save_baudrate, current_baudrate;
save_baudrate = current_baudrate = gd->baudrate;
@@ -433,8 +436,6 @@ char his_quote; /* quote chars he'll use */
int do_load_serial_bin (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
- DECLARE_GLOBAL_DATA_PTR;
-
ulong offset = 0;
ulong addr;
int load_baudrate, current_baudrate;
@@ -475,21 +476,31 @@ int do_load_serial_bin (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
}
}
- printf ("## Ready for binary (kermit) download "
- "to 0x%08lX at %d bps...\n",
- offset,
- load_baudrate);
- addr = load_serial_bin (offset);
+ if (strcmp(argv[0],"loady")==0) {
+ printf ("## Ready for binary (ymodem) download "
+ "to 0x%08lX at %d bps...\n",
+ offset,
+ load_baudrate);
+
+ addr = load_serial_ymodem (offset);
- if (addr == ~0) {
- load_addr = 0;
- printf ("## Binary (kermit) download aborted\n");
- rcode = 1;
} else {
- printf ("## Start Addr = 0x%08lX\n", addr);
- load_addr = addr;
- }
+ printf ("## Ready for binary (kermit) download "
+ "to 0x%08lX at %d bps...\n",
+ offset,
+ load_baudrate);
+ addr = load_serial_bin (offset);
+
+ if (addr == ~0) {
+ load_addr = 0;
+ printf ("## Binary (kermit) download aborted\n");
+ rcode = 1;
+ } else {
+ printf ("## Start Addr = 0x%08lX\n", addr);
+ load_addr = addr;
+ }
+ }
if (load_baudrate != current_baudrate) {
printf ("## Switch baudrate to %d bps and press ESC ...\n",
current_baudrate);
@@ -963,6 +974,68 @@ START:
}
return ((ulong) os_data_addr - (ulong) bin_start_address);
}
+
+static int getcxmodem(void) {
+ if (tstc())
+ return (getc());
+ return -1;
+}
+static ulong load_serial_ymodem (ulong offset)
+{
+ int size;
+ char buf[32];
+ int err;
+ int res;
+ connection_info_t info;
+ char ymodemBuf[1024];
+ ulong store_addr = ~0;
+ ulong addr = 0;
+
+ size = 0;
+ info.mode = xyzModem_ymodem;
+ res = xyzModem_stream_open (&info, &err);
+ if (!res) {
+
+ while ((res =
+ xyzModem_stream_read (ymodemBuf, 1024, &err)) > 0) {
+ store_addr = addr + offset;
+ size += res;
+ addr += res;
+#ifndef CFG_NO_FLASH
+ if (addr2info (store_addr)) {
+ int rc;
+
+ rc = flash_write ((char *) ymodemBuf,
+ store_addr, res);
+ if (rc != 0) {
+ flash_perror (rc);
+ return (~0);
+ }
+ } else
+#endif
+ {
+ memcpy ((char *) (store_addr), ymodemBuf,
+ res);
+ }
+
+ }
+ } else {
+ printf ("%s\n", xyzModem_error (err));
+ }
+
+ xyzModem_stream_close (&err);
+ xyzModem_stream_terminate (false, &getcxmodem);
+
+
+ flush_cache (offset, size);
+
+ printf ("## Total Size = 0x%08x = %d Bytes\n", size, size);
+ sprintf (buf, "%X", size);
+ setenv ("filesize", buf);
+
+ return offset;
+}
+
#endif /* CFG_CMD_LOADB */
/* -------------------------------------------------------------------- */
@@ -1022,6 +1095,14 @@ U_BOOT_CMD(
" with offset 'off' and baudrate 'baud'\n"
);
+U_BOOT_CMD(
+ loady, 3, 0, do_load_serial_bin,
+ "loady - load binary file over serial line (ymodem mode)\n",
+ "[ off ] [ baud ]\n"
+ " - load binary file over serial line"
+ " with offset 'off' and baudrate 'baud'\n"
+);
+
#endif /* CFG_CMD_LOADB */
/* -------------------------------------------------------------------- */
diff --git a/common/cmd_log.c b/common/cmd_log.c
index efc9689c29..042a403026 100644
--- a/common/cmd_log.c
+++ b/common/cmd_log.c
@@ -46,6 +46,8 @@
#include <post.h>
#include <logbuff.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#if defined(CONFIG_LOGBUFFER)
/* Local prototypes */
@@ -73,7 +75,6 @@ static unsigned long *ext_logged_chars;
in linux/kernel/printk */
void logbuff_init_ptrs (void)
{
- DECLARE_GLOBAL_DATA_PTR;
unsigned long *ext_tag;
unsigned long post_word;
char *s;
@@ -139,8 +140,6 @@ static void logbuff_puts (const char *s)
void logbuff_log(char *msg)
{
- DECLARE_GLOBAL_DATA_PTR;
-
if ((gd->post_log_word & LOGBUFF_INITIALIZED)) {
logbuff_printk (msg);
} else {
diff --git a/common/cmd_mem.c b/common/cmd_mem.c
index 0f4f9b73df..d0fae6b24c 100644
--- a/common/cmd_mem.c
+++ b/common/cmd_mem.c
@@ -707,7 +707,7 @@ int do_mem_mtest (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
#if defined(CFG_MEMTEST_SCRATCH)
vu_long *dummy = (vu_long*)CFG_MEMTEST_SCRATCH;
#else
- vu_long *dummy = NULL;
+ vu_long *dummy = 0; /* yes, this is address 0x0, not NULL */
#endif
int j;
int iterations = 1;
diff --git a/common/cmd_mii.c b/common/cmd_mii.c
index 48a4e77c55..ee5e43ee8c 100644
--- a/common/cmd_mii.c
+++ b/common/cmd_mii.c
@@ -57,6 +57,11 @@ int do_mii (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
int rcode = 0;
char *devname;
+ if (argc < 2) {
+ printf ("Usage:\n%s\n", cmdtp->usage);
+ return 1;
+ }
+
#if defined(CONFIG_8xx) || defined(CONFIG_MCF52x2)
mii_init ();
#endif
diff --git a/common/cmd_nand.c b/common/cmd_nand.c
index b0c01d1205..4c2b1d6c1b 100644
--- a/common/cmd_nand.c
+++ b/common/cmd_nand.c
@@ -9,6 +9,416 @@
*/
#include <common.h>
+
+
+#ifndef CFG_NAND_LEGACY
+/*
+ *
+ * New NAND support
+ *
+ */
+#include <common.h>
+
+#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+
+#include <command.h>
+#include <watchdog.h>
+#include <malloc.h>
+#include <asm/byteorder.h>
+
+#ifdef CONFIG_SHOW_BOOT_PROGRESS
+# include <status_led.h>
+# define SHOW_BOOT_PROGRESS(arg) show_boot_progress(arg)
+#else
+# define SHOW_BOOT_PROGRESS(arg)
+#endif
+
+#include <jffs2/jffs2.h>
+#include <nand.h>
+
+extern nand_info_t nand_info[]; /* info for NAND chips */
+
+static int nand_dump_oob(nand_info_t *nand, ulong off)
+{
+ return 0;
+}
+
+static int nand_dump(nand_info_t *nand, ulong off)
+{
+ int i;
+ u_char *buf, *p;
+
+ buf = malloc(nand->oobblock + nand->oobsize);
+ if (!buf) {
+ puts("No memory for page buffer\n");
+ return 1;
+ }
+ off &= ~(nand->oobblock - 1);
+ i = nand_read_raw(nand, buf, off, nand->oobblock, nand->oobsize);
+ if (i < 0) {
+ printf("Error (%d) reading page %08x\n", i, off);
+ free(buf);
+ return 1;
+ }
+ printf("Page %08x dump:\n", off);
+ i = nand->oobblock >> 4; p = buf;
+ while (i--) {
+ printf( "\t%02x %02x %02x %02x %02x %02x %02x %02x"
+ " %02x %02x %02x %02x %02x %02x %02x %02x\n",
+ p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7],
+ p[8], p[9], p[10], p[11], p[12], p[13], p[14], p[15]);
+ p += 16;
+ }
+ puts("OOB:\n");
+ i = nand->oobsize >> 3;
+ while (i--) {
+ printf( "\t%02x %02x %02x %02x %02x %02x %02x %02x\n",
+ p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7]);
+ p += 8;
+ }
+ free(buf);
+
+ return 0;
+}
+
+/* ------------------------------------------------------------------------- */
+
+static void
+arg_off_size(int argc, char *argv[], ulong *off, ulong *size, ulong totsize)
+{
+ *off = 0;
+ *size = 0;
+
+#if defined(CONFIG_JFFS2_NAND) && defined(CFG_JFFS_CUSTOM_PART)
+ if (argc >= 1 && strcmp(argv[0], "partition") == 0) {
+ int part_num;
+ struct part_info *part;
+ const char *partstr;
+
+ if (argc >= 2)
+ partstr = argv[1];
+ else
+ partstr = getenv("partition");
+
+ if (partstr)
+ part_num = (int)simple_strtoul(partstr, NULL, 10);
+ else
+ part_num = 0;
+
+ part = jffs2_part_info(part_num);
+ if (part == NULL) {
+ printf("\nInvalid partition %d\n", part_num);
+ return;
+ }
+ *size = part->size;
+ *off = (ulong)part->offset;
+ } else
+#endif
+ {
+ if (argc >= 1)
+ *off = (ulong)simple_strtoul(argv[0], NULL, 16);
+ else
+ *off = 0;
+
+ if (argc >= 2)
+ *size = (ulong)simple_strtoul(argv[1], NULL, 16);
+ else
+ *size = totsize - *off;
+
+ }
+
+}
+#if defined(CONFIG_OMAP) && defined(CONFIG_3430LABRADOR)
+extern void omap_nand_switch_ecc(nand_info_t *nand, int hardware);
+extern int nand_unlock(nand_info_t *nand, ulong off, ulong size);
+#else
+#define omap_nand_switch_ecc(x, y) do {} while(0)
+#define nand_unlock(n, o, s) !(1)
+#endif
+
+int do_nand(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+{
+ int i, dev, ret;
+ ulong addr, off, size;
+ char *cmd, *s;
+ nand_info_t *nand;
+
+ /* at least two arguments please */
+ if (argc < 2)
+ goto usage;
+
+ cmd = argv[1];
+
+ if (strcmp(cmd, "info") == 0) {
+
+ putc('\n');
+ for (i = 0; i < CFG_MAX_NAND_DEVICE; i++) {
+ if (nand_info[i].name)
+ printf("Device %d: %s, sector size %lu KiB\n",
+ i, nand_info[i].name,
+ nand_info[i].erasesize >> 10);
+ }
+ return 0;
+ }
+
+ if (strcmp(cmd, "device") == 0) {
+
+ if (argc < 3) {
+ if ((nand_curr_device < 0) ||
+ (nand_curr_device >= CFG_MAX_NAND_DEVICE))
+ puts("\nno devices available\n");
+ else
+ printf("\nDevice %d: %s\n", nand_curr_device,
+ nand_info[nand_curr_device].name);
+ return 0;
+ }
+ dev = (int)simple_strtoul(argv[2], NULL, 10);
+ if (dev < 0 || dev >= CFG_MAX_NAND_DEVICE || !nand_info[dev].name) {
+ puts("No such device\n");
+ return 1;
+ }
+ printf("Device %d: %s", dev, nand_info[dev].name);
+ puts("... is now current device\n");
+ nand_curr_device = dev;
+ return 0;
+ }
+
+ if (strcmp(cmd, "bad") != 0 && strcmp(cmd, "erase") != 0 &&
+ strncmp(cmd, "unlock", 5) != 0 &&
+ strncmp(cmd, "dump", 4) != 0 &&
+ strncmp(cmd, "ecc", 3) != 0 &&
+ strncmp(cmd, "read", 4) != 0 && strncmp(cmd, "write", 5) != 0)
+ goto usage;
+
+ /* the following commands operate on the current device */
+ if (nand_curr_device < 0 || nand_curr_device >= CFG_MAX_NAND_DEVICE ||
+ !nand_info[nand_curr_device].name) {
+ puts("\nno devices available\n");
+ return 1;
+ }
+ nand = &nand_info[nand_curr_device];
+
+ if (strcmp(cmd, "bad") == 0) {
+ printf("\nDevice %d bad blocks:\n", nand_curr_device);
+ for (off = 0; off < nand->size; off += nand->erasesize)
+ if (nand_block_isbad(nand, off))
+ printf(" %08x\n", off);
+ return 0;
+ }
+
+ if (strcmp(cmd, "erase") == 0 || strcmp(cmd, "unlock") == 0) {
+ arg_off_size(argc - 2, argv + 2, &off, &size, nand->size);
+ if (off == 0 && size == 0)
+ return 1;
+
+ i = strncmp(cmd, "erase", 5) == 0; /* 1 = read, 0 = write */
+ printf("\nNAND %s: device %d offset 0x%x, size 0x%x ",
+ i ? "erase" : "unlock", nand_curr_device, off, size);
+ if (i)
+ ret = nand_erase(nand, off, size);
+ else
+ ret = nand_unlock(nand, off, size);
+ printf("%s\n", ret ? "ERROR" : "OK");
+
+ return ret == 0 ? 0 : 1;
+ }
+
+ if (strncmp(cmd, "dump", 4) == 0) {
+ if (argc < 3)
+ goto usage;
+
+ s = strchr(cmd, '.');
+ off = (int)simple_strtoul(argv[2], NULL, 16);
+
+ if (s != NULL && strcmp(s, ".oob") == 0)
+ ret = nand_dump_oob(nand, off);
+ else
+ ret = nand_dump(nand, off);
+
+ return ret == 0 ? 1 : 0;
+
+ }
+ if (strncmp(cmd, "ecc", 3) == 0) {
+ if (argc < 2)
+ goto usage;
+ if (strncmp(argv[2], "hw", 2) == 0)
+ omap_nand_switch_ecc(nand, 1);
+ else if (strncmp(argv[2], "sw", 2) == 0)
+ omap_nand_switch_ecc(nand, 0);
+ else
+ goto usage;
+
+ return 0;
+ }
+
+ /* read write */
+ if (strncmp(cmd, "read", 4) == 0 || strncmp(cmd, "write", 5) == 0) {
+ if (argc < 4)
+ goto usage;
+/*
+ s = strchr(cmd, '.');
+ clean = CLEAN_NONE;
+ if (s != NULL) {
+ if (strcmp(s, ".jffs2") == 0 || strcmp(s, ".e") == 0
+ || strcmp(s, ".i"))
+ clean = CLEAN_JFFS2;
+ }
+*/
+ addr = (ulong)simple_strtoul(argv[2], NULL, 16);
+
+ arg_off_size(argc - 3, argv + 3, &off, &size, nand->size);
+ if (off == 0 && size == 0)
+ return 1;
+
+ i = strncmp(cmd, "read", 4) == 0; /* 1 = read, 0 = write */
+ printf("\nNAND %s: device %d offset %u, size %u ... ",
+ i ? "read" : "write",
+ nand_curr_device, off, size);
+
+ if (i)
+ ret = nand_read(nand, off, &size, (u_char *)addr);
+ else
+ ret = nand_write(nand, off, &size, (u_char *)addr);
+
+ printf(" %d bytes %s: %s\n", size,
+ i ? "read" : "written", ret ? "ERROR" : "OK");
+
+ return ret == 0 ? 0 : 1;
+ }
+usage:
+ printf("Usage:\n%s\n", cmdtp->usage);
+ return 1;
+}
+
+U_BOOT_CMD(nand, 5, 1, do_nand,
+ "nand - NAND sub-system\n",
+ "info - show available NAND devices\n"
+ "nand device [dev] - show or set current device\n"
+ "nand read[.jffs2] - addr off size\n"
+ "nand write[.jffs2] - addr off size - read/write `size' bytes starting\n"
+ " at offset `off' to/from memory address `addr'\n"
+ "nand erase [clean] [off size] - erase `size' bytes from\n"
+ " offset `off' (entire device if not specified)\n"
+ "nand bad - show bad blocks\n"
+ "nand dump[.oob] off - dump page\n"
+ "nand scrub - really clean NAND erasing bad blocks (UNSAFE)\n"
+ "nand markbad off - mark bad block at offset (UNSAFE)\n"
+ "nand biterr off - make a bit error at offset (UNSAFE)\n"
+ "nand ecc [hw/sw] - switch the ecc calculation algorithm \n"
+ "nand unlock off size - unlock `size' bytes from\n"
+ " offset `off' (entire device if not specified)\n");
+
+int do_nandboot(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+{
+ char *boot_device = NULL;
+ char *ep;
+ int dev;
+ int r;
+ ulong addr, cnt, offset = 0;
+ image_header_t *hdr;
+ nand_info_t *nand;
+
+ switch (argc) {
+ case 1:
+ addr = CFG_LOAD_ADDR;
+ boot_device = getenv("bootdevice");
+ break;
+ case 2:
+ addr = simple_strtoul(argv[1], NULL, 16);
+ boot_device = getenv("bootdevice");
+ break;
+ case 3:
+ addr = simple_strtoul(argv[1], NULL, 16);
+ boot_device = argv[2];
+ break;
+ case 4:
+ addr = simple_strtoul(argv[1], NULL, 16);
+ boot_device = argv[2];
+ offset = simple_strtoul(argv[3], NULL, 16);
+ break;
+ default:
+ printf("Usage:\n%s\n", cmdtp->usage);
+ SHOW_BOOT_PROGRESS(-1);
+ return 1;
+ }
+
+ if (!boot_device) {
+ puts("\n** No boot device **\n");
+ SHOW_BOOT_PROGRESS(-1);
+ return 1;
+ }
+
+ dev = simple_strtoul(boot_device, &ep, 16);
+
+ if (dev < 0 || dev >= CFG_MAX_NAND_DEVICE || !nand_info[dev].name) {
+ printf("\n** Device %d not available\n", dev);
+ SHOW_BOOT_PROGRESS(-1);
+ return 1;
+ }
+
+ nand = &nand_info[dev];
+ printf("\nLoading from device %d: %s (offset 0x%lx)\n",
+ dev, nand->name, offset);
+
+ cnt = nand->oobblock;
+ r = nand_read(nand, offset, &cnt, (u_char *) addr);
+ if (r) {
+ printf("** Read error on %d\n", dev);
+ SHOW_BOOT_PROGRESS(-1);
+ return 1;
+ }
+
+ hdr = (image_header_t *) addr;
+
+ if (ntohl(hdr->ih_magic) != IH_MAGIC) {
+ printf("\n** Bad Magic Number 0x%x **\n", hdr->ih_magic);
+ SHOW_BOOT_PROGRESS(-1);
+ return 1;
+ }
+
+ print_image_hdr(hdr);
+
+ cnt = (ntohl(hdr->ih_size) + sizeof (image_header_t));
+
+ r = nand_read(nand, offset, &cnt, (u_char *) addr);
+ if (r) {
+ printf("** Read error on %d\n", dev);
+ SHOW_BOOT_PROGRESS(-1);
+ return 1;
+ }
+
+ /* Loading ok, update default load address */
+
+ load_addr = addr;
+
+ /* Check if we should attempt an auto-start */
+ if (((ep = getenv("autostart")) != NULL) && (strcmp(ep, "yes") == 0)) {
+ char *local_args[2];
+ extern int do_bootm(cmd_tbl_t *, int, int, char *[]);
+
+ local_args[0] = argv[0];
+ local_args[1] = NULL;
+
+ printf("Automatic boot of image at addr 0x%08lx ...\n", addr);
+
+ do_bootm(cmdtp, 0, 1, local_args);
+ return 1;
+ }
+ return 0;
+}
+
+U_BOOT_CMD(nboot, 4, 1, do_nandboot,
+ "nboot - boot from NAND device\n", "loadAddr dev\n");
+
+
+#endif /* (CONFIG_COMMANDS & CFG_CMD_NAND) */
+
+#else /* CFG_NAND_LEGACY */
+/*
+ *
+ * Legacy NAND support - to be phased out
+ *
+ */
#include <command.h>
#include <malloc.h>
#include <asm/io.h>
@@ -22,10 +432,11 @@
#endif
#if (CONFIG_COMMANDS & CFG_CMD_NAND)
-
-#include <linux/mtd/nand.h>
+#include <linux/mtd/nand_legacy.h>
+#if 0
#include <linux/mtd/nand_ids.h>
#include <jffs2/jffs2.h>
+#endif
#ifdef CONFIG_OMAP1510
void archflashwp(void *archdata, int wp);
@@ -33,15 +444,6 @@ void archflashwp(void *archdata, int wp);
#define ROUND_DOWN(value,boundary) ((value) & (~((boundary)-1)))
-/*
- * Definition of the out of band configuration structure
- */
-struct nand_oob_config {
- int ecc_pos[6]; /* position of ECC bytes inside oob */
- int badblock_pos; /* position of bad block flag inside oob -1 = inactive */
- int eccvalid_pos; /* position of ECC valid flag inside oob -1 = inactive */
-} oob_config = { {0}, 0, 0};
-
#undef NAND_DEBUG
#undef PSYCHO_DEBUG
@@ -63,41 +465,28 @@ struct nand_oob_config {
#define CONFIG_MTD_NAND_ECC /* enable ECC */
#define CONFIG_MTD_NAND_ECC_JFFS2
-/* bits for nand_rw() `cmd'; or together as needed */
+/* bits for nand_legacy_rw() `cmd'; or together as needed */
#define NANDRW_READ 0x01
#define NANDRW_WRITE 0x00
#define NANDRW_JFFS2 0x02
#define NANDRW_JFFS2_SKIP 0x04
/*
- * Function Prototypes
+ * Imports from nand_legacy.c
*/
-static void nand_print(struct nand_chip *nand);
-int nand_rw (struct nand_chip* nand, int cmd,
- size_t start, size_t len,
- size_t * retlen, u_char * buf);
-int nand_erase(struct nand_chip* nand, size_t ofs, size_t len, int clean);
-static int nand_read_ecc(struct nand_chip *nand, size_t start, size_t len,
- size_t * retlen, u_char *buf, u_char *ecc_code);
-static int nand_write_ecc (struct nand_chip* nand, size_t to, size_t len,
- size_t * retlen, const u_char * buf, u_char * ecc_code);
-static void nand_print_bad(struct nand_chip *nand);
-static int nand_read_oob(struct nand_chip* nand, size_t ofs, size_t len,
- size_t * retlen, u_char * buf);
-static int nand_write_oob(struct nand_chip* nand, size_t ofs, size_t len,
- size_t * retlen, const u_char * buf);
-static int NanD_WaitReady(struct nand_chip *nand, int ale_wait);
-#ifdef CONFIG_MTD_NAND_ECC
-static int nand_correct_data (u_char *dat, u_char *read_ecc, u_char *calc_ecc);
-static void nand_calculate_ecc (const u_char *dat, u_char *ecc_code);
-#endif
-
-struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE] = {{0}};
+extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
+extern int curr_device;
+extern int nand_legacy_erase(struct nand_chip *nand, size_t ofs,
+ size_t len, int clean);
+extern int nand_legacy_rw(struct nand_chip *nand, int cmd, size_t start,
+ size_t len, size_t *retlen, u_char *buf);
+extern void nand_print(struct nand_chip *nand);
+extern void nand_print_bad(struct nand_chip *nand);
+extern int nand_read_oob(struct nand_chip *nand, size_t ofs,
+ size_t len, size_t *retlen, u_char *buf);
+extern int nand_write_oob(struct nand_chip *nand, size_t ofs,
+ size_t len, size_t *retlen, const u_char *buf);
-/* Current NAND Device */
-static int curr_device = -1;
-
-/* ------------------------------------------------------------------------- */
int do_nand (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
@@ -174,7 +563,7 @@ int do_nand (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
printf ("\nNAND erase: device %d offset %ld, size %ld ... ",
curr_device, off, size);
- ret = nand_erase (nand, off, size, 1);
+ ret = nand_legacy_erase (nand, off, size, 1);
printf("%s\n", ret ? "ERROR" : "OK");
@@ -240,7 +629,7 @@ int do_nand (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
(cmd & NANDRW_READ) ? "read" : "write",
curr_device, off, size);
- ret = nand_rw(nand_dev_desc + curr_device, cmd, off, size,
+ ret = nand_legacy_rw(nand_dev_desc + curr_device, cmd, off, size,
(size_t *)&total, (u_char*)addr);
printf (" %d bytes %s: %s\n", total,
@@ -258,7 +647,8 @@ int do_nand (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
printf ("\nNAND erase: device %d offset %ld, size %ld ... ",
curr_device, off, size);
- ret = nand_erase (nand_dev_desc + curr_device, off, size, clean);
+ ret = nand_legacy_erase (nand_dev_desc + curr_device,
+ off, size, clean);
printf("%s\n", ret ? "ERROR" : "OK");
@@ -284,6 +674,7 @@ U_BOOT_CMD(
" offset `off' (entire device if not specified)\n"
"nand bad - show bad blocks\n"
"nand read.oob addr off size - read out-of-band data\n"
+ "nand read.oob addr off size - read out-of-band data\n"
"nand write.oob addr off size - read out-of-band data\n"
);
@@ -340,8 +731,8 @@ int do_nandboot (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
dev, nand_dev_desc[dev].name, nand_dev_desc[dev].IO_ADDR,
offset);
- if (nand_rw (nand_dev_desc + dev, NANDRW_READ, offset,
- SECTORSIZE, NULL, (u_char *)addr)) {
+ if (nand_legacy_rw (nand_dev_desc + dev, NANDRW_READ, offset,
+ SECTORSIZE, NULL, (u_char *)addr)) {
printf ("** Read error on %d\n", dev);
SHOW_BOOT_PROGRESS (-1);
return 1;
@@ -356,13 +747,14 @@ int do_nandboot (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
cnt = (ntohl(hdr->ih_size) + sizeof(image_header_t));
cnt -= SECTORSIZE;
} else {
- printf ("\n** Bad Magic Number 0x%x **\n", hdr->ih_magic);
+ printf ("\n** Bad Magic Number 0x%x **\n", ntohl(hdr->ih_magic));
SHOW_BOOT_PROGRESS (-1);
return 1;
}
- if (nand_rw (nand_dev_desc + dev, NANDRW_READ, offset + SECTORSIZE, cnt,
- NULL, (u_char *)(addr+SECTORSIZE))) {
+ if (nand_legacy_rw (nand_dev_desc + dev, NANDRW_READ,
+ offset + SECTORSIZE, cnt, NULL,
+ (u_char *)(addr+SECTORSIZE))) {
printf ("** Read error on %d\n", dev);
SHOW_BOOT_PROGRESS (-1);
return 1;
@@ -394,1505 +786,6 @@ U_BOOT_CMD(
"loadAddr dev\n"
);
-/* returns 0 if block containing pos is OK:
- * valid erase block and
- * not marked bad, or no bad mark position is specified
- * returns 1 if marked bad or otherwise invalid
- */
-int check_block (struct nand_chip *nand, unsigned long pos)
-{
- size_t retlen;
- uint8_t oob_data;
- uint16_t oob_data16[6];
- int page0 = pos & (-nand->erasesize);
- int page1 = page0 + nand->oobblock;
- int badpos = oob_config.badblock_pos;
-
- if (pos >= nand->totlen)
- return 1;
-
- if (badpos < 0)
- return 0; /* no way to check, assume OK */
-
- if (nand->bus16) {
- if (nand_read_oob(nand, (page0 + 0), 12, &retlen, (uint8_t *)oob_data16)
- || (oob_data16[2] & 0xff00) != 0xff00)
- return 1;
- if (nand_read_oob(nand, (page1 + 0), 12, &retlen, (uint8_t *)oob_data16)
- || (oob_data16[2] & 0xff00) != 0xff00)
- return 1;
- } else {
- /* Note - bad block marker can be on first or second page */
- if (nand_read_oob(nand, page0 + badpos, 1, &retlen, (unsigned char *)&oob_data)
- || oob_data != 0xff
- || nand_read_oob (nand, page1 + badpos, 1, &retlen, (unsigned char *)&oob_data)
- || oob_data != 0xff)
- return 1;
- }
-
- return 0;
-}
-
-/* print bad blocks in NAND flash */
-static void nand_print_bad(struct nand_chip* nand)
-{
- unsigned long pos;
-
- for (pos = 0; pos < nand->totlen; pos += nand->erasesize) {
- if (check_block(nand, pos))
- printf(" 0x%8.8lx\n", pos);
- }
- puts("\n");
-}
-
-/* cmd: 0: NANDRW_WRITE write, fail on bad block
- * 1: NANDRW_READ read, fail on bad block
- * 2: NANDRW_WRITE | NANDRW_JFFS2 write, skip bad blocks
- * 3: NANDRW_READ | NANDRW_JFFS2 read, data all 0xff for bad blocks
- * 7: NANDRW_READ | NANDRW_JFFS2 | NANDRW_JFFS2_SKIP read, skip bad blocks
- */
-int nand_rw (struct nand_chip* nand, int cmd,
- size_t start, size_t len,
- size_t * retlen, u_char * buf)
-{
- int ret = 0, n, total = 0;
- char eccbuf[6];
- /* eblk (once set) is the start of the erase block containing the
- * data being processed.
- */
- unsigned long eblk = ~0; /* force mismatch on first pass */
- unsigned long erasesize = nand->erasesize;
-
- while (len) {
- if ((start & (-erasesize)) != eblk) {
- /* have crossed into new erase block, deal with
- * it if it is sure marked bad.
- */
- eblk = start & (-erasesize); /* start of block */
- if (check_block(nand, eblk)) {
- if (cmd == (NANDRW_READ | NANDRW_JFFS2)) {
- while (len > 0 &&
- start - eblk < erasesize) {
- *(buf++) = 0xff;
- ++start;
- ++total;
- --len;
- }
- continue;
- } else if (cmd == (NANDRW_READ | NANDRW_JFFS2 | NANDRW_JFFS2_SKIP)) {
- start += erasesize;
- continue;
- } else if (cmd == (NANDRW_WRITE | NANDRW_JFFS2)) {
- /* skip bad block */
- start += erasesize;
- continue;
- } else {
- ret = 1;
- break;
- }
- }
- }
- /* The ECC will not be calculated correctly if
- less than 512 is written or read */
- /* Is request at least 512 bytes AND it starts on a proper boundry */
- if((start != ROUND_DOWN(start, 0x200)) || (len < 0x200))
- printf("Warning block writes should be at least 512 bytes and start on a 512 byte boundry\n");
-
- if (cmd & NANDRW_READ) {
- ret = nand_read_ecc(nand, start,
- min(len, eblk + erasesize - start),
- (size_t *)&n, (u_char*)buf, (u_char *)eccbuf);
- } else {
- ret = nand_write_ecc(nand, start,
- min(len, eblk + erasesize - start),
- (size_t *)&n, (u_char*)buf, (u_char *)eccbuf);
- }
-
- if (ret)
- break;
-
- start += n;
- buf += n;
- total += n;
- len -= n;
- }
- if (retlen)
- *retlen = total;
-
- return ret;
-}
-
-static void nand_print(struct nand_chip *nand)
-{
- if (nand->numchips > 1) {
- printf("%s at 0x%lx,\n"
- "\t %d chips %s, size %d MB, \n"
- "\t total size %ld MB, sector size %ld kB\n",
- nand->name, nand->IO_ADDR, nand->numchips,
- nand->chips_name, 1 << (nand->chipshift - 20),
- nand->totlen >> 20, nand->erasesize >> 10);
- }
- else {
- printf("%s at 0x%lx (", nand->chips_name, nand->IO_ADDR);
- print_size(nand->totlen, ", ");
- print_size(nand->erasesize, " sector)\n");
- }
-}
-
-/* ------------------------------------------------------------------------- */
-
-static int NanD_WaitReady(struct nand_chip *nand, int ale_wait)
-{
- /* This is inline, to optimise the common case, where it's ready instantly */
- int ret = 0;
-
-#ifdef NAND_NO_RB /* in config file, shorter delays currently wrap accesses */
- if(ale_wait)
- NAND_WAIT_READY(nand); /* do the worst case 25us wait */
- else
- udelay(10);
-#else /* has functional r/b signal */
- NAND_WAIT_READY(nand);
-#endif
- return ret;
-}
-
-/* NanD_Command: Send a flash command to the flash chip */
-
-static inline int NanD_Command(struct nand_chip *nand, unsigned char command)
-{
- unsigned long nandptr = nand->IO_ADDR;
-
- /* Assert the CLE (Command Latch Enable) line to the flash chip */
- NAND_CTL_SETCLE(nandptr);
-
- /* Send the command */
- WRITE_NAND_COMMAND(command, nandptr);
-
- /* Lower the CLE line */
- NAND_CTL_CLRCLE(nandptr);
-
-#ifdef NAND_NO_RB
- if(command == NAND_CMD_RESET){
- u_char ret_val;
- NanD_Command(nand, NAND_CMD_STATUS);
- do {
- ret_val = READ_NAND(nandptr);/* wait till ready */
- } while((ret_val & 0x40) != 0x40);
- }
-#endif
- return NanD_WaitReady(nand, 0);
-}
-
-/* NanD_Address: Set the current address for the flash chip */
-
-static int NanD_Address(struct nand_chip *nand, int numbytes, unsigned long ofs)
-{
- unsigned long nandptr;
- int i;
-
- nandptr = nand->IO_ADDR;
-
- /* Assert the ALE (Address Latch Enable) line to the flash chip */
- NAND_CTL_SETALE(nandptr);
-
- /* Send the address */
- /* Devices with 256-byte page are addressed as:
- * Column (bits 0-7), Page (bits 8-15, 16-23, 24-31)
- * there is no device on the market with page256
- * and more than 24 bits.
- * Devices with 512-byte page are addressed as:
- * Column (bits 0-7), Page (bits 9-16, 17-24, 25-31)
- * 25-31 is sent only if the chip support it.
- * bit 8 changes the read command to be sent
- * (NAND_CMD_READ0 or NAND_CMD_READ1).
- */
-
- if (numbytes == ADDR_COLUMN || numbytes == ADDR_COLUMN_PAGE)
- WRITE_NAND_ADDRESS(ofs, nandptr);
-
- ofs = ofs >> nand->page_shift;
-
- if (numbytes == ADDR_PAGE || numbytes == ADDR_COLUMN_PAGE) {
- for (i = 0; i < nand->pageadrlen; i++, ofs = ofs >> 8) {
- WRITE_NAND_ADDRESS(ofs, nandptr);
- }
- }
-
- /* Lower the ALE line */
- NAND_CTL_CLRALE(nandptr);
-
- /* Wait for the chip to respond */
- return NanD_WaitReady(nand, 1);
-}
-
-/* NanD_SelectChip: Select a given flash chip within the current floor */
-
-static inline int NanD_SelectChip(struct nand_chip *nand, int chip)
-{
- /* Wait for it to be ready */
- return NanD_WaitReady(nand, 0);
-}
-
-/* NanD_IdentChip: Identify a given NAND chip given {floor,chip} */
-
-static int NanD_IdentChip(struct nand_chip *nand, int floor, int chip)
-{
- int mfr, id, i;
-
- NAND_ENABLE_CE(nand); /* set pin low */
- /* Reset the chip */
- if (NanD_Command(nand, NAND_CMD_RESET)) {
-#ifdef NAND_DEBUG
- printf("NanD_Command (reset) for %d,%d returned true\n",
- floor, chip);
-#endif
- NAND_DISABLE_CE(nand); /* set pin high */
- return 0;
- }
-
- /* Read the NAND chip ID: 1. Send ReadID command */
- if (NanD_Command(nand, NAND_CMD_READID)) {
-#ifdef NAND_DEBUG
- printf("NanD_Command (ReadID) for %d,%d returned true\n",
- floor, chip);
-#endif
- NAND_DISABLE_CE(nand); /* set pin high */
- return 0;
- }
-
- /* Read the NAND chip ID: 2. Send address byte zero */
- NanD_Address(nand, ADDR_COLUMN, 0);
-
- /* Read the manufacturer and device id codes from the device */
-
- mfr = READ_NAND(nand->IO_ADDR);
-
- id = READ_NAND(nand->IO_ADDR);
-
- NAND_DISABLE_CE(nand); /* set pin high */
-
-#ifdef NAND_DEBUG
- printf("NanD_Command (ReadID) got %x %x\n", mfr, id);
-#endif
- if (mfr == 0xff || mfr == 0) {
- /* No response - return failure */
- return 0;
- }
-
- /* Check it's the same as the first chip we identified.
- * M-Systems say that any given nand_chip device should only
- * contain _one_ type of flash part, although that's not a
- * hardware restriction. */
- if (nand->mfr) {
- if (nand->mfr == mfr && nand->id == id) {
- return 1; /* This is another the same the first */
- } else {
- printf("Flash chip at floor %d, chip %d is different:\n",
- floor, chip);
- }
- }
-
- /* Print and store the manufacturer and ID codes. */
- for (i = 0; nand_flash_ids[i].name != NULL; i++) {
- if (mfr == nand_flash_ids[i].manufacture_id &&
- id == nand_flash_ids[i].model_id) {
-#ifdef NAND_DEBUG
- printf("Flash chip found:\n\t Manufacturer ID: 0x%2.2X, "
- "Chip ID: 0x%2.2X (%s)\n", mfr, id,
- nand_flash_ids[i].name);
-#endif
- if (!nand->mfr) {
- nand->mfr = mfr;
- nand->id = id;
- nand->chipshift =
- nand_flash_ids[i].chipshift;
- nand->page256 = nand_flash_ids[i].page256;
- nand->eccsize = 256;
- if (nand->page256) {
- nand->oobblock = 256;
- nand->oobsize = 8;
- nand->page_shift = 8;
- } else {
- nand->oobblock = 512;
- nand->oobsize = 16;
- nand->page_shift = 9;
- }
- nand->pageadrlen = nand_flash_ids[i].pageadrlen;
- nand->erasesize = nand_flash_ids[i].erasesize;
- nand->chips_name = nand_flash_ids[i].name;
- nand->bus16 = nand_flash_ids[i].bus16;
- return 1;
- }
- return 0;
- }
- }
-
-
-#ifdef NAND_DEBUG
- /* We haven't fully identified the chip. Print as much as we know. */
- printf("Unknown flash chip found: %2.2X %2.2X\n",
- id, mfr);
-#endif
-
- return 0;
-}
-
-/* NanD_ScanChips: Find all NAND chips present in a nand_chip, and identify them */
-
-static void NanD_ScanChips(struct nand_chip *nand)
-{
- int floor, chip;
- int numchips[NAND_MAX_FLOORS];
- int maxchips = NAND_MAX_CHIPS;
- int ret = 1;
-
- nand->numchips = 0;
- nand->mfr = 0;
- nand->id = 0;
-
-
- /* For each floor, find the number of valid chips it contains */
- for (floor = 0; floor < NAND_MAX_FLOORS; floor++) {
- ret = 1;
- numchips[floor] = 0;
- for (chip = 0; chip < maxchips && ret != 0; chip++) {
-
- ret = NanD_IdentChip(nand, floor, chip);
- if (ret) {
- numchips[floor]++;
- nand->numchips++;
- }
- }
- }
-
- /* If there are none at all that we recognise, bail */
- if (!nand->numchips) {
-#ifdef NAND_DEBUG
- puts ("No NAND flash chips recognised.\n");
-#endif
- return;
- }
-
- /* Allocate an array to hold the information for each chip */
- nand->chips = malloc(sizeof(struct Nand) * nand->numchips);
- if (!nand->chips) {
- puts ("No memory for allocating chip info structures\n");
- return;
- }
-
- ret = 0;
-
- /* Fill out the chip array with {floor, chipno} for each
- * detected chip in the device. */
- for (floor = 0; floor < NAND_MAX_FLOORS; floor++) {
- for (chip = 0; chip < numchips[floor]; chip++) {
- nand->chips[ret].floor = floor;
- nand->chips[ret].chip = chip;
- nand->chips[ret].curadr = 0;
- nand->chips[ret].curmode = 0x50;
- ret++;
- }
- }
-
- /* Calculate and print the total size of the device */
- nand->totlen = nand->numchips * (1 << nand->chipshift);
-
-#ifdef NAND_DEBUG
- printf("%d flash chips found. Total nand_chip size: %ld MB\n",
- nand->numchips, nand->totlen >> 20);
-#endif
-}
-
-/* we need to be fast here, 1 us per read translates to 1 second per meg */
-static void NanD_ReadBuf (struct nand_chip *nand, u_char * data_buf, int cntr)
-{
- unsigned long nandptr = nand->IO_ADDR;
-
- NanD_Command (nand, NAND_CMD_READ0);
-
- if (nand->bus16) {
- u16 val;
-
- while (cntr >= 16) {
- val = READ_NAND (nandptr);
- *data_buf++ = val & 0xff;
- *data_buf++ = val >> 8;
- val = READ_NAND (nandptr);
- *data_buf++ = val & 0xff;
- *data_buf++ = val >> 8;
- val = READ_NAND (nandptr);
- *data_buf++ = val & 0xff;
- *data_buf++ = val >> 8;
- val = READ_NAND (nandptr);
- *data_buf++ = val & 0xff;
- *data_buf++ = val >> 8;
- val = READ_NAND (nandptr);
- *data_buf++ = val & 0xff;
- *data_buf++ = val >> 8;
- val = READ_NAND (nandptr);
- *data_buf++ = val & 0xff;
- *data_buf++ = val >> 8;
- val = READ_NAND (nandptr);
- *data_buf++ = val & 0xff;
- *data_buf++ = val >> 8;
- val = READ_NAND (nandptr);
- *data_buf++ = val & 0xff;
- *data_buf++ = val >> 8;
- cntr -= 16;
- }
-
- while (cntr > 0) {
- val = READ_NAND (nandptr);
- *data_buf++ = val & 0xff;
- *data_buf++ = val >> 8;
- cntr -= 2;
- }
- } else {
- while (cntr >= 16) {
- *data_buf++ = READ_NAND (nandptr);
- *data_buf++ = READ_NAND (nandptr);
- *data_buf++ = READ_NAND (nandptr);
- *data_buf++ = READ_NAND (nandptr);
- *data_buf++ = READ_NAND (nandptr);
- *data_buf++ = READ_NAND (nandptr);
- *data_buf++ = READ_NAND (nandptr);
- *data_buf++ = READ_NAND (nandptr);
- *data_buf++ = READ_NAND (nandptr);
- *data_buf++ = READ_NAND (nandptr);
- *data_buf++ = READ_NAND (nandptr);
- *data_buf++ = READ_NAND (nandptr);
- *data_buf++ = READ_NAND (nandptr);
- *data_buf++ = READ_NAND (nandptr);
- *data_buf++ = READ_NAND (nandptr);
- *data_buf++ = READ_NAND (nandptr);
- cntr -= 16;
- }
-
- while (cntr > 0) {
- *data_buf++ = READ_NAND (nandptr);
- cntr--;
- }
- }
-}
-
-/*
- * NAND read with ECC
- */
-static int nand_read_ecc(struct nand_chip *nand, size_t start, size_t len,
- size_t * retlen, u_char *buf, u_char *ecc_code)
-{
- int col, page;
- int ecc_status = 0;
-#ifdef CONFIG_MTD_NAND_ECC
- int j;
- int ecc_failed = 0;
- u_char *data_poi;
- u_char ecc_calc[6];
-#endif
-
- /* Do not allow reads past end of device */
- if ((start + len) > nand->totlen) {
- printf ("%s: Attempt read beyond end of device %x %x %x\n",
- __FUNCTION__, (uint) start, (uint) len, (uint) nand->totlen);
- *retlen = 0;
- return -1;
- }
-
- /* First we calculate the starting page */
- /*page = shr(start, nand->page_shift);*/
- page = start >> nand->page_shift;
-
- /* Get raw starting column */
- col = start & (nand->oobblock - 1);
-
- /* Initialize return value */
- *retlen = 0;
-
- /* Select the NAND device */
- NAND_ENABLE_CE(nand); /* set pin low */
-
- /* Loop until all data read */
- while (*retlen < len) {
-
-#ifdef CONFIG_MTD_NAND_ECC
- /* Do we have this page in cache ? */
- if (nand->cache_page == page)
- goto readdata;
- /* Send the read command */
- NanD_Command(nand, NAND_CMD_READ0);
- if (nand->bus16) {
- NanD_Address(nand, ADDR_COLUMN_PAGE,
- (page << nand->page_shift) + (col >> 1));
- } else {
- NanD_Address(nand, ADDR_COLUMN_PAGE,
- (page << nand->page_shift) + col);
- }
-
- /* Read in a page + oob data */
- NanD_ReadBuf(nand, nand->data_buf, nand->oobblock + nand->oobsize);
-
- /* copy data into cache, for read out of cache and if ecc fails */
- if (nand->data_cache) {
- memcpy (nand->data_cache, nand->data_buf,
- nand->oobblock + nand->oobsize);
- }
-
- /* Pick the ECC bytes out of the oob data */
- for (j = 0; j < 6; j++) {
- ecc_code[j] = nand->data_buf[(nand->oobblock + oob_config.ecc_pos[j])];
- }
-
- /* Calculate the ECC and verify it */
- /* If block was not written with ECC, skip ECC */
- if (oob_config.eccvalid_pos != -1 &&
- (nand->data_buf[nand->oobblock + oob_config.eccvalid_pos] & 0x0f) != 0x0f) {
-
- nand_calculate_ecc (&nand->data_buf[0], &ecc_calc[0]);
- switch (nand_correct_data (&nand->data_buf[0], &ecc_code[0], &ecc_calc[0])) {
- case -1:
- printf ("%s: Failed ECC read, page 0x%08x\n", __FUNCTION__, page);
- ecc_failed++;
- break;
- case 1:
- case 2: /* transfer ECC corrected data to cache */
- if (nand->data_cache)
- memcpy (nand->data_cache, nand->data_buf, 256);
- break;
- }
- }
-
- if (oob_config.eccvalid_pos != -1 &&
- nand->oobblock == 512 && (nand->data_buf[nand->oobblock + oob_config.eccvalid_pos] & 0xf0) != 0xf0) {
-
- nand_calculate_ecc (&nand->data_buf[256], &ecc_calc[3]);
- switch (nand_correct_data (&nand->data_buf[256], &ecc_code[3], &ecc_calc[3])) {
- case -1:
- printf ("%s: Failed ECC read, page 0x%08x\n", __FUNCTION__, page);
- ecc_failed++;
- break;
- case 1:
- case 2: /* transfer ECC corrected data to cache */
- if (nand->data_cache)
- memcpy (&nand->data_cache[256], &nand->data_buf[256], 256);
- break;
- }
- }
-readdata:
- /* Read the data from ECC data buffer into return buffer */
- data_poi = (nand->data_cache) ? nand->data_cache : nand->data_buf;
- data_poi += col;
- if ((*retlen + (nand->oobblock - col)) >= len) {
- memcpy (buf + *retlen, data_poi, len - *retlen);
- *retlen = len;
- } else {
- memcpy (buf + *retlen, data_poi, nand->oobblock - col);
- *retlen += nand->oobblock - col;
- }
- /* Set cache page address, invalidate, if ecc_failed */
- nand->cache_page = (nand->data_cache && !ecc_failed) ? page : -1;
-
- ecc_status += ecc_failed;
- ecc_failed = 0;
-
-#else
- /* Send the read command */
- NanD_Command(nand, NAND_CMD_READ0);
- if (nand->bus16) {
- NanD_Address(nand, ADDR_COLUMN_PAGE,
- (page << nand->page_shift) + (col >> 1));
- } else {
- NanD_Address(nand, ADDR_COLUMN_PAGE,
- (page << nand->page_shift) + col);
- }
-
- /* Read the data directly into the return buffer */
- if ((*retlen + (nand->oobblock - col)) >= len) {
- NanD_ReadBuf(nand, buf + *retlen, len - *retlen);
- *retlen = len;
- /* We're done */
- continue;
- } else {
- NanD_ReadBuf(nand, buf + *retlen, nand->oobblock - col);
- *retlen += nand->oobblock - col;
- }
-#endif
- /* For subsequent reads align to page boundary. */
- col = 0;
- /* Increment page address */
- page++;
- }
-
- /* De-select the NAND device */
- NAND_DISABLE_CE(nand); /* set pin high */
-
- /*
- * Return success, if no ECC failures, else -EIO
- * fs driver will take care of that, because
- * retlen == desired len and result == -EIO
- */
- return ecc_status ? -1 : 0;
-}
-
-/*
- * Nand_page_program function is used for write and writev !
- */
-static int nand_write_page (struct nand_chip *nand,
- int page, int col, int last, u_char * ecc_code)
-{
-
- int i;
- unsigned long nandptr = nand->IO_ADDR;
-
-#ifdef CONFIG_MTD_NAND_ECC
-#ifdef CONFIG_MTD_NAND_VERIFY_WRITE
- int ecc_bytes = (nand->oobblock == 512) ? 6 : 3;
-#endif
-#endif
- /* pad oob area */
- for (i = nand->oobblock; i < nand->oobblock + nand->oobsize; i++)
- nand->data_buf[i] = 0xff;
-
-#ifdef CONFIG_MTD_NAND_ECC
- /* Zero out the ECC array */
- for (i = 0; i < 6; i++)
- ecc_code[i] = 0x00;
-
- /* Read back previous written data, if col > 0 */
- if (col) {
- NanD_Command (nand, NAND_CMD_READ0);
- if (nand->bus16) {
- NanD_Address (nand, ADDR_COLUMN_PAGE,
- (page << nand->page_shift) + (col >> 1));
- } else {
- NanD_Address (nand, ADDR_COLUMN_PAGE,
- (page << nand->page_shift) + col);
- }
-
- if (nand->bus16) {
- u16 val;
-
- for (i = 0; i < col; i += 2) {
- val = READ_NAND (nandptr);
- nand->data_buf[i] = val & 0xff;
- nand->data_buf[i + 1] = val >> 8;
- }
- } else {
- for (i = 0; i < col; i++)
- nand->data_buf[i] = READ_NAND (nandptr);
- }
- }
-
- /* Calculate and write the ECC if we have enough data */
- if ((col < nand->eccsize) && (last >= nand->eccsize)) {
- nand_calculate_ecc (&nand->data_buf[0], &(ecc_code[0]));
- for (i = 0; i < 3; i++) {
- nand->data_buf[(nand->oobblock +
- oob_config.ecc_pos[i])] = ecc_code[i];
- }
- if (oob_config.eccvalid_pos != -1) {
- nand->data_buf[nand->oobblock +
- oob_config.eccvalid_pos] = 0xf0;
- }
- }
-
- /* Calculate and write the second ECC if we have enough data */
- if ((nand->oobblock == 512) && (last == nand->oobblock)) {
- nand_calculate_ecc (&nand->data_buf[256], &(ecc_code[3]));
- for (i = 3; i < 6; i++) {
- nand->data_buf[(nand->oobblock +
- oob_config.ecc_pos[i])] = ecc_code[i];
- }
- if (oob_config.eccvalid_pos != -1) {
- nand->data_buf[nand->oobblock +
- oob_config.eccvalid_pos] &= 0x0f;
- }
- }
-#endif
- /* Prepad for partial page programming !!! */
- for (i = 0; i < col; i++)
- nand->data_buf[i] = 0xff;
-
- /* Postpad for partial page programming !!! oob is already padded */
- for (i = last; i < nand->oobblock; i++)
- nand->data_buf[i] = 0xff;
-
- /* Send command to begin auto page programming */
- NanD_Command (nand, NAND_CMD_READ0);
- NanD_Command (nand, NAND_CMD_SEQIN);
- if (nand->bus16) {
- NanD_Address (nand, ADDR_COLUMN_PAGE,
- (page << nand->page_shift) + (col >> 1));
- } else {
- NanD_Address (nand, ADDR_COLUMN_PAGE,
- (page << nand->page_shift) + col);
- }
-
- /* Write out complete page of data */
- if (nand->bus16) {
- for (i = 0; i < (nand->oobblock + nand->oobsize); i += 2) {
- WRITE_NAND (nand->data_buf[i] +
- (nand->data_buf[i + 1] << 8),
- nand->IO_ADDR);
- }
- } else {
- for (i = 0; i < (nand->oobblock + nand->oobsize); i++)
- WRITE_NAND (nand->data_buf[i], nand->IO_ADDR);
- }
-
- /* Send command to actually program the data */
- NanD_Command (nand, NAND_CMD_PAGEPROG);
- NanD_Command (nand, NAND_CMD_STATUS);
-#ifdef NAND_NO_RB
- {
- u_char ret_val;
-
- do {
- ret_val = READ_NAND (nandptr); /* wait till ready */
- } while ((ret_val & 0x40) != 0x40);
- }
-#endif
- /* See if device thinks it succeeded */
- if (READ_NAND (nand->IO_ADDR) & 0x01) {
- printf ("%s: Failed write, page 0x%08x, ", __FUNCTION__,
- page);
- return -1;
- }
-#ifdef CONFIG_MTD_NAND_VERIFY_WRITE
- /*
- * The NAND device assumes that it is always writing to
- * a cleanly erased page. Hence, it performs its internal
- * write verification only on bits that transitioned from
- * 1 to 0. The device does NOT verify the whole page on a
- * byte by byte basis. It is possible that the page was
- * not completely erased or the page is becoming unusable
- * due to wear. The read with ECC would catch the error
- * later when the ECC page check fails, but we would rather
- * catch it early in the page write stage. Better to write
- * no data than invalid data.
- */
-
- /* Send command to read back the page */
- if (col < nand->eccsize)
- NanD_Command (nand, NAND_CMD_READ0);
- else
- NanD_Command (nand, NAND_CMD_READ1);
- if (nand->bus16) {
- NanD_Address (nand, ADDR_COLUMN_PAGE,
- (page << nand->page_shift) + (col >> 1));
- } else {
- NanD_Address (nand, ADDR_COLUMN_PAGE,
- (page << nand->page_shift) + col);
- }
-
- /* Loop through and verify the data */
- if (nand->bus16) {
- for (i = col; i < last; i = +2) {
- if ((nand->data_buf[i] +
- (nand->data_buf[i + 1] << 8)) != READ_NAND (nand->IO_ADDR)) {
- printf ("%s: Failed write verify, page 0x%08x ",
- __FUNCTION__, page);
- return -1;
- }
- }
- } else {
- for (i = col; i < last; i++) {
- if (nand->data_buf[i] != READ_NAND (nand->IO_ADDR)) {
- printf ("%s: Failed write verify, page 0x%08x ",
- __FUNCTION__, page);
- return -1;
- }
- }
- }
-
-#ifdef CONFIG_MTD_NAND_ECC
- /*
- * We also want to check that the ECC bytes wrote
- * correctly for the same reasons stated above.
- */
- NanD_Command (nand, NAND_CMD_READOOB);
- if (nand->bus16) {
- NanD_Address (nand, ADDR_COLUMN_PAGE,
- (page << nand->page_shift) + (col >> 1));
- } else {
- NanD_Address (nand, ADDR_COLUMN_PAGE,
- (page << nand->page_shift) + col);
- }
- if (nand->bus16) {
- for (i = 0; i < nand->oobsize; i += 2) {
- u16 val;
-
- val = READ_NAND (nand->IO_ADDR);
- nand->data_buf[i] = val & 0xff;
- nand->data_buf[i + 1] = val >> 8;
- }
- } else {
- for (i = 0; i < nand->oobsize; i++) {
- nand->data_buf[i] = READ_NAND (nand->IO_ADDR);
- }
- }
- for (i = 0; i < ecc_bytes; i++) {
- if ((nand->data_buf[(oob_config.ecc_pos[i])] != ecc_code[i]) && ecc_code[i]) {
- printf ("%s: Failed ECC write "
- "verify, page 0x%08x, "
- "%6i bytes were succesful\n",
- __FUNCTION__, page, i);
- return -1;
- }
- }
-#endif /* CONFIG_MTD_NAND_ECC */
-#endif /* CONFIG_MTD_NAND_VERIFY_WRITE */
- return 0;
-}
-
-static int nand_write_ecc (struct nand_chip* nand, size_t to, size_t len,
- size_t * retlen, const u_char * buf, u_char * ecc_code)
-{
- int i, page, col, cnt, ret = 0;
-
- /* Do not allow write past end of device */
- if ((to + len) > nand->totlen) {
- printf ("%s: Attempt to write past end of page\n", __FUNCTION__);
- return -1;
- }
-
- /* Shift to get page */
- page = ((int) to) >> nand->page_shift;
-
- /* Get the starting column */
- col = to & (nand->oobblock - 1);
-
- /* Initialize return length value */
- *retlen = 0;
-
- /* Select the NAND device */
-#ifdef CONFIG_OMAP1510
- archflashwp(0,0);
-#endif
-#ifdef CFG_NAND_WP
- NAND_WP_OFF();
-#endif
-
- NAND_ENABLE_CE(nand); /* set pin low */
-
- /* Check the WP bit */
- NanD_Command(nand, NAND_CMD_STATUS);
- if (!(READ_NAND(nand->IO_ADDR) & 0x80)) {
- printf ("%s: Device is write protected!!!\n", __FUNCTION__);
- ret = -1;
- goto out;
- }
-
- /* Loop until all data is written */
- while (*retlen < len) {
- /* Invalidate cache, if we write to this page */
- if (nand->cache_page == page)
- nand->cache_page = -1;
-
- /* Write data into buffer */
- if ((col + len) >= nand->oobblock) {
- for (i = col, cnt = 0; i < nand->oobblock; i++, cnt++) {
- nand->data_buf[i] = buf[(*retlen + cnt)];
- }
- } else {
- for (i = col, cnt = 0; cnt < (len - *retlen); i++, cnt++) {
- nand->data_buf[i] = buf[(*retlen + cnt)];
- }
- }
- /* We use the same function for write and writev !) */
- ret = nand_write_page (nand, page, col, i, ecc_code);
- if (ret)
- goto out;
-
- /* Next data start at page boundary */
- col = 0;
-
- /* Update written bytes count */
- *retlen += cnt;
-
- /* Increment page address */
- page++;
- }
-
- /* Return happy */
- *retlen = len;
-
-out:
- /* De-select the NAND device */
- NAND_DISABLE_CE(nand); /* set pin high */
-#ifdef CONFIG_OMAP1510
- archflashwp(0,1);
-#endif
-#ifdef CFG_NAND_WP
- NAND_WP_ON();
-#endif
-
- return ret;
-}
-
-/* read from the 16 bytes of oob data that correspond to a 512 byte
- * page or 2 256-byte pages.
- */
-static int nand_read_oob(struct nand_chip* nand, size_t ofs, size_t len,
- size_t * retlen, u_char * buf)
-{
- int len256 = 0;
- struct Nand *mychip;
- int ret = 0;
-
- mychip = &nand->chips[ofs >> nand->chipshift];
-
- /* update address for 2M x 8bit devices. OOB starts on the second */
- /* page to maintain compatibility with nand_read_ecc. */
- if (nand->page256) {
- if (!(ofs & 0x8))
- ofs += 0x100;
- else
- ofs -= 0x8;
- }
-
- NAND_ENABLE_CE(nand); /* set pin low */
- NanD_Command(nand, NAND_CMD_READOOB);
- if (nand->bus16) {
- NanD_Address(nand, ADDR_COLUMN_PAGE,
- ((ofs >> nand->page_shift) << nand->page_shift) +
- ((ofs & (nand->oobblock - 1)) >> 1));
- } else {
- NanD_Address(nand, ADDR_COLUMN_PAGE, ofs);
- }
-
- /* treat crossing 8-byte OOB data for 2M x 8bit devices */
- /* Note: datasheet says it should automaticaly wrap to the */
- /* next OOB block, but it didn't work here. mf. */
- if (nand->page256 && ofs + len > (ofs | 0x7) + 1) {
- len256 = (ofs | 0x7) + 1 - ofs;
- NanD_ReadBuf(nand, buf, len256);
-
- NanD_Command(nand, NAND_CMD_READOOB);
- NanD_Address(nand, ADDR_COLUMN_PAGE, ofs & (~0x1ff));
- }
-
- NanD_ReadBuf(nand, &buf[len256], len - len256);
-
- *retlen = len;
- /* Reading the full OOB data drops us off of the end of the page,
- * causing the flash device to go into busy mode, so we need
- * to wait until ready 11.4.1 and Toshiba TC58256FT nands */
-
- ret = NanD_WaitReady(nand, 1);
- NAND_DISABLE_CE(nand); /* set pin high */
-
- return ret;
-
-}
-
-/* write to the 16 bytes of oob data that correspond to a 512 byte
- * page or 2 256-byte pages.
- */
-static int nand_write_oob(struct nand_chip* nand, size_t ofs, size_t len,
- size_t * retlen, const u_char * buf)
-{
- int len256 = 0;
- int i;
- unsigned long nandptr = nand->IO_ADDR;
-
-#ifdef PSYCHO_DEBUG
- printf("nand_write_oob(%lx, %d): %2.2X %2.2X %2.2X %2.2X ... %2.2X %2.2X .. %2.2X %2.2X\n",
- (long)ofs, len, buf[0], buf[1], buf[2], buf[3],
- buf[8], buf[9], buf[14],buf[15]);
-#endif
-
- NAND_ENABLE_CE(nand); /* set pin low to enable chip */
-
- /* Reset the chip */
- NanD_Command(nand, NAND_CMD_RESET);
-
- /* issue the Read2 command to set the pointer to the Spare Data Area. */
- NanD_Command(nand, NAND_CMD_READOOB);
- if (nand->bus16) {
- NanD_Address(nand, ADDR_COLUMN_PAGE,
- ((ofs >> nand->page_shift) << nand->page_shift) +
- ((ofs & (nand->oobblock - 1)) >> 1));
- } else {
- NanD_Address(nand, ADDR_COLUMN_PAGE, ofs);
- }
-
- /* update address for 2M x 8bit devices. OOB starts on the second */
- /* page to maintain compatibility with nand_read_ecc. */
- if (nand->page256) {
- if (!(ofs & 0x8))
- ofs += 0x100;
- else
- ofs -= 0x8;
- }
-
- /* issue the Serial Data In command to initial the Page Program process */
- NanD_Command(nand, NAND_CMD_SEQIN);
- if (nand->bus16) {
- NanD_Address(nand, ADDR_COLUMN_PAGE,
- ((ofs >> nand->page_shift) << nand->page_shift) +
- ((ofs & (nand->oobblock - 1)) >> 1));
- } else {
- NanD_Address(nand, ADDR_COLUMN_PAGE, ofs);
- }
-
- /* treat crossing 8-byte OOB data for 2M x 8bit devices */
- /* Note: datasheet says it should automaticaly wrap to the */
- /* next OOB block, but it didn't work here. mf. */
- if (nand->page256 && ofs + len > (ofs | 0x7) + 1) {
- len256 = (ofs | 0x7) + 1 - ofs;
- for (i = 0; i < len256; i++)
- WRITE_NAND(buf[i], nandptr);
-
- NanD_Command(nand, NAND_CMD_PAGEPROG);
- NanD_Command(nand, NAND_CMD_STATUS);
-#ifdef NAND_NO_RB
- { u_char ret_val;
- do {
- ret_val = READ_NAND(nandptr); /* wait till ready */
- } while ((ret_val & 0x40) != 0x40);
- }
-#endif
- if (READ_NAND(nandptr) & 1) {
- puts ("Error programming oob data\n");
- /* There was an error */
- NAND_DISABLE_CE(nand); /* set pin high */
- *retlen = 0;
- return -1;
- }
- NanD_Command(nand, NAND_CMD_SEQIN);
- NanD_Address(nand, ADDR_COLUMN_PAGE, ofs & (~0x1ff));
- }
-
- if (nand->bus16) {
- for (i = len256; i < len; i += 2) {
- WRITE_NAND(buf[i] + (buf[i+1] << 8), nandptr);
- }
- } else {
- for (i = len256; i < len; i++)
- WRITE_NAND(buf[i], nandptr);
- }
-
- NanD_Command(nand, NAND_CMD_PAGEPROG);
- NanD_Command(nand, NAND_CMD_STATUS);
-#ifdef NAND_NO_RB
- { u_char ret_val;
- do {
- ret_val = READ_NAND(nandptr); /* wait till ready */
- } while ((ret_val & 0x40) != 0x40);
- }
-#endif
- if (READ_NAND(nandptr) & 1) {
- puts ("Error programming oob data\n");
- /* There was an error */
- NAND_DISABLE_CE(nand); /* set pin high */
- *retlen = 0;
- return -1;
- }
-
- NAND_DISABLE_CE(nand); /* set pin high */
- *retlen = len;
- return 0;
-
-}
-
-int nand_erase(struct nand_chip* nand, size_t ofs, size_t len, int clean)
-{
- /* This is defined as a structure so it will work on any system
- * using native endian jffs2 (the default).
- */
- static struct jffs2_unknown_node clean_marker = {
- JFFS2_MAGIC_BITMASK,
- JFFS2_NODETYPE_CLEANMARKER,
- 8 /* 8 bytes in this node */
- };
- unsigned long nandptr;
- struct Nand *mychip;
- int ret = 0;
-
- if (ofs & (nand->erasesize-1) || len & (nand->erasesize-1)) {
- printf ("Offset and size must be sector aligned, erasesize = %d\n",
- (int) nand->erasesize);
- return -1;
- }
-
- nandptr = nand->IO_ADDR;
-
- /* Select the NAND device */
-#ifdef CONFIG_OMAP1510
- archflashwp(0,0);
-#endif
-#ifdef CFG_NAND_WP
- NAND_WP_OFF();
-#endif
- NAND_ENABLE_CE(nand); /* set pin low */
-
- /* Check the WP bit */
- NanD_Command(nand, NAND_CMD_STATUS);
- if (!(READ_NAND(nand->IO_ADDR) & 0x80)) {
- printf ("nand_write_ecc: Device is write protected!!!\n");
- ret = -1;
- goto out;
- }
-
- /* Check the WP bit */
- NanD_Command(nand, NAND_CMD_STATUS);
- if (!(READ_NAND(nand->IO_ADDR) & 0x80)) {
- printf ("%s: Device is write protected!!!\n", __FUNCTION__);
- ret = -1;
- goto out;
- }
-
- /* FIXME: Do nand in the background. Use timers or schedule_task() */
- while(len) {
- /*mychip = &nand->chips[shr(ofs, nand->chipshift)];*/
- mychip = &nand->chips[ofs >> nand->chipshift];
-
- /* always check for bad block first, genuine bad blocks
- * should _never_ be erased.
- */
- if (ALLOW_ERASE_BAD_DEBUG || !check_block(nand, ofs)) {
- /* Select the NAND device */
- NAND_ENABLE_CE(nand); /* set pin low */
-
- NanD_Command(nand, NAND_CMD_ERASE1);
- NanD_Address(nand, ADDR_PAGE, ofs);
- NanD_Command(nand, NAND_CMD_ERASE2);
-
- NanD_Command(nand, NAND_CMD_STATUS);
-
-#ifdef NAND_NO_RB
- { u_char ret_val;
- do {
- ret_val = READ_NAND(nandptr); /* wait till ready */
- } while ((ret_val & 0x40) != 0x40);
- }
-#endif
- if (READ_NAND(nandptr) & 1) {
- printf ("%s: Error erasing at 0x%lx\n",
- __FUNCTION__, (long)ofs);
- /* There was an error */
- ret = -1;
- goto out;
- }
- if (clean) {
- int n; /* return value not used */
- int p, l;
-
- /* clean marker position and size depend
- * on the page size, since 256 byte pages
- * only have 8 bytes of oob data
- */
- if (nand->page256) {
- p = NAND_JFFS2_OOB8_FSDAPOS;
- l = NAND_JFFS2_OOB8_FSDALEN;
- } else {
- p = NAND_JFFS2_OOB16_FSDAPOS;
- l = NAND_JFFS2_OOB16_FSDALEN;
- }
-
- ret = nand_write_oob(nand, ofs + p, l, (size_t *)&n,
- (u_char *)&clean_marker);
- /* quit here if write failed */
- if (ret)
- goto out;
- }
- }
- ofs += nand->erasesize;
- len -= nand->erasesize;
- }
-
-out:
- /* De-select the NAND device */
- NAND_DISABLE_CE(nand); /* set pin high */
-#ifdef CONFIG_OMAP1510
- archflashwp(0,1);
-#endif
-#ifdef CFG_NAND_WP
- NAND_WP_ON();
-#endif
-
- return ret;
-}
-
-static inline int nandcheck(unsigned long potential, unsigned long physadr)
-{
- return 0;
-}
-
-unsigned long nand_probe(unsigned long physadr)
-{
- struct nand_chip *nand = NULL;
- int i = 0, ChipID = 1;
-
-#ifdef CONFIG_MTD_NAND_ECC_JFFS2
- oob_config.ecc_pos[0] = NAND_JFFS2_OOB_ECCPOS0;
- oob_config.ecc_pos[1] = NAND_JFFS2_OOB_ECCPOS1;
- oob_config.ecc_pos[2] = NAND_JFFS2_OOB_ECCPOS2;
- oob_config.ecc_pos[3] = NAND_JFFS2_OOB_ECCPOS3;
- oob_config.ecc_pos[4] = NAND_JFFS2_OOB_ECCPOS4;
- oob_config.ecc_pos[5] = NAND_JFFS2_OOB_ECCPOS5;
- oob_config.eccvalid_pos = 4;
-#else
- oob_config.ecc_pos[0] = NAND_NOOB_ECCPOS0;
- oob_config.ecc_pos[1] = NAND_NOOB_ECCPOS1;
- oob_config.ecc_pos[2] = NAND_NOOB_ECCPOS2;
- oob_config.ecc_pos[3] = NAND_NOOB_ECCPOS3;
- oob_config.ecc_pos[4] = NAND_NOOB_ECCPOS4;
- oob_config.ecc_pos[5] = NAND_NOOB_ECCPOS5;
- oob_config.eccvalid_pos = NAND_NOOB_ECCVPOS;
-#endif
- oob_config.badblock_pos = 5;
-
- for (i=0; i<CFG_MAX_NAND_DEVICE; i++) {
- if (nand_dev_desc[i].ChipID == NAND_ChipID_UNKNOWN) {
- nand = &nand_dev_desc[i];
- break;
- }
- }
- if (!nand)
- return (0);
-
- memset((char *)nand, 0, sizeof(struct nand_chip));
-
- nand->IO_ADDR = physadr;
- nand->cache_page = -1; /* init the cache page */
- NanD_ScanChips(nand);
-
- if (nand->totlen == 0) {
- /* no chips found, clean up and quit */
- memset((char *)nand, 0, sizeof(struct nand_chip));
- nand->ChipID = NAND_ChipID_UNKNOWN;
- return (0);
- }
-
- nand->ChipID = ChipID;
- if (curr_device == -1)
- curr_device = i;
-
- nand->data_buf = malloc (nand->oobblock + nand->oobsize);
- if (!nand->data_buf) {
- puts ("Cannot allocate memory for data structures.\n");
- return (0);
- }
-
- return (nand->totlen);
-}
-
-#ifdef CONFIG_MTD_NAND_ECC
-/*
- * Pre-calculated 256-way 1 byte column parity
- */
-static const u_char nand_ecc_precalc_table[] = {
- 0x00, 0x55, 0x56, 0x03, 0x59, 0x0c, 0x0f, 0x5a,
- 0x5a, 0x0f, 0x0c, 0x59, 0x03, 0x56, 0x55, 0x00,
- 0x65, 0x30, 0x33, 0x66, 0x3c, 0x69, 0x6a, 0x3f,
- 0x3f, 0x6a, 0x69, 0x3c, 0x66, 0x33, 0x30, 0x65,
- 0x66, 0x33, 0x30, 0x65, 0x3f, 0x6a, 0x69, 0x3c,
- 0x3c, 0x69, 0x6a, 0x3f, 0x65, 0x30, 0x33, 0x66,
- 0x03, 0x56, 0x55, 0x00, 0x5a, 0x0f, 0x0c, 0x59,
- 0x59, 0x0c, 0x0f, 0x5a, 0x00, 0x55, 0x56, 0x03,
- 0x69, 0x3c, 0x3f, 0x6a, 0x30, 0x65, 0x66, 0x33,
- 0x33, 0x66, 0x65, 0x30, 0x6a, 0x3f, 0x3c, 0x69,
- 0x0c, 0x59, 0x5a, 0x0f, 0x55, 0x00, 0x03, 0x56,
- 0x56, 0x03, 0x00, 0x55, 0x0f, 0x5a, 0x59, 0x0c,
- 0x0f, 0x5a, 0x59, 0x0c, 0x56, 0x03, 0x00, 0x55,
- 0x55, 0x00, 0x03, 0x56, 0x0c, 0x59, 0x5a, 0x0f,
- 0x6a, 0x3f, 0x3c, 0x69, 0x33, 0x66, 0x65, 0x30,
- 0x30, 0x65, 0x66, 0x33, 0x69, 0x3c, 0x3f, 0x6a,
- 0x6a, 0x3f, 0x3c, 0x69, 0x33, 0x66, 0x65, 0x30,
- 0x30, 0x65, 0x66, 0x33, 0x69, 0x3c, 0x3f, 0x6a,
- 0x0f, 0x5a, 0x59, 0x0c, 0x56, 0x03, 0x00, 0x55,
- 0x55, 0x00, 0x03, 0x56, 0x0c, 0x59, 0x5a, 0x0f,
- 0x0c, 0x59, 0x5a, 0x0f, 0x55, 0x00, 0x03, 0x56,
- 0x56, 0x03, 0x00, 0x55, 0x0f, 0x5a, 0x59, 0x0c,
- 0x69, 0x3c, 0x3f, 0x6a, 0x30, 0x65, 0x66, 0x33,
- 0x33, 0x66, 0x65, 0x30, 0x6a, 0x3f, 0x3c, 0x69,
- 0x03, 0x56, 0x55, 0x00, 0x5a, 0x0f, 0x0c, 0x59,
- 0x59, 0x0c, 0x0f, 0x5a, 0x00, 0x55, 0x56, 0x03,
- 0x66, 0x33, 0x30, 0x65, 0x3f, 0x6a, 0x69, 0x3c,
- 0x3c, 0x69, 0x6a, 0x3f, 0x65, 0x30, 0x33, 0x66,
- 0x65, 0x30, 0x33, 0x66, 0x3c, 0x69, 0x6a, 0x3f,
- 0x3f, 0x6a, 0x69, 0x3c, 0x66, 0x33, 0x30, 0x65,
- 0x00, 0x55, 0x56, 0x03, 0x59, 0x0c, 0x0f, 0x5a,
- 0x5a, 0x0f, 0x0c, 0x59, 0x03, 0x56, 0x55, 0x00
-};
-
-
-/*
- * Creates non-inverted ECC code from line parity
- */
-static void nand_trans_result(u_char reg2, u_char reg3,
- u_char *ecc_code)
-{
- u_char a, b, i, tmp1, tmp2;
-
- /* Initialize variables */
- a = b = 0x80;
- tmp1 = tmp2 = 0;
-
- /* Calculate first ECC byte */
- for (i = 0; i < 4; i++) {
- if (reg3 & a) /* LP15,13,11,9 --> ecc_code[0] */
- tmp1 |= b;
- b >>= 1;
- if (reg2 & a) /* LP14,12,10,8 --> ecc_code[0] */
- tmp1 |= b;
- b >>= 1;
- a >>= 1;
- }
-
- /* Calculate second ECC byte */
- b = 0x80;
- for (i = 0; i < 4; i++) {
- if (reg3 & a) /* LP7,5,3,1 --> ecc_code[1] */
- tmp2 |= b;
- b >>= 1;
- if (reg2 & a) /* LP6,4,2,0 --> ecc_code[1] */
- tmp2 |= b;
- b >>= 1;
- a >>= 1;
- }
-
- /* Store two of the ECC bytes */
- ecc_code[0] = tmp1;
- ecc_code[1] = tmp2;
-}
-
-/*
- * Calculate 3 byte ECC code for 256 byte block
- */
-static void nand_calculate_ecc (const u_char *dat, u_char *ecc_code)
-{
- u_char idx, reg1, reg3;
- int j;
-
- /* Initialize variables */
- reg1 = reg3 = 0;
- ecc_code[0] = ecc_code[1] = ecc_code[2] = 0;
-
- /* Build up column parity */
- for(j = 0; j < 256; j++) {
-
- /* Get CP0 - CP5 from table */
- idx = nand_ecc_precalc_table[dat[j]];
- reg1 ^= idx;
-
- /* All bit XOR = 1 ? */
- if (idx & 0x40) {
- reg3 ^= (u_char) j;
- }
- }
-
- /* Create non-inverted ECC code from line parity */
- nand_trans_result((reg1 & 0x40) ? ~reg3 : reg3, reg3, ecc_code);
-
- /* Calculate final ECC code */
- ecc_code[0] = ~ecc_code[0];
- ecc_code[1] = ~ecc_code[1];
- ecc_code[2] = ((~reg1) << 2) | 0x03;
-}
-
-/*
- * Detect and correct a 1 bit error for 256 byte block
- */
-static int nand_correct_data (u_char *dat, u_char *read_ecc, u_char *calc_ecc)
-{
- u_char a, b, c, d1, d2, d3, add, bit, i;
-
- /* Do error detection */
- d1 = calc_ecc[0] ^ read_ecc[0];
- d2 = calc_ecc[1] ^ read_ecc[1];
- d3 = calc_ecc[2] ^ read_ecc[2];
-
- if ((d1 | d2 | d3) == 0) {
- /* No errors */
- return 0;
- } else {
- a = (d1 ^ (d1 >> 1)) & 0x55;
- b = (d2 ^ (d2 >> 1)) & 0x55;
- c = (d3 ^ (d3 >> 1)) & 0x54;
-
- /* Found and will correct single bit error in the data */
- if ((a == 0x55) && (b == 0x55) && (c == 0x54)) {
- c = 0x80;
- add = 0;
- a = 0x80;
- for (i=0; i<4; i++) {
- if (d1 & c)
- add |= a;
- c >>= 2;
- a >>= 1;
- }
- c = 0x80;
- for (i=0; i<4; i++) {
- if (d2 & c)
- add |= a;
- c >>= 2;
- a >>= 1;
- }
- bit = 0;
- b = 0x04;
- c = 0x80;
- for (i=0; i<3; i++) {
- if (d3 & c)
- bit |= b;
- c >>= 2;
- b >>= 1;
- }
- b = 0x01;
- a = dat[add];
- a ^= (b << bit);
- dat[add] = a;
- return 1;
- }
- else {
- i = 0;
- while (d1) {
- if (d1 & 0x01)
- ++i;
- d1 >>= 1;
- }
- while (d2) {
- if (d2 & 0x01)
- ++i;
- d2 >>= 1;
- }
- while (d3) {
- if (d3 & 0x01)
- ++i;
- d3 >>= 1;
- }
- if (i == 1) {
- /* ECC Code Error Correction */
- read_ecc[0] = calc_ecc[0];
- read_ecc[1] = calc_ecc[1];
- read_ecc[2] = calc_ecc[2];
- return 2;
- }
- else {
- /* Uncorrectable Error */
- return -1;
- }
- }
- }
-
- /* Should never happen */
- return -1;
-}
-
-#endif
-
-#ifdef CONFIG_JFFS2_NAND
-
-int read_jffs2_nand(size_t start, size_t len,
- size_t * retlen, u_char * buf, int nanddev)
-{
- return nand_rw(nand_dev_desc + nanddev, NANDRW_READ | NANDRW_JFFS2,
- start, len, retlen, buf);
-}
-
-#endif /* CONFIG_JFFS2_NAND */
-
-
#endif /* (CONFIG_COMMANDS & CFG_CMD_NAND) */
+
+#endif /* CFG_NAND_LEGACY */
diff --git a/common/cmd_nvedit.c b/common/cmd_nvedit.c
index 1babffec2e..6257fbd23e 100644
--- a/common/cmd_nvedit.c
+++ b/common/cmd_nvedit.c
@@ -50,6 +50,8 @@
#include <net.h>
#endif
+DECLARE_GLOBAL_DATA_PTR;
+
#if !defined(CFG_ENV_IS_IN_NVRAM) && \
!defined(CFG_ENV_IS_IN_EEPROM) && \
!defined(CFG_ENV_IS_IN_FLASH) && \
@@ -152,8 +154,6 @@ int do_printenv (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
int _do_setenv (int flag, int argc, char *argv[])
{
- DECLARE_GLOBAL_DATA_PTR;
-
int i, len, oldval;
int console = -1;
uchar *env, *nxt = NULL;
@@ -532,7 +532,9 @@ int getenv_r (char *name, char *buf, unsigned len)
#if defined(CFG_ENV_IS_IN_NVRAM) || defined(CFG_ENV_IS_IN_EEPROM) || \
((CONFIG_COMMANDS & (CFG_CMD_ENV|CFG_CMD_FLASH)) == \
- (CFG_CMD_ENV|CFG_CMD_FLASH))
+ (CFG_CMD_ENV|CFG_CMD_FLASH)) || \
+ ((CONFIG_COMMANDS & (CFG_CMD_ENV|CFG_CMD_NAND)) == \
+ (CFG_CMD_ENV|CFG_CMD_NAND))
int do_saveenv (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
extern char * env_name_spec;
@@ -588,7 +590,9 @@ U_BOOT_CMD(
#if defined(CFG_ENV_IS_IN_NVRAM) || defined(CFG_ENV_IS_IN_EEPROM) || \
((CONFIG_COMMANDS & (CFG_CMD_ENV|CFG_CMD_FLASH)) == \
- (CFG_CMD_ENV|CFG_CMD_FLASH))
+ (CFG_CMD_ENV|CFG_CMD_FLASH)) || \
+ ((CONFIG_COMMANDS & (CFG_CMD_ENV|CFG_CMD_NAND)) == \
+ (CFG_CMD_ENV|CFG_CMD_NAND))
U_BOOT_CMD(
saveenv, 1, 0, do_saveenv,
"saveenv - save environment variables to persistent storage\n",
diff --git a/common/cmd_onenand.c b/common/cmd_onenand.c
new file mode 100644
index 0000000000..08cb054430
--- /dev/null
+++ b/common/cmd_onenand.c
@@ -0,0 +1,194 @@
+/*
+ * U-Boot command for OneNAND support
+ *
+ * Copyright (C) 2005 Samsung Electronics
+ * Kyungmin Park <kyungmin.park@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <common.h>
+#include <command.h>
+
+#if (CONFIG_COMMANDS & CFG_CMD_ONENAND)
+
+#include <linux/mtd/onenand.h>
+
+extern struct mtd_info onenand_mtd;
+extern struct onenand_chip onenand_chip;
+
+int do_onenand(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+ int ret = 0;
+
+ switch (argc) {
+ case 0:
+ case 1:
+ printf("Usage:\n%s\n", cmdtp->usage);
+ return 1;
+
+ case 2:
+ onenand_print_device_info(onenand_chip.device_id, 1);
+ return 0;
+
+ default:
+ /* At least 4 args */
+ if (strncmp(argv[1], "erase", 5) == 0) {
+ struct erase_info instr;
+ ulong start, end;
+ char *endtail;
+ ulong block;
+
+ if (strncmp(argv[2], "block", 5) == 0) {
+ start = simple_strtoul(argv[3], NULL, 10);
+ endtail = strchr(argv[3], '-');
+ end = simple_strtoul(endtail+1, NULL, 10);
+ } else {
+ start = simple_strtoul(argv[2], NULL, 10);
+ end = simple_strtoul(argv[3], NULL, 10);
+ start -= (unsigned long) onenand_chip.base;
+ end -= (unsigned long) onenand_chip.base;
+ }
+
+ if (!end || end < 0)
+ end = start;
+
+ printf("Erase block from %d to %d\n", start, end);
+
+ for (block = start; block <= end; block++) {
+ instr.addr = block << onenand_chip.erase_shift;
+ instr.len = 1 << onenand_chip.erase_shift;
+ ret = onenand_erase(&onenand_mtd, &instr);
+ if (ret) {
+ printf("erase failed %d\n", block);
+ break;
+ }
+ }
+
+ return 0;
+ }
+
+ if (strncmp(argv[1], "read", 4) == 0) {
+ ulong addr = simple_strtoul(argv[2], NULL, 16);
+ ulong ofs = simple_strtoul(argv[3], NULL, 16);
+ size_t len = simple_strtoul(argv[4], NULL, 16);
+ size_t retlen = 0;
+ int oob = strncmp(argv[1], "read.oob", 8) ? 0 : 1;
+
+
+ if (oob)
+ onenand_read_oob(&onenand_mtd, ofs, len, &retlen, (u_char *) addr);
+ else
+ onenand_read(&onenand_mtd, ofs, len, &retlen, (u_char *) addr);
+ printf("Done\n");
+
+ return 0;
+ }
+
+ if (strncmp(argv[1], "write", 5) == 0) {
+ int ret ;
+ ulong addr = simple_strtoul(argv[2], NULL, 16);
+ ulong ofs = simple_strtoul(argv[3], NULL, 16);
+ size_t len = simple_strtoul(argv[4], NULL, 16);
+ size_t retlen = 0;
+
+ printf("onenadwrite: addr = 0x%x, ofs = 0x%x, len = 0x%x\n", addr, ofs, len);
+ ret = onenand_write(&onenand_mtd, ofs, len, &retlen, (u_char *) addr);
+ if (ret)
+ printf("Error writing oneNAND: ret = %d\n", ret);
+ else
+ printf("Done. ret = %d\n", ret);
+
+ return 0;
+ }
+
+ if (strncmp(argv[1], "block", 5) == 0) {
+ ulong addr = simple_strtoul(argv[2], NULL, 16);
+ ulong block = simple_strtoul(argv[3], NULL, 10);
+ ulong page = simple_strtoul(argv[4], NULL, 10);
+ size_t len = simple_strtol(argv[5], NULL, 10);
+ size_t retlen = 0;
+ ulong ofs;
+ int oob = strncmp(argv[1], "block.oob", 9) ? 0 : 1;
+
+ ofs = block << onenand_chip.erase_shift;
+ if (page)
+ ofs += page << onenand_chip.page_shift;
+
+ if (!len) {
+ if (oob)
+ len = 64;
+ else
+ len = 512;
+ }
+
+ if (oob)
+ onenand_read_oob(&onenand_mtd, ofs, len, &retlen, (u_char *) addr);
+ else
+ onenand_read(&onenand_mtd, ofs, len, &retlen, (u_char *) addr);
+ return 0;
+ }
+
+ if (strncmp(argv[1], "unlock", 6) == 0) {
+ ulong start = simple_strtoul(argv[2], NULL, 10);
+ ulong ofs = simple_strtoul(argv[3], NULL, 10);
+
+ if (!ofs)
+ ofs = (1 << onenand_chip.erase_shift);
+
+ start = start << onenand_chip.erase_shift;
+ printf("start = 0x%08x, ofs = 0x%08x\n",
+ start, ofs);
+ onenand_unlock(&onenand_mtd, start, start + ofs);
+
+ return 0;
+ }
+
+ if (strncmp(argv[1], "save", 4) == 0 &&
+ strncmp(argv[2], "bootloader", 10) == 0) {
+ ulong addr = simple_strtoul(argv[3], NULL, 16);
+ struct erase_info instr;
+ int ofs = 0;
+ int len = 0x20000;
+ size_t retlen;
+
+ printf("save bootloader...\n");
+
+ if (!addr)
+ break;
+
+ onenand_unlock(&onenand_mtd, ofs, len);
+
+ instr.addr = 0 << onenand_chip.erase_shift;
+ instr.len = 1 << onenand_chip.erase_shift;
+ onenand_erase(&onenand_mtd, &instr);
+
+ onenand_write(&onenand_mtd, ofs, len, &retlen, (u_char *) addr);
+ onenand_unlock(&onenand_mtd, CFG_ENV_ADDR, onenand_mtd.size - CFG_ENV_ADDR);
+ return 0;
+ }
+
+ break;
+ }
+
+ return 0;
+}
+
+U_BOOT_CMD(
+ onenand, 6, 1, do_onenand,
+ "onenand - OneNAND sub-system\n",
+ "info - show available OneNAND devices\n"
+ "onenand read[.oob] addr ofs len - read data at ofs with len to addr\n"
+ "onenand write addr ofs len - write data at ofs with len from addr\n"
+ "onenand erase block start-end - erase block from start to end\n"
+ "onenand erase saddr eaddr - erase block start addr to end addr\n"
+ "onenand block[.oob] addr block [page] [len] - "
+ "read data with (block [, page]) to addr\n"
+ "onenand unlock start-end - unlock block from start to end\n"
+ "onenand save bootloader addr - save bootloader at addr\n"
+);
+
+#endif /* (CONFIG_COMMANDS & CFG_CMD_ONENAND) */
+
diff --git a/common/cmd_pcmcia.c b/common/cmd_pcmcia.c
index 62446d4efe..2eb5b26f2c 100644
--- a/common/cmd_pcmcia.c
+++ b/common/cmd_pcmcia.c
@@ -1,5 +1,5 @@
/*
- * (C) Copyright 2000-2004
+ * (C) Copyright 2000-2006
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
@@ -57,75 +57,14 @@
#include <command.h>
#include <config.h>
#include <pcmcia.h>
-#if defined(CONFIG_8xx)
-#include <mpc8xx.h>
-#endif
-#if defined(CONFIG_LWMON)
-#include <i2c.h>
-#endif
-#ifdef CONFIG_PXA_PCMCIA
-#include <asm/arch/pxa-regs.h>
-#endif
-
#include <asm/io.h>
-#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA) || \
- ((CONFIG_COMMANDS & CFG_CMD_IDE) && defined(CONFIG_IDE_8xx_PCCARD))
-
-int pcmcia_on (void);
-
-#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
-static int pcmcia_off (void);
-#endif
-
-#ifdef CONFIG_I82365
-
-extern int i82365_init (void);
-extern void i82365_exit (void);
-
-#else /* ! CONFIG_I82365 */
-
-#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
-static int hardware_disable(int slot);
-#endif
-static int hardware_enable (int slot);
-static int voltage_set(int slot, int vcc, int vpp);
-
-#if (! defined(CONFIG_I82365)) && (! defined(CONFIG_PXA_PCMCIA))
-static u_int m8xx_get_graycode(u_int size);
-#endif /* !CONFIG_I82365, !CONFIG_PXA_PCMCIA */
-#if 0
-static u_int m8xx_get_speed(u_int ns, u_int is_io);
-#endif
-
/* -------------------------------------------------------------------- */
-#ifndef CONFIG_PXA_PCMCIA
+#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
-/* look up table for pgcrx registers */
-
-static u_int *pcmcia_pgcrx[2] = {
- &((immap_t *)CFG_IMMR)->im_pcmcia.pcmc_pgcra,
- &((immap_t *)CFG_IMMR)->im_pcmcia.pcmc_pgcrb,
-};
-#define PCMCIA_PGCRX(slot) (*pcmcia_pgcrx[slot])
-
-#endif /* CONFIG_PXA_PCMCIA */
-
-#endif /* CONFIG_I82365 */
-
-#if defined(CONFIG_IDE_8xx_PCCARD) || defined(CONFIG_PXA_PCMCIA)
-static void print_funcid (int func);
-static void print_fixed (volatile uchar *p);
-static int identify (volatile uchar *p);
-static int check_ide_device (int slot);
-#endif /* CONFIG_IDE_8xx_PCCARD, CONFIG_PXA_PCMCIA */
-
-const char *indent = "\t ";
-
-/* -------------------------------------------------------------------- */
-
-#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
+extern int pcmcia_on (void);
+extern int pcmcia_off (void);
int do_pinit (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
@@ -136,7 +75,7 @@ int do_pinit (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
return 1;
}
if (strcmp(argv[1],"on") == 0) {
- rcode = pcmcia_on ();
+ rcode = pcmcia_on ();
} else if (strcmp(argv[1],"off") == 0) {
rcode = pcmcia_off ();
} else {
@@ -146,2478 +85,82 @@ int do_pinit (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
return rcode;
}
-#endif /* CFG_CMD_PCMCIA */
-
-/* -------------------------------------------------------------------- */
-#ifdef CONFIG_I82365
-int pcmcia_on (void)
-{
- u_int rc;
-
- debug ("Enable PCMCIA " PCMCIA_SLOT_MSG "\n");
-
- rc = i82365_init();
+U_BOOT_CMD(
+ pinit, 2, 1, do_pinit,
+ "pinit - PCMCIA sub-system\n",
+ "on - power on PCMCIA socket\n"
+ "pinit off - power off PCMCIA socket\n"
+ );
- if (rc == 0) {
- rc = check_ide_device(0);
- }
+#endif /* CONFIG_COMMANDS & CFG_CMD_PCMCIA */
- return (rc);
-}
-#else
+/* -------------------------------------------------------------------- */
-#ifndef CONFIG_PXA_PCMCIA
+#undef CHECK_IDE_DEVICE
-#ifdef CONFIG_HMI10
-# define HMI10_FRAM_TIMING (PCMCIA_SHT(2) | PCMCIA_SST(2) | PCMCIA_SL(4))
+#if (CONFIG_COMMANDS & CFG_CMD_IDE) && defined(CONFIG_IDE_8xx_PCCARD)
+#define CHECK_IDE_DEVICE
#endif
-#if defined(CONFIG_LWMON) || defined(CONFIG_NSCU)
-# define CFG_PCMCIA_TIMING (PCMCIA_SHT(9) | PCMCIA_SST(3) | PCMCIA_SL(12))
-#else
-# define CFG_PCMCIA_TIMING (PCMCIA_SHT(2) | PCMCIA_SST(4) | PCMCIA_SL(9))
+
+#if defined(CONFIG_PXA_PCMCIA)
+#define CHECK_IDE_DEVICE
#endif
-int pcmcia_on (void)
-{
- int i;
- u_long reg, base;
- pcmcia_win_t *win;
- u_int slotbit;
- u_int rc, slot;
+#ifdef CHECK_IDE_DEVICE
- debug ("Enable PCMCIA " PCMCIA_SLOT_MSG "\n");
+int ide_devices_found;
+static uchar *known_cards[] = {
+ (uchar *)"ARGOSY PnPIDE D5",
+ NULL
+};
- /* intialize the fixed memory windows */
- win = (pcmcia_win_t *)(&((immap_t *)CFG_IMMR)->im_pcmcia.pcmc_pbr0);
- base = CFG_PCMCIA_MEM_ADDR;
+#define MAX_TUPEL_SZ 512
+#define MAX_FEATURES 4
- if((reg = m8xx_get_graycode(CFG_PCMCIA_MEM_SIZE)) == -1) {
- printf ("Cannot set window size to 0x%08x\n",
- CFG_PCMCIA_MEM_SIZE);
- return (1);
- }
+#define MAX_IDENT_CHARS 64
+#define MAX_IDENT_FIELDS 4
- slotbit = PCMCIA_SLOT_x;
- for (i=0; i<PCMCIA_MEM_WIN_NO; ++i) {
- win->br = base;
+#define indent "\t "
-#if (PCMCIA_SOCKETS_NO == 2)
- if (i == 4) /* Another slot starting from win 4 */
- slotbit = (slotbit ? PCMCIA_PSLOT_A : PCMCIA_PSLOT_B);
-#endif
- switch (i) {
-#ifdef CONFIG_IDE_8xx_PCCARD
- case 4:
-#ifdef CONFIG_HMI10
- { /* map FRAM area */
- win->or = ( PCMCIA_BSIZE_256K
- | PCMCIA_PPS_8
- | PCMCIA_PRS_ATTR
- | slotbit
- | PCMCIA_PV
- | HMI10_FRAM_TIMING );
- break;
- }
-#endif
- case 0: { /* map attribute memory */
- win->or = ( PCMCIA_BSIZE_64M
- | PCMCIA_PPS_8
- | PCMCIA_PRS_ATTR
- | slotbit
- | PCMCIA_PV
- | CFG_PCMCIA_TIMING );
+static void print_funcid (int func)
+{
+ puts (indent);
+ switch (func) {
+ case CISTPL_FUNCID_MULTI:
+ puts (" Multi-Function");
break;
- }
- case 5:
- case 1: { /* map I/O window for data reg */
- win->or = ( PCMCIA_BSIZE_1K
- | PCMCIA_PPS_16
- | PCMCIA_PRS_IO
- | slotbit
- | PCMCIA_PV
- | CFG_PCMCIA_TIMING );
+ case CISTPL_FUNCID_MEMORY:
+ puts (" Memory");
break;
- }
- case 6:
- case 2: { /* map I/O window for cmd/ctrl reg block */
- win->or = ( PCMCIA_BSIZE_1K
- | PCMCIA_PPS_8
- | PCMCIA_PRS_IO
- | slotbit
- | PCMCIA_PV
- | CFG_PCMCIA_TIMING );
+ case CISTPL_FUNCID_SERIAL:
+ puts (" Serial Port");
break;
- }
-#endif /* CONFIG_IDE_8xx_PCCARD */
-#ifdef CONFIG_HMI10
- case 3: { /* map I/O window for 4xUART data/ctrl */
- win->br += 0x40000;
- win->or = ( PCMCIA_BSIZE_256K
- | PCMCIA_PPS_8
- | PCMCIA_PRS_IO
- | slotbit
- | PCMCIA_PV
- | CFG_PCMCIA_TIMING );
+ case CISTPL_FUNCID_PARALLEL:
+ puts (" Parallel Port");
break;
- }
-#endif /* CONFIG_HMI10 */
- default: /* set to not valid */
- win->or = 0;
+ case CISTPL_FUNCID_FIXED:
+ puts (" Fixed Disk");
break;
- }
-
- debug ("MemWin %d: PBR 0x%08lX POR %08lX\n",
- i, win->br, win->or);
- base += CFG_PCMCIA_MEM_SIZE;
- ++win;
- }
-
- for (i=0, rc=0, slot=_slot_; i<PCMCIA_SOCKETS_NO; i++, slot = !slot) {
- /* turn off voltage */
- if ((rc = voltage_set(slot, 0, 0)))
- continue;
-
- /* Enable external hardware */
- if ((rc = hardware_enable(slot)))
- continue;
-
-#ifdef CONFIG_IDE_8xx_PCCARD
- if ((rc = check_ide_device(i)))
- continue;
-#endif
- }
- return (rc);
-}
-
-#endif /* CONFIG_PXA_PCMCIA */
-
-#endif /* CONFIG_I82365 */
-
-#ifdef CONFIG_PXA_PCMCIA
-
-static int hardware_enable (int slot)
-{
- return 0; /* No hardware to enable */
-}
-
-static int hardware_disable(int slot)
-{
- return 0; /* No hardware to disable */
-}
-
-static int voltage_set(int slot, int vcc, int vpp)
-{
- return 0;
-}
-
-void msWait(unsigned msVal)
-{
- udelay(msVal*1000);
-}
-
-int pcmcia_on (void)
-{
- unsigned int reg_arr[] = {
- 0x48000028, CFG_MCMEM0_VAL,
- 0x4800002c, CFG_MCMEM1_VAL,
- 0x48000030, CFG_MCATT0_VAL,
- 0x48000034, CFG_MCATT1_VAL,
- 0x48000038, CFG_MCIO0_VAL,
- 0x4800003c, CFG_MCIO1_VAL,
-
- 0, 0
- };
- int i, rc;
-
-#ifdef CONFIG_EXADRON1
- int cardDetect;
- volatile unsigned int *v_pBCRReg =
- (volatile unsigned int *) 0x08000000;
-#endif
-
- debug ("%s\n", __FUNCTION__);
-
- i = 0;
- while (reg_arr[i])
- *((volatile unsigned int *) reg_arr[i++]) |= reg_arr[i++];
- udelay (1000);
-
- debug ("%s: programmed mem controller \n", __FUNCTION__);
-
-#ifdef CONFIG_EXADRON1
-
-/*define useful BCR masks */
-#define BCR_CF_INIT_VAL 0x00007230
-#define BCR_CF_PWRON_BUSOFF_RESETOFF_VAL 0x00007231
-#define BCR_CF_PWRON_BUSOFF_RESETON_VAL 0x00007233
-#define BCR_CF_PWRON_BUSON_RESETON_VAL 0x00007213
-#define BCR_CF_PWRON_BUSON_RESETOFF_VAL 0x00007211
-
- /* we see from the GPIO bit if the card is present */
- cardDetect = !(GPLR0 & GPIO_bit (14));
-
- if (cardDetect) {
- printf ("No PCMCIA card found!\n");
- }
-
- /* reset the card via the BCR line */
- *v_pBCRReg = (unsigned) BCR_CF_INIT_VAL;
- msWait (500);
-
- *v_pBCRReg = (unsigned) BCR_CF_PWRON_BUSOFF_RESETOFF_VAL;
- msWait (500);
-
- *v_pBCRReg = (unsigned) BCR_CF_PWRON_BUSOFF_RESETON_VAL;
- msWait (500);
-
- *v_pBCRReg = (unsigned) BCR_CF_PWRON_BUSON_RESETON_VAL;
- msWait (500);
-
- *v_pBCRReg = (unsigned) BCR_CF_PWRON_BUSON_RESETOFF_VAL;
- msWait (1500);
-
- /* enable address bus */
- GPCR1 = 0x01;
- /* and the first CF slot */
- MECR = 0x00000002;
-
-#endif /* EXADRON 1 */
-
- rc = check_ide_device (0); /* use just slot 0 */
-
- return rc;
-}
-
-#endif /* CONFIG_PXA_PCMCIA */
-
-/* -------------------------------------------------------------------- */
-
-#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
-
-#ifdef CONFIG_I82365
-static int pcmcia_off (void)
-{
- printf ("Disable PCMCIA " PCMCIA_SLOT_MSG "\n");
-
- i82365_exit();
-
- return 0;
-}
-#else
-
-#ifndef CONFIG_PXA_PCMCIA
-
-static int pcmcia_off (void)
-{
- int i;
- pcmcia_win_t *win;
-
- printf ("Disable PCMCIA " PCMCIA_SLOT_MSG "\n");
-
- /* clear interrupt state, and disable interrupts */
- ((immap_t *)CFG_IMMR)->im_pcmcia.pcmc_pscr = PCMCIA_MASK(_slot_);
- ((immap_t *)CFG_IMMR)->im_pcmcia.pcmc_per &= ~PCMCIA_MASK(_slot_);
-
- /* turn off interrupt and disable CxOE */
- PCMCIA_PGCRX(_slot_) = __MY_PCMCIA_GCRX_CXOE;
-
- /* turn off memory windows */
- win = (pcmcia_win_t *)(&((immap_t *)CFG_IMMR)->im_pcmcia.pcmc_pbr0);
-
- for (i=0; i<PCMCIA_MEM_WIN_NO; ++i) {
- /* disable memory window */
- win->or = 0;
- ++win;
- }
-
- /* turn off voltage */
- voltage_set(_slot_, 0, 0);
-
- /* disable external hardware */
- printf ("Shutdown and Poweroff " PCMCIA_SLOT_MSG "\n");
- hardware_disable(_slot_);
- return 0;
-}
-
-#endif /* CONFIG_PXA_PCMCIA */
-
-#endif /* CONFIG_I82365 */
-
-#ifdef CONFIG_PXA_PCMCIA
-static int pcmcia_off (void)
-{
- return 0;
-}
-#endif
-
-#endif /* CFG_CMD_PCMCIA */
-
-/* -------------------------------------------------------------------- */
-
-#if defined(CONFIG_IDE_8xx_PCCARD) || defined(CONFIG_PXA_PCMCIA)
-
-#define MAX_TUPEL_SZ 512
-#define MAX_FEATURES 4
-
-int ide_devices_found;
-static int check_ide_device (int slot)
-{
- volatile uchar *ident = NULL;
- volatile uchar *feature_p[MAX_FEATURES];
- volatile uchar *p, *start, *addr;
- int n_features = 0;
- uchar func_id = ~0;
- uchar code, len;
- ushort config_base = 0;
- int found = 0;
- int i;
-
- addr = (volatile uchar *)(CFG_PCMCIA_MEM_ADDR +
- CFG_PCMCIA_MEM_SIZE * (slot * 4));
- debug ("PCMCIA MEM: %08lX\n", (ulong)addr);
-
- start = p = (volatile uchar *) addr;
-
- while ((p - start) < MAX_TUPEL_SZ) {
-
- code = *p; p += 2;
-
- if (code == 0xFF) { /* End of chain */
+ case CISTPL_FUNCID_VIDEO:
+ puts (" Video Adapter");
break;
- }
-
- len = *p; p += 2;
-#if defined(DEBUG) && (DEBUG > 1)
- { volatile uchar *q = p;
- printf ("\nTuple code %02x length %d\n\tData:",
- code, len);
-
- for (i = 0; i < len; ++i) {
- printf (" %02x", *q);
- q+= 2;
- }
- }
-#endif /* DEBUG */
- switch (code) {
- case CISTPL_VERS_1:
- ident = p + 4;
+ case CISTPL_FUNCID_NETWORK:
+ puts (" Network Adapter");
break;
- case CISTPL_FUNCID:
- /* Fix for broken SanDisk which may have 0x80 bit set */
- func_id = *p & 0x7F;
+ case CISTPL_FUNCID_AIMS:
+ puts (" AIMS Card");
break;
- case CISTPL_FUNCE:
- if (n_features < MAX_FEATURES)
- feature_p[n_features++] = p;
+ case CISTPL_FUNCID_SCSI:
+ puts (" SCSI Adapter");
break;
- case CISTPL_CONFIG:
- config_base = (*(p+6) << 8) + (*(p+4));
- debug ("\n## Config_base = %04x ###\n", config_base);
default:
- break;
- }
- p += 2 * len;
- }
-
- found = identify (ident);
-
- if (func_id != ((uchar)~0)) {
- print_funcid (func_id);
-
- if (func_id == CISTPL_FUNCID_FIXED)
- found = 1;
- else
- return (1); /* no disk drive */
- }
-
- for (i=0; i<n_features; ++i) {
- print_fixed (feature_p[i]);
- }
-
- if (!found) {
- printf ("unknown card type\n");
- return (1);
- }
-
- ide_devices_found |= (1 << slot);
-
-#if CONFIG_CPC45
-#else
- /* set I/O area in config reg -> only valid for ARGOSY D5!!! */
- *((uchar *)(addr + config_base)) = 1;
-#endif
-#if 0
- printf("\n## Config_base = %04x ###\n", config_base);
- printf("Configuration Option Register: %02x @ %x\n", readb(addr + config_base), addr + config_base);
- printf("Card Configuration and Status Register: %02x\n", readb(addr + config_base + 2));
- printf("Pin Replacement Register Register: %02x\n", readb(addr + config_base + 4));
- printf("Socket and Copy Register: %02x\n", readb(addr + config_base + 6));
-#endif
- return (0);
-}
-#endif /* CONFIG_IDE_8xx_PCCARD */
-
-/* -------------------------------------------------------------------- */
-
-
-/* -------------------------------------------------------------------- */
-/* board specific stuff: */
-/* voltage_set(), hardware_enable() and hardware_disable() */
-/* -------------------------------------------------------------------- */
-
-/* -------------------------------------------------------------------- */
-/* RPX Boards from Embedded Planet */
-/* -------------------------------------------------------------------- */
-
-#if defined(CONFIG_RPXCLASSIC) || defined(CONFIG_RPXLITE)
-
-/* The RPX boards seems to have it's bus monitor timeout set to 6*8 clocks.
- * SYPCR is write once only, therefore must the slowest memory be faster
- * than the bus monitor or we will get a machine check due to the bus timeout.
- */
-
-#define PCMCIA_BOARD_MSG "RPX CLASSIC or RPX LITE"
-
-#undef PCMCIA_BMT_LIMIT
-#define PCMCIA_BMT_LIMIT (6*8)
-
-static int voltage_set(int slot, int vcc, int vpp)
-{
- u_long reg = 0;
-
- switch(vcc) {
- case 0: break;
- case 33: reg |= BCSR1_PCVCTL4; break;
- case 50: reg |= BCSR1_PCVCTL5; break;
- default: return 1;
- }
-
- switch(vpp) {
- case 0: break;
- case 33:
- case 50:
- if(vcc == vpp)
- reg |= BCSR1_PCVCTL6;
- else
- return 1;
- break;
- case 120:
- reg |= BCSR1_PCVCTL7;
- default: return 1;
- }
-
- if(vcc == 120)
- return 1;
-
- /* first, turn off all power */
-
- *((uint *)RPX_CSR_ADDR) &= ~(BCSR1_PCVCTL4 | BCSR1_PCVCTL5
- | BCSR1_PCVCTL6 | BCSR1_PCVCTL7);
-
- /* enable new powersettings */
-
- *((uint *)RPX_CSR_ADDR) |= reg;
-
- return 0;
-}
-
-#define socket_get(_slot_) PCMCIA_SOCKET_KEY_5V
-static int hardware_enable (int slot)
-{
- return 0; /* No hardware to enable */
-}
-#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
-static int hardware_disable(int slot)
-{
- return 0; /* No hardware to disable */
-}
-#endif /* CFG_CMD_PCMCIA */
-#endif /* CONFIG_RPXCLASSIC */
-
-/* -------------------------------------------------------------------- */
-/* (F)ADS Boards from Motorola */
-/* -------------------------------------------------------------------- */
-
-#if defined(CONFIG_ADS) || defined(CONFIG_FADS)
-
-#ifdef CONFIG_ADS
-#define PCMCIA_BOARD_MSG "ADS"
-#define PCMCIA_GLITCHY_CD /* My ADS board needs this */
-#else
-#define PCMCIA_BOARD_MSG "FADS"
-#endif
-
-static int voltage_set(int slot, int vcc, int vpp)
-{
- u_long reg = 0;
-
- switch(vpp) {
- case 0: reg = 0; break;
- case 50: reg = 1; break;
- case 120: reg = 2; break;
- default: return 1;
- }
-
- switch(vcc) {
- case 0: reg = 0; break;
-#ifdef CONFIG_ADS
- case 50: reg = BCSR1_PCCVCCON; break;
-#endif
-#ifdef CONFIG_FADS
- case 33: reg = BCSR1_PCCVCC0 | BCSR1_PCCVCC1; break;
- case 50: reg = BCSR1_PCCVCC1; break;
-#endif
- default: return 1;
- }
-
- /* first, turn off all power */
-
-#ifdef CONFIG_ADS
- *((uint *)BCSR1) |= BCSR1_PCCVCCON;
-#endif
-#ifdef CONFIG_FADS
- *((uint *)BCSR1) &= ~(BCSR1_PCCVCC0 | BCSR1_PCCVCC1);
-#endif
- *((uint *)BCSR1) &= ~BCSR1_PCCVPP_MASK;
-
- /* enable new powersettings */
-
-#ifdef CONFIG_ADS
- *((uint *)BCSR1) &= ~reg;
-#endif
-#ifdef CONFIG_FADS
- *((uint *)BCSR1) |= reg;
-#endif
-
- *((uint *)BCSR1) |= reg << 20;
-
- return 0;
-}
-
-#define socket_get(_slot_) PCMCIA_SOCKET_KEY_5V
-
-static int hardware_enable(int slot)
-{
- *((uint *)BCSR1) &= ~BCSR1_PCCEN;
- return 0;
-}
-
-#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
-static int hardware_disable(int slot)
-{
- *((uint *)BCSR1) &= ~BCSR1_PCCEN;
- return 0;
-}
-#endif /* CFG_CMD_PCMCIA */
-
-#endif /* (F)ADS */
-
-/* -------------------------------------------------------------------- */
-/* TQM8xxL Boards by TQ Components */
-/* SC8xx Boards by SinoVee Microsystems */
-/* -------------------------------------------------------------------- */
-
-#if defined(CONFIG_TQM8xxL) || defined(CONFIG_SVM_SC8xx)
-
-#if defined(CONFIG_TQM8xxL)
-#define PCMCIA_BOARD_MSG "TQM8xxL"
-#endif
-#if defined(CONFIG_SVM_SC8xx)
-#define PCMCIA_BOARD_MSG "SC8xx"
-#endif
-
-static int hardware_enable(int slot)
-{
- volatile immap_t *immap;
- volatile cpm8xx_t *cp;
- volatile pcmconf8xx_t *pcmp;
- volatile sysconf8xx_t *sysp;
- uint reg, mask;
-
- debug ("hardware_enable: " PCMCIA_BOARD_MSG " Slot %c\n", 'A'+slot);
-
- udelay(10000);
-
- immap = (immap_t *)CFG_IMMR;
- sysp = (sysconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_siu_conf));
- pcmp = (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
- cp = (cpm8xx_t *)(&(((immap_t *)CFG_IMMR)->im_cpm));
-
- /*
- * Configure SIUMCR to enable PCMCIA port B
- * (VFLS[0:1] are not used for debugging, we connect FRZ# instead)
- */
- sysp->sc_siumcr &= ~SIUMCR_DBGC11; /* set DBGC to 00 */
-
- /* clear interrupt state, and disable interrupts */
- pcmp->pcmc_pscr = PCMCIA_MASK(slot);
- pcmp->pcmc_per &= ~PCMCIA_MASK(slot);
-
- /*
- * Disable interrupts, DMA, and PCMCIA buffers
- * (isolate the interface) and assert RESET signal
- */
- debug ("Disable PCMCIA buffers and assert RESET\n");
- reg = 0;
- reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
-#ifndef NSCU_OE_INV
- reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */
-#endif
- PCMCIA_PGCRX(slot) = reg;
- udelay(500);
-
-#ifndef CONFIG_HMI10
-#ifndef CONFIG_NSCU
- /*
- * Configure Port C pins for
- * 5 Volts Enable and 3 Volts enable
- */
- immap->im_ioport.iop_pcpar &= ~(0x0002 | 0x0004);
- immap->im_ioport.iop_pcso &= ~(0x0002 | 0x0004);
- /* remove all power */
-
- immap->im_ioport.iop_pcdat &= ~(0x0002 | 0x0004);
-#endif
-#else /* CONFIG_HMI10 */
- /*
- * Configure Port B pins for
- * 5 Volts Enable and 3 Volts enable
- */
- immap->im_cpm.cp_pbpar &= ~(0x00000300);
-
- /* remove all power */
- immap->im_cpm.cp_pbdat |= 0x00000300;
-#endif /* CONFIG_HMI10 */
-
- /*
- * Make sure there is a card in the slot, then configure the interface.
- */
- udelay(10000);
- debug ("[%d] %s: PIPR(%p)=0x%x\n",
- __LINE__,__FUNCTION__,
- &(pcmp->pcmc_pipr),pcmp->pcmc_pipr);
-#ifndef CONFIG_HMI10
- if (pcmp->pcmc_pipr & (0x18000000 >> (slot << 4))) {
-#else
- if (pcmp->pcmc_pipr & (0x10000000 >> (slot << 4))) {
-#endif /* CONFIG_HMI10 */
- printf (" No Card found\n");
- return (1);
- }
-
- /*
- * Power On.
- */
- mask = PCMCIA_VS1(slot) | PCMCIA_VS2(slot);
- reg = pcmp->pcmc_pipr;
- debug ("PIPR: 0x%x ==> VS1=o%s, VS2=o%s\n",
- reg,
- (reg&PCMCIA_VS1(slot))?"n":"ff",
- (reg&PCMCIA_VS2(slot))?"n":"ff");
-#ifndef CONFIG_NSCU
- if ((reg & mask) == mask) {
-#ifndef CONFIG_HMI10
- immap->im_ioport.iop_pcdat |= 0x0004;
-#else
- immap->im_cpm.cp_pbdat &= ~(0x0000100);
-#endif /* CONFIG_HMI10 */
- puts (" 5.0V card found: ");
- } else {
-#ifndef CONFIG_HMI10
- immap->im_ioport.iop_pcdat |= 0x0002;
-#else
- immap->im_cpm.cp_pbdat &= ~(0x0000200);
-#endif /* CONFIG_HMI10 */
- puts (" 3.3V card found: ");
- }
-#ifndef CONFIG_HMI10
- immap->im_ioport.iop_pcdir |= (0x0002 | 0x0004);
-#else
- immap->im_cpm.cp_pbdir |= 0x00000300;
-#endif /* CONFIG_HMI10 */
-#else
- if ((reg & mask) == mask) {
- puts (" 5.0V card found: ");
- } else {
- puts (" 3.3V card found: ");
- }
-#endif
-#if 0
- /* VCC switch error flag, PCMCIA slot INPACK_ pin */
- cp->cp_pbdir &= ~(0x0020 | 0x0010);
- cp->cp_pbpar &= ~(0x0020 | 0x0010);
- udelay(500000);
-#endif
- udelay(1000);
- debug ("Enable PCMCIA buffers and stop RESET\n");
- reg = PCMCIA_PGCRX(slot);
- reg &= ~__MY_PCMCIA_GCRX_CXRESET; /* active high */
-#ifndef NSCU_OE_INV
- reg &= ~__MY_PCMCIA_GCRX_CXOE; /* active low */
-#else
- reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */
-#endif
- PCMCIA_PGCRX(slot) = reg;
-
- udelay(250000); /* some cards need >150 ms to come up :-( */
-
- debug ("# hardware_enable done\n");
-
- return (0);
-}
-
-
-#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
-static int hardware_disable(int slot)
-{
- volatile immap_t *immap;
- volatile pcmconf8xx_t *pcmp;
- u_long reg;
-
- debug ("hardware_disable: " PCMCIA_BOARD_MSG " Slot %c\n", 'A'+slot);
-
- immap = (immap_t *)CFG_IMMR;
- pcmp = (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
-
-#ifndef CONFIG_HMI10
-#ifndef CONFIG_NSCU
- /* remove all power */
- immap->im_ioport.iop_pcdat &= ~(0x0002 | 0x0004);
-#endif
-#else /* CONFIG_HMI10 */
- immap->im_cpm.cp_pbdat |= 0x00000300;
-#endif /* CONFIG_HMI10 */
-
- debug ("Disable PCMCIA buffers and assert RESET\n");
- reg = 0;
- reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
-#ifndef NSCU_OE_INV
- reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */
-#endif
- PCMCIA_PGCRX(slot) = reg;
-
- udelay(10000);
-
- return (0);
-}
-#endif /* CFG_CMD_PCMCIA */
-
-#ifdef CONFIG_NSCU
-static int voltage_set(int slot, int vcc, int vpp)
-{
- return 0;
-}
-#else
-static int voltage_set(int slot, int vcc, int vpp)
-{
- volatile immap_t *immap;
- volatile pcmconf8xx_t *pcmp;
- u_long reg;
-
- debug ("voltage_set: "
- PCMCIA_BOARD_MSG
- " Slot %c, Vcc=%d.%d, Vpp=%d.%d\n",
- 'A'+slot, vcc/10, vcc%10, vpp/10, vcc%10);
-
- immap = (immap_t *)CFG_IMMR;
- pcmp = (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
- /*
- * Disable PCMCIA buffers (isolate the interface)
- * and assert RESET signal
- */
- debug ("Disable PCMCIA buffers and assert RESET\n");
- reg = PCMCIA_PGCRX(slot);
- reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
-#ifndef NSCU_OE_INV
- reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */
-#else
- reg &= ~__MY_PCMCIA_GCRX_CXOE; /* active low */
-#endif
- PCMCIA_PGCRX(slot) = reg;
- udelay(500);
-
-#ifndef CONFIG_HMI10
- /*
- * Configure Port C pins for
- * 5 Volts Enable and 3 Volts enable,
- * Turn off all power
- */
- debug ("PCMCIA power OFF\n");
- immap->im_ioport.iop_pcpar &= ~(0x0002 | 0x0004);
- immap->im_ioport.iop_pcso &= ~(0x0002 | 0x0004);
- immap->im_ioport.iop_pcdat &= ~(0x0002 | 0x0004);
-
- reg = 0;
- switch(vcc) {
- case 0: break;
- case 33: reg |= 0x0002; break;
- case 50: reg |= 0x0004; break;
- default: goto done;
- }
-#else /* CONFIG_HMI10 */
- /*
- * Configure Port B pins for
- * 5 Volts Enable and 3 Volts enable,
- * Turn off all power
- */
- debug ("PCMCIA power OFF\n");
- immap->im_cpm.cp_pbpar &= ~(0x00000300);
- /* remove all power */
-
- immap->im_cpm.cp_pbdat |= 0x00000300;
-
- reg = 0;
- switch(vcc) {
- case 0: break;
- case 33: reg |= 0x00000200; break;
- case 50: reg |= 0x00000100; break;
- default: goto done;
-}
-#endif /* CONFIG_HMI10 */
-
- /* Checking supported voltages */
-
- debug ("PIPR: 0x%x --> %s\n",
- pcmp->pcmc_pipr,
- (pcmp->pcmc_pipr & 0x00008000) ? "only 5 V" : "can do 3.3V");
-
-#ifndef CONFIG_HMI10
- immap->im_ioport.iop_pcdat |= reg;
- immap->im_ioport.iop_pcdir |= (0x0002 | 0x0004);
-#else
- immap->im_cpm.cp_pbdat &= !reg;
- immap->im_cpm.cp_pbdir |= 0x00000300;
-#endif /* CONFIG_HMI10 */
- if (reg) {
-#ifndef CONFIG_HMI10
- debug ("PCMCIA powered at %sV\n",
- (reg&0x0004) ? "5.0" : "3.3");
-#else
- debug ("PCMCIA powered at %sV\n",
- (reg&0x00000200) ? "5.0" : "3.3");
-#endif /* CONFIG_HMI10 */
- } else {
- debug ("PCMCIA powered down\n");
- }
-
-done:
- debug ("Enable PCMCIA buffers and stop RESET\n");
- reg = PCMCIA_PGCRX(slot);
- reg &= ~__MY_PCMCIA_GCRX_CXRESET; /* active high */
-#ifndef NSCU_OE_INV
- reg &= ~__MY_PCMCIA_GCRX_CXOE; /* active low */
-#else
- reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */
-#endif
- PCMCIA_PGCRX(slot) = reg;
- udelay(500);
-
- debug ("voltage_set: " PCMCIA_BOARD_MSG " Slot %c, DONE\n",
- slot+'A');
- return (0);
-}
-#endif
-
-#endif /* TQM8xxL */
-
-
-/* -------------------------------------------------------------------- */
-/* LWMON Board */
-/* -------------------------------------------------------------------- */
-
-#if defined(CONFIG_LWMON)
-
-#define PCMCIA_BOARD_MSG "LWMON"
-
-/* #define's for MAX1604 Power Switch */
-#define MAX1604_OP_SUS 0x80
-#define MAX1604_VCCBON 0x40
-#define MAX1604_VCC_35 0x20
-#define MAX1604_VCCBHIZ 0x10
-#define MAX1604_VPPBON 0x08
-#define MAX1604_VPPBPBPGM 0x04
-#define MAX1604_VPPBHIZ 0x02
-/* reserved 0x01 */
-
-static int hardware_enable(int slot)
-{
- volatile immap_t *immap;
- volatile cpm8xx_t *cp;
- volatile pcmconf8xx_t *pcmp;
- volatile sysconf8xx_t *sysp;
- uint reg, mask;
- uchar val;
-
-
- debug ("hardware_enable: " PCMCIA_BOARD_MSG " Slot %c\n", 'A'+slot);
-
- /* Switch on PCMCIA port in PIC register 0x60 */
- reg = pic_read (0x60);
- debug ("[%d] PIC read: reg_60 = 0x%02x\n", __LINE__, reg);
- reg &= ~0x10;
- /* reg |= 0x08; Vpp not needed */
- pic_write (0x60, reg);
-#ifdef DEBUG
- reg = pic_read (0x60);
- printf ("[%d] PIC read: reg_60 = 0x%02x\n", __LINE__, reg);
-#endif
- udelay(10000);
-
- immap = (immap_t *)CFG_IMMR;
- sysp = (sysconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_siu_conf));
- pcmp = (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
- cp = (cpm8xx_t *)(&(((immap_t *)CFG_IMMR)->im_cpm));
-
- /*
- * Configure SIUMCR to enable PCMCIA port B
- * (VFLS[0:1] are not used for debugging, we connect FRZ# instead)
- */
- sysp->sc_siumcr &= ~SIUMCR_DBGC11; /* set DBGC to 00 */
-
- /* clear interrupt state, and disable interrupts */
- pcmp->pcmc_pscr = PCMCIA_MASK(_slot_);
- pcmp->pcmc_per &= ~PCMCIA_MASK(_slot_);
-
- /*
- * Disable interrupts, DMA, and PCMCIA buffers
- * (isolate the interface) and assert RESET signal
- */
- debug ("Disable PCMCIA buffers and assert RESET\n");
- reg = 0;
- reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
- reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */
- PCMCIA_PGCRX(_slot_) = reg;
- udelay(500);
-
- /*
- * Make sure there is a card in the slot, then configure the interface.
- */
- udelay(10000);
- debug ("[%d] %s: PIPR(%p)=0x%x\n",
- __LINE__,__FUNCTION__,
- &(pcmp->pcmc_pipr),pcmp->pcmc_pipr);
- if (pcmp->pcmc_pipr & (0x18000000 >> (slot << 4))) {
- printf (" No Card found\n");
- return (1);
- }
-
- /*
- * Power On.
- */
- mask = PCMCIA_VS1(slot) | PCMCIA_VS2(slot);
- reg = pcmp->pcmc_pipr;
- debug ("PIPR: 0x%x ==> VS1=o%s, VS2=o%s\n",
- reg,
- (reg&PCMCIA_VS1(slot))?"n":"ff",
- (reg&PCMCIA_VS2(slot))?"n":"ff");
- if ((reg & mask) == mask) {
- val = 0; /* VCCB3/5 = 0 ==> use Vx = 5.0 V */
- puts (" 5.0V card found: ");
- } else {
- val = MAX1604_VCC_35; /* VCCB3/5 = 1 ==> use Vy = 3.3 V */
- puts (" 3.3V card found: ");
- }
-
- /* switch VCC on */
- val |= MAX1604_OP_SUS | MAX1604_VCCBON;
- i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
- i2c_write (CFG_I2C_POWER_A_ADDR, 0, 0, &val, 1);
-
- udelay(500000);
-
- debug ("Enable PCMCIA buffers and stop RESET\n");
- reg = PCMCIA_PGCRX(_slot_);
- reg &= ~__MY_PCMCIA_GCRX_CXRESET; /* active high */
- reg &= ~__MY_PCMCIA_GCRX_CXOE; /* active low */
- PCMCIA_PGCRX(_slot_) = reg;
-
- udelay(250000); /* some cards need >150 ms to come up :-( */
-
- debug ("# hardware_enable done\n");
-
- return (0);
-}
-
-
-#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
-static int hardware_disable(int slot)
-{
- volatile immap_t *immap;
- volatile pcmconf8xx_t *pcmp;
- u_long reg;
- uchar val;
-
- debug ("hardware_disable: " PCMCIA_BOARD_MSG " Slot %c\n", 'A'+slot);
-
- immap = (immap_t *)CFG_IMMR;
- pcmp = (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
-
- /* remove all power, put output in high impedance state */
- val = MAX1604_VCCBHIZ | MAX1604_VPPBHIZ;
- i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
- i2c_write (CFG_I2C_POWER_A_ADDR, 0, 0, &val, 1);
-
- /* Configure PCMCIA General Control Register */
- debug ("Disable PCMCIA buffers and assert RESET\n");
- reg = 0;
- reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
- reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */
- PCMCIA_PGCRX(_slot_) = reg;
-
- /* Switch off PCMCIA port in PIC register 0x60 */
- reg = pic_read (0x60);
- debug ("[%d] PIC read: reg_60 = 0x%02x\n", __LINE__, reg);
- reg |= 0x10;
- reg &= ~0x08;
- pic_write (0x60, reg);
-#ifdef DEBUG
- reg = pic_read (0x60);
- printf ("[%d] PIC read: reg_60 = 0x%02x\n", __LINE__, reg);
-#endif
- udelay(10000);
-
- return (0);
-}
-#endif /* CFG_CMD_PCMCIA */
-
-
-static int voltage_set(int slot, int vcc, int vpp)
-{
- volatile immap_t *immap;
- volatile pcmconf8xx_t *pcmp;
- u_long reg;
- uchar val;
-
- debug ("voltage_set: "
- PCMCIA_BOARD_MSG
- " Slot %c, Vcc=%d.%d, Vpp=%d.%d\n",
- 'A'+slot, vcc/10, vcc%10, vpp/10, vcc%10);
-
- immap = (immap_t *)CFG_IMMR;
- pcmp = (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
- /*
- * Disable PCMCIA buffers (isolate the interface)
- * and assert RESET signal
- */
- debug ("Disable PCMCIA buffers and assert RESET\n");
- reg = PCMCIA_PGCRX(_slot_);
- reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
- reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */
- PCMCIA_PGCRX(_slot_) = reg;
- udelay(500);
-
- /*
- * Turn off all power (switch to high impedance)
- */
- debug ("PCMCIA power OFF\n");
- val = MAX1604_VCCBHIZ | MAX1604_VPPBHIZ;
- i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
- i2c_write (CFG_I2C_POWER_A_ADDR, 0, 0, &val, 1);
-
- val = 0;
- switch(vcc) {
- case 0: break;
- case 33: val = MAX1604_VCC_35; break;
- case 50: break;
- default: goto done;
- }
-
- /* Checking supported voltages */
-
- debug ("PIPR: 0x%x --> %s\n",
- pcmp->pcmc_pipr,
- (pcmp->pcmc_pipr & 0x00008000) ? "only 5 V" : "can do 3.3V");
-
- i2c_write (CFG_I2C_POWER_A_ADDR, 0, 0, &val, 1);
- if (val) {
- debug ("PCMCIA powered at %sV\n",
- (val & MAX1604_VCC_35) ? "3.3" : "5.0");
- } else {
- debug ("PCMCIA powered down\n");
- }
-
-done:
- debug ("Enable PCMCIA buffers and stop RESET\n");
- reg = PCMCIA_PGCRX(_slot_);
- reg &= ~__MY_PCMCIA_GCRX_CXRESET; /* active high */
- reg &= ~__MY_PCMCIA_GCRX_CXOE; /* active low */
- PCMCIA_PGCRX(_slot_) = reg;
- udelay(500);
-
- debug ("voltage_set: " PCMCIA_BOARD_MSG " Slot %c, DONE\n",
- slot+'A');
- return (0);
-}
-
-#endif /* LWMON */
-
-/* -------------------------------------------------------------------- */
-/* GTH board by Corelatus AB */
-/* -------------------------------------------------------------------- */
-#if defined(CONFIG_GTH)
-
-#define PCMCIA_BOARD_MSG "GTH COMPACT FLASH"
-
-static int voltage_set (int slot, int vcc, int vpp)
-{ /* Do nothing */
- return 0;
-}
-
-static int hardware_enable (int slot)
-{
- volatile immap_t *immap;
- volatile cpm8xx_t *cp;
- volatile pcmconf8xx_t *pcmp;
- volatile sysconf8xx_t *sysp;
- uint reg, mask;
-
- debug ("hardware_enable: GTH Slot %c\n", 'A' + slot);
-
- immap = (immap_t *) CFG_IMMR;
- sysp = (sysconf8xx_t *) (&(((immap_t *) CFG_IMMR)->im_siu_conf));
- pcmp = (pcmconf8xx_t *) (&(((immap_t *) CFG_IMMR)->im_pcmcia));
- cp = (cpm8xx_t *) (&(((immap_t *) CFG_IMMR)->im_cpm));
-
- /* clear interrupt state, and disable interrupts */
- pcmp->pcmc_pscr = PCMCIA_MASK (_slot_);
- pcmp->pcmc_per &= ~PCMCIA_MASK (_slot_);
-
- /*
- * Disable interrupts, DMA, and PCMCIA buffers
- * (isolate the interface) and assert RESET signal
- */
- debug ("Disable PCMCIA buffers and assert RESET\n");
- reg = 0;
- reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
- reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */
- PCMCIA_PGCRX (_slot_) = reg;
- udelay (500);
-
- /*
- * Make sure there is a card in the slot,
- * then configure the interface.
- */
- udelay (10000);
- debug ("[%d] %s: PIPR(%p)=0x%x\n",
- __LINE__, __FUNCTION__,
- &(pcmp->pcmc_pipr), pcmp->pcmc_pipr);
- if (pcmp->pcmc_pipr & 0x98000000) {
- printf (" No Card found\n");
- return (1);
- }
-
- mask = PCMCIA_VS1 (slot) | PCMCIA_VS2 (slot);
- reg = pcmp->pcmc_pipr;
- debug ("PIPR: 0x%x ==> VS1=o%s, VS2=o%s\n",
- reg,
- (reg & PCMCIA_VS1 (slot)) ? "n" : "ff",
- (reg & PCMCIA_VS2 (slot)) ? "n" : "ff");
-
- debug ("Enable PCMCIA buffers and stop RESET\n");
- reg = PCMCIA_PGCRX (_slot_);
- reg &= ~__MY_PCMCIA_GCRX_CXRESET; /* active high */
- reg &= ~__MY_PCMCIA_GCRX_CXOE; /* active low */
- PCMCIA_PGCRX (_slot_) = reg;
-
- udelay (250000); /* some cards need >150 ms to come up :-( */
-
- debug ("# hardware_enable done\n");
-
- return 0;
-}
-#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
-static int hardware_disable(int slot)
-{
- return 0; /* No hardware to disable */
-}
-#endif /* CFG_CMD_PCMCIA */
-#endif /* CONFIG_GTH */
-
-/* -------------------------------------------------------------------- */
-/* ICU862 Boards by Cambridge Broadband Ltd. */
-/* -------------------------------------------------------------------- */
-
-#if defined(CONFIG_ICU862)
-
-#define PCMCIA_BOARD_MSG "ICU862"
-
-static void cfg_port_B (void);
-
-static int hardware_enable(int slot)
-{
- volatile immap_t *immap;
- volatile cpm8xx_t *cp;
- volatile pcmconf8xx_t *pcmp;
- volatile sysconf8xx_t *sysp;
- uint reg, pipr, mask;
- int i;
-
- debug ("hardware_enable: " PCMCIA_BOARD_MSG " Slot %c\n", 'A'+slot);
-
- udelay(10000);
-
- immap = (immap_t *)CFG_IMMR;
- sysp = (sysconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_siu_conf));
- pcmp = (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
- cp = (cpm8xx_t *)(&(((immap_t *)CFG_IMMR)->im_cpm));
-
- /* Configure Port B for TPS2205 PC-Card Power-Interface Switch */
- cfg_port_B ();
-
- /*
- * Configure SIUMCR to enable PCMCIA port B
- * (VFLS[0:1] are not used for debugging, we connect FRZ# instead)
- */
- sysp->sc_siumcr &= ~SIUMCR_DBGC11; /* set DBGC to 00 */
-
- /* clear interrupt state, and disable interrupts */
- pcmp->pcmc_pscr = PCMCIA_MASK(_slot_);
- pcmp->pcmc_per &= ~PCMCIA_MASK(_slot_);
-
- /*
- * Disable interrupts, DMA, and PCMCIA buffers
- * (isolate the interface) and assert RESET signal
- */
- debug ("Disable PCMCIA buffers and assert RESET\n");
- reg = 0;
- reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
- reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */
- PCMCIA_PGCRX(_slot_) = reg;
- udelay(500);
-
- /*
- * Make sure there is a card in the slot, then configure the interface.
- */
- udelay(10000);
- debug ("[%d] %s: PIPR(%p)=0x%x\n",
- __LINE__,__FUNCTION__,
- &(pcmp->pcmc_pipr),pcmp->pcmc_pipr);
- if (pcmp->pcmc_pipr & (0x18000000 >> (slot << 4))) {
- printf (" No Card found\n");
- return (1);
- }
-
- /*
- * Power On: Set VAVCC to 3.3V or 5V, set VAVPP to Hi-Z
- */
- mask = PCMCIA_VS1(slot) | PCMCIA_VS2(slot);
- pipr = pcmp->pcmc_pipr;
- debug ("PIPR: 0x%x ==> VS1=o%s, VS2=o%s\n",
- pipr,
- (reg&PCMCIA_VS1(slot))?"n":"ff",
- (reg&PCMCIA_VS2(slot))?"n":"ff");
-
- reg = cp->cp_pbdat;
- if ((pipr & mask) == mask) {
- reg |= (TPS2205_VPP_PGM | TPS2205_VPP_VCC | /* VAVPP => Hi-Z */
- TPS2205_VCC3); /* 3V off */
- reg &= ~(TPS2205_VCC5); /* 5V on */
- puts (" 5.0V card found: ");
- } else {
- reg |= (TPS2205_VPP_PGM | TPS2205_VPP_VCC | /* VAVPP => Hi-Z */
- TPS2205_VCC5); /* 5V off */
- reg &= ~(TPS2205_VCC3); /* 3V on */
- puts (" 3.3V card found: ");
- }
-
- debug ("\nPB DAT: %08x -> 3.3V %s 5.0V %s VPP_PGM %s VPP_VCC %s\n",
- reg,
- (reg & TPS2205_VCC3) ? "off" : "on",
- (reg & TPS2205_VCC5) ? "off" : "on",
- (reg & TPS2205_VPP_PGM) ? "off" : "on",
- (reg & TPS2205_VPP_VCC) ? "off" : "on" );
-
- cp->cp_pbdat = reg;
-
- /* Wait 500 ms; use this to check for over-current */
- for (i=0; i<5000; ++i) {
- if ((cp->cp_pbdat & TPS2205_OC) == 0) {
- printf (" *** Overcurrent - Safety shutdown ***\n");
- cp->cp_pbdat &= ~(TPS2205_SHDN);
- return (1);
- }
- udelay (100);
- }
-
- debug ("Enable PCMCIA buffers and stop RESET\n");
- reg = PCMCIA_PGCRX(_slot_);
- reg &= ~__MY_PCMCIA_GCRX_CXRESET; /* active high */
- reg &= ~__MY_PCMCIA_GCRX_CXOE; /* active low */
- PCMCIA_PGCRX(_slot_) = reg;
-
- udelay(250000); /* some cards need >150 ms to come up :-( */
-
- debug ("# hardware_enable done\n");
-
- return (0);
-}
-
-
-#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
-static int hardware_disable(int slot)
-{
- volatile immap_t *immap;
- volatile cpm8xx_t *cp;
- volatile pcmconf8xx_t *pcmp;
- u_long reg;
-
- debug ("hardware_disable: " PCMCIA_BOARD_MSG " Slot %c\n", 'A'+slot);
-
- immap = (immap_t *)CFG_IMMR;
- cp = (cpm8xx_t *)(&(((immap_t *)CFG_IMMR)->im_cpm));
- pcmp = (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
-
- /* Shut down */
- cp->cp_pbdat &= ~(TPS2205_SHDN);
-
- /* Configure PCMCIA General Control Register */
- debug ("Disable PCMCIA buffers and assert RESET\n");
- reg = 0;
- reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
- reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */
- PCMCIA_PGCRX(_slot_) = reg;
-
- udelay(10000);
-
- return (0);
-}
-#endif /* CFG_CMD_PCMCIA */
-
-
-static int voltage_set(int slot, int vcc, int vpp)
-{
- volatile immap_t *immap;
- volatile cpm8xx_t *cp;
- volatile pcmconf8xx_t *pcmp;
- u_long reg;
-
- debug ("voltage_set: "
- PCMCIA_BOARD_MSG
- " Slot %c, Vcc=%d.%d, Vpp=%d.%d\n",
- 'A'+slot, vcc/10, vcc%10, vpp/10, vcc%10);
-
- immap = (immap_t *)CFG_IMMR;
- cp = (cpm8xx_t *)(&(((immap_t *)CFG_IMMR)->im_cpm));
- pcmp = (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
- /*
- * Disable PCMCIA buffers (isolate the interface)
- * and assert RESET signal
- */
- debug ("Disable PCMCIA buffers and assert RESET\n");
- reg = PCMCIA_PGCRX(_slot_);
- reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
- reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */
- PCMCIA_PGCRX(_slot_) = reg;
- udelay(500);
-
- /*
- * Configure Port C pins for
- * 5 Volts Enable and 3 Volts enable,
- * Turn all power pins to Hi-Z
- */
- debug ("PCMCIA power OFF\n");
- cfg_port_B (); /* Enables switch, but all in Hi-Z */
-
- reg = cp->cp_pbdat;
-
- switch(vcc) {
- case 0: break; /* Switch off */
- case 33: reg &= ~TPS2205_VCC3; break; /* Switch on 3.3V */
- case 50: reg &= ~TPS2205_VCC5; break; /* Switch on 5.0V */
- default: goto done;
- }
-
- /* Checking supported voltages */
-
- debug ("PIPR: 0x%x --> %s\n",
- pcmp->pcmc_pipr,
- (pcmp->pcmc_pipr & 0x00008000) ? "only 5 V" : "can do 3.3V");
-
- cp->cp_pbdat = reg;
-
-#ifdef DEBUG
- {
- char *s;
-
- if ((reg & TPS2205_VCC3) == 0) {
- s = "at 3.3V";
- } else if ((reg & TPS2205_VCC5) == 0) {
- s = "at 5.0V";
- } else {
- s = "down";
- }
- printf ("PCMCIA powered %s\n", s);
- }
-#endif
-
-done:
- debug ("Enable PCMCIA buffers and stop RESET\n");
- reg = PCMCIA_PGCRX(_slot_);
- reg &= ~__MY_PCMCIA_GCRX_CXRESET; /* active high */
- reg &= ~__MY_PCMCIA_GCRX_CXOE; /* active low */
- PCMCIA_PGCRX(_slot_) = reg;
- udelay(500);
-
- debug ("voltage_set: " PCMCIA_BOARD_MSG " Slot %c, DONE\n",
- slot+'A');
- return (0);
-}
-
-static void cfg_port_B (void)
-{
- volatile immap_t *immap;
- volatile cpm8xx_t *cp;
- uint reg;
-
- immap = (immap_t *)CFG_IMMR;
- cp = (cpm8xx_t *)(&(((immap_t *)CFG_IMMR)->im_cpm));
-
- /*
- * Configure Port B for TPS2205 PC-Card Power-Interface Switch
- *
- * Switch off all voltages, assert shutdown
- */
- reg = cp->cp_pbdat;
- reg |= (TPS2205_VPP_PGM | TPS2205_VPP_VCC | /* VAVPP => Hi-Z */
- TPS2205_VCC3 | TPS2205_VCC5 | /* VAVCC => Hi-Z */
- TPS2205_SHDN); /* enable switch */
- cp->cp_pbdat = reg;
-
- cp->cp_pbpar &= ~(TPS2205_INPUTS | TPS2205_OUTPUTS);
-
- reg = cp->cp_pbdir & ~(TPS2205_INPUTS);
- cp->cp_pbdir = reg | TPS2205_OUTPUTS;
-
- debug ("Set Port B: PAR: %08x DIR: %08x DAT: %08x\n",
- cp->cp_pbpar, cp->cp_pbdir, cp->cp_pbdat);
-}
-
-#endif /* ICU862 */
-
-
-/* -------------------------------------------------------------------- */
-/* C2MON Boards by TTTech Computertechnik AG */
-/* -------------------------------------------------------------------- */
-
-#if defined(CONFIG_C2MON)
-
-#define PCMCIA_BOARD_MSG "C2MON"
-
-static void cfg_ports (void);
-
-static int hardware_enable(int slot)
-{
- volatile immap_t *immap;
- volatile cpm8xx_t *cp;
- volatile pcmconf8xx_t *pcmp;
- volatile sysconf8xx_t *sysp;
- uint reg, pipr, mask;
- ushort sreg;
- int i;
-
- debug ("hardware_enable: " PCMCIA_BOARD_MSG " Slot %c\n", 'A'+slot);
-
- udelay(10000);
-
- immap = (immap_t *)CFG_IMMR;
- sysp = (sysconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_siu_conf));
- pcmp = (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
- cp = (cpm8xx_t *)(&(((immap_t *)CFG_IMMR)->im_cpm));
-
- /* Configure Ports for TPS2211A PC-Card Power-Interface Switch */
- cfg_ports ();
-
- /*
- * Configure SIUMCR to enable PCMCIA port B
- * (VFLS[0:1] are not used for debugging, we connect FRZ# instead)
- */
- sysp->sc_siumcr &= ~SIUMCR_DBGC11; /* set DBGC to 00 */
-
- /* clear interrupt state, and disable interrupts */
- pcmp->pcmc_pscr = PCMCIA_MASK(_slot_);
- pcmp->pcmc_per &= ~PCMCIA_MASK(_slot_);
-
- /*
- * Disable interrupts, DMA, and PCMCIA buffers
- * (isolate the interface) and assert RESET signal
- */
- debug ("Disable PCMCIA buffers and assert RESET\n");
- reg = 0;
- reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
- reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */
- PCMCIA_PGCRX(_slot_) = reg;
- udelay(500);
-
- /*
- * Make sure there is a card in the slot, then configure the interface.
- */
- udelay(10000);
- debug ("[%d] %s: PIPR(%p)=0x%x\n",
- __LINE__,__FUNCTION__,
- &(pcmp->pcmc_pipr),pcmp->pcmc_pipr);
- if (pcmp->pcmc_pipr & (0x18000000 >> (slot << 4))) {
- printf (" No Card found\n");
- return (1);
- }
-
- /*
- * Power On: Set VAVCC to 3.3V or 5V, set VAVPP to Hi-Z
- */
- mask = PCMCIA_VS1(slot) | PCMCIA_VS2(slot);
- pipr = pcmp->pcmc_pipr;
- debug ("PIPR: 0x%x ==> VS1=o%s, VS2=o%s\n",
- pipr,
- (reg&PCMCIA_VS1(slot))?"n":"ff",
- (reg&PCMCIA_VS2(slot))?"n":"ff");
-
- sreg = immap->im_ioport.iop_pcdat;
- if ((pipr & mask) == mask) {
- sreg |= (TPS2211_VPPD0 | TPS2211_VPPD1 | /* VAVPP => Hi-Z */
- TPS2211_VCCD1); /* 5V on */
- sreg &= ~(TPS2211_VCCD0); /* 3V off */
- puts (" 5.0V card found: ");
- } else {
- sreg |= (TPS2211_VPPD0 | TPS2211_VPPD1 | /* VAVPP => Hi-Z */
- TPS2211_VCCD0); /* 3V on */
- sreg &= ~(TPS2211_VCCD1); /* 5V off */
- puts (" 3.3V card found: ");
- }
-
- debug ("\nPC DAT: %04x -> 3.3V %s 5.0V %s\n",
- sreg,
- ( (sreg & TPS2211_VCCD0) && !(sreg & TPS2211_VCCD1)) ? "on" : "off",
- (!(sreg & TPS2211_VCCD0) && (sreg & TPS2211_VCCD1)) ? "on" : "off"
- );
-
- immap->im_ioport.iop_pcdat = sreg;
-
- /* Wait 500 ms; use this to check for over-current */
- for (i=0; i<5000; ++i) {
- if ((cp->cp_pbdat & TPS2211_OC) == 0) {
- printf (" *** Overcurrent - Safety shutdown ***\n");
- immap->im_ioport.iop_pcdat &= ~(TPS2211_VCCD0|TPS2211_VCCD1);
- return (1);
- }
- udelay (100);
- }
-
- debug ("Enable PCMCIA buffers and stop RESET\n");
- reg = PCMCIA_PGCRX(_slot_);
- reg &= ~__MY_PCMCIA_GCRX_CXRESET; /* active high */
- reg &= ~__MY_PCMCIA_GCRX_CXOE; /* active low */
- PCMCIA_PGCRX(_slot_) = reg;
-
- udelay(250000); /* some cards need >150 ms to come up :-( */
-
- debug ("# hardware_enable done\n");
-
- return (0);
-}
-
-
-#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
-static int hardware_disable(int slot)
-{
- volatile immap_t *immap;
- volatile cpm8xx_t *cp;
- volatile pcmconf8xx_t *pcmp;
- u_long reg;
-
- debug ("hardware_disable: " PCMCIA_BOARD_MSG " Slot %c\n", 'A'+slot);
-
- immap = (immap_t *)CFG_IMMR;
- pcmp = (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
-
- /* Configure PCMCIA General Control Register */
- debug ("Disable PCMCIA buffers and assert RESET\n");
- reg = 0;
- reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
- reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */
- PCMCIA_PGCRX(_slot_) = reg;
-
- /* ALl voltages off / Hi-Z */
- immap->im_ioport.iop_pcdat |= (TPS2211_VPPD0 | TPS2211_VPPD1 |
- TPS2211_VCCD0 | TPS2211_VCCD1 );
-
- udelay(10000);
-
- return (0);
-}
-#endif /* CFG_CMD_PCMCIA */
-
-
-static int voltage_set(int slot, int vcc, int vpp)
-{
- volatile immap_t *immap;
- volatile cpm8xx_t *cp;
- volatile pcmconf8xx_t *pcmp;
- u_long reg;
- ushort sreg;
-
- debug ("voltage_set: "
- PCMCIA_BOARD_MSG
- " Slot %c, Vcc=%d.%d, Vpp=%d.%d\n",
- 'A'+slot, vcc/10, vcc%10, vpp/10, vcc%10);
-
- immap = (immap_t *)CFG_IMMR;
- cp = (cpm8xx_t *)(&(((immap_t *)CFG_IMMR)->im_cpm));
- pcmp = (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
- /*
- * Disable PCMCIA buffers (isolate the interface)
- * and assert RESET signal
- */
- debug ("Disable PCMCIA buffers and assert RESET\n");
- reg = PCMCIA_PGCRX(_slot_);
- reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
- reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */
- PCMCIA_PGCRX(_slot_) = reg;
- udelay(500);
-
- /*
- * Configure Port C pins for
- * 5 Volts Enable and 3 Volts enable,
- * Turn all power pins to Hi-Z
- */
- debug ("PCMCIA power OFF\n");
- cfg_ports (); /* Enables switch, but all in Hi-Z */
-
- sreg = immap->im_ioport.iop_pcdat;
- sreg |= TPS2211_VPPD0 | TPS2211_VPPD1; /* VAVPP always Hi-Z */
-
- switch(vcc) {
- case 0: break; /* Switch off */
- case 33: sreg |= TPS2211_VCCD0; /* Switch on 3.3V */
- sreg &= ~TPS2211_VCCD1;
- break;
- case 50: sreg &= ~TPS2211_VCCD0; /* Switch on 5.0V */
- sreg |= TPS2211_VCCD1;
- break;
- default: goto done;
- }
-
- /* Checking supported voltages */
-
- debug ("PIPR: 0x%x --> %s\n",
- pcmp->pcmc_pipr,
- (pcmp->pcmc_pipr & 0x00008000) ? "only 5 V" : "can do 3.3V");
-
- immap->im_ioport.iop_pcdat = sreg;
-
-#ifdef DEBUG
- {
- char *s;
-
- if ((sreg & TPS2211_VCCD0) && !(sreg & TPS2211_VCCD1)) {
- s = "at 3.3V";
- } else if (!(sreg & TPS2211_VCCD0) && (sreg & TPS2211_VCCD1)) {
- s = "at 5.0V";
- } else {
- s = "down";
- }
- printf ("PCMCIA powered %s\n", s);
- }
-#endif
-
-done:
- debug ("Enable PCMCIA buffers and stop RESET\n");
- reg = PCMCIA_PGCRX(_slot_);
- reg &= ~__MY_PCMCIA_GCRX_CXRESET; /* active high */
- reg &= ~__MY_PCMCIA_GCRX_CXOE; /* active low */
- PCMCIA_PGCRX(_slot_) = reg;
- udelay(500);
-
- debug ("voltage_set: " PCMCIA_BOARD_MSG " Slot %c, DONE\n",
- slot+'A');
- return (0);
-}
-
-static void cfg_ports (void)
-{
- volatile immap_t *immap;
- volatile cpm8xx_t *cp;
- ushort sreg;
-
- immap = (immap_t *)CFG_IMMR;
- cp = (cpm8xx_t *)(&(((immap_t *)CFG_IMMR)->im_cpm));
-
- /*
- * Configure Port C for TPS2211 PC-Card Power-Interface Switch
- *
- * Switch off all voltages, assert shutdown
- */
- sreg = immap->im_ioport.iop_pcdat;
- sreg |= (TPS2211_VPPD0 | TPS2211_VPPD1); /* VAVPP => Hi-Z */
- sreg &= ~(TPS2211_VCCD0 | TPS2211_VCCD1); /* 3V and 5V off */
- immap->im_ioport.iop_pcdat = sreg;
-
- immap->im_ioport.iop_pcpar &= ~(TPS2211_OUTPUTS);
- immap->im_ioport.iop_pcdir |= TPS2211_OUTPUTS;
-
- debug ("Set Port C: PAR: %04x DIR: %04x DAT: %04x\n",
- immap->im_ioport.iop_pcpar,
- immap->im_ioport.iop_pcdir,
- immap->im_ioport.iop_pcdat);
-
- /*
- * Configure Port B for TPS2211 PC-Card Power-Interface Switch
- *
- * Over-Current Input only
- */
- cp->cp_pbpar &= ~(TPS2211_INPUTS);
- cp->cp_pbdir &= ~(TPS2211_INPUTS);
-
- debug ("Set Port B: PAR: %08x DIR: %08x DAT: %08x\n",
- cp->cp_pbpar, cp->cp_pbdir, cp->cp_pbdat);
-}
-
-#endif /* C2MON */
-
-/* -------------------------------------------------------------------- */
-/* MBX board from Morotola */
-/* -------------------------------------------------------------------- */
-
-#if defined( CONFIG_MBX )
-#include <../board/mbx8xx/csr.h>
-
-/* A lot of this has been taken from the RPX code in this file it works from me.
- I have added the voltage selection for the MBX board. */
-
-/* MBX voltage bit in control register #2 */
-#define CR2_VPP12 ((uchar)0x10)
-#define CR2_VPPVDD ((uchar)0x20)
-#define CR2_VDD5 ((uchar)0x40)
-#define CR2_VDD3 ((uchar)0x80)
-
-#define PCMCIA_BOARD_MSG "MBX860"
-
-static int voltage_set (int slot, int vcc, int vpp)
-{
- uchar reg = 0;
-
- debug ("voltage_set: PCMCIA_BOARD_MSG Slot %c, Vcc=%d.%d, Vpp=%d.%d\n",
- 'A' + slot, vcc / 10, vcc % 10, vpp / 10, vcc % 10);
-
- switch (vcc) {
- case 0:
- break;
- case 33:
- reg |= CR2_VDD3;
- break;
- case 50:
- reg |= CR2_VDD5;
- break;
- default:
- return 1;
- }
-
- switch (vpp) {
- case 0:
- break;
- case 33:
- case 50:
- if (vcc == vpp) {
- reg |= CR2_VPPVDD;
- } else {
- return 1;
- }
- break;
- case 120:
- reg |= CR2_VPP12;
- break;
- default:
- return 1;
- }
-
- /* first, turn off all power */
- MBX_CSR2 &= ~(CR2_VDDSEL | CR2_VPPSEL);
-
- /* enable new powersettings */
- MBX_CSR2 |= reg;
- debug ("MBX_CSR2 read = 0x%02x\n", MBX_CSR2);
-
- return (0);
-}
-
-static int hardware_enable (int slot)
-{
- volatile immap_t *immap;
- volatile cpm8xx_t *cp;
- volatile pcmconf8xx_t *pcmp;
- volatile sysconf8xx_t *sysp;
- uint reg, mask;
-
- debug ("hardware_enable: " PCMCIA_BOARD_MSG " Slot %c\n",
- 'A' + slot);
-
- udelay (10000);
-
- immap = (immap_t *) CFG_IMMR;
- sysp = (sysconf8xx_t *) (&(((immap_t *) CFG_IMMR)->im_siu_conf));
- pcmp = (pcmconf8xx_t *) (&(((immap_t *) CFG_IMMR)->im_pcmcia));
- cp = (cpm8xx_t *) (&(((immap_t *) CFG_IMMR)->im_cpm));
-
- /* clear interrupt state, and disable interrupts */
- pcmp->pcmc_pscr = PCMCIA_MASK (_slot_);
- pcmp->pcmc_per &= ~PCMCIA_MASK (_slot_);
-
- /*
- * Disable interrupts, DMA, and PCMCIA buffers
- * (isolate the interface) and assert RESET signal
- */
- debug ("Disable PCMCIA buffers and assert RESET\n");
- reg = 0;
- reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
- reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */
- PCMCIA_PGCRX (_slot_) = reg;
- udelay (500);
-
- /* remove all power */
- voltage_set (slot, 0, 0);
- /*
- * Make sure there is a card in the slot, then configure the interface.
- */
- udelay(10000);
- debug ("[%d] %s: PIPR(%p)=0x%x\n",
- __LINE__,__FUNCTION__,
- &(pcmp->pcmc_pipr),pcmp->pcmc_pipr);
-#ifndef CONFIG_HMI10
- if (pcmp->pcmc_pipr & (0x18000000 >> (slot << 4))) {
-#else
- if (pcmp->pcmc_pipr & (0x10000000 >> (slot << 4))) {
-#endif /* CONFIG_HMI10 */
- printf (" No Card found\n");
- return (1);
- }
-
- /*
- * Power On.
- */
- mask = PCMCIA_VS1 (_slot_) | PCMCIA_VS2 (_slot_);
- reg = pcmp->pcmc_pipr;
- debug ("PIPR: 0x%x ==> VS1=o%s, VS2=o%s\n", reg,
- (reg & PCMCIA_VS1 (slot)) ? "n" : "ff",
- (reg & PCMCIA_VS2 (slot)) ? "n" : "ff");
-
- if ((reg & mask) == mask) {
- voltage_set (_slot_, 50, 0);
- printf (" 5.0V card found: ");
- } else {
- voltage_set (_slot_, 33, 0);
- printf (" 3.3V card found: ");
- }
-
- debug ("Enable PCMCIA buffers and stop RESET\n");
- reg = PCMCIA_PGCRX (_slot_);
- reg &= ~__MY_PCMCIA_GCRX_CXRESET; /* active high */
- reg &= ~__MY_PCMCIA_GCRX_CXOE; /* active low */
- PCMCIA_PGCRX (_slot_) = reg;
-
- udelay (250000); /* some cards need >150 ms to come up :-( */
-
- debug ("# hardware_enable done\n");
-
- return (0);
-}
-
-#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
-static int hardware_disable (int slot)
-{
- return 0; /* No hardware to disable */
-}
-#endif /* CFG_CMD_PCMCIA */
-#endif /* CONFIG_MBX */
-/* -------------------------------------------------------------------- */
-/* R360MPI Board */
-/* -------------------------------------------------------------------- */
-
-#if defined(CONFIG_R360MPI)
-
-#define PCMCIA_BOARD_MSG "R360MPI"
-
-
-static int hardware_enable(int slot)
-{
- volatile immap_t *immap;
- volatile cpm8xx_t *cp;
- volatile pcmconf8xx_t *pcmp;
- volatile sysconf8xx_t *sysp;
- uint reg, mask;
-
- debug ("hardware_enable: " PCMCIA_BOARD_MSG " Slot %c\n", 'A'+slot);
-
- udelay(10000);
-
- immap = (immap_t *)CFG_IMMR;
- sysp = (sysconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_siu_conf));
- pcmp = (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
- cp = (cpm8xx_t *)(&(((immap_t *)CFG_IMMR)->im_cpm));
-
- /*
- * Configure SIUMCR to enable PCMCIA port B
- * (VFLS[0:1] are not used for debugging, we connect FRZ# instead)
- */
- sysp->sc_siumcr &= ~SIUMCR_DBGC11; /* set DBGC to 00 */
-
- /* clear interrupt state, and disable interrupts */
- pcmp->pcmc_pscr = PCMCIA_MASK(_slot_);
- pcmp->pcmc_per &= ~PCMCIA_MASK(_slot_);
-
- /*
- * Disable interrupts, DMA, and PCMCIA buffers
- * (isolate the interface) and assert RESET signal
- */
- debug ("Disable PCMCIA buffers and assert RESET\n");
- reg = 0;
- reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
- reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */
- PCMCIA_PGCRX(_slot_) = reg;
- udelay(500);
-
- /*
- * Configure Ports A, B & C pins for
- * 5 Volts Enable and 3 Volts enable
- */
- immap->im_ioport.iop_pcpar &= ~(0x0400);
- immap->im_ioport.iop_pcso &= ~(0x0400);/*
- immap->im_ioport.iop_pcdir |= 0x0400;*/
-
- immap->im_ioport.iop_papar &= ~(0x0200);/*
- immap->im_ioport.iop_padir |= 0x0200;*/
-#if 0
- immap->im_ioport.iop_pbpar &= ~(0xC000);
- immap->im_ioport.iop_pbdir &= ~(0xC000);
-#endif
- /* remove all power */
-
- immap->im_ioport.iop_pcdat |= 0x0400;
- immap->im_ioport.iop_padat |= 0x0200;
-
- /*
- * Make sure there is a card in the slot, then configure the interface.
- */
- udelay(10000);
- debug ("[%d] %s: PIPR(%p)=0x%x\n",
- __LINE__,__FUNCTION__,
- &(pcmp->pcmc_pipr),pcmp->pcmc_pipr);
- if (pcmp->pcmc_pipr & (0x18000000 >> (slot << 4))) {
- printf (" No Card found\n");
- return (1);
- }
-
- /*
- * Power On.
- */
- mask = PCMCIA_VS1(slot) | PCMCIA_VS2(slot);
- reg = pcmp->pcmc_pipr;
- debug ("PIPR: 0x%x ==> VS1=o%s, VS2=o%s\n",
- reg,
- (reg&PCMCIA_VS1(slot))?"n":"ff",
- (reg&PCMCIA_VS2(slot))?"n":"ff");
- if ((reg & mask) == mask) {
- immap->im_ioport.iop_pcdat &= ~(0x4000);
- puts (" 5.0V card found: ");
- } else {
- immap->im_ioport.iop_padat &= ~(0x0002);
- puts (" 3.3V card found: ");
- }
- immap->im_ioport.iop_pcdir |= 0x0400;
- immap->im_ioport.iop_padir |= 0x0200;
-#if 0
- /* VCC switch error flag, PCMCIA slot INPACK_ pin */
- cp->cp_pbdir &= ~(0x0020 | 0x0010);
- cp->cp_pbpar &= ~(0x0020 | 0x0010);
- udelay(500000);
-#endif
- debug ("Enable PCMCIA buffers and stop RESET\n");
- reg = PCMCIA_PGCRX(_slot_);
- reg &= ~__MY_PCMCIA_GCRX_CXRESET; /* active high */
- reg &= ~__MY_PCMCIA_GCRX_CXOE; /* active low */
- PCMCIA_PGCRX(_slot_) = reg;
-
- udelay(250000); /* some cards need >150 ms to come up :-( */
-
- debug ("# hardware_enable done\n");
-
- return (0);
-}
-
-
-#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
-static int hardware_disable(int slot)
-{
- volatile immap_t *immap;
- volatile pcmconf8xx_t *pcmp;
- u_long reg;
-
- debug ("hardware_disable: " PCMCIA_BOARD_MSG " Slot %c\n", 'A'+slot);
-
- immap = (immap_t *)CFG_IMMR;
- pcmp = (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
-
- /* remove all power */
- immap->im_ioport.iop_pcdat |= 0x0400;
- immap->im_ioport.iop_padat |= 0x0200;
-
- /* Configure PCMCIA General Control Register */
- debug ("Disable PCMCIA buffers and assert RESET\n");
- reg = 0;
- reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
- reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */
- PCMCIA_PGCRX(_slot_) = reg;
-
- udelay(10000);
-
- return (0);
-}
-#endif /* CFG_CMD_PCMCIA */
-
-
-static int voltage_set(int slot, int vcc, int vpp)
-{
- volatile immap_t *immap;
- volatile pcmconf8xx_t *pcmp;
- u_long reg;
-
- debug ("voltage_set: "
- PCMCIA_BOARD_MSG
- " Slot %c, Vcc=%d.%d, Vpp=%d.%d\n",
- 'A'+slot, vcc/10, vcc%10, vpp/10, vcc%10);
-
- immap = (immap_t *)CFG_IMMR;
- pcmp = (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
- /*
- * Disable PCMCIA buffers (isolate the interface)
- * and assert RESET signal
- */
- debug ("Disable PCMCIA buffers and assert RESET\n");
- reg = PCMCIA_PGCRX(_slot_);
- reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
- reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */
- PCMCIA_PGCRX(_slot_) = reg;
- udelay(500);
-
- /*
- * Configure Ports A & C pins for
- * 5 Volts Enable and 3 Volts enable,
- * Turn off all power
- */
- debug ("PCMCIA power OFF\n");
- immap->im_ioport.iop_pcpar &= ~(0x0400);
- immap->im_ioport.iop_pcso &= ~(0x0400);/*
- immap->im_ioport.iop_pcdir |= 0x0400;*/
-
- immap->im_ioport.iop_papar &= ~(0x0200);/*
- immap->im_ioport.iop_padir |= 0x0200;*/
-
- immap->im_ioport.iop_pcdat |= 0x0400;
- immap->im_ioport.iop_padat |= 0x0200;
-
- reg = 0;
- switch(vcc) {
- case 0: break;
- case 33: reg |= 0x0200; break;
- case 50: reg |= 0x0400; break;
- default: goto done;
- }
-
- /* Checking supported voltages */
-
- debug ("PIPR: 0x%x --> %s\n",
- pcmp->pcmc_pipr,
- (pcmp->pcmc_pipr & 0x00008000) ? "only 5 V" : "can do 3.3V");
-
- if (reg & 0x0200)
- immap->im_ioport.iop_pcdat &= !reg;
- if (reg & 0x0400)
- immap->im_ioport.iop_padat &= !reg;
- immap->im_ioport.iop_pcdir |= 0x0200;
- immap->im_ioport.iop_padir |= 0x0400;
- if (reg) {
- debug ("PCMCIA powered at %sV\n",
- (reg&0x0400) ? "5.0" : "3.3");
- } else {
- debug ("PCMCIA powered down\n");
- }
-
-done:
- debug ("Enable PCMCIA buffers and stop RESET\n");
- reg = PCMCIA_PGCRX(_slot_);
- reg &= ~__MY_PCMCIA_GCRX_CXRESET; /* active high */
- reg &= ~__MY_PCMCIA_GCRX_CXOE; /* active low */
- PCMCIA_PGCRX(_slot_) = reg;
- udelay(500);
-
- debug ("voltage_set: " PCMCIA_BOARD_MSG " Slot %c, DONE\n",
- slot+'A');
- return (0);
-}
-
-#endif /* R360MPI */
-
-/* -------------------------------------------------------------------- */
-/* KUP4K and KUP4X Boards */
-/* -------------------------------------------------------------------- */
-#if defined(CONFIG_KUP4K) || defined(CONFIG_KUP4X)
-
-#define PCMCIA_BOARD_MSG "KUP"
-
-#define KUP4K_PCMCIA_B_3V3 (0x00020000)
-
-static int hardware_enable(int slot)
-{
- volatile immap_t *immap;
- volatile cpm8xx_t *cp;
- volatile pcmconf8xx_t *pcmp;
- volatile sysconf8xx_t *sysp;
- uint reg, mask;
-
- debug ("hardware_enable: " PCMCIA_BOARD_MSG " Slot %c\n", 'A'+slot);
-
- udelay(10000);
-
- immap = (immap_t *)CFG_IMMR;
- sysp = (sysconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_siu_conf));
- pcmp = (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
- cp = (cpm8xx_t *)(&(((immap_t *)CFG_IMMR)->im_cpm));
-
- /*
- * Configure SIUMCR to enable PCMCIA port B
- * (VFLS[0:1] are not used for debugging, we connect FRZ# instead)
- */
- sysp->sc_siumcr &= ~SIUMCR_DBGC11; /* set DBGC to 00 */
-
- /* clear interrupt state, and disable interrupts */
- pcmp->pcmc_pscr = PCMCIA_MASK(slot);
- pcmp->pcmc_per &= ~PCMCIA_MASK(slot);
-
- /*
- * Disable interrupts, DMA, and PCMCIA buffers
- * (isolate the interface) and assert RESET signal
- */
- debug ("Disable PCMCIA buffers and assert RESET\n");
- reg = 0;
- reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
- reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */
- PCMCIA_PGCRX(slot) = reg;
- udelay(2500);
-
- /*
- * Configure Port B pins for
- * 3 Volts enable
- */
- if (slot) { /* Slot A is built-in */
- cp->cp_pbdir |= KUP4K_PCMCIA_B_3V3;
- cp->cp_pbpar &= ~KUP4K_PCMCIA_B_3V3;
- /* remove all power */
- cp->cp_pbdat |= KUP4K_PCMCIA_B_3V3; /* active low */
- }
- /*
- * Make sure there is a card in the slot, then configure the interface.
- */
- udelay(10000);
- debug ("[%d] %s: PIPR(%p)=0x%x\n",
- __LINE__,__FUNCTION__,
- &(pcmp->pcmc_pipr),pcmp->pcmc_pipr);
- if (pcmp->pcmc_pipr & (0x18000000 >> (slot << 4))) {
- printf (" No Card found\n");
- return (1);
- }
-
- /*
- * Power On.
- */
- printf("%s Slot %c:", slot ? "" : "\n", 'A' + slot);
- mask = PCMCIA_VS1(slot) | PCMCIA_VS2(slot);
- reg = pcmp->pcmc_pipr;
- debug ("PIPR: 0x%x ==> VS1=o%s, VS2=o%s\n",
- reg,
- (reg&PCMCIA_VS1(slot))?"n":"ff",
- (reg&PCMCIA_VS2(slot))?"n":"ff");
- if ((reg & mask) == mask) {
- puts (" 5.0V card found: NOT SUPPORTED !!!\n");
- } else {
- if(slot)
- cp->cp_pbdat &= ~KUP4K_PCMCIA_B_3V3;
- puts (" 3.3V card found: ");
- }
-#if 0
- /* VCC switch error flag, PCMCIA slot INPACK_ pin */
- cp->cp_pbdir &= ~(0x0020 | 0x0010);
- cp->cp_pbpar &= ~(0x0020 | 0x0010);
- udelay(500000);
-#endif
- debug ("Enable PCMCIA buffers and stop RESET\n");
- reg = PCMCIA_PGCRX(slot);
- reg &= ~__MY_PCMCIA_GCRX_CXRESET; /* active high */
- reg &= ~__MY_PCMCIA_GCRX_CXOE; /* active low */
- PCMCIA_PGCRX(slot) = reg;
-
- udelay(250000); /* some cards need >150 ms to come up :-( */
-
- debug ("# hardware_enable done\n");
-
- return (0);
-}
-
-
-#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
-static int hardware_disable(int slot)
-{
- volatile immap_t *immap;
- volatile cpm8xx_t *cp;
- volatile pcmconf8xx_t *pcmp;
- u_long reg;
-
- debug ("hardware_disable: " PCMCIA_BOARD_MSG " Slot %c\n", 'A'+slot);
-
- immap = (immap_t *)CFG_IMMR;
- pcmp = (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
- cp = (cpm8xx_t *)(&(((immap_t *)CFG_IMMR)->im_cpm));
-
- /* remove all power */
- if (slot)
- cp->cp_pbdat |= KUP4K_PCMCIA_B_3V3;
-
- /* Configure PCMCIA General Control Register */
- debug ("Disable PCMCIA buffers and assert RESET\n");
- reg = 0;
- reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
- reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */
- PCMCIA_PGCRX(slot) = reg;
-
- udelay(10000);
-
- return (0);
-}
-#endif /* CFG_CMD_PCMCIA */
-
-
-static int voltage_set(int slot, int vcc, int vpp)
-{
- volatile immap_t *immap;
- volatile cpm8xx_t *cp;
- volatile pcmconf8xx_t *pcmp;
- u_long reg;
-
- debug ("voltage_set: " \
- PCMCIA_BOARD_MSG \
- " Slot %c, Vcc=%d.%d, Vpp=%d.%d\n",
- 'A'+slot, vcc/10, vcc%10, vpp/10, vcc%10);
-
- if (!slot) /* Slot A is not configurable */
- return 0;
-
- immap = (immap_t *)CFG_IMMR;
- pcmp = (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
- cp = (cpm8xx_t *)(&(((immap_t *)CFG_IMMR)->im_cpm));
-
- /*
- * Disable PCMCIA buffers (isolate the interface)
- * and assert RESET signal
- */
- debug ("Disable PCMCIA buffers and assert RESET\n");
- reg = PCMCIA_PGCRX(slot);
- reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
- reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */
- PCMCIA_PGCRX(slot) = reg;
- udelay(500);
-
- debug ("PCMCIA power OFF\n");
- /*
- * Configure Port B pins for
- * 3 Volts enable
- */
- cp->cp_pbdir |= KUP4K_PCMCIA_B_3V3;
- cp->cp_pbpar &= ~KUP4K_PCMCIA_B_3V3;
- /* remove all power */
- cp->cp_pbdat |= KUP4K_PCMCIA_B_3V3; /* active low */
-
- switch(vcc) {
- case 0: break;
- case 33:
- cp->cp_pbdat &= ~KUP4K_PCMCIA_B_3V3;
- debug ("PCMCIA powered at 3.3V\n");
- break;
- case 50:
- debug ("PCMCIA: 5Volt vcc not supported\n");
- break;
- default:
- puts("PCMCIA: vcc not supported");
- break;
- }
- udelay(10000);
- /* Checking supported voltages */
-
- debug ("PIPR: 0x%x --> %s\n",
- pcmp->pcmc_pipr,
- (pcmp->pcmc_pipr & (0x80000000 >> (slot << 4)))
- ? "only 5 V --> NOT SUPPORTED"
- : "can do 3.3V");
-
-
- debug ("Enable PCMCIA buffers and stop RESET\n");
- reg = PCMCIA_PGCRX(slot);
- reg &= ~__MY_PCMCIA_GCRX_CXRESET; /* active high */
- reg &= ~__MY_PCMCIA_GCRX_CXOE; /* active low */
- PCMCIA_PGCRX(slot) = reg;
- udelay(500);
-
- debug ("voltage_set: " PCMCIA_BOARD_MSG " Slot %c, DONE\n",
- slot+'A');
- return (0);
-}
-
-#endif /* KUP4K || KUP4X */
-
-
-/* -------------------------------------------------------------------- */
-/* End of Board Specific Stuff */
-/* -------------------------------------------------------------------- */
-
-
-/* -------------------------------------------------------------------- */
-/* MPC8xx Specific Stuff - should go to MPC8xx directory */
-/* -------------------------------------------------------------------- */
-
-/*
- * Search this table to see if the windowsize is
- * supported...
- */
-
-#define M8XX_SIZES_NO 32
-
-static const u_int m8xx_size_to_gray[M8XX_SIZES_NO] =
-{ 0x00000001, 0x00000002, 0x00000008, 0x00000004,
- 0x00000080, 0x00000040, 0x00000010, 0x00000020,
- 0x00008000, 0x00004000, 0x00001000, 0x00002000,
- 0x00000100, 0x00000200, 0x00000800, 0x00000400,
-
- 0x0fffffff, 0xffffffff, 0xffffffff, 0xffffffff,
- 0x01000000, 0x02000000, 0xffffffff, 0x04000000,
- 0x00010000, 0x00020000, 0x00080000, 0x00040000,
- 0x00800000, 0x00400000, 0x00100000, 0x00200000 };
-
-
-/* -------------------------------------------------------------------- */
-
-#if ( ! defined(CONFIG_I82365) && ! defined(CONFIG_PXA_PCMCIA) )
-
-static u_int m8xx_get_graycode(u_int size)
-{
- u_int k;
-
- for (k = 0; k < M8XX_SIZES_NO; k++) {
- if(m8xx_size_to_gray[k] == size)
+ puts (" Unknown");
break;
}
-
- if((k == M8XX_SIZES_NO) || (m8xx_size_to_gray[k] == -1))
- k = -1;
-
- return k;
-}
-
-#endif /* CONFIG_I82365 */
-
-/* -------------------------------------------------------------------- */
-
-#if 0
-static u_int m8xx_get_speed(u_int ns, u_int is_io)
-{
- u_int reg, clocks, psst, psl, psht;
-
- if(!ns) {
-
- /*
- * We get called with IO maps setup to 0ns
- * if not specified by the user.
- * They should be 255ns.
- */
-
- if(is_io)
- ns = 255;
- else
- ns = 100; /* fast memory if 0 */
- }
-
- /*
- * In PSST, PSL, PSHT fields we tell the controller
- * timing parameters in CLKOUT clock cycles.
- * CLKOUT is the same as GCLK2_50.
- */
-
-/* how we want to adjust the timing - in percent */
-
-#define ADJ 180 /* 80 % longer accesstime - to be sure */
-
- clocks = ((M8XX_BUSFREQ / 1000) * ns) / 1000;
- clocks = (clocks * ADJ) / (100*1000);
-
- if(clocks >= PCMCIA_BMT_LIMIT) {
- DEBUG(0, "Max access time limit reached\n");
- clocks = PCMCIA_BMT_LIMIT-1;
- }
-
- psst = clocks / 7; /* setup time */
- psht = clocks / 7; /* hold time */
- psl = (clocks * 5) / 7; /* strobe length */
-
- psst += clocks - (psst + psht + psl);
-
- reg = psst << 12;
- reg |= psl << 7;
- reg |= psht << 16;
-
- return reg;
-}
-#endif
-
-/* -------------------------------------------------------------------- */
-
-#if defined(CONFIG_IDE_8xx_PCCARD) || defined(CONFIG_PXA_PCMCIA)
-static void print_funcid (int func)
-{
- puts (indent);
- switch (func) {
- case CISTPL_FUNCID_MULTI:
- puts (" Multi-Function");
- break;
- case CISTPL_FUNCID_MEMORY:
- puts (" Memory");
- break;
- case CISTPL_FUNCID_SERIAL:
- puts (" Serial Port");
- break;
- case CISTPL_FUNCID_PARALLEL:
- puts (" Parallel Port");
- break;
- case CISTPL_FUNCID_FIXED:
- puts (" Fixed Disk");
- break;
- case CISTPL_FUNCID_VIDEO:
- puts (" Video Adapter");
- break;
- case CISTPL_FUNCID_NETWORK:
- puts (" Network Adapter");
- break;
- case CISTPL_FUNCID_AIMS:
- puts (" AIMS Card");
- break;
- case CISTPL_FUNCID_SCSI:
- puts (" SCSI Adapter");
- break;
- default:
- puts (" Unknown");
- break;
- }
puts (" Card\n");
}
-#endif /* CONFIG_IDE_8xx_PCCARD */
-/* -------------------------------------------------------------------- */
-
-#if defined(CONFIG_IDE_8xx_PCCARD) || defined(CONFIG_PXA_PCMCIA)
static void print_fixed (volatile uchar *p)
{
if (p == NULL)
@@ -2626,16 +169,16 @@ static void print_fixed (volatile uchar *p)
puts(indent);
switch (*p) {
- case CISTPL_FUNCE_IDE_IFACE:
- { uchar iface = *(p+2);
+ case CISTPL_FUNCE_IDE_IFACE:
+ { uchar iface = *(p+2);
puts ((iface == CISTPL_IDE_INTERFACE) ? " IDE" : " unknown");
puts (" interface ");
break;
- }
- case CISTPL_FUNCE_IDE_MASTER:
- case CISTPL_FUNCE_IDE_SLAVE:
- { uchar f1 = *(p+2);
+ }
+ case CISTPL_FUNCE_IDE_MASTER:
+ case CISTPL_FUNCE_IDE_SLAVE:
+ { uchar f1 = *(p+2);
uchar f2 = *(p+4);
puts ((f1 & CISTPL_IDE_SILICON) ? " [silicon]" : " [rotating]");
@@ -2667,23 +210,10 @@ static void print_fixed (volatile uchar *p)
puts (" [IOis16]");
break;
- }
+ }
}
putc ('\n');
}
-#endif /* CONFIG_IDE_8xx_PCCARD */
-
-/* -------------------------------------------------------------------- */
-
-#if defined(CONFIG_IDE_8xx_PCCARD) || defined(CONFIG_PXA_PCMCIA)
-
-#define MAX_IDENT_CHARS 64
-#define MAX_IDENT_FIELDS 4
-
-static uchar *known_cards[] = {
- (uchar *)"ARGOSY PnPIDE D5",
- NULL
-};
static int identify (volatile uchar *p)
{
@@ -2735,576 +265,101 @@ static int identify (volatile uchar *p)
return (0); /* don't know */
}
-#endif /* CONFIG_IDE_8xx_PCCARD */
-
-/* -------------------------------------------------------------------- */
-/* NETTA board by Intracom S.A. */
-/* -------------------------------------------------------------------- */
-
-#if defined(CONFIG_NETTA)
-
-/* some sane bit macros */
-#define _BD(_b) (1U << (31-(_b)))
-#define _BDR(_l, _h) (((((1U << (31-(_l))) - 1) << 1) | 1) & ~((1U << (31-(_h))) - 1))
-
-#define _BW(_b) (1U << (15-(_b)))
-#define _BWR(_l, _h) (((((1U << (15-(_l))) - 1) << 1) | 1) & ~((1U << (15-(_h))) - 1))
-
-#define _BB(_b) (1U << (7-(_b)))
-#define _BBR(_l, _h) (((((1U << (7-(_l))) - 1) << 1) | 1) & ~((1U << (7-(_h))) - 1))
-
-#define _B(_b) _BD(_b)
-#define _BR(_l, _h) _BDR(_l, _h)
-
-#define PCMCIA_BOARD_MSG "NETTA"
-
-static const unsigned short vppd_masks[2] = { _BW(14), _BW(15) };
-
-static void cfg_vppd(int no)
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- unsigned short mask;
-
- if ((unsigned int)no >= sizeof(vppd_masks)/sizeof(vppd_masks[0]))
- return;
-
- mask = vppd_masks[no];
-
- immap->im_ioport.iop_papar &= ~mask;
- immap->im_ioport.iop_paodr &= ~mask;
- immap->im_ioport.iop_padir |= mask;
-}
-
-static void set_vppd(int no, int what)
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- unsigned short mask;
-
- if ((unsigned int)no >= sizeof(vppd_masks)/sizeof(vppd_masks[0]))
- return;
-
- mask = vppd_masks[no];
-
- if (what)
- immap->im_ioport.iop_padat |= mask;
- else
- immap->im_ioport.iop_padat &= ~mask;
-}
-
-static const unsigned short vccd_masks[2] = { _BW(10), _BW(6) };
-
-static void cfg_vccd(int no)
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- unsigned short mask;
-
- if ((unsigned int)no >= sizeof(vccd_masks)/sizeof(vccd_masks[0]))
- return;
-
- mask = vccd_masks[no];
-
- immap->im_ioport.iop_papar &= ~mask;
- immap->im_ioport.iop_paodr &= ~mask;
- immap->im_ioport.iop_padir |= mask;
-}
-
-static void set_vccd(int no, int what)
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- unsigned short mask;
-
- if ((unsigned int)no >= sizeof(vccd_masks)/sizeof(vccd_masks[0]))
- return;
-
- mask = vccd_masks[no];
-
- if (what)
- immap->im_ioport.iop_padat |= mask;
- else
- immap->im_ioport.iop_padat &= ~mask;
-}
-
-static const unsigned short oc_mask = _BW(8);
-
-static void cfg_oc(void)
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- unsigned short mask = oc_mask;
-
- immap->im_ioport.iop_pcdir &= ~mask;
- immap->im_ioport.iop_pcso &= ~mask;
- immap->im_ioport.iop_pcint &= ~mask;
- immap->im_ioport.iop_pcpar &= ~mask;
-}
-
-static int get_oc(void)
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- unsigned short mask = oc_mask;
- int what;
-
- what = !!(immap->im_ioport.iop_pcdat & mask);;
- return what;
-}
-
-static const unsigned short shdn_mask = _BW(12);
-
-static void cfg_shdn(void)
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- unsigned short mask;
-
- mask = shdn_mask;
-
- immap->im_ioport.iop_papar &= ~mask;
- immap->im_ioport.iop_paodr &= ~mask;
- immap->im_ioport.iop_padir |= mask;
-}
-static void set_shdn(int what)
+int check_ide_device (int slot)
{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- unsigned short mask;
-
- mask = shdn_mask;
-
- if (what)
- immap->im_ioport.iop_padat |= mask;
- else
- immap->im_ioport.iop_padat &= ~mask;
-}
-
-static void cfg_ports (void);
-
-static int hardware_enable(int slot)
-{
- volatile immap_t *immap;
- volatile cpm8xx_t *cp;
- volatile pcmconf8xx_t *pcmp;
- volatile sysconf8xx_t *sysp;
- uint reg, pipr, mask;
+ volatile uchar *ident = NULL;
+ volatile uchar *feature_p[MAX_FEATURES];
+ volatile uchar *p, *start, *addr;
+ int n_features = 0;
+ uchar func_id = ~0;
+ uchar code, len;
+ ushort config_base = 0;
+ int found = 0;
int i;
- debug ("hardware_enable: " PCMCIA_BOARD_MSG " Slot %c\n", 'A'+slot);
-
- udelay(10000);
-
- immap = (immap_t *)CFG_IMMR;
- sysp = (sysconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_siu_conf));
- pcmp = (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
- cp = (cpm8xx_t *)(&(((immap_t *)CFG_IMMR)->im_cpm));
-
- /* Configure Ports for TPS2211A PC-Card Power-Interface Switch */
- cfg_ports ();
-
- /* clear interrupt state, and disable interrupts */
- pcmp->pcmc_pscr = PCMCIA_MASK(_slot_);
- pcmp->pcmc_per &= ~PCMCIA_MASK(_slot_);
+ addr = (volatile uchar *)(CFG_PCMCIA_MEM_ADDR +
+ CFG_PCMCIA_MEM_SIZE * (slot * 4));
+ debug ("PCMCIA MEM: %08lX\n", (ulong)addr);
- /*
- * Disable interrupts, DMA, and PCMCIA buffers
- * (isolate the interface) and assert RESET signal
- */
- debug ("Disable PCMCIA buffers and assert RESET\n");
- reg = 0;
- reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
- reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */
- PCMCIA_PGCRX(_slot_) = reg;
+ start = p = (volatile uchar *) addr;
- udelay(500);
+ while ((p - start) < MAX_TUPEL_SZ) {
- /*
- * Make sure there is a card in the slot, then configure the interface.
- */
- udelay(10000);
- debug ("[%d] %s: PIPR(%p)=0x%x\n",
- __LINE__,__FUNCTION__,
- &(pcmp->pcmc_pipr),pcmp->pcmc_pipr);
- if (pcmp->pcmc_pipr & (0x18000000 >> (slot << 4))) {
- printf (" No Card found\n");
- return (1);
- }
+ code = *p; p += 2;
- /*
- * Power On: Set VAVCC to 3.3V or 5V, set VAVPP to Hi-Z
- */
- mask = PCMCIA_VS1(slot) | PCMCIA_VS2(slot);
- pipr = pcmp->pcmc_pipr;
- debug ("PIPR: 0x%x ==> VS1=o%s, VS2=o%s\n",
- pipr,
- (reg&PCMCIA_VS1(slot))?"n":"ff",
- (reg&PCMCIA_VS2(slot))?"n":"ff");
+ if (code == 0xFF) { /* End of chain */
+ break;
+ }
- if ((pipr & mask) == mask) {
- set_vppd(0, 1); set_vppd(1, 1); /* VAVPP => Hi-Z */
- set_vccd(0, 0); set_vccd(1, 1); /* 5V on, 3V off */
- puts (" 5.0V card found: ");
- } else {
- set_vppd(0, 1); set_vppd(1, 1); /* VAVPP => Hi-Z */
- set_vccd(0, 1); set_vccd(1, 0); /* 5V off, 3V on */
- puts (" 3.3V card found: ");
- }
+ len = *p; p += 2;
+#if defined(DEBUG) && (DEBUG > 1)
+ { volatile uchar *q = p;
+ printf ("\nTuple code %02x length %d\n\tData:",
+ code, len);
- /* Wait 500 ms; use this to check for over-current */
- for (i=0; i<5000; ++i) {
- if (!get_oc()) {
- printf (" *** Overcurrent - Safety shutdown ***\n");
- set_vccd(0, 0); set_vccd(1, 0); /* VAVPP => Hi-Z */
- return (1);
+ for (i = 0; i < len; ++i) {
+ printf (" %02x", *q);
+ q+= 2;
+ }
}
- udelay (100);
+#endif /* DEBUG */
+ switch (code) {
+ case CISTPL_VERS_1:
+ ident = p + 4;
+ break;
+ case CISTPL_FUNCID:
+ /* Fix for broken SanDisk which may have 0x80 bit set */
+ func_id = *p & 0x7F;
+ break;
+ case CISTPL_FUNCE:
+ if (n_features < MAX_FEATURES)
+ feature_p[n_features++] = p;
+ break;
+ case CISTPL_CONFIG:
+ config_base = (*(p+6) << 8) + (*(p+4));
+ debug ("\n## Config_base = %04x ###\n", config_base);
+ default:
+ break;
+ }
+ p += 2 * len;
}
- debug ("Enable PCMCIA buffers and stop RESET\n");
- reg = PCMCIA_PGCRX(_slot_);
- reg &= ~__MY_PCMCIA_GCRX_CXRESET; /* active high */
- reg &= ~__MY_PCMCIA_GCRX_CXOE; /* active low */
- PCMCIA_PGCRX(_slot_) = reg;
-
- udelay(250000); /* some cards need >150 ms to come up :-( */
-
- debug ("# hardware_enable done\n");
-
- return (0);
-}
-
-
-#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
-static int hardware_disable(int slot)
-{
- volatile immap_t *immap;
- volatile pcmconf8xx_t *pcmp;
- u_long reg;
-
- debug ("hardware_disable: " PCMCIA_BOARD_MSG " Slot %c\n", 'A'+slot);
-
- immap = (immap_t *)CFG_IMMR;
- pcmp = (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
-
- /* Configure PCMCIA General Control Register */
- debug ("Disable PCMCIA buffers and assert RESET\n");
- reg = 0;
- reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
- reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */
- PCMCIA_PGCRX(_slot_) = reg;
-
- /* All voltages off / Hi-Z */
- set_vppd(0, 1); set_vppd(1, 1);
- set_vccd(0, 1); set_vccd(1, 1);
-
- udelay(10000);
-
- return (0);
-}
-#endif /* CFG_CMD_PCMCIA */
-
-
-static int voltage_set(int slot, int vcc, int vpp)
-{
- volatile immap_t *immap;
- volatile cpm8xx_t *cp;
- volatile pcmconf8xx_t *pcmp;
- u_long reg;
- ushort sreg;
-
- debug ("voltage_set: "
- PCMCIA_BOARD_MSG
- " Slot %c, Vcc=%d.%d, Vpp=%d.%d\n",
- 'A'+slot, vcc/10, vcc%10, vpp/10, vcc%10);
-
- immap = (immap_t *)CFG_IMMR;
- cp = (cpm8xx_t *)(&(((immap_t *)CFG_IMMR)->im_cpm));
- pcmp = (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
- /*
- * Disable PCMCIA buffers (isolate the interface)
- * and assert RESET signal
- */
- debug ("Disable PCMCIA buffers and assert RESET\n");
- reg = PCMCIA_PGCRX(_slot_);
- reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
- reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */
- PCMCIA_PGCRX(_slot_) = reg;
- udelay(500);
-
- /*
- * Configure Port C pins for
- * 5 Volts Enable and 3 Volts enable,
- * Turn all power pins to Hi-Z
- */
- debug ("PCMCIA power OFF\n");
- cfg_ports (); /* Enables switch, but all in Hi-Z */
-
- sreg = immap->im_ioport.iop_pcdat;
- set_vppd(0, 1); set_vppd(1, 1);
-
- switch(vcc) {
- case 0:
- break; /* Switch off */
-
- case 33:
- set_vccd(0, 1); set_vccd(1, 0);
- break;
+ found = identify (ident);
- case 50:
- set_vccd(0, 0); set_vccd(1, 1);
- break;
+ if (func_id != ((uchar)~0)) {
+ print_funcid (func_id);
- default:
- goto done;
+ if (func_id == CISTPL_FUNCID_FIXED)
+ found = 1;
+ else
+ return (1); /* no disk drive */
}
- /* Checking supported voltages */
-
- debug ("PIPR: 0x%x --> %s\n",
- pcmp->pcmc_pipr,
- (pcmp->pcmc_pipr & 0x00008000) ? "only 5 V" : "can do 3.3V");
-
-done:
- debug ("Enable PCMCIA buffers and stop RESET\n");
- reg = PCMCIA_PGCRX(_slot_);
- reg &= ~__MY_PCMCIA_GCRX_CXRESET; /* active high */
- reg &= ~__MY_PCMCIA_GCRX_CXOE; /* active low */
- PCMCIA_PGCRX(_slot_) = reg;
- udelay(500);
-
- debug ("voltage_set: " PCMCIA_BOARD_MSG " Slot %c, DONE\n",
- slot+'A');
- return (0);
-}
-
-static void cfg_ports (void)
-{
- volatile immap_t *immap;
- volatile cpm8xx_t *cp;
-
- immap = (immap_t *)CFG_IMMR;
- cp = (cpm8xx_t *)(&(((immap_t *)CFG_IMMR)->im_cpm));
-
-
- cfg_vppd(0); cfg_vppd(1); /* VPPD0,VPPD1 VAVPP => Hi-Z */
- cfg_vccd(0); cfg_vccd(1); /* 3V and 5V off */
- cfg_shdn();
- cfg_oc();
-
- /*
- * Configure Port A for TPS2211 PC-Card Power-Interface Switch
- *
- * Switch off all voltages, assert shutdown
- */
- set_vppd(0, 1); set_vppd(1, 1);
- set_vccd(0, 0); set_vccd(1, 0);
- set_shdn(1);
-
- udelay(100000);
-}
-
-#endif /* NETTA */
-
-
-/* -------------------------------------------------------------------- */
-/* UC100 Boards */
-/* -------------------------------------------------------------------- */
-
-#if defined(CONFIG_UC100)
-
-#define PCMCIA_BOARD_MSG "UC100"
-
-/*
- * Remark: don't turn off OE "__MY_PCMCIA_GCRX_CXOE" on UC100 board.
- * This leads to board-hangup! (sr, 8 Dez. 2004)
- */
-
-static void cfg_ports (void);
-
-static int hardware_enable(int slot)
-{
- volatile immap_t *immap;
- volatile cpm8xx_t *cp;
- volatile pcmconf8xx_t *pcmp;
- volatile sysconf8xx_t *sysp;
- uint reg, mask;
-
- debug ("hardware_enable: " PCMCIA_BOARD_MSG " Slot %c\n", 'A'+slot);
-
- udelay(10000);
-
- immap = (immap_t *)CFG_IMMR;
- sysp = (sysconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_siu_conf));
- pcmp = (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
- cp = (cpm8xx_t *)(&(((immap_t *)CFG_IMMR)->im_cpm));
-
- /* Configure Ports for TPS2211A PC-Card Power-Interface Switch */
- cfg_ports ();
-
- /*
- * Configure SIUMCR to enable PCMCIA port B
- * (VFLS[0:1] are not used for debugging, we connect FRZ# instead)
- */
- sysp->sc_siumcr &= ~SIUMCR_DBGC11; /* set DBGC to 00 */
-
- /* clear interrupt state, and disable interrupts */
- pcmp->pcmc_pscr = PCMCIA_MASK(_slot_);
- pcmp->pcmc_per &= ~PCMCIA_MASK(_slot_);
-
- /*
- * Disable interrupts, DMA, and PCMCIA buffers
- * (isolate the interface) and assert RESET signal
- */
- debug ("Disable PCMCIA buffers and assert RESET\n");
- reg = 0;
- reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
- PCMCIA_PGCRX(_slot_) = reg;
- udelay(500);
-
- /*
- * Make sure there is a card in the slot, then configure the interface.
- */
- udelay(10000);
- debug ("[%d] %s: PIPR(%p)=0x%x\n",
- __LINE__,__FUNCTION__,
- &(pcmp->pcmc_pipr),pcmp->pcmc_pipr);
- if (pcmp->pcmc_pipr & (0x18000000 >> (slot << 4))) {
- printf (" No Card found\n");
- return (1);
+ for (i=0; i<n_features; ++i) {
+ print_fixed (feature_p[i]);
}
- /*
- * Power On.
- */
- mask = PCMCIA_VS1(slot) | PCMCIA_VS2(slot);
- reg = pcmp->pcmc_pipr;
- debug ("PIPR: 0x%x ==> VS1=o%s, VS2=o%s\n",
- reg,
- (reg&PCMCIA_VS1(slot))?"n":"ff",
- (reg&PCMCIA_VS2(slot))?"n":"ff");
- if ((reg & mask) == mask) {
- puts (" 5.0V card found: ");
- } else {
- puts (" 3.3V card found: ");
+ if (!found) {
+ printf ("unknown card type\n");
+ return (1);
}
- /* switch VCC on */
- immap->im_ioport.iop_padat |= 0x8000; /* power enable 3.3V */
-
- udelay(10000);
-
- debug ("Enable PCMCIA buffers and stop RESET\n");
- reg = PCMCIA_PGCRX(_slot_);
- reg &= ~__MY_PCMCIA_GCRX_CXRESET; /* active high */
- reg &= ~__MY_PCMCIA_GCRX_CXOE; /* active low */
- PCMCIA_PGCRX(_slot_) = reg;
-
- udelay(250000); /* some cards need >150 ms to come up :-( */
-
- debug ("# hardware_enable done\n");
-
- return (0);
-}
-
-
-#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
-static int hardware_disable(int slot)
-{
- volatile immap_t *immap;
- volatile cpm8xx_t *cp;
- volatile pcmconf8xx_t *pcmp;
- u_long reg;
-
- debug ("hardware_disable: " PCMCIA_BOARD_MSG " Slot %c\n", 'A'+slot);
-
- immap = (immap_t *)CFG_IMMR;
- pcmp = (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
-
- /* switch VCC off */
- immap->im_ioport.iop_padat &= ~0x8000; /* power disable 3.3V */
-
- /* Configure PCMCIA General Control Register */
- debug ("Disable PCMCIA buffers and assert RESET\n");
- reg = 0;
- reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
- PCMCIA_PGCRX(_slot_) = reg;
-
- udelay(10000);
-
- return (0);
-}
-#endif /* CFG_CMD_PCMCIA */
-
-
-static int voltage_set(int slot, int vcc, int vpp)
-{
- volatile immap_t *immap;
- volatile pcmconf8xx_t *pcmp;
- u_long reg;
-
- debug ("voltage_set: "
- PCMCIA_BOARD_MSG
- " Slot %c, Vcc=%d.%d, Vpp=%d.%d\n",
- 'A'+slot, vcc/10, vcc%10, vpp/10, vcc%10);
-
- immap = (immap_t *)CFG_IMMR;
- pcmp = (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
- /*
- * Disable PCMCIA buffers (isolate the interface)
- * and assert RESET signal
- */
- debug ("Disable PCMCIA buffers and assert RESET\n");
- reg = PCMCIA_PGCRX(_slot_);
- reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
- PCMCIA_PGCRX(_slot_) = reg;
- udelay(500);
-
- /*
- * Configure Port C pins for
- * 5 Volts Enable and 3 Volts enable,
- * Turn all power pins to Hi-Z
- */
- debug ("PCMCIA power OFF\n");
- cfg_ports (); /* Enables switch, but all in Hi-Z */
-
- debug ("Enable PCMCIA buffers and stop RESET\n");
- reg = PCMCIA_PGCRX(_slot_);
- reg &= ~__MY_PCMCIA_GCRX_CXRESET; /* active high */
- reg &= ~__MY_PCMCIA_GCRX_CXOE; /* active low */
- PCMCIA_PGCRX(_slot_) = reg;
- udelay(500);
+ ide_devices_found |= (1 << slot);
- debug ("voltage_set: " PCMCIA_BOARD_MSG " Slot %c, DONE\n",
- slot+'A');
+#if CONFIG_CPC45
+#else
+ /* set I/O area in config reg -> only valid for ARGOSY D5!!! */
+ *((uchar *)(addr + config_base)) = 1;
+#endif
+#if 0
+ printf("\n## Config_base = %04x ###\n", config_base);
+ printf("Configuration Option Register: %02x @ %x\n", readb(addr + config_base), addr + config_base);
+ printf("Card Configuration and Status Register: %02x\n", readb(addr + config_base + 2));
+ printf("Pin Replacement Register Register: %02x\n", readb(addr + config_base + 4));
+ printf("Socket and Copy Register: %02x\n", readb(addr + config_base + 6));
+#endif
return (0);
}
-static void cfg_ports (void)
-{
- volatile immap_t *immap;
-
- immap = (immap_t *)CFG_IMMR;
-
- /*
- * Configure Port A for MAX1602 PC-Card Power-Interface Switch
- */
- immap->im_ioport.iop_padat &= ~0x8000; /* set port x output to low */
- immap->im_ioport.iop_padir |= 0x8000; /* enable port x as output */
-
- debug ("Set Port A: PAR: %08x DIR: %08x DAT: %08x\n",
- immap->im_ioport.iop_papar, immap->im_ioport.iop_padir,
- immap->im_ioport.iop_padat);
-}
-
-#endif /* UC100 */
-
-
-/* -------------------------------------------------------------------- */
-
-#endif /* CFG_CMD_PCMCIA || (CFG_CMD_IDE && CONFIG_IDE_8xx_PCCARD) */
-
-/**************************************************/
-
-#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
-U_BOOT_CMD(
- pinit, 2, 1, do_pinit,
- "pinit - PCMCIA sub-system\n",
- "on - power on PCMCIA socket\n"
- "pinit off - power off PCMCIA socket\n"
-);
-#endif
+#endif /* CHECK_IDE_DEVICE */
diff --git a/common/cmd_reginfo.c b/common/cmd_reginfo.c
index 15ac16aef4..f428f7e9aa 100644
--- a/common/cmd_reginfo.c
+++ b/common/cmd_reginfo.c
@@ -328,7 +328,7 @@ int do_reginfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
(*(volatile ulong*)MPC5XXX_ADDECR & 0x02000000) ? 1 : 0);
printf ("\tSDRAMCS0: %08X\n",
*(volatile ulong*)MPC5XXX_SDRAM_CS0CFG);
- printf ("\tSDRAMCS0: %08X\n",
+ printf ("\tSDRAMCS1: %08X\n",
*(volatile ulong*)MPC5XXX_SDRAM_CS1CFG);
#endif /* CONFIG_MPC5200 */
return 0;
diff --git a/common/cmd_usb.c b/common/cmd_usb.c
index fdfd042aca..28c05aa20e 100644
--- a/common/cmd_usb.c
+++ b/common/cmd_usb.c
@@ -186,7 +186,7 @@ void usb_display_conf_desc(struct usb_config_descriptor *config,struct usb_devic
void usb_display_if_desc(struct usb_interface_descriptor *ifdesc,struct usb_device *dev)
{
printf(" Interface: %d\n",ifdesc->bInterfaceNumber);
- printf(" - Alternate Settings %d, Endpoints: %d\n",ifdesc->bAlternateSetting,ifdesc->bNumEndpoints);
+ printf(" - Alternate Setting %d, Endpoints: %d\n",ifdesc->bAlternateSetting,ifdesc->bNumEndpoints);
printf(" - Class ");
usb_display_class_sub(ifdesc->bInterfaceClass,ifdesc->bInterfaceSubClass,ifdesc->bInterfaceProtocol);
printf("\n");
@@ -444,6 +444,7 @@ int do_usb (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
int i;
struct usb_device *dev = NULL;
+ extern char usb_started;
#ifdef CONFIG_USB_STORAGE
block_dev_desc_t *stor_dev;
#endif
@@ -477,6 +478,10 @@ int do_usb (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
usb_stop();
return 0;
}
+ if (!usb_started) {
+ printf("USB is stopped. Please issue 'usb start' first.\n");
+ return 1;
+ }
if (strncmp(argv[1],"tree",4) == 0) {
printf("\nDevice Tree:\n");
usb_show_tree(usb_get_dev_index(0));
diff --git a/common/command.c b/common/command.c
index 2b4c5547b3..e917975a73 100644
--- a/common/command.c
+++ b/common/command.c
@@ -42,6 +42,8 @@ U_BOOT_CMD(
NULL
);
+#if (CONFIG_COMMANDS & CFG_CMD_ECHO)
+
int
do_echo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
@@ -74,6 +76,8 @@ U_BOOT_CMD(
" - echo args to console; \\c suppresses newline\n"
);
+#endif /* CFG_CMD_ECHO */
+
#ifdef CFG_HUSH_PARSER
int
diff --git a/common/console.c b/common/console.c
index 3c535d23d6..e9f23bec18 100644
--- a/common/console.c
+++ b/common/console.c
@@ -27,6 +27,8 @@
#include <console.h>
#include <exports.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#ifdef CONFIG_AMIGAONEG3SE
int console_changed = 0;
#endif
@@ -48,7 +50,6 @@ extern int overwrite_console (void);
static int console_setfile (int file, device_t * dev)
{
- DECLARE_GLOBAL_DATA_PTR;
int error = 0;
if (dev == NULL)
@@ -161,8 +162,6 @@ void fprintf (int file, const char *fmt, ...)
int getc (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
if (gd->flags & GD_FLG_DEVINIT) {
/* Get from the standard input */
return fgetc (stdin);
@@ -174,8 +173,6 @@ int getc (void)
int tstc (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
if (gd->flags & GD_FLG_DEVINIT) {
/* Test the standard input */
return ftstc (stdin);
@@ -187,8 +184,6 @@ int tstc (void)
void putc (const char c)
{
- DECLARE_GLOBAL_DATA_PTR;
-
#ifdef CONFIG_SILENT_CONSOLE
if (gd->flags & GD_FLG_SILENT)
return;
@@ -205,8 +200,6 @@ void putc (const char c)
void puts (const char *s)
{
- DECLARE_GLOBAL_DATA_PTR;
-
#ifdef CONFIG_SILENT_CONSOLE
if (gd->flags & GD_FLG_SILENT)
return;
@@ -258,8 +251,6 @@ static int ctrlc_disabled = 0; /* see disable_ctrl() */
static int ctrlc_was_pressed = 0;
int ctrlc (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
if (!ctrlc_disabled && gd->have_console) {
if (tstc ()) {
switch (getc ()) {
@@ -370,8 +361,6 @@ int console_assign (int file, char *devname)
/* Called before relocation - use serial functions */
int console_init_f (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->have_console = 1;
#ifdef CONFIG_SILENT_CONSOLE
@@ -407,7 +396,6 @@ device_t *search_device (int flags, char *name)
/* Called after the relocation - use desired console functions */
int console_init_r (void)
{
- DECLARE_GLOBAL_DATA_PTR;
char *stdinname, *stdoutname, *stderrname;
device_t *inputdev = NULL, *outputdev = NULL, *errdev = NULL;
#ifdef CFG_CONSOLE_ENV_OVERWRITE
@@ -499,8 +487,6 @@ int console_init_r (void)
/* Called after the relocation - use desired console functions */
int console_init_r (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
device_t *inputdev = NULL, *outputdev = NULL;
int i, items = ListNumItems (devlist);
diff --git a/common/crc16.c b/common/crc16.c
new file mode 100644
index 0000000000..6904365e59
--- /dev/null
+++ b/common/crc16.c
@@ -0,0 +1,107 @@
+/*
+ *==========================================================================
+ *
+ * crc16.c
+ *
+ * 16 bit CRC with polynomial x^16+x^12+x^5+1
+ *
+ *==========================================================================
+ *####ECOSGPLCOPYRIGHTBEGIN####
+ * -------------------------------------------
+ * This file is part of eCos, the Embedded Configurable Operating System.
+ * Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
+ * Copyright (C) 2002 Gary Thomas
+ *
+ * eCos is free software; you can redistribute it and/or modify it under
+ * the terms of the GNU General Public License as published by the Free
+ * Software Foundation; either version 2 or (at your option) any later version.
+ *
+ * eCos is distributed in the hope that it will be useful, but WITHOUT ANY
+ * WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with eCos; if not, write to the Free Software Foundation, Inc.,
+ * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+ *
+ * As a special exception, if other files instantiate templates or use macros
+ * or inline functions from this file, or you compile this file and link it
+ * with other works to produce a work based on this file, this file does not
+ * by itself cause the resulting work to be covered by the GNU General Public
+ * License. However the source code for this file must still be made available
+ * in accordance with section (3) of the GNU General Public License.
+ *
+ * This exception does not invalidate any other reasons why a work based on
+ * this file might be covered by the GNU General Public License.
+ *
+ * Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
+ * at http: *sources.redhat.com/ecos/ecos-license/
+ * -------------------------------------------
+ *####ECOSGPLCOPYRIGHTEND####
+ *==========================================================================
+ *#####DESCRIPTIONBEGIN####
+ *
+ * Author(s): gthomas
+ * Contributors: gthomas,asl
+ * Date: 2001-01-31
+ * Purpose:
+ * Description:
+ *
+ * This code is part of eCos (tm).
+ *
+ *####DESCRIPTIONEND####
+ *
+ *==========================================================================
+ */
+
+#include "crc.h"
+
+/* Table of CRC constants - implements x^16+x^12+x^5+1 */
+static const uint16_t crc16_tab[] = {
+ 0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50a5, 0x60c6, 0x70e7,
+ 0x8108, 0x9129, 0xa14a, 0xb16b, 0xc18c, 0xd1ad, 0xe1ce, 0xf1ef,
+ 0x1231, 0x0210, 0x3273, 0x2252, 0x52b5, 0x4294, 0x72f7, 0x62d6,
+ 0x9339, 0x8318, 0xb37b, 0xa35a, 0xd3bd, 0xc39c, 0xf3ff, 0xe3de,
+ 0x2462, 0x3443, 0x0420, 0x1401, 0x64e6, 0x74c7, 0x44a4, 0x5485,
+ 0xa56a, 0xb54b, 0x8528, 0x9509, 0xe5ee, 0xf5cf, 0xc5ac, 0xd58d,
+ 0x3653, 0x2672, 0x1611, 0x0630, 0x76d7, 0x66f6, 0x5695, 0x46b4,
+ 0xb75b, 0xa77a, 0x9719, 0x8738, 0xf7df, 0xe7fe, 0xd79d, 0xc7bc,
+ 0x48c4, 0x58e5, 0x6886, 0x78a7, 0x0840, 0x1861, 0x2802, 0x3823,
+ 0xc9cc, 0xd9ed, 0xe98e, 0xf9af, 0x8948, 0x9969, 0xa90a, 0xb92b,
+ 0x5af5, 0x4ad4, 0x7ab7, 0x6a96, 0x1a71, 0x0a50, 0x3a33, 0x2a12,
+ 0xdbfd, 0xcbdc, 0xfbbf, 0xeb9e, 0x9b79, 0x8b58, 0xbb3b, 0xab1a,
+ 0x6ca6, 0x7c87, 0x4ce4, 0x5cc5, 0x2c22, 0x3c03, 0x0c60, 0x1c41,
+ 0xedae, 0xfd8f, 0xcdec, 0xddcd, 0xad2a, 0xbd0b, 0x8d68, 0x9d49,
+ 0x7e97, 0x6eb6, 0x5ed5, 0x4ef4, 0x3e13, 0x2e32, 0x1e51, 0x0e70,
+ 0xff9f, 0xefbe, 0xdfdd, 0xcffc, 0xbf1b, 0xaf3a, 0x9f59, 0x8f78,
+ 0x9188, 0x81a9, 0xb1ca, 0xa1eb, 0xd10c, 0xc12d, 0xf14e, 0xe16f,
+ 0x1080, 0x00a1, 0x30c2, 0x20e3, 0x5004, 0x4025, 0x7046, 0x6067,
+ 0x83b9, 0x9398, 0xa3fb, 0xb3da, 0xc33d, 0xd31c, 0xe37f, 0xf35e,
+ 0x02b1, 0x1290, 0x22f3, 0x32d2, 0x4235, 0x5214, 0x6277, 0x7256,
+ 0xb5ea, 0xa5cb, 0x95a8, 0x8589, 0xf56e, 0xe54f, 0xd52c, 0xc50d,
+ 0x34e2, 0x24c3, 0x14a0, 0x0481, 0x7466, 0x6447, 0x5424, 0x4405,
+ 0xa7db, 0xb7fa, 0x8799, 0x97b8, 0xe75f, 0xf77e, 0xc71d, 0xd73c,
+ 0x26d3, 0x36f2, 0x0691, 0x16b0, 0x6657, 0x7676, 0x4615, 0x5634,
+ 0xd94c, 0xc96d, 0xf90e, 0xe92f, 0x99c8, 0x89e9, 0xb98a, 0xa9ab,
+ 0x5844, 0x4865, 0x7806, 0x6827, 0x18c0, 0x08e1, 0x3882, 0x28a3,
+ 0xcb7d, 0xdb5c, 0xeb3f, 0xfb1e, 0x8bf9, 0x9bd8, 0xabbb, 0xbb9a,
+ 0x4a75, 0x5a54, 0x6a37, 0x7a16, 0x0af1, 0x1ad0, 0x2ab3, 0x3a92,
+ 0xfd2e, 0xed0f, 0xdd6c, 0xcd4d, 0xbdaa, 0xad8b, 0x9de8, 0x8dc9,
+ 0x7c26, 0x6c07, 0x5c64, 0x4c45, 0x3ca2, 0x2c83, 0x1ce0, 0x0cc1,
+ 0xef1f, 0xff3e, 0xcf5d, 0xdf7c, 0xaf9b, 0xbfba, 0x8fd9, 0x9ff8,
+ 0x6e17, 0x7e36, 0x4e55, 0x5e74, 0x2e93, 0x3eb2, 0x0ed1, 0x1ef0,
+};
+
+uint16_t
+cyg_crc16(unsigned char *buf, int len)
+{
+ int i;
+ uint16_t cksum;
+
+ cksum = 0;
+ for (i = 0; i < len; i++) {
+ cksum = crc16_tab[((cksum>>8) ^ *buf++) & 0xFF] ^ (cksum << 8);
+ }
+ return cksum;
+}
diff --git a/common/devices.c b/common/devices.c
index bd4dfa024a..ddf8f8ee2d 100644
--- a/common/devices.c
+++ b/common/devices.c
@@ -34,6 +34,8 @@
#include <i2c.h>
#endif
+DECLARE_GLOBAL_DATA_PTR;
+
list_t devlist = 0;
device_t *stdio_devices[] = { NULL, NULL, NULL };
char *stdio_names[MAX_FILES] = { "stdin", "stdout", "stderr" };
@@ -160,8 +162,6 @@ int device_deregister(char *devname)
int devices_init (void)
{
#ifndef CONFIG_ARM /* already relocated for current ARM implementation */
- DECLARE_GLOBAL_DATA_PTR;
-
ulong relocation_offset = gd->reloc_off;
int i;
diff --git a/common/dlmalloc.c b/common/dlmalloc.c
index 0c0487228e..20c206913c 100644
--- a/common/dlmalloc.c
+++ b/common/dlmalloc.c
@@ -949,6 +949,8 @@ void malloc_stats();
#endif /* 0 */ /* Moved to malloc.h */
#include <common.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/*
Emulation of sbrk for WIN32
All code within the ifdef WIN32 is untested by me.
@@ -1493,8 +1495,6 @@ static mbinptr av_[NAV * 2 + 2] = {
void malloc_bin_reloc (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
unsigned long *p = (unsigned long *)(&av_[2]);
int i;
for (i=2; i<(sizeof(av_)/sizeof(mbinptr)); ++i) {
diff --git a/common/env_common.c b/common/env_common.c
index 3201135ea2..f841694cbe 100644
--- a/common/env_common.c
+++ b/common/env_common.c
@@ -37,6 +37,8 @@
# define SHOW_BOOT_PROGRESS(arg)
#endif
+DECLARE_GLOBAL_DATA_PTR;
+
#ifdef CONFIG_AMIGAONEG3SE
extern void enable_nvram(void);
extern void disable_nvram(void);
@@ -150,7 +152,6 @@ void env_crc_update (void)
static uchar env_get_char_init (int index)
{
- DECLARE_GLOBAL_DATA_PTR;
uchar c;
/* if crc was bad, use the default environment */
@@ -167,7 +168,6 @@ static uchar env_get_char_init (int index)
#ifdef CONFIG_AMIGAONEG3SE
uchar env_get_char_memory (int index)
{
- DECLARE_GLOBAL_DATA_PTR;
uchar retval;
enable_nvram();
if (gd->env_valid) {
@@ -181,8 +181,6 @@ uchar env_get_char_memory (int index)
#else
uchar env_get_char_memory (int index)
{
- DECLARE_GLOBAL_DATA_PTR;
-
if (gd->env_valid) {
return ( *((uchar *)(gd->env_addr + index)) );
} else {
@@ -193,8 +191,6 @@ uchar env_get_char_memory (int index)
uchar *env_get_addr (int index)
{
- DECLARE_GLOBAL_DATA_PTR;
-
if (gd->env_valid) {
return ( ((uchar *)(gd->env_addr + index)) );
} else {
@@ -204,8 +200,6 @@ uchar *env_get_addr (int index)
void env_relocate (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
DEBUGF ("%s[%d] offset = 0x%lx\n", __FUNCTION__,__LINE__,
gd->reloc_off);
@@ -283,7 +277,7 @@ int env_complete(char *var, int maxv, char *cmdv[], int bufsz, char *buf)
for (nxt=i; env_get_char(nxt) != '\0'; ++nxt)
;
- lval = (char *)env_get_addr(i);
+ lval = env_get_addr(i);
rval = strchr(lval, '=');
if (rval != NULL) {
vallen = rval - lval;
diff --git a/common/env_dataflash.c b/common/env_dataflash.c
index 8834da032b..93fff29b05 100644
--- a/common/env_dataflash.c
+++ b/common/env_dataflash.c
@@ -26,6 +26,8 @@
#include <linux/stddef.h>
#include <dataflash.h>
+DECLARE_GLOBAL_DATA_PTR;
+
env_t *env_ptr = NULL;
char * env_name_spec = "dataflash";
@@ -68,8 +70,6 @@ int i;
*/
int env_init(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
ulong crc, len, new;
unsigned off;
uchar buf[64];
diff --git a/common/env_eeprom.c b/common/env_eeprom.c
index 50c623e37e..2adc129c67 100644
--- a/common/env_eeprom.c
+++ b/common/env_eeprom.c
@@ -32,6 +32,8 @@
#include <environment.h>
#include <linux/stddef.h>
+DECLARE_GLOBAL_DATA_PTR;
+
env_t *env_ptr = NULL;
char * env_name_spec = "EEPROM";
@@ -75,8 +77,6 @@ int saveenv(void)
*/
int env_init(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
ulong crc, len, new;
unsigned off;
uchar buf[64];
diff --git a/common/env_flash.c b/common/env_flash.c
index a2ea9c4140..7dd29172aa 100644
--- a/common/env_flash.c
+++ b/common/env_flash.c
@@ -35,6 +35,8 @@
#include <linux/stddef.h>
#include <malloc.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#if ((CONFIG_COMMANDS&(CFG_CMD_ENV|CFG_CMD_FLASH)) == (CFG_CMD_ENV|CFG_CMD_FLASH))
#define CMD_SAVEENV
#elif defined(CFG_ENV_ADDR_REDUND)
@@ -51,6 +53,22 @@
# endif
#endif
+#if (defined(CFG_ENV_SECT_SIZE) && (CFG_ENV_SECT_SIZE > CFG_ENV_SIZE)) || defined (ENV_IS_VARIABLE)
+#define SMALL_SECTOR 1
+#endif
+
+#ifdef ENV_IS_VARIABLE
+char * flash_env_name_spec = "Flash";
+/* update these elsewhere */
+extern env_t *env_ptr;
+
+#ifdef CMD_SAVEENV
+/* static env_t *flash_addr = (env_t *)(&environment[0]);-broken on ARM-wd-*/
+env_t *flash_addr = 0;
+#endif
+
+#else /* !ENV_IS_VARIABLE */
+
char * env_name_spec = "Flash";
#ifdef ENV_IS_EMBEDDED
@@ -61,6 +79,7 @@ env_t *env_ptr = (env_t *)(&environment[0]);
#ifdef CMD_SAVEENV
/* static env_t *flash_addr = (env_t *)(&environment[0]);-broken on ARM-wd-*/
static env_t *flash_addr = (env_t *)CFG_ENV_ADDR;
+
#endif
#else /* ! ENV_IS_EMBEDDED */
@@ -83,14 +102,18 @@ static ulong end_addr_new = CFG_ENV_ADDR_REDUND + CFG_ENV_SECT_SIZE - 1;
#define OBSOLETE_FLAG 0
#endif /* CFG_ENV_ADDR_REDUND */
+#endif /* ENV_IS_VARIABLE */
+
extern uchar default_environment[];
extern int default_environment_size;
+#ifdef ENV_IS_VARIABLE
+uchar flash_env_get_char_spec (int index)
+#else
uchar env_get_char_spec (int index)
+#endif
{
- DECLARE_GLOBAL_DATA_PTR;
-
return ( *((uchar *)(gd->env_addr + index)) );
}
@@ -98,7 +121,6 @@ uchar env_get_char_spec (int index)
int env_init(void)
{
- DECLARE_GLOBAL_DATA_PTR;
int crc1_ok = 0, crc2_ok = 0;
uchar flag1 = flash_addr->flags;
@@ -108,13 +130,6 @@ int env_init(void)
ulong addr1 = (ulong)&(flash_addr->data);
ulong addr2 = (ulong)&(flash_addr_new->data);
-#ifdef CONFIG_OMAP2420H4
- int flash_probe(void);
-
- if(flash_probe() == 0)
- goto bad_flash;
-#endif
-
crc1_ok = (crc32(0, flash_addr->data, ENV_SIZE) == flash_addr->crc);
crc2_ok = (crc32(0, flash_addr_new->data, ENV_SIZE) == flash_addr_new->crc);
@@ -144,9 +159,6 @@ int env_init(void)
gd->env_valid = 2;
}
-#ifdef CONFIG_OMAP2420H4
-bad_flash:
-#endif
return (0);
}
@@ -158,6 +170,10 @@ int saveenv(void)
char flag = OBSOLETE_FLAG, new_flag = ACTIVE_FLAG;
#if CFG_ENV_SECT_SIZE > CFG_ENV_SIZE
ulong up_data = 0;
+#else
+#if SMALL_SECTOR
+ ulong up_data = 0;
+#endif
#endif
debug ("Protect off %08lX ... %08lX\n",
@@ -174,7 +190,8 @@ int saveenv(void)
goto Done;
}
-#if CFG_ENV_SECT_SIZE > CFG_ENV_SIZE
+#if SMALL_SECTOR
+ if (CFG_ENV_SECT_SIZE > CFG_ENV_SIZE) {
up_data = (end_addr_new + 1 - ((long)flash_addr_new + CFG_ENV_SIZE));
debug ("Data to save 0x%x\n", up_data);
if (up_data) {
@@ -202,7 +219,7 @@ int saveenv(void)
debug (" %08lX ... %08lX ...",
(ulong)&(flash_addr_new->data),
sizeof(env_ptr->data)+(ulong)&(flash_addr_new->data));
- if ((rc = flash_write((char *)env_ptr->data,
+ if ((rc = flash_write(env_ptr->data,
(ulong)&(flash_addr_new->data),
sizeof(env_ptr->data))) ||
(rc = flash_write((char *)&(env_ptr->crc),
@@ -220,7 +237,7 @@ int saveenv(void)
}
puts ("done\n");
-#if CFG_ENV_SECT_SIZE > CFG_ENV_SIZE
+#if SMALL_SECTOR
if (up_data) { /* restore the rest of sector */
debug ("Restoring the rest of data to 0x%x len 0x%x\n",
(long)flash_addr_new + CFG_ENV_SIZE, up_data);
@@ -251,30 +268,25 @@ Done:
/* try to re-protect */
(void) flash_sect_protect (1, (ulong)flash_addr, end_addr);
(void) flash_sect_protect (1, (ulong)flash_addr_new, end_addr_new);
-
return rc;
}
#endif /* CMD_SAVEENV */
#else /* ! CFG_ENV_ADDR_REDUND */
+#ifdef ENV_IS_VARIABLE
+int flash_env_init(void)
+#else
int env_init(void)
+#endif
{
- DECLARE_GLOBAL_DATA_PTR;
-#ifdef CONFIG_OMAP2420H4
- int flash_probe(void);
- if(flash_probe() == 0)
- goto bad_flash;
-#endif
if (crc32(0, env_ptr->data, ENV_SIZE) == env_ptr->crc) {
gd->env_addr = (ulong)&(env_ptr->data);
gd->env_valid = 1;
return(0);
}
-#ifdef CONFIG_OMAP2420H4
-bad_flash:
-#endif
+
gd->env_addr = (ulong)&default_environment[0];
gd->env_valid = 0;
return (0);
@@ -282,20 +294,23 @@ bad_flash:
#ifdef CMD_SAVEENV
+#ifdef ENV_IS_VARIABLE
+int flash_saveenv(void)
+#else
int saveenv(void)
+#endif
{
int len, rc;
ulong end_addr;
ulong flash_sect_addr;
-#if defined(CFG_ENV_SECT_SIZE) && (CFG_ENV_SECT_SIZE > CFG_ENV_SIZE)
+#if SMALL_SECTOR
ulong flash_offset;
uchar env_buffer[CFG_ENV_SECT_SIZE];
#else
uchar *env_buffer = (uchar *)env_ptr;
#endif /* CFG_ENV_SECT_SIZE */
int rcode = 0;
-
-#if defined(CFG_ENV_SECT_SIZE) && (CFG_ENV_SECT_SIZE > CFG_ENV_SIZE)
+#if SMALL_SECTOR
flash_offset = ((ulong)flash_addr) & (CFG_ENV_SECT_SIZE-1);
flash_sect_addr = ((ulong)flash_addr) & ~(CFG_ENV_SECT_SIZE-1);
@@ -354,12 +369,14 @@ int saveenv(void)
#endif /* CFG_ENV_ADDR_REDUND */
+#ifdef ENV_IS_VARIABLE
+void flash_env_relocate_spec(void)
+#else
void env_relocate_spec (void)
+#endif
{
-#if !defined(ENV_IS_EMBEDDED) || defined(CFG_ENV_ADDR_REDUND)
+#if defined(ENV_IS_VARIABLE) || !defined(ENV_IS_EMBEDDED) || defined(CFG_ENV_ADDR_REDUND)
#ifdef CFG_ENV_ADDR_REDUND
- DECLARE_GLOBAL_DATA_PTR;
-
if (gd->env_addr != (ulong)&(flash_addr->data)) {
env_t * etmp = flash_addr;
ulong ltmp = end_addr;
diff --git a/common/env_nand.c b/common/env_nand.c
index 60aba1e7e6..376154d591 100644
--- a/common/env_nand.c
+++ b/common/env_nand.c
@@ -36,42 +36,41 @@
#include <command.h>
#include <environment.h>
#include <linux/stddef.h>
-#include <linux/mtd/nand.h>
+#include <malloc.h>
+#include <nand.h>
#if ((CONFIG_COMMANDS&(CFG_CMD_ENV|CFG_CMD_NAND)) == (CFG_CMD_ENV|CFG_CMD_NAND))
#define CMD_SAVEENV
+#elif defined(CFG_ENV_OFFSET_REDUND)
+#error Cannot use CFG_ENV_OFFSET_REDUND without CFG_CMD_ENV & CFG_CMD_NAND
#endif
-#if defined(CFG_ENV_SIZE_REDUND)
-#error CFG_ENV_SIZE_REDUND not supported yet
+#if defined(CFG_ENV_SIZE_REDUND) && (CFG_ENV_SIZE_REDUND != CFG_ENV_SIZE)
+#error CFG_ENV_SIZE_REDUND should be the same as CFG_ENV_SIZE
#endif
-#if defined(CFG_ENV_ADDR_REDUND)
-#error CFG_ENV_ADDR_REDUND and CFG_ENV_IS_IN_NAND not supported yet
-#endif
-
-
#ifdef CONFIG_INFERNO
#error CONFIG_INFERNO not supported yet
#endif
-/* references to names in cmd_nand.c */
-#define NANDRW_READ 0x01
-#define NANDRW_WRITE 0x00
-#define NANDRW_JFFS2 0x02
-extern struct nand_chip nand_dev_desc[];
-int nand_rw (struct nand_chip* nand, int cmd,
+int nand_legacy_rw (struct nand_chip* nand, int cmd,
size_t start, size_t len,
size_t * retlen, u_char * buf);
-int nand_erase(struct nand_chip* nand, size_t ofs,
- size_t len, int clean);
+
+/* info for NAND chips, defined in drivers/nand/nand.c */
+extern nand_info_t nand_info[];
/* references to names in env_common.c */
extern uchar default_environment[];
extern int default_environment_size;
-char * env_name_spec = "NAND";
+#ifdef ENV_IS_VARIABLE
+char * nand_env_name_spec = "NAND";
+extern env_t *env_ptr;
+
+#else /* !ENV_IS_VARIABLE */
+char * env_name_spec = "NAND";
#ifdef ENV_IS_EMBEDDED
extern uchar environment[];
@@ -80,15 +79,19 @@ env_t *env_ptr = (env_t *)(&environment[0]);
env_t *env_ptr = 0;
#endif /* ENV_IS_EMBEDDED */
+#endif /* ENV_IS_VARIABLE */
/* local functions */
static void use_default(void);
+DECLARE_GLOBAL_DATA_PTR;
+#ifdef ENV_IS_VARIABLE
+uchar nand_env_get_char_spec (int index)
+#else
uchar env_get_char_spec (int index)
+#endif
{
- DECLARE_GLOBAL_DATA_PTR;
-
return ( *((uchar *)(gd->env_addr + index)) );
}
@@ -99,61 +102,175 @@ uchar env_get_char_spec (int index)
* will call our relocate function which will does
* the real validation.
*/
+#ifdef ENV_IS_VARIABLE
+int nand_env_init(void)
+#else
int env_init(void)
+#endif
{
- DECLARE_GLOBAL_DATA_PTR;
-
- gd->env_addr = (ulong)&default_environment[0];
+ gd->env_addr = (ulong)&default_environment[0];
gd->env_valid = 1;
return (0);
}
#ifdef CMD_SAVEENV
+/*
+ * The legacy NAND code saved the environment in the first NAND device i.e.,
+ * nand_dev_desc + 0. This is also the behaviour using the new NAND code.
+ */
+#ifdef CFG_ENV_OFFSET_REDUND
+#ifdef ENV_IS_VARIABLE
+int nand_saveenv(void)
+#else
int saveenv(void)
+#endif
{
- int total, ret = 0;
- puts ("Erasing Nand...");
- if (nand_erase(nand_dev_desc + 0, CFG_ENV_OFFSET, CFG_ENV_SIZE, 0))
- return 1;
+ ulong total;
+ int ret = 0;
+
+ env_ptr->flags++;
+ total = CFG_ENV_SIZE;
+
+ if(gd->env_valid == 1) {
+ puts ("Erasing redundant Nand...");
+ if (nand_erase(&nand_info[0],
+ CFG_ENV_OFFSET_REDUND, CFG_ENV_SIZE))
+ return 1;
+ puts ("Writing to redundant Nand... ");
+ ret = nand_write(&nand_info[0], CFG_ENV_OFFSET_REDUND, &total,
+ (u_char*) env_ptr);
+ } else {
+ puts ("Erasing Nand...");
+ if (nand_erase(&nand_info[0],
+ CFG_ENV_OFFSET, CFG_ENV_SIZE))
+ return 1;
+
+ puts ("Writing to Nand... ");
+ ret = nand_write(&nand_info[0], CFG_ENV_OFFSET, &total,
+ (u_char*) env_ptr);
+ }
+ if (ret || total != CFG_ENV_SIZE)
+ return 1;
+
+ puts ("done\n");
+ gd->env_valid = (gd->env_valid == 2 ? 1 : 2);
+ return ret;
+}
+#else /* ! CFG_ENV_OFFSET_REDUND */
+#ifdef ENV_IS_VARIABLE
+int nand_saveenv(void)
+#else
+int saveenv(void)
+#endif
+{
+ ulong total;
+ int ret = 0;
+
+ puts ("Erasing Nand...");
+ if (nand_erase(&nand_info[0], CFG_ENV_OFFSET, CFG_ENV_SIZE))
+ return 1;
puts ("Writing to Nand... ");
- ret = nand_rw(nand_dev_desc + 0,
- NANDRW_WRITE | NANDRW_JFFS2, CFG_ENV_OFFSET, CFG_ENV_SIZE,
- &total, (u_char*)env_ptr);
- if (ret || total != CFG_ENV_SIZE)
+ total = CFG_ENV_SIZE;
+ ret = nand_write(&nand_info[0], CFG_ENV_OFFSET, &total, (u_char*)env_ptr);
+ if (ret || total != CFG_ENV_SIZE)
return 1;
- puts ("done\n");
- return ret;
+ puts ("done\n");
+ return ret;
}
+#endif /* CFG_ENV_OFFSET_REDUND */
#endif /* CMD_SAVEENV */
+#ifdef CFG_ENV_OFFSET_REDUND
+#ifdef ENV_IS_VARIABLE
+void nand_env_relocate_spec (void)
+#else
+void env_relocate_spec (void)
+#endif
+{
+#if !defined(ENV_IS_EMBEDDED)
+ ulong total;
+ int crc1_ok = 0, crc2_ok = 0;
+ env_t *tmp_env1, *tmp_env2;
+
+ total = CFG_ENV_SIZE;
+ tmp_env1 = (env_t *) malloc(CFG_ENV_SIZE);
+ tmp_env2 = (env_t *) malloc(CFG_ENV_SIZE);
+
+ nand_read(&nand_info[0], CFG_ENV_OFFSET, &total,
+ (u_char*) tmp_env1);
+ nand_read(&nand_info[0], CFG_ENV_OFFSET_REDUND, &total,
+ (u_char*) tmp_env2);
+
+ crc1_ok = (crc32(0, tmp_env1->data, ENV_SIZE) == tmp_env1->crc);
+ crc2_ok = (crc32(0, tmp_env2->data, ENV_SIZE) == tmp_env2->crc);
+
+ if(!crc1_ok && !crc2_ok)
+ return use_default();
+ else if(crc1_ok && !crc2_ok)
+ gd->env_valid = 1;
+ else if(!crc1_ok && crc2_ok)
+ gd->env_valid = 2;
+ else {
+ /* both ok - check serial */
+ if(tmp_env1->flags == 255 && tmp_env2->flags == 0)
+ gd->env_valid = 2;
+ else if(tmp_env2->flags == 255 && tmp_env1->flags == 0)
+ gd->env_valid = 1;
+ else if(tmp_env1->flags > tmp_env2->flags)
+ gd->env_valid = 1;
+ else if(tmp_env2->flags > tmp_env1->flags)
+ gd->env_valid = 2;
+ else /* flags are equal - almost impossible */
+ gd->env_valid = 1;
+
+ }
+
+ free(env_ptr);
+ if(gd->env_valid == 1) {
+ env_ptr = tmp_env1;
+ free(tmp_env2);
+ } else {
+ env_ptr = tmp_env2;
+ free(tmp_env1);
+ }
+
+#endif /* ! ENV_IS_EMBEDDED */
+}
+#else /* ! CFG_ENV_OFFSET_REDUND */
+/*
+ * The legacy NAND code saved the environment in the first NAND device i.e.,
+ * nand_dev_desc + 0. This is also the behaviour using the new NAND code.
+ */
+#ifdef ENV_IS_VARIABLE
+void nand_env_relocate_spec (void)
+#else
void env_relocate_spec (void)
+#endif
{
#if !defined(ENV_IS_EMBEDDED)
- int ret, total;
+ ulong total;
+ int ret;
- ret = nand_rw(nand_dev_desc + 0,
- NANDRW_READ | NANDRW_JFFS2, CFG_ENV_OFFSET, CFG_ENV_SIZE,
- &total, (u_char*)env_ptr);
+ total = CFG_ENV_SIZE;
+ ret = nand_read(&nand_info[0], CFG_ENV_OFFSET, &total, (u_char*)env_ptr);
if (ret || total != CFG_ENV_SIZE)
return use_default();
if (crc32(0, env_ptr->data, ENV_SIZE) != env_ptr->crc)
return use_default();
#endif /* ! ENV_IS_EMBEDDED */
-
}
+#endif /* CFG_ENV_OFFSET_REDUND */
static void use_default()
{
- DECLARE_GLOBAL_DATA_PTR;
-
puts ("*** Warning - bad CRC or NAND, using default environment\n\n");
- if (default_environment_size > CFG_ENV_SIZE){
+ if (default_environment_size > CFG_ENV_SIZE){
puts ("*** Error - default environment is too large\n\n");
return;
}
@@ -163,7 +280,7 @@ static void use_default()
default_environment,
default_environment_size);
env_ptr->crc = crc32(0, env_ptr->data, ENV_SIZE);
- gd->env_valid = 1;
+ gd->env_valid = 1;
}
diff --git a/common/env_nowhere.c b/common/env_nowhere.c
index ee4237c7e9..17ecc775ff 100644
--- a/common/env_nowhere.c
+++ b/common/env_nowhere.c
@@ -32,6 +32,8 @@
#include <environment.h>
#include <linux/stddef.h>
+DECLARE_GLOBAL_DATA_PTR;
+
env_t *env_ptr = NULL;
extern uchar default_environment[];
@@ -44,8 +46,6 @@ void env_relocate_spec (void)
uchar env_get_char_spec (int index)
{
- DECLARE_GLOBAL_DATA_PTR;
-
return ( *((uchar *)(gd->env_addr + index)) );
}
@@ -56,8 +56,6 @@ uchar env_get_char_spec (int index)
*/
int env_init(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->env_addr = (ulong)&default_environment[0];
gd->env_valid = 0;
diff --git a/common/env_nvram.c b/common/env_nvram.c
index a406e427a2..7c18896cb0 100644
--- a/common/env_nvram.c
+++ b/common/env_nvram.c
@@ -42,6 +42,8 @@
#include <common.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#ifdef CFG_ENV_IS_IN_NVRAM /* Environment is in NVRAM */
#include <command.h>
@@ -74,7 +76,6 @@ uchar env_get_char_spec (int index)
return c;
#else
- DECLARE_GLOBAL_DATA_PTR;
uchar retval;
enable_nvram();
retval = *((uchar *)(gd->env_addr + index));
@@ -92,8 +93,6 @@ uchar env_get_char_spec (int index)
return c;
#else
- DECLARE_GLOBAL_DATA_PTR;
-
return *((uchar *)(gd->env_addr + index));
#endif
}
@@ -135,7 +134,6 @@ int saveenv (void)
*/
int env_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
#ifdef CONFIG_AMIGAONEG3SE
enable_nvram();
#endif
diff --git a/common/env_onenand.c b/common/env_onenand.c
new file mode 100644
index 0000000000..274e52d10f
--- /dev/null
+++ b/common/env_onenand.c
@@ -0,0 +1,156 @@
+/*
+ * (C) Copyright 2005 Samsung Electronics
+ * Kyungmin Park <kyungmin.park@samsung.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+
+#if defined(CFG_ENV_IS_IN_ONENAND) /* Environment is in OneNAND */
+
+#include <command.h>
+#include <environment.h>
+#include <linux/stddef.h>
+#include <malloc.h>
+
+#include <linux/mtd/onenand.h>
+
+extern struct mtd_info onenand_mtd;
+extern struct onenand_chip onenand_chip;
+
+/* References to names in env_common.c */
+extern uchar default_environment[];
+
+#define ONENAND_ENV_SIZE(mtd) (mtd.oobblock - ENV_HEADER_SIZE)
+
+#ifdef ENV_IS_VARIABLE
+char * onenand_env_name_spec = "OneNAND";
+unsigned char onenand_env[MAX_ONENAND_PAGESIZE];
+extern env_t *env_ptr;
+
+#else /* !ENV_IS_VARIABLE */
+
+char * env_name_spec = "OneNAND";
+
+#ifdef ENV_IS_EMBEDDED
+extern uchar environment[];
+env_t *env_ptr = (env_t *) (&environment[0]);
+#else /* ! ENV_IS_EMBEDDED */
+static unsigned char onenand_env[MAX_ONENAND_PAGESIZE];
+env_t *env_ptr = (env_t *) onenand_env;
+#endif /* ENV_IS_EMBEDDED */
+
+#endif /* ENV_IS_VARIABLE */
+
+#ifdef ENV_IS_VARIABLE
+uchar onenand_env_get_char_spec (int index)
+#else
+uchar env_get_char_spec (int index)
+#endif
+{
+ DECLARE_GLOBAL_DATA_PTR;
+
+ return (*((uchar *)(gd->env_addr + index)));
+}
+
+#ifdef ENV_IS_VARIABLE
+void onenand_env_relocate_spec(void)
+#else
+void env_relocate_spec(void)
+#endif
+{
+ DECLARE_GLOBAL_DATA_PTR;
+ unsigned long env_addr;
+ int use_default = 0;
+ size_t retlen;
+
+ env_addr = CFG_ENV_ADDR;
+
+ /* Check OneNAND exist */
+
+ if (onenand_mtd.oobblock)
+ /* Ignore read fail */
+ onenand_read(&onenand_mtd, env_addr, onenand_mtd.oobblock,
+ &retlen, (u_char *) env_ptr);
+ else
+ onenand_mtd.oobblock = MAX_ONENAND_PAGESIZE;
+
+
+ if (crc32(0, env_ptr->data, ONENAND_ENV_SIZE(onenand_mtd)) != env_ptr->crc)
+ use_default = 1;
+
+ if (use_default) {
+ memcpy(env_ptr->data, default_environment, ONENAND_ENV_SIZE(onenand_mtd));
+ env_ptr->crc = crc32(0, env_ptr->data, ONENAND_ENV_SIZE(onenand_mtd));
+ }
+
+ gd->env_addr = (ulong) &env_ptr->data;
+ gd->env_valid = 1;
+}
+
+#ifdef ENV_IS_VARIABLE
+int onenand_saveenv(void)
+#else
+int saveenv(void)
+#endif
+{
+ unsigned long env_addr = CFG_ENV_ADDR;
+ struct erase_info instr;
+ size_t retlen;
+
+
+ instr.len = CFG_ENV_SIZE;
+ instr.addr = env_addr;
+ printf("Erasing oneNand...");
+ if (onenand_erase(&onenand_mtd, &instr)) {
+ printf("OneNAND: erase failed at 0x%08x\n", env_addr);
+ return 1;
+ }
+ printf("done\n");
+
+ /* update crc */
+ env_ptr->crc = crc32(0, env_ptr->data, onenand_mtd.oobblock - ENV_HEADER_SIZE);
+
+ printf("Writing to oneNand... ");
+ if (onenand_write(&onenand_mtd, env_addr, onenand_mtd.oobblock, &retlen, (u_char *) env_ptr)) {
+ printf("OneNAND: write failed at 0x%08x\n", instr.addr);
+ return 2;
+ }
+ printf ("done\n");
+
+ return 0;
+}
+
+#ifdef ENV_IS_VARIABLE
+int onenand_env_init(void)
+#else
+int env_init(void)
+#endif
+{
+ DECLARE_GLOBAL_DATA_PTR;
+
+ /* use default */
+ gd->env_addr = (ulong) &default_environment[0];
+ gd->env_valid = 1;
+
+ return 0;
+}
+
+#endif /* CFG_ENV_IS_IN_ONENAND */
diff --git a/common/environment.c b/common/environment.c
index c7f54c6bd8..81471ce71c 100644
--- a/common/environment.c
+++ b/common/environment.c
@@ -59,7 +59,8 @@
defined(CONFIG_TQM8xxL) || \
defined(CONFIG_RRVISION) || \
defined(CONFIG_TRAB) || \
- defined(CONFIG_PPCHAMELEONEVB) ) && \
+ defined(CONFIG_PPCHAMELEONEVB) || \
+ defined(CONFIG_M5271EVB)) && \
defined(ENV_CRC) /* Environment embedded in U-Boot .ppcenv section */
/* XXX - This only works with GNU C */
# define __PPCENV__ __attribute__ ((section(".ppcenv")))
diff --git a/common/exports.c b/common/exports.c
index 9858217ae0..ef25338169 100644
--- a/common/exports.c
+++ b/common/exports.c
@@ -1,6 +1,8 @@
#include <common.h>
#include <exports.h>
+DECLARE_GLOBAL_DATA_PTR;
+
static void dummy(void)
{
}
@@ -12,7 +14,6 @@ unsigned long get_version(void)
void jumptable_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
int i;
gd->jt = (void **) malloc (XF_MAX * sizeof (void *));
diff --git a/common/flash.c b/common/flash.c
index a64bc98529..ce3983a1a6 100644
--- a/common/flash.c
+++ b/common/flash.c
@@ -103,7 +103,6 @@ addr2info (ulong addr)
#ifndef CONFIG_SPD823TS
flash_info_t *info;
int i;
-
for (i=0, info=&flash_info[0]; i<CFG_MAX_FLASH_BANKS; ++i, ++info) {
if (info->flash_id != FLASH_UNKNOWN &&
addr >= info->start[0] &&
@@ -117,7 +116,6 @@ addr2info (ulong addr)
}
}
#endif /* CONFIG_SPD823TS */
-
return (NULL);
}
diff --git a/common/ft_build.c b/common/ft_build.c
index 65a274f840..9e9c906fc1 100644
--- a/common/ft_build.c
+++ b/common/ft_build.c
@@ -163,7 +163,7 @@ void ft_add_rsvmap(struct ft_cxt *cxt, u64 physaddr, u64 size)
((u64 *) cxt->pres)[0] = cpu_to_be64(physaddr); /* phys = 0, size = 0, terminate */
((u64 *) cxt->pres)[1] = cpu_to_be64(size);
- cxt->pres += 18; /* advance */
+ cxt->pres += 16; /* advance */
((u64 *) cxt->pres)[0] = 0; /* phys = 0, size = 0, terminate */
((u64 *) cxt->pres)[1] = 0;
@@ -529,6 +529,7 @@ extern uchar(*env_get_char) (int);
#define BDM(x) { .name = #x, .offset = offsetof(bd_t, bi_ ##x ) }
+#ifdef CONFIG_OF_HAS_BD_T
static const struct {
const char *name;
int offset;
@@ -574,19 +575,24 @@ static const struct {
#endif
BDM(baudrate),
};
+#endif
-void ft_setup(void *blob, int size, bd_t * bd)
+void ft_setup(void *blob, int size, bd_t * bd, ulong initrd_start, ulong initrd_end)
{
- DECLARE_GLOBAL_DATA_PTR;
- u8 *end;
u32 *p;
int len;
struct ft_cxt cxt;
- int i, k, nxt;
- static char tmpenv[256];
- char *s, *lval, *rval;
ulong clock;
- uint32_t v;
+#if defined(CONFIG_OF_HAS_UBOOT_ENV)
+ int k, nxt;
+#endif
+#if defined(CONFIG_OF_HAS_BD_T)
+ u8 *end;
+#endif
+#if defined(CONFIG_OF_HAS_UBOOT_ENV) || defined(CONFIG_OF_HAS_BD_T)
+ int i;
+ static char tmpenv[256];
+#endif
/* disable OF tree; booting old kernel */
if (getenv("disable_of") != NULL) {
@@ -596,7 +602,8 @@ void ft_setup(void *blob, int size, bd_t * bd)
ft_begin(&cxt, blob, size);
- /* fs_add_rsvmap not used */
+ if (initrd_start && initrd_end)
+ ft_add_rsvmap(&cxt, initrd_start, initrd_end - initrd_start + 1);
ft_begin_tree(&cxt);
@@ -610,9 +617,12 @@ void ft_setup(void *blob, int size, bd_t * bd)
/* back into root */
ft_backtrack_node(&cxt);
+#ifdef CONFIG_OF_HAS_UBOOT_ENV
ft_begin_node(&cxt, "u-boot-env");
for (i = 0; env_get_char(i) != '\0'; i = nxt + 1) {
+ char *s, *lval, *rval;
+
for (nxt = i; env_get_char(nxt) != '\0'; ++nxt) ;
s = tmpenv;
for (k = i; k < nxt && s < &tmpenv[sizeof(tmpenv) - 1]; ++k)
@@ -629,12 +639,20 @@ void ft_setup(void *blob, int size, bd_t * bd)
}
ft_end_node(&cxt);
+#endif
ft_begin_node(&cxt, "chosen");
ft_prop_str(&cxt, "name", "chosen");
ft_prop_str(&cxt, "bootargs", getenv("bootargs"));
ft_prop_int(&cxt, "linux,platform", 0x600); /* what is this? */
+ if (initrd_start && initrd_end) {
+ ft_prop_int(&cxt, "linux,initrd-start", initrd_start);
+ ft_prop_int(&cxt, "linux,initrd-end", initrd_end);
+ }
+#ifdef OF_STDOUT_PATH
+ ft_prop_str(&cxt, "linux,stdout-path", OF_STDOUT_PATH);
+#endif
ft_end_node(&cxt);
@@ -647,14 +665,19 @@ void ft_setup(void *blob, int size, bd_t * bd)
ft_dump_blob(blob);
*/
+#ifdef CONFIG_OF_HAS_BD_T
/* paste the bd_t at the end of the flat tree */
end = (char *)blob +
be32_to_cpu(((struct boot_param_header *)blob)->totalsize);
memcpy(end, bd, sizeof(*bd));
+#endif
#ifdef CONFIG_PPC
+#ifdef CONFIG_OF_HAS_BD_T
for (i = 0; i < sizeof(bd_map)/sizeof(bd_map[0]); i++) {
+ uint32_t v;
+
sprintf(tmpenv, "/bd_t/%s", bd_map[i].name);
v = *(uint32_t *)((char *)bd + bd_map[i].offset);
@@ -670,6 +693,7 @@ void ft_setup(void *blob, int size, bd_t * bd)
p = ft_get_prop(blob, "/bd_t/ethspeed", &len);
if (p != NULL)
*p = cpu_to_be32((uint32_t) bd->bi_ethspeed);
+#endif
clock = bd->bi_intfreq;
p = ft_get_prop(blob, "/cpus/" OF_CPU "/clock-frequency", &len);
@@ -680,11 +704,14 @@ void ft_setup(void *blob, int size, bd_t * bd)
clock = OF_TBCLK;
p = ft_get_prop(blob, "/cpus/" OF_CPU "/timebase-frequency", &len);
if (p != NULL)
- *p = cpu_to_be32(OF_TBCLK);
+ *p = cpu_to_be32(clock);
#endif
-
#endif /* __powerpc__ */
+#ifdef CONFIG_OF_BOARD_SETUP
+ ft_board_setup(blob, bd);
+#endif
+
/*
printf("final OF-tree\n");
ft_dump_blob(blob);
diff --git a/common/hush.c b/common/hush.c
index bb5041a08d..feb5627ff2 100644
--- a/common/hush.c
+++ b/common/hush.c
@@ -138,6 +138,8 @@ extern int do_bootd (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); /
#endif
#ifdef __U_BOOT__
+DECLARE_GLOBAL_DATA_PTR;
+
#define EXIT_SUCCESS 0
#define EOF -1
#define syntax() syntax_err()
@@ -3272,7 +3274,6 @@ int parse_file_outer(void)
#ifdef __U_BOOT__
static void u_boot_hush_reloc(void)
{
- DECLARE_GLOBAL_DATA_PTR;
unsigned long addr;
struct reserved_combo *r;
diff --git a/common/lcd.c b/common/lcd.c
index e64972fd81..0be1912a35 100644
--- a/common/lcd.c
+++ b/common/lcd.c
@@ -50,7 +50,6 @@
#include <lcdvideo.h>
#endif
-
#ifdef CONFIG_LCD
/************************************************************************/
@@ -68,6 +67,8 @@
# endif
#endif
+DECLARE_GLOBAL_DATA_PTR;
+
ulong lcd_setmem (ulong addr);
static void lcd_drawchars (ushort x, ushort y, uchar *str, int count);
@@ -339,8 +340,6 @@ static void test_pattern (void)
int drv_lcd_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
device_t lcddev;
int rc;
@@ -682,8 +681,6 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y)
static void *lcd_logo (void)
{
#ifdef CONFIG_LCD_INFO
- DECLARE_GLOBAL_DATA_PTR;
-
char info[80];
char temp[32];
#endif /* CONFIG_LCD_INFO */
diff --git a/common/lynxkdi.c b/common/lynxkdi.c
index 797d8cc880..76a271b966 100644
--- a/common/lynxkdi.c
+++ b/common/lynxkdi.c
@@ -20,14 +20,15 @@
#if defined(CONFIG_LYNXKDI)
#include <lynxkdi.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#if defined(CONFIG_MPC8260) || defined(CONFIG_440EP) || defined(CONFIG_440GR)
void lynxkdi_boot ( image_header_t *hdr )
{
- void (*lynxkdi)(void) = (void(*)(void))hdr->ih_ep;
+ void (*lynxkdi)(void) = (void(*)(void)) ntohl(hdr->ih_ep);
lynxos_bootparms_t *parms = (lynxos_bootparms_t *)0x0020;
bd_t *kbd;
- DECLARE_GLOBAL_DATA_PTR;
- u32 *psz = (u32 *)(hdr->ih_load + 0x0204);
+ u32 *psz = (u32 *)(ntohl(hdr->ih_load) + 0x0204);
memset( parms, 0, sizeof(*parms));
kbd = gd->bd;
@@ -39,9 +40,9 @@ void lynxkdi_boot ( image_header_t *hdr )
/* Do a simple check for Bluecat so we can pass the
* kernel command line parameters.
*/
- if( le32_to_cpu(*psz) == hdr->ih_size ){
+ if( le32_to_cpu(*psz) == ntohl(hdr->ih_size) ){ /* FIXME: NOT SURE HERE ! */
char *args;
- char *cmdline = (char *)(hdr->ih_load + 0x020c);
+ char *cmdline = (char *)(ntohl(hdr->ih_load) + 0x020c);
int len;
printf("Booting Bluecat KDI ...\n");
diff --git a/common/main.c b/common/main.c
index f042f3a636..3788bd5e4a 100644
--- a/common/main.c
+++ b/common/main.c
@@ -2,6 +2,10 @@
* (C) Copyright 2000
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
+ * Add to readline cmdline-editing by
+ * (C) Copyright 2005
+ * JinHua Luo, GuangDong Linux Center, <luo.jinhua@gd-linux.com>
+ *
* See file CREDITS for list of people who contributed to this
* project.
*
@@ -36,6 +40,10 @@
#include <post.h>
+#ifdef CONFIG_SILENT_CONSOLE
+DECLARE_GLOBAL_DATA_PTR;
+#endif
+
#if defined(CONFIG_BOOT_RETRY_TIME) && defined(CONFIG_RESET_TO_RETRY)
extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); /* for do_reset() prototype */
#endif
@@ -45,7 +53,6 @@ extern int do_bootd (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
#define MAX_DELAY_STOP_STR 32
-static char * delete_char (char *buffer, char *p, int *colp, int *np, int plen);
static int parse_line (char *, char *[]);
#if defined(CONFIG_BOOTDELAY) && (CONFIG_BOOTDELAY >= 0)
static int abortboot(int);
@@ -55,8 +62,11 @@ static int abortboot(int);
char console_buffer[CFG_CBSIZE]; /* console I/O buffer */
+#ifndef CONFIG_CMDLINE_EDITING
+static char * delete_char (char *buffer, char *p, int *colp, int *np, int plen);
static char erase_seq[] = "\b \b"; /* erase sequence */
static char tab_seq[] = " "; /* used to expand TABs */
+#endif /* CONFIG_CMDLINE_EDITING */
#ifdef CONFIG_BOOT_RETRY_TIME
static uint64_t endtime = 0; /* must be set, default is instant timeout */
@@ -105,14 +115,10 @@ static __inline__ int abortboot(int bootdelay)
u_int i;
#ifdef CONFIG_SILENT_CONSOLE
- {
- DECLARE_GLOBAL_DATA_PTR;
-
- if (gd->flags & GD_FLG_SILENT) {
- /* Restore serial console */
- console_assign (stdout, "serial");
- console_assign (stderr, "serial");
- }
+ if (gd->flags & GD_FLG_SILENT) {
+ /* Restore serial console */
+ console_assign (stdout, "serial");
+ console_assign (stderr, "serial");
}
#endif
@@ -195,17 +201,13 @@ static __inline__ int abortboot(int bootdelay)
# endif
#ifdef CONFIG_SILENT_CONSOLE
- {
- DECLARE_GLOBAL_DATA_PTR;
-
- if (abort) {
- /* permanently enable normal console output */
- gd->flags &= ~(GD_FLG_SILENT);
- } else if (gd->flags & GD_FLG_SILENT) {
- /* Restore silent console */
- console_assign (stdout, "nulldev");
- console_assign (stderr, "nulldev");
- }
+ if (abort) {
+ /* permanently enable normal console output */
+ gd->flags &= ~(GD_FLG_SILENT);
+ } else if (gd->flags & GD_FLG_SILENT) {
+ /* Restore silent console */
+ console_assign (stdout, "nulldev");
+ console_assign (stderr, "nulldev");
}
#endif
@@ -223,14 +225,10 @@ static __inline__ int abortboot(int bootdelay)
int abort = 0;
#ifdef CONFIG_SILENT_CONSOLE
- {
- DECLARE_GLOBAL_DATA_PTR;
-
- if (gd->flags & GD_FLG_SILENT) {
- /* Restore serial console */
- console_assign (stdout, "serial");
- console_assign (stderr, "serial");
- }
+ if (gd->flags & GD_FLG_SILENT) {
+ /* Restore serial console */
+ console_assign (stdout, "serial");
+ console_assign (stderr, "serial");
}
#endif
@@ -279,17 +277,13 @@ static __inline__ int abortboot(int bootdelay)
putc ('\n');
#ifdef CONFIG_SILENT_CONSOLE
- {
- DECLARE_GLOBAL_DATA_PTR;
-
- if (abort) {
- /* permanently enable normal console output */
- gd->flags &= ~(GD_FLG_SILENT);
- } else if (gd->flags & GD_FLG_SILENT) {
- /* Restore silent console */
- console_assign (stdout, "nulldev");
- console_assign (stderr, "nulldev");
- }
+ if (abort) {
+ /* permanently enable normal console output */
+ gd->flags &= ~(GD_FLG_SILENT);
+ } else if (gd->flags & GD_FLG_SILENT) {
+ /* Restore silent console */
+ console_assign (stdout, "nulldev");
+ console_assign (stderr, "nulldev");
}
#endif
@@ -528,6 +522,406 @@ void reset_cmd_timeout(void)
}
#endif
+#ifdef CONFIG_CMDLINE_EDITING
+
+/*
+ * cmdline-editing related codes from vivi.
+ * Author: Janghoon Lyu <nandy@mizi.com>
+ */
+
+#if 1 /* avoid redundand code -- wd */
+#define putnstr(str,n) do { \
+ printf ("%.*s", n, str); \
+ } while (0)
+#else
+void putnstr(const char *str, size_t n)
+{
+ if (str == NULL)
+ return;
+
+ while (n && *str != '\0') {
+ putc(*str);
+ str++;
+ n--;
+ }
+}
+#endif
+
+#define CTL_CH(c) ((c) - 'a' + 1)
+
+#define MAX_CMDBUF_SIZE 256
+
+#define CTL_BACKSPACE ('\b')
+#define DEL ((char)255)
+#define DEL7 ((char)127)
+#define CREAD_HIST_CHAR ('!')
+
+#define getcmd_putch(ch) putc(ch)
+#define getcmd_getch() getc()
+#define getcmd_cbeep() getcmd_putch('\a')
+
+#define HIST_MAX 20
+#define HIST_SIZE MAX_CMDBUF_SIZE
+
+static int hist_max = 0;
+static int hist_add_idx = 0;
+static int hist_cur = -1;
+unsigned hist_num = 0;
+
+char* hist_list[HIST_MAX];
+char hist_lines[HIST_MAX][HIST_SIZE];
+
+#define add_idx_minus_one() ((hist_add_idx == 0) ? hist_max : hist_add_idx-1)
+
+static void hist_init(void)
+{
+ int i;
+
+ hist_max = 0;
+ hist_add_idx = 0;
+ hist_cur = -1;
+ hist_num = 0;
+
+ for (i = 0; i < HIST_MAX; i++) {
+ hist_list[i] = hist_lines[i];
+ hist_list[i][0] = '\0';
+ }
+}
+
+static void cread_add_to_hist(char *line)
+{
+ strcpy(hist_list[hist_add_idx], line);
+
+ if (++hist_add_idx >= HIST_MAX)
+ hist_add_idx = 0;
+
+ if (hist_add_idx > hist_max)
+ hist_max = hist_add_idx;
+
+ hist_num++;
+}
+
+static char* hist_prev(void)
+{
+ char *ret;
+ int old_cur;
+
+ if (hist_cur < 0)
+ return NULL;
+
+ old_cur = hist_cur;
+ if (--hist_cur < 0)
+ hist_cur = hist_max;
+
+ if (hist_cur == hist_add_idx) {
+ hist_cur = old_cur;
+ ret = NULL;
+ } else
+ ret = hist_list[hist_cur];
+
+ return (ret);
+}
+
+static char* hist_next(void)
+{
+ char *ret;
+
+ if (hist_cur < 0)
+ return NULL;
+
+ if (hist_cur == hist_add_idx)
+ return NULL;
+
+ if (++hist_cur > hist_max)
+ hist_cur = 0;
+
+ if (hist_cur == hist_add_idx) {
+ ret = "";
+ } else
+ ret = hist_list[hist_cur];
+
+ return (ret);
+}
+
+#ifndef CONFIG_CMDLINE_EDITING
+static void cread_print_hist_list(void)
+{
+ int i;
+ unsigned long n;
+
+ n = hist_num - hist_max;
+
+ i = hist_add_idx + 1;
+ while (1) {
+ if (i > hist_max)
+ i = 0;
+ if (i == hist_add_idx)
+ break;
+ printf("%s\n", hist_list[i]);
+ n++;
+ i++;
+ }
+}
+#endif /* CONFIG_CMDLINE_EDITING */
+
+#define BEGINNING_OF_LINE() { \
+ while (num) { \
+ getcmd_putch(CTL_BACKSPACE); \
+ num--; \
+ } \
+}
+
+#define ERASE_TO_EOL() { \
+ if (num < eol_num) { \
+ int tmp; \
+ for (tmp = num; tmp < eol_num; tmp++) \
+ getcmd_putch(' '); \
+ while (tmp-- > num) \
+ getcmd_putch(CTL_BACKSPACE); \
+ eol_num = num; \
+ } \
+}
+
+#define REFRESH_TO_EOL() { \
+ if (num < eol_num) { \
+ wlen = eol_num - num; \
+ putnstr(buf + num, wlen); \
+ num = eol_num; \
+ } \
+}
+
+static void cread_add_char(char ichar, int insert, unsigned long *num,
+ unsigned long *eol_num, char *buf, unsigned long len)
+{
+ unsigned long wlen;
+
+ /* room ??? */
+ if (insert || *num == *eol_num) {
+ if (*eol_num > len - 1) {
+ getcmd_cbeep();
+ return;
+ }
+ (*eol_num)++;
+ }
+
+ if (insert) {
+ wlen = *eol_num - *num;
+ if (wlen > 1) {
+ memmove(&buf[*num+1], &buf[*num], wlen-1);
+ }
+
+ buf[*num] = ichar;
+ putnstr(buf + *num, wlen);
+ (*num)++;
+ while (--wlen) {
+ getcmd_putch(CTL_BACKSPACE);
+ }
+ } else {
+ /* echo the character */
+ wlen = 1;
+ buf[*num] = ichar;
+ putnstr(buf + *num, wlen);
+ (*num)++;
+ }
+}
+
+static void cread_add_str(char *str, int strsize, int insert, unsigned long *num,
+ unsigned long *eol_num, char *buf, unsigned long len)
+{
+ while (strsize--) {
+ cread_add_char(*str, insert, num, eol_num, buf, len);
+ str++;
+ }
+}
+
+static int cread_line(char *buf, unsigned int *len)
+{
+ unsigned long num = 0;
+ unsigned long eol_num = 0;
+ unsigned long rlen;
+ unsigned long wlen;
+ char ichar;
+ int insert = 1;
+ int esc_len = 0;
+ int rc = 0;
+ char esc_save[8];
+
+ while (1) {
+ rlen = 1;
+ ichar = getcmd_getch();
+
+ if ((ichar == '\n') || (ichar == '\r')) {
+ putc('\n');
+ break;
+ }
+
+ /*
+ * handle standard linux xterm esc sequences for arrow key, etc.
+ */
+ if (esc_len != 0) {
+ if (esc_len == 1) {
+ if (ichar == '[') {
+ esc_save[esc_len] = ichar;
+ esc_len = 2;
+ } else {
+ cread_add_str(esc_save, esc_len, insert,
+ &num, &eol_num, buf, *len);
+ esc_len = 0;
+ }
+ continue;
+ }
+
+ switch (ichar) {
+
+ case 'D': /* <- key */
+ ichar = CTL_CH('b');
+ esc_len = 0;
+ break;
+ case 'C': /* -> key */
+ ichar = CTL_CH('f');
+ esc_len = 0;
+ break; /* pass off to ^F handler */
+ case 'H': /* Home key */
+ ichar = CTL_CH('a');
+ esc_len = 0;
+ break; /* pass off to ^A handler */
+ case 'A': /* up arrow */
+ ichar = CTL_CH('p');
+ esc_len = 0;
+ break; /* pass off to ^P handler */
+ case 'B': /* down arrow */
+ ichar = CTL_CH('n');
+ esc_len = 0;
+ break; /* pass off to ^N handler */
+ default:
+ esc_save[esc_len++] = ichar;
+ cread_add_str(esc_save, esc_len, insert,
+ &num, &eol_num, buf, *len);
+ esc_len = 0;
+ continue;
+ }
+ }
+
+ switch (ichar) {
+ case 0x1b:
+ if (esc_len == 0) {
+ esc_save[esc_len] = ichar;
+ esc_len = 1;
+ } else {
+ puts("impossible condition #876\n");
+ esc_len = 0;
+ }
+ break;
+
+ case CTL_CH('a'):
+ BEGINNING_OF_LINE();
+ break;
+ case CTL_CH('c'): /* ^C - break */
+ *buf = '\0'; /* discard input */
+ return (-1);
+ case CTL_CH('f'):
+ if (num < eol_num) {
+ getcmd_putch(buf[num]);
+ num++;
+ }
+ break;
+ case CTL_CH('b'):
+ if (num) {
+ getcmd_putch(CTL_BACKSPACE);
+ num--;
+ }
+ break;
+ case CTL_CH('d'):
+ if (num < eol_num) {
+ wlen = eol_num - num - 1;
+ if (wlen) {
+ memmove(&buf[num], &buf[num+1], wlen);
+ putnstr(buf + num, wlen);
+ }
+
+ getcmd_putch(' ');
+ do {
+ getcmd_putch(CTL_BACKSPACE);
+ } while (wlen--);
+ eol_num--;
+ }
+ break;
+ case CTL_CH('k'):
+ ERASE_TO_EOL();
+ break;
+ case CTL_CH('e'):
+ REFRESH_TO_EOL();
+ break;
+ case CTL_CH('o'):
+ insert = !insert;
+ break;
+ case CTL_CH('x'):
+ BEGINNING_OF_LINE();
+ ERASE_TO_EOL();
+ break;
+ case DEL:
+ case DEL7:
+ case 8:
+ if (num) {
+ wlen = eol_num - num;
+ num--;
+ memmove(&buf[num], &buf[num+1], wlen);
+ getcmd_putch(CTL_BACKSPACE);
+ putnstr(buf + num, wlen);
+ getcmd_putch(' ');
+ do {
+ getcmd_putch(CTL_BACKSPACE);
+ } while (wlen--);
+ eol_num--;
+ }
+ break;
+ case CTL_CH('p'):
+ case CTL_CH('n'):
+ {
+ char * hline;
+
+ esc_len = 0;
+
+ if (ichar == CTL_CH('p'))
+ hline = hist_prev();
+ else
+ hline = hist_next();
+
+ if (!hline) {
+ getcmd_cbeep();
+ continue;
+ }
+
+ /* nuke the current line */
+ /* first, go home */
+ BEGINNING_OF_LINE();
+
+ /* erase to end of line */
+ ERASE_TO_EOL();
+
+ /* copy new line into place and display */
+ strcpy(buf, hline);
+ eol_num = strlen(buf);
+ REFRESH_TO_EOL();
+ continue;
+ }
+ default:
+ cread_add_char(ichar, insert, &num, &eol_num, buf, *len);
+ break;
+ }
+ }
+ *len = eol_num;
+ buf[eol_num] = '\0'; /* lose the newline */
+
+ if (buf[0] && buf[0] != CREAD_HIST_CHAR)
+ cread_add_to_hist(buf);
+ hist_cur = hist_add_idx;
+
+ return (rc);
+}
+
+#endif /* CONFIG_CMDLINE_EDITING */
+
/****************************************************************************/
/*
@@ -540,6 +934,21 @@ void reset_cmd_timeout(void)
*/
int readline (const char *const prompt)
{
+#ifdef CONFIG_CMDLINE_EDITING
+ char *p = console_buffer;
+ unsigned int len=MAX_CMDBUF_SIZE;
+ static int initted = 0;
+
+ if (!initted) {
+ hist_init();
+ initted = 1;
+ }
+
+ puts (prompt);
+
+ cread_line(p, &len);
+ return len;
+#else
char *p = console_buffer;
int n = 0; /* buffer index */
int plen = 0; /* prompt length */
@@ -635,10 +1044,12 @@ int readline (const char *const prompt)
}
}
}
+#endif /* CONFIG_CMDLINE_EDITING */
}
/****************************************************************************/
+#ifndef CONFIG_CMDLINE_EDITING
static char * delete_char (char *buffer, char *p, int *colp, int *np, int plen)
{
char *s;
@@ -668,6 +1079,7 @@ static char * delete_char (char *buffer, char *p, int *colp, int *np, int plen)
(*np)--;
return (p);
}
+#endif /* CONFIG_CMDLINE_EDITING */
/****************************************************************************/
@@ -919,7 +1331,10 @@ int run_command (const char *cmd, int flag)
process_macros (token, finaltoken);
/* Extract arguments */
- argc = parse_line (finaltoken, argv);
+ if ((argc = parse_line (finaltoken, argv)) == 0) {
+ rc = -1; /* no command at all */
+ continue;
+ }
/* Look up command in command table */
if ((cmdtp = find_cmd(argv[0])) == NULL) {
@@ -945,9 +1360,9 @@ int run_command (const char *cmd, int flag)
puts ("'bootd' recursion detected\n");
rc = -1;
continue;
- }
- else
+ } else {
flag |= CMD_FLAG_BOOTD;
+ }
}
#endif /* CFG_CMD_BOOTD */
diff --git a/common/serial.c b/common/serial.c
index 22d8fd0584..38057d21f6 100644
--- a/common/serial.c
+++ b/common/serial.c
@@ -25,6 +25,8 @@
#include <serial.h>
#include <devices.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#if defined(CONFIG_SERIAL_MULTI)
static struct serial_device *serial_devices = NULL;
@@ -39,8 +41,12 @@ struct serial_device *default_serial_console (void)
|| defined(CONFIG_8xx_CONS_SCC3) || defined(CONFIG_8xx_CONS_SCC4)
return &serial_scc_device;
#elif defined(CONFIG_405GP) || defined(CONFIG_405CR) || defined(CONFIG_440) \
- || defined(CONFIG_405EP)
- return &serial0_device;
+ || defined(CONFIG_405EP) || defined(CONFIG_MPC5xxx)
+#if defined(CONFIG_UART1_CONSOLE)
+ return &serial1_device;
+#else
+ return &serial0_device;
+#endif
#else
#error No default console
#endif
@@ -49,8 +55,6 @@ struct serial_device *default_serial_console (void)
static int serial_register (struct serial_device *dev)
{
- DECLARE_GLOBAL_DATA_PTR;
-
dev->init += gd->reloc_off;
dev->setbrg += gd->reloc_off;
dev->getc += gd->reloc_off;
@@ -75,7 +79,7 @@ void serial_initialize (void)
#endif
#if defined(CONFIG_405GP) || defined(CONFIG_405CR) || defined(CONFIG_440) \
- || defined(CONFIG_405EP)
+ || defined(CONFIG_405EP) || defined(CONFIG_MPC5xxx)
serial_register(&serial0_device);
serial_register(&serial1_device);
#endif
@@ -131,8 +135,6 @@ void serial_reinit_all (void)
int serial_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
if (!(gd->flags & GD_FLG_RELOC) || !serial_current) {
struct serial_device *dev = default_serial_console ();
@@ -144,8 +146,6 @@ int serial_init (void)
void serial_setbrg (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
if (!(gd->flags & GD_FLG_RELOC) || !serial_current) {
struct serial_device *dev = default_serial_console ();
@@ -158,8 +158,6 @@ void serial_setbrg (void)
int serial_getc (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
if (!(gd->flags & GD_FLG_RELOC) || !serial_current) {
struct serial_device *dev = default_serial_console ();
@@ -171,8 +169,6 @@ int serial_getc (void)
int serial_tstc (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
if (!(gd->flags & GD_FLG_RELOC) || !serial_current) {
struct serial_device *dev = default_serial_console ();
@@ -184,8 +180,6 @@ int serial_tstc (void)
void serial_putc (const char c)
{
- DECLARE_GLOBAL_DATA_PTR;
-
if (!(gd->flags & GD_FLG_RELOC) || !serial_current) {
struct serial_device *dev = default_serial_console ();
@@ -198,8 +192,6 @@ void serial_putc (const char c)
void serial_puts (const char *s)
{
- DECLARE_GLOBAL_DATA_PTR;
-
if (!(gd->flags & GD_FLG_RELOC) || !serial_current) {
struct serial_device *dev = default_serial_console ();
diff --git a/common/soft_i2c.c b/common/soft_i2c.c
index 3d0e08c6ff..edad51bc41 100644
--- a/common/soft_i2c.c
+++ b/common/soft_i2c.c
@@ -33,12 +33,19 @@
#include <asm/io.h>
#include <asm/arch/hardware.h>
#endif
+#ifdef CONFIG_IXP425 /* only valid for IXP425 */
+#include <asm/arch/ixp425.h>
+#endif
#include <i2c.h>
#if defined(CONFIG_SOFT_I2C)
/* #define DEBUG_I2C */
+#ifdef DEBUG_I2C
+DECLARE_GLOBAL_DATA_PTR;
+#endif
+
/*-----------------------------------------------------------------------
* Definitions
@@ -53,7 +60,6 @@
#ifdef DEBUG_I2C
#define PRINTD(fmt,args...) do { \
- DECLARE_GLOBAL_DATA_PTR; \
if (gd->have_console) \
printf (fmt ,##args); \
} while (0)
@@ -164,13 +170,10 @@ static void send_ack(int ack)
volatile immap_t *immr = (immap_t *)CFG_IMMR;
#endif
- I2C_ACTIVE;
I2C_SCL(0);
I2C_DELAY;
-
- I2C_SDA(ack);
-
I2C_ACTIVE;
+ I2C_SDA(ack);
I2C_DELAY;
I2C_SCL(1);
I2C_DELAY;
@@ -288,7 +291,10 @@ int i2c_probe(uchar addr)
{
int rc;
- /* perform 1 byte read transaction */
+ /*
+ * perform 1 byte write transaction with just address byte
+ * (fake write)
+ */
send_start();
rc = write_byte ((addr << 1) | 0);
send_stop();
diff --git a/common/usb.c b/common/usb.c
index d9515e659c..0857494b27 100644
--- a/common/usb.c
+++ b/common/usb.c
@@ -72,6 +72,8 @@ static int running;
static int asynch_allowed;
static struct devrequest setup_packet;
+char usb_started; /* flag for the started/stopped USB status */
+
/**********************************************************************
* some forward declerations...
*/
@@ -110,10 +112,12 @@ int usb_init(void)
printf("scanning bus for devices... ");
running=1;
usb_scan_devices();
+ usb_started = 1;
return 0;
}
else {
printf("Error, couldn't init Lowlevel part\n");
+ usb_started = 0;
return -1;
}
}
@@ -124,6 +128,7 @@ int usb_init(void)
int usb_stop(void)
{
asynch_allowed=1;
+ usb_started = 0;
usb_hub_reset();
return usb_lowlevel_stop();
}
@@ -280,56 +285,68 @@ int usb_set_maxpacket(struct usb_device *dev)
int usb_parse_config(struct usb_device *dev, unsigned char *buffer, int cfgno)
{
struct usb_descriptor_header *head;
- int index,ifno,epno;
- ifno=-1;
- epno=-1;
-
- dev->configno=cfgno;
- head =(struct usb_descriptor_header *)&buffer[0];
- if(head->bDescriptorType!=USB_DT_CONFIG) {
- printf(" ERROR: NOT USB_CONFIG_DESC %x\n",head->bDescriptorType);
+ int index, ifno, epno, curr_if_num;
+ int i;
+ unsigned char *ch;
+
+ ifno = -1;
+ epno = -1;
+ curr_if_num = -1;
+
+ dev->configno = cfgno;
+ head = (struct usb_descriptor_header *) &buffer[0];
+ if(head->bDescriptorType != USB_DT_CONFIG) {
+ printf(" ERROR: NOT USB_CONFIG_DESC %x\n", head->bDescriptorType);
return -1;
}
- memcpy(&dev->config,buffer,buffer[0]);
- dev->config.wTotalLength=swap_16(dev->config.wTotalLength);
- dev->config.no_of_if=0;
+ memcpy(&dev->config, buffer, buffer[0]);
+ dev->config.wTotalLength = swap_16(dev->config.wTotalLength);
+ dev->config.no_of_if = 0;
- index=dev->config.bLength;
+ index = dev->config.bLength;
/* Ok the first entry must be a configuration entry, now process the others */
- head=(struct usb_descriptor_header *)&buffer[index];
- while(index+1 < dev->config.wTotalLength) {
+ head = (struct usb_descriptor_header *) &buffer[index];
+ while(index + 1 < dev->config.wTotalLength) {
switch(head->bDescriptorType) {
case USB_DT_INTERFACE:
- ifno=dev->config.no_of_if;
- dev->config.no_of_if++; /* found an interface desc, increase numbers */
- memcpy(&dev->config.if_desc[ifno],&buffer[index],buffer[index]); /* copy new desc */
- dev->config.if_desc[ifno].no_of_ep=0;
-
+ if(((struct usb_interface_descriptor *) &buffer[index])->
+ bInterfaceNumber != curr_if_num) {
+ /* this is a new interface, copy new desc */
+ ifno = dev->config.no_of_if;
+ dev->config.no_of_if++;
+ memcpy(&dev->config.if_desc[ifno],
+ &buffer[index], buffer[index]);
+ dev->config.if_desc[ifno].no_of_ep = 0;
+ dev->config.if_desc[ifno].num_altsetting = 1;
+ curr_if_num = dev->config.if_desc[ifno].bInterfaceNumber;
+ } else {
+ /* found alternate setting for the interface */
+ dev->config.if_desc[ifno].num_altsetting++;
+ }
break;
case USB_DT_ENDPOINT:
- epno=dev->config.if_desc[ifno].no_of_ep;
+ epno = dev->config.if_desc[ifno].no_of_ep;
dev->config.if_desc[ifno].no_of_ep++; /* found an endpoint */
- memcpy(&dev->config.if_desc[ifno].ep_desc[epno],&buffer[index],buffer[index]);
- dev->config.if_desc[ifno].ep_desc[epno].wMaxPacketSize
- =swap_16(dev->config.if_desc[ifno].ep_desc[epno].wMaxPacketSize);
- USB_PRINTF("if %d, ep %d\n",ifno,epno);
+ memcpy(&dev->config.if_desc[ifno].ep_desc[epno],
+ &buffer[index], buffer[index]);
+ dev->config.if_desc[ifno].ep_desc[epno].wMaxPacketSize =
+ swap_16(dev->config.if_desc[ifno].ep_desc[epno].wMaxPacketSize);
+ USB_PRINTF("if %d, ep %d\n", ifno, epno);
break;
default:
- if(head->bLength==0)
+ if(head->bLength == 0)
return 1;
- USB_PRINTF("unknown Description Type : %x\n",head->bDescriptorType);
+ USB_PRINTF("unknown Description Type : %x\n", head->bDescriptorType);
{
- int i;
- unsigned char *ch;
- ch=(unsigned char *)head;
- for(i=0;i<head->bLength; i++)
- USB_PRINTF("%02X ",*ch++);
+ ch = (unsigned char *)head;
+ for(i = 0; i < head->bLength; i++)
+ USB_PRINTF("%02X ", *ch++);
USB_PRINTF("\n\n\n");
}
break;
}
- index+=head->bLength;
- head=(struct usb_descriptor_header *)&buffer[index];
+ index += head->bLength;
+ head = (struct usb_descriptor_header *)&buffer[index];
}
return 1;
}
@@ -443,6 +460,14 @@ int usb_set_interface(struct usb_device *dev, int interface, int alternate)
printf("selecting invalid interface %d", interface);
return -1;
}
+ /*
+ * We should return now for devices with only one alternate setting.
+ * According to 9.4.10 of the Universal Serial Bus Specification Revision 2.0
+ * such devices can return with a STALL. This results in some USB sticks
+ * timeouting during initialization and then being unusable in U-Boot.
+ */
+ if (if_face->num_altsetting == 1)
+ return 0;
if ((ret = usb_control_msg(dev, usb_sndctrlpipe(dev, 0),
USB_REQ_SET_INTERFACE, USB_RECIP_INTERFACE, alternate,
diff --git a/common/usb_storage.c b/common/usb_storage.c
index 99e4ab0d23..e64470cb91 100644
--- a/common/usb_storage.c
+++ b/common/usb_storage.c
@@ -1139,6 +1139,10 @@ int usb_stor_get_info(struct usb_device *dev,struct us_data *ss,block_dev_desc_t
/* USB007 Mini-USB2 Flash Drive */
(dev->descriptor.idVendor == 0x066f &&
dev->descriptor.idProduct == 0x2010)
+ ||
+ /* SanDisk Corporation Cruzer Micro 20044318410546613953 */
+ (dev->descriptor.idVendor == 0x0781 &&
+ dev->descriptor.idProduct == 0x5151)
)
USB_STOR_PRINTF("usb_stor_get_info: skipping RESET..\n");
else
diff --git a/common/xyzModem.c b/common/xyzModem.c
new file mode 100644
index 0000000000..d1d66e8bb3
--- /dev/null
+++ b/common/xyzModem.c
@@ -0,0 +1,746 @@
+/*
+ *==========================================================================
+ *
+ * xyzModem.c
+ *
+ * RedBoot stream handler for xyzModem protocol
+ *
+ *==========================================================================
+ *####ECOSGPLCOPYRIGHTBEGIN####
+ * -------------------------------------------
+ * This file is part of eCos, the Embedded Configurable Operating System.
+ * Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
+ * Copyright (C) 2002 Gary Thomas
+ *
+ * eCos is free software; you can redistribute it and/or modify it under
+ * the terms of the GNU General Public License as published by the Free
+ * Software Foundation; either version 2 or (at your option) any later version.
+ *
+ * eCos is distributed in the hope that it will be useful, but WITHOUT ANY
+ * WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with eCos; if not, write to the Free Software Foundation, Inc.,
+ * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+ *
+ * As a special exception, if other files instantiate templates or use macros
+ * or inline functions from this file, or you compile this file and link it
+ * with other works to produce a work based on this file, this file does not
+ * by itself cause the resulting work to be covered by the GNU General Public
+ * License. However the source code for this file must still be made available
+ * in accordance with section (3) of the GNU General Public License.
+ *
+ * This exception does not invalidate any other reasons why a work based on
+ * this file might be covered by the GNU General Public License.
+ *
+ * Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
+ * at http: *sources.redhat.com/ecos/ecos-license/
+ * -------------------------------------------
+ *####ECOSGPLCOPYRIGHTEND####
+ *==========================================================================
+ *#####DESCRIPTIONBEGIN####
+ *
+ * Author(s): gthomas
+ * Contributors: gthomas, tsmith, Yoshinori Sato
+ * Date: 2000-07-14
+ * Purpose:
+ * Description:
+ *
+ * This code is part of RedBoot (tm).
+ *
+ *####DESCRIPTIONEND####
+ *
+ *==========================================================================
+ */
+#include <common.h>
+#include <xyzModem.h>
+#include <stdarg.h>
+#include <crc.h>
+
+/* Assumption - run xyzModem protocol over the console port */
+
+/* Values magic to the protocol */
+#define SOH 0x01
+#define STX 0x02
+#define EOT 0x04
+#define ACK 0x06
+#define BSP 0x08
+#define NAK 0x15
+#define CAN 0x18
+#define EOF 0x1A /* ^Z for DOS officionados */
+
+#define USE_YMODEM_LENGTH
+
+/* Data & state local to the protocol */
+static struct {
+#ifdef REDBOOT
+ hal_virtual_comm_table_t* __chan;
+#else
+ int *__chan;
+#endif
+ unsigned char pkt[1024], *bufp;
+ unsigned char blk,cblk,crc1,crc2;
+ unsigned char next_blk; /* Expected block */
+ int len, mode, total_retries;
+ int total_SOH, total_STX, total_CAN;
+ bool crc_mode, at_eof, tx_ack;
+#ifdef USE_YMODEM_LENGTH
+ unsigned long file_length, read_length;
+#endif
+} xyz;
+
+#define xyzModem_CHAR_TIMEOUT 2000 /* 2 seconds */
+#define xyzModem_MAX_RETRIES 20
+#define xyzModem_MAX_RETRIES_WITH_CRC 10
+#define xyzModem_CAN_COUNT 3 /* Wait for 3 CAN before quitting */
+
+
+#ifndef REDBOOT /*SB */
+typedef int cyg_int32;
+int CYGACC_COMM_IF_GETC_TIMEOUT (char chan,char *c) {
+#define DELAY 20
+ unsigned long counter=0;
+ while (!tstc() && (counter < xyzModem_CHAR_TIMEOUT*1000/DELAY)) {
+ udelay(DELAY);
+ counter++;
+ }
+ if (tstc()) {
+ *c=getc();
+ return 1;
+ }
+ return 0;
+}
+
+void CYGACC_COMM_IF_PUTC(char x,char y) {
+ putc(y);
+}
+
+/* Validate a hex character */
+__inline__ static bool
+_is_hex(char c)
+{
+ return (((c >= '0') && (c <= '9')) ||
+ ((c >= 'A') && (c <= 'F')) ||
+ ((c >= 'a') && (c <= 'f')));
+}
+
+/* Convert a single hex nibble */
+__inline__ static int
+_from_hex(char c)
+{
+ int ret = 0;
+
+ if ((c >= '0') && (c <= '9')) {
+ ret = (c - '0');
+ } else if ((c >= 'a') && (c <= 'f')) {
+ ret = (c - 'a' + 0x0a);
+ } else if ((c >= 'A') && (c <= 'F')) {
+ ret = (c - 'A' + 0x0A);
+ }
+ return ret;
+}
+
+/* Convert a character to lower case */
+__inline__ static char
+_tolower(char c)
+{
+ if ((c >= 'A') && (c <= 'Z')) {
+ c = (c - 'A') + 'a';
+ }
+ return c;
+}
+
+/* Parse (scan) a number */
+bool
+parse_num(char *s, unsigned long *val, char **es, char *delim)
+{
+ bool first = true;
+ int radix = 10;
+ char c;
+ unsigned long result = 0;
+ int digit;
+
+ while (*s == ' ') s++;
+ while (*s) {
+ if (first && (s[0] == '0') && (_tolower(s[1]) == 'x')) {
+ radix = 16;
+ s += 2;
+ }
+ first = false;
+ c = *s++;
+ if (_is_hex(c) && ((digit = _from_hex(c)) < radix)) {
+ /* Valid digit */
+#ifdef CYGPKG_HAL_MIPS
+ /* FIXME: tx49 compiler generates 0x2539018 for MUL which */
+ /* isn't any good. */
+ if (16 == radix)
+ result = result << 4;
+ else
+ result = 10 * result;
+ result += digit;
+#else
+ result = (result * radix) + digit;
+#endif
+ } else {
+ if (delim != (char *)0) {
+ /* See if this character is one of the delimiters */
+ char *dp = delim;
+ while (*dp && (c != *dp)) dp++;
+ if (*dp) break; /* Found a good delimiter */
+ }
+ return false; /* Malformatted number */
+ }
+ }
+ *val = result;
+ if (es != (char **)0) {
+ *es = s;
+ }
+ return true;
+}
+
+#endif
+
+#define USE_SPRINTF
+#ifdef DEBUG
+#ifndef USE_SPRINTF
+/*
+ * Note: this debug setup only works if the target platform has two serial ports
+ * available so that the other one (currently only port 1) can be used for debug
+ * messages.
+ */
+static int
+zm_dprintf(char *fmt, ...)
+{
+ int cur_console;
+ va_list args;
+
+ va_start(args, fmt);
+#ifdef REDBOOT
+ cur_console = CYGACC_CALL_IF_SET_CONSOLE_COMM(CYGNUM_CALL_IF_SET_COMM_ID_QUERY_CURRENT);
+ CYGACC_CALL_IF_SET_CONSOLE_COMM(1);
+#endif
+ diag_vprintf(fmt, args);
+#ifdef REDBOOT
+ CYGACC_CALL_IF_SET_CONSOLE_COMM(cur_console);
+#endif
+}
+
+static void
+zm_flush(void)
+{
+}
+
+#else
+/*
+ * Note: this debug setup works by storing the strings in a fixed buffer
+ */
+#define FINAL
+#ifdef FINAL
+static char *zm_out = (char *)0x00380000;
+static char *zm_out_start = (char *)0x00380000;
+#else
+static char zm_buf[8192];
+static char *zm_out=zm_buf;
+static char *zm_out_start = zm_buf;
+
+#endif
+static int
+zm_dprintf(char *fmt, ...)
+{
+ int len;
+ va_list args;
+
+ va_start(args, fmt);
+ len = diag_vsprintf(zm_out, fmt, args);
+ zm_out += len;
+ return len;
+}
+
+static void
+zm_flush(void)
+{
+#ifdef REDBOOT
+ char *p = zm_out_start;
+ while (*p) mon_write_char(*p++);
+#endif
+ zm_out = zm_out_start;
+}
+#endif
+
+static void
+zm_dump_buf(void *buf, int len)
+{
+#ifdef REDBOOT
+ diag_vdump_buf_with_offset(zm_dprintf, buf, len, 0);
+#else
+
+#endif
+}
+
+static unsigned char zm_buf[2048];
+static unsigned char *zm_bp;
+
+static void
+zm_new(void)
+{
+ zm_bp = zm_buf;
+}
+
+static void
+zm_save(unsigned char c)
+{
+ *zm_bp++ = c;
+}
+
+static void
+zm_dump(int line)
+{
+ zm_dprintf("Packet at line: %d\n", line);
+ zm_dump_buf(zm_buf, zm_bp-zm_buf);
+}
+
+#define ZM_DEBUG(x) x
+#else
+#define ZM_DEBUG(x)
+#endif
+
+/* Wait for the line to go idle */
+static void
+xyzModem_flush(void)
+{
+ int res;
+ char c;
+ while (true) {
+ res = CYGACC_COMM_IF_GETC_TIMEOUT(*xyz.__chan, &c);
+ if (!res) return;
+ }
+}
+
+static int
+xyzModem_get_hdr(void)
+{
+ char c;
+ int res;
+ bool hdr_found = false;
+ int i, can_total, hdr_chars;
+ unsigned short cksum;
+
+ ZM_DEBUG(zm_new());
+ /* Find the start of a header */
+ can_total = 0;
+ hdr_chars = 0;
+
+ if (xyz.tx_ack) {
+ CYGACC_COMM_IF_PUTC(*xyz.__chan, ACK);
+ xyz.tx_ack = false;
+ }
+ while (!hdr_found) {
+ res = CYGACC_COMM_IF_GETC_TIMEOUT(*xyz.__chan, &c);
+ ZM_DEBUG(zm_save(c));
+ if (res) {
+ hdr_chars++;
+ switch (c) {
+ case SOH:
+ xyz.total_SOH++;
+ case STX:
+ if (c == STX) xyz.total_STX++;
+ hdr_found = true;
+ break;
+ case CAN:
+ xyz.total_CAN++;
+ ZM_DEBUG(zm_dump(__LINE__));
+ if (++can_total == xyzModem_CAN_COUNT) {
+ return xyzModem_cancel;
+ } else {
+ /* Wait for multiple CAN to avoid early quits */
+ break;
+ }
+ case EOT:
+ /* EOT only supported if no noise */
+ if (hdr_chars == 1) {
+ CYGACC_COMM_IF_PUTC(*xyz.__chan, ACK);
+ ZM_DEBUG(zm_dprintf("ACK on EOT #%d\n", __LINE__));
+ ZM_DEBUG(zm_dump(__LINE__));
+ return xyzModem_eof;
+ }
+ default:
+ /* Ignore, waiting for start of header */
+ ;
+ }
+ } else {
+ /* Data stream timed out */
+ xyzModem_flush(); /* Toss any current input */
+ ZM_DEBUG(zm_dump(__LINE__));
+ CYGACC_CALL_IF_DELAY_US((cyg_int32)250000);
+ return xyzModem_timeout;
+ }
+ }
+
+ /* Header found, now read the data */
+ res = CYGACC_COMM_IF_GETC_TIMEOUT(*xyz.__chan, (char *)&xyz.blk);
+ ZM_DEBUG(zm_save(xyz.blk));
+ if (!res) {
+ ZM_DEBUG(zm_dump(__LINE__));
+ return xyzModem_timeout;
+ }
+ res = CYGACC_COMM_IF_GETC_TIMEOUT(*xyz.__chan, (char *)&xyz.cblk);
+ ZM_DEBUG(zm_save(xyz.cblk));
+ if (!res) {
+ ZM_DEBUG(zm_dump(__LINE__));
+ return xyzModem_timeout;
+ }
+ xyz.len = (c == SOH) ? 128 : 1024;
+ xyz.bufp = xyz.pkt;
+ for (i = 0; i < xyz.len; i++) {
+ res = CYGACC_COMM_IF_GETC_TIMEOUT(*xyz.__chan, &c);
+ ZM_DEBUG(zm_save(c));
+ if (res) {
+ xyz.pkt[i] = c;
+ } else {
+ ZM_DEBUG(zm_dump(__LINE__));
+ return xyzModem_timeout;
+ }
+ }
+ res = CYGACC_COMM_IF_GETC_TIMEOUT(*xyz.__chan, (char *)&xyz.crc1);
+ ZM_DEBUG(zm_save(xyz.crc1));
+ if (!res) {
+ ZM_DEBUG(zm_dump(__LINE__));
+ return xyzModem_timeout;
+ }
+ if (xyz.crc_mode) {
+ res = CYGACC_COMM_IF_GETC_TIMEOUT(*xyz.__chan, (char *)&xyz.crc2);
+ ZM_DEBUG(zm_save(xyz.crc2));
+ if (!res) {
+ ZM_DEBUG(zm_dump(__LINE__));
+ return xyzModem_timeout;
+ }
+ }
+ ZM_DEBUG(zm_dump(__LINE__));
+ /* Validate the message */
+ if ((xyz.blk ^ xyz.cblk) != (unsigned char)0xFF) {
+ ZM_DEBUG(zm_dprintf("Framing error - blk: %x/%x/%x\n", xyz.blk, xyz.cblk, (xyz.blk ^ xyz.cblk)));
+ ZM_DEBUG(zm_dump_buf(xyz.pkt, xyz.len));
+ xyzModem_flush();
+ return xyzModem_frame;
+ }
+ /* Verify checksum/CRC */
+ if (xyz.crc_mode) {
+ cksum = cyg_crc16(xyz.pkt, xyz.len);
+ if (cksum != ((xyz.crc1 << 8) | xyz.crc2)) {
+ ZM_DEBUG(zm_dprintf("CRC error - recvd: %02x%02x, computed: %x\n",
+ xyz.crc1, xyz.crc2, cksum & 0xFFFF));
+ return xyzModem_cksum;
+ }
+ } else {
+ cksum = 0;
+ for (i = 0; i < xyz.len; i++) {
+ cksum += xyz.pkt[i];
+ }
+ if (xyz.crc1 != (cksum & 0xFF)) {
+ ZM_DEBUG(zm_dprintf("Checksum error - recvd: %x, computed: %x\n", xyz.crc1, cksum & 0xFF));
+ return xyzModem_cksum;
+ }
+ }
+ /* If we get here, the message passes [structural] muster */
+ return 0;
+}
+
+int
+xyzModem_stream_open(connection_info_t *info, int *err)
+{
+#ifdef REDBOOT
+ int console_chan;
+#endif
+ int stat = 0;
+ int retries = xyzModem_MAX_RETRIES;
+ int crc_retries = xyzModem_MAX_RETRIES_WITH_CRC;
+
+/* ZM_DEBUG(zm_out = zm_out_start); */
+#ifdef xyzModem_zmodem
+ if (info->mode == xyzModem_zmodem) {
+ *err = xyzModem_noZmodem;
+ return -1;
+ }
+#endif
+
+#ifdef REDBOOT
+ /* Set up the I/O channel. Note: this allows for using a different port in the future */
+ console_chan = CYGACC_CALL_IF_SET_CONSOLE_COMM(CYGNUM_CALL_IF_SET_COMM_ID_QUERY_CURRENT);
+ if (info->chan >= 0) {
+ CYGACC_CALL_IF_SET_CONSOLE_COMM(info->chan);
+ } else {
+ CYGACC_CALL_IF_SET_CONSOLE_COMM(console_chan);
+ }
+ xyz.__chan = CYGACC_CALL_IF_CONSOLE_PROCS();
+
+ CYGACC_CALL_IF_SET_CONSOLE_COMM(console_chan);
+ CYGACC_COMM_IF_CONTROL(*xyz.__chan, __COMMCTL_SET_TIMEOUT, xyzModem_CHAR_TIMEOUT);
+#else
+/* TODO: CHECK ! */
+ int dummy;
+ xyz.__chan=&dummy;
+#endif
+ xyz.len = 0;
+ xyz.crc_mode = true;
+ xyz.at_eof = false;
+ xyz.tx_ack = false;
+ xyz.mode = info->mode;
+ xyz.total_retries = 0;
+ xyz.total_SOH = 0;
+ xyz.total_STX = 0;
+ xyz.total_CAN = 0;
+#ifdef USE_YMODEM_LENGTH
+ xyz.read_length = 0;
+ xyz.file_length = 0;
+#endif
+
+ CYGACC_COMM_IF_PUTC(*xyz.__chan, (xyz.crc_mode ? 'C' : NAK));
+
+ if (xyz.mode == xyzModem_xmodem) {
+ /* X-modem doesn't have an information header - exit here */
+ xyz.next_blk = 1;
+ return 0;
+ }
+
+ while (retries-- > 0) {
+ stat = xyzModem_get_hdr();
+ if (stat == 0) {
+ /* Y-modem file information header */
+ if (xyz.blk == 0) {
+#ifdef USE_YMODEM_LENGTH
+ /* skip filename */
+ while (*xyz.bufp++);
+ /* get the length */
+ parse_num((char *)xyz.bufp, &xyz.file_length, NULL, " ");
+#endif
+ /* The rest of the file name data block quietly discarded */
+ xyz.tx_ack = true;
+ }
+ xyz.next_blk = 1;
+ xyz.len = 0;
+ return 0;
+ } else
+ if (stat == xyzModem_timeout) {
+ if (--crc_retries <= 0) xyz.crc_mode = false;
+ CYGACC_CALL_IF_DELAY_US(5*100000); /* Extra delay for startup */
+ CYGACC_COMM_IF_PUTC(*xyz.__chan, (xyz.crc_mode ? 'C' : NAK));
+ xyz.total_retries++;
+ ZM_DEBUG(zm_dprintf("NAK (%d)\n", __LINE__));
+ }
+ if (stat == xyzModem_cancel) {
+ break;
+ }
+ }
+ *err = stat;
+ ZM_DEBUG(zm_flush());
+ return -1;
+}
+
+int
+xyzModem_stream_read(char *buf, int size, int *err)
+{
+ int stat, total, len;
+ int retries;
+
+ total = 0;
+ stat = xyzModem_cancel;
+ /* Try and get 'size' bytes into the buffer */
+ while (!xyz.at_eof && (size > 0)) {
+ if (xyz.len == 0) {
+ retries = xyzModem_MAX_RETRIES;
+ while (retries-- > 0) {
+ stat = xyzModem_get_hdr();
+ if (stat == 0) {
+ if (xyz.blk == xyz.next_blk) {
+ xyz.tx_ack = true;
+ ZM_DEBUG(zm_dprintf("ACK block %d (%d)\n", xyz.blk, __LINE__));
+ xyz.next_blk = (xyz.next_blk + 1) & 0xFF;
+
+#if defined(xyzModem_zmodem) || defined(USE_YMODEM_LENGTH)
+ if (xyz.mode == xyzModem_xmodem || xyz.file_length == 0) {
+#else
+ if (1) {
+#endif
+ /* Data blocks can be padded with ^Z (EOF) characters */
+ /* This code tries to detect and remove them */
+ if ((xyz.bufp[xyz.len-1] == EOF) &&
+ (xyz.bufp[xyz.len-2] == EOF) &&
+ (xyz.bufp[xyz.len-3] == EOF)) {
+ while (xyz.len && (xyz.bufp[xyz.len-1] == EOF)) {
+ xyz.len--;
+ }
+ }
+ }
+
+#ifdef USE_YMODEM_LENGTH
+ /*
+ * See if accumulated length exceeds that of the file.
+ * If so, reduce size (i.e., cut out pad bytes)
+ * Only do this for Y-modem (and Z-modem should it ever
+ * be supported since it can fall back to Y-modem mode).
+ */
+ if (xyz.mode != xyzModem_xmodem && 0 != xyz.file_length) {
+ xyz.read_length += xyz.len;
+ if (xyz.read_length > xyz.file_length) {
+ xyz.len -= (xyz.read_length - xyz.file_length);
+ }
+ }
+#endif
+ break;
+ } else if (xyz.blk == ((xyz.next_blk - 1) & 0xFF)) {
+ /* Just re-ACK this so sender will get on with it */
+ CYGACC_COMM_IF_PUTC(*xyz.__chan, ACK);
+ continue; /* Need new header */
+ } else {
+ stat = xyzModem_sequence;
+ }
+ }
+ if (stat == xyzModem_cancel) {
+ break;
+ }
+ if (stat == xyzModem_eof) {
+ CYGACC_COMM_IF_PUTC(*xyz.__chan, ACK);
+ ZM_DEBUG(zm_dprintf("ACK (%d)\n", __LINE__));
+ if (xyz.mode == xyzModem_ymodem) {
+ CYGACC_COMM_IF_PUTC(*xyz.__chan, (xyz.crc_mode ? 'C' : NAK));
+ xyz.total_retries++;
+ ZM_DEBUG(zm_dprintf("Reading Final Header\n"));
+ stat = xyzModem_get_hdr();
+ CYGACC_COMM_IF_PUTC(*xyz.__chan, ACK);
+ ZM_DEBUG(zm_dprintf("FINAL ACK (%d)\n", __LINE__));
+ }
+ xyz.at_eof = true;
+ break;
+ }
+ CYGACC_COMM_IF_PUTC(*xyz.__chan, (xyz.crc_mode ? 'C' : NAK));
+ xyz.total_retries++;
+ ZM_DEBUG(zm_dprintf("NAK (%d)\n", __LINE__));
+ }
+ if (stat < 0) {
+ *err = stat;
+ xyz.len = -1;
+ return total;
+ }
+ }
+ /* Don't "read" data from the EOF protocol package */
+ if (!xyz.at_eof) {
+ len = xyz.len;
+ if (size < len) len = size;
+ memcpy(buf, xyz.bufp, len);
+ size -= len;
+ buf += len;
+ total += len;
+ xyz.len -= len;
+ xyz.bufp += len;
+ }
+ }
+ return total;
+}
+
+void
+xyzModem_stream_close(int *err)
+{
+ diag_printf("xyzModem - %s mode, %d(SOH)/%d(STX)/%d(CAN) packets, %d retries\n",
+ xyz.crc_mode ? "CRC" : "Cksum",
+ xyz.total_SOH, xyz.total_STX, xyz.total_CAN,
+ xyz.total_retries);
+ ZM_DEBUG(zm_flush());
+}
+
+/* Need to be able to clean out the input buffer, so have to take the */
+/* getc */
+void xyzModem_stream_terminate(bool abort, int (*getc)(void))
+{
+ int c;
+
+ if (abort) {
+ ZM_DEBUG(zm_dprintf("!!!! TRANSFER ABORT !!!!\n"));
+ switch (xyz.mode) {
+ case xyzModem_xmodem:
+ case xyzModem_ymodem:
+ /* The X/YMODEM Spec seems to suggest that multiple CAN followed by an equal */
+ /* number of Backspaces is a friendly way to get the other end to abort. */
+ CYGACC_COMM_IF_PUTC(*xyz.__chan,CAN);
+ CYGACC_COMM_IF_PUTC(*xyz.__chan,CAN);
+ CYGACC_COMM_IF_PUTC(*xyz.__chan,CAN);
+ CYGACC_COMM_IF_PUTC(*xyz.__chan,CAN);
+ CYGACC_COMM_IF_PUTC(*xyz.__chan,BSP);
+ CYGACC_COMM_IF_PUTC(*xyz.__chan,BSP);
+ CYGACC_COMM_IF_PUTC(*xyz.__chan,BSP);
+ CYGACC_COMM_IF_PUTC(*xyz.__chan,BSP);
+ /* Now consume the rest of what's waiting on the line. */
+ ZM_DEBUG(zm_dprintf("Flushing serial line.\n"));
+ xyzModem_flush();
+ xyz.at_eof = true;
+ break;
+#ifdef xyzModem_zmodem
+ case xyzModem_zmodem:
+ /* Might support it some day I suppose. */
+#endif
+ break;
+ }
+ } else {
+ ZM_DEBUG(zm_dprintf("Engaging cleanup mode...\n"));
+ /*
+ * Consume any trailing crap left in the inbuffer from
+ * previous recieved blocks. Since very few files are an exact multiple
+ * of the transfer block size, there will almost always be some gunk here.
+ * If we don't eat it now, RedBoot will think the user typed it.
+ */
+ ZM_DEBUG(zm_dprintf("Trailing gunk:\n"));
+ while ((c = (*getc)()) > -1) ;
+ ZM_DEBUG(zm_dprintf("\n"));
+ /*
+ * Make a small delay to give terminal programs like minicom
+ * time to get control again after their file transfer program
+ * exits.
+ */
+ CYGACC_CALL_IF_DELAY_US((cyg_int32)250000);
+ }
+}
+
+char *
+xyzModem_error(int err)
+{
+ switch (err) {
+ case xyzModem_access:
+ return "Can't access file";
+ break;
+ case xyzModem_noZmodem:
+ return "Sorry, zModem not available yet";
+ break;
+ case xyzModem_timeout:
+ return "Timed out";
+ break;
+ case xyzModem_eof:
+ return "End of file";
+ break;
+ case xyzModem_cancel:
+ return "Cancelled";
+ break;
+ case xyzModem_frame:
+ return "Invalid framing";
+ break;
+ case xyzModem_cksum:
+ return "CRC/checksum error";
+ break;
+ case xyzModem_sequence:
+ return "Block sequence error";
+ break;
+ default:
+ return "Unknown error";
+ break;
+ }
+}
+
+/*
+ * RedBoot interface
+ */
+#if 0 /* SB */
+GETC_IO_FUNCS(xyzModem_io, xyzModem_stream_open, xyzModem_stream_close,
+ xyzModem_stream_terminate, xyzModem_stream_read, xyzModem_error);
+RedBoot_load(xmodem, xyzModem_io, false, false, xyzModem_xmodem);
+RedBoot_load(ymodem, xyzModem_io, false, false, xyzModem_ymodem);
+#endif
diff --git a/config.mk b/config.mk
index d85ac36b5e..b59667a833 100644
--- a/config.mk
+++ b/config.mk
@@ -53,6 +53,10 @@ PLATFORM_CPPFLAGS+= -D__ARM__
endif
endif
+ifeq ($(ARCH),blackfin)
+PLATFORM_CPPFLAGS+= -D__BLACKFIN__ -mno-underscore
+endif
+
ifdef ARCH
sinclude $(TOPDIR)/$(ARCH)_config.mk # include architecture dependend rules
endif
@@ -108,7 +112,7 @@ OBJDUMP = $(CROSS_COMPILE)objdump
RANLIB = $(CROSS_COMPILE)RANLIB
RELFLAGS= $(PLATFORM_RELFLAGS)
-DBGFLAGS= -g #-DDEBUG
+DBGFLAGS= -g # -DDEBUG
OPTFLAGS= -Os #-fomit-frame-pointer
ifndef LDSCRIPT
#LDSCRIPT := $(TOPDIR)/board/$(BOARDDIR)/u-boot.lds.debug
@@ -140,6 +144,14 @@ endif
endif
AFLAGS_DEBUG := -Wa,-gstabs
+
+# turn jbsr into jsr for m68k
+ifeq ($(ARCH),m68k)
+ifeq ($(findstring 3.4,$(shell $(CC) --version)),3.4)
+AFLAGS_DEBUG := -Wa,-gstabs,-S
+endif
+endif
+
AFLAGS := $(AFLAGS_DEBUG) -D__ASSEMBLY__ $(CPPFLAGS)
LDFLAGS += -Bstatic -T $(LDSCRIPT) -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS)
diff --git a/cpu/74xx_7xx/cpu.c b/cpu/74xx_7xx/cpu.c
index 629ed66b07..ca45e17edb 100644
--- a/cpu/74xx_7xx/cpu.c
+++ b/cpu/74xx_7xx/cpu.c
@@ -49,6 +49,8 @@
#include "../board/MAI/AmigaOneG3SE/memio.h"
#endif
+DECLARE_GLOBAL_DATA_PTR;
+
cpu_t
get_cpu_type(void)
{
@@ -111,8 +113,6 @@ get_cpu_type(void)
#if !defined(CONFIG_BAB7xx)
int checkcpu (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
uint type = get_cpu_type();
uint pvr = get_pvr();
ulong clock = gd->cpu_clk;
@@ -215,7 +215,8 @@ soft_restart(unsigned long addr)
#if !defined(CONFIG_PCIPPC2) && \
!defined(CONFIG_BAB7xx) && \
- !defined(CONFIG_ELPPC)
+ !defined(CONFIG_ELPPC) && \
+ !defined(CONFIG_PPMC7XX)
/* no generic way to do board reset. simply call soft_reset. */
void
do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
@@ -258,8 +259,6 @@ do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
#ifdef CONFIG_AMIGAONEG3SE
unsigned long get_tbclk(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
return (gd->bus_clk / 4);
}
#else /* ! CONFIG_AMIGAONEG3SE */
diff --git a/cpu/74xx_7xx/speed.c b/cpu/74xx_7xx/speed.c
index f94ff78711..2dc510746d 100644
--- a/cpu/74xx_7xx/speed.c
+++ b/cpu/74xx_7xx/speed.c
@@ -29,6 +29,8 @@
#include "../board/MAI/AmigaOneG3SE/via686.h"
#endif
+DECLARE_GLOBAL_DATA_PTR;
+
static const int hid1_multipliers_x_10[] = {
25, /* 0000 - 2.5x */
75, /* 0001 - 7.5x */
@@ -85,7 +87,6 @@ static const int hid1_fx_multipliers_x_10[] = {
int get_clocks (void)
{
- DECLARE_GLOBAL_DATA_PTR;
ulong clock = 0;
/* calculate the clock frequency based upon the CPU type */
diff --git a/cpu/74xx_7xx/start.S b/cpu/74xx_7xx/start.S
index ff1cce55d8..1fc0fe6bc1 100644
--- a/cpu/74xx_7xx/start.S
+++ b/cpu/74xx_7xx/start.S
@@ -756,7 +756,8 @@ in_ram:
#if defined(CONFIG_AMIGAONEG3SE) || \
defined(CONFIG_DB64360) || \
defined(CONFIG_DB64460) || \
- defined(CONFIG_CPCI750)
+ defined(CONFIG_CPCI750) || \
+ defined(CONFIG_PPMC7XX)
mr r4, r9 /* Use RAM copy of the global data */
#endif
bl after_reloc
diff --git a/cpu/74xx_7xx/traps.c b/cpu/74xx_7xx/traps.c
index ac5f8bfeb5..50c5eeb483 100644
--- a/cpu/74xx_7xx/traps.c
+++ b/cpu/74xx_7xx/traps.c
@@ -36,6 +36,10 @@
#include <command.h>
#include <asm/processor.h>
+#ifdef CONFIG_AMIGAONEG3SE
+DECLARE_GLOBAL_DATA_PTR;
+#endif
+
#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
int (*debugger_exception_handler)(struct pt_regs *) = 0;
#endif
@@ -58,9 +62,6 @@ extern unsigned long search_exception_table(unsigned long);
void
print_backtrace(unsigned long *sp)
{
-#ifdef CONFIG_AMIGAONEG3SE
- DECLARE_GLOBAL_DATA_PTR;
-#endif
int cnt = 0;
unsigned long i;
diff --git a/cpu/arm1136/cpu.c b/cpu/arm1136/cpu.c
index 85a48491b3..8e29e03845 100644
--- a/cpu/arm1136/cpu.c
+++ b/cpu/arm1136/cpu.c
@@ -34,7 +34,11 @@
#include <common.h>
#include <command.h>
#if !defined(CONFIG_INTEGRATOR) && ! defined(CONFIG_ARCH_CINTEGRATOR)
-#include <asm/arch/omap2420.h>
+#include <asm/arch/cpu.h>
+#endif
+
+#ifdef CONFIG_USE_IRQ
+DECLARE_GLOBAL_DATA_PTR;
#endif
/* read co-processor 15, register #1 (control register) */
@@ -88,8 +92,6 @@ int cpu_init (void)
* setup up stacks if necessary
*/
#ifdef CONFIG_USE_IRQ
- DECLARE_GLOBAL_DATA_PTR;
-
IRQ_STACK_START = _armboot_start - CFG_MALLOC_LEN - CFG_GBL_DATA_SIZE - 4;
FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ;
#endif
diff --git a/cpu/arm1136/interrupts.c b/cpu/arm1136/interrupts.c
index 1dc36d0344..25ac6906fd 100644
--- a/cpu/arm1136/interrupts.c
+++ b/cpu/arm1136/interrupts.c
@@ -34,7 +34,7 @@
#include <asm/arch/bits.h>
#if !defined(CONFIG_INTEGRATOR) && ! defined(CONFIG_ARCH_CINTEGRATOR)
-# include <asm/arch/omap2420.h>
+# include <asm/arch/cpu.h>
#endif
#include <asm/proc-armv/ptrace.h>
diff --git a/cpu/arm1136/start.S b/cpu/arm1136/start.S
index 17c7a83491..e29de30207 100644
--- a/cpu/arm1136/start.S
+++ b/cpu/arm1136/start.S
@@ -31,7 +31,7 @@
#include <config.h>
#include <version.h>
#if !defined(CONFIG_INTEGRATOR) && ! defined(CONFIG_ARCH_CINTEGRATOR)
-#include <asm/arch/omap2420.h>
+#include <asm/arch/cpu.h>
#endif
.globl _start
_start: b reset
@@ -111,7 +111,7 @@ reset:
orr r0,r0,#0xd3
msr cpsr,r0
-#ifdef CONFIG_OMAP2420H4
+#if (CONFIG_OMAP24XX)
/* Copy vectors to mask ROM indirect addr */
adr r0, _start /* r0 <- current position of code */
add r0, r0, #4 /* skip reset vector */
@@ -127,8 +127,13 @@ next:
stmia r1!, {r3-r10} /* copy to target address [r1] */
cmp r0, r2 /* until source end address [r2] */
bne next /* loop until equal */
+#if !defined(CFG_NAND_BOOT) && !defined(CFG_ONENAND_BOOT)
+ /* No need to copy/exec the clock code - DPLL adjust already done
+ * in NAND/oneNAND Boot.
+ */
bl cpy_clk_code /* put dpll adjust code behind vectors */
-#endif
+#endif /* NAND Boot */
+#endif /* 24xx */
/* the mask ROM code should have PLL and others stable */
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
bl cpu_init_crit
@@ -162,6 +167,7 @@ stack_setup:
sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
#endif
sub sp, r0, #12 /* leave 3 words for abort-stack */
+ and sp, sp, #~7 /* 8 byte alinged for (ldr/str)d */
clear_bss:
ldr r0, _bss_start /* find start of bss segment */
@@ -393,8 +399,8 @@ fiq:
#endif
.align 5
-.global arm1136_cache_flush
-arm1136_cache_flush:
+.global arm_cache_flush
+arm_cache_flush:
mcr p15, 0, r1, c7, c5, 0 @ invalidate I cache
mov pc, lr @ back to caller
diff --git a/cpu/arm720t/serial.c b/cpu/arm720t/serial.c
index 0f99979508..054bab9811 100644
--- a/cpu/arm720t/serial.c
+++ b/cpu/arm720t/serial.c
@@ -34,10 +34,10 @@
#include <clps7111.h>
+DECLARE_GLOBAL_DATA_PTR;
+
void serial_setbrg (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
unsigned int reg = 0;
switch (gd->baudrate) {
diff --git a/cpu/arm720t/serial_netarm.c b/cpu/arm720t/serial_netarm.c
index 5ad98f06fd..bc6bf30b69 100644
--- a/cpu/arm720t/serial_netarm.c
+++ b/cpu/arm720t/serial_netarm.c
@@ -34,6 +34,8 @@
#include <asm/hardware.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#define PORTA (*(volatile unsigned int *)(NETARM_GEN_MODULE_BASE + NETARM_GEN_PORTA))
#if !defined(CONFIG_NETARM_NS7520)
#define PORTB (*(volatile unsigned int *)(NETARM_GEN_MODULE_BASE + NETARM_GEN_PORTB))
@@ -67,9 +69,6 @@ extern void _netarm_led_FAIL1(void);
*/
void serial_setbrg (void)
{
- /* get the gd pointer */
- DECLARE_GLOBAL_DATA_PTR;
-
/* set 0 ... make sure pins are configured for serial */
#if !defined(CONFIG_NETARM_NS7520)
PORTA = PORTB =
diff --git a/cpu/arm920t/at91rm9200/i2c.c b/cpu/arm920t/at91rm9200/i2c.c
index 2565998e48..826cea8e26 100644
--- a/cpu/arm920t/at91rm9200/i2c.c
+++ b/cpu/arm920t/at91rm9200/i2c.c
@@ -111,7 +111,7 @@ at91_xfer(unsigned char chip, unsigned int addr, int alen,
int
i2c_probe(unsigned char chip)
{
- char buffer[1];
+ unsigned char buffer[1];
return at91_xfer(chip, 0, 0, buffer, 1, 1);
}
@@ -191,7 +191,7 @@ i2c_init(int speed, int slaveaddr)
uchar i2c_reg_read(uchar i2c_addr, uchar reg)
{
- char buf;
+ unsigned char buf;
i2c_read(i2c_addr, reg, 1, &buf, 1);
diff --git a/cpu/arm920t/at91rm9200/serial.c b/cpu/arm920t/at91rm9200/serial.c
index a281932b77..d563445492 100644
--- a/cpu/arm920t/at91rm9200/serial.c
+++ b/cpu/arm920t/at91rm9200/serial.c
@@ -33,6 +33,8 @@
#include <asm/io.h>
#include <asm/arch/hardware.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#if !defined(CONFIG_DBGU) && !defined(CONFIG_USART0) && !defined(CONFIG_USART1)
#error must define one of CONFIG_DBGU or CONFIG_USART0 or CONFIG_USART1
#endif
@@ -50,7 +52,6 @@ AT91PS_USART us = (AT91PS_USART) AT91C_BASE_US1;
void serial_setbrg (void)
{
- DECLARE_GLOBAL_DATA_PTR;
int baudrate;
if ((baudrate = gd->baudrate) <= 0)
diff --git a/cpu/arm920t/cpu.c b/cpu/arm920t/cpu.c
index 2f7963dcf6..f93bf57e2b 100644
--- a/cpu/arm920t/cpu.c
+++ b/cpu/arm920t/cpu.c
@@ -33,6 +33,10 @@
#include <command.h>
#include <arm920t.h>
+#ifdef CONFIG_USE_IRQ
+DECLARE_GLOBAL_DATA_PTR;
+#endif
+
/* read co-processor 15, register #1 (control register) */
static unsigned long read_p15_c1 (void)
{
@@ -91,8 +95,6 @@ int cpu_init (void)
* setup up stacks if necessary
*/
#ifdef CONFIG_USE_IRQ
- DECLARE_GLOBAL_DATA_PTR;
-
IRQ_STACK_START = _armboot_start - CFG_MALLOC_LEN - CFG_GBL_DATA_SIZE - 4;
FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ;
#endif
diff --git a/cpu/arm920t/ks8695/serial.c b/cpu/arm920t/ks8695/serial.c
index 0dd91e7dd0..aacd1be630 100644
--- a/cpu/arm920t/ks8695/serial.c
+++ b/cpu/arm920t/ks8695/serial.c
@@ -25,6 +25,8 @@
#error "Bad: you didn't configure serial ..."
#endif
+DECLARE_GLOBAL_DATA_PTR;
+
/*
* Define the UART hardware register access structure.
*/
@@ -54,7 +56,6 @@ int serial_console = 1;
void serial_setbrg(void)
{
- DECLARE_GLOBAL_DATA_PTR;
volatile struct ks8695uart *uartp = KS8695_UART_ADDR;
/* Set to global baud rate and 8 data bits, no parity, 1 stop bit*/
diff --git a/cpu/arm920t/s3c24x0/i2c.c b/cpu/arm920t/s3c24x0/i2c.c
index ef56cd1c31..374b683137 100644
--- a/cpu/arm920t/s3c24x0/i2c.c
+++ b/cpu/arm920t/s3c24x0/i2c.c
@@ -153,7 +153,7 @@ void i2c_init (int speed, int slaveadd)
#endif
#ifdef CONFIG_S3C2400
/* set I2CSDA and I2CSCL (PG5, PG6) to GPIO */
- gpio->PGCON = (gpio->PGCON & ~0x00003c00) | 0x00000c00;
+ gpio->PGCON = (gpio->PGCON & ~0x00003c00) | 0x00001000;
#endif
/* toggle I2CSCL until bus idle */
diff --git a/cpu/arm920t/s3c24x0/interrupts.c b/cpu/arm920t/s3c24x0/interrupts.c
index 3ec9b5400e..1b364123dc 100644
--- a/cpu/arm920t/s3c24x0/interrupts.c
+++ b/cpu/arm920t/s3c24x0/interrupts.c
@@ -176,7 +176,9 @@ ulong get_tbclk (void)
#if defined(CONFIG_SMDK2400) || defined(CONFIG_TRAB)
tbclk = timer_load_val * 100;
-#elif defined(CONFIG_SMDK2410) || defined(CONFIG_VCMA9)
+#elif defined(CONFIG_SBC2410X) || \
+ defined(CONFIG_SMDK2410) || \
+ defined(CONFIG_VCMA9)
tbclk = CFG_HZ;
#else
# error "tbclk not configured"
diff --git a/cpu/arm920t/s3c24x0/serial.c b/cpu/arm920t/s3c24x0/serial.c
index 83274432e4..36851ad5ca 100644
--- a/cpu/arm920t/s3c24x0/serial.c
+++ b/cpu/arm920t/s3c24x0/serial.c
@@ -27,6 +27,8 @@
#include <s3c2410.h>
#endif
+DECLARE_GLOBAL_DATA_PTR;
+
#ifdef CONFIG_SERIAL1
#define UART_NR S3C24X0_UART0
@@ -48,7 +50,6 @@
void serial_setbrg (void)
{
- DECLARE_GLOBAL_DATA_PTR;
S3C24X0_UART * const uart = S3C24X0_GetBase_UART(UART_NR);
int i;
unsigned int reg = 0;
diff --git a/cpu/arm920t/s3c24x0/usb_ohci.c b/cpu/arm920t/s3c24x0/usb_ohci.c
index b4cc74476b..869ca79d03 100644
--- a/cpu/arm920t/s3c24x0/usb_ohci.c
+++ b/cpu/arm920t/s3c24x0/usb_ohci.c
@@ -1647,7 +1647,8 @@ int usb_lowlevel_init(void)
}
/* FIXME this is a second HC reset; why?? */
- writel (gohci.hc_control = OHCI_USB_RESET, &gohci.regs->control);
+ gohci.hc_control = OHCI_USB_RESET;
+ writel (gohci.hc_control, &gohci.regs->control);
wait_ms (10);
if (hc_start (&gohci) < 0) {
diff --git a/cpu/arm920t/start.S b/cpu/arm920t/start.S
index 4603cf5733..346f0d09ea 100644
--- a/cpu/arm920t/start.S
+++ b/cpu/arm920t/start.S
@@ -237,6 +237,7 @@ _start_armboot: .word start_armboot
*/
+#ifndef CONFIG_SKIP_LOWLEVEL_INIT
cpu_init_crit:
/*
* flush v4 I/D caches
@@ -264,7 +265,7 @@ cpu_init_crit:
bl lowlevel_init
mov lr, ip
mov pc, lr
-
+#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
/*
*************************************************************************
diff --git a/cpu/arm925t/cpu.c b/cpu/arm925t/cpu.c
index c1c6b03e42..d85b7fad39 100644
--- a/cpu/arm925t/cpu.c
+++ b/cpu/arm925t/cpu.c
@@ -33,6 +33,10 @@
#include <command.h>
#include <arm925t.h>
+#ifdef CONFIG_USE_IRQ
+DECLARE_GLOBAL_DATA_PTR;
+#endif
+
/* read co-processor 15, register #1 (control register) */
static unsigned long read_p15_c1 (void)
{
@@ -91,8 +95,6 @@ int cpu_init (void)
* setup up stacks if necessary
*/
#ifdef CONFIG_USE_IRQ
- DECLARE_GLOBAL_DATA_PTR;
-
IRQ_STACK_START = _armboot_start - CFG_MALLOC_LEN - CFG_GBL_DATA_SIZE - 4;
FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ;
#endif
diff --git a/cpu/arm926ejs/Makefile b/cpu/arm926ejs/Makefile
index 203278e9cf..060fd20c65 100644
--- a/cpu/arm926ejs/Makefile
+++ b/cpu/arm926ejs/Makefile
@@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk
LIB = lib$(CPU).a
START = start.o
-OBJS = interrupts.o cpu.o
+OBJS = interrupts.o cpu.o cpuinfo.o
all: .depend $(START) $(LIB)
diff --git a/cpu/arm926ejs/cpu.c b/cpu/arm926ejs/cpu.c
index f57c5a5d89..722732e589 100644
--- a/cpu/arm926ejs/cpu.c
+++ b/cpu/arm926ejs/cpu.c
@@ -33,6 +33,10 @@
#include <command.h>
#include <arm926ejs.h>
+#ifdef CONFIG_USE_IRQ
+DECLARE_GLOBAL_DATA_PTR;
+#endif
+
/* read co-processor 15, register #1 (control register) */
static unsigned long read_p15_c1 (void)
{
@@ -91,8 +95,6 @@ int cpu_init (void)
* setup up stacks if necessary
*/
#ifdef CONFIG_USE_IRQ
- DECLARE_GLOBAL_DATA_PTR;
-
IRQ_STACK_START = _armboot_start - CFG_MALLOC_LEN - CFG_GBL_DATA_SIZE - 4;
FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ;
#endif
diff --git a/cpu/arm926ejs/cpuinfo.c b/cpu/arm926ejs/cpuinfo.c
new file mode 100644
index 0000000000..8c9863161a
--- /dev/null
+++ b/cpu/arm926ejs/cpuinfo.c
@@ -0,0 +1,244 @@
+/*
+ * OMAP1 CPU identification code
+ *
+ * Copyright (C) 2004 Nokia Corporation
+ * Written by Tony Lindgren <tony@atomide.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <common.h>
+#include <command.h>
+#include <arm926ejs.h>
+
+#if defined(CONFIG_DISPLAY_CPUINFO) && defined(CONFIG_OMAP)
+
+#define omap_readw(x) *(volatile unsigned short *)(x)
+#define omap_readl(x) *(volatile unsigned long *)(x)
+
+#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
+
+#define OMAP_DIE_ID_0 0xfffe1800
+#define OMAP_DIE_ID_1 0xfffe1804
+#define OMAP_PRODUCTION_ID_0 0xfffe2000
+#define OMAP_PRODUCTION_ID_1 0xfffe2004
+#define OMAP32_ID_0 0xfffed400
+#define OMAP32_ID_1 0xfffed404
+
+struct omap_id {
+ u16 jtag_id; /* Used to determine OMAP type */
+ u8 die_rev; /* Processor revision */
+ u32 omap_id; /* OMAP revision */
+ u32 type; /* Cpu id bits [31:08], cpu class bits [07:00] */
+};
+
+/* Register values to detect the OMAP version */
+static struct omap_id omap_ids[] = {
+ { .jtag_id = 0xb574, .die_rev = 0x2, .omap_id = 0x03310315, .type = 0x03100000},
+ { .jtag_id = 0x355f, .die_rev = 0x0, .omap_id = 0x03320000, .type = 0x07300100},
+ { .jtag_id = 0xb55f, .die_rev = 0x0, .omap_id = 0x03320000, .type = 0x07300300},
+ { .jtag_id = 0xb470, .die_rev = 0x0, .omap_id = 0x03310100, .type = 0x15100000},
+ { .jtag_id = 0xb576, .die_rev = 0x0, .omap_id = 0x03320000, .type = 0x16100000},
+ { .jtag_id = 0xb576, .die_rev = 0x2, .omap_id = 0x03320100, .type = 0x16110000},
+ { .jtag_id = 0xb576, .die_rev = 0x3, .omap_id = 0x03320100, .type = 0x16100c00},
+ { .jtag_id = 0xb576, .die_rev = 0x0, .omap_id = 0x03320200, .type = 0x16100d00},
+ { .jtag_id = 0xb613, .die_rev = 0x0, .omap_id = 0x03320300, .type = 0x1610ef00},
+ { .jtag_id = 0xb613, .die_rev = 0x0, .omap_id = 0x03320300, .type = 0x1610ef00},
+ { .jtag_id = 0xb576, .die_rev = 0x1, .omap_id = 0x03320100, .type = 0x16110000},
+ { .jtag_id = 0xb58c, .die_rev = 0x2, .omap_id = 0x03320200, .type = 0x16110b00},
+ { .jtag_id = 0xb58c, .die_rev = 0x3, .omap_id = 0x03320200, .type = 0x16110c00},
+ { .jtag_id = 0xb65f, .die_rev = 0x0, .omap_id = 0x03320400, .type = 0x16212300},
+ { .jtag_id = 0xb65f, .die_rev = 0x1, .omap_id = 0x03320400, .type = 0x16212300},
+ { .jtag_id = 0xb65f, .die_rev = 0x1, .omap_id = 0x03320500, .type = 0x16212300},
+ { .jtag_id = 0xb5f7, .die_rev = 0x0, .omap_id = 0x03330000, .type = 0x17100000},
+ { .jtag_id = 0xb5f7, .die_rev = 0x1, .omap_id = 0x03330100, .type = 0x17100000},
+ { .jtag_id = 0xb5f7, .die_rev = 0x2, .omap_id = 0x03330100, .type = 0x17100000},
+};
+
+/*
+ * Get OMAP type from PROD_ID.
+ * 1710 has the PROD_ID in bits 15:00, not in 16:01 as documented in TRM.
+ * 1510 PROD_ID is empty, and 1610 PROD_ID does not make sense.
+ * Undocumented register in TEST BLOCK is used as fallback; This seems to
+ * work on 1510, 1610 & 1710. The official way hopefully will work in future
+ * processors.
+ */
+static u16 omap_get_jtag_id(void)
+{
+ u32 prod_id, omap_id;
+
+ prod_id = omap_readl(OMAP_PRODUCTION_ID_1);
+ omap_id = omap_readl(OMAP32_ID_1);
+
+ /* Check for unusable OMAP_PRODUCTION_ID_1 on 1611B/5912 and 730 */
+ if (((prod_id >> 20) == 0) || (prod_id == omap_id))
+ prod_id = 0;
+ else
+ prod_id &= 0xffff;
+
+ if (prod_id)
+ return prod_id;
+
+ /* Use OMAP32_ID_1 as fallback */
+ prod_id = ((omap_id >> 12) & 0xffff);
+
+ return prod_id;
+}
+
+/*
+ * Get OMAP revision from DIE_REV.
+ * Early 1710 processors may have broken OMAP_DIE_ID, it contains PROD_ID.
+ * Undocumented register in the TEST BLOCK is used as fallback.
+ * REVISIT: This does not seem to work on 1510
+ */
+static u8 omap_get_die_rev(void)
+{
+ u32 die_rev;
+
+ die_rev = omap_readl(OMAP_DIE_ID_1);
+
+ /* Check for broken OMAP_DIE_ID on early 1710 */
+ if (((die_rev >> 12) & 0xffff) == omap_get_jtag_id())
+ die_rev = 0;
+
+ die_rev = (die_rev >> 17) & 0xf;
+ if (die_rev)
+ return die_rev;
+
+ die_rev = (omap_readl(OMAP32_ID_1) >> 28) & 0xf;
+
+ return die_rev;
+}
+
+static unsigned long dpll1(void)
+{
+ unsigned short pll_ctl_val = omap_readw(DPLL_CTL_REG);
+ unsigned long rate;
+
+ rate = CONFIG_SYS_CLK_FREQ; /* Base xtal rate */
+ if (pll_ctl_val & 0x10) {
+ /* PLL enabled, apply multiplier and divisor */
+ if (pll_ctl_val & 0xf80)
+ rate *= (pll_ctl_val & 0xf80) >> 7;
+ rate /= ((pll_ctl_val & 0x60) >> 5) + 1;
+ } else {
+ /* PLL disabled, apply bypass divisor */
+ switch (pll_ctl_val & 0xc) {
+ case 0:
+ break;
+ case 0x4:
+ rate /= 2;
+ break;
+ default:
+ rate /= 4;
+ break;
+ }
+ }
+
+ return rate;
+}
+
+static unsigned long armcore(void)
+{
+ unsigned short arm_ckctl = omap_readw(ARM_CKCTL);
+
+ return (dpll1() >> ((arm_ckctl & 0x0030) >> 4));
+}
+
+int print_cpuinfo (void)
+{
+ int i;
+ u16 jtag_id;
+ u8 die_rev;
+ u32 omap_id;
+ u8 cpu_type;
+ u32 system_serial_high;
+ u32 system_serial_low;
+ u32 system_rev = 0;
+
+ jtag_id = omap_get_jtag_id();
+ die_rev = omap_get_die_rev();
+ omap_id = omap_readl(OMAP32_ID_0);
+
+#ifdef DEBUG
+ printf("OMAP_DIE_ID_0: 0x%08x\n", omap_readl(OMAP_DIE_ID_0));
+ printf("OMAP_DIE_ID_1: 0x%08x DIE_REV: %i\n",
+ omap_readl(OMAP_DIE_ID_1),
+ (omap_readl(OMAP_DIE_ID_1) >> 17) & 0xf);
+ printf("OMAP_PRODUCTION_ID_0: 0x%08x\n", omap_readl(OMAP_PRODUCTION_ID_0));
+ printf("OMAP_PRODUCTION_ID_1: 0x%08x JTAG_ID: 0x%04x\n",
+ omap_readl(OMAP_PRODUCTION_ID_1),
+ omap_readl(OMAP_PRODUCTION_ID_1) & 0xffff);
+ printf("OMAP32_ID_0: 0x%08x\n", omap_readl(OMAP32_ID_0));
+ printf("OMAP32_ID_1: 0x%08x\n", omap_readl(OMAP32_ID_1));
+ printf("JTAG_ID: 0x%04x DIE_REV: %i\n", jtag_id, die_rev);
+#endif
+
+ system_serial_high = omap_readl(OMAP_DIE_ID_0);
+ system_serial_low = omap_readl(OMAP_DIE_ID_1);
+
+ /* First check only the major version in a safe way */
+ for (i = 0; i < ARRAY_SIZE(omap_ids); i++) {
+ if (jtag_id == (omap_ids[i].jtag_id)) {
+ system_rev = omap_ids[i].type;
+ break;
+ }
+ }
+
+ /* Check if we can find the die revision */
+ for (i = 0; i < ARRAY_SIZE(omap_ids); i++) {
+ if (jtag_id == omap_ids[i].jtag_id && die_rev == omap_ids[i].die_rev) {
+ system_rev = omap_ids[i].type;
+ break;
+ }
+ }
+
+ /* Finally check also the omap_id */
+ for (i = 0; i < ARRAY_SIZE(omap_ids); i++) {
+ if (jtag_id == omap_ids[i].jtag_id
+ && die_rev == omap_ids[i].die_rev
+ && omap_id == omap_ids[i].omap_id) {
+ system_rev = omap_ids[i].type;
+ break;
+ }
+ }
+
+ /* Add the cpu class info (7xx, 15xx, 16xx, 24xx) */
+ cpu_type = system_rev >> 24;
+
+ switch (cpu_type) {
+ case 0x07:
+ system_rev |= 0x07;
+ break;
+ case 0x03:
+ case 0x15:
+ system_rev |= 0x15;
+ break;
+ case 0x16:
+ case 0x17:
+ system_rev |= 0x16;
+ break;
+ case 0x24:
+ system_rev |= 0x24;
+ break;
+ default:
+ printf("Unknown OMAP cpu type: 0x%02x\n", cpu_type);
+ }
+
+ printf("CPU: OMAP%04x", system_rev >> 16);
+ if ((system_rev >> 8) & 0xff)
+ printf("%x", (system_rev >> 8) & 0xff);
+#ifdef DEBUG
+ printf(" revision %i handled as %02xxx id: %08x%08x",
+ die_rev, system_rev & 0xff, system_serial_low, system_serial_high);
+#endif
+ printf(" at %ld.%01ld MHz (DPLL1=%ld.%01ld MHz)\n",
+ armcore() / 1000000, (armcore() / 100000) % 10,
+ dpll1() / 1000000, (dpll1() / 100000) % 10);
+
+ return 0;
+}
+
+#endif /* #if defined(CONFIG_DISPLAY_CPUINFO) && defined(CONFIG_OMAP) */
diff --git a/cpu/arm926ejs/interrupts.c b/cpu/arm926ejs/interrupts.c
index 0457bff964..9cac969f64 100644
--- a/cpu/arm926ejs/interrupts.c
+++ b/cpu/arm926ejs/interrupts.c
@@ -39,16 +39,6 @@
#include <arm926ejs.h>
#include <asm/proc-armv/ptrace.h>
-#define TIMER_LOAD_VAL 0xffffffff
-
-/* macro to read the 32 bit timer */
-#ifdef CONFIG_OMAP
-#define READ_TIMER (*(volatile ulong *)(CFG_TIMERBASE+8))
-#endif
-#ifdef CONFIG_VERSATILE
-#define READ_TIMER (*(volatile ulong *)(CFG_TIMERBASE+4))
-#endif
-
#ifdef CONFIG_USE_IRQ
/* enable IRQ interrupts */
void enable_interrupts (void)
@@ -188,146 +178,14 @@ void do_irq (struct pt_regs *pt_regs)
#else
-static ulong timestamp;
-static ulong lastdec;
-
/* nothing really to do with interrupts, just starts up a counter. */
int interrupt_init (void)
{
-#ifdef CONFIG_OMAP
- int32_t val;
-
- /* Start the decrementer ticking down from 0xffffffff */
- *((int32_t *) (CFG_TIMERBASE + LOAD_TIM)) = TIMER_LOAD_VAL;
- val = MPUTIM_ST | MPUTIM_AR | MPUTIM_CLOCK_ENABLE | (CFG_PVT << MPUTIM_PTV_BIT);
- *((int32_t *) (CFG_TIMERBASE + CNTL_TIMER)) = val;
-#endif /* CONFIG_OMAP */
-
-#ifdef CONFIG_VERSATILE
- *(volatile ulong *)(CFG_TIMERBASE + 0) = CFG_TIMER_RELOAD; /* TimerLoad */
- *(volatile ulong *)(CFG_TIMERBASE + 4) = CFG_TIMER_RELOAD; /* TimerValue */
- *(volatile ulong *)(CFG_TIMERBASE + 8) = 0x8C;
-#endif /* CONFIG_VERSATILE */
-
- /* init the timestamp and lastdec value */
- reset_timer_masked();
-
- return (0);
-}
-
-/*
- * timer without interrupts
- */
-
-void reset_timer (void)
-{
- reset_timer_masked ();
-}
+ extern void timer_init(void);
-ulong get_timer (ulong base)
-{
- return get_timer_masked () - base;
-}
+ timer_init();
-void set_timer (ulong t)
-{
- timestamp = t;
-}
-
-/* delay x useconds AND perserve advance timstamp value */
-void udelay (unsigned long usec)
-{
- ulong tmo, tmp;
-
- if(usec >= 1000){ /* if "big" number, spread normalization to seconds */
- tmo = usec / 1000; /* start to normalize for usec to ticks per sec */
- tmo *= CFG_HZ; /* find number of "ticks" to wait to achieve target */
- tmo /= 1000; /* finish normalize. */
- }else{ /* else small number, don't kill it prior to HZ multiply */
- tmo = usec * CFG_HZ;
- tmo /= (1000*1000);
- }
-
- tmp = get_timer (0); /* get current timestamp */
- if( (tmo + tmp + 1) < tmp ) /* if setting this fordward will roll time stamp */
- reset_timer_masked (); /* reset "advancing" timestamp to 0, set lastdec value */
- else
- tmo += tmp; /* else, set advancing stamp wake up time */
-
- while (get_timer_masked () < tmo)/* loop till event */
- /*NOP*/;
-}
-
-void reset_timer_masked (void)
-{
- /* reset time */
- lastdec = READ_TIMER; /* capure current decrementer value time */
- timestamp = 0; /* start "advancing" time stamp from 0 */
-}
-
-ulong get_timer_masked (void)
-{
- ulong now = READ_TIMER; /* current tick value */
-
- if (lastdec >= now) { /* normal mode (non roll) */
- /* normal mode */
- timestamp += lastdec - now; /* move stamp fordward with absoulte diff ticks */
- } else { /* we have overflow of the count down timer */
- /* nts = ts + ld + (TLV - now)
- * ts=old stamp, ld=time that passed before passing through -1
- * (TLV-now) amount of time after passing though -1
- * nts = new "advancing time stamp"...it could also roll and cause problems.
- */
- timestamp += lastdec + TIMER_LOAD_VAL - now;
- }
- lastdec = now;
-
- return timestamp;
-}
-
-/* waits specified delay value and resets timestamp */
-void udelay_masked (unsigned long usec)
-{
- ulong tmo;
- ulong endtime;
- signed long diff;
-
- if (usec >= 1000) { /* if "big" number, spread normalization to seconds */
- tmo = usec / 1000; /* start to normalize for usec to ticks per sec */
- tmo *= CFG_HZ; /* find number of "ticks" to wait to achieve target */
- tmo /= 1000; /* finish normalize. */
- } else { /* else small number, don't kill it prior to HZ multiply */
- tmo = usec * CFG_HZ;
- tmo /= (1000*1000);
- }
-
- endtime = get_timer_masked () + tmo;
-
- do {
- ulong now = get_timer_masked ();
- diff = endtime - now;
- } while (diff >= 0);
-}
-
-/*
- * This function is derived from PowerPC code (read timebase as long long).
- * On ARM it just returns the timer value.
- */
-unsigned long long get_ticks(void)
-{
- return get_timer(0);
-}
-
-/*
- * This function is derived from PowerPC code (timebase clock frequency).
- * On ARM it returns the number of timer ticks per second.
- */
-ulong get_tbclk (void)
-{
- ulong tbclk;
-
- tbclk = CFG_HZ;
- return tbclk;
+ return 0;
}
#endif /* CONFIG_INTEGRATOR */
diff --git a/cpu/arm926ejs/omap/Makefile b/cpu/arm926ejs/omap/Makefile
new file mode 100644
index 0000000000..f9d3378197
--- /dev/null
+++ b/cpu/arm926ejs/omap/Makefile
@@ -0,0 +1,43 @@
+#
+# (C) Copyright 2000-2005
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = lib$(SOC).a
+
+OBJS = timer.o
+SOBJS = reset.o
+
+all: .depend $(LIB)
+
+$(LIB): $(OBJS) $(SOBJS)
+ $(AR) crv $@ $(OBJS) $(SOBJS)
+
+#########################################################################
+
+.depend: Makefile $(OBJS:.o=.c)
+ $(CC) -M $(CFLAGS) $(OBJS:.o=.c) > $@
+
+sinclude .depend
+
+#########################################################################
diff --git a/cpu/arm926ejs/omap/reset.S b/cpu/arm926ejs/omap/reset.S
new file mode 100644
index 0000000000..e8989028e2
--- /dev/null
+++ b/cpu/arm926ejs/omap/reset.S
@@ -0,0 +1,45 @@
+/*
+ * armboot - Startup Code for ARM926EJS CPU-core
+ *
+ * Copyright (c) 2003 Texas Instruments
+ *
+ * ----- Adapted for OMAP1610 OMAP730 from ARM925t code ------
+ *
+ * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
+ * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
+ * Copyright (c) 2002 Gary Jennejohn <gj@denx.de>
+ * Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
+ * Copyright (c) 2003 Kshitij <kshitij@ti.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+ .align 5
+.globl reset_cpu
+reset_cpu:
+ ldr r1, rstctl1 /* get clkm1 reset ctl */
+ mov r3, #0x0
+ strh r3, [r1] /* clear it */
+ mov r3, #0x8
+ strh r3, [r1] /* force dsp+arm reset */
+_loop_forever:
+ b _loop_forever
+
+rstctl1:
+ .word 0xfffece10
diff --git a/cpu/arm926ejs/omap/timer.c b/cpu/arm926ejs/omap/timer.c
new file mode 100644
index 0000000000..a2a9133ee0
--- /dev/null
+++ b/cpu/arm926ejs/omap/timer.c
@@ -0,0 +1,177 @@
+/*
+ * (C) Copyright 2003
+ * Texas Instruments <www.ti.com>
+ *
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Marius Groeger <mgroeger@sysgo.de>
+ *
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Alex Zuepke <azu@sysgo.de>
+ *
+ * (C) Copyright 2002-2004
+ * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
+ *
+ * (C) Copyright 2004
+ * Philippe Robin, ARM Ltd. <philippe.robin@arm.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <arm926ejs.h>
+
+#define TIMER_LOAD_VAL 0xffffffff
+
+/* macro to read the 32 bit timer */
+#define READ_TIMER (*(volatile ulong *)(CFG_TIMERBASE+8))
+
+static ulong timestamp;
+static ulong lastdec;
+
+int timer_init (void)
+{
+ int32_t val;
+
+ /* Start the decrementer ticking down from 0xffffffff */
+ *((int32_t *) (CFG_TIMERBASE + LOAD_TIM)) = TIMER_LOAD_VAL;
+ val = MPUTIM_ST | MPUTIM_AR | MPUTIM_CLOCK_ENABLE | (CFG_PVT << MPUTIM_PTV_BIT);
+ *((int32_t *) (CFG_TIMERBASE + CNTL_TIMER)) = val;
+
+ /* init the timestamp and lastdec value */
+ reset_timer_masked();
+
+ return 0;
+}
+
+/*
+ * timer without interrupts
+ */
+
+void reset_timer (void)
+{
+ reset_timer_masked ();
+}
+
+ulong get_timer (ulong base)
+{
+ return get_timer_masked () - base;
+}
+
+void set_timer (ulong t)
+{
+ timestamp = t;
+}
+
+/* delay x useconds AND perserve advance timstamp value */
+void udelay (unsigned long usec)
+{
+ ulong tmo, tmp;
+
+ if(usec >= 1000){ /* if "big" number, spread normalization to seconds */
+ tmo = usec / 1000; /* start to normalize for usec to ticks per sec */
+ tmo *= CFG_HZ; /* find number of "ticks" to wait to achieve target */
+ tmo /= 1000; /* finish normalize. */
+ }else{ /* else small number, don't kill it prior to HZ multiply */
+ tmo = usec * CFG_HZ;
+ tmo /= (1000*1000);
+ }
+
+ tmp = get_timer (0); /* get current timestamp */
+ if( (tmo + tmp + 1) < tmp ) /* if setting this fordward will roll time stamp */
+ reset_timer_masked (); /* reset "advancing" timestamp to 0, set lastdec value */
+ else
+ tmo += tmp; /* else, set advancing stamp wake up time */
+
+ while (get_timer_masked () < tmo)/* loop till event */
+ /*NOP*/;
+}
+
+void reset_timer_masked (void)
+{
+ /* reset time */
+ lastdec = READ_TIMER; /* capure current decrementer value time */
+ timestamp = 0; /* start "advancing" time stamp from 0 */
+}
+
+ulong get_timer_masked (void)
+{
+ ulong now = READ_TIMER; /* current tick value */
+
+ if (lastdec >= now) { /* normal mode (non roll) */
+ /* normal mode */
+ timestamp += lastdec - now; /* move stamp fordward with absoulte diff ticks */
+ } else { /* we have overflow of the count down timer */
+ /* nts = ts + ld + (TLV - now)
+ * ts=old stamp, ld=time that passed before passing through -1
+ * (TLV-now) amount of time after passing though -1
+ * nts = new "advancing time stamp"...it could also roll and cause problems.
+ */
+ timestamp += lastdec + TIMER_LOAD_VAL - now;
+ }
+ lastdec = now;
+
+ return timestamp;
+}
+
+/* waits specified delay value and resets timestamp */
+void udelay_masked (unsigned long usec)
+{
+ ulong tmo;
+ ulong endtime;
+ signed long diff;
+
+ if (usec >= 1000) { /* if "big" number, spread normalization to seconds */
+ tmo = usec / 1000; /* start to normalize for usec to ticks per sec */
+ tmo *= CFG_HZ; /* find number of "ticks" to wait to achieve target */
+ tmo /= 1000; /* finish normalize. */
+ } else { /* else small number, don't kill it prior to HZ multiply */
+ tmo = usec * CFG_HZ;
+ tmo /= (1000*1000);
+ }
+
+ endtime = get_timer_masked () + tmo;
+
+ do {
+ ulong now = get_timer_masked ();
+ diff = endtime - now;
+ } while (diff >= 0);
+}
+
+/*
+ * This function is derived from PowerPC code (read timebase as long long).
+ * On ARM it just returns the timer value.
+ */
+unsigned long long get_ticks(void)
+{
+ return get_timer(0);
+}
+
+/*
+ * This function is derived from PowerPC code (timebase clock frequency).
+ * On ARM it returns the number of timer ticks per second.
+ */
+ulong get_tbclk (void)
+{
+ ulong tbclk;
+
+ tbclk = CFG_HZ;
+ return tbclk;
+}
diff --git a/cpu/arm926ejs/start.S b/cpu/arm926ejs/start.S
index fc6b20b21e..725c6639a1 100644
--- a/cpu/arm926ejs/start.S
+++ b/cpu/arm926ejs/start.S
@@ -392,25 +392,3 @@ fiq:
bl do_fiq
#endif
-
-# ifdef CONFIG_INTEGRATOR
-
- /* Satisfied by Integrator routine (AP or CP) */
-
-#else
-
- .align 5
-.globl reset_cpu
-reset_cpu:
- ldr r1, rstctl1 /* get clkm1 reset ctl */
- mov r3, #0x0
- strh r3, [r1] /* clear it */
- mov r3, #0x8
- strh r3, [r1] /* force dsp+arm reset */
-_loop_forever:
- b _loop_forever
-
-rstctl1:
- .word 0xfffece10
-
-#endif /* #ifdef CONFIG_INTEGRATOR */
diff --git a/cpu/arm926ejs/versatile/Makefile b/cpu/arm926ejs/versatile/Makefile
new file mode 100644
index 0000000000..f9d3378197
--- /dev/null
+++ b/cpu/arm926ejs/versatile/Makefile
@@ -0,0 +1,43 @@
+#
+# (C) Copyright 2000-2005
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = lib$(SOC).a
+
+OBJS = timer.o
+SOBJS = reset.o
+
+all: .depend $(LIB)
+
+$(LIB): $(OBJS) $(SOBJS)
+ $(AR) crv $@ $(OBJS) $(SOBJS)
+
+#########################################################################
+
+.depend: Makefile $(OBJS:.o=.c)
+ $(CC) -M $(CFLAGS) $(OBJS:.o=.c) > $@
+
+sinclude .depend
+
+#########################################################################
diff --git a/cpu/arm926ejs/versatile/reset.S b/cpu/arm926ejs/versatile/reset.S
new file mode 100644
index 0000000000..e8989028e2
--- /dev/null
+++ b/cpu/arm926ejs/versatile/reset.S
@@ -0,0 +1,45 @@
+/*
+ * armboot - Startup Code for ARM926EJS CPU-core
+ *
+ * Copyright (c) 2003 Texas Instruments
+ *
+ * ----- Adapted for OMAP1610 OMAP730 from ARM925t code ------
+ *
+ * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
+ * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
+ * Copyright (c) 2002 Gary Jennejohn <gj@denx.de>
+ * Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
+ * Copyright (c) 2003 Kshitij <kshitij@ti.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+ .align 5
+.globl reset_cpu
+reset_cpu:
+ ldr r1, rstctl1 /* get clkm1 reset ctl */
+ mov r3, #0x0
+ strh r3, [r1] /* clear it */
+ mov r3, #0x8
+ strh r3, [r1] /* force dsp+arm reset */
+_loop_forever:
+ b _loop_forever
+
+rstctl1:
+ .word 0xfffece10
diff --git a/cpu/arm926ejs/versatile/timer.c b/cpu/arm926ejs/versatile/timer.c
new file mode 100644
index 0000000000..32872d2b66
--- /dev/null
+++ b/cpu/arm926ejs/versatile/timer.c
@@ -0,0 +1,175 @@
+/*
+ * (C) Copyright 2003
+ * Texas Instruments <www.ti.com>
+ *
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Marius Groeger <mgroeger@sysgo.de>
+ *
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Alex Zuepke <azu@sysgo.de>
+ *
+ * (C) Copyright 2002-2004
+ * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
+ *
+ * (C) Copyright 2004
+ * Philippe Robin, ARM Ltd. <philippe.robin@arm.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <arm926ejs.h>
+
+#define TIMER_LOAD_VAL 0xffffffff
+
+/* macro to read the 32 bit timer */
+#define READ_TIMER (*(volatile ulong *)(CFG_TIMERBASE+4))
+
+static ulong timestamp;
+static ulong lastdec;
+
+/* nothing really to do with interrupts, just starts up a counter. */
+int timer_init (void)
+{
+ *(volatile ulong *)(CFG_TIMERBASE + 0) = CFG_TIMER_RELOAD; /* TimerLoad */
+ *(volatile ulong *)(CFG_TIMERBASE + 4) = CFG_TIMER_RELOAD; /* TimerValue */
+ *(volatile ulong *)(CFG_TIMERBASE + 8) = 0x8C;
+
+ /* init the timestamp and lastdec value */
+ reset_timer_masked();
+
+ return 0;
+}
+
+/*
+ * timer without interrupts
+ */
+
+void reset_timer (void)
+{
+ reset_timer_masked ();
+}
+
+ulong get_timer (ulong base)
+{
+ return get_timer_masked () - base;
+}
+
+void set_timer (ulong t)
+{
+ timestamp = t;
+}
+
+/* delay x useconds AND perserve advance timstamp value */
+void udelay (unsigned long usec)
+{
+ ulong tmo, tmp;
+
+ if(usec >= 1000){ /* if "big" number, spread normalization to seconds */
+ tmo = usec / 1000; /* start to normalize for usec to ticks per sec */
+ tmo *= CFG_HZ; /* find number of "ticks" to wait to achieve target */
+ tmo /= 1000; /* finish normalize. */
+ }else{ /* else small number, don't kill it prior to HZ multiply */
+ tmo = usec * CFG_HZ;
+ tmo /= (1000*1000);
+ }
+
+ tmp = get_timer (0); /* get current timestamp */
+ if( (tmo + tmp + 1) < tmp ) /* if setting this fordward will roll time stamp */
+ reset_timer_masked (); /* reset "advancing" timestamp to 0, set lastdec value */
+ else
+ tmo += tmp; /* else, set advancing stamp wake up time */
+
+ while (get_timer_masked () < tmo)/* loop till event */
+ /*NOP*/;
+}
+
+void reset_timer_masked (void)
+{
+ /* reset time */
+ lastdec = READ_TIMER; /* capure current decrementer value time */
+ timestamp = 0; /* start "advancing" time stamp from 0 */
+}
+
+ulong get_timer_masked (void)
+{
+ ulong now = READ_TIMER; /* current tick value */
+
+ if (lastdec >= now) { /* normal mode (non roll) */
+ /* normal mode */
+ timestamp += lastdec - now; /* move stamp fordward with absoulte diff ticks */
+ } else { /* we have overflow of the count down timer */
+ /* nts = ts + ld + (TLV - now)
+ * ts=old stamp, ld=time that passed before passing through -1
+ * (TLV-now) amount of time after passing though -1
+ * nts = new "advancing time stamp"...it could also roll and cause problems.
+ */
+ timestamp += lastdec + TIMER_LOAD_VAL - now;
+ }
+ lastdec = now;
+
+ return timestamp;
+}
+
+/* waits specified delay value and resets timestamp */
+void udelay_masked (unsigned long usec)
+{
+ ulong tmo;
+ ulong endtime;
+ signed long diff;
+
+ if (usec >= 1000) { /* if "big" number, spread normalization to seconds */
+ tmo = usec / 1000; /* start to normalize for usec to ticks per sec */
+ tmo *= CFG_HZ; /* find number of "ticks" to wait to achieve target */
+ tmo /= 1000; /* finish normalize. */
+ } else { /* else small number, don't kill it prior to HZ multiply */
+ tmo = usec * CFG_HZ;
+ tmo /= (1000*1000);
+ }
+
+ endtime = get_timer_masked () + tmo;
+
+ do {
+ ulong now = get_timer_masked ();
+ diff = endtime - now;
+ } while (diff >= 0);
+}
+
+/*
+ * This function is derived from PowerPC code (read timebase as long long).
+ * On ARM it just returns the timer value.
+ */
+unsigned long long get_ticks(void)
+{
+ return get_timer(0);
+}
+
+/*
+ * This function is derived from PowerPC code (timebase clock frequency).
+ * On ARM it returns the number of timer ticks per second.
+ */
+ulong get_tbclk (void)
+{
+ ulong tbclk;
+
+ tbclk = CFG_HZ;
+ return tbclk;
+}
diff --git a/cpu/arm946es/cpu.c b/cpu/arm946es/cpu.c
index ba0a4e496e..4c63a8dd87 100644
--- a/cpu/arm946es/cpu.c
+++ b/cpu/arm946es/cpu.c
@@ -33,6 +33,10 @@
#include <command.h>
#include <arm946es.h>
+#ifdef CONFIG_USE_IRQ
+DECLARE_GLOBAL_DATA_PTR;
+#endif
+
/* read co-processor 15, register #1 (control register) */
static unsigned long read_p15_c1 (void)
{
@@ -91,8 +95,6 @@ int cpu_init (void)
* setup up stacks if necessary
*/
#ifdef CONFIG_USE_IRQ
- DECLARE_GLOBAL_DATA_PTR;
-
IRQ_STACK_START = _armboot_start - CFG_MALLOC_LEN - CFG_GBL_DATA_SIZE - 4;
FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ;
#endif
diff --git a/cpu/arm_intcm/cpu.c b/cpu/arm_intcm/cpu.c
index d03b09dad8..e2309f8898 100644
--- a/cpu/arm_intcm/cpu.c
+++ b/cpu/arm_intcm/cpu.c
@@ -33,14 +33,16 @@
#include <common.h>
#include <command.h>
+#ifdef CONFIG_USE_IRQ
+DECLARE_GLOBAL_DATA_PTR;
+#endif
+
int cpu_init (void)
{
/*
* setup up stacks if necessary
*/
#ifdef CONFIG_USE_IRQ
- DECLARE_GLOBAL_DATA_PTR;
-
IRQ_STACK_START = _armboot_start - CFG_MALLOC_LEN - CFG_GBL_DATA_SIZE - 4;
FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ;
#endif
diff --git a/cpu/bf533/Makefile b/cpu/bf533/Makefile
new file mode 100644
index 0000000000..c63a8f6d01
--- /dev/null
+++ b/cpu/bf533/Makefile
@@ -0,0 +1,46 @@
+# U-boot - Makefile
+#
+# Copyright (c) 2005 blackfin.uclinux.org
+#
+# (C) Copyright 2000-2004
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = lib$(CPU).a
+
+START = start.o start1.o interrupt.o cache.o cplbhdlr.o cplbmgr.o flush.o
+OBJS = cpu.o traps.o ints.o serial.o interrupts.o
+
+all: .depend $(START) $(LIB)
+
+$(LIB): $(OBJS)
+ $(AR) crv $@ $(OBJS)
+
+#########################################################################
+
+.depend: Makefile $(START:.o=.S) $(OBJS:.o=.c)
+ $(CC) -M $(CFLAGS) $(START:.o=.S) $(OBJS:.o=.c) > $@
+
+sinclude .depend
+
+#########################################################################
diff --git a/cpu/bf533/bf533_serial.h b/cpu/bf533/bf533_serial.h
new file mode 100644
index 0000000000..d430e6cabd
--- /dev/null
+++ b/cpu/bf533/bf533_serial.h
@@ -0,0 +1,78 @@
+/*
+ * U-boot - bf533_serial.h Serial Driver defines
+ *
+ * Copyright (c) 2005 blackfin.uclinux.org
+ *
+ * This file is based on
+ * bf533_serial.h: Definitions for the BlackFin BF533 DSP serial driver.
+ * Copyright (C) 2003 Bas Vermeulen <bas@buyways.nl>
+ * BuyWays B.V. (www.buyways.nl)
+ *
+ * Based heavily on:
+ * blkfinserial.h: Definitions for the BlackFin DSP serial driver.
+ *
+ * Copyright (C) 2001 Tony Z. Kou tonyko@arcturusnetworks.com
+ * Copyright (C) 2001 Arcturus Networks Inc. <www.arcturusnetworks.com>
+ *
+ * Based on code from 68328serial.c which was:
+ * Copyright (C) 1995 David S. Miller <davem@caip.rutgers.edu>
+ * Copyright (C) 1998 Kenneth Albanowski <kjahds@kjahds.com>
+ * Copyright (C) 1998, 1999 D. Jeff Dionne <jeff@uclinux.org>
+ * Copyright (C) 1999 Vladimir Gurevich <vgurevic@cisco.com>
+ *
+ * (C) Copyright 2000-2004
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _Bf533_SERIAL_H
+#define _Bf533_SERIAL_H
+
+#include <linux/config.h>
+#include <asm/blackfin.h>
+
+#define SYNC_ALL __asm__ __volatile__ ("ssync;\n")
+#define ACCESS_LATCH *pUART_LCR |= UART_LCR_DLAB;
+#define ACCESS_PORT_IER *pUART_LCR &= (~UART_LCR_DLAB);
+
+void serial_setbrg(void);
+static void local_put_char(char ch);
+void calc_baud(void);
+void serial_setbrg(void);
+int serial_init(void);
+void serial_putc(const char c);
+int serial_tstc(void);
+int serial_getc(void);
+void serial_puts(const char *s);
+static void local_put_char(char ch);
+
+extern int get_clock(void);
+int baud_table[5] = {9600, 19200, 38400, 57600, 115200};
+
+struct {
+ unsigned char dl_high;
+ unsigned char dl_low;
+} hw_baud_table[5];
+
+#ifdef CONFIG_STAMP
+extern unsigned long pll_div_fact;
+#endif
+
+#endif
diff --git a/cpu/bf533/cache.S b/cpu/bf533/cache.S
new file mode 100644
index 0000000000..8fac402740
--- /dev/null
+++ b/cpu/bf533/cache.S
@@ -0,0 +1,125 @@
+
+
+#define ASSEMBLY
+#include <asm/linkage.h>
+#include <asm/cpu/def_LPBlackfin.h>
+
+.text
+.align 2
+ENTRY(blackfin_icache_flush_range)
+ R2 = -32;
+ R2 = R0 & R2;
+ P0 = R2;
+ P1 = R1;
+ CSYNC;
+1:
+ IFLUSH[P0++];
+ CC = P0 < P1(iu);
+ IF CC JUMP 1b(bp);
+ IFLUSH[P0];
+ SSYNC;
+ RTS;
+
+ENTRY(blackfin_dcache_flush_range)
+ R2 = -32;
+ R2 = R0 & R2;
+ P0 = R2;
+ P1 = R1;
+ CSYNC;
+1:
+ FLUSH[P0++];
+ CC = P0 < P1(iu);
+ IF CC JUMP 1b(bp);
+ FLUSH[P0];
+ SSYNC;
+ RTS;
+
+ENTRY(_icache_invalidate)
+ENTRY(invalidate_entire_icache)
+ [--SP] = ( R7:5);
+
+ P0.L = (IMEM_CONTROL & 0xFFFF);
+ P0.H = (IMEM_CONTROL >> 16);
+ R7 = [P0];
+
+ /* Clear the IMC bit , All valid bits in the instruction
+ * cache are set to the invalid state
+ */
+ BITCLR(R7,IMC_P);
+ CLI R6;
+ SSYNC; /* SSYNC required before invalidating cache. */
+ .align 8;
+ [P0] = R7;
+ SSYNC;
+ STI R6;
+
+ /* Configures the instruction cache agian */
+ R6 = (IMC | ENICPLB);
+ R7 = R7 | R6;
+
+ CLI R6;
+ SSYNC; /* SSYNC required before writing to IMEM_CONTROL. */
+ .align 8;
+ [P0] = R7;
+ SSYNC;
+ STI R6;
+
+ ( R7:5) = [SP++];
+ RTS;
+
+/* Invalidate the Entire Data cache by
+ * clearing DMC[1:0] bits
+ */
+ENTRY(invalidate_entire_dcache)
+ENTRY(_dcache_invalidate)
+ [--SP] = ( R7:6);
+
+ P0.L = (DMEM_CONTROL & 0xFFFF);
+ P0.H = (DMEM_CONTROL >> 16);
+ R7 = [P0];
+
+ /* Clear the DMC[1:0] bits, All valid bits in the data
+ * cache are set to the invalid state
+ */
+ BITCLR(R7,DMC0_P);
+ BITCLR(R7,DMC1_P);
+ CLI R6;
+ SSYNC; /* SSYNC required before writing to DMEM_CONTROL. */
+ .align 8;
+ [P0] = R7;
+ SSYNC;
+ STI R6;
+
+ /* Configures the data cache again */
+
+ R6 = (ACACHE_BCACHE | ENDCPLB | PORT_PREF0);
+ R7 = R7 | R6;
+
+ CLI R6;
+ SSYNC; /* SSYNC required before writing to DMEM_CONTROL. */
+ .align 8;
+ [P0] = R7;
+ SSYNC;
+ STI R6;
+
+ ( R7:6) = [SP++];
+ RTS;
+
+ENTRY(blackfin_dcache_invalidate_range)
+ R2 = -32;
+ R2 = R0 & R2;
+ P0 = R2;
+ P1 = R1;
+ CSYNC;
+1:
+ FLUSHINV[P0++];
+ CC = P0 < P1 (iu);
+ IF CC JUMP 1b (bp);
+
+ /* If the data crosses a cache line, then we'll be pointing to
+ ** the last cache line, but won't have flushed/invalidated it yet, so do
+ ** one more.
+ */
+ FLUSHINV[P0];
+ SSYNC;
+ RTS;
diff --git a/cpu/bf533/config.mk b/cpu/bf533/config.mk
new file mode 100644
index 0000000000..a9d529ecd8
--- /dev/null
+++ b/cpu/bf533/config.mk
@@ -0,0 +1,27 @@
+# U-boot - config.mk
+#
+# Copyright (c) 2005 blackfin.uclinux.org
+#
+# (C) Copyright 2000-2004
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+PLATFORM_RELFLAGS += -ffixed-P5
diff --git a/cpu/bf533/cplbhdlr.S b/cpu/bf533/cplbhdlr.S
new file mode 100644
index 0000000000..61be5bb90c
--- /dev/null
+++ b/cpu/bf533/cplbhdlr.S
@@ -0,0 +1,193 @@
+/* Copyright (C) 2003 Analog Devices, Inc. All Rights Reserved.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.
+ *
+ * Blackfin BF533/2.6 support : LG Soft India
+ */
+
+
+/* Include an exception handler to invoke the CPLB manager
+ */
+
+#include <asm-blackfin/linkage.h>
+#include <asm/cplb.h>
+#include <asm/entry.h>
+
+
+.text
+
+.globl _cplb_hdr;
+.type _cplb_hdr, STT_FUNC;
+.extern _cplb_mgr;
+.type _cplb_mgr, STT_FUNC;
+.extern __unknown_exception_occurred;
+.type __unknown_exception_occurred, STT_FUNC;
+.extern __cplb_miss_all_locked;
+.type __cplb_miss_all_locked, STT_FUNC;
+.extern __cplb_miss_without_replacement;
+.type __cplb_miss_without_replacement, STT_FUNC;
+.extern __cplb_protection_violation;
+.type __cplb_protection_violation, STT_FUNC;
+.extern panic_pv;
+
+.align 2;
+
+ENTRY(_cplb_hdr)
+ SSYNC;
+ [--SP] = ( R7:0, P5:0 );
+ [--SP] = ASTAT;
+ [--SP] = SEQSTAT;
+ [--SP] = I0;
+ [--SP] = I1;
+ [--SP] = I2;
+ [--SP] = I3;
+ [--SP] = LT0;
+ [--SP] = LB0;
+ [--SP] = LC0;
+ [--SP] = LT1;
+ [--SP] = LB1;
+ [--SP] = LC1;
+ R2 = SEQSTAT;
+
+ /*Mask the contents of SEQSTAT and leave only EXCAUSE in R2*/
+ R2 <<= 26;
+ R2 >>= 26;
+
+ R1 = 0x23; /* Data access CPLB protection violation */
+ CC = R2 == R1;
+ IF !CC JUMP not_data_write;
+ R0 = 2; /* is a write to data space*/
+ JUMP is_icplb_miss;
+
+not_data_write:
+ R1 = 0x2C; /* CPLB miss on an instruction fetch */
+ CC = R2 == R1;
+ R0 = 0; /* is_data_miss == False*/
+ IF CC JUMP is_icplb_miss;
+
+ R1 = 0x26;
+ CC = R2 == R1;
+ IF !CC JUMP unknown;
+
+ R0 = 1; /* is_data_miss == True*/
+
+is_icplb_miss:
+
+#if ( defined (CONFIG_BLKFIN_CACHE) || defined (CONFIG_BLKFIN_DCACHE))
+#if ( defined (CONFIG_BLKFIN_CACHE) && !defined (CONFIG_BLKFIN_DCACHE))
+ R1 = CPLB_ENABLE_ICACHE;
+#endif
+#if ( !defined (CONFIG_BLKFIN_CACHE) && defined (CONFIG_BLKFIN_DCACHE))
+ R1 = CPLB_ENABLE_DCACHE;
+#endif
+#if ( defined (CONFIG_BLKFIN_CACHE) && defined (CONFIG_BLKFIN_DCACHE))
+ R1 = CPLB_ENABLE_DCACHE | CPLB_ENABLE_ICACHE;
+#endif
+#else
+ R1 = 0;
+#endif
+
+ [--SP] = RETS;
+ CALL _cplb_mgr;
+ RETS = [SP++];
+ CC = R0 == 0;
+ IF !CC JUMP not_replaced;
+ LC1 = [SP++];
+ LB1 = [SP++];
+ LT1 = [SP++];
+ LC0 = [SP++];
+ LB0 = [SP++];
+ LT0 = [SP++];
+ I3 = [SP++];
+ I2 = [SP++];
+ I1 = [SP++];
+ I0 = [SP++];
+ SEQSTAT = [SP++];
+ ASTAT = [SP++];
+ ( R7:0, P5:0 ) = [SP++];
+ RTS;
+
+unknown:
+ [--SP] = RETS;
+ CALL __unknown_exception_occurred;
+ RETS = [SP++];
+ JUMP unknown;
+not_replaced:
+ CC = R0 == CPLB_NO_UNLOCKED;
+ IF !CC JUMP next_check;
+ [--SP] = RETS;
+ CALL __cplb_miss_all_locked;
+ RETS = [SP++];
+next_check:
+ CC = R0 == CPLB_NO_ADDR_MATCH;
+ IF !CC JUMP next_check2;
+ [--SP] = RETS;
+ CALL __cplb_miss_without_replacement;
+ RETS = [SP++];
+ JUMP not_replaced;
+next_check2:
+ CC = R0 == CPLB_PROT_VIOL;
+ IF !CC JUMP strange_return_from_cplb_mgr;
+ [--SP] = RETS;
+ CALL __cplb_protection_violation;
+ RETS = [SP++];
+ JUMP not_replaced;
+strange_return_from_cplb_mgr:
+ IDLE;
+ CSYNC;
+ JUMP strange_return_from_cplb_mgr;
+
+/************************************
+ * Diagnostic exception handlers
+ */
+
+__cplb_miss_all_locked:
+ sp += -12;
+ R0 = CPLB_NO_UNLOCKED;
+ call panic_bfin;
+ SP += 12;
+ RTS;
+
+ __cplb_miss_without_replacement:
+ sp += -12;
+ R0 = CPLB_NO_ADDR_MATCH;
+ call panic_bfin;
+ SP += 12;
+ RTS;
+
+__cplb_protection_violation:
+ sp += -12;
+ R0 = CPLB_PROT_VIOL;
+ call panic_bfin;
+ SP += 12;
+ RTS;
+
+__unknown_exception_occurred:
+
+ /* This function is invoked by the default exception
+ * handler, if it does not recognise the kind of
+ * exception that has occurred. In other words, the
+ * default handler only handles some of the system's
+ * exception types, and it does not expect any others
+ * to occur. If your application is going to be using
+ * other kinds of exceptions, you must replace the
+ * default handler with your own, that handles all the
+ * exceptions you will use.
+ *
+ * Since there's nothing we can do, we just loop here
+ * at what we hope is a suitably informative label.
+ */
+
+ IDLE;
+do_not_know_what_to_do:
+ CSYNC;
+ JUMP __unknown_exception_occurred;
+
+ RTS;
+.__unknown_exception_occurred.end:
+.global __unknown_exception_occurred;
+.type __unknown_exception_occurred, STT_FUNC;
+
+panic_bfin:
+ RTS;
diff --git a/cpu/bf533/cplbmgr.S b/cpu/bf533/cplbmgr.S
new file mode 100644
index 0000000000..7a0b048629
--- /dev/null
+++ b/cpu/bf533/cplbmgr.S
@@ -0,0 +1,601 @@
+/*This file is subject to the terms and conditions of the GNU General Public
+ * License.
+ *
+ * Blackfin BF533/2.6 support : LG Soft India
+ * Modification: Dec 07 2004
+ * 1. Correction in icheck_lock. Valid lock entries were
+ * geting victimized, for instruction cplb replacement.
+ * 2. Setup loop's are modified as now toolchain support's P Indexed
+ * addressing
+ * :LG Soft India
+ *
+ */
+
+/* Usage: int _cplb_mgr(is_data_miss,int enable_cache)
+ * is_data_miss==2 => Mark as Dirty, write to the clean data page
+ * is_data_miss==1 => Replace a data CPLB.
+ * is_data_miss==0 => Replace an instruction CPLB.
+ *
+ * Returns:
+ * CPLB_RELOADED => Successfully updated CPLB table.
+ * CPLB_NO_UNLOCKED => All CPLBs are locked, so cannot be evicted.This indicates
+ * that the CPLBs in the configuration tablei are badly
+ * configured, as this should never occur.
+ * CPLB_NO_ADDR_MATCH => The address being accessed, that triggered the exception,
+ * is not covered by any of the CPLBs in the configuration
+ * table. The application isi presumably misbehaving.
+ * CPLB_PROT_VIOL => The address being accessed, that triggered thei exception,
+ * was not a first-write to a clean Write Back Data page,
+ * and so presumably is a genuine violation of the page's
+ * protection attributes. The application is misbehaving.
+ */
+#define ASSEMBLY
+
+#include <asm-blackfin/linkage.h>
+#include <asm-blackfin/blackfin.h>
+#include <asm-blackfin/cplbtab.h>
+#include <asm-blackfin/cplb.h>
+
+.text
+
+.align 2;
+ENTRY(_cplb_mgr)
+
+ [--SP]=( R7:0,P5:0 );
+
+ CC = R0 == 2;
+ IF CC JUMP dcplb_write;
+
+ CC = R0 == 0;
+ IF !CC JUMP dcplb_miss_compare;
+
+ /* ICPLB Miss Exception. We need to choose one of the
+ * currently-installed CPLBs, and replace it with one
+ * from the configuration table.
+ */
+
+ P4.L = (ICPLB_FAULT_ADDR & 0xFFFF);
+ P4.H = (ICPLB_FAULT_ADDR >> 16);
+
+ P1 = 16;
+ P5.L = page_size_table;
+ P5.H = page_size_table;
+
+ P0.L = (ICPLB_DATA0 & 0xFFFF);
+ P0.H = (ICPLB_DATA0 >> 16);
+ R4 = [P4]; /* Get faulting address*/
+ R6 = 64; /* Advance past the fault address, which*/
+ R6 = R6 + R4; /* we'll use if we find a match*/
+ R3 = ((16 << 8) | 2); /* Extract mask, bits 16 and 17.*/
+
+ R5 = 0;
+isearch:
+
+ R1 = [P0-0x100]; /* Address for this CPLB */
+
+ R0 = [P0++]; /* Info for this CPLB*/
+ CC = BITTST(R0,0); /* Is the CPLB valid?*/
+ IF !CC JUMP nomatch; /* Skip it, if not.*/
+ CC = R4 < R1(IU); /* If fault address less than page start*/
+ IF CC JUMP nomatch; /* then skip this one.*/
+ R2 = EXTRACT(R0,R3.L) (Z); /* Get page size*/
+ P1 = R2;
+ P1 = P5 + (P1<<2); /* index into page-size table*/
+ R2 = [P1]; /* Get the page size*/
+ R1 = R1 + R2; /* and add to page start, to get page end*/
+ CC = R4 < R1(IU); /* and see whether fault addr is in page.*/
+ IF !CC R4 = R6; /* If so, advance the address and finish loop.*/
+ IF !CC JUMP isearch_done;
+nomatch:
+ /* Go around again*/
+ R5 += 1;
+ CC = BITTST(R5, 4); /* i.e CC = R5 >= 16*/
+ IF !CC JUMP isearch;
+
+isearch_done:
+ I0 = R4; /* Fault address we'll search for*/
+
+ /* set up pointers */
+ P0.L = (ICPLB_DATA0 & 0xFFFF);
+ P0.H = (ICPLB_DATA0 >> 16);
+
+ /* The replacement procedure for ICPLBs */
+
+ P4.L = (IMEM_CONTROL & 0xFFFF);
+ P4.H = (IMEM_CONTROL >> 16);
+
+ /* disable cplbs */
+ R5 = [P4]; /* Control Register*/
+ BITCLR(R5,ENICPLB_P);
+ CLI R1;
+ SSYNC; /* SSYNC required before writing to IMEM_CONTROL. */
+ .align 8;
+ [P4] = R5;
+ SSYNC;
+ STI R1;
+
+ R1 = -1; /* end point comparison */
+ R3 = 16; /* counter */
+
+ /* Search through CPLBs for first non-locked entry */
+ /* Overwrite it by moving everyone else up by 1 */
+icheck_lock:
+ R0 = [P0++];
+ R3 = R3 + R1;
+ CC = R3 == R1;
+ IF CC JUMP all_locked;
+ CC = BITTST(R0, 0); /* an invalid entry is good */
+ IF !CC JUMP ifound_victim;
+ CC = BITTST(R0,1); /* but a locked entry isn't */
+ IF CC JUMP icheck_lock;
+
+ifound_victim:
+#ifdef CONFIG_CPLB_INFO
+ R7 = [P0 - 0x104];
+ P2.L = ipdt_table;
+ P2.H = ipdt_table;
+ P3.L = ipdt_swapcount_table;
+ P3.H = ipdt_swapcount_table;
+ P3 += -4;
+icount:
+ R2 = [P2]; /* address from config table */
+ P2 += 8;
+ P3 += 8;
+ CC = R2==-1;
+ IF CC JUMP icount_done;
+ CC = R7==R2;
+ IF !CC JUMP icount;
+ R7 = [P3];
+ R7 += 1;
+ [P3] = R7;
+ CSYNC;
+icount_done:
+#endif
+ LC0=R3;
+ LSETUP(is_move,ie_move) LC0;
+is_move:
+ R0 = [P0];
+ [P0 - 4] = R0;
+ R0 = [P0 - 0x100];
+ [P0-0x104] = R0;
+ie_move:P0+=4;
+
+ /* We've made space in the ICPLB table, so that ICPLB15
+ * is now free to be overwritten. Next, we have to determine
+ * which CPLB we need to install, from the configuration
+ * table. This is a matter of getting the start-of-page
+ * addresses and page-lengths from the config table, and
+ * determining whether the fault address falls within that
+ * range.
+ */
+
+ P2.L = ipdt_table;
+ P2.H = ipdt_table;
+#ifdef CONFIG_CPLB_INFO
+ P3.L = ipdt_swapcount_table;
+ P3.H = ipdt_swapcount_table;
+ P3 += -8;
+#endif
+ P0.L = page_size_table;
+ P0.H = page_size_table;
+
+ /* Retrieve our fault address (which may have been advanced
+ * because the faulting instruction crossed a page boundary).
+ */
+
+ R0 = I0;
+
+ /* An extraction pattern, to get the page-size bits from
+ * the CPLB data entry. Bits 16-17, so two bits at posn 16.
+ */
+
+ R1 = ((16<<8)|2);
+inext: R4 = [P2++]; /* address from config table */
+ R2 = [P2++]; /* data from config table */
+#ifdef CONFIG_CPLB_INFO
+ P3 += 8;
+#endif
+
+ CC = R4 == -1; /* End of config table*/
+ IF CC JUMP no_page_in_table;
+
+ /* See if failed address > start address */
+ CC = R4 <= R0(IU);
+ IF !CC JUMP inext;
+
+ /* extract page size (17:16)*/
+ R3 = EXTRACT(R2, R1.L) (Z);
+
+ /* add page size to addr to get range */
+
+ P5 = R3;
+ P5 = P0 + (P5 << 2); /* scaled, for int access*/
+ R3 = [P5];
+ R3 = R3 + R4;
+
+ /* See if failed address < (start address + page size) */
+ CC = R0 < R3(IU);
+ IF !CC JUMP inext;
+
+ /* We've found a CPLB in the config table that covers
+ * the faulting address, so install this CPLB into the
+ * last entry of the table.
+ */
+
+ P1.L = (ICPLB_DATA15 & 0xFFFF); /*ICPLB_DATA15*/
+ P1.H = (ICPLB_DATA15 >> 16);
+ [P1] = R2;
+ [P1-0x100] = R4;
+#ifdef CONFIG_CPLB_INFO
+ R3 = [P3];
+ R3 += 1;
+ [P3] = R3;
+#endif
+
+ /* P4 points to IMEM_CONTROL, and R5 contains its old
+ * value, after we disabled ICPLBS. Re-enable them.
+ */
+
+ BITSET(R5,ENICPLB_P);
+ CLI R2;
+ SSYNC; /* SSYNC required before writing to IMEM_CONTROL. */
+ .align 8;
+ [P4] = R5;
+ SSYNC;
+ STI R2;
+
+ ( R7:0,P5:0 ) = [SP++];
+ R0 = CPLB_RELOADED;
+ RTS;
+
+/* FAILED CASES*/
+no_page_in_table:
+ ( R7:0,P5:0 ) = [SP++];
+ R0 = CPLB_NO_ADDR_MATCH;
+ RTS;
+all_locked:
+ ( R7:0,P5:0 ) = [SP++];
+ R0 = CPLB_NO_UNLOCKED;
+ RTS;
+prot_violation:
+ ( R7:0,P5:0 ) = [SP++];
+ R0 = CPLB_PROT_VIOL;
+ RTS;
+
+dcplb_write:
+
+ /* if a DCPLB is marked as write-back (CPLB_WT==0), and
+ * it is clean (CPLB_DIRTY==0), then a write to the
+ * CPLB's page triggers a protection violation. We have to
+ * mark the CPLB as dirty, to indicate that there are
+ * pending writes associated with the CPLB.
+ */
+
+ P4.L = (DCPLB_STATUS & 0xFFFF);
+ P4.H = (DCPLB_STATUS >> 16);
+ P3.L = (DCPLB_DATA0 & 0xFFFF);
+ P3.H = (DCPLB_DATA0 >> 16);
+ R5 = [P4];
+
+ /* A protection violation can be caused by more than just writes
+ * to a clean WB page, so we have to ensure that:
+ * - It's a write
+ * - to a clean WB page
+ * - and is allowed in the mode the access occurred.
+ */
+
+ CC = BITTST(R5, 16); /* ensure it was a write*/
+ IF !CC JUMP prot_violation;
+
+ /* to check the rest, we have to retrieve the DCPLB.*/
+
+ /* The low half of DCPLB_STATUS is a bit mask*/
+
+ R2 = R5.L (Z); /* indicating which CPLB triggered the event.*/
+ R3 = 30; /* so we can use this to determine the offset*/
+ R2.L = SIGNBITS R2;
+ R2 = R2.L (Z); /* into the DCPLB table.*/
+ R3 = R3 - R2;
+ P4 = R3;
+ P3 = P3 + (P4<<2);
+ R3 = [P3]; /* Retrieve the CPLB*/
+
+ /* Now we can check whether it's a clean WB page*/
+
+ CC = BITTST(R3, 14); /* 0==WB, 1==WT*/
+ IF CC JUMP prot_violation;
+ CC = BITTST(R3, 7); /* 0 == clean, 1 == dirty*/
+ IF CC JUMP prot_violation;
+
+ /* Check whether the write is allowed in the mode that was active.*/
+
+ R2 = 1<<3; /* checking write in user mode*/
+ CC = BITTST(R5, 17); /* 0==was user, 1==was super*/
+ R5 = CC;
+ R2 <<= R5; /* if was super, check write in super mode*/
+ R2 = R3 & R2;
+ CC = R2 == 0;
+ IF CC JUMP prot_violation;
+
+ /* It's a genuine write-to-clean-page.*/
+
+ BITSET(R3, 7); /* mark as dirty*/
+ [P3] = R3; /* and write back.*/
+ CSYNC;
+ ( R7:0,P5:0 ) = [SP++];
+ R0 = CPLB_RELOADED;
+ RTS;
+
+dcplb_miss_compare:
+
+ /* Data CPLB Miss event. We need to choose a CPLB to
+ * evict, and then locate a new CPLB to install from the
+ * config table, that covers the faulting address.
+ */
+
+ P1.L = (DCPLB_DATA15 & 0xFFFF);
+ P1.H = (DCPLB_DATA15 >> 16);
+
+ P4.L = (DCPLB_FAULT_ADDR & 0xFFFF);
+ P4.H = (DCPLB_FAULT_ADDR >> 16);
+ R4 = [P4];
+ I0 = R4;
+
+ /* The replacement procedure for DCPLBs*/
+
+ R6 = R1; /* Save for later*/
+
+ /* Turn off CPLBs while we work.*/
+ P4.L = (DMEM_CONTROL & 0xFFFF);
+ P4.H = (DMEM_CONTROL >> 16);
+ R5 = [P4];
+ BITCLR(R5,ENDCPLB_P);
+ CLI R0;
+ SSYNC; /* SSYNC required before writing to DMEM_CONTROL. */
+ .align 8;
+ [P4] = R5;
+ SSYNC;
+ STI R0;
+
+ /* Start looking for a CPLB to evict. Our order of preference
+ * is: invalid CPLBs, clean CPLBs, dirty CPLBs. Locked CPLBs
+ * are no good.
+ */
+
+ I1.L = (DCPLB_DATA0 & 0xFFFF);
+ I1.H = (DCPLB_DATA0 >> 16);
+ P1 = 3;
+ P2 = 16;
+ I2.L = dcplb_preference;
+ I2.H = dcplb_preference;
+ LSETUP(sdsearch1, edsearch1) LC0 = P1;
+sdsearch1:
+ R0 = [I2++]; /* Get the bits we're interested in*/
+ P0 = I1; /* Go back to start of table*/
+ LSETUP (sdsearch2, edsearch2) LC1 = P2;
+sdsearch2:
+ R1 = [P0++]; /* Fetch each installed CPLB in turn*/
+ R2 = R1 & R0; /* and test for interesting bits.*/
+ CC = R2 == 0; /* If none are set, it'll do.*/
+ IF !CC JUMP skip_stack_check;
+
+ R2 = [P0 - 0x104]; /* R2 - PageStart */
+ P3.L = page_size_table; /* retrive end address */
+ P3.H = page_size_table; /* retrive end address */
+ R3 = 0x2; /* 0th - position, 2 bits -length */
+ nop; /*Anamoly 05000209*/
+ R7 = EXTRACT(R1,R3.l);
+ R7 = R7 << 2; /* Page size index offset */
+ P5 = R7;
+ P3 = P3 + P5;
+ R7 = [P3]; /* page size in 1K bytes */
+
+ R7 = R7 << 0xA; /* in bytes * 1024*/
+ R7 = R2 + R7; /* R7 - PageEnd */
+ R4 = SP; /* Test SP is in range */
+
+ CC = R7 < R4; /* if PageEnd < SP */
+ IF CC JUMP dfound_victim;
+ R3 = 0x284; /* stack length from start of trap till the point */
+ /* 20 stack locations for future modifications */
+ R4 = R4 + R3;
+ CC = R4 < R2; /* if SP + stacklen < PageStart */
+ IF CC JUMP dfound_victim;
+skip_stack_check:
+
+edsearch2: NOP;
+edsearch1: NOP;
+
+ /* If we got here, we didn't find a DCPLB we considered
+ * replacable, which means all of them were locked.
+ */
+
+ JUMP all_locked;
+dfound_victim:
+
+#ifdef CONFIG_CPLB_INFO
+ R1 = [P0 - 0x104];
+ P2.L = dpdt_table;
+ P2.H = dpdt_table;
+ P3.L = dpdt_swapcount_table;
+ P3.H = dpdt_swapcount_table;
+ P3 += -4;
+dicount:
+ R2 = [P2];
+ P2 += 8;
+ P3 += 8;
+ CC = R2==-1;
+ IF CC JUMP dicount_done;
+ CC = R1==R2;
+ IF !CC JUMP dicount;
+ R1 = [P3];
+ R1 += 1;
+ [P3] = R1;
+ CSYNC;
+dicount_done:
+#endif
+
+ /* Clean down the hardware loops*/
+ R2 = 0;
+ LC1 = R2;
+ LC0 = R2;
+
+ /* There's a suitable victim in [P0-4] (because we've
+ * advanced already). If it's a valid dirty write-back
+ * CPLB, we need to flush the pending writes first.
+ */
+
+ CC = BITTST(R1, 0); /* Is it valid?*/
+ IF !CC JUMP Ddoverwrite;/* nope.*/
+ CC = BITTST(R1, 7); /* Is it dirty?*/
+ IF !CC JUMP Ddoverwrite (BP); /* Nope.*/
+ CC = BITTST(R1, 14); /* Is it Write-Through?*/
+ IF CC JUMP Ddoverwrite; /* Yep*/
+
+ /* This is a dirty page, so we need to flush all writes
+ * that are pending on the page.
+ */
+
+ /* Retrieve the page start address*/
+ R0 = [P0 - 0x104];
+ [--sp] = rets;
+ CALL dcplb_flush; /* R0==CPLB addr, R1==CPLB data*/
+ rets = [sp++];
+Ddoverwrite:
+
+ /* [P0-4] is a suitable victim CPLB, so we want to
+ * overwrite it by moving all the following CPLBs
+ * one space closer to the start.
+ */
+
+ R1.L = ((DCPLB_DATA15+4) & 0xFFFF); /*DCPLB_DATA15+4*/
+ R1.H = ((DCPLB_DATA15+4) >> 16);
+ R0 = P0;
+
+ /* If the victim happens to be in DCPLB15,
+ * we don't need to move anything.
+ */
+
+ CC = R1 == R0;
+ IF CC JUMP de_moved;
+ R1 = R1 - R0;
+ R1 >>= 2;
+ P1 = R1;
+ LSETUP(ds_move, de_move) LC0=P1;
+ds_move:
+ R0 = [P0++]; /* move data */
+ [P0 - 8] = R0;
+ R0 = [P0-0x104] /* move address */
+de_move: [P0-0x108] = R0;
+
+ /* We've now made space in DCPLB15 for the new CPLB to be
+ * installed. The next stage is to locate a CPLB in the
+ * config table that covers the faulting address.
+ */
+
+de_moved:NOP;
+ R0 = I0; /* Our faulting address */
+
+ P2.L = dpdt_table;
+ P2.H = dpdt_table;
+#ifdef CONFIG_CPLB_INFO
+ P3.L = dpdt_swapcount_table;
+ P3.H = dpdt_swapcount_table;
+ P3 += -8;
+#endif
+
+ P1.L = page_size_table;
+ P1.H = page_size_table;
+
+ /* An extraction pattern, to retrieve bits 17:16.*/
+
+ R1 = (16<<8)|2;
+dnext: R4 = [P2++]; /* address */
+ R2 = [P2++]; /* data */
+#ifdef CONFIG_CPLB_INFO
+ P3 += 8;
+#endif
+
+ CC = R4 == -1;
+ IF CC JUMP no_page_in_table;
+
+ /* See if failed address > start address */
+ CC = R4 <= R0(IU);
+ IF !CC JUMP dnext;
+
+ /* extract page size (17:16)*/
+ R3 = EXTRACT(R2, R1.L) (Z);
+
+ /* add page size to addr to get range */
+
+ P5 = R3;
+ P5 = P1 + (P5 << 2);
+ R3 = [P5];
+ R3 = R3 + R4;
+
+ /* See if failed address < (start address + page size) */
+ CC = R0 < R3(IU);
+ IF !CC JUMP dnext;
+
+ /* We've found the CPLB that should be installed, so
+ * write it into CPLB15, masking off any caching bits
+ * if necessary.
+ */
+
+ P1.L = (DCPLB_DATA15 & 0xFFFF);
+ P1.H = (DCPLB_DATA15 >> 16);
+
+ /* If the DCPLB has cache bits set, but caching hasn't
+ * been enabled, then we want to mask off the cache-in-L1
+ * bit before installing. Moreover, if caching is off, we
+ * also want to ensure that the DCPLB has WT mode set, rather
+ * than WB, since WB pages still trigger first-write exceptions
+ * even when not caching is off, and the page isn't marked as
+ * cachable. Finally, we could mark the page as clean, not dirty,
+ * but we choose to leave that decision to the user; if the user
+ * chooses to have a CPLB pre-defined as dirty, then they always
+ * pay the cost of flushing during eviction, but don't pay the
+ * cost of first-write exceptions to mark the page as dirty.
+ */
+
+#ifdef CONFIG_BLKFIN_WT
+ BITSET(R6, 14); /* Set WT*/
+#endif
+
+ [P1] = R2;
+ [P1-0x100] = R4;
+#ifdef CONFIG_CPLB_INFO
+ R3 = [P3];
+ R3 += 1;
+ [P3] = R3;
+#endif
+
+ /* We've installed the CPLB, so re-enable CPLBs. P4
+ * points to DMEM_CONTROL, and R5 is the value we
+ * last wrote to it, when we were disabling CPLBs.
+ */
+
+ BITSET(R5,ENDCPLB_P);
+ CLI R2;
+ .align 8;
+ [P4] = R5;
+ SSYNC;
+ STI R2;
+
+ ( R7:0,P5:0 ) = [SP++];
+ R0 = CPLB_RELOADED;
+ RTS;
+
+.data
+.align 4;
+page_size_table:
+.byte4 0x00000400; /* 1K */
+.byte4 0x00001000; /* 4K */
+.byte4 0x00100000; /* 1M */
+.byte4 0x00400000; /* 4M */
+
+.align 4;
+dcplb_preference:
+.byte4 0x00000001; /* valid bit */
+.byte4 0x00000082; /* dirty+lock bits */
+.byte4 0x00000002; /* lock bit */
diff --git a/cpu/bf533/cpu.c b/cpu/bf533/cpu.c
new file mode 100644
index 0000000000..78e2b966bb
--- /dev/null
+++ b/cpu/bf533/cpu.c
@@ -0,0 +1,189 @@
+/*
+ * U-boot - cpu.c CPU specific functions
+ *
+ * Copyright (c) 2005 blackfin.uclinux.org
+ *
+ * (C) Copyright 2000-2004
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/blackfin.h>
+#include <command.h>
+#include <asm/entry.h>
+
+#define SSYNC() asm("ssync;")
+#define CACHE_ON 1
+#define CACHE_OFF 0
+
+/* Data Attibutes*/
+
+#define SDRAM_IGENERIC (PAGE_SIZE_4MB | CPLB_L1_CHBL | CPLB_USER_RD | CPLB_VALID)
+#define SDRAM_IKERNEL (PAGE_SIZE_4MB | CPLB_L1_CHBL | CPLB_USER_RD | CPLB_VALID | CPLB_LOCK)
+#define L1_IMEMORY (PAGE_SIZE_1MB | CPLB_L1_CHBL | CPLB_USER_RD | CPLB_VALID | CPLB_LOCK)
+#define SDRAM_INON_CHBL (PAGE_SIZE_4MB | CPLB_USER_RD | CPLB_VALID)
+
+#define ANOMALY_05000158 0x200
+#define SDRAM_DGENERIC (PAGE_SIZE_4MB | CPLB_L1_CHBL | CPLB_WT | CPLB_L1_AOW | CPLB_SUPV_WR | CPLB_USER_RD | CPLB_USER_WR | CPLB_VALID | ANOMALY_05000158)
+#define SDRAM_DNON_CHBL (PAGE_SIZE_4MB | CPLB_WT | CPLB_L1_AOW | CPLB_SUPV_WR | CPLB_USER_WR | CPLB_USER_RD | CPLB_VALID | ANOMALY_05000158)
+#define SDRAM_DKERNEL (PAGE_SIZE_4MB | CPLB_L1_CHBL | CPLB_WT | CPLB_L1_AOW | CPLB_USER_RD | CPLB_SUPV_WR | CPLB_USER_WR | CPLB_VALID | CPLB_LOCK | ANOMALY_05000158)
+#define L1_DMEMORY (PAGE_SIZE_4KB | CPLB_L1_CHBL | CPLB_L1_AOW | CPLB_WT | CPLB_SUPV_WR | CPLB_USER_WR | CPLB_VALID | ANOMALY_05000158)
+#define SDRAM_EBIU (PAGE_SIZE_4MB | CPLB_WT | CPLB_L1_AOW | CPLB_USER_RD | CPLB_USER_WR | CPLB_SUPV_WR | CPLB_VALID | ANOMALY_05000158)
+
+static unsigned int icplb_table[16][2]={
+ {0xFFA00000, L1_IMEMORY},
+ {0x00000000, SDRAM_IKERNEL}, /*SDRAM_Page1*/
+ {0x00400000, SDRAM_IKERNEL}, /*SDRAM_Page1*/
+ {0x07C00000, SDRAM_IKERNEL}, /*SDRAM_Page14*/
+ {0x00800000, SDRAM_IGENERIC}, /*SDRAM_Page2*/
+ {0x00C00000, SDRAM_IGENERIC}, /*SDRAM_Page2*/
+ {0x01000000, SDRAM_IGENERIC}, /*SDRAM_Page4*/
+ {0x01400000, SDRAM_IGENERIC}, /*SDRAM_Page5*/
+ {0x01800000, SDRAM_IGENERIC}, /*SDRAM_Page6*/
+ {0x01C00000, SDRAM_IGENERIC}, /*SDRAM_Page7*/
+ {0x02000000, SDRAM_IGENERIC}, /*SDRAM_Page8*/
+ {0x02400000, SDRAM_IGENERIC}, /*SDRAM_Page9*/
+ {0x02800000, SDRAM_IGENERIC}, /*SDRAM_Page10*/
+ {0x02C00000, SDRAM_IGENERIC}, /*SDRAM_Page11*/
+ {0x03000000, SDRAM_IGENERIC}, /*SDRAM_Page12*/
+ {0x03400000, SDRAM_IGENERIC}, /*SDRAM_Page13*/
+};
+
+static unsigned int dcplb_table[16][2]={
+ {0xFFA00000,L1_DMEMORY},
+ {0x00000000,SDRAM_DKERNEL}, /*SDRAM_Page1*/
+ {0x00400000,SDRAM_DKERNEL}, /*SDRAM_Page1*/
+ {0x07C00000,SDRAM_DKERNEL}, /*SDRAM_Page15*/
+ {0x00800000,SDRAM_DGENERIC}, /*SDRAM_Page2*/
+ {0x00C00000,SDRAM_DGENERIC}, /*SDRAM_Page3*/
+ {0x01000000,SDRAM_DGENERIC}, /*SDRAM_Page4*/
+ {0x01400000,SDRAM_DGENERIC}, /*SDRAM_Page5*/
+ {0x01800000,SDRAM_DGENERIC}, /*SDRAM_Page6*/
+ {0x01C00000,SDRAM_DGENERIC}, /*SDRAM_Page7*/
+ {0x02000000,SDRAM_DGENERIC}, /*SDRAM_Page8*/
+ {0x02400000,SDRAM_DGENERIC}, /*SDRAM_Page9*/
+ {0x02800000,SDRAM_DGENERIC}, /*SDRAM_Page10*/
+ {0x02C00000,SDRAM_DGENERIC}, /*SDRAM_Page11*/
+ {0x03000000,SDRAM_DGENERIC}, /*SDRAM_Page12*/
+ {0x20000000,SDRAM_EBIU}, /*For Network */
+};
+
+int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+ __asm__ __volatile__
+ ("cli r3;"
+ "P0 = %0;"
+ "JUMP (P0);"
+ :
+ : "r" (L1_ISRAM)
+ );
+
+ return 0;
+}
+
+/* These functions are just used to satisfy the linker */
+int cpu_init(void)
+{
+ return 0;
+}
+
+int cleanup_before_linux(void)
+{
+ return 0;
+}
+
+void icache_enable(void)
+{
+ unsigned int *I0,*I1;
+ int i;
+
+ I0 = (unsigned int *)ICPLB_ADDR0;
+ I1 = (unsigned int *)ICPLB_DATA0;
+
+ for(i=0;i<16;i++){
+ *I0++ = icplb_table[i][0];
+ *I1++ = icplb_table[i][1];
+ }
+ cli();
+ SSYNC();
+ *(unsigned int *)IMEM_CONTROL = IMC | ENICPLB;
+ SSYNC();
+ sti();
+}
+
+void icache_disable(void)
+{
+ cli();
+ SSYNC();
+ *(unsigned int *)IMEM_CONTROL &= ~(IMC | ENICPLB);
+ SSYNC();
+ sti();
+}
+
+int icache_status(void)
+{
+ unsigned int value;
+ value = *(unsigned int *)IMEM_CONTROL;
+
+ if( value & (IMC|ENICPLB) )
+ return CACHE_ON;
+ else
+ return CACHE_OFF;
+}
+
+void dcache_enable(void)
+{
+ unsigned int *I0,*I1;
+ unsigned int temp;
+ int i;
+ I0 = (unsigned int *)DCPLB_ADDR0;
+ I1 = (unsigned int *)DCPLB_DATA0;
+
+ for(i=0;i<16;i++){
+ *I0++ = dcplb_table[i][0];
+ *I1++ = dcplb_table[i][1];
+ }
+ cli();
+ temp = *(unsigned int *)DMEM_CONTROL;
+ SSYNC();
+ *(unsigned int *)DMEM_CONTROL = ACACHE_BCACHE |ENDCPLB |PORT_PREF0|temp;
+ SSYNC();
+ sti();
+}
+
+void dcache_disable(void)
+{
+ cli();
+ SSYNC();
+ *(unsigned int *)DMEM_CONTROL &= ~(ACACHE_BCACHE |ENDCPLB |PORT_PREF0);
+ SSYNC();
+ sti();
+}
+
+int dcache_status(void)
+{
+ unsigned int value;
+ value = *(unsigned int *)DMEM_CONTROL;
+ if( value & (ENDCPLB))
+ return CACHE_ON;
+ else
+ return CACHE_OFF;
+}
diff --git a/cpu/bf533/cpu.h b/cpu/bf533/cpu.h
new file mode 100644
index 0000000000..7ec33878ea
--- /dev/null
+++ b/cpu/bf533/cpu.h
@@ -0,0 +1,65 @@
+/*
+ * U-boot - cpu.h
+ *
+ * Copyright (c) 2005 blackfin.uclinux.org
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _CPU_H_
+#define _CPU_H_
+
+#include <command.h>
+
+#define INTERNAL_IRQS (32)
+#define NUM_IRQ_NODES 16
+#define DEF_INTERRUPT_FLAGS 1
+#define MAX_TIM_LOAD 0xFFFFFFFF
+
+void blackfin_irq_panic(int reason, struct pt_regs * reg);
+extern void dump(struct pt_regs * regs);
+void display_excp(void);
+asmlinkage void evt_nmi(void);
+asmlinkage void evt_exception(void);
+asmlinkage void trap(void);
+asmlinkage void evt_ivhw(void);
+asmlinkage void evt_rst(void);
+asmlinkage void evt_timer(void);
+asmlinkage void evt_evt7(void);
+asmlinkage void evt_evt8(void);
+asmlinkage void evt_evt9(void);
+asmlinkage void evt_evt10(void);
+asmlinkage void evt_evt11(void);
+asmlinkage void evt_evt12(void);
+asmlinkage void evt_evt13(void);
+asmlinkage void evt_soft_int1(void);
+asmlinkage void evt_system_call(void);
+void blackfin_irq_panic(int reason, struct pt_regs * regs);
+void blackfin_free_irq(unsigned int irq, void *dev_id);
+void call_isr(int irq, struct pt_regs * fp);
+void blackfin_do_irq(int vec, struct pt_regs *fp);
+void blackfin_init_IRQ(void);
+void blackfin_enable_irq(unsigned int irq);
+void blackfin_disable_irq(unsigned int irq);
+extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
+int blackfin_request_irq(unsigned int irq,
+ void (*handler)(int, void *, struct pt_regs *),
+ unsigned long flags,const char *devname,void *dev_id);
+void timer_init(void);
+#endif
diff --git a/cpu/bf533/flush.S b/cpu/bf533/flush.S
new file mode 100644
index 0000000000..9fbdefc9db
--- /dev/null
+++ b/cpu/bf533/flush.S
@@ -0,0 +1,402 @@
+/* Copyright (C) 2003 Analog Devices, Inc. All Rights Reserved.
+ * Copyright (C) 2004 LG SOft India. All Rights Reserved.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.
+ *
+ * Blackfin BF533/2.6 support : LG Soft India
+ */
+#define ASSEMBLY
+
+#include <asm/linkage.h>
+#include <asm/cplb.h>
+#include <asm/blackfin.h>
+
+.text
+
+/* This is an external function being called by the user
+ * application through __flush_cache_all. Currently this function
+ * serves the purpose of flushing all the pending writes in
+ * in the instruction cache.
+ */
+
+ENTRY(flush_instruction_cache)
+ [--SP] = ( R7:6, P5:4 );
+ LINK 12;
+ SP += -12;
+ P5.H = (ICPLB_ADDR0 >> 16);
+ P5.L = (ICPLB_ADDR0 & 0xFFFF);
+ P4.H = (ICPLB_DATA0 >> 16);
+ P4.L = (ICPLB_DATA0 & 0xFFFF);
+ R7 = CPLB_VALID | CPLB_L1_CHBL;
+ R6 = 16;
+inext: R0 = [P5++];
+ R1 = [P4++];
+ [--SP] = RETS;
+ CALL icplb_flush; /* R0 = page, R1 = data*/
+ RETS = [SP++];
+iskip: R6 += -1;
+ CC = R6;
+ IF CC JUMP inext;
+ SSYNC;
+ SP += 12;
+ UNLINK;
+ ( R7:6, P5:4 ) = [SP++];
+ RTS;
+
+/* This is an internal function to flush all pending
+ * writes in the cache associated with a particular ICPLB.
+ *
+ * R0 - page's start address
+ * R1 - CPLB's data field.
+ */
+
+.align 2
+ENTRY(icplb_flush)
+ [--SP] = ( R7:0, P5:0 );
+ [--SP] = LC0;
+ [--SP] = LT0;
+ [--SP] = LB0;
+ [--SP] = LC1;
+ [--SP] = LT1;
+ [--SP] = LB1;
+
+ /* If it's a 1K or 4K page, then it's quickest to
+ * just systematically flush all the addresses in
+ * the page, regardless of whether they're in the
+ * cache, or dirty. If it's a 1M or 4M page, there
+ * are too many addresses, and we have to search the
+ * cache for lines corresponding to the page.
+ */
+
+ CC = BITTST(R1, 17); /* 1MB or 4MB */
+ IF !CC JUMP iflush_whole_page;
+
+ /* We're only interested in the page's size, so extract
+ * this from the CPLB (bits 17:16), and scale to give an
+ * offset into the page_size and page_prefix tables.
+ */
+
+ R1 <<= 14;
+ R1 >>= 30;
+ R1 <<= 2;
+
+ /* We can also determine the sub-bank used, because this is
+ * taken from bits 13:12 of the address.
+ */
+
+ R3 = ((12<<8)|2); /* Extraction pattern */
+ nop; /*Anamoly 05000209*/
+ R4 = EXTRACT(R0, R3.L) (Z); /* Extract bits*/
+ R3.H = R4.L << 0 ; /* Save in extraction pattern for later deposit.*/
+
+
+ /* So:
+ * R0 = Page start
+ * R1 = Page length (actually, offset into size/prefix tables)
+ * R3 = sub-bank deposit values
+ *
+ * The cache has 2 Ways, and 64 sets, so we iterate through
+ * the sets, accessing the tag for each Way, for our Bank and
+ * sub-bank, looking for dirty, valid tags that match our
+ * address prefix.
+ */
+
+ P5.L = (ITEST_COMMAND & 0xFFFF);
+ P5.H = (ITEST_COMMAND >> 16);
+ P4.L = (ITEST_DATA0 & 0xFFFF);
+ P4.H = (ITEST_DATA0 >> 16);
+
+ P0.L = page_prefix_table;
+ P0.H = page_prefix_table;
+ P1 = R1;
+ R5 = 0; /* Set counter*/
+ P0 = P1 + P0;
+ R4 = [P0]; /* This is the address prefix*/
+
+ /* We're reading (bit 1==0) the tag (bit 2==0), and we
+ * don't care about which double-word, since we're only
+ * fetching tags, so we only have to set Set, Bank,
+ * Sub-bank and Way.
+ */
+
+ P2 = 4;
+ LSETUP (ifs1, ife1) LC1 = P2;
+ifs1: P0 = 32; /* iterate over all sets*/
+ LSETUP (ifs0, ife0) LC0 = P0;
+ifs0: R6 = R5 << 5; /* Combine set*/
+ R6.H = R3.H << 0 ; /* and sub-bank*/
+ [P5] = R6; /* Issue Command*/
+ SSYNC; /* CSYNC will not work here :(*/
+ R7 = [P4]; /* and read Tag.*/
+ CC = BITTST(R7, 0); /* Check if valid*/
+ IF !CC JUMP ifskip; /* and skip if not.*/
+
+ /* Compare against the page address. First, plant bits 13:12
+ * into the tag, since those aren't part of the returned data.
+ */
+
+ R7 = DEPOSIT(R7, R3); /* set 13:12*/
+ R1 = R7 & R4; /* Mask off lower bits*/
+ CC = R1 == R0; /* Compare against page start.*/
+ IF !CC JUMP ifskip; /* Skip it if it doesn't match.*/
+
+ /* Tag address matches against page, so this is an entry
+ * we must flush.
+ */
+
+ R7 >>= 10; /* Mask off the non-address bits*/
+ R7 <<= 10;
+ P3 = R7;
+ IFLUSH [P3]; /* And flush the entry*/
+ifskip:
+ife0: R5 += 1; /* Advance to next Set*/
+ife1: NOP;
+
+ifinished:
+ SSYNC; /* Ensure the data gets out to mem.*/
+
+ /*Finished. Restore context.*/
+ LB1 = [SP++];
+ LT1 = [SP++];
+ LC1 = [SP++];
+ LB0 = [SP++];
+ LT0 = [SP++];
+ LC0 = [SP++];
+ ( R7:0, P5:0 ) = [SP++];
+ RTS;
+
+iflush_whole_page:
+ /* It's a 1K or 4K page, so quicker to just flush the
+ * entire page.
+ */
+
+ P1 = 32; /* For 1K pages*/
+ P2 = P1 << 2; /* For 4K pages*/
+ P0 = R0; /* Start of page*/
+ CC = BITTST(R1, 16); /* Whether 1K or 4K*/
+ IF CC P1 = P2;
+ P1 += -1; /* Unroll one iteration*/
+ SSYNC;
+ IFLUSH [P0++]; /* because CSYNC can't end loops.*/
+ LSETUP (isall, ieall) LC0 = P1;
+isall:IFLUSH [P0++];
+ieall: NOP;
+ SSYNC;
+ JUMP ifinished;
+
+/* This is an external function being called by the user
+ * application through __flush_cache_all. Currently this function
+ * serves the purpose of flushing all the pending writes in
+ * in the data cache.
+ */
+
+ENTRY(flush_data_cache)
+ [--SP] = ( R7:6, P5:4 );
+ LINK 12;
+ SP += -12;
+ P5.H = (DCPLB_ADDR0 >> 16);
+ P5.L = (DCPLB_ADDR0 & 0xFFFF);
+ P4.H = (DCPLB_DATA0 >> 16);
+ P4.L = (DCPLB_DATA0 & 0xFFFF);
+ R7 = CPLB_VALID | CPLB_L1_CHBL | CPLB_DIRTY (Z);
+ R6 = 16;
+next: R0 = [P5++];
+ R1 = [P4++];
+ CC = BITTST(R1, 14); /* Is it write-through?*/
+ IF CC JUMP skip; /* If so, ignore it.*/
+ R2 = R1 & R7; /* Is it a dirty, cached page?*/
+ CC = R2;
+ IF !CC JUMP skip; /* If not, ignore it.*/
+ [--SP] = RETS;
+ CALL dcplb_flush; /* R0 = page, R1 = data*/
+ RETS = [SP++];
+skip: R6 += -1;
+ CC = R6;
+ IF CC JUMP next;
+ SSYNC;
+ SP += 12;
+ UNLINK;
+ ( R7:6, P5:4 ) = [SP++];
+ RTS;
+
+/* This is an internal function to flush all pending
+ * writes in the cache associated with a particular DCPLB.
+ *
+ * R0 - page's start address
+ * R1 - CPLB's data field.
+ */
+
+.align 2
+ENTRY(dcplb_flush)
+ [--SP] = ( R7:0, P5:0 );
+ [--SP] = LC0;
+ [--SP] = LT0;
+ [--SP] = LB0;
+ [--SP] = LC1;
+ [--SP] = LT1;
+ [--SP] = LB1;
+
+ /* If it's a 1K or 4K page, then it's quickest to
+ * just systematically flush all the addresses in
+ * the page, regardless of whether they're in the
+ * cache, or dirty. If it's a 1M or 4M page, there
+ * are too many addresses, and we have to search the
+ * cache for lines corresponding to the page.
+ */
+
+ CC = BITTST(R1, 17); /* 1MB or 4MB */
+ IF !CC JUMP dflush_whole_page;
+
+ /* We're only interested in the page's size, so extract
+ * this from the CPLB (bits 17:16), and scale to give an
+ * offset into the page_size and page_prefix tables.
+ */
+
+ R1 <<= 14;
+ R1 >>= 30;
+ R1 <<= 2;
+
+ /* The page could be mapped into Bank A or Bank B, depending
+ * on (a) whether both banks are configured as cache, and
+ * (b) on whether address bit A[x] is set. x is determined
+ * by DCBS in DMEM_CONTROL
+ */
+
+ R2 = 0; /* Default to Bank A (Bank B would be 1)*/
+
+ P0.L = (DMEM_CONTROL & 0xFFFF);
+ P0.H = (DMEM_CONTROL >> 16);
+
+ R3 = [P0]; /* If Bank B is not enabled as cache*/
+ CC = BITTST(R3, 2); /* then Bank A is our only option.*/
+ IF CC JUMP bank_chosen;
+
+ R4 = 1<<14; /* If DCBS==0, use A[14].*/
+ R5 = R4 << 7; /* If DCBS==1, use A[23];*/
+ CC = BITTST(R3, 4);
+ IF CC R4 = R5; /* R4 now has either bit 14 or bit 23 set.*/
+ R5 = R0 & R4; /* Use it to test the Page address*/
+ CC = R5; /* and if that bit is set, we use Bank B,*/
+ R2 = CC; /* else we use Bank A.*/
+ R2 <<= 23; /* The Bank selection's at posn 23.*/
+
+bank_chosen:
+
+ /* We can also determine the sub-bank used, because this is
+ * taken from bits 13:12 of the address.
+ */
+
+ R3 = ((12<<8)|2); /* Extraction pattern */
+ nop; /*Anamoly 05000209*/
+ R4 = EXTRACT(R0, R3.L) (Z); /* Extract bits*/
+ R3.H = R4.L << 0 ; /* Save in extraction pattern for later deposit.*/
+
+ /* So:
+ * R0 = Page start
+ * R1 = Page length (actually, offset into size/prefix tables)
+ * R2 = Bank select mask
+ * R3 = sub-bank deposit values
+ *
+ * The cache has 2 Ways, and 64 sets, so we iterate through
+ * the sets, accessing the tag for each Way, for our Bank and
+ * sub-bank, looking for dirty, valid tags that match our
+ * address prefix.
+ */
+
+ P5.L = (DTEST_COMMAND & 0xFFFF);
+ P5.H = (DTEST_COMMAND >> 16);
+ P4.L = (DTEST_DATA0 & 0xFFFF);
+ P4.H = (DTEST_DATA0 >> 16);
+
+ P0.L = page_prefix_table;
+ P0.H = page_prefix_table;
+ P1 = R1;
+ R5 = 0; /* Set counter*/
+ P0 = P1 + P0;
+ R4 = [P0]; /* This is the address prefix*/
+
+
+ /* We're reading (bit 1==0) the tag (bit 2==0), and we
+ * don't care about which double-word, since we're only
+ * fetching tags, so we only have to set Set, Bank,
+ * Sub-bank and Way.
+ */
+
+ P2 = 2;
+ LSETUP (fs1, fe1) LC1 = P2;
+fs1: P0 = 64; /* iterate over all sets*/
+ LSETUP (fs0, fe0) LC0 = P0;
+fs0: R6 = R5 << 5; /* Combine set*/
+ R6.H = R3.H << 0 ; /* and sub-bank*/
+ R6 = R6 | R2; /* and Bank. Leave Way==0 at first.*/
+ BITSET(R6,14);
+ [P5] = R6; /* Issue Command*/
+ SSYNC;
+ R7 = [P4]; /* and read Tag.*/
+ CC = BITTST(R7, 0); /* Check if valid*/
+ IF !CC JUMP fskip; /* and skip if not.*/
+ CC = BITTST(R7, 1); /* Check if dirty*/
+ IF !CC JUMP fskip; /* and skip if not.*/
+
+ /* Compare against the page address. First, plant bits 13:12
+ * into the tag, since those aren't part of the returned data.
+ */
+
+ R7 = DEPOSIT(R7, R3); /* set 13:12*/
+ R1 = R7 & R4; /* Mask off lower bits*/
+ CC = R1 == R0; /* Compare against page start.*/
+ IF !CC JUMP fskip; /* Skip it if it doesn't match.*/
+
+ /* Tag address matches against page, so this is an entry
+ * we must flush.
+ */
+
+ R7 >>= 10; /* Mask off the non-address bits*/
+ R7 <<= 10;
+ P3 = R7;
+ SSYNC;
+ FLUSHINV [P3]; /* And flush the entry*/
+fskip:
+fe0: R5 += 1; /* Advance to next Set*/
+fe1: BITSET(R2, 26); /* Go to next Way.*/
+
+dfinished:
+ SSYNC; /* Ensure the data gets out to mem.*/
+
+ /*Finished. Restore context.*/
+ LB1 = [SP++];
+ LT1 = [SP++];
+ LC1 = [SP++];
+ LB0 = [SP++];
+ LT0 = [SP++];
+ LC0 = [SP++];
+ ( R7:0, P5:0 ) = [SP++];
+ RTS;
+
+dflush_whole_page:
+
+ /* It's a 1K or 4K page, so quicker to just flush the
+ * entire page.
+ */
+
+ P1 = 32; /* For 1K pages*/
+ P2 = P1 << 2; /* For 4K pages*/
+ P0 = R0; /* Start of page*/
+ CC = BITTST(R1, 16); /* Whether 1K or 4K*/
+ IF CC P1 = P2;
+ P1 += -1; /* Unroll one iteration*/
+ SSYNC;
+ FLUSHINV [P0++]; /* because CSYNC can't end loops.*/
+ LSETUP (eall, eall) LC0 = P1;
+eall: FLUSHINV [P0++];
+ SSYNC;
+ JUMP dfinished;
+
+.align 4;
+page_prefix_table:
+.byte4 0xFFFFFC00; /* 1K */
+.byte4 0xFFFFF000; /* 4K */
+.byte4 0xFFF00000; /* 1M */
+.byte4 0xFFC00000; /* 4M */
+.page_prefix_table.end:
diff --git a/cpu/bf533/interrupt.S b/cpu/bf533/interrupt.S
new file mode 100644
index 0000000000..e780dc6d6b
--- /dev/null
+++ b/cpu/bf533/interrupt.S
@@ -0,0 +1,391 @@
+/*
+ * U-boot - interrupt.S Processing of interrupts and exception handling
+ *
+ * Copyright (c) 2005 blackfin.uclinux.org
+ *
+ * (C) Copyright 2000-2004
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * This file is based on interrupt.S
+ *
+ * Copyright (C) 2003 Metrowerks, Inc. <mwaddel@metrowerks.com>
+ * Copyright (C) 2002 Arcturus Networks Ltd. Ted Ma <mated@sympatico.ca>
+ * Copyright (C) 1998 D. Jeff Dionne <jeff@ryeham.ee.ryerson.ca>,
+ * Kenneth Albanowski <kjahds@kjahds.com>,
+ * The Silver Hammer Group, Ltd.
+ *
+ * (c) 1995, Dionne & Associates
+ * (c) 1995, DKG Display Tech.
+ *
+ * This file is also based on exception.asm
+ * (C) Copyright 2001-2005 - Analog Devices, Inc. All rights reserved.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#define ASSEMBLY
+
+#include <asm/hw_irq.h>
+#include <asm/entry.h>
+#include <asm/blackfin_defs.h>
+#include <asm/cpu/bf533_irq.h>
+
+.global blackfin_irq_panic;
+
+.text
+.align 2
+
+#ifndef CONFIG_KGDB
+.global evt_emulation
+evt_emulation:
+ SAVE_CONTEXT
+ r0 = IRQ_EMU;
+ r1 = seqstat;
+ sp += -12;
+ call blackfin_irq_panic;
+ sp += 12;
+ rte;
+#endif
+
+.global evt_nmi
+evt_nmi:
+ SAVE_CONTEXT
+ r0 = IRQ_NMI;
+ r1 = RETN;
+ sp += -12;
+ call blackfin_irq_panic;
+ sp += 12;
+
+_evt_nmi_exit:
+ rtn;
+
+.global trap
+trap:
+ [--sp] = r0;
+ [--sp] = r1;
+ [--sp] = p0;
+ [--sp] = p1;
+ [--sp] = astat;
+ r0 = seqstat;
+ R0 <<= 26;
+ R0 >>= 26;
+ p0 = r0;
+ p1.l = EVTABLE;
+ p1.h = EVTABLE;
+ p0 = p1 + (p0 << 1);
+ r1 = W[p0] (Z);
+ p1 = r1;
+ jump (pc + p1);
+
+.global _EVENT1
+_EVENT1:
+ RAISE 14;
+ JUMP.S _EXIT;
+
+.global _EVENT2
+_EVENT2:
+ RAISE 14;
+ JUMP.S _EXIT;
+
+.global _EVENT3
+_EVENT3:
+ RAISE 14;
+ JUMP.S _EXIT;
+
+.global _EVENT4
+_EVENT4:
+ RAISE 14;
+ JUMP.S _EXIT;
+
+.global _EVENT5
+_EVENT5:
+ RAISE 14;
+ JUMP.S _EXIT;
+
+.global _EVENT6
+_EVENT6:
+ RAISE 14;
+ JUMP.S _EXIT;
+
+.global _EVENT7
+_EVENT7:
+ RAISE 15;
+ JUMP.S _EXIT;
+
+.global _EVENT8
+_EVENT8:
+ RAISE 14;
+ JUMP.S _EXIT;
+
+.global _EVENT9
+_EVENT9:
+ RAISE 14;
+ JUMP.S _EXIT;
+
+.global _EVENT10
+_EVENT10:
+ RAISE 14;
+ JUMP.S _EXIT;
+
+.global _EVENT11
+_EVENT11:
+ RAISE 14;
+ JUMP.S _EXIT;
+
+.global _EVENT12
+_EVENT12:
+ RAISE 14;
+ JUMP.S _EXIT;
+
+.global _EVENT13
+_EVENT13:
+ RAISE 14;
+ JUMP.S _EXIT;
+
+.global _EVENT14
+_EVENT14:
+/* RAISE 14; */
+ CALL _cplb_hdr;
+ JUMP.S _EXIT;
+
+.global _EVENT19
+_EVENT19:
+ RAISE 14;
+ JUMP.S _EXIT;
+
+.global _EVENT20
+_EVENT20:
+ RAISE 14;
+ JUMP.S _EXIT;
+
+.global _EVENT21
+_EVENT21:
+ RAISE 14;
+ JUMP.S _EXIT;
+
+.global _EXIT
+_EXIT:
+ ASTAT = [sp++];
+ p1 = [sp++];
+ p0 = [sp++];
+ r1 = [sp++];
+ r0 = [sp++];
+ RTX;
+
+EVTABLE:
+ .byte2 0x0000;
+ .byte2 0x0000;
+ .byte2 0x0000;
+ .byte2 0x0000;
+ .byte2 0x0000;
+ .byte2 0x0000;
+ .byte2 0x0000;
+ .byte2 0x0000;
+ .byte2 0x0000;
+ .byte2 0x0000;
+ .byte2 0x0000;
+ .byte2 0x0000;
+ .byte2 0x0000;
+ .byte2 0x0000;
+ .byte2 0x0000;
+ .byte2 0x0000;
+ .byte2 0x003E;
+ .byte2 0x0042;
+ .byte4 0x0000;
+ .byte4 0x0000;
+ .byte4 0x0000;
+ .byte4 0x0000;
+ .byte4 0x0000;
+ .byte4 0x0000;
+ .byte4 0x0000;
+ .byte2 0x0000;
+ .byte2 0x001E;
+ .byte2 0x0022;
+ .byte2 0x0032;
+ .byte2 0x002e;
+ .byte2 0x0002;
+ .byte2 0x0036;
+ .byte2 0x002A;
+ .byte2 0x001A;
+ .byte2 0x0016;
+ .byte2 0x000A;
+ .byte2 0x000E;
+ .byte2 0x0012;
+ .byte2 0x0006;
+ .byte2 0x0026;
+
+.global evt_rst
+evt_rst:
+ SAVE_CONTEXT
+ r0 = IRQ_RST;
+ r1 = RETN;
+ sp += -12;
+ call do_reset;
+ sp += 12;
+
+_evt_rst_exit:
+ rtn;
+
+irq_panic:
+ r0 = IRQ_EVX;
+ r1 = sp;
+ sp += -12;
+ call blackfin_irq_panic;
+ sp += 12;
+
+.global evt_ivhw
+evt_ivhw:
+ SAVE_CONTEXT
+ RAISE 14;
+
+_evt_ivhw_exit:
+ rti;
+
+.global evt_timer
+evt_timer:
+ SAVE_CONTEXT
+ r0 = IRQ_CORETMR;
+ sp += -12;
+ /* Polling method used now. */
+ /* call timer_int; */
+ sp += 12;
+ RESTORE_CONTEXT
+ rti;
+ nop;
+
+.global evt_evt7
+evt_evt7:
+ SAVE_CONTEXT
+ r0 = 7;
+ sp += -12;
+ call process_int;
+ sp += 12;
+
+evt_evt7_exit:
+ RESTORE_CONTEXT
+ rti;
+
+.global evt_evt8
+evt_evt8:
+ SAVE_CONTEXT
+ r0 = 8;
+ sp += -12;
+ call process_int;
+ sp += 12;
+
+evt_evt8_exit:
+ RESTORE_CONTEXT
+ rti;
+
+.global evt_evt9
+evt_evt9:
+ SAVE_CONTEXT
+ r0 = 9;
+ sp += -12;
+ call process_int;
+ sp += 12;
+
+evt_evt9_exit:
+ RESTORE_CONTEXT
+ rti;
+
+.global evt_evt10
+evt_evt10:
+ SAVE_CONTEXT
+ r0 = 10;
+ sp += -12;
+ call process_int;
+ sp += 12;
+
+evt_evt10_exit:
+ RESTORE_CONTEXT
+ rti;
+
+.global evt_evt11
+evt_evt11:
+ SAVE_CONTEXT
+ r0 = 11;
+ sp += -12;
+ call process_int;
+ sp += 12;
+
+evt_evt11_exit:
+ RESTORE_CONTEXT
+ rti;
+
+.global evt_evt12
+evt_evt12:
+ SAVE_CONTEXT
+ r0 = 12;
+ sp += -12;
+ call process_int;
+ sp += 12;
+evt_evt12_exit:
+ RESTORE_CONTEXT
+ rti;
+
+.global evt_evt13
+evt_evt13:
+ SAVE_CONTEXT
+ r0 = 13;
+ sp += -12;
+ call process_int;
+ sp += 12;
+
+evt_evt13_exit:
+ RESTORE_CONTEXT
+ rti;
+
+.global evt_system_call
+evt_system_call:
+ [--sp] = r0;
+ [--SP] = RETI;
+ r0 = [sp++];
+ r0 += 2;
+ [--sp] = r0;
+ RETI = [SP++];
+ r0 = [SP++];
+ SAVE_CONTEXT
+ sp += -12;
+ call display_excp;
+ sp += 12;
+ RESTORE_CONTEXT
+ RTI;
+
+evt_system_call_exit:
+ rti;
+
+.global evt_soft_int1
+evt_soft_int1:
+ [--sp] = r0;
+ [--SP] = RETI;
+ r0 = [sp++];
+ r0 += 2;
+ [--sp] = r0;
+ RETI = [SP++];
+ r0 = [SP++];
+ SAVE_CONTEXT
+ sp += -12;
+ call display_excp;
+ sp += 12;
+ RESTORE_CONTEXT
+ RTI;
+
+evt_soft_int1_exit:
+ rti;
diff --git a/cpu/bf533/interrupts.c b/cpu/bf533/interrupts.c
new file mode 100644
index 0000000000..df1a25ec75
--- /dev/null
+++ b/cpu/bf533/interrupts.c
@@ -0,0 +1,165 @@
+/*
+ * U-boot - interrupts.c Interrupt related routines
+ *
+ * Copyright (c) 2005 blackfin.uclinux.org
+ *
+ * This file is based on interrupts.c
+ * Copyright 1996 Roman Zippel
+ * Copyright 1999 D. Jeff Dionne <jeff@uclinux.org>
+ * Copyright 2000-2001 Lineo, Inc. D. Jefff Dionne <jeff@lineo.ca>
+ * Copyright 2002 Arcturus Networks Inc. MaTed <mated@sympatico.ca>
+ * Copyright 2003 Metrowerks/Motorola
+ * Copyright 2003 Bas Vermeulen <bas@buyways.nl>,
+ * BuyWays B.V. (www.buyways.nl)
+ *
+ * (C) Copyright 2000-2004
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/machdep.h>
+#include <asm/irq.h>
+#include <asm/cpu/defBF533.h>
+#include "cpu.h"
+
+static ulong timestamp;
+static ulong last_time;
+static int int_flag;
+
+int irq_flags; /* needed by asm-blackfin/system.h */
+
+/* Functions just to satisfy the linker */
+
+/*
+ * This function is derived from PowerPC code (read timebase as long long).
+ * On BF533 it just returns the timer value.
+ */
+unsigned long long get_ticks(void)
+{
+ return get_timer(0);
+}
+
+/*
+ * This function is derived from PowerPC code (timebase clock frequency).
+ * On BF533 it returns the number of timer ticks per second.
+ */
+ulong get_tbclk (void)
+{
+ ulong tbclk;
+
+ tbclk = CFG_HZ;
+ return tbclk;
+}
+
+void enable_interrupts(void)
+{
+ restore_flags(int_flag);
+}
+
+int disable_interrupts(void)
+{
+ save_and_cli(int_flag);
+ return 1;
+}
+
+int interrupt_init(void)
+{
+ return (0);
+}
+
+void udelay(unsigned long usec)
+{
+ unsigned long delay, start, stop;
+ unsigned long cclk;
+ cclk = (CONFIG_CCLK_HZ);
+
+ while ( usec > 1 ) {
+ /*
+ * how many clock ticks to delay?
+ * - request(in useconds) * clock_ticks(Hz) / useconds/second
+ */
+ if (usec < 1000) {
+ delay = (usec * (cclk/244)) >> 12 ;
+ usec = 0;
+ } else {
+ delay = (1000 * (cclk/244)) >> 12 ;
+ usec -= 1000;
+ }
+
+ asm volatile (" %0 = CYCLES;": "=g"(start));
+ do {
+ asm volatile (" %0 = CYCLES; ": "=g"(stop));
+ } while (stop - start < delay);
+ }
+
+ return;
+}
+
+void timer_init(void)
+{
+ *pTCNTL = 0x1;
+ *pTSCALE = 0x0;
+ *pTCOUNT = MAX_TIM_LOAD;
+ *pTPERIOD = MAX_TIM_LOAD;
+ *pTCNTL = 0x7;
+ asm("CSYNC;");
+
+ timestamp = 0;
+ last_time = 0;
+}
+
+/* Any network command or flash
+ * command is started get_timer shall
+ * be called before TCOUNT gets reset,
+ * to implement the accurate timeouts.
+ *
+ * How ever milliconds doesn't return
+ * the number that has been elapsed from
+ * the last reset.
+ *
+ * As get_timer is used in the u-boot
+ * only for timeouts this should be
+ * sufficient
+ */
+ulong get_timer(ulong base)
+{
+ ulong milisec;
+
+ /* Number of clocks elapsed */
+ ulong clocks = (MAX_TIM_LOAD - (*pTCOUNT));
+
+ /* Find if the TCOUNT is reset
+ timestamp gives the number of times
+ TCOUNT got reset */
+ if(clocks < last_time)
+ timestamp++;
+ last_time = clocks;
+
+ /* Get the number of milliseconds */
+ milisec = clocks/(CONFIG_CCLK_HZ / 1000);
+
+ /* Find the number of millisonds
+ that got elapsed before this TCOUNT
+ cycle */
+ milisec += timestamp * (MAX_TIM_LOAD/(CONFIG_CCLK_HZ / 1000));
+
+ return (milisec - base);
+}
diff --git a/cpu/bf533/ints.c b/cpu/bf533/ints.c
new file mode 100644
index 0000000000..859f4b2f09
--- /dev/null
+++ b/cpu/bf533/ints.c
@@ -0,0 +1,107 @@
+/*
+ * U-boot - ints.c Interrupt related routines
+ *
+ * Copyright (c) 2005 blackfin.uclinux.org
+ *
+ * This file is based on ints.c
+ *
+ * Apr18 2003, Changed by HuTao to support interrupt cascading for Blackfin
+ * drivers
+ *
+ * Copyright 1996 Roman Zippel
+ * Copyright 1999 D. Jeff Dionne <jeff@uclinux.org>
+ * Copyright 2000-2001 Lineo, Inc. D. Jefff Dionne <jeff@lineo.ca>
+ * Copyright 2002 Arcturus Networks Inc. MaTed <mated@sympatico.ca>
+ * Copyright 2003 Metrowerks/Motorola
+ *
+ * (C) Copyright 2000-2004
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <linux/stddef.h>
+#include <asm/system.h>
+#include <asm/irq.h>
+#include <asm/traps.h>
+#include <asm/io.h>
+#include <asm/errno.h>
+#include <asm/machdep.h>
+#include <asm/setup.h>
+#include <asm/blackfin.h>
+#include "cpu.h"
+
+void blackfin_irq_panic(int reason, struct pt_regs *regs)
+{
+ printf("\n\nException: IRQ 0x%x entered\n", reason);
+ printf("code=[0x%x], ", (unsigned int) (regs->seqstat & 0x3f));
+ printf("stack frame=0x%x, ", (unsigned int) regs);
+ printf("bad PC=0x%04x\n", (unsigned int) regs->pc);
+ dump(regs);
+ printf("Unhandled IRQ or exceptions!\n");
+ printf("Please reset the board \n");
+}
+
+void blackfin_init_IRQ(void)
+{
+ *(unsigned volatile long *) (SIC_IMASK) = SIC_UNMASK_ALL;
+ cli();
+#ifndef CONFIG_KGDB
+ *(unsigned volatile long *) (EVT_EMULATION_ADDR) = 0x0;
+#endif
+ *(unsigned volatile long *) (EVT_NMI_ADDR) =
+ (unsigned volatile long) evt_nmi;
+ *(unsigned volatile long *) (EVT_EXCEPTION_ADDR) =
+ (unsigned volatile long) trap;
+ *(unsigned volatile long *) (EVT_HARDWARE_ERROR_ADDR) =
+ (unsigned volatile long) evt_ivhw;
+ *(unsigned volatile long *) (EVT_RESET_ADDR) =
+ (unsigned volatile long) evt_rst;
+ *(unsigned volatile long *) (EVT_TIMER_ADDR) =
+ (unsigned volatile long) evt_timer;
+ *(unsigned volatile long *) (EVT_IVG7_ADDR) =
+ (unsigned volatile long) evt_evt7;
+ *(unsigned volatile long *) (EVT_IVG8_ADDR) =
+ (unsigned volatile long) evt_evt8;
+ *(unsigned volatile long *) (EVT_IVG9_ADDR) =
+ (unsigned volatile long) evt_evt9;
+ *(unsigned volatile long *) (EVT_IVG10_ADDR) =
+ (unsigned volatile long) evt_evt10;
+ *(unsigned volatile long *) (EVT_IVG11_ADDR) =
+ (unsigned volatile long) evt_evt11;
+ *(unsigned volatile long *) (EVT_IVG12_ADDR) =
+ (unsigned volatile long) evt_evt12;
+ *(unsigned volatile long *) (EVT_IVG13_ADDR) =
+ (unsigned volatile long) evt_evt13;
+ *(unsigned volatile long *) (EVT_IVG14_ADDR) =
+ (unsigned volatile long) evt_system_call;
+ *(unsigned volatile long *) (EVT_IVG15_ADDR) =
+ (unsigned volatile long) evt_soft_int1;
+ *(volatile unsigned long *) ILAT = 0;
+ asm("csync;");
+ sti();
+ *(volatile unsigned long *) IMASK = 0xffbf;
+ asm("csync;");
+}
+
+void display_excp(void)
+{
+ printf("Exception!\n");
+}
diff --git a/cpu/bf533/serial.c b/cpu/bf533/serial.c
new file mode 100644
index 0000000000..7b43ffd188
--- /dev/null
+++ b/cpu/bf533/serial.c
@@ -0,0 +1,195 @@
+/*
+ * U-boot - serial.c Serial driver for BF533
+ *
+ * Copyright (c) 2005 blackfin.uclinux.org
+ *
+ * This file is based on
+ * bf533_serial.c: Serial driver for BlackFin BF533 DSP internal UART.
+ * Copyright (c) 2003 Bas Vermeulen <bas@buyways.nl>,
+ * BuyWays B.V. (www.buyways.nl)
+ *
+ * Based heavily on blkfinserial.c
+ * blkfinserial.c: Serial driver for BlackFin DSP internal USRTs.
+ * Copyright(c) 2003 Metrowerks <mwaddel@metrowerks.com>
+ * Copyright(c) 2001 Tony Z. Kou <tonyko@arcturusnetworks.com>
+ * Copyright(c) 2001-2002 Arcturus Networks Inc. <www.arcturusnetworks.com>
+ *
+ * Based on code from 68328 version serial driver imlpementation which was:
+ * Copyright (C) 1995 David S. Miller <davem@caip.rutgers.edu>
+ * Copyright (C) 1998 Kenneth Albanowski <kjahds@kjahds.com>
+ * Copyright (C) 1998, 1999 D. Jeff Dionne <jeff@uclinux.org>
+ * Copyright (C) 1999 Vladimir Gurevich <vgurevic@cisco.com>
+ *
+ * (C) Copyright 2000-2004
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/irq.h>
+#include <asm/system.h>
+#include <asm/segment.h>
+#include <asm/bitops.h>
+#include <asm/delay.h>
+#include <asm/uaccess.h>
+#include "bf533_serial.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+unsigned long pll_div_fact;
+
+void calc_baud(void)
+{
+ unsigned char i;
+ int temp;
+
+ for(i = 0; i < sizeof(baud_table)/sizeof(int); i++) {
+ temp = CONFIG_SCLK_HZ/(baud_table[i]*8);
+ if ( temp && 0x1 == 1 ) {
+ temp++;
+ }
+ temp = temp/2;
+ hw_baud_table[i].dl_high = (temp >> 8)& 0xFF;
+ hw_baud_table[i].dl_low = (temp) & 0xFF;
+ }
+}
+
+void serial_setbrg(void)
+{
+ int i;
+
+ calc_baud();
+
+ for (i = 0; i < sizeof(baud_table) / sizeof(int); i++) {
+ if (gd->baudrate == baud_table[i])
+ break;
+ }
+
+ /* Enable UART */
+ *pUART_GCTL |= UART_GCTL_UCEN;
+ asm("ssync;");
+
+ /* Set DLAB in LCR to Access DLL and DLH */
+ ACCESS_LATCH;
+ asm("ssync;");
+
+ *pUART_DLL = hw_baud_table[i].dl_low;
+ asm("ssync;");
+ *pUART_DLH = hw_baud_table[i].dl_high;
+ asm("ssync;");
+
+ /* Clear DLAB in LCR to Access THR RBR IER */
+ ACCESS_PORT_IER;
+ asm("ssync;");
+
+ /* Enable ERBFI and ELSI interrupts
+ * to poll SIC_ISR register*/
+ *pUART_IER = UART_IER_ELSI | UART_IER_ERBFI | UART_IER_ETBEI;
+ asm("ssync;");
+
+ /* Set LCR to Word Lengh 8-bit word select */
+ *pUART_LCR = UART_LCR_WLS8;
+ asm("ssync;");
+
+ return;
+}
+
+int serial_init(void)
+{
+ serial_setbrg();
+ return (0);
+}
+
+void serial_putc(const char c)
+{
+ if ((*pUART_LSR) & UART_LSR_TEMT)
+ {
+ if (c == '\n')
+ serial_putc('\r');
+
+ local_put_char(c);
+ }
+
+ while (!((*pUART_LSR) & UART_LSR_TEMT))
+ SYNC_ALL;
+
+ return;
+}
+
+int serial_tstc(void)
+{
+ if (*pUART_LSR & UART_LSR_DR)
+ return 1;
+ else
+ return 0;
+}
+
+int serial_getc(void)
+{
+ unsigned short uart_lsr_val, uart_rbr_val;
+ unsigned long isr_val;
+ int ret;
+
+ /* Poll for RX Interrupt */
+ while (!((isr_val = *(volatile unsigned long *)SIC_ISR) & IRQ_UART_RX_BIT));
+ asm("csync;");
+
+ uart_lsr_val = *pUART_LSR; /* Clear status bit */
+ uart_rbr_val = *pUART_RBR; /* getc() */
+
+ if (isr_val & IRQ_UART_ERROR_BIT) {
+ ret = -1;
+ }
+ else
+ {
+ ret = uart_rbr_val & 0xff;
+ }
+
+ return ret;
+}
+
+void serial_puts(const char *s)
+{
+ while (*s) {
+ serial_putc(*s++);
+ }
+}
+
+static void local_put_char(char ch)
+{
+ int flags = 0;
+ unsigned long isr_val;
+
+ save_and_cli(flags);
+
+ /* Poll for TX Interruput */
+ while (!((isr_val = *pSIC_ISR) & IRQ_UART_TX_BIT));
+ asm("csync;");
+
+ *pUART_THR = ch; /* putc() */
+
+ if (isr_val & IRQ_UART_ERROR_BIT) {
+ printf("?");
+ }
+
+ restore_flags(flags);
+
+ return ;
+}
diff --git a/cpu/bf533/start.S b/cpu/bf533/start.S
new file mode 100644
index 0000000000..6d585751ab
--- /dev/null
+++ b/cpu/bf533/start.S
@@ -0,0 +1,435 @@
+/*
+ * U-boot - start.S Startup file of u-boot for BF533
+ *
+ * Copyright (c) 2005 blackfin.uclinux.org
+ *
+ * This file is based on head.S
+ * Copyright (c) 2003 Metrowerks/Motorola
+ * Copyright (C) 1998 D. Jeff Dionne <jeff@ryeham.ee.ryerson.ca>,
+ * Kenneth Albanowski <kjahds@kjahds.com>,
+ * The Silver Hammer Group, Ltd.
+ * (c) 1995, Dionne & Associates
+ * (c) 1995, DKG Display Tech.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * Note: A change in this file subsequently requires a change in
+ * board/$(board_name)/config.mk for a valid u-boot.bin
+ */
+
+#define ASSEMBLY
+
+#include <linux/config.h>
+#include <asm/blackfin.h>
+#include <config.h>
+#include <asm/mem_init.h>
+
+#if (CONFIG_CCLK_DIV == 1)
+#define CONFIG_CCLK_ACT_DIV CCLK_DIV1
+#endif
+#if (CONFIG_CCLK_DIV == 2)
+#define CONFIG_CCLK_ACT_DIV CCLK_DIV2
+#endif
+#if (CONFIG_CCLK_DIV == 4)
+#define CONFIG_CCLK_ACT_DIV CCLK_DIV4
+#endif
+#if (CONFIG_CCLK_DIV == 8)
+#define CONFIG_CCLK_ACT_DIV CCLK_DIV8
+#endif
+#ifndef CONFIG_CCLK_ACT_DIV
+#define CONFIG_CCLK_ACT_DIV CONFIG_CCLK_DIV_not_defined_properly
+#endif
+
+.global _stext;
+.global __bss_start;
+.global start;
+.global _start;
+.global _rambase;
+.global _ramstart;
+.global _ramend;
+.global _bf533_data_dest;
+.global _bf533_data_size;
+.global edata;
+.global _initialize;
+.global _exit;
+.global flashdataend;
+
+.text
+_start:
+start:
+_stext:
+
+ R0 = 0x30;
+ SYSCFG = R0;
+ SSYNC;
+
+ /* As per HW reference manual DAG registers,
+ * DATA and Address resgister shall be zero'd
+ * in initialization, after a reset state
+ */
+ r1 = 0; /* Data registers zero'd */
+ r2 = 0;
+ r3 = 0;
+ r4 = 0;
+ r5 = 0;
+ r6 = 0;
+ r7 = 0;
+
+ p0 = 0; /* Address registers zero'd */
+ p1 = 0;
+ p2 = 0;
+ p3 = 0;
+ p4 = 0;
+ p5 = 0;
+
+ i0 = 0; /* DAG Registers zero'd */
+ i1 = 0;
+ i2 = 0;
+ i3 = 0;
+ m0 = 0;
+ m1 = 0;
+ m3 = 0;
+ m3 = 0;
+ l0 = 0;
+ l1 = 0;
+ l2 = 0;
+ l3 = 0;
+ b0 = 0;
+ b1 = 0;
+ b2 = 0;
+ b3 = 0;
+
+ /* Set loop counters to zero, to make sure that
+ * hw loops are disabled.
+ */
+ lc0 = 0;
+ lc1 = 0;
+
+ SSYNC;
+
+ /* Check soft reset status */
+ p0.h = SWRST >> 16;
+ p0.l = SWRST & 0xFFFF;
+ r0.l = w[p0];
+
+ cc = bittst(r0, 15);
+ if !cc jump no_soft_reset;
+
+ /* Clear Soft reset */
+ r0 = 0x0000;
+ w[p0] = r0;
+ ssync;
+
+no_soft_reset:
+ nop;
+
+ /* Clear EVT registers */
+ p0.h = (EVT_EMULATION_ADDR >> 16);
+ p0.l = (EVT_EMULATION_ADDR & 0xFFFF);
+ p0 += 8;
+ p1 = 14;
+ r1 = 0;
+ LSETUP(4,4) lc0 = p1;
+ [ p0 ++ ] = r1;
+
+ /*
+ * Set PLL_CTL
+ * - [14:09] = MSEL[5:0] : CLKIN / VCO multiplication factors
+ * - [8] = BYPASS : BYPASS the PLL, run CLKIN into CCLK/SCLK
+ * - [7] = output delay (add 200ps of delay to mem signals)
+ * - [6] = input delay (add 200ps of input delay to mem signals)
+ * - [5] = PDWN : 1=All Clocks off
+ * - [3] = STOPCK : 1=Core Clock off
+ * - [1] = PLL_OFF : 1=Disable Power to PLL
+ * - [0] = DF : 1=Pass CLKIN/2 to PLL / 0=Pass CLKIN to PLL
+ * all other bits set to zero
+ */
+
+ r0 = CONFIG_VCO_MULT; /* Load the VCO multiplier */
+ r0 = r0 << 9; /* Shift it over */
+ r1 = CONFIG_CLKIN_HALF; /* Do we need to divide CLKIN by 2? */
+ r0 = r1 | r0;
+ r1 = CONFIG_PLL_BYPASS; /* Bypass the PLL? */
+ r1 = r1 << 8; /* Shift it over */
+ r0 = r1 | r0; /* add them all together */
+
+ p0.h = (PLL_CTL >> 16);
+ p0.l = (PLL_CTL & 0xFFFF); /* Load the address */
+ cli r2; /* Disable interrupts */
+ w[p0] = r0; /* Set the value */
+ idle; /* Wait for the PLL to stablize */
+ sti r2; /* Enable interrupts */
+ ssync;
+
+ /*
+ * Turn on the CYCLES COUNTER
+ */
+ r2 = SYSCFG;
+ BITSET (r2,1);
+ SYSCFG = r2;
+
+ /* Configure SCLK & CCLK Dividers */
+ r0 = CONFIG_CCLK_ACT_DIV | CONFIG_SCLK_DIV;
+ p0.h = (PLL_DIV >> 16);
+ p0.l = (PLL_DIV & 0xFFFF);
+ w[p0] = r0;
+ ssync;
+
+wait_for_pll_stab:
+ p0.h = (PLL_STAT >> 16);
+ p0.l = (PLL_STAT & 0xFFFF);
+ r0.l = w[p0];
+ cc = bittst(r0,5);
+ if !cc jump wait_for_pll_stab;
+
+ /* Configure SDRAM if SDRAM is already not enabled */
+ p0.l = (EBIU_SDSTAT & 0xFFFF);
+ p0.h = (EBIU_SDSTAT >> 16);
+ r0.l = w[p0];
+ cc = bittst(r0, 3);
+ if !cc jump skip_sdram_enable;
+
+ /* SDRAM initialization */
+ p0.l = (EBIU_SDGCTL & 0xFFFF);
+ p0.h = (EBIU_SDGCTL >> 16); /* SDRAM Memory Global Control Register */
+ r0.h = (mem_SDGCTL >> 16);
+ r0.l = (mem_SDGCTL & 0xFFFF);
+ [p0] = r0;
+ ssync;
+
+ p0.l = (EBIU_SDBCTL & 0xFFFF);
+ p0.h = (EBIU_SDBCTL >> 16); /* SDRAM Memory Bank Control Register */
+ r0 = mem_SDBCTL;
+ w[p0] = r0.l;
+ ssync;
+
+ p0.l = (EBIU_SDRRC & 0xFFFF);
+ p0.h = (EBIU_SDRRC >> 16); /* SDRAM Refresh Rate Control Register */
+ r0 = mem_SDRRC;
+ w[p0] = r0.l;
+ ssync;
+
+skip_sdram_enable:
+ nop;
+
+#ifndef CFG_NO_FLASH
+ /* relocate into to RAM */
+ p1.l = (CFG_FLASH_BASE & 0xffff);
+ p1.h = (CFG_FLASH_BASE >> 16);
+ p2.l = (CFG_MONITOR_BASE & 0xffff);
+ p2.h = (CFG_MONITOR_BASE >> 16);
+ r0.l = (CFG_MONITOR_LEN & 0xffff);
+ r0.h = (CFG_MONITOR_LEN >> 16);
+loop1:
+ r1 = [p1];
+ [p2] = r1;
+ p3=0x4;
+ p1=p1+p3;
+ p2=p2+p3;
+ r2=0x4;
+ r0=r0-r2;
+ cc=r0==0x0;
+ if !cc jump loop1;
+#endif
+ /*
+ * configure STACK
+ */
+ r0.h = (CONFIG_STACKBASE >> 16);
+ r0.l = (CONFIG_STACKBASE & 0xFFFF);
+ sp = r0;
+ fp = sp;
+
+ /*
+ * This next section keeps the processor in supervisor mode
+ * during kernel boot. Switches to user mode at end of boot.
+ * See page 3-9 of Hardware Reference manual for documentation.
+ */
+
+ /* To keep ourselves in the supervisor mode */
+ p0.l = (EVT_IVG15_ADDR & 0xFFFF);
+ p0.h = (EVT_IVG15_ADDR >> 16);
+
+ p1.l = _real_start;
+ p1.h = _real_start;
+ [p0] = p1;
+
+ p0.l = (IMASK & 0xFFFF);
+ p0.h = (IMASK >> 16);
+ r0 = IVG15_POS;
+ [p0] = r0;
+ raise 15;
+ p0.l = WAIT_HERE;
+ p0.h = WAIT_HERE;
+ reti = p0;
+ rti;
+
+WAIT_HERE:
+ jump WAIT_HERE;
+
+.global _real_start;
+_real_start:
+ [ -- sp ] = reti;
+
+#ifdef CONFIG_EZKIT533
+ p0.l = (WDOG_CTL & 0xFFFF);
+ p0.h = (WDOG_CTL >> 16);
+ r0 = WATCHDOG_DISABLE(z);
+ w[p0] = r0;
+#endif
+
+ /* Code for initializing Async mem banks */
+ p2.h = (EBIU_AMBCTL1 >> 16);
+ p2.l = (EBIU_AMBCTL1 & 0xFFFF);
+ r0.h = (AMBCTL1VAL >> 16);
+ r0.l = (AMBCTL1VAL & 0xFFFF);
+ [p2] = r0;
+ ssync;
+
+ p2.h = (EBIU_AMBCTL0 >> 16);
+ p2.l = (EBIU_AMBCTL0 & 0xFFFF);
+ r0.h = (AMBCTL0VAL >> 16);
+ r0.l = (AMBCTL0VAL & 0xFFFF);
+ [p2] = r0;
+ ssync;
+
+ p2.h = (EBIU_AMGCTL >> 16);
+ p2.l = (EBIU_AMGCTL & 0xffff);
+ r0 = AMGCTLVAL;
+ w[p2] = r0;
+ ssync;
+
+ /* DMA reset code to Hi of L1 SRAM */
+copy:
+ P1.H = hi(SYSMMR_BASE); /* P1 Points to the beginning of SYSTEM MMR Space */
+ P1.L = lo(SYSMMR_BASE);
+
+ R0.H = reset_start; /* Source Address (high) */
+ R0.L = reset_start; /* Source Address (low) */
+ R1.H = reset_end;
+ R1.L = reset_end;
+ R2 = R1 - R0; /* Count */
+ R1.H = hi(L1_ISRAM); /* Destination Address (high) */
+ R1.L = lo(L1_ISRAM); /* Destination Address (low) */
+ R3.L = DMAEN; /* Source DMAConfig Value (8-bit words) */
+ R4.L = (DI_EN | WNR | DMAEN); /* Destination DMAConfig Value (8-bit words) */
+
+DMA:
+ R6 = 0x1 (Z);
+ W[P1+OFFSET_(MDMA_S0_X_MODIFY)] = R6; /* Source Modify = 1 */
+ W[P1+OFFSET_(MDMA_D0_X_MODIFY)] = R6; /* Destination Modify = 1 */
+
+ [P1+OFFSET_(MDMA_S0_START_ADDR)] = R0; /* Set Source Base Address */
+ W[P1+OFFSET_(MDMA_S0_X_COUNT)] = R2; /* Set Source Count */
+ /* Set Source DMAConfig = DMA Enable,
+ Memory Read, 8-Bit Transfers, 1-D DMA, Flow - Stop */
+ W[P1+OFFSET_(MDMA_S0_CONFIG)] = R3;
+
+ [P1+OFFSET_(MDMA_D0_START_ADDR)] = R1; /* Set Destination Base Address */
+ W[P1+OFFSET_(MDMA_D0_X_COUNT)] = R2; /* Set Destination Count */
+ /* Set Destination DMAConfig = DMA Enable,
+ Memory Write, 8-Bit Transfers, 1-D DMA, Flow - Stop, IOC */
+ W[P1+OFFSET_(MDMA_D0_CONFIG)] = R4;
+
+ IDLE; /* Wait for DMA to Complete */
+
+ R0 = 0x1;
+ W[P1+OFFSET_(MDMA_D0_IRQ_STATUS)] = R0; /* Write 1 to clear DMA interrupt */
+
+ /* DMA reset code to DATA BANK A which uses this port
+ * to avoid following problem
+ * " Data from a Data Cache fill can be corrupoted after or during
+ * instruction DMA if certain core stalls exist"
+ */
+
+copy_as_data:
+ R0.H = reset_start; /* Source Address (high) */
+ R0.L = reset_start; /* Source Address (low) */
+ R1.H = reset_end;
+ R1.L = reset_end;
+ R2 = R1 - R0; /* Count */
+ R1.H = hi(DATA_BANKA_SRAM); /* Destination Address (high) */
+ R1.L = lo(DATA_BANKA_SRAM); /* Destination Address (low) */
+ R3.L = DMAEN; /* Source DMAConfig Value (8-bit words) */
+ R4.L = (DI_EN | WNR | DMAEN); /* Destination DMAConfig Value (8-bit words) */
+
+DMA_DATA:
+ R6 = 0x1 (Z);
+ W[P1+OFFSET_(MDMA_S0_X_MODIFY)] = R6; /* Source Modify = 1 */
+ W[P1+OFFSET_(MDMA_D0_X_MODIFY)] = R6; /* Destination Modify = 1 */
+
+ [P1+OFFSET_(MDMA_S0_START_ADDR)] = R0; /* Set Source Base Address */
+ W[P1+OFFSET_(MDMA_S0_X_COUNT)] = R2; /* Set Source Count */
+ /* Set Source DMAConfig = DMA Enable,
+ Memory Read, 8-Bit Transfers, 1-D DMA, Flow - Stop */
+ W[P1+OFFSET_(MDMA_S0_CONFIG)] = R3;
+
+ [P1+OFFSET_(MDMA_D0_START_ADDR)] = R1; /* Set Destination Base Address */
+ W[P1+OFFSET_(MDMA_D0_X_COUNT)] = R2; /* Set Destination Count */
+ /* Set Destination DMAConfig = DMA Enable,
+ Memory Write, 8-Bit Transfers, 1-D DMA, Flow - Stop, IOC */
+ W[P1+OFFSET_(MDMA_D0_CONFIG)] = R4;
+
+ IDLE; /* Wait for DMA to Complete */
+
+ R0 = 0x1;
+ W[P1+OFFSET_(MDMA_D0_IRQ_STATUS)] = R0; /* Write 1 to clear DMA interrupt */
+
+copy_end: nop;
+
+ /* Initialize BSS Section with 0 s */
+ p1.l = __bss_start;
+ p1.h = __bss_start;
+ p2.l = _end;
+ p2.h = _end;
+ r1 = p1;
+ r2 = p2;
+ r3 = r2 - r1;
+ r3 = r3 >> 2;
+ p3 = r3;
+ lsetup (_clear_bss, _clear_bss_end ) lc1 = p3;
+ CC = p2<=p1;
+ if CC jump _clear_bss_skip;
+ r0 = 0;
+_clear_bss:
+_clear_bss_end:
+ [p1++] = r0;
+_clear_bss_skip:
+
+ p0.l = _start1;
+ p0.h = _start1;
+ jump (p0);
+
+reset_start:
+ p0.h = WDOG_CNT >> 16;
+ p0.l = WDOG_CNT & 0xffff;
+ r0 = 0x0010;
+ w[p0] = r0;
+ p0.h = WDOG_CTL >> 16;
+ p0.l = WDOG_CTL & 0xffff;
+ r0 = 0x0000;
+ w[p0] = r0;
+reset_wait:
+ jump reset_wait;
+
+reset_end: nop;
+
+_exit:
+ jump.s _exit;
diff --git a/cpu/bf533/start1.S b/cpu/bf533/start1.S
new file mode 100644
index 0000000000..6f48124055
--- /dev/null
+++ b/cpu/bf533/start1.S
@@ -0,0 +1,38 @@
+/*
+ * U-boot - start1.S Code running out of RAM after relocation
+ *
+ * Copyright (c) 2005 blackfin.uclinux.org
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#define ASSEMBLY
+#include <linux/config.h>
+#include <asm/blackfin.h>
+#include <config.h>
+
+.global start1;
+.global _start1;
+
+.text
+_start1:
+start1:
+ sp += -12;
+ call board_init_f;
+ sp += 12;
diff --git a/cpu/bf533/traps.c b/cpu/bf533/traps.c
new file mode 100644
index 0000000000..37470d583e
--- /dev/null
+++ b/cpu/bf533/traps.c
@@ -0,0 +1,73 @@
+/*
+ * U-boot - traps.c Routines related to interrupts and exceptions
+ *
+ * Copyright (c) 2005 blackfin.uclinux.org
+ *
+ * This file is based on
+ * No original Copyright holder listed,
+ * Probabily original (C) Roman Zippel (assigned DJD, 1999)
+ *
+ * Copyright 2003 Metrowerks - for Blackfin
+ * Copyright 2000-2001 Lineo, Inc. D. Jeff Dionne <jeff@lineo.ca>
+ * Copyright 1999-2000 D. Jeff Dionne, <jeff@uclinux.org>
+ *
+ * (C) Copyright 2000-2004
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <linux/types.h>
+#include <asm/errno.h>
+#include <asm/irq.h>
+#include <asm/system.h>
+#include <asm/traps.h>
+#include <asm/page.h>
+#include <asm/machdep.h>
+#include "cpu.h"
+
+void init_IRQ(void)
+{
+ blackfin_init_IRQ();
+ return;
+}
+
+void process_int(unsigned long vec, struct pt_regs *fp)
+{
+ return;
+}
+
+void dump(struct pt_regs *fp)
+{
+ printf("PC: %08lx\n", fp->pc);
+ printf("SEQSTAT: %08lx SP: %08lx\n", (long) fp->seqstat,
+ (long) fp);
+ printf("R0: %08lx R1: %08lx R2: %08lx R3: %08lx\n",
+ fp->r0, fp->r1, fp->r2, fp->r3);
+ printf("R4: %08lx R5: %08lx R6: %08lx R7: %08lx\n",
+ fp->r4, fp->r5, fp->r6, fp->r7);
+ printf("P0: %08lx P1: %08lx P2: %08lx P3: %08lx\n",
+ fp->p0, fp->p1, fp->p2, fp->p3);
+ printf("P4: %08lx P5: %08lx FP: %08lx\n", fp->p4, fp->p5,
+ fp->fp);
+ printf("A0.w: %08lx A0.x: %08lx A1.w: %08lx A1.x: %08lx\n",
+ fp->a0w, fp->a0x, fp->a1w, fp->a1x);
+ printf("\n");
+}
diff --git a/cpu/i386/sc520.c b/cpu/i386/sc520.c
index 689e775c93..c83f0bb6cf 100644
--- a/cpu/i386/sc520.c
+++ b/cpu/i386/sc520.c
@@ -36,6 +36,8 @@
#include <asm/pci.h>
#include <asm/ic/sc520.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/*
* utility functions for boards based on the AMD sc520
*
@@ -93,8 +95,6 @@ u32 read_mmcr_long(u16 mmcr)
void init_sc520(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
/* Set the UARTxCTL register at it's slower,
* baud clock giving us a 1.8432 MHz reference
*/
@@ -139,7 +139,6 @@ void init_sc520(void)
unsigned long init_sc520_dram(void)
{
- DECLARE_GLOBAL_DATA_PTR;
bd_t *bd = gd->bd;
u32 dram_present=0;
diff --git a/cpu/i386/serial.c b/cpu/i386/serial.c
index db13008ba5..e7299a7ebb 100644
--- a/cpu/i386/serial.c
+++ b/cpu/i386/serial.c
@@ -55,6 +55,8 @@
#include <malloc.h>
#endif
+DECLARE_GLOBAL_DATA_PTR;
+
#define UART_RBR 0x00
#define UART_THR 0x00
#define UART_IER 0x01
@@ -126,13 +128,9 @@ static int serial_div(int baudrate)
int serial_init(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
volatile char val;
-
int bdiv = serial_div(gd->baudrate);
-
outb(0x80, UART0_BASE + UART_LCR); /* set DLAB bit */
outb(bdiv, UART0_BASE + UART_DLL); /* set baudrate divisor */
outb(bdiv >> 8, UART0_BASE + UART_DLM);/* set baudrate divisor */
@@ -150,8 +148,6 @@ int serial_init(void)
void serial_setbrg(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
unsigned short bdiv;
bdiv = serial_div(gd->baudrate);
@@ -410,8 +406,6 @@ int serial_buffered_tstc(void)
#if (CONFIG_KGDB_SER_INDEX & 2)
void kgdb_serial_init(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
volatile char val;
bdiv = serial_div (CONFIG_KGDB_BAUDRATE);
diff --git a/cpu/ixp/config.mk b/cpu/ixp/config.mk
index eddda39e0f..a71a20b822 100644
--- a/cpu/ixp/config.mk
+++ b/cpu/ixp/config.mk
@@ -27,7 +27,7 @@ BIG_ENDIAN = y
PLATFORM_RELFLAGS += -fno-strict-aliasing -fno-common -ffixed-r8 \
-msoft-float -mbig-endian
-PLATFORM_CPPFLAGS += -mbig-endian -march=armv4 -mtune=strongarm1100
+PLATFORM_CPPFLAGS += -mbig-endian -march=armv5te -mtune=strongarm1100
# =========================================================================
#
# Supply options according to compiler version
diff --git a/cpu/ixp/cpu.c b/cpu/ixp/cpu.c
index 9383473141..7f9f3344b3 100644
--- a/cpu/ixp/cpu.c
+++ b/cpu/ixp/cpu.c
@@ -34,19 +34,60 @@
#include <command.h>
#include <asm/arch/ixp425.h>
+ulong loops_per_jiffy;
+
+#ifdef CONFIG_USE_IRQ
+DECLARE_GLOBAL_DATA_PTR;
+#endif
+
+#if defined(CONFIG_DISPLAY_CPUINFO)
+int print_cpuinfo (void)
+{
+ unsigned long id;
+ int speed = 0;
+
+ asm ("mrc p15, 0, %0, c0, c0, 0":"=r" (id));
+
+ puts("CPU: Intel IXP425 at ");
+ switch ((id & 0x000003f0) >> 4) {
+ case 0x1c:
+ loops_per_jiffy = 887467;
+ speed = 533;
+ break;
+
+ case 0x1d:
+ loops_per_jiffy = 666016;
+ speed = 400;
+ break;
+
+ case 0x1f:
+ loops_per_jiffy = 442901;
+ speed = 266;
+ break;
+ }
+
+ if (speed)
+ printf("%d MHz\n", speed);
+ else
+ puts("unknown revision\n");
+
+ return 0;
+}
+#endif /* CONFIG_DISPLAY_CPUINFO */
+
int cpu_init (void)
{
/*
* setup up stacks if necessary
*/
#ifdef CONFIG_USE_IRQ
- DECLARE_GLOBAL_DATA_PTR;
-
IRQ_STACK_START = _armboot_start - CFG_MALLOC_LEN - CFG_GBL_DATA_SIZE - 4;
FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ;
#endif
+#if (CONFIG_COMMANDS & CFG_CMD_PCI) || defined (CONFIG_PCI)
pci_init();
+#endif
return 0;
}
@@ -152,3 +193,25 @@ void pci_init(void)
return;
}
*/
+
+#ifdef CONFIG_BOOTCOUNT_LIMIT
+
+void bootcount_store (ulong a)
+{
+ volatile ulong *save_addr = (volatile ulong *)(CFG_BOOTCOUNT_ADDR);
+
+ save_addr[0] = a;
+ save_addr[1] = BOOTCOUNT_MAGIC;
+}
+
+ulong bootcount_load (void)
+{
+ volatile ulong *save_addr = (volatile ulong *)(CFG_BOOTCOUNT_ADDR);
+
+ if (save_addr[1] != BOOTCOUNT_MAGIC)
+ return 0;
+ else
+ return save_addr[0];
+}
+
+#endif /* CONFIG_BOOTCOUNT_LIMIT */
diff --git a/cpu/ixp/interrupts.c b/cpu/ixp/interrupts.c
index e260dea0ed..2dd9561e1a 100644
--- a/cpu/ixp/interrupts.c
+++ b/cpu/ixp/interrupts.c
@@ -1,5 +1,7 @@
-/* vi: set ts=8 sw=8 noet: */
/*
+ * (C) Copyright 2006
+ * Stefan Roese, DENX Software Engineering, sr@denx.de.
+ *
* (C) Copyright 2002
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
* Marius Groeger <mgroeger@sysgo.de>
@@ -31,22 +33,85 @@
#include <asm/arch/ixp425.h>
#ifdef CONFIG_USE_IRQ
+/*
+ * When interrupts are enabled, use timer 2 for time/delay generation...
+ */
+
+#define FREQ 66666666
+#define CLOCK_TICK_RATE (((FREQ / CFG_HZ & ~IXP425_OST_RELOAD_MASK) + 1) * CFG_HZ)
+#define LATCH ((CLOCK_TICK_RATE + CFG_HZ/2) / CFG_HZ) /* For divider */
+
+struct _irq_handler {
+ void *m_data;
+ void (*m_func)( void *data);
+};
+
+static struct _irq_handler IRQ_HANDLER[N_IRQS];
+
+static volatile ulong timestamp;
+
/* enable IRQ/FIQ interrupts */
-void enable_interrupts (void)
+void enable_interrupts(void)
{
-#error: interrupts not implemented yet
+ unsigned long temp;
+ __asm__ __volatile__("mrs %0, cpsr\n"
+ "bic %0, %0, #0x80\n"
+ "msr cpsr_c, %0"
+ : "=r" (temp)
+ :
+ : "memory");
}
-
/*
* disable IRQ/FIQ interrupts
* returns true if interrupts had been enabled before we disabled them
*/
-int disable_interrupts (void)
+int disable_interrupts(void)
{
-#error: interrupts not implemented yet
+ unsigned long old,temp;
+ __asm__ __volatile__("mrs %0, cpsr\n"
+ "orr %1, %0, #0x80\n"
+ "msr cpsr_c, %1"
+ : "=r" (old), "=r" (temp)
+ :
+ : "memory");
+ return (old & 0x80) == 0;
}
-#else
+
+static void default_isr(void *data)
+{
+ printf("default_isr(): called for IRQ %d, Interrupt Status=%x PR=%x\n",
+ (int)data, *IXP425_ICIP, *IXP425_ICIH);
+}
+
+static int next_irq(void)
+{
+ return (((*IXP425_ICIH & 0x000000fc) >> 2) - 1);
+}
+
+static void timer_isr(void *data)
+{
+ unsigned int *pTime = (unsigned int *)data;
+
+ (*pTime)++;
+
+ /*
+ * Reset IRQ source
+ */
+ *IXP425_OSST = IXP425_OSST_TIMER_2_PEND;
+}
+
+ulong get_timer (ulong base)
+{
+ return timestamp - base;
+}
+
+void reset_timer (void)
+{
+ timestamp = 0;
+}
+
+#else /* #ifdef CONFIG_USE_IRQ */
void enable_interrupts (void)
{
return;
@@ -55,8 +120,7 @@ int disable_interrupts (void)
{
return 0;
}
-#endif
-
+#endif /* #ifdef CONFIG_USE_IRQ */
void bad_mode (void)
{
@@ -140,19 +204,46 @@ void do_fiq (struct pt_regs *pt_regs)
{
printf ("fast interrupt request\n");
show_regs (pt_regs);
- bad_mode ();
+ printf("IRQ=%08lx FIQ=%08lx\n", *IXP425_ICIH, *IXP425_ICFH);
}
void do_irq (struct pt_regs *pt_regs)
{
+#ifdef CONFIG_USE_IRQ
+ int irq = next_irq();
+
+ IRQ_HANDLER[irq].m_func(IRQ_HANDLER[irq].m_data);
+#else
printf ("interrupt request\n");
show_regs (pt_regs);
bad_mode ();
+#endif
}
-
int interrupt_init (void)
{
- /* nothing happens here - we don't setup any IRQs */
+#ifdef CONFIG_USE_IRQ
+ int i;
+
+ /* install default interrupt handlers */
+ for (i = 0; i < N_IRQS; i++) {
+ IRQ_HANDLER[i].m_data = (void *)i;
+ IRQ_HANDLER[i].m_func = default_isr;
+ }
+
+ /* install interrupt handler for timer */
+ IRQ_HANDLER[IXP425_TIMER_2_IRQ].m_data = (void *)&timestamp;
+ IRQ_HANDLER[IXP425_TIMER_2_IRQ].m_func = timer_isr;
+
+ /* setup the Timer counter value */
+ *IXP425_OSRT2 = (LATCH & ~IXP425_OST_RELOAD_MASK) | IXP425_OST_ENABLE;
+
+ /* configure interrupts for IRQ mode */
+ *IXP425_ICLR = 0x00000000;
+
+ /* enable timer irq */
+ *IXP425_ICMR = (1 << IXP425_TIMER_2_IRQ);
+#endif
+
return (0);
}
diff --git a/cpu/ixp/npe/IxEthAcc.c b/cpu/ixp/npe/IxEthAcc.c
new file mode 100644
index 0000000000..d981649da6
--- /dev/null
+++ b/cpu/ixp/npe/IxEthAcc.c
@@ -0,0 +1,261 @@
+/**
+ * @file IxEthAcc.c
+ *
+ * @author Intel Corporation
+ * @date 20-Feb-2001
+ *
+ * @brief This file contains the implementation of the IXP425 Ethernet Access Component
+ *
+ * Design Notes:
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+
+
+#include "IxEthAcc.h"
+#ifdef CONFIG_IXP425_COMPONENT_ETHDB
+#include "IxEthDB.h"
+#endif
+#include "IxFeatureCtrl.h"
+
+#include "IxEthAcc_p.h"
+#include "IxEthAccMac_p.h"
+#include "IxEthAccMii_p.h"
+
+/**
+ * @addtogroup IxEthAcc
+ *@{
+ */
+
+
+/**
+ * @brief System-wide information data strucure.
+ *
+ * @ingroup IxEthAccPri
+ *
+ */
+
+IxEthAccInfo ixEthAccDataInfo;
+extern PUBLIC IxEthAccMacState ixEthAccMacState[];
+extern PUBLIC IxOsalMutex ixEthAccControlInterfaceMutex;
+
+/**
+ * @brief System-wide information
+ *
+ * @ingroup IxEthAccPri
+ *
+ */
+BOOL ixEthAccServiceInit = FALSE;
+
+/* global filtering bit mask */
+PUBLIC UINT32 ixEthAccNewSrcMask;
+
+/**
+ * @brief Per port information data strucure.
+ *
+ * @ingroup IxEthAccPri
+ *
+ */
+
+IxEthAccPortDataInfo ixEthAccPortData[IX_ETH_ACC_NUMBER_OF_PORTS];
+
+PUBLIC IxEthAccStatus ixEthAccInit()
+{
+#ifdef CONFIG_IXP425_COMPONENT_ETHDB
+ /*
+ * Initialize Control plane
+ */
+ if (ixEthDBInit() != IX_ETH_ACC_SUCCESS)
+ {
+ IX_ETH_ACC_WARNING_LOG("ixEthAccInit: EthDB init failed\n", 0, 0, 0, 0, 0, 0);
+
+ return IX_ETH_ACC_FAIL;
+ }
+#endif
+
+ if (IX_FEATURE_CTRL_SWCONFIG_ENABLED == ixFeatureCtrlSwConfigurationCheck (IX_FEATURECTRL_ETH_LEARNING))
+ {
+ ixEthAccNewSrcMask = (~0); /* want all the bits */
+ }
+ else
+ {
+ ixEthAccNewSrcMask = (~IX_ETHACC_NE_NEWSRCMASK); /* want all but the NewSrc bit */
+ }
+
+ /*
+ * Initialize Data plane
+ */
+ if ( ixEthAccInitDataPlane() != IX_ETH_ACC_SUCCESS )
+ {
+ IX_ETH_ACC_WARNING_LOG("ixEthAccInit: data plane init failed\n", 0, 0, 0, 0, 0, 0);
+
+ return IX_ETH_ACC_FAIL;
+ }
+
+
+ if ( ixEthAccQMgrQueuesConfig() != IX_ETH_ACC_SUCCESS )
+ {
+ IX_ETH_ACC_WARNING_LOG("ixEthAccInit: queue config failed\n", 0, 0, 0, 0, 0, 0);
+
+ return IX_ETH_ACC_FAIL;
+ }
+
+ /*
+ * Initialize MII
+ */
+ if ( ixEthAccMiiInit() != IX_ETH_ACC_SUCCESS )
+ {
+ IX_ETH_ACC_WARNING_LOG("ixEthAccInit: Mii init failed\n", 0, 0, 0, 0, 0, 0);
+
+ return IX_ETH_ACC_FAIL;
+ }
+
+ /*
+ * Initialize MAC I/O memory
+ */
+ if (ixEthAccMacMemInit() != IX_ETH_ACC_SUCCESS)
+ {
+ IX_ETH_ACC_WARNING_LOG("ixEthAccInit: Mac init failed\n", 0, 0, 0, 0, 0, 0);
+
+ return IX_ETH_ACC_FAIL;
+ }
+
+ /*
+ * Initialize control plane interface lock
+ */
+ if (ixOsalMutexInit(&ixEthAccControlInterfaceMutex) != IX_SUCCESS)
+ {
+ IX_ETH_ACC_WARNING_LOG("ixEthAccInit: Control plane interface lock initialization failed\n", 0, 0, 0, 0, 0, 0);
+
+ return IX_ETH_ACC_FAIL;
+ }
+
+ /* initialiasation is complete */
+ ixEthAccServiceInit = TRUE;
+
+ return IX_ETH_ACC_SUCCESS;
+
+}
+
+PUBLIC void ixEthAccUnload(void)
+{
+ IxEthAccPortId portId;
+
+ if ( IX_ETH_ACC_IS_SERVICE_INITIALIZED() )
+ {
+ /* check none of the port is still active */
+ for (portId = 0; portId < IX_ETH_ACC_NUMBER_OF_PORTS; portId++)
+ {
+ if ( IX_ETH_IS_PORT_INITIALIZED(portId) )
+ {
+ if (ixEthAccMacState[portId].portDisableState == ACTIVE)
+ {
+ IX_ETH_ACC_WARNING_LOG("ixEthAccUnload: port %u still active, bail out\n", portId, 0, 0, 0, 0, 0);
+ return;
+ }
+ }
+ }
+
+ /* unmap the memory areas */
+ ixEthAccMiiUnload();
+ ixEthAccMacUnload();
+
+ /* set all ports as uninitialized */
+ for (portId = 0; portId < IX_ETH_ACC_NUMBER_OF_PORTS; portId++)
+ {
+ ixEthAccPortData[portId].portInitialized = FALSE;
+ }
+
+ /* uninitialize the service */
+ ixEthAccServiceInit = FALSE;
+ }
+}
+
+PUBLIC IxEthAccStatus ixEthAccPortInit( IxEthAccPortId portId)
+{
+
+ IxEthAccStatus ret=IX_ETH_ACC_SUCCESS;
+
+ if ( ! IX_ETH_ACC_IS_SERVICE_INITIALIZED() )
+ {
+ return(IX_ETH_ACC_FAIL);
+ }
+
+ /*
+ * Check for valid port
+ */
+
+ if ( ! IX_ETH_ACC_IS_PORT_VALID(portId) )
+ {
+ return (IX_ETH_ACC_INVALID_PORT);
+ }
+
+ if (IX_ETH_ACC_SUCCESS != ixEthAccSingleEthNpeCheck(portId))
+ {
+ IX_ETH_ACC_WARNING_LOG("EthAcc: Unavailable Eth %d: Cannot initialize Eth port.\n",(INT32) portId,0,0,0,0,0);
+ return IX_ETH_ACC_SUCCESS ;
+ }
+
+ if ( IX_ETH_IS_PORT_INITIALIZED(portId) )
+ {
+ /* Already initialized */
+ return(IX_ETH_ACC_FAIL);
+ }
+
+ if(ixEthAccMacInit(portId)!=IX_ETH_ACC_SUCCESS)
+ {
+ return IX_ETH_ACC_FAIL;
+ }
+
+ /*
+ * Set the port init flag.
+ */
+
+ ixEthAccPortData[portId].portInitialized = TRUE;
+
+#ifdef CONFIG_IXP425_COMPONENT_ETHDB
+ /* init learning/filtering database structures for this port */
+ ixEthDBPortInit(portId);
+#endif
+
+ return(ret);
+}
+
+
diff --git a/cpu/ixp/npe/IxEthAccCommon.c b/cpu/ixp/npe/IxEthAccCommon.c
new file mode 100644
index 0000000000..bda2c44792
--- /dev/null
+++ b/cpu/ixp/npe/IxEthAccCommon.c
@@ -0,0 +1,1049 @@
+/**
+ * @file IxEthAccCommon.c
+ *
+ * @author Intel Corporation
+ * @date 12-Feb-2002
+ *
+ * @brief This file contains the implementation common support routines for the component
+ *
+ * Design Notes:
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+/*
+ * Component header files
+ */
+
+#include "IxOsal.h"
+#include "IxEthAcc.h"
+#include "IxEthDB.h"
+#include "IxNpeMh.h"
+#include "IxEthDBPortDefs.h"
+#include "IxFeatureCtrl.h"
+#include "IxEthAcc_p.h"
+#include "IxEthAccQueueAssign_p.h"
+
+#include "IxEthAccDataPlane_p.h"
+#include "IxEthAccMii_p.h"
+
+/**
+ * @addtogroup IxEthAccPri
+ *@{
+ */
+
+extern IxEthAccInfo ixEthAccDataInfo;
+
+/**
+ *
+ * @brief Maximum number of RX queues set to be the maximum number
+ * of traffic calsses.
+ *
+ */
+#define IX_ETHACC_MAX_RX_QUEUES \
+ (IX_ETH_DB_QOS_TRAFFIC_CLASS_7_RX_QUEUE_PROPERTY \
+ - IX_ETH_DB_QOS_TRAFFIC_CLASS_0_RX_QUEUE_PROPERTY \
+ + 1)
+
+/**
+ *
+ * @brief Maximum number of 128 entry RX queues
+ *
+ */
+#define IX_ETHACC_MAX_LARGE_RX_QUEUES 4
+
+/**
+ *
+ * @brief Data structure template for Default RX Queues
+ *
+ */
+IX_ETH_ACC_PRIVATE
+IxEthAccQregInfo ixEthAccQmgrRxDefaultTemplate =
+ {
+ IX_ETH_ACC_RX_FRAME_ETH_Q, /**< Queue ID */
+ "Eth Rx Q",
+ ixEthRxFrameQMCallback, /**< Functional callback */
+ (IxQMgrCallbackId) 0, /**< Callback tag */
+ IX_QMGR_Q_SIZE128, /**< Allocate Max Size Q */
+ IX_QMGR_Q_ENTRY_SIZE1, /**< Queue Entry Sizes - all Q entries are single word entries */
+ TRUE, /**< Enable Q notification at startup */
+ IX_ETH_ACC_RX_FRAME_ETH_Q_SOURCE,/**< Q Condition to drive callback */
+ IX_QMGR_Q_WM_LEVEL0, /**< Q Low water mark */
+ IX_QMGR_Q_WM_LEVEL1, /**< Q High water mark - needed by NPE */
+ };
+
+/**
+ *
+ * @brief Data structure template for Small RX Queues
+ *
+ */
+IX_ETH_ACC_PRIVATE
+IxEthAccQregInfo ixEthAccQmgrRxSmallTemplate =
+ {
+ IX_ETH_ACC_RX_FRAME_ETH_Q, /**< Queue ID */
+ "Eth Rx Q",
+ ixEthRxFrameQMCallback, /**< Functional callback */
+ (IxQMgrCallbackId) 0, /**< Callback tag */
+ IX_QMGR_Q_SIZE64, /**< Allocate Smaller Q */
+ IX_QMGR_Q_ENTRY_SIZE1, /**< Queue Entry Sizes - all Q entries are single word entries */
+ TRUE, /**< Enable Q notification at startup */
+ IX_ETH_ACC_RX_FRAME_ETH_Q_SOURCE,/**< Q Condition to drive callback */
+ IX_QMGR_Q_WM_LEVEL0, /**< Q Low water mark */
+ IX_QMGR_Q_WM_LEVEL1, /**< Q High water mark - needed by NPE */
+ };
+
+
+/**
+ *
+ * @brief Data structure used to register & initialize the Queues
+ *
+ */
+IX_ETH_ACC_PRIVATE
+IxEthAccQregInfo ixEthAccQmgrStaticInfo[]=
+{
+ {
+ IX_ETH_ACC_RX_FREE_BUFF_ENET0_Q,
+ "Eth Rx Fr Q 1",
+ ixEthRxFreeQMCallback,
+ (IxQMgrCallbackId) IX_ETH_PORT_1,
+ IX_QMGR_Q_SIZE128, /**< Allocate Max Size Q */
+ IX_QMGR_Q_ENTRY_SIZE1, /**< Queue Entry Sizes - all Q entries are single word entries */
+ FALSE, /**< Disable Q notification at startup */
+ IX_ETH_ACC_RX_FREE_BUFF_ENET0_Q_SOURCE, /**< Q Condition to drive callback */
+ IX_QMGR_Q_WM_LEVEL0, /***< Q Low water mark */
+ IX_QMGR_Q_WM_LEVEL64, /**< Q High water mark */
+ },
+
+ {
+ IX_ETH_ACC_RX_FREE_BUFF_ENET1_Q,
+ "Eth Rx Fr Q 2",
+ ixEthRxFreeQMCallback,
+ (IxQMgrCallbackId) IX_ETH_PORT_2,
+ IX_QMGR_Q_SIZE128, /**< Allocate Max Size Q */
+ IX_QMGR_Q_ENTRY_SIZE1, /**< Queue Entry Sizes - all Q entries are single word entries */
+ FALSE, /**< Disable Q notification at startup */
+ IX_ETH_ACC_RX_FREE_BUFF_ENET1_Q_SOURCE, /**< Q Condition to drive callback */
+ IX_QMGR_Q_WM_LEVEL0, /**< Q Low water mark */
+ IX_QMGR_Q_WM_LEVEL64, /**< Q High water mark */
+ },
+#ifdef __ixp46X
+ {
+ IX_ETH_ACC_RX_FREE_BUFF_ENET2_Q,
+ "Eth Rx Fr Q 3",
+ ixEthRxFreeQMCallback,
+ (IxQMgrCallbackId) IX_ETH_PORT_3,
+ IX_QMGR_Q_SIZE128, /**< Allocate Max Size Q */
+ IX_QMGR_Q_ENTRY_SIZE1, /**< Queue Entry Sizes - all Q entries are single word entries */
+ FALSE, /**< Disable Q notification at startup */
+ IX_ETH_ACC_RX_FREE_BUFF_ENET2_Q_SOURCE, /**< Q Condition to drive callback */
+ IX_QMGR_Q_WM_LEVEL0, /**< Q Low water mark */
+ IX_QMGR_Q_WM_LEVEL64, /**< Q High water mark */
+ },
+#endif
+ {
+ IX_ETH_ACC_TX_FRAME_ENET0_Q,
+ "Eth Tx Q 1",
+ ixEthTxFrameQMCallback,
+ (IxQMgrCallbackId) IX_ETH_PORT_1,
+ IX_QMGR_Q_SIZE128, /**< Allocate Max Size Q */
+ IX_QMGR_Q_ENTRY_SIZE1, /**< Queue Entry Sizes - all Q entries are single word entries */
+ FALSE, /**< Disable Q notification at startup */
+ IX_ETH_ACC_TX_FRAME_ENET0_Q_SOURCE, /**< Q Condition to drive callback */
+ IX_QMGR_Q_WM_LEVEL0, /**< Q Low water mark */
+ IX_QMGR_Q_WM_LEVEL64, /**< Q High water mark */
+ },
+
+ {
+ IX_ETH_ACC_TX_FRAME_ENET1_Q,
+ "Eth Tx Q 2",
+ ixEthTxFrameQMCallback,
+ (IxQMgrCallbackId) IX_ETH_PORT_2,
+ IX_QMGR_Q_SIZE128, /**< Allocate Max Size Q */
+ IX_QMGR_Q_ENTRY_SIZE1, /**< Queue Entry Sizes - all Q entries are single word entries */
+ FALSE, /**< Disable Q notification at startup */
+ IX_ETH_ACC_TX_FRAME_ENET1_Q_SOURCE, /**< Q Condition to drive callback */
+ IX_QMGR_Q_WM_LEVEL0, /**< Q Low water mark */
+ IX_QMGR_Q_WM_LEVEL64, /**< Q High water mark */
+ },
+#ifdef __ixp46X
+ {
+ IX_ETH_ACC_TX_FRAME_ENET2_Q,
+ "Eth Tx Q 3",
+ ixEthTxFrameQMCallback,
+ (IxQMgrCallbackId) IX_ETH_PORT_3,
+ IX_QMGR_Q_SIZE128, /**< Allocate Max Size Q */
+ IX_QMGR_Q_ENTRY_SIZE1, /** Queue Entry Sizes - all Q entries are single ord entries */
+ FALSE, /** Disable Q notification at startup */
+ IX_ETH_ACC_TX_FRAME_ENET2_Q_SOURCE, /** Q Condition to drive callback */
+ IX_QMGR_Q_WM_LEVEL0, /* No queues use almost empty */
+ IX_QMGR_Q_WM_LEVEL64, /** Q High water mark - needed used */
+ },
+#endif
+ {
+ IX_ETH_ACC_TX_FRAME_DONE_ETH_Q,
+ "Eth Tx Done Q",
+ ixEthTxFrameDoneQMCallback,
+ (IxQMgrCallbackId) 0,
+ IX_QMGR_Q_SIZE128, /**< Allocate Max Size Q */
+ IX_QMGR_Q_ENTRY_SIZE1, /**< Queue Entry Sizes - all Q entries are single word entries */
+ TRUE, /**< Enable Q notification at startup */
+ IX_ETH_ACC_TX_FRAME_DONE_ETH_Q_SOURCE, /**< Q Condition to drive callback */
+ IX_QMGR_Q_WM_LEVEL0, /**< Q Low water mark */
+ IX_QMGR_Q_WM_LEVEL2, /**< Q High water mark - needed by NPE */
+ },
+
+ { /* Null Termination entry
+ */
+ (IxQMgrQId)0,
+ (char *) NULL,
+ (IxQMgrCallback) NULL,
+ (IxQMgrCallbackId) 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0
+ }
+
+};
+
+/**
+ *
+ * @brief Data structure used to register & initialize the Queues
+ *
+ * The structure will be filled at run time depending on the NPE
+ * image already loaded and the QoS configured in ethDB.
+ *
+ */
+IX_ETH_ACC_PRIVATE
+IxEthAccQregInfo ixEthAccQmgrRxQueuesInfo[IX_ETHACC_MAX_RX_QUEUES+1]=
+{
+ { /* PlaceHolder for rx queues
+ * depending on the QoS configured
+ */
+ (IxQMgrQId)0,
+ (char *) NULL,
+ (IxQMgrCallback) NULL,
+ (IxQMgrCallbackId) 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0
+ },
+
+ { /* PlaceHolder for rx queues
+ * depending on the QoS configured
+ */
+ (IxQMgrQId)0,
+ (char *) NULL,
+ (IxQMgrCallback) NULL,
+ (IxQMgrCallbackId) 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0
+ },
+
+ { /* PlaceHolder for rx queues
+ * depending on the QoS configured
+ */
+ (IxQMgrQId)0,
+ (char *) NULL,
+ (IxQMgrCallback) NULL,
+ (IxQMgrCallbackId) 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0
+ },
+
+ { /* PlaceHolder for rx queues
+ * depending on the QoS configured
+ */
+ (IxQMgrQId)0,
+ (char *) NULL,
+ (IxQMgrCallback) NULL,
+ (IxQMgrCallbackId) 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0
+ },
+
+ { /* PlaceHolder for rx queues
+ * depending on the QoS configured
+ */
+ (IxQMgrQId)0,
+ (char *) NULL,
+ (IxQMgrCallback) NULL,
+ (IxQMgrCallbackId) 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0
+ },
+
+ { /* PlaceHolder for rx queues
+ * depending on the QoS configured
+ */
+ (IxQMgrQId)0,
+ (char *) NULL,
+ (IxQMgrCallback) NULL,
+ (IxQMgrCallbackId) 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0
+ },
+
+ { /* PlaceHolder for rx queues
+ * depending on the QoS configured
+ */
+ (IxQMgrQId)0,
+ (char *) NULL,
+ (IxQMgrCallback) NULL,
+ (IxQMgrCallbackId) 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0
+ },
+
+ { /* PlaceHolder for rx queues
+ * depending on the QoS configured
+ */
+ (IxQMgrQId)0,
+ (char *) NULL,
+ (IxQMgrCallback) NULL,
+ (IxQMgrCallbackId) 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0
+ },
+
+ { /* Null Termination entry
+ */
+ (IxQMgrQId)0,
+ (char *) NULL,
+ (IxQMgrCallback) NULL,
+ (IxQMgrCallbackId) 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0
+ }
+
+};
+
+/* forward declarations */
+IX_ETH_ACC_PRIVATE IxEthAccStatus
+ixEthAccQMgrQueueSetup(IxEthAccQregInfo *qInfoDes);
+
+/**
+ * @fn ixEthAccQMgrQueueSetup(void)
+ *
+ * @brief Setup one queue and its event, and register the callback required
+ * by this component to the QMgr
+ *
+ * @internal
+ */
+IX_ETH_ACC_PRIVATE IxEthAccStatus
+ixEthAccQMgrQueueSetup(IxEthAccQregInfo *qInfoDes)
+{
+ /*
+ * Configure each Q.
+ */
+ if ( ixQMgrQConfig( qInfoDes->qName,
+ qInfoDes->qId,
+ qInfoDes->qSize,
+ qInfoDes->qWords) != IX_SUCCESS)
+ {
+ return IX_ETH_ACC_FAIL;
+ }
+
+ if ( ixQMgrWatermarkSet( qInfoDes->qId,
+ qInfoDes->AlmostEmptyThreshold,
+ qInfoDes->AlmostFullThreshold
+ ) != IX_SUCCESS)
+ {
+ return IX_ETH_ACC_FAIL;
+ }
+
+ /*
+ * Set dispatcher priority.
+ */
+ if ( ixQMgrDispatcherPrioritySet( qInfoDes->qId,
+ IX_ETH_ACC_QM_QUEUE_DISPATCH_PRIORITY)
+ != IX_SUCCESS)
+ {
+ return IX_ETH_ACC_FAIL;
+ }
+
+ /*
+ * Register callbacks for each Q.
+ */
+ if ( ixQMgrNotificationCallbackSet(qInfoDes->qId,
+ qInfoDes->qCallback,
+ qInfoDes->callbackTag)
+ != IX_SUCCESS )
+ {
+ return IX_ETH_ACC_FAIL;
+ }
+
+ /*
+ * Set notification condition for Q
+ */
+ if ( qInfoDes->qNotificationEnableAtStartup == TRUE )
+ {
+ if ( ixQMgrNotificationEnable(qInfoDes->qId,
+ qInfoDes->qConditionSource)
+ != IX_SUCCESS )
+ {
+ return IX_ETH_ACC_FAIL;
+ }
+ }
+
+ return(IX_ETH_ACC_SUCCESS);
+}
+
+/**
+ * @fn ixEthAccQMgrQueuesConfig(void)
+ *
+ * @brief Setup all the queues and register all callbacks required
+ * by this component to the QMgr
+ *
+ * The RxFree queues, tx queues, rx queues are configured statically
+ *
+ * Rx queues configuration is driven by QoS setup.
+ * Many Rx queues may be required when QoS is enabled (this depends
+ * on IxEthDB setup and the images being downloaded). The configuration
+ * of the rxQueues is done in many steps as follows:
+ *
+ * @li select all Rx queues as configured by ethDB for all ports
+ * @li sort the queues by traffic class
+ * @li build the priority dependency for all queues
+ * @li fill the configuration for all rx queues
+ * @li configure all statically configured queues
+ * @li configure all dynamically configured queues
+ *
+ * @param none
+ *
+ * @return IxEthAccStatus
+ *
+ * @internal
+ */
+IX_ETH_ACC_PUBLIC
+IxEthAccStatus ixEthAccQMgrQueuesConfig(void)
+{
+ struct
+ {
+ int npeCount;
+ UINT32 npeId;
+ IxQMgrQId qId;
+ IxEthDBProperty trafficClass;
+ } rxQueues[IX_ETHACC_MAX_RX_QUEUES];
+
+ UINT32 rxQueue = 0;
+ UINT32 rxQueueCount = 0;
+ IxQMgrQId ixQId =IX_QMGR_MAX_NUM_QUEUES;
+ IxEthDBStatus ixEthDBStatus = IX_ETH_DB_SUCCESS;
+ IxEthDBPortId ixEthDbPortId = 0;
+ IxEthAccPortId ixEthAccPortId = 0;
+ UINT32 ixNpeId = 0;
+ UINT32 ixHighestNpeId = 0;
+ UINT32 sortIterations = 0;
+ IxEthAccStatus ret = IX_ETH_ACC_SUCCESS;
+ IxEthAccQregInfo *qInfoDes = NULL;
+ IxEthDBProperty ixEthDBTrafficClass = IX_ETH_DB_QOS_TRAFFIC_CLASS_0_RX_QUEUE_PROPERTY;
+ IxEthDBPropertyType ixEthDBPropertyType = IX_ETH_DB_INTEGER_PROPERTY;
+ UINT32 ixEthDBParameter = 0;
+ BOOL completelySorted = FALSE;
+
+ /* Fill the corspondance between ports and queues
+ * This defines the mapping from port to queue Ids.
+ */
+
+ ixEthAccPortData[IX_ETH_PORT_1].ixEthAccRxData.rxFreeQueue
+ = IX_ETH_ACC_RX_FREE_BUFF_ENET0_Q;
+ ixEthAccPortData[IX_ETH_PORT_2].ixEthAccRxData.rxFreeQueue
+ = IX_ETH_ACC_RX_FREE_BUFF_ENET1_Q;
+#ifdef __ixp46X
+ ixEthAccPortData[IX_ETH_PORT_3].ixEthAccRxData.rxFreeQueue
+ = IX_ETH_ACC_RX_FREE_BUFF_ENET2_Q;
+#endif
+ ixEthAccPortData[IX_ETH_PORT_1].ixEthAccTxData.txQueue
+ = IX_ETH_ACC_TX_FRAME_ENET0_Q;
+ ixEthAccPortData[IX_ETH_PORT_2].ixEthAccTxData.txQueue
+ = IX_ETH_ACC_TX_FRAME_ENET1_Q;
+#ifdef __ixp46X
+ ixEthAccPortData[IX_ETH_PORT_3].ixEthAccTxData.txQueue
+ = IX_ETH_ACC_TX_FRAME_ENET2_Q;
+#endif
+ /* Fill the corspondance between ports and NPEs
+ * This defines the mapping from port to npeIds.
+ */
+
+ ixEthAccPortData[IX_ETH_PORT_1].npeId = IX_NPEMH_NPEID_NPEB;
+ ixEthAccPortData[IX_ETH_PORT_2].npeId = IX_NPEMH_NPEID_NPEC;
+#ifdef __ixp46X
+ ixEthAccPortData[IX_ETH_PORT_3].npeId = IX_NPEMH_NPEID_NPEA;
+#endif
+ /* set the default rx scheduling discipline */
+ ixEthAccDataInfo.schDiscipline = FIFO_NO_PRIORITY;
+
+ /*
+ * Queue Selection step:
+ *
+ * The following code selects all the queues and build
+ * a temporary array which contains for each queue
+ * - the queue Id,
+ * - the highest traffic class (in case of many
+ * priorities configured for the same queue on different
+ * ports)
+ * - the number of different Npes which are
+ * configured to write to this queue.
+ *
+ * The output of this loop is a temporary array of RX queues
+ * in any order.
+ *
+ */
+#ifdef CONFIG_IXP425_COMPONENT_ETHDB
+ for (ixEthAccPortId = 0;
+ (ixEthAccPortId < IX_ETH_ACC_NUMBER_OF_PORTS)
+ && (ret == IX_ETH_ACC_SUCCESS);
+ ixEthAccPortId++)
+ {
+ /* map between ethDb and ethAcc port Ids */
+ ixEthDbPortId = (IxEthDBPortId)ixEthAccPortId;
+
+ /* map between npeId and ethAcc port Ids */
+ ixNpeId = IX_ETH_ACC_PORT_TO_NPE_ID(ixEthAccPortId);
+
+ /* Iterate thru the different priorities */
+ for (ixEthDBTrafficClass = IX_ETH_DB_QOS_TRAFFIC_CLASS_0_RX_QUEUE_PROPERTY;
+ ixEthDBTrafficClass <= IX_ETH_DB_QOS_TRAFFIC_CLASS_7_RX_QUEUE_PROPERTY;
+ ixEthDBTrafficClass++)
+ {
+ ixEthDBStatus = ixEthDBFeaturePropertyGet(
+ ixEthDbPortId,
+ IX_ETH_DB_VLAN_QOS,
+ ixEthDBTrafficClass,
+ &ixEthDBPropertyType,
+ (void *)&ixEthDBParameter);
+
+ if (ixEthDBStatus == IX_ETH_DB_SUCCESS)
+ {
+ /* This port and QoS class are mapped to
+ * a RX queue.
+ */
+ if (ixEthDBPropertyType == IX_ETH_DB_INTEGER_PROPERTY)
+ {
+ /* remember the highest npe Id supporting ethernet */
+ if (ixNpeId > ixHighestNpeId)
+ {
+ ixHighestNpeId = ixNpeId;
+ }
+
+ /* search the queue in the list of queues
+ * already used by an other port or QoS
+ */
+ for (rxQueue = 0;
+ rxQueue < rxQueueCount;
+ rxQueue++)
+ {
+ if (rxQueues[rxQueue].qId == (IxQMgrQId)ixEthDBParameter)
+ {
+ /* found an existing setup, update the number of ports
+ * for this queue if the port maps to
+ * a different NPE.
+ */
+ if (rxQueues[rxQueue].npeId != ixNpeId)
+ {
+ rxQueues[rxQueue].npeCount++;
+ rxQueues[rxQueue].npeId = ixNpeId;
+ }
+ /* get the highest traffic class for this queue */
+ if (rxQueues[rxQueue].trafficClass > ixEthDBTrafficClass)
+ {
+ rxQueues[rxQueue].trafficClass = ixEthDBTrafficClass;
+ }
+ break;
+ }
+ }
+ if (rxQueue == rxQueueCount)
+ {
+ /* new queue not found in the current list,
+ * add a new entry.
+ */
+ IX_OSAL_ASSERT(rxQueueCount < IX_ETHACC_MAX_RX_QUEUES);
+ rxQueues[rxQueueCount].qId = ixEthDBParameter;
+ rxQueues[rxQueueCount].npeCount = 1;
+ rxQueues[rxQueueCount].npeId = ixNpeId;
+ rxQueues[rxQueueCount].trafficClass = ixEthDBTrafficClass;
+ rxQueueCount++;
+ }
+ }
+ else
+ {
+ /* unexpected property type (not Integer) */
+ ret = IX_ETH_ACC_FAIL;
+
+ IX_ETH_ACC_WARNING_LOG("ixEthAccQMgrQueuesConfig: unexpected property type returned by EthDB\n", 0, 0, 0, 0, 0, 0);
+
+ /* no point to continue to iterate */
+ break;
+ }
+ }
+ else
+ {
+ /* No Rx queue configured for this port
+ * and this traffic class. Do nothing.
+ */
+ }
+ }
+
+ /* notify EthDB that queue initialization is complete and traffic class allocation is frozen */
+ ixEthDBFeaturePropertySet(ixEthDbPortId,
+ IX_ETH_DB_VLAN_QOS,
+ IX_ETH_DB_QOS_QUEUE_CONFIGURATION_COMPLETE,
+ NULL /* ignored */);
+ }
+
+#else
+
+ ixNpeId = IX_ETH_ACC_PORT_TO_NPE_ID(ixEthAccPortId);
+ rxQueues[0].qId = 4;
+ rxQueues[0].npeCount = 1;
+ rxQueues[0].npeId = ixNpeId;
+ rxQueues[0].trafficClass = IX_ETH_DB_QOS_TRAFFIC_CLASS_0_RX_QUEUE_PROPERTY;
+ rxQueueCount++;
+
+#endif
+
+ /* check there is at least 1 rx queue : there is no point
+ * to continue if there is no rx queue configured
+ */
+ if ((rxQueueCount == 0) || (ret == IX_ETH_ACC_FAIL))
+ {
+ IX_ETH_ACC_WARNING_LOG("ixEthAccQMgrQueuesConfig: no queues configured, bailing out\n", 0, 0, 0, 0, 0, 0);
+ return (IX_ETH_ACC_FAIL);
+ }
+
+ /* Queue sort step:
+ *
+ * Re-order the array of queues by decreasing traffic class
+ * using a bubble sort. (trafficClass 0 is the lowest
+ * priority traffic, trafficClass 7 is the highest priority traffic)
+ *
+ * Primary sort order is traffic class
+ * Secondary sort order is npeId
+ *
+ * Note that a bubble sort algorithm is not very efficient when
+ * the number of queues grows . However, this is not a very bad choice
+ * considering the very small number of entries to sort. Also, bubble
+ * sort is extremely fast when the list is already sorted.
+ *
+ * The output of this loop is a sorted array of queues.
+ *
+ */
+ sortIterations = 0;
+ do
+ {
+ sortIterations++;
+ completelySorted = TRUE;
+ for (rxQueue = 0;
+ rxQueue < rxQueueCount - sortIterations;
+ rxQueue++)
+ {
+ /* compare adjacent elements */
+ if ((rxQueues[rxQueue].trafficClass <
+ rxQueues[rxQueue+1].trafficClass)
+ || ((rxQueues[rxQueue].trafficClass ==
+ rxQueues[rxQueue+1].trafficClass)
+ &&(rxQueues[rxQueue].npeId <
+ rxQueues[rxQueue+1].npeId)))
+ {
+ /* swap adjacent elements */
+ int npeCount = rxQueues[rxQueue].npeCount;
+ UINT32 npeId = rxQueues[rxQueue].npeId;
+ IxQMgrQId qId = rxQueues[rxQueue].qId;
+ IxEthDBProperty trafficClass = rxQueues[rxQueue].trafficClass;
+ rxQueues[rxQueue].npeCount = rxQueues[rxQueue+1].npeCount;
+ rxQueues[rxQueue].npeId = rxQueues[rxQueue+1].npeId;
+ rxQueues[rxQueue].qId = rxQueues[rxQueue+1].qId;
+ rxQueues[rxQueue].trafficClass = rxQueues[rxQueue+1].trafficClass;
+ rxQueues[rxQueue+1].npeCount = npeCount;
+ rxQueues[rxQueue+1].npeId = npeId;
+ rxQueues[rxQueue+1].qId = qId;
+ rxQueues[rxQueue+1].trafficClass = trafficClass;
+ completelySorted = FALSE;
+ }
+ }
+ }
+ while (!completelySorted);
+
+ /* Queue traffic class list:
+ *
+ * Fill an array of rx queues linked by ascending traffic classes.
+ *
+ * If the queues are configured as follows
+ * qId 6 -> traffic class 0 (lowest)
+ * qId 7 -> traffic class 0
+ * qId 8 -> traffic class 6
+ * qId 12 -> traffic class 7 (highest)
+ *
+ * Then the output of this loop will be
+ *
+ * higherPriorityQueue[6] = 8
+ * higherPriorityQueue[7] = 8
+ * higherPriorityQueue[8] = 12
+ * higherPriorityQueue[12] = Invalid queueId
+ * higherPriorityQueue[...] = Invalid queueId
+ *
+ * Note that this queue ordering does not handle all possibilities
+ * that could result from different rules associated with different
+ * ports, and inconsistencies in the rules. In all cases, the
+ * output of this algorithm is a simple linked list of queues,
+ * without closed circuit.
+
+ * This list is implemented as an array with invalid values initialized
+ * with an "invalid" queue id which is the maximum number of queues.
+ *
+ */
+
+ /*
+ * Initialise the rx queue list.
+ */
+ for (rxQueue = 0; rxQueue < IX_QMGR_MAX_NUM_QUEUES; rxQueue++)
+ {
+ ixEthAccDataInfo.higherPriorityQueue[rxQueue] = IX_QMGR_MAX_NUM_QUEUES;
+ }
+
+ /* build the linked list for this NPE.
+ */
+ for (ixNpeId = 0;
+ ixNpeId <= ixHighestNpeId;
+ ixNpeId++)
+ {
+ /* iterate thru the sorted list of queues
+ */
+ ixQId = IX_QMGR_MAX_NUM_QUEUES;
+ for (rxQueue = 0;
+ rxQueue < rxQueueCount;
+ rxQueue++)
+ {
+ if (rxQueues[rxQueue].npeId == ixNpeId)
+ {
+ ixEthAccDataInfo.higherPriorityQueue[rxQueues[rxQueue].qId] = ixQId;
+ /* iterate thru queues with the same traffic class
+ * than the current queue. (queues are ordered by descending
+ * traffic classes and npeIds).
+ */
+ while ((rxQueue < rxQueueCount - 1)
+ && (rxQueues[rxQueue].trafficClass
+ == rxQueues[rxQueue+1].trafficClass)
+ && (ixNpeId == rxQueues[rxQueue].npeId))
+ {
+ rxQueue++;
+ ixEthAccDataInfo.higherPriorityQueue[rxQueues[rxQueue].qId] = ixQId;
+ }
+ ixQId = rxQueues[rxQueue].qId;
+ }
+ }
+ }
+
+ /* point on the first dynamic queue description */
+ qInfoDes = ixEthAccQmgrRxQueuesInfo;
+
+ /* update the list of queues with the rx queues */
+ for (rxQueue = 0;
+ (rxQueue < rxQueueCount) && (ret == IX_ETH_ACC_SUCCESS);
+ rxQueue++)
+ {
+ /* Don't utilize more than IX_ETHACC_MAX_LARGE_RX_QUEUES queues
+ * with the full 128 entries. For the lower priority queues, use
+ * a smaller number of entries. This ensures queue resources
+ * remain available for other components.
+ */
+ if( (rxQueueCount > IX_ETHACC_MAX_LARGE_RX_QUEUES) &&
+ (rxQueue < rxQueueCount - IX_ETHACC_MAX_LARGE_RX_QUEUES) )
+ {
+ /* add the small RX Queue setup template to the list of queues */
+ memcpy(qInfoDes, &ixEthAccQmgrRxSmallTemplate, sizeof(*qInfoDes));
+ } else {
+ /* add the default RX Queue setup template to the list of queues */
+ memcpy(qInfoDes, &ixEthAccQmgrRxDefaultTemplate, sizeof(*qInfoDes));
+ }
+
+ /* setup the RxQueue ID */
+ qInfoDes->qId = rxQueues[rxQueue].qId;
+
+ /* setup the RxQueue watermark level
+ *
+ * Each queue can be filled by many NPEs. To avoid the
+ * NPEs to write to a full queue, need to set the
+ * high watermark level for nearly full condition.
+ * (the high watermark level are a power of 2
+ * starting from the top of the queue)
+ *
+ * Number of watermark
+ * ports level
+ * 1 0
+ * 2 1
+ * 3 2
+ * 4 4
+ * 5 4
+ * 6 8
+ * n approx. 2**ceil(log2(n))
+ */
+ if (rxQueues[rxQueue].npeCount == 1)
+ {
+ qInfoDes->AlmostFullThreshold = IX_QMGR_Q_WM_LEVEL0;
+ }
+ else if (rxQueues[rxQueue].npeCount == 2)
+ {
+ qInfoDes->AlmostFullThreshold = IX_QMGR_Q_WM_LEVEL1;
+ }
+ else if (rxQueues[rxQueue].npeCount == 3)
+ {
+ qInfoDes->AlmostFullThreshold = IX_QMGR_Q_WM_LEVEL2;
+ }
+ else
+ {
+ /* reach the maximum number for CSR 2.0 */
+ IX_ETH_ACC_WARNING_LOG("ixEthAccQMgrQueuesConfig: maximum number of NPEs per queue reached, bailing out\n", 0, 0, 0, 0, 0, 0);
+ ret = IX_ETH_ACC_FAIL;
+ break;
+ }
+
+ /* move to next queue entry */
+ ++qInfoDes;
+ }
+
+ /* configure the static list (RxFree, Tx and TxDone queues) */
+ for (qInfoDes = ixEthAccQmgrStaticInfo;
+ (qInfoDes->qCallback != (IxQMgrCallback) NULL )
+ && (ret == IX_ETH_ACC_SUCCESS);
+ ++qInfoDes)
+ {
+ ret = ixEthAccQMgrQueueSetup(qInfoDes);
+ }
+
+ /* configure the dynamic list (Rx queues) */
+ for (qInfoDes = ixEthAccQmgrRxQueuesInfo;
+ (qInfoDes->qCallback != (IxQMgrCallback) NULL )
+ && (ret == IX_ETH_ACC_SUCCESS);
+ ++qInfoDes)
+ {
+ ret = ixEthAccQMgrQueueSetup(qInfoDes);
+ }
+
+ return(ret);
+}
+
+/**
+ * @fn ixEthAccQMgrRxQEntryGet(UINT32 *rxQueueEntries)
+ *
+ * @brief Add and return the total number of entries in all Rx queues
+ *
+ * @param UINT32 rxQueueEntries[in] number of entries in all queues
+ *
+ * @return void
+ *
+ * @note Rx queues configuration is driven by Qos Setup. There is a
+ * variable number of rx queues which are set at initialisation.
+ *
+ * @internal
+ */
+IX_ETH_ACC_PUBLIC
+void ixEthAccQMgrRxQEntryGet(UINT32 *numRxQueueEntries)
+{
+ UINT32 rxQueueLevel;
+ IxEthAccQregInfo *qInfoDes;;
+
+ *numRxQueueEntries = 0;
+
+ /* iterate thru rx queues */
+ for (qInfoDes = ixEthAccQmgrRxQueuesInfo;
+ qInfoDes->qCallback != (IxQMgrCallback)NULL;
+ ++qInfoDes)
+ {
+ /* retrieve the rx queue level */
+ rxQueueLevel = 0;
+ ixQMgrQNumEntriesGet(qInfoDes->qId, &rxQueueLevel);
+ (*numRxQueueEntries) += rxQueueLevel;
+ }
+}
+
+/**
+ * @fn ixEthAccQMgrRxCallbacksRegister(IxQMgrCallback ixQMgrCallback)
+ *
+ * @brief Change the callback registered to all rx queues.
+ *
+ * @param IxQMgrCallback ixQMgrCallback[in] QMgr callback to register
+ *
+ * @return IxEthAccStatus
+ *
+ * @note The user may decide to use different Rx mechanisms
+ * (e.g. receive many frames at the same time , or receive
+ * one frame at a time, depending on the overall application
+ * performances). A different QMgr callback is registered. This
+ * way, there is no excessive pointer checks in the datapath.
+ *
+ * @internal
+ */
+IX_ETH_ACC_PUBLIC
+IxEthAccStatus ixEthAccQMgrRxCallbacksRegister(IxQMgrCallback ixQMgrCallback)
+{
+ IxEthAccQregInfo *qInfoDes;
+ IxEthAccStatus ret = IX_ETH_ACC_SUCCESS;
+
+ /* parameter check */
+ if (NULL == ixQMgrCallback)
+ {
+ ret = IX_ETH_ACC_FAIL;
+ }
+
+ /* iterate thru rx queues */
+ for (qInfoDes = ixEthAccQmgrRxQueuesInfo;
+ (qInfoDes->qCallback != (IxQMgrCallback) NULL )
+ && (ret == IX_ETH_ACC_SUCCESS);
+ ++qInfoDes)
+ {
+ /* register the rx callback for all queues */
+ if (ixQMgrNotificationCallbackSet(qInfoDes->qId,
+ ixQMgrCallback,
+ qInfoDes->callbackTag
+ ) != IX_SUCCESS)
+ {
+ ret = IX_ETH_ACC_FAIL;
+ }
+ }
+ return(ret);
+}
+
+/**
+ * @fn ixEthAccSingleEthNpeCheck(IxEthAccPortId portId)
+ *
+ * @brief Check the npe exists for this port
+ *
+ * @param IxEthAccPortId portId[in] port
+ *
+ * @return IxEthAccStatus
+ *
+ * @internal
+ */
+IX_ETH_ACC_PUBLIC
+IxEthAccStatus ixEthAccSingleEthNpeCheck(IxEthAccPortId portId)
+{
+
+ /* If not IXP42X A0 stepping, proceed to check for existence of coprocessors */
+ if ((IX_FEATURE_CTRL_SILICON_TYPE_A0 !=
+ (ixFeatureCtrlProductIdRead() & IX_FEATURE_CTRL_SILICON_STEPPING_MASK))
+ || (IX_FEATURE_CTRL_DEVICE_TYPE_IXP42X != ixFeatureCtrlDeviceRead ()))
+ {
+ if ((IX_ETH_PORT_1 == portId) &&
+ (ixFeatureCtrlComponentCheck(IX_FEATURECTRL_ETH0) ==
+ IX_FEATURE_CTRL_COMPONENT_ENABLED))
+ {
+ return IX_ETH_ACC_SUCCESS;
+ }
+
+ if ((IX_ETH_PORT_2 == portId) &&
+ (ixFeatureCtrlComponentCheck(IX_FEATURECTRL_ETH1) ==
+ IX_FEATURE_CTRL_COMPONENT_ENABLED))
+ {
+ return IX_ETH_ACC_SUCCESS;
+ }
+
+ if ((IX_ETH_PORT_3 == portId) &&
+ (ixFeatureCtrlComponentCheck(IX_FEATURECTRL_NPEA_ETH) ==
+ IX_FEATURE_CTRL_COMPONENT_ENABLED))
+ {
+ return IX_ETH_ACC_SUCCESS;
+ }
+
+ return IX_ETH_ACC_FAIL;
+ }
+
+ return IX_ETH_ACC_SUCCESS;
+}
+
+/**
+ * @fn ixEthAccStatsShow(void)
+ *
+ * @brief Displays all EthAcc stats
+ *
+ * @return void
+ *
+ */
+void ixEthAccStatsShow(IxEthAccPortId portId)
+{
+ ixEthAccMdioShow();
+
+ printf("\nPort %u\nUnicast MAC : ", portId);
+ ixEthAccPortUnicastAddressShow(portId);
+ ixEthAccPortMulticastAddressShow(portId);
+ printf("\n");
+
+ ixEthAccDataPlaneShow();
+}
+
+
+
diff --git a/cpu/ixp/npe/IxEthAccControlInterface.c b/cpu/ixp/npe/IxEthAccControlInterface.c
new file mode 100644
index 0000000000..44328473e6
--- /dev/null
+++ b/cpu/ixp/npe/IxEthAccControlInterface.c
@@ -0,0 +1,533 @@
+/**
+ * @file IxEthAccControlInterface.c
+ *
+ * @author Intel Corporation
+ * @date
+ *
+ * @brief IX_ETH_ACC_PUBLIC wrappers for control plane functions
+ *
+ * Design Notes:
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+#include "IxOsal.h"
+#include "IxEthAcc.h"
+#include "IxEthAcc_p.h"
+
+PUBLIC IxOsalMutex ixEthAccControlInterfaceMutex;
+
+IX_ETH_ACC_PUBLIC IxEthAccStatus
+ixEthAccPortEnable(IxEthAccPortId portId)
+{
+ IxEthAccStatus result;
+
+ if (!IX_ETH_ACC_IS_SERVICE_INITIALIZED())
+ {
+ printf("EthAcc: (Mac) cannot enable port %d, service not initialized\n", portId);
+ return (IX_ETH_ACC_FAIL);
+ }
+
+ ixOsalMutexLock(&ixEthAccControlInterfaceMutex, IX_OSAL_WAIT_FOREVER);
+ result = ixEthAccPortEnablePriv(portId);
+ ixOsalMutexUnlock(&ixEthAccControlInterfaceMutex);
+ return result;
+}
+
+IX_ETH_ACC_PUBLIC IxEthAccStatus
+ixEthAccPortDisable(IxEthAccPortId portId)
+{
+ IxEthAccStatus result;
+
+ /* check the context is iinitialized */
+ if (!IX_ETH_ACC_IS_SERVICE_INITIALIZED())
+ {
+ return (IX_ETH_ACC_FAIL);
+ }
+
+ ixOsalMutexLock(&ixEthAccControlInterfaceMutex, IX_OSAL_WAIT_FOREVER);
+ result = ixEthAccPortDisablePriv(portId);
+ ixOsalMutexUnlock(&ixEthAccControlInterfaceMutex);
+ return result;
+}
+
+IX_ETH_ACC_PUBLIC IxEthAccStatus
+ixEthAccPortEnabledQuery(IxEthAccPortId portId, BOOL *enabled)
+{
+ IxEthAccStatus result;
+
+ if (!IX_ETH_ACC_IS_SERVICE_INITIALIZED())
+ {
+ return (IX_ETH_ACC_FAIL);
+ }
+
+ ixOsalMutexLock(&ixEthAccControlInterfaceMutex, IX_OSAL_WAIT_FOREVER);
+ result = ixEthAccPortEnabledQueryPriv(portId, enabled);
+ ixOsalMutexUnlock(&ixEthAccControlInterfaceMutex);
+ return result;
+}
+
+IX_ETH_ACC_PUBLIC IxEthAccStatus
+ixEthAccPortPromiscuousModeClear(IxEthAccPortId portId)
+{
+ IxEthAccStatus result;
+
+ if (!IX_ETH_ACC_IS_SERVICE_INITIALIZED())
+ {
+ return (IX_ETH_ACC_FAIL);
+ }
+
+ ixOsalMutexLock(&ixEthAccControlInterfaceMutex, IX_OSAL_WAIT_FOREVER);
+ result = ixEthAccPortPromiscuousModeClearPriv(portId);
+ ixOsalMutexUnlock(&ixEthAccControlInterfaceMutex);
+ return result;
+}
+
+IX_ETH_ACC_PUBLIC IxEthAccStatus
+ixEthAccPortPromiscuousModeSet(IxEthAccPortId portId)
+{
+ IxEthAccStatus result;
+
+ if (!IX_ETH_ACC_IS_SERVICE_INITIALIZED())
+ {
+ return (IX_ETH_ACC_FAIL);
+ }
+
+ ixOsalMutexLock(&ixEthAccControlInterfaceMutex, IX_OSAL_WAIT_FOREVER);
+ result = ixEthAccPortPromiscuousModeSetPriv(portId);
+ ixOsalMutexUnlock(&ixEthAccControlInterfaceMutex);
+ return result;
+}
+
+IX_ETH_ACC_PUBLIC IxEthAccStatus
+ixEthAccPortUnicastMacAddressSet(IxEthAccPortId portId, IxEthAccMacAddr *macAddr)
+{
+ IxEthAccStatus result;
+
+ if (!IX_ETH_ACC_IS_SERVICE_INITIALIZED())
+ {
+ return (IX_ETH_ACC_FAIL);
+ }
+
+ ixOsalMutexLock(&ixEthAccControlInterfaceMutex, IX_OSAL_WAIT_FOREVER);
+ result = ixEthAccPortUnicastMacAddressSetPriv(portId, macAddr);
+ ixOsalMutexUnlock(&ixEthAccControlInterfaceMutex);
+ return result;
+}
+
+IX_ETH_ACC_PUBLIC IxEthAccStatus
+ixEthAccPortUnicastMacAddressGet(IxEthAccPortId portId, IxEthAccMacAddr *macAddr)
+{
+ IxEthAccStatus result;
+
+ if (!IX_ETH_ACC_IS_SERVICE_INITIALIZED())
+ {
+ return (IX_ETH_ACC_FAIL);
+ }
+
+ ixOsalMutexLock(&ixEthAccControlInterfaceMutex, IX_OSAL_WAIT_FOREVER);
+ result = ixEthAccPortUnicastMacAddressGetPriv(portId, macAddr);
+ ixOsalMutexUnlock(&ixEthAccControlInterfaceMutex);
+ return result;
+}
+
+IX_ETH_ACC_PUBLIC IxEthAccStatus
+ixEthAccPortMulticastAddressJoin(IxEthAccPortId portId, IxEthAccMacAddr *macAddr)
+{
+ IxEthAccStatus result;
+
+ if (!IX_ETH_ACC_IS_SERVICE_INITIALIZED())
+ {
+ return (IX_ETH_ACC_FAIL);
+ }
+
+ ixOsalMutexLock(&ixEthAccControlInterfaceMutex, IX_OSAL_WAIT_FOREVER);
+ result = ixEthAccPortMulticastAddressJoinPriv(portId, macAddr);
+ ixOsalMutexUnlock(&ixEthAccControlInterfaceMutex);
+ return result;
+}
+
+IX_ETH_ACC_PUBLIC IxEthAccStatus
+ixEthAccPortMulticastAddressJoinAll(IxEthAccPortId portId)
+{
+ IxEthAccStatus result;
+
+ if (!IX_ETH_ACC_IS_SERVICE_INITIALIZED())
+ {
+ return (IX_ETH_ACC_FAIL);
+ }
+
+ ixOsalMutexLock(&ixEthAccControlInterfaceMutex, IX_OSAL_WAIT_FOREVER);
+ result = ixEthAccPortMulticastAddressJoinAllPriv(portId);
+ ixOsalMutexUnlock(&ixEthAccControlInterfaceMutex);
+ return result;
+}
+
+IX_ETH_ACC_PUBLIC IxEthAccStatus
+ixEthAccPortMulticastAddressLeave(IxEthAccPortId portId, IxEthAccMacAddr *macAddr)
+{
+ IxEthAccStatus result;
+
+ if (!IX_ETH_ACC_IS_SERVICE_INITIALIZED())
+ {
+ return (IX_ETH_ACC_FAIL);
+ }
+
+ ixOsalMutexLock(&ixEthAccControlInterfaceMutex, IX_OSAL_WAIT_FOREVER);
+ result = ixEthAccPortMulticastAddressLeavePriv(portId, macAddr);
+ ixOsalMutexUnlock(&ixEthAccControlInterfaceMutex);
+ return result;
+}
+
+IX_ETH_ACC_PUBLIC IxEthAccStatus
+ixEthAccPortMulticastAddressLeaveAll(IxEthAccPortId portId)
+{
+ IxEthAccStatus result;
+
+ if (!IX_ETH_ACC_IS_SERVICE_INITIALIZED())
+ {
+ return (IX_ETH_ACC_FAIL);
+ }
+
+ ixOsalMutexLock(&ixEthAccControlInterfaceMutex, IX_OSAL_WAIT_FOREVER);
+ result = ixEthAccPortMulticastAddressLeaveAllPriv(portId);
+ ixOsalMutexUnlock(&ixEthAccControlInterfaceMutex);
+ return result;
+}
+
+IX_ETH_ACC_PUBLIC IxEthAccStatus
+ixEthAccPortUnicastAddressShow(IxEthAccPortId portId)
+{
+ IxEthAccStatus result;
+
+ if (!IX_ETH_ACC_IS_SERVICE_INITIALIZED())
+ {
+ return (IX_ETH_ACC_FAIL);
+ }
+
+ ixOsalMutexLock(&ixEthAccControlInterfaceMutex, IX_OSAL_WAIT_FOREVER);
+ result = ixEthAccPortUnicastAddressShowPriv(portId);
+ ixOsalMutexUnlock(&ixEthAccControlInterfaceMutex);
+ return result;
+}
+
+IX_ETH_ACC_PUBLIC void
+ixEthAccPortMulticastAddressShow(IxEthAccPortId portId)
+{
+ if (!IX_ETH_ACC_IS_SERVICE_INITIALIZED())
+ {
+ return;
+ }
+
+ ixOsalMutexLock(&ixEthAccControlInterfaceMutex, IX_OSAL_WAIT_FOREVER);
+ ixEthAccPortMulticastAddressShowPriv(portId);
+ ixOsalMutexUnlock(&ixEthAccControlInterfaceMutex);
+}
+
+IX_ETH_ACC_PUBLIC IxEthAccStatus
+ixEthAccPortDuplexModeSet(IxEthAccPortId portId, IxEthAccDuplexMode mode)
+{
+ IxEthAccStatus result;
+
+ if (!IX_ETH_ACC_IS_SERVICE_INITIALIZED())
+ {
+ return (IX_ETH_ACC_FAIL);
+ }
+
+ ixOsalMutexLock(&ixEthAccControlInterfaceMutex, IX_OSAL_WAIT_FOREVER);
+ result = ixEthAccPortDuplexModeSetPriv(portId, mode);
+ ixOsalMutexUnlock(&ixEthAccControlInterfaceMutex);
+ return result;
+}
+
+IX_ETH_ACC_PUBLIC IxEthAccStatus
+ixEthAccPortDuplexModeGet(IxEthAccPortId portId, IxEthAccDuplexMode *mode)
+{
+ IxEthAccStatus result;
+
+ if (!IX_ETH_ACC_IS_SERVICE_INITIALIZED())
+ {
+ return (IX_ETH_ACC_FAIL);
+ }
+
+ ixOsalMutexLock(&ixEthAccControlInterfaceMutex, IX_OSAL_WAIT_FOREVER);
+ result = ixEthAccPortDuplexModeGetPriv(portId, mode);
+ ixOsalMutexUnlock(&ixEthAccControlInterfaceMutex);
+ return result;
+}
+
+IX_ETH_ACC_PUBLIC IxEthAccStatus
+ixEthAccPortTxFrameAppendPaddingEnable(IxEthAccPortId portId)
+{
+ IxEthAccStatus result;
+
+ if (!IX_ETH_ACC_IS_SERVICE_INITIALIZED())
+ {
+ return (IX_ETH_ACC_FAIL);
+ }
+
+ ixOsalMutexLock(&ixEthAccControlInterfaceMutex, IX_OSAL_WAIT_FOREVER);
+ result = ixEthAccPortTxFrameAppendPaddingEnablePriv(portId);
+ ixOsalMutexUnlock(&ixEthAccControlInterfaceMutex);
+ return result;
+}
+
+IX_ETH_ACC_PUBLIC IxEthAccStatus
+ixEthAccPortTxFrameAppendPaddingDisable(IxEthAccPortId portId)
+{
+ IxEthAccStatus result;
+
+ if (!IX_ETH_ACC_IS_SERVICE_INITIALIZED())
+ {
+ return (IX_ETH_ACC_FAIL);
+ }
+
+ ixOsalMutexLock(&ixEthAccControlInterfaceMutex, IX_OSAL_WAIT_FOREVER);
+ result = ixEthAccPortTxFrameAppendPaddingDisablePriv(portId);
+ ixOsalMutexUnlock(&ixEthAccControlInterfaceMutex);
+ return result;
+}
+
+IX_ETH_ACC_PUBLIC IxEthAccStatus
+ixEthAccPortTxFrameAppendFCSEnable(IxEthAccPortId portId)
+{
+ IxEthAccStatus result;
+
+ if (!IX_ETH_ACC_IS_SERVICE_INITIALIZED())
+ {
+ return (IX_ETH_ACC_FAIL);
+ }
+
+ ixOsalMutexLock(&ixEthAccControlInterfaceMutex, IX_OSAL_WAIT_FOREVER);
+ result = ixEthAccPortTxFrameAppendFCSEnablePriv(portId);
+ ixOsalMutexUnlock(&ixEthAccControlInterfaceMutex);
+ return result;
+}
+
+IX_ETH_ACC_PUBLIC IxEthAccStatus
+ixEthAccPortTxFrameAppendFCSDisable(IxEthAccPortId portId)
+{
+ IxEthAccStatus result;
+
+ if (!IX_ETH_ACC_IS_SERVICE_INITIALIZED())
+ {
+ return (IX_ETH_ACC_FAIL);
+ }
+
+ ixOsalMutexLock(&ixEthAccControlInterfaceMutex, IX_OSAL_WAIT_FOREVER);
+ result = ixEthAccPortTxFrameAppendFCSDisablePriv(portId);
+ ixOsalMutexUnlock(&ixEthAccControlInterfaceMutex);
+ return result;
+}
+
+IX_ETH_ACC_PUBLIC IxEthAccStatus
+ixEthAccPortRxFrameAppendFCSEnable(IxEthAccPortId portId)
+{
+ IxEthAccStatus result;
+
+ if (!IX_ETH_ACC_IS_SERVICE_INITIALIZED())
+ {
+ return (IX_ETH_ACC_FAIL);
+ }
+
+ ixOsalMutexLock(&ixEthAccControlInterfaceMutex, IX_OSAL_WAIT_FOREVER);
+ result = ixEthAccPortRxFrameAppendFCSEnablePriv(portId);
+ ixOsalMutexUnlock(&ixEthAccControlInterfaceMutex);
+ return result;
+}
+
+IX_ETH_ACC_PUBLIC IxEthAccStatus
+ixEthAccPortRxFrameAppendFCSDisable(IxEthAccPortId portId)
+{
+ IxEthAccStatus result;
+
+ if (!IX_ETH_ACC_IS_SERVICE_INITIALIZED())
+ {
+ return (IX_ETH_ACC_FAIL);
+ }
+
+ ixOsalMutexLock(&ixEthAccControlInterfaceMutex, IX_OSAL_WAIT_FOREVER);
+ result = ixEthAccPortRxFrameAppendFCSDisablePriv(portId);
+ ixOsalMutexUnlock(&ixEthAccControlInterfaceMutex);
+ return result;
+}
+
+IX_ETH_ACC_PUBLIC IxEthAccStatus
+ixEthAccTxSchedulingDisciplineSet(IxEthAccPortId portId, IxEthAccSchedulerDiscipline sched)
+{
+ IxEthAccStatus result;
+
+ if (!IX_ETH_ACC_IS_SERVICE_INITIALIZED())
+ {
+ return (IX_ETH_ACC_FAIL);
+ }
+
+ ixOsalMutexLock(&ixEthAccControlInterfaceMutex, IX_OSAL_WAIT_FOREVER);
+ result = ixEthAccTxSchedulingDisciplineSetPriv(portId, sched);
+ ixOsalMutexUnlock(&ixEthAccControlInterfaceMutex);
+ return result;
+}
+
+IX_ETH_ACC_PUBLIC IxEthAccStatus
+ixEthAccRxSchedulingDisciplineSet(IxEthAccSchedulerDiscipline sched)
+{
+ IxEthAccStatus result;
+
+ if (!IX_ETH_ACC_IS_SERVICE_INITIALIZED())
+ {
+ return (IX_ETH_ACC_FAIL);
+ }
+
+ ixOsalMutexLock(&ixEthAccControlInterfaceMutex, IX_OSAL_WAIT_FOREVER);
+ result = ixEthAccRxSchedulingDisciplineSetPriv(sched);
+ ixOsalMutexUnlock(&ixEthAccControlInterfaceMutex);
+ return result;
+}
+
+IX_ETH_ACC_PUBLIC IxEthAccStatus
+ixEthAccPortNpeLoopbackEnable(IxEthAccPortId portId)
+{
+ IxEthAccStatus result;
+
+ if (!IX_ETH_ACC_IS_SERVICE_INITIALIZED())
+ {
+ return (IX_ETH_ACC_FAIL);
+ }
+
+ ixOsalMutexLock(&ixEthAccControlInterfaceMutex, IX_OSAL_WAIT_FOREVER);
+ result = ixEthAccNpeLoopbackEnablePriv(portId);
+ ixOsalMutexUnlock(&ixEthAccControlInterfaceMutex);
+ return result;
+}
+
+IX_ETH_ACC_PUBLIC IxEthAccStatus
+ixEthAccPortTxEnable(IxEthAccPortId portId)
+{
+ IxEthAccStatus result;
+
+ if (!IX_ETH_ACC_IS_SERVICE_INITIALIZED())
+ {
+ return (IX_ETH_ACC_FAIL);
+ }
+
+ ixOsalMutexLock(&ixEthAccControlInterfaceMutex, IX_OSAL_WAIT_FOREVER);
+ result = ixEthAccPortTxEnablePriv(portId);
+ ixOsalMutexUnlock(&ixEthAccControlInterfaceMutex);
+ return result;
+}
+
+IX_ETH_ACC_PUBLIC IxEthAccStatus
+ixEthAccPortRxEnable(IxEthAccPortId portId)
+{
+ IxEthAccStatus result;
+
+ if (!IX_ETH_ACC_IS_SERVICE_INITIALIZED())
+ {
+ return (IX_ETH_ACC_FAIL);
+ }
+
+ ixOsalMutexLock(&ixEthAccControlInterfaceMutex, IX_OSAL_WAIT_FOREVER);
+ result = ixEthAccPortRxEnablePriv(portId);
+ ixOsalMutexUnlock(&ixEthAccControlInterfaceMutex);
+ return result;
+}
+
+IX_ETH_ACC_PUBLIC IxEthAccStatus
+ixEthAccPortNpeLoopbackDisable(IxEthAccPortId portId)
+{
+ IxEthAccStatus result;
+
+ if (!IX_ETH_ACC_IS_SERVICE_INITIALIZED())
+ {
+ return (IX_ETH_ACC_FAIL);
+ }
+
+ ixOsalMutexLock(&ixEthAccControlInterfaceMutex, IX_OSAL_WAIT_FOREVER);
+ result = ixEthAccNpeLoopbackDisablePriv(portId);
+ ixOsalMutexUnlock(&ixEthAccControlInterfaceMutex);
+ return result;
+}
+
+IX_ETH_ACC_PUBLIC IxEthAccStatus
+ixEthAccPortTxDisable(IxEthAccPortId portId)
+{
+ IxEthAccStatus result;
+
+ if (!IX_ETH_ACC_IS_SERVICE_INITIALIZED())
+ {
+ return (IX_ETH_ACC_FAIL);
+ }
+
+ ixOsalMutexLock(&ixEthAccControlInterfaceMutex, IX_OSAL_WAIT_FOREVER);
+ result = ixEthAccPortTxDisablePriv(portId);
+ ixOsalMutexUnlock(&ixEthAccControlInterfaceMutex);
+ return result;
+}
+
+IX_ETH_ACC_PUBLIC IxEthAccStatus
+ixEthAccPortRxDisable(IxEthAccPortId portId)
+{
+ IxEthAccStatus result;
+
+ if (!IX_ETH_ACC_IS_SERVICE_INITIALIZED())
+ {
+ return (IX_ETH_ACC_FAIL);
+ }
+
+ ixOsalMutexLock(&ixEthAccControlInterfaceMutex, IX_OSAL_WAIT_FOREVER);
+ result = ixEthAccPortRxDisablePriv(portId);
+ ixOsalMutexUnlock(&ixEthAccControlInterfaceMutex);
+ return result;
+}
+
+IX_ETH_ACC_PUBLIC IxEthAccStatus
+ixEthAccPortMacReset(IxEthAccPortId portId)
+{
+ IxEthAccStatus result;
+
+ if (!IX_ETH_ACC_IS_SERVICE_INITIALIZED())
+ {
+ return (IX_ETH_ACC_FAIL);
+ }
+
+ ixOsalMutexLock(&ixEthAccControlInterfaceMutex, IX_OSAL_WAIT_FOREVER);
+ result = ixEthAccPortMacResetPriv(portId);
+ ixOsalMutexUnlock(&ixEthAccControlInterfaceMutex);
+ return result;
+}
diff --git a/cpu/ixp/npe/IxEthAccDataPlane.c b/cpu/ixp/npe/IxEthAccDataPlane.c
new file mode 100644
index 0000000000..e46fc9b25a
--- /dev/null
+++ b/cpu/ixp/npe/IxEthAccDataPlane.c
@@ -0,0 +1,2483 @@
+/**
+ * @file IxEthDataPlane.c
+ *
+ * @author Intel Corporation
+ * @date 12-Feb-2002
+ *
+ * @brief This file contains the implementation of the IXPxxx
+ * Ethernet Access Data plane component
+ *
+ * Design Notes:
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+#include "IxNpeMh.h"
+#include "IxEthAcc.h"
+#include "IxEthDB.h"
+#include "IxOsal.h"
+#include "IxEthDBPortDefs.h"
+#include "IxFeatureCtrl.h"
+#include "IxEthAcc_p.h"
+#include "IxEthAccQueueAssign_p.h"
+
+extern PUBLIC IxEthAccMacState ixEthAccMacState[];
+extern PUBLIC UINT32 ixEthAccNewSrcMask;
+
+/**
+ * private functions prototype
+ */
+PRIVATE IX_OSAL_MBUF *
+ixEthAccEntryFromQConvert(UINT32 qEntry, UINT32 mask);
+
+PRIVATE UINT32
+ixEthAccMbufRxQPrepare(IX_OSAL_MBUF *mbuf);
+
+PRIVATE UINT32
+ixEthAccMbufTxQPrepare(IX_OSAL_MBUF *mbuf);
+
+PRIVATE IxEthAccStatus
+ixEthAccTxSwQHighestPriorityGet(IxEthAccPortId portId,
+ IxEthAccTxPriority *priorityPtr);
+
+PRIVATE IxEthAccStatus
+ixEthAccTxFromSwQ(IxEthAccPortId portId,
+ IxEthAccTxPriority priority);
+
+PRIVATE IxEthAccStatus
+ixEthAccRxFreeFromSwQ(IxEthAccPortId portId);
+
+PRIVATE void
+ixEthAccMbufFromTxQ(IX_OSAL_MBUF *mbuf);
+
+PRIVATE void
+ixEthAccMbufFromRxQ(IX_OSAL_MBUF *mbuf);
+
+PRIVATE IX_STATUS
+ixEthAccQmgrLockTxWrite(IxEthAccPortId portId,
+ UINT32 qBuffer);
+
+PRIVATE IX_STATUS
+ixEthAccQmgrLockRxWrite(IxEthAccPortId portId,
+ UINT32 qBuffer);
+
+PRIVATE IX_STATUS
+ixEthAccQmgrTxWrite(IxEthAccPortId portId,
+ UINT32 qBuffer,
+ UINT32 priority);
+
+/**
+ * @addtogroup IxEthAccPri
+ *@{
+ */
+
+/* increment a counter only when stats are enabled */
+#define TX_STATS_INC(port,field) \
+ IX_ETH_ACC_STATS_INC(ixEthAccPortData[port].ixEthAccTxData.stats.field)
+#define RX_STATS_INC(port,field) \
+ IX_ETH_ACC_STATS_INC(ixEthAccPortData[port].ixEthAccRxData.stats.field)
+
+/* always increment the counter (mainly used for unexpected errors) */
+#define TX_INC(port,field) \
+ ixEthAccPortData[port].ixEthAccTxData.stats.field++
+#define RX_INC(port,field) \
+ ixEthAccPortData[port].ixEthAccRxData.stats.field++
+
+PRIVATE IxEthAccDataPlaneStats ixEthAccDataStats;
+
+extern IxEthAccPortDataInfo ixEthAccPortData[];
+extern IxEthAccInfo ixEthAccDataInfo;
+
+PRIVATE IxOsalFastMutex txWriteMutex[IX_ETH_ACC_NUMBER_OF_PORTS];
+PRIVATE IxOsalFastMutex rxWriteMutex[IX_ETH_ACC_NUMBER_OF_PORTS];
+
+/**
+ *
+ * @brief Mbuf header conversion macros : they implement the
+ * different conversions using a temporary value. They also double-check
+ * that the parameters can be converted to/from NPE format.
+ *
+ */
+#if defined(__wince) && !defined(IN_KERNEL)
+#define PTR_VIRT2NPE(ptrSrc,dst) \
+ do { UINT32 temp; \
+ IX_OSAL_ENSURE(sizeof(ptrSrc) == sizeof(UINT32), "Wrong parameter type"); \
+ IX_OSAL_ENSURE(sizeof(dst) == sizeof(UINT32), "Wrong parameter type"); \
+ temp = (UINT32)IX_OSAL_MBUF_MBUF_VIRTUAL_TO_PHYSICAL_TRANSLATION((IX_OSAL_MBUF*)ptrSrc); \
+ (dst) = IX_OSAL_SWAP_BE_SHARED_LONG(temp); } \
+ while(0)
+
+#define PTR_NPE2VIRT(type,src,ptrDst) \
+ do { void *temp; \
+ IX_OSAL_ENSURE(sizeof(type) == sizeof(UINT32), "Wrong parameter type"); \
+ IX_OSAL_ENSURE(sizeof(src) == sizeof(UINT32), "Wrong parameter type"); \
+ IX_OSAL_ENSURE(sizeof(ptrDst) == sizeof(UINT32), "Wrong parameter type"); \
+ temp = (void *)IX_OSAL_SWAP_BE_SHARED_LONG(src); \
+ (ptrDst) = (type)IX_OSAL_MBUF_MBUF_PHYSICAL_TO_VIRTUAL_TRANSLATION(temp); } \
+ while(0)
+#else
+#define PTR_VIRT2NPE(ptrSrc,dst) \
+ do { UINT32 temp; \
+ IX_OSAL_ENSURE(sizeof(ptrSrc) == sizeof(UINT32), "Wrong parameter type"); \
+ IX_OSAL_ENSURE(sizeof(dst) == sizeof(UINT32), "Wrong parameter type"); \
+ temp = (UINT32)IX_OSAL_MMU_VIRT_TO_PHYS(ptrSrc); \
+ (dst) = IX_OSAL_SWAP_BE_SHARED_LONG(temp); } \
+ while(0)
+
+#define PTR_NPE2VIRT(type,src,ptrDst) \
+ do { void *temp; \
+ IX_OSAL_ENSURE(sizeof(type) == sizeof(UINT32), "Wrong parameter type"); \
+ IX_OSAL_ENSURE(sizeof(src) == sizeof(UINT32), "Wrong parameter type"); \
+ IX_OSAL_ENSURE(sizeof(ptrDst) == sizeof(UINT32), "Wrong parameter type"); \
+ temp = (void *)IX_OSAL_SWAP_BE_SHARED_LONG(src); \
+ (ptrDst) = (type)IX_OSAL_MMU_PHYS_TO_VIRT(temp); } \
+ while(0)
+#endif
+
+/**
+ *
+ * @brief Mbuf payload pointer conversion macros : Wince has its own
+ * method to convert the buffer pointers
+ */
+#if defined(__wince) && !defined(IN_KERNEL)
+#define DATAPTR_VIRT2NPE(ptrSrc,dst) \
+ do { UINT32 temp; \
+ temp = (UINT32)IX_OSAL_MBUF_DATA_VIRTUAL_TO_PHYSICAL_TRANSLATION(ptrSrc); \
+ (dst) = IX_OSAL_SWAP_BE_SHARED_LONG(temp); } \
+ while(0)
+
+#else
+#define DATAPTR_VIRT2NPE(ptrSrc,dst) PTR_VIRT2NPE(IX_OSAL_MBUF_MDATA(ptrSrc),dst)
+#endif
+
+
+/* Flush the shared part of the mbuf header */
+#define IX_ETHACC_NE_CACHE_FLUSH(mbufPtr) \
+ do { \
+ IX_OSAL_CACHE_FLUSH(IX_ETHACC_NE_SHARED(mbufPtr), \
+ sizeof(IxEthAccNe)); \
+ } \
+ while(0)
+
+/* Invalidate the shared part of the mbuf header */
+#define IX_ETHACC_NE_CACHE_INVALIDATE(mbufPtr) \
+ do { \
+ IX_OSAL_CACHE_INVALIDATE(IX_ETHACC_NE_SHARED(mbufPtr), \
+ sizeof(IxEthAccNe)); \
+ } \
+ while(0)
+
+/* Preload one cache line (shared mbuf headers are aligned
+ * and their size is 1 cache line)
+ *
+ * IX_OSAL_CACHED is defined when the mbuf headers are
+ * allocated from cached memory.
+ *
+ * Other processor on emulation environment may not implement
+ * preload function
+ */
+#ifdef IX_OSAL_CACHED
+ #if (CPU!=SIMSPARCSOLARIS) && !defined (__wince)
+ #define IX_ACC_DATA_CACHE_PRELOAD(ptr) \
+ do { /* preload a cache line (Xscale Processor) */ \
+ __asm__ (" pld [%0]\n": : "r" (ptr)); \
+ } \
+ while(0)
+ #else
+ /* preload not implemented on different processor */
+ #define IX_ACC_DATA_CACHE_PRELOAD(mbufPtr) \
+ do { /* nothing */ } while (0)
+ #endif
+#else
+ /* preload not needed if cache is not enabled */
+ #define IX_ACC_DATA_CACHE_PRELOAD(mbufPtr) \
+ do { /* nothing */ } while (0)
+#endif
+
+/**
+ *
+ * @brief function to retrieve the correct pointer from
+ * a queue entry posted by the NPE
+ *
+ * @param qEntry : entry from qmgr queue
+ * mask : applicable mask for this queue
+ * (4 most significant bits are used for additional informations)
+ *
+ * @return IX_OSAL_MBUF * pointer to mbuf header
+ *
+ * @internal
+ */
+PRIVATE IX_OSAL_MBUF *
+ixEthAccEntryFromQConvert(UINT32 qEntry, UINT32 mask)
+{
+ IX_OSAL_MBUF *mbufPtr;
+
+ if (qEntry != 0)
+ {
+ /* mask NPE bits (e.g. priority, port ...) */
+ qEntry &= mask;
+
+#if IX_ACC_DRAM_PHYS_OFFSET != 0
+ /* restore the original address pointer (if PHYS_OFFSET is not 0) */
+ qEntry |= (IX_ACC_DRAM_PHYS_OFFSET & ~IX_ETHNPE_QM_Q_RXENET_ADDR_MASK);
+#endif
+ /* get the mbuf pointer address from the npe-shared address */
+ qEntry -= offsetof(IX_OSAL_MBUF,ix_ne);
+
+ /* phys2virt mbuf */
+ mbufPtr = (IX_OSAL_MBUF *)IX_OSAL_MMU_PHYS_TO_VIRT(qEntry);
+
+ /* preload the cacheline shared with NPE */
+ IX_ACC_DATA_CACHE_PRELOAD(IX_ETHACC_NE_SHARED(mbufPtr));
+
+ /* preload the cacheline used by xscale */
+ IX_ACC_DATA_CACHE_PRELOAD(mbufPtr);
+ }
+ else
+ {
+ mbufPtr = NULL;
+ }
+
+ return mbufPtr;
+}
+
+/* Convert the mbuf header for NPE transmission */
+PRIVATE UINT32
+ixEthAccMbufTxQPrepare(IX_OSAL_MBUF *mbuf)
+{
+ UINT32 qbuf;
+ UINT32 len;
+
+ /* endianess swap for tci and flags
+ note: this is done only once, even for chained buffers */
+ IX_ETHACC_NE_FLAGS(mbuf) = IX_OSAL_SWAP_BE_SHARED_SHORT(IX_ETHACC_NE_FLAGS(mbuf));
+ IX_ETHACC_NE_VLANTCI(mbuf) = IX_OSAL_SWAP_BE_SHARED_SHORT(IX_ETHACC_NE_VLANTCI(mbuf));
+
+ /* test for unchained mbufs */
+ if (IX_OSAL_MBUF_NEXT_BUFFER_IN_PKT_PTR(mbuf) == NULL)
+ {
+ /* "best case" scenario : unchained mbufs */
+ IX_ETH_ACC_STATS_INC(ixEthAccDataStats.unchainedTxMBufs);
+
+ /* payload pointer conversion */
+ DATAPTR_VIRT2NPE(mbuf, IX_ETHACC_NE_DATA(mbuf));
+
+ /* unchained mbufs : the frame length is the mbuf length
+ * and the 2 identical lengths are stored in the same
+ * word.
+ */
+ len = IX_OSAL_MBUF_MLEN(mbuf);
+
+ /* set the length in both length and pktLen 16-bits fields */
+ len |= (len << IX_ETHNPE_ACC_LENGTH_OFFSET);
+ IX_ETHACC_NE_LEN(mbuf) = IX_OSAL_SWAP_BE_SHARED_LONG(len);
+
+ /* unchained mbufs : next contains 0 */
+ IX_ETHACC_NE_NEXT(mbuf) = 0;
+
+ /* flush shared header after all address conversions */
+ IX_ETHACC_NE_CACHE_FLUSH(mbuf);
+ }
+ else
+ {
+ /* chained mbufs */
+ IX_OSAL_MBUF *ptr = mbuf;
+ IX_OSAL_MBUF *nextPtr;
+ UINT32 frmLen;
+
+ /* get the frame length from the header of the first buffer */
+ frmLen = IX_OSAL_MBUF_PKT_LEN(mbuf);
+
+ do
+ {
+ IX_ETH_ACC_STATS_INC(ixEthAccDataStats.chainedTxMBufs);
+
+ /* payload pointer */
+ DATAPTR_VIRT2NPE(ptr,IX_ETHACC_NE_DATA(ptr));
+ /* Buffer length and frame length are stored in the same word */
+ len = IX_OSAL_MBUF_MLEN(ptr);
+ len = frmLen | (len << IX_ETHNPE_ACC_LENGTH_OFFSET);
+ IX_ETHACC_NE_LEN(ptr) = IX_OSAL_SWAP_BE_SHARED_LONG(len);
+
+ /* get the virtual next chain pointer */
+ nextPtr = IX_OSAL_MBUF_NEXT_BUFFER_IN_PKT_PTR(ptr);
+ if (nextPtr != NULL)
+ {
+ /* shared pointer of the next buffer is chained */
+ PTR_VIRT2NPE(IX_ETHACC_NE_SHARED(nextPtr),
+ IX_ETHACC_NE_NEXT(ptr));
+ }
+ else
+ {
+ IX_ETHACC_NE_NEXT(ptr) = 0;
+ }
+
+ /* flush shared header after all address conversions */
+ IX_ETHACC_NE_CACHE_FLUSH(ptr);
+
+ /* move to next buffer */
+ ptr = nextPtr;
+
+ /* the frame length field is set only in the first buffer
+ * and is zeroed in the next buffers
+ */
+ frmLen = 0;
+ }
+ while(ptr != NULL);
+
+ }
+
+ /* virt2phys mbuf itself */
+ qbuf = (UINT32)IX_OSAL_MMU_VIRT_TO_PHYS(
+ IX_ETHACC_NE_SHARED(mbuf));
+
+ /* Ensure the bits which are reserved to exchange information with
+ * the NPE are cleared
+ *
+ * If the mbuf address is not correctly aligned, or from an
+ * incompatible memory range, there is no point to continue
+ */
+ IX_OSAL_ENSURE(((qbuf & ~IX_ETHNPE_QM_Q_TXENET_ADDR_MASK) == 0),
+ "Invalid address range");
+
+ return qbuf;
+}
+
+/* Convert the mbuf header for NPE reception */
+PRIVATE UINT32
+ixEthAccMbufRxQPrepare(IX_OSAL_MBUF *mbuf)
+{
+ UINT32 len;
+ UINT32 qbuf;
+
+ if (IX_OSAL_MBUF_NEXT_BUFFER_IN_PKT_PTR(mbuf) == NULL)
+ {
+ /* "best case" scenario : unchained mbufs */
+ IX_ETH_ACC_STATS_INC(ixEthAccDataStats.unchainedRxFreeMBufs);
+
+ /* unchained mbufs : payload pointer */
+ DATAPTR_VIRT2NPE(mbuf, IX_ETHACC_NE_DATA(mbuf));
+
+ /* unchained mbufs : set the buffer length
+ * and the frame length field is zeroed
+ */
+ len = (IX_OSAL_MBUF_MLEN(mbuf) << IX_ETHNPE_ACC_LENGTH_OFFSET);
+ IX_ETHACC_NE_LEN(mbuf) = IX_OSAL_SWAP_BE_SHARED_LONG(len);
+
+ /* unchained mbufs : next pointer is null */
+ IX_ETHACC_NE_NEXT(mbuf) = 0;
+
+ /* flush shared header after all address conversions */
+ IX_ETHACC_NE_CACHE_FLUSH(mbuf);
+
+ /* remove shared header cache line */
+ IX_ETHACC_NE_CACHE_INVALIDATE(mbuf);
+ }
+ else
+ {
+ /* chained mbufs */
+ IX_OSAL_MBUF *ptr = mbuf;
+ IX_OSAL_MBUF *nextPtr;
+
+ do
+ {
+ /* chained mbufs */
+ IX_ETH_ACC_STATS_INC(ixEthAccDataStats.chainedRxFreeMBufs);
+
+ /* we must save virtual next chain pointer */
+ nextPtr = IX_OSAL_MBUF_NEXT_BUFFER_IN_PKT_PTR(ptr);
+
+ if (nextPtr != NULL)
+ {
+ /* chaining pointer for NPE */
+ PTR_VIRT2NPE(IX_ETHACC_NE_SHARED(nextPtr),
+ IX_ETHACC_NE_NEXT(ptr));
+ }
+ else
+ {
+ IX_ETHACC_NE_NEXT(ptr) = 0;
+ }
+
+ /* payload pointer */
+ DATAPTR_VIRT2NPE(ptr,IX_ETHACC_NE_DATA(ptr));
+
+ /* buffer length */
+ len = (IX_OSAL_MBUF_MLEN(ptr) << IX_ETHNPE_ACC_LENGTH_OFFSET);
+ IX_ETHACC_NE_LEN(ptr) = IX_OSAL_SWAP_BE_SHARED_LONG(len);
+
+ /* flush shared header after all address conversions */
+ IX_ETHACC_NE_CACHE_FLUSH(ptr);
+
+ /* remove shared header cache line */
+ IX_ETHACC_NE_CACHE_INVALIDATE(ptr);
+
+ /* next mbuf in the chain */
+ ptr = nextPtr;
+ }
+ while(ptr != NULL);
+ }
+
+ /* virt2phys mbuf itself */
+ qbuf = (UINT32)IX_OSAL_MMU_VIRT_TO_PHYS(
+ IX_ETHACC_NE_SHARED(mbuf));
+
+ /* Ensure the bits which are reserved to exchange information with
+ * the NPE are cleared
+ *
+ * If the mbuf address is not correctly aligned, or from an
+ * incompatible memory range, there is no point to continue
+ */
+ IX_OSAL_ENSURE(((qbuf & ~IX_ETHNPE_QM_Q_RXENET_ADDR_MASK) == 0),
+ "Invalid address range");
+
+ return qbuf;
+}
+
+/* Convert the mbuf header after NPE transmission
+ * Since there is nothing changed by the NPE, there is no need
+ * to process anything but the update of internal stats
+ * when they are enabled
+*/
+PRIVATE void
+ixEthAccMbufFromTxQ(IX_OSAL_MBUF *mbuf)
+{
+#ifndef NDEBUG
+ /* test for unchained mbufs */
+ if (IX_ETHACC_NE_NEXT(mbuf) == 0)
+ {
+ /* unchained mbufs : update the stats */
+ IX_ETH_ACC_STATS_INC(ixEthAccDataStats.unchainedTxDoneMBufs);
+ }
+ else
+ {
+ /* chained mbufs : walk the chain and update the stats */
+ IX_OSAL_MBUF *ptr = mbuf;
+
+ do
+ {
+ IX_ETH_ACC_STATS_INC(ixEthAccDataStats.chainedTxDoneMBufs);
+ ptr = IX_OSAL_MBUF_NEXT_BUFFER_IN_PKT_PTR(ptr);
+ }
+ while (ptr != NULL);
+ }
+#endif
+}
+
+/* Convert the mbuf header after NPE reception */
+PRIVATE void
+ixEthAccMbufFromRxQ(IX_OSAL_MBUF *mbuf)
+{
+ UINT32 len;
+
+ /* endianess swap for tci and flags
+ note: this is done only once, even for chained buffers */
+ IX_ETHACC_NE_FLAGS(mbuf) = IX_OSAL_SWAP_BE_SHARED_SHORT(IX_ETHACC_NE_FLAGS(mbuf));
+ IX_ETHACC_NE_VLANTCI(mbuf) = IX_OSAL_SWAP_BE_SHARED_SHORT(IX_ETHACC_NE_VLANTCI(mbuf));
+
+ /* test for unchained mbufs */
+ if (IX_ETHACC_NE_NEXT(mbuf) == 0)
+ {
+ /* unchained mbufs */
+ IX_ETH_ACC_STATS_INC(ixEthAccDataStats.unchainedRxMBufs);
+
+ /* get the frame length. it is the same than the buffer length */
+ len = IX_OSAL_SWAP_BE_SHARED_LONG(IX_ETHACC_NE_LEN(mbuf));
+ len &= IX_ETHNPE_ACC_PKTLENGTH_MASK;
+ IX_OSAL_MBUF_PKT_LEN(mbuf) = IX_OSAL_MBUF_MLEN(mbuf) = len;
+
+ /* clears the next packet field */
+ IX_OSAL_MBUF_NEXT_BUFFER_IN_PKT_PTR(mbuf) = NULL;
+ }
+ else
+ {
+ IX_OSAL_MBUF *ptr = mbuf;
+ IX_OSAL_MBUF *nextPtr;
+ UINT32 frmLen;
+
+ /* convert the frame length */
+ frmLen = IX_OSAL_SWAP_BE_SHARED_LONG(IX_ETHACC_NE_LEN(mbuf));
+ IX_OSAL_MBUF_PKT_LEN(mbuf) = (frmLen & IX_ETHNPE_ACC_PKTLENGTH_MASK);
+
+ /* chained mbufs */
+ do
+ {
+ IX_ETH_ACC_STATS_INC(ixEthAccDataStats.chainedRxMBufs);
+
+ /* convert the length */
+ len = IX_OSAL_SWAP_BE_SHARED_LONG(IX_ETHACC_NE_LEN(ptr));
+ IX_OSAL_MBUF_MLEN(ptr) = (len >> IX_ETHNPE_ACC_LENGTH_OFFSET);
+
+ /* get the next pointer */
+ PTR_NPE2VIRT(IX_OSAL_MBUF *,IX_ETHACC_NE_NEXT(ptr), nextPtr);
+ if (nextPtr != NULL)
+ {
+ nextPtr = (IX_OSAL_MBUF *)((UINT8 *)nextPtr - offsetof(IX_OSAL_MBUF,ix_ne));
+ }
+ /* set the next pointer */
+ IX_OSAL_MBUF_NEXT_BUFFER_IN_PKT_PTR(ptr) = nextPtr;
+
+ /* move to the next buffer */
+ ptr = nextPtr;
+ }
+ while (ptr != NULL);
+ }
+}
+
+/* write to qmgr if possible and report an overflow if not possible
+ * Use a fast lock to protect the queue write.
+ * This way, the tx feature is reentrant.
+ */
+PRIVATE IX_STATUS
+ixEthAccQmgrLockTxWrite(IxEthAccPortId portId, UINT32 qBuffer)
+{
+ IX_STATUS qStatus;
+ if (ixOsalFastMutexTryLock(&txWriteMutex[portId]) == IX_SUCCESS)
+ {
+ qStatus = ixQMgrQWrite(
+ IX_ETH_ACC_PORT_TO_TX_Q_ID(portId),
+ &qBuffer);
+#ifndef NDEBUG
+ if (qStatus != IX_SUCCESS)
+ {
+ TX_STATS_INC(portId, txOverflow);
+ }
+#endif
+ ixOsalFastMutexUnlock(&txWriteMutex[portId]);
+ }
+ else
+ {
+ TX_STATS_INC(portId, txLock);
+ qStatus = IX_QMGR_Q_OVERFLOW;
+ }
+ return qStatus;
+}
+
+/* write to qmgr if possible and report an overflow if not possible
+ * Use a fast lock to protect the queue write.
+ * This way, the Rx feature is reentrant.
+ */
+PRIVATE IX_STATUS
+ixEthAccQmgrLockRxWrite(IxEthAccPortId portId, UINT32 qBuffer)
+{
+ IX_STATUS qStatus;
+ if (ixOsalFastMutexTryLock(&rxWriteMutex[portId]) == IX_SUCCESS)
+ {
+ qStatus = ixQMgrQWrite(
+ IX_ETH_ACC_PORT_TO_RX_FREE_Q_ID(portId),
+ &qBuffer);
+#ifndef NDEBUG
+ if (qStatus != IX_SUCCESS)
+ {
+ RX_STATS_INC(portId, rxFreeOverflow);
+ }
+#endif
+ ixOsalFastMutexUnlock(&rxWriteMutex[portId]);
+ }
+ else
+ {
+ RX_STATS_INC(portId, rxFreeLock);
+ qStatus = IX_QMGR_Q_OVERFLOW;
+ }
+ return qStatus;
+}
+
+/*
+ * Set the priority and write to a qmgr queue.
+ */
+PRIVATE IX_STATUS
+ixEthAccQmgrTxWrite(IxEthAccPortId portId, UINT32 qBuffer, UINT32 priority)
+{
+ /* fill the priority field */
+ qBuffer |= (priority << IX_ETHNPE_QM_Q_FIELD_PRIOR_R);
+
+ return ixEthAccQmgrLockTxWrite(portId, qBuffer);
+}
+
+/**
+ *
+ * @brief This function will discover the highest priority S/W Tx Q that
+ * has entries in it
+ *
+ * @param portId - (in) the id of the port whose S/W Tx queues are to be searched
+ * priorityPtr - (out) the priority of the highest priority occupied q will be written
+ * here
+ *
+ * @return IX_ETH_ACC_SUCCESS if an occupied Q is found
+ * IX_ETH_ACC_FAIL if no Q has entries
+ *
+ * @internal
+ */
+PRIVATE IxEthAccStatus
+ixEthAccTxSwQHighestPriorityGet(IxEthAccPortId portId,
+ IxEthAccTxPriority *priorityPtr)
+{
+ if (ixEthAccPortData[portId].ixEthAccTxData.schDiscipline
+ == FIFO_NO_PRIORITY)
+ {
+ if(IX_ETH_ACC_DATAPLANE_IS_Q_EMPTY(ixEthAccPortData[portId].
+ ixEthAccTxData.txQ[IX_ETH_ACC_TX_DEFAULT_PRIORITY]))
+ {
+ return IX_ETH_ACC_FAIL;
+ }
+ else
+ {
+ *priorityPtr = IX_ETH_ACC_TX_DEFAULT_PRIORITY;
+ TX_STATS_INC(portId,txPriority[*priorityPtr]);
+ return IX_ETH_ACC_SUCCESS;
+ }
+ }
+ else
+ {
+ IxEthAccTxPriority highestPriority = IX_ETH_ACC_TX_PRIORITY_7;
+ while(1)
+ {
+ if(!IX_ETH_ACC_DATAPLANE_IS_Q_EMPTY(ixEthAccPortData[portId].
+ ixEthAccTxData.txQ[highestPriority]))
+ {
+
+ *priorityPtr = highestPriority;
+ TX_STATS_INC(portId,txPriority[highestPriority]);
+ return IX_ETH_ACC_SUCCESS;
+
+ }
+ if (highestPriority == IX_ETH_ACC_TX_PRIORITY_0)
+ {
+ return IX_ETH_ACC_FAIL;
+ }
+ highestPriority--;
+ }
+ }
+}
+
+/**
+ *
+ * @brief This function will take a buffer from a TX S/W Q and attempt
+ * to add it to the relevant TX H/W Q
+ *
+ * @param portId - the port whose TX queue is to be written to
+ * priority - identifies the queue from which the entry is to be read
+ *
+ * @internal
+ */
+PRIVATE IxEthAccStatus
+ixEthAccTxFromSwQ(IxEthAccPortId portId,
+ IxEthAccTxPriority priority)
+{
+ IX_OSAL_MBUF *mbuf;
+ IX_STATUS qStatus;
+
+ IX_OSAL_ENSURE((UINT32)priority <= (UINT32)7, "Invalid priority");
+
+ IX_ETH_ACC_DATAPLANE_REMOVE_MBUF_FROM_Q_HEAD(
+ ixEthAccPortData[portId].ixEthAccTxData.txQ[priority],
+ mbuf);
+
+ if (mbuf != NULL)
+ {
+ /*
+ * Add the Tx buffer to the H/W Tx Q
+ * We do not need to flush here as it is already done
+ * in TxFrameSubmit().
+ */
+ qStatus = ixEthAccQmgrTxWrite(
+ portId,
+ IX_OSAL_MMU_VIRT_TO_PHYS((UINT32)IX_ETHACC_NE_SHARED(mbuf)),
+ priority);
+
+ if (qStatus == IX_SUCCESS)
+ {
+ TX_STATS_INC(portId,txFromSwQOK);
+ return IX_SUCCESS;
+ }
+ else if (qStatus == IX_QMGR_Q_OVERFLOW)
+ {
+ /*
+ * H/W Q overflow, need to save the buffer
+ * back on the s/w Q.
+ * we must put it back on the head of the q to avoid
+ * reordering packet tx
+ */
+ TX_STATS_INC(portId,txFromSwQDelayed);
+ IX_ETH_ACC_DATAPLANE_ADD_MBUF_TO_Q_HEAD(
+ ixEthAccPortData[portId].ixEthAccTxData.txQ[priority],
+ mbuf);
+
+ /*enable Q notification*/
+ qStatus = ixQMgrNotificationEnable(
+ IX_ETH_ACC_PORT_TO_TX_Q_ID(portId),
+ IX_ETH_ACC_PORT_TO_TX_Q_SOURCE(portId));
+
+ if (qStatus != IX_SUCCESS && qStatus != IX_QMGR_WARNING)
+ {
+ TX_INC(portId,txUnexpectedError);
+ IX_ETH_ACC_FATAL_LOG(
+ "ixEthAccTxFromSwQ:Unexpected Error: %u\n",
+ qStatus, 0, 0, 0, 0, 0);
+ }
+ }
+ else
+ {
+ TX_INC(portId,txUnexpectedError);
+
+ /* recovery attempt */
+ IX_ETH_ACC_DATAPLANE_ADD_MBUF_TO_Q_HEAD(
+ ixEthAccPortData[portId].ixEthAccTxData.txQ[priority],
+ mbuf);
+
+ IX_ETH_ACC_FATAL_LOG(
+ "ixEthAccTxFromSwQ:Error: unexpected QM status 0x%08X\n",
+ qStatus, 0, 0, 0, 0, 0);
+ }
+ }
+ else
+ {
+ /* sw queue is empty */
+ }
+ return IX_ETH_ACC_FAIL;
+}
+
+/**
+ *
+ * @brief This function will take a buffer from a RXfree S/W Q and attempt
+ * to add it to the relevant RxFree H/W Q
+ *
+ * @param portId - the port whose RXFree queue is to be written to
+ *
+ * @internal
+ */
+PRIVATE IxEthAccStatus
+ixEthAccRxFreeFromSwQ(IxEthAccPortId portId)
+{
+ IX_OSAL_MBUF *mbuf;
+ IX_STATUS qStatus = IX_SUCCESS;
+
+ IX_ETH_ACC_DATAPLANE_REMOVE_MBUF_FROM_Q_HEAD(
+ ixEthAccPortData[portId].ixEthAccRxData.freeBufferList,
+ mbuf);
+ if (mbuf != NULL)
+ {
+ /*
+ * Add The Rx Buffer to the H/W Free buffer Q if possible
+ */
+ qStatus = ixEthAccQmgrLockRxWrite(portId,
+ IX_OSAL_MMU_VIRT_TO_PHYS(
+ (UINT32)IX_ETHACC_NE_SHARED(mbuf)));
+
+ if (qStatus == IX_SUCCESS)
+ {
+ RX_STATS_INC(portId,rxFreeRepFromSwQOK);
+ /*
+ * Buffer added to h/w Q.
+ */
+ return IX_SUCCESS;
+ }
+ else if (qStatus == IX_QMGR_Q_OVERFLOW)
+ {
+ /*
+ * H/W Q overflow, need to save the buffer back on the s/w Q.
+ */
+ RX_STATS_INC(portId,rxFreeRepFromSwQDelayed);
+
+ IX_ETH_ACC_DATAPLANE_ADD_MBUF_TO_Q_HEAD(
+ ixEthAccPortData[portId].ixEthAccRxData.freeBufferList,
+ mbuf);
+ }
+ else
+ {
+ /* unexpected qmgr error */
+ RX_INC(portId,rxUnexpectedError);
+
+ IX_ETH_ACC_DATAPLANE_ADD_MBUF_TO_Q_HEAD(
+ ixEthAccPortData[portId].ixEthAccRxData.freeBufferList,
+ mbuf);
+
+ IX_ETH_ACC_FATAL_LOG("IxEthAccRxFreeFromSwQ:Error: unexpected QM status 0x%08X\n",
+ qStatus, 0, 0, 0, 0, 0);
+ }
+ }
+ else
+ {
+ /* sw queue is empty */
+ }
+ return IX_ETH_ACC_FAIL;
+}
+
+
+IX_ETH_ACC_PUBLIC
+IxEthAccStatus ixEthAccInitDataPlane()
+{
+ UINT32 portId;
+
+ /*
+ * Initialize the service and register callback to other services.
+ */
+
+ IX_ETH_ACC_MEMSET(&ixEthAccDataStats,
+ 0,
+ sizeof(ixEthAccDataStats));
+
+ for(portId=0; portId < IX_ETH_ACC_NUMBER_OF_PORTS; portId++)
+ {
+ ixOsalFastMutexInit(&txWriteMutex[portId]);
+ ixOsalFastMutexInit(&rxWriteMutex[portId]);
+
+ IX_ETH_ACC_MEMSET(&ixEthAccPortData[portId],
+ 0,
+ sizeof(ixEthAccPortData[portId]));
+
+ ixEthAccPortData[portId].ixEthAccTxData.schDiscipline = FIFO_NO_PRIORITY;
+ }
+
+ return (IX_ETH_ACC_SUCCESS);
+}
+
+
+IX_ETH_ACC_PUBLIC
+IxEthAccStatus ixEthAccPortTxDoneCallbackRegister(IxEthAccPortId portId,
+ IxEthAccPortTxDoneCallback
+ txCallbackFn,
+ UINT32 callbackTag)
+{
+ if (!IX_ETH_ACC_IS_SERVICE_INITIALIZED())
+ {
+ return (IX_ETH_ACC_FAIL);
+ }
+ if (!IX_ETH_ACC_IS_PORT_VALID(portId))
+ {
+ return (IX_ETH_ACC_INVALID_PORT);
+ }
+
+/* HACK: removing this code to enable NPE-A preliminary testing
+ * if (IX_ETH_ACC_SUCCESS != ixEthAccSingleEthNpeCheck(portId))
+ * {
+ * IX_ETH_ACC_WARNING_LOG("ixEthAccPortTxDoneCallbackRegister: Unavailable Eth %d: Cannot register TxDone Callback.\n",(INT32)portId,0,0,0,0,0);
+ * return IX_ETH_ACC_SUCCESS ;
+ * }
+ */
+
+ if (!IX_ETH_IS_PORT_INITIALIZED(portId))
+ {
+ return (IX_ETH_ACC_PORT_UNINITIALIZED);
+ }
+ if (txCallbackFn == 0)
+ /* Check for null function pointer here. */
+ {
+ return (IX_ETH_ACC_INVALID_ARG);
+ }
+ ixEthAccPortData[portId].ixEthAccTxData.txBufferDoneCallbackFn = txCallbackFn;
+ ixEthAccPortData[portId].ixEthAccTxData.txCallbackTag = callbackTag;
+ return (IX_ETH_ACC_SUCCESS);
+}
+
+
+IX_ETH_ACC_PUBLIC
+IxEthAccStatus ixEthAccPortRxCallbackRegister(IxEthAccPortId portId,
+ IxEthAccPortRxCallback
+ rxCallbackFn,
+ UINT32 callbackTag)
+{
+ IxEthAccPortId port;
+
+ if (!IX_ETH_ACC_IS_SERVICE_INITIALIZED())
+ {
+ return (IX_ETH_ACC_FAIL);
+ }
+ if (!IX_ETH_ACC_IS_PORT_VALID(portId))
+ {
+ return (IX_ETH_ACC_INVALID_PORT);
+ }
+
+ if (IX_ETH_ACC_SUCCESS != ixEthAccSingleEthNpeCheck(portId))
+ {
+ IX_ETH_ACC_WARNING_LOG("ixEthAccPortRxCallbackRegister: Unavailable Eth %d: Cannot register Rx Callback.\n",(INT32)portId,0,0,0,0,0);
+ return IX_ETH_ACC_SUCCESS ;
+ }
+
+ if (!IX_ETH_IS_PORT_INITIALIZED(portId))
+ {
+ return (IX_ETH_ACC_PORT_UNINITIALIZED);
+ }
+
+ /* Check for null function pointer here. */
+ if (rxCallbackFn == NULL)
+ {
+ return (IX_ETH_ACC_INVALID_ARG);
+ }
+
+ /* Check the user is not changing the callback type
+ * when the port is enabled.
+ */
+ if (ixEthAccMacState[portId].portDisableState == ACTIVE)
+ {
+ for (port = 0; port < IX_ETH_ACC_NUMBER_OF_PORTS; port++)
+ {
+ if ((ixEthAccMacState[port].portDisableState == ACTIVE)
+ && (ixEthAccPortData[port].ixEthAccRxData.rxMultiBufferCallbackInUse == TRUE))
+ {
+ /* one of the active ports has a different rx callback type.
+ * Changing the callback type when the port is enabled
+ * is not safe
+ */
+ return (IX_ETH_ACC_INVALID_ARG);
+ }
+ }
+ }
+
+ /* update the callback pointer : this is done before
+ * registering the new qmgr callback
+ */
+ ixEthAccPortData[portId].ixEthAccRxData.rxCallbackFn = rxCallbackFn;
+ ixEthAccPortData[portId].ixEthAccRxData.rxCallbackTag = callbackTag;
+
+ /* update the qmgr callback for rx queues */
+ if (ixEthAccQMgrRxCallbacksRegister(ixEthRxFrameQMCallback)
+ != IX_ETH_ACC_SUCCESS)
+ {
+ /* unexpected qmgr error */
+ IX_ETH_ACC_FATAL_LOG("ixEthAccPortRxCallbackRegister: unexpected QMgr error, " \
+ "could not register Rx single-buffer callback\n", 0, 0, 0, 0, 0, 0);
+
+ RX_INC(portId,rxUnexpectedError);
+ return (IX_ETH_ACC_INVALID_ARG);
+ }
+
+ ixEthAccPortData[portId].ixEthAccRxData.rxMultiBufferCallbackInUse = FALSE;
+
+ return (IX_ETH_ACC_SUCCESS);
+}
+
+IX_ETH_ACC_PUBLIC
+IxEthAccStatus ixEthAccPortMultiBufferRxCallbackRegister(
+ IxEthAccPortId portId,
+ IxEthAccPortMultiBufferRxCallback
+ rxCallbackFn,
+ UINT32 callbackTag)
+{
+ IxEthAccPortId port;
+
+ if (!IX_ETH_ACC_IS_SERVICE_INITIALIZED())
+ {
+ return (IX_ETH_ACC_FAIL);
+ }
+ if (!IX_ETH_ACC_IS_PORT_VALID(portId))
+ {
+ return (IX_ETH_ACC_INVALID_PORT);
+ }
+
+ if (IX_ETH_ACC_SUCCESS != ixEthAccSingleEthNpeCheck(portId))
+ {
+ IX_ETH_ACC_WARNING_LOG("ixEthAccPortMultiBufferRxCallbackRegister: Unavailable Eth %d: Cannot register Rx Callback.\n",(INT32)portId,0,0,0,0,0);
+ return IX_ETH_ACC_SUCCESS ;
+ }
+
+ if (!IX_ETH_IS_PORT_INITIALIZED(portId))
+ {
+ return (IX_ETH_ACC_PORT_UNINITIALIZED);
+ }
+
+ /* Check for null function pointer here. */
+ if (rxCallbackFn == NULL)
+ {
+ return (IX_ETH_ACC_INVALID_ARG);
+ }
+
+ /* Check the user is not changing the callback type
+ * when the port is enabled.
+ */
+ if (ixEthAccMacState[portId].portDisableState == ACTIVE)
+ {
+ for (port = 0; port < IX_ETH_ACC_NUMBER_OF_PORTS; port++)
+ {
+ if ((ixEthAccMacState[port].portDisableState == ACTIVE)
+ && (ixEthAccPortData[port].ixEthAccRxData.rxMultiBufferCallbackInUse == FALSE))
+ {
+ /* one of the active ports has a different rx callback type.
+ * Changing the callback type when the port is enabled
+ * is not safe
+ */
+ return (IX_ETH_ACC_INVALID_ARG);
+ }
+ }
+ }
+
+ /* update the callback pointer : this is done before
+ * registering the new qmgr callback
+ */
+ ixEthAccPortData[portId].ixEthAccRxData.rxMultiBufferCallbackFn = rxCallbackFn;
+ ixEthAccPortData[portId].ixEthAccRxData.rxMultiBufferCallbackTag = callbackTag;
+
+ /* update the qmgr callback for rx queues */
+ if (ixEthAccQMgrRxCallbacksRegister(ixEthRxMultiBufferQMCallback)
+ != IX_ETH_ACC_SUCCESS)
+ {
+ /* unexpected qmgr error */
+ RX_INC(portId,rxUnexpectedError);
+
+ IX_ETH_ACC_FATAL_LOG("ixEthAccPortMultiBufferRxCallbackRegister: unexpected QMgr error, " \
+ "could not register Rx multi-buffer callback\n", 0, 0, 0, 0, 0, 0);
+
+ return (IX_ETH_ACC_INVALID_ARG);
+ }
+
+ ixEthAccPortData[portId].ixEthAccRxData.rxMultiBufferCallbackInUse = TRUE;
+
+ return (IX_ETH_ACC_SUCCESS);
+}
+
+IX_ETH_ACC_PUBLIC
+IxEthAccStatus ixEthAccPortTxFrameSubmit(IxEthAccPortId portId,
+ IX_OSAL_MBUF *buffer,
+ IxEthAccTxPriority priority)
+{
+ IX_STATUS qStatus = IX_SUCCESS;
+ UINT32 qBuffer;
+ IxEthAccTxPriority highestPriority;
+ IxQMgrQStatus txQStatus;
+
+#ifndef NDEBUG
+ if (buffer == NULL)
+ {
+ return (IX_ETH_ACC_FAIL);
+ }
+ if (!IX_ETH_ACC_IS_SERVICE_INITIALIZED())
+ {
+ return (IX_ETH_ACC_FAIL);
+ }
+ if (!IX_ETH_ACC_IS_PORT_VALID(portId))
+ {
+ return (IX_ETH_ACC_INVALID_PORT);
+ }
+
+ if (IX_ETH_ACC_SUCCESS != ixEthAccSingleEthNpeCheck(portId))
+ {
+ IX_ETH_ACC_FATAL_LOG("ixEthAccPortTxFrameSubmit: Unavailable Eth %d: Cannot submit Tx Frame.\n",
+ (INT32)portId,0,0,0,0,0);
+ return IX_ETH_ACC_PORT_UNINITIALIZED ;
+ }
+
+ if (!IX_ETH_IS_PORT_INITIALIZED(portId))
+ {
+ return (IX_ETH_ACC_PORT_UNINITIALIZED);
+ }
+ if ((UINT32)priority > (UINT32)IX_ETH_ACC_TX_PRIORITY_7)
+ {
+ return (IX_ETH_ACC_INVALID_ARG);
+ }
+#endif
+
+ /*
+ * Need to Flush the MBUF and its contents (data) as it may be
+ * read from the NPE. Convert virtual addresses to physical addresses also.
+ */
+ qBuffer = ixEthAccMbufTxQPrepare(buffer);
+
+ /*
+ * If no fifo priority set on Xscale ...
+ */
+ if (ixEthAccPortData[portId].ixEthAccTxData.schDiscipline ==
+ FIFO_NO_PRIORITY)
+ {
+ /*
+ * Add The Tx Buffer to the H/W Tx Q if possible
+ * (the priority is passed to the NPE, because
+ * the NPE is able to reorder the frames
+ * before transmission to the underlying hardware)
+ */
+ qStatus = ixEthAccQmgrTxWrite(portId,
+ qBuffer,
+ IX_ETH_ACC_TX_DEFAULT_PRIORITY);
+
+ if (qStatus == IX_SUCCESS)
+ {
+ TX_STATS_INC(portId,txQOK);
+
+ /*
+ * "best case" scenario : Buffer added to h/w Q.
+ */
+ return (IX_SUCCESS);
+ }
+ else if (qStatus == IX_QMGR_Q_OVERFLOW)
+ {
+ /*
+ * We were unable to write the buffer to the
+ * appropriate H/W Q, Save it in the sw Q.
+ * (use the default priority queue regardless of
+ * input parameter)
+ */
+ priority = IX_ETH_ACC_TX_DEFAULT_PRIORITY;
+ }
+ else
+ {
+ /* unexpected qmgr error */
+ TX_INC(portId,txUnexpectedError);
+ IX_ETH_ACC_FATAL_LOG(
+ "ixEthAccPortTxFrameSubmit:Error: qStatus = %u\n",
+ (UINT32)qStatus, 0, 0, 0, 0, 0);
+ return (IX_ETH_ACC_FAIL);
+ }
+ }
+ else if (ixEthAccPortData[portId].ixEthAccTxData.schDiscipline ==
+ FIFO_PRIORITY)
+ {
+
+ /*
+ * For priority transmission, put the frame directly on the H/W queue
+ * if the H/W queue is empty, otherwise, put it in a S/W Q
+ */
+ ixQMgrQStatusGet(IX_ETH_ACC_PORT_TO_TX_Q_ID(portId), &txQStatus);
+ if((txQStatus & IX_QMGR_Q_STATUS_E_BIT_MASK) != 0)
+ {
+ /*The tx queue is empty, check whether there are buffers on the s/w queues*/
+ if(ixEthAccTxSwQHighestPriorityGet(portId, &highestPriority)
+ !=IX_ETH_ACC_FAIL)
+ {
+ /*there are buffers on the s/w queues, submit them*/
+ ixEthAccTxFromSwQ(portId, highestPriority);
+
+ /* the queue was empty, 1 buffer is already supplied
+ * but is likely to be immediately transmitted and the
+ * hw queue is likely to be empty again, so submit
+ * more from the sw queues
+ */
+ if(ixEthAccTxSwQHighestPriorityGet(portId, &highestPriority)
+ !=IX_ETH_ACC_FAIL)
+ {
+ ixEthAccTxFromSwQ(portId, highestPriority);
+ /*
+ * and force the buffer supplied to be placed
+ * on a priority queue
+ */
+ qStatus = IX_QMGR_Q_OVERFLOW;
+ }
+ else
+ {
+ /*there are no buffers in the s/w queues, submit directly*/
+ qStatus = ixEthAccQmgrTxWrite(portId, qBuffer, priority);
+ }
+ }
+ else
+ {
+ /*there are no buffers in the s/w queues, submit directly*/
+ qStatus = ixEthAccQmgrTxWrite(portId, qBuffer, priority);
+ }
+ }
+ else
+ {
+ qStatus = IX_QMGR_Q_OVERFLOW;
+ }
+ }
+ else
+ {
+ TX_INC(portId,txUnexpectedError);
+ IX_ETH_ACC_FATAL_LOG(
+ "ixEthAccPortTxFrameSubmit:Error: wrong schedule discipline setup\n",
+ 0, 0, 0, 0, 0, 0);
+ return (IX_ETH_ACC_FAIL);
+ }
+
+ if(qStatus == IX_SUCCESS )
+ {
+ TX_STATS_INC(portId,txQOK);
+ return IX_ETH_ACC_SUCCESS;
+ }
+ else if(qStatus == IX_QMGR_Q_OVERFLOW)
+ {
+ TX_STATS_INC(portId,txQDelayed);
+ /*
+ * We were unable to write the buffer to the
+ * appropriate H/W Q, Save it in a s/w Q.
+ */
+ IX_ETH_ACC_DATAPLANE_ADD_MBUF_TO_Q_TAIL(
+ ixEthAccPortData[portId].
+ ixEthAccTxData.txQ[priority],
+ buffer);
+
+ qStatus = ixQMgrNotificationEnable(
+ IX_ETH_ACC_PORT_TO_TX_Q_ID(portId),
+ IX_ETH_ACC_PORT_TO_TX_Q_SOURCE(portId));
+
+ if (qStatus != IX_SUCCESS)
+ {
+ if (qStatus == IX_QMGR_WARNING)
+ {
+ /* notification is enabled for a queue
+ * which is already empty (the condition is already met)
+ * and there will be no more queue event to drain the sw queue
+ */
+ TX_STATS_INC(portId,txLateNotificationEnabled);
+
+ /* pull a buffer from the sw queue */
+ if(ixEthAccTxSwQHighestPriorityGet(portId, &highestPriority)
+ !=IX_ETH_ACC_FAIL)
+ {
+ /*there are buffers on the s/w queues, submit from them*/
+ ixEthAccTxFromSwQ(portId, highestPriority);
+ }
+ }
+ else
+ {
+ TX_INC(portId,txUnexpectedError);
+ IX_ETH_ACC_FATAL_LOG(
+ "ixEthAccPortTxFrameSubmit: unexpected Error: %u\n",
+ qStatus, 0, 0, 0, 0, 0);
+ }
+ }
+ }
+ else
+ {
+ TX_INC(portId,txUnexpectedError);
+ IX_ETH_ACC_FATAL_LOG(
+ "ixEthAccPortTxFrameSubmit: unexpected Error: %u\n",
+ qStatus, 0, 0, 0, 0, 0);
+ return (IX_ETH_ACC_FAIL);
+ }
+
+ return (IX_ETH_ACC_SUCCESS);
+}
+
+
+/**
+ *
+ * @brief replenish: convert a chain of mbufs to the format
+ * expected by the NPE
+ *
+ */
+
+IX_ETH_ACC_PUBLIC
+IxEthAccStatus ixEthAccPortRxFreeReplenish(IxEthAccPortId portId,
+ IX_OSAL_MBUF *buffer)
+{
+ IX_STATUS qStatus = IX_SUCCESS;
+ UINT32 qBuffer;
+
+ /*
+ * Check buffer is valid.
+ */
+
+#ifndef NDEBUG
+ /* check parameter value */
+ if (buffer == 0)
+ {
+ return (IX_ETH_ACC_FAIL);
+ }
+ if (!IX_ETH_ACC_IS_SERVICE_INITIALIZED())
+ {
+ return (IX_ETH_ACC_FAIL);
+ }
+ if (!IX_ETH_ACC_IS_PORT_VALID(portId))
+ {
+ return (IX_ETH_ACC_INVALID_PORT);
+ }
+
+ /* check initialisation is done */
+ if (IX_ETH_ACC_SUCCESS != ixEthAccSingleEthNpeCheck(portId))
+ {
+ IX_ETH_ACC_FATAL_LOG(" ixEthAccPortRxFreeReplenish: Unavailable Eth %d: Cannot replenish Rx Free Q.\n",(INT32)portId,0,0,0,0,0);
+ return IX_ETH_ACC_PORT_UNINITIALIZED ;
+ }
+
+ if (!IX_ETH_IS_PORT_INITIALIZED(portId))
+ {
+ return (IX_ETH_ACC_PORT_UNINITIALIZED);
+ }
+ /* check boundaries and constraints */
+ if (IX_OSAL_MBUF_MLEN(buffer) < IX_ETHNPE_ACC_RXFREE_BUFFER_LENGTH_MIN)
+ {
+ return (IX_ETH_ACC_FAIL);
+ }
+#endif
+
+ qBuffer = ixEthAccMbufRxQPrepare(buffer);
+
+ /*
+ * Add The Rx Buffer to the H/W Free buffer Q if possible
+ */
+ qStatus = ixEthAccQmgrLockRxWrite(portId, qBuffer);
+
+ if (qStatus == IX_SUCCESS)
+ {
+ RX_STATS_INC(portId,rxFreeRepOK);
+ /*
+ * Buffer added to h/w Q.
+ */
+ return (IX_SUCCESS);
+ }
+ else if (qStatus == IX_QMGR_Q_OVERFLOW)
+ {
+ RX_STATS_INC(portId,rxFreeRepDelayed);
+ /*
+ * We were unable to write the buffer to the approprate H/W Q,
+ * Save it in a s/w Q.
+ */
+ IX_ETH_ACC_DATAPLANE_ADD_MBUF_TO_Q_TAIL(
+ ixEthAccPortData[portId].ixEthAccRxData.freeBufferList,
+ buffer);
+
+ qStatus = ixQMgrNotificationEnable(
+ IX_ETH_ACC_PORT_TO_RX_FREE_Q_ID(portId),
+ IX_ETH_ACC_PORT_TO_RX_FREE_Q_SOURCE(portId));
+
+ if (qStatus != IX_SUCCESS)
+ {
+ if (qStatus == IX_QMGR_WARNING)
+ {
+ /* notification is enabled for a queue
+ * which is already empty (the condition is already met)
+ * and there will be no more queue event to drain the sw queue
+ * move an entry from the sw queue to the hw queue */
+ RX_STATS_INC(portId,rxFreeLateNotificationEnabled);
+ ixEthAccRxFreeFromSwQ(portId);
+ }
+ else
+ {
+ RX_INC(portId,rxUnexpectedError);
+ IX_ETH_ACC_FATAL_LOG(
+ "ixEthAccRxPortFreeReplenish:Error: %u\n",
+ qStatus, 0, 0, 0, 0, 0);
+ }
+ }
+ }
+ else
+ {
+ RX_INC(portId,rxUnexpectedError);
+ IX_ETH_ACC_FATAL_LOG(
+ "ixEthAccRxPortFreeReplenish:Error: qStatus = %u\n",
+ (UINT32)qStatus, 0, 0, 0, 0, 0);
+ return(IX_ETH_ACC_FAIL);
+ }
+ return (IX_ETH_ACC_SUCCESS);
+}
+
+
+IX_ETH_ACC_PUBLIC
+IxEthAccStatus ixEthAccTxSchedulingDisciplineSetPriv(IxEthAccPortId portId,
+ IxEthAccSchedulerDiscipline
+ sched)
+{
+ if (!IX_ETH_ACC_IS_PORT_VALID(portId))
+ {
+ return (IX_ETH_ACC_INVALID_PORT);
+ }
+
+ if (IX_ETH_ACC_SUCCESS != ixEthAccSingleEthNpeCheck(portId))
+ {
+ IX_ETH_ACC_WARNING_LOG("ixEthAccTxSchedulingDisciplineSet: Unavailable Eth %d: Cannot set Tx Scheduling Discipline.\n",(INT32)portId,0,0,0,0,0);
+ return IX_ETH_ACC_SUCCESS ;
+ }
+
+ if (!IX_ETH_IS_PORT_INITIALIZED(portId))
+ {
+ return (IX_ETH_ACC_PORT_UNINITIALIZED);
+ }
+
+ if (sched != FIFO_PRIORITY && sched != FIFO_NO_PRIORITY)
+ {
+ return (IX_ETH_ACC_INVALID_ARG);
+ }
+
+ ixEthAccPortData[portId].ixEthAccTxData.schDiscipline = sched;
+ return (IX_ETH_ACC_SUCCESS);
+}
+
+IX_ETH_ACC_PUBLIC
+IxEthAccStatus ixEthAccRxSchedulingDisciplineSetPriv(IxEthAccSchedulerDiscipline
+ sched)
+{
+ if (sched != FIFO_PRIORITY && sched != FIFO_NO_PRIORITY)
+ {
+ return (IX_ETH_ACC_INVALID_ARG);
+ }
+
+ ixEthAccDataInfo.schDiscipline = sched;
+
+ return (IX_ETH_ACC_SUCCESS);
+}
+
+
+/**
+ * @fn ixEthRxFrameProcess(IxEthAccPortId portId, IX_OSAL_MBUF *mbufPtr)
+ *
+ * @brief process incoming frame :
+ *
+ * @param @ref IxQMgrCallback IxQMgrMultiBufferCallback
+ *
+ * @return none
+ *
+ * @internal
+ *
+ */
+IX_ETH_ACC_PRIVATE BOOL
+ixEthRxFrameProcess(IxEthAccPortId portId, IX_OSAL_MBUF *mbufPtr)
+{
+ UINT32 flags;
+ IxEthDBStatus result;
+
+#ifndef NDEBUG
+ /* Prudent to at least check the port is within range */
+ if (portId >= IX_ETH_ACC_NUMBER_OF_PORTS)
+ {
+ ixEthAccDataStats.unexpectedError++;
+ IX_ETH_ACC_FATAL_LOG(
+ "ixEthRxFrameProcess: Illegal port: %u\n",
+ (UINT32)portId, 0, 0, 0, 0, 0);
+ return FALSE;
+ }
+#endif
+
+ /* convert fields from mbuf header */
+ ixEthAccMbufFromRxQ(mbufPtr);
+
+ /* check about any special processing for this frame */
+ flags = IX_ETHACC_NE_FLAGS(mbufPtr);
+ if ((flags & (IX_ETHACC_NE_FILTERMASK | IX_ETHACC_NE_NEWSRCMASK)) == 0)
+ {
+ /* "best case" scenario : nothing special to do for this frame */
+ return TRUE;
+ }
+
+#ifdef CONFIG_IXP425_COMPONENT_ETHDB
+ /* if a new source MAC address is detected by the NPE,
+ * update IxEthDB with the portId and the MAC address.
+ */
+ if ((flags & IX_ETHACC_NE_NEWSRCMASK & ixEthAccNewSrcMask) != 0)
+ {
+ result = ixEthDBFilteringDynamicEntryProvision(portId,
+ (IxEthDBMacAddr *) IX_ETHACC_NE_SOURCEMAC(mbufPtr));
+
+ if (result != IX_ETH_DB_SUCCESS && result != IX_ETH_DB_FEATURE_UNAVAILABLE)
+ {
+ if ((ixEthAccMacState[portId].portDisableState == ACTIVE) && (result != IX_ETH_DB_BUSY))
+ {
+ RX_STATS_INC(portId, rxUnexpectedError);
+ IX_ETH_ACC_FATAL_LOG("ixEthRxFrameProcess: Failed to add source MAC \
+ to the Learning/Filtering database\n", 0, 0, 0, 0, 0, 0);
+ }
+ else
+ {
+ /* we expect this to fail during PortDisable, as EthDB is disabled for
+ * that port and will refuse to learn new addresses
+ */
+ }
+ }
+ else
+ {
+ RX_STATS_INC(portId, rxUnlearnedMacAddress);
+ }
+ }
+#endif
+
+ /* check if this frame should have been filtered
+ * by the NPE and take the appropriate action
+ */
+ if (((flags & IX_ETHACC_NE_FILTERMASK) != 0)
+ && (ixEthAccMacState[portId].portDisableState == ACTIVE))
+ {
+ /* If the mbuf was allocated with a small data size, or the current data pointer is not
+ * within the allocated data area, then the buffer is non-standard and has to be
+ * replenished with the minimum size only
+ */
+ if( (IX_OSAL_MBUF_ALLOCATED_BUFF_LEN(mbufPtr) < IX_ETHNPE_ACC_RXFREE_BUFFER_LENGTH_MIN)
+ || ((UINT8 *)IX_OSAL_MBUF_ALLOCATED_BUFF_DATA(mbufPtr) > IX_OSAL_MBUF_MDATA(mbufPtr))
+ || ((UINT8 *)(IX_OSAL_MBUF_ALLOCATED_BUFF_DATA(mbufPtr) +
+ IX_OSAL_MBUF_ALLOCATED_BUFF_LEN(mbufPtr))
+ < IX_OSAL_MBUF_MDATA(mbufPtr)) )
+ {
+ /* set to minimum length */
+ IX_OSAL_MBUF_MLEN(mbufPtr) = IX_OSAL_MBUF_PKT_LEN(mbufPtr) =
+ IX_ETHNPE_ACC_RXFREE_BUFFER_LENGTH_MIN;
+ }
+ else
+ {
+ /* restore original length */
+ IX_OSAL_MBUF_MLEN(mbufPtr) = IX_OSAL_MBUF_PKT_LEN(mbufPtr) =
+ ( IX_OSAL_MBUF_ALLOCATED_BUFF_LEN(mbufPtr) -
+ (IX_OSAL_MBUF_MDATA(mbufPtr) - (UINT8 *)IX_OSAL_MBUF_ALLOCATED_BUFF_DATA(mbufPtr)) );
+ }
+
+ /* replenish from here */
+ if (ixEthAccPortRxFreeReplenish(portId, mbufPtr) != IX_ETH_ACC_SUCCESS)
+ {
+ IX_ETH_ACC_FATAL_LOG("ixEthRxFrameProcess: Failed to replenish with filtered frame\
+ on port %d\n", portId, 0, 0, 0, 0, 0);
+ }
+
+ RX_STATS_INC(portId, rxFiltered);
+
+ /* indicate that frame should not be subjected to further processing */
+ return FALSE;
+ }
+
+ return TRUE;
+}
+
+
+/**
+ * @fn ixEthRxFrameQMCallback
+ *
+ * @brief receive callback for Frame receive Q from NPE
+ *
+ * Frames are passed one-at-a-time to the user
+ *
+ * @param @ref IxQMgrCallback
+ *
+ * @return none
+ *
+ * @internal
+ *
+ * Design note : while processing the entry X, entry X+1 is preloaded
+ * into memory to reduce the number of stall cycles
+ *
+ */
+void ixEthRxFrameQMCallback(IxQMgrQId qId, IxQMgrCallbackId callbackId)
+{
+ IX_OSAL_MBUF *mbufPtr;
+ IX_OSAL_MBUF *nextMbufPtr;
+ UINT32 qEntry;
+ UINT32 nextQEntry;
+ UINT32 *qEntryPtr;
+ UINT32 portId;
+ UINT32 destPortId;
+ UINT32 npeId;
+ UINT32 rxQReadStatus;
+
+ /*
+ * Design note : entries are read in a buffer, This buffer contains
+ * an extra zeroed entry so the loop will
+ * always terminate on a null entry, whatever the result of Burst read is.
+ */
+ UINT32 rxQEntry[IX_ETH_ACC_MAX_RX_FRAME_CONSUME_PER_CALLBACK + 1];
+
+ /*
+ * Indication of the number of times the callback is used.
+ */
+ IX_ETH_ACC_STATS_INC(ixEthAccDataStats.rxCallbackCounter);
+
+ do
+ {
+ /*
+ * Indication of the number of times the queue is drained
+ */
+ IX_ETH_ACC_STATS_INC(ixEthAccDataStats.rxCallbackBurstRead);
+
+ /* ensure the last entry of the array contains a zeroed value */
+ qEntryPtr = rxQEntry;
+ qEntryPtr[IX_ETH_ACC_MAX_RX_FRAME_CONSUME_PER_CALLBACK] = 0;
+
+ rxQReadStatus = ixQMgrQBurstRead(qId,
+ IX_ETH_ACC_MAX_RX_FRAME_CONSUME_PER_CALLBACK,
+ qEntryPtr);
+
+#ifndef NDEBUG
+ if ((rxQReadStatus != IX_QMGR_Q_UNDERFLOW)
+ && (rxQReadStatus != IX_SUCCESS))
+ {
+ ixEthAccDataStats.unexpectedError++;
+ /*major error*/
+ IX_ETH_ACC_FATAL_LOG(
+ "ixEthRxFrameQMCallback:Error: %u\n",
+ (UINT32)rxQReadStatus, 0, 0, 0, 0, 0);
+ return;
+ }
+#endif
+
+ /* convert and preload the next entry
+ * (the conversion function takes care about null pointers which
+ * are used to mark the end of the loop)
+ */
+ nextQEntry = *qEntryPtr;
+ nextMbufPtr = ixEthAccEntryFromQConvert(nextQEntry,
+ IX_ETHNPE_QM_Q_RXENET_ADDR_MASK);
+
+ while(nextQEntry != 0)
+ {
+ /* get the next entry */
+ qEntry = nextQEntry;
+ mbufPtr = nextMbufPtr;
+
+#ifndef NDEBUG
+ if (mbufPtr == NULL)
+ {
+ ixEthAccDataStats.unexpectedError++;
+ IX_ETH_ACC_FATAL_LOG(
+ "ixEthRxFrameQMCallback: Null Mbuf Ptr\n",
+ 0, 0, 0, 0, 0, 0);
+ return;
+ }
+#endif
+
+ /* convert the next entry
+ * (the conversion function takes care about null pointers which
+ * are used to mark the end of the loop)
+ */
+ nextQEntry = *(++qEntryPtr);
+ nextMbufPtr = ixEthAccEntryFromQConvert(nextQEntry,
+ IX_ETHNPE_QM_Q_RXENET_ADDR_MASK);
+
+ /*
+ * Get Port and Npe ID from message.
+ */
+ npeId = ((IX_ETHNPE_QM_Q_RXENET_NPEID_MASK &
+ qEntry) >> IX_ETHNPE_QM_Q_FIELD_NPEID_R);
+ portId = IX_ETH_ACC_NPE_TO_PORT_ID(npeId);
+
+ /* process frame, check the return code and skip the remaining of
+ * the loop if the frame is to be filtered out
+ */
+ if (ixEthRxFrameProcess(portId, mbufPtr))
+ {
+ /* destination portId for this packet */
+ destPortId = IX_ETHACC_NE_DESTPORTID(mbufPtr);
+
+ if (destPortId != IX_ETH_DB_UNKNOWN_PORT)
+ {
+ destPortId = IX_ETH_DB_NPE_LOGICAL_ID_TO_PORT_ID(destPortId);
+ }
+
+ /* test if QoS is enabled in ethAcc
+ */
+ if (ixEthAccDataInfo.schDiscipline == FIFO_PRIORITY)
+ {
+ /* check if there is a higher priority queue
+ * which may require processing and then process it.
+ */
+ if (ixEthAccDataInfo.higherPriorityQueue[qId] < IX_QMGR_MAX_NUM_QUEUES)
+ {
+ ixEthRxFrameQMCallback(ixEthAccDataInfo.higherPriorityQueue[qId],
+ callbackId);
+ }
+ }
+
+ /*
+ * increment priority stats
+ */
+ RX_STATS_INC(portId,rxPriority[IX_ETHACC_NE_QOS(mbufPtr)]);
+
+ /*
+ * increment callback count stats
+ */
+ RX_STATS_INC(portId,rxFrameClientCallback);
+
+ /*
+ * Call user level callback.
+ */
+ ixEthAccPortData[portId].ixEthAccRxData.rxCallbackFn(
+ ixEthAccPortData[portId].ixEthAccRxData.rxCallbackTag,
+ mbufPtr,
+ destPortId);
+ }
+ }
+ } while (rxQReadStatus == IX_SUCCESS);
+}
+
+/**
+ * @fn ixEthRxMultiBufferQMCallback
+ *
+ * @brief receive callback for Frame receive Q from NPE
+ *
+ * Frames are passed as an array to the user
+ *
+ * @param @ref IxQMgrCallback
+ *
+ * @return none
+ *
+ * @internal
+ *
+ * Design note : while processing the entry X, entry X+1 is preloaded
+ * into memory to reduce the number of stall cycles
+ *
+ */
+void ixEthRxMultiBufferQMCallback(IxQMgrQId qId, IxQMgrCallbackId callbackId)
+{
+ IX_OSAL_MBUF *mbufPtr;
+ IX_OSAL_MBUF *nextMbufPtr;
+ UINT32 qEntry;
+ UINT32 nextQEntry;
+ UINT32 *qEntryPtr;
+ UINT32 portId;
+ UINT32 npeId;
+ UINT32 rxQReadStatus;
+ /*
+ * Design note : entries are read in a static buffer, This buffer contains
+ * an extra zeroed entry so the loop will
+ * always terminate on a null entry, whatever the result of Burst read is.
+ */
+ static UINT32 rxQEntry[IX_ETH_ACC_MAX_RX_FRAME_CONSUME_PER_CALLBACK + 1];
+ static IX_OSAL_MBUF *rxMbufPortArray[IX_ETH_ACC_NUMBER_OF_PORTS][IX_ETH_ACC_MAX_RX_FRAME_CONSUME_PER_CALLBACK + 1];
+ IX_OSAL_MBUF **rxMbufPtr[IX_ETH_ACC_NUMBER_OF_PORTS];
+
+ for (portId = 0; portId < IX_ETH_ACC_NUMBER_OF_PORTS; portId++)
+ {
+ rxMbufPtr[portId] = rxMbufPortArray[portId];
+ }
+
+ /*
+ * Indication of the number of times the callback is used.
+ */
+ IX_ETH_ACC_STATS_INC(ixEthAccDataStats.rxCallbackCounter);
+
+ do
+ {
+ /*
+ * Indication of the number of times the queue is drained
+ */
+ IX_ETH_ACC_STATS_INC(ixEthAccDataStats.rxCallbackBurstRead);
+
+ /* ensure the last entry of the array contains a zeroed value */
+ qEntryPtr = rxQEntry;
+ qEntryPtr[IX_ETH_ACC_MAX_RX_FRAME_CONSUME_PER_CALLBACK] = 0;
+
+ rxQReadStatus = ixQMgrQBurstRead(qId,
+ IX_ETH_ACC_MAX_RX_FRAME_CONSUME_PER_CALLBACK,
+ qEntryPtr);
+
+#ifndef NDEBUG
+ if ((rxQReadStatus != IX_QMGR_Q_UNDERFLOW)
+ && (rxQReadStatus != IX_SUCCESS))
+ {
+ ixEthAccDataStats.unexpectedError++;
+ /*major error*/
+ IX_ETH_ACC_FATAL_LOG(
+ "ixEthRxFrameMultiBufferQMCallback:Error: %u\n",
+ (UINT32)rxQReadStatus, 0, 0, 0, 0, 0);
+ return;
+ }
+#endif
+
+ /* convert and preload the next entry
+ * (the conversion function takes care about null pointers which
+ * are used to mark the end of the loop)
+ */
+ nextQEntry = *qEntryPtr;
+ nextMbufPtr = ixEthAccEntryFromQConvert(nextQEntry,
+ IX_ETHNPE_QM_Q_RXENET_ADDR_MASK);
+
+ while(nextQEntry != 0)
+ {
+ /* get the next entry */
+ qEntry = nextQEntry;
+ mbufPtr = nextMbufPtr;
+
+#ifndef NDEBUG
+ if (mbufPtr == NULL)
+ {
+ ixEthAccDataStats.unexpectedError++;
+ IX_ETH_ACC_FATAL_LOG(
+ "ixEthRxFrameMultiBufferQMCallback:Error: Null Mbuf Ptr\n",
+ 0, 0, 0, 0, 0, 0);
+ return;
+ }
+#endif
+
+ /* convert the next entry
+ * (the conversion function takes care about null pointers which
+ * are used to mark the end of the loop)
+ */
+ nextQEntry = *(++qEntryPtr);
+ nextMbufPtr = ixEthAccEntryFromQConvert(nextQEntry,
+ IX_ETHNPE_QM_Q_RXENET_ADDR_MASK);
+
+ /*
+ * Get Port and Npe ID from message.
+ */
+ npeId = ((IX_ETHNPE_QM_Q_RXENET_NPEID_MASK &
+ qEntry) >>
+ IX_ETHNPE_QM_Q_FIELD_NPEID_R);
+ portId = IX_ETH_ACC_NPE_TO_PORT_ID(npeId);
+
+ /* skip the remaining of the loop if the frame is
+ * to be filtered out
+ */
+ if (ixEthRxFrameProcess(portId, mbufPtr))
+ {
+ /* store a mbuf pointer in an array */
+ *rxMbufPtr[portId]++ = mbufPtr;
+
+ /*
+ * increment priority stats
+ */
+ RX_STATS_INC(portId,rxPriority[IX_ETHACC_NE_QOS(mbufPtr)]);
+ }
+
+ /* test for QoS enabled in ethAcc */
+ if (ixEthAccDataInfo.schDiscipline == FIFO_PRIORITY)
+ {
+ /* check if there is a higher priority queue
+ * which may require processing and then process it.
+ */
+ if (ixEthAccDataInfo.higherPriorityQueue[qId] < IX_QMGR_MAX_NUM_QUEUES)
+ {
+ ixEthRxMultiBufferQMCallback(ixEthAccDataInfo.higherPriorityQueue[qId],
+ callbackId);
+ }
+ }
+ }
+
+ /* check if any of the the arrays contains any entry */
+ for (portId = 0; portId < IX_ETH_ACC_NUMBER_OF_PORTS; portId++)
+ {
+ if (rxMbufPtr[portId] != rxMbufPortArray[portId])
+ {
+ /* add a last NULL pointer at the end of the
+ * array of mbuf pointers
+ */
+ *rxMbufPtr[portId] = NULL;
+
+ /*
+ * increment callback count stats
+ */
+ RX_STATS_INC(portId,rxFrameClientCallback);
+
+ /*
+ * Call user level callback with an array of
+ * buffers (NULL terminated)
+ */
+ ixEthAccPortData[portId].ixEthAccRxData.
+ rxMultiBufferCallbackFn(
+ ixEthAccPortData[portId].ixEthAccRxData.
+ rxMultiBufferCallbackTag,
+ rxMbufPortArray[portId]);
+
+ /* reset the buffer pointer to the beginning of
+ * the array
+ */
+ rxMbufPtr[portId] = rxMbufPortArray[portId];
+ }
+ }
+
+ } while (rxQReadStatus == IX_SUCCESS);
+}
+
+
+/**
+ * @brief rxFree low event handler
+ *
+ */
+void ixEthRxFreeQMCallback(IxQMgrQId qId, IxQMgrCallbackId callbackId)
+{
+ IxEthAccPortId portId = (IxEthAccPortId) callbackId;
+ int lockVal;
+ UINT32 maxQWritesToPerform = IX_ETH_ACC_MAX_RX_FREE_BUFFERS_LOAD;
+ IX_STATUS qStatus = IX_SUCCESS;
+
+ /*
+ * We have reached a low threshold on one of the Rx Free Qs
+ */
+
+ /*note that due to the fact that we are working off an Empty threshold, this callback
+ need only write a single entry to the Rx Free queue in order to re-arm the notification
+ */
+
+ RX_STATS_INC(portId,rxFreeLowCallback);
+
+ /*
+ * Get buffers from approprite S/W Rx freeBufferList Q.
+ */
+
+#ifndef NDEBUG
+ if (!IX_ETH_ACC_IS_PORT_VALID(portId))
+ {
+ ixEthAccDataStats.unexpectedError++;
+ IX_ETH_ACC_FATAL_LOG(
+ "ixEthRxFreeQMCallback:Error: Invalid Port 0x%08X\n",
+ portId, 0, 0, 0, 0, 0);
+ return;
+ }
+#endif
+ IX_ETH_ACC_DATA_PLANE_LOCK(lockVal);
+ if (IX_ETH_ACC_DATAPLANE_IS_Q_EMPTY(ixEthAccPortData[portId].
+ ixEthAccRxData.freeBufferList))
+ {
+ /*
+ * Turn off Q callback notification for Q in Question.
+ */
+ qStatus = ixQMgrNotificationDisable(
+ IX_ETH_ACC_PORT_TO_RX_FREE_Q_ID(portId));
+
+
+ IX_ETH_ACC_DATA_PLANE_UNLOCK(lockVal);
+
+ if (qStatus != IX_SUCCESS)
+ {
+ RX_INC(portId,rxUnexpectedError);
+ IX_ETH_ACC_FATAL_LOG(
+ "ixEthRxFreeQMCallback:Error: unexpected QM status 0x%08X\n",
+ qStatus, 0, 0, 0, 0, 0);
+ return;
+ }
+ }
+ else
+ {
+ IX_ETH_ACC_DATA_PLANE_UNLOCK(lockVal);
+ /*
+ * Load the H/W Q with buffers from the s/w Q.
+ */
+
+ do
+ {
+ /*
+ * Consume Q entries. - Note Q contains Physical addresss,
+ * and have already been flushed to memory,
+ * And endianess converted if required.
+ */
+ if (ixEthAccRxFreeFromSwQ(portId) != IX_SUCCESS)
+ {
+ /*
+ * No more entries in s/w Q.
+ * Turn off Q callback indication
+ */
+
+ IX_ETH_ACC_DATA_PLANE_LOCK(lockVal);
+ if (IX_ETH_ACC_DATAPLANE_IS_Q_EMPTY(ixEthAccPortData[portId].
+ ixEthAccRxData.freeBufferList))
+ {
+ qStatus = ixQMgrNotificationDisable(
+ IX_ETH_ACC_PORT_TO_RX_FREE_Q_ID(portId));
+ }
+ IX_ETH_ACC_DATA_PLANE_UNLOCK(lockVal);
+ break;
+ }
+ }
+ while (--maxQWritesToPerform);
+ }
+}
+/**
+ * @fn Tx queue low event handler
+ *
+ */
+void
+ixEthTxFrameQMCallback(IxQMgrQId qId, IxQMgrCallbackId callbackId)
+{
+ IxEthAccPortId portId = (IxEthAccPortId) callbackId;
+ int lockVal;
+ UINT32 maxQWritesToPerform = IX_ETH_ACC_MAX_TX_FRAME_TX_CONSUME_PER_CALLBACK;
+ IX_STATUS qStatus = IX_SUCCESS;
+ IxEthAccTxPriority highestPriority;
+
+
+ /*
+ * We have reached a low threshold on the Tx Q, and are being asked to
+ * supply a buffer for transmission from our S/W TX queues
+ */
+ TX_STATS_INC(portId,txLowThreshCallback);
+
+ /*
+ * Get buffers from approprite Q.
+ */
+
+#ifndef NDEBUG
+ if (!IX_ETH_ACC_IS_PORT_VALID(portId))
+ {
+ ixEthAccDataStats.unexpectedError++;
+ IX_ETH_ACC_FATAL_LOG(
+ "ixEthTxFrameQMCallback:Error: Invalid Port 0x%08X\n",
+ portId, 0, 0, 0, 0, 0);
+ return;
+ }
+#endif
+
+ do
+ {
+ /*
+ * Consume Q entries. - Note Q contains Physical addresss,
+ * and have already been flushed to memory,
+ * and endianess already sone if required.
+ */
+
+ IX_ETH_ACC_DATA_PLANE_LOCK(lockVal);
+
+ if(ixEthAccTxSwQHighestPriorityGet(portId, &highestPriority) ==
+ IX_ETH_ACC_FAIL)
+ {
+ /*
+ * No more entries in s/w Q.
+ * Turn off Q callback indication
+ */
+ qStatus = ixQMgrNotificationDisable(
+ IX_ETH_ACC_PORT_TO_TX_Q_ID(portId));
+
+ IX_ETH_ACC_DATA_PLANE_UNLOCK(lockVal);
+
+ if (qStatus != IX_SUCCESS)
+ {
+ ixEthAccDataStats.unexpectedError++;
+ IX_ETH_ACC_FATAL_LOG(
+ "ixEthTxFrameQMCallback:Error: unexpected QM status 0x%08X\n",
+ qStatus, 0, 0, 0, 0, 0);
+ }
+
+ return;
+ }
+ else
+ {
+ IX_ETH_ACC_DATA_PLANE_UNLOCK(lockVal);
+ if (ixEthAccTxFromSwQ(portId,highestPriority)!=IX_SUCCESS)
+ {
+ /* nothing left in the sw queue or the hw queues are
+ * full. There is no point to continue to drain the
+ * sw queues
+ */
+ return;
+ }
+ }
+ }
+ while (--maxQWritesToPerform);
+}
+
+/**
+ * @brief TxDone event handler
+ *
+ * Design note : while processing the entry X, entry X+1 is preloaded
+ * into memory to reduce the number of stall cycles
+ *
+ */
+
+void
+ixEthTxFrameDoneQMCallback(IxQMgrQId qId, IxQMgrCallbackId callbackId)
+{
+ IX_OSAL_MBUF *mbufPtr;
+ UINT32 qEntry;
+ UINT32 *qEntryPtr;
+ UINT32 txDoneQReadStatus;
+ UINT32 portId;
+ UINT32 npeId;
+
+ /*
+ * Design note : entries are read in a static buffer, This buffer contains
+ * an extra entyry (which is zeroed by the compiler), so the loop will
+ * always terminate on a null entry, whatever the result of Burst read is.
+ */
+ static UINT32 txDoneQEntry[IX_ETH_ACC_MAX_TX_FRAME_DONE_CONSUME_PER_CALLBACK + 1];
+
+ /*
+ * Indication that Tx frames have been transmitted from the NPE.
+ */
+
+ IX_ETH_ACC_STATS_INC(ixEthAccDataStats.txDoneCallbackCounter);
+
+ do{
+ qEntryPtr = txDoneQEntry;
+ txDoneQReadStatus = ixQMgrQBurstRead(IX_ETH_ACC_TX_FRAME_DONE_ETH_Q,
+ IX_ETH_ACC_MAX_TX_FRAME_DONE_CONSUME_PER_CALLBACK,
+ qEntryPtr);
+
+#ifndef NDEBUG
+ if (txDoneQReadStatus != IX_QMGR_Q_UNDERFLOW
+ && (txDoneQReadStatus != IX_SUCCESS))
+ {
+ /*major error*/
+ ixEthAccDataStats.unexpectedError++;
+ IX_ETH_ACC_FATAL_LOG(
+ "ixEthTxFrameDoneQMCallback:Error: %u\n",
+ (UINT32)txDoneQReadStatus, 0, 0, 0, 0, 0);
+ return;
+ }
+#endif
+
+ qEntry = *qEntryPtr;
+
+ while(qEntry != 0)
+ {
+ mbufPtr = ixEthAccEntryFromQConvert(qEntry,
+ IX_ETHNPE_QM_Q_TXENET_ADDR_MASK);
+
+#ifndef NDEBUG
+ if (mbufPtr == NULL)
+ {
+ ixEthAccDataStats.unexpectedError++;
+ IX_ETH_ACC_FATAL_LOG(
+ "ixEthTxFrameDoneQMCallback:Error: Null Mbuf Ptr\n",
+ 0, 0, 0, 0, 0, 0);
+ return;
+ }
+#endif
+
+ /* endianness conversions and stats updates */
+ ixEthAccMbufFromTxQ(mbufPtr);
+
+ /*
+ * Get NPE id from message, then convert to portId.
+ */
+ npeId = ((IX_ETHNPE_QM_Q_TXENETDONE_NPEID_MASK &
+ qEntry) >>
+ IX_ETHNPE_QM_Q_FIELD_NPEID_R);
+ portId = IX_ETH_ACC_NPE_TO_PORT_ID(npeId);
+
+#ifndef NDEBUG
+ /* Prudent to at least check the port is within range */
+ if (portId >= IX_ETH_ACC_NUMBER_OF_PORTS)
+ {
+ ixEthAccDataStats.unexpectedError++;
+ IX_ETH_ACC_FATAL_LOG(
+ "ixEthTxFrameDoneQMCallback: Illegal port: %u\n",
+ (UINT32)portId, 0, 0, 0, 0, 0);
+ return;
+ }
+#endif
+
+ TX_STATS_INC(portId,txDoneClientCallback);
+
+ /*
+ * Call user level callback.
+ */
+ ixEthAccPortData[portId].ixEthAccTxData.txBufferDoneCallbackFn(
+ ixEthAccPortData[portId].ixEthAccTxData.txCallbackTag,
+ mbufPtr);
+
+ /* move to next queue entry */
+ qEntry = *(++qEntryPtr);
+
+ }
+ } while( txDoneQReadStatus == IX_SUCCESS );
+}
+
+IX_ETH_ACC_PUBLIC
+void ixEthAccDataPlaneShow(void)
+{
+ UINT32 numTx0Entries;
+ UINT32 numTx1Entries;
+ UINT32 numTxDoneEntries;
+ UINT32 numRxEntries;
+ UINT32 numRxFree0Entries;
+ UINT32 numRxFree1Entries;
+ UINT32 portId;
+#ifdef __ixp46X
+ UINT32 numTx2Entries;
+ UINT32 numRxFree2Entries;
+#endif
+#ifndef NDEBUG
+ UINT32 priority;
+ UINT32 numBuffersInRx=0;
+ UINT32 numBuffersInTx=0;
+ UINT32 numBuffersInSwQ=0;
+ UINT32 totalBuffers=0;
+ UINT32 rxFreeCallbackCounter = 0;
+ UINT32 txCallbackCounter = 0;
+#endif
+ UINT32 key;
+
+ /* snapshot of stats */
+ IxEthAccTxDataStats tx[IX_ETH_ACC_NUMBER_OF_PORTS];
+ IxEthAccRxDataStats rx[IX_ETH_ACC_NUMBER_OF_PORTS];
+ IxEthAccDataPlaneStats stats;
+
+ if (!IX_ETH_ACC_IS_SERVICE_INITIALIZED())
+ {
+ return;
+ }
+
+ /* get a reliable snapshot */
+ key = ixOsalIrqLock();
+
+ numTx0Entries = 0;
+ ixQMgrQNumEntriesGet(IX_ETH_ACC_TX_FRAME_ENET0_Q, &numTx0Entries);
+ numTx1Entries = 0;
+ ixQMgrQNumEntriesGet(IX_ETH_ACC_TX_FRAME_ENET1_Q, &numTx1Entries);
+ numTxDoneEntries = 0;
+ ixQMgrQNumEntriesGet( IX_ETH_ACC_TX_FRAME_DONE_ETH_Q, &numTxDoneEntries);
+ numRxEntries = 0;
+ ixEthAccQMgrRxQEntryGet(&numRxEntries);
+ numRxFree0Entries = 0;
+ ixQMgrQNumEntriesGet(IX_ETH_ACC_RX_FREE_BUFF_ENET0_Q, &numRxFree0Entries);
+ numRxFree1Entries = 0;
+ ixQMgrQNumEntriesGet(IX_ETH_ACC_RX_FREE_BUFF_ENET1_Q, &numRxFree1Entries);
+
+#ifdef __ixp46X
+ numTx2Entries = 0;
+ ixQMgrQNumEntriesGet(IX_ETH_ACC_TX_FRAME_ENET2_Q, &numTx2Entries);
+ numRxFree2Entries = 0;
+ ixQMgrQNumEntriesGet(IX_ETH_ACC_RX_FREE_BUFF_ENET2_Q, &numRxFree2Entries);
+#endif
+
+ for(portId=IX_ETH_PORT_1; portId < IX_ETH_ACC_NUMBER_OF_PORTS; portId++)
+ {
+ memcpy(&tx[portId],
+ &ixEthAccPortData[portId].ixEthAccTxData.stats,
+ sizeof(tx[portId]));
+ memcpy(&rx[portId],
+ &ixEthAccPortData[portId].ixEthAccRxData.stats,
+ sizeof(rx[portId]));
+ }
+ memcpy(&stats, &ixEthAccDataStats, sizeof(stats));
+
+ ixOsalIrqUnlock(key);
+
+#ifdef NDEBUG
+ printf("Detailed statistics collection not supported in this load\n");
+#endif
+
+ /* print snapshot */
+ for(portId=0; portId < IX_ETH_ACC_NUMBER_OF_PORTS; portId++)
+ {
+ /* If not IXP42X A0 stepping, proceed to check for existence of coprocessors */
+ if ((IX_FEATURE_CTRL_SILICON_TYPE_A0 !=
+ (ixFeatureCtrlProductIdRead() & IX_FEATURE_CTRL_SILICON_STEPPING_MASK))
+ || (IX_FEATURE_CTRL_DEVICE_TYPE_IXP42X != ixFeatureCtrlDeviceRead ()))
+ {
+ if ((IX_ETH_PORT_1 == portId) &&
+ (ixFeatureCtrlComponentCheck(IX_FEATURECTRL_ETH0) ==
+ IX_FEATURE_CTRL_COMPONENT_DISABLED))
+ {
+ continue ;
+ }
+ if ((IX_ETH_PORT_2 == portId) &&
+ (ixFeatureCtrlComponentCheck(IX_FEATURECTRL_ETH1) ==
+ IX_FEATURE_CTRL_COMPONENT_DISABLED))
+ {
+ continue ;
+ }
+ if ((IX_ETH_PORT_3 == portId) &&
+ (ixFeatureCtrlComponentCheck(IX_FEATURECTRL_NPEA_ETH) ==
+ IX_FEATURE_CTRL_COMPONENT_DISABLED))
+ {
+ continue ;
+ }
+ }
+
+ printf("PORT %u --------------------------------\n",
+ portId);
+#ifndef NDEBUG
+ printf("Tx Done Frames : %u\n",
+ tx[portId].txDoneClientCallback +
+ tx[portId].txDoneSwQDuringDisable +
+ tx[portId].txDoneDuringDisable);
+ printf("Tx Frames : %u\n",
+ tx[portId].txQOK + tx[portId].txQDelayed);
+ printf("Tx H/W Q Added OK : %u\n",
+ tx[portId].txQOK);
+ printf("Tx H/W Q Delayed : %u\n",
+ tx[portId].txQDelayed);
+ printf("Tx From S/W Q Added OK : %u\n",
+ tx[portId].txFromSwQOK);
+ printf("Tx From S/W Q Delayed : %u\n",
+ tx[portId].txFromSwQDelayed);
+ printf("Tx Overflow : %u\n",
+ tx[portId].txOverflow);
+ printf("Tx Mutual Lock : %u\n",
+ tx[portId].txLock);
+ printf("Tx Late Ntf Enabled : %u\n",
+ tx[portId].txLateNotificationEnabled);
+ printf("Tx Low Thresh CB : %u\n",
+ tx[portId].txLowThreshCallback);
+ printf("Tx Done from H/W Q (Disable) : %u\n",
+ tx[portId].txDoneDuringDisable);
+ printf("Tx Done from S/W Q (Disable) : %u\n",
+ tx[portId].txDoneSwQDuringDisable);
+ for (priority = IX_ETH_ACC_TX_PRIORITY_0;
+ priority <= IX_ETH_ACC_TX_PRIORITY_7;
+ priority++)
+ {
+ if (tx[portId].txPriority[priority])
+ {
+ printf("Tx Priority %u : %u\n",
+ priority,
+ tx[portId].txPriority[priority]);
+ }
+ }
+#endif
+ printf("Tx unexpected errors : %u (should be 0)\n",
+ tx[portId].txUnexpectedError);
+
+#ifndef NDEBUG
+ printf("Rx Frames : %u\n",
+ rx[portId].rxFrameClientCallback +
+ rx[portId].rxSwQDuringDisable+
+ rx[portId].rxDuringDisable);
+ printf("Rx Free Replenish : %u\n",
+ rx[portId].rxFreeRepOK + rx[portId].rxFreeRepDelayed);
+ printf("Rx Free H/W Q Added OK : %u\n",
+ rx[portId].rxFreeRepOK);
+ printf("Rx Free H/W Q Delayed : %u\n",
+ rx[portId].rxFreeRepDelayed);
+ printf("Rx Free From S/W Q Added OK : %u\n",
+ rx[portId].rxFreeRepFromSwQOK);
+ printf("Rx Free From S/W Q Delayed : %u\n",
+ rx[portId].rxFreeRepFromSwQDelayed);
+ printf("Rx Free Overflow : %u\n",
+ rx[portId].rxFreeOverflow);
+ printf("Rx Free Mutual Lock : %u\n",
+ rx[portId].rxFreeLock);
+ printf("Rx Free Late Ntf Enabled : %u\n",
+ rx[portId].rxFreeLateNotificationEnabled);
+ printf("Rx Free Low CB : %u\n",
+ rx[portId].rxFreeLowCallback);
+ printf("Rx From H/W Q (Disable) : %u\n",
+ rx[portId].rxDuringDisable);
+ printf("Rx From S/W Q (Disable) : %u\n",
+ rx[portId].rxSwQDuringDisable);
+ printf("Rx unlearned Mac Address : %u\n",
+ rx[portId].rxUnlearnedMacAddress);
+ printf("Rx Filtered (Rx => RxFree) : %u\n",
+ rx[portId].rxFiltered);
+
+ for (priority = IX_ETH_ACC_TX_PRIORITY_0;
+ priority <= IX_ETH_ACC_TX_PRIORITY_7;
+ priority++)
+ {
+ if (rx[portId].rxPriority[priority])
+ {
+ printf("Rx Priority %u : %u\n",
+ priority,
+ rx[portId].rxPriority[priority]);
+ }
+ }
+#endif
+ printf("Rx unexpected errors : %u (should be 0)\n",
+ rx[portId].rxUnexpectedError);
+
+#ifndef NDEBUG
+ numBuffersInTx = tx[portId].txQOK +
+ tx[portId].txQDelayed -
+ tx[portId].txDoneClientCallback -
+ tx[portId].txDoneSwQDuringDisable -
+ tx[portId].txDoneDuringDisable;
+
+ printf("# Tx Buffers currently for transmission : %u\n",
+ numBuffersInTx);
+
+ numBuffersInRx = rx[portId].rxFreeRepOK +
+ rx[portId].rxFreeRepDelayed -
+ rx[portId].rxFrameClientCallback -
+ rx[portId].rxSwQDuringDisable -
+ rx[portId].rxDuringDisable;
+
+ printf("# Rx Buffers currently for reception : %u\n",
+ numBuffersInRx);
+
+ totalBuffers += numBuffersInRx + numBuffersInTx;
+#endif
+ }
+
+ printf("---------------------------------------\n");
+
+#ifndef NDEBUG
+ printf("\n");
+ printf("Mbufs :\n");
+ printf("Tx Unchained mbufs : %u\n",
+ stats.unchainedTxMBufs);
+ printf("Tx Chained bufs : %u\n",
+ stats.chainedTxMBufs);
+ printf("TxDone Unchained mbufs : %u\n",
+ stats.unchainedTxDoneMBufs);
+ printf("TxDone Chained bufs : %u\n",
+ stats.chainedTxDoneMBufs);
+ printf("RxFree Unchained mbufs : %u\n",
+ stats.unchainedRxFreeMBufs);
+ printf("RxFree Chained bufs : %u\n",
+ stats.chainedRxFreeMBufs);
+ printf("Rx Unchained mbufs : %u\n",
+ stats.unchainedRxMBufs);
+ printf("Rx Chained bufs : %u\n",
+ stats.chainedRxMBufs);
+
+ printf("\n");
+ printf("Software queue usage :\n");
+ printf("Buffers added to S/W Q : %u\n",
+ stats.addToSwQ);
+ printf("Buffers removed from S/W Q : %u\n",
+ stats.removeFromSwQ);
+
+ printf("\n");
+ printf("Hardware queues callbacks :\n");
+
+ for(portId=0; portId < IX_ETH_ACC_NUMBER_OF_PORTS; portId++)
+ {
+ rxFreeCallbackCounter += rx[portId].rxFreeLowCallback;
+ txCallbackCounter += tx[portId].txLowThreshCallback;
+ }
+ printf("Tx Done QM Callback invoked : %u\n",
+ stats.txDoneCallbackCounter);
+ printf("Tx QM Callback invoked : %u\n",
+ txCallbackCounter);
+ printf("Rx QM Callback invoked : %u\n",
+ stats.rxCallbackCounter);
+ printf("Rx QM Callback burst read : %u\n",
+ stats.rxCallbackBurstRead);
+ printf("Rx Free QM Callback invoked : %u\n",
+ rxFreeCallbackCounter);
+#endif
+ printf("Unexpected errors in CB : %u (should be 0)\n",
+ stats.unexpectedError);
+ printf("\n");
+
+ printf("Hardware queues levels :\n");
+ printf("Transmit Port 1 Q : %u \n",numTx0Entries);
+ printf("Transmit Port 2 Q : %u \n",numTx1Entries);
+#ifdef __ixp46X
+ printf("Transmit Port 3 Q : %u \n",numTx2Entries);
+#endif
+ printf("Transmit Done Q : %u \n",numTxDoneEntries);
+ printf("Receive Q : %u \n",numRxEntries);
+ printf("Receive Free Port 1 Q : %u \n",numRxFree0Entries);
+ printf("Receive Free Port 2 Q : %u \n",numRxFree1Entries);
+#ifdef __ixp46X
+ printf("Receive Free Port 3 Q : %u \n",numRxFree2Entries);
+#endif
+
+#ifndef NDEBUG
+ printf("\n");
+ printf("# Total Buffers accounted for : %u\n",
+ totalBuffers);
+
+ numBuffersInSwQ = ixEthAccDataStats.addToSwQ -
+ ixEthAccDataStats.removeFromSwQ;
+
+ printf(" Buffers in S/W Qs : %u\n",
+ numBuffersInSwQ);
+ printf(" Buffers in H/W Qs or NPEs : %u\n",
+ totalBuffers - numBuffersInSwQ);
+#endif
+
+ printf("Rx QoS Discipline : %s\n",
+ (ixEthAccDataInfo.schDiscipline ==
+ FIFO_PRIORITY ) ? "Enabled" : "Disabled");
+
+ for(portId=0; portId < IX_ETH_ACC_NUMBER_OF_PORTS; portId++)
+ {
+ printf("Tx QoS Discipline port %u : %s\n",
+ portId,
+ (ixEthAccPortData[portId].ixEthAccTxData.schDiscipline ==
+ FIFO_PRIORITY ) ? "Enabled" : "Disabled");
+ }
+ printf("\n");
+}
+
+
+
+
+
diff --git a/cpu/ixp/npe/IxEthAccMac.c b/cpu/ixp/npe/IxEthAccMac.c
new file mode 100644
index 0000000000..d57e71678e
--- /dev/null
+++ b/cpu/ixp/npe/IxEthAccMac.c
@@ -0,0 +1,2641 @@
+/**
+ * @file IxEthAccMac.c
+ *
+ * @author Intel Corporation
+ * @date
+ *
+ * @brief MAC control functions
+ *
+ * Design Notes:
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+#include "IxOsal.h"
+#include "IxNpeMh.h"
+#ifdef CONFIG_IXP425_COMPONENT_ETHDB
+#include "IxEthDB.h"
+#endif
+#include "IxEthDBPortDefs.h"
+#include "IxEthNpe.h"
+#include "IxEthAcc.h"
+#include "IxEthAccDataPlane_p.h"
+#include "IxEthAcc_p.h"
+#include "IxEthAccMac_p.h"
+
+/* Maximum number of retries during ixEthAccPortDisable, which
+ * is approximately 10 seconds
+*/
+#define IX_ETH_ACC_MAX_RETRY 500
+
+/* Maximum number of retries during ixEthAccPortDisable when expecting
+ * timeout
+ */
+#define IX_ETH_ACC_MAX_RETRY_TIMEOUT 5
+
+#define IX_ETH_ACC_VALIDATE_PORT_ID(portId) \
+ do \
+ { \
+ if(!IX_ETH_ACC_IS_PORT_VALID(portId)) \
+ { \
+ return IX_ETH_ACC_INVALID_PORT; \
+ } \
+ } while(0)
+
+PUBLIC IxEthAccMacState ixEthAccMacState[IX_ETH_ACC_NUMBER_OF_PORTS];
+
+PRIVATE UINT32 ixEthAccMacBase[IX_ETH_ACC_NUMBER_OF_PORTS];
+
+/*Forward function declarations*/
+PRIVATE void
+ixEthAccPortDisableRx (IxEthAccPortId portId,
+ IX_OSAL_MBUF * mBufPtr,
+ BOOL useMultiBufferCallback);
+
+PRIVATE void
+ixEthAccPortDisableRxAndReplenish (IxEthAccPortId portId,
+ IX_OSAL_MBUF * mBufPtr,
+ BOOL useMultiBufferCallback);
+
+PRIVATE void
+ixEthAccPortDisableTxDone (UINT32 cbTag,
+ IX_OSAL_MBUF *mbuf);
+
+PRIVATE void
+ixEthAccPortDisableTxDoneAndSubmit (UINT32 cbTag,
+ IX_OSAL_MBUF *mbuf);
+
+PRIVATE void
+ixEthAccPortDisableRxCallback (UINT32 cbTag,
+ IX_OSAL_MBUF * mBufPtr,
+ UINT32 learnedPortId);
+
+PRIVATE void
+ixEthAccPortDisableMultiBufferRxCallback (UINT32 cbTag,
+ IX_OSAL_MBUF **mBufPtr);
+
+PRIVATE IxEthAccStatus
+ixEthAccPortDisableTryTransmit(UINT32 portId);
+
+PRIVATE IxEthAccStatus
+ixEthAccPortDisableTryReplenish(UINT32 portId);
+
+PRIVATE IxEthAccStatus
+ixEthAccPortMulticastMacAddressGet (IxEthAccPortId portId,
+ IxEthAccMacAddr *macAddr);
+
+PRIVATE IxEthAccStatus
+ixEthAccPortMulticastMacFilterGet (IxEthAccPortId portId,
+ IxEthAccMacAddr *macAddr);
+
+PRIVATE void
+ixEthAccMacNpeStatsMessageCallback (IxNpeMhNpeId npeId,
+ IxNpeMhMessage msg);
+
+PRIVATE void
+ixEthAccMacNpeStatsResetMessageCallback (IxNpeMhNpeId npeId,
+ IxNpeMhMessage msg);
+
+PRIVATE void
+ixEthAccNpeLoopbackMessageCallback (IxNpeMhNpeId npeId,
+ IxNpeMhMessage msg);
+
+PRIVATE void
+ixEthAccMulticastAddressSet(IxEthAccPortId portId);
+
+PRIVATE BOOL
+ixEthAccMacEqual(IxEthAccMacAddr *macAddr1,
+ IxEthAccMacAddr *macAddr2);
+
+PRIVATE void
+ixEthAccMacPrint(IxEthAccMacAddr *m);
+
+PRIVATE void
+ixEthAccMacStateUpdate(IxEthAccPortId portId);
+
+IxEthAccStatus
+ixEthAccMacMemInit(void)
+{
+ ixEthAccMacBase[IX_ETH_PORT_1] =
+ (UINT32) IX_OSAL_MEM_MAP(IX_ETH_ACC_MAC_0_BASE,
+ IX_OSAL_IXP400_ETHA_MAP_SIZE);
+ ixEthAccMacBase[IX_ETH_PORT_2] =
+ (UINT32) IX_OSAL_MEM_MAP(IX_ETH_ACC_MAC_1_BASE,
+ IX_OSAL_IXP400_ETHB_MAP_SIZE);
+#ifdef __ixp46X
+ ixEthAccMacBase[IX_ETH_PORT_3] =
+ (UINT32) IX_OSAL_MEM_MAP(IX_ETH_ACC_MAC_2_BASE,
+ IX_OSAL_IXP400_ETH_NPEA_MAP_SIZE);
+ if (ixEthAccMacBase[IX_ETH_PORT_3] == 0)
+ {
+ ixOsalLog(IX_OSAL_LOG_LVL_FATAL,
+ IX_OSAL_LOG_DEV_STDOUT,
+ "EthAcc: Could not map MAC I/O memory\n",
+ 0, 0, 0, 0, 0 ,0);
+
+ return IX_ETH_ACC_FAIL;
+ }
+#endif
+
+ if (ixEthAccMacBase[IX_ETH_PORT_1] == 0
+ || ixEthAccMacBase[IX_ETH_PORT_2] == 0)
+ {
+ ixOsalLog(IX_OSAL_LOG_LVL_FATAL,
+ IX_OSAL_LOG_DEV_STDOUT,
+ "EthAcc: Could not map MAC I/O memory\n",
+ 0, 0, 0, 0, 0 ,0);
+
+ return IX_ETH_ACC_FAIL;
+ }
+
+ return IX_ETH_ACC_SUCCESS;
+}
+
+void
+ixEthAccMacUnload(void)
+{
+ IX_OSAL_MEM_UNMAP(ixEthAccMacBase[IX_ETH_PORT_1]);
+ IX_OSAL_MEM_UNMAP(ixEthAccMacBase[IX_ETH_PORT_2]);
+#ifdef __ixp46X
+ IX_OSAL_MEM_UNMAP(ixEthAccMacBase[IX_ETH_PORT_3]);
+ ixEthAccMacBase[IX_ETH_PORT_3] = 0;
+#endif
+ ixEthAccMacBase[IX_ETH_PORT_2] = 0;
+ ixEthAccMacBase[IX_ETH_PORT_1] = 0;
+}
+
+IxEthAccStatus
+ixEthAccPortEnablePriv(IxEthAccPortId portId)
+{
+ IX_ETH_ACC_VALIDATE_PORT_ID(portId);
+
+ if (IX_ETH_ACC_SUCCESS != ixEthAccSingleEthNpeCheck(portId))
+ {
+ IX_ETH_ACC_WARNING_LOG("EthAcc: Unavailable Eth %d: Cannot enable port.\n",(INT32)portId,0,0,0,0,0);
+ return IX_ETH_ACC_SUCCESS ;
+ }
+
+ if (!IX_ETH_IS_PORT_INITIALIZED(portId))
+ {
+ printf("EthAcc: (Mac) cannot enable port %d, port not initialized\n", portId);
+ return (IX_ETH_ACC_PORT_UNINITIALIZED);
+ }
+
+ if (ixEthAccPortData[portId].ixEthAccTxData.txBufferDoneCallbackFn == NULL)
+ {
+ /* TxDone callback not registered */
+ printf("EthAcc: (Mac) cannot enable port %d, TxDone callback not registered\n", portId);
+ return (IX_ETH_ACC_PORT_UNINITIALIZED);
+ }
+
+ if ((ixEthAccPortData[portId].ixEthAccRxData.rxCallbackFn == NULL)
+ && (ixEthAccPortData[portId].ixEthAccRxData.rxMultiBufferCallbackFn == NULL))
+ {
+ /* Receive callback not registered */
+ printf("EthAcc: (Mac) cannot enable port %d, Rx callback not registered\n", portId);
+ return (IX_ETH_ACC_PORT_UNINITIALIZED);
+ }
+
+ if(!ixEthAccMacState[portId].initDone)
+ {
+ printf("EthAcc: (Mac) cannot enable port %d, MAC address not set\n", portId);
+ return (IX_ETH_ACC_MAC_UNINITIALIZED);
+ }
+
+ /* if the state is being set to what it is already at, do nothing*/
+ if (ixEthAccMacState[portId].enabled)
+ {
+ return IX_ETH_ACC_SUCCESS;
+ }
+
+#ifdef CONFIG_IXP425_COMPONENT_ETHDB
+ /* enable ethernet database for this port */
+ if (ixEthDBPortEnable(portId) != IX_ETH_DB_SUCCESS)
+ {
+ printf("EthAcc: (Mac) cannot enable port %d, EthDB failure\n", portId);
+ return IX_ETH_ACC_FAIL;
+ }
+#endif
+
+ /* set the MAC core registers */
+ REG_WRITE(ixEthAccMacBase[portId],
+ IX_ETH_ACC_MAC_TX_CNTRL2,
+ IX_ETH_ACC_TX_CNTRL2_RETRIES_MASK);
+
+ REG_WRITE(ixEthAccMacBase[portId],
+ IX_ETH_ACC_MAC_RANDOM_SEED,
+ IX_ETH_ACC_RANDOM_SEED_DEFAULT);
+
+ REG_WRITE(ixEthAccMacBase[portId],
+ IX_ETH_ACC_MAC_THRESH_P_EMPTY,
+ IX_ETH_ACC_MAC_THRESH_P_EMPTY_DEFAULT);
+
+ REG_WRITE(ixEthAccMacBase[portId],
+ IX_ETH_ACC_MAC_THRESH_P_FULL,
+ IX_ETH_ACC_MAC_THRESH_P_FULL_DEFAULT);
+
+ REG_WRITE(ixEthAccMacBase[portId],
+ IX_ETH_ACC_MAC_TX_DEFER,
+ IX_ETH_ACC_MAC_TX_DEFER_DEFAULT);
+
+ REG_WRITE(ixEthAccMacBase[portId],
+ IX_ETH_ACC_MAC_TX_TWO_DEFER_1,
+ IX_ETH_ACC_MAC_TX_TWO_DEFER_1_DEFAULT);
+
+ REG_WRITE(ixEthAccMacBase[portId],
+ IX_ETH_ACC_MAC_TX_TWO_DEFER_2,
+ IX_ETH_ACC_MAC_TX_TWO_DEFER_2_DEFAULT);
+
+ REG_WRITE(ixEthAccMacBase[portId],
+ IX_ETH_ACC_MAC_SLOT_TIME,
+ IX_ETH_ACC_MAC_SLOT_TIME_DEFAULT);
+
+ REG_WRITE(ixEthAccMacBase[portId],
+ IX_ETH_ACC_MAC_INT_CLK_THRESH,
+ IX_ETH_ACC_MAC_INT_CLK_THRESH_DEFAULT);
+
+ REG_WRITE(ixEthAccMacBase[portId],
+ IX_ETH_ACC_MAC_BUF_SIZE_TX,
+ IX_ETH_ACC_MAC_BUF_SIZE_TX_DEFAULT);
+
+ REG_WRITE(ixEthAccMacBase[portId],
+ IX_ETH_ACC_MAC_TX_CNTRL1,
+ IX_ETH_ACC_TX_CNTRL1_DEFAULT);
+
+ REG_WRITE(ixEthAccMacBase[portId],
+ IX_ETH_ACC_MAC_RX_CNTRL1,
+ IX_ETH_ACC_RX_CNTRL1_DEFAULT);
+
+ /* set the global state */
+ ixEthAccMacState[portId].portDisableState = ACTIVE;
+ ixEthAccMacState[portId].enabled = TRUE;
+
+ /* rewrite the setup (including mac filtering) depending
+ * on current options
+ */
+ ixEthAccMacStateUpdate(portId);
+
+ return IX_ETH_ACC_SUCCESS;
+}
+
+/*
+ * PortDisable local variables. They contain the intermediate steps
+ * while the port is being disabled and the buffers being drained out
+ * of the NPE.
+ */
+typedef void (*IxEthAccPortDisableRx)(IxEthAccPortId portId,
+ IX_OSAL_MBUF * mBufPtr,
+ BOOL useMultiBufferCallback);
+static IxEthAccPortRxCallback
+ixEthAccPortDisableFn[IX_ETH_ACC_NUMBER_OF_PORTS];
+static IxEthAccPortMultiBufferRxCallback
+ixEthAccPortDisableMultiBufferFn[IX_ETH_ACC_NUMBER_OF_PORTS];
+static IxEthAccPortDisableRx
+ixEthAccPortDisableRxTable[IX_ETH_ACC_NUMBER_OF_PORTS];
+static UINT32
+ixEthAccPortDisableCbTag[IX_ETH_ACC_NUMBER_OF_PORTS];
+static UINT32
+ixEthAccPortDisableMultiBufferCbTag[IX_ETH_ACC_NUMBER_OF_PORTS];
+
+static IxEthAccPortTxDoneCallback
+ixEthAccPortDisableTxDoneFn[IX_ETH_ACC_NUMBER_OF_PORTS];
+static UINT32
+ixEthAccPortDisableTxDoneCbTag[IX_ETH_ACC_NUMBER_OF_PORTS];
+
+static UINT32
+ixEthAccPortDisableUserBufferCount[IX_ETH_ACC_NUMBER_OF_PORTS];
+
+/*
+ * PortDisable private callbacks functions. They handle the user
+ * traffic, and the special buffers (one for tx, one for rx) used
+ * in portDisable.
+ */
+PRIVATE void
+ixEthAccPortDisableTxDone(UINT32 cbTag,
+ IX_OSAL_MBUF *mbuf)
+{
+ IxEthAccPortId portId = (IxEthAccPortId)cbTag;
+ volatile IxEthAccPortDisableState *txState = &ixEthAccMacState[portId].txState;
+
+ /* check for the special mbuf used in portDisable */
+ if (mbuf == ixEthAccMacState[portId].portDisableTxMbufPtr)
+ {
+ *txState = TRANSMIT_DONE;
+ }
+ else
+ {
+ /* increment the count of user traffic during portDisable */
+ ixEthAccPortDisableUserBufferCount[portId]++;
+
+ /* call client TxDone function */
+ ixEthAccPortDisableTxDoneFn[portId](ixEthAccPortDisableTxDoneCbTag[portId], mbuf);
+ }
+}
+
+PRIVATE IxEthAccStatus
+ixEthAccPortDisableTryTransmit(UINT32 portId)
+{
+ int key;
+ IxEthAccStatus status = IX_ETH_ACC_SUCCESS;
+ volatile IxEthAccPortDisableState *txState = &ixEthAccMacState[portId].txState;
+ /* transmit the special buffer again if it is transmitted
+ * and update the txState
+ * This section is protected because the portDisable context
+ * run an identical code, so the system keeps transmitting at the
+ * maximum rate.
+ */
+ key = ixOsalIrqLock();
+ if (*txState == TRANSMIT_DONE)
+ {
+ IX_OSAL_MBUF *mbufTxPtr = ixEthAccMacState[portId].portDisableTxMbufPtr;
+ *txState = TRANSMIT;
+ status = ixEthAccPortTxFrameSubmit(portId,
+ mbufTxPtr,
+ IX_ETH_ACC_TX_DEFAULT_PRIORITY);
+ }
+ ixOsalIrqUnlock(key);
+
+ return status;
+}
+
+PRIVATE void
+ixEthAccPortDisableTxDoneAndSubmit(UINT32 cbTag,
+ IX_OSAL_MBUF *mbuf)
+{
+ IxEthAccPortId portId = (IxEthAccPortId)cbTag;
+
+ /* call the callback which forwards the traffic to the client */
+ ixEthAccPortDisableTxDone(cbTag, mbuf);
+
+ /* try to transmit the buffer used in portDisable
+ * if seen in TxDone
+ */
+ ixEthAccPortDisableTryTransmit(portId);
+}
+
+PRIVATE void
+ixEthAccPortDisableRx (IxEthAccPortId portId,
+ IX_OSAL_MBUF * mBufPtr,
+ BOOL useMultiBufferCallback)
+{
+ volatile IxEthAccPortDisableState *rxState = &ixEthAccMacState[portId].rxState;
+ IX_OSAL_MBUF *mNextPtr;
+
+ while (mBufPtr)
+ {
+ mNextPtr = IX_OSAL_MBUF_NEXT_BUFFER_IN_PKT_PTR(mBufPtr);
+ IX_OSAL_MBUF_NEXT_BUFFER_IN_PKT_PTR(mBufPtr) = NULL;
+
+ /* check for the special mbuf used in portDisable */
+ if (mBufPtr == ixEthAccMacState[portId].portDisableRxMbufPtr)
+ {
+ *rxState = RECEIVE;
+ }
+ else
+ {
+ /* increment the count of user traffic during portDisable */
+ ixEthAccPortDisableUserBufferCount[portId]++;
+
+ /* reset the received payload length during portDisable */
+ IX_OSAL_MBUF_MLEN(mBufPtr) = 0;
+ IX_OSAL_MBUF_PKT_LEN(mBufPtr) = 0;
+
+ if (useMultiBufferCallback)
+ {
+ /* call the user callback with one unchained
+ * buffer, without payload. A small array is built
+ * to be used as a parameter (the user callback expects
+ * to receive an array ended by a NULL pointer.
+ */
+ IX_OSAL_MBUF *mBufPtrArray[2];
+
+ mBufPtrArray[0] = mBufPtr;
+ mBufPtrArray[1] = NULL;
+ ixEthAccPortDisableMultiBufferFn[portId](
+ ixEthAccPortDisableMultiBufferCbTag[portId],
+ mBufPtrArray);
+ }
+ else
+ {
+ /* call the user callback with a unchained
+ * buffer, without payload and the destination port is
+ * unknown.
+ */
+ ixEthAccPortDisableFn[portId](
+ ixEthAccPortDisableCbTag[portId],
+ mBufPtr,
+ IX_ETH_DB_UNKNOWN_PORT /* port not found */);
+ }
+ }
+
+ mBufPtr = mNextPtr;
+ }
+}
+
+PRIVATE IxEthAccStatus
+ixEthAccPortDisableTryReplenish(UINT32 portId)
+{
+ int key;
+ IxEthAccStatus status = IX_ETH_ACC_SUCCESS;
+ volatile IxEthAccPortDisableState *rxState = &ixEthAccMacState[portId].rxState;
+ /* replenish with the special buffer again if it is received
+ * and update the rxState
+ * This section is protected because the portDisable context
+ * run an identical code, so the system keeps replenishing at the
+ * maximum rate.
+ */
+ key = ixOsalIrqLock();
+ if (*rxState == RECEIVE)
+ {
+ IX_OSAL_MBUF *mbufRxPtr = ixEthAccMacState[portId].portDisableRxMbufPtr;
+ *rxState = REPLENISH;
+ IX_OSAL_MBUF_MLEN(mbufRxPtr) = IX_ETHACC_RX_MBUF_MIN_SIZE;
+ status = ixEthAccPortRxFreeReplenish(portId, mbufRxPtr);
+ }
+ ixOsalIrqUnlock(key);
+
+ return status;
+}
+
+PRIVATE void
+ixEthAccPortDisableRxAndReplenish (IxEthAccPortId portId,
+ IX_OSAL_MBUF * mBufPtr,
+ BOOL useMultiBufferCallback)
+{
+ /* call the callback which forwards the traffic to the client */
+ ixEthAccPortDisableRx(portId, mBufPtr, useMultiBufferCallback);
+
+ /* try to replenish with the buffer used in portDisable
+ * if seen in Rx
+ */
+ ixEthAccPortDisableTryReplenish(portId);
+}
+
+PRIVATE void
+ixEthAccPortDisableRxCallback (UINT32 cbTag,
+ IX_OSAL_MBUF * mBufPtr,
+ UINT32 learnedPortId)
+{
+ IxEthAccPortId portId = (IxEthAccPortId)cbTag;
+
+ /* call the portDisable receive callback */
+ (ixEthAccPortDisableRxTable[portId])(portId, mBufPtr, FALSE);
+}
+
+PRIVATE void
+ixEthAccPortDisableMultiBufferRxCallback (UINT32 cbTag,
+ IX_OSAL_MBUF **mBufPtr)
+{
+ IxEthAccPortId portId = (IxEthAccPortId)cbTag;
+
+ while (*mBufPtr)
+ {
+ /* call the portDisable receive callback with one buffer at a time */
+ (ixEthAccPortDisableRxTable[portId])(portId, *mBufPtr++, TRUE);
+ }
+}
+
+IxEthAccStatus
+ixEthAccPortDisablePriv(IxEthAccPortId portId)
+{
+ IxEthAccStatus status = IX_ETH_ACC_SUCCESS;
+ int key;
+ int retry, retryTimeout;
+ volatile IxEthAccPortDisableState *state = &ixEthAccMacState[portId].portDisableState;
+ volatile IxEthAccPortDisableState *rxState = &ixEthAccMacState[portId].rxState;
+ volatile IxEthAccPortDisableState *txState = &ixEthAccMacState[portId].txState;
+
+ IX_ETH_ACC_VALIDATE_PORT_ID(portId);
+
+ if (IX_ETH_ACC_SUCCESS != ixEthAccSingleEthNpeCheck(portId))
+ {
+ IX_ETH_ACC_WARNING_LOG("EthAcc: Unavailable Eth %d: Cannot disable port.\n",(INT32)portId,0,0,0,0,0);
+ return IX_ETH_ACC_SUCCESS ;
+ }
+
+ if (!IX_ETH_IS_PORT_INITIALIZED(portId))
+ {
+ return (IX_ETH_ACC_PORT_UNINITIALIZED);
+ }
+
+ /* if the state is being set to what it is already at, do nothing */
+ if (!ixEthAccMacState[portId].enabled)
+ {
+ return IX_ETH_ACC_SUCCESS;
+ }
+
+ *state = DISABLED;
+
+ /* disable MAC receive first */
+ ixEthAccPortRxDisablePriv(portId);
+
+#ifdef CONFIG_IXP425_COMPONENT_ETHDB
+ /* disable ethernet database for this port - It is done now to avoid
+ * issuing ELT maintenance after requesting 'port disable' in an NPE
+ */
+ if (ixEthDBPortDisable(portId) != IX_ETH_DB_SUCCESS)
+ {
+ status = IX_ETH_ACC_FAIL;
+ IX_ETH_ACC_FATAL_LOG("ixEthAccPortDisable: failed to disable EthDB for this port\n", 0, 0, 0, 0, 0, 0);
+ }
+#endif
+
+ /* enter the critical section */
+ key = ixOsalIrqLock();
+
+ /* swap the Rx and TxDone callbacks */
+ ixEthAccPortDisableFn[portId] = ixEthAccPortData[portId].ixEthAccRxData.rxCallbackFn;
+ ixEthAccPortDisableMultiBufferFn[portId] = ixEthAccPortData[portId].ixEthAccRxData.rxMultiBufferCallbackFn;
+ ixEthAccPortDisableCbTag[portId] = ixEthAccPortData[portId].ixEthAccRxData.rxCallbackTag;
+ ixEthAccPortDisableMultiBufferCbTag[portId] = ixEthAccPortData[portId].ixEthAccRxData.rxMultiBufferCallbackTag;
+ ixEthAccPortDisableTxDoneFn[portId] = ixEthAccPortData[portId].ixEthAccTxData.txBufferDoneCallbackFn;
+ ixEthAccPortDisableTxDoneCbTag[portId] = ixEthAccPortData[portId].ixEthAccTxData.txCallbackTag;
+ ixEthAccPortDisableRxTable[portId] = ixEthAccPortDisableRx;
+
+ /* register temporary callbacks */
+ ixEthAccPortData[portId].ixEthAccRxData.rxCallbackFn = ixEthAccPortDisableRxCallback;
+ ixEthAccPortData[portId].ixEthAccRxData.rxCallbackTag = portId;
+
+ ixEthAccPortData[portId].ixEthAccRxData.rxMultiBufferCallbackFn = ixEthAccPortDisableMultiBufferRxCallback;
+ ixEthAccPortData[portId].ixEthAccRxData.rxMultiBufferCallbackTag = portId;
+
+ ixEthAccPortData[portId].ixEthAccTxData.txBufferDoneCallbackFn = ixEthAccPortDisableTxDone;
+ ixEthAccPortData[portId].ixEthAccTxData.txCallbackTag = portId;
+
+ /* initialise the Rx state and Tx states */
+ *txState = TRANSMIT_DONE;
+ *rxState = RECEIVE;
+
+ /* exit the critical section */
+ ixOsalIrqUnlock(key);
+
+ /* enable a NPE loopback */
+ if (ixEthAccNpeLoopbackEnablePriv(portId) != IX_ETH_ACC_SUCCESS)
+ {
+ status = IX_ETH_ACC_FAIL;
+ }
+
+ if (status == IX_ETH_ACC_SUCCESS)
+ {
+ retry = 0;
+
+ /* Step 1 : Drain Tx traffic and TxDone queues :
+ *
+ * Transmit and replenish at least once with the
+ * special buffers until both of them are seen
+ * in the callback hook
+ *
+ * (the receive callback keeps replenishing, so once we see
+ * the special Tx buffer, we can be sure that Tx drain is complete)
+ */
+ ixEthAccPortDisableRxTable[portId]
+ = ixEthAccPortDisableRxAndReplenish;
+ ixEthAccPortData[portId].ixEthAccTxData.txBufferDoneCallbackFn
+ = ixEthAccPortDisableTxDone;
+
+ do
+ {
+ /* keep replenishing */
+ status = ixEthAccPortDisableTryReplenish(portId);
+ if (status == IX_ETH_ACC_SUCCESS)
+ {
+ /* keep transmitting */
+ status = ixEthAccPortDisableTryTransmit(portId);
+ }
+ if (status == IX_ETH_ACC_SUCCESS)
+ {
+ /* wait for some traffic being processed */
+ ixOsalSleep(IX_ETH_ACC_PORT_DISABLE_DELAY_MSECS);
+ }
+ }
+ while ((status == IX_ETH_ACC_SUCCESS)
+ && (retry++ < IX_ETH_ACC_MAX_RETRY)
+ && (*txState == TRANSMIT));
+
+ /* Step 2 : Drain Rx traffic, RxFree and Rx queues :
+ *
+ * Transmit and replenish at least once with the
+ * special buffers until both of them are seen
+ * in the callback hook
+ * (the transmit callback keeps transmitting, and when we see
+ * the special Rx buffer, we can be sure that rxFree drain
+ * is complete)
+ *
+ * The nested loop helps to retry if the user was keeping
+ * replenishing or transmitting during portDisable.
+ *
+ * The 2 nested loops ensure more retries if user traffic is
+ * seen during portDisable : the user should not replenish
+ * or transmit while portDisable is running. However, because of
+ * the queueing possibilities in ethAcc dataplane, it is possible
+ * that a lot of traffic is left in the queues (e.g. when
+ * transmitting over a low speed link) and therefore, more
+ * retries are allowed to help flushing the buffers out.
+ */
+ ixEthAccPortDisableRxTable[portId]
+ = ixEthAccPortDisableRx;
+ ixEthAccPortData[portId].ixEthAccTxData.txBufferDoneCallbackFn
+ = ixEthAccPortDisableTxDoneAndSubmit;
+
+ do
+ {
+ do
+ {
+ ixEthAccPortDisableUserBufferCount[portId] = 0;
+
+ /* keep replenishing */
+ status = ixEthAccPortDisableTryReplenish(portId);
+ if (status == IX_ETH_ACC_SUCCESS)
+ {
+ /* keep transmitting */
+ status = ixEthAccPortDisableTryTransmit(portId);
+ }
+ if (status == IX_ETH_ACC_SUCCESS)
+ {
+ /* wait for some traffic being processed */
+ ixOsalSleep(IX_ETH_ACC_PORT_DISABLE_DELAY_MSECS);
+ }
+ }
+ while ((status == IX_ETH_ACC_SUCCESS)
+ && (retry++ < IX_ETH_ACC_MAX_RETRY)
+ && ((ixEthAccPortDisableUserBufferCount[portId] != 0)
+ || (*rxState == REPLENISH)));
+
+ /* After the first iteration, change the receive callbacks,
+ * to process only 1 buffer at a time
+ */
+ ixEthAccPortDisableRxTable[portId]
+ = ixEthAccPortDisableRx;
+ ixEthAccPortData[portId].ixEthAccTxData.txBufferDoneCallbackFn
+ = ixEthAccPortDisableTxDone;
+
+ /* repeat the whole process while user traffic is seen in TxDone
+ *
+ * The conditions to stop the loop are
+ * - Xscale has both Rx and Tx special buffers
+ * (txState = transmit, rxState = receive)
+ * - any error in txSubmit or rxReplenish
+ * - no user traffic seen
+ * - an excessive amount of retries
+ */
+ }
+ while ((status == IX_ETH_ACC_SUCCESS)
+ && (retry < IX_ETH_ACC_MAX_RETRY)
+ && (*txState == TRANSMIT));
+
+ /* check the loop exit conditions. The NPE should not hold
+ * the special buffers.
+ */
+ if ((*rxState == REPLENISH) || (*txState == TRANSMIT))
+ {
+ status = IX_ETH_ACC_FAIL;
+ }
+
+ if (status == IX_ETH_ACC_SUCCESS)
+ {
+ /* Step 3 : Replenish without transmitting until a timeout
+ * occurs, in order to drain the internal NPE fifos
+ *
+ * we can expect a few frames srill held
+ * in the NPE.
+ *
+ * The 2 nested loops take care about the NPE dropping traffic
+ * (including loopback traffic) when the Rx queue is full.
+ *
+ * The timeout value is very conservative
+ * since the loopback used keeps replenishhing.
+ *
+ */
+ do
+ {
+ ixEthAccPortDisableRxTable[portId] = ixEthAccPortDisableRxAndReplenish;
+ ixEthAccPortDisableUserBufferCount[portId] = 0;
+ retryTimeout = 0;
+ do
+ {
+ /* keep replenishing */
+ status = ixEthAccPortDisableTryReplenish(portId);
+ if (status == IX_ETH_ACC_SUCCESS)
+ {
+ /* wait for some traffic being processed */
+ ixOsalSleep(IX_ETH_ACC_PORT_DISABLE_DELAY_MSECS);
+ }
+ }
+ while ((status == IX_ETH_ACC_SUCCESS)
+ && (retryTimeout++ < IX_ETH_ACC_MAX_RETRY_TIMEOUT));
+
+ /* Step 4 : Transmit once. Stop replenish
+ *
+ * After the Rx timeout, we are sure that the NPE does not
+ * hold any frame in its internal NPE fifos.
+ *
+ * At this point, the NPE still holds the last rxFree buffer.
+ * By transmitting a single frame, this should unblock the
+ * last rxFree buffer. This code just transmit once and
+ * wait for both frames seen in TxDone and in rxFree.
+ *
+ */
+ ixEthAccPortDisableRxTable[portId] = ixEthAccPortDisableRx;
+ status = ixEthAccPortDisableTryTransmit(portId);
+
+ /* the NPE should immediatelyt release
+ * the last Rx buffer and the last transmitted buffer
+ * unless the last Tx frame was dropped (rx queue full)
+ */
+ if (status == IX_ETH_ACC_SUCCESS)
+ {
+ retryTimeout = 0;
+ do
+ {
+ ixOsalSleep(IX_ETH_ACC_PORT_DISABLE_DELAY_MSECS);
+ }
+ while ((*rxState == REPLENISH)
+ && (retryTimeout++ < IX_ETH_ACC_MAX_RETRY_TIMEOUT));
+ }
+
+ /* the NPE may have dropped the traffic because of Rx
+ * queue being full. This code ensures that the last
+ * Tx and Rx frames are both received.
+ */
+ }
+ while ((status == IX_ETH_ACC_SUCCESS)
+ && (retry++ < IX_ETH_ACC_MAX_RETRY)
+ && ((*txState == TRANSMIT)
+ || (*rxState == REPLENISH)
+ || (ixEthAccPortDisableUserBufferCount[portId] != 0)));
+
+ /* Step 5 : check the final states : the NPE has
+ * no buffer left, nor in Tx , nor in Rx directions.
+ */
+ if ((*rxState == REPLENISH) || (*txState == TRANSMIT))
+ {
+ status = IX_ETH_ACC_FAIL;
+ }
+ }
+
+ /* now all the buffers are drained, disable NPE loopback
+ * This is done regardless of the logic to drain the queues and
+ * the internal buffers held by the NPE.
+ */
+ if (ixEthAccNpeLoopbackDisablePriv(portId) != IX_ETH_ACC_SUCCESS)
+ {
+ status = IX_ETH_ACC_FAIL;
+ }
+ }
+
+ /* disable MAC Tx and Rx services */
+ ixEthAccMacState[portId].enabled = FALSE;
+ ixEthAccMacStateUpdate(portId);
+
+ /* restore the Rx and TxDone callbacks (within a critical section) */
+ key = ixOsalIrqLock();
+
+ ixEthAccPortData[portId].ixEthAccRxData.rxCallbackFn = ixEthAccPortDisableFn[portId];
+ ixEthAccPortData[portId].ixEthAccRxData.rxCallbackTag = ixEthAccPortDisableCbTag[portId];
+ ixEthAccPortData[portId].ixEthAccRxData.rxMultiBufferCallbackFn = ixEthAccPortDisableMultiBufferFn[portId];
+ ixEthAccPortData[portId].ixEthAccRxData.rxMultiBufferCallbackTag = ixEthAccPortDisableMultiBufferCbTag[portId];
+ ixEthAccPortData[portId].ixEthAccTxData.txBufferDoneCallbackFn = ixEthAccPortDisableTxDoneFn[portId];
+ ixEthAccPortData[portId].ixEthAccTxData.txCallbackTag = ixEthAccPortDisableTxDoneCbTag[portId];
+
+ ixOsalIrqUnlock(key);
+
+ /* the MAC core rx/tx disable may left the MAC hardware in an
+ * unpredictable state. A hw reset is executed before resetting
+ * all the MAC parameters to a known value.
+ */
+ REG_WRITE(ixEthAccMacBase[portId],
+ IX_ETH_ACC_MAC_CORE_CNTRL,
+ IX_ETH_ACC_CORE_RESET);
+
+ ixOsalSleep(IX_ETH_ACC_MAC_RESET_DELAY);
+
+ /* rewrite all parameters to their current value */
+ ixEthAccMacStateUpdate(portId);
+
+ REG_WRITE(ixEthAccMacBase[portId],
+ IX_ETH_ACC_MAC_INT_CLK_THRESH,
+ IX_ETH_ACC_MAC_INT_CLK_THRESH_DEFAULT);
+
+ REG_WRITE(ixEthAccMacBase[portId],
+ IX_ETH_ACC_MAC_CORE_CNTRL,
+ IX_ETH_ACC_CORE_MDC_EN);
+
+ return status;
+}
+
+IxEthAccStatus
+ixEthAccPortEnabledQueryPriv(IxEthAccPortId portId, BOOL *enabled)
+{
+ IX_ETH_ACC_VALIDATE_PORT_ID(portId);
+
+ if (IX_ETH_ACC_SUCCESS != ixEthAccSingleEthNpeCheck(portId))
+ {
+ IX_ETH_ACC_WARNING_LOG("EthAcc: Unavailable Eth %d: Cannot enable port.\n",(INT32)portId,0,0,0,0,0);
+
+ /* Since Eth NPE is not available, port must be disabled */
+ *enabled = FALSE ;
+ return IX_ETH_ACC_SUCCESS ;
+ }
+
+ if (!IX_ETH_IS_PORT_INITIALIZED(portId))
+ {
+ /* Since Eth NPE is not available, port must be disabled */
+ *enabled = FALSE ;
+ return (IX_ETH_ACC_PORT_UNINITIALIZED);
+ }
+
+ *enabled = ixEthAccMacState[portId].enabled;
+
+ return IX_ETH_ACC_SUCCESS;
+}
+
+IxEthAccStatus
+ixEthAccPortMacResetPriv(IxEthAccPortId portId)
+{
+ IX_ETH_ACC_VALIDATE_PORT_ID(portId);
+
+ if (IX_ETH_ACC_SUCCESS != ixEthAccSingleEthNpeCheck(portId))
+ {
+ IX_ETH_ACC_WARNING_LOG("EthAcc: Eth %d: Cannot reset Ethernet coprocessor.\n",(INT32)portId,0,0,0,0,0);
+ return IX_ETH_ACC_SUCCESS ;
+ }
+
+ if (!IX_ETH_IS_PORT_INITIALIZED(portId))
+ {
+ return (IX_ETH_ACC_PORT_UNINITIALIZED);
+ }
+
+ REG_WRITE(ixEthAccMacBase[portId],
+ IX_ETH_ACC_MAC_CORE_CNTRL,
+ IX_ETH_ACC_CORE_RESET);
+
+ ixOsalSleep(IX_ETH_ACC_MAC_RESET_DELAY);
+
+ /* rewrite all parameters to their current value */
+ ixEthAccMacStateUpdate(portId);
+
+ REG_WRITE(ixEthAccMacBase[portId],
+ IX_ETH_ACC_MAC_INT_CLK_THRESH,
+ IX_ETH_ACC_MAC_INT_CLK_THRESH_DEFAULT);
+
+ REG_WRITE(ixEthAccMacBase[portId],
+ IX_ETH_ACC_MAC_CORE_CNTRL,
+ IX_ETH_ACC_CORE_MDC_EN);
+
+ return IX_ETH_ACC_SUCCESS;
+}
+
+IxEthAccStatus
+ixEthAccPortLoopbackEnable(IxEthAccPortId portId)
+{
+ UINT32 regval;
+
+ /* Turn off promiscuous mode */
+ IX_ETH_ACC_VALIDATE_PORT_ID(portId);
+
+ if (IX_ETH_ACC_SUCCESS != ixEthAccSingleEthNpeCheck(portId))
+ {
+ IX_ETH_ACC_WARNING_LOG("EthAcc: Eth %d: Cannot enable loopback.\n",(INT32)portId,0,0,0,0,0);
+ return IX_ETH_ACC_SUCCESS ;
+ }
+
+ if (!IX_ETH_IS_PORT_INITIALIZED(portId))
+ {
+ return (IX_ETH_ACC_PORT_UNINITIALIZED);
+ }
+
+ /* read register */
+ REG_READ(ixEthAccMacBase[portId],
+ IX_ETH_ACC_MAC_RX_CNTRL1,
+ regval);
+
+ /* update register */
+ REG_WRITE(ixEthAccMacBase[portId],
+ IX_ETH_ACC_MAC_RX_CNTRL1,
+ regval | IX_ETH_ACC_RX_CNTRL1_LOOP_EN);
+
+ return IX_ETH_ACC_SUCCESS;
+}
+
+PRIVATE void
+ixEthAccNpeLoopbackMessageCallback (IxNpeMhNpeId npeId,
+ IxNpeMhMessage msg)
+{
+ IxEthAccPortId portId = IX_ETH_ACC_NPE_TO_PORT_ID(npeId);
+
+#ifndef NDEBUG
+ /* Prudent to at least check the port is within range */
+ if (portId >= IX_ETH_ACC_NUMBER_OF_PORTS)
+ {
+ IX_ETH_ACC_FATAL_LOG("IXETHACC:ixEthAccPortDisableMessageCallback: Illegal port: %u\n",
+ (UINT32) portId, 0, 0, 0, 0, 0);
+
+ return;
+ }
+#endif
+
+ /* unlock message reception mutex */
+ ixOsalMutexUnlock(&ixEthAccMacState[portId].npeLoopbackMessageLock);
+}
+
+IxEthAccStatus
+ixEthAccNpeLoopbackEnablePriv(IxEthAccPortId portId)
+{
+ IX_STATUS npeMhStatus;
+ IxNpeMhMessage message;
+ IxEthAccStatus status = IX_ETH_ACC_SUCCESS;
+
+ /* Turn off promiscuous mode */
+ IX_ETH_ACC_VALIDATE_PORT_ID(portId);
+
+ if (IX_ETH_ACC_SUCCESS != ixEthAccSingleEthNpeCheck(portId))
+ {
+ IX_ETH_ACC_WARNING_LOG("EthAcc: Eth %d: Cannot enable NPE loopback.\n",(INT32)portId,0,0,0,0,0);
+ return IX_ETH_ACC_SUCCESS ;
+ }
+
+ if (!IX_ETH_IS_PORT_INITIALIZED(portId))
+ {
+ return (IX_ETH_ACC_PORT_UNINITIALIZED);
+ }
+
+ /* enable NPE loopback (lsb of the message contains the value 1) */
+ message.data[0] = (IX_ETHNPE_SETLOOPBACK_MODE << IX_ETH_ACC_MAC_MSGID_SHL)
+ | 0x01;
+ message.data[1] = 0;
+
+ npeMhStatus = ixNpeMhMessageWithResponseSend(IX_ETH_ACC_PORT_TO_NPE_ID(portId),
+ message,
+ IX_ETHNPE_SETLOOPBACK_MODE_ACK,
+ ixEthAccNpeLoopbackMessageCallback,
+ IX_NPEMH_SEND_RETRIES_DEFAULT);
+
+ if (npeMhStatus != IX_SUCCESS)
+ {
+ status = IX_ETH_ACC_FAIL;
+ }
+ else
+ {
+ /* wait for NPE loopbackEnable response */
+ if (ixOsalMutexLock(&ixEthAccMacState[portId]. npeLoopbackMessageLock,
+ IX_ETH_ACC_PORT_DISABLE_DELAY_MSECS)
+ != IX_SUCCESS)
+ {
+ status = IX_ETH_ACC_FAIL;
+ }
+ }
+
+ return status;
+}
+
+IxEthAccStatus
+ixEthAccPortTxEnablePriv(IxEthAccPortId portId)
+{
+ UINT32 regval;
+
+ /* Turn off promiscuous mode */
+ IX_ETH_ACC_VALIDATE_PORT_ID(portId);
+
+ if (IX_ETH_ACC_SUCCESS != ixEthAccSingleEthNpeCheck(portId))
+ {
+ IX_ETH_ACC_WARNING_LOG("EthAcc: Eth %d: Cannot enable TX.\n",(INT32)portId,0,0,0,0,0);
+ return IX_ETH_ACC_SUCCESS ;
+ }
+
+ if (!IX_ETH_IS_PORT_INITIALIZED(portId))
+ {
+ return (IX_ETH_ACC_PORT_UNINITIALIZED);
+ }
+
+ /* read register */
+ REG_READ(ixEthAccMacBase[portId],
+ IX_ETH_ACC_MAC_TX_CNTRL1,
+ regval);
+
+ /* update register */
+ REG_WRITE(ixEthAccMacBase[portId],
+ IX_ETH_ACC_MAC_TX_CNTRL1,
+ regval | IX_ETH_ACC_TX_CNTRL1_TX_EN);
+
+ return IX_ETH_ACC_SUCCESS;
+}
+
+IxEthAccStatus
+ixEthAccPortRxEnablePriv(IxEthAccPortId portId)
+{
+ UINT32 regval;
+
+ /* Turn off promiscuous mode */
+ IX_ETH_ACC_VALIDATE_PORT_ID(portId);
+
+ if (IX_ETH_ACC_SUCCESS != ixEthAccSingleEthNpeCheck(portId))
+ {
+ IX_ETH_ACC_WARNING_LOG("EthAcc: Eth %d: Cannot enable RX.\n",(INT32)portId,0,0,0,0,0);
+ return IX_ETH_ACC_SUCCESS ;
+ }
+
+ if (!IX_ETH_IS_PORT_INITIALIZED(portId))
+ {
+ return (IX_ETH_ACC_PORT_UNINITIALIZED);
+ }
+
+ /* read register */
+ REG_READ(ixEthAccMacBase[portId],
+ IX_ETH_ACC_MAC_RX_CNTRL1,
+ regval);
+
+ /* update register */
+ REG_WRITE(ixEthAccMacBase[portId],
+ IX_ETH_ACC_MAC_RX_CNTRL1,
+ regval | IX_ETH_ACC_RX_CNTRL1_RX_EN);
+
+ return IX_ETH_ACC_SUCCESS;
+}
+
+IxEthAccStatus
+ixEthAccPortLoopbackDisable(IxEthAccPortId portId)
+{
+ UINT32 regval;
+
+ IX_ETH_ACC_VALIDATE_PORT_ID(portId);
+
+ if (IX_ETH_ACC_SUCCESS != ixEthAccSingleEthNpeCheck(portId))
+ {
+ IX_ETH_ACC_WARNING_LOG("EthAcc: Eth %d: Cannot disable loopback.\n",(INT32)portId,0,0,0,0,0);
+ return IX_ETH_ACC_SUCCESS ;
+ }
+
+ if (!IX_ETH_IS_PORT_INITIALIZED(portId))
+ {
+ return (IX_ETH_ACC_PORT_UNINITIALIZED);
+ }
+
+ /*disable MAC loopabck */
+ REG_READ(ixEthAccMacBase[portId],
+ IX_ETH_ACC_MAC_RX_CNTRL1,
+ regval);
+
+ REG_WRITE(ixEthAccMacBase[portId],
+ IX_ETH_ACC_MAC_RX_CNTRL1,
+ (regval & ~IX_ETH_ACC_RX_CNTRL1_LOOP_EN));
+
+ return IX_ETH_ACC_SUCCESS;
+}
+
+IxEthAccStatus
+ixEthAccNpeLoopbackDisablePriv(IxEthAccPortId portId)
+{
+ IX_STATUS npeMhStatus;
+ IxNpeMhMessage message;
+ IxEthAccStatus status = IX_ETH_ACC_SUCCESS;
+
+ /* Turn off promiscuous mode */
+ IX_ETH_ACC_VALIDATE_PORT_ID(portId);
+
+ if (IX_ETH_ACC_SUCCESS != ixEthAccSingleEthNpeCheck(portId))
+ {
+ IX_ETH_ACC_WARNING_LOG("EthAcc: Eth %d: Cannot enable NPE loopback.\n",(INT32)portId,0,0,0,0,0);
+ return IX_ETH_ACC_SUCCESS ;
+ }
+
+ if (!IX_ETH_IS_PORT_INITIALIZED(portId))
+ {
+ return (IX_ETH_ACC_PORT_UNINITIALIZED);
+ }
+
+ /* disable NPE loopback (lsb of the message contains the value 0) */
+ message.data[0] = (IX_ETHNPE_SETLOOPBACK_MODE << IX_ETH_ACC_MAC_MSGID_SHL);
+ message.data[1] = 0;
+
+ npeMhStatus = ixNpeMhMessageWithResponseSend(IX_ETH_ACC_PORT_TO_NPE_ID(portId),
+ message,
+ IX_ETHNPE_SETLOOPBACK_MODE_ACK,
+ ixEthAccNpeLoopbackMessageCallback,
+ IX_NPEMH_SEND_RETRIES_DEFAULT);
+
+ if (npeMhStatus != IX_SUCCESS)
+ {
+ status = IX_ETH_ACC_FAIL;
+ }
+ else
+ {
+ /* wait for NPE loopbackEnable response */
+ if (ixOsalMutexLock(&ixEthAccMacState[portId].npeLoopbackMessageLock,
+ IX_ETH_ACC_PORT_DISABLE_DELAY_MSECS)
+ != IX_SUCCESS)
+ {
+ status = IX_ETH_ACC_FAIL;
+ }
+ }
+
+ return status;
+}
+
+IxEthAccStatus
+ixEthAccPortTxDisablePriv(IxEthAccPortId portId)
+{
+ UINT32 regval;
+
+ /* Turn off promiscuous mode */
+ IX_ETH_ACC_VALIDATE_PORT_ID(portId);
+
+ if (IX_ETH_ACC_SUCCESS != ixEthAccSingleEthNpeCheck(portId))
+ {
+ IX_ETH_ACC_WARNING_LOG("EthAcc: Eth %d: Cannot disable TX.\n", (INT32)portId,0,0,0,0,0);
+ return IX_ETH_ACC_SUCCESS ;
+ }
+
+ if (!IX_ETH_IS_PORT_INITIALIZED(portId))
+ {
+ return (IX_ETH_ACC_PORT_UNINITIALIZED);
+ }
+
+ /* read register */
+ REG_READ(ixEthAccMacBase[portId],
+ IX_ETH_ACC_MAC_TX_CNTRL1,
+ regval);
+
+ /* update register */
+ REG_WRITE(ixEthAccMacBase[portId],
+ IX_ETH_ACC_MAC_TX_CNTRL1,
+ (regval & ~IX_ETH_ACC_TX_CNTRL1_TX_EN));
+
+ return IX_ETH_ACC_SUCCESS;
+}
+
+IxEthAccStatus
+ixEthAccPortRxDisablePriv(IxEthAccPortId portId)
+{
+ UINT32 regval;
+
+ /* Turn off promiscuous mode */
+ IX_ETH_ACC_VALIDATE_PORT_ID(portId);
+
+ if (IX_ETH_ACC_SUCCESS != ixEthAccSingleEthNpeCheck(portId))
+ {
+ IX_ETH_ACC_WARNING_LOG("EthAcc: Eth %d: Cannot disable RX.\n", (INT32)portId,0,0,0,0,0);
+ return IX_ETH_ACC_SUCCESS ;
+ }
+
+ if (!IX_ETH_IS_PORT_INITIALIZED(portId))
+ {
+ return (IX_ETH_ACC_PORT_UNINITIALIZED);
+ }
+
+ /* read register */
+ REG_READ(ixEthAccMacBase[portId],
+ IX_ETH_ACC_MAC_RX_CNTRL1,
+ regval);
+
+ /* update register */
+ REG_WRITE(ixEthAccMacBase[portId],
+ IX_ETH_ACC_MAC_RX_CNTRL1,
+ (regval & ~IX_ETH_ACC_RX_CNTRL1_RX_EN));
+
+ return IX_ETH_ACC_SUCCESS;
+}
+
+IxEthAccStatus
+ixEthAccPortPromiscuousModeClearPriv(IxEthAccPortId portId)
+{
+ UINT32 regval;
+
+ /* Turn off promiscuous mode */
+ IX_ETH_ACC_VALIDATE_PORT_ID(portId);
+
+ if (IX_ETH_ACC_SUCCESS != ixEthAccSingleEthNpeCheck(portId))
+ {
+ IX_ETH_ACC_WARNING_LOG("EthAcc: Unavailable Eth %d: Cannot clear promiscuous mode.\n",(INT32)portId,0,0,0,0,0);
+ return IX_ETH_ACC_SUCCESS ;
+ }
+
+ if (!IX_ETH_IS_PORT_INITIALIZED(portId))
+ {
+ return (IX_ETH_ACC_PORT_UNINITIALIZED);
+ }
+
+ /*set bit 5 of Rx control 1 - enable address filtering*/
+ REG_READ(ixEthAccMacBase[portId],
+ IX_ETH_ACC_MAC_RX_CNTRL1,
+ regval);
+
+ REG_WRITE(ixEthAccMacBase[portId],
+ IX_ETH_ACC_MAC_RX_CNTRL1,
+ regval | IX_ETH_ACC_RX_CNTRL1_ADDR_FLTR_EN);
+
+ ixEthAccMacState[portId].promiscuous = FALSE;
+
+ ixEthAccMulticastAddressSet(portId);
+
+ return IX_ETH_ACC_SUCCESS;
+}
+
+IxEthAccStatus
+ixEthAccPortPromiscuousModeSetPriv(IxEthAccPortId portId)
+{
+ UINT32 regval;
+
+ IX_ETH_ACC_VALIDATE_PORT_ID(portId);
+
+ if (IX_ETH_ACC_SUCCESS != ixEthAccSingleEthNpeCheck(portId))
+ {
+ IX_ETH_ACC_WARNING_LOG("EthAcc: Unavailable Eth %d: Cannot set promiscuous mode.\n",(INT32)portId,0,0,0,0,0);
+ return IX_ETH_ACC_SUCCESS ;
+ }
+
+ if (!IX_ETH_IS_PORT_INITIALIZED(portId))
+ {
+ return (IX_ETH_ACC_PORT_UNINITIALIZED);
+ }
+
+ /*
+ * Set bit 5 of Rx control 1 - We enable address filtering even in
+ * promiscuous mode because we want the MAC to set the appropriate
+ * bits in m_flags which doesn't happen if we turn off filtering.
+ */
+ REG_READ(ixEthAccMacBase[portId],
+ IX_ETH_ACC_MAC_RX_CNTRL1,
+ regval);
+
+ REG_WRITE(ixEthAccMacBase[portId],
+ IX_ETH_ACC_MAC_RX_CNTRL1,
+ regval | IX_ETH_ACC_RX_CNTRL1_ADDR_FLTR_EN);
+
+ ixEthAccMacState[portId].promiscuous = TRUE;
+
+ ixEthAccMulticastAddressSet(portId);
+
+ return IX_ETH_ACC_SUCCESS;
+}
+
+IxEthAccStatus
+ixEthAccPortUnicastMacAddressSetPriv (IxEthAccPortId portId,
+ IxEthAccMacAddr *macAddr)
+{
+ UINT32 i;
+
+ IX_ETH_ACC_VALIDATE_PORT_ID(portId);
+
+ if (IX_ETH_ACC_SUCCESS != ixEthAccSingleEthNpeCheck(portId))
+ {
+ IX_ETH_ACC_WARNING_LOG("EthAcc: Unavailable Eth %d: Cannot set Unicast Mac Address.\n",(INT32)portId,0,0,0,0,0);
+ return IX_ETH_ACC_SUCCESS ;
+ }
+
+ if (!IX_ETH_IS_PORT_INITIALIZED(portId))
+ {
+ return (IX_ETH_ACC_PORT_UNINITIALIZED);
+ }
+
+
+ if (macAddr == NULL)
+ {
+ return IX_ETH_ACC_FAIL;
+ }
+
+ if ( macAddr->macAddress[0] & IX_ETH_ACC_ETH_MAC_BCAST_MCAST_BIT )
+ {
+ /* This is a multicast/broadcast address cant set it ! */
+ return IX_ETH_ACC_FAIL;
+ }
+
+ if ( macAddr->macAddress[0] == 0 &&
+ macAddr->macAddress[1] == 0 &&
+ macAddr->macAddress[2] == 0 &&
+ macAddr->macAddress[3] == 0 &&
+ macAddr->macAddress[4] == 0 &&
+ macAddr->macAddress[5] == 0 )
+ {
+ /* This is an invalid mac address cant set it ! */
+ return IX_ETH_ACC_FAIL;
+ }
+
+#ifdef CONFIG_IXP425_COMPONENT_ETHDB
+ /* update the MAC address in the ethernet database */
+ if (ixEthDBPortAddressSet(portId, (IxEthDBMacAddr *) macAddr) != IX_ETH_DB_SUCCESS)
+ {
+ return IX_ETH_ACC_FAIL;
+ }
+#endif
+
+ /*Set the Unicast MAC to the specified value*/
+ for(i=0;i<IX_IEEE803_MAC_ADDRESS_SIZE;i++)
+ {
+ REG_WRITE(ixEthAccMacBase[portId],
+ IX_ETH_ACC_MAC_UNI_ADDR_1 + i*sizeof(UINT32),
+ macAddr->macAddress[i]);
+ }
+ ixEthAccMacState[portId].initDone = TRUE;
+
+ return IX_ETH_ACC_SUCCESS;
+}
+
+IxEthAccStatus
+ixEthAccPortUnicastMacAddressGetPriv (IxEthAccPortId portId,
+ IxEthAccMacAddr *macAddr)
+{
+ /*Return the current value of the Unicast MAC from h/w
+ for the specified port*/
+ UINT32 i;
+
+ IX_ETH_ACC_VALIDATE_PORT_ID(portId);
+
+ if (IX_ETH_ACC_SUCCESS != ixEthAccSingleEthNpeCheck(portId))
+ {
+ IX_ETH_ACC_WARNING_LOG("EthAcc: Unavailable Eth %d: Cannot get Unicast Mac Address.\n",(INT32)portId,0,0,0,0,0);
+ /* Since Eth Npe is unavailable, return invalid MAC Address = 00:00:00:00:00:00 */
+ for(i=0;i<IX_IEEE803_MAC_ADDRESS_SIZE;i++)
+ {
+ macAddr->macAddress[i] = 0;
+ }
+ return IX_ETH_ACC_SUCCESS ;
+ }
+
+ if(!ixEthAccMacState[portId].initDone)
+ {
+ return (IX_ETH_ACC_MAC_UNINITIALIZED);
+ }
+
+ if (macAddr == NULL)
+ {
+ return IX_ETH_ACC_FAIL;
+ }
+
+
+ for(i=0;i<IX_IEEE803_MAC_ADDRESS_SIZE;i++)
+ {
+ REG_READ(ixEthAccMacBase[portId],
+ IX_ETH_ACC_MAC_UNI_ADDR_1 + i*sizeof(UINT32),
+ macAddr->macAddress[i]);
+ }
+ return IX_ETH_ACC_SUCCESS;
+}
+
+PRIVATE IxEthAccStatus
+ixEthAccPortMulticastMacAddressGet (IxEthAccPortId portId,
+ IxEthAccMacAddr *macAddr)
+{
+ /*Return the current value of the Multicast MAC from h/w
+ for the specified port*/
+ UINT32 i;
+
+ for(i=0;i<IX_IEEE803_MAC_ADDRESS_SIZE;i++)
+ {
+
+ REG_READ(ixEthAccMacBase[portId],
+ IX_ETH_ACC_MAC_ADDR_1 + i*sizeof(UINT32),
+ macAddr->macAddress[i]);
+ }
+
+ return IX_ETH_ACC_SUCCESS;
+}
+
+PRIVATE IxEthAccStatus
+ixEthAccPortMulticastMacFilterGet (IxEthAccPortId portId,
+ IxEthAccMacAddr *macAddr)
+{
+ /*Return the current value of the Multicast MAC from h/w
+ for the specified port*/
+ UINT32 i;
+
+ for(i=0;i<IX_IEEE803_MAC_ADDRESS_SIZE;i++)
+ {
+
+ REG_READ(ixEthAccMacBase[portId],
+ IX_ETH_ACC_MAC_ADDR_MASK_1 + i*sizeof(UINT32),
+ macAddr->macAddress[i]);
+ }
+ return IX_ETH_ACC_SUCCESS;
+}
+
+IxEthAccStatus
+ixEthAccPortMulticastAddressJoinPriv (IxEthAccPortId portId,
+ IxEthAccMacAddr *macAddr)
+{
+ UINT32 i;
+ IxEthAccMacAddr broadcastAddr = {{0xff,0xff,0xff,0xff,0xff,0xff}};
+
+ /*Check that the port parameter is valid*/
+ IX_ETH_ACC_VALIDATE_PORT_ID(portId);
+
+ if (IX_ETH_ACC_SUCCESS != ixEthAccSingleEthNpeCheck(portId))
+ {
+ IX_ETH_ACC_WARNING_LOG("EthAcc: Unavailable Eth %d: Cannot join Multicast Mac Address.\n",(INT32)portId,0,0,0,0,0);
+ return IX_ETH_ACC_SUCCESS ;
+ }
+
+ if (!IX_ETH_IS_PORT_INITIALIZED(portId))
+ {
+ return (IX_ETH_ACC_PORT_UNINITIALIZED);
+ }
+
+ /*Check that the mac address is valid*/
+ if(macAddr == NULL)
+ {
+ return IX_ETH_ACC_FAIL;
+ }
+
+ /* Check that this is a multicast address */
+ if (!(macAddr->macAddress[0] & IX_ETH_ACC_ETH_MAC_BCAST_MCAST_BIT))
+ {
+ return IX_ETH_ACC_FAIL;
+ }
+
+ /* We don't add the Broadcast address */
+ if(ixEthAccMacEqual(&broadcastAddr, macAddr))
+ {
+ return IX_ETH_ACC_FAIL;
+ }
+
+ for (i = 0;
+ i<ixEthAccMacState[portId].mcastAddrIndex;
+ i++)
+ {
+ /*Check if the current entry already match an existing matches*/
+ if(ixEthAccMacEqual(&ixEthAccMacState[portId].mcastAddrsTable[i], macAddr))
+ {
+ /* Address found in the list and already configured,
+ * return a success status
+ */
+ return IX_ETH_ACC_SUCCESS;
+ }
+ }
+
+ /* check for availability at the end of the current table */
+ if(ixEthAccMacState[portId].mcastAddrIndex >= IX_ETH_ACC_MAX_MULTICAST_ADDRESSES)
+ {
+ return IX_ETH_ACC_FAIL;
+ }
+
+ /*First add the address to the multicast table for the
+ specified port*/
+ i=ixEthAccMacState[portId].mcastAddrIndex;
+
+ memcpy(&ixEthAccMacState[portId].mcastAddrsTable[i],
+ &macAddr->macAddress,
+ IX_IEEE803_MAC_ADDRESS_SIZE);
+
+ /*Increment the index into the table, this must be done here
+ as MulticastAddressSet below needs to know about the latest
+ entry.
+ */
+ ixEthAccMacState[portId].mcastAddrIndex++;
+
+ /*Then calculate the new value to be written to the address and
+ address mask registers*/
+ ixEthAccMulticastAddressSet(portId);
+
+ return IX_ETH_ACC_SUCCESS;
+}
+
+
+IxEthAccStatus
+ixEthAccPortMulticastAddressJoinAllPriv (IxEthAccPortId portId)
+{
+ IxEthAccMacAddr mcastMacAddr = {{0x1,0x0,0x0,0x0,0x0,0x0}};
+
+ /*Check that the port parameter is valid*/
+ IX_ETH_ACC_VALIDATE_PORT_ID(portId);
+
+ if (IX_ETH_ACC_SUCCESS != ixEthAccSingleEthNpeCheck(portId))
+ {
+ IX_ETH_ACC_WARNING_LOG("EthAcc: Unavailable Eth %d: Cannot join all Multicast Address.\n",(INT32)portId,0,0,0,0,0);
+ return IX_ETH_ACC_SUCCESS ;
+ }
+
+ if (!IX_ETH_IS_PORT_INITIALIZED(portId))
+ {
+ return (IX_ETH_ACC_PORT_UNINITIALIZED);
+ }
+
+ /* remove all entries from the database and
+ * insert a multicast entry
+ */
+ memcpy(&ixEthAccMacState[portId].mcastAddrsTable[0],
+ &mcastMacAddr.macAddress,
+ IX_IEEE803_MAC_ADDRESS_SIZE);
+
+ ixEthAccMacState[portId].mcastAddrIndex = 1;
+ ixEthAccMacState[portId].joinAll = TRUE;
+
+ ixEthAccMulticastAddressSet(portId);
+
+ return IX_ETH_ACC_SUCCESS;
+}
+
+IxEthAccStatus
+ixEthAccPortMulticastAddressLeavePriv (IxEthAccPortId portId,
+ IxEthAccMacAddr *macAddr)
+{
+ UINT32 i;
+ IxEthAccMacAddr mcastMacAddr = {{0x1,0x0,0x0,0x0,0x0,0x0}};
+
+ /*Check that the port parameter is valid*/
+ IX_ETH_ACC_VALIDATE_PORT_ID(portId);
+
+ if (IX_ETH_ACC_SUCCESS != ixEthAccSingleEthNpeCheck(portId))
+ {
+ IX_ETH_ACC_WARNING_LOG("EthAcc: Unavailable Eth %d: Cannot leave Multicast Address.\n",(INT32)portId,0,0,0,0,0);
+ return IX_ETH_ACC_SUCCESS ;
+ }
+
+ if (!IX_ETH_IS_PORT_INITIALIZED(portId))
+ {
+ return (IX_ETH_ACC_PORT_UNINITIALIZED);
+ }
+
+ /*Check that the mac address is valid*/
+ if(macAddr == NULL)
+ {
+ return IX_ETH_ACC_FAIL;
+ }
+ /* Remove this mac address from the mask for the specified port
+ * we copy down all entries above the blanked entry, and
+ * decrement the index
+ */
+ i=0;
+
+ while(i<ixEthAccMacState[portId].mcastAddrIndex)
+ {
+ /*Check if the current entry matches*/
+ if(ixEthAccMacEqual(&ixEthAccMacState[portId].mcastAddrsTable[i],
+ macAddr))
+ {
+ if(ixEthAccMacEqual(macAddr, &mcastMacAddr))
+ {
+ ixEthAccMacState[portId].joinAll = FALSE;
+ }
+ /*Decrement the index into the multicast address table
+ for the current port*/
+ ixEthAccMacState[portId].mcastAddrIndex--;
+
+ /*Copy down all entries above the current entry*/
+ while(i<ixEthAccMacState[portId].mcastAddrIndex)
+ {
+ memcpy(&ixEthAccMacState[portId].mcastAddrsTable[i],
+ &ixEthAccMacState[portId].mcastAddrsTable[i+1],
+ IX_IEEE803_MAC_ADDRESS_SIZE);
+ i++;
+ }
+ /*recalculate the mask and write it to the MAC*/
+ ixEthAccMulticastAddressSet(portId);
+
+ return IX_ETH_ACC_SUCCESS;
+ }
+ /* search the next entry */
+ i++;
+ }
+ /* no matching entry found */
+ return IX_ETH_ACC_NO_SUCH_ADDR;
+}
+
+IxEthAccStatus
+ixEthAccPortMulticastAddressLeaveAllPriv (IxEthAccPortId portId)
+{
+ /*Check that the port parameter is valid*/
+ IX_ETH_ACC_VALIDATE_PORT_ID(portId);
+
+ if (IX_ETH_ACC_SUCCESS != ixEthAccSingleEthNpeCheck(portId))
+ {
+ IX_ETH_ACC_WARNING_LOG("EthAcc: Unavailable Eth %d: Cannot leave all Multicast Address.\n",(INT32)portId,0,0,0,0,0);
+ return IX_ETH_ACC_SUCCESS ;
+ }
+
+ if (!IX_ETH_IS_PORT_INITIALIZED(portId))
+ {
+ return (IX_ETH_ACC_PORT_UNINITIALIZED);
+ }
+
+ ixEthAccMacState[portId].mcastAddrIndex = 0;
+ ixEthAccMacState[portId].joinAll = FALSE;
+
+ ixEthAccMulticastAddressSet(portId);
+
+ return IX_ETH_ACC_SUCCESS;
+}
+
+
+IxEthAccStatus
+ixEthAccPortUnicastAddressShowPriv (IxEthAccPortId portId)
+{
+ IxEthAccMacAddr macAddr;
+
+ IX_ETH_ACC_VALIDATE_PORT_ID(portId);
+
+ if (IX_ETH_ACC_SUCCESS != ixEthAccSingleEthNpeCheck(portId))
+ {
+ IX_ETH_ACC_WARNING_LOG("EthAcc: Unavailable Eth %d: Cannot show Unicast Address.\n",(INT32)portId,0,0,0,0,0);
+ return IX_ETH_ACC_SUCCESS ;
+ }
+
+ if (!IX_ETH_IS_PORT_INITIALIZED(portId))
+ {
+ return (IX_ETH_ACC_PORT_UNINITIALIZED);
+ }
+
+ /*Get the MAC (UINICAST) address from hardware*/
+ if(ixEthAccPortUnicastMacAddressGetPriv(portId, &macAddr) != IX_ETH_ACC_SUCCESS)
+ {
+ IX_ETH_ACC_WARNING_LOG("EthAcc: MAC address uninitialised port %u\n",
+ (INT32)portId,0,0,0,0,0);
+ return IX_ETH_ACC_MAC_UNINITIALIZED;
+ }
+
+ /*print it out*/
+ ixEthAccMacPrint(&macAddr);
+ printf("\n");
+ return IX_ETH_ACC_SUCCESS;
+}
+
+
+
+void
+ixEthAccPortMulticastAddressShowPriv(IxEthAccPortId portId)
+{
+ IxEthAccMacAddr macAddr;
+ UINT32 i;
+
+ if(!IX_ETH_ACC_IS_PORT_VALID(portId))
+ {
+ return;
+ }
+
+ if (IX_ETH_ACC_SUCCESS != ixEthAccSingleEthNpeCheck(portId))
+ {
+ IX_ETH_ACC_WARNING_LOG("EthAcc: Unavailable Eth %d: Cannot show Multicast Address.\n",(INT32)portId,0,0,0,0,0);
+ return ;
+ }
+
+ if (!IX_ETH_IS_PORT_INITIALIZED(portId))
+ {
+ return;
+ }
+
+ printf("Multicast MAC: ");
+ /*Get the MAC (MULTICAST) address from hardware*/
+ ixEthAccPortMulticastMacAddressGet(portId, &macAddr);
+ /*print it out*/
+ ixEthAccMacPrint(&macAddr);
+ /*Get the MAC (MULTICAST) filter from hardware*/
+ ixEthAccPortMulticastMacFilterGet(portId, &macAddr);
+ /*print it out*/
+ printf(" ( ");
+ ixEthAccMacPrint(&macAddr);
+ printf(" )\n");
+ printf("Constituent Addresses:\n");
+ for(i=0;i<ixEthAccMacState[portId].mcastAddrIndex;i++)
+ {
+ ixEthAccMacPrint(&ixEthAccMacState[portId].mcastAddrsTable[i]);
+ printf("\n");
+ }
+ return;
+}
+
+/*Set the duplex mode*/
+IxEthAccStatus
+ixEthAccPortDuplexModeSetPriv (IxEthAccPortId portId,
+ IxEthAccDuplexMode mode)
+{
+ UINT32 txregval;
+ UINT32 rxregval;
+
+ /*This is bit 1 of the transmit control reg, set to 1 for half
+ duplex, 0 for full duplex*/
+ IX_ETH_ACC_VALIDATE_PORT_ID(portId);
+
+ if (IX_ETH_ACC_SUCCESS != ixEthAccSingleEthNpeCheck(portId))
+ {
+ IX_ETH_ACC_WARNING_LOG("EthAcc: Unavailable Eth %d: Cannot set Duplex Mode.\n",(INT32)portId,0,0,0,0,0);
+ return IX_ETH_ACC_SUCCESS ;
+ }
+
+ if (!IX_ETH_IS_PORT_INITIALIZED(portId))
+ {
+ return (IX_ETH_ACC_PORT_UNINITIALIZED);
+ }
+
+ REG_READ(ixEthAccMacBase[portId],
+ IX_ETH_ACC_MAC_TX_CNTRL1,
+ txregval);
+
+ REG_READ(ixEthAccMacBase[portId],
+ IX_ETH_ACC_MAC_RX_CNTRL1,
+ rxregval);
+
+ if (mode == IX_ETH_ACC_FULL_DUPLEX)
+ {
+ /*Clear half duplex bit in TX*/
+ REG_WRITE(ixEthAccMacBase[portId],
+ IX_ETH_ACC_MAC_TX_CNTRL1,
+ txregval & ~IX_ETH_ACC_TX_CNTRL1_DUPLEX);
+
+ /*We must set the pause enable in the receive logic when in
+ full duplex mode*/
+ REG_WRITE(ixEthAccMacBase[portId],
+ IX_ETH_ACC_MAC_RX_CNTRL1,
+ rxregval | IX_ETH_ACC_RX_CNTRL1_PAUSE_EN);
+ ixEthAccMacState[portId].fullDuplex = TRUE;
+
+ }
+ else if (mode == IX_ETH_ACC_HALF_DUPLEX)
+ {
+ /*Set half duplex bit in TX*/
+ REG_WRITE(ixEthAccMacBase[portId],
+ IX_ETH_ACC_MAC_TX_CNTRL1,
+ txregval | IX_ETH_ACC_TX_CNTRL1_DUPLEX);
+
+ /*We must clear pause enable in the receive logic when in
+ half duplex mode*/
+ REG_WRITE(ixEthAccMacBase[portId],
+ IX_ETH_ACC_MAC_RX_CNTRL1,
+ rxregval & ~IX_ETH_ACC_RX_CNTRL1_PAUSE_EN);
+
+ ixEthAccMacState[portId].fullDuplex = FALSE;
+ }
+ else
+ {
+ return IX_ETH_ACC_FAIL;
+ }
+
+
+ return IX_ETH_ACC_SUCCESS;
+
+}
+
+
+
+IxEthAccStatus
+ixEthAccPortDuplexModeGetPriv (IxEthAccPortId portId,
+ IxEthAccDuplexMode *mode)
+{
+ /*Return the duplex mode for the specified port*/
+ UINT32 regval;
+
+ /*This is bit 1 of the transmit control reg, set to 1 for half
+ duplex, 0 for full duplex*/
+ IX_ETH_ACC_VALIDATE_PORT_ID(portId);
+
+ if (IX_ETH_ACC_SUCCESS != ixEthAccSingleEthNpeCheck(portId))
+ {
+ IX_ETH_ACC_WARNING_LOG("EthAcc: Unavailable Eth %d: Cannot get Duplex Mode.\n",(INT32)portId,0,0,0,0,0);
+ /* return hald duplex */
+ *mode = IX_ETH_ACC_HALF_DUPLEX ;
+ return IX_ETH_ACC_SUCCESS ;
+ }
+
+ if (!IX_ETH_IS_PORT_INITIALIZED(portId))
+ {
+ return (IX_ETH_ACC_PORT_UNINITIALIZED);
+ }
+
+ if (mode == NULL)
+ {
+ return (IX_ETH_ACC_FAIL);
+ }
+
+ REG_READ(ixEthAccMacBase[portId],
+ IX_ETH_ACC_MAC_TX_CNTRL1,
+ regval);
+
+ if( regval & IX_ETH_ACC_TX_CNTRL1_DUPLEX)
+ {
+ *mode = IX_ETH_ACC_HALF_DUPLEX;
+ }
+ else
+ {
+ *mode = IX_ETH_ACC_FULL_DUPLEX;
+ }
+
+ return IX_ETH_ACC_SUCCESS;
+}
+
+
+
+IxEthAccStatus
+ixEthAccPortTxFrameAppendPaddingEnablePriv (IxEthAccPortId portId)
+{
+ UINT32 regval;
+ /*Enable FCS computation by the MAC and appending to the
+ frame*/
+
+ IX_ETH_ACC_VALIDATE_PORT_ID(portId);
+
+ if (IX_ETH_ACC_SUCCESS != ixEthAccSingleEthNpeCheck(portId))
+ {
+ IX_ETH_ACC_WARNING_LOG("EthAcc: Unavailable Eth %d: Cannot enable Tx Frame Append Padding.\n",(INT32)portId,0,0,0,0,0);
+ return IX_ETH_ACC_SUCCESS ;
+ }
+
+ if (!IX_ETH_IS_PORT_INITIALIZED(portId))
+ {
+ return (IX_ETH_ACC_PORT_UNINITIALIZED);
+ }
+
+ REG_READ(ixEthAccMacBase[portId],
+ IX_ETH_ACC_MAC_TX_CNTRL1,
+ regval);
+
+ REG_WRITE(ixEthAccMacBase[portId],
+ IX_ETH_ACC_MAC_TX_CNTRL1,
+ regval |
+ IX_ETH_ACC_TX_CNTRL1_PAD_EN);
+
+ ixEthAccMacState[portId].txPADAppend = TRUE;
+ return IX_ETH_ACC_SUCCESS;
+}
+
+IxEthAccStatus
+ixEthAccPortTxFrameAppendPaddingDisablePriv (IxEthAccPortId portId)
+{
+ UINT32 regval;
+
+ /*disable FCS computation and appending*/
+ /*Set bit 4 of Tx control register one to zero*/
+ IX_ETH_ACC_VALIDATE_PORT_ID(portId);
+
+ if (IX_ETH_ACC_SUCCESS != ixEthAccSingleEthNpeCheck(portId))
+ {
+ IX_ETH_ACC_WARNING_LOG("EthAcc: Unavailable Eth %d: Cannot disble Tx Frame Append Padding.\n",(INT32)portId,0,0,0,0,0);
+ return IX_ETH_ACC_SUCCESS ;
+ }
+
+ if (!IX_ETH_IS_PORT_INITIALIZED(portId))
+ {
+ return (IX_ETH_ACC_PORT_UNINITIALIZED);
+ }
+
+ REG_READ(ixEthAccMacBase[portId],
+ IX_ETH_ACC_MAC_TX_CNTRL1,
+ regval);
+
+ REG_WRITE(ixEthAccMacBase[portId],
+ IX_ETH_ACC_MAC_TX_CNTRL1,
+ regval & ~IX_ETH_ACC_TX_CNTRL1_PAD_EN);
+
+ ixEthAccMacState[portId].txPADAppend = FALSE;
+ return IX_ETH_ACC_SUCCESS;
+}
+
+IxEthAccStatus
+ixEthAccPortTxFrameAppendFCSEnablePriv (IxEthAccPortId portId)
+{
+ UINT32 regval;
+
+ /*Enable FCS computation by the MAC and appending to the
+ frame*/
+
+ IX_ETH_ACC_VALIDATE_PORT_ID(portId);
+
+ if (IX_ETH_ACC_SUCCESS != ixEthAccSingleEthNpeCheck(portId))
+ {
+ IX_ETH_ACC_WARNING_LOG("EthAcc: Unavailable Eth %d: Cannot enable Tx Frame Append FCS.\n",(INT32)portId,0,0,0,0,0);
+ return IX_ETH_ACC_SUCCESS ;
+ }
+
+ if (!IX_ETH_IS_PORT_INITIALIZED(portId))
+ {
+ return (IX_ETH_ACC_PORT_UNINITIALIZED);
+ }
+
+ REG_READ(ixEthAccMacBase[portId],
+ IX_ETH_ACC_MAC_TX_CNTRL1,
+ regval);
+
+ REG_WRITE(ixEthAccMacBase[portId],
+ IX_ETH_ACC_MAC_TX_CNTRL1,
+ regval | IX_ETH_ACC_TX_CNTRL1_FCS_EN);
+
+ ixEthAccMacState[portId].txFCSAppend = TRUE;
+ return IX_ETH_ACC_SUCCESS;
+}
+
+IxEthAccStatus
+ixEthAccPortTxFrameAppendFCSDisablePriv (IxEthAccPortId portId)
+{
+ UINT32 regval;
+
+ /*disable FCS computation and appending*/
+ /*Set bit 4 of Tx control register one to zero*/
+ IX_ETH_ACC_VALIDATE_PORT_ID(portId);
+
+ if (IX_ETH_ACC_SUCCESS != ixEthAccSingleEthNpeCheck(portId))
+ {
+ IX_ETH_ACC_WARNING_LOG("EthAcc: Unavailable Eth %d: Cannot disable Tx Frame Append FCS.\n",(INT32)portId,0,0,0,0,0);
+ return IX_ETH_ACC_SUCCESS ;
+ }
+
+ if (!IX_ETH_IS_PORT_INITIALIZED(portId))
+ {
+ return (IX_ETH_ACC_PORT_UNINITIALIZED);
+ }
+
+ REG_READ(ixEthAccMacBase[portId],
+ IX_ETH_ACC_MAC_TX_CNTRL1,
+ regval);
+
+ REG_WRITE(ixEthAccMacBase[portId],
+ IX_ETH_ACC_MAC_TX_CNTRL1,
+ regval & ~IX_ETH_ACC_TX_CNTRL1_FCS_EN);
+
+ ixEthAccMacState[portId].txFCSAppend = FALSE;
+ return IX_ETH_ACC_SUCCESS;
+}
+
+IxEthAccStatus
+ixEthAccPortRxFrameAppendFCSEnablePriv (IxEthAccPortId portId)
+{
+ /*Set bit 2 of Rx control 1*/
+ UINT32 regval;
+
+ IX_ETH_ACC_VALIDATE_PORT_ID(portId);
+
+ if (IX_ETH_ACC_SUCCESS != ixEthAccSingleEthNpeCheck(portId))
+ {
+ IX_ETH_ACC_WARNING_LOG("EthAcc: Unavailable Eth %d: Cannot enable Rx Frame Append FCS.\n",(INT32)portId,0,0,0,0,0);
+ return IX_ETH_ACC_SUCCESS ;
+ }
+
+ if (!IX_ETH_IS_PORT_INITIALIZED(portId))
+ {
+ return (IX_ETH_ACC_PORT_UNINITIALIZED);
+ }
+
+ REG_READ(ixEthAccMacBase[portId],
+ IX_ETH_ACC_MAC_RX_CNTRL1,
+ regval);
+
+ REG_WRITE(ixEthAccMacBase[portId],
+ IX_ETH_ACC_MAC_RX_CNTRL1,
+ regval | IX_ETH_ACC_RX_CNTRL1_CRC_EN);
+
+ ixEthAccMacState[portId].rxFCSAppend = TRUE;
+ return IX_ETH_ACC_SUCCESS;
+}
+
+IxEthAccStatus
+ixEthAccPortRxFrameAppendFCSDisablePriv (IxEthAccPortId portId)
+{
+ UINT32 regval;
+
+ /*Clear bit 2 of Rx control 1*/
+ IX_ETH_ACC_VALIDATE_PORT_ID(portId);
+
+ if (IX_ETH_ACC_SUCCESS != ixEthAccSingleEthNpeCheck(portId))
+ {
+ IX_ETH_ACC_WARNING_LOG("EthAcc: Unavailable Eth %d: Cannot disable Rx Frame Append FCS.\n",(INT32)portId,0,0,0,0,0);
+ return IX_ETH_ACC_SUCCESS ;
+ }
+
+ if (!IX_ETH_IS_PORT_INITIALIZED(portId))
+ {
+ return (IX_ETH_ACC_PORT_UNINITIALIZED);
+ }
+
+ REG_READ(ixEthAccMacBase[portId],
+ IX_ETH_ACC_MAC_RX_CNTRL1,
+ regval);
+
+ REG_WRITE(ixEthAccMacBase[portId],
+ IX_ETH_ACC_MAC_RX_CNTRL1,
+ regval & ~IX_ETH_ACC_RX_CNTRL1_CRC_EN);
+
+ ixEthAccMacState[portId].rxFCSAppend = FALSE;
+ return IX_ETH_ACC_SUCCESS;
+}
+
+
+
+PRIVATE void
+ixEthAccMacNpeStatsMessageCallback (IxNpeMhNpeId npeId,
+ IxNpeMhMessage msg)
+{
+ IxEthAccPortId portId = IX_ETH_ACC_NPE_TO_PORT_ID(npeId);
+
+#ifndef NDEBUG
+ /* Prudent to at least check the port is within range */
+ if (portId >= IX_ETH_ACC_NUMBER_OF_PORTS)
+ {
+ IX_ETH_ACC_FATAL_LOG(
+ "IXETHACC:ixEthAccMacNpeStatsMessageCallback: Illegal port: %u\n",
+ (UINT32)portId, 0, 0, 0, 0, 0);
+ return;
+ }
+#endif
+
+ /*Unblock Stats Get call*/
+ ixOsalMutexUnlock(&ixEthAccMacState[portId].ackMIBStatsLock);
+
+}
+
+PRIVATE void
+ixEthAccMibIIStatsEndianConvert (IxEthEthObjStats *retStats)
+{
+ /* endianness conversion */
+
+ /* Rx stats */
+ retStats->dot3StatsAlignmentErrors =
+ IX_OSAL_SWAP_BE_SHARED_LONG(retStats->dot3StatsAlignmentErrors);
+ retStats->dot3StatsFCSErrors =
+ IX_OSAL_SWAP_BE_SHARED_LONG(retStats->dot3StatsFCSErrors);
+ retStats->dot3StatsInternalMacReceiveErrors =
+ IX_OSAL_SWAP_BE_SHARED_LONG(retStats->dot3StatsInternalMacReceiveErrors);
+ retStats->RxOverrunDiscards =
+ IX_OSAL_SWAP_BE_SHARED_LONG(retStats->RxOverrunDiscards);
+ retStats->RxLearnedEntryDiscards =
+ IX_OSAL_SWAP_BE_SHARED_LONG(retStats->RxLearnedEntryDiscards);
+ retStats->RxLargeFramesDiscards =
+ IX_OSAL_SWAP_BE_SHARED_LONG(retStats->RxLargeFramesDiscards);
+ retStats->RxSTPBlockedDiscards =
+ IX_OSAL_SWAP_BE_SHARED_LONG(retStats->RxSTPBlockedDiscards);
+ retStats->RxVLANTypeFilterDiscards =
+ IX_OSAL_SWAP_BE_SHARED_LONG(retStats->RxVLANTypeFilterDiscards);
+ retStats->RxVLANIdFilterDiscards =
+ IX_OSAL_SWAP_BE_SHARED_LONG(retStats->RxVLANIdFilterDiscards);
+ retStats->RxInvalidSourceDiscards =
+ IX_OSAL_SWAP_BE_SHARED_LONG(retStats->RxInvalidSourceDiscards);
+ retStats->RxBlackListDiscards =
+ IX_OSAL_SWAP_BE_SHARED_LONG(retStats->RxBlackListDiscards);
+ retStats->RxWhiteListDiscards =
+ IX_OSAL_SWAP_BE_SHARED_LONG(retStats->RxWhiteListDiscards);
+ retStats->RxUnderflowEntryDiscards =
+ IX_OSAL_SWAP_BE_SHARED_LONG(retStats->RxUnderflowEntryDiscards);
+
+ /* Tx stats */
+ retStats->dot3StatsSingleCollisionFrames =
+ IX_OSAL_SWAP_BE_SHARED_LONG(retStats->dot3StatsSingleCollisionFrames);
+ retStats->dot3StatsMultipleCollisionFrames =
+ IX_OSAL_SWAP_BE_SHARED_LONG(retStats->dot3StatsMultipleCollisionFrames);
+ retStats->dot3StatsDeferredTransmissions =
+ IX_OSAL_SWAP_BE_SHARED_LONG(retStats->dot3StatsDeferredTransmissions);
+ retStats->dot3StatsLateCollisions =
+ IX_OSAL_SWAP_BE_SHARED_LONG(retStats->dot3StatsLateCollisions);
+ retStats->dot3StatsExcessiveCollsions =
+ IX_OSAL_SWAP_BE_SHARED_LONG(retStats->dot3StatsExcessiveCollsions);
+ retStats->dot3StatsInternalMacTransmitErrors =
+ IX_OSAL_SWAP_BE_SHARED_LONG(retStats->dot3StatsInternalMacTransmitErrors);
+ retStats->dot3StatsCarrierSenseErrors =
+ IX_OSAL_SWAP_BE_SHARED_LONG(retStats->dot3StatsCarrierSenseErrors);
+ retStats->TxLargeFrameDiscards =
+ IX_OSAL_SWAP_BE_SHARED_LONG(retStats->TxLargeFrameDiscards);
+ retStats->TxVLANIdFilterDiscards =
+ IX_OSAL_SWAP_BE_SHARED_LONG(retStats->TxVLANIdFilterDiscards);
+}
+
+IxEthAccStatus
+ixEthAccMibIIStatsGet (IxEthAccPortId portId,
+ IxEthEthObjStats *retStats )
+{
+ IxNpeMhMessage message;
+
+ if (!IX_ETH_ACC_IS_SERVICE_INITIALIZED())
+ {
+ printf("EthAcc: ixEthAccMibIIStatsGet (Mac) EthAcc service is not initialized\n");
+ return (IX_ETH_ACC_FAIL);
+ }
+
+ IX_ETH_ACC_VALIDATE_PORT_ID(portId);
+
+ if (retStats == NULL)
+ {
+ printf("EthAcc: ixEthAccMibIIStatsGet (Mac) NULL argument\n");
+ return (IX_ETH_ACC_FAIL);
+ }
+
+ if (IX_ETH_ACC_SUCCESS != ixEthAccSingleEthNpeCheck(portId))
+ {
+ printf("EthAcc: ixEthAccMibIIStatsGet (Mac) NPE for port %d is not available\n", portId);
+
+ IX_ETH_ACC_WARNING_LOG("EthAcc: Unavailable Eth %d: Cannot get MIB II Stats.\n",(INT32)portId,0,0,0,0,0);
+
+ /* Return all zero stats */
+ IX_ETH_ACC_MEMSET(retStats, 0, sizeof(IxEthEthObjStats));
+
+ return IX_ETH_ACC_SUCCESS ;
+ }
+
+ if (!IX_ETH_IS_PORT_INITIALIZED(portId))
+ {
+ printf("EthAcc: ixEthAccMibIIStatsGet (Mac) port %d is not initialized\n", portId);
+ return (IX_ETH_ACC_PORT_UNINITIALIZED);
+ }
+
+ IX_OSAL_CACHE_INVALIDATE(retStats, sizeof(IxEthEthObjStats));
+
+ message.data[0] = IX_ETHNPE_GETSTATS << IX_ETH_ACC_MAC_MSGID_SHL;
+ message.data[1] = (UINT32) IX_OSAL_MMU_VIRT_TO_PHYS(retStats);
+
+ /* Permit only one task to request MIB statistics Get operation
+ at a time */
+ ixOsalMutexLock(&ixEthAccMacState[portId].MIBStatsGetAccessLock, IX_OSAL_WAIT_FOREVER);
+
+ if(ixNpeMhMessageWithResponseSend(IX_ETH_ACC_PORT_TO_NPE_ID(portId),
+ message,
+ IX_ETHNPE_GETSTATS,
+ ixEthAccMacNpeStatsMessageCallback,
+ IX_NPEMH_SEND_RETRIES_DEFAULT)
+ != IX_SUCCESS)
+ {
+ ixOsalMutexUnlock(&ixEthAccMacState[portId].MIBStatsGetAccessLock);
+
+ printf("EthAcc: (Mac) StatsGet failed to send NPE message\n");
+
+ return IX_ETH_ACC_FAIL;
+ }
+
+ /* Wait for callback invocation indicating response to
+ this request - we need this mutex in order to ensure
+ that the return from this function is synchronous */
+ ixOsalMutexLock(&ixEthAccMacState[portId].ackMIBStatsLock, IX_ETH_ACC_MIB_STATS_DELAY_MSECS);
+
+ /* Permit other tasks to perform MIB statistics Get operation */
+ ixOsalMutexUnlock(&ixEthAccMacState[portId].MIBStatsGetAccessLock);
+
+ ixEthAccMibIIStatsEndianConvert (retStats);
+
+ return IX_ETH_ACC_SUCCESS;
+}
+
+
+PRIVATE void
+ixEthAccMacNpeStatsResetMessageCallback (IxNpeMhNpeId npeId,
+ IxNpeMhMessage msg)
+{
+ IxEthAccPortId portId = IX_ETH_ACC_NPE_TO_PORT_ID(npeId);
+
+#ifndef NDEBUG
+ /* Prudent to at least check the port is within range */
+ if (portId >= IX_ETH_ACC_NUMBER_OF_PORTS)
+ {
+ IX_ETH_ACC_FATAL_LOG(
+ "IXETHACC:ixEthAccMacNpeStatsResetMessageCallback: Illegal port: %u\n",
+ (UINT32)portId, 0, 0, 0, 0, 0);
+ return;
+ }
+#endif
+
+ /*Unblock Stats Get & reset call*/
+ ixOsalMutexUnlock(&ixEthAccMacState[portId].ackMIBStatsResetLock);
+
+}
+
+
+
+IxEthAccStatus
+ixEthAccMibIIStatsGetClear (IxEthAccPortId portId,
+ IxEthEthObjStats *retStats)
+{
+ IxNpeMhMessage message;
+
+ if (!IX_ETH_ACC_IS_SERVICE_INITIALIZED())
+ {
+ printf("EthAcc: ixEthAccMibIIStatsGetClear (Mac) EthAcc service is not initialized\n");
+ return (IX_ETH_ACC_FAIL);
+ }
+
+ IX_ETH_ACC_VALIDATE_PORT_ID(portId);
+
+ if (retStats == NULL)
+ {
+ printf("EthAcc: ixEthAccMibIIStatsGetClear (Mac) NULL argument\n");
+ return (IX_ETH_ACC_FAIL);
+ }
+
+ if (IX_ETH_ACC_SUCCESS != ixEthAccSingleEthNpeCheck(portId))
+ {
+ printf("EthAcc: ixEthAccMibIIStatsGetClear (Mac) NPE for port %d is not available\n", portId);
+
+ IX_ETH_ACC_WARNING_LOG("EthAcc: Unavailable Eth %d: Cannot get and clear MIB II Stats.\n", (INT32)portId, 0, 0, 0, 0, 0);
+
+ /* Return all zero stats */
+ IX_ETH_ACC_MEMSET(retStats, 0, sizeof(IxEthEthObjStats));
+
+ return IX_ETH_ACC_SUCCESS ;
+ }
+
+ if (!IX_ETH_IS_PORT_INITIALIZED(portId))
+ {
+ printf("EthAcc: ixEthAccMibIIStatsGetClear (Mac) port %d is not initialized\n", portId);
+ return (IX_ETH_ACC_PORT_UNINITIALIZED);
+ }
+
+ IX_OSAL_CACHE_INVALIDATE(retStats, sizeof(IxEthEthObjStats));
+
+ message.data[0] = IX_ETHNPE_RESETSTATS << IX_ETH_ACC_MAC_MSGID_SHL;
+ message.data[1] = (UINT32) IX_OSAL_MMU_VIRT_TO_PHYS(retStats);
+
+ /* Permit only one task to request MIB statistics Get-Reset operation at a time */
+ ixOsalMutexLock(&ixEthAccMacState[portId].MIBStatsGetResetAccessLock, IX_OSAL_WAIT_FOREVER);
+
+ if(ixNpeMhMessageWithResponseSend(IX_ETH_ACC_PORT_TO_NPE_ID(portId),
+ message,
+ IX_ETHNPE_RESETSTATS,
+ ixEthAccMacNpeStatsResetMessageCallback,
+ IX_NPEMH_SEND_RETRIES_DEFAULT)
+ != IX_SUCCESS)
+ {
+ ixOsalMutexUnlock(&ixEthAccMacState[portId].MIBStatsGetResetAccessLock);
+
+ printf("EthAcc: (Mac) ixEthAccMibIIStatsGetClear failed to send NPE message\n");
+
+ return IX_ETH_ACC_FAIL;
+ }
+
+ /* Wait for callback invocation indicating response to this request */
+ ixOsalMutexLock(&ixEthAccMacState[portId].ackMIBStatsResetLock, IX_ETH_ACC_MIB_STATS_DELAY_MSECS);
+
+ /* permit other tasks to get and reset MIB stats*/
+ ixOsalMutexUnlock(&ixEthAccMacState[portId].MIBStatsGetResetAccessLock);
+
+ ixEthAccMibIIStatsEndianConvert(retStats);
+
+ return IX_ETH_ACC_SUCCESS;
+}
+
+IxEthAccStatus
+ixEthAccMibIIStatsClear (IxEthAccPortId portId)
+{
+ static IxEthEthObjStats retStats;
+ IxEthAccStatus status;
+
+ if (!IX_ETH_ACC_IS_SERVICE_INITIALIZED())
+ {
+ return (IX_ETH_ACC_FAIL);
+ }
+
+ IX_ETH_ACC_VALIDATE_PORT_ID(portId);
+
+ if (IX_ETH_ACC_SUCCESS != ixEthAccSingleEthNpeCheck(portId))
+ {
+ IX_ETH_ACC_WARNING_LOG("EthAcc: Unavailable Eth %d: Cannot clear MIB II Stats.\n",(INT32)portId,0,0,0,0,0);
+ return IX_ETH_ACC_SUCCESS ;
+ }
+
+ /* there is no reset operation without a corresponding Get */
+ status = ixEthAccMibIIStatsGetClear(portId, &retStats);
+
+ return status;
+}
+
+/* Initialize the ethernet MAC settings */
+IxEthAccStatus
+ixEthAccMacInit(IxEthAccPortId portId)
+{
+ IX_OSAL_MBUF_POOL* portDisablePool;
+ UINT8 *data;
+
+ IX_ETH_ACC_VALIDATE_PORT_ID(portId);
+
+ if (IX_ETH_ACC_SUCCESS != ixEthAccSingleEthNpeCheck(portId))
+ {
+ IX_ETH_ACC_WARNING_LOG("EthAcc: Unavailable Eth %d: Cannot initialize Mac.\n",(INT32)portId,0,0,0,0,0);
+ return IX_ETH_ACC_SUCCESS ;
+ }
+
+ if(ixEthAccMacState[portId].macInitialised == FALSE)
+ {
+ ixEthAccMacState[portId].fullDuplex = TRUE;
+ ixEthAccMacState[portId].rxFCSAppend = TRUE;
+ ixEthAccMacState[portId].txFCSAppend = TRUE;
+ ixEthAccMacState[portId].txPADAppend = TRUE;
+ ixEthAccMacState[portId].enabled = FALSE;
+ ixEthAccMacState[portId].promiscuous = TRUE;
+ ixEthAccMacState[portId].joinAll = FALSE;
+ ixEthAccMacState[portId].initDone = FALSE;
+ ixEthAccMacState[portId].macInitialised = TRUE;
+
+ /* initialize MIB stats mutexes */
+ ixOsalMutexInit(&ixEthAccMacState[portId].ackMIBStatsLock);
+ ixOsalMutexLock(&ixEthAccMacState[portId].ackMIBStatsLock, IX_OSAL_WAIT_FOREVER);
+
+ ixOsalMutexInit(&ixEthAccMacState[portId].ackMIBStatsResetLock);
+ ixOsalMutexLock(&ixEthAccMacState[portId].ackMIBStatsResetLock, IX_OSAL_WAIT_FOREVER);
+
+ ixOsalMutexInit(&ixEthAccMacState[portId].MIBStatsGetAccessLock);
+
+ ixOsalMutexInit(&ixEthAccMacState[portId].MIBStatsGetResetAccessLock);
+
+ ixOsalMutexInit(&ixEthAccMacState[portId].npeLoopbackMessageLock);
+
+ ixEthAccMacState[portId].portDisableRxMbufPtr = NULL;
+ ixEthAccMacState[portId].portDisableTxMbufPtr = NULL;
+
+ portDisablePool = IX_OSAL_MBUF_POOL_INIT(2,
+ IX_ETHACC_RX_MBUF_MIN_SIZE,
+ "portDisable Pool");
+
+ IX_OSAL_ENSURE(portDisablePool != NULL, "Failed to initialize PortDisable pool");
+
+ ixEthAccMacState[portId].portDisableRxMbufPtr = IX_OSAL_MBUF_POOL_GET(portDisablePool);
+ ixEthAccMacState[portId].portDisableTxMbufPtr = IX_OSAL_MBUF_POOL_GET(portDisablePool);
+
+ IX_OSAL_ENSURE(ixEthAccMacState[portId].portDisableRxMbufPtr != NULL,
+ "Pool allocation failed");
+ IX_OSAL_ENSURE(ixEthAccMacState[portId].portDisableTxMbufPtr != NULL,
+ "Pool allocation failed");
+ /* fill the payload of the Rx mbuf used in portDisable */
+ IX_OSAL_MBUF_MLEN(ixEthAccMacState[portId].portDisableRxMbufPtr) = IX_ETHACC_RX_MBUF_MIN_SIZE;
+
+ memset(IX_OSAL_MBUF_MDATA(ixEthAccMacState[portId].portDisableRxMbufPtr),
+ 0xAA,
+ IX_ETHACC_RX_MBUF_MIN_SIZE);
+
+ /* fill the payload of the Tx mbuf used in portDisable (64 bytes) */
+ IX_OSAL_MBUF_MLEN(ixEthAccMacState[portId].portDisableTxMbufPtr) = 64;
+ IX_OSAL_MBUF_PKT_LEN(ixEthAccMacState[portId].portDisableTxMbufPtr) = 64;
+
+ data = (UINT8 *) IX_OSAL_MBUF_MDATA(ixEthAccMacState[portId].portDisableTxMbufPtr);
+ memset(data, 0xBB, 64);
+ data[0] = 0x00; /* unicast destination MAC address */
+ data[6] = 0x00; /* unicast source MAC address */
+ data[12] = 0x08; /* typelength : IP frame */
+ data[13] = 0x00; /* typelength : IP frame */
+
+ IX_OSAL_CACHE_FLUSH(data, 64);
+ }
+
+ IX_OSAL_ASSERT (ixEthAccMacBase[portId] != 0);
+
+ REG_WRITE(ixEthAccMacBase[portId],
+ IX_ETH_ACC_MAC_CORE_CNTRL,
+ IX_ETH_ACC_CORE_RESET);
+
+ ixOsalSleep(IX_ETH_ACC_MAC_RESET_DELAY);
+
+ REG_WRITE(ixEthAccMacBase[portId],
+ IX_ETH_ACC_MAC_CORE_CNTRL,
+ IX_ETH_ACC_CORE_MDC_EN);
+
+ REG_WRITE(ixEthAccMacBase[portId],
+ IX_ETH_ACC_MAC_INT_CLK_THRESH,
+ IX_ETH_ACC_MAC_INT_CLK_THRESH_DEFAULT);
+
+ ixEthAccMacStateUpdate(portId);
+
+ return IX_ETH_ACC_SUCCESS;
+}
+
+/* PRIVATE Functions*/
+
+PRIVATE void
+ixEthAccMacStateUpdate(IxEthAccPortId portId)
+{
+ UINT32 regval;
+
+ if ( ixEthAccMacState[portId].enabled == FALSE )
+ {
+ /* Just disable both the transmitter and reciver in the MAC. */
+ REG_READ(ixEthAccMacBase[portId],
+ IX_ETH_ACC_MAC_RX_CNTRL1,
+ regval);
+ REG_WRITE(ixEthAccMacBase[portId],
+ IX_ETH_ACC_MAC_RX_CNTRL1,
+ regval & ~IX_ETH_ACC_RX_CNTRL1_RX_EN);
+
+ REG_READ(ixEthAccMacBase[portId],
+ IX_ETH_ACC_MAC_TX_CNTRL1,
+ regval);
+ REG_WRITE(ixEthAccMacBase[portId],
+ IX_ETH_ACC_MAC_TX_CNTRL1,
+ regval & ~IX_ETH_ACC_TX_CNTRL1_TX_EN);
+ }
+
+ if(ixEthAccMacState[portId].fullDuplex)
+ {
+ ixEthAccPortDuplexModeSetPriv (portId, IX_ETH_ACC_FULL_DUPLEX);
+ }
+ else
+ {
+ ixEthAccPortDuplexModeSetPriv (portId, IX_ETH_ACC_HALF_DUPLEX);
+ }
+
+ if(ixEthAccMacState[portId].rxFCSAppend)
+ {
+ ixEthAccPortRxFrameAppendFCSEnablePriv (portId);
+ }
+ else
+ {
+ ixEthAccPortRxFrameAppendFCSDisablePriv (portId);
+ }
+
+ if(ixEthAccMacState[portId].txFCSAppend)
+ {
+ ixEthAccPortTxFrameAppendFCSEnablePriv (portId);
+ }
+ else
+ {
+ ixEthAccPortTxFrameAppendFCSDisablePriv (portId);
+ }
+
+ if(ixEthAccMacState[portId].txPADAppend)
+ {
+ ixEthAccPortTxFrameAppendPaddingEnablePriv (portId);
+ }
+ else
+ {
+ ixEthAccPortTxFrameAppendPaddingDisablePriv (portId);
+ }
+
+ if(ixEthAccMacState[portId].promiscuous)
+ {
+ ixEthAccPortPromiscuousModeSetPriv(portId);
+ }
+ else
+ {
+ ixEthAccPortPromiscuousModeClearPriv(portId);
+ }
+
+ if ( ixEthAccMacState[portId].enabled == TRUE )
+ {
+ /* Enable both the transmitter and reciver in the MAC. */
+ REG_READ(ixEthAccMacBase[portId],
+ IX_ETH_ACC_MAC_RX_CNTRL1,
+ regval);
+ REG_WRITE(ixEthAccMacBase[portId],
+ IX_ETH_ACC_MAC_RX_CNTRL1,
+ regval | IX_ETH_ACC_RX_CNTRL1_RX_EN);
+
+ REG_READ(ixEthAccMacBase[portId],
+ IX_ETH_ACC_MAC_TX_CNTRL1,
+ regval);
+ REG_WRITE(ixEthAccMacBase[portId],
+ IX_ETH_ACC_MAC_TX_CNTRL1,
+ regval | IX_ETH_ACC_TX_CNTRL1_TX_EN);
+ }
+}
+
+
+PRIVATE BOOL
+ixEthAccMacEqual(IxEthAccMacAddr *macAddr1,
+ IxEthAccMacAddr *macAddr2)
+{
+ UINT32 i;
+ for(i=0;i<IX_IEEE803_MAC_ADDRESS_SIZE; i++)
+ {
+ if(macAddr1->macAddress[i] != macAddr2->macAddress[i])
+ {
+ return FALSE;
+ }
+ }
+ return TRUE;
+}
+
+PRIVATE void
+ixEthAccMacPrint(IxEthAccMacAddr *m)
+{
+ printf("%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x",
+ m->macAddress[0], m->macAddress[1],
+ m->macAddress[2], m->macAddress[3],
+ m->macAddress[4], m->macAddress[5]);
+}
+
+/* Set the multicast address and address mask registers
+ *
+ * A bit in the address mask register must be set if
+ * all multicast addresses always have that bit set, or if
+ * all multicast addresses always have that bit cleared.
+ *
+ * A bit in the address register must be set if all multicast
+ * addresses have that bit set, otherwise, it should be cleared
+ */
+
+PRIVATE void
+ixEthAccMulticastAddressSet(IxEthAccPortId portId)
+{
+ UINT32 i;
+ UINT32 j;
+ IxEthAccMacAddr addressMask;
+ IxEthAccMacAddr address;
+ IxEthAccMacAddr alwaysClearBits;
+ IxEthAccMacAddr alwaysSetBits;
+
+ /* calculate alwaysClearBits and alwaysSetBits:
+ * alwaysClearBits is calculated by ORing all
+ * multicast addresses, those bits that are always
+ * clear are clear in the result
+ *
+ * alwaysSetBits is calculated by ANDing all
+ * multicast addresses, those bits that are always set
+ * are set in the result
+ */
+
+ if (ixEthAccMacState[portId].promiscuous == TRUE)
+ {
+ /* Promiscuous Mode is set, and filtering
+ * allow all packets, and enable the mcast and
+ * bcast detection.
+ */
+ memset(&addressMask.macAddress,
+ 0,
+ IX_IEEE803_MAC_ADDRESS_SIZE);
+ memset(&address.macAddress,
+ 0,
+ IX_IEEE803_MAC_ADDRESS_SIZE);
+ }
+ else
+ {
+ if(ixEthAccMacState[portId].joinAll == TRUE)
+ {
+ /* Join all is set. The mask and address are
+ * the multicast settings.
+ */
+ IxEthAccMacAddr macAddr = {{0x1,0x0,0x0,0x0,0x0,0x0}};
+
+ memcpy(addressMask.macAddress,
+ macAddr.macAddress,
+ IX_IEEE803_MAC_ADDRESS_SIZE);
+ memcpy(address.macAddress,
+ macAddr.macAddress,
+ IX_IEEE803_MAC_ADDRESS_SIZE);
+ }
+ else if(ixEthAccMacState[portId].mcastAddrIndex == 0)
+ {
+ /* No entry in the filtering database,
+ * Promiscuous Mode is cleared, Broadcast filtering
+ * is configured.
+ */
+ memset(addressMask.macAddress,
+ IX_ETH_ACC_MAC_ALL_BITS_SET,
+ IX_IEEE803_MAC_ADDRESS_SIZE);
+ memset(address.macAddress,
+ IX_ETH_ACC_MAC_ALL_BITS_SET,
+ IX_IEEE803_MAC_ADDRESS_SIZE);
+ }
+ else
+ {
+ /* build a mask and an address which mix all entreis
+ * from the list of multicast addresses
+ */
+ memset(alwaysClearBits.macAddress,
+ 0,
+ IX_IEEE803_MAC_ADDRESS_SIZE);
+ memset(alwaysSetBits.macAddress,
+ IX_ETH_ACC_MAC_ALL_BITS_SET,
+ IX_IEEE803_MAC_ADDRESS_SIZE);
+
+ for(i=0;i<ixEthAccMacState[portId].mcastAddrIndex;i++)
+ {
+ for(j=0;j<IX_IEEE803_MAC_ADDRESS_SIZE;j++)
+ {
+ alwaysClearBits.macAddress[j] |=
+ ixEthAccMacState[portId].mcastAddrsTable[i].macAddress[j];
+ alwaysSetBits.macAddress[j] &=
+ ixEthAccMacState[portId].mcastAddrsTable[i].macAddress[j];
+ }
+ }
+
+ for(i=0;i<IX_IEEE803_MAC_ADDRESS_SIZE;i++)
+ {
+ addressMask.macAddress[i] = alwaysSetBits.macAddress[i]
+ | ~alwaysClearBits.macAddress[i];
+ address.macAddress[i] = alwaysSetBits.macAddress[i];
+ }
+ }
+ }
+
+ /*write the new addr filtering to h/w*/
+ for(i=0;i<IX_IEEE803_MAC_ADDRESS_SIZE;i++)
+ {
+ REG_WRITE(ixEthAccMacBase[portId],
+ IX_ETH_ACC_MAC_ADDR_MASK_1+i*sizeof(UINT32),
+ addressMask.macAddress[i]);
+ REG_WRITE(ixEthAccMacBase[portId],
+ IX_ETH_ACC_MAC_ADDR_1+i*sizeof(UINT32),
+ address.macAddress[i]);
+ }
+}
diff --git a/cpu/ixp/npe/IxEthAccMii.c b/cpu/ixp/npe/IxEthAccMii.c
new file mode 100644
index 0000000000..86368a4734
--- /dev/null
+++ b/cpu/ixp/npe/IxEthAccMii.c
@@ -0,0 +1,410 @@
+/**
+ * @file IxEthAccMii.c
+ *
+ * @author Intel Corporation
+ * @date
+ *
+ * @brief MII control functions
+ *
+ * Design Notes:
+ *
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+#include "IxOsal.h"
+#include "IxEthAcc.h"
+#include "IxEthAcc_p.h"
+#include "IxEthAccMac_p.h"
+#include "IxEthAccMii_p.h"
+
+
+PRIVATE UINT32 miiBaseAddressVirt;
+PRIVATE IxOsalMutex miiAccessLock;
+
+PUBLIC UINT32 ixEthAccMiiRetryCount = IX_ETH_ACC_MII_TIMEOUT_10TH_SECS;
+PUBLIC UINT32 ixEthAccMiiAccessTimeout = IX_ETH_ACC_MII_10TH_SEC_IN_MILLIS;
+
+/* -----------------------------------
+ * private function prototypes
+ */
+PRIVATE void
+ixEthAccMdioCmdWrite(UINT32 mdioCommand);
+
+PRIVATE void
+ixEthAccMdioCmdRead(UINT32 *data);
+
+PRIVATE void
+ixEthAccMdioStatusRead(UINT32 *data);
+
+
+PRIVATE void
+ixEthAccMdioCmdWrite(UINT32 mdioCommand)
+{
+ REG_WRITE(miiBaseAddressVirt,
+ IX_ETH_ACC_MAC_MDIO_CMD_1,
+ mdioCommand & 0xff);
+
+ REG_WRITE(miiBaseAddressVirt,
+ IX_ETH_ACC_MAC_MDIO_CMD_2,
+ (mdioCommand >> 8) & 0xff);
+
+ REG_WRITE(miiBaseAddressVirt,
+ IX_ETH_ACC_MAC_MDIO_CMD_3,
+ (mdioCommand >> 16) & 0xff);
+
+ REG_WRITE(miiBaseAddressVirt,
+ IX_ETH_ACC_MAC_MDIO_CMD_4,
+ (mdioCommand >> 24) & 0xff);
+}
+
+PRIVATE void
+ixEthAccMdioCmdRead(UINT32 *data)
+{
+ UINT32 regval;
+
+ REG_READ(miiBaseAddressVirt,
+ IX_ETH_ACC_MAC_MDIO_CMD_1,
+ regval);
+
+ *data = regval & 0xff;
+
+ REG_READ(miiBaseAddressVirt,
+ IX_ETH_ACC_MAC_MDIO_CMD_2,
+ regval);
+
+ *data |= (regval & 0xff) << 8;
+
+ REG_READ(miiBaseAddressVirt,
+ IX_ETH_ACC_MAC_MDIO_CMD_3,
+ regval);
+
+ *data |= (regval & 0xff) << 16;
+
+ REG_READ(miiBaseAddressVirt,
+ IX_ETH_ACC_MAC_MDIO_CMD_4,
+ regval);
+
+ *data |= (regval & 0xff) << 24;
+
+}
+
+PRIVATE void
+ixEthAccMdioStatusRead(UINT32 *data)
+{
+ UINT32 regval;
+
+ REG_READ(miiBaseAddressVirt,
+ IX_ETH_ACC_MAC_MDIO_STS_1,
+ regval);
+
+ *data = regval & 0xff;
+
+ REG_READ(miiBaseAddressVirt,
+ IX_ETH_ACC_MAC_MDIO_STS_2,
+ regval);
+
+ *data |= (regval & 0xff) << 8;
+
+ REG_READ(miiBaseAddressVirt,
+ IX_ETH_ACC_MAC_MDIO_STS_3,
+ regval);
+
+ *data |= (regval & 0xff) << 16;
+
+ REG_READ(miiBaseAddressVirt,
+ IX_ETH_ACC_MAC_MDIO_STS_4,
+ regval);
+
+ *data |= (regval & 0xff) << 24;
+
+}
+
+
+/********************************************************************
+ * ixEthAccMiiInit
+ */
+IxEthAccStatus
+ixEthAccMiiInit()
+{
+ if(ixOsalMutexInit(&miiAccessLock)!= IX_SUCCESS)
+ {
+ return IX_ETH_ACC_FAIL;
+ }
+
+ miiBaseAddressVirt = (UINT32) IX_OSAL_MEM_MAP(IX_ETH_ACC_MAC_0_BASE, IX_OSAL_IXP400_ETHA_MAP_SIZE);
+
+ if (miiBaseAddressVirt == 0)
+ {
+ ixOsalLog(IX_OSAL_LOG_LVL_FATAL,
+ IX_OSAL_LOG_DEV_STDOUT,
+ "EthAcc: Could not map MII I/O mapped memory\n",
+ 0, 0, 0, 0, 0, 0);
+
+ return IX_ETH_ACC_FAIL;
+ }
+
+ return IX_ETH_ACC_SUCCESS;
+}
+
+void
+ixEthAccMiiUnload(void)
+{
+ IX_OSAL_MEM_UNMAP(miiBaseAddressVirt);
+
+ miiBaseAddressVirt = 0;
+}
+
+PUBLIC IxEthAccStatus
+ixEthAccMiiAccessTimeoutSet(UINT32 timeout, UINT32 retryCount)
+{
+ if (retryCount < 1) return IX_ETH_ACC_FAIL;
+
+ ixEthAccMiiRetryCount = retryCount;
+ ixEthAccMiiAccessTimeout = timeout;
+
+ return IX_ETH_ACC_SUCCESS;
+}
+
+/*********************************************************************
+ * ixEthAccMiiReadRtn - read a 16 bit value from a PHY
+ */
+IxEthAccStatus
+ixEthAccMiiReadRtn (UINT8 phyAddr,
+ UINT8 phyReg,
+ UINT16 *value)
+{
+ UINT32 mdioCommand;
+ UINT32 regval;
+ UINT32 miiTimeout;
+
+ if (!IX_ETH_ACC_IS_SERVICE_INITIALIZED())
+ {
+ return (IX_ETH_ACC_FAIL);
+ }
+
+ if ((phyAddr >= IXP425_ETH_ACC_MII_MAX_ADDR)
+ || (phyReg >= IXP425_ETH_ACC_MII_MAX_REG))
+ {
+ return (IX_ETH_ACC_FAIL);
+ }
+
+ if (value == NULL)
+ {
+ return (IX_ETH_ACC_FAIL);
+ }
+
+ ixOsalMutexLock(&miiAccessLock, IX_OSAL_WAIT_FOREVER);
+ mdioCommand = phyReg << IX_ETH_ACC_MII_REG_SHL
+ | phyAddr << IX_ETH_ACC_MII_ADDR_SHL;
+ mdioCommand |= IX_ETH_ACC_MII_GO;
+
+ ixEthAccMdioCmdWrite(mdioCommand);
+
+ miiTimeout = ixEthAccMiiRetryCount;
+
+ while(miiTimeout)
+ {
+
+ ixEthAccMdioCmdRead(&regval);
+
+ if((regval & IX_ETH_ACC_MII_GO) == 0x0)
+ {
+ break;
+ }
+ /* Sleep for a while */
+ ixOsalSleep(ixEthAccMiiAccessTimeout);
+ miiTimeout--;
+ }
+
+
+
+ if(miiTimeout == 0)
+ {
+ ixOsalMutexUnlock(&miiAccessLock);
+ *value = 0xffff;
+ return IX_ETH_ACC_FAIL;
+ }
+
+
+ ixEthAccMdioStatusRead(&regval);
+ if(regval & IX_ETH_ACC_MII_READ_FAIL)
+ {
+ ixOsalMutexUnlock(&miiAccessLock);
+ *value = 0xffff;
+ return IX_ETH_ACC_FAIL;
+ }
+
+ *value = regval & 0xffff;
+ ixOsalMutexUnlock(&miiAccessLock);
+ return IX_ETH_ACC_SUCCESS;
+
+}
+
+
+/*********************************************************************
+ * ixEthAccMiiWriteRtn - write a 16 bit value to a PHY
+ */
+IxEthAccStatus
+ixEthAccMiiWriteRtn (UINT8 phyAddr,
+ UINT8 phyReg,
+ UINT16 value)
+{
+ UINT32 mdioCommand;
+ UINT32 regval;
+ UINT16 readVal;
+ UINT32 miiTimeout;
+
+ if (!IX_ETH_ACC_IS_SERVICE_INITIALIZED())
+ {
+ return (IX_ETH_ACC_FAIL);
+ }
+
+ if ((phyAddr >= IXP425_ETH_ACC_MII_MAX_ADDR)
+ || (phyReg >= IXP425_ETH_ACC_MII_MAX_REG))
+ {
+ return (IX_ETH_ACC_FAIL);
+ }
+
+ /* ensure that a PHY is present at this address */
+ if(ixEthAccMiiReadRtn(phyAddr,
+ IX_ETH_ACC_MII_CTRL_REG,
+ &readVal) != IX_ETH_ACC_SUCCESS)
+ {
+ return (IX_ETH_ACC_FAIL);
+ }
+
+ ixOsalMutexLock(&miiAccessLock, IX_OSAL_WAIT_FOREVER);
+ mdioCommand = phyReg << IX_ETH_ACC_MII_REG_SHL
+ | phyAddr << IX_ETH_ACC_MII_ADDR_SHL ;
+ mdioCommand |= IX_ETH_ACC_MII_GO | IX_ETH_ACC_MII_WRITE | value;
+
+ ixEthAccMdioCmdWrite(mdioCommand);
+
+ miiTimeout = ixEthAccMiiRetryCount;
+
+ while(miiTimeout)
+ {
+
+ ixEthAccMdioCmdRead(&regval);
+
+ /*The "GO" bit is reset to 0 when the write completes*/
+ if((regval & IX_ETH_ACC_MII_GO) == 0x0)
+ {
+ break;
+ }
+ /* Sleep for a while */
+ ixOsalSleep(ixEthAccMiiAccessTimeout);
+ miiTimeout--;
+ }
+
+ ixOsalMutexUnlock(&miiAccessLock);
+ if(miiTimeout == 0)
+ {
+ return IX_ETH_ACC_FAIL;
+ }
+ return IX_ETH_ACC_SUCCESS;
+}
+
+
+/*****************************************************************
+ *
+ * Phy query functions
+ *
+ */
+IxEthAccStatus
+ixEthAccMiiStatsShow (UINT32 phyAddr)
+{
+ UINT16 regval;
+ printf("Regisers on PHY at address 0x%x\n", phyAddr);
+ ixEthAccMiiReadRtn(phyAddr, IX_ETH_ACC_MII_CTRL_REG, &regval);
+ printf(" Control Register : 0x%4.4x\n", regval);
+ ixEthAccMiiReadRtn(phyAddr, IX_ETH_ACC_MII_STAT_REG, &regval);
+ printf(" Status Register : 0x%4.4x\n", regval);
+ ixEthAccMiiReadRtn(phyAddr, IX_ETH_ACC_MII_PHY_ID1_REG, &regval);
+ printf(" PHY ID1 Register : 0x%4.4x\n", regval);
+ ixEthAccMiiReadRtn(phyAddr, IX_ETH_ACC_MII_PHY_ID2_REG, &regval);
+ printf(" PHY ID2 Register : 0x%4.4x\n", regval);
+ ixEthAccMiiReadRtn(phyAddr, IX_ETH_ACC_MII_AN_ADS_REG, &regval);
+ printf(" Auto Neg ADS Register : 0x%4.4x\n", regval);
+ ixEthAccMiiReadRtn(phyAddr, IX_ETH_ACC_MII_AN_PRTN_REG, &regval);
+ printf(" Auto Neg Partner Ability Register : 0x%4.4x\n", regval);
+ ixEthAccMiiReadRtn(phyAddr, IX_ETH_ACC_MII_AN_EXP_REG, &regval);
+ printf(" Auto Neg Expansion Register : 0x%4.4x\n", regval);
+ ixEthAccMiiReadRtn(phyAddr, IX_ETH_ACC_MII_AN_NEXT_REG, &regval);
+ printf(" Auto Neg Next Register : 0x%4.4x\n", regval);
+
+ return IX_ETH_ACC_SUCCESS;
+}
+
+
+/*****************************************************************
+ *
+ * Interface query functions
+ *
+ */
+IxEthAccStatus
+ixEthAccMdioShow (void)
+{
+ UINT32 regval;
+
+ if (!IX_ETH_ACC_IS_SERVICE_INITIALIZED())
+ {
+ return (IX_ETH_ACC_FAIL);
+ }
+
+ ixOsalMutexLock(&miiAccessLock, IX_OSAL_WAIT_FOREVER);
+ ixEthAccMdioCmdRead(&regval);
+ ixOsalMutexUnlock(&miiAccessLock);
+
+ printf("MDIO command register\n");
+ printf(" Go bit : 0x%x\n", (regval & BIT(31)) >> 31);
+ printf(" MDIO Write : 0x%x\n", (regval & BIT(26)) >> 26);
+ printf(" PHY address : 0x%x\n", (regval >> 21) & 0x1f);
+ printf(" Reg address : 0x%x\n", (regval >> 16) & 0x1f);
+
+ ixOsalMutexLock(&miiAccessLock, IX_OSAL_WAIT_FOREVER);
+ ixEthAccMdioStatusRead(&regval);
+ ixOsalMutexUnlock(&miiAccessLock);
+
+ printf("MDIO status register\n");
+ printf(" Read OK : 0x%x\n", (regval & BIT(31)) >> 31);
+ printf(" Read Data : 0x%x\n", (regval >> 16) & 0xff);
+
+ return IX_ETH_ACC_SUCCESS;
+}
+
diff --git a/cpu/ixp/npe/IxEthDBAPI.c b/cpu/ixp/npe/IxEthDBAPI.c
new file mode 100644
index 0000000000..b2bfb72606
--- /dev/null
+++ b/cpu/ixp/npe/IxEthDBAPI.c
@@ -0,0 +1,448 @@
+/**
+ * @file IxEthDBAPI.c
+ *
+ * @brief Implementation of the public API
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+#include "IxEthDB_p.h"
+#include "IxFeatureCtrl.h"
+
+extern HashTable dbHashtable;
+extern IxEthDBPortMap overflowUpdatePortList;
+extern BOOL ixEthDBPortUpdateRequired[IX_ETH_DB_MAX_RECORD_TYPE_INDEX + 1];
+
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBFilteringStaticEntryProvision(IxEthDBPortId portID, IxEthDBMacAddr *macAddr)
+{
+ IX_ETH_DB_CHECK_PORT(portID);
+
+ IX_ETH_DB_CHECK_SINGLE_NPE(portID);
+
+ IX_ETH_DB_CHECK_REFERENCE(macAddr);
+
+ IX_ETH_DB_CHECK_FEATURE(portID, IX_ETH_DB_LEARNING);
+
+ return ixEthDBTriggerAddPortUpdate(macAddr, portID, TRUE);
+}
+
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBFilteringDynamicEntryProvision(IxEthDBPortId portID, IxEthDBMacAddr *macAddr)
+{
+ IX_ETH_DB_CHECK_PORT(portID);
+
+ IX_ETH_DB_CHECK_SINGLE_NPE(portID);
+
+ IX_ETH_DB_CHECK_REFERENCE(macAddr);
+
+ IX_ETH_DB_CHECK_FEATURE(portID, IX_ETH_DB_LEARNING);
+
+ return ixEthDBTriggerAddPortUpdate(macAddr, portID, FALSE);
+}
+
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBFilteringEntryDelete(IxEthDBMacAddr *macAddr)
+{
+ HashNode *searchResult;
+
+ IX_ETH_DB_CHECK_REFERENCE(macAddr);
+
+ searchResult = ixEthDBSearch(macAddr, IX_ETH_DB_ALL_FILTERING_RECORDS);
+
+ if (searchResult == NULL)
+ {
+ return IX_ETH_DB_NO_SUCH_ADDR; /* not found */
+ }
+
+ ixEthDBReleaseHashNode(searchResult);
+
+ /* build a remove event and place it on the event queue */
+ return ixEthDBTriggerRemovePortUpdate(macAddr, ((MacDescriptor *) searchResult->data)->portID);
+}
+
+IX_ETH_DB_PUBLIC
+void ixEthDBDatabaseMaintenance()
+{
+ HashIterator iterator;
+ UINT32 portIndex;
+ BOOL agingRequired = FALSE;
+
+ /* ports who will have deleted records and therefore will need updating */
+ IxEthDBPortMap triggerPorts;
+
+ if (IX_FEATURE_CTRL_SWCONFIG_ENABLED !=
+ ixFeatureCtrlSwConfigurationCheck (IX_FEATURECTRL_ETH_LEARNING))
+ {
+ return;
+ }
+
+ SET_EMPTY_DEPENDENCY_MAP(triggerPorts);
+
+ /* check if there's at least a port that needs aging */
+ for (portIndex = 0 ; portIndex < IX_ETH_DB_NUMBER_OF_PORTS ; portIndex++)
+ {
+ if (ixEthDBPortInfo[portIndex].agingEnabled && ixEthDBPortInfo[portIndex].enabled)
+ {
+ agingRequired = TRUE;
+ }
+ }
+
+ if (agingRequired)
+ {
+ /* ask each NPE port to write back the database for aging inspection */
+ for (portIndex = 0 ; portIndex < IX_ETH_DB_NUMBER_OF_PORTS ; portIndex++)
+ {
+ if (ixEthDBPortDefinitions[portIndex].type == IX_ETH_NPE
+ && ixEthDBPortInfo[portIndex].agingEnabled
+ && ixEthDBPortInfo[portIndex].enabled)
+ {
+ IxNpeMhMessage message;
+ IX_STATUS result;
+
+ /* send EDB_GetMACAddressDatabase message */
+ FILL_GETMACADDRESSDATABASE(message,
+ 0 /* unused */,
+ IX_OSAL_MMU_VIRT_TO_PHYS(ixEthDBPortInfo[portIndex].updateMethod.npeUpdateZone));
+
+ IX_ETHDB_SEND_NPE_MSG(IX_ETH_DB_PORT_ID_TO_NPE(portIndex), message, result);
+
+ if (result == IX_SUCCESS)
+ {
+ /* analyze NPE copy */
+ ixEthDBNPESyncScan(portIndex, ixEthDBPortInfo[portIndex].updateMethod.npeUpdateZone, FULL_ELT_BYTE_SIZE);
+
+ IX_ETH_DB_SUPPORT_TRACE("DB: (API) Finished scanning NPE tree on port %d\n", portIndex);
+ }
+ else
+ {
+ ixEthDBPortInfo[portIndex].agingEnabled = FALSE;
+ ixEthDBPortInfo[portIndex].updateMethod.updateEnabled = FALSE;
+ ixEthDBPortInfo[portIndex].updateMethod.userControlled = TRUE;
+
+ ixOsalLog(IX_OSAL_LOG_LVL_FATAL,
+ IX_OSAL_LOG_DEV_STDOUT,
+ "EthDB: (Maintenance) warning, disabling aging and updates for port %d (assumed dead)\n",
+ portIndex, 0, 0, 0, 0, 0);
+
+ ixEthDBDatabaseClear(portIndex, IX_ETH_DB_ALL_RECORD_TYPES);
+ }
+ }
+ }
+
+ /* browse database and age entries */
+ BUSY_RETRY(ixEthDBInitHashIterator(&dbHashtable, &iterator));
+
+ while (IS_ITERATOR_VALID(&iterator))
+ {
+ MacDescriptor *descriptor = (MacDescriptor *) iterator.node->data;
+ UINT32 *age = NULL;
+ BOOL staticEntry = TRUE;
+
+ if (descriptor->type == IX_ETH_DB_FILTERING_RECORD)
+ {
+ age = &descriptor->recordData.filteringData.age;
+ staticEntry = descriptor->recordData.filteringData.staticEntry;
+ }
+ else if (descriptor->type == IX_ETH_DB_FILTERING_VLAN_RECORD)
+ {
+ age = &descriptor->recordData.filteringVlanData.age;
+ staticEntry = descriptor->recordData.filteringVlanData.staticEntry;
+ }
+ else
+ {
+ staticEntry = TRUE;
+ }
+
+ if (ixEthDBPortInfo[descriptor->portID].agingEnabled && (staticEntry == FALSE))
+ {
+ /* manually increment the age if the port has no such capability */
+ if ((ixEthDBPortDefinitions[descriptor->portID].capabilities & IX_ETH_ENTRY_AGING) == 0)
+ {
+ *age += (IX_ETH_DB_MAINTENANCE_TIME / 60);
+ }
+
+ /* age entry if it exceeded the maximum time to live */
+ if (*age >= (IX_ETH_DB_LEARNING_ENTRY_AGE_TIME / 60))
+ {
+ /* add port to the set of update trigger ports */
+ JOIN_PORT_TO_MAP(triggerPorts, descriptor->portID);
+
+ /* delete entry */
+ BUSY_RETRY(ixEthDBRemoveEntryAtHashIterator(&dbHashtable, &iterator));
+ }
+ else
+ {
+ /* move to the next record */
+ BUSY_RETRY(ixEthDBIncrementHashIterator(&dbHashtable, &iterator));
+ }
+ }
+ else
+ {
+ /* move to the next record */
+ BUSY_RETRY(ixEthDBIncrementHashIterator(&dbHashtable, &iterator));
+ }
+ }
+
+ /* update ports which lost records */
+ ixEthDBUpdatePortLearningTrees(triggerPorts);
+ }
+}
+
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBDatabaseClear(IxEthDBPortId portID, IxEthDBRecordType recordType)
+{
+ IxEthDBPortMap triggerPorts;
+ HashIterator iterator;
+
+ if (portID >= IX_ETH_DB_NUMBER_OF_PORTS && portID != IX_ETH_DB_ALL_PORTS)
+ {
+ return IX_ETH_DB_INVALID_PORT;
+ }
+
+ /* check if the user passes some extra bits */
+ if ((recordType | IX_ETH_DB_ALL_RECORD_TYPES) != IX_ETH_DB_ALL_RECORD_TYPES)
+ {
+ return IX_ETH_DB_INVALID_ARG;
+ }
+
+ SET_EMPTY_DEPENDENCY_MAP(triggerPorts);
+
+ /* browse database and age entries */
+ BUSY_RETRY(ixEthDBInitHashIterator(&dbHashtable, &iterator));
+
+ while (IS_ITERATOR_VALID(&iterator))
+ {
+ MacDescriptor *descriptor = (MacDescriptor *) iterator.node->data;
+
+ if (((descriptor->portID == portID) || (portID == IX_ETH_DB_ALL_PORTS))
+ && ((descriptor->type & recordType) != 0))
+ {
+ /* add to trigger if automatic updates are required */
+ if (ixEthDBPortUpdateRequired[descriptor->type])
+ {
+ /* add port to the set of update trigger ports */
+ JOIN_PORT_TO_MAP(triggerPorts, descriptor->portID);
+ }
+
+ /* delete entry */
+ BUSY_RETRY(ixEthDBRemoveEntryAtHashIterator(&dbHashtable, &iterator));
+ }
+ else
+ {
+ /* move to the next record */
+ BUSY_RETRY(ixEthDBIncrementHashIterator(&dbHashtable, &iterator));
+ }
+ }
+
+ /* update ports which lost records */
+ ixEthDBUpdatePortLearningTrees(triggerPorts);
+
+ return IX_ETH_DB_SUCCESS;
+}
+
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBFilteringPortSearch(IxEthDBPortId portID, IxEthDBMacAddr *macAddr)
+{
+ HashNode *searchResult;
+ IxEthDBStatus result = IX_ETH_DB_NO_SUCH_ADDR;
+
+ IX_ETH_DB_CHECK_PORT(portID);
+
+ IX_ETH_DB_CHECK_SINGLE_NPE(portID);
+
+ IX_ETH_DB_CHECK_REFERENCE(macAddr);
+
+ IX_ETH_DB_CHECK_FEATURE(portID, IX_ETH_DB_LEARNING);
+
+ searchResult = ixEthDBSearch(macAddr, IX_ETH_DB_ALL_FILTERING_RECORDS);
+
+ if (searchResult == NULL)
+ {
+ return IX_ETH_DB_NO_SUCH_ADDR; /* not found */
+ }
+
+ if (((MacDescriptor *) (searchResult->data))->portID == portID)
+ {
+ result = IX_ETH_DB_SUCCESS; /* address and port match */
+ }
+
+ ixEthDBReleaseHashNode(searchResult);
+
+ return result;
+}
+
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBFilteringDatabaseSearch(IxEthDBPortId *portID, IxEthDBMacAddr *macAddr)
+{
+ HashNode *searchResult;
+
+ IX_ETH_DB_CHECK_REFERENCE(portID);
+
+ IX_ETH_DB_CHECK_REFERENCE(macAddr);
+
+ searchResult = ixEthDBSearch(macAddr, IX_ETH_DB_ALL_FILTERING_RECORDS);
+
+ if (searchResult == NULL)
+ {
+ return IX_ETH_DB_NO_SUCH_ADDR; /* not found */
+ }
+
+ /* return the port ID */
+ *portID = ((MacDescriptor *) searchResult->data)->portID;
+
+ ixEthDBReleaseHashNode(searchResult);
+
+ return IX_ETH_DB_SUCCESS;
+}
+
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBPortAgingDisable(IxEthDBPortId portID)
+{
+ IX_ETH_DB_CHECK_PORT(portID);
+
+ IX_ETH_DB_CHECK_SINGLE_NPE(portID);
+
+ IX_ETH_DB_CHECK_FEATURE(portID, IX_ETH_DB_LEARNING);
+
+ ixEthDBPortInfo[portID].agingEnabled = FALSE;
+
+ return IX_ETH_DB_SUCCESS;
+}
+
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBPortAgingEnable(IxEthDBPortId portID)
+{
+ IX_ETH_DB_CHECK_PORT(portID);
+
+ IX_ETH_DB_CHECK_SINGLE_NPE(portID);
+
+ IX_ETH_DB_CHECK_FEATURE(portID, IX_ETH_DB_LEARNING);
+
+ ixEthDBPortInfo[portID].agingEnabled = TRUE;
+
+ return IX_ETH_DB_SUCCESS;
+}
+
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBFilteringPortUpdatingSearch(IxEthDBPortId *portID, IxEthDBMacAddr *macAddr)
+{
+ HashNode *searchResult;
+ MacDescriptor *descriptor;
+
+ IX_ETH_DB_CHECK_REFERENCE(portID);
+
+ IX_ETH_DB_CHECK_REFERENCE(macAddr);
+
+ searchResult = ixEthDBSearch(macAddr, IX_ETH_DB_ALL_FILTERING_RECORDS);
+
+ if (searchResult == NULL)
+ {
+ return IX_ETH_DB_NO_SUCH_ADDR; /* not found */
+ }
+
+ descriptor = (MacDescriptor *) searchResult->data;
+
+ /* return the port ID */
+ *portID = descriptor->portID;
+
+ /* reset entry age */
+ if (descriptor->type == IX_ETH_DB_FILTERING_RECORD)
+ {
+ descriptor->recordData.filteringData.age = 0;
+ }
+ else
+ {
+ descriptor->recordData.filteringVlanData.age = 0;
+ }
+
+ ixEthDBReleaseHashNode(searchResult);
+
+ return IX_ETH_DB_SUCCESS;
+}
+
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBPortDependencyMapSet(IxEthDBPortId portID, IxEthDBPortMap dependencyPortMap)
+{
+ IX_ETH_DB_CHECK_PORT(portID);
+
+ IX_ETH_DB_CHECK_SINGLE_NPE(portID);
+
+ IX_ETH_DB_CHECK_REFERENCE(dependencyPortMap);
+
+ IX_ETH_DB_CHECK_FEATURE(portID, IX_ETH_DB_FILTERING);
+
+ /* force bit at offset 255 to 0 (reserved) */
+ dependencyPortMap[31] &= 0xFE;
+
+ COPY_DEPENDENCY_MAP(ixEthDBPortInfo[portID].dependencyPortMap, dependencyPortMap);
+
+ return IX_ETH_DB_SUCCESS;
+}
+
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBPortDependencyMapGet(IxEthDBPortId portID, IxEthDBPortMap dependencyPortMap)
+{
+ IX_ETH_DB_CHECK_PORT(portID);
+
+ IX_ETH_DB_CHECK_SINGLE_NPE(portID);
+
+ IX_ETH_DB_CHECK_REFERENCE(dependencyPortMap);
+
+ IX_ETH_DB_CHECK_FEATURE(portID, IX_ETH_DB_FILTERING);
+
+ COPY_DEPENDENCY_MAP(dependencyPortMap, ixEthDBPortInfo[portID].dependencyPortMap);
+
+ return IX_ETH_DB_SUCCESS;
+}
+
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBPortUpdateEnableSet(IxEthDBPortId portID, BOOL enableUpdate)
+{
+ IX_ETH_DB_CHECK_PORT(portID);
+
+ IX_ETH_DB_CHECK_SINGLE_NPE(portID);
+
+ IX_ETH_DB_CHECK_FEATURE(portID, IX_ETH_DB_FILTERING);
+
+ ixEthDBPortInfo[portID].updateMethod.updateEnabled = enableUpdate;
+ ixEthDBPortInfo[portID].updateMethod.userControlled = TRUE;
+
+ return IX_ETH_DB_SUCCESS;
+}
diff --git a/cpu/ixp/npe/IxEthDBAPISupport.c b/cpu/ixp/npe/IxEthDBAPISupport.c
new file mode 100644
index 0000000000..25633a3d56
--- /dev/null
+++ b/cpu/ixp/npe/IxEthDBAPISupport.c
@@ -0,0 +1,678 @@
+/**
+ * @file IxEthDBAPISupport.c
+ *
+ * @brief Public API support functions
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+#include <IxEthDB.h>
+#include <IxNpeMh.h>
+#include <IxFeatureCtrl.h>
+
+#include "IxEthDB_p.h"
+#include "IxEthDBMessages_p.h"
+#include "IxEthDB_p.h"
+#include "IxEthDBLog_p.h"
+
+#ifdef IX_UNIT_TEST
+
+int dbAccessCounter = 0;
+int overflowEvent = 0;
+
+#endif
+
+/*
+ * External declaration
+ */
+extern HashTable dbHashtable;
+
+/*
+ * Internal declaration
+ */
+IX_ETH_DB_PUBLIC
+PortInfo ixEthDBPortInfo[IX_ETH_DB_NUMBER_OF_PORTS];
+
+IX_ETH_DB_PRIVATE
+struct
+{
+ BOOL saved;
+ IxEthDBPriorityTable priorityTable;
+ IxEthDBVlanSet vlanMembership;
+ IxEthDBVlanSet transmitTaggingInfo;
+ IxEthDBFrameFilter frameFilter;
+ IxEthDBTaggingAction taggingAction;
+ IxEthDBFirewallMode firewallMode;
+ BOOL stpBlocked;
+ BOOL srcAddressFilterEnabled;
+ UINT32 maxRxFrameSize;
+ UINT32 maxTxFrameSize;
+} ixEthDBPortState[IX_ETH_DB_NUMBER_OF_PORTS];
+
+#define IX_ETH_DB_DEFAULT_FRAME_SIZE (1518)
+
+/**
+ * @brief initializes a port
+ *
+ * @param portID ID of the port to be initialized
+ *
+ * Note that redundant initializations are silently
+ * dealt with and do not constitute an error
+ *
+ * This function is fully documented in the main
+ * header file, IxEthDB.h
+ */
+IX_ETH_DB_PUBLIC
+void ixEthDBPortInit(IxEthDBPortId portID)
+{
+ PortInfo *portInfo;
+
+ if (portID >= IX_ETH_DB_NUMBER_OF_PORTS)
+ {
+ return;
+ }
+
+ portInfo = &ixEthDBPortInfo[portID];
+
+ if (ixEthDBSingleEthNpeCheck(portID) != IX_ETH_DB_SUCCESS)
+ {
+ WARNING_LOG("EthDB: Unavailable Eth %d: Cannot initialize EthDB Port.\n", (UINT32) portID);
+
+ return;
+ }
+
+ if (portInfo->initialized)
+ {
+ /* redundant */
+ return;
+ }
+
+ /* initialize core fields */
+ portInfo->portID = portID;
+ SET_DEPENDENCY_MAP(portInfo->dependencyPortMap, portID);
+
+ /* default values */
+ portInfo->agingEnabled = FALSE;
+ portInfo->enabled = FALSE;
+ portInfo->macAddressUploaded = FALSE;
+ portInfo->maxRxFrameSize = IX_ETHDB_DEFAULT_FRAME_SIZE;
+ portInfo->maxTxFrameSize = IX_ETHDB_DEFAULT_FRAME_SIZE;
+
+ /* default update control values */
+ portInfo->updateMethod.searchTree = NULL;
+ portInfo->updateMethod.searchTreePendingWrite = FALSE;
+ portInfo->updateMethod.treeInitialized = FALSE;
+ portInfo->updateMethod.updateEnabled = FALSE;
+ portInfo->updateMethod.userControlled = FALSE;
+
+ /* default WiFi parameters */
+ memset(portInfo->bbsid, 0, sizeof (portInfo->bbsid));
+ portInfo->frameControlDurationID = 0;
+
+ /* Ethernet NPE-specific initializations */
+ if (ixEthDBPortDefinitions[portID].type == IX_ETH_NPE)
+ {
+ /* update handler */
+ portInfo->updateMethod.updateHandler = ixEthDBNPEUpdateHandler;
+ }
+
+ /* initialize state save */
+ ixEthDBPortState[portID].saved = FALSE;
+
+ portInfo->initialized = TRUE;
+}
+
+/**
+ * @brief enables a port
+ *
+ * @param portID ID of the port to enable
+ *
+ * This function is fully documented in the main
+ * header file, IxEthDB.h
+ *
+ * @return IX_ETH_DB_SUCCESS if enabling was
+ * accomplished, or a meaningful error message otherwise
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBPortEnable(IxEthDBPortId portID)
+{
+ IxEthDBPortMap triggerPorts;
+ PortInfo *portInfo;
+
+ IX_ETH_DB_CHECK_PORT_EXISTS(portID);
+
+ IX_ETH_DB_CHECK_SINGLE_NPE(portID);
+
+ portInfo = &ixEthDBPortInfo[portID];
+
+ if (portInfo->enabled)
+ {
+ /* redundant */
+ return IX_ETH_DB_SUCCESS;
+ }
+
+ SET_DEPENDENCY_MAP(triggerPorts, portID);
+
+ /* mark as enabled */
+ portInfo->enabled = TRUE;
+
+ /* Operation stops here when Ethernet Learning is not enabled */
+ if(IX_FEATURE_CTRL_SWCONFIG_DISABLED ==
+ ixFeatureCtrlSwConfigurationCheck(IX_FEATURECTRL_ETH_LEARNING))
+ {
+ return IX_ETH_DB_SUCCESS;
+ }
+
+ if (ixEthDBPortDefinitions[portID].type == IX_ETH_NPE && !portInfo->macAddressUploaded)
+ {
+ IX_ETH_DB_SUPPORT_TRACE("DB: (Support) MAC address not set on port %d, enable failed\n", portID);
+
+ /* must use UnicastAddressSet() before enabling an NPE port */
+ return IX_ETH_DB_MAC_UNINITIALIZED;
+ }
+
+ if (ixEthDBPortDefinitions[portID].type == IX_ETH_NPE)
+ {
+ IX_ETH_DB_SUPPORT_TRACE("DB: (Support) Attempting to enable the NPE callback for port %d...\n", portID);
+
+ if (!portInfo->updateMethod.userControlled
+ && ((portInfo->featureCapability & IX_ETH_DB_FILTERING) != 0))
+ {
+ portInfo->updateMethod.updateEnabled = TRUE;
+ }
+
+ /* if this is first time initialization then we already have
+ write access to the tree and can AccessRelease directly */
+ if (!portInfo->updateMethod.treeInitialized)
+ {
+ IX_ETH_DB_SUPPORT_TRACE("DB: (Support) Initializing tree for port %d\n", portID);
+
+ /* create an initial tree and release access into it */
+ ixEthDBUpdatePortLearningTrees(triggerPorts);
+
+ /* mark tree as being initialized */
+ portInfo->updateMethod.treeInitialized = TRUE;
+ }
+ }
+
+ if (ixEthDBPortState[portID].saved)
+ {
+ /* previous configuration data stored, restore state */
+ if ((portInfo->featureCapability & IX_ETH_DB_FIREWALL) != 0)
+ {
+ ixEthDBFirewallModeSet(portID, ixEthDBPortState[portID].firewallMode);
+ ixEthDBFirewallInvalidAddressFilterEnable(portID, ixEthDBPortState[portID].srcAddressFilterEnabled);
+ }
+
+#if 0 /* test-only */
+ if ((portInfo->featureCapability & IX_ETH_DB_VLAN_QOS) != 0)
+ {
+ ixEthDBAcceptableFrameTypeSet(portID, ixEthDBPortState[portID].frameFilter);
+ ixEthDBIngressVlanTaggingEnabledSet(portID, ixEthDBPortState[portID].taggingAction);
+
+ ixEthDBEgressVlanTaggingEnabledSet(portID, ixEthDBPortState[portID].transmitTaggingInfo);
+ ixEthDBPortVlanMembershipSet(portID, ixEthDBPortState[portID].vlanMembership);
+
+ ixEthDBPriorityMappingTableSet(portID, ixEthDBPortState[portID].priorityTable);
+ }
+#endif
+
+ if ((portInfo->featureCapability & IX_ETH_DB_SPANNING_TREE_PROTOCOL) != 0)
+ {
+ ixEthDBSpanningTreeBlockingStateSet(portID, ixEthDBPortState[portID].stpBlocked);
+ }
+
+ ixEthDBFilteringPortMaximumRxFrameSizeSet(portID, ixEthDBPortState[portID].maxRxFrameSize);
+ ixEthDBFilteringPortMaximumTxFrameSizeSet(portID, ixEthDBPortState[portID].maxTxFrameSize);
+
+ /* discard previous save */
+ ixEthDBPortState[portID].saved = FALSE;
+ }
+
+ IX_ETH_DB_SUPPORT_TRACE("DB: (Support) Enabling succeeded for port %d\n", portID);
+
+ return IX_ETH_DB_SUCCESS;
+}
+
+/**
+ * @brief disables a port
+ *
+ * @param portID ID of the port to disable
+ *
+ * This function is fully documented in the
+ * main header file, IxEthDB.h
+ *
+ * @return IX_ETH_DB_SUCCESS if disabling was
+ * successful or an appropriate error message
+ * otherwise
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBPortDisable(IxEthDBPortId portID)
+{
+ HashIterator iterator;
+ IxEthDBPortMap triggerPorts; /* ports who will have deleted records and therefore will need updating */
+ BOOL result;
+ PortInfo *portInfo;
+ IxEthDBFeature learningEnabled;
+#if 0 /* test-only */
+ IxEthDBPriorityTable classZeroTable;
+#endif
+
+ IX_ETH_DB_CHECK_PORT_EXISTS(portID);
+
+ IX_ETH_DB_CHECK_SINGLE_NPE(portID);
+
+ portInfo = &ixEthDBPortInfo[portID];
+
+ if (!portInfo->enabled)
+ {
+ /* redundant */
+ return IX_ETH_DB_SUCCESS;
+ }
+
+ if (ixEthDBPortDefinitions[portID].type == IX_ETH_NPE)
+ {
+ /* save filtering state */
+ ixEthDBPortState[portID].firewallMode = portInfo->firewallMode;
+ ixEthDBPortState[portID].frameFilter = portInfo->frameFilter;
+ ixEthDBPortState[portID].taggingAction = portInfo->taggingAction;
+ ixEthDBPortState[portID].stpBlocked = portInfo->stpBlocked;
+ ixEthDBPortState[portID].srcAddressFilterEnabled = portInfo->srcAddressFilterEnabled;
+ ixEthDBPortState[portID].maxRxFrameSize = portInfo->maxRxFrameSize;
+ ixEthDBPortState[portID].maxTxFrameSize = portInfo->maxTxFrameSize;
+
+ memcpy(ixEthDBPortState[portID].vlanMembership, portInfo->vlanMembership, sizeof (IxEthDBVlanSet));
+ memcpy(ixEthDBPortState[portID].transmitTaggingInfo, portInfo->transmitTaggingInfo, sizeof (IxEthDBVlanSet));
+ memcpy(ixEthDBPortState[portID].priorityTable, portInfo->priorityTable, sizeof (IxEthDBPriorityTable));
+
+ ixEthDBPortState[portID].saved = TRUE;
+
+ /* now turn off all EthDB filtering features on the port */
+
+#if 0 /* test-only */
+ /* VLAN & QoS */
+ if ((portInfo->featureCapability & IX_ETH_DB_VLAN_QOS) != 0)
+ {
+ ixEthDBPortVlanMembershipRangeAdd((IxEthDBPortId) portID, 0, IX_ETH_DB_802_1Q_MAX_VLAN_ID);
+ ixEthDBEgressVlanRangeTaggingEnabledSet((IxEthDBPortId) portID, 0, IX_ETH_DB_802_1Q_MAX_VLAN_ID, FALSE);
+ ixEthDBAcceptableFrameTypeSet((IxEthDBPortId) portID, IX_ETH_DB_ACCEPT_ALL_FRAMES);
+ ixEthDBIngressVlanTaggingEnabledSet((IxEthDBPortId) portID, IX_ETH_DB_PASS_THROUGH);
+
+ memset(classZeroTable, 0, sizeof (classZeroTable));
+ ixEthDBPriorityMappingTableSet((IxEthDBPortId) portID, classZeroTable);
+ }
+#endif
+
+ /* STP */
+ if ((portInfo->featureCapability & IX_ETH_DB_SPANNING_TREE_PROTOCOL) != 0)
+ {
+ ixEthDBSpanningTreeBlockingStateSet((IxEthDBPortId) portID, FALSE);
+ }
+
+ /* Firewall */
+ if ((portInfo->featureCapability & IX_ETH_DB_FIREWALL) != 0)
+ {
+ ixEthDBFirewallModeSet((IxEthDBPortId) portID, IX_ETH_DB_FIREWALL_BLACK_LIST);
+ ixEthDBFirewallTableDownload((IxEthDBPortId) portID);
+ ixEthDBFirewallInvalidAddressFilterEnable((IxEthDBPortId) portID, FALSE);
+ }
+
+ /* Frame size filter */
+ ixEthDBFilteringPortMaximumFrameSizeSet((IxEthDBPortId) portID, IX_ETH_DB_DEFAULT_FRAME_SIZE);
+
+ /* WiFi */
+ if ((portInfo->featureCapability & IX_ETH_DB_WIFI_HEADER_CONVERSION) != 0)
+ {
+ ixEthDBWiFiConversionTableDownload((IxEthDBPortId) portID);
+ }
+
+ /* save and disable the learning feature bit */
+ learningEnabled = portInfo->featureStatus & IX_ETH_DB_LEARNING;
+ portInfo->featureStatus &= ~IX_ETH_DB_LEARNING;
+ }
+ else
+ {
+ /* save the learning feature bit */
+ learningEnabled = portInfo->featureStatus & IX_ETH_DB_LEARNING;
+ }
+
+ SET_EMPTY_DEPENDENCY_MAP(triggerPorts);
+
+ ixEthDBUpdateLock();
+
+ /* wipe out current entries for this port */
+ BUSY_RETRY(ixEthDBInitHashIterator(&dbHashtable, &iterator));
+
+ while (IS_ITERATOR_VALID(&iterator))
+ {
+ MacDescriptor *descriptor = (MacDescriptor *) iterator.node->data;
+
+ /* check if the port match. If so, remove the entry */
+ if (descriptor->portID == portID
+ && (descriptor->type == IX_ETH_DB_FILTERING_RECORD || descriptor->type == IX_ETH_DB_FILTERING_VLAN_RECORD)
+ && !descriptor->recordData.filteringData.staticEntry)
+ {
+ /* delete entry */
+ BUSY_RETRY(ixEthDBRemoveEntryAtHashIterator(&dbHashtable, &iterator));
+
+ /* add port to the set of update trigger ports */
+ JOIN_PORT_TO_MAP(triggerPorts, portID);
+ }
+ else
+ {
+ /* move to the next record */
+ BUSY_RETRY(ixEthDBIncrementHashIterator(&dbHashtable, &iterator));
+ }
+ }
+
+ if (ixEthDBPortDefinitions[portID].type == IX_ETH_NPE)
+ {
+ if (portInfo->updateMethod.searchTree != NULL)
+ {
+ ixEthDBFreeMacTreeNode(portInfo->updateMethod.searchTree);
+ portInfo->updateMethod.searchTree = NULL;
+ }
+
+ ixEthDBNPEUpdateHandler(portID, IX_ETH_DB_FILTERING_RECORD);
+ }
+
+ /* mark as disabled */
+ portInfo->enabled = FALSE;
+
+ /* disable updates unless the user has specifically altered the default behavior */
+ if (ixEthDBPortDefinitions[portID].type == IX_ETH_NPE)
+ {
+ if (!portInfo->updateMethod.userControlled)
+ {
+ portInfo->updateMethod.updateEnabled = FALSE;
+ }
+
+ /* make sure we re-initialize the NPE learning tree when the port is re-enabled */
+ portInfo->updateMethod.treeInitialized = FALSE;
+ }
+
+ ixEthDBUpdateUnlock();
+
+ /* restore learning feature bit */
+ portInfo->featureStatus |= learningEnabled;
+
+ /* if we've removed any records or lost any events make sure to force an update */
+ IS_EMPTY_DEPENDENCY_MAP(result, triggerPorts);
+
+ if (!result)
+ {
+ ixEthDBUpdatePortLearningTrees(triggerPorts);
+ }
+
+ return IX_ETH_DB_SUCCESS;
+}
+
+/**
+ * @brief sends the updated maximum Tx/Rx frame lengths to the NPE
+ *
+ * @param portID ID of the port to update
+ *
+ * @return IX_ETH_DB_SUCCESS if the update completed
+ * successfully or an appropriate error message otherwise
+ *
+ * @internal
+ */
+IX_ETH_DB_PRIVATE
+IxEthDBStatus ixEthDBPortFrameLengthsUpdate(IxEthDBPortId portID)
+{
+ IxNpeMhMessage message;
+ PortInfo *portInfo = &ixEthDBPortInfo[portID];
+ IX_STATUS result;
+
+ FILL_SETMAXFRAMELENGTHS_MSG(message, portID, portInfo->maxRxFrameSize, portInfo->maxTxFrameSize);
+
+ IX_ETHDB_SEND_NPE_MSG(IX_ETH_DB_PORT_ID_TO_NPE(portID), message, result);
+
+ return result;
+}
+
+/**
+ * @brief sets the port maximum Rx frame size
+ *
+ * @param portID ID of the port to set the frame size on
+ * @param maximumRxFrameSize maximum Rx frame size
+ *
+ * This function updates the internal data structures and
+ * calls ixEthDBPortFrameLengthsUpdate() for NPE update.
+ *
+ * This function is fully documented in the main header
+ * file, IxEthDB.h.
+ *
+ * @return IX_ETH_DB_SUCCESS if the operation was
+ * successfull or an appropriate error message otherwise
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBFilteringPortMaximumRxFrameSizeSet(IxEthDBPortId portID, UINT32 maximumRxFrameSize)
+{
+ IX_ETH_DB_CHECK_PORT_EXISTS(portID);
+
+ IX_ETH_DB_CHECK_SINGLE_NPE(portID);
+
+ if (!ixEthDBPortInfo[portID].initialized)
+ {
+ return IX_ETH_DB_PORT_UNINITIALIZED;
+ }
+
+ if (ixEthDBPortDefinitions[portID].type == IX_ETH_NPE)
+ {
+ if ((maximumRxFrameSize < IX_ETHDB_MIN_NPE_FRAME_SIZE) ||
+ (maximumRxFrameSize > IX_ETHDB_MAX_NPE_FRAME_SIZE))
+ {
+ return IX_ETH_DB_INVALID_ARG;
+ }
+ }
+ else
+ {
+ return IX_ETH_DB_NO_PERMISSION;
+ }
+
+ /* update internal structure */
+ ixEthDBPortInfo[portID].maxRxFrameSize = maximumRxFrameSize;
+
+ /* update the maximum frame size in the NPE */
+ return ixEthDBPortFrameLengthsUpdate(portID);
+}
+
+/**
+ * @brief sets the port maximum Tx frame size
+ *
+ * @param portID ID of the port to set the frame size on
+ * @param maximumTxFrameSize maximum Tx frame size
+ *
+ * This function updates the internal data structures and
+ * calls ixEthDBPortFrameLengthsUpdate() for NPE update.
+ *
+ * This function is fully documented in the main header
+ * file, IxEthDB.h.
+ *
+ * @return IX_ETH_DB_SUCCESS if the operation was
+ * successfull or an appropriate error message otherwise
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBFilteringPortMaximumTxFrameSizeSet(IxEthDBPortId portID, UINT32 maximumTxFrameSize)
+{
+ IX_ETH_DB_CHECK_PORT_EXISTS(portID);
+
+ IX_ETH_DB_CHECK_SINGLE_NPE(portID);
+
+ if (!ixEthDBPortInfo[portID].initialized)
+ {
+ return IX_ETH_DB_PORT_UNINITIALIZED;
+ }
+
+ if (ixEthDBPortDefinitions[portID].type == IX_ETH_NPE)
+ {
+ if ((maximumTxFrameSize < IX_ETHDB_MIN_NPE_FRAME_SIZE) ||
+ (maximumTxFrameSize > IX_ETHDB_MAX_NPE_FRAME_SIZE))
+ {
+ return IX_ETH_DB_INVALID_ARG;
+ }
+ }
+ else
+ {
+ return IX_ETH_DB_NO_PERMISSION;
+ }
+
+ /* update internal structure */
+ ixEthDBPortInfo[portID].maxTxFrameSize = maximumTxFrameSize;
+
+ /* update the maximum frame size in the NPE */
+ return ixEthDBPortFrameLengthsUpdate(portID);
+}
+
+/**
+ * @brief sets the port maximum Tx and Rx frame sizes
+ *
+ * @param portID ID of the port to set the frame size on
+ * @param maximumFrameSize maximum Tx and Rx frame sizes
+ *
+ * This function updates the internal data structures and
+ * calls ixEthDBPortFrameLengthsUpdate() for NPE update.
+ *
+ * Note that both the maximum Tx and Rx frame size are set
+ * to the same value. This function is kept for compatibility
+ * reasons.
+ *
+ * This function is fully documented in the main header
+ * file, IxEthDB.h.
+ *
+ * @return IX_ETH_DB_SUCCESS if the operation was
+ * successfull or an appropriate error message otherwise
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBFilteringPortMaximumFrameSizeSet(IxEthDBPortId portID, UINT32 maximumFrameSize)
+{
+ IX_ETH_DB_CHECK_PORT_EXISTS(portID);
+
+ IX_ETH_DB_CHECK_SINGLE_NPE(portID);
+
+ if (!ixEthDBPortInfo[portID].initialized)
+ {
+ return IX_ETH_DB_PORT_UNINITIALIZED;
+ }
+
+ if (ixEthDBPortDefinitions[portID].type == IX_ETH_NPE)
+ {
+ if ((maximumFrameSize < IX_ETHDB_MIN_NPE_FRAME_SIZE) ||
+ (maximumFrameSize > IX_ETHDB_MAX_NPE_FRAME_SIZE))
+ {
+ return IX_ETH_DB_INVALID_ARG;
+ }
+ }
+ else
+ {
+ return IX_ETH_DB_NO_PERMISSION;
+ }
+
+ /* update internal structure */
+ ixEthDBPortInfo[portID].maxRxFrameSize = maximumFrameSize;
+ ixEthDBPortInfo[portID].maxTxFrameSize = maximumFrameSize;
+
+ /* update the maximum frame size in the NPE */
+ return ixEthDBPortFrameLengthsUpdate(portID);
+}
+
+/**
+ * @brief sets the MAC address of an NPE port
+ *
+ * @param portID port ID to set the MAC address on
+ * @param macAddr pointer to the 6-byte MAC address
+ *
+ * This function is called by the EthAcc
+ * ixEthAccUnicastMacAddressSet() and should not be
+ * manually invoked unless required by special circumstances.
+ *
+ * @return IX_ETH_DB_SUCCESS if the operation succeeded
+ * or an appropriate error message otherwise
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBPortAddressSet(IxEthDBPortId portID, IxEthDBMacAddr *macAddr)
+{
+ IxNpeMhMessage message;
+ IxOsalMutex *ackPortAddressLock;
+ IX_STATUS result;
+
+ /* use this macro instead CHECK_PORT
+ as the port doesn't need to be enabled */
+ IX_ETH_DB_CHECK_PORT_EXISTS(portID);
+
+ IX_ETH_DB_CHECK_REFERENCE(macAddr);
+
+ if (!ixEthDBPortInfo[portID].initialized)
+ {
+ return IX_ETH_DB_PORT_UNINITIALIZED;
+ }
+
+ ackPortAddressLock = &ixEthDBPortInfo[portID].npeAckLock;
+
+ /* Operation stops here when Ethernet Learning is not enabled */
+ if(IX_FEATURE_CTRL_SWCONFIG_DISABLED ==
+ ixFeatureCtrlSwConfigurationCheck(IX_FEATURECTRL_ETH_LEARNING))
+ {
+ return IX_ETH_DB_SUCCESS;
+ }
+
+ IX_ETH_DB_CHECK_SINGLE_NPE(portID);
+
+ /* exit if the port is not an Ethernet NPE */
+ if (ixEthDBPortDefinitions[portID].type != IX_ETH_NPE)
+ {
+ return IX_ETH_DB_INVALID_PORT;
+ }
+
+ /* populate message */
+ FILL_SETPORTADDRESS_MSG(message, portID, macAddr->macAddress);
+
+ IX_ETH_DB_SUPPORT_TRACE("DB: (Support) Sending SetPortAddress on port %d...\n", portID);
+
+ /* send a SetPortAddress message */
+ IX_ETHDB_SEND_NPE_MSG(IX_ETH_DB_PORT_ID_TO_NPE(portID), message, result);
+
+ if (result == IX_SUCCESS)
+ {
+ ixEthDBPortInfo[portID].macAddressUploaded = TRUE;
+ }
+
+ return result;
+}
diff --git a/cpu/ixp/npe/IxEthDBCore.c b/cpu/ixp/npe/IxEthDBCore.c
new file mode 100644
index 0000000000..25b7cbb8b8
--- /dev/null
+++ b/cpu/ixp/npe/IxEthDBCore.c
@@ -0,0 +1,463 @@
+/**
+ * @file IxEthDBDBCore.c
+ *
+ * @brief Database support functions
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+#include "IxEthDB_p.h"
+
+/* list of database hashtables */
+IX_ETH_DB_PUBLIC HashTable dbHashtable;
+IX_ETH_DB_PUBLIC MatchFunction matchFunctions[IX_ETH_DB_MAX_KEY_INDEX + 1];
+IX_ETH_DB_PUBLIC BOOL ixEthDBPortUpdateRequired[IX_ETH_DB_MAX_RECORD_TYPE_INDEX + 1];
+IX_ETH_DB_PUBLIC UINT32 ixEthDBKeyType[IX_ETH_DB_MAX_RECORD_TYPE_INDEX + 1];
+
+/* private initialization flag */
+IX_ETH_DB_PRIVATE BOOL ethDBInitializationComplete = FALSE;
+
+/**
+ * @brief initializes EthDB
+ *
+ * This function must be called to initialize the component.
+ *
+ * It does the following things:
+ * - checks the port definition structure
+ * - scans the capabilities of the NPE images and sets the
+ * capabilities of the ports accordingly
+ * - initializes the memory pools internally used in EthDB
+ * for storing database records and handling data
+ * - registers automatic update handlers for add and remove
+ * operations
+ * - registers hashing match functions, depending on key sets
+ * - initializes the main database hashtable
+ * - allocates contiguous memory zones to be used for NPE
+ * updates
+ * - registers the serialize methods used to convert data
+ * into NPE-readable format
+ * - starts the event processor
+ *
+ * Note that this function is documented in the public
+ * component header file, IxEthDB.h.
+ *
+ * @return IX_ETH_DB_SUCCESS or an appropriate error if the
+ * component failed to initialize correctly
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBInit(void)
+{
+ IxEthDBStatus result;
+
+ if (ethDBInitializationComplete)
+ {
+ /* redundant */
+ return IX_ETH_DB_SUCCESS;
+ }
+
+ /* trap an invalid port definition structure */
+ IX_ETH_DB_PORTS_ASSERTION;
+
+ /* memory management */
+ ixEthDBInitMemoryPools();
+
+ /* register hashing search methods */
+ ixEthDBMatchMethodsRegister(matchFunctions);
+
+ /* register type-based automatic port updates */
+ ixEthDBUpdateTypeRegister(ixEthDBPortUpdateRequired);
+
+ /* register record to key type mappings */
+ ixEthDBKeyTypeRegister(ixEthDBKeyType);
+
+ /* hash table */
+ ixEthDBInitHash(&dbHashtable, NUM_BUCKETS, ixEthDBEntryXORHash, matchFunctions, (FreeFunction) ixEthDBFreeMacDescriptor);
+
+ /* NPE update zones */
+ ixEthDBNPEUpdateAreasInit();
+
+ /* register record serialization methods */
+ ixEthDBRecordSerializeMethodsRegister();
+
+ /* start the event processor */
+ result = ixEthDBEventProcessorInit();
+
+ /* scan NPE features */
+ if (result == IX_ETH_DB_SUCCESS)
+ {
+ ixEthDBFeatureCapabilityScan();
+ }
+
+ ethDBInitializationComplete = TRUE;
+
+ return result;
+}
+
+/**
+ * @brief prepares EthDB for unloading
+ *
+ * This function must be called before removing the
+ * EthDB component from memory (e.g. doing rmmod in
+ * Linux) if the component is to be re-initialized again
+ * without rebooting the platform.
+ *
+ * All the EthDB ports must be disabled before this
+ * function is to be called. Failure to disable all
+ * the ports will return the IX_ETH_DB_BUSY error.
+ *
+ * This function will destroy mutexes, deallocate
+ * memory and stop the event processor.
+ *
+ * Note that this function is fully documented in the
+ * main component header file, IxEthDB.h.
+ *
+ * @return IX_ETH_DB_SUCCESS if de-initialization
+ * completed successfully or an appropriate error
+ * message otherwise
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBUnload(void)
+{
+ IxEthDBPortId portIndex;
+
+ if (!ethDBInitializationComplete)
+ {
+ /* redundant */
+ return IX_ETH_DB_SUCCESS;
+ }
+
+ /* check if any ports are enabled */
+ for (portIndex = 0 ; portIndex < IX_ETH_DB_NUMBER_OF_PORTS ; portIndex++)
+ {
+ if (ixEthDBPortInfo[portIndex].enabled)
+ {
+ return IX_ETH_DB_BUSY;
+ }
+ }
+
+ /* free port resources */
+ for (portIndex = 0 ; portIndex < IX_ETH_DB_NUMBER_OF_PORTS ; portIndex++)
+ {
+ if (ixEthDBPortDefinitions[portIndex].type == IX_ETH_NPE)
+ {
+ ixOsalMutexDestroy(&ixEthDBPortInfo[portIndex].npeAckLock);
+ }
+
+ ixEthDBPortInfo[portIndex].initialized = FALSE;
+ }
+
+ /* shutdown event processor */
+ ixEthDBStopLearningFunction();
+
+ /* deallocate NPE update zones */
+ ixEthDBNPEUpdateAreasUnload();
+
+ ethDBInitializationComplete = FALSE;
+
+ return IX_ETH_DB_SUCCESS;
+}
+
+/**
+ * @brief adds a new entry to the Ethernet database
+ *
+ * @param newRecordTemplate address of the record template to use
+ * @param updateTrigger port map containing the update triggers
+ * resulting from this update operation
+ *
+ * Creates a new database entry, populates it with the data
+ * copied from the given template and adds the record to the
+ * database hash table.
+ * It also checks whether the new record type is registered to trigger
+ * automatic updates; if it is, the update trigger will contain the
+ * port on which the record insertion was performed, as well as the
+ * old port in case the addition was a record migration (from one port
+ * to the other). The caller can use the updateTrigger to trigger
+ * automatic updates on the ports changed as a result of this addition.
+ *
+ * @retval IX_ETH_DB_SUCCESS addition successful
+ * @retval IX_ETH_DB_NOMEM insertion failed, no memory left in the mac descriptor memory pool
+ * @retval IX_ETH_DB_BUSY database busy, cannot insert due to locking
+ *
+ * @internal
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBAdd(MacDescriptor *newRecordTemplate, IxEthDBPortMap updateTrigger)
+{
+ IxEthDBStatus result;
+ MacDescriptor *newDescriptor;
+ IxEthDBPortId originalPortID;
+ HashNode *node = NULL;
+
+ BUSY_RETRY(ixEthDBSearchHashEntry(&dbHashtable, ixEthDBKeyType[newRecordTemplate->type], newRecordTemplate, &node));
+
+ TEST_FIXTURE_INCREMENT_DB_CORE_ACCESS_COUNTER;
+
+ if (node == NULL)
+ {
+ /* not found, create a new one */
+ newDescriptor = ixEthDBAllocMacDescriptor();
+
+ if (newDescriptor == NULL)
+ {
+ return IX_ETH_DB_NOMEM; /* no memory */
+ }
+
+ /* old port does not exist, avoid unnecessary updates */
+ originalPortID = newRecordTemplate->portID;
+ }
+ else
+ {
+ /* a node with the same key exists, will update node */
+ newDescriptor = (MacDescriptor *) node->data;
+
+ /* save original port id */
+ originalPortID = newDescriptor->portID;
+ }
+
+ /* copy/update fields into new record */
+ memcpy(newDescriptor->macAddress, newRecordTemplate->macAddress, sizeof (IxEthDBMacAddr));
+ memcpy(&newDescriptor->recordData, &newRecordTemplate->recordData, sizeof (IxEthDBRecordData));
+
+ newDescriptor->type = newRecordTemplate->type;
+ newDescriptor->portID = newRecordTemplate->portID;
+ newDescriptor->user = newRecordTemplate->user;
+
+ if (node == NULL)
+ {
+ /* new record, insert into hashtable */
+ BUSY_RETRY_WITH_RESULT(ixEthDBAddHashEntry(&dbHashtable, newDescriptor), result);
+
+ if (result != IX_ETH_DB_SUCCESS)
+ {
+ ixEthDBFreeMacDescriptor(newDescriptor);
+
+ return result; /* insertion failed */
+ }
+ }
+
+ if (node != NULL)
+ {
+ /* release access */
+ ixEthDBReleaseHashNode(node);
+ }
+
+ /* trigger add/remove update if required by type */
+ if (updateTrigger != NULL &&
+ ixEthDBPortUpdateRequired[newRecordTemplate->type])
+ {
+ /* add new port to update list */
+ JOIN_PORT_TO_MAP(updateTrigger, newRecordTemplate->portID);
+
+ /* check if record has moved, we'll need to update the old port as well */
+ if (originalPortID != newDescriptor->portID)
+ {
+ JOIN_PORT_TO_MAP(updateTrigger, originalPortID);
+ }
+ }
+
+ return IX_ETH_DB_SUCCESS;
+}
+
+/**
+ * @brief remove a record from the Ethernet database
+ *
+ * @param templateRecord template record used to determine
+ * what record is to be removed
+ * @param updateTrigger port map containing the update triggers
+ * resulting from this update operation
+ *
+ * This function will examine the template record it receives
+ * and attempts to delete a record of the same type and containing
+ * the same keys as the template record. If deletion is successful
+ * and the record type is registered for automatic port updates the
+ * port will also be set in the updateTrigger port map, so that the
+ * client can perform an update of the port.
+ *
+ * @retval IX_ETH_DB_SUCCESS removal was successful
+ * @retval IX_ETH_DB_NO_SUCH_ADDR the record with the given MAC address was not found
+ * @retval IX_ETH_DB_BUSY database busy, cannot remove due to locking
+ *
+ * @internal
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBRemove(MacDescriptor *templateRecord, IxEthDBPortMap updateTrigger)
+{
+ IxEthDBStatus result;
+
+ TEST_FIXTURE_INCREMENT_DB_CORE_ACCESS_COUNTER;
+
+ BUSY_RETRY_WITH_RESULT(ixEthDBRemoveHashEntry(&dbHashtable, ixEthDBKeyType[templateRecord->type], templateRecord), result);
+
+ if (result != IX_ETH_DB_SUCCESS)
+ {
+ return IX_ETH_DB_NO_SUCH_ADDR; /* not found */
+ }
+
+ /* trigger add/remove update if required by type */
+ if (updateTrigger != NULL
+ &&ixEthDBPortUpdateRequired[templateRecord->type])
+ {
+ /* add new port to update list */
+ JOIN_PORT_TO_MAP(updateTrigger, templateRecord->portID);
+ }
+
+ return IX_ETH_DB_SUCCESS;
+}
+
+/**
+ * @brief register record key types
+ *
+ * This function registers the appropriate key types,
+ * depending on record types.
+ *
+ * All filtering records use the MAC address as the key.
+ * WiFi and Firewall records use a compound key consisting
+ * in both the MAC address and the port ID.
+ *
+ * @return the number of registered record types
+ */
+IX_ETH_DB_PUBLIC
+UINT32 ixEthDBKeyTypeRegister(UINT32 *keyType)
+{
+ /* safety */
+ memset(keyType, 0, sizeof (keyType));
+
+ /* register all known record types */
+ keyType[IX_ETH_DB_FILTERING_RECORD] = IX_ETH_DB_MAC_KEY;
+ keyType[IX_ETH_DB_FILTERING_VLAN_RECORD] = IX_ETH_DB_MAC_KEY;
+ keyType[IX_ETH_DB_ALL_FILTERING_RECORDS] = IX_ETH_DB_MAC_KEY;
+ keyType[IX_ETH_DB_WIFI_RECORD] = IX_ETH_DB_MAC_PORT_KEY;
+ keyType[IX_ETH_DB_FIREWALL_RECORD] = IX_ETH_DB_MAC_PORT_KEY;
+
+ return 5;
+}
+
+/**
+ * @brief Sets a user-defined field into a database record
+ *
+ * Note that this function is fully documented in the main component
+ * header file.
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBUserFieldSet(IxEthDBRecordType recordType, IxEthDBMacAddr *macAddr, IxEthDBPortId portID, IxEthDBVlanId vlanID, void *field)
+{
+ HashNode *result = NULL;
+
+ if (macAddr == NULL)
+ {
+ return IX_ETH_DB_INVALID_ARG;
+ }
+
+ if (recordType == IX_ETH_DB_FILTERING_RECORD)
+ {
+ result = ixEthDBSearch(macAddr, recordType);
+ }
+ else if (recordType == IX_ETH_DB_FILTERING_VLAN_RECORD)
+ {
+ result = ixEthDBVlanSearch(macAddr, vlanID, recordType);
+ }
+ else if (recordType == IX_ETH_DB_WIFI_RECORD || recordType == IX_ETH_DB_FIREWALL_RECORD)
+ {
+ IX_ETH_DB_CHECK_PORT_EXISTS(portID);
+
+ result = ixEthDBPortSearch(macAddr, portID, recordType);
+ }
+ else
+ {
+ return IX_ETH_DB_INVALID_ARG;
+ }
+
+ if (result == NULL)
+ {
+ return IX_ETH_DB_NO_SUCH_ADDR;
+ }
+
+ ((MacDescriptor *) result->data)->user = field;
+
+ ixEthDBReleaseHashNode(result);
+
+ return IX_ETH_DB_SUCCESS;
+}
+
+/**
+ * @brief Retrieves a user-defined field from a database record
+ *
+ * Note that this function is fully documented in the main component
+ * header file.
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBUserFieldGet(IxEthDBRecordType recordType, IxEthDBMacAddr *macAddr, IxEthDBPortId portID, IxEthDBVlanId vlanID, void **field)
+{
+ HashNode *result = NULL;
+
+ if (macAddr == NULL || field == NULL)
+ {
+ return IX_ETH_DB_INVALID_ARG;
+ }
+
+ if (recordType == IX_ETH_DB_FILTERING_RECORD)
+ {
+ result = ixEthDBSearch(macAddr, recordType);
+ }
+ else if (recordType == IX_ETH_DB_FILTERING_VLAN_RECORD)
+ {
+ result = ixEthDBVlanSearch(macAddr, vlanID, recordType);
+ }
+ else if (recordType == IX_ETH_DB_WIFI_RECORD || recordType == IX_ETH_DB_FIREWALL_RECORD)
+ {
+ IX_ETH_DB_CHECK_PORT_EXISTS(portID);
+
+ result = ixEthDBPortSearch(macAddr, portID, recordType);
+ }
+ else
+ {
+ return IX_ETH_DB_INVALID_ARG;
+ }
+
+ if (result == NULL)
+ {
+ return IX_ETH_DB_NO_SUCH_ADDR;
+ }
+
+ *field = ((MacDescriptor *) result->data)->user;
+
+ ixEthDBReleaseHashNode(result);
+
+ return IX_ETH_DB_SUCCESS;
+}
diff --git a/cpu/ixp/npe/IxEthDBEvents.c b/cpu/ixp/npe/IxEthDBEvents.c
new file mode 100644
index 0000000000..4d44e03337
--- /dev/null
+++ b/cpu/ixp/npe/IxEthDBEvents.c
@@ -0,0 +1,520 @@
+/**
+ * @file IxEthDBEvents.c
+ *
+ * @brief Implementation of the event processor component
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+#include <IxNpeMh.h>
+#include <IxFeatureCtrl.h>
+
+#include "IxEthDB_p.h"
+
+/* forward prototype declarations */
+IX_ETH_DB_PUBLIC void ixEthDBEventProcessorLoop(void *);
+IX_ETH_DB_PUBLIC void ixEthDBNPEEventCallback(IxNpeMhNpeId npeID, IxNpeMhMessage msg);
+IX_ETH_DB_PRIVATE void ixEthDBProcessEvent(PortEvent *local_event, IxEthDBPortMap triggerPorts);
+IX_ETH_DB_PRIVATE IxEthDBStatus ixEthDBTriggerPortUpdate(UINT32 eventType, IxEthDBMacAddr *macAddr, IxEthDBPortId portID, BOOL staticEntry);
+IX_ETH_DB_PUBLIC IxEthDBStatus ixEthDBStartLearningFunction(void);
+IX_ETH_DB_PUBLIC IxEthDBStatus ixEthDBStopLearningFunction(void);
+
+/* data */
+IX_ETH_DB_PRIVATE IxOsalSemaphore eventQueueSemaphore;
+IX_ETH_DB_PRIVATE PortEventQueue eventQueue;
+IX_ETH_DB_PRIVATE IxOsalMutex eventQueueLock;
+IX_ETH_DB_PRIVATE IxOsalMutex portUpdateLock;
+
+IX_ETH_DB_PRIVATE BOOL ixEthDBLearningShutdown = FALSE;
+IX_ETH_DB_PRIVATE BOOL ixEthDBEventProcessorRunning = FALSE;
+
+/* imported data */
+extern HashTable dbHashtable;
+
+/**
+ * @brief initializes the event processor
+ *
+ * Initializes the event processor queue and processing thread.
+ * Called from ixEthDBInit() DB-subcomponent master init function.
+ *
+ * @warning do not call directly
+ *
+ * @retval IX_ETH_DB_SUCCESS initialization was successful
+ * @retval IX_ETH_DB_FAIL initialization failed (OSAL or mutex init failure)
+ *
+ * @internal
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBEventProcessorInit(void)
+{
+ if (ixOsalMutexInit(&portUpdateLock) != IX_SUCCESS)
+ {
+ return IX_ETH_DB_FAIL;
+ }
+
+ if (ixOsalMutexInit(&eventQueueLock) != IX_SUCCESS)
+ {
+ return IX_ETH_DB_FAIL;
+ }
+
+ if (IX_FEATURE_CTRL_SWCONFIG_ENABLED ==
+ ixFeatureCtrlSwConfigurationCheck (IX_FEATURECTRL_ETH_LEARNING))
+ {
+
+ /* start processor loop thread */
+ if (ixEthDBStartLearningFunction() != IX_ETH_DB_SUCCESS)
+ {
+ return IX_ETH_DB_FAIL;
+ }
+ }
+
+ return IX_ETH_DB_SUCCESS;
+}
+
+/**
+ * @brief initializes the event queue and the event processor
+ *
+ * This function is called by the component initialization
+ * function, ixEthDBInit().
+ *
+ * @warning do not call directly
+ *
+ * @return IX_ETH_DB_SUCCESS if the operation completed
+ * successfully or IX_ETH_DB_FAIL otherwise
+ *
+ * @internal
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBStartLearningFunction(void)
+{
+ IxOsalThread eventProcessorThread;
+ IxOsalThreadAttr threadAttr;
+
+ threadAttr.name = "EthDB event thread";
+ threadAttr.stackSize = 32 * 1024; /* 32kbytes */
+ threadAttr.priority = 128;
+
+ /* reset event queue */
+ ixOsalMutexLock(&eventQueueLock, IX_OSAL_WAIT_FOREVER);
+
+ RESET_QUEUE(&eventQueue);
+
+ ixOsalMutexUnlock(&eventQueueLock);
+
+ /* init event queue semaphore */
+ if (ixOsalSemaphoreInit(&eventQueueSemaphore, 0) != IX_SUCCESS)
+ {
+ return IX_ETH_DB_FAIL;
+ }
+
+ ixEthDBLearningShutdown = FALSE;
+
+ /* create processor loop thread */
+ if (ixOsalThreadCreate(&eventProcessorThread, &threadAttr, ixEthDBEventProcessorLoop, NULL) != IX_SUCCESS)
+ {
+ return IX_ETH_DB_FAIL;
+ }
+
+ /* start event processor */
+ ixOsalThreadStart(&eventProcessorThread);
+
+ return IX_ETH_DB_SUCCESS;
+}
+
+/**
+ * @brief stops the event processor
+ *
+ * Stops the event processor and frees the event queue semaphore
+ * Called by the component de-initialization function, ixEthDBUnload()
+ *
+ * @warning do not call directly
+ *
+ * @return IX_ETH_DB_SUCCESS if the operation completed
+ * successfully or IX_ETH_DB_FAIL otherwise;
+ *
+ * @internal
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBStopLearningFunction(void)
+{
+ ixEthDBLearningShutdown = TRUE;
+
+ /* wake up event processing loop to actually process the shutdown event */
+ ixOsalSemaphorePost(&eventQueueSemaphore);
+
+ if (ixOsalSemaphoreDestroy(&eventQueueSemaphore) != IX_SUCCESS)
+ {
+ return IX_ETH_DB_FAIL;
+ }
+
+ return IX_ETH_DB_SUCCESS;
+}
+
+/**
+ * @brief default NPE event processing callback
+ *
+ * @param npeID ID of the NPE that generated the event
+ * @param msg NPE message (encapsulated event)
+ *
+ * Creates an event object on the Ethernet event processor queue
+ * and signals the new event by incrementing the event queue semaphore.
+ * Events are processed by @ref ixEthDBEventProcessorLoop() which runs
+ * at user level.
+ *
+ * @see ixEthDBEventProcessorLoop()
+ *
+ * @warning do not call directly
+ *
+ * @internal
+ */
+IX_ETH_DB_PUBLIC
+void ixEthDBNPEEventCallback(IxNpeMhNpeId npeID, IxNpeMhMessage msg)
+{
+ PortEvent *local_event;
+
+ IX_ETH_DB_IRQ_EVENTS_TRACE("DB: (Events) new event received by processor callback from port %d, id 0x%X\n", IX_ETH_DB_NPE_TO_PORT_ID(npeID), NPE_MSG_ID(msg), 0, 0, 0, 0);
+
+ if (CAN_ENQUEUE(&eventQueue))
+ {
+ TEST_FIXTURE_LOCK_EVENT_QUEUE;
+
+ local_event = QUEUE_HEAD(&eventQueue);
+
+ /* create event structure on queue */
+ local_event->eventType = NPE_MSG_ID(msg);
+ local_event->portID = IX_ETH_DB_NPE_TO_PORT_ID(npeID);
+
+ /* update queue */
+ PUSH_UPDATE_QUEUE(&eventQueue);
+
+ TEST_FIXTURE_UNLOCK_EVENT_QUEUE;
+
+ IX_ETH_DB_IRQ_EVENTS_TRACE("DB: (Events) Waking up main processor loop...\n", 0, 0, 0, 0, 0, 0);
+
+ /* increment event queue semaphore */
+ ixOsalSemaphorePost(&eventQueueSemaphore);
+ }
+ else
+ {
+ IX_ETH_DB_IRQ_EVENTS_TRACE("DB: (Events) Warning: could not enqueue event (overflow)\n", 0, 0, 0, 0, 0, 0);
+ }
+}
+
+/**
+ * @brief Ethernet event processor loop
+ *
+ * Extracts at most EVENT_PROCESSING_LIMIT batches of events and
+ * sends them for processing to @ref ixEthDBProcessEvent().
+ * Triggers port updates which normally follow learning events.
+ *
+ * @warning do not call directly, executes in separate thread
+ *
+ * @internal
+ */
+IX_ETH_DB_PUBLIC
+void ixEthDBEventProcessorLoop(void *unused1)
+{
+ IxEthDBPortMap triggerPorts;
+ IxEthDBPortId portIndex;
+
+ ixEthDBEventProcessorRunning = TRUE;
+
+ IX_ETH_DB_EVENTS_TRACE("DB: (Events) Event processor loop was started\n");
+
+ while (!ixEthDBLearningShutdown)
+ {
+ BOOL keepProcessing = TRUE;
+ UINT32 processedEvents = 0;
+
+ IX_ETH_DB_EVENTS_VERBOSE_TRACE("DB: (Events) Waiting for new learning event...\n");
+
+ ixOsalSemaphoreWait(&eventQueueSemaphore, IX_OSAL_WAIT_FOREVER);
+
+ IX_ETH_DB_EVENTS_VERBOSE_TRACE("DB: (Events) Received new event\n");
+
+ if (!ixEthDBLearningShutdown)
+ {
+ /* port update handling */
+ SET_EMPTY_DEPENDENCY_MAP(triggerPorts);
+
+ while (keepProcessing)
+ {
+ PortEvent local_event;
+ UINT32 intLockKey;
+
+ /* lock queue */
+ ixOsalMutexLock(&eventQueueLock, IX_OSAL_WAIT_FOREVER);
+
+ /* lock NPE interrupts */
+ intLockKey = ixOsalIrqLock();
+
+ /* extract event */
+ local_event = *(QUEUE_TAIL(&eventQueue));
+
+ SHIFT_UPDATE_QUEUE(&eventQueue);
+
+ ixOsalIrqUnlock(intLockKey);
+
+ ixOsalMutexUnlock(&eventQueueLock);
+
+ IX_ETH_DB_EVENTS_TRACE("DB: (Events) Processing event with ID 0x%X\n", local_event.eventType);
+
+ ixEthDBProcessEvent(&local_event, triggerPorts);
+
+ processedEvents++;
+
+ if (processedEvents > EVENT_PROCESSING_LIMIT /* maximum burst reached? */
+ || ixOsalSemaphoreTryWait(&eventQueueSemaphore) != IX_SUCCESS) /* or empty queue? */
+ {
+ keepProcessing = FALSE;
+ }
+ }
+
+ ixEthDBUpdatePortLearningTrees(triggerPorts);
+ }
+ }
+
+ /* turn off automatic updates */
+ for (portIndex = 0 ; portIndex < IX_ETH_DB_NUMBER_OF_PORTS ; portIndex++)
+ {
+ ixEthDBPortInfo[portIndex].updateMethod.updateEnabled = FALSE;
+ }
+
+ ixEthDBEventProcessorRunning = FALSE;
+}
+
+/**
+ * @brief event processor routine
+ *
+ * @param event event to be processed
+ * @param triggerPorts port map accumulating ports to be updated
+ *
+ * Processes learning events by synchronizing the database with
+ * newly learnt data. Called only by @ref ixEthDBEventProcessorLoop().
+ *
+ * @warning do not call directly
+ *
+ * @internal
+ */
+IX_ETH_DB_PRIVATE
+void ixEthDBProcessEvent(PortEvent *local_event, IxEthDBPortMap triggerPorts)
+{
+ MacDescriptor recordTemplate;
+
+ switch (local_event->eventType)
+ {
+ case IX_ETH_DB_ADD_FILTERING_RECORD:
+ /* add record */
+ memset(&recordTemplate, 0, sizeof (recordTemplate));
+ memcpy(recordTemplate.macAddress, local_event->macAddr.macAddress, sizeof (IxEthDBMacAddr));
+
+ recordTemplate.type = IX_ETH_DB_FILTERING_RECORD;
+ recordTemplate.portID = local_event->portID;
+ recordTemplate.recordData.filteringData.staticEntry = local_event->staticEntry;
+
+ ixEthDBAdd(&recordTemplate, triggerPorts);
+
+ IX_ETH_DB_EVENTS_TRACE("DB: (Events) Added record on port %d\n", local_event->portID);
+
+ break;
+
+ case IX_ETH_DB_REMOVE_FILTERING_RECORD:
+ /* remove record */
+ memset(&recordTemplate, 0, sizeof (recordTemplate));
+ memcpy(recordTemplate.macAddress, local_event->macAddr.macAddress, sizeof (IxEthDBMacAddr));
+
+ recordTemplate.type = IX_ETH_DB_FILTERING_RECORD | IX_ETH_DB_FILTERING_VLAN_RECORD;
+
+ ixEthDBRemove(&recordTemplate, triggerPorts);
+
+ IX_ETH_DB_EVENTS_TRACE("DB: (Events) Removed record on port %d\n", local_event->portID);
+
+ break;
+
+ default:
+ /* can't handle/not interested in this event type */
+ ERROR_LOG("DB: (Events) Event processor received an unknown event type (0x%X)\n", local_event->eventType);
+
+ return;
+ }
+}
+
+/**
+ * @brief asynchronously adds a filtering record
+ * by posting an ADD_FILTERING_RECORD event to the event queue
+ *
+ * @param macAddr MAC address of the new record
+ * @param portID port ID of the new record
+ * @param staticEntry TRUE if record is static, FALSE if dynamic
+ *
+ * @return IX_ETH_DB_SUCCESS if the event creation was
+ * successfull or IX_ETH_DB_BUSY if the event queue is full
+ *
+ * @internal
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBTriggerAddPortUpdate(IxEthDBMacAddr *macAddr, IxEthDBPortId portID, BOOL staticEntry)
+{
+ MacDescriptor reference;
+
+ TEST_FIXTURE_INCREMENT_DB_CORE_ACCESS_COUNTER;
+
+ /* fill search fields */
+ memcpy(reference.macAddress, macAddr, sizeof (IxEthDBMacAddr));
+ reference.portID = portID;
+
+ /* set acceptable record types */
+ reference.type = IX_ETH_DB_ALL_FILTERING_RECORDS;
+
+ if (ixEthDBPeekHashEntry(&dbHashtable, IX_ETH_DB_MAC_PORT_KEY, &reference) == IX_ETH_DB_SUCCESS)
+ {
+ /* already have an identical record */
+ return IX_ETH_DB_SUCCESS;
+ }
+ else
+ {
+ return ixEthDBTriggerPortUpdate(IX_ETH_DB_ADD_FILTERING_RECORD, macAddr, portID, staticEntry);
+ }
+}
+
+/**
+ * @brief asynchronously removes a filtering record
+ * by posting a REMOVE_FILTERING_RECORD event to the event queue
+ *
+ * @param macAddr MAC address of the record to remove
+ * @param portID port ID of the record to remove
+ *
+ * @return IX_ETH_DB_SUCCESS if the event creation was
+ * successfull or IX_ETH_DB_BUSY if the event queue is full
+ *
+ * @internal
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBTriggerRemovePortUpdate(IxEthDBMacAddr *macAddr, IxEthDBPortId portID)
+{
+ if (ixEthDBPeek(macAddr, IX_ETH_DB_ALL_FILTERING_RECORDS) != IX_ETH_DB_NO_SUCH_ADDR)
+ {
+ return ixEthDBTriggerPortUpdate(IX_ETH_DB_REMOVE_FILTERING_RECORD, macAddr, portID, FALSE);
+ }
+ else
+ {
+ return IX_ETH_DB_NO_SUCH_ADDR;
+ }
+}
+
+/**
+ * @brief adds an ADD or REMOVE event to the main event queue
+ *
+ * @param eventType event type - IX_ETH_DB_ADD_FILTERING_RECORD
+ * to add and IX_ETH_DB_REMOVE_FILTERING_RECORD to remove a
+ * record.
+ *
+ * @return IX_ETH_DB_SUCCESS if the event was successfully
+ * sent or IX_ETH_DB_BUSY if the event queue is full
+ *
+ * @internal
+ */
+IX_ETH_DB_PRIVATE
+IxEthDBStatus ixEthDBTriggerPortUpdate(UINT32 eventType, IxEthDBMacAddr *macAddr, IxEthDBPortId portID, BOOL staticEntry)
+{
+ UINT32 intLockKey;
+
+ /* lock interrupts to protect queue */
+ intLockKey = ixOsalIrqLock();
+
+ if (CAN_ENQUEUE(&eventQueue))
+ {
+ PortEvent *queueEvent = QUEUE_HEAD(&eventQueue);
+
+ /* update fields on the queue */
+ memcpy(queueEvent->macAddr.macAddress, macAddr->macAddress, sizeof (IxEthDBMacAddr));
+
+ queueEvent->eventType = eventType;
+ queueEvent->portID = portID;
+ queueEvent->staticEntry = staticEntry;
+
+ PUSH_UPDATE_QUEUE(&eventQueue);
+
+ /* imcrement event queue semaphore */
+ ixOsalSemaphorePost(&eventQueueSemaphore);
+
+ /* unlock interrupts */
+ ixOsalIrqUnlock(intLockKey);
+
+ return IX_ETH_DB_SUCCESS;
+ }
+ else /* event queue full */
+ {
+ /* unlock interrupts */
+ ixOsalIrqUnlock(intLockKey);
+
+ return IX_ETH_DB_BUSY;
+ }
+}
+
+/**
+ * @brief Locks learning tree updates and port disable
+ *
+ *
+ * This function locks portUpdateLock single mutex. It is primarily used
+ * to avoid executing 'port disable' during ELT maintenance.
+ *
+ * @internal
+ */
+IX_ETH_DB_PUBLIC
+void ixEthDBUpdateLock(void)
+{
+ ixOsalMutexLock(&portUpdateLock, IX_OSAL_WAIT_FOREVER);
+}
+
+/**
+ * @brief Unlocks learning tree updates and port disable
+ *
+ *
+ * This function unlocks a portUpdateLock mutex. It is primarily used
+ * to avoid executing 'port disable' during ELT maintenance.
+ *
+ * @internal
+ */
+IX_ETH_DB_PUBLIC
+void ixEthDBUpdateUnlock(void)
+{
+ ixOsalMutexUnlock(&portUpdateLock);
+}
+
diff --git a/cpu/ixp/npe/IxEthDBFeatures.c b/cpu/ixp/npe/IxEthDBFeatures.c
new file mode 100644
index 0000000000..7a58d268ca
--- /dev/null
+++ b/cpu/ixp/npe/IxEthDBFeatures.c
@@ -0,0 +1,662 @@
+/**
+ * @file IxEthDBFeatures.c
+ *
+ * @brief Implementation of the EthDB feature control API
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+#include "IxNpeDl.h"
+#include "IxEthDBQoS.h"
+#include "IxEthDB_p.h"
+
+/**
+ * @brief scans the capabilities of the loaded NPE images
+ *
+ * This function MUST be called by the ixEthDBInit() function.
+ * No EthDB features (including learning and filtering) are enabled
+ * before this function is called.
+ *
+ * @return none
+ *
+ * @internal
+ */
+IX_ETH_DB_PUBLIC
+void ixEthDBFeatureCapabilityScan(void)
+{
+ IxNpeDlImageId imageId, npeAImageId;
+ IxEthDBPortId portIndex;
+ PortInfo *portInfo;
+ IxEthDBPriorityTable defaultPriorityTable;
+ IX_STATUS result;
+ UINT32 queueIndex;
+ UINT32 queueStructureIndex;
+ UINT32 trafficClassDefinitionIndex;
+
+ /* read version of NPE A - required to set the AQM queues for B and C */
+ npeAImageId.functionalityId = 0;
+ ixNpeDlLoadedImageGet(IX_NPEDL_NPEID_NPEA, &npeAImageId);
+
+ for (portIndex = 0 ; portIndex < IX_ETH_DB_NUMBER_OF_PORTS ; portIndex++)
+ {
+ IxNpeMhMessage msg;
+
+ portInfo = &ixEthDBPortInfo[portIndex];
+
+ /* check and bypass if NPE B or C is fused out */
+ if (ixEthDBSingleEthNpeCheck(portIndex) != IX_ETH_DB_SUCCESS) continue;
+
+ /* all ports are capable of LEARNING by default */
+ portInfo->featureCapability |= IX_ETH_DB_LEARNING;
+ portInfo->featureStatus |= IX_ETH_DB_LEARNING;
+
+ if (ixEthDBPortDefinitions[portIndex].type == IX_ETH_NPE)
+ {
+
+ if (ixNpeDlLoadedImageGet(IX_ETH_DB_PORT_ID_TO_NPE(portIndex), &imageId) != IX_SUCCESS)
+ {
+ WARNING_LOG("DB: (FeatureScan) NpeDl did not provide the image ID for NPE port %d\n", portIndex);
+ }
+ else
+ {
+ /* initialize and empty NPE response mutex */
+ ixOsalMutexInit(&portInfo->npeAckLock);
+ ixOsalMutexLock(&portInfo->npeAckLock, IX_OSAL_WAIT_FOREVER);
+
+ /* check NPE response to GetStatus */
+ msg.data[0] = IX_ETHNPE_NPE_GETSTATUS << 24;
+ msg.data[1] = 0;
+ IX_ETHDB_SEND_NPE_MSG(IX_ETH_DB_PORT_ID_TO_NPE(portIndex), msg, result);
+ if (result != IX_SUCCESS)
+ {
+ WARNING_LOG("DB: (FeatureScan) warning, could not send message to the NPE\n");
+ continue;
+ }
+
+
+ if (imageId.functionalityId == 0x00
+ || imageId.functionalityId == 0x03
+ || imageId.functionalityId == 0x04
+ || imageId.functionalityId == 0x80)
+ {
+ portInfo->featureCapability |= IX_ETH_DB_FILTERING;
+ portInfo->featureCapability |= IX_ETH_DB_FIREWALL;
+ portInfo->featureCapability |= IX_ETH_DB_SPANNING_TREE_PROTOCOL;
+ }
+ else if (imageId.functionalityId == 0x01
+ || imageId.functionalityId == 0x81)
+ {
+ portInfo->featureCapability |= IX_ETH_DB_FILTERING;
+ portInfo->featureCapability |= IX_ETH_DB_FIREWALL;
+ portInfo->featureCapability |= IX_ETH_DB_SPANNING_TREE_PROTOCOL;
+ portInfo->featureCapability |= IX_ETH_DB_VLAN_QOS;
+ }
+ else if (imageId.functionalityId == 0x02
+ || imageId.functionalityId == 0x82)
+ {
+ portInfo->featureCapability |= IX_ETH_DB_WIFI_HEADER_CONVERSION;
+ portInfo->featureCapability |= IX_ETH_DB_FIREWALL;
+ portInfo->featureCapability |= IX_ETH_DB_SPANNING_TREE_PROTOCOL;
+ portInfo->featureCapability |= IX_ETH_DB_VLAN_QOS;
+ }
+
+ /* reset AQM queues */
+ memset(portInfo->ixEthDBTrafficClassAQMAssignments, 0, sizeof (portInfo->ixEthDBTrafficClassAQMAssignments));
+
+ /* ensure there's at least one traffic class record in the definition table, otherwise we have no default case, hence no queues */
+ IX_ENSURE(sizeof (ixEthDBTrafficClassDefinitions) != 0, "DB: no traffic class definitions found, check IxEthDBQoS.h");
+
+ /* find the traffic class definition index compatible with the current NPE A functionality ID */
+ for (trafficClassDefinitionIndex = 0 ;
+ trafficClassDefinitionIndex < sizeof (ixEthDBTrafficClassDefinitions) / sizeof (ixEthDBTrafficClassDefinitions[0]);
+ trafficClassDefinitionIndex++)
+ {
+ if (ixEthDBTrafficClassDefinitions[trafficClassDefinitionIndex][IX_ETH_DB_NPE_A_FUNCTIONALITY_ID_INDEX] == npeAImageId.functionalityId)
+ {
+ /* found it */
+ break;
+ }
+ }
+
+ /* select the default case if we went over the array boundary */
+ if (trafficClassDefinitionIndex == sizeof (ixEthDBTrafficClassDefinitions) / sizeof (ixEthDBTrafficClassDefinitions[0]))
+ {
+ trafficClassDefinitionIndex = 0; /* the first record is the default case */
+ }
+
+ /* select queue assignment structure based on the traffic class configuration index */
+ queueStructureIndex = ixEthDBTrafficClassDefinitions[trafficClassDefinitionIndex][IX_ETH_DB_QUEUE_ASSIGNMENT_INDEX];
+
+ /* only traffic class 0 is active at initialization time */
+ portInfo->ixEthDBTrafficClassCount = 1;
+
+ /* enable port, VLAN and Firewall feature bits to initialize QoS/VLAN/Firewall configuration */
+ portInfo->featureStatus |= IX_ETH_DB_VLAN_QOS;
+ portInfo->featureStatus |= IX_ETH_DB_FIREWALL;
+ portInfo->enabled = TRUE;
+
+#define CONFIG_WITH_VLAN /* test-only: VLAN support not included to save space!!! */
+#ifdef CONFIG_WITH_VLAN /* test-only: VLAN support not included to save space!!! */
+ /* set VLAN initial configuration (permissive) */
+ if ((portInfo->featureCapability & IX_ETH_DB_VLAN_QOS) != 0) /* QoS-enabled image */
+ {
+ /* QoS capable */
+ portInfo->ixEthDBTrafficClassAvailable = ixEthDBTrafficClassDefinitions[trafficClassDefinitionIndex][IX_ETH_DB_TRAFFIC_CLASS_COUNT_INDEX];
+
+ /* set AQM queues */
+ for (queueIndex = 0 ; queueIndex < IX_IEEE802_1Q_QOS_PRIORITY_COUNT ; queueIndex++)
+ {
+ portInfo->ixEthDBTrafficClassAQMAssignments[queueIndex] = ixEthDBQueueAssignments[queueStructureIndex][queueIndex];
+ }
+
+ /* set default PVID (0) and default traffic class 0 */
+ ixEthDBPortVlanTagSet(portIndex, 0);
+
+ /* enable reception of all frames */
+ ixEthDBAcceptableFrameTypeSet(portIndex, IX_ETH_DB_ACCEPT_ALL_FRAMES);
+
+ /* clear full VLAN membership */
+ ixEthDBPortVlanMembershipRangeRemove(portIndex, 0, IX_ETH_DB_802_1Q_MAX_VLAN_ID);
+
+ /* clear TTI table - no VLAN tagged frames will be transmitted */
+ ixEthDBEgressVlanRangeTaggingEnabledSet(portIndex, 0, 4094, FALSE);
+
+ /* set membership on 0, otherwise no Tx or Rx is working */
+ ixEthDBPortVlanMembershipAdd(portIndex, 0);
+ }
+ else /* QoS not available in this image */
+#endif /* test-only */
+ {
+ /* initialize traffic class availability (only class 0 is available) */
+ portInfo->ixEthDBTrafficClassAvailable = 1;
+
+ /* point all AQM queues to traffic class 0 */
+ for (queueIndex = 0 ; queueIndex < IX_IEEE802_1Q_QOS_PRIORITY_COUNT ; queueIndex++)
+ {
+ portInfo->ixEthDBTrafficClassAQMAssignments[queueIndex] =
+ ixEthDBQueueAssignments[queueStructureIndex][0];
+ }
+ }
+
+#ifdef CONFIG_WITH_VLAN /* test-only: VLAN support not included to save space!!! */
+ /* download priority mapping table and Rx queue configuration */
+ memset (defaultPriorityTable, 0, sizeof (defaultPriorityTable));
+ ixEthDBPriorityMappingTableSet(portIndex, defaultPriorityTable);
+#endif
+
+ /* by default we turn off invalid source MAC address filtering */
+ ixEthDBFirewallInvalidAddressFilterEnable(portIndex, FALSE);
+
+ /* disable port, VLAN, Firewall feature bits */
+ portInfo->featureStatus &= ~IX_ETH_DB_VLAN_QOS;
+ portInfo->featureStatus &= ~IX_ETH_DB_FIREWALL;
+ portInfo->enabled = FALSE;
+
+ /* enable filtering by default if present */
+ if ((portInfo->featureCapability & IX_ETH_DB_FILTERING) != 0)
+ {
+ portInfo->featureStatus |= IX_ETH_DB_FILTERING;
+ }
+ }
+ }
+ }
+}
+
+/**
+ * @brief returns the capability of a port
+ *
+ * @param portID ID of the port
+ * @param featureSet location to store the port capability in
+ *
+ * This function will save the capability set of the given port
+ * into the given location. Capabilities are bit-ORed, each representing
+ * a bit of the feature set.
+ *
+ * Note that this function is documented in the main component
+ * public header file, IxEthDB.h.
+ *
+ * @return IX_ETH_DB_SUCCESS if the operation completed successfully
+ * or IX_ETH_DB_INVALID_PORT if the given port is invalid
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBFeatureCapabilityGet(IxEthDBPortId portID, IxEthDBFeature *featureSet)
+{
+ IX_ETH_DB_CHECK_PORT_INITIALIZED(portID);
+
+ IX_ETH_DB_CHECK_REFERENCE(featureSet);
+
+ *featureSet = ixEthDBPortInfo[portID].featureCapability;
+
+ return IX_ETH_DB_SUCCESS;
+}
+
+/**
+ * @brief enables or disables a port capability
+ *
+ * @param portID ID of the port
+ * @param feature feature to enable or disable
+ * @param enabled TRUE to enable the selected feature or FALSE to disable it
+ *
+ * Note that this function is documented in the main component
+ * header file, IxEthDB.h.
+ *
+ * @return IX_ETH_DB_SUCCESS if the operation completed
+ * successfully or an appropriate error message otherwise
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBFeatureEnable(IxEthDBPortId portID, IxEthDBFeature feature, BOOL enable)
+{
+ PortInfo *portInfo;
+ IxEthDBPriorityTable defaultPriorityTable;
+ IxEthDBVlanSet vlanSet;
+ IxEthDBStatus status = IX_ETH_DB_SUCCESS;
+ BOOL portEnabled;
+
+ IX_ETH_DB_CHECK_PORT_INITIALIZED(portID);
+
+ portInfo = &ixEthDBPortInfo[portID];
+ portEnabled = portInfo->enabled;
+
+ /* check that only one feature is selected */
+ if (!ixEthDBCheckSingleBitValue(feature))
+ {
+ return IX_ETH_DB_FEATURE_UNAVAILABLE;
+ }
+
+ /* port capable of this feature? */
+ if ((portInfo->featureCapability & feature) == 0)
+ {
+ return IX_ETH_DB_FEATURE_UNAVAILABLE;
+ }
+
+ /* mutual exclusion between learning and WiFi header conversion */
+ if (enable && ((feature | portInfo->featureStatus) & (IX_ETH_DB_FILTERING | IX_ETH_DB_WIFI_HEADER_CONVERSION))
+ == (IX_ETH_DB_FILTERING | IX_ETH_DB_WIFI_HEADER_CONVERSION))
+ {
+ return IX_ETH_DB_NO_PERMISSION;
+ }
+
+ /* learning must be enabled before filtering */
+ if (enable && (feature == IX_ETH_DB_FILTERING) && ((portInfo->featureStatus & IX_ETH_DB_LEARNING) == 0))
+ {
+ return IX_ETH_DB_NO_PERMISSION;
+ }
+
+ /* filtering must be disabled before learning */
+ if (!enable && (feature == IX_ETH_DB_LEARNING) && ((portInfo->featureStatus & IX_ETH_DB_FILTERING) != 0))
+ {
+ return IX_ETH_DB_NO_PERMISSION;
+ }
+
+ /* redundant enabling or disabling */
+ if ((!enable && ((portInfo->featureStatus & feature) == 0))
+ || (enable && ((portInfo->featureStatus & feature) != 0)))
+ {
+ /* do nothing */
+ return IX_ETH_DB_SUCCESS;
+ }
+
+ /* force port enabled */
+ portInfo->enabled = TRUE;
+
+ if (enable)
+ {
+ /* turn on enable bit */
+ portInfo->featureStatus |= feature;
+
+#ifdef CONFIG_WITH_VLAN /* test-only: VLAN support not included to save space!!! */
+ /* if this is VLAN/QoS set the default priority table */
+ if (feature == IX_ETH_DB_VLAN_QOS)
+ {
+ /* turn on VLAN/QoS (most permissive mode):
+ - set default 802.1Q priority mapping table, in accordance to the
+ availability of traffic classes
+ - set the acceptable frame filter to accept all
+ - set the Ingress tagging mode to pass-through
+ - set full VLAN membership list
+ - set full TTI table
+ - set the default 802.1Q tag to 0 (VLAN ID 0, Pri 0, CFI 0)
+ - enable TPID port extraction
+ */
+
+ portInfo->ixEthDBTrafficClassCount = portInfo->ixEthDBTrafficClassAvailable;
+
+ /* set default 802.1Q priority mapping table - note that C indexing starts from 0, so we substract 1 here */
+ memcpy (defaultPriorityTable,
+ (const void *) ixEthIEEE802_1QUserPriorityToTrafficClassMapping[portInfo->ixEthDBTrafficClassCount - 1],
+ sizeof (defaultPriorityTable));
+
+ /* update priority mapping and AQM queue assignments */
+ status = ixEthDBPriorityMappingTableSet(portID, defaultPriorityTable);
+
+ if (status == IX_ETH_DB_SUCCESS)
+ {
+ status = ixEthDBAcceptableFrameTypeSet(portID, IX_ETH_DB_ACCEPT_ALL_FRAMES);
+ }
+
+ if (status == IX_ETH_DB_SUCCESS)
+ {
+ status = ixEthDBIngressVlanTaggingEnabledSet(portID, IX_ETH_DB_PASS_THROUGH);
+ }
+
+ /* set membership and TTI tables */
+ memset (vlanSet, 0xFF, sizeof (vlanSet));
+
+ if (status == IX_ETH_DB_SUCCESS)
+ {
+ /* use the internal function to bypass PVID check */
+ status = ixEthDBPortVlanTableSet(portID, portInfo->vlanMembership, vlanSet);
+ }
+
+ if (status == IX_ETH_DB_SUCCESS)
+ {
+ /* use the internal function to bypass PVID check */
+ status = ixEthDBPortVlanTableSet(portID, portInfo->transmitTaggingInfo, vlanSet);
+ }
+
+ /* reset the PVID */
+ if (status == IX_ETH_DB_SUCCESS)
+ {
+ status = ixEthDBPortVlanTagSet(portID, 0);
+ }
+
+ /* enable TPID port extraction */
+ if (status == IX_ETH_DB_SUCCESS)
+ {
+ status = ixEthDBVlanPortExtractionEnable(portID, TRUE);
+ }
+ }
+ else if (feature == IX_ETH_DB_FIREWALL)
+#endif
+ {
+ /* firewall starts in black-list mode unless otherwise configured before *
+ * note that invalid source MAC address filtering is disabled by default */
+ if (portInfo->firewallMode != IX_ETH_DB_FIREWALL_BLACK_LIST
+ && portInfo->firewallMode != IX_ETH_DB_FIREWALL_WHITE_LIST)
+ {
+ status = ixEthDBFirewallModeSet(portID, IX_ETH_DB_FIREWALL_BLACK_LIST);
+
+ if (status == IX_ETH_DB_SUCCESS)
+ {
+ status = ixEthDBFirewallInvalidAddressFilterEnable(portID, FALSE);
+ }
+ }
+ }
+
+ if (status != IX_ETH_DB_SUCCESS)
+ {
+ /* checks failed, disable */
+ portInfo->featureStatus &= ~feature;
+ }
+ }
+ else
+ {
+ /* turn off features */
+ if (feature == IX_ETH_DB_FIREWALL)
+ {
+ /* turning off the firewall is equivalent to:
+ - set to black-list mode
+ - clear all the entries and download the new table
+ - turn off the invalid source address checking
+ */
+
+ status = ixEthDBDatabaseClear(portID, IX_ETH_DB_FIREWALL_RECORD);
+
+ if (status == IX_ETH_DB_SUCCESS)
+ {
+ status = ixEthDBFirewallModeSet(portID, IX_ETH_DB_FIREWALL_BLACK_LIST);
+ }
+
+ if (status == IX_ETH_DB_SUCCESS)
+ {
+ status = ixEthDBFirewallInvalidAddressFilterEnable(portID, FALSE);
+ }
+
+ if (status == IX_ETH_DB_SUCCESS)
+ {
+ status = ixEthDBFirewallTableDownload(portID);
+ }
+ }
+ else if (feature == IX_ETH_DB_WIFI_HEADER_CONVERSION)
+ {
+ /* turn off header conversion */
+ status = ixEthDBDatabaseClear(portID, IX_ETH_DB_WIFI_RECORD);
+
+ if (status == IX_ETH_DB_SUCCESS)
+ {
+ status = ixEthDBWiFiConversionTableDownload(portID);
+ }
+ }
+#ifdef CONFIG_WITH_VLAN /* test-only: VLAN support not included to save space!!! */
+ else if (feature == IX_ETH_DB_VLAN_QOS)
+ {
+ /* turn off VLAN/QoS:
+ - set a priority mapping table with one traffic class
+ - set the acceptable frame filter to accept all
+ - set the Ingress tagging mode to pass-through
+ - clear the VLAN membership list
+ - clear the TTI table
+ - set the default 802.1Q tag to 0 (VLAN ID 0, Pri 0, CFI 0)
+ - disable TPID port extraction
+ */
+
+ /* initialize all => traffic class 0 priority mapping table */
+ memset (defaultPriorityTable, 0, sizeof (defaultPriorityTable));
+ portInfo->ixEthDBTrafficClassCount = 1;
+ status = ixEthDBPriorityMappingTableSet(portID, defaultPriorityTable);
+
+ if (status == IX_ETH_DB_SUCCESS)
+ {
+ status = ixEthDBAcceptableFrameTypeSet(portID, IX_ETH_DB_ACCEPT_ALL_FRAMES);
+ }
+
+ if (status == IX_ETH_DB_SUCCESS)
+ {
+ status = ixEthDBIngressVlanTaggingEnabledSet(portID, IX_ETH_DB_PASS_THROUGH);
+ }
+
+ /* clear membership and TTI tables */
+ memset (vlanSet, 0, sizeof (vlanSet));
+
+ if (status == IX_ETH_DB_SUCCESS)
+ {
+ /* use the internal function to bypass PVID check */
+ status = ixEthDBPortVlanTableSet(portID, portInfo->vlanMembership, vlanSet);
+ }
+
+ if (status == IX_ETH_DB_SUCCESS)
+ {
+ /* use the internal function to bypass PVID check */
+ status = ixEthDBPortVlanTableSet(portID, portInfo->transmitTaggingInfo, vlanSet);
+ }
+
+ /* reset the PVID */
+ if (status == IX_ETH_DB_SUCCESS)
+ {
+ status = ixEthDBPortVlanTagSet(portID, 0);
+ }
+
+ /* disable TPID port extraction */
+ if (status == IX_ETH_DB_SUCCESS)
+ {
+ status = ixEthDBVlanPortExtractionEnable(portID, FALSE);
+ }
+ }
+#endif
+
+ if (status == IX_ETH_DB_SUCCESS)
+ {
+ /* checks passed, disable */
+ portInfo->featureStatus &= ~feature;
+ }
+ }
+
+ /* restore port enabled state */
+ portInfo->enabled = portEnabled;
+
+ return status;
+}
+
+/**
+ * @brief returns the status of a feature
+ *
+ * @param portID port ID
+ * @param present location to store a boolean value indicating
+ * if the feature is present (TRUE) or not (FALSE)
+ * @param enabled location to store a booleam value indicating
+ * if the feature is present (TRUE) or not (FALSE)
+ *
+ * Note that this function is documented in the main component
+ * header file, IxEthDB.h.
+ *
+ * @return IX_ETH_DB_SUCCESS if the operation completed
+ * successfully or an appropriate error message otherwise
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBFeatureStatusGet(IxEthDBPortId portID, IxEthDBFeature feature, BOOL *present, BOOL *enabled)
+{
+ PortInfo *portInfo;
+
+ IX_ETH_DB_CHECK_PORT(portID);
+
+ IX_ETH_DB_CHECK_REFERENCE(present);
+
+ IX_ETH_DB_CHECK_REFERENCE(enabled);
+
+ portInfo = &ixEthDBPortInfo[portID];
+
+ *present = (portInfo->featureCapability & feature) != 0;
+ *enabled = (portInfo->featureStatus & feature) != 0;
+
+ return IX_ETH_DB_SUCCESS;
+}
+
+/**
+ * @brief returns the value of an EthDB property
+ *
+ * @param portID ID of the port
+ * @param feature feature owning the property
+ * @param property ID of the property
+ * @param type location to store the property type into
+ * @param value location to store the property value into
+ *
+ * Note that this function is documented in the main component
+ * header file, IxEthDB.h.
+ *
+ * @return IX_ETH_DB_SUCCESS if the operation completed
+ * successfully or an appropriate error message otherwise
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBFeaturePropertyGet(IxEthDBPortId portID, IxEthDBFeature feature, IxEthDBProperty property, IxEthDBPropertyType *type, void *value)
+{
+ IX_ETH_DB_CHECK_PORT_EXISTS(portID);
+
+ IX_ETH_DB_CHECK_REFERENCE(type);
+
+ IX_ETH_DB_CHECK_REFERENCE(value);
+
+ if (feature == IX_ETH_DB_VLAN_QOS)
+ {
+ if (property == IX_ETH_DB_QOS_TRAFFIC_CLASS_COUNT_PROPERTY)
+ {
+ * (UINT32 *) value = ixEthDBPortInfo[portID].ixEthDBTrafficClassCount;
+ *type = IX_ETH_DB_INTEGER_PROPERTY;
+
+ return IX_ETH_DB_SUCCESS;
+ }
+ else if (property >= IX_ETH_DB_QOS_TRAFFIC_CLASS_0_RX_QUEUE_PROPERTY
+ && property <= IX_ETH_DB_QOS_TRAFFIC_CLASS_7_RX_QUEUE_PROPERTY)
+ {
+ UINT32 classDelta = property - IX_ETH_DB_QOS_TRAFFIC_CLASS_0_RX_QUEUE_PROPERTY;
+
+ if (classDelta >= ixEthDBPortInfo[portID].ixEthDBTrafficClassCount)
+ {
+ return IX_ETH_DB_FAIL;
+ }
+
+ * (UINT32 *) value = ixEthDBPortInfo[portID].ixEthDBTrafficClassAQMAssignments[classDelta];
+ *type = IX_ETH_DB_INTEGER_PROPERTY;
+
+ return IX_ETH_DB_SUCCESS;
+ }
+ }
+
+ return IX_ETH_DB_INVALID_ARG;
+}
+
+/**
+ * @brief sets the value of an EthDB property
+ *
+ * @param portID ID of the port
+ * @param feature feature owning the property
+ * @param property ID of the property
+ * @param value location containing the property value
+ *
+ * This function implements a private property intended
+ * only for EthAcc usage. Upon setting the IX_ETH_DB_QOS_QUEUE_CONFIGURATION_COMPLETE
+ * property (the value is ignored), the availability of traffic classes is
+ * frozen to whatever traffic class structure is currently in use.
+ * This means that if VLAN_QOS has been enabled before EthAcc
+ * initialization then all the defined traffic classes will be available;
+ * otherwise only one traffic class (0) will be available.
+ *
+ * Note that this function is documented in the main component
+ * header file, IxEthDB.h as not accepting any parameters. The
+ * current implementation is only intended for the private use of EthAcc.
+ *
+ * Also note that once this function is called the effect is irreversible,
+ * unless EthDB is complete unloaded and re-initialized.
+ *
+ * @return IX_ETH_DB_INVALID_ARG (no read-write properties are
+ * supported in this release)
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBFeaturePropertySet(IxEthDBPortId portID, IxEthDBFeature feature, IxEthDBProperty property, void *value)
+{
+ IX_ETH_DB_CHECK_PORT_EXISTS(portID);
+
+ if ((feature == IX_ETH_DB_VLAN_QOS) && (property == IX_ETH_DB_QOS_QUEUE_CONFIGURATION_COMPLETE))
+ {
+ ixEthDBPortInfo[portID].ixEthDBTrafficClassAvailable = ixEthDBPortInfo[portID].ixEthDBTrafficClassCount;
+
+ return IX_ETH_DB_SUCCESS;
+ }
+
+ return IX_ETH_DB_INVALID_ARG;
+}
diff --git a/cpu/ixp/npe/IxEthDBFirewall.c b/cpu/ixp/npe/IxEthDBFirewall.c
new file mode 100644
index 0000000000..eb46174b6c
--- /dev/null
+++ b/cpu/ixp/npe/IxEthDBFirewall.c
@@ -0,0 +1,266 @@
+/**
+ * @file IxEthDBFirewall.c
+ *
+ * @brief Implementation of the firewall API
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+
+#include "IxEthDB_p.h"
+
+/**
+ * @brief updates the NPE firewall operating mode and
+ * firewall address table
+ *
+ * @param portID ID of the port
+ * @param epDelta initial entry point for binary searches (NPE optimization)
+ * @param address address of the firewall MAC address table
+ *
+ * This function will send a message to the NPE configuring the
+ * firewall mode (white list or black list), invalid source
+ * address filtering and downloading a new MAC address database
+ * to be used for firewall matching.
+ *
+ * @return IX_ETH_DB_SUCCESS if the operation completed
+ * successfully or IX_ETH_DB_FAIL otherwise
+ *
+ * @internal
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBFirewallUpdate(IxEthDBPortId portID, void *address, UINT32 epDelta)
+{
+ IxNpeMhMessage message;
+ IX_STATUS result;
+
+ UINT32 mode = 0;
+ PortInfo *portInfo = &ixEthDBPortInfo[portID];
+
+ mode = (portInfo->srcAddressFilterEnabled != FALSE) << 1 | (portInfo->firewallMode == IX_ETH_DB_FIREWALL_WHITE_LIST);
+
+ FILL_SETFIREWALLMODE_MSG(message,
+ IX_ETH_DB_PORT_ID_TO_NPE_LOGICAL_ID(portID),
+ epDelta,
+ mode,
+ IX_OSAL_MMU_VIRT_TO_PHYS(address));
+
+ IX_ETHDB_SEND_NPE_MSG(IX_ETH_DB_PORT_ID_TO_NPE(portID), message, result);
+
+ return result;
+}
+
+/**
+ * @brief configures the firewall white list/black list
+ * access mode
+ *
+ * @param portID ID of the port
+ * @param mode firewall filtering mode (IX_ETH_DB_FIREWALL_WHITE_LIST
+ * or IX_ETH_DB_FIREWALL_BLACK_LIST)
+ *
+ * Note that this function is documented in the main component
+ * header file, IxEthDB.h.
+ *
+ * @return IX_ETH_DB_SUCCESS if the operation completed
+ * successfully or an appropriate error message otherwise
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBFirewallModeSet(IxEthDBPortId portID, IxEthDBFirewallMode mode)
+{
+ IX_ETH_DB_CHECK_PORT(portID);
+
+ IX_ETH_DB_CHECK_SINGLE_NPE(portID);
+
+ IX_ETH_DB_CHECK_FEATURE(portID, IX_ETH_DB_FIREWALL);
+
+ if (mode != IX_ETH_DB_FIREWALL_WHITE_LIST
+ && mode != IX_ETH_DB_FIREWALL_BLACK_LIST)
+ {
+ return IX_ETH_DB_INVALID_ARG;
+ }
+
+ ixEthDBPortInfo[portID].firewallMode = mode;
+
+ return ixEthDBFirewallTableDownload(portID);
+}
+
+/**
+ * @brief enables or disables the invalid source MAC address filter
+ *
+ * @param portID ID of the port
+ * @param enable TRUE to enable invalid source MAC address filtering
+ * or FALSE to disable it
+ *
+ * The invalid source MAC address filter will discard, when enabled,
+ * frames whose source MAC address is a multicast or the broadcast MAC
+ * address.
+ *
+ * Note that this function is documented in the main component
+ * header file, IxEthDB.h.
+ *
+ * @return IX_ETH_DB_SUCCESS if the operation completed
+ * successfully or an appropriate error message otherwise
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBFirewallInvalidAddressFilterEnable(IxEthDBPortId portID, BOOL enable)
+{
+ IX_ETH_DB_CHECK_PORT(portID);
+
+ IX_ETH_DB_CHECK_SINGLE_NPE(portID);
+
+ IX_ETH_DB_CHECK_FEATURE(portID, IX_ETH_DB_FIREWALL);
+
+ ixEthDBPortInfo[portID].srcAddressFilterEnabled = enable;
+
+ return ixEthDBFirewallTableDownload(portID);
+}
+
+/**
+ * @brief adds a firewall record
+ *
+ * @param portID ID of the port
+ * @param macAddr MAC address of the new record
+ *
+ * This function will add a new firewall record
+ * on the specified port, using the specified
+ * MAC address. If the record already exists this
+ * function will silently return IX_ETH_DB_SUCCESS,
+ * although no duplicate records are added.
+ *
+ * Note that this function is documented in the main
+ * component header file, IxEthDB.h.
+ *
+ * @return IX_ETH_DB_SUCCESS if the operation completed
+ * successfully or an appropriate error message otherwise
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBFirewallEntryAdd(IxEthDBPortId portID, IxEthDBMacAddr *macAddr)
+{
+ MacDescriptor recordTemplate;
+
+ IX_ETH_DB_CHECK_PORT(portID);
+
+ IX_ETH_DB_CHECK_SINGLE_NPE(portID);
+
+ IX_ETH_DB_CHECK_REFERENCE(macAddr);
+
+ IX_ETH_DB_CHECK_FEATURE(portID, IX_ETH_DB_FIREWALL);
+
+ memcpy(recordTemplate.macAddress, macAddr, sizeof (IxEthDBMacAddr));
+
+ recordTemplate.type = IX_ETH_DB_FIREWALL_RECORD;
+ recordTemplate.portID = portID;
+
+ return ixEthDBAdd(&recordTemplate, NULL);
+}
+
+/**
+ * @brief removes a firewall record
+ *
+ * @param portID ID of the port
+ * @param macAddr MAC address of the record to remove
+ *
+ * This function will attempt to remove a firewall
+ * record from the given port, using the specified
+ * MAC address.
+ *
+ * Note that this function is documented in the main
+ * component header file, IxEthDB.h.
+ *
+ * @return IX_ETH_DB_SUCCESS if the operation completed
+ * successfully of an appropriate error message otherwise
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBFirewallEntryRemove(IxEthDBPortId portID, IxEthDBMacAddr *macAddr)
+{
+ MacDescriptor recordTemplate;
+
+ IX_ETH_DB_CHECK_PORT(portID);
+
+ IX_ETH_DB_CHECK_SINGLE_NPE(portID);
+
+ IX_ETH_DB_CHECK_REFERENCE(macAddr);
+
+ IX_ETH_DB_CHECK_FEATURE(portID, IX_ETH_DB_FIREWALL);
+
+ memcpy(recordTemplate.macAddress, macAddr, sizeof (IxEthDBMacAddr));
+
+ recordTemplate.type = IX_ETH_DB_FIREWALL_RECORD;
+ recordTemplate.portID = portID;
+
+ return ixEthDBRemove(&recordTemplate, NULL);
+}
+
+/**
+ * @brief downloads the firewall address table to an NPE
+ *
+ * @param portID ID of the port
+ *
+ * This function will download the firewall address table to
+ * an NPE port.
+ *
+ * Note that this function is documented in the main
+ * component header file, IxEthDB.h.
+ *
+ * @return IX_ETH_DB_SUCCESS if the operation completed
+ * successfully or IX_ETH_DB_FAIL otherwise
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBFirewallTableDownload(IxEthDBPortId portID)
+{
+ IxEthDBPortMap query;
+ IxEthDBStatus result;
+
+ IX_ETH_DB_CHECK_PORT(portID);
+
+ IX_ETH_DB_CHECK_SINGLE_NPE(portID);
+
+ IX_ETH_DB_CHECK_FEATURE(portID, IX_ETH_DB_FIREWALL);
+
+ SET_DEPENDENCY_MAP(query, portID);
+
+ ixEthDBUpdateLock();
+
+ ixEthDBPortInfo[portID].updateMethod.searchTree = ixEthDBQuery(NULL, query, IX_ETH_DB_FIREWALL_RECORD, MAX_FW_SIZE);
+
+ result = ixEthDBNPEUpdateHandler(portID, IX_ETH_DB_FIREWALL_RECORD);
+
+ ixEthDBUpdateUnlock();
+
+ return result;
+}
diff --git a/cpu/ixp/npe/IxEthDBHashtable.c b/cpu/ixp/npe/IxEthDBHashtable.c
new file mode 100644
index 0000000000..f1b18e6b48
--- /dev/null
+++ b/cpu/ixp/npe/IxEthDBHashtable.c
@@ -0,0 +1,642 @@
+/**
+ * @file ethHash.c
+ *
+ * @brief Hashtable implementation
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+
+#include "IxEthDB_p.h"
+#include "IxEthDBLocks_p.h"
+
+/**
+ * @addtogroup EthDB
+ *
+ * @{
+ */
+
+/**
+ * @brief initializes a hash table object
+ *
+ * @param hashTable uninitialized hash table structure
+ * @param numBuckets number of buckets to use
+ * @param entryHashFunction hash function used
+ * to hash entire hash node data block (for adding)
+ * @param matchFunctions array of match functions, indexed on type,
+ * used to differentiate records with the same hash value
+ * @param freeFunction function used to free node data blocks
+ *
+ * Initializes the given hash table object.
+ *
+ * @internal
+ */
+void ixEthDBInitHash(HashTable *hashTable,
+ UINT32 numBuckets,
+ HashFunction entryHashFunction,
+ MatchFunction *matchFunctions,
+ FreeFunction freeFunction)
+{
+ UINT32 bucketIndex;
+ UINT32 hashSize = numBuckets * sizeof(HashNode *);
+
+ /* entry hashing, matching and freeing methods */
+ hashTable->entryHashFunction = entryHashFunction;
+ hashTable->matchFunctions = matchFunctions;
+ hashTable->freeFunction = freeFunction;
+
+ /* buckets */
+ hashTable->numBuckets = numBuckets;
+
+ /* set to 0 all buckets */
+ memset(hashTable->hashBuckets, 0, hashSize);
+
+ /* init bucket locks - note that initially all mutexes are unlocked after MutexInit()*/
+ for (bucketIndex = 0 ; bucketIndex < numBuckets ; bucketIndex++)
+ {
+ ixOsalFastMutexInit(&hashTable->bucketLocks[bucketIndex]);
+ }
+}
+
+/**
+ * @brief adds an entry to the hash table
+ *
+ * @param hashTable hash table to add the entry to
+ * @param entry entry to add
+ *
+ * The entry will be hashed using the entry hashing function and added to the
+ * hash table, unless a locking blockage occurs, in which case the caller
+ * should retry.
+ *
+ * @retval IX_ETH_DB_SUCCESS if adding <i>entry</i> has succeeded
+ * @retval IX_ETH_DB_NOMEM if there's no memory left in the hash node pool
+ * @retval IX_ETH_DB_BUSY if there's a locking failure on the insertion path
+ *
+ * @internal
+ */
+IX_ETH_DB_PUBLIC IxEthDBStatus ixEthDBAddHashEntry(HashTable *hashTable, void *entry)
+{
+ UINT32 hashValue = hashTable->entryHashFunction(entry);
+ UINT32 bucketIndex = hashValue % hashTable->numBuckets;
+ HashNode *bucket = hashTable->hashBuckets[bucketIndex];
+ HashNode *newNode;
+
+ LockStack locks;
+
+ INIT_STACK(&locks);
+
+ /* lock bucket */
+ PUSH_LOCK(&locks, &hashTable->bucketLocks[bucketIndex]);
+
+ /* lock insertion element (first in chain), if any */
+ if (bucket != NULL)
+ {
+ PUSH_LOCK(&locks, &bucket->lock);
+ }
+
+ /* get new node */
+ newNode = ixEthDBAllocHashNode();
+
+ if (newNode == NULL)
+ {
+ /* unlock everything */
+ UNROLL_STACK(&locks);
+
+ return IX_ETH_DB_NOMEM;
+ }
+
+ /* init lock - note that mutexes are unlocked after MutexInit */
+ ixOsalFastMutexInit(&newNode->lock);
+
+ /* populate new link */
+ newNode->data = entry;
+
+ /* add to bucket */
+ newNode->next = bucket;
+ hashTable->hashBuckets[bucketIndex] = newNode;
+
+ /* unlock bucket and insertion point */
+ UNROLL_STACK(&locks);
+
+ return IX_ETH_DB_SUCCESS;
+}
+
+/**
+ * @brief removes an entry from the hashtable
+ *
+ * @param hashTable hash table to remove entry from
+ * @param keyType type of record key used for matching
+ * @param reference reference key used to identify the entry
+ *
+ * The reference key will be hashed using the key hashing function,
+ * the entry is searched using the hashed value and then examined
+ * against the reference entry using the match function. A positive
+ * match will trigger the deletion of the entry.
+ * Locking failures are reported and the caller should retry.
+ *
+ * @retval IX_ETH_DB_SUCCESS if the removal was successful
+ * @retval IX_ETH_DB_NO_SUCH_ADDR if the entry was not found
+ * @retval IX_ETH_DB_BUSY if a locking failure occured during the process
+ *
+ * @internal
+ */
+IxEthDBStatus ixEthDBRemoveHashEntry(HashTable *hashTable, int keyType, void *reference)
+{
+ UINT32 hashValue = hashTable->entryHashFunction(reference);
+ UINT32 bucketIndex = hashValue % hashTable->numBuckets;
+ HashNode *node = hashTable->hashBuckets[bucketIndex];
+ HashNode *previousNode = NULL;
+
+ LockStack locks;
+
+ INIT_STACK(&locks);
+
+ while (node != NULL)
+ {
+ /* try to lock node */
+ PUSH_LOCK(&locks, &node->lock);
+
+ if (hashTable->matchFunctions[keyType](reference, node->data))
+ {
+ /* found entry */
+ if (node->next != NULL)
+ {
+ PUSH_LOCK(&locks, &node->next->lock);
+ }
+
+ if (previousNode == NULL)
+ {
+ /* node is head of chain */
+ PUSH_LOCK(&locks, &hashTable->bucketLocks[bucketIndex]);
+
+ hashTable->hashBuckets[bucketIndex] = node->next;
+
+ POP_LOCK(&locks);
+ }
+ else
+ {
+ /* relink */
+ previousNode->next = node->next;
+ }
+
+ UNROLL_STACK(&locks);
+
+ /* free node */
+ hashTable->freeFunction(node->data);
+ ixEthDBFreeHashNode(node);
+
+ return IX_ETH_DB_SUCCESS;
+ }
+ else
+ {
+ if (previousNode != NULL)
+ {
+ /* unlock previous node */
+ SHIFT_STACK(&locks);
+ }
+
+ /* advance to next element in chain */
+ previousNode = node;
+ node = node->next;
+ }
+ }
+
+ UNROLL_STACK(&locks);
+
+ /* not found */
+ return IX_ETH_DB_NO_SUCH_ADDR;
+}
+
+/**
+ * @brief retrieves an entry from the hash table
+ *
+ * @param hashTable hash table to perform the search into
+ * @param reference search key (a MAC address)
+ * @param keyType type of record key used for matching
+ * @param searchResult pointer where a reference to the located hash node
+ * is placed
+ *
+ * Searches the entry with the same key as <i>reference</i> and places the
+ * pointer to the resulting node in <i>searchResult</i>.
+ * An implicit write access lock is granted after a search, which gives the
+ * caller the opportunity to modify the entry.
+ * Access should be released as soon as possible using @ref ixEthDBReleaseHashNode().
+ *
+ * @see ixEthDBReleaseHashNode()
+ *
+ * @retval IX_ETH_DB_SUCCESS if the search was completed successfully
+ * @retval IX_ETH_DB_NO_SUCH_ADDRESS if no entry with the given key was found
+ * @retval IX_ETH_DB_BUSY if a locking failure has occured, in which case
+ * the caller should retry
+ *
+ * @warning unless the return value is <b>IX_ETH_DB_SUCCESS</b> the searchResult
+ * location is NOT modified and therefore using a NULL comparison test when the
+ * value was not properly initialized would be an error
+ *
+ * @internal
+ */
+IxEthDBStatus ixEthDBSearchHashEntry(HashTable *hashTable, int keyType, void *reference, HashNode **searchResult)
+{
+ UINT32 hashValue;
+ HashNode *node;
+
+ hashValue = hashTable->entryHashFunction(reference);
+ node = hashTable->hashBuckets[hashValue % hashTable->numBuckets];
+
+ while (node != NULL)
+ {
+ TRY_LOCK(&node->lock);
+
+ if (hashTable->matchFunctions[keyType](reference, node->data))
+ {
+ *searchResult = node;
+
+ return IX_ETH_DB_SUCCESS;
+ }
+ else
+ {
+ UNLOCK(&node->lock);
+
+ node = node->next;
+ }
+ }
+
+ /* not found */
+ return IX_ETH_DB_NO_SUCH_ADDR;
+}
+
+/**
+ * @brief reports the existence of an entry in the hash table
+ *
+ * @param hashTable hash table to perform the search into
+ * @param reference search key (a MAC address)
+ * @param keyType type of record key used for matching
+ *
+ * Searches the entry with the same key as <i>reference</i>.
+ * No implicit write access lock is granted after a search, hence the
+ * caller cannot access or modify the entry. The result is only temporary.
+ *
+ * @see ixEthDBReleaseHashNode()
+ *
+ * @retval IX_ETH_DB_SUCCESS if the search was completed successfully
+ * @retval IX_ETH_DB_NO_SUCH_ADDRESS if no entry with the given key was found
+ * @retval IX_ETH_DB_BUSY if a locking failure has occured, in which case
+ * the caller should retry
+ *
+ * @internal
+ */
+IxEthDBStatus ixEthDBPeekHashEntry(HashTable *hashTable, int keyType, void *reference)
+{
+ UINT32 hashValue;
+ HashNode *node;
+
+ hashValue = hashTable->entryHashFunction(reference);
+ node = hashTable->hashBuckets[hashValue % hashTable->numBuckets];
+
+ while (node != NULL)
+ {
+ TRY_LOCK(&node->lock);
+
+ if (hashTable->matchFunctions[keyType](reference, node->data))
+ {
+ UNLOCK(&node->lock);
+
+ return IX_ETH_DB_SUCCESS;
+ }
+ else
+ {
+ UNLOCK(&node->lock);
+
+ node = node->next;
+ }
+ }
+
+ /* not found */
+ return IX_ETH_DB_NO_SUCH_ADDR;
+}
+
+/**
+ * @brief releases the write access lock
+ *
+ * @pre the node should have been obtained via @ref ixEthDBSearchHashEntry()
+ *
+ * @see ixEthDBSearchHashEntry()
+ *
+ * @internal
+ */
+void ixEthDBReleaseHashNode(HashNode *node)
+{
+ UNLOCK(&node->lock);
+}
+
+/**
+ * @brief initializes a hash iterator
+ *
+ * @param hashTable hash table to be iterated
+ * @param iterator iterator object
+ *
+ * If the initialization is successful the iterator will point to the
+ * first hash table record (if any).
+ * Testing if the iterator has not passed the end of the table should be
+ * done using the IS_ITERATOR_VALID(iteratorPtr) macro.
+ * An implicit write access lock is granted on the entry pointed by the iterator.
+ * The access is automatically revoked when the iterator is incremented.
+ * If the caller decides to terminate the iteration before the end of the table is
+ * passed then the manual access release method, @ref ixEthDBReleaseHashIterator,
+ * must be called.
+ *
+ * @see ixEthDBReleaseHashIterator()
+ *
+ * @retval IX_ETH_DB_SUCCESS if initialization was successful and the iterator points
+ * to the first valid table node
+ * @retval IX_ETH_DB_FAIL if the table is empty
+ * @retval IX_ETH_DB_BUSY if a locking failure has occured, in which case the caller
+ * should retry
+ *
+ * @warning do not use ixEthDBReleaseHashNode() on entries pointed by the iterator, as this
+ * might place the database in a permanent invalid lock state
+ *
+ * @internal
+ */
+IxEthDBStatus ixEthDBInitHashIterator(HashTable *hashTable, HashIterator *iterator)
+{
+ iterator->bucketIndex = 0;
+ iterator->node = NULL;
+ iterator->previousNode = NULL;
+
+ return ixEthDBIncrementHashIterator(hashTable, iterator);
+}
+
+/**
+ * @brief releases the write access locks of the iterator nodes
+ *
+ * @warning use of this function is required only when the caller terminates an iteration
+ * before reaching the end of the table
+ *
+ * @see ixEthDBInitHashIterator()
+ * @see ixEthDBIncrementHashIterator()
+ *
+ * @param iterator iterator whose node(s) should be unlocked
+ *
+ * @internal
+ */
+void ixEthDBReleaseHashIterator(HashIterator *iterator)
+{
+ if (iterator->previousNode != NULL)
+ {
+ UNLOCK(&iterator->previousNode->lock);
+ }
+
+ if (iterator->node != NULL)
+ {
+ UNLOCK(&iterator->node->lock);
+ }
+}
+
+/**
+ * @brief incremenents an iterator so that it points to the next valid entry of the table
+ * (if any)
+ *
+ * @param hashTable hash table to iterate
+ * @param iterator iterator object
+ *
+ * @pre the iterator object must be initialized using @ref ixEthDBInitHashIterator()
+ *
+ * If the increment operation is successful the iterator will point to the
+ * next hash table record (if any).
+ * Testing if the iterator has not passed the end of the table should be
+ * done using the IS_ITERATOR_VALID(iteratorPtr) macro.
+ * An implicit write access lock is granted on the entry pointed by the iterator.
+ * The access is automatically revoked when the iterator is re-incremented.
+ * If the caller decides to terminate the iteration before the end of the table is
+ * passed then the manual access release method, @ref ixEthDBReleaseHashIterator,
+ * must be called.
+ * Is is guaranteed that no other thread can remove or change the iterated entry until
+ * the iterator is incremented successfully.
+ *
+ * @see ixEthDBReleaseHashIterator()
+ *
+ * @retval IX_ETH_DB_SUCCESS if the operation was successful and the iterator points
+ * to the next valid table node
+ * @retval IX_ETH_DB_FAIL if the iterator has passed the end of the table
+ * @retval IX_ETH_DB_BUSY if a locking failure has occured, in which case the caller
+ * should retry
+ *
+ * @warning do not use ixEthDBReleaseHashNode() on entries pointed by the iterator, as this
+ * might place the database in a permanent invalid lock state
+ *
+ * @internal
+ */
+IxEthDBStatus ixEthDBIncrementHashIterator(HashTable *hashTable, HashIterator *iterator)
+{
+ /* unless iterator is just initialized... */
+ if (iterator->node != NULL)
+ {
+ /* try next in chain */
+ if (iterator->node->next != NULL)
+ {
+ TRY_LOCK(&iterator->node->next->lock);
+
+ if (iterator->previousNode != NULL)
+ {
+ UNLOCK(&iterator->previousNode->lock);
+ }
+
+ iterator->previousNode = iterator->node;
+ iterator->node = iterator->node->next;
+
+ return IX_ETH_DB_SUCCESS;
+ }
+ else
+ {
+ /* last in chain, prepare for next bucket */
+ iterator->bucketIndex++;
+ }
+ }
+
+ /* try next used bucket */
+ for (; iterator->bucketIndex < hashTable->numBuckets ; iterator->bucketIndex++)
+ {
+ HashNode **nodePtr = &(hashTable->hashBuckets[iterator->bucketIndex]);
+ HashNode *node = *nodePtr;
+#if (CPU!=SIMSPARCSOLARIS) && !defined (__wince)
+ if (((iterator->bucketIndex & IX_ETHDB_BUCKET_INDEX_MASK) == 0) &&
+ (iterator->bucketIndex < (hashTable->numBuckets - IX_ETHDB_BUCKETPTR_AHEAD)))
+ {
+ /* preload next cache line (2 cache line ahead) */
+ nodePtr += IX_ETHDB_BUCKETPTR_AHEAD;
+ __asm__ ("pld [%0];\n": : "r" (nodePtr));
+ }
+#endif
+ if (node != NULL)
+ {
+ TRY_LOCK(&node->lock);
+
+ /* unlock last one or two nodes in the previous chain */
+ if (iterator->node != NULL)
+ {
+ UNLOCK(&iterator->node->lock);
+
+ if (iterator->previousNode != NULL)
+ {
+ UNLOCK(&iterator->previousNode->lock);
+ }
+ }
+
+ /* redirect iterator */
+ iterator->previousNode = NULL;
+ iterator->node = node;
+
+ return IX_ETH_DB_SUCCESS;
+ }
+ }
+
+ /* could not advance iterator */
+ if (iterator->node != NULL)
+ {
+ UNLOCK(&iterator->node->lock);
+
+ if (iterator->previousNode != NULL)
+ {
+ UNLOCK(&iterator->previousNode->lock);
+ }
+
+ iterator->node = NULL;
+ }
+
+ return IX_ETH_DB_END;
+}
+
+/**
+ * @brief removes an entry pointed by an iterator
+ *
+ * @param hashTable iterated hash table
+ * @param iterator iterator object
+ *
+ * Removes the entry currently pointed by the iterator and repositions the iterator
+ * on the next valid entry (if any). Handles locking issues automatically and
+ * implicitely grants write access lock to the new pointed entry.
+ * Failures due to concurrent threads having write access locks in the same region
+ * preserve the state of the database and the iterator object, leaving the caller
+ * free to retry without loss of access. It is guaranteed that only the thread owning
+ * the iterator can remove the object pointed by the iterator.
+ *
+ * @retval IX_ETH_DB_SUCCESS if removal has succeeded
+ * @retval IX_ETH_DB_BUSY if a locking failure has occured, in which case the caller
+ * should retry
+ *
+ * @internal
+ */
+IxEthDBStatus ixEthDBRemoveEntryAtHashIterator(HashTable *hashTable, HashIterator *iterator)
+{
+ HashIterator nextIteratorPos;
+ LockStack locks;
+
+ INIT_STACK(&locks);
+
+ /* set initial bucket index for next position */
+ nextIteratorPos.bucketIndex = iterator->bucketIndex;
+
+ /* compute iterator position before removing anything and lock ahead */
+ if (iterator->node->next != NULL)
+ {
+ PUSH_LOCK(&locks, &iterator->node->next->lock);
+
+ /* reposition on the next node in the chain */
+ nextIteratorPos.node = iterator->node->next;
+ nextIteratorPos.previousNode = iterator->previousNode;
+ }
+ else
+ {
+ /* try next chain - don't know yet if we'll find anything */
+ nextIteratorPos.node = NULL;
+
+ /* if we find something it's a chain head */
+ nextIteratorPos.previousNode = NULL;
+
+ /* browse up in the buckets to find a non-null chain */
+ while (++nextIteratorPos.bucketIndex < hashTable->numBuckets)
+ {
+ nextIteratorPos.node = hashTable->hashBuckets[nextIteratorPos.bucketIndex];
+
+ if (nextIteratorPos.node != NULL)
+ {
+ /* found a non-empty chain, try to lock head */
+ PUSH_LOCK(&locks, &nextIteratorPos.node->lock);
+
+ break;
+ }
+ }
+ }
+
+ /* restore links over the to-be-deleted item */
+ if (iterator->previousNode == NULL)
+ {
+ /* first in chain, lock bucket */
+ PUSH_LOCK(&locks, &hashTable->bucketLocks[iterator->bucketIndex]);
+
+ hashTable->hashBuckets[iterator->bucketIndex] = iterator->node->next;
+
+ POP_LOCK(&locks);
+ }
+ else
+ {
+ /* relink */
+ iterator->previousNode->next = iterator->node->next;
+
+ /* unlock last remaining node in current chain when moving between chains */
+ if (iterator->node->next == NULL)
+ {
+ UNLOCK(&iterator->previousNode->lock);
+ }
+ }
+
+ /* delete entry */
+ hashTable->freeFunction(iterator->node->data);
+ ixEthDBFreeHashNode(iterator->node);
+
+ /* reposition iterator */
+ *iterator = nextIteratorPos;
+
+ return IX_ETH_DB_SUCCESS;
+}
+
+/**
+ * @}
+ */
diff --git a/cpu/ixp/npe/IxEthDBLearning.c b/cpu/ixp/npe/IxEthDBLearning.c
new file mode 100644
index 0000000000..2287dbe96c
--- /dev/null
+++ b/cpu/ixp/npe/IxEthDBLearning.c
@@ -0,0 +1,149 @@
+/**
+ * @file IxEthDBLearning.c
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+#include "IxEthDB_p.h"
+
+/**
+ * @brief hashes the mac address in a mac descriptor with a XOR function
+ *
+ * @param entry pointer to a mac descriptor to be hashed
+ *
+ * This function only extracts the mac address and employs ixEthDBKeyXORHash()
+ * to do the actual hashing.
+ * Used only to add a whole entry to a hash table, as opposed to searching which
+ * takes only a key and uses the key hashing directly.
+ *
+ * @see ixEthDBKeyXORHash()
+ *
+ * @return the hash value
+ *
+ * @internal
+ */
+UINT32 ixEthDBEntryXORHash(void *entry)
+{
+ MacDescriptor *descriptor = (MacDescriptor *) entry;
+
+ return ixEthDBKeyXORHash(descriptor->macAddress);
+}
+
+/**
+ * @brief hashes a mac address
+ *
+ * @param key pointer to a 6 byte structure (typically an IxEthDBMacAddr pointer)
+ * to be hashed
+ *
+ * Given a 6 bytes MAC address, the hash used is:
+ *
+ * hash(MAC[0:5]) = MAC[0:1] ^ MAC[2:3] ^ MAC[4:5]
+ *
+ * Used by the hash table to search and remove entries based
+ * solely on their keys (mac addresses).
+ *
+ * @return the hash value
+ *
+ * @internal
+ */
+UINT32 ixEthDBKeyXORHash(void *key)
+{
+ UINT32 hashValue;
+ UINT8 *value = (UINT8 *) key;
+
+ hashValue = (value[5] << 8) | value[4];
+ hashValue ^= (value[3] << 8) | value[2];
+ hashValue ^= (value[1] << 8) | value[0];
+
+ return hashValue;
+}
+
+/**
+ * @brief mac descriptor match function
+ *
+ * @param reference mac address (typically an IxEthDBMacAddr pointer) structure
+ * @param entry pointer to a mac descriptor whose key (mac address) is to be
+ * matched against the reference key
+ *
+ * Used by the hash table to retrieve entries. Hashing entries can produce
+ * collisions, i.e. descriptors with different mac addresses and the same
+ * hash value, where this function is used to differentiate entries.
+ *
+ * @retval TRUE if the entry matches the reference key (equal addresses)
+ * @retval FALSE if the entry does not match the reference key
+ *
+ * @internal
+ */
+BOOL ixEthDBAddressMatch(void *reference, void *entry)
+{
+ return (ixEthDBAddressCompare(reference, ((MacDescriptor *) entry)->macAddress) == 0);
+}
+
+/**
+ * @brief compares two mac addresses
+ *
+ * @param mac1 first mac address to compare
+ * @param mac2 second mac address to compare
+ *
+ * This comparison works in a similar way to strcmp, producing similar results.
+ * Used to insert values keyed on mac addresses into binary search trees.
+ *
+ * @retval -1 if mac1 < mac2
+ * @retval 0 if ma1 == mac2
+ * @retval 1 if mac1 > mac2
+ */
+UINT32 ixEthDBAddressCompare(UINT8 *mac1, UINT8 *mac2)
+{
+ UINT32 local_index;
+
+ for (local_index = 0 ; local_index < IX_IEEE803_MAC_ADDRESS_SIZE ; local_index++)
+ {
+ if (mac1[local_index] > mac2[local_index])
+ {
+ return 1;
+ }
+ else if (mac1[local_index] < mac2[local_index])
+ {
+ return -1;
+ }
+ }
+
+ return 0;
+}
+
diff --git a/cpu/ixp/npe/IxEthDBMem.c b/cpu/ixp/npe/IxEthDBMem.c
new file mode 100644
index 0000000000..133cbef8d6
--- /dev/null
+++ b/cpu/ixp/npe/IxEthDBMem.c
@@ -0,0 +1,649 @@
+/**
+ * @file IxEthDBDBMem.c
+ *
+ * @brief Memory handling routines for the MAC address database
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+
+#include "IxEthDB_p.h"
+
+IX_ETH_DB_PRIVATE HashNode *nodePool = NULL;
+IX_ETH_DB_PRIVATE MacDescriptor *macPool = NULL;
+IX_ETH_DB_PRIVATE MacTreeNode *treePool = NULL;
+
+IX_ETH_DB_PRIVATE HashNode nodePoolArea[NODE_POOL_SIZE];
+IX_ETH_DB_PRIVATE MacDescriptor macPoolArea[MAC_POOL_SIZE];
+IX_ETH_DB_PRIVATE MacTreeNode treePoolArea[TREE_POOL_SIZE];
+
+IX_ETH_DB_PRIVATE IxOsalMutex nodePoolLock;
+IX_ETH_DB_PRIVATE IxOsalMutex macPoolLock;
+IX_ETH_DB_PRIVATE IxOsalMutex treePoolLock;
+
+#define LOCK_NODE_POOL { ixOsalMutexLock(&nodePoolLock, IX_OSAL_WAIT_FOREVER); }
+#define UNLOCK_NODE_POOL { ixOsalMutexUnlock(&nodePoolLock); }
+
+#define LOCK_MAC_POOL { ixOsalMutexLock(&macPoolLock, IX_OSAL_WAIT_FOREVER); }
+#define UNLOCK_MAC_POOL { ixOsalMutexUnlock(&macPoolLock); }
+
+#define LOCK_TREE_POOL { ixOsalMutexLock(&treePoolLock, IX_OSAL_WAIT_FOREVER); }
+#define UNLOCK_TREE_POOL { ixOsalMutexUnlock(&treePoolLock); }
+
+/* private function prototypes */
+IX_ETH_DB_PRIVATE MacDescriptor* ixEthDBPoolAllocMacDescriptor(void);
+IX_ETH_DB_PRIVATE void ixEthDBPoolFreeMacDescriptor(MacDescriptor *macDescriptor);
+
+/**
+ * @addtogroup EthMemoryManagement
+ *
+ * @{
+ */
+
+/**
+ * @brief initializes the memory pools used by the ethernet database component
+ *
+ * Initializes the hash table node, mac descriptor and mac tree node pools.
+ * Called at initialization time by @ref ixEthDBInit().
+ *
+ * @internal
+ */
+IX_ETH_DB_PUBLIC
+void ixEthDBInitMemoryPools(void)
+{
+ int local_index;
+
+ /* HashNode pool */
+ ixOsalMutexInit(&nodePoolLock);
+
+ for (local_index = 0 ; local_index < NODE_POOL_SIZE ; local_index++)
+ {
+ HashNode *freeNode = &nodePoolArea[local_index];
+
+ freeNode->nextFree = nodePool;
+ nodePool = freeNode;
+ }
+
+ /* MacDescriptor pool */
+ ixOsalMutexInit(&macPoolLock);
+
+ for (local_index = 0 ; local_index < MAC_POOL_SIZE ; local_index++)
+ {
+ MacDescriptor *freeDescriptor = &macPoolArea[local_index];
+
+ freeDescriptor->nextFree = macPool;
+ macPool = freeDescriptor;
+ }
+
+ /* MacTreeNode pool */
+ ixOsalMutexInit(&treePoolLock);
+
+ for (local_index = 0 ; local_index < TREE_POOL_SIZE ; local_index++)
+ {
+ MacTreeNode *freeNode = &treePoolArea[local_index];
+
+ freeNode->nextFree = treePool;
+ treePool = freeNode;
+ }
+}
+
+/**
+ * @brief allocates a hash node from the pool
+ *
+ * Allocates a hash node and resets its value.
+ *
+ * @return the allocated hash node or NULL if the pool is empty
+ *
+ * @internal
+ */
+IX_ETH_DB_PUBLIC
+HashNode* ixEthDBAllocHashNode(void)
+{
+ HashNode *allocatedNode = NULL;
+
+ if (nodePool != NULL)
+ {
+ LOCK_NODE_POOL;
+
+ allocatedNode = nodePool;
+ nodePool = nodePool->nextFree;
+
+ UNLOCK_NODE_POOL;
+
+ memset(allocatedNode, 0, sizeof(HashNode));
+ }
+
+ return allocatedNode;
+}
+
+/**
+ * @brief frees a hash node into the pool
+ *
+ * @param hashNode node to be freed
+ *
+ * @internal
+ */
+IX_ETH_DB_PUBLIC
+void ixEthDBFreeHashNode(HashNode *hashNode)
+{
+ if (hashNode != NULL)
+ {
+ LOCK_NODE_POOL;
+
+ hashNode->nextFree = nodePool;
+ nodePool = hashNode;
+
+ UNLOCK_NODE_POOL;
+ }
+}
+
+/**
+ * @brief allocates a mac descriptor from the pool
+ *
+ * Allocates a mac descriptor and resets its value.
+ * This function is not used directly, instead @ref ixEthDBAllocMacDescriptor()
+ * is used, which keeps track of the pointer reference count.
+ *
+ * @see ixEthDBAllocMacDescriptor()
+ *
+ * @warning this function is not used directly by any other function
+ * apart from ixEthDBAllocMacDescriptor()
+ *
+ * @return the allocated mac descriptor or NULL if the pool is empty
+ *
+ * @internal
+ */
+IX_ETH_DB_PRIVATE
+MacDescriptor* ixEthDBPoolAllocMacDescriptor(void)
+{
+ MacDescriptor *allocatedDescriptor = NULL;
+
+ if (macPool != NULL)
+ {
+ LOCK_MAC_POOL;
+
+ allocatedDescriptor = macPool;
+ macPool = macPool->nextFree;
+
+ UNLOCK_MAC_POOL;
+
+ memset(allocatedDescriptor, 0, sizeof(MacDescriptor));
+ }
+
+ return allocatedDescriptor;
+}
+
+/**
+ * @brief allocates and initializes a mac descriptor smart pointer
+ *
+ * Uses @ref ixEthDBPoolAllocMacDescriptor() to allocate a mac descriptor
+ * from the pool and initializes its reference count.
+ *
+ * @see ixEthDBPoolAllocMacDescriptor()
+ *
+ * @return the allocated mac descriptor or NULL if the pool is empty
+ *
+ * @internal
+ */
+IX_ETH_DB_PUBLIC
+MacDescriptor* ixEthDBAllocMacDescriptor(void)
+{
+ MacDescriptor *allocatedDescriptor = ixEthDBPoolAllocMacDescriptor();
+
+ if (allocatedDescriptor != NULL)
+ {
+ LOCK_MAC_POOL;
+
+ allocatedDescriptor->refCount++;
+
+ UNLOCK_MAC_POOL;
+ }
+
+ return allocatedDescriptor;
+}
+
+/**
+ * @brief frees a mac descriptor back into the pool
+ *
+ * @param macDescriptor mac descriptor to be freed
+ *
+ * @warning this function is not to be called by anyone but
+ * ixEthDBFreeMacDescriptor()
+ *
+ * @see ixEthDBFreeMacDescriptor()
+ *
+ * @internal
+ */
+IX_ETH_DB_PRIVATE
+void ixEthDBPoolFreeMacDescriptor(MacDescriptor *macDescriptor)
+{
+ LOCK_MAC_POOL;
+
+ macDescriptor->nextFree = macPool;
+ macPool = macDescriptor;
+
+ UNLOCK_MAC_POOL;
+}
+
+/**
+ * @brief frees or reduces the usage count of a mac descriptor smart pointer
+ *
+ * If the reference count reaches 0 (structure is no longer used anywhere)
+ * then the descriptor is freed back into the pool using ixEthDBPoolFreeMacDescriptor().
+ *
+ * @see ixEthDBPoolFreeMacDescriptor()
+ *
+ * @internal
+ */
+IX_ETH_DB_PUBLIC
+void ixEthDBFreeMacDescriptor(MacDescriptor *macDescriptor)
+{
+ if (macDescriptor != NULL)
+ {
+ LOCK_MAC_POOL;
+
+ if (macDescriptor->refCount > 0)
+ {
+ macDescriptor->refCount--;
+
+ if (macDescriptor->refCount == 0)
+ {
+ UNLOCK_MAC_POOL;
+
+ ixEthDBPoolFreeMacDescriptor(macDescriptor);
+ }
+ else
+ {
+ UNLOCK_MAC_POOL;
+ }
+ }
+ else
+ {
+ UNLOCK_MAC_POOL;
+ }
+ }
+}
+
+/**
+ * @brief clones a mac descriptor smart pointer
+ *
+ * @param macDescriptor mac descriptor to clone
+ *
+ * Increments the usage count of the smart pointer
+ *
+ * @returns the cloned smart pointer
+ *
+ * @internal
+ */
+IX_ETH_DB_PUBLIC
+MacDescriptor* ixEthDBCloneMacDescriptor(MacDescriptor *macDescriptor)
+{
+ LOCK_MAC_POOL;
+
+ if (macDescriptor->refCount == 0)
+ {
+ UNLOCK_MAC_POOL;
+
+ return NULL;
+ }
+
+ macDescriptor->refCount++;
+
+ UNLOCK_MAC_POOL;
+
+ return macDescriptor;
+}
+
+/**
+ * @brief allocates a mac tree node from the pool
+ *
+ * Allocates and initializes a mac tree node from the pool.
+ *
+ * @return the allocated mac tree node or NULL if the pool is empty
+ *
+ * @internal
+ */
+IX_ETH_DB_PUBLIC
+MacTreeNode* ixEthDBAllocMacTreeNode(void)
+{
+ MacTreeNode *allocatedNode = NULL;
+
+ if (treePool != NULL)
+ {
+ LOCK_TREE_POOL;
+
+ allocatedNode = treePool;
+ treePool = treePool->nextFree;
+
+ UNLOCK_TREE_POOL;
+
+ memset(allocatedNode, 0, sizeof(MacTreeNode));
+ }
+
+ return allocatedNode;
+}
+
+/**
+ * @brief frees a mac tree node back into the pool
+ *
+ * @param macNode mac tree node to be freed
+ *
+ * @warning not to be used except from ixEthDBFreeMacTreeNode().
+ *
+ * @see ixEthDBFreeMacTreeNode()
+ *
+ * @internal
+ */
+void ixEthDBPoolFreeMacTreeNode(MacTreeNode *macNode)
+{
+ if (macNode != NULL)
+ {
+ LOCK_TREE_POOL;
+
+ macNode->nextFree = treePool;
+ treePool = macNode;
+
+ UNLOCK_TREE_POOL;
+ }
+}
+
+/**
+ * @brief frees or reduces the usage count of a mac tree node smart pointer
+ *
+ * @param macNode mac tree node to free
+ *
+ * Reduces the usage count of the given mac node. If the usage count
+ * reaches 0 the node is freed back into the pool using ixEthDBPoolFreeMacTreeNode()
+ *
+ * @internal
+ */
+IX_ETH_DB_PUBLIC
+void ixEthDBFreeMacTreeNode(MacTreeNode *macNode)
+{
+ if (macNode->descriptor != NULL)
+ {
+ ixEthDBFreeMacDescriptor(macNode->descriptor);
+ }
+
+ if (macNode->left != NULL)
+ {
+ ixEthDBFreeMacTreeNode(macNode->left);
+ }
+
+ if (macNode->right != NULL)
+ {
+ ixEthDBFreeMacTreeNode(macNode->right);
+ }
+
+ ixEthDBPoolFreeMacTreeNode(macNode);
+}
+
+/**
+ * @brief clones a mac tree node
+ *
+ * @param macNode mac tree node to be cloned
+ *
+ * Increments the usage count of the node, <i>its associated descriptor
+ * and <b>recursively</b> of all its child nodes</i>.
+ *
+ * @warning this function is recursive and clones whole trees/subtrees, use only for
+ * root nodes
+ *
+ * @internal
+ */
+IX_ETH_DB_PUBLIC
+MacTreeNode* ixEthDBCloneMacTreeNode(MacTreeNode *macNode)
+{
+ if (macNode != NULL)
+ {
+ MacTreeNode *clonedMacNode = ixEthDBAllocMacTreeNode();
+
+ if (clonedMacNode != NULL)
+ {
+ if (macNode->right != NULL)
+ {
+ clonedMacNode->right = ixEthDBCloneMacTreeNode(macNode->right);
+ }
+
+ if (macNode->left != NULL)
+ {
+ clonedMacNode->left = ixEthDBCloneMacTreeNode(macNode->left);
+ }
+
+ if (macNode->descriptor != NULL)
+ {
+ clonedMacNode->descriptor = ixEthDBCloneMacDescriptor(macNode->descriptor);
+ }
+ }
+
+ return clonedMacNode;
+ }
+ else
+ {
+ return NULL;
+ }
+}
+
+#ifndef NDEBUG
+/* Debug statistical functions for memory usage */
+
+extern HashTable dbHashtable;
+int ixEthDBNumHashElements(void);
+
+int ixEthDBNumHashElements(void)
+{
+ UINT32 bucketIndex;
+ int numElements = 0;
+ HashTable *hashTable = &dbHashtable;
+
+ for (bucketIndex = 0 ; bucketIndex < hashTable->numBuckets ; bucketIndex++)
+ {
+ if (hashTable->hashBuckets[bucketIndex] != NULL)
+ {
+ HashNode *node = hashTable->hashBuckets[bucketIndex];
+
+ while (node != NULL)
+ {
+ numElements++;
+
+ node = node->next;
+ }
+ }
+ }
+
+ return numElements;
+}
+
+UINT32 ixEthDBSearchTreeUsageGet(MacTreeNode *tree)
+{
+ if (tree == NULL)
+ {
+ return 0;
+ }
+ else
+ {
+ return 1 /* this node */ + ixEthDBSearchTreeUsageGet(tree->left) + ixEthDBSearchTreeUsageGet(tree->right);
+ }
+}
+
+int ixEthDBShowMemoryStatus(void)
+{
+ MacDescriptor *mac;
+ MacTreeNode *tree;
+ HashNode *node;
+
+ int macCounter = 0;
+ int treeCounter = 0;
+ int nodeCounter = 0;
+
+ int totalTreeUsage = 0;
+ int totalDescriptorUsage = 0;
+ int totalCloneDescriptorUsage = 0;
+ int totalNodeUsage = 0;
+
+ UINT32 portIndex;
+
+ LOCK_NODE_POOL;
+ LOCK_MAC_POOL;
+ LOCK_TREE_POOL;
+
+ mac = macPool;
+ tree = treePool;
+ node = nodePool;
+
+ while (mac != NULL)
+ {
+ macCounter++;
+
+ mac = mac->nextFree;
+
+ if (macCounter > MAC_POOL_SIZE)
+ {
+ break;
+ }
+ }
+
+ while (tree != NULL)
+ {
+ treeCounter++;
+
+ tree = tree->nextFree;
+
+ if (treeCounter > TREE_POOL_SIZE)
+ {
+ break;
+ }
+ }
+
+ while (node != NULL)
+ {
+ nodeCounter++;
+
+ node = node->nextFree;
+
+ if (nodeCounter > NODE_POOL_SIZE)
+ {
+ break;
+ }
+ }
+
+ for (portIndex = 0 ; portIndex < IX_ETH_DB_NUMBER_OF_PORTS ; portIndex++)
+ {
+ int treeUsage = ixEthDBSearchTreeUsageGet(ixEthDBPortInfo[portIndex].updateMethod.searchTree);
+
+ totalTreeUsage += treeUsage;
+ totalCloneDescriptorUsage += treeUsage; /* each tree node contains a descriptor */
+ }
+
+ totalNodeUsage = ixEthDBNumHashElements();
+ totalDescriptorUsage += totalNodeUsage; /* each hash table entry contains a descriptor */
+
+ UNLOCK_NODE_POOL;
+ UNLOCK_MAC_POOL;
+ UNLOCK_TREE_POOL;
+
+ printf("Ethernet database memory usage stats:\n\n");
+
+ if (macCounter <= MAC_POOL_SIZE)
+ {
+ printf("\tMAC descriptor pool : %d free out of %d entries (%d%%)\n", macCounter, MAC_POOL_SIZE, macCounter * 100 / MAC_POOL_SIZE);
+ }
+ else
+ {
+ printf("\tMAC descriptor pool : invalid state (ring within the pool), normally %d entries\n", MAC_POOL_SIZE);
+ }
+
+ if (treeCounter <= TREE_POOL_SIZE)
+ {
+ printf("\tTree node pool : %d free out of %d entries (%d%%)\n", treeCounter, TREE_POOL_SIZE, treeCounter * 100 / TREE_POOL_SIZE);
+ }
+ else
+ {
+ printf("\tTREE descriptor pool : invalid state (ring within the pool), normally %d entries\n", TREE_POOL_SIZE);
+ }
+
+ if (nodeCounter <= NODE_POOL_SIZE)
+ {
+ printf("\tHash node pool : %d free out of %d entries (%d%%)\n", nodeCounter, NODE_POOL_SIZE, nodeCounter * 100 / NODE_POOL_SIZE);
+ }
+ else
+ {
+ printf("\tNODE descriptor pool : invalid state (ring within the pool), normally %d entries\n", NODE_POOL_SIZE);
+ }
+
+ printf("\n");
+ printf("\tMAC descriptor usage : %d entries, %d cloned\n", totalDescriptorUsage, totalCloneDescriptorUsage);
+ printf("\tTree node usage : %d entries\n", totalTreeUsage);
+ printf("\tHash node usage : %d entries\n", totalNodeUsage);
+ printf("\n");
+
+ /* search for duplicate nodes in the mac pool */
+ {
+ MacDescriptor *reference = macPool;
+
+ while (reference != NULL)
+ {
+ MacDescriptor *comparison = reference->nextFree;
+
+ while (comparison != NULL)
+ {
+ if (reference == comparison)
+ {
+ printf("Warning: reached a duplicate (%p), invalid MAC pool state\n", reference);
+
+ return 1;
+ }
+
+ comparison = comparison->nextFree;
+ }
+
+ reference = reference->nextFree;
+ }
+ }
+
+ printf("No duplicates found in the MAC pool (sanity check ok)\n");
+
+ return 0;
+}
+
+#endif /* NDEBUG */
+
+/**
+ * @} EthMemoryManagement
+ */
diff --git a/cpu/ixp/npe/IxEthDBNPEAdaptor.c b/cpu/ixp/npe/IxEthDBNPEAdaptor.c
new file mode 100644
index 0000000000..112a46c998
--- /dev/null
+++ b/cpu/ixp/npe/IxEthDBNPEAdaptor.c
@@ -0,0 +1,719 @@
+/**
+ * @file IxEthDBDBNPEAdaptor.c
+ *
+ * @brief Routines that read and write learning/search trees in NPE-specific format
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+#include "IxEthDB_p.h"
+#include "IxEthDBLog_p.h"
+
+/* forward prototype declarations */
+IX_ETH_DB_PUBLIC void ixEthDBELTShow(IxEthDBPortId portID);
+IX_ETH_DB_PUBLIC void ixEthDBShowNpeMsgHistory(void);
+
+/* data */
+UINT8* ixEthDBNPEUpdateArea[IX_ETH_DB_NUMBER_OF_PORTS];
+UINT32 dumpEltSize;
+
+/* private data */
+IX_ETH_DB_PRIVATE IxEthDBNoteWriteFn ixEthDBNPENodeWrite[IX_ETH_DB_MAX_RECORD_TYPE_INDEX + 1];
+
+#define IX_ETH_DB_MAX_DELTA_ZONES (6) /* at most 6 EP Delta zones, according to NPE FS */
+IX_ETH_DB_PRIVATE UINT32 ixEthDBEPDeltaOffset[IX_ETH_DB_MAX_RECORD_TYPE_INDEX + 1][IX_ETH_DB_MAX_DELTA_ZONES];
+IX_ETH_DB_PRIVATE UINT32 ixEthDBEPDelta[IX_ETH_DB_MAX_RECORD_TYPE_INDEX + 1][IX_ETH_DB_MAX_DELTA_ZONES];
+
+/**
+ * @brief allocates non-cached or contiguous NPE tree update areas for all the ports
+ *
+ * This function is called only once at initialization time from
+ * @ref ixEthDBInit().
+ *
+ * @warning do not call manually
+ *
+ * @see ixEthDBInit()
+ *
+ * @internal
+ */
+IX_ETH_DB_PUBLIC
+void ixEthDBNPEUpdateAreasInit(void)
+{
+ UINT32 portIndex;
+ PortUpdateMethod *update;
+
+ for (portIndex = 0 ; portIndex < IX_ETH_DB_NUMBER_OF_PORTS ; portIndex++)
+ {
+ update = &ixEthDBPortInfo[portIndex].updateMethod;
+
+ if (ixEthDBPortDefinitions[portIndex].type == IX_ETH_NPE)
+ {
+ update->npeUpdateZone = IX_OSAL_CACHE_DMA_MALLOC(FULL_ELT_BYTE_SIZE);
+ update->npeGwUpdateZone = IX_OSAL_CACHE_DMA_MALLOC(FULL_GW_BYTE_SIZE);
+ update->vlanUpdateZone = IX_OSAL_CACHE_DMA_MALLOC(FULL_VLAN_BYTE_SIZE);
+
+ if (update->npeUpdateZone == NULL
+ || update->npeGwUpdateZone == NULL
+ || update->vlanUpdateZone == NULL)
+ {
+ ERROR_LOG("Fatal error: IX_ACC_DRV_DMA_MALLOC() returned NULL, no NPE update zones available\n");
+ }
+ else
+ {
+ memset(update->npeUpdateZone, 0, FULL_ELT_BYTE_SIZE);
+ memset(update->npeGwUpdateZone, 0, FULL_GW_BYTE_SIZE);
+ memset(update->vlanUpdateZone, 0, FULL_VLAN_BYTE_SIZE);
+ }
+ }
+ else
+ {
+ /* unused */
+ update->npeUpdateZone = NULL;
+ update->npeGwUpdateZone = NULL;
+ update->vlanUpdateZone = NULL;
+ }
+ }
+}
+
+/**
+ * @brief deallocates the NPE update areas for all the ports
+ *
+ * This function is called at component de-initialization time
+ * by @ref ixEthDBUnload().
+ *
+ * @warning do not call manually
+ *
+ * @internal
+ */
+IX_ETH_DB_PUBLIC
+void ixEthDBNPEUpdateAreasUnload(void)
+{
+ UINT32 portIndex;
+
+ for (portIndex = 0 ; portIndex < IX_ETH_DB_NUMBER_OF_PORTS ; portIndex++)
+ {
+ if (ixEthDBPortDefinitions[portIndex].type == IX_ETH_NPE)
+ {
+ IX_OSAL_CACHE_DMA_FREE(ixEthDBPortInfo[portIndex].updateMethod.npeUpdateZone);
+ IX_OSAL_CACHE_DMA_FREE(ixEthDBPortInfo[portIndex].updateMethod.npeGwUpdateZone);
+ IX_OSAL_CACHE_DMA_FREE(ixEthDBPortInfo[portIndex].updateMethod.vlanUpdateZone);
+ }
+ }
+}
+
+/**
+ * @brief general-purpose NPE callback function
+ *
+ * @param npeID NPE ID
+ * @param msg NPE message
+ *
+ * This function will unblock the caller by unlocking
+ * the npeAckLock mutex defined for each NPE port
+ *
+ * @internal
+ */
+IX_ETH_DB_PUBLIC
+void ixEthDBNpeMsgAck(IxNpeMhNpeId npeID, IxNpeMhMessage msg)
+{
+ IxEthDBPortId portID = IX_ETH_DB_NPE_TO_PORT_ID(npeID);
+ PortInfo *portInfo;
+
+ if (portID >= IX_ETH_DB_NUMBER_OF_PORTS)
+ {
+ /* invalid port */
+ return;
+ }
+
+ if (ixEthDBPortDefinitions[portID].type != IX_ETH_NPE)
+ {
+ /* not an NPE */
+ return;
+ }
+
+ portInfo = &ixEthDBPortInfo[portID];
+
+ ixOsalMutexUnlock(&portInfo->npeAckLock);
+}
+
+/**
+ * @brief synchronizes the database with tree
+ *
+ * @param portID port ID of the NPE whose tree is to be scanned
+ * @param eltBaseAddress memory base address of the NPE serialized tree
+ * @param eltSize size in bytes of the NPE serialized tree
+ *
+ * Scans the NPE learning tree and resets the age of active database records.
+ *
+ * @internal
+ */
+IX_ETH_DB_PUBLIC
+void ixEthDBNPESyncScan(IxEthDBPortId portID, void *eltBaseAddress, UINT32 eltSize)
+{
+ UINT32 eltEntryOffset;
+ UINT32 entryPortID;
+
+ /* invalidate cache */
+ IX_OSAL_CACHE_INVALIDATE(eltBaseAddress, eltSize);
+
+ for (eltEntryOffset = ELT_ROOT_OFFSET ; eltEntryOffset < eltSize ; eltEntryOffset += ELT_ENTRY_SIZE)
+ {
+ /* (eltBaseAddress + eltEntryOffset) points to a valid NPE tree node
+ *
+ * the format of the node is MAC[6 bytes]:PortID[1 byte]:Reserved[6 bits]:Active[1 bit]:Valid[1 bit]
+ * therefore we can just use the pointer for database searches as only the first 6 bytes are checked
+ */
+ void *eltNodeAddress = (void *) ((UINT32) eltBaseAddress + eltEntryOffset);
+
+ /* debug */
+ IX_ETH_DB_NPE_VERBOSE_TRACE("DB: (NPEAdaptor) checking node at offset %d...\n", eltEntryOffset / ELT_ENTRY_SIZE);
+
+ if (IX_EDB_NPE_NODE_VALID(eltNodeAddress) != TRUE)
+ {
+ IX_ETH_DB_NPE_VERBOSE_TRACE("\t... node is empty\n");
+ }
+ else if (eltEntryOffset == ELT_ROOT_OFFSET)
+ {
+ IX_ETH_DB_NPE_VERBOSE_TRACE("\t... node is root\n");
+ }
+
+ if (IX_EDB_NPE_NODE_VALID(eltNodeAddress))
+ {
+ entryPortID = IX_ETH_DB_NPE_LOGICAL_ID_TO_PORT_ID(IX_EDB_NPE_NODE_PORT_ID(eltNodeAddress));
+
+ /* check only active entries belonging to this port */
+ if (ixEthDBPortInfo[portID].agingEnabled && IX_EDB_NPE_NODE_ACTIVE(eltNodeAddress) && (portID == entryPortID)
+ && ((ixEthDBPortDefinitions[portID].capabilities & IX_ETH_ENTRY_AGING) == 0))
+ {
+ /* search record */
+ HashNode *node = ixEthDBSearch((IxEthDBMacAddr *) eltNodeAddress, IX_ETH_DB_ALL_FILTERING_RECORDS);
+
+ /* safety check, maybe user deleted record right before sync? */
+ if (node != NULL)
+ {
+ /* found record */
+ MacDescriptor *descriptor = (MacDescriptor *) node->data;
+
+ IX_ETH_DB_NPE_VERBOSE_TRACE("DB: (NPEAdaptor) synced entry [%s] already in the database, updating fields\n", mac2string(eltNodeAddress));
+
+ /* reset age - set to -1 so that maintenance will restore it to 0 (or more) when incrementing */
+ if (!descriptor->recordData.filteringData.staticEntry)
+ {
+ if (descriptor->type == IX_ETH_DB_FILTERING_RECORD)
+ {
+ descriptor->recordData.filteringData.age = AGE_RESET;
+ }
+ else if (descriptor->type == IX_ETH_DB_FILTERING_VLAN_RECORD)
+ {
+ descriptor->recordData.filteringVlanData.age = AGE_RESET;
+ }
+ }
+
+ /* end transaction */
+ ixEthDBReleaseHashNode(node);
+ }
+ }
+ else
+ {
+ IX_ETH_DB_NPE_VERBOSE_TRACE("\t... found portID %d, we check only port %d\n", entryPortID, portID);
+ }
+ }
+ }
+}
+
+/**
+ * @brief writes a search tree in NPE format
+ *
+ * @param type type of records to be written into the NPE update zone
+ * @param totalSize maximum size of the linearized tree
+ * @param baseAddress memory base address where to write the NPE tree into
+ * @param tree search tree to write in NPE format
+ * @param blocks number of written 64-byte blocks
+ * @param startIndex optimal binary search start index
+ *
+ * Serializes the given tree in NPE linear format
+ *
+ * @return none
+ *
+ * @internal
+ */
+IX_ETH_DB_PUBLIC
+void ixEthDBNPETreeWrite(IxEthDBRecordType type, UINT32 totalSize, void *baseAddress, MacTreeNode *tree, UINT32 *epDelta, UINT32 *blocks)
+{
+ MacTreeNodeStack *stack;
+ UINT32 maxOffset = 0;
+ UINT32 emptyOffset;
+
+ stack = ixOsalCacheDmaMalloc(sizeof (MacTreeNodeStack));
+
+ if (stack == NULL)
+ {
+ ERROR_LOG("DB: (NPEAdaptor) failed to allocate the node stack for learning tree linearization, out of memory?\n");
+ return;
+ }
+
+ /* zero out empty root */
+ memset(baseAddress, 0, ELT_ENTRY_SIZE);
+
+ NODE_STACK_INIT(stack);
+
+ if (tree != NULL)
+ {
+ /* push tree root at offset 1 */
+ NODE_STACK_PUSH(stack, tree, 1);
+
+ maxOffset = 1;
+ }
+
+ while (NODE_STACK_NONEMPTY(stack))
+ {
+ MacTreeNode *node;
+ UINT32 offset;
+
+ NODE_STACK_POP(stack, node, offset);
+
+ /* update maximum offset */
+ if (offset > maxOffset)
+ {
+ maxOffset = offset;
+ }
+
+ IX_ETH_DB_NPE_VERBOSE_TRACE("DB: (NPEAdaptor) writing MAC [%s] at offset %d\n", mac2string(node->descriptor->macAddress), offset);
+
+ /* add node to NPE ELT at position indicated by offset */
+ if (offset < MAX_ELT_SIZE)
+ {
+ ixEthDBNPENodeWrite[type]((void *) (((UINT32) baseAddress) + offset * ELT_ENTRY_SIZE), node);
+ }
+
+ if (node->left != NULL)
+ {
+ NODE_STACK_PUSH(stack, node->left, LEFT_CHILD_OFFSET(offset));
+ }
+ else
+ {
+ /* ensure this entry is zeroed */
+ memset((void *) ((UINT32) baseAddress + LEFT_CHILD_OFFSET(offset) * ELT_ENTRY_SIZE), 0, ELT_ENTRY_SIZE);
+ }
+
+ if (node->right != NULL)
+ {
+ NODE_STACK_PUSH(stack, node->right, RIGHT_CHILD_OFFSET(offset));
+ }
+ else
+ {
+ /* ensure this entry is zeroed */
+ memset((void *) ((UINT32) baseAddress + RIGHT_CHILD_OFFSET(offset) * ELT_ENTRY_SIZE), 0, ELT_ENTRY_SIZE);
+ }
+ }
+
+ emptyOffset = maxOffset + 1;
+
+ /* zero out rest of the tree */
+ IX_ETH_DB_NPE_TRACE("DB: (NPEAdaptor) Emptying tree from offset %d, address 0x%08X, %d bytes\n",
+ emptyOffset, ((UINT32) baseAddress) + emptyOffset * ELT_ENTRY_SIZE, totalSize - (emptyOffset * ELT_ENTRY_SIZE));
+
+ if (emptyOffset < MAX_ELT_SIZE - 1)
+ {
+ memset((void *) (((UINT32) baseAddress) + (emptyOffset * ELT_ENTRY_SIZE)), 0, totalSize - (emptyOffset * ELT_ENTRY_SIZE));
+ }
+
+ /* flush cache */
+ IX_OSAL_CACHE_FLUSH(baseAddress, totalSize);
+
+ /* debug */
+ IX_ETH_DB_NPE_TRACE("DB: (NPEAdaptor) Ethernet learning/filtering tree XScale wrote at address 0x%08X (max %d bytes):\n\n",
+ (UINT32) baseAddress, FULL_ELT_BYTE_SIZE);
+
+ IX_ETH_DB_NPE_DUMP_ELT(baseAddress, FULL_ELT_BYTE_SIZE);
+
+ /* compute number of 64-byte blocks */
+ if (blocks != NULL)
+ {
+ *blocks = maxOffset != 0 ? 1 + maxOffset / 8 : 0;
+
+ IX_ETH_DB_NPE_TRACE("DB: (NPEAdaptor) Wrote %d 64-byte blocks\n", *blocks);
+ }
+
+ /* compute epDelta - start index for binary search */
+ if (epDelta != NULL)
+ {
+ UINT32 deltaIndex = 0;
+
+ *epDelta = 0;
+
+ for (; deltaIndex < IX_ETH_DB_MAX_DELTA_ZONES ; deltaIndex ++)
+ {
+ if (ixEthDBEPDeltaOffset[type][deltaIndex] >= maxOffset)
+ {
+ *epDelta = ixEthDBEPDelta[type][deltaIndex];
+ break;
+ }
+ }
+
+ IX_ETH_DB_NPE_TRACE("DB: (NPEAdaptor) Computed epDelta %d (based on maxOffset %d)\n", *epDelta, maxOffset);
+ }
+
+ ixOsalCacheDmaFree(stack);
+}
+
+/**
+ * @brief implements a dummy node serialization function
+ *
+ * @param address address of where the node is to be serialized (unused)
+ * @param node tree node to be serialized (unused)
+ *
+ * This function is registered for safety reasons and should
+ * never be called. It will display an error message if this
+ * function is called.
+ *
+ * @return none
+ *
+ * @internal
+ */
+IX_ETH_DB_PRIVATE
+void ixEthDBNullSerialize(void *address, MacTreeNode *node)
+{
+ IX_ETH_DB_NPE_TRACE("DB: (NPEAdaptor) Warning, the NullSerialize function was called, wrong record type?\n");
+}
+
+/**
+ * @brief writes a filtering entry in NPE linear format
+ *
+ * @param address memory address to write node to
+ * @param node node to be written
+ *
+ * Used by @ref ixEthDBNPETreeWrite to liniarize a search tree
+ * in NPE-readable format.
+ *
+ * @internal
+ */
+IX_ETH_DB_PRIVATE
+void ixEthDBNPELearningNodeWrite(void *address, MacTreeNode *node)
+{
+ /* copy mac address */
+ memcpy(address, node->descriptor->macAddress, IX_IEEE803_MAC_ADDRESS_SIZE);
+
+ /* copy port ID */
+ NPE_NODE_BYTE(address, IX_EDB_NPE_NODE_ELT_PORT_ID_OFFSET) = IX_ETH_DB_PORT_ID_TO_NPE_LOGICAL_ID(node->descriptor->portID);
+
+ /* copy flags (valid and not active, as the NPE sets it to active) and clear reserved section (bits 2-7) */
+ NPE_NODE_BYTE(address, IX_EDB_NPE_NODE_ELT_FLAGS_OFFSET) = (UINT8) IX_EDB_FLAGS_INACTIVE_VALID;
+
+ IX_ETH_DB_NPE_VERBOSE_TRACE("DB: (NPEAdaptor) writing ELT node 0x%08x:0x%08x\n", * (UINT32 *) address, * (((UINT32 *) (address)) + 1));
+}
+
+/**
+ * @brief writes a WiFi header conversion record in
+ * NPE linear format
+ *
+ * @param address memory address to write node to
+ * @param node node to be written
+ *
+ * Used by @ref ixEthDBNPETreeWrite to liniarize a search tree
+ * in NPE-readable format.
+ *
+ * @internal
+ */
+IX_ETH_DB_PRIVATE
+void ixEthDBNPEWiFiNodeWrite(void *address, MacTreeNode *node)
+{
+ /* copy mac address */
+ memcpy(address, node->descriptor->macAddress, IX_IEEE803_MAC_ADDRESS_SIZE);
+
+ /* copy index */
+ NPE_NODE_BYTE(address, IX_EDB_NPE_NODE_WIFI_INDEX_OFFSET) = node->descriptor->recordData.wifiData.gwAddressIndex;
+
+ /* copy flags (type and valid) */
+ NPE_NODE_BYTE(address, IX_EDB_NPE_NODE_WIFI_FLAGS_OFFSET) = node->descriptor->recordData.wifiData.type << 1 | IX_EDB_FLAGS_VALID;
+}
+
+/**
+ * @brief writes a WiFi gateway header conversion record in
+ * NPE linear format
+ *
+ * @param address memory address to write node to
+ * @param node node to be written
+ *
+ * Used by @ref ixEthDBNPETreeWrite to liniarize a search tree
+ * in NPE-readable format.
+ *
+ * @internal
+ */
+IX_ETH_DB_PUBLIC
+void ixEthDBNPEGatewayNodeWrite(void *address, MacTreeNode *node)
+{
+ /* copy mac address */
+ memcpy(address, node->descriptor->recordData.wifiData.gwMacAddress, IX_IEEE803_MAC_ADDRESS_SIZE);
+
+ /* set reserved field, two bytes */
+ NPE_NODE_BYTE(address, IX_EDB_NPE_NODE_FW_RESERVED_OFFSET) = 0;
+ NPE_NODE_BYTE(address, IX_EDB_NPE_NODE_FW_RESERVED_OFFSET + 1) = 0;
+}
+
+/**
+ * @brief writes a firewall record in
+ * NPE linear format
+ *
+ * @param address memory address to write node to
+ * @param node node to be written
+ *
+ * Used by @ref ixEthDBNPETreeWrite to liniarize a search tree
+ * in NPE-readable format.
+ *
+ * @internal
+ */
+IX_ETH_DB_PRIVATE
+void ixEthDBNPEFirewallNodeWrite(void *address, MacTreeNode *node)
+{
+ /* set reserved field */
+ NPE_NODE_BYTE(address, IX_EDB_NPE_NODE_FW_RESERVED_OFFSET) = 0;
+
+ /* set flags */
+ NPE_NODE_BYTE(address, IX_EDB_NPE_NODE_FW_FLAGS_OFFSET) = IX_EDB_FLAGS_VALID;
+
+ /* copy mac address */
+ memcpy((void *) ((UINT32) address + IX_EDB_NPE_NODE_FW_ADDR_OFFSET), node->descriptor->macAddress, IX_IEEE803_MAC_ADDRESS_SIZE);
+}
+
+/**
+ * @brief registers the NPE serialization methods
+ *
+ * This functions registers NPE serialization methods
+ * for writing the following types of records in NPE
+ * readable linear format:
+ * - filtering records
+ * - WiFi header conversion records
+ * - WiFi gateway header conversion records
+ * - firewall records
+ *
+ * Note that this function should be called by the
+ * component initialization function.
+ *
+ * @return number of registered record types
+ *
+ * @internal
+ */
+IX_ETH_DB_PUBLIC
+UINT32 ixEthDBRecordSerializeMethodsRegister()
+{
+ int i;
+
+ /* safety - register a blank method for everybody first */
+ for ( i = 0 ; i < IX_ETH_DB_MAX_RECORD_TYPE_INDEX + 1 ; i++)
+ {
+ ixEthDBNPENodeWrite[i] = ixEthDBNullSerialize;
+ }
+
+ /* register real methods */
+ ixEthDBNPENodeWrite[IX_ETH_DB_FILTERING_RECORD] = ixEthDBNPELearningNodeWrite;
+ ixEthDBNPENodeWrite[IX_ETH_DB_FILTERING_VLAN_RECORD] = ixEthDBNPELearningNodeWrite;
+ ixEthDBNPENodeWrite[IX_ETH_DB_WIFI_RECORD] = ixEthDBNPEWiFiNodeWrite;
+ ixEthDBNPENodeWrite[IX_ETH_DB_FIREWALL_RECORD] = ixEthDBNPEFirewallNodeWrite;
+ ixEthDBNPENodeWrite[IX_ETH_DB_GATEWAY_RECORD] = ixEthDBNPEGatewayNodeWrite;
+
+ /* EP Delta arrays */
+ memset(ixEthDBEPDeltaOffset, 0, sizeof (ixEthDBEPDeltaOffset));
+ memset(ixEthDBEPDelta, 0, sizeof (ixEthDBEPDelta));
+
+ /* filtering records */
+ ixEthDBEPDeltaOffset[IX_ETH_DB_FILTERING_RECORD][0] = 1;
+ ixEthDBEPDelta[IX_ETH_DB_FILTERING_RECORD][0] = 0;
+
+ ixEthDBEPDeltaOffset[IX_ETH_DB_FILTERING_RECORD][1] = 3;
+ ixEthDBEPDelta[IX_ETH_DB_FILTERING_RECORD][1] = 7;
+
+ ixEthDBEPDeltaOffset[IX_ETH_DB_FILTERING_RECORD][2] = 511;
+ ixEthDBEPDelta[IX_ETH_DB_FILTERING_RECORD][2] = 14;
+
+ /* wifi records */
+ ixEthDBEPDeltaOffset[IX_ETH_DB_WIFI_RECORD][0] = 1;
+ ixEthDBEPDelta[IX_ETH_DB_WIFI_RECORD][0] = 0;
+
+ ixEthDBEPDeltaOffset[IX_ETH_DB_WIFI_RECORD][1] = 3;
+ ixEthDBEPDelta[IX_ETH_DB_WIFI_RECORD][1] = 7;
+
+ ixEthDBEPDeltaOffset[IX_ETH_DB_WIFI_RECORD][2] = 511;
+ ixEthDBEPDelta[IX_ETH_DB_WIFI_RECORD][2] = 14;
+
+ /* firewall records */
+ ixEthDBEPDeltaOffset[IX_ETH_DB_FIREWALL_RECORD][0] = 0;
+ ixEthDBEPDelta[IX_ETH_DB_FIREWALL_RECORD][0] = 0;
+
+ ixEthDBEPDeltaOffset[IX_ETH_DB_FIREWALL_RECORD][1] = 1;
+ ixEthDBEPDelta[IX_ETH_DB_FIREWALL_RECORD][1] = 5;
+
+ ixEthDBEPDeltaOffset[IX_ETH_DB_FIREWALL_RECORD][2] = 3;
+ ixEthDBEPDelta[IX_ETH_DB_FIREWALL_RECORD][2] = 13;
+
+ ixEthDBEPDeltaOffset[IX_ETH_DB_FIREWALL_RECORD][3] = 7;
+ ixEthDBEPDelta[IX_ETH_DB_FIREWALL_RECORD][3] = 21;
+
+ ixEthDBEPDeltaOffset[IX_ETH_DB_FIREWALL_RECORD][4] = 15;
+ ixEthDBEPDelta[IX_ETH_DB_FIREWALL_RECORD][4] = 29;
+
+ ixEthDBEPDeltaOffset[IX_ETH_DB_FIREWALL_RECORD][5] = 31;
+ ixEthDBEPDelta[IX_ETH_DB_FIREWALL_RECORD][5] = 37;
+
+ return 5; /* 5 methods registered */
+}
+
+#ifndef IX_NDEBUG
+
+IX_ETH_DB_PUBLIC UINT32 npeMsgHistory[IX_ETH_DB_NPE_MSG_HISTORY_DEPTH][2];
+IX_ETH_DB_PUBLIC UINT32 npeMsgHistoryLen = 0;
+
+/**
+ * When compiled in DEBUG mode, this function can be used to display
+ * the history of messages sent to the NPEs (up to 100).
+ */
+IX_ETH_DB_PUBLIC
+void ixEthDBShowNpeMsgHistory()
+{
+ UINT32 i = 0;
+ UINT32 base, len;
+
+ if (npeMsgHistoryLen <= IX_ETH_DB_NPE_MSG_HISTORY_DEPTH)
+ {
+ base = 0;
+ len = npeMsgHistoryLen;
+ }
+ else
+ {
+ base = npeMsgHistoryLen % IX_ETH_DB_NPE_MSG_HISTORY_DEPTH;
+ len = IX_ETH_DB_NPE_MSG_HISTORY_DEPTH;
+ }
+
+ printf("NPE message history [last %d messages, from least to most recent]:\n", len);
+
+ for (; i < len ; i++)
+ {
+ UINT32 pos = (base + i) % IX_ETH_DB_NPE_MSG_HISTORY_DEPTH;
+ printf("msg[%d]: 0x%08x:0x%08x\n", i, npeMsgHistory[pos][0], npeMsgHistory[pos][1]);
+ }
+}
+
+IX_ETH_DB_PUBLIC
+void ixEthDBELTShow(IxEthDBPortId portID)
+{
+ IxNpeMhMessage message;
+ IX_STATUS result;
+
+ /* send EDB_GetMACAddressDatabase message */
+ FILL_GETMACADDRESSDATABASE(message,
+ 0 /* reserved */,
+ IX_OSAL_MMU_VIRT_TO_PHYS(ixEthDBPortInfo[portID].updateMethod.npeUpdateZone));
+
+ IX_ETHDB_SEND_NPE_MSG(IX_ETH_DB_PORT_ID_TO_NPE(portID), message, result);
+
+ if (result == IX_SUCCESS)
+ {
+ /* analyze NPE copy */
+ UINT32 eltEntryOffset;
+ UINT32 entryPortID;
+
+ UINT32 eltBaseAddress = (UINT32) ixEthDBPortInfo[portID].updateMethod.npeUpdateZone;
+ UINT32 eltSize = FULL_ELT_BYTE_SIZE;
+
+ /* invalidate cache */
+ IX_OSAL_CACHE_INVALIDATE((void *) eltBaseAddress, eltSize);
+
+ printf("Listing records in main learning tree for port %d\n", portID);
+
+ for (eltEntryOffset = ELT_ROOT_OFFSET ; eltEntryOffset < eltSize ; eltEntryOffset += ELT_ENTRY_SIZE)
+ {
+ /* (eltBaseAddress + eltEntryOffset) points to a valid NPE tree node
+ *
+ * the format of the node is MAC[6 bytes]:PortID[1 byte]:Reserved[6 bits]:Active[1 bit]:Valid[1 bit]
+ * therefore we can just use the pointer for database searches as only the first 6 bytes are checked
+ */
+ void *eltNodeAddress = (void *) ((UINT32) eltBaseAddress + eltEntryOffset);
+
+ if (IX_EDB_NPE_NODE_VALID(eltNodeAddress))
+ {
+ HashNode *node;
+
+ entryPortID = IX_ETH_DB_NPE_LOGICAL_ID_TO_PORT_ID(IX_EDB_NPE_NODE_PORT_ID(eltNodeAddress));
+
+ /* search record */
+ node = ixEthDBSearch((IxEthDBMacAddr *) eltNodeAddress, IX_ETH_DB_ALL_RECORD_TYPES);
+
+ printf("%s - port %d - %s ", mac2string((unsigned char *) eltNodeAddress), entryPortID,
+ IX_EDB_NPE_NODE_ACTIVE(eltNodeAddress) ? "active" : "inactive");
+
+ /* safety check, maybe user deleted record right before sync? */
+ if (node != NULL)
+ {
+ /* found record */
+ MacDescriptor *descriptor = (MacDescriptor *) node->data;
+
+ printf("- %s ",
+ descriptor->type == IX_ETH_DB_FILTERING_RECORD ? "filtering" :
+ descriptor->type == IX_ETH_DB_FILTERING_VLAN_RECORD ? "vlan" :
+ descriptor->type == IX_ETH_DB_WIFI_RECORD ? "wifi" : "other (check main DB)");
+
+ if (descriptor->type == IX_ETH_DB_FILTERING_RECORD) printf("- age %d - %s ",
+ descriptor->recordData.filteringData.age,
+ descriptor->recordData.filteringData.staticEntry ? "static" : "dynamic");
+
+ if (descriptor->type == IX_ETH_DB_FILTERING_VLAN_RECORD) printf("- age %d - %s - tci %d ",
+ descriptor->recordData.filteringVlanData.age,
+ descriptor->recordData.filteringVlanData.staticEntry ? "static" : "dynamic",
+ descriptor->recordData.filteringVlanData.ieee802_1qTag);
+
+ /* end transaction */
+ ixEthDBReleaseHashNode(node);
+ }
+ else
+ {
+ printf("- not synced");
+ }
+
+ printf("\n");
+ }
+ }
+ }
+ else
+ {
+ ixOsalLog(IX_OSAL_LOG_LVL_FATAL, IX_OSAL_LOG_DEV_STDOUT,
+ "EthDB: (ShowELT) Could not complete action (communication failure)\n",
+ portID, 0, 0, 0, 0, 0);
+ }
+}
+
+#endif
diff --git a/cpu/ixp/npe/IxEthDBPortUpdate.c b/cpu/ixp/npe/IxEthDBPortUpdate.c
new file mode 100644
index 0000000000..cdf114bfc4
--- /dev/null
+++ b/cpu/ixp/npe/IxEthDBPortUpdate.c
@@ -0,0 +1,740 @@
+/**
+ * @file IxEthDBDBPortUpdate.c
+ *
+ * @brief Implementation of dependency and port update handling
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+#include "IxEthDB_p.h"
+
+/* forward prototype declarations */
+IX_ETH_DB_PRIVATE MacTreeNode* ixEthDBTreeInsert(MacTreeNode *searchTree, MacDescriptor *descriptor);
+IX_ETH_DB_PRIVATE void ixEthDBCreateTrees(IxEthDBPortMap updatePorts);
+IX_ETH_DB_PRIVATE MacTreeNode* ixEthDBTreeRebalance(MacTreeNode *searchTree);
+IX_ETH_DB_PRIVATE void ixEthDBRebalanceTreeToVine(MacTreeNode *root, UINT32 *size);
+IX_ETH_DB_PRIVATE void ixEthDBRebalanceVineToTree(MacTreeNode *root, UINT32 size);
+IX_ETH_DB_PRIVATE void ixEthDBRebalanceCompression(MacTreeNode *root, UINT32 count);
+IX_ETH_DB_PRIVATE UINT32 ixEthDBRebalanceLog2Floor(UINT32 x);
+
+extern HashTable dbHashtable;
+
+/**
+ * @brief register types requiring automatic updates
+ *
+ * @param typeArray array indexed on record types, each
+ * element indicating whether the record type requires an
+ * automatic update (TRUE) or not (FALSE)
+ *
+ * Automatic updates are done for registered record types
+ * upon adding, updating (that is, updating the record portID)
+ * and removing records. Whenever an automatic update is triggered
+ * the appropriate ports will be provided with new database
+ * information.
+ *
+ * It is assumed that the typeArray parameter is allocated large
+ * enough to hold all the user defined types. Also, the type
+ * array should be initialized to FALSE as this function only
+ * caters for types which do require automatic updates.
+ *
+ * Note that this function should be called by the component
+ * initialization function.
+ *
+ * @return number of record types registered for automatic
+ * updates
+ *
+ * @internal
+ */
+IX_ETH_DB_PUBLIC
+UINT32 ixEthDBUpdateTypeRegister(BOOL *typeArray)
+{
+ typeArray[IX_ETH_DB_FILTERING_RECORD] = TRUE;
+ typeArray[IX_ETH_DB_FILTERING_VLAN_RECORD] = TRUE;
+
+ return 2;
+}
+
+/**
+ * @brief computes dependencies and triggers port learning tree updates
+ *
+ * @param triggerPorts port map consisting in the ports which triggered the update
+ *
+ * This function browses through all the ports and determines how to waterfall the update
+ * event from the trigger ports to all other ports depending on them.
+ *
+ * Once the list of ports to be updated is determined this function
+ * calls @ref ixEthDBCreateTrees.
+ *
+ * @internal
+ */
+IX_ETH_DB_PUBLIC
+void ixEthDBUpdatePortLearningTrees(IxEthDBPortMap triggerPorts)
+{
+ IxEthDBPortMap updatePorts;
+ UINT32 portIndex;
+
+ ixEthDBUpdateLock();
+
+ SET_EMPTY_DEPENDENCY_MAP(updatePorts);
+
+ for (portIndex = 0 ; portIndex < IX_ETH_DB_NUMBER_OF_PORTS ; portIndex++)
+ {
+ PortInfo *port = &ixEthDBPortInfo[portIndex];
+ BOOL mapsCollide;
+
+ MAPS_COLLIDE(mapsCollide, triggerPorts, port->dependencyPortMap);
+
+ if (mapsCollide /* do triggers influence this port? */
+ && !IS_PORT_INCLUDED(portIndex, updatePorts) /* and it's not already in the update list */
+ && port->updateMethod.updateEnabled) /* and we're allowed to update it */
+ {
+ IX_ETH_DB_UPDATE_TRACE("DB: (Update) Adding port %d to update set\n", portIndex);
+
+ JOIN_PORT_TO_MAP(updatePorts, portIndex);
+ }
+ else
+ {
+ IX_ETH_DB_UPDATE_TRACE("DB: (Update) Didn't add port %d to update set, reasons follow:\n", portIndex);
+
+ if (!mapsCollide)
+ {
+ IX_ETH_DB_UPDATE_TRACE("\tMaps don't collide on port %d\n", portIndex);
+ }
+
+ if (IS_PORT_INCLUDED(portIndex, updatePorts))
+ {
+ IX_ETH_DB_UPDATE_TRACE("\tPort %d is already in the update set\n", portIndex);
+ }
+
+ if (!port->updateMethod.updateEnabled)
+ {
+ IX_ETH_DB_UPDATE_TRACE("\tPort %d doesn't have updateEnabled set\n", portIndex);
+ }
+ }
+ }
+
+ IX_ETH_DB_UPDATE_TRACE("DB: (Update) Updating port set\n");
+
+ ixEthDBCreateTrees(updatePorts);
+
+ ixEthDBUpdateUnlock();
+}
+
+/**
+ * @brief creates learning trees and calls the port update handlers
+ *
+ * @param updatePorts set of ports in need of learning trees
+ *
+ * This function determines the optimal method of creating learning
+ * trees using a minimal number of database queries, keeping in mind
+ * that different ports can either use the same learning trees or they
+ * can partially share them. The actual tree building routine is
+ * @ref ixEthDBQuery.
+ *
+ * @internal
+ */
+IX_ETH_DB_PRIVATE
+void ixEthDBCreateTrees(IxEthDBPortMap updatePorts)
+{
+ UINT32 portIndex;
+ BOOL result;
+ BOOL portsLeft = TRUE;
+
+ while (portsLeft)
+ {
+ /* get port with minimal dependency map and NULL search tree */
+ UINT32 minPortIndex = MAX_PORT_SIZE;
+ UINT32 minimalSize = MAX_PORT_SIZE;
+
+ for (portIndex = 0 ; portIndex < IX_ETH_DB_NUMBER_OF_PORTS ; portIndex++)
+ {
+ UINT32 size;
+ PortInfo *port = &ixEthDBPortInfo[portIndex];
+
+ /* generate trees only for ports that need them */
+ if (!port->updateMethod.searchTreePendingWrite && IS_PORT_INCLUDED(portIndex, updatePorts))
+ {
+ GET_MAP_SIZE(port->dependencyPortMap, size);
+
+ IX_ETH_DB_UPDATE_TRACE("DB: (Update) Dependency map for port %d: size %d\n",
+ portIndex, size);
+
+ if (size < minimalSize)
+ {
+ minPortIndex = portIndex;
+ minimalSize = size;
+ }
+ }
+ else
+ {
+ IX_ETH_DB_UPDATE_TRACE("DB: (Update) Skipped port %d from tree diff (%s)\n", portIndex,
+ port->updateMethod.searchTreePendingWrite ? "pending write access" : "ignored by query");
+ }
+ }
+
+ /* if a port was found than minimalSize is not MAX_PORT_SIZE */
+ if (minimalSize != MAX_PORT_SIZE)
+ {
+ /* minPortIndex is the port we seek */
+ PortInfo *port = &ixEthDBPortInfo[minPortIndex];
+
+ IxEthDBPortMap query;
+ MacTreeNode *baseTree;
+
+ /* now try to find a port with minimal map difference */
+ PortInfo *minimalDiffPort = NULL;
+ UINT32 minimalDiff = MAX_PORT_SIZE;
+
+ IX_ETH_DB_UPDATE_TRACE("DB: (Update) Minimal size port is %d\n", minPortIndex);
+
+ for (portIndex = 0 ; portIndex < IX_ETH_DB_NUMBER_OF_PORTS ; portIndex++)
+ {
+ PortInfo *diffPort = &ixEthDBPortInfo[portIndex];
+ BOOL mapIsSubset;
+
+ IS_MAP_SUBSET(mapIsSubset, diffPort->dependencyPortMap, port->dependencyPortMap);
+
+
+ if (portIndex != minPortIndex
+ && diffPort->updateMethod.searchTree != NULL
+ && mapIsSubset)
+ {
+ /* compute size and pick only minimal size difference */
+ UINT32 diffPortSize;
+ UINT32 sizeDifference;
+
+ GET_MAP_SIZE(diffPort->dependencyPortMap, diffPortSize);
+
+ IX_ETH_DB_UPDATE_TRACE("DB: (Update) Checking port %d for differences...\n", portIndex);
+
+ sizeDifference = minimalSize - diffPortSize;
+
+ if (sizeDifference < minimalDiff)
+ {
+ minimalDiffPort = diffPort;
+ minimalDiff = sizeDifference;
+
+ IX_ETH_DB_UPDATE_TRACE("DB: (Update) Minimal difference 0x%x was found on port %d\n",
+ minimalDiff, portIndex);
+ }
+ }
+ }
+
+ /* check if filtering is enabled on this port */
+ if ((port->featureStatus & IX_ETH_DB_FILTERING) != 0)
+ {
+ /* if minimalDiff is not MAX_PORT_SIZE minimalDiffPort points to the most similar port */
+ if (minimalDiff != MAX_PORT_SIZE)
+ {
+ baseTree = ixEthDBCloneMacTreeNode(minimalDiffPort->updateMethod.searchTree);
+ DIFF_MAPS(query, port->dependencyPortMap , minimalDiffPort->dependencyPortMap);
+
+ IX_ETH_DB_UPDATE_TRACE("DB: (Update) Found minimal diff, extending tree %d on query\n",
+ minimalDiffPort->portID);
+ }
+ else /* .. otherwise no similar port was found, build tree from scratch */
+ {
+ baseTree = NULL;
+
+ COPY_DEPENDENCY_MAP(query, port->dependencyPortMap);
+
+ IX_ETH_DB_UPDATE_TRACE("DB: (Update) No similar diff, creating tree from query\n");
+ }
+
+ IS_EMPTY_DEPENDENCY_MAP(result, query);
+
+ if (!result) /* otherwise we don't need anything more on top of the cloned tree */
+ {
+ IX_ETH_DB_UPDATE_TRACE("DB: (Update) Adding query tree to port %d\n", minPortIndex);
+
+ /* build learning tree */
+ port->updateMethod.searchTree = ixEthDBQuery(baseTree, query, IX_ETH_DB_ALL_FILTERING_RECORDS, MAX_ELT_SIZE);
+ }
+ else
+ {
+ IX_ETH_DB_UPDATE_TRACE("DB: (Update) Query is empty, assuming identical nearest tree\n");
+
+ port->updateMethod.searchTree = baseTree;
+ }
+ }
+ else
+ {
+ /* filtering is not enabled, will download an empty tree */
+ if (port->updateMethod.searchTree != NULL)
+ {
+ ixEthDBFreeMacTreeNode(port->updateMethod.searchTree);
+ }
+
+ port->updateMethod.searchTree = NULL;
+ }
+
+ /* mark tree as valid */
+ port->updateMethod.searchTreePendingWrite = TRUE;
+ }
+ else
+ {
+ portsLeft = FALSE;
+
+ IX_ETH_DB_UPDATE_TRACE("DB: (Update) No trees to create this round\n");
+ }
+ }
+
+ for (portIndex = 0 ; portIndex < IX_ETH_DB_NUMBER_OF_PORTS ; portIndex++)
+ {
+ PortInfo *updatePort = &ixEthDBPortInfo[portIndex];
+
+ if (updatePort->updateMethod.searchTreePendingWrite)
+ {
+ IX_ETH_DB_UPDATE_TRACE("DB: (PortUpdate) Starting procedure to upload new search tree (%snull) into NPE %d\n",
+ updatePort->updateMethod.searchTree != NULL ? "not " : "",
+ portIndex);
+
+ updatePort->updateMethod.updateHandler(portIndex, IX_ETH_DB_FILTERING_RECORD);
+ }
+ }
+}
+
+/**
+ * @brief standard NPE update handler
+ *
+ * @param portID id of the port to be updated
+ * @param type record type to be pushed during this update
+ *
+ * The NPE update handler manages updating the NPE databases
+ * given a certain record type.
+ *
+ * @internal
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBNPEUpdateHandler(IxEthDBPortId portID, IxEthDBRecordType type)
+{
+ UINT32 epDelta, blockCount;
+ IxNpeMhMessage message;
+ UINT32 treeSize = 0;
+ PortInfo *port = &ixEthDBPortInfo[portID];
+
+ /* size selection and type check */
+ if (type == IX_ETH_DB_FILTERING_RECORD || type == IX_ETH_DB_WIFI_RECORD)
+ {
+ treeSize = FULL_ELT_BYTE_SIZE;
+ }
+ else if (type == IX_ETH_DB_FIREWALL_RECORD)
+ {
+ treeSize = FULL_FW_BYTE_SIZE;
+ }
+ else
+ {
+ return IX_ETH_DB_INVALID_ARG;
+ }
+
+ /* serialize tree into memory */
+ ixEthDBNPETreeWrite(type, treeSize, port->updateMethod.npeUpdateZone, port->updateMethod.searchTree, &epDelta, &blockCount);
+
+ /* free internal copy */
+ if (port->updateMethod.searchTree != NULL)
+ {
+ ixEthDBFreeMacTreeNode(port->updateMethod.searchTree);
+ }
+
+ /* forget last used search tree */
+ port->updateMethod.searchTree = NULL;
+ port->updateMethod.searchTreePendingWrite = FALSE;
+
+ /* dependending on the update type we do different things */
+ if (type == IX_ETH_DB_FILTERING_RECORD || type == IX_ETH_DB_WIFI_RECORD)
+ {
+ IX_STATUS result;
+
+ FILL_SETMACADDRESSDATABASE_MSG(message, IX_ETH_DB_PORT_ID_TO_NPE_LOGICAL_ID(portID),
+ epDelta, blockCount,
+ IX_OSAL_MMU_VIRT_TO_PHYS(port->updateMethod.npeUpdateZone));
+
+ IX_ETHDB_SEND_NPE_MSG(IX_ETH_DB_PORT_ID_TO_NPE(portID), message, result);
+
+ if (result == IX_SUCCESS)
+ {
+ IX_ETH_DB_UPDATE_TRACE("DB: (PortUpdate) Finished downloading NPE tree on port %d\n", portID);
+ }
+ else
+ {
+ ixEthDBPortInfo[portID].agingEnabled = FALSE;
+ ixEthDBPortInfo[portID].updateMethod.updateEnabled = FALSE;
+ ixEthDBPortInfo[portID].updateMethod.userControlled = TRUE;
+
+ ERROR_LOG("EthDB: (PortUpdate) disabling aging and updates on port %d (assumed dead)\n", portID);
+
+ ixEthDBDatabaseClear(portID, IX_ETH_DB_ALL_RECORD_TYPES);
+
+ return IX_ETH_DB_FAIL;
+ }
+
+ return IX_ETH_DB_SUCCESS;
+ }
+ else if (type == IX_ETH_DB_FIREWALL_RECORD)
+ {
+ return ixEthDBFirewallUpdate(portID, port->updateMethod.npeUpdateZone, epDelta);
+ }
+
+ return IX_ETH_DB_INVALID_ARG;
+}
+
+/**
+ * @brief queries the database for a set of records to be inserted into a given tree
+ *
+ * @param searchTree pointer to a tree where insertions will be performed; can be NULL
+ * @param query set of ports that a database record must match to be inserted into the tree
+ *
+ * The query method browses through the database, extracts all the descriptors matching
+ * the given query parameter and inserts them into the given learning tree.
+ * Note that this is an append procedure, the given tree needs not to be empty.
+ * A "descriptor matching the query" is a descriptor whose port id is in the query map.
+ * If the given tree is empty (NULL) a new tree is created and returned.
+ *
+ * @return the tree root
+ *
+ * @internal
+ */
+IX_ETH_DB_PUBLIC
+MacTreeNode* ixEthDBQuery(MacTreeNode *searchTree, IxEthDBPortMap query, IxEthDBRecordType recordFilter, UINT32 maxEntries)
+{
+ HashIterator iterator;
+ UINT32 entryCount = 0;
+
+ /* browse database */
+ BUSY_RETRY(ixEthDBInitHashIterator(&dbHashtable, &iterator));
+
+ while (IS_ITERATOR_VALID(&iterator))
+ {
+ MacDescriptor *descriptor = (MacDescriptor *) iterator.node->data;
+
+ IX_ETH_DB_UPDATE_TRACE("DB: (PortUpdate) querying [%s]:%d on port map ... ",
+ mac2string(descriptor->macAddress),
+ descriptor->portID);
+
+ if ((descriptor->type & recordFilter) != 0
+ && IS_PORT_INCLUDED(descriptor->portID, query))
+ {
+ MacDescriptor *descriptorClone = ixEthDBCloneMacDescriptor(descriptor);
+
+ IX_ETH_DB_UPDATE_TRACE("match\n");
+
+ if (descriptorClone != NULL)
+ {
+ /* add descriptor to tree */
+ searchTree = ixEthDBTreeInsert(searchTree, descriptorClone);
+
+ entryCount++;
+ }
+ }
+ else
+ {
+ IX_ETH_DB_UPDATE_TRACE("no match\n");
+ }
+
+ if (entryCount < maxEntries)
+ {
+ /* advance to the next record */
+ BUSY_RETRY(ixEthDBIncrementHashIterator(&dbHashtable, &iterator));
+ }
+ else
+ {
+ /* the NPE won't accept more entries so we can stop now */
+ ixEthDBReleaseHashIterator(&iterator);
+
+ IX_ETH_DB_UPDATE_TRACE("DB: (PortUpdate) number of elements reached maximum supported by port\n");
+
+ break;
+ }
+ }
+
+ IX_ETH_DB_UPDATE_TRACE("DB: (PortUpdate) query inserted %d records in the search tree\n", entryCount);
+
+ return ixEthDBTreeRebalance(searchTree);
+}
+
+/**
+ * @brief inserts a mac descriptor into an tree
+ *
+ * @param searchTree tree where the insertion is to be performed (may be NULL)
+ * @param descriptor descriptor to insert into tree
+ *
+ * @return the tree root
+ *
+ * @internal
+ */
+IX_ETH_DB_PRIVATE
+MacTreeNode* ixEthDBTreeInsert(MacTreeNode *searchTree, MacDescriptor *descriptor)
+{
+ MacTreeNode *currentNode = searchTree;
+ MacTreeNode *insertLocation = NULL;
+ MacTreeNode *newNode;
+ INT32 insertPosition = RIGHT;
+
+ if (descriptor == NULL)
+ {
+ return searchTree;
+ }
+
+ /* create a new node */
+ newNode = ixEthDBAllocMacTreeNode();
+
+ if (newNode == NULL)
+ {
+ /* out of memory */
+ ERROR_LOG("Warning: ixEthDBAllocMacTreeNode returned NULL in file %s:%d (out of memory?)\n", __FILE__, __LINE__);
+
+ ixEthDBFreeMacDescriptor(descriptor);
+
+ return NULL;
+ }
+
+ /* populate node */
+ newNode->descriptor = descriptor;
+
+ /* an empty initial tree is a special case */
+ if (searchTree == NULL)
+ {
+ return newNode;
+ }
+
+ /* get insertion location */
+ while (insertLocation == NULL)
+ {
+ MacTreeNode *nextNode;
+
+ /* compare given key with current node key */
+ insertPosition = ixEthDBAddressCompare(descriptor->macAddress, currentNode->descriptor->macAddress);
+
+ /* navigate down */
+ if (insertPosition == RIGHT)
+ {
+ nextNode = currentNode->right;
+ }
+ else if (insertPosition == LEFT)
+ {
+ nextNode = currentNode->left;
+ }
+ else
+ {
+ /* error, duplicate key */
+ ERROR_LOG("Warning: trapped insertion of a duplicate MAC address in an NPE search tree\n");
+
+ /* this will free the MAC descriptor as well */
+ ixEthDBFreeMacTreeNode(newNode);
+
+ return searchTree;
+ }
+
+ /* when we can no longer dive through the tree we found the insertion place */
+ if (nextNode != NULL)
+ {
+ currentNode = nextNode;
+ }
+ else
+ {
+ insertLocation = currentNode;
+ }
+ }
+
+ /* insert node */
+ if (insertPosition == RIGHT)
+ {
+ insertLocation->right = newNode;
+ }
+ else
+ {
+ insertLocation->left = newNode;
+ }
+
+ return searchTree;
+}
+
+/**
+ * @brief balance a tree
+ *
+ * @param searchTree tree to balance
+ *
+ * Converts a tree into a balanced tree and returns the root of
+ * the balanced tree. The resulting tree is <i>route balanced</i>
+ * not <i>perfectly balanced</i>. This makes no difference to the
+ * average tree search time which is the same in both cases, O(log2(n)).
+ *
+ * @return root of the balanced tree or NULL if there's no memory left
+ *
+ * @internal
+ */
+IX_ETH_DB_PRIVATE
+MacTreeNode* ixEthDBTreeRebalance(MacTreeNode *searchTree)
+{
+ MacTreeNode *pseudoRoot = ixEthDBAllocMacTreeNode();
+ UINT32 size;
+
+ if (pseudoRoot == NULL)
+ {
+ /* out of memory */
+ return NULL;
+ }
+
+ pseudoRoot->right = searchTree;
+
+ ixEthDBRebalanceTreeToVine(pseudoRoot, &size);
+ ixEthDBRebalanceVineToTree(pseudoRoot, size);
+
+ searchTree = pseudoRoot->right;
+
+ /* remove pseudoRoot right branch, otherwise it will free the entire tree */
+ pseudoRoot->right = NULL;
+
+ ixEthDBFreeMacTreeNode(pseudoRoot);
+
+ return searchTree;
+}
+
+/**
+ * @brief converts a tree into a vine
+ *
+ * @param root root of tree to convert
+ * @param size depth of vine (equal to the number of nodes in the tree)
+ *
+ * @internal
+ */
+IX_ETH_DB_PRIVATE
+void ixEthDBRebalanceTreeToVine(MacTreeNode *root, UINT32 *size)
+{
+ MacTreeNode *vineTail = root;
+ MacTreeNode *remainder = vineTail->right;
+ MacTreeNode *tempPtr;
+
+ *size = 0;
+
+ while (remainder != NULL)
+ {
+ if (remainder->left == NULL)
+ {
+ /* move tail down one */
+ vineTail = remainder;
+ remainder = remainder->right;
+ (*size)++;
+ }
+ else
+ {
+ /* rotate around remainder */
+ tempPtr = remainder->left;
+ remainder->left = tempPtr->right;
+ tempPtr->right = remainder;
+ remainder = tempPtr;
+ vineTail->right = tempPtr;
+ }
+ }
+}
+
+/**
+ * @brief converts a vine into a balanced tree
+ *
+ * @param root vine to convert
+ * @param size depth of vine
+ *
+ * @internal
+ */
+IX_ETH_DB_PRIVATE
+void ixEthDBRebalanceVineToTree(MacTreeNode *root, UINT32 size)
+{
+ UINT32 leafCount = size + 1 - (1 << ixEthDBRebalanceLog2Floor(size + 1));
+
+ ixEthDBRebalanceCompression(root, leafCount);
+
+ size = size - leafCount;
+
+ while (size > 1)
+ {
+ ixEthDBRebalanceCompression(root, size / 2);
+
+ size /= 2;
+ }
+}
+
+/**
+ * @brief compresses a vine/tree stage into a more balanced vine/tree
+ *
+ * @param root root of the tree to compress
+ * @param count number of "spine" nodes
+ *
+ * @internal
+ */
+IX_ETH_DB_PRIVATE
+void ixEthDBRebalanceCompression(MacTreeNode *root, UINT32 count)
+{
+ MacTreeNode *scanner = root;
+ MacTreeNode *child;
+ UINT32 local_index;
+
+ for (local_index = 0 ; local_index < count ; local_index++)
+ {
+ child = scanner->right;
+ scanner->right = child->right;
+ scanner = scanner->right;
+ child->right = scanner->left;
+ scanner->left = child;
+ }
+}
+
+/**
+ * @brief computes |_log2(x)_| (a.k.a. floor(log2(x)))
+ *
+ * @param x number to compute |_log2(x)_| for
+ *
+ * @return |_log2(x)_|
+ *
+ * @internal
+ */
+IX_ETH_DB_PRIVATE
+UINT32 ixEthDBRebalanceLog2Floor(UINT32 x)
+{
+ UINT32 log = 0;
+ UINT32 val = 1;
+
+ while (val < x)
+ {
+ log++;
+ val <<= 1;
+ }
+
+ return val == x ? log : log - 1;
+}
+
diff --git a/cpu/ixp/npe/IxEthDBReports.c b/cpu/ixp/npe/IxEthDBReports.c
new file mode 100644
index 0000000000..9c7ae1cc6a
--- /dev/null
+++ b/cpu/ixp/npe/IxEthDBReports.c
@@ -0,0 +1,652 @@
+/**
+ * @file IxEthDBAPI.c
+ *
+ * @brief Implementation of the public API
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+#include "IxEthDB_p.h"
+
+extern HashTable dbHashtable;
+IX_ETH_DB_PRIVATE void ixEthDBPortInfoShow(IxEthDBPortId portID, IxEthDBRecordType recordFilter);
+IX_ETH_DB_PRIVATE IxEthDBStatus ixEthDBHeaderShow(IxEthDBRecordType recordFilter);
+IX_ETH_DB_PUBLIC IxEthDBStatus ixEthDBDependencyPortMapShow(IxEthDBPortId portID, IxEthDBPortMap map);
+
+/**
+ * @brief displays a port dependency map
+ *
+ * @param portID ID of the port
+ * @param map port map to display
+ *
+ * @return IX_ETH_DB_SUCCESS if the operation completed
+ * successfully
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBDependencyPortMapShow(IxEthDBPortId portID, IxEthDBPortMap map)
+{
+ UINT32 portIndex;
+ BOOL mapSelf = TRUE, mapNone = TRUE, firstPort = TRUE;
+
+ /* dependency port maps */
+ printf("Dependency port map: ");
+
+ /* browse the port map */
+ for (portIndex = 0 ; portIndex < IX_ETH_DB_NUMBER_OF_PORTS ; portIndex++)
+ {
+ if (IS_PORT_INCLUDED(portIndex, map))
+ {
+ mapNone = FALSE;
+
+ if (portIndex != portID)
+ {
+ mapSelf = FALSE;
+ }
+
+ printf("%s%d", firstPort ? "{" : ", ", portIndex);
+
+ firstPort = FALSE;
+ }
+ }
+
+ if (mapNone)
+ {
+ mapSelf = FALSE;
+ }
+
+ printf("%s (%s)\n", firstPort ? "" : "}", mapSelf ? "self" : mapNone ? "none" : "group");
+
+ return IX_ETH_DB_SUCCESS;
+}
+
+/**
+ * @brief displays all the filtering records belonging to a port
+ *
+ * @param portID ID of the port to display
+ *
+ * Note that this function is documented in the main component
+ * header file, IxEthDB.h.
+ *
+ * @warning deprecated, use @ref ixEthDBFilteringDatabaseShowRecords()
+ * instead. Calling this function is equivalent to calling
+ * ixEthDBFilteringDatabaseShowRecords(portID, IX_ETH_DB_FILTERING_RECORD)
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBFilteringDatabaseShow(IxEthDBPortId portID)
+{
+ IxEthDBStatus local_result;
+ HashIterator iterator;
+ PortInfo *portInfo;
+ UINT32 recordCount = 0;
+
+ IX_ETH_DB_CHECK_PORT(portID);
+
+ IX_ETH_DB_CHECK_SINGLE_NPE(portID);
+
+ portInfo = &ixEthDBPortInfo[portID];
+
+ /* display table header */
+ printf("Ethernet database records for port ID [%d]\n", portID);
+
+ ixEthDBDependencyPortMapShow(portID, portInfo->dependencyPortMap);
+
+ if (ixEthDBPortDefinitions[portID].type == IX_ETH_NPE)
+ {
+ printf("NPE updates are %s\n\n", portInfo->updateMethod.updateEnabled ? "enabled" : "disabled");
+ }
+ else
+ {
+ printf("updates disabled (not an NPE)\n\n");
+ }
+
+ printf(" MAC address | Age | Type \n");
+ printf("___________________________________\n");
+
+ /* browse database */
+ BUSY_RETRY(ixEthDBInitHashIterator(&dbHashtable, &iterator));
+
+ while (IS_ITERATOR_VALID(&iterator))
+ {
+ MacDescriptor *descriptor = (MacDescriptor *) iterator.node->data;
+
+ if (descriptor->portID == portID && descriptor->type == IX_ETH_DB_FILTERING_RECORD)
+ {
+ recordCount++;
+
+ /* display entry */
+ printf(" %02X:%02X:%02X:%02X:%02X:%02X | %5d | %s\n",
+ descriptor->macAddress[0],
+ descriptor->macAddress[1],
+ descriptor->macAddress[2],
+ descriptor->macAddress[3],
+ descriptor->macAddress[4],
+ descriptor->macAddress[5],
+ descriptor->recordData.filteringData.age,
+ descriptor->recordData.filteringData.staticEntry ? "static" : "dynamic");
+ }
+
+ /* move to the next record */
+ BUSY_RETRY_WITH_RESULT(ixEthDBIncrementHashIterator(&dbHashtable, &iterator), local_result);
+
+ /* debug */
+ if (local_result == IX_ETH_DB_BUSY)
+ {
+ return IX_ETH_DB_FAIL;
+ }
+ }
+
+ /* display number of records */
+ printf("\nFound %d records\n", recordCount);
+
+ return IX_ETH_DB_SUCCESS;
+}
+
+/**
+ * @brief displays all the filtering records belonging to all the ports
+ *
+ * Note that this function is documented in the main component
+ * header file, IxEthDB.h.
+ *
+ * @warning deprecated, use @ref ixEthDBFilteringDatabaseShowRecords()
+ * instead. Calling this function is equivalent to calling
+ * ixEthDBFilteringDatabaseShowRecords(IX_ETH_DB_ALL_PORTS, IX_ETH_DB_FILTERING_RECORD)
+ */
+IX_ETH_DB_PUBLIC
+void ixEthDBFilteringDatabaseShowAll()
+{
+ IxEthDBPortId portIndex;
+
+ printf("\nEthernet learning/filtering database: listing %d ports\n\n", (UINT32) IX_ETH_DB_NUMBER_OF_PORTS);
+
+ for (portIndex = 0 ; portIndex < IX_ETH_DB_NUMBER_OF_PORTS ; portIndex++)
+ {
+ ixEthDBFilteringDatabaseShow(portIndex);
+
+ if (portIndex < IX_ETH_DB_NUMBER_OF_PORTS - 1)
+ {
+ printf("\n");
+ }
+ }
+}
+
+/**
+ * @brief displays one record in a format depending on the record filter
+ *
+ * @param descriptor pointer to the record
+ * @param recordFilter format filter
+ *
+ * This function will display the fields in a record depending on the
+ * selected record filter.
+ *
+ * @internal
+ */
+IX_ETH_DB_PRIVATE
+void ixEthDBRecordShow(MacDescriptor *descriptor, IxEthDBRecordType recordFilter)
+{
+ if (recordFilter == IX_ETH_DB_FILTERING_VLAN_RECORD
+ || recordFilter == (IX_ETH_DB_FILTERING_RECORD | IX_ETH_DB_FILTERING_VLAN_RECORD))
+ {
+ /* display VLAN record header - leave this commented code in place, its purpose is to align the print format with the header
+ printf(" MAC address | Age | Type | VLAN ID | CFI | QoS class \n");
+ printf("___________________________________________________________________\n"); */
+
+ if (descriptor->type == IX_ETH_DB_FILTERING_VLAN_RECORD)
+ {
+ printf("%02X:%02X:%02X:%02X:%02X:%02X | %3d | %s | %d | %d | %d\n",
+ descriptor->macAddress[0],
+ descriptor->macAddress[1],
+ descriptor->macAddress[2],
+ descriptor->macAddress[3],
+ descriptor->macAddress[4],
+ descriptor->macAddress[5],
+ descriptor->recordData.filteringVlanData.age,
+ descriptor->recordData.filteringVlanData.staticEntry ? "static" : "dynamic",
+ IX_ETH_DB_GET_VLAN_ID(descriptor->recordData.filteringVlanData.ieee802_1qTag),
+ (descriptor->recordData.filteringVlanData.ieee802_1qTag & 0x1000) >> 12,
+ IX_ETH_DB_GET_QOS_PRIORITY(descriptor->recordData.filteringVlanData.ieee802_1qTag));
+ }
+ else if (descriptor->type == IX_ETH_DB_FILTERING_RECORD)
+ {
+ printf("%02X:%02X:%02X:%02X:%02X:%02X | %3d | %s | - | - | -\n",
+ descriptor->macAddress[0],
+ descriptor->macAddress[1],
+ descriptor->macAddress[2],
+ descriptor->macAddress[3],
+ descriptor->macAddress[4],
+ descriptor->macAddress[5],
+ descriptor->recordData.filteringData.age,
+ descriptor->recordData.filteringData.staticEntry ? "static" : "dynamic");
+ }
+ }
+ else if (recordFilter == IX_ETH_DB_FILTERING_RECORD)
+ {
+ /* display filtering record header - leave this commented code in place, its purpose is to align the print format with the header
+ printf(" MAC address | Age | Type \n");
+ printf("_______________________________________\n"); */
+
+ if (descriptor->type == IX_ETH_DB_FILTERING_RECORD)
+ {
+ printf("%02X:%02X:%02X:%02X:%02X:%02X | %3d | %s \n",
+ descriptor->macAddress[0],
+ descriptor->macAddress[1],
+ descriptor->macAddress[2],
+ descriptor->macAddress[3],
+ descriptor->macAddress[4],
+ descriptor->macAddress[5],
+ descriptor->recordData.filteringData.age,
+ descriptor->recordData.filteringData.staticEntry ? "static" : "dynamic");
+ }
+ }
+ else if (recordFilter == IX_ETH_DB_WIFI_RECORD)
+ {
+ /* display WiFi record header - leave this commented code in place, its purpose is to align the print format with the header
+ printf(" MAC address | GW MAC address \n");
+ printf("_______________________________________\n"); */
+
+ if (descriptor->type == IX_ETH_DB_WIFI_RECORD)
+ {
+ if (descriptor->recordData.wifiData.type == IX_ETH_DB_WIFI_AP_TO_AP)
+ {
+ /* gateway address present */
+ printf("%02X:%02X:%02X:%02X:%02X:%02X | %02X:%02X:%02X:%02X:%02X:%02X \n",
+ descriptor->macAddress[0],
+ descriptor->macAddress[1],
+ descriptor->macAddress[2],
+ descriptor->macAddress[3],
+ descriptor->macAddress[4],
+ descriptor->macAddress[5],
+ descriptor->recordData.wifiData.gwMacAddress[0],
+ descriptor->recordData.wifiData.gwMacAddress[1],
+ descriptor->recordData.wifiData.gwMacAddress[2],
+ descriptor->recordData.wifiData.gwMacAddress[3],
+ descriptor->recordData.wifiData.gwMacAddress[4],
+ descriptor->recordData.wifiData.gwMacAddress[5]);
+ }
+ else
+ {
+ /* no gateway */
+ printf("%02X:%02X:%02X:%02X:%02X:%02X | ----no gateway----- \n",
+ descriptor->macAddress[0],
+ descriptor->macAddress[1],
+ descriptor->macAddress[2],
+ descriptor->macAddress[3],
+ descriptor->macAddress[4],
+ descriptor->macAddress[5]);
+ }
+ }
+ }
+ else if (recordFilter == IX_ETH_DB_FIREWALL_RECORD)
+ {
+ /* display Firewall record header - leave this commented code in place, its purpose is to align the print format with the header
+ printf(" MAC address \n");
+ printf("__________________\n"); */
+
+ if (descriptor->type == IX_ETH_DB_FIREWALL_RECORD)
+ {
+ printf("%02X:%02X:%02X:%02X:%02X:%02X \n",
+ descriptor->macAddress[0],
+ descriptor->macAddress[1],
+ descriptor->macAddress[2],
+ descriptor->macAddress[3],
+ descriptor->macAddress[4],
+ descriptor->macAddress[5]);
+ }
+ }
+ else if (recordFilter == IX_ETH_DB_ALL_RECORD_TYPES)
+ {
+ /* display composite record header - leave this commented code in place, its purpose is to align the print format with the header
+ printf(" MAC address | Record | Age| Type | VLAN |CFI| QoS | GW MAC address \n");
+ printf("_______________________________________________________________________________\n"); */
+
+ if (descriptor->type == IX_ETH_DB_FILTERING_VLAN_RECORD)
+ {
+ printf("%02X:%02X:%02X:%02X:%02X:%02X | VLAN | %2d | %s | %4d | %1d | %1d | -----------------\n",
+ descriptor->macAddress[0],
+ descriptor->macAddress[1],
+ descriptor->macAddress[2],
+ descriptor->macAddress[3],
+ descriptor->macAddress[4],
+ descriptor->macAddress[5],
+ descriptor->recordData.filteringVlanData.age,
+ descriptor->recordData.filteringVlanData.staticEntry ? "static " : "dynamic",
+ IX_ETH_DB_GET_VLAN_ID(descriptor->recordData.filteringVlanData.ieee802_1qTag),
+ (descriptor->recordData.filteringVlanData.ieee802_1qTag & 0x1000) >> 12,
+ IX_ETH_DB_GET_QOS_PRIORITY(descriptor->recordData.filteringVlanData.ieee802_1qTag));
+ }
+ else if (descriptor->type == IX_ETH_DB_FILTERING_RECORD)
+ {
+ printf("%02X:%02X:%02X:%02X:%02X:%02X | Filter | %2d | %s | ---- | - | --- | -----------------\n",
+ descriptor->macAddress[0],
+ descriptor->macAddress[1],
+ descriptor->macAddress[2],
+ descriptor->macAddress[3],
+ descriptor->macAddress[4],
+ descriptor->macAddress[5],
+ descriptor->recordData.filteringData.age,
+ descriptor->recordData.filteringData.staticEntry ? "static " : "dynamic");
+ }
+ else if (descriptor->type == IX_ETH_DB_WIFI_RECORD)
+ {
+ if (descriptor->recordData.wifiData.type == IX_ETH_DB_WIFI_AP_TO_AP)
+ {
+ /* gateway address present */
+ printf("%02X:%02X:%02X:%02X:%02X:%02X | WiFi | -- | AP=>AP | ---- | - | --- | %02X:%02X:%02X:%02X:%02X:%02X\n",
+ descriptor->macAddress[0],
+ descriptor->macAddress[1],
+ descriptor->macAddress[2],
+ descriptor->macAddress[3],
+ descriptor->macAddress[4],
+ descriptor->macAddress[5],
+ descriptor->recordData.wifiData.gwMacAddress[0],
+ descriptor->recordData.wifiData.gwMacAddress[1],
+ descriptor->recordData.wifiData.gwMacAddress[2],
+ descriptor->recordData.wifiData.gwMacAddress[3],
+ descriptor->recordData.wifiData.gwMacAddress[4],
+ descriptor->recordData.wifiData.gwMacAddress[5]);
+ }
+ else
+ {
+ /* no gateway */
+ printf("%02X:%02X:%02X:%02X:%02X:%02X | WiFi | -- | AP=>ST | ---- | - | --- | -- no gateway -- \n",
+ descriptor->macAddress[0],
+ descriptor->macAddress[1],
+ descriptor->macAddress[2],
+ descriptor->macAddress[3],
+ descriptor->macAddress[4],
+ descriptor->macAddress[5]);
+ }
+ }
+ else if (descriptor->type == IX_ETH_DB_FIREWALL_RECORD)
+ {
+ printf("%02X:%02X:%02X:%02X:%02X:%02X | FW | -- | ------- | ---- | - | --- | -----------------\n",
+ descriptor->macAddress[0],
+ descriptor->macAddress[1],
+ descriptor->macAddress[2],
+ descriptor->macAddress[3],
+ descriptor->macAddress[4],
+ descriptor->macAddress[5]);
+ }
+ }
+ else
+ {
+ printf("invalid record filter\n");
+ }
+}
+
+/**
+ * @brief displays the status, records and configuration information of a port
+ *
+ * @param portID ID of the port
+ * @param recordFilter record filter to display
+ *
+ * @internal
+ */
+IX_ETH_DB_PRIVATE
+void ixEthDBPortInfoShow(IxEthDBPortId portID, IxEthDBRecordType recordFilter)
+{
+ PortInfo *portInfo = &ixEthDBPortInfo[portID];
+ UINT32 recordCount = 0;
+ HashIterator iterator;
+ IxEthDBStatus local_result;
+
+ /* display port status */
+ printf("== Port ID %d ==\n", portID);
+
+ /* display capabilities */
+ printf("- Capabilities: ");
+
+ if ((portInfo->featureCapability & IX_ETH_DB_LEARNING) != 0)
+ {
+ printf("Learning (%s) ", ((portInfo->featureStatus & IX_ETH_DB_LEARNING) != 0) ? "on" : "off");
+ }
+
+ if ((portInfo->featureCapability & IX_ETH_DB_VLAN_QOS) != 0)
+ {
+ printf("VLAN/QoS (%s) ", ((portInfo->featureStatus & IX_ETH_DB_VLAN_QOS) != 0) ? "on" : "off");
+ }
+
+ if ((portInfo->featureCapability & IX_ETH_DB_FIREWALL) != 0)
+ {
+ printf("Firewall (%s) ", ((portInfo->featureStatus & IX_ETH_DB_FIREWALL) != 0) ? "on" : "off");
+ }
+
+ if ((portInfo->featureCapability & IX_ETH_DB_WIFI_HEADER_CONVERSION) != 0)
+ {
+ printf("WiFi (%s) ", ((portInfo->featureStatus & IX_ETH_DB_WIFI_HEADER_CONVERSION) != 0) ? "on" : "off");
+ }
+
+ if ((portInfo->featureCapability & IX_ETH_DB_SPANNING_TREE_PROTOCOL) != 0)
+ {
+ printf("STP (%s) ", ((portInfo->featureStatus & IX_ETH_DB_SPANNING_TREE_PROTOCOL) != 0) ? "on" : "off");
+ }
+
+ printf("\n");
+
+ /* dependency map */
+ ixEthDBDependencyPortMapShow(portID, portInfo->dependencyPortMap);
+
+ /* NPE dynamic updates */
+ if (ixEthDBPortDefinitions[portID].type == IX_ETH_NPE)
+ {
+ printf(" - NPE dynamic update is %s\n", portInfo->updateMethod.updateEnabled ? "enabled" : "disabled");
+ }
+ else
+ {
+ printf(" - dynamic update disabled (not an NPE)\n");
+ }
+
+ if ((portInfo->featureCapability & IX_ETH_DB_WIFI_HEADER_CONVERSION) != 0)
+ {
+ if ((portInfo->featureStatus & IX_ETH_DB_WIFI_HEADER_CONVERSION) != 0)
+ {
+ /* WiFi header conversion */
+ if ((portInfo->frameControlDurationID
+ + portInfo->bbsid[0]
+ + portInfo->bbsid[1]
+ + portInfo->bbsid[2]
+ + portInfo->bbsid[3]
+ + portInfo->bbsid[4]
+ + portInfo->bbsid[5]) == 0)
+ {
+ printf(" - WiFi header conversion not configured\n");
+ }
+ else
+ {
+ printf(" - WiFi header conversion: BBSID [%02X:%02X:%02X:%02X:%02X:%02X], Frame Control 0x%X, Duration/ID 0x%X\n",
+ portInfo->bbsid[0],
+ portInfo->bbsid[1],
+ portInfo->bbsid[2],
+ portInfo->bbsid[3],
+ portInfo->bbsid[4],
+ portInfo->bbsid[5],
+ portInfo->frameControlDurationID >> 16,
+ portInfo->frameControlDurationID & 0xFFFF);
+ }
+ }
+ else
+ {
+ printf(" - WiFi header conversion not enabled\n");
+ }
+ }
+
+ /* Firewall */
+ if ((portInfo->featureCapability & IX_ETH_DB_FIREWALL) != 0)
+ {
+ if ((portInfo->featureStatus & IX_ETH_DB_FIREWALL) != 0)
+ {
+ printf(" - Firewall is in %s-list mode\n", portInfo->firewallMode == IX_ETH_DB_FIREWALL_BLACK_LIST ? "black" : "white");
+ printf(" - Invalid source MAC address filtering is %s\n", portInfo->srcAddressFilterEnabled ? "enabled" : "disabled");
+ }
+ else
+ {
+ printf(" - Firewall not enabled\n");
+ }
+ }
+
+ /* browse database if asked to display records */
+ if (recordFilter != IX_ETH_DB_NO_RECORD_TYPE)
+ {
+ printf("\n");
+ ixEthDBHeaderShow(recordFilter);
+
+ BUSY_RETRY(ixEthDBInitHashIterator(&dbHashtable, &iterator));
+
+ while (IS_ITERATOR_VALID(&iterator))
+ {
+ MacDescriptor *descriptor = (MacDescriptor *) iterator.node->data;
+
+ if (descriptor->portID == portID && (descriptor->type & recordFilter) != 0)
+ {
+ recordCount++;
+
+ /* display entry */
+ ixEthDBRecordShow(descriptor, recordFilter);
+ }
+
+ /* move to the next record */
+ BUSY_RETRY_WITH_RESULT(ixEthDBIncrementHashIterator(&dbHashtable, &iterator), local_result);
+
+ /* debug */
+ if (local_result == IX_ETH_DB_BUSY)
+ {
+ printf("EthDB (API): Error, database browser failed (no access), giving up\n");
+ }
+ }
+
+ printf("\nFound %d records\n\n", recordCount);
+ }
+}
+
+/**
+ * @brief displays a record header
+ *
+ * @param recordFilter record type filter
+ *
+ * This function displays a record header, depending on
+ * the given record type filter. It is useful when used
+ * in conjunction with ixEthDBRecordShow which will display
+ * record fields formatted for the header, provided the same
+ * record filter is used.
+ *
+ * @return IX_ETH_DB_SUCCESS if the operation completed
+ * successfully or IX_ETH_DB_INVALID_ARG if the recordFilter
+ * parameter is invalid or not supported
+ *
+ * @internal
+ */
+IX_ETH_DB_PRIVATE
+IxEthDBStatus ixEthDBHeaderShow(IxEthDBRecordType recordFilter)
+{
+ if (recordFilter == IX_ETH_DB_FILTERING_VLAN_RECORD
+ || recordFilter == (IX_ETH_DB_FILTERING_RECORD | IX_ETH_DB_FILTERING_VLAN_RECORD))
+ {
+ /* display VLAN record header */
+ printf(" MAC address | Age | Type | VLAN ID | CFI | QoS class \n");
+ printf("___________________________________________________________________\n");
+ }
+ else if (recordFilter == IX_ETH_DB_FILTERING_RECORD)
+ {
+ /* display filtering record header */
+ printf(" MAC address | Age | Type \n");
+ printf("_______________________________________\n");
+ }
+ else if (recordFilter == IX_ETH_DB_WIFI_RECORD)
+ {
+ /* display WiFi record header */
+ printf(" MAC address | GW MAC address \n");
+ printf("_______________________________________\n");
+ }
+ else if (recordFilter == IX_ETH_DB_FIREWALL_RECORD)
+ {
+ /* display Firewall record header */
+ printf(" MAC address \n");
+ printf("__________________\n");
+ }
+ else if (recordFilter == IX_ETH_DB_ALL_RECORD_TYPES)
+ {
+ /* display composite record header */
+ printf(" MAC address | Record | Age| Type | VLAN |CFI| QoS | GW MAC address \n");
+ printf("_______________________________________________________________________________\n");
+ }
+ else
+ {
+ return IX_ETH_DB_INVALID_ARG;
+ }
+
+ return IX_ETH_DB_SUCCESS;
+}
+
+/**
+ * @brief displays database information (records and port information)
+ *
+ * @param portID ID of the port to display (or IX_ETH_DB_ALL_PORTS for all the ports)
+ * @param recordFilter record filter (use IX_ETH_DB_NO_RECORD_TYPE to display only
+ * port information)
+ *
+ * Note that this function is documented in the main component header
+ * file, IxEthDB.h.
+ *
+ * @return IX_ETH_DB_SUCCESS if the operation completed successfully or
+ * an appropriate error code otherwise
+ *
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBFilteringDatabaseShowRecords(IxEthDBPortId portID, IxEthDBRecordType recordFilter)
+{
+ IxEthDBPortId currentPort;
+ BOOL showAllPorts = (portID == IX_ETH_DB_ALL_PORTS);
+
+ IX_ETH_DB_CHECK_PORT_ALL(portID);
+
+ printf("\nEthernet learning/filtering database: listing %d port(s)\n\n", showAllPorts ? (UINT32) IX_ETH_DB_NUMBER_OF_PORTS : 1);
+
+ currentPort = showAllPorts ? 0 : portID;
+
+ while (currentPort != IX_ETH_DB_NUMBER_OF_PORTS)
+ {
+ /* display port info */
+ ixEthDBPortInfoShow(currentPort, recordFilter);
+
+ /* next port */
+ currentPort = showAllPorts ? currentPort + 1 : IX_ETH_DB_NUMBER_OF_PORTS;
+ }
+
+ return IX_ETH_DB_SUCCESS;
+}
+
diff --git a/cpu/ixp/npe/IxEthDBSearch.c b/cpu/ixp/npe/IxEthDBSearch.c
new file mode 100644
index 0000000000..4a10878b68
--- /dev/null
+++ b/cpu/ixp/npe/IxEthDBSearch.c
@@ -0,0 +1,327 @@
+/**
+ * @file IxEthDBSearch.c
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+#include "IxEthDB_p.h"
+
+extern HashTable dbHashtable;
+
+/**
+ * @brief matches two database records based on their MAC addresses
+ *
+ * @param untypedReference record to match against
+ * @param untypedEntry record to match
+ *
+ * @return TRUE if the match is successful or FALSE otherwise
+ *
+ * @internal
+ */
+IX_ETH_DB_PUBLIC
+BOOL ixEthDBAddressRecordMatch(void *untypedReference, void *untypedEntry)
+{
+ MacDescriptor *entry = (MacDescriptor *) untypedEntry;
+ MacDescriptor *reference = (MacDescriptor *) untypedReference;
+
+ /* check accepted record types */
+ if ((entry->type & reference->type) == 0) return FALSE;
+
+ return (ixEthDBAddressCompare((UINT8 *) entry->macAddress, (UINT8 *) reference->macAddress) == 0);
+}
+
+/**
+ * @brief matches two database records based on their MAC addresses
+ * and VLAN IDs
+ *
+ * @param untypedReference record to match against
+ * @param untypedEntry record to match
+ *
+ * @return TRUE if the match is successful or FALSE otherwise
+ *
+ * @internal
+ */
+IX_ETH_DB_PUBLIC
+BOOL ixEthDBVlanRecordMatch(void *untypedReference, void *untypedEntry)
+{
+ MacDescriptor *entry = (MacDescriptor *) untypedEntry;
+ MacDescriptor *reference = (MacDescriptor *) untypedReference;
+
+ /* check accepted record types */
+ if ((entry->type & reference->type) == 0) return FALSE;
+
+ return (IX_ETH_DB_GET_VLAN_ID(entry->recordData.filteringVlanData.ieee802_1qTag) ==
+ IX_ETH_DB_GET_VLAN_ID(reference->recordData.filteringVlanData.ieee802_1qTag)) &&
+ (ixEthDBAddressCompare(entry->macAddress, reference->macAddress) == 0);
+}
+
+/**
+ * @brief matches two database records based on their MAC addresses
+ * and port IDs
+ *
+ * @param untypedReference record to match against
+ * @param untypedEntry record to match
+ *
+ * @return TRUE if the match is successful or FALSE otherwise
+ *
+ * @internal
+ */
+IX_ETH_DB_PUBLIC
+BOOL ixEthDBPortRecordMatch(void *untypedReference, void *untypedEntry)
+{
+ MacDescriptor *entry = (MacDescriptor *) untypedEntry;
+ MacDescriptor *reference = (MacDescriptor *) untypedReference;
+
+ /* check accepted record types */
+ if ((entry->type & reference->type) == 0) return FALSE;
+
+ return (entry->portID == reference->portID) &&
+ (ixEthDBAddressCompare(entry->macAddress, reference->macAddress) == 0);
+}
+
+/**
+ * @brief dummy matching function, registered for safety
+ *
+ * @param reference record to match against (unused)
+ * @param entry record to match (unused)
+ *
+ * This function is registered in the matching functions
+ * array on invalid types. Calling it will display an
+ * error message, indicating an error in the component logic.
+ *
+ * @return FALSE
+ *
+ * @internal
+ */
+IX_ETH_DB_PUBLIC
+BOOL ixEthDBNullMatch(void *reference, void *entry)
+{
+ /* display an error message */
+
+ ixOsalLog(IX_OSAL_LOG_LVL_WARNING, IX_OSAL_LOG_DEV_STDOUT, "DB: (Search) The NullMatch function was called, wrong key type?\n", 0, 0, 0, 0, 0, 0);
+
+
+ return FALSE;
+}
+
+/**
+ * @brief registers hash matching methods
+ *
+ * @param matchFunctions table of match functions to be populated
+ *
+ * This function registers the available record matching functions
+ * by indexing them on record types into the given function array.
+ *
+ * Note that it is compulsory to call this in ixEthDBInit(),
+ * otherwise hashtable searching and removal will not work
+ *
+ * @return number of registered functions
+ *
+ * @internal
+ */
+IX_ETH_DB_PUBLIC
+UINT32 ixEthDBMatchMethodsRegister(MatchFunction *matchFunctions)
+{
+ UINT32 i;
+
+ /* safety first */
+ for ( i = 0 ; i < IX_ETH_DB_MAX_KEY_INDEX + 1 ; i++)
+ {
+ matchFunctions[i] = ixEthDBNullMatch;
+ }
+
+ /* register MAC search method */
+ matchFunctions[IX_ETH_DB_MAC_KEY] = ixEthDBAddressRecordMatch;
+
+ /* register MAC/PortID search method */
+ matchFunctions[IX_ETH_DB_MAC_PORT_KEY] = ixEthDBPortRecordMatch;
+
+ /* register MAC/VLAN ID search method */
+ matchFunctions[IX_ETH_DB_MAC_VLAN_KEY] = ixEthDBVlanRecordMatch;
+
+ return 3; /* three methods */
+}
+
+/**
+ * @brief search a record in the Ethernet datbase
+ *
+ * @param macAddress MAC address to perform the search on
+ * @param typeFilter type of records to consider for matching
+ *
+ * @warning if searching is successful an implicit write lock
+ * to the search result is granted, therefore unlock the
+ * entry using @ref ixEthDBReleaseHashNode() as soon as possible.
+ *
+ * @see ixEthDBReleaseHashNode()
+ *
+ * @return the search result, or NULL if a record with the given
+ * MAC address was not found
+ *
+ * @internal
+ */
+IX_ETH_DB_PUBLIC
+HashNode* ixEthDBSearch(IxEthDBMacAddr *macAddress, IxEthDBRecordType typeFilter)
+{
+ HashNode *searchResult = NULL;
+ MacDescriptor reference;
+
+ TEST_FIXTURE_INCREMENT_DB_CORE_ACCESS_COUNTER;
+
+ if (macAddress == NULL)
+ {
+ return NULL;
+ }
+
+ /* fill search fields */
+ memcpy(reference.macAddress, macAddress, sizeof (IxEthDBMacAddr));
+
+ /* set acceptable record types */
+ reference.type = typeFilter;
+
+ BUSY_RETRY(ixEthDBSearchHashEntry(&dbHashtable, IX_ETH_DB_MAC_KEY, &reference, &searchResult));
+
+ return searchResult;
+}
+
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBPeek(IxEthDBMacAddr *macAddress, IxEthDBRecordType typeFilter)
+{
+ MacDescriptor reference;
+ IxEthDBStatus result;
+
+ TEST_FIXTURE_INCREMENT_DB_CORE_ACCESS_COUNTER;
+
+ if (macAddress == NULL)
+ {
+ return IX_ETH_DB_INVALID_ARG;
+ }
+
+ /* fill search fields */
+ memcpy(reference.macAddress, macAddress, sizeof (IxEthDBMacAddr));
+
+ /* set acceptable record types */
+ reference.type = typeFilter;
+
+ result = ixEthDBPeekHashEntry(&dbHashtable, IX_ETH_DB_MAC_KEY, &reference);
+
+ return result;
+}
+
+/**
+ * @brief search a record in the Ethernet datbase
+ *
+ * @param macAddress MAC address to perform the search on
+ * @param portID port ID to perform the search on
+ * @param typeFilter type of records to consider for matching
+ *
+ * @warning if searching is successful an implicit write lock
+ * to the search result is granted, therefore unlock the
+ * entry using @ref ixEthDBReleaseHashNode() as soon as possible.
+ *
+ * @see ixEthDBReleaseHashNode()
+ *
+ * @return the search result, or NULL if a record with the given
+ * MAC address/port ID combination was not found
+ *
+ * @internal
+ */
+IX_ETH_DB_PUBLIC
+HashNode* ixEthDBPortSearch(IxEthDBMacAddr *macAddress, IxEthDBPortId portID, IxEthDBRecordType typeFilter)
+{
+ HashNode *searchResult = NULL;
+ MacDescriptor reference;
+
+ if (macAddress == NULL)
+ {
+ return NULL;
+ }
+
+ /* fill search fields */
+ memcpy(reference.macAddress, macAddress, sizeof (IxEthDBMacAddr));
+ reference.portID = portID;
+
+ /* set acceptable record types */
+ reference.type = typeFilter;
+
+ BUSY_RETRY(ixEthDBSearchHashEntry(&dbHashtable, IX_ETH_DB_MAC_PORT_KEY, &reference, &searchResult));
+
+ return searchResult;
+}
+
+/**
+ * @brief search a record in the Ethernet datbase
+ *
+ * @param macAddress MAC address to perform the search on
+ * @param vlanID VLAN ID to perform the search on
+ * @param typeFilter type of records to consider for matching
+ *
+ * @warning if searching is successful an implicit write lock
+ * to the search result is granted, therefore unlock the
+ * entry using @ref ixEthDBReleaseHashNode() as soon as possible.
+ *
+ * @see ixEthDBReleaseHashNode()
+ *
+ * @return the search result, or NULL if a record with the given
+ * MAC address/VLAN ID combination was not found
+ *
+ * @internal
+ */
+IX_ETH_DB_PUBLIC
+HashNode* ixEthDBVlanSearch(IxEthDBMacAddr *macAddress, IxEthDBVlanId vlanID, IxEthDBRecordType typeFilter)
+{
+ HashNode *searchResult = NULL;
+ MacDescriptor reference;
+
+ if (macAddress == NULL)
+ {
+ return NULL;
+ }
+
+ /* fill search fields */
+ memcpy(reference.macAddress, macAddress, sizeof (IxEthDBMacAddr));
+ reference.recordData.filteringVlanData.ieee802_1qTag =
+ IX_ETH_DB_SET_VLAN_ID(reference.recordData.filteringVlanData.ieee802_1qTag, vlanID);
+
+ /* set acceptable record types */
+ reference.type = typeFilter;
+
+ BUSY_RETRY(ixEthDBSearchHashEntry(&dbHashtable, IX_ETH_DB_MAC_VLAN_KEY, &reference, &searchResult));
+
+ return searchResult;
+}
diff --git a/cpu/ixp/npe/IxEthDBSpanningTree.c b/cpu/ixp/npe/IxEthDBSpanningTree.c
new file mode 100644
index 0000000000..6d9fd6ec18
--- /dev/null
+++ b/cpu/ixp/npe/IxEthDBSpanningTree.c
@@ -0,0 +1,107 @@
+/**
+ * @file IxEthDBSpanningTree.c
+ *
+ * @brief Implementation of the STP API
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+
+#include "IxEthDB_p.h"
+
+/**
+ * @brief sets the STP blocking state of a port
+ *
+ * @param portID ID of the port
+ * @param blocked TRUE to block the port or FALSE to unblock it
+ *
+ * Note that this function is documented in the main component
+ * header file, IxEthDB.h.
+ *
+ * @return IX_ETH_DB_SUCCESS if the operation completed successfully
+ * or an appropriate error message otherwise
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBSpanningTreeBlockingStateSet(IxEthDBPortId portID, BOOL blocked)
+{
+ IxNpeMhMessage message;
+ IX_STATUS result;
+
+ IX_ETH_DB_CHECK_PORT(portID);
+
+ IX_ETH_DB_CHECK_SINGLE_NPE(portID);
+
+ IX_ETH_DB_CHECK_FEATURE(portID, IX_ETH_DB_SPANNING_TREE_PROTOCOL);
+
+ ixEthDBPortInfo[portID].stpBlocked = blocked;
+
+ FILL_SETBLOCKINGSTATE_MSG(message, portID, blocked);
+
+ IX_ETHDB_SEND_NPE_MSG(IX_ETH_DB_PORT_ID_TO_NPE(portID), message, result);
+
+ return result;
+}
+
+/**
+ * @brief retrieves the STP blocking state of a port
+ *
+ * @param portID ID of the port
+ * @param blocked address to write the blocked status into
+ *
+ * Note that this function is documented in the main component
+ * header file, IxEthDB.h.
+ *
+ * @return IX_ETH_DB_SUCCESS if the operation completed successfully
+ * or an appropriate error message otherwise
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBSpanningTreeBlockingStateGet(IxEthDBPortId portID, BOOL *blocked)
+{
+ IX_ETH_DB_CHECK_PORT(portID);
+
+ IX_ETH_DB_CHECK_SINGLE_NPE(portID);
+
+ IX_ETH_DB_CHECK_FEATURE(portID, IX_ETH_DB_SPANNING_TREE_PROTOCOL);
+
+ IX_ETH_DB_CHECK_REFERENCE(blocked);
+
+ *blocked = ixEthDBPortInfo[portID].stpBlocked;
+
+ return IX_ETH_DB_SUCCESS;
+}
diff --git a/cpu/ixp/npe/IxEthDBUtil.c b/cpu/ixp/npe/IxEthDBUtil.c
new file mode 100644
index 0000000000..e708bf1bce
--- /dev/null
+++ b/cpu/ixp/npe/IxEthDBUtil.c
@@ -0,0 +1,120 @@
+/**
+ * @file ethUtil.c
+ *
+ * @brief Utility functions
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+
+#include "IxFeatureCtrl.h"
+#include "IxEthDB_p.h"
+
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBSingleEthNpeCheck(IxEthDBPortId portID)
+{
+ /* If not IXP42X A0 stepping, proceed to check for existence of coprocessors */
+ if ((IX_FEATURE_CTRL_SILICON_TYPE_A0 !=
+ (ixFeatureCtrlProductIdRead() & IX_FEATURE_CTRL_SILICON_STEPPING_MASK))
+ || (IX_FEATURE_CTRL_DEVICE_TYPE_IXP42X != ixFeatureCtrlDeviceRead ()))
+ {
+ if ((portID == 0) &&
+ (ixFeatureCtrlComponentCheck(IX_FEATURECTRL_ETH0) ==
+ IX_FEATURE_CTRL_COMPONENT_DISABLED))
+ {
+ return IX_ETH_DB_FAIL;
+ }
+
+ if ((portID == 1) &&
+ (ixFeatureCtrlComponentCheck(IX_FEATURECTRL_ETH1) ==
+ IX_FEATURE_CTRL_COMPONENT_DISABLED))
+ {
+ return IX_ETH_DB_FAIL;
+ }
+
+ if ((portID == 2) &&
+ (ixFeatureCtrlComponentCheck(IX_FEATURECTRL_NPEA_ETH) ==
+ IX_FEATURE_CTRL_COMPONENT_DISABLED))
+ {
+ return IX_ETH_DB_FAIL;
+ }
+ }
+
+ return IX_ETH_DB_SUCCESS;
+}
+
+IX_ETH_DB_PUBLIC
+BOOL ixEthDBCheckSingleBitValue(UINT32 value)
+{
+#if (CPU != SIMSPARCSOLARIS) && !defined (__wince)
+ UINT32 shift;
+
+ /* use the count-leading-zeros XScale instruction */
+ __asm__ ("clz %0, %1\n" : "=r" (shift) : "r" (value));
+
+ return ((value << shift) == 0x80000000UL);
+
+#else
+
+ while (value != 0)
+ {
+ if (value == 1) return TRUE;
+ else if ((value & 1) == 1) return FALSE;
+
+ value >>= 1;
+ }
+
+ return FALSE;
+
+#endif
+}
+
+const char *mac2string(const unsigned char *mac)
+{
+ static char str[19];
+
+ if (mac == NULL)
+ {
+ return NULL;
+ }
+
+ sprintf(str, "%02X:%02X:%02X:%02X:%02X:%02X", mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
+
+ return str;
+}
diff --git a/cpu/ixp/npe/IxEthDBVlan.c b/cpu/ixp/npe/IxEthDBVlan.c
new file mode 100644
index 0000000000..e2efb9b339
--- /dev/null
+++ b/cpu/ixp/npe/IxEthDBVlan.c
@@ -0,0 +1,1179 @@
+/**
+ * @file IxEthDBVlan.c
+ *
+ * @brief Implementation of the VLAN API
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+#include "IxEthDB.h"
+#include "IxEthDB_p.h"
+
+/* forward prototypes */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBUpdateTrafficClass(IxEthDBPortId portID, UINT32 classIndex);
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBVlanTableGet(IxEthDBPortId portID, IxEthDBVlanSet portVlanTable, IxEthDBVlanSet vlanSet);
+
+/* contants used by various functions as "action" parameter */
+#define ADD_VLAN (0x1)
+#define REMOVE_VLAN (0x2)
+
+/**
+ * @brief adds or removes a VLAN from a VLAN set
+ *
+ * @param vlanID VLAN ID to add or remove
+ * @param table VLAN set to add into or remove from
+ * @param action ADD_VLAN or REMOVE_VLAN
+ *
+ * @internal
+ */
+IX_ETH_DB_PRIVATE
+void ixEthDBLocalVlanMembershipChange(UINT32 vlanID, IxEthDBVlanSet table, UINT32 action)
+{
+ UINT32 setOffset;
+
+ /* add/remove VID to membership table */
+ setOffset = VLAN_SET_OFFSET(vlanID); /* we need 9 bits to index the 512 byte membership array */
+
+ if (action == ADD_VLAN)
+ {
+ table[setOffset] |= 1 << VLAN_SET_MASK(vlanID);
+ }
+ else if (action == REMOVE_VLAN)
+ {
+ table[setOffset] &= ~(1 << VLAN_SET_MASK(vlanID));
+ }
+}
+
+/**
+ * @brief updates a set of 8 VLANs in an NPE
+ *
+ * @param portID ID of the port
+ * @param setOffset offset of the 8 VLANs
+ *
+ * This function updates the VLAN membership table
+ * and Transmit Tagging Info table for 8 consecutive
+ * VLAN IDs indexed by setOffset.
+ *
+ * For example, a setOffset of 0 indexes VLAN IDs 0
+ * through 7, 1 indexes VLAN IDs 8 through 9 etc.
+ *
+ * @return IX_ETH_DB_SUCCESS if the operation completed
+ * successfully or an appropriate error message otherwise
+ *
+ * @internal
+ */
+IX_ETH_DB_PRIVATE
+IxEthDBStatus ixEthDBVlanTableEntryUpdate(IxEthDBPortId portID, UINT32 setOffset)
+{
+ PortInfo *portInfo = &ixEthDBPortInfo[portID];
+ IxNpeMhMessage message;
+ IX_STATUS result;
+
+ FILL_SETPORTVLANTABLEENTRY_MSG(message, IX_ETH_DB_PORT_ID_TO_NPE_LOGICAL_ID(portID),
+ 2 * setOffset,
+ portInfo->vlanMembership[setOffset],
+ portInfo->transmitTaggingInfo[setOffset]);
+
+ IX_ETHDB_SEND_NPE_MSG(IX_ETH_DB_PORT_ID_TO_NPE(portID), message, result);
+
+ return result;
+}
+
+/**
+ * @brief updates a VLAN range in an NPE
+ *
+ * @param portID ID of the port
+ *
+ * This function is similar to @ref ixEthDBVlanTableEntryUpdate
+ * except that it can update more than one VLAN set (up to
+ * the entire VLAN membership and TTI tables if the offset is 0
+ * and length is sizeof (IxEthDBVlanSet) (512 bytes).
+ *
+ * Updating the NPE via this method is slower as it requires
+ * a memory copy from SDRAM, hence it is recommended that the
+ * ixEthDBVlanTableEntryUpdate function is used where possible.
+ *
+ * @return IX_ETH_DB_SUCCESS if the operation completed
+ * successfully or an appropriate error message otherwise
+ *
+ * @internal
+ */
+IX_ETH_DB_PRIVATE
+IxEthDBStatus ixEthDBVlanTableRangeUpdate(IxEthDBPortId portID)
+{
+ PortInfo *portInfo = &ixEthDBPortInfo[portID];
+ UINT8 *vlanUpdateZone = (UINT8 *) portInfo->updateMethod.vlanUpdateZone;
+ IxNpeMhMessage message;
+ UINT32 setIndex;
+ IX_STATUS result;
+
+ /* copy membership info and transmit tagging into into exchange area */
+ for (setIndex = 0 ; setIndex < sizeof (portInfo->vlanMembership) ; setIndex++)
+ {
+ /* membership and TTI data are interleaved */
+ vlanUpdateZone[setIndex * 2] = portInfo->vlanMembership[setIndex];
+ vlanUpdateZone[setIndex * 2 + 1] = portInfo->transmitTaggingInfo[setIndex];
+ }
+
+ IX_OSAL_CACHE_FLUSH(vlanUpdateZone, FULL_VLAN_BYTE_SIZE);
+
+ /* build NPE message */
+ FILL_SETPORTVLANTABLERANGE_MSG(message, IX_ETH_DB_PORT_ID_TO_NPE_LOGICAL_ID(portID), 0, 0,
+ IX_OSAL_MMU_VIRT_TO_PHYS(vlanUpdateZone));
+
+ /* send message */
+ IX_ETHDB_SEND_NPE_MSG(IX_ETH_DB_PORT_ID_TO_NPE(portID), message, result);
+
+ return result;
+}
+
+/**
+ * @brief adds or removes a VLAN from a port's VLAN membership table
+ * or Transmit Tagging Information table
+ *
+ * @param portID ID of the port
+ * @param vlanID VLAN ID to add or remove
+ * @param table to add or remove from
+ * @param action ADD_VLAN or REMOVE_VLAN
+ *
+ * @return IX_ETH_DB_SUCCESS if the operation completed
+ * successfully or an appropriate error message otherwise
+ *
+ * @internal
+ */
+IX_ETH_DB_PRIVATE
+IxEthDBStatus ixEthDBPortVlanMembershipChange(IxEthDBPortId portID, IxEthDBVlanId vlanID, IxEthDBVlanSet table, UINT32 action)
+{
+ /* change VLAN in local membership table */
+ ixEthDBLocalVlanMembershipChange(vlanID, table, action);
+
+ /* send updated entry to NPE */
+ return ixEthDBVlanTableEntryUpdate(portID, VLAN_SET_OFFSET(vlanID));
+}
+
+/**
+ * @brief sets the default port VLAN tag (the lower 3 bytes are the PVID)
+ *
+ * @param portID ID of the port
+ * @param vlanTag port VLAN tag (802.1Q tag)
+ *
+ * Note that this function is documented in the main component
+ * header file, IxEthDB.h.
+ *
+ * @return IX_ETH_DB_SUCCESS if the operation completed successfully
+ * or an appropriate error message otherwise
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBPortVlanTagSet(IxEthDBPortId portID, IxEthDBVlanTag vlanTag)
+{
+ IxNpeMhMessage message;
+ IX_STATUS result;
+
+ IX_ETH_DB_CHECK_PORT(portID);
+
+ IX_ETH_DB_CHECK_SINGLE_NPE(portID);
+
+ IX_ETH_DB_CHECK_VLAN_TAG(vlanTag);
+
+ IX_ETH_DB_CHECK_FEATURE(portID, IX_ETH_DB_VLAN_QOS);
+
+ /* add VLAN ID to local membership table */
+ ixEthDBPortVlanMembershipChange(portID,
+ vlanTag & IX_ETH_DB_802_1Q_VLAN_MASK,
+ ixEthDBPortInfo[portID].vlanMembership,
+ ADD_VLAN);
+
+ /* set tag in portInfo */
+ ixEthDBPortInfo[portID].vlanTag = vlanTag;
+
+ /* build VLAN_SetDefaultRxVID message */
+ FILL_SETDEFAULTRXVID_MSG(message,
+ IX_ETH_DB_PORT_ID_TO_NPE_LOGICAL_ID(portID),
+ IX_IEEE802_1Q_VLAN_TPID,
+ vlanTag);
+
+ IX_ETHDB_SEND_NPE_MSG(IX_ETH_DB_PORT_ID_TO_NPE(portID), message, result);
+
+ return result;
+}
+
+/**
+ * @brief retrieves the default port VLAN tag (the lower 3 bytes are the PVID)
+ *
+ * @param portID ID of the port
+ * @param vlanTag address to write the port VLAN tag (802.1Q tag) into
+ *
+ * Note that this function is documented in the main component
+ * header file, IxEthDB.h.
+ *
+ * @return IX_ETH_DB_SUCCESS if the operation completed successfully
+ * or an appropriate error message otherwise
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBPortVlanTagGet(IxEthDBPortId portID, IxEthDBVlanTag *vlanTag)
+{
+ IX_ETH_DB_CHECK_PORT(portID);
+
+ IX_ETH_DB_CHECK_SINGLE_NPE(portID);
+
+ IX_ETH_DB_CHECK_FEATURE(portID, IX_ETH_DB_VLAN_QOS);
+
+ IX_ETH_DB_CHECK_REFERENCE(vlanTag);
+
+ *vlanTag = ixEthDBPortInfo[portID].vlanTag;
+
+ return IX_ETH_DB_SUCCESS;
+}
+
+/**
+ * @brief sets the VLAN tag (the lower 3 bytes are the PVID) of a
+ * database filtering record
+ *
+ * @param portID ID of the port
+ * @param vlanTag VLAN tag (802.1Q tag)
+ *
+ * Important: filtering records are automatically converted to
+ * IX_ETH_DB_FILTERING_VLAN record when added a VLAN tag.
+ *
+ * Note that this function is documented in the main component
+ * header file, IxEthDB.h.
+ *
+ * @return IX_ETH_DB_SUCCESS if the operation completed successfully
+ * or an appropriate error message otherwise
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBVlanTagSet(IxEthDBMacAddr *macAddr, IxEthDBVlanTag vlanTag)
+{
+ HashNode *searchResult;
+ MacDescriptor *descriptor;
+
+ IX_ETH_DB_CHECK_REFERENCE(macAddr);
+
+ IX_ETH_DB_CHECK_VLAN_TAG(vlanTag);
+
+ searchResult = ixEthDBSearch(macAddr, IX_ETH_DB_ALL_FILTERING_RECORDS);
+
+ if (searchResult == NULL)
+ {
+ return IX_ETH_DB_NO_SUCH_ADDR;
+ }
+
+ descriptor = (MacDescriptor *) searchResult->data;
+
+ /* set record type to VLAN if not already set */
+ descriptor->type = IX_ETH_DB_FILTERING_VLAN_RECORD;
+
+ /* add vlan tag */
+ descriptor->recordData.filteringVlanData.ieee802_1qTag = vlanTag;
+
+ /* transaction completed */
+ ixEthDBReleaseHashNode(searchResult);
+
+ return IX_ETH_DB_SUCCESS;
+}
+
+/**
+ * @brief retrieves the VLAN tag (the lower 3 bytes are the PVID) from a
+ * database VLAN filtering record
+ *
+ * @param portID ID of the port
+ * @param vlanTag address to write the VLAN tag (802.1Q tag) into
+ *
+ * Note that this function is documented in the main component
+ * header file, IxEthDB.h.
+ *
+ * @return IX_ETH_DB_SUCCESS if the operation completed successfully
+ * or an appropriate error message otherwise
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBVlanTagGet(IxEthDBMacAddr *macAddr, IxEthDBVlanTag *vlanTag)
+{
+ HashNode *searchResult;
+ MacDescriptor *descriptor;
+
+ IX_ETH_DB_CHECK_REFERENCE(macAddr);
+
+ IX_ETH_DB_CHECK_REFERENCE(vlanTag);
+
+ searchResult = ixEthDBSearch(macAddr, IX_ETH_DB_FILTERING_VLAN_RECORD);
+
+ if (searchResult == NULL)
+ {
+ return IX_ETH_DB_NO_SUCH_ADDR;
+ }
+
+ descriptor = (MacDescriptor *) searchResult->data;
+
+ /* get vlan tag */
+ *vlanTag = descriptor->recordData.filteringVlanData.ieee802_1qTag;
+
+ /* transaction completed */
+ ixEthDBReleaseHashNode(searchResult);
+
+ return IX_ETH_DB_SUCCESS;
+}
+
+/**
+ * @brief adds a VLAN to a port's VLAN membership table
+ *
+ * @param portID ID of the port
+ * @param vlanID VLAN ID to add
+ *
+ * Note that this function is documented in the main component
+ * header file, IxEthDB.h.
+ *
+ * @return IX_ETH_DB_SUCCESS if the operation completed successfully
+ * or an appropriate error message otherwise
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBPortVlanMembershipAdd(IxEthDBPortId portID, IxEthDBVlanId vlanID)
+{
+ IX_ETH_DB_CHECK_PORT(portID);
+
+ IX_ETH_DB_CHECK_SINGLE_NPE(portID);
+
+ IX_ETH_DB_CHECK_VLAN_ID(vlanID);
+
+ IX_ETH_DB_CHECK_FEATURE(portID, IX_ETH_DB_VLAN_QOS);
+
+ return ixEthDBPortVlanMembershipChange(portID, vlanID, ixEthDBPortInfo[portID].vlanMembership, ADD_VLAN);
+}
+
+/**
+ * @brief removes a VLAN from a port's VLAN membership table
+ *
+ * @param portID ID of the port
+ * @param vlanID VLAN ID to remove
+ *
+ * Note that this function is documented in the main component
+ * header file, IxEthDB.h.
+ *
+ * @return IX_ETH_DB_SUCCESS if the operation completed successfully
+ * or an appropriate error message otherwise
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBPortVlanMembershipRemove(IxEthDBPortId portID, IxEthDBVlanId vlanID)
+{
+ IX_ETH_DB_CHECK_PORT(portID);
+
+ IX_ETH_DB_CHECK_SINGLE_NPE(portID);
+
+ IX_ETH_DB_CHECK_FEATURE(portID, IX_ETH_DB_VLAN_QOS);
+
+ IX_ETH_DB_CHECK_VLAN_ID(vlanID);
+
+ /* for safety isolate only the VLAN ID in the tag (the lower 12 bits) */
+ vlanID = vlanID & IX_ETH_DB_802_1Q_VLAN_MASK;
+
+ /* check we're not asked to remove the default port VID */
+ if (vlanID == IX_ETH_DB_GET_VLAN_ID(ixEthDBPortInfo[portID].vlanTag))
+ {
+ return IX_ETH_DB_NO_PERMISSION;
+ }
+
+ return ixEthDBPortVlanMembershipChange(portID, vlanID, ixEthDBPortInfo[portID].vlanMembership, REMOVE_VLAN);
+}
+
+/**
+ * @brief adds or removes a VLAN range from a port's
+ * VLAN membership table or TTI table
+ *
+ * @param portID ID of the port
+ * @param vlanIDMin start of the VLAN range
+ * @param vlanIDMax end of the VLAN range
+ * @param table VLAN set to add or remove from
+ * @param action ADD_VLAN or REMOVE_VLAN
+ *
+ * @return IX_ETH_DB_SUCCESS if the operation completed successfully
+ * or an appropriate error message otherwise
+ *
+ * @internal
+ */
+IX_ETH_DB_PRIVATE
+IxEthDBStatus ixEthDBPortVlanMembershipRangeChange(IxEthDBPortId portID, IxEthDBVlanId vlanIDMin, IxEthDBVlanId vlanIDMax, IxEthDBVlanSet table, UINT32 action)
+{
+ UINT32 setOffsetMin, setOffsetMax;
+
+ IX_ETH_DB_CHECK_PORT(portID);
+
+ IX_ETH_DB_CHECK_SINGLE_NPE(portID);
+
+ IX_ETH_DB_CHECK_FEATURE(portID, IX_ETH_DB_VLAN_QOS);
+
+ IX_ETH_DB_CHECK_VLAN_ID(vlanIDMin);
+
+ IX_ETH_DB_CHECK_VLAN_ID(vlanIDMax);
+
+ /* for safety isolate only the VLAN ID in the tags (the lower 12 bits) */
+ vlanIDMin = vlanIDMin & IX_ETH_DB_802_1Q_VLAN_MASK;
+ vlanIDMax = vlanIDMax & IX_ETH_DB_802_1Q_VLAN_MASK;
+
+ /* is this a range? */
+ if (vlanIDMax < vlanIDMin)
+ {
+ return IX_ETH_DB_INVALID_VLAN;
+ }
+
+ /* check that we're not specifically asked to remove the default port VID */
+ if (action == REMOVE_VLAN && vlanIDMax == vlanIDMin && IX_ETH_DB_GET_VLAN_ID(ixEthDBPortInfo[portID].vlanTag) == vlanIDMin)
+ {
+ return IX_ETH_DB_NO_PERMISSION;
+ }
+
+ /* compute set offsets */
+ setOffsetMin = VLAN_SET_OFFSET(vlanIDMin);
+ setOffsetMax = VLAN_SET_OFFSET(vlanIDMax);
+
+ /* change VLAN range */
+ for (; vlanIDMin <= vlanIDMax ; vlanIDMin++)
+ {
+ /* change vlan in local membership table */
+ ixEthDBLocalVlanMembershipChange(vlanIDMin, table, action);
+ }
+
+ /* if the range is within one set (max 8 VLANs in one table byte) we can just update that entry in the NPE */
+ if (setOffsetMin == setOffsetMax)
+ {
+ /* send updated entry to NPE */
+ return ixEthDBVlanTableEntryUpdate(portID, setOffsetMin);
+ }
+ else
+ {
+ /* update a zone of the membership/transmit tag info table */
+ return ixEthDBVlanTableRangeUpdate(portID);
+ }
+}
+
+/**
+ * @brief adds a VLAN range to a port's VLAN membership table
+ *
+ * @param portID ID of the port
+ * @param vlanIDMin start of the VLAN range
+ * @param vlanIDMax end of the VLAN range
+ *
+ * Note that this function is documented in the main component
+ * header file, IxEthDB.h.
+ *
+ * @return IX_ETH_DB_SUCCESS if the operation completed successfully
+ * or an appropriate error message otherwise
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBPortVlanMembershipRangeAdd(IxEthDBPortId portID, IxEthDBVlanId vlanIDMin, IxEthDBVlanId vlanIDMax)
+{
+ IX_ETH_DB_CHECK_PORT(portID);
+
+ IX_ETH_DB_CHECK_SINGLE_NPE(portID);
+
+ return ixEthDBPortVlanMembershipRangeChange(portID, vlanIDMin, vlanIDMax, ixEthDBPortInfo[portID].vlanMembership, ADD_VLAN);
+}
+
+/**
+ * @brief removes a VLAN range from a port's VLAN membership table
+ *
+ * @param portID ID of the port
+ * @param vlanIDMin start of the VLAN range
+ * @param vlanIDMax end of the VLAN range
+ *
+ * Note that this function is documented in the main component
+ * header file, IxEthDB.h.
+ *
+ * @return IX_ETH_DB_SUCCESS if the operation completed successfully
+ * or an appropriate error message otherwise
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBPortVlanMembershipRangeRemove(IxEthDBPortId portID, IxEthDBVlanId vlanIDMin, IxEthDBVlanId vlanIDMax)
+{
+ IX_ETH_DB_CHECK_PORT(portID);
+
+ IX_ETH_DB_CHECK_SINGLE_NPE(portID);
+
+ return ixEthDBPortVlanMembershipRangeChange(portID, vlanIDMin, vlanIDMax, ixEthDBPortInfo[portID].vlanMembership, REMOVE_VLAN);
+}
+
+/**
+ * @brief sets a port's VLAN membership table or TTI table and
+ * updates the NPE VLAN configuration
+ *
+ * @param portID ID of the port
+ * @param portVlanTable port VLAN table to set
+ * @param vlanSet new set contents
+ *
+ * @return IX_ETH_DB_SUCCESS if the operation completed successfully
+ * or an appropriate error message otherwise
+ *
+ * @internal
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBPortVlanTableSet(IxEthDBPortId portID, IxEthDBVlanSet portVlanTable, IxEthDBVlanSet vlanSet)
+{
+ IX_ETH_DB_CHECK_PORT(portID);
+
+ IX_ETH_DB_CHECK_SINGLE_NPE(portID);
+
+ IX_ETH_DB_CHECK_FEATURE(portID, IX_ETH_DB_VLAN_QOS);
+
+ IX_ETH_DB_CHECK_REFERENCE(vlanSet);
+
+ memcpy(portVlanTable, vlanSet, sizeof (IxEthDBVlanSet));
+
+ return ixEthDBVlanTableRangeUpdate(portID);
+}
+
+/**
+ * @brief retireves a port's VLAN membership table or TTI table
+ *
+ * @param portID ID of the port
+ * @param portVlanTable port VLAN table to retrieve
+ * @param vlanSet address to
+ *
+ * @return IX_ETH_DB_SUCCESS if the operation completed successfully
+ * or an appropriate error message otherwise
+ *
+ * @internal
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBVlanTableGet(IxEthDBPortId portID, IxEthDBVlanSet portVlanTable, IxEthDBVlanSet vlanSet)
+{
+ IX_ETH_DB_CHECK_PORT(portID);
+
+ IX_ETH_DB_CHECK_SINGLE_NPE(portID);
+
+ IX_ETH_DB_CHECK_FEATURE(portID, IX_ETH_DB_VLAN_QOS);
+
+ IX_ETH_DB_CHECK_REFERENCE(vlanSet);
+
+ memcpy(vlanSet, portVlanTable, sizeof (IxEthDBVlanSet));
+
+ return IX_ETH_DB_SUCCESS;
+}
+
+/**
+ * @brief sets a port's VLAN membership table
+ *
+ * @param portID ID of the port
+ * @param vlanSet new VLAN membership table
+ *
+ * Note that this function is documented in the main component
+ * header file, IxEthDB.h.
+ *
+ * @return IX_ETH_DB_SUCCESS if the operation completed successfully
+ * or an appropriate error message otherwise
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBPortVlanMembershipSet(IxEthDBPortId portID, IxEthDBVlanSet vlanSet)
+{
+ IxEthDBVlanId vlanID;
+
+ IX_ETH_DB_CHECK_PORT(portID);
+
+ IX_ETH_DB_CHECK_SINGLE_NPE(portID);
+
+ IX_ETH_DB_CHECK_REFERENCE(vlanSet);
+
+ /* set the bit corresponding to the PVID just in case */
+ vlanID = IX_ETH_DB_GET_VLAN_ID(ixEthDBPortInfo[portID].vlanTag);
+ vlanSet[VLAN_SET_OFFSET(vlanID)] |= 1 << VLAN_SET_MASK(vlanID);
+
+ return ixEthDBPortVlanTableSet(portID, ixEthDBPortInfo[portID].vlanMembership, vlanSet);
+}
+
+/**
+ * @brief retrieves a port's VLAN membership table
+ *
+ * @param portID ID of the port
+ * @param vlanSet location to store the port's VLAN membership table
+ *
+ * Note that this function is documented in the main component
+ * header file, IxEthDB.h.
+ *
+ * @return IX_ETH_DB_SUCCESS if the operation completed successfully
+ * or an appropriate error message otherwise
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBPortVlanMembershipGet(IxEthDBPortId portID, IxEthDBVlanSet vlanSet)
+{
+ IX_ETH_DB_CHECK_PORT(portID);
+
+ IX_ETH_DB_CHECK_SINGLE_NPE(portID);
+
+ return ixEthDBVlanTableGet(portID, ixEthDBPortInfo[portID].vlanMembership, vlanSet);
+}
+
+/**
+ * @brief enables or disables Egress tagging for one VLAN ID
+ *
+ * @param portID ID of the port
+ * @param vlanID VLAN ID to enable or disable Egress tagging on
+ * @param enabled TRUE to enable and FALSE to disable tagging
+ *
+ * Note that this function is documented in the main component
+ * header file, IxEthDB.h.
+ *
+ * @return IX_ETH_DB_SUCCESS if the operation completed successfully
+ * or an appropriate error message otherwise
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBEgressVlanEntryTaggingEnabledSet(IxEthDBPortId portID, IxEthDBVlanId vlanID, BOOL enabled)
+{
+ IX_ETH_DB_CHECK_PORT(portID);
+
+ IX_ETH_DB_CHECK_SINGLE_NPE(portID);
+
+ IX_ETH_DB_CHECK_VLAN_ID(vlanID);
+
+ IX_ETH_DB_CHECK_FEATURE(portID, IX_ETH_DB_VLAN_QOS);
+
+ return ixEthDBPortVlanMembershipChange(portID, vlanID, ixEthDBPortInfo[portID].transmitTaggingInfo, enabled? ADD_VLAN : REMOVE_VLAN);
+}
+
+/**
+ * @brief retrieves the Egress tagging status for one VLAN ID
+ *
+ * @param portID ID of the port
+ * @param vlanID VLAN ID to retrieve the tagging status for
+ * @param enabled location to store the tagging status
+ * (TRUE - tagging enabled, FALSE - tagging disabled)
+ *
+ * Note that this function is documented in the main component
+ * header file, IxEthDB.h.
+ *
+ * @return IX_ETH_DB_SUCCESS if the operation completed successfully
+ * or an appropriate error message otherwise
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBEgressVlanEntryTaggingEnabledGet(IxEthDBPortId portID, IxEthDBVlanId vlanID, BOOL *enabled)
+{
+ IX_ETH_DB_CHECK_PORT(portID);
+
+ IX_ETH_DB_CHECK_SINGLE_NPE(portID);
+
+ IX_ETH_DB_CHECK_FEATURE(portID, IX_ETH_DB_VLAN_QOS);
+
+ IX_ETH_DB_CHECK_REFERENCE(enabled);
+
+ IX_ETH_DB_CHECK_VLAN_ID(vlanID);
+
+ *enabled = ((ixEthDBPortInfo[portID].transmitTaggingInfo[VLAN_SET_OFFSET(vlanID)] & (1 << VLAN_SET_MASK(vlanID))) != 0);
+
+ return IX_ETH_DB_SUCCESS;
+}
+
+/**
+ * @brief enables or disables Egress VLAN tagging for a VLAN range
+ *
+ * @param portID ID of the port
+ * @param vlanIDMin start of VLAN range
+ * @param vlanIDMax end of VLAN range
+ * @param enabled TRUE to enable or FALSE to disable VLAN tagging
+ *
+ * Note that this function is documented in the main component
+ * header file, IxEthDB.h.
+ *
+ * @return IX_ETH_DB_SUCCESS if the operation completed successfully
+ * or an appropriate error message otherwise
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBEgressVlanRangeTaggingEnabledSet(IxEthDBPortId portID, IxEthDBVlanId vlanIDMin, IxEthDBVlanId vlanIDMax, BOOL enabled)
+{
+ IX_ETH_DB_CHECK_PORT(portID);
+
+ IX_ETH_DB_CHECK_SINGLE_NPE(portID);
+
+ return ixEthDBPortVlanMembershipRangeChange(portID, vlanIDMin, vlanIDMax, ixEthDBPortInfo[portID].transmitTaggingInfo, enabled? ADD_VLAN : REMOVE_VLAN);
+}
+
+/**
+ * @brief sets the Egress VLAN tagging table (the Transmit Tagging
+ * Information table)
+ *
+ * @param portID ID of the port
+ * @param vlanSet new TTI table
+ *
+ * Note that this function is documented in the main component
+ * header file, IxEthDB.h.
+ *
+ * @return IX_ETH_DB_SUCCESS if the operation completed successfully
+ * or an appropriate error message otherwise
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBEgressVlanTaggingEnabledSet(IxEthDBPortId portID, IxEthDBVlanSet vlanSet)
+{
+ IxEthDBVlanId vlanID;
+
+ IX_ETH_DB_CHECK_PORT(portID);
+
+ IX_ETH_DB_CHECK_SINGLE_NPE(portID);
+
+ IX_ETH_DB_CHECK_REFERENCE(vlanSet);
+
+ /* set the PVID bit just in case */
+ vlanID = IX_ETH_DB_GET_VLAN_ID(ixEthDBPortInfo[portID].vlanTag);
+ vlanSet[VLAN_SET_OFFSET(vlanID)] |= 1 << VLAN_SET_MASK(vlanID);
+
+ return ixEthDBPortVlanTableSet(portID, ixEthDBPortInfo[portID].transmitTaggingInfo, vlanSet);
+}
+
+/**
+ * @brief retrieves the Egress VLAN tagging table (the Transmit
+ * Tagging Information table)
+ *
+ * @param portID ID of the port
+ * @param vlanSet location to store the port's TTI table
+ *
+ * Note that this function is documented in the main component
+ * header file, IxEthDB.h.
+ *
+ * @return IX_ETH_DB_SUCCESS if the operation completed successfully
+ * or an appropriate error message otherwise
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBEgressVlanTaggingEnabledGet(IxEthDBPortId portID, IxEthDBVlanSet vlanSet)
+{
+ IX_ETH_DB_CHECK_PORT(portID);
+
+ IX_ETH_DB_CHECK_SINGLE_NPE(portID);
+
+ return ixEthDBVlanTableGet(portID, ixEthDBPortInfo[portID].transmitTaggingInfo, vlanSet);
+}
+
+/**
+ * @brief sends the NPE the updated frame filter and default
+ * Ingress tagging
+ *
+ * @param portID ID of the port
+ *
+ * @return IX_ETH_DB_SUCCESS if the operation completed successfully
+ * or an appropriate error message otherwise
+ *
+ * @internal
+ */
+IX_ETH_DB_PRIVATE
+IxEthDBStatus ixEthDBIngressVlanModeUpdate(IxEthDBPortId portID)
+{
+ PortInfo *portInfo = &ixEthDBPortInfo[portID];
+ IxNpeMhMessage message;
+ IX_STATUS result;
+
+ FILL_SETRXTAGMODE_MSG(message, portID, portInfo->npeFrameFilter, portInfo->npeTaggingAction);
+ IX_ETHDB_SEND_NPE_MSG(IX_ETH_DB_PORT_ID_TO_NPE(portID), message, result);
+
+ return result;
+}
+
+/**
+ * @brief sets the default Ingress tagging behavior
+ *
+ * @param portID ID of the port
+ * @param taggingAction default tagging behavior
+ *
+ * Note that this function is documented in the main component
+ * header file, IxEthDB.h.
+ *
+ * @return IX_ETH_DB_SUCCESS if the operation completed successfully
+ * or an appropriate error message otherwise
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBIngressVlanTaggingEnabledSet(IxEthDBPortId portID, IxEthDBTaggingAction taggingAction)
+{
+ PortInfo *portInfo;
+
+ IX_ETH_DB_CHECK_PORT(portID);
+
+ IX_ETH_DB_CHECK_SINGLE_NPE(portID);
+
+ IX_ETH_DB_CHECK_FEATURE(portID, IX_ETH_DB_VLAN_QOS);
+
+ portInfo = &ixEthDBPortInfo[portID];
+
+ if (taggingAction == IX_ETH_DB_PASS_THROUGH)
+ {
+ portInfo->npeTaggingAction = 0x00;
+ }
+ else if (taggingAction == IX_ETH_DB_ADD_TAG)
+ {
+ portInfo->npeTaggingAction = 0x02;
+ }
+ else if (taggingAction == IX_ETH_DB_REMOVE_TAG)
+ {
+ portInfo->npeTaggingAction = 0x01;
+ }
+ else
+ {
+ return IX_ETH_DB_INVALID_ARG;
+ }
+
+ portInfo->taggingAction = taggingAction;
+
+ return ixEthDBIngressVlanModeUpdate(portID);
+}
+
+/**
+ * @brief retrieves the default Ingress tagging behavior of a port
+ *
+ * @param portID ID of the port
+ * @param taggingAction location to save the default tagging behavior
+ *
+ * Note that this function is documented in the main component
+ * header file, IxEthDB.h.
+ *
+ * @return IX_ETH_DB_SUCCESS if the operation completed successfully
+ * or an appropriate error message otherwise
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBIngressVlanTaggingEnabledGet(IxEthDBPortId portID, IxEthDBTaggingAction *taggingAction)
+{
+ IX_ETH_DB_CHECK_PORT(portID);
+
+ IX_ETH_DB_CHECK_SINGLE_NPE(portID);
+
+ IX_ETH_DB_CHECK_FEATURE(portID, IX_ETH_DB_VLAN_QOS);
+
+ IX_ETH_DB_CHECK_REFERENCE(taggingAction);
+
+ *taggingAction = ixEthDBPortInfo[portID].taggingAction;
+
+ return IX_ETH_DB_SUCCESS;
+}
+
+/**
+ * @brief sets the Ingress acceptable frame type filter
+ *
+ * @param portID ID of the port
+ * @param frameFilter acceptable frame type filter
+ *
+ * Note that this function is documented in the main component
+ * header file, IxEthDB.h.
+ *
+ * @return IX_ETH_DB_SUCCESS if the operation completed successfully
+ * or an appropriate error message otherwise
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBAcceptableFrameTypeSet(IxEthDBPortId portID, IxEthDBFrameFilter frameFilter)
+{
+ PortInfo *portInfo;
+ IxEthDBStatus result = IX_ETH_DB_SUCCESS;
+
+ IX_ETH_DB_CHECK_PORT(portID);
+
+ IX_ETH_DB_CHECK_SINGLE_NPE(portID);
+
+ IX_ETH_DB_CHECK_FEATURE(portID, IX_ETH_DB_VLAN_QOS);
+
+ /* check parameter range
+ the ORed value of the valid values is 0x7
+ a value having extra bits is invalid */
+ if ((frameFilter | 0x7) != 0x7 || frameFilter == 0)
+ {
+ return IX_ETH_DB_INVALID_ARG;
+ }
+
+ portInfo = &ixEthDBPortInfo[portID];
+
+ portInfo->frameFilter = frameFilter;
+ portInfo->npeFrameFilter = 0; /* allow all by default */
+
+ /* if accepting priority tagged but not all VLAN tagged
+ set the membership table to contain only VLAN ID 0
+ hence remove vlans 1-4094 and add VLAN ID 0 */
+ if (((frameFilter & IX_ETH_DB_PRIORITY_TAGGED_FRAMES) != 0)
+ && ((frameFilter & IX_ETH_DB_VLAN_TAGGED_FRAMES) == 0))
+ {
+ result = ixEthDBPortVlanMembershipRangeChange(portID,
+ 1, IX_ETH_DB_802_1Q_MAX_VLAN_ID, portInfo->vlanMembership, REMOVE_VLAN);
+
+ if (result == IX_ETH_DB_SUCCESS)
+ {
+ ixEthDBLocalVlanMembershipChange(0, portInfo->vlanMembership, ADD_VLAN);
+ result = ixEthDBVlanTableRangeUpdate(portID);
+ }
+ }
+
+ /* untagged only? */
+ if (frameFilter == IX_ETH_DB_UNTAGGED_FRAMES)
+ {
+ portInfo->npeFrameFilter = 0x01;
+ }
+
+ /* tagged only? */
+ if ((frameFilter & IX_ETH_DB_UNTAGGED_FRAMES) == 0)
+ {
+ portInfo->npeFrameFilter = 0x02;
+ }
+
+ if (result == IX_ETH_DB_SUCCESS)
+ {
+ result = ixEthDBIngressVlanModeUpdate(portID);
+ }
+
+ return result;
+}
+
+/**
+ * @brief retrieves the acceptable frame type filter for a port
+ *
+ * @param portID ID of the port
+ * @param frameFilter location to store the frame filter
+ *
+ * Note that this function is documented in the main component
+ * header file, IxEthDB.h.
+ *
+ * @return IX_ETH_DB_SUCCESS if the operation completed successfully
+ * or an appropriate error message otherwise
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBAcceptableFrameTypeGet(IxEthDBPortId portID, IxEthDBFrameFilter *frameFilter)
+{
+ IX_ETH_DB_CHECK_PORT(portID);
+
+ IX_ETH_DB_CHECK_SINGLE_NPE(portID);
+
+ IX_ETH_DB_CHECK_FEATURE(portID, IX_ETH_DB_VLAN_QOS);
+
+ IX_ETH_DB_CHECK_REFERENCE(frameFilter);
+
+ *frameFilter = ixEthDBPortInfo[portID].frameFilter;
+
+ return IX_ETH_DB_SUCCESS;
+}
+
+/**
+ * @brief sends an NPE the updated configuration related
+ * to one QoS priority (associated traffic class and AQM mapping)
+ *
+ * @param portID ID of the port
+ * @param classIndex QoS priority (traffic class index)
+ *
+ * @return IX_ETH_DB_SUCCESS if the operation completed successfully
+ * or an appropriate error message otherwise
+ *
+ * @internal
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBUpdateTrafficClass(IxEthDBPortId portID, UINT32 classIndex)
+{
+ IxNpeMhMessage message;
+ IX_STATUS result;
+
+ UINT32 trafficClass = ixEthDBPortInfo[portID].priorityTable[classIndex];
+ UINT32 aqmQueue = ixEthDBPortInfo[portID].ixEthDBTrafficClassAQMAssignments[trafficClass];
+
+ FILL_SETRXQOSENTRY(message, IX_ETH_DB_PORT_ID_TO_NPE_LOGICAL_ID(portID), classIndex, trafficClass, aqmQueue);
+
+ IX_ETHDB_SEND_NPE_MSG(IX_ETH_DB_PORT_ID_TO_NPE(portID), message, result);
+
+ return result;
+}
+
+/**
+ * @brief sets the priority mapping table
+ *
+ * @param portID ID of the port
+ * @param priorityTable new priority mapping table
+ *
+ * Note that this function is documented in the main component
+ * header file, IxEthDB.h.
+ *
+ * @return IX_ETH_DB_SUCCESS if the operation completed successfully
+ * or an appropriate error message otherwise
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBPriorityMappingTableSet(IxEthDBPortId portID, IxEthDBPriorityTable priorityTable)
+{
+ UINT32 classIndex;
+
+ IX_ETH_DB_CHECK_PORT(portID);
+
+ IX_ETH_DB_CHECK_SINGLE_NPE(portID);
+
+ IX_ETH_DB_CHECK_FEATURE(portID, IX_ETH_DB_VLAN_QOS);
+
+ IX_ETH_DB_CHECK_REFERENCE(priorityTable);
+
+ for (classIndex = 0 ; classIndex < IX_IEEE802_1Q_QOS_PRIORITY_COUNT ; classIndex++)
+ {
+ /* check range */
+ if (priorityTable[classIndex] >= ixEthDBPortInfo[portID].ixEthDBTrafficClassCount)
+ {
+ return IX_ETH_DB_INVALID_PRIORITY;
+ }
+ }
+
+ /* set new traffic classes */
+ for (classIndex = 0 ; classIndex < IX_IEEE802_1Q_QOS_PRIORITY_COUNT ; classIndex++)
+ {
+ ixEthDBPortInfo[portID].priorityTable[classIndex] = priorityTable[classIndex];
+
+ if (ixEthDBUpdateTrafficClass(portID, classIndex) != IX_ETH_DB_SUCCESS)
+ {
+ return IX_ETH_DB_FAIL;
+ }
+ }
+
+ return IX_ETH_DB_SUCCESS;
+ }
+
+/**
+ * @brief retrieves a port's priority mapping table
+ *
+ * @param portID ID of the port
+ * @param priorityTable location to store the priority table
+ *
+ * Note that this function is documented in the main component
+ * header file, IxEthDB.h.
+ *
+ * @return IX_ETH_DB_SUCCESS if the operation completed successfully
+ * or an appropriate error message otherwise
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBPriorityMappingTableGet(IxEthDBPortId portID, IxEthDBPriorityTable priorityTable)
+{
+ IX_ETH_DB_CHECK_PORT(portID);
+
+ IX_ETH_DB_CHECK_SINGLE_NPE(portID);
+
+ IX_ETH_DB_CHECK_FEATURE(portID, IX_ETH_DB_VLAN_QOS);
+
+ IX_ETH_DB_CHECK_REFERENCE(priorityTable);
+
+ memcpy(priorityTable, ixEthDBPortInfo[portID].priorityTable, sizeof (IxEthDBPriorityTable));
+
+ return IX_ETH_DB_SUCCESS;
+}
+
+/**
+ * @brief sets one QoS priority => traffic class mapping
+ *
+ * @param portID ID of the port
+ * @param userPriority QoS (user) priority
+ * @param trafficClass associated traffic class
+ *
+ * Note that this function is documented in the main component
+ * header file, IxEthDB.h.
+ *
+ * @return IX_ETH_DB_SUCCESS if the operation completed successfully
+ * or an appropriate error message otherwise
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBPriorityMappingClassSet(IxEthDBPortId portID, IxEthDBPriority userPriority, IxEthDBPriority trafficClass)
+{
+ IX_ETH_DB_CHECK_PORT(portID);
+
+ IX_ETH_DB_CHECK_SINGLE_NPE(portID);
+
+ IX_ETH_DB_CHECK_FEATURE(portID, IX_ETH_DB_VLAN_QOS);
+
+ /* check ranges for userPriority and trafficClass */
+ if (userPriority >= IX_IEEE802_1Q_QOS_PRIORITY_COUNT || trafficClass >= ixEthDBPortInfo[portID].ixEthDBTrafficClassCount)
+ {
+ return IX_ETH_DB_INVALID_PRIORITY;
+ }
+
+ ixEthDBPortInfo[portID].priorityTable[userPriority] = trafficClass;
+
+ return ixEthDBUpdateTrafficClass(portID, userPriority);
+}
+
+/**
+ * @brief retrieves one QoS priority => traffic class mapping
+ *
+ * @param portID ID of the port
+ * @param userPriority QoS (user) priority
+ * @param trafficClass location to store the associated traffic class
+ *
+ * Note that this function is documented in the main component
+ * header file, IxEthDB.h.
+ *
+ * @return IX_ETH_DB_SUCCESS if the operation completed successfully
+ * or an appropriate error message otherwise
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBPriorityMappingClassGet(IxEthDBPortId portID, IxEthDBPriority userPriority, IxEthDBPriority *trafficClass)
+{
+ IX_ETH_DB_CHECK_PORT(portID);
+
+ IX_ETH_DB_CHECK_SINGLE_NPE(portID);
+
+ IX_ETH_DB_CHECK_FEATURE(portID, IX_ETH_DB_VLAN_QOS);
+
+ IX_ETH_DB_CHECK_REFERENCE(trafficClass);
+
+ /* check userPriority range */
+ if (userPriority >= IX_IEEE802_1Q_QOS_PRIORITY_COUNT)
+ {
+ return IX_ETH_DB_INVALID_PRIORITY;
+ }
+
+ *trafficClass = ixEthDBPortInfo[portID].priorityTable[userPriority];
+
+ return IX_ETH_DB_SUCCESS;
+}
+
+/**
+ * @brief enables or disables the source port extraction
+ * from the VLAN TPID field
+ *
+ * @param portID ID of the port
+ * @param enable TRUE to enable or FALSE to disable
+ *
+ * Note that this function is documented in the main component
+ * header file, IxEthDB.h.
+ *
+ * @return IX_ETH_DB_SUCCESS if the operation completed successfully
+ * or an appropriate error message otherwise
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBVlanPortExtractionEnable(IxEthDBPortId portID, BOOL enable)
+{
+ IxNpeMhMessage message;
+ IX_STATUS result;
+
+ IX_ETH_DB_CHECK_PORT(portID);
+
+ IX_ETH_DB_CHECK_SINGLE_NPE(portID);
+
+ IX_ETH_DB_CHECK_FEATURE(portID, IX_ETH_DB_VLAN_QOS);
+
+ FILL_SETPORTIDEXTRACTIONMODE(message, portID, enable);
+
+ IX_ETHDB_SEND_NPE_MSG(IX_ETH_DB_PORT_ID_TO_NPE(portID), message, result);
+
+ return result;
+}
diff --git a/cpu/ixp/npe/IxEthDBWiFi.c b/cpu/ixp/npe/IxEthDBWiFi.c
new file mode 100644
index 0000000000..0a6043f364
--- /dev/null
+++ b/cpu/ixp/npe/IxEthDBWiFi.c
@@ -0,0 +1,480 @@
+/**
+ * @file IxEthDBAPI.c
+ *
+ * @brief Implementation of the public API
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+#include "IxEthDB_p.h"
+
+/* forward prototypes */
+IX_ETH_DB_PUBLIC
+MacTreeNode *ixEthDBGatewaySelect(MacTreeNode *stations);
+
+/**
+ * @brief sets the BBSID value for the WiFi header conversion feature
+ *
+ * @param portID ID of the port
+ * @param bbsid pointer to the 6-byte BBSID value
+ *
+ * Note that this function is documented in the main component
+ * header file, IxEthDB.h.
+ *
+ * @return IX_ETH_DB_SUCCESS if the operation completed successfully
+ * or an appropriate error message otherwise
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBWiFiBBSIDSet(IxEthDBPortId portID, IxEthDBMacAddr *bbsid)
+{
+ IxNpeMhMessage message;
+ IX_STATUS result;
+
+ IX_ETH_DB_CHECK_PORT(portID);
+
+ IX_ETH_DB_CHECK_SINGLE_NPE(portID);
+
+ IX_ETH_DB_CHECK_FEATURE(portID, IX_ETH_DB_WIFI_HEADER_CONVERSION);
+
+ IX_ETH_DB_CHECK_REFERENCE(bbsid);
+
+ memcpy(ixEthDBPortInfo[portID].bbsid, bbsid, sizeof (IxEthDBMacAddr));
+
+ FILL_SETBBSID_MSG(message, portID, bbsid);
+
+ IX_ETHDB_SEND_NPE_MSG(IX_ETH_DB_PORT_ID_TO_NPE(portID), message, result);
+
+ return result;
+}
+
+/**
+ * @brief updates the Frame Control and Duration/ID WiFi header
+ * conversion parameters in an NPE
+ *
+ * @param portID ID of the port
+ *
+ * This function will send a message to the NPE updating the
+ * frame conversion parameters for 802.3 => 802.11 header conversion.
+ *
+ * @return IX_ETH_DB_SUCCESS if the operation completed successfully
+ * or IX_ETH_DB_FAIL otherwise
+ *
+ * @internal
+ */
+IX_ETH_DB_PRIVATE
+IxEthDBStatus ixEthDBWiFiFrameControlDurationIDUpdate(IxEthDBPortId portID)
+{
+ IxNpeMhMessage message;
+ IX_STATUS result;
+
+ FILL_SETFRAMECONTROLDURATIONID(message, portID, ixEthDBPortInfo[portID].frameControlDurationID);
+
+ IX_ETHDB_SEND_NPE_MSG(IX_ETH_DB_PORT_ID_TO_NPE(portID), message, result);
+
+ return result;
+}
+
+/**
+ * @brief sets the Duration/ID WiFi frame header conversion parameter
+ *
+ * @param portID ID of the port
+ * @param durationID 16-bit value containing the new Duration/ID parameter
+ *
+ * Note that this function is documented in the main component
+ * header file, IxEthDB.h.
+ *
+ * @return IX_ETH_DB_SUCCESS if the operation completed successfully
+ * or an appropriate error message otherwise
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBWiFiDurationIDSet(IxEthDBPortId portID, UINT16 durationID)
+{
+ IX_ETH_DB_CHECK_PORT(portID);
+
+ IX_ETH_DB_CHECK_SINGLE_NPE(portID);
+
+ IX_ETH_DB_CHECK_FEATURE(portID, IX_ETH_DB_WIFI_HEADER_CONVERSION);
+
+ ixEthDBPortInfo[portID].frameControlDurationID = (ixEthDBPortInfo[portID].frameControlDurationID & 0xFFFF0000) | durationID;
+
+ return ixEthDBWiFiFrameControlDurationIDUpdate(portID);
+}
+
+/**
+ * @brief sets the Frame Control WiFi frame header conversion parameter
+ *
+ * @param portID ID of the port
+ * @param durationID 16-bit value containing the new Frame Control parameter
+ *
+ * Note that this function is documented in the main component
+ * header file, IxEthDB.h.
+ *
+ * @return IX_ETH_DB_SUCCESS if the operation completed successfully
+ * or an appropriate error message otherwise
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBWiFiFrameControlSet(IxEthDBPortId portID, UINT16 frameControl)
+{
+ IX_ETH_DB_CHECK_PORT(portID);
+
+ IX_ETH_DB_CHECK_SINGLE_NPE(portID);
+
+ IX_ETH_DB_CHECK_FEATURE(portID, IX_ETH_DB_WIFI_HEADER_CONVERSION);
+
+ ixEthDBPortInfo[portID].frameControlDurationID = (ixEthDBPortInfo[portID].frameControlDurationID & 0xFFFF) | (frameControl << 16);
+
+ return ixEthDBWiFiFrameControlDurationIDUpdate(portID);
+}
+
+/**
+ * @brief removes a WiFi header conversion record
+ *
+ * @param portID ID of the port
+ * @param macAddr MAC address of the record to remove
+ *
+ * Note that this function is documented in the main
+ * component header file, IxEthDB.h.
+ *
+ * @return IX_ETH_DB_SUCCESS if the operation completed
+ * successfully or an appropriate error message otherwise
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBWiFiEntryRemove(IxEthDBPortId portID, IxEthDBMacAddr *macAddr)
+{
+ MacDescriptor recordTemplate;
+
+ IX_ETH_DB_CHECK_PORT(portID);
+
+ IX_ETH_DB_CHECK_SINGLE_NPE(portID);
+
+ IX_ETH_DB_CHECK_REFERENCE(macAddr);
+
+ IX_ETH_DB_CHECK_FEATURE(portID, IX_ETH_DB_WIFI_HEADER_CONVERSION);
+
+ memcpy(recordTemplate.macAddress, macAddr, sizeof (IxEthDBMacAddr));
+
+ recordTemplate.type = IX_ETH_DB_WIFI_RECORD;
+ recordTemplate.portID = portID;
+
+ return ixEthDBRemove(&recordTemplate, NULL);
+}
+
+/**
+ * @brief adds a WiFi header conversion record
+ *
+ * @param portID ID of the port
+ * @param macAddr MAC address of the record to add
+ * @param gatewayMacAddr address of the gateway (or
+ * NULL if this is a station record)
+ *
+ * This function adds a record of type AP_TO_AP (gateway is not NULL)
+ * or AP_TO_STA (gateway is NULL) in the main database as a
+ * WiFi header conversion record.
+ *
+ * @return IX_ETH_DB_SUCCESS if the operation completed
+ * successfully or an appropriate error message otherwise
+ *
+ * @internal
+ */
+IX_ETH_DB_PRIVATE
+IxEthDBStatus ixEthDBWiFiEntryAdd(IxEthDBPortId portID, IxEthDBMacAddr *macAddr, IxEthDBMacAddr *gatewayMacAddr)
+{
+ MacDescriptor recordTemplate;
+
+ IX_ETH_DB_CHECK_PORT(portID);
+
+ IX_ETH_DB_CHECK_SINGLE_NPE(portID);
+
+ IX_ETH_DB_CHECK_REFERENCE(macAddr);
+
+ IX_ETH_DB_CHECK_FEATURE(portID, IX_ETH_DB_WIFI_HEADER_CONVERSION);
+
+ memcpy(recordTemplate.macAddress, macAddr, sizeof (IxEthDBMacAddr));
+
+ recordTemplate.type = IX_ETH_DB_WIFI_RECORD;
+ recordTemplate.portID = portID;
+
+ if (gatewayMacAddr != NULL)
+ {
+ memcpy(recordTemplate.recordData.wifiData.gwMacAddress, gatewayMacAddr, sizeof (IxEthDBMacAddr));
+
+ recordTemplate.recordData.wifiData.type = IX_ETH_DB_WIFI_AP_TO_AP;
+ }
+ else
+ {
+ memset(recordTemplate.recordData.wifiData.gwMacAddress, 0, sizeof (IxEthDBMacAddr));
+
+ recordTemplate.recordData.wifiData.type = IX_ETH_DB_WIFI_AP_TO_STA;
+ }
+
+ return ixEthDBAdd(&recordTemplate, NULL);
+}
+
+/**
+ * @brief adds a WiFi header conversion record
+ *
+ * @param portID ID of the port
+ * @param macAddr MAC address of the record to add
+ * @param gatewayMacAddr address of the gateway
+ *
+ * This function adds a record of type AP_TO_AP
+ * in the main database as a WiFi header conversion record.
+ *
+ * This is simply a wrapper over @ref ixEthDBWiFiEntryAdd().
+ *
+ * Note that this function is documented in the main
+ * component header file, IxEthDB.h.
+ *
+ * @return IX_ETH_DB_SUCCESS if the operation completed
+ * successfully or an appropriate error message otherwise
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBWiFiAccessPointEntryAdd(IxEthDBPortId portID, IxEthDBMacAddr *macAddr, IxEthDBMacAddr *gatewayMacAddr)
+{
+ IX_ETH_DB_CHECK_REFERENCE(gatewayMacAddr);
+
+ return ixEthDBWiFiEntryAdd(portID, macAddr, gatewayMacAddr);
+}
+
+/**
+ * @brief adds a WiFi header conversion record
+ *
+ * @param portID ID of the port
+ * @param macAddr MAC address of the record to add
+ *
+ * This function adds a record of type AP_TO_STA
+ * in the main database as a WiFi header conversion record.
+ *
+ * This is simply a wrapper over @ref ixEthDBWiFiEntryAdd().
+ *
+ * Note that this function is documented in the main
+ * component header file, IxEthDB.h.
+ *
+ * @return IX_ETH_DB_SUCCESS if the operation completed
+ * successfully or an appropriate error message otherwise
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBWiFiStationEntryAdd(IxEthDBPortId portID, IxEthDBMacAddr *macAddr)
+{
+ return ixEthDBWiFiEntryAdd(portID, macAddr, NULL);
+}
+
+/**
+ * @brief selects a set of gateways from a tree of
+ * WiFi header conversion records
+ *
+ * @param stations binary tree containing pointers to WiFi header
+ * conversion records
+ *
+ * This function browses through the input binary tree, identifies
+ * records of type AP_TO_AP, clones these records and appends them
+ * to a vine (a single right-branch binary tree) which is returned
+ * as result. A maximum of MAX_GW_SIZE entries containing gateways
+ * will be cloned from the original tree.
+ *
+ * @return vine (linear binary tree) containing record
+ * clones of AP_TO_AP type, which have a gateway field
+ *
+ * @internal
+ */
+IX_ETH_DB_PUBLIC
+MacTreeNode *ixEthDBGatewaySelect(MacTreeNode *stations)
+{
+ MacTreeNodeStack *stack;
+ MacTreeNode *gateways, *insertionPlace;
+ UINT32 gwIndex = 1; /* skip the empty root */
+
+ if (stations == NULL)
+ {
+ return NULL;
+ }
+
+ stack = ixOsalCacheDmaMalloc(sizeof (MacTreeNodeStack));
+
+ if (stack == NULL)
+ {
+ ERROR_LOG("DB: (WiFi) failed to allocate the node stack for gateway tree linearization, out of memory?\n");
+ return NULL;
+ }
+
+ /* initialize root node */
+ gateways = insertionPlace = NULL;
+
+ /* start browsing the station tree */
+ NODE_STACK_INIT(stack);
+
+ /* initialize stack by pushing the tree root at offset 0 */
+ NODE_STACK_PUSH(stack, stations, 0);
+
+ while (NODE_STACK_NONEMPTY(stack))
+ {
+ MacTreeNode *node;
+ UINT32 offset;
+
+ NODE_STACK_POP(stack, node, offset);
+
+ /* we can store maximum 31 (32 total, 1 empty root) entries in the gateway tree */
+ if (offset > (MAX_GW_SIZE - 1)) break;
+
+ /* check if this record has a gateway address */
+ if (node->descriptor != NULL && node->descriptor->recordData.wifiData.type == IX_ETH_DB_WIFI_AP_TO_AP)
+ {
+ /* found a record, create an insertion place */
+ if (insertionPlace != NULL)
+ {
+ insertionPlace->right = ixEthDBAllocMacTreeNode();
+ insertionPlace = insertionPlace->right;
+ }
+ else
+ {
+ gateways = ixEthDBAllocMacTreeNode();
+ insertionPlace = gateways;
+ }
+
+ if (insertionPlace == NULL)
+ {
+ /* no nodes left, bail out with what we have */
+ ixOsalCacheDmaFree(stack);
+ return gateways;
+ }
+
+ /* clone the original record for the gateway tree */
+ insertionPlace->descriptor = ixEthDBCloneMacDescriptor(node->descriptor);
+
+ /* insert and update the offset in the original record */
+ node->descriptor->recordData.wifiData.gwAddressIndex = gwIndex++;
+ }
+
+ /* browse the tree */
+ if (node->left != NULL)
+ {
+ NODE_STACK_PUSH(stack, node->left, LEFT_CHILD_OFFSET(offset));
+ }
+
+ if (node->right != NULL)
+ {
+ NODE_STACK_PUSH(stack, node->right, RIGHT_CHILD_OFFSET(offset));
+ }
+ }
+
+ ixOsalCacheDmaFree(stack);
+ return gateways;
+}
+
+/**
+ * @brief downloads the WiFi header conversion table to an NPE
+ *
+ * @param portID ID of the port
+ *
+ * This function prepares the WiFi header conversion tables and
+ * downloads them to the specified NPE port.
+ *
+ * The header conversion tables consist in the main table of
+ * addresses and the secondary table of gateways. AP_TO_AP records
+ * from the first table contain index fields into the second table
+ * for gateway selection.
+ *
+ * Note that this function is documented in the main component
+ * header file, IxEthDB.h.
+ *
+ * @return IX_ETH_DB_SUCCESS if the operation completed successfully
+ * or an appropriate error message otherwise
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBWiFiConversionTableDownload(IxEthDBPortId portID)
+{
+ IxEthDBPortMap query;
+ MacTreeNode *stations = NULL, *gateways = NULL, *gateway = NULL;
+ IxNpeMhMessage message;
+ PortInfo *portInfo;
+ IX_STATUS result;
+
+ IX_ETH_DB_CHECK_PORT(portID);
+
+ IX_ETH_DB_CHECK_SINGLE_NPE(portID);
+
+ IX_ETH_DB_CHECK_FEATURE(portID, IX_ETH_DB_WIFI_HEADER_CONVERSION);
+
+ portInfo = &ixEthDBPortInfo[portID];
+
+ SET_DEPENDENCY_MAP(query, portID);
+
+ ixEthDBUpdateLock();
+
+ stations = ixEthDBQuery(NULL, query, IX_ETH_DB_WIFI_RECORD, MAX_ELT_SIZE);
+ gateways = ixEthDBGatewaySelect(stations);
+
+ /* clean up gw area */
+ memset((void *) portInfo->updateMethod.npeGwUpdateZone, FULL_GW_BYTE_SIZE, 0);
+
+ /* write all gateways */
+ gateway = gateways;
+
+ while (gateway != NULL)
+ {
+ ixEthDBNPEGatewayNodeWrite((void *) (((UINT32) portInfo->updateMethod.npeGwUpdateZone)
+ + gateway->descriptor->recordData.wifiData.gwAddressIndex * ELT_ENTRY_SIZE),
+ gateway);
+
+ gateway = gateway->right;
+ }
+
+ /* free the gateway tree */
+ if (gateways != NULL)
+ {
+ ixEthDBFreeMacTreeNode(gateways);
+ }
+
+ FILL_SETAPMACTABLE_MSG(message,
+ IX_OSAL_MMU_VIRT_TO_PHYS(portInfo->updateMethod.npeGwUpdateZone));
+
+ IX_ETHDB_SEND_NPE_MSG(IX_ETH_DB_PORT_ID_TO_NPE(portID), message, result);
+
+ if (result == IX_SUCCESS)
+ {
+ /* update the main tree (the stations tree) */
+ portInfo->updateMethod.searchTree = stations;
+
+ result = ixEthDBNPEUpdateHandler(portID, IX_ETH_DB_WIFI_RECORD);
+ }
+
+ ixEthDBUpdateUnlock();
+
+ return result;
+}
diff --git a/cpu/ixp/npe/IxEthMii.c b/cpu/ixp/npe/IxEthMii.c
new file mode 100644
index 0000000000..4d92f17eef
--- /dev/null
+++ b/cpu/ixp/npe/IxEthMii.c
@@ -0,0 +1,497 @@
+/**
+ * @file IxEthMii.c
+ *
+ * @author Intel Corporation
+ * @date
+ *
+ * @brief MII control functions
+ *
+ * Design Notes:
+ *
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+#include "IxOsal.h"
+
+#include "IxEthAcc.h"
+#include "IxEthMii_p.h"
+
+#ifdef __wince
+#include "IxOsPrintf.h"
+#endif
+
+/* Array to store the phy IDs of the discovered phys */
+PRIVATE UINT32 ixEthMiiPhyId[IXP425_ETH_ACC_MII_MAX_ADDR];
+
+/*********************************************************
+ *
+ * Scan for PHYs on the MII bus. This function returns
+ * an array of booleans, one for each PHY address.
+ * If a PHY is found at a particular address, the
+ * corresponding entry in the array is set to TRUE.
+ *
+ */
+
+PUBLIC IX_STATUS
+ixEthMiiPhyScan(BOOL phyPresent[], UINT32 maxPhyCount)
+{
+ UINT32 i;
+ UINT16 regval, regvalId1, regvalId2;
+
+ /*Search for PHYs on the MII*/
+ /*Search for existant phys on the MDIO bus*/
+
+ if ((phyPresent == NULL) ||
+ (maxPhyCount > IXP425_ETH_ACC_MII_MAX_ADDR))
+ {
+ return IX_FAIL;
+ }
+
+ /* fill the array */
+ for(i=0;
+ i<IXP425_ETH_ACC_MII_MAX_ADDR;
+ i++)
+ {
+ phyPresent[i] = FALSE;
+ }
+
+ /* iterate through the PHY addresses */
+ for(i=0;
+ maxPhyCount > 0 && i<IXP425_ETH_ACC_MII_MAX_ADDR;
+ i++)
+ {
+ ixEthMiiPhyId[i] = IX_ETH_MII_INVALID_PHY_ID;
+ if(ixEthAccMiiReadRtn(i,
+ IX_ETH_MII_CTRL_REG,
+ &regval) == IX_ETH_ACC_SUCCESS)
+ {
+ if((regval & 0xffff) != 0xffff)
+ {
+ maxPhyCount--;
+ /*Need to read the register twice here to flush PHY*/
+ ixEthAccMiiReadRtn(i, IX_ETH_MII_PHY_ID1_REG, &regvalId1);
+ ixEthAccMiiReadRtn(i, IX_ETH_MII_PHY_ID1_REG, &regvalId1);
+ ixEthAccMiiReadRtn(i, IX_ETH_MII_PHY_ID2_REG, &regvalId2);
+ ixEthMiiPhyId[i] = (regvalId1 << IX_ETH_MII_REG_SHL) | regvalId2;
+ if ((ixEthMiiPhyId[i] == IX_ETH_MII_KS8995_PHY_ID)
+ || (ixEthMiiPhyId[i] == IX_ETH_MII_LXT971_PHY_ID)
+ || (ixEthMiiPhyId[i] == IX_ETH_MII_LXT972_PHY_ID)
+ || (ixEthMiiPhyId[i] == IX_ETH_MII_LXT973_PHY_ID)
+ || (ixEthMiiPhyId[i] == IX_ETH_MII_LXT973A3_PHY_ID)
+ || (ixEthMiiPhyId[i] == IX_ETH_MII_LXT9785_PHY_ID)
+ )
+ {
+ /* supported phy */
+ phyPresent[i] = TRUE;
+ } /* end of if(ixEthMiiPhyId) */
+ else
+ {
+ if (ixEthMiiPhyId[i] != IX_ETH_MII_INVALID_PHY_ID)
+ {
+ /* unsupported phy */
+ ixOsalLog (IX_OSAL_LOG_LVL_ERROR,
+ IX_OSAL_LOG_DEV_STDOUT,
+ "ixEthMiiPhyScan : unexpected Mii PHY ID %8.8x\n",
+ ixEthMiiPhyId[i], 2, 3, 4, 5, 6);
+ ixEthMiiPhyId[i] = IX_ETH_MII_UNKNOWN_PHY_ID;
+ phyPresent[i] = TRUE;
+ }
+ }
+ }
+ }
+ }
+ return IX_SUCCESS;
+}
+
+/************************************************************
+ *
+ * Configure the PHY at the specified address
+ *
+ */
+PUBLIC IX_STATUS
+ixEthMiiPhyConfig(UINT32 phyAddr,
+ BOOL speed100,
+ BOOL fullDuplex,
+ BOOL autonegotiate)
+{
+ UINT16 regval=0;
+
+ /* parameter check */
+ if ((phyAddr < IXP425_ETH_ACC_MII_MAX_ADDR) &&
+ (ixEthMiiPhyId[phyAddr] != IX_ETH_MII_INVALID_PHY_ID))
+ {
+ /*
+ * set the control register
+ */
+ if(autonegotiate)
+ {
+ regval |= IX_ETH_MII_CR_AUTO_EN | IX_ETH_MII_CR_RESTART;
+ }
+ else
+ {
+ if(speed100)
+ {
+ regval |= IX_ETH_MII_CR_100;
+ }
+ if(fullDuplex)
+ {
+ regval |= IX_ETH_MII_CR_FDX;
+ }
+ } /* end of if-else() */
+ if (ixEthAccMiiWriteRtn(phyAddr,
+ IX_ETH_MII_CTRL_REG,
+ regval) == IX_ETH_ACC_SUCCESS)
+ {
+ return IX_SUCCESS;
+ }
+ } /* end of if(phyAddr) */
+ return IX_FAIL;
+}
+
+/******************************************************************
+ *
+ * Enable the PHY Loopback at the specified address
+ */
+PUBLIC IX_STATUS
+ixEthMiiPhyLoopbackEnable (UINT32 phyAddr)
+{
+ UINT16 regval ;
+
+ if ((phyAddr < IXP425_ETH_ACC_MII_MAX_ADDR) &&
+ (IX_ETH_MII_INVALID_PHY_ID != ixEthMiiPhyId[phyAddr]))
+ {
+ /* read/write the control register */
+ if(ixEthAccMiiReadRtn (phyAddr,
+ IX_ETH_MII_CTRL_REG,
+ &regval)
+ == IX_ETH_ACC_SUCCESS)
+ {
+ if(ixEthAccMiiWriteRtn (phyAddr,
+ IX_ETH_MII_CTRL_REG,
+ regval | IX_ETH_MII_CR_LOOPBACK)
+ == IX_ETH_ACC_SUCCESS)
+ {
+ return IX_SUCCESS;
+ }
+ }
+ }
+ return IX_FAIL;
+}
+
+/******************************************************************
+ *
+ * Disable the PHY Loopback at the specified address
+ */
+PUBLIC IX_STATUS
+ixEthMiiPhyLoopbackDisable (UINT32 phyAddr)
+{
+ UINT16 regval ;
+
+ if ((phyAddr < IXP425_ETH_ACC_MII_MAX_ADDR) &&
+ (IX_ETH_MII_INVALID_PHY_ID != ixEthMiiPhyId[phyAddr]))
+ {
+ /* read/write the control register */
+ if(ixEthAccMiiReadRtn (phyAddr,
+ IX_ETH_MII_CTRL_REG,
+ &regval)
+ == IX_ETH_ACC_SUCCESS)
+ {
+ if(ixEthAccMiiWriteRtn (phyAddr,
+ IX_ETH_MII_CTRL_REG,
+ regval & (~IX_ETH_MII_CR_LOOPBACK))
+ == IX_ETH_ACC_SUCCESS)
+ {
+ return IX_SUCCESS;
+ }
+ }
+ }
+ return IX_FAIL;
+}
+
+/******************************************************************
+ *
+ * Reset the PHY at the specified address
+ */
+PUBLIC IX_STATUS
+ixEthMiiPhyReset(UINT32 phyAddr)
+{
+ UINT32 timeout;
+ UINT16 regval;
+
+ if ((phyAddr < IXP425_ETH_ACC_MII_MAX_ADDR) &&
+ (ixEthMiiPhyId[phyAddr] != IX_ETH_MII_INVALID_PHY_ID))
+ {
+ if ((ixEthMiiPhyId[phyAddr] == IX_ETH_MII_LXT971_PHY_ID) ||
+ (ixEthMiiPhyId[phyAddr] == IX_ETH_MII_LXT972_PHY_ID) ||
+ (ixEthMiiPhyId[phyAddr] == IX_ETH_MII_LXT973_PHY_ID) ||
+ (ixEthMiiPhyId[phyAddr] == IX_ETH_MII_LXT973A3_PHY_ID) ||
+ (ixEthMiiPhyId[phyAddr] == IX_ETH_MII_LXT9785_PHY_ID)
+ )
+ {
+ /* use the control register to reset the phy */
+ ixEthAccMiiWriteRtn(phyAddr,
+ IX_ETH_MII_CTRL_REG,
+ IX_ETH_MII_CR_RESET);
+
+ /* poll until the reset bit is cleared */
+ timeout = 0;
+ do
+ {
+ ixOsalSleep (IX_ETH_MII_RESET_POLL_MS);
+
+ /* read the control register and check for timeout */
+ ixEthAccMiiReadRtn(phyAddr,
+ IX_ETH_MII_CTRL_REG,
+ &regval);
+ if ((regval & IX_ETH_MII_CR_RESET) == 0)
+ {
+ /* timeout bit is self-cleared */
+ break;
+ }
+ timeout += IX_ETH_MII_RESET_POLL_MS;
+ }
+ while (timeout < IX_ETH_MII_RESET_DELAY_MS);
+
+ /* check for timeout */
+ if (timeout >= IX_ETH_MII_RESET_DELAY_MS)
+ {
+ ixEthAccMiiWriteRtn(phyAddr, IX_ETH_MII_CTRL_REG,
+ IX_ETH_MII_CR_NORM_EN);
+ return IX_FAIL;
+ }
+
+ return IX_SUCCESS;
+ } /* end of if(ixEthMiiPhyId) */
+ else if (ixEthMiiPhyId[phyAddr] == IX_ETH_MII_KS8995_PHY_ID)
+ {
+ /* reset bit is reserved, just reset the control register */
+ ixEthAccMiiWriteRtn(phyAddr, IX_ETH_MII_CTRL_REG,
+ IX_ETH_MII_CR_NORM_EN);
+ return IX_SUCCESS;
+ }
+ else
+ {
+ /* unknown PHY, set the control register reset bit,
+ * wait 2 s. and clear the control register.
+ */
+ ixEthAccMiiWriteRtn(phyAddr, IX_ETH_MII_CTRL_REG,
+ IX_ETH_MII_CR_RESET);
+
+ ixOsalSleep (IX_ETH_MII_RESET_DELAY_MS);
+
+ ixEthAccMiiWriteRtn(phyAddr, IX_ETH_MII_CTRL_REG,
+ IX_ETH_MII_CR_NORM_EN);
+ return IX_SUCCESS;
+ } /* end of if-else(ixEthMiiPhyId) */
+ } /* end of if(phyAddr) */
+ return IX_FAIL;
+}
+
+/*****************************************************************
+ *
+ * Link state query functions
+ */
+
+PUBLIC IX_STATUS
+ixEthMiiLinkStatus(UINT32 phyAddr,
+ BOOL *linkUp,
+ BOOL *speed100,
+ BOOL *fullDuplex,
+ BOOL *autoneg)
+{
+ UINT16 ctrlRegval, statRegval, regval, regval4, regval5;
+
+ /* check the parameters */
+ if ((linkUp == NULL) ||
+ (speed100 == NULL) ||
+ (fullDuplex == NULL) ||
+ (autoneg == NULL))
+ {
+ return IX_FAIL;
+ }
+
+ *linkUp = FALSE;
+ *speed100 = FALSE;
+ *fullDuplex = FALSE;
+ *autoneg = FALSE;
+
+ if ((phyAddr < IXP425_ETH_ACC_MII_MAX_ADDR) &&
+ (ixEthMiiPhyId[phyAddr] != IX_ETH_MII_INVALID_PHY_ID))
+ {
+ if ((ixEthMiiPhyId[phyAddr] == IX_ETH_MII_LXT971_PHY_ID) ||
+ (ixEthMiiPhyId[phyAddr] == IX_ETH_MII_LXT972_PHY_ID) ||
+ (ixEthMiiPhyId[phyAddr] == IX_ETH_MII_LXT9785_PHY_ID)
+ )
+ {
+ /* --------------------------------------------------*/
+ /* Retrieve information from PHY specific register */
+ /* --------------------------------------------------*/
+ if (ixEthAccMiiReadRtn(phyAddr,
+ IX_ETH_MII_STAT2_REG,
+ &regval) != IX_ETH_ACC_SUCCESS)
+ {
+ return IX_FAIL;
+ }
+ *linkUp = ((regval & IX_ETH_MII_SR2_LINK) != 0);
+ *speed100 = ((regval & IX_ETH_MII_SR2_100) != 0);
+ *fullDuplex = ((regval & IX_ETH_MII_SR2_FD) != 0);
+ *autoneg = ((regval & IX_ETH_MII_SR2_AUTO) != 0);
+ return IX_SUCCESS;
+ } /* end of if(ixEthMiiPhyId) */
+ else
+ {
+ /* ----------------------------------------------------*/
+ /* Retrieve information from status and ctrl registers */
+ /* ----------------------------------------------------*/
+ if (ixEthAccMiiReadRtn(phyAddr,
+ IX_ETH_MII_CTRL_REG,
+ &ctrlRegval) != IX_ETH_ACC_SUCCESS)
+ {
+ return IX_FAIL;
+ }
+ ixEthAccMiiReadRtn(phyAddr, IX_ETH_MII_STAT_REG, &statRegval);
+
+ *linkUp = ((statRegval & IX_ETH_MII_SR_LINK_STATUS) != 0);
+ if (*linkUp)
+ {
+ *autoneg = ((ctrlRegval & IX_ETH_MII_CR_AUTO_EN) != 0) &&
+ ((statRegval & IX_ETH_MII_SR_AUTO_SEL) != 0) &&
+ ((statRegval & IX_ETH_MII_SR_AUTO_NEG) != 0);
+
+ if (*autoneg)
+ {
+ /* mask the current stat values with the capabilities */
+ ixEthAccMiiReadRtn(phyAddr, IX_ETH_MII_AN_ADS_REG, &regval4);
+ ixEthAccMiiReadRtn(phyAddr, IX_ETH_MII_AN_PRTN_REG, &regval5);
+ /* merge the flags from the 3 registers */
+ regval = (statRegval & ((regval4 & regval5) << 6));
+ /* initialise from status register values */
+ if ((regval & IX_ETH_MII_SR_TX_FULL_DPX) != 0)
+ {
+ /* 100 Base X full dplx */
+ *speed100 = TRUE;
+ *fullDuplex = TRUE;
+ return IX_SUCCESS;
+ }
+ if ((regval & IX_ETH_MII_SR_TX_HALF_DPX) != 0)
+ {
+ /* 100 Base X half dplx */
+ *speed100 = TRUE;
+ return IX_SUCCESS;
+ }
+ if ((regval & IX_ETH_MII_SR_10T_FULL_DPX) != 0)
+ {
+ /* 10 mb full dplx */
+ *fullDuplex = TRUE;
+ return IX_SUCCESS;
+ }
+ if ((regval & IX_ETH_MII_SR_10T_HALF_DPX) != 0)
+ {
+ /* 10 mb half dplx */
+ return IX_SUCCESS;
+ }
+ } /* end of if(autoneg) */
+ else
+ {
+ /* autonegotiate not complete, return setup parameters */
+ *speed100 = ((ctrlRegval & IX_ETH_MII_CR_100) != 0);
+ *fullDuplex = ((ctrlRegval & IX_ETH_MII_CR_FDX) != 0);
+ }
+ } /* end of if(linkUp) */
+ } /* end of if-else(ixEthMiiPhyId) */
+ } /* end of if(phyAddr) */
+ else
+ {
+ return IX_FAIL;
+ } /* end of if-else(phyAddr) */
+ return IX_SUCCESS;
+}
+
+/*****************************************************************
+ *
+ * Link state display functions
+ */
+
+PUBLIC IX_STATUS
+ixEthMiiPhyShow (UINT32 phyAddr)
+{
+ BOOL linkUp, speed100, fullDuplex, autoneg;
+ UINT16 cregval;
+ UINT16 sregval;
+
+
+ ixEthAccMiiReadRtn(phyAddr, IX_ETH_MII_STAT_REG, &sregval);
+ ixEthAccMiiReadRtn(phyAddr, IX_ETH_MII_CTRL_REG, &cregval);
+
+ /* get link information */
+ if (ixEthMiiLinkStatus(phyAddr,
+ &linkUp,
+ &speed100,
+ &fullDuplex,
+ &autoneg) != IX_ETH_ACC_SUCCESS)
+ {
+ printf("PHY Status unknown\n");
+ return IX_FAIL;
+ }
+
+ printf("PHY ID [phyAddr]: %8.8x\n",ixEthMiiPhyId[phyAddr]);
+ printf( " Status reg: %4.4x\n",sregval);
+ printf( " control reg: %4.4x\n",cregval);
+ /* display link information */
+ printf("PHY Status:\n");
+ printf(" Link is %s\n",
+ (linkUp ? "Up" : "Down"));
+ if((sregval & IX_ETH_MII_SR_REMOTE_FAULT) != 0)
+ {
+ printf(" Remote fault detected\n");
+ }
+ printf(" Auto Negotiation %s\n",
+ (autoneg ? "Completed" : "Not Completed"));
+
+ printf("PHY Configuration:\n");
+ printf(" Speed %sMb/s\n",
+ (speed100 ? "100" : "10"));
+ printf(" %s Duplex\n",
+ (fullDuplex ? "Full" : "Half"));
+ printf(" Auto Negotiation %s\n",
+ (autoneg ? "Enabled" : "Disabled"));
+ return IX_SUCCESS;
+}
+
diff --git a/cpu/ixp/npe/IxFeatureCtrl.c b/cpu/ixp/npe/IxFeatureCtrl.c
new file mode 100644
index 0000000000..e02aabfb40
--- /dev/null
+++ b/cpu/ixp/npe/IxFeatureCtrl.c
@@ -0,0 +1,422 @@
+/**
+ * @file IxFeatureCtrl.c
+ *
+ * @author Intel Corporation
+ * @date 29-Jan-2003
+ *
+ * @brief Feature Control Public API Implementation
+ *
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+*/
+
+#include "IxOsal.h"
+#include "IxVersionId.h"
+#include "IxFeatureCtrl.h"
+
+/* Macro to read from the Feature Control Register */
+#define IX_FEATURE_CTRL_READ(result) \
+do { \
+ixFeatureCtrlExpMap(); \
+(result) = IX_OSAL_READ_LONG(ixFeatureCtrlRegister); \
+} while (0)
+
+/* Macro to write to the Feature Control Register */
+#define IX_FEATURE_CTRL_WRITE(value) \
+do { \
+ixFeatureCtrlExpMap(); \
+IX_OSAL_WRITE_LONG(ixFeatureCtrlRegister, (value)); \
+} while (0)
+
+/*
+ * This is the offset of the feature register relative to the base of the
+ * Expansion Bus Controller MMR.
+ */
+#define IX_FEATURE_CTRL_REG_OFFSET (0x00000028)
+
+
+/* Boolean to mark the fact that the EXP_CONFIG address space was mapped */
+PRIVATE BOOL ixFeatureCtrlExpCfgRegionMapped = FALSE;
+
+/* Pointer holding the virtual address of the Feature Control Register */
+PRIVATE VUINT32 *ixFeatureCtrlRegister = NULL;
+
+/* Place holder to store the software configuration */
+PRIVATE BOOL swConfiguration[IX_FEATURECTRL_SWCONFIG_MAX];
+
+/* Flag to control swConfiguration[] is initialized once */
+PRIVATE BOOL swConfigurationFlag = FALSE ;
+
+/* Array containing component mask values */
+#ifdef __ixp42X
+UINT32 componentMask[IX_FEATURECTRL_MAX_COMPONENTS] = {
+ (0x1<<IX_FEATURECTRL_RCOMP),
+ (0x1<<IX_FEATURECTRL_USB),
+ (0x1<<IX_FEATURECTRL_HASH),
+ (0x1<<IX_FEATURECTRL_AES),
+ (0x1<<IX_FEATURECTRL_DES),
+ (0x1<<IX_FEATURECTRL_HDLC),
+ (0x1<<IX_FEATURECTRL_AAL),
+ (0x1<<IX_FEATURECTRL_HSS),
+ (0x1<<IX_FEATURECTRL_UTOPIA),
+ (0x1<<IX_FEATURECTRL_ETH0),
+ (0x1<<IX_FEATURECTRL_ETH1),
+ (0x1<<IX_FEATURECTRL_NPEA),
+ (0x1<<IX_FEATURECTRL_NPEB),
+ (0x1<<IX_FEATURECTRL_NPEC),
+ (0x1<<IX_FEATURECTRL_PCI),
+ IX_FEATURECTRL_COMPONENT_NOT_AVAILABLE,
+ (0x3<<IX_FEATURECTRL_UTOPIA_PHY_LIMIT),
+ (0x1<<IX_FEATURECTRL_UTOPIA_PHY_LIMIT_BIT2),
+ IX_FEATURECTRL_COMPONENT_NOT_AVAILABLE,
+ IX_FEATURECTRL_COMPONENT_NOT_AVAILABLE,
+ IX_FEATURECTRL_COMPONENT_NOT_AVAILABLE,
+ IX_FEATURECTRL_COMPONENT_NOT_AVAILABLE,
+ IX_FEATURECTRL_COMPONENT_NOT_AVAILABLE
+};
+#elif defined (__ixp46X)
+UINT32 componentMask[IX_FEATURECTRL_MAX_COMPONENTS] = {
+ (0x1<<IX_FEATURECTRL_RCOMP),
+ (0x1<<IX_FEATURECTRL_USB),
+ (0x1<<IX_FEATURECTRL_HASH),
+ (0x1<<IX_FEATURECTRL_AES),
+ (0x1<<IX_FEATURECTRL_DES),
+ (0x1<<IX_FEATURECTRL_HDLC),
+ IX_FEATURECTRL_COMPONENT_ALWAYS_AVAILABLE, /* AAL component is always on */
+ (0x1<<IX_FEATURECTRL_HSS),
+ (0x1<<IX_FEATURECTRL_UTOPIA),
+ (0x1<<IX_FEATURECTRL_ETH0),
+ (0x1<<IX_FEATURECTRL_ETH1),
+ (0x1<<IX_FEATURECTRL_NPEA),
+ (0x1<<IX_FEATURECTRL_NPEB),
+ (0x1<<IX_FEATURECTRL_NPEC),
+ (0x1<<IX_FEATURECTRL_PCI),
+ (0x1<<IX_FEATURECTRL_ECC_TIMESYNC),
+ (0x3<<IX_FEATURECTRL_UTOPIA_PHY_LIMIT),
+ (0x1<<IX_FEATURECTRL_UTOPIA_PHY_LIMIT_BIT2), /* NOT TO BE USED */
+ (0x1<<IX_FEATURECTRL_USB_HOST_CONTROLLER),
+ (0x1<<IX_FEATURECTRL_NPEA_ETH),
+ (0x1<<IX_FEATURECTRL_NPEB_ETH),
+ (0x1<<IX_FEATURECTRL_RSA),
+ (0x3<<IX_FEATURECTRL_XSCALE_MAX_FREQ),
+ (0x1<<IX_FEATURECTRL_XSCALE_MAX_FREQ_BIT2)
+};
+#endif /* __ixp42X */
+
+/**
+ * Forward declaration
+ */
+PRIVATE
+void ixFeatureCtrlExpMap(void);
+
+PRIVATE
+void ixFeatureCtrlSwConfigurationInit(void);
+
+/**
+ * Function to map EXP_CONFIG space
+ */
+PRIVATE
+void ixFeatureCtrlExpMap(void)
+{
+ UINT32 expCfgBaseAddress = 0;
+
+ /* If the EXP Configuration space has already been mapped then
+ * return */
+ if (ixFeatureCtrlExpCfgRegionMapped == TRUE)
+ {
+ return;
+ }
+
+ /* Map (get virtual address) for the EXP_CONFIG space */
+ expCfgBaseAddress = (UINT32)
+ (IX_OSAL_MEM_MAP(IX_OSAL_IXP400_EXP_BUS_REGS_PHYS_BASE,
+ IX_OSAL_IXP400_EXP_REG_MAP_SIZE));
+
+ /* Assert that the mapping operation succeeded */
+ IX_OSAL_ASSERT(expCfgBaseAddress);
+
+ /* Set the address of the Feature register */
+ ixFeatureCtrlRegister =
+ (VUINT32 *) (expCfgBaseAddress + IX_FEATURE_CTRL_REG_OFFSET);
+
+ /* Mark the fact that the EXP_CONFIG space has already been mapped */
+ ixFeatureCtrlExpCfgRegionMapped = TRUE;
+}
+
+/**
+ * Function definition: ixFeatureCtrlSwConfigurationInit
+ * This function will only initialize software configuration once.
+ */
+PRIVATE void ixFeatureCtrlSwConfigurationInit(void)
+{
+ UINT32 i;
+ if (FALSE == swConfigurationFlag)
+ {
+ for (i=0; i<IX_FEATURECTRL_SWCONFIG_MAX ; i++)
+ {
+ /* By default, all software configuration are enabled */
+ swConfiguration[i]= TRUE ;
+ }
+ /*Make sure this function only initializes swConfiguration[] once*/
+ swConfigurationFlag = TRUE ;
+ }
+}
+
+/**
+ * Function definition: ixFeatureCtrlRead
+ */
+IxFeatureCtrlReg
+ixFeatureCtrlRead (void)
+{
+ IxFeatureCtrlReg result;
+
+#if CPU!=SIMSPARCSOLARIS
+ /* Read the feature control register */
+ IX_FEATURE_CTRL_READ(result);
+ return result;
+#else
+ /* Return an invalid value for VxWorks simulation */
+ result = 0xFFFFFFFF;
+ return result;
+#endif
+}
+
+/**
+ * Function definition: ixFeatureCtrlWrite
+ */
+void
+ixFeatureCtrlWrite (IxFeatureCtrlReg expUnitReg)
+{
+#if CPU!=SIMSPARCSOLARIS
+ /* Write value to feature control register */
+ IX_FEATURE_CTRL_WRITE(expUnitReg);
+#endif
+}
+
+
+/**
+ * Function definition: ixFeatureCtrlHwCapabilityRead
+ */
+IxFeatureCtrlReg
+ixFeatureCtrlHwCapabilityRead (void)
+{
+ IxFeatureCtrlReg currentReg, hwCapability;
+
+ /* Capture a copy of feature control register */
+ currentReg = ixFeatureCtrlRead();
+
+ /* Try to enable all hardware components.
+ * Only software disable hardware can be enabled again */
+ ixFeatureCtrlWrite(0);
+
+ /* Read feature control register to know the hardware capability. */
+ hwCapability = ixFeatureCtrlRead();
+
+ /* Restore initial feature control value */
+ ixFeatureCtrlWrite(currentReg);
+
+ /* return Hardware Capability */
+ return hwCapability;
+}
+
+
+/**
+ * Function definition: ixFeatureCtrlComponentCheck
+ */
+IX_STATUS
+ixFeatureCtrlComponentCheck (IxFeatureCtrlComponentType componentType)
+{
+ IxFeatureCtrlReg expUnitReg;
+ UINT32 mask = 0;
+
+ /* Lookup mask of component */
+ mask=componentMask[componentType];
+
+ /* Check if mask is available or not */
+ if(IX_FEATURECTRL_COMPONENT_NOT_AVAILABLE == mask)
+ {
+ return IX_FEATURE_CTRL_COMPONENT_DISABLED;
+ }
+
+ if(IX_FEATURECTRL_COMPONENT_ALWAYS_AVAILABLE == mask)
+ {
+ return IX_FEATURE_CTRL_COMPONENT_ENABLED;
+ }
+
+ /* Read feature control register to know current hardware capability. */
+ expUnitReg = ixFeatureCtrlRead();
+
+ /* For example: To check for Hashing Coprocessor (bit-2)
+ * expUniteg = 0x0010
+ * ~expUnitReg = 0x1101
+ * componentType = 0x0100
+ * ~expUnitReg & componentType = 0x0100 (Not zero)
+ */
+
+ /*
+ * Inverse the bit value because available component is 0 in value
+ */
+ expUnitReg = ~expUnitReg ;
+
+ if (expUnitReg & mask)
+ {
+ return (IX_FEATURE_CTRL_COMPONENT_ENABLED);
+ }
+ else
+ {
+ return (IX_FEATURE_CTRL_COMPONENT_DISABLED);
+ }
+}
+
+
+/**
+ * Function definition: ixFeatureCtrlProductIdRead
+ */
+IxFeatureCtrlProductId
+ixFeatureCtrlProductIdRead ()
+{
+#if CPU!=SIMSPARCSOLARIS
+ IxFeatureCtrlProductId pdId = 0 ;
+
+ /* Use ARM instruction to move register0 from coprocessor to ARM register */
+
+#ifndef __wince
+ __asm("mrc p15, 0, %0, cr0, cr0, 0;" : "=r"(pdId) :);
+#else
+
+#ifndef IN_KERNEL
+ BOOL mode;
+#endif
+ extern IxFeatureCtrlProductId AsmixFeatureCtrlProductIdRead();
+
+#ifndef IN_KERNEL
+ mode = SetKMode(TRUE);
+#endif
+ pdId = AsmixFeatureCtrlProductIdRead();
+#ifndef IN_KERNEL
+ SetKMode(mode);
+#endif
+
+#endif
+ return (pdId);
+#else
+ /* Return an invalid value for VxWorks simulation */
+ return 0xffffffff;
+#endif
+}
+
+/**
+ * Function definition: ixFeatureCtrlDeviceRead
+ */
+IxFeatureCtrlDeviceId
+ixFeatureCtrlDeviceRead ()
+{
+ return ((ixFeatureCtrlProductIdRead() >> IX_FEATURE_CTRL_DEVICE_TYPE_OFFSET)
+ & IX_FEATURE_CTRL_DEVICE_TYPE_MASK);
+} /* End function ixFeatureCtrlDeviceRead */
+
+
+/**
+ * Function definition: ixFeatureCtrlSwConfigurationCheck
+ */
+IX_STATUS
+ixFeatureCtrlSwConfigurationCheck (IxFeatureCtrlSwConfig swConfigType)
+{
+ if (swConfigType >= IX_FEATURECTRL_SWCONFIG_MAX)
+ {
+ ixOsalLog(IX_OSAL_LOG_LVL_WARNING,
+ IX_OSAL_LOG_DEV_STDOUT,
+ "FeatureCtrl: Invalid software configuraiton input.\n",
+ 0, 0, 0, 0, 0, 0);
+
+ return IX_FEATURE_CTRL_SWCONFIG_DISABLED;
+ }
+
+ /* The function will only initialize once. */
+ ixFeatureCtrlSwConfigurationInit();
+
+ /* Check and return software configuration */
+ return ((swConfiguration[(UINT32)swConfigType] == TRUE) ? IX_FEATURE_CTRL_SWCONFIG_ENABLED: IX_FEATURE_CTRL_SWCONFIG_DISABLED);
+}
+
+/**
+ * Function definition: ixFeatureCtrlSwConfigurationWrite
+ */
+void
+ixFeatureCtrlSwConfigurationWrite (IxFeatureCtrlSwConfig swConfigType, BOOL enabled)
+{
+ if (swConfigType >= IX_FEATURECTRL_SWCONFIG_MAX)
+ {
+ ixOsalLog(IX_OSAL_LOG_LVL_WARNING,
+ IX_OSAL_LOG_DEV_STDOUT,
+ "FeatureCtrl: Invalid software configuraiton input.\n",
+ 0, 0, 0, 0, 0, 0);
+
+ return;
+ }
+
+ /* The function will only initialize once. */
+ ixFeatureCtrlSwConfigurationInit();
+
+ /* Write software configuration */
+ swConfiguration[(UINT32)swConfigType]=enabled ;
+}
+
+/**
+ * Function definition: ixFeatureCtrlIxp400SwVersionShow
+ */
+void
+ixFeatureCtrlIxp400SwVersionShow (void)
+{
+ printf ("\nIXP400 Software Release %s %s\n\n", IX_VERSION_ID, IX_VERSION_INTERNAL_ID);
+
+}
+
+/**
+ * Function definition: ixFeatureCtrlSoftwareBuildGet
+ */
+IxFeatureCtrlBuildDevice
+ixFeatureCtrlSoftwareBuildGet (void)
+{
+ #ifdef __ixp42X
+ return IX_FEATURE_CTRL_SW_BUILD_IXP42X;
+ #else
+ return IX_FEATURE_CTRL_SW_BUILD_IXP46X;
+ #endif
+}
diff --git a/cpu/ixp/npe/IxNpeDl.c b/cpu/ixp/npe/IxNpeDl.c
new file mode 100644
index 0000000000..ffe355c511
--- /dev/null
+++ b/cpu/ixp/npe/IxNpeDl.c
@@ -0,0 +1,972 @@
+/**
+ * @file IxNpeDl.c
+ *
+ * @author Intel Corporation
+ * @date 08 January 2002
+ *
+ * @brief This file contains the implementation of the public API for the
+ * IXP425 NPE Downloader component
+ *
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+*/
+
+/*
+ * Put the system defined include files required
+ */
+
+/*
+ * Put the user defined include files required
+ */
+#include "IxNpeDl.h"
+#include "IxNpeDlImageMgr_p.h"
+#include "IxNpeDlNpeMgr_p.h"
+#include "IxNpeDlMacros_p.h"
+#include "IxFeatureCtrl.h"
+#include "IxOsal.h"
+/*
+ * #defines used in this file
+ */
+ #define IMAGEID_MAJOR_NUMBER_DEFAULT 0
+ #define IMAGEID_MINOR_NUMBER_DEFAULT 0
+
+/*
+ * Typedefs whose scope is limited to this file.
+ */
+typedef struct
+{
+ BOOL validImage;
+ IxNpeDlImageId imageId;
+} IxNpeDlNpeState;
+
+/* module statistics counters */
+typedef struct
+{
+ UINT32 attemptedDownloads;
+ UINT32 successfulDownloads;
+ UINT32 criticalFailDownloads;
+} IxNpeDlStats;
+
+/*
+ * Variable declarations global to this file only. Externs are followed
+ * by static variables.
+ */
+static IxNpeDlNpeState ixNpeDlNpeState[IX_NPEDL_NPEID_MAX] =
+{
+ {FALSE, {IX_NPEDL_NPEID_MAX, 0, 0, 0}},
+ {FALSE, {IX_NPEDL_NPEID_MAX, 0, 0, 0}},
+ {FALSE, {IX_NPEDL_NPEID_MAX, 0, 0, 0}}
+};
+
+static IxNpeDlStats ixNpeDlStats;
+
+/*
+ * Software guard to prevent NPE from being started multiple times.
+ */
+static BOOL ixNpeDlNpeStarted[IX_NPEDL_NPEID_MAX] ={FALSE, FALSE, FALSE} ;
+
+
+/*
+ * static function prototypes.
+ */
+PRIVATE IX_STATUS
+ixNpeDlNpeInitAndStartInternal (UINT32 *imageLibrary, UINT32 imageId);
+
+/*
+ * Function definition: ixNpeDlMicrocodeImageLibraryOverride
+ */
+PUBLIC IX_STATUS
+ixNpeDlMicrocodeImageLibraryOverride (UINT32 *clientImageLibrary)
+{
+ IX_STATUS status = IX_SUCCESS;
+
+ IX_NPEDL_TRACE0 (IX_NPEDL_FN_ENTRY_EXIT,
+ "Entering ixNpeDlMicrocodeImageLibraryOverride\n");
+
+ if (clientImageLibrary == NULL)
+ {
+ status = IX_NPEDL_PARAM_ERR;
+ IX_NPEDL_ERROR_REPORT ("ixNpeDlMicrocodeImageLibraryOverride - "
+ "invalid parameter\n");
+ }
+ else
+ {
+ status = ixNpeDlImageMgrMicrocodeImageLibraryOverride (clientImageLibrary);
+ if (status != IX_SUCCESS)
+ {
+ status = IX_FAIL;
+ }
+ } /* end of if-else(clientImageLibrary) */
+
+ IX_NPEDL_TRACE1 (IX_NPEDL_FN_ENTRY_EXIT,
+ "Exiting ixNpeDlMicrocodeImageLibraryOverride : "
+ "status = %d\n", status);
+ return status;
+}
+
+/*
+ * Function definition: ixNpeDlImageDownload
+ */
+PUBLIC IX_STATUS
+ixNpeDlImageDownload (IxNpeDlImageId *imageIdPtr,
+ BOOL verify)
+{
+ UINT32 imageSize;
+ UINT32 *imageCodePtr = NULL;
+ IX_STATUS status;
+ IxNpeDlNpeId npeId = imageIdPtr->npeId;
+
+ IX_NPEDL_TRACE0 (IX_NPEDL_FN_ENTRY_EXIT,
+ "Entering ixNpeDlImageDownload\n");
+
+ ixNpeDlStats.attemptedDownloads++;
+
+ /* Check input parameters */
+ if ((npeId >= IX_NPEDL_NPEID_MAX) || (npeId < 0))
+ {
+ status = IX_NPEDL_PARAM_ERR;
+ IX_NPEDL_ERROR_REPORT ("ixNpeDlImageDownload - invalid parameter\n");
+ }
+ else
+ {
+ /* Ensure initialisation has been completed */
+ ixNpeDlNpeMgrInit();
+
+ /* If not IXP42X A0 stepping, proceed to check for existence of npe's */
+ if ((IX_FEATURE_CTRL_SILICON_TYPE_A0 !=
+ (ixFeatureCtrlProductIdRead() & IX_FEATURE_CTRL_SILICON_STEPPING_MASK))
+ || (IX_FEATURE_CTRL_DEVICE_TYPE_IXP42X != ixFeatureCtrlDeviceRead ()))
+ {
+ if (npeId == IX_NPEDL_NPEID_NPEA)
+ {
+ if (ixFeatureCtrlComponentCheck(IX_FEATURECTRL_NPEA) ==
+ IX_FEATURE_CTRL_COMPONENT_DISABLED)
+ {
+ IX_NPEDL_WARNING_REPORT("Warning: the NPE A component you specified does"
+ " not exist\n");
+ return IX_SUCCESS;
+ }
+ } /* end of if(npeId) */
+ else if (npeId == IX_NPEDL_NPEID_NPEB)
+ {
+ if (ixFeatureCtrlComponentCheck(IX_FEATURECTRL_NPEB)==
+ IX_FEATURE_CTRL_COMPONENT_DISABLED)
+ {
+ IX_NPEDL_WARNING_REPORT("Warning: the NPE B component you specified"
+ " does not exist\n");
+ return IX_SUCCESS;
+ }
+ } /* end of elseif(npeId) */
+ else if (npeId == IX_NPEDL_NPEID_NPEC)
+ {
+ if (ixFeatureCtrlComponentCheck(IX_FEATURECTRL_NPEC)==
+ IX_FEATURE_CTRL_COMPONENT_DISABLED)
+ {
+ IX_NPEDL_WARNING_REPORT("Warning: the NPE C component you specified"
+ " does not exist\n");
+ return IX_SUCCESS;
+ }
+ } /* end of elseif(npeId) */
+ } /* end of if(IX_FEATURE_CTRL_SILICON_TYPE_B0) */ /*End of Silicon Type Check*/
+
+ /* stop and reset the NPE */
+ if (IX_SUCCESS != ixNpeDlNpeStopAndReset (npeId))
+ {
+ IX_NPEDL_ERROR_REPORT ("Failed to stop and reset NPE\n");
+ return IX_FAIL;
+ }
+
+ /* Locate image */
+ status = ixNpeDlImageMgrImageLocate (imageIdPtr, &imageCodePtr,
+ &imageSize);
+ if (IX_SUCCESS == status)
+ {
+ /*
+ * If download was successful, store image Id in list of
+ * currently loaded images. If a critical error occured
+ * during download, record that the NPE has an invalid image
+ */
+ status = ixNpeDlNpeMgrImageLoad (npeId, imageCodePtr,
+ verify);
+ if (IX_SUCCESS == status)
+ {
+ ixNpeDlNpeState[npeId].imageId = *imageIdPtr;
+ ixNpeDlNpeState[npeId].validImage = TRUE;
+ ixNpeDlStats.successfulDownloads++;
+
+ status = ixNpeDlNpeExecutionStart (npeId);
+ }
+ else if ((status == IX_NPEDL_CRITICAL_NPE_ERR) ||
+ (status == IX_NPEDL_CRITICAL_MICROCODE_ERR))
+ {
+ ixNpeDlNpeState[npeId].imageId = *imageIdPtr;
+ ixNpeDlNpeState[npeId].validImage = FALSE;
+ ixNpeDlStats.criticalFailDownloads++;
+ }
+ } /* end of if(IX_SUCCESS) */ /* condition: image located successfully in microcode image */
+ } /* end of if-else(npeId) */ /* condition: parameter checks ok */
+
+ IX_NPEDL_TRACE1 (IX_NPEDL_FN_ENTRY_EXIT,
+ "Exiting ixNpeDlImageDownload : status = %d\n", status);
+ return status;
+}
+
+/*
+ * Function definition: ixNpeDlAvailableImagesCountGet
+ */
+PUBLIC IX_STATUS
+ixNpeDlAvailableImagesCountGet (UINT32 *numImagesPtr)
+{
+ IX_STATUS status;
+
+ IX_NPEDL_TRACE0 (IX_NPEDL_FN_ENTRY_EXIT,
+ "Entering ixNpeDlAvailableImagesCountGet\n");
+
+ /* Check input parameters */
+ if (numImagesPtr == NULL)
+ {
+ status = IX_NPEDL_PARAM_ERR;
+ IX_NPEDL_ERROR_REPORT ("ixNpeDlAvailableImagesCountGet - "
+ "invalid parameter\n");
+ }
+ else
+ {
+ /*
+ * Use ImageMgr module to get no. of images listed in Image Library Header.
+ * If NULL is passed as imageListPtr parameter to following function,
+ * it will only fill number of images into numImagesPtr
+ */
+ status = ixNpeDlImageMgrImageListExtract (NULL, numImagesPtr);
+ } /* end of if-else(numImagesPtr) */
+
+ IX_NPEDL_TRACE1 (IX_NPEDL_FN_ENTRY_EXIT,
+ "Exiting ixNpeDlAvailableImagesCountGet : "
+ "status = %d\n", status);
+ return status;
+}
+
+/*
+ * Function definition: ixNpeDlAvailableImagesListGet
+ */
+PUBLIC IX_STATUS
+ixNpeDlAvailableImagesListGet (IxNpeDlImageId *imageIdListPtr,
+ UINT32 *listSizePtr)
+{
+ IX_STATUS status;
+
+ IX_NPEDL_TRACE0 (IX_NPEDL_FN_ENTRY_EXIT,
+ "Entering ixNpeDlAvailableImagesListGet\n");
+
+ /* Check input parameters */
+ if ((imageIdListPtr == NULL) || (listSizePtr == NULL))
+ {
+ status = IX_NPEDL_PARAM_ERR;
+ IX_NPEDL_ERROR_REPORT ("ixNpeDlAvailableImagesListGet - "
+ "invalid parameter\n");
+ }
+ else
+ {
+ /* Call ImageMgr to get list of images listed in Image Library Header */
+ status = ixNpeDlImageMgrImageListExtract (imageIdListPtr,
+ listSizePtr);
+ } /* end of if-else(imageIdListPtr) */
+
+ IX_NPEDL_TRACE1 (IX_NPEDL_FN_ENTRY_EXIT,
+ "Exiting ixNpeDlAvailableImagesListGet : status = %d\n",
+ status);
+ return status;
+}
+
+/*
+ * Function definition: ixNpeDlLoadedImageGet
+ */
+PUBLIC IX_STATUS
+ixNpeDlLoadedImageGet (IxNpeDlNpeId npeId,
+ IxNpeDlImageId *imageIdPtr)
+{
+ IX_STATUS status = IX_SUCCESS;
+
+ IX_NPEDL_TRACE0 (IX_NPEDL_FN_ENTRY_EXIT,
+ "Entering ixNpeDlLoadedImageGet\n");
+
+ /* Check input parameters */
+ if ((npeId >= IX_NPEDL_NPEID_MAX) || (npeId < 0) || (imageIdPtr == NULL))
+ {
+ status = IX_NPEDL_PARAM_ERR;
+ IX_NPEDL_ERROR_REPORT ("ixNpeDlLoadedImageGet - invalid parameter\n");
+ }
+ else
+ {
+
+ /* If not IXP42X A0 stepping, proceed to check for existence of npe's */
+ if ((IX_FEATURE_CTRL_SILICON_TYPE_A0 !=
+ (ixFeatureCtrlProductIdRead() & IX_FEATURE_CTRL_SILICON_STEPPING_MASK))
+ || (IX_FEATURE_CTRL_DEVICE_TYPE_IXP42X != ixFeatureCtrlDeviceRead ()))
+ {
+ if (npeId == IX_NPEDL_NPEID_NPEA &&
+ (ixFeatureCtrlComponentCheck(IX_FEATURECTRL_NPEA) ==
+ IX_FEATURE_CTRL_COMPONENT_DISABLED))
+ {
+ IX_NPEDL_WARNING_REPORT("Warning: the NPE A component you specified does"
+ " not exist\n");
+ return IX_SUCCESS;
+ } /* end of if(npeId) */
+
+ if (npeId == IX_NPEDL_NPEID_NPEB &&
+ (ixFeatureCtrlComponentCheck(IX_FEATURECTRL_NPEB) ==
+ IX_FEATURE_CTRL_COMPONENT_DISABLED))
+ {
+ IX_NPEDL_WARNING_REPORT("Warning: the NPE B component you specified does"
+ " not exist\n");
+ return IX_SUCCESS;
+ } /* end of if(npeId) */
+
+ if (npeId == IX_NPEDL_NPEID_NPEC &&
+ (ixFeatureCtrlComponentCheck(IX_FEATURECTRL_NPEC) ==
+ IX_FEATURE_CTRL_COMPONENT_DISABLED))
+ {
+ IX_NPEDL_WARNING_REPORT("Warning: the NPE C component you specified does"
+ " not exist\n");
+ return IX_SUCCESS;
+ } /* end of if(npeId) */
+ } /* end of if not IXP42x-A0 silicon */
+
+ if (ixNpeDlNpeState[npeId].validImage)
+ {
+ /* use npeId to get imageId from list of currently loaded
+ images */
+ *imageIdPtr = ixNpeDlNpeState[npeId].imageId;
+ }
+ else
+ {
+ status = IX_FAIL;
+ } /* end of if-else(ixNpeDlNpeState) */
+ } /* end of if-else(npeId) */
+
+ IX_NPEDL_TRACE1 (IX_NPEDL_FN_ENTRY_EXIT,
+ "Exiting ixNpeDlLoadedImageGet : status = %d\n",
+ status);
+ return status;
+}
+
+/*
+ * Function definition: ixNpeDlLatestImageGet
+ */
+PUBLIC IX_STATUS
+ixNpeDlLatestImageGet (
+ IxNpeDlNpeId npeId,
+ IxNpeDlFunctionalityId functionalityId,
+ IxNpeDlImageId *imageIdPtr)
+{
+ IX_STATUS status;
+
+ IX_NPEDL_TRACE0 (IX_NPEDL_FN_ENTRY_EXIT,
+ "Entering ixNpeDlLatestImageGet\n");
+
+ /* Check input parameters */
+ if ((npeId >= IX_NPEDL_NPEID_MAX) ||
+ (npeId < 0) ||
+ (imageIdPtr == NULL))
+ {
+ status = IX_NPEDL_PARAM_ERR;
+ IX_NPEDL_ERROR_REPORT ("ixNpeDlLatestImageGet - "
+ "invalid parameter\n");
+ } /* end of if(npeId) */
+ else
+ {
+
+ /* If not IXP42X A0 stepping, proceed to check for existence of npe's */
+ if ((IX_FEATURE_CTRL_SILICON_TYPE_A0 !=
+ (ixFeatureCtrlProductIdRead() & IX_FEATURE_CTRL_SILICON_STEPPING_MASK))
+ || (IX_FEATURE_CTRL_DEVICE_TYPE_IXP42X != ixFeatureCtrlDeviceRead ()))
+ {
+ if (npeId == IX_NPEDL_NPEID_NPEA &&
+ (ixFeatureCtrlComponentCheck(IX_FEATURECTRL_NPEA) ==
+ IX_FEATURE_CTRL_COMPONENT_DISABLED))
+ {
+ IX_NPEDL_WARNING_REPORT("Warning: the NPE A component you specified does"
+ " not exist\n");
+ return IX_SUCCESS;
+ } /* end of if(npeId) */
+
+ if (npeId == IX_NPEDL_NPEID_NPEB &&
+ (ixFeatureCtrlComponentCheck(IX_FEATURECTRL_NPEB) ==
+ IX_FEATURE_CTRL_COMPONENT_DISABLED))
+ {
+ IX_NPEDL_WARNING_REPORT("Warning: the NPE B component you specified does"
+ " not exist\n");
+ return IX_SUCCESS;
+ } /* end of if(npeId) */
+
+ if (npeId == IX_NPEDL_NPEID_NPEC &&
+ (ixFeatureCtrlComponentCheck(IX_FEATURECTRL_NPEC) ==
+ IX_FEATURE_CTRL_COMPONENT_DISABLED))
+ {
+ IX_NPEDL_WARNING_REPORT("Warning: the NPE C component you specified does"
+ " not exist\n");
+ return IX_SUCCESS;
+ } /* end of if(npeId) */
+ } /* end of if not IXP42x-A0 silicon */
+
+ imageIdPtr->npeId = npeId;
+ imageIdPtr->functionalityId = functionalityId;
+ imageIdPtr->major = IMAGEID_MAJOR_NUMBER_DEFAULT;
+ imageIdPtr->minor = IMAGEID_MINOR_NUMBER_DEFAULT;
+ /* Call ImageMgr to get list of images listed in Image Library Header */
+ status = ixNpeDlImageMgrLatestImageExtract(imageIdPtr);
+ } /* end of if-else(npeId) */
+
+ IX_NPEDL_TRACE1 (IX_NPEDL_FN_ENTRY_EXIT,
+ "Exiting ixNpeDlLatestImageGet : status = %d\n",
+ status);
+
+ return status;
+}
+
+/*
+ * Function definition: ixNpeDlNpeStopAndReset
+ */
+PUBLIC IX_STATUS
+ixNpeDlNpeStopAndReset (IxNpeDlNpeId npeId)
+{
+ IX_STATUS status = IX_SUCCESS;
+
+ IX_NPEDL_TRACE0 (IX_NPEDL_FN_ENTRY_EXIT,
+ "Entering ixNpeDlNpeStopAndReset\n");
+
+ /* Ensure initialisation has been completed */
+ ixNpeDlNpeMgrInit();
+
+ /* If not IXP42X A0 stepping, proceed to check for existence of npe's */
+ if ((IX_FEATURE_CTRL_SILICON_TYPE_A0 !=
+ (ixFeatureCtrlProductIdRead() & IX_FEATURE_CTRL_SILICON_STEPPING_MASK))
+ || (IX_FEATURE_CTRL_DEVICE_TYPE_IXP42X != ixFeatureCtrlDeviceRead ()))
+ {
+ /*
+ * Check whether NPE is present
+ */
+ if (IX_NPEDL_NPEID_NPEA == npeId)
+ {
+ /* Check whether NPE A is present */
+ if (ixFeatureCtrlComponentCheck(IX_FEATURECTRL_NPEA)==
+ IX_FEATURE_CTRL_COMPONENT_DISABLED)
+ {
+ /* NPE A does not present */
+ IX_NPEDL_WARNING_REPORT ("ixNpeDlNpeStopAndReset - Warning:NPEA does not present.\n");
+ return IX_SUCCESS;
+ }
+ } /* end of if(IX_NPEDL_NPEID_NPEA) */
+ else if (IX_NPEDL_NPEID_NPEB == npeId)
+ {
+ /* Check whether NPE B is present */
+ if (ixFeatureCtrlComponentCheck(IX_FEATURECTRL_NPEB)==
+ IX_FEATURE_CTRL_COMPONENT_DISABLED)
+ {
+ /* NPE B does not present */
+ IX_NPEDL_WARNING_REPORT ("ixNpeDlNpeStopAndReset - Warning:NPEB does not present.\n");
+ return IX_SUCCESS;
+ }
+ } /* end of elseif(IX_NPEDL_NPEID_NPEB) */
+ else if (IX_NPEDL_NPEID_NPEC == npeId)
+ {
+ /* Check whether NPE C is present */
+ if (ixFeatureCtrlComponentCheck(IX_FEATURECTRL_NPEC)==
+ IX_FEATURE_CTRL_COMPONENT_DISABLED)
+ {
+ /* NPE C does not present */
+ IX_NPEDL_WARNING_REPORT ("ixNpeDlNpeStopAndReset - Warning:NPEC does not present.\n");
+ return IX_SUCCESS;
+ }
+ } /* end of elseif(IX_NPEDL_NPEID_NPEC) */
+ else
+ {
+ /* Invalid NPE ID */
+ IX_NPEDL_ERROR_REPORT ("ixNpeDlNpeStopAndReset - invalid Npe ID\n");
+ status = IX_NPEDL_PARAM_ERR;
+ } /* end of if-else(IX_NPEDL_NPEID_NPEC) */
+ } /* end of if not IXP42x-A0 Silicon */
+
+ if (status == IX_SUCCESS)
+ {
+ /* call NpeMgr function to stop the NPE */
+ status = ixNpeDlNpeMgrNpeStop (npeId);
+ if (status == IX_SUCCESS)
+ {
+ /* call NpeMgr function to reset the NPE */
+ status = ixNpeDlNpeMgrNpeReset (npeId);
+ }
+ } /* end of if(status) */
+
+ IX_NPEDL_TRACE1 (IX_NPEDL_FN_ENTRY_EXIT,
+ "Exiting ixNpeDlNpeStopAndReset : status = %d\n", status);
+
+ if (IX_SUCCESS == status)
+ {
+ /* Indicate NPE has been stopped */
+ ixNpeDlNpeStarted[npeId] = FALSE ;
+ }
+
+ return status;
+}
+
+/*
+ * Function definition: ixNpeDlNpeExecutionStart
+ */
+PUBLIC IX_STATUS
+ixNpeDlNpeExecutionStart (IxNpeDlNpeId npeId)
+{
+ IX_STATUS status = IX_SUCCESS;
+
+ IX_NPEDL_TRACE0 (IX_NPEDL_FN_ENTRY_EXIT,
+ "Entering ixNpeDlNpeExecutionStart\n");
+
+ /* If not IXP42X A0 stepping, proceed to check for existence of npe's */
+ if ((IX_FEATURE_CTRL_SILICON_TYPE_A0 !=
+ (ixFeatureCtrlProductIdRead() & IX_FEATURE_CTRL_SILICON_STEPPING_MASK))
+ || (IX_FEATURE_CTRL_DEVICE_TYPE_IXP42X != ixFeatureCtrlDeviceRead ()))
+ {
+ /*
+ * Check whether NPE is present
+ */
+ if (IX_NPEDL_NPEID_NPEA == npeId)
+ {
+ /* Check whether NPE A is present */
+ if (ixFeatureCtrlComponentCheck(IX_FEATURECTRL_NPEA)==
+ IX_FEATURE_CTRL_COMPONENT_DISABLED)
+ {
+ /* NPE A does not present */
+ IX_NPEDL_WARNING_REPORT ("ixNpeDlNpeExecutionStart - Warning:NPEA does not present.\n");
+ return IX_SUCCESS;
+ }
+ } /* end of if(IX_NPEDL_NPEID_NPEA) */
+ else if (IX_NPEDL_NPEID_NPEB == npeId)
+ {
+ /* Check whether NPE B is present */
+ if (ixFeatureCtrlComponentCheck(IX_FEATURECTRL_NPEB)==
+ IX_FEATURE_CTRL_COMPONENT_DISABLED)
+ {
+ /* NPE B does not present */
+ IX_NPEDL_WARNING_REPORT ("ixNpeDlNpeExecutionStart - Warning:NPEB does not present.\n");
+ return IX_SUCCESS;
+ }
+ } /* end of elseif(IX_NPEDL_NPEID_NPEB) */
+ else if (IX_NPEDL_NPEID_NPEC == npeId)
+ {
+ /* Check whether NPE C is present */
+ if (ixFeatureCtrlComponentCheck(IX_FEATURECTRL_NPEC)==
+ IX_FEATURE_CTRL_COMPONENT_DISABLED)
+ {
+ /* NPE C does not present */
+ IX_NPEDL_WARNING_REPORT ("ixNpeDlNpeExecutionStart - Warning:NPEC does not present.\n");
+ return IX_SUCCESS;
+ }
+ } /* end of elseif(IX_NPEDL_NPEID_NPEC) */
+ else
+ {
+ /* Invalid NPE ID */
+ IX_NPEDL_ERROR_REPORT ("ixNpeDlNpeExecutionStart - invalid Npe ID\n");
+ return IX_NPEDL_PARAM_ERR;
+ } /* end of if-else(IX_NPEDL_NPEID_NPEC) */
+ } /* end of if not IXP42x-A0 Silicon */
+
+ if (TRUE == ixNpeDlNpeStarted[npeId])
+ {
+ /* NPE has been started. */
+ return IX_SUCCESS ;
+ }
+
+ /* Ensure initialisation has been completed */
+ ixNpeDlNpeMgrInit();
+
+ /* call NpeMgr function to start the NPE */
+ status = ixNpeDlNpeMgrNpeStart (npeId);
+
+ if (IX_SUCCESS == status)
+ {
+ /* Indicate NPE has started */
+ ixNpeDlNpeStarted[npeId] = TRUE ;
+ }
+
+ IX_NPEDL_TRACE1 (IX_NPEDL_FN_ENTRY_EXIT,
+ "Exiting ixNpeDlNpeExecutionStart : status = %d\n",
+ status);
+
+ return status;
+}
+
+/*
+ * Function definition: ixNpeDlNpeExecutionStop
+ */
+PUBLIC IX_STATUS
+ixNpeDlNpeExecutionStop (IxNpeDlNpeId npeId)
+{
+ IX_STATUS status = IX_SUCCESS;
+
+ IX_NPEDL_TRACE0 (IX_NPEDL_FN_ENTRY_EXIT,
+ "Entering ixNpeDlNpeExecutionStop\n");
+
+ /* Ensure initialisation has been completed */
+ ixNpeDlNpeMgrInit();
+
+ /* If not IXP42X A0 stepping, proceed to check for existence of npe's */
+ if ((IX_FEATURE_CTRL_SILICON_TYPE_A0 !=
+ (ixFeatureCtrlProductIdRead() & IX_FEATURE_CTRL_SILICON_STEPPING_MASK))
+ || (IX_FEATURE_CTRL_DEVICE_TYPE_IXP42X != ixFeatureCtrlDeviceRead ()))
+ {
+ /*
+ * Check whether NPE is present
+ */
+ if (IX_NPEDL_NPEID_NPEA == npeId)
+ {
+ /* Check whether NPE A is present */
+ if (ixFeatureCtrlComponentCheck(IX_FEATURECTRL_NPEA)==
+ IX_FEATURE_CTRL_COMPONENT_DISABLED)
+ {
+ /* NPE A does not present */
+ IX_NPEDL_WARNING_REPORT ("ixNpeDlNpeExecutionStop - Warning:NPEA does not present.\n");
+ return IX_SUCCESS;
+ }
+ } /* end of if(IX_NPEDL_NPEID_NPEA) */
+ else if (IX_NPEDL_NPEID_NPEB == npeId)
+ {
+ /* Check whether NPE B is present */
+ if (ixFeatureCtrlComponentCheck(IX_FEATURECTRL_NPEB)==
+ IX_FEATURE_CTRL_COMPONENT_DISABLED)
+ {
+ /* NPE B does not present */
+ IX_NPEDL_WARNING_REPORT ("ixNpeDlNpeExecutionStop - Warning:NPEB does not present.\n");
+ return IX_SUCCESS;
+ }
+ } /* end of elseif(IX_NPEDL_NPEID_NPEB) */
+ else if (IX_NPEDL_NPEID_NPEC == npeId)
+ {
+ /* Check whether NPE C is present */
+ if (ixFeatureCtrlComponentCheck(IX_FEATURECTRL_NPEC)==
+ IX_FEATURE_CTRL_COMPONENT_DISABLED)
+ {
+ /* NPE C does not present */
+ IX_NPEDL_WARNING_REPORT ("ixNpeDlNpeExecutionStop - Warning:NPEC does not present.\n");
+ return IX_SUCCESS;
+ }
+ } /* end of elseif(IX_NPEDL_NPEID_NPEC) */
+ else
+ {
+ /* Invalid NPE ID */
+ IX_NPEDL_ERROR_REPORT ("ixNpeDlNpeExecutionStop - invalid Npe ID\n");
+ status = IX_NPEDL_PARAM_ERR;
+ } /* end of if-else(IX_NPEDL_NPEID_NPEC) */
+ } /* end of if not IXP42X-AO Silicon */
+
+ if (status == IX_SUCCESS)
+ {
+ /* call NpeMgr function to stop the NPE */
+ status = ixNpeDlNpeMgrNpeStop (npeId);
+ }
+
+ IX_NPEDL_TRACE1 (IX_NPEDL_FN_ENTRY_EXIT,
+ "Exiting ixNpeDlNpeExecutionStop : status = %d\n",
+ status);
+
+ if (IX_SUCCESS == status)
+ {
+ /* Indicate NPE has been stopped */
+ ixNpeDlNpeStarted[npeId] = FALSE ;
+ }
+
+ return status;
+}
+
+/*
+ * Function definition: ixNpeDlUnload
+ */
+PUBLIC IX_STATUS
+ixNpeDlUnload (void)
+{
+ IX_STATUS status;
+
+ IX_NPEDL_TRACE0 (IX_NPEDL_FN_ENTRY_EXIT,
+ "Entering ixNpeDlUnload\n");
+
+ status = ixNpeDlNpeMgrUninit();
+
+ IX_NPEDL_TRACE1 (IX_NPEDL_FN_ENTRY_EXIT,
+ "Exiting ixNpeDlUnload : status = %d\n",
+ status);
+ return status;
+}
+
+/*
+ * Function definition: ixNpeDlStatsShow
+ */
+PUBLIC void
+ixNpeDlStatsShow (void)
+{
+ ixOsalLog (IX_OSAL_LOG_LVL_USER,
+ IX_OSAL_LOG_DEV_STDOUT,
+ "\nixNpeDlStatsShow:\n"
+ "\tDownloads Attempted by user: %u\n"
+ "\tSuccessful Downloads: %u\n"
+ "\tFailed Downloads (due to Critical Error): %u\n\n",
+ ixNpeDlStats.attemptedDownloads,
+ ixNpeDlStats.successfulDownloads,
+ ixNpeDlStats.criticalFailDownloads,
+ 0,0,0);
+
+ ixNpeDlImageMgrStatsShow ();
+ ixNpeDlNpeMgrStatsShow ();
+}
+
+/*
+ * Function definition: ixNpeDlStatsReset
+ */
+PUBLIC void
+ixNpeDlStatsReset (void)
+{
+ ixNpeDlStats.attemptedDownloads = 0;
+ ixNpeDlStats.successfulDownloads = 0;
+ ixNpeDlStats.criticalFailDownloads = 0;
+
+ ixNpeDlImageMgrStatsReset ();
+ ixNpeDlNpeMgrStatsReset ();
+}
+
+/*
+ * Function definition: ixNpeDlNpeInitAndStartInternal
+ */
+PRIVATE IX_STATUS
+ixNpeDlNpeInitAndStartInternal (UINT32 *imageLibrary,
+ UINT32 imageId)
+{
+ UINT32 imageSize;
+ UINT32 *imageCodePtr = NULL;
+ IX_STATUS status;
+ IxNpeDlNpeId npeId = IX_NPEDL_NPEID_FROM_IMAGEID_GET(imageId);
+ IxFeatureCtrlDeviceId deviceId = IX_NPEDL_DEVICEID_FROM_IMAGEID_GET(imageId);
+
+ IX_NPEDL_TRACE0 (IX_NPEDL_FN_ENTRY_EXIT,
+ "Entering ixNpeDlNpeInitAndStartInternal\n");
+
+ ixNpeDlStats.attemptedDownloads++;
+
+ /* Check input parameter device correctness */
+ if ((deviceId >= IX_FEATURE_CTRL_DEVICE_TYPE_MAX) ||
+ (deviceId < IX_FEATURE_CTRL_DEVICE_TYPE_IXP42X))
+ {
+ status = IX_NPEDL_PARAM_ERR;
+ IX_NPEDL_ERROR_REPORT ("ixNpeDlNpeInitAndStartInternal - "
+ "invalid parameter\n");
+ } /* End valid device id checking */
+
+ /* Check input parameters */
+ else if ((npeId >= IX_NPEDL_NPEID_MAX) || (npeId < 0))
+ {
+ status = IX_NPEDL_PARAM_ERR;
+ IX_NPEDL_ERROR_REPORT ("ixNpeDlNpeInitAndStartInternal - "
+ "invalid parameter\n");
+ }
+
+ else
+ {
+ /* Ensure initialisation has been completed */
+ ixNpeDlNpeMgrInit();
+
+ /* Checking if image being loaded is meant for device that is running.
+ * Image is forward compatible. i.e Image built for IXP42X should run
+ * on IXP46X but not vice versa.*/
+ if (deviceId > (ixFeatureCtrlDeviceRead() & IX_FEATURE_CTRL_DEVICE_TYPE_MASK))
+ {
+ IX_NPEDL_ERROR_REPORT ("ixNpeDlNpeInitAndStartInternal - "
+ "Device type mismatch. NPE Image not "
+ "meant for device in use \n");
+ return IX_NPEDL_DEVICE_ERR;
+ }/* if statement - matching image device and current device */
+
+ /* If not IXP42X A0 stepping, proceed to check for existence of npe's */
+ if ((IX_FEATURE_CTRL_SILICON_TYPE_A0 !=
+ (ixFeatureCtrlProductIdRead() & IX_FEATURE_CTRL_SILICON_STEPPING_MASK))
+ || (IX_FEATURE_CTRL_DEVICE_TYPE_IXP42X != ixFeatureCtrlDeviceRead ()))
+ {
+ if (npeId == IX_NPEDL_NPEID_NPEA)
+ {
+ if (ixFeatureCtrlComponentCheck(IX_FEATURECTRL_NPEA) ==
+ IX_FEATURE_CTRL_COMPONENT_DISABLED)
+ {
+ IX_NPEDL_WARNING_REPORT("Warning: the NPE A component you specified does"
+ " not exist\n");
+ return IX_SUCCESS;
+ }
+ } /* end of if(npeId) */
+ else if (npeId == IX_NPEDL_NPEID_NPEB)
+ {
+ if (ixFeatureCtrlComponentCheck(IX_FEATURECTRL_NPEB)==
+ IX_FEATURE_CTRL_COMPONENT_DISABLED)
+ {
+ IX_NPEDL_WARNING_REPORT("Warning: the NPE B component you specified"
+ " does not exist\n");
+ return IX_SUCCESS;
+ }
+ } /* end of elseif(npeId) */
+ else if (npeId == IX_NPEDL_NPEID_NPEC)
+ {
+ if (ixFeatureCtrlComponentCheck(IX_FEATURECTRL_NPEC)==
+ IX_FEATURE_CTRL_COMPONENT_DISABLED)
+ {
+ IX_NPEDL_WARNING_REPORT("Warning: the NPE C component you specified"
+ " does not exist\n");
+ return IX_SUCCESS;
+ }
+ } /* end of elseif(npeId) */
+ } /* end of if not IXP42X-A0 Silicon */
+
+ /* stop and reset the NPE */
+ status = ixNpeDlNpeStopAndReset (npeId);
+ if (IX_SUCCESS != status)
+ {
+ IX_NPEDL_ERROR_REPORT ("Failed to stop and reset NPE\n");
+ return status;
+ }
+
+ /* Locate image */
+ status = ixNpeDlImageMgrImageFind (imageLibrary, imageId,
+ &imageCodePtr, &imageSize);
+ if (IX_SUCCESS == status)
+ {
+ /*
+ * If download was successful, store image Id in list of
+ * currently loaded images. If a critical error occured
+ * during download, record that the NPE has an invalid image
+ */
+ status = ixNpeDlNpeMgrImageLoad (npeId, imageCodePtr, TRUE);
+ if (IX_SUCCESS == status)
+ {
+ ixNpeDlNpeState[npeId].validImage = TRUE;
+ ixNpeDlStats.successfulDownloads++;
+
+ status = ixNpeDlNpeExecutionStart (npeId);
+ }
+ else if ((status == IX_NPEDL_CRITICAL_NPE_ERR) ||
+ (status == IX_NPEDL_CRITICAL_MICROCODE_ERR))
+ {
+ ixNpeDlNpeState[npeId].validImage = FALSE;
+ ixNpeDlStats.criticalFailDownloads++;
+ }
+
+ /* NOTE - The following section of code is here to support
+ * a deprecated function ixNpeDlLoadedImageGet(). When that
+ * function is removed from the API, this code should be revised.
+ */
+ ixNpeDlNpeState[npeId].imageId.npeId = npeId;
+ ixNpeDlNpeState[npeId].imageId.functionalityId =
+ IX_NPEDL_FUNCTIONID_FROM_IMAGEID_GET(imageId);
+ ixNpeDlNpeState[npeId].imageId.major =
+ IX_NPEDL_MAJOR_FROM_IMAGEID_GET(imageId);
+ ixNpeDlNpeState[npeId].imageId.minor =
+ IX_NPEDL_MINOR_FROM_IMAGEID_GET(imageId);
+ } /* end of if(IX_SUCCESS) */ /* condition: image located successfully in microcode image */
+ } /* end of if-else(npeId-deviceId) */ /* condition: parameter checks ok */
+
+ IX_NPEDL_TRACE1 (IX_NPEDL_FN_ENTRY_EXIT,
+ "Exiting ixNpeDlNpeInitAndStartInternal : "
+ "status = %d\n", status);
+ return status;
+}
+
+/*
+ * Function definition: ixNpeDlCustomImageNpeInitAndStart
+ */
+PUBLIC IX_STATUS
+ixNpeDlCustomImageNpeInitAndStart (UINT32 *imageLibrary,
+ UINT32 imageId)
+{
+ IX_STATUS status;
+
+ if (imageLibrary == NULL)
+ {
+ status = IX_NPEDL_PARAM_ERR;
+ IX_NPEDL_ERROR_REPORT ("ixNpeDlCustomImageNpeInitAndStart "
+ "- invalid parameter\n");
+ }
+ else
+ {
+ status = ixNpeDlNpeInitAndStartInternal (imageLibrary, imageId);
+ } /* end of if-else(imageLibrary) */
+
+ return status;
+}
+
+/*
+ * Function definition: ixNpeDlNpeInitAndStart
+ */
+PUBLIC IX_STATUS
+ixNpeDlNpeInitAndStart (UINT32 imageId)
+{
+ return ixNpeDlNpeInitAndStartInternal (NULL, imageId);
+}
+
+/*
+ * Function definition: ixNpeDlLoadedImageFunctionalityGet
+ */
+PUBLIC IX_STATUS
+ixNpeDlLoadedImageFunctionalityGet (IxNpeDlNpeId npeId,
+ UINT8 *functionalityId)
+{
+ /* Check input parameters */
+ if ((npeId >= IX_NPEDL_NPEID_MAX) || (npeId < 0))
+ {
+ IX_NPEDL_ERROR_REPORT ("ixNpeDlLoadedImageFunctionalityGet "
+ "- invalid parameter\n");
+ return IX_NPEDL_PARAM_ERR;
+ }
+ if (functionalityId == NULL)
+ {
+ IX_NPEDL_ERROR_REPORT ("ixNpeDlLoadedImageFunctionalityGet "
+ "- invalid parameter\n");
+ return IX_NPEDL_PARAM_ERR;
+ }
+
+ if (ixNpeDlNpeState[npeId].validImage)
+ {
+ *functionalityId = ixNpeDlNpeState[npeId].imageId.functionalityId;
+ return IX_SUCCESS;
+ }
+ else
+ {
+ return IX_FAIL;
+ }
+}
diff --git a/cpu/ixp/npe/IxNpeDlImageMgr.c b/cpu/ixp/npe/IxNpeDlImageMgr.c
new file mode 100644
index 0000000000..e05c228537
--- /dev/null
+++ b/cpu/ixp/npe/IxNpeDlImageMgr.c
@@ -0,0 +1,675 @@
+/**
+ * @file IxNpeDlImageMgr.c
+ *
+ * @author Intel Corporation
+ * @date 09 January 2002
+ *
+ * @brief This file contains the implementation of the private API for the
+ * IXP425 NPE Downloader ImageMgr module
+ *
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+*/
+
+
+/*
+ * Put the system defined include files required.
+ */
+#include "IxOsal.h"
+
+/*
+ * Put the user defined include files required.
+ */
+#include "IxNpeDlImageMgr_p.h"
+#include "IxNpeDlMacros_p.h"
+
+/*
+ * define the flag which toggles the firmare inclusion
+ */
+#define IX_NPE_MICROCODE_FIRMWARE_INCLUDED 1
+#include "IxNpeMicrocode.h"
+
+/*
+ * Indicates the start of an NPE Image, in new NPE Image Library format.
+ * 2 consecutive occurances indicates the end of the NPE Image Library
+ */
+#define NPE_IMAGE_MARKER 0xfeedf00d
+
+/*
+ * Typedefs whose scope is limited to this file.
+ */
+
+/*
+ * FOR BACKWARD-COMPATIBILITY WITH OLD NPE IMAGE LIBRARY FORMAT
+ * TO BE DEPRECATED IN A FUTURE RELEASE
+ */
+typedef struct
+{
+ UINT32 size;
+ UINT32 offset;
+ UINT32 id;
+} IxNpeDlImageMgrImageEntry;
+
+/*
+ * FOR BACKWARD-COMPATIBILITY WITH OLD NPE IMAGE LIBRARY FORMAT
+ * TO BE DEPRECATED IN A FUTURE RELEASE
+ */
+typedef union
+{
+ IxNpeDlImageMgrImageEntry image;
+ UINT32 eohMarker;
+} IxNpeDlImageMgrHeaderEntry;
+
+/*
+ * FOR BACKWARD-COMPATIBILITY WITH OLD NPE IMAGE LIBRARY FORMAT
+ * TO BE DEPRECATED IN A FUTURE RELEASE
+ */
+typedef struct
+{
+ UINT32 signature;
+ /* 1st entry in the header (there may be more than one) */
+ IxNpeDlImageMgrHeaderEntry entry[1];
+} IxNpeDlImageMgrImageLibraryHeader;
+
+
+/*
+ * NPE Image Header definition, used in new NPE Image Library format
+ */
+typedef struct
+{
+ UINT32 marker;
+ UINT32 id;
+ UINT32 size;
+} IxNpeDlImageMgrImageHeader;
+
+/* module statistics counters */
+typedef struct
+{
+ UINT32 invalidSignature;
+ UINT32 imageIdListOverflow;
+ UINT32 imageIdNotFound;
+} IxNpeDlImageMgrStats;
+
+
+/*
+ * Variable declarations global to this file only. Externs are followed by
+ * static variables.
+ */
+static IxNpeDlImageMgrStats ixNpeDlImageMgrStats;
+
+/* default image */
+#ifdef IX_NPEDL_READ_MICROCODE_FROM_FILE
+static UINT32 *IxNpeMicroCodeImageLibrary = NULL; /* Gets set to proper value at runtime */
+#else
+static UINT32 *IxNpeMicroCodeImageLibrary = (UINT32 *)IxNpeMicrocode_array;
+#endif
+
+
+/*
+ * static function prototypes.
+ */
+PRIVATE BOOL
+ixNpeDlImageMgrSignatureCheck (UINT32 *microCodeImageLibrary);
+
+PRIVATE void
+ixNpeDlImageMgrImageIdFormat (UINT32 rawImageId, IxNpeDlImageId *imageId);
+
+PRIVATE BOOL
+ixNpeDlImageMgrImageIdCompare (IxNpeDlImageId *imageIdA,
+ IxNpeDlImageId *imageIdB);
+
+PRIVATE BOOL
+ixNpeDlImageMgrNpeFunctionIdCompare (IxNpeDlImageId *imageIdA,
+ IxNpeDlImageId *imageIdB);
+
+PRIVATE IX_STATUS
+ixNpeDlImageMgrImageFind_legacy (UINT32 *imageLibrary,
+ UINT32 imageId,
+ UINT32 **imagePtr,
+ UINT32 *imageSize);
+
+/*
+ * Function definition: ixNpeDlImageMgrMicrocodeImageLibraryOverride
+ *
+ * FOR BACKWARD-COMPATIBILITY WITH OLD NPE IMAGE LIBRARY FORMAT
+ * AND/OR LEGACY API FUNCTIONS. TO BE DEPRECATED IN A FUTURE RELEASE
+ */
+IX_STATUS
+ixNpeDlImageMgrMicrocodeImageLibraryOverride (
+ UINT32 *clientImageLibrary)
+{
+ IX_STATUS status = IX_SUCCESS;
+
+ IX_NPEDL_TRACE0 (IX_NPEDL_FN_ENTRY_EXIT,
+ "Entering ixNpeDlImageMgrMicrocodeImageLibraryOverride\n");
+
+ if (ixNpeDlImageMgrSignatureCheck (clientImageLibrary))
+ {
+ IxNpeMicroCodeImageLibrary = clientImageLibrary;
+ }
+ else
+ {
+ IX_NPEDL_ERROR_REPORT ("ixNpeDlImageMgrMicrocodeImageLibraryOverride: "
+ "Client-supplied image has invalid signature\n");
+ status = IX_FAIL;
+ }
+
+ IX_NPEDL_TRACE1 (IX_NPEDL_FN_ENTRY_EXIT,
+ "Exiting ixNpeDlImageMgrMicrocodeImageLibraryOverride: status = %d\n",
+ status);
+ return status;
+}
+
+
+/*
+ * Function definition: ixNpeDlImageMgrImageListExtract
+ *
+ * FOR BACKWARD-COMPATIBILITY WITH OLD NPE IMAGE LIBRARY FORMAT
+ * AND/OR LEGACY API FUNCTIONS. TO BE DEPRECATED IN A FUTURE RELEASE
+ */
+IX_STATUS
+ixNpeDlImageMgrImageListExtract (
+ IxNpeDlImageId *imageListPtr,
+ UINT32 *numImages)
+{
+ UINT32 rawImageId;
+ IxNpeDlImageId formattedImageId;
+ IX_STATUS status = IX_SUCCESS;
+ UINT32 imageCount = 0;
+ IxNpeDlImageMgrImageLibraryHeader *header;
+
+ IX_NPEDL_TRACE0 (IX_NPEDL_FN_ENTRY_EXIT,
+ "Entering ixNpeDlImageMgrImageListExtract\n");
+
+ header = (IxNpeDlImageMgrImageLibraryHeader *) IxNpeMicroCodeImageLibrary;
+
+ if (ixNpeDlImageMgrSignatureCheck (IxNpeMicroCodeImageLibrary))
+ {
+ /* for each image entry in the image header ... */
+ while (header->entry[imageCount].eohMarker !=
+ IX_NPEDL_IMAGEMGR_END_OF_HEADER)
+ {
+ /*
+ * if the image list container from calling function has capacity,
+ * add the image id to the list
+ */
+ if ((imageListPtr != NULL) && (imageCount < *numImages))
+ {
+ rawImageId = header->entry[imageCount].image.id;
+ ixNpeDlImageMgrImageIdFormat (rawImageId, &formattedImageId);
+ imageListPtr[imageCount] = formattedImageId;
+ }
+ /* imageCount reflects no. of image entries in image library header */
+ imageCount++;
+ }
+
+ /*
+ * if image list container from calling function was too small to
+ * contain all image ids in the header, set return status to FAIL
+ */
+ if ((imageListPtr != NULL) && (imageCount > *numImages))
+ {
+ status = IX_FAIL;
+ IX_NPEDL_ERROR_REPORT ("ixNpeDlImageMgrImageListExtract: "
+ "number of Ids found exceeds list capacity\n");
+ ixNpeDlImageMgrStats.imageIdListOverflow++;
+ }
+ /* return number of image ids found in image library header */
+ *numImages = imageCount;
+ }
+ else
+ {
+ status = IX_FAIL;
+ IX_NPEDL_ERROR_REPORT ("ixNpeDlImageMgrImageListExtract: "
+ "invalid signature in image\n");
+ }
+
+ IX_NPEDL_TRACE1 (IX_NPEDL_FN_ENTRY_EXIT,
+ "Exiting ixNpeDlImageMgrImageListExtract: status = %d\n",
+ status);
+ return status;
+}
+
+
+/*
+ * Function definition: ixNpeDlImageMgrImageLocate
+ *
+ * FOR BACKWARD-COMPATIBILITY WITH OLD NPE IMAGE LIBRARY FORMAT
+ * AND/OR LEGACY API FUNCTIONS. TO BE DEPRECATED IN A FUTURE RELEASE
+ */
+IX_STATUS
+ixNpeDlImageMgrImageLocate (
+ IxNpeDlImageId *imageId,
+ UINT32 **imagePtr,
+ UINT32 *imageSize)
+{
+ UINT32 imageOffset;
+ UINT32 rawImageId;
+ IxNpeDlImageId formattedImageId;
+ /* used to index image entries in image library header */
+ UINT32 imageCount = 0;
+ IX_STATUS status = IX_FAIL;
+ IxNpeDlImageMgrImageLibraryHeader *header;
+
+ IX_NPEDL_TRACE0 (IX_NPEDL_FN_ENTRY_EXIT,
+ "Entering ixNpeDlImageMgrImageLocate\n");
+
+ header = (IxNpeDlImageMgrImageLibraryHeader *) IxNpeMicroCodeImageLibrary;
+
+ if (ixNpeDlImageMgrSignatureCheck (IxNpeMicroCodeImageLibrary))
+ {
+ /* for each image entry in the image library header ... */
+ while (header->entry[imageCount].eohMarker !=
+ IX_NPEDL_IMAGEMGR_END_OF_HEADER)
+ {
+ rawImageId = header->entry[imageCount].image.id;
+ ixNpeDlImageMgrImageIdFormat (rawImageId, &formattedImageId);
+ /* if a match for imageId is found in the image library header... */
+ if (ixNpeDlImageMgrImageIdCompare (imageId, &formattedImageId))
+ {
+ /*
+ * get pointer to the image in the image library using offset from
+ * 1st word in image library
+ */
+ imageOffset = header->entry[imageCount].image.offset;
+ *imagePtr = &IxNpeMicroCodeImageLibrary[imageOffset];
+ /* get the image size */
+ *imageSize = header->entry[imageCount].image.size;
+ status = IX_SUCCESS;
+ break;
+ }
+ imageCount++;
+ }
+ if (status != IX_SUCCESS)
+ {
+ IX_NPEDL_ERROR_REPORT ("ixNpeDlImageMgrImageLocate: "
+ "imageId not found in image library header\n");
+ ixNpeDlImageMgrStats.imageIdNotFound++;
+ }
+ }
+ else
+ {
+ IX_NPEDL_ERROR_REPORT ("ixNpeDlImageMgrImageLocate: "
+ "invalid signature in image library\n");
+ }
+
+ IX_NPEDL_TRACE1 (IX_NPEDL_FN_ENTRY_EXIT,
+ "Exiting ixNpeDlImageMgrImageLocate: status = %d\n", status);
+ return status;
+}
+
+/*
+ * Function definition: ixNpeDlImageMgrLatestImageExtract
+ *
+ * FOR BACKWARD-COMPATIBILITY WITH OLD NPE IMAGE LIBRARY FORMAT
+ * AND/OR LEGACY API FUNCTIONS. TO BE DEPRECATED IN A FUTURE RELEASE
+ */
+IX_STATUS
+ixNpeDlImageMgrLatestImageExtract (IxNpeDlImageId *imageId)
+{
+ UINT32 imageCount = 0;
+ UINT32 rawImageId;
+ IxNpeDlImageId formattedImageId;
+ IX_STATUS status = IX_FAIL;
+ IxNpeDlImageMgrImageLibraryHeader *header;
+
+
+ IX_NPEDL_TRACE0 (IX_NPEDL_FN_ENTRY_EXIT,
+ "Entering ixNpeDlImageMgrLatestImageExtract\n");
+
+ header = (IxNpeDlImageMgrImageLibraryHeader *) IxNpeMicroCodeImageLibrary;
+
+ if (ixNpeDlImageMgrSignatureCheck (IxNpeMicroCodeImageLibrary))
+ {
+ /* for each image entry in the image library header ... */
+ while (header->entry[imageCount].eohMarker !=
+ IX_NPEDL_IMAGEMGR_END_OF_HEADER)
+ {
+ rawImageId = header->entry[imageCount].image.id;
+ ixNpeDlImageMgrImageIdFormat (rawImageId, &formattedImageId);
+ /*
+ * if a match for the npe Id and functionality Id of the imageId is
+ * found in the image library header...
+ */
+ if(ixNpeDlImageMgrNpeFunctionIdCompare(imageId, &formattedImageId))
+ {
+ if(imageId->major <= formattedImageId.major)
+ {
+ if(imageId->minor < formattedImageId.minor)
+ {
+ imageId->minor = formattedImageId.minor;
+ }
+ imageId->major = formattedImageId.major;
+ }
+ status = IX_SUCCESS;
+ }
+ imageCount++;
+ }
+ if (status != IX_SUCCESS)
+ {
+ IX_NPEDL_ERROR_REPORT ("ixNpeDlImageMgrLatestImageExtract: "
+ "imageId not found in image library header\n");
+ ixNpeDlImageMgrStats.imageIdNotFound++;
+ }
+ }
+ else
+ {
+ IX_NPEDL_ERROR_REPORT ("ixNpeDlImageMgrLatestImageGet: "
+ "invalid signature in image library\n");
+ }
+
+ IX_NPEDL_TRACE1 (IX_NPEDL_FN_ENTRY_EXIT,
+ "Exiting ixNpeDlImageMgrLatestImageGet: status = %d\n", status);
+ return status;
+}
+
+/*
+ * Function definition: ixNpeDlImageMgrSignatureCheck
+ *
+ * FOR BACKWARD-COMPATIBILITY WITH OLD NPE IMAGE LIBRARY FORMAT
+ * AND/OR LEGACY API FUNCTIONS. TO BE DEPRECATED IN A FUTURE RELEASE
+ */
+PRIVATE BOOL
+ixNpeDlImageMgrSignatureCheck (UINT32 *microCodeImageLibrary)
+{
+ IxNpeDlImageMgrImageLibraryHeader *header =
+ (IxNpeDlImageMgrImageLibraryHeader *) microCodeImageLibrary;
+ BOOL result = TRUE;
+
+ if (header->signature != IX_NPEDL_IMAGEMGR_SIGNATURE)
+ {
+ result = FALSE;
+ ixNpeDlImageMgrStats.invalidSignature++;
+ }
+
+ return result;
+}
+
+
+/*
+ * Function definition: ixNpeDlImageMgrImageIdFormat
+ *
+ * FOR BACKWARD-COMPATIBILITY WITH OLD NPE IMAGE LIBRARY FORMAT
+ * AND/OR LEGACY API FUNCTIONS. TO BE DEPRECATED IN A FUTURE RELEASE
+ */
+PRIVATE void
+ixNpeDlImageMgrImageIdFormat (
+ UINT32 rawImageId,
+ IxNpeDlImageId *imageId)
+{
+ imageId->npeId = (rawImageId >>
+ IX_NPEDL_IMAGEID_NPEID_OFFSET) &
+ IX_NPEDL_NPEIMAGE_FIELD_MASK;
+ imageId->functionalityId = (rawImageId >>
+ IX_NPEDL_IMAGEID_FUNCTIONID_OFFSET) &
+ IX_NPEDL_NPEIMAGE_FIELD_MASK;
+ imageId->major = (rawImageId >>
+ IX_NPEDL_IMAGEID_MAJOR_OFFSET) &
+ IX_NPEDL_NPEIMAGE_FIELD_MASK;
+ imageId->minor = (rawImageId >>
+ IX_NPEDL_IMAGEID_MINOR_OFFSET) &
+ IX_NPEDL_NPEIMAGE_FIELD_MASK;
+
+}
+
+
+/*
+ * Function definition: ixNpeDlImageMgrImageIdCompare
+ *
+ * FOR BACKWARD-COMPATIBILITY WITH OLD NPE IMAGE LIBRARY FORMAT
+ * AND/OR LEGACY API FUNCTIONS. TO BE DEPRECATED IN A FUTURE RELEASE
+ */
+PRIVATE BOOL
+ixNpeDlImageMgrImageIdCompare (
+ IxNpeDlImageId *imageIdA,
+ IxNpeDlImageId *imageIdB)
+{
+ if ((imageIdA->npeId == imageIdB->npeId) &&
+ (imageIdA->functionalityId == imageIdB->functionalityId) &&
+ (imageIdA->major == imageIdB->major) &&
+ (imageIdA->minor == imageIdB->minor))
+ {
+ return TRUE;
+ }
+ else
+ {
+ return FALSE;
+ }
+}
+
+/*
+ * Function definition: ixNpeDlImageMgrNpeFunctionIdCompare
+ *
+ * FOR BACKWARD-COMPATIBILITY WITH OLD NPE IMAGE LIBRARY FORMAT
+ * AND/OR LEGACY API FUNCTIONS. TO BE DEPRECATED IN A FUTURE RELEASE
+ */
+PRIVATE BOOL
+ixNpeDlImageMgrNpeFunctionIdCompare (
+ IxNpeDlImageId *imageIdA,
+ IxNpeDlImageId *imageIdB)
+{
+ if ((imageIdA->npeId == imageIdB->npeId) &&
+ (imageIdA->functionalityId == imageIdB->functionalityId))
+ {
+ return TRUE;
+ }
+ else
+ {
+ return FALSE;
+ }
+}
+
+
+/*
+ * Function definition: ixNpeDlImageMgrStatsShow
+ */
+void
+ixNpeDlImageMgrStatsShow (void)
+{
+ ixOsalLog (IX_OSAL_LOG_LVL_USER,
+ IX_OSAL_LOG_DEV_STDOUT,
+ "\nixNpeDlImageMgrStatsShow:\n"
+ "\tInvalid Image Signatures: %u\n"
+ "\tImage Id List capacity too small: %u\n"
+ "\tImage Id not found: %u\n\n",
+ ixNpeDlImageMgrStats.invalidSignature,
+ ixNpeDlImageMgrStats.imageIdListOverflow,
+ ixNpeDlImageMgrStats.imageIdNotFound,
+ 0,0,0);
+}
+
+
+/*
+ * Function definition: ixNpeDlImageMgrStatsReset
+ */
+void
+ixNpeDlImageMgrStatsReset (void)
+{
+ ixNpeDlImageMgrStats.invalidSignature = 0;
+ ixNpeDlImageMgrStats.imageIdListOverflow = 0;
+ ixNpeDlImageMgrStats.imageIdNotFound = 0;
+}
+
+
+/*
+ * Function definition: ixNpeDlImageMgrImageFind_legacy
+ *
+ * FOR BACKWARD-COMPATIBILITY WITH OLD NPE IMAGE LIBRARY FORMAT
+ * AND/OR LEGACY API FUNCTIONS. TO BE DEPRECATED IN A FUTURE RELEASE
+ */
+PRIVATE IX_STATUS
+ixNpeDlImageMgrImageFind_legacy (
+ UINT32 *imageLibrary,
+ UINT32 imageId,
+ UINT32 **imagePtr,
+ UINT32 *imageSize)
+{
+ UINT32 imageOffset;
+ /* used to index image entries in image library header */
+ UINT32 imageCount = 0;
+ IX_STATUS status = IX_FAIL;
+ IxNpeDlImageMgrImageLibraryHeader *header;
+ BOOL imageFound = FALSE;
+
+ IX_NPEDL_TRACE0 (IX_NPEDL_FN_ENTRY_EXIT,
+ "Entering ixNpeDlImageMgrImageFind\n");
+
+
+ /* If user didn't specify a library to use, use the default
+ * one from IxNpeMicrocode.h
+ */
+ if (imageLibrary == NULL)
+ {
+ imageLibrary = IxNpeMicroCodeImageLibrary;
+ }
+
+ if (ixNpeDlImageMgrSignatureCheck (imageLibrary))
+ {
+ header = (IxNpeDlImageMgrImageLibraryHeader *) imageLibrary;
+
+ /* for each image entry in the image library header ... */
+ while ((header->entry[imageCount].eohMarker !=
+ IX_NPEDL_IMAGEMGR_END_OF_HEADER) && !(imageFound))
+ {
+ /* if a match for imageId is found in the image library header... */
+ if (imageId == header->entry[imageCount].image.id)
+ {
+ /*
+ * get pointer to the image in the image library using offset from
+ * 1st word in image library
+ */
+ imageOffset = header->entry[imageCount].image.offset;
+ *imagePtr = &imageLibrary[imageOffset];
+ /* get the image size */
+ *imageSize = header->entry[imageCount].image.size;
+ status = IX_SUCCESS;
+ imageFound = TRUE;
+ }
+ imageCount++;
+ }
+ if (status != IX_SUCCESS)
+ {
+ IX_NPEDL_ERROR_REPORT ("ixNpeDlImageMgrImageFind: "
+ "imageId not found in image library header\n");
+ ixNpeDlImageMgrStats.imageIdNotFound++;
+ }
+ }
+ else
+ {
+ IX_NPEDL_ERROR_REPORT ("ixNpeDlImageMgrImageFind: "
+ "invalid signature in image library\n");
+ }
+
+ IX_NPEDL_TRACE1 (IX_NPEDL_FN_ENTRY_EXIT,
+ "Exiting ixNpeDlImageMgrImageFind: status = %d\n", status);
+ return status;
+}
+
+
+/*
+ * Function definition: ixNpeDlImageMgrImageFind
+ */
+IX_STATUS
+ixNpeDlImageMgrImageFind (
+ UINT32 *imageLibrary,
+ UINT32 imageId,
+ UINT32 **imagePtr,
+ UINT32 *imageSize)
+{
+ IxNpeDlImageMgrImageHeader *image;
+ UINT32 offset = 0;
+
+ /* If user didn't specify a library to use, use the default
+ * one from IxNpeMicrocode.h
+ */
+ if (imageLibrary == NULL)
+ {
+#ifdef IX_NPEDL_READ_MICROCODE_FROM_FILE
+ if (ixNpeMicrocode_binaryArray == NULL)
+ {
+ printk (KERN_ERR "ixp400.o: ERROR, no Microcode found in memory\n");
+ return IX_FAIL;
+ }
+ else
+ {
+ imageLibrary = ixNpeMicrocode_binaryArray;
+ }
+#else
+ imageLibrary = IxNpeMicroCodeImageLibrary;
+#endif /* IX_NPEDL_READ_MICROCODE_FROM_FILE */
+ }
+
+ /* For backward's compatibility with previous image format */
+ if (ixNpeDlImageMgrSignatureCheck(imageLibrary))
+ {
+ return ixNpeDlImageMgrImageFind_legacy(imageLibrary,
+ imageId,
+ imagePtr,
+ imageSize);
+ }
+
+ while (*(imageLibrary+offset) == NPE_IMAGE_MARKER)
+ {
+ image = (IxNpeDlImageMgrImageHeader *)(imageLibrary+offset);
+ offset += sizeof(IxNpeDlImageMgrImageHeader)/sizeof(UINT32);
+
+ if (image->id == imageId)
+ {
+ *imagePtr = imageLibrary + offset;
+ *imageSize = image->size;
+ return IX_SUCCESS;
+ }
+ /* 2 consecutive NPE_IMAGE_MARKER's indicates end of library */
+ else if (image->id == NPE_IMAGE_MARKER)
+ {
+ IX_NPEDL_ERROR_REPORT ("ixNpeDlImageMgrImageFind: "
+ "imageId not found in image library header\n");
+ ixNpeDlImageMgrStats.imageIdNotFound++;
+ /* reached end of library, image not found */
+ return IX_FAIL;
+ }
+ offset += image->size;
+ }
+
+ /* If we get here, our image library may be corrupted */
+ IX_NPEDL_ERROR_REPORT ("ixNpeDlImageMgrImageFind: "
+ "image library format may be invalid or corrupted\n");
+ return IX_FAIL;
+}
+
diff --git a/cpu/ixp/npe/IxNpeDlNpeMgr.c b/cpu/ixp/npe/IxNpeDlNpeMgr.c
new file mode 100644
index 0000000000..f5a4c5f508
--- /dev/null
+++ b/cpu/ixp/npe/IxNpeDlNpeMgr.c
@@ -0,0 +1,936 @@
+/**
+ * @file IxNpeDlNpeMgr.c
+ *
+ * @author Intel Corporation
+ * @date 09 January 2002
+ *
+ * @brief This file contains the implementation of the private API for the
+ * IXP425 NPE Downloader NpeMgr module
+ *
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+*/
+
+
+/*
+ * Put the user defined include files required.
+ */
+
+
+/*
+ * Put the user defined include files required.
+ */
+#include "IxOsal.h"
+#include "IxNpeDl.h"
+#include "IxNpeDlNpeMgr_p.h"
+#include "IxNpeDlNpeMgrUtils_p.h"
+#include "IxNpeDlNpeMgrEcRegisters_p.h"
+#include "IxNpeDlMacros_p.h"
+#include "IxFeatureCtrl.h"
+
+/*
+ * #defines and macros used in this file.
+ */
+#define IX_NPEDL_BYTES_PER_WORD 4
+
+/* used to read download map from version in microcode image */
+#define IX_NPEDL_BLOCK_TYPE_INSTRUCTION 0x00000000
+#define IX_NPEDL_BLOCK_TYPE_DATA 0x00000001
+#define IX_NPEDL_BLOCK_TYPE_STATE 0x00000002
+#define IX_NPEDL_END_OF_DOWNLOAD_MAP 0x0000000F
+
+/*
+ * masks used to extract address info from State information context
+ * register addresses as read from microcode image
+ */
+#define IX_NPEDL_MASK_STATE_ADDR_CTXT_REG 0x0000000F
+#define IX_NPEDL_MASK_STATE_ADDR_CTXT_NUM 0x000000F0
+
+/* LSB offset of Context Number field in State-Info Context Address */
+#define IX_NPEDL_OFFSET_STATE_ADDR_CTXT_NUM 4
+
+/* size (in words) of single State Information entry (ctxt reg address|data) */
+#define IX_NPEDL_STATE_INFO_ENTRY_SIZE 2
+
+
+ #define IX_NPEDL_RESET_NPE_PARITY 0x0800
+ #define IX_NPEDL_PARITY_BIT_MASK 0x3F00FFFF
+ #define IX_NPEDL_CONFIG_CTRL_REG_MASK 0x3F3FFFFF
+
+
+/*
+ * Typedefs whose scope is limited to this file.
+ */
+
+typedef struct
+{
+ UINT32 type;
+ UINT32 offset;
+} IxNpeDlNpeMgrDownloadMapBlockEntry;
+
+typedef union
+{
+ IxNpeDlNpeMgrDownloadMapBlockEntry block;
+ UINT32 eodmMarker;
+} IxNpeDlNpeMgrDownloadMapEntry;
+
+typedef struct
+{
+ /* 1st entry in the download map (there may be more than one) */
+ IxNpeDlNpeMgrDownloadMapEntry entry[1];
+} IxNpeDlNpeMgrDownloadMap;
+
+
+/* used to access an instruction or data block in a microcode image */
+typedef struct
+{
+ UINT32 npeMemAddress;
+ UINT32 size;
+ UINT32 data[1];
+} IxNpeDlNpeMgrCodeBlock;
+
+/* used to access each Context Reg entry state-information block */
+typedef struct
+{
+ UINT32 addressInfo;
+ UINT32 value;
+} IxNpeDlNpeMgrStateInfoCtxtRegEntry;
+
+/* used to access a state-information block in a microcode image */
+typedef struct
+{
+ UINT32 size;
+ IxNpeDlNpeMgrStateInfoCtxtRegEntry ctxtRegEntry[1];
+} IxNpeDlNpeMgrStateInfoBlock;
+
+/* used to store some useful NPE information for easy access */
+typedef struct
+{
+ UINT32 baseAddress;
+ UINT32 insMemSize;
+ UINT32 dataMemSize;
+} IxNpeDlNpeInfo;
+
+/* used to distinguish instruction and data memory operations */
+typedef enum
+{
+ IX_NPEDL_MEM_TYPE_INSTRUCTION = 0,
+ IX_NPEDL_MEM_TYPE_DATA
+} IxNpeDlNpeMemType;
+
+/* used to hold a reset value for a particular ECS register */
+typedef struct
+{
+ UINT32 regAddr;
+ UINT32 regResetVal;
+} IxNpeDlEcsRegResetValue;
+
+/* prototype of function to write either Instruction or Data memory */
+typedef IX_STATUS (*IxNpeDlNpeMgrMemWrite) (UINT32 npeBaseAddress,
+ UINT32 npeMemAddress,
+ UINT32 npeMemData,
+ BOOL verify);
+
+/* module statistics counters */
+typedef struct
+{
+ UINT32 instructionBlocksLoaded;
+ UINT32 dataBlocksLoaded;
+ UINT32 stateInfoBlocksLoaded;
+ UINT32 criticalNpeErrors;
+ UINT32 criticalMicrocodeErrors;
+ UINT32 npeStarts;
+ UINT32 npeStops;
+ UINT32 npeResets;
+} IxNpeDlNpeMgrStats;
+
+
+/*
+ * Variable declarations global to this file only. Externs are followed by
+ * static variables.
+ */
+static IxNpeDlNpeInfo ixNpeDlNpeInfo[] =
+{
+ {
+ 0,
+ IX_NPEDL_INS_MEMSIZE_WORDS_NPEA,
+ IX_NPEDL_DATA_MEMSIZE_WORDS_NPEA
+ },
+ {
+ 0,
+ IX_NPEDL_INS_MEMSIZE_WORDS_NPEB,
+ IX_NPEDL_DATA_MEMSIZE_WORDS_NPEB
+ },
+ {
+ 0,
+ IX_NPEDL_INS_MEMSIZE_WORDS_NPEC,
+ IX_NPEDL_DATA_MEMSIZE_WORDS_NPEC
+ }
+};
+
+/* contains Reset values for Context Store Registers */
+static UINT32 ixNpeDlCtxtRegResetValues[] =
+{
+ IX_NPEDL_CTXT_REG_RESET_STEVT,
+ IX_NPEDL_CTXT_REG_RESET_STARTPC,
+ IX_NPEDL_CTXT_REG_RESET_REGMAP,
+ IX_NPEDL_CTXT_REG_RESET_CINDEX,
+};
+
+/* contains Reset values for Context Store Registers */
+static IxNpeDlEcsRegResetValue ixNpeDlEcsRegResetValues[] =
+{
+ {IX_NPEDL_ECS_BG_CTXT_REG_0, IX_NPEDL_ECS_BG_CTXT_REG_0_RESET},
+ {IX_NPEDL_ECS_BG_CTXT_REG_1, IX_NPEDL_ECS_BG_CTXT_REG_1_RESET},
+ {IX_NPEDL_ECS_BG_CTXT_REG_2, IX_NPEDL_ECS_BG_CTXT_REG_2_RESET},
+ {IX_NPEDL_ECS_PRI_1_CTXT_REG_0, IX_NPEDL_ECS_PRI_1_CTXT_REG_0_RESET},
+ {IX_NPEDL_ECS_PRI_1_CTXT_REG_1, IX_NPEDL_ECS_PRI_1_CTXT_REG_1_RESET},
+ {IX_NPEDL_ECS_PRI_1_CTXT_REG_2, IX_NPEDL_ECS_PRI_1_CTXT_REG_2_RESET},
+ {IX_NPEDL_ECS_PRI_2_CTXT_REG_0, IX_NPEDL_ECS_PRI_2_CTXT_REG_0_RESET},
+ {IX_NPEDL_ECS_PRI_2_CTXT_REG_1, IX_NPEDL_ECS_PRI_2_CTXT_REG_1_RESET},
+ {IX_NPEDL_ECS_PRI_2_CTXT_REG_2, IX_NPEDL_ECS_PRI_2_CTXT_REG_2_RESET},
+ {IX_NPEDL_ECS_DBG_CTXT_REG_0, IX_NPEDL_ECS_DBG_CTXT_REG_0_RESET},
+ {IX_NPEDL_ECS_DBG_CTXT_REG_1, IX_NPEDL_ECS_DBG_CTXT_REG_1_RESET},
+ {IX_NPEDL_ECS_DBG_CTXT_REG_2, IX_NPEDL_ECS_DBG_CTXT_REG_2_RESET},
+ {IX_NPEDL_ECS_INSTRUCT_REG, IX_NPEDL_ECS_INSTRUCT_REG_RESET}
+};
+
+static IxNpeDlNpeMgrStats ixNpeDlNpeMgrStats;
+
+/* Set when NPE register memory has been mapped */
+static BOOL ixNpeDlMemInitialised = FALSE;
+
+
+/*
+ * static function prototypes.
+ */
+PRIVATE IX_STATUS
+ixNpeDlNpeMgrMemLoad (IxNpeDlNpeId npeId, UINT32 npeBaseAddress,
+ IxNpeDlNpeMgrCodeBlock *codeBlockPtr,
+ BOOL verify, IxNpeDlNpeMemType npeMemType);
+PRIVATE IX_STATUS
+ixNpeDlNpeMgrStateInfoLoad (UINT32 npeBaseAddress,
+ IxNpeDlNpeMgrStateInfoBlock *codeBlockPtr,
+ BOOL verify);
+PRIVATE BOOL
+ixNpeDlNpeMgrBitsSetCheck (UINT32 npeBaseAddress, UINT32 regOffset,
+ UINT32 expectedBitsSet);
+
+PRIVATE UINT32
+ixNpeDlNpeMgrBaseAddressGet (IxNpeDlNpeId npeId);
+
+/*
+ * Function definition: ixNpeDlNpeMgrBaseAddressGet
+ */
+PRIVATE UINT32
+ixNpeDlNpeMgrBaseAddressGet (IxNpeDlNpeId npeId)
+{
+ IX_OSAL_ASSERT (ixNpeDlMemInitialised);
+ return ixNpeDlNpeInfo[npeId].baseAddress;
+}
+
+
+/*
+ * Function definition: ixNpeDlNpeMgrInit
+ */
+void
+ixNpeDlNpeMgrInit (void)
+{
+ /* Only map the memory once */
+ if (!ixNpeDlMemInitialised)
+ {
+ UINT32 virtAddr;
+
+ /* map the register memory for NPE-A */
+ virtAddr = (UINT32) IX_OSAL_MEM_MAP (IX_NPEDL_NPEBASEADDRESS_NPEA,
+ IX_OSAL_IXP400_NPEA_MAP_SIZE);
+ IX_OSAL_ASSERT(virtAddr);
+ ixNpeDlNpeInfo[IX_NPEDL_NPEID_NPEA].baseAddress = virtAddr;
+
+ /* map the register memory for NPE-B */
+ virtAddr = (UINT32) IX_OSAL_MEM_MAP (IX_NPEDL_NPEBASEADDRESS_NPEB,
+ IX_OSAL_IXP400_NPEB_MAP_SIZE);
+ IX_OSAL_ASSERT(virtAddr);
+ ixNpeDlNpeInfo[IX_NPEDL_NPEID_NPEB].baseAddress = virtAddr;
+
+ /* map the register memory for NPE-C */
+ virtAddr = (UINT32) IX_OSAL_MEM_MAP (IX_NPEDL_NPEBASEADDRESS_NPEC,
+ IX_OSAL_IXP400_NPEC_MAP_SIZE);
+ IX_OSAL_ASSERT(virtAddr);
+ ixNpeDlNpeInfo[IX_NPEDL_NPEID_NPEC].baseAddress = virtAddr;
+
+ ixNpeDlMemInitialised = TRUE;
+ }
+}
+
+
+/*
+ * Function definition: ixNpeDlNpeMgrUninit
+ */
+IX_STATUS
+ixNpeDlNpeMgrUninit (void)
+{
+ if (!ixNpeDlMemInitialised)
+ {
+ return IX_FAIL;
+ }
+
+ IX_OSAL_MEM_UNMAP (ixNpeDlNpeInfo[IX_NPEDL_NPEID_NPEA].baseAddress);
+ IX_OSAL_MEM_UNMAP (ixNpeDlNpeInfo[IX_NPEDL_NPEID_NPEB].baseAddress);
+ IX_OSAL_MEM_UNMAP (ixNpeDlNpeInfo[IX_NPEDL_NPEID_NPEC].baseAddress);
+
+ ixNpeDlNpeInfo[IX_NPEDL_NPEID_NPEA].baseAddress = 0;
+ ixNpeDlNpeInfo[IX_NPEDL_NPEID_NPEB].baseAddress = 0;
+ ixNpeDlNpeInfo[IX_NPEDL_NPEID_NPEC].baseAddress = 0;
+
+ ixNpeDlMemInitialised = FALSE;
+
+ return IX_SUCCESS;
+}
+
+/*
+ * Function definition: ixNpeDlNpeMgrImageLoad
+ */
+IX_STATUS
+ixNpeDlNpeMgrImageLoad (
+ IxNpeDlNpeId npeId,
+ UINT32 *imageCodePtr,
+ BOOL verify)
+{
+ UINT32 npeBaseAddress;
+ IxNpeDlNpeMgrDownloadMap *downloadMap;
+ UINT32 *blockPtr;
+ UINT32 mapIndex = 0;
+ IX_STATUS status = IX_SUCCESS;
+
+ IX_NPEDL_TRACE0 (IX_NPEDL_FN_ENTRY_EXIT,
+ "Entering ixNpeDlNpeMgrImageLoad\n");
+
+ /* get base memory address of NPE from npeId */
+ npeBaseAddress = ixNpeDlNpeMgrBaseAddressGet (npeId);
+
+ /* check execution status of NPE to verify NPE Stop was successful */
+ if (!ixNpeDlNpeMgrBitsSetCheck (npeBaseAddress, IX_NPEDL_REG_OFFSET_EXCTL,
+ IX_NPEDL_EXCTL_STATUS_STOP))
+ {
+ IX_NPEDL_ERROR_REPORT ("ixNpeDlNpeMgrImageDownload - "
+ "NPE was not stopped before download\n");
+ status = IX_FAIL;
+ }
+ else
+ {
+ /*
+ * Read Download Map, checking each block type and calling
+ * appropriate function to perform download
+ */
+ downloadMap = (IxNpeDlNpeMgrDownloadMap *) imageCodePtr;
+ while ((downloadMap->entry[mapIndex].eodmMarker !=
+ IX_NPEDL_END_OF_DOWNLOAD_MAP)
+ && (status == IX_SUCCESS))
+ {
+ /* calculate pointer to block to be downloaded */
+ blockPtr = imageCodePtr +
+ downloadMap->entry[mapIndex].block.offset;
+
+ switch (downloadMap->entry[mapIndex].block.type)
+ {
+ case IX_NPEDL_BLOCK_TYPE_INSTRUCTION:
+ status = ixNpeDlNpeMgrMemLoad (npeId, npeBaseAddress,
+ (IxNpeDlNpeMgrCodeBlock *)blockPtr,
+ verify,
+ IX_NPEDL_MEM_TYPE_INSTRUCTION);
+ break;
+ case IX_NPEDL_BLOCK_TYPE_DATA:
+ status = ixNpeDlNpeMgrMemLoad (npeId, npeBaseAddress,
+ (IxNpeDlNpeMgrCodeBlock *)blockPtr,
+ verify, IX_NPEDL_MEM_TYPE_DATA);
+ break;
+ case IX_NPEDL_BLOCK_TYPE_STATE:
+ status = ixNpeDlNpeMgrStateInfoLoad (npeBaseAddress,
+ (IxNpeDlNpeMgrStateInfoBlock *) blockPtr,
+ verify);
+ break;
+ default:
+ IX_NPEDL_ERROR_REPORT ("ixNpeDlNpeMgrImageLoad: "
+ "unknown block type in download map\n");
+ status = IX_NPEDL_CRITICAL_MICROCODE_ERR;
+ ixNpeDlNpeMgrStats.criticalMicrocodeErrors++;
+ break;
+ }
+ mapIndex++;
+ }/* loop: for each entry in download map, while status == SUCCESS */
+ }/* condition: NPE stopped before attempting download */
+
+ IX_NPEDL_TRACE1 (IX_NPEDL_FN_ENTRY_EXIT,
+ "Exiting ixNpeDlNpeMgrImageLoad : status = %d\n",
+ status);
+ return status;
+}
+
+
+/*
+ * Function definition: ixNpeDlNpeMgrMemLoad
+ */
+PRIVATE IX_STATUS
+ixNpeDlNpeMgrMemLoad (
+ IxNpeDlNpeId npeId,
+ UINT32 npeBaseAddress,
+ IxNpeDlNpeMgrCodeBlock *blockPtr,
+ BOOL verify,
+ IxNpeDlNpeMemType npeMemType)
+{
+ UINT32 npeMemAddress;
+ UINT32 blockSize;
+ UINT32 memSize = 0;
+ IxNpeDlNpeMgrMemWrite memWriteFunc = NULL;
+ UINT32 localIndex = 0;
+ IX_STATUS status = IX_SUCCESS;
+
+ IX_NPEDL_TRACE0 (IX_NPEDL_FN_ENTRY_EXIT,
+ "Entering ixNpeDlNpeMgrMemLoad\n");
+
+ /*
+ * select NPE EXCTL reg read/write commands depending on memory
+ * type (instruction/data) to be accessed
+ */
+ if (npeMemType == IX_NPEDL_MEM_TYPE_INSTRUCTION)
+ {
+ memSize = ixNpeDlNpeInfo[npeId].insMemSize;
+ memWriteFunc = (IxNpeDlNpeMgrMemWrite) ixNpeDlNpeMgrInsMemWrite;
+ }
+ else if (npeMemType == IX_NPEDL_MEM_TYPE_DATA)
+ {
+ memSize = ixNpeDlNpeInfo[npeId].dataMemSize;
+ memWriteFunc = (IxNpeDlNpeMgrMemWrite) ixNpeDlNpeMgrDataMemWrite;
+ }
+
+ /*
+ * NPE memory is loaded contiguously from each block, so only address
+ * of 1st word in block is needed
+ */
+ npeMemAddress = blockPtr->npeMemAddress;
+ /* number of words of instruction/data microcode in block to download */
+ blockSize = blockPtr->size;
+ if ((npeMemAddress + blockSize) > memSize)
+ {
+ IX_NPEDL_ERROR_REPORT ("ixNpeDlNpeMgrMemLoad: "
+ "Block size too big for NPE memory\n");
+ status = IX_NPEDL_CRITICAL_MICROCODE_ERR;
+ ixNpeDlNpeMgrStats.criticalMicrocodeErrors++;
+ }
+ else
+ {
+ for (localIndex = 0; localIndex < blockSize; localIndex++)
+ {
+ status = memWriteFunc (npeBaseAddress, npeMemAddress,
+ blockPtr->data[localIndex], verify);
+
+ if (status != IX_SUCCESS)
+ {
+ IX_NPEDL_ERROR_REPORT ("ixNpeDlNpeMgrMemLoad: "
+ "write to NPE memory failed\n");
+ status = IX_NPEDL_CRITICAL_NPE_ERR;
+ ixNpeDlNpeMgrStats.criticalNpeErrors++;
+ break; /* abort download */
+ }
+ /* increment target (word)address in NPE memory */
+ npeMemAddress++;
+ }
+ }/* condition: block size will fit in NPE memory */
+
+ if (status == IX_SUCCESS)
+ {
+ if (npeMemType == IX_NPEDL_MEM_TYPE_INSTRUCTION)
+ {
+ ixNpeDlNpeMgrStats.instructionBlocksLoaded++;
+ }
+ else if (npeMemType == IX_NPEDL_MEM_TYPE_DATA)
+ {
+ ixNpeDlNpeMgrStats.dataBlocksLoaded++;
+ }
+ }
+
+ IX_NPEDL_TRACE1 (IX_NPEDL_FN_ENTRY_EXIT,
+ "Exiting ixNpeDlNpeMgrMemLoad : status = %d\n", status);
+ return status;
+}
+
+
+/*
+ * Function definition: ixNpeDlNpeMgrStateInfoLoad
+ */
+PRIVATE IX_STATUS
+ixNpeDlNpeMgrStateInfoLoad (
+ UINT32 npeBaseAddress,
+ IxNpeDlNpeMgrStateInfoBlock *blockPtr,
+ BOOL verify)
+{
+ UINT32 blockSize;
+ UINT32 ctxtRegAddrInfo;
+ UINT32 ctxtRegVal;
+ IxNpeDlCtxtRegNum ctxtReg; /* identifies Context Store reg (0-3) */
+ UINT32 ctxtNum; /* identifies Context number (0-16) */
+ UINT32 i;
+ IX_STATUS status = IX_SUCCESS;
+
+ IX_NPEDL_TRACE0 (IX_NPEDL_FN_ENTRY_EXIT,
+ "Entering ixNpeDlNpeMgrStateInfoLoad\n");
+
+ /* block size contains number of words of state-info in block */
+ blockSize = blockPtr->size;
+
+ ixNpeDlNpeMgrDebugInstructionPreExec (npeBaseAddress);
+
+ /* for each state-info context register entry in block */
+ for (i = 0; i < (blockSize/IX_NPEDL_STATE_INFO_ENTRY_SIZE); i++)
+ {
+ /* each state-info entry is 2 words (address, value) in length */
+ ctxtRegAddrInfo = (blockPtr->ctxtRegEntry[i]).addressInfo;
+ ctxtRegVal = (blockPtr->ctxtRegEntry[i]).value;
+
+ ctxtReg = (ctxtRegAddrInfo & IX_NPEDL_MASK_STATE_ADDR_CTXT_REG);
+ ctxtNum = (ctxtRegAddrInfo & IX_NPEDL_MASK_STATE_ADDR_CTXT_NUM) >>
+ IX_NPEDL_OFFSET_STATE_ADDR_CTXT_NUM;
+
+ /* error-check Context Register No. and Context Number values */
+ /* NOTE that there is no STEVT register for Context 0 */
+ if ((ctxtReg < 0) ||
+ (ctxtReg >= IX_NPEDL_CTXT_REG_MAX) ||
+ (ctxtNum > IX_NPEDL_CTXT_NUM_MAX) ||
+ ((ctxtNum == 0) && (ctxtReg == IX_NPEDL_CTXT_REG_STEVT)))
+ {
+ IX_NPEDL_ERROR_REPORT ("ixNpeDlNpeMgrStateInfoLoad: "
+ "invalid Context Register Address\n");
+ status = IX_NPEDL_CRITICAL_MICROCODE_ERR;
+ ixNpeDlNpeMgrStats.criticalMicrocodeErrors++;
+ break; /* abort download */
+ }
+
+ status = ixNpeDlNpeMgrCtxtRegWrite (npeBaseAddress, ctxtNum, ctxtReg,
+ ctxtRegVal, verify);
+ if (status != IX_SUCCESS)
+ {
+ IX_NPEDL_ERROR_REPORT ("ixNpeDlNpeMgrStateInfoLoad: "
+ "write of state-info to NPE failed\n");
+ status = IX_NPEDL_CRITICAL_NPE_ERR;
+ ixNpeDlNpeMgrStats.criticalNpeErrors++;
+ break; /* abort download */
+ }
+ }/* loop: for each context reg entry in State Info block */
+
+ ixNpeDlNpeMgrDebugInstructionPostExec (npeBaseAddress);
+
+ if (status == IX_SUCCESS)
+ {
+ ixNpeDlNpeMgrStats.stateInfoBlocksLoaded++;
+ }
+
+ IX_NPEDL_TRACE1 (IX_NPEDL_FN_ENTRY_EXIT,
+ "Exiting ixNpeDlNpeMgrStateInfoLoad : status = %d\n",
+ status);
+ return status;
+}
+
+
+/*
+ * Function definition: ixNpeDlNpeMgrNpeReset
+ */
+IX_STATUS
+ixNpeDlNpeMgrNpeReset (
+ IxNpeDlNpeId npeId)
+{
+ UINT32 npeBaseAddress;
+ IxNpeDlCtxtRegNum ctxtReg; /* identifies Context Store reg (0-3) */
+ UINT32 ctxtNum; /* identifies Context number (0-16) */
+ UINT32 regAddr;
+ UINT32 regVal;
+ UINT32 localIndex;
+ UINT32 indexMax;
+ IX_STATUS status = IX_SUCCESS;
+ IxFeatureCtrlReg unitFuseReg;
+ UINT32 ixNpeConfigCtrlRegVal;
+
+ IX_NPEDL_TRACE0 (IX_NPEDL_FN_ENTRY_EXIT,
+ "Entering ixNpeDlNpeMgrNpeReset\n");
+
+ /* get base memory address of NPE from npeId */
+ npeBaseAddress = ixNpeDlNpeMgrBaseAddressGet (npeId);
+
+ /* pre-store the NPE Config Control Register Value */
+ IX_NPEDL_REG_READ (npeBaseAddress, IX_NPEDL_REG_OFFSET_CTL, &ixNpeConfigCtrlRegVal);
+
+ ixNpeConfigCtrlRegVal |= 0x3F000000;
+
+ /* disable the parity interrupt */
+ IX_NPEDL_REG_WRITE (npeBaseAddress, IX_NPEDL_REG_OFFSET_CTL, (ixNpeConfigCtrlRegVal & IX_NPEDL_PARITY_BIT_MASK));
+
+ ixNpeDlNpeMgrDebugInstructionPreExec (npeBaseAddress);
+
+ /*
+ * clear the FIFOs
+ */
+ while (ixNpeDlNpeMgrBitsSetCheck (npeBaseAddress,
+ IX_NPEDL_REG_OFFSET_WFIFO,
+ IX_NPEDL_MASK_WFIFO_VALID))
+ {
+ /* read from the Watch-point FIFO until empty */
+ IX_NPEDL_REG_READ (npeBaseAddress, IX_NPEDL_REG_OFFSET_WFIFO,
+ &regVal);
+ }
+
+ while (ixNpeDlNpeMgrBitsSetCheck (npeBaseAddress,
+ IX_NPEDL_REG_OFFSET_STAT,
+ IX_NPEDL_MASK_STAT_OFNE))
+ {
+ /* read from the outFIFO until empty */
+ IX_NPEDL_REG_READ (npeBaseAddress, IX_NPEDL_REG_OFFSET_FIFO,
+ &regVal);
+ }
+
+ while (ixNpeDlNpeMgrBitsSetCheck (npeBaseAddress,
+ IX_NPEDL_REG_OFFSET_STAT,
+ IX_NPEDL_MASK_STAT_IFNE))
+ {
+ /*
+ * step execution of the NPE intruction to read inFIFO using
+ * the Debug Executing Context stack
+ */
+ status = ixNpeDlNpeMgrDebugInstructionExec (npeBaseAddress,
+ IX_NPEDL_INSTR_RD_FIFO, 0, 0);
+
+ if (IX_SUCCESS != status)
+ {
+ return status;
+ }
+
+ }
+
+ /*
+ * Reset the mailbox reg
+ */
+ /* ...from XScale side */
+ IX_NPEDL_REG_WRITE (npeBaseAddress, IX_NPEDL_REG_OFFSET_MBST,
+ IX_NPEDL_REG_RESET_MBST);
+ /* ...from NPE side */
+ status = ixNpeDlNpeMgrDebugInstructionExec (npeBaseAddress,
+ IX_NPEDL_INSTR_RESET_MBOX, 0, 0);
+
+ if (IX_SUCCESS != status)
+ {
+ return status;
+ }
+
+ /*
+ * Reset the physical registers in the NPE register file:
+ * Note: no need to save/restore REGMAP for Context 0 here
+ * since all Context Store regs are reset in subsequent code
+ */
+ for (regAddr = 0;
+ (regAddr < IX_NPEDL_TOTAL_NUM_PHYS_REG) && (status != IX_FAIL);
+ regAddr++)
+ {
+ /* for each physical register in the NPE reg file, write 0 : */
+ status = ixNpeDlNpeMgrPhysicalRegWrite (npeBaseAddress, regAddr,
+ 0, TRUE);
+ if (status != IX_SUCCESS)
+ {
+ return status; /* abort reset */
+ }
+ }
+
+
+ /*
+ * Reset the context store:
+ */
+ for (ctxtNum = IX_NPEDL_CTXT_NUM_MIN;
+ ctxtNum <= IX_NPEDL_CTXT_NUM_MAX; ctxtNum++)
+ {
+ /* set each context's Context Store registers to reset values: */
+ for (ctxtReg = 0; ctxtReg < IX_NPEDL_CTXT_REG_MAX; ctxtReg++)
+ {
+ /* NOTE that there is no STEVT register for Context 0 */
+ if (!((ctxtNum == 0) && (ctxtReg == IX_NPEDL_CTXT_REG_STEVT)))
+ {
+ regVal = ixNpeDlCtxtRegResetValues[ctxtReg];
+ status = ixNpeDlNpeMgrCtxtRegWrite (npeBaseAddress, ctxtNum,
+ ctxtReg, regVal, TRUE);
+ if (status != IX_SUCCESS)
+ {
+ return status; /* abort reset */
+ }
+ }
+ }
+ }
+
+ ixNpeDlNpeMgrDebugInstructionPostExec (npeBaseAddress);
+
+ /* write Reset values to Execution Context Stack registers */
+ indexMax = sizeof (ixNpeDlEcsRegResetValues) /
+ sizeof (IxNpeDlEcsRegResetValue);
+ for (localIndex = 0; localIndex < indexMax; localIndex++)
+ {
+ regAddr = ixNpeDlEcsRegResetValues[localIndex].regAddr;
+ regVal = ixNpeDlEcsRegResetValues[localIndex].regResetVal;
+ ixNpeDlNpeMgrExecAccRegWrite (npeBaseAddress, regAddr, regVal);
+ }
+
+ /* clear the profile counter */
+ ixNpeDlNpeMgrCommandIssue (npeBaseAddress,
+ IX_NPEDL_EXCTL_CMD_CLR_PROFILE_CNT);
+
+ /* clear registers EXCT, AP0, AP1, AP2 and AP3 */
+ for (regAddr = IX_NPEDL_REG_OFFSET_EXCT;
+ regAddr <= IX_NPEDL_REG_OFFSET_AP3;
+ regAddr += IX_NPEDL_BYTES_PER_WORD)
+ {
+ IX_NPEDL_REG_WRITE (npeBaseAddress, regAddr, 0);
+ }
+
+ /* Reset the Watch-count register */
+ IX_NPEDL_REG_WRITE (npeBaseAddress, IX_NPEDL_REG_OFFSET_WC, 0);
+
+ /*
+ * WR IXA00055043 - Remove IMEM Parity Introduced by NPE Reset Operation
+ */
+
+ /*
+ * Call the feature control API to fused out and reset the NPE and its
+ * coprocessor - to reset internal states and remove parity error
+ */
+ unitFuseReg = ixFeatureCtrlRead ();
+ unitFuseReg |= (IX_NPEDL_RESET_NPE_PARITY << npeId);
+ ixFeatureCtrlWrite (unitFuseReg);
+
+ /* call the feature control API to un-fused and un-reset the NPE & COP */
+ unitFuseReg &= (~(IX_NPEDL_RESET_NPE_PARITY << npeId));
+ ixFeatureCtrlWrite (unitFuseReg);
+
+ /*
+ * Call NpeMgr function to stop the NPE again after the Feature Control
+ * has unfused and Un-Reset the NPE and its associated Coprocessors
+ */
+ status = ixNpeDlNpeMgrNpeStop (npeId);
+
+ /* restore NPE configuration bus Control Register - Parity Settings */
+ IX_NPEDL_REG_WRITE (npeBaseAddress, IX_NPEDL_REG_OFFSET_CTL,
+ (ixNpeConfigCtrlRegVal & IX_NPEDL_CONFIG_CTRL_REG_MASK));
+
+ ixNpeDlNpeMgrStats.npeResets++;
+
+ IX_NPEDL_TRACE1 (IX_NPEDL_FN_ENTRY_EXIT,
+ "Exiting ixNpeDlNpeMgrNpeReset : status = %d\n", status);
+ return status;
+}
+
+
+/*
+ * Function definition: ixNpeDlNpeMgrNpeStart
+ */
+IX_STATUS
+ixNpeDlNpeMgrNpeStart (
+ IxNpeDlNpeId npeId)
+{
+ UINT32 npeBaseAddress;
+ UINT32 ecsRegVal;
+ BOOL npeRunning;
+ IX_STATUS status = IX_SUCCESS;
+
+ IX_NPEDL_TRACE0 (IX_NPEDL_FN_ENTRY_EXIT,
+ "Entering ixNpeDlNpeMgrNpeStart\n");
+
+ /* get base memory address of NPE from npeId */
+ npeBaseAddress = ixNpeDlNpeMgrBaseAddressGet (npeId);
+
+ /*
+ * ensure only Background Context Stack Level is Active by turning off
+ * the Active bit in each of the other Executing Context Stack levels
+ */
+ ecsRegVal = ixNpeDlNpeMgrExecAccRegRead (npeBaseAddress,
+ IX_NPEDL_ECS_PRI_1_CTXT_REG_0);
+ ecsRegVal &= ~IX_NPEDL_MASK_ECS_REG_0_ACTIVE;
+ ixNpeDlNpeMgrExecAccRegWrite (npeBaseAddress, IX_NPEDL_ECS_PRI_1_CTXT_REG_0,
+ ecsRegVal);
+
+ ecsRegVal = ixNpeDlNpeMgrExecAccRegRead (npeBaseAddress,
+ IX_NPEDL_ECS_PRI_2_CTXT_REG_0);
+ ecsRegVal &= ~IX_NPEDL_MASK_ECS_REG_0_ACTIVE;
+ ixNpeDlNpeMgrExecAccRegWrite (npeBaseAddress, IX_NPEDL_ECS_PRI_2_CTXT_REG_0,
+ ecsRegVal);
+
+ ecsRegVal = ixNpeDlNpeMgrExecAccRegRead (npeBaseAddress,
+ IX_NPEDL_ECS_DBG_CTXT_REG_0);
+ ecsRegVal &= ~IX_NPEDL_MASK_ECS_REG_0_ACTIVE;
+ ixNpeDlNpeMgrExecAccRegWrite (npeBaseAddress, IX_NPEDL_ECS_DBG_CTXT_REG_0,
+ ecsRegVal);
+
+ /* clear the pipeline */
+ ixNpeDlNpeMgrCommandIssue (npeBaseAddress, IX_NPEDL_EXCTL_CMD_NPE_CLR_PIPE);
+
+ /* start NPE execution by issuing command through EXCTL register on NPE */
+ ixNpeDlNpeMgrCommandIssue (npeBaseAddress, IX_NPEDL_EXCTL_CMD_NPE_START);
+
+ /*
+ * check execution status of NPE to verify NPE Start operation was
+ * successful
+ */
+ npeRunning = ixNpeDlNpeMgrBitsSetCheck (npeBaseAddress,
+ IX_NPEDL_REG_OFFSET_EXCTL,
+ IX_NPEDL_EXCTL_STATUS_RUN);
+ if (npeRunning)
+ {
+ ixNpeDlNpeMgrStats.npeStarts++;
+ }
+ else
+ {
+ IX_NPEDL_ERROR_REPORT ("ixNpeDlNpeMgrNpeStart: "
+ "failed to start NPE execution\n");
+ status = IX_FAIL;
+ }
+
+
+ IX_NPEDL_TRACE1 (IX_NPEDL_FN_ENTRY_EXIT,
+ "Exiting ixNpeDlNpeMgrNpeStart : status = %d\n", status);
+ return status;
+}
+
+
+/*
+ * Function definition: ixNpeDlNpeMgrNpeStop
+ */
+IX_STATUS
+ixNpeDlNpeMgrNpeStop (
+ IxNpeDlNpeId npeId)
+{
+ UINT32 npeBaseAddress;
+ IX_STATUS status = IX_SUCCESS;
+
+ IX_NPEDL_TRACE0 (IX_NPEDL_FN_ENTRY_EXIT,
+ "Entering ixNpeDlNpeMgrNpeStop\n");
+
+ /* get base memory address of NPE from npeId */
+ npeBaseAddress = ixNpeDlNpeMgrBaseAddressGet (npeId);
+
+ /* stop NPE execution by issuing command through EXCTL register on NPE */
+ ixNpeDlNpeMgrCommandIssue (npeBaseAddress, IX_NPEDL_EXCTL_CMD_NPE_STOP);
+
+ /* verify that NPE Stop was successful */
+ if (! ixNpeDlNpeMgrBitsSetCheck (npeBaseAddress, IX_NPEDL_REG_OFFSET_EXCTL,
+ IX_NPEDL_EXCTL_STATUS_STOP))
+ {
+ IX_NPEDL_ERROR_REPORT ("ixNpeDlNpeMgrNpeStop: "
+ "failed to stop NPE execution\n");
+ status = IX_FAIL;
+ }
+
+ ixNpeDlNpeMgrStats.npeStops++;
+
+ IX_NPEDL_TRACE1 (IX_NPEDL_FN_ENTRY_EXIT,
+ "Exiting ixNpeDlNpeMgrNpeStop : status = %d\n", status);
+ return status;
+}
+
+
+/*
+ * Function definition: ixNpeDlNpeMgrBitsSetCheck
+ */
+PRIVATE BOOL
+ixNpeDlNpeMgrBitsSetCheck (
+ UINT32 npeBaseAddress,
+ UINT32 regOffset,
+ UINT32 expectedBitsSet)
+{
+ UINT32 regVal;
+ IX_NPEDL_REG_READ (npeBaseAddress, regOffset, &regVal);
+
+ return expectedBitsSet == (expectedBitsSet & regVal);
+}
+
+
+/*
+ * Function definition: ixNpeDlNpeMgrStatsShow
+ */
+void
+ixNpeDlNpeMgrStatsShow (void)
+{
+ ixOsalLog (IX_OSAL_LOG_LVL_USER,
+ IX_OSAL_LOG_DEV_STDOUT,
+ "\nixNpeDlNpeMgrStatsShow:\n"
+ "\tInstruction Blocks loaded: %u\n"
+ "\tData Blocks loaded: %u\n"
+ "\tState Information Blocks loaded: %u\n"
+ "\tCritical NPE errors: %u\n"
+ "\tCritical Microcode errors: %u\n",
+ ixNpeDlNpeMgrStats.instructionBlocksLoaded,
+ ixNpeDlNpeMgrStats.dataBlocksLoaded,
+ ixNpeDlNpeMgrStats.stateInfoBlocksLoaded,
+ ixNpeDlNpeMgrStats.criticalNpeErrors,
+ ixNpeDlNpeMgrStats.criticalMicrocodeErrors,
+ 0);
+
+ ixOsalLog (IX_OSAL_LOG_LVL_USER,
+ IX_OSAL_LOG_DEV_STDOUT,
+ "\tSuccessful NPE Starts: %u\n"
+ "\tSuccessful NPE Stops: %u\n"
+ "\tSuccessful NPE Resets: %u\n\n",
+ ixNpeDlNpeMgrStats.npeStarts,
+ ixNpeDlNpeMgrStats.npeStops,
+ ixNpeDlNpeMgrStats.npeResets,
+ 0,0,0);
+
+ ixNpeDlNpeMgrUtilsStatsShow ();
+}
+
+
+/*
+ * Function definition: ixNpeDlNpeMgrStatsReset
+ */
+void
+ixNpeDlNpeMgrStatsReset (void)
+{
+ ixNpeDlNpeMgrStats.instructionBlocksLoaded = 0;
+ ixNpeDlNpeMgrStats.dataBlocksLoaded = 0;
+ ixNpeDlNpeMgrStats.stateInfoBlocksLoaded = 0;
+ ixNpeDlNpeMgrStats.criticalNpeErrors = 0;
+ ixNpeDlNpeMgrStats.criticalMicrocodeErrors = 0;
+ ixNpeDlNpeMgrStats.npeStarts = 0;
+ ixNpeDlNpeMgrStats.npeStops = 0;
+ ixNpeDlNpeMgrStats.npeResets = 0;
+
+ ixNpeDlNpeMgrUtilsStatsReset ();
+}
diff --git a/cpu/ixp/npe/IxNpeDlNpeMgrUtils.c b/cpu/ixp/npe/IxNpeDlNpeMgrUtils.c
new file mode 100644
index 0000000000..9dcf3c1e4d
--- /dev/null
+++ b/cpu/ixp/npe/IxNpeDlNpeMgrUtils.c
@@ -0,0 +1,806 @@
+/**
+ * @file IxNpeDlNpeMgrUtils.c
+ *
+ * @author Intel Corporation
+ * @date 18 February 2002
+ *
+ * @brief This file contains the implementation of the private API for the
+ * IXP425 NPE Downloader NpeMgr Utils module
+ *
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+*/
+
+
+/*
+ * Put the system defined include files required.
+ */
+#define IX_NPE_DL_MAX_NUM_OF_RETRIES 1000000 /**< Maximum number of
+ * retries before
+ * timeout
+ */
+
+/*
+ * Put the user defined include files required.
+ */
+#include "IxOsal.h"
+#include "IxNpeDl.h"
+#include "IxNpeDlNpeMgrUtils_p.h"
+#include "IxNpeDlNpeMgrEcRegisters_p.h"
+#include "IxNpeDlMacros_p.h"
+
+/*
+ * #defines and macros used in this file.
+ */
+
+/* used to bit-mask a number of bytes */
+#define IX_NPEDL_MASK_LOWER_BYTE_OF_WORD 0x000000FF
+#define IX_NPEDL_MASK_LOWER_SHORT_OF_WORD 0x0000FFFF
+#define IX_NPEDL_MASK_FULL_WORD 0xFFFFFFFF
+
+#define IX_NPEDL_BYTES_PER_WORD 4
+#define IX_NPEDL_BYTES_PER_SHORT 2
+
+#define IX_NPEDL_REG_SIZE_BYTE 8
+#define IX_NPEDL_REG_SIZE_SHORT 16
+#define IX_NPEDL_REG_SIZE_WORD 32
+
+/*
+ * Introduce extra read cycles after issuing read command to NPE
+ * so that we read the register after the NPE has updated it
+ * This is to overcome race condition between XScale and NPE
+ */
+#define IX_NPEDL_DELAY_READ_CYCLES 2
+/*
+ * To mask top three MSBs of 32bit word to download into NPE IMEM
+ */
+#define IX_NPEDL_MASK_UNUSED_IMEM_BITS 0x1FFFFFFF;
+
+
+/*
+ * typedefs
+ */
+typedef struct
+{
+ UINT32 regAddress;
+ UINT32 regSize;
+} IxNpeDlCtxtRegAccessInfo;
+
+/* module statistics counters */
+typedef struct
+{
+ UINT32 insMemWrites;
+ UINT32 insMemWriteFails;
+ UINT32 dataMemWrites;
+ UINT32 dataMemWriteFails;
+ UINT32 ecsRegWrites;
+ UINT32 ecsRegReads;
+ UINT32 dbgInstructionExecs;
+ UINT32 contextRegWrites;
+ UINT32 physicalRegWrites;
+ UINT32 nextPcWrites;
+} IxNpeDlNpeMgrUtilsStats;
+
+
+/*
+ * Variable declarations global to this file only. Externs are followed by
+ * static variables.
+ */
+
+/*
+ * contains useful address and function pointers to read/write Context Regs,
+ * eliminating some switch or if-else statements in places
+ */
+static IxNpeDlCtxtRegAccessInfo ixNpeDlCtxtRegAccInfo[IX_NPEDL_CTXT_REG_MAX] =
+{
+ {
+ IX_NPEDL_CTXT_REG_ADDR_STEVT,
+ IX_NPEDL_REG_SIZE_BYTE
+ },
+ {
+ IX_NPEDL_CTXT_REG_ADDR_STARTPC,
+ IX_NPEDL_REG_SIZE_SHORT
+ },
+ {
+ IX_NPEDL_CTXT_REG_ADDR_REGMAP,
+ IX_NPEDL_REG_SIZE_SHORT
+ },
+ {
+ IX_NPEDL_CTXT_REG_ADDR_CINDEX,
+ IX_NPEDL_REG_SIZE_BYTE
+ }
+};
+
+static UINT32 ixNpeDlSavedExecCount = 0;
+static UINT32 ixNpeDlSavedEcsDbgCtxtReg2 = 0;
+
+static IxNpeDlNpeMgrUtilsStats ixNpeDlNpeMgrUtilsStats;
+
+
+/*
+ * static function prototypes.
+ */
+PRIVATE __inline__ void
+ixNpeDlNpeMgrWriteCommandIssue (UINT32 npeBaseAddress, UINT32 cmd,
+ UINT32 addr, UINT32 data);
+
+PRIVATE __inline__ UINT32
+ixNpeDlNpeMgrReadCommandIssue (UINT32 npeBaseAddress, UINT32 cmd, UINT32 addr);
+
+PRIVATE IX_STATUS
+ixNpeDlNpeMgrLogicalRegRead (UINT32 npeBaseAddress, UINT32 regAddr,
+ UINT32 regSize, UINT32 ctxtNum, UINT32 *regVal);
+
+PRIVATE IX_STATUS
+ixNpeDlNpeMgrLogicalRegWrite (UINT32 npeBaseAddress, UINT32 regAddr,
+ UINT32 regVal, UINT32 regSize,
+ UINT32 ctxtNum, BOOL verify);
+
+/*
+ * Function definition: ixNpeDlNpeMgrWriteCommandIssue
+ */
+PRIVATE __inline__ void
+ixNpeDlNpeMgrWriteCommandIssue (
+ UINT32 npeBaseAddress,
+ UINT32 cmd,
+ UINT32 addr,
+ UINT32 data)
+{
+ IX_NPEDL_REG_WRITE (npeBaseAddress, IX_NPEDL_REG_OFFSET_EXDATA, data);
+ IX_NPEDL_REG_WRITE (npeBaseAddress, IX_NPEDL_REG_OFFSET_EXAD, addr);
+ IX_NPEDL_REG_WRITE (npeBaseAddress, IX_NPEDL_REG_OFFSET_EXCTL, cmd);
+}
+
+
+/*
+ * Function definition: ixNpeDlNpeMgrReadCommandIssue
+ */
+PRIVATE __inline__ UINT32
+ixNpeDlNpeMgrReadCommandIssue (
+ UINT32 npeBaseAddress,
+ UINT32 cmd,
+ UINT32 addr)
+{
+ UINT32 data = 0;
+ int i;
+
+ IX_NPEDL_REG_WRITE (npeBaseAddress, IX_NPEDL_REG_OFFSET_EXAD, addr);
+ IX_NPEDL_REG_WRITE (npeBaseAddress, IX_NPEDL_REG_OFFSET_EXCTL, cmd);
+ for (i = 0; i <= IX_NPEDL_DELAY_READ_CYCLES; i++)
+ {
+ IX_NPEDL_REG_READ (npeBaseAddress, IX_NPEDL_REG_OFFSET_EXDATA, &data);
+ }
+
+ return data;
+}
+
+/*
+ * Function definition: ixNpeDlNpeMgrInsMemWrite
+ */
+IX_STATUS
+ixNpeDlNpeMgrInsMemWrite (
+ UINT32 npeBaseAddress,
+ UINT32 insMemAddress,
+ UINT32 insMemData,
+ BOOL verify)
+{
+ UINT32 insMemDataRtn;
+
+ ixNpeDlNpeMgrWriteCommandIssue (npeBaseAddress,
+ IX_NPEDL_EXCTL_CMD_WR_INS_MEM,
+ insMemAddress, insMemData);
+ if (verify)
+ {
+ /* write invalid data to this reg, so we can see if we're reading
+ the EXDATA register too early */
+ IX_NPEDL_REG_WRITE (npeBaseAddress, IX_NPEDL_REG_OFFSET_EXDATA,
+ ~insMemData);
+
+ /*Disabled since top 3 MSB are not used for Azusa hardware Refer WR:IXA00053900*/
+ insMemData&=IX_NPEDL_MASK_UNUSED_IMEM_BITS;
+
+ insMemDataRtn=ixNpeDlNpeMgrReadCommandIssue (npeBaseAddress,
+ IX_NPEDL_EXCTL_CMD_RD_INS_MEM,
+ insMemAddress);
+
+ insMemDataRtn&=IX_NPEDL_MASK_UNUSED_IMEM_BITS;
+
+ if (insMemData != insMemDataRtn)
+ {
+ ixNpeDlNpeMgrUtilsStats.insMemWriteFails++;
+ return IX_FAIL;
+ }
+ }
+
+ ixNpeDlNpeMgrUtilsStats.insMemWrites++;
+ return IX_SUCCESS;
+}
+
+
+/*
+ * Function definition: ixNpeDlNpeMgrDataMemWrite
+ */
+IX_STATUS
+ixNpeDlNpeMgrDataMemWrite (
+ UINT32 npeBaseAddress,
+ UINT32 dataMemAddress,
+ UINT32 dataMemData,
+ BOOL verify)
+{
+ ixNpeDlNpeMgrWriteCommandIssue (npeBaseAddress,
+ IX_NPEDL_EXCTL_CMD_WR_DATA_MEM,
+ dataMemAddress, dataMemData);
+ if (verify)
+ {
+ /* write invalid data to this reg, so we can see if we're reading
+ the EXDATA register too early */
+ IX_NPEDL_REG_WRITE (npeBaseAddress, IX_NPEDL_REG_OFFSET_EXDATA, ~dataMemData);
+
+ if (dataMemData !=
+ ixNpeDlNpeMgrReadCommandIssue (npeBaseAddress,
+ IX_NPEDL_EXCTL_CMD_RD_DATA_MEM,
+ dataMemAddress))
+ {
+ ixNpeDlNpeMgrUtilsStats.dataMemWriteFails++;
+ return IX_FAIL;
+ }
+ }
+
+ ixNpeDlNpeMgrUtilsStats.dataMemWrites++;
+ return IX_SUCCESS;
+}
+
+
+/*
+ * Function definition: ixNpeDlNpeMgrExecAccRegWrite
+ */
+void
+ixNpeDlNpeMgrExecAccRegWrite (
+ UINT32 npeBaseAddress,
+ UINT32 regAddress,
+ UINT32 regData)
+{
+ ixNpeDlNpeMgrWriteCommandIssue (npeBaseAddress,
+ IX_NPEDL_EXCTL_CMD_WR_ECS_REG,
+ regAddress, regData);
+ ixNpeDlNpeMgrUtilsStats.ecsRegWrites++;
+}
+
+
+/*
+ * Function definition: ixNpeDlNpeMgrExecAccRegRead
+ */
+UINT32
+ixNpeDlNpeMgrExecAccRegRead (
+ UINT32 npeBaseAddress,
+ UINT32 regAddress)
+{
+ ixNpeDlNpeMgrUtilsStats.ecsRegReads++;
+ return ixNpeDlNpeMgrReadCommandIssue (npeBaseAddress,
+ IX_NPEDL_EXCTL_CMD_RD_ECS_REG,
+ regAddress);
+}
+
+
+/*
+ * Function definition: ixNpeDlNpeMgrCommandIssue
+ */
+void
+ixNpeDlNpeMgrCommandIssue (
+ UINT32 npeBaseAddress,
+ UINT32 command)
+{
+ IX_NPEDL_TRACE0 (IX_NPEDL_FN_ENTRY_EXIT,
+ "Entering ixNpeDlNpeMgrCommandIssue\n");
+
+ IX_NPEDL_REG_WRITE (npeBaseAddress, IX_NPEDL_REG_OFFSET_EXCTL, command);
+
+ IX_NPEDL_TRACE0 (IX_NPEDL_FN_ENTRY_EXIT,
+ "Exiting ixNpeDlNpeMgrCommandIssue\n");
+}
+
+
+/*
+ * Function definition: ixNpeDlNpeMgrDebugInstructionPreExec
+ */
+void
+ixNpeDlNpeMgrDebugInstructionPreExec(
+ UINT32 npeBaseAddress)
+{
+ /* turn off the halt bit by clearing Execution Count register. */
+ /* save reg contents 1st and restore later */
+ IX_NPEDL_REG_READ (npeBaseAddress, IX_NPEDL_REG_OFFSET_EXCT,
+ &ixNpeDlSavedExecCount);
+ IX_NPEDL_REG_WRITE (npeBaseAddress, IX_NPEDL_REG_OFFSET_EXCT, 0);
+
+ /* ensure that IF and IE are on (temporarily), so that we don't end up
+ * stepping forever */
+ ixNpeDlSavedEcsDbgCtxtReg2 = ixNpeDlNpeMgrExecAccRegRead (npeBaseAddress,
+ IX_NPEDL_ECS_DBG_CTXT_REG_2);
+
+ ixNpeDlNpeMgrExecAccRegWrite (npeBaseAddress, IX_NPEDL_ECS_DBG_CTXT_REG_2,
+ (ixNpeDlSavedEcsDbgCtxtReg2 |
+ IX_NPEDL_MASK_ECS_DBG_REG_2_IF |
+ IX_NPEDL_MASK_ECS_DBG_REG_2_IE));
+}
+
+
+/*
+ * Function definition: ixNpeDlNpeMgrDebugInstructionExec
+ */
+IX_STATUS
+ixNpeDlNpeMgrDebugInstructionExec(
+ UINT32 npeBaseAddress,
+ UINT32 npeInstruction,
+ UINT32 ctxtNum,
+ UINT32 ldur)
+{
+ UINT32 ecsDbgRegVal;
+ UINT32 oldWatchcount, newWatchcount;
+ UINT32 retriesCount = 0;
+ IX_STATUS status = IX_SUCCESS;
+
+ IX_NPEDL_TRACE0 (IX_NPEDL_FN_ENTRY_EXIT,
+ "Entering ixNpeDlNpeMgrDebugInstructionExec\n");
+
+ /* set the Active bit, and the LDUR, in the debug level */
+ ecsDbgRegVal = IX_NPEDL_MASK_ECS_REG_0_ACTIVE |
+ (ldur << IX_NPEDL_OFFSET_ECS_REG_0_LDUR);
+
+ ixNpeDlNpeMgrExecAccRegWrite (npeBaseAddress, IX_NPEDL_ECS_DBG_CTXT_REG_0,
+ ecsDbgRegVal);
+
+ /*
+ * set CCTXT at ECS DEBUG L3 to specify in which context to execute the
+ * instruction, and set SELCTXT at ECS DEBUG Level to specify which context
+ * store to access.
+ * Debug ECS Level Reg 1 has form 0x000n000n, where n = context number
+ */
+ ecsDbgRegVal = (ctxtNum << IX_NPEDL_OFFSET_ECS_REG_1_CCTXT) |
+ (ctxtNum << IX_NPEDL_OFFSET_ECS_REG_1_SELCTXT);
+
+ ixNpeDlNpeMgrExecAccRegWrite (npeBaseAddress, IX_NPEDL_ECS_DBG_CTXT_REG_1,
+ ecsDbgRegVal);
+
+ /* clear the pipeline */
+ ixNpeDlNpeMgrCommandIssue (npeBaseAddress, IX_NPEDL_EXCTL_CMD_NPE_CLR_PIPE);
+
+ /* load NPE instruction into the instruction register */
+ ixNpeDlNpeMgrExecAccRegWrite (npeBaseAddress, IX_NPEDL_ECS_INSTRUCT_REG,
+ npeInstruction);
+
+ /* we need this value later to wait for completion of NPE execution step */
+ IX_NPEDL_REG_READ (npeBaseAddress, IX_NPEDL_REG_OFFSET_WC, &oldWatchcount);
+
+ /* issue a Step One command via the Execution Control register */
+ ixNpeDlNpeMgrCommandIssue (npeBaseAddress, IX_NPEDL_EXCTL_CMD_NPE_STEP);
+
+ /* Watch Count register increments when NPE completes an instruction */
+ IX_NPEDL_REG_READ (npeBaseAddress, IX_NPEDL_REG_OFFSET_WC,
+ &newWatchcount);
+
+ /*
+ * force the XScale to wait until the NPE has finished execution step
+ * NOTE that this delay will be very small, just long enough to allow a
+ * single NPE instruction to complete execution; if instruction execution
+ * is not completed before timeout retries, exit the while loop
+ */
+ while ((IX_NPE_DL_MAX_NUM_OF_RETRIES > retriesCount)
+ && (newWatchcount == oldWatchcount))
+ {
+ /* Watch Count register increments when NPE completes an instruction */
+ IX_NPEDL_REG_READ (npeBaseAddress, IX_NPEDL_REG_OFFSET_WC,
+ &newWatchcount);
+
+ retriesCount++;
+ }
+
+ if (IX_NPE_DL_MAX_NUM_OF_RETRIES > retriesCount)
+ {
+ ixNpeDlNpeMgrUtilsStats.dbgInstructionExecs++;
+ }
+ else
+ {
+ /* Return timeout status as the instruction has not been executed
+ * after maximum retries */
+ status = IX_NPEDL_CRITICAL_NPE_ERR;
+ }
+
+ IX_NPEDL_TRACE0 (IX_NPEDL_FN_ENTRY_EXIT,
+ "Exiting ixNpeDlNpeMgrDebugInstructionExec\n");
+
+ return status;
+}
+
+
+/*
+ * Function definition: ixNpeDlNpeMgrDebugInstructionPostExec
+ */
+void
+ixNpeDlNpeMgrDebugInstructionPostExec(
+ UINT32 npeBaseAddress)
+{
+ /* clear active bit in debug level */
+ ixNpeDlNpeMgrExecAccRegWrite (npeBaseAddress, IX_NPEDL_ECS_DBG_CTXT_REG_0,
+ 0);
+
+ /* clear the pipeline */
+ ixNpeDlNpeMgrCommandIssue (npeBaseAddress, IX_NPEDL_EXCTL_CMD_NPE_CLR_PIPE);
+
+ /* restore Execution Count register contents. */
+ IX_NPEDL_REG_WRITE (npeBaseAddress, IX_NPEDL_REG_OFFSET_EXCT,
+ ixNpeDlSavedExecCount);
+
+ /* restore IF and IE bits to original values */
+ ixNpeDlNpeMgrExecAccRegWrite (npeBaseAddress, IX_NPEDL_ECS_DBG_CTXT_REG_2,
+ ixNpeDlSavedEcsDbgCtxtReg2);
+}
+
+
+/*
+ * Function definition: ixNpeDlNpeMgrLogicalRegRead
+ */
+PRIVATE IX_STATUS
+ixNpeDlNpeMgrLogicalRegRead (
+ UINT32 npeBaseAddress,
+ UINT32 regAddr,
+ UINT32 regSize,
+ UINT32 ctxtNum,
+ UINT32 *regVal)
+{
+ IX_STATUS status = IX_SUCCESS;
+ UINT32 npeInstruction = 0;
+ UINT32 mask = 0;
+
+ IX_NPEDL_TRACE0 (IX_NPEDL_FN_ENTRY_EXIT,
+ "Entering ixNpeDlNpeMgrLogicalRegRead\n");
+
+ switch (regSize)
+ {
+ case IX_NPEDL_REG_SIZE_BYTE:
+ npeInstruction = IX_NPEDL_INSTR_RD_REG_BYTE;
+ mask = IX_NPEDL_MASK_LOWER_BYTE_OF_WORD; break;
+ case IX_NPEDL_REG_SIZE_SHORT:
+ npeInstruction = IX_NPEDL_INSTR_RD_REG_SHORT;
+ mask = IX_NPEDL_MASK_LOWER_SHORT_OF_WORD; break;
+ case IX_NPEDL_REG_SIZE_WORD:
+ npeInstruction = IX_NPEDL_INSTR_RD_REG_WORD;
+ mask = IX_NPEDL_MASK_FULL_WORD; break;
+ }
+
+ /* make regAddr be the SRC and DEST operands (e.g. movX d0, d0) */
+ npeInstruction |= (regAddr << IX_NPEDL_OFFSET_INSTR_SRC) |
+ (regAddr << IX_NPEDL_OFFSET_INSTR_DEST);
+
+ /* step execution of NPE intruction using Debug Executing Context stack */
+ status = ixNpeDlNpeMgrDebugInstructionExec (npeBaseAddress, npeInstruction,
+ ctxtNum, IX_NPEDL_RD_INSTR_LDUR);
+
+ if (IX_SUCCESS != status)
+ {
+ return status;
+ }
+
+ /* read value of register from Execution Data register */
+ IX_NPEDL_REG_READ (npeBaseAddress, IX_NPEDL_REG_OFFSET_EXDATA, regVal);
+
+ /* align value from left to right */
+ *regVal = (*regVal >> (IX_NPEDL_REG_SIZE_WORD - regSize)) & mask;
+
+ IX_NPEDL_TRACE0 (IX_NPEDL_FN_ENTRY_EXIT,
+ "Exiting ixNpeDlNpeMgrLogicalRegRead\n");
+
+ return IX_SUCCESS;
+}
+
+
+/*
+ * Function definition: ixNpeDlNpeMgrLogicalRegWrite
+ */
+PRIVATE IX_STATUS
+ixNpeDlNpeMgrLogicalRegWrite (
+ UINT32 npeBaseAddress,
+ UINT32 regAddr,
+ UINT32 regVal,
+ UINT32 regSize,
+ UINT32 ctxtNum,
+ BOOL verify)
+{
+ UINT32 npeInstruction = 0;
+ UINT32 mask = 0;
+ IX_STATUS status = IX_SUCCESS;
+ UINT32 retRegVal;
+
+ IX_NPEDL_TRACE0 (IX_NPEDL_FN_ENTRY_EXIT,
+ "Entering ixNpeDlNpeMgrLogicalRegWrite\n");
+
+ if (regSize == IX_NPEDL_REG_SIZE_WORD)
+ {
+ /* NPE register addressing is left-to-right: e.g. |d0|d1|d2|d3| */
+ /* Write upper half-word (short) to |d0|d1| */
+ status = ixNpeDlNpeMgrLogicalRegWrite (npeBaseAddress, regAddr,
+ regVal >> IX_NPEDL_REG_SIZE_SHORT,
+ IX_NPEDL_REG_SIZE_SHORT,
+ ctxtNum, verify);
+
+ if (IX_SUCCESS != status)
+ {
+ return status;
+ }
+
+ /* Write lower half-word (short) to |d2|d3| */
+ status = ixNpeDlNpeMgrLogicalRegWrite (npeBaseAddress,
+ regAddr + IX_NPEDL_BYTES_PER_SHORT,
+ regVal & IX_NPEDL_MASK_LOWER_SHORT_OF_WORD,
+ IX_NPEDL_REG_SIZE_SHORT,
+ ctxtNum, verify);
+
+ if (IX_SUCCESS != status)
+ {
+ return status;
+ }
+ }
+ else
+ {
+ switch (regSize)
+ {
+ case IX_NPEDL_REG_SIZE_BYTE:
+ npeInstruction = IX_NPEDL_INSTR_WR_REG_BYTE;
+ mask = IX_NPEDL_MASK_LOWER_BYTE_OF_WORD; break;
+ case IX_NPEDL_REG_SIZE_SHORT:
+ npeInstruction = IX_NPEDL_INSTR_WR_REG_SHORT;
+ mask = IX_NPEDL_MASK_LOWER_SHORT_OF_WORD; break;
+ }
+ /* mask out any redundant bits, so verify will work later */
+ regVal &= mask;
+
+ /* fill dest operand field of instruction with destination reg addr */
+ npeInstruction |= (regAddr << IX_NPEDL_OFFSET_INSTR_DEST);
+
+ /* fill src operand field of instruction with least-sig 5 bits of val*/
+ npeInstruction |= ((regVal & IX_NPEDL_MASK_IMMED_INSTR_SRC_DATA) <<
+ IX_NPEDL_OFFSET_INSTR_SRC);
+
+ /* fill coprocessor field of instruction with most-sig 11 bits of val*/
+ npeInstruction |= ((regVal & IX_NPEDL_MASK_IMMED_INSTR_COPROC_DATA) <<
+ IX_NPEDL_DISPLACE_IMMED_INSTR_COPROC_DATA);
+
+ /* step execution of NPE intruction using Debug ECS */
+ status = ixNpeDlNpeMgrDebugInstructionExec(npeBaseAddress, npeInstruction,
+ ctxtNum, IX_NPEDL_WR_INSTR_LDUR);
+
+ if (IX_SUCCESS != status)
+ {
+ return status;
+ }
+ }/* condition: if reg to be written is 8-bit or 16-bit (not 32-bit) */
+
+ if (verify)
+ {
+ status = ixNpeDlNpeMgrLogicalRegRead (npeBaseAddress, regAddr,
+ regSize, ctxtNum, &retRegVal);
+
+ if (IX_SUCCESS == status)
+ {
+ if (regVal != retRegVal)
+ {
+ status = IX_FAIL;
+ }
+ }
+ }
+
+ IX_NPEDL_TRACE1 (IX_NPEDL_FN_ENTRY_EXIT,
+ "Exiting ixNpeDlNpeMgrLogicalRegWrite : status = %d\n",
+ status);
+
+ return status;
+}
+
+
+/*
+ * Function definition: ixNpeDlNpeMgrPhysicalRegWrite
+ */
+IX_STATUS
+ixNpeDlNpeMgrPhysicalRegWrite (
+ UINT32 npeBaseAddress,
+ UINT32 regAddr,
+ UINT32 regValue,
+ BOOL verify)
+{
+ IX_STATUS status;
+
+ IX_NPEDL_TRACE0 (IX_NPEDL_FN_ENTRY_EXIT,
+ "Entering ixNpeDlNpeMgrPhysicalRegWrite\n");
+
+/*
+ * There are 32 physical registers used in an NPE. These are
+ * treated as 16 pairs of 32-bit registers. To write one of the pair,
+ * write the pair number (0-16) to the REGMAP for Context 0. Then write
+ * the value to register 0 or 4 in the regfile, depending on which
+ * register of the pair is to be written
+ */
+
+ /*
+ * set REGMAP for context 0 to (regAddr >> 1) to choose which pair (0-16)
+ * of physical registers to write
+ */
+ status = ixNpeDlNpeMgrLogicalRegWrite (npeBaseAddress,
+ IX_NPEDL_CTXT_REG_ADDR_REGMAP,
+ (regAddr >>
+ IX_NPEDL_OFFSET_PHYS_REG_ADDR_REGMAP),
+ IX_NPEDL_REG_SIZE_SHORT, 0, verify);
+ if (status == IX_SUCCESS)
+ {
+ /* regAddr = 0 or 4 */
+ regAddr = (regAddr & IX_NPEDL_MASK_PHYS_REG_ADDR_LOGICAL_ADDR) *
+ IX_NPEDL_BYTES_PER_WORD;
+
+ status = ixNpeDlNpeMgrLogicalRegWrite (npeBaseAddress, regAddr, regValue,
+ IX_NPEDL_REG_SIZE_WORD, 0, verify);
+ }
+
+ if (status != IX_SUCCESS)
+ {
+ IX_NPEDL_ERROR_REPORT ("ixNpeDlNpeMgrPhysicalRegWrite: "
+ "error writing to physical register\n");
+ }
+
+ ixNpeDlNpeMgrUtilsStats.physicalRegWrites++;
+
+ IX_NPEDL_TRACE1 (IX_NPEDL_FN_ENTRY_EXIT,
+ "Exiting ixNpeDlNpeMgrPhysicalRegWrite : status = %d\n",
+ status);
+ return status;
+}
+
+
+/*
+ * Function definition: ixNpeDlNpeMgrCtxtRegWrite
+ */
+IX_STATUS
+ixNpeDlNpeMgrCtxtRegWrite (
+ UINT32 npeBaseAddress,
+ UINT32 ctxtNum,
+ IxNpeDlCtxtRegNum ctxtReg,
+ UINT32 ctxtRegVal,
+ BOOL verify)
+{
+ UINT32 tempRegVal;
+ UINT32 ctxtRegAddr;
+ UINT32 ctxtRegSize;
+ IX_STATUS status = IX_SUCCESS;
+
+ IX_NPEDL_TRACE0 (IX_NPEDL_FN_ENTRY_EXIT,
+ "Entering ixNpeDlNpeMgrCtxtRegWrite\n");
+
+ /*
+ * Context 0 has no STARTPC. Instead, this value is used to set
+ * NextPC for Background ECS, to set where NPE starts executing code
+ */
+ if ((ctxtNum == 0) && (ctxtReg == IX_NPEDL_CTXT_REG_STARTPC))
+ {
+ /* read BG_CTXT_REG_0, update NEXTPC bits, and write back to reg */
+ tempRegVal = ixNpeDlNpeMgrExecAccRegRead (npeBaseAddress,
+ IX_NPEDL_ECS_BG_CTXT_REG_0);
+ tempRegVal &= ~IX_NPEDL_MASK_ECS_REG_0_NEXTPC;
+ tempRegVal |= (ctxtRegVal << IX_NPEDL_OFFSET_ECS_REG_0_NEXTPC) &
+ IX_NPEDL_MASK_ECS_REG_0_NEXTPC;
+
+ ixNpeDlNpeMgrExecAccRegWrite (npeBaseAddress,
+ IX_NPEDL_ECS_BG_CTXT_REG_0, tempRegVal);
+
+ ixNpeDlNpeMgrUtilsStats.nextPcWrites++;
+ }
+ else
+ {
+ ctxtRegAddr = ixNpeDlCtxtRegAccInfo[ctxtReg].regAddress;
+ ctxtRegSize = ixNpeDlCtxtRegAccInfo[ctxtReg].regSize;
+ status = ixNpeDlNpeMgrLogicalRegWrite (npeBaseAddress, ctxtRegAddr,
+ ctxtRegVal, ctxtRegSize,
+ ctxtNum, verify);
+ if (status != IX_SUCCESS)
+ {
+ IX_NPEDL_ERROR_REPORT ("ixNpeDlNpeMgrCtxtRegWrite: "
+ "error writing to context store register\n");
+ }
+
+ ixNpeDlNpeMgrUtilsStats.contextRegWrites++;
+ }
+
+ IX_NPEDL_TRACE1 (IX_NPEDL_FN_ENTRY_EXIT,
+ "Exiting ixNpeDlNpeMgrCtxtRegWrite : status = %d\n",
+ status);
+
+ return status;
+}
+
+
+/*
+ * Function definition: ixNpeDlNpeMgrUtilsStatsShow
+ */
+void
+ixNpeDlNpeMgrUtilsStatsShow (void)
+{
+ ixOsalLog (IX_OSAL_LOG_LVL_USER,
+ IX_OSAL_LOG_DEV_STDOUT,
+ "\nixNpeDlNpeMgrUtilsStatsShow:\n"
+ "\tInstruction Memory writes: %u\n"
+ "\tInstruction Memory writes failed: %u\n"
+ "\tData Memory writes: %u\n"
+ "\tData Memory writes failed: %u\n",
+ ixNpeDlNpeMgrUtilsStats.insMemWrites,
+ ixNpeDlNpeMgrUtilsStats.insMemWriteFails,
+ ixNpeDlNpeMgrUtilsStats.dataMemWrites,
+ ixNpeDlNpeMgrUtilsStats.dataMemWriteFails,
+ 0,0);
+
+ ixOsalLog (IX_OSAL_LOG_LVL_USER,
+ IX_OSAL_LOG_DEV_STDOUT,
+ "\tExecuting Context Stack Register writes: %u\n"
+ "\tExecuting Context Stack Register reads: %u\n"
+ "\tPhysical Register writes: %u\n"
+ "\tContext Store Register writes: %u\n"
+ "\tExecution Backgound Context NextPC writes: %u\n"
+ "\tDebug Instructions Executed: %u\n\n",
+ ixNpeDlNpeMgrUtilsStats.ecsRegWrites,
+ ixNpeDlNpeMgrUtilsStats.ecsRegReads,
+ ixNpeDlNpeMgrUtilsStats.physicalRegWrites,
+ ixNpeDlNpeMgrUtilsStats.contextRegWrites,
+ ixNpeDlNpeMgrUtilsStats.nextPcWrites,
+ ixNpeDlNpeMgrUtilsStats.dbgInstructionExecs);
+}
+
+
+/*
+ * Function definition: ixNpeDlNpeMgrUtilsStatsReset
+ */
+void
+ixNpeDlNpeMgrUtilsStatsReset (void)
+{
+ ixNpeDlNpeMgrUtilsStats.insMemWrites = 0;
+ ixNpeDlNpeMgrUtilsStats.insMemWriteFails = 0;
+ ixNpeDlNpeMgrUtilsStats.dataMemWrites = 0;
+ ixNpeDlNpeMgrUtilsStats.dataMemWriteFails = 0;
+ ixNpeDlNpeMgrUtilsStats.ecsRegWrites = 0;
+ ixNpeDlNpeMgrUtilsStats.ecsRegReads = 0;
+ ixNpeDlNpeMgrUtilsStats.physicalRegWrites = 0;
+ ixNpeDlNpeMgrUtilsStats.contextRegWrites = 0;
+ ixNpeDlNpeMgrUtilsStats.nextPcWrites = 0;
+ ixNpeDlNpeMgrUtilsStats.dbgInstructionExecs = 0;
+}
diff --git a/cpu/ixp/npe/IxNpeMh.c b/cpu/ixp/npe/IxNpeMh.c
new file mode 100644
index 0000000000..8703def8bc
--- /dev/null
+++ b/cpu/ixp/npe/IxNpeMh.c
@@ -0,0 +1,582 @@
+/**
+ * @file IxNpeMh.c
+ *
+ * @author Intel Corporation
+ * @date 18 Jan 2002
+ *
+ * @brief This file contains the implementation of the public API for the
+ * IXP425 NPE Message Handler component.
+ *
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+*/
+
+/*
+ * Put the system defined include files required.
+ */
+
+/*
+ * Put the user defined include files required.
+ */
+
+#include "IxOsal.h"
+#include "IxNpeMhMacros_p.h"
+
+#include "IxNpeMh.h"
+
+#include "IxNpeMhConfig_p.h"
+#include "IxNpeMhReceive_p.h"
+#include "IxNpeMhSend_p.h"
+#include "IxNpeMhSolicitedCbMgr_p.h"
+#include "IxNpeMhUnsolicitedCbMgr_p.h"
+
+/*
+ * #defines and macros used in this file.
+ */
+
+/*
+ * Typedefs whose scope is limited to this file.
+ */
+
+/*
+ * Variable declarations global to this file only. Externs are followed by
+ * static variables.
+ */
+
+PRIVATE BOOL ixNpeMhInitialized = FALSE;
+
+/*
+ * Extern function prototypes.
+ */
+
+/*
+ * Static function prototypes.
+ */
+
+/*
+ * Function definition: ixNpeMhInitialize
+ */
+
+PUBLIC IX_STATUS ixNpeMhInitialize (
+ IxNpeMhNpeInterrupts npeInterrupts)
+{
+ IX_NPEMH_TRACE0 (IX_NPEMH_FN_ENTRY_EXIT, "Entering "
+ "ixNpeMhInitialize\n");
+
+ /* check the npeInterrupts parameter */
+ if ((npeInterrupts != IX_NPEMH_NPEINTERRUPTS_NO) &&
+ (npeInterrupts != IX_NPEMH_NPEINTERRUPTS_YES))
+ {
+ IX_NPEMH_ERROR_REPORT ("Illegal npeInterrupts parameter value\n");
+ return IX_FAIL;
+ }
+
+ /* parameters are ok ... */
+
+ /* initialize the Receive module */
+ ixNpeMhReceiveInitialize ();
+
+ /* initialize the Solicited Callback Manager module */
+ ixNpeMhSolicitedCbMgrInitialize ();
+
+ /* initialize the Unsolicited Callback Manager module */
+ ixNpeMhUnsolicitedCbMgrInitialize ();
+
+ /* initialize the Configuration module
+ *
+ * NOTE: This module was originally configured before the
+ * others, but the sequence was changed so that interrupts
+ * would only be enabled after the handler functions were
+ * set up. The above modules need to be initialised to
+ * handle the NPE interrupts. See SCR #2231.
+ */
+ ixNpeMhConfigInitialize (npeInterrupts);
+
+ ixNpeMhInitialized = TRUE;
+
+ IX_NPEMH_TRACE0 (IX_NPEMH_FN_ENTRY_EXIT, "Exiting "
+ "ixNpeMhInitialize\n");
+
+ return IX_SUCCESS;
+}
+
+/*
+ * Function definition: ixNpeMhUnload
+ */
+
+PUBLIC IX_STATUS ixNpeMhUnload (void)
+{
+ IX_NPEMH_TRACE0 (IX_NPEMH_FN_ENTRY_EXIT, "Entering "
+ "ixNpeMhUnload\n");
+
+ if (!ixNpeMhInitialized)
+ {
+ return IX_FAIL;
+ }
+
+ /* Uninitialize the Configuration module */
+ ixNpeMhConfigUninit ();
+
+ ixNpeMhInitialized = FALSE;
+
+ IX_NPEMH_TRACE0 (IX_NPEMH_FN_ENTRY_EXIT, "Exiting "
+ "ixNpeMhUnload\n");
+
+ return IX_SUCCESS;
+}
+
+
+/*
+ * Function definition: ixNpeMhUnsolicitedCallbackRegister
+ */
+
+PUBLIC IX_STATUS ixNpeMhUnsolicitedCallbackRegister (
+ IxNpeMhNpeId npeId,
+ IxNpeMhMessageId messageId,
+ IxNpeMhCallback unsolicitedCallback)
+{
+ IX_NPEMH_TRACE0 (IX_NPEMH_FN_ENTRY_EXIT, "Entering "
+ "ixNpeMhUnsolicitedCallbackRegister\n");
+
+ /* check that we are initialized */
+ if (!ixNpeMhInitialized)
+ {
+ IX_NPEMH_ERROR_REPORT ("IxNpeMh component is not initialized\n");
+ return IX_FAIL;
+ }
+
+ /* check the npeId parameter */
+ if (!ixNpeMhConfigNpeIdIsValid (npeId))
+ {
+ IX_NPEMH_ERROR_REPORT ("NPE ID invalid\n");
+ return IX_FAIL;
+ }
+
+ /* check the messageId parameter */
+ if ((messageId < IX_NPEMH_MIN_MESSAGE_ID)
+ || (messageId > IX_NPEMH_MAX_MESSAGE_ID))
+ {
+ IX_NPEMH_ERROR_REPORT ("Message ID is out of range\n");
+ return IX_FAIL;
+ }
+
+ /* the unsolicitedCallback parameter is allowed to be NULL */
+
+ /* parameters are ok ... */
+
+ /* get the lock to prevent other clients from entering */
+ ixNpeMhConfigLockGet (npeId);
+
+ /* save the unsolicited callback for the message ID */
+ ixNpeMhUnsolicitedCbMgrCallbackSave (
+ npeId, messageId, unsolicitedCallback);
+
+ /* release the lock to allow other clients back in */
+ ixNpeMhConfigLockRelease (npeId);
+
+ IX_NPEMH_TRACE0 (IX_NPEMH_FN_ENTRY_EXIT, "Exiting "
+ "ixNpeMhUnsolicitedCallbackRegister\n");
+
+ return IX_SUCCESS;
+}
+
+/*
+ * Function definition: ixNpeMhUnsolicitedCallbackForRangeRegister
+ */
+
+PUBLIC IX_STATUS ixNpeMhUnsolicitedCallbackForRangeRegister (
+ IxNpeMhNpeId npeId,
+ IxNpeMhMessageId minMessageId,
+ IxNpeMhMessageId maxMessageId,
+ IxNpeMhCallback unsolicitedCallback)
+{
+ IxNpeMhMessageId messageId;
+
+ IX_NPEMH_TRACE0 (IX_NPEMH_FN_ENTRY_EXIT, "Entering "
+ "ixNpeMhUnsolicitedCallbackForRangeRegister\n");
+
+ /* check that we are initialized */
+ if (!ixNpeMhInitialized)
+ {
+ IX_NPEMH_ERROR_REPORT ("IxNpeMh component is not initialized\n");
+ return IX_FAIL;
+ }
+
+ /* check the npeId parameter */
+ if (!ixNpeMhConfigNpeIdIsValid (npeId))
+ {
+ IX_NPEMH_ERROR_REPORT ("NPE ID invalid\n");
+ return IX_FAIL;
+ }
+
+ /* check the minMessageId parameter */
+ if ((minMessageId < IX_NPEMH_MIN_MESSAGE_ID)
+ || (minMessageId > IX_NPEMH_MAX_MESSAGE_ID))
+ {
+ IX_NPEMH_ERROR_REPORT ("Min message ID is out of range\n");
+ return IX_FAIL;
+ }
+
+ /* check the maxMessageId parameter */
+ if ((maxMessageId < IX_NPEMH_MIN_MESSAGE_ID)
+ || (maxMessageId > IX_NPEMH_MAX_MESSAGE_ID))
+ {
+ IX_NPEMH_ERROR_REPORT ("Max message ID is out of range\n");
+ return IX_FAIL;
+ }
+
+ /* check the semantics of the message range parameters */
+ if (minMessageId > maxMessageId)
+ {
+ IX_NPEMH_ERROR_REPORT ("Min message ID greater than max message "
+ "ID\n");
+ return IX_FAIL;
+ }
+
+ /* the unsolicitedCallback parameter is allowed to be NULL */
+
+ /* parameters are ok ... */
+
+ /* get the lock to prevent other clients from entering */
+ ixNpeMhConfigLockGet (npeId);
+
+ /* for each message ID in the range ... */
+ for (messageId = minMessageId; messageId <= maxMessageId; messageId++)
+ {
+ /* save the unsolicited callback for the message ID */
+ ixNpeMhUnsolicitedCbMgrCallbackSave (
+ npeId, messageId, unsolicitedCallback);
+ }
+
+ /* release the lock to allow other clients back in */
+ ixNpeMhConfigLockRelease (npeId);
+
+ IX_NPEMH_TRACE0 (IX_NPEMH_FN_ENTRY_EXIT, "Exiting "
+ "ixNpeMhUnsolicitedCallbackForRangeRegister\n");
+
+ return IX_SUCCESS;
+}
+
+/*
+ * Function definition: ixNpeMhMessageSend
+ */
+
+PUBLIC IX_STATUS ixNpeMhMessageSend (
+ IxNpeMhNpeId npeId,
+ IxNpeMhMessage message,
+ UINT32 maxSendRetries)
+{
+ IX_STATUS status = IX_SUCCESS;
+
+ IX_NPEMH_TRACE0 (IX_NPEMH_FN_ENTRY_EXIT, "Entering "
+ "ixNpeMhMessageSend\n");
+
+ /* check that we are initialized */
+ if (!ixNpeMhInitialized)
+ {
+ IX_NPEMH_ERROR_REPORT ("IxNpeMh component is not initialized\n");
+ return IX_FAIL;
+ }
+
+ /* check the npeId parameter */
+ if (!ixNpeMhConfigNpeIdIsValid (npeId))
+ {
+ IX_NPEMH_ERROR_REPORT ("NPE ID invalid\n");
+ return IX_FAIL;
+ }
+
+ /* parameters are ok ... */
+
+ /* get the lock to prevent other clients from entering */
+ ixNpeMhConfigLockGet (npeId);
+
+ /* send the message */
+ status = ixNpeMhSendMessageSend (npeId, message, maxSendRetries);
+ if (status != IX_SUCCESS)
+ {
+ IX_NPEMH_ERROR_REPORT ("Failed to send message\n");
+ }
+
+ /* release the lock to allow other clients back in */
+ ixNpeMhConfigLockRelease (npeId);
+
+ IX_NPEMH_TRACE1 (IX_NPEMH_FN_ENTRY_EXIT, "Exiting "
+ "ixNpeMhMessageSend"
+ " : status = %d\n", status);
+
+ return status;
+}
+
+/*
+ * Function definition: ixNpeMhMessageWithResponseSend
+ */
+
+PUBLIC IX_STATUS ixNpeMhMessageWithResponseSend (
+ IxNpeMhNpeId npeId,
+ IxNpeMhMessage message,
+ IxNpeMhMessageId solicitedMessageId,
+ IxNpeMhCallback solicitedCallback,
+ UINT32 maxSendRetries)
+{
+ IX_STATUS status = IX_SUCCESS;
+ IxNpeMhCallback unsolicitedCallback = NULL;
+
+ IX_NPEMH_TRACE0 (IX_NPEMH_FN_ENTRY_EXIT, "Entering "
+ "ixNpeMhMessageWithResponseSend\n");
+
+ /* check that we are initialized */
+ if (!ixNpeMhInitialized)
+ {
+ IX_NPEMH_ERROR_REPORT ("IxNpeMh component is not initialized\n");
+ return IX_FAIL;
+ }
+
+ /* the solicitecCallback parameter is allowed to be NULL. this */
+ /* signifies the client is not interested in the response message */
+
+ /* check the npeId parameter */
+ if (!ixNpeMhConfigNpeIdIsValid (npeId))
+ {
+ IX_NPEMH_ERROR_REPORT ("NPE ID invalid\n");
+ return IX_FAIL;
+ }
+
+ /* check the solicitedMessageId parameter */
+ if ((solicitedMessageId < IX_NPEMH_MIN_MESSAGE_ID)
+ || (solicitedMessageId > IX_NPEMH_MAX_MESSAGE_ID))
+ {
+ IX_NPEMH_ERROR_REPORT ("Solicited message ID is out of range\n");
+ return IX_FAIL;
+ }
+
+ /* check the solicitedMessageId parameter. if an unsolicited */
+ /* callback has been registered for the specified message ID then */
+ /* report an error and return failure */
+ ixNpeMhUnsolicitedCbMgrCallbackRetrieve (
+ npeId, solicitedMessageId, &unsolicitedCallback);
+ if (unsolicitedCallback != NULL)
+ {
+ IX_NPEMH_ERROR_REPORT ("Solicited message ID conflicts with "
+ "unsolicited message ID\n");
+ return IX_FAIL;
+ }
+
+ /* parameters are ok ... */
+
+ /* get the lock to prevent other clients from entering */
+ ixNpeMhConfigLockGet (npeId);
+
+ /* send the message */
+ status = ixNpeMhSendMessageWithResponseSend (
+ npeId, message, solicitedMessageId, solicitedCallback,
+ maxSendRetries);
+ if (status != IX_SUCCESS)
+ {
+ IX_NPEMH_ERROR_REPORT ("Failed to send message\n");
+ }
+
+ /* release the lock to allow other clients back in */
+ ixNpeMhConfigLockRelease (npeId);
+
+ IX_NPEMH_TRACE1 (IX_NPEMH_FN_ENTRY_EXIT, "Exiting "
+ "ixNpeMhMessageWithResponseSend"
+ " : status = %d\n", status);
+
+ return status;
+}
+
+/*
+ * Function definition: ixNpeMhMessagesReceive
+ */
+
+PUBLIC IX_STATUS ixNpeMhMessagesReceive (
+ IxNpeMhNpeId npeId)
+{
+ IX_STATUS status = IX_SUCCESS;
+
+ IX_NPEMH_TRACE0 (IX_NPEMH_FN_ENTRY_EXIT, "Entering "
+ "ixNpeMhMessagesReceive\n");
+
+ /* check that we are initialized */
+ if (!ixNpeMhInitialized)
+ {
+ IX_NPEMH_ERROR_REPORT ("IxNpeMh component is not initialized\n");
+ return IX_FAIL;
+ }
+
+ /* check the npeId parameter */
+ if (!ixNpeMhConfigNpeIdIsValid (npeId))
+ {
+ IX_NPEMH_ERROR_REPORT ("NPE ID invalid\n");
+ return IX_FAIL;
+ }
+
+ /* parameters are ok ... */
+
+ /* get the lock to prevent other clients from entering */
+ ixNpeMhConfigLockGet (npeId);
+
+ /* receive messages from the NPE */
+ status = ixNpeMhReceiveMessagesReceive (npeId);
+
+ if (status != IX_SUCCESS)
+ {
+ IX_NPEMH_ERROR_REPORT ("Failed to receive message\n");
+ }
+
+ /* release the lock to allow other clients back in */
+ ixNpeMhConfigLockRelease (npeId);
+
+ IX_NPEMH_TRACE1 (IX_NPEMH_FN_ENTRY_EXIT, "Exiting "
+ "ixNpeMhMessagesReceive"
+ " : status = %d\n", status);
+
+ return status;
+}
+
+/*
+ * Function definition: ixNpeMhShow
+ */
+
+PUBLIC IX_STATUS ixNpeMhShow (
+ IxNpeMhNpeId npeId)
+{
+ IX_NPEMH_TRACE0 (IX_NPEMH_FN_ENTRY_EXIT, "Entering "
+ "ixNpeMhShow\n");
+
+ /* check that we are initialized */
+ if (!ixNpeMhInitialized)
+ {
+ IX_NPEMH_ERROR_REPORT ("IxNpeMh component is not initialized\n");
+ return IX_FAIL;
+ }
+
+ /* check the npeId parameter */
+ if (!ixNpeMhConfigNpeIdIsValid (npeId))
+ {
+ IX_NPEMH_ERROR_REPORT ("NPE ID invalid\n");
+ return IX_FAIL;
+ }
+
+ /* parameters are ok ... */
+
+ /* note we don't get the lock here as printing the statistics */
+ /* to a console may take some time and we don't want to impact */
+ /* system performance. this means that the statistics displayed */
+ /* may be in a state of flux and make not represent a consistent */
+ /* snapshot. */
+
+ /* display a header */
+ ixOsalLog (IX_OSAL_LOG_LVL_USER, IX_OSAL_LOG_DEV_STDOUT,
+ "Current state of NPE ID %d:\n\n", npeId, 0, 0, 0, 0, 0);
+
+ /* show the current state of each module */
+
+ /* show the current state of the Configuration module */
+ ixNpeMhConfigShow (npeId);
+
+ /* show the current state of the Receive module */
+ ixNpeMhReceiveShow (npeId);
+
+ /* show the current state of the Send module */
+ ixNpeMhSendShow (npeId);
+
+ /* show the current state of the Solicited Callback Manager module */
+ ixNpeMhSolicitedCbMgrShow (npeId);
+
+ /* show the current state of the Unsolicited Callback Manager module */
+ ixNpeMhUnsolicitedCbMgrShow (npeId);
+
+ IX_NPEMH_TRACE0 (IX_NPEMH_FN_ENTRY_EXIT, "Exiting "
+ "ixNpeMhShow\n");
+
+ return IX_SUCCESS;
+}
+
+/*
+ * Function definition: ixNpeMhShowReset
+ */
+
+PUBLIC IX_STATUS ixNpeMhShowReset (
+ IxNpeMhNpeId npeId)
+{
+ IX_NPEMH_TRACE0 (IX_NPEMH_FN_ENTRY_EXIT, "Entering "
+ "ixNpeMhShowReset\n");
+
+ /* check that we are initialized */
+ if (!ixNpeMhInitialized)
+ {
+ IX_NPEMH_ERROR_REPORT ("IxNpeMh component is not initialized\n");
+ return IX_FAIL;
+ }
+
+ /* check the npeId parameter */
+ if (!ixNpeMhConfigNpeIdIsValid (npeId))
+ {
+ IX_NPEMH_ERROR_REPORT ("NPE ID invalid\n");
+ return IX_FAIL;
+ }
+
+ /* parameters are ok ... */
+
+ /* note we don't get the lock here as resetting the statistics */
+ /* shouldn't impact system performance. */
+
+ /* reset the current state of each module */
+
+ /* reset the current state of the Configuration module */
+ ixNpeMhConfigShowReset (npeId);
+
+ /* reset the current state of the Receive module */
+ ixNpeMhReceiveShowReset (npeId);
+
+ /* reset the current state of the Send module */
+ ixNpeMhSendShowReset (npeId);
+
+ /* reset the current state of the Solicited Callback Manager module */
+ ixNpeMhSolicitedCbMgrShowReset (npeId);
+
+ /* reset the current state of the Unsolicited Callback Manager module */
+ ixNpeMhUnsolicitedCbMgrShowReset (npeId);
+
+ IX_NPEMH_TRACE0 (IX_NPEMH_FN_ENTRY_EXIT, "Exiting "
+ "ixNpeMhShowReset\n");
+
+ return IX_SUCCESS;
+}
diff --git a/cpu/ixp/npe/IxNpeMhConfig.c b/cpu/ixp/npe/IxNpeMhConfig.c
new file mode 100644
index 0000000000..50c8f21138
--- /dev/null
+++ b/cpu/ixp/npe/IxNpeMhConfig.c
@@ -0,0 +1,608 @@
+/**
+ * @file IxNpeMhConfig.c
+ *
+ * @author Intel Corporation
+ * @date 18 Jan 2002
+ *
+ * @brief This file contains the implementation of the private API for the
+ * Configuration module.
+ *
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+*/
+
+/*
+ * Put the system defined include files required.
+ */
+
+
+/*
+ * Put the user defined include files required.
+ */
+
+#include "IxOsal.h"
+
+#include "IxNpeMhMacros_p.h"
+
+#include "IxNpeMhConfig_p.h"
+
+/*
+ * #defines and macros used in this file.
+ */
+#define IX_NPE_MH_MAX_NUM_OF_RETRIES 1000000 /**< Maximum number of
+ * retries before
+ * timeout
+ */
+
+/*
+ * Typedefs whose scope is limited to this file.
+ */
+
+/**
+ * @struct IxNpeMhConfigStats
+ *
+ * @brief This structure is used to maintain statistics for the
+ * Configuration module.
+ */
+
+typedef struct
+{
+ UINT32 outFifoReads; /**< outFifo reads */
+ UINT32 inFifoWrites; /**< inFifo writes */
+ UINT32 maxInFifoFullRetries; /**< max retries if inFIFO full */
+ UINT32 maxOutFifoEmptyRetries; /**< max retries if outFIFO empty */
+} IxNpeMhConfigStats;
+
+/*
+ * Variable declarations global to this file only. Externs are followed by
+ * static variables.
+ */
+
+IxNpeMhConfigNpeInfo ixNpeMhConfigNpeInfo[IX_NPEMH_NUM_NPES] =
+{
+ {
+ 0,
+ IX_NPEMH_NPEA_INT,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ NULL,
+ FALSE
+ },
+ {
+ 0,
+ IX_NPEMH_NPEB_INT,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ NULL,
+ FALSE
+ },
+ {
+ 0,
+ IX_NPEMH_NPEC_INT,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ NULL,
+ FALSE
+ }
+};
+
+PRIVATE IxNpeMhConfigStats ixNpeMhConfigStats[IX_NPEMH_NUM_NPES];
+
+/*
+ * Extern function prototypes.
+ */
+
+/*
+ * Static function prototypes.
+ */
+PRIVATE
+void ixNpeMhConfigIsr (void *parameter);
+
+/*
+ * Function definition: ixNpeMhConfigIsr
+ */
+
+PRIVATE
+void ixNpeMhConfigIsr (void *parameter)
+{
+ IxNpeMhNpeId npeId = (IxNpeMhNpeId)parameter;
+ UINT32 ofint;
+ volatile UINT32 *statusReg =
+ (UINT32 *)ixNpeMhConfigNpeInfo[npeId].statusRegister;
+
+ IX_NPEMH_TRACE0 (IX_NPEMH_FN_ENTRY_EXIT, "Entering "
+ "ixNpeMhConfigIsr\n");
+
+ /* get the OFINT (OutFifo interrupt) bit of the status register */
+ IX_NPEMH_REGISTER_READ_BITS (statusReg, &ofint, IX_NPEMH_NPE_STAT_OFINT);
+
+ /* if the OFINT status bit is set */
+ if (ofint)
+ {
+ /* if there is an ISR registered for this NPE */
+ if (ixNpeMhConfigNpeInfo[npeId].isr != NULL)
+ {
+ /* invoke the ISR routine */
+ ixNpeMhConfigNpeInfo[npeId].isr (npeId);
+ }
+ else
+ {
+ /* if we don't service the interrupt the NPE will continue */
+ /* to trigger the interrupt indefinitely */
+ IX_NPEMH_ERROR_REPORT ("No ISR registered to service "
+ "interrupt\n");
+ }
+ }
+
+ IX_NPEMH_TRACE0 (IX_NPEMH_FN_ENTRY_EXIT, "Exiting "
+ "ixNpeMhConfigIsr\n");
+}
+
+/*
+ * Function definition: ixNpeMhConfigInitialize
+ */
+
+void ixNpeMhConfigInitialize (
+ IxNpeMhNpeInterrupts npeInterrupts)
+{
+ IxNpeMhNpeId npeId;
+ UINT32 virtualAddr[IX_NPEMH_NUM_NPES];
+
+ IX_NPEMH_TRACE0 (IX_NPEMH_FN_ENTRY_EXIT, "Entering "
+ "ixNpeMhConfigInitialize\n");
+
+ /* Request a mapping for the NPE-A config register address space */
+ virtualAddr[IX_NPEMH_NPEID_NPEA] =
+ (UINT32) IX_OSAL_MEM_MAP (IX_NPEMH_NPEA_BASE,
+ IX_OSAL_IXP400_NPEA_MAP_SIZE);
+ IX_OSAL_ASSERT (virtualAddr[IX_NPEMH_NPEID_NPEA]);
+
+ /* Request a mapping for the NPE-B config register address space */
+ virtualAddr[IX_NPEMH_NPEID_NPEB] =
+ (UINT32) IX_OSAL_MEM_MAP (IX_NPEMH_NPEB_BASE,
+ IX_OSAL_IXP400_NPEB_MAP_SIZE);
+ IX_OSAL_ASSERT (virtualAddr[IX_NPEMH_NPEID_NPEB]);
+
+ /* Request a mapping for the NPE-C config register address space */
+ virtualAddr[IX_NPEMH_NPEID_NPEC] =
+ (UINT32) IX_OSAL_MEM_MAP (IX_NPEMH_NPEC_BASE,
+ IX_OSAL_IXP400_NPEC_MAP_SIZE);
+ IX_OSAL_ASSERT (virtualAddr[IX_NPEMH_NPEID_NPEC]);
+
+ /* for each NPE ... */
+ for (npeId = 0; npeId < IX_NPEMH_NUM_NPES; npeId++)
+ {
+ /* declare a convenience pointer */
+ IxNpeMhConfigNpeInfo *npeInfo = &ixNpeMhConfigNpeInfo[npeId];
+
+ /* store the virtual addresses of the NPE registers for later use */
+ npeInfo->virtualRegisterBase = virtualAddr[npeId];
+ npeInfo->statusRegister = virtualAddr[npeId] + IX_NPEMH_NPESTAT_OFFSET;
+ npeInfo->controlRegister = virtualAddr[npeId] + IX_NPEMH_NPECTL_OFFSET;
+ npeInfo->inFifoRegister = virtualAddr[npeId] + IX_NPEMH_NPEFIFO_OFFSET;
+ npeInfo->outFifoRegister = virtualAddr[npeId] + IX_NPEMH_NPEFIFO_OFFSET;
+
+ /* for test purposes - to verify the register addresses */
+ IX_NPEMH_TRACE2 (IX_NPEMH_DEBUG, "NPE %d status register = "
+ "0x%08X\n", npeId, npeInfo->statusRegister);
+ IX_NPEMH_TRACE2 (IX_NPEMH_DEBUG, "NPE %d control register = "
+ "0x%08X\n", npeId, npeInfo->controlRegister);
+ IX_NPEMH_TRACE2 (IX_NPEMH_DEBUG, "NPE %d inFifo register = "
+ "0x%08X\n", npeId, npeInfo->inFifoRegister);
+ IX_NPEMH_TRACE2 (IX_NPEMH_DEBUG, "NPE %d outFifo register = "
+ "0x%08X\n", npeId, npeInfo->outFifoRegister);
+
+ /* connect our ISR to the NPE interrupt */
+ (void) ixOsalIrqBind (
+ npeInfo->interruptId, ixNpeMhConfigIsr, (void *)npeId);
+
+ /* initialise a mutex for this NPE */
+ (void) ixOsalMutexInit (&npeInfo->mutex);
+
+ /* if we should service the NPE's "outFIFO not empty" interrupt */
+ if (npeInterrupts == IX_NPEMH_NPEINTERRUPTS_YES)
+ {
+ /* enable the NPE's "outFIFO not empty" interrupt */
+ ixNpeMhConfigNpeInterruptEnable (npeId);
+ }
+ else
+ {
+ /* disable the NPE's "outFIFO not empty" interrupt */
+ ixNpeMhConfigNpeInterruptDisable (npeId);
+ }
+ }
+
+ IX_NPEMH_TRACE0 (IX_NPEMH_FN_ENTRY_EXIT, "Exiting "
+ "ixNpeMhConfigInitialize\n");
+}
+
+/*
+ * Function definition: ixNpeMhConfigUninit
+ */
+
+void ixNpeMhConfigUninit (void)
+{
+ IxNpeMhNpeId npeId;
+
+ IX_NPEMH_TRACE0 (IX_NPEMH_FN_ENTRY_EXIT, "Entering "
+ "ixNpeMhConfigUninit\n");
+
+ /* for each NPE ... */
+ for (npeId = 0; npeId < IX_NPEMH_NUM_NPES; npeId++)
+ {
+ /* declare a convenience pointer */
+ IxNpeMhConfigNpeInfo *npeInfo = &ixNpeMhConfigNpeInfo[npeId];
+
+ /* disconnect ISR */
+ ixOsalIrqUnbind(npeInfo->interruptId);
+
+ /* destroy mutex associated with this NPE */
+ ixOsalMutexDestroy(&npeInfo->mutex);
+
+ IX_OSAL_MEM_UNMAP (npeInfo->virtualRegisterBase);
+
+ npeInfo->virtualRegisterBase = 0;
+ npeInfo->statusRegister = 0;
+ npeInfo->controlRegister = 0;
+ npeInfo->inFifoRegister = 0;
+ npeInfo->outFifoRegister = 0;
+ }
+
+ IX_NPEMH_TRACE0 (IX_NPEMH_FN_ENTRY_EXIT, "Exiting "
+ "ixNpeMhConfigUninit\n");
+}
+
+/*
+ * Function definition: ixNpeMhConfigIsrRegister
+ */
+
+void ixNpeMhConfigIsrRegister (
+ IxNpeMhNpeId npeId,
+ IxNpeMhConfigIsr isr)
+{
+ IX_NPEMH_TRACE0 (IX_NPEMH_FN_ENTRY_EXIT, "Entering "
+ "ixNpeMhConfigIsrRegister\n");
+
+ /* check if there is already an ISR registered for this NPE */
+ if (ixNpeMhConfigNpeInfo[npeId].isr != NULL)
+ {
+ IX_NPEMH_TRACE0 (IX_NPEMH_DEBUG, "Over-writing registered NPE ISR\n");
+ }
+
+ /* save the ISR routine with the NPE info */
+ ixNpeMhConfigNpeInfo[npeId].isr = isr;
+
+ IX_NPEMH_TRACE0 (IX_NPEMH_FN_ENTRY_EXIT, "Exiting "
+ "ixNpeMhConfigIsrRegister\n");
+}
+
+/*
+ * Function definition: ixNpeMhConfigNpeInterruptEnable
+ */
+
+BOOL ixNpeMhConfigNpeInterruptEnable (
+ IxNpeMhNpeId npeId)
+{
+ UINT32 ofe;
+ volatile UINT32 *controlReg =
+ (UINT32 *)ixNpeMhConfigNpeInfo[npeId].controlRegister;
+
+ /* get the OFE (OutFifoEnable) bit of the control register */
+ IX_NPEMH_REGISTER_READ_BITS (controlReg, &ofe, IX_NPEMH_NPE_CTL_OFE);
+
+ /* if the interrupt is disabled then we must enable it */
+ if (!ofe)
+ {
+ /* set the OFE (OutFifoEnable) bit of the control register */
+ /* we must set the OFEWE (OutFifoEnableWriteEnable) at the same */
+ /* time for the write to have effect */
+ IX_NPEMH_REGISTER_WRITE_BITS (controlReg,
+ (IX_NPEMH_NPE_CTL_OFE |
+ IX_NPEMH_NPE_CTL_OFEWE),
+ (IX_NPEMH_NPE_CTL_OFE |
+ IX_NPEMH_NPE_CTL_OFEWE));
+ }
+
+ /* return the previous state of the interrupt */
+ return (ofe != 0);
+}
+
+/*
+ * Function definition: ixNpeMhConfigNpeInterruptDisable
+ */
+
+BOOL ixNpeMhConfigNpeInterruptDisable (
+ IxNpeMhNpeId npeId)
+{
+ UINT32 ofe;
+ volatile UINT32 *controlReg =
+ (UINT32 *)ixNpeMhConfigNpeInfo[npeId].controlRegister;
+
+ /* get the OFE (OutFifoEnable) bit of the control register */
+ IX_NPEMH_REGISTER_READ_BITS (controlReg, &ofe, IX_NPEMH_NPE_CTL_OFE);
+
+ /* if the interrupt is enabled then we must disable it */
+ if (ofe)
+ {
+ /* unset the OFE (OutFifoEnable) bit of the control register */
+ /* we must set the OFEWE (OutFifoEnableWriteEnable) at the same */
+ /* time for the write to have effect */
+ IX_NPEMH_REGISTER_WRITE_BITS (controlReg,
+ (0 |
+ IX_NPEMH_NPE_CTL_OFEWE),
+ (IX_NPEMH_NPE_CTL_OFE |
+ IX_NPEMH_NPE_CTL_OFEWE));
+ }
+
+ /* return the previous state of the interrupt */
+ return (ofe != 0);
+}
+
+/*
+ * Function definition: ixNpeMhConfigMessageIdGet
+ */
+
+IxNpeMhMessageId ixNpeMhConfigMessageIdGet (
+ IxNpeMhMessage message)
+{
+ /* return the most-significant byte of the first word of the */
+ /* message */
+ return ((IxNpeMhMessageId) ((message.data[0] >> 24) & 0xFF));
+}
+
+/*
+ * Function definition: ixNpeMhConfigNpeIdIsValid
+ */
+
+BOOL ixNpeMhConfigNpeIdIsValid (
+ IxNpeMhNpeId npeId)
+{
+ /* check that the npeId parameter is within the range of valid IDs */
+ return (npeId >= 0 && npeId < IX_NPEMH_NUM_NPES);
+}
+
+/*
+ * Function definition: ixNpeMhConfigLockGet
+ */
+
+void ixNpeMhConfigLockGet (
+ IxNpeMhNpeId npeId)
+{
+ IX_NPEMH_TRACE0 (IX_NPEMH_FN_ENTRY_EXIT, "Entering "
+ "ixNpeMhConfigLockGet\n");
+
+ /* lock the mutex for this NPE */
+ (void) ixOsalMutexLock (&ixNpeMhConfigNpeInfo[npeId].mutex,
+ IX_OSAL_WAIT_FOREVER);
+
+ /* disable the NPE's "outFIFO not empty" interrupt */
+ ixNpeMhConfigNpeInfo[npeId].oldInterruptState =
+ ixNpeMhConfigNpeInterruptDisable (npeId);
+
+ IX_NPEMH_TRACE0 (IX_NPEMH_FN_ENTRY_EXIT, "Exiting "
+ "ixNpeMhConfigLockGet\n");
+}
+
+/*
+ * Function definition: ixNpeMhConfigLockRelease
+ */
+
+void ixNpeMhConfigLockRelease (
+ IxNpeMhNpeId npeId)
+{
+ IX_NPEMH_TRACE0 (IX_NPEMH_FN_ENTRY_EXIT, "Entering "
+ "ixNpeMhConfigLockRelease\n");
+
+ /* if the interrupt was previously enabled */
+ if (ixNpeMhConfigNpeInfo[npeId].oldInterruptState)
+ {
+ /* enable the NPE's "outFIFO not empty" interrupt */
+ ixNpeMhConfigNpeInfo[npeId].oldInterruptState =
+ ixNpeMhConfigNpeInterruptEnable (npeId);
+ }
+
+ /* unlock the mutex for this NPE */
+ (void) ixOsalMutexUnlock (&ixNpeMhConfigNpeInfo[npeId].mutex);
+
+ IX_NPEMH_TRACE0 (IX_NPEMH_FN_ENTRY_EXIT, "Exiting "
+ "ixNpeMhConfigLockRelease\n");
+}
+
+/*
+ * Function definition: ixNpeMhConfigInFifoWrite
+ */
+
+IX_STATUS ixNpeMhConfigInFifoWrite (
+ IxNpeMhNpeId npeId,
+ IxNpeMhMessage message)
+{
+ volatile UINT32 *npeInFifo =
+ (UINT32 *)ixNpeMhConfigNpeInfo[npeId].inFifoRegister;
+ UINT32 retriesCount = 0;
+
+ /* write the first word of the message to the NPE's inFIFO */
+ IX_NPEMH_REGISTER_WRITE (npeInFifo, message.data[0]);
+
+ /* need to wait for room to write second word - see SCR #493,
+ poll for maximum number of retries, if exceed maximum
+ retries, exit from while loop */
+ while ((IX_NPE_MH_MAX_NUM_OF_RETRIES > retriesCount)
+ && ixNpeMhConfigInFifoIsFull (npeId))
+ {
+ retriesCount++;
+ }
+
+ /* Return TIMEOUT status to caller, indicate that NPE Hang / Halt */
+ if (IX_NPE_MH_MAX_NUM_OF_RETRIES == retriesCount)
+ {
+ return IX_NPEMH_CRITICAL_NPE_ERR;
+ }
+
+ /* write the second word of the message to the NPE's inFIFO */
+ IX_NPEMH_REGISTER_WRITE (npeInFifo, message.data[1]);
+
+ /* record in the stats the maximum number of retries needed */
+ if (ixNpeMhConfigStats[npeId].maxInFifoFullRetries < retriesCount)
+ {
+ ixNpeMhConfigStats[npeId].maxInFifoFullRetries = retriesCount;
+ }
+
+ /* update statistical info */
+ ixNpeMhConfigStats[npeId].inFifoWrites++;
+
+ return IX_SUCCESS;
+}
+
+/*
+ * Function definition: ixNpeMhConfigOutFifoRead
+ */
+
+IX_STATUS ixNpeMhConfigOutFifoRead (
+ IxNpeMhNpeId npeId,
+ IxNpeMhMessage *message)
+{
+ volatile UINT32 *npeOutFifo =
+ (UINT32 *)ixNpeMhConfigNpeInfo[npeId].outFifoRegister;
+ UINT32 retriesCount = 0;
+
+ /* read the first word of the message from the NPE's outFIFO */
+ IX_NPEMH_REGISTER_READ (npeOutFifo, &message->data[0]);
+
+ /* need to wait for NPE to write second word - see SCR #493
+ poll for maximum number of retries, if exceed maximum
+ retries, exit from while loop */
+ while ((IX_NPE_MH_MAX_NUM_OF_RETRIES > retriesCount)
+ && ixNpeMhConfigOutFifoIsEmpty (npeId))
+ {
+ retriesCount++;
+ }
+
+ /* Return TIMEOUT status to caller, indicate that NPE Hang / Halt */
+ if (IX_NPE_MH_MAX_NUM_OF_RETRIES == retriesCount)
+ {
+ return IX_NPEMH_CRITICAL_NPE_ERR;
+ }
+
+ /* read the second word of the message from the NPE's outFIFO */
+ IX_NPEMH_REGISTER_READ (npeOutFifo, &message->data[1]);
+
+ /* record in the stats the maximum number of retries needed */
+ if (ixNpeMhConfigStats[npeId].maxOutFifoEmptyRetries < retriesCount)
+ {
+ ixNpeMhConfigStats[npeId].maxOutFifoEmptyRetries = retriesCount;
+ }
+
+ /* update statistical info */
+ ixNpeMhConfigStats[npeId].outFifoReads++;
+
+ return IX_SUCCESS;
+}
+
+/*
+ * Function definition: ixNpeMhConfigShow
+ */
+
+void ixNpeMhConfigShow (
+ IxNpeMhNpeId npeId)
+{
+ /* show the message fifo read counter */
+ IX_NPEMH_SHOW ("Message FIFO reads",
+ ixNpeMhConfigStats[npeId].outFifoReads);
+
+ /* show the message fifo write counter */
+ IX_NPEMH_SHOW ("Message FIFO writes",
+ ixNpeMhConfigStats[npeId].inFifoWrites);
+
+ /* show the max retries performed when inFIFO full */
+ IX_NPEMH_SHOW ("Max inFIFO Full retries",
+ ixNpeMhConfigStats[npeId].maxInFifoFullRetries);
+
+ /* show the max retries performed when outFIFO empty */
+ IX_NPEMH_SHOW ("Max outFIFO Empty retries",
+ ixNpeMhConfigStats[npeId].maxOutFifoEmptyRetries);
+
+ /* show the current status of the inFifo */
+ ixOsalLog (IX_OSAL_LOG_LVL_USER, IX_OSAL_LOG_DEV_STDOUT,
+ "InFifo is %s and %s\n",
+ (ixNpeMhConfigInFifoIsEmpty (npeId) ?
+ (int) "EMPTY" : (int) "NOT EMPTY"),
+ (ixNpeMhConfigInFifoIsFull (npeId) ?
+ (int) "FULL" : (int) "NOT FULL"),
+ 0, 0, 0, 0);
+
+ /* show the current status of the outFifo */
+ ixOsalLog (IX_OSAL_LOG_LVL_USER, IX_OSAL_LOG_DEV_STDOUT,
+ "OutFifo is %s and %s\n",
+ (ixNpeMhConfigOutFifoIsEmpty (npeId) ?
+ (int) "EMPTY" : (int) "NOT EMPTY"),
+ (ixNpeMhConfigOutFifoIsFull (npeId) ?
+ (int) "FULL" : (int) "NOT FULL"),
+ 0, 0, 0, 0);
+}
+
+/*
+ * Function definition: ixNpeMhConfigShowReset
+ */
+
+void ixNpeMhConfigShowReset (
+ IxNpeMhNpeId npeId)
+{
+ /* reset the message fifo read counter */
+ ixNpeMhConfigStats[npeId].outFifoReads = 0;
+
+ /* reset the message fifo write counter */
+ ixNpeMhConfigStats[npeId].inFifoWrites = 0;
+
+ /* reset the max inFIFO Full retries counter */
+ ixNpeMhConfigStats[npeId].maxInFifoFullRetries = 0;
+
+ /* reset the max outFIFO empty retries counter */
+ ixNpeMhConfigStats[npeId].maxOutFifoEmptyRetries = 0;
+}
+
+
diff --git a/cpu/ixp/npe/IxNpeMhReceive.c b/cpu/ixp/npe/IxNpeMhReceive.c
new file mode 100644
index 0000000000..57c8be30e5
--- /dev/null
+++ b/cpu/ixp/npe/IxNpeMhReceive.c
@@ -0,0 +1,320 @@
+/**
+ * @file IxNpeMhReceive.c
+ *
+ * @author Intel Corporation
+ * @date 18 Jan 2002
+ *
+ * @brief This file contains the implementation of the private API for the
+ * Receive module.
+ *
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+*/
+
+/*
+ * Put the system defined include files required.
+ */
+
+
+/*
+ * Put the user defined include files required.
+ */
+#include "IxOsal.h"
+#include "IxNpeMhMacros_p.h"
+#include "IxNpeMhConfig_p.h"
+#include "IxNpeMhReceive_p.h"
+#include "IxNpeMhSolicitedCbMgr_p.h"
+#include "IxNpeMhUnsolicitedCbMgr_p.h"
+
+/*
+ * #defines and macros used in this file.
+ */
+
+/*
+ * Typedefs whose scope is limited to this file.
+ */
+
+/**
+ * @struct IxNpeMhReceiveStats
+ *
+ * @brief This structure is used to maintain statistics for the Receive
+ * module.
+ */
+
+typedef struct
+{
+ UINT32 isrs; /**< receive ISR invocations */
+ UINT32 receives; /**< receive messages invocations */
+ UINT32 messages; /**< messages received */
+ UINT32 solicited; /**< solicited messages received */
+ UINT32 unsolicited; /**< unsolicited messages received */
+ UINT32 callbacks; /**< callbacks invoked */
+} IxNpeMhReceiveStats;
+
+/*
+ * Variable declarations global to this file only. Externs are followed by
+ * static variables.
+ */
+
+PRIVATE IxNpeMhReceiveStats ixNpeMhReceiveStats[IX_NPEMH_NUM_NPES];
+
+/*
+ * Extern function prototypes.
+ */
+
+/*
+ * Static function prototypes.
+ */
+PRIVATE
+void ixNpeMhReceiveIsr (int npeId);
+
+PRIVATE
+void ixNpeMhReceiveIsr (int npeId)
+{
+ int lockKey;
+
+ IX_NPEMH_TRACE0 (IX_NPEMH_FN_ENTRY_EXIT, "Entering "
+ "ixNpeMhReceiveIsr\n");
+
+ lockKey = ixOsalIrqLock ();
+
+ /* invoke the message receive routine to get messages from the NPE */
+ ixNpeMhReceiveMessagesReceive (npeId);
+
+ /* update statistical info */
+ ixNpeMhReceiveStats[npeId].isrs++;
+
+ ixOsalIrqUnlock (lockKey);
+
+ IX_NPEMH_TRACE0 (IX_NPEMH_FN_ENTRY_EXIT, "Exiting "
+ "ixNpeMhReceiveIsr\n");
+}
+
+/*
+ * Function definition: ixNpeMhReceiveInitialize
+ */
+
+void ixNpeMhReceiveInitialize (void)
+{
+ IxNpeMhNpeId npeId = 0;
+
+ IX_NPEMH_TRACE0 (IX_NPEMH_FN_ENTRY_EXIT, "Entering "
+ "ixNpeMhReceiveInitialize\n");
+
+ /* for each NPE ... */
+ for (npeId = 0; npeId < IX_NPEMH_NUM_NPES; npeId++)
+ {
+ /* register our internal ISR for the NPE to handle "outFIFO not */
+ /* empty" interrupts */
+ ixNpeMhConfigIsrRegister (npeId, ixNpeMhReceiveIsr);
+ }
+
+ IX_NPEMH_TRACE0 (IX_NPEMH_FN_ENTRY_EXIT, "Exiting "
+ "ixNpeMhReceiveInitialize\n");
+}
+
+/*
+ * Function definition: ixNpeMhReceiveMessagesReceive
+ */
+
+IX_STATUS ixNpeMhReceiveMessagesReceive (
+ IxNpeMhNpeId npeId)
+{
+ IxNpeMhMessage message = { { 0, 0 } };
+ IxNpeMhMessageId messageId = 0;
+ IxNpeMhCallback callback = NULL;
+ IX_STATUS status;
+
+ IX_NPEMH_TRACE0 (IX_NPEMH_FN_ENTRY_EXIT, "Entering "
+ "ixNpeMhReceiveMessagesReceive\n");
+
+ /* update statistical info */
+ ixNpeMhReceiveStats[npeId].receives++;
+
+ /* while the NPE has messages in its outFIFO */
+ while (!ixNpeMhConfigOutFifoIsEmpty (npeId))
+ {
+ /* read a message from the NPE's outFIFO */
+ status = ixNpeMhConfigOutFifoRead (npeId, &message);
+
+ if (IX_SUCCESS != status)
+ {
+ return status;
+ }
+
+ /* get the ID of the message */
+ messageId = ixNpeMhConfigMessageIdGet (message);
+
+ IX_NPEMH_TRACE2 (IX_NPEMH_DEBUG,
+ "Received message from NPE %d with ID 0x%02X\n",
+ npeId, messageId);
+
+ /* update statistical info */
+ ixNpeMhReceiveStats[npeId].messages++;
+
+ /* try to find a matching unsolicited callback for this message. */
+
+ /* we assume the message is unsolicited. only if there is no */
+ /* unsolicited callback for this message type do we assume the */
+ /* message is solicited. it is much faster to check for an */
+ /* unsolicited callback, so doing this check first should result */
+ /* in better performance. */
+
+ ixNpeMhUnsolicitedCbMgrCallbackRetrieve (
+ npeId, messageId, &callback);
+
+ if (callback != NULL)
+ {
+ IX_NPEMH_TRACE0 (IX_NPEMH_DEBUG,
+ "Found matching unsolicited callback\n");
+
+ /* update statistical info */
+ ixNpeMhReceiveStats[npeId].unsolicited++;
+ }
+
+ /* if no unsolicited callback was found try to find a matching */
+ /* solicited callback for this message */
+ if (callback == NULL)
+ {
+ ixNpeMhSolicitedCbMgrCallbackRetrieve (
+ npeId, messageId, &callback);
+
+ if (callback != NULL)
+ {
+ IX_NPEMH_TRACE0 (IX_NPEMH_DEBUG,
+ "Found matching solicited callback\n");
+
+ /* update statistical info */
+ ixNpeMhReceiveStats[npeId].solicited++;
+ }
+ }
+
+ /* if a callback (either unsolicited or solicited) was found */
+ if (callback != NULL)
+ {
+ /* invoke the callback to pass the message back to the client */
+ callback (npeId, message);
+
+ /* update statistical info */
+ ixNpeMhReceiveStats[npeId].callbacks++;
+ }
+ else /* no callback (neither unsolicited nor solicited) was found */
+ {
+ IX_NPEMH_TRACE2 (IX_NPEMH_WARNING,
+ "No matching callback for NPE %d"
+ " and ID 0x%02X, discarding message\n",
+ npeId, messageId);
+
+ /* the message will be discarded. this is normal behaviour */
+ /* if the client passes a NULL solicited callback when */
+ /* sending a message. this indicates that the client is not */
+ /* interested in receiving the response. alternatively a */
+ /* NULL callback here may signify an unsolicited message */
+ /* with no appropriate registered callback. */
+ }
+ }
+
+ IX_NPEMH_TRACE0 (IX_NPEMH_FN_ENTRY_EXIT, "Exiting "
+ "ixNpeMhReceiveMessagesReceive\n");
+
+ return IX_SUCCESS;
+}
+
+/*
+ * Function definition: ixNpeMhReceiveShow
+ */
+
+void ixNpeMhReceiveShow (
+ IxNpeMhNpeId npeId)
+{
+ /* show the ISR invocation counter */
+ IX_NPEMH_SHOW ("Receive ISR invocations",
+ ixNpeMhReceiveStats[npeId].isrs);
+
+ /* show the receive message invocation counter */
+ IX_NPEMH_SHOW ("Receive messages invocations",
+ ixNpeMhReceiveStats[npeId].receives);
+
+ /* show the message received counter */
+ IX_NPEMH_SHOW ("Messages received",
+ ixNpeMhReceiveStats[npeId].messages);
+
+ /* show the solicited message counter */
+ IX_NPEMH_SHOW ("Solicited messages received",
+ ixNpeMhReceiveStats[npeId].solicited);
+
+ /* show the unsolicited message counter */
+ IX_NPEMH_SHOW ("Unsolicited messages received",
+ ixNpeMhReceiveStats[npeId].unsolicited);
+
+ /* show the callback invoked counter */
+ IX_NPEMH_SHOW ("Callbacks invoked",
+ ixNpeMhReceiveStats[npeId].callbacks);
+
+ /* show the message discarded counter */
+ IX_NPEMH_SHOW ("Received messages discarded",
+ (ixNpeMhReceiveStats[npeId].messages -
+ ixNpeMhReceiveStats[npeId].callbacks));
+}
+
+/*
+ * Function definition: ixNpeMhReceiveShowReset
+ */
+
+void ixNpeMhReceiveShowReset (
+ IxNpeMhNpeId npeId)
+{
+ /* reset the ISR invocation counter */
+ ixNpeMhReceiveStats[npeId].isrs = 0;
+
+ /* reset the receive message invocation counter */
+ ixNpeMhReceiveStats[npeId].receives = 0;
+
+ /* reset the message received counter */
+ ixNpeMhReceiveStats[npeId].messages = 0;
+
+ /* reset the solicited message counter */
+ ixNpeMhReceiveStats[npeId].solicited = 0;
+
+ /* reset the unsolicited message counter */
+ ixNpeMhReceiveStats[npeId].unsolicited = 0;
+
+ /* reset the callback invoked counter */
+ ixNpeMhReceiveStats[npeId].callbacks = 0;
+}
diff --git a/cpu/ixp/npe/IxNpeMhSend.c b/cpu/ixp/npe/IxNpeMhSend.c
new file mode 100644
index 0000000000..318913ac84
--- /dev/null
+++ b/cpu/ixp/npe/IxNpeMhSend.c
@@ -0,0 +1,307 @@
+/**
+ * @file IxNpeMhSend.c
+ *
+ * @author Intel Corporation
+ * @date 18 Jan 2002
+ *
+ * @brief This file contains the implementation of the private API for the
+ * Send module.
+ *
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+*/
+
+/*
+ * Put the system defined include files required.
+ */
+
+
+/*
+ * Put the user defined include files required.
+ */
+
+#include "IxNpeMhMacros_p.h"
+
+#include "IxNpeMhConfig_p.h"
+#include "IxNpeMhSend_p.h"
+#include "IxNpeMhSolicitedCbMgr_p.h"
+
+/*
+ * #defines and macros used in this file.
+ */
+
+/**
+ * @def IX_NPEMH_INFIFO_RETRY_DELAY_US
+ *
+ * @brief Amount of time (uSecs) to delay between retries
+ * while inFIFO is Full when attempting to send a message
+ */
+#define IX_NPEMH_INFIFO_RETRY_DELAY_US (1)
+
+
+/*
+ * Typedefs whose scope is limited to this file.
+ */
+
+/**
+ * @struct IxNpeMhSendStats
+ *
+ * @brief This structure is used to maintain statistics for the Send
+ * module.
+ */
+
+typedef struct
+{
+ UINT32 sends; /**< send invocations */
+ UINT32 sendWithResponses; /**< send with response invocations */
+ UINT32 queueFulls; /**< fifo queue full occurrences */
+ UINT32 queueFullRetries; /**< fifo queue full retry occurrences */
+ UINT32 maxQueueFullRetries; /**< max fifo queue full retries */
+ UINT32 callbackFulls; /**< callback list full occurrences */
+} IxNpeMhSendStats;
+
+/*
+ * Variable declarations global to this file only. Externs are followed by
+ * static variables.
+ */
+
+PRIVATE IxNpeMhSendStats ixNpeMhSendStats[IX_NPEMH_NUM_NPES];
+
+/*
+ * Extern function prototypes.
+ */
+
+/*
+ * Static function prototypes.
+ */
+PRIVATE
+BOOL ixNpeMhSendInFifoIsFull(
+ IxNpeMhNpeId npeId,
+ UINT32 maxSendRetries);
+
+/*
+ * Function definition: ixNpeMhSendInFifoIsFull
+ */
+
+PRIVATE
+BOOL ixNpeMhSendInFifoIsFull(
+ IxNpeMhNpeId npeId,
+ UINT32 maxSendRetries)
+{
+ BOOL isFull = FALSE;
+ UINT32 numRetries = 0;
+
+ /* check the NPE's inFIFO */
+ isFull = ixNpeMhConfigInFifoIsFull (npeId);
+
+ /* we retry a few times, just to give the NPE a chance to read from */
+ /* the FIFO if the FIFO is currently full */
+ while (isFull && (numRetries++ < maxSendRetries))
+ {
+ if (numRetries >= IX_NPEMH_SEND_RETRIES_DEFAULT)
+ {
+ /* Delay here for as short a time as possible (1 us). */
+ /* Adding a delay here should ensure we are not hogging */
+ /* the AHB bus while we are retrying */
+ ixOsalBusySleep (IX_NPEMH_INFIFO_RETRY_DELAY_US);
+ }
+
+ /* re-check the NPE's inFIFO */
+ isFull = ixNpeMhConfigInFifoIsFull (npeId);
+
+ /* update statistical info */
+ ixNpeMhSendStats[npeId].queueFullRetries++;
+ }
+
+ /* record the highest number of retries that occurred */
+ if (ixNpeMhSendStats[npeId].maxQueueFullRetries < numRetries)
+ {
+ ixNpeMhSendStats[npeId].maxQueueFullRetries = numRetries;
+ }
+
+ if (isFull)
+ {
+ /* update statistical info */
+ ixNpeMhSendStats[npeId].queueFulls++;
+ }
+
+ return isFull;
+}
+
+/*
+ * Function definition: ixNpeMhSendMessageSend
+ */
+
+IX_STATUS ixNpeMhSendMessageSend (
+ IxNpeMhNpeId npeId,
+ IxNpeMhMessage message,
+ UINT32 maxSendRetries)
+{
+ IX_STATUS status;
+
+ IX_NPEMH_TRACE0 (IX_NPEMH_FN_ENTRY_EXIT, "Entering "
+ "ixNpeMhSendMessageSend\n");
+
+ /* update statistical info */
+ ixNpeMhSendStats[npeId].sends++;
+
+ /* check if the NPE's inFIFO is full - if so return an error */
+ if (ixNpeMhSendInFifoIsFull (npeId, maxSendRetries))
+ {
+ IX_NPEMH_TRACE0 (IX_NPEMH_WARNING, "NPE's inFIFO is full\n");
+ return IX_FAIL;
+ }
+
+ /* write the message to the NPE's inFIFO */
+ status = ixNpeMhConfigInFifoWrite (npeId, message);
+
+ IX_NPEMH_TRACE0 (IX_NPEMH_FN_ENTRY_EXIT, "Exiting "
+ "ixNpeMhSendMessageSend\n");
+
+ return status;
+}
+
+/*
+ * Function definition: ixNpeMhSendMessageWithResponseSend
+ */
+
+IX_STATUS ixNpeMhSendMessageWithResponseSend (
+ IxNpeMhNpeId npeId,
+ IxNpeMhMessage message,
+ IxNpeMhMessageId solicitedMessageId,
+ IxNpeMhCallback solicitedCallback,
+ UINT32 maxSendRetries)
+{
+ IX_STATUS status = IX_SUCCESS;
+
+ IX_NPEMH_TRACE0 (IX_NPEMH_FN_ENTRY_EXIT, "Entering "
+ "ixNpeMhSendMessageWithResponseSend\n");
+
+ /* update statistical info */
+ ixNpeMhSendStats[npeId].sendWithResponses++;
+
+ /* sr: this sleep will call the receive routine (no interrupts used!!!) */
+ ixOsalSleep (IX_NPEMH_INFIFO_RETRY_DELAY_US);
+
+ /* check if the NPE's inFIFO is full - if so return an error */
+ if (ixNpeMhSendInFifoIsFull (npeId, maxSendRetries))
+ {
+ IX_NPEMH_TRACE0 (IX_NPEMH_WARNING, "NPE's inFIFO is full\n");
+ return IX_FAIL;
+ }
+
+ /* save the solicited callback */
+ status = ixNpeMhSolicitedCbMgrCallbackSave (
+ npeId, solicitedMessageId, solicitedCallback);
+ if (status != IX_SUCCESS)
+ {
+ IX_NPEMH_ERROR_REPORT ("Failed to save solicited callback\n");
+
+ /* update statistical info */
+ ixNpeMhSendStats[npeId].callbackFulls++;
+
+ return status;
+ }
+
+ /* write the message to the NPE's inFIFO */
+ status = ixNpeMhConfigInFifoWrite (npeId, message);
+
+ IX_NPEMH_TRACE0 (IX_NPEMH_FN_ENTRY_EXIT, "Exiting "
+ "ixNpeMhSendMessageWithResponseSend\n");
+
+ return status;
+}
+
+/*
+ * Function definition: ixNpeMhSendShow
+ */
+
+void ixNpeMhSendShow (
+ IxNpeMhNpeId npeId)
+{
+ /* show the message send invocation counter */
+ IX_NPEMH_SHOW ("Send invocations",
+ ixNpeMhSendStats[npeId].sends);
+
+ /* show the message send with response invocation counter */
+ IX_NPEMH_SHOW ("Send with response invocations",
+ ixNpeMhSendStats[npeId].sendWithResponses);
+
+ /* show the fifo queue full occurrence counter */
+ IX_NPEMH_SHOW ("Fifo queue full occurrences",
+ ixNpeMhSendStats[npeId].queueFulls);
+
+ /* show the fifo queue full retry occurrence counter */
+ IX_NPEMH_SHOW ("Fifo queue full retry occurrences",
+ ixNpeMhSendStats[npeId].queueFullRetries);
+
+ /* show the fifo queue full maximum retries counter */
+ IX_NPEMH_SHOW ("Maximum fifo queue full retries",
+ ixNpeMhSendStats[npeId].maxQueueFullRetries);
+
+ /* show the callback list full occurrence counter */
+ IX_NPEMH_SHOW ("Solicited callback list full occurrences",
+ ixNpeMhSendStats[npeId].callbackFulls);
+}
+
+/*
+ * Function definition: ixNpeMhSendShowReset
+ */
+
+void ixNpeMhSendShowReset (
+ IxNpeMhNpeId npeId)
+{
+ /* reset the message send invocation counter */
+ ixNpeMhSendStats[npeId].sends = 0;
+
+ /* reset the message send with response invocation counter */
+ ixNpeMhSendStats[npeId].sendWithResponses = 0;
+
+ /* reset the fifo queue full occurrence counter */
+ ixNpeMhSendStats[npeId].queueFulls = 0;
+
+ /* reset the fifo queue full retry occurrence counter */
+ ixNpeMhSendStats[npeId].queueFullRetries = 0;
+
+ /* reset the max fifo queue full retries counter */
+ ixNpeMhSendStats[npeId].maxQueueFullRetries = 0;
+
+ /* reset the callback list full occurrence counter */
+ ixNpeMhSendStats[npeId].callbackFulls = 0;
+}
diff --git a/cpu/ixp/npe/IxNpeMhSolicitedCbMgr.c b/cpu/ixp/npe/IxNpeMhSolicitedCbMgr.c
new file mode 100644
index 0000000000..8e083a63bf
--- /dev/null
+++ b/cpu/ixp/npe/IxNpeMhSolicitedCbMgr.c
@@ -0,0 +1,358 @@
+/**
+ * @file IxNpeMhSolicitedCbMgr.c
+ *
+ * @author Intel Corporation
+ * @date 18 Jan 2002
+ *
+ * @brief This file contains the implementation of the private API for the
+ * Solicited Callback Manager module.
+ *
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+*/
+#ifndef IXNPEMHCONFIG_P_H
+# define IXNPEMHSOLICITEDCBMGR_C
+#else
+# error "Error, IxNpeMhConfig_p.h should not be included before this definition."
+#endif
+
+/*
+ * Put the system defined include files required.
+ */
+
+
+/*
+ * Put the user defined include files required.
+ */
+
+#include "IxOsal.h"
+
+#include "IxNpeMhMacros_p.h"
+#include "IxNpeMhSolicitedCbMgr_p.h"
+#include "IxNpeMhConfig_p.h"
+/*
+ * #defines and macros used in this file.
+ */
+
+/*
+ * Typedefs whose scope is limited to this file.
+ */
+
+/**
+ * @struct IxNpeMhSolicitedCallbackListEntry
+ *
+ * @brief This structure is used to store the information associated with
+ * an entry in the callback list. This consists of the ID of the send
+ * message (which indicates the ID of the corresponding response message)
+ * and the callback function pointer itself.
+ *
+ */
+
+typedef struct IxNpeMhSolicitedCallbackListEntry
+{
+ /** message ID */
+ IxNpeMhMessageId messageId;
+
+ /** callback function pointer */
+ IxNpeMhCallback callback;
+
+ /** pointer to next entry in the list */
+ struct IxNpeMhSolicitedCallbackListEntry *next;
+} IxNpeMhSolicitedCallbackListEntry;
+
+/**
+ * @struct IxNpeMhSolicitedCallbackList
+ *
+ * @brief This structure is used to maintain the list of response
+ * callbacks. The number of entries in this list will be variable, and
+ * they will be stored in a linked list fashion for ease of addition and
+ * removal. The entries themselves are statically allocated, and are
+ * organised into a "free" list and a "callback" list. Adding an entry
+ * means taking an entry from the "free" list and adding it to the
+ * "callback" list. Removing an entry means removing it from the
+ * "callback" list and returning it to the "free" list.
+ */
+
+typedef struct
+{
+ /** pointer to the head of the free list */
+ IxNpeMhSolicitedCallbackListEntry *freeHead;
+
+ /** pointer to the head of the callback list */
+ IxNpeMhSolicitedCallbackListEntry *callbackHead;
+
+ /** pointer to the tail of the callback list */
+ IxNpeMhSolicitedCallbackListEntry *callbackTail;
+
+ /** array of entries - the first entry is used as a dummy entry to */
+ /* avoid the scenario of having an empty list, hence '+ 1' */
+ IxNpeMhSolicitedCallbackListEntry entries[IX_NPEMH_MAX_CALLBACKS + 1];
+} IxNpeMhSolicitedCallbackList;
+
+/**
+ * @struct IxNpeMhSolicitedCbMgrStats
+ *
+ * @brief This structure is used to maintain statistics for the Solicited
+ * Callback Manager module.
+ */
+
+typedef struct
+{
+ UINT32 saves; /**< callback list saves */
+ UINT32 retrieves; /**< callback list retrieves */
+} IxNpeMhSolicitedCbMgrStats;
+
+/*
+ * Variable declarations global to this file only. Externs are followed by
+ * static variables.
+ */
+
+PRIVATE IxNpeMhSolicitedCallbackList
+ixNpeMhSolicitedCbMgrCallbackLists[IX_NPEMH_NUM_NPES];
+
+PRIVATE IxNpeMhSolicitedCbMgrStats
+ixNpeMhSolicitedCbMgrStats[IX_NPEMH_NUM_NPES];
+
+/*
+ * Extern function prototypes.
+ */
+
+/*
+ * Static function prototypes.
+ */
+
+/*
+ * Function definition: ixNpeMhSolicitedCbMgrInitialize
+ */
+
+void ixNpeMhSolicitedCbMgrInitialize (void)
+{
+ IxNpeMhNpeId npeId;
+ UINT32 localIndex;
+ IxNpeMhSolicitedCallbackList *list = NULL;
+
+ IX_NPEMH_TRACE0 (IX_NPEMH_FN_ENTRY_EXIT, "Entering "
+ "ixNpeMhSolicitedCbMgrInitialize\n");
+
+ /* for each NPE ... */
+ for (npeId = 0; npeId < IX_NPEMH_NUM_NPES; npeId++)
+ {
+ /* initialise a pointer to the list for convenience */
+ list = &ixNpeMhSolicitedCbMgrCallbackLists[npeId];
+
+ /* for each entry in the list, after the dummy entry ... */
+ for (localIndex = 1; localIndex <= IX_NPEMH_MAX_CALLBACKS; localIndex++)
+ {
+ /* initialise the entry */
+ list->entries[localIndex].messageId = 0x00;
+ list->entries[localIndex].callback = NULL;
+
+ /* if this entry is before the last entry */
+ if (localIndex < IX_NPEMH_MAX_CALLBACKS)
+ {
+ /* chain this entry to the following entry */
+ list->entries[localIndex].next = &(list->entries[localIndex + 1]);
+ }
+ else /* this entry is the last entry */
+ {
+ /* the last entry isn't chained to anything */
+ list->entries[localIndex].next = NULL;
+ }
+ }
+
+ /* set the free list pointer to point to the first real entry */
+ /* (all real entries begin chained together on the free list) */
+ list->freeHead = &(list->entries[1]);
+
+ /* set the callback list pointers to point to the dummy entry */
+ /* (the callback list is initially empty) */
+ list->callbackHead = &(list->entries[0]);
+ list->callbackTail = &(list->entries[0]);
+ }
+
+ IX_NPEMH_TRACE0 (IX_NPEMH_FN_ENTRY_EXIT, "Exiting "
+ "ixNpeMhSolicitedCbMgrInitialize\n");
+}
+
+/*
+ * Function definition: ixNpeMhSolicitedCbMgrCallbackSave
+ */
+
+IX_STATUS ixNpeMhSolicitedCbMgrCallbackSave (
+ IxNpeMhNpeId npeId,
+ IxNpeMhMessageId solicitedMessageId,
+ IxNpeMhCallback solicitedCallback)
+{
+ IxNpeMhSolicitedCallbackList *list = NULL;
+ IxNpeMhSolicitedCallbackListEntry *callbackEntry = NULL;
+
+ IX_NPEMH_TRACE0 (IX_NPEMH_FN_ENTRY_EXIT, "Entering "
+ "ixNpeMhSolicitedCbMgrCallbackSave\n");
+
+ /* initialise a pointer to the list for convenience */
+ list = &ixNpeMhSolicitedCbMgrCallbackLists[npeId];
+
+ /* check to see if there are any entries in the free list */
+ if (list->freeHead == NULL)
+ {
+ IX_NPEMH_ERROR_REPORT ("Solicited callback list is full\n");
+ return IX_FAIL;
+ }
+
+ /* there is an entry in the free list we can use */
+
+ /* update statistical info */
+ ixNpeMhSolicitedCbMgrStats[npeId].saves++;
+
+ /* remove a callback entry from the start of the free list */
+ callbackEntry = list->freeHead;
+ list->freeHead = callbackEntry->next;
+
+ /* fill in the callback entry with the new data */
+ callbackEntry->messageId = solicitedMessageId;
+ callbackEntry->callback = solicitedCallback;
+
+ /* the new callback entry will be added to the tail of the callback */
+ /* list, so it isn't chained to anything */
+ callbackEntry->next = NULL;
+
+ /* chain new callback entry to the last entry of the callback list */
+ list->callbackTail->next = callbackEntry;
+ list->callbackTail = callbackEntry;
+
+ IX_NPEMH_TRACE0 (IX_NPEMH_FN_ENTRY_EXIT, "Exiting "
+ "ixNpeMhSolicitedCbMgrCallbackSave\n");
+
+ return IX_SUCCESS;
+}
+
+/*
+ * Function definition: ixNpeMhSolicitedCbMgrCallbackRetrieve
+ */
+
+void ixNpeMhSolicitedCbMgrCallbackRetrieve (
+ IxNpeMhNpeId npeId,
+ IxNpeMhMessageId solicitedMessageId,
+ IxNpeMhCallback *solicitedCallback)
+{
+ IxNpeMhSolicitedCallbackList *list = NULL;
+ IxNpeMhSolicitedCallbackListEntry *callbackEntry = NULL;
+ IxNpeMhSolicitedCallbackListEntry *previousEntry = NULL;
+
+ /* initialise a pointer to the list for convenience */
+ list = &ixNpeMhSolicitedCbMgrCallbackLists[npeId];
+
+ /* initialise the callback entry to the first entry of the callback */
+ /* list - we must skip over the dummy entry, which is the previous */
+ callbackEntry = list->callbackHead->next;
+ previousEntry = list->callbackHead;
+
+ /* traverse the callback list looking for an entry with a matching */
+ /* message ID. note we also save the previous entry's pointer to */
+ /* allow us to unchain the matching entry from the callback list */
+ while ((callbackEntry != NULL) &&
+ (callbackEntry->messageId != solicitedMessageId))
+ {
+ previousEntry = callbackEntry;
+ callbackEntry = callbackEntry->next;
+ }
+
+ /* if we didn't find a matching callback entry */
+ if (callbackEntry == NULL)
+ {
+ /* return a NULL callback in the outgoing parameter */
+ *solicitedCallback = NULL;
+ }
+ else /* we found a matching callback entry */
+ {
+ /* update statistical info */
+ ixNpeMhSolicitedCbMgrStats[npeId].retrieves++;
+
+ /* return the callback in the outgoing parameter */
+ *solicitedCallback = callbackEntry->callback;
+
+ /* unchain callback entry by chaining previous entry to next */
+ previousEntry->next = callbackEntry->next;
+
+ /* if the callback entry is at the tail of the list */
+ if (list->callbackTail == callbackEntry)
+ {
+ /* update the tail of the callback list */
+ list->callbackTail = previousEntry;
+ }
+
+ /* re-initialise the callback entry */
+ callbackEntry->messageId = 0x00;
+ callbackEntry->callback = NULL;
+
+ /* add the callback entry to the start of the free list */
+ callbackEntry->next = list->freeHead;
+ list->freeHead = callbackEntry;
+ }
+}
+
+/*
+ * Function definition: ixNpeMhSolicitedCbMgrShow
+ */
+
+void ixNpeMhSolicitedCbMgrShow (
+ IxNpeMhNpeId npeId)
+{
+ /* show the solicited callback list save counter */
+ IX_NPEMH_SHOW ("Solicited callback list saves",
+ ixNpeMhSolicitedCbMgrStats[npeId].saves);
+
+ /* show the solicited callback list retrieve counter */
+ IX_NPEMH_SHOW ("Solicited callback list retrieves",
+ ixNpeMhSolicitedCbMgrStats[npeId].retrieves);
+}
+
+/*
+ * Function definition: ixNpeMhSolicitedCbMgrShowReset
+ */
+
+void ixNpeMhSolicitedCbMgrShowReset (
+ IxNpeMhNpeId npeId)
+{
+ /* reset the solicited callback list save counter */
+ ixNpeMhSolicitedCbMgrStats[npeId].saves = 0;
+
+ /* reset the solicited callback list retrieve counter */
+ ixNpeMhSolicitedCbMgrStats[npeId].retrieves = 0;
+}
diff --git a/cpu/ixp/npe/IxNpeMhUnsolicitedCbMgr.c b/cpu/ixp/npe/IxNpeMhUnsolicitedCbMgr.c
new file mode 100644
index 0000000000..d37f9f9306
--- /dev/null
+++ b/cpu/ixp/npe/IxNpeMhUnsolicitedCbMgr.c
@@ -0,0 +1,246 @@
+/**
+ * @file IxNpeMhUnsolicitedCbMgr.c
+ *
+ * @author Intel Corporation
+ * @date 18 Jan 2002
+ *
+ * @brief This file contains the implementation of the private API for
+ * the Unsolicited Callback Manager module.
+ *
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+*/
+
+/*
+ * Put the system defined include files required.
+ */
+
+
+/*
+ * Put the user defined include files required.
+ */
+#include "IxOsal.h"
+
+#include "IxNpeMhMacros_p.h"
+
+#include "IxNpeMhUnsolicitedCbMgr_p.h"
+
+
+/*
+ * #defines and macros used in this file.
+ */
+
+/*
+ * Typedefs whose scope is limited to this file.
+ */
+
+/**
+ * @struct IxNpeMhUnsolicitedCallbackTable
+ *
+ * @brief This structure is used to maintain the list of registered
+ * callbacks. One entry exists for each message ID, and a NULL entry will
+ * signify that no callback has been registered for that ID.
+ */
+
+typedef struct
+{
+ /** array of entries */
+ IxNpeMhCallback entries[IX_NPEMH_MAX_MESSAGE_ID + 1];
+} IxNpeMhUnsolicitedCallbackTable;
+
+/**
+ * @struct IxNpeMhUnsolicitedCbMgrStats
+ *
+ * @brief This structure is used to maintain statistics for the Unsolicited
+ * Callback Manager module.
+ */
+
+typedef struct
+{
+ UINT32 saves; /**< callback table saves */
+ UINT32 overwrites; /**< callback table overwrites */
+} IxNpeMhUnsolicitedCbMgrStats;
+
+/*
+ * Variable declarations global to this file only. Externs are followed by
+ * static variables.
+ */
+
+PRIVATE IxNpeMhUnsolicitedCallbackTable
+ixNpeMhUnsolicitedCallbackTables[IX_NPEMH_NUM_NPES];
+
+PRIVATE IxNpeMhUnsolicitedCbMgrStats
+ixNpeMhUnsolicitedCbMgrStats[IX_NPEMH_NUM_NPES];
+
+/*
+ * Extern function prototypes.
+ */
+
+/*
+ * Static function prototypes.
+ */
+
+/*
+ * Function definition: ixNpeMhUnsolicitedCbMgrInitialize
+ */
+
+void ixNpeMhUnsolicitedCbMgrInitialize (void)
+{
+ IxNpeMhNpeId npeId = 0;
+ IxNpeMhUnsolicitedCallbackTable *table = NULL;
+ IxNpeMhMessageId messageId = 0;
+
+ IX_NPEMH_TRACE0 (IX_NPEMH_FN_ENTRY_EXIT, "Entering "
+ "ixNpeMhUnsolicitedCbMgrInitialize\n");
+
+ /* for each NPE ... */
+ for (npeId = 0; npeId < IX_NPEMH_NUM_NPES; npeId++)
+ {
+ /* initialise a pointer to the table for convenience */
+ table = &ixNpeMhUnsolicitedCallbackTables[npeId];
+
+ /* for each message ID ... */
+ for (messageId = IX_NPEMH_MIN_MESSAGE_ID;
+ messageId <= IX_NPEMH_MAX_MESSAGE_ID; messageId++)
+ {
+ /* initialise the callback for this message ID to NULL */
+ table->entries[messageId] = NULL;
+ }
+ }
+
+ IX_NPEMH_TRACE0 (IX_NPEMH_FN_ENTRY_EXIT, "Exiting "
+ "ixNpeMhUnsolicitedCbMgrInitialize\n");
+}
+
+/*
+ * Function definition: ixNpeMhUnsolicitedCbMgrCallbackSave
+ */
+
+void ixNpeMhUnsolicitedCbMgrCallbackSave (
+ IxNpeMhNpeId npeId,
+ IxNpeMhMessageId unsolicitedMessageId,
+ IxNpeMhCallback unsolicitedCallback)
+{
+ IxNpeMhUnsolicitedCallbackTable *table = NULL;
+
+ /* initialise a pointer to the table for convenience */
+ table = &ixNpeMhUnsolicitedCallbackTables[npeId];
+
+ IX_NPEMH_TRACE0 (IX_NPEMH_FN_ENTRY_EXIT, "Entering "
+ "ixNpeMhUnsolicitedCbMgrCallbackSave\n");
+
+ /* update statistical info */
+ ixNpeMhUnsolicitedCbMgrStats[npeId].saves++;
+
+ /* check if there is a callback already registered for this NPE and */
+ /* message ID */
+ if (table->entries[unsolicitedMessageId] != NULL)
+ {
+ /* if we are overwriting an existing callback */
+ if (unsolicitedCallback != NULL)
+ {
+ IX_NPEMH_TRACE2 (IX_NPEMH_DEBUG, "Unsolicited callback "
+ "overwriting existing callback for NPE ID %d "
+ "message ID 0x%02X\n", npeId, unsolicitedMessageId);
+ }
+ else /* if we are clearing an existing callback */
+ {
+ IX_NPEMH_TRACE2 (IX_NPEMH_DEBUG, "NULL unsolicited callback "
+ "clearing existing callback for NPE ID %d "
+ "message ID 0x%02X\n", npeId, unsolicitedMessageId);
+ }
+
+ /* update statistical info */
+ ixNpeMhUnsolicitedCbMgrStats[npeId].overwrites++;
+ }
+
+ /* save the callback into the table */
+ table->entries[unsolicitedMessageId] = unsolicitedCallback;
+
+ IX_NPEMH_TRACE0 (IX_NPEMH_FN_ENTRY_EXIT, "Exiting "
+ "ixNpeMhUnsolicitedCbMgrCallbackSave\n");
+}
+
+/*
+ * Function definition: ixNpeMhUnsolicitedCbMgrCallbackRetrieve
+ */
+
+void ixNpeMhUnsolicitedCbMgrCallbackRetrieve (
+ IxNpeMhNpeId npeId,
+ IxNpeMhMessageId unsolicitedMessageId,
+ IxNpeMhCallback *unsolicitedCallback)
+{
+ IxNpeMhUnsolicitedCallbackTable *table = NULL;
+
+ /* initialise a pointer to the table for convenience */
+ table = &ixNpeMhUnsolicitedCallbackTables[npeId];
+
+ /* retrieve the callback from the table */
+ *unsolicitedCallback = table->entries[unsolicitedMessageId];
+}
+
+/*
+ * Function definition: ixNpeMhUnsolicitedCbMgrShow
+ */
+
+void ixNpeMhUnsolicitedCbMgrShow (
+ IxNpeMhNpeId npeId)
+{
+ /* show the unsolicited callback table save counter */
+ IX_NPEMH_SHOW ("Unsolicited callback table saves",
+ ixNpeMhUnsolicitedCbMgrStats[npeId].saves);
+
+ /* show the unsolicited callback table overwrite counter */
+ IX_NPEMH_SHOW ("Unsolicited callback table overwrites",
+ ixNpeMhUnsolicitedCbMgrStats[npeId].overwrites);
+}
+
+/*
+ * Function definition: ixNpeMhUnsolicitedCbMgrShowReset
+ */
+
+void ixNpeMhUnsolicitedCbMgrShowReset (
+ IxNpeMhNpeId npeId)
+{
+ /* reset the unsolicited callback table save counter */
+ ixNpeMhUnsolicitedCbMgrStats[npeId].saves = 0;
+
+ /* reset the unsolicited callback table overwrite counter */
+ ixNpeMhUnsolicitedCbMgrStats[npeId].overwrites = 0;
+}
diff --git a/cpu/ixp/npe/IxOsalBufferMgt.c b/cpu/ixp/npe/IxOsalBufferMgt.c
new file mode 100644
index 0000000000..fa8db477af
--- /dev/null
+++ b/cpu/ixp/npe/IxOsalBufferMgt.c
@@ -0,0 +1,800 @@
+/**
+ * @file IxOsalBufferMgt.c
+ *
+ * @brief Default buffer pool management and buffer management
+ * Implementation.
+ *
+ * Design Notes:
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+/*
+ * OS may choose to use default bufferMgt by defining
+ * IX_OSAL_USE_DEFAULT_BUFFER_MGT in IxOsalOsBufferMgt.h
+ */
+
+#include "IxOsal.h"
+
+#define IX_OSAL_BUFFER_FREE_PROTECTION /* Define this to enable Illegal MBuf Freed Protection*/
+
+/*
+ * The implementation is only used when the following
+ * is defined.
+ */
+#ifdef IX_OSAL_USE_DEFAULT_BUFFER_MGT
+
+
+#define IX_OSAL_MBUF_SYS_SIGNATURE (0x8BADF00D)
+#define IX_OSAL_MBUF_SYS_SIGNATURE_MASK (0xEFFFFFFF)
+#define IX_OSAL_MBUF_USED_FLAG (0x10000000)
+#define IX_OSAL_MBUF_SYS_SIGNATURE_INIT(bufPtr) IX_OSAL_MBUF_SIGNATURE (bufPtr) = (UINT32)IX_OSAL_MBUF_SYS_SIGNATURE
+
+/*
+* This implementation is protect, the buffer pool management's ixOsalMBufFree
+* against an invalid MBUF pointer argument that already has been freed earlier
+* or in other words resides in the free pool of MBUFs. This added feature,
+* checks the MBUF "USED" FLAG. The Flag tells if the MBUF is still not freed
+* back to the Buffer Pool.
+* Disable this feature for performance reasons by undef
+* IX_OSAL_BUFFER_FREE_PROTECTION macro.
+*/
+#ifdef IX_OSAL_BUFFER_FREE_PROTECTION /*IX_OSAL_BUFFER_FREE_PROTECTION With Buffer Free protection*/
+
+#define IX_OSAL_MBUF_GET_SYS_SIGNATURE(bufPtr) (IX_OSAL_MBUF_SIGNATURE (bufPtr)&(IX_OSAL_MBUF_SYS_SIGNATURE_MASK) )
+#define IX_OSAL_MBUF_SET_SYS_SIGNATURE(bufPtr) do { \
+ IX_OSAL_MBUF_SIGNATURE (bufPtr)&(~IX_OSAL_MBUF_SYS_SIGNATURE_MASK);\
+ IX_OSAL_MBUF_SIGNATURE (bufPtr)|=IX_OSAL_MBUF_SYS_SIGNATURE; \
+ }while(0)
+
+#define IX_OSAL_MBUF_SET_USED_FLAG(bufPtr) IX_OSAL_MBUF_SIGNATURE (bufPtr)|=IX_OSAL_MBUF_USED_FLAG
+#define IX_OSAL_MBUF_CLEAR_USED_FLAG(bufPtr) IX_OSAL_MBUF_SIGNATURE (bufPtr)&=~IX_OSAL_MBUF_USED_FLAG
+#define IX_OSAL_MBUF_ISSET_USED_FLAG(bufPtr) (IX_OSAL_MBUF_SIGNATURE (bufPtr)&IX_OSAL_MBUF_USED_FLAG)
+
+#else
+
+#define IX_OSAL_MBUF_GET_SYS_SIGNATURE(bufPtr) IX_OSAL_MBUF_SIGNATURE (bufPtr)
+#define IX_OSAL_MBUF_SET_SYS_SIGNATURE(bufPtr) IX_OSAL_MBUF_SIGNATURE (bufPtr) = IX_OSAL_MBUF_SYS_SIGNATURE
+
+#endif /*IX_OSAL_BUFFER_FREE_PROTECTION With Buffer Free protection*/
+/*
+ * Variable declarations global to this file only. Externs are followed by
+ * static variables.
+ */
+
+/*
+ * A unit of 32, used to provide bit-shift for pool
+ * management. Needs some work if users want more than 32 pools.
+ */
+#define IX_OSAL_BUFF_FREE_BITS 32
+
+PRIVATE UINT32 ixOsalBuffFreePools[IX_OSAL_MBUF_MAX_POOLS /
+ IX_OSAL_BUFF_FREE_BITS];
+
+PUBLIC IX_OSAL_MBUF_POOL ixOsalBuffPools[IX_OSAL_MBUF_MAX_POOLS];
+
+static int ixOsalBuffPoolsInUse = 0;
+
+#ifdef IX_OSAL_BUFFER_ALLOC_SEPARATELY
+PRIVATE IX_OSAL_MBUF *
+ixOsalBuffPoolMbufInit (UINT32 mbufSizeAligned,
+ UINT32 dataSizeAligned,
+ IX_OSAL_MBUF_POOL *poolPtr);
+#endif
+
+PRIVATE IX_OSAL_MBUF_POOL * ixOsalPoolAlloc (void);
+
+/*
+ * Function definition: ixOsalPoolAlloc
+ */
+
+/****************************/
+
+PRIVATE IX_OSAL_MBUF_POOL *
+ixOsalPoolAlloc (void)
+{
+ register unsigned int i = 0;
+
+ /*
+ * Scan for the first free buffer. Free buffers are indicated by 0
+ * on the corrsponding bit in ixOsalBuffFreePools.
+ */
+ if (ixOsalBuffPoolsInUse >= IX_OSAL_MBUF_MAX_POOLS)
+ {
+ /*
+ * Fail to grab a ptr this time
+ */
+ return NULL;
+ }
+
+ while (ixOsalBuffFreePools[i / IX_OSAL_BUFF_FREE_BITS] &
+ (1 << (i % IX_OSAL_BUFF_FREE_BITS)))
+ i++;
+ /*
+ * Free buffer found. Mark it as busy and initialize.
+ */
+ ixOsalBuffFreePools[i / IX_OSAL_BUFF_FREE_BITS] |=
+ (1 << (i % IX_OSAL_BUFF_FREE_BITS));
+
+ memset (&ixOsalBuffPools[i], 0, sizeof (IX_OSAL_MBUF_POOL));
+
+ ixOsalBuffPools[i].poolIdx = i;
+ ixOsalBuffPoolsInUse++;
+
+ return &ixOsalBuffPools[i];
+}
+
+
+#ifdef IX_OSAL_BUFFER_ALLOC_SEPARATELY
+PRIVATE IX_OSAL_MBUF *
+ixOsalBuffPoolMbufInit (UINT32 mbufSizeAligned,
+ UINT32 dataSizeAligned,
+ IX_OSAL_MBUF_POOL *poolPtr)
+{
+ UINT8 *dataPtr;
+ IX_OSAL_MBUF *realMbufPtr;
+ /* Allocate cache-aligned memory for mbuf header */
+ realMbufPtr = (IX_OSAL_MBUF *) IX_OSAL_CACHE_DMA_MALLOC (mbufSizeAligned);
+ IX_OSAL_ASSERT (realMbufPtr != NULL);
+ memset (realMbufPtr, 0, mbufSizeAligned);
+
+ /* Allocate cache-aligned memory for mbuf data */
+ dataPtr = (UINT8 *) IX_OSAL_CACHE_DMA_MALLOC (dataSizeAligned);
+ IX_OSAL_ASSERT (dataPtr != NULL);
+ memset (dataPtr, 0, dataSizeAligned);
+
+ /* Fill in mbuf header fields */
+ IX_OSAL_MBUF_MDATA (realMbufPtr) = dataPtr;
+ IX_OSAL_MBUF_ALLOCATED_BUFF_DATA (realMbufPtr) = (UINT32)dataPtr;
+
+ IX_OSAL_MBUF_MLEN (realMbufPtr) = dataSizeAligned;
+ IX_OSAL_MBUF_ALLOCATED_BUFF_LEN (realMbufPtr) = dataSizeAligned;
+
+ IX_OSAL_MBUF_NET_POOL (realMbufPtr) = (IX_OSAL_MBUF_POOL *) poolPtr;
+
+ IX_OSAL_MBUF_SYS_SIGNATURE_INIT(realMbufPtr);
+
+ /* update some statistical information */
+ poolPtr->mbufMemSize += mbufSizeAligned;
+ poolPtr->dataMemSize += dataSizeAligned;
+
+ return realMbufPtr;
+}
+#endif /* #ifdef IX_OSAL_BUFFER_ALLOC_SEPARATELY */
+
+/*
+ * Function definition: ixOsalBuffPoolInit
+ */
+
+PUBLIC IX_OSAL_MBUF_POOL *
+ixOsalPoolInit (UINT32 count, UINT32 size, const char *name)
+{
+
+ /* These variables are only used if UX_OSAL_BUFFER_ALLOC_SEPERATELY
+ * is defined .
+ */
+#ifdef IX_OSAL_BUFFER_ALLOC_SEPARATELY
+ UINT32 i, mbufSizeAligned, dataSizeAligned;
+ IX_OSAL_MBUF *currentMbufPtr = NULL;
+#else
+ void *poolBufPtr;
+ void *poolDataPtr;
+ int mbufMemSize;
+ int dataMemSize;
+#endif
+
+ IX_OSAL_MBUF_POOL *poolPtr = NULL;
+
+ if (count <= 0)
+ {
+ ixOsalLog (IX_OSAL_LOG_LVL_ERROR,
+ IX_OSAL_LOG_DEV_STDOUT,
+ "ixOsalPoolInit(): " "count = 0 \n", 0, 0, 0, 0, 0, 0);
+ return NULL;
+ }
+
+ if (name == NULL)
+ {
+ ixOsalLog (IX_OSAL_LOG_LVL_ERROR,
+ IX_OSAL_LOG_DEV_STDOUT,
+ "ixOsalPoolInit(): " "NULL name \n", 0, 0, 0, 0, 0, 0);
+ return NULL;
+ }
+
+ if (strlen (name) > IX_OSAL_MBUF_POOL_NAME_LEN)
+ {
+ ixOsalLog (IX_OSAL_LOG_LVL_ERROR,
+ IX_OSAL_LOG_DEV_STDOUT,
+ "ixOsalPoolInit(): "
+ "ERROR - name length should be no greater than %d \n",
+ IX_OSAL_MBUF_POOL_NAME_LEN, 0, 0, 0, 0, 0);
+ return NULL;
+ }
+
+/* OS can choose whether to allocate all buffers all together (if it
+ * can handle a huge single alloc request), or to allocate buffers
+ * separately by the defining IX_OSAL_BUFFER_ALLOC_SEPARATELY.
+ */
+#ifdef IX_OSAL_BUFFER_ALLOC_SEPARATELY
+ /* Get a pool Ptr */
+ poolPtr = ixOsalPoolAlloc ();
+
+ if (poolPtr == NULL)
+ {
+ ixOsalLog (IX_OSAL_LOG_LVL_ERROR,
+ IX_OSAL_LOG_DEV_STDOUT,
+ "ixOsalPoolInit(): " "Fail to Get PoolPtr \n", 0, 0, 0, 0, 0, 0);
+ return NULL;
+ }
+
+ mbufSizeAligned = IX_OSAL_MBUF_POOL_SIZE_ALIGN (sizeof (IX_OSAL_MBUF));
+ dataSizeAligned = IX_OSAL_MBUF_POOL_SIZE_ALIGN(size);
+
+ poolPtr->nextFreeBuf = NULL;
+ poolPtr->mbufMemPtr = NULL;
+ poolPtr->dataMemPtr = NULL;
+ poolPtr->bufDataSize = dataSizeAligned;
+ poolPtr->totalBufsInPool = count;
+ poolPtr->poolAllocType = IX_OSAL_MBUF_POOL_TYPE_SYS_ALLOC;
+ strcpy (poolPtr->name, name);
+
+
+ for (i = 0; i < count; i++)
+ {
+ /* create an mbuf */
+ currentMbufPtr = ixOsalBuffPoolMbufInit (mbufSizeAligned,
+ dataSizeAligned,
+ poolPtr);
+
+#ifdef IX_OSAL_BUFFER_FREE_PROTECTION
+/* Set the Buffer USED Flag. If not, ixOsalMBufFree will fail.
+ ixOsalMbufFree used here is in a special case whereby, it's
+ used to add MBUF to the Pool. By specification, ixOsalMbufFree
+ deallocates an allocated MBUF from Pool.
+*/
+ IX_OSAL_MBUF_SET_USED_FLAG(currentMbufPtr);
+#endif
+ /* Add it to the pool */
+ ixOsalMbufFree (currentMbufPtr);
+
+ /* flush the pool information to RAM */
+ IX_OSAL_CACHE_FLUSH (currentMbufPtr, mbufSizeAligned);
+ }
+
+ /*
+ * update the number of free buffers in the pool
+ */
+ poolPtr->freeBufsInPool = count;
+
+#else
+/* Otherwise allocate buffers in a continuous block fashion */
+ poolBufPtr = IX_OSAL_MBUF_POOL_MBUF_AREA_ALLOC (count, mbufMemSize);
+ IX_OSAL_ASSERT (poolBufPtr != NULL);
+ poolDataPtr =
+ IX_OSAL_MBUF_POOL_DATA_AREA_ALLOC (count, size, dataMemSize);
+ IX_OSAL_ASSERT (poolDataPtr != NULL);
+
+ poolPtr = ixOsalNoAllocPoolInit (poolBufPtr, poolDataPtr,
+ count, size, name);
+ if (poolPtr == NULL)
+ {
+ ixOsalLog (IX_OSAL_LOG_LVL_ERROR,
+ IX_OSAL_LOG_DEV_STDOUT,
+ "ixOsalPoolInit(): " "Fail to get pool ptr \n", 0, 0, 0, 0, 0, 0);
+ return NULL;
+ }
+
+ poolPtr->poolAllocType = IX_OSAL_MBUF_POOL_TYPE_SYS_ALLOC;
+
+#endif /* IX_OSAL_BUFFER_ALLOC_SEPARATELY */
+ return poolPtr;
+}
+
+PUBLIC IX_OSAL_MBUF_POOL *
+ixOsalNoAllocPoolInit (void *poolBufPtr,
+ void *poolDataPtr, UINT32 count, UINT32 size, const char *name)
+{
+ UINT32 i, mbufSizeAligned, sizeAligned;
+ IX_OSAL_MBUF *currentMbufPtr = NULL;
+ IX_OSAL_MBUF *nextMbufPtr = NULL;
+ IX_OSAL_MBUF_POOL *poolPtr = NULL;
+
+ /*
+ * check parameters
+ */
+ if (poolBufPtr == NULL)
+ {
+ ixOsalLog (IX_OSAL_LOG_LVL_ERROR,
+ IX_OSAL_LOG_DEV_STDOUT,
+ "ixOsalNoAllocPoolInit(): "
+ "ERROR - NULL poolBufPtr \n", 0, 0, 0, 0, 0, 0);
+ return NULL;
+ }
+
+ if (count <= 0)
+ {
+ ixOsalLog (IX_OSAL_LOG_LVL_ERROR,
+ IX_OSAL_LOG_DEV_STDOUT,
+ "ixOsalNoAllocPoolInit(): "
+ "ERROR - count must > 0 \n", 0, 0, 0, 0, 0, 0);
+ return NULL;
+ }
+
+ if (name == NULL)
+ {
+ ixOsalLog (IX_OSAL_LOG_LVL_ERROR,
+ IX_OSAL_LOG_DEV_STDOUT,
+ "ixOsalNoAllocPoolInit(): "
+ "ERROR - NULL name ptr \n", 0, 0, 0, 0, 0, 0);
+ return NULL;
+ }
+
+ if (strlen (name) > IX_OSAL_MBUF_POOL_NAME_LEN)
+ {
+ ixOsalLog (IX_OSAL_LOG_LVL_ERROR,
+ IX_OSAL_LOG_DEV_STDOUT,
+ "ixOsalNoAllocPoolInit(): "
+ "ERROR - name length should be no greater than %d \n",
+ IX_OSAL_MBUF_POOL_NAME_LEN, 0, 0, 0, 0, 0);
+ return NULL;
+ }
+
+ poolPtr = ixOsalPoolAlloc ();
+
+ if (poolPtr == NULL)
+ {
+ return NULL;
+ }
+
+ /*
+ * Adjust sizes to ensure alignment on cache line boundaries
+ */
+ mbufSizeAligned =
+ IX_OSAL_MBUF_POOL_SIZE_ALIGN (sizeof (IX_OSAL_MBUF));
+ /*
+ * clear the mbuf memory area
+ */
+ memset (poolBufPtr, 0, mbufSizeAligned * count);
+
+ if (poolDataPtr != NULL)
+ {
+ /*
+ * Adjust sizes to ensure alignment on cache line boundaries
+ */
+ sizeAligned = IX_OSAL_MBUF_POOL_SIZE_ALIGN (size);
+ /*
+ * clear the data memory area
+ */
+ memset (poolDataPtr, 0, sizeAligned * count);
+ }
+ else
+ {
+ sizeAligned = 0;
+ }
+
+ /*
+ * initialise pool fields
+ */
+ strcpy ((poolPtr)->name, name);
+
+ poolPtr->dataMemPtr = poolDataPtr;
+ poolPtr->mbufMemPtr = poolBufPtr;
+ poolPtr->bufDataSize = sizeAligned;
+ poolPtr->totalBufsInPool = count;
+ poolPtr->mbufMemSize = mbufSizeAligned * count;
+ poolPtr->dataMemSize = sizeAligned * count;
+
+ currentMbufPtr = (IX_OSAL_MBUF *) poolBufPtr;
+
+ poolPtr->nextFreeBuf = currentMbufPtr;
+
+ for (i = 0; i < count; i++)
+ {
+ if (i < (count - 1))
+ {
+ nextMbufPtr =
+ (IX_OSAL_MBUF *) ((unsigned) currentMbufPtr +
+ mbufSizeAligned);
+ }
+ else
+ { /* last mbuf in chain */
+ nextMbufPtr = NULL;
+ }
+ IX_OSAL_MBUF_NEXT_BUFFER_IN_PKT_PTR (currentMbufPtr) = nextMbufPtr;
+ IX_OSAL_MBUF_NET_POOL (currentMbufPtr) = poolPtr;
+
+ IX_OSAL_MBUF_SYS_SIGNATURE_INIT(currentMbufPtr);
+
+ if (poolDataPtr != NULL)
+ {
+ IX_OSAL_MBUF_MDATA (currentMbufPtr) = poolDataPtr;
+ IX_OSAL_MBUF_ALLOCATED_BUFF_DATA(currentMbufPtr) = (UINT32) poolDataPtr;
+
+ IX_OSAL_MBUF_MLEN (currentMbufPtr) = sizeAligned;
+ IX_OSAL_MBUF_ALLOCATED_BUFF_LEN(currentMbufPtr) = sizeAligned;
+
+ poolDataPtr = (void *) ((unsigned) poolDataPtr + sizeAligned);
+ }
+
+ currentMbufPtr = nextMbufPtr;
+ }
+
+ /*
+ * update the number of free buffers in the pool
+ */
+ poolPtr->freeBufsInPool = count;
+
+ poolPtr->poolAllocType = IX_OSAL_MBUF_POOL_TYPE_USER_ALLOC;
+
+ return poolPtr;
+}
+
+/*
+ * Get a mbuf ptr from the pool
+ */
+PUBLIC IX_OSAL_MBUF *
+ixOsalMbufAlloc (IX_OSAL_MBUF_POOL * poolPtr)
+{
+ int lock;
+ IX_OSAL_MBUF *newBufPtr = NULL;
+
+ /*
+ * check parameters
+ */
+ if (poolPtr == NULL)
+ {
+ ixOsalLog (IX_OSAL_LOG_LVL_ERROR,
+ IX_OSAL_LOG_DEV_STDOUT,
+ "ixOsalMbufAlloc(): "
+ "ERROR - Invalid Parameter\n", 0, 0, 0, 0, 0, 0);
+ return NULL;
+ }
+
+ lock = ixOsalIrqLock ();
+
+ newBufPtr = poolPtr->nextFreeBuf;
+ if (newBufPtr)
+ {
+ poolPtr->nextFreeBuf =
+ IX_OSAL_MBUF_NEXT_BUFFER_IN_PKT_PTR (newBufPtr);
+ IX_OSAL_MBUF_NEXT_BUFFER_IN_PKT_PTR (newBufPtr) = NULL;
+
+ /*
+ * update the number of free buffers in the pool
+ */
+ poolPtr->freeBufsInPool--;
+ }
+ else
+ {
+ /* Return NULL to indicate to caller that request is denied. */
+ ixOsalIrqUnlock (lock);
+
+ return NULL;
+ }
+
+#ifdef IX_OSAL_BUFFER_FREE_PROTECTION
+ /* Set Buffer Used Flag to indicate state.*/
+ IX_OSAL_MBUF_SET_USED_FLAG(newBufPtr);
+#endif
+
+ ixOsalIrqUnlock (lock);
+
+ return newBufPtr;
+}
+
+PUBLIC IX_OSAL_MBUF *
+ixOsalMbufFree (IX_OSAL_MBUF * bufPtr)
+{
+ int lock;
+ IX_OSAL_MBUF_POOL *poolPtr;
+
+ IX_OSAL_MBUF *nextBufPtr = NULL;
+
+ /*
+ * check parameters
+ */
+ if (bufPtr == NULL)
+ {
+ ixOsalLog (IX_OSAL_LOG_LVL_ERROR,
+ IX_OSAL_LOG_DEV_STDOUT,
+ "ixOsalMbufFree(): "
+ "ERROR - Invalid Parameter\n", 0, 0, 0, 0, 0, 0);
+ return NULL;
+ }
+
+
+
+ lock = ixOsalIrqLock ();
+
+#ifdef IX_OSAL_BUFFER_FREE_PROTECTION
+
+ /* Prevention for Buffer freed more than once*/
+ if(!IX_OSAL_MBUF_ISSET_USED_FLAG(bufPtr))
+ {
+ return NULL;
+ }
+ IX_OSAL_MBUF_CLEAR_USED_FLAG(bufPtr);
+#endif
+
+ poolPtr = IX_OSAL_MBUF_NET_POOL (bufPtr);
+
+ /*
+ * check the mbuf wrapper signature (if mbuf wrapper was used)
+ */
+ if (poolPtr->poolAllocType == IX_OSAL_MBUF_POOL_TYPE_SYS_ALLOC)
+ {
+ IX_OSAL_ENSURE ( (IX_OSAL_MBUF_GET_SYS_SIGNATURE(bufPtr) == IX_OSAL_MBUF_SYS_SIGNATURE),
+ "ixOsalBuffPoolBufFree: ERROR - Invalid mbuf signature.");
+ }
+
+ nextBufPtr = IX_OSAL_MBUF_NEXT_BUFFER_IN_PKT_PTR (bufPtr);
+
+ IX_OSAL_MBUF_NEXT_BUFFER_IN_PKT_PTR (bufPtr) = poolPtr->nextFreeBuf;
+ poolPtr->nextFreeBuf = bufPtr;
+
+ /*
+ * update the number of free buffers in the pool
+ */
+ poolPtr->freeBufsInPool++;
+
+ ixOsalIrqUnlock (lock);
+
+ return nextBufPtr;
+}
+
+PUBLIC void
+ixOsalMbufChainFree (IX_OSAL_MBUF * bufPtr)
+{
+ while ((bufPtr = ixOsalMbufFree (bufPtr)));
+}
+
+/*
+ * Function definition: ixOsalBuffPoolShow
+ */
+PUBLIC void
+ixOsalMbufPoolShow (IX_OSAL_MBUF_POOL * poolPtr)
+{
+ IX_OSAL_MBUF *nextBufPtr;
+ int count = 0;
+ int lock;
+
+ /*
+ * check parameters
+ */
+ if (poolPtr == NULL)
+ {
+ ixOsalLog (IX_OSAL_LOG_LVL_ERROR,
+ IX_OSAL_LOG_DEV_STDOUT,
+ "ixOsalBuffPoolShow(): "
+ "ERROR - Invalid Parameter", 0, 0, 0, 0, 0, 0);
+ /*
+ * return IX_FAIL;
+ */
+ return;
+ }
+
+ lock = ixOsalIrqLock ();
+ count = poolPtr->freeBufsInPool;
+ nextBufPtr = poolPtr->nextFreeBuf;
+ ixOsalIrqUnlock (lock);
+
+ ixOsalLog (IX_OSAL_LOG_LVL_MESSAGE,
+ IX_OSAL_LOG_DEV_STDOUT, "=== POOL INFORMATION ===\n", 0, 0, 0,
+ 0, 0, 0);
+ ixOsalLog (IX_OSAL_LOG_LVL_MESSAGE, IX_OSAL_LOG_DEV_STDOUT,
+ "Pool Name: %s\n",
+ (unsigned int) poolPtr->name, 0, 0, 0, 0, 0);
+ ixOsalLog (IX_OSAL_LOG_LVL_MESSAGE, IX_OSAL_LOG_DEV_STDOUT,
+ "Pool Allocation Type: %d\n",
+ (unsigned int) poolPtr->poolAllocType, 0, 0, 0, 0, 0);
+ ixOsalLog (IX_OSAL_LOG_LVL_MESSAGE, IX_OSAL_LOG_DEV_STDOUT,
+ "Pool Mbuf Mem Usage (bytes): %d\n",
+ (unsigned int) poolPtr->mbufMemSize, 0, 0, 0, 0, 0);
+ ixOsalLog (IX_OSAL_LOG_LVL_MESSAGE, IX_OSAL_LOG_DEV_STDOUT,
+ "Pool Data Mem Usage (bytes): %d\n",
+ (unsigned int) poolPtr->dataMemSize, 0, 0, 0, 0, 0);
+ ixOsalLog (IX_OSAL_LOG_LVL_MESSAGE, IX_OSAL_LOG_DEV_STDOUT,
+ "Mbuf Data Capacity (bytes): %d\n",
+ (unsigned int) poolPtr->bufDataSize, 0, 0, 0, 0, 0);
+ ixOsalLog (IX_OSAL_LOG_LVL_MESSAGE, IX_OSAL_LOG_DEV_STDOUT,
+ "Total Mbufs in Pool: %d\n",
+ (unsigned int) poolPtr->totalBufsInPool, 0, 0, 0, 0, 0);
+ ixOsalLog (IX_OSAL_LOG_LVL_MESSAGE, IX_OSAL_LOG_DEV_STDOUT,
+ "Available Mbufs: %d\n", (unsigned int) count, 0,
+ 0, 0, 0, 0);
+ ixOsalLog (IX_OSAL_LOG_LVL_MESSAGE, IX_OSAL_LOG_DEV_STDOUT,
+ "Next Available Mbuf: %p\n", (unsigned int) nextBufPtr,
+ 0, 0, 0, 0, 0);
+
+ if (poolPtr->poolAllocType == IX_OSAL_MBUF_POOL_TYPE_USER_ALLOC)
+ {
+ ixOsalLog (IX_OSAL_LOG_LVL_MESSAGE,
+ IX_OSAL_LOG_DEV_STDOUT,
+ "Mbuf Mem Area Start address: %p\n",
+ (unsigned int) poolPtr->mbufMemPtr, 0, 0, 0, 0, 0);
+ ixOsalLog (IX_OSAL_LOG_LVL_MESSAGE, IX_OSAL_LOG_DEV_STDOUT,
+ "Data Mem Area Start address: %p\n",
+ (unsigned int) poolPtr->dataMemPtr, 0, 0, 0, 0, 0);
+ }
+}
+
+PUBLIC void
+ixOsalMbufDataPtrReset (IX_OSAL_MBUF * bufPtr)
+{
+ IX_OSAL_MBUF_POOL *poolPtr;
+ UINT8 *poolDataPtr;
+
+ if (bufPtr == NULL)
+ {
+ ixOsalLog (IX_OSAL_LOG_LVL_ERROR, IX_OSAL_LOG_DEV_STDOUT,
+ "ixOsalBuffPoolBufDataPtrReset"
+ ": ERROR - Invalid Parameter\n", 0, 0, 0, 0, 0, 0);
+ return;
+ }
+
+ poolPtr = (IX_OSAL_MBUF_POOL *) IX_OSAL_MBUF_NET_POOL (bufPtr);
+ poolDataPtr = poolPtr->dataMemPtr;
+
+ if (poolPtr->poolAllocType == IX_OSAL_MBUF_POOL_TYPE_SYS_ALLOC)
+ {
+ if (IX_OSAL_MBUF_GET_SYS_SIGNATURE(bufPtr) != IX_OSAL_MBUF_SYS_SIGNATURE)
+ {
+ ixOsalLog (IX_OSAL_LOG_LVL_ERROR, IX_OSAL_LOG_DEV_STDOUT,
+ "ixOsalBuffPoolBufDataPtrReset"
+ ": invalid mbuf, cannot reset mData pointer\n", 0, 0,
+ 0, 0, 0, 0);
+ return;
+ }
+ IX_OSAL_MBUF_MDATA (bufPtr) = (UINT8*)IX_OSAL_MBUF_ALLOCATED_BUFF_DATA (bufPtr);
+ }
+ else
+ {
+ if (poolDataPtr)
+ {
+ unsigned int bufSize = poolPtr->bufDataSize;
+ unsigned int bufDataAddr =
+ (unsigned int) IX_OSAL_MBUF_MDATA (bufPtr);
+ unsigned int poolDataAddr = (unsigned int) poolDataPtr;
+
+ /*
+ * the pointer is still pointing somewhere in the mbuf payload.
+ * This operation moves the pointer to the beginning of the
+ * mbuf payload
+ */
+ bufDataAddr = ((bufDataAddr - poolDataAddr) / bufSize) * bufSize;
+ IX_OSAL_MBUF_MDATA (bufPtr) = &poolDataPtr[bufDataAddr];
+ }
+ else
+ {
+ ixOsalLog (IX_OSAL_LOG_LVL_WARNING, IX_OSAL_LOG_DEV_STDOUT,
+ "ixOsalBuffPoolBufDataPtrReset"
+ ": cannot be used if user supplied NULL pointer for pool data area "
+ "when pool was created\n", 0, 0, 0, 0, 0, 0);
+ return;
+ }
+ }
+
+}
+
+/*
+ * Function definition: ixOsalBuffPoolUninit
+ */
+PUBLIC IX_STATUS
+ixOsalBuffPoolUninit (IX_OSAL_MBUF_POOL * pool)
+{
+ if (!pool)
+ {
+ ixOsalLog (IX_OSAL_LOG_LVL_ERROR, IX_OSAL_LOG_DEV_STDOUT,
+ "ixOsalBuffPoolUninit: NULL ptr \n", 0, 0, 0, 0, 0, 0);
+ return IX_FAIL;
+ }
+
+ if (pool->freeBufsInPool != pool->totalBufsInPool)
+ {
+ ixOsalLog (IX_OSAL_LOG_LVL_ERROR, IX_OSAL_LOG_DEV_STDOUT,
+ "ixOsalBuffPoolUninit: need to return all ptrs to the pool first! \n",
+ 0, 0, 0, 0, 0, 0);
+ return IX_FAIL;
+ }
+
+ if (pool->poolAllocType == IX_OSAL_MBUF_POOL_TYPE_SYS_ALLOC)
+ {
+#ifdef IX_OSAL_BUFFER_ALLOC_SEPARATELY
+ UINT32 i;
+ IX_OSAL_MBUF* pBuf;
+
+ pBuf = pool->nextFreeBuf;
+ /* Freed the Buffer one by one till all the Memory is freed*/
+ for (i= pool->freeBufsInPool; i >0 && pBuf!=NULL ;i--){
+ IX_OSAL_MBUF* pBufTemp;
+ pBufTemp = IX_OSAL_MBUF_NEXT_BUFFER_IN_PKT_PTR(pBuf);
+ /* Freed MBUF Data Memory area*/
+ IX_OSAL_CACHE_DMA_FREE( (void *) (IX_OSAL_MBUF_ALLOCATED_BUFF_DATA(pBuf)) );
+ /* Freed MBUF Struct Memory area*/
+ IX_OSAL_CACHE_DMA_FREE(pBuf);
+ pBuf = pBufTemp;
+ }
+
+#else
+ IX_OSAL_CACHE_DMA_FREE (pool->mbufMemPtr);
+ IX_OSAL_CACHE_DMA_FREE (pool->dataMemPtr);
+#endif
+ }
+
+ ixOsalBuffFreePools[pool->poolIdx / IX_OSAL_BUFF_FREE_BITS] &=
+ ~(1 << (pool->poolIdx % IX_OSAL_BUFF_FREE_BITS));
+ ixOsalBuffPoolsInUse--;
+ return IX_SUCCESS;
+}
+
+/*
+ * Function definition: ixOsalBuffPoolDataAreaSizeGet
+ */
+PUBLIC UINT32
+ixOsalBuffPoolDataAreaSizeGet (int count, int size)
+{
+ UINT32 memorySize;
+ memorySize = count * IX_OSAL_MBUF_POOL_SIZE_ALIGN (size);
+ return memorySize;
+}
+
+/*
+ * Function definition: ixOsalBuffPoolMbufAreaSizeGet
+ */
+PUBLIC UINT32
+ixOsalBuffPoolMbufAreaSizeGet (int count)
+{
+ UINT32 memorySize;
+ memorySize =
+ count * IX_OSAL_MBUF_POOL_SIZE_ALIGN (sizeof (IX_OSAL_MBUF));
+ return memorySize;
+}
+
+/*
+ * Function definition: ixOsalBuffPoolFreeCountGet
+ */
+PUBLIC UINT32 ixOsalBuffPoolFreeCountGet(IX_OSAL_MBUF_POOL * poolPtr)
+
+{
+
+ return poolPtr->freeBufsInPool;
+
+}
+
+#endif /* IX_OSAL_USE_DEFAULT_BUFFER_MGT */
diff --git a/cpu/ixp/npe/IxOsalIoMem.c b/cpu/ixp/npe/IxOsalIoMem.c
new file mode 100644
index 0000000000..9e540c18e0
--- /dev/null
+++ b/cpu/ixp/npe/IxOsalIoMem.c
@@ -0,0 +1,332 @@
+/**
+ * @file IxOsalIoMem.c
+ *
+ * @brief OS-independent IO/Mem implementation
+ *
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+/* Access to the global mem map is only allowed in this file */
+#define IxOsalIoMem_C
+
+#include "IxOsal.h"
+
+#define SEARCH_PHYSICAL_ADDRESS (1)
+#define SEARCH_VIRTUAL_ADDRESS (2)
+
+/*
+ * Searches for map using one of the following criteria:
+ *
+ * - enough room to include a zone starting with the physical "requestedAddress" of size "size" (for mapping)
+ * - includes the virtual "requestedAddress" in its virtual address space (already mapped, for unmapping)
+ * - correct coherency
+ *
+ * Returns a pointer to the map or NULL if a suitable map is not found.
+ */
+PRIVATE IxOsalMemoryMap *
+ixOsalMemMapFind (UINT32 requestedAddress,
+ UINT32 size, UINT32 searchCriteria, UINT32 requestedEndianType)
+{
+ UINT32 mapIndex;
+
+ UINT32 numMapElements =
+ sizeof (ixOsalGlobalMemoryMap) / sizeof (IxOsalMemoryMap);
+
+ for (mapIndex = 0; mapIndex < numMapElements; mapIndex++)
+ {
+ IxOsalMemoryMap *map = &ixOsalGlobalMemoryMap[mapIndex];
+
+ if (searchCriteria == SEARCH_PHYSICAL_ADDRESS
+ && requestedAddress >= map->physicalAddress
+ && (requestedAddress + size) <= (map->physicalAddress + map->size)
+ && (map->mapEndianType & requestedEndianType) != 0)
+ {
+ return map;
+ }
+ else if (searchCriteria == SEARCH_VIRTUAL_ADDRESS
+ && requestedAddress >= map->virtualAddress
+ && requestedAddress <= (map->virtualAddress + map->size)
+ && (map->mapEndianType & requestedEndianType) != 0)
+ {
+ return map;
+ }
+ else if (searchCriteria == SEARCH_PHYSICAL_ADDRESS)
+ {
+ ixOsalLog (IX_OSAL_LOG_LVL_DEBUG3,
+ IX_OSAL_LOG_DEV_STDOUT,
+ "Osal: Checking [phys addr 0x%x:size 0x%x:endianType %d]\n",
+ map->physicalAddress, map->size, map->mapEndianType, 0, 0, 0);
+ }
+ }
+
+ /*
+ * not found
+ */
+ return NULL;
+}
+
+/*
+ * This function maps an I/O mapped physical memory zone of the given size
+ * into a virtual memory zone accessible by the caller and returns a cookie -
+ * the start address of the virtual memory zone.
+ * IX_OSAL_MMAP_PHYS_TO_VIRT should NOT therefore be used on the returned
+ * virtual address.
+ * The memory zone is to be unmapped using ixOsalMemUnmap once the caller has
+ * finished using this zone (e.g. on driver unload) using the cookie as
+ * parameter.
+ * The IX_OSAL_READ/WRITE_LONG/SHORT macros should be used to read and write
+ * the mapped memory, adding the necessary offsets to the address cookie.
+ *
+ * Note: this function is not to be used directly. Use IX_OSAL_MEM_MAP
+ * instead.
+ */
+PUBLIC void *
+ixOsalIoMemMap (UINT32 requestedAddress,
+ UINT32 size, IxOsalMapEndianessType requestedEndianType)
+{
+ IxOsalMemoryMap *map;
+
+ ixOsalLog (IX_OSAL_LOG_LVL_DEBUG3,
+ IX_OSAL_LOG_DEV_STDOUT,
+ "OSAL: Mapping [addr 0x%x:size 0x%x:endianType %d]\n",
+ requestedAddress, size, requestedEndianType, 0, 0, 0);
+
+ if (requestedEndianType == IX_OSAL_LE)
+ {
+ ixOsalLog (IX_OSAL_LOG_LVL_ERROR,
+ IX_OSAL_LOG_DEV_STDOUT,
+ "ixOsalIoMemMap: Please specify component coherency mode to use MEM functions \n",
+ 0, 0, 0, 0, 0, 0);
+ return (NULL);
+ }
+ map = ixOsalMemMapFind (requestedAddress,
+ size, SEARCH_PHYSICAL_ADDRESS, requestedEndianType);
+ if (map != NULL)
+ {
+ UINT32 offset = requestedAddress - map->physicalAddress;
+
+ ixOsalLog (IX_OSAL_LOG_LVL_DEBUG3,
+ IX_OSAL_LOG_DEV_STDOUT, "OSAL: Found map [", 0, 0, 0, 0, 0, 0);
+ ixOsalLog (IX_OSAL_LOG_LVL_DEBUG3,
+ IX_OSAL_LOG_DEV_STDOUT, map->name, 0, 0, 0, 0, 0, 0);
+ ixOsalLog (IX_OSAL_LOG_LVL_DEBUG3,
+ IX_OSAL_LOG_DEV_STDOUT,
+ ":addr 0x%x: virt 0x%x:size 0x%x:ref %d:endianType %d]\n",
+ map->physicalAddress, map->virtualAddress,
+ map->size, map->refCount, map->mapEndianType, 0);
+
+ if (map->type == IX_OSAL_DYNAMIC_MAP && map->virtualAddress == 0)
+ {
+ if (map->mapFunction != NULL)
+ {
+ map->mapFunction (map);
+
+ if (map->virtualAddress == 0)
+ {
+ /*
+ * failed
+ */
+ ixOsalLog (IX_OSAL_LOG_LVL_FATAL,
+ IX_OSAL_LOG_DEV_STDERR,
+ "OSAL: Remap failed - [addr 0x%x:size 0x%x:endianType %d]\n",
+ requestedAddress, size, requestedEndianType, 0, 0, 0);
+ return NULL;
+ }
+ }
+ else
+ {
+ /*
+ * error, no map function for a dynamic map
+ */
+ ixOsalLog (IX_OSAL_LOG_LVL_FATAL,
+ IX_OSAL_LOG_DEV_STDERR,
+ "OSAL: No map function for a dynamic map - "
+ "[addr 0x%x:size 0x%x:endianType %d]\n",
+ requestedAddress, size, requestedEndianType, 0, 0, 0);
+
+ return NULL;
+ }
+ }
+
+ /*
+ * increment reference count
+ */
+ map->refCount++;
+
+ return (void *) (map->virtualAddress + offset);
+ }
+
+ /*
+ * requested address is not described in the global memory map
+ */
+ ixOsalLog (IX_OSAL_LOG_LVL_FATAL,
+ IX_OSAL_LOG_DEV_STDERR,
+ "OSAL: No mapping found - [addr 0x%x:size 0x%x:endianType %d]\n",
+ requestedAddress, size, requestedEndianType, 0, 0, 0);
+ return NULL;
+}
+
+/*
+ * This function unmaps a previously mapped I/O memory zone using
+ * the cookie obtained in the mapping operation. The memory zone in question
+ * becomes unavailable to the caller once unmapped and the cookie should be
+ * discarded.
+ *
+ * This function cannot fail if the given parameter is correct and does not
+ * return a value.
+ *
+ * Note: this function is not to be used directly. Use IX_OSAL_MEM_UNMAP
+ * instead.
+ */
+PUBLIC void
+ixOsalIoMemUnmap (UINT32 requestedAddress, UINT32 endianType)
+{
+ IxOsalMemoryMap *map;
+
+ if (endianType == IX_OSAL_LE)
+ {
+ ixOsalLog (IX_OSAL_LOG_LVL_ERROR,
+ IX_OSAL_LOG_DEV_STDOUT,
+ "ixOsalIoMemUnmap: Please specify component coherency mode to use MEM functions \n",
+ 0, 0, 0, 0, 0, 0);
+ return;
+ }
+
+ if (requestedAddress == 0)
+ {
+ /*
+ * invalid virtual address
+ */
+ return;
+ }
+
+ map =
+ ixOsalMemMapFind (requestedAddress, 0, SEARCH_VIRTUAL_ADDRESS,
+ endianType);
+
+ if (map != NULL)
+ {
+ if (map->refCount > 0)
+ {
+ /*
+ * decrement reference count
+ */
+ map->refCount--;
+
+ if (map->refCount == 0)
+ {
+ /*
+ * no longer used, deallocate
+ */
+ if (map->type == IX_OSAL_DYNAMIC_MAP
+ && map->unmapFunction != NULL)
+ {
+ map->unmapFunction (map);
+ }
+ }
+ }
+ }
+ else
+ {
+ ixOsalLog (IX_OSAL_LOG_LVL_WARNING,
+ IX_OSAL_LOG_DEV_STDERR,
+ "OSAL: ixOsServMemUnmap didn't find the requested map "
+ "[virt addr 0x%x: endianType %d], ignoring call\n",
+ requestedAddress, endianType, 0, 0, 0, 0);
+ }
+}
+
+/*
+ * This function Converts a virtual address into a physical
+ * address, including the dynamically mapped memory.
+ *
+ * Parameters virtAddr - virtual address to convert
+ * Return value: corresponding physical address, or NULL
+ * if there is no physical address addressable
+ * by the given virtual address
+ * OS: VxWorks, Linux, WinCE, QNX, eCos
+ * Reentrant: Yes
+ * IRQ safe: Yes
+ */
+PUBLIC UINT32
+ixOsalIoMemVirtToPhys (UINT32 virtualAddress, UINT32 requestedCoherency)
+{
+ IxOsalMemoryMap *map =
+ ixOsalMemMapFind (virtualAddress, 0, SEARCH_VIRTUAL_ADDRESS,
+ requestedCoherency);
+
+ if (map != NULL)
+ {
+ return map->physicalAddress + virtualAddress - map->virtualAddress;
+ }
+ else
+ {
+ return (UINT32) IX_OSAL_MMU_VIRT_TO_PHYS (virtualAddress);
+ }
+}
+
+/*
+ * This function Converts a virtual address into a physical
+ * address, including the dynamically mapped memory.
+ *
+ * Parameters virtAddr - virtual address to convert
+ * Return value: corresponding physical address, or NULL
+ * if there is no physical address addressable
+ * by the given virtual address
+ * OS: VxWorks, Linux, WinCE, QNX, eCos
+ * Reentrant: Yes
+ * IRQ safe: Yes
+ */
+PUBLIC UINT32
+ixOsalIoMemPhysToVirt (UINT32 physicalAddress, UINT32 requestedCoherency)
+{
+ IxOsalMemoryMap *map =
+ ixOsalMemMapFind (physicalAddress, 0, SEARCH_PHYSICAL_ADDRESS,
+ requestedCoherency);
+
+ if (map != NULL)
+ {
+ return map->virtualAddress + physicalAddress - map->physicalAddress;
+ }
+ else
+ {
+ return (UINT32) IX_OSAL_MMU_PHYS_TO_VIRT (physicalAddress);
+ }
+}
diff --git a/cpu/ixp/npe/IxOsalOsCacheMMU.c b/cpu/ixp/npe/IxOsalOsCacheMMU.c
new file mode 100644
index 0000000000..3db1a70da9
--- /dev/null
+++ b/cpu/ixp/npe/IxOsalOsCacheMMU.c
@@ -0,0 +1,67 @@
+/**
+ * @file IxOsalOsCacheMMU.c (linux)
+ *
+ * @brief Cache MemAlloc and MemFree.
+ *
+ *
+ * @par
+ * IXP400 SW Release version 1.5
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+#include "IxOsal.h"
+
+#include <malloc.h>
+
+/*
+ * Allocate on a cache line boundary (null pointers are
+ * not affected by this operation). This operation is NOT cache safe.
+ */
+void *
+ixOsalCacheDmaMalloc (UINT32 n)
+{
+ return malloc(n);
+}
+
+/*
+ *
+ */
+void
+ixOsalCacheDmaFree (void *ptr)
+{
+ free(ptr);
+}
diff --git a/cpu/ixp/npe/IxOsalOsMsgQ.c b/cpu/ixp/npe/IxOsalOsMsgQ.c
new file mode 100644
index 0000000000..45a5c68b16
--- /dev/null
+++ b/cpu/ixp/npe/IxOsalOsMsgQ.c
@@ -0,0 +1,79 @@
+/**
+ * @file IxOsalOsMsgQ.c (eCos)
+ *
+ * @brief OS-specific Message Queue implementation.
+ *
+ *
+ * @par
+ * IXP400 SW Release version 1.5
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+#include "IxOsal.h"
+
+/*******************************
+ * Public functions
+ *******************************/
+PUBLIC IX_STATUS
+ixOsalMessageQueueCreate (IxOsalMessageQueue * queue,
+ UINT32 msgCount, UINT32 msgLen)
+{
+ diag_printf("%s called\n", __FUNCTION__);
+ return IX_FAIL;
+}
+
+PUBLIC IX_STATUS
+ixOsalMessageQueueDelete (IxOsalMessageQueue * queue)
+{
+ diag_printf("%s called\n", __FUNCTION__);
+ return IX_FAIL;
+}
+
+PUBLIC IX_STATUS
+ixOsalMessageQueueSend (IxOsalMessageQueue * queue, UINT8 * message)
+{
+ diag_printf("%s called\n", __FUNCTION__);
+ return IX_FAIL;
+}
+
+PUBLIC IX_STATUS
+ixOsalMessageQueueReceive (IxOsalMessageQueue * queue, UINT8 * message)
+{
+ diag_printf("%s called\n", __FUNCTION__);
+ return IX_FAIL;
+}
+
diff --git a/cpu/ixp/npe/IxOsalOsSemaphore.c b/cpu/ixp/npe/IxOsalOsSemaphore.c
new file mode 100644
index 0000000000..443aefd4fc
--- /dev/null
+++ b/cpu/ixp/npe/IxOsalOsSemaphore.c
@@ -0,0 +1,233 @@
+/**
+ * @file IxOsalOsSemaphore.c (eCos)
+ *
+ * @brief Implementation for semaphore and mutex.
+ *
+ *
+ * @par
+ * IXP400 SW Release version 1.5
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+#include "IxOsal.h"
+#include "IxNpeMhReceive_p.h"
+
+/* Define a large number */
+#define IX_OSAL_MAX_LONG (0x7FFFFFFF)
+
+/* Max timeout in MS, used to guard against possible overflow */
+#define IX_OSAL_MAX_TIMEOUT_MS (IX_OSAL_MAX_LONG/HZ)
+
+
+PUBLIC IX_STATUS
+ixOsalSemaphoreInit (IxOsalSemaphore * sid, UINT32 start_value)
+{
+ diag_printf("%s called\n", __FUNCTION__);
+ return IX_SUCCESS;
+}
+
+/**
+ * DESCRIPTION: If the semaphore is 'empty', the calling thread is blocked.
+ * If the semaphore is 'full', it is taken and control is returned
+ * to the caller. If the time indicated in 'timeout' is reached,
+ * the thread will unblock and return an error indication. If the
+ * timeout is set to 'IX_OSAL_WAIT_NONE', the thread will never block;
+ * if it is set to 'IX_OSAL_WAIT_FOREVER', the thread will block until
+ * the semaphore is available.
+ *
+ *
+ */
+
+
+PUBLIC IX_STATUS
+ixOsalSemaphoreWait (IxOsalOsSemaphore * sid, INT32 timeout)
+{
+ diag_printf("%s called\n", __FUNCTION__);
+ return IX_SUCCESS;
+}
+
+/*
+ * Attempt to get semaphore, return immediately,
+ * no error info because users expect some failures
+ * when using this API.
+ */
+PUBLIC IX_STATUS
+ixOsalSemaphoreTryWait (IxOsalSemaphore * sid)
+{
+ diag_printf("%s called\n", __FUNCTION__);
+ return IX_FAIL;
+}
+
+/**
+ *
+ * DESCRIPTION: This function causes the next available thread in the pend queue
+ * to be unblocked. If no thread is pending on this semaphore, the
+ * semaphore becomes 'full'.
+ */
+PUBLIC IX_STATUS
+ixOsalSemaphorePost (IxOsalSemaphore * sid)
+{
+ diag_printf("%s called\n", __FUNCTION__);
+ return IX_SUCCESS;
+}
+
+PUBLIC IX_STATUS
+ixOsalSemaphoreGetValue (IxOsalSemaphore * sid, UINT32 * value)
+{
+ diag_printf("%s called\n", __FUNCTION__);
+ return IX_FAIL;
+}
+
+PUBLIC IX_STATUS
+ixOsalSemaphoreDestroy (IxOsalSemaphore * sid)
+{
+ diag_printf("%s called\n", __FUNCTION__);
+ return IX_FAIL;
+}
+
+/****************************
+ * Mutex
+ ****************************/
+
+static void drv_mutex_init(IxOsalMutex *mutex)
+{
+ *mutex = 0;
+}
+
+static void drv_mutex_destroy(IxOsalMutex *mutex)
+{
+ *mutex = -1;
+}
+
+static int drv_mutex_trylock(IxOsalMutex *mutex)
+{
+ int result = TRUE;
+
+ if (*mutex == 1)
+ result = FALSE;
+
+ return result;
+}
+
+static void drv_mutex_unlock(IxOsalMutex *mutex)
+{
+ if (*mutex == 1)
+ printf("Trying to unlock unlocked mutex!");
+
+ *mutex = 0;
+}
+
+PUBLIC IX_STATUS
+ixOsalMutexInit (IxOsalMutex * mutex)
+{
+ drv_mutex_init(mutex);
+ return IX_SUCCESS;
+}
+
+PUBLIC IX_STATUS
+ixOsalMutexLock (IxOsalMutex * mutex, INT32 timeout)
+{
+ int tries;
+
+ if (timeout == IX_OSAL_WAIT_NONE) {
+ if (drv_mutex_trylock(mutex))
+ return IX_SUCCESS;
+ else
+ return IX_FAIL;
+ }
+
+ tries = (timeout * 1000) / 50;
+ while (1) {
+ if (drv_mutex_trylock(mutex))
+ return IX_SUCCESS;
+ if (timeout != IX_OSAL_WAIT_FOREVER && tries-- <= 0)
+ break;
+ udelay(50);
+ }
+ return IX_FAIL;
+}
+
+PUBLIC IX_STATUS
+ixOsalMutexUnlock (IxOsalMutex * mutex)
+{
+ drv_mutex_unlock(mutex);
+ return IX_SUCCESS;
+}
+
+/*
+ * Attempt to get mutex, return immediately,
+ * no error info because users expect some failures
+ * when using this API.
+ */
+PUBLIC IX_STATUS
+ixOsalMutexTryLock (IxOsalMutex * mutex)
+{
+ if (drv_mutex_trylock(mutex))
+ return IX_SUCCESS;
+ return IX_FAIL;
+}
+
+PUBLIC IX_STATUS
+ixOsalMutexDestroy (IxOsalMutex * mutex)
+{
+ drv_mutex_destroy(mutex);
+ return IX_SUCCESS;
+}
+
+PUBLIC IX_STATUS
+ixOsalFastMutexInit (IxOsalFastMutex * mutex)
+{
+ return ixOsalMutexInit(mutex);
+}
+
+PUBLIC IX_STATUS ixOsalFastMutexTryLock(IxOsalFastMutex *mutex)
+{
+ return ixOsalMutexTryLock(mutex);
+}
+
+
+PUBLIC IX_STATUS
+ixOsalFastMutexUnlock (IxOsalFastMutex * mutex)
+{
+ return ixOsalMutexUnlock(mutex);
+}
+
+PUBLIC IX_STATUS
+ixOsalFastMutexDestroy (IxOsalFastMutex * mutex)
+{
+ return ixOsalMutexDestroy(mutex);
+}
diff --git a/cpu/ixp/npe/IxOsalOsServices.c b/cpu/ixp/npe/IxOsalOsServices.c
new file mode 100644
index 0000000000..e18c6c4c1e
--- /dev/null
+++ b/cpu/ixp/npe/IxOsalOsServices.c
@@ -0,0 +1,251 @@
+/**
+ * @file IxOsalOsServices.c (linux)
+ *
+ * @brief Implementation for Irq, Mem, sleep.
+ *
+ *
+ * @par
+ * IXP400 SW Release version 1.5
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+#include <config.h>
+#include <common.h>
+#include "IxOsal.h"
+#include <IxEthAcc.h>
+#include <IxEthDB.h>
+#include <IxNpeDl.h>
+#include <IxQMgr.h>
+#include <IxNpeMh.h>
+
+static char *traceHeaders[] = {
+ "",
+ "[fatal] ",
+ "[error] ",
+ "[warning] ",
+ "[message] ",
+ "[debug1] ",
+ "[debug2] ",
+ "[debug3] ",
+ "[all]"
+};
+
+/* by default trace all but debug message */
+PRIVATE int ixOsalCurrLogLevel = IX_OSAL_LOG_LVL_MESSAGE;
+
+/**************************************
+ * Irq services
+ *************************************/
+
+PUBLIC IX_STATUS
+ixOsalIrqBind (UINT32 vector, IxOsalVoidFnVoidPtr routine, void *parameter)
+{
+ return IX_FAIL;
+}
+
+PUBLIC IX_STATUS
+ixOsalIrqUnbind (UINT32 vector)
+{
+ return IX_FAIL;
+}
+
+PUBLIC UINT32
+ixOsalIrqLock ()
+{
+ return 0;
+}
+
+/* Enable interrupts and task scheduling,
+ * input parameter: irqEnable status returned
+ * by ixOsalIrqLock().
+ */
+PUBLIC void
+ixOsalIrqUnlock (UINT32 lockKey)
+{
+}
+
+PUBLIC UINT32
+ixOsalIrqLevelSet (UINT32 level)
+{
+ return IX_FAIL;
+}
+
+PUBLIC void
+ixOsalIrqEnable (UINT32 irqLevel)
+{
+}
+
+PUBLIC void
+ixOsalIrqDisable (UINT32 irqLevel)
+{
+}
+
+/*********************
+ * Log function
+ *********************/
+
+INT32
+ixOsalLog (IxOsalLogLevel level,
+ IxOsalLogDevice device,
+ char *format, int arg1, int arg2, int arg3, int arg4, int arg5, int arg6)
+{
+ /*
+ * Return -1 for custom display devices
+ */
+ if ((device != IX_OSAL_LOG_DEV_STDOUT)
+ && (device != IX_OSAL_LOG_DEV_STDERR))
+ {
+ debug("ixOsalLog: only IX_OSAL_LOG_DEV_STDOUT and IX_OSAL_LOG_DEV_STDERR are supported \n");
+ return (IX_OSAL_LOG_ERROR);
+ }
+
+ if (level <= ixOsalCurrLogLevel && level != IX_OSAL_LOG_LVL_NONE)
+ {
+#if 0 /* sr: U-Boots printf or debug doesn't return a length */
+ int headerByteCount = (level == IX_OSAL_LOG_LVL_USER) ? 0 : diag_printf(traceHeaders[level - 1]);
+
+ return headerByteCount + diag_printf (format, arg1, arg2, arg3, arg4, arg5, arg6);
+#else
+ int headerByteCount = (level == IX_OSAL_LOG_LVL_USER) ? 0 : strlen(traceHeaders[level - 1]);
+
+ return headerByteCount + strlen(format);
+#endif
+ }
+ else
+ {
+ /*
+ * Return error
+ */
+ return (IX_OSAL_LOG_ERROR);
+ }
+}
+
+PUBLIC UINT32
+ixOsalLogLevelSet (UINT32 level)
+{
+ UINT32 oldLevel;
+
+ /*
+ * Check value first
+ */
+ if ((level < IX_OSAL_LOG_LVL_NONE) || (level > IX_OSAL_LOG_LVL_ALL))
+ {
+ ixOsalLog (IX_OSAL_LOG_LVL_MESSAGE,
+ IX_OSAL_LOG_DEV_STDOUT,
+ "ixOsalLogLevelSet: Log Level is between %d and%d \n",
+ IX_OSAL_LOG_LVL_NONE, IX_OSAL_LOG_LVL_ALL, 0, 0, 0, 0);
+ return IX_OSAL_LOG_LVL_NONE;
+ }
+ oldLevel = ixOsalCurrLogLevel;
+
+ ixOsalCurrLogLevel = level;
+
+ return oldLevel;
+}
+
+/**************************************
+ * Task services
+ *************************************/
+
+PUBLIC void
+ixOsalBusySleep (UINT32 microseconds)
+{
+ udelay(microseconds);
+}
+
+PUBLIC void
+ixOsalSleep (UINT32 milliseconds)
+{
+ if (milliseconds != 0) {
+#if 1
+ /*
+ * sr: We poll while we wait because interrupts are off in U-Boot
+ * and CSR expects messages, etc to be dispatched while sleeping.
+ */
+ int i;
+ IxQMgrDispatcherFuncPtr qDispatcherFunc;
+
+ ixQMgrDispatcherLoopGet(&qDispatcherFunc);
+
+ while (milliseconds--) {
+ for (i = 1; i <= 2; i++)
+ ixNpeMhMessagesReceive(i);
+ (*qDispatcherFunc)(IX_QMGR_QUELOW_GROUP);
+
+ udelay(1000);
+ }
+#endif
+ }
+}
+
+/**************************************
+ * Memory functions
+ *************************************/
+
+void *
+ixOsalMemAlloc (UINT32 size)
+{
+ return (void *)0;
+}
+
+void
+ixOsalMemFree (void *ptr)
+{
+}
+
+/*
+ * Copy count bytes from src to dest ,
+ * returns pointer to the dest mem zone.
+ */
+void *
+ixOsalMemCopy (void *dest, void *src, UINT32 count)
+{
+ IX_OSAL_ASSERT (dest != NULL);
+ IX_OSAL_ASSERT (src != NULL);
+ return (memcpy (dest, src, count));
+}
+
+/*
+ * Fills a memory zone with a given constant byte,
+ * returns pointer to the memory zone.
+ */
+void *
+ixOsalMemSet (void *ptr, UINT8 filler, UINT32 count)
+{
+ IX_OSAL_ASSERT (ptr != NULL);
+ return (memset (ptr, filler, count));
+}
diff --git a/cpu/ixp/npe/IxOsalOsThread.c b/cpu/ixp/npe/IxOsalOsThread.c
new file mode 100644
index 0000000000..e6a4967fcd
--- /dev/null
+++ b/cpu/ixp/npe/IxOsalOsThread.c
@@ -0,0 +1,98 @@
+/**
+ * @file IxOsalOsThread.c (eCos)
+ *
+ * @brief OS-specific thread implementation.
+ *
+ *
+ * @par
+ * IXP400 SW Release version 1.5
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+#include "IxOsal.h"
+
+/* Thread attribute is ignored */
+PUBLIC IX_STATUS
+ixOsalThreadCreate (IxOsalThread * ptrTid,
+ IxOsalThreadAttr * threadAttr, IxOsalVoidFnVoidPtr entryPoint, void *arg)
+{
+ return IX_SUCCESS;
+}
+
+/*
+ * Start thread after given its thread handle
+ */
+PUBLIC IX_STATUS
+ixOsalThreadStart (IxOsalThread * tId)
+{
+ /* Thread already started upon creation */
+ return IX_SUCCESS;
+}
+
+/*
+ * In Linux threadKill does not actually destroy the thread,
+ * it will stop the signal handling.
+ */
+PUBLIC IX_STATUS
+ixOsalThreadKill (IxOsalThread * tid)
+{
+ return IX_SUCCESS;
+}
+
+PUBLIC void
+ixOsalThreadExit (void)
+{
+}
+
+PUBLIC IX_STATUS
+ixOsalThreadPrioritySet (IxOsalOsThread * tid, UINT32 priority)
+{
+ return IX_SUCCESS;
+}
+
+PUBLIC IX_STATUS
+ixOsalThreadSuspend (IxOsalThread * tId)
+{
+ return IX_SUCCESS;
+
+}
+
+PUBLIC IX_STATUS
+ixOsalThreadResume (IxOsalThread * tId)
+{
+ return IX_SUCCESS;
+}
diff --git a/cpu/ixp/npe/IxQMgrAqmIf.c b/cpu/ixp/npe/IxQMgrAqmIf.c
new file mode 100644
index 0000000000..b27b3a2877
--- /dev/null
+++ b/cpu/ixp/npe/IxQMgrAqmIf.c
@@ -0,0 +1,963 @@
+/*
+ * @file: IxQMgrAqmIf.c
+ *
+ * @author Intel Corporation
+ * @date 30-Oct-2001
+ *
+ * @brief This component provides a set of functions for
+ * perfoming I/O on the AQM hardware.
+ *
+ * Design Notes:
+ * These functions are intended to be as fast as possible
+ * and as a result perform NO PARAMETER CHECKING.
+ *
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+*/
+
+/*
+ * Inlines are compiled as function when this is defined.
+ * N.B. Must be placed before #include of "IxQMgrAqmIf_p.h
+ */
+#ifndef IXQMGRAQMIF_P_H
+# define IXQMGRAQMIF_C
+#else
+# error
+#endif
+
+/*
+ * User defined include files.
+ */
+#include "IxOsal.h"
+#include "IxQMgr.h"
+#include "IxQMgrAqmIf_p.h"
+#include "IxQMgrLog_p.h"
+
+
+/*
+ * #defines and macros used in this file.
+ */
+
+/* These defines are the bit offsets of the various fields of
+ * the queue configuration register
+ */
+#define IX_QMGR_Q_CONFIG_WRPTR_OFFSET 0x00
+#define IX_QMGR_Q_CONFIG_RDPTR_OFFSET 0x07
+#define IX_QMGR_Q_CONFIG_BADDR_OFFSET 0x0E
+#define IX_QMGR_Q_CONFIG_ESIZE_OFFSET 0x16
+#define IX_QMGR_Q_CONFIG_BSIZE_OFFSET 0x18
+#define IX_QMGR_Q_CONFIG_NE_OFFSET 0x1A
+#define IX_QMGR_Q_CONFIG_NF_OFFSET 0x1D
+
+#define IX_QMGR_BASE_ADDR_16_WORD_ALIGN 0x40
+#define IX_QMGR_BASE_ADDR_16_WORD_SHIFT 0x6
+
+#define IX_QMGR_NE_NF_CLEAR_MASK 0x03FFFFFF
+#define IX_QMGR_NE_MASK 0x7
+#define IX_QMGR_NF_MASK 0x7
+#define IX_QMGR_SIZE_MASK 0x3
+#define IX_QMGR_ENTRY_SIZE_MASK 0x3
+#define IX_QMGR_BADDR_MASK 0x003FC000
+#define IX_QMGR_RDPTR_MASK 0x7F
+#define IX_QMGR_WRPTR_MASK 0x7F
+#define IX_QMGR_RDWRPTR_MASK 0x00003FFF
+
+#define IX_QMGR_AQM_ADDRESS_SPACE_SIZE_IN_WORDS 0x1000
+
+/* Base address of AQM SRAM */
+#define IX_QMGR_AQM_SRAM_BASE_ADDRESS_OFFSET \
+((IX_QMGR_QUECONFIG_BASE_OFFSET) + (IX_QMGR_QUECONFIG_SIZE))
+
+/* Min buffer size used for generating buffer size in QUECONFIG */
+#define IX_QMGR_MIN_BUFFER_SIZE 16
+
+/* Reset values of QMgr hardware registers */
+#define IX_QMGR_QUELOWSTAT_RESET_VALUE 0x33333333
+#define IX_QMGR_QUEUOSTAT_RESET_VALUE 0x00000000
+#define IX_QMGR_QUEUPPSTAT0_RESET_VALUE 0xFFFFFFFF
+#define IX_QMGR_QUEUPPSTAT1_RESET_VALUE 0x00000000
+#define IX_QMGR_INT0SRCSELREG_RESET_VALUE 0x00000000
+#define IX_QMGR_QUEIEREG_RESET_VALUE 0x00000000
+#define IX_QMGR_QINTREG_RESET_VALUE 0xFFFFFFFF
+#define IX_QMGR_QUECONFIG_RESET_VALUE 0x00000000
+
+#define IX_QMGR_PHYSICAL_AQM_BASE_ADDRESS IX_OSAL_IXP400_QMGR_PHYS_BASE
+
+#define IX_QMGR_QUELOWSTAT_BITS_PER_Q (BITS_PER_WORD/IX_QMGR_QUELOWSTAT_NUM_QUE_PER_WORD)
+
+#define IX_QMGR_QUELOWSTAT_QID_MASK 0x7
+#define IX_QMGR_Q_CONFIG_ADDR_GET(qId)\
+ (((qId) * IX_QMGR_NUM_BYTES_PER_WORD) +\
+ IX_QMGR_QUECONFIG_BASE_OFFSET)
+
+#define IX_QMGR_ENTRY1_OFFSET 0
+#define IX_QMGR_ENTRY2_OFFSET 1
+#define IX_QMGR_ENTRY4_OFFSET 3
+
+/*
+ * Variable declarations global to this file. Externs are followed by
+ * statics.
+ */
+UINT32 aqmBaseAddress = 0;
+/* Store addresses and bit-masks for certain queue access and status registers.
+ * This is to facilitate inlining of QRead, QWrite and QStatusGet functions
+ * in IxQMgr,h
+ */
+extern IxQMgrQInlinedReadWriteInfo ixQMgrQInlinedReadWriteInfo[];
+UINT32 * ixQMgrAqmIfQueAccRegAddr[IX_QMGR_MAX_NUM_QUEUES];
+UINT32 ixQMgrAqmIfQueLowStatRegAddr[IX_QMGR_MIN_QUEUPP_QID];
+UINT32 ixQMgrAqmIfQueLowStatBitsOffset[IX_QMGR_MIN_QUEUPP_QID];
+UINT32 ixQMgrAqmIfQueLowStatBitsMask;
+UINT32 ixQMgrAqmIfQueUppStat0RegAddr;
+UINT32 ixQMgrAqmIfQueUppStat1RegAddr;
+UINT32 ixQMgrAqmIfQueUppStat0BitMask[IX_QMGR_MIN_QUEUPP_QID];
+UINT32 ixQMgrAqmIfQueUppStat1BitMask[IX_QMGR_MIN_QUEUPP_QID];
+
+/*
+ * Fast mutexes, one for each queue, used to protect peek & poke functions
+ */
+IxOsalFastMutex ixQMgrAqmIfPeekPokeFastMutex[IX_QMGR_MAX_NUM_QUEUES];
+
+/*
+ * Function prototypes
+ */
+PRIVATE unsigned
+watermarkToAqmWatermark (IxQMgrWMLevel watermark );
+
+PRIVATE unsigned
+entrySizeToAqmEntrySize (IxQMgrQEntrySizeInWords entrySize);
+
+PRIVATE unsigned
+bufferSizeToAqmBufferSize (unsigned bufferSizeInWords);
+
+PRIVATE void
+ixQMgrAqmIfRegistersReset (void);
+
+PRIVATE void
+ixQMgrAqmIfEntryAddressGet (unsigned int entryIndex,
+ UINT32 configRegWord,
+ unsigned int qEntrySizeInwords,
+ unsigned int qSizeInWords,
+ UINT32 **address);
+/*
+ * Function definitions
+ */
+void
+ixQMgrAqmIfInit (void)
+{
+ UINT32 aqmVirtualAddr;
+ int i;
+
+ /* The value of aqmBaseAddress depends on the logical address
+ * assigned by the MMU.
+ */
+ aqmVirtualAddr =
+ (UINT32) IX_OSAL_MEM_MAP(IX_QMGR_PHYSICAL_AQM_BASE_ADDRESS,
+ IX_OSAL_IXP400_QMGR_MAP_SIZE);
+ IX_OSAL_ASSERT (aqmVirtualAddr);
+
+ ixQMgrAqmIfBaseAddressSet (aqmVirtualAddr);
+
+ ixQMgrAqmIfRegistersReset ();
+
+ for (i = 0; i< IX_QMGR_MAX_NUM_QUEUES; i++)
+ {
+ ixOsalFastMutexInit(&ixQMgrAqmIfPeekPokeFastMutex[i]);
+
+ /********************************************************************
+ * Register addresses and bit masks are calculated and stored here to
+ * facilitate inlining of QRead, QWrite and QStatusGet functions in
+ * IxQMgr.h.
+ * These calculations are normally performed dynamically in inlined
+ * functions in IxQMgrAqmIf_p.h, and their semantics are reused here.
+ */
+
+ /* AQM Queue access reg addresses, per queue */
+ ixQMgrAqmIfQueAccRegAddr[i] =
+ (UINT32 *)(aqmBaseAddress + IX_QMGR_Q_ACCESS_ADDR_GET(i));
+ ixQMgrQInlinedReadWriteInfo[i].qAccRegAddr =
+ (volatile UINT32 *)(aqmBaseAddress + IX_QMGR_Q_ACCESS_ADDR_GET(i));
+
+
+ ixQMgrQInlinedReadWriteInfo[i].qConfigRegAddr =
+ (volatile UINT32 *)(aqmBaseAddress + IX_QMGR_Q_CONFIG_ADDR_GET(i));
+
+ /* AQM Queue lower-group (0-31), only */
+ if (i < IX_QMGR_MIN_QUEUPP_QID)
+ {
+ /* AQM Q underflow/overflow status register addresses, per queue */
+ ixQMgrQInlinedReadWriteInfo[i].qUOStatRegAddr =
+ (volatile UINT32 *)(aqmBaseAddress +
+ IX_QMGR_QUEUOSTAT0_OFFSET +
+ ((i / IX_QMGR_QUEUOSTAT_NUM_QUE_PER_WORD) *
+ IX_QMGR_NUM_BYTES_PER_WORD));
+
+ /* AQM Q underflow status bit masks for status register per queue */
+ ixQMgrQInlinedReadWriteInfo[i].qUflowStatBitMask =
+ (IX_QMGR_UNDERFLOW_BIT_OFFSET + 1) <<
+ ((i & (IX_QMGR_QUEUOSTAT_NUM_QUE_PER_WORD - 1)) *
+ (BITS_PER_WORD / IX_QMGR_QUEUOSTAT_NUM_QUE_PER_WORD));
+
+ /* AQM Q overflow status bit masks for status register, per queue */
+ ixQMgrQInlinedReadWriteInfo[i].qOflowStatBitMask =
+ (IX_QMGR_OVERFLOW_BIT_OFFSET + 1) <<
+ ((i & (IX_QMGR_QUEUOSTAT_NUM_QUE_PER_WORD - 1)) *
+ (BITS_PER_WORD / IX_QMGR_QUEUOSTAT_NUM_QUE_PER_WORD));
+
+ /* AQM Q lower-group (0-31) status register addresses, per queue */
+ ixQMgrAqmIfQueLowStatRegAddr[i] = aqmBaseAddress +
+ IX_QMGR_QUELOWSTAT0_OFFSET +
+ ((i / IX_QMGR_QUELOWSTAT_NUM_QUE_PER_WORD) *
+ IX_QMGR_NUM_BYTES_PER_WORD);
+
+ /* AQM Q lower-group (0-31) status register bit offset */
+ ixQMgrAqmIfQueLowStatBitsOffset[i] =
+ (i & (IX_QMGR_QUELOWSTAT_NUM_QUE_PER_WORD - 1)) *
+ (BITS_PER_WORD / IX_QMGR_QUELOWSTAT_NUM_QUE_PER_WORD);
+ }
+ else /* AQM Q upper-group (32-63), only */
+ {
+ /* AQM Q upper-group (32-63) Nearly Empty status reg bit masks */
+ ixQMgrAqmIfQueUppStat0BitMask[i - IX_QMGR_MIN_QUEUPP_QID] =
+ (1 << (i - IX_QMGR_MIN_QUEUPP_QID));
+
+ /* AQM Q upper-group (32-63) Full status register bit masks */
+ ixQMgrAqmIfQueUppStat1BitMask[i - IX_QMGR_MIN_QUEUPP_QID] =
+ (1 << (i - IX_QMGR_MIN_QUEUPP_QID));
+ }
+ }
+
+ /* AQM Q lower-group (0-31) status register bit mask */
+ ixQMgrAqmIfQueLowStatBitsMask = (1 <<
+ (BITS_PER_WORD /
+ IX_QMGR_QUELOWSTAT_NUM_QUE_PER_WORD)) - 1;
+
+ /* AQM Q upper-group (32-63) Nearly Empty status register address */
+ ixQMgrAqmIfQueUppStat0RegAddr = aqmBaseAddress + IX_QMGR_QUEUPPSTAT0_OFFSET;
+
+ /* AQM Q upper-group (32-63) Full status register address */
+ ixQMgrAqmIfQueUppStat1RegAddr = aqmBaseAddress + IX_QMGR_QUEUPPSTAT1_OFFSET;
+}
+
+/*
+ * Uninitialise the AqmIf module by unmapping memory, etc
+ */
+void
+ixQMgrAqmIfUninit (void)
+{
+ UINT32 virtAddr;
+
+ ixQMgrAqmIfBaseAddressGet (&virtAddr);
+ IX_OSAL_MEM_UNMAP (virtAddr);
+ ixQMgrAqmIfBaseAddressSet (0);
+}
+
+/*
+ * Set the the logical base address of AQM
+ */
+void
+ixQMgrAqmIfBaseAddressSet (UINT32 address)
+{
+ aqmBaseAddress = address;
+}
+
+/*
+ * Get the logical base address of AQM
+ */
+void
+ixQMgrAqmIfBaseAddressGet (UINT32 *address)
+{
+ *address = aqmBaseAddress;
+}
+
+/*
+ * Get the logical base address of AQM SRAM
+ */
+void
+ixQMgrAqmIfSramBaseAddressGet (UINT32 *address)
+{
+ *address = aqmBaseAddress +
+ IX_QMGR_AQM_SRAM_BASE_ADDRESS_OFFSET;
+}
+
+/*
+ * This function will write the status bits of a queue
+ * specified by qId.
+ */
+void
+ixQMgrAqmIfQRegisterBitsWrite (IxQMgrQId qId,
+ UINT32 registerBaseAddrOffset,
+ unsigned queuesPerRegWord,
+ UINT32 value)
+{
+ volatile UINT32 *registerAddress;
+ UINT32 registerWord;
+ UINT32 statusBitsMask;
+ UINT32 bitsPerQueue;
+
+ bitsPerQueue = BITS_PER_WORD / queuesPerRegWord;
+
+ /*
+ * Calculate the registerAddress
+ * multiple queues split accross registers
+ */
+ registerAddress = (UINT32*)(aqmBaseAddress +
+ registerBaseAddrOffset +
+ ((qId / queuesPerRegWord) *
+ IX_QMGR_NUM_BYTES_PER_WORD));
+
+ /* Read the current data */
+ ixQMgrAqmIfWordRead (registerAddress, &registerWord);
+
+
+ if( (registerBaseAddrOffset == IX_QMGR_INT0SRCSELREG0_OFFSET) &&
+ (qId == IX_QMGR_QUEUE_0) )
+ {
+ statusBitsMask = 0x7 ;
+
+ /* Queue 0 at INT0SRCSELREG should not corrupt the value bit-3 */
+ value &= 0x7 ;
+ }
+ else
+ {
+ /* Calculate the mask for the status bits for this queue. */
+ statusBitsMask = ((1 << bitsPerQueue) - 1);
+ statusBitsMask <<= ((qId & (queuesPerRegWord - 1)) * bitsPerQueue);
+
+ /* Mask out bits in value that would overwrite other q data */
+ value <<= ((qId & (queuesPerRegWord - 1)) * bitsPerQueue);
+ value &= statusBitsMask;
+ }
+
+ /* Mask out bits to write to */
+ registerWord &= ~statusBitsMask;
+
+
+ /* Set the write bits */
+ registerWord |= value;
+
+ /*
+ * Write the data
+ */
+ ixQMgrAqmIfWordWrite (registerAddress, registerWord);
+}
+
+/*
+ * This function generates the parameters that can be used to
+ * check if a Qs status matches the specified source select.
+ * It calculates which status word to check (statusWordOffset),
+ * the value to check the status against (checkValue) and the
+ * mask (mask) to mask out all but the bits to check in the status word.
+ */
+void
+ixQMgrAqmIfQStatusCheckValsCalc (IxQMgrQId qId,
+ IxQMgrSourceId srcSel,
+ unsigned int *statusWordOffset,
+ UINT32 *checkValue,
+ UINT32 *mask)
+{
+ UINT32 shiftVal;
+
+ if (qId < IX_QMGR_MIN_QUEUPP_QID)
+ {
+ switch (srcSel)
+ {
+ case IX_QMGR_Q_SOURCE_ID_E:
+ *checkValue = IX_QMGR_Q_STATUS_E_BIT_MASK;
+ *mask = IX_QMGR_Q_STATUS_E_BIT_MASK;
+ break;
+ case IX_QMGR_Q_SOURCE_ID_NE:
+ *checkValue = IX_QMGR_Q_STATUS_NE_BIT_MASK;
+ *mask = IX_QMGR_Q_STATUS_NE_BIT_MASK;
+ break;
+ case IX_QMGR_Q_SOURCE_ID_NF:
+ *checkValue = IX_QMGR_Q_STATUS_NF_BIT_MASK;
+ *mask = IX_QMGR_Q_STATUS_NF_BIT_MASK;
+ break;
+ case IX_QMGR_Q_SOURCE_ID_F:
+ *checkValue = IX_QMGR_Q_STATUS_F_BIT_MASK;
+ *mask = IX_QMGR_Q_STATUS_F_BIT_MASK;
+ break;
+ case IX_QMGR_Q_SOURCE_ID_NOT_E:
+ *checkValue = 0;
+ *mask = IX_QMGR_Q_STATUS_E_BIT_MASK;
+ break;
+ case IX_QMGR_Q_SOURCE_ID_NOT_NE:
+ *checkValue = 0;
+ *mask = IX_QMGR_Q_STATUS_NE_BIT_MASK;
+ break;
+ case IX_QMGR_Q_SOURCE_ID_NOT_NF:
+ *checkValue = 0;
+ *mask = IX_QMGR_Q_STATUS_NF_BIT_MASK;
+ break;
+ case IX_QMGR_Q_SOURCE_ID_NOT_F:
+ *checkValue = 0;
+ *mask = IX_QMGR_Q_STATUS_F_BIT_MASK;
+ break;
+ default:
+ /* Should never hit */
+ IX_OSAL_ASSERT(0);
+ break;
+ }
+
+ /* One nibble of status per queue so need to shift the
+ * check value and mask out to the correct position.
+ */
+ shiftVal = (qId % IX_QMGR_QUELOWSTAT_NUM_QUE_PER_WORD) *
+ IX_QMGR_QUELOWSTAT_BITS_PER_Q;
+
+ /* Calculate the which status word to check from the qId,
+ * 8 Qs status per word
+ */
+ *statusWordOffset = qId / IX_QMGR_QUELOWSTAT_NUM_QUE_PER_WORD;
+
+ *checkValue <<= shiftVal;
+ *mask <<= shiftVal;
+ }
+ else
+ {
+ /* One status word */
+ *statusWordOffset = 0;
+ /* Single bits per queue and int source bit hardwired NE,
+ * Qs start at 32.
+ */
+ *mask = 1 << (qId - IX_QMGR_MIN_QUEUPP_QID);
+ *checkValue = *mask;
+ }
+}
+
+void
+ixQMgrAqmIfQInterruptEnable (IxQMgrQId qId)
+{
+ volatile UINT32 *registerAddress;
+ UINT32 registerWord;
+ UINT32 actualBitOffset;
+
+ if (qId < IX_QMGR_MIN_QUEUPP_QID)
+ {
+ registerAddress = (UINT32*)(aqmBaseAddress + IX_QMGR_QUEIEREG0_OFFSET);
+ }
+ else
+ {
+ registerAddress = (UINT32*)(aqmBaseAddress + IX_QMGR_QUEIEREG1_OFFSET);
+ }
+
+ actualBitOffset = 1 << (qId % IX_QMGR_MIN_QUEUPP_QID);
+
+ ixQMgrAqmIfWordRead (registerAddress, &registerWord);
+ ixQMgrAqmIfWordWrite (registerAddress, (registerWord | actualBitOffset));
+}
+
+void
+ixQMgrAqmIfQInterruptDisable (IxQMgrQId qId)
+{
+ volatile UINT32 *registerAddress;
+ UINT32 registerWord;
+ UINT32 actualBitOffset;
+
+ if (qId < IX_QMGR_MIN_QUEUPP_QID)
+ {
+ registerAddress = (UINT32*)(aqmBaseAddress + IX_QMGR_QUEIEREG0_OFFSET);
+ }
+ else
+ {
+ registerAddress = (UINT32*)(aqmBaseAddress + IX_QMGR_QUEIEREG1_OFFSET);
+ }
+
+ actualBitOffset = 1 << (qId % IX_QMGR_MIN_QUEUPP_QID);
+
+ ixQMgrAqmIfWordRead (registerAddress, &registerWord);
+ ixQMgrAqmIfWordWrite (registerAddress, registerWord & (~actualBitOffset));
+}
+
+void
+ixQMgrAqmIfQueCfgWrite (IxQMgrQId qId,
+ IxQMgrQSizeInWords qSizeInWords,
+ IxQMgrQEntrySizeInWords entrySizeInWords,
+ UINT32 freeSRAMAddress)
+{
+ volatile UINT32 *cfgAddress = NULL;
+ UINT32 qCfg = 0;
+ UINT32 baseAddress = 0;
+ unsigned aqmEntrySize = 0;
+ unsigned aqmBufferSize = 0;
+
+ /* Build config register */
+ aqmEntrySize = entrySizeToAqmEntrySize (entrySizeInWords);
+ qCfg |= (aqmEntrySize&IX_QMGR_ENTRY_SIZE_MASK) <<
+ IX_QMGR_Q_CONFIG_ESIZE_OFFSET;
+
+ aqmBufferSize = bufferSizeToAqmBufferSize (qSizeInWords);
+ qCfg |= (aqmBufferSize&IX_QMGR_SIZE_MASK) << IX_QMGR_Q_CONFIG_BSIZE_OFFSET;
+
+ /* baseAddress, calculated relative to aqmBaseAddress and start address */
+ baseAddress = freeSRAMAddress -
+ (aqmBaseAddress + IX_QMGR_QUECONFIG_BASE_OFFSET);
+
+ /* Verify base address aligned to a 16 word boundary */
+ if ((baseAddress % IX_QMGR_BASE_ADDR_16_WORD_ALIGN) != 0)
+ {
+ IX_QMGR_LOG_ERROR0("ixQMgrAqmIfQueCfgWrite () address is not on 16 word boundary\n");
+ }
+ /* Now convert it to a 16 word pointer as required by QUECONFIG register */
+ baseAddress >>= IX_QMGR_BASE_ADDR_16_WORD_SHIFT;
+
+
+ qCfg |= (baseAddress << IX_QMGR_Q_CONFIG_BADDR_OFFSET);
+
+
+ cfgAddress = (UINT32*)(aqmBaseAddress +
+ IX_QMGR_Q_CONFIG_ADDR_GET(qId));
+
+
+ /* NOTE: High and Low watermarks are set to zero */
+ ixQMgrAqmIfWordWrite (cfgAddress, qCfg);
+}
+
+void
+ixQMgrAqmIfQueCfgRead (IxQMgrQId qId,
+ unsigned int numEntries,
+ UINT32 *baseAddress,
+ unsigned int *ne,
+ unsigned int *nf,
+ UINT32 *readPtr,
+ UINT32 *writePtr)
+{
+ UINT32 qcfg;
+ UINT32 *cfgAddress = (UINT32*)(aqmBaseAddress + IX_QMGR_Q_CONFIG_ADDR_GET(qId));
+ unsigned int qEntrySizeInwords;
+ unsigned int qSizeInWords;
+ UINT32 *readPtr_ = NULL;
+
+ /* Read the queue configuration register */
+ ixQMgrAqmIfWordRead (cfgAddress, &qcfg);
+
+ /* Extract the base address */
+ *baseAddress = (UINT32)((qcfg & IX_QMGR_BADDR_MASK) >>
+ (IX_QMGR_Q_CONFIG_BADDR_OFFSET));
+
+ /* Base address is a 16 word pointer from the start of AQM SRAM.
+ * Convert to absolute word address.
+ */
+ *baseAddress <<= IX_QMGR_BASE_ADDR_16_WORD_SHIFT;
+ *baseAddress += (UINT32)IX_QMGR_QUECONFIG_BASE_OFFSET;
+
+ /*
+ * Extract the watermarks. 0->0 entries, 1->1 entries, 2->2 entries, 3->4 entries......
+ * If ne > 0 ==> neInEntries = 2^(ne - 1)
+ * If ne == 0 ==> neInEntries = 0
+ * The same applies.
+ */
+ *ne = ((qcfg) >> (IX_QMGR_Q_CONFIG_NE_OFFSET)) & IX_QMGR_NE_MASK;
+ *nf = ((qcfg) >> (IX_QMGR_Q_CONFIG_NF_OFFSET)) & IX_QMGR_NF_MASK;
+
+ if (0 != *ne)
+ {
+ *ne = 1 << (*ne - 1);
+ }
+ if (0 != *nf)
+ {
+ *nf = 1 << (*nf - 1);
+ }
+
+ /* Get the queue entry size in words */
+ qEntrySizeInwords = ixQMgrQEntrySizeInWordsGet (qId);
+
+ /* Get the queue size in words */
+ qSizeInWords = ixQMgrQSizeInWordsGet (qId);
+
+ ixQMgrAqmIfEntryAddressGet (0/* Entry 0. i.e the readPtr*/,
+ qcfg,
+ qEntrySizeInwords,
+ qSizeInWords,
+ &readPtr_);
+ *readPtr = (UINT32)readPtr_;
+ *readPtr -= (UINT32)aqmBaseAddress;/* Offset, not absolute address */
+
+ *writePtr = (qcfg >> IX_QMGR_Q_CONFIG_WRPTR_OFFSET) & IX_QMGR_WRPTR_MASK;
+ *writePtr = *baseAddress + (*writePtr * (IX_QMGR_NUM_BYTES_PER_WORD));
+ return;
+}
+
+unsigned
+ixQMgrAqmIfLog2 (unsigned number)
+{
+ unsigned count = 0;
+
+ /*
+ * N.B. this function will return 0
+ * for ixQMgrAqmIfLog2 (0)
+ */
+ while (number/2)
+ {
+ number /=2;
+ count++;
+ }
+
+ return count;
+}
+
+void ixQMgrAqmIfIntSrcSelReg0Bit3Set (void)
+{
+
+ volatile UINT32 *registerAddress;
+ UINT32 registerWord;
+
+ /*
+ * Calculate the registerAddress
+ * multiple queues split accross registers
+ */
+ registerAddress = (UINT32*)(aqmBaseAddress +
+ IX_QMGR_INT0SRCSELREG0_OFFSET);
+
+ /* Read the current data */
+ ixQMgrAqmIfWordRead (registerAddress, &registerWord);
+
+ /* Set the write bits */
+ registerWord |= (1<<IX_QMGR_INT0SRCSELREG0_BIT3) ;
+
+ /*
+ * Write the data
+ */
+ ixQMgrAqmIfWordWrite (registerAddress, registerWord);
+}
+
+
+void
+ixQMgrAqmIfIntSrcSelWrite (IxQMgrQId qId,
+ IxQMgrSourceId sourceId)
+{
+ ixQMgrAqmIfQRegisterBitsWrite (qId,
+ IX_QMGR_INT0SRCSELREG0_OFFSET,
+ IX_QMGR_INTSRC_NUM_QUE_PER_WORD,
+ sourceId);
+}
+
+
+
+void
+ixQMgrAqmIfWatermarkSet (IxQMgrQId qId,
+ unsigned ne,
+ unsigned nf)
+{
+ volatile UINT32 *address = 0;
+ UINT32 value = 0;
+ unsigned aqmNeWatermark = 0;
+ unsigned aqmNfWatermark = 0;
+
+ address = (UINT32*)(aqmBaseAddress +
+ IX_QMGR_Q_CONFIG_ADDR_GET(qId));
+
+ aqmNeWatermark = watermarkToAqmWatermark (ne);
+ aqmNfWatermark = watermarkToAqmWatermark (nf);
+
+ /* Read the current watermarks */
+ ixQMgrAqmIfWordRead (address, &value);
+
+ /* Clear out the old watermarks */
+ value &= IX_QMGR_NE_NF_CLEAR_MASK;
+
+ /* Generate the value to write */
+ value |= (aqmNeWatermark << IX_QMGR_Q_CONFIG_NE_OFFSET) |
+ (aqmNfWatermark << IX_QMGR_Q_CONFIG_NF_OFFSET);
+
+ ixQMgrAqmIfWordWrite (address, value);
+
+}
+
+PRIVATE void
+ixQMgrAqmIfEntryAddressGet (unsigned int entryIndex,
+ UINT32 configRegWord,
+ unsigned int qEntrySizeInwords,
+ unsigned int qSizeInWords,
+ UINT32 **address)
+{
+ UINT32 readPtr;
+ UINT32 baseAddress;
+ UINT32 *topOfAqmSram;
+
+ topOfAqmSram = ((UINT32 *)aqmBaseAddress + IX_QMGR_AQM_ADDRESS_SPACE_SIZE_IN_WORDS);
+
+ /* Extract the base address */
+ baseAddress = (UINT32)((configRegWord & IX_QMGR_BADDR_MASK) >>
+ (IX_QMGR_Q_CONFIG_BADDR_OFFSET));
+
+ /* Base address is a 16 word pointer from the start of AQM SRAM.
+ * Convert to absolute word address.
+ */
+ baseAddress <<= IX_QMGR_BASE_ADDR_16_WORD_SHIFT;
+ baseAddress += ((UINT32)aqmBaseAddress + (UINT32)IX_QMGR_QUECONFIG_BASE_OFFSET);
+
+ /* Extract the read pointer. Read pointer is a word pointer */
+ readPtr = (UINT32)((configRegWord >>
+ IX_QMGR_Q_CONFIG_RDPTR_OFFSET)&IX_QMGR_RDPTR_MASK);
+
+ /* Read/Write pointers(word pointers) are offsets from the queue buffer space base address.
+ * Calculate the absolute read pointer address. NOTE: Queues are circular buffers.
+ */
+ readPtr = (readPtr + (entryIndex * qEntrySizeInwords)) & (qSizeInWords - 1); /* Mask by queue size */
+ *address = (UINT32 *)(baseAddress + (readPtr * (IX_QMGR_NUM_BYTES_PER_WORD)));
+
+ switch (qEntrySizeInwords)
+ {
+ case IX_QMGR_Q_ENTRY_SIZE1:
+ IX_OSAL_ASSERT((*address + IX_QMGR_ENTRY1_OFFSET) < topOfAqmSram);
+ break;
+ case IX_QMGR_Q_ENTRY_SIZE2:
+ IX_OSAL_ASSERT((*address + IX_QMGR_ENTRY2_OFFSET) < topOfAqmSram);
+ break;
+ case IX_QMGR_Q_ENTRY_SIZE4:
+ IX_OSAL_ASSERT((*address + IX_QMGR_ENTRY4_OFFSET) < topOfAqmSram);
+ break;
+ default:
+ IX_QMGR_LOG_ERROR0("Invalid Q Entry size passed to ixQMgrAqmIfEntryAddressGet");
+ break;
+ }
+
+}
+
+IX_STATUS
+ixQMgrAqmIfQPeek (IxQMgrQId qId,
+ unsigned int entryIndex,
+ unsigned int *entry)
+{
+ UINT32 *cfgRegAddress = (UINT32*)(aqmBaseAddress + IX_QMGR_Q_CONFIG_ADDR_GET(qId));
+ UINT32 *entryAddress = NULL;
+ UINT32 configRegWordOnEntry;
+ UINT32 configRegWordOnExit;
+ unsigned int qEntrySizeInwords;
+ unsigned int qSizeInWords;
+
+ /* Get the queue entry size in words */
+ qEntrySizeInwords = ixQMgrQEntrySizeInWordsGet (qId);
+
+ /* Get the queue size in words */
+ qSizeInWords = ixQMgrQSizeInWordsGet (qId);
+
+ /* Read the config register */
+ ixQMgrAqmIfWordRead (cfgRegAddress, &configRegWordOnEntry);
+
+ /* Get the entry address */
+ ixQMgrAqmIfEntryAddressGet (entryIndex,
+ configRegWordOnEntry,
+ qEntrySizeInwords,
+ qSizeInWords,
+ &entryAddress);
+
+ /* Get the lock or return busy */
+ if (IX_SUCCESS != ixOsalFastMutexTryLock(&ixQMgrAqmIfPeekPokeFastMutex[qId]))
+ {
+ return IX_FAIL;
+ }
+
+ while(qEntrySizeInwords--)
+ {
+ ixQMgrAqmIfWordRead (entryAddress++, entry++);
+ }
+
+ /* Release the lock */
+ ixOsalFastMutexUnlock(&ixQMgrAqmIfPeekPokeFastMutex[qId]);
+
+ /* Read the config register */
+ ixQMgrAqmIfWordRead (cfgRegAddress, &configRegWordOnExit);
+
+ /* Check that the read and write pointers have not changed */
+ if (configRegWordOnEntry != configRegWordOnExit)
+ {
+ return IX_FAIL;
+ }
+
+ return IX_SUCCESS;
+}
+
+IX_STATUS
+ixQMgrAqmIfQPoke (IxQMgrQId qId,
+ unsigned entryIndex,
+ unsigned int *entry)
+{
+ UINT32 *cfgRegAddress = (UINT32*)(aqmBaseAddress + IX_QMGR_Q_CONFIG_ADDR_GET(qId));
+ UINT32 *entryAddress = NULL;
+ UINT32 configRegWordOnEntry;
+ UINT32 configRegWordOnExit;
+ unsigned int qEntrySizeInwords;
+ unsigned int qSizeInWords;
+
+ /* Get the queue entry size in words */
+ qEntrySizeInwords = ixQMgrQEntrySizeInWordsGet (qId);
+
+ /* Get the queue size in words */
+ qSizeInWords = ixQMgrQSizeInWordsGet (qId);
+
+ /* Read the config register */
+ ixQMgrAqmIfWordRead (cfgRegAddress, &configRegWordOnEntry);
+
+ /* Get the entry address */
+ ixQMgrAqmIfEntryAddressGet (entryIndex,
+ configRegWordOnEntry,
+ qEntrySizeInwords,
+ qSizeInWords,
+ &entryAddress);
+
+ /* Get the lock or return busy */
+ if (IX_SUCCESS != ixOsalFastMutexTryLock(&ixQMgrAqmIfPeekPokeFastMutex[qId]))
+ {
+ return IX_FAIL;
+ }
+
+ /* Else read the entry directly from SRAM. This will not move the read pointer */
+ while(qEntrySizeInwords--)
+ {
+ ixQMgrAqmIfWordWrite (entryAddress++, *entry++);
+ }
+
+ /* Release the lock */
+ ixOsalFastMutexUnlock(&ixQMgrAqmIfPeekPokeFastMutex[qId]);
+
+ /* Read the config register */
+ ixQMgrAqmIfWordRead (cfgRegAddress, &configRegWordOnExit);
+
+ /* Check that the read and write pointers have not changed */
+ if (configRegWordOnEntry != configRegWordOnExit)
+ {
+ return IX_FAIL;
+ }
+
+ return IX_SUCCESS;
+}
+
+PRIVATE unsigned
+watermarkToAqmWatermark (IxQMgrWMLevel watermark )
+{
+ unsigned aqmWatermark = 0;
+
+ /*
+ * Watermarks 0("000"),1("001"),2("010"),4("011"),
+ * 8("100"),16("101"),32("110"),64("111")
+ */
+ aqmWatermark = ixQMgrAqmIfLog2 (watermark * 2);
+
+ return aqmWatermark;
+}
+
+PRIVATE unsigned
+entrySizeToAqmEntrySize (IxQMgrQEntrySizeInWords entrySize)
+{
+ /* entrySize 1("00"),2("01"),4("10") */
+ return (ixQMgrAqmIfLog2 (entrySize));
+}
+
+PRIVATE unsigned
+bufferSizeToAqmBufferSize (unsigned bufferSizeInWords)
+{
+ /* bufferSize 16("00"),32("01),64("10"),128("11") */
+ return (ixQMgrAqmIfLog2 (bufferSizeInWords / IX_QMGR_MIN_BUFFER_SIZE));
+}
+
+/*
+ * Reset AQM registers to default values.
+ */
+PRIVATE void
+ixQMgrAqmIfRegistersReset (void)
+{
+ volatile UINT32 *qConfigWordAddress = NULL;
+ unsigned int i;
+
+ /*
+ * Need to initialize AQM hardware registers to an initial
+ * value as init may have been called as a result of a soft
+ * reset. i.e. soft reset does not reset hardware registers.
+ */
+
+ /* Reset queues 0..31 status registers 0..3 */
+ ixQMgrAqmIfWordWrite((UINT32 *)(aqmBaseAddress + IX_QMGR_QUELOWSTAT0_OFFSET),
+ IX_QMGR_QUELOWSTAT_RESET_VALUE);
+ ixQMgrAqmIfWordWrite((UINT32 *)(aqmBaseAddress + IX_QMGR_QUELOWSTAT1_OFFSET),
+ IX_QMGR_QUELOWSTAT_RESET_VALUE);
+ ixQMgrAqmIfWordWrite((UINT32 *)(aqmBaseAddress + IX_QMGR_QUELOWSTAT2_OFFSET),
+ IX_QMGR_QUELOWSTAT_RESET_VALUE);
+ ixQMgrAqmIfWordWrite((UINT32 *)(aqmBaseAddress + IX_QMGR_QUELOWSTAT3_OFFSET),
+ IX_QMGR_QUELOWSTAT_RESET_VALUE);
+
+ /* Reset underflow/overflow status registers 0..1 */
+ ixQMgrAqmIfWordWrite((UINT32 *)(aqmBaseAddress + IX_QMGR_QUEUOSTAT0_OFFSET),
+ IX_QMGR_QUEUOSTAT_RESET_VALUE);
+ ixQMgrAqmIfWordWrite((UINT32 *)(aqmBaseAddress + IX_QMGR_QUEUOSTAT1_OFFSET),
+ IX_QMGR_QUEUOSTAT_RESET_VALUE);
+
+ /* Reset queues 32..63 nearly empty status registers */
+ ixQMgrAqmIfWordWrite((UINT32 *)(aqmBaseAddress + IX_QMGR_QUEUPPSTAT0_OFFSET),
+ IX_QMGR_QUEUPPSTAT0_RESET_VALUE);
+
+ /* Reset queues 32..63 full status registers */
+ ixQMgrAqmIfWordWrite((UINT32 *)(aqmBaseAddress + IX_QMGR_QUEUPPSTAT1_OFFSET),
+ IX_QMGR_QUEUPPSTAT1_RESET_VALUE);
+
+ /* Reset int0 status flag source select registers 0..3 */
+ ixQMgrAqmIfWordWrite((UINT32 *)(aqmBaseAddress + IX_QMGR_INT0SRCSELREG0_OFFSET),
+ IX_QMGR_INT0SRCSELREG_RESET_VALUE);
+ ixQMgrAqmIfWordWrite((UINT32 *)(aqmBaseAddress + IX_QMGR_INT0SRCSELREG1_OFFSET),
+ IX_QMGR_INT0SRCSELREG_RESET_VALUE);
+ ixQMgrAqmIfWordWrite((UINT32 *)(aqmBaseAddress + IX_QMGR_INT0SRCSELREG2_OFFSET),
+ IX_QMGR_INT0SRCSELREG_RESET_VALUE);
+ ixQMgrAqmIfWordWrite((UINT32 *)(aqmBaseAddress + IX_QMGR_INT0SRCSELREG3_OFFSET),
+ IX_QMGR_INT0SRCSELREG_RESET_VALUE);
+
+ /* Reset queue interrupt enable register 0..1 */
+ ixQMgrAqmIfWordWrite((UINT32 *)(aqmBaseAddress + IX_QMGR_QUEIEREG0_OFFSET),
+ IX_QMGR_QUEIEREG_RESET_VALUE);
+ ixQMgrAqmIfWordWrite((UINT32 *)(aqmBaseAddress + IX_QMGR_QUEIEREG1_OFFSET),
+ IX_QMGR_QUEIEREG_RESET_VALUE);
+
+ /* Reset queue interrupt register 0..1 */
+ ixQMgrAqmIfWordWrite((UINT32 *)(aqmBaseAddress + IX_QMGR_QINTREG0_OFFSET),
+ IX_QMGR_QINTREG_RESET_VALUE);
+ ixQMgrAqmIfWordWrite((UINT32 *)(aqmBaseAddress + IX_QMGR_QINTREG1_OFFSET),
+ IX_QMGR_QINTREG_RESET_VALUE);
+
+ /* Reset queue configuration words 0..63 */
+ qConfigWordAddress = (UINT32 *)(aqmBaseAddress + IX_QMGR_QUECONFIG_BASE_OFFSET);
+ for (i = 0; i < (IX_QMGR_QUECONFIG_SIZE / sizeof(UINT32)); i++)
+ {
+ ixQMgrAqmIfWordWrite(qConfigWordAddress,
+ IX_QMGR_QUECONFIG_RESET_VALUE);
+ /* Next word */
+ qConfigWordAddress++;
+ }
+}
+
diff --git a/cpu/ixp/npe/IxQMgrDispatcher.c b/cpu/ixp/npe/IxQMgrDispatcher.c
new file mode 100644
index 0000000000..09f69ce322
--- /dev/null
+++ b/cpu/ixp/npe/IxQMgrDispatcher.c
@@ -0,0 +1,1347 @@
+/**
+ * @file IxQMgrDispatcher.c
+ *
+ * @author Intel Corporation
+ * @date 20-Dec-2001
+ *
+ * @brief This file contains the implementation of the Dispatcher sub component
+ *
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+*/
+
+/*
+ * User defined include files.
+ */
+#include "IxQMgr.h"
+#include "IxQMgrAqmIf_p.h"
+#include "IxQMgrQCfg_p.h"
+#include "IxQMgrDispatcher_p.h"
+#include "IxQMgrLog_p.h"
+#include "IxQMgrDefines_p.h"
+#include "IxFeatureCtrl.h"
+#include "IxOsal.h"
+
+
+
+/*
+ * #defines and macros used in this file.
+ */
+
+
+/*
+ * This constant is used to indicate the number of priority levels supported
+ */
+#define IX_QMGR_NUM_PRIORITY_LEVELS 3
+
+/*
+ * This constant is used to set the size of the array of status words
+ */
+#define MAX_Q_STATUS_WORDS 4
+
+/*
+ * This macro is used to check if a given priority is valid
+ */
+#define IX_QMGR_DISPATCHER_PRIORITY_CHECK(priority) \
+(((priority) >= IX_QMGR_Q_PRIORITY_0) && ((priority) <= IX_QMGR_Q_PRIORITY_2))
+
+/*
+ * This macto is used to check that a given interrupt source is valid
+ */
+#define IX_QMGR_DISPATCHER_SOURCE_ID_CHECK(srcSel) \
+(((srcSel) >= IX_QMGR_Q_SOURCE_ID_E) && ((srcSel) <= IX_QMGR_Q_SOURCE_ID_NOT_F))
+
+/*
+ * Number of times a dummy callback is called before logging a trace
+ * message
+ */
+#define LOG_THROTTLE_COUNT 1000000
+
+/* Priority tables limits */
+#define IX_QMGR_MIN_LOW_QUE_PRIORITY_TABLE_INDEX (0)
+#define IX_QMGR_MID_LOW_QUE_PRIORITY_TABLE_INDEX (16)
+#define IX_QMGR_MAX_LOW_QUE_PRIORITY_TABLE_INDEX (31)
+#define IX_QMGR_MIN_UPP_QUE_PRIORITY_TABLE_INDEX (32)
+#define IX_QMGR_MID_UPP_QUE_PRIORITY_TABLE_INDEX (48)
+#define IX_QMGR_MAX_UPP_QUE_PRIORITY_TABLE_INDEX (63)
+
+/*
+ * This macro is used to check if a given callback type is valid
+ */
+#define IX_QMGR_DISPATCHER_CALLBACK_TYPE_CHECK(type) \
+ (((type) >= IX_QMGR_TYPE_REALTIME_OTHER) && \
+ ((type) <= IX_QMGR_TYPE_REALTIME_SPORADIC))
+
+/*
+ * define max index in lower queue to use in loops
+ */
+#define IX_QMGR_MAX_LOW_QUE_TABLE_INDEX (31)
+
+/*
+ * Typedefs whose scope is limited to this file.
+ */
+
+/*
+ * Information on a queue needed by the Dispatcher
+ */
+typedef struct
+{
+ IxQMgrCallback callback; /* Notification callback */
+ IxQMgrCallbackId callbackId; /* Notification callback identifier */
+ unsigned dummyCallbackCount; /* Number of times runs of dummy callback */
+ IxQMgrPriority priority; /* Dispatch priority */
+ unsigned int statusWordOffset; /* Offset to the status word to check */
+ UINT32 statusMask; /* Status mask */
+ UINT32 statusCheckValue; /* Status check value */
+ UINT32 intRegCheckMask; /* Interrupt register check mask */
+} IxQMgrQInfo;
+
+/*
+ * Variable declarations global to this file. Externs are followed by
+ * statics.
+ */
+
+/*
+ * Flag to keep record of what dispatcher set in featureCtrl when ixQMgrInit()
+ * is called. This is needed because it is possible that a client might
+ * change whether the live lock prevention dispatcher is used between
+ * calls to ixQMgrInit() and ixQMgrDispatcherLoopGet().
+ */
+PRIVATE IX_STATUS ixQMgrOrigB0Dispatcher = IX_FEATURE_CTRL_COMPONENT_ENABLED;
+
+/*
+ * keep record of Q types - not in IxQMgrQInfo for performance as
+ * it is only used with ixQMgrDispatcherLoopRunB0LLP()
+ */
+PRIVATE IxQMgrType ixQMgrQTypes[IX_QMGR_MAX_NUM_QUEUES];
+
+/*
+ * This array contains a list of queue identifiers ordered by priority. The table
+ * is split logically between queue identifiers 0-31 and 32-63.
+ */
+static IxQMgrQId priorityTable[IX_QMGR_MAX_NUM_QUEUES];
+
+/*
+ * This flag indicates to the dispatcher that the priority table needs to be rebuilt.
+ */
+static BOOL rebuildTable = FALSE;
+
+/* Dispatcher statistics */
+static IxQMgrDispatcherStats dispatcherStats;
+
+/* Table of queue information */
+static IxQMgrQInfo dispatchQInfo[IX_QMGR_MAX_NUM_QUEUES];
+
+/* Masks use to identify the first queues in the priority tables
+* when comparing with the interrupt register
+*/
+static unsigned int lowPriorityTableFirstHalfMask;
+static unsigned int uppPriorityTableFirstHalfMask;
+
+/*
+ * Static function prototypes
+ */
+
+/*
+ * This function is the default callback for all queues
+ */
+PRIVATE void
+dummyCallback (IxQMgrQId qId,
+ IxQMgrCallbackId cbId);
+
+PRIVATE void
+ixQMgrDispatcherReBuildPriorityTable (void);
+
+/*
+ * Function definitions.
+ */
+void
+ixQMgrDispatcherInit (void)
+{
+ int i;
+ IxFeatureCtrlProductId productId = 0;
+ IxFeatureCtrlDeviceId deviceId = 0;
+ BOOL stickyIntSilicon = TRUE;
+
+ /* Set default priorities */
+ for (i=0; i< IX_QMGR_MAX_NUM_QUEUES; i++)
+ {
+ dispatchQInfo[i].callback = dummyCallback;
+ dispatchQInfo[i].callbackId = 0;
+ dispatchQInfo[i].dummyCallbackCount = 0;
+ dispatchQInfo[i].priority = IX_QMGR_Q_PRIORITY_2;
+ dispatchQInfo[i].statusWordOffset = 0;
+ dispatchQInfo[i].statusCheckValue = 0;
+ dispatchQInfo[i].statusMask = 0;
+ /*
+ * There are two interrupt registers, 32 bits each. One for the lower
+ * queues(0-31) and one for the upper queues(32-63). Therefore need to
+ * mod by 32 i.e the min upper queue identifier.
+ */
+ dispatchQInfo[i].intRegCheckMask = (1<<(i%(IX_QMGR_MIN_QUEUPP_QID)));
+
+ /*
+ * Set the Q types - will only be used with livelock
+ */
+ ixQMgrQTypes[i] = IX_QMGR_TYPE_REALTIME_OTHER;
+
+ /* Reset queue statistics */
+ dispatcherStats.queueStats[i].callbackCnt = 0;
+ dispatcherStats.queueStats[i].priorityChangeCnt = 0;
+ dispatcherStats.queueStats[i].intNoCallbackCnt = 0;
+ dispatcherStats.queueStats[i].intLostCallbackCnt = 0;
+ dispatcherStats.queueStats[i].notificationEnabled = FALSE;
+ dispatcherStats.queueStats[i].srcSel = 0;
+
+ }
+
+ /* Priority table. Order the table from queue 0 to 63 */
+ ixQMgrDispatcherReBuildPriorityTable();
+
+ /* Reset statistics */
+ dispatcherStats.loopRunCnt = 0;
+
+ /* Get the device ID for the underlying silicon */
+ deviceId = ixFeatureCtrlDeviceRead();
+
+ /* Get the product ID for the underlying silicon */
+ productId = ixFeatureCtrlProductIdRead();
+
+ /*
+ * Check featureCtrl to see if Livelock prevention is required
+ */
+ ixQMgrOrigB0Dispatcher = ixFeatureCtrlSwConfigurationCheck(
+ IX_FEATURECTRL_ORIGB0_DISPATCHER);
+
+ /*
+ * Check if the silicon supports the sticky interrupt feature.
+ * IF (IXP42X AND A0) -> No sticky interrupt feature supported
+ */
+ if ((IX_FEATURE_CTRL_DEVICE_TYPE_IXP42X ==
+ (IX_FEATURE_CTRL_DEVICE_TYPE_MASK & deviceId)) &&
+ (IX_FEATURE_CTRL_SILICON_TYPE_A0 ==
+ (IX_FEATURE_CTRL_SILICON_STEPPING_MASK & productId)))
+ {
+ stickyIntSilicon = FALSE;
+ }
+
+ /*
+ * IF user wants livelock prev option AND silicon supports sticky interrupt
+ * feature -> enable the sticky interrupt bit
+ */
+ if ((IX_FEATURE_CTRL_SWCONFIG_DISABLED == ixQMgrOrigB0Dispatcher) &&
+ stickyIntSilicon)
+ {
+ ixQMgrStickyInterruptRegEnable();
+ }
+}
+
+IX_STATUS
+ixQMgrDispatcherPrioritySet (IxQMgrQId qId,
+ IxQMgrPriority priority)
+{
+ int ixQMgrLockKey;
+
+ if (!ixQMgrQIsConfigured(qId))
+ {
+ return IX_QMGR_Q_NOT_CONFIGURED;
+ }
+
+ if (!IX_QMGR_DISPATCHER_PRIORITY_CHECK(priority))
+ {
+ return IX_QMGR_Q_INVALID_PRIORITY;
+ }
+
+ ixQMgrLockKey = ixOsalIrqLock();
+
+ /* Change priority */
+ dispatchQInfo[qId].priority = priority;
+ /* Set flag */
+ rebuildTable = TRUE;
+
+ ixOsalIrqUnlock(ixQMgrLockKey);
+
+#ifndef NDEBUG
+ /* Update statistics */
+ dispatcherStats.queueStats[qId].priorityChangeCnt++;
+#endif
+
+ return IX_SUCCESS;
+}
+
+IX_STATUS
+ixQMgrNotificationCallbackSet (IxQMgrQId qId,
+ IxQMgrCallback callback,
+ IxQMgrCallbackId callbackId)
+{
+ if (!ixQMgrQIsConfigured(qId))
+ {
+ return IX_QMGR_Q_NOT_CONFIGURED;
+ }
+
+ if (NULL == callback)
+ {
+ /* Reset to dummy callback */
+ dispatchQInfo[qId].callback = dummyCallback;
+ dispatchQInfo[qId].dummyCallbackCount = 0;
+ dispatchQInfo[qId].callbackId = 0;
+ }
+ else
+ {
+ dispatchQInfo[qId].callback = callback;
+ dispatchQInfo[qId].callbackId = callbackId;
+ }
+
+ return IX_SUCCESS;
+}
+
+IX_STATUS
+ixQMgrNotificationEnable (IxQMgrQId qId,
+ IxQMgrSourceId srcSel)
+{
+ IxQMgrQStatus qStatusOnEntry;/* The queue status on entry/exit */
+ IxQMgrQStatus qStatusOnExit; /* to this function */
+ int ixQMgrLockKey;
+
+#ifndef NDEBUG
+ if (!ixQMgrQIsConfigured (qId))
+ {
+ return IX_QMGR_Q_NOT_CONFIGURED;
+ }
+
+ if ((qId < IX_QMGR_MIN_QUEUPP_QID) &&
+ !IX_QMGR_DISPATCHER_SOURCE_ID_CHECK(srcSel))
+ {
+ /* QId 0-31 source id invalid */
+ return IX_QMGR_INVALID_INT_SOURCE_ID;
+ }
+
+ if ((IX_QMGR_Q_SOURCE_ID_NE != srcSel) &&
+ (qId >= IX_QMGR_MIN_QUEUPP_QID))
+ {
+ /*
+ * For queues 32-63 the interrupt source is fixed to the Nearly
+ * Empty status flag and therefore should have a srcSel of NE.
+ */
+ return IX_QMGR_INVALID_INT_SOURCE_ID;
+ }
+#endif
+
+#ifndef NDEBUG
+ dispatcherStats.queueStats[qId].notificationEnabled = TRUE;
+ dispatcherStats.queueStats[qId].srcSel = srcSel;
+#endif
+
+ /* Get the current queue status */
+ ixQMgrAqmIfQueStatRead (qId, &qStatusOnEntry);
+
+ /*
+ * Enabling interrupts results in Read-Modify-Write
+ * so need critical section
+ */
+
+ ixQMgrLockKey = ixOsalIrqLock();
+
+ /* Calculate the checkMask and checkValue for this q */
+ ixQMgrAqmIfQStatusCheckValsCalc (qId,
+ srcSel,
+ &dispatchQInfo[qId].statusWordOffset,
+ &dispatchQInfo[qId].statusCheckValue,
+ &dispatchQInfo[qId].statusMask);
+
+
+ /* Set the interupt source is this queue is in the range 0-31 */
+ if (qId < IX_QMGR_MIN_QUEUPP_QID)
+ {
+ ixQMgrAqmIfIntSrcSelWrite (qId, srcSel);
+ }
+
+ /* Enable the interrupt */
+ ixQMgrAqmIfQInterruptEnable (qId);
+
+ ixOsalIrqUnlock(ixQMgrLockKey);
+
+ /* Get the current queue status */
+ ixQMgrAqmIfQueStatRead (qId, &qStatusOnExit);
+
+ /* If the status has changed return a warning */
+ if (qStatusOnEntry != qStatusOnExit)
+ {
+ return IX_QMGR_WARNING;
+ }
+
+ return IX_SUCCESS;
+}
+
+
+IX_STATUS
+ixQMgrNotificationDisable (IxQMgrQId qId)
+{
+ int ixQMgrLockKey;
+
+#ifndef NDEBUG
+ /* Validate parameters */
+ if (!ixQMgrQIsConfigured (qId))
+ {
+ return IX_QMGR_Q_NOT_CONFIGURED;
+ }
+#endif
+
+ /*
+ * Enabling interrupts results in Read-Modify-Write
+ * so need critical section
+ */
+#ifndef NDEBUG
+ dispatcherStats.queueStats[qId].notificationEnabled = FALSE;
+#endif
+
+ ixQMgrLockKey = ixOsalIrqLock();
+
+ ixQMgrAqmIfQInterruptDisable (qId);
+
+ ixOsalIrqUnlock(ixQMgrLockKey);
+
+ return IX_SUCCESS;
+}
+
+void
+ixQMgrStickyInterruptRegEnable(void)
+{
+ /* Use Aqm If function to set Interrupt Register0 Bit-3 */
+ ixQMgrAqmIfIntSrcSelReg0Bit3Set ();
+}
+
+#if !defined __XSCALE__ || defined __linux
+
+/* Count the number of leading zero bits in a word,
+ * and return the same value than the CLZ instruction.
+ *
+ * word (in) return value (out)
+ * 0x80000000 0
+ * 0x40000000 1
+ * ,,, ,,,
+ * 0x00000002 30
+ * 0x00000001 31
+ * 0x00000000 32
+ *
+ * The C version of this function is used as a replacement
+ * for system not providing the equivalent of the CLZ
+ * assembly language instruction.
+ *
+ * Note that this version is big-endian
+ */
+unsigned int
+ixQMgrCountLeadingZeros(UINT32 word)
+{
+ unsigned int leadingZerosCount = 0;
+
+ if (word == 0)
+ {
+ return 32;
+ }
+ /* search the first bit set by testing the MSB and shifting the input word */
+ while ((word & 0x80000000) == 0)
+ {
+ word <<= 1;
+ leadingZerosCount++;
+ }
+ return leadingZerosCount;
+}
+#endif /* not __XSCALE__ or __linux */
+
+void
+ixQMgrDispatcherLoopGet (IxQMgrDispatcherFuncPtr *qDispatcherFuncPtr)
+{
+ IxFeatureCtrlProductId productId = 0;
+ IxFeatureCtrlDeviceId deviceId = 0;
+
+ /* Get the device ID for the underlying silicon */
+ deviceId = ixFeatureCtrlDeviceRead();
+
+ /* Get the product ID for the underlying silicon */
+ productId = ixFeatureCtrlProductIdRead ();
+
+ /* IF (IXP42X AND A0 silicon) -> use ixQMgrDispatcherLoopRunA0 */
+ if ((IX_FEATURE_CTRL_DEVICE_TYPE_IXP42X ==
+ (IX_FEATURE_CTRL_DEVICE_TYPE_MASK & deviceId)) &&
+ (IX_FEATURE_CTRL_SILICON_TYPE_A0 ==
+ (IX_FEATURE_CTRL_SILICON_STEPPING_MASK & productId)))
+ {
+ /*For IXP42X A0 silicon */
+ *qDispatcherFuncPtr = &ixQMgrDispatcherLoopRunA0 ;
+ }
+ else /*For IXP42X B0 or IXP46X silicon*/
+ {
+ if (IX_FEATURE_CTRL_SWCONFIG_ENABLED == ixQMgrOrigB0Dispatcher)
+ {
+ /* Default for IXP42X B0 and IXP46X silicon */
+ *qDispatcherFuncPtr = &ixQMgrDispatcherLoopRunB0;
+ }
+ else
+ {
+ /* FeatureCtrl indicated that livelock dispatcher be used */
+ *qDispatcherFuncPtr = &ixQMgrDispatcherLoopRunB0LLP;
+ }
+ }
+}
+
+void
+ixQMgrDispatcherLoopRunA0 (IxQMgrDispatchGroup group)
+{
+ UINT32 intRegVal; /* Interrupt reg val */
+ UINT32 intRegValAfterWrite; /* Interrupt reg val after writing back */
+ UINT32 intRegCheckMask; /* Mask for checking interrupt bits */
+ UINT32 qStatusWordsB4Write[MAX_Q_STATUS_WORDS]; /* Status b4 interrupt write */
+ UINT32 qStatusWordsAfterWrite[MAX_Q_STATUS_WORDS]; /* Status after interrupt write */
+ IxQMgrQInfo *currDispatchQInfo;
+ BOOL statusChangeFlag;
+
+ int priorityTableIndex;/* Priority table index */
+ int qIndex; /* Current queue being processed */
+ int endIndex; /* Index of last queue to process */
+
+#ifndef NDEBUG
+ IX_OSAL_ASSERT((group == IX_QMGR_QUEUPP_GROUP) ||
+ (group == IX_QMGR_QUELOW_GROUP));
+#endif
+
+ /* Read Q status registers before interrupt status read/write */
+ ixQMgrAqmIfQStatusRegsRead (group, qStatusWordsB4Write);
+
+ /* Read the interrupt register */
+ ixQMgrAqmIfQInterruptRegRead (group, &intRegVal);
+
+ /* No bit set : nothing to process (the reaminder of the algorithm is
+ * based on the fact that the interrupt register value contains at
+ * least one bit set
+ */
+ if (intRegVal == 0)
+ {
+#ifndef NDEBUG
+ /* Update statistics */
+ dispatcherStats.loopRunCnt++;
+#endif
+
+ /* Rebuild the priority table if needed */
+ if (rebuildTable)
+ {
+ ixQMgrDispatcherReBuildPriorityTable ();
+ }
+
+ return;
+ }
+
+ /* Write it back to clear the interrupt */
+ ixQMgrAqmIfQInterruptRegWrite (group, intRegVal);
+
+ /* Read Q status registers after interrupt status read/write */
+ ixQMgrAqmIfQStatusRegsRead (group, qStatusWordsAfterWrite);
+
+ /* get the first queue Id from the interrupt register value */
+ qIndex = (BITS_PER_WORD - 1) - ixQMgrCountLeadingZeros(intRegVal);
+
+ /* check if any change occured during hw register modifications */
+ if (IX_QMGR_QUELOW_GROUP == group)
+ {
+ statusChangeFlag =
+ (qStatusWordsB4Write[0] != qStatusWordsAfterWrite[0]) ||
+ (qStatusWordsB4Write[1] != qStatusWordsAfterWrite[1]) ||
+ (qStatusWordsB4Write[2] != qStatusWordsAfterWrite[2]) ||
+ (qStatusWordsB4Write[3] != qStatusWordsAfterWrite[3]);
+ }
+ else
+ {
+ statusChangeFlag =
+ (qStatusWordsB4Write[0] != qStatusWordsAfterWrite[0]);
+ /* Set the queue range based on the queue group to proccess */
+ qIndex += IX_QMGR_MIN_QUEUPP_QID;
+ }
+
+ if (statusChangeFlag == FALSE)
+ {
+ /* check if the interrupt register contains
+ * only 1 bit set (happy day scenario)
+ */
+ currDispatchQInfo = &dispatchQInfo[qIndex];
+ if (intRegVal == currDispatchQInfo->intRegCheckMask)
+ {
+ /* only 1 queue event triggered a notification *
+ * Call the callback function for this queue
+ */
+ currDispatchQInfo->callback (qIndex,
+ currDispatchQInfo->callbackId);
+#ifndef NDEBUG
+ /* Update statistics */
+ dispatcherStats.queueStats[qIndex].callbackCnt++;
+#endif
+ }
+ else
+ {
+ /* the event is triggered by more than 1 queue,
+ * the queue search will be starting from the beginning
+ * or the middle of the priority table
+ *
+ * the serach will end when all the bits of the interrupt
+ * register are cleared. There is no need to maintain
+ * a seperate value and test it at each iteration.
+ */
+ if (IX_QMGR_QUELOW_GROUP == group)
+ {
+ /* check if any bit related to queues in the first
+ * half of the priority table is set
+ */
+ if (intRegVal & lowPriorityTableFirstHalfMask)
+ {
+ priorityTableIndex = IX_QMGR_MIN_LOW_QUE_PRIORITY_TABLE_INDEX;
+ }
+ else
+ {
+ priorityTableIndex = IX_QMGR_MID_LOW_QUE_PRIORITY_TABLE_INDEX;
+ }
+ }
+ else
+ {
+ /* check if any bit related to queues in the first
+ * half of the priority table is set
+ */
+ if (intRegVal & uppPriorityTableFirstHalfMask)
+ {
+ priorityTableIndex = IX_QMGR_MIN_UPP_QUE_PRIORITY_TABLE_INDEX;
+ }
+ else
+ {
+ priorityTableIndex = IX_QMGR_MID_UPP_QUE_PRIORITY_TABLE_INDEX;
+ }
+ }
+
+ /* iterate following the priority table until all the bits
+ * of the interrupt register are cleared.
+ */
+ do
+ {
+ qIndex = priorityTable[priorityTableIndex++];
+ currDispatchQInfo = &dispatchQInfo[qIndex];
+ intRegCheckMask = currDispatchQInfo->intRegCheckMask;
+
+ /* If this queue caused this interrupt to be raised */
+ if (intRegVal & intRegCheckMask)
+ {
+ /* Call the callback function for this queue */
+ currDispatchQInfo->callback (qIndex,
+ currDispatchQInfo->callbackId);
+#ifndef NDEBUG
+ /* Update statistics */
+ dispatcherStats.queueStats[qIndex].callbackCnt++;
+#endif
+
+ /* Clear the interrupt register bit */
+ intRegVal &= ~intRegCheckMask;
+ }
+ }
+ while(intRegVal);
+ }
+ }
+ else
+ {
+ /* A change in queue status occured during the hw interrupt
+ * register update. To maintain the interrupt consistency, it
+ * is necessary to iterate through all queues of the queue group.
+ */
+
+ /* Read interrupt status again */
+ ixQMgrAqmIfQInterruptRegRead (group, &intRegValAfterWrite);
+
+ if (IX_QMGR_QUELOW_GROUP == group)
+ {
+ priorityTableIndex = IX_QMGR_MIN_LOW_QUE_PRIORITY_TABLE_INDEX;
+ endIndex = IX_QMGR_MAX_LOW_QUE_PRIORITY_TABLE_INDEX;
+ }
+ else
+ {
+ priorityTableIndex = IX_QMGR_MIN_UPP_QUE_PRIORITY_TABLE_INDEX;
+ endIndex = IX_QMGR_MAX_UPP_QUE_PRIORITY_TABLE_INDEX;
+ }
+
+ for ( ; priorityTableIndex<=endIndex; priorityTableIndex++)
+ {
+ qIndex = priorityTable[priorityTableIndex];
+ currDispatchQInfo = &dispatchQInfo[qIndex];
+ intRegCheckMask = currDispatchQInfo->intRegCheckMask;
+
+ /* If this queue caused this interrupt to be raised */
+ if (intRegVal & intRegCheckMask)
+ {
+ /* Call the callback function for this queue */
+ currDispatchQInfo->callback (qIndex,
+ currDispatchQInfo->callbackId);
+#ifndef NDEBUG
+ /* Update statistics */
+ dispatcherStats.queueStats[qIndex].callbackCnt++;
+#endif
+
+ } /* if (intRegVal .. */
+
+ /*
+ * If interrupt bit is set in intRegValAfterWrite don't
+ * proceed as this will be caught in next interrupt
+ */
+ else if ((intRegValAfterWrite & intRegCheckMask) == 0)
+ {
+ /* Check if an interrupt was lost for this Q */
+ if (ixQMgrAqmIfQStatusCheck(qStatusWordsB4Write,
+ qStatusWordsAfterWrite,
+ currDispatchQInfo->statusWordOffset,
+ currDispatchQInfo->statusCheckValue,
+ currDispatchQInfo->statusMask))
+ {
+ /* Call the callback function for this queue */
+ currDispatchQInfo->callback (qIndex,
+ dispatchQInfo[qIndex].callbackId);
+#ifndef NDEBUG
+ /* Update statistics */
+ dispatcherStats.queueStats[qIndex].callbackCnt++;
+ dispatcherStats.queueStats[qIndex].intLostCallbackCnt++;
+#endif
+ } /* if ixQMgrAqmIfQStatusCheck(.. */
+ } /* else if ((intRegValAfterWrite ... */
+ } /* for (priorityTableIndex=0 ... */
+ }
+
+ /* Rebuild the priority table if needed */
+ if (rebuildTable)
+ {
+ ixQMgrDispatcherReBuildPriorityTable ();
+ }
+
+#ifndef NDEBUG
+ /* Update statistics */
+ dispatcherStats.loopRunCnt++;
+#endif
+}
+
+
+
+void
+ixQMgrDispatcherLoopRunB0 (IxQMgrDispatchGroup group)
+{
+ UINT32 intRegVal; /* Interrupt reg val */
+ UINT32 intRegCheckMask; /* Mask for checking interrupt bits */
+ IxQMgrQInfo *currDispatchQInfo;
+
+
+ int priorityTableIndex; /* Priority table index */
+ int qIndex; /* Current queue being processed */
+
+#ifndef NDEBUG
+ IX_OSAL_ASSERT((group == IX_QMGR_QUEUPP_GROUP) ||
+ (group == IX_QMGR_QUELOW_GROUP));
+ IX_OSAL_ASSERT((group == IX_QMGR_QUEUPP_GROUP) ||
+ (group == IX_QMGR_QUELOW_GROUP));
+#endif
+
+ /* Read the interrupt register */
+ ixQMgrAqmIfQInterruptRegRead (group, &intRegVal);
+
+
+ /* No queue has interrupt register set */
+ if (intRegVal != 0)
+ {
+
+ /* Write it back to clear the interrupt */
+ ixQMgrAqmIfQInterruptRegWrite (group, intRegVal);
+
+ /* get the first queue Id from the interrupt register value */
+ qIndex = (BITS_PER_WORD - 1) - ixQMgrCountLeadingZeros(intRegVal);
+
+ if (IX_QMGR_QUEUPP_GROUP == group)
+ {
+ /* Set the queue range based on the queue group to proccess */
+ qIndex += IX_QMGR_MIN_QUEUPP_QID;
+ }
+
+ /* check if the interrupt register contains
+ * only 1 bit set
+ * For example:
+ * intRegVal = 0x0010
+ * currDispatchQInfo->intRegCheckMask = 0x0010
+ * intRegVal == currDispatchQInfo->intRegCheckMask is TRUE.
+ */
+ currDispatchQInfo = &dispatchQInfo[qIndex];
+ if (intRegVal == currDispatchQInfo->intRegCheckMask)
+ {
+ /* only 1 queue event triggered a notification *
+ * Call the callback function for this queue
+ */
+ currDispatchQInfo->callback (qIndex,
+ currDispatchQInfo->callbackId);
+#ifndef NDEBUG
+ /* Update statistics */
+ dispatcherStats.queueStats[qIndex].callbackCnt++;
+#endif
+ }
+ else
+ {
+ /* the event is triggered by more than 1 queue,
+ * the queue search will be starting from the beginning
+ * or the middle of the priority table
+ *
+ * the serach will end when all the bits of the interrupt
+ * register are cleared. There is no need to maintain
+ * a seperate value and test it at each iteration.
+ */
+ if (IX_QMGR_QUELOW_GROUP == group)
+ {
+ /* check if any bit related to queues in the first
+ * half of the priority table is set
+ */
+ if (intRegVal & lowPriorityTableFirstHalfMask)
+ {
+ priorityTableIndex = IX_QMGR_MIN_LOW_QUE_PRIORITY_TABLE_INDEX;
+ }
+ else
+ {
+ priorityTableIndex = IX_QMGR_MID_LOW_QUE_PRIORITY_TABLE_INDEX;
+ }
+ }
+ else
+ {
+ /* check if any bit related to queues in the first
+ * half of the priority table is set
+ */
+ if (intRegVal & uppPriorityTableFirstHalfMask)
+ {
+ priorityTableIndex = IX_QMGR_MIN_UPP_QUE_PRIORITY_TABLE_INDEX;
+ }
+ else
+ {
+ priorityTableIndex = IX_QMGR_MID_UPP_QUE_PRIORITY_TABLE_INDEX;
+ }
+ }
+
+ /* iterate following the priority table until all the bits
+ * of the interrupt register are cleared.
+ */
+ do
+ {
+ qIndex = priorityTable[priorityTableIndex++];
+ currDispatchQInfo = &dispatchQInfo[qIndex];
+ intRegCheckMask = currDispatchQInfo->intRegCheckMask;
+
+ /* If this queue caused this interrupt to be raised */
+ if (intRegVal & intRegCheckMask)
+ {
+ /* Call the callback function for this queue */
+ currDispatchQInfo->callback (qIndex,
+ currDispatchQInfo->callbackId);
+#ifndef NDEBUG
+ /* Update statistics */
+ dispatcherStats.queueStats[qIndex].callbackCnt++;
+#endif
+
+ /* Clear the interrupt register bit */
+ intRegVal &= ~intRegCheckMask;
+ }
+ }
+ while(intRegVal);
+ } /*End of intRegVal == currDispatchQInfo->intRegCheckMask */
+ } /* End of intRegVal != 0 */
+
+#ifndef NDEBUG
+ /* Update statistics */
+ dispatcherStats.loopRunCnt++;
+#endif
+
+ /* Rebuild the priority table if needed */
+ if (rebuildTable)
+ {
+ ixQMgrDispatcherReBuildPriorityTable ();
+ }
+}
+
+void
+ixQMgrDispatcherLoopRunB0LLP (IxQMgrDispatchGroup group)
+{
+ UINT32 intRegVal =0; /* Interrupt reg val */
+ UINT32 intRegCheckMask; /* Mask for checking interrupt bits */
+ IxQMgrQInfo *currDispatchQInfo;
+
+ int priorityTableIndex; /* Priority table index */
+ int qIndex; /* Current queue being processed */
+
+ UINT32 intRegValCopy = 0;
+ UINT32 intEnableRegVal = 0;
+ UINT8 i = 0;
+
+#ifndef NDEBUG
+ IX_OSAL_ASSERT((group == IX_QMGR_QUEUPP_GROUP) ||
+ (group == IX_QMGR_QUELOW_GROUP));
+#endif
+
+ /* Read the interrupt register */
+ ixQMgrAqmIfQInterruptRegRead (group, &intRegVal);
+
+ /*
+ * mask any interrupts that are not enabled
+ */
+ ixQMgrAqmIfQInterruptEnableRegRead (group, &intEnableRegVal);
+ intRegVal &= intEnableRegVal;
+
+ /* No queue has interrupt register set */
+ if (intRegVal != 0)
+ {
+ if (IX_QMGR_QUELOW_GROUP == group)
+ {
+ /*
+ * As the sticky bit is set, the interrupt register will
+ * not clear if write back at this point because the condition
+ * has not been cleared. Take a copy and write back later after
+ * the condition has been cleared
+ */
+ intRegValCopy = intRegVal;
+ }
+ else
+ {
+ /* no sticky for upper Q's, so write back now */
+ ixQMgrAqmIfQInterruptRegWrite (group, intRegVal);
+ }
+
+ /* get the first queue Id from the interrupt register value */
+ qIndex = (BITS_PER_WORD - 1) - ixQMgrCountLeadingZeros(intRegVal);
+
+ if (IX_QMGR_QUEUPP_GROUP == group)
+ {
+ /* Set the queue range based on the queue group to proccess */
+ qIndex += IX_QMGR_MIN_QUEUPP_QID;
+ }
+
+ /* check if the interrupt register contains
+ * only 1 bit set
+ * For example:
+ * intRegVal = 0x0010
+ * currDispatchQInfo->intRegCheckMask = 0x0010
+ * intRegVal == currDispatchQInfo->intRegCheckMask is TRUE.
+ */
+ currDispatchQInfo = &dispatchQInfo[qIndex];
+ if (intRegVal == currDispatchQInfo->intRegCheckMask)
+ {
+
+ /*
+ * check if Q type periodic - only lower queues can
+ * have there type set to periodic
+ */
+ if (IX_QMGR_TYPE_REALTIME_PERIODIC == ixQMgrQTypes[qIndex])
+ {
+ /*
+ * Disable the notifications on any sporadics
+ */
+ for (i=0; i <= IX_QMGR_MAX_LOW_QUE_TABLE_INDEX; i++)
+ {
+ if (IX_QMGR_TYPE_REALTIME_SPORADIC == ixQMgrQTypes[i])
+ {
+ ixQMgrNotificationDisable(i);
+#ifndef NDEBUG
+ /* Update statistics */
+ dispatcherStats.queueStats[i].disableCount++;
+#endif
+ }
+ }
+ }
+
+ currDispatchQInfo->callback (qIndex,
+ currDispatchQInfo->callbackId);
+#ifndef NDEBUG
+ /* Update statistics */
+ dispatcherStats.queueStats[qIndex].callbackCnt++;
+#endif
+ }
+ else
+ {
+ /* the event is triggered by more than 1 queue,
+ * the queue search will be starting from the beginning
+ * or the middle of the priority table
+ *
+ * the serach will end when all the bits of the interrupt
+ * register are cleared. There is no need to maintain
+ * a seperate value and test it at each iteration.
+ */
+ if (IX_QMGR_QUELOW_GROUP == group)
+ {
+ /* check if any bit related to queues in the first
+ * half of the priority table is set
+ */
+ if (intRegVal & lowPriorityTableFirstHalfMask)
+ {
+ priorityTableIndex =
+ IX_QMGR_MIN_LOW_QUE_PRIORITY_TABLE_INDEX;
+ }
+ else
+ {
+ priorityTableIndex =
+ IX_QMGR_MID_LOW_QUE_PRIORITY_TABLE_INDEX;
+ }
+ }
+ else
+ {
+ /* check if any bit related to queues in the first
+ * half of the priority table is set
+ */
+ if (intRegVal & uppPriorityTableFirstHalfMask)
+ {
+ priorityTableIndex =
+ IX_QMGR_MIN_UPP_QUE_PRIORITY_TABLE_INDEX;
+ }
+ else
+ {
+ priorityTableIndex =
+ IX_QMGR_MID_UPP_QUE_PRIORITY_TABLE_INDEX;
+ }
+ }
+
+ /* iterate following the priority table until all the bits
+ * of the interrupt register are cleared.
+ */
+ do
+ {
+ qIndex = priorityTable[priorityTableIndex++];
+ currDispatchQInfo = &dispatchQInfo[qIndex];
+ intRegCheckMask = currDispatchQInfo->intRegCheckMask;
+
+ /* If this queue caused this interrupt to be raised */
+ if (intRegVal & intRegCheckMask)
+ {
+ /*
+ * check if Q type periodic - only lower queues can
+ * have there type set to periodic. There can only be one
+ * periodic queue, so the sporadics are only disabled once.
+ */
+ if (IX_QMGR_TYPE_REALTIME_PERIODIC == ixQMgrQTypes[qIndex])
+ {
+ /*
+ * Disable the notifications on any sporadics
+ */
+ for (i=0; i <= IX_QMGR_MAX_LOW_QUE_TABLE_INDEX; i++)
+ {
+ if (IX_QMGR_TYPE_REALTIME_SPORADIC ==
+ ixQMgrQTypes[i])
+ {
+ ixQMgrNotificationDisable(i);
+ /*
+ * remove from intRegVal as we don't want
+ * to service any sporadics now
+ */
+ intRegVal &= ~dispatchQInfo[i].intRegCheckMask;
+#ifndef NDEBUG
+ /* Update statistics */
+ dispatcherStats.queueStats[i].disableCount++;
+#endif
+ }
+ }
+ }
+
+ currDispatchQInfo->callback (qIndex,
+ currDispatchQInfo->callbackId);
+#ifndef NDEBUG
+ /* Update statistics */
+ dispatcherStats.queueStats[qIndex].callbackCnt++;
+#endif
+ /* Clear the interrupt register bit */
+ intRegVal &= ~intRegCheckMask;
+ }
+ }
+ while(intRegVal);
+ } /*End of intRegVal == currDispatchQInfo->intRegCheckMask */
+ } /* End of intRegVal != 0 */
+
+#ifndef NDEBUG
+ /* Update statistics */
+ dispatcherStats.loopRunCnt++;
+#endif
+
+ if ((intRegValCopy != 0) && (IX_QMGR_QUELOW_GROUP == group))
+ {
+ /*
+ * lower groups (therefore sticky) AND at least one enabled interrupt
+ * Write back to clear the interrupt
+ */
+ ixQMgrAqmIfQInterruptRegWrite (IX_QMGR_QUELOW_GROUP, intRegValCopy);
+ }
+
+ /* Rebuild the priority table if needed */
+ if (rebuildTable)
+ {
+ ixQMgrDispatcherReBuildPriorityTable ();
+ }
+}
+
+PRIVATE void
+ixQMgrDispatcherReBuildPriorityTable (void)
+{
+ UINT32 qIndex;
+ UINT32 priority;
+ int lowQuePriorityTableIndex = IX_QMGR_MIN_LOW_QUE_PRIORITY_TABLE_INDEX;
+ int uppQuePriorityTableIndex = IX_QMGR_MIN_UPP_QUE_PRIORITY_TABLE_INDEX;
+
+ /* Reset the rebuild flag */
+ rebuildTable = FALSE;
+
+ /* initialize the mak used to identify the queues in the first half
+ * of the priority table
+ */
+ lowPriorityTableFirstHalfMask = 0;
+ uppPriorityTableFirstHalfMask = 0;
+
+ /* For each priority level */
+ for(priority=0; priority<IX_QMGR_NUM_PRIORITY_LEVELS; priority++)
+ {
+ /* Foreach low queue in this priority */
+ for(qIndex=0; qIndex<IX_QMGR_MIN_QUEUPP_QID; qIndex++)
+ {
+ if (dispatchQInfo[qIndex].priority == priority)
+ {
+ /* build the priority table bitmask which match the
+ * queues of the first half of the priority table
+ */
+ if (lowQuePriorityTableIndex < IX_QMGR_MID_LOW_QUE_PRIORITY_TABLE_INDEX)
+ {
+ lowPriorityTableFirstHalfMask |= dispatchQInfo[qIndex].intRegCheckMask;
+ }
+ /* build the priority table */
+ priorityTable[lowQuePriorityTableIndex++] = qIndex;
+ }
+ }
+ /* Foreach upp queue */
+ for(qIndex=IX_QMGR_MIN_QUEUPP_QID; qIndex<=IX_QMGR_MAX_QID; qIndex++)
+ {
+ if (dispatchQInfo[qIndex].priority == priority)
+ {
+ /* build the priority table bitmask which match the
+ * queues of the first half of the priority table
+ */
+ if (uppQuePriorityTableIndex < IX_QMGR_MID_UPP_QUE_PRIORITY_TABLE_INDEX)
+ {
+ uppPriorityTableFirstHalfMask |= dispatchQInfo[qIndex].intRegCheckMask;
+ }
+ /* build the priority table */
+ priorityTable[uppQuePriorityTableIndex++] = qIndex;
+ }
+ }
+ }
+}
+
+IxQMgrDispatcherStats*
+ixQMgrDispatcherStatsGet (void)
+{
+ return &dispatcherStats;
+}
+
+PRIVATE void
+dummyCallback (IxQMgrQId qId,
+ IxQMgrCallbackId cbId)
+{
+ /* Throttle the trace message */
+ if ((dispatchQInfo[qId].dummyCallbackCount % LOG_THROTTLE_COUNT) == 0)
+ {
+ IX_QMGR_LOG_WARNING2("--> dummyCallback: qId (%d), callbackId (%d)\n",qId,cbId);
+ }
+ dispatchQInfo[qId].dummyCallbackCount++;
+
+#ifndef NDEBUG
+ /* Update statistcs */
+ dispatcherStats.queueStats[qId].intNoCallbackCnt++;
+#endif
+}
+void
+ixQMgrLLPShow (int resetStats)
+{
+#ifndef NDEBUG
+ UINT8 i = 0;
+ IxQMgrQInfo *q;
+ UINT32 intEnableRegVal = 0;
+
+ printf ("Livelock statistics are printed on the fly.\n");
+ printf ("qId Type EnableCnt DisableCnt IntEnableState Callbacks\n");
+ printf ("=== ======== ========= ========== ============== =========\n");
+
+ for (i=0; i<= IX_QMGR_MAX_LOW_QUE_TABLE_INDEX; i++)
+ {
+ q = &dispatchQInfo[i];
+
+ if (ixQMgrQTypes[i] != IX_QMGR_TYPE_REALTIME_OTHER)
+ {
+ printf (" %2d ", i);
+
+ if (ixQMgrQTypes[i] == IX_QMGR_TYPE_REALTIME_SPORADIC)
+ {
+ printf ("Sporadic");
+ }
+ else
+ {
+ printf ("Periodic");
+ }
+
+
+ ixQMgrAqmIfQInterruptEnableRegRead (IX_QMGR_QUELOW_GROUP,
+ &intEnableRegVal);
+
+
+ intEnableRegVal &= dispatchQInfo[i].intRegCheckMask;
+ intEnableRegVal = intEnableRegVal >> i;
+
+ printf (" %10d %10d %10d %10d\n",
+ dispatcherStats.queueStats[i].enableCount,
+ dispatcherStats.queueStats[i].disableCount,
+ intEnableRegVal,
+ dispatcherStats.queueStats[i].callbackCnt);
+
+ if (resetStats)
+ {
+ dispatcherStats.queueStats[i].enableCount =
+ dispatcherStats.queueStats[i].disableCount =
+ dispatcherStats.queueStats[i].callbackCnt = 0;
+ }
+ }
+ }
+#else
+ IX_QMGR_LOG0("Livelock Prevention statistics are only collected in debug mode\n");
+#endif
+}
+
+void
+ixQMgrPeriodicDone (void)
+{
+ UINT32 i = 0;
+ UINT32 ixQMgrLockKey = 0;
+
+ /*
+ * for the lower queues
+ */
+ for (i=0; i <= IX_QMGR_MAX_LOW_QUE_TABLE_INDEX; i++)
+ {
+ /*
+ * check for sporadics
+ */
+ if (IX_QMGR_TYPE_REALTIME_SPORADIC == ixQMgrQTypes[i])
+ {
+ /*
+ * enable any sporadics
+ */
+ ixQMgrLockKey = ixOsalIrqLock();
+ ixQMgrAqmIfQInterruptEnable(i);
+ ixOsalIrqUnlock(ixQMgrLockKey);
+#ifndef NDEBUG
+ /*
+ * Update statistics
+ */
+ dispatcherStats.queueStats[i].enableCount++;
+ dispatcherStats.queueStats[i].notificationEnabled = TRUE;
+#endif
+ }
+ }
+}
+IX_STATUS
+ixQMgrCallbackTypeSet (IxQMgrQId qId,
+ IxQMgrType type)
+{
+ UINT32 ixQMgrLockKey = 0;
+ IxQMgrType ixQMgrOldType =0;
+
+#ifndef NDEBUG
+ if (!ixQMgrQIsConfigured(qId))
+ {
+ return IX_QMGR_Q_NOT_CONFIGURED;
+ }
+ if (qId >= IX_QMGR_MIN_QUEUPP_QID)
+ {
+ return IX_QMGR_PARAMETER_ERROR;
+ }
+ if(!IX_QMGR_DISPATCHER_CALLBACK_TYPE_CHECK(type))
+ {
+ return IX_QMGR_PARAMETER_ERROR;
+ }
+#endif
+
+ ixQMgrOldType = ixQMgrQTypes[qId];
+ ixQMgrQTypes[qId] = type;
+
+ /*
+ * check if Q has been changed from type SPORADIC
+ */
+ if (IX_QMGR_TYPE_REALTIME_SPORADIC == ixQMgrOldType)
+ {
+ /*
+ * previously Q was a SPORADIC, this means that LLP
+ * might have had it disabled. enable it now.
+ */
+ ixQMgrLockKey = ixOsalIrqLock();
+ ixQMgrAqmIfQInterruptEnable(qId);
+ ixOsalIrqUnlock(ixQMgrLockKey);
+
+#ifndef NDEBUG
+ /*
+ * Update statistics
+ */
+ dispatcherStats.queueStats[qId].enableCount++;
+#endif
+ }
+
+ return IX_SUCCESS;
+}
+
+IX_STATUS
+ixQMgrCallbackTypeGet (IxQMgrQId qId,
+ IxQMgrType *type)
+{
+#ifndef NDEBUG
+ if (!ixQMgrQIsConfigured(qId))
+ {
+ return IX_QMGR_Q_NOT_CONFIGURED;
+ }
+ if (qId >= IX_QMGR_MIN_QUEUPP_QID)
+ {
+ return IX_QMGR_PARAMETER_ERROR;
+ }
+ if(type == NULL)
+ {
+ return IX_QMGR_PARAMETER_ERROR;
+ }
+#endif
+
+ *type = ixQMgrQTypes[qId];
+ return IX_SUCCESS;
+}
diff --git a/cpu/ixp/npe/IxQMgrInit.c b/cpu/ixp/npe/IxQMgrInit.c
new file mode 100644
index 0000000000..b00c22d08e
--- /dev/null
+++ b/cpu/ixp/npe/IxQMgrInit.c
@@ -0,0 +1,233 @@
+/**
+ * @file IxQMgrInit.c
+ *
+ * @author Intel Corporation
+ * @date 30-Oct-2001
+ *
+ * @brief: Provided initialization of the QMgr component and its subcomponents.
+ *
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+*/
+
+/*
+ * System defined include files.
+ */
+
+/*
+ * User defined include files.
+ */
+#include "IxOsal.h"
+#include "IxQMgr.h"
+#include "IxQMgrQCfg_p.h"
+#include "IxQMgrDispatcher_p.h"
+#include "IxQMgrLog_p.h"
+#include "IxQMgrQAccess_p.h"
+#include "IxQMgrDefines_p.h"
+#include "IxQMgrAqmIf_p.h"
+
+/*
+ * Set to true if initialized
+ * N.B. global so integration/unit tests can reinitialize
+ */
+BOOL qMgrIsInitialized = FALSE;
+
+/*
+ * Function definitions.
+ */
+IX_STATUS
+ixQMgrInit (void)
+{
+ if (qMgrIsInitialized)
+ {
+ IX_QMGR_LOG0("ixQMgrInit: IxQMgr already initialised\n");
+ return IX_FAIL;
+ }
+
+ /* Initialise the QCfg component */
+ ixQMgrQCfgInit ();
+
+ /* Initialise the Dispatcher component */
+ ixQMgrDispatcherInit ();
+
+ /* Initialise the Access component */
+ ixQMgrQAccessInit ();
+
+ /* Initialization complete */
+ qMgrIsInitialized = TRUE;
+
+ return IX_SUCCESS;
+}
+
+IX_STATUS
+ixQMgrUnload (void)
+{
+ if (!qMgrIsInitialized)
+ {
+ return IX_FAIL;
+ }
+
+ /* Uninitialise the QCfg component */
+ ixQMgrQCfgUninit ();
+
+ /* Uninitialization complete */
+ qMgrIsInitialized = FALSE;
+
+ return IX_SUCCESS;
+}
+
+void
+ixQMgrShow (void)
+{
+ IxQMgrQCfgStats *qCfgStats = NULL;
+ IxQMgrDispatcherStats *dispatcherStats = NULL;
+ int i;
+ UINT32 lowIntRegRead, upIntRegRead;
+
+ qCfgStats = ixQMgrQCfgStatsGet ();
+ dispatcherStats = ixQMgrDispatcherStatsGet ();
+ ixQMgrAqmIfQInterruptRegRead (IX_QMGR_QUELOW_GROUP, &lowIntRegRead);
+ ixQMgrAqmIfQInterruptRegRead (IX_QMGR_QUEUPP_GROUP, &upIntRegRead);
+ printf("Generic Stats........\n");
+ printf("=====================\n");
+ printf("Loop Run Count..........%u\n",dispatcherStats->loopRunCnt);
+ printf("Watermark set count.....%d\n", qCfgStats->wmSetCnt);
+ printf("===========================================\n");
+ printf("On the fly Interrupt Register Stats........\n");
+ printf("===========================================\n");
+ printf("Lower Interrupt Register............0x%08x\n",lowIntRegRead);
+ printf("Upper Interrupt Register............0x%08x\n",upIntRegRead);
+ printf("==============================================\n");
+ printf("Queue Specific Stats........\n");
+ printf("============================\n");
+
+ for (i=0; i<IX_QMGR_MAX_NUM_QUEUES; i++)
+ {
+ if (ixQMgrQIsConfigured(i))
+ {
+ ixQMgrQShow(i);
+ }
+ }
+
+ printf("============================\n");
+}
+
+IX_STATUS
+ixQMgrQShow (IxQMgrQId qId)
+{
+ IxQMgrQCfgStats *qCfgStats = NULL;
+ IxQMgrDispatcherStats *dispatcherStats = NULL;
+
+ if (!ixQMgrQIsConfigured(qId))
+ {
+ return IX_QMGR_Q_NOT_CONFIGURED;
+ }
+
+ dispatcherStats = ixQMgrDispatcherStatsGet ();
+ qCfgStats = ixQMgrQCfgQStatsGet (qId);
+
+ printf("QId %d\n", qId);
+ printf("======\n");
+ printf(" IxQMgrQCfg Stats\n");
+ printf(" Name..................... \"%s\"\n", qCfgStats->qStats[qId].qName);
+ printf(" Size in words............ %u\n", qCfgStats->qStats[qId].qSizeInWords);
+ printf(" Entry size in words...... %u\n", qCfgStats->qStats[qId].qEntrySizeInWords);
+ printf(" Nearly empty watermark... %u\n", qCfgStats->qStats[qId].ne);
+ printf(" Nearly full watermark.... %u\n", qCfgStats->qStats[qId].nf);
+ printf(" Number of full entries... %u\n", qCfgStats->qStats[qId].numEntries);
+ printf(" Sram base address........ 0x%X\n", qCfgStats->qStats[qId].baseAddress);
+ printf(" Read pointer............. 0x%X\n", qCfgStats->qStats[qId].readPtr);
+ printf(" Write pointer............ 0x%X\n", qCfgStats->qStats[qId].writePtr);
+
+#ifndef NDEBUG
+ if (dispatcherStats->queueStats[qId].notificationEnabled)
+ {
+ char *localEvent = "none ????";
+ switch (dispatcherStats->queueStats[qId].srcSel)
+ {
+ case IX_QMGR_Q_SOURCE_ID_E:
+ localEvent = "Empty";
+ break;
+ case IX_QMGR_Q_SOURCE_ID_NE:
+ localEvent = "Nearly Empty";
+ break;
+ case IX_QMGR_Q_SOURCE_ID_NF:
+ localEvent = "Nearly Full";
+ break;
+ case IX_QMGR_Q_SOURCE_ID_F:
+ localEvent = "Full";
+ break;
+ case IX_QMGR_Q_SOURCE_ID_NOT_E:
+ localEvent = "Not Empty";
+ break;
+ case IX_QMGR_Q_SOURCE_ID_NOT_NE:
+ localEvent = "Not Nearly Empty";
+ break;
+ case IX_QMGR_Q_SOURCE_ID_NOT_NF:
+ localEvent = "Not Nearly Full";
+ break;
+ case IX_QMGR_Q_SOURCE_ID_NOT_F:
+ localEvent = "Not Full";
+ break;
+ default :
+ break;
+ }
+ printf(" Notifications localEvent...... %s\n", localEvent);
+ }
+ else
+ {
+ printf(" Notifications............ not enabled\n");
+ }
+ printf(" IxQMgrDispatcher Stats\n");
+ printf(" Callback count................%d\n",
+ dispatcherStats->queueStats[qId].callbackCnt);
+ printf(" Priority change count.........%d\n",
+ dispatcherStats->queueStats[qId].priorityChangeCnt);
+ printf(" Interrupt no callback count...%d\n",
+ dispatcherStats->queueStats[qId].intNoCallbackCnt);
+ printf(" Interrupt lost callback count...%d\n",
+ dispatcherStats->queueStats[qId].intLostCallbackCnt);
+#endif
+
+ return IX_SUCCESS;
+}
+
+
+
+
diff --git a/cpu/ixp/npe/IxQMgrQAccess.c b/cpu/ixp/npe/IxQMgrQAccess.c
new file mode 100644
index 0000000000..2c3e302696
--- /dev/null
+++ b/cpu/ixp/npe/IxQMgrQAccess.c
@@ -0,0 +1,796 @@
+/**
+ * @file IxQMgrQAccess.c
+ *
+ * @author Intel Corporation
+ * @date 30-Oct-2001
+ *
+ * @brief This file contains functions for putting entries on a queue and
+ * removing entries from a queue.
+ *
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+*/
+
+/*
+ * Inlines are compiled as function when this is defined.
+ * N.B. Must be placed before #include of "IxQMgr.h"
+ */
+#ifndef IXQMGR_H
+# define IXQMGRQACCESS_C
+#else
+# error
+#endif
+
+/*
+ * System defined include files.
+ */
+
+/*
+ * User defined include files.
+ */
+#include "IxQMgr.h"
+#include "IxQMgrAqmIf_p.h"
+#include "IxQMgrQAccess_p.h"
+#include "IxQMgrQCfg_p.h"
+#include "IxQMgrDefines_p.h"
+
+/*
+ * Global variables and extern definitions
+ */
+extern IxQMgrQInlinedReadWriteInfo ixQMgrQInlinedReadWriteInfo[];
+
+/*
+ * Function definitions.
+ */
+void
+ixQMgrQAccessInit (void)
+{
+}
+
+IX_STATUS
+ixQMgrQReadWithChecks (IxQMgrQId qId,
+ UINT32 *entry)
+{
+ IxQMgrQEntrySizeInWords entrySizeInWords;
+ IxQMgrQInlinedReadWriteInfo *infoPtr;
+
+ if (NULL == entry)
+ {
+ return IX_QMGR_PARAMETER_ERROR;
+ }
+
+ /* Check QId */
+ if (!ixQMgrQIsConfigured(qId))
+ {
+ return IX_QMGR_Q_NOT_CONFIGURED;
+ }
+
+ /* Get the q entry size in words */
+ entrySizeInWords = ixQMgrQEntrySizeInWordsGet (qId);
+
+ ixQMgrAqmIfQPop (qId, entrySizeInWords, entry);
+
+ /* reset the current read count if the counter wrapped around
+ * (unsigned arithmetic)
+ */
+ infoPtr = &ixQMgrQInlinedReadWriteInfo[qId];
+ if (infoPtr->qReadCount-- > infoPtr->qSizeInEntries)
+ {
+ infoPtr->qReadCount = 0;
+ }
+
+ /* Check if underflow occurred on the read */
+ if (ixQMgrAqmIfUnderflowCheck (qId))
+ {
+ return IX_QMGR_Q_UNDERFLOW;
+ }
+
+ return IX_SUCCESS;
+}
+
+/* this function reads the remaining of the q entry
+ * for queues configured with many words.
+ * (the first word of the entry is already read
+ * in the inlined function and the entry pointer already
+ * incremented
+ */
+IX_STATUS
+ixQMgrQReadMWordsMinus1 (IxQMgrQId qId,
+ UINT32 *entry)
+{
+ IxQMgrQInlinedReadWriteInfo *infoPtr = &ixQMgrQInlinedReadWriteInfo[qId];
+ UINT32 entrySize = infoPtr->qEntrySizeInWords;
+ volatile UINT32 *qAccRegAddr = infoPtr->qAccRegAddr;
+
+ while (--entrySize)
+ {
+ /* read the entry and accumulate the result */
+ *(++entry) = IX_OSAL_READ_LONG(++qAccRegAddr);
+ }
+ /* underflow is available for lower queues only */
+ if (qId < IX_QMGR_MIN_QUEUPP_QID)
+ {
+ /* get the queue status */
+ UINT32 status = IX_OSAL_READ_LONG(infoPtr->qUOStatRegAddr);
+
+ /* check the underflow status */
+ if (status & infoPtr->qUflowStatBitMask)
+ {
+ /* the queue is empty
+ * clear the underflow status bit if it was set
+ */
+ IX_OSAL_WRITE_LONG(infoPtr->qUOStatRegAddr,
+ status & ~infoPtr->qUflowStatBitMask);
+ return IX_QMGR_Q_UNDERFLOW;
+ }
+ }
+ return IX_SUCCESS;
+}
+
+IX_STATUS
+ixQMgrQWriteWithChecks (IxQMgrQId qId,
+ UINT32 *entry)
+{
+ IxQMgrQEntrySizeInWords entrySizeInWords;
+ IxQMgrQInlinedReadWriteInfo *infoPtr;
+
+ if (NULL == entry)
+ {
+ return IX_QMGR_PARAMETER_ERROR;
+ }
+
+ /* Check QId */
+ if (!ixQMgrQIsConfigured(qId))
+ {
+ return IX_QMGR_Q_NOT_CONFIGURED;
+ }
+
+ /* Get the q entry size in words */
+ entrySizeInWords = ixQMgrQEntrySizeInWordsGet (qId);
+
+ ixQMgrAqmIfQPush (qId, entrySizeInWords, entry);
+
+ /* reset the current read count if the counter wrapped around
+ * (unsigned arithmetic)
+ */
+ infoPtr = &ixQMgrQInlinedReadWriteInfo[qId];
+ if (infoPtr->qWriteCount++ >= infoPtr->qSizeInEntries)
+ {
+ infoPtr->qWriteCount = infoPtr->qSizeInEntries;
+ }
+
+ /* Check if overflow occurred on the write*/
+ if (ixQMgrAqmIfOverflowCheck (qId))
+ {
+ return IX_QMGR_Q_OVERFLOW;
+ }
+
+ return IX_SUCCESS;
+}
+
+IX_STATUS
+ixQMgrQPeek (IxQMgrQId qId,
+ unsigned int entryIndex,
+ UINT32 *entry)
+{
+ unsigned int numEntries;
+
+#ifndef NDEBUG
+ if ((NULL == entry) || (entryIndex >= IX_QMGR_Q_SIZE_INVALID))
+ {
+ return IX_QMGR_PARAMETER_ERROR;
+ }
+
+ if (!ixQMgrQIsConfigured(qId))
+ {
+ return IX_QMGR_Q_NOT_CONFIGURED;
+ }
+#endif
+
+ if (IX_SUCCESS != ixQMgrQNumEntriesGet (qId, &numEntries))
+ {
+ return IX_FAIL;
+ }
+
+ if (entryIndex >= numEntries) /* entryIndex starts at 0 */
+ {
+ return IX_QMGR_ENTRY_INDEX_OUT_OF_BOUNDS;
+ }
+
+ return ixQMgrAqmIfQPeek (qId, entryIndex, entry);
+}
+
+IX_STATUS
+ixQMgrQPoke (IxQMgrQId qId,
+ unsigned entryIndex,
+ UINT32 *entry)
+{
+ unsigned int numEntries;
+
+#ifndef NDEBUG
+ if ((NULL == entry) || (entryIndex > 128))
+ {
+ return IX_QMGR_PARAMETER_ERROR;
+ }
+
+ if (!ixQMgrQIsConfigured(qId))
+ {
+ return IX_QMGR_Q_NOT_CONFIGURED;
+ }
+#endif
+
+ if (IX_SUCCESS != ixQMgrQNumEntriesGet (qId, &numEntries))
+ {
+ return IX_FAIL;
+ }
+
+ if (numEntries < (entryIndex + 1)) /* entryIndex starts at 0 */
+ {
+ return IX_QMGR_ENTRY_INDEX_OUT_OF_BOUNDS;
+ }
+
+ return ixQMgrAqmIfQPoke (qId, entryIndex, entry);
+}
+
+IX_STATUS
+ixQMgrQStatusGetWithChecks (IxQMgrQId qId,
+ IxQMgrQStatus *qStatus)
+{
+ if (NULL == qStatus)
+ {
+ return IX_QMGR_PARAMETER_ERROR;
+ }
+
+ if (!ixQMgrQIsConfigured (qId))
+ {
+ return IX_QMGR_Q_NOT_CONFIGURED;
+ }
+
+ ixQMgrAqmIfQueStatRead (qId, qStatus);
+
+ return IX_SUCCESS;
+}
+
+IX_STATUS
+ixQMgrQNumEntriesGet (IxQMgrQId qId,
+ unsigned *numEntriesPtr)
+{
+ UINT32 qPtrs;
+ UINT32 qStatus;
+ unsigned numEntries;
+ IxQMgrQInlinedReadWriteInfo *infoPtr;
+
+
+#ifndef NDEBUG
+ if (NULL == numEntriesPtr)
+ {
+ return IX_QMGR_PARAMETER_ERROR;
+ }
+
+ /* Check QId */
+ if (!ixQMgrQIsConfigured(qId))
+ {
+ return IX_QMGR_Q_NOT_CONFIGURED;
+ }
+#endif
+
+ /* get fast access data */
+ infoPtr = &ixQMgrQInlinedReadWriteInfo[qId];
+
+ /* get snapshot */
+ qPtrs = IX_OSAL_READ_LONG(infoPtr->qConfigRegAddr);
+
+ /* Mod subtraction of pointers to get number of words in Q. */
+ numEntries = (qPtrs - (qPtrs >> 7)) & 0x7f;
+
+ if (numEntries == 0)
+ {
+ /*
+ * Could mean either full or empty queue
+ * so look at status
+ */
+ ixQMgrAqmIfQueStatRead (qId, &qStatus);
+
+ if (qId < IX_QMGR_MIN_QUEUPP_QID)
+ {
+ if (qStatus & IX_QMGR_Q_STATUS_E_BIT_MASK)
+ {
+ /* Empty */
+ *numEntriesPtr = 0;
+ }
+ else if (qStatus & IX_QMGR_Q_STATUS_F_BIT_MASK)
+ {
+ /* Full */
+ *numEntriesPtr = infoPtr->qSizeInEntries;
+ }
+ else
+ {
+ /*
+ * Queue status and read/write pointers are volatile.
+ * The queue state has changed since we took the
+ * snapshot of the read and write pointers.
+ * Client can retry if they wish
+ */
+ *numEntriesPtr = 0;
+ return IX_QMGR_WARNING;
+ }
+ }
+ else /* It is an upper queue which does not have an empty status bit maintained */
+ {
+ if (qStatus & IX_QMGR_Q_STATUS_F_BIT_MASK)
+ {
+ /* The queue is Full at the time of snapshot. */
+ *numEntriesPtr = infoPtr->qSizeInEntries;
+ }
+ else
+ {
+ /* The queue is either empty, either moving,
+ * Client can retry if they wish
+ */
+ *numEntriesPtr = 0;
+ return IX_QMGR_WARNING;
+ }
+ }
+ }
+ else
+ {
+ *numEntriesPtr = (numEntries / infoPtr->qEntrySizeInWords) & (infoPtr->qSizeInEntries - 1);
+ }
+
+ return IX_SUCCESS;
+}
+
+#if defined(__wince) && defined(NO_INLINE_APIS)
+
+PUBLIC IX_STATUS
+ixQMgrQRead (IxQMgrQId qId,
+ UINT32 *entryPtr)
+{
+ extern IxQMgrQInlinedReadWriteInfo ixQMgrQInlinedReadWriteInfo[];
+ IxQMgrQInlinedReadWriteInfo *infoPtr = &ixQMgrQInlinedReadWriteInfo[qId];
+ UINT32 entry, entrySize;
+
+ /* get a new entry */
+ entrySize = infoPtr->qEntrySizeInWords;
+ entry = IX_OSAL_READ_LONG(infoPtr->qAccRegAddr);
+
+ if (entrySize != IX_QMGR_Q_ENTRY_SIZE1)
+ {
+ *entryPtr = entry;
+ /* process the remaining part of the entry */
+ return ixQMgrQReadMWordsMinus1(qId, entryPtr);
+ }
+
+ /* underflow is available for lower queues only */
+ if (qId < IX_QMGR_MIN_QUEUPP_QID)
+ {
+ /* the counter of queue entries is decremented. In happy
+ * day scenario there are many entries in the queue
+ * and the counter does not reach zero.
+ */
+ if (infoPtr->qReadCount-- == 0)
+ {
+ /* There is maybe no entry in the queue
+ * qReadCount is now negative, but will be corrected before
+ * the function returns.
+ */
+ UINT32 qPtrs; /* queue internal pointers */
+
+ /* when a queue is empty, the hw guarantees to return
+ * a null value. If the value is not null, the queue is
+ * not empty.
+ */
+ if (entry == 0)
+ {
+ /* get the queue status */
+ UINT32 status = IX_OSAL_READ_LONG(infoPtr->qUOStatRegAddr);
+
+ /* check the underflow status */
+ if (status & infoPtr->qUflowStatBitMask)
+ {
+ /* the queue is empty
+ * clear the underflow status bit if it was set
+ */
+ IX_OSAL_WRITE_LONG(infoPtr->qUOStatRegAddr,
+ status & ~infoPtr->qUflowStatBitMask);
+ *entryPtr = 0;
+ infoPtr->qReadCount = 0;
+ return IX_QMGR_Q_UNDERFLOW;
+ }
+ }
+ /* store the result */
+ *entryPtr = entry;
+
+ /* No underflow occured : someone is filling the queue
+ * or the queue contains null entries.
+ * The current counter needs to be
+ * updated from the current number of entries in the queue
+ */
+
+ /* get snapshot of queue pointers */
+ qPtrs = IX_OSAL_READ_LONG(infoPtr->qConfigRegAddr);
+
+ /* Mod subtraction of pointers to get number of words in Q. */
+ qPtrs = (qPtrs - (qPtrs >> 7)) & 0x7f;
+
+ if (qPtrs == 0)
+ {
+ /* no entry in the queue */
+ infoPtr->qReadCount = 0;
+ }
+ else
+ {
+ /* convert the number of words inside the queue
+ * to a number of entries
+ */
+ infoPtr->qReadCount = qPtrs & (infoPtr->qSizeInEntries - 1);
+ }
+ return IX_SUCCESS;
+ }
+ }
+ *entryPtr = entry;
+ return IX_SUCCESS;
+}
+
+PUBLIC IX_STATUS
+ixQMgrQBurstRead (IxQMgrQId qId,
+ UINT32 numEntries,
+ UINT32 *entries)
+{
+ extern IxQMgrQInlinedReadWriteInfo ixQMgrQInlinedReadWriteInfo[];
+ IxQMgrQInlinedReadWriteInfo *infoPtr = &ixQMgrQInlinedReadWriteInfo[qId];
+ UINT32 nullCheckEntry;
+
+ if (infoPtr->qEntrySizeInWords == IX_QMGR_Q_ENTRY_SIZE1)
+ {
+ volatile UINT32 *qAccRegAddr = infoPtr->qAccRegAddr;
+
+ /* the code is optimized to take care of data dependencies:
+ * Durig a read, there are a few cycles needed to get the
+ * read complete. During these cycles, it is poossible to
+ * do some CPU, e.g. increment pointers and decrement
+ * counters.
+ */
+
+ /* fetch a queue entry */
+ nullCheckEntry = IX_OSAL_READ_LONG(infoPtr->qAccRegAddr);
+
+ /* iterate the specified number of queue entries */
+ while (--numEntries)
+ {
+ /* check the result of the previous read */
+ if (nullCheckEntry == 0)
+ {
+ /* if we read a NULL entry, stop. We have underflowed */
+ break;
+ }
+ else
+ {
+ /* write the entry */
+ *entries = nullCheckEntry;
+ /* fetch next entry */
+ nullCheckEntry = IX_OSAL_READ_LONG(qAccRegAddr);
+ /* increment the write address */
+ entries++;
+ }
+ }
+ /* write the pre-fetched entry */
+ *entries = nullCheckEntry;
+ }
+ else
+ {
+ IxQMgrQEntrySizeInWords entrySizeInWords = infoPtr->qEntrySizeInWords;
+ /* read the specified number of queue entries */
+ nullCheckEntry = 0;
+ while (numEntries--)
+ {
+ int i;
+
+ for (i = 0; i < entrySizeInWords; i++)
+ {
+ *entries = IX_OSAL_READ_LONG(infoPtr->qAccRegAddr + i);
+ nullCheckEntry |= *entries++;
+ }
+
+ /* if we read a NULL entry, stop. We have underflowed */
+ if (nullCheckEntry == 0)
+ {
+ break;
+ }
+ nullCheckEntry = 0;
+ }
+ }
+
+ /* reset the current read count : next access to the read function
+ * will force a underflow status check
+ */
+ infoPtr->qWriteCount = 0;
+
+ /* Check if underflow occurred on the read */
+ if (nullCheckEntry == 0 && qId < IX_QMGR_MIN_QUEUPP_QID)
+ {
+ /* get the queue status */
+ UINT32 status = IX_OSAL_READ_LONG(infoPtr->qUOStatRegAddr);
+
+ if (status & infoPtr->qUflowStatBitMask)
+ {
+ /* clear the underflow status bit if it was set */
+ IX_OSAL_WRITE_LONG(infoPtr->qUOStatRegAddr,
+ status & ~infoPtr->qUflowStatBitMask);
+ return IX_QMGR_Q_UNDERFLOW;
+ }
+ }
+
+ return IX_SUCCESS;
+}
+
+PUBLIC IX_STATUS
+ixQMgrQWrite (IxQMgrQId qId,
+ UINT32 *entry)
+{
+ extern IxQMgrQInlinedReadWriteInfo ixQMgrQInlinedReadWriteInfo[];
+ IxQMgrQInlinedReadWriteInfo *infoPtr = &ixQMgrQInlinedReadWriteInfo[qId];
+ UINT32 entrySize;
+
+ /* write the entry */
+ IX_OSAL_WRITE_LONG(infoPtr->qAccRegAddr, *entry);
+ entrySize = infoPtr->qEntrySizeInWords;
+
+ if (entrySize != IX_QMGR_Q_ENTRY_SIZE1)
+ {
+ /* process the remaining part of the entry */
+ volatile UINT32 *qAccRegAddr = infoPtr->qAccRegAddr;
+ while (--entrySize)
+ {
+ ++entry;
+ IX_OSAL_WRITE_LONG(++qAccRegAddr, *entry);
+ }
+ entrySize = infoPtr->qEntrySizeInWords;
+ }
+
+ /* overflow is available for lower queues only */
+ if (qId < IX_QMGR_MIN_QUEUPP_QID)
+ {
+ UINT32 qSize = infoPtr->qSizeInEntries;
+ /* increment the current number of entries in the queue
+ * and check for overflow
+ */
+ if (infoPtr->qWriteCount++ == qSize)
+ {
+ /* the queue may have overflow */
+ UINT32 qPtrs; /* queue internal pointers */
+
+ /* get the queue status */
+ UINT32 status = IX_OSAL_READ_LONG(infoPtr->qUOStatRegAddr);
+
+ /* read the status twice because the status may
+ * not be immediately ready after the write operation
+ */
+ if ((status & infoPtr->qOflowStatBitMask) ||
+ ((status = IX_OSAL_READ_LONG(infoPtr->qUOStatRegAddr))
+ & infoPtr->qOflowStatBitMask))
+ {
+ /* the queue is full, clear the overflow status
+ * bit if it was set
+ */
+ IX_OSAL_WRITE_LONG(infoPtr->qUOStatRegAddr,
+ status & ~infoPtr->qOflowStatBitMask);
+ infoPtr->qWriteCount = infoPtr->qSizeInEntries;
+ return IX_QMGR_Q_OVERFLOW;
+ }
+ /* No overflow occured : someone is draining the queue
+ * and the current counter needs to be
+ * updated from the current number of entries in the queue
+ */
+
+ /* get q pointer snapshot */
+ qPtrs = IX_OSAL_READ_LONG(infoPtr->qConfigRegAddr);
+
+ /* Mod subtraction of pointers to get number of words in Q. */
+ qPtrs = (qPtrs - (qPtrs >> 7)) & 0x7f;
+
+ if (qPtrs == 0)
+ {
+ /* the queue may be full at the time of the
+ * snapshot. Next access will check
+ * the overflow status again.
+ */
+ infoPtr->qWriteCount = qSize;
+ }
+ else
+ {
+ /* convert the number of words to a number of entries */
+ if (entrySize == IX_QMGR_Q_ENTRY_SIZE1)
+ {
+ infoPtr->qWriteCount = qPtrs & (qSize - 1);
+ }
+ else
+ {
+ infoPtr->qWriteCount = (qPtrs / entrySize) & (qSize - 1);
+ }
+ }
+ }
+ }
+ return IX_SUCCESS;
+}
+
+PUBLIC IX_STATUS
+ixQMgrQBurstWrite (IxQMgrQId qId,
+ unsigned numEntries,
+ UINT32 *entries)
+{
+ extern IxQMgrQInlinedReadWriteInfo ixQMgrQInlinedReadWriteInfo[];
+ IxQMgrQInlinedReadWriteInfo *infoPtr = &ixQMgrQInlinedReadWriteInfo[qId];
+ UINT32 status;
+
+ /* update the current write count */
+ infoPtr->qWriteCount += numEntries;
+
+ if (infoPtr->qEntrySizeInWords == IX_QMGR_Q_ENTRY_SIZE1)
+ {
+ volatile UINT32 *qAccRegAddr = infoPtr->qAccRegAddr;
+ while (numEntries--)
+ {
+ IX_OSAL_WRITE_LONG(qAccRegAddr, *entries);
+ entries++;
+ }
+ }
+ else
+ {
+ IxQMgrQEntrySizeInWords entrySizeInWords = infoPtr->qEntrySizeInWords;
+ int i;
+
+ /* write each queue entry */
+ while (numEntries--)
+ {
+ /* write the queueEntrySize number of words for each entry */
+ for (i = 0; i < entrySizeInWords; i++)
+ {
+ IX_OSAL_WRITE_LONG((infoPtr->qAccRegAddr + i), *entries);
+ entries++;
+ }
+ }
+ }
+
+ /* check if the write count overflows */
+ if (infoPtr->qWriteCount > infoPtr->qSizeInEntries)
+ {
+ /* reset the current write count */
+ infoPtr->qWriteCount = infoPtr->qSizeInEntries;
+ }
+
+ /* Check if overflow occurred on the write operation */
+ if (qId < IX_QMGR_MIN_QUEUPP_QID)
+ {
+ /* get the queue status */
+ status = IX_OSAL_READ_LONG(infoPtr->qUOStatRegAddr);
+
+ /* read the status twice because the status may
+ * not be ready at the time of the write
+ */
+ if ((status & infoPtr->qOflowStatBitMask) ||
+ ((status = IX_OSAL_READ_LONG(infoPtr->qUOStatRegAddr))
+ & infoPtr->qOflowStatBitMask))
+ {
+ /* clear the underflow status bit if it was set */
+ IX_OSAL_WRITE_LONG(infoPtr->qUOStatRegAddr,
+ status & ~infoPtr->qOflowStatBitMask);
+ return IX_QMGR_Q_OVERFLOW;
+ }
+ }
+
+ return IX_SUCCESS;
+}
+
+PUBLIC IX_STATUS
+ixQMgrQStatusGet (IxQMgrQId qId,
+ IxQMgrQStatus *qStatus)
+{
+ /* read the status of a queue in the range 0-31 */
+ if (qId < IX_QMGR_MIN_QUEUPP_QID)
+ {
+ extern UINT32 ixQMgrAqmIfQueLowStatRegAddr[];
+ extern UINT32 ixQMgrAqmIfQueLowStatBitsOffset[];
+ extern UINT32 ixQMgrAqmIfQueLowStatBitsMask;
+ extern IxQMgrQInlinedReadWriteInfo ixQMgrQInlinedReadWriteInfo[];
+ IxQMgrQInlinedReadWriteInfo *infoPtr = &ixQMgrQInlinedReadWriteInfo[qId];
+ volatile UINT32 *lowStatRegAddr = (UINT32*)ixQMgrAqmIfQueLowStatRegAddr[qId];
+ volatile UINT32 *qUOStatRegAddr = infoPtr->qUOStatRegAddr;
+
+ UINT32 lowStatBitsOffset = ixQMgrAqmIfQueLowStatBitsOffset[qId];
+ UINT32 lowStatBitsMask = ixQMgrAqmIfQueLowStatBitsMask;
+ UINT32 underflowBitMask = infoPtr->qUflowStatBitMask;
+ UINT32 overflowBitMask = infoPtr->qOflowStatBitMask;
+
+ /* read the status register for this queue */
+ *qStatus = IX_OSAL_READ_LONG(lowStatRegAddr);
+ /* mask out the status bits relevant only to this queue */
+ *qStatus = (*qStatus >> lowStatBitsOffset) & lowStatBitsMask;
+
+ /* Check if the queue has overflowed */
+ if (IX_OSAL_READ_LONG(qUOStatRegAddr) & overflowBitMask)
+ {
+ /* clear the overflow status bit if it was set */
+ IX_OSAL_WRITE_LONG(qUOStatRegAddr,
+ (IX_OSAL_READ_LONG(qUOStatRegAddr) &
+ ~overflowBitMask));
+ *qStatus |= IX_QMGR_Q_STATUS_OF_BIT_MASK;
+ }
+
+ /* Check if the queue has underflowed */
+ if (IX_OSAL_READ_LONG(qUOStatRegAddr) & underflowBitMask)
+ {
+ /* clear the underflow status bit if it was set */
+ IX_OSAL_WRITE_LONG(qUOStatRegAddr,
+ (IX_OSAL_READ_LONG(qUOStatRegAddr) &
+ ~underflowBitMask));
+ *qStatus |= IX_QMGR_Q_STATUS_UF_BIT_MASK;
+ }
+ }
+ else /* read status of a queue in the range 32-63 */
+ {
+ extern UINT32 ixQMgrAqmIfQueUppStat0RegAddr;
+ extern UINT32 ixQMgrAqmIfQueUppStat1RegAddr;
+ extern UINT32 ixQMgrAqmIfQueUppStat0BitMask[];
+ extern UINT32 ixQMgrAqmIfQueUppStat1BitMask[];
+
+ volatile UINT32 *qNearEmptyStatRegAddr = (UINT32*)ixQMgrAqmIfQueUppStat0RegAddr;
+ volatile UINT32 *qFullStatRegAddr = (UINT32*)ixQMgrAqmIfQueUppStat1RegAddr;
+ int maskIndex = qId - IX_QMGR_MIN_QUEUPP_QID;
+ UINT32 qNearEmptyStatBitMask = ixQMgrAqmIfQueUppStat0BitMask[maskIndex];
+ UINT32 qFullStatBitMask = ixQMgrAqmIfQueUppStat1BitMask[maskIndex];
+
+ /* Reset the status bits */
+ *qStatus = 0;
+
+ /* Check if the queue is nearly empty */
+ if (IX_OSAL_READ_LONG(qNearEmptyStatRegAddr) & qNearEmptyStatBitMask)
+ {
+ *qStatus |= IX_QMGR_Q_STATUS_NE_BIT_MASK;
+ }
+
+ /* Check if the queue is full */
+ if (IX_OSAL_READ_LONG(qFullStatRegAddr) & qFullStatBitMask)
+ {
+ *qStatus |= IX_QMGR_Q_STATUS_F_BIT_MASK;
+ }
+ }
+ return IX_SUCCESS;
+}
+#endif /* def NO_INLINE_APIS */
diff --git a/cpu/ixp/npe/IxQMgrQCfg.c b/cpu/ixp/npe/IxQMgrQCfg.c
new file mode 100644
index 0000000000..ec7d837c38
--- /dev/null
+++ b/cpu/ixp/npe/IxQMgrQCfg.c
@@ -0,0 +1,543 @@
+/**
+ * @file QMgrQCfg.c
+ *
+ * @author Intel Corporation
+ * @date 30-Oct-2001
+ *
+ * @brief This modules provides an interface for setting up the static
+ * configuration of AQM queues.This file contains the following
+ * functions:
+ *
+ *
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+*/
+
+/*
+ * System defined include files.
+ */
+
+/*
+ * User defined include files.
+ */
+#include "IxOsal.h"
+#include "IxQMgr.h"
+#include "IxQMgrAqmIf_p.h"
+#include "IxQMgrQCfg_p.h"
+#include "IxQMgrDefines_p.h"
+
+/*
+ * #defines and macros used in this file.
+ */
+
+#define IX_QMGR_MIN_ENTRY_SIZE_IN_WORDS 16
+
+/* Total size of SRAM */
+#define IX_QMGR_AQM_SRAM_SIZE_IN_BYTES 0x4000
+
+/*
+ * Check that qId is a valid queue identifier. This is provided to
+ * make the code easier to read.
+ */
+#define IX_QMGR_QID_IS_VALID(qId) \
+(((qId) >= (IX_QMGR_MIN_QID)) && ((qId) <= (IX_QMGR_MAX_QID)))
+
+/*
+ * Typedefs whose scope is limited to this file.
+ */
+
+/*
+ * This struct describes an AQM queue.
+ * N.b. bufferSizeInWords and qEntrySizeInWords are stored in the queue
+ * as these are requested by Access in the data path. sizeInEntries is
+ * not required by the data path so it can be calculated dynamically.
+ *
+ */
+typedef struct
+{
+ char qName[IX_QMGR_MAX_QNAME_LEN+1]; /* Textual description of a queue*/
+ IxQMgrQSizeInWords qSizeInWords; /* The number of words in the queue */
+ IxQMgrQEntrySizeInWords qEntrySizeInWords; /* Number of words per queue entry*/
+ BOOL isConfigured; /* This flag is TRUE if the queue has
+ * been configured
+ */
+} IxQMgrCfgQ;
+
+/*
+ * Variable declarations global to this file. Externs are followed by
+ * statics.
+ */
+
+extern UINT32 * ixQMgrAqmIfQueAccRegAddr[];
+
+/* Store data required to inline read and write access
+ */
+IxQMgrQInlinedReadWriteInfo ixQMgrQInlinedReadWriteInfo[IX_QMGR_MAX_NUM_QUEUES];
+
+static IxQMgrCfgQ cfgQueueInfo[IX_QMGR_MAX_NUM_QUEUES];
+
+/* This pointer holds the starting address of AQM SRAM not used by
+ * the AQM queues.
+ */
+static UINT32 freeSramAddress=0;
+
+/* 4 words of zeroed memory for inline access */
+static UINT32 zeroedPlaceHolder[4] = { 0, 0, 0, 0 };
+
+static BOOL cfgInitialized = FALSE;
+
+static IxOsalMutex ixQMgrQCfgMutex;
+
+/*
+ * Statistics
+ */
+static IxQMgrQCfgStats stats;
+
+/*
+ * Function declarations
+ */
+PRIVATE BOOL
+watermarkLevelIsOk (IxQMgrQId qId, IxQMgrWMLevel level);
+
+PRIVATE BOOL
+qSizeInWordsIsOk (IxQMgrQSizeInWords qSize);
+
+PRIVATE BOOL
+qEntrySizeInWordsIsOk (IxQMgrQEntrySizeInWords entrySize);
+
+/*
+ * Function definitions.
+ */
+void
+ixQMgrQCfgInit (void)
+{
+ int loopIndex;
+
+ for (loopIndex=0; loopIndex < IX_QMGR_MAX_NUM_QUEUES;loopIndex++)
+ {
+ /* info for code inlining */
+ ixQMgrAqmIfQueAccRegAddr[loopIndex] = zeroedPlaceHolder;
+
+ /* info for code inlining */
+ ixQMgrQInlinedReadWriteInfo[loopIndex].qReadCount = 0;
+ ixQMgrQInlinedReadWriteInfo[loopIndex].qWriteCount = 0;
+ ixQMgrQInlinedReadWriteInfo[loopIndex].qAccRegAddr = zeroedPlaceHolder;
+ ixQMgrQInlinedReadWriteInfo[loopIndex].qUOStatRegAddr = zeroedPlaceHolder;
+ ixQMgrQInlinedReadWriteInfo[loopIndex].qUflowStatBitMask = 0;
+ ixQMgrQInlinedReadWriteInfo[loopIndex].qOflowStatBitMask = 0;
+ ixQMgrQInlinedReadWriteInfo[loopIndex].qEntrySizeInWords = 0;
+ ixQMgrQInlinedReadWriteInfo[loopIndex].qSizeInEntries = 0;
+ ixQMgrQInlinedReadWriteInfo[loopIndex].qConfigRegAddr = zeroedPlaceHolder;
+ }
+
+ /* Initialise the AqmIf component */
+ ixQMgrAqmIfInit ();
+
+ /* Reset all queues to have queue name = NULL, entry size = 0 and
+ * isConfigured = false
+ */
+ for (loopIndex=0; loopIndex < IX_QMGR_MAX_NUM_QUEUES;loopIndex++)
+ {
+ strcpy (cfgQueueInfo[loopIndex].qName, "");
+ cfgQueueInfo[loopIndex].qSizeInWords = 0;
+ cfgQueueInfo[loopIndex].qEntrySizeInWords = 0;
+ cfgQueueInfo[loopIndex].isConfigured = FALSE;
+
+ /* Statistics */
+ stats.qStats[loopIndex].isConfigured = FALSE;
+ stats.qStats[loopIndex].qName = cfgQueueInfo[loopIndex].qName;
+ }
+
+ /* Statistics */
+ stats.wmSetCnt = 0;
+
+ ixQMgrAqmIfSramBaseAddressGet (&freeSramAddress);
+
+ ixOsalMutexInit(&ixQMgrQCfgMutex);
+
+ cfgInitialized = TRUE;
+}
+
+void
+ixQMgrQCfgUninit (void)
+{
+ cfgInitialized = FALSE;
+
+ /* Uninitialise the AqmIf component */
+ ixQMgrAqmIfUninit ();
+}
+
+IX_STATUS
+ixQMgrQConfig (char *qName,
+ IxQMgrQId qId,
+ IxQMgrQSizeInWords qSizeInWords,
+ IxQMgrQEntrySizeInWords qEntrySizeInWords)
+{
+ UINT32 aqmLocalBaseAddress;
+
+ if (!cfgInitialized)
+ {
+ return IX_FAIL;
+ }
+
+ if (!IX_QMGR_QID_IS_VALID(qId))
+ {
+ return IX_QMGR_INVALID_Q_ID;
+ }
+
+ else if (NULL == qName)
+ {
+ return IX_QMGR_PARAMETER_ERROR;
+ }
+
+ else if (strlen (qName) > IX_QMGR_MAX_QNAME_LEN)
+ {
+ return IX_QMGR_PARAMETER_ERROR;
+ }
+
+ else if (!qSizeInWordsIsOk (qSizeInWords))
+ {
+ return IX_QMGR_INVALID_QSIZE;
+ }
+
+ else if (!qEntrySizeInWordsIsOk (qEntrySizeInWords))
+ {
+ return IX_QMGR_INVALID_Q_ENTRY_SIZE;
+ }
+
+ else if (cfgQueueInfo[qId].isConfigured)
+ {
+ return IX_QMGR_Q_ALREADY_CONFIGURED;
+ }
+
+ ixOsalMutexLock(&ixQMgrQCfgMutex, IX_OSAL_WAIT_FOREVER);
+
+ /* Write the config register */
+ ixQMgrAqmIfQueCfgWrite (qId,
+ qSizeInWords,
+ qEntrySizeInWords,
+ freeSramAddress);
+
+
+ strcpy (cfgQueueInfo[qId].qName, qName);
+ cfgQueueInfo[qId].qSizeInWords = qSizeInWords;
+ cfgQueueInfo[qId].qEntrySizeInWords = qEntrySizeInWords;
+
+ /* store pre-computed information in the same cache line
+ * to facilitate inlining of QRead and QWrite functions
+ * in IxQMgr.h
+ */
+ ixQMgrQInlinedReadWriteInfo[qId].qReadCount = 0;
+ ixQMgrQInlinedReadWriteInfo[qId].qWriteCount = 0;
+ ixQMgrQInlinedReadWriteInfo[qId].qEntrySizeInWords = qEntrySizeInWords;
+ ixQMgrQInlinedReadWriteInfo[qId].qSizeInEntries =
+ (UINT32)qSizeInWords / (UINT32)qEntrySizeInWords;
+
+ /* Calculate the new freeSramAddress from the size of the queue
+ * currently being configured.
+ */
+ freeSramAddress += (qSizeInWords * IX_QMGR_NUM_BYTES_PER_WORD);
+
+ /* Get the virtual SRAM address */
+ ixQMgrAqmIfBaseAddressGet (&aqmLocalBaseAddress);
+
+ IX_OSAL_ASSERT((freeSramAddress - (aqmLocalBaseAddress + (IX_QMGR_QUEBUFFER_SPACE_OFFSET))) <=
+ IX_QMGR_QUE_BUFFER_SPACE_SIZE);
+
+ /* The queue is now configured */
+ cfgQueueInfo[qId].isConfigured = TRUE;
+
+ ixOsalMutexUnlock(&ixQMgrQCfgMutex);
+
+#ifndef NDEBUG
+ /* Update statistics */
+ stats.qStats[qId].isConfigured = TRUE;
+ stats.qStats[qId].qName = cfgQueueInfo[qId].qName;
+#endif
+ return IX_SUCCESS;
+}
+
+IxQMgrQSizeInWords
+ixQMgrQSizeInWordsGet (IxQMgrQId qId)
+{
+ /* No parameter checking as this is used on the data path */
+ return (cfgQueueInfo[qId].qSizeInWords);
+}
+
+IX_STATUS
+ixQMgrQSizeInEntriesGet (IxQMgrQId qId,
+ unsigned *qSizeInEntries)
+{
+ if (!ixQMgrQIsConfigured(qId))
+ {
+ return IX_QMGR_Q_NOT_CONFIGURED;
+ }
+
+ if(NULL == qSizeInEntries)
+ {
+ return IX_QMGR_PARAMETER_ERROR;
+ }
+
+ *qSizeInEntries = (UINT32)(cfgQueueInfo[qId].qSizeInWords) /
+ (UINT32)cfgQueueInfo[qId].qEntrySizeInWords;
+
+ return IX_SUCCESS;
+}
+
+IxQMgrQEntrySizeInWords
+ixQMgrQEntrySizeInWordsGet (IxQMgrQId qId)
+{
+ /* No parameter checking as this is used on the data path */
+ return (cfgQueueInfo[qId].qEntrySizeInWords);
+}
+
+IX_STATUS
+ixQMgrWatermarkSet (IxQMgrQId qId,
+ IxQMgrWMLevel ne,
+ IxQMgrWMLevel nf)
+{
+ IxQMgrQStatus qStatusOnEntry;/* The queue status on entry/exit */
+ IxQMgrQStatus qStatusOnExit; /* to this function */
+
+ if (!ixQMgrQIsConfigured(qId))
+ {
+ return IX_QMGR_Q_NOT_CONFIGURED;
+ }
+
+ if (!watermarkLevelIsOk (qId, ne))
+ {
+ return IX_QMGR_INVALID_Q_WM;
+ }
+
+ if (!watermarkLevelIsOk (qId, nf))
+ {
+ return IX_QMGR_INVALID_Q_WM;
+ }
+
+ /* Get the current queue status */
+ ixQMgrAqmIfQueStatRead (qId, &qStatusOnEntry);
+
+#ifndef NDEBUG
+ /* Update statistics */
+ stats.wmSetCnt++;
+#endif
+
+ ixQMgrAqmIfWatermarkSet (qId,
+ ne,
+ nf);
+
+ /* Get the current queue status */
+ ixQMgrAqmIfQueStatRead (qId, &qStatusOnExit);
+
+ /* If the status has changed return a warning */
+ if (qStatusOnEntry != qStatusOnExit)
+ {
+ return IX_QMGR_WARNING;
+ }
+
+ return IX_SUCCESS;
+}
+
+IX_STATUS
+ixQMgrAvailableSramAddressGet (UINT32 *address,
+ unsigned *sizeOfFreeRam)
+{
+ UINT32 aqmLocalBaseAddress;
+
+ if ((NULL == address)||(NULL == sizeOfFreeRam))
+ {
+ return IX_QMGR_PARAMETER_ERROR;
+ }
+ if (!cfgInitialized)
+ {
+ return IX_FAIL;
+ }
+
+ *address = freeSramAddress;
+
+ /* Get the virtual SRAM address */
+ ixQMgrAqmIfBaseAddressGet (&aqmLocalBaseAddress);
+
+ /*
+ * Calculate the size in bytes of free sram
+ * i.e. current free SRAM virtual pointer from
+ * (base + total size)
+ */
+ *sizeOfFreeRam =
+ (aqmLocalBaseAddress +
+ IX_QMGR_AQM_SRAM_SIZE_IN_BYTES) -
+ freeSramAddress;
+
+ if (0 == *sizeOfFreeRam)
+ {
+ return IX_QMGR_NO_AVAILABLE_SRAM;
+ }
+
+ return IX_SUCCESS;
+}
+
+BOOL
+ixQMgrQIsConfigured (IxQMgrQId qId)
+{
+ if (!IX_QMGR_QID_IS_VALID(qId))
+ {
+ return FALSE;
+ }
+
+ return cfgQueueInfo[qId].isConfigured;
+}
+
+IxQMgrQCfgStats*
+ixQMgrQCfgStatsGet (void)
+{
+ return &stats;
+}
+
+IxQMgrQCfgStats*
+ixQMgrQCfgQStatsGet (IxQMgrQId qId)
+{
+ unsigned int ne;
+ unsigned int nf;
+ UINT32 baseAddress;
+ UINT32 readPtr;
+ UINT32 writePtr;
+
+ stats.qStats[qId].qSizeInWords = cfgQueueInfo[qId].qSizeInWords;
+ stats.qStats[qId].qEntrySizeInWords = cfgQueueInfo[qId].qEntrySizeInWords;
+
+ if (IX_SUCCESS != ixQMgrQNumEntriesGet (qId, &stats.qStats[qId].numEntries))
+ {
+ if (IX_QMGR_WARNING != ixQMgrQNumEntriesGet (qId, &stats.qStats[qId].numEntries))
+ {
+ IX_QMGR_LOG_WARNING1("Failed to get the number of entries in queue.... %d\n", qId);
+ }
+ }
+
+ ixQMgrAqmIfQueCfgRead (qId,
+ stats.qStats[qId].numEntries,
+ &baseAddress,
+ &ne,
+ &nf,
+ &readPtr,
+ &writePtr);
+
+ stats.qStats[qId].baseAddress = baseAddress;
+ stats.qStats[qId].ne = ne;
+ stats.qStats[qId].nf = nf;
+ stats.qStats[qId].readPtr = readPtr;
+ stats.qStats[qId].writePtr = writePtr;
+
+ return &stats;
+}
+
+/*
+ * Static function definitions
+ */
+
+PRIVATE BOOL
+watermarkLevelIsOk (IxQMgrQId qId, IxQMgrWMLevel level)
+{
+ unsigned qSizeInEntries;
+
+ switch (level)
+ {
+ case IX_QMGR_Q_WM_LEVEL0:
+ case IX_QMGR_Q_WM_LEVEL1:
+ case IX_QMGR_Q_WM_LEVEL2:
+ case IX_QMGR_Q_WM_LEVEL4:
+ case IX_QMGR_Q_WM_LEVEL8:
+ case IX_QMGR_Q_WM_LEVEL16:
+ case IX_QMGR_Q_WM_LEVEL32:
+ case IX_QMGR_Q_WM_LEVEL64:
+ break;
+ default:
+ return FALSE;
+ }
+
+ /* Check watermark is not bigger than the qSizeInEntries */
+ ixQMgrQSizeInEntriesGet(qId, &qSizeInEntries);
+
+ if ((unsigned)level > qSizeInEntries)
+ {
+ return FALSE;
+ }
+
+ return TRUE;
+}
+
+PRIVATE BOOL
+qSizeInWordsIsOk (IxQMgrQSizeInWords qSize)
+{
+ BOOL status;
+
+ switch (qSize)
+ {
+ case IX_QMGR_Q_SIZE16:
+ case IX_QMGR_Q_SIZE32:
+ case IX_QMGR_Q_SIZE64:
+ case IX_QMGR_Q_SIZE128:
+ status = TRUE;
+ break;
+ default:
+ status = FALSE;
+ break;
+ }
+
+ return status;
+}
+
+PRIVATE BOOL
+qEntrySizeInWordsIsOk (IxQMgrQEntrySizeInWords entrySize)
+{
+ BOOL status;
+
+ switch (entrySize)
+ {
+ case IX_QMGR_Q_ENTRY_SIZE1:
+ case IX_QMGR_Q_ENTRY_SIZE2:
+ case IX_QMGR_Q_ENTRY_SIZE4:
+ status = TRUE;
+ break;
+ default:
+ status = FALSE;
+ break;
+ }
+
+ return status;
+}
diff --git a/cpu/ixp/npe/Makefile b/cpu/ixp/npe/Makefile
new file mode 100644
index 0000000000..937de9d47b
--- /dev/null
+++ b/cpu/ixp/npe/Makefile
@@ -0,0 +1,91 @@
+#
+# (C) Copyright 2006
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB := libnpe.a
+
+CFLAGS += -I$(TOPDIR)/cpu/ixp/npe/include -DCONFIG_IXP425_COMPONENT_ETHDB
+
+OBJS := npe.o \
+ miiphy.o \
+ IxOsalBufferMgt.o \
+ IxOsalIoMem.o \
+ IxOsalOsCacheMMU.o \
+ IxOsalOsMsgQ.o \
+ IxOsalOsSemaphore.o \
+ IxOsalOsServices.o \
+ IxOsalOsThread.o \
+ IxEthAcc.o \
+ IxEthAccCommon.o \
+ IxEthAccControlInterface.o \
+ IxEthAccDataPlane.o \
+ IxEthAccMac.o \
+ IxEthAccMii.o \
+ IxEthDBAPI.o \
+ IxEthDBAPISupport.o \
+ IxEthDBCore.o \
+ IxEthDBEvents.o \
+ IxEthDBFeatures.o \
+ IxEthDBFirewall.o \
+ IxEthDBHashtable.o \
+ IxEthDBLearning.o \
+ IxEthDBMem.o \
+ IxEthDBNPEAdaptor.o \
+ IxEthDBPortUpdate.o \
+ IxEthDBReports.o \
+ IxEthDBSearch.o \
+ IxEthDBSpanningTree.o \
+ IxEthDBUtil.o \
+ IxEthDBVlan.o \
+ IxEthDBWiFi.o \
+ IxEthMii.o \
+ IxQMgrAqmIf.o \
+ IxQMgrDispatcher.o \
+ IxQMgrInit.o \
+ IxQMgrQAccess.o \
+ IxQMgrQCfg.o \
+ IxFeatureCtrl.o \
+ IxNpeDl.o \
+ IxNpeDlImageMgr.o \
+ IxNpeDlNpeMgr.o \
+ IxNpeDlNpeMgrUtils.o \
+ IxNpeMicrocode.o \
+ IxNpeMh.o \
+ IxNpeMhConfig.o \
+ IxNpeMhReceive.o \
+ IxNpeMhSend.o \
+ IxNpeMhSolicitedCbMgr.o \
+ IxNpeMhUnsolicitedCbMgr.o
+
+all: $(LIB)
+
+$(LIB): $(OBJS)
+ $(AR) crv $@ $(OBJS)
+
+#########################################################################
+
+.depend: Makefile $(OBJS:.o=.c)
+ $(CC) -M $(CFLAGS) $(OBJS:.o=.c) > $@
+
+sinclude .depend
diff --git a/cpu/ixp/npe/include/IxAssert.h b/cpu/ixp/npe/include/IxAssert.h
new file mode 100644
index 0000000000..eae8b3f273
--- /dev/null
+++ b/cpu/ixp/npe/include/IxAssert.h
@@ -0,0 +1,71 @@
+/**
+ * @file IxAssert.h
+ *
+ * @date 21-MAR-2002 (replaced by OSAL)
+ *
+ * @brief This file contains assert and ensure macros used by the IXP400 software
+ *
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+/**
+ * @defgroup IxAssert IXP400 Assertion Macros (IxAssert) API
+ *
+ * @brief Assertion support
+ *
+ * @{
+ */
+
+#ifndef IXASSERT_H
+
+#ifndef __doxygen_HIDE
+#define IXASSERT_H
+#endif /* __doxygen_HIDE */
+
+#include "IxOsalBackward.h"
+
+#endif /* IXASSERT_H */
+
+/**
+ * @} addtogroup IxAssert
+ */
+
+
+
diff --git a/cpu/ixp/npe/include/IxAtmSch.h b/cpu/ixp/npe/include/IxAtmSch.h
new file mode 100644
index 0000000000..73c3be29ab
--- /dev/null
+++ b/cpu/ixp/npe/include/IxAtmSch.h
@@ -0,0 +1,504 @@
+/**
+ * @file IxAtmSch.h
+ *
+ * @date 23-NOV-2001
+ *
+ * @brief Header file for the IXP400 ATM Traffic Shaper
+ *
+ * This component demonstrates an ATM Traffic Shaper implementation. It
+ * will perform shaping on upto 12 ports and total of 44 VCs accross all ports,
+ * 32 are intended for AAL0/5 and 12 for OAM (1 per port).
+ * The supported traffic types are;1 rt-VBR VC where PCR = SCR.
+ * (Effectively CBR) and Up-to 44 VBR VCs.
+ *
+ * This component models the ATM ports and VCs and is capable of producing
+ * a schedule of ATM cells per port which can be supplied to IxAtmdAcc
+ * for execution on the data path.
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ *
+ * @sa IxAtmm.h
+ *
+ */
+
+/**
+ * @defgroup IxAtmSch IXP400 ATM Transmit Scheduler (IxAtmSch) API
+ *
+ * @brief IXP400 ATM scheduler component Public API
+ *
+ * @{
+ */
+
+#ifndef IXATMSCH_H
+#define IXATMSCH_H
+
+#include "IxOsalTypes.h"
+#include "IxAtmTypes.h"
+
+/*
+ * #defines and macros used in this file.
+ */
+
+/* Return codes */
+
+/**
+ * @ingroup IxAtmSch
+ *
+ * @def IX_ATMSCH_RET_NOT_ADMITTED
+ * @brief Indicates that CAC function has rejected VC registration due
+ * to insufficient line capacity.
+*/
+#define IX_ATMSCH_RET_NOT_ADMITTED 2
+
+/**
+ * @ingroup IxAtmSch
+ *
+ * @def IX_ATMSCH_RET_QUEUE_FULL
+ * @brief Indicates that the VC queue is full, no more demand can be
+ * queued at this time.
+ */
+#define IX_ATMSCH_RET_QUEUE_FULL 3
+
+/**
+ * @ingroup IxAtmSch
+ *
+ * @def IX_ATMSCH_RET_QUEUE_EMPTY
+ * @brief Indicates that all VC queues on this port are empty and
+ * therefore there are no cells to be scheduled at this time.
+ */
+#define IX_ATMSCH_RET_QUEUE_EMPTY 4
+
+/*
+ * Function declarations
+ */
+
+/**
+ * @ingroup IxAtmSch
+ *
+ * @fn ixAtmSchInit(void)
+ *
+ * @brief This function is used to initialize the ixAtmSch component. It
+ * should be called before any other IxAtmSch API function.
+ *
+ * @param None
+ *
+ * @return
+ * - <b>IX_SUCCESS :</b> indicates that
+ * -# The ATM scheduler component has been successfully initialized.
+ * -# The scheduler is ready to accept Port modelling requests.
+ * - <b>IX_FAIL :</b> Some internal error has prevented the scheduler component
+ * from initialising.
+ */
+PUBLIC IX_STATUS
+ixAtmSchInit(void);
+
+/**
+ * @ingroup IxAtmSch
+ *
+ * @fn ixAtmSchPortModelInitialize( IxAtmLogicalPort port,
+ unsigned int portRate,
+ unsigned int minCellsToSchedule)
+ *
+ * @brief This function shall be called first to initialize an ATM port before
+ * any other ixAtmSch API calls may be made for that port.
+ *
+ * @param port @ref IxAtmLogicalPort [in] - The specific port to initialize. Valid
+ * values range from 0 to IX_UTOPIA_MAX_PORTS - 1, representing a
+ * maximum of IX_UTOPIA_MAX_PORTS possible ports.
+ *
+ * @param portRate unsigned int [in] - Value indicating the upstream capacity
+ * of the indicated port. The value should be supplied in
+ * units of ATM (53 bytes) cells per second.
+ * A port rate of 800Kbits/s is the equivalent
+ * of 1886 cells per second
+ *
+ * @param minCellsToSchedule unsigned int [in] - This parameter specifies the minimum
+ * number of cells which the scheduler will put in a schedule
+ * table for this port. This value sets the worst case CDVT for VCs
+ * on this port i.e. CDVT = 1*minCellsToSchedule/portRate.
+ * @return
+ * - <b>IX_SUCCESS :</b> indicates that
+ * -# The ATM scheduler has been successfully initialized.
+ * -# The requested port model has been established.
+ * -# The scheduler is ready to accept VC modelling requests
+ * on the ATM port.
+ * - <b>IX_FAIL :</b> indicates the requested port could not be
+ * initialized. */
+PUBLIC IX_STATUS
+ixAtmSchPortModelInitialize( IxAtmLogicalPort port,
+ unsigned int portRate,
+ unsigned int minCellsToSchedule);
+
+/**
+ * @ingroup IxAtmSch
+ *
+ * @fn ixAtmSchPortRateModify( IxAtmLogicalPort port,
+ unsigned int portRate)
+ *
+ * @brief This function is called to modify the portRate on a
+ * previously initialized port, typically in the event that
+ * the line condition of the port changes.
+ *
+ * @param port @ref IxAtmLogicalPort [in] - Specifies the ATM port which is to be
+ * modified.
+ *
+ * @param portRate unsigned int [in] - Value indicating the new upstream
+ * capacity for this port in cells/second.
+ * A port rate of 800Kbits/s is the equivalent
+ * of 1886 cells per second
+ *
+ * @return
+ * - <b>IX_SUCCESS :</b> The port rate has been successfully modified.<br>
+ * - <b>IX_FAIL :</b> The port rate could not be modified, either
+ * because the input data was invalid, or the new port rate is
+ * insufficient to support established ATM VC contracts on this
+ * port.
+ *
+ * @warning The IxAtmSch component will validate the supplied port
+ * rate is sufficient to support all established VC
+ * contracts on the port. If the new port rate is
+ * insufficient to support all established contracts then
+ * the request to modify the port rate will be rejected.
+ * In this event, the user is expected to remove
+ * established contracts using the ixAtmSchVcModelRemove
+ * interface and then retry this interface.
+ *
+ * @sa ixAtmSchVcModelRemove() */
+PUBLIC IX_STATUS
+ixAtmSchPortRateModify( IxAtmLogicalPort port,
+ unsigned int portRate);
+
+
+/**
+ * @ingroup IxAtmSch
+ *
+ * @fn ixAtmSchVcModelSetup( IxAtmLogicalPort port,
+ IxAtmTrafficDescriptor *trafficDesc,
+ IxAtmSchedulerVcId *vcId)
+ *
+ * @brief A client calls this interface to set up an upstream
+ * (transmitting) virtual connection model (VC) on the
+ * specified ATM port. This function also provides the
+ * virtual * connection admission control (CAC) service to the
+ * client.
+ *
+ * @param port @ref IxAtmLogicalPort [in] - Specifies the ATM port on which the upstream
+ * VC is to be established.
+ *
+ * @param *trafficDesc @ref IxAtmTrafficDescriptor [in] - Pointer to a structure
+ * describing the requested traffic contract of the VC to be
+ * established. This structure contains the typical ATM
+ * traffic descriptor values (e.g. PCR, SCR, MBS, CDVT, etc.)
+ * defined by the ATM standard.
+ *
+ * @param *vcId @ref IxAtmSchedulerVcId [out] - This value will be filled with the
+ * port-unique identifier for this virtual connection. A
+ * valid identification is a non-negative number.
+ *
+ * @return
+ * - <b>IX_SUCCESS :</b> The VC has been successfully established on
+ * this port. The client may begin to submit demand on this VC.
+ * - <b>IX_ATMSCH_RET_NOT_ADMITTED :</b> The VC cannot be established
+ * on this port because there is insufficient upstream capacity
+ * available to support the requested traffic contract descriptor
+ * - <b>IX_FAIL :</b>Input data are invalid. VC has not been
+ * established.
+ */
+PUBLIC IX_STATUS
+ixAtmSchVcModelSetup( IxAtmLogicalPort port,
+ IxAtmTrafficDescriptor *trafficDesc,
+ IxAtmSchedulerVcId *vcId);
+
+/**
+ * @ingroup IxAtmSch
+ *
+ * @fn ixAtmSchVcConnIdSet( IxAtmLogicalPort port,
+ IxAtmSchedulerVcId vcId,
+ IxAtmConnId vcUserConnId)
+ *
+ * @brief A client calls this interface to set the vcUserConnId for a VC on
+ * the specified ATM port. This vcUserConnId will default to
+ * IX_ATM_IDLE_CELLS_CONNID if this function is not called for a VC.
+ * Hence if the client does not call this function for a VC then only idle
+ * cells will be scheduled for this VC.
+ *
+ * @param port @ref IxAtmLogicalPort [in] - Specifies the ATM port on which the upstream
+ * VC is has been established.
+ *
+ * @param vcId @ref IxAtmSchedulerVcId [in] - This is the unique identifier for this virtual
+ * connection. A valid identification is a non-negative number and is
+ * all ports.
+ *
+ * @param vcUserConnId @ref IxAtmConnId [in] - The connId is used to refer to a VC in schedule
+ * table entries. It is treated as the Id by which the scheduler client
+ * knows the VC. It is used in any communicatations from the Scheduler
+ * to the scheduler user e.g. schedule table entries.
+ *
+ * @return
+ * - <b>IX_SUCCESS :</b> The id has successfully been set.
+ * - <b>IX_FAIL :</b>Input data are invalid. connId id is not established.
+ */
+PUBLIC IX_STATUS
+ixAtmSchVcConnIdSet( IxAtmLogicalPort port,
+ IxAtmSchedulerVcId vcId,
+ IxAtmConnId vcUserConnId);
+
+/**
+ * @ingroup IxAtmSch
+ *
+ * @fn ixAtmSchVcModelRemove( IxAtmLogicalPort port,
+ IxAtmSchedulerVcId vcId)
+ *
+ * @brief Interface called by the client to remove a previously
+ * established VC on a particular port.
+ *
+ * @param port @ref IxAtmLogicalPort [in] - Specifies the ATM port on which the VC to be
+ * removed is established.
+ *
+ * @param vcId @ref IxAtmSchedulerVcId [in] - Identifies the VC to be removed. This is the
+ * value returned by the @ref ixAtmSchVcModelSetup call which
+ * established the relevant VC.
+ *
+ * @return
+ * - <b>IX_SUCCESS :</b> The VC has been successfully removed from
+ * this port. It is no longer modelled on this port.
+ * - <b>IX_FAIL :</b>Input data are invalid. The VC is still being modeled
+ * by the traffic shaper.
+ *
+ * @sa ixAtmSchVcModelSetup()
+ */
+PUBLIC IX_STATUS
+ixAtmSchVcModelRemove( IxAtmLogicalPort port,
+ IxAtmSchedulerVcId vcId);
+
+/**
+ * @ingroup IxAtmSch
+ *
+ * @fn ixAtmSchVcQueueUpdate( IxAtmLogicalPort port,
+ IxAtmSchedulerVcId vcId,
+ unsigned int numberOfCells)
+ *
+ * @brief The client calls this function to notify IxAtmSch that the
+ * user of a VC has submitted cells for transmission.
+ *
+ * This information is stored, aggregated from a number of calls to
+ * ixAtmSchVcQueueUpdate and eventually used in the call to
+ * ixAtmSchTableUpdate.
+ *
+ * Normally IxAtmSch will update the VC queue by adding the number of
+ * cells to the current queue length. However, if IxAtmSch
+ * determines that the user has over-submitted for the VC and
+ * exceeded its transmission quota the queue request can be rejected.
+ * The user should resubmit the request later when the queue has been
+ * depleted.
+ *
+ * This implementation of ixAtmSchVcQueueUpdate uses no operating
+ * system or external facilities, either directly or indirectly.
+ * This allows clients to call this function form within an interrupt handler.
+ *
+ * This interface is structurally compatible with the
+ * IxAtmdAccSchQueueUpdate callback type definition required for
+ * IXP400 ATM scheduler interoperability.
+ *
+ * @param port @ref IxAtmLogicalPort [in] - Specifies the ATM port on which the VC to be
+ * updated is established.
+ *
+ * @param vcId @ref IxAtmSchedulerVcId [in] - Identifies the VC to be updated. This is the
+ * value returned by the @ref ixAtmSchVcModelSetup call which
+ * established the relevant VC.
+ *
+ * @param numberOfCells unsigned int [in] - Indicates how many ATM cells should
+ * be added to the queue for this VC.
+ *
+ * @return
+ * - <b>IX_SUCCESS :</b> The VC queue has been successfully updated.
+ * - <b>IX_ATMSCH_RET_QUEUE_FULL :</b> The VC queue has reached a
+ * preset limit. This indicates the client has over-submitted
+ * and exceeded its transmission quota. The request is
+ * rejected. The VC queue is not updated. The VC user is
+ * advised to resubmit the request later.
+ * - <b>IX_FAIL :</b> The input are invalid. No VC queue is updated.
+ *
+ * @warning IxAtmSch assumes that the calling software ensures that
+ * calls to ixAtmSchVcQueueUpdate, ixAtmSchVcQueueClear and
+ * ixAtmSchTableUpdate are both self and mutually exclusive
+ * for the same port.
+ *
+ * @sa ixAtmSchVcQueueUpdate(), ixAtmSchVcQueueClear(), ixAtmSchTableUpdate(). */
+PUBLIC IX_STATUS
+ixAtmSchVcQueueUpdate( IxAtmLogicalPort port,
+ IxAtmSchedulerVcId vcId,
+ unsigned int numberOfCells);
+
+/**
+ * @ingroup IxAtmSch
+ *
+ * @fn ixAtmSchVcQueueClear( IxAtmLogicalPort port,
+ IxAtmSchedulerVcId vcId)
+ *
+ * @brief The client calls this function to remove all currently
+ * queued cells from a registered VC. The pending cell count
+ * for the specified VC is reset to zero.
+ *
+ * This interface is structurally compatible with the
+ * IxAtmdAccSchQueueClear callback type definition required for
+ * IXP400 ATM scheduler interoperability.
+ *
+ * @param port @ref IxAtmLogicalPort [in] - Specifies the ATM port on which the VC to be
+ * cleared is established.
+ *
+ * @param vcId @ref IxAtmSchedulerVcId [in] - Identifies the VC to be cleared. This is the
+ * value returned by the @ref ixAtmSchVcModelSetup call which
+ * established the relevant VC.
+ *
+ * @return
+ * - <b>IX_SUCCESS :</b> The VC queue has been successfully cleared.
+ * - <b>IX_FAIL :</b> The input are invalid. No VC queue is modified.
+ *
+ * @warning IxAtmSch assumes that the calling software ensures that
+ * calls to ixAtmSchVcQueueUpdate, ixAtmSchVcQueueClear and
+ * ixAtmSchTableUpdate are both self and mutually exclusive
+ * for the same port.
+ *
+ * @sa ixAtmSchVcQueueUpdate(), ixAtmSchVcQueueClear(), ixAtmSchTableUpdate(). */
+PUBLIC IX_STATUS
+ixAtmSchVcQueueClear( IxAtmLogicalPort port,
+ IxAtmSchedulerVcId vcId);
+
+/**
+ * @ingroup IxAtmSch
+ *
+ * @fn ixAtmSchTableUpdate( IxAtmLogicalPort port,
+ unsigned int maxCells,
+ IxAtmScheduleTable **rettable)
+ *
+ * @brief The client calls this function to request an update of the
+ * schedule table for a particular ATM port.
+ *
+ * This is called when the client decides it needs a new sequence of
+ * cells to send (probably because the transmit queue is near to
+ * empty for this ATM port). The scheduler will use its stored
+ * information on the cells submitted for transmit (i.e. data
+ * supplied via @ref ixAtmSchVcQueueUpdate function) with the traffic
+ * descriptor information of all established VCs on the ATM port to
+ * decide the sequence of cells to be sent and fill the schedule
+ * table for a period of time into the future.
+ *
+ * IxAtmSch will guarantee a minimum of minCellsToSchedule if there
+ * is at least one cell ready to send. If there are no cells then
+ * IX_ATMSCH_RET_QUEUE_EMPTY is returned.
+ *
+ * This implementation of ixAtmSchTableUpdate uses no operating
+ * system or external facilities, either directly or indirectly.
+ * This allows clients to call this function form within an FIQ
+ * interrupt handler.
+ *
+ * @param port @ref IxAtmLogicalPort [in] - Specifies the ATM port for which requested
+ * schedule table is to be generated.
+ *
+ * @param maxCells unsigned [in] - Specifies the maximum number of cells
+ * that must be scheduled in the supplied table during any
+ * call to the interface.
+ *
+ * @param **table @ref IxAtmScheduleTable [out] - A pointer to an area of
+ * storage is returned which contains the generated
+ * schedule table. The client should not modify the
+ * contents of this table.
+ *
+ * @return
+ * - <b>IX_SUCCESS :</b> The schedule table has been published.
+ * Currently there is at least one VC queue that is nonempty.
+ * - <b>IX_ATMSCH_RET_QUEUE_EMPTY :</b> Currently all VC queues on
+ * this port are empty. The schedule table returned is set to
+ * NULL. The client is not expected to invoke this function
+ * again until more cells have been submitted on this port
+ * through the @ref ixAtmSchVcQueueUpdate function.
+ * - <b>IX_FAIL :</b> The input are invalid. No action is taken.
+ *
+ * @warning IxAtmSch assumes that the calling software ensures that
+ * calls to ixAtmSchVcQueueUpdate, ixAtmSchVcQueueClear and
+ * ixAtmSchTableUpdate are both self and mutually exclusive
+ * for the same port.
+ *
+ * @warning Subsequent calls to this function for the same port will
+ * overwrite the contents of previously supplied schedule
+ * tables. The client must be completely finished with the
+ * previously supplied schedule table before calling this
+ * function again for the same port.
+ *
+ * @sa ixAtmSchVcQueueUpdate(), ixAtmSchVcQueueClear(), ixAtmSchTableUpdate(). */
+PUBLIC IX_STATUS
+ixAtmSchTableUpdate( IxAtmLogicalPort port,
+ unsigned int maxCells,
+ IxAtmScheduleTable **rettable);
+
+/**
+ * @ingroup IxAtmSch
+ *
+ * @fn ixAtmSchShow(void)
+ *
+ * @brief Utility function which will print statistics on the current
+ * and accumulated state of VCs and traffic in the ATM
+ * scheduler component. Output is sent to the default output
+ * device.
+ *
+ * @param none
+ * @return none
+ */
+PUBLIC void
+ixAtmSchShow(void);
+
+/**
+ * @ingroup IxAtmSch
+ *
+ * @fn ixAtmSchStatsClear(void)
+ *
+ * @brief Utility function which will reset all counter statistics in
+ * the ATM scheduler to zero.
+ *
+ * @param none
+ * @return none
+ */
+PUBLIC void
+ixAtmSchStatsClear(void);
+
+#endif
+/* IXATMSCH_H */
+
+/** @} */
diff --git a/cpu/ixp/npe/include/IxAtmTypes.h b/cpu/ixp/npe/include/IxAtmTypes.h
new file mode 100644
index 0000000000..8624c3328e
--- /dev/null
+++ b/cpu/ixp/npe/include/IxAtmTypes.h
@@ -0,0 +1,409 @@
+/**
+ * @file IxAtmTypes.h
+ *
+ * @date 24-MAR-2002
+ *
+ * @brief This file contains Atm types common to a number of Atm components.
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+/* ------------------------------------------------------
+ Doxygen group definitions
+ ------------------------------------------------------ */
+/**
+ * @defgroup IxAtmTypes IXP400 ATM Types (IxAtmTypes)
+ *
+ * @brief The common set of types used in many Atm components
+ *
+ * @{ */
+
+#ifndef IXATMTYPES_H
+#define IXATMTYPES_H
+
+#include "IxNpeA.h"
+
+/**
+ * @enum IxAtmLogicalPort
+ *
+ * @brief Logical Port Definitions :
+ *
+ * Only 1 port is available in SPHY configuration
+ * 12 ports are enabled in MPHY configuration
+ *
+ */
+typedef enum
+{
+ IX_UTOPIA_PORT_0 = 0, /**< Port 0 */
+#ifdef IX_NPE_MPHYMULTIPORT
+ IX_UTOPIA_PORT_1, /**< Port 1 */
+ IX_UTOPIA_PORT_2, /**< Port 2 */
+ IX_UTOPIA_PORT_3, /**< Port 3 */
+ IX_UTOPIA_PORT_4, /**< Port 4 */
+ IX_UTOPIA_PORT_5, /**< Port 5 */
+ IX_UTOPIA_PORT_6, /**< Port 6 */
+ IX_UTOPIA_PORT_7, /**< Port 7 */
+ IX_UTOPIA_PORT_8, /**< Port 8 */
+ IX_UTOPIA_PORT_9, /**< Port 9 */
+ IX_UTOPIA_PORT_10, /**< Port 10 */
+ IX_UTOPIA_PORT_11, /**< Port 11 */
+#endif /* IX_NPE_MPHY */
+ IX_UTOPIA_MAX_PORTS /**< Not a port - just a definition for the
+ * maximum possible ports
+ */
+} IxAtmLogicalPort;
+
+/**
+ * @def IX_ATM_CELL_PAYLOAD_SIZE
+ * @brief Size of a ATM cell payload
+ */
+#define IX_ATM_CELL_PAYLOAD_SIZE (48)
+
+/**
+ * @def IX_ATM_CELL_SIZE
+ * @brief Size of a ATM cell, including header
+ */
+#define IX_ATM_CELL_SIZE (53)
+
+/**
+ * @def IX_ATM_CELL_SIZE_NO_HEC
+ * @brief Size of a ATM cell, excluding HEC byte
+ */
+#define IX_ATM_CELL_SIZE_NO_HEC (IX_ATM_CELL_SIZE - 1)
+
+/**
+ * @def IX_ATM_OAM_CELL_SIZE_NO_HEC
+ * @brief Size of a OAM cell, excluding HEC byte
+ */
+#define IX_ATM_OAM_CELL_SIZE_NO_HEC IX_ATM_CELL_SIZE_NO_HEC
+
+/**
+ * @def IX_ATM_AAL0_48_CELL_PAYLOAD_SIZE
+ * @brief Size of a AAL0 48 Cell payload
+ */
+#define IX_ATM_AAL0_48_CELL_PAYLOAD_SIZE IX_ATM_CELL_PAYLOAD_SIZE
+
+/**
+ * @def IX_ATM_AAL5_CELL_PAYLOAD_SIZE
+ * @brief Size of a AAL5 Cell payload
+ */
+#define IX_ATM_AAL5_CELL_PAYLOAD_SIZE IX_ATM_CELL_PAYLOAD_SIZE
+
+/**
+ * @def IX_ATM_AAL0_52_CELL_SIZE_NO_HEC
+ * @brief Size of a AAL0 52 Cell, excluding HEC byte
+ */
+#define IX_ATM_AAL0_52_CELL_SIZE_NO_HEC IX_ATM_CELL_SIZE_NO_HEC
+
+
+/**
+ * @def IX_ATM_MAX_VPI
+ * @brief Maximum value of an ATM VPI
+ */
+#define IX_ATM_MAX_VPI 255
+
+/**
+ * @def IX_ATM_MAX_VCI
+ * @brief Maximum value of an ATM VCI
+ */
+#define IX_ATM_MAX_VCI 65535
+
+ /**
+ * @def IX_ATM_MAX_NUM_AAL_VCS
+ * @brief Maximum number of active AAL5/AAL0 VCs in the system
+ */
+#define IX_ATM_MAX_NUM_AAL_VCS 32
+
+/**
+ * @def IX_ATM_MAX_NUM_VC
+ * @brief Maximum number of active AAL5/AAL0 VCs in the system
+ * The use of this macro is depreciated, it is retained for
+ * backward compatiblity. For current software release
+ * and beyond the define IX_ATM_MAX_NUM_AAL_VC should be used.
+ */
+#define IX_ATM_MAX_NUM_VC IX_ATM_MAX_NUM_AAL_VCS
+
+
+
+/**
+ * @def IX_ATM_MAX_NUM_OAM_TX_VCS
+ * @brief Maximum number of active OAM Tx VCs in the system,
+ * 1 OAM VC per port
+ */
+#define IX_ATM_MAX_NUM_OAM_TX_VCS IX_UTOPIA_MAX_PORTS
+
+/**
+ * @def IX_ATM_MAX_NUM_OAM_RX_VCS
+ * @brief Maximum number of active OAM Rx VCs in the system,
+ * 1 OAM VC shared accross all ports
+ */
+#define IX_ATM_MAX_NUM_OAM_RX_VCS 1
+
+/**
+ * @def IX_ATM_MAX_NUM_AAL_OAM_TX_VCS
+ * @brief Maximum number of active AAL5/AAL0/OAM Tx VCs in the system
+ */
+#define IX_ATM_MAX_NUM_AAL_OAM_TX_VCS (IX_ATM_MAX_NUM_AAL_VCS + IX_ATM_MAX_NUM_OAM_TX_VCS)
+
+/**
+ * @def IX_ATM_MAX_NUM_AAL_OAM_RX_VCS
+ * @brief Maximum number of active AAL5/AAL0/OAM Rx VCs in the system
+ */
+#define IX_ATM_MAX_NUM_AAL_OAM_RX_VCS (IX_ATM_MAX_NUM_AAL_VCS + IX_ATM_MAX_NUM_OAM_RX_VCS)
+
+/**
+ * @def IX_ATM_IDLE_CELLS_CONNID
+ * @brief VC Id used to indicate idle cells in the returned schedule table.
+ */
+#define IX_ATM_IDLE_CELLS_CONNID 0
+
+
+/**
+ * @def IX_ATM_CELL_HEADER_VCI_GET
+ * @brief get the VCI field from a cell header
+ */
+#define IX_ATM_CELL_HEADER_VCI_GET(cellHeader) \
+ (((cellHeader) >> 4) & IX_OAM_VCI_BITS_MASK);
+
+/**
+ * @def IX_ATM_CELL_HEADER_VPI_GET
+ * @brief get the VPI field from a cell header
+ */
+#define IX_ATM_CELL_HEADER_VPI_GET(cellHeader) \
+ (((cellHeader) >> 20) & IX_OAM_VPI_BITS_MASK);
+
+/**
+ * @def IX_ATM_CELL_HEADER_PTI_GET
+ * @brief get the PTI field from a cell header
+ */
+#define IX_ATM_CELL_HEADER_PTI_GET(cellHeader) \
+ ((cellHeader) >> 1) & IX_OAM_PTI_BITS_MASK;
+
+/**
+ * @typedef IxAtmCellHeader
+ *
+ * @brief ATM Cell Header, does not contain 4 byte HEC, added by NPE-A
+ */
+typedef unsigned int IxAtmCellHeader;
+
+
+/**
+ * @enum IxAtmServiceCategory
+ *
+ * @brief Enumerated type representing available ATM service categories.
+ * For more informatoin on these categories, see "Traffic Management
+ * Specification" v4.1, published by the ATM Forum -
+ * http://www.atmforum.com
+ */
+typedef enum
+{
+ IX_ATM_CBR, /**< Constant Bit Rate */
+ IX_ATM_RTVBR, /**< Real Time Variable Bit Rate */
+ IX_ATM_VBR, /**< Variable Bit Rate */
+ IX_ATM_UBR, /**< Unspecified Bit Rate */
+ IX_ATM_ABR /**< Available Bit Rate (not supported) */
+
+} IxAtmServiceCategory;
+
+/**
+ *
+ * @enum IxAtmRxQueueId
+ *
+ * @brief Rx Queue Type for RX traffic
+ *
+ * IxAtmRxQueueId defines the queues involved for receiving data.
+ *
+ * There are two queues to facilitate prioritisation handling
+ * and processing the 2 queues with different algorithms and
+ * constraints
+ *
+ * e.g. : one queue can carry voice (or time-critical traffic), the
+ * other queue can carry non-voice traffic
+ *
+ */
+typedef enum
+{
+ IX_ATM_RX_A = 0, /**< RX queue A */
+ IX_ATM_RX_B, /**< RX queue B */
+ IX_ATM_MAX_RX_STREAMS /**< Maximum number of RX streams */
+} IxAtmRxQueueId;
+
+/**
+ * @brief Structure describing an ATM traffic contract for a Virtual
+ * Connection (VC).
+ *
+ * Structure is used to specify the requested traffic contract for a
+ * VC to the IxAtmSch component using the @ref ixAtmSchVcModelSetup
+ * interface.
+ *
+ * These parameters are defined by the ATM forum working group
+ * (http://www.atmforum.com).
+ *
+ * @note Typical values for a voice channel 64 Kbit/s
+ * - atmService @a IX_ATM_RTVBR
+ * - pcr 400 (include IP overhead, and AAL5 trailer)
+ * - cdvt 5000000 (5 ms)
+ * - scr = pcr
+ *
+ * @note Typical values for a data channel 800 Kbit/s
+ * - atmService @a IX_ATM_UBR
+ * - pcr 1962 (include IP overhead, and AAL5 trailer)
+ * - cdvt 5000000 (5 ms)
+ *
+ */
+typedef struct
+{
+ IxAtmServiceCategory atmService; /**< ATM service category */
+ unsigned pcr; /**< Peak Cell Rate - cells per second */
+ unsigned cdvt; /**< Cell Delay Variation Tolerance - in nanoseconds */
+ unsigned scr; /**< Sustained Cell Rate - cells per second */
+ unsigned mbs; /**< Max Burst Size - cells */
+ unsigned mcr; /**< Minimum Cell Rate - cells per second */
+ unsigned mfs; /**< Max Frame Size - cells */
+} IxAtmTrafficDescriptor;
+
+/**
+ * @typedef IxAtmConnId
+ *
+ * @brief ATM VC data connection identifier.
+ *
+ * This is is generated by IxAtmdAcc when a successful connection is
+ * made on a VC. The is the ID by which IxAtmdAcc knows an active
+ * VC and should be used in IxAtmdAcc API calls to reference a
+ * specific VC.
+ */
+typedef unsigned int IxAtmConnId;
+
+/**
+ * @typedef IxAtmSchedulerVcId
+ *
+ * @brief ATM VC scheduling connection identifier.
+ *
+ * This id is generated and used by ATM Tx controller, generally
+ * the traffic shaper (e.g. IxAtmSch). The IxAtmdAcc component
+ * will request one of these Ids whenever a data connection on
+ * a Tx VC is requested. This ID will be used in callbacks to
+ * the ATM Transmission Ctrl s/w (e.g. IxAtmm) to reference a
+ * particular VC.
+ */
+typedef int IxAtmSchedulerVcId;
+
+/**
+ * @typedef IxAtmNpeRxVcId
+ *
+ * @brief ATM Rx VC identifier used by the ATM Npe.
+ *
+ * This Id is generated by IxAtmdAcc when a successful data connection
+ * is made on a rx VC.
+ */
+typedef unsigned int IxAtmNpeRxVcId;
+
+/**
+ * @brief ATM Schedule Table entry
+ *
+ * This IxAtmScheduleTableEntry is used by an ATM scheduler to inform
+ * IxAtmdAcc about the data to transmit (in term of cells per VC)
+ *
+ * This structure defines
+ * @li the number of cells to be transmitted (numberOfCells)
+ * @li the VC connection to be used for transmission (connId).
+ *
+ * @note - When the connection Id value is IX_ATM_IDLE_CELLS_CONNID, the
+ * corresponding number of idle cells will be transmitted to the hardware.
+ *
+ */
+typedef struct
+{
+ IxAtmConnId connId; /**< connection Id
+ *
+ * Identifier of VC from which cells are to be transmitted.
+ * When this valus is IX_ATM_IDLE_CELLS_CONNID, this indicates
+ * that the system should transmit the specified number
+ * of idle cells. Unknown connIds result in the transmission
+ * idle cells.
+ */
+ unsigned int numberOfCells; /**< number of cells to transmit
+ *
+ * The number of contiguous cells to schedule from this VC
+ * at this point. The valid range is from 1 to
+ * @a IX_ATM_SCHEDULETABLE_MAXCELLS_PER_ENTRY. This
+ * number can swap over mbufs and pdus. OverSchduling results
+ * in the transmission of idle cells.
+ */
+} IxAtmScheduleTableEntry;
+
+/**
+ * @brief This structure defines a schedule table which gives details
+ * on which data (from which VCs) should be transmitted for a
+ * forthcoming period of time for a particular port and the
+ * order in which that data should be transmitted.
+ *
+ * The schedule table consists of a series of entries each of which
+ * will schedule one or more cells from a particular registered VC.
+ * The total number of cells scheduled and the total number of
+ * entries in the table are also indicated.
+ *
+ */
+typedef struct
+{
+ unsigned tableSize; /**< Number of entries
+ *
+ * Indicates the total number of
+ * entries in the table.
+ */
+ unsigned totalCellSlots; /**< Number of cells
+ *
+ * Indicates the total number of ATM
+ * cells which are scheduled by all the
+ * entries in the table.
+ */
+ IxAtmScheduleTableEntry *table; /**< Pointer to schedule entries
+ *
+ * Pointer to an array
+ * containing tableSize entries
+ */
+} IxAtmScheduleTable;
+
+#endif /* IXATMTYPES_H */
+
+/**
+ * @} defgroup IxAtmTypes
+ */
+
+
diff --git a/cpu/ixp/npe/include/IxAtmdAcc.h b/cpu/ixp/npe/include/IxAtmdAcc.h
new file mode 100644
index 0000000000..ae7b2434c3
--- /dev/null
+++ b/cpu/ixp/npe/include/IxAtmdAcc.h
@@ -0,0 +1,1194 @@
+
+/**
+ * @file IxAtmdAcc.h
+ *
+ * @date 07-Nov-2001
+ *
+ * @brief IxAtmdAcc Public API
+ *
+ * This file contains the public API of IxAtmdAcc, related to the
+ * data functions of the component
+ *
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+/* ------------------------------------------------------
+ Doxygen group definitions
+ ------------------------------------------------------ */
+
+/**
+ *
+ * @defgroup IxAtmdAccAPI IXP400 ATM Driver Access (IxAtmdAcc) API
+ *
+ * @brief The public API for the IXP400 Atm Driver Data component
+ *
+ * IxAtmdAcc is the low level interface by which AAL0/AAL5 and
+ * OAM data gets transmitted to,and received from the Utopia bus.
+ *
+ * For AAL0/AAL5 services transmit and receive connections may
+ * be established independantly for unique combinations of
+ * port,VPI,and VCI.
+ *
+ * Two AAL0 services supporting 48 or 52 byte cell data are provided.
+ * Submitted AAL0 PDUs must be a multiple of the cell data size (48/52).
+ * AAL0_52 is a raw cell service the client must format
+ * the PDU with an ATM cell header (excluding HEC) at the start of
+ * each cell, note that AtmdAcc does not validate the cell headers in
+ * a submitted PDU.
+ *
+ * OAM cells cannot be received over the AAL0 service but instead
+ * are received over a dedicated OAM service.
+ *
+ * For the OAM service an "OAM Tx channel" may be enabled for a port
+ * by establishing a single dedicated OAM Tx connection on that port.
+ * A single "OAM Rx channel" for all ports may be enabled by
+ * establishing a dedicated OAM Rx connection.
+ *
+ * The OAM service allows buffers containing 52 byte OAM F4/F5 cells
+ * to be transmitted and received over the dedicated OAM channels.
+ * HEC is appended/removed, and CRC-10 performed by the NPE. The OAM
+ * service offered by AtmdAcc is a raw cell transport service.
+ * It is assumed that ITU I.610 procedures that make use of this
+ * service are implemented above AtmdAcc.
+ *
+ * Note that the dedicated OAM connections are established on
+ * reserved VPI,VCI, and (in the case of Rx) port values defined below.
+ * These values are used purely to descriminate the dedicated OAM channels
+ * and do not identify a particular OAM F4/F5 flow. F4/F5 flows may be
+ * realised for particluar VPI/VCIs by manipulating the VPI,VCI
+ * fields of the ATM cell headers of cells in the buffers passed
+ * to AtmdAcc. Note that AtmdAcc does not validate the cell headers
+ * in a submitted OAM PDU.
+ *
+ *
+ *
+ * This part is related to the User datapath processing
+ *
+ * @{
+ */
+
+#ifndef IXATMDACC_H
+#define IXATMDACC_H
+
+#include "IxAtmTypes.h"
+
+/* ------------------------------------------------------
+ AtmdAcc Data Types definition
+ ------------------------------------------------------ */
+
+/**
+ *
+ * @ingroup IxAtmdAccAPI
+ *
+ * @def IX_ATMDACC_WARNING
+ *
+ * @brief Warning return code
+ *
+ * This constant is used to tell IxAtmDAcc user about a special case.
+ *
+ */
+#define IX_ATMDACC_WARNING 2
+
+/**
+ *
+ * @ingroup IxAtmdAccAPI
+ *
+ * @def IX_ATMDACC_BUSY
+ *
+ * @brief Busy return code
+ *
+ * This constant is used to tell IxAtmDAcc user that the request
+ * is correct, but cannot be processed because the IxAtmAcc resources
+ * are already used. The user has to retry its request later
+ *
+ */
+#define IX_ATMDACC_BUSY 3
+
+/**
+ *
+ * @ingroup IxAtmdAccAPI
+ *
+ * @def IX_ATMDACC_RESOURCES_STILL_ALLOCATED
+ *
+ * @brief Disconnect return code
+ *
+ * This constant is used to tell IxAtmDAcc user that the disconnect
+ * functions are not complete because the resources used by the driver
+ * are not yet released. The user has to retry the disconnect call
+ * later.
+ *
+ */
+#define IX_ATMDACC_RESOURCES_STILL_ALLOCATED 4
+
+/**
+ *
+ * @ingroup IxAtmdAccAPI
+ *
+ * @def IX_ATMDACC_DEFAULT_REPLENISH_COUNT
+ *
+ * @brief Default resources usage for RxVcFree replenish mechanism
+ *
+ * This constant is used to tell IxAtmDAcc to allocate and use
+ * the minimum of resources for rx free replenish.
+ *
+ * @sa ixAtmdAccRxVcConnect
+ */
+#define IX_ATMDACC_DEFAULT_REPLENISH_COUNT 0
+
+
+/**
+ * @ingroup IxAtmdAccAPI
+ *
+ * @def IX_ATMDACC_OAM_TX_VPI
+ *
+ * @brief The reserved value used for the dedicated OAM
+ * Tx connection. This "well known" value is used by atmdAcc and
+ * its clients to dsicriminate the OAM channel, and should be chosen so
+ * that it does not coencide with the VPI value used in an AAL0/AAL5 connection.
+ * Any attempt to connect a service type other than OAM on this VPI will fail.
+ *
+ *
+ */
+#define IX_ATMDACC_OAM_TX_VPI 0
+
+/**
+ * @ingroup IxAtmdAccAPI
+ *
+ * @def IX_ATMDACC_OAM_TX_VCI
+ *
+ * @brief The reserved value used for the dedicated OAM
+ * Tx connection. This "well known" value is used by atmdAcc and
+ * its clients to dsicriminate the OAM channel, and should be chosen so
+ * that it does not coencide with the VCI value used in an AAL0/AAL5 connection.
+ * Any attempt to connect a service type other than OAM on this VCI will fail.
+ */
+#define IX_ATMDACC_OAM_TX_VCI 0
+
+
+ /**
+ * @ingroup IxAtmdAccAPI
+ *
+ * @def IX_ATMDACC_OAM_RX_PORT
+ *
+ * @brief The reserved dummy PORT used for all dedicated OAM
+ * Rx connections. Note that this is not a real port but must
+ * have a value that lies within the valid range of port values.
+ */
+#define IX_ATMDACC_OAM_RX_PORT IX_UTOPIA_PORT_0
+
+ /**
+ * @ingroup IxAtmdAccAPI
+ *
+ * @def IX_ATMDACC_OAM_RX_VPI
+ *
+ * @brief The reserved value value used for the dedicated OAM
+ * Rx connection. This value should be chosen so that it does not
+ * coencide with the VPI value used in an AAL0/AAL5 connection.
+ * Any attempt to connect a service type other than OAM on this VPI will fail.
+ */
+#define IX_ATMDACC_OAM_RX_VPI 0
+
+/**
+ * @ingroup IxAtmdAccAPI
+ *
+ * @def IX_ATMDACC_OAM_RX_VCI
+ *
+ * @brief The reserved value value used for the dedicated OAM
+ * Rx connection. This value should be chosen so that it does not
+ * coencide with the VCI value used in an AAL0/AAL5 connection.
+ * Any attempt to connect a service type other than OAM on this VCI will fail.
+ */
+#define IX_ATMDACC_OAM_RX_VCI 0
+
+
+/**
+ * @enum IxAtmdAccPduStatus
+ *
+ * @ingroup IxAtmdAccAPI
+ *
+ * @brief IxAtmdAcc Pdu status :
+ *
+ * IxAtmdAccPduStatus is used during a RX operation to indicate
+ * the status of the received PDU
+ *
+ */
+
+typedef enum
+{
+ IX_ATMDACC_AAL0_VALID = 0, /**< aal0 pdu */
+ IX_ATMDACC_OAM_VALID, /**< OAM pdu */
+ IX_ATMDACC_AAL2_VALID, /**< aal2 pdu @b reserved for future use */
+ IX_ATMDACC_AAL5_VALID, /**< aal5 pdu complete and trailer is valid */
+ IX_ATMDACC_AAL5_PARTIAL, /**< aal5 pdu not complete, trailer is missing */
+ IX_ATMDACC_AAL5_CRC_ERROR, /**< aal5 pdu not complete, crc error/length error */
+ IX_ATMDACC_MBUF_RETURN /**< empty buffer returned to the user */
+} IxAtmdAccPduStatus;
+
+
+/**
+ *
+ * @enum IxAtmdAccAalType
+ *
+ * @ingroup IxAtmdAccAPI
+ *
+ * @brief IxAtmdAcc AAL Service Type :
+ *
+ * IxAtmdAccAalType defines the type of traffic to run on this VC
+ *
+ */
+typedef enum
+{
+ IX_ATMDACC_AAL5, /**< ITU-T AAL5 */
+ IX_ATMDACC_AAL2, /**< ITU-T AAL2 @b reserved for future use */
+ IX_ATMDACC_AAL0_48, /**< AAL0 48 byte payloads (cell header is added by NPE)*/
+ IX_ATMDACC_AAL0_52, /**< AAL0 52 byte cell data (HEC is added by NPE) */
+ IX_ATMDACC_OAM, /**< OAM cell transport service (HEC is added by NPE)*/
+ IX_ATMDACC_MAX_SERVICE_TYPE /**< not a service, used for parameter validation */
+} IxAtmdAccAalType;
+
+/**
+ *
+ * @enum IxAtmdAccClpStatus
+ *
+ * @ingroup IxAtmdAccAPI
+ *
+ * @brief IxAtmdAcc CLP indication
+ *
+ * IxAtmdAccClpStatus defines the CLP status of the current PDU
+ *
+ */
+typedef enum
+{
+ IX_ATMDACC_CLP_NOT_SET = 0, /**< CLP indication is not set */
+ IX_ATMDACC_CLP_SET = 1 /**< CLP indication is set */
+} IxAtmdAccClpStatus;
+
+/**
+ * @typedef IxAtmdAccUserId
+ *
+ * @ingroup IxAtmdAccAPI
+ *
+ * @brief User-supplied Id
+ *
+ * IxAtmdAccUserId is passed through callbacks and allows the
+ * IxAtmdAcc user to identify the source of a call back. The range of
+ * this user-owned Id is [0...2^32-1)].
+ *
+ * The user provides this own Ids on a per-channel basis as a parameter
+ * in a call to @a ixAtmdAccRxVcConnect() or @a ixAtmdAccRxVcConnect()
+ *
+ * @sa ixAtmdAccRxVcConnect
+ * @sa ixAtmdAccTxVcConnect
+ *
+ */
+typedef unsigned int IxAtmdAccUserId;
+
+/* ------------------------------------------------------
+ Part of the IxAtmdAcc interface related to RX traffic
+ ------------------------------------------------------ */
+
+/**
+ *
+ * @ingroup IxAtmdAccAPI
+ *
+ * @brief Rx callback prototype
+ *
+ * IxAtmdAccRxVcRxCallback is the prototype of the Rx callback user
+ * function called once per PDU to pass a receive Pdu to a user on a
+ * partilcular connection. The callback is likely to push the mbufs
+ * to a protocol layer, and recycle the mbufs for a further use.
+ *
+ * @note -This function is called ONLY in the context of
+ * the @a ixAtmdAccRxDispatch() function
+ *
+ * @sa ixAtmdAccRxDispatch
+ * @sa ixAtmdAccRxVcConnect
+ *
+ * @param port @ref IxAtmLogicalPort [in] - the port on which this PDU was received
+ * a logical PHY port [@a IX_UTOPIA_PORT_0 .. @a IX_UTOPIA_MAX_PORTS - 1]
+ * @param userId @ref IxAtmdAccUserId [in] - user Id provided in the call
+ * to @a ixAtmdAccRxVcConnect()
+ * @param status @ref IxAtmdAccPduStatus [in] - an indication about the PDU validity.
+ * In the case of AAL0 the only possibile value is
+ * AAL0_VALID, in this case the client may optionally determine
+ * that an rx timeout occured by checking if the mbuf is
+ * compleletly or only partially filled, the later case
+ * indicating a timeout.
+ * In the case of OAM the only possible value is OAM valid.
+ * The status is set to @a IX_ATMDACC_MBUF_RETURN when
+ * the mbuf is released during a disconnect process.
+ * @param clp @ref IxAtmdAccClpStatus [in] - clp indication for this PDU.
+ * For AAL5/AAL0_48 this information
+ * is set if the clp bit of any rx cell is set
+ * For AAL0-52/OAM the client may inspect the CLP in individual
+ * cell headers in the PDU, and this parameter is set to 0.
+ * @param *mbufPtr @ref IX_OSAL_MBUF [in] - depending on the servive type a pointer to
+ * an mbuf (AAL5/AAL0/OAM) or mbuf chain (AAL5 only),
+ * that comprises the complete PDU data.
+ *
+ * This parameter is guaranteed not to be a null pointer.
+ *
+ */
+typedef void (*IxAtmdAccRxVcRxCallback) (IxAtmLogicalPort port,
+ IxAtmdAccUserId userId,
+ IxAtmdAccPduStatus status,
+ IxAtmdAccClpStatus clp,
+ IX_OSAL_MBUF * mbufPtr);
+
+/**
+ *
+ * @ingroup IxAtmdAccAPI
+ *
+ * @brief Callback prototype for free buffer level is low.
+ *
+ * IxAtmdAccRxVcFreeLowCallback is the prototype of the user function
+ * which get called on a per-VC basis, when more mbufs are needed to
+ * continue the ATM data reception. This function is likely to supply
+ * more available mbufs by one or many calls to the replenish function
+ * @a ixAtmdAccRxVcFreeReplenish()
+ *
+ * This function is called when the number of available buffers for
+ * reception is going under the threshold level as defined
+ * in @a ixAtmdAccRxVcFreeLowCallbackRegister()
+ *
+ * This function is called inside an Qmgr dispatch context. No system
+ * resource or interrupt-unsafe feature should be used inside this
+ * callback.
+ *
+ * @sa ixAtmdAccRxVcFreeLowCallbackRegister
+ * @sa IxAtmdAccRxVcFreeLowCallback
+ * @sa ixAtmdAccRxVcFreeReplenish
+ * @sa ixAtmdAccRxVcFreeEntriesQuery
+ * @sa ixAtmdAccRxVcConnect
+ *
+ * @param userId @ref IxAtmdAccUserId [in] - user Id provided in the call
+ * to @a ixAtmdAccRxVcConnect()
+ *
+ * @return None
+ *
+ */
+typedef void (*IxAtmdAccRxVcFreeLowCallback) (IxAtmdAccUserId userId);
+
+/* ------------------------------------------------------
+ Part of the IxAtmdAcc interface related to TX traffic
+ ------------------------------------------------------ */
+
+/**
+ *
+ * @ingroup IxAtmdAccAPI
+ *
+ * @brief Buffer callback prototype.
+ *
+ * This function is called to relinguish ownership of a transmitted
+ * buffer chain to the user.
+ *
+ * @note -In the case of a chained mbuf the AmtdAcc component can
+ * chain many user buffers together and pass ownership to the user in
+ * one function call.
+ *
+ * @param userId @ref IxAtmdAccUserId [in] - user If provided at registration of this
+ * callback.
+ * @param mbufPtr @ref IX_OSAL_MBUF [in] - a pointer to mbufs or chain of mbufs and is
+ * guaranteed not to be a null pointer.
+ *
+ */
+typedef void (*IxAtmdAccTxVcBufferReturnCallback) (IxAtmdAccUserId userId,
+ IX_OSAL_MBUF * mbufPtr);
+
+/* ------------------------------------------------------
+ Part of the IxAtmdAcc interface related to Initialisation
+ ------------------------------------------------------ */
+
+/**
+ *
+ * @ingroup IxAtmdAccAPI
+ *
+ * @fn ixAtmdAccInit (void)
+ *
+ * @brief Initialise the IxAtmdAcc Component
+ *
+ * This function initialise the IxAtmdAcc component. This function shall
+ * be called before any other function of the API. Its role is to
+ * initialise all internal resources of the IxAtmdAcc component.
+ *
+ * The ixQmgr component needs to be initialized prior the use of
+ * @a ixAtmdAccInit()
+ *
+ * @param none
+ *
+ * Failing to initilialize the IxAtmdAcc API before any use of it will
+ * result in a failed status.
+ * If the specified component is not present, a success status will still be
+ * returned, however, a warning indicating the NPE to download to is not
+ * present will be issued.
+ *
+ * @return @li IX_SUCCESS initialisation is complete (in case of component not
+ * being present, a warning is clearly indicated)
+ * @return @li IX_FAIL unable to process this request either
+ * because this IxAtmdAcc is already initialised
+ * or some unspecified error has occrred.
+ */
+PUBLIC IX_STATUS ixAtmdAccInit (void);
+
+/**
+ *
+ * @ingroup IxAtmdAccAPI
+ *
+ * @fn ixAtmdAccShow (void)
+ *
+ * @brief Show IxAtmdAcc configuration on a per port basis
+ *
+ * @param none
+ *
+ * @return none
+ *
+ * @note - Display use printf() and are redirected to stdout
+ */
+PUBLIC void
+ixAtmdAccShow (void);
+
+/**
+ *
+ * @ingroup IxAtmdAccAPI
+ *
+ * @fn ixAtmdAccStatsShow (void)
+ *
+ * @brief Show all IxAtmdAcc stats
+ *
+ * @param none
+ *
+ * @return none
+ *
+ * @note - Stats display use printf() and are redirected to stdout
+ */
+PUBLIC void
+ixAtmdAccStatsShow (void);
+
+/**
+ *
+ * @ingroup IxAtmdAccAPI
+ *
+ * @fn ixAtmdAccStatsReset (void)
+ *
+ * @brief Reset all IxAtmdAcc stats
+ *
+ * @param none
+ *
+ * @return none
+ *
+ */
+PUBLIC void
+ixAtmdAccStatsReset (void);
+
+/* ------------------------------------------------------
+ Part of the IxAtmdAcc interface related to RX traffic
+ ------------------------------------------------------ */
+
+/**
+ *
+ * @ingroup IxAtmdAccAPI
+ *
+ * @fn ixAtmdAccRxVcConnect (IxAtmLogicalPort port,
+ unsigned int vpi,
+ unsigned int vci,
+ IxAtmdAccAalType aalServiceType,
+ IxAtmRxQueueId rxQueueId,
+ IxAtmdAccUserId userCallbackId,
+ IxAtmdAccRxVcRxCallback rxCallback,
+ unsigned int minimumReplenishCount,
+ IxAtmConnId * connIdPtr,
+ IxAtmNpeRxVcId * npeVcIdPtr )
+ *
+ * @brief Connect to a Aal Pdu receive service for a particular
+ * port/vpi/vci, and service type.
+ *
+ * This function allows a user to connect to an Aal5/Aal0/OAM Pdu receive service
+ * for a particular port/vpi/vci. It registers the callback and allocates
+ * internal resources and a Connection Id to be used in further API calls
+ * related to this VCC.
+ *
+ * The function will setup VC receive service on the specified rx queue.
+ *
+ * This function is blocking and makes use internal locks, and hence
+ * should not be called from an interrupt context.
+ *
+ * On return from @a ixAtmdAccRxVcConnect() with a failure status, the
+ * connection Id parameter is unspecified. Its value cannot be used.
+ * A connId is the reference by which IxAtmdAcc refers to a
+ * connected VC. This identifier is the result of a succesful call
+ * to a connect function. This identifier is invalid after a
+ * sucessful call to a disconnect function.
+ *
+ * Calling this function for the same combination of Vpi, Vci and more
+ * than once without calling @a ixAtmdAccRxVcTryDisconnect() will result in a
+ * failure status.
+ *
+ * If this function returns success the user should supply receive
+ * buffers by calling @a ixAtmdAccRxVcFreeReplenish() and then call
+ * @a ixAtmdAccRxVcEnable() to begin receiving pdus.
+ *
+ * There is a choice of two receive Qs on which the VC pdus could be
+ * receive. The user must associate the VC with one of these. Essentially
+ * having two qs allows more flexible system configuration such as have
+ * high prioriy traffic on one q (e.g. voice) and low priority traffic on
+ * the other (e.g. data). The high priority Q could be serviced in
+ * preference to the low priority Q. One queue may be configured to be
+ * serviced as soon as there is traffic, the other queue may be configured
+ * to be serviced by a polling mechanism running at idle time.
+ *
+ * Two AAL0 services supporting 48 or 52 byte cell data are provided.
+ * Received AAL0 PDUs will be be a multiple of the cell data size (48/52).
+ * AAL0_52 is a raw cell service and includes an ATM cell header
+ * (excluding HEC) at the start of each cell.
+ *
+ * A single "OAM Rx channel" for all ports may be enabled by
+ * establishing a dedicated OAM Rx connection.
+ *
+ * The OAM service allows buffers containing 52 byte OAM F4/F5 cells
+ * to be transmitted and received over the dedicated OAM channels.
+ * HEC is appended/removed, and CRC-10 performed by the NPE. The OAM
+ * service offered by AtmdAcc is a raw cell transport service.
+ * It is assumed that ITU I.610 procedures that make use of this
+ * service are implemented above AtmdAcc.
+ *
+ * Note that the dedicated OAM connections are established on
+ * reserved VPI,VCI, and (in the case of Rx) port values.
+ * These values are used purely to descriminate the dedicated OAM channels
+ * and do not identify a particular OAM F4/F5 flow. F4/F5 flows may be
+ * realised for particluar VPI/VCIs by manipulating the VPI,VCI
+ * fields of the ATM cell headers of cells in the buffers passed
+ * to AtmdAcc.
+ *
+ * Calling this function prior to enable the port will fail.
+ *
+ * @sa ixAtmdAccRxDispatch
+ * @sa ixAtmdAccRxVcEnable
+ * @sa ixAtmdAccRxVcDisable
+ * @sa ixAtmdAccRxVcTryDisconnect
+ * @sa ixAtmdAccPortEnable
+ *
+ * @param port @ref IxAtmLogicalPort [in] - VC identification : logical PHY port
+ * [@a IX_UTOPIA_PORT_0 .. @a IX_UTOPIA_MAX_PORTS - 1]
+ * @param vpi unsigned int [in] - VC identification : ATM Vpi [0..255] or IX_ATMDACC_OAM_VPI
+ * @param vci unsigned int [in] - VC identification : ATM Vci [0..65535] or IX_ATMDACC_OAM_VCI
+ * @param aalServiceType @ref IxAtmdAccAalType [in] - type of service: AAL5, AAL0_48, AAL0_52, or OAM
+ * @param rxQueueId @ref IxAtmRxQueueId [in] - this identifieds which of two Qs the VC
+ * should use.when icoming traffic is processed
+ * @param userCallbackId @ref IxAtmdAccUserId [in] - user Id used later as a parameter to
+ * the supplied rxCallback.
+ * @param rxCallback [in] @ref IxAtmdAccRxVxRxCallback - function called when mbufs are received.
+ * This parameter cannot be a null pointer.
+ * @param bufferFreeCallback [in] - function to be called to return
+ * ownership of buffers to IxAtmdAcc user.
+ * @param minimumReplenishCount unsigned int [in] - For AAL5/AAL0 the number of free mbufs
+ * to be used with this channel. Use a high number when the expected traffic
+ * rate on this channel is high, or when the user's mbufs are small, or when
+ * the RxVcFreeLow Notification has to be invoked less often. When this
+ * value is IX_ATMDACC_DEFAULT_REPLENISH_COUNT, the minimum of
+ * resources will be used. Depending on traffic rate, pdu
+ * size and mbuf size, rxfree queue size, polling/interrupt rate, this value may
+ * require to be replaced by a different value in the range 1-128
+ * For OAM the rxFree queue size is fixed by atmdAcc and this parameter is ignored.
+ * @param connIdPtr @ref IxAtmConnId [out] - pointer to a connection Id
+ * This parameter cannot be a null pointer.
+ * @param npeVcIdPtr @ref IxAtmNpeRxVcId [out] - pointer to an npe Vc Id
+ * This parameter cannot be a null pointer.
+ *
+ * @return @li IX_SUCCESS successful call to IxAtmdAccRxVcConnect
+ * @return @li IX_ATMDACC_BUSY cannot process this request :
+ * no VC is available
+ * @return @li IX_FAIL
+ * parameter error,
+ * VC already in use,
+ * attempt to connect AAL service on reserved OAM VPI/VCI,
+ * attempt to connect OAM service on VPI/VCI other than the reserved OAM VPI/VCI,
+ * port is not initialised,
+ * or some other error occurs during processing.
+ *
+ */
+PUBLIC IX_STATUS ixAtmdAccRxVcConnect (IxAtmLogicalPort port,
+ unsigned int vpi,
+ unsigned int vci,
+ IxAtmdAccAalType aalServiceType,
+ IxAtmRxQueueId rxQueueId,
+ IxAtmdAccUserId userCallbackId,
+ IxAtmdAccRxVcRxCallback rxCallback,
+ unsigned int minimumReplenishCount,
+ IxAtmConnId * connIdPtr,
+ IxAtmNpeRxVcId * npeVcIdPtr );
+
+/**
+ *
+ * @ingroup IxAtmdAccAPI
+ *
+ * @fn ixAtmdAccRxVcFreeReplenish (IxAtmConnId connId,
+ IX_OSAL_MBUF * mbufPtr)
+ *
+ * @brief Provide free mbufs for data reception on a connection.
+ *
+ * This function provides mbufs for data reception by the hardware. This
+ * function needs to be called by the user on a regular basis to ensure
+ * no packet loss. Providing free buffers is a connection-based feature;
+ * each connection can have different requirements in terms of buffer size
+ * number of buffers, recycling rate. This function could be invoked from
+ * within the context of a @a IxAtmdAccRxVcFreeLowCallback() callback
+ * for a particular VC
+ *
+ * Mbufs provided through this function call can be chained. They will be
+ * unchained internally. A call to this function with chained mbufs or
+ * multiple calls with unchained mbufs are equivalent, but calls with
+ * unchained mbufs are more efficients.
+ *
+ * Mbufs provided to this interface need to be able to hold at least one
+ * full cell payload (48/52 bytes, depending on service type).
+ * Chained buffers with a size less than the size supported by the hardware
+ * will be returned through the rx callback provided during the connect step.
+ *
+ * Failing to invoke this function prior to enabling the RX traffic
+ * can result in packet loss.
+ *
+ * This function is not reentrant for the same connId.
+ *
+ * This function does not use system resources and can be
+ * invoked from an interrupt context.
+ *
+ * @note - Over replenish is detected, and extra mbufs are returned through
+ * the rx callback provided during the connect step.
+ *
+ * @note - Mbuf provided to the replenish function should have a length greater or
+ * equal to 48/52 bytes according to service type.
+ *
+ * @note - The memory cache of mMbuf payload should be invalidated prior to Mbuf
+ * submission. Flushing the Mbuf headers is handled by IxAtmdAcc.
+ *
+ * @note - When a chained mbuf is provided, this function process the mbufs
+ * up to the hardware limit and invokes the user-supplied callback
+ * to release extra buffers.
+ *
+ * @sa ixAtmdAccRxVcFreeLowCallbackRegister
+ * @sa IxAtmdAccRxVcFreeLowCallback
+ * @sa ixAtmdAccRxVcConnect
+ *
+ * @param connId @ref IxAtmConnId [in] - connection Id as returned from a succesfull call to
+ * @a IxAtmdAccRxVcConnect()
+ * @param mbufPtr @ref IX_OSAL_MBUF [in] - pointer to a mbuf structure to be used for data
+ * reception. The mbuf pointed to by this parameter can be chained
+ * to an other mbuf.
+ *
+ * @return @li IX_SUCCESS successful call to @a ixAtmdAccRxVcFreeReplenish()
+ * and the mbuf is now ready to use for incoming traffic.
+ * @return @li IX_ATMDACC_BUSY cannot process this request because
+ * the max number of outstanding free buffers has been reached
+ * or the internal resources have exhausted for this VC.
+ * The user is responsible for retrying this request later.
+ * @return @li IX_FAIL cannot process this request because of parameter
+ * errors or some unspecified internal error has occurred.
+ *
+ * @note - It is not always guaranteed the replenish step to be as fast as the
+ * hardware is consuming Rx Free mbufs. There is nothing in IxAtmdAcc to
+ * guarantee that replenish reaches the rxFree threshold level. If the
+ * threshold level is not reached, the next rxFree low notification for
+ * this channel will not be triggered.
+ * The preferred ways to replenish can be as follows (depending on
+ * applications and implementations) :
+ * @li Replenish in a rxFree low notification until the function
+ * ixAtmdAccRxVcFreeReplenish() returns IX_ATMDACC_BUSY
+ * @li Query the queue level using @sa ixAtmdAccRxVcFreeEntriesQuery, then
+ * , replenish using @a ixAtmdAccRxVcFreeReplenish(), then query the queue
+ * level again, and replenish if the threshold is still not reached.
+ * @li Trigger replenish from an other event source and use rxFree starvation
+ * to throttle the Rx traffic.
+ *
+ */
+PUBLIC IX_STATUS ixAtmdAccRxVcFreeReplenish (IxAtmConnId connId,
+ IX_OSAL_MBUF * mbufPtr);
+
+/**
+ *
+ * @ingroup IxAtmdAccAPI
+ *
+ * @fn ixAtmdAccRxVcFreeLowCallbackRegister (IxAtmConnId connId,
+ unsigned int numberOfMbufs,
+ IxAtmdAccRxVcFreeLowCallback callback)
+ *
+ * @brief Configure the RX Free threshold value and register a callback
+ * to handle threshold notifications.
+ *
+ * The function ixAtmdAccRxVcFreeLowCallbackRegister sets the threshold value for
+ * a particular RX VC. When the number of buffers reaches this threshold
+ * the callback is invoked.
+ *
+ * This function should be called once per VC before RX traffic is
+ * enabled.This function will fail if the curent level of the free buffers
+ * is equal or less than the threshold value.
+ *
+ * @sa ixAtmdAccRxVcFreeLowCallbackRegister
+ * @sa IxAtmdAccRxVcFreeLowCallback
+ * @sa ixAtmdAccRxVcFreeReplenish
+ * @sa ixAtmdAccRxVcFreeEntriesQuery
+ * @sa ixAtmdAccRxVcConnect
+ *
+ * @param connId @ref IxAtmConnId [in] - connection Id as resulted from a succesfull call
+ * to @a IxAtmdAccRxVcConnect()
+ * @param numberOfMbufs unsigned int [in] - threshold number of buffers. This number
+ * has to be a power of 2, one of the values 0,1,2,4,8,16,32....
+ * The maximum value cannot be more than half of the rxFree queue
+ * size (which can be retrieved using @a ixAtmdAccRxVcFreeEntriesQuery()
+ * before any use of the @a ixAtmdAccRxVcFreeReplenish() function)
+ * @param callback @ref IxAtmdAccRxVcFreeLowCallback [in] - function telling the user that the number of
+ * free buffers has reduced to the threshold value.
+ *
+ * @return @li IX_SUCCESS Threshold set successfully.
+ * @return @li IX_FAIL parameter error or the current number of free buffers
+ * is less than or equal to the threshold supplied or some
+ * unspecified error has occrred.
+ *
+ * @note - the callback will be called when the threshold level will drop from
+ * exactly (numberOfMbufs + 1) to (numberOfMbufs).
+ *
+ */
+PUBLIC IX_STATUS ixAtmdAccRxVcFreeLowCallbackRegister (IxAtmConnId connId,
+ unsigned int numberOfMbufs,
+ IxAtmdAccRxVcFreeLowCallback callback);
+
+/**
+ *
+ * @ingroup IxAtmdAccAPI
+ *
+ * @fn ixAtmdAccRxVcFreeEntriesQuery (IxAtmConnId connId,
+ unsigned int *numberOfMbufsPtr)
+ *
+ * @brief Get the number of rx mbufs the system can accept to replenish the
+ * the rx reception mechanism on a particular channel
+ *
+ * The ixAtmdAccRxVcFreeEntriesQuery function is used to retrieve the current
+ * number of available mbuf entries for reception, on a per-VC basis. This
+ * function can be used to know the number of mbufs which can be provided
+ * using @a ixAtmdAccRxVcFreeReplenish().
+ *
+ * This function can be used from a timer context, or can be associated
+ * with a threshold event, or can be used inside an active polling
+ * mechanism which is under user control.
+ *
+ * This function is reentrant and does not use system resources and can
+ * be invoked from an interrupt context.
+ *
+ * @param connId @ref IxAtmConnId [in] - connection Id as resulted from a succesfull call
+ * to @a IxAtmdAccRxVcConnect()
+ * @param numberOfMbufsPtr unsigned int [out] - Pointer to the number of available entries.
+ * . This parameter cannot be a null pointer.
+ *
+ * @return @li IX_SUCCESS the current number of mbufs not yet used for incoming traffic
+ * @return @li IX_FAIL invalid parameter
+ *
+ * @sa ixAtmdAccRxVcFreeReplenish
+ *
+ */
+PUBLIC IX_STATUS ixAtmdAccRxVcFreeEntriesQuery (IxAtmConnId connId,
+ unsigned int *numberOfMbufsPtr);
+
+/**
+ *
+ * @ingroup IxAtmdAccAPI
+ *
+ * @fn ixAtmdAccRxVcEnable (IxAtmConnId connId)
+ *
+ * @brief Start the RX service on a VC.
+ *
+ * This functions kicks-off the traffic reception for a particular VC.
+ * Once invoked, incoming PDUs will be made available by the hardware
+ * and are eventually directed to the @a IxAtmdAccRxVcRxCallback() callback
+ * registered for the connection.
+ *
+ * If the traffic is already running, this function returns IX_SUCCESS.
+ * This function can be invoked many times.
+ *
+ * IxAtmdAccRxVcFreeLowCallback event will occur only after
+ * @a ixAtmdAccRxVcEnable() function is invoked.
+ *
+ * Before using this function, the @a ixAtmdAccRxVcFreeReplenish() function
+ * has to be used to replenish the RX Free queue. If not, incoming traffic
+ * may be discarded.and in the case of interrupt driven reception the
+ * @a IxAtmdAccRxVcFreeLowCallback() callback may be invoked as a side effect
+ * during a replenish action.
+ *
+ * This function is not reentrant and should not be used inside an
+ * interrupt context.
+ *
+ * For an VC connection this function can be called after a call to
+ * @a ixAtmdAccRxVcDisable() and should not be called after
+ * @a ixAtmdAccRxVcTryDisconnect()
+ *
+ * @sa ixAtmdAccRxVcDisable
+ * @sa ixAtmdAccRxVcConnect
+ * @sa ixAtmdAccRxVcFreeReplenish
+ *
+ * @param connId @ref IxAtmConnId [in] - connection Id as resulted from a succesfull call
+ * to @a IxAtmdAccRxVcConnect()
+ *
+ * @return @li IX_SUCCESS successful call to ixAtmdAccRxVcEnable
+ * @return @li IX_ATMDACC_WARNING the channel is already enabled
+ * @return @li IX_FAIL invalid parameters or some unspecified internal
+ * error occured.
+ *
+ */
+PUBLIC IX_STATUS ixAtmdAccRxVcEnable (IxAtmConnId connId);
+
+/**
+ *
+ * @ingroup IxAtmdAccAPI
+ *
+ * @fn ixAtmdAccRxVcDisable (IxAtmConnId connId)
+ *
+ * @brief Stop the RX service on a VC.
+ *
+ * This functions stops the traffic reception for a particular VC connection.
+ *
+ * Once invoked, incoming Pdus are discarded by the hardware. Any Pdus
+ * pending will be freed to the user
+ *
+ * Hence once this function returns no more receive callbacks will be
+ * called for that VC. However, buffer free callbacks will be invoked
+ * until such time as all buffers supplied by the user have been freed
+ * back to the user
+ *
+ * Calling this function doe not invalidate the connId.
+ * @a ixAtmdAccRxVcEnable() can be invoked to enable Pdu reception again.
+ *
+ * If the traffic is already stopped, this function returns IX_SUCCESS.
+ *
+ * This function is not reentrant and should not be used inside an
+ * interrupt context.
+ *
+ * @sa ixAtmdAccRxVcConnect
+ * @sa ixAtmdAccRxVcEnable
+ * @sa ixAtmdAccRxVcDisable
+ *
+ * @param connId @ref IxAtmConnId [in] - connection Id as resulted from a succesfull call to @a
+ * IxAtmdAccRxVcConnect()
+ *
+ * @return @li IX_SUCCESS successful call to @a ixAtmdAccRxVcDisable().
+ * @return @li IX_ATMDACC_WARNING the channel is already disabled
+ * @return @li IX_FAIL invalid parameters or some unspecified internal error occured
+ *
+ */
+PUBLIC IX_STATUS ixAtmdAccRxVcDisable (IxAtmConnId connId);
+
+/**
+ *
+ * @ingroup IxAtmdAccAPI
+ *
+ * @fn ixAtmdAccRxVcTryDisconnect (IxAtmConnId connId)
+ *
+ * @brief Disconnect a VC from the RX service.
+ *
+ * This function deregisters the VC and guarantees that all resources
+ * associated with this VC are free. After its execution, the connection
+ * Id is not available.
+ *
+ * This function will fail until such time as all resources allocated to
+ * the VC connection have been freed. The user is responsible to delay and
+ * call again this function many times until a success status is returned.
+ *
+ * This function needs internal locks and should not be called from an
+ * interrupt context
+ *
+ * @param connId @ref IxAtmConnId [in] - connection Id as resulted from a succesfull call to
+ * @a IxAtmdAccRxVcConnect()
+ *
+ * @return @li IX_SUCCESS successful call to ixAtmdAccRxVcDisable
+ * @return @li IX_ATMDACC_RESOURCES_STILL_ALLOCATED not all resources
+ * associated with the connection have been freed.
+ * @return @li IX_FAIL cannot process this request because of a parameter
+ * error
+ *
+ */
+PUBLIC IX_STATUS ixAtmdAccRxVcTryDisconnect (IxAtmConnId connId);
+
+/* ------------------------------------------------------
+ Part of the IxAtmdAcc interface related to TX traffic
+ ------------------------------------------------------ */
+
+/**
+ *
+ * @ingroup IxAtmdAccAPI
+ *
+ * @fn ixAtmdAccTxVcConnect (IxAtmLogicalPort port,
+ unsigned int vpi,
+ unsigned int vci,
+ IxAtmdAccAalType aalServiceType,
+ IxAtmdAccUserId userId,
+ IxAtmdAccTxVcBufferReturnCallback bufferFreeCallback,
+ IxAtmConnId * connIdPtr)
+ *
+ * @brief Connect to a Aal Pdu transmit service for a particular
+ * port/vpi/vci and service type.
+ *
+ * This function allows a user to connect to an Aal5/Aal0/OAM Pdu transmit service
+ * for a particular port/vpi/vci. It registers the callback and allocates
+ * internal resources and a Connection Id to be used in further API calls
+ * related to this VC.
+ *
+ * The function will setup VC transmit service on the specified on the
+ * specified port. A connId is the reference by which IxAtmdAcc refers to a
+ * connected VC. This identifier is the result of a succesful call
+ * to a connect function. This identifier is invalid after a
+ * sucessful call to a disconnect function.
+ *
+ * This function needs internal locks, and hence should not be called
+ * from an interrupt context.
+ *
+ * On return from @a ixAtmdAccTxVcConnect() with a failure status, the
+ * connection Id parameter is unspecified. Its value cannot be used.
+ *
+ * Calling this function for the same combination of port, Vpi, Vci and
+ * more than once without calling @a ixAtmdAccTxVcTryDisconnect() will result
+ * in a failure status.
+ *
+ * Two AAL0 services supporting 48 or 52 byte cell data are provided.
+ * Submitted AAL0 PDUs must be a multiple of the cell data size (48/52).
+ * AAL0_52 is a raw cell service the client must format
+ * the PDU with an ATM cell header (excluding HEC) at the start of
+ * each cell, note that AtmdAcc does not validate the cell headers in
+ * a submitted PDU.
+ *
+ * For the OAM service an "OAM Tx channel" may be enabled for a port
+ * by establishing a single dedicated OAM Tx connection on that port.
+ *
+ * The OAM service allows buffers containing 52 byte OAM F4/F5 cells
+ * to be transmitted and received over the dedicated OAM channels.
+ * HEC is appended/removed, and CRC-10 performed by the NPE. The OAM
+ * service offered by AtmdAcc is a raw cell transport service.
+ * It is assumed that ITU I.610 procedures that make use of this
+ * service are implemented above AtmdAcc.
+ *
+ * Note that the dedicated OAM connections are established on
+ * reserved VPI,VCI, and (in the case of Rx) port values.
+ * These values are used purely to descriminate the dedicated OAM channels
+ * and do not identify a particular OAM F4/F5 flow. F4/F5 flows may be
+ * realised for particluar VPI/VCIs by manipulating the VPI,VCI
+ * fields of the ATM cell headers of cells in the buffers passed
+ * to AtmdAcc.
+ *
+ * Calling this function before enabling the port will fail.
+ *
+ * @sa ixAtmdAccTxVcTryDisconnect
+ * @sa ixAtmdAccPortTxScheduledModeEnable
+ * @sa ixAtmdAccPortEnable
+ *
+ * @param port @ref IxAtmLogicalPort [in] - VC identification : logical PHY port
+ * [@a IX_UTOPIA_PORT_0 .. @a IX_UTOPIA_MAX_PORTS - 1]
+ * @param vpi unsigned int [in] - VC identification : ATM Vpi [0..255] or IX_ATMDACC_OAM_VPI
+ * @param vci unsigned int [in] - VC identification : ATM Vci [0..65535] or IX_ATMDACC_OAM_VCI
+ * @param aalServiceType @ref IxAtmdAccAalType [in] - type of service AAL5, AAL0_48, AAL0_52, or OAM
+ * @param userId @ref IxAtmdAccUserId [in] - user id to be used later during callbacks related
+ * to this channel
+ * @param bufferFreeCallback @ref IxAtmdAccTxVcBufferReturnCallback [in] - function called when mbufs
+ * transmission is complete. This parameter cannot be a null
+ * pointer.
+ * @param connIdPtr @ref IxAtmConnId [out] - Pointer to a connection Id.
+ * This parameter cannot be a null pointer.
+ *
+ * @return @li IX_SUCCESS successful call to @a IxAtmdAccRxVcConnect().
+ * @return @li IX_ATMDACC_BUSY cannot process this request
+ * because no VC is available
+ * @return @li IX_FAIL
+ * parameter error,
+ * VC already in use,
+ * attempt to connect AAL service on reserved OAM VPI/VCI,
+ * attempt to connect OAM service on VPI/VCI other than the reserved OAM VPI/VCI,
+ * port is not initialised,
+ * or some other error occurs during processing.
+ *
+ * @note - Unscheduled mode is not supported in ixp425 1.0. Therefore, the
+ * function @a ixAtmdAccPortTxScheduledModeEnable() need to be called
+ * for this port before any establishing a Tx Connection
+ */
+PUBLIC IX_STATUS ixAtmdAccTxVcConnect (IxAtmLogicalPort port,
+ unsigned int vpi,
+ unsigned int vci,
+ IxAtmdAccAalType aalServiceType,
+ IxAtmdAccUserId userId,
+ IxAtmdAccTxVcBufferReturnCallback bufferFreeCallback,
+ IxAtmConnId * connIdPtr);
+
+/**
+ *
+ * @ingroup IxAtmdAccAPI
+ *
+ * @fn ixAtmdAccTxVcPduSubmit (IxAtmConnId connId,
+ IX_OSAL_MBUF * mbufPtr,
+ IxAtmdAccClpStatus clp,
+ unsigned int numberOfCells)
+ *
+ * @brief Submit a Pdu for transmission on connection.
+ *
+ * A data user calls this function to submit an mbufs containing a Pdu
+ * to be transmitted. The buffer supplied can be chained and the Pdu it
+ * contains must be complete.
+ *
+ * The transmission behavior of this call depends on the operational mode
+ * of the port on which the connection is made.
+ *
+ * In unscheduled mode the mbuf will be submitted to the hardware
+ * immediately if sufficent resource is available. Otherwise the function
+ * will return failure.
+ *
+ * In scheduled mode the buffer is queued internally in IxAtmdAcc. The cell
+ * demand is made known to the traffic shaping entity. Cells from the
+ * buffers are MUXed onto the port some time later as dictated by the
+ * traffic shaping entity. The traffic shaping entity does this by sending
+ * transmit schedules to IxAtmdAcc via @a ixAtmdAccPortTxProcess() function call.
+ *
+ * Note that the dedicated OAM channel is scheduled just like any
+ * other channel. This means that any OAM traffic relating to an
+ * active AAL0/AAL5 connection will be scheduled independantly of the
+ * AAL0/AAL5 traffic for that connection.
+ *
+ * When transmission is complete, the TX Done mechanism will give the
+ * owmnership of these buffers back to the customer. The tx done mechanism
+ * must be in operation before transmission is attempted.
+ *
+ * For AAL0/OAM submitted AAL0 PDUs must be a multiple of the cell data
+ * size (48/52). AAL0_52 and OAM are raw cell services, and the client
+ * must format the PDU with an ATM cell header (excluding HEC) at the
+ * start of each cell, note that AtmdAcc does not validate the cell headers in
+ * a submitted PDU.
+ *
+ *
+ * @sa IxAtmdAccTxVcBufferReturnCallback
+ * @sa ixAtmdAccTxDoneDispatch
+ *
+ * @param connId @ref IxAtmConnId [in] - connection Id as resulted from a succesfull call to
+ * @a ixAtmdAccTxVcConnect()
+ * @param mbufPtr @ref IX_OSAL_MBUF [in] - pointer to a chained structure of mbufs to transmit.
+ * This parameter cannot be a null pointer.
+ * @param clp @ref IxAtmdAccClpStatus [in] - clp indication for this PDU. All cells of this pdu
+ * will be sent with the clp bit set
+ * @param numberOfCells unsigned int [in] - number of cells in the PDU.
+ *
+ * @return @li IX_SUCCESS successful call to @a ixAtmdAccTxVcPduSubmit()
+ * The pdu pointed by the mbufPtr parameter will be
+ * transmitted
+ * @return @li IX_ATMDACC_BUSY unable to process this request because
+ * internal resources are all used. The caller is responsible
+ * for retrying this request later.
+ * @return @li IX_FAIL unable to process this request because of error
+ * in the parameters (wrong connId supplied,
+ * or wrong mbuf pointer supplied), the total length of all buffers
+ * in the chain should be a multiple of the cell size
+ * ( 48/52 depending on the service type ),
+ * or unspecified error during processing
+ *
+ * @note - This function in not re-entrant for the same VC (e.g. : two
+ * thread cannot send PDUs for the same VC). But two threads can
+ * safely call this function with a different connection Id
+ *
+ * @note - In unscheduled mode, this function is not re-entrant on a per
+ * port basis. The size of pdus is limited to 8Kb.
+ *
+ * @note - 0-length mbufs should be removed from the chain before submission.
+ * The total length of the pdu (sdu + padding +trailer) has to be
+ * updated in the header of the first mbuf of a chain of mbufs.
+ *
+ * @note - Aal5 trailer information (UUI, CPI, SDU length) has to be supplied
+ * before submission.
+ *
+ * @note - The payload memory cache should be flushed, if needed, prior to
+ * transmission. Mbuf headers are flushed by IxAtmdAcc
+ *
+ * @note - This function does not use system resources and can be used
+ * inside an interrupt context
+ */
+PUBLIC IX_STATUS ixAtmdAccTxVcPduSubmit (IxAtmConnId connId,
+ IX_OSAL_MBUF * mbufPtr,
+ IxAtmdAccClpStatus clp,
+ unsigned int numberOfCells);
+
+/**
+ *
+ * @ingroup IxAtmdAccAPI
+ *
+ * @fn ixAtmdAccTxVcTryDisconnect (IxAtmConnId connId)
+ *
+ * @brief Disconnect from a Aal Pdu transmit service for a particular
+ * port/vpi/vci.
+ *
+ * This function deregisters the VC and guarantees that all resources
+ * associated with this VC are free. After its execution, the connection
+ * Id is not available.
+ *
+ * This function will fail until such time as all resources allocated to
+ * the VC connection have been freed. The user is responsible to delay
+ * and call again this function many times until a success status is
+ * returned.
+ *
+ * After its execution, the connection Id is not available.
+ *
+ * @param connId @ref IxAtmConnId [in] - connection Id as resulted from a succesfull call to
+ * @a ixAtmdAccTxVcConnect()
+ *
+ * @return @li IX_SUCCESS successful call to @a ixAtmdAccTxVcTryDisconnect()
+ * @return @li IX_ATMDACC_RESOURCES_STILL_ALLOCATED not all resources
+ * associated with the connection have been freed. This condition will
+ * disappear after Tx and TxDone is complete for this channel.
+ * @return @li IX_FAIL unable to process this request because of errors
+ * in the parameters (wrong connId supplied)
+ *
+ * @note - This function needs internal locks and should not be called
+ * from an interrupt context
+ *
+ * @note - If the @a IX_ATMDACC_RESOURCES_STILL_ALLOCATED error does not
+ * clear after a while, this may be linked to a previous problem
+ * of cell overscheduling. Diabling the port and retry a disconnect
+ * will free the resources associated with this channel.
+ *
+ * @sa ixAtmdAccPortTxProcess
+ *
+ */
+PUBLIC IX_STATUS ixAtmdAccTxVcTryDisconnect (IxAtmConnId connId);
+
+#endif /* IXATMDACC_H */
+
+/**
+ * @} defgroup IxAtmdAccAPI
+ */
+
+
diff --git a/cpu/ixp/npe/include/IxAtmdAccCtrl.h b/cpu/ixp/npe/include/IxAtmdAccCtrl.h
new file mode 100644
index 0000000000..e2230493f2
--- /dev/null
+++ b/cpu/ixp/npe/include/IxAtmdAccCtrl.h
@@ -0,0 +1,1958 @@
+
+/**
+ * @file IxAtmdAccCtrl.h
+ *
+ * @date 20-Mar-2002
+ *
+ * @brief IxAtmdAcc Public API
+ *
+ * This file contains the public API of IxAtmdAcc, related to the
+ * control functions of the component.
+ *
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+/* ------------------------------------------------------
+ Doxygen group definitions
+ ------------------------------------------------------ */
+
+/**
+ *
+ * @defgroup IxAtmdAccCtrlAPI IXP400 ATM Driver Access (IxAtmdAcc) Control API
+ *
+ * @brief The public API for the IXP400 Atm Driver Control component
+ *
+ * IxAtmdAcc is the low level interface by which AAL PDU get transmitted
+ * to,and received from the Utopia bus
+ *
+ * This part is related to the Control configuration
+ *
+ * @{
+ */
+
+#ifndef IXATMDACCCTRL_H
+#define IXATMDACCCTRL_H
+
+#include "IxAtmdAcc.h"
+
+/* ------------------------------------------------------
+ AtmdAccCtrl Data Types definition
+ ------------------------------------------------------ */
+
+/**
+*
+* @ingroup IxAtmdAccCtrlAPI
+*
+* @def IX_ATMDACC_PORT_DISABLE_IN_PROGRESS
+*
+* @brief Port enable return code
+*
+* This constant is used to tell IxAtmDAcc user that the port disable
+* functions are not complete. The user can call ixAtmdAccPortDisableComplete()
+* to find out when the disable has finished. The port enable can then proceed.
+*
+*/
+#define IX_ATMDACC_PORT_DISABLE_IN_PROGRESS 5
+
+/**
+*
+* @ingroup IxAtmdAccCtrlAPI
+*
+* @def IX_ATMDACC_ALLPDUS
+*
+* @brief All PDUs
+*
+* This constant is used to tell IxAtmDAcc to process all PDUs from
+* the RX queue or the TX Done
+*
+* @sa IxAtmdAccRxDispatcher
+* @sa IxAtmdAccTxDoneDispatcher
+*
+*/
+#define IX_ATMDACC_ALLPDUS 0xffffffff
+
+/* ------------------------------------------------------
+ Part of the IxAtmdAcc interface related to RX traffic
+ ------------------------------------------------------ */
+
+/**
+ *
+ * @ingroup IxAtmdAccCtrlAPI
+ *
+ * @brief Callback prototype for notification of available PDUs for
+ * an Rx Q.
+ *
+ * This a protoype for a function which is called when there is at
+ * least one Pdu available for processing on a particular Rx Q.
+ *
+ * This function should call @a ixAtmdAccRxDispatch() with
+ * the aprropriate number of parameters to read and process the Rx Q.
+ *
+ * @sa ixAtmdAccRxDispatch
+ * @sa ixAtmdAccRxVcConnect
+ * @sa ixAtmdAccRxDispatcherRegister
+ *
+ * @param rxQueueId @ref IxAtmRxQueueId [in] indicates which RX queue to has Pdus to process.
+ * @param numberOfPdusToProcess unsigned int [in] indicates the minimum number of
+ * PDUs available to process all PDUs from the queue.
+ * @param reservedPtr unsigned int* [out] pointer to a int location which can
+ * be written to, but does not retain written values. This is
+ * provided to make this prototype compatible
+ * with @a ixAtmdAccRxDispatch()
+ *
+ * @return @li int - ignored.
+ *
+ */
+typedef IX_STATUS (*IxAtmdAccRxDispatcher) (IxAtmRxQueueId rxQueueId,
+ unsigned int numberOfPdusToProcess,
+ unsigned int *reservedPtr);
+
+/* ------------------------------------------------------
+ Part of the IxAtmdAcc interface related to TX traffic
+ ------------------------------------------------------ */
+
+/**
+ *
+ * @ingroup IxAtmdAccCtrlAPI
+ *
+ * @brief Callback prototype for transmitted mbuf when threshold level is
+ * crossed.
+ *
+ * IxAtmdAccTxDoneDispatcher is the prototype of the user function
+ * which get called when pdus are completely transmitted. This function
+ * is likely to call the @a ixAtmdAccTxDoneDispatch() function.
+ *
+ * This function is called when the number of available pdus for
+ * reception is crossing the threshold level as defined
+ * in @a ixAtmdAccTxDoneDispatcherRegister()
+ *
+ * This function is called inside an Qmgr dispatch context. No system
+ * resource or interrupt-unsafe feature should be used inside this
+ * callback.
+ *
+ * Transmitted buffers recycling implementation is a sytem-wide mechanism
+ * and needs to be set before any traffic is started. If this threshold
+ * mechanism is not used, the user is responsible for polling the
+ * transmitted buffers with @a ixAtmdAccTxDoneDispatch()
+ * and @a ixAtmdAccTxDoneLevelQuery() functions.
+ *
+ * @sa ixAtmdAccTxDoneDispatcherRegister
+ * @sa ixAtmdAccTxDoneDispatch
+ * @sa ixAtmdAccTxDoneLevelQuery
+ *
+ * @param numberOfPdusToProcess unsigned int [in] - The current number of pdus currently
+ * available for recycling
+ * @param *reservedPtr unsigned int [out] - pointer to a int location which can be
+ * written to but does not retain written values. This is provided
+ * to make this prototype compatible
+ * with @a ixAtmdAccTxDoneDispatch()
+ *
+ * @return @li IX_SUCCESS This is provided to make
+ * this prototype compatible with @a ixAtmdAccTxDoneDispatch()
+ * @return @li IX_FAIL invalid parameters or some unspecified internal
+ * error occured. This is provided to make
+ * this prototype compatible with @a ixAtmdAccTxDoneDispatch()
+ *
+ */
+typedef IX_STATUS (*IxAtmdAccTxDoneDispatcher) (unsigned int numberOfPdusToProcess,
+ unsigned int *reservedPtr);
+
+/**
+*
+* @ingroup IxAtmdAccCtrlAPI
+*
+* @brief Notification that the threshold number of scheduled cells
+* remains in a port's transmit Q.
+*
+* The is the prototype for of the user notification function which
+* gets called on a per-port basis, when the number of remaining
+* scheduled cells to be transmitted decreases to the threshold level.
+* The number of cells passed as a parameter can be used for scheduling
+* purposes as the maximum number of cells that can be passed in a
+* schedule table to the @a ixAtmdAccPortTxProcess() function.
+*
+* @sa ixAtmdAccPortTxCallbackRegister
+* @sa ixAtmdAccPortTxProcess
+* @sa ixAtmdAccPortTxFreeEntriesQuery
+*
+* @param port @ref IxAtmLogicalPort [in] - logical PHY port [@a IX_UTOPIA_PORT_0 .. @a IX_UTOPIA_MAX_PORTS - 1]
+* @param numberOfAvailableCells unsigned int [in] - number of available
+* cell entries.for the port
+*
+* @note - This functions shall not use system resources when used
+* inside an interrupt context.
+*
+*/
+typedef void (*IxAtmdAccPortTxLowCallback) (IxAtmLogicalPort port,
+ unsigned int numberOfAvailableCells);
+
+/**
+*
+* @ingroup IxAtmdAccCtrlAPI
+*
+* @brief Prototype to submit cells for transmission
+*
+* IxAtmdAccTxVcDemandUpdateCallback is the prototype of the callback
+* function used by AtmD to notify an ATM Scheduler that the user of
+* a VC has submitted cells for transmission.
+*
+* @sa IxAtmdAccTxVcDemandUpdateCallback
+* @sa IxAtmdAccTxVcDemandClearCallback
+* @sa IxAtmdAccTxSchVcIdGetCallback
+* @sa ixAtmdAccPortTxScheduledModeEnable
+*
+* @param port @ref IxAtmLogicalPort [in] - Specifies the ATM port on which the VC to be updated
+* is established
+* @param vcId int [in] - Identifies the VC to be updated. This is the value
+* returned by the @a IxAtmdAccTxSchVcIdGetCallback() call .
+* @param numberOfCells unsigned int [in] - Indicates how many ATM cells should be added
+* to the queue for this VC.
+*
+* @return @li IX_SUCCESS the function is registering the cell demand for
+* this VC.
+* @return @li IX_FAIL the function cannot register cell for this VC : the
+* scheduler maybe overloaded or misconfigured
+*
+*/
+typedef IX_STATUS (*IxAtmdAccTxVcDemandUpdateCallback) (IxAtmLogicalPort port,
+ int vcId,
+ unsigned int numberOfCells);
+
+/**
+*
+* @ingroup IxAtmdAccCtrlAPI
+*
+* @brief prototype to remove all currently queued cells from a
+* registered VC
+*
+* IxAtmdAccTxVcDemandClearCallback is the prototype of the function
+* to remove all currently queued cells from a registered VC. The
+* pending cell count for the specified VC is reset to zero. After the
+* use of this callback, the scheduler shall not schedule more cells
+* for this VC.
+*
+* This callback function is called during a VC disconnection
+* @a ixAtmdAccTxVcTryDisconnect()
+*
+* @sa IxAtmdAccTxVcDemandUpdateCallback
+* @sa IxAtmdAccTxVcDemandClearCallback
+* @sa IxAtmdAccTxSchVcIdGetCallback
+* @sa ixAtmdAccPortTxScheduledModeEnable
+* @sa ixAtmdAccTxVcTryDisconnect
+*
+* @param port @ref IxAtmLogicalPort [in] - Specifies the ATM port on which the VC to be cleared
+* is established
+* @param vcId int [in] - Identifies the VC to be cleared. This is the value
+* returned by the @a IxAtmdAccTxSchVcIdGetCallback() call .
+*
+* @return none
+*
+*/
+typedef void (*IxAtmdAccTxVcDemandClearCallback) (IxAtmLogicalPort port,
+ int vcId);
+
+/**
+*
+* @ingroup IxAtmdAccCtrlAPI
+*
+* @brief prototype to get a scheduler vc id
+*
+* IxAtmdAccTxSchVcIdGetCallback is the prototype of the function to get
+* a scheduler vcId
+*
+* @sa IxAtmdAccTxVcDemandUpdateCallback
+* @sa IxAtmdAccTxVcDemandClearCallback
+* @sa IxAtmdAccTxSchVcIdGetCallback
+* @sa ixAtmdAccPortTxScheduledModeEnable
+*
+* @param port @ref IxAtmLogicalPort [in] - Specifies the ATM logical port on which the VC is
+* established
+* @param vpi unsigned int [in] - For AAL0/AAL5 specifies the ATM vpi on which the
+* VC is established.
+* For OAM specifies the dedicated "OAM Tx channel" VPI.
+* @param vci unsigned int [in] - For AAL0/AAL5 specifies the ATM vci on which the
+* VC is established.
+* For OAM specifies the dedicated "OAM Tx channel" VCI.
+* @param connId @ref IxAtmConnId [in] - specifies the IxAtmdAcc connection Id already
+* associated with this VC
+* @param vcId int* [out] - pointer to a vcId
+*
+* @return @li IX_SUCCESS the function is returning a Scheduler vcId for this
+* VC
+* @return @li IX_FAIL the function cannot process scheduling for this VC.
+* the contents of vcId is unspecified
+*
+*/
+typedef IX_STATUS (*IxAtmdAccTxSchVcIdGetCallback) (IxAtmLogicalPort port,
+ unsigned int vpi,
+ unsigned int vci,
+ IxAtmConnId connId,
+ int *vcId);
+
+/* ------------------------------------------------------
+ Part of the IxAtmdAcc interface related to RX traffic
+ ------------------------------------------------------ */
+
+/**
+ *
+ * @ingroup IxAtmdAccCtrlAPI
+ *
+ * @fn ixAtmdAccRxDispatcherRegister (
+ IxAtmRxQueueId queueId,
+ IxAtmdAccRxDispatcher callback)
+ *
+ * @brief Register a notification callback to be invoked when there is
+ * at least one entry on a particular Rx queue.
+ *
+ * This function registers a callback to be invoked when there is at
+ * least one entry in a particular queue. The registered callback is
+ * called every time when the hardware adds one or more pdus to the
+ * specified Rx queue.
+ *
+ * This function cannot be used when a Rx Vc using this queue is
+ * already existing.
+ *
+ * @note -The callback function can be the API function
+ * @a ixAtmdAccRxDispatch() : every time the threhold level
+ * of the queue is reached, the ixAtmdAccRxDispatch() is
+ * invoked to remove all entries from the queue.
+ *
+ * @sa ixAtmdAccRxDispatch
+ * @sa IxAtmdAccRxDispatcher
+ *
+ * @param queueId @ref IxAtmRxQueueId [in] RX queue identification
+ * @param callback @ref IxAtmdAccRxDispatcher [in] function triggering the delivery of incoming
+ * traffic. This parameter cannot be a null pointer.
+ *
+ * @return @li IX_SUCCESS Successful call to @a ixAtmdAccRxDispatcherRegister()
+ * @return @li IX_FAIL error in the parameters, or there is an
+ * already active RX VC for this queue or some unspecified
+ * internal error occurred.
+ *
+ */
+PUBLIC IX_STATUS ixAtmdAccRxDispatcherRegister (
+ IxAtmRxQueueId queueId,
+ IxAtmdAccRxDispatcher callback);
+
+/**
+ *
+ * @ingroup IxAtmdAccCtrlAPI
+ *
+ * @fn ixAtmdAccRxDispatch (IxAtmRxQueueId rxQueueId,
+ unsigned int numberOfPdusToProcess,
+ unsigned int *numberOfPdusProcessedPtr)
+ *
+ *
+ * @brief Control function which executes Rx processing for a particular
+ * Rx stream.
+ *
+ * The @a IxAtmdAccRxDispatch() function is used to process received Pdus
+ * available from one of the two incoming RX streams. When this function
+ * is invoked, the incoming traffic (up to the number of PDUs passed as
+ * a parameter) will be transferred to the IxAtmdAcc users through the
+ * callback @a IxAtmdAccRxVcRxCallback(), as registered during the
+ * @a ixAtmdAccRxVcConnect() call.
+ *
+ * The user receive callbacks will be executed in the context of this
+ * function.
+ *
+ * Failing to use this function on a regular basis when there is traffic
+ * will block incoming traffic and can result in Pdus being dropped by
+ * the hardware.
+ *
+ * This should be used to control when received pdus are handed off from
+ * the hardware to Aal users from a particluar stream. The function can
+ * be used from a timer context, or can be registered as a callback in
+ * response to an rx stream threshold event, or can be used inside an
+ * active polling mechanism which is under user control.
+ *
+ * @note - The signature of this function is directly compatible with the
+ * callback prototype which can be register with @a ixAtmdAccRxDispatcherRegister().
+ *
+ * @sa ixAtmdAccRxDispatcherRegister
+ * @sa IxAtmdAccRxVcRxCallback
+ * @sa ixAtmdAccRxVcFreeEntriesQuery
+ *
+ * @param rxQueueId @ref IxAtmRxQueueId [in] - indicates which RX queue to process.
+ * @param numberOfPdusToProcess unsigned int [in] - indicates the maxiumum number of PDU to
+ * remove from the RX queue. A value of IX_ATMDACC_ALLPDUS indicates
+ * to process all PDUs from the queue. This includes at least the PDUs
+ * in the queue when the fuction is invoked. Because of real-time
+ * constraints, there is no guarantee thatthe queue will be empty
+ * when the function exits. If this parameter is greater than the
+ * number of entries of the queues, the function will succeed
+ * and the parameter numberOfPdusProcessedPtr will reflect the exact
+ * number of PDUs processed.
+ * @param *numberOfPdusProcessedPtr unsigned int [out] - indicates the actual number of PDU
+ * processed during this call. This parameter cannot be a null
+ * pointer.
+ *
+ * @return @li IX_SUCCESS the number of PDUs as indicated in
+ * numberOfPdusProcessedPtr are removed from the RX queue and the VC callback
+ * are called.
+ * @return @li IX_FAIL invalid parameters or some unspecified internal
+ * error occured.
+ *
+ */
+PUBLIC IX_STATUS ixAtmdAccRxDispatch (IxAtmRxQueueId rxQueueId,
+ unsigned int numberOfPdusToProcess,
+ unsigned int *numberOfPdusProcessedPtr);
+
+/**
+ *
+ * @ingroup IxAtmdAccCtrlAPI
+ *
+ * @fn ixAtmdAccRxLevelQuery (IxAtmRxQueueId rxQueueId,
+ unsigned int *numberOfPdusPtr)
+ *
+ * @brief Query the number of entries in a particular RX queue.
+ *
+ * This function is used to retrieve the number of pdus received by
+ * the hardware and ready for distribution to users.
+ *
+ * @param rxQueueId @ref IxAtmRxQueueId [in] - indicates which of two RX queues to query.
+ * @param numberOfPdusPtr unsigned int* [out] - Pointer to store the number of available
+ * PDUs in the RX queue. This parameter cannot be a null pointer.
+ *
+ * @return @li IX_SUCCESS the value in numberOfPdusPtr specifies the
+ * number of incoming pdus waiting in this queue
+ * @return @li IX_FAIL an error occurs during processing.
+ * The value in numberOfPdusPtr is unspecified.
+ *
+ * @note - This function is reentrant, doesn't use system resources
+ * and can be used from an interrupt context.
+ *
+ */
+PUBLIC IX_STATUS ixAtmdAccRxLevelQuery (IxAtmRxQueueId rxQueueId,
+ unsigned int *numberOfPdusPtr);
+
+/**
+ *
+ * @ingroup IxAtmdAccCtrlAPI
+ *
+ * @fn ixAtmdAccRxQueueSizeQuery (IxAtmRxQueueId rxQueueId,
+ unsigned int *numberOfPdusPtr)
+ *
+ * @brief Query the size of a particular RX queue.
+ *
+ * This function is used to retrieve the number of pdus the system is
+ * able to queue when reception is complete.
+ *
+ * @param rxQueueId @ref IxAtmRxQueueId [in] - indicates which of two RX queues to query.
+ * @param numberOfPdusPtr unsigned int* [out] - Pointer to store the number of pdus
+ * the system is able to queue in the RX queue. This parameter
+ * cannot be a null pointer.
+ *
+ * @return @li IX_SUCCESS the value in numberOfPdusPtr specifies the
+ * number of pdus the system is able to queue.
+ * @return @li IX_FAIL an error occurs during processing.
+ * The value in numberOfPdusPtr is unspecified.
+ *
+ * @note - This function is reentrant, doesn't use system resources
+ * and can be used from an interrupt context.
+ *
+ */
+PUBLIC IX_STATUS ixAtmdAccRxQueueSizeQuery (IxAtmRxQueueId rxQueueId,
+ unsigned int *numberOfPdusPtr);
+
+/* ------------------------------------------------------
+ Part of the IxAtmdAcc interface related to TX traffic
+ ------------------------------------------------------ */
+
+/**
+ *
+ * @ingroup IxAtmdAccCtrlAPI
+ *
+ * @fn ixAtmdAccPortTxFreeEntriesQuery (IxAtmLogicalPort port,
+ unsigned int *numberOfCellsPtr)
+ *
+ * @brief Get the number of available cells the system can accept for
+ * transmission.
+ *
+ * The function is used to retrieve the number of cells that can be
+ * queued for transmission to the hardware.
+ *
+ * This number is based on the worst schedule table where one cell
+ * is stored in one schedule table entry, depending on the pdus size
+ * and mbuf size and fragmentation.
+ *
+ * This function doesn't use system resources and can be used from a
+ * timer context, or can be associated with a threshold event, or can
+ * be used inside an active polling mechanism
+ *
+ * @param port @ref IxAtmLogicalPort [in] - logical PHY port [@a IX_UTOPIA_PORT_0 .. @a IX_UTOPIA_MAX_PORTS - 1]
+ * @param numberOfCellsPtr unsigned int* [out] - number of available cells.
+ * This parameter cannot be a null pointer.
+ *
+ * @sa ixAtmdAccPortTxProcess
+ *
+ * @return @li IX_SUCCESS numberOfCellsPtr contains the number of cells that can be scheduled
+ * for this port.
+ * @return @li IX_FAIL error in the parameters, or some processing error
+ * occured.
+ *
+ */
+PUBLIC IX_STATUS ixAtmdAccPortTxFreeEntriesQuery (IxAtmLogicalPort port,
+ unsigned int *numberOfCellsPtr);
+
+/**
+ *
+ * @ingroup IxAtmdAccCtrlAPI
+ *
+ * @fn ixAtmdAccPortTxCallbackRegister (IxAtmLogicalPort port,
+ unsigned int numberOfCells,
+ IxAtmdAccPortTxLowCallback callback)
+ *
+ * @brief Configure the Tx port threshold value and register a callback to handle
+ * threshold notifications.
+ *
+ * This function sets the threshold in cells
+ *
+ * @sa ixAtmdAccPortTxCallbackRegister
+ * @sa ixAtmdAccPortTxProcess
+ * @sa ixAtmdAccPortTxFreeEntriesQuery
+ *
+ * @param port @ref IxAtmLogicalPort [in] - logical PHY port [@a IX_UTOPIA_PORT_0 .. @a IX_UTOPIA_MAX_PORTS - 1]
+ * @param numberOfCells unsigned int [in] - threshold value which triggers the callback
+ * invocation, This number has to be one of the
+ * values 0,1,2,4,8,16,32 ....
+ * The maximum value cannot be more than half of the txVc queue
+ * size (which can be retrieved using @a ixAtmdAccPortTxFreeEntriesQuery()
+ * before any Tx traffic is sent for this port)
+ * @param callback @ref IxAtmdAccPortTxLowCallback [in] - callback function to invoke when the threshold
+ * level is reached.
+ * This parameter cannot be a null pointer.
+ *
+ * @return @li IX_SUCCESS Successful call to @a ixAtmdAccPortTxCallbackRegister()
+ * @return @li IX_FAIL error in the parameters, Tx channel already set for this port
+ * threshold level is not correct or within the range regarding the
+ * queue size:or unspecified error during processing:
+ *
+ * @note - This callback function get called when the threshold level drops from
+ * (numberOfCells+1) cells to (numberOfCells) cells
+ *
+ * @note - This function should be called during system initialisation,
+ * outside an interrupt context
+ *
+ */
+PUBLIC IX_STATUS ixAtmdAccPortTxCallbackRegister (IxAtmLogicalPort port,
+ unsigned int numberOfCells,
+ IxAtmdAccPortTxLowCallback callback);
+
+/**
+ *
+ * @ingroup IxAtmdAccCtrlAPI
+ *
+ * @fn ixAtmdAccPortTxScheduledModeEnable (IxAtmLogicalPort port,
+ IxAtmdAccTxVcDemandUpdateCallback vcDemandUpdateCallback,
+ IxAtmdAccTxVcDemandClearCallback vcDemandClearCallback,
+ IxAtmdAccTxSchVcIdGetCallback vcIdGetCallback)
+ *
+ * @brief Put the port into Scheduled Mode
+ *
+ * This function puts the specified port into scheduled mode of
+ * transmission which means an external s/w entity controls the
+ * transmission of cells on this port. This faciltates traffic shaping on
+ * the port.
+ *
+ * Any buffers submitted on a VC for this port will be queued in IxAtmdAcc.
+ * The transmission of these buffers to and by the hardware will be driven
+ * by a transmit schedule submitted regulary in calls to
+ * @a ixAtmdAccPortTxProcess() by traffic shaping entity.
+ *
+ * The transmit schedule is expected to be dynamic in nature based on
+ * the demand in cells for each VC on the port. Hence the callback
+ * parameters provided to this function allow IxAtmdAcc to inform the
+ * shaping entity of demand changes for each VC on the port.
+ *
+ * By default a port is in Unscheduled Mode so if this function is not
+ * called, transmission of data is done without sheduling rules, on a
+ * first-come, first-out basis.
+ *
+ * Once a port is put in scheduled mode it cannot be reverted to
+ * un-scheduled mode. Note that unscheduled mode is not supported
+ * in ixp425 1.0
+ *
+ * @note - This function should be called before any VCs have be
+ * connected on a port. Otherwise this function call will return failure.
+ *
+ * @note - This function uses internal locks and should not be called from
+ * an interrupt context
+ *
+ * @sa IxAtmdAccTxVcDemandUpdateCallback
+ * @sa IxAtmdAccTxVcDemandClearCallback
+ * @sa IxAtmdAccTxSchVcIdGetCallback
+ * @sa ixAtmdAccPortTxProcess
+ *
+ * @param port @ref IxAtmLogicalPort [in] - logical PHY port [@a IX_UTOPIA_PORT_0 .. @a IX_UTOPIA_MAX_PORTS - 1]
+ * @param vcDemandUpdateCallback @ref IxAtmdAccTxVcDemandUpdateCallback [in] - callback function used to update
+ * the number of outstanding cells for transmission. This parameter
+ * cannot be a null pointer.
+ * @param vcDemandClearCallback @ref IxAtmdAccTxVcDemandClearCallback [in] - callback function used to remove all
+ * clear the number of outstanding cells for a VC. This parameter
+ * cannot be a null pointer.
+ * @param vcIdGetCallback @ref IxAtmdAccTxSchVcIdGetCallback [in] - callback function used to exchange vc
+ * Identifiers between IxAtmdAcc and the entity supplying the
+ * transmit schedule. This parameter cannot be a null pointer.
+ *
+ * @return @li IX_SUCCESS scheduler registration is complete and the port
+ * is now in scheduled mode.
+ * @return @li IX_FAIL failed (wrong parameters, or traffic is already
+ * enabled on this port, possibly without ATM shaping)
+ *
+ */
+PUBLIC IX_STATUS ixAtmdAccPortTxScheduledModeEnable (IxAtmLogicalPort port,
+ IxAtmdAccTxVcDemandUpdateCallback vcDemandUpdateCallback,
+ IxAtmdAccTxVcDemandClearCallback vcDemandClearCallback,
+ IxAtmdAccTxSchVcIdGetCallback vcIdGetCallback);
+
+/**
+ *
+ * @ingroup IxAtmdAccCtrlAPI
+ *
+ * @fn ixAtmdAccPortTxProcess (IxAtmLogicalPort port,
+ IxAtmScheduleTable* scheduleTablePtr)
+ *
+ * @brief Transmit queue cells to the H/W based on the supplied schedule
+ * table.
+ *
+ * This function @a ixAtmdAccPortTxProcess() process the schedule
+ * table provided as a parameter to the function. As a result cells are
+ * sent to the underlaying hardware for transmission.
+ *
+ * The schedule table is executed in its entirety or not at all. So the
+ * onus is on the caller not to submit a table containing more cells than
+ * can be transmitted at that point. The maximum numbers that can be
+ * transmitted is guaranteed to be the number of cells as returned by the
+ * function @a ixAtmdAccPortTxFreeEntriesQuery().
+ *
+ * When the scheduler is invoked on a threshold level, IxAtmdAcc gives the
+ * minimum number of cells (to ensure the callback will fire again later)
+ * and the maximum number of cells that @a ixAtmdAccPortTxProcess()
+ * will be able to process (assuming the ATM scheduler is able
+ * to produce the worst-case schedule table, i.e. one entry per cell).
+ *
+ * When invoked ouside a threshold level, the overall number of cells of
+ * the schedule table should be less than the number of cells returned
+ * by the @a ixAtmdAccPortTxFreeEntriesQuery() function.
+ *
+ * After invoking the @a ixAtmdAccPortTxProcess() function, it is the
+ * user choice to query again the queue level with the function
+ * @a ixAtmdAccPortTxFreeEntriesQuery() and, depending on a new cell
+ * number, submit an other schedule table.
+ *
+ * IxAtmdAcc will check that the number of cells in the schedule table
+ * is compatible with the current transmit level. If the
+ *
+ * Obsolete or invalid connection Id will be silently discarded.
+ *
+ * This function is not reentrant for the same port.
+ *
+ * This functions doesn't use system resources and can be used inside an
+ * interrupt context.
+ *
+ * This function is used as a response to the hardware requesting more
+ * cells to transmit.
+ *
+ * @sa ixAtmdAccPortTxScheduledModeEnable
+ * @sa ixAtmdAccPortTxFreeEntriesQuery
+ * @sa ixAtmdAccPortTxCallbackRegister
+ * @sa ixAtmdAccPortEnable
+ *
+ * @param port @ref IxAtmLogicalPort [in] - logical PHY port [@a IX_UTOPIA_PORT_0 .. @a IX_UTOPIA_MAX_PORTS - 1]
+ * @param scheduleTablePtr @ref IxAtmScheduleTable* [in] - pointer to a scheduler update table. The
+ * content of this table is not modified by this function. This
+ * parameter cannot be a null pointer.
+ *
+ * @return @li IX_SUCCESS the schedule table process is complete
+ * and cells are transmitted to the hardware
+ * @return @li IX_ATMDACC_WARNING : Traffic will be dropped: the schedule table exceed
+ * the hardware capacity If this error is ignored, further traffic
+ * and schedule will work correctly.
+ * Overscheduling does not occur when the schedule table does
+ * not contain more entries that the number of free entries returned
+ * by @a ixAtmdAccPortTxFreeEntriesQuery().
+ * However, Disconnect attempts just after this error will fail permanently
+ * with the error code @a IX_ATMDACC_RESOURCES_STILL_ALLOCATED, and it is
+ * necessary to disable the port to make @a ixAtmdAccTxVcTryDisconnect()
+ * successful.
+ * @return @li IX_FAIL a wrong parameter is supplied, or the format of
+ * the schedule table is invalid, or the port is not Enabled, or
+ * an internal severe error occured. No cells is transmitted to the hardware
+ *
+ * @note - If the failure is linked to an overschedule of data cells
+ * the result is an inconsistency in the output traffic (one or many
+ * cells may be missing and the traffic contract is not respected).
+ *
+ */
+PUBLIC IX_STATUS ixAtmdAccPortTxProcess (IxAtmLogicalPort port,
+ IxAtmScheduleTable* scheduleTablePtr);
+
+/**
+ *
+ * @ingroup IxAtmdAccCtrlAPI
+ *
+ * @fn ixAtmdAccTxDoneDispatch (unsigned int numberOfPdusToProcess,
+ unsigned int *numberOfPdusProcessedPtr)
+ *
+ * @brief Process a number of pending transmit done pdus from the hardware.
+ *
+ * As a by-product of Atm transmit operation buffers which transmission
+ * is complete need to be recycled to users. This function is invoked
+ * to service the oustanding list of transmitted buffers and pass them
+ * to VC users.
+ *
+ * Users are handed back pdus by invoking the free callback registered
+ * during the @a ixAtmdAccTxVcConnect() call.
+ *
+ * There is a single Tx done stream servicing all active Atm Tx ports
+ * which can contain a maximum of 64 entries. If this stream fills port
+ * transmission will stop so this function must be call sufficently
+ * frequently to ensure no disruption to the transmit operation.
+ *
+ * This function can be used from a timer context, or can be associated
+ * with a TxDone level threshold event (see @a ixAtmdAccTxDoneDispatcherRegister() ),
+ * or can be used inside an active polling mechanism under user control.
+ *
+ * For ease of use the signature of this function is compatible with the
+ * TxDone threshold event callback prototype.
+ *
+ * This functions can be used inside an interrupt context.
+ *
+ * @sa ixAtmdAccTxDoneDispatcherRegister
+ * @sa IxAtmdAccTxVcBufferReturnCallback
+ * @sa ixAtmdAccTxDoneLevelQuery
+ *
+ * @param numberOfPdusToProcess unsigned int [in] - maxiumum number of pdus to remove
+ * from the TX Done queue
+ * @param *numberOfPdusProcessedPtr unsigned int [out] - number of pdus removed from
+ * the TX Done queue. This parameter cannot be a null pointer.
+ *
+ * @return @li IX_SUCCESS the number of pdus as indicated in
+ * numberOfPdusToProcess are removed from the TX Done hardware
+ * and passed to the user through the Tx Done callback registered
+ * during a call to @a ixAtmdAccTxVcConnect()
+ * @return @li IX_FAIL invalid parameters or numberOfPdusProcessedPtr is
+ * a null pointer or some unspecified internal error occured.
+ *
+ */
+PUBLIC IX_STATUS
+ixAtmdAccTxDoneDispatch (unsigned int numberOfPdusToProcess,
+ unsigned int *numberOfPdusProcessedPtr);
+
+/**
+ *
+ * @ingroup IxAtmdAccCtrlAPI
+ *
+ * @fn ixAtmdAccTxDoneLevelQuery (unsigned int *numberOfPdusPtr)
+ *
+ * @brief Query the current number of transmit pdus ready for
+ * recycling.
+ *
+ * This function is used to get the number of transmitted pdus which
+ * the hardware is ready to hand back to user.
+ *
+ * This function can be used from a timer context, or can be associated
+ * with a threshold event, on can be used inside an active polling
+ * mechanism
+ *
+ * @sa ixAtmdAccTxDoneDispatch
+ *
+ * @param *numberOfPdusPtr unsigned int [out] - Pointer to the number of pdus transmitted
+ * at the time of this function call, and ready for recycling
+ * This parameter cannot be a null pointer.
+ *
+ * @return @li IX_SUCCESS numberOfPdusPtr contains the number of pdus
+ * ready for recycling at the time of this function call
+ *
+ * @return @li IX_FAIL wrong parameter (null pointer as parameter).or
+ * unspecified rocessing error occurs..The value in numberOfPdusPtr
+ * is unspecified.
+ *
+ */
+PUBLIC IX_STATUS
+ixAtmdAccTxDoneLevelQuery (unsigned int *numberOfPdusPtr);
+
+/**
+ *
+ * @ingroup IxAtmdAccCtrlAPI
+ *
+ * @fn ixAtmdAccTxDoneQueueSizeQuery (unsigned int *numberOfPdusPtr)
+ *
+ * @brief Query the TxDone queue size.
+ *
+ * This function is used to get the number of pdus which
+ * the hardware is able to store after transmission is complete
+ *
+ * The returned value can be used to set a threshold and enable
+ * a callback to be notified when the number of pdus is going over
+ * the threshold.
+ *
+ * @sa ixAtmdAccTxDoneDispatcherRegister
+ *
+ * @param *numberOfPdusPtr unsigned int [out] - Pointer to the number of pdus the system
+ * is able to queue after transmission
+ *
+ * @return @li IX_SUCCESS numberOfPdusPtr contains the the number of
+ * pdus the system is able to queue after transmission
+ * @return @li IX_FAIL wrong parameter (null pointer as parameter).or
+ * unspecified rocessing error occurs..The value in numberOfPdusPtr
+ * is unspecified.
+ *
+ * @note - This function is reentrant, doesn't use system resources
+ * and can be used from an interrupt context.
+ */
+PUBLIC IX_STATUS
+ixAtmdAccTxDoneQueueSizeQuery (unsigned int *numberOfPdusPtr);
+
+/**
+ *
+ * @ingroup IxAtmdAccCtrlAPI
+ *
+ * @fn ixAtmdAccTxDoneDispatcherRegister (unsigned int numberOfPdus,
+ IxAtmdAccTxDoneDispatcher notificationCallback)
+ *
+ * @brief Configure the Tx Done stream threshold value and register a
+ * callback to handle threshold notifications.
+ *
+ * This function sets the threshold level in term of number of pdus at
+ * which the supplied notification function should be called.
+ *
+ * The higher the threshold value is, the less events will be necessary
+ * to process transmitted buffers.
+ *
+ * Transmitted buffers recycling implementation is a sytem-wide mechanism
+ * and needs to be set prior any traffic is started. If this threshold
+ * mechanism is not used, the user is responsible for polling the
+ * transmitted buffers thanks to @a ixAtmdAccTxDoneDispatch() and
+ * @a ixAtmdAccTxDoneLevelQuery() functions.
+ *
+ * This function should be called during system initialisation outside
+ * an interrupt context
+ *
+ * @sa ixAtmdAccTxDoneDispatcherRegister
+ * @sa ixAtmdAccTxDoneDispatch
+ * @sa ixAtmdAccTxDoneLevelQuery
+ *
+ * @param numberOfPdus unsigned int [in] - The number of TxDone pdus which triggers the
+ * callback invocation This number has to be a power of 2, one of the
+ * values 0,1,2,4,8,16,32 ...
+ * The maximum value cannot be more than half of the txDone queue
+ * size (which can be retrieved using @a ixAtmdAccTxDoneQueueSizeQuery())
+ * @param notificationCallback @ref IxAtmdAccTxDoneDispatcher [in] - The function to invoke. (This
+ * parameter can be @a ixAtmdAccTxDoneDispatch()).This
+ * parameter ust not be a null pointer.
+ *
+ * @return @li IX_SUCCESS Successful call to ixAtmdAccTxDoneDispatcherRegister
+ * @return @li IX_FAIL error in the parameters:
+ *
+ * @note - The notificationCallback will be called exactly when the threshold level
+ * will increase from (numberOfPdus) to (numberOfPdus+1)
+ *
+ * @note - If there is no Tx traffic, there is no guarantee that TxDone Pdus will
+ * be released to the user (when txDone level is permanently under the threshold
+ * level. One of the preffered way to return resources to the user is to use
+ * a mix of txDone notifications, used together with a slow
+ * rate timer and an exclusion mechanism protecting from re-entrancy
+ *
+ * @note - The TxDone threshold will only hand back buffers when the threshold level is
+ * crossed. Setting this threshold to a great number reduce the interrupt rate
+ * and the cpu load, but also increase the number of outstanding mbufs and has
+ * a system wide impact when these mbufs are needed by other components.
+ *
+ */
+PUBLIC IX_STATUS ixAtmdAccTxDoneDispatcherRegister (unsigned int numberOfPdus,
+ IxAtmdAccTxDoneDispatcher notificationCallback);
+
+/* ------------------------------------------------------
+ Part of the IxAtmdAcc interface related to Utopia config
+ ------------------------------------------------------ */
+
+/**
+ *
+ * @ingroup IxAtmdAccCtrlAPI
+ *
+ * @defgroup IxAtmdAccUtopiaCtrlAPI IXP400 ATM Driver Access (IxAtmdAcc) Utopia Control API
+ *
+ * @brief The public API for the IXP400 Atm Driver Control component
+ *
+ * IxAtmdAcc is the low level interface by which AAL PDU get
+ * transmitted to,and received from the Utopia bus
+ *
+ * This part is related to the UTOPIA configuration.
+ *
+ * @{
+ */
+
+/**
+ *
+ * @brief Utopia configuration
+ *
+ * This structure is used to set the Utopia parameters
+ * @li contains the values of Utopia registers, to be set during initialisation
+ * @li contains debug commands for NPE, to be used during development steps
+ *
+ * @note - the exact description of all parameters is done in the Utopia reference
+ * documents.
+ *
+ */
+typedef struct
+{
+ /**
+ * @ingroup IxAtmdAccUtopiaCtrlAPI
+ * @struct UtTxConfig_
+ * @brief Utopia Tx Config Register
+ */
+ struct UtTxConfig_
+ {
+
+ unsigned int reserved_1:1; /**< [31] These bits are always 0.*/
+ unsigned int txInterface:1; /**< [30] Utopia Transmit Interface. The following encoding
+ * is used to set the Utopia Transmit interface as ATM master
+ * or PHY slave:
+ * @li 1 - PHY
+ * @li 0 - ATM
+ */
+ unsigned int txMode:1; /**< [29] Utopia Transmit Mode. The following encoding is used
+ * to set the Utopia Transmit mode to SPHY or MPHY:
+ * @li 1 - SPHY
+ * @li 0 - MPHY
+ */
+ unsigned int txOctet:1; /**< [28] Utopia Transmit cell transfer protocol. Used to set
+ * the Utopia cell transfer protocol to Octet-level handshaking.
+ * Note this is only applicable in SPHY mode.
+ * @li 1 - Octet-handshaking enabled
+ * @li 0 - Cell-handshaking enabled
+ */
+ unsigned int txParity:1; /**< [27] Utopia Transmit parity enabled when set. TxEvenParity
+ * defines the parity format odd/even.
+ * @li 1 - Enable Parity generation.
+ * @li 0 - ut_op_prty held low.
+ */
+ unsigned int txEvenParity:1; /**< [26] Utopia Transmit Parity Mode
+ * @li 1 - Even Parity Generated.
+ * @li 0 - Odd Parity Generated.
+ */
+ unsigned int txHEC:1; /**< [25] Header Error Check Insertion Mode. Specifies if the transmit
+ * cell header check byte is calculated and inserted when set.
+ * @li 1 - Generate HEC.
+ * @li 0 - Disable HEC generation.
+ */
+ unsigned int txCOSET:1; /**< [24] If enabled the HEC is Exclusive-ORÆed with the value 0x55 before
+ * being presented on the Utopia bus.
+ * @li 1 - Enable HEC ExOR with value 0x55
+ * @li 0 - Use generated HEC value.
+ */
+
+ unsigned int reserved_2:1; /**< [23] These bits are always 0
+ */
+ unsigned int txCellSize:7; /**< [22:16] Transmit expected cell size. Configures the cell size
+ * for the transmit module: Values between 52-64 are valid.
+ */
+ unsigned int reserved_3:3; /**< [15:13] These bits are always 0 */
+ unsigned int txAddrRange:5; /**< [12:8] When configured as an ATM master in MPHY mode this
+ * register specifies the upper limit of the PHY polling logical
+ * range. The number of active PHYs are TxAddrRange + 1.
+ */
+ unsigned int reserved_4:3; /**< [7:5] These bits are always 0 */
+ unsigned int txPHYAddr:5; /**< [4:0] When configured as a slave in an MPHY system this register
+ * specifies the physical address of the PHY.
+ */
+ }
+
+ utTxConfig; /**< Tx config Utopia register */
+
+ /**
+ * @ingroup IxAtmdAccUtopiaCtrlAPI
+ * @struct UtTxStatsConfig_
+ * @brief Utopia Tx stats Register
+ */
+ struct UtTxStatsConfig_
+ {
+
+ unsigned int vpi:12; /**< [31:20] ATM VPI [11:0] OR GFC [3:0] and VPI [7:0]
+ @li Note: if VCStatsTxGFC is set to 0 the GFC field is ignored in test. */
+
+ unsigned int vci:16; /**< [19:4] ATM VCI [15:0] or PHY Address[4] */
+
+ unsigned int pti:3; /**< [3:1] ATM PTI [2:0] or PHY Address[3:1]
+ @li Note: if VCStatsTxPTI is set to 0 the PTI field is ignored in test.
+ @li Note: if VCStatsTxEnb is set to 0 only the transmit PHY port
+ address as defined by this register is used for ATM statistics [4:0]. */
+
+ unsigned int clp:1; /**< [0] ATM CLP or PHY Address [0]
+ @li Note: if VCStatsTxCLP is set to 0 the CLP field is ignored in test.
+ @li Note: if VCStatsTxEnb is set to 0 only the transmit PHY port
+ address as defined by this register is used for ATM statistics [4:0]. */
+ }
+
+ utTxStatsConfig; /**< Tx stats config Utopia register */
+
+ /**
+ * @ingroup IxAtmdAccUtopiaCtrlAPI
+ * @struct UtTxDefineIdle_
+ * @brief Utopia Tx idle cells Register
+ */
+ struct UtTxDefineIdle_
+ {
+
+ unsigned int vpi:12; /**< [31:20] ATM VPI [11:0] OR GFC [3:0] and VPI [7:0]
+ @li Note: if VCIdleTxGFC is set to 0 the GFC field is ignored in test. */
+
+ unsigned int vci:16; /**< [19:4] ATM VCI [15:0] */
+
+ unsigned int pti:3; /**< [3:1] ATM PTI PTI [2:0]
+ @li Note: if VCIdleTxPTI is set to 0 the PTI field is ignored in test.*/
+
+ unsigned int clp:1; /**< [0] ATM CLP [0]
+ @li Note: if VCIdleTxCLP is set to 0 the CLP field is ignored in test.*/
+ }
+
+ utTxDefineIdle; /**< Tx idle cell config Utopia register */
+
+ /**
+ * @ingroup IxAtmdAccUtopiaCtrlAPI
+ * @struct UtTxEnableFields_
+ * @brief Utopia Tx ienable fields Register
+ */
+ struct UtTxEnableFields_
+ {
+
+ unsigned int defineTxIdleGFC:1; /**< [31] This register is used to include or exclude the GFC
+ field of the ATM header when testing for Idle cells.
+ @li 1 - GFC field is valid.
+ @li 0 - GFC field ignored.*/
+
+ unsigned int defineTxIdlePTI:1; /**< [30] This register is used to include or exclude the PTI
+ field of the ATM header when testing for Idle cells.
+ @li 1 - PTI field is valid
+ @li 0 - PTI field ignored.*/
+
+ unsigned int defineTxIdleCLP:1; /**< [29] This register is used to include or
+ exclude the CLP field of the ATM header when testing for Idle cells.
+ @li 1 - CLP field is valid.
+ @li 0 - CLP field ignored. */
+
+ unsigned int phyStatsTxEnb:1; /**< [28] This register is used to enable or disable ATM
+ statistics gathering based on the specified PHY address as defined
+ in TxStatsConfig register.
+ @li 1 - Enable statistics for specified transmit PHY address.
+ @li 0 - Disable statistics for specified transmit PHY address. */
+
+ unsigned int vcStatsTxEnb:1; /**< [27] This register is used to change the ATM
+ statistics-gathering mode from the specified logical PHY address
+ to a specific VPI/VCI address.
+ @li 1 - Enable statistics for specified VPI/VCI address.
+ @li 0 - Disable statistics for specified VPI/VCI address */
+
+ unsigned int vcStatsTxGFC:1; /**< [26] This register is used to include or exclude the GFC
+ field of the ATM header when ATM VPI/VCI statistics are enabled.
+ GFC is only available at the UNI and uses the first 4-bits of
+ the VPI field.
+ @li 1 - GFC field is valid
+ @li 0 - GFC field ignored.*/
+
+ unsigned int vcStatsTxPTI:1; /**< [25] This register is used to include or exclude the PTI
+ field of the ATM header when ATM VPI/VCI statistics are enabled.
+ @li 1 - PTI field is valid
+ @li 0 - PTI field ignored.*/
+
+ unsigned int vcStatsTxCLP:1; /**< [24] This register is used to include or exclude the CLP
+ field of the ATM header when ATM VPI/VCI statistics are enabled.
+ @li 1 - CLP field is valid
+ @li 0 - CLP field ignored. */
+
+ unsigned int reserved_1:3; /**< [23-21] These bits are always 0 */
+
+ unsigned int txPollStsInt:1; /**< [20] Enable the assertion of the ucp_tx_poll_sts condition
+ where there is a change in polling status.
+ @li 1 - ucp_tx_poll_sts asserted whenever there is a change in status
+ @li 0 - ucp_tx_poll_sts asserted if ANY transmit PHY is available
+ */
+ unsigned int txCellOvrInt:1; /**< [19] Enable TxCellCount overflow CBI Transmit Status condition
+ assertion.
+ @li 1 - If TxCellCountOvr is set assert the Transmit Status Condition.
+ @li 0 - No CBI Transmit Status condition assertion */
+
+ unsigned int txIdleCellOvrInt:1; /**< [18] Enable TxIdleCellCount overflow Transmit Status Condition
+ @li 1 - If TxIdleCellCountOvr is set assert the Transmit Status Condition
+ @li 0 - No CBI Transmit Status condition assertion..*/
+
+ unsigned int enbIdleCellCnt:1; /**< [17] Enable Transmit Idle Cell Count.
+ @li 1 - Enable count of Idle cells transmitted.
+ @li 0 - No count is maintained. */
+
+ unsigned int enbTxCellCnt:1; /**< [16] Enable Transmit Valid Cell Count of non-idle/non-error cells
+ @li 1 - Enable count of valid cells transmitted- non-idle/non-error
+ @li 0 - No count is maintained.*/
+
+ unsigned int reserved_2:16; /**< [15:0] These bits are always 0 */
+ } utTxEnableFields; /**< Tx enable Utopia register */
+
+ /**
+ * @ingroup IxAtmdAccUtopiaCtrlAPI
+ * @struct UtTxTransTable0_
+ * @brief Utopia Tx translation table Register
+ */
+ struct UtTxTransTable0_
+ {
+
+ unsigned int phy0:5; /**< [31-27] Tx Mapping value of logical phy 0 */
+
+ unsigned int phy1:5; /**< [26-22] Tx Mapping value of logical phy 1 */
+
+ unsigned int phy2:5; /**< [21-17] Tx Mapping value of logical phy 2 */
+
+ unsigned int reserved_1:1; /**< [16] These bits are always 0.*/
+
+ unsigned int phy3:5; /**< [15-11] Tx Mapping value of logical phy 3 */
+
+ unsigned int phy4:5; /**< [10-6] Tx Mapping value of logical phy 4 */
+
+ unsigned int phy5:5; /**< [5-1] Tx Mapping value of logical phy 5 */
+
+ unsigned int reserved_2:1; /**< [0] These bits are always 0 */
+ } utTxTransTable0; /**< Tx translation table */
+
+ /**
+ * @ingroup IxAtmdAccUtopiaCtrlAPI
+ * @struct UtTxTransTable1_
+ * @brief Utopia Tx translation table Register
+ */
+ struct UtTxTransTable1_
+ {
+
+ unsigned int phy6:5; /**< [31-27] Tx Mapping value of logical phy 6 */
+
+ unsigned int phy7:5; /**< [26-22] Tx Mapping value of logical phy 7 */
+
+ unsigned int phy8:5; /**< [21-17] Tx Mapping value of logical phy 8 */
+
+ unsigned int reserved_1:1; /**< [16-0] These bits are always 0 */
+
+ unsigned int phy9:5; /**< [15-11] Tx Mapping value of logical phy 3 */
+
+ unsigned int phy10:5; /**< [10-6] Tx Mapping value of logical phy 4 */
+
+ unsigned int phy11:5; /**< [5-1] Tx Mapping value of logical phy 5 */
+
+ unsigned int reserved_2:1; /**< [0] These bits are always 0 */
+ } utTxTransTable1; /**< Tx translation table */
+
+ /**
+ * @ingroup IxAtmdAccUtopiaCtrlAPI
+ * @struct UtTxTransTable2_
+ * @brief Utopia Tx translation table Register
+ */
+ struct UtTxTransTable2_
+ {
+
+ unsigned int phy12:5; /**< [31-27] Tx Mapping value of logical phy 6 */
+
+ unsigned int phy13:5; /**< [26-22] Tx Mapping value of logical phy 7 */
+
+ unsigned int phy14:5; /**< [21-17] Tx Mapping value of logical phy 8 */
+
+ unsigned int reserved_1:1; /**< [16-0] These bits are always 0 */
+
+ unsigned int phy15:5; /**< [15-11] Tx Mapping value of logical phy 3 */
+
+ unsigned int phy16:5; /**< [10-6] Tx Mapping value of logical phy 4 */
+
+ unsigned int phy17:5; /**< [5-1] Tx Mapping value of logical phy 5 */
+
+ unsigned int reserved_2:1; /**< [0] These bits are always 0 */
+ } utTxTransTable2; /**< Tx translation table */
+
+ /**
+ * @ingroup IxAtmdAccUtopiaCtrlAPI
+ * @struct UtTxTransTable3_
+ * @brief Utopia Tx translation table Register
+ */
+ struct UtTxTransTable3_
+ {
+
+ unsigned int phy18:5; /**< [31-27] Tx Mapping value of logical phy 6 */
+
+ unsigned int phy19:5; /**< [26-22] Tx Mapping value of logical phy 7 */
+
+ unsigned int phy20:5; /**< [21-17] Tx Mapping value of logical phy 8 */
+
+ unsigned int reserved_1:1; /**< [16-0] These bits are always 0 */
+
+ unsigned int phy21:5; /**< [15-11] Tx Mapping value of logical phy 3 */
+
+ unsigned int phy22:5; /**< [10-6] Tx Mapping value of logical phy 4 */
+
+ unsigned int phy23:5; /**< [5-1] Tx Mapping value of logical phy 5 */
+
+ unsigned int reserved_2:1; /**< [0] These bits are always 0 */
+ } utTxTransTable3; /**< Tx translation table */
+
+ /**
+ * @ingroup IxAtmdAccUtopiaCtrlAPI
+ * @struct UtTxTransTable4_
+ * @brief Utopia Tx translation table Register
+ */
+ struct UtTxTransTable4_
+ {
+
+ unsigned int phy24:5; /**< [31-27] Tx Mapping value of logical phy 6 */
+
+ unsigned int phy25:5; /**< [26-22] Tx Mapping value of logical phy 7 */
+
+ unsigned int phy26:5; /**< [21-17] Tx Mapping value of logical phy 8 */
+
+ unsigned int reserved_1:1; /**< [16-0] These bits are always 0 */
+
+ unsigned int phy27:5; /**< [15-11] Tx Mapping value of logical phy 3 */
+
+ unsigned int phy28:5; /**< [10-6] Tx Mapping value of logical phy 4 */
+
+ unsigned int phy29:5; /**< [5-1] Tx Mapping value of logical phy 5 */
+
+ unsigned int reserved_2:1; /**< [0] These bits are always 0 */
+ } utTxTransTable4; /**< Tx translation table */
+
+ /**
+ * @ingroup IxAtmdAccUtopiaCtrlAPI
+ * @struct UtTxTransTable5_
+ * @brief Utopia Tx translation table Register
+ */
+ struct UtTxTransTable5_
+ {
+
+ unsigned int phy30:5; /**< [31-27] Tx Mapping value of logical phy 6 */
+
+ unsigned int reserved_1:27; /**< [26-0] These bits are always 0 */
+
+ } utTxTransTable5; /**< Tx translation table */
+
+ /**
+ * @ingroup IxAtmdAccUtopiaCtrlAPI
+ * @struct UtRxConfig_
+ * @brief Utopia Rx config Register
+ */
+ struct UtRxConfig_
+ {
+
+ unsigned int rxInterface:1; /**< [31] Utopia Receive Interface. The following encoding is used
+ to set the Utopia Receive interface as ATM master or PHY slave:
+ @li 1 - PHY
+ @li 0 - ATM */
+
+ unsigned int rxMode:1; /**< [30] Utopia Receive Mode. The following encoding is used to set
+ the Utopia Receive mode to SPHY or MPHY:
+ @li 1 - SPHY
+ @li 0 - MPHY */
+
+ unsigned int rxOctet:1; /**< [29] Utopia Receive cell transfer protocol. Used to set the Utopia
+ cell transfer protocol to Octet-level handshaking. Note this is only
+ applicable in SPHY mode.
+ @li 1 - Octet-handshaking enabled
+ @li 0 - Cell-handshaking enabled */
+
+ unsigned int rxParity:1; /**< [28] Utopia Receive Parity Checking enable.
+ @li 1 - Parity checking enabled
+ @li 0 - Parity checking disabled */
+
+ unsigned int rxEvenParity:1;/**< [27] Utopia Receive Parity Mode
+ @li 1 - Check for Even Parity
+ @li 0 - Check for Odd Parity.*/
+
+ unsigned int rxHEC:1; /**< [26] RxHEC Header Error Check Mode. Enables/disables cell header
+ error checking on the received cell header.
+ @li 1 - HEC checking enabled
+ @li 0 - HEC checking disabled */
+
+ unsigned int rxCOSET:1; /**< [25] If enabled the HEC is Exclusive-ORÆed with the value 0x55
+ before being tested with the received HEC.
+ @li 1 - Enable HEC ExOR with value 0x55.
+ @li 0 - Use generated HEC value.*/
+
+ unsigned int rxHECpass:1; /**< [24] Specifies if the incoming cell HEC byte should be transferred
+ after optional processing to the NPE2 Coprocessor Bus Interface or
+ if it should be discarded.
+ @li 1 - HEC maintained 53-byte/UDC cell sent to NPE2.
+ @li 0 - HEC discarded 52-byte/UDC cell sent to NPE2 coprocessor.*/
+
+ unsigned int reserved_1:1; /**< [23] These bits are always 0 */
+
+ unsigned int rxCellSize:7; /**< [22:16] Receive cell size. Configures the receive cell size.
+ Values between 52-64 are valid */
+
+ unsigned int rxHashEnbGFC:1; /**< [15] Specifies if the VPI field [11:8]/GFC field should be
+ included in the Hash data input or if the bits should be padded
+ with 1Æb0.
+ @li 1 - VPI [11:8]/GFC field valid and used in Hash residue calculation.
+ @li 0 - VPI [11:8]/GFC field padded with 1Æb0 */
+
+ unsigned int rxPreHash:1; /**< [14] Enable Pre-hash value generation. Specifies if the
+ incoming cell data should be pre-hashed to allow VPI/VCI header look-up
+ in a hash table.
+ @li 1 - Pre-hashing enabled
+ @li 0 - Pre-hashing disabled */
+
+ unsigned int reserved_2:1; /**< [13] These bits are always 0 */
+
+ unsigned int rxAddrRange:5; /**< [12:8] In ATM master, MPHY mode,
+ * this register specifies the upper
+ * limit of the PHY polling logical range. The number of active PHYs are
+ * RxAddrRange + 1.
+ */
+ unsigned int reserved_3:3; /**< [7-5] These bits are always 0 .*/
+ unsigned int rxPHYAddr:5; /**< [4:0] When configured as a slave in an MPHY system this register
+ * specifies the physical address of the PHY.
+ */
+ } utRxConfig; /**< Rx config Utopia register */
+
+ /**
+ * @ingroup IxAtmdAccUtopiaCtrlAPI
+ * @struct UtRxStatsConfig_
+ * @brief Utopia Rx stats config Register
+ */
+ struct UtRxStatsConfig_
+ {
+
+ unsigned int vpi:12; /**< [31:20] ATM VPI VPI [11:0] OR GFC [3:0] and VPI [7:0]
+ @li Note: if VCStatsRxGFC is set to 0 the GFC field is ignored in test. */
+
+ unsigned int vci:16; /**< [19:4] VCI [15:0] or PHY Address [4] */
+
+ unsigned int pti:3; /**< [3:1] PTI [2:0] or or PHY Address [3:1]
+ @li Note: if VCStatsRxPTI is set to 0 the PTI field is ignored in test.
+ @li Note: if VCStatsRxEnb is set to 0 only the PHY port address is used
+ for statistics gathering.. */
+
+ unsigned int clp:1; /**< [0] CLP [0] or PHY Address [0]
+ @li Note: if VCStatsRxCLP is set to 0 the CLP field is ignored in test.
+ @li Note: if VCStatsRxEnb is set to 0 only the PHY port address is used
+ for statistics gathering.. */
+ } utRxStatsConfig; /**< Rx stats config Utopia register */
+
+ /**
+ * @ingroup IxAtmdAccUtopiaCtrlAPI
+ * @struct UtRxDefineIdle_
+ * @brief Utopia Rx idle cells config Register
+ */
+ struct UtRxDefineIdle_
+ {
+
+ unsigned int vpi:12; /**< [31:20] ATM VPI [11:0] OR GFC [3:0] and VPI [7:0]
+ @li Note: if VCIdleRxGFC is set to 0 the GFC field is ignored in test. */
+
+ unsigned int vci:16; /**< [19:4] ATM VCI [15:0] */
+
+ unsigned int pti:3; /**< [3:1] ATM PTI PTI [2:0]
+ @li Note: if VCIdleRxPTI is set to 0 the PTI field is ignored in test.*/
+
+ unsigned int clp:1; /**< [0] ATM CLP [0]
+ @li Note: if VCIdleRxCLP is set to 0 the CLP field is ignored in test.*/
+ } utRxDefineIdle; /**< Rx idle cell config Utopia register */
+
+ /**
+ * @ingroup IxAtmdAccUtopiaCtrlAPI
+ * @struct UtRxEnableFields_
+ * @brief Utopia Rx enable Register
+ */
+ struct UtRxEnableFields_
+ {
+
+ unsigned int defineRxIdleGFC:1;/**< [31] This register is used to include or exclude the GFC
+ field of the ATM header when testing for Idle cells.
+ @li 1 - GFC field is valid.
+ @li 0 - GFC field ignored.*/
+
+ unsigned int defineRxIdlePTI:1;/**< [30] This register is used to include or exclude the PTI
+ field of the ATM header when testing for Idle cells.
+ @li 1 - PTI field is valid.
+ @li 0 - PTI field ignored.*/
+
+ unsigned int defineRxIdleCLP:1;/**< [29] This register is used to include or exclude the CLP
+ field of the ATM header when testing for Idle cells.
+ @li 1 - CLP field is valid.
+ @li 0 - CLP field ignored.*/
+
+ unsigned int phyStatsRxEnb:1;/**< [28] This register is used to enable or disable ATM statistics
+ gathering based on the specified PHY address as defined in RxStatsConfig
+ register.
+ @li 1 - Enable statistics for specified receive PHY address.
+ @li 0 - Disable statistics for specified receive PHY address.*/
+
+ unsigned int vcStatsRxEnb:1;/**< [27] This register is used to enable or disable ATM statistics
+ gathering based on a specific VPI/VCI address.
+ @li 1 - Enable statistics for specified VPI/VCI address.
+ @li 0 - Disable statistics for specified VPI/VCI address.*/
+
+ unsigned int vcStatsRxGFC:1;/**< [26] This register is used to include or exclude the GFC field
+ of the ATM header when ATM VPI/VCI statistics are enabled. GFC is only
+ available at the UNI and uses the first 4-bits of the VPI field.
+ @li 1 - GFC field is valid.
+ @li 0 - GFC field ignored. */
+
+ unsigned int vcStatsRxPTI:1;/**< [25] This register is used to include or exclude the PTI field
+ of the ATM header when ATM VPI/VCI statistics are enabled.
+ @li 1 - PTI field is valid.
+ @li 0 - PTI field ignored.*/
+
+ unsigned int vcStatsRxCLP:1;/**< [24] This register is used to include or exclude the CLP field
+ of the ATM header when ATM VPI/VCI statistics are enabled.
+ @li 1 - CLP field is valid.
+ @li 0 - CLP field ignored. */
+
+ unsigned int discardHecErr:1;/**< [23] Discard cells with an invalid HEC.
+ @li 1 - Discard cells with HEC errors
+ @li 0 - Cells with HEC errors are passed */
+
+ unsigned int discardParErr:1;/**< [22] Discard cells containing parity errors.
+ @li 1 - Discard cells with parity errors
+ @li 0 - Cells with parity errors are passed */
+
+ unsigned int discardIdle:1; /**< [21] Discard Idle Cells based on DefineIdle register values
+ @li 1 - Discard IDLE cells
+ @li 0 - IDLE cells passed */
+
+ unsigned int enbHecErrCnt:1;/**< [20] Enable Receive HEC Error Count.
+ @li 1 - Enable count of received cells containing HEC errors
+ @li 0 - No count is maintained. */
+
+ unsigned int enbParErrCnt:1;/**< [19] Enable Parity Error Count
+ @li 1 - Enable count of received cells containing Parity errors
+ @li 0 - No count is maintained. */
+
+ unsigned int enbIdleCellCnt:1;/**< [18] Enable Receive Idle Cell Count.
+ @li 1 - Enable count of Idle cells received.
+ @li 0 - No count is maintained.*/
+
+ unsigned int enbSizeErrCnt:1;/**< [17] Enable Receive Size Error Count.
+ @li 1 - Enable count of received cells of incorrect size
+ @li 0 - No count is maintained. */
+
+ unsigned int enbRxCellCnt:1;/**< [16] Enable Receive Valid Cell Count of non-idle/non-error cells.
+ @li 1 - Enable count of valid cells received - non-idle/non-error
+ @li 0 - No count is maintained. */
+
+ unsigned int reserved_1:3; /**< [15:13] These bits are always 0 */
+
+ unsigned int rxCellOvrInt:1; /**< [12] Enable CBI Utopia Receive Status Condition if the RxCellCount
+ register overflows.
+ @li 1 - CBI Receive Status asserted.
+ @li 0 - No CBI Receive Status asserted.*/
+
+ unsigned int invalidHecOvrInt:1; /**< [11] Enable CBI Receive Status Condition if the InvalidHecCount
+ register overflows.
+ @li 1 - CBI Receive Condition asserted.
+ @li 0 - No CBI Receive Condition asserted */
+
+ unsigned int invalidParOvrInt:1; /**< [10] Enable CBI Receive Status Condition if the InvalidParCount
+ register overflows
+ @li 1 - CBI Receive Condition asserted.
+ @li 0 - No CBI Receive Condition asserted */
+
+ unsigned int invalidSizeOvrInt:1; /**< [9] Enable CBI Receive Status Condition if the InvalidSizeCount
+ register overflows.
+ @li 1 - CBI Receive Status Condition asserted.
+ @li¸0 - No CBI Receive Status asserted */
+
+ unsigned int rxIdleOvrInt:1; /**< [8] Enable CBI Receive Status Condition if the RxIdleCount overflows.
+ @li 1 - CBI Receive Condition asserted.
+ @li 0 - No CBI Receive Condition asserted */
+
+ unsigned int reserved_2:3; /**< [7:5] These bits are always 0 */
+
+ unsigned int rxAddrMask:5; /**< [4:0] This register is used as a mask to allow the user to increase
+ the PHY receive address range. The register should be programmed with
+ the address-range limit, i.e. if set to 0x3 the address range increases
+ to a maximum of 4 addresses. */
+ } utRxEnableFields; /**< Rx enable Utopia register */
+
+ /**
+ * @ingroup IxAtmdAccUtopiaCtrlAPI
+ * @struct UtRxTransTable0_
+ * @brief Utopia Rx translation table Register
+ */
+ struct UtRxTransTable0_
+ {
+
+ unsigned int phy0:5; /**< [31-27] Rx Mapping value of logical phy 0 */
+
+ unsigned int phy1:5; /**< [26-22] Rx Mapping value of logical phy 1 */
+
+ unsigned int phy2:5; /**< [21-17] Rx Mapping value of logical phy 2 */
+
+ unsigned int reserved_1:1; /**< [16] These bits are always 0 */
+
+ unsigned int phy3:5; /**< [15-11] Rx Mapping value of logical phy 3 */
+
+ unsigned int phy4:5; /**< [10-6] Rx Mapping value of logical phy 4 */
+
+ unsigned int phy5:5; /**< [5-1] Rx Mapping value of logical phy 5 */
+
+ unsigned int reserved_2:1; /**< [0] These bits are always 0 */
+ }
+
+ utRxTransTable0; /**< Rx translation table */
+
+ /**
+ * @ingroup IxAtmdAccUtopiaCtrlAPI
+ * @struct UtRxTransTable1_
+ * @brief Utopia Rx translation table Register
+ */
+ struct UtRxTransTable1_
+ {
+
+ unsigned int phy6:5; /**< [31-27] Rx Mapping value of logical phy 6 */
+
+ unsigned int phy7:5; /**< [26-22] Rx Mapping value of logical phy 7 */
+
+ unsigned int phy8:5; /**< [21-17] Rx Mapping value of logical phy 8 */
+
+ unsigned int reserved_1:1; /**< [16-0] These bits are always 0 */
+
+ unsigned int phy9:5; /**< [15-11] Rx Mapping value of logical phy 3 */
+
+ unsigned int phy10:5; /**< [10-6] Rx Mapping value of logical phy 4 */
+
+ unsigned int phy11:5; /**< [5-1] Rx Mapping value of logical phy 5 */
+
+ unsigned int reserved_2:1; /**< [0] These bits are always 0 */
+ }
+
+ utRxTransTable1; /**< Rx translation table */
+
+ /**
+ * @ingroup IxAtmdAccUtopiaCtrlAPI
+ * @struct UtRxTransTable2_
+ * @brief Utopia Rx translation table Register
+ */
+ struct UtRxTransTable2_
+ {
+
+ unsigned int phy12:5; /**< [31-27] Rx Mapping value of logical phy 6 */
+
+ unsigned int phy13:5; /**< [26-22] Rx Mapping value of logical phy 7 */
+
+ unsigned int phy14:5; /**< [21-17] Rx Mapping value of logical phy 8 */
+
+ unsigned int reserved_1:1; /**< [16-0] These bits are always 0 */
+
+ unsigned int phy15:5; /**< [15-11] Rx Mapping value of logical phy 3 */
+
+ unsigned int phy16:5; /**< [10-6] Rx Mapping value of logical phy 4 */
+
+ unsigned int phy17:5; /**< [5-1] Rx Mapping value of logical phy 5 */
+
+ unsigned int reserved_2:1; /**< [0] These bits are always 0 */
+ } utRxTransTable2; /**< Rx translation table */
+
+ /**
+ * @ingroup IxAtmdAccUtopiaCtrlAPI
+ * @struct UtRxTransTable3_
+ * @brief Utopia Rx translation table Register
+ */
+ struct UtRxTransTable3_
+ {
+
+ unsigned int phy18:5; /**< [31-27] Rx Mapping value of logical phy 6 */
+
+ unsigned int phy19:5; /**< [26-22] Rx Mapping value of logical phy 7 */
+
+ unsigned int phy20:5; /**< [21-17] Rx Mapping value of logical phy 8 */
+
+ unsigned int reserved_1:1; /**< [16-0] These bits are always 0 */
+
+ unsigned int phy21:5; /**< [15-11] Rx Mapping value of logical phy 3 */
+
+ unsigned int phy22:5; /**< [10-6] Rx Mapping value of logical phy 4 */
+
+ unsigned int phy23:5; /**< [5-1] Rx Mapping value of logical phy 5 */
+
+ unsigned int reserved_2:1; /**< [0] These bits are always 0 */
+ } utRxTransTable3; /**< Rx translation table */
+
+ /**
+ * @ingroup IxAtmdAccUtopiaCtrlAPI
+ * @struct UtRxTransTable4_
+ * @brief Utopia Rx translation table Register
+ */
+ struct UtRxTransTable4_
+ {
+
+ unsigned int phy24:5; /**< [31-27] Rx Mapping value of logical phy 6 */
+
+ unsigned int phy25:5; /**< [26-22] Rx Mapping value of logical phy 7 */
+
+ unsigned int phy26:5; /**< [21-17] Rx Mapping value of logical phy 8 */
+
+ unsigned int reserved_1:1; /**< [16-0] These bits are always 0 */
+
+ unsigned int phy27:5; /**< [15-11] Rx Mapping value of logical phy 3 */
+
+ unsigned int phy28:5; /**< [10-6] Rx Mapping value of logical phy 4 */
+
+ unsigned int phy29:5; /**< [5-1] Rx Mapping value of logical phy 5 */
+
+ unsigned int reserved_2:1; /**< [0] These bits are always 0 */
+ } utRxTransTable4; /**< Rx translation table */
+
+ /**
+ * @ingroup IxAtmdAccUtopiaCtrlAPI
+ * @struct UtRxTransTable5_
+ * @brief Utopia Rx translation table Register
+ */
+ struct UtRxTransTable5_
+ {
+
+ unsigned int phy30:5; /**< [31-27] Rx Mapping value of logical phy 6 */
+
+ unsigned int reserved_1:27; /**< [26-0] These bits are always 0 */
+
+ } utRxTransTable5; /**< Rx translation table */
+
+ /**
+ * @ingroup IxAtmdAccUtopiaCtrlAPI
+ * @struct UtSysConfig_
+ * @brief NPE setup Register
+ */
+ struct UtSysConfig_
+ {
+
+ unsigned int reserved_1:2; /**< [31-30] These bits are always 0 */
+ unsigned int txEnbFSM:1; /**< [29] Enables the operation ofthe Utopia Transmit FSM
+ * @li 1 - FSM enabled
+ * @li 0 - FSM inactive
+ */
+ unsigned int rxEnbFSM:1; /**< [28] Enables the operation ofthe Utopia Revieve FSM
+ * @li 1 - FSM enabled
+ * @li 0 - FSM inactive
+ */
+ unsigned int disablePins:1; /**< [27] Disable Utopia interface I/O pins forcing the signals to an
+ * inactive state. Note that this bit is set on reset and must be
+ * de-asserted
+ * @li 0 - Normal data transfer
+ * @li 1 - Utopia interface pins are forced inactive
+ */
+ unsigned int tstLoop:1; /**< [26] Test Loop Back Enable.
+ * @li Note: For loop back to function RxMode and Tx Mode must both be set
+ * to single PHY mode.
+ * @li 0 - Loop back
+ * @li 1 - Normal operating mode
+ */
+
+ unsigned int txReset:1; /**< [25] Resets the Utopia Coprocessor transmit module to a known state.
+ * @li Note: All transmit configuration and status registers will be reset
+ * to their reset values.
+ * @li 0 - Normal operating mode¸
+ * @li 1 - Reset transmit modules
+ */
+
+ unsigned int rxReset:1; /**< [24] Resets the Utopia Coprocessor receive module to a known state.
+ * @li Note: All receive configuration and status registers will be reset
+ * to their reset values.
+ * @li 0 - Normal operating mode
+ * @li 1 - Reset receive modules
+ */
+
+ unsigned int reserved_2:24; /**< [23-0] These bits are always 0 */
+ } utSysConfig; /**< NPE debug config */
+
+}
+IxAtmdAccUtopiaConfig;
+
+/**
+*
+* @brief Utopia status
+*
+* This structure is used to set/get the Utopia status parameters
+* @li contains debug cell counters, to be accessed during a read operation
+*
+* @note - the exact description of all parameters is done in the Utopia reference
+* documents.
+*
+*/
+typedef struct
+{
+
+ unsigned int utTxCellCount; /**< count of cells transmitted */
+
+ unsigned int utTxIdleCellCount; /**< count of idle cells transmitted */
+
+ /**
+ * @ingroup IxAtmdAccUtopiaCtrlAPI
+ * @struct UtTxCellConditionStatus_
+ * @brief Utopia Tx Status Register
+ */
+ struct UtTxCellConditionStatus_
+ {
+
+ unsigned int reserved_1:2; /**< [31:30] These bits are always 0 */
+ unsigned int txFIFO2Underflow:1; /**< [29] This bit is set if 64-byte
+ * Transmit FIFO2 indicates a FIFO underflow
+ * error condition.
+ */
+ unsigned int txFIFO1Underflow:1; /**< [28] This bit is set if
+ * 64-byte Transmit FIFO1 indicates a FIFO
+ * underflow error condition.
+ */
+ unsigned int txFIFO2Overflow:1; /**< [27] This bit is set if 64-byte
+ * Transmit FIFO2 indicates a FIFO overflow
+ * error condition.
+ */
+ unsigned int txFIFO1Overflow:1; /**< [26] This bit is set if 64-byte
+ * Transmit FIFO1 indicates a FIFO overflow
+ * error condition.
+ */
+ unsigned int txIdleCellCountOvr:1; /**< [25] This bit is set if the
+ * TxIdleCellCount register overflows.
+ */
+ unsigned int txCellCountOvr:1; /**< [24] This bit is set if the
+ * TxCellCount register overflows
+ */
+ unsigned int reserved_2:24; /**< [23:0] These bits are always 0 */
+ } utTxCellConditionStatus; /**< Tx cells condition status */
+
+ unsigned int utRxCellCount; /**< count of cell received */
+ unsigned int utRxIdleCellCount; /**< count of idle cell received */
+ unsigned int utRxInvalidHECount; /**< count of invalid cell
+ * received because of HEC errors
+ */
+ unsigned int utRxInvalidParCount; /**< count of invalid cell received
+ * because of parity errors
+ */
+ unsigned int utRxInvalidSizeCount; /**< count of invalid cell
+ * received because of cell
+ * size errors
+ */
+
+ /**
+ * @ingroup IxAtmdAccUtopiaCtrlAPI
+ * @struct UtRxCellConditionStatus_
+ * @brief Utopia Rx Status Register
+ */
+ struct UtRxCellConditionStatus_
+ {
+
+ unsigned int reserved_1:3; /**< [31:29] These bits are always 0.*/
+ unsigned int rxCellCountOvr:1; /**< [28] This bit is set if the RxCellCount register overflows. */
+ unsigned int invalidHecCountOvr:1; /**< [27] This bit is set if the InvalidHecCount register overflows.*/
+ unsigned int invalidParCountOvr:1; /**< [26] This bit is set if the InvalidParCount register overflows.*/
+ unsigned int invalidSizeCountOvr:1; /**< [25] This bit is set if the InvalidSizeCount register overflows.*/
+ unsigned int rxIdleCountOvr:1; /**< [24] This bit is set if the RxIdleCount register overflows.*/
+ unsigned int reserved_2:4; /**< [23:20] These bits are always 0 */
+ unsigned int rxFIFO2Underflow:1; /**< [19] This bit is set if 64-byte Receive FIFO2
+ * indicates a FIFO underflow error condition.
+ */
+ unsigned int rxFIFO1Underflow:1; /**< [18] This bit is set if 64-byte Receive
+ * FIFO1 indicates a FIFO underflow error condition
+ . */
+ unsigned int rxFIFO2Overflow:1; /**< [17] This bit is set if 64-byte Receive FIFO2
+ * indicates a FIFO overflow error condition.
+ */
+ unsigned int rxFIFO1Overflow:1; /**< [16] This bit is set if 64-byte Receive FIFO1
+ * indicates a FIFO overflow error condition.
+ */
+ unsigned int reserved_3:16; /**< [15:0] These bits are always 0. */
+ } utRxCellConditionStatus; /**< Rx cells condition status */
+
+} IxAtmdAccUtopiaStatus;
+
+/**
+ * @} defgroup IxAtmdAccUtopiaCtrlAPI
+ */
+
+ /**
+ *
+ * @ingroup IxAtmdAccCtrlAPI
+ *
+ * @fn ixAtmdAccUtopiaConfigSet (const IxAtmdAccUtopiaConfig *
+ ixAtmdAccUtopiaConfigPtr)
+ *
+ * @brief Send the configuration structure to the Utopia interface
+ *
+ * This function downloads the @a IxAtmdAccUtopiaConfig structure to
+ * the Utopia and has the following effects
+ * @li setup the Utopia interface
+ * @li initialise the NPE
+ * @li reset the Utopia cell counters and status registers to known values
+ *
+ * This action has to be done once at initialisation. A lock is preventing
+ * the concurrent use of @a ixAtmdAccUtopiaStatusGet() and
+ * @A ixAtmdAccUtopiaConfigSet()
+ *
+ * @param *ixAtmdAccNPEConfigPtr @ref IxAtmdAccUtopiaConfig [in] - pointer to a structure to download to
+ * Utopia. This parameter cannot be a null pointer.
+ *
+ * @return @li IX_SUCCESS successful download
+ * @return @li IX_FAIL error in the parameters, or configuration is not
+ * complete or failed
+ *
+ * @sa ixAtmdAccUtopiaStatusGet
+ *
+ */
+PUBLIC IX_STATUS ixAtmdAccUtopiaConfigSet (const IxAtmdAccUtopiaConfig *
+ ixAtmdAccUtopiaConfigPtr);
+
+/**
+ *
+ * @ingroup IxAtmdAccCtrlAPI
+ *
+ * @fn ixAtmdAccUtopiaStatusGet (IxAtmdAccUtopiaStatus *
+ ixAtmdAccUtopiaStatus)
+ *
+ * @brief Get the Utopia interface configuration.
+ *
+ * This function reads the Utopia registers and the Cell counts
+ * and fills the @a IxAtmdAccUtopiaStatus structure
+ *
+ * A lock is preventing the concurrent
+ * use of @a ixAtmdAccUtopiaStatusGet() and @A ixAtmdAccUtopiaConfigSet()
+ *
+ * @param ixAtmdAccUtopiaStatus @ref IxAtmdAccUtopiaStatus [out] - pointer to structure to be updated from internal
+ * hardware counters. This parameter cannot be a NULL pointer.
+ *
+ * @return @li IX_SUCCESS successful read
+ * @return @li IX_FAIL error in the parameters null pointer, or
+ * configuration read is not complete or failed
+ *
+ * @sa ixAtmdAccUtopiaConfigSet
+ *
+ */
+PUBLIC IX_STATUS ixAtmdAccUtopiaStatusGet (IxAtmdAccUtopiaStatus *
+ ixAtmdAccUtopiaStatus);
+
+/**
+ *
+ * @ingroup IxAtmdAcc
+ *
+ * @fn ixAtmdAccPortEnable (IxAtmLogicalPort port)
+ *
+ * @brief enable a PHY logical port
+ *
+ * This function enables the transmission over one port. It should be
+ * called before accessing any resource from this port and before the
+ * establishment of a VC.
+ *
+ * When a port is enabled, the cell transmission to the Utopia interface
+ * is started. If there is no traffic already running, idle cells are
+ * sent over the interface.
+ *
+ * This function can be called multiple times.
+ *
+ * @param port @ref IxAtmLogicalPort [in] - logical PHY port [@a IX_UTOPIA_PORT_0 .. @a IX_UTOPIA_MAX_PORTS - 1]
+ *
+ * @return @li IX_SUCCESS enable is complete
+ * @return @li IX_ATMDACC_WARNING port already enabled
+ * @return @li IX_FAIL enable failed, wrong parameter, or cannot
+ * initialise this port (the port is maybe already in use,
+ * or there is a hardware issue)
+ *
+ * @note - This function needs internal locks and should not be
+ * called from an interrupt context
+ *
+ * @sa ixAtmdAccPortDisable
+ *
+ */
+PUBLIC IX_STATUS ixAtmdAccPortEnable (IxAtmLogicalPort port);
+
+/**
+ *
+ * @ingroup IxAtmdAccCtrlAPI
+ *
+ * @fn ixAtmdAccPortDisable (IxAtmLogicalPort port)
+ *
+ * @brief disable a PHY logical port
+ *
+ * This function disable the transmission over one port.
+ *
+ * When a port is disabled, the cell transmission to the Utopia interface
+ * is stopped.
+ *
+ * @param port @ref IxAtmLogicalPort [in] - logical PHY port [@a IX_UTOPIA_PORT_0 .. @a IX_UTOPIA_MAX_PORTS - 1]
+ *
+ * @return @li IX_SUCCESS disable is complete
+ * @return @li IX_ATMDACC_WARNING port already disabled
+ * @return @li IX_FAIL disable failed, wrong parameter .
+ *
+ * @note - This function needs internal locks and should not be called
+ * from an interrupt context
+ *
+ * @note - The response from hardware is done through the txDone mechanism
+ * to ensure the synchrnisation with tx resources. Therefore, the
+ * txDone mechanism needs to be serviced to make a PortDisable complete.
+ *
+ * @sa ixAtmdAccPortEnable
+ * @sa ixAtmdAccPortDisableComplete
+ * @sa ixAtmdAccTxDoneDispatch
+ *
+ */
+PUBLIC IX_STATUS ixAtmdAccPortDisable (IxAtmLogicalPort port);
+
+/**
+*
+* @ingroup IxAtmdAccCtrlAPI
+*
+* @fn ixAtmdAccPortDisableComplete (IxAtmLogicalPort port)
+*
+* @brief disable a PHY logical port
+*
+* This function indicates if the port disable for a port has completed. This
+* function will return TRUE if the port has never been enabled.
+*
+* @param port @ref IxAtmLogicalPort [in] - logical PHY port [@a IX_UTOPIA_PORT_0 .. @a IX_UTOPIA_MAX_PORTS - 1]
+*
+* @return @li TRUE disable is complete
+* @return @li FALSE disable failed, wrong parameter .
+*
+* @note - This function needs internal locks and should not be called
+* from an interrupt context
+*
+* @sa ixAtmdAccPortEnable
+* @sa ixAtmdAccPortDisable
+*
+*/
+PUBLIC BOOL ixAtmdAccPortDisableComplete (IxAtmLogicalPort port);
+
+#endif /* IXATMDACCCTRL_H */
+
+/**
+ * @} defgroup IxAtmdAccCtrlAPI
+ */
+
+
diff --git a/cpu/ixp/npe/include/IxAtmm.h b/cpu/ixp/npe/include/IxAtmm.h
new file mode 100644
index 0000000000..fcf523fca4
--- /dev/null
+++ b/cpu/ixp/npe/include/IxAtmm.h
@@ -0,0 +1,795 @@
+/**
+ * @file IxAtmm.h
+ *
+ * @date 3-DEC-2001
+ *
+ * @brief Header file for the IXP400 ATM Manager component (IxAtmm)
+ *
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+
+/**
+ * @defgroup IxAtmm IXP400 ATM Manager (IxAtmm) API
+ *
+ * @brief IXP400 ATM Manager component Public API
+ *
+ * @{
+ */
+
+#ifndef IXATMM_H
+#define IXATMM_H
+
+/*
+ * Put the user defined include files required
+ */
+#include "IxAtmSch.h"
+#include "IxOsalTypes.h"
+
+/*
+ * #defines and macros used in this file.
+ */
+
+/**
+ * @def IX_ATMM_RET_ALREADY_INITIALIZED
+ *
+ * @brief Component has already been initialized
+ */
+#define IX_ATMM_RET_ALREADY_INITIALIZED 2
+
+/**
+ * @def IX_ATMM_RET_INVALID_PORT
+ *
+ * @brief Specified port does not exist or is out of range */
+#define IX_ATMM_RET_INVALID_PORT 3
+
+/**
+ * @def IX_ATMM_RET_INVALID_VC_DESCRIPTOR
+ *
+ * @brief The VC description does not adhere to ATM standards */
+#define IX_ATMM_RET_INVALID_VC_DESCRIPTOR 4
+
+/**
+ * @def IX_ATMM_RET_VC_CONFLICT
+ *
+ * @brief The VPI/VCI values supplied are either reserved, or they
+ * conflict with a previously registered VC on this port */
+#define IX_ATMM_RET_VC_CONFLICT 5
+
+/**
+ * @def IX_ATMM_RET_PORT_CAPACITY_IS_FULL
+ *
+ * @brief The virtual connection cannot be established on the port
+ * because the remaining port capacity is not sufficient to
+ * support it */
+#define IX_ATMM_RET_PORT_CAPACITY_IS_FULL 6
+
+/**
+ * @def IX_ATMM_RET_NO_SUCH_VC
+ *
+ * @brief No registered VC, as described by the supplied VCI/VPI or
+ * VC identifier values, exists on this port */
+#define IX_ATMM_RET_NO_SUCH_VC 7
+
+/**
+ * @def IX_ATMM_RET_INVALID_VC_ID
+ *
+ * @brief The specified VC identifier is out of range. */
+#define IX_ATMM_RET_INVALID_VC_ID 8
+
+/**
+ * @def IX_ATMM_RET_INVALID_PARAM_PTR
+ *
+ * @brief A pointer parameter was NULL. */
+#define IX_ATMM_RET_INVALID_PARAM_PTR 9
+
+/**
+ * @def IX_ATMM_UTOPIA_SPHY_ADDR
+ *
+ * @brief The phy address when in SPHY mode */
+#define IX_ATMM_UTOPIA_SPHY_ADDR 31
+
+/**
+ * @def IX_ATMM_THREAD_PRI_HIGH
+ *
+ * @brief The value of high priority thread */
+#define IX_ATMM_THREAD_PRI_HIGH 90
+
+/*
+ * Typedefs whose scope is limited to this file.
+ */
+
+/** @brief Definition for use in the @ref IxAtmmVc structure.
+ * Indicates the direction of a VC */
+typedef enum
+{
+ IX_ATMM_VC_DIRECTION_TX=0, /**< Atmm Vc direction transmit*/
+ IX_ATMM_VC_DIRECTION_RX, /**< Atmm Vc direction receive*/
+ IX_ATMM_VC_DIRECTION_INVALID /**< Atmm Vc direction invalid*/
+} IxAtmmVcDirection;
+
+/** @brief Definition for use with @ref IxAtmmVcChangeCallback
+ * callback. Indicates that the event type represented by the
+ * callback for this VC. */
+typedef enum
+{
+ IX_ATMM_VC_CHANGE_EVENT_REGISTER=0, /**< Atmm Vc event register*/
+ IX_ATMM_VC_CHANGE_EVENT_DEREGISTER, /**< Atmm Vc event de-register*/
+ IX_ATMM_VC_CHANGE_EVENT_INVALID /**< Atmm Vc event invalid*/
+} IxAtmmVcChangeEvent;
+
+/** @brief Definitions for use with @ref ixAtmmUTOPIAInit interface to
+ * indicate that UTOPIA loopback should be enabled or disabled
+ * on initialisation. */
+typedef enum
+{
+ IX_ATMM_UTOPIA_LOOPBACK_DISABLED=0, /**< Atmm Utopia loopback mode disabled*/
+ IX_ATMM_UTOPIA_LOOPBACK_ENABLED, /**< Atmm Utopia loopback mode enabled*/
+ IX_ATMM_UTOPIA_LOOPBACK_INVALID /**< Atmm Utopia loopback mode invalid*/
+} IxAtmmUtopiaLoopbackMode;
+
+/** @brief This structure describes the required attributes of a
+ * virtual connection.
+*/
+typedef struct {
+ unsigned vpi; /**< VPI value of this virtual connection */
+ unsigned vci; /**< VCI value of this virtual connection. */
+ IxAtmmVcDirection direction; /**< VC direction */
+
+ /** Traffic descriptor of this virtual connection. This structure
+ * is defined by the @ref IxAtmSch component. */
+ IxAtmTrafficDescriptor trafficDesc;
+} IxAtmmVc;
+
+
+/** @brief Definitions for use with @ref ixAtmmUtopiaInit interface to
+ * indicate that UTOPIA multi-phy/single-phy mode is used.
+ */
+typedef enum
+{
+ IX_ATMM_MPHY_MODE = 0, /**< Atmm phy mode mphy*/
+ IX_ATMM_SPHY_MODE, /**< Atmm phy mode sphy*/
+ IX_ATMM_PHY_MODE_INVALID /**< Atmm phy mode invalid*/
+} IxAtmmPhyMode;
+
+
+/** @brief Structure contains port-specific information required to
+ * initialize IxAtmm, and specifically, the IXP400 UTOPIA
+ * Level-2 device. */
+typedef struct {
+ unsigned reserved_1:11; /**< [31:21] Should be zero */
+ unsigned UtopiaTxPhyAddr:5; /**< [20:16] Address of the
+ * transmit (Tx) PHY for this
+ * port on the 5-bit UTOPIA
+ * Level-2 address bus */
+ unsigned reserved_2:11; /**< [15:5] Should be zero */
+ unsigned UtopiaRxPhyAddr:5; /**< [4:0] Address of the receive
+ * (Rx) PHY for this port on the
+ * 5-bit UTOPIA Level-2
+ * address bus */
+} IxAtmmPortCfg;
+
+/** @brief Callback type used with @ref ixAtmmVcChangeCallbackRegister interface
+ * Defines a callback type which will be used to notify registered
+ * users of registration/deregistration events on a particular port
+ *
+ * @param eventType @ref IxAtmmVcChangeEvent [in] - Event indicating
+ * whether the VC supplied has been added or
+ * removed
+ *
+ * @param port @ref IxAtmLogicalPort [in] - Specifies the port on which the event has
+ * occurred
+ *
+ * @param vcChanged @ref IxAtmmVc* [in] - Pointer to a structure which gives
+ * details of the VC which has been added
+ * or removed on the port
+ */
+typedef void (*IxAtmmVcChangeCallback) (IxAtmmVcChangeEvent eventType,
+ IxAtmLogicalPort port,
+ const IxAtmmVc* vcChanged);
+
+/*
+ * Variable declarations global to this file only. Externs are followed by
+ * static variables.
+ */
+
+/*
+ * Extern function prototypes
+ */
+
+/*
+ * Function declarations
+ */
+
+
+/**
+ * @ingroup IxAtmm
+ *
+ * @fn ixAtmmInit (void)
+ *
+ * @brief Interface to initialize the IxAtmm software component. Can
+ * be called once only.
+ *
+ * Must be called before any other IxAtmm API is called.
+ *
+ * @param "none"
+ *
+ * @return @li IX_SUCCESS : IxAtmm has been successfully initialized.
+ * Calls to other IxAtmm interfaces may now be performed.
+ * @return @li IX_FAIL : IxAtmm has already been initialized.
+ */
+PUBLIC IX_STATUS
+ixAtmmInit (void);
+
+/**
+ * @ingroup IxAtmm
+ *
+ * @fn ixAtmmUtopiaInit (unsigned numPorts,
+ IxAtmmPhyMode phyMode,
+ IxAtmmPortCfg portCfgs[],
+ IxAtmmUtopiaLoopbackMode loopbackMode)
+ *
+ * @brief Interface to initialize the UTOPIA Level-2 ATM coprocessor
+ * for the specified number of physical ports. The function
+ * must be called before the ixAtmmPortInitialize interface
+ * can operate successfully.
+ *
+ * @param numPorts unsigned [in] - Indicates the total number of logical
+ * ports that are active on the device. Up to 12 ports are
+ * supported.
+ *
+ * @param phyMode @ref IxAtmmPhyMode [in] - Put the Utopia coprocessor in SPHY
+ * or MPHY mode.
+ *
+ * @param portCfgs[] @ref IxAtmmPortCfg [in] - Pointer to an array of elements
+ * detailing the UTOPIA specific port characteristics. The
+ * length of the array must be equal to the number of ports
+ * activated. ATM ports are referred to by the relevant
+ * offset in this array in all subsequent IxAtmm interface
+ * calls.
+ *
+ * @param loopbackMode @ref IxAtmmUtopiaLoopbackMode [in] - Value must be one of
+ * @ref IX_ATMM_UTOPIA_LOOPBACK_ENABLED or @ref
+ * IX_ATMM_UTOPIA_LOOPBACK_DISABLED indicating whether
+ * loopback should be enabled on the device. Loopback can
+ * only be supported on a single PHY, therefore the numPorts
+ * parameter must be 1 if loopback is enabled.
+ *
+ * @return @li IX_SUCCESS : Indicates that the UTOPIA device has been
+ * successfully initialized for the supplied ports.
+ * @return @li IX_ATMM_RET_ALREADY_INITIALIZED : The UTOPIA device has
+ * already been initialized.
+ * @return @li IX_FAIL : The supplied parameters are invalid or have been
+ * rejected by the UTOPIA-NPE device.
+ *
+ * @warning
+ * This interface may only be called once.
+ * Port identifiers are assumed to range from 0 to (numPorts - 1) in all
+ * instances.
+ * In all subsequent calls to interfaces supplied by IxAtmm, the specified
+ * port value is expected to represent the offset in the portCfgs array
+ * specified in this interface. i.e. The first port in this array will
+ * subsequently be represented as port 0, the second port as port 1,
+ * and so on.*/
+PUBLIC IX_STATUS
+ixAtmmUtopiaInit (unsigned numPorts,
+ IxAtmmPhyMode phyMode,
+ IxAtmmPortCfg portCfgs[],
+ IxAtmmUtopiaLoopbackMode loopbackMode);
+
+
+/**
+ * @ingroup IxAtmm
+ *
+ * @fn ixAtmmPortInitialize (IxAtmLogicalPort port,
+ unsigned txPortRate,
+ unsigned rxPortRate)
+ *
+ * @brief The interface is called following @ref ixAtmmUtopiaInit ()
+ * and before calls to any other IxAtmm interface. It serves
+ * to activate the registered ATM port with IxAtmm.
+ *
+ * The transmit and receive port rates are specified in bits per
+ * second. This translates to ATM cells per second according to the
+ * following formula: CellsPerSecond = portRate / (53*8) The
+ * IXP400 device supports only 53 byte cells. The client shall make
+ * sure that the off-chip physical layer device has already been
+ * initialized.
+ *
+ * IxAtmm will configure IxAtmdAcc and IxAtmSch to enable scheduling
+ * on the port.
+ *
+ * This interface must be called once for each active port in the
+ * system. The first time the interface is invoked, it will configure
+ * the mechanism by which the handling of transmit, transmit-done and
+ * receive are driven with the IxAtmdAcc component.
+ *
+ * This function is reentrant.
+ *
+ * @note The minimum tx rate that will be accepted is 424 bit/s which equates
+ * to 1 cell (53 bytes) per second.
+ *
+ * @param port @ref IxAtmLogicalPort [in] - Identifies the port which is to be
+ * initialized.
+ *
+ * @param txPortRate unsigned [in] - Value specifies the
+ * transmit port rate for this port in
+ * bits/second. This value is used by the ATM Scheduler
+ * component is evaluating VC access requests for the port.
+ *
+ * @param rxPortRate unsigned [in] - Value specifies the
+ * receive port rate for this port in bits/second.
+ *
+ * @return @li IX_SUCCESS : The specificed ATM port has been successfully
+ * initialized. IxAtmm is ready to accept VC registrations on
+ * this port.
+ *
+ * @return @li IX_ATMM_RET_ALREADY_INITIALIZED : ixAtmmPortInitialize has
+ * already been called successfully on this port. The current
+ * call is rejected.
+ *
+ * @return @li IX_ATMM_RET_INVALID_PORT : The port value indicated in the
+ * input is not valid. The request is rejected.
+ *
+ * @return @li IX_FAIL : IxAtmm could not initialize the port because the
+ * inputs are not understood.
+ *
+ * @sa ixAtmmPortEnable, ixAtmmPortDisable
+ *
+ */
+PUBLIC IX_STATUS
+ixAtmmPortInitialize (IxAtmLogicalPort port,
+ unsigned txPortRate,
+ unsigned rxPortRate);
+
+/**
+ * @ingroup IxAtmm
+ *
+ * @fn ixAtmmPortModify (IxAtmLogicalPort port,
+ unsigned txPortRate,
+ unsigned rxPortRate)
+ *
+ * @brief A client may call this interface to change the existing
+ * port rate (expressed in bits/second) on an established ATM
+ * port.
+ *
+ * @param port @ref IxAtmLogicalPort [in] - Identifies the port which is to be
+ * initialized.
+ *
+ * @param txPortRate unsigned [in] - Value specifies the``
+ * transmit port rate for this port in
+ * bits/second. This value is used by the ATM Scheduler
+ * component is evaluating VC access requests for the port.
+ *
+ * @param rxPortRate unsigned [in] - Value specifies the
+ * receive port rate for this port in
+ * bits/second.
+ *
+ * @return @li IX_SUCCESS : The indicated ATM port rates have been
+ * successfully modified.
+ *
+ * @return @li IX_ATMM_RET_INVALID_PORT : The port value indicated in the
+ * input is not valid. The request is rejected.
+ *
+ * @return @li IX_FAIL : IxAtmm could not update the port because the
+ * inputs are not understood, or the interface was called before
+ * the port was initialized. */
+PUBLIC IX_STATUS
+ixAtmmPortModify (IxAtmLogicalPort port,
+ unsigned txPortRate,
+ unsigned rxPortRate);
+
+/**
+ * @ingroup IxAtmm
+ *
+ * @fn ixAtmmPortQuery (IxAtmLogicalPort port,
+ unsigned *txPortRate,
+ unsigned *rxPortRate);
+
+ *
+ * @brief The client may call this interface to request details on
+ * currently registered transmit and receive rates for an ATM
+ * port.
+ *
+ * @param port @ref IxAtmLogicalPort [in] - Value identifies the port from which the
+ * rate details are requested.
+ *
+ * @param *txPortRate unsigned [out] - Pointer to a value
+ * which will be filled with the value of the transmit port
+ * rate specified in bits/second.
+ *
+ * @param *rxPortRate unsigned [out] - Pointer to a value
+ * which will be filled with the value of the receive port
+ * rate specified in bits/second.
+ *
+ * @return @li IX_SUCCESS : The information requested on the specified
+ * port has been successfully supplied in the output.
+ *
+ * @return @li IX_ATMM_RET_INVALID_PORT : The port value indicated in the
+ * input is not valid. The request is rejected.
+ *
+ * @return @li IX_ATMM_RET_INVALID_PARAM_PTR : A pointer parameter was
+ * NULL.
+ *
+ * @return @li IX_FAIL : IxAtmm could not update the port because the
+ * inputs are not understood, or the interface was called before
+ * the port was initialized. */
+PUBLIC IX_STATUS
+ixAtmmPortQuery (IxAtmLogicalPort port,
+ unsigned *txPortRate,
+ unsigned *rxPortRate);
+
+/**
+ * @ingroup IxAtmm
+ *
+ * @fn ixAtmmPortEnable(IxAtmLogicalPort port)
+ *
+ * @brief The client call this interface to enable transmit for an ATM
+ * port. At initialisation, all the ports are disabled.
+ *
+ * @param port @ref IxAtmLogicalPort [in] - Value identifies the port
+ *
+ * @return @li IX_SUCCESS : Transmission over this port is started.
+ *
+ * @return @li IX_FAIL : The port parameter is not valid, or the
+ * port is already enabled
+ *
+ * @note - When a port is disabled, Rx and Tx VC Connect requests will fail
+ *
+ * @note - This function uses system resources and should not be used
+ * inside an interrupt context.
+ *
+ * @sa ixAtmmPortDisable */
+PUBLIC IX_STATUS
+ixAtmmPortEnable(IxAtmLogicalPort port);
+
+/**
+ * @ingroup IxAtmm
+ *
+ * @fn ixAtmmPortDisable(IxAtmLogicalPort port)
+ *
+ * @brief The client call this interface to disable transmit for an ATM
+ * port. At initialisation, all the ports are disabled.
+ *
+ * @param port @ref IxAtmLogicalPort [in] - Value identifies the port
+ *
+ * @return @li IX_SUCCESS : Transmission over this port is stopped.
+ *
+ * @return @li IX_FAIL : The port parameter is not valid, or the
+ * port is already disabled
+ *
+ * @note - When a port is disabled, Rx and Tx VC Connect requests will fail
+ *
+ * @note - This function call does not stop RX traffic. It is supposed
+ * that this function is invoked when a serious problem
+ * is detected (e.g. physical layer broken). Then, the RX traffic
+ * is not passing.
+ *
+ * @note - This function is blocking until the hw acknowledge that the
+ * transmission is stopped.
+ *
+ * @note - This function uses system resources and should not be used
+ * inside an interrupt context.
+ *
+ * @sa ixAtmmPortEnable */
+PUBLIC IX_STATUS
+ixAtmmPortDisable(IxAtmLogicalPort port);
+
+/**
+ * @ingroup IxAtmm
+ *
+ * @fn ixAtmmVcRegister (IxAtmLogicalPort port,
+ IxAtmmVc *vcToAdd,
+ IxAtmSchedulerVcId *vcId)
+ *
+ * @brief This interface is used to register an ATM Virtual
+ * Connection on the specified ATM port.
+ *
+ * Each call to this interface registers a unidirectional virtual
+ * connection with the parameters specified. If a bi-directional VC
+ * is needed, the function should be called twice (once for each
+ * direction, Tx & Rx) where the VPI and VCI and port parameters in
+ * each call are identical.
+ *
+ * With the addition of each new VC to a port, a series of
+ * callback functions are invoked by the IxAtmm component to notify
+ * possible external components of the change. The callback functions
+ * are registered using the @ref ixAtmmVcChangeCallbackRegister interface.
+ *
+ * The IxAtmSch component is notified of the registration of transmit
+ * VCs.
+ *
+ * @param port @ref IxAtmLogicalPort [in] - Identifies port on which the specified VC is
+ * to be registered.
+ *
+ * @param *vcToAdd @ref IxAtmmVc [in] - Pointer to an @ref IxAtmmVc structure
+ * containing a description of the VC to be registered. The
+ * client shall fill the vpi, vci and direction and relevant
+ * trafficDesc members of this structure before calling this
+ * function.
+ *
+ * @param *vcId @ref IxAtmSchedulerVcId [out] - Pointer to an integer value which is filled
+ * with the per-port unique identifier value for this VC.
+ * This identifier will be required when a request is
+ * made to deregister or change this VC. VC identifiers
+ * for transmit VCs will have a value between 0-43,
+ * i.e. 32 data Tx VCs + 12 OAM Tx Port VCs.
+ * Receive VCs will have a value between 44-66,
+ * i.e. 32 data Rx VCs + 1 OAM Rx VC.
+ *
+ * @return @li IX_SUCCESS : The VC has been successfully registered on
+ * this port. The VC is ready for a client to configure IxAtmdAcc
+ * for receive and transmit operations on the VC.
+ * @return @li IX_ATMM_RET_INVALID_PORT : The port value indicated in the
+ * input is not valid or has not been initialized. The request
+ * is rejected.
+ * @return @li IX_ATMM_RET_INVALID_VC_DESCRIPTOR : The descriptor
+ * pointed to by vcToAdd is invalid. The registration request
+ * is rejected.
+ * @return @li IX_ATMM_RET_VC_CONFLICT : The VC requested conflicts with
+ * reserved VPI and/or VCI values or with another VC already activated
+ * on this port.
+ * @return @li IX_ATMM_RET_PORT_CAPACITY_IS_FULL : The VC cannot be
+ * registered in the port becuase the port capacity is
+ * insufficient to support the requested ATM traffic contract.
+ * The registration request is rejected.
+ * @return @li IX_ATMM_RET_INVALID_PARAM_PTR : A pointer parameter was
+ * NULL.
+ *
+ * @warning IxAtmm has no capability of signaling or negotiating a virtual
+ * connection. Negotiation of the admission of the VC to the network
+ * is beyond the scope of this function. This is assumed to be
+ * performed by the calling client, if appropriate,
+ * before or after this function is called.
+ */
+PUBLIC IX_STATUS
+ixAtmmVcRegister (IxAtmLogicalPort port,
+ IxAtmmVc *vcToAdd,
+ IxAtmSchedulerVcId *vcId);
+
+/**
+ * @ingroup IxAtmm
+ *
+ * @fn ixAtmmVcDeregister (IxAtmLogicalPort port, IxAtmSchedulerVcId vcId)
+ *
+ * @brief Function called by a client to deregister a VC from the
+ * system.
+ *
+ * With the removal of each new VC from a port, a series of
+ * registered callback functions are invoked by the IxAtmm component
+ * to notify possible external components of the change. The callback
+ * functions are registered using the @ref ixAtmmVcChangeCallbackRegister.
+ *
+ * The IxAtmSch component is notified of the removal of transmit VCs.
+ *
+ * @param port @ref IxAtmLogicalPort [in] - Identifies port on which the VC to be
+ * removed is currently registered.
+ *
+ * @param vcId @ref IxAtmSchedulerVcId [in] - VC identifier value of the VC to
+ * be deregistered. This value was supplied to the client when
+ the VC was originally registered. This value can also be
+ queried from the IxAtmm component through the @ref ixAtmmVcQuery
+ * interface.
+ *
+ * @return @li IX_SUCCESS : The specified VC has been successfully
+ * removed from this port.
+ * @return @li IX_ATMM_RET_INVALID_PORT : The port value indicated in the
+ * input is not valid or has not been initialized. The request
+ * is rejected.
+ * @return @li IX_FAIL : There is no registered VC associated with the
+ * supplied identifier registered on this port. */
+PUBLIC IX_STATUS
+ixAtmmVcDeregister (IxAtmLogicalPort port, IxAtmSchedulerVcId vcId);
+
+/**
+ * @ingroup IxAtmm
+ *
+ * @fn ixAtmmVcQuery (IxAtmLogicalPort port,
+ unsigned vpi,
+ unsigned vci,
+ IxAtmmVcDirection direction,
+ IxAtmSchedulerVcId *vcId,
+ IxAtmmVc *vcDesc)
+ *
+ * @brief This interface supplies information about an active VC on a
+ * particular port when supplied with the VPI, VCI and
+ * direction of that VC.
+ *
+ * @param port @ref IxAtmLogicalPort [in] - Identifies port on which the VC to be
+ * queried is currently registered.
+ *
+ * @param vpi unsigned [in] - ATM VPI value of the requested VC.
+ *
+ * @param vci unsigned [in] - ATM VCI value of the requested VC.
+ *
+ * @param direction @ref IxAtmmVcDirection [in] - One of @ref
+ * IX_ATMM_VC_DIRECTION_TX or @ref IX_ATMM_VC_DIRECTION_RX
+ * indicating the direction (Tx or Rx) of the requested VC.
+ *
+ * @param *vcId @ref IxAtmSchedulerVcId [out] - Pointer to an integer value which will be
+ * filled with the VC identifier value for the requested
+ * VC (as returned by @ref ixAtmmVcRegister), if it
+ * exists on this port.
+ *
+ * @param *vcDesc @ref IxAtmmVc [out] - Pointer to an @ref IxAtmmVc structure
+ * which will be filled with the specific details of the
+ * requested VC, if it exists on this port.
+ *
+ * @return @li IX_SUCCESS : The specified VC has been found on this port
+ * and the requested details have been returned.
+ * @return @li IX_ATMM_RET_INVALID_PORT : The port value indicated in the
+ * input is not valid or has not been initialized. The request
+ * is rejected.
+ * @return @li IX_ATMM_RET_NO_SUCH_VC : No VC exists on the specified
+ * port which matches the search criteria (VPI, VCI, direction)
+ * given. No data is returned.
+ * @return @li IX_ATMM_RET_INVALID_PARAM_PTR : A pointer parameter was
+ * NULL.
+ *
+ */
+PUBLIC IX_STATUS
+ixAtmmVcQuery (IxAtmLogicalPort port,
+ unsigned vpi,
+ unsigned vci,
+ IxAtmmVcDirection direction,
+ IxAtmSchedulerVcId *vcId,
+ IxAtmmVc *vcDesc);
+
+
+/**
+ * @ingroup IxAtmm
+ *
+ * @fn ixAtmmVcIdQuery (IxAtmLogicalPort port, IxAtmSchedulerVcId vcId, IxAtmmVc *vcDesc)
+ *
+ * @brief This interface supplies information about an active VC on a
+ * particular port when supplied with a vcId for that VC.
+ *
+ * @param port @ref IxAtmLogicalPort [in] - Identifies port on which the VC to be
+ * queried is currently registered.
+ *
+ * @param vcId @ref IxAtmSchedulerVcId [in] - Value returned by @ref ixAtmmVcRegister which
+ * uniquely identifies the requested VC on this port.
+ *
+ * @param *vcDesc @ref IxAtmmVc [out] - Pointer to an @ref IxAtmmVc structure
+ * which will be filled with the specific details of the
+ * requested VC, if it exists on this port.
+ *
+ * @return @li IX_SUCCESS : The specified VC has been found on this port
+ * and the requested details have been returned.
+ * @return @li IX_ATMM_RET_INVALID_PORT : The port value indicated in the
+ * input is not valid or has not been initialized. The request
+ * is rejected.
+ * @return @li IX_ATMM_RET_NO_SUCH_VC : No VC exists on the specified
+ * port which matches the supplied identifier. No data is
+ * returned.
+ * @return @li IX_ATMM_RET_INVALID_PARAM_PTR : A pointer parameter was
+ * NULL.
+ */
+PUBLIC IX_STATUS
+ixAtmmVcIdQuery (IxAtmLogicalPort port, IxAtmSchedulerVcId vcId, IxAtmmVc *vcDesc);
+
+/**
+ * @ingroup IxAtmm
+ *
+ * @fn ixAtmmVcChangeCallbackRegister (IxAtmmVcChangeCallback callback)
+ *
+ * @brief This interface is invoked to supply a function to IxAtmm
+ * which will be called to notify the client if a new VC is
+ * registered with IxAtmm or an existing VC is removed.
+ *
+ * The callback, when invoked, will run within the context of the call
+ * to @ref ixAtmmVcRegister or @ref ixAtmmVcDeregister which caused
+ * the change of state.
+ *
+ * A maximum of 32 calbacks may be registered in with IxAtmm.
+ *
+ * @param callback @ref IxAtmmVcChangeCallback [in] - Callback which complies
+ * with the @ref IxAtmmVcChangeCallback definition. This
+ * function will be invoked by IxAtmm with the appropiate
+ * parameters for the relevant VC when any VC has been
+ * registered or deregistered with IxAtmm.
+ *
+ * @return @li IX_SUCCESS : The specified callback has been registered
+ * successfully with IxAtmm and will be invoked when appropriate.
+ * @return @li IX_FAIL : Either the supplied callback is invalid, or
+ * IxAtmm has already registered 32 and connot accommodate
+ * any further registrations of this type. The request is
+ * rejected.
+ *
+ * @warning The client must not call either the @ref
+ * ixAtmmVcRegister or @ref ixAtmmVcDeregister interfaces
+ * from within the supplied callback function. */
+PUBLIC IX_STATUS ixAtmmVcChangeCallbackRegister (IxAtmmVcChangeCallback callback);
+
+
+/**
+ * @ingroup IxAtmm
+ *
+ * @fn ixAtmmVcChangeCallbackDeregister (IxAtmmVcChangeCallback callback)
+ *
+ * @brief This interface is invoked to deregister a previously supplied
+ * callback function.
+ *
+ * @param callback @ref IxAtmmVcChangeCallback [in] - Callback which complies
+ * with the @ref IxAtmmVcChangeCallback definition. This
+ * function will removed from the table of callbacks.
+ *
+ * @return @li IX_SUCCESS : The specified callback has been deregistered
+ * successfully from IxAtmm.
+ * @return @li IX_FAIL : Either the supplied callback is invalid, or
+ * is not currently registered with IxAtmm.
+ */
+PUBLIC IX_STATUS
+ixAtmmVcChangeCallbackDeregister (IxAtmmVcChangeCallback callback);
+
+/**
+ * @ingroup IxAtmm
+ *
+ * @fn ixAtmmUtopiaStatusShow (void)
+ *
+ * @brief Display utopia status counters
+ *
+ * @param "none"
+ *
+ * @return @li IX_SUCCESS : Show function was successful
+ * @return @li IX_FAIL : Internal failure
+ */
+PUBLIC IX_STATUS
+ixAtmmUtopiaStatusShow (void);
+
+/**
+ * @ingroup IxAtmm
+ *
+ * @fn ixAtmmUtopiaCfgShow (void)
+ *
+ * @brief Display utopia information(config registers and status registers)
+ *
+ * @param "none"
+ *
+ * @return @li IX_SUCCESS : Show function was successful
+ * @return @li IX_FAIL : Internal failure
+ */
+PUBLIC IX_STATUS
+ixAtmmUtopiaCfgShow (void);
+
+#endif
+/* IXATMM_H */
+
+/** @} */
diff --git a/cpu/ixp/npe/include/IxDmaAcc.h b/cpu/ixp/npe/include/IxDmaAcc.h
new file mode 100644
index 0000000000..53d2625591
--- /dev/null
+++ b/cpu/ixp/npe/include/IxDmaAcc.h
@@ -0,0 +1,260 @@
+/**
+ * @file IxDmaAcc.h
+ *
+ * @date 15 October 2002
+ *
+ * @brief API of the IXP400 DMA Access Driver Component (IxDma)
+ *
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+/*---------------------------------------------------------------------
+ Doxygen group definitions
+ ---------------------------------------------------------------------*/
+
+#ifndef IXDMAACC_H
+#define IXDMAACC_H
+
+#include "IxOsal.h"
+#include "IxNpeDl.h"
+/**
+ * @defgroup IxDmaTypes IXP400 DMA Types (IxDmaTypes)
+ * @brief The common set of types used in the DMA component
+ * @{
+ */
+
+/**
+ * @ingroup IxDmaTypes
+ * @enum IxDmaReturnStatus
+ * @brief Dma return status definitions
+ */
+typedef enum
+{
+ IX_DMA_SUCCESS = IX_SUCCESS, /**< DMA Transfer Success */
+ IX_DMA_FAIL = IX_FAIL, /**< DMA Transfer Fail */
+ IX_DMA_INVALID_TRANSFER_WIDTH, /**< Invalid transfer width */
+ IX_DMA_INVALID_TRANSFER_LENGTH, /**< Invalid transfer length */
+ IX_DMA_INVALID_TRANSFER_MODE, /**< Invalid transfer mode */
+ IX_DMA_INVALID_ADDRESS_MODE, /**< Invalid address mode */
+ IX_DMA_REQUEST_FIFO_FULL /**< DMA request queue is full */
+} IxDmaReturnStatus;
+
+/**
+ * @ingroup IxDmaTypes
+ * @enum IxDmaTransferMode
+ * @brief Dma transfer mode definitions
+ * @note Copy and byte swap, and copy and reverse modes only support multiples of word data length.
+ */
+typedef enum
+{
+ IX_DMA_COPY_CLEAR = 0, /**< copy and clear source*/
+ IX_DMA_COPY, /**< copy */
+ IX_DMA_COPY_BYTE_SWAP, /**< copy and byte swap (endian) */
+ IX_DMA_COPY_REVERSE, /**< copy and reverse */
+ IX_DMA_TRANSFER_MODE_INVALID /**< Invalid transfer mode */
+} IxDmaTransferMode;
+
+/**
+ * @ingroup IxDmaTypes
+ * @enum IxDmaAddressingMode
+ * @brief Dma addressing mode definitions
+ * @note Fixed source address to fixed destination address addressing mode is not supported.
+ */
+typedef enum
+{
+ IX_DMA_INC_SRC_INC_DST = 0, /**< Incremental source address to incremental destination address */
+ IX_DMA_INC_SRC_FIX_DST, /**< Incremental source address to incremental destination address */
+ IX_DMA_FIX_SRC_INC_DST, /**< Incremental source address to incremental destination address */
+ IX_DMA_FIX_SRC_FIX_DST, /**< Incremental source address to incremental destination address */
+ IX_DMA_ADDRESSING_MODE_INVALID /**< Invalid Addressing Mode */
+} IxDmaAddressingMode;
+
+/**
+ * @ingroup IxDmaTypes
+ * @enum IxDmaTransferWidth
+ * @brief Dma transfer width definitions
+ * @Note Fixed addresses (either source or destination) do not support burst transfer width.
+ */
+typedef enum
+{
+ IX_DMA_32_SRC_32_DST = 0, /**< 32-bit src to 32-bit dst */
+ IX_DMA_32_SRC_16_DST, /**< 32-bit src to 16-bit dst */
+ IX_DMA_32_SRC_8_DST, /**< 32-bit src to 8-bit dst */
+ IX_DMA_16_SRC_32_DST, /**< 16-bit src to 32-bit dst */
+ IX_DMA_16_SRC_16_DST, /**< 16-bit src to 16-bit dst */
+ IX_DMA_16_SRC_8_DST, /**< 16-bit src to 8-bit dst */
+ IX_DMA_8_SRC_32_DST, /**< 8-bit src to 32-bit dst */
+ IX_DMA_8_SRC_16_DST, /**< 8-bit src to 16-bit dst */
+ IX_DMA_8_SRC_8_DST, /**< 8-bit src to 8-bit dst */
+ IX_DMA_8_SRC_BURST_DST, /**< 8-bit src to burst dst - Not supported for fixed destination address */
+ IX_DMA_16_SRC_BURST_DST, /**< 16-bit src to burst dst - Not supported for fixed destination address */
+ IX_DMA_32_SRC_BURST_DST, /**< 32-bit src to burst dst - Not supported for fixed destination address */
+ IX_DMA_BURST_SRC_8_DST, /**< burst src to 8-bit dst - Not supported for fixed source address */
+ IX_DMA_BURST_SRC_16_DST, /**< burst src to 16-bit dst - Not supported for fixed source address */
+ IX_DMA_BURST_SRC_32_DST, /**< burst src to 32-bit dst - Not supported for fixed source address*/
+ IX_DMA_BURST_SRC_BURST_DST, /**< burst src to burst dst - Not supported for fixed source and destination address
+*/
+ IX_DMA_TRANSFER_WIDTH_INVALID /**< Invalid transfer width */
+} IxDmaTransferWidth;
+
+/**
+ * @ingroup IxDmaTypes
+ * @enum IxDmaNpeId
+ * @brief NpeId numbers to identify NPE A, B or C
+ */
+typedef enum
+{
+ IX_DMA_NPEID_NPEA = 0, /**< Identifies NPE A */
+ IX_DMA_NPEID_NPEB, /**< Identifies NPE B */
+ IX_DMA_NPEID_NPEC, /**< Identifies NPE C */
+ IX_DMA_NPEID_MAX /**< Total Number of NPEs */
+} IxDmaNpeId;
+/* @} */
+/**
+ * @defgroup IxDmaAcc IXP400 DMA Access Driver (IxDmaAcc) API
+ *
+ * @brief The public API for the IXP400 IxDmaAcc component
+ *
+ * @{
+ */
+
+/**
+ * @ingroup IxDmaAcc
+ * @brief DMA Request Id type
+ */
+typedef UINT32 IxDmaAccRequestId;
+
+/**
+ * @ingroup IxDmaAcc
+ * @def IX_DMA_REQUEST_FULL
+ * @brief DMA request queue is full
+ * This constant is a return value used to tell the user that the IxDmaAcc
+ * queue is full.
+ *
+ */
+#define IX_DMA_REQUEST_FULL 16
+
+/**
+ * @ingroup IxDmaAcc
+ * @brief DMA completion notification
+ * This function is called to notify a client that the DMA has been completed
+ * @param status @ref IxDmaReturnStatus [out] - reporting to client
+ *
+ */
+typedef void (*IxDmaAccDmaCompleteCallback) (IxDmaReturnStatus status);
+
+/**
+ * @ingroup IxDmaAcc
+ *
+ * @fn ixDmaAccInit(IxNpeDlNpeId npeId)
+ *
+ * @brief Initialise the DMA Access component
+ * This function will initialise the DMA Access component internals
+ * @param npeId @ref IxNpeDlNpeId [in] - NPE to use for Dma Transfer
+ * @return @li IX_SUCCESS succesfully initialised the component
+ * @return @li IX_FAIL Initialisation failed for some unspecified
+ * internal reason.
+ */
+PUBLIC IX_STATUS
+ixDmaAccInit(IxNpeDlNpeId npeId);
+
+/**
+ * @ingroup IxDmaAcc
+ *
+ * @fn ixDmaAccDmaTransfer(
+ IxDmaAccDmaCompleteCallback callback,
+ UINT32 SourceAddr,
+ UINT32 DestinationAddr,
+ UINT16 TransferLength,
+ IxDmaTransferMode TransferMode,
+ IxDmaAddressingMode AddressingMode,
+ IxDmaTransferWidth TransferWidth)
+ *
+ * @brief Perform DMA transfer
+ * This function will perform DMA transfer between devices within the
+ * IXP400 memory map.
+ * @note The following are restrictions for IxDmaAccDmaTransfer:
+ * @li The function is non re-entrant.
+ * @li The function assumes host devices are operating in big-endian mode.
+ * @li Fixed address does not suport burst transfer width
+ * @li Fixed source address to fixed destinatiom address mode is not suported
+ * @li The incrementing source address for expansion bus will not support a burst transfer width and copy and clear mode
+ *
+ * @param callback @ref IxDmaAccDmaCompleteCallback [in] - function pointer to be stored and called when the DMA transfer is completed. This cannot be NULL.
+ * @param SourceAddr UINT32 [in] - Starting address of DMA source. Must be a valid IXP400 memory map address.
+ * @param DestinationAddr UINT32 [in] - Starting address of DMA destination. Must be a valid IXP400 memory map address.
+ * @param TransferLength UINT16 [in] - The size of DMA data transfer. The range must be from 1-64Kbyte
+ * @param TransferMode @ref IxDmaTransferMode [in] - The DMA transfer mode
+ * @param AddressingMode @ref IxDmaAddressingMode [in] - The DMA addressing mode
+ * @param TransferWidth @ref IxDmaTransferWidth [in] - The DMA transfer width
+ *
+ * @return @li IX_DMA_SUCCESS Notification that the DMA request is succesful
+ * @return @li IX_DMA_FAIL IxDmaAcc not yet initialised or some internal error has occured
+ * @return @li IX_DMA_INVALID_TRANSFER_WIDTH Transfer width is nit valid
+ * @return @li IX_DMA_INVALID_TRANSFER_LENGTH Transfer length outside of valid range
+ * @return @li IX_DMA_INVALID_TRANSFER_MODE Transfer Mode not valid
+ * @return @li IX_DMA_REQUEST_FIFO_FULL IxDmaAcc request queue is full
+ */
+PUBLIC IxDmaReturnStatus
+ixDmaAccDmaTransfer(
+ IxDmaAccDmaCompleteCallback callback,
+ UINT32 SourceAddr,
+ UINT32 DestinationAddr,
+ UINT16 TransferLength,
+ IxDmaTransferMode TransferMode,
+ IxDmaAddressingMode AddressingMode,
+ IxDmaTransferWidth TransferWidth);
+/**
+ * @ingroup IxDmaAcc
+ *
+ * @fn ixDmaAccShow(void)
+ *
+ * @brief Display some component information for debug purposes
+ * Show some internal operation information relating to the DMA service.
+ * At a minimum the following will show.
+ * - the number of the DMA pend (in queue)
+ * @param None
+ * @return @li None
+ */
+PUBLIC IX_STATUS
+ixDmaAccShow(void);
+
+#endif /* IXDMAACC_H */
+
diff --git a/cpu/ixp/npe/include/IxEthAcc.h b/cpu/ixp/npe/include/IxEthAcc.h
new file mode 100644
index 0000000000..b424648e9d
--- /dev/null
+++ b/cpu/ixp/npe/include/IxEthAcc.h
@@ -0,0 +1,2512 @@
+/** @file IxEthAcc.h
+ *
+ * @brief this file contains the public API of @ref IxEthAcc component
+ *
+ * Design notes:
+ * The IX_OSAL_MBUF address is to be specified on bits [31-5] and must
+ * be cache aligned (bits[4-0] cleared)
+ *
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ *
+ */
+
+#ifndef IxEthAcc_H
+#define IxEthAcc_H
+
+#include <IxOsBuffMgt.h>
+#include <IxTypes.h>
+
+/**
+ * @defgroup IxEthAcc IXP400 Ethernet Access (IxEthAcc) API
+ *
+ * @brief ethAcc is a library that does provides access to the internal IXP400 10/100Bt Ethernet MACs.
+ *
+ *@{
+ */
+
+/**
+ * @ingroup IxEthAcc
+ * @brief Definition of the Ethernet Access status
+ */
+typedef enum /* IxEthAccStatus */
+{
+ IX_ETH_ACC_SUCCESS = IX_SUCCESS, /**< return success*/
+ IX_ETH_ACC_FAIL = IX_FAIL, /**< return fail*/
+ IX_ETH_ACC_INVALID_PORT, /**< return invalid port*/
+ IX_ETH_ACC_PORT_UNINITIALIZED, /**< return uninitialized*/
+ IX_ETH_ACC_MAC_UNINITIALIZED, /**< return MAC uninitialized*/
+ IX_ETH_ACC_INVALID_ARG, /**< return invalid arg*/
+ IX_ETH_TX_Q_FULL, /**< return tx queue is full*/
+ IX_ETH_ACC_NO_SUCH_ADDR /**< return no such address*/
+} IxEthAccStatus;
+
+/**
+ * @ingroup IxEthAcc
+ * @enum IxEthAccPortId
+ * @brief Definition of the IXP400 Mac Ethernet device.
+ */
+typedef enum
+{
+ IX_ETH_PORT_1 = 0, /**< Ethernet Port 1 */
+ IX_ETH_PORT_2 = 1 /**< Ethernet port 2 */
+ ,IX_ETH_PORT_3 = 2 /**< Ethernet port 3 */
+} IxEthAccPortId;
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @def IX_ETH_ACC_NUMBER_OF_PORTS
+ *
+ * @brief Definition of the number of ports
+ *
+ */
+#ifdef __ixp46X
+#define IX_ETH_ACC_NUMBER_OF_PORTS (3)
+#else
+#define IX_ETH_ACC_NUMBER_OF_PORTS (2)
+#endif
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @def IX_IEEE803_MAC_ADDRESS_SIZE
+ *
+ * @brief Definition of the size of the MAC address
+ *
+ */
+#define IX_IEEE803_MAC_ADDRESS_SIZE (6)
+
+
+/**
+ *
+ * @brief Definition of the IEEE 802.3 Ethernet MAC address structure.
+ *
+ * The data should be packed with bytes xx:xx:xx:xx:xx:xx
+ * @note
+ * The data must be packed in network byte order.
+ */
+typedef struct
+{
+ UINT8 macAddress[IX_IEEE803_MAC_ADDRESS_SIZE]; /**< MAC address */
+} IxEthAccMacAddr;
+
+/**
+ * @ingroup IxEthAcc
+ * @def IX_ETH_ACC_NUM_TX_PRIORITIES
+ * @brief Definition of the number of transmit priorities
+ *
+ */
+#define IX_ETH_ACC_NUM_TX_PRIORITIES (8)
+
+/**
+ * @ingroup IxEthAcc
+ * @enum IxEthAccTxPriority
+ * @brief Definition of the relative priority used to transmit a frame
+ *
+ */
+typedef enum
+{
+ IX_ETH_ACC_TX_PRIORITY_0 = 0, /**<Lowest Priority submission */
+ IX_ETH_ACC_TX_PRIORITY_1 = 1, /**<submission prority of 1 (0 is lowest)*/
+ IX_ETH_ACC_TX_PRIORITY_2 = 2, /**<submission prority of 2 (0 is lowest)*/
+ IX_ETH_ACC_TX_PRIORITY_3 = 3, /**<submission prority of 3 (0 is lowest)*/
+ IX_ETH_ACC_TX_PRIORITY_4 = 4, /**<submission prority of 4 (0 is lowest)*/
+ IX_ETH_ACC_TX_PRIORITY_5 = 5, /**<submission prority of 5 (0 is lowest)*/
+ IX_ETH_ACC_TX_PRIORITY_6 = 6, /**<submission prority of 6 (0 is lowest)*/
+ IX_ETH_ACC_TX_PRIORITY_7 = 7, /**<Highest priority submission */
+
+ IX_ETH_ACC_TX_DEFAULT_PRIORITY = IX_ETH_ACC_TX_PRIORITY_0 /**< By default send all
+ packets with lowest priority */
+} IxEthAccTxPriority;
+
+/**
+ * @ingroup IxEthAcc
+ * @enum IxEthAccRxFrameType
+ * @brief Identify the type of a frame.
+ *
+ * @sa IX_ETHACC_NE_FLAGS
+ * @sa IX_ETHACC_NE_LINKMASK
+ */
+typedef enum
+{
+ IX_ETHACC_RX_LLCTYPE = 0x00, /**< 802.3 - 8802, with LLC/SNAP */
+ IX_ETHACC_RX_ETHTYPE = 0x10, /**< 802.3 (Ethernet) without LLC/SNAP */
+ IX_ETHACC_RX_STATYPE = 0x20, /**< 802.11, AP <=> STA */
+ IX_ETHACC_RX_APTYPE = 0x30 /**< 802.11, AP <=> AP */
+} IxEthAccRxFrameType;
+
+/**
+ * @ingroup IxEthAcc
+ * @enum IxEthAccDuplexMode
+ * @brief Definition to provision the duplex mode of the MAC.
+ *
+ */
+typedef enum
+{
+ IX_ETH_ACC_FULL_DUPLEX, /**< Full duplex operation of the MAC */
+ IX_ETH_ACC_HALF_DUPLEX /**< Half duplex operation of the MAC */
+} IxEthAccDuplexMode;
+
+
+/**
+ * @ingroup IxEthAcc
+ * @struct IxEthAccNe
+ * @brief Definition of service-specific informations.
+ *
+ * This structure defines the Ethernet service-specific informations
+ * and enable QoS and VLAN features.
+ */
+typedef struct
+{
+ UINT32 ixReserved_next; /**< reserved for chaining */
+ UINT32 ixReserved_lengths; /**< reserved for buffer lengths */
+ UINT32 ixReserved_data; /**< reserved for buffer pointer */
+ UINT8 ixDestinationPortId; /**< Destination portId for this packet, if known by NPE */
+ UINT8 ixSourcePortId; /**< Source portId for this packet */
+ UINT16 ixFlags; /**< BitField of option for this frame */
+ UINT8 ixQoS; /**< QoS class of the frame */
+ UINT8 ixReserved; /**< reserved */
+ UINT16 ixVlanTCI; /**< Vlan TCI */
+ UINT8 ixDestMac[IX_IEEE803_MAC_ADDRESS_SIZE]; /**< Destination MAC address */
+ UINT8 ixSourceMac[IX_IEEE803_MAC_ADDRESS_SIZE]; /**< Source MAC address */
+} IxEthAccNe;
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @def IX_ETHACC_NE_PORT_UNKNOWN
+ *
+ * @brief Contents of the field @a IX_ETHACC_NE_DESTPORTID when no
+ * destination port can be found by the NPE for this frame.
+ *
+ */
+#define IX_ETHACC_NE_PORT_UNKNOWN (0xff)
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @def IX_ETHACC_NE_DESTMAC
+ *
+ * @brief The location of the destination MAC address in the Mbuf header.
+ *
+ */
+#define IX_ETHACC_NE_DESTMAC(mBufPtr) ((IxEthAccNe *)&((mBufPtr)->ix_ne))->ixDestMac
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @def IX_ETHACC_NE_SOURCEMAC
+ *
+ * @brief The location of the source MAC address in the Mbuf header.
+ *
+ */
+#define IX_ETHACC_NE_SOURCEMAC(mBufPtr) ((IxEthAccNe *)&((mBufPtr)->ix_ne))->ixSourceMac
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @def IX_ETHACC_NE_VLANTCI
+ *
+ * @brief The VLAN Tag Control Information associated with this frame
+ *
+ * The VLAN Tag Control Information associated with this frame. On Rx
+ * path, this field is extracted from the packet header.
+ * On Tx path, the value of this field is inserted in the frame when
+ * the port is configured to insert or replace vlan tags in the
+ * egress frames.
+ *
+ * @sa IX_ETHACC_NE_FLAGS
+ */
+#define IX_ETHACC_NE_VLANTCI(mBufPtr) ((IxEthAccNe *)&((mBufPtr)->ix_ne))->ixVlanTCI
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @def IX_ETHACC_NE_SOURCEPORTID
+ *
+ * @brief The port where this frame came from.
+ *
+ * The port where this frame came from. This field is set on receive
+ * with the port information. This field is ignored on Transmit path.
+ */
+#define IX_ETHACC_NE_SOURCEPORTID(mBufPtr) ((IxEthAccNe *)&((mBufPtr)->ix_ne))->ixSourcePortId
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @def IX_ETHACC_NE_DESTPORTID
+ *
+ * @brief The destination port where this frame should be sent.
+ *
+ * The destination port where this frame should be sent.
+ *
+ * @li In the transmit direction, this field contains the destination port
+ * and is ignored unless @a IX_ETHACC_NE_FLAG_DST is set.
+ *
+ * @li In the receive direction, this field contains the port where the
+ * destination MAC addresses has been learned. If the destination
+ * MAC address is unknown, then this value is set to the reserved value
+ * @a IX_ETHACC_NE_PORT_UNKNOWN
+ *
+ */
+#define IX_ETHACC_NE_DESTPORTID(mBufPtr) ((IxEthAccNe *)&((mBufPtr)->ix_ne))->ixDestinationPortId
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @def IX_ETHACC_NE_QOS
+ *
+ * @brief QualityOfService class (QoS) for this received frame.
+ *
+ */
+#define IX_ETHACC_NE_QOS(mBufPtr) ((IxEthAccNe *)&((mBufPtr)->ix_ne))->ixQoS
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @def IX_ETHACC_NE_FLAGS
+ *
+ * @brief Bit Mask of the different flags associated with a frame
+ *
+ * The flags are the bit-oring combination
+ * of the following different fields :
+ *
+ * @li IP flag (Rx @a IX_ETHACC_NE_IPMASK)
+ * @li Spanning Tree flag (Rx @a IX_ETHACC_NE_STMASK)
+ * @li Link layer type (Rx and Tx @a IX_ETHACC_NE_LINKMASK)
+ * @li VLAN Tagged Frame (Rx @a IX_ETHACC_NE_VLANMASK)
+ * @li New source MAC address (Rx @a IX_ETHACC_NE_NEWSRCMASK)
+ * @li Multicast flag (Rx @a IX_ETHACC_NE_MCASTMASK)
+ * @li Broadcast flag (Rx @a IX_ETHACC_NE_BCASTMASK)
+ * @li Destination port flag (Tx @a IX_ETHACC_NE_PORTMASK)
+ * @li Tag/Untag Tx frame (Tx @a IX_ETHACC_NE_TAGMODEMASK)
+ * @li Overwrite destination port (Tx @a IX_ETHACC_NE_PORTOVERMASK)
+ * @li Filtered frame (Rx @a IX_ETHACC_NE_STMASK)
+ * @li VLAN Enabled (Rx and Tx @a IX_ETHACC_NE_VLANENABLEMASK)
+ */
+#define IX_ETHACC_NE_FLAGS(mBufPtr) ((IxEthAccNe *)&((mBufPtr)->ix_ne))->ixFlags
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @def IX_ETHACC_NE_BCASTMASK
+ *
+ * @brief This mask defines if a received frame is a broadcast frame.
+ *
+ * This mask defines if a received frame is a broadcast frame.
+ * The BCAST flag is set when the destination MAC address of
+ * a frame is broadcast.
+ *
+ * @sa IX_ETHACC_NE_FLAGS
+ *
+ */
+#define IX_ETHACC_NE_BCASTMASK (0x1)
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @def IX_ETHACC_NE_MCASTMASK
+ *
+ * @brief This mask defines if a received frame is a multicast frame.
+ *
+ * This mask defines if a received frame is a multicast frame.
+ * The MCAST flag is set when the destination MAC address of
+ * a frame is multicast.
+ *
+ * @sa IX_ETHACC_NE_FLAGS
+ *
+ */
+#define IX_ETHACC_NE_MCASTMASK (0x1 << 1)
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @def IX_ETHACC_NE_IPMASK
+ *
+ * @brief This mask defines if a received frame is a IP frame.
+ *
+ * This mask applies to @a IX_ETHACC_NE_FLAGS and defines if a received
+ * frame is a IP frame. The IP flag is set on Rx direction, depending on
+ * the frame contents. The flag is set when the length/type field of a
+ * received frame is 0x8000.
+ *
+ * @sa IX_ETHACC_NE_FLAGS
+ *
+ */
+#define IX_ETHACC_NE_IPMASK (0x1 << 2)
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @def IX_ETHACC_NE_VLANMASK
+ *
+ * @brief This mask defines if a received frame is VLAN tagged.
+ *
+ * This mask defines if a received frame is VLAN tagged.
+ * When set, the Rx frame is VLAN-tagged and the tag value
+ * is available thru @a IX_ETHACC_NE_VLANID.
+ * Note that when sending frames which are already tagged
+ * this flag should be set, to avoid inserting another VLAN tag.
+ *
+ * @sa IX_ETHACC_NE_FLAGS
+ * @sa IX_ETHACC_NE_VLANID
+ *
+ */
+#define IX_ETHACC_NE_VLANMASK (0x1 << 3)
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @def IX_ETHACC_NE_LINKMASK
+ *
+ * @brief This mask is the link layer protocol indicator
+ *
+ * This mask applies to @a IX_ETHACC_NE_FLAGS.
+ * It reflects the state of a frame as it exits an NPE on the Rx path
+ * or enters an NPE on the Tx path. Its values are as follows:
+ * @li 0x00 - IEEE802.3 - 8802 (Rx) / IEEE802.3 - 8802 (Tx)
+ * @li 0x01 - IEEE802.3 - Ethernet (Rx) / IEEE802.3 - Ethernet (Tx)
+ * @li 0x02 - IEEE802.11 AP -> STA (Rx) / IEEE802.11 STA -> AP (Tx)
+ * @li 0x03 - IEEE802.11 AP -> AP (Rx) / IEEE802.11 AP->AP (Tx)
+ *
+ * @sa IX_ETHACC_NE_FLAGS
+ *
+ */
+#define IX_ETHACC_NE_LINKMASK (0x3 << 4)
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @def IX_ETHACC_NE_STMASK
+ *
+ * @brief This mask defines if a received frame is a Spanning Tree frame.
+ *
+ * This mask applies to @a IX_ETHACC_NE_FLAGS.
+ * On rx direction, it defines if a received if frame is a Spanning Tree frame.
+ * Setting this fkag on transmit direction overrides the port settings
+ * regarding the VLAN options and
+ *
+ * @sa IX_ETHACC_NE_FLAGS
+ *
+ */
+#define IX_ETHACC_NE_STMASK (0x1 << 6)
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @def IX_ETHACC_NE_FILTERMASK
+ *
+ * @brief This bit indicates whether a frame has been filtered by the Rx service.
+ *
+ * This mask applies to @a IX_ETHACC_NE_FLAGS.
+ * Certain frames, which should normally be fully filtered by the NPE to due
+ * the destination MAC address being on the same segment as the Rx port are
+ * still forwarded to the XScale (although the payload is invalid) in order
+ * to learn the MAC address of the transmitting station, if this is unknown.
+ * Normally EthAcc will filter and recycle these framess internally and no
+ * frames with the FILTER bit set will be received by the client.
+ *
+ * @sa IX_ETHACC_NE_FLAGS
+ *
+ */
+#define IX_ETHACC_NE_FILTERMASK (0x1 << 7)
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @def IX_ETHACC_NE_PORTMASK
+ *
+ * @brief This mask defines the rule to transmit a frame
+ *
+ * This mask defines the rule to transmit a frame. When set, a frame
+ * is transmitted to the destination port as set by the macro
+ * @a IX_ETHACC_NE_DESTPORTID. If not set, the destination port
+ * is searched using the destination MAC address.
+ *
+ * @note This flag is meaningful only for multiport Network Engines.
+ *
+ * @sa IX_ETHACC_NE_FLAGS
+ * @sa IX_ETHACC_NE_DESTPORTID
+ *
+ */
+#define IX_ETHACC_NE_PORTOVERMASK (0x1 << 8)
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @def IX_ETHACC_NE_TAGMODEMASK
+ *
+ * @brief This mask defines the tagging rules to apply to a transmit frame.
+ *
+ * This mask defines the tagging rules to apply to a transmit frame
+ * regardless of the default setting for a port. When used together
+ * with @a IX_ETHACC_NE_TAGOVERMASK and when set, the
+ * frame will be tagged prior to transmission. When not set,
+ * the frame will be untagged prior to transmission. This is accomplished
+ * irrespective of the Egress tagging rules, constituting a per-frame override.
+ *
+ * @sa IX_ETHACC_NE_FLAGS
+ * @sa IX_ETHACC_NE_TAGOVERMASK
+ *
+ */
+#define IX_ETHACC_NE_TAGMODEMASK (0x1 << 9)
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @def IX_ETHACC_NE_TAGOVERMASK
+ *
+ * @brief This mask defines the rule to transmit a frame
+ *
+ * This mask defines the rule to transmit a frame. When set, the
+ * default transmit rules of a port are overriden.
+ * When not set, the default rules as set by @ref IxEthDB should apply.
+ *
+ * @sa IX_ETHACC_NE_FLAGS
+ * @sa IX_ETHACC_NE_TAGMODEMASK
+ *
+ */
+#define IX_ETHACC_NE_TAGOVERMASK (0x1 << 10)
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @def IX_ETHACC_NE_VLANENABLEMASK
+ *
+ * @brief This mask defines if a frame is a VLAN frame or not
+ *
+ * When set, frames undergo normal VLAN processing on the Tx path
+ * (membership filtering, tagging, tag removal etc). If this flag is
+ * not set, the frame is considered to be a regular non-VLAN frame
+ * and no VLAN processing will be performed.
+ *
+ * Note that VLAN-enabled NPE images will always set this flag in all
+ * Rx frames, and images which are not VLAN enabled will clear this
+ * flag for all received frames.
+ *
+ * @sa IX_ETHACC_NE_FLAGS
+ *
+ */
+#define IX_ETHACC_NE_VLANENABLEMASK (0x1 << 14)
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @def IX_ETHACC_NE_NEWSRCMASK
+ *
+ * @brief This mask defines if a received frame has been learned.
+ *
+ * This mask defines if the source MAC address of a frame is
+ * already known. If the bit is set, the source MAC address was
+ * unknown to the NPE at the time the frame was received.
+ *
+ * @sa IX_ETHACC_NE_FLAGS
+ *
+ */
+#define IX_ETHACC_NE_NEWSRCMASK (0x1 << 15)
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @brief This defines the recommanded minimum size of MBUF's submitted
+ * to the frame receive service.
+ *
+ */
+#define IX_ETHACC_RX_MBUF_MIN_SIZE (2048)
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @brief This defines the highest MII address of any attached PHYs
+ *
+ * The maximum number for PHY address is 31, add on for range checking.
+ *
+ */
+#define IXP425_ETH_ACC_MII_MAX_ADDR 32
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @fn ixEthAccInit(void)
+ *
+ * @brief Initializes the IXP400 Ethernet Access Service.
+ *
+ * @li Reentrant - no
+ * @li ISR Callable - no
+ *
+ * This should be called once per module initialization.
+ * @pre
+ * The NPE must first be downloaded with the required microcode which supports all
+ * required features.
+ *
+ * @return IxEthAccStatus
+ * @li @a IX_ETH_ACC_SUCCESS
+ * @li @a IX_ETH_ACC_FAIL : Service has failed to initialize.
+ *
+ * <hr>
+ */
+PUBLIC IxEthAccStatus ixEthAccInit(void);
+
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @fn ixEthAccUnload(void)
+ *
+ * @brief Unload the Ethernet Access Service.
+ *
+ * @li Reentrant - no
+ * @li ISR Callable - no
+ *
+ * @return void
+ *
+ * <hr>
+ */
+PUBLIC void ixEthAccUnload(void);
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @fn ixEthAccPortInit( IxEthAccPortId portId)
+ *
+ * @brief Initializes an NPE/Ethernet MAC Port.
+ *
+ * The NPE/Ethernet port initialisation includes the following steps
+ * @li Initialize the NPE/Ethernet MAC hardware.
+ * @li Verify NPE downloaded and operational.
+ * @li The NPE shall be available for usage once this API returns.
+ * @li Verify that the Ethernet port is present before initializing
+ *
+ * @li Reentrant - no
+ * @li ISR Callable - no
+ *
+ * This should be called once per mac device.
+ * The NPE/MAC shall be in disabled state after init.
+ *
+ * @pre
+ * The component must be initialized via @a ixEthAccInit
+ * The NPE must first be downloaded with the required microcode which supports all
+ * required features.
+ *
+ * Dependant on Services: (Must be initialized before using this service may be initialized)
+ * ixNPEmh - NPE Message handling service.
+ * ixQmgr - Queue Manager component.
+ *
+ * @param portId @ref IxEthAccPortId [in]
+ *
+ * @return IxEthAccStatus
+ * @li @a IX_ETH_ACC_SUCCESS: if the ethernet port is not present, a warning is issued.
+ * @li @a IX_ETH_ACC_FAIL : The NPE processor has failed to initialize.
+ * @li @a IX_ETH_ACC_INVALID_PORT : portId is invalid.
+ *
+ * <hr>
+ */
+PUBLIC IxEthAccStatus ixEthAccPortInit(IxEthAccPortId portId);
+
+
+/*************************************************************************
+
+ ##### ## ##### ## ##### ## ##### # #
+ # # # # # # # # # # # # # #
+ # # # # # # # # # # # # ######
+ # # ###### # ###### ##### ###### # # #
+ # # # # # # # # # # # # #
+ ##### # # # # # # # # # # #
+
+*************************************************************************/
+
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @fn ixEthAccPortTxFrameSubmit(
+ IxEthAccPortId portId,
+ IX_OSAL_MBUF *buffer,
+ IxEthAccTxPriority priority)
+ *
+ * @brief This function shall be used to submit MBUFs buffers for transmission on a particular MAC device.
+ *
+ * When the frame is transmitted, the buffer shall be returned thru the
+ * callback @a IxEthAccPortTxDoneCallback.
+ *
+ * In case of over-submitting, the order of the frames on the
+ * network may be modified.
+ *
+ * Buffers shall be not queued for transmission if the port is disabled.
+ * The port can be enabled using @a ixEthAccPortEnable
+ *
+ *
+ * @li Reentrant - yes
+ * @li ISR Callable - yes
+ *
+ *
+ * @pre
+ * @a ixEthAccPortTxDoneCallbackRegister must be called to register a function to allow this service to
+ * return the buffer to the calling service.
+ *
+ * @note
+ * If the buffer submit fails for any reason the user has retained ownership of the buffer.
+ *
+ * @param portId @ref IxEthAccPortId [in] - MAC port ID to transmit Ethernet frame on.
+ * @param buffer @ref IX_OSAL_MBUF [in] - pointer to an MBUF formatted buffer. Chained buffers are supported for transmission.
+ * Chained packets are not supported and the field IX_OSAL_MBUF_NEXT_PKT_IN_CHAIN_PTR is ignored.
+ * @param priority @ref IxEthAccTxPriority [in]
+ *
+ * @return IxEthAccStatus
+ * @li @a IX_ETH_ACC_SUCCESS
+ * @li @a IX_ETH_ACC_FAIL : Failed to queue frame for transmission.
+ * @li @a IX_ETH_ACC_INVALID_PORT : portId is invalid.
+ * @li @a IX_ETH_ACC_PORT_UNINITIALIZED : portId is un-initialized
+ *
+ * <hr>
+ */
+
+PUBLIC IxEthAccStatus ixEthAccPortTxFrameSubmit(
+ IxEthAccPortId portId,
+ IX_OSAL_MBUF *buffer,
+ IxEthAccTxPriority priority);
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @brief Function prototype for Ethernet Tx Buffer Done callback. Registered
+ * via @a ixEthAccTxBufferDoneCallbackRegister
+ *
+ * This function is called once the previously submitted buffer is no longer required by this service.
+ * It may be returned upon successful transmission of the frame or during the shutdown of
+ * the port prior to the transmission of a queued frame.
+ * The calling of this registered function is not a guarantee of successful transmission of the buffer.
+ *
+ *
+ * @li Reentrant - yes , The user provided function should be reentrant.
+ * @li ISR Callable - yes , The user provided function must be callable from an ISR.
+ *
+ *
+ * <b>Calling Context </b>:
+ * @par
+ * This callback is called in the context of the queue manager dispatch loop @a ixQmgrgrDispatcherLoopRun
+ * within the @ref IxQMgrAPI component. The calling context may be from interrupt or high priority thread.
+ * The decision is system specific.
+ *
+ * @param callbackTag UINT32 [in] - This tag is that provided when the callback was registered for a particular MAC
+ * via @a ixEthAccPortTxDoneCallbackRegister. It allows the same callback to be used for multiple MACs.
+ * @param mbuf @ref IX_OSAL_MBUF [in] - Pointer to the Tx mbuf descriptor.
+ *
+ * @return void
+ *
+ * @note
+ * The field IX_OSAL_MBUF_NEXT_PKT_IN_CHAIN_PTR is modified by the access layer and reset to NULL.
+ *
+ * <hr>
+ */
+typedef void (*IxEthAccPortTxDoneCallback) ( UINT32 callbackTag, IX_OSAL_MBUF *buffer );
+
+
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @fn ixEthAccPortTxDoneCallbackRegister( IxEthAccPortId portId,
+ IxEthAccPortTxDoneCallback txCallbackFn,
+ UINT32 callbackTag)
+ *
+ * @brief Register a callback function to allow
+ * the transmitted buffers to return to the user.
+ *
+ * This function registers the transmit buffer done function callback for a particular port.
+ *
+ * The registered callback function is called once the previously submitted buffer is no longer required by this service.
+ * It may be returned upon successful transmission of the frame or shutdown of port prior to submission.
+ * The calling of this registered function is not a guarantee of successful transmission of the buffer.
+ *
+ * If called several times the latest callback shall be registered for a particular port.
+ *
+ * @li Reentrant - yes
+ * @li ISR Callable - yes
+ *
+ * @pre
+ * The port must be initialized via @a ixEthAccPortInit
+ *
+ *
+ * @param portId @ref IxEthAccPortId [in] - Register callback for a particular MAC device.
+ * @param txCallbackFn @ref IxEthAccPortTxDoneCallback [in] - Function to be called to return transmit buffers to the user.
+ * @param callbackTag UINT32 [in] - This tag shall be provided to the callback function.
+ *
+ * @return IxEthAccStatus
+ * @li @a IX_ETH_ACC_SUCCESS
+ * @li @a IX_ETH_ACC_INVALID_PORT : portId is invalid.
+ * @li @a IX_ETH_ACC_PORT_UNINITIALIZED : portId is un-initialized
+ * @li @a IX_ETH_ACC_INVALID_ARG : An argument other than portId is invalid.
+ *
+ * <hr>
+ */
+PUBLIC IxEthAccStatus
+ixEthAccPortTxDoneCallbackRegister(IxEthAccPortId portId,
+ IxEthAccPortTxDoneCallback txCallbackFn,
+ UINT32 callbackTag);
+
+
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @brief Function prototype for Ethernet Frame Rx callback. Registered via @a ixEthAccPortRxCallbackRegister
+ *
+ * It is the responsibility of the user function to free any MBUF's which it receives.
+ *
+ * @li Reentrant - yes , The user provided function should be reentrant.
+ * @li ISR Callable - yes , The user provided function must be callable from an ISR.
+ * @par
+ *
+ * This function dispatches frames to the user level
+ * via the provided function. The invocation shall be made for each
+ * frame dequeued from the Ethernet QM queue. The user is required to free any MBUF's
+ * supplied via this callback. In addition the registered callback must free up MBUF's
+ * from the receive free queue when the port is disabled
+ *
+ * If called several times the latest callback shall be registered for a particular port.
+ *
+ * <b>Calling Context </b>:
+ * @par
+ * This callback is called in the context of the queue manager dispatch loop @a ixQmgrgrDispatcherLoopRun
+ * within the @ref IxQMgrAPI component. The calling context may be from interrupt or high priority thread.
+ * The decision is system specific.
+ *
+ *
+ * @param callbackTag UINT32 [in] - This tag is that provided when the callback was registered for a particular MAC
+ * via @a ixEthAccPortRxCallbackRegister. It allows the same callback to be used for multiple MACs.
+ * @param mbuf @ref IX_OSAL_MBUF [in] - Pointer to the Rx mbuf header. Mbufs may be chained if
+ * the frame length is greater than the supplied mbuf length.
+ * @param reserved [in] - deprecated parameter The information is passed
+ * thru the IxEthAccNe header destination port ID field
+ * (@sa IX_ETHACC_NE_DESTPORTID). For backward
+ * compatibility,the value is equal to IX_ETH_DB_UNKNOWN_PORT (0xff).
+ *
+ * @return void
+ *
+ * @note
+ * Buffers may not be filled up to the length supplied in
+ * @a ixEthAccPortRxFreeReplenish(). The firmware fills
+ * them to the previous 64 bytes boundary. The user has to be aware
+ * that the length of the received mbufs may be smaller than the length
+ * of the supplied mbufs.
+ * The mbuf header contains the following modified field
+ * @li @a IX_OSAL_MBUF_PKT_LEN is set in the header of the first mbuf and indicates
+ * the total frame size
+ * @li @a IX_OSAL_MBUF_MLEN is set each mbuf header and indicates the payload length
+ * @li @a IX_OSAL_MBUF_NEXT_BUFFER_IN_PKT_PTR contains a pointer to the next
+ * mbuf, or NULL at the end of a chain.
+ * @li @a IX_OSAL_MBUF_NEXT_PKT_IN_CHAIN_PTR is modified. Its value is reset to NULL
+ * @li @a IX_OSAL_MBUF_FLAGS contains the bit 4 set for a broadcast packet and the bit 5
+ * set for a multicast packet. Other bits are unmodified.
+ *
+ * <hr>
+ */
+typedef void (*IxEthAccPortRxCallback) (UINT32 callbackTag, IX_OSAL_MBUF *buffer, UINT32 reserved);
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @brief Function prototype for Ethernet Frame Rx callback. Registered via @a ixEthAccPortMultiBufferRxCallbackRegister
+ *
+ * It is the responsibility of the user function to free any MBUF's which it receives.
+ *
+ * @li Reentrant - yes , The user provided function should be reentrant.
+ * @li ISR Callable - yes , The user provided function must be callable from an ISR.
+ * @par
+ *
+ * This function dispatches many frames to the user level
+ * via the provided function. The invocation shall be made for multiple frames
+ * dequeued from the Ethernet QM queue. The user is required to free any MBUF's
+ * supplied via this callback. In addition the registered callback must free up MBUF's
+ * from the receive free queue when the port is disabled
+ *
+ * If called several times the latest callback shall be registered for a particular port.
+ *
+ * <b>Calling Context </b>:
+ * @par
+ * This callback is called in the context of the queue manager dispatch loop @a ixQmgrDispatcherLoopRun
+ * within the @ref IxQMgrAPI component. The calling context may be from interrupt or high priority thread.
+ * The decision is system specific.
+ *
+ *
+ * @param callbackTag - This tag is that provided when the callback was registered for a particular MAC
+ * via @a ixEthAccPortMultiBufferRxCallbackRegister. It allows the same callback to be used for multiple MACs.
+ * @param mbuf - Pointer to an array of Rx mbuf headers. Mbufs
+ * may be chained if
+ * the frame length is greater than the supplied mbuf length.
+ * The end of the array contains a zeroed entry (NULL pointer).
+ *
+ * @return void
+ *
+ * @note The mbufs passed to this callback have the same structure than the
+ * buffers passed to @a IxEthAccPortRxCallback interfac.
+ *
+ * @note The usage of this callback is exclusive with the usage of
+ * @a ixEthAccPortRxCallbackRegister and @a IxEthAccPortRxCallback
+ *
+ * @sa ixEthAccPortMultiBufferRxCallbackRegister
+ * @sa IxEthAccPortMultiBufferRxCallback
+ * @sa ixEthAccPortRxCallbackRegister
+ * @sa IxEthAccPortRxCallback
+ * <hr>
+ */
+
+typedef void (*IxEthAccPortMultiBufferRxCallback) (UINT32 callbackTag, IX_OSAL_MBUF **buffer);
+
+
+
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @fn ixEthAccPortRxCallbackRegister( IxEthAccPortId portId, IxEthAccPortRxCallback rxCallbackFn, UINT32 callbackTag)
+ *
+ * @brief Register a callback function to allow
+ * the reception of frames.
+ *
+ * The registered callback function is called once a frame is received by this service.
+ *
+ * If called several times the latest callback shall be registered for a particular port.
+ *
+ *
+ * @li Reentrant - yes
+ * @li ISR Callable - yes
+ *
+ *
+ * @param portId @ref IxEthAccPortId [in] - Register callback for a particular MAC device.
+ * @param rxCallbackFn @ref IxEthAccPortRxCallback [in] - Function to be called when Ethernet frames are availble.
+ * @param callbackTag UINT32 [in] - This tag shall be provided to the callback function.
+ *
+ * @return IxEthAccStatus
+ * @li @a IX_ETH_ACC_SUCCESS
+ * @li @a IX_ETH_ACC_INVALID_PORT : portId is invalid.
+ * @li @a IX_ETH_ACC_PORT_UNINITIALIZED : portId is un-initialized
+ * @li @a IX_ETH_ACC_INVALID_ARG : An argument other than portId is invalid.
+ *
+ * <hr>
+ */
+PUBLIC IxEthAccStatus
+ixEthAccPortRxCallbackRegister(IxEthAccPortId portId,
+ IxEthAccPortRxCallback rxCallbackFn,
+ UINT32 callbackTag);
+
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @fn ixEthAccPortMultiBufferRxCallbackRegister( IxEthAccPortId portId, IxEthAccPortMultiBufferRxCallback rxCallbackFn, UINT32 callbackTag)
+ *
+ * @brief Register a callback function to allow
+ * the reception of frames.
+ *
+ * The registered callback function is called once a frame is
+ * received by this service. If many frames are already received,
+ * the function is called once.
+ *
+ * If called several times the latest callback shall be registered for a particular port.
+ *
+ * @li Reentrant - yes
+ * @li ISR Callable - yes
+ *
+ *
+ * @param portId - Register callback for a particular MAC device.
+ * @param rxCallbackFn - @a IxEthAccMultiBufferRxCallbackFn - Function to be called when Ethernet frames are availble.
+ * @param callbackTag - This tag shall be provided to the callback function.
+ *
+ * @return IxEthAccStatus
+ * @li @a IX_ETH_ACC_SUCCESS
+ * @li @a IX_ETH_ACC_INVALID_PORT : portId is invalid.
+ * @li @a IX_ETH_ACC_PORT_UNINITIALIZED : portId is un-initialized
+ * @li @a IX_ETH_ACC_INVALID_ARG : An argument other than portId is invalid.
+ *
+ * @sa ixEthAccPortMultiBufferRxCallbackRegister
+ * @sa IxEthAccPortMultiBufferRxCallback
+ * @sa ixEthAccPortRxCallbackRegister
+ * @sa IxEthAccPortRxCallback
+ * <hr>
+ */
+PUBLIC IxEthAccStatus
+ixEthAccPortMultiBufferRxCallbackRegister(IxEthAccPortId portId,
+ IxEthAccPortMultiBufferRxCallback rxCallbackFn,
+ UINT32 callbackTag);
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @fn ixEthAccPortRxFreeReplenish( IxEthAccPortId portId, IX_OSAL_MBUF *buffer)
+ *
+ * @brief This function provides buffers for the Ethernet receive path.
+ *
+ * This component does not have a buffer management mechanisms built in. All Rx buffers must be supplied to it
+ * via this interface.
+ *
+ * @li Reentrant - yes
+ * @li ISR Callable - yes
+ *
+ * @param portId @ref IxEthAccPortId [in] - Provide buffers only to specific Rx MAC.
+ * @param buffer @ref IX_OSAL_MBUF [in] - Provide an MBUF to the Ethernet receive mechanism.
+ * Buffers size smaller than IX_ETHACC_RX_MBUF_MIN_SIZE may result in poor
+ * performances and excessive buffer chaining. Buffers
+ * larger than this size may be suitable for jumbo frames.
+ * Chained packets are not supported and the field IX_OSAL_MBUF_NEXT_PKT_IN_CHAIN_PTR must be NULL.
+ *
+ * @return IxEthAccStatus
+ * @li @a IX_ETH_ACC_SUCCESS
+ * @li @a IX_ETH_ACC_FAIL : Buffer has was not able to queue the
+ * buffer in the receive service.
+ * @li @a IX_ETH_ACC_FAIL : Buffer size is less than IX_ETHACC_RX_MBUF_MIN_SIZE
+ * @li @a IX_ETH_ACC_INVALID_PORT : portId is invalid.
+ * @li @a IX_ETH_ACC_PORT_UNINITIALIZED : portId is un-initialized
+ *
+ * @note
+ * If the buffer replenish operation fails it is the responsibility
+ * of the user to free the buffer.
+ *
+ * @note
+ * Sufficient buffers must be supplied to the component to maintain
+ * receive throughput and avoid rx buffer underflow conditions.
+ * To meet this goal, It is expected that the user preload the
+ * component with a sufficent number of buffers prior to enabling the
+ * NPE Ethernet receive path. The recommended minimum number of
+ * buffers is 8.
+ *
+ * @note
+ * For maximum performances, the mbuf size should be greater
+ * than the maximum frame size (Ethernet header, payload and FCS) + 64.
+ * Supplying smaller mbufs to the service results in mbuf
+ * chaining and degraded performances. The recommended size
+ * is @a IX_ETHACC_RX_MBUF_MIN_SIZE, which is
+ * enough to take care of 802.3 frames and "baby jumbo" frames without
+ * chaining, and "jumbo" frame within chaining.
+ *
+ * @note
+ * Buffers may not be filled up to their length. The firware fills
+ * them up to the previous 64 bytes boundary. The user has to be aware
+ * that the length of the received mbufs may be smaller than the length
+ * of the supplied mbufs.
+ *
+ * @warning This function checks the parameters if the NDEBUG
+ * flag is not defined. Turning on the argument checking (disabled by
+ * default) results in a lower EthAcc performance as this function
+ * is part of the data path.
+ *
+ * <hr>
+ */
+PUBLIC IxEthAccStatus
+ixEthAccPortRxFreeReplenish( IxEthAccPortId portId, IX_OSAL_MBUF *buffer);
+
+
+
+/***************************************************************
+
+ #### #### # # ##### ##### #### #
+ # # # # ## # # # # # # #
+ # # # # # # # # # # # #
+ # # # # # # # ##### # # #
+ # # # # # ## # # # # # #
+ #### #### # # # # # #### ######
+
+
+ ##### # ## # # ######
+ # # # # # ## # #
+ # # # # # # # # #####
+ ##### # ###### # # # #
+ # # # # # ## #
+ # ###### # # # # ######
+
+***************************************************************/
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @fn ixEthAccPortEnable(IxEthAccPortId portId)
+ *
+ * @brief This enables an Ethernet port for both Tx and Rx.
+ *
+ * @li Reentrant - yes
+ * @li ISR Callable - no
+ *
+ * @pre The port must first be initialized via @a ixEthAccPortInit and the MAC address
+ * must be set using @a ixEthAccUnicastMacAddressSet before enabling it
+ * The rx and Tx Done callbacks registration via @a
+ * ixEthAccPortTxDoneCallbackRegister amd @a ixEthAccPortRxCallbackRegister
+ * has to be done before enabling the traffic.
+ *
+ * @param portId @ref IxEthAccPortId [in] - Port id to act upon.
+ *
+ * @return IxEthAccStatus
+ * @li @a IX_ETH_ACC_SUCCESS
+ * @li @a IX_ETH_ACC_INVALID_PORT : portId is invalid.
+ * @li @a IX_ETH_ACC_PORT_UNINITIALIZED : portId is not initialized
+ * @li @a IX_ETH_ACC_MAC_UNINITIALIZED : port MAC address is not initialized
+ *
+ * <hr>
+ */
+PUBLIC IxEthAccStatus ixEthAccPortEnable(IxEthAccPortId portId);
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @fn ixEthAccPortDisable(IxEthAccPortId portId)
+ *
+ * @brief This disables an Ethernet port for both Tx and Rx.
+ *
+ * Free MBufs are returned to the user via the registered callback when the port is disabled
+ *
+ * @li Reentrant - yes
+ * @li ISR Callable - no
+ *
+ * @pre The port must be enabled with @a ixEthAccPortEnable, otherwise this
+ * function has no effect
+ *
+ * @param portId @ref IxEthAccPortId [in] - Port id to act upon.
+ *
+ * @return IxEthAccStatus
+ * @li @a IX_ETH_ACC_SUCCESS
+ * @li @a IX_ETH_ACC_INVALID_PORT : portId is invalid.
+ * @li @a IX_ETH_ACC_PORT_UNINITIALIZED : portId is not initialized
+ * @li @a IX_ETH_ACC_MAC_UNINITIALIZED : port MAC address is not initialized
+ *
+ * <hr>
+ */
+PUBLIC IxEthAccStatus ixEthAccPortDisable(IxEthAccPortId portId);
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @fn ixEthAccPortEnabledQuery(IxEthAccPortId portId, BOOL *enabled)
+ *
+ * @brief Get the enabled state of a port.
+ *
+ * @li Reentrant - yes
+ * @li ISR Callable - yes
+ *
+ * @pre The port must first be initialized via @a ixEthAccPortInit
+ *
+ * @param portId @ref IxEthAccPortId [in] - Port id to act upon.
+ * @param enabled BOOL [out] - location to store the state of the port
+ *
+ * @return IxEthAccStatus
+ * @li @a IX_ETH_ACC_SUCCESS
+ * @li @a IX_ETH_ACC_INVALID_PORT : portId is invalid
+ *
+ * <hr>
+ */
+PUBLIC IxEthAccStatus
+ixEthAccPortEnabledQuery(IxEthAccPortId portId, BOOL *enabled);
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @fn ixEthAccPortPromiscuousModeClear(IxEthAccPortId portId)
+ *
+ * @brief Put the Ethernet MAC device in non-promiscuous mode.
+ *
+ * In non-promiscuous mode the MAC filters all frames other than
+ * destination MAC address which matches the following criteria:
+ * @li Unicast address provisioned via @a ixEthAccUnicastMacAddressSet
+ * @li All broadcast frames.
+ * @li Multicast addresses provisioned via @a ixEthAccMulticastAddressJoin
+ *
+ * Other functions modify the MAC filtering
+ *
+ * @li @a ixEthAccPortMulticastAddressJoinAll() - all multicast
+ * frames are forwarded to the application
+ * @li @a ixEthAccPortMulticastAddressLeaveAll() - rollback the
+ * effects of @a ixEthAccPortMulticastAddressJoinAll()
+ * @li @a ixEthAccPortMulticastAddressLeave() - unprovision a new
+ * filtering address
+ * @li @a ixEthAccPortMulticastAddressJoin() - provision a new
+ * filtering address
+ * @li @a ixEthAccPortPromiscuousModeSet() - all frames are
+ * forwarded to the application regardless of the multicast
+ * address provisioned
+ * @li @a ixEthAccPortPromiscuousModeClear() - frames are forwarded
+ * to the application following the multicast address provisioned
+ *
+ * In all cases, unicast and broadcast addresses are forwarded to
+ * the application.
+ *
+ * @li Reentrant - yes
+ * @li ISR Callable - no
+ *
+ * @sa ixEthAccPortPromiscuousModeSet
+ *
+ * @param portId @ref IxEthAccPortId [in] - Ethernet port id.
+ *
+ * @return IxEthAccStatus
+ * @li @a IX_ETH_ACC_SUCCESS
+ * @li @a IX_ETH_ACC_INVALID_PORT : portId is invalid.
+ * @li @a IX_ETH_ACC_PORT_UNINITIALIZED : portId is un-initialized
+ *
+ * <hr>
+ */
+PUBLIC IxEthAccStatus ixEthAccPortPromiscuousModeClear(IxEthAccPortId portId);
+
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @fn ixEthAccPortPromiscuousModeSet(IxEthAccPortId portId)
+ *
+ * @brief Put the MAC device in promiscuous mode.
+ *
+ * If the device is in promiscuous mode then all all received frames shall be forwared
+ * to the NPE for processing.
+ *
+ * Other functions modify the MAC filtering
+ *
+ * @li @a ixEthAccPortMulticastAddressJoinAll() - all multicast
+ * frames are forwarded to the application
+ * @li @a ixEthAccPortMulticastAddressLeaveAll() - rollback the
+ * effects of @a ixEthAccPortMulticastAddressJoinAll()
+ * @li @a ixEthAccPortMulticastAddressLeave() - unprovision a new
+ * filtering address
+ * @li @a ixEthAccPortMulticastAddressJoin() - provision a new
+ * filtering address
+ * @li @a ixEthAccPortPromiscuousModeSet() - all frames are
+ * forwarded to the application regardless of the multicast
+ * address provisioned
+ * @li @a ixEthAccPortPromiscuousModeClear() - frames are forwarded
+ * to the application following the multicast address provisioned
+ *
+ * In all cases, unicast and broadcast addresses are forwarded to
+ * the application.
+ *
+ * @li Reentrant - yes
+ * @li ISR Callable - no
+ *
+ * @sa ixEthAccPortPromiscuousModeClear
+ *
+ * @param portId @ref IxEthAccPortId [in] - Ethernet port id.
+ *
+ * @return IxEthAccStatus
+ * @li @a IX_ETH_ACC_SUCCESS
+ * @li @a IX_ETH_ACC_INVALID_PORT : portId is invalid.
+ * @li @a IX_ETH_ACC_PORT_UNINITIALIZED : portId is un-initialized
+ *
+ * <hr>
+ */
+PUBLIC IxEthAccStatus ixEthAccPortPromiscuousModeSet(IxEthAccPortId portId);
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @fn ixEthAccPortUnicastMacAddressSet( IxEthAccPortId portId,
+ IxEthAccMacAddr *macAddr)
+ *
+ * @brief Configure unicast MAC address for a particular port
+ *
+ *
+ * @li Reentrant - yes
+ * @li ISR Callable - no
+ *
+ * @param portId @ref IxEthAccPortId [in] - Ethernet port id.
+ * @param *macAddr @ref IxEthAccMacAddr [in] - Ethernet Mac address.
+ *
+ * @return IxEthAccStatus
+ * @li @a IX_ETH_ACC_SUCCESS
+ * @li @a IX_ETH_ACC_INVALID_PORT : portId is invalid.
+ * @li @a IX_ETH_ACC_PORT_UNINITIALIZED : portId is un-initialized
+ *
+ * <hr>
+ */
+PUBLIC IxEthAccStatus ixEthAccPortUnicastMacAddressSet(IxEthAccPortId portId,
+ IxEthAccMacAddr *macAddr);
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @fn ixEthAccPortUnicastMacAddressGet( IxEthAccPortId portId,
+ IxEthAccMacAddr *macAddr)
+ *
+ * @brief Get unicast MAC address for a particular MAC port
+ *
+ * @pre
+ * The MAC address must first be set via @a ixEthAccMacPromiscuousModeSet
+ * If the MAC address has not been set, the function returns a
+ * IX_ETH_ACC_MAC_UNINITIALIZED status
+ *
+ * @li Reentrant - yes
+ * @li ISR Callable - no
+ *
+ * @param portId @ref IxEthAccPortId [in] - Ethernet port id.
+ * @param *macAddr @ref IxEthAccMacAddr [out] - Ethernet MAC address.
+ *
+ * @return IxEthAccStatus
+ * @li @a IX_ETH_ACC_SUCCESS
+ * @li @a IX_ETH_ACC_INVALID_PORT : portId is invalid.
+ * @li @a IX_ETH_ACC_MAC_UNINITIALIZED : port MAC address is not initialized.
+ * @li @a IX_ETH_ACC_FAIL : macAddr is invalid.
+ *
+ * <hr>
+ */
+PUBLIC IxEthAccStatus
+ixEthAccPortUnicastMacAddressGet(IxEthAccPortId portId,
+ IxEthAccMacAddr *macAddr);
+
+
+
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @fn ixEthAccPortMulticastAddressJoin( IxEthAccPortId portId,
+ IxEthAccMacAddr *macAddr)
+ *
+ * @brief Add a multicast address to the MAC address table.
+ *
+ * @note
+ * Due to the operation of the Ethernet MAC multicast filtering mechanism, frames which do not
+ * have a multicast destination address which were provisioned via this API may be forwarded
+ * to the NPE's. This is a result of the hardware comparison algorithm used in the destination mac address logic
+ * within the Ethernet MAC.
+ *
+ * See Also: IXP425 hardware development manual.
+ *
+ * Other functions modify the MAC filtering
+ *
+ * @li @a ixEthAccPortMulticastAddressJoinAll() - all multicast
+ * frames are forwarded to the application
+ * @li @a ixEthAccPortMulticastAddressLeaveAll() - rollback the
+ * effects of @a ixEthAccPortMulticastAddressJoinAll()
+ * @li @a ixEthAccPortMulticastAddressLeave() - unprovision a new
+ * filtering address
+ * @li @a ixEthAccPortMulticastAddressJoin() - provision a new
+ * filtering address
+ * @li @a ixEthAccPortPromiscuousModeSet() - all frames are
+ * forwarded to the application regardless of the multicast
+ * address provisioned
+ * @li @a ixEthAccPortPromiscuousModeClear() - frames are forwarded
+ * to the application following the multicast address provisioned
+ *
+ * In all cases, unicast and broadcast addresses are forwarded to
+ * the application.
+ *
+ * @li Reentrant - yes
+ * @li ISR Callable - no
+ *
+ * @param portId @ref IxEthAccPortId [in] - Ethernet port id.
+ * @param *macAddr @ref IxEthAccMacAddr [in] - Ethernet Mac address.
+ *
+ * @return IxEthAccStatus
+ * @li @a IX_ETH_ACC_SUCCESS
+ * @li @a IX_ETH_ACC_FAIL : Error writing to the MAC registers
+ * @li @a IX_ETH_ACC_INVALID_PORT : portId is invalid.
+ * @li @a IX_ETH_ACC_PORT_UNINITIALIZED : portId is un-initialized
+ *
+ * <hr>
+ */
+PUBLIC IxEthAccStatus
+ixEthAccPortMulticastAddressJoin(IxEthAccPortId portId,
+ IxEthAccMacAddr *macAddr);
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @fn ixEthAccPortMulticastAddressJoinAll( IxEthAccPortId portId)
+ *
+ * @brief Filter all frames with multicast dest.
+ *
+ * This function clears the MAC address table, and then sets
+ * the MAC to forward ALL multicast frames to the NPE.
+ * Specifically, it forwards all frames whose destination address
+ * has the LSB of the highest byte set (01:00:00:00:00:00). This
+ * bit is commonly referred to as the "multicast bit".
+ * Broadcast frames will still be forwarded.
+ *
+ * Other functions modify the MAC filtering
+ *
+ * @li @a ixEthAccPortMulticastAddressJoinAll() - all multicast
+ * frames are forwarded to the application
+ * @li @a ixEthAccPortMulticastAddressLeaveAll() - rollback the
+ * effects of @a ixEthAccPortMulticastAddressJoinAll()
+ * @li @a ixEthAccPortMulticastAddressLeave() - unprovision a new
+ * filtering address
+ * @li @a ixEthAccPortMulticastAddressJoin() - provision a new
+ * filtering address
+ * @li @a ixEthAccPortPromiscuousModeSet() - all frames are
+ * forwarded to the application regardless of the multicast
+ * address provisioned
+ * @li @a ixEthAccPortPromiscuousModeClear() - frames are forwarded
+ * to the application following the multicast address provisioned
+ *
+ * In all cases, unicast and broadcast addresses are forwarded to
+ * the application.
+ *
+ * @li Reentrant - yes
+ * @li ISR Callable - no
+ *
+ * @param portId @ref IxEthAccPortId [in] - Ethernet port id.
+ *
+ * @return IxEthAccStatus
+ * @li @a IX_ETH_ACC_SUCCESS
+ * @li @a IX_ETH_ACC_INVALID_PORT : portId is invalid.
+ * @li @a IX_ETH_ACC_PORT_UNINITIALIZED : portId is un-initialized
+ *
+ * <hr>
+ */
+PUBLIC IxEthAccStatus
+ixEthAccPortMulticastAddressJoinAll(IxEthAccPortId portId);
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @fn ixEthAccPortMulticastAddressLeave( IxEthAccPortId portId,
+ IxEthAccMacAddr *macAddr)
+ *
+ * @brief Remove a multicast address from the MAC address table.
+ *
+ * Other functions modify the MAC filtering
+ *
+ * @li @a ixEthAccPortMulticastAddressJoinAll() - all multicast
+ * frames are forwarded to the application
+ * @li @a ixEthAccPortMulticastAddressLeaveAll() - rollback the
+ * effects of @a ixEthAccPortMulticastAddressJoinAll()
+ * @li @a ixEthAccPortMulticastAddressLeave() - unprovision a new
+ * filtering address
+ * @li @a ixEthAccPortMulticastAddressJoin() - provision a new
+ * filtering address
+ * @li @a ixEthAccPortPromiscuousModeSet() - all frames are
+ * forwarded to the application regardless of the multicast
+ * address provisioned
+ * @li @a ixEthAccPortPromiscuousModeClear() - frames are forwarded
+ * to the application following the multicast address provisioned
+ *
+ * In all cases, unicast and broadcast addresses are forwarded to
+ * the application.
+ *
+ * @li Reentrant - yes
+ * @li ISR Callable - no
+ *
+ * @param portId @ref IxEthAccPortId [in] - Ethernet port id.
+ * @param *macAddr @ref IxEthAccMacAddr [in] - Ethernet Mac address.
+ *
+ * @return IxEthAccStatus
+ * @li @a IX_ETH_ACC_SUCCESS
+ * @li @a IX_ETH_ACC_NO_SUCH_ADDR : Failed if MAC address was not in the table.
+ * @li @a IX_ETH_ACC_INVALID_PORT : portId is invalid.
+ * @li @a IX_ETH_ACC_PORT_UNINITIALIZED : portId is un-initialized
+ *
+ * <hr>
+ */
+PUBLIC IxEthAccStatus
+ixEthAccPortMulticastAddressLeave(IxEthAccPortId portId,
+ IxEthAccMacAddr *macAddr);
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @fn ixEthAccPortMulticastAddressLeaveAll( IxEthAccPortId portId)
+ *
+ * @brief This function unconfigures the multicast filtering settings
+ *
+ * This function first clears the MAC address table, and then sets
+ * the MAC as configured by the promiscuous mode current settings.
+ *
+ * Other functions modify the MAC filtering
+ *
+ * @li @a ixEthAccPortMulticastAddressJoinAll() - all multicast
+ * frames are forwarded to the application
+ * @li @a ixEthAccPortMulticastAddressLeaveAll() - rollback the
+ * effects of @a ixEthAccPortMulticastAddressJoinAll()
+ * @li @a ixEthAccPortMulticastAddressLeave() - unprovision a new
+ * filtering address
+ * @li @a ixEthAccPortMulticastAddressJoin() - provision a new
+ * filtering address
+ * @li @a ixEthAccPortPromiscuousModeSet() - all frames are
+ * forwarded to the application regardless of the multicast
+ * address provisioned
+ * @li @a ixEthAccPortPromiscuousModeClear() - frames are forwarded
+ * to the application following the multicast address provisioned
+ *
+ * In all cases, unicast and broadcast addresses are forwarded to
+ * the application.
+ *
+ * @li Reentrant - yes
+ * @li ISR Callable - no
+ *
+ * @param portId @ref IxEthAccPortId [in] - Ethernet port id.
+ *
+ * @return IxEthAccStatus
+ * @li @a IX_ETH_ACC_SUCCESS
+ * @li @a IX_ETH_ACC_INVALID_PORT : portId is invalid.
+ * @li @a IX_ETH_ACC_PORT_UNINITIALIZED : portId is un-initialized
+ *
+ * <hr>
+ */
+PUBLIC IxEthAccStatus
+ixEthAccPortMulticastAddressLeaveAll(IxEthAccPortId portId);
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @fn ixEthAccPortUnicastAddressShow(IxEthAccPortId portId)
+ *
+ * @brief Displays unicast MAC address
+ *
+ * Displays unicast address which is configured using
+ * @a ixEthAccUnicastMacAddressSet. This function also displays the MAC filter used
+ * to filter multicast frames.
+ *
+ * Other functions modify the MAC filtering
+ *
+ * @li @a ixEthAccPortMulticastAddressJoinAll() - all multicast
+ * frames are forwarded to the application
+ * @li @a ixEthAccPortMulticastAddressLeaveAll() - rollback the
+ * effects of @a ixEthAccPortMulticastAddressJoinAll()
+ * @li @a ixEthAccPortMulticastAddressLeave() - unprovision a new
+ * filtering address
+ * @li @a ixEthAccPortMulticastAddressJoin() - provision a new
+ * filtering address
+ * @li @a ixEthAccPortPromiscuousModeSet() - all frames are
+ * forwarded to the application regardless of the multicast
+ * address provisioned
+ * @li @a ixEthAccPortPromiscuousModeClear() - frames are forwarded
+ * to the application following the multicast address provisioned
+ *
+ * In all cases, unicast and broadcast addresses are forwarded to
+ * the application.
+ *
+ * @li Reentrant - yes
+ * @li ISR Callable - no
+ *
+ * @param portId @ref IxEthAccPortId [in] - Ethernet port id.
+ *
+ * @return void
+ *
+ * <hr>
+ */
+PUBLIC IxEthAccStatus ixEthAccPortUnicastAddressShow(IxEthAccPortId portId);
+
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @fn ixEthAccPortMulticastAddressShow( IxEthAccPortId portId)
+ *
+ * @brief Displays multicast MAC address
+ *
+ * Displays multicast address which have been configured using @a ixEthAccMulticastAddressJoin
+ *
+ * @li Reentrant - yes
+ * @li ISR Callable - no
+ *
+ * @param portId @ref IxEthAccPortId [in] - Ethernet port id.
+ *
+ * @return void
+ *
+ * <hr>
+ */
+PUBLIC void ixEthAccPortMulticastAddressShow( IxEthAccPortId portId);
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @fn ixEthAccPortDuplexModeSet( IxEthAccPortId portId, IxEthAccDuplexMode mode )
+ *
+ * @brief Set the duplex mode for the MAC.
+ *
+ * Configure the IXP400 MAC to either full or half duplex.
+ *
+ * @note
+ * The configuration should match that provisioned on the PHY.
+ *
+ * @li Reentrant - yes
+ * @li ISR Callable - no
+ *
+ * @param portId @ref IxEthAccPortId [in]
+ * @param mode @ref IxEthAccDuplexMode [in]
+ *
+ * @return IxEthAccStatus
+ * @li @a IX_ETH_ACC_SUCCESS
+ * @li @a IX_ETH_ACC_INVALID_PORT : portId is invalid.
+ * @li @a IX_ETH_ACC_PORT_UNINITIALIZED : portId is un-initialized
+ *
+ * <hr>
+ */
+PUBLIC IxEthAccStatus
+ixEthAccPortDuplexModeSet(IxEthAccPortId portId,IxEthAccDuplexMode mode);
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @fn ixEthAccPortDuplexModeGet( IxEthAccPortId portId, IxEthAccDuplexMode *mode )
+ *
+ * @brief Get the duplex mode for the MAC.
+ *
+ * return the duplex configuration of the IXP400 MAC.
+ *
+ * @note
+ * The configuration should match that provisioned on the PHY.
+ * See @a ixEthAccDuplexModeSet
+ *
+ * @li Reentrant - yes
+ * @li ISR Callable - no
+ *
+ * @param portId @ref IxEthAccPortId [in]
+ * @param *mode @ref IxEthAccDuplexMode [out]
+ *
+ * @return IxEthAccStatus
+ * @li @a IX_ETH_ACC_SUCCESS
+ * @li @a IX_ETH_ACC_INVALID_PORT : portId is invalid.
+ * @li @a IX_ETH_ACC_PORT_UNINITIALIZED : portId is un-initialized
+ *
+ * <hr>
+ *
+ */
+PUBLIC IxEthAccStatus
+ixEthAccPortDuplexModeGet(IxEthAccPortId portId,IxEthAccDuplexMode *mode );
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @fn ixEthAccPortTxFrameAppendPaddingEnable( IxEthAccPortId portId)
+ *
+ * @brief Enable padding bytes to be appended to runt frames submitted to
+ * this port
+ *
+ * Enable up to 60 null-bytes padding bytes to be appended to runt frames
+ * submitted to this port. This is the default behavior of the access
+ * component.
+ *
+ * @warning Do not change this behaviour while the port is enabled.
+ *
+ * @note When Tx padding is enabled, Tx FCS generation is turned on
+ *
+ * @li Reentrant - yes
+ * @li ISR Callable - no
+ *
+ * @sa ixEthAccPortTxFrameAppendFCSDusable
+ *
+ * @param portId @ref IxEthAccPortId [in]
+ *
+ * @return IxEthAccStatus
+ * @li @a IX_ETH_ACC_SUCCESS
+ * @li @a IX_ETH_ACC_INVALID_PORT : portId is invalid.
+ * @li @a IX_ETH_ACC_PORT_UNINITIALIZED : portId is un-initialized
+ *
+ * <hr>
+ */
+PUBLIC IxEthAccStatus
+ixEthAccPortTxFrameAppendPaddingEnable(IxEthAccPortId portId);
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @fn ixEthAccPortTxFrameAppendPaddingDisable( IxEthAccPortId portId)
+ *
+ * @brief Disable padding bytes to be appended to runt frames submitted to
+ * this port
+ *
+ * Disable padding bytes to be appended to runt frames
+ * submitted to this port. This is not the default behavior of the access
+ * component.
+ *
+ * @warning Do not change this behaviour while the port is enabled.
+ *
+ * @li Reentrant - yes
+ * @li ISR Callable - no
+ *
+ * @param portId @ref IxEthAccPortId [in]
+ *
+ * @return IxEthAccStatus
+ * @li @a IX_ETH_ACC_SUCCESS
+ * @li @a IX_ETH_ACC_INVALID_PORT : portId is invalid.
+ * @li @a IX_ETH_ACC_PORT_UNINITIALIZED : portId is un-initialized
+ *
+ * <hr>
+ */
+PUBLIC IxEthAccStatus
+ixEthAccPortTxFrameAppendPaddingDisable(IxEthAccPortId portId);
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @fn ixEthAccPortTxFrameAppendFCSEnable( IxEthAccPortId portId)
+ *
+ * @brief Enable the appending of Ethernet FCS to all frames submitted to this port
+ *
+ * When enabled, the FCS is added to the submitted frames. This is the default
+ * behavior of the access component.
+ * Do not change this behaviour while the port is enabled.
+ *
+ * @li Reentrant - yes
+ * @li ISR Callable - no
+ *
+ * @param portId @ref IxEthAccPortId [in]
+ *
+ * @return IxEthAccStatus
+ * @li @a IX_ETH_ACC_SUCCESS
+ * @li @a IX_ETH_ACC_INVALID_PORT : portId is invalid.
+ * @li @a IX_ETH_ACC_PORT_UNINITIALIZED : portId is un-initialized
+ *
+ * <hr>
+ */
+PUBLIC IxEthAccStatus
+ixEthAccPortTxFrameAppendFCSEnable(IxEthAccPortId portId);
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @fn ixEthAccPortTxFrameAppendFCSDisable( IxEthAccPortId portId)
+ *
+ * @brief Disable the appending of Ethernet FCS to all frames submitted to this port.
+ *
+ * When disabled, the Ethernet FCS is not added to the submitted frames.
+ * This is not the default
+ * behavior of the access component.
+ *
+ * @note Since the FCS is not appended to the frame it is expected that the frame submitted to the
+ * component includes a valid FCS at the end of the data, although this will not be validated.
+ *
+ * The component shall forward the frame to the Ethernet MAC WITHOUT modification.
+ *
+ * Do not change this behaviour while the port is enabled.
+ *
+ * @note Tx FCS append is not disabled while Tx padding is enabled.
+ *
+ * @li Reentrant - yes
+ * @li ISR Callable - no
+ *
+ * @sa ixEthAccPortTxFrameAppendPaddingEnable
+ *
+ * @param portId @ref IxEthAccPortId [in]
+ *
+ * @return IxEthAccStatus
+ * @li @a IX_ETH_ACC_SUCCESS
+ * @li @a IX_ETH_ACC_INVALID_PORT : portId is invalid.
+ * @li @a IX_ETH_ACC_PORT_UNINITIALIZED : portId is un-initialized
+ *
+ * <hr>
+ */
+PUBLIC IxEthAccStatus
+ixEthAccPortTxFrameAppendFCSDisable(IxEthAccPortId portId);
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @fn ixEthAccPortRxFrameAppendFCSEnable( IxEthAccPortId portId)
+ *
+ * @brief Forward frames with FCS included in the receive buffer.
+ *
+ * The FCS is not striped from the receive buffer.
+ * The received frame length includes the FCS size (4 bytes). ie.
+ * A minimum sized ethernet frame shall have a length of 64bytes.
+ *
+ * Frame FCS validity checks are still carried out on all received frames.
+ *
+ * This is not the default
+ * behavior of the access component.
+ *
+ * @li Reentrant - yes
+ * @li ISR Callable - no
+ *
+ * @param portId @ref IxEthAccPortId [in]
+ *
+ * @return IxEthAccStatus
+ * @li @a IX_ETH_ACC_SUCCESS
+ * @li @a IX_ETH_ACC_INVALID_PORT : portId is invalid.
+ * @li @a IX_ETH_ACC_PORT_UNINITIALIZED : portId is un-initialized
+ *
+ * <hr>
+ */
+PUBLIC IxEthAccStatus
+ixEthAccPortRxFrameAppendFCSEnable(IxEthAccPortId portId);
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @fn ixEthAccPortRxFrameAppendFCSDisable( IxEthAccPortId portId)
+ *
+ * @brief Do not forward the FCS portion of the received Ethernet frame to the user.
+ * The FCS is striped from the receive buffer.
+ * The received frame length does not include the FCS size (4 bytes).
+ * Frame FCS validity checks are still carried out on all received frames.
+ *
+ * This is the default behavior of the component.
+ * Do not change this behaviour while the port is enabled.
+ *
+ * @li Reentrant - yes
+ * @li ISR Callable - no
+ *
+ * @param portId @ref IxEthAccPortId [in]
+ *
+ * @return IxEthAccStatus
+ * @li @a IX_ETH_ACC_SUCCESS
+ * @li @a IX_ETH_ACC_INVALID_PORT : portId is invalid.
+ * @li @a IX_ETH_ACC_PORT_UNINITIALIZED : portId is un-initialized
+ *
+ * <hr>
+ */
+PUBLIC IxEthAccStatus
+ixEthAccPortRxFrameAppendFCSDisable(IxEthAccPortId portId);
+
+
+
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @enum IxEthAccSchedulerDiscipline
+ *
+ * @brief Definition for the port scheduling discipline
+ *
+ * Select the port scheduling discipline on receive and transmit path
+ * @li FIFO : No Priority : In this configuration all frames are processed
+ * in the access component in the strict order in which
+ * the component received them.
+ * @li FIFO : Priority : This shall be a very simple priority mechanism.
+ * Higher prior-ity frames shall be forwarded
+ * before lower priority frames. There shall be no
+ * fairness mechanisms applied across different
+ * priorities. Higher priority frames could starve
+ * lower priority frames indefinitely.
+ */
+typedef enum
+{
+ FIFO_NO_PRIORITY, /**<frames submitted with no priority*/
+ FIFO_PRIORITY /**<higher prority frames submitted before lower priority*/
+}IxEthAccSchedulerDiscipline;
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @def IxEthAccTxSchedulerDiscipline
+ *
+ * @brief Deprecated definition for the port transmit scheduling discipline
+ */
+#define IxEthAccTxSchedulerDiscipline IxEthAccSchedulerDiscipline
+
+
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @fn ixEthAccTxSchedulingDisciplineSet( IxEthAccPortId portId, IxEthAccSchedulerDiscipline sched)
+ *
+ * @brief Set the port scheduling to one of @a IxEthAccSchedulerDiscipline
+ *
+ * The default behavior of the component is @a FIFO_NO_PRIORITY.
+ *
+ * @li Reentrant - yes
+ * @li ISR Callable - no
+ *
+ * @pre
+ *
+ *
+ * @param portId @ref IxEthAccPortId [in]
+ * @param sched @ref IxEthAccSchedulerDiscipline [in]
+ *
+ * @return IxEthAccStatus
+ * @li @a IX_ETH_ACC_SUCCESS : Set appropriate discipline.
+ * @li @a IX_ETH_ACC_FAIL : Invalid/unsupported discipline.
+ * @li @a IX_ETH_ACC_INVALID_PORT : portId is invalid.
+ * @li @a IX_ETH_ACC_PORT_UNINITIALIZED : portId is un-initialized
+ *
+ * <hr>
+ */
+PUBLIC IxEthAccStatus
+ixEthAccTxSchedulingDisciplineSet(IxEthAccPortId portId,
+ IxEthAccSchedulerDiscipline sched);
+
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @fn ixEthAccRxSchedulingDisciplineSet(IxEthAccSchedulerDiscipline sched)
+ *
+ * @brief Set the Rx scheduling to one of @a IxEthAccSchedulerDiscipline
+ *
+ * The default behavior of the component is @a FIFO_NO_PRIORITY.
+ *
+ * @li Reentrant - yes
+ * @li ISR Callable - no
+ *
+ * @pre
+ *
+ * @param sched : @a IxEthAccSchedulerDiscipline
+ *
+ * @return IxEthAccStatus
+ * @li @a IX_ETH_ACC_SUCCESS : Set appropriate discipline.
+ * @li @a IX_ETH_ACC_FAIL : Invalid/unsupported discipline.
+ *
+ * <hr>
+ */
+PUBLIC IxEthAccStatus
+ixEthAccRxSchedulingDisciplineSet(IxEthAccSchedulerDiscipline sched);
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @fn IxEthAccStatus ixEthAccNpeLoopbackEnable(IxEthAccPortId portId)
+ *
+ * @brief Enable NPE loopback
+ *
+ * When this loopback mode is enabled all the transmitted frames are
+ * received on the same port, without payload.
+ *
+ * This function is recommended for power-up diagnostic checks and
+ * should never be used under normal Ethernet traffic operations.
+ *
+ * @li Reentrant - yes
+ * @li ISR Callable - no
+ *
+ * @pre
+ *
+ * @param portId : ID of the port
+ *
+ * @note Calling ixEthAccPortDisable followed by ixEthAccPortEnable is
+ * guaranteed to restore correct Ethernet Tx/Rx operation.
+ *
+ * @return IxEthAccStatus
+ * @li @a IX_ETH_ACC_SUCCESS : NPE loopback mode enabled
+ * @li @a IX_ETH_ACC_FAIL : Invalid port or Ethernet service not initialized
+ *
+ * <hr>
+ */
+PUBLIC IxEthAccStatus
+ixEthAccPortNpeLoopbackEnable(IxEthAccPortId portId);
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @fn IxEthAccStatus ixEthAccPortNpeLoopbackDisable(IxEthAccPortId portId)
+ *
+ * @brief Disable NPE loopback
+ *
+ * This function is used to disable the NPE loopback if previously
+ * enabled using ixEthAccNpeLoopbackEnable.
+ *
+ * This function is recommended for power-up diagnostic checks and
+ * should never be used under normal Ethernet traffic operations.
+ *
+ * @li Reentrant - yes
+ * @li ISR Callable - no
+ *
+ * @pre
+ *
+ * @note Calling ixEthAccPortDisable followed by ixEthAccPortEnable is
+ * guaranteed to restore correct Ethernet Tx/Rx operation.
+ *
+ * @param portId : ID of the port
+ *
+ * @return IxEthAccStatus
+ * @li @a IX_ETH_ACC_SUCCESS : NPE loopback successfully disabled
+ * @li @a IX_ETH_ACC_FAIL : Invalid port or Ethernet service not initialized
+ *
+ * <hr>
+ */
+PUBLIC IxEthAccStatus
+ixEthAccPortNpeLoopbackDisable(IxEthAccPortId portId);
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @fn IxEthAccStatus ixEthAccPortTxEnable(IxEthAccPortId portId)
+ *
+ * @brief Enable Tx on the port
+ *
+ * This function is the complement of ixEthAccPortTxDisable and should
+ * be used only after Tx was disabled. A MAC core reset is required before
+ * this function is called (see @a ixEthAccPortMacReset).
+ *
+ * This function is the recommended usage scenario for emergency security
+ * shutdown and hardware failure recovery and should never be used for throttling
+ * traffic.
+ *
+ * @li Reentrant - yes
+ * @li ISR Callable - no
+ *
+ * @pre
+ *
+ * @note Calling ixEthAccPortDisable followed by ixEthAccPortEnable is
+ * guaranteed to restore correct Ethernet Tx/Rx operation.
+ *
+ * @param portId : ID of the port
+ *
+ * @return IxEthAccStatus
+ * @li @a IX_ETH_ACC_SUCCESS : Tx successfully enabled
+ * @li @a IX_ETH_ACC_FAIL : Invalid port or Ethernet service not initialized
+ *
+ * <hr>
+ */
+PUBLIC IxEthAccStatus
+ixEthAccPortTxEnable(IxEthAccPortId portId);
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @fn IxEthAccStatus ixEthAccPortTxDisable(IxEthAccPortId portId)
+ *
+ * @brief Disable Tx on the port
+ *
+ * This function can be used to disable Tx in the MAC core.
+ * Tx can be re-enabled, although this is not guaranteed, by performing
+ * a MAC core reset (@a ixEthAccPortMacReset) and calling ixEthAccPortTxEnable.
+ * Note that using this function is not recommended, except for shutting
+ * down Tx for emergency reasons. For proper port shutdown and re-enabling
+ * see ixEthAccPortEnable and ixEthAccPortDisable.
+ *
+ * This function is the recommended usage scenario for emergency security
+ * shutdown and hardware failure recovery and should never be used for throttling
+ * traffic.
+ *
+ * @li Reentrant - yes
+ * @li ISR Callable - no
+ *
+ * @note Calling ixEthAccPortDisable followed by ixEthAccPortEnable is
+ * guaranteed to restore correct Ethernet Tx/Rx operation.
+ *
+ * @pre
+ *
+ * @param portId : ID of the port
+ *
+ * @return IxEthAccStatus
+ * @li @a IX_ETH_ACC_SUCCESS : Tx successfully disabled
+ * @li @a IX_ETH_ACC_FAIL : Invalid port or Ethernet service not initialized
+ *
+ * <hr>
+ */
+PUBLIC IxEthAccStatus
+ixEthAccPortTxDisable(IxEthAccPortId portId);
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @fn IxEthAccStatus ixEthAccPortRxEnable(IxEthAccPortId portId)
+ *
+ * @brief Enable Rx on the port
+ *
+ * This function is the complement of ixEthAccPortRxDisable and should
+ * be used only after Rx was disabled.
+ *
+ * This function is the recommended usage scenario for emergency security
+ * shutdown and hardware failure recovery and should never be used for throttling
+ * traffic.
+ *
+ * @li Reentrant - yes
+ * @li ISR Callable - no
+ *
+ * @note Calling ixEthAccPortDisable followed by ixEthAccPortEnable is
+ * guaranteed to restore correct Ethernet Tx/Rx operation.
+ *
+ * @pre
+ *
+ * @param portId : ID of the port
+ *
+ * @return IxEthAccStatus
+ * @li @a IX_ETH_ACC_SUCCESS : Rx successfully enabled
+ * @li @a IX_ETH_ACC_FAIL : Invalid port or Ethernet service not initialized
+ *
+ * <hr>
+ */
+PUBLIC IxEthAccStatus
+ixEthAccPortRxEnable(IxEthAccPortId portId);
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @fn IxEthAccStatus ixEthAccPortRxDisable(IxEthAccPortId portId)
+ *
+ * @brief Disable Rx on the port
+ *
+ * This function can be used to disable Rx in the MAC core.
+ * Rx can be re-enabled, although this is not guaranteed, by performing
+ * a MAC core reset (@a ixEthAccPortMacReset) and calling ixEthAccPortRxEnable.
+ * Note that using this function is not recommended, except for shutting
+ * down Rx for emergency reasons. For proper port shutdown and re-enabling
+ * see ixEthAccPortEnable and ixEthAccPortDisable.
+ *
+ * This function is the recommended usage scenario for emergency security
+ * shutdown and hardware failure recovery and should never be used for throttling
+ * traffic.
+ *
+ * @li Reentrant - yes
+ * @li ISR Callable - no
+ *
+ * @pre
+ *
+ * @note Calling ixEthAccPortDisable followed by ixEthAccPortEnable is
+ * guaranteed to restore correct Ethernet Tx/Rx operation.
+ *
+ * @param portId : ID of the port
+ *
+ * @return IxEthAccStatus
+ * @li @a IX_ETH_ACC_SUCCESS : Rx successfully disabled
+ * @li @a IX_ETH_ACC_FAIL : Invalid port or Ethernet service not initialized
+ *
+ * <hr>
+ */
+PUBLIC IxEthAccStatus
+ixEthAccPortRxDisable(IxEthAccPortId portId);
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @fn IxEthAccStatus ixEthAccPortMacReset(IxEthAccPortId portId)
+ *
+ * @brief Reset MAC core on the port
+ *
+ * This function will perform a MAC core reset (NPE Ethernet coprocessor).
+ * This function is inherently unsafe and the NPE recovery is not guaranteed
+ * after this function is called. The proper manner of performing port disable
+ * and enable (which will reset the MAC as well) is ixEthAccPortEnable/ixEthAccPortDisable.
+ *
+ * This function is the recommended usage scenario for hardware failure recovery
+ * and should never be used for throttling traffic.
+ *
+ * @li Reentrant - yes
+ * @li ISR Callable - no
+ *
+ * @pre
+ *
+ * @note Calling ixEthAccPortDisable followed by ixEthAccPortEnable is
+ * guaranteed to restore correct Ethernet Tx/Rx operation.
+ *
+ * @param portId : ID of the port
+ *
+ * @return IxEthAccStatus
+ * @li @a IX_ETH_ACC_SUCCESS : MAC core reset
+ * @li @a IX_ETH_ACC_FAIL : Invalid port or Ethernet service not initialized
+ *
+ * <hr>
+ */
+PUBLIC IxEthAccStatus
+ixEthAccPortMacReset(IxEthAccPortId portId);
+
+/*********************************************************************************
+ #### ##### ## ##### # #### ##### # #### ####
+ # # # # # # # # # # # #
+ #### # # # # # #### # # # ####
+ # # ###### # # # # # # #
+ # # # # # # # # # # # # # # #
+ #### # # # # # #### # # #### ####
+**********************************************************************************/
+
+
+/**
+ *
+ * @brief This struct defines the statistics returned by this component.
+ *
+ * The component returns MIB2 EthObj variables which are obtained from the
+ * hardware or maintained by this component.
+ *
+ *
+ */
+typedef struct
+{
+ UINT32 dot3StatsAlignmentErrors; /**< link error count (rx) */
+ UINT32 dot3StatsFCSErrors; /**< link error count (rx) */
+ UINT32 dot3StatsInternalMacReceiveErrors; /**< link error count (rx) */
+ UINT32 RxOverrunDiscards; /**< NPE: discarded frames count (rx) */
+ UINT32 RxLearnedEntryDiscards; /**< NPE: discarded frames count(rx) */
+ UINT32 RxLargeFramesDiscards; /**< NPE: discarded frames count(rx) */
+ UINT32 RxSTPBlockedDiscards; /**< NPE: discarded frames count(rx) */
+ UINT32 RxVLANTypeFilterDiscards; /**< NPE: discarded frames count (rx) */
+ UINT32 RxVLANIdFilterDiscards; /**< NPE: discarded frames count (rx) */
+ UINT32 RxInvalidSourceDiscards; /**< NPE: discarded frames count (rx) */
+ UINT32 RxBlackListDiscards; /**< NPE: discarded frames count (rx) */
+ UINT32 RxWhiteListDiscards; /**< NPE: discarded frames count (rx) */
+ UINT32 RxUnderflowEntryDiscards; /**< NPE: discarded frames count (rx) */
+ UINT32 dot3StatsSingleCollisionFrames; /**< link error count (tx) */
+ UINT32 dot3StatsMultipleCollisionFrames; /**< link error count (tx) */
+ UINT32 dot3StatsDeferredTransmissions; /**< link error count (tx) */
+ UINT32 dot3StatsLateCollisions; /**< link error count (tx) */
+ UINT32 dot3StatsExcessiveCollsions; /**< link error count (tx) */
+ UINT32 dot3StatsInternalMacTransmitErrors; /**< link error count (tx) */
+ UINT32 dot3StatsCarrierSenseErrors; /**< link error count (tx) */
+ UINT32 TxLargeFrameDiscards; /**< NPE: discarded frames count (tx) */
+ UINT32 TxVLANIdFilterDiscards; /**< NPE: discarded frames count (tx) */
+
+}IxEthEthObjStats;
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @fn ixEthAccMibIIStatsGet(IxEthAccPortId portId ,IxEthEthObjStats *retStats )
+ *
+ * @brief Returns the statistics maintained for a port.
+ *
+ * @li Reentrant - yes
+ * @li ISR Callable - no
+ *
+ * @pre
+ *
+ *
+ * @param portId @ref IxEthAccPortId [in]
+ * @param retStats @ref IxEthEthObjStats [out]
+ * @note Please note the user is responsible for cache coheriency of the retStat
+ * buffer. The data is actually populated via the NPE's. As such cache safe
+ * memory should be used in the retStats argument.
+ *
+ * @return IxEthAccStatus
+ * @li @a IX_ETH_ACC_SUCCESS
+ * @li @a IX_ETH_ACC_FAIL : Invalid arguments.
+ * @li @a IX_ETH_ACC_INVALID_PORT : portId is invalid.
+ * @li @a IX_ETH_ACC_PORT_UNINITIALIZED : portId is un-initialized
+ *
+ * <hr>
+ */
+PUBLIC IxEthAccStatus
+ixEthAccMibIIStatsGet(IxEthAccPortId portId, IxEthEthObjStats *retStats );
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @fn ixEthAccMibIIStatsGetClear(IxEthAccPortId portId, IxEthEthObjStats *retStats)
+ *
+ * @brief Returns and clears the statistics maintained for a port.
+ *
+ * @li Reentrant - yes
+ * @li ISR Callable - yes
+ *
+ * @pre
+ *
+ * @param portId @ref IxEthAccPortId [in]
+ * @param retStats @ref IxEthEthObjStats [out]
+ * @note Please note the user is responsible for cache coheriency of the retStats
+ * buffer. The data is actually populated via the NPE's. As such cache safe
+ * memory should be used in the retStats argument.
+ *
+ * @return IxEthAccStatus
+ * @li @a IX_ETH_ACC_SUCCESS
+ * @li @a IX_ETH_ACC_FAIL : invalid arguments.
+ * @li @a IX_ETH_ACC_INVALID_PORT : portId is invalid.
+ * @li @a IX_ETH_ACC_PORT_UNINITIALIZED : portId is un-initialized
+ *
+ * <hr>
+ */
+PUBLIC IxEthAccStatus
+ixEthAccMibIIStatsGetClear(IxEthAccPortId portId, IxEthEthObjStats *retStats);
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @fn ixEthAccMibIIStatsClear(IxEthAccPortId portId)
+ *
+ * @brief Clears the statistics maintained for a port.
+ *
+ * @li Reentrant - yes
+ * @li ISR Callable - no
+ *
+ * @pre
+ *
+ * @param portId @ref IxEthAccPortId [in]
+ *
+ * @return IxEthAccStatus
+ * @li @a IX_ETH_ACC_SUCCESS
+ * @li @a IX_ETH_ACC_FAIL : Invalid arguments.
+ * @li @a IX_ETH_ACC_INVALID_PORT : portId is invalid.
+ * @li @a IX_ETH_ACC_PORT_UNINITIALIZED : portId is un-initialized
+ *
+ * <hr>
+ */
+PUBLIC IxEthAccStatus ixEthAccMibIIStatsClear(IxEthAccPortId portId);
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @fn ixEthAccMacInit(IxEthAccPortId portId)
+ *
+ * @brief Initializes the ethernet MAC settings
+ *
+ * @li Reentrant - no
+ * @li ISR Callable - no
+ *
+ * @param portId @ref IxEthAccPortId [in]
+ *
+ * @return IxEthAccStatus
+ * @li @a IX_ETH_ACC_SUCCESS
+ * @li @a IX_ETH_ACC_INVALID_PORT : portId is invalid.
+ *
+ * <hr>
+ */
+PUBLIC IxEthAccStatus ixEthAccMacInit(IxEthAccPortId portId);
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @fn ixEthAccStatsShow(IxEthAccPortId portId)
+ *
+ *
+ * @brief Displays a ports statistics on the standard io console using printf.
+ *
+ * @li Reentrant - no
+ * @li ISR Callable - no
+ *
+ * @pre
+ *
+ * @param portId @ref IxEthAccPortId [in]
+ *
+ * @return void
+ *
+ * <hr>
+ */
+PUBLIC void ixEthAccStatsShow(IxEthAccPortId portId);
+
+/*************************************************************************
+
+ # # # # # # ##### # ####
+ ## ## # # ## ## # # # # #
+ # ## # # # # ## # # # # # #
+ # # # # # # # # # # #
+ # # # # # # # # # # #
+ # # # # # # ##### # ####
+
+*************************************************************************/
+
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @fn ixEthAccMiiReadRtn (UINT8 phyAddr,
+ UINT8 phyReg,
+ UINT16 *value)
+ *
+ *
+ * @brief Reads a 16 bit value from a PHY
+ *
+ * Reads a 16-bit word from a register of a MII-compliant PHY. Reading
+ * is performed through the MII management interface. This function returns
+ * when the read operation has successfully completed, or when a timeout has elapsed.
+ *
+ * @li Reentrant - no
+ * @li ISR Callable - no
+ *
+ * @pre The MAC on Ethernet Port 2 (NPE C) must be initialised, and generating the MDIO clock.
+ *
+ * @param phyAddr UINT8 [in] - the address of the Ethernet PHY (0-31)
+ * @param phyReg UINT8 [in] - the number of the MII register to read (0-31)
+ * @param value UINT16 [in] - the value read from the register
+ *
+ * @return IxEthAccStatus
+ * @li @a IX_ETH_ACC_SUCCESS
+ * @li @a IX_ETH_ACC_FAIL : failed to read the register.
+ *
+ * <hr>
+ */
+PUBLIC IxEthAccStatus
+ixEthAccMiiReadRtn (UINT8 phyAddr, UINT8 phyReg, UINT16 *value);
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @fn ixEthAccMiiWriteRtn (UINT8 phyAddr,
+ UINT8 phyReg,
+ UINT16 value)
+ *
+ *
+ * @brief Writes a 16 bit value to a PHY
+ *
+ * Writes a 16-bit word from a register of a MII-compliant PHY. Writing
+ * is performed through the MII management interface. This function returns
+ * when the write operation has successfully completed, or when a timeout has elapsed.
+ *
+ * @li Reentrant - no
+ * @li ISR Callable - no
+ *
+ * @pre The MAC on Ethernet Port 2 (NPE C) must be initialised, and generating the MDIO clock.
+ *
+ * @param phyAddr UINT8 [in] - the address of the Ethernet PHY (0-31)
+ * @param phyReg UINT8 [in] - the number of the MII register to write (0-31)
+ * @param value UINT16 [out] - the value to write to the register
+ *
+ * @return IxEthAccStatus
+ * @li @a IX_ETH_ACC_SUCCESS
+ * @li @a IX_ETH_ACC_FAIL : failed to write register.
+ *
+ * <hr>
+ */
+PUBLIC IxEthAccStatus
+ixEthAccMiiWriteRtn (UINT8 phyAddr, UINT8 phyReg, UINT16 value);
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @fn ixEthAccMiiAccessTimeoutSet(UINT32 timeout)
+ *
+ * @brief Overrides the default timeout value and retry count when reading or
+ * writing MII registers using ixEthAccMiiWriteRtn or ixEthAccMiiReadRtn
+ *
+ * The default behavior of the component is to use a IX_ETH_ACC_MII_10TH_SEC_IN_MILLIS ms
+ * timeout (declared as 100 in IxEthAccMii_p.h) and a retry count of IX_ETH_ACC_MII_TIMEOUT_10TH_SECS
+ * (declared as 5 in IxEthAccMii_p.h).
+ *
+ * The MII read and write functions will attempt to read the status of the register up
+ * to the retry count times, delaying between each attempt with the timeout value.
+ *
+ * @li Reentrant - no
+ * @li ISR Callable - no
+ *
+ * @pre
+ *
+ * @param timeout UINT32 [in] - new timeout value, in milliseconds
+ * @param timeout UINT32 [in] - new retry count (a minimum value of 1 must be used)
+ *
+ * @return IxEthAccStatus
+ * @li @a IX_ETH_ACC_SUCCESS
+ * @li @a IX_ETH_ACC_FAIL : invalid parameter(s)
+ *
+ * <hr>
+ */
+PUBLIC IxEthAccStatus
+ixEthAccMiiAccessTimeoutSet(UINT32 timeout, UINT32 retryCount);
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @fn ixEthAccMiiStatsShow (UINT32 phyAddr)
+ *
+ *
+ * @brief Displays detailed information on a specified PHY
+ *
+ * Displays the current values of the first eigth MII registers for a PHY,
+ *
+ * @li Reentrant - no
+ * @li ISR Callable - no
+ *
+ * @pre The MAC on Ethernet Port 2 (NPE C) must be initialised, and
+ * generating the MDIO clock.
+ *
+ * @param phyAddr UINT32 [in] - the address of the Ethernet PHY (0-31)
+ *
+ * @return IxEthAccStatus
+ * @li @a IX_ETH_ACC_SUCCESS
+ * @li @a IX_ETH_ACC_FAIL : invalid arguments.
+ *
+ * <hr>
+ */
+PUBLIC IxEthAccStatus ixEthAccMiiStatsShow (UINT32 phyAddr);
+
+
+
+/******* BOARD SPECIFIC DEPRECATED API *********/
+
+/* The following functions are high level functions which rely
+ * on the properties and interface of some Ethernet PHYs. The
+ * implementation is hardware specific and has been moved to
+ * the hardware-specific component IxEthMii.
+ */
+
+ #include "IxEthMii.h"
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @def ixEthAccMiiPhyScan
+ *
+ * @brief : deprecated API entry point. This definition
+ * ensures backward compatibility
+ *
+ * See @ref ixEthMiiPhyScan
+ *
+ * @note this feature is board specific
+ *
+ */
+#define ixEthAccMiiPhyScan(phyPresent) ixEthMiiPhyScan(phyPresent,IXP425_ETH_ACC_MII_MAX_ADDR)
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @def ixEthAccMiiPhyConfig
+ *
+ * @brief : deprecated API entry point. This definition
+ * ensures backward compatibility
+ *
+ * See @ref ixEthMiiPhyConfig
+ *
+ * @note this feature is board specific
+ */
+#define ixEthAccMiiPhyConfig(phyAddr,speed100,fullDuplex,autonegotiate) \
+ ixEthMiiPhyConfig(phyAddr,speed100,fullDuplex,autonegotiate)
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @def ixEthAccMiiPhyReset
+ *
+ * @brief : deprecated API entry point. This definition
+ * ensures backward compatibility
+ *
+ * See @ref ixEthMiiPhyReset
+ *
+ * @note this feature is board specific
+ */
+#define ixEthAccMiiPhyReset(phyAddr) \
+ ixEthMiiPhyReset(phyAddr)
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @def ixEthAccMiiLinkStatus
+ *
+ * @brief : deprecated API entry point. This definition
+ * ensures backward compatibility
+ *
+ * See @ref ixEthMiiLinkStatus
+ *
+ * @note this feature is board specific
+ */
+#define ixEthAccMiiLinkStatus(phyAddr,linkUp,speed100,fullDuplex,autoneg) \
+ ixEthMiiLinkStatus(phyAddr,linkUp,speed100,fullDuplex,autoneg)
+
+
+
+/**
+ * @ingroup IxEthAcc
+ *
+ * @def ixEthAccMiiShow
+ *
+ * @brief : deprecated API entry point. This definition
+ * ensures backward compatibility
+ *
+ * See @ref ixEthMiiPhyShow
+ *
+ * @note this feature is board specific
+ */
+#define ixEthAccMiiShow(phyAddr) \
+ ixEthMiiPhyShow(phyAddr)
+
+#endif /* ndef IxEthAcc_H */
+/**
+ *@}
+ */
diff --git a/cpu/ixp/npe/include/IxEthAccDataPlane_p.h b/cpu/ixp/npe/include/IxEthAccDataPlane_p.h
new file mode 100644
index 0000000000..8b8e6b256c
--- /dev/null
+++ b/cpu/ixp/npe/include/IxEthAccDataPlane_p.h
@@ -0,0 +1,245 @@
+/**
+ * @file IxEthAccDataPlane_p.h
+ *
+ * @author Intel Corporation
+ * @date 12-Feb-2002
+ *
+ * @brief Internal Header file for IXP425 Ethernet Access component.
+ *
+ * Design Notes:
+ *
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+
+
+#ifndef IxEthAccDataPlane_p_H
+#define IxEthAccDataPlane_p_H
+
+#include <IxOsal.h>
+#include <IxQMgr.h>
+
+/**
+ * @addtogroup IxEthAccPri
+ *@{
+ */
+
+/* typedefs global to this file*/
+
+typedef struct
+{
+ IX_OSAL_MBUF *pHead;
+ IX_OSAL_MBUF *pTail;
+}IxEthAccDataPlaneQList;
+
+
+/**
+ * @struct IxEthAccDataPlaneStats
+ * @brief Statistics data structure associated with the data plane
+ *
+ */
+typedef struct
+{
+ UINT32 addToSwQ;
+ UINT32 removeFromSwQ;
+ UINT32 unchainedTxMBufs;
+ UINT32 chainedTxMBufs;
+ UINT32 unchainedTxDoneMBufs;
+ UINT32 chainedTxDoneMBufs;
+ UINT32 unchainedRxMBufs;
+ UINT32 chainedRxMBufs;
+ UINT32 unchainedRxFreeMBufs;
+ UINT32 chainedRxFreeMBufs;
+ UINT32 rxCallbackCounter;
+ UINT32 rxCallbackBurstRead;
+ UINT32 txDoneCallbackCounter;
+ UINT32 unexpectedError;
+} IxEthAccDataPlaneStats;
+
+/**
+ * @fn ixEthAccMbufFromSwQ
+ * @brief used during disable steps to convert mbufs from
+ * swq format, ready to be pushed into hw queues for NPE,
+ * back into XScale format
+ */
+IX_OSAL_MBUF *ixEthAccMbufFromSwQ(IX_OSAL_MBUF *mbuf);
+
+/**
+ * @fn ixEthAccDataPlaneShow
+ * @brief Show function (for data plane statistics
+ */
+void ixEthAccDataPlaneShow(void);
+
+/*
+ * lock dataplane when atomic operation is required
+ */
+#define IX_ETH_ACC_DATA_PLANE_LOCK(arg) arg = ixOsalIrqLock();
+#define IX_ETH_ACC_DATA_PLANE_UNLOCK(arg) ixOsalIrqUnlock(arg);
+
+/*
+ * Use MBUF fields
+ */
+#define IX_ETHACC_NE_SHARED(mBufPtr) \
+ ((IxEthAccNe *)&((mBufPtr)->ix_ne))
+
+#if 1
+
+#define IX_ETHACC_NE_NEXT(mBufPtr) (mBufPtr)->ix_ne.reserved[0]
+
+/* tm - wrong!! len and pkt_len are in the second word - #define IX_ETHACC_NE_LEN(mBufPtr) (mBufPtr)->ix_ne.reserved[3] */
+#define IX_ETHACC_NE_LEN(mBufPtr) (mBufPtr)->ix_ne.reserved[1]
+
+#define IX_ETHACC_NE_DATA(mBufPtr)(mBufPtr)->ix_ne.reserved[2]
+
+#else
+
+#define IX_ETHACC_NE_NEXT(mBufPtr) \
+ IX_ETHACC_NE_SHARED(mBufPtr)->ixReserved_next
+
+#define IX_ETHACC_NE_LEN(mBufPtr) \
+ IX_ETHACC_NE_SHARED(mBufPtr)->ixReserved_lengths
+
+#define IX_ETHACC_NE_DATA(mBufPtr) \
+ IX_ETHACC_NE_SHARED(mBufPtr)->ixReserved_data
+#endif
+
+/*
+ * Use MBUF next pointer field to chain data.
+ */
+#define IX_ETH_ACC_MBUF_NEXT_PKT_CHAIN_MEMBER(mbuf) (mbuf)->ix_ctrl.ix_chain
+
+
+
+#define IX_ETH_ACC_DATAPLANE_IS_Q_EMPTY(mbuf_list) ((mbuf_list.pHead) == NULL)
+
+
+#define IX_ETH_ACC_DATAPLANE_ADD_MBUF_TO_Q_HEAD(mbuf_list,mbuf_to_add) \
+ do { \
+ int lockVal; \
+ IX_ETH_ACC_DATA_PLANE_LOCK(lockVal); \
+ IX_ETH_ACC_STATS_INC(ixEthAccDataStats.addToSwQ); \
+ if ( (mbuf_list.pHead) != NULL ) \
+ { \
+ (IX_ETH_ACC_MBUF_NEXT_PKT_CHAIN_MEMBER((mbuf_to_add))) = (mbuf_list.pHead);\
+ (mbuf_list.pHead) = (mbuf_to_add); \
+ } \
+ else { \
+ (mbuf_list.pTail) = (mbuf_list.pHead) = (mbuf_to_add); \
+ IX_ETH_ACC_MBUF_NEXT_PKT_CHAIN_MEMBER((mbuf_to_add)) = NULL; \
+ } \
+ IX_ETH_ACC_DATA_PLANE_UNLOCK(lockVal); \
+ } while(0)
+
+
+#define IX_ETH_ACC_DATAPLANE_ADD_MBUF_TO_Q_TAIL(mbuf_list,mbuf_to_add) \
+ do { \
+ int lockVal; \
+ IX_ETH_ACC_DATA_PLANE_LOCK(lockVal); \
+ IX_ETH_ACC_STATS_INC(ixEthAccDataStats.addToSwQ); \
+ if ( (mbuf_list.pHead) == NULL ) \
+ { \
+ (mbuf_list.pHead) = mbuf_to_add; \
+ IX_ETH_ACC_MBUF_NEXT_PKT_CHAIN_MEMBER((mbuf_to_add)) = NULL; \
+ } \
+ else { \
+ IX_ETH_ACC_MBUF_NEXT_PKT_CHAIN_MEMBER((mbuf_list.pTail)) = (mbuf_to_add); \
+ IX_ETH_ACC_MBUF_NEXT_PKT_CHAIN_MEMBER((mbuf_to_add)) = NULL; \
+ } \
+ (mbuf_list.pTail) = mbuf_to_add; \
+ IX_ETH_ACC_DATA_PLANE_UNLOCK(lockVal); \
+ } while (0)
+
+
+#define IX_ETH_ACC_DATAPLANE_REMOVE_MBUF_FROM_Q_HEAD(mbuf_list,mbuf_to_rem) \
+ do { \
+ int lockVal; \
+ IX_ETH_ACC_DATA_PLANE_LOCK(lockVal); \
+ if ( (mbuf_list.pHead) != NULL ) \
+ { \
+ IX_ETH_ACC_STATS_INC(ixEthAccDataStats.removeFromSwQ); \
+ (mbuf_to_rem) = (mbuf_list.pHead) ; \
+ (mbuf_list.pHead) = (IX_ETH_ACC_MBUF_NEXT_PKT_CHAIN_MEMBER((mbuf_to_rem)));\
+ } \
+ else { \
+ (mbuf_to_rem) = NULL; \
+ } \
+ IX_ETH_ACC_DATA_PLANE_UNLOCK(lockVal); \
+ } while (0)
+
+
+/**
+ * @brief message handler QManager entries for NPE id => port ID conversion (NPE_B => 0, NPE_C => 1)
+ */
+#define IX_ETH_ACC_PORT_TO_NPE_ID(port) \
+ ixEthAccPortData[(port)].npeId
+
+#define IX_ETH_ACC_NPE_TO_PORT_ID(npe) ((npe == 0 ? 2 : (npe == 1 ? 0 : ( npe == 2 ? 1 : -1 ))))
+
+#define IX_ETH_ACC_PORT_TO_TX_Q_ID(port) \
+ ixEthAccPortData[(port)].ixEthAccTxData.txQueue
+
+#define IX_ETH_ACC_PORT_TO_RX_FREE_Q_ID(port) \
+ ixEthAccPortData[(port)].ixEthAccRxData.rxFreeQueue
+
+#define IX_ETH_ACC_PORT_TO_TX_Q_SOURCE(port) (port == IX_ETH_PORT_1 ? IX_ETH_ACC_TX_FRAME_ENET0_Q_SOURCE : (port == IX_ETH_PORT_2 ? IX_ETH_ACC_TX_FRAME_ENET1_Q_SOURCE : IX_ETH_ACC_TX_FRAME_ENET2_Q_SOURCE))
+
+#define IX_ETH_ACC_PORT_TO_RX_FREE_Q_SOURCE(port) (port == IX_ETH_PORT_1 ? IX_ETH_ACC_RX_FREE_BUFF_ENET0_Q_SOURCE : (port == IX_ETH_PORT_2 ? IX_ETH_ACC_RX_FREE_BUFF_ENET1_Q_SOURCE : IX_ETH_ACC_RX_FREE_BUFF_ENET2_Q_SOURCE ))
+
+/* Flush the mbufs chain and all data pointed to by the mbuf */
+
+#ifndef NDEBUG
+#define IX_ETH_ACC_STATS_INC(x) (x++)
+#else
+#define IX_ETH_ACC_STATS_INC(x)
+#endif
+
+#define IX_ETH_ACC_MAX_TX_FRAMES_TO_SUBMIT 128
+
+void ixEthRxFrameQMCallback(IxQMgrQId qId, IxQMgrCallbackId callbackId);
+void ixEthRxMultiBufferQMCallback(IxQMgrQId qId, IxQMgrCallbackId callbackId);
+void ixEthTxFrameDoneQMCallback(IxQMgrQId qId, IxQMgrCallbackId callbackId);
+
+#endif /* IxEthAccDataPlane_p_H */
+
+
+/**
+ *@}
+ */
+
diff --git a/cpu/ixp/npe/include/IxEthAccMac_p.h b/cpu/ixp/npe/include/IxEthAccMac_p.h
new file mode 100644
index 0000000000..93e9d98e76
--- /dev/null
+++ b/cpu/ixp/npe/include/IxEthAccMac_p.h
@@ -0,0 +1,248 @@
+/*
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+*/
+
+
+#ifndef IxEthAccMac_p_H
+#define IxEthAccMac_p_H
+
+#include "IxOsal.h"
+
+#define IX_ETH_ACC_MAX_MULTICAST_ADDRESSES 256
+#define IX_ETH_ACC_NUM_PORTS 3
+#define IX_ETH_ACC_MAX_FRAME_SIZE_DEFAULT 1536
+#define IX_ETH_ACC_MAX_FRAME_SIZE_UPPER_RANGE (65536-64)
+#define IX_ETH_ACC_MAX_FRAME_SIZE_LOWER_RANGE 64
+
+/*
+ *
+ * MAC register definitions
+ *
+ */
+#define IX_ETH_ACC_MAC_0_BASE IX_OSAL_IXP400_ETHA_PHYS_BASE
+#define IX_ETH_ACC_MAC_1_BASE IX_OSAL_IXP400_ETHB_PHYS_BASE
+#define IX_ETH_ACC_MAC_2_BASE IX_OSAL_IXP400_ETH_NPEA_PHYS_BASE
+
+#define IX_ETH_ACC_MAC_TX_CNTRL1 0x000
+#define IX_ETH_ACC_MAC_TX_CNTRL2 0x004
+#define IX_ETH_ACC_MAC_RX_CNTRL1 0x010
+#define IX_ETH_ACC_MAC_RX_CNTRL2 0x014
+#define IX_ETH_ACC_MAC_RANDOM_SEED 0x020
+#define IX_ETH_ACC_MAC_THRESH_P_EMPTY 0x030
+#define IX_ETH_ACC_MAC_THRESH_P_FULL 0x038
+#define IX_ETH_ACC_MAC_BUF_SIZE_TX 0x040
+#define IX_ETH_ACC_MAC_TX_DEFER 0x050
+#define IX_ETH_ACC_MAC_RX_DEFER 0x054
+#define IX_ETH_ACC_MAC_TX_TWO_DEFER_1 0x060
+#define IX_ETH_ACC_MAC_TX_TWO_DEFER_2 0x064
+#define IX_ETH_ACC_MAC_SLOT_TIME 0x070
+#define IX_ETH_ACC_MAC_MDIO_CMD_1 0x080
+#define IX_ETH_ACC_MAC_MDIO_CMD_2 0x084
+#define IX_ETH_ACC_MAC_MDIO_CMD_3 0x088
+#define IX_ETH_ACC_MAC_MDIO_CMD_4 0x08c
+#define IX_ETH_ACC_MAC_MDIO_STS_1 0x090
+#define IX_ETH_ACC_MAC_MDIO_STS_2 0x094
+#define IX_ETH_ACC_MAC_MDIO_STS_3 0x098
+#define IX_ETH_ACC_MAC_MDIO_STS_4 0x09c
+#define IX_ETH_ACC_MAC_ADDR_MASK_1 0x0A0
+#define IX_ETH_ACC_MAC_ADDR_MASK_2 0x0A4
+#define IX_ETH_ACC_MAC_ADDR_MASK_3 0x0A8
+#define IX_ETH_ACC_MAC_ADDR_MASK_4 0x0AC
+#define IX_ETH_ACC_MAC_ADDR_MASK_5 0x0B0
+#define IX_ETH_ACC_MAC_ADDR_MASK_6 0x0B4
+#define IX_ETH_ACC_MAC_ADDR_1 0x0C0
+#define IX_ETH_ACC_MAC_ADDR_2 0x0C4
+#define IX_ETH_ACC_MAC_ADDR_3 0x0C8
+#define IX_ETH_ACC_MAC_ADDR_4 0x0CC
+#define IX_ETH_ACC_MAC_ADDR_5 0x0D0
+#define IX_ETH_ACC_MAC_ADDR_6 0x0D4
+#define IX_ETH_ACC_MAC_INT_CLK_THRESH 0x0E0
+#define IX_ETH_ACC_MAC_UNI_ADDR_1 0x0F0
+#define IX_ETH_ACC_MAC_UNI_ADDR_2 0x0F4
+#define IX_ETH_ACC_MAC_UNI_ADDR_3 0x0F8
+#define IX_ETH_ACC_MAC_UNI_ADDR_4 0x0FC
+#define IX_ETH_ACC_MAC_UNI_ADDR_5 0x100
+#define IX_ETH_ACC_MAC_UNI_ADDR_6 0x104
+#define IX_ETH_ACC_MAC_CORE_CNTRL 0x1FC
+
+
+/*
+ *
+ *Bit definitions
+ *
+ */
+
+/* TX Control Register 1*/
+
+#define IX_ETH_ACC_TX_CNTRL1_TX_EN BIT(0)
+#define IX_ETH_ACC_TX_CNTRL1_DUPLEX BIT(1)
+#define IX_ETH_ACC_TX_CNTRL1_RETRY BIT(2)
+#define IX_ETH_ACC_TX_CNTRL1_PAD_EN BIT(3)
+#define IX_ETH_ACC_TX_CNTRL1_FCS_EN BIT(4)
+#define IX_ETH_ACC_TX_CNTRL1_2DEFER BIT(5)
+#define IX_ETH_ACC_TX_CNTRL1_RMII BIT(6)
+
+/* TX Control Register 2 */
+#define IX_ETH_ACC_TX_CNTRL2_RETRIES_MASK 0xf
+
+/* RX Control Register 1 */
+#define IX_ETH_ACC_RX_CNTRL1_RX_EN BIT(0)
+#define IX_ETH_ACC_RX_CNTRL1_PADSTRIP_EN BIT(1)
+#define IX_ETH_ACC_RX_CNTRL1_CRC_EN BIT(2)
+#define IX_ETH_ACC_RX_CNTRL1_PAUSE_EN BIT(3)
+#define IX_ETH_ACC_RX_CNTRL1_LOOP_EN BIT(4)
+#define IX_ETH_ACC_RX_CNTRL1_ADDR_FLTR_EN BIT(5)
+#define IX_ETH_ACC_RX_CNTRL1_RX_RUNT_EN BIT(6)
+#define IX_ETH_ACC_RX_CNTRL1_BCAST_DIS BIT(7)
+
+/* RX Control Register 2 */
+#define IX_ETH_ACC_RX_CNTRL2_DEFER_EN BIT(0)
+
+
+
+/* Core Control Register */
+#define IX_ETH_ACC_CORE_RESET BIT(0)
+#define IX_ETH_ACC_CORE_RX_FIFO_FLUSH BIT(1)
+#define IX_ETH_ACC_CORE_TX_FIFO_FLUSH BIT(2)
+#define IX_ETH_ACC_CORE_SEND_JAM BIT(3)
+#define IX_ETH_ACC_CORE_MDC_EN BIT(4)
+
+/* 1st bit of 1st MAC octet */
+#define IX_ETH_ACC_ETH_MAC_BCAST_MCAST_BIT ( 1)
+
+
+/*
+ *
+ * Default values
+ *
+ */
+
+
+#define IX_ETH_ACC_TX_CNTRL1_DEFAULT (IX_ETH_ACC_TX_CNTRL1_TX_EN | \
+ IX_ETH_ACC_TX_CNTRL1_RETRY | \
+ IX_ETH_ACC_TX_CNTRL1_FCS_EN | \
+ IX_ETH_ACC_TX_CNTRL1_2DEFER | \
+ IX_ETH_ACC_TX_CNTRL1_PAD_EN)
+
+#define IX_ETH_ACC_TX_MAX_RETRIES_DEFAULT 0x0f
+
+#define IX_ETH_ACC_RX_CNTRL1_DEFAULT (IX_ETH_ACC_RX_CNTRL1_CRC_EN \
+ | IX_ETH_ACC_RX_CNTRL1_RX_EN)
+
+#define IX_ETH_ACC_RX_CNTRL2_DEFAULT 0x0
+
+/* Thresholds determined by NPE firmware FS */
+#define IX_ETH_ACC_MAC_THRESH_P_EMPTY_DEFAULT 0x12
+#define IX_ETH_ACC_MAC_THRESH_P_FULL_DEFAULT 0x30
+
+/* Number of bytes that must be in the tx fifo before
+ transmission commences*/
+#define IX_ETH_ACC_MAC_BUF_SIZE_TX_DEFAULT 0x8
+
+/* One-part deferral values */
+#define IX_ETH_ACC_MAC_TX_DEFER_DEFAULT 0x15
+#define IX_ETH_ACC_MAC_RX_DEFER_DEFAULT 0x16
+
+/* Two-part deferral values... */
+#define IX_ETH_ACC_MAC_TX_TWO_DEFER_1_DEFAULT 0x08
+#define IX_ETH_ACC_MAC_TX_TWO_DEFER_2_DEFAULT 0x07
+
+/* This value applies to MII */
+#define IX_ETH_ACC_MAC_SLOT_TIME_DEFAULT 0x80
+
+/* This value applies to RMII */
+#define IX_ETH_ACC_MAC_SLOT_TIME_RMII_DEFAULT 0xFF
+
+#define IX_ETH_ACC_MAC_ADDR_MASK_DEFAULT 0xFF
+
+#define IX_ETH_ACC_MAC_INT_CLK_THRESH_DEFAULT 0x1
+/*The following is a value chosen at random*/
+#define IX_ETH_ACC_RANDOM_SEED_DEFAULT 0x8
+
+/*By default we must configure the MAC to generate the
+ MDC clock*/
+#define IX_ETH_ACC_CORE_DEFAULT (IX_ETH_ACC_CORE_MDC_EN)
+
+#define IXP425_ETH_ACC_MAX_PHY 2
+#define IXP425_ETH_ACC_MAX_AN_ENTRIES 20
+#define IX_ETH_ACC_MAC_RESET_DELAY 1
+
+#define IX_ETH_ACC_MAC_ALL_BITS_SET 0xFF
+
+#define IX_ETH_ACC_MAC_MSGID_SHL 24
+
+#define IX_ETH_ACC_PORT_DISABLE_DELAY_MSECS 20
+#define IX_ETH_ACC_PORT_DISABLE_DELAY_COUNT 200 /* 4 seconds timeout */
+#define IX_ETH_ACC_PORT_DISABLE_RETRY_COUNT 3
+#define IX_ETH_ACC_MIB_STATS_DELAY_MSECS 2000 /* 2 seconds delay for ethernet stats */
+
+/*Register access macros*/
+#if (CPU == SIMSPARCSOLARIS)
+extern void registerWriteStub (UINT32 base, UINT32 offset, UINT32 val);
+extern UINT32 registerReadStub (UINT32 base, UINT32 offset);
+
+#define REG_WRITE(b,o,v) registerWriteStub(b, o, v)
+#define REG_READ(b,o,v) do { v = registerReadStub(b, o); } while (0)
+#else
+#define REG_WRITE(b,o,v) IX_OSAL_WRITE_LONG((volatile UINT32 *)(b + o), v)
+#define REG_READ(b,o,v) (v = IX_OSAL_READ_LONG((volatile UINT32 *)(b + o)))
+
+#endif
+
+void ixEthAccMacUnload(void);
+IxEthAccStatus ixEthAccMacMemInit(void);
+
+/* MAC core loopback */
+IxEthAccStatus ixEthAccPortLoopbackEnable(IxEthAccPortId portId);
+IxEthAccStatus ixEthAccPortLoopbackDisable(IxEthAccPortId portId);
+
+/* MAC core traffic control */
+IxEthAccStatus ixEthAccPortTxEnablePriv(IxEthAccPortId portId);
+IxEthAccStatus ixEthAccPortTxDisablePriv(IxEthAccPortId portId);
+IxEthAccStatus ixEthAccPortRxEnablePriv(IxEthAccPortId portId);
+IxEthAccStatus ixEthAccPortRxDisablePriv(IxEthAccPortId portId);
+IxEthAccStatus ixEthAccPortMacResetPriv(IxEthAccPortId portId);
+
+/* NPE software loopback */
+IxEthAccStatus ixEthAccNpeLoopbackDisablePriv(IxEthAccPortId portId);
+IxEthAccStatus ixEthAccNpeLoopbackEnablePriv(IxEthAccPortId portId);
+
+#endif /*IxEthAccMac_p_H*/
+
diff --git a/cpu/ixp/npe/include/IxEthAccMii_p.h b/cpu/ixp/npe/include/IxEthAccMii_p.h
new file mode 100644
index 0000000000..aa42f9c2a1
--- /dev/null
+++ b/cpu/ixp/npe/include/IxEthAccMii_p.h
@@ -0,0 +1,97 @@
+/**
+ * @file IxEthAccMii_p.h
+ *
+ * @author Intel Corporation
+ * @date
+ *
+ * @brief MII Header file
+ *
+ * Design Notes:
+ *
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+#ifndef IxEthAccMii_p_H
+#define IxEthAccMii_p_H
+
+/* MII definitions - these have been verified against the LXT971 and LXT972 PHYs*/
+
+#define IXP425_ETH_ACC_MII_MAX_REG 32 /* max register per phy */
+
+#define IX_ETH_ACC_MII_REG_SHL 16
+#define IX_ETH_ACC_MII_ADDR_SHL 21
+
+/* Definitions for MII access routines*/
+
+#define IX_ETH_ACC_MII_GO BIT(31)
+#define IX_ETH_ACC_MII_WRITE BIT(26)
+#define IX_ETH_ACC_MII_TIMEOUT_10TH_SECS 5
+#define IX_ETH_ACC_MII_10TH_SEC_IN_MILLIS 100
+#define IX_ETH_ACC_MII_READ_FAIL BIT(31)
+
+#define IX_ETH_ACC_MII_PHY_DEF_DELAY 300 /* max delay before link up, etc. */
+#define IX_ETH_ACC_MII_PHY_NO_DELAY 0x0 /* do not delay */
+#define IX_ETH_ACC_MII_PHY_NULL 0xff /* PHY is not present */
+#define IX_ETH_ACC_MII_PHY_DEF_ADDR 0x0 /* default PHY's logical address */
+
+#ifndef IX_ETH_ACC_MII_MONITOR_DELAY
+# define IX_ETH_ACC_MII_MONITOR_DELAY 0x5 /* in seconds */
+#endif
+
+/* Register definition */
+
+#define IX_ETH_ACC_MII_CTRL_REG 0x0 /* Control Register */
+#define IX_ETH_ACC_MII_STAT_REG 0x1 /* Status Register */
+#define IX_ETH_ACC_MII_PHY_ID1_REG 0x2 /* PHY identifier 1 Register */
+#define IX_ETH_ACC_MII_PHY_ID2_REG 0x3 /* PHY identifier 2 Register */
+#define IX_ETH_ACC_MII_AN_ADS_REG 0x4 /* Auto-Negotiation */
+ /* Advertisement Register */
+#define IX_ETH_ACC_MII_AN_PRTN_REG 0x5 /* Auto-Negotiation */
+ /* partner ability Register */
+#define IX_ETH_ACC_MII_AN_EXP_REG 0x6 /* Auto-Negotiation */
+ /* Expansion Register */
+#define IX_ETH_ACC_MII_AN_NEXT_REG 0x7 /* Auto-Negotiation */
+ /* next-page transmit Register */
+
+IxEthAccStatus ixEthAccMdioShow (void);
+IxEthAccStatus ixEthAccMiiInit(void);
+void ixEthAccMiiUnload(void);
+
+#endif /*IxEthAccMii_p_H*/
diff --git a/cpu/ixp/npe/include/IxEthAccQueueAssign_p.h b/cpu/ixp/npe/include/IxEthAccQueueAssign_p.h
new file mode 100644
index 0000000000..e5fd16e2fb
--- /dev/null
+++ b/cpu/ixp/npe/include/IxEthAccQueueAssign_p.h
@@ -0,0 +1,137 @@
+/**
+ * @file IxEthAccQueueAssign_p.h
+ *
+ * @author Intel Corporation
+ * @date 06-Mar-2002
+ *
+ * @brief Mapping from QMgr Q's to internal assignment
+ *
+ * Design Notes:
+ *
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+/**
+ * @addtogroup IxEthAccPri
+ *@{
+ */
+
+/*
+ * Os/System dependancies.
+ */
+#include "IxOsal.h"
+
+/*
+ * Intermodule dependancies
+ */
+#include "IxQMgr.h"
+#include "IxQueueAssignments.h"
+
+/* Check range of Q's assigned to this component. */
+#if IX_ETH_ACC_RX_FRAME_ETH_Q >= (IX_QMGR_MIN_QUEUPP_QID ) | \
+ IX_ETH_ACC_RX_FREE_BUFF_ENET0_Q >= (IX_QMGR_MIN_QUEUPP_QID) | \
+ IX_ETH_ACC_RX_FREE_BUFF_ENET1_Q >= (IX_QMGR_MIN_QUEUPP_QID) | \
+ IX_ETH_ACC_TX_FRAME_ENET0_Q >= (IX_QMGR_MIN_QUEUPP_QID) | \
+ IX_ETH_ACC_TX_FRAME_ENET1_Q >= (IX_QMGR_MIN_QUEUPP_QID) | \
+ IX_ETH_ACC_TX_FRAME_DONE_ETH_Q >= (IX_QMGR_MIN_QUEUPP_QID)
+#error "Not all Ethernet Access Queues are betweem 1-31, requires full functionalty Q's unless otherwise validated "
+#endif
+
+/**
+*
+* @typedef IxEthAccQregInfo
+*
+* @brief
+*
+*/
+typedef struct
+{
+ IxQMgrQId qId;
+ char *qName;
+ IxQMgrCallback qCallback;
+ IxQMgrCallbackId callbackTag;
+ IxQMgrQSizeInWords qSize;
+ IxQMgrQEntrySizeInWords qWords;
+ BOOL qNotificationEnableAtStartup;
+ IxQMgrSourceId qConditionSource;
+ IxQMgrWMLevel AlmostEmptyThreshold;
+ IxQMgrWMLevel AlmostFullThreshold;
+
+} IxEthAccQregInfo;
+
+/*
+ * Prototypes for all QM callbacks.
+ */
+
+/*
+ * Rx Callbacks
+ */
+IX_ETH_ACC_PUBLIC
+void ixEthRxFrameQMCallback(IxQMgrQId, IxQMgrCallbackId);
+
+IX_ETH_ACC_PUBLIC
+void ixEthRxMultiBufferQMCallback(IxQMgrQId, IxQMgrCallbackId);
+
+IX_ETH_ACC_PUBLIC
+void ixEthRxFreeQMCallback(IxQMgrQId, IxQMgrCallbackId);
+
+/*
+ * Tx Callback.
+ */
+IX_ETH_ACC_PUBLIC
+void ixEthTxFrameQMCallback(IxQMgrQId, IxQMgrCallbackId);
+
+IX_ETH_ACC_PUBLIC
+void ixEthTxFrameDoneQMCallback(IxQMgrQId, IxQMgrCallbackId );
+
+
+#define IX_ETH_ACC_QM_QUEUE_DISPATCH_PRIORITY (IX_QMGR_Q_PRIORITY_0) /* Highest priority */
+
+/*
+ * Queue watermarks
+ */
+#define IX_ETH_ACC_RX_FRAME_ETH_Q_SOURCE (IX_QMGR_Q_SOURCE_ID_NOT_E )
+#define IX_ETH_ACC_RX_FREE_BUFF_ENET0_Q_SOURCE (IX_QMGR_Q_SOURCE_ID_E )
+#define IX_ETH_ACC_RX_FREE_BUFF_ENET1_Q_SOURCE (IX_QMGR_Q_SOURCE_ID_E )
+#define IX_ETH_ACC_RX_FREE_BUFF_ENET2_Q_SOURCE (IX_QMGR_Q_SOURCE_ID_E )
+#define IX_ETH_ACC_TX_FRAME_ENET0_Q_SOURCE (IX_QMGR_Q_SOURCE_ID_E )
+#define IX_ETH_ACC_TX_FRAME_ENET1_Q_SOURCE (IX_QMGR_Q_SOURCE_ID_E )
+#define IX_ETH_ACC_TX_FRAME_ENET2_Q_SOURCE (IX_QMGR_Q_SOURCE_ID_E )
+#define IX_ETH_ACC_TX_FRAME_DONE_ETH_Q_SOURCE (IX_QMGR_Q_SOURCE_ID_NOT_E )
diff --git a/cpu/ixp/npe/include/IxEthAcc_p.h b/cpu/ixp/npe/include/IxEthAcc_p.h
new file mode 100644
index 0000000000..37c55605d3
--- /dev/null
+++ b/cpu/ixp/npe/include/IxEthAcc_p.h
@@ -0,0 +1,325 @@
+/**
+ * @file IxEthAcc_p.h
+ *
+ * @author Intel Corporation
+ * @date 12-Feb-2002
+ *
+ * @brief Internal Header file for IXP425 Ethernet Access component.
+ *
+ * Design Notes:
+ *
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+/**
+ * @addtogroup IxEthAccPri
+ *@{
+ */
+
+#ifndef IxEthAcc_p_H
+#define IxEthAcc_p_H
+
+/*
+ * Os/System dependancies.
+ */
+#include "IxOsal.h"
+
+/*
+ * Intermodule dependancies
+ */
+#include "IxNpeDl.h"
+#include "IxQMgr.h"
+
+#include "IxEthNpe.h"
+
+/*
+ * Intra module dependancies
+ */
+
+#include "IxEthAccDataPlane_p.h"
+#include "IxEthAccMac_p.h"
+
+
+#define INLINE __inline__
+
+#ifdef NDEBUG
+
+#define IX_ETH_ACC_PRIVATE static
+
+#else
+
+#define IX_ETH_ACC_PRIVATE
+
+#endif /* ndef NDEBUG */
+
+#define IX_ETH_ACC_PUBLIC
+
+
+#define IX_ETH_ACC_IS_PORT_VALID(port) ((port) < IX_ETH_ACC_NUMBER_OF_PORTS ? TRUE : FALSE )
+
+
+
+#ifndef NDEBUG
+#define IX_ETH_ACC_FATAL_LOG(a,b,c,d,e,f,g) { ixOsalLog ( IX_OSAL_LOG_LVL_FATAL,IX_OSAL_LOG_DEV_STDOUT,a,b,c,d,e,f,g);}
+#define IX_ETH_ACC_WARNING_LOG(a,b,c,d,e,f,g) { ixOsalLog ( IX_OSAL_LOG_LVL_WARNING,IX_OSAL_LOG_DEV_STDOUT,a,b,c,d,e,f,g);}
+#define IX_ETH_ACC_DEBUG_LOG(a,b,c,d,e,f,g) { ixOsalLog ( IX_OSAL_LOG_LVL_FATAL,IX_OSAL_LOG_DEV_STDOUT,a,b,c,d,e,f,g);}
+#else
+#define IX_ETH_ACC_FATAL_LOG(a,b,c,d,e,f,g) { ixOsalLog ( IX_OSAL_LOG_LVL_FATAL,IX_OSAL_LOG_DEV_STDOUT,a,b,c,d,e,f,g);}
+#define IX_ETH_ACC_WARNING_LOG(a,b,c,d,e,f,g) { ixOsalLog ( IX_OSAL_LOG_LVL_WARNING,IX_OSAL_LOG_DEV_STDOUT,a,b,c,d,e,f,g);}
+#define IX_ETH_ACC_DEBUG_LOG(a,b,c,d,e,f,g) {}
+#endif
+
+IX_ETH_ACC_PUBLIC IxEthAccStatus ixEthAccInitDataPlane(void);
+IX_ETH_ACC_PUBLIC IxEthAccStatus ixEthAccQMgrQueuesConfig(void);
+IX_ETH_ACC_PUBLIC IxEthAccStatus ixEthAccQMgrRxCallbacksRegister(IxQMgrCallback ixQMgrCallback);
+IX_ETH_ACC_PUBLIC IxEthAccStatus ixEthAccSingleEthNpeCheck(IxEthAccPortId portId);
+IX_ETH_ACC_PUBLIC void ixEthAccQMgrRxQEntryGet(UINT32 *numRxQueueEntries);
+
+/* prototypes for the private control plane functions (used by the control interface wrapper) */
+IX_ETH_ACC_PUBLIC IxEthAccStatus ixEthAccPortEnablePriv(IxEthAccPortId portId);
+IX_ETH_ACC_PUBLIC IxEthAccStatus ixEthAccPortDisablePriv(IxEthAccPortId portId);
+IX_ETH_ACC_PUBLIC IxEthAccStatus ixEthAccPortEnabledQueryPriv(IxEthAccPortId portId, BOOL *enabled);
+IX_ETH_ACC_PUBLIC IxEthAccStatus ixEthAccPortPromiscuousModeClearPriv(IxEthAccPortId portId);
+IX_ETH_ACC_PUBLIC IxEthAccStatus ixEthAccPortPromiscuousModeSetPriv(IxEthAccPortId portId);
+IX_ETH_ACC_PUBLIC IxEthAccStatus ixEthAccPortUnicastMacAddressSetPriv(IxEthAccPortId portId, IxEthAccMacAddr *macAddr);
+IX_ETH_ACC_PUBLIC IxEthAccStatus ixEthAccPortUnicastMacAddressGetPriv(IxEthAccPortId portId, IxEthAccMacAddr *macAddr);
+IX_ETH_ACC_PUBLIC IxEthAccStatus ixEthAccPortMulticastAddressJoinPriv(IxEthAccPortId portId, IxEthAccMacAddr *macAddr);
+IX_ETH_ACC_PUBLIC IxEthAccStatus ixEthAccPortMulticastAddressJoinAllPriv(IxEthAccPortId portId);
+IX_ETH_ACC_PUBLIC IxEthAccStatus ixEthAccPortMulticastAddressLeavePriv(IxEthAccPortId portId, IxEthAccMacAddr *macAddr);
+IX_ETH_ACC_PUBLIC IxEthAccStatus ixEthAccPortMulticastAddressLeaveAllPriv(IxEthAccPortId portId);
+IX_ETH_ACC_PUBLIC IxEthAccStatus ixEthAccPortUnicastAddressShowPriv(IxEthAccPortId portId);
+IX_ETH_ACC_PUBLIC void ixEthAccPortMulticastAddressShowPriv(IxEthAccPortId portId);
+IX_ETH_ACC_PUBLIC IxEthAccStatus ixEthAccPortDuplexModeSetPriv(IxEthAccPortId portId, IxEthAccDuplexMode mode);
+IX_ETH_ACC_PUBLIC IxEthAccStatus ixEthAccPortDuplexModeGetPriv(IxEthAccPortId portId, IxEthAccDuplexMode *mode);
+IX_ETH_ACC_PUBLIC IxEthAccStatus ixEthAccPortTxFrameAppendPaddingEnablePriv(IxEthAccPortId portId);
+IX_ETH_ACC_PUBLIC IxEthAccStatus ixEthAccPortTxFrameAppendPaddingDisablePriv(IxEthAccPortId portId);
+IX_ETH_ACC_PUBLIC IxEthAccStatus ixEthAccPortTxFrameAppendFCSEnablePriv(IxEthAccPortId portId);
+IX_ETH_ACC_PUBLIC IxEthAccStatus ixEthAccPortTxFrameAppendFCSDisablePriv(IxEthAccPortId portId);
+IX_ETH_ACC_PUBLIC IxEthAccStatus ixEthAccPortRxFrameAppendFCSEnablePriv(IxEthAccPortId portId);
+IX_ETH_ACC_PUBLIC IxEthAccStatus ixEthAccPortRxFrameAppendFCSDisablePriv(IxEthAccPortId portId);
+IX_ETH_ACC_PUBLIC IxEthAccStatus ixEthAccTxSchedulingDisciplineSetPriv(IxEthAccPortId portId, IxEthAccSchedulerDiscipline sched);
+IX_ETH_ACC_PUBLIC IxEthAccStatus ixEthAccRxSchedulingDisciplineSetPriv(IxEthAccSchedulerDiscipline sched);
+
+/**
+ * @struct ixEthAccRxDataStats
+ * @brief Stats data structures for data path. - Not obtained from h/w
+ *
+ */
+typedef struct
+{
+ UINT32 rxFrameClientCallback;
+ UINT32 rxFreeRepOK;
+ UINT32 rxFreeRepDelayed;
+ UINT32 rxFreeRepFromSwQOK;
+ UINT32 rxFreeRepFromSwQDelayed;
+ UINT32 rxFreeLateNotificationEnabled;
+ UINT32 rxFreeLowCallback;
+ UINT32 rxFreeOverflow;
+ UINT32 rxFreeLock;
+ UINT32 rxDuringDisable;
+ UINT32 rxSwQDuringDisable;
+ UINT32 rxUnlearnedMacAddress;
+ UINT32 rxPriority[IX_ETH_ACC_TX_PRIORITY_7 + 1];
+ UINT32 rxUnexpectedError;
+ UINT32 rxFiltered;
+} IxEthAccRxDataStats;
+
+/**
+ * @struct IxEthAccTxDataStats
+ * @brief Stats data structures for data path. - Not obtained from h/w
+ *
+ */
+typedef struct
+{
+ UINT32 txQOK;
+ UINT32 txQDelayed;
+ UINT32 txFromSwQOK;
+ UINT32 txFromSwQDelayed;
+ UINT32 txLowThreshCallback;
+ UINT32 txDoneClientCallback;
+ UINT32 txDoneClientCallbackDisable;
+ UINT32 txOverflow;
+ UINT32 txLock;
+ UINT32 txPriority[IX_ETH_ACC_TX_PRIORITY_7 + 1];
+ UINT32 txLateNotificationEnabled;
+ UINT32 txDoneDuringDisable;
+ UINT32 txDoneSwQDuringDisable;
+ UINT32 txUnexpectedError;
+} IxEthAccTxDataStats;
+
+/* port Disable state machine : list of states */
+typedef enum
+{
+ /* general port states */
+ DISABLED = 0,
+ ACTIVE,
+
+ /* particular Tx/Rx states */
+ REPLENISH,
+ RECEIVE,
+ TRANSMIT,
+ TRANSMIT_DONE
+} IxEthAccPortDisableState;
+
+typedef struct
+{
+ BOOL fullDuplex;
+ BOOL rxFCSAppend;
+ BOOL txFCSAppend;
+ BOOL txPADAppend;
+ BOOL enabled;
+ BOOL promiscuous;
+ BOOL joinAll;
+ IxOsalMutex ackMIBStatsLock;
+ IxOsalMutex ackMIBStatsResetLock;
+ IxOsalMutex MIBStatsGetAccessLock;
+ IxOsalMutex MIBStatsGetResetAccessLock;
+ IxOsalMutex npeLoopbackMessageLock;
+ IxEthAccMacAddr mcastAddrsTable[IX_ETH_ACC_MAX_MULTICAST_ADDRESSES];
+ UINT32 mcastAddrIndex;
+ IX_OSAL_MBUF *portDisableTxMbufPtr;
+ IX_OSAL_MBUF *portDisableRxMbufPtr;
+
+ volatile IxEthAccPortDisableState portDisableState;
+ volatile IxEthAccPortDisableState rxState;
+ volatile IxEthAccPortDisableState txState;
+
+ BOOL initDone;
+ BOOL macInitialised;
+} IxEthAccMacState;
+
+/**
+ * @struct IxEthAccRxInfo
+ * @brief System-wide data structures associated with the data plane.
+ *
+ */
+typedef struct
+{
+ IxQMgrQId higherPriorityQueue[IX_QMGR_MAX_NUM_QUEUES]; /**< higher priority queue list */
+ IxEthAccSchedulerDiscipline schDiscipline; /**< Receive Xscale QoS type */
+} IxEthAccInfo;
+
+/**
+ * @struct IxEthAccRxDataInfo
+ * @brief Per Port data structures associated with the receive data plane.
+ *
+ */
+typedef struct
+{
+ IxQMgrQId rxFreeQueue; /**< rxFree Queue for this port */
+ IxEthAccPortRxCallback rxCallbackFn;
+ UINT32 rxCallbackTag;
+ IxEthAccDataPlaneQList freeBufferList;
+ IxEthAccPortMultiBufferRxCallback rxMultiBufferCallbackFn;
+ UINT32 rxMultiBufferCallbackTag;
+ BOOL rxMultiBufferCallbackInUse;
+ IxEthAccRxDataStats stats; /**< Receive s/w stats */
+} IxEthAccRxDataInfo;
+
+/**
+ * @struct IxEthAccTxDataInfo
+ * @brief Per Port data structures associated with the transmit data plane.
+ *
+ */
+typedef struct
+{
+ IxEthAccPortTxDoneCallback txBufferDoneCallbackFn;
+ UINT32 txCallbackTag;
+ IxEthAccDataPlaneQList txQ[IX_ETH_ACC_NUM_TX_PRIORITIES]; /**< Transmit Q */
+ IxEthAccSchedulerDiscipline schDiscipline; /**< Transmit Xscale QoS */
+ IxQMgrQId txQueue; /**< txQueue for this port */
+ IxEthAccTxDataStats stats; /**< Transmit s/w stats */
+} IxEthAccTxDataInfo;
+
+
+/**
+ * @struct IxEthAccPortDataInfo
+ * @brief Per Port data structures associated with the port data plane.
+ *
+ */
+typedef struct
+{
+ BOOL portInitialized;
+ UINT32 npeId; /**< NpeId for this port */
+ IxEthAccTxDataInfo ixEthAccTxData; /**< Transmit data control structures */
+ IxEthAccRxDataInfo ixEthAccRxData; /**< Recieve data control structures */
+} IxEthAccPortDataInfo;
+
+extern IxEthAccPortDataInfo ixEthAccPortData[];
+#define IX_ETH_IS_PORT_INITIALIZED(port) (ixEthAccPortData[port].portInitialized)
+
+extern BOOL ixEthAccServiceInit;
+#define IX_ETH_ACC_IS_SERVICE_INITIALIZED() (ixEthAccServiceInit == TRUE )
+
+/*
+ * Maximum number of frames to consume from the Rx Frame Q.
+ */
+
+#define IX_ETH_ACC_MAX_RX_FRAME_CONSUME_PER_CALLBACK (128)
+
+/*
+ * Max number of times to load the Rx Free Q from callback.
+ */
+#define IX_ETH_ACC_MAX_RX_FREE_BUFFERS_LOAD (256) /* Set greater than depth of h/w Q + drain time at line rate */
+
+/*
+ * Max number of times to read from the Tx Done Q in one sitting.
+ */
+
+#define IX_ETH_ACC_MAX_TX_FRAME_DONE_CONSUME_PER_CALLBACK (256)
+
+/*
+ * Max number of times to take buffers from S/w queues and write them to the H/w Tx
+ * queues on receipt of a Tx low threshold callback
+ */
+
+#define IX_ETH_ACC_MAX_TX_FRAME_TX_CONSUME_PER_CALLBACK (16)
+
+
+#define IX_ETH_ACC_FLUSH_CACHE(addr,size) IX_OSAL_CACHE_FLUSH((addr),(size))
+#define IX_ETH_ACC_INVALIDATE_CACHE(addr,size) IX_OSAL_CACHE_INVALIDATE((addr),(size))
+
+
+#define IX_ETH_ACC_MEMSET(start,value,size) memset(start,value,size)
+
+#endif /* ndef IxEthAcc_p_H */
+
+
+
diff --git a/cpu/ixp/npe/include/IxEthDB.h b/cpu/ixp/npe/include/IxEthDB.h
new file mode 100644
index 0000000000..1189c9a140
--- /dev/null
+++ b/cpu/ixp/npe/include/IxEthDB.h
@@ -0,0 +1,2373 @@
+/** @file IxEthDB.h
+ *
+ * @brief this file contains the public API of @ref IxEthDB component
+ *
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ *
+ */
+
+#ifndef IxEthDB_H
+#define IxEthDB_H
+
+#include <IxOsBuffMgt.h>
+#include <IxTypes.h>
+
+/**
+ * @defgroup IxEthDB IXP400 Ethernet Database (IxEthDB) API
+ *
+ * @brief ethDB is a library that does provides a MAC address database learning/filtering capability
+ *
+ *@{
+ */
+
+#define INLINE __inline__
+
+#define IX_ETH_DB_PRIVATE PRIVATE /* imported from IxTypes.h */
+
+#define IX_ETH_DB_PUBLIC PUBLIC
+
+/**
+ * @brief port ID => message handler NPE id conversion (0 => NPE_B, 1 => NPE_C)
+ */
+#define IX_ETH_DB_PORT_ID_TO_NPE(id) (id == 0 ? 1 : (id == 1 ? 2 : (id == 2 ? 0 : -1)))
+
+/**
+ * @def IX_ETH_DB_NPE_TO_PORT_ID(npe)
+ * @brief message handler NPE id => port ID conversion (NPE_B => 0, NPE_C => 1)
+ */
+#define IX_ETH_DB_NPE_TO_PORT_ID(npe) (npe == 0 ? 2 : (npe == 1 ? 0 : (npe == 2 ? 1 : -1)))
+
+/* temporary define - won't work for Azusa */
+#define IX_ETH_DB_PORT_ID_TO_NPE_LOGICAL_ID(id) (IX_ETH_DB_PORT_ID_TO_NPE(id) << 4)
+#define IX_ETH_DB_NPE_LOGICAL_ID_TO_PORT_ID(id) (IX_ETH_DB_NPE_TO_PORT_ID(id >> 4))
+
+/**
+ * @def IX_IEEE803_MAC_ADDRESS_SIZE
+ * @brief The size of the MAC address
+ */
+#define IX_IEEE803_MAC_ADDRESS_SIZE (6)
+
+/**
+ * @def IX_IEEE802_1Q_QOS_PRIORITY_COUNT
+ * @brief Number of QoS priorities defined by IEEE802.1Q
+ */
+#define IX_IEEE802_1Q_QOS_PRIORITY_COUNT (8)
+
+/**
+ * @enum IxEthDBStatus
+ * @brief Ethernet Database API return values
+ */
+typedef enum /* IxEthDBStatus */
+{
+ IX_ETH_DB_SUCCESS = IX_SUCCESS, /**< Success */
+ IX_ETH_DB_FAIL = IX_FAIL, /**< Failure */
+ IX_ETH_DB_INVALID_PORT, /**< Invalid port */
+ IX_ETH_DB_PORT_UNINITIALIZED, /**< Port not initialized */
+ IX_ETH_DB_MAC_UNINITIALIZED, /**< MAC not initialized */
+ IX_ETH_DB_INVALID_ARG, /**< Invalid argument */
+ IX_ETH_DB_NO_SUCH_ADDR, /**< Address not found for search or delete operations */
+ IX_ETH_DB_NOMEM, /**< Learning database memory full */
+ IX_ETH_DB_BUSY, /**< Learning database cannot complete operation, access temporarily blocked */
+ IX_ETH_DB_END, /**< Database browser passed the end of the record set */
+ IX_ETH_DB_INVALID_VLAN, /**< Invalid VLAN ID (valid range is 0..4094, 0 signifies no VLAN membership, used for priority tagged frames) */
+ IX_ETH_DB_INVALID_PRIORITY, /**< Invalid QoS priority/traffic class (valid range for QoS priority is 0..7, valid range for traffic class depends on run-time configuration) */
+ IX_ETH_DB_NO_PERMISSION, /**< No permission for attempted operation */
+ IX_ETH_DB_FEATURE_UNAVAILABLE, /**< Feature not available (or not enabled) */
+ IX_ETH_DB_INVALID_KEY, /**< Invalid search key */
+ IX_ETH_DB_INVALID_RECORD_TYPE /**< Invalid record type */
+} IxEthDBStatus;
+
+/** @brief VLAN ID type, valid range is 0..4094, 0 signifying no VLAN membership */
+typedef UINT32 IxEthDBVlanId;
+
+/** @brief 802.1Q VLAN tag, contains 3 bits user priority, 1 bit CFI, 12 bits VLAN ID */
+typedef UINT32 IxEthDBVlanTag;
+
+/** @brief QoS priority/traffic class type, valid range is 0..7, 0 being the lowest */
+typedef UINT32 IxEthDBPriority;
+
+/** @brief Priority mapping table; 0..7 QoS priorities used to index, table contains traffic classes */
+typedef UINT8 IxEthDBPriorityTable[8];
+
+/** @brief A 4096 bit array used to map the complete VLAN ID range */
+typedef UINT8 IxEthDBVlanSet[512];
+
+#define IX_ETH_DB_802_1Q_VLAN_MASK (0xFFF)
+#define IX_ETH_DB_802_1Q_QOS_MASK (0x7)
+
+#define IX_ETH_DB_802_1Q_MAX_VLAN_ID (0xFFE)
+
+/**
+ * @def IX_ETH_DB_SET_VLAN_ID
+ * @brief returns the given 802.1Q tag with the VLAN ID field substituted with the given VLAN ID
+ *
+ * This macro is used to change the VLAN ID in a 802.1Q tag.
+ *
+ * Example:
+ *
+ * tag = IX_ETH_DB_SET_VLAN_ID(tag, 32)
+ *
+ * inserts the VLAN ID "32" in the given tag.
+ */
+#define IX_ETH_DB_SET_VLAN_ID(vlanTag, vlanID) (((vlanTag) & 0xF000) | ((vlanID) & IX_ETH_DB_802_1Q_VLAN_MASK))
+
+/**
+* @def IX_ETH_DB_GET_VLAN_ID
+* @brief returns the VLAN ID from the given 802.1Q tag
+*/
+#define IX_ETH_DB_GET_VLAN_ID(vlanTag) ((vlanTag) & IX_ETH_DB_802_1Q_VLAN_MASK)
+
+#define IX_ETH_DB_GET_QOS_PRIORITY(vlanTag) (((vlanTag) >> 13) & IX_ETH_DB_802_1Q_QOS_MASK)
+
+#define IX_ETH_DB_SET_QOS_PRIORITY(vlanTag, priority) (((vlanTag) & 0x1FFF) | (((priority) & IX_ETH_DB_802_1Q_QOS_MASK) << 13))
+
+#define IX_ETH_DB_CHECK_VLAN_TAG(vlanTag) { if(((vlanTag & 0xFFFF0000) != 0) || (IX_ETH_DB_GET_VLAN_ID(vlanTag) > 4094)) return IX_ETH_DB_INVALID_VLAN; }
+
+#define IX_ETH_DB_CHECK_VLAN_ID(vlanId) { if (vlanId > IX_ETH_DB_802_1Q_MAX_VLAN_ID) return IX_ETH_DB_INVALID_VLAN; }
+
+#define IX_IEEE802_1Q_VLAN_TPID (0x8100)
+
+typedef enum
+{
+ IX_ETH_DB_UNTAGGED_FRAMES = 0x1, /**< Accepts untagged frames */
+ IX_ETH_DB_VLAN_TAGGED_FRAMES = 0x2, /**< Accepts tagged frames */
+ IX_ETH_DB_PRIORITY_TAGGED_FRAMES = 0x4, /**< Accepts tagged frames with VLAN ID set to 0 (no VLAN membership) */
+ IX_ETH_DB_ACCEPT_ALL_FRAMES =
+ IX_ETH_DB_UNTAGGED_FRAMES | IX_ETH_DB_VLAN_TAGGED_FRAMES /**< Accepts all the frames */
+} IxEthDBFrameFilter;
+
+typedef enum
+{
+ IX_ETH_DB_PASS_THROUGH = 0x1, /**< Leave frame as-is */
+ IX_ETH_DB_ADD_TAG = 0x2, /**< Add default port VLAN tag */
+ IX_ETH_DB_REMOVE_TAG = 0x3 /**< Remove VLAN tag from frame */
+} IxEthDBTaggingAction;
+
+typedef enum
+{
+ IX_ETH_DB_FIREWALL_WHITE_LIST = 0x1, /**< Firewall operates in white-list mode (MAC address based admission) */
+ IX_ETH_DB_FIREWALL_BLACK_LIST = 0x2 /**< Firewall operates in black-list mode (MAC address based blocking) */
+} IxEthDBFirewallMode;
+
+typedef enum
+{
+ IX_ETH_DB_FILTERING_RECORD = 0x01, /**< <table><caption> Filtering record </caption>
+ * <tr><td> MAC address <td> static/dynamic type <td> age
+ * </table>
+ */
+ IX_ETH_DB_FILTERING_VLAN_RECORD = 0x02, /**< <table><caption> VLAN-enabled filtering record </caption>
+ * <tr><td> MAC address <td> static/dynamic type <td> age <td> 802.1Q tag
+ * </table>
+ */
+ IX_ETH_DB_WIFI_RECORD = 0x04, /**< <table><caption> WiFi header conversion record </caption>
+ * <tr><td> MAC address <td> optional gateway MAC address <td>
+ * </table>
+ */
+ IX_ETH_DB_FIREWALL_RECORD = 0x08, /**< <table><caption> Firewall record </caption>
+ * <tr><td> MAC address
+ * </table>
+ */
+ IX_ETH_DB_GATEWAY_RECORD = 0x10, /**< <i>For internal use only</i> */
+ IX_ETH_DB_MAX_RECORD_TYPE_INDEX = 0x10, /**< <i>For internal use only</i> */
+ IX_ETH_DB_NO_RECORD_TYPE = 0, /**< None of the registered record types */
+ IX_ETH_DB_ALL_FILTERING_RECORDS = IX_ETH_DB_FILTERING_RECORD | IX_ETH_DB_FILTERING_VLAN_RECORD, /**< All the filtering records */
+ IX_ETH_DB_ALL_RECORD_TYPES = IX_ETH_DB_FILTERING_RECORD | IX_ETH_DB_FILTERING_VLAN_RECORD |
+ IX_ETH_DB_WIFI_RECORD | IX_ETH_DB_FIREWALL_RECORD /**< All the record types registered within EthDB */
+} IxEthDBRecordType;
+
+typedef enum
+{
+ IX_ETH_DB_LEARNING = 0x01, /**< Learning feature; enables EthDB to learn MAC address (filtering) records, including 802.1Q enabled records */
+ IX_ETH_DB_FILTERING = 0x02, /**< Filtering feature; enables EthDB to communicate with the NPEs for downloading filtering information in the NPEs; depends on the learning feature */
+ IX_ETH_DB_VLAN_QOS = 0x04, /**< VLAN/QoS feature; enables EthDB to configure NPEs to operate in VLAN/QoS aware modes */
+ IX_ETH_DB_FIREWALL = 0x08, /**< Firewall feature; enables EthDB to configure NPEs to operate in firewall mode, using white/black address lists */
+ IX_ETH_DB_SPANNING_TREE_PROTOCOL = 0x10, /**< Spanning tree protocol feature; enables EthDB to configure the NPEs as STP nodes */
+ IX_ETH_DB_WIFI_HEADER_CONVERSION = 0x20 /**< WiFi 802.3 to 802.11 header conversion feature; enables EthDB to handle WiFi conversion data */
+} IxEthDBFeature;
+
+typedef UINT32 IxEthDBProperty; /**< Property ID type */
+
+typedef enum
+{
+ IX_ETH_DB_INTEGER_PROPERTY = 0x1, /**< 4 byte unsigned integer type */
+ IX_ETH_DB_STRING_PROPERTY = 0x2, /**< NULL-terminated string type of maximum 255 characters (including the terminator) */
+ IX_ETH_DB_MAC_ADDR_PROPERTY = 0x3, /**< 6 byte MAC address type */
+ IX_ETH_DB_BOOL_PROPERTY = 0x4 /**< 4 byte boolean type; can contain only TRUE and FALSE values */
+} IxEthDBPropertyType;
+
+/* list of supported properties for the IX_ETH_DB_VLAN_QOS feature */
+#define IX_ETH_DB_QOS_TRAFFIC_CLASS_COUNT_PROPERTY (0x01) /**< Property identifying number the supported number of traffic classes */
+#define IX_ETH_DB_QOS_TRAFFIC_CLASS_0_RX_QUEUE_PROPERTY (0x10) /**< Rx queue assigned to traffic class 0 */
+#define IX_ETH_DB_QOS_TRAFFIC_CLASS_1_RX_QUEUE_PROPERTY (0x11) /**< Rx queue assigned to traffic class 1 */
+#define IX_ETH_DB_QOS_TRAFFIC_CLASS_2_RX_QUEUE_PROPERTY (0x12) /**< Rx queue assigned to traffic class 2 */
+#define IX_ETH_DB_QOS_TRAFFIC_CLASS_3_RX_QUEUE_PROPERTY (0x13) /**< Rx queue assigned to traffic class 3 */
+#define IX_ETH_DB_QOS_TRAFFIC_CLASS_4_RX_QUEUE_PROPERTY (0x14) /**< Rx queue assigned to traffic class 4 */
+#define IX_ETH_DB_QOS_TRAFFIC_CLASS_5_RX_QUEUE_PROPERTY (0x15) /**< Rx queue assigned to traffic class 5 */
+#define IX_ETH_DB_QOS_TRAFFIC_CLASS_6_RX_QUEUE_PROPERTY (0x16) /**< Rx queue assigned to traffic class 6 */
+#define IX_ETH_DB_QOS_TRAFFIC_CLASS_7_RX_QUEUE_PROPERTY (0x17) /**< Rx queue assigned to traffic class 7 */
+
+/* private property used by EthAcc to indicate queue configuration complete */
+#define IX_ETH_DB_QOS_QUEUE_CONFIGURATION_COMPLETE (0x18)
+
+/**
+ *
+ * @brief The IEEE 802.3 Ethernet MAC address structure.
+ *
+ * The data should be packed with bytes xx:xx:xx:xx:xx:xx
+ *
+ * @note The data must be packed in network byte order.
+ */
+typedef struct
+{
+ UINT8 macAddress[IX_IEEE803_MAC_ADDRESS_SIZE];
+} IxEthDBMacAddr;
+
+/**
+ * @ingroup IxEthDB
+ *
+ * @brief Definition of an IXP400 port.
+ */
+typedef UINT32 IxEthDBPortId;
+
+/**
+ * @ingroup IxEthDB
+ *
+ * @brief Port dependency map definition
+ */
+typedef UINT8 IxEthDBPortMap[32];
+
+/**
+ * @ingroup IxEthDB
+ *
+ * @fn IxEthDBStatus ixEthDBInit(void)
+ *
+ * @brief Initializes the Ethernet learning/filtering database
+ *
+ * @note calling this function multiple times does not constitute an error;
+ * redundant calls will be ignored, returning IX_ETH_DB_SUCCESS
+ *
+ * @retval IX_ETH_DB_SUCCESS initialization was successful
+ * @retval IX_ETH_DB_FAIL initialization failed (OS error)
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBInit(void);
+
+/**
+ * @ingroup IxEthDB
+ *
+ * @fn IxEthDBStatus ixEthDBUnload(void)
+ *
+ * @brief Stops and prepares the EthDB component for unloading.
+ *
+ * @retval IX_ETH_DB_SUCCESS de-initialization was successful
+ * @retval IX_ETH_DB_BUSY de-initialization failed, ports must be disabled first
+ * @retval IX_ETH_DB_FAIL de-initialization failed (OS error)
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBUnload(void);
+
+/**
+ * @ingroup IxEthDB
+ *
+ * @fn void ixEthDBPortInit(IxEthDBPortId portID)
+ *
+ * @brief Initializes a port
+ *
+ * This function is called automatically by the Ethernet Access
+ * ixEthAccPortInit() routine for Ethernet NPE ports and should be manually
+ * called for any user-defined port (any port that is not one of
+ * the two Ethernet NPEs).
+ *
+ * @param portID @ref IxEthDBPortId [in] - ID of the port to be initialized
+ *
+ * @see IxEthDBPortDefs.h for port definitions
+ *
+ * @note calling this function multiple times does not constitute an error;
+ * redundant calls will be ignored
+ */
+IX_ETH_DB_PUBLIC
+void ixEthDBPortInit(IxEthDBPortId portID);
+
+/**
+ * @ingroup IxEthDB
+ *
+ * @fn IxEthDBStatus ixEthDBPortEnable(IxEthDBPortId portID)
+ *
+ * @brief Enables a port
+ *
+ * This function is called automatically from the Ethernet Access component
+ * ixEthAccPortEnable() routine for Ethernet NPE ports and should be manually
+ * called for any user-defined port (any port that is not one of
+ * the Ethernet NPEs).
+ *
+ * @param portID @ref IxEthDBPortId [in] - ID of the port to enable processing on
+ *
+ * @retval IX_ETH_DB_SUCCESS if enabling is successful
+ * @retval IX_ETH_DB_FAIL if the enabling was not successful due to
+ * a message handler error
+ * @retval IX_ETH_DB_MAC_UNINITIALIZED the MAC address of this port was
+ * not initialized (only for Ethernet NPEs)
+ * @retval IX_ETH_DB_INVALID_PORT if portID is invalid
+ *
+ * @pre ixEthDBPortAddressSet needs to be called prior to enabling the port events
+ * for Ethernet NPEs
+ *
+ * @see ixEthDBPortAddressSet
+ *
+ * @see IxEthDBPortDefs.h for port definitions
+ *
+ * @note calling this function multiple times does not constitute an error;
+ * redundant calls will be ignored
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBPortEnable(IxEthDBPortId portID);
+
+/**
+ * @ingroup IxEthDB
+ *
+ * @fn IxEthDBStatus ixEthDBPortDisable(IxEthDBPortId portID)
+ *
+ * @brief Disables processing on a port
+ *
+ * This function is called automatically from the Ethernet Access component
+ * ixEthAccPortDisable() routine for Ethernet NPE ports and should be manually
+ * called for any user-defined port (any port that is not one of
+ * the Ethernet NPEs).
+ *
+ * @note Calling ixEthAccPortDisable() will disable the respective Ethernet NPE.
+ * After Ethernet NPEs are disabled they are stopped therefore
+ * when re-enabled they need to be reset, downloaded with microcode and started.
+ * For learning to restart working the user needs to call again
+ * ixEthAccPortUnicastMacAddressSet or ixEthDBUnicastAddressSet
+ * with the respective port MAC address.
+ * Residual MAC addresses learnt before the port was disabled are deleted as soon
+ * as the port is disabled. This only applies to dynamic (learnt) entries, static
+ * entries do not dissapear when the port is disabled.
+ *
+ * @param portID @ref IxEthDBPortId [in] - ID of the port to disable processing on
+ *
+ * @retval IX_ETH_DB_SUCCESS if disabling is successful
+ * @retval IX_ETH_DB_FAIL if the disabling was not successful due to
+ * a message handler error
+ * @retval IX_ETH_DB_INVALID_PORT if portID is invalid
+ *
+ * @note calling this function multiple times after the first time completed successfully
+ * does not constitute an error; redundant calls will be ignored and return IX_ETH_DB_SUCCESS
+*/
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBPortDisable(IxEthDBPortId portID);
+
+/**
+ * @ingroup IxEthDB
+ *
+ * @fn IxEthDBStatus ixEthDBPortAddressSet(IxEthDBPortId portID, IxEthDBMacAddr *macAddr)
+ *
+ * @brief Sets the port MAC address
+ *
+ * This function is to be called from the Ethernet Access component top-level
+ * ixEthDBUnicastAddressSet(). Event processing cannot be enabled for a port
+ * until its MAC address has been set.
+ *
+ * @param portID @ref IxEthDBPortId [in] - ID of the port whose MAC address is set
+ * @param macAddr @ref IxEthDBMacAddr [in] - port MAC address
+ *
+ * @retval IX_ETH_DB_SUCCESS MAC address was set successfully
+ * @retval IX_ETH_DB_FAIL MAC address was not set due to a message handler failure
+ * @retval IX_ETH_DB_INVALID_PORT if the port is not an Ethernet NPE
+ *
+ * @see IxEthDBPortDefs.h for port definitions
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBPortAddressSet(IxEthDBPortId portID, IxEthDBMacAddr *macAddr);
+
+/**
+ * @ingroup IxEthDB
+ *
+ * @fn IxEthDBStatus ixEthDBFilteringPortMaximumFrameSizeSet(IxEthDBPortId portID, UINT32 maximumFrameSize)
+ *
+ * @brief Set the maximum frame size supported on the given port ID
+ *
+ * This functions set the maximum frame size supported on a specific port ID
+ *
+ * - Reentrant - yes
+ * - ISR Callable - no
+ *
+ * @param portID @ref IxEthDBPortId [in] - port ID to configure
+ * @param maximumFrameSize UINT32 [in] - maximum frame size to configure
+ *
+ * @retval IX_ETH_DB_SUCCESS the port is configured
+ * @retval IX_ETH_DB_PORT_UNINITIALIZED the port has not been initialized
+ * @retval IX_ETH_DB_INVALID_PORT portID is invalid
+ * @retval IX_ETH_DB_INVALID_ARG size parameter is out of range
+ * @retval IX_ETH_DB_NO_PERMISSION selected port is not an Ethernet NPE
+ * @retval IX_FAIL unknown OS or NPE communication error
+ *
+ * @note
+ * This maximum frame size is used to filter the frames based on their
+ * destination addresses and the capabilities of the destination port.
+ * The mximum value that can be set for a NPE port is 16320.
+ * (IX_ETHNPE_ACC_FRAME_LENGTH_MAX)
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBFilteringPortMaximumFrameSizeSet(IxEthDBPortId portID, UINT32 maximumFrameSize);
+
+/**
+ * @ingroup IxEthDB
+ *
+ * @fn IxEthDBStatus ixEthDBFilteringStaticEntryProvision(IxEthDBPortId portID, IxEthDBMacAddr *macAddr)
+ *
+ * @brief Populate the Ethernet learning/filtering database with a static MAC address
+ *
+ * Populates the Ethernet learning/filtering database with a static MAC address. The entry will not be subject to aging.
+ * If there is an entry (static or dynamic) with the corresponding MAC address on any port this entry will take precedence.
+ * Any other entry with the same MAC address will be removed.
+ *
+ * - Reentrant - yes
+ * - ISR Callable - yes
+ *
+ * @param portID @ref IxEthDBPortId [in] - port ID to add the static address to
+ * @param macAddr @ref IxEthDBMacAddr [in] - static MAC address to add
+ *
+ * @retval IX_ETH_DB_SUCCESS the add was successful
+ * @retval IX_ETH_DB_FAIL failed to populate the database entry
+ * @retval IX_ETH_DB_BUSY failed due to a temporary busy condition (i.e. lack of CPU cycles), try again later
+ * @retval IX_ETH_DB_INVALID_PORT portID is invalid
+ * @retval IX_ETH_DB_PORT_UNINITIALIZED port is not initialized
+ * @retval IX_ETH_DB_INVALID_ARG invalid <i>macAddr</i> pointer argument
+ * @retval IX_ETH_DB_FEATURE_UNAVAILABLE learning feature is disabled
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBFilteringStaticEntryProvision(IxEthDBPortId portID, IxEthDBMacAddr *macAddr);
+
+/**
+ * @ingroup IxEthDB
+ *
+ * @fn IxEthDBStatus ixEthDBFilteringDynamicEntryProvision(IxEthDBPortId portID, IxEthDBMacAddr *macAddr)
+ *
+ * @brief Populate the Ethernet learning/filtering database with a dynamic MAC address
+ *
+ * Populates the Ethernet learning/filtering database with a dynamic MAC address. This entry will be subject to normal
+ * aging function, if aging is enabled on its port.
+ * If there is an entry (static or dynamic) with the same MAC address on any port this entry will take precedence.
+ * Any other entry with the same MAC address will be removed.
+ *
+ * - Reentrant - yes
+ * - ISR Callable - yes
+ *
+ * @param portID @ref IxEthDBPortId [in] - port ID to add the dynamic address to
+ * @param macAddr @ref IxEthDBMacAddr [in] - static MAC address to add
+ *
+ * @retval IX_ETH_DB_SUCCESS the add was successful
+ * @retval IX_ETH_DB_FAIL failed to populate the database entry
+ * @retval IX_ETH_DB_BUSY failed due to a temporary busy condition (i.e. lack of CPU cycles), try again later
+ * @retval IX_ETH_DB_INVALID_PORT portID is invalid
+ * @retval IX_ETH_DB_PORT_UNINITIALIZED port is not initialized
+ * @retval IX_ETH_DB_INVALID_ARG invalid <i>macAddr</i> pointer argument
+ * @retval IX_ETH_DB_FEATURE_UNAVAILABLE learning feature is disabled
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBFilteringDynamicEntryProvision(IxEthDBPortId portID, IxEthDBMacAddr *macAddr);
+
+/**
+ * @ingroup IxEthDB
+ *
+ * @fn IxEthDBStatus ixEthDBFilteringEntryDelete(IxEthDBMacAddr *macAddr)
+ *
+ * @brief Removes a MAC address entry from the Ethernet learning/filtering database
+ *
+ * @param macAddr IxEthDBMacAddr [in] - MAC address to remove
+ *
+ * - Reentrant - yes
+ * - ISR Callable - no
+ *
+ * @retval IX_ETH_DB_SUCCESS the removal was successful
+ * @retval IX_ETH_DB_NO_SUCH_ADDR failed to remove the address (not in the database)
+ * @retval IX_ETH_DB_INVALID_ARG invalid <i>macAddr</i> pointer argument
+ * @retval IX_ETH_DB_BUSY failed due to a temporary busy condition (i.e. lack of CPU cycles), try again later
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBFilteringEntryDelete(IxEthDBMacAddr *macAddr);
+
+/**
+ * @ingroup IxEthDB
+ *
+ * @fn IxEthDBStatus ixEthDBFilteringPortSearch(IxEthDBPortId portID, IxEthDBMacAddr *macAddr)
+ *
+ * @brief Search the Ethernet learning/filtering database for the given MAC address and port ID
+ *
+ * This functions searches the database for a specific port ID and MAC address. Both the port ID
+ * and the MAC address have to match in order for the record to be reported as found.
+ *
+ * - Reentrant - yes
+ * - ISR Callable - no
+ *
+ * @param portID @ref IxEthDBPortId [in] - port ID to search for
+ * @param macAddr @ref IxEthDBMacAddr [in] - MAC address to search for
+ *
+ * @retval IX_ETH_DB_SUCCESS the record exists in the database
+ * @retval IX_ETH_DB_INVALID_ARG invalid macAddr pointer argument
+ * @retval IX_ETH_DB_NO_SUCH_ADDR the record was not found in the database
+ * @retval IX_ETH_DB_INVALID_PORT portID is invalid
+ * @retval IX_ETH_DB_PORT_UNINITIALIZED port ID is not initialized
+ * @retval IX_ETH_DB_FEATURE_UNAVAILABLE learning feature is disabled
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBFilteringPortSearch(IxEthDBPortId portID, IxEthDBMacAddr *macAddr);
+
+/**
+ * @ingroup IxEthDB
+ *
+ * @fn IxEthDBStatus ixEthDBFilteringDatabaseSearch(IxEthDBPortId *portID, IxEthDBMacAddr *macAddr)
+ *
+ * @brief Search the Ethernet learning/filtering database for a MAC address and return the port ID
+ *
+ * Searches the database for a MAC address. The function returns the portID for the
+ * MAC address record, if found. If no match is found the function returns IX_ETH_DB_NO_SUCH_ADDR.
+ * The portID is only valid if the function finds a match.
+ *
+ * - Reentrant - yes
+ * - ISR Callable - no
+ *
+ * @param portID @ref IxEthDBPortId [in] - port ID the address belongs to (populated only on a successful search)
+ * @param macAddr @ref IxEthDBMacAddr [in] - MAC address to search for
+ *
+ * @retval IX_ETH_DB_SUCCESS the record exists in the database
+ * @retval IX_ETH_DB_NO_SUCH_ADDR the record was not found in the database
+ * @retval IX_ETH_DB_INVALID_ARG invalid macAddr or portID pointer argument(s)
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBFilteringDatabaseSearch(IxEthDBPortId *portID, IxEthDBMacAddr *macAddr);
+
+/**
+ * @ingroup IxEthDB
+ *
+ * @fn IxEthDBStatus ixEthDBFilteringPortUpdatingSearch(IxEthDBPortId *portID, IxEthDBMacAddr *macAddr)
+ *
+ * @brief Search the filtering database for a MAC address, return the port ID and reset the record age
+ *
+ * Searches the database for a MAC address. The function returns the portID for the
+ * MAC address record and resets the entry age to 0, if found.
+ * If no match is found the function returns IX_ETH_DB_NO_SUCH_ADDR.
+ * The portID is only valid if the function finds a match.
+ *
+ * - Reentrant - yes
+ * - ISR Callable - no
+ *
+ * @retval IX_ETH_DB_SUCCESS the MAC address was found
+ * @retval IX_ETH_DB_NO_SUCH_ADDR the MAC address was not found
+ * @retval IX_ETH_DB_INVALID_ARG invalid macAddr or portID pointer argument(s)
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBFilteringPortUpdatingSearch(IxEthDBPortId *portID, IxEthDBMacAddr *macAddr);
+
+/**
+ * @ingroup IxEthDB
+ *
+ * @def IX_ETH_DB_MAINTENANCE_TIME
+ *
+ * @brief The @ref ixEthDBDatabaseMaintenance must be called by the user at a frequency of
+ * IX_ETH_DB_MAINTENANCE_TIME
+ *
+ */
+#define IX_ETH_DB_MAINTENANCE_TIME (1 * 60) /* 1 Minute */
+
+/**
+ * @ingroup IxEthDB
+ *
+ * @def IX_ETH_DB_LEARNING_ENTRY_AGE_TIME
+ *
+ * @brief The define specifies the filtering database age entry time. Static entries older than
+ * IX_ETH_DB_LEARNING_ENTRY_AGE_TIME +/- IX_ETH_DB_MAINTENANCE_TIME shall be removed.
+ *
+ */
+#define IX_ETH_DB_LEARNING_ENTRY_AGE_TIME (15 * 60 ) /* 15 Mins */
+
+/**
+ * @ingroup IxEthDB
+ *
+ * @fn IxEthDBStatus ixEthDBPortAgingDisable(IxEthDBPortId portID)
+ *
+ * @brief Disable the aging function for a specific port
+ *
+ * @param portID @ref IxEthDBPortId [in] - port ID to disable aging on
+ *
+ * - Reentrant - yes
+ * - ISR Callable - no
+ *
+ * @retval IX_ETH_DB_SUCCESS aging disabled successfully
+ * @retval IX_ETH_DB_INVALID_PORT portID is invalid
+ * @retval IX_ETH_DB_PORT_UNINITIALIZED port ID is not initialized
+ * @retval IX_ETH_DB_FEATURE_UNAVAILABLE learning feature is disabled
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBPortAgingDisable(IxEthDBPortId portID);
+
+/**
+ * @ingroup IxEthDB
+ *
+ * @fn IxEthDBStatus ixEthDBPortAgingEnable(IxEthDBPortId portID)
+ *
+ * @brief Enable the aging function for a specific port
+ *
+ * Enables the aging of dynamic MAC address entries stored in the learning/filtering database
+ *
+ * @note The aging function relies on the @ref ixEthDBDatabaseMaintenance being called with a period of
+ * @ref IX_ETH_DB_MAINTENANCE_TIME seconds.
+ *
+ * - Reentrant - yes
+ * - ISR Callable - no
+ *
+ * @param portID @ref IxEthDBPortId [in] - port ID to enable aging on
+ *
+ * @retval IX_ETH_DB_SUCCESS aging enabled successfully
+ * @retval IX_ETH_DB_INVALID_PORT portID is invalid
+ * @retval IX_ETH_DB_PORT_UNINITIALIZED port ID is not initialized
+ * @retval IX_ETH_DB_FEATURE_UNAVAILABLE learning feature is disabled
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBPortAgingEnable(IxEthDBPortId portID);
+
+/**
+ * @ingroup IxEthDB
+ *
+ * @fn void ixEthDBDatabaseMaintenance(void)
+ *
+ * @brief Performs a maintenance operation on the Ethernet learning/filtering database
+ *
+ * In order to perform a database maintenance this function must be called every
+ * @ref IX_ETH_DB_MAINTENANCE_TIME seconds. It should be called regardless of whether learning is
+ * enabled or not.
+ *
+ * - Reentrant - no
+ * - ISR Callable - no
+ *
+ * @note this function call will be ignored if the learning feature is disabled
+ */
+IX_ETH_DB_PUBLIC
+void ixEthDBDatabaseMaintenance(void);
+
+/**
+ * @ingroup IxEthDB
+ *
+ * @fn IxEthDBStatus ixEthDBFilteringDatabaseShow(IxEthDBPortId portID)
+ *
+ * @brief This function displays the Mac Ethernet MAC address filtering tables.
+ *
+ * It displays the MAC address, port ID, entry type (dynamic/static),and age for
+ * the given port ID.
+ *
+ * - Reentrant - no
+ * - ISR Callable - no
+ *
+ * @param portID @ref IxEthDBPortId [in] - port ID to display the MAC address entries
+ *
+ * @retval IX_ETH_DB_SUCCESS operation completed successfully
+ * @retval IX_ETH_DB_INVALID_PORT portID is invalid
+ * @retval IX_ETH_DB_PORT_UNINITIALIZED port ID is not initialized
+ * @retval IX_ETH_DB_FAIL record browser failed due to an internal busy or lock condition
+ *
+ * @note this function is deprecated and kept for compatibility reasons; use @ref ixEthDBFilteringDatabaseShowRecords instead
+ *
+ * @see ixEthDBFilteringDatabaseShowRecords
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBFilteringDatabaseShow(IxEthDBPortId portID);
+
+/**
+ * @ingroup IxEthDB
+ *
+ * @fn void ixEthDBFilteringDatabaseShowAll(void)
+ *
+ * @brief Displays the MAC address recorded in the filtering database for all registered
+ * ports (see IxEthDBPortDefs.h), grouped by port ID.
+ *
+ * - Reentrant - no
+ * - ISR Callable - no
+ *
+ * @retval void
+ *
+ * @note this function is deprecated and kept for compatibility reasons; use @ref ixEthDBFilteringDatabaseShowRecords instead
+ *
+ * @see ixEthDBFilteringDatabaseShowRecords
+ */
+IX_ETH_DB_PUBLIC
+void ixEthDBFilteringDatabaseShowAll(void);
+
+/**
+ * @ingroup IxEthDB
+ *
+ * @fn IxEthDBStatus ixEthDBFilteringDatabaseShowRecords(IxEthDBPortId portID, IxEthDBRecordType recordFilter)
+ *
+ * @brief This function displays per port database records, given a record type filter
+ *
+ * The supported record type filters are:
+ *
+ * - IX_ETH_DB_FILTERING_RECORD - displays the non-VLAN filtering records (MAC address, age, static/dynamic)
+ * - IX_ETH_DB_FILTERING_VLAN_RECORD - displays the VLAN filtering records (MAC address, age, static/dynamic, VLAN ID, CFI, QoS class)
+ * - IX_ETH_DB_FILTERING_RECORD | IX_ETH_DB_FILTERING_VLAN_RECORD - displays the previous two types of records
+ * - IX_ETH_DB_WIFI_RECORD - displays the WiFi header conversion records (MAC address, optional gateway MAC address) and WiFi header conversion parameters (BBSID, Duration/ID)
+ * - IX_ETH_DB_FIREWALL_RECORD - displays the firewall MAC address table and firewall operating mode (white list/black list)
+ * - IX_ETH_DB_ALL_RECORD_TYPES - displays all the record types
+ * - IX_ETH_DB_NO_RECORD_TYPE - displays only the port status (no records are displayed)
+ *
+ * Additionally, the status of each port will be displayed, containg the following information: type, capabilities, enabled status,
+ * aging enabled status, group membership and maximum frame size.
+ *
+ * The port ID can either be an actual port or IX_ETH_DB_ALL_PORTS, in which case the requested information
+ * will be displayed for all the ports (grouped by port)
+ *
+ * - Reentrant - no
+ * - ISR Callable - no
+ *
+ * @param portID ID of the port to display information on (use IX_ETH_DB_ALL_PORTS for all the ports)
+ * @param recordFilter record type filter
+ *
+ * @retval IX_ETH_DB_SUCCESS operation completed successfully
+ * @retval IX_ETH_DB_INVALID_PORT portID is invalid
+ * @retval IX_ETH_DB_PORT_UNINITIALIZED port ID is not initialized
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBFilteringDatabaseShowRecords(IxEthDBPortId portID, IxEthDBRecordType recordFilter);
+
+/**
+ * @ingroup IxEthDB
+ *
+ * @fn IxEthDBStatus ixEthDBPortDependencyMapSet(IxEthDBPortId portID, IxEthDBPortMap dependencyPortMap)
+ *
+ * @brief Sets the dependency port map for a port
+ *
+ * @param portID ID of the port to set the dependency map to
+ * @param dependencyPortMap new dependency map (as bitmap, each bit set indicates a port being included)
+ *
+ * This function is used to share filtering information between ports.
+ * By adding a port into another port's dependency map the target port
+ * filtering data will import the filtering data from the port it depends on.
+ * Any changes to filtering data for a port - such as adding, updating or removing records -
+ * will trigger updates in the filtering information for all the ports depending on
+ * on the updated port.
+ *
+ * For example, if ports 2 and 3 are set in the port 0 dependency map the filtering
+ * information for port 0 will also include the filtering information from ports 2 and 3.
+ * Adding a record to port 2 will also trigger an update not only on port 2 but also on
+ * port 0.
+ *
+ * The dependency map is a 256 bit array where each bit corresponds to a port corresponding to the
+ * bit offset (bit 0 - port 0, bit 1 - port 1 etc). Setting a bit to 1 indicates that the corresponding
+ * port is the port map. For example, a dependency port map of 0x14 consists in the ports with IDs 2 and 4.
+ * Note that the last bit (offset 255) is reserved and should never be set (it will be automatically
+ * cleared by the function).
+ *
+ * By default, each port has a dependency port map consisting only of itself, i.e.
+ *
+ * @verbatim
+ IxEthDBPortMap portMap;
+
+ // clear all ports from port map
+ memset(portMap, 0, sizeof (portMap));
+
+ // include portID in port map
+ portMap[portID / 8] = 1 << (portID % 8);
+ @endverbatim
+ *
+ * - Reentrant - no
+ * - ISR Callable - no
+ *
+ * @note Setting dependency maps is useful for NPE ports, which benefit from automatic updates
+ * of filtering information. Setting dependency maps for user-defined ports is not an error
+ * but will have no actual effect.
+ *
+ * @note Including a port in its own dependency map is not compulsory, however note that
+ * in this case updating the port will not trigger an update on the port itself, which
+ * might not be the intended behavior
+ *
+ * @retval IX_ETH_DB_SUCCESS operation completed successfully
+ * @retval IX_ETH_DB_INVALID_PORT portID is not a valid port identifier
+ * @retval IX_ETH_DB_PORT_UNINITIALIZED port is not initialized
+ * @retval IX_ETH_DB_INVALID_ARG invalid <i>dependencyPortMap</i> pointer
+ * @retval IX_ETH_DB_FEATURE_UNAVAILABLE Filtering is not available or not enabled for the port
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBPortDependencyMapSet(IxEthDBPortId portID, IxEthDBPortMap dependencyPortMap);
+
+/**
+ * @ingroup IxEthDB
+ *
+ * @fn IxEthDBStatus ixEthDBPortDependencyMapGet(IxEthDBPortId portID, IxEthDBPortMap dependencyPortMap)
+ *
+ * @brief Retrieves the dependency port map for a port
+ *
+ * @param portID ID of the port to set the dependency map to
+ * @param dependencyPortMap location where the port dependency map is to be copied
+ *
+ * This function will copy the port dependency map to a user specified location.
+ *
+ * - Reentrant - no
+ * - ISR Callable - no
+ *
+ * @retval IX_ETH_DB_SUCCESS operation completed successfully
+ * @retval IX_ETH_DB_INVALID_PORT portID is not a valid port identifier
+ * @retval IX_ETH_DB_PORT_UNINITIALIZED port is not initialized
+ * @retval IX_ETH_DB_INVALID_ARG invalid <i>dependencyPortMap</i> pointer
+ * @retval IX_ETH_DB_FEATURE_UNAVAILABLE Filtering is not available or not enabled for the port
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBPortDependencyMapGet(IxEthDBPortId portID, IxEthDBPortMap dependencyPortMap);
+
+/**
+ * @ingroup IxEthDB
+ *
+ * @fn IxEthDBStatus ixEthDBPortVlanTagSet(IxEthDBPortId portID, IxEthDBVlanTag vlanTag)
+ *
+ * @brief Sets the default 802.1Q VLAN tag for a given port
+ *
+ * @param portID @ref IxEthDBPortId [in] - ID of the port to set the default VLAN tag to
+ * @param vlanTag @ref IxEthDBVlanTag [in] - default 802.1Q VLAN tag
+ *
+ * The tag format has 16 bits and it is defined in the IEEE802.1Q specification.
+ * This tag will be used for tagging untagged frames (if enabled) and classifying
+ * unexpedited traffic into an internal traffic class (using the user priority field).
+ *
+ * <table border="1"> <caption> 802.1Q tag format </caption>
+ * <tr> <td> <b> 3 bits <td> <b> 1 bit <td> <b> 12 bits </b>
+ * <tr> <td> user priority <td> CFI <td> VID
+ * </table>
+ *
+ * User Priority : Defines user priority, giving eight (2^3) priority levels. IEEE 802.1P defines
+ * the operation for these 3 user priority bits
+ *
+ * CFI : Canonical Format Indicator is always set to zero for Ethernet switches. CFI is used for
+ * compatibility reason between Ethernet type network and Token Ring type network. If a frame received
+ * at an Ethernet port has a CFI set to 1, then that frame should not be forwarded as it is to an untagged port.
+ *
+ * VID : VLAN ID is the identification of the VLAN, which is basically used by the standard 802.1Q.
+ * It has 12 bits and allow the id entification of 4096 (2^12) VLANs. Of the 4096 possible VIDs, a VID of 0
+ * is used to identify priority frames and value 4095 (FFF) is reserved, so the maximum possible VLAN
+ * configurations are 4,094.
+ *
+ * - Reentrant - no
+ * - ISR Callable - no
+ *
+ * @retval IX_ETH_DB_SUCCESS operation completed successfully
+ * @retval IX_ETH_DB_INVALID_PORT portID is not a valid port identifier
+ * @retval IX_ETH_DB_PORT_UNINITIALIZED port is not initialized
+ * @retval IX_ETH_DB_FEATURE_UNAVAILABLE VLAN/QoS feature is not available or not enabled for the port
+ * @retval IX_ETH_DB_INVALID_VLAN <i>vlanTag</i> argument does not parse to a valid 802.1Q VLAN tag
+ *
+ * @note a VLAN ID value of 0 indicates that the port is not part of any VLAN
+ * @note the value of the cannonical frame indicator (CFI) field is ignored, the
+ * field being used only in frame tagging operations
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBPortVlanTagSet(IxEthDBPortId portID, IxEthDBVlanTag vlanTag);
+
+/**
+ * @ingroup IxEthDB
+ *
+ * @fn IxEthDBStatus ixEthDBPortVlanTagGet(IxEthDBPortId portID, IxEthDBVlanTag *vlanTag)
+ *
+ * @brief Retrieves the default 802.1Q port VLAN tag for a given port (see also @ref ixEthDBPortVlanTagSet)
+ *
+ * @param portID @ref IxEthDBPortId [in] - ID of the port to retrieve the default VLAN tag from
+ * @param vlanTag @ref IxEthDBVlanTag [out] - location to write the default port 802.1Q VLAN tag to
+ *
+ * - Reentrant - no
+ * - ISR Callable - no
+ *
+ * @retval IX_ETH_DB_SUCCESS operation completed successfully
+ * @retval IX_ETH_DB_INVALID_PORT portID is not a valid port identifier
+ * @retval IX_ETH_DB_PORT_UNINITIALIZED port is not initialized
+ * @retval IX_ETH_DB_INVALID_ARG invalid vlanTag pointer
+ * @retval IX_ETH_DB_FEATURE_UNAVAILABLE VLAN/QoS feature is not available or not enabled for the port
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBPortVlanTagGet(IxEthDBPortId portID, IxEthDBVlanTag *vlanTag);
+
+/**
+ * @ingroup IxEthDB
+ *
+ * @fn IxEthDBStatus ixEthDBVlanTagSet(IxEthDBMacAddr *macAddr, IxEthDBVlanTag vlanTag)
+ *
+ * @brief Sets the 802.1Q VLAN tag for a database record
+ *
+ * @param macAddr MAC address
+ * @param vlanTag 802.1Q VLAN tag
+ *
+ * This function is used together with @ref ixEthDBVlanTagGet to provide MAC-based VLAN classification support.
+ * Please note that the bridging application must contain specific code to make use of this feature (see below).
+ *
+ * VLAN tags can be set only in IX_ETH_DB_FILTERING_RECORD or IX_ETH_DB_FILTERING_VLAN_RECORD type records.
+ * If to an IX_ETH_DB_FILTERING_RECORD type record is added a VLAN tag the record type is automatically
+ * changed to IX_ETH_DB_FILTERING_VLAN_RECORD. Once this has occurred the record type will never
+ * revert to a non-VLAN type (unless deleted and re-added).
+ *
+ * Record types used for different purposes (such as IX_ETH_DB_WIFI_RECORD) will be ignored by
+ * this function.
+ *
+ * After using this function to associate a VLAN ID with a MAC address the VLAN ID can be extracted knowing the
+ * MAC address using @ref ixEthDBVlanTagGet. This mechanism can be used to implement MAC-based VLAN classification
+ * if a bridging application searches for the VLAN tag when receiving a frame based on the source MAC address
+ * (contained in the <i>ixp_ne_src_mac</i> field of the buffer header).
+ * If found in the database, the application can instruct the NPE to tag the frame by writing the VLAN tag
+ * in the <i>ixp_ne_vlan_tci</i> field of the buffer header. This way the NPE will inspect the Egress tagging
+ * rule associated with the given VLAN ID on the Tx port and tag the frame if Egress tagging on the VLAN is
+ * allowed. Additionally, Egress tagging can be forced by setting the <i>ixp_ne_tx_flags.tag_over</i> and
+ * <i>ixp_ne_tx_flags.tag_mode</i> flags in the buffer header.
+ *
+ * - Reentrant - no
+ * - ISR Callable - no
+ *
+ * @note this function will <b>not</b> add a filtering record, it can only be used to update an existing one
+ *
+ * @retval IX_ETH_DB_SUCCESS operation completed successfully
+ * @retval IX_ETH_DB_INVALID_ARG invalid <i>macAddr</i> pointer
+ * @retval IX_ETH_DB_NO_SUCH_ADDR a filtering record with the specified MAC address was not found
+ * @retval IX_ETH_DB_INVALID_VLAN <i>vlanTag</i> argument does not parse to a valid 802.1Q VLAN tag
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBVlanTagSet(IxEthDBMacAddr *macAddr, IxEthDBVlanTag vlanTag);
+
+/**
+ * @ingroup IxEthDB
+ *
+ * @fn ixEthDBVlanTagGet(IxEthDBMacAddr *macAddr, IxEthDBVlanTag *vlanTag)
+ *
+ * @brief Retrieves the 802.1Q VLAN tag from a database record given the record MAC address
+ *
+ * @param macAddr MAC address
+ * @param vlanTag location to write the record 802.1Q VLAN tag to
+ *
+ * @note VLAN tags can be retrieved only from IX_ETH_DB_FILTERING_VLAN_RECORD type records
+ *
+ * This function is used together with ixEthDBVlanTagSet to provide MAC-based VLAN classification support.
+ * Please note that the bridging application must contain specific code to make use of this feature (see @ref ixEthDBVlanTagSet).
+ *
+ * - Reentrant - no
+ * - ISR Callable - no
+ *
+ * @retval IX_ETH_DB_SUCCESS operation completed successfully
+ * @retval IX_ETH_DB_INVALID_ARG invalid <i>macAddr</i> or <i>vlanTag</i> pointer
+ * @retval IX_ETH_DB_NO_SUCH_ADDR a filtering record with the specified MAC address was not found
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBVlanTagGet(IxEthDBMacAddr *macAddr, IxEthDBVlanTag *vlanTag);
+
+/**
+ * @ingroup IxEthDB
+ *
+ * @fn IxEthDBStatus ixEthDBPortVlanMembershipAdd(IxEthDBPortId portID, IxEthDBVlanId vlanID)
+ *
+ * @brief Adds a VLAN ID to a port's VLAN membership table
+ *
+ * Adding a VLAN ID to a port's VLAN membership table will cause frames tagged with the specified
+ * VLAN ID to be accepted by the frame filter, if Ingress VLAN membership filtering is enabled.
+ *
+ * - Reentrant - no
+ * - ISR Callable - no
+ *
+ * @param portID @ref IxEthDBPortId [in] - ID of the port to add the VLAN ID membership to
+ * @param vlanID @ref IxEthDBVlanId [in] - VLAN ID to be added to the port membership table
+ *
+ * @retval IX_ETH_DB_SUCCESS operation completed successfully
+ * @retval IX_ETH_DB_INVALID_PORT portID is not a valid port identifier
+ * @retval IX_ETH_DB_PORT_UNINITIALIZED port is not initialized
+ * @retval IX_ETH_DB_INVALID_VLAN vlanID is not a valid VLAN ID
+ * @retval IX_ETH_DB_FEATURE_UNAVAILABLE VLAN/QoS feature is not available or not enabled for the port
+ * @retval IX_FAIL unknown OS or NPE communication error
+ *
+ * @note A port's default VLAN ID is always in its own membership table, hence there
+ * is no need to explicitly add it using this function (although it is not an error
+ * to do so)
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBPortVlanMembershipAdd(IxEthDBPortId portID, IxEthDBVlanId vlanID);
+
+/**
+ * @ingroup IxEthDB
+ *
+ * @fn IxEthDBStatus ixEthDBPortVlanMembershipRangeAdd(IxEthDBPortId portID, IxEthDBVlanId vlanIDMin, IxEthDBVlanId vlanIDMax)
+ *
+ * @brief Adds a VLAN ID range to a port's VLAN membership table
+ *
+ * All the VLAN IDs in the specified range will be added to the port VLAN
+ * membership table, including the range start and end VLAN IDs. Tagged frames with
+ * VLAN IDs in the specified range will be accepted by the frame filter, if Ingress VLAN
+ * membership filtering is enabled.
+ *
+ * - Reentrant - no
+ * - ISR Callable - no
+ *
+ * @param portID @ref IxEthDBPortId [in] - port ID to add the VLAN membership range into
+ * @param vlanIDMin @ref IxEthDBVlanId [in] - start of the VLAN ID range
+ * @param vlanIDMax @ref IxEthDBVlanId [in] - end of the VLAN ID range
+ *
+ * @retval IX_ETH_DB_SUCCESS operation completed successfully
+ * @retval IX_ETH_DB_INVALID_PORT portID is not a valid port identifier
+ * @retval IX_ETH_DB_PORT_UNINITIALIZED port is not initialized
+ * @retval IX_ETH_DB_INVALID_VLAN the specified VLAN IDs are invalid or do not constitute a range
+ * @retval IX_ETH_DB_FEATURE_UNAVAILABLE VLAN/QoS feature is not available or not enabled for the port
+ * @retval IX_FAIL unknown OS or NPE communication error
+ *
+ * @note Is is valid to use the same VLAN ID for both vlanIDMin and vlanIDMax, in which case this
+ * function will behave as @ref ixEthDBPortVlanMembershipAdd
+ *
+ * @note A port's default VLAN ID is always in its own membership table, hence there is no need
+ * to explicitly add it using this function (although it is not an error to do so)
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBPortVlanMembershipRangeAdd(IxEthDBPortId portID, IxEthDBVlanId vlanIDMin, IxEthDBVlanId vlanIDMax);
+
+/**
+ * @ingroup IxEthDB
+ *
+ * @fn IxEthDBStatus ixEthDBPortVlanMembershipRemove(IxEthDBPortId portID, IxEthDBVlanId vlanID)
+ *
+ * @brief Removes a VLAN ID from a port's VLAN membership table
+ *
+ * Frames tagged with a VLAN ID which is not in a port's VLAN membership table
+ * will be discarded by the frame filter, if Ingress membership filtering is enabled.
+ *
+ * - Reentrant - no
+ * - ISR Callable - no
+ *
+ * @param portID @ref IxEthDBPortId [in] - ID of the port to remove the VLAN ID membership from
+ * @param vlanID @ref IxEthDBVlanId [in] - VLAN ID to be removed from the port membership table
+ *
+ * @retval IX_ETH_DB_SUCCESS operation completed successfully
+ * @retval IX_ETH_DB_INVALID_PORT portID is not a valid port identifier
+ * @retval IX_ETH_DB_INVALID_VLAN vlanID is not a valid VLAN ID
+ * @retval IX_ETH_DB_NO_PERMISSION attempted to remove the default VLAN ID
+ * from the port membership table (vlanID was set to the default port VLAN ID)
+ * @retval IX_ETH_DB_FEATURE_UNAVAILABLE VLAN/QoS feature is not available or not enabled for the port
+ * @retval IX_FAIL unknown OS or NPE communication error
+ *
+ * @note A port's default VLAN ID cannot be removed from the port's membership
+ * table; attempting it will return IX_ETH_DB_NO_PERMISSION
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBPortVlanMembershipRemove(IxEthDBPortId portID, IxEthDBVlanId vlanID);
+
+/**
+ * @ingroup IxEthDB
+ *
+ * @fn IxEthDBStatus ixEthDBPortVlanMembershipRangeRemove(IxEthDBPortId portID, IxEthDBVlanId vlanIDMin, IxEthDBVlanId vlanIDMax)
+ *
+ * @brief Removes a VLAN ID range from a port's VLAN membership table
+ *
+ * All the VLAN IDs in the specified range will be removed from the port VLAN
+ * membership table, including the range start and end VLAN IDs. Tagged frames
+ * with VLAN IDs in the range will be discarded by the frame filter, if Ingress
+ * membership filtering is enabled.
+ *
+ * - Reentrant - no
+ * - ISR Callable - no
+ *
+ * @param portID @ref IxEthDBPortId [in] - ID of the port to remove the VLAN membership range from
+ * @param vlanIDMin @ref IxEthDBVlanId [in] - start of the VLAN ID range
+ * @param vlanIDMax @ref IxEthDBVlanId [in] - end of the VLAN ID range
+ *
+ * @retval IX_ETH_DB_SUCCESS operation completed successfully
+ * @retval IX_ETH_DB_INVALID_PORT portID is not a valid port identifier
+ * @retval IX_ETH_DB_PORT_UNINITIALIZED port is not initialized
+ * @retval IX_ETH_DB_INVALID_VLAN the specified VLAN IDs are invalid or do not constitute a range
+ * @retval IX_ETH_DB_NO_PERMISSION attempted to remove the default VLAN ID
+ * from the port membership table (both vlanIDMin and vlanIDMax were set to the default port VLAN ID)
+ * @retval IX_ETH_DB_FEATURE_UNAVAILABLE VLAN/QoS feature is not available or not enabled for the port
+ * @retval IX_FAIL unknown OS or NPE communication error
+ *
+ * @note Is is valid to use the same VLAN ID for both vlanIDMin and vlanIDMax, in which case
+ * function will behave as @ref ixEthDBPortVlanMembershipRemove
+ *
+ * @note If the given range overlaps the default port VLAN ID this function
+ * will remove all the VLAN IDs in the range except for the port VLAN ID from its
+ * own membership table. This situation will be silently dealt with (no error message
+ * will be returned) as long as the range contains more than one value (i.e. at least
+ * one other value, apart from the default port VLAN ID). If the function is called
+ * with the vlanIDMin and vlanIDMax parameters both set to the port default VLAN ID, the
+ * function will infer that an attempt was specifically made to remove the default port
+ * VLAN ID from the port membership table, in which case the return value will be
+ * IX_ETH_DB_NO_PERMISSION.
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBPortVlanMembershipRangeRemove(IxEthDBPortId portID, IxEthDBVlanId vlanIDMin, IxEthDBVlanId vlanIDMax);
+
+/**
+ * @ingroup IxEthDB
+ *
+ * @fn IxEthDBStatus ixEthDBPortVlanMembershipSet(IxEthDBPortId portID, IxEthDBVlanSet vlanSet)
+ *
+ * @brief Sets a port's VLAN membership table
+ *
+ * Sets a port's VLAN membership table from a complete VLAN table containing all the possible
+ * 4096 VLAN IDs. The table format is an array containing 4096 bits (512 bytes), where each bit
+ * indicates whether the VLAN at that bit index is in the port's membership list (if set) or
+ * not (unset).
+ *
+ * The bit at index 0, indicating VLAN ID 0, indicates no VLAN membership and therefore no
+ * other bit must be set if bit 0 is set.
+ *
+ * The bit at index 4095 is reserved and should never be set (it will be ignored if set).
+ *
+ * The bit referencing the same VLAN ID as the default port VLAN ID should always be set, as
+ * the membership list must contain at least the default port VLAN ID.
+ *
+ * - Reentrant - no
+ * - ISR Callable - no
+ *
+ * @param portID @ref IxEthDBPortId [in] - port ID to set the VLAN membership table to
+ * @param vlanSet @ref IxEthDBVlanSet [in] - pointer to the VLAN membership table
+ *
+ * @retval IX_ETH_DB_SUCCESS operation completed successfully
+ * @retval IX_ETH_DB_INVALID_PORT portID is not a valid port identifier
+ * @retval IX_ETH_DB_PORT_UNINITIALIZED port is not initialized
+ * @retval IX_ETH_DB_INVALID_ARG invalid <i>vlanSet</i> pointer
+ * @retval IX_ETH_DB_FEATURE_UNAVAILABLE VLAN/QoS feature is not available or not enabled for the port
+ * @retval IX_FAIL unknown OS or NPE communication error
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBPortVlanMembershipSet(IxEthDBPortId portID, IxEthDBVlanSet vlanSet);
+
+/**
+ * @ingroup IxEthDB
+ *
+ * @fn IxEthDBStatus ixEthDBPortVlanMembershipGet(IxEthDBPortId portID, IxEthDBVlanSet vlanSet)
+ *
+ * @brief Retrieves a port's VLAN membership table
+ *
+ * Retrieves the complete VLAN membership table from a port, containing all the possible
+ * 4096 VLAN IDs. The table format is an array containing 4096 bits (512 bytes), where each bit
+ * indicates whether the VLAN at that bit index is in the port's membership list (if set) or
+ * not (unset).
+ *
+ * The bit at index 0, indicating VLAN ID 0, indicates no VLAN membership and therefore no
+ * other bit will be set if bit 0 is set.
+ *
+ * The bit at index 4095 is reserved and will not be set (it will be ignored if set).
+ *
+ * The bit referencing the same VLAN ID as the default port VLAN ID will always be set, as
+ * the membership list must contain at least the default port VLAN ID.
+ *
+ * - Reentrant - no
+ * - ISR Callable - no
+ *
+ * @param portID @ref IxEthDBPortId [in] - port ID to retrieve the VLAN membership table from
+ * @param vlanSet @ref IxEthDBVlanSet [out] - pointer a location where the VLAN membership table will be
+ * written to
+ *
+ * @retval IX_ETH_DB_SUCCESS operation completed successfully
+ * @retval IX_ETH_DB_INVALID_PORT portID is not a valid port identifier
+ * @retval IX_ETH_DB_PORT_UNINITIALIZED port is not initialized
+ * @retval IX_ETH_DB_INVALID_ARG invalid <i>vlanSet</i> pointer
+ * @retval IX_ETH_DB_FEATURE_UNAVAILABLE VLAN/QoS feature is not available or not enabled for the port
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBPortVlanMembershipGet(IxEthDBPortId portID, IxEthDBVlanSet vlanSet);
+
+/**
+ * @ingroup IxEthDB
+ *
+ * @fn IxEthDBStatus ixEthDBAcceptableFrameTypeSet(IxEthDBPortId portID, IxEthDBFrameFilter frameFilter)
+ *
+ * @brief Sets a port's acceptable frame type filter
+ *
+ * The acceptable frame type is one (or a combination) of the following values:
+ * - IX_ETH_DB_ACCEPT_ALL_FRAMES - accepts all the frames
+ * - IX_ETH_DB_UNTAGGED_FRAMES - accepts untagged frames
+ * - IX_ETH_DB_VLAN_TAGGED_FRAMES - accepts tagged frames
+ * - IX_ETH_DB_PRIORITY_TAGGED_FRAMES - accepts tagged frames with VLAN ID set to 0 (no VLAN membership)
+ *
+ * Except for using the exact values given above only the following combinations are valid:
+ * - IX_ETH_DB_UNTAGGED_FRAMES | IX_ETH_DB_VLAN_TAGGED_FRAMES
+ * - IX_ETH_DB_UNTAGGED_FRAMES | IX_ETH_DB_PRIORITY_TAGGED_FRAMES
+ *
+ * Please note that IX_ETH_DB_UNTAGGED_FRAMES | IX_ETH_DB_VLAN_TAGGED_FRAMES is equivalent
+ * to IX_ETH_DB_ACCEPT_ALL_FRAMES.
+ *
+ * - Reentrant - no
+ * - ISR Callable - no
+ *
+ * @note by default the acceptable frame type filter is set to IX_ETH_DB_ACCEPT_ALL_FRAMES
+ *
+ * @note setting the acceptable frame type to PRIORITY_TAGGED_FRAMES is internally
+ * accomplished by changing the frame filter to VLAN_TAGGED_FRAMES and setting the
+ * VLAN membership list to include only VLAN ID 0; the membership list will need
+ * to be restored manually to an appropriate value if the acceptable frame type
+ * filter is changed back to ACCEPT_ALL_FRAMES or VLAN_TAGGED_FRAMES; failure to do so
+ * will filter all VLAN traffic bar frames tagged with VLAN ID 0
+ *
+ * @param portID @ref IxEthDBPortId [in] - port ID to set the acceptable frame type filter to
+ * @param frameFilter @ref IxEthDBFrameFilter [in] - acceptable frame type filter
+ *
+ * @retval IX_ETH_DB_SUCCESS operation completed successfully
+ * @retval IX_ETH_DB_INVALID_PORT portID is not a valid port identifier
+ * @retval IX_ETH_DB_PORT_UNINITIALIZED port is not initialized
+ * @retval IX_ETH_DB_INVALID_ARG invalid frame type filter
+ * @retval IX_ETH_DB_FEATURE_UNAVAILABLE VLAN/QoS feature is not available or not enabled for the port
+ * @retval IX_FAIL unknown OS or NPE communication error
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBAcceptableFrameTypeSet(IxEthDBPortId portID, IxEthDBFrameFilter frameFilter);
+
+/**
+ * @ingroup IxEthDB
+ *
+ * @fn IxEthDBStatus ixEthDBAcceptableFrameTypeGet(IxEthDBPortId portID, IxEthDBFrameFilter *frameFilter)
+ *
+ * @brief Retrieves a port's acceptable frame type filter
+ *
+ * For a description of the acceptable frame types see @ref ixEthDBAcceptableFrameTypeSet
+ *
+ * - Reentrant - no
+ * - ISR Callable - no
+ *
+ * @param portID @ref IxEthDBPortId [in] - port ID to retrieve the acceptable frame type filter from
+ * @param frameFilter @ref IxEthDBFrameFilter [out] - location to store the acceptable frame type filter
+ *
+ * @retval IX_ETH_DB_SUCCESS operation completed successfully
+ * @retval IX_ETH_DB_INVALID_PORT portID is not a valid port identifier
+ * @retval IX_ETH_DB_PORT_UNINITIALIZED port is not initialized
+ * @retval IX_ETH_DB_INVALID_ARG invalid <i>frameFilter</i> pointer argument
+ * @retval IX_ETH_DB_FEATURE_UNAVAILABLE VLAN/QoS feature is not available or not enabled for the port
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBAcceptableFrameTypeGet(IxEthDBPortId portID, IxEthDBFrameFilter *frameFilter);
+
+/**
+ * @ingroup IxEthDB
+ *
+ * @fn IxEthDBStatus ixEthDBPriorityMappingTableSet(IxEthDBPortId portID, IxEthDBPriorityTable priorityTable)
+ *
+ * @brief Sets a port's priority mapping table
+ *
+ * The priority mapping table is an 8x2 table mapping a QoS (user) priority into an internal
+ * traffic class. There are 8 valid QoS priorities (0..7, 0 being the lowest) which can be
+ * mapped into one of the 4 available traffic classes (0..3, 0 being the lowest).
+ * If a custom priority mapping table is not specified using this function the following
+ * default priority table will be used (as per IEEE 802.1Q and IEEE 802.1D):
+ *
+ * <table border="1"> <caption> QoS traffic classes </caption>
+ * <tr> <td> <b> QoS priority <td> <b> Default traffic class <td> <b> Traffic type </b>
+ * <tr> <td> 0 <td> 1 <td> Best effort, default class for unexpedited traffic
+ * <tr> <td> 1 <td> 0 <td> Background traffic
+ * <tr> <td> 2 <td> 0 <td> Spare bandwidth
+ * <tr> <td> 3 <td> 1 <td> Excellent effort
+ * <tr> <td> 4 <td> 2 <td> Controlled load
+ * <tr> <td> 5 <td> 2 <td> Video traffic
+ * <tr> <td> 6 <td> 3 <td> Voice traffic
+ * <tr> <td> 7 <td> 3 <td> Network control
+ * </table>
+ *
+ * - Reentrant - no
+ * - ISR Callable - no
+ *
+ * @param portID @ref IxEthDBPortId [in] - port ID of the port to set the priority mapping table to
+ * @param priorityTable @ref IxEthDBPriorityTable [in] - location of the user priority table
+ *
+ * @note The provided table will be copied into internal data structures in EthDB and
+ * can be deallocated by the called after this function has completed its execution, if
+ * so desired
+ *
+ * @warning The number of available traffic classes differs depending on the NPE images
+ * and queue configuration. Check IxEthDBQoS.h for up-to-date information on the availability of
+ * traffic classes. Note that specifiying a traffic class in the priority map which exceeds
+ * the system availability will produce an IX_ETH_DB_INVALID_PRIORITY return error code and no
+ * priority will be remapped.
+ *
+ * @retval IX_ETH_DB_SUCCESS operation completed successfully
+ * @retval IX_ETH_DB_INVALID_PORT portID is not a valid port identifier
+ * @retval IX_ETH_DB_PORT_UNINITIALIZED port is not initialized
+ * @retval IX_ETH_DB_INVALID_ARG invalid <i>priorityTable</i> pointer
+ * @retval IX_ETH_DB_INVALID_PRIORITY at least one priority value exceeds
+ * the current number of available traffic classes
+ * @retval IX_ETH_DB_FEATURE_UNAVAILABLE VLAN/QoS feature is not available or not enabled for the port
+ * @retval IX_FAIL unknown OS or NPE communication error
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBPriorityMappingTableSet(IxEthDBPortId portID, IxEthDBPriorityTable priorityTable);
+
+/**
+ * @ingroup IxEthDB
+ *
+ * @fn IxEthDBStatus ixEthDBPriorityMappingTableGet(IxEthDBPortId portID, IxEthDBPriorityTable priorityTable)
+ *
+ * @brief Retrieves a port's priority mapping table
+ *
+ * The priority mapping table for the given port will be copied in the location
+ * specified by the caller using "priorityTable"
+ *
+ * - Reentrant - no
+ * - ISR Callable - no
+ *
+ * @param portID ID @ref IxEthDBPortId [in] - of the port to retrieve the priority mapping table from
+ * @param priorityTable @ref IxEthDBPriorityTable [out] - pointer to a user specified location where the table will be copied to
+ *
+ * @retval IX_ETH_DB_SUCCESS operation completed successfully
+ * @retval IX_ETH_DB_INVALID_PORT portID is not a valid port identifier
+ * @retval IX_ETH_DB_PORT_UNINITIALIZED port is not initialized
+ * @retval IX_ETH_DB_INVALID_ARG invalid priorityTable pointer
+ * @retval IX_ETH_DB_FEATURE_UNAVAILABLE VLAN/QoS feature is not available or not enabled for the port
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBPriorityMappingTableGet(IxEthDBPortId portID, IxEthDBPriorityTable priorityTable);
+
+/**
+ * @ingroup IxEthDB
+ *
+ * @fn IxEthDBStatus ixEthDBPriorityMappingClassSet(IxEthDBPortId portID, IxEthDBPriority userPriority, IxEthDBPriority trafficClass)
+ *
+ * @brief Sets one QoS/user priority => traffic class mapping in a port's priority mapping table
+ *
+ * This function establishes a mapping between a user (QoS) priority and an internal traffic class.
+ * The mapping will be saved in the port's priority mapping table. Use this function when not all
+ * the QoS priorities need remapping (see also @ref ixEthDBPriorityMappingTableSet)
+ *
+ * - Reentrant - no
+ * - ISR Callable - no
+ *
+ * @param portID @ref IxEthDBPortId [in] - ID of the port to set the mapping to
+ * @param userPriority @ref IxEthDBPriority [in] - user (QoS) priority, between 0 and 7 (0 being the lowest)
+ * @param trafficClass @ref IxEthDBPriority [in] - internal traffic class, between 0 and 3 (0 being the lowest)
+ *
+ * @retval IX_ETH_DB_SUCCESS operation completed successfully
+ * @retval IX_ETH_DB_INVALID_PORT portID is not a valid port identifier
+ * @retval IX_ETH_DB_PORT_UNINITIALIZED port is not initialized
+ * @retval IX_ETH_DB_INVALID_PRIORITY <i>userPriority</i> out of range or
+ * <i>trafficClass</i> is beyond the number of currently available traffic classes
+ * @retval IX_ETH_DB_FEATURE_UNAVAILABLE VLAN/QoS feature is not available or not enabled for the port
+ * @retval IX_FAIL unknown OS or NPE communication error
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBPriorityMappingClassSet(IxEthDBPortId portID, IxEthDBPriority userPriority, IxEthDBPriority trafficClass);
+
+/**
+ * @ingroup IxEthDB
+ *
+ * @fn IxEthDBStatus ixEthDBPriorityMappingClassGet(IxEthDBPortId portID, IxEthDBPriority userPriority, IxEthDBPriority *trafficClass)
+ *
+ * @brief Retrieves one QoS/user priority => traffic class mapping in a port's priority mapping table
+ *
+ * This function retrieves the internal traffic class associated with a QoS (user) priority from a given
+ * port's priority mapping table. Use this function when not all the QoS priority mappings are
+ * required (see also @ref ixEthDBPriorityMappingTableGet)
+ *
+ * - Reentrant - no
+ * - ISR Callable - no
+ *
+ * @param portID @ref IxEthDBPortId [in] - ID of the port to set the mapping to
+ * @param userPriority @ref IxEthDBPriority [in] - user (QoS) priority, between 0 and 7 (0 being the lowest)
+ * @param trafficClass @ref IxEthDBPriority [out] - location to write the corresponding internal traffic class to
+ *
+ * @retval IX_ETH_DB_SUCCESS operation completed successfully
+ * @retval IX_ETH_DB_INVALID_PORT portID is not a valid port identifier
+ * @retval IX_ETH_DB_PORT_UNINITIALIZED port is not initialized
+ * @retval IX_ETH_DB_INVALID_PRIORITY invalid userPriority value (out of range)
+ * @retval IX_ETH_DB_FEATURE_UNAVAILABLE VLAN/QoS feature is not available or not enabled for the port
+ * @retval IX_ETH_DB_INVALID_ARG invalid <i>trafficClass</i> pointer argument
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBPriorityMappingClassGet(IxEthDBPortId portID, IxEthDBPriority userPriority, IxEthDBPriority *trafficClass);
+
+/**
+ * @ingroup IxEthDB
+ *
+ * @fn IxEthDBStatus ixEthDBEgressVlanEntryTaggingEnabledSet(IxEthDBPortId portID, IxEthDBVlanId vlanID, BOOL enabled)
+ *
+ * @brief Enables or disables Egress VLAN tagging for a port and a given VLAN
+ *
+ * This function enables or disables Egress VLAN tagging for the given port and VLAN ID.
+ * If the VLAN tagging for a certain VLAN ID is enabled then all the frames to be
+ * transmitted on the given port tagged with the same VLAN ID will be transmitted in a tagged format.
+ * If tagging is not enabled for the given VLAN ID, the VLAN tag from the frames matching
+ * this VLAN ID will be removed (the frames will be untagged).
+ *
+ * VLAN ID 4095 is reserved and should never be used with this function.
+ * VLAN ID 0 has the special meaning of "No VLAN membership" and it is used in this
+ * context to allow the port to send priority-tagged frames or not.
+ *
+ * By default, no Egress VLAN tagging is enabled on any port.
+ *
+ * - Reentrant - no
+ * - ISR Callable - no
+ *
+ * @param portID @ref IxEthDBPortId [in] - ID of the port to enable or disable the VLAN ID Egress tagging on
+ * @param vlanID @ref IxEthDBVlanId [in] - VLAN ID to be matched against outgoing frames
+ * @param enabled BOOL [in] - TRUE to enable Egress VLAN tagging on the port and given VLAN, and
+ * FALSE to disable Egress VLAN tagging
+ *
+ * @retval IX_ETH_DB_SUCCESS operation completed successfully
+ * @retval IX_ETH_DB_INVALID_PORT portID is not a valid port identifier
+ * @retval IX_ETH_DB_PORT_UNINITIALIZED port is not initialized
+ * @retval IX_ETH_DB_INVALID_VLAN invalid VLAN ID (out of range)
+ * @retval IX_ETH_DB_FEATURE_UNAVAILABLE VLAN/QoS feature is not available or not enabled for the port
+ * @retval IX_FAIL unknown OS or NPE communication error
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBEgressVlanEntryTaggingEnabledSet(IxEthDBPortId portID, IxEthDBVlanId vlanID, BOOL enabled);
+
+/**
+ * @ingroup IxEthDB
+ *
+ * @fn IxEthDBStatus ixEthDBEgressVlanEntryTaggingEnabledGet(IxEthDBPortId portID, IxEthDBVlanId vlanID, BOOL *enabled)
+ *
+ * @brief Retrieves the Egress VLAN tagging enabling status for a port and VLAN ID
+ *
+ * @param portID [in] - ID of the port to extract the Egress VLAN ID tagging status from
+ * @param vlanID VLAN [in] - ID whose tagging status is to be extracted
+ * @param enabled [in] - user-specifed location where the status is copied to; following
+ * the successfull execution of this function the value will be TRUE if Egress VLAN
+ * tagging is enabled for the given port and VLAN ID, and FALSE otherwise
+ *
+ * - Reentrant - no
+ * - ISR Callable - no
+ *
+ * @see ixEthDBEgressVlanEntryTaggingEnabledGet
+ *
+ * @retval IX_ETH_DB_SUCCESS operation completed successfully
+ * @retval IX_ETH_DB_INVALID_PORT portID is not a valid port identifier
+ * @retval IX_ETH_DB_PORT_UNINITIALIZED port is not initialized
+ * @retval IX_ETH_DB_INVALID_VLAN invalid VLAN ID (out of range)
+ * @retval IX_ETH_DB_INVALID_ARG invalid <i>enabled</i> argument pointer
+ * @retval IX_ETH_DB_FEATURE_UNAVAILABLE VLAN/QoS feature is not available or not enabled for the port
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBEgressVlanEntryTaggingEnabledGet(IxEthDBPortId portID, IxEthDBVlanId vlanID, BOOL *enabled);
+
+/**
+ * @ingroup IxEthDB
+ *
+ * @fn IxEthDBStatus ixEthDBEgressVlanRangeTaggingEnabledSet(IxEthDBPortId portID, IxEthDBVlanId vlanIDMin, IxEthDBVlanId vlanIDMax, BOOL enabled)
+ *
+ * @brief Enables or disables Egress VLAN tagging for a port and given VLAN range
+ *
+ * This function is very similar to @ref ixEthDBEgressVlanEntryTaggingEnabledSet with the
+ * difference that it can manipulate the Egress tagging status on multiple VLAN IDs,
+ * defined by a contiguous range. Note that both limits in the range are explicitly
+ * included in the execution of this function.
+ *
+ * - Reentrant - no
+ * - ISR Callable - no
+ *
+ * @param portID @ref IxEthDBPortId [in] - ID of the port to enable or disable the VLAN ID Egress tagging on
+ * @param vlanIDMin @ref IxEthDBVlanId [in] - start of the VLAN range to be matched against outgoing frames
+ * @param vlanIDMax @ref IxEthDBVlanId [in] - end of the VLAN range to be matched against outgoing frames
+ * @param enabled BOOL [in] - TRUE to enable Egress VLAN tagging on the port and given VLAN range,
+ * and FALSE to disable Egress VLAN tagging
+ *
+ * @retval IX_ETH_DB_SUCCESS operation completed successfully
+ * @retval IX_ETH_DB_INVALID_PORT portID is not a valid port identifier
+ * @retval IX_ETH_DB_PORT_UNINITIALIZED port is not initialized
+ * @retval IX_ETH_DB_INVALID_VLAN invalid VLAN ID (out of range), or do not constitute a range
+ * @retval IX_ETH_DB_FEATURE_UNAVAILABLE VLAN/QoS feature is not available or not enabled for the port
+ * @retval IX_ETH_DB_NO_PERMISSION attempted to explicitly remove the default port VLAN ID from the tagging table
+ * @retval IX_FAIL unknown OS or NPE communication error
+ *
+ * @note Specifically removing the default port VLAN ID from the Egress tagging table by setting both vlanIDMin and vlanIDMax
+ * to the VLAN ID portion of the PVID is not allowed by this function and will return IX_ETH_DB_NO_PERMISSION.
+ * However, this can be circumvented, should the user specifically desire this, by either using a
+ * larger range (vlanIDMin < vlanIDMax) or by using ixEthDBEgressVlanEntryTaggingEnabledSet.
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBEgressVlanRangeTaggingEnabledSet(IxEthDBPortId portID, IxEthDBVlanId vlanIDMin, IxEthDBVlanId vlanIDMax, BOOL enabled);
+
+/**
+ * @ingroup IxEthDB
+ *
+ * @fn IxEthDBStatus ixEthDBEgressVlanTaggingEnabledSet(IxEthDBPortId portID, IxEthDBVlanSet vlanSet)
+ *
+ * @brief Sets the complete Egress VLAN tagging table for a port
+ *
+ * This function is used to set the VLAN tagging/untagging per VLAN ID for a given port
+ * covering the entire VLAN ID range (0..4094). The <i>vlanSet</i> parameter is a 4096
+ * bit array, each bit indicating the Egress behavior for the corresponding VLAN ID.
+ * If a bit is set then outgoing frames with the corresponding VLAN ID will be transmitted
+ * with the VLAN tag, otherwise the frame will be transmitted without the VLAN tag.
+ *
+ * Bit 0 has a special significance, indicating tagging or tag removal for priority-tagged
+ * frames.
+ *
+ * Bit 4095 is reserved and should never be set (it will be ignored if set).
+ *
+ * - Reentrant - no
+ * - ISR Callable - no
+ *
+ * @param portID @ref IxEthDBPortId [in] - ID of the port whose Egress VLAN tagging behavior is set
+ * @param vlanSet @ref IxEthDBVlanSet [in] - 4096 bit array controlling per-VLAN tagging and untagging
+ *
+ * @retval IX_ETH_DB_SUCCESS operation completed successfully
+ * @retval IX_ETH_DB_INVALID_PORT portID is not a valid port identifier
+ * @retval IX_ETH_DB_PORT_UNINITIALIZED port is not initialized
+ * @retval IX_ETH_DB_INVALID_ARG invalid <i>vlanSet</i> pointer
+ * @retval IX_ETH_DB_FEATURE_UNAVAILABLE VLAN/QoS feature is not available or not enabled for the port
+ * @retval IX_FAIL unknown OS or NPE communication error
+ *
+ * @warning This function will automatically add the default port VLAN ID to the Egress tagging table
+ * every time it is called. The user should manually call ixEthDBEgressVlanEntryTaggingEnabledSet to
+ * prevent tagging on the default port VLAN ID if the default behavior is not intended.
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBEgressVlanTaggingEnabledSet(IxEthDBPortId portID, IxEthDBVlanSet vlanSet);
+
+/**
+ * @ingroup IxEthDB
+ *
+ * @fn IxEthDBStatus ixEthDBEgressVlanTaggingEnabledGet(IxEthDBPortId portID, IxEthDBVlanSet vlanSet)
+ *
+ * @brief Retrieves the complete Egress VLAN tagging table from a port
+ *
+ * This function copies the 4096 bit table controlling the Egress VLAN tagging into a user specified
+ * area. Each bit in the array indicates whether tagging for the corresponding VLAN (the bit position
+ * in the array) is enabled (the bit is set) or not (the bit is unset).
+ *
+ * Bit 4095 is reserved and should not be set (it will be ignored if set).
+ *
+ * @see ixEthDBEgressVlanTaggingEnabledSet
+ *
+ * @param portID @ref IxEthDBPortId [in] - ID of the port whose Egress VLAN tagging behavior is retrieved
+ * @param vlanSet @ref IxEthDBVlanSet [out] - user location to copy the Egress tagging table into; should have
+ * room to store 4096 bits (512 bytes)
+ *
+ * @retval IX_ETH_DB_SUCCESS operation completed successfully
+ * @retval IX_ETH_DB_INVALID_PORT portID is not a valid port identifier
+ * @retval IX_ETH_DB_PORT_UNINITIALIZED port is not initialized
+ * @retval IX_ETH_DB_INVALID_ARG invalid <i>vlanSet</i> pointer
+ * @retval IX_ETH_DB_FEATURE_UNAVAILABLE VLAN/QoS feature is not available or not enabled for the port
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBEgressVlanTaggingEnabledGet(IxEthDBPortId portID, IxEthDBVlanSet vlanSet);
+
+/**
+ * @ingroup IxEthDB
+ *
+ * @fn IxEthDBStatus ixEthDBIngressVlanTaggingEnabledSet(IxEthDBPortId portID, IxEthDBTaggingAction taggingAction)
+ *
+ * @brief Sets the Ingress VLAN tagging behavior for a port
+ *
+ * A port's Ingress tagging behavior is controlled by the taggingAction parameter,
+ * which can take one of the following values:
+ *
+ * - IX_ETH_DB_PASS_THROUGH - leaves the frame unchanged (does not add or remove the VLAN tag)
+ * - IX_ETH_DB_ADD_TAG - adds the VLAN tag if not present, using the default port VID
+ * - IX_ETH_DB_REMOVE_TAG - removes the VLAN tag if present
+ *
+ * @param portID @ref IxEthDBPortId [in] - ID of the port whose Ingress VLAN tagging behavior is set
+ * @param taggingAction @ref IxEthDBTaggingAction [in] - tagging behavior for the port
+ *
+ * @retval IX_ETH_DB_SUCCESS operation completed successfully
+ * @retval IX_ETH_DB_INVALID_PORT portID is not a valid port identifier
+ * @retval IX_ETH_DB_PORT_UNINITIALIZED port is not initialized
+ * @retval IX_ETH_DB_INVALID_ARG invalid <i>taggingAction</i> argument
+ * @retval IX_ETH_DB_FEATURE_UNAVAILABLE VLAN/QoS feature is not available or not enabled for the port
+ * @retval IX_FAIL unknown OS or NPE communication error
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBIngressVlanTaggingEnabledSet(IxEthDBPortId portID, IxEthDBTaggingAction taggingAction);
+
+/**
+ * @ingroup IxEthDB
+ *
+ * @fn IxEthDBStatus ixEthDBIngressVlanTaggingEnabledGet(IxEthDBPortId portID, IxEthDBTaggingAction *taggingAction)
+ *
+ * @brief Retrieves the Ingress VLAN tagging behavior from a port (see @ref ixEthDBIngressVlanTaggingEnabledSet)
+ *
+ * @param portID @ref IxEthDBPortId [in] - ID of the port whose Ingress VLAN tagging behavior is set
+ * @param taggingAction @ref IxEthDBTaggingAction [out] - location where the tagging behavior for the port is written to
+ *
+ * @retval IX_ETH_DB_SUCCESS operation completed successfully
+ * @retval IX_ETH_DB_INVALID_PORT portID is not a valid port identifier
+ * @retval IX_ETH_DB_PORT_UNINITIALIZED port is not initialized
+ * @retval IX_ETH_DB_INVALID_ARG invalid <i>taggingAction</i> pointer argument
+ * @retval IX_ETH_DB_FEATURE_UNAVAILABLE VLAN/QoS feature is not available or not enabled for the port
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBIngressVlanTaggingEnabledGet(IxEthDBPortId portID, IxEthDBTaggingAction *taggingAction);
+
+/**
+ * @ingroup IxEthDB
+ *
+ * @fn IxEthDBStatus ixEthDBVlanPortExtractionEnable(IxEthDBPortId portID, BOOL enable)
+ *
+ * @brief Enables or disables port ID extraction
+ *
+ * This feature can be used in the situation when a multi-port device (e.g. a switch)
+ * is connected to an IXP4xx port and the device can provide incoming frame port
+ * identification by tagging the TPID field in the Ethernet frame. Enabling
+ * port extraction will instruct the NPE to copy the TPID field from the frame and
+ * place it in the <i>ixp_ne_src_port</i> of the <i>ixp_buf</i> header. In addition,
+ * the NPE restores the TPID field to 0.
+ *
+ * If the frame is not tagged the NPE will fill the <i>ixp_ne_src_port</i> with the
+ * port ID of the MII interface the frame was received from.
+ *
+ * The TPID field is the least significant byte of the type/length field, which is
+ * normally set to 0x8100 for 802.1Q-tagged frames.
+ *
+ * This feature is disabled by default.
+ *
+ * @param portID ID of the port to configure port ID extraction on
+ * @param enable TRUE to enable port ID extraction and FALSE to disable it
+ *
+ * @retval IX_ETH_DB_SUCCESS operation completed successfully
+ * @retval IX_ETH_DB_INVALID_PORT portID is not a valid port identifier
+ * @retval IX_ETH_DB_PORT_UNINITIALIZED port is not initialized
+ * @retval IX_ETH_DB_FEATURE_UNAVAILABLE VLAN/QoS feature is not available or not enabled for the port
+ * @retval IX_FAIL unknown OS or NPE communication error
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBVlanPortExtractionEnable(IxEthDBPortId portID, BOOL enable);
+
+/**
+ * @ingroup IxEthDB
+ *
+ * @fn IxEthDBStatus ixEthDBFeatureCapabilityGet(IxEthDBPortId portID, IxEthDBFeature *featureSet)
+ *
+ * @brief Retrieves the feature capability set for a port
+ *
+ * This function retrieves the feature capability set for a port or the common capabilities shared between all
+ * the ports, writing the feature capability set in a user specified location.
+ *
+ * The feature capability set will consist of a set formed by OR-ing one or more of the following values:
+ * - IX_ETH_DB_LEARNING - Learning feature; enables EthDB to learn MAC address (filtering) records, including 802.1Q enabled records
+ * - IX_ETH_DB_FILTERING - Filtering feature; enables EthDB to communicate with the NPEs for downloading filtering information in the NPEs; depends on the learning feature
+ * - IX_ETH_DB_VLAN_QOS - VLAN/QoS feature; enables EthDB to configure NPEs to operate in VLAN/QoS aware modes
+ * - IX_ETH_DB_FIREWALL - Firewall feature; enables EthDB to configure NPEs to operate in firewall mode, using white/black address lists
+ * - IX_ETH_DB_SPANNING_TREE_PROTOCOL - Spanning tree protocol feature; enables EthDB to configure the NPEs as STP nodes
+ * - IX_ETH_DB_WIFI_HEADER_CONVERSION - WiFi 802.3 to 802.11 header conversion feature; enables EthDB to handle WiFi conversion data
+ *
+ * Note that EthDB provides only the LEARNING feature for non-NPE ports.
+ *
+ * @param portID @ref IxEthDBPortId [in] - ID of the port to retrieve the capability set for
+ * (use IX_ETH_DB_ALL_PORTS to retrieve the common capabilities shared between all the ports)
+ * @param featureSet @ref IxEthDBFeature [out] - location where the capability set will be written to
+ *
+ * @retval IX_ETH_DB_SUCCESS operation completed successfully
+ * @retval IX_ETH_DB_INVALID_PORT portID is not a valid port identifier
+ * @retval IX_ETH_DB_PORT_UNINITIALIZED port is not initialized
+ * @retval IX_ETH_DB_INVALID_ARG invalid <i>featureSet</i> pointer
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBFeatureCapabilityGet(IxEthDBPortId portID, IxEthDBFeature *featureSet);
+
+/**
+ * @ingroup IxEthDB
+ *
+ * @fn IxEthDBStatus ixEthDBFeatureEnable(IxEthDBPortId portID, IxEthDBFeature feature, BOOL enabled)
+ *
+ * @brief Enables or disables one or more EthDB features
+ *
+ * Selects one or more features (see @ref ixEthDBFeatureCapabilityGet for a description of the supported
+ * features) to be enabled or disabled on the selected port (or all the ports).
+ *
+ * Note that some features are mutually incompatible:
+ * - IX_ETH_DB_FILTERING is incompatible with IX_ETH_DB_WIFI_HEADER_CONVERSION
+ *
+ * Also note that some features require other features to be enabled:
+ * - IX_ETH_DB_FILTERING requires IX_ETH_DB_LEARNING
+ *
+ * This function will either enable the entire selected feature set for the selected port (or all the ports),
+ * in which case it will return IX_ETH_DB_SUCCESS, or in case of error it will not enable any feature at all
+ * and return an appropriate error message.
+ *
+ * The following features are enabled by default (for ports with the respective capability),
+ * for compatibility reasons with previous versions of CSR:
+ * - IX_ETH_DB_LEARNING
+ * - IX_ETH_DB_FILTERING
+ *
+ * All other features are disabled by default and require manual enabling using ixEthDBFeatureEnable.
+ *
+ * <b>Default settings for VLAN, QoS, Firewall and WiFi header conversion features:</b>
+ *
+ * <i>VLAN</i>
+ *
+ * When the VLAN/QoS feature is enabled for a port for the first time the default VLAN behavior
+ * of the port is set to be as <b>permissive</b> (it will accept all the frames) and
+ * <b>non-interferential</b> (it will not change any frames) as possible:
+ * - the port VLAN ID (VID) is set to 0
+ * - the Ingress acceptable frame filter is set to accept all frames
+ * - the VLAN port membership is set to the complete VLAN range (0 - 4094)
+ * - the Ingress tagging mode is set to pass-through (will not change frames)
+ * - the Egress tagging mode is to send tagged frames in the entire VLAN range (0 - 4094)
+ *
+ * Note that further disabling and re-enabling the VLAN feature for a given port will not reset the port VLAN behavior
+ * to the settings listed above. Any VLAN settings made by the user are kept.
+ *
+ * <i>QoS</i>
+ *
+ * The following default priority mapping table will be used (as per IEEE 802.1Q and IEEE 802.1D):
+ *
+ * <table border="1"> <caption> QoS traffic classes </caption>
+ * <tr> <td> <b> QoS priority <td> <b> Default traffic class <td> <b> Traffic type </b>
+ * <tr> <td> 0 <td> 1 <td> Best effort, default class for unexpedited traffic
+ * <tr> <td> 1 <td> 0 <td> Background traffic
+ * <tr> <td> 2 <td> 0 <td> Spare bandwidth
+ * <tr> <td> 3 <td> 1 <td> Excellent effort
+ * <tr> <td> 4 <td> 2 <td> Controlled load
+ * <tr> <td> 5 <td> 2 <td> Video traffic
+ * <tr> <td> 6 <td> 3 <td> Voice traffic
+ * <tr> <td> 7 <td> 3 <td> Network control
+ * </table>
+ *
+ * <i> Firewall </i>
+ *
+ * The port firewall is configured by default in <b>black-list mode</b>, and the firewall address table is empty.
+ * This means the firewall will not filter any frames until the feature is configured and the firewall table is
+ * downloaded to the NPE.
+ *
+ * <i> Spanning Tree </i>
+ *
+ * The port is set to <b>STP unblocked mode</b>, therefore it will accept all frames until re-configured.
+ *
+ * <i> WiFi header conversion </i>
+ *
+ * The WiFi header conversion database is empty, therefore no actual header conversion will take place until this
+ * feature is configured and the conversion table downloaded to the NPE.
+ *
+ * @param portID @ref IxEthDBPortId [in] - ID of the port to enable or disable the features on (use IX_ETH_DB_ALL_PORTS for all the ports)
+ * @param feature @ref IxEthDBFeature [in] - feature or feature set to enable or disable
+ * @param enabled BOOL [in] - TRUE to enable the feature and FALSE to disable it
+ *
+ * @note Certain features, from a functional point of view, cannot be disabled as such at NPE level;
+ * when such features are set to <i>disabled</i> using the EthDB API they will be configured in such
+ * a way to determine a behavior equivalent to the feature being disabled. As well as this, disabled
+ * features cannot be configured or accessed via the EthDB API (except for getting their status).
+ *
+ * @retval IX_ETH_DB_SUCCESS operation completed successfully
+ * @retval IX_ETH_DB_INVALID_PORT portID is not a valid port identifier
+ * @retval IX_ETH_DB_PORT_UNINITIALIZED port is not initialized
+ * @retval IX_ETH_DB_NO_PERMISSION attempted to enable mutually exclusive features,
+ * or a feature that depends on another feature which is not present or enabled
+ * @retval IX_ETH_DB_FEATURE_UNAVAILABLE at least one of the features selected is unavailable
+ * @retval IX_FAIL unknown OS or NPE communication error
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBFeatureEnable(IxEthDBPortId portID, IxEthDBFeature feature, BOOL enabled);
+
+/**
+ * @ingroup IxEthDB
+ *
+ * @fn IxEthDBStatus ixEthDBFeatureStatusGet(IxEthDBPortId portID, IxEthDBFeature feature, BOOL *present, BOOL *enabled)
+ *
+ * @brief Retrieves the availability and status of a feature set
+ *
+ * This function returns the availability and status for a feature set.
+ * Note that if more than one feature is selected (e.g. IX_ETH_DB_LEARNING | IX_ETH_DB_FILTERING)
+ * the "present" and "enabled" return values will be set to TRUE only if all the features in the
+ * feature set are present and enabled (not only some).
+ *
+ * @param portID @ref IxEthDBPortId [in] - ID of the port
+ * @param feature @ref IxEthDBFeature [in] - identifier of the feature to retrieve the status for
+ * @param present BOOL [out] - location where a boolean flag indicating whether this feature is present will be written to
+ * @param enabled BOOL [out] - location where a boolean flag indicating whether this feature is enabled will be written to
+ *
+ * @retval IX_ETH_DB_SUCCESS operation completed successfully
+ * @retval IX_ETH_DB_INVALID_PORT portID is not a valid port identifier
+ * @retval IX_ETH_DB_PORT_UNINITIALIZED port is not initialized
+ * @retval IX_ETH_DB_INVALID_ARG either <i>present</i> or <i>enabled</i> pointer argument is invalid
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBFeatureStatusGet(IxEthDBPortId portID, IxEthDBFeature feature, BOOL *present, BOOL *enabled);
+
+/**
+ * @ingroup IxEthDB
+ *
+ * @fn IxEthDBStatus ixEthDBFeaturePropertyGet(IxEthDBPortId portID, IxEthDBFeature feature, IxEthDBProperty property, IxEthDBPropertyType *type, void *value)
+ *
+ * @brief Retrieves the value of a feature property
+ *
+ * The EthDB features usually contain feature-specific properties describing or
+ * controlling how the feature operates. While essential properties (e.g. the
+ * firewall operating mode) have their own API, secondary properties can be
+ * retrieved using this function.
+ *
+ * Properties can be read-only or read-write. ixEthDBFeaturePropertyGet operates with
+ * both types of features.
+ *
+ * Properties have types associated with them. A descriptor indicating the property
+ * type is returned in the <i>type</i> argument for convenience.
+ *
+ * The currently supported properties and their corresponding features are as follows:
+ *
+ * <table border="1"> <caption> Properties for IX_ETH_DB_VLAN_QOS </caption>
+ * <tr> <td> <b> Property identifier <td> <b> Property type <td> <b> Property value <td> <b> Read-Only </b>
+ * <tr> <td> IX_ETH_DB_QOS_TRAFFIC_CLASS_COUNT_PROPERTY <td> IX_ETH_DB_INTEGER_PROPERTY <td> number of internal traffic classes <td> Yes
+ * <tr> <td> IX_ETH_DB_QOS_TRAFFIC_CLASS_0_RX_QUEUE_PROPERTY <td> IX_ETH_DB_INTEGER_PROPERTY <td> queue assignment for traffic class 0 <td> Yes
+ * <tr> <td> IX_ETH_DB_QOS_TRAFFIC_CLASS_1_RX_QUEUE_PROPERTY <td> IX_ETH_DB_INTEGER_PROPERTY <td> queue assignment for traffic class 1 <td> Yes
+ * <tr> <td> IX_ETH_DB_QOS_TRAFFIC_CLASS_2_RX_QUEUE_PROPERTY <td> IX_ETH_DB_INTEGER_PROPERTY <td> queue assignment for traffic class 2 <td> Yes
+ * <tr> <td> IX_ETH_DB_QOS_TRAFFIC_CLASS_3_RX_QUEUE_PROPERTY <td> IX_ETH_DB_INTEGER_PROPERTY <td> queue assignment for traffic class 3 <td> Yes
+ * <tr> <td> IX_ETH_DB_QOS_TRAFFIC_CLASS_4_RX_QUEUE_PROPERTY <td> IX_ETH_DB_INTEGER_PROPERTY <td> queue assignment for traffic class 4 <td> Yes
+ * <tr> <td> IX_ETH_DB_QOS_TRAFFIC_CLASS_5_RX_QUEUE_PROPERTY <td> IX_ETH_DB_INTEGER_PROPERTY <td> queue assignment for traffic class 5 <td> Yes
+ * <tr> <td> IX_ETH_DB_QOS_TRAFFIC_CLASS_6_RX_QUEUE_PROPERTY <td> IX_ETH_DB_INTEGER_PROPERTY <td> queue assignment for traffic class 6 <td> Yes
+ * <tr> <td> IX_ETH_DB_QOS_TRAFFIC_CLASS_7_RX_QUEUE_PROPERTY <td> IX_ETH_DB_INTEGER_PROPERTY <td> queue assignment for traffic class 7 <td> Yes
+ * </table>
+ *
+ * @see ixEthDBFeaturePropertySet
+ *
+ * @param portID @ref IxEthDBPortId [in] - ID of the port
+ * @param feature @ref IxEthDBFeature [in] - EthDB feature for which the property is retrieved
+ * @param property @ref IxEthDBProperty [in] - property identifier
+ * @param type @ref IxEthDBPropertyType [out] - location where the property type will be stored
+ * @param value void [out] - location where the property value will be stored
+ *
+ * @retval IX_ETH_DB_SUCCESS operation completed successfully
+ * @retval IX_ETH_DB_INVALID_PORT portID is not a valid port identifier
+ * @retval IX_ETH_DB_INVALID_ARG invalid property identifier, <i>type</i> or <i>value</i> pointer arguments
+ * @retval IX_ETH_DB_FAIL incorrect property value or unknown error
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBFeaturePropertyGet(IxEthDBPortId portID, IxEthDBFeature feature, IxEthDBProperty property, IxEthDBPropertyType *type, void *value);
+
+/**
+ * @ingroup IxEthDB
+ *
+ * @fn IxEthDBStatus ixEthDBFeaturePropertySet(IxEthDBPortId portID, IxEthDBFeature feature, IxEthDBProperty property, void *value)
+ *
+ * @brief Sets the value of a feature property
+ *
+ * Unlike @ref ixEthDBFeaturePropertyGet, this function operates only with read-write properties
+ *
+ * The currently supported properties and their corresponding features are as follows:
+ *
+ * - IX_ETH_DB_QOS_QUEUE_CONFIGURATION_COMPLETE (for IX_ETH_DB_VLAN_QOS): freezes the availability of traffic classes
+ * to the number of traffic classes currently in use
+ *
+ * Note that this function creates deep copies of the property values; once the function is invoked the client
+ * can free or reuse the memory area containing the original property value.
+ *
+ * Copy behavior for different property types is defined as follows:
+ *
+ * - IX_ETH_DB_INTEGER_PROPERTY - 4 bytes are copied from the source location
+ * - IX_ETH_DB_STRING_PROPERTY - the source string will be copied up to the NULL '\0' string terminator, maximum of 255 characters
+ * - IX_ETH_DB_MAC_ADDR_PROPERTY - 6 bytes are copied from the source location
+ * - IX_ETH_DB_BOOL_PROPERTY - 4 bytes are copied from the source location; the only allowed values are TRUE (1L) and false (0L)
+ *
+ * @see ixEthDBFeaturePropertySet
+ *
+ * @warning IX_ETH_DB_QOS_QUEUE_CONFIGURATION_COMPLETE is provided for EthAcc internal use;
+ * do not attempt to set this property directly
+ *
+ * @param portID @ref IxEthDBPortId [in] - ID of the port
+ * @param feature @ref IxEthDBFeature [in] - EthDB feature for which the property is set
+ * @param property @ref IxEthDBProperty [in] - property identifier
+ * @param value void [in] - location where the property value is to be copied from
+ *
+ * @retval IX_ETH_DB_SUCCESS operation completed successfully
+ * @retval IX_ETH_DB_INVALID_PORT portID is not a valid port identifier
+ * @retval IX_ETH_DB_INVALID_ARG invalid property identifier, <i>value</i> pointer, or invalid property value
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBFeaturePropertySet(IxEthDBPortId portID, IxEthDBFeature feature, IxEthDBProperty property, void *value);
+
+/**
+ * @ingroup IxEthDB
+ *
+ * @fn IxEthDBStatus ixEthDBDatabaseClear(IxEthDBPortId portID, IxEthDBRecordType recordType)
+ *
+ * @brief Deletes a set of record types from the Ethernet Database
+ *
+ * This function deletes all the records of certain types (specified in the recordType filter)
+ * associated with a port. Additionally, the IX_ETH_DB_ALL_PORTS value can be used as port ID
+ * to indicate that the specified record types should be deleted for all the ports.
+ *
+ * The record type filter can be an ORed combination of the following types:
+ *
+ * <caption> Record types </caption>
+ * - IX_ETH_DB_FILTERING_RECORD <table><caption> Filtering record </caption>
+ * <tr><td> MAC address <td> static/dynamic type <td> age </tr>
+ * </table>
+ *
+ * - IX_ETH_DB_FILTERING_VLAN_RECORD <table><caption> VLAN-enabled filtering record </caption>
+ * <tr><td> MAC address <td> static/dynamic type <td> age <td> 802.1Q tag </tr>
+ * </table>
+ *
+ * - IX_ETH_DB_WIFI_RECORD <table><caption> WiFi header conversion record </caption>
+ * <tr><td> MAC address <td> optional gateway MAC address <td> </tr>
+ * </table>
+ *
+ * - IX_ETH_DB_FIREWALL_RECORD <table><caption> Firewall record </caption>
+ * <tr><td> MAC address </tr>
+ * </table>
+ * - IX_ETH_DB_ALL_RECORD_TYPES
+ *
+ * Any combination of the above types is valid e.g.
+ *
+ * (IX_ETH_DB_FILTERING_RECORD | IX_ETH_DB_FILTERING_VLAN_RECORD | IX_ETH_DB_FIREWALL_RECORD),
+ *
+ * although some might be redundant (it is not an error to do so) e.g.
+ *
+ * (IX_ETH_DB_FILTERING_RECORD | IX_ETH_DB_ALL_RECORD_TYPES)
+ *
+ * @param portID @ref IxEthDBPortId [in] - ID of the port
+ * @param recordType @ref IxEthDBRecordType [in] - record type filter
+ *
+ * @retval IX_ETH_DB_SUCCESS operation completed successfully
+ * @retval IX_ETH_DB_INVALID_PORT portID is not a valid port identifier
+ * @retval IX_ETH_DB_INVALID_ARG invalid <i>recordType</i> filter
+ *
+ * @note If the record type filter contains any unrecognized value (hence the
+ * IX_ETH_DB_INVALID_ARG error value is returned) no actual records will be deleted.
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBDatabaseClear(IxEthDBPortId portID, IxEthDBRecordType recordType);
+
+/**
+ * @ingroup IxEthDB
+ *
+ * @fn IxEthDBStatus ixEthDBWiFiStationEntryAdd(IxEthDBPortId portID, IxEthDBMacAddr *macAddr)
+ *
+ * @brief Adds an "Access Point to Station" record to the database, for 802.3 => 802.11 frame
+ * header conversion
+ *
+ * Frame header conversion is controlled by the set of MAC addresses
+ * added using @ref ixEthDBWiFiStationEntryAdd and @ref ixEthDBWiFiAccessPointEntryAdd.
+ * Conversion arguments are added using @ref ixEthDBWiFiFrameControlSet,
+ * @ref ixEthDBWiFiDurationIDSet and @ref ixEthDBWiFiBBSIDSet.
+ *
+ * Note that adding the same MAC address twice will not return an error
+ * (but will not accomplish anything either), while re-adding a record previously added
+ * as an "Access Point to Access Point" will migrate the record to the "Access Point
+ * to Station" type.
+ *
+ * @param portID @ref IxEthDBPortId [in] - ID of the port
+ * @param macAddr @ref IxEthDBMacAddr [in] - MAC address to add
+ *
+ * @retval IX_ETH_DB_SUCCESS operation completed successfully
+ * @retval IX_ETH_DB_INVALID_PORT portID is not a valid port identifier
+ * @retval IX_ETH_DB_INVALID_ARG macAddr is an invalid pointer
+ * @retval IX_ETH_DB_FEATURE_UNAVAILABLE WiFi feature not enabled
+ * @retval IX_ETH_DB_INVALID_ARG invalid <i>macAddr</i> pointer argument
+ * @retval IX_ETH_DB_NOMEM maximum number of records reached
+ * @retval IX_ETH_DB_BUSY lock condition or transaction in progress, try again later
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBWiFiStationEntryAdd(IxEthDBPortId portID, IxEthDBMacAddr *macAddr);
+
+/**
+ * @ingroup IxEthDB
+ *
+ * @fn IxEthDBStatus ixEthDBWiFiAccessPointEntryAdd(IxEthDBPortId portID, IxEthDBMacAddr *macAddr, IxEthDBMacAddr *gatewayMacAddr)
+ *
+ * @brief Adds an "Access Point to Access Point" record to the database
+ *
+ * @see ixEthDBWiFiStationEntryAdd
+ *
+ * Note that adding the same MAC address twice will simply overwrite the previously
+ * defined gateway MAC address value in the same record, if the record was previously of the
+ * "Access Point to Access Point" type.
+ *
+ * Re-adding a MAC address as "Access Point to Access Point", which was previously added as
+ * "Access Point to Station" will migrate the record type to "Access Point to Access Point" and
+ * record the gateway MAC address.
+ *
+ * @param portID @ref IxEthDBPortId [in] - ID of the port
+ * @param macAddr @ref IxEthDBMacAddr [in] - MAC address to add
+ * @param gatewayMacAddr @ref IxEthDBMacAddr [in] - MAC address of the gateway Access Point
+ *
+ * @retval IX_ETH_DB_SUCCESS operation completed successfully
+ * @retval IX_ETH_DB_INVALID_PORT portID is not a valid port identifier
+ * @retval IX_ETH_DB_PORT_UNINITIALIZED port is not initialized
+ * @retval IX_ETH_DB_INVALID_ARG macAddr is an invalid pointer
+ * @retval IX_ETH_DB_FEATURE_UNAVAILABLE WiFi feature not enabled
+ * @retval IX_ETH_DB_INVALID_ARG invalid <i>macAddr</i> or <i>gatewayMacAddr</i> pointer argument
+ * @retval IX_ETH_DB_NOMEM maximum number of records reached
+ * @retval IX_ETH_DB_BUSY lock condition or transaction in progress, try again later
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBWiFiAccessPointEntryAdd(IxEthDBPortId portID, IxEthDBMacAddr *macAddr, IxEthDBMacAddr *gatewayMacAddr);
+
+/**
+ * @ingroup IxEthDB
+ *
+ * @fn IxEthDBStatus ixEthDBWiFiEntryRemove(IxEthDBPortId portID, IxEthDBMacAddr *macAddr)
+ *
+ * @brief Removes a WiFi station record
+ *
+ * This function removes both types of WiFi records ("Access Point to Station" and
+ * "Access Point to Access Point").
+ *
+ * @param portID @ref IxEthDBPortId [in] - ID of the port
+ * @param macAddr @ref IxEthDBMacAddr [in] - MAC address to remove
+ *
+ * @retval IX_ETH_DB_SUCCESS operation completed successfully
+ * @retval IX_ETH_DB_INVALID_PORT portID is not a valid port identifier
+ * @retval IX_ETH_DB_PORT_UNINITIALIZED port is not initialized
+ * @retval IX_ETH_DB_INVALID_ARG invalid <i>macAddr</i> pointer argument
+ * @retval IX_ETH_DB_NO_SUCH_ADDR specified address was not found in the database
+ * @retval IX_ETH_DB_FEATURE_UNAVAILABLE WiFi feature not enabled
+ * @retval IX_ETH_DB_BUSY lock condition or transaction in progress, try again later
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBWiFiEntryRemove(IxEthDBPortId portID, IxEthDBMacAddr *macAddr);
+
+/**
+ * @ingroup IxEthDB
+ *
+ * @fn IxEthDBStatus ixEthDBWiFiConversionTableDownload(IxEthDBPortId portID)
+ *
+ * @brief Downloads the MAC address table for 802.3 => 802.11 frame header
+ * conversion to the NPE
+ *
+ * Note that the frame conversion MAC address table must be individually downloaded
+ * to each NPE for which the frame header conversion feature is enabled (i.e. it
+ * is not possible to specify IX_ETH_DB_ALL_PORTS).
+ *
+ * @param portID @ref IxEthDBPortId [in] - ID of the port
+ *
+ * @retval IX_ETH_DB_SUCCESS operation completed successfully
+ * @retval IX_ETH_DB_PORT_UNINITIALIZED port not initialized
+ * @retval IX_ETH_DB_INVALID_PORT portID is not a valid port identifier
+ * @retval IX_ETH_DB_FEATURE_UNAVAILABLE WiFi feature not enabled
+ * @retval IX_ETH_DB_FAIL unknown OS or NPE communication error
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBWiFiConversionTableDownload(IxEthDBPortId portID);
+
+/**
+ * @ingroup IxEthDB
+ *
+ * @fn IxEthDBStatus ixEthDBWiFiFrameControlSet(IxEthDBPortId portID, UINT16 frameControl)
+ *
+ * @brief Sets the GlobalFrameControl field
+ *
+ * The GlobalFrameControl field is a 2-byte value inserted in the <i>Frame Control</i>
+ * field for all 802.3 to 802.11 frame header conversions
+ *
+ * @param portID @ref IxEthDBPortId [in] - ID of the port
+ * @param frameControl UINT16 [in] - GlobalFrameControl value
+ *
+ * @retval IX_ETH_DB_SUCCESS operation completed successfully
+ * @retval IX_ETH_DB_INVALID_PORT portID is not a valid port identifier
+ * @retval IX_ETH_DB_PORT_UNINITIALIZED port not initialized
+ * @retval IX_ETH_DB_FEATURE_UNAVAILABLE WiFi feature not enabled
+ * @retval IX_ETH_DB_FAIL unknown OS or NPE communication error
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBWiFiFrameControlSet(IxEthDBPortId portID, UINT16 frameControl);
+
+/**
+ * @ingroup IxEthDB
+ *
+ * @fn IxEthDBStatus ixEthDBWiFiDurationIDSet(IxEthDBPortId portID, UINT16 durationID)
+ *
+ * @brief Sets the GlobalDurationID field
+ *
+ * The GlobalDurationID field is a 2-byte value inserted in the <i>Duration/ID</i>
+ * field for all 802.3 to 802.11 frame header conversions
+ *
+ * @param portID @ref IxEthDBPortId [in] - ID of the port
+ * @param durationID UINT16 [in] - GlobalDurationID field
+ *
+ * @retval IX_ETH_DB_SUCCESS operation completed successfully
+ * @retval IX_ETH_DB_INVALID_PORT portID is not a valid port identifier
+ * @retval IX_ETH_DB_PORT_UNINITIALIZED port not initialized
+ * @retval IX_ETH_DB_FEATURE_UNAVAILABLE WiFi feature not enabled
+ * @retval IX_ETH_DB_FAIL unknown OS or NPE communication error
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBWiFiDurationIDSet(IxEthDBPortId portID, UINT16 durationID);
+
+/**
+ * @ingroup IxEthDB
+ *
+ * @fn IxEthDBStatus ixEthDBWiFiBBSIDSet(IxEthDBPortId portID, IxEthDBMacAddr *bbsid)
+ *
+ * @brief Sets the BBSID field
+ *
+ * The BBSID field is a 6-byte value which
+ * identifies the infrastructure of the service set managed
+ * by the Access Point having the IXP400 as its processor. The value
+ * is written in the <i>BBSID</i> field of the 802.11 frame header.
+ * The BBSID value is the MAC address of the Access Point.
+ *
+ * @param portID @ref IxEthDBPortId [in] - ID of the port
+ * @param bbsid @ref IxEthDBMacAddr [in] - pointer to 6 bytes containing the BSSID
+ *
+ * @retval IX_ETH_DB_SUCCESS operation completed successfully
+ * @retval IX_ETH_DB_INVALID_PORT portID is not a valid port identifier
+ * @retval IX_ETH_DB_PORT_UNINITIALIZED port not initialized
+ * @retval IX_ETH_DB_INVALID_ARG invalid <i>bbsid</i> pointer argument
+ * @retval IX_ETH_DB_FEATURE_UNAVAILABLE WiFi feature not enabled
+ * @retval IX_ETH_DB_FAIL unknown OS or NPE communication error
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBWiFiBBSIDSet(IxEthDBPortId portID, IxEthDBMacAddr *bbsid);
+
+/**
+ * @ingroup IxEthDB
+ *
+ * @fn IxEthDBStatus ixEthDBSpanningTreeBlockingStateSet(IxEthDBPortId portID, BOOL blocked)
+ *
+ * @brief Sets the STP blocked/unblocked state for a port
+ *
+ * @param portID @ref IxEthDBPortId [in] - ID of the port
+ * @param blocked BOOL [in] - TRUE to set the port as STP blocked, FALSE to set it as unblocked
+ *
+ * @retval IX_ETH_DB_SUCCESS operation completed successfully
+ * @retval IX_ETH_DB_INVALID_PORT portID is not a valid port identifier
+ * @retval IX_ETH_DB_PORT_UNINITIALIZED port not initialized
+ * @retval IX_ETH_DB_FEATURE_UNAVAILABLE Spanning Tree Protocol feature not enabled
+ * @retval IX_ETH_DB_FAIL unknown OS or NPE communication error
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBSpanningTreeBlockingStateSet(IxEthDBPortId portID, BOOL blocked);
+
+/**
+ * @ingroup IxEthDB
+ *
+ * @fn IxEthDBStatus ixEthDBSpanningTreeBlockingStateGet(IxEthDBPortId portID, BOOL *blocked)
+ *
+ * @brief Retrieves the STP blocked/unblocked state for a port
+ *
+ * @param portID @ref IxEthDBPortId [in] - ID of the port
+ * @param blocked BOOL * [in] - set to TRUE if the port is STP blocked, FALSE otherwise
+ *
+ * @retval IX_ETH_DB_SUCCESS operation completed successfully
+ * @retval IX_ETH_DB_INVALID_PORT portID is not a valid port identifier
+ * @retval IX_ETH_DB_PORT_UNINITIALIZED port not initialized
+ * @retval IX_ETH_DB_INVALID_ARG invalid <i>blocked</i> pointer argument
+ * @retval IX_ETH_DB_FEATURE_UNAVAILABLE Spanning Tree Protocol feature not enabled
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBSpanningTreeBlockingStateGet(IxEthDBPortId portID, BOOL *blocked);
+
+/**
+ * @ingroup IxEthDB
+ *
+ * @fn IxEthDBStatus ixEthDBFirewallModeSet(IxEthDBPortId portID, IxEthDBFirewallMode mode)
+ *
+ * @brief Sets the firewall mode to use white or black listing
+ *
+ * When enabled, the NPE MAC address based firewall support operates in two modes:
+ *
+ * - white-list mode (MAC address based admission)
+ * - <i>mode</i> set to IX_ETH_DB_FIREWALL_WHITE_LIST
+ * - only packets originating from MAC addresses contained in the firewall address list
+ * are allowed on the Rx path
+ * - black-list mode (MAC address based blocking)
+ * - <i>mode</i> set to IX_ETH_DB_FIREWALL_BLACK_LIST
+ * - packets originating from MAC addresses contained in the firewall address list
+ * are discarded
+ *
+ * @param portID @ref IxEthDBPortId [in] - ID of the port
+ * @param mode @ref IxEthDBFirewallMode [in] - firewall mode (IX_ETH_DB_FIREWALL_WHITE_LIST or IX_ETH_DB_FIREWALL_BLACK_LIST)
+ *
+ * @note by default the firewall operates in black-list mode with an empty address
+ * list, hence it doesn't filter any packets
+ *
+ * @retval IX_ETH_DB_SUCCESS operation completed successfully
+ * @retval IX_ETH_DB_INVALID_PORT portID is not a valid port identifier
+ * @retval IX_ETH_DB_PORT_UNINITIALIZED port not initialized
+ * @retval IX_ETH_DB_FEATURE_UNAVAILABLE Firewall feature not enabled
+ * @retval IX_ETH_DB_INVALID_ARGUMENT <i>mode</i> argument is not a valid firewall configuration mode
+ * @retval IX_ETH_DB_FAIL unknown OS or NPE communication error
+*/
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBFirewallModeSet(IxEthDBPortId portID, IxEthDBFirewallMode mode);
+
+/**
+ * @ingroup IxEthDB
+ *
+ * @fn ixEthDBFirewallInvalidAddressFilterEnable(IxEthDBPortId portID, BOOL enable)
+ *
+ * @brief Enables or disables invalid MAC address filtering
+ *
+ * According to IEEE802 it is illegal for a source address to be a multicast
+ * or broadcast address. If this feature is enabled the NPE inspects the source
+ * MAC addresses of incoming frames and discards them if invalid addresses are
+ * detected.
+ *
+ * By default this service is enabled, if the firewall feature is supported by the
+ * NPE image.
+ *
+ * @param portID ID of the port
+ * @param enable TRUE to enable invalid MAC address filtering and FALSE to disable it
+ *
+ * @retval IX_ETH_DB_SUCCESS operation completed successfully
+ * @retval IX_ETH_DB_INVALID_PORT portID is not a valid port identifier
+ * @retval IX_ETH_DB_PORT_UNINITIALIZED port not initialized
+ * @retval IX_ETH_DB_FEATURE_UNAVAILABLE Firewall feature not enabled
+ * @retval IX_ETH_DB_FAIL unknown OS or NPE communication error
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBFirewallInvalidAddressFilterEnable(IxEthDBPortId portID, BOOL enable);
+
+/**
+ * @ingroup IxEthDB
+ *
+ * @fn IxEthDBStatus ixEthDBFirewallEntryAdd(IxEthDBPortId portID, IxEthDBMacAddr *macAddr)
+ *
+ * @brief Adds a MAC address to the firewall address list
+ *
+ * Note that adding the same MAC address twice will not return an error
+ * but will not actually accomplish anything.
+ *
+ * The firewall MAC address list has a limited number of entries; once
+ * the maximum number of entries has been reached this function will failed
+ * to add more addresses, returning IX_ETH_DB_NOMEM.
+ *
+ * @param portID @ref IxEthDBPortId [in] - ID of the port
+ * @param macAddr @ref IxEthDBMacAddr [in] - MAC address to be added
+ *
+ * @retval IX_ETH_DB_SUCCESS operation completed successfully
+ * @retval IX_ETH_DB_INVALID_PORT portID is not a valid port identifier
+ * @retval IX_ETH_DB_PORT_UNINITIALIZED port not initialized
+ * @retval IX_ETH_DB_INVALID_ARG invalid <i>macAddr</i> pointer argument
+ * @retval IX_ETH_DB_NOMEM maximum number of records reached
+ * @retval IX_ETH_DB_BUSY lock condition or transaction in progress, try again later
+ * @retval IX_ETH_DB_FEATURE_UNAVAILABLE Firewall feature not enabled
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBFirewallEntryAdd(IxEthDBPortId portID, IxEthDBMacAddr *macAddr);
+
+/**
+ * @ingroup IxEthDB
+ *
+ * @fn IxEthDBStatus ixEthDBFirewallEntryRemove(IxEthDBPortId portID, IxEthDBMacAddr *macAddr)
+ *
+ * @brief Removes a MAC address from the firewall address list
+ *
+ * @param portID @ref IxEthDBPortId [in] - ID of the port
+ * @param macAddr @ref IxEthDBMacAddr [in] - MAC address to be removed
+ *
+ * @retval IX_ETH_DB_SUCCESS operation completed successfully
+ * @retval IX_ETH_DB_INVALID_PORT portID is not a valid port identifier
+ * @retval IX_ETH_DB_PORT_UNINITIALIZED port not initialized
+ * @retval IX_ETH_DB_INVALID_ARG invalid <i>macAddr</i> pointer argument
+ * @retval IX_ETH_DB_NO_SUCH_ADDR address not found
+ * @retval IX_ETH_DB_FEATURE_UNAVAILABLE Firewall feature not enabled
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBFirewallEntryRemove(IxEthDBPortId portID, IxEthDBMacAddr *macAddr);
+
+/**
+ * @ingroup IxEthDB
+ *
+ * @fn IxEthDBStatus ixEthDBFirewallTableDownload(IxEthDBPortId portID)
+ *
+ * @brief Downloads the MAC firewall table to a port
+ *
+ * @param portID ID of the port
+ *
+ * @retval IX_ETH_DB_SUCCESS operation completed successfully
+ * @retval IX_ETH_DB_INVALID_PORT portID is not a valid port identifier
+ * @retval IX_ETH_DB_PORT_UNINITIALIZED port not initialized
+ * @retval IX_ETH_DB_FEATURE_UNAVAILABLE Firewall feature not enabled
+ * @retval IX_ETH_DB_FAIL unknown OS or NPE communication error
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBFirewallTableDownload(IxEthDBPortId portID);
+
+/**
+ * @ingroup IxEthDB
+ *
+ * @fn IxEthDBStatus ixEthDBUserFieldSet(IxEthDBRecordType recordType, IxEthDBMacAddr *macAddr, IxEthDBPortId portID, IxEthDBVlanId vlanID, void *field)
+ *
+ * @brief Adds a user-defined field to a database record
+ *
+ * This function associates a user-defined field to a database record.
+ * The user-defined field is passed as a <i>(void *)</i> parameter, hence it can be used
+ * for any purpose (such as identifying a structure). Retrieving the user-defined field from
+ * a record is done using @ref ixEthDBUserFieldGet. Note that EthDB never uses the user-defined
+ * field for any internal operation and it is not aware of the significance of its contents. The
+ * field is only stored as a pointer.
+ *
+ * The database record is identified using a combination of the given parameters, depending on the record type.
+ * All the record types require the record MAC address.
+ *
+ * - IX_ETH_DB_FILTERING_RECORD requires only the MAC address
+ * - IX_ETH_DB_VLAN_FILTERING_RECORD requires the MAC address and the VLAN ID
+ * - IX_ETH_DB_WIFI_RECORD requires the MAC address and the portID
+ * - IX_ETH_DB_FIREWALL_RECORD requires the MAC address and the portID
+ *
+ * Please note that if a parameter is not required it is completely ignored (it does not undergo parameter checking).
+ * The user-defined field can be cleared using a <b>NULL</b> <i>field</i> parameter.
+ *
+ * @param recordType @ref IxEthDBRecordType [in] - type of record (can be IX_ETH_DB_FILTERING_RECORD,
+ * IX_ETH_DB_FILTERING_VLAN_RECORD, IX_ETH_DB_WIFI_RECORD or IX_ETH_DB_FIREWALL_RECORD)
+ * @param portID @ref IxEthDBPortId [in] - ID of the port (required only for WIFI and FIREWALL records)
+ * @param macAddr @ref IxEthDBMacAddr * [in] - MAC address of the record
+ * @param vlanID @ref IxEthDBVlanId [in] - VLAN ID of the record (required only for FILTERING_VLAN records)
+ * @param field void * [in] - user defined field
+ *
+ * @retval IX_ETH_DB_SUCCESS operation completed successfully
+ * @retval IX_ETH_DB_INVALID_PORT portID was required but it is not a valid port identifier
+ * @retval IX_ETH_DB_INVALID_ARG invalid <i>macAddr</i> pointer argument
+ * @retval IX_ETH_DB_NO_SUCH_ADDR record not found
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBUserFieldSet(IxEthDBRecordType recordType, IxEthDBMacAddr *macAddr, IxEthDBPortId portID, IxEthDBVlanId vlanID, void *field);
+
+/**
+ * @ingroup IxEthDB
+ *
+ * @fn IxEthDBStatus ixEthDBUserFieldGet(IxEthDBRecordType recordType, IxEthDBMacAddr *macAddr, IxEthDBPortId portID, IxEthDBVlanId vlanID, void **field)
+ *
+ * @brief Retrieves a user-defined field from a database record
+ *
+ * The database record is identified using a combination of the given parameters, depending on the record type.
+ * All the record types require the record MAC address.
+ *
+ * - IX_ETH_DB_FILTERING_RECORD requires only the MAC address
+ * - IX_ETH_DB_VLAN_FILTERING_RECORD requires the MAC address and the VLAN ID
+ * - IX_ETH_DB_WIFI_RECORD requires the MAC address and the portID
+ * - IX_ETH_DB_FIREWALL_RECORD requires the MAC address and the portID
+ *
+ * Please note that if a parameter is not required it is completely ignored (it does not undergo parameter checking).
+ *
+ * If no user-defined field was registered with the specified record then <b>NULL</b> will be written
+ * at the location specified by <i>field</i>.
+ *
+ * @param recordType type of record (can be IX_ETH_DB_FILTERING_RECORD, IX_ETH_DB_FILTERING_VLAN_RECORD, IX_ETH_DB_WIFI_RECORD
+ * or IX_ETH_DB_FIREWALL_RECORD)
+ * @param portID ID of the port (required only for WIFI and FIREWALL records)
+ * @param macAddr MAC address of the record
+ * @param vlanID VLAN ID of the record (required only for FILTERING_VLAN records)
+ * @param field location to write the user defined field into
+ *
+ * @retval IX_ETH_DB_SUCCESS operation completed successfully
+ * @retval IX_ETH_DB_INVALID_PORT portID was required but it is not a valid port identifier
+ * @retval IX_ETH_DB_INVALID_ARG invalid <i>macAddr</i> or <i>field</i> pointer arguments
+ * @retval IX_ETH_DB_NO_SUCH_ADDR record not found
+ */
+IX_ETH_DB_PUBLIC
+IxEthDBStatus ixEthDBUserFieldGet(IxEthDBRecordType recordType, IxEthDBMacAddr *macAddr, IxEthDBPortId portId, IxEthDBVlanId vlanID, void **field);
+
+/**
+ * @}
+ */
+
+#endif /* IxEthDB_H */
diff --git a/cpu/ixp/npe/include/IxEthDBLocks_p.h b/cpu/ixp/npe/include/IxEthDBLocks_p.h
new file mode 100644
index 0000000000..1d8b24fdf6
--- /dev/null
+++ b/cpu/ixp/npe/include/IxEthDBLocks_p.h
@@ -0,0 +1,122 @@
+/**
+ * @file IxEthAccDBLocks_p.h
+ *
+ * @brief Definition of transaction lock stacks and lock utility macros
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+#ifndef IxEthAccDBLocks_p_H
+#define IxEthAccDBLocks_p_H
+
+#include "IxOsPrintf.h"
+
+/* Lock and lock stacks */
+typedef struct
+{
+ IxOsalFastMutex* locks[MAX_LOCKS];
+ UINT32 stackPointer, basePointer;
+} LockStack;
+
+#define TRY_LOCK(mutex) \
+ { \
+ if (ixOsalFastMutexTryLock(mutex) != IX_SUCCESS) \
+ { \
+ return IX_ETH_DB_BUSY; \
+ } \
+ }
+
+
+#define UNLOCK(mutex) { ixOsalFastMutexUnlock(mutex); }
+
+#define INIT_STACK(stack) \
+ { \
+ (stack)->basePointer = 0; \
+ (stack)->stackPointer = 0; \
+ }
+
+#define PUSH_LOCK(stack, lock) \
+ { \
+ if ((stack)->stackPointer == MAX_LOCKS) \
+ { \
+ ERROR_LOG("Ethernet DB: maximum number of elements in a lock stack has been exceeded on push, heavy chaining?\n"); \
+ UNROLL_STACK(stack); \
+ \
+ return IX_ETH_DB_NOMEM; \
+ } \
+ \
+ if (ixOsalFastMutexTryLock(lock) == IX_SUCCESS) \
+ { \
+ (stack)->locks[(stack)->stackPointer++] = (lock); \
+ } \
+ else \
+ { \
+ UNROLL_STACK(stack); \
+ \
+ return IX_ETH_DB_BUSY; \
+ } \
+ }
+
+#define POP_LOCK(stack) \
+ { \
+ ixOsalFastMutexUnlock((stack)->locks[--(stack)->stackPointer]); \
+ }
+
+#define UNROLL_STACK(stack) \
+ { \
+ while ((stack)->stackPointer > (stack)->basePointer) \
+ { \
+ POP_LOCK(stack); \
+ } \
+ }
+
+#define SHIFT_STACK(stack) \
+ { \
+ if ((stack)->basePointer == MAX_LOCKS - 1) \
+ { \
+ ERROR_LOG("Ethernet DB: maximum number of elements in a lock stack has been exceeded on shift, heavy chaining?\n"); \
+ UNROLL_STACK(stack); \
+ \
+ return IX_ETH_DB_BUSY; \
+ } \
+ \
+ ixOsalFastMutexUnlock((stack)->locks[(stack)->basePointer++]); \
+ }
+
+#endif /* IxEthAccDBLocks_p_H */
diff --git a/cpu/ixp/npe/include/IxEthDBLog_p.h b/cpu/ixp/npe/include/IxEthDBLog_p.h
new file mode 100644
index 0000000000..1d6b0bb20d
--- /dev/null
+++ b/cpu/ixp/npe/include/IxEthDBLog_p.h
@@ -0,0 +1,227 @@
+/**
+ * @file IxEthDBLog_p.h
+ *
+ * @brief definitions of log macros and log configuration
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+#include <IxOsal.h>
+
+#ifdef IX_UNIT_TEST
+#define NULL_PRINT_ROUTINE(format, arg...) /* nothing */
+#else
+#define NULL_PRINT_ROUTINE if(0) printf
+#endif
+
+/***************************************************
+ * Globals *
+ ***************************************************/
+/* safe to permanently leave these on */
+#define HAS_ERROR_LOG
+#define HAS_ERROR_IRQ_LOG
+#define HAS_WARNING_LOG
+
+/***************************************************
+ * Log Configuration *
+ ***************************************************/
+
+/* debug output can be turned on unless specifically
+ declared as a non-debug build */
+#ifndef NDEBUG
+
+#undef HAS_EVENTS_TRACE
+#undef HAS_EVENTS_VERBOSE_TRACE
+
+#undef HAS_SUPPORT_TRACE
+#undef HAS_SUPPORT_VERBOSE_TRACE
+
+#undef HAS_NPE_TRACE
+#undef HAS_NPE_VERBOSE_TRACE
+#undef HAS_DUMP_NPE_TREE
+
+#undef HAS_UPDATE_TRACE
+#undef HAS_UPDATE_VERBOSE_TRACE
+
+#endif /* NDEBUG */
+
+
+/***************************************************
+ * Log Macros *
+ ***************************************************/
+
+/************** Globals ******************/
+
+#ifdef HAS_ERROR_LOG
+
+ #define ERROR_LOG printf
+
+#else
+
+ #define ERROR_LOG NULL_PRINT_ROUTINE
+
+#endif
+
+#ifdef HAS_ERROR_IRQ_LOG
+
+ #define ERROR_IRQ_LOG(format, arg1, arg2, arg3, arg4, arg5, arg6) ixOsalLog(IX_OSAL_LOG_LVL_ERROR, IX_OSAL_LOG_DEV_STDOUT, format, arg1, arg2, arg3, arg4, arg5, arg6)
+
+#else
+
+ #define ERROR_IRQ_LOG(format, arg1, arg2, arg3, arg4, arg5, arg6) /* nothing */
+
+#endif
+
+#ifdef HAS_WARNING_LOG
+
+ #define WARNING_LOG printf
+
+#else
+
+ #define WARNING_LOG NULL_PRINT_ROUTINE
+
+#endif
+
+/************** Events *******************/
+
+#ifdef HAS_EVENTS_TRACE
+
+ #define IX_ETH_DB_EVENTS_TRACE printf
+ #define IX_ETH_DB_IRQ_EVENTS_TRACE(format, arg1, arg2, arg3, arg4, arg5, arg6) ixOsalLog(IX_OSAL_LOG_LVL_MESSAGE, IX_OSAL_LOG_DEV_STDOUT, format, arg1, arg2, arg3, arg4, arg5, arg6)
+
+ #ifdef HAS_EVENTS_VERBOSE_TRACE
+
+ #define IX_ETH_DB_EVENTS_VERBOSE_TRACE printf
+
+ #else
+
+ #define IX_ETH_DB_EVENTS_VERBOSE_TRACE NULL_PRINT_ROUTINE
+
+ #endif /* HAS_EVENTS_VERBOSE_TRACE */
+
+#else
+
+ #define IX_ETH_DB_EVENTS_TRACE NULL_PRINT_ROUTINE
+ #define IX_ETH_DB_EVENTS_VERBOSE_TRACE NULL_PRINT_ROUTINE
+ #define IX_ETH_DB_IRQ_EVENTS_TRACE(format, arg1, arg2, arg3, arg4, arg5, arg6) /* nothing */
+
+#endif /* HAS_EVENTS_TRACE */
+
+/************** Support *******************/
+
+#ifdef HAS_SUPPORT_TRACE
+
+ #define IX_ETH_DB_SUPPORT_TRACE printf
+ #define IX_ETH_DB_SUPPORT_IRQ_TRACE(format, arg1, arg2, arg3, arg4, arg5, arg6) ixOsalLog(IX_OSAL_LOG_LVL_MESSAGE, IX_OSAL_LOG_DEV_STDOUT, format, arg1, arg2, arg3, arg4, arg5, arg6)
+
+ #ifdef HAS_SUPPORT_VERBOSE_TRACE
+
+ #define IX_ETH_DB_SUPPORT_VERBOSE_TRACE printf
+
+ #else
+
+ #define IX_ETH_DB_SUPPORT_VERBOSE_TRACE NULL_PRINT_ROUTINE
+
+ #endif /* HAS_SUPPORT_VERBOSE_TRACE */
+
+#else
+
+ #define IX_ETH_DB_SUPPORT_TRACE NULL_PRINT_ROUTINE
+ #define IX_ETH_DB_SUPPORT_VERBOSE_TRACE NULL_PRINT_ROUTINE
+ #define IX_ETH_DB_SUPPORT_IRQ_TRACE(format, arg1, arg2, arg3, arg4, arg5, arg6) /* nothing */
+
+#endif /* HAS_SUPPORT_TRACE */
+
+/************** NPE Adaptor *******************/
+
+#ifdef HAS_NPE_TRACE
+
+ #define IX_ETH_DB_NPE_TRACE printf
+ #define IX_ETH_DB_NPE_IRQ_TRACE(format, arg1, arg2, arg3, arg4, arg5, arg6) ixOsalLog(IX_OSAL_LOG_LVL_MESSAGE, IX_OSAL_LOG_DEV_STDOUT, format, arg1, arg2, arg3, arg4, arg5, arg6)
+
+ #ifdef HAS_NPE_VERBOSE_TRACE
+
+ #define IX_ETH_DB_NPE_VERBOSE_TRACE printf
+
+ #else
+
+ #define IX_ETH_DB_NPE_VERBOSE_TRACE NULL_PRINT_ROUTINE
+
+ #endif /* HAS_NPE_VERBOSE_TRACE */
+
+#else
+
+ #define IX_ETH_DB_NPE_TRACE NULL_PRINT_ROUTINE
+ #define IX_ETH_DB_NPE_VERBOSE_TRACE NULL_PRINT_ROUTINE
+ #define IX_ETH_DB_NPE_IRQ_TRACE(format, arg1, arg2, arg3, arg4, arg5, arg6) /* nothing */
+
+#endif /* HAS_NPE_TRACE */
+
+#ifdef HAS_DUMP_NPE_TREE
+
+#define IX_ETH_DB_NPE_DUMP_ELT(eltBaseAddress, eltSize) ixEthELTDumpTree(eltBaseAddress, eltSize)
+
+#else
+
+#define IX_ETH_DB_NPE_DUMP_ELT(eltBaseAddress, eltSize) /* nothing */
+
+#endif /* HAS_DUMP_NPE_TREE */
+
+/************** Port Update *******************/
+
+#ifdef HAS_UPDATE_TRACE
+
+ #define IX_ETH_DB_UPDATE_TRACE printf
+
+ #ifdef HAS_UPDATE_VERBOSE_TRACE
+
+ #define IX_ETH_DB_UPDATE_VERBOSE_TRACE printf
+
+ #else
+
+ #define IX_ETH_DB_UPDATE_VERBOSE_TRACE NULL_PRINT_ROUTINE
+
+ #endif
+
+#else /* HAS_UPDATE_VERBOSE_TRACE */
+
+ #define IX_ETH_DB_UPDATE_TRACE NULL_PRINT_ROUTINE
+ #define IX_ETH_DB_UPDATE_VERBOSE_TRACE NULL_PRINT_ROUTINE
+
+#endif /* HAS_UPDATE_TRACE */
diff --git a/cpu/ixp/npe/include/IxEthDBMessages_p.h b/cpu/ixp/npe/include/IxEthDBMessages_p.h
new file mode 100644
index 0000000000..ff18160c1f
--- /dev/null
+++ b/cpu/ixp/npe/include/IxEthDBMessages_p.h
@@ -0,0 +1,258 @@
+/**
+ * @file IxEthDBMessages_p.h
+ *
+ * @brief Definitions of NPE messages
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+#ifndef IxEthDBMessages_p_H
+#define IxEthDBMessages_p_H
+
+#include <IxEthNpe.h>
+#include <IxOsCacheMMU.h>
+#include "IxEthDB_p.h"
+
+/* events watched by the Eth event processor */
+#define IX_ETH_DB_MIN_EVENT_ID (IX_ETHNPE_EDB_GETMACADDRESSDATABASE)
+#define IX_ETH_DB_MAX_EVENT_ID (IX_ETHNPE_PC_SETAPMACTABLE)
+
+/* macros to fill and extract data from NPE messages - place any endian conversions here */
+#define RESET_ELT_MESSAGE(message) { memset((void *) &(message), 0, sizeof((message))); }
+#define NPE_MSG_ID(msg) ((msg).data[0] >> 24)
+
+#define FILL_SETPORTVLANTABLEENTRY_MSG(message, portID, setOffset, vlanMembershipSet, ttiSet) \
+ do { \
+ message.data[0] = (IX_ETHNPE_VLAN_SETPORTVLANTABLEENTRY << 24) | (portID << 16) | (setOffset * 2); \
+ message.data[1] = (vlanMembershipSet << 8) | ttiSet; \
+ } while (0);
+
+#define FILL_SETPORTVLANTABLERANGE_MSG(message, portID, offset, length, zone) \
+ do { \
+ message.data[0] = IX_ETHNPE_VLAN_SETPORTVLANTABLERANGE << 24 | portID << 16 | offset << 9 | length << 1; \
+ message.data[1] = (UINT32) zone; \
+ } while (0);
+
+#define FILL_SETDEFAULTRXVID_MSG(message, portID, tpid, vlanTag) \
+ do { \
+ message.data[0] = (IX_ETHNPE_VLAN_SETDEFAULTRXVID << 24) \
+ | (portID << 16); \
+ \
+ message.data[1] = (tpid << 16) | vlanTag; \
+ } while (0);
+
+#define FILL_SETRXTAGMODE_MSG(message, portID, filterMode, tagMode) \
+ do { \
+ message.data[0] = IX_ETHNPE_VLAN_SETRXTAGMODE << 24 \
+ | portID << 16 \
+ | filterMode << 2 \
+ | tagMode; \
+ \
+ message.data[1] = 0; \
+ } while (0);
+
+#define FILL_SETRXQOSENTRY(message, portID, classIndex, trafficClass, aqmQueue) \
+ do { \
+ message.data[0] = IX_ETHNPE_VLAN_SETRXQOSENTRY << 24 \
+ | portID << 16 \
+ | classIndex; \
+ \
+ message.data[1] = trafficClass << 24 \
+ | 0x1 << 23 \
+ | aqmQueue << 16 \
+ | aqmQueue << 4; \
+ } while (0);
+
+#define FILL_SETPORTIDEXTRACTIONMODE(message, portID, enable) \
+ do { \
+ message.data[0] = IX_ETHNPE_VLAN_SETPORTIDEXTRACTIONMODE << 24 \
+ | portID << 16 \
+ | (enable ? 0x1 : 0x0); \
+ \
+ message.data[1] = 0; \
+ } while (0);
+
+
+#define FILL_SETBLOCKINGSTATE_MSG(message, portID, blocked) \
+ do { \
+ message.data[0] = IX_ETHNPE_STP_SETBLOCKINGSTATE << 24 \
+ | portID << 16 \
+ | (blocked ? 0x1 : 0x0); \
+ \
+ message.data[1] = 0; \
+ } while (0);
+
+#define FILL_SETBBSID_MSG(message, portID, bbsid) \
+ do { \
+ message.data[0] = IX_ETHNPE_PC_SETBBSID << 24 \
+ | portID << 16 \
+ | bbsid->macAddress[0] << 8 \
+ | bbsid->macAddress[1]; \
+ \
+ message.data[1] = bbsid->macAddress[2] << 24 \
+ | bbsid->macAddress[3] << 16 \
+ | bbsid->macAddress[4] << 8 \
+ | bbsid->macAddress[5]; \
+ } while (0);
+
+#define FILL_SETFRAMECONTROLDURATIONID(message, portID, frameControlDurationID) \
+ do { \
+ message.data[0] = (IX_ETHNPE_PC_SETFRAMECONTROLDURATIONID << 24) | (portID << 16); \
+ message.data[1] = frameControlDurationID; \
+ } while (0);
+
+#define FILL_SETAPMACTABLE_MSG(message, zone) \
+ do { \
+ message.data[0] = IX_ETHNPE_PC_SETAPMACTABLE << 24 \
+ | 0 << 8 /* always use index 0 */ \
+ | 64; /* 32 entries, 8 bytes each, 4 bytes in a word */ \
+ message.data[1] = (UINT32) zone; \
+ } while (0);
+
+#define FILL_SETFIREWALLMODE_MSG(message, portID, epDelta, mode, address) \
+ do { \
+ message.data[0] = IX_ETHNPE_FW_SETFIREWALLMODE << 24 \
+ | portID << 16 \
+ | (epDelta & 0xFF) << 8 \
+ | mode; \
+ \
+ message.data[1] = (UINT32) address; \
+ } while (0);
+
+#define FILL_SETMACADDRESSDATABASE_MSG(message, portID, epDelta, blockCount, address) \
+ do { \
+ message.data[0] = IX_ETHNPE_EDB_SETMACADDRESSSDATABASE << 24 \
+ | (epDelta & 0xFF) << 8 \
+ | (blockCount & 0xFF); \
+ \
+ message.data[1] = (UINT32) address; \
+ } while (0);
+
+#define FILL_GETMACADDRESSDATABASE(message, npeId, zone) \
+ do { \
+ message.data[0] = IX_ETHNPE_EDB_GETMACADDRESSDATABASE << 24; \
+ message.data[1] = (UINT32) zone; \
+ } while (0);
+
+#define FILL_SETMAXFRAMELENGTHS_MSG(message, portID, maxRxFrameSize, maxTxFrameSize) \
+ do { \
+ message.data[0] = IX_ETHNPE_SETMAXFRAMELENGTHS << 24 \
+ | portID << 16 \
+ | ((maxRxFrameSize + 63) / 64) << 8 /* max Rx 64-byte blocks */ \
+ | (maxTxFrameSize + 63) / 64; /* max Tx 64-byte blocks */ \
+ \
+ message.data[1] = maxRxFrameSize << 16 | maxTxFrameSize; \
+ } while (0);
+
+#define FILL_SETPORTADDRESS_MSG(message, portID, macAddress) \
+ do { \
+ message.data[0] = IX_ETHNPE_EDB_SETPORTADDRESS << 24 \
+ | portID << 16 \
+ | macAddress[0] << 8 \
+ | macAddress[1]; \
+ \
+ message.data[1] = macAddress[2] << 24 \
+ | macAddress[3] << 16 \
+ | macAddress[4] << 8 \
+ | macAddress[5]; \
+ } while (0);
+
+/* access to a MAC node in the NPE tree */
+#define NPE_NODE_BYTE(eltNodeAddr, offset) (((UINT8 *) (eltNodeAddr))[offset])
+
+/* browsing of the implicit linear binary tree structure of the NPE tree */
+#define LEFT_CHILD_OFFSET(offset) ((offset) << 1)
+#define RIGHT_CHILD_OFFSET(offset) (((offset) << 1) + 1)
+
+#define IX_EDB_FLAGS_ACTIVE (0x2)
+#define IX_EDB_FLAGS_VALID (0x1)
+#define IX_EDB_FLAGS_RESERVED (0xfc)
+#define IX_EDB_FLAGS_INACTIVE_VALID (0x1)
+
+#define IX_EDB_NPE_NODE_ELT_PORT_ID_OFFSET (6)
+#define IX_EDB_NPE_NODE_ELT_FLAGS_OFFSET (7)
+#define IX_EDB_NPE_NODE_WIFI_INDEX_OFFSET (6)
+#define IX_EDB_NPE_NODE_WIFI_FLAGS_OFFSET (7)
+#define IX_EDB_NPE_NODE_FW_FLAGS_OFFSET (1)
+#define IX_EDB_NPE_NODE_FW_RESERVED_OFFSET (6)
+#define IX_EDB_NPE_NODE_FW_ADDR_OFFSET (2)
+
+#define IX_EDB_NPE_NODE_VALID(address) ((NPE_NODE_BYTE(address, IX_EDB_NPE_NODE_ELT_FLAGS_OFFSET) & IX_EDB_FLAGS_VALID) != 0)
+#define IX_EDB_NPE_NODE_ACTIVE(address) ((NPE_NODE_BYTE(address, IX_EDB_NPE_NODE_ELT_FLAGS_OFFSET) & IX_EDB_FLAGS_ACTIVE) != 0)
+#define IX_EDB_NPE_NODE_PORT_ID(address) (NPE_NODE_BYTE(address, IX_EDB_NPE_NODE_ELT_PORT_ID_OFFSET))
+
+/* macros to send messages to the NPEs */
+#define IX_ETHDB_ASYNC_SEND_NPE_MSG(npeId, msg, result) \
+ do { \
+ result = ixNpeMhMessageSend(npeId, msg, IX_NPEMH_SEND_RETRIES_DEFAULT); \
+ \
+ if (result != IX_SUCCESS) \
+ { \
+ ERROR_LOG("DB: Failed to send NPE message\n"); \
+ } \
+ } while (0);
+
+#define IX_ETHDB_SYNC_SEND_NPE_MSG(npeId, msg, result) \
+ do { \
+ result = ixNpeMhMessageWithResponseSend(npeId, msg, msg.data[0] >> 24, ixEthDBNpeMsgAck, IX_NPEMH_SEND_RETRIES_DEFAULT); \
+ \
+ if (result == IX_SUCCESS) \
+ { \
+ result = ixOsalMutexLock(&ixEthDBPortInfo[IX_ETH_DB_NPE_TO_PORT_ID(npeId)].npeAckLock, IX_ETH_DB_NPE_TIMEOUT); \
+ \
+ if (result != IX_SUCCESS) \
+ { \
+ ERROR_LOG("DB: NPE failed to respond within %dms\n", IX_ETH_DB_NPE_TIMEOUT); \
+ } \
+ } \
+ else \
+ { \
+ ERROR_LOG("DB: Failed to send NPE message\n"); \
+ } \
+ } while (0);
+
+#ifndef IX_NDEBUG
+#define IX_ETH_DB_NPE_MSG_HISTORY_DEPTH (100)
+extern IX_ETH_DB_PUBLIC UINT32 npeMsgHistory[IX_ETH_DB_NPE_MSG_HISTORY_DEPTH][2];
+extern IX_ETH_DB_PUBLIC UINT32 npeMsgHistoryLen;
+#endif
+
+#define IX_ETHDB_SEND_NPE_MSG(npeId, msg, result) { LOG_NPE_MSG(msg); IX_ETHDB_SYNC_SEND_NPE_MSG(npeId, msg, result); }
+
+#endif /* IxEthDBMessages_p_H */
diff --git a/cpu/ixp/npe/include/IxEthDBPortDefs.h b/cpu/ixp/npe/include/IxEthDBPortDefs.h
new file mode 100644
index 0000000000..c3acbdddef
--- /dev/null
+++ b/cpu/ixp/npe/include/IxEthDBPortDefs.h
@@ -0,0 +1,163 @@
+/**
+ * @file IxEthDBPortDefs.h
+ *
+ * @brief Public definition of the ports and port capabilities
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+/**
+ * @defgroup IxEthDBPortDefs IXP400 Ethernet Database Port Definitions (IxEthDBPortDefs)
+ *
+ * @brief IXP400 Public definition of the ports and port capabilities
+ *
+ * @{
+ */
+
+#ifndef IxEthDBPortDefs_H
+#define IxEthDBPortDefs_H
+
+/**
+ * @brief Port types - currently only Ethernet NPEs are recognized as specific types
+ * All other (user-defined) ports must be specified as IX_ETH_GENERIC
+ */
+typedef enum
+{
+ IX_ETH_GENERIC = 0, /**< generic ethernet port */
+ IX_ETH_NPE /**< specific Ethernet NPE */
+} IxEthDBPortType;
+
+/**
+ * @brief Port capabilities - used by ixEthAccDatabaseMaintenance to decide whether it
+ * should manually age entries or not depending on the port capabilities.
+ *
+ * Ethernet NPEs have aging capabilities, meaning that they will age the entries
+ * automatically (by themselves).*/
+typedef enum
+{
+ IX_ETH_NO_CAPABILITIES = 0, /**< no aging capabilities */
+ IX_ETH_ENTRY_AGING = 0x1 /**< aging capabilities present */
+} IxEthDBPortCapability;
+
+/**
+ * @brief Port Definition - a structure contains the Port type and capabilities
+ */
+typedef struct
+{
+ IxEthDBPortType type;
+ IxEthDBPortCapability capabilities;
+} IxEthDBPortDefinition;
+
+/**
+ * @brief Port definitions structure, indexed on the port ID
+ * @warning Ports 0 and 1 are used by the Ethernet access component therefore
+ * it is essential to be left untouched. Port 2 here (WAN) is given as
+ * an example port. The NPE firmware also assumes the NPE B to be
+ * the port 0 and NPE C to be the port 1.
+ *
+ * @note that only 32 ports (0..31) are supported by EthDB
+ */
+static const IxEthDBPortDefinition ixEthDBPortDefinitions[] =
+{
+ /* id type capabilities */
+ { /* 0 */ IX_ETH_NPE, IX_ETH_NO_CAPABILITIES }, /* Ethernet NPE B */
+ { /* 1 */ IX_ETH_NPE, IX_ETH_NO_CAPABILITIES }, /* Ethernet NPE C */
+ { /* 2 */ IX_ETH_NPE, IX_ETH_NO_CAPABILITIES }, /* Ethernet NPE A */
+ { /* 3 */ IX_ETH_GENERIC, IX_ETH_NO_CAPABILITIES }, /* WAN port */
+};
+
+/**
+ * @def IX_ETH_DB_NUMBER_OF_PORTS
+ * @brief number of supported ports
+ */
+#define IX_ETH_DB_NUMBER_OF_PORTS (sizeof (ixEthDBPortDefinitions) / sizeof (ixEthDBPortDefinitions[0]))
+
+/**
+ * @def IX_ETH_DB_UNKNOWN_PORT
+ * @brief definition of an unknown port
+ */
+#define IX_ETH_DB_UNKNOWN_PORT (0xff)
+
+/**
+ * @def IX_ETH_DB_ALL_PORTS
+ * @brief Special port ID indicating all the ports
+ * @note This port ID can be used only by a subset of the EthDB API; each
+ * function specifically mentions whether this is a valid parameter as the port ID
+ */
+#define IX_ETH_DB_ALL_PORTS (IX_ETH_DB_NUMBER_OF_PORTS + 1)
+
+/**
+ * @def IX_ETH_DB_PORTS_ASSERTION
+ * @brief catch invalid port definitions (<2) with a
+ * compile-time assertion resulting in a duplicate case error.
+ */
+#define IX_ETH_DB_PORTS_ASSERTION { switch(0) { case 0 : ; case 1 : ; case IX_ETH_DB_NUMBER_OF_PORTS : ; }}
+
+/**
+ * @def IX_ETH_DB_CHECK_PORT(portID)
+ * @brief safety checks to verify whether the port is invalid or uninitialized
+ */
+#define IX_ETH_DB_CHECK_PORT(portID) \
+{ \
+ if ((portID) >= IX_ETH_DB_NUMBER_OF_PORTS) \
+ { \
+ return IX_ETH_DB_INVALID_PORT; \
+ } \
+ \
+ if (!ixEthDBPortInfo[(portID)].enabled) \
+ { \
+ return IX_ETH_DB_PORT_UNINITIALIZED; \
+ } \
+}
+
+/**
+ * @def IX_ETH_DB_CHECK_PORT_ALL(portID)
+ * @brief safety checks to verify whether the port is invalid or uninitialized;
+ * tolerates the use of IX_ETH_DB_ALL_PORTS
+ */
+#define IX_ETH_DB_CHECK_PORT_ALL(portID) \
+{ \
+ if ((portID) != IX_ETH_DB_ALL_PORTS) \
+ IX_ETH_DB_CHECK_PORT(portID) \
+}
+
+#endif /* IxEthDBPortDefs_H */
+/**
+ *@}
+ */
diff --git a/cpu/ixp/npe/include/IxEthDBQoS.h b/cpu/ixp/npe/include/IxEthDBQoS.h
new file mode 100644
index 0000000000..6d34889452
--- /dev/null
+++ b/cpu/ixp/npe/include/IxEthDBQoS.h
@@ -0,0 +1,154 @@
+/**
+ * @file IxEthDBQoS.h
+ *
+ * @brief Public definitions for QoS traffic classes
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+/**
+ * @defgroup IxEthDBPortDefs IXP400 Ethernet QoS definitions
+ *
+ * @brief IXP00 Public definitions for QoS traffic classes
+ *
+ * @{
+ */
+
+#ifndef IxEthDBQoS_H
+#define IxEthDBQoS_H
+
+/**
+ * @def IX_ETH_DB_QUEUE_UNAVAILABLE
+ * @brief alias to indicate a queue (traffic class) is not available
+ */
+#define IX_ETH_DB_QUEUE_UNAVAILABLE (0)
+
+#ifndef IX_IEEE802_1Q_QOS_PRIORITY_COUNT
+/**
+ * @def IX_IEEE802_1Q_QOS_PRIORITY_COUNT
+ * @brief number of QoS priorities, according to IEEE 802.1Q
+ */
+#define IX_IEEE802_1Q_QOS_PRIORITY_COUNT (8)
+#endif
+
+/**
+ * @brief array containing all the supported traffic class configurations
+ */
+static const
+UINT8 ixEthDBQueueAssignments[][IX_IEEE802_1Q_QOS_PRIORITY_COUNT] =
+{
+ { 4, 5, 6, 7, IX_ETH_DB_QUEUE_UNAVAILABLE, IX_ETH_DB_QUEUE_UNAVAILABLE, IX_ETH_DB_QUEUE_UNAVAILABLE, IX_ETH_DB_QUEUE_UNAVAILABLE },
+ { 15, 16, 17, 18, IX_ETH_DB_QUEUE_UNAVAILABLE, IX_ETH_DB_QUEUE_UNAVAILABLE, IX_ETH_DB_QUEUE_UNAVAILABLE, IX_ETH_DB_QUEUE_UNAVAILABLE },
+ { 11, 23, 26, IX_ETH_DB_QUEUE_UNAVAILABLE, IX_ETH_DB_QUEUE_UNAVAILABLE, IX_ETH_DB_QUEUE_UNAVAILABLE, IX_ETH_DB_QUEUE_UNAVAILABLE, IX_ETH_DB_QUEUE_UNAVAILABLE },
+ { 4, 5, 6, 7, 8, 9, 10, 11 }
+ /* add here all other cases of queue configuration structures and update ixEthDBTrafficClassDefinitions to use them */
+};
+
+/**
+ * @brief value used to index the NPE A functionality ID in the traffic class definition table
+ */
+#define IX_ETH_DB_NPE_A_FUNCTIONALITY_ID_INDEX (0)
+
+/**
+ * @brief value used to index the traffic class count in the traffic class definition table
+ */
+#define IX_ETH_DB_TRAFFIC_CLASS_COUNT_INDEX (1)
+
+/**
+ * @brief value used to index the queue assignment index in the traffic class definition table
+ */
+#define IX_ETH_DB_QUEUE_ASSIGNMENT_INDEX (2)
+
+/**
+ * @brief traffic class definitions
+ *
+ * This array contains the default traffic class definition configuration,
+ * as well as any special cases dictated by the functionality ID of NPE A.
+ *
+ * The default case should not be removed (otherwise the Ethernet
+ * components will assert a fatal failure on initialization).
+ */
+static const
+UINT8 ixEthDBTrafficClassDefinitions[][3] =
+{
+ /* NPE A functionality ID | traffic class count | queue assignment index (points to the queue enumeration in ixEthDBQueueAssignments) */
+ { 0x00, 4, 0 }, /* default case - DO NOT REMOVE */
+ { 0x04, 4, 1 }, /* NPE A image ID 0.4.0.0 */
+ { 0x09, 3, 2 }, /* NPE A image ID 0.9.0.0 */
+ { 0x80, 8, 3 }, /* NPE A image ID 10.80.02.0 */
+ { 0x81, 8, 3 }, /* NPE A image ID 10.81.02.0 */
+ { 0x82, 8, 3 } /* NPE A image ID 10.82.02.0 */
+};
+
+/**
+ * @brief IEEE 802.1Q recommended QoS Priority => traffic class maps
+ *
+ * @verbatim
+ Number of available traffic classes
+ 1 2 3 4 5 6 7 8
+ QoS Priority
+ 0 0 0 0 1 1 1 1 2
+ 1 0 0 0 0 0 0 0 0
+ 2 0 0 0 0 0 0 0 1
+ 3 0 0 0 1 1 2 2 3
+ 4 0 1 1 2 2 3 3 4
+ 5 0 1 1 2 3 4 4 5
+ 6 0 1 2 3 4 5 5 6
+ 7 0 1 2 3 4 5 6 7
+
+ @endverbatim
+ */
+static const
+UINT8 ixEthIEEE802_1QUserPriorityToTrafficClassMapping[IX_IEEE802_1Q_QOS_PRIORITY_COUNT][IX_IEEE802_1Q_QOS_PRIORITY_COUNT] =
+ {
+ { 0, 0, 0, 0, 0, 0, 0, 0 }, /* 1 traffic class available */
+ { 0, 0, 0, 0, 1, 1, 1, 1 }, /* 2 traffic classes available */
+ { 0, 0, 0, 0, 1, 1, 2, 2 }, /* 3 traffic classes available */
+ { 1, 0, 0, 1, 2, 2, 3, 3 }, /* 4 traffic classes available */
+ { 1, 0, 0, 1, 2, 3, 4, 4 }, /* 5 traffic classes available */
+ { 1, 0, 0, 2, 3, 4, 5, 5 }, /* 6 traffic classes available */
+ { 1, 0, 0, 2, 3, 4, 5, 6 }, /* 7 traffic classes available */
+ { 2, 0, 1, 3, 4, 5, 6, 7 } /* 8 traffic classes available */
+ };
+
+#endif /* IxEthDBQoS_H */
+
+/**
+ *@}
+ */
diff --git a/cpu/ixp/npe/include/IxEthDB_p.h b/cpu/ixp/npe/include/IxEthDB_p.h
new file mode 100644
index 0000000000..e7c67ae520
--- /dev/null
+++ b/cpu/ixp/npe/include/IxEthDB_p.h
@@ -0,0 +1,712 @@
+/**
+ * @file IxEthDB_p.h
+ *
+ * @brief Private MAC learning API
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+#ifndef IxEthDB_p_H
+#define IxEthDB_p_H
+
+#include <IxTypes.h>
+#include <IxOsal.h>
+#include <IxEthDB.h>
+#include <IxNpeMh.h>
+#include <IxEthDBPortDefs.h>
+
+#include "IxEthDBMessages_p.h"
+#include "IxEthDBLog_p.h"
+
+#if (CPU==SIMSPARCSOLARIS)
+
+/* when running unit tests intLock() won't protect the event queue so we lock it manually */
+#define TEST_FIXTURE_LOCK_EVENT_QUEUE { ixOsalMutexLock(&eventQueueLock, IX_OSAL_WAIT_FOREVER); }
+#define TEST_FIXTURE_UNLOCK_EVENT_QUEUE { ixOsalMutexUnlock(&eventQueueLock); }
+
+#else
+
+#define TEST_FIXTURE_LOCK_EVENT_QUEUE /* nothing */
+#define TEST_FIXTURE_UNLOCK_EVENT_QUEUE /* nothing */
+
+#endif /* #if(CPU==SIMSPARCSOLARIS) */
+
+#ifndef IX_UNIT_TEST
+
+#define TEST_FIXTURE_INCREMENT_DB_CORE_ACCESS_COUNTER /* nothing */
+#define TEST_FIXTURE_MARK_OVERFLOW_EVENT /* nothing */
+
+#else
+
+extern int dbAccessCounter;
+extern int overflowEvent;
+
+#define TEST_FIXTURE_INCREMENT_DB_CORE_ACCESS_COUNTER { dbAccessCounter++; }
+#define TEST_FIXTURE_MARK_OVERFLOW_EVENT { overflowEvent = 1; }
+
+#endif
+
+/* code readability markers */
+#define __mempool__ /* memory pool marker */
+#define __lock__ /* hash write locking marker */
+#define __smartpointer__ /* smart pointer marker - warning: use only clone() when duplicating! */
+#define __alignment__ /* marker for data used only as alignment zones */
+
+/* constants */
+#define IX_ETH_DB_NPE_TIMEOUT (100) /* NPE response timeout, in ms */
+
+/**
+ * number of hash table buckets
+ * it should be at least 8x the predicted number of entries for performance
+ * each bucket needs 8 bytes
+ */
+#define NUM_BUCKETS (8192)
+
+/**
+ * number of hash table buckets to preload when incrementing bucket iterator
+ * = two cache lines
+ */
+#define IX_ETHDB_CACHE_LINE_AHEAD (2)
+
+#define IX_ETHDB_BUCKETPTR_AHEAD ((IX_ETHDB_CACHE_LINE_AHEAD * IX_OSAL_CACHE_LINE_SIZE)/sizeof(void *))
+
+#define IX_ETHDB_BUCKET_INDEX_MASK (((IX_OSAL_CACHE_LINE_SIZE)/sizeof(void *)) - 1)
+
+/* locks */
+#define MAX_LOCKS (20) /**< maximum number of locks used simultaneously, do not tamper with */
+
+/* learning tree constants */
+#define INITIAL_ELT_SIZE (8) /**< initial byte size of tree (empty unused root size) */
+#define MAX_ELT_SIZE (512) /**< maximum number of entries (includes unused root) */
+#define MAX_GW_SIZE (32) /**< maximum number of gateway entries (including unused root) */
+#define MAX_FW_SIZE (32) /**< maximum number of firewall entries (including unused root) */
+#define ELT_ENTRY_SIZE (8) /**< entry size, in bytes */
+#define ELT_ROOT_OFFSET (ELT_ENTRY_SIZE) /**< tree root offset, in bytes - node preceeding root is unused */
+#define FULL_ELT_BYTE_SIZE (MAX_ELT_SIZE * ELT_ENTRY_SIZE) /**< full size of tree, in bytes, including unused root */
+#define FULL_GW_BYTE_SIZE (MAX_GW_SIZE * ELT_ENTRY_SIZE) /**< full size of gateway list, in bytes, including unused root */
+#define FULL_FW_BYTE_SIZE (MAX_FW_SIZE * ELT_ENTRY_SIZE) /**< full size of firewall table, in bytes, including unused root */
+
+/* maximum size of the VLAN table:
+ * 4096 bits (one per VLAN)
+ * 8 bits in one byte
+ * interleaved VLAN membership and VLAN TTI (*2) */
+#define FULL_VLAN_BYTE_SIZE (4096 / 8 * 2)
+
+/* upper 9 bits used as set index, lower 3 bits as byte index */
+#define VLAN_SET_OFFSET(vlanID) ((vlanID) >> 3)
+#define VLAN_SET_MASK(vlanID) (0x7 - ((vlanID) & 0x7))
+
+/* Update zone definitions */
+#define NPE_TREE_MEM_SIZE (4096) /* ((511 entries + 1 unused root) * 8 bytes/entry) */
+
+/* check the above value, we rely on 4k */
+#if NPE_TREE_MEM_SIZE != 4096
+ #error NPE_TREE_MEM_SIZE is not defined to 4096 bytes!
+#endif
+
+/* Size Filtering limits (Jumbo frame filtering) */
+#define IX_ETHDB_MAX_FRAME_SIZE 65535 /* other ports than NPE ports */
+#define IX_ETHDB_MIN_FRAME_SIZE 1 /* other ports than NPE ports */
+#define IX_ETHDB_MAX_NPE_FRAME_SIZE 16320 /* NPE ports firmware limit */
+#define IX_ETHDB_MIN_NPE_FRAME_SIZE 1 /* NPE ports firmware limit */
+#define IX_ETHDB_DEFAULT_FRAME_SIZE 1522
+
+/* memory management pool sizes */
+
+/*
+ * Note:
+ *
+ * NODE_POOL_SIZE controls the maximum number of elements in the database at any one time.
+ * It should be large enough to cover all the search trees of all the ports simultaneously.
+ *
+ * MAC_POOL_SIZE should be higher than NODE_POOL_SIZE by at least the total number of MAC addresses
+ * possible to be held at any time in all the ports.
+ *
+ * TREE_POOL_SIZE should follow the same guideline as for MAC_POOL_SIZE.
+ *
+ * The database structure described here (2000/4000/4000) is enough for two NPEs holding at most 511
+ * entries each plus one PCI NIC holding at most 900 entries.
+ */
+
+#define NODE_POOL_SIZE (2000) /**< number of HashNode objects - also master number of elements in the database; each entry has 16 bytes */
+#define MAC_POOL_SIZE (4000) /**< number of MacDescriptor objects; each entry has 28 bytes */
+#define TREE_POOL_SIZE (4000) /**< number of MacTreeNode objects; each entry has 16 bytes */
+
+/* retry policies */
+#define BUSY_RETRY_ENABLED (TRUE) /**< if set to TRUE the API will retry automatically calls returning BUSY */
+#define FOREVER_RETRY (TRUE) /**< if set to TRUE the API will retry forever BUSY calls */
+#define MAX_RETRIES (400) /**< upper retry limit - used only when FOREVER_RETRY is FALSE */
+#define BUSY_RETRY_YIELD (5) /**< ticks to yield for every failed retry */
+
+/* event management */
+#define EVENT_QUEUE_SIZE (500) /**< size of the sink collecting events from the Message Handler FIFO */
+#define EVENT_PROCESSING_LIMIT (100) /**< batch processing control size (how many events are extracted from the queue at once) */
+
+/* MAC descriptors */
+#define STATIC_ENTRY (TRUE)
+#define DYNAMIC_ENTRY (FALSE)
+
+/* age reset on next maintenance - incrementing by 1 will reset to 0 */
+#define AGE_RESET (0xFFFFFFFF)
+
+/* dependency maps */
+#define EMPTY_DEPENDENCY_MAP (0)
+
+/* trees */
+#define RIGHT (1)
+#define LEFT (-1)
+
+/* macros */
+#define MIN(a, b) ((a) < (b) ? (a) : (b))
+
+#define IX_ETH_DB_CHECK_PORT_EXISTS(portID) \
+{ \
+ if ((portID) >= IX_ETH_DB_NUMBER_OF_PORTS) \
+ { \
+ return IX_ETH_DB_INVALID_PORT; \
+ } \
+}
+
+#define IX_ETH_DB_CHECK_PORT_INITIALIZED(portID) \
+{ \
+ if ((portID) >= IX_ETH_DB_NUMBER_OF_PORTS) \
+ { \
+ return IX_ETH_DB_INVALID_PORT; \
+ } \
+ else \
+ { \
+ if (!ixEthDBPortInfo[portID].initialized) \
+ { \
+ return IX_ETH_DB_PORT_UNINITIALIZED; \
+ } \
+ } \
+}
+
+/* single NPE check */
+#define IX_ETH_DB_CHECK_SINGLE_NPE(portID) \
+ if (ixEthDBSingleEthNpeCheck(portID) != IX_ETH_DB_SUCCESS) \
+ { \
+ WARNING_LOG("EthDB: port ID %d is unavailable\n",(UINT32) portID); \
+ \
+ return IX_ETH_DB_INVALID_PORT; \
+ }
+
+/* feature check */
+#define IX_ETH_DB_CHECK_FEATURE(portID, feature) \
+ if ((ixEthDBPortInfo[portID].featureStatus & feature) == 0) \
+ { \
+ return IX_ETH_DB_FEATURE_UNAVAILABLE; \
+ }
+
+/* busy retrying */
+#define BUSY_RETRY(functionCall) \
+ { \
+ UINT32 retries = 0; \
+ IxEthDBStatus br_result; \
+ \
+ while ((br_result = functionCall) == IX_ETH_DB_BUSY \
+ && BUSY_RETRY_ENABLED && (FOREVER_RETRY || ++retries < MAX_RETRIES)) { ixOsalSleep(BUSY_RETRY_YIELD); }; \
+ \
+ if ((!FOREVER_RETRY && retries == MAX_RETRIES) || (br_result == IX_ETH_DB_FAIL)) \
+ {\
+ ERROR_LOG("Ethernet Learning Database Error: BUSY_RETRY failed at %s:%d\n", __FILE__, __LINE__); \
+ }\
+ }
+
+#define BUSY_RETRY_WITH_RESULT(functionCall, brwr_result) \
+ { \
+ UINT32 retries = 0; \
+ \
+ while ((brwr_result = functionCall) == IX_ETH_DB_BUSY \
+ && BUSY_RETRY_ENABLED && (FOREVER_RETRY || ++retries < MAX_RETRIES)) { ixOsalSleep(BUSY_RETRY_YIELD); }; \
+ \
+ if ((!FOREVER_RETRY && retries == MAX_RETRIES) || (brwr_result == IX_ETH_DB_FAIL)) \
+ {\
+ ERROR_LOG("Ethernet Learning Database Error: BUSY_RETRY_WITH_RESULT failed at %s:%d\n", __FILE__, __LINE__); \
+ }\
+ }
+
+/* iterators */
+#define IS_ITERATOR_VALID(iteratorPtr) ((iteratorPtr)->node != NULL)
+
+/* dependency port maps */
+
+/* Warning: if port indexing starts from 1 replace (portID) with (portID - 1) in DEPENDENCY_MAP (and make sure IX_ETH_DB_NUMBER_OF_PORTS is big enough) */
+
+/* gives an empty dependency map */
+#define SET_EMPTY_DEPENDENCY_MAP(map) { int i = 0; for (; i < 32 ; i++) map[i] = 0; }
+
+#define IS_EMPTY_DEPENDENCY_MAP(result, map) { int i = 0 ; result = TRUE; for (; i < 32 ; i++) if (map[i] != 0) { result = FALSE; break; }}
+
+/**
+ * gives a map consisting only of 'portID'
+ */
+#define SET_DEPENDENCY_MAP(map, portID) {SET_EMPTY_DEPENDENCY_MAP(map); map[portID >> 3] = 1 << (portID & 0x7);}
+
+/**
+ * gives a map resulting from joining map1 and map2
+ */
+#define JOIN_MAPS(map, map1, map2) { int i = 0; for (; i < 32 ; i++) map[i] = map1[i] | map2[i]; }
+
+/**
+ * gives the map resulting from joining portID and map
+ */
+#define JOIN_PORT_TO_MAP(map, portID) { map[portID >> 3] |= 1 << (portID & 0x7); }
+
+/**
+ * gives the map resulting from excluding portID from map
+ */
+#define EXCLUDE_PORT_FROM_MAP(map, portID) { map[portID >> 3] &= ~(1 << (portID & 0x7); }
+
+/**
+ * returns TRUE if map1 is a subset of map2 and FALSE otherwise
+ */
+#define IS_MAP_SUBSET(result, map1, map2) { int i = 0; result = TRUE; for (; i < 32 ; i++) if ((map1[i] | map2[i]) != map2[i]) result = FALSE; }
+
+/**
+ * returns TRUE is portID is part of map and FALSE otherwise
+ */
+#define IS_PORT_INCLUDED(portID, map) ((map[portID >> 3] & (1 << (portID & 0x7))) != 0)
+
+/**
+ * returns the difference between map1 and map2 (ports included in map1 and not included in map2)
+ */
+#define DIFF_MAPS(map, map1, map2) { int i = 0; for (; i < 32 ; i++) map[i] = map1[i] ^ (map1[i] & map2[i]); }
+
+/**
+ * returns TRUE if the maps collide (have at least one port in common) and FALSE otherwise
+ */
+#define MAPS_COLLIDE(result, map1, map2) { int i = 0; result = FALSE; for (; i < 32 ; i++) if ((map1[i] & map2[i]) != 0) result = TRUE; }
+
+/* size (number of ports) of a dependency map */
+#define GET_MAP_SIZE(map, size) { int i = 0, b = 0; size = 0; for (; i < 32 ; i++) { char y = map[i]; for (; b < 8 && (y >>= 1); b++) size += (y & 1); }}
+
+/* copy map2 into map1 */
+#define COPY_DEPENDENCY_MAP(map1, map2) { memcpy (map1, map2, sizeof (map1)); }
+
+/* definition of a port map size/port number which cannot be reached (we support at most 32 ports) */
+#define MAX_PORT_SIZE (0xFF)
+#define MAX_PORT_NUMBER (0xFF)
+
+#define IX_ETH_DB_CHECK_REFERENCE(ptr) { if ((ptr) == NULL) { return IX_ETH_DB_INVALID_ARG; } }
+#define IX_ETH_DB_CHECK_MAP(portID, map) { if (!IS_PORT_INCLUDED(portID, map)) { return IX_ETH_DB_INVALID_ARG; } }
+
+/* event queue macros */
+#define EVENT_QUEUE_WRAP(offset) ((offset) >= EVENT_QUEUE_SIZE ? (offset) - EVENT_QUEUE_SIZE : (offset))
+
+#define CAN_ENQUEUE(eventQueuePtr) ((eventQueuePtr)->length < EVENT_QUEUE_SIZE)
+
+#define QUEUE_HEAD(eventQueuePtr) (&(eventQueuePtr)->queue[EVENT_QUEUE_WRAP((eventQueuePtr)->base + (eventQueuePtr)->length)])
+
+#define QUEUE_TAIL(eventQueuePtr) (&(eventQueuePtr)->queue[(eventQueuePtr)->base])
+
+#define PUSH_UPDATE_QUEUE(eventQueuePtr) { (eventQueuePtr)->length++; }
+
+#define SHIFT_UPDATE_QUEUE(eventQueuePtr) \
+ { \
+ (eventQueuePtr)->base = EVENT_QUEUE_WRAP((eventQueuePtr)->base + 1); \
+ (eventQueuePtr)->length--; \
+ }
+
+#define RESET_QUEUE(eventQueuePtr) \
+ { \
+ (eventQueuePtr)->base = 0; \
+ (eventQueuePtr)->length = 0; \
+ }
+
+/* node stack macros - used to browse a tree without using a recursive function */
+#define NODE_STACK_INIT(stack) { (stack)->nodeCount = 0; }
+#define NODE_STACK_PUSH(stack, node, offset) { (stack)->nodes[(stack)->nodeCount] = (node); (stack)->offsets[(stack)->nodeCount++] = (offset); }
+#define NODE_STACK_POP(stack, node, offset) { (node) = (stack)->nodes[--(stack)->nodeCount]; offset = (stack)->offsets[(stack)->nodeCount]; }
+#define NODE_STACK_NONEMPTY(stack) ((stack)->nodeCount != 0)
+
+#ifndef IX_NDEBUG
+#define IX_ETH_DB_NPE_MSG_HISTORY_DEPTH (100)
+#define LOG_NPE_MSG(msg) \
+ do { \
+ UINT32 npeMsgHistoryIndex = (npeMsgHistoryLen++) % IX_ETH_DB_NPE_MSG_HISTORY_DEPTH; \
+ npeMsgHistory[npeMsgHistoryIndex][0] = msg.data[0]; \
+ npeMsgHistory[npeMsgHistoryIndex][1] = msg.data[1]; \
+ } while (0);
+#else
+#define LOG_NPE_MSG() /* nothing */
+#endif
+
+/* ----------- Data -------------- */
+
+/* typedefs */
+
+typedef UINT32 (*HashFunction)(void *entity);
+typedef BOOL (*MatchFunction)(void *reference, void *entry);
+typedef void (*FreeFunction)(void *entry);
+
+/**
+ * basic component of a hash table
+ */
+typedef struct HashNode_t
+{
+ void *data; /**< specific data */
+ struct HashNode_t *next; /**< used for bucket chaining */
+
+ __mempool__ struct HashNode_t *nextFree; /**< memory pool management */
+
+ __lock__ IxOsalFastMutex lock; /**< node lock */
+} HashNode;
+
+/**
+ * @brief hash table iterator definition
+ *
+ * an iterator is an object which can be used
+ * to browse a hash table
+ */
+typedef struct
+{
+ UINT32 bucketIndex; /**< index of the currently iterated bucket */
+ HashNode *previousNode; /**< reference to the previously iterated node within the current bucket */
+ HashNode *node; /**< reference to the currently iterated node */
+} HashIterator;
+
+/**
+ * definition of a MAC descriptor (a database record)
+ */
+
+typedef enum
+{
+ IX_ETH_DB_WIFI_AP_TO_STA = 0x0,
+ IX_ETH_DB_WIFI_AP_TO_AP = 0x1
+} IxEthDBWiFiRecordType;
+
+typedef union
+{
+ struct
+ {
+ UINT32 age;
+ BOOL staticEntry; /**< TRUE if this address is static (doesn't age) */
+ } filteringData;
+
+ struct
+ {
+ UINT32 age;
+ BOOL staticEntry;
+ UINT32 ieee802_1qTag;
+ } filteringVlanData;
+
+ struct
+ {
+ IxEthDBWiFiRecordType type; /**< AP_TO_AP (0x1) or AP_TO_STA (0x0) */
+ UINT32 gwAddressIndex; /**< used only when linearizing the entries for NPE usage */
+ UINT8 gwMacAddress[IX_IEEE803_MAC_ADDRESS_SIZE];
+
+ __alignment__ UINT8 reserved2[2];
+ } wifiData;
+} IxEthDBRecordData;
+
+typedef struct MacDescriptor_t
+{
+ UINT8 macAddress[IX_IEEE803_MAC_ADDRESS_SIZE];
+
+ __alignment__ UINT8 reserved1[2];
+
+ UINT32 portID;
+ IxEthDBRecordType type;
+ IxEthDBRecordData recordData;
+
+ /* used for internal operations, such as NPE linearization */
+ void *internal;
+
+ /* custom user data */
+ void *user;
+
+ __mempool__ struct MacDescriptor_t *nextFree; /**< memory pool management */
+ __smartpointer__ UINT32 refCount; /**< smart pointer reference counter */
+} MacDescriptor;
+
+/**
+ * hash table definition
+ */
+typedef struct
+{
+ HashNode *hashBuckets[NUM_BUCKETS];
+ UINT32 numBuckets;
+
+ __lock__ IxOsalFastMutex bucketLocks[NUM_BUCKETS];
+
+ HashFunction entryHashFunction;
+ MatchFunction *matchFunctions;
+ FreeFunction freeFunction;
+} HashTable;
+
+typedef enum
+{
+ IX_ETH_DB_MAC_KEY = 1,
+ IX_ETH_DB_MAC_PORT_KEY = 2,
+ IX_ETH_DB_MAC_VLAN_KEY = 3,
+ IX_ETH_DB_MAX_KEY_INDEX = 3
+} IxEthDBSearchKeyType;
+
+typedef struct MacTreeNode_t
+{
+ __smartpointer__ MacDescriptor *descriptor;
+ struct MacTreeNode_t *left, *right;
+
+ __mempool__ struct MacTreeNode_t *nextFree;
+} MacTreeNode;
+
+typedef IxEthDBStatus (*IxEthDBPortUpdateHandler)(IxEthDBPortId portID, IxEthDBRecordType type);
+
+typedef void (*IxEthDBNoteWriteFn)(void *address, MacTreeNode *node);
+
+typedef struct
+{
+ BOOL updateEnabled; /**< TRUE if updates are enabled for port */
+ BOOL userControlled; /**< TRUE if the user has manually used ixEthDBPortUpdateEnableSet */
+ BOOL treeInitialized; /**< TRUE if the NPE has received an initial tree */
+ IxEthDBPortUpdateHandler updateHandler; /**< port update handler routine */
+ void *npeUpdateZone; /**< port update memory zone */
+ void *npeGwUpdateZone; /**< port update memory zone for gateways */
+ void *vlanUpdateZone; /**< port update memory zone for VLAN tables */
+ MacTreeNode *searchTree; /**< internal search tree, in MacTreeNode representation */
+ BOOL searchTreePendingWrite; /**< TRUE if searchTree holds a tree pending write to the port */
+} PortUpdateMethod;
+
+typedef struct
+{
+ IxEthDBPortId portID; /**< port ID */
+ BOOL enabled; /**< TRUE if the port is enabled */
+ BOOL agingEnabled; /**< TRUE if aging on this port is enabled */
+ BOOL initialized;
+ IxEthDBPortMap dependencyPortMap; /**< dependency port map for this port */
+ PortUpdateMethod updateMethod; /**< update method structure */
+ BOOL macAddressUploaded; /**< TRUE if the MAC address was uploaded into the port */
+ UINT32 maxRxFrameSize; /**< maximum Rx frame size for this port */
+ UINT32 maxTxFrameSize; /**< maximum Rx frame size for this port */
+
+ UINT8 bbsid[6];
+ __alignment__ UINT8 reserved[2];
+ UINT32 frameControlDurationID; /**< Frame Control - Duration/ID WiFi control */
+
+ IxEthDBVlanTag vlanTag; /**< default VLAN tag for port */
+ IxEthDBPriorityTable priorityTable; /**< QoS <=> internal priority mapping */
+ IxEthDBVlanSet vlanMembership;
+ IxEthDBVlanSet transmitTaggingInfo;
+ IxEthDBFrameFilter frameFilter;
+ IxEthDBTaggingAction taggingAction;
+
+ UINT32 npeFrameFilter;
+ UINT32 npeTaggingAction;
+
+ IxEthDBFirewallMode firewallMode;
+ BOOL srcAddressFilterEnabled;
+
+ BOOL stpBlocked;
+
+ IxEthDBFeature featureCapability;
+ IxEthDBFeature featureStatus;
+
+ UINT32 ixEthDBTrafficClassAQMAssignments[IX_IEEE802_1Q_QOS_PRIORITY_COUNT];
+
+ UINT32 ixEthDBTrafficClassCount;
+
+ UINT32 ixEthDBTrafficClassAvailable;
+
+
+
+ __lock__ IxOsalMutex npeAckLock;
+} PortInfo;
+
+/* list of port information structures indexed on port Ids */
+extern IX_ETH_DB_PUBLIC PortInfo ixEthDBPortInfo[IX_ETH_DB_NUMBER_OF_PORTS];
+
+typedef enum
+{
+ IX_ETH_DB_ADD_FILTERING_RECORD = 0xFF0001,
+ IX_ETH_DB_REMOVE_FILTERING_RECORD = 0xFF0002
+} PortEventType;
+
+typedef struct
+{
+ UINT32 eventType;
+ IxEthDBPortId portID;
+ IxEthDBMacAddr macAddr;
+ BOOL staticEntry;
+} PortEvent;
+
+typedef struct
+{
+ PortEvent queue[EVENT_QUEUE_SIZE];
+ UINT32 base;
+ UINT32 length;
+} PortEventQueue;
+
+typedef struct
+{
+ IxEthDBPortId portID; /**< originating port */
+ MacDescriptor *macDescriptors[MAX_ELT_SIZE]; /**< addresses to be synced into db */
+ UINT32 addressCount; /**< number of addresses */
+} TreeSyncInfo;
+
+typedef struct
+{
+ MacTreeNode *nodes[MAX_ELT_SIZE];
+ UINT32 offsets[MAX_ELT_SIZE];
+ UINT32 nodeCount;
+} MacTreeNodeStack;
+
+/* Prototypes */
+
+/* ----------- Memory management -------------- */
+
+IX_ETH_DB_PUBLIC void ixEthDBInitMemoryPools(void);
+
+IX_ETH_DB_PUBLIC HashNode* ixEthDBAllocHashNode(void);
+IX_ETH_DB_PUBLIC void ixEthDBFreeHashNode(HashNode *);
+
+IX_ETH_DB_PUBLIC __smartpointer__ MacDescriptor* ixEthDBAllocMacDescriptor(void);
+IX_ETH_DB_PUBLIC __smartpointer__ MacDescriptor* ixEthDBCloneMacDescriptor(MacDescriptor *macDescriptor);
+IX_ETH_DB_PUBLIC __smartpointer__ void ixEthDBFreeMacDescriptor(MacDescriptor *);
+
+IX_ETH_DB_PUBLIC __smartpointer__ MacTreeNode* ixEthDBAllocMacTreeNode(void);
+IX_ETH_DB_PUBLIC __smartpointer__ MacTreeNode* ixEthDBCloneMacTreeNode(MacTreeNode *);
+IX_ETH_DB_PUBLIC __smartpointer__ void ixEthDBFreeMacTreeNode(MacTreeNode *);
+
+IX_ETH_DB_PUBLIC void ixEthDBPoolFreeMacTreeNode(MacTreeNode *);
+IX_ETH_DB_PUBLIC UINT32 ixEthDBSearchTreeUsageGet(MacTreeNode *tree);
+IX_ETH_DB_PUBLIC int ixEthDBShowMemoryStatus(void);
+
+/* Hash Table */
+IX_ETH_DB_PUBLIC void ixEthDBInitHash(HashTable *hashTable, UINT32 numBuckets, HashFunction entryHashFunction, MatchFunction *matchFunctions, FreeFunction freeFunction);
+
+IX_ETH_DB_PUBLIC IxEthDBStatus ixEthDBAddHashEntry(HashTable *hashTable, void *entry);
+IX_ETH_DB_PUBLIC IxEthDBStatus ixEthDBRemoveHashEntry(HashTable *hashTable, int keyType, void *reference);
+IX_ETH_DB_PUBLIC IxEthDBStatus ixEthDBSearchHashEntry(HashTable *hashTable, int keyType, void *reference, HashNode **searchResult);
+IX_ETH_DB_PUBLIC IxEthDBStatus ixEthDBPeekHashEntry(HashTable *hashTable, int keyType, void *reference);
+IX_ETH_DB_PUBLIC void ixEthDBReleaseHashNode(HashNode *node);
+
+IX_ETH_DB_PUBLIC IxEthDBStatus ixEthDBInitHashIterator(HashTable *hashTable, HashIterator *iterator);
+IX_ETH_DB_PUBLIC IxEthDBStatus ixEthDBIncrementHashIterator(HashTable *hashTable, HashIterator *iterator);
+IX_ETH_DB_PUBLIC IxEthDBStatus ixEthDBRemoveEntryAtHashIterator(HashTable *hashTable, HashIterator *iterator);
+IX_ETH_DB_PUBLIC void ixEthDBReleaseHashIterator(HashIterator *iterator);
+
+/* API Support */
+IX_ETH_DB_PUBLIC IxEthDBStatus ixEthDBPortAddressSet(IxEthDBPortId portID, IxEthDBMacAddr *macAddr);
+IX_ETH_DB_PUBLIC void ixEthDBMaximumFrameSizeAckCallback(IxNpeMhNpeId npeID, IxNpeMhMessage msg);
+
+/* DB Core functions */
+IX_ETH_DB_PUBLIC IxEthDBStatus ixEthDBInit(void);
+IX_ETH_DB_PUBLIC IxEthDBStatus ixEthDBAdd(MacDescriptor *newRecordTemplate, IxEthDBPortMap updateTrigger);
+IX_ETH_DB_PUBLIC IxEthDBStatus ixEthDBRemove(MacDescriptor *templateRecord, IxEthDBPortMap updateTrigger);
+IX_ETH_DB_PUBLIC HashNode* ixEthDBSearch(IxEthDBMacAddr *macAddress, IxEthDBRecordType typeFilter);
+IX_ETH_DB_PUBLIC IxEthDBStatus ixEthDBPeek(IxEthDBMacAddr *macAddress, IxEthDBRecordType typeFilter);
+
+/* Learning support */
+IX_ETH_DB_PUBLIC UINT32 ixEthDBAddressCompare(UINT8 *mac1, UINT8 *mac2);
+IX_ETH_DB_PUBLIC BOOL ixEthDBAddressMatch(void *reference, void *entry);
+IX_ETH_DB_PUBLIC UINT32 ixEthDBEntryXORHash(void *macDescriptor);
+IX_ETH_DB_PUBLIC UINT32 ixEthDBKeyXORHash(void *macAddress);
+
+/* Port updates */
+IX_ETH_DB_PUBLIC IxEthDBStatus ixEthDBNPEUpdateHandler(IxEthDBPortId portID, IxEthDBRecordType type);
+IX_ETH_DB_PUBLIC void ixEthDBUpdatePortLearningTrees(IxEthDBPortMap triggerPorts);
+IX_ETH_DB_PUBLIC void ixEthDBNPEAccessRequest(IxEthDBPortId portID);
+IX_ETH_DB_PUBLIC void ixEthDBUpdateLock(void);
+IX_ETH_DB_PUBLIC void ixEthDBUpdateUnlock(void);
+IX_ETH_DB_PUBLIC MacTreeNode* ixEthDBQuery(MacTreeNode *searchTree, IxEthDBPortMap query, IxEthDBRecordType recordFilter, UINT32 maximumEntries);
+IX_ETH_DB_PUBLIC IxEthDBStatus ixEthDBFirewallUpdate(IxEthDBPortId portID, void *address, UINT32 epDelta);
+
+/* Init/unload */
+IX_ETH_DB_PUBLIC void ixEthDBPortSetAckCallback(IxNpeMhNpeId npeID, IxNpeMhMessage msg);
+IX_ETH_DB_PUBLIC IxEthDBStatus ixEthDBEventProcessorInit(void);
+IX_ETH_DB_PUBLIC void ixEthDBPortInit(IxEthDBPortId portID);
+IX_ETH_DB_PUBLIC IxEthDBStatus ixEthDBPortEnable(IxEthDBPortId portID);
+IX_ETH_DB_PUBLIC IxEthDBStatus ixEthDBPortDisable(IxEthDBPortId portID);
+IX_ETH_DB_PUBLIC void ixEthDBNPEUpdateAreasInit(void);
+IX_ETH_DB_PUBLIC UINT32 ixEthDBMatchMethodsRegister(MatchFunction *matchFunctions);
+IX_ETH_DB_PUBLIC UINT32 ixEthDBRecordSerializeMethodsRegister(void);
+IX_ETH_DB_PUBLIC UINT32 ixEthDBUpdateTypeRegister(BOOL *typeArray);
+IX_ETH_DB_PUBLIC void ixEthDBNPEUpdateAreasUnload(void);
+IX_ETH_DB_PUBLIC void ixEthDBFeatureCapabilityScan(void);
+IX_ETH_DB_PUBLIC UINT32 ixEthDBKeyTypeRegister(UINT32 *keyType);
+
+/* Event processing */
+IX_ETH_DB_PUBLIC IxEthDBStatus ixEthDBDefaultEventCallbackEnable(IxEthDBPortId portID, BOOL enable);
+IX_ETH_DB_PUBLIC IxEthDBStatus ixEthDBTriggerAddPortUpdate(IxEthDBMacAddr *macAddr, IxEthDBPortId portID, BOOL staticEntry);
+IX_ETH_DB_PUBLIC IxEthDBStatus ixEthDBTriggerRemovePortUpdate(IxEthDBMacAddr *macAddr, IxEthDBPortId portID);
+IX_ETH_DB_PUBLIC void ixEthDBNPEEventCallback(IxNpeMhNpeId npeID, IxNpeMhMessage msg);
+
+/* NPE adaptor */
+IX_ETH_DB_PUBLIC void ixEthDBGetMacDatabaseCbk(IxNpeMhNpeId npeID, IxNpeMhMessage msg);
+IX_ETH_DB_PUBLIC void ixEthDBNpeMsgAck(IxNpeMhNpeId npeID, IxNpeMhMessage msg);
+IX_ETH_DB_PUBLIC void ixEthDBNPESyncScan(IxEthDBPortId portID, void *eltBaseAddress, UINT32 eltSize);
+IX_ETH_DB_PUBLIC void ixEthDBNPETreeWrite(IxEthDBRecordType type, UINT32 totalSize, void *baseAddress, MacTreeNode *tree, UINT32 *blocks, UINT32 *startIndex);
+IX_ETH_DB_PUBLIC void ixEthDBNPEGatewayNodeWrite(void *address, MacTreeNode *node);
+
+/* Other public API functions */
+IX_ETH_DB_PUBLIC IxEthDBStatus ixEthDBStartLearningFunction(void);
+IX_ETH_DB_PUBLIC IxEthDBStatus ixEthDBStopLearningFunction(void);
+IX_ETH_DB_PUBLIC IxEthDBStatus ixEthDBPortUpdateEnableSet(IxEthDBPortId portID, BOOL enableUpdate);
+
+/* Maximum Tx/Rx public functions */
+IX_ETH_DB_PUBLIC IxEthDBStatus ixEthDBFilteringPortMaximumRxFrameSizeSet(IxEthDBPortId portID, UINT32 maximumRxFrameSize);
+IX_ETH_DB_PUBLIC IxEthDBStatus ixEthDBFilteringPortMaximumTxFrameSizeSet(IxEthDBPortId portID, UINT32 maximumTxFrameSize);
+
+/* VLAN-related */
+IX_ETH_DB_PUBLIC IxEthDBStatus ixEthDBPortVlanTableSet(IxEthDBPortId portID, IxEthDBVlanSet portVlanTable, IxEthDBVlanSet vlanSet);
+
+/* Record search */
+IX_ETH_DB_PUBLIC BOOL ixEthDBAddressRecordMatch(void *untypedReference, void *untypedEntry);
+IX_ETH_DB_PUBLIC BOOL ixEthDBVlanRecordMatch(void *untypedReference, void *untypedEntry);
+IX_ETH_DB_PUBLIC BOOL ixEthDBPortRecordMatch(void *untypedReference, void *untypedEntry);
+IX_ETH_DB_PUBLIC BOOL ixEthDBNullMatch(void *reference, void *entry);
+IX_ETH_DB_PUBLIC HashNode* ixEthDBPortSearch(IxEthDBMacAddr *macAddress, IxEthDBPortId portID, IxEthDBRecordType typeFilter);
+IX_ETH_DB_PUBLIC HashNode* ixEthDBVlanSearch(IxEthDBMacAddr *macAddress, IxEthDBVlanId vlanID, IxEthDBRecordType typeFilter);
+
+/* Utilities */
+IX_ETH_DB_PUBLIC const char* mac2string(const unsigned char *mac);
+IX_ETH_DB_PUBLIC void showHashInfo(void);
+IX_ETH_DB_PUBLIC int ixEthDBAnalyzeHash(void);
+IX_ETH_DB_PUBLIC const char* errorString(IxEthDBStatus error);
+IX_ETH_DB_PUBLIC int numHashElements(void);
+IX_ETH_DB_PUBLIC void zapHashtable(void);
+IX_ETH_DB_PUBLIC BOOL ixEthDBCheckSingleBitValue(UINT32 value);
+
+/* Single Eth NPE Check */
+IX_ETH_DB_PUBLIC IxEthDBStatus ixEthDBSingleEthNpeCheck(IxEthDBPortId portId);
+
+#endif /* IxEthDB_p_H */
+
diff --git a/cpu/ixp/npe/include/IxEthMii.h b/cpu/ixp/npe/include/IxEthMii.h
new file mode 100644
index 0000000000..a1bfe06724
--- /dev/null
+++ b/cpu/ixp/npe/include/IxEthMii.h
@@ -0,0 +1,270 @@
+/**
+ * @file IxEthMii.h
+ *
+ * @brief this file contains the public API of @ref IxEthMii component
+ *
+ * Design notes :
+ * The main intent of this API is to inplement MII high level fonctionalitoes
+ * to support the codelets provided with the IXP400 software releases. It
+ * superceedes previous interfaces provided with @ref IxEThAcc component.
+ *
+ * This API has been tested with the PHYs provided with the
+ * IXP400 development platforms. It may not work for specific Ethernet PHYs
+ * used on specific boards.
+ *
+ * This source code detects and interface the LXT972, LXT973 and KS6995
+ * Ethernet PHYs.
+ *
+ * This source code should be considered as an example which may need
+ * to be adapted for different hardware implementations.
+ *
+ * It is strongly recommended to use public domain and GPL utilities
+ * like libmii, mii-diag for MII interface support.
+ *
+ *
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+#ifndef IxEthMii_H
+#define IxEthMii_H
+
+#include <IxTypes.h>
+
+/**
+ * @defgroup IxEthMii IXP400 Ethernet Phy Access (IxEthMii) API
+ *
+ * @brief ethMii is a library that does provides access to the
+ * Ethernet PHYs
+ *
+ *@{
+ */
+
+/**
+ * @ingroup IxEthMii
+ *
+ * @fn ixEthMiiPhyScan(BOOL phyPresent[], UINT32 maxPhyCount)
+ *
+ * @brief Scan the MDIO bus for PHYs
+ * This function scans PHY addresses 0 through 31, and sets phyPresent[n] to
+ * TRUE if a phy is discovered at address n.
+ *
+ * - Reentrant - no
+ * - ISR Callable - no
+ *
+ * @pre The MAC on Ethernet Port 2 (NPE C) must be initialised, and generating the MDIO clock.
+ *
+ * @param phyPresent BOOL [in] - boolean array of IXP425_ETH_ACC_MII_MAX_ADDR entries
+ * @param maxPhyCount UINT32 [in] - number of PHYs to search for (the scan will stop when
+ * the indicated number of PHYs is found).
+ *
+ * @return IX_STATUS
+ * - IX_ETH_ACC_SUCCESS
+ * - IX_ETH_ACC_FAIL : invalid arguments.
+ *
+ * <hr>
+ */
+PUBLIC IX_STATUS ixEthMiiPhyScan(BOOL phyPresent[], UINT32 maxPhyCount);
+
+/**
+ * @ingroup IxEthMii
+ *
+ * @fn ixEthMiiPhyConfig(UINT32 phyAddr,
+ BOOL speed100,
+ BOOL fullDuplex,
+ BOOL autonegotiate)
+ *
+ *
+ * @brief Configure a PHY
+ * Configure a PHY's speed, duplex and autonegotiation status
+ *
+ * - Reentrant - no
+ * - ISR Callable - no
+ *
+ * @pre The MAC on Ethernet Port 2 (NPE C) must be initialised, and generating the MDIO clock.
+ *
+ * @param phyAddr UINT32 [in]
+ * @param speed100 BOOL [in] - set to TRUE for 100Mbit/s operation, FALSE for 10Mbit/s
+ * @param fullDuplex BOOL [in] - set to TRUE for Full Duplex, FALSE for Half Duplex
+ * @param autonegotiate BOOL [in] - set to TRUE to enable autonegotiation
+ *
+ * @return IX_STATUS
+ * - IX_SUCCESS
+ * - IX_FAIL : invalid arguments.
+ *
+ * <hr>
+ */
+PUBLIC IX_STATUS ixEthMiiPhyConfig(UINT32 phyAddr,
+ BOOL speed100,
+ BOOL fullDuplex,
+ BOOL autonegotiate);
+
+/**
+ * @ingroup IxEthMii
+ *
+ * @fn ixEthMiiPhyLoopbackEnable(UINT32 phyAddr)
+ *
+ *
+ * @brief Enable PHY Loopback in a specific Eth MII port
+ *
+ * @note When PHY Loopback is enabled, frames sent out to the PHY from the
+ * IXP400 will be looped back to the IXP400. They will not be transmitted out
+ * on the wire.
+ *
+ * - Reentrant - no
+ * - ISR Callable - no
+ *
+ * @param phyAddr UINT32 [in] - the address of the Ethernet PHY (0-31)
+ *
+ * @return IX_STATUS
+ * - IX_SUCCESS
+ * - IX_FAIL : invalid arguments.
+ * <hr>
+ */
+PUBLIC IX_STATUS
+ixEthMiiPhyLoopbackEnable (UINT32 phyAddr);
+
+/**
+ * @ingroup IxEthMii
+ *
+ * @fn ixEthMiiPhyLoopbackDisable(UINT32 phyAddr)
+ *
+ *
+ * @brief Disable PHY Loopback in a specific Eth MII port
+ *
+ * - Reentrant - no
+ * - ISR Callable - no
+ *
+ * @param phyAddr UINT32 [in] - the address of the Ethernet PHY (0-31)
+ *
+ * @return IX_STATUS
+ * - IX_SUCCESS
+ * - IX_FAIL : invalid arguments.
+ * <hr>
+ */
+PUBLIC IX_STATUS
+ixEthMiiPhyLoopbackDisable (UINT32 phyAddr);
+
+/**
+ * @ingroup IxEthMii
+ *
+ * @fn ixEthMiiPhyReset(UINT32 phyAddr)
+ *
+ * @brief Reset a PHY
+ * Reset a PHY
+ *
+ * - Reentrant - no
+ * - ISR Callable - no
+ *
+ * @pre The MAC on Ethernet Port 2 (NPE C) must be initialised, and generating the MDIO clock.
+ *
+ * @param phyAddr UINT32 [in] - the address of the Ethernet PHY (0-31)
+ *
+ * @return IX_STATUS
+ * - IX_SUCCESS
+ * - IX_FAIL : invalid arguments.
+ *
+ * <hr>
+ */
+PUBLIC IX_STATUS ixEthMiiPhyReset(UINT32 phyAddr);
+
+
+/**
+ * @ingroup IxEthMii
+ *
+ * @fn ixEthMiiLinkStatus(UINT32 phyAddr,
+ BOOL *linkUp,
+ BOOL *speed100,
+ BOOL *fullDuplex,
+ BOOL *autoneg)
+ *
+ * @brief Retrieve the current status of a PHY
+ * Retrieve the link, speed, duplex and autonegotiation status of a PHY
+ *
+ * - Reentrant - no
+ * - ISR Callable - no
+ *
+ * @pre The MAC on Ethernet Port 2 (NPE C) must be initialised, and generating the MDIO clock.
+ *
+ * @param phyAddr UINT32 [in] - the address of the Ethernet PHY (0-31)
+ * @param linkUp BOOL [out] - set to TRUE if the link is up
+ * @param speed100 BOOL [out] - set to TRUE indicates 100Mbit/s, FALSE indicates 10Mbit/s
+ * @param fullDuplex BOOL [out] - set to TRUE indicates Full Duplex, FALSE indicates Half Duplex
+ * @param autoneg BOOL [out] - set to TRUE indicates autonegotiation is enabled, FALSE indicates autonegotiation is disabled
+ *
+ * @return IX_STATUS
+ * - IX_SUCCESS
+ * - IX_FAIL : invalid arguments.
+ *
+ * <hr>
+ */
+PUBLIC IX_STATUS ixEthMiiLinkStatus(UINT32 phyAddr,
+ BOOL *linkUp,
+ BOOL *speed100,
+ BOOL *fullDuplex,
+ BOOL *autoneg);
+
+/**
+ * @ingroup IxEthMii
+ *
+ * @fn ixEthMiiPhyShow (UINT32 phyAddr)
+ *
+ *
+ * @brief Display information on a specified PHY
+ * Display link status, speed, duplex and Auto Negotiation status
+ *
+ * - Reentrant - no
+ * - ISR Callable - no
+ *
+ * @pre The MAC on Ethernet Port 2 (NPE C) must be initialised, and generating the MDIO clock.
+ *
+ * @param phyAddr UINT32 [in] - the address of the Ethernet PHY (0-31)
+ *
+ * @return IX_STATUS
+ * - IX_SUCCESS
+ * - IX_FAIL : invalid arguments.
+ *
+ * <hr>
+ */
+PUBLIC IX_STATUS ixEthMiiPhyShow (UINT32 phyAddr);
+
+#endif /* ndef IxEthMii_H */
+/**
+ *@}
+ */
diff --git a/cpu/ixp/npe/include/IxEthMii_p.h b/cpu/ixp/npe/include/IxEthMii_p.h
new file mode 100644
index 0000000000..104b65c1f0
--- /dev/null
+++ b/cpu/ixp/npe/include/IxEthMii_p.h
@@ -0,0 +1,185 @@
+/**
+ * @file IxEthMii_p.h
+ *
+ * @author Intel Corporation
+ * @date
+ *
+ * @brief MII Header file
+ *
+ * Design Notes:
+ *
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+#ifndef IxEthMii_p_H
+#define IxEthMii_p_H
+
+
+/* MII definitions - these have been verified against the LXT971 and
+ LXT972 PHYs*/
+
+#define IX_ETH_MII_MAX_REG_NUM 0x20 /* max number of registers */
+
+#define IX_ETH_MII_CTRL_REG 0x0 /* Control Register */
+#define IX_ETH_MII_STAT_REG 0x1 /* Status Register */
+#define IX_ETH_MII_PHY_ID1_REG 0x2 /* PHY identifier 1 Register */
+#define IX_ETH_MII_PHY_ID2_REG 0x3 /* PHY identifier 2 Register */
+#define IX_ETH_MII_AN_ADS_REG 0x4 /* Auto-Negotiation */
+ /* Advertisement Register */
+#define IX_ETH_MII_AN_PRTN_REG 0x5 /* Auto-Negotiation */
+ /* partner ability Register */
+#define IX_ETH_MII_AN_EXP_REG 0x6 /* Auto-Negotiation */
+ /* Expansion Register */
+#define IX_ETH_MII_AN_NEXT_REG 0x7 /* Auto-Negotiation */
+ /* next-page transmit Register */
+
+#define IX_ETH_MII_STAT2_REG 0x11 /* Status Register 2*/
+
+
+/* MII control register bit */
+
+#define IX_ETH_MII_CR_COLL_TEST 0x0080 /* collision test */
+#define IX_ETH_MII_CR_FDX 0x0100 /* FDX =1, half duplex =0 */
+#define IX_ETH_MII_CR_RESTART 0x0200 /* restart auto negotiation */
+#define IX_ETH_MII_CR_ISOLATE 0x0400 /* isolate PHY from MII */
+#define IX_ETH_MII_CR_POWER_DOWN 0x0800 /* power down */
+#define IX_ETH_MII_CR_AUTO_EN 0x1000 /* auto-negotiation enable */
+#define IX_ETH_MII_CR_100 0x2000 /* 0 = 10mb, 1 = 100mb */
+#define IX_ETH_MII_CR_LOOPBACK 0x4000 /* 0 = normal, 1 = loopback */
+#define IX_ETH_MII_CR_RESET 0x8000 /* 0 = normal, 1 = PHY reset */
+#define IX_ETH_MII_CR_NORM_EN 0x0000 /* just enable the PHY */
+#define IX_ETH_MII_CR_DEF_0_MASK 0xca7f /* they must return zero */
+#define IX_ETH_MII_CR_RES_MASK 0x007f /* reserved bits, return zero */
+
+/* MII Status register bit definitions */
+
+#define IX_ETH_MII_SR_LINK_STATUS 0x0004 /* link Status -- 1 = link */
+#define IX_ETH_MII_SR_AUTO_SEL 0x0008 /* auto speed select capable */
+#define IX_ETH_MII_SR_REMOTE_FAULT 0x0010 /* Remote fault detect */
+#define IX_ETH_MII_SR_AUTO_NEG 0x0020 /* auto negotiation complete */
+#define IX_ETH_MII_SR_10T_HALF_DPX 0x0800 /* 10BaseT HD capable */
+#define IX_ETH_MII_SR_10T_FULL_DPX 0x1000 /* 10BaseT FD capable */
+#define IX_ETH_MII_SR_TX_HALF_DPX 0x2000 /* TX HD capable */
+#define IX_ETH_MII_SR_TX_FULL_DPX 0x4000 /* TX FD capable */
+#define IX_ETH_MII_SR_T4 0x8000 /* T4 capable */
+#define IX_ETH_MII_SR_ABIL_MASK 0xff80 /* abilities mask */
+#define IX_ETH_MII_SR_EXT_CAP 0x0001 /* extended capabilities */
+
+
+/* LXT971/2 Status 2 register bit definitions */
+#define IX_ETH_MII_SR2_100 0x4000
+#define IX_ETH_MII_SR2_TX 0x2000
+#define IX_ETH_MII_SR2_RX 0x1000
+#define IX_ETH_MII_SR2_COL 0x0800
+#define IX_ETH_MII_SR2_LINK 0x0400
+#define IX_ETH_MII_SR2_FD 0x0200
+#define IX_ETH_MII_SR2_AUTO 0x0100
+#define IX_ETH_MII_SR2_AUTO_CMPLT 0x0080
+#define IX_ETH_MII_SR2_POLARITY 0x0020
+#define IX_ETH_MII_SR2_PAUSE 0x0010
+#define IX_ETH_MII_SR2_ERROR 0x0008
+
+/* MII Link Code word bit definitions */
+
+#define IX_ETH_MII_BP_FAULT 0x2000 /* remote fault */
+#define IX_ETH_MII_BP_ACK 0x4000 /* acknowledge */
+#define IX_ETH_MII_BP_NP 0x8000 /* nexp page is supported */
+
+/* MII Next Page bit definitions */
+
+#define IX_ETH_MII_NP_TOGGLE 0x0800 /* toggle bit */
+#define IX_ETH_MII_NP_ACK2 0x1000 /* acknowledge two */
+#define IX_ETH_MII_NP_MSG 0x2000 /* message page */
+#define IX_ETH_MII_NP_ACK1 0x4000 /* acknowledge one */
+#define IX_ETH_MII_NP_NP 0x8000 /* nexp page will follow */
+
+/* MII Expansion Register bit definitions */
+
+#define IX_ETH_MII_EXP_FAULT 0x0010 /* parallel detection fault */
+#define IX_ETH_MII_EXP_PRTN_NP 0x0008 /* link partner next-page able */
+#define IX_ETH_MII_EXP_LOC_NP 0x0004 /* local PHY next-page able */
+#define IX_ETH_MII_EXP_PR 0x0002 /* full page received */
+#define IX_ETH_MII_EXP_PRT_AN 0x0001 /* link partner auto neg able */
+
+/* technology ability field bit definitions */
+
+#define IX_ETH_MII_TECH_10BASE_T 0x0020 /* 10Base-T */
+#define IX_ETH_MII_TECH_10BASE_FD 0x0040 /* 10Base-T Full Duplex */
+#define IX_ETH_MII_TECH_100BASE_TX 0x0080 /* 100Base-TX */
+#define IX_ETH_MII_TECH_100BASE_TX_FD 0x0100 /* 100Base-TX Full Duplex */
+
+#define IX_ETH_MII_TECH_100BASE_T4 0x0200 /* 100Base-T4 */
+#define IX_ETH_MII_ADS_TECH_MASK 0x1fe0 /* technology abilities mask */
+#define IX_ETH_MII_TECH_MASK IX_ETH_MII_ADS_TECH_MASK
+#define IX_ETH_MII_ADS_SEL_MASK 0x001f /* selector field mask */
+
+#define IX_ETH_MII_AN_FAIL 0x10 /* auto-negotiation fail */
+#define IX_ETH_MII_STAT_FAIL 0x20 /* errors in the status register */
+#define IX_ETH_MII_PHY_NO_ABLE 0x40 /* the PHY lacks some abilities */
+
+/* Definitions for MII access routines*/
+
+#define IX_ETH_MII_GO BIT(31)
+#define IX_ETH_MII_WRITE BIT(26)
+#define IX_ETH_MII_TIMEOUT_10TH_SECS (5)
+#define IX_ETH_MII_10TH_SEC_IN_MILLIS (100)
+#define IX_ETH_MII_READ_FAIL BIT(31)
+
+/* When we reset the PHY we delay for 2 seconds to allow the reset to
+ complete*/
+#define IX_ETH_MII_RESET_DELAY_MS (2000)
+#define IX_ETH_MII_RESET_POLL_MS (50)
+
+#define IX_ETH_MII_REG_SHL 16
+#define IX_ETH_MII_ADDR_SHL 21
+
+/* supported PHYs */
+#define IX_ETH_MII_LXT971_PHY_ID 0x001378E0
+#define IX_ETH_MII_LXT972_PHY_ID 0x001378E2
+#define IX_ETH_MII_LXT973_PHY_ID 0x00137A10
+#define IX_ETH_MII_LXT973A3_PHY_ID 0x00137A11
+#define IX_ETH_MII_KS8995_PHY_ID 0x00221450
+#define IX_ETH_MII_LXT9785_PHY_ID 0x001378FF
+
+
+#define IX_ETH_MII_INVALID_PHY_ID 0x00000000
+#define IX_ETH_MII_UNKNOWN_PHY_ID 0xffffffff
+
+#endif /*IxEthAccMii_p_H*/
diff --git a/cpu/ixp/npe/include/IxEthNpe.h b/cpu/ixp/npe/include/IxEthNpe.h
new file mode 100644
index 0000000000..21bdedc5a7
--- /dev/null
+++ b/cpu/ixp/npe/include/IxEthNpe.h
@@ -0,0 +1,695 @@
+#ifndef __doxygen_HIDE /* This file is not part of the API */
+
+/**
+ * @file IxEthNpe.h
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+*/
+
+/**
+ * @defgroup IxEthNpe IXP400 Ethernet NPE (IxEthNpe) API
+ *
+ * @brief Contains the API for Ethernet NPE.
+ *
+ * All messages given to NPE, get back an acknowledgment. The acknowledgment
+ * is identical to the message sent to the NPE (except for NPE_GETSTATUS message).
+ *
+ * @{
+ */
+
+
+/*--------------------------------------------------------------------------
+ * APB Message IDs - XScale->NPE
+ *------------------------------------------------------------------------*/
+
+/**
+ * @def IX_ETHNPE_NPE_GETSTATUS
+ *
+ * @brief Request from the XScale client for the NPE to return the firmware
+ * version of the currently executing image.
+ *
+ * Acknowledgment message id is same as the request message id.
+ * NPE returns the firmware version ID to XScale.
+ */
+#define IX_ETHNPE_NPE_GETSTATUS 0x00
+
+/**
+ * @def IX_ETHNPE_EDB_SETPORTADDRESS
+ *
+ * @brief Request from the XScale client for the NPE to set the Ethernet
+ * port's port ID and MAC address.
+ */
+#define IX_ETHNPE_EDB_SETPORTADDRESS 0x01
+
+/**
+ * @def IX_ETHNPE_EDB_GETMACADDRESSDATABASE
+ *
+ * @brief Request from XScale client to the NPE requesting upload of
+ * Ethernet Filtering Database or Header Conversion Database from NPE's
+ * data memory to XScale accessible SDRAM.
+ */
+#define IX_ETHNPE_EDB_GETMACADDRESSDATABASE 0x02
+
+/**
+ * @def IX_ETHNPE_EDB_SETMACADDRESSSDATABASE
+ *
+ * @brief Request from XScale client to the NPE requesting download of
+ * Ethernet Filtering Database or Header Conversion Database from SDRAM
+ * to the NPE's datamemory.
+ */
+#define IX_ETHNPE_EDB_SETMACADDRESSSDATABASE 0x03
+
+/**
+ * @def IX_ETHNPE_GETSTATS
+ *
+ * @brief Request from the XScale client for the current MAC port statistics
+ * data to be written to the (empty) statistics structure and the specified
+ * location in externa memory.
+ */
+#define IX_ETHNPE_GETSTATS 0x04
+
+/**
+ * @def IX_ETHNPE_RESETSTATS
+ *
+ * @brief Request from the XScale client to the NPE to reset all of its internal
+ * MAC port statistics state variables.
+ *
+ * As a side effect, this message entails an implicit request that the NPE
+ * write the current MAC port statistics into the MAC statistics structure
+ * at the specified location in external memory.
+ */
+#define IX_ETHNPE_RESETSTATS 0x05
+
+/**
+ * @def IX_ETHNPE_SETMAXFRAMELENGTHS
+ *
+ * @brief Request from the XScale client to the NPE to configure maximum framelengths
+ * and block sizes in receive and transmit direction.
+ */
+#define IX_ETHNPE_SETMAXFRAMELENGTHS 0x06
+
+/**
+ * @def IX_ETHNPE_VLAN_SETRXTAGMODE
+ *
+ * @brief Request from the XScale client to the NPE to configure VLAN frame type
+ * filtering and VLAN the tagging mode for the receiver.
+ */
+#define IX_ETHNPE_VLAN_SETRXTAGMODE 0x07
+
+/**
+ * @def IX_ETHNPE_VLAN_SETDEFAULTRXVID
+ *
+ * @brief Request from the XScale client to the NPE to set receiver's default
+ * VLAN tag (PVID)and internal traffic class.
+ */
+#define IX_ETHNPE_VLAN_SETDEFAULTRXVID 0x08
+
+/**
+ * @def IX_ETHNPE_VLAN_SETPORTVLANTABLEENTRY
+ *
+ * @brief Request from the XScale client to the NPE to configure VLAN Port
+ * membership and Tx tagging for 8 consecutive VLANID's.
+ */
+#define IX_ETHNPE_VLAN_SETPORTVLANTABLEENTRY 0x09
+
+/**
+ * @def IX_ETHNPE_VLAN_SETPORTVLANTABLERANGE
+ *
+ * @brief Request from the XScale client to the NPE to configure VLAN Port
+ * membership and Tx tagging for a range of VLANID's.
+ */
+#define IX_ETHNPE_VLAN_SETPORTVLANTABLERANGE 0x0A
+
+/**
+ * @def IX_ETHNPE_VLAN_SETRXQOSENTRY
+ *
+ * @brief Request from the XScale client to the NPE to map a user priority
+ * to QoS class and an AQM queue number.
+ */
+#define IX_ETHNPE_VLAN_SETRXQOSENTRY 0x0B
+
+/**
+ * @def IX_ETHNPE_VLAN_SETPORTIDEXTRACTIONMODE
+ *
+ * @brief Request from the XScale client to the NPE to enable or disable
+ * portID extraction from VLAN-tagged frames for the specified port.
+ */
+#define IX_ETHNPE_VLAN_SETPORTIDEXTRACTIONMODE 0x0C
+
+/**
+ * @def IX_ETHNPE_STP_SETBLOCKINGSTATE
+ *
+ * @brief Request from the XScale client to the NPE to block or unblock
+ * forwarding for spanning tree BPDUs.
+ */
+#define IX_ETHNPE_STP_SETBLOCKINGSTATE 0x0D
+
+/**
+ * @def IX_ETHNPE_FW_SETFIREWALLMODE
+ *
+ * @brief Request from the XScale client to the NPE to configure firewall
+ * services modes of operation and/or download Ethernet Firewall Database from
+ * SDRAM to NPE.
+ */
+#define IX_ETHNPE_FW_SETFIREWALLMODE 0x0E
+
+/**
+ * @def IX_ETHNPE_PC_SETFRAMECONTROLDURATIONID
+ *
+ * @brief Request from the XScale client to the NPE to set global frame control
+ * and duration/ID field for the 802.3 to 802.11 protocol header conversion
+ * service.
+ */
+#define IX_ETHNPE_PC_SETFRAMECONTROLDURATIONID 0x0F
+
+/**
+ * @def IX_ETHNPE_PC_SETBBSID
+ *
+ * @brief Request from the XScale client to the NPE to set global BBSID field
+ * value for the 802.3 to 802.11 protocol header conversion service.
+ */
+#define IX_ETHNPE_PC_SETBBSID 0x10
+
+/**
+ * @def IX_ETHNPE_PC_SETAPMACTABLE
+ *
+ * @brief Request from the XScale client to the NPE to update a block/section/
+ * range of the AP MAC Address Table.
+ */
+#define IX_ETHNPE_PC_SETAPMACTABLE 0x11
+
+/**
+ * @def IX_ETHNPE_SETLOOPBACK_MODE
+ *
+ * @brief Turn on or off the NPE frame loopback.
+ */
+#define IX_ETHNPE_SETLOOPBACK_MODE (0x12)
+
+/*--------------------------------------------------------------------------
+ * APB Message IDs - NPE->XScale
+ *------------------------------------------------------------------------*/
+
+/**
+ * @def IX_ETHNPE_NPE_GETSTATUS_ACK
+ *
+ * @brief Acknowledgment to IX_ETHNPE_NPE_GETSTATUS message. NPE firmware version
+ * id is returned in the message.
+ */
+#define IX_ETHNPE_NPE_GETSTATUS_ACK 0x00
+
+/**
+ * @def IX_ETHNPE_EDB_SETPORTADDRESS_ACK
+ *
+ * @brief Acknowledgment to IX_ETHNPE_EDB_SETPORTADDRESS message.
+ */
+#define IX_ETHNPE_EDB_SETPORTADDRESS_ACK 0x01
+
+/**
+ * @def IX_ETHNPE_EDB_GETMACADDRESSDATABASE_ACK
+ *
+ * @brief Acknowledgment to IX_ETHNPE_EDB_GETMACADDRESSDATABASE message
+ */
+#define IX_ETHNPE_EDB_GETMACADDRESSDATABASE_ACK 0x02
+
+/**
+ * @def IX_ETHNPE_EDB_SETMACADDRESSSDATABASE_ACK
+ *
+ * @brief Acknowledgment to IX_ETHNPE_EDB_SETMACADDRESSSDATABASE message.
+ */
+#define IX_ETHNPE_EDB_SETMACADDRESSSDATABASE_ACK 0x03
+
+/**
+ * @def IX_ETHNPE_GETSTATS_ACK
+ *
+ * @brief Acknowledgment to IX_ETHNPE_GETSTATS message.
+ */
+#define IX_ETHNPE_GETSTATS_ACK 0x04
+
+/**
+ * @def IX_ETHNPE_RESETSTATS_ACK
+ *
+ * @brief Acknowledgment to IX_ETHNPE_RESETSTATS message.
+ */
+#define IX_ETHNPE_RESETSTATS_ACK 0x05
+
+/**
+ * @def IX_ETHNPE_SETMAXFRAMELENGTHS_ACK
+ *
+ * @brief Acknowledgment to IX_ETHNPE_SETMAXFRAMELENGTHS message.
+ */
+#define IX_ETHNPE_SETMAXFRAMELENGTHS_ACK 0x06
+
+/**
+ * @def IX_ETHNPE_VLAN_SETRXTAGMODE_ACK
+ *
+ * @brief Acknowledgment to IX_ETHNPE_VLAN_SETRXTAGMODE message.
+ */
+#define IX_ETHNPE_VLAN_SETRXTAGMODE_ACK 0x07
+
+/**
+ * @def IX_ETHNPE_VLAN_SETDEFAULTRXVID_ACK
+ *
+ * @brief Acknowledgment to IX_ETHNPE_VLAN_SETDEFAULTRXVID message.
+ */
+#define IX_ETHNPE_VLAN_SETDEFAULTRXVID_ACK 0x08
+
+/**
+ * @def IX_ETHNPE_VLAN_SETPORTVLANTABLEENTRY_ACK
+ *
+ * @brief Acknowledgment to IX_ETHNPE_VLAN_SETPORTVLANTABLEENTRY message.
+ */
+#define IX_ETHNPE_VLAN_SETPORTVLANTABLEENTRY_ACK 0x09
+
+/**
+ * @def IX_ETHNPE_VLAN_SETPORTVLANTABLERANGE_ACK
+ *
+ * @brief Acknowledgment to IX_ETHNPE_VLAN_SETPORTVLANTABLERANGE message.
+ */
+#define IX_ETHNPE_VLAN_SETPORTVLANTABLERANGE_ACK 0x0A
+
+/**
+ * @def IX_ETHNPE_VLAN_SETRXQOSENTRY_ACK
+ *
+ * @brief Acknowledgment to IX_ETHNPE_VLAN_SETRXQOSENTRY message.
+ */
+#define IX_ETHNPE_VLAN_SETRXQOSENTRY_ACK 0x0B
+
+/**
+ * @def IX_ETHNPE_VLAN_SETPORTIDEXTRACTIONMODE_ACK
+ *
+ * @brief Acknowledgment to IX_ETHNPE_VLAN_SETPORTIDEXTRACTIONMODE message.
+ */
+#define IX_ETHNPE_VLAN_SETPORTIDEXTRACTIONMODE_ACK 0x0C
+
+/**
+ * @def IX_ETHNPE_STP_SETBLOCKINGSTATE_ACK
+ *
+ * @brief Acknowledgment to IX_ETHNPE_STP_SETBLOCKINGSTATE message.
+ */
+#define IX_ETHNPE_STP_SETBLOCKINGSTATE_ACK 0x0D
+
+/**
+ * @def IX_ETHNPE_FW_SETFIREWALLMODE_ACK
+ *
+ * @brief Acknowledgment to IX_ETHNPE_FW_SETFIREWALLMODE message.
+ */
+#define IX_ETHNPE_FW_SETFIREWALLMODE_ACK 0x0E
+
+/**
+ * @def IX_ETHNPE_PC_SETFRAMECONTROLDURATIONID_ACK
+ *
+ * @brief Acknowledgment to IX_ETHNPE_PC_SETFRAMECONTROLDURATIONID message.
+ */
+#define IX_ETHNPE_PC_SETFRAMECONTROLDURATIONID_ACK 0x0F
+
+/**
+ * @def IX_ETHNPE_PC_SETBBSID_ACK
+ *
+ * @brief Acknowledgment to IX_ETHNPE_PC_SETBBSID message.
+ */
+#define IX_ETHNPE_PC_SETBBSID_ACK 0x10
+
+/**
+ * @def IX_ETHNPE_PC_SETAPMACTABLE_ACK
+ *
+ * @brief Acknowledgment to IX_ETHNPE_PC_SETAPMACTABLE message.
+ */
+#define IX_ETHNPE_PC_SETAPMACTABLE_ACK 0x11
+
+/**
+ * @def IX_ETHNPE_SETLOOPBACK_MODE_ACK
+ *
+ * @brief Acknowledgment to IX_ETHNPE_SETLOOPBACK_MODE message.
+ */
+#define IX_ETHNPE_SETLOOPBACK_MODE_ACK (0x12)
+
+/*--------------------------------------------------------------------------
+ * Queue Manager Queue entry bit field boundary definitions
+ *------------------------------------------------------------------------*/
+
+/**
+ * @def MASK(hi,lo)
+ *
+ * @brief Macro for mask
+ */
+#define MASK(hi,lo) (((1 << (1 + ((hi) - (lo)))) - 1) << (lo))
+
+/**
+ * @def BITS(x,hi,lo)
+ *
+ * @brief Macro for bits
+ */
+#define BITS(x,hi,lo) (((x) & MASK(hi,lo)) >> (lo))
+
+/**
+ * @def IX_ETHNPE_QM_Q_RXENET_LENGTH_MASK
+ *
+ * @brief QMgr Queue LENGTH field mask
+ */
+#define IX_ETHNPE_QM_Q_RXENET_LENGTH_MASK 0x3fff
+
+/**
+ * @def IX_ETHNPE_QM_Q_FIELD_FLAG_R
+ *
+ * @brief QMgr Queue FLAG field right boundary
+ */
+#define IX_ETHNPE_QM_Q_FIELD_FLAG_R 20
+
+/**
+ * @def IX_ETHNPE_QM_Q_FIELD_FLAG_MASK
+ *
+ * @brief QMgr Queue FLAG field mask
+ *
+ * Multicast bit : BIT(4)
+ * Broadcast bit : BIT(5)
+ * IP bit : BIT(6) (linux only)
+ *
+ */
+#ifdef __vxworks
+#define IX_ETHNPE_QM_Q_FIELD_FLAG_MASK 0x30
+#else
+#define IX_ETHNPE_QM_Q_FIELD_FLAG_MASK 0x70
+#endif
+
+
+/**
+ * @def IX_ETHNPE_QM_Q_FIELD_NPEID_L
+ *
+ * @brief QMgr Queue NPE ID field left boundary
+ */
+#define IX_ETHNPE_QM_Q_FIELD_NPEID_L 1
+
+/**
+ * @def IX_ETHNPE_QM_Q_FIELD_NPEID_R
+ *
+ * @brief QMgr Queue NPE ID field right boundary
+ */
+#define IX_ETHNPE_QM_Q_FIELD_NPEID_R 0
+
+/**
+ * @def IX_ETHNPE_QM_Q_FIELD_PRIOR_L
+ *
+ * @brief QMgr Queue Priority field left boundary
+ */
+#define IX_ETHNPE_QM_Q_FIELD_PRIOR_L 2
+
+/**
+ * @def IX_ETHNPE_QM_Q_FIELD_PRIOR_R
+ *
+ * @brief QMgr Queue Priority field right boundary
+ */
+#define IX_ETHNPE_QM_Q_FIELD_PRIOR_R 0
+
+/**
+ * @def IX_ETHNPE_QM_Q_FIELD_ADDR_L
+ *
+ * @brief QMgr Queue Address field left boundary
+ */
+#define IX_ETHNPE_QM_Q_FIELD_ADDR_L 31
+
+/**
+ * @def IX_ETHNPE_QM_Q_FIELD_ADDR_R
+ *
+ * @brief QMgr Queue Address field right boundary
+ */
+#define IX_ETHNPE_QM_Q_FIELD_ADDR_R 5
+
+/*--------------------------------------------------------------------------
+ * Queue Manager Queue entry bit field masks
+ *------------------------------------------------------------------------*/
+
+/**
+ * @def IX_ETHNPE_QM_Q_FREEENET_ADDR_MASK
+ *
+ * @brief Macro to mask the Address field of the FreeEnet Queue Manager Entry
+ */
+#define IX_ETHNPE_QM_Q_FREEENET_ADDR_MASK \
+ MASK (IX_ETHNPE_QM_Q_FIELD_ADDR_L, \
+ IX_ETHNPE_QM_Q_FIELD_ADDR_R)
+
+/**
+ * @def IX_ETHNPE_QM_Q_RXENET_NPEID_MASK
+ *
+ * @brief Macro to mask the NPE ID field of the RxEnet Queue Manager Entry
+ */
+#define IX_ETHNPE_QM_Q_RXENET_NPEID_MASK \
+ MASK (IX_ETHNPE_QM_Q_FIELD_NPEID_L, \
+ IX_ETHNPE_QM_Q_FIELD_NPEID_R)
+
+/**
+ * @def IX_ETHNPE_QM_Q_RXENET_ADDR_MASK
+ *
+ * @brief Macro to mask the Mbuf Address field of the RxEnet Queue Manager Entry
+ */
+#define IX_ETHNPE_QM_Q_RXENET_ADDR_MASK \
+ MASK (IX_ETHNPE_QM_Q_FIELD_ADDR_L, \
+ IX_ETHNPE_QM_Q_FIELD_ADDR_R)
+
+/**
+ * @def IX_ETHNPE_QM_Q_TXENET_PRIOR_MASK
+ *
+ * @brief Macro to mask the Priority field of the TxEnet Queue Manager Entry
+ */
+#define IX_ETHNPE_QM_Q_TXENET_PRIOR_MASK \
+ MASK (IX_ETHNPE_QM_Q_FIELD_PRIOR_L, \
+ IX_ETHNPE_QM_Q_FIELD_PRIOR_R)
+
+/**
+ * @def IX_ETHNPE_QM_Q_TXENET_ADDR_MASK
+ *
+ * @brief Macro to mask the Mbuf Address field of the TxEnet Queue Manager Entry
+ */
+#define IX_ETHNPE_QM_Q_TXENET_ADDR_MASK \
+ MASK (IX_ETHNPE_QM_Q_FIELD_ADDR_L, \
+ IX_ETHNPE_QM_Q_FIELD_ADDR_R)
+
+/**
+ * @def IX_ETHNPE_QM_Q_TXENETDONE_NPEID_MASK
+ *
+ * @brief Macro to mask the NPE ID field of the TxEnetDone Queue Manager Entry
+ */
+#define IX_ETHNPE_QM_Q_TXENETDONE_NPEID_MASK \
+ MASK (IX_ETHNPE_QM_Q_FIELD_NPEID_L, \
+ IX_ETHNPE_QM_Q_FIELD_NPEID_R)
+
+/**
+ * @def IX_ETHNPE_QM_Q_TXENETDONE_ADDR_MASK
+ *
+ * @brief Macro to mask the Mbuf Address field of the TxEnetDone Queue Manager
+ * Entry
+ */
+#define IX_ETHNPE_QM_Q_TXENETDONE_ADDR_MASK \
+ MASK (IX_ETHNPE_QM_Q_FIELD_ADDR_L, \
+ IX_ETHNPE_QM_Q_FIELD_ADDR_R)
+
+/*--------------------------------------------------------------------------
+ * Queue Manager Queue entry bit field value extraction macros
+ *------------------------------------------------------------------------*/
+
+/**
+ * @def IX_ETHNPE_QM_Q_FREEENET_ADDR_VAL(x)
+ *
+ * @brief Extraction macro for Address field of FreeNet Queue Manager Entry
+ *
+ * Pointer to an mbuf buffer descriptor
+ */
+#define IX_ETHNPE_QM_Q_FREEENET_ADDR_VAL(x) \
+ ((x) & IX_ETHNPE_QM_Q_FREEENET_ADDR_MASK)
+
+/**
+ * @def IX_ETHNPE_QM_Q_RXENET_NPEID_VAL(x)
+ *
+ * @brief Extraction macro for NPE ID field of RxEnet Queue Manager Entry
+ *
+ * Set to 0 for entries originating from the Eth0 NPE;
+ * Set to 1 for entries originating from the Eth1 NPE.
+ */
+#define IX_ETHNPE_QM_Q_RXENET_NPEID_VAL(x) \
+ BITS (x, IX_ETHNPE_QM_Q_FIELD_NPEID_L, \
+ IX_ETHNPE_QM_Q_FIELD_NPEID_R)
+
+/**
+ * @def IX_ETHNPE_QM_Q_RXENET_PORTID_VAL(x)
+ *
+ * @brief Extraction macro for Port ID field of RxEnet Queue Manager Entry
+ *
+ * 0-5: Assignable (by the XScale client) to any of the physical ports.
+ * 6: It is reserved
+ * 7: Indication that the NPE did not find the associated frame's destination MAC address within
+ * its internal filtering database.
+ */
+#define IX_ETHNPE_QM_Q_RXENET_PORTID_VAL(x) \
+ BITS (x, IX_ETHNPE_QM_Q_FIELD_PORTID_L, \
+ IX_ETHNPE_QM_Q_Field_PortID_R)
+
+/**
+ * @def IX_ETHNPE_QM_Q_RXENET_ADDR_VAL(x)
+ *
+ * @brief Extraction macro for Address field of RxEnet Queue Manager Entry
+ *
+ * Pointer to an mbuf buffer descriptor
+ */
+#define IX_ETHNPE_QM_Q_RXENET_ADDR_VAL(x) \
+ ((x) & IX_ETHNPE_QM_Q_RXENET_ADDR_MASK)
+
+/**
+ * @def IX_ETHNPE_QM_Q_TXENET_PRIOR_VAL(x)
+ *
+ * @brief Extraction macro for Priority field of TxEnet Queue Manager Entry
+ *
+ * Priority of the packet (as described in IEEE 802.1D). This field is
+ * cleared upon return from the Ethernet NPE to the TxEnetDone queue.
+ */
+#define IX_ETHNPE_QM_Q_TXENET_PRIOR_VAL(x) \
+ BITS (x, IX_ETHNPE_QM_Q_FIELD_PRIOR_L, \
+ IX_ETHNPE_QM_Q_FIELD_PRIOR_R)
+
+/**
+ * @def IX_ETHNPE_QM_Q_TXENET_ADDR_VAL(x)
+ *
+ * @brief Extraction macro for Address field of Queue Manager TxEnet Queue
+ * Manager Entry
+ *
+ * Pointer to an mbuf buffer descriptor
+ */
+#define IX_ETHNPE_QM_Q_TXENET_ADDR_VAL(x) \
+ ((x) & IX_ETHNPE_QM_Q_TXENET_ADDR_MASK)
+
+/**
+ * @def IX_ETHNPE_QM_Q_TXENETDONE_NPEID_VAL(x)
+ *
+ * @brief Extraction macro for NPE ID field of TxEnetDone Queue Manager Entry
+ *
+ * Set to 0 for entries originating from the Eth0 NPE; set to 1 for en-tries
+ * originating from the Eth1 NPE.
+ */
+#define IX_ETHNPE_QM_Q_TXENETDONE_NPEID_VAL(x) \
+ BITS (x, IX_ETHNPE_QM_Q_FIELD_NPEID_L, \
+ IX_ETHNPE_QM_Q_FIELD_NPEID_R)
+
+/**
+ * @def IX_ETHNPE_QM_Q_TXENETDONE_ADDR_VAL(x)
+ *
+ * @brief Extraction macro for Address field of TxEnetDone Queue Manager Entry
+ *
+ * Pointer to an mbuf buffer descriptor
+ */
+#define IX_ETHNPE_QM_Q_TXENETDONE_ADDR_VAL(x) \
+ ((x) & IX_ETHNPE_QM_Q_TXENETDONE_ADDR_MASK)
+
+
+/*--------------------------------------------------------------------------
+ * NPE limits
+ *------------------------------------------------------------------------*/
+
+/**
+ * @def IX_ETHNPE_ACC_RXFREE_BUFFER_LENGTH_MIN
+ *
+ * @brief Macro to check the minimum length of a rx free buffer
+ */
+#define IX_ETHNPE_ACC_RXFREE_BUFFER_LENGTH_MIN (64)
+
+/**
+ * @def IX_ETHNPE_ACC_RXFREE_BUFFER_LENGTH_MASK
+ *
+ * @brief Mask to apply to the mbuf length before submitting it to the NPE
+ * (the NPE handles only rx free mbufs which are multiple of 64)
+ *
+ * @sa IX_ETHNPE_ACC_RXFREE_BUFFER_LENGTH_MASK
+ */
+#define IX_ETHNPE_ACC_RXFREE_BUFFER_LENGTH_MASK (~63)
+
+/**
+ * @def IX_ETHNPE_ACC_RXFREE_BUFFER_ROUND_UP(size)
+ *
+ * @brief Round up to get the size necessary to receive without chaining
+ * the frames which are (size) bytes (the NPE operates by multiple of 64)
+ * e.g. To receive 1514 bytes frames, the size of the buffers in replenish
+ * has to be at least (1514+63)&(~63) = 1536 bytes.
+ *
+ */
+#define IX_ETHNPE_ACC_RXFREE_BUFFER_ROUND_UP(size) (((size) + 63) & ~63)
+
+/**
+ * @def IX_ETHNPE_ACC_RXFREE_BUFFER_ROUND_DOWN(size)
+ *
+ * @brief Round down to apply to the mbuf length before submitting
+ * it to the NPE. (the NPE operates by multiple of 64)
+ *
+ */
+#define IX_ETHNPE_ACC_RXFREE_BUFFER_ROUND_DOWN(size) ((size) & ~63)
+
+/**
+ * @def IX_ETHNPE_ACC_FRAME_LENGTH_MAX
+ *
+ * @brief maximum mbuf length supported by the NPE
+ *
+ * @sa IX_ETHNPE_ACC_FRAME_LENGTH_MAX
+ */
+#define IX_ETHNPE_ACC_FRAME_LENGTH_MAX (16320)
+
+/**
+ * @def IX_ETHNPE_ACC_FRAME_LENGTH_DEFAULT
+ *
+ * @brief default mbuf length supported by the NPE
+ *
+ * @sa IX_ETHNPE_ACC_FRAME_LENGTH_DEFAULT
+ */
+#define IX_ETHNPE_ACC_FRAME_LENGTH_DEFAULT (1522)
+
+/**
+ * @def IX_ETHNPE_ACC_LENGTH_OFFSET
+ *
+ * @brief Offset of the cluster length field in the word shared with the NPEs
+ */
+#define IX_ETHNPE_ACC_LENGTH_OFFSET 16
+
+/**
+ * @def IX_ETHNPE_ACC_PKTLENGTH_MASK
+ *
+ * @brief Mask of the cluster length field in the word shared with the NPEs
+ */
+#define IX_ETHNPE_ACC_PKTLENGTH_MASK 0x3fff
+
+
+/**
+ *@}
+ */
+
+#endif /* __doxygen_HIDE */
diff --git a/cpu/ixp/npe/include/IxFeatureCtrl.h b/cpu/ixp/npe/include/IxFeatureCtrl.h
new file mode 100644
index 0000000000..dabc38e25e
--- /dev/null
+++ b/cpu/ixp/npe/include/IxFeatureCtrl.h
@@ -0,0 +1,742 @@
+/**
+ * @file IxFeatureCtrl.h
+ *
+ * @date 30-Jan-2003
+
+ * @brief This file contains the public API of the IXP400 Feature Control
+ * component.
+ *
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+*/
+/* ------------------------------------------------------
+ Doxygen group definitions
+ ------------------------------------------------------ */
+/**
+ * @defgroup IxFeatureCtrlAPI IXP400 Feature Control (IxFeatureCtrl) API
+ *
+ * @brief The Public API for the IXP400 Feature Control.
+ *
+ * @{
+ */
+
+#ifndef IXFEATURECTRL_H
+#define IXFEATURECTRL_H
+
+/*
+ * User defined include files
+ */
+#include "IxOsal.h"
+
+/*
+ * #defines and macros
+ */
+
+/*************************************************************
+ * The following are IxFeatureCtrlComponentCheck return values.
+ ************************************************************/
+
+/**
+ * @ingroup IxFeatureCtrlAPI
+ *
+ * @def IX_FEATURE_CTRL_COMPONENT_DISABLED
+ *
+ * @brief Hardware Component is disabled/unavailable.
+ * Return status by ixFeatureCtrlComponentCheck()
+ */
+#define IX_FEATURE_CTRL_COMPONENT_DISABLED 0
+
+/**
+ * @ingroup IxFeatureCtrlAPI
+ *
+ * @def IX_FEATURE_CTRL_COMPONENT_ENABLED
+ *
+ * @brief Hardware Component is available.
+ * Return status by ixFeatureCtrlComponentCheck()
+ */
+#define IX_FEATURE_CTRL_COMPONENT_ENABLED 1
+
+/***********************************************************************************
+ * Product ID in XScale CP15 - Register 0
+ * - It contains information on the maximum XScale Core Frequency and
+ * Silicon Stepping.
+ * - XScale Core Frequency Id indicates only the maximum XScale frequency
+ * achievable and not the running XScale frequency (maybe stepped down).
+ * - The register is read by using ixFeatureCtrlProductIdRead.
+ * - Usage example:
+ * productId = ixFeatureCtrlProductIdRead();
+ * if( (productId & IX_FEATURE_CTRL_SILICON_STEPPING_MASK) ==
+ * IX_FEATURE_CTRL_SILICON_TYPE_A0 )
+ * if( (productId & IX_FEATURE_CTRL_XSCALE_FREQ_MASK) ==
+ * IX_FEATURE_CTRL_XSCALE_FREQ_533 )
+ *
+ * 31 28 27 24 23 20 19 16 15 12 11 9 8 4 3 0
+ * --------------------------------------------------------------------------------
+ * | 0x6 | 0x9 | 0x0 | 0x5 | 0x4 | Device ID | XScale Core Freq Id | Si Stepping Id |
+ * --------------------------------------------------------------------------------
+ *
+ * Maximum Achievable XScale Core Frequency Id : 533MHz - 0x1C
+ * 400MHz - 0x1D
+ * 266MHz - 0x1F
+ *
+ * <b>THE CORE FREQUENCY ID IS NOT APPLICABLE TO IXP46X <\b>
+ *
+ * The above is applicable to IXP42X only. CP15 in IXP46X does not contain any
+ * Frequency ID.
+ *
+ * Si Stepping Id : A - 0x0
+ * B - 0x1
+ *
+ * XScale Core freq Id - Device ID [11:9] : IXP42X - 0x0
+ * IXP46X - 0x1
+ *************************************************************************************/
+
+/**
+ * @ingroup IxFeatureCtrlAPI
+ *
+ * @def IX_FEATURE_CTRL_SILICON_TYPE_A0
+ *
+ * @brief This is the value of A0 Silicon in product ID.
+ */
+#define IX_FEATURE_CTRL_SILICON_TYPE_A0 0
+
+/**
+ * @ingroup IxFeatureCtrlAPI
+ *
+ * @def IX_FEATURE_CTRL_SILICON_TYPE_B0
+ *
+ * @brief This is the value of B0 Silicon in product ID.
+ */
+#define IX_FEATURE_CTRL_SILICON_TYPE_B0 1
+
+/**
+ * @ingroup IxFeatureCtrlAPI
+ *
+ * @def IX_FEATURE_CTRL_SILICON_STEPPING_MASK
+ *
+ * @brief This is the mask of silicon stepping in product ID.
+ */
+#define IX_FEATURE_CTRL_SILICON_STEPPING_MASK 0xF
+
+/**
+ * @ingroup IxFeatureCtrlAPI
+ *
+ * @def IX_FEATURE_CTRL_DEVICE_TYPE_MASK
+ *
+ * @brief This is the mask of silicon stepping in product ID.
+ */
+#define IX_FEATURE_CTRL_DEVICE_TYPE_MASK (0x7)
+
+/**
+ * @ingroup IxFeatureCtrlAPI
+ *
+ * @def IX_FEATURE_CTRL_DEVICE_TYPE_OFFSET
+ *
+ * @brief This is the mask of silicon stepping in product ID.
+ */
+#define IX_FEATURE_CTRL_DEVICE_TYPE_OFFSET 9
+
+
+/**
+ * @ingroup IxFeatureCtrlAPI
+ *
+ * @def IX_FEATURE_CTRL_XSCALE_FREQ_533
+ *
+ * @brief This is the value of 533MHz XScale Core in product ID.
+ */
+#define IX_FEATURE_CTRL_XSCALE_FREQ_533 ((0x1C)<<4)
+
+/**
+ * @ingroup IxFeatureCtrlAPI
+ *
+ * @def IX_FEATURE_CTRL_XSCALE_FREQ_400
+ *
+ * @brief This is the value of 400MHz XScale Core in product ID.
+ */
+#define IX_FEATURE_CTRL_XSCALE_FREQ_400 ((0x1D)<<4)
+
+/**
+ * @ingroup IxFeatureCtrlAPI
+ *
+ * @def IX_FEATURE_CTRL_XSCALE_FREQ_266
+ *
+ * @brief This is the value of 266MHz XScale Core in product ID.
+ */
+#define IX_FEATURE_CTRL_XSCALE_FREQ_266 ((0x1F)<<4)
+
+/**
+ * @ingroup IxFeatureCtrlAPI
+ *
+ * @def IX_FEATURE_CTRL_XSCALE_FREQ_MASK
+ *
+ * @brief This is the mask of XScale Core in product ID.
+ */
+#define IX_FEATURE_CTRL_XSCALE_FREQ_MASK ((0xFF)<<4)
+
+/**
+ * @ingroup IxFeatureCtrlAPI
+ *
+ * @def IX_FEATURECTRL_REG_UTOPIA_32PHY
+ *
+ * @brief Maximum UTOPIA PHY available is 32.
+ *
+ */
+#define IX_FEATURECTRL_REG_UTOPIA_32PHY 0x0
+
+/**
+ * @ingroup IxFeatureCtrlAPI
+ *
+ * @def IX_FEATURECTRL_REG_UTOPIA_16PHY
+ *
+ * @brief Maximum UTOPIA PHY available is 16.
+ *
+ */
+#define IX_FEATURECTRL_REG_UTOPIA_16PHY 0x1
+
+/**
+ * @ingroup IxFeatureCtrlAPI
+ *
+ * @def IX_FEATURECTRL_REG_UTOPIA_8PHY
+ *
+ * @brief Maximum UTOPIA PHY available to is 8.
+ *
+ */
+#define IX_FEATURECTRL_REG_UTOPIA_8PHY 0x2
+
+/**
+ * @ingroup IxFeatureCtrlAPI
+ *
+ * @def IX_FEATURECTRL_REG_UTOPIA_4PHY
+ *
+ * @brief Maximum UTOPIA PHY available to is 4.
+ *
+ */
+#define IX_FEATURECTRL_REG_UTOPIA_4PHY 0x3
+
+#ifdef __ixp46X
+
+/**
+ * @ingroup IxFeatureCtrlAPI
+ *
+ * @def IX_FEATURECTRL_REG_XSCALE_533FREQ
+ *
+ * @brief Maximum frequency available to IXP46x is 533 MHz.
+ *
+ */
+#define IX_FEATURECTRL_REG_XSCALE_533FREQ 0x0
+
+/**
+ * @ingroup IxFeatureCtrlAPI
+ *
+ * @def IX_FEATURECTRL_REG_XSCALE_667FREQ
+ *
+ * @brief Maximum frequency available to IXP46x is 667 MHz.
+ *
+ */
+#define IX_FEATURECTRL_REG_XSCALE_667FREQ 0x1
+
+/**
+ * @ingroup IxFeatureCtrlAPI
+ *
+ * @def IX_FEATURECTRL_REG_XSCALE_400FREQ
+ *
+ * @brief Maximum frequency available to IXP46x is 400 MHz.
+ *
+ */
+#define IX_FEATURECTRL_REG_XSCALE_400FREQ 0x2
+
+/**
+ * @ingroup IxFeatureCtrlAPI
+ *
+ * @def IX_FEATURECTRL_REG_XSCALE_266FREQ
+ *
+ * @brief Maximum frequency available to IXP46x is 266 MHz.
+ *
+ */
+#define IX_FEATURECTRL_REG_XSCALE_266FREQ 0x3
+
+#endif /* __ixp46X */
+
+/**
+ * @ingroup IxFeatureCtrlAPI
+ *
+ * @def IX_FEATURECTRL_COMPONENT_NOT_AVAILABLE
+ *
+ * @brief Component selected is not available for device
+ *
+ */
+#define IX_FEATURECTRL_COMPONENT_NOT_AVAILABLE 0x0000
+
+/**
+ * @ingroup IxFeatureCtrlAPI
+ *
+ * @def IX_FEATURECTRL_COMPONENT_ALWAYS_AVAILABLE
+ *
+ * @brief Component selected is not available for device
+ *
+ */
+#define IX_FEATURECTRL_COMPONENT_ALWAYS_AVAILABLE 0xffff
+
+/**
+ * @defgroup IxFeatureCtrlSwConfig Software Configuration for Access Component
+ *
+ * @ingroup IxFeatureCtrlAPI
+ *
+ * @brief This section describes software configuration in access component. The
+ * configuration can be changed at run-time. ixFeatureCtrlSwConfigurationCheck( )
+ * will be used across applicable access component to check the configuration.
+ * ixFeatureCtrlSwConfigurationWrite( ) is used to write the software configuration.
+ *
+ * @note <b>All software configurations are default to be enabled.</b>
+ *
+ * @{
+ */
+/**
+ * @ingroup IxFeatureCtrlSwConfig
+ *
+ * @def IX_FEATURE_CTRL_SWCONFIG_DISABLED
+ *
+ * @brief Software configuration is disabled.
+ *
+ */
+#define IX_FEATURE_CTRL_SWCONFIG_DISABLED 0
+
+/**
+ * @ingroup IxFeatureCtrlSwConfig
+ *
+ * @def IX_FEATURE_CTRL_SWCONFIG_ENABLED
+ *
+ * @brief Software configuration is enabled.
+ *
+ */
+#define IX_FEATURE_CTRL_SWCONFIG_ENABLED 1
+
+/**
+ * Section for enums
+ **/
+
+/**
+ * @ingroup IxFeatureCtrlBuildDevice
+ *
+ * @enum IxFeatureCtrlBuildDevice
+ *
+ * @brief Indicates software build type.
+ *
+ * Default build type is IXP42X
+ *
+ */
+typedef enum
+{
+ IX_FEATURE_CTRL_SW_BUILD_IXP42X = 0, /**<Build type is IXP42X */
+ IX_FEATURE_CTRL_SW_BUILD_IXP46X /**<Build type is IXP46X */
+} IxFeatureCtrlBuildDevice;
+
+/**
+ * @ingroup IxFeatureCtrlSwConfig
+ *
+ * @enum IxFeatureCtrlSwConfig
+ *
+ * @brief Enumeration for software configuration in access components.
+ *
+ * Entry for new run-time software configuration should be added here.
+ */
+typedef enum
+{
+ IX_FEATURECTRL_ETH_LEARNING = 0, /**< EthDB Learning Feature */
+ IX_FEATURECTRL_ORIGB0_DISPATCHER, /**< IXP42X B0 and IXP46X dispatcher without
+ livelock prevention functionality Feature */
+ IX_FEATURECTRL_SWCONFIG_MAX /**< Maximum boudary for IxFeatureCtrlSwConfig */
+} IxFeatureCtrlSwConfig;
+
+
+/************************************************************************
+ * IXP400 Feature Control Register
+ * - It contains the information (available/unavailable) of IXP425&IXP46X
+ * hardware components in their corresponding bit location.
+ * - Bit value of 0 means the hardware component is available
+ * or not software disabled. Hardware component that is available
+ * can be software disabled.
+ * - Bit value of 1 means the hardware is unavailable or software
+ * disabled.Hardware component that is unavailable cannot be software
+ * enabled.
+ * - Use ixFeatureCtrlHwCapabilityRead() to read the hardware component's
+ * availability.
+ * - Use ixFeatureCtrlRead() to get the current IXP425/IXP46X feature control
+ * register value.
+ *
+ * Bit Field Description (Hardware Component Availability)
+ * --- ---------------------------------------------------
+ * 0 RComp Circuitry
+ * 1 USB Controller
+ * 2 Hashing Coprocessor
+ * 3 AES Coprocessor
+ * 4 DES Coprocessor
+ * 5 HDLC Coprocessor
+ * 6 AAL Coprocessor - Always available in IXP46X
+ * 7 HSS Coprocesspr
+ * 8 Utopia Coprocessor
+ * 9 Ethernet 0 Coprocessor
+ * 10 Ethernet 1 Coprocessor
+ * 11 NPE A
+ * 12 NPE B
+ * 13 NPE C
+ * 14 PCI Controller
+ * 15 ECC/TimeSync Coprocessor - Only applicable to IXP46X
+ * 16-17 Utopia PHY Limit Status : 0x0 - 32 PHY
+ * 0x1 - 16 PHY
+ * 0x2 - 8 PHY
+ * 0x3 - 4 PHY
+ *
+ * Portions below are only applicable to IXP46X
+ * 18 USB Host Coprocessor
+ * 19 NPE A Ethernet - 0 for Enable if Utopia = 1
+ * 20 NPE B Ethernet coprocessor 1-3.
+ * 21 RSA Crypto Block coprocessor.
+ * 22-23 Processor frequency : 0x0 - 533 MHz
+ * 0x1 - 667 MHz
+ * 0x2 - 400 MHz
+ * 0x3 - 266 MHz
+ * 24-31 Reserved
+ *
+ ************************************************************************/
+/*Section generic to both IXP42X and IXP46X*/
+
+/**
+ * @ingroup IxFeatureCtrlAPI
+ *
+ * @enum IxFeatureCtrlComponentType
+ *
+ * @brief Enumeration for components availavble
+ *
+ */
+typedef enum
+{
+ IX_FEATURECTRL_RCOMP = 0, /**<bit location for RComp Circuitry*/
+ IX_FEATURECTRL_USB, /**<bit location for USB Controller*/
+ IX_FEATURECTRL_HASH, /**<bit location for Hashing Coprocessor*/
+ IX_FEATURECTRL_AES, /**<bit location for AES Coprocessor*/
+ IX_FEATURECTRL_DES, /**<bit location for DES Coprocessor*/
+ IX_FEATURECTRL_HDLC, /**<bit location for HDLC Coprocessor*/
+ IX_FEATURECTRL_AAL, /**<bit location for AAL Coprocessor*/
+ IX_FEATURECTRL_HSS, /**<bit location for HSS Coprocessor*/
+ IX_FEATURECTRL_UTOPIA, /**<bit location for UTOPIA Coprocessor*/
+ IX_FEATURECTRL_ETH0, /**<bit location for Ethernet 0 Coprocessor*/
+ IX_FEATURECTRL_ETH1, /**<bit location for Ethernet 1 Coprocessor*/
+ IX_FEATURECTRL_NPEA, /**<bit location for NPE A*/
+ IX_FEATURECTRL_NPEB, /**<bit location for NPE B*/
+ IX_FEATURECTRL_NPEC, /**<bit location for NPE C*/
+ IX_FEATURECTRL_PCI, /**<bit location for PCI Controller*/
+ IX_FEATURECTRL_ECC_TIMESYNC, /**<bit location for TimeSync Coprocessor*/
+ IX_FEATURECTRL_UTOPIA_PHY_LIMIT, /**<bit location for Utopia PHY Limit Status*/
+ IX_FEATURECTRL_UTOPIA_PHY_LIMIT_BIT2, /**<2nd bit of PHY limit status*/
+ IX_FEATURECTRL_USB_HOST_CONTROLLER, /**<bit location for USB host controller*/
+ IX_FEATURECTRL_NPEA_ETH, /**<bit location for NPE-A Ethernet Disable*/
+ IX_FEATURECTRL_NPEB_ETH, /**<bit location for NPE-B Ethernet 1-3 Coprocessors Disable*/
+ IX_FEATURECTRL_RSA, /**<bit location for RSA Crypto block Coprocessors Disable*/
+ IX_FEATURECTRL_XSCALE_MAX_FREQ, /**<bit location for XScale max frequency*/
+ IX_FEATURECTRL_XSCALE_MAX_FREQ_BIT2, /**<2nd xscale max freq bit NOT TO BE USED */
+ IX_FEATURECTRL_MAX_COMPONENTS
+} IxFeatureCtrlComponentType;
+
+/**
+ * @ingroup IxFeatureCtrlDeviceId
+ *
+ * @enum IxFeatureCtrlDeviceId
+ *
+ * @brief Enumeration for device type.
+ *
+ * @warning This enum is closely related to the npe image. Its format should comply
+ * with formats used in the npe image ImageID. This is indicated by the
+ * first nibble of the image ID. This should also be in sync with the
+ * with what is defined in CP15. Current available formats are
+ * - IXP42X - 0000
+ * - IXP46X - 0001
+ *
+ */
+typedef enum
+{
+ IX_FEATURE_CTRL_DEVICE_TYPE_IXP42X = 0, /**<Device type is IXP42X */
+ IX_FEATURE_CTRL_DEVICE_TYPE_IXP46X, /**<Device type is IXP46X */
+ IX_FEATURE_CTRL_DEVICE_TYPE_MAX /**<Max devices */
+} IxFeatureCtrlDeviceId;
+
+
+/**
+ * @} addtogroup IxFeatureCtrlSwConfig
+ */
+
+/*
+ * Typedefs
+ */
+
+/**
+ * @ingroup IxFeatureCtrlAPI
+ *
+ * @typedef IxFeatureCtrlReg
+ *
+ * @brief Feature Control Register that contains hardware components'
+ * availability information.
+ */
+typedef UINT32 IxFeatureCtrlReg;
+
+/**
+ * @ingroup IxFeatureCtrlAPI
+ *
+ * @typedef IxFeatureCtrlProductId
+ *
+ * @brief Product ID of Silicon that contains Silicon Stepping and
+ * Maximum XScale Core Frequency information.
+ */
+typedef UINT32 IxFeatureCtrlProductId;
+
+/*
+ * Prototypes for interface functions
+ */
+
+/**
+ * @ingroup IxFeatureCtrlAPI
+ *
+ * @fn IxFeatureCtrlReg ixFeatureCtrlRead (void)
+ *
+ * @brief This function reads out the CURRENT value of Feature Control Register.
+ * The current value may not be the same as that of the hardware component
+ * availability.
+ *
+ * The bit location of each hardware component is defined above.
+ * A value of '1' in bit means the hardware component is not available. A value of '0'
+ * means the hardware component is available.
+ *
+ * @return
+ * - IxFeatureCtrlReg - the current value of IXP400 Feature Control Register
+ */
+PUBLIC IxFeatureCtrlReg
+ixFeatureCtrlRead (void);
+
+/**
+ * @ingroup IxFeatureCtrlAPI
+ *
+ * @fn IxFeatureDeviceId ixFeatureCtrlDeviceRead (void)
+ *
+ * @brief This function gets the type of device that the software is currently running
+ * on
+ *
+ * This function reads the feature Ctrl register specifically to obtain the device id.
+ * The definitions of the avilable IDs are as above.
+ *
+ * @return
+ * - IxFeatureCtrlDeviceId - the type of device currently running
+ */
+IxFeatureCtrlDeviceId
+ixFeatureCtrlDeviceRead (void);
+
+/**
+ * @ingroup IxFeatureCtrlAPI
+ *
+ * @fn IxFeatureCtrlBuildDevice ixFeatureCtrlSoftwareBuildGet (void)
+ *
+ * @brief This function refers to the value set by the compiler flag to determine
+ * the type of device the software is built for.
+ *
+ * The function reads the compiler flag to determine the device the software is
+ * built for. When the user executes build in the command line,
+ * a compile time flag (__ixp42X/__ixp46X is set. This API reads this
+ * flag and returns the software build type to the calling client.
+ *
+ * @return
+ * - IxFeatureCtrlBuildDevice - the type of device software is built for.
+ */
+IxFeatureCtrlBuildDevice
+ixFeatureCtrlSoftwareBuildGet (void);
+
+/**
+ * @ingroup IxFeatureCtrlAPI
+ *
+ * @fn IxFeatureCtrlReg ixFeatureCtrlHwCapabilityRead (void)
+ *
+ * @brief This function reads out the hardware capability of a silicon type as defined in
+ * feature control register.This value is different from that returned by
+ * ixFeatureCtrlRead() because this function returns the actual hardware component
+ * availability.
+ *
+ * The bit location of each hardware component is defined above.
+ * A value of '1' in bit means the hardware component is not available. A value of '0'
+ * means the hardware component is available.
+ *
+ * @return
+ * - IxFeatureCtrlReg - the hardware capability of IXP400.
+ *
+ * @warning
+ * - This function must not be called when IXP400 is running as the result
+ * is undefined.
+ */
+PUBLIC IxFeatureCtrlReg
+ixFeatureCtrlHwCapabilityRead (void);
+
+/**
+ * @ingroup IxFeatureCtrlAPI
+ *
+ * @fn void ixFeatureCtrlWrite (IxFeatureCtrlReg expUnitReg)
+ *
+ * @brief This function write the value stored in IxFeatureCtrlReg expUnitReg
+ * to the Feature Control Register.
+ *
+ * The bit location of each hardware component is defined above.
+ * The write is only effective on available hardware components. Writing '1' in a
+ * bit will software disable the respective hardware component. A '0' will mean that
+ * the hardware component will remain to be operable.
+ *
+ * @param expUnitReg @ref IxFeatureCtrlReg [in] - The value to be written to feature control
+ * register.
+ *
+ * @return none
+ *
+ */
+PUBLIC void
+ixFeatureCtrlWrite (IxFeatureCtrlReg expUnitReg);
+
+/**
+ * @ingroup IxFeatureCtrlAPI
+ *
+ * @fn IX_STATUS ixFeatureCtrlComponentCheck (IxFeatureCtrlComponentType componentType)
+ *
+ * @brief This function will check the availability of hardware component specified
+ * as componentType value.
+ *
+ * Usage Example:<br>
+ * - if(IX_FEATURE_CTRL_COMPONENT_DISABLED !=
+ * ixFeatureCtrlComponentCheck(IX_FEATURECTRL_ETH0)) <br>
+ * - if(IX_FEATURE_CTRL_COMPONENT_ENABLED ==
+ * ixFeatureCtrlComponentCheck(IX_FEATURECTRL_PCI)) <br>
+ *
+ * This function is typically called during component initialization time.
+ *
+ * @param componentType @ref IxFeatureCtrlComponentType [in] - the type of a component as
+ * defined above as IX_FEATURECTRL_XXX (Exp: IX_FEATURECTRL_PCI, IX_FEATURECTRL_ETH0)
+
+ *
+ * @return
+ * - IX_FEATURE_CTRL_COMPONENT_ENABLED if component is available
+ * - IX_FEATURE_CTRL_COMPONENT_DISABLED if component is unavailable
+ */
+PUBLIC IX_STATUS
+ixFeatureCtrlComponentCheck (IxFeatureCtrlComponentType componentType);
+
+/**
+ * @ingroup IxFeatureCtrlAPI
+ *
+ * @fn IxFeatureCtrlProductId ixFeatureCtrlProductIdRead (void)
+ *
+ * @brief This function will return IXP400 product ID i.e. CP15,
+ * Register 0.
+ *
+ * @return
+ * - IxFeatureCtrlProductId - the value of product ID.
+ *
+ */
+PUBLIC IxFeatureCtrlProductId
+ixFeatureCtrlProductIdRead (void) ;
+
+/**
+ * @ingroup IxFeatureCtrlAPI
+ *
+ * @fn IX_STATUS ixFeatureCtrlSwConfigurationCheck (IxFeatureCtrlSwConfig swConfigType)
+ *
+ * @brief This function checks whether the specified software configuration is
+ * enabled or disabled.
+ *
+ * Usage Example:<br>
+ * - if(IX_FEATURE_CTRL_SWCONFIG_DISABLED !=
+ * ixFeatureCtrlSwConfigurationCheck(IX_FEATURECTRL_ETH_LEARNING)) <br>
+ * - if(IX_FEATURE_CTRL_SWCONFIG_ENABLED ==
+ * ixFeatureCtrlSwConfigurationCheck(IX_FEATURECTRL_ETH_LEARNING)) <br>
+ *
+ * This function is typically called during access component initialization time.
+ *
+ * @param swConfigType @ref IxFeatureCtrlSwConfig [in] - the type of a software configuration
+ * defined in IxFeatureCtrlSwConfig enumeration.
+ *
+ * @return
+ * - IX_FEATURE_CTRL_SWCONFIG_ENABLED if software configuration is enabled.
+ * - IX_FEATURE_CTRL_SWCONFIG_DISABLED if software configuration is disabled.
+ */
+PUBLIC IX_STATUS
+ixFeatureCtrlSwConfigurationCheck (IxFeatureCtrlSwConfig swConfigType);
+
+/**
+ * @ingroup IxFeatureCtrlAPI
+ *
+ * @fn void ixFeatureCtrlSwConfigurationWrite (IxFeatureCtrlSwConfig swConfigType, BOOL enabled)
+ *
+ * @brief This function enable/disable the specified software configuration.
+ *
+ * Usage Example:<br>
+ * - ixFeatureCtrlSwConfigurationWrite(IX_FEATURECTRL_ETH_LEARNING, TRUE) is used
+ * to enable Ethernet Learning Feature <br>
+ * - ixFeatureCtrlSwConfigurationWrite(IX_FEATURECTRL_ETH_LEARNING, FALSE) is used
+ * to disable Ethernet Learning Feature <br>
+ *
+ * @param swConfigType IxFeatureCtrlSwConfig [in] - the type of a software configuration
+ * defined in IxFeatureCtrlSwConfig enumeration.
+ * @param enabled BOOL [in] - To enable(TRUE) / disable (FALSE) the specified software
+ * configuration.
+ *
+ * @return none
+ *
+ */
+PUBLIC void
+ixFeatureCtrlSwConfigurationWrite (IxFeatureCtrlSwConfig swConfigType, BOOL enabled);
+
+/**
+ * @ingroup IxFeatureCtrlAPI
+ *
+ * @fn void ixFeatureCtrlIxp400SwVersionShow (void)
+ *
+ * @brief This function shows the current software release information for IXP400
+ *
+ * @return none
+ *
+ */
+PUBLIC void
+ixFeatureCtrlIxp400SwVersionShow (void);
+
+#endif /* IXFEATURECTRL_H */
+
+/**
+ * @} defgroup IxFeatureCtrlAPI
+ */
diff --git a/cpu/ixp/npe/include/IxHssAcc.h b/cpu/ixp/npe/include/IxHssAcc.h
new file mode 100644
index 0000000000..07bb119b0b
--- /dev/null
+++ b/cpu/ixp/npe/include/IxHssAcc.h
@@ -0,0 +1,1316 @@
+/**
+ * @file IxHssAcc.h
+ *
+ * @date 07-DEC-2001
+ *
+ * @brief This file contains the public API of the IXP400 HSS Access
+ * component
+ *
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+*/
+
+/* ------------------------------------------------------
+ Doxygen group definitions
+ ------------------------------------------------------ */
+/**
+ * @defgroup IxHssAccAPI IXP400 HSS Access (IxHssAcc) API
+ *
+ * @brief The public API for the IXP400 HssAccess component
+ *
+ * IxHssAcc is the access layer to the HSS packetised and channelised
+ * services
+ *
+ * <b> Design Notes </b><br>
+ * <UL>
+ * <LI>When a packet-pipe is configured for 56Kbps RAW mode, byte alignment of
+ * the transmitted data is not preserved. All raw data that is transmitted
+ * will be received in proper order by the receiver, but the first bit of
+ * the packet may be seen at any offset within a byte; all subsequent bytes
+ * will have the same offset for the duration of the packet. The same offset
+ * also applies to all subsequent packets received on the packet-pipe too.
+ * (Similar results will occur for data received from remote end.) While
+ * this behavior will also occur for 56Kbps HDLC mode, the HDLC
+ * encoding/decoding will preserve the original byte alignment at the
+ * receiver end.
+ * </UL>
+ *
+ * <b> 56Kbps Packetised Service Bandwidth Limitation </b><br>
+ * <UL>
+ * <LI>IxHssAcc supports 56Kbps packetised service at a maximum aggregate rate
+ * for all HSS ports/HDLC channels of 12.288Mbps[1] in each direction, i.e.
+ * it supports 56Kbps packetised service on up to 8 T1 trunks. It does
+ * not support 56Kbps packetised service on 8 E1 trunks (i.e. 4 trunks per
+ * HSS port) unless those trunks are running 'fractional E1' with maximum
+ * aggregate rate of 12.288 Mbps in each direction.<br>
+ * [1] 12.288Mbps = 1.536Mbp * 8 T1
+ * </UL>
+ * @{ */
+
+#ifndef IXHSSACC_H
+#define IXHSSACC_H
+
+#include "IxOsal.h"
+
+/*
+ * #defines for function return types, etc.
+ */
+
+/**
+ * @def IX_HSSACC_TSLOTS_PER_HSS_PORT
+ *
+ * @brief The max number of TDM timeslots supported per HSS port - 4E1's =
+ * 32x4 = 128
+ */
+#define IX_HSSACC_TSLOTS_PER_HSS_PORT 128
+
+/* -----------------------------------------------------------
+ The following are HssAccess return values returned through
+ service interfaces. The globally defined IX_SUCCESS (0) and
+ IX_FAIL (1) in IxOsalTypes.h are also used.
+ ----------------------------------------------------------- */
+/**
+ * @def IX_HSSACC_PARAM_ERR
+ *
+ * @brief HssAccess function return value for a parameter error
+ */
+#define IX_HSSACC_PARAM_ERR 2
+
+/**
+ * @def IX_HSSACC_RESOURCE_ERR
+ *
+ * @brief HssAccess function return value for a resource error
+ */
+#define IX_HSSACC_RESOURCE_ERR 3
+
+/**
+ * @def IX_HSSACC_PKT_DISCONNECTING
+ *
+ * @brief Indicates that a disconnect call is progressing and will
+ * disconnect soon
+ */
+#define IX_HSSACC_PKT_DISCONNECTING 4
+
+/**
+ * @def IX_HSSACC_Q_WRITE_OVERFLOW
+ *
+ * @brief Indicates that an attempt to Tx or to replenish an
+ * RxFree Q failed due to Q overflow.
+ */
+#define IX_HSSACC_Q_WRITE_OVERFLOW 5
+
+/* -------------------------------------------------------------------
+ The following errors are HSS/NPE errors returned on error retrieval
+ ------------------------------------------------------------------- */
+/**
+ * @def IX_HSSACC_NO_ERROR
+ *
+ * @brief HSS port no error present
+ */
+#define IX_HSSACC_NO_ERROR 0
+
+/**
+ * @def IX_HSSACC_TX_FRM_SYNC_ERR
+ *
+ * @brief HSS port TX Frame Sync error
+ */
+#define IX_HSSACC_TX_FRM_SYNC_ERR 1
+
+/**
+ * @def IX_HSSACC_TX_OVER_RUN_ERR
+ *
+ * @brief HSS port TX over-run error
+ */
+#define IX_HSSACC_TX_OVER_RUN_ERR 2
+
+/**
+ * @def IX_HSSACC_CHANNELISED_SW_TX_ERR
+ *
+ * @brief NPE software error in channelised TX
+ */
+#define IX_HSSACC_CHANNELISED_SW_TX_ERR 3
+
+/**
+ * @def IX_HSSACC_PACKETISED_SW_TX_ERR
+ *
+ * @brief NPE software error in packetised TX
+ */
+#define IX_HSSACC_PACKETISED_SW_TX_ERR 4
+
+/**
+ * @def IX_HSSACC_RX_FRM_SYNC_ERR
+ *
+ * @brief HSS port RX Frame Sync error
+ */
+#define IX_HSSACC_RX_FRM_SYNC_ERR 5
+
+/**
+ * @def IX_HSSACC_RX_OVER_RUN_ERR
+ *
+ * @brief HSS port RX over-run error
+ */
+#define IX_HSSACC_RX_OVER_RUN_ERR 6
+
+/**
+ * @def IX_HSSACC_CHANNELISED_SW_RX_ERR
+ *
+ * @brief NPE software error in channelised RX
+ */
+#define IX_HSSACC_CHANNELISED_SW_RX_ERR 7
+
+/**
+ * @def IX_HSSACC_PACKETISED_SW_RX_ERR
+ *
+ * @brief NPE software error in packetised TX
+ */
+#define IX_HSSACC_PACKETISED_SW_RX_ERR 8
+
+/* -----------------------------------
+ Packetised service specific defines
+ ----------------------------------- */
+
+/**
+ * @def IX_HSSACC_PKT_MIN_RX_MBUF_SIZE
+ *
+ * @brief Minimum size of the Rx mbuf in bytes which the client must supply
+ * to the component.
+ */
+#define IX_HSSACC_PKT_MIN_RX_MBUF_SIZE 64
+
+/* --------------------------------------------------------------------
+ Enumerated Types - these enumerated values may be used in setting up
+ the contents of hardware registers
+ -------------------------------------------------------------------- */
+/**
+ * @enum IxHssAccHssPort
+ * @brief The HSS port ID - There are two identical ports (0-1).
+ *
+ */
+typedef enum
+{
+ IX_HSSACC_HSS_PORT_0, /**< HSS Port 0 */
+ IX_HSSACC_HSS_PORT_1, /**< HSS Port 1 */
+ IX_HSSACC_HSS_PORT_MAX /**< Delimiter for error checks */
+} IxHssAccHssPort;
+
+/**
+ * @enum IxHssAccHdlcPort
+ * @brief The HDLC port ID - There are four identical HDLC ports (0-3) per
+ * HSS port and they correspond to the 4 E1/T1 trunks.
+ *
+ */
+typedef enum
+{
+ IX_HSSACC_HDLC_PORT_0, /**< HDLC Port 0 */
+ IX_HSSACC_HDLC_PORT_1, /**< HDLC Port 1 */
+ IX_HSSACC_HDLC_PORT_2, /**< HDLC Port 2 */
+ IX_HSSACC_HDLC_PORT_3, /**< HDLC Port 3 */
+ IX_HSSACC_HDLC_PORT_MAX /**< Delimiter for error checks */
+} IxHssAccHdlcPort;
+
+/**
+ * @enum IxHssAccTdmSlotUsage
+ * @brief The HSS TDM stream timeslot assignment types
+ *
+ */
+typedef enum
+{
+ IX_HSSACC_TDMMAP_UNASSIGNED, /**< Unassigned */
+ IX_HSSACC_TDMMAP_HDLC, /**< HDLC - packetised */
+ IX_HSSACC_TDMMAP_VOICE56K, /**< Voice56K - channelised */
+ IX_HSSACC_TDMMAP_VOICE64K, /**< Voice64K - channelised */
+ IX_HSSACC_TDMMAP_MAX /**< Delimiter for error checks */
+} IxHssAccTdmSlotUsage;
+
+/**
+ * @enum IxHssAccFrmSyncType
+ * @brief The HSS frame sync pulse type
+ *
+ */
+typedef enum
+{
+ IX_HSSACC_FRM_SYNC_ACTIVE_LOW, /**< Frame sync is sampled low */
+ IX_HSSACC_FRM_SYNC_ACTIVE_HIGH, /**< sampled high */
+ IX_HSSACC_FRM_SYNC_FALLINGEDGE, /**< sampled on a falling edge */
+ IX_HSSACC_FRM_SYNC_RISINGEDGE, /**< sampled on a rising edge */
+ IX_HSSACC_FRM_SYNC_TYPE_MAX /**< Delimiter for error checks */
+} IxHssAccFrmSyncType;
+
+/**
+ * @enum IxHssAccFrmSyncEnable
+ * @brief The IxHssAccFrmSyncEnable determines how the frame sync pulse is
+ * used
+ * */
+typedef enum
+{
+ IX_HSSACC_FRM_SYNC_INPUT, /**< Frame sync is sampled as an input */
+ IX_HSSACC_FRM_SYNC_INVALID_VALUE, /**< 1 is not used */
+ IX_HSSACC_FRM_SYNC_OUTPUT_FALLING, /**< Frame sync is an output generated
+ off a falling clock edge */
+ IX_HSSACC_FRM_SYNC_OUTPUT_RISING, /**< Frame sync is an output generated
+ off a rising clock edge */
+ IX_HSSACC_FRM_SYNC_ENABLE_MAX /**< Delimiter for error checks */
+} IxHssAccFrmSyncEnable;
+
+/**
+ * @enum IxHssAccClkEdge
+ * @brief IxHssAccClkEdge is used to determine the clk edge to use for
+ * framing and data
+ *
+ */
+typedef enum
+{
+ IX_HSSACC_CLK_EDGE_FALLING, /**< Clock sampled off a falling edge */
+ IX_HSSACC_CLK_EDGE_RISING, /**< Clock sampled off a rising edge */
+ IX_HSSACC_CLK_EDGE_MAX /**< Delimiter for error checks */
+} IxHssAccClkEdge;
+
+/**
+ * @enum IxHssAccClkDir
+ * @brief The HSS clock direction
+ *
+ */
+typedef enum
+{
+ IX_HSSACC_SYNC_CLK_DIR_INPUT, /**< Clock is an input */
+ IX_HSSACC_SYNC_CLK_DIR_OUTPUT, /**< Clock is an output */
+ IX_HSSACC_SYNC_CLK_DIR_MAX /**< Delimiter for error checks */
+} IxHssAccClkDir;
+
+/**
+ * @enum IxHssAccFrmPulseUsage
+ * @brief The HSS frame pulse usage
+ *
+ */
+typedef enum
+{
+ IX_HSSACC_FRM_PULSE_ENABLED, /**< Generate/Receive frame pulses */
+ IX_HSSACC_FRM_PULSE_DISABLED, /**< Disregard frame pulses */
+ IX_HSSACC_FRM_PULSE_MAX /**< Delimiter for error checks */
+} IxHssAccFrmPulseUsage;
+
+/**
+ * @enum IxHssAccDataRate
+ * @brief The HSS Data rate in relation to the clock
+ *
+ */
+typedef enum
+{
+ IX_HSSACC_CLK_RATE, /**< Data rate is at the configured clk speed */
+ IX_HSSACC_HALF_CLK_RATE, /**< Data rate is half the configured clk speed */
+ IX_HSSACC_DATA_RATE_MAX /**< Delimiter for error checks */
+} IxHssAccDataRate;
+
+/**
+ * @enum IxHssAccDataPolarity
+ * @brief The HSS data polarity type
+ *
+ */
+typedef enum
+{
+ IX_HSSACC_DATA_POLARITY_SAME, /**< Don't invert data between NPE and
+ HSS FIFOs */
+ IX_HSSACC_DATA_POLARITY_INVERT, /**< Invert data between NPE and HSS
+ FIFOs */
+ IX_HSSACC_DATA_POLARITY_MAX /**< Delimiter for error checks */
+} IxHssAccDataPolarity;
+
+/**
+ * @enum IxHssAccBitEndian
+ * @brief HSS Data endianness
+ *
+ */
+typedef enum
+{
+ IX_HSSACC_LSB_ENDIAN, /**< TX/RX Least Significant Bit first */
+ IX_HSSACC_MSB_ENDIAN, /**< TX/RX Most Significant Bit first */
+ IX_HSSACC_ENDIAN_MAX /**< Delimiter for the purposes of error checks */
+} IxHssAccBitEndian;
+
+
+/**
+ * @enum IxHssAccDrainMode
+ * @brief Tx pin open drain mode
+ *
+ */
+typedef enum
+{
+ IX_HSSACC_TX_PINS_NORMAL, /**< Normal mode */
+ IX_HSSACC_TX_PINS_OPEN_DRAIN, /**< Open Drain mode */
+ IX_HSSACC_TX_PINS_MAX /**< Delimiter for error checks */
+} IxHssAccDrainMode;
+
+/**
+ * @enum IxHssAccSOFType
+ * @brief HSS start of frame types
+ *
+ */
+typedef enum
+{
+ IX_HSSACC_SOF_FBIT, /**< Framing bit transmitted and expected on rx */
+ IX_HSSACC_SOF_DATA, /**< Framing bit not transmitted nor expected on rx */
+ IX_HSSACC_SOF_MAX /**< Delimiter for error checks */
+} IxHssAccSOFType;
+
+/**
+ * @enum IxHssAccDataEnable
+ * @brief IxHssAccDataEnable is used to determine whether or not to drive
+ * the data pins
+ *
+ */
+typedef enum
+{
+ IX_HSSACC_DE_TRI_STATE, /**< TRI-State the data pins */
+ IX_HSSACC_DE_DATA, /**< Push data out the data pins */
+ IX_HSSACC_DE_MAX /**< Delimiter for error checks */
+} IxHssAccDataEnable;
+
+/**
+ * @enum IxHssAccTxSigType
+ * @brief IxHssAccTxSigType is used to determine how to drive the data pins
+ *
+ */
+typedef enum
+{
+ IX_HSSACC_TXSIG_LOW, /**< Drive the data pins low */
+ IX_HSSACC_TXSIG_HIGH, /**< Drive the data pins high */
+ IX_HSSACC_TXSIG_HIGH_IMP, /**< Drive the data pins with high impedance */
+ IX_HSSACC_TXSIG_MAX /**< Delimiter for error checks */
+} IxHssAccTxSigType;
+
+/**
+ * @enum IxHssAccFbType
+ * @brief IxHssAccFbType determines how to drive the Fbit
+ *
+ * @warning This will only be used for T1 @ 1.544MHz
+ *
+ */
+typedef enum
+{
+ IX_HSSACC_FB_FIFO, /**< Fbit is dictated in FIFO */
+ IX_HSSACC_FB_HIGH_IMP, /**< Fbit is high impedance */
+ IX_HSSACC_FB_MAX /**< Delimiter for error checks */
+} IxHssAccFbType;
+
+/**
+ * @enum IxHssAcc56kEndianness
+ * @brief 56k data endianness when using the 56k type
+ *
+ */
+typedef enum
+{
+ IX_HSSACC_56KE_BIT_7_UNUSED, /**< High bit is unused */
+ IX_HSSACC_56KE_BIT_0_UNUSED, /**< Low bit is unused */
+ IX_HSSACC_56KE_MAX /**< Delimiter for error checks */
+} IxHssAcc56kEndianness;
+
+/**
+ * @enum IxHssAcc56kSel
+ * @brief 56k data transmission type when using the 56k type
+ *
+ */
+typedef enum
+{
+ IX_HSSACC_56KS_32_8_DATA, /**< 32/8 bit data */
+ IX_HSSACC_56KS_56K_DATA, /**< 56K data */
+ IX_HSSACC_56KS_MAX /**< Delimiter for error checks */
+} IxHssAcc56kSel;
+
+
+/**
+ * @enum IxHssAccClkSpeed
+ * @brief IxHssAccClkSpeed represents the HSS clock speeds available
+ *
+ */
+typedef enum
+{
+ IX_HSSACC_CLK_SPEED_512KHZ, /**< 512KHz */
+ IX_HSSACC_CLK_SPEED_1536KHZ, /**< 1.536MHz */
+ IX_HSSACC_CLK_SPEED_1544KHZ, /**< 1.544MHz */
+ IX_HSSACC_CLK_SPEED_2048KHZ, /**< 2.048MHz */
+ IX_HSSACC_CLK_SPEED_4096KHZ, /**< 4.096MHz */
+ IX_HSSACC_CLK_SPEED_8192KHZ, /**< 8.192MHz */
+ IX_HSSACC_CLK_SPEED_MAX /**< Delimiter for error checking */
+} IxHssAccClkSpeed;
+
+/**
+ * @enum IxHssAccPktStatus
+ * @brief Indicates the status of packets passed to the client
+ *
+ */
+typedef enum
+{
+ IX_HSSACC_PKT_OK, /**< Error free.*/
+ IX_HSSACC_STOP_SHUTDOWN_ERROR, /**< Errored due to stop or shutdown
+ occurrance.*/
+ IX_HSSACC_HDLC_ALN_ERROR, /**< HDLC alignment error */
+ IX_HSSACC_HDLC_FCS_ERROR, /**< HDLC Frame Check Sum error.*/
+ IX_HSSACC_RXFREE_Q_EMPTY_ERROR, /**< RxFree Q became empty
+ while receiving this packet.*/
+ IX_HSSACC_HDLC_MAX_FRAME_SIZE_EXCEEDED, /**< HDLC frame size
+ received is greater than
+ max specified at connect.*/
+ IX_HSSACC_HDLC_ABORT_ERROR, /**< HDLC frame received is invalid due to an
+ abort sequence received.*/
+ IX_HSSACC_DISCONNECT_IN_PROGRESS /**< Packet returned
+ because a disconnect is in progress */
+} IxHssAccPktStatus;
+
+
+/**
+ * @enum IxHssAccPktCrcType
+ * @brief HDLC CRC type
+ *
+ */
+typedef enum
+{
+ IX_HSSACC_PKT_16_BIT_CRC = 16, /**< 16 bit CRC is being used */
+ IX_HSSACC_PKT_32_BIT_CRC = 32 /**< 32 bit CRC is being used */
+} IxHssAccPktCrcType;
+
+/**
+ * @enum IxHssAccPktHdlcIdleType
+ * @brief HDLC idle transmission type
+ *
+ */
+typedef enum
+{
+ IX_HSSACC_HDLC_IDLE_ONES, /**< idle tx/rx will be a succession of ones */
+ IX_HSSACC_HDLC_IDLE_FLAGS /**< idle tx/rx will be repeated flags */
+} IxHssAccPktHdlcIdleType;
+
+/**
+ * @brief Structure containing HSS port configuration parameters
+ *
+ * Note: All of these are used for TX. Only some are specific to RX.
+ *
+ */
+typedef struct
+{
+ IxHssAccFrmSyncType frmSyncType; /**< frame sync pulse type (tx/rx) */
+ IxHssAccFrmSyncEnable frmSyncIO; /**< how the frame sync pulse is
+ used (tx/rx) */
+ IxHssAccClkEdge frmSyncClkEdge; /**< frame sync clock edge type
+ (tx/rx) */
+ IxHssAccClkEdge dataClkEdge; /**< data clock edge type (tx/rx) */
+ IxHssAccClkDir clkDirection; /**< clock direction (tx/rx) */
+ IxHssAccFrmPulseUsage frmPulseUsage; /**< whether to use the frame sync
+ pulse or not (tx/rx) */
+ IxHssAccDataRate dataRate; /**< data rate in relation to the
+ clock (tx/rx) */
+ IxHssAccDataPolarity dataPolarity; /**< data polarity type (tx/rx) */
+ IxHssAccBitEndian dataEndianness; /**< data endianness (tx/rx) */
+ IxHssAccDrainMode drainMode; /**< tx pin open drain mode (tx) */
+ IxHssAccSOFType fBitUsage; /**< start of frame types (tx/rx) */
+ IxHssAccDataEnable dataEnable; /**< whether or not to drive the data
+ pins (tx) */
+ IxHssAccTxSigType voice56kType; /**< how to drive the data pins for
+ voice56k type (tx) */
+ IxHssAccTxSigType unassignedType; /**< how to drive the data pins for
+ unassigned type (tx) */
+ IxHssAccFbType fBitType; /**< how to drive the Fbit (tx) */
+ IxHssAcc56kEndianness voice56kEndian;/**< 56k data endianness when using
+ the 56k type (tx) */
+ IxHssAcc56kSel voice56kSel; /**< 56k data transmission type when
+ using the 56k type (tx) */
+ unsigned frmOffset; /**< frame pulse offset in bits wrt
+ the first timeslot (0-1023) (tx/rx) */
+ unsigned maxFrmSize; /**< frame size in bits (1-1024)
+ (tx/rx) */
+} IxHssAccPortConfig;
+
+/**
+ * @brief Structure containing HSS configuration parameters
+ *
+ */
+typedef struct
+{
+ IxHssAccPortConfig txPortConfig; /**< HSS tx port configuration */
+ IxHssAccPortConfig rxPortConfig; /**< HSS rx port configuration */
+ unsigned numChannelised; /**< The number of channelised
+ timeslots (0-32) */
+ unsigned hssPktChannelCount; /**< The number of packetised
+ clients (0 - 4) */
+ UINT8 channelisedIdlePattern; /**< The byte to be transmitted on
+ channelised service when there
+ is no client data to tx */
+ BOOL loopback; /**< The HSS loopback state */
+ unsigned packetizedIdlePattern; /**< The data to be transmitted on
+ packetised service when there is
+ no client data to tx */
+ IxHssAccClkSpeed clkSpeed; /**< The HSS clock speed */
+} IxHssAccConfigParams;
+
+/**
+ * @brief This structure contains 56Kbps, HDLC-mode configuration parameters
+ *
+ */
+typedef struct
+{
+ BOOL hdlc56kMode; /**< 56kbps(TRUE)/64kbps(FALSE) HDLC */
+ IxHssAcc56kEndianness hdlc56kEndian; /**< 56kbps data endianness
+ - ignored if hdlc56kMode is FALSE*/
+ BOOL hdlc56kUnusedBitPolarity0; /**< The polarity '0'(TRUE)/'1'(FALSE) of the unused
+ bit while in 56kbps mode
+ - ignored if hdlc56kMode is FALSE*/
+} IxHssAccHdlcMode;
+
+/**
+ * @brief This structure contains information required by the NPE to
+ * configure the HDLC co-processor
+ *
+ */
+typedef struct
+{
+ IxHssAccPktHdlcIdleType hdlcIdleType; /**< What to transmit when a HDLC port is idle */
+ IxHssAccBitEndian dataEndian; /**< The HDLC data endianness */
+ IxHssAccPktCrcType crcType; /**< The CRC type to be used for this HDLC port */
+} IxHssAccPktHdlcFraming;
+
+/**
+ * @typedef UINT32 IxHssAccPktUserId
+ *
+ * @brief The client supplied value which will be supplied as a parameter
+ * with a given callback.
+ *
+ * This value will be passed into the ixHssAccPktPortConnect function once each
+ * with given callbacks. This value will then be passed back to the client
+ * as one of the parameters to each of these callbacks,
+ * when these callbacks are called.
+ */
+typedef UINT32 IxHssAccPktUserId;
+
+
+/**
+ * @typedef IxHssAccLastErrorCallback
+ * @brief Prototype of the clients function to accept notification of the
+ * last error
+ *
+ * This function is registered through the config. The client will initiate
+ * the last error retrieval. The HssAccess component will send a message to
+ * the NPE through the NPE Message Handler. When a response to the read is
+ * received, the NPE Message Handler will callback the HssAccess component
+ * which will execute this function in the same IxNpeMh context. The client
+ * will be passed the last error and the related service port (packetised
+ * 0-3, channelised 0)
+ *
+ * @param lastHssError unsigned [in] - The last Hss error registered that
+ * has been registered.
+ * @param servicePort unsigned [in] - This is the service port number.
+ * (packetised 0-3, channelised 0)
+ *
+ * @return void
+ */
+typedef void (*IxHssAccLastErrorCallback) (unsigned lastHssError,
+ unsigned servicePort);
+
+/**
+ * @typedef IxHssAccPktRxCallback
+ * @brief Prototype of the clients function to accept notification of
+ * packetised rx
+ *
+ * This function is registered through the ixHssAccPktPortConnect. hssPktAcc will pass
+ * received data in the form of mbufs to the client. The mbuf passed back
+ * to the client could contain a chain of buffers, depending on the packet
+ * size received.
+ *
+ * @param *buffer @ref IX_OSAL_MBUF [in] - This is the mbuf which contains the
+ * payload received.
+ * @param numHssErrs unsigned [in] - This is the number of hssErrors
+ * the Npe has received
+ * @param pktStatus @ref IxHssAccPktStatus [in] - This is the status of the
+ * mbuf that has been received.
+ * @param rxUserId @ref IxHssAccPktUserId [in] - This is the client supplied value
+ * passed in at ixHssAccPktPortConnect time which is now returned to the client.
+ *
+ * @return void
+ */
+typedef void (*IxHssAccPktRxCallback) (IX_OSAL_MBUF *buffer,
+ unsigned numHssErrs,
+ IxHssAccPktStatus pktStatus,
+ IxHssAccPktUserId rxUserId);
+
+/**
+ * @typedef IxHssAccPktRxFreeLowCallback
+ * @brief Prototype of the clients function to accept notification of
+ * requirement of more Rx Free buffers
+ *
+ * The client can choose to register a callback of this type when
+ * calling a connecting. This function is registered through the ixHssAccPktPortConnect.
+ * If defined, the access layer will provide the trigger for
+ * this callback. The callback will be responsible for supplying mbufs to
+ * the access layer for use on the receive path from the HSS using
+ * ixHssPktAccFreeBufReplenish.
+ *
+ * @return void
+ */
+typedef void (*IxHssAccPktRxFreeLowCallback) (IxHssAccPktUserId rxFreeLowUserId);
+
+/**
+ * @typedef IxHssAccPktTxDoneCallback
+ * @brief Prototype of the clients function to accept notification of
+ * completion with Tx buffers
+ *
+ * This function is registered through the ixHssAccPktPortConnect. It enables
+ * the hssPktAcc to pass buffers back to the client
+ * when transmission is complete.
+ *
+ * @param *buffer @ref IX_OSAL_MBUF [in] - This is the mbuf which contained
+ * the payload that was for Tx.
+ * @param numHssErrs unsigned [in] - This is the number of hssErrors
+ * the Npe has received
+ * @param pktStatus @ref IxHssAccPktStatus [in] - This is the status of the
+ * mbuf that has been transmitted.
+ * @param txDoneUserId @ref IxHssAccPktUserId [in] - This is the client supplied value
+ * passed in at ixHssAccPktPortConnect time which is now returned to the client.
+ *
+ * @return void
+ */
+typedef void (*IxHssAccPktTxDoneCallback) (IX_OSAL_MBUF *buffer,
+ unsigned numHssErrs,
+ IxHssAccPktStatus pktStatus,
+ IxHssAccPktUserId txDoneUserId);
+
+/**
+ * @typedef IxHssAccChanRxCallback
+ * @brief Prototype of the clients function to accept notification of
+ * channelised rx
+ *
+ * This callback, if defined by the client in the connect, will get called
+ * in the context of an IRQ. The IRQ will be triggered when the hssSyncQMQ
+ * is not empty. The queued entry will be dequeued and this function will
+ * be executed.
+ *
+ * @param hssPortId @ref IxHssAccHssPort - The HSS port Id. There are two
+ * identical ports (0-1).
+ * @param txOffset unsigned [in] - an offset indicating from where within
+ * the txPtrList the NPE is currently transmitting from.
+ * @param rxOffset unsigned [in] - an offset indicating where within the
+ * receive buffers the NPE has just written the received data to.
+ * @param numHssErrs unsigned [in] - This is the number of hssErrors
+ * the Npe has received
+ *
+ * @return void
+ */
+typedef void (*IxHssAccChanRxCallback) (IxHssAccHssPort hssPortId,
+ unsigned rxOffset,
+ unsigned txOffset,
+ unsigned numHssErrs);
+
+/*
+ * Prototypes for interface functions.
+ */
+
+/**
+ *
+ * @ingroup IxHssAccAPI
+ *
+ * @fn IX_STATUS ixHssAccPortInit (IxHssAccHssPort hssPortId,
+ IxHssAccConfigParams *configParams,
+ IxHssAccTdmSlotUsage *tdmMap,
+ IxHssAccLastErrorCallback lastHssErrorCallback)
+ *
+ * @brief Initialise a HSS port. No channelised or packetised connections
+ * should exist in the HssAccess layer while this interface is being called.
+ *
+ * @param hssPortId @ref IxHssAccHssPort [in] - The HSS port Id. There are two
+ * identical ports (0-1).
+ * @param *configParams @ref IxHssAccConfigParams [in] - A pointer to the HSS
+ * configuration structure
+ * @param *tdmMap @ref IxHssAccTdmSlotUsage [in] - A pointer to an array of size
+ * IX_HSSACC_TSLOTS_PER_HSS_PORT, defining the slot usage over the HSS port
+ * @param lastHssErrorCallback @ref IxHssAccLastErrorCallback [in] - Client
+ * callback to report last error
+ *
+ * @return
+ * - IX_SUCCESS The function executed successfully
+ * - IX_FAIL The function did not execute successfully
+ * - IX_HSSACC_PARAM_ERR The function did not execute successfully due to a
+ * parameter error
+ */
+PUBLIC IX_STATUS
+ixHssAccPortInit (IxHssAccHssPort hssPortId,
+ IxHssAccConfigParams *configParams,
+ IxHssAccTdmSlotUsage *tdmMap,
+ IxHssAccLastErrorCallback lastHssErrorCallback);
+
+/**
+ *
+ * @ingroup IxHssAccAPI
+ *
+ * @fn IX_STATUS ixHssAccLastErrorRetrievalInitiate (
+ IxHssAccHssPort hssPortId)
+ *
+ * @brief Initiate the retrieval of the last HSS error. The HSS port
+ * should be configured before attempting to call this interface.
+ *
+ * @param hssPortId @ref IxHssAccHssPort [in] - the HSS port ID
+ *
+ * @return
+ * - IX_SUCCESS The function executed successfully
+ * - IX_FAIL The function did not execute successfully
+ * - IX_HSSACC_PARAM_ERR The function did not execute successfully due to a
+ * parameter error
+ */
+PUBLIC IX_STATUS
+ixHssAccLastErrorRetrievalInitiate (IxHssAccHssPort hssPortId);
+
+
+/**
+ *
+ * @ingroup IxHssAccAPI
+ *
+ * @fn IX_STATUS ixHssAccInit ()
+ *
+ * @brief This function is responsible for initialising resources for use
+ * by the packetised and channelised clients. It should be called after
+ * HSS NPE image has been downloaded into NPE-A and before any other
+ * HssAccess interface is called.
+ * No other HssAccPacketised interface should be called while this interface
+ * is being processed.
+ *
+ * @return
+ * - IX_SUCCESS The function executed successfully
+ * - IX_FAIL The function did not execute successfully
+ * - IX_HSSACC_RESOURCE_ERR The function did not execute successfully due
+ * to a resource error
+ */
+PUBLIC IX_STATUS
+ixHssAccInit (void);
+
+
+/**
+ *
+ * @ingroup IxHssAccAPI
+ *
+ * @fn ixHssAccPktPortConnect (IxHssAccHssPort hssPortId,
+ IxHssAccHdlcPort hdlcPortId,
+ BOOL hdlcFraming,
+ IxHssAccHdlcMode hdlcMode,
+ BOOL hdlcBitInvert,
+ unsigned blockSizeInWords,
+ UINT32 rawIdleBlockPattern,
+ IxHssAccPktHdlcFraming hdlcTxFraming,
+ IxHssAccPktHdlcFraming hdlcRxFraming,
+ unsigned frmFlagStart,
+ IxHssAccPktRxCallback rxCallback,
+ IxHssAccPktUserId rxUserId,
+ IxHssAccPktRxFreeLowCallback rxFreeLowCallback,
+ IxHssAccPktUserId rxFreeLowUserId,
+ IxHssAccPktTxDoneCallback txDoneCallback,
+ IxHssAccPktUserId txDoneUserId)
+ *
+ * @brief This function is responsible for connecting a client to one of
+ * the 4 available HDLC ports. The HSS port should be configured before
+ * attempting a connect. No other HssAccPacketised interface should be
+ * called while this connect is being processed.
+ *
+ * @param hssPortId @ref IxHssAccHssPort [in] - The HSS port Id. There are two
+ * identical ports (0-1).
+ * @param hdlcPortId @ref IxHssAccHdlcPort [in] - This is the number of the HDLC port and
+ * it corresponds to the physical E1/T1 trunk i.e. 0, 1, 2, 3
+ * @param hdlcFraming BOOL [in] - This value determines whether the service
+ * will use HDLC data or the debug, raw data type i.e. no HDLC processing
+ * @param hdlcMode @ref IxHssAccHdlcMode [in] - This structure contains 56Kbps, HDLC-mode
+ * configuration parameters
+ * @param hdlcBitInvert BOOL [in] - This value determines whether bit inversion
+ * will occur between HDLC and HSS co-processors i.e. post-HDLC processing for
+ * transmit and pre-HDLC processing for receive, for the specified HDLC Termination
+ * Point
+ * @param blockSizeInWords unsigned [in] - The max tx/rx block size
+ * @param rawIdleBlockPattern UINT32 [in] - Tx idle pattern in raw mode
+ * @param hdlcTxFraming @ref IxHssAccPktHdlcFraming [in] - This structure contains
+ * the following information required by the NPE to configure the HDLC
+ * co-processor for TX
+ * @param hdlcRxFraming @ref IxHssAccPktHdlcFraming [in] - This structure contains
+ * the following information required by the NPE to configure the HDLC
+ * co-processor for RX
+ * @param frmFlagStart unsigned - Number of flags to precede to
+ * transmitted flags (0-2).
+ * @param rxCallback @ref IxHssAccPktRxCallback [in] - Pointer to
+ * the clients packet receive function.
+ * @param rxUserId @ref IxHssAccPktUserId [in] - The client supplied rx value
+ * to be passed back as an argument to the supplied rxCallback
+ * @param rxFreeLowCallback @ref IxHssAccPktRxFreeLowCallback [in] - Pointer to
+ * the clients Rx free buffer request function. If NULL, assume client will
+ * trigger independently.
+ * @param rxFreeLowUserId @ref IxHssAccPktUserId [in] - The client supplied RxFreeLow value
+ * to be passed back as an argument to the supplied rxFreeLowCallback
+ * @param txDoneCallback @ref IxHssAccPktTxDoneCallback [in] - Pointer to the
+ * clients Tx done callback function
+ * @param txDoneUserId @ref IxHssAccPktUserId [in] - The client supplied txDone value
+ * to be passed back as an argument to the supplied txDoneCallback
+ *
+ * @return
+ * - IX_SUCCESS The function executed successfully
+ * - IX_FAIL The function did not execute successfully
+ * - IX_HSSACC_PARAM_ERR The function did not execute successfully due to a
+ * parameter error
+ * - IX_HSSACC_RESOURCE_ERR The function did not execute successfully due
+ * to a resource error
+ */
+PUBLIC IX_STATUS
+ixHssAccPktPortConnect (IxHssAccHssPort hssPortId,
+ IxHssAccHdlcPort hdlcPortId,
+ BOOL hdlcFraming,
+ IxHssAccHdlcMode hdlcMode,
+ BOOL hdlcBitInvert,
+ unsigned blockSizeInWords,
+ UINT32 rawIdleBlockPattern,
+ IxHssAccPktHdlcFraming hdlcTxFraming,
+ IxHssAccPktHdlcFraming hdlcRxFraming,
+ unsigned frmFlagStart,
+ IxHssAccPktRxCallback rxCallback,
+ IxHssAccPktUserId rxUserId,
+ IxHssAccPktRxFreeLowCallback rxFreeLowCallback,
+ IxHssAccPktUserId rxFreeLowUserId,
+ IxHssAccPktTxDoneCallback txDoneCallback,
+ IxHssAccPktUserId txDoneUserId);
+
+/**
+ *
+ * @ingroup IxHssAccAPI
+ *
+ * @fn IX_STATUS ixHssAccPktPortEnable (IxHssAccHssPort hssPortId,
+ IxHssAccHdlcPort hdlcPortId)
+ *
+ * @brief This function is responsible for enabling a packetised service
+ * for the specified HSS/HDLC port combination. It enables the RX flow. The
+ * client must have already connected to a packetised service and is responsible
+ * for ensuring an adequate amount of RX mbufs have been supplied to the access
+ * component before enabling the packetised service. This function must be called
+ * on a given port before any call to ixHssAccPktPortTx on the same port.
+ * No other HssAccPacketised interface should be called while this interface is
+ * being processed.
+ *
+ * @param hssPortId @ref IxHssAccHssPort [in] - The HSS port Id. There are two
+ * identical ports (0-1).
+ * @param hdlcPortId @ref IxHssAccHdlcPort [in] - The port id (0,1,2,3) to enable the service
+ * on.
+ *
+ * @return
+ * - IX_SUCCESS The function executed successfully
+ * - IX_FAIL The function did not execute successfully
+ * - IX_HSSACC_PARAM_ERR The function did not execute successfully due to a
+ * parameter error
+ */
+PUBLIC IX_STATUS
+ixHssAccPktPortEnable (IxHssAccHssPort hssPortId,
+ IxHssAccHdlcPort hdlcPortId);
+
+/**
+ * @fn IX_STATUS ixHssAccPktPortDisable (IxHssAccHssPort hssPortId,
+ IxHssAccHdlcPort hdlcPortId)
+ *
+ * @brief This function is responsible for disabling a packetised service
+ * for the specified HSS/HDLC port combination. It disables the RX flow.
+ * The client must have already connected to and enabled a packetised service
+ * for the specified HDLC port. This disable interface can be called before a
+ * disconnect, but is not required to.
+ *
+ * @param hssPortId @ref IxHssAccHssPort [in] - The HSS port Id. There are two
+ * identical ports (0-1).
+ * @param hdlcPortId @ref IxHssAccHdlcPort [in] - The port id (0,1,2,3) to disable
+ * the service on.
+ *
+ * @return
+ * - IX_SUCCESS The function executed successfully
+ * - IX_FAIL The function did not execute successfully
+ * - IX_HSSACC_PARAM_ERR The function did not execute successfully due to a
+ * parameter error
+ */
+PUBLIC IX_STATUS
+ixHssAccPktPortDisable (IxHssAccHssPort hssPortId,
+ IxHssAccHdlcPort hdlcPortId);
+
+/**
+ *
+ * @ingroup IxHssAccAPI
+ *
+ * @fn IX_STATUS ixHssAccPktPortDisconnect (IxHssAccHssPort hssPortId,
+ IxHssAccHdlcPort hdlcPortId)
+ *
+ * @brief This function is responsible for disconnecting a client from one
+ * of the 4 available HDLC ports. It is not required that the Rx Flow
+ * has been disabled before calling this function. If the RX Flow has not been
+ * disabled, the disconnect will disable it before proceeding with the
+ * disconnect. No other HssAccPacketised
+ * interface should be called while this interface is being processed.
+ *
+ * @param hssPortId @ref IxHssAccHssPort [in] - The HSS port Id. There are two
+ * identical ports (0-1).
+ * @param hdlcPortId @ref IxHssAccHdlcPort [in] - This is the number of the HDLC port
+ * to disconnect and it corresponds to the physical E1/T1 trunk i.e. 0, 1, 2, 3
+ *
+ * @return
+ * - IX_SUCCESS The function executed successfully
+ * - IX_FAIL The function did not execute successfully
+ * - IX_HSSACC_PKT_DISCONNECTING The function has initiated the disconnecting
+ * procedure but it has not completed yet.
+ */
+PUBLIC IX_STATUS
+ixHssAccPktPortDisconnect (IxHssAccHssPort hssPortId,
+ IxHssAccHdlcPort hdlcPortId);
+
+/**
+ *
+ * @ingroup IxHssAccAPI
+ *
+ * @fn BOOL ixHssAccPktPortIsDisconnectComplete (IxHssAccHssPort hssPortId,
+ IxHssAccHdlcPort hdlcPortId)
+ *
+ * @brief This function is called to check if a given HSS/HDLC port
+ * combination is in a connected state or not. This function may be called
+ * at any time to determine a ports state. No other HssAccPacketised
+ * interface should be called while this interface is being processed.
+ *
+ * @param hssPortId @ref IxHssAccHssPort [in] - The HSS port Id. There are two
+ * identical ports (0-1).
+ * @param hdlcPortId @ref IxHssAccHdlcPort [in] - This is the number of the HDLC port
+ * to disconnect and it corresponds to the physical E1/T1 trunk i.e. 0, 1, 2, 3
+ *
+ * @return
+ * - TRUE The state of this HSS/HDLC port combination is disconnected,
+ * so if a disconnect was called, it is now completed.
+ * - FALSE The state of this HSS/HDLC port combination is connected,
+ * so if a disconnect was called, it is not yet completed.
+ */
+PUBLIC BOOL
+ixHssAccPktPortIsDisconnectComplete (IxHssAccHssPort hssPortId,
+ IxHssAccHdlcPort hdlcPortId);
+
+
+/**
+ *
+ * @ingroup IxHssAccAPI
+ *
+ * @fn IX_STATUS ixHssAccPktPortRxFreeReplenish (IxHssAccHssPort hssPortId,
+ IxHssAccHdlcPort hdlcPortId,
+ IX_OSAL_MBUF *buffer)
+ *
+ * @brief Function which the client calls at regular intervals to provide
+ * mbufs to the access component for RX. A connection should exist for
+ * the specified hssPortId/hdlcPortId combination before attempting to call this
+ * interface. Also, the connection should not be in a disconnecting state.
+ *
+ * @param hssPortId @ref IxHssAccHssPort [in] - The HSS port Id. There are two
+ * identical ports (0-1).
+ * @param hdlcPortId @ref IxHssAccHdlcPort [in] - This is the number of the HDLC port
+ * and it corresponds to the physical E1/T1 trunk i.e. 0, 1, 2, 3
+ * @param *buffer @ref IX_OSAL_MBUF [in] - A pointer to a free mbuf to filled with payload.
+ *
+ * @return
+ * - IX_SUCCESS The function executed successfully
+ * - IX_FAIL The function did not execute successfully
+ * - IX_HSSACC_PARAM_ERR The function did not execute successfully due to a
+ * parameter error
+ * - IX_HSSACC_RESOURCE_ERR The function did not execute successfully due
+ * to a resource error
+ * - IX_HSSACC_Q_WRITE_OVERFLOW The function did not succeed due to a Q
+ * overflow
+ */
+PUBLIC IX_STATUS
+ixHssAccPktPortRxFreeReplenish (IxHssAccHssPort hssPortId,
+ IxHssAccHdlcPort hdlcPortId,
+ IX_OSAL_MBUF *buffer);
+
+/**
+ *
+ * @ingroup IxHssAccAPI
+ *
+ * @fn IX_STATUS ixHssAccPktPortTx (IxHssAccHssPort hssPortId,
+ IxHssAccHdlcPort hdlcPortId,
+ IX_OSAL_MBUF *buffer)
+ *
+ * @brief Function which the client calls when it wants to transmit
+ * packetised data. An enabled connection should exist on the specified
+ * hssPortId/hdlcPortId combination before attempting to call this interface.
+ * No other HssAccPacketised
+ * interface should be called while this interface is being processed.
+ *
+ * @param hssPortId @ref IxHssAccHssPort [in] - The HSS port Id. There are two
+ * identical ports (0-1).
+ * @param hdlcPortId @ref IxHssAccHdlcPort [in] - This is the number of the HDLC port
+ * and it corresponds to the physical E1/T1 trunk i.e. 0, 1, 2, 3
+ * @param *buffer @ref IX_OSAL_MBUF [in] - A pointer to a chain of mbufs which the
+ * client has filled with the payload
+ *
+ * @return
+ * - IX_SUCCESS The function executed successfully
+ * - IX_FAIL The function did not execute successfully
+ * - IX_HSSACC_PARAM_ERR The function did not execute successfully due to a
+ * parameter error
+ * - IX_HSSACC_RESOURCE_ERR The function did not execute successfully due
+ * to a resource error. See note.
+ * - IX_HSSACC_Q_WRITE_OVERFLOW The function did not succeed due to a Q
+ * overflow
+ *
+ * @note IX_HSSACC_RESOURCE_ERR is returned when a free descriptor cannot be
+ * obtained to send the chain of mbufs to the NPE. This is a normal scenario.
+ * HssAcc has a pool of descriptors and this error means that they are currently
+ * all in use.
+ * The recommended approach to this is to retry until a descriptor becomes free
+ * and the packet is successfully transmitted.
+ * Alternatively, the user could wait until the next IxHssAccPktTxDoneCallback
+ * callback is triggered, and then retry, as it is this event that causes a
+ * transmit descriptor to be freed.
+ */
+PUBLIC IX_STATUS
+ixHssAccPktPortTx (IxHssAccHssPort hssPortId,
+ IxHssAccHdlcPort hdlcPortId,
+ IX_OSAL_MBUF *buffer);
+
+/**
+ *
+ * @ingroup IxHssAccAPI
+ *
+ * @fn IX_STATUS ixHssAccChanConnect (IxHssAccHssPort hssPortId,
+ unsigned bytesPerTSTrigger,
+ UINT8 *rxCircular,
+ unsigned numRxBytesPerTS,
+ UINT32 *txPtrList,
+ unsigned numTxPtrLists,
+ unsigned numTxBytesPerBlk,
+ IxHssAccChanRxCallback rxCallback)
+ *
+ * @brief This function allows the client to connect to the Tx/Rx NPE
+ * Channelised Service. There can only be one client per HSS port. The
+ * client is responsible for ensuring that the HSS port is configured
+ * appropriately before its connect request. No other HssAccChannelised
+ * interface should be called while this interface is being processed.
+ *
+ * @param hssPortId @ref IxHssAccHssPort [in] - The HSS port Id. There are two
+ * identical ports (0-1).
+ * @param bytesPerTSTrigger unsigned [in] - The NPE will trigger the access
+ * component after bytesPerTSTrigger have been received for all trunk
+ * timeslots. This figure is a multiple of 8 e.g. 8 for 1ms trigger, 16 for
+ * 2ms trigger.
+ * @param *rxCircular UINT8 [in] - A pointer to memory allocated by the
+ * client to be filled by data received. The buffer at this address is part
+ * of a pool of buffers to be accessed in a circular fashion. This address
+ * will be written to by the NPE. Therefore, it needs to be a physical address.
+ * @param numRxBytesPerTS unsigned [in] - The number of bytes allocated per
+ * timeslot within the receive memory. This figure will depend on the
+ * latency of the system. It needs to be deep enough for data to be read by
+ * the client before the NPE re-writes over that memory e.g. if the client
+ * samples at a rate of 40bytes per timeslot, numRxBytesPerTS may need to
+ * be 40bytes * 3. This would give the client 3 * 5ms of time before
+ * received data is over-written.
+ * @param *txPtrList UINT32 [in] - The address of an area of contiguous
+ * memory allocated by the client to be populated with pointers to data for
+ * transmission. Each pointer list contains a pointer per active channel.
+ * The txPtrs will point to data to be transmitted by the NPE. Therefore,
+ * they must point to physical addresses.
+ * @param numTxPtrLists unsigned [in] - The number of pointer lists in
+ * txPtrList. This figure is dependent on jitter.
+ * @param numTxBytesPerBlk unsigned [in] - The size of the Tx data, in
+ * bytes, that each pointer within the PtrList points to.
+ * @param rxCallback @ref IxHssAccChanRxCallback [in] - A client function
+ * pointer to be called back to handle the actual tx/rx of channelised
+ * data. If this is not NULL, an ISR will call this function. If this
+ * pointer is NULL, it implies that the client will use a polling mechanism
+ * to detect when the tx and rx of channelised data is to occur. The client
+ * will use hssChanAccStatus for this.
+ *
+ * @return
+ * - IX_SUCCESS The function executed successfully
+ * - IX_FAIL The function did not execute successfully
+ * - IX_HSSACC_PARAM_ERR The function did not execute successfully due to a
+ * parameter error
+ */
+
+PUBLIC IX_STATUS
+ixHssAccChanConnect (IxHssAccHssPort hssPortId,
+ unsigned bytesPerTSTrigger,
+ UINT8 *rxCircular,
+ unsigned numRxBytesPerTS,
+ UINT32 *txPtrList,
+ unsigned numTxPtrLists,
+ unsigned numTxBytesPerBlk,
+ IxHssAccChanRxCallback rxCallback);
+
+/**
+ *
+ * @ingroup IxHssAccAPI
+ *
+ * @fn IX_STATUS ixHssAccChanPortEnable (IxHssAccHssPort hssPortId)
+ *
+ * @brief This function is responsible for enabling a channelised service
+ * for the specified HSS port. It enables the NPE RX flow. The client must
+ * have already connected to a channelised service before enabling the
+ * channelised service. No other HssAccChannelised
+ * interface should be called while this interface is being processed.
+ *
+ * @param hssPortId @ref IxHssAccHssPort [in] - The HSS port Id. There are two
+ * identical ports (0-1).
+ *
+ * @return
+ * - IX_SUCCESS The function executed successfully
+ * - IX_FAIL The function did not execute successfully
+ * - IX_HSSACC_PARAM_ERR The function did not execute successfully due to a
+ * parameter error
+ */
+PUBLIC IX_STATUS
+ixHssAccChanPortEnable (IxHssAccHssPort hssPortId);
+
+/**
+ *
+ * @ingroup IxHssAccAPI
+ *
+ * @fn IX_STATUS ixHssAccChanPortDisable (IxHssAccHssPort hssPortId)
+ *
+ * @brief This function is responsible for disabling a channelised service
+ * for the specified HSS port. It disables the NPE RX flow. The client must
+ * have already connected to and enabled a channelised service for the
+ * specified HSS port. This disable interface can be called before a
+ * disconnect, but is not required to. No other HssAccChannelised
+ * interface should be called while this interface is being processed.
+ *
+ * @param hssPortId @ref IxHssAccHssPort [in] - The HSS port Id. There are two
+ * identical ports (0-1).
+ *
+ * @return
+ * - IX_SUCCESS The function executed successfully
+ * - IX_FAIL The function did not execute successfully
+ * - IX_HSSACC_PARAM_ERR The function did not execute successfully due to a
+ * parameter error
+ */
+PUBLIC IX_STATUS
+ixHssAccChanPortDisable (IxHssAccHssPort hssPortId);
+
+/**
+ *
+ * @ingroup IxHssAccAPI
+ *
+ * @fn IX_STATUS ixHssAccChanDisconnect (IxHssAccHssPort hssPortId)
+ *
+ * @brief This function allows the client to Disconnect from a channelised
+ * service. If the NPE RX Flow has not been disabled, the disconnect will
+ * disable it before proceeding with other disconnect functionality.
+ * No other HssAccChannelised interface should be called while this
+ * interface is being processed.
+ *
+ * @param hssPortId @ref IxHssAccHssPort [in] - The HSS port Id. There are two
+ * identical ports (0-1).
+ *
+ * @return
+ * - IX_SUCCESS The function executed successfully
+ * - IX_FAIL The function did not execute successfully
+ * - IX_HSSACC_PARAM_ERR The function did not execute successfully due to a
+ * parameter error
+ */
+PUBLIC IX_STATUS
+ixHssAccChanDisconnect (IxHssAccHssPort hssPortId);
+
+/**
+ *
+ * @ingroup IxHssAccAPI
+ *
+ * @fn IX_STATUS ixHssAccChanStatusQuery (IxHssAccHssPort hssPortId,
+ BOOL *dataRecvd,
+ unsigned *rxOffset,
+ unsigned *txOffset,
+ unsigned *numHssErrs)
+ *
+ * @brief This function is called by the client to query whether or not
+ * channelised data has been received. If there is, hssChanAcc will return
+ * the details in the output parameters. An enabled connection should
+ * exist on the specified hssPortId before attempting to call this interface.
+ * No other HssAccChannelised interface should be called while this
+ * interface is being processed.
+ *
+ * @param hssPortId @ref IxHssAccHssPort [in] - The HSS port Id. There are two
+ * identical ports (0-1).
+ * @param *dataRecvd BOOL [out] - This BOOL indicates to the client whether
+ * or not the access component has read any data for the client. If
+ * FALSE, the other output parameters will not have been written to.
+ * @param *rxOffset unsigned [out] - An offset to indicate to the client
+ * where within the receive buffers the NPE has just written the received
+ * data to.
+ * @param *txOffset unsigned [out] - An offset to indicate to the client
+ * from where within the txPtrList the NPE is currently transmitting from
+ * @param *numHssErrs unsigned [out] - The total number of HSS port errors
+ * since initial port configuration
+ *
+ *
+ * @return
+ * - IX_SUCCESS The function executed successfully
+ * - IX_FAIL The function did not execute successfully
+ * - IX_HSSACC_PARAM_ERR The function did not execute successfully due to a
+ * parameter error
+ */
+PUBLIC IX_STATUS
+ixHssAccChanStatusQuery (IxHssAccHssPort hssPortId,
+ BOOL *dataRecvd,
+ unsigned *rxOffset,
+ unsigned *txOffset,
+ unsigned *numHssErrs);
+
+/**
+ *
+ * @ingroup IxHssAccAPI
+ *
+ * @fn void ixHssAccShow (void)
+ *
+ * @brief This function will display the current state of the IxHssAcc
+ * component. The output is sent to stdout.
+ *
+ * @return void
+ */
+PUBLIC void
+ixHssAccShow (void);
+
+/**
+ *
+ * @ingroup IxHssAccAPI
+ *
+ * @fn void ixHssAccStatsInit (void)
+ *
+ * @brief This function will reset the IxHssAcc statistics.
+ *
+ * @return void
+ */
+PUBLIC void
+ixHssAccStatsInit (void);
+
+#endif /* IXHSSACC_H */
+
+/**
+ * @} defgroup IxHssAcc
+ */
diff --git a/cpu/ixp/npe/include/IxI2cDrv.h b/cpu/ixp/npe/include/IxI2cDrv.h
new file mode 100644
index 0000000000..2472f31a71
--- /dev/null
+++ b/cpu/ixp/npe/include/IxI2cDrv.h
@@ -0,0 +1,867 @@
+/**
+ * @file IxI2cDrv.h
+ *
+ * @brief Header file for the IXP400 I2C Driver (IxI2cDrv)
+ *
+ * @version $Revision: 0.1 $
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+/**
+ * @defgroup IxI2cDrv IXP400 I2C Driver(IxI2cDrv) API
+ *
+ * @brief IXP400 I2C Driver Public API
+ *
+ * @{
+ */
+#ifndef IXI2CDRV_H
+#define IXI2CDRV_H
+
+#ifdef __ixp46X
+#include "IxOsal.h"
+
+/*
+ * Section for #define
+ */
+
+/**
+ * @ingroup IxI2cDrv
+ * @brief The interval of micro/mili seconds the IXP will wait before it polls for
+ * status from the ixI2cIntrXferStatus; Every 20us is 1 byte @
+ * 400Kbps and 4 bytes @ 100Kbps. This is dependent on delay type selected
+ * through the API ixI2cDrvDelayTypeSelect.
+ */
+#define IX_I2C_US_POLL_FOR_XFER_STATUS 20
+
+/**
+ * @ingroup IxI2cDrv
+ * @brief The number of tries that will be attempted to call a callback
+ * function if the callback does not or is unable to resolve the
+ * issue it is called to resolve
+ */
+#define IX_I2C_NUM_OF_TRIES_TO_CALL_CALLBACK_FUNC 10
+
+
+/**
+ * @ingroup IxI2cDrv
+ * @brief Number of tries slave will poll the IDBR Rx full bit before it
+ * gives up
+ */
+#define IX_I2C_NUM_TO_POLL_IDBR_RX_FULL 0x100
+
+/**
+ * @ingroup IxI2cDrv
+ * @brief Number of tries slave will poll the IDBR Tx empty bit before it
+ * gives up
+ */
+#define IX_I2C_NUM_TO_POLL_IDBR_TX_EMPTY 0x100
+
+/*
+ * Section for enum
+ */
+
+/**
+ * @ingroup IxI2cDrv
+ *
+ * @enum IxI2cMasterStatus
+ *
+ * @brief The master status - transfer complete, bus error or arbitration loss
+ */
+typedef enum
+{
+ IX_I2C_MASTER_XFER_COMPLETE = IX_SUCCESS,
+ IX_I2C_MASTER_XFER_BUS_ERROR,
+ IX_I2C_MASTER_XFER_ARB_LOSS
+} IxI2cMasterStatus;
+
+
+/**
+ * @ingroup IxI2cDrv
+ *
+ * @enum IX_I2C_STATUS
+ *
+ * @brief The status that can be returned in a I2C driver initialization
+ */
+typedef enum
+{
+ IX_I2C_SUCCESS = IX_SUCCESS, /**< Success status */
+ IX_I2C_FAIL, /**< Fail status */
+ IX_I2C_NOT_SUPPORTED, /**< hardware does not have dedicated I2C hardware */
+ IX_I2C_NULL_POINTER, /**< parameter passed in is NULL */
+ IX_I2C_INVALID_SPEED_MODE_ENUM_VALUE, /**< speed mode selected is invalid */
+ IX_I2C_INVALID_FLOW_MODE_ENUM_VALUE, /**< flow mode selected is invalid */
+ IX_I2C_SLAVE_ADDR_CB_MISSING, /**< slave callback is NULL */
+ IX_I2C_GEN_CALL_CB_MISSING, /**< general callback is NULL */
+ IX_I2C_INVALID_SLAVE_ADDR, /**< invalid slave address specified */
+ IX_I2C_INT_BIND_FAIL, /**< interrupt bind fail */
+ IX_I2C_INT_UNBIND_FAIL, /**< interrupt unbind fail */
+ IX_I2C_NOT_INIT, /**< I2C is not initialized yet */
+ IX_I2C_MASTER_BUS_BUSY, /**< master detected a I2C bus busy */
+ IX_I2C_MASTER_ARB_LOSS, /**< master experienced arbitration loss */
+ IX_I2C_MASTER_XFER_ERROR, /**< master experienced a transfer error */
+ IX_I2C_MASTER_BUS_ERROR, /**< master detected a I2C bus error */
+ IX_I2C_MASTER_NO_BUFFER, /**< no buffer provided for master transfer */
+ IX_I2C_MASTER_INVALID_XFER_MODE, /**< xfer mode selected is invalid */
+ IX_I2C_SLAVE_ADDR_NOT_DETECTED, /**< polled slave addr not detected */
+ IX_I2C_GEN_CALL_ADDR_DETECTED, /**< polling detected general call */
+ IX_I2C_SLAVE_READ_DETECTED, /**< polling detected slave read request */
+ IX_I2C_SLAVE_WRITE_DETECTED, /**< polling detected slave write request */
+ IX_I2C_SLAVE_NO_BUFFER, /**< no buffer provided for slave transfers */
+ IX_I2C_DATA_SIZE_ZERO, /**< data size transfer is zero - invalid */
+ IX_I2C_SLAVE_WRITE_BUFFER_EMPTY, /**< slave buffer is used till empty */
+ IX_I2C_SLAVE_WRITE_ERROR, /**< slave write experienced an error */
+ IX_I2C_SLAVE_OR_GEN_READ_BUFFER_FULL, /**< slave buffer is filled up */
+ IX_I2C_SLAVE_OR_GEN_READ_ERROR /**< slave read experienced an error */
+} IX_I2C_STATUS;
+
+/**
+ * @ingroup IxI2cDrv
+ *
+ * @enum IxI2cSpeedMode
+ *
+ * @brief Type of speed modes supported by the I2C hardware.
+ */
+typedef enum
+{
+ IX_I2C_NORMAL_MODE = 0x0,
+ IX_I2C_FAST_MODE
+} IxI2cSpeedMode;
+
+/**
+ * @ingroup IxI2cDrv
+ *
+ * @enum IxI2cXferMode
+ *
+ * @brief Used for indicating it is a repeated start or normal transfer
+ */
+typedef enum
+{
+ IX_I2C_NORMAL = 0x0,
+ IX_I2C_REPEATED_START
+} IxI2cXferMode;
+
+/**
+ * @ingroup IxI2cDrv
+ *
+ * @enum IxI2cFlowMode
+ *
+ * @brief Used for indicating it is a poll or interrupt mode
+ */
+typedef enum
+{
+ IX_I2C_POLL_MODE = 0x0,
+ IX_I2C_INTERRUPT_MODE
+} IxI2cFlowMode;
+
+/**
+ * @ingroup IxI2cDrv
+ *
+ * @enum IxI2cDelayMode
+ *
+ * @brief Used for selecting looping delay or OS scheduler delay
+ */
+typedef enum
+{
+ IX_I2C_LOOP_DELAY = 1, /**< delay in microseconds */
+ IX_I2C_SCHED_DELAY /**< delay in miliseconds */
+} IxI2cDelayMode;
+
+/**
+ * @ingroup IxI2cDrv
+ *
+ * @brief The pointer to the function that will be called when the master
+ * has completed its receive. The parameter that is passed will
+ * provide the status of the read (success, arb loss, or bus
+ * error), the transfer mode (normal or repeated start, the
+ * buffer pointer and number of bytes transferred.
+ */
+typedef void (*IxI2cMasterReadCallbackP)(IxI2cMasterStatus, IxI2cXferMode, char*, UINT32);
+
+/**
+ * @ingroup IxI2cDrv
+ *
+ * @brief The pointer to the function that will be called when the master
+ * has completed its transmit. The parameter that is passed will
+ * provide the status of the write (success, arb loss, or buss
+ * error), the transfer mode (normal or repeated start), the
+ * buffer pointer and number of bytes transferred.
+ */
+typedef void (*IxI2cMasterWriteCallbackP)(IxI2cMasterStatus, IxI2cXferMode, char*, UINT32);
+
+/**
+ * @ingroup IxI2cDrv
+ *
+ * @brief The pointer to the function that will be called when a slave
+ * address detected in interrupt mode for a read. The parameters
+ * that is passed will provide the read status, buffer pointer,
+ * buffer size, and the bytes received. When a start of a read
+ * is initiated there will be no buffer allocated and this callback
+ * will be called to request for a buffer. While receiving, if the
+ * buffer gets filled, this callback will be called to request for
+ * a new buffer while sending the filled buffer's pointer and size,
+ * and data size received. When the receive is complete, this
+ * callback will be called to process the data and free the memory
+ * by passing the buffer's pointer and size, and data size received.
+ */
+typedef void (*IxI2cSlaveReadCallbackP)(IX_I2C_STATUS, char*, UINT32, UINT32);
+
+/**
+ * @ingroup IxI2cDrv
+ *
+ * @brief The pointer to the function that will be called when a slave
+ * address detected in interrupt mode for a write. The parameters
+ * that is passed will provide the write status, buffer pointer,
+ * buffer size, and the bytes received. When a start of a write is
+ * initiated there will be no buffer allocated and this callback
+ * will be called to request for a buffer and to fill it with data.
+ * While transmitting, if the data in the buffer empties, this
+ * callback will be called to request for more data to be filled in
+ * the same or new buffer. When the transmit is complete, this
+ * callback will be called to free the memory or other actions to
+ * be taken.
+ */
+typedef void (*IxI2cSlaveWriteCallbackP)(IX_I2C_STATUS, char*, UINT32, UINT32);
+
+/**
+ * @ingroup IxI2cDrv
+ *
+ * @brief The pointer to the function that will be called when a general
+ * call detected in interrupt mode for a read. The parameters that
+ * is passed will provide the read status, buffer pointer, buffer
+ * size, and the bytes received. When a start of a read is
+ * initiated there will be no buffer allocated and this callback
+ * will be called to request for a buffer. While receiving, if the
+ * buffer gets filled, this callback will be called to request for
+ * a new buffer while sending the filled buffer's pointer and size,
+ * and data size received. When the receive is complete, this
+ * callback will be called to process the data and free the memory
+ * by passing the buffer's pointer and size, and data size received.
+ */
+typedef void (*IxI2cGenCallCallbackP)(IX_I2C_STATUS, char*, UINT32, UINT32);
+
+/*
+ * Section for struct
+ */
+
+/**
+ * @brief contains all the variables required to initialize the I2C unit
+ *
+ * Structure to be filled and used for calling initialization
+ */
+typedef struct
+{
+ IxI2cSpeedMode I2cSpeedSelect; /**<Select either normal (100kbps)
+ or fast mode (400kbps)*/
+ IxI2cFlowMode I2cFlowSelect; /**<Select interrupt or poll mode*/
+ IxI2cMasterReadCallbackP MasterReadCBP;
+ /**<The master read callback pointer */
+ IxI2cMasterWriteCallbackP MasterWriteCBP;
+ /**<The master write callback pointer */
+ IxI2cSlaveReadCallbackP SlaveReadCBP;
+ /**<The slave read callback pointer */
+ IxI2cSlaveWriteCallbackP SlaveWriteCBP;
+ /**<The slave write callback pointer */
+ IxI2cGenCallCallbackP GenCallCBP;
+ /**<The general call callback pointer */
+ BOOL I2cGenCallResponseEnable; /**<Enable/disable the unit to
+ respond to generall calls.*/
+ BOOL I2cSlaveAddrResponseEnable;/**<Enable/disable the unit to
+ respond to the slave address set in
+ ISAR*/
+ BOOL SCLEnable; /**<Enable/disable the unit from
+ driving the SCL line during master
+ mode operation*/
+ UINT8 I2cHWAddr; /**<The address the unit will
+ response to as a slave device*/
+} IxI2cInitVars;
+
+/**
+ * @brief contains results of counters and their overflow
+ *
+ * Structure contains all values of counters and associated overflows.
+ */
+typedef struct
+{
+ UINT32 ixI2cMasterXmitCounter; /**<Total bytes transmitted as
+ master.*/
+ UINT32 ixI2cMasterFailedXmitCounter; /**<Total bytes failed for
+ transmission as master.*/
+ UINT32 ixI2cMasterRcvCounter; /**<Total bytes received as
+ master.*/
+ UINT32 ixI2cMasterFailedRcvCounter; /**<Total bytes failed for
+ receival as master.*/
+ UINT32 ixI2cSlaveXmitCounter; /**<Total bytes transmitted as
+ slave.*/
+ UINT32 ixI2cSlaveFailedXmitCounter; /**<Total bytes failed for
+ transmission as slave.*/
+ UINT32 ixI2cSlaveRcvCounter; /**<Total bytes received as
+ slave.*/
+ UINT32 ixI2cSlaveFailedRcvCounter; /**<Total bytes failed for
+ receival as slave.*/
+ UINT32 ixI2cGenAddrCallSucceedCounter; /**<Total bytes successfully
+ transmitted for general address.*/
+ UINT32 ixI2cGenAddrCallFailedCounter; /**<Total bytes failed transmission
+ for general address.*/
+ UINT32 ixI2cArbLossCounter; /**<Total instances of arbitration
+ loss has occured.*/
+} IxI2cStatsCounters;
+
+
+/*
+ * Section for prototypes interface functions
+ */
+
+/**
+ * @ingroup IxI2cDrv
+ *
+ * @fn ixI2cDrvInit(
+ IxI2cInitVars *InitVarsSelected)
+ *
+ * @brief Initializes the I2C Driver.
+ *
+ * @param "IxI2cInitVars [in] *InitVarsSelected" - struct containing required
+ * variables for initialization
+ *
+ * Global Data :
+ * - None.
+ *
+ * This API will check if the hardware supports this I2C driver and the validity
+ * of the parameters passed in. It will continue to process the parameters
+ * passed in by setting the speed of the I2C unit (100kbps or 400kbps), setting
+ * the flow to either interrupt or poll mode, setting the address of the I2C unit,
+ * enabling/disabling the respond to General Calls, enabling/disabling the respond
+ * to Slave Address and SCL line driving. If it is interrupt mode, then it will
+ * register the callback routines for master, slavetransfer and general call receive.
+ *
+ * @return
+ * - IX_I2C_SUCCESS - Successfully initialize and enable the I2C
+ * hardware.
+ * - IX_I2C_NOT_SUPPORTED - The hardware does not support or have a
+ * dedicated I2C unit to support this driver
+ * - IX_I2C_NULL_POINTER - The parameter passed in is a NULL pointed
+ * - IX_I2C_INVALID_SPEED_MODE_ENUM_VALUE - The speed mode selected in the
+ * InitVarsSelected is invalid
+ * - IX_I2C_INVALID_FLOW_MODE_ENUM_VALUE - The flow mode selected in the
+ * InitVarsSelected is invalid
+ * - IX_I2C_INVALID_SLAVE_ADDR - The address 0x0 is reserved for
+ * general call.
+ * - IX_I2C_SLAVE_ADDR_CB_MISSING - interrupt mode is selected but
+ * slave address callback pointer is NULL
+ * - IX_I2C_GEN_CALL_CB_MISSING - interrupt mode is selected but
+ * general call callback pointer is NULL
+ * - IX_I2C_INT_BIND_FAIL - The ISR for the I2C failed to bind
+ * - IX_I2C_INT_UNBIND_FAIL - The ISR for the I2C failed to unbind
+ *
+ * @li Reentrant : yes
+ * @li ISR Callable : yes
+ *
+ */
+PUBLIC IX_I2C_STATUS
+ixI2cDrvInit(IxI2cInitVars *InitVarsSelected);
+
+/**
+ * @ingroup IxI2cDrv
+ *
+ * @fn ixI2cDrvUninit(
+ void)
+ *
+ * @brief Disables the I2C hardware
+ *
+ * @param - None
+ *
+ * Global Data :
+ * - None.
+ *
+ * This API will disable the I2C hardware, unbind interrupt, and unmap memory.
+ *
+ * @return
+ * - IX_I2C_SUCCESS - successfully un-initialized I2C
+ * - IX_I2C_INT_UNBIND_FAIL - failed to unbind the I2C interrupt
+ * - IX_I2C_NOT_INIT - I2C not init yet.
+ *
+ * @li Reentrant : yes
+ * @li ISR Callable : yes
+ *
+ */
+PUBLIC IX_I2C_STATUS
+ixI2cDrvUninit(void);
+
+/**
+ * @ingroup IxI2cDrv
+ *
+ * @fn ixI2cDrvSlaveAddrSet(
+ UINT8 SlaveAddrSet)
+ *
+ * @brief Sets the I2C Slave Address
+ *
+ * @param "UINT8 [in] SlaveAddrSet" - Slave Address to be inserted into ISAR
+ *
+ * Global Data :
+ * - None.
+ *
+ * This API will insert the SlaveAddrSet into the ISAR.
+ *
+ * @return
+ * - IX_I2C_SUCCESS - successfuly set the slave addr
+ * - IX_I2C_INVALID_SLAVE_ADDR - invalid slave address (zero) specified
+ * - IX_I2C_NOT_INIT - I2C not init yet.
+ *
+ * @li Reentrant : yes
+ * @li ISR Callable : yes
+ *
+ */
+PUBLIC IX_I2C_STATUS
+ixI2cDrvSlaveAddrSet(UINT8 SlaveAddrSet);
+
+/**
+ * @ingroup IxI2cDrv
+ *
+ * @fn ixI2cDrvBusScan(
+ void)
+ *
+ * @brief scans the I2C bus for slave devices
+ *
+ * @param - None
+ *
+ * Global Data :
+ * - None.
+ *
+ * This API will prompt all slave addresses for a reply except its own
+ *
+ * @return
+ * - IX_I2C_SUCCESS - found at least one slave device
+ * - IX_I2C_FAIL - Fail to find even one slave device
+ * - IX_I2C_BUS_BUSY - The I2C bus is busy (held by another I2C master)
+ * - IX_I2C_ARB_LOSS - The I2C bus was loss to another I2C master
+ * - IX_I2C_NOT_INIT - I2C not init yet.
+ *
+ * @li Reentrant : yes
+ * @li ISR Callable : yes
+ *
+ */
+PUBLIC IX_I2C_STATUS
+ixI2cDrvBusScan(void);
+
+/**
+ * @ingroup IxI2cDrv
+ *
+ * @fn ixI2cDrvWriteTransfer(
+ UINT8 SlaveAddr,
+ char *bufP,
+ UINT32 dataSize,
+ IxI2cXferMode XferModeSelect)
+ *
+ * @param "UINT8 [in] SlaveAddr" - The slave address to request data from.
+ * @param "char [in] *bufP" - The pointer to the data to be transmitted.
+ * @param "UINT32 [in] dataSize" - The number of bytes requested.
+ * @param "IxI2cXferMode [in] XferModeSelect" - the transfer mode selected,
+ * either repeated start (ends w/o stop) or normal (start and stop)
+ *
+ * Global Data :
+ * - None.
+ *
+ * This API will try to obtain master control of the I2C bus and transmit the
+ * number of bytes, specified by dataSize, to the user specified slave
+ * address from the buffer pointer. It will use either interrupt or poll mode
+ * depending on the method selected.
+ *
+ * If in interrupt mode and IxI2cMasterWriteCallbackP is not NULL, the driver
+ * will initiate the transfer and return immediately. The function pointed to
+ * by IxI2cMasterWriteCallbackP will be called in the interrupt service
+ * handlers when the operation is complete.
+ *
+ * If in interrupt mode and IxI2cMasterWriteCallbackP is NULL, then the driver
+ * will wait for the operation to complete, and then return.
+ *
+ * And if the repeated start transfer mode is selected, then it will not send a
+ * stop signal at the end of all the transfers.
+ * *NOTE*: If repeated start transfer mode is selected, it has to end with a
+ * normal mode transfer mode else the bus will continue to be held
+ * by the IXP.
+ *
+ * @return
+ * - IX_I2C_SUCCESS - Successfuuly wrote data to slave.
+ * - IX_I2C_MASTER_BUS_BUSY - The I2C bus is busy (held by another I2C master)
+ * - IX_I2C_MASTER_ARB_LOSS - The I2C bus was loss to another I2C master
+ * - IX_I2C_MASTER_XFER_ERROR - There was a transfer error
+ * - IX_I2C_MASTER_BUS_ERROR - There was a bus error during transfer
+ * - IX_I2C_MASTER_NO_BUFFER - buffer pointer is NULL
+ * - IX_I2C_MASTER_INVALID_XFER_MODE - Xfer mode selected is invalid
+ * - IX_I2C_DATA_SIZE_ZERO - dataSize passed in is zero, which is invalid
+ * - IX_I2C_NOT_INIT - I2C not init yet.
+ *
+ * @li Reentrant : no
+ * @li ISR Callable : no
+ *
+ */
+PUBLIC IX_I2C_STATUS
+ixI2cDrvWriteTransfer(
+ UINT8 SlaveAddr,
+ char *bufP,
+ UINT32 dataSize,
+ IxI2cXferMode XferModeSelect);
+
+/**
+ * @ingroup IxI2cDrv
+ *
+ * @fn ixI2cDrvReadTransfer(
+ UINT8 SlaveAddr,
+ char *bufP,
+ UINT32 dataSize,
+ IxI2cXferMode XferModeSelect)
+ *
+ * @brief Initiates a transfer to receive bytes of data from a slave
+ * device through the I2C bus.
+ *
+ * @param "UINT8 [in] SlaveAddr" - The slave address to request data from.
+ * @param "char [out] *bufP" - The pointer to the buffer to store the
+ * requested data.
+ * @param "UINT32 [in] dataSize" - The number of bytes requested.
+ * @param "IxI2cXferMode [in] XferModeSelect" - the transfer mode selected,
+ * either repeated start (ends w/o stop) or normal (start and stop)
+ *
+ * Global Data :
+ * - None.
+ *
+ * This API will try to obtain master control of the I2C bus and receive the
+ * number of bytes, specified by dataSize, from the user specified address
+ * into the receive buffer. It will use either interrupt or poll mode depending
+ * on the mode selected.
+ *
+ * If in interrupt mode and IxI2cMasterReadCallbackP is not NULL, the driver
+ * will initiate the transfer and return immediately. The function pointed to
+ * by IxI2cMasterReadCallbackP will be called in the interrupt service
+ * handlers when the operation is complete.
+ *
+ * If in interrupt mode and IxI2cMasterReadCallbackP is NULL, then the driver will
+ * wait for the operation to complete, and then return.
+ *
+ * And if the repeated start transfer mode is selected, then it will not send a
+ * stop signal at the end of all the transfers.
+ * *NOTE*: If repeated start transfer mode is selected, it has to end with a
+ * normal mode transfer mode else the bus will continue to be held
+ * by the IXP.
+ *
+ * @return
+ * - IX_I2C_SUCCESS - Successfuuly read slave data
+ * - IX_I2C_MASTER_BUS_BUSY - The I2C bus is busy (held by another I2C master)
+ * - IX_I2C_MASTER_ARB_LOSS - The I2C bus was loss to another I2C master
+ * - IX_I2C_MASTER_XFER_ERROR - There was a bus error during transfer
+ * - IX_I2C_MASTER_BUS_ERROR - There was a bus error during transfer
+ * - IX_I2C_MASTER_NO_BUFFER - buffer pointer is NULL
+ * - IX_I2C_MASTER_INVALID_XFER_MODE - Xfer mode selected is invalid
+ * - IX_I2C_INVALID_SLAVE_ADDR - invalid slave address (zero) specified
+ * - IX_I2C_DATA_SIZE_ZERO - dataSize passed in is zero, which is invalid
+ * - IX_I2C_NOT_INIT - I2C not init yet.
+ *
+ * @li Reentrant : no
+ * @li ISR Callable : no
+ *
+ */
+PUBLIC IX_I2C_STATUS
+ixI2cDrvReadTransfer(
+ UINT8 SlaveAddr,
+ char *bufP,
+ UINT32 dataSize,
+ IxI2cXferMode XferModeSelect);
+
+/**
+ * @ingroup IxI2cDrv
+ *
+ * @fn ixI2cDrvSlaveAddrAndGenCallDetectedCheck(
+ void)
+ *
+ * @brief Checks the I2C Status Register to determine if a slave address is
+ * detected
+ *
+ * @param - None
+ *
+ * Global Data :
+ * - None.
+ *
+ * This API is used in polled mode to determine if the I2C unit is requested
+ * for a slave or general call transfer. If it is requested for a slave
+ * transfer then it will determine if it is a general call (read only), read,
+ * or write transfer requested.
+ *
+ * @return
+ * - IX_I2C_SLAVE_ADDR_NOT_DETECTED - The I2C unit is not requested for slave
+ * transfer
+ * - IX_I2C_GEN_CALL_ADDR_DETECTED - The I2C unit is not requested for slave
+ * transfer but for general call
+ * - IX_I2C_SLAVE_READ_DETECTED - The I2C unit is requested for a read
+ * - IX_I2C_SLAVE_WRITE_DETECTED - The I2C unit is requested for a write
+ * - IX_I2C_NOT_INIT - I2C not init yet.
+ *
+ * @li Reentrant : no
+ * @li ISR Callable : no
+ *
+ */
+PUBLIC IX_I2C_STATUS
+ixI2cDrvSlaveAddrAndGenCallDetectedCheck(void);
+
+/**
+ * @ingroup IxI2cDrv
+ *
+ * @fn ixI2cDrvSlaveOrGenDataReceive(
+ char *bufP,
+ UINT32 bufSize,
+ UINT32 *dataSizeRcvd)
+ *
+ * @brief Performs the slave receive or general call receive data transfer
+ *
+ * @param "char [in] *bufP" - the pointer to the buffer to store data
+ * "UINT32 [in] bufSize" - the buffer size allocated
+ * "UINT32 [in] *dataSizeRcvd" - the length of data received in bytes
+ *
+ * Global Data :
+ * - None.
+ *
+ * This API is only used in polled mode to perform the slave read or general call
+ * receive data. It will continuously store the data received into bufP until
+ * complete or until bufP is full in which it will return
+ * IX_I2C_SLAVE_OR_GEN_READ_BUFFER_FULL. If in interrupt mode, the callback will be
+ * used.
+ *
+ * @return
+ * - IX_I2C_SUCCESS - The I2C driver transferred the data successfully.
+ * - IX_I2C_SLAVE_OR_GEN_READ_BUFFER_FULL - The I2C driver has ran out of
+ * space to store the received data.
+ * - IX_I2C_SLAVE_OR_GEN_READ_ERROR - The I2C driver didn't manage to
+ * detect the IDBR Rx Full bit
+ * - IX_I2C_DATA_SIZE_ZERO - bufSize passed in is zero, which is invalid
+ * - IX_I2C_SLAVE_NO_BUFFER - buffer pointer is NULL
+ * - IX_I2C_NULL_POINTER - dataSizeRcvd is NULL
+ * - IX_I2C_NOT_INIT - I2C not init yet.
+ *
+ * @li Reentrant : no
+ * @li ISR Callable : no
+ *
+ */
+PUBLIC IX_I2C_STATUS
+ixI2cDrvSlaveOrGenDataReceive(
+ char *bufP,
+ UINT32 bufSize,
+ UINT32 *dataSizeRcvd);
+
+/**
+ * @ingroup IxI2cDrv
+ *
+ * @fn ixI2cDrvSlaveDataTransmit(
+ char *bufP,
+ UINT32 dataSize,
+ UINT32 *dataSizeXmtd)
+ *
+ * @brief Performs the slave write data transfer
+ *
+ * @param "char [in] *bufP" - the pointer to the buffer for data to be
+ * transmitted
+ * "UINT32 [in] bufSize" - the buffer size allocated
+ * "UINT32 [in] *dataSizeRcvd" - the length of data trasnmitted in
+ * bytes
+ *
+ * Global Data :
+ * - None.
+ *
+ * This API is only used in polled mode to perform the slave transmit data. It
+ * will continuously transmit the data from bufP until complete or until bufP
+ * is empty in which it will return IX_I2C_SLAVE_WRITE_BUFFER_EMPTY. If in
+ * interrupt mode, the callback will be used.
+ *
+ * @return
+ * - IX_I2C_SUCCESS - The I2C driver transferred the data successfully.
+ * - IX_I2C_SLAVE_WRITE_BUFFER_EMPTY - The I2C driver needs more data to
+ * transmit.
+ * - IX_I2C_SLAVE_WRITE_ERROR -The I2C driver didn't manage to detect the
+ * IDBR Tx empty bit or the slave stop bit.
+ * - IX_I2C_DATA_SIZE_ZERO - dataSize passed in is zero, which is invalid
+ * - IX_I2C_SLAVE_NO_BUFFER - buffer pointer is NULL
+ * - IX_I2C_NULL_POINTER - dataSizeXmtd is NULL
+ * - IX_I2C_NOT_INIT - I2C not init yet.
+ *
+ * @li Reentrant : no
+ * @li ISR Callable : no
+ *
+ */
+PUBLIC IX_I2C_STATUS
+ixI2cDrvSlaveDataTransmit(
+ char *bufP,
+ UINT32 dataSize,
+ UINT32 *dataSizeXmtd);
+
+/**
+ * @ingroup IxI2cDrv
+ *
+ * @fn ixI2cDrvSlaveOrGenCallBufReplenish(
+ char *bufP,
+ UINT32 bufSize)
+ *
+ * @brief Replenishes the buffer which stores buffer info for both slave and
+ * general call
+ *
+ * @param "char [in] *bufP" - pointer to the buffer allocated
+ * "UINT32 [in] bufSize" - size of the buffer
+ *
+ * Global Data :
+ * - None.
+ *
+ * This API is only used in interrupt mode for replenishing the same buffer
+ * that is used by both slave and generall call by updating the buffer info
+ * with new info and clearing previous offsets set by previous transfers.
+ *
+ * @return
+ * - None
+ *
+ * @li Reentrant : no
+ * @li ISR Callable : no
+ *
+ */
+PUBLIC void
+ixI2cDrvSlaveOrGenCallBufReplenish(
+ char *bufP,
+ UINT32 bufSize);
+
+/**
+ * @ingroup IxI2cDrv
+ *
+ * @fn ixI2cDrvStatsGet(IxI2cStatsCounters *I2cStats)
+ *
+ * @brief Returns the I2C Statistics through the pointer passed in
+ *
+ * @param - "IxI2cStatsCounters [out] *I2cStats" - I2C statistics counter will
+ * be read and written to the location pointed by this pointer.
+ *
+ * Global Data :
+ * - None.
+ *
+ * This API will return the statistics counters of the I2C driver.
+ *
+ * @return
+ * - IX_I2C_NULL_POINTER - pointer passed in is NULL
+ * - IX_I2C_SUCCESS - successfully obtained I2C statistics
+ *
+ * @li Reentrant : yes
+ * @li ISR Callable : no
+ *
+ */
+PUBLIC IX_I2C_STATUS
+ixI2cDrvStatsGet(IxI2cStatsCounters *I2cStats);
+
+/**
+ * @ingroup IxI2cDrv
+ *
+ * @fn ixI2cDrvStatsReset(void)
+ *
+ * @brief Reset I2C statistics counters.
+ *
+ * @param - None
+ *
+ * Global Data :
+ * - None.
+ *
+ * This API will reset the statistics counters of the I2C driver.
+ *
+ * @return
+ * - None
+ *
+ * @li Reentrant : yes
+ * @li ISR Callable : no
+ *
+ */
+PUBLIC void
+ixI2cDrvStatsReset(void);
+
+/**
+ * @ingroup IxI2cDrv
+ *
+ * @fn ixI2cDrvShow(void)
+ *
+ * @brief Displays the I2C status register and the statistics counter.
+ *
+ * @param - None
+ *
+ * Global Data :
+ * - None.
+ *
+ * This API will display the I2C Status register and is useful if any error
+ * occurs. It displays the detection of bus error, slave address, general call,
+ * address, IDBR receive full, IDBR transmit empty, arbitration loss, slave
+ * STOP signal, I2C bus busy, unit busy, ack/nack, and read/write mode. It will
+ * also call the ixI2cDrvGetStats and then display the statistics counter.
+ *
+ * @return
+ * - IX_I2C_SUCCESS - successfully displayed statistics and status register
+ * - IX_I2C_NOT_INIT - I2C not init yet.
+ *
+ * @li Reentrant : yes
+ * @li ISR Callable : no
+ *
+ */
+PUBLIC IX_I2C_STATUS
+ixI2cDrvShow(void);
+
+/**
+ * @ingroup IxI2cDrv
+ *
+ * @fn ixI2cDrvDelayTypeSelect (IxI2cDelayMode delayMechanismSelect)
+ *
+ * @brief Sets the delay type of either looping delay or OS scheduler delay
+ * according to the argument provided.
+ *
+ * @param - "IxI2cDelayMode [in] delayTypeSelect" - the I2C delay type selected
+ *
+ * Global Data :
+ * - None.
+ *
+ * This API will set the delay type used by the I2C Driver to either looping
+ * delay or OS scheduler delay.
+ *
+ * @return
+ * - None
+ *
+ * @li Reentrant : yes
+ * @li ISR Callable : no
+ *
+ */
+PUBLIC void
+ixI2cDrvDelayTypeSelect (IxI2cDelayMode delayTypeSelect);
+
+#endif /* __ixp46X */
+#endif /* IXI2CDRV_H */
diff --git a/cpu/ixp/npe/include/IxNpeA.h b/cpu/ixp/npe/include/IxNpeA.h
new file mode 100644
index 0000000000..7427cc41c8
--- /dev/null
+++ b/cpu/ixp/npe/include/IxNpeA.h
@@ -0,0 +1,782 @@
+#ifndef __doxygen_HIDE /* This file is not part of the API */
+
+/**
+ * @file IxNpeA.h
+ *
+ * @date 22-Mar-2002
+ *
+ * @brief Header file for the IXP400 ATM NPE API
+ *
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+/**
+ * @defgroup IxNpeA IXP400 NPE-A (IxNpeA) API
+ *
+ * @brief The Public API for the IXP400 NPE-A
+ *
+ * @{
+ */
+
+#ifndef IX_NPE_A_H
+#define IX_NPE_A_H
+
+#include "IxQMgr.h"
+#include "IxOsal.h"
+#include "IxQueueAssignments.h"
+
+/* General Message Ids */
+
+/* ATM Message Ids */
+
+/**
+ * @def IX_NPE_A_MSSG_ATM_UTOPIA_CONFIG_WRITE
+ *
+ * @brief ATM Message ID command to write the data to the offset in the
+ * Utopia Configuration Table
+ */
+#define IX_NPE_A_MSSG_ATM_UTOPIA_CONFIG_WRITE 0x20
+
+/**
+ * @def IX_NPE_A_MSSG_ATM_UTOPIA_CONFIG_LOAD
+ *
+ * @brief ATM Message ID command triggers the NPE to copy the Utopia
+ * Configuration Table to the Utopia coprocessor
+ */
+#define IX_NPE_A_MSSG_ATM_UTOPIA_CONFIG_LOAD 0x21
+
+/**
+ * @def IX_NPE_A_MSSG_ATM_UTOPIA_STATUS_UPLOAD
+ *
+ * @brief ATM Message ID command triggers the NPE to read-back the Utopia
+ * status registers and update the Utopia Status Table.
+ */
+#define IX_NPE_A_MSSG_ATM_UTOPIA_STATUS_UPLOAD 0x22
+
+/**
+ * @def IX_NPE_A_MSSG_ATM_UTOPIA_STATUS_READ
+ *
+ * @brief ATM Message ID command to read the Utopia Status Table at the
+ * specified offset.
+ */
+#define IX_NPE_A_MSSG_ATM_UTOPIA_STATUS_READ 0x23
+
+/**
+ * @def IX_NPE_A_MSSG_ATM_TX_ENABLE
+ *
+ * @brief ATM Message ID command triggers the NPE to re-enable processing
+ * of any entries on the TxVcQ for this port.
+ *
+ * This command will be ignored for a port already enabled
+ */
+#define IX_NPE_A_MSSG_ATM_TX_ENABLE 0x25
+
+ /**
+ * @def IX_NPE_A_MSSG_ATM_TX_DISABLE
+ *
+ * @brief ATM Message ID command triggers the NPE to disable processing on
+ * this port
+ *
+ * This command will be ignored for a port already disabled
+ */
+#define IX_NPE_A_MSSG_ATM_TX_DISABLE 0x26
+
+/**
+ * @def IX_NPE_A_MSSG_ATM_RX_ENABLE
+ *
+ * @brief ATM Message ID command triggers the NPE to process any received
+ * cells for this VC according to the VC Lookup Table.
+ *
+ * Re-issuing this command with different contents for a VC that is not
+ * disabled will cause unpredictable behavior.
+ */
+#define IX_NPE_A_MSSG_ATM_RX_ENABLE 0x27
+
+/**
+ * @def IX_NPE_A_MSSG_ATM_RX_DISABLE
+ *
+ * @brief ATM Message ID command triggers the NPE to disable processing for
+ * this VC.
+ *
+ * This command will be ignored for a VC already disabled
+ */
+#define IX_NPE_A_MSSG_ATM_RX_DISABLE 0x28
+
+/**
+ * @def IX_NPE_A_MSSG_ATM_STATUS_READ
+ *
+ * @brief ATM Message ID command to read the ATM status. The data is returned via
+ * a response message
+ */
+#define IX_NPE_A_MSSG_ATM_STATUS_READ 0x29
+
+/*--------------------------------------------------------------------------
+ * HSS Message IDs
+ *--------------------------------------------------------------------------*/
+
+/**
+ * @def IX_NPE_A_MSSG_HSS_PORT_CONFIG_WRITE
+ *
+ * @brief HSS Message ID command writes the ConfigWord value to the location
+ * in the HSS_CONFIG_TABLE specified by offset for HSS port hPort.
+ */
+#define IX_NPE_A_MSSG_HSS_PORT_CONFIG_WRITE 0x40
+
+/**
+ * @def IX_NPE_A_MSSG_HSS_PORT_CONFIG_LOAD
+ *
+ * @brief HSS Message ID command triggers the NPE to copy the contents of the
+ * HSS Configuration Table to the appropriate configuration registers in the
+ * HSS coprocessor for the port specified by hPort.
+ */
+#define IX_NPE_A_MSSG_HSS_PORT_CONFIG_LOAD 0x41
+
+/**
+ * @def IX_NPE_A_MSSG_HSS_PORT_ERROR_READ
+ *
+ * @brief HSS Message ID command triggers the NPE to return an HssErrorReadResponse
+ * message for HSS port hPort.
+ */
+#define IX_NPE_A_MSSG_HSS_PORT_ERROR_READ 0x42
+
+/**
+ * @def IX_NPE_A_MSSG_HSS_CHAN_FLOW_ENABLE
+ *
+ * @brief HSS Message ID command triggers the NPE to reset internal status and
+ * enable the HssChannelized operation on the HSS port specified by hPort.
+ */
+#define IX_NPE_A_MSSG_HSS_CHAN_FLOW_ENABLE 0x43
+
+/**
+ * @def IX_NPE_A_MSSG_HSS_CHAN_FLOW_DISABLE
+ *
+ * @brief HSS Message ID command triggers the NPE to disable the HssChannelized
+ * operation on the HSS port specified by hPort.
+ */
+#define IX_NPE_A_MSSG_HSS_CHAN_FLOW_DISABLE 0x44
+
+/**
+ * @def IX_NPE_A_MSSG_HSS_CHAN_IDLE_PATTERN_WRITE
+ *
+ * @brief HSS Message ID command writes the HSSnC_IDLE_PATTERN value for HSS
+ * port hPort. (n=hPort)
+ */
+#define IX_NPE_A_MSSG_HSS_CHAN_IDLE_PATTERN_WRITE 0x45
+
+/**
+ * @def IX_NPE_A_MSSG_HSS_CHAN_NUM_CHANS_WRITE
+ *
+ * @brief HSS Message ID command writes the HSSnC_NUM_CHANNELS value for HSS
+ * port hPort. (n=hPort)
+ */
+#define IX_NPE_A_MSSG_HSS_CHAN_NUM_CHANS_WRITE 0x46
+
+/**
+ * @def IX_NPE_A_MSSG_HSS_CHAN_RX_BUF_ADDR_WRITE
+ *
+ * @brief HSS Message ID command writes the HSSnC_RX_BUF_ADDR value for HSS
+ * port hPort. (n=hPort)
+ */
+#define IX_NPE_A_MSSG_HSS_CHAN_RX_BUF_ADDR_WRITE 0x47
+
+/**
+ * @def IX_NPE_A_MSSG_HSS_CHAN_RX_BUF_CFG_WRITE
+ *
+ * @brief HSS Message ID command writes the HSSnC_RX_BUF_SIZEB and
+ * HSSnC_RX_TRIG_PERIOD values for HSS port hPort. (n=hPort)
+ */
+#define IX_NPE_A_MSSG_HSS_CHAN_RX_BUF_CFG_WRITE 0x48
+
+/**
+ * @def IX_NPE_A_MSSG_HSS_CHAN_TX_BLK_CFG_WRITE
+ *
+ * @brief HSS Message ID command writes the HSSnC_TX_BLK1_SIZEB,
+ * HSSnC_TX_BLK1_SIZEW, HSSnC_TX_BLK2_SIZEB, and HSSnC_TX_BLK2_SIZEW values
+ * for HSS port hPort. (n=hPort)
+ */
+#define IX_NPE_A_MSSG_HSS_CHAN_TX_BLK_CFG_WRITE 0x49
+
+/**
+ * @def IX_NPE_A_MSSG_HSS_CHAN_TX_BUF_ADDR_WRITE
+ * @brief HSS Message ID command writes the HSSnC_TX_BUF_ADDR value for HSS
+ * port hPort. (n=hPort)
+ */
+#define IX_NPE_A_MSSG_HSS_CHAN_TX_BUF_ADDR_WRITE 0x4A
+
+/**
+ * @def IX_NPE_A_MSSG_HSS_CHAN_TX_BUF_SIZE_WRITE
+ *
+ * @brief HSS Message ID command writes the HSSnC_TX_BUF_SIZEN value for HSS
+ * port hPort. (n=hPort)
+ */
+#define IX_NPE_A_MSSG_HSS_CHAN_TX_BUF_SIZE_WRITE 0x4B
+
+/**
+ * @def IX_NPE_A_MSSG_HSS_PKT_PIPE_FLOW_ENABLE
+ *
+ * @brief HSS Message ID command triggers the NPE to reset internal status and
+ * enable the HssPacketized operation for the flow specified by pPipe on
+ * the HSS port specified by hPort.
+ */
+#define IX_NPE_A_MSSG_HSS_PKT_PIPE_FLOW_ENABLE 0x50
+
+/**
+ * @def IX_NPE_A_MSSG_HSS_PKT_PIPE_FLOW_DISABLE
+ * @brief HSS Message ID command triggers the NPE to disable the HssPacketized
+ * operation for the flow specified by pPipe on the HSS port specified by hPort.
+ */
+#define IX_NPE_A_MSSG_HSS_PKT_PIPE_FLOW_DISABLE 0x51
+
+/**
+ * @def IX_NPE_A_MSSG_HSS_PKT_NUM_PIPES_WRITE
+ * @brief HSS Message ID command writes the HSSnP_NUM_PIPES value for HSS
+ * port hPort.(n=hPort)
+ */
+#define IX_NPE_A_MSSG_HSS_PKT_NUM_PIPES_WRITE 0x52
+
+/**
+ * @def IX_NPE_A_MSSG_HSS_PKT_PIPE_FIFO_SIZEW_WRITE
+ *
+ * @brief HSS Message ID command writes the HSSnP_PIPEp_FIFOSIZEW value for
+ * packet-pipe pPipe on HSS port hPort. (n=hPort, p=pPipe)
+ */
+#define IX_NPE_A_MSSG_HSS_PKT_PIPE_FIFO_SIZEW_WRITE 0x53
+
+/**
+ * @def IX_NPE_A_MSSG_HSS_PKT_PIPE_HDLC_CFG_WRITE
+ *
+ * @brief HSS Message ID command writes the HSSnP_PIPEp_HDLC_RXCFG and
+ * HSSnP_PIPEp_HDLC_TXCFG values for packet-pipe pPipe on HSS port hPort.
+ * (n=hPort, p=pPipe)
+ */
+#define IX_NPE_A_MSSG_HSS_PKT_PIPE_HDLC_CFG_WRITE 0x54
+
+/**
+ * @def IX_NPE_A_MSSG_HSS_PKT_PIPE_IDLE_PATTERN_WRITE
+ *
+ * @brief HSS Message ID command writes the HSSnP_PIPEp_IDLE_PATTERN value
+ * for packet-pipe pPipe on HSS port hPort. (n=hPort, p=pPipe)
+ */
+#define IX_NPE_A_MSSG_HSS_PKT_PIPE_IDLE_PATTERN_WRITE 0x55
+
+/**
+ * @def IX_NPE_A_MSSG_HSS_PKT_PIPE_RX_SIZE_WRITE
+ *
+ * @brief HSS Message ID command writes the HSSnP_PIPEp_RXSIZEB value for
+ * packet-pipe pPipe on HSS port hPort. (n=hPort, p=pPipe)
+ */
+#define IX_NPE_A_MSSG_HSS_PKT_PIPE_RX_SIZE_WRITE 0x56
+
+/**
+ * @def IX_NPE_A_MSSG_HSS_PKT_PIPE_MODE_WRITE
+ *
+ * @brief HSS Message ID command writes the HSSnP_PIPEp_MODE value for
+ * packet-pipe pPipe on HSS port hPort. (n=hPort, p=pPipe)
+ */
+#define IX_NPE_A_MSSG_HSS_PKT_PIPE_MODE_WRITE 0x57
+
+
+
+/* Queue Entry Masks */
+
+/*--------------------------------------------------------------------------
+ * ATM Descriptor Structure offsets
+ *--------------------------------------------------------------------------*/
+
+/**
+ * @def IX_NPE_A_RXDESCRIPTOR_STATUS_OFFSET
+ *
+ * @brief ATM Descriptor structure offset for Receive Descriptor Status field
+ *
+ * It is used for descriptor error reporting.
+ */
+#define IX_NPE_A_RXDESCRIPTOR_STATUS_OFFSET 0
+
+/**
+ * @def IX_NPE_A_RXDESCRIPTOR_VCID_OFFSET
+ *
+ * @brief ATM Descriptor structure offset for Receive Descriptor VC ID field
+ *
+ * It is used to hold an identifier number for this VC
+ */
+#define IX_NPE_A_RXDESCRIPTOR_VCID_OFFSET 1
+
+/**
+ * @def IX_NPE_A_RXDESCRIPTOR_CURRMBUFSIZE_OFFSET
+ *
+ * @brief ATM Descriptor structure offset for Receive Descriptor Current Mbuf
+ * Size field
+ *
+ * Number of bytes the current mbuf data buffer can hold
+ */
+#define IX_NPE_A_RXDESCRIPTOR_CURRMBUFSIZE_OFFSET 2
+
+/**
+ * @def IX_NPE_A_RXDESCRIPTOR_ATMHEADER_OFFSET
+ *
+ * @brief ATM Descriptor structure offset for Receive Descriptor ATM Header
+ */
+#define IX_NPE_A_RXDESCRIPTOR_ATMHEADER_OFFSET 4
+
+/**
+ * @def IX_NPE_A_RXDESCRIPTOR_CURRMBUFLEN_OFFSET
+ *
+ * @brief ATM Descriptor structure offset for Receive Descriptor Current MBuf length
+ *
+ *
+ * RX - Initialized to zero. The NPE updates this field as each cell is received and
+ * zeroes it with every new mbuf for chaining. Will not be bigger than currBbufSize.
+ */
+#define IX_NPE_A_RXDESCRIPTOR_CURRMBUFLEN_OFFSET 12
+
+/**
+ * @def IX_NPE_A_RXDESCRIPTOR_TIMELIMIT__OFFSET
+ *
+ * @brief ATM Descriptor structure offset for Receive Descriptor Time Limit field
+ *
+ * Contains the Payload Reassembly Time Limit (used for aal0_xx only)
+ */
+#define IX_NPE_A_RXDESCRIPTOR_TIMELIMIT_OFFSET 14
+
+/**
+ * @def IX_NPE_A_RXDESCRIPTOR_PCURRMBUFF_OFFSET
+ *
+ * @brief ATM Descriptor structure offset for Receive Descriptor Current MBuf Pointer
+ *
+ * The current mbuf pointer of a chain of mbufs.
+ */
+#define IX_NPE_A_RXDESCRIPTOR_PCURRMBUFF_OFFSET 20
+
+/**
+ * @def IX_NPE_A_RXDESCRIPTOR_PCURRMBUFDATA_OFFSET
+ *
+ * @brief ATM Descriptor structure offset for Receive Descriptor Current MBuf Pointer
+ *
+ * Pointer to the next byte to be read or next free location to be written.
+ */
+#define IX_NPE_A_RXDESCRIPTOR_PCURRMBUFDATA_OFFSET 24
+
+/**
+ * @def IX_NPE_A_RXDESCRIPTOR_PNEXTMBUF_OFFSET
+ *
+ * @brief ATM Descriptor structure offset for Receive Descriptor Next MBuf Pointer
+ *
+ * Pointer to the next MBuf in a chain of MBufs.
+ */
+#define IX_NPE_A_RXDESCRIPTOR_PNEXTMBUF_OFFSET 28
+
+/**
+ * @def IX_NPE_A_RXDESCRIPTOR_TOTALLENGTH_OFFSET
+ *
+ * @brief ATM Descriptor structure offset for Receive Descriptor Total Length
+ *
+ * Total number of bytes written to the chain of MBufs by the NPE
+ */
+#define IX_NPE_A_RXDESCRIPTOR_TOTALLENGTH_OFFSET 32
+
+/**
+ * @def IX_NPE_A_RXDESCRIPTOR_AAL5CRCRESIDUE_OFFSET
+ *
+ * @brief ATM Descriptor structure offset for Receive Descriptor AAL5 CRC Residue
+ *
+ * Current CRC value for a PDU
+ */
+#define IX_NPE_A_RXDESCRIPTOR_AAL5CRCRESIDUE_OFFSET 36
+
+/**
+ * @def IX_NPE_A_RXDESCRIPTOR_SIZE
+ *
+ * @brief ATM Descriptor structure offset for Receive Descriptor Size
+ *
+ * The size of the Receive descriptor
+ */
+#define IX_NPE_A_RXDESCRIPTOR_SIZE 40
+
+/**
+ * @def IX_NPE_A_TXDESCRIPTOR_PORT_OFFSET
+ *
+ * @brief ATM Descriptor structure offset for Transmit Descriptor Port
+ *
+ * Port identifier.
+ */
+#define IX_NPE_A_TXDESCRIPTOR_PORT_OFFSET 0
+
+/**
+ * @def IX_NPE_A_TXDESCRIPTOR_RSVD_OFFSET
+ *
+ * @brief ATM Descriptor structure offset for Transmit Descriptor RSVD
+ */
+#define IX_NPE_A_TXDESCRIPTOR_RSVD_OFFSET 1
+
+/**
+ * @def IX_NPE_A_TXDESCRIPTOR_CURRMBUFLEN_OFFSET
+ *
+ * @brief ATM Descriptor structure offset for Transmit Descriptor Current MBuf Length
+ *
+ * TX - Initialized by the XScale to the number of bytes in the current MBuf data buffer.
+ * The NPE decrements this field for every transmitted cell. Thus, when the NPE writes a
+ * descriptor the TxDone queue, this field will equal zero.
+ */
+#define IX_NPE_A_TXDESCRIPTOR_CURRMBUFLEN_OFFSET 2
+
+/**
+ * @def IX_NPE_A_TXDESCRIPTOR_ATMHEADER_OFFSET
+ * @brief ATM Descriptor structure offset for Transmit Descriptor ATM Header
+ */
+#define IX_NPE_A_TXDESCRIPTOR_ATMHEADER_OFFSET 4
+
+/**
+ * @def IX_NPE_A_TXDESCRIPTOR_PCURRMBUFF_OFFSET
+ *
+ * @brief ATM Descriptor structure offset for Transmit Descriptor Pointer to the current MBuf chain
+ */
+#define IX_NPE_A_TXDESCRIPTOR_PCURRMBUFF_OFFSET 8
+
+/**
+ * @def IX_NPE_A_TXDESCRIPTOR_PCURRMBUFDATA_OFFSET
+ *
+ * @brief ATM Descriptor structure offset for Transmit Descriptor Pointer to the current MBuf Data
+ *
+ * Pointer to the next byte to be read or next free location to be written.
+ */
+#define IX_NPE_A_TXDESCRIPTOR_PCURRMBUFDATA_OFFSET 12
+
+/**
+ * @def IX_NPE_A_TXDESCRIPTOR_PNEXTMBUF_OFFSET
+ *
+ * @brief ATM Descriptor structure offset for Transmit Descriptor Pointer to the Next MBuf chain
+ */
+#define IX_NPE_A_TXDESCRIPTOR_PNEXTMBUF_OFFSET 16
+
+/**
+ * @def IX_NPE_A_TXDESCRIPTOR_TOTALLENGTH_OFFSET
+ *
+ * @brief ATM Descriptor structure offset for Transmit Descriptor Total Length
+ *
+ * Total number of bytes written to the chain of MBufs by the NPE
+ */
+#define IX_NPE_A_TXDESCRIPTOR_TOTALLENGTH_OFFSET 20
+
+/**
+ * @def IX_NPE_A_TXDESCRIPTOR_AAL5CRCRESIDUE_OFFSET
+ *
+ * @brief ATM Descriptor structure offset for Transmit Descriptor AAL5 CRC Residue
+ *
+ * Current CRC value for a PDU
+ */
+#define IX_NPE_A_TXDESCRIPTOR_AAL5CRCRESIDUE_OFFSET 24
+
+/**
+ * @def IX_NPE_A_TXDESCRIPTOR_SIZE
+ *
+ * @brief ATM Descriptor structure offset for Transmit Descriptor Size
+ */
+#define IX_NPE_A_TXDESCRIPTOR_SIZE 28
+
+/**
+ * @def IX_NPE_A_CHAIN_DESC_COUNT_MAX
+ *
+ * @brief Maximum number of chained MBufs that can be chained together
+ */
+#define IX_NPE_A_CHAIN_DESC_COUNT_MAX 256
+
+/*
+ * Definition of the ATM cell header
+ *
+ * This would most conviently be defined as the bit field shown below.
+ * Endian portability prevents this, therefore a set of macros
+ * are defined to access the fields within the cell header assumed to
+ * be passed as a UINT32.
+ *
+ * Changes to field sizes or orders must be reflected in the offset
+ * definitions above.
+ *
+ * typedef struct
+ * {
+ * unsigned int gfc:4;
+ * unsigned int vpi:8;
+ * unsigned int vci:16;
+ * unsigned int pti:3;
+ * unsigned int clp:1;
+ * } IxNpeA_AtmCellHeader;
+ *
+ */
+
+/** Mask to acess GFC */
+#define GFC_MASK 0xf0000000
+
+/** return GFC from ATM cell header */
+#define IX_NPE_A_ATMCELLHEADER_GFC_GET( header ) \
+(((header) & GFC_MASK) >> 28)
+
+/** set GFC into ATM cell header */
+#define IX_NPE_A_ATMCELLHEADER_GFC_SET( header,gfc ) \
+do { \
+ (header) &= ~GFC_MASK; \
+ (header) |= (((gfc) << 28) & GFC_MASK); \
+} while(0)
+
+/** Mask to acess VPI */
+#define VPI_MASK 0x0ff00000
+
+/** return VPI from ATM cell header */
+#define IX_NPE_A_ATMCELLHEADER_VPI_GET( header ) \
+(((header) & VPI_MASK) >> 20)
+
+/** set VPI into ATM cell header */
+#define IX_NPE_A_ATMCELLHEADER_VPI_SET( header, vpi ) \
+do { \
+ (header) &= ~VPI_MASK; \
+ (header) |= (((vpi) << 20) & VPI_MASK); \
+} while(0)
+
+/** Mask to acess VCI */
+#define VCI_MASK 0x000ffff0
+
+/** return VCI from ATM cell header */
+#define IX_NPE_A_ATMCELLHEADER_VCI_GET( header ) \
+(((header) & VCI_MASK) >> 4)
+
+/** set VCI into ATM cell header */
+#define IX_NPE_A_ATMCELLHEADER_VCI_SET( header, vci ) \
+do { \
+ (header) &= ~VCI_MASK; \
+ (header) |= (((vci) << 4) & VCI_MASK); \
+} while(0)
+
+/** Mask to acess PTI */
+#define PTI_MASK 0x0000000e
+
+/** return PTI from ATM cell header */
+#define IX_NPE_A_ATMCELLHEADER_PTI_GET( header ) \
+(((header) & PTI_MASK) >> 1)
+
+/** set PTI into ATM cell header */
+#define IX_NPE_A_ATMCELLHEADER_PTI_SET( header, pti ) \
+do { \
+ (header) &= ~PTI_MASK; \
+ (header) |= (((pti) << 1) & PTI_MASK); \
+} while(0)
+
+/** Mask to acess CLP */
+#define CLP_MASK 0x00000001
+
+/** return CLP from ATM cell header */
+#define IX_NPE_A_ATMCELLHEADER_CLP_GET( header ) \
+((header) & CLP_MASK)
+
+/** set CLP into ATM cell header */
+#define IX_NPE_A_ATMCELLHEADER_CLP_SET( header, clp ) \
+do { \
+ (header) &= ~CLP_MASK; \
+ (header) |= ((clp) & CLP_MASK); \
+} while(0)
+
+
+/*
+* Definition of the Rx bitfield
+*
+* This would most conviently be defined as the bit field shown below.
+* Endian portability prevents this, therefore a set of macros
+* are defined to access the fields within the rxBitfield assumed to
+* be passed as a UINT32.
+*
+* Changes to field sizes or orders must be reflected in the offset
+* definitions above.
+*
+* Rx bitfield
+* struct
+* { IX_NPEA_RXBITFIELD(
+* unsigned int status:1,
+* unsigned int port:7,
+* unsigned int vcId:8,
+* unsigned int currMbufSize:16);
+* } rxBitField;
+*
+*/
+
+/** Mask to acess the rxBitField status */
+#define STATUS_MASK 0x80000000
+
+/** return the rxBitField status */
+#define IX_NPE_A_RXBITFIELD_STATUS_GET( rxbitfield ) \
+(((rxbitfield) & STATUS_MASK) >> 31)
+
+/** set the rxBitField status */
+#define IX_NPE_A_RXBITFIELD_STATUS_SET( rxbitfield, status ) \
+do { \
+ (rxbitfield) &= ~STATUS_MASK; \
+ (rxbitfield) |= (((status) << 31) & STATUS_MASK); \
+} while(0)
+
+/** Mask to acess the rxBitField port */
+#define PORT_MASK 0x7f000000
+
+/** return the rxBitField port */
+#define IX_NPE_A_RXBITFIELD_PORT_GET( rxbitfield ) \
+(((rxbitfield) & PORT_MASK) >> 24)
+
+/** set the rxBitField port */
+#define IX_NPE_A_RXBITFIELD_PORT_SET( rxbitfield, port ) \
+do { \
+ (rxbitfield) &= ~PORT_MASK; \
+ (rxbitfield) |= (((port) << 24) & PORT_MASK); \
+} while(0)
+
+/** Mask to acess the rxBitField vcId */
+#define VCID_MASK 0x00ff0000
+
+/** return the rxBitField vcId */
+#define IX_NPE_A_RXBITFIELD_VCID_GET( rxbitfield ) \
+(((rxbitfield) & VCID_MASK) >> 16)
+
+/** set the rxBitField vcId */
+#define IX_NPE_A_RXBITFIELD_VCID_SET( rxbitfield, vcid ) \
+do { \
+ (rxbitfield) &= ~VCID_MASK; \
+ (rxbitfield) |= (((vcid) << 16) & VCID_MASK); \
+} while(0)
+
+/** Mask to acess the rxBitField mbuf size */
+#define CURRMBUFSIZE_MASK 0x0000ffff
+
+/** return the rxBitField mbuf size */
+#define IX_NPE_A_RXBITFIELD_CURRMBUFSIZE_GET( rxbitfield ) \
+((rxbitfield) & CURRMBUFSIZE_MASK)
+
+/** set the rxBitField mbuf size */
+#define IX_NPE_A_RXBITFIELD_CURRMBUFSIZE_SET( rxbitfield, currmbufsize ) \
+do { \
+ (rxbitfield) &= ~CURRMBUFSIZE_MASK; \
+ (rxbitfield) |= ((currmbufsize) & CURRMBUFSIZE_MASK); \
+} while(0)
+
+
+
+/**
+ * @brief Tx Descriptor definition
+ */
+typedef struct
+{
+ UINT8 port; /**< Tx Port number */
+ UINT8 aalType; /**< AAL Type */
+ UINT16 currMbufLen; /**< mbuf length */
+ UINT32 atmCellHeader; /**< ATM cell header */
+ IX_OSAL_MBUF *pCurrMbuf; /**< pointer to mbuf */
+ unsigned char *pCurrMbufData; /**< Pointer to mbuf->dat */
+ IX_OSAL_MBUF *pNextMbuf; /**< Pointer to next mbuf */
+ UINT32 totalLen; /**< Total Length */
+ UINT32 aal5CrcResidue; /**< AAL5 CRC Residue */
+} IxNpeA_TxAtmVc;
+
+/* Changes to field sizes or orders must be reflected in the offset
+ * definitions above. */
+
+
+
+
+/**
+ * @brief Rx Descriptor definition
+ */
+typedef struct
+{
+ UINT32 rxBitField; /**< Recieved bit field */
+ UINT32 atmCellHeader; /**< ATM Cell Header */
+ UINT32 rsvdWord0; /**< Reserved field */
+ UINT16 currMbufLen; /**< Mbuf Length */
+ UINT8 timeLimit; /**< Payload Reassembly timeLimit (used for aal0_xx only) */
+ UINT8 rsvdByte0; /**< Reserved field */
+ UINT32 rsvdWord1; /**< Reserved field */
+ IX_OSAL_MBUF *pCurrMbuf; /**< Pointer to current mbuf */
+ unsigned char *pCurrMbufData; /**< Pointer to current mbuf->data */
+ IX_OSAL_MBUF *pNextMbuf; /**< Pointer to next mbuf */
+ UINT32 totalLen; /**< Total Length */
+ UINT32 aal5CrcResidue; /**< AAL5 CRC Residue */
+} IxNpeA_RxAtmVc;
+
+
+/**
+ * @brief NPE-A AAL Type
+ */
+typedef enum
+{
+ IX_NPE_A_AAL_TYPE_INVALID = 0, /**< Invalid AAL type */
+ IX_NPE_A_AAL_TYPE_0_48 = 0x1, /**< AAL0 - 48 byte */
+ IX_NPE_A_AAL_TYPE_0_52 = 0x2, /**< AAL0 - 52 byte */
+ IX_NPE_A_AAL_TYPE_5 = 0x5, /**< AAL5 */
+ IX_NPE_A_AAL_TYPE_OAM = 0xF /**< OAM */
+} IxNpeA_AalType;
+
+/**
+ * @brief NPE-A Payload format 52-bytes & 48-bytes
+ */
+typedef enum
+{
+ IX_NPE_A_52_BYTE_PAYLOAD = 0, /**< 52 byte payload */
+ IX_NPE_A_48_BYTE_PAYLOAD /**< 48 byte payload */
+} IxNpeA_PayloadFormat;
+
+/**
+ * @brief HSS Packetized NpePacket Descriptor Structure
+ */
+typedef struct
+{
+ UINT8 status; /**< Status of the packet passed to the client */
+ UINT8 errorCount; /**< Number of errors */
+ UINT8 chainCount; /**< Mbuf chain count e.g. 0 - No mbuf chain */
+ UINT8 rsvdByte0; /**< Reserved byte to make the descriptor word align */
+
+ UINT16 packetLength; /**< Packet Length */
+ UINT16 rsvdShort0; /**< Reserved short to make the descriptor a word align */
+
+ IX_OSAL_MBUF *pRootMbuf; /**< Pointer to Root mbuf */
+ IX_OSAL_MBUF *pNextMbuf; /**< Pointer to next mbuf */
+ UINT8 *pMbufData; /**< Pointer to the current mbuf->data */
+ UINT32 mbufLength; /**< Current mbuf length */
+
+} IxNpeA_NpePacketDescriptor;
+
+
+#endif
+/**
+ *@}
+ */
+
+#endif /* __doxygen_HIDE */
diff --git a/cpu/ixp/npe/include/IxNpeDl.h b/cpu/ixp/npe/include/IxNpeDl.h
new file mode 100644
index 0000000000..86f69f4144
--- /dev/null
+++ b/cpu/ixp/npe/include/IxNpeDl.h
@@ -0,0 +1,980 @@
+/**
+ * @file IxNpeDl.h
+ *
+ * @date 14 December 2001
+
+ * @brief This file contains the public API of the IXP400 NPE Downloader
+ * component.
+ *
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+*/
+
+/**
+ * @defgroup IxNpeDl IXP400 NPE-Downloader (IxNpeDl) API
+ *
+ * @brief The Public API for the IXP400 NPE Downloader
+ *
+ * @{
+ */
+
+#ifndef IXNPEDL_H
+#define IXNPEDL_H
+
+/*
+ * Put the user defined include files required
+ */
+#include "IxOsalTypes.h"
+#include "IxNpeMicrocode.h"
+
+/*
+ * #defines for function return types, etc.
+ */
+
+/**
+ * @def IX_NPEDL_PARAM_ERR
+ *
+ * @brief NpeDl function return value for a parameter error
+ */
+#define IX_NPEDL_PARAM_ERR 2
+
+/**
+ * @def IX_NPEDL_RESOURCE_ERR
+ *
+ * @brief NpeDl function return value for a resource error
+ */
+#define IX_NPEDL_RESOURCE_ERR 3
+
+/**
+ * @def IX_NPEDL_CRITICAL_NPE_ERR
+ *
+ * @brief NpeDl function return value for a Critical NPE error occuring during
+ download. Assume NPE is left in unstable condition if this value is
+ returned or NPE is hang / halt.
+ */
+#define IX_NPEDL_CRITICAL_NPE_ERR 4
+
+/**
+ * @def IX_NPEDL_CRITICAL_MICROCODE_ERR
+ *
+ * @brief NpeDl function return value for a Critical Microcode error
+ * discovered during download. Assume NPE is left in unstable condition
+ * if this value is returned.
+ */
+#define IX_NPEDL_CRITICAL_MICROCODE_ERR 5
+
+/**
+ * @def IX_NPEDL_DEVICE_ERR
+ *
+ * @brief NpeDl function return value when image being downloaded
+ * is not meant for the device in use
+ */
+#define IX_NPEDL_DEVICE_ERR 6
+
+/**
+ * @defgroup NPEImageID IXP400 NPE Image ID Definition
+ *
+ * @ingroup IxNpeDl
+ *
+ * @brief Definition of NPE Image ID to be passed to ixNpeDlNpeInitAndStart()
+ * as input of type UINT32 which has the following fields format:
+ *
+ * Field [Bit Location] <BR>
+ * -------------------- <BR>
+ * Device ID [31 - 28] <BR>
+ * NPE ID [27 - 24] <BR>
+ * NPE Functionality ID [23 - 16] <BR>
+ * Major Release Number [15 - 8] <BR>
+ * Minor Release Number [7 - 0] <BR>
+ *
+ *
+ * @{
+ */
+
+/**
+ * @def IX_NPEDL_NPEIMAGE_FIELD_MASK
+ *
+ * @brief Mask for NPE Image ID's Field
+ *
+ * @warning <b>THIS #define HAS BEEN DEPRECATED AND SHOULD NOT BE USED.</b>
+ * It will be removed in a future release.
+ * See @ref ixNpeDlNpeInitAndStart for more information.
+ */
+#define IX_NPEDL_NPEIMAGE_FIELD_MASK 0xff
+
+/**
+ * @def IX_NPEDL_NPEIMAGE_NPEID_MASK
+ *
+ * @brief Mask for NPE Image NPE ID's Field
+ *
+ */
+#define IX_NPEDL_NPEIMAGE_NPEID_MASK 0xf
+
+/**
+ * @def IX_NPEDL_NPEIMAGE_DEVICEID_MASK
+ *
+ * @brief Mask for NPE Image Device ID's Field
+ *
+ */
+#define IX_NPEDL_NPEIMAGE_DEVICEID_MASK 0xf
+
+/**
+ * @def IX_NPEDL_NPEIMAGE_BIT_LOC_NPEID
+ *
+ * @brief Location of NPE ID field in term of bit.
+ *
+ * @warning <b>THIS #define HAS BEEN DEPRECATED AND SHOULD NOT BE USED.</b>
+ * It will be removed in a future release.
+ * See @ref ixNpeDlNpeInitAndStart for more information.
+ */
+#define IX_NPEDL_NPEIMAGE_BIT_LOC_NPEID 24
+
+/**
+ * @def IX_NPEDL_NPEIMAGE_BIT_LOC_FUNCTIONALITYID
+ *
+ * @brief Location of Functionality ID field in term of bit.
+ *
+ * @warning <b>THIS #define HAS BEEN DEPRECATED AND SHOULD NOT BE USED.</b>
+ * It will be removed in a future release.
+ * See @ref ixNpeDlNpeInitAndStart for more information.
+ */
+#define IX_NPEDL_NPEIMAGE_BIT_LOC_FUNCTIONALITYID 16
+
+/**
+ * @def IX_NPEDL_NPEIMAGE_BIT_LOC_MAJOR
+ *
+ * @brief Location of Major Release Number field in term of bit.
+ *
+ * @warning <b>THIS #define HAS BEEN DEPRECATED AND SHOULD NOT BE USED.</b>
+ * It will be removed in a future release.
+ * See @ref ixNpeDlNpeInitAndStart for more information.
+ */
+#define IX_NPEDL_NPEIMAGE_BIT_LOC_MAJOR 8
+
+/**
+ * @def IX_NPEDL_NPEIMAGE_BIT_LOC_MINOR
+ *
+ * @brief Location of Minor Release Number field in term of bit.
+ *
+ * @warning <b>THIS #define HAS BEEN DEPRECATED AND SHOULD NOT BE USED.</b>
+ * It will be removed in a future release.
+ * See @ref ixNpeDlNpeInitAndStart for more information.
+ */
+#define IX_NPEDL_NPEIMAGE_BIT_LOC_MINOR 0
+
+/**
+ * @} addtogroup NPEImageID
+ */
+
+/**
+ * @def ixNpeDlMicrocodeImageOverride(x)
+ *
+ * @brief Map old terminology that uses term "image" to new term
+ * "image library"
+ *
+ * @warning <b>THIS #define HAS BEEN DEPRECATED AND SHOULD NOT BE USED.</b>
+ * It will be removed in a future release.
+ * See @ref ixNpeDlNpeInitAndStart for more information.
+ */
+#define ixNpeDlMicrocodeImageOverride(x) ixNpeDlMicrocodeImageLibraryOverride(x)
+
+/**
+ * @def IxNpeDlVersionId
+ *
+ * @brief Map old terminology that uses term "version" to new term
+ * "image"
+ *
+ * @warning <b>THIS #define HAS BEEN DEPRECATED AND SHOULD NOT BE USED.</b>
+ * It will be removed in a future release.
+ * See @ref ixNpeDlNpeInitAndStart for more information.
+ */
+#define IxNpeDlVersionId IxNpeDlImageId
+
+/**
+ * @def ixNpeDlVersionDownload
+ *
+ * @brief Map old terminology that uses term "version" to new term
+ * "image"
+ *
+ * @warning <b>THIS #define HAS BEEN DEPRECATED AND SHOULD NOT BE USED.</b>
+ * It will be removed in a future release.
+ * See @ref ixNpeDlNpeInitAndStart for more information.
+ */
+#define ixNpeDlVersionDownload(x,y) ixNpeDlImageDownload(x,y)
+
+/**
+ * @def ixNpeDlAvailableVersionsCountGet
+ *
+ * @brief Map old terminology that uses term "version" to new term
+ * "image"
+ *
+ * @warning <b>THIS #define HAS BEEN DEPRECATED AND SHOULD NOT BE USED.</b>
+ * It will be removed in a future release.
+ * See @ref ixNpeDlNpeInitAndStart for more information.
+ */
+#define ixNpeDlAvailableVersionsCountGet(x) ixNpeDlAvailableImagesCountGet(x)
+
+/**
+ * @def ixNpeDlAvailableVersionsListGet
+ *
+ * @brief Map old terminology that uses term "version" to new term
+ * "image"
+ *
+ * @warning <b>THIS #define HAS BEEN DEPRECATED AND SHOULD NOT BE USED.</b>
+ * It will be removed in a future release.
+ * See @ref ixNpeDlNpeInitAndStart for more information.
+ */
+#define ixNpeDlAvailableVersionsListGet(x,y) ixNpeDlAvailableImagesListGet(x,y)
+
+ /**
+ * @def ixNpeDlLoadedVersionGet
+ *
+ * @brief Map old terminology that uses term "version" to new term
+ * "image"
+ *
+ * @warning <b>THIS #define HAS BEEN DEPRECATED AND SHOULD NOT BE USED.</b>
+ * It will be removed in a future release.
+ * See @ref ixNpeDlNpeInitAndStart for more information.
+ */
+#define ixNpeDlLoadedVersionGet(x,y) ixNpeDlLoadedImageGet(x,y)
+
+ /**
+ * @def clientImage
+ *
+ * @brief Map old terminology that uses term "image" to new term
+ * "image library"
+ *
+ * @warning <b>THIS #define HAS BEEN DEPRECATED AND SHOULD NOT BE USED.</b>
+ * It will be removed in a future release.
+ * See @ref ixNpeDlNpeInitAndStart for more information.
+ */
+#define clientImage clientImageLibrary
+
+ /**
+ * @def versionIdPtr
+ *
+ * @brief Map old terminology that uses term "version" to new term
+ * "image"
+ *
+ * @warning <b>THIS #define HAS BEEN DEPRECATED AND SHOULD NOT BE USED.</b>
+ * It will be removed in a future release.
+ * See @ref ixNpeDlNpeInitAndStart for more information.
+ */
+#define versionIdPtr imageIdPtr
+
+ /**
+ * @def numVersionsPtr
+ *
+ * @brief Map old terminology that uses term "version" to new term
+ * "image"
+ *
+ * @warning <b>THIS #define HAS BEEN DEPRECATED AND SHOULD NOT BE USED.</b>
+ * It will be removed in a future release.
+ * See @ref ixNpeDlNpeInitAndStart for more information.
+ */
+#define numVersionsPtr numImagesPtr
+
+/**
+ * @def versionIdListPtr
+ *
+ * @brief Map old terminology that uses term "version" to new term
+ * "image"
+ *
+ * @warning <b>THIS #define HAS BEEN DEPRECATED AND SHOULD NOT BE USED.</b>
+ * It will be removed in a future release.
+ * See @ref ixNpeDlNpeInitAndStart for more information.
+ */
+#define versionIdListPtr imageIdListPtr
+
+/**
+ * @def IxNpeDlBuildId
+ *
+ * @brief Map old terminology that uses term "buildId" to new term
+ * "functionalityId"
+ *
+ * @warning <b>THIS #define HAS BEEN DEPRECATED AND SHOULD NOT BE USED.</b>
+ * It will be removed in a future release.
+ * See @ref ixNpeDlNpeInitAndStart for more information.
+ */
+#define IxNpeDlBuildId IxNpeDlFunctionalityId
+
+/**
+ * @def buildId
+ *
+ * @brief Map old terminology that uses term "buildId" to new term
+ * "functionalityId"
+ *
+ * @warning <b>THIS #define HAS BEEN DEPRECATED AND SHOULD NOT BE USED.</b>
+ * It will be removed in a future release.
+ * See @ref ixNpeDlNpeInitAndStart for more information.
+ */
+#define buildId functionalityId
+
+/**
+ * @def IX_NPEDL_MicrocodeImage
+ *
+ * @brief Map old terminology that uses term "image" to new term
+ * "image library"
+ *
+ * @warning <b>THIS #define HAS BEEN DEPRECATED AND SHOULD NOT BE USED.</b>
+ * It will be removed in a future release.
+ * See @ref ixNpeDlNpeInitAndStart for more information.
+ */
+#define IX_NPEDL_MicrocodeImage IX_NPEDL_MicrocodeImageLibrary
+
+/*
+ * Typedefs
+ */
+
+/**
+ * @typedef IxNpeDlFunctionalityId
+ * @brief Used to make up Functionality ID field of Image Id
+ *
+ * @warning <b>THIS typedef HAS BEEN DEPRECATED AND SHOULD NOT BE USED.</b>
+ * It will be removed in a future release.
+ * See @ref ixNpeDlNpeInitAndStart for more information.
+ */
+typedef UINT8 IxNpeDlFunctionalityId;
+
+/**
+ * @typedef IxNpeDlMajor
+ * @brief Used to make up Major Release field of Image Id
+ *
+ * @warning <b>THIS typedef HAS BEEN DEPRECATED AND SHOULD NOT BE USED.</b>
+ * It will be removed in a future release.
+ * See @ref ixNpeDlNpeInitAndStart for more information.
+ */
+typedef UINT8 IxNpeDlMajor;
+
+/**
+ * @typedef IxNpeDlMinor
+ * @brief Used to make up Minor Revision field of Image Id
+ *
+ * @warning <b>THIS typedef HAS BEEN DEPRECATED AND SHOULD NOT BE USED.</b>
+ * It will be removed in a future release.
+ * See @ref ixNpeDlNpeInitAndStart for more information.
+ */
+typedef UINT8 IxNpeDlMinor;
+
+/*
+ * Enums
+ */
+
+/**
+ * @brief NpeId numbers to identify NPE A, B or C
+ * @note In this context, for IXP425 Silicon (B0):<br>
+ * - NPE-A has HDLC, HSS, AAL and UTOPIA Coprocessors.<br>
+ * - NPE-B has Ethernet Coprocessor.<br>
+ * - NPE-C has Ethernet, AES, DES and HASH Coprocessors.<br>
+ * - IXP400 Product Line have different combinations of coprocessors.
+ */
+typedef enum
+{
+ IX_NPEDL_NPEID_NPEA = 0, /**< Identifies NPE A */
+ IX_NPEDL_NPEID_NPEB, /**< Identifies NPE B */
+ IX_NPEDL_NPEID_NPEC, /**< Identifies NPE C */
+ IX_NPEDL_NPEID_MAX /**< Total Number of NPEs */
+} IxNpeDlNpeId;
+
+/*
+ * Structs
+ */
+
+/**
+ * @brief Image Id to identify each image contained in an image library
+ *
+ * @warning <b>THIS struct HAS BEEN DEPRECATED AND SHOULD NOT BE USED.</b>
+ * It will be removed in a future release.
+ * See @ref ixNpeDlNpeInitAndStart for more information.
+ */
+typedef struct
+{
+ IxNpeDlNpeId npeId; /**< NPE ID */
+ IxNpeDlFunctionalityId functionalityId; /**< Build ID indicates functionality of image */
+ IxNpeDlMajor major; /**< Major Release Number */
+ IxNpeDlMinor minor; /**< Minor Revision Number */
+} IxNpeDlImageId;
+
+/*
+ * Prototypes for interface functions
+ */
+
+/**
+ * @ingroup IxNpeDl
+ *
+ * @fn PUBLIC IX_STATUS ixNpeDlNpeInitAndStart (UINT32 imageId)
+ *
+ * @brief Stop, reset, download microcode (firmware) and finally start NPE.
+ *
+ * @param imageId UINT32 [in] - Id of the microcode image to download.
+ *
+ * This function locates the image specified by the <i>imageId</i> parameter
+ * from the default microcode image library which is included internally by
+ * this component.
+ * It then stops and resets the NPE, loads the firmware image onto the NPE,
+ * and then restarts the NPE.
+ *
+ * @note A list of valid image IDs is included in this header file.
+ * See #defines with prefix IX_NPEDL_NPEIMAGE_...
+ *
+ * @note This function, along with @ref ixNpeDlCustomImageNpeInitAndStart
+ * and @ref ixNpeDlLoadedImageFunctionalityGet, supercedes the following
+ * functions which are deprecated and will be removed completely in a
+ * future release:
+ * - @ref ixNpeDlImageDownload
+ * - @ref ixNpeDlAvailableImagesCountGet
+ * - @ref ixNpeDlAvailableImagesListGet
+ * - @ref ixNpeDlLatestImageGet
+ * - @ref ixNpeDlLoadedImageGet
+ * - @ref ixNpeDlMicrocodeImageLibraryOverride
+ * - @ref ixNpeDlNpeExecutionStop
+ * - @ref ixNpeDlNpeStopAndReset
+ * - @ref ixNpeDlNpeExecutionStart
+ *
+ * @pre
+ * - The Client is responsible for ensuring mutual access to the NPE.
+ * @post
+ * - The NPE Instruction Pipeline will be cleared if State Information
+ * has been downloaded.
+ * - If the download fails with a critical error, the NPE may
+ * be left in an ususable state.
+ * @return
+ * - IX_SUCCESS if the download was successful;
+ * - IX_NPEDL_PARAM_ERR if a parameter error occured
+ * - IX_NPEDL_CRITICAL_NPE_ERR if a critical NPE error occured during
+ * download
+ * - IX_NPEDL_CRITICAL_MICROCODE_ERR if a critical microcode error
+ * occured during download
+ * - IX_NPEDL_DEVICE_ERR if the image being loaded is not meant for
+ * the device currently running.
+ * - IX_FAIL if NPE is not available or image is failed to be located.
+ * A warning is issued if the NPE is not present.
+ */
+PUBLIC IX_STATUS
+ixNpeDlNpeInitAndStart (UINT32 npeImageId);
+
+/**
+ * @ingroup IxNpeDl
+ *
+ * @fn PUBLIC IX_STATUS ixNpeDlCustomImageNpeInitAndStart (UINT32 *imageLibrary,
+ UINT32 imageId)
+ *
+ * @brief Stop, reset, download microcode (firmware) and finally start NPE
+ *
+ * @param imageId UINT32 [in] - Id of the microcode image to download.
+ *
+ * This function locates the image specified by the <i>imageId</i> parameter
+ * from the specified microcode image library which is pointed to by the
+ * <i>imageLibrary</i> parameter.
+ * It then stops and resets the NPE, loads the firmware image onto the NPE,
+ * and then restarts the NPE.
+ *
+ * This is a facility for users who wish to use an image from an external
+ * library of NPE firmware images. To use a standard image from the
+ * built-in library, see @ref ixNpeDlNpeInitAndStart instead.
+ *
+ * @note A list of valid image IDs is included in this header file.
+ * See #defines with prefix IX_NPEDL_NPEIMAGE_...
+ *
+ * @note This function, along with @ref ixNpeDlNpeInitAndStart
+ * and @ref ixNpeDlLoadedImageFunctionalityGet, supercedes the following
+ * functions which are deprecated and will be removed completely in a
+ * future release:
+ * - @ref ixNpeDlImageDownload
+ * - @ref ixNpeDlAvailableImagesCountGet
+ * - @ref ixNpeDlAvailableImagesListGet
+ * - @ref ixNpeDlLatestImageGet
+ * - @ref ixNpeDlLoadedImageGet
+ * - @ref ixNpeDlMicrocodeImageLibraryOverride
+ * - @ref ixNpeDlNpeExecutionStop
+ * - @ref ixNpeDlNpeStopAndReset
+ * - @ref ixNpeDlNpeExecutionStart
+ *
+ * @pre
+ * - The Client is responsible for ensuring mutual access to the NPE.
+ * - The image library supplied must be in the correct format for use
+ * by the NPE Downloader (IxNpeDl) component. Details of the library
+ * format are contained in the Functional Specification document for
+ * IxNpeDl.
+ * @post
+ * - The NPE Instruction Pipeline will be cleared if State Information
+ * has been downloaded.
+ * - If the download fails with a critical error, the NPE may
+ * be left in an ususable state.
+ * @return
+ * - IX_SUCCESS if the download was successful;
+ * - IX_NPEDL_PARAM_ERR if a parameter error occured
+ * - IX_NPEDL_CRITICAL_NPE_ERR if a critical NPE error occured during
+ * download
+ * - IX_NPEDL_CRITICAL_MICROCODE_ERR if a critical microcode error
+ * occured during download
+ * - IX_NPEDL_DEVICE_ERR if the image being loaded is not meant for
+ * the device currently running.
+ * - IX_FAIL if NPE is not available or image is failed to be located.
+ * A warning is issued if the NPE is not present.
+ */
+PUBLIC IX_STATUS
+ixNpeDlCustomImageNpeInitAndStart (UINT32 *imageLibrary,
+ UINT32 npeImageId);
+
+
+/**
+ * @ingroup IxNpeDl
+ *
+ * @fn PUBLIC IX_STATUS ixNpeDlLoadedImageFunctionalityGet (IxNpeDlNpeId npeId,
+ UINT8 *functionalityId)
+ *
+ * @brief Gets the functionality of the image last loaded on a particular NPE
+ *
+ * @param npeId @ref IxNpeDlNpeId [in] - Id of the target NPE.
+ * @param functionalityId UINT8* [out] - the functionality ID of the image
+ * last loaded on the NPE.
+ *
+ * This function retrieves the functionality ID of the image most recently
+ * downloaded successfully to the specified NPE. If the NPE does not contain
+ * a valid image, this function returns a FAIL status.
+ *
+ * @warning This function is not intended for general use, as a knowledge of
+ * how to interpret the functionality ID is required. As such, this function
+ * should only be used by other Access Layer components of the IXP400 Software
+ * Release.
+ *
+ * @pre
+ *
+ * @post
+ *
+ * @return
+ * - IX_SUCCESS if the operation was successful
+ * - IX_NPEDL_PARAM_ERR if a parameter error occured
+ * - IX_FAIL if the NPE does not have a valid image loaded
+ */
+PUBLIC IX_STATUS
+ixNpeDlLoadedImageFunctionalityGet (IxNpeDlNpeId npeId,
+ UINT8 *functionalityId);
+
+
+/**
+ * @ingroup IxNpeDl
+ *
+ * @fn IX_STATUS ixNpeDlMicrocodeImageLibraryOverride (UINT32 *clientImageLibrary)
+ *
+ * @brief This instructs NPE Downloader to use client-supplied microcode image library.
+ *
+ * @param clientImageLibrary UINT32* [in] - Pointer to the client-supplied
+ * NPE microcode image library
+ *
+ * This function sets NPE Downloader to use a client-supplied microcode image library
+ * instead of the standard image library which is included by the NPE Downloader.
+ * <b>This function is provided mainly for increased testability and should not
+ * be used in normal circumstances.</b> When not used, NPE Downloader will use
+ * a "built-in" image library, local to this component, which should always contain the
+ * latest microcode for the NPEs.
+ *
+ * @warning <b>THIS FUNCTION HAS BEEN DEPRECATED AND SHOULD NOT BE USED.</b>
+ * It will be removed in a future release.
+ * See @ref ixNpeDlCustomImageNpeInitAndStart.
+ *
+ * @pre
+ * - <i>clientImageLibrary</i> should point to a microcode image library valid for use
+ * by the NPE Downloader component.
+ *
+ * @post
+ * - the client-supplied image library will be used for all subsequent operations
+ * performed by the NPE Downloader
+ *
+ * @return
+ * - IX_SUCCESS if the operation was successful
+ * - IX_NPEDL_PARAM_ERR if a parameter error occured
+ * - IX_FAIL if the client-supplied image library did not contain a valid signature
+ */
+PUBLIC IX_STATUS
+ixNpeDlMicrocodeImageLibraryOverride (UINT32 *clientImageLibrary);
+
+/**
+ * @ingroup IxNpeDl
+ *
+ * @fn PUBLIC IX_STATUS ixNpeDlImageDownload (IxNpeDlImageId *imageIdPtr,
+ BOOL verify)
+ *
+ * @brief Stop, reset, download microcode and finally start NPE.
+ *
+ * @param imageIdPtr @ref IxNpeDlImageId* [in] - Pointer to Id of the microcode
+ * image to download.
+ * @param verify BOOL [in] - ON/OFF option to verify the download. If ON
+ * (verify == TRUE), the Downloader will read back
+ * each word written to the NPE registers to
+ * ensure the download operation was successful.
+ *
+ * Using the <i>imageIdPtr</i>, this function locates a particular image of
+ * microcode in the microcode image library in memory, and downloads the microcode
+ * to a particular NPE.
+ *
+ * @warning <b>THIS FUNCTION HAS BEEN DEPRECATED AND SHOULD NOT BE USED.</b>
+ * It will be removed in a future release.
+ * See @ref ixNpeDlNpeInitAndStart and @ref ixNpeDlCustomImageNpeInitAndStart.
+ *
+ * @pre
+ * - The Client is responsible for ensuring mutual access to the NPE.
+ * - The Client should use ixNpeDlLatestImageGet() to obtain the latest
+ * version of the image before attempting download.
+ * @post
+ * - The NPE Instruction Pipeline will be cleared if State Information
+ * has been downloaded.
+ * - If the download fails with a critical error, the NPE may
+ * be left in an ususable state.
+ * @return
+ * - IX_SUCCESS if the download was successful;
+ * - IX_NPEDL_PARAM_ERR if a parameter error occured
+ * - IX_NPEDL_CRITICAL_NPE_ERR if a critical NPE error occured during
+ * download
+ * - IX_PARAM_CRITICAL_MICROCODE_ERR if a critical microcode error
+ * occured during download
+ * - IX_FAIL if NPE is not available or image is failed to be located.
+ * A warning is issued if the NPE is not present.
+ */
+PUBLIC IX_STATUS
+ixNpeDlImageDownload (IxNpeDlImageId *imageIdPtr,
+ BOOL verify);
+
+/**
+ * @ingroup IxNpeDl
+ *
+ * @fn PUBLIC IX_STATUS ixNpeDlAvailableImagesCountGet (UINT32 *numImagesPtr)
+ *
+ * @brief Get the number of Images available in a microcode image library
+ *
+ * @param numImagesPtr UINT32* [out] - A pointer to the number of images in
+ * the image library.
+ *
+ * Gets the number of images available in the microcode image library.
+ * Then returns this in a variable pointed to by <i>numImagesPtr</i>.
+ *
+ * @warning <b>THIS FUNCTION HAS BEEN DEPRECATED AND SHOULD NOT BE USED.</b>
+ * It will be removed in a future release.
+ * See @ref ixNpeDlNpeInitAndStart and @ref ixNpeDlCustomImageNpeInitAndStart.
+ *
+ * @pre
+ * - The Client should declare the variable to which numImagesPtr points
+ *
+ * @post
+ *
+ * @return
+ * - IX_SUCCESS if the operation was successful
+ * - IX_NPEDL_PARAM_ERR if a parameter error occured
+ * - IX_FAIL otherwise
+ */
+PUBLIC IX_STATUS
+ixNpeDlAvailableImagesCountGet (UINT32 *numImagesPtr);
+
+/**
+ * @ingroup IxNpeDl
+ *
+ * @fn PUBLIC IX_STATUS ixNpeDlAvailableImagesListGet (IxNpeDlImageId *imageIdListPtr,
+ UINT32 *listSizePtr)
+ *
+ * @brief Get a list of the images available in a microcode image library
+ *
+ * @param imageIdListPtr @ref IxNpeDlImageId* [out] - Array to contain list of
+ * image Ids (memory
+ * allocated by Client).
+ * @param listSizePtr UINT32* [inout] - As an input, this param should point
+ * to the max number of Ids the
+ * <i>imageIdListPtr</i> array can
+ * hold. NpeDl will replace the input
+ * value of this parameter with the
+ * number of image Ids actually filled
+ * into the array before returning.
+ *
+ * Finds list of images available in the microcode image library.
+ * Fills these into the array pointed to by <i>imageIdListPtr</i>
+ *
+ * @warning <b>THIS FUNCTION HAS BEEN DEPRECATED AND SHOULD NOT BE USED.</b>
+ * It will be removed in a future release.
+ * See @ref ixNpeDlNpeInitAndStart and @ref ixNpeDlCustomImageNpeInitAndStart.
+ *
+ * @pre
+ * - The Client should declare the variable to which numImagesPtr points
+ * - The Client should create an array (<i>imageIdListPtr</i>) large
+ * enough to contain all the image Ids in the image library
+ *
+ * @post
+ *
+ * @return
+ * - IX_SUCCESS if the operation was successful
+ * - IX_NPEDL_PARAM_ERR if a parameter error occured
+ * - IX_FAIL otherwise
+ */
+PUBLIC IX_STATUS
+ixNpeDlAvailableImagesListGet (IxNpeDlImageId *imageIdListPtr,
+ UINT32 *listSizePtr);
+
+/**
+ * @ingroup IxNpeDl
+ *
+ * @fn PUBLIC IX_STATUS ixNpeDlLoadedImageGet (IxNpeDlNpeId npeId,
+ IxNpeDlImageId *imageIdPtr)
+ *
+ * @brief Gets the Id of the image currently loaded on a particular NPE
+ *
+ * @param npeId @ref IxNpeDlNpeId [in] - Id of the target NPE.
+ * @param imageIdPtr @ref IxNpeDlImageId* [out] - Pointer to the where the
+ * image id should be stored.
+ *
+ * If an image of microcode was previously downloaded successfully to the NPE
+ * by NPE Downloader, this function returns in <i>imageIdPtr</i> the image
+ * Id of that image loaded on the NPE.
+ *
+ * @pre
+ * - The Client has allocated memory to the <i>imageIdPtr</i> pointer.
+ *
+ * @post
+ *
+ * @return
+ * - IX_SUCCESS if the operation was successful
+ * - IX_NPEDL_PARAM_ERR if a parameter error occured
+ * - IX_FAIL if the NPE doesn't currently have a image loaded
+ */
+PUBLIC IX_STATUS
+ixNpeDlLoadedImageGet (IxNpeDlNpeId npeId,
+ IxNpeDlImageId *imageIdPtr);
+
+/**
+ * @fn PUBLIC IX_STATUS ixNpeDlLatestImageGet (IxNpeDlNpeId npeId, IxNpeDlFunctionalityId
+ functionalityId, IxNpeDlImageId *imageIdPtr)
+ *
+ * @brief This instructs NPE Downloader to get Id of the latest version for an
+ * image that is specified by the client.
+ *
+ * @param npeId @ref IxNpeDlNpeId [in] - Id of the target NPE.
+ * @param functionalityId @ref IxNpeDlFunctionalityId [in] - functionality of the image
+ * @param imageIdPtr @ref IxNpeDlImageId* [out] - Pointer to the where the
+ * image id should be stored.
+ *
+ * This function sets NPE Downloader to return the id of the latest version for
+ * image. The user will select the image by providing a particular NPE
+ * (specifying <i>npeId</i>) with particular functionality (specifying
+ * <i>FunctionalityId</i>). The most recent version available as determined by the
+ * highest Major and Minor revision numbers is returned in <i>imageIdPtr</i>.
+ *
+ * @warning <b>THIS FUNCTION HAS BEEN DEPRECATED AND SHOULD NOT BE USED.</b>
+ * It will be removed in a future release.
+ * See @ref ixNpeDlNpeInitAndStart and @ref ixNpeDlCustomImageNpeInitAndStart.
+ *
+ * @return
+ * - IX_SUCCESS if the operation was successful
+ * - IX_NPEDL_PARAM_ERR if a parameter error occured
+ * - IX_FAIL otherwise
+ */
+PUBLIC IX_STATUS
+ixNpeDlLatestImageGet (IxNpeDlNpeId npeId,
+ IxNpeDlFunctionalityId functionalityId,
+ IxNpeDlImageId *imageIdPtr);
+
+/**
+ * @ingroup IxNpeDl
+ *
+ * @fn PUBLIC IX_STATUS ixNpeDlNpeStopAndReset (IxNpeDlNpeId npeId)
+ *
+ * @brief Stops and Resets an NPE
+ *
+ * @param npeId @ref IxNpeDlNpeId [in] - Id of the target NPE.
+ *
+ * This function performs a soft NPE reset by writing reset values to
+ * particular NPE registers. Note that this does not reset NPE co-processors.
+ * This implicitly stops NPE code execution before resetting the NPE.
+ *
+ * @note It is no longer necessary to call this function before downloading
+ * a new image to the NPE. It is left on the API only to allow greater control
+ * of NPE execution if required. Where appropriate, use @ref ixNpeDlNpeInitAndStart
+ * or @ref ixNpeDlCustomImageNpeInitAndStart instead.
+ *
+ * @warning <b>THIS FUNCTION HAS BEEN DEPRECATED AND SHOULD NOT BE USED.</b>
+ * It will be removed in a future release.
+ * See @ref ixNpeDlNpeInitAndStart and @ref ixNpeDlCustomImageNpeInitAndStart.
+ *
+ * @pre
+ * - The Client is responsible for ensuring mutual access to the NPE.
+ *
+ * @post
+ *
+ * @return
+ * - IX_SUCCESS if the operation was successful
+ * - IX_NPEDL_PARAM_ERR if a parameter error occured
+ * - IX_FAIL otherwise
+ * - IX_NPEDL_CRITICAL_NPE_ERR failed to reset NPE due to timeout error.
+ * Timeout error could happen if NPE hang
+ */
+PUBLIC IX_STATUS
+ixNpeDlNpeStopAndReset (IxNpeDlNpeId npeId);
+
+/**
+ * @ingroup IxNpeDl
+ *
+ * @fn PUBLIC IX_STATUS ixNpeDlNpeExecutionStart (IxNpeDlNpeId npeId)
+ *
+ * @brief Starts code execution on a NPE
+ *
+ * @param npeId @ref IxNpeDlNpeId [in] - Id of the target NPE
+ *
+ * Starts execution of code on a particular NPE. A client would typically use
+ * this after a download to NPE is performed, to start/restart code execution
+ * on the NPE.
+ *
+ * @note It is no longer necessary to call this function after downloading
+ * a new image to the NPE. It is left on the API only to allow greater control
+ * of NPE execution if required. Where appropriate, use @ref ixNpeDlNpeInitAndStart
+ * or @ref ixNpeDlCustomImageNpeInitAndStart instead.
+ *
+ * @warning <b>THIS FUNCTION HAS BEEN DEPRECATED AND SHOULD NOT BE USED.</b>
+ * It will be removed in a future release.
+ * See @ref ixNpeDlNpeInitAndStart and @ref ixNpeDlCustomImageNpeInitAndStart.
+ *
+ * @pre
+ * - The Client is responsible for ensuring mutual access to the NPE.
+ * - Note that this function does not set the NPE Next Program Counter
+ * (NextPC), so it should be set beforehand if required by downloading
+ * appropriate State Information (using ixNpeDlVersionDownload()).
+ *
+ * @post
+ *
+ * @return
+ * - IX_SUCCESS if the operation was successful
+ * - IX_NPEDL_PARAM_ERR if a parameter error occured
+ * - IX_FAIL otherwise
+ */
+PUBLIC IX_STATUS
+ixNpeDlNpeExecutionStart (IxNpeDlNpeId npeId);
+
+/**
+ * @ingroup IxNpeDl
+ *
+ * @fn PUBLIC IX_STATUS ixNpeDlNpeExecutionStop (IxNpeDlNpeId npeId)
+ *
+ * @brief Stops code execution on a NPE
+ *
+ * @param npeId @ref IxNpeDlNpeId [in] - Id of the target NPE
+ *
+ * Stops execution of code on a particular NPE. This would typically be used
+ * by a client before a download to NPE is performed, to stop code execution on
+ * an NPE, unless ixNpeDlNpeStopAndReset() is used instead. Unlike
+ * ixNpeDlNpeStopAndReset(), this function only halts the NPE and leaves
+ * all registers and settings intact. This is useful, for example, between
+ * stages of a multi-stage download, to stop the NPE prior to downloading the
+ * next image while leaving the current state of the NPE intact..
+ *
+ * @warning <b>THIS FUNCTION HAS BEEN DEPRECATED AND SHOULD NOT BE USED.</b>
+ * It will be removed in a future release.
+ * See @ref ixNpeDlNpeInitAndStart and @ref ixNpeDlCustomImageNpeInitAndStart.
+ *
+ * @pre
+ * - The Client is responsible for ensuring mutual access to the NPE.
+ *
+ * @post
+ *
+ * @return
+ * - IX_SUCCESS if the operation was successful
+ * - IX_NPEDL_PARAM_ERR if a parameter error occured
+ * - IX_FAIL otherwise
+ */
+PUBLIC IX_STATUS
+ixNpeDlNpeExecutionStop (IxNpeDlNpeId npeId);
+
+/**
+ * @ingroup IxNpeDl
+ *
+ * @fn PUBLIC IX_STATUS ixNpeDlUnload (void)
+ *
+ * @brief This function will uninitialise the IxNpeDl component.
+ *
+ * This function will uninitialise the IxNpeDl component. It should only be
+ * called once, and only if the IxNpeDl component has already been initialised by
+ * calling any of the following functions:
+ * - @ref ixNpeDlNpeInitAndStart
+ * - @ref ixNpeDlCustomImageNpeInitAndStart
+ * - @ref ixNpeDlImageDownload (deprecated)
+ * - @ref ixNpeDlNpeStopAndReset (deprecated)
+ * - @ref ixNpeDlNpeExecutionStop (deprecated)
+ * - @ref ixNpeDlNpeExecutionStart (deprecated)
+ *
+ * If possible, this function should be called before a soft reboot or unloading
+ * a kernel module to perform any clean up operations required for IxNpeDl.
+ *
+ * The following actions will be performed by this function:
+ * - Unmapping of any kernel memory mapped by IxNpeDl
+ *
+ * @return
+ * - IX_SUCCESS if the operation was successful
+ * - IX_FAIL otherwise
+ */
+
+PUBLIC IX_STATUS
+ixNpeDlUnload (void);
+
+/**
+ * @ingroup IxNpeDl
+ *
+ * @fn PUBLIC void ixNpeDlStatsShow (void)
+ *
+ * @brief This function will display run-time statistics from the IxNpeDl
+ * component
+ *
+ * @return none
+ */
+PUBLIC void
+ixNpeDlStatsShow (void);
+
+/**
+ * @ingroup IxNpeDl
+ *
+ * @fn PUBLIC void ixNpeDlStatsReset (void)
+ *
+ * @brief This function will reset the statistics of the IxNpeDl component
+ *
+ * @return none
+ */
+PUBLIC void
+ixNpeDlStatsReset (void);
+
+#endif /* IXNPEDL_H */
+
+/**
+ * @} defgroup IxNpeDl
+ */
+
+
diff --git a/cpu/ixp/npe/include/IxNpeDlImageMgr_p.h b/cpu/ixp/npe/include/IxNpeDlImageMgr_p.h
new file mode 100644
index 0000000000..622f879a41
--- /dev/null
+++ b/cpu/ixp/npe/include/IxNpeDlImageMgr_p.h
@@ -0,0 +1,363 @@
+/**
+ * @file IxNpeDlImageMgr_p.h
+ *
+ * @author Intel Corporation
+ * @date 14 December 2001
+
+ * @brief This file contains the private API for the ImageMgr module
+ *
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+*/
+
+/**
+ * @defgroup IxNpeDlImageMgr_p IxNpeDlImageMgr_p
+ *
+ * @brief The private API for the IxNpeDl ImageMgr module
+ *
+ * @{
+ */
+
+#ifndef IXNPEDLIMAGEMGR_P_H
+#define IXNPEDLIMAGEMGR_P_H
+
+
+/*
+ * Put the user defined include files required.
+ */
+#include "IxNpeDl.h"
+#include "IxOsalTypes.h"
+
+
+/*
+ * #defines and macros
+ */
+
+/**
+ * @def IX_NPEDL_IMAGEMGR_SIGNATURE
+ *
+ * @brief Signature found as 1st word in a microcode image library
+ */
+#define IX_NPEDL_IMAGEMGR_SIGNATURE 0xDEADBEEF
+
+/**
+ * @def IX_NPEDL_IMAGEMGR_END_OF_HEADER
+ *
+ * @brief Marks end of header in a microcode image library
+ */
+#define IX_NPEDL_IMAGEMGR_END_OF_HEADER 0xFFFFFFFF
+
+/**
+ * @def IX_NPEDL_IMAGEID_NPEID_OFFSET
+ *
+ * @brief Offset from LSB of NPE ID field in Image ID
+ */
+#define IX_NPEDL_IMAGEID_NPEID_OFFSET 24
+
+/**
+ * @def IX_NPEDL_IMAGEID_DEVICEID_OFFSET
+ *
+ * @brief Offset from LSB of Device ID field in Image ID
+ */
+#define IX_NPEDL_IMAGEID_DEVICEID_OFFSET 28
+
+/**
+ * @def IX_NPEDL_IMAGEID_FUNCTIONID_OFFSET
+ *
+ * @brief Offset from LSB of Functionality ID field in Image ID
+ */
+#define IX_NPEDL_IMAGEID_FUNCTIONID_OFFSET 16
+
+/**
+ * @def IX_NPEDL_IMAGEID_MAJOR_OFFSET
+ *
+ * @brief Offset from LSB of Major revision field in Image ID
+ */
+#define IX_NPEDL_IMAGEID_MAJOR_OFFSET 8
+
+/**
+ * @def IX_NPEDL_IMAGEID_MINOR_OFFSET
+ *
+ * @brief Offset from LSB of Minor revision field in Image ID
+ */
+#define IX_NPEDL_IMAGEID_MINOR_OFFSET 0
+
+
+/**
+ * @def IX_NPEDL_NPEID_FROM_IMAGEID_GET
+ *
+ * @brief Macro to extract NPE ID field from Image ID
+ */
+#define IX_NPEDL_NPEID_FROM_IMAGEID_GET(imageId) \
+ (((imageId) >> IX_NPEDL_IMAGEID_NPEID_OFFSET) & \
+ IX_NPEDL_NPEIMAGE_NPEID_MASK)
+
+/**
+ * @def IX_NPEDL_DEVICEID_FROM_IMAGEID_GET
+ *
+ * @brief Macro to extract NPE ID field from Image ID
+ */
+#define IX_NPEDL_DEVICEID_FROM_IMAGEID_GET(imageId) \
+ (((imageId) >> IX_NPEDL_IMAGEID_DEVICEID_OFFSET) & \
+ IX_NPEDL_NPEIMAGE_DEVICEID_MASK)
+
+/**
+ * @def IX_NPEDL_FUNCTIONID_FROM_IMAGEID_GET
+ *
+ * @brief Macro to extract Functionality ID field from Image ID
+ */
+#define IX_NPEDL_FUNCTIONID_FROM_IMAGEID_GET(imageId) \
+ (((imageId) >> IX_NPEDL_IMAGEID_FUNCTIONID_OFFSET) & \
+ IX_NPEDL_NPEIMAGE_FIELD_MASK)
+
+/**
+ * @def IX_NPEDL_MAJOR_FROM_IMAGEID_GET
+ *
+ * @brief Macro to extract Major revision field from Image ID
+ */
+#define IX_NPEDL_MAJOR_FROM_IMAGEID_GET(imageId) \
+ (((imageId) >> IX_NPEDL_IMAGEID_MAJOR_OFFSET) & \
+ IX_NPEDL_NPEIMAGE_FIELD_MASK)
+
+/**
+ * @def IX_NPEDL_MINOR_FROM_IMAGEID_GET
+ *
+ * @brief Macro to extract Minor revision field from Image ID
+ */
+#define IX_NPEDL_MINOR_FROM_IMAGEID_GET(imageId) \
+ (((imageId) >> IX_NPEDL_IMAGEID_MINOR_OFFSET) & \
+ IX_NPEDL_NPEIMAGE_FIELD_MASK)
+
+
+/*
+ * Prototypes for interface functions
+ */
+
+/**
+ * @fn IX_STATUS ixNpeDlImageMgrMicrocodeImageLibraryOverride (UINT32 *clientImageLibrary)
+ *
+ * @brief This instructs NPE Downloader to use client-supplied microcode image library.
+ *
+ * This function sets NPE Downloader to use a client-supplied microcode image library
+ * instead of the standard image library which is included by the NPE Downloader.
+ *
+ * @note THIS FUNCTION HAS BEEN DEPRECATED AND SHOULD NOT BE USED.
+ * It will be removed in a future release.
+ * See API header file IxNpeDl.h for more information.
+ *
+ * @pre
+ * - <i>clientImageLibrary</i> should point to a microcode image library valid for use
+ * by the NPE Downloader component.
+ *
+ * @post
+ * - the client-supplied image uibrary will be used for all subsequent operations
+ * performed by the NPE Downloader
+ *
+ * @return
+ * - IX_SUCCESS if the operation was successful
+ * - IX_FAIL if the client-supplied image library did not contain a valid signature
+ */
+IX_STATUS
+ixNpeDlImageMgrMicrocodeImageLibraryOverride (UINT32 *clientImageLibrary);
+
+
+/**
+ * @fn IX_STATUS ixNpeDlImageMgrImageListExtract (IxNpeDlImageId *imageListPtr,
+ UINT32 *numImages)
+ *
+ * @brief Extracts a list of images available in the NPE microcode image library.
+ *
+ * @param IxNpeDlImageId* [out] imageListPtr - pointer to array to contain
+ * a list of images. If NULL,
+ * only the number of images
+ * is returned (in
+ * <i>numImages</i>)
+ * @param UINT32* [inout] numImages - As input, it points to a variable
+ * containing the number of images which
+ * can be stored in the
+ * <i>imageListPtr</i> array. Its value
+ * is ignored as input if
+ * <i>imageListPtr</i> is NULL. As an
+ * output, it will contain number of
+ * images in the image library.
+ *
+ * This function reads the header of the microcode image library and extracts a list of the
+ * images available in the image library. It can also be used to find the number of
+ * images in the image library.
+ *
+ * @note THIS FUNCTION HAS BEEN DEPRECATED AND SHOULD NOT BE USED.
+ * It will be removed in a future release.
+ * See API header file IxNpeDl.h for more information.
+ *
+ * @pre
+ * - if <i>imageListPtr</i> != NULL, <i>numImages</i> should reflect the
+ * number of image Id elements the <i>imageListPtr</i> can contain.
+ *
+ * @post
+ * - <i>numImages</i> will reflect the number of image Id's found in the
+ * microcode image library.
+ *
+ * @return
+ * - IX_SUCCESS if the operation was successful
+ * - IX_FAIL otherwise
+ */
+IX_STATUS
+ixNpeDlImageMgrImageListExtract (IxNpeDlImageId *imageListPtr,
+ UINT32 *numImages);
+
+
+/**
+ * @fn IX_STATUS ixNpeDlImageMgrImageLocate (IxNpeDlImageId *imageId,
+ UINT32 **imagePtr,
+ UINT32 *imageSize)
+ *
+ * @brief Finds a image block in the NPE microcode image library.
+ *
+ * @param IxNpeDlImageId* [in] imageId - the id of the image to locate
+ * @param UINT32** [out] imagePtr - pointer to the image in memory
+ * @param UINT32* [out] imageSize - size (in 32-bit words) of image
+ *
+ * This function examines the header of the microcode image library for the location
+ * and size of the specified image.
+ *
+ * @note THIS FUNCTION HAS BEEN DEPRECATED AND SHOULD NOT BE USED.
+ * It will be removed in a future release.
+ * See API header file IxNpeDl.h for more information.
+ *
+ * @pre
+ *
+ * @post
+ *
+ * @return
+ * - IX_SUCCESS if the operation was successful
+ * - IX_FAIL otherwise
+ */
+IX_STATUS
+ixNpeDlImageMgrImageLocate (IxNpeDlImageId *imageId,
+ UINT32 **imagePtr,
+ UINT32 *imageSize);
+
+/**
+ * @fn IX_STATUS ixNpeDlImageMgrLatestImageExtract (IxNpeDlImageId *imageId)
+ *
+ * @brief Finds the most recent version of an image in the NPE image library.
+ *
+ * @param IxNpeDlImageId* [inout] imageId - the id of the image
+ *
+ * This function determines the most recent version of a specified image by its
+ * higest major release and minor revision numbers
+ *
+ * @note THIS FUNCTION HAS BEEN DEPRECATED AND SHOULD NOT BE USED.
+ * It will be removed in a future release.
+ * See API header file IxNpeDl.h for more information.
+ *
+ * @pre
+ *
+ * @post
+ *
+ * @return
+ * - IX_SUCCESS if the operation was successful
+ * - IX_FAIL otherwise
+ */
+IX_STATUS
+ixNpeDlImageMgrLatestImageExtract (IxNpeDlImageId *imageId);
+
+/**
+ * @fn void ixNpeDlImageMgrStatsShow (void)
+ *
+ * @brief This function will display the statistics of the IxNpeDl ImageMgr
+ * module
+ *
+ * @return none
+ */
+void
+ixNpeDlImageMgrStatsShow (void);
+
+
+/**
+ * @fn void ixNpeDlImageMgrStatsReset (void)
+ *
+ * @brief This function will reset the statistics of the IxNpeDl ImageMgr
+ * module
+ *
+ * @return none
+ */
+void
+ixNpeDlImageMgrStatsReset (void);
+
+
+/**
+ * @fn IX_STATUS ixNpeDlImageMgrImageGet (UINT32 *imageLibrary,
+ UINT32 imageId,
+ UINT32 **imagePtr,
+ UINT32 *imageSize)
+ *
+ * @brief Finds a image block in the NPE microcode image library.
+ *
+ * @param UINT32* [in] imageLibrary - the image library to use
+ * @param UINT32 [in] imageId - the id of the image to locate
+ * @param UINT32** [out] imagePtr - pointer to the image in memory
+ * @param UINT32* [out] imageSize - size (in 32-bit words) of image
+ *
+ * This function examines the header of the specified microcode image library
+ * for the location and size of the specified image. It returns a pointer to
+ * the image in the <i>imagePtr</i> parameter.
+ * If no image library is specified (imageLibrary == NULL), then the default
+ * built-in image library will be used.
+ *
+ * @pre
+ *
+ * @post
+ *
+ * @return
+ * - IX_SUCCESS if the operation was successful
+ * - IX_FAIL otherwise
+ */
+IX_STATUS
+ixNpeDlImageMgrImageFind (UINT32 *imageLibrary,
+ UINT32 imageId,
+ UINT32 **imagePtr,
+ UINT32 *imageSize);
+
+
+#endif /* IXNPEDLIMAGEMGR_P_H */
+
+/**
+ * @} defgroup IxNpeDlImageMgr_p
+ */
diff --git a/cpu/ixp/npe/include/IxNpeDlMacros_p.h b/cpu/ixp/npe/include/IxNpeDlMacros_p.h
new file mode 100644
index 0000000000..e32906a63a
--- /dev/null
+++ b/cpu/ixp/npe/include/IxNpeDlMacros_p.h
@@ -0,0 +1,414 @@
+/**
+ * @file IxNpeDlMacros_p.h
+ *
+ * @author Intel Corporation
+ * @date 21 January 2002
+ *
+ * @brief This file contains the macros for the IxNpeDl component.
+ *
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+*/
+
+/**
+ * @defgroup IxNpeDlMacros_p IxNpeDlMacros_p
+ *
+ * @brief Macros for the IxNpeDl component.
+ *
+ * @{
+ */
+
+#ifndef IXNPEDLMACROS_P_H
+#define IXNPEDLMACROS_P_H
+
+
+/*
+ * Put the user defined include files required.
+ */
+#if (CPU != XSCALE)
+/* To support IxNpeDl unit tests... */
+#include <stdio.h>
+#include "test/IxNpeDlTestReg.h"
+
+#else
+#include "IxOsal.h"
+
+#endif
+
+
+/*
+ * Typedefs
+ */
+
+/**
+ * @typedef IxNpeDlTraceTypes
+ * @brief Enumeration defining IxNpeDl trace levels
+ */
+typedef enum
+{
+ IX_NPEDL_TRACE_OFF, /**< no trace */
+ IX_NPEDL_DEBUG, /**< debug */
+ IX_NPEDL_FN_ENTRY_EXIT /**< function entry/exit */
+} IxNpeDlTraceTypes;
+
+
+/*
+ * #defines and macros.
+ */
+
+/* Implementation of the following macros for use with IxNpeDl unit test code */
+#if (CPU != XSCALE)
+
+
+/**
+ * @def IX_NPEDL_TRACE_LEVEL
+ *
+ * @brief IxNpeDl debug trace level
+ */
+#define IX_NPEDL_TRACE_LEVEL IX_NPEDL_FN_ENTRY_EXIT
+
+/**
+ * @def IX_NPEDL_ERROR_REPORT
+ *
+ * @brief Mechanism for reporting IxNpeDl software errors
+ *
+ * @param char* [in] STR - Error string to report
+ *
+ * This macro simply prints the error string passed.
+ * Intended for use with IxNpeDl unit test code.
+ *
+ * @return none
+ */
+#define IX_NPEDL_ERROR_REPORT(STR) printf ("IxNpeDl ERROR: %s\n", (STR));
+
+/**
+ * @def IX_NPEDL_WARNING_REPORT
+ *
+ * @brief Mechanism for reporting IxNpeDl software errors
+ *
+ * @param char* [in] STR - Error string to report
+ *
+ * This macro simply prints the error string passed.
+ * Intended for use with IxNpeDl unit test code.
+ *
+ * @return none
+ */
+#define IX_NPEDL_WARNING_REPORT(STR) printf ("IxNpeDl WARNING: %s\n", (STR));
+
+/**
+ * @def IX_NPEDL_TRACE0
+ *
+ * @brief Mechanism for tracing debug for the IxNpeDl component, for no arguments
+ *
+ * @param unsigned [in] LEVEL - one of IxNpeDlTraceTypes enumerated values
+ * @param char* [in] STR - Trace string
+ *
+ * This macro simply prints the trace string passed, if the level is supported.
+ * Intended for use with IxNpeDl unit test code.
+ *
+ * @return none
+ */
+#define IX_NPEDL_TRACE0(LEVEL, STR) \
+{ \
+ if (LEVEL <= IX_NPEDL_TRACE_LEVEL) \
+ { \
+ printf ("IxNpeDl TRACE: "); \
+ printf ((STR)); \
+ printf ("\n"); \
+ } \
+}
+
+ /**
+ * @def IX_NPEDL_TRACE1
+ *
+ * @brief Mechanism for tracing debug for the IxNpeDl component, with 1 argument
+ *
+ * @param unsigned [in] LEVEL - one of IxNpeDlTraceTypes enumerated values
+ * @param char* [in] STR - Trace string
+ * @param argType [in] ARG1 - Argument to trace
+ *
+ * This macro simply prints the trace string passed, if the level is supported.
+ * Intended for use with IxNpeDl unit test code.
+ *
+ * @return none
+ */
+#define IX_NPEDL_TRACE1(LEVEL, STR, ARG1) \
+{ \
+ if (LEVEL <= IX_NPEDL_TRACE_LEVEL) \
+ { \
+ printf ("IxNpeDl TRACE: "); \
+ printf (STR, ARG1); \
+ printf ("\n"); \
+ } \
+}
+
+/**
+ * @def IX_NPEDL_TRACE2
+ *
+ * @brief Mechanism for tracing debug for the IxNpeDl component, with 2 arguments
+ *
+ * @param unsigned [in] LEVEL - one of IxNpeDlTraceTypes enumerated values
+ * @param char* [in] STR - Trace string
+ * @param argType [in] ARG1 - Argument to trace
+ * @param argType [in] ARG2 - Argument to trace
+ *
+ * This macro simply prints the trace string passed, if the level is supported.
+ * Intended for use with IxNpeDl unit test code.
+ *
+ * @return none
+ */
+#define IX_NPEDL_TRACE2(LEVEL, STR, ARG1, ARG2) \
+{ \
+ if (LEVEL <= IX_NPEDL_TRACE_LEVEL) \
+ { \
+ printf ("IxNpeDl TRACE: "); \
+ printf (STR, ARG1, ARG2); \
+ printf ("\n"); \
+ } \
+}
+
+
+/**
+ * @def IX_NPEDL_REG_WRITE
+ *
+ * @brief Mechanism for writing to a memory-mapped register
+ *
+ * @param UINT32 [in] base - Base memory address for this NPE's registers
+ * @param UINT32 [in] offset - Offset from base memory address
+ * @param UINT32 [in] value - Value to write to register
+ *
+ * This macro calls a function from Unit Test code to write a register. This
+ * allows extra flexibility for unit testing of the IxNpeDl component.
+ *
+ * @return none
+ */
+#define IX_NPEDL_REG_WRITE(base, offset, value) \
+{ \
+ ixNpeDlTestRegWrite (base, offset, value); \
+}
+
+
+/**
+ * @def IX_NPEDL_REG_READ
+ *
+ * @brief Mechanism for reading from a memory-mapped register
+ *
+ * @param UINT32 [in] base - Base memory address for this NPE's registers
+ * @param UINT32 [in] offset - Offset from base memory address
+ * @param UINT32 *[out] value - Value read from register
+ *
+ * This macro calls a function from Unit Test code to read a register. This
+ * allows extra flexibility for unit testing of the IxNpeDl component.
+ *
+ * @return none
+ */
+#define IX_NPEDL_REG_READ(base, offset, value) \
+{ \
+ ixNpeDlTestRegRead (base, offset, value); \
+}
+
+
+/* Implementation of the following macros when integrated with IxOsal */
+#else /* #if (CPU != XSCALE) */
+
+
+/**
+ * @def IX_NPEDL_TRACE_LEVEL
+ *
+ * @brief IxNpeDl debug trace level
+ */
+#define IX_NPEDL_TRACE_LEVEL IX_NPEDL_DEBUG
+
+
+/**
+ * @def IX_NPEDL_ERROR_REPORT
+ *
+ * @brief Mechanism for reporting IxNpeDl software errors
+ *
+ * @param char* [in] STR - Error string to report
+ *
+ * This macro is used to report IxNpeDl software errors.
+ *
+ * @return none
+ */
+#define IX_NPEDL_ERROR_REPORT(STR) \
+ ixOsalLog (IX_OSAL_LOG_LVL_ERROR, IX_OSAL_LOG_DEV_STDERR, STR, 0, 0, 0, 0, 0, 0);
+
+/**
+ * @def IX_NPEDL_WARNING_REPORT
+ *
+ * @brief Mechanism for reporting IxNpeDl software warnings
+ *
+ * @param char* [in] STR - Warning string to report
+ *
+ * This macro is used to report IxNpeDl software warnings.
+ *
+ * @return none
+ */
+#define IX_NPEDL_WARNING_REPORT(STR) \
+ ixOsalLog (IX_OSAL_LOG_LVL_WARNING, IX_OSAL_LOG_DEV_STDOUT, STR, 0, 0, 0, 0, 0, 0);
+
+
+/**
+ * @def IX_NPEDL_TRACE0
+ *
+ * @brief Mechanism for tracing debug for the IxNpeDl component, for no arguments
+ *
+ * @param unsigned [in] LEVEL - one of IxNpeDlTraceTypes enumerated values
+ * @param char* [in] STR - Trace string
+ *
+ * This macro simply prints the trace string passed, if the level is supported.
+ *
+ * @return none
+ */
+#define IX_NPEDL_TRACE0(LEVEL, STR) \
+{ \
+ if (LEVEL <= IX_NPEDL_TRACE_LEVEL) \
+ { \
+ if (LEVEL == IX_NPEDL_FN_ENTRY_EXIT) \
+ { \
+ ixOsalLog (IX_OSAL_LOG_LVL_DEBUG3, IX_OSAL_LOG_DEV_STDOUT, STR, 0, 0, 0, 0, 0, 0); \
+ } \
+ else if (LEVEL == IX_NPEDL_DEBUG) \
+ { \
+ ixOsalLog (IX_OSAL_LOG_LVL_MESSAGE, IX_OSAL_LOG_DEV_STDOUT, STR, 0, 0, 0, 0, 0, 0); \
+ } \
+ } \
+}
+
+/**
+ * @def IX_NPEDL_TRACE1
+ *
+ * @brief Mechanism for tracing debug for the IxNpeDl component, with 1 argument
+ *
+ * @param unsigned [in] LEVEL - one of IxNpeDlTraceTypes enumerated values
+ * @param char* [in] STR - Trace string
+ * @param argType [in] ARG1 - Argument to trace
+ *
+ * This macro simply prints the trace string passed, if the level is supported.
+ *
+ * @return none
+ */
+#define IX_NPEDL_TRACE1(LEVEL, STR, ARG1) \
+{ \
+ if (LEVEL <= IX_NPEDL_TRACE_LEVEL) \
+ { \
+ if (LEVEL == IX_NPEDL_FN_ENTRY_EXIT) \
+ { \
+ ixOsalLog (IX_OSAL_LOG_LVL_DEBUG3, IX_OSAL_LOG_DEV_STDOUT, STR, ARG1, 0, 0, 0, 0, 0); \
+ } \
+ else if (LEVEL == IX_NPEDL_DEBUG) \
+ { \
+ ixOsalLog (IX_OSAL_LOG_LVL_MESSAGE, IX_OSAL_LOG_DEV_STDOUT, STR, ARG1, 0, 0, 0, 0, 0); \
+ } \
+ } \
+}
+
+/**
+ * @def IX_NPEDL_TRACE2
+ *
+ * @brief Mechanism for tracing debug for the IxNpeDl component, with 2 arguments
+ *
+ * @param unsigned [in] LEVEL - one of IxNpeDlTraceTypes enumerated values
+ * @param char* [in] STR - Trace string
+ * @param argType [in] ARG1 - Argument to trace
+ * @param argType [in] ARG2 - Argument to trace
+ *
+ * This macro simply prints the trace string passed, if the level is supported.
+ *
+ * @return none
+ */
+#define IX_NPEDL_TRACE2(LEVEL, STR, ARG1, ARG2) \
+{ \
+ if (LEVEL <= IX_NPEDL_TRACE_LEVEL) \
+ { \
+ if (LEVEL == IX_NPEDL_FN_ENTRY_EXIT) \
+ { \
+ ixOsalLog (IX_OSAL_LOG_LVL_DEBUG3, IX_OSAL_LOG_DEV_STDOUT, STR, ARG1, ARG2, 0, 0, 0, 0); \
+ } \
+ else if (LEVEL == IX_NPEDL_DEBUG) \
+ { \
+ ixOsalLog (IX_OSAL_LOG_LVL_MESSAGE, IX_OSAL_LOG_DEV_STDOUT, STR, ARG1, ARG2, 0, 0, 0, 0); \
+ } \
+ } \
+}
+
+/**
+ * @def IX_NPEDL_REG_WRITE
+ *
+ * @brief Mechanism for writing to a memory-mapped register
+ *
+ * @param UINT32 [in] base - Base memory address for this NPE's registers
+ * @param UINT32 [in] offset - Offset from base memory address
+ * @param UINT32 [in] value - Value to write to register
+ *
+ * This macro forms the address of the register from base address + offset, and
+ * dereferences that address to write the contents of the register.
+ *
+ * @return none
+ */
+#define IX_NPEDL_REG_WRITE(base, offset, value) \
+ IX_OSAL_WRITE_LONG(((base) + (offset)), (value))
+
+
+
+/**
+ * @def IX_NPEDL_REG_READ
+ *
+ * @brief Mechanism for reading from a memory-mapped register
+ *
+ * @param UINT32 [in] base - Base memory address for this NPE's registers
+ * @param UINT32 [in] offset - Offset from base memory address
+ * @param UINT32 *[out] value - Value read from register
+ *
+ * This macro forms the address of the register from base address + offset, and
+ * dereferences that address to read the register contents.
+ *
+ * @return none
+ */
+#define IX_NPEDL_REG_READ(base, offset, value) \
+ *(value) = IX_OSAL_READ_LONG(((base) + (offset)))
+
+#endif /* #if (CPU != XSCALE) */
+
+#endif /* IXNPEDLMACROS_P_H */
+
+/**
+ * @} defgroup IxNpeDlMacros_p
+ */
diff --git a/cpu/ixp/npe/include/IxNpeDlNpeMgrEcRegisters_p.h b/cpu/ixp/npe/include/IxNpeDlNpeMgrEcRegisters_p.h
new file mode 100644
index 0000000000..f682126677
--- /dev/null
+++ b/cpu/ixp/npe/include/IxNpeDlNpeMgrEcRegisters_p.h
@@ -0,0 +1,893 @@
+/**
+ * @file IxNpeDlNpeMgrEcRegisters_p.h
+ *
+ * @author Intel Corporation
+ * @date 14 December 2001
+
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+*/
+
+
+#ifndef IXNPEDLNPEMGRECREGISTERS_P_H
+#define IXNPEDLNPEMGRECREGISTERS_P_H
+
+#include "IxOsal.h"
+
+/*
+ * Base Memory Addresses for accessing NPE registers
+ */
+
+#define IX_NPEDL_NPE_BASE (IX_OSAL_IXP400_PERIPHERAL_PHYS_BASE)
+
+#define IX_NPEDL_NPEA_OFFSET (0x6000) /**< NPE-A register base offset */
+#define IX_NPEDL_NPEB_OFFSET (0x7000) /**< NPE-B register base offset */
+#define IX_NPEDL_NPEC_OFFSET (0x8000) /**< NPE-C register base offset */
+
+/**
+ * @def IX_NPEDL_NPEBASEADDRESS_NPEA
+ * @brief Base Memory Address of NPE-A Configuration Bus registers
+ */
+#define IX_NPEDL_NPEBASEADDRESS_NPEA (IX_NPEDL_NPE_BASE + IX_NPEDL_NPEA_OFFSET)
+
+/**
+ * @def IX_NPEDL_NPEBASEADDRESS_NPEB
+ * @brief Base Memory Address of NPE-B Configuration Bus registers
+ */
+#define IX_NPEDL_NPEBASEADDRESS_NPEB (IX_NPEDL_NPE_BASE + IX_NPEDL_NPEB_OFFSET)
+
+/**
+ * @def IX_NPEDL_NPEBASEADDRESS_NPEC
+ * @brief Base Memory Address of NPE-C Configuration Bus registers
+ */
+#define IX_NPEDL_NPEBASEADDRESS_NPEC (IX_NPEDL_NPE_BASE + IX_NPEDL_NPEC_OFFSET)
+
+
+/*
+ * Instruction Memory Size (in words) for each NPE
+ */
+
+/**
+ * @def IX_NPEDL_INS_MEMSIZE_WORDS_NPEA
+ * @brief Size (in words) of NPE-A Instruction Memory
+ */
+#define IX_NPEDL_INS_MEMSIZE_WORDS_NPEA 4096
+
+/**
+ * @def IX_NPEDL_INS_MEMSIZE_WORDS_NPEB
+ * @brief Size (in words) of NPE-B Instruction Memory
+ */
+#define IX_NPEDL_INS_MEMSIZE_WORDS_NPEB 2048
+
+/**
+ * @def IX_NPEDL_INS_MEMSIZE_WORDS_NPEC
+ * @brief Size (in words) of NPE-B Instruction Memory
+ */
+#define IX_NPEDL_INS_MEMSIZE_WORDS_NPEC 2048
+
+
+/*
+ * Data Memory Size (in words) for each NPE
+ */
+
+/**
+ * @def IX_NPEDL_DATA_MEMSIZE_WORDS_NPEA
+ * @brief Size (in words) of NPE-A Data Memory
+ */
+#define IX_NPEDL_DATA_MEMSIZE_WORDS_NPEA 2048
+
+/**
+ * @def IX_NPEDL_DATA_MEMSIZE_WORDS_NPEB
+ * @brief Size (in words) of NPE-B Data Memory
+ */
+#define IX_NPEDL_DATA_MEMSIZE_WORDS_NPEB 2048
+
+/**
+ * @def IX_NPEDL_DATA_MEMSIZE_WORDS_NPEC
+ * @brief Size (in words) of NPE-C Data Memory
+ */
+#define IX_NPEDL_DATA_MEMSIZE_WORDS_NPEC 2048
+
+
+/*
+ * Configuration Bus Register offsets (in bytes) from NPE Base Address
+ */
+
+/**
+ * @def IX_NPEDL_REG_OFFSET_EXAD
+ * @brief Offset (in bytes) of EXAD (Execution Address) register from NPE Base
+ * Address
+ */
+#define IX_NPEDL_REG_OFFSET_EXAD 0x00000000
+
+/**
+ * @def IX_NPEDL_REG_OFFSET_EXDATA
+ * @brief Offset (in bytes) of EXDATA (Execution Data) register from NPE Base
+ * Address
+ */
+#define IX_NPEDL_REG_OFFSET_EXDATA 0x00000004
+
+/**
+ * @def IX_NPEDL_REG_OFFSET_EXCTL
+ * @brief Offset (in bytes) of EXCTL (Execution Control) register from NPE Base
+ * Address
+ */
+#define IX_NPEDL_REG_OFFSET_EXCTL 0x00000008
+
+/**
+ * @def IX_NPEDL_REG_OFFSET_EXCT
+ * @brief Offset (in bytes) of EXCT (Execution Count) register from NPE Base
+ * Address
+ */
+#define IX_NPEDL_REG_OFFSET_EXCT 0x0000000C
+
+/**
+ * @def IX_NPEDL_REG_OFFSET_AP0
+ * @brief Offset (in bytes) of AP0 (Action Point 0) register from NPE Base
+ * Address
+ */
+#define IX_NPEDL_REG_OFFSET_AP0 0x00000010
+
+/**
+ * @def IX_NPEDL_REG_OFFSET_AP1
+ * @brief Offset (in bytes) of AP1 (Action Point 1) register from NPE Base
+ * Address
+ */
+#define IX_NPEDL_REG_OFFSET_AP1 0x00000014
+
+/**
+ * @def IX_NPEDL_REG_OFFSET_AP2
+ * @brief Offset (in bytes) of AP2 (Action Point 2) register from NPE Base
+ * Address
+ */
+#define IX_NPEDL_REG_OFFSET_AP2 0x00000018
+
+/**
+ * @def IX_NPEDL_REG_OFFSET_AP3
+ * @brief Offset (in bytes) of AP3 (Action Point 3) register from NPE Base
+ * Address
+ */
+#define IX_NPEDL_REG_OFFSET_AP3 0x0000001C
+
+/**
+ * @def IX_NPEDL_REG_OFFSET_WFIFO
+ * @brief Offset (in bytes) of WFIFO (Watchpoint FIFO) register from NPE Base
+ * Address
+ */
+#define IX_NPEDL_REG_OFFSET_WFIFO 0x00000020
+
+/**
+ * @def IX_NPEDL_REG_OFFSET_WC
+ * @brief Offset (in bytes) of WC (Watch Count) register from NPE Base
+ * Address
+ */
+#define IX_NPEDL_REG_OFFSET_WC 0x00000024
+
+/**
+ * @def IX_NPEDL_REG_OFFSET_PROFCT
+ * @brief Offset (in bytes) of PROFCT (Profile Count) register from NPE Base
+ * Address
+ */
+#define IX_NPEDL_REG_OFFSET_PROFCT 0x00000028
+
+/**
+ * @def IX_NPEDL_REG_OFFSET_STAT
+ * @brief Offset (in bytes) of STAT (Messaging Status) register from NPE Base
+ * Address
+ */
+#define IX_NPEDL_REG_OFFSET_STAT 0x0000002C
+
+/**
+ * @def IX_NPEDL_REG_OFFSET_CTL
+ * @brief Offset (in bytes) of CTL (Messaging Control) register from NPE Base
+ * Address
+ */
+#define IX_NPEDL_REG_OFFSET_CTL 0x00000030
+
+/**
+ * @def IX_NPEDL_REG_OFFSET_MBST
+ * @brief Offset (in bytes) of MBST (Mailbox Status) register from NPE Base
+ * Address
+ */
+#define IX_NPEDL_REG_OFFSET_MBST 0x00000034
+
+/**
+ * @def IX_NPEDL_REG_OFFSET_FIFO
+ * @brief Offset (in bytes) of FIFO (messaging in/out FIFO) register from NPE
+ * Base Address
+ */
+#define IX_NPEDL_REG_OFFSET_FIFO 0x00000038
+
+
+/*
+ * Non-zero reset values for the Configuration Bus registers
+ */
+
+/**
+ * @def IX_NPEDL_REG_RESET_FIFO
+ * @brief Reset value for Mailbox (MBST) register
+ * NOTE that if used, it should be complemented with an NPE intruction
+ * to clear the Mailbox at the NPE side as well
+ */
+#define IX_NPEDL_REG_RESET_MBST 0x0000F0F0
+
+
+/*
+ * Bit-masks used to read/write particular bits in Configuration Bus registers
+ */
+
+/**
+ * @def IX_NPEDL_MASK_WFIFO_VALID
+ * @brief Masks the VALID bit in the WFIFO register
+ */
+#define IX_NPEDL_MASK_WFIFO_VALID 0x80000000
+
+/**
+ * @def IX_NPEDL_MASK_STAT_OFNE
+ * @brief Masks the OFNE bit in the STAT register
+ */
+#define IX_NPEDL_MASK_STAT_OFNE 0x00010000
+
+/**
+ * @def IX_NPEDL_MASK_STAT_IFNE
+ * @brief Masks the IFNE bit in the STAT register
+ */
+#define IX_NPEDL_MASK_STAT_IFNE 0x00080000
+
+
+/*
+ * EXCTL (Execution Control) Register commands
+*/
+
+/**
+ * @def IX_NPEDL_EXCTL_CMD_NPE_STEP
+ * @brief EXCTL Command to Step execution of an NPE Instruction
+ */
+
+#define IX_NPEDL_EXCTL_CMD_NPE_STEP 0x01
+
+/**
+ * @def IX_NPEDL_EXCTL_CMD_NPE_START
+ * @brief EXCTL Command to Start NPE execution
+ */
+#define IX_NPEDL_EXCTL_CMD_NPE_START 0x02
+
+/**
+ * @def IX_NPEDL_EXCTL_CMD_NPE_STOP
+ * @brief EXCTL Command to Stop NPE execution
+ */
+#define IX_NPEDL_EXCTL_CMD_NPE_STOP 0x03
+
+/**
+ * @def IX_NPEDL_EXCTL_CMD_NPE_CLR_PIPE
+ * @brief EXCTL Command to Clear NPE instruction pipeline
+ */
+#define IX_NPEDL_EXCTL_CMD_NPE_CLR_PIPE 0x04
+
+/**
+ * @def IX_NPEDL_EXCTL_CMD_RD_INS_MEM
+ * @brief EXCTL Command to read NPE instruction memory at address in EXAD
+ * register and return value in EXDATA register
+ */
+#define IX_NPEDL_EXCTL_CMD_RD_INS_MEM 0x10
+
+/**
+ * @def IX_NPEDL_EXCTL_CMD_WR_INS_MEM
+ * @brief EXCTL Command to write NPE instruction memory at address in EXAD
+ * register with data in EXDATA register
+ */
+#define IX_NPEDL_EXCTL_CMD_WR_INS_MEM 0x11
+
+/**
+ * @def IX_NPEDL_EXCTL_CMD_RD_DATA_MEM
+ * @brief EXCTL Command to read NPE data memory at address in EXAD
+ * register and return value in EXDATA register
+ */
+#define IX_NPEDL_EXCTL_CMD_RD_DATA_MEM 0x12
+
+/**
+ * @def IX_NPEDL_EXCTL_CMD_WR_DATA_MEM
+ * @brief EXCTL Command to write NPE data memory at address in EXAD
+ * register with data in EXDATA register
+ */
+#define IX_NPEDL_EXCTL_CMD_WR_DATA_MEM 0x13
+
+/**
+ * @def IX_NPEDL_EXCTL_CMD_RD_ECS_REG
+ * @brief EXCTL Command to read Execution Access register at address in EXAD
+ * register and return value in EXDATA register
+ */
+#define IX_NPEDL_EXCTL_CMD_RD_ECS_REG 0x14
+
+/**
+ * @def IX_NPEDL_EXCTL_CMD_WR_ECS_REG
+ * @brief EXCTL Command to write Execution Access register at address in EXAD
+ * register with data in EXDATA register
+ */
+#define IX_NPEDL_EXCTL_CMD_WR_ECS_REG 0x15
+
+/**
+ * @def IX_NPEDL_EXCTL_CMD_CLR_PROFILE_CNT
+ * @brief EXCTL Command to clear Profile Count register
+ */
+#define IX_NPEDL_EXCTL_CMD_CLR_PROFILE_CNT 0x0C
+
+
+/*
+ * EXCTL (Execution Control) Register status bit masks
+ */
+
+/**
+ * @def IX_NPEDL_EXCTL_STATUS_RUN
+ * @brief Masks the RUN status bit in the EXCTL register
+ */
+#define IX_NPEDL_EXCTL_STATUS_RUN 0x80000000
+
+/**
+ * @def IX_NPEDL_EXCTL_STATUS_STOP
+ * @brief Masks the STOP status bit in the EXCTL register
+ */
+#define IX_NPEDL_EXCTL_STATUS_STOP 0x40000000
+
+/**
+ * @def IX_NPEDL_EXCTL_STATUS_CLEAR
+ * @brief Masks the CLEAR status bit in the EXCTL register
+ */
+#define IX_NPEDL_EXCTL_STATUS_CLEAR 0x20000000
+
+/**
+ * @def IX_NPEDL_EXCTL_STATUS_ECS_K
+ * @brief Masks the K (pipeline Klean) status bit in the EXCTL register
+ */
+#define IX_NPEDL_EXCTL_STATUS_ECS_K 0x00800000
+
+
+/*
+ * Executing Context Stack (ECS) level registers
+ */
+
+/**
+ * @def IX_NPEDL_ECS_BG_CTXT_REG_0
+ * @brief Execution Access register address for register 0 at Backgound
+ * Executing Context Stack level
+ */
+#define IX_NPEDL_ECS_BG_CTXT_REG_0 0x00
+
+/**
+ * @def IX_NPEDL_ECS_BG_CTXT_REG_1
+ * @brief Execution Access register address for register 1 at Backgound
+ * Executing Context Stack level
+ */
+#define IX_NPEDL_ECS_BG_CTXT_REG_1 0x01
+
+/**
+ * @def IX_NPEDL_ECS_BG_CTXT_REG_2
+ * @brief Execution Access register address for register 2 at Backgound
+ * Executing Context Stack level
+ */
+#define IX_NPEDL_ECS_BG_CTXT_REG_2 0x02
+
+/**
+ * @def IX_NPEDL_ECS_PRI_1_CTXT_REG_0
+ * @brief Execution Access register address for register 0 at Priority 1
+ * Executing Context Stack level
+ */
+#define IX_NPEDL_ECS_PRI_1_CTXT_REG_0 0x04
+
+/**
+ * @def IX_NPEDL_ECS_PRI_1_CTXT_REG_1
+ * @brief Execution Access register address for register 1 at Priority 1
+ * Executing Context Stack level
+ */
+#define IX_NPEDL_ECS_PRI_1_CTXT_REG_1 0x05
+
+/**
+ * @def IX_NPEDL_ECS_PRI_1_CTXT_REG_2
+ * @brief Execution Access register address for register 2 at Priority 1
+ * Executing Context Stack level
+ */
+#define IX_NPEDL_ECS_PRI_1_CTXT_REG_2 0x06
+
+/**
+ * @def IX_NPEDL_ECS_PRI_2_CTXT_REG_0
+ * @brief Execution Access register address for register 0 at Priority 2
+ * Executing Context Stack level
+ */
+#define IX_NPEDL_ECS_PRI_2_CTXT_REG_0 0x08
+
+/**
+ * @def IX_NPEDL_ECS_PRI_2_CTXT_REG_1
+ * @brief Execution Access register address for register 1 at Priority 2
+ * Executing Context Stack level
+ */
+#define IX_NPEDL_ECS_PRI_2_CTXT_REG_1 0x09
+
+/**
+ * @def IX_NPEDL_ECS_PRI_2_CTXT_REG_2
+ * @brief Execution Access register address for register 2 at Priority 2
+ * Executing Context Stack level
+ */
+#define IX_NPEDL_ECS_PRI_2_CTXT_REG_2 0x0A
+
+/**
+ * @def IX_NPEDL_ECS_DBG_CTXT_REG_0
+ * @brief Execution Access register address for register 0 at Debug
+ * Executing Context Stack level
+ */
+#define IX_NPEDL_ECS_DBG_CTXT_REG_0 0x0C
+
+/**
+ * @def IX_NPEDL_ECS_DBG_CTXT_REG_1
+ * @brief Execution Access register address for register 1 at Debug
+ * Executing Context Stack level
+ */
+#define IX_NPEDL_ECS_DBG_CTXT_REG_1 0x0D
+
+/**
+ * @def IX_NPEDL_ECS_DBG_CTXT_REG_2
+ * @brief Execution Access register address for register 2 at Debug
+ * Executing Context Stack level
+ */
+#define IX_NPEDL_ECS_DBG_CTXT_REG_2 0x0E
+
+/**
+ * @def IX_NPEDL_ECS_INSTRUCT_REG
+ * @brief Execution Access register address for NPE Instruction Register
+ */
+#define IX_NPEDL_ECS_INSTRUCT_REG 0x11
+
+
+/*
+ * Execution Access register reset values
+ */
+
+/**
+ * @def IX_NPEDL_ECS_BG_CTXT_REG_0_RESET
+ * @brief Reset value for Execution Access Background ECS level register 0
+ */
+#define IX_NPEDL_ECS_BG_CTXT_REG_0_RESET 0xA0000000
+
+/**
+ * @def IX_NPEDL_ECS_BG_CTXT_REG_1_RESET
+ * @brief Reset value for Execution Access Background ECS level register 1
+ */
+#define IX_NPEDL_ECS_BG_CTXT_REG_1_RESET 0x01000000
+
+/**
+ * @def IX_NPEDL_ECS_BG_CTXT_REG_2_RESET
+ * @brief Reset value for Execution Access Background ECS level register 2
+ */
+#define IX_NPEDL_ECS_BG_CTXT_REG_2_RESET 0x00008000
+
+/**
+ * @def IX_NPEDL_ECS_PRI_1_CTXT_REG_0_RESET
+ * @brief Reset value for Execution Access Priority 1 ECS level register 0
+ */
+#define IX_NPEDL_ECS_PRI_1_CTXT_REG_0_RESET 0x20000080
+
+/**
+ * @def IX_NPEDL_ECS_PRI_1_CTXT_REG_1_RESET
+ * @brief Reset value for Execution Access Priority 1 ECS level register 1
+ */
+#define IX_NPEDL_ECS_PRI_1_CTXT_REG_1_RESET 0x01000000
+
+/**
+ * @def IX_NPEDL_ECS_PRI_1_CTXT_REG_2_RESET
+ * @brief Reset value for Execution Access Priority 1 ECS level register 2
+ */
+#define IX_NPEDL_ECS_PRI_1_CTXT_REG_2_RESET 0x00008000
+
+/**
+ * @def IX_NPEDL_ECS_PRI_2_CTXT_REG_0_RESET
+ * @brief Reset value for Execution Access Priority 2 ECS level register 0
+ */
+#define IX_NPEDL_ECS_PRI_2_CTXT_REG_0_RESET 0x20000080
+
+/**
+ * @def IX_NPEDL_ECS_PRI_2_CTXT_REG_1_RESET
+ * @brief Reset value for Execution Access Priority 2 ECS level register 1
+ */
+#define IX_NPEDL_ECS_PRI_2_CTXT_REG_1_RESET 0x01000000
+
+/**
+ * @def IX_NPEDL_ECS_PRI_2_CTXT_REG_2_RESET
+ * @brief Reset value for Execution Access Priority 2 ECS level register 2
+ */
+#define IX_NPEDL_ECS_PRI_2_CTXT_REG_2_RESET 0x00008000
+
+/**
+ * @def IX_NPEDL_ECS_DBG_CTXT_REG_0_RESET
+ * @brief Reset value for Execution Access Debug ECS level register 0
+ */
+#define IX_NPEDL_ECS_DBG_CTXT_REG_0_RESET 0x20000000
+
+/**
+ * @def IX_NPEDL_ECS_DBG_CTXT_REG_1_RESET
+ * @brief Reset value for Execution Access Debug ECS level register 1
+ */
+#define IX_NPEDL_ECS_DBG_CTXT_REG_1_RESET 0x00000000
+
+/**
+ * @def IX_NPEDL_ECS_DBG_CTXT_REG_2_RESET
+ * @brief Reset value for Execution Access Debug ECS level register 2
+ */
+#define IX_NPEDL_ECS_DBG_CTXT_REG_2_RESET 0x001E0000
+
+/**
+ * @def IX_NPEDL_ECS_INSTRUCT_REG_RESET
+ * @brief Reset value for Execution Access NPE Instruction Register
+ */
+#define IX_NPEDL_ECS_INSTRUCT_REG_RESET 0x1003C00F
+
+
+/*
+ * masks used to read/write particular bits in Execution Access registers
+ */
+
+/**
+ * @def IX_NPEDL_MASK_ECS_REG_0_ACTIVE
+ * @brief Mask the A (Active) bit in Execution Access Register 0 of all ECS
+ * levels
+ */
+#define IX_NPEDL_MASK_ECS_REG_0_ACTIVE 0x80000000
+
+/**
+ * @def IX_NPEDL_MASK_ECS_REG_0_NEXTPC
+ * @brief Mask the NextPC bits in Execution Access Register 0 of all ECS
+ * levels (except Debug ECS level)
+ */
+#define IX_NPEDL_MASK_ECS_REG_0_NEXTPC 0x1FFF0000
+
+/**
+ * @def IX_NPEDL_MASK_ECS_REG_0_LDUR
+ * @brief Mask the LDUR bits in Execution Access Register 0 of all ECS levels
+ */
+#define IX_NPEDL_MASK_ECS_REG_0_LDUR 0x00000700
+
+/**
+ * @def IX_NPEDL_MASK_ECS_REG_1_CCTXT
+ * @brief Mask the NextPC bits in Execution Access Register 1 of all ECS levels
+ */
+#define IX_NPEDL_MASK_ECS_REG_1_CCTXT 0x000F0000
+
+/**
+ * @def IX_NPEDL_MASK_ECS_REG_1_SELCTXT
+ * @brief Mask the NextPC bits in Execution Access Register 1 of all ECS levels
+ */
+#define IX_NPEDL_MASK_ECS_REG_1_SELCTXT 0x0000000F
+
+/**
+ * @def IX_NPEDL_MASK_ECS_DBG_REG_2_IF
+ * @brief Mask the IF bit in Execution Access Register 2 of Debug ECS level
+ */
+#define IX_NPEDL_MASK_ECS_DBG_REG_2_IF 0x00100000
+
+/**
+ * @def IX_NPEDL_MASK_ECS_DBG_REG_2_IE
+ * @brief Mask the IE bit in Execution Access Register 2 of Debug ECS level
+ */
+#define IX_NPEDL_MASK_ECS_DBG_REG_2_IE 0x00080000
+
+
+/*
+ * Bit-Offsets from LSB of particular bit-fields in Execution Access registers
+ */
+
+/**
+ * @def IX_NPEDL_OFFSET_ECS_REG_0_NEXTPC
+ * @brief LSB-offset of NextPC field in Execution Access Register 0 of all ECS
+ * levels (except Debug ECS level)
+ */
+#define IX_NPEDL_OFFSET_ECS_REG_0_NEXTPC 16
+
+/**
+ * @def IX_NPEDL_OFFSET_ECS_REG_0_LDUR
+ * @brief LSB-offset of LDUR field in Execution Access Register 0 of all ECS
+ * levels
+ */
+#define IX_NPEDL_OFFSET_ECS_REG_0_LDUR 8
+
+/**
+ * @def IX_NPEDL_OFFSET_ECS_REG_1_CCTXT
+ * @brief LSB-offset of CCTXT field in Execution Access Register 1 of all ECS
+ * levels
+ */
+#define IX_NPEDL_OFFSET_ECS_REG_1_CCTXT 16
+
+/**
+ * @def IX_NPEDL_OFFSET_ECS_REG_1_SELCTXT
+ * @brief LSB-offset of SELCTXT field in Execution Access Register 1 of all ECS
+ * levels
+ */
+#define IX_NPEDL_OFFSET_ECS_REG_1_SELCTXT 0
+
+
+/*
+ * NPE core & co-processor instruction templates to load into NPE Instruction
+ * Register, for read/write of NPE register file registers
+ */
+
+/**
+ * @def IX_NPEDL_INSTR_RD_REG_BYTE
+ * @brief NPE Instruction, used to read an 8-bit NPE internal logical register
+ * and return the value in the EXDATA register (aligned to MSB).
+ * NPE Assembler instruction: "mov8 d0, d0 &&& DBG_WrExec"
+ */
+#define IX_NPEDL_INSTR_RD_REG_BYTE 0x0FC00000
+
+/**
+ * @def IX_NPEDL_INSTR_RD_REG_SHORT
+ * @brief NPE Instruction, used to read a 16-bit NPE internal logical register
+ * and return the value in the EXDATA register (aligned to MSB).
+ * NPE Assembler instruction: "mov16 d0, d0 &&& DBG_WrExec"
+ */
+#define IX_NPEDL_INSTR_RD_REG_SHORT 0x0FC08010
+
+/**
+ * @def IX_NPEDL_INSTR_RD_REG_WORD
+ * @brief NPE Instruction, used to read a 16-bit NPE internal logical register
+ * and return the value in the EXDATA register.
+ * NPE Assembler instruction: "mov32 d0, d0 &&& DBG_WrExec"
+ */
+#define IX_NPEDL_INSTR_RD_REG_WORD 0x0FC08210
+
+/**
+ * @def IX_NPEDL_INSTR_WR_REG_BYTE
+ * @brief NPE Immediate-Mode Instruction, used to write an 8-bit NPE internal
+ * logical register.
+ * NPE Assembler instruction: "mov8 d0, #0"
+ */
+#define IX_NPEDL_INSTR_WR_REG_BYTE 0x00004000
+
+/**
+ * @def IX_NPEDL_INSTR_WR_REG_SHORT
+ * @brief NPE Immediate-Mode Instruction, used to write a 16-bit NPE internal
+ * logical register.
+ * NPE Assembler instruction: "mov16 d0, #0"
+ */
+#define IX_NPEDL_INSTR_WR_REG_SHORT 0x0000C000
+
+/**
+ * @def IX_NPEDL_INSTR_RD_FIFO
+ * @brief NPE Immediate-Mode Instruction, used to write a 16-bit NPE internal
+ * logical register.
+ * NPE Assembler instruction: "cprd32 d0 &&& DBG_RdInFIFO"
+ */
+#define IX_NPEDL_INSTR_RD_FIFO 0x0F888220
+
+/**
+ * @def IX_NPEDL_INSTR_RESET_MBOX
+ * @brief NPE Instruction, used to reset Mailbox (MBST) register
+ * NPE Assembler instruction: "mov32 d0, d0 &&& DBG_ClearM"
+ */
+#define IX_NPEDL_INSTR_RESET_MBOX 0x0FAC8210
+
+
+/*
+ * Bit-offsets from LSB, of particular bit-fields in an NPE instruction
+ */
+
+/**
+ * @def IX_NPEDL_OFFSET_INSTR_SRC
+ * @brief LSB-offset to SRC (source operand) field of an NPE Instruction
+ */
+#define IX_NPEDL_OFFSET_INSTR_SRC 4
+
+/**
+ * @def IX_NPEDL_OFFSET_INSTR_DEST
+ * @brief LSB-offset to DEST (destination operand) field of an NPE Instruction
+ */
+#define IX_NPEDL_OFFSET_INSTR_DEST 9
+
+/**
+ * @def IX_NPEDL_OFFSET_INSTR_COPROC
+ * @brief LSB-offset to COPROC (coprocessor instruction) field of an NPE
+ * Instruction
+ */
+#define IX_NPEDL_OFFSET_INSTR_COPROC 18
+
+
+/*
+ * masks used to read/write particular bits of an NPE Instruction
+ */
+
+/**
+ * @def IX_NPEDL_MASK_IMMED_INSTR_SRC_DATA
+ * @brief Mask the bits of 16-bit data value (least-sig 5 bits) to be used in
+ * SRC field of immediate-mode NPE instruction
+ */
+#define IX_NPEDL_MASK_IMMED_INSTR_SRC_DATA 0x1F
+
+/**
+ * @def IX_NPEDL_MASK_IMMED_INSTR_COPROC_DATA
+ * @brief Mask the bits of 16-bit data value (most-sig 11 bits) to be used in
+ * COPROC field of immediate-mode NPE instruction
+ */
+#define IX_NPEDL_MASK_IMMED_INSTR_COPROC_DATA 0xFFE0
+
+/**
+ * @def IX_NPEDL_OFFSET_IMMED_INSTR_COPROC_DATA
+ * @brief LSB offset of the bit-field of 16-bit data value (most-sig 11 bits)
+ * to be used in COPROC field of immediate-mode NPE instruction
+ */
+#define IX_NPEDL_OFFSET_IMMED_INSTR_COPROC_DATA 5
+
+/**
+ * @def IX_NPEDL_DISPLACE_IMMED_INSTR_COPROC_DATA
+ * @brief Number of left-shifts required to align most-sig 11 bits of 16-bit
+ * data value into COPROC field of immediate-mode NPE instruction
+ */
+#define IX_NPEDL_DISPLACE_IMMED_INSTR_COPROC_DATA \
+ (IX_NPEDL_OFFSET_INSTR_COPROC - IX_NPEDL_OFFSET_IMMED_INSTR_COPROC_DATA)
+
+/**
+ * @def IX_NPEDL_WR_INSTR_LDUR
+ * @brief LDUR value used with immediate-mode NPE Instructions by the NpeDl
+ * for writing to NPE internal logical registers
+ */
+#define IX_NPEDL_WR_INSTR_LDUR 1
+
+/**
+ * @def IX_NPEDL_RD_INSTR_LDUR
+ * @brief LDUR value used with NON-immediate-mode NPE Instructions by the NpeDl
+ * for reading from NPE internal logical registers
+ */
+#define IX_NPEDL_RD_INSTR_LDUR 0
+
+
+/**
+ * @enum IxNpeDlCtxtRegNum
+ * @brief Numeric values to identify the NPE internal Context Store registers
+ */
+typedef enum
+{
+ IX_NPEDL_CTXT_REG_STEVT = 0, /**< identifies STEVT */
+ IX_NPEDL_CTXT_REG_STARTPC, /**< identifies STARTPC */
+ IX_NPEDL_CTXT_REG_REGMAP, /**< identifies REGMAP */
+ IX_NPEDL_CTXT_REG_CINDEX, /**< identifies CINDEX */
+ IX_NPEDL_CTXT_REG_MAX /**< Total number of Context Store registers */
+} IxNpeDlCtxtRegNum;
+
+
+/*
+ * NPE Context Store register logical addresses
+ */
+
+/**
+ * @def IX_NPEDL_CTXT_REG_ADDR_STEVT
+ * @brief Logical address of STEVT NPE internal Context Store register
+ */
+#define IX_NPEDL_CTXT_REG_ADDR_STEVT 0x0000001B
+
+/**
+ * @def IX_NPEDL_CTXT_REG_ADDR_STARTPC
+ * @brief Logical address of STARTPC NPE internal Context Store register
+ */
+#define IX_NPEDL_CTXT_REG_ADDR_STARTPC 0x0000001C
+
+/**
+ * @def IX_NPEDL_CTXT_REG_ADDR_REGMAP
+ * @brief Logical address of REGMAP NPE internal Context Store register
+ */
+#define IX_NPEDL_CTXT_REG_ADDR_REGMAP 0x0000001E
+
+/**
+ * @def IX_NPEDL_CTXT_REG_ADDR_CINDEX
+ * @brief Logical address of CINDEX NPE internal Context Store register
+ */
+#define IX_NPEDL_CTXT_REG_ADDR_CINDEX 0x0000001F
+
+
+/*
+ * NPE Context Store register reset values
+ */
+
+/**
+ * @def IX_NPEDL_CTXT_REG_RESET_STEVT
+ * @brief Reset value of STEVT NPE internal Context Store register
+ * (STEVT = off, 0x80)
+ */
+#define IX_NPEDL_CTXT_REG_RESET_STEVT 0x80
+
+/**
+ * @def IX_NPEDL_CTXT_REG_RESET_STARTPC
+ * @brief Reset value of STARTPC NPE internal Context Store register
+ * (STARTPC = 0x0000)
+ */
+#define IX_NPEDL_CTXT_REG_RESET_STARTPC 0x0000
+
+/**
+ * @def IX_NPEDL_CTXT_REG_RESET_REGMAP
+ * @brief Reset value of REGMAP NPE internal Context Store register
+ * (REGMAP = d0->p0, d8->p2, d16->p4)
+ */
+#define IX_NPEDL_CTXT_REG_RESET_REGMAP 0x0820
+
+/**
+ * @def IX_NPEDL_CTXT_REG_RESET_CINDEX
+ * @brief Reset value of CINDEX NPE internal Context Store register
+ * (CINDEX = 0)
+ */
+#define IX_NPEDL_CTXT_REG_RESET_CINDEX 0x00
+
+
+/*
+ * numeric range of context levels available on an NPE
+ */
+
+/**
+ * @def IX_NPEDL_CTXT_NUM_MIN
+ * @brief Lowest NPE Context number in range
+ */
+#define IX_NPEDL_CTXT_NUM_MIN 0
+
+/**
+ * @def IX_NPEDL_CTXT_NUM_MAX
+ * @brief Highest NPE Context number in range
+ */
+#define IX_NPEDL_CTXT_NUM_MAX 15
+
+
+/*
+ * Physical NPE internal registers
+ */
+
+/**
+ * @def IX_NPEDL_TOTAL_NUM_PHYS_REG
+ * @brief Number of Physical registers currently supported
+ * Initial NPE implementations will have a 32-word register file.
+ * Later implementations may have a 64-word register file.
+ */
+#define IX_NPEDL_TOTAL_NUM_PHYS_REG 32
+
+/**
+ * @def IX_NPEDL_OFFSET_PHYS_REG_ADDR_REGMAP
+ * @brief LSB-offset of Regmap number in Physical NPE register address, used
+ * for Physical To Logical register address mapping in the NPE
+ */
+#define IX_NPEDL_OFFSET_PHYS_REG_ADDR_REGMAP 1
+
+/**
+ * @def IX_NPEDL_MASK_PHYS_REG_ADDR_LOGICAL_ADDR
+ * @brief Mask to extract a logical NPE register address from a physical
+ * register address, used for Physical To Logical address mapping
+ */
+#define IX_NPEDL_MASK_PHYS_REG_ADDR_LOGICAL_ADDR 0x1
+
+#endif /* IXNPEDLNPEMGRECREGISTERS_P_H */
diff --git a/cpu/ixp/npe/include/IxNpeDlNpeMgrUtils_p.h b/cpu/ixp/npe/include/IxNpeDlNpeMgrUtils_p.h
new file mode 100644
index 0000000000..a752f26e88
--- /dev/null
+++ b/cpu/ixp/npe/include/IxNpeDlNpeMgrUtils_p.h
@@ -0,0 +1,405 @@
+/**
+ * @file IxNpeDlNpeMgrUtils_p.h
+ *
+ * @author Intel Corporation
+ * @date 18 February 2002
+ * @brief This file contains the private API for the NpeMgr module.
+ *
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+*/
+
+
+/**
+ * @defgroup IxNpeDlNpeMgrUtils_p IxNpeDlNpeMgrUtils_p
+ *
+ * @brief The private API for the IxNpeDl NpeMgr Utils module
+ *
+ * @{
+ */
+
+#ifndef IXNPEDLNPEMGRUTILS_P_H
+#define IXNPEDLNPEMGRUTILS_P_H
+
+
+/*
+ * Put the user defined include files required.
+ */
+#include "IxNpeDl.h"
+#include "IxOsalTypes.h"
+#include "IxNpeDlNpeMgrEcRegisters_p.h"
+
+
+/*
+ * Function Prototypes
+ */
+
+/**
+ * @fn IX_STATUS ixNpeDlNpeMgrInsMemWrite (UINT32 npeBaseAddress,
+ UINT32 insMemAddress,
+ UINT32 insMemData,
+ BOOL verify)
+ *
+ * @brief Writes a word to NPE Instruction memory
+ *
+ * @param UINT32 [in] npeBaseAddress - Base Address of NPE
+ * @param UINT32 [in] insMemAddress - NPE instruction memory address to write
+ * @param UINT32 [in] insMemData - data to write to instruction memory
+ * @param BOOL [in] verify - if TRUE, verify the memory location is
+ * written successfully.
+ *
+ * This function is used to write a single word of data to a location in NPE
+ * instruction memory. If the <i>verify</i> option is ON, NpeDl will read back
+ * from the memory location to verify that it was written successfully
+ *
+ * @pre
+ *
+ * @post
+ *
+ * @return
+ * - IX_FAIL if verify is TRUE and the memory location was not written
+ * successfully
+ * - IX_SUCCESS otherwise
+ */
+IX_STATUS
+ixNpeDlNpeMgrInsMemWrite (UINT32 npeBaseAddress, UINT32 insMemAddress,
+ UINT32 insMemData, BOOL verify);
+
+
+/**
+ * @fn IX_STATUS ixNpeDlNpeMgrDataMemWrite (UINT32 npeBaseAddress,
+ UINT32 dataMemAddress,
+ UINT32 dataMemData,
+ BOOL verify)
+ *
+ * @brief Writes a word to NPE Data memory
+ *
+ * @param UINT32 [in] npeBaseAddress - Base Address of NPE
+ * @param UINT32 [in] dataMemAddress - NPE data memory address to write
+ * @param UINT32 [in] dataMemData - data to write to NPE data memory
+ * @param BOOL [in] verify - if TRUE, verify the memory location is
+ * written successfully.
+ *
+ * This function is used to write a single word of data to a location in NPE
+ * data memory. If the <i>verify</i> option is ON, NpeDl will read back from
+ * the memory location to verify that it was written successfully
+ *
+ * @pre
+ *
+ * @post
+ *
+ * @return
+ * - IX_FAIL if verify is TRUE and the memory location was not written
+ * successfully
+ * - IX_SUCCESS otherwise
+ */
+IX_STATUS
+ixNpeDlNpeMgrDataMemWrite (UINT32 npeBaseAddress, UINT32 dataMemAddress,
+ UINT32 dataMemData, BOOL verify);
+
+
+/**
+ * @fn void ixNpeDlNpeMgrExecAccRegWrite (UINT32 npeBaseAddress,
+ UINT32 regAddress,
+ UINT32 regData)
+ *
+ * @brief Writes a word to an NPE Execution Access register
+ *
+ * @param UINT32 [in] npeBaseAddress - Base Address of NPE
+ * @param UINT32 [in] regAddress - NPE Execution Access register address
+ * @param UINT32 [in] regData - data to write to register
+ *
+ * This function is used to write a single word of data to an NPE Execution
+ * Access register.
+ *
+ * @pre
+ *
+ * @post
+ *
+ * @return none
+ */
+void
+ixNpeDlNpeMgrExecAccRegWrite (UINT32 npeBaseAddress, UINT32 regAddress,
+ UINT32 regData);
+
+
+/**
+ * @fn UINT32 ixNpeDlNpeMgrExecAccRegRead (UINT32 npeBaseAddress,
+ UINT32 regAddress)
+ *
+ * @brief Reads the contents of an NPE Execution Access register
+ *
+ * @param UINT32 [in] npeBaseAddress - Base Address of NPE
+ * @param UINT32 [in] regAddress - NPE Execution Access register address
+ *
+ * This function is used to read the contents of an NPE Execution
+ * Access register.
+ *
+ * @pre
+ *
+ * @post
+ *
+ * @return The value read from the Execution Access register
+ */
+UINT32
+ixNpeDlNpeMgrExecAccRegRead (UINT32 npeBaseAddress, UINT32 regAddress);
+
+
+/**
+ * @fn void ixNpeDlNpeMgrCommandIssue (UINT32 npeBaseAddress,
+ UINT32 command)
+ *
+ * @brief Issues an NPE Execution Control command
+ *
+ * @param UINT32 [in] npeBaseAddress - Base Address of NPE
+ * @param UINT32 [in] command - Command to issue
+ *
+ * This function is used to issue a stand-alone NPE Execution Control command
+ * (e.g. command to Stop NPE execution)
+ *
+ * @pre
+ *
+ * @post
+ *
+ * @return none
+ */
+void
+ixNpeDlNpeMgrCommandIssue (UINT32 npeBaseAddress, UINT32 command);
+
+
+/**
+ * @fn void ixNpeDlNpeMgrDebugInstructionPreExec (UINT32 npeBaseAddress)
+ *
+ * @brief Prepare to executes one or more NPE instructions in the Debug
+ * Execution Stack level.
+ *
+ * @param UINT32 [in] npeBaseAddress - Base Address of NPE
+ *
+ * This function should be called once before a sequence of calls to
+ * ixNpeDlNpeMgrDebugInstructionExec().
+ *
+ * @pre
+ *
+ * @post
+ * - ixNpeDlNpeMgrDebugInstructionPostExec() should be called to restore
+ * registers values altered by this function
+ *
+ * @return none
+ */
+void
+ixNpeDlNpeMgrDebugInstructionPreExec (UINT32 npeBaseAddress);
+
+
+/**
+ * @fn IX_STATUS ixNpeDlNpeMgrDebugInstructionExec (UINT32 npeBaseAddress,
+ UINT32 npeInstruction,
+ UINT32 ctxtNum,
+ UINT32 ldur)
+ *
+ * @brief Executes a single instruction on the NPE at the Debug Execution Stack
+ * level
+ *
+ * @param UINT32 [in] npeBaseAddress - Base Address of NPE
+ * @param UINT32 [in] npeInstruction - Value to write to INSTR (Instruction)
+ * register
+ * @param UINT32 [in] ctxtNum - context the instruction will be executed
+ * in and which context store it may access
+ * @param UINT32 [in] ldur - Long Immediate Duration, set to non-zero
+ * to use long-immediate mode instruction
+ *
+ * This function is used to execute a single instruction in the NPE pipeline at
+ * the debug Execution Context Stack level. It won't disturb the state of other
+ * executing contexts. Its useful for performing NPE operations, such as
+ * writing to NPE Context Store registers and physical registers, that cannot
+ * be carried out directly using the Configuration Bus registers. This function
+ * will return TIMEOUT status if NPE not responding due to NPS is hang / halt.
+ *
+ * @pre
+ * - The NPE should be stopped and in a clean state
+ * - ixNpeDlNpeMgrDebugInstructionPreExec() should be called once before
+ * a sequential of 1 or more calls to this function
+ *
+ * @post
+ * - ixNpeDlNpeMgrDebugInstructionPostExec() should be called after
+ * a sequence of calls to this function
+ *
+ * @return
+ * - IX_NPEDL_CRITICAL_NPE_ERR if execution of instruction failed / timeout
+ * - IX_SUCCESS otherwise
+ */
+IX_STATUS
+ixNpeDlNpeMgrDebugInstructionExec (UINT32 npeBaseAddress,
+ UINT32 npeInstruction,
+ UINT32 ctxtNum, UINT32 ldur);
+
+
+/**
+ * @fn void ixNpeDlNpeMgrDebugInstructionPostExec (UINT32 npeBaseAddress)
+ *
+ * @brief Clean up after executing one or more NPE instructions in the
+ * Debug Stack Level
+ *
+ * @param UINT32 [in] npeBaseAddress - Base Address of NPE
+ *
+ * This function should be called once following a sequence of calls to
+ * ixNpeDlNpeMgrDebugInstructionExec().
+ *
+ * @pre
+ * - ixNpeDlNpeMgrDebugInstructionPreExec() was called earlier
+ *
+ * @post
+ * - The Instruction Pipeline will cleared
+ *
+ * @return none
+ */
+void
+ixNpeDlNpeMgrDebugInstructionPostExec (UINT32 npeBaseAddress);
+
+
+/**
+ * @fn IX_STATUS ixNpeDlNpeMgrPhysicalRegWrite (UINT32 npeBaseAddress,
+ UINT32 regAddr,
+ UINT32 regValue,
+ BOOL verify)
+ *
+ * @brief Write one of the 32* 32-bit physical registers in the NPE data
+ * register file
+ *
+ * @param UINT32 [in] npeBaseAddress - Base Address of NPE
+ * @param UINT32 [in] regAddr - number of the physical register (0-31)*
+ * @param UINT32 [in] regValue - value to write to the physical register
+ * @param BOOL [in] verify - if TRUE, verify the register is written
+ * successfully.
+ *
+ * This function writes a physical register in the NPE data register file.
+ * If the <i>verify</i> option is ON, NpeDl will read back the register to
+ * verify that it was written successfully
+ * *Note that release 1.0 of this software supports 32 physical
+ * registers, but 64 may be supported in future versions.
+ *
+ * @pre
+ * - The NPE should be stopped and in a clean state
+ * - ixNpeDlNpeMgrDebugInstructionPreExec() should be called once before
+ * a sequential of 1 or more calls to this function
+ *
+ * @post
+ * - Contents of REGMAP Context Store register for Context 0 will be altered
+ * - ixNpeDlNpeMgrDebugInstructionPostExec() should be called after
+ * a sequence of calls to this function
+ *
+ * @return
+ * - IX_FAIL if verify is TRUE and the Context Register was not written
+ * successfully
+ * - IX_SUCCESS if Context Register was written successfully
+ * - IX_NPEDL_CRITICAL_NPE_ERR if Context Register was not written
+ * successfully due to timeout error where NPE is not responding
+ */
+IX_STATUS
+ixNpeDlNpeMgrPhysicalRegWrite (UINT32 npeBaseAddress, UINT32 regAddr,
+ UINT32 regValue, BOOL verify);
+
+
+/**
+ * @fn IX_STATUS ixNpeDlNpeMgrCtxtRegWrite (UINT32 npeBaseAddress,
+ UINT32 ctxtNum,
+ IxNpeDlCtxtRegNum ctxtReg,
+ UINT32 ctxtRegVal,
+ BOOL verify)
+ *
+ * @brief Writes a value to a Context Store register on an NPE
+ *
+ * @param UINT32 [in] npeBaseAddress - Base Address of NPE
+ * @param UINT32 [in] ctxtNum - context store to access
+ * @param IxNpeDlCtxtRegNum [in] ctxtReg - which Context Store reg to write
+ * @param UINT32 [in] ctxtRegVal - value to write to the Context Store
+ * register
+ * @param BOOL [in] verify - if TRUE, verify the register is
+ * written successfully.
+ *
+ * This function writes the contents of a Context Store register in the NPE
+ * register file. If the <i>verify</i> option is ON, NpeDl will read back the
+ * register to verify that it was written successfully
+ *
+ * @pre
+ * - The NPE should be stopped and in a clean state
+ * - ixNpeDlNpeMgrDebugInstructionPreExec() should be called once before
+ * a sequential of 1 or more calls to this function
+ *
+ * @post
+ * - ixNpeDlNpeMgrDebugInstructionPostExec() should be called after
+ * a sequence of calls to this function
+ *
+ * @return
+ * - IX_FAIL if verify is TRUE and the Context Register was not written
+ * successfully
+ * - IX_SUCCESS if Context Register was written successfully
+ * - IX_NPEDL_CRITICAL_NPE_ERR if Context Register was not written
+ * successfully due to timeout error where NPE is not responding
+ */
+IX_STATUS
+ixNpeDlNpeMgrCtxtRegWrite (UINT32 npeBaseAddress, UINT32 ctxtNum,
+ IxNpeDlCtxtRegNum ctxtReg, UINT32 ctxtRegVal,
+ BOOL verify);
+
+
+/**
+ * @fn void ixNpeDlNpeMgrUtilsStatsShow (void)
+ *
+ * @brief This function will display the statistics of the IxNpeDl NpeMgrUtils
+ * module
+ *
+ * @return none
+ */
+void
+ixNpeDlNpeMgrUtilsStatsShow (void);
+
+
+/**
+ * @fn void ixNpeDlNpeMgrUtilsStatsReset (void)
+ *
+ * @brief This function will reset the statistics of the IxNpeDl NpeMgrUtils
+ * module
+ *
+ * @return none
+ */
+void
+ixNpeDlNpeMgrUtilsStatsReset (void);
+
+
+#endif /* IXNPEDLNPEMGRUTILS_P_H */
diff --git a/cpu/ixp/npe/include/IxNpeDlNpeMgr_p.h b/cpu/ixp/npe/include/IxNpeDlNpeMgr_p.h
new file mode 100644
index 0000000000..b7fb0f0217
--- /dev/null
+++ b/cpu/ixp/npe/include/IxNpeDlNpeMgr_p.h
@@ -0,0 +1,260 @@
+/**
+ * @file IxNpeDlNpeMgr_p.h
+ *
+ * @author Intel Corporation
+ * @date 14 December 2001
+ * @brief This file contains the private API for the NpeMgr module.
+ *
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+*/
+
+
+/**
+ * @defgroup IxNpeDlNpeMgr_p IxNpeDlNpeMgr_p
+ *
+ * @brief The private API for the IxNpeDl NpeMgr module
+ *
+ * @{
+ */
+
+#ifndef IXNPEDLNPEMGR_P_H
+#define IXNPEDLNPEMGR_P_H
+
+
+/*
+ * Put the user defined include files required.
+ */
+#include "IxNpeDl.h"
+#include "IxOsalTypes.h"
+
+
+/*
+ * Function Prototypes
+ */
+
+
+/**
+ * @fn void ixNpeDlNpeMgrInit (void)
+ *
+ * @brief Initialises the NpeMgr module
+ *
+ * @param none
+ *
+ * This function initialises the NpeMgr module.
+ * It should be called before any other function in this module is called.
+ * It only needs to be called once, but can be called multiple times safely.
+ * The code will ASSERT on failure.
+ *
+ * @pre
+ * - It must be called before any other function in this module
+ *
+ * @post
+ * - NPE Configuration Register memory space will be mapped using
+ * IxOsal. This memory will not be unmapped by this module.
+ *
+ * @return none
+ */
+void
+ixNpeDlNpeMgrInit (void);
+
+
+/**
+ * @fn IX_STATUS ixNpeMhNpeMgrUninit (void)
+ *
+ * @brief This function will uninitialise the IxNpeDlNpeMgr sub-component.
+ *
+ * This function will uninitialise the IxNpeDlNpeMgr sub-component.
+ * It should only be called once, and only if the IxNpeDlNpeMgr sub-component
+ * has already been initialised by calling @ref ixNpeDlNpeMgrInit().
+ * No other IxNpeDlNpeMgr sub-component API functions should be called
+ * until @ref ixNpeDlNpeMgrInit() is called again.
+ * If possible, this function should be called before a soft reboot or unloading
+ * a kernel module to perform any clean up operations required for IxNpeMh.
+ *
+ * @return
+ * - IX_SUCCESS if the operation was successful
+ * - IX_FAIL otherwise
+ */
+
+IX_STATUS ixNpeDlNpeMgrUninit (void);
+
+
+/**
+ * @fn IX_STATUS ixNpeDlNpeMgrImageLoad (IxNpeDlNpeId npeId,
+ UINT32 *imageCodePtr,
+ BOOL verify)
+ *
+ * @brief Loads a image of microcode onto an NPE
+ *
+ * @param IxNpeDlNpeId [in] npeId - Id of target NPE
+ * @param UINT32* [in] imageCodePtr - pointer to image code in image to be
+ * downloaded
+ * @param BOOL [in] verify - if TRUE, verify each word written to
+ * NPE memory.
+ *
+ * This function loads a image containing blocks of microcode onto a
+ * particular NPE. If the <i>verify</i> option is ON, NpeDl will read back each
+ * word written and verify that it was written successfully
+ *
+ * @pre
+ * - The NPE should be stopped beforehand
+ *
+ * @post
+ * - The NPE Instruction Pipeline may be flushed clean
+ *
+ * @return
+ * - IX_SUCCESS if the download was successful
+ * - IX_FAIL if the download failed
+ * - IX_NPEDL_CRITICAL_NPE_ERR if the download failed due to timeout error
+ * where NPE is not responding
+ */
+IX_STATUS
+ixNpeDlNpeMgrImageLoad (IxNpeDlNpeId npeId, UINT32 *imageCodePtr,
+ BOOL verify);
+
+
+/**
+ * @fn IX_STATUS ixNpeDlNpeMgrNpeReset (IxNpeDlNpeId npeId)
+ *
+ * @brief sets a NPE to RESET state
+ *
+ * @param IxNpeDlNpeId [in] npeId - id of target NPE
+ *
+ * This function performs a soft NPE reset by writing reset values to the
+ * Configuration Bus Execution Control registers, the Execution Context Stack
+ * registers, the Physical Register file, and the Context Store registers for
+ * each context number. It also clears inFIFO, outFIFO and Watchpoint FIFO.
+ * It does not reset NPE Co-processors.
+ *
+ * @pre
+ * - The NPE should be stopped beforehand
+ *
+ * @post
+ * - NPE NextProgram Counter (NextPC) will be set to a fixed initial value,
+ * such as 0. This should be explicitly set by downloading State
+ * Information before starting NPE Execution.
+ * - The NPE Instruction Pipeline will be in a clean state.
+ *
+ * @return
+ * - IX_SUCCESS if the operation was successful
+ * - IX_FAIL if the operation failed
+ * - IX_NPEDL_CRITICAL_NPE_ERR if the operation failed due to NPE hang
+ */
+IX_STATUS
+ixNpeDlNpeMgrNpeReset (IxNpeDlNpeId npeId);
+
+
+/**
+ * @fn IX_STATUS ixNpeDlNpeMgrNpeStart (IxNpeDlNpeId npeId)
+ *
+ * @brief Starts NPE Execution
+ *
+ * @param IxNpeDlNpeId [in] npeId - Id of target NPE
+ *
+ * Ensures only background Execution Stack Level is Active, clears instruction
+ * pipeline, and starts Execution on a NPE by sending a Start NPE command to
+ * the NPE. Checks the execution status of the NPE to verify that it is
+ * running.
+ *
+ * @pre
+ * - The NPE should be stopped beforehand.
+ * - Note that this function does not set the NPE Next Program Counter
+ * (NextPC), so it should be set beforehand if required by downloading
+ * appropriate State Information.
+ *
+ * @post
+ *
+ * @return
+ * - IX_SUCCESS if the operation was successful
+ * - IX_FAIL otherwise
+ */
+IX_STATUS
+ixNpeDlNpeMgrNpeStart (IxNpeDlNpeId npeId);
+
+
+/**
+ * @fn IX_STATUS ixNpeDlNpeMgrNpeStop (IxNpeDlNpeId npeId)
+ *
+ * @brief Halts NPE Execution
+ *
+ * @param IxNpeDlNpeId [in] npeId - id of target NPE
+ *
+ * Stops execution on an NPE by sending a Stop NPE command to the NPE.
+ * Checks the execution status of the NPE to verify that it has stopped.
+ *
+ * @pre
+ *
+ * @post
+ *
+ * @return
+ * - IX_SUCCESS if the operation was successful
+ * - IX_FAIL otherwise
+ */
+IX_STATUS
+ixNpeDlNpeMgrNpeStop (IxNpeDlNpeId npeId);
+
+
+/**
+ * @fn void ixNpeDlNpeMgrStatsShow (void)
+ *
+ * @brief This function will display statistics of the IxNpeDl NpeMgr module
+ *
+ * @return none
+ */
+void
+ixNpeDlNpeMgrStatsShow (void);
+
+
+/**
+ * @fn void ixNpeDlNpeMgrStatsReset (void)
+ *
+ * @brief This function will reset the statistics of the IxNpeDl NpeMgr module
+ *
+ * @return none
+ */
+void
+ixNpeDlNpeMgrStatsReset (void);
+
+
+#endif /* IXNPEDLIMAGEMGR_P_H */
+
+/**
+ * @} defgroup IxNpeDlNpeMgr_p
+ */
diff --git a/cpu/ixp/npe/include/IxNpeMh.h b/cpu/ixp/npe/include/IxNpeMh.h
new file mode 100644
index 0000000000..20ee38b062
--- /dev/null
+++ b/cpu/ixp/npe/include/IxNpeMh.h
@@ -0,0 +1,497 @@
+/**
+ * @file IxNpeMh.h
+ *
+ * @date 14 Dec 2001
+ *
+ * @brief This file contains the public API for the IXP400 NPE Message
+ * Handler component.
+ *
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+*/
+
+/**
+ * @defgroup IxNpeMh IXP400 NPE Message Handler (IxNpeMh) API
+ *
+ * @brief The public API for the IXP400 NPE Message Handler component.
+ *
+ * @{
+ */
+
+#ifndef IXNPEMH_H
+#define IXNPEMH_H
+
+#include "IxOsalTypes.h"
+
+/*
+ * #defines for function return types, etc.
+ */
+
+#define IX_NPEMH_MIN_MESSAGE_ID (0x00) /**< minimum valid message ID */
+#define IX_NPEMH_MAX_MESSAGE_ID (0xFF) /**< maximum valid message ID */
+
+#define IX_NPEMH_SEND_RETRIES_DEFAULT (3) /**< default msg send retries */
+
+
+/**
+ * @def IX_NPEMH_CRITICAL_NPE_ERR
+ *
+ * @brief NpeMH function return value for a Critical NPE error occuring during
+ sending/receiving message. Assume NPE hang / halt if this value is
+ returned.
+ */
+#define IX_NPEMH_CRITICAL_NPE_ERR 2
+
+/**
+ * @enum IxNpeMhNpeId
+ *
+ * @brief The ID of a particular NPE.
+ * @note In this context, for IXP425 Silicon (B0):<br>
+ * - NPE-A has HDLC, HSS, AAL and UTOPIA Coprocessors.<br>
+ * - NPE-B has Ethernet Coprocessor.<br>
+ * - NPE-C has Ethernet, AES, DES and HASH Coprocessors.<br>
+ * - IXP400 Product Line have different combinations of coprocessors.
+ */
+
+typedef enum
+{
+ IX_NPEMH_NPEID_NPEA = 0, /**< ID for NPE-A */
+ IX_NPEMH_NPEID_NPEB, /**< ID for NPE-B */
+ IX_NPEMH_NPEID_NPEC, /**< ID for NPE-C */
+ IX_NPEMH_NUM_NPES /**< Number of NPEs */
+} IxNpeMhNpeId;
+
+/**
+ * @enum IxNpeMhNpeInterrupts
+ *
+ * @brief Indicator specifying whether or not NPE interrupts should drive
+ * receiving of messages from the NPEs.
+ */
+
+typedef enum
+{
+ IX_NPEMH_NPEINTERRUPTS_NO = 0, /**< Don't use NPE interrupts */
+ IX_NPEMH_NPEINTERRUPTS_YES /**< Do use NPE interrupts */
+} IxNpeMhNpeInterrupts;
+
+/**
+ * @brief The 2-word message structure to send to and receive from the
+ * NPEs.
+ */
+
+typedef struct
+{
+ UINT32 data[2]; /**< the actual data of the message */
+} IxNpeMhMessage;
+
+/** message ID */
+typedef UINT32 IxNpeMhMessageId;
+
+/**
+ * @typedef IxNpeMhCallback
+ *
+ * @brief This prototype shows the format of a message callback function.
+ *
+ * This prototype shows the format of a message callback function. The
+ * message callback will be passed the message to be handled and will also
+ * be told from which NPE the message was received. The message callback
+ * will either be registered by ixNpeMhUnsolicitedCallbackRegister() or
+ * passed as a parameter to ixNpeMhMessageWithResponseSend(). It will be
+ * called from within an ISR triggered by the NPE's "outFIFO not empty"
+ * interrupt (see ixNpeMhInitialize()). The parameters passed are the ID
+ * of the NPE that the message was received from, and the message to be
+ * handled.<P><B>Re-entrancy:</B> This function is only a prototype, and
+ * will be implemented by the client. It does not need to be re-entrant.
+ */
+
+typedef void (*IxNpeMhCallback) (IxNpeMhNpeId, IxNpeMhMessage);
+
+/*
+ * Prototypes for interface functions.
+ */
+
+/**
+ * @ingroup IxNpeMh
+ *
+ * @fn IX_STATUS ixNpeMhInitialize (
+ IxNpeMhNpeInterrupts npeInterrupts)
+ *
+ * @brief This function will initialise the IxNpeMh component.
+ *
+ * @param npeInterrupts @ref IxNpeMhNpeInterrupts [in] - This parameter
+ * dictates whether or not the IxNpeMh component will service NPE "outFIFO
+ * not empty" interrupts to trigger receiving and processing of messages
+ * from the NPEs. If not then the client must use ixNpeMhMessagesReceive()
+ * to control message receiving and processing.
+ *
+ * This function will initialise the IxNpeMh component. It should only be
+ * called once, prior to using the IxNpeMh component. The following
+ * actions will be performed by this function:<OL><LI>Initialization of
+ * internal data structures (e.g. solicited and unsolicited callback
+ * tables).</LI><LI>Configuration of the interface with the NPEs (e.g.
+ * enabling of NPE "outFIFO not empty" interrupts).</LI><LI>Registration of
+ * ISRs that will receive and handle messages when the NPEs' "outFIFO not
+ * empty" interrupts fire (if npeInterrupts equals
+ * IX_NPEMH_NPEINTERRUPTS_YES).</LI></OL>
+ *
+ * @return The function returns a status indicating success or failure.
+ */
+
+PUBLIC IX_STATUS ixNpeMhInitialize (
+ IxNpeMhNpeInterrupts npeInterrupts);
+
+/**
+ * @ingroup IxNpeMh
+ *
+ * @fn IX_STATUS ixNpeMhUnload (void)
+ *
+ * @brief This function will uninitialise the IxNpeMh component.
+ *
+ * This function will uninitialise the IxNpeMh component. It should only be
+ * called once, and only if the IxNpeMh component has already been initialised.
+ * No other IxNpeMh API functions should be called until @ref ixNpeMhInitialize
+ * is called again.
+ * If possible, this function should be called before a soft reboot or unloading
+ * a kernel module to perform any clean up operations required for IxNpeMh.
+ *
+ * The following actions will be performed by this function:
+ * <OL><LI>Unmapping of kernel memory mapped by the function
+ * @ref ixNpeMhInitialize.</LI></OL>
+ *
+ * @return The function returns a status indicating success or failure.
+ */
+
+PUBLIC IX_STATUS ixNpeMhUnload (void);
+
+/**
+ * @ingroup IxNpeMh
+ *
+ * @fn IX_STATUS ixNpeMhUnsolicitedCallbackRegister (
+ IxNpeMhNpeId npeId,
+ IxNpeMhMessageId messageId,
+ IxNpeMhCallback unsolicitedCallback)
+ *
+ * @brief This function will register an unsolicited callback for a
+ * particular NPE and message ID.
+ *
+ * @param npeId @ref IxNpeMhNpeId [in] - The ID of the NPE whose messages
+ * the unsolicited callback will handle.
+ * @param messageId @ref IxNpeMhMessageId [in] - The ID of the messages the
+ * unsolicited callback will handle.
+ * @param unsolicitedCallback @ref IxNpeMhCallback [in] - The unsolicited
+ * callback function. A value of NULL will deregister any previously
+ * registered callback for this NPE and message ID.
+ *
+ * This function will register an unsolicited message callback for a
+ * particular NPE and message ID.<P>If an unsolicited callback is already
+ * registered for the specified NPE and message ID then the callback will
+ * be overwritten. Only one client will be responsible for handling a
+ * particular message ID associated with a NPE. Registering a NULL
+ * unsolicited callback will deregister any previously registered
+ * callback.<P>The callback function will be called from an ISR that will
+ * be triggered by the NPE's "outFIFO not empty" interrupt (see
+ * ixNpeMhInitialize()) to handle any unsolicited messages of the specific
+ * message ID received from the NPE. Unsolicited messages will be handled
+ * in the order they are received.<P>If no unsolicited callback can be
+ * found for a received message then it is assumed that the message is
+ * solicited.<P>If more than one client may be interested in a particular
+ * unsolicited message then the suggested strategy is to register a
+ * callback for the message that can itself distribute the message to
+ * multiple clients as necessary.<P>See also
+ * ixNpeMhUnsolicitedCallbackForRangeRegister().<P><B>Re-entrancy:</B> This
+ * function will be callable from any thread at any time. IxOsal
+ * will be used for any necessary resource protection.
+ *
+ * @return The function returns a status indicating success or failure.
+ */
+
+PUBLIC IX_STATUS ixNpeMhUnsolicitedCallbackRegister (
+ IxNpeMhNpeId npeId,
+ IxNpeMhMessageId messageId,
+ IxNpeMhCallback unsolicitedCallback);
+
+/**
+ * @ingroup IxNpeMh
+ *
+ * @fn IX_STATUS ixNpeMhUnsolicitedCallbackForRangeRegister (
+ IxNpeMhNpeId npeId,
+ IxNpeMhMessageId minMessageId,
+ IxNpeMhMessageId maxMessageId,
+ IxNpeMhCallback unsolicitedCallback)
+ *
+ * @brief This function will register an unsolicited callback for a
+ * particular NPE and range of message IDs.
+ *
+ * @param npeId @ref IxNpeMhNpeId [in] - The ID of the NPE whose messages the
+ * unsolicited callback will handle.
+ * @param minMessageId @ref IxNpeMhMessageId [in] - The minimum message ID in
+ * the range of message IDs the unsolicited callback will handle.
+ * @param maxMessageId @ref IxNpeMhMessageId [in] - The maximum message ID in
+ * the range of message IDs the unsolicited callback will handle.
+ * @param unsolicitedCallback @ref IxNpeMhCallback [in] - The unsolicited
+ * callback function. A value of NULL will deregister any previously
+ * registered callback(s) for this NPE and range of message IDs.
+ *
+ * This function will register an unsolicited callback for a particular NPE
+ * and range of message IDs. It is a convenience function that is
+ * effectively the same as calling ixNpeMhUnsolicitedCallbackRegister() for
+ * each ID in the specified range. See
+ * ixNpeMhUnsolicitedCallbackRegister() for more
+ * information.<P><B>Re-entrancy:</B> This function will be callable from
+ * any thread at any time. IxOsal will be used for any necessary
+ * resource protection.
+ *
+ * @return The function returns a status indicating success or failure.
+ */
+
+PUBLIC IX_STATUS ixNpeMhUnsolicitedCallbackForRangeRegister (
+ IxNpeMhNpeId npeId,
+ IxNpeMhMessageId minMessageId,
+ IxNpeMhMessageId maxMessageId,
+ IxNpeMhCallback unsolicitedCallback);
+
+/**
+ * @ingroup IxNpeMh
+ *
+ * @fn IX_STATUS ixNpeMhMessageSend (
+ IxNpeMhNpeId npeId,
+ IxNpeMhMessage message,
+ UINT32 maxSendRetries)
+ *
+ * @brief This function will send a message to a particular NPE.
+ *
+ * @param npeId @ref IxNpeMhNpeId [in] - The ID of the NPE to send the message
+ * to.
+ * @param message @ref IxNpeMhMessage [in] - The message to send.
+ * @param maxSendRetries UINT32 [in] - Max num. of retries to perform
+ * if the NPE's inFIFO is full.
+ *
+ * This function will send a message to a particular NPE. It will be the
+ * client's responsibility to ensure that the message is properly formed.
+ * The return status will signify to the client if the message was
+ * successfully sent or not.<P>If the message is sent to the NPE then this
+ * function will return a status of success. Note that this will only mean
+ * the message has been placed in the NPE's inFIFO. There will be no way
+ * of knowing that the NPE has actually read the message, but once in the
+ * incoming message queue it will be safe to assume that the NPE will
+ * process it.
+ * <P>The inFIFO may fill up sometimes if the Xscale is sending messages
+ * faster than the NPE can handle them. This forces us to retry attempts
+ * to send the message until the NPE services the inFIFO. The client should
+ * specify a ceiling value for the number of retries suitable to their
+ * needs. IX_NPEMH_SEND_RETRIES_DEFAULT can be used as a default value for
+ * the <i>maxSendRetries</i> parameter for this function. Each retry
+ * exceeding this default number will incur a blocking delay of 1 microsecond,
+ * to avoid consuming too much AHB bus bandwidth while performing retries.
+ * <P>Note this function <B>must</B> only be used for messages.
+ * that do not solicit responses. If the message being sent will solicit a
+ * response then the ixNpeMhMessageWithResponseSend() function <B>must</B>
+ * be used to ensure that the response is correctly
+ * handled. <P> This function will return timeout status if NPE hang / halt
+ * while sending message. The timeout error is not related to the
+ * <i>maxSendRetries</i> as mentioned above. The timeout error will only occur
+ * if the first word of the message has been sent to NPE (not exceeding
+ * <i>maxSendRetries</i> when sending 1st message word), but the second word of
+ * the message can't be written to NPE's inFIFO due to NPE hang / halt after
+ * maximum waiting time (IX_NPE_MH_MAX_NUM_OF_RETRIES).
+ * <P><B>Re-entrancy:</B> This function will be callable from any
+ * thread at any time. IxOsal will be used for any necessary
+ * resource protection.
+ *
+ * @return The function returns a status indicating success, failure or timeout.
+ */
+
+PUBLIC IX_STATUS ixNpeMhMessageSend (
+ IxNpeMhNpeId npeId,
+ IxNpeMhMessage message,
+ UINT32 maxSendRetries);
+
+/**
+ * @ingroup IxNpeMh
+ *
+ * @fn IX_STATUS ixNpeMhMessageWithResponseSend (
+ IxNpeMhNpeId npeId,
+ IxNpeMhMessage message,
+ IxNpeMhMessageId solicitedMessageId,
+ IxNpeMhCallback solicitedCallback,
+ UINT32 maxSendRetries)
+ *
+ * @brief This function is equivalent to the ixNpeMhMessageSend() function,
+ * but must be used when the message being sent will solicited a response.
+ *
+ * @param npeId @ref IxNpeMhNpeId [in] - The ID of the NPE to send the message
+ * to.
+ * @param message @ref IxNpeMhMessage [in] - The message to send.
+ * @param solicitedMessageId @ref IxNpeMhMessageId [in] - The ID of the
+ * solicited response message.
+ * @param solicitedCallback @ref IxNpeMhCallback [in] - The function to use to
+ * pass the response message back to the client. A value of NULL will
+ * cause the response message to be discarded.
+ * @param maxSendRetries UINT32 [in] - Max num. of retries to perform
+ * if the NPE's inFIFO is full.
+ *
+ * This function is equivalent to the ixNpeMhMessageSend() function, but
+ * must be used when the message being sent will solicited a
+ * response.<P>The client must specify the ID of the solicited response
+ * message to allow the response to be recognised when it is received. The
+ * client must also specify a callback function to handle the received
+ * response. The IxNpeMh component will not offer the facility to send a
+ * message to a NPE and receive a response within the same context.<P>Note
+ * if the client is not interested in the response, specifying a NULL
+ * callback will cause the response message to be discarded.<P>The
+ * solicited callback will be stored and called some time later from an ISR
+ * that will be triggered by the NPE's "outFIFO not empty" interrupt (see
+ * ixNpeMhInitialize()) to handle the response message corresponding to the
+ * message sent. Response messages will be handled in the order they are
+ * received.<P>
+ * <P>The inFIFO may fill up sometimes if the Xscale is sending messages
+ * faster than the NPE can handle them. This forces us to retry attempts
+ * to send the message until the NPE services the inFIFO. The client should
+ * specify a ceiling value for the number of retries suitable to their
+ * needs. IX_NPEMH_SEND_RETRIES_DEFAULT can be used as a default value for
+ * the <i>maxSendRetries</i> parameter for this function. Each retry
+ * exceeding this default number will incur a blocking delay of 1 microsecond,
+ * to avoid consuming too much AHB bus bandwidth while performing retries.
+ * <P> This function will return timeout status if NPE hang / halt
+ * while sending message. The timeout error is not related to the
+ * <i>maxSendRetries</i> as mentioned above. The timeout error will only occur
+ * if the first word of the message has been sent to NPE (not exceeding
+ * <i>maxSendRetries</i> when sending 1st message word), but the second word of
+ * the message can't be written to NPE's inFIFO due to NPE hang / halt after
+ * maximum waiting time (IX_NPE_MH_MAX_NUM_OF_RETRIES).
+ * <P><B>Re-entrancy:</B> This function will be callable from any
+ * thread at any time. IxOsal will be used for any necessary
+ * resource protection.
+ *
+ * @return The function returns a status indicating success or failure.
+ */
+
+PUBLIC IX_STATUS ixNpeMhMessageWithResponseSend (
+ IxNpeMhNpeId npeId,
+ IxNpeMhMessage message,
+ IxNpeMhMessageId solicitedMessageId,
+ IxNpeMhCallback solicitedCallback,
+ UINT32 maxSendRetries);
+
+/**
+ * @ingroup IxNpeMh
+ *
+ * @fn IX_STATUS ixNpeMhMessagesReceive (
+ IxNpeMhNpeId npeId)
+ *
+ * @brief This function will receive messages from a particular NPE and
+ * pass each message to the client via a solicited callback (for solicited
+ * messages) or an unsolicited callback (for unsolicited messages).
+ *
+ * @param npeId @ref IxNpeMhNpeId [in] - The ID of the NPE to receive and
+ * process messages from.
+ *
+ * This function will receive messages from a particular NPE and pass each
+ * message to the client via a solicited callback (for solicited messages)
+ * or an unsolicited callback (for unsolicited messages).<P>If the IxNpeMh
+ * component is initialised to service NPE "outFIFO not empty" interrupts
+ * (see ixNpeMhInitialize()) then there is no need to call this function.
+ * This function is only provided as an alternative mechanism to control
+ * the receiving and processing of messages from the NPEs.<P> This function
+ * will return timeout status if NPE hang / halt while receiving message. The
+ * timeout error will only occur if this function has read the first word of
+ * the message and can't read second word of the message from NPE's outFIFO
+ * after maximum retries (IX_NPE_MH_MAX_NUM_OF_RETRIES).
+ * <P>Note this function cannot be called from within
+ * an ISR as it will use resource protection mechanisms.<P><B>Re-entrancy:</B>
+ * This function will be callable from any thread at any time. IxOsal will be
+ * used for any necessary resource protection.
+ *
+ * @return The function returns a status indicating success, failure or timeout.
+ */
+
+PUBLIC IX_STATUS ixNpeMhMessagesReceive (
+ IxNpeMhNpeId npeId);
+
+/**
+ * @ingroup IxNpeMh
+ *
+ * @fn IX_STATUS ixNpeMhShow (
+ IxNpeMhNpeId npeId)
+ *
+ * @brief This function will display the current state of the IxNpeMh
+ * component.
+ *
+ * <B>Re-entrancy:</B> This function will be callable from
+ * any thread at any time. However, no resource protection will be used
+ * so as not to impact system performance. As this function is only
+ * reading statistical information then this is acceptable.
+ *
+ * @param npeId @ref IxNpeMhNpeId [in] - The ID of the NPE to display state
+ * information for.
+ *
+ * @return The function returns a status indicating success or failure.
+ */
+
+PUBLIC IX_STATUS ixNpeMhShow (
+ IxNpeMhNpeId npeId);
+
+/**
+ * @ingroup IxNpeMh
+ *
+ * @fn IX_STATUS ixNpeMhShowReset (
+ IxNpeMhNpeId npeId)
+ *
+ * @brief This function will reset the current state of the IxNpeMh
+ * component.
+ *
+ * <B>Re-entrancy:</B> This function will be callable from
+ * any thread at any time. However, no resource protection will be used
+ * so as not to impact system performance. As this function is only
+ * writing statistical information then this is acceptable.
+ *
+ * @param npeId @ref IxNpeMhNpeId [in] - The ID of the NPE to reset state
+ * information for.
+ *
+ * @return The function returns a status indicating success or failure.
+ */
+
+PUBLIC IX_STATUS ixNpeMhShowReset (
+ IxNpeMhNpeId npeId);
+
+#endif /* IXNPEMH_H */
+
+/**
+ * @} defgroup IxNpeMh
+ */
diff --git a/cpu/ixp/npe/include/IxNpeMhConfig_p.h b/cpu/ixp/npe/include/IxNpeMhConfig_p.h
new file mode 100644
index 0000000000..375b3468e6
--- /dev/null
+++ b/cpu/ixp/npe/include/IxNpeMhConfig_p.h
@@ -0,0 +1,555 @@
+/**
+ * @file IxNpeMhConfig_p.h
+ *
+ * @author Intel Corporation
+ * @date 18 Jan 2002
+ *
+ * @brief This file contains the private API for the Configuration module.
+ *
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+*/
+
+/**
+ * @defgroup IxNpeMhConfig_p IxNpeMhConfig_p
+ *
+ * @brief The private API for the Configuration module.
+ *
+ * @{
+ */
+
+#ifndef IXNPEMHCONFIG_P_H
+#define IXNPEMHCONFIG_P_H
+
+#include "IxOsal.h"
+
+#include "IxNpeMh.h"
+#include "IxNpeMhMacros_p.h"
+
+/*
+ * inline definition
+ */
+/* enable function inlining for performances */
+#ifdef IXNPEMHSOLICITEDCBMGR_C
+/* Non-inline functions will be defined in this translation unit.
+ Reason is that in GNU Compiler, if the Optimization is turn off, all extern inline
+ functions will not be compiled.
+*/
+# ifndef __wince
+# ifndef IXNPEMHCONFIG_INLINE
+# define IXNPEMHCONFIG_INLINE
+# endif
+# else
+# ifndef IXNPEMHCONFIG_INLINE
+# define IXNPEMHCONFIG_INLINE IX_OSAL_INLINE_EXTERN
+# endif
+# endif /* __wince*/
+
+#else
+
+# ifndef IXNPEMHCONFIG_INLINE
+# define IXNPEMHCONFIG_INLINE IX_OSAL_INLINE_EXTERN
+# endif /* IXNPEMHCONFIG_INLINE */
+#endif /* IXNPEMHSOLICITEDCBMGR_C */
+/*
+ * Typedefs and #defines, etc.
+ */
+
+typedef void (*IxNpeMhConfigIsr) (int); /**< ISR function pointer */
+
+/**
+ * @struct IxNpeMhConfigNpeInfo
+ *
+ * @brief This structure is used to maintain the configuration information
+ * associated with an NPE.
+ */
+
+typedef struct
+{
+ IxOsalMutex mutex; /**< mutex */
+ UINT32 interruptId; /**< interrupt ID */
+ UINT32 virtualRegisterBase; /**< register virtual base address */
+ UINT32 statusRegister; /**< status register virtual address */
+ UINT32 controlRegister; /**< control register virtual address */
+ UINT32 inFifoRegister; /**< inFIFO register virutal address */
+ UINT32 outFifoRegister; /**< outFIFO register virtual address */
+ IxNpeMhConfigIsr isr; /**< isr routine for handling interrupt */
+ BOOL oldInterruptState; /**< old interrupt state (TRUE => enabled) */
+} IxNpeMhConfigNpeInfo;
+
+
+/*
+ * #defines for function return types, etc.
+ */
+
+/**< NPE register base address */
+#define IX_NPEMH_NPE_BASE (IX_OSAL_IXP400_PERIPHERAL_PHYS_BASE)
+
+#define IX_NPEMH_NPEA_OFFSET (0x6000) /**< NPE-A register base offset */
+#define IX_NPEMH_NPEB_OFFSET (0x7000) /**< NPE-B register base offset */
+#define IX_NPEMH_NPEC_OFFSET (0x8000) /**< NPE-C register base offset */
+
+#define IX_NPEMH_NPESTAT_OFFSET (0x002C) /**< NPE status register offset */
+#define IX_NPEMH_NPECTL_OFFSET (0x0030) /**< NPE control register offset */
+#define IX_NPEMH_NPEFIFO_OFFSET (0x0038) /**< NPE FIFO register offset */
+
+/** NPE-A register base address */
+#define IX_NPEMH_NPEA_BASE (IX_NPEMH_NPE_BASE + IX_NPEMH_NPEA_OFFSET)
+/** NPE-B register base address */
+#define IX_NPEMH_NPEB_BASE (IX_NPEMH_NPE_BASE + IX_NPEMH_NPEB_OFFSET)
+/** NPE-C register base address */
+#define IX_NPEMH_NPEC_BASE (IX_NPEMH_NPE_BASE + IX_NPEMH_NPEC_OFFSET)
+
+/* NPE-A configuration */
+
+/** NPE-A interrupt */
+#define IX_NPEMH_NPEA_INT (IX_OSAL_IXP400_NPEA_IRQ_LVL)
+/** NPE-A FIFO register */
+#define IX_NPEMH_NPEA_FIFO (IX_NPEMH_NPEA_BASE + IX_NPEMH_NPEFIFO_OFFSET)
+/** NPE-A control register */
+#define IX_NPEMH_NPEA_CTL (IX_NPEMH_NPEA_BASE + IX_NPEMH_NPECTL_OFFSET)
+/** NPE-A status register */
+#define IX_NPEMH_NPEA_STAT (IX_NPEMH_NPEA_BASE + IX_NPEMH_NPESTAT_OFFSET)
+
+/* NPE-B configuration */
+
+/** NPE-B interrupt */
+#define IX_NPEMH_NPEB_INT (IX_OSAL_IXP400_NPEB_IRQ_LVL)
+/** NPE-B FIFO register */
+#define IX_NPEMH_NPEB_FIFO (IX_NPEMH_NPEB_BASE + IX_NPEMH_NPEFIFO_OFFSET)
+/** NPE-B control register */
+#define IX_NPEMH_NPEB_CTL (IX_NPEMH_NPEB_BASE + IX_NPEMH_NPECTL_OFFSET)
+/** NPE-B status register */
+#define IX_NPEMH_NPEB_STAT (IX_NPEMH_NPEB_BASE + IX_NPEMH_NPESTAT_OFFSET)
+
+/* NPE-C configuration */
+
+/** NPE-C interrupt */
+#define IX_NPEMH_NPEC_INT (IX_OSAL_IXP400_NPEC_IRQ_LVL)
+/** NPE-C FIFO register */
+#define IX_NPEMH_NPEC_FIFO (IX_NPEMH_NPEC_BASE + IX_NPEMH_NPEFIFO_OFFSET)
+/** NPE-C control register */
+#define IX_NPEMH_NPEC_CTL (IX_NPEMH_NPEC_BASE + IX_NPEMH_NPECTL_OFFSET)
+/** NPE-C status register */
+#define IX_NPEMH_NPEC_STAT (IX_NPEMH_NPEC_BASE + IX_NPEMH_NPESTAT_OFFSET)
+
+/* NPE control register bit definitions */
+#define IX_NPEMH_NPE_CTL_OFE (1 << 16) /**< OutFifoEnable */
+#define IX_NPEMH_NPE_CTL_IFE (1 << 17) /**< InFifoEnable */
+#define IX_NPEMH_NPE_CTL_OFEWE (1 << 24) /**< OutFifoEnableWriteEnable */
+#define IX_NPEMH_NPE_CTL_IFEWE (1 << 25) /**< InFifoEnableWriteEnable */
+
+/* NPE status register bit definitions */
+#define IX_NPEMH_NPE_STAT_OFNE (1 << 16) /**< OutFifoNotEmpty */
+#define IX_NPEMH_NPE_STAT_IFNF (1 << 17) /**< InFifoNotFull */
+#define IX_NPEMH_NPE_STAT_OFNF (1 << 18) /**< OutFifoNotFull */
+#define IX_NPEMH_NPE_STAT_IFNE (1 << 19) /**< InFifoNotEmpty */
+#define IX_NPEMH_NPE_STAT_MBINT (1 << 20) /**< Mailbox interrupt */
+#define IX_NPEMH_NPE_STAT_IFINT (1 << 21) /**< InFifo interrupt */
+#define IX_NPEMH_NPE_STAT_OFINT (1 << 22) /**< OutFifo interrupt */
+#define IX_NPEMH_NPE_STAT_WFINT (1 << 23) /**< WatchFifo interrupt */
+
+
+/**
+ * Variable declarations. Externs are followed by static variables.
+ */
+extern IxNpeMhConfigNpeInfo ixNpeMhConfigNpeInfo[IX_NPEMH_NUM_NPES];
+
+
+/*
+ * Prototypes for interface functions.
+ */
+
+/**
+ * @fn void ixNpeMhConfigInitialize (
+ IxNpeMhNpeInterrupts npeInterrupts)
+ *
+ * @brief This function initialises the Configuration module.
+ *
+ * @param IxNpeMhNpeInterrupts npeInterrupts (in) - whether or not to
+ * service the NPE "outFIFO not empty" interrupts.
+ *
+ * @return No return value.
+ */
+
+void ixNpeMhConfigInitialize (
+ IxNpeMhNpeInterrupts npeInterrupts);
+
+/**
+ * @fn void ixNpeMhConfigUninit (void)
+ *
+ * @brief This function uninitialises the Configuration module.
+ *
+ * @return No return value.
+ */
+
+void ixNpeMhConfigUninit (void);
+
+/**
+ * @fn void ixNpeMhConfigIsrRegister (
+ IxNpeMhNpeId npeId,
+ IxNpeMhConfigIsr isr)
+ *
+ * @brief This function registers an ISR to handle NPE "outFIFO not
+ * empty" interrupts.
+ *
+ * @param IxNpeMhNpeId npeId (in) - the ID of the NPE whose interrupt will
+ * be handled.
+ * @param IxNpeMhConfigIsr isr (in) - the ISR function pointer that the
+ * interrupt will trigger.
+ *
+ * @return No return value.
+ */
+
+void ixNpeMhConfigIsrRegister (
+ IxNpeMhNpeId npeId,
+ IxNpeMhConfigIsr isr);
+
+/**
+ * @fn BOOL ixNpeMhConfigNpeInterruptEnable (
+ IxNpeMhNpeId npeId)
+ *
+ * @brief This function enables a NPE's "outFIFO not empty" interrupt.
+ *
+ * @param IxNpeMhNpeId npeId (in) - the ID of the NPE whose interrupt will
+ * be enabled.
+ *
+ * @return Returns the previous state of the interrupt (TRUE => enabled).
+ */
+
+BOOL ixNpeMhConfigNpeInterruptEnable (
+ IxNpeMhNpeId npeId);
+
+/**
+ * @fn BOOL ixNpeMhConfigNpeInterruptDisable (
+ IxNpeMhNpeId npeId)
+ *
+ * @brief This function disables a NPE's "outFIFO not empty" interrupt
+ *
+ * @param IxNpeMhNpeId npeId (in) - the ID of the NPE whose interrupt will
+ * be disabled.
+ *
+ * @return Returns the previous state of the interrupt (TRUE => enabled).
+ */
+
+BOOL ixNpeMhConfigNpeInterruptDisable (
+ IxNpeMhNpeId npeId);
+
+/**
+ * @fn IxNpeMhMessageId ixNpeMhConfigMessageIdGet (
+ IxNpeMhMessage message)
+ *
+ * @brief This function gets the ID of a message.
+ *
+ * @param IxNpeMhMessage message (in) - the message to get the ID of.
+ *
+ * @return the ID of the message
+ */
+
+IxNpeMhMessageId ixNpeMhConfigMessageIdGet (
+ IxNpeMhMessage message);
+
+/**
+ * @fn BOOL ixNpeMhConfigNpeIdIsValid (
+ IxNpeMhNpeId npeId)
+ *
+ * @brief This function checks to see if a NPE ID is valid.
+ *
+ * @param IxNpeMhNpeId npeId (in) - the NPE ID to validate.
+ *
+ * @return True if the NPE ID is valid, otherwise False.
+ */
+
+BOOL ixNpeMhConfigNpeIdIsValid (
+ IxNpeMhNpeId npeId);
+
+/**
+ * @fn void ixNpeMhConfigLockGet (
+ IxNpeMhNpeId npeId)
+ *
+ * @brief This function gets a lock for exclusive NPE interaction, and
+ * disables the NPE's "outFIFO not empty" interrupt.
+ *
+ * @param IxNpeMhNpeId npeId (in) - The ID of the NPE for which to get the
+ * lock and disable its interrupt.
+ *
+ * @return No return value.
+ */
+
+void ixNpeMhConfigLockGet (
+ IxNpeMhNpeId npeId);
+
+/**
+ * @fn void ixNpeMhConfigLockRelease (
+ IxNpeMhNpeId npeId)
+ *
+ * @brief This function releases a lock for exclusive NPE interaction, and
+ * enables the NPE's "outFIFO not empty" interrupt.
+ *
+ * @param IxNpeMhNpeId npeId (in) - The ID of the NPE for which to release
+ * the lock and enable its interrupt.
+ *
+ * @return No return value.
+ */
+
+void ixNpeMhConfigLockRelease (
+ IxNpeMhNpeId npeId);
+
+/**
+ * @fn BOOL ixNpeMhConfigInFifoIsEmpty (
+ IxNpeMhNpeId npeId)
+ *
+ * @brief This inline function checks if a NPE's inFIFO is empty.
+ *
+ * @param IxNpeMhNpeId npeId (in) - The ID of the NPE for which the inFIFO
+ * will be checked.
+ *
+ * @return True if the inFIFO is empty, otherwise False.
+ */
+
+IXNPEMHCONFIG_INLINE BOOL ixNpeMhConfigInFifoIsEmpty (
+ IxNpeMhNpeId npeId);
+
+/**
+ * @fn BOOL ixNpeMhConfigInFifoIsFull (
+ IxNpeMhNpeId npeId)
+ *
+ * @brief This inline function checks if a NPE's inFIFO is full.
+ *
+ * @param IxNpeMhNpeId npeId (in) - The ID of the NPE for which the inFIFO
+ * will be checked.
+ *
+ * @return True if the inFIFO is full, otherwise False.
+ */
+
+IXNPEMHCONFIG_INLINE BOOL ixNpeMhConfigInFifoIsFull (
+ IxNpeMhNpeId npeId);
+
+/**
+ * @fn BOOL ixNpeMhConfigOutFifoIsEmpty (
+ IxNpeMhNpeId npeId)
+ *
+ * @brief This inline function checks if a NPE's outFIFO is empty.
+ *
+ * @param IxNpeMhNpeId npeId (in) - The ID of the NPE for which the outFIFO
+ * will be checked.
+ *
+ * @return True if the outFIFO is empty, otherwise False.
+ */
+
+IXNPEMHCONFIG_INLINE BOOL ixNpeMhConfigOutFifoIsEmpty (
+ IxNpeMhNpeId npeId);
+
+/**
+ * @fn BOOL ixNpeMhConfigOutFifoIsFull (
+ IxNpeMhNpeId npeId)
+ *
+ * @brief This inline function checks if a NPE's outFIFO is full.
+ *
+ * @param IxNpeMhNpeId npeId (in) - The ID of the NPE for which the outFIFO
+ * will be checked.
+ *
+ * @return True if the outFIFO is full, otherwise False.
+ */
+
+IXNPEMHCONFIG_INLINE BOOL ixNpeMhConfigOutFifoIsFull (
+ IxNpeMhNpeId npeId);
+
+/**
+ * @fn IX_STATUS ixNpeMhConfigInFifoWrite (
+ IxNpeMhNpeId npeId,
+ IxNpeMhMessage message)
+ *
+ * @brief This function writes a message to a NPE's inFIFO. The caller
+ * must first check that the NPE's inFifo is not full. After writing the first
+ * word of the message, this function will keep polling NPE's inFIFO is not
+ * full to write the second word. If inFIFO is not available after maximum
+ * retries (IX_NPE_MH_MAX_NUM_OF_RETRIES), this function will return TIMEOUT
+ * status to indicate NPE hang / halt.
+ *
+ * @param IxNpeMhNpeId npeId (in) - The ID of the NPE for which the inFIFO
+ * will be written to.
+ * @param IxNpeMhMessage message (in) - The message to write.
+ *
+ * @return The function returns a status indicating success, failure or timeout.
+ */
+
+IX_STATUS ixNpeMhConfigInFifoWrite (
+ IxNpeMhNpeId npeId,
+ IxNpeMhMessage message);
+
+/**
+ * @fn IX_STATUS ixNpeMhConfigOutFifoRead (
+ IxNpeMhNpeId npeId,
+ IxNpeMhMessage *message)
+ *
+ * @brief This function reads a message from a NPE's outFIFO. The caller
+ * must first check that the NPE's outFifo is not empty. After reading the first
+ * word of the message, this function will keep polling NPE's outFIFO is not
+ * empty to read the second word. If outFIFO is empty after maximum
+ * retries (IX_NPE_MH_MAX_NUM_OF_RETRIES), this function will return TIMEOUT
+ * status to indicate NPE hang / halt.
+ *
+ * @param IxNpeMhNpeId npeId (in) - The ID of the NPE for which the outFIFO
+ * will be read from.
+ * @param IxNpeMhMessage message (out) - The message read.
+ *
+ * @return The function returns a status indicating success, failure or timeout.
+ */
+
+IX_STATUS ixNpeMhConfigOutFifoRead (
+ IxNpeMhNpeId npeId,
+ IxNpeMhMessage *message);
+
+/**
+ * @fn void ixNpeMhConfigShow (
+ IxNpeMhNpeId npeId)
+ *
+ * @brief This function will display the current state of the Configuration
+ * module.
+ *
+ * @param IxNpeMhNpeId npeId (in) - The ID of the NPE to display state
+ * information for.
+ *
+ * @return No return value.
+ */
+
+void ixNpeMhConfigShow (
+ IxNpeMhNpeId npeId);
+
+/**
+ * @fn void ixNpeMhConfigShowReset (
+ IxNpeMhNpeId npeId)
+ *
+ * @brief This function will reset the current state of the Configuration
+ * module.
+ *
+ * @param IxNpeMhNpeId npeId (in) - The ID of the NPE to reset state
+ * information for.
+ *
+ * @return No return value.
+ */
+
+void ixNpeMhConfigShowReset (
+ IxNpeMhNpeId npeId);
+
+/*
+ * Inline functions
+ */
+
+/*
+ * This inline function checks if a NPE's inFIFO is empty.
+ */
+
+IXNPEMHCONFIG_INLINE
+BOOL ixNpeMhConfigInFifoIsEmpty (
+ IxNpeMhNpeId npeId)
+{
+ UINT32 ifne;
+ volatile UINT32 *statusReg =
+ (UINT32 *)ixNpeMhConfigNpeInfo[npeId].statusRegister;
+
+ /* get the IFNE (InFifoNotEmpty) bit of the status register */
+ IX_NPEMH_REGISTER_READ_BITS (statusReg, &ifne, IX_NPEMH_NPE_STAT_IFNE);
+
+ /* if the IFNE status bit is unset then the inFIFO is empty */
+ return (ifne == 0);
+}
+
+
+/*
+ * This inline function checks if a NPE's inFIFO is full.
+ */
+IXNPEMHCONFIG_INLINE
+BOOL ixNpeMhConfigInFifoIsFull (
+ IxNpeMhNpeId npeId)
+{
+ UINT32 ifnf;
+ volatile UINT32 *statusReg =
+ (UINT32 *)ixNpeMhConfigNpeInfo[npeId].statusRegister;
+
+ /* get the IFNF (InFifoNotFull) bit of the status register */
+ IX_NPEMH_REGISTER_READ_BITS (statusReg, &ifnf, IX_NPEMH_NPE_STAT_IFNF);
+
+ /* if the IFNF status bit is unset then the inFIFO is full */
+ return (ifnf == 0);
+}
+
+
+/*
+ * This inline function checks if a NPE's outFIFO is empty.
+ */
+IXNPEMHCONFIG_INLINE
+BOOL ixNpeMhConfigOutFifoIsEmpty (
+ IxNpeMhNpeId npeId)
+{
+ UINT32 ofne;
+ volatile UINT32 *statusReg =
+ (UINT32 *)ixNpeMhConfigNpeInfo[npeId].statusRegister;
+
+ /* get the OFNE (OutFifoNotEmpty) bit of the status register */
+ IX_NPEMH_REGISTER_READ_BITS (statusReg, &ofne, IX_NPEMH_NPE_STAT_OFNE);
+
+ /* if the OFNE status bit is unset then the outFIFO is empty */
+ return (ofne == 0);
+}
+
+/*
+ * This inline function checks if a NPE's outFIFO is full.
+ */
+IXNPEMHCONFIG_INLINE
+BOOL ixNpeMhConfigOutFifoIsFull (
+ IxNpeMhNpeId npeId)
+{
+ UINT32 ofnf;
+ volatile UINT32 *statusReg =
+ (UINT32 *)ixNpeMhConfigNpeInfo[npeId].statusRegister;
+
+ /* get the OFNF (OutFifoNotFull) bit of the status register */
+ IX_NPEMH_REGISTER_READ_BITS (statusReg, &ofnf, IX_NPEMH_NPE_STAT_OFNF);
+
+ /* if the OFNF status bit is unset then the outFIFO is full */
+ return (ofnf == 0);
+}
+
+#endif /* IXNPEMHCONFIG_P_H */
+
+/**
+ * @} defgroup IxNpeMhConfig_p
+ */
diff --git a/cpu/ixp/npe/include/IxNpeMhMacros_p.h b/cpu/ixp/npe/include/IxNpeMhMacros_p.h
new file mode 100644
index 0000000000..68f34ef357
--- /dev/null
+++ b/cpu/ixp/npe/include/IxNpeMhMacros_p.h
@@ -0,0 +1,296 @@
+/**
+ * @file IxNpeMhMacros_p.h
+ *
+ * @author Intel Corporation
+ * @date 21 Jan 2002
+ *
+ * @brief This file contains the macros for the IxNpeMh component.
+ *
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+*/
+
+/**
+ * @defgroup IxNpeMhMacros_p IxNpeMhMacros_p
+ *
+ * @brief Macros for the IxNpeMh component.
+ *
+ * @{
+ */
+
+#ifndef IXNPEMHMACROS_P_H
+#define IXNPEMHMACROS_P_H
+
+/* if we are running as a unit test */
+#ifdef IX_UNIT_TEST
+#undef NDEBUG
+#endif /* #ifdef IX_UNIT_TEST */
+
+#include "IxOsal.h"
+
+/*
+ * #defines for function return types, etc.
+ */
+
+#define IX_NPEMH_SHOW_TEXT_WIDTH (40) /**< text width for stats display */
+#define IX_NPEMH_SHOW_STAT_WIDTH (10) /**< stat width for stats display */
+
+/**
+ * @def IX_NPEMH_SHOW
+ *
+ * @brief Macro for displaying a stat preceded by a textual description.
+ */
+
+#define IX_NPEMH_SHOW(TEXT, STAT) \
+ ixOsalLog (IX_OSAL_LOG_LVL_USER, IX_OSAL_LOG_DEV_STDOUT, \
+ "%-40s: %10d\n", (int) TEXT, (int) STAT, 0, 0, 0, 0)
+
+/*
+ * Prototypes for interface functions.
+ */
+
+/**
+ * @typedef IxNpeMhTraceTypes
+ *
+ * @brief Enumeration defining IxNpeMh trace levels
+ */
+
+typedef enum
+{
+ IX_NPEMH_TRACE_OFF = IX_OSAL_LOG_LVL_NONE, /**< no trace */
+ IX_NPEMH_WARNING = IX_OSAL_LOG_LVL_WARNING, /**< warning */
+ IX_NPEMH_DEBUG = IX_OSAL_LOG_LVL_MESSAGE, /**< debug */
+ IX_NPEMH_FN_ENTRY_EXIT = IX_OSAL_LOG_LVL_DEBUG3 /**< function entry/exit */
+} IxNpeMhTraceTypes;
+
+#ifdef IX_UNIT_TEST
+#define IX_NPEMH_TRACE_LEVEL (IX_NPEMH_FN_ENTRY_EXIT) /**< trace level */
+#else
+#define IX_NPEMH_TRACE_LEVEL (IX_NPEMH_TRACE_OFF) /**< trace level */
+#endif
+
+/**
+ * @def IX_NPEMH_TRACE0
+ *
+ * @brief Trace macro taking 0 arguments.
+ */
+
+#define IX_NPEMH_TRACE0(LEVEL, STR) \
+ IX_NPEMH_TRACE6(LEVEL, STR, 0, 0, 0, 0, 0, 0)
+
+/**
+ * @def IX_NPEMH_TRACE1
+ *
+ * @brief Trace macro taking 1 argument.
+ */
+
+#define IX_NPEMH_TRACE1(LEVEL, STR, ARG1) \
+ IX_NPEMH_TRACE6(LEVEL, STR, ARG1, 0, 0, 0, 0, 0)
+
+/**
+ * @def IX_NPEMH_TRACE2
+ *
+ * @brief Trace macro taking 2 arguments.
+ */
+
+#define IX_NPEMH_TRACE2(LEVEL, STR, ARG1, ARG2) \
+ IX_NPEMH_TRACE6(LEVEL, STR, ARG1, ARG2, 0, 0, 0, 0)
+
+/**
+ * @def IX_NPEMH_TRACE3
+ *
+ * @brief Trace macro taking 3 arguments.
+ */
+
+#define IX_NPEMH_TRACE3(LEVEL, STR, ARG1, ARG2, ARG3) \
+ IX_NPEMH_TRACE6(LEVEL, STR, ARG1, ARG2, ARG3, 0, 0, 0)
+
+/**
+ * @def IX_NPEMH_TRACE4
+ *
+ * @brief Trace macro taking 4 arguments.
+ */
+
+#define IX_NPEMH_TRACE4(LEVEL, STR, ARG1, ARG2, ARG3, ARG4) \
+ IX_NPEMH_TRACE6(LEVEL, STR, ARG1, ARG2, ARG3, ARG4, 0, 0)
+
+/**
+ * @def IX_NPEMH_TRACE5
+ *
+ * @brief Trace macro taking 5 arguments.
+ */
+
+#define IX_NPEMH_TRACE5(LEVEL, STR, ARG1, ARG2, ARG3, ARG4, ARG5) \
+ IX_NPEMH_TRACE6(LEVEL, STR, ARG1, ARG2, ARG3, ARG4, ARG5, 0)
+
+/**
+ * @def IX_NPEMH_TRACE6
+ *
+ * @brief Trace macro taking 6 arguments.
+ */
+
+#define IX_NPEMH_TRACE6(LEVEL, STR, ARG1, ARG2, ARG3, ARG4, ARG5, ARG6) \
+{ \
+ if (LEVEL <= IX_NPEMH_TRACE_LEVEL) \
+ { \
+ (void) ixOsalLog (LEVEL, IX_OSAL_LOG_DEV_STDOUT, (STR), \
+ (int)(ARG1), (int)(ARG2), (int)(ARG3), \
+ (int)(ARG4), (int)(ARG5), (int)(ARG6)); \
+ } \
+}
+
+/**
+ * @def IX_NPEMH_ERROR_REPORT
+ *
+ * @brief Error reporting facility.
+ */
+
+#define IX_NPEMH_ERROR_REPORT(STR) \
+{ \
+ (void) ixOsalLog (IX_OSAL_LOG_LVL_ERROR, IX_OSAL_LOG_DEV_STDERR, \
+ (STR), 0, 0, 0, 0, 0, 0); \
+}
+
+/* if we are running on XScale, i.e. real environment */
+#if CPU==XSCALE
+
+/**
+ * @def IX_NPEMH_REGISTER_READ
+ *
+ * @brief This macro reads a memory-mapped register.
+ */
+
+#define IX_NPEMH_REGISTER_READ(registerAddress, value) \
+{ \
+ *value = IX_OSAL_READ_LONG(registerAddress); \
+}
+
+/**
+ * @def IX_NPEMH_REGISTER_READ_BITS
+ *
+ * @brief This macro partially reads a memory-mapped register.
+ */
+
+#define IX_NPEMH_REGISTER_READ_BITS(registerAddress, value, mask) \
+{ \
+ *value = (IX_OSAL_READ_LONG(registerAddress) & mask); \
+}
+
+/**
+ * @def IX_NPEMH_REGISTER_WRITE
+ *
+ * @brief This macro writes a memory-mapped register.
+ */
+
+#define IX_NPEMH_REGISTER_WRITE(registerAddress, value) \
+{ \
+ IX_OSAL_WRITE_LONG(registerAddress, value); \
+}
+
+/**
+ * @def IX_NPEMH_REGISTER_WRITE_BITS
+ *
+ * @brief This macro partially writes a memory-mapped register.
+ */
+
+#define IX_NPEMH_REGISTER_WRITE_BITS(registerAddress, value, mask) \
+{ \
+ UINT32 orig = IX_OSAL_READ_LONG(registerAddress); \
+ orig &= (~mask); \
+ orig |= (value & mask); \
+ IX_OSAL_WRITE_LONG(registerAddress, orig); \
+}
+
+
+/* if we are running as a unit test */
+#else /* #if CPU==XSCALE */
+
+#include "IxNpeMhTestRegister.h"
+
+/**
+ * @def IX_NPEMH_REGISTER_READ
+ *
+ * @brief This macro reads a memory-mapped register.
+ */
+
+#define IX_NPEMH_REGISTER_READ(registerAddress, value) \
+{ \
+ ixNpeMhTestRegisterRead (registerAddress, value); \
+}
+
+/**
+ * @def IX_NPEMH_REGISTER_READ_BITS
+ *
+ * @brief This macro partially reads a memory-mapped register.
+ */
+
+#define IX_NPEMH_REGISTER_READ_BITS(registerAddress, value, mask) \
+{ \
+ ixNpeMhTestRegisterReadBits (registerAddress, value, mask); \
+}
+
+/**
+ * @def IX_NPEMH_REGISTER_WRITE
+ *
+ * @brief This macro writes a memory-mapped register.
+ */
+
+#define IX_NPEMH_REGISTER_WRITE(registerAddress, value) \
+{ \
+ ixNpeMhTestRegisterWrite (registerAddress, value); \
+}
+
+/**
+ * @def IX_NPEMH_REGISTER_WRITE_BITS
+ *
+ * @brief This macro partially writes a memory-mapped register.
+ */
+
+#define IX_NPEMH_REGISTER_WRITE_BITS(registerAddress, value, mask) \
+{ \
+ ixNpeMhTestRegisterWriteBits (registerAddress, value, mask); \
+}
+
+#endif /* #if CPU==XSCALE */
+
+#endif /* IXNPEMHMACROS_P_H */
+
+/**
+ * @} defgroup IxNpeMhMacros_p
+ */
diff --git a/cpu/ixp/npe/include/IxNpeMhReceive_p.h b/cpu/ixp/npe/include/IxNpeMhReceive_p.h
new file mode 100644
index 0000000000..6416bedcbc
--- /dev/null
+++ b/cpu/ixp/npe/include/IxNpeMhReceive_p.h
@@ -0,0 +1,139 @@
+/**
+ * @file IxNpeMhReceive_p.h
+ *
+ * @author Intel Corporation
+ * @date 18 Jan 2002
+ *
+ * @brief This file contains the private API for the Receive module.
+ *
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+*/
+
+/**
+ * @defgroup IxNpeMhReceive_p IxNpeMhReceive_p
+ *
+ * @brief The private API for the Receive module.
+ *
+ * @{
+ */
+
+#ifndef IXNPEMHRECEIVE_P_H
+#define IXNPEMHRECEIVE_P_H
+
+#include "IxNpeMh.h"
+#include "IxOsalTypes.h"
+
+/*
+ * #defines for function return types, etc.
+ */
+
+/*
+ * Prototypes for interface functions.
+ */
+
+/**
+ * @fn void ixNpeMhReceiveInitialize (void)
+ *
+ * @brief This function registers an internal ISR to handle the NPEs'
+ * "outFIFO not empty" interrupts and receive messages from the NPEs when
+ * they become available.
+ *
+ * @return No return value.
+ */
+
+void ixNpeMhReceiveInitialize (void);
+
+/**
+ * @fn IX_STATUS ixNpeMhReceiveMessagesReceive (
+ IxNpeMhNpeId npeId)
+ *
+ * @brief This function reads messages from a particular NPE's outFIFO
+ * until the outFIFO is empty, and for each message looks first for an
+ * unsolicited callback, then a solicited callback, to pass the message
+ * back to the client. If no callback can be found the message is
+ * discarded and an error reported. This function will return TIMEOUT
+ * status if NPE hang / halt.
+ *
+ * @param IxNpeMhNpeId npeId (in) - The ID of the NPE to receive
+ * messages from.
+ *
+ * @return The function returns a status indicating success, failure or timeout.
+ */
+
+IX_STATUS ixNpeMhReceiveMessagesReceive (
+ IxNpeMhNpeId npeId);
+
+/**
+ * @fn void ixNpeMhReceiveShow (
+ IxNpeMhNpeId npeId)
+ *
+ * @brief This function will display the current state of the Receive
+ * module.
+ *
+ * @param IxNpeMhNpeId npeId (in) - The ID of the NPE to display state
+ * information for.
+ *
+ * @return No return status.
+ */
+
+void ixNpeMhReceiveShow (
+ IxNpeMhNpeId npeId);
+
+/**
+ * @fn void ixNpeMhReceiveShowReset (
+ IxNpeMhNpeId npeId)
+ *
+ * @brief This function will reset the current state of the Receive
+ * module.
+ *
+ * @param IxNpeMhNpeId npeId (in) - The ID of the NPE to reset state
+ * information for.
+ *
+ * @return No return status.
+ */
+
+void ixNpeMhReceiveShowReset (
+ IxNpeMhNpeId npeId);
+
+#endif /* IXNPEMHRECEIVE_P_H */
+
+/**
+ * @} defgroup IxNpeMhReceive_p
+ */
diff --git a/cpu/ixp/npe/include/IxNpeMhSend_p.h b/cpu/ixp/npe/include/IxNpeMhSend_p.h
new file mode 100644
index 0000000000..977cc94a7f
--- /dev/null
+++ b/cpu/ixp/npe/include/IxNpeMhSend_p.h
@@ -0,0 +1,163 @@
+/**
+ * @file IxNpeMhSend_p.h
+ *
+ * @author Intel Corporation
+ * @date 18 Jan 2002
+ *
+ * @brief This file contains the private API for the Send module.
+ *
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+*/
+
+/**
+ * @defgroup IxNpeMhSend_p IxNpeMhSend_p
+ *
+ * @brief The private API for the Send module.
+ *
+ * @{
+ */
+
+#ifndef IXNPEMHSEND_P_H
+#define IXNPEMHSEND_P_H
+
+#include "IxNpeMh.h"
+#include "IxOsalTypes.h"
+
+/*
+ * #defines for function return types, etc.
+ */
+
+/*
+ * Prototypes for interface functions.
+ */
+
+/**
+ * @fn IX_STATUS ixNpeMhSendMessageSend (
+ IxNpeMhNpeId npeId,
+ IxNpeMhMessage message,
+ UINT32 maxSendRetries)
+ *
+ * @brief This function writes a message to the specified NPE's inFIFO,
+ * and must be used when the message being sent does not solicit a response
+ * from the NPE. This function will return TIMEOUT status if NPE hang / halt.
+ *
+ * @param IxNpeMhNpeId npeId (in) - The ID of the NPE to send the message
+ * to.
+ * @param IxNpeMhMessage message (in) - The message to send.
+ * @param UINT32 maxSendRetries (in) - Max num. of retries to perform
+ * if the NPE's inFIFO is full.
+ *
+ * @return The function returns a status indicating success, failure or timeout.
+ */
+
+IX_STATUS ixNpeMhSendMessageSend (
+ IxNpeMhNpeId npeId,
+ IxNpeMhMessage message,
+ UINT32 maxSendRetries);
+
+/**
+ * @fn IX_STATUS ixNpeMhSendMessageWithResponseSend (
+ IxNpeMhNpeId npeId,
+ IxNpeMhMessage message,
+ IxNpeMhMessageId solicitedMessageId,
+ IxNpeMhCallback solicitedCallback,
+ UINT32 maxSendRetries)
+ *
+ * @brief This function writes a message to the specified NPE's inFIFO,
+ * and must be used when the message being sent solicits a response from
+ * the NPE. The ID of the solicited response must be specified so that it
+ * can be recognised, and a callback provided to pass the response back to
+ * the client. This function will return TIMEOUT status if NPE hang / halt.
+ *
+ * @param IxNpeMhNpeId npeId (in) - The ID of the NPE to send the message
+ * to.
+ * @param IxNpeMhMessage message (in) - The message to send.
+ * @param IxNpeMhMessageId solicitedMessageId (in) - The ID of the
+ * solicited response.
+ * @param IxNpeMhCallback solicitedCallback (in) - The callback to pass the
+ * solicited response back to the client.
+ * @param UINT32 maxSendRetries (in) - Max num. of retries to perform
+ * if the NPE's inFIFO is full.
+ *
+ * @return The function returns a status indicating success, failure or timeout.
+ */
+
+IX_STATUS ixNpeMhSendMessageWithResponseSend (
+ IxNpeMhNpeId npeId,
+ IxNpeMhMessage message,
+ IxNpeMhMessageId solicitedMessageId,
+ IxNpeMhCallback solicitedCallback,
+ UINT32 maxSendRetries);
+
+/**
+ * @fn void ixNpeMhSendShow (
+ IxNpeMhNpeId npeId)
+ *
+ * @brief This function will display the current state of the Send module.
+ *
+ * @param IxNpeMhNpeId npeId (in) - The ID of the NPE to display state
+ * information for.
+ *
+ * @return No return value.
+ */
+
+void ixNpeMhSendShow (
+ IxNpeMhNpeId npeId);
+
+/**
+ * @fn void ixNpeMhSendShowReset (
+ IxNpeMhNpeId npeId)
+ *
+ * @brief This function will reset the current state of the Send module.
+ *
+ * @param IxNpeMhNpeId npeId (in) - The ID of the NPE to reset state
+ * information for.
+ *
+ * @return No return value.
+ */
+
+void ixNpeMhSendShowReset (
+ IxNpeMhNpeId npeId);
+
+#endif /* IXNPEMHSEND_P_H */
+
+/**
+ * @} defgroup IxNpeMhSend_p
+ */
diff --git a/cpu/ixp/npe/include/IxNpeMhSolicitedCbMgr_p.h b/cpu/ixp/npe/include/IxNpeMhSolicitedCbMgr_p.h
new file mode 100644
index 0000000000..40cd496c94
--- /dev/null
+++ b/cpu/ixp/npe/include/IxNpeMhSolicitedCbMgr_p.h
@@ -0,0 +1,171 @@
+/**
+ * @file IxNpeMhSolicitedCbMgr_p.h
+ *
+ * @author Intel Corporation
+ * @date 18 Jan 2002
+ *
+ * @brief This file contains the private API for the Solicited Callback
+ * Manager module.
+ *
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+*/
+
+/**
+ * @defgroup IxNpeMhSolicitedCbMgr_p IxNpeMhSolicitedCbMgr_p
+ *
+ * @brief The private API for the Solicited Callback Manager module.
+ *
+ * @{
+ */
+
+#ifndef IXNPEMHSOLICITEDCBMGR_P_H
+#define IXNPEMHSOLICITEDCBMGR_P_H
+
+#include "IxNpeMh.h"
+#include "IxOsalTypes.h"
+
+/*
+ * #defines for function return types, etc.
+ */
+
+/** Maximum number of solicited callbacks that can be stored in the list */
+#define IX_NPEMH_MAX_CALLBACKS (16)
+
+/*
+ * Prototypes for interface functions.
+ */
+
+/**
+ * @fn void ixNpeMhSolicitedCbMgrInitialize (void)
+ *
+ * @brief This function initializes the Solicited Callback Manager module,
+ * setting up a callback data structure for each NPE.
+ *
+ * @return No return value.
+ */
+
+void ixNpeMhSolicitedCbMgrInitialize (void);
+
+/**
+ * @fn IX_STATUS ixNpeMhSolicitedCbMgrCallbackSave (
+ IxNpeMhNpeId npeId,
+ IxNpeMhMessageId solicitedMessageId,
+ IxNpeMhCallback solicitedCallback)
+ *
+ * @brief This function saves a callback in the specified NPE's callback
+ * list. If the callback list is full the function will fail.
+ *
+ * @param IxNpeMhNpeId npeId (in) - The ID of the NPE in whose callback
+ * list the callback will be saved.
+ * @param IxNpeMhMessageId solicitedMessageId (in) - The ID of the message
+ * that this callback is for.
+ * @param IxNpeMhCallback solicitedCallback (in) - The callback function
+ * pointer to save.
+ *
+ * @return The function returns a status indicating success or failure.
+ */
+
+IX_STATUS ixNpeMhSolicitedCbMgrCallbackSave (
+ IxNpeMhNpeId npeId,
+ IxNpeMhMessageId solicitedMessageId,
+ IxNpeMhCallback solicitedCallback);
+
+/**
+ * @fn void ixNpeMhSolicitedCbMgrCallbackRetrieve (
+ IxNpeMhNpeId npeId,
+ IxNpeMhMessageId solicitedMessageId,
+ IxNpeMhCallback *solicitedCallback)
+ *
+ * @brief This function retrieves the first ID-matching callback from the
+ * specified NPE's callback list. If no matching callback can be found the
+ * function will fail.
+ *
+ * @param IxNpeMhNpeId npeId (in) - The ID of the NPE from whose callback
+ * list the callback will be retrieved.
+ * @param IxNpeMhMessageId solicitedMessageId (in) - The ID of the message
+ * that the callback is for.
+ * @param IxNpeMhCallback solicitedCallback (out) - The callback function
+ * pointer retrieved.
+ *
+ * @return No return value.
+ */
+
+void ixNpeMhSolicitedCbMgrCallbackRetrieve (
+ IxNpeMhNpeId npeId,
+ IxNpeMhMessageId solicitedMessageId,
+ IxNpeMhCallback *solicitedCallback);
+
+/**
+ * @fn void ixNpeMhSolicitedCbMgrShow (
+ IxNpeMhNpeId npeId)
+ *
+ * @brief This function will display the current state of the Solicited
+ * Callback Manager module.
+ *
+ * @param IxNpeMhNpeId npeId (in) - The ID of the NPE to display state
+ * information for.
+ *
+ * @return No return value.
+ */
+
+void ixNpeMhSolicitedCbMgrShow (
+ IxNpeMhNpeId npeId);
+
+/**
+ * @fn void ixNpeMhSolicitedCbMgrShowReset (
+ IxNpeMhNpeId npeId)
+ *
+ * @brief This function will reset the current state of the Solicited
+ * Callback Manager module.
+ *
+ * @param IxNpeMhNpeId npeId (in) - The ID of the NPE to reset state
+ * information for.
+ *
+ * @return No return value.
+ */
+
+void ixNpeMhSolicitedCbMgrShowReset (
+ IxNpeMhNpeId npeId);
+
+#endif /* IXNPEMHSOLICITEDCBMGR_P_H */
+
+/**
+ * @} defgroup IxNpeMhSolicitedCbMgr_p
+ */
diff --git a/cpu/ixp/npe/include/IxNpeMhUnsolicitedCbMgr_p.h b/cpu/ixp/npe/include/IxNpeMhUnsolicitedCbMgr_p.h
new file mode 100644
index 0000000000..dea8cafa25
--- /dev/null
+++ b/cpu/ixp/npe/include/IxNpeMhUnsolicitedCbMgr_p.h
@@ -0,0 +1,169 @@
+/**
+ * @file IxNpeMhUnsolicitedCbMgr_p.h
+ *
+ * @author Intel Corporation
+ * @date 18 Jan 2002
+ *
+ * @brief This file contains the private API for the Unsolicited Callback
+ * Manager module.
+ *
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+/**
+ * @defgroup IxNpeMhUnsolicitedCbMgr_p IxNpeMhUnsolicitedCbMgr_p
+ *
+ * @brief The private API for the Unsolicited Callback Manager module.
+ *
+ * @{
+ */
+
+#ifndef IXNPEMHUNSOLICITEDCBMGR_P_H
+#define IXNPEMHUNSOLICITEDCBMGR_P_H
+
+#include "IxNpeMh.h"
+#include "IxOsalTypes.h"
+
+/*
+ * #defines for function return types, etc.
+ */
+
+/*
+ * Prototypes for interface functions.
+ */
+
+/**
+ * @fn void ixNpeMhUnsolicitedCbMgrInitialize (void)
+ *
+ * @brief This function initializes the Unsolicited Callback Manager
+ * module, setting up a callback data structure for each NPE.
+ *
+ * @return No return value.
+ */
+
+void ixNpeMhUnsolicitedCbMgrInitialize (void);
+
+/**
+ * @fn void ixNpeMhUnsolicitedCbMgrCallbackSave (
+ IxNpeMhNpeId npeId,
+ IxNpeMhMessageId unsolicitedMessageId,
+ IxNpeMhCallback unsolicitedCallback)
+ *
+ * @brief This function saves a callback in the specified NPE's callback
+ * table. If a callback already exists for the specified ID then it will
+ * be overwritten.
+ *
+ * @param IxNpeMhNpeId npeId (in) - The ID of the NPE in whose callback
+ * table the callback will be saved.
+ * @param IxNpeMhMessageId unsolicitedMessageId (in) - The ID of the
+ * messages that this callback is for.
+ * @param IxNpeMhCallback unsolicitedCallback (in) - The callback function
+ * pointer to save.
+ *
+ * @return No return value.
+ */
+
+void ixNpeMhUnsolicitedCbMgrCallbackSave (
+ IxNpeMhNpeId npeId,
+ IxNpeMhMessageId unsolicitedMessageId,
+ IxNpeMhCallback unsolicitedCallback);
+
+/**
+ * @fn void ixNpeMhUnsolicitedCbMgrCallbackRetrieve (
+ IxNpeMhNpeId npeId,
+ IxNpeMhMessageId unsolicitedMessageId,
+ IxNpeMhCallback *unsolicitedCallback)
+ *
+ * @brief This function retrieves the callback for the specified ID from
+ * the specified NPE's callback table. If no callback is registered for
+ * the specified ID and NPE then a callback value of NULL will be returned.
+ *
+ * @param IxNpeMhNpeId npeId (in) - The ID of the NPE from whose callback
+ * table the callback will be retrieved.
+ * @param IxNpeMhMessageId unsolicitedMessageId (in) - The ID of the
+ * messages that the callback is for.
+ * @param IxNpeMhCallback unsolicitedCallback (out) - The callback function
+ * pointer retrieved.
+ *
+ * @return No return value.
+ */
+
+void ixNpeMhUnsolicitedCbMgrCallbackRetrieve (
+ IxNpeMhNpeId npeId,
+ IxNpeMhMessageId unsolicitedMessageId,
+ IxNpeMhCallback *unsolicitedCallback);
+
+/**
+ * @fn void ixNpeMhUnsolicitedCbMgrShow (
+ IxNpeMhNpeId npeId)
+ *
+ * @brief This function will display the current state of the Unsolicited
+ * Callback Manager module.
+ *
+ * @param IxNpeMhNpeId npeId (in) - The ID of the NPE to display state
+ * information for.
+ *
+ * @return No return value.
+ */
+
+void ixNpeMhUnsolicitedCbMgrShow (
+ IxNpeMhNpeId npeId);
+
+/**
+ * @fn void ixNpeMhUnsolicitedCbMgrShowReset (
+ IxNpeMhNpeId npeId)
+ *
+ * @brief This function will reset the current state of the Unsolicited
+ * Callback Manager module.
+ *
+ * @param IxNpeMhNpeId npeId (in) - The ID of the NPE to reset state
+ * information for.
+ *
+ * @return No return value.
+ */
+
+void ixNpeMhUnsolicitedCbMgrShowReset (
+ IxNpeMhNpeId npeId);
+
+#endif /* IXNPEMHUNSOLICITEDCBMGR_P_H */
+
+/**
+ * @} defgroup IxNpeMhUnsolicitedCbMgr_p
+ */
diff --git a/cpu/ixp/npe/include/IxNpeMicrocode.h b/cpu/ixp/npe/include/IxNpeMicrocode.h
new file mode 100644
index 0000000000..893d8030a1
--- /dev/null
+++ b/cpu/ixp/npe/include/IxNpeMicrocode.h
@@ -0,0 +1,296 @@
+/**
+ * @date April 18, 2005
+ *
+ * @brief IXP400 NPE Microcode Image file
+ *
+ * This file was generated by the IxNpeDlImageGen tool.
+ * It contains a NPE microcode image suitable for use
+ * with the NPE Downloader (IxNpeDl) component in the
+ * IXP400 Access Driver software library.
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+*/
+
+/**
+ * @defgroup IxNpeMicrocode IXP400 NPE Microcode Image Library
+ *
+ * @brief Library containing a set of NPE firmware images, for use
+ * with NPE Downloader s/w component
+ *
+ * @{
+ */
+
+/**
+ * @def IX_NPE_IMAGE_INCLUDE
+ *
+ * @brief Wrap the following Image identifiers with "#if IX_NPE_IMAGE_INCLUDE ... #endif" to include the image in the library
+ */
+#define IX_NPE_IMAGE_INCLUDE 1
+
+/**
+ * @def IX_NPE_IMAGE_OMIT
+ *
+ * @brief Wrap the following Image identifiers with "#if IX_NPE_IMAGE_OMIT ... #endif" to OMIT the image from the library
+ */
+#define IX_NPE_IMAGE_OMIT 0
+
+
+#if IX_NPE_IMAGE_INCLUDE
+/**
+ * @def IX_NPEDL_NPEIMAGE_NPEA_HSS0
+ *
+ * @brief NPE Image Id for NPE-A with HSS-0 Only feature. It supports 32 channelized and 4 packetized.
+ */
+#define IX_NPEDL_NPEIMAGE_NPEA_HSS0 0x00010000
+#endif
+
+#if IX_NPE_IMAGE_INCLUDE
+/**
+ * @def IX_NPEDL_NPEIMAGE_NPEA_HSS0_ATM_SPHY_1_PORT
+ *
+ * @brief NPE Image Id for NPE-A with HSS-0 and ATM feature. For HSS, it supports 16/32 channelized and 4/0 packetized. For ATM, it supports AAL5, AAL0 and OAM for UTOPIA SPHY, 1 logical port, 32 VCs. It also has Fast Path support.
+ */
+#define IX_NPEDL_NPEIMAGE_NPEA_HSS0_ATM_SPHY_1_PORT 0x00020000
+#endif
+
+#if IX_NPE_IMAGE_INCLUDE
+/**
+ * @def IX_NPEDL_NPEIMAGE_NPEA_HSS0_ATM_MPHY_1_PORT
+ *
+ * @brief NPE Image Id for NPE-A with HSS-0 and ATM feature. For HSS, it supports 16/32 channelized and 4/0 packetized. For ATM, it supports AAL5, AAL0 and OAM for UTOPIA MPHY, 1 logical port, 32 VCs. It also has Fast Path support.
+ */
+#define IX_NPEDL_NPEIMAGE_NPEA_HSS0_ATM_MPHY_1_PORT 0x00030000
+#endif
+
+#if IX_NPE_IMAGE_INCLUDE
+/**
+ * @def IX_NPEDL_NPEIMAGE_NPEA_ATM_MPHY_12_PORT
+ *
+ * @brief NPE Image Id for NPE-A with ATM-Only feature. It supports AAL5, AAL0 and OAM for UTOPIA MPHY, 12 logical ports, 32 VCs. It also has Fast Path support.
+ */
+#define IX_NPEDL_NPEIMAGE_NPEA_ATM_MPHY_12_PORT 0x00040000
+#endif
+
+#if IX_NPE_IMAGE_INCLUDE
+/**
+ * @def IX_NPEDL_NPEIMAGE_NPEA_DMA
+ *
+ * @brief NPE Image Id for NPE-A with DMA-Only feature.
+ */
+#define IX_NPEDL_NPEIMAGE_NPEA_DMA 0x00150100
+#endif
+
+#if IX_NPE_IMAGE_INCLUDE
+/**
+ * @def IX_NPEDL_NPEIMAGE_NPEA_HSS_2_PORT
+ *
+ * @brief NPE Image Id for NPE-A with HSS-0 and HSS-1 feature. Each HSS port supports 32 channelized and 4 packetized.
+ */
+#define IX_NPEDL_NPEIMAGE_NPEA_HSS_2_PORT 0x00090000
+#endif
+
+#if IX_NPE_IMAGE_INCLUDE
+/**
+ * @def IX_NPEDL_NPEIMAGE_NPEA_ETH
+ *
+ * @brief NPE Image Id for NPE-A with Basic Ethernet Rx/Tx which includes: MAC_FILTERING, MAC_LEARNING, SPANNING_TREE, FIREWALL
+ */
+#define IX_NPEDL_NPEIMAGE_NPEA_ETH 0x10800200
+#endif
+
+#if IX_NPE_IMAGE_INCLUDE
+/**
+ * @def IX_NPEDL_NPEIMAGE_NPEA_ETH_LEARN_FILTER_SPAN_FIREWALL
+ *
+ * @brief NPE Image Id for NPE-A with Basic Ethernet Rx/Tx which includes: MAC_FILTERING, MAC_LEARNING, SPANNING_TREE, FIREWALL
+ */
+#define IX_NPEDL_NPEIMAGE_NPEA_ETH_LEARN_FILTER_SPAN_FIREWALL 0x10800200
+#endif
+
+#if IX_NPE_IMAGE_INCLUDE
+/**
+ * @def IX_NPEDL_NPEIMAGE_NPEA_ETH_LEARN_FILTER_SPAN_FIREWALL_VLAN_QOS
+ *
+ * @brief NPE Image Id for NPE-A with Ethernet Rx/Tx which includes: MAC_FILTERING, MAC_LEARNING, SPANNING_TREE, FIREWALL, VLAN_QOS
+ */
+#define IX_NPEDL_NPEIMAGE_NPEA_ETH_LEARN_FILTER_SPAN_FIREWALL_VLAN_QOS 0x10810200
+#endif
+
+#if IX_NPE_IMAGE_INCLUDE
+/**
+ * @def IX_NPEDL_NPEIMAGE_NPEA_ETH_SPAN_FIREWALL_VLAN_QOS_HDR_CONV
+ *
+ * @brief NPE Image Id for NPE-A with Ethernet Rx/Tx which includes: SPANNING_TREE, FIREWALL, VLAN_QOS, HEADER_CONVERSION
+ */
+#define IX_NPEDL_NPEIMAGE_NPEA_ETH_SPAN_FIREWALL_VLAN_QOS_HDR_CONV 0x10820200
+#endif
+
+#if IX_NPE_IMAGE_INCLUDE
+/**
+ * @def IX_NPEDL_NPEIMAGE_NPEB_ETH
+ *
+ * @brief NPE Image Id for NPE-B with Basic Ethernet Rx/Tx which includes: MAC_FILTERING, MAC_LEARNING, SPANNING_TREE, FIREWALL
+ */
+#define IX_NPEDL_NPEIMAGE_NPEB_ETH 0x01000200
+#endif
+
+#if IX_NPE_IMAGE_INCLUDE
+/**
+ * @def IX_NPEDL_NPEIMAGE_NPEB_ETH_LEARN_FILTER_SPAN_FIREWALL
+ *
+ * @brief NPE Image Id for NPE-B with Basic Ethernet Rx/Tx which includes: MAC_FILTERING, MAC_LEARNING, SPANNING_TREE, FIREWALL
+ */
+#define IX_NPEDL_NPEIMAGE_NPEB_ETH_LEARN_FILTER_SPAN_FIREWALL 0x01000200
+#endif
+
+#if IX_NPE_IMAGE_INCLUDE
+/**
+ * @def IX_NPEDL_NPEIMAGE_NPEB_ETH_LEARN_FILTER_SPAN_FIREWALL_VLAN_QOS
+ *
+ * @brief NPE Image Id for NPE-B with Ethernet Rx/Tx which includes: MAC_FILTERING, MAC_LEARNING, SPANNING_TREE, FIREWALL, VLAN_QOS
+ */
+#define IX_NPEDL_NPEIMAGE_NPEB_ETH_LEARN_FILTER_SPAN_FIREWALL_VLAN_QOS 0x01010200
+#endif
+
+#if IX_NPE_IMAGE_INCLUDE
+/**
+ * @def IX_NPEDL_NPEIMAGE_NPEB_ETH_SPAN_FIREWALL_VLAN_QOS_HDR_CONV
+ *
+ * @brief NPE Image Id for NPE-B with Ethernet Rx/Tx which includes: SPANNING_TREE, FIREWALL, VLAN_QOS, HEADER_CONVERSION
+ */
+#define IX_NPEDL_NPEIMAGE_NPEB_ETH_SPAN_FIREWALL_VLAN_QOS_HDR_CONV 0x01020200
+#endif
+
+#if IX_NPE_IMAGE_INCLUDE
+/**
+ * @def IX_NPEDL_NPEIMAGE_NPEB_DMA
+ *
+ * @brief NPE Image Id for NPE-B with DMA-Only feature.
+ */
+#define IX_NPEDL_NPEIMAGE_NPEB_DMA 0x01020100
+#endif
+
+#if IX_NPE_IMAGE_INCLUDE
+/**
+ * @def IX_NPEDL_NPEIMAGE_NPEC_ETH
+ *
+ * @brief NPE Image Id for NPE-C with Basic Ethernet Rx/Tx which includes: MAC_FILTERING, MAC_LEARNING, SPANNING_TREE, FIREWALL
+ */
+#define IX_NPEDL_NPEIMAGE_NPEC_ETH 0x02000200
+#endif
+
+#if IX_NPE_IMAGE_INCLUDE
+/**
+ * @def IX_NPEDL_NPEIMAGE_NPEC_ETH_LEARN_FILTER_SPAN_FIREWALL
+ *
+ * @brief NPE Image Id for NPE-C with Basic Ethernet Rx/Tx which includes: MAC_FILTERING, MAC_LEARNING, SPANNING_TREE, FIREWALL
+ */
+#define IX_NPEDL_NPEIMAGE_NPEC_ETH_LEARN_FILTER_SPAN_FIREWALL 0x02000200
+#endif
+
+#if IX_NPE_IMAGE_INCLUDE
+/**
+ * @def IX_NPEDL_NPEIMAGE_NPEC_ETH_LEARN_FILTER_SPAN_FIREWALL_VLAN_QOS
+ *
+ * @brief NPE Image Id for NPE-C with Ethernet Rx/Tx which includes: MAC_FILTERING, MAC_LEARNING, SPANNING_TREE, FIREWALL, VLAN_QOS
+ */
+#define IX_NPEDL_NPEIMAGE_NPEC_ETH_LEARN_FILTER_SPAN_FIREWALL_VLAN_QOS 0x02010200
+#endif
+
+#if IX_NPE_IMAGE_INCLUDE
+/**
+ * @def IX_NPEDL_NPEIMAGE_NPEC_ETH_SPAN_FIREWALL_VLAN_QOS_HDR_CONV
+ *
+ * @brief NPE Image Id for NPE-C with Ethernet Rx/Tx which includes: SPANNING_TREE, FIREWALL, VLAN_QOS, HEADER_CONVERSION
+ */
+#define IX_NPEDL_NPEIMAGE_NPEC_ETH_SPAN_FIREWALL_VLAN_QOS_HDR_CONV 0x02020200
+#endif
+
+#if IX_NPE_IMAGE_INCLUDE
+/**
+ * @def IX_NPEDL_NPEIMAGE_NPEC_DMA
+ *
+ * @brief NPE Image Id for NPE-C with DMA-Only feature.
+ */
+#define IX_NPEDL_NPEIMAGE_NPEC_DMA 0x02080100
+#endif
+
+/* Number of NPE firmware images in this library */
+#define IX_NPE_MICROCODE_AVAILABLE_VERSIONS_COUNT 17
+
+/* Location of Microcode Images */
+#ifdef IX_NPE_MICROCODE_FIRMWARE_INCLUDED
+#ifdef IX_NPEDL_READ_MICROCODE_FROM_FILE
+
+extern UINT32* ixNpeMicrocode_binaryArray;
+
+#else
+
+extern unsigned IxNpeMicrocode_array[];
+
+#endif
+#endif
+
+/*
+ * sr: undef all but the bare minimum to reduce flash usage for U-Boot
+ */
+#undef IX_NPEDL_NPEIMAGE_NPEA_HSS0
+#undef IX_NPEDL_NPEIMAGE_NPEA_HSS0_ATM_SPHY_1_PORT
+#undef IX_NPEDL_NPEIMAGE_NPEA_HSS0_ATM_MPHY_1_PORT
+#undef IX_NPEDL_NPEIMAGE_NPEA_ATM_MPHY_12_PORT
+#undef IX_NPEDL_NPEIMAGE_NPEA_DMA
+#undef IX_NPEDL_NPEIMAGE_NPEA_HSS_2_PORT
+#undef IX_NPEDL_NPEIMAGE_NPEA_ETH
+#undef IX_NPEDL_NPEIMAGE_NPEA_ETH_LEARN_FILTER_SPAN_FIREWALL
+#undef IX_NPEDL_NPEIMAGE_NPEA_ETH_LEARN_FILTER_SPAN_FIREWALL_VLAN_QOS
+#undef IX_NPEDL_NPEIMAGE_NPEA_ETH_SPAN_FIREWALL_VLAN_QOS_HDR_CONV
+#undef IX_NPEDL_NPEIMAGE_NPEB_ETH
+#undef IX_NPEDL_NPEIMAGE_NPEB_ETH_LEARN_FILTER_SPAN_FIREWALL
+/* #undef IX_NPEDL_NPEIMAGE_NPEB_ETH_LEARN_FILTER_SPAN_FIREWALL_VLAN_QOS */
+#undef IX_NPEDL_NPEIMAGE_NPEB_ETH_SPAN_FIREWALL_VLAN_QOS_HDR_CONV
+#undef IX_NPEDL_NPEIMAGE_NPEB_DMA
+#undef IX_NPEDL_NPEIMAGE_NPEC_ETH
+#undef IX_NPEDL_NPEIMAGE_NPEC_ETH_LEARN_FILTER_SPAN_FIREWALL
+/* #undef IX_NPEDL_NPEIMAGE_NPEC_ETH_LEARN_FILTER_SPAN_FIREWALL_VLAN_QOS */
+#undef IX_NPEDL_NPEIMAGE_NPEC_ETH_SPAN_FIREWALL_VLAN_QOS_HDR_CONV
+#undef IX_NPEDL_NPEIMAGE_NPEC_DMA
+
+/**
+ * @} defgroup IxNpeMicrocode
+ */
diff --git a/cpu/ixp/npe/include/IxOsBufLib.h b/cpu/ixp/npe/include/IxOsBufLib.h
new file mode 100644
index 0000000000..a297a97d8b
--- /dev/null
+++ b/cpu/ixp/npe/include/IxOsBufLib.h
@@ -0,0 +1,55 @@
+/**
+ * @file IxOsBufLib.h (Replaced by OSAL)
+ *
+ * @date 9 Oct 2002
+ *
+ * @brief This file contains the mbuf pool initialisation entry point
+ *
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ *
+ */
+
+#ifndef IXOSBUFLIB_H
+#define IXOSBUFLIB_H
+
+#include "IxOsalBackward.h"
+
+#endif /* IXOSBUFLIB_H */
+
diff --git a/cpu/ixp/npe/include/IxOsBuffMgt.h b/cpu/ixp/npe/include/IxOsBuffMgt.h
new file mode 100644
index 0000000000..b7de712bc5
--- /dev/null
+++ b/cpu/ixp/npe/include/IxOsBuffMgt.h
@@ -0,0 +1,52 @@
+/**
+ * @file (Replaced by OSAL)
+ *
+ * @brief This file includes the OS dependant MBUF header files.
+ *
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+
+#ifndef IxOsBuffMgt_inc
+#define IxOsBuffMgt_inc
+
+#include "IxOsalBackward.h"
+
+#endif /* ndef IxOsBuffMgt_inc */
diff --git a/cpu/ixp/npe/include/IxOsBuffPoolMgt.h b/cpu/ixp/npe/include/IxOsBuffPoolMgt.h
new file mode 100644
index 0000000000..4a983c7911
--- /dev/null
+++ b/cpu/ixp/npe/include/IxOsBuffPoolMgt.h
@@ -0,0 +1,74 @@
+/**
+ * @file IxOsBuffPoolMgt.h (Replaced by OSAL)
+ *
+ * @date 9 Oct 2002
+ *
+ * @brief This file contains the mbuf pool implementation API
+ *
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ * This module contains the implementation of the OS Services buffer pool
+ * management service. This module provides routines for creating pools
+ * of buffers for exchange of network data, getting and returning buffers
+ * from and to the pool, and some other utility functions.
+ * <P>
+ * Currently, the pool has 2 underlying implementations - one for the vxWorks
+ * OS, and another which attempts to be OS-agnostic so that it can be used on
+ * other OS's such as Linux. The API is largely the same for all OS's,
+ * but there are some differences to be aware of. These are documented
+ * in the API descriptions below.
+ * <P>
+ * The most significant difference is this: when this module is used with
+ * the WindRiver VxWorks OS, it will create a pool of vxWorks "MBufs".
+ * These can be used directly with the vxWorks "netBufLib" OS Library.
+ * For other OS's, it will create a pool of generic buffers. These may need
+ * to be converted into other buffer types (sk_buff's in Linux, for example)
+ * before being used with any built-in OS routines available for
+ * manipulating network data buffers.
+ *
+ * @sa IxOsBuffMgt.h
+ */
+
+#ifndef IXOSBUFFPOOLMGT_H
+#define IXOSBUFFPOOLMGT_H
+
+#include "IxOsalBackward.h"
+
+#endif /* IXOSBUFFPOOLMGT_H */
+
diff --git a/cpu/ixp/npe/include/IxOsCacheMMU.h b/cpu/ixp/npe/include/IxOsCacheMMU.h
new file mode 100644
index 0000000000..2c8592fe80
--- /dev/null
+++ b/cpu/ixp/npe/include/IxOsCacheMMU.h
@@ -0,0 +1,60 @@
+/**
+ * @file IxOsCacheMMU.h
+ *
+ * @brief this file contains the API of the @ref IxCacheMMU component
+ *
+ * <hr>
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+#ifndef IxOsCacheMMU_H
+
+#ifndef __doxygen_hide
+#define IxOsCacheMMU_H
+#endif /* __doxygen_hide */
+
+#ifdef __doxygen_HIDE
+#define IX_OS_CACHE_DOXYGEN
+#endif /* __doxygen_HIDE */
+
+#include "IxOsalBackward.h"
+
+#endif /* IxOsCacheMMU_H */
+
diff --git a/cpu/ixp/npe/include/IxOsPrintf.h b/cpu/ixp/npe/include/IxOsPrintf.h
new file mode 100644
index 0000000000..218e140934
--- /dev/null
+++ b/cpu/ixp/npe/include/IxOsPrintf.h
@@ -0,0 +1,102 @@
+/**
+ * @file IxOsPrintf.h
+ *
+ * @brief this file contains the API of the @ref IxOsServices component
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+#include "IxTypes.h"
+
+#ifndef IxOsPrintf_H
+
+#ifndef __doxygen_hide
+#define IxOsPrintf_H
+#endif /* __doxygen_hide */
+
+#ifdef __wince
+
+#ifndef IX_USE_SERCONSOLE
+
+static int
+ixLogMsg(
+ char *pFormat,
+ ...
+ )
+{
+#ifndef IN_KERNEL
+ static WCHAR pOutputString[256];
+ static char pNarrowStr[256];
+ int returnCnt = 0;
+ va_list ap;
+
+ pOutputString[0] = 0;
+ pNarrowStr[0] = 0;
+
+ va_start(ap, pFormat);
+
+ returnCnt = _vsnprintf(pNarrowStr, 256, pFormat, ap);
+
+ MultiByteToWideChar(
+ CP_ACP,
+ MB_PRECOMPOSED,
+ pNarrowStr,
+ -1,
+ pOutputString,
+ 256
+ );
+
+ OutputDebugString(pOutputString);
+
+ return returnCnt;
+#else
+ return 0;
+#endif
+}
+#define printf ixLogMsg
+
+#endif /* IX_USE_SERCONSOLE */
+
+#endif /* __wince */
+
+/**
+ * @} IxOsPrintf
+ */
+
+#endif /* IxOsPrintf_H */
diff --git a/cpu/ixp/npe/include/IxOsServices.h b/cpu/ixp/npe/include/IxOsServices.h
new file mode 100644
index 0000000000..62e8a790b9
--- /dev/null
+++ b/cpu/ixp/npe/include/IxOsServices.h
@@ -0,0 +1,55 @@
+/**
+ * @file (Replaced by OSAL)
+ *
+ * @brief this file contains the API of the @ref IxOsServices component
+ *
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+#ifndef IxOsServices_H
+
+#ifndef __doxygen_hide
+#define IxOsServices_H
+#endif /* __doxygen_hide */
+
+#include "IxOsalBackward.h"
+
+#endif /* IxOsServices_H */
+
+
diff --git a/cpu/ixp/npe/include/IxOsServicesComponents.h b/cpu/ixp/npe/include/IxOsServicesComponents.h
new file mode 100644
index 0000000000..d662cd3eee
--- /dev/null
+++ b/cpu/ixp/npe/include/IxOsServicesComponents.h
@@ -0,0 +1,134 @@
+/**
+ * @file IxOsServicesComponents.h (Replaced by OSAL)
+ *
+ * @brief Header file for memory access
+ *
+ * @par
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+#ifndef IxOsServicesComponents_H
+#define IxOsServicesComponents_H
+
+#include "IxOsalBackward.h"
+ * codelets_parityENAcc
+ * timeSyncAcc
+ * parityENAcc
+ * sspAcc
+ * i2c
+ * integration_sspAcc
+ * integration_i2c
+#define ix_timeSyncAcc 36
+#define ix_parityENAcc 37
+#define ix_codelets_parityENAcc 38
+#define ix_sspAcc 39
+#define ix_i2c 40
+#define ix_integration_sspAcc 41
+#define ix_integration_i2c 42
+#define ix_osal 43
+#define ix_integration_parityENAcc 44
+#define ix_integration_timeSyncAcc 45
+
+/***************************
+ * timeSyncAcc
+ ***************************/
+#if (IX_COMPONENT_NAME == ix_timeSyncAcc)
+
+#if defined (IX_OSSERV_VXWORKS_LE)
+
+#define CSR_LE_DATA_COHERENT_MAPPING
+
+#endif /* IX_OSSERV_VXWORKS_LE */
+
+#endif /* timeSyncAcc */
+
+/***************************
+ * parityENAcc
+ ***************************/
+#if (IX_COMPONENT_NAME == ix_parityENAcc)
+
+#if defined (IX_OSSERV_VXWORKS_LE)
+
+#define CSR_LE_DATA_COHERENT_MAPPING
+
+#endif /* IX_OSSERV_VXWORKS_LE */
+
+#endif /* parityENAcc */
+
+/***************************
+ * codelets_parityENAcc
+ ***************************/
+#if (IX_COMPONENT_NAME == ix_codelets_parityENAcc)
+
+#if defined (IX_OSSERV_VXWORKS_LE)
+
+#define CSR_LE_DATA_COHERENT_MAPPING
+
+#endif /* IX_OSSERV_VXWORKS_LE */
+
+#endif /* codelets_parityENAcc */
+
+#endif /* IxOsServicesComponents_H */
+
+/***************************
+ * integration_timeSyncAcc
+ ***************************/
+#if (IX_COMPONENT_NAME == ix_integration_timeSyncAcc)
+
+#if defined (IX_OSSERV_VXWORKS_LE)
+
+#define CSR_LE_DATA_COHERENT_MAPPING
+
+#endif /* IX_OSSERV_VXWORKS_LE */
+
+#endif /* integration_timeSyncAcc */
+
+/***************************
+ * integration_parityENAcc
+ ***************************/
+#if (IX_COMPONENT_NAME == ix_integration_parityENAcc)
+
+#if defined (IX_OSSERV_VXWORKS_LE)
+
+#define CSR_LE_DATA_COHERENT_MAPPING
+
+#endif /* IX_OSSERV_VXWORKS_LE */
+
+#endif /* integration_parityENAcc */
diff --git a/cpu/ixp/npe/include/IxOsServicesEndianess.h b/cpu/ixp/npe/include/IxOsServicesEndianess.h
new file mode 100644
index 0000000000..0d6cd8ccef
--- /dev/null
+++ b/cpu/ixp/npe/include/IxOsServicesEndianess.h
@@ -0,0 +1,52 @@
+/**
+ * @file IxOsServicesEndianess.h (Replaced by OSAL)
+ *
+ * @brief Header file for determining system endianess and OS
+ *
+ * @par
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+#ifndef IxOsServicesEndianess_H
+#define IxOsServicesEndianess_H
+
+#include "IxOsalBackward.h"
+
+#endif /* IxOsServicesEndianess_H */
diff --git a/cpu/ixp/npe/include/IxOsServicesMemAccess.h b/cpu/ixp/npe/include/IxOsServicesMemAccess.h
new file mode 100644
index 0000000000..58e9941065
--- /dev/null
+++ b/cpu/ixp/npe/include/IxOsServicesMemAccess.h
@@ -0,0 +1,52 @@
+/**
+ * @file IxOsServicesMemAccess.h (Replaced by OSAL)
+ *
+ * @brief Header file for memory access
+ *
+ * @par
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+#ifndef IxOsServicesMemAccess_H
+#define IxOsServicesMemAccess_H
+
+#include "IxOsalBackward.h"
+
+#endif /* IxOsServicesMemAccess_H */
diff --git a/cpu/ixp/npe/include/IxOsServicesMemMap.h b/cpu/ixp/npe/include/IxOsServicesMemMap.h
new file mode 100644
index 0000000000..4ce37c3f67
--- /dev/null
+++ b/cpu/ixp/npe/include/IxOsServicesMemMap.h
@@ -0,0 +1,54 @@
+/**
+ * @file IxOsServicesMemMap.h (Replaced by OSAL)
+ *
+ * @brief Header file for memory access maps
+ *
+ * @par
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+#ifndef IxOsServicesMemMap_H
+#define IxOsServicesMemMap_H
+
+#include "IxOsalBackward.h"
+#define IX_OSSERV_ETH_NPEA_MAP_SIZE (0x1000) /**< Eth for NPEA map size */
+#define IX_OSSERV_ETH_NPEA_PHYS_BASE IXP425_Eth_NPEA_BASE_PHYS
+
+#endif /* IxOsServicesMemMap_H */
diff --git a/cpu/ixp/npe/include/IxOsal.h b/cpu/ixp/npe/include/IxOsal.h
new file mode 100644
index 0000000000..b2a93a5dba
--- /dev/null
+++ b/cpu/ixp/npe/include/IxOsal.h
@@ -0,0 +1,1517 @@
+/**
+ * @file IxOsal.h
+ *
+ * @brief Top include file for OSAL
+ *
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+#ifndef IxOsal_H
+#define IxOsal_H
+
+/* Basic types */
+#include "IxOsalTypes.h"
+
+/* Include assert */
+#include "IxOsalAssert.h"
+
+/*
+ * Config header gives users option to choose IO MEM
+ * and buffer management modules
+ */
+
+#include "IxOsalConfig.h"
+
+/*
+ * Symbol file needed by some OS.
+ */
+#include "IxOsalUtilitySymbols.h"
+
+/* OS-specific header */
+#include "IxOsalOs.h"
+
+
+/**
+ * @defgroup IxOsal Operating System Abstraction Layer (IxOsal) API
+ *
+ * @brief This service provides a thin layer of OS dependency services.
+ *
+ * This file contains the API to the functions which are some what OS dependant and would
+ * require porting to a particular OS.
+ * A primary focus of the component development is to make them as OS independent as possible.
+ * All other components should abstract their OS dependency to this module.
+ * Services overview
+ * -# Data types, constants, defines
+ * -# Interrupts
+ * - bind interrupts to handlers
+ * - unbind interrupts from handlers
+ * - disables all interrupts
+ * - enables all interrupts
+ * - selectively disables interrupts
+ * - enables an interrupt level
+ * - disables an interrupt level
+ * -# Memory
+ * - allocates memory
+ * - frees memory
+ * - copies memory zones
+ * - fills a memory zone
+ * - allocates cache-safe memory
+ * - frees cache-safe memory
+ * - physical to virtual address translation
+ * - virtual to physical address translation
+ * - cache to memory flush
+ * - cache line invalidate
+ * -# Threads
+ * - creates a new thread
+ * - starts a newly created thread
+ * - kills an existing thread
+ * - exits a running thread
+ * - sets the priority of an existing thread
+ * - suspends thread execution
+ * - resumes thread execution
+ * -# IPC
+ * - creates a message queue
+ * - deletes a message queue
+ * - sends a message to a message queue
+ * - receives a message from a message queue
+ * -# Thread Synchronisation
+ * - initializes a mutex
+ * - locks a mutex
+ * - unlocks a mutex
+ * - non-blocking attempt to lock a mutex
+ * - destroys a mutex object
+ * - initializes a fast mutex
+ * - non-blocking attempt to lock a fast mutex
+ * - unlocks a fast mutex
+ * - destroys a fast mutex object
+ * - initializes a semaphore
+ * - posts to (increments) a semaphore
+ * - waits on (decrements) a semaphore
+ * - non-blocking wait on semaphore
+ * - gets semaphore value
+ * - destroys a semaphore object
+ * - yields execution of current thread
+ * -# Time functions
+ * - yielding sleep for a number of milliseconds
+ * - busy sleep for a number of microseconds
+ * - value of the timestamp counter
+ * - resolution of the timestamp counter
+ * - system clock rate, in ticks
+ * - current system time
+ * - converts ixOsalTimeVal into ticks
+ * - converts ticks into ixOsalTimeVal
+ * - converts ixOsalTimeVal to milliseconds
+ * - converts milliseconds to IxOsalTimeval
+ * - "equal" comparison for IxOsalTimeval
+ * - "less than" comparison for IxOsalTimeval
+ * - "greater than" comparison for IxOsalTimeval
+ * - "add" operator for IxOsalTimeval
+ * - "subtract" operator for IxOsalTimeval
+ * -# Logging
+ * - sets the current logging verbosity level
+ * - interrupt-safe logging function
+ * -# Timer services
+ * - schedules a repeating timer
+ * - schedules a single-shot timer
+ * - cancels a running timer
+ * - displays all the running timers
+ * -# Optional Modules
+ * - Buffer management module
+ * - I/O memory and endianess support module
+ *
+ * @{
+ */
+
+
+/*
+ * Prototypes
+ */
+
+/* ========================== Interrupts ================================
+ *
+ */
+
+/**
+ * @ingroup IxOsal
+ *
+ * @brief Binds an interrupt handler to an interrupt level
+ *
+ * @param irqLevel (in) - interrupt level
+ * @param irqHandler (in) - interrupt handler
+ * @param parameter (in) - custom parameter to be passed to the
+ * interrupt handler
+ *
+ * Binds an interrupt handler to an interrupt level. The operation will
+ * fail if the wrong level is selected, if the handler is NULL, or if the
+ * interrupt is already bound. This functions binds the specified C
+ * routine to an interrupt level. When called, the "parameter" value will
+ * be passed to the routine.
+ *
+ * Reentrant: no
+ * IRQ safe: no
+ *
+ * @return IX_SUCCESS if the operation succeeded or IX_FAIL otherwise
+ */
+PUBLIC IX_STATUS ixOsalIrqBind (UINT32 irqLevel,
+ IxOsalVoidFnVoidPtr irqHandler,
+ void *parameter);
+
+/**
+ * @ingroup IxOsal
+ *
+ * @brief Unbinds an interrupt handler from an interrupt level
+ *
+ * @param irqLevel (in) - interrupt level
+ *
+ * Unbinds the selected interrupt level from any previously registered
+ * handler
+ *
+ * @li Reentrant: no
+ * @li IRQ safe: no
+ *
+ * @return IX_SUCCESS if the operation succeeded or IX_FAIL otherwise
+ */
+PUBLIC IX_STATUS ixOsalIrqUnbind (UINT32 irqLevel);
+
+
+/**
+ * @ingroup IxOsal
+ *
+ * @brief Disables all interrupts
+ *
+ * @param - none
+ *
+ * Disables all the interrupts and prevents tasks scheduling
+ *
+ * @li Reentrant: no
+ * @li IRQ safe: yes
+ *
+ * @return interrupt enable status prior to locking
+ */
+PUBLIC UINT32 ixOsalIrqLock (void);
+
+/**
+ * @ingroup IxOsal
+ *
+ * @brief Enables all interrupts
+ *
+ * @param irqEnable (in) - interrupt enable status, prior to interrupt
+ * locking
+ *
+ * Enables the interrupts and task scheduling, cancelling the effect
+ * of ixOsalIrqLock()
+ *
+ * @li Reentrant: no
+ * @li IRQ safe: yes
+ *
+ * @return IX_SUCCESS if the operation succeeded or IX_FAIL otherwise
+ */
+PUBLIC void ixOsalIrqUnlock (UINT32 irqEnable);
+
+/**
+ * @ingroup IxOsal
+ *
+ * @brief Selectively disables interrupts
+ *
+ * @param irqLevel ­ new interrupt level
+ *
+ * Disables the interrupts below the specified interrupt level
+ *
+ * @li Reentrant: no
+ * @li IRQ safe: yes
+ *
+ * @note Depending on the implementation this function can disable all
+ * the interrupts
+ *
+ * @return previous interrupt level
+ */
+PUBLIC UINT32 ixOsalIrqLevelSet (UINT32 irqLevel);
+
+/**
+ * @ingroup IxOsal
+ *
+ * @brief Enables an interrupt level
+ *
+ * @param irqLevel ­ interrupt level to enable
+ *
+ * Enables the specified interrupt level
+ *
+ * @li Reentrant: no
+ * @li IRQ safe: yes
+ *
+ * @return - none
+ */
+PUBLIC void ixOsalIrqEnable (UINT32 irqLevel);
+
+/**
+ * @ingroup IxOsal
+ *
+ * @brief Disables an interrupt level
+ *
+ * @param irqLevel ­ interrupt level to disable
+ *
+ * Disables the specified interrupt level
+ *
+ * @li Reentrant: no
+ * @li IRQ safe: yes
+ *
+ * @return - none
+ */
+PUBLIC void ixOsalIrqDisable (UINT32 irqLevel);
+
+
+/* ============================= Memory =================================
+ *
+ */
+
+/**
+ * @ingroup IxOsal
+ *
+ * @brief Allocates memory
+ *
+ * @param size - memory size to allocate, in bytes
+ *
+ * Allocates a memory zone of a given size
+ *
+ * @li Reentrant: no
+ * @li IRQ safe: no
+ *
+ * @return Pointer to the allocated zone or NULL if the allocation failed
+ */
+PUBLIC void *ixOsalMemAlloc (UINT32 size);
+
+/**
+ * @ingroup IxOsal
+ *
+ * @brief Frees memory
+ *
+ * @param ptr - pointer to the memory zone
+ *
+ * Frees a previously allocated memory zone
+ *
+ * @li Reentrant: no
+ * @li IRQ safe: no
+ *
+ * @return - none
+ */
+PUBLIC void ixOsalMemFree (void *ptr);
+
+/**
+ * @ingroup IxOsal
+ *
+ * @brief Copies memory zones
+ *
+ * @param dest - destination memory zone
+ * @param src - source memory zone
+ * @param count - number of bytes to copy
+ *
+ * Copies count bytes from the source memory zone pointed by src into the
+ * memory zone pointed by dest.
+ *
+ * @li Reentrant: no
+ * @li IRQ safe: yes
+ *
+ * @return Pointer to the destination memory zone
+ */
+PUBLIC void *ixOsalMemCopy (void *dest, void *src, UINT32 count);
+
+/**
+ * @ingroup IxOsal
+ *
+ * @brief Fills a memory zone
+ *
+ * @param ptr - pointer to the memory zone
+ * @param filler - byte to fill the memory zone with
+ * @param count - number of bytes to fill
+ *
+ * Fills a memory zone with a given constant byte
+ *
+ * @li Reentrant: no
+ * @li IRQ safe: yes
+ *
+ * @return Pointer to the memory zone
+ */
+PUBLIC void *ixOsalMemSet (void *ptr, UINT8 filler, UINT32 count);
+
+/**
+ * @ingroup IxOsal
+ *
+ * @brief Allocates cache-safe memory
+ *
+ * @param size - size, in bytes, of the allocated zone
+ *
+ * Allocates a cache-safe memory zone of at least "size" bytes and returns
+ * the pointer to the memory zone. This memory zone, depending on the
+ * platform, is either uncached or aligned on a cache line boundary to make
+ * the CACHE_FLUSH and CACHE_INVALIDATE macros safe to use. The memory
+ * allocated with this function MUST be freed with ixOsalCacheDmaFree(),
+ * otherwise memory corruption can occur.
+ *
+ * @li Reentrant: no
+ * @li IRQ safe: no
+ *
+ * @return Pointer to the memory zone or NULL if allocation failed
+ *
+ * @note It is important to note that cache coherence is maintained in
+ * software by using the IX_OSAL_CACHE_FLUSH and IX_OSAL_CACHE_INVALIDATE
+ * macros to maintain consistency between cache and external memory.
+ */
+PUBLIC void *ixOsalCacheDmaMalloc (UINT32 size);
+
+/* Macros for ixOsalCacheDmaMalloc*/
+#define IX_OSAL_CACHE_DMA_MALLOC(size) ixOsalCacheDmaMalloc(size)
+
+/**
+ * @ingroup IxOsal
+ *
+ * @brief Frees cache-safe memory
+ *
+ * @param ptr - pointer to the memory zone
+ *
+ * Frees a memory zone previously allocated with ixOsalCacheDmaMalloc()
+ *
+ * @li Reentrant: no
+ * @li IRQ safe: no
+ *
+ * @return - none
+ */
+PUBLIC void ixOsalCacheDmaFree (void *ptr);
+
+#define IX_OSAL_CACHE_DMA_FREE(ptr) ixOsalCacheDmaFree(ptr)
+
+/**
+ * @ingroup IxOsal
+ *
+ * @brief physical to virtual address translation
+ *
+ * @param physAddr - physical address
+ *
+ * Converts a physical address into its equivalent MMU-mapped virtual address
+ *
+ * @li Reentrant: no
+ * @li IRQ safe: yes
+ *
+ * @return Corresponding virtual address, as UINT32
+ */
+#define IX_OSAL_MMU_PHYS_TO_VIRT(physAddr) \
+ IX_OSAL_OS_MMU_PHYS_TO_VIRT(physAddr)
+
+
+/**
+ * @ingroup IxOsal
+ *
+ * @brief virtual to physical address translation
+ *
+ * @param virtAddr - virtual address
+ *
+ * Converts a virtual address into its equivalent MMU-mapped physical address
+ *
+ * @li Reentrant: no
+ * @li IRQ safe: yes
+ *
+ * @return Corresponding physical address, as UINT32
+ */
+#define IX_OSAL_MMU_VIRT_TO_PHYS(virtAddr) \
+ IX_OSAL_OS_MMU_VIRT_TO_PHYS(virtAddr)
+
+
+
+/**
+ * @ingroup IxOsal
+ *
+ * @brief cache to memory flush
+ *
+ * @param addr - memory address to flush from cache
+ * @param size - number of bytes to flush (rounded up to a cache line)
+ *
+ * Flushes the cached value of the memory zone pointed by "addr" into memory,
+ * rounding up to a cache line. Use before the zone is to be read by a
+ * processing unit which is not cache coherent with the main CPU.
+ *
+ * @li Reentrant: no
+ * @li IRQ safe: yes
+ *
+ * @return - none
+ */
+#define IX_OSAL_CACHE_FLUSH(addr, size) IX_OSAL_OS_CACHE_FLUSH(addr, size)
+
+
+
+/**
+ * @ingroup IxOsal
+ *
+ * @brief cache line invalidate
+ *
+ * @param addr - memory address to invalidate in cache
+ * @param size - number of bytes to invalidate (rounded up to a cache line)
+ *
+ * Invalidates the cached value of the memory zone pointed by "addr",
+ * rounding up to a cache line. Use before reading the zone from the main
+ * CPU, if the zone has been updated by a processing unit which is not cache
+ * coherent with the main CPU.
+ *
+ * @li Reentrant: no
+ * @li IRQ safe: yes
+ *
+ * @return - none
+ */
+#define IX_OSAL_CACHE_INVALIDATE(addr, size) IX_OSAL_OS_CACHE_INVALIDATE(addr, size)
+
+
+/* ============================= Threads =================================
+ *
+ */
+
+/**
+ * @ingroup IxOsal
+ *
+ * @brief Creates a new thread
+ *
+ * @param thread - handle of the thread to be created
+ * @param threadAttr - pointer to a thread attribute object
+ * @param startRoutine - thread entry point
+ * @param arg - argument given to the thread
+ *
+ * Creates a thread given a thread handle and a thread attribute object. The
+ * same thread attribute object can be used to create separate threads. "NULL"
+ * can be specified as the attribute, in which case the default values will
+ * be used. The thread needs to be explicitly started using ixOsalThreadStart().
+ *
+ * @li Reentrant: no
+ * @li IRQ safe: no
+ *
+ * @return - IX_SUCCESS/IX_FAIL
+ */
+PUBLIC IX_STATUS ixOsalThreadCreate (IxOsalThread * thread,
+ IxOsalThreadAttr * threadAttr,
+ IxOsalVoidFnVoidPtr startRoutine,
+ void *arg);
+
+/**
+ * @ingroup IxOsal
+ *
+ * @brief Starts a newly created thread
+ *
+ * @param thread - handle of the thread to be started
+ *
+ * Starts a thread given its thread handle. This function is to be called
+ * only once, following the thread initialization.
+ *
+ * @li Reentrant: no
+ * @li IRQ safe: no
+ *
+ * @return - IX_SUCCESS/IX_FAIL
+ */
+PUBLIC IX_STATUS ixOsalThreadStart (IxOsalThread * thread);
+
+/**
+ * @ingroup IxOsal
+ *
+ * @brief Kills an existing thread
+ *
+ * @param thread - handle of the thread to be killed
+ *
+ * Kills a thread given its thread handle.
+ *
+ * @li Reentrant: no
+ * @li IRQ safe: no
+ *
+ * @note It is not possible to kill threads in Linux kernel mode. This
+ * function will only send a SIGTERM signal, and it is the responsibility
+ * of the thread to check for the presence of this signal with
+ * signal_pending().
+ *
+ * @return - IX_SUCCESS/IX_FAIL
+ */
+PUBLIC IX_STATUS ixOsalThreadKill (IxOsalThread * thread);
+
+/**
+ * @ingroup IxOsal
+ *
+ * @brief Exits a running thread
+ *
+ * Terminates the calling thread
+ *
+ * @li Reentrant: no
+ * @li IRQ safe: no
+ *
+ * @return - This function never returns
+ */
+PUBLIC void ixOsalThreadExit (void);
+
+/**
+ * @ingroup IxOsal
+ *
+ * @brief Sets the priority of an existing thread
+ *
+ * @param thread - handle of the thread
+ * @param priority - new priority, between 0 and 255 (0 being the highest)
+ *
+ * Sets the thread priority
+ *
+ * @li Reentrant: no
+ * @li IRQ safe: no
+ *
+ * @return - IX_SUCCESS/IX_FAIL
+ */
+PUBLIC IX_STATUS ixOsalThreadPrioritySet (IxOsalThread * thread,
+ UINT32 priority);
+
+/**
+ * @ingroup IxOsal
+ *
+ * @brief Suspends thread execution
+ *
+ * @param thread - handle of the thread
+ *
+ * Suspends the thread execution
+ *
+ * @li Reentrant: no
+ * @li IRQ safe: no
+ *
+ * @return - IX_SUCCESS/IX_FAIL
+ */
+PUBLIC IX_STATUS ixOsalThreadSuspend (IxOsalThread * thread);
+
+/**
+ * @ingroup IxOsal
+ *
+ * @brief Resumes thread execution
+ *
+ * @param thread - handle of the thread
+ *
+ * Resumes the thread execution
+ *
+ * @li Reentrant: no
+ * @li IRQ safe: no
+ *
+ * @return - IX_SUCCESS/IX_FAIL
+ */
+PUBLIC IX_STATUS ixOsalThreadResume (IxOsalThread * thread);
+
+
+/* ======================= Message Queues (IPC) ==========================
+ *
+ */
+
+/**
+ * @ingroup IxOsal
+ *
+ * @brief Creates a message queue
+ *
+ * @param queue - queue handle
+ * @param msgCount - maximum number of messages to hold in the queue
+ * @param msgLen - maximum length of each message, in bytes
+ *
+ * Creates a message queue of msgCount messages, each containing msgLen bytes
+ *
+ * @li Reentrant: no
+ * @li IRQ safe: no
+ *
+ * @return - IX_SUCCESS/IX_FAIL
+ */
+PUBLIC IX_STATUS ixOsalMessageQueueCreate (IxOsalMessageQueue * queue,
+ UINT32 msgCount, UINT32 msgLen);
+
+/**
+ * @ingroup IxOsal
+ *
+ * @brief Deletes a message queue
+ *
+ * @param queue - queue handle
+ *
+ * Deletes a message queue
+ *
+ * @li Reentrant: no
+ * @li IRQ safe: no
+ *
+ * @return - IX_SUCCESS/IX_FAIL
+ */
+PUBLIC IX_STATUS ixOsalMessageQueueDelete (IxOsalMessageQueue * queue);
+
+/**
+ * @ingroup IxOsal
+ *
+ * @brief Sends a message to a message queue
+ *
+ * @param queue - queue handle
+ * @param message - message to send
+ *
+ * Sends a message to the message queue. The message will be copied (at the
+ * configured size of the message) into the queue.
+ *
+ * @li Reentrant: yes
+ * @li IRQ safe: yes
+ *
+ * @return - IX_SUCCESS/IX_FAIL
+ */
+PUBLIC IX_STATUS ixOsalMessageQueueSend (IxOsalMessageQueue * queue,
+ UINT8 * message);
+
+/**
+ * @ingroup IxOsal
+ *
+ * @brief Receives a message from a message queue
+ *
+ * @param queue - queue handle
+ * @param message - pointer to where the message should be copied to
+ *
+ * Retrieves the first message from the message queue
+ *
+ * @li Reentrant: yes
+ * @li IRQ safe: yes
+ *
+ * @return - IX_SUCCESS/IX_FAIL
+ */
+PUBLIC IX_STATUS ixOsalMessageQueueReceive (IxOsalMessageQueue * queue,
+ UINT8 * message);
+
+
+/* ======================= Thread Synchronisation ========================
+ *
+ */
+
+/**
+ * @ingroup IxOsal
+ *
+ * @brief initializes a mutex
+ *
+ * @param mutex - mutex handle
+ *
+ * Initializes a mutex object
+ *
+ * @li Reentrant: no
+ * @li IRQ safe: no
+ *
+ * @return - IX_SUCCESS/IX_FAIL
+ */
+PUBLIC IX_STATUS ixOsalMutexInit (IxOsalMutex * mutex);
+
+/**
+ * @ingroup IxOsal
+ *
+ * @brief locks a mutex
+ *
+ * @param mutex - mutex handle
+ * @param timeout - timeout in ms; IX_OSAL_WAIT_FOREVER (-1) to wait forever
+ * or IX_OSAL_WAIT_NONE to return immediately
+ *
+ * Locks a mutex object
+ *
+ * @li Reentrant: yes
+ * @li IRQ safe: no
+ *
+ * @return - IX_SUCCESS/IX_FAIL
+ */
+PUBLIC IX_STATUS ixOsalMutexLock (IxOsalMutex * mutex, INT32 timeout);
+
+/**
+ * @ingroup IxOsal
+ *
+ * @brief Unlocks a mutex
+ *
+ * @param mutex - mutex handle
+ *
+ * Unlocks a mutex object
+ *
+ * @li Reentrant: yes
+ * @li IRQ safe: yes
+ *
+ * @return - IX_SUCCESS/IX_FAIL
+ */
+PUBLIC IX_STATUS ixOsalMutexUnlock (IxOsalMutex * mutex);
+
+/**
+ * @ingroup IxOsal
+ *
+ * @brief Non-blocking attempt to lock a mutex
+ *
+ * @param mutex - mutex handle
+ *
+ * Attempts to lock a mutex object, returning immediately with IX_SUCCESS if
+ * the lock was successful or IX_FAIL if the lock failed
+ *
+ * @li Reentrant: yes
+ * @li IRQ safe: no
+ *
+ * @return - IX_SUCCESS/IX_FAIL
+ */
+PUBLIC IX_STATUS ixOsalMutexTryLock (IxOsalMutex * mutex);
+
+/**
+ * @ingroup IxOsal
+ *
+ * @brief Destroys a mutex object
+ *
+ * @param mutex - mutex handle
+ * @param
+ *
+ * Destroys a mutex object; the caller should ensure that no thread is
+ * blocked on this mutex
+ *
+ * @li Reentrant: no
+ * @li IRQ safe: no
+ *
+ * @return - IX_SUCCESS/IX_FAIL
+ */
+PUBLIC IX_STATUS ixOsalMutexDestroy (IxOsalMutex * mutex);
+
+/**
+ * @ingroup IxOsal
+ *
+ * @brief Initializes a fast mutex
+ *
+ * @param mutex - fast mutex handle
+ *
+ * Initializes a fast mutex object
+ *
+ * @li Reentrant: yes
+ * @li IRQ safe: yes
+ *
+ * @return - IX_SUCCESS/IX_FAIL
+ */
+PUBLIC IX_STATUS ixOsalFastMutexInit (IxOsalFastMutex * mutex);
+
+/**
+ * @ingroup IxOsal
+ *
+ * @brief Non-blocking attempt to lock a fast mutex
+ *
+ * @param mutex - fast mutex handle
+ *
+ * Attempts to lock a fast mutex object, returning immediately with
+ * IX_SUCCESS if the lock was successful or IX_FAIL if the lock failed
+ *
+ * @li Reentrant: yes
+ * @li IRQ safe: yes
+ *
+ * @return - IX_SUCCESS/IX_FAIL
+ */
+PUBLIC IX_STATUS ixOsalFastMutexTryLock (IxOsalFastMutex * mutex);
+
+/**
+ * @ingroup IxOsal
+ *
+ * @brief Unlocks a fast mutex
+ *
+ * @param mutex - fast mutex handle
+ *
+ * Unlocks a fast mutex object
+ *
+ * @li Reentrant: yes
+ * @li IRQ safe: yes
+ *
+ * @return - IX_SUCCESS/IX_FAIL
+ */
+PUBLIC IX_STATUS ixOsalFastMutexUnlock (IxOsalFastMutex * mutex);
+
+/**
+ * @ingroup IxOsal
+ *
+ * @brief Destroys a fast mutex object
+ *
+ * @param mutex - fast mutex handle
+ *
+ * Destroys a fast mutex object
+ *
+ * @li Reentrant: yes
+ * @li IRQ safe: yes
+ *
+ * @return - IX_SUCCESS/IX_FAIL
+ */
+PUBLIC IX_STATUS ixOsalFastMutexDestroy (IxOsalFastMutex * mutex);
+
+/**
+ * @ingroup IxOsal
+ *
+ * @brief Initializes a semaphore
+ *
+ * @param semaphore - semaphore handle
+ * @param value - initial semaphore value
+ *
+ * Initializes a semaphore object
+ *
+ * @li Reentrant: no
+ * @li IRQ safe: no
+ *
+ * @return - IX_SUCCESS/IX_FAIL
+ */
+PUBLIC IX_STATUS ixOsalSemaphoreInit (IxOsalSemaphore * semaphore,
+ UINT32 value);
+
+/**
+ * @ingroup IxOsal
+ *
+ * @brief Posts to (increments) a semaphore
+ *
+ * @param semaphore - semaphore handle
+ *
+ * Increments a semaphore object
+ *
+ * @li Reentrant: no
+ * @li IRQ safe: yes
+ *
+ * @return - IX_SUCCESS/IX_FAIL
+ */
+PUBLIC IX_STATUS ixOsalSemaphorePost (IxOsalSemaphore * semaphore);
+
+/**
+ * @ingroup IxOsal
+ *
+ * @brief Waits on (decrements) a semaphore
+ *
+ * @param semaphore - semaphore handle
+ * @param timeout - timeout, in ms; IX_OSAL_WAIT_FOREVER (-1) if the thread
+ * is to block indefinitely or IX_OSAL_WAIT_NONE (0) if the thread is to
+ * return immediately even if the call fails
+ *
+ * Decrements a semaphore, blocking if the semaphore is
+ * unavailable (value is 0).
+ *
+ * @li Reentrant: no
+ * @li IRQ safe: no
+ *
+ * @return - IX_SUCCESS/IX_FAIL
+ */
+PUBLIC IX_STATUS ixOsalSemaphoreWait (IxOsalSemaphore * semaphore,
+ INT32 timeout);
+
+/**
+ * @ingroup IxOsal
+ *
+ * @brief Non-blocking wait on semaphore
+ *
+ * @param semaphore - semaphore handle
+ *
+ * Decrements a semaphore, not blocking the calling thread if the semaphore
+ * is unavailable
+ *
+ * @li Reentrant: no
+ * @li IRQ safe: no
+ *
+ * @return - IX_SUCCESS/IX_FAIL
+ */
+PUBLIC IX_STATUS ixOsalSemaphoreTryWait (IxOsalSemaphore * semaphore);
+
+/**
+ * @ingroup IxOsal
+ *
+ * @brief Gets semaphore value
+ *
+ * @param semaphore - semaphore handle
+ * @param value - location to store the semaphore value
+ *
+ * Retrieves the current value of a semaphore object
+ *
+ * @li Reentrant: no
+ * @li IRQ safe: no
+ *
+ * @return - IX_SUCCESS/IX_FAIL
+ */
+PUBLIC IX_STATUS ixOsalSemaphoreGetValue (IxOsalSemaphore * semaphore,
+ UINT32 * value);
+
+/**
+ * @ingroup IxOsal
+ *
+ * @brief Destroys a semaphore object
+ *
+ * @param semaphore - semaphore handle
+ *
+ * Destroys a semaphore object; the caller should ensure that no thread is
+ * blocked on this semaphore
+ *
+ * @li Reentrant: no
+ * @li IRQ safe: no
+ *
+ * @return - IX_SUCCESS/IX_FAIL
+ */
+PUBLIC IX_STATUS ixOsalSemaphoreDestroy (IxOsalSemaphore * semaphore);
+
+/**
+ * @ingroup IxOsal
+ *
+ * @brief Yields execution of current thread
+ *
+ * Yields the execution of the current thread
+ *
+ * @li Reentrant: no
+ * @li IRQ safe: no
+ *
+ * @return - none
+ */
+PUBLIC void ixOsalYield (void);
+
+
+/* ========================== Time functions ===========================
+ *
+ */
+
+/**
+ * @ingroup IxOsal
+ *
+ * @brief Yielding sleep for a number of milliseconds
+ *
+ * @param milliseconds - number of milliseconds to sleep
+ *
+ * The calling thread will sleep for the specified number of milliseconds.
+ * This sleep is yielding, hence other tasks will be scheduled by the
+ * operating system during the sleep period. Calling this function with an
+ * argument of 0 will place the thread at the end of the current scheduling
+ * loop.
+ *
+ * @li Reentrant: no
+ * @li IRQ safe: no
+ *
+ * @return - none
+ */
+PUBLIC void ixOsalSleep (UINT32 milliseconds);
+
+/**
+ * @ingroup IxOsal
+ *
+ * @brief Busy sleep for a number of microseconds
+ *
+ * @param microseconds - number of microseconds to sleep
+ *
+ * Sleeps for the specified number of microseconds, without explicitly
+ * yielding thread execution to the OS scheduler
+ *
+ * @li Reentrant: yes
+ * @li IRQ safe: yes
+ *
+ * @return - none
+ */
+PUBLIC void ixOsalBusySleep (UINT32 microseconds);
+
+/**
+ * @ingroup IxOsal
+ *
+ * @brief XXX
+ *
+ * Retrieves the current timestamp
+ *
+ * @li Reentrant: yes
+ * @li IRQ safe: yes
+ *
+ * @return - The current timestamp
+ *
+ * @note The implementation of this function is platform-specific. Not
+ * all the platforms provide a high-resolution timestamp counter.
+ */
+PUBLIC UINT32 ixOsalTimestampGet (void);
+
+/**
+ * @ingroup IxOsal
+ *
+ * @brief Resolution of the timestamp counter
+ *
+ * Retrieves the resolution (frequency) of the timestamp counter.
+ *
+ * @li Reentrant: yes
+ * @li IRQ safe: yes
+ *
+ * @return - The resolution of the timestamp counter
+ *
+ * @note The implementation of this function is platform-specific. Not all
+ * the platforms provide a high-resolution timestamp counter.
+ */
+PUBLIC UINT32 ixOsalTimestampResolutionGet (void);
+
+/**
+ * @ingroup IxOsal
+ *
+ * @brief System clock rate, in ticks
+ *
+ * Retrieves the resolution (number of ticks per second) of the system clock
+ *
+ * @li Reentrant: no
+ * @li IRQ safe: no
+ *
+ * @return - The system clock rate
+ *
+ * @note The implementation of this function is platform and OS-specific.
+ * The system clock rate is not always available - e.g. Linux does not
+ * provide this information in user mode
+ */
+PUBLIC UINT32 ixOsalSysClockRateGet (void);
+
+/**
+ * @ingroup IxOsal
+ *
+ * @brief Current system time
+ *
+ * @param tv - pointer to an IxOsalTimeval structure to store the current
+ * time in
+ *
+ * Retrieves the current system time (real-time)
+ *
+ * @li Reentrant: no
+ * @li IRQ safe: no
+ *
+ * @return - none
+ *
+ * @note The implementation of this function is platform-specific. Not all
+ * platforms have a real-time clock.
+ */
+PUBLIC void ixOsalTimeGet (IxOsalTimeval * tv);
+
+
+
+/* Internal function to convert timer val to ticks.
+ * NOTE - This should not be called by the user.
+ * Use the macro IX_OSAL_TIMEVAL_TO_TICKS
+ * OS-independent, implemented in framework.
+ */
+PUBLIC UINT32 ixOsalTimevalToTicks (IxOsalTimeval tv);
+
+
+/**
+ * @ingroup IxOsal
+ *
+ * @brief Converts ixOsalTimeVal into ticks
+ *
+ * @param tv - an IxOsalTimeval structure
+ *
+ * Converts an IxOsalTimeval structure into OS ticks
+ *
+ * @li Reentrant: yes
+ * @li IRQ safe: yes
+ *
+ * @return - Corresponding number of ticks
+ *
+ * Note: This function is OS-independent. Implemented by core.
+ */
+#define IX_OSAL_TIMEVAL_TO_TICKS(tv) ixOsalTimevalToTicks(tv)
+
+
+
+/* Internal function to convert ticks to timer val
+ * NOTE - This should not be called by the user.
+ * Use the macro IX_OSAL_TICKS_TO_TIMEVAL
+ */
+
+PUBLIC void ixOsalTicksToTimeval (UINT32 ticks, IxOsalTimeval * pTv);
+
+
+/**
+ * @ingroup IxOsal
+ *
+ * @brief Converts ticks into ixOsalTimeVal
+ *
+ * @param ticks - number of ticks
+ * @param pTv - pointer to the destination structure
+ *
+ * Converts the specified number of ticks into an IxOsalTimeval structure
+ *
+ * @li Reentrant: yes
+ * @li IRQ safe: yes
+ *
+ * @return - Corresponding IxOsalTimeval structure
+ * Note: This function is OS-independent. Implemented by core.
+ */
+#define IX_OSAL_TICKS_TO_TIMEVAL(ticks, pTv) \
+ ixOsalTicksToTimeval(ticks, pTv)
+
+
+
+
+/**
+ * @ingroup IxOsal
+ *
+ * @brief Converts ixOsalTimeVal to milliseconds
+ *
+ * @param tv - IxOsalTimeval structure to convert
+ *
+ * Converts an IxOsalTimeval structure into milliseconds
+ *
+ * @li Reentrant: yes
+ * @li IRQ safe: yes
+ *
+ * @return - Corresponding number of milliseconds
+ * Note: This function is OS-independent. Implemented by core.
+ */
+#define IX_OSAL_TIMEVAL_TO_MS(tv) ((tv.secs * 1000) + (tv.nsecs / 1000000))
+
+
+/**
+ * @ingroup IxOsal
+ *
+ * @brief Converts milliseconds to IxOsalTimeval
+ *
+ * @param milliseconds - number of milliseconds to convert
+ * @param pTv - pointer to the destination structure
+ *
+ * Converts a millisecond value into an IxOsalTimeval structure
+ *
+ * @li Reentrant: yes
+ * @li IRQ safe: yes
+ *
+ * @return - Corresponding IxOsalTimeval structure
+ * Note: This function is OS-independent. Implemented by core.
+ */
+#define IX_OSAL_MS_TO_TIMEVAL(milliseconds, pTv) \
+ ((IxOsalTimeval *) pTv)->secs = milliseconds / 1000; \
+ ((IxOsalTimeval *) pTv)->nsecs = (milliseconds % 1000) * 1000000
+
+
+/**
+ * @ingroup IxOsal
+ *
+ * @brief "equal" comparison for IxOsalTimeval
+ *
+ * @param tvA, tvB - IxOsalTimeval structures to compare
+ *
+ * Compares two IxOsalTimeval structures for equality
+ *
+ * @li Reentrant: yes
+ * @li IRQ safe: yes
+ *
+ * @return - TRUE if the structures are equal
+ * - FALSE otherwise
+ * Note: This function is OS-independant
+ */
+#define IX_OSAL_TIME_EQ(tvA, tvB) \
+ ((tvA).secs == (tvB).secs && (tvA).nsecs == (tvB).nsecs)
+
+
+/**
+ * @ingroup IxOsal
+ *
+ * @brief "less than" comparison for IxOsalTimeval
+ *
+ * @param tvA, tvB - IxOsalTimeval structures to compare
+ *
+ * Compares two IxOsalTimeval structures to determine if the first one is
+ * less than the second one
+ *
+ * @li Reentrant: yes
+ * @li IRQ safe: yes
+ *
+ * @return - TRUE if tvA < tvB
+ * - FALSE otherwise
+ * Note: This function is OS-independent. Implemented by core.
+ */
+#define IX_OSAL_TIME_LT(tvA,tvB) \
+ ((tvA).secs < (tvB).secs || \
+ ((tvA).secs == (tvB).secs && (tvA).nsecs < (tvB).nsecs))
+
+
+/**
+ * @ingroup IxOsal
+ *
+ * @brief "greater than" comparison for IxOsalTimeval
+ *
+ * @param tvA, tvB - IxOsalTimeval structures to compare
+ *
+ * Compares two IxOsalTimeval structures to determine if the first one is
+ * greater than the second one
+ *
+ * @li Reentrant: yes
+ * @li IRQ safe: yes
+ *
+ * @return - TRUE if tvA > tvB
+ * - FALSE otherwise
+ * Note: This function is OS-independent.
+ */
+#define IX_OSAL_TIME_GT(tvA, tvB) \
+ ((tvA).secs > (tvB).secs || \
+ ((tvA).secs == (tvB).secs && (tvA).nsecs > (tvB).nsecs))
+
+
+/**
+ * @ingroup IxOsal
+ *
+ * @brief "add" operator for IxOsalTimeval
+ *
+ * @param tvA, tvB - IxOsalTimeval structures to add
+ *
+ * Adds the second IxOsalTimevalStruct to the first one (equivalent to
+ * tvA += tvB)
+ *
+ * @li Reentrant: yes
+ * @li IRQ safe: yes
+ *
+ * @return - none
+ * Note: This function is OS-independent.
+ */
+#define IX_OSAL_TIME_ADD(tvA, tvB) \
+ (tvA).secs += (tvB).secs; \
+ (tvA).nsecs += (tvB).nsecs; \
+ if ((tvA).nsecs >= IX_OSAL_BILLION) \
+ { \
+ (tvA).secs++; \
+ (tvA).nsecs -= IX_OSAL_BILLION; }
+
+
+/**
+ * @ingroup IxOsal
+ *
+ * @brief "subtract" operator for IxOsalTimeval
+ *
+ * @param tvA, tvB - IxOsalTimeval structures to subtract
+ *
+ * Subtracts the second IxOsalTimevalStruct from the first one (equivalent
+ * to tvA -= tvB)
+ *
+ * @li Reentrant: yes
+ * @li IRQ safe: yes
+ *
+ * @return - none
+ * Note: This function is OS-independent. Implemented by core.
+ */
+#define IX_OSAL_TIME_SUB(tvA, tvB) \
+ if ((tvA).nsecs >= (tvB).nsecs) \
+ { \
+ (tvA).secs -= (tvB).secs; \
+ (tvA).nsecs -= (tvB).nsecs; \
+ } \
+ else \
+ { \
+ (tvA).secs -= ((tvB).secs + 1); \
+ (tvA).nsecs += IX_OSAL_BILLION - (tvB).nsecs; \
+ }
+
+
+/* ============================= Logging ==============================
+ *
+ */
+
+/**
+ * @ingroup IxOsal
+ *
+ * @brief Interrupt-safe logging function
+ *
+ * @param level - identifier prefix for the message
+ * @param device - output device
+ * @param format - message format, in a printf format
+ * @param ... - up to 6 arguments to be printed
+ *
+ * IRQ-safe logging function, similar to printf. Accepts up to 6 arguments
+ * to print (excluding the level, device and the format). This function will
+ * actually display the message only if the level is lower than the current
+ * verbosity level or if the IX_OSAL_LOG_USER level is used. An output device
+ * must be specified (see IxOsalTypes.h).
+ *
+ * @li Reentrant: yes
+ * @li IRQ safe: yes
+ *
+ * @return - Beside the exceptions documented in the note below, the returned
+ * value is the number of printed characters, or -1 if the parameters are
+ * incorrect (NULL format, unknown output device)
+ *
+ * @note The exceptions to the return value are:
+ * VxWorks: The return value is 32 if the specified level is 1 and 64
+ * if the specified level is greater than 1 and less or equal than 9.
+ * WinCE: If compiled for EBOOT then the return value is always 0.
+ *
+ * @note The given print format should take into account the specified
+ * output device. IX_OSAL_STDOUT supports all the usual print formats,
+ * however a custom hex display specified by IX_OSAL_HEX would support
+ * only a fixed number of hexadecimal digits.
+ */
+PUBLIC INT32 ixOsalLog (IxOsalLogLevel level,
+ IxOsalLogDevice device,
+ char *format,
+ int arg1,
+ int arg2, int arg3, int arg4, int arg5, int arg6);
+
+/**
+ * @ingroup IxOsal
+ *
+ * @brief sets the current logging verbosity level
+ *
+ * @param level - new log verbosity level
+ *
+ * Sets the log verbosity level. The default value is IX_OSAL_LOG_ERROR.
+ *
+ * @li Reentrant: yes
+ * @li IRQ safe: yes
+ *
+ * @return - Old log verbosity level
+ */
+PUBLIC UINT32 ixOsalLogLevelSet (UINT32 level);
+
+
+/* ============================= Logging ==============================
+ *
+ */
+
+/**
+ * @ingroup IxOsal
+ *
+ * @brief Schedules a repeating timer
+ *
+ * @param timer - handle of the timer object
+ * @param period - timer trigger period, in milliseconds
+ * @param priority - timer priority (0 being the highest)
+ * @param callback - user callback to invoke when the timer triggers
+ * @param param - custom parameter passed to the callback
+ *
+ * Schedules a timer to be called every period milliseconds. The timer
+ * will invoke the specified callback function possibly in interrupt
+ * context, passing the given parameter. If several timers trigger at the
+ * same time contention issues are dealt according to the specified timer
+ * priorities.
+ *
+ * @li Reentrant: no
+ * @li IRQ safe: no
+ *
+ * @return - IX_SUCCESS/IX_FAIL
+ */
+PUBLIC IX_STATUS ixOsalRepeatingTimerSchedule (IxOsalTimer * timer,
+ UINT32 period,
+ UINT32 priority,
+ IxOsalVoidFnVoidPtr callback,
+ void *param);
+
+/**
+ * @ingroup IxOsal
+ *
+ * @brief Schedules a single-shot timer
+ *
+ * @param timer - handle of the timer object
+ * @param period - timer trigger period, in milliseconds
+ * @param priority - timer priority (0 being the highest)
+ * @param callback - user callback to invoke when the timer triggers
+ * @param param - custom parameter passed to the callback
+ *
+ * Schedules a timer to be called after period milliseconds. The timer
+ * will cease to function past its first trigger. The timer will invoke
+ * the specified callback function, possibly in interrupt context, passing
+ * the given parameter. If several timers trigger at the same time contention
+ * issues are dealt according to the specified timer priorities.
+ *
+ * @li Reentrant: no
+ * @li IRQ safe: no
+ *
+ * @return - IX_SUCCESS/IX_FAIL
+ */
+PUBLIC IX_STATUS
+ixOsalSingleShotTimerSchedule (IxOsalTimer * timer,
+ UINT32 period,
+ UINT32 priority,
+ IxOsalVoidFnVoidPtr callback, void *param);
+
+/**
+ * @ingroup IxOsal
+ *
+ * @brief Cancels a running timer
+ *
+ * @param timer - handle of the timer object
+ *
+ * Cancels a single-shot or repeating timer.
+ *
+ * @li Reentrant: no
+ * @li IRQ safe: yes
+ *
+ * @return - IX_SUCCESS/IX_FAIL
+ */
+PUBLIC IX_STATUS ixOsalTimerCancel (IxOsalTimer * timer);
+
+/**
+ * @ingroup IxOsal
+ *
+ * @brief displays all the running timers
+ *
+ * Displays a list with all the running timers and their parameters (handle,
+ * period, type, priority, callback and user parameter)
+ *
+ * @li Reentrant: no
+ * @li IRQ safe: no
+ *
+ * @return - none
+ */
+PUBLIC void ixOsalTimersShow (void);
+
+
+/* ============================= Version ==============================
+ *
+ */
+
+/**
+ * @ingroup IxOsal
+ *
+ * @brief provides the name of the Operating System running
+ *
+ * @param osName - Pointer to a NULL-terminated string of characters
+ * that holds the name of the OS running.
+ * This is both an input and an ouput parameter
+ * @param maxSize - Input parameter that defines the maximum number of
+ * bytes that can be stored in osName
+ *
+ * Returns a string of characters that describe the Operating System name
+ *
+ * @li Reentrant: yes
+ * @li IRQ safe: yes
+ *
+ * return - IX_SUCCESS for successful retrieval
+ * - IX_FAIL if (osType == NULL | maxSize =< 0)
+ */
+PUBLIC IX_STATUS ixOsalOsNameGet (INT8* osName, INT32 maxSize);
+
+/**
+ * @ingroup IxOsal
+ *
+ * @brief provides the version of the Operating System running
+ *
+ * @param osVersion - Pointer to a NULL terminated string of characters
+ * that holds the version of the OS running.
+ * This is both an input and an ouput parameter
+ * @param maxSize - Input parameter that defines the maximum number of
+ * bytes that can be stored in osVersion
+ *
+ * Returns a string of characters that describe the Operating System's version
+ *
+ * @li Reentrant: yes
+ * @li IRQ safe: yes
+ *
+ * return - IX_SUCCESS for successful retrieval
+ * - IX_FAIL if (osVersion == NULL | maxSize =< 0)
+ */
+PUBLIC IX_STATUS ixOsalOsVersionGet(INT8* osVersion, INT32 maxSize);
+
+
+
+/**
+ * @} IxOsal
+ */
+
+#endif /* IxOsal_H */
diff --git a/cpu/ixp/npe/include/IxOsalAssert.h b/cpu/ixp/npe/include/IxOsalAssert.h
new file mode 100644
index 0000000000..45cebcdaa6
--- /dev/null
+++ b/cpu/ixp/npe/include/IxOsalAssert.h
@@ -0,0 +1,81 @@
+/*
+ * @file IxOsalAssert.h
+ * @author Intel Corporation
+ * @date 25-08-2004
+ *
+ * @brief description goes here
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+#ifndef IX_OSAL_ASSERT_H
+#define IX_OSAL_ASSERT_H
+
+/*
+ * Put the system defined include files required
+ * @par
+ * <TAGGED>
+ */
+
+#include "IxOsalOsAssert.h"
+
+/**
+ * @brief Assert macro, assert the condition is true. This
+ * will not be compiled out.
+ * N.B. will result in a system crash if it is false.
+ */
+#define IX_OSAL_ASSERT(c) IX_OSAL_OS_ASSERT(c)
+
+
+/**
+ * @brief Ensure macro, ensure the condition is true.
+ * This will be conditionally compiled out and
+ * may be used for test purposes.
+ */
+#ifdef IX_OSAL_ENSURE_ON
+#define IX_OSAL_ENSURE(c, str) do { \
+if (!(c)) ixOsalLog (IX_OSAL_LOG_LVL_MESSAGE, IX_OSAL_LOG_DEV_STDOUT, str, \
+0, 0, 0, 0, 0, 0); } while (0)
+
+#else
+#define IX_OSAL_ENSURE(c, str)
+#endif
+
+
+#endif /* IX_OSAL_ASSERT_H */
diff --git a/cpu/ixp/npe/include/IxOsalBackward.h b/cpu/ixp/npe/include/IxOsalBackward.h
new file mode 100644
index 0000000000..ea9f30731a
--- /dev/null
+++ b/cpu/ixp/npe/include/IxOsalBackward.h
@@ -0,0 +1,65 @@
+/**
+ * This file is intended to provide backward
+ * compatibility for main osService/OSSL
+ * APIs.
+ *
+ * It shall be phased out gradually and users
+ * are strongly recommended to use IX_OSAL API.
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+#ifndef IX_OSAL_BACKWARD_H
+#define IX_OSAL_BACKWARD_H
+
+#include "IxOsal.h"
+
+#include "IxOsalBackwardCacheMMU.h"
+
+#include "IxOsalBackwardOsServices.h"
+
+#include "IxOsalBackwardMemMap.h"
+
+#include "IxOsalBackwardBufferMgt.h"
+
+#include "IxOsalBackwardOssl.h"
+
+#include "IxOsalBackwardAssert.h"
+
+#endif /* IX_OSAL_BACKWARD_H */
diff --git a/cpu/ixp/npe/include/IxOsalBackwardAssert.h b/cpu/ixp/npe/include/IxOsalBackwardAssert.h
new file mode 100644
index 0000000000..be1e27255d
--- /dev/null
+++ b/cpu/ixp/npe/include/IxOsalBackwardAssert.h
@@ -0,0 +1,54 @@
+/**
+ * This file is intended to provide backward
+ * compatibility for main osService/OSSL
+ * APIs.
+ *
+ * It shall be phased out gradually and users
+ * are strongly recommended to use IX_OSAL API.
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+#ifndef IX_OSAL_BACKWARD_ASSERT_H
+#define IX_OSAL_BACKWARD_ASSERT_H
+
+#define IX_ENSURE(c, str) IX_OSAL_ENSURE(c, str)
+#define IX_ASSERT(c) IX_OSAL_ASSERT(c)
+
+#endif /* IX_OSAL_BACKWARD_ASSERT_H */
diff --git a/cpu/ixp/npe/include/IxOsalBackwardBufferMgt.h b/cpu/ixp/npe/include/IxOsalBackwardBufferMgt.h
new file mode 100644
index 0000000000..5ac3f0cac0
--- /dev/null
+++ b/cpu/ixp/npe/include/IxOsalBackwardBufferMgt.h
@@ -0,0 +1,159 @@
+/**
+ * This file is intended to provide backward
+ * compatibility for main osService/OSSL
+ * APIs.
+ *
+ * It shall be phased out gradually and users
+ * are strongly recommended to use IX_OSAL API.
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+#ifndef IX_OSAL_BACKWARD_BUFFER_MGT_H
+#define IX_OSAL_BACKWARD_BUFFER_MGT_H
+
+typedef IX_OSAL_MBUF IX_MBUF;
+
+typedef IX_OSAL_MBUF_POOL IX_MBUF_POOL;
+
+
+#define IX_MBUF_NEXT_BUFFER_IN_PKT_PTR(m_blk_ptr) \
+ IX_OSAL_MBUF_NEXT_BUFFER_IN_PKT_PTR(m_blk_ptr)
+
+
+#define IX_MBUF_NEXT_PKT_IN_CHAIN_PTR(m_blk_ptr) \
+ IX_OSAL_MBUF_NEXT_PKT_IN_CHAIN_PTR(m_blk_ptr)
+
+
+#define IX_MBUF_MDATA(m_blk_ptr) \
+ IX_OSAL_MBUF_MDATA(m_blk_ptr)
+
+
+#define IX_MBUF_MLEN(m_blk_ptr) \
+ IX_OSAL_MBUF_MLEN(m_blk_ptr)
+
+
+#define IX_MBUF_TYPE(m_blk_ptr) \
+ IX_OSAL_MBUF_MTYPE(m_blk_ptr)
+
+/* Same as IX_MBUF_TYPE */
+#define IX_MBUF_MTYPE(m_blk_ptr) \
+ IX_OSAL_MBUF_MTYPE(m_blk_ptr)
+
+#define IX_MBUF_FLAGS(m_blk_ptr) \
+ IX_OSAL_MBUF_FLAGS(m_blk_ptr)
+
+
+#define IX_MBUF_NET_POOL(m_blk_ptr) \
+ IX_OSAL_MBUF_NET_POOL(m_blk_ptr)
+
+
+#define IX_MBUF_PKT_LEN(m_blk_ptr) \
+ IX_OSAL_MBUF_PKT_LEN(m_blk_ptr)
+
+
+#define IX_MBUF_PRIV(m_blk_ptr) \
+ IX_OSAL_MBUF_PRIV(m_blk_ptr)
+
+
+#define IX_MBUF_ALLOCATED_BUFF_LEN(m_blk_ptr) \
+ IX_OSAL_MBUF_ALLOCATED_BUFF_LEN(m_blk_ptr)
+
+
+#define IX_MBUF_ALLOCATED_BUFF_DATA(m_blk_ptr) \
+ IX_OSAL_MBUF_ALLOCATED_BUFF_DATA(m_blk_ptr)
+
+
+#define IX_MBUF_POOL_SIZE_ALIGN(size) \
+ IX_OSAL_MBUF_POOL_SIZE_ALIGN(size)
+
+
+#define IX_MBUF_POOL_MBUF_AREA_SIZE_ALIGNED(count) \
+ IX_OSAL_MBUF_POOL_MBUF_AREA_SIZE_ALIGNED(count)
+
+
+#define IX_MBUF_POOL_DATA_AREA_SIZE_ALIGNED(count, size) \
+ IX_OSAL_MBUF_POOL_DATA_AREA_SIZE_ALIGNED(count, size)
+
+
+#define IX_MBUF_POOL_MBUF_AREA_ALLOC(count, memAreaSize) \
+ IX_OSAL_MBUF_POOL_MBUF_AREA_ALLOC(count, memAreaSize)
+
+
+#define IX_MBUF_POOL_DATA_AREA_ALLOC(count, size, memAreaSize) \
+ IX_OSAL_MBUF_POOL_DATA_AREA_ALLOC(count, size, memAreaSize)
+
+IX_STATUS
+ixOsalOsIxp400BackwardPoolInit (IX_OSAL_MBUF_POOL ** poolPtrPtr,
+ UINT32 count, UINT32 size, const char *name);
+
+
+/* This one needs extra steps*/
+#define IX_MBUF_POOL_INIT(poolPtr, count, size, name) \
+ ixOsalOsIxp400BackwardPoolInit( poolPtr, count, size, name)
+
+
+#define IX_MBUF_POOL_INIT_NO_ALLOC(poolPtrPtr, bufPtr, dataPtr, count, size, name) \
+ (*poolPtrPtr = IX_OSAL_MBUF_NO_ALLOC_POOL_INIT(bufPtr, dataPtr, count, size, name))
+
+
+IX_STATUS
+ixOsalOsIxp400BackwardMbufPoolGet (IX_OSAL_MBUF_POOL * poolPtr,
+ IX_OSAL_MBUF ** newBufPtrPtr);
+
+#define IX_MBUF_POOL_GET(poolPtr, bufPtrPtr) \
+ ixOsalOsIxp400BackwardMbufPoolGet(poolPtr, bufPtrPtr)
+
+
+#define IX_MBUF_POOL_PUT(bufPtr) \
+ IX_OSAL_MBUF_POOL_PUT(bufPtr)
+
+
+#define IX_MBUF_POOL_PUT_CHAIN(bufPtr) \
+ IX_OSAL_MBUF_POOL_PUT_CHAIN(bufPtr)
+
+
+#define IX_MBUF_POOL_SHOW(poolPtr) \
+ IX_OSAL_MBUF_POOL_SHOW(poolPtr)
+
+
+#define IX_MBUF_POOL_MDATA_RESET(bufPtr) \
+ IX_OSAL_MBUF_POOL_MDATA_RESET(bufPtr)
+
+#endif /* IX_OSAL_BACKWARD_BUFFER_MGT_H */
diff --git a/cpu/ixp/npe/include/IxOsalBackwardCacheMMU.h b/cpu/ixp/npe/include/IxOsalBackwardCacheMMU.h
new file mode 100644
index 0000000000..fe570e6417
--- /dev/null
+++ b/cpu/ixp/npe/include/IxOsalBackwardCacheMMU.h
@@ -0,0 +1,69 @@
+/**
+ * This file is intended to provide backward
+ * compatibility for main osService/OSSL
+ * APIs.
+ *
+ * It shall be phased out gradually and users
+ * are strongly recommended to use IX_OSAL API.
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+#ifndef IX_OSAL_BACKWARD_CACHE_MMU_H
+#define IX_OSAL_BACKWARD_CACHE_MMU_H
+
+#ifdef IX_OSAL_CACHED
+#define IX_ACC_CACHE_ENABLED
+#endif
+
+#define IX_XSCALE_CACHE_LINE_SIZE IX_OSAL_CACHE_LINE_SIZE
+
+#define IX_ACC_DRV_DMA_MALLOC(size) IX_OSAL_CACHE_DMA_MALLOC(size)
+
+#define IX_ACC_DRV_DMA_FREE(ptr,size) IX_OSAL_CACHE_DMA_FREE(ptr)
+
+#define IX_MMU_VIRTUAL_TO_PHYSICAL_TRANSLATION(addr) IX_OSAL_MMU_VIRT_TO_PHYS(addr)
+
+#define IX_MMU_PHYSICAL_TO_VIRTUAL_TRANSLATION(addr) IX_OSAL_MMU_PHYS_TO_VIRT(addr)
+
+#define IX_ACC_DATA_CACHE_INVALIDATE(addr,size) IX_OSAL_CACHE_INVALIDATE(addr, size)
+
+#define IX_ACC_DATA_CACHE_FLUSH(addr,size) IX_OSAL_CACHE_FLUSH(addr,size)
+
+#endif /* IX_OSAL_BACKWARD_CACHE_MMU_H */
diff --git a/cpu/ixp/npe/include/IxOsalBackwardMemMap.h b/cpu/ixp/npe/include/IxOsalBackwardMemMap.h
new file mode 100644
index 0000000000..18f8f24df4
--- /dev/null
+++ b/cpu/ixp/npe/include/IxOsalBackwardMemMap.h
@@ -0,0 +1,141 @@
+/**
+ * This file is intended to provide backward
+ * compatibility for main osService/OSSL
+ * APIs.
+ *
+ * It shall be phased out gradually and users
+ * are strongly recommended to use IX_OSAL API.
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+
+#ifndef IX_OSAL_BACKWARD_MEM_MAP_H
+#define IX_OSAL_BACKWARD_MEM_MAP_H
+
+#include "IxOsal.h"
+
+#define IX_OSSERV_SWAP_LONG(wData) IX_OSAL_SWAP_LONG(wData)
+#define IX_OSSERV_SWAP_SHORT(sData) IX_OSAL_SWAP_SHORT(sData)
+
+#define IX_OSSERV_SWAP_SHORT_ADDRESS(sAddr) IX_OSAL_SWAP_SHORT_ADDRESS(sAddr)
+#define IX_OSSERV_SWAP_BYTE_ADDRESS(bAddr) IX_OSAL_SWAP_BYTE_ADDRESS(bAddr)
+
+#define IX_OSSERV_BE_XSTOBUSL(wData) IX_OSAL_BE_XSTOBUSL(wData)
+#define IX_OSSERV_BE_XSTOBUSS(sData) IX_OSAL_BE_XSTOBUSS(sData)
+#define IX_OSSERV_BE_XSTOBUSB(bData) IX_OSAL_BE_XSTOBUSB(bData)
+#define IX_OSSERV_BE_BUSTOXSL(wData) IX_OSAL_BE_BUSTOXSL(wData)
+#define IX_OSSERV_BE_BUSTOXSS(sData) IX_OSAL_BE_BUSTOXSS(sData)
+#define IX_OSSERV_BE_BUSTOXSB(bData) IX_OSAL_BE_BUSTOXSB(bData)
+
+#define IX_OSSERV_LE_AC_XSTOBUSL(wAddr) IX_OSAL_LE_AC_XSTOBUSL(wAddr)
+#define IX_OSSERV_LE_AC_XSTOBUSS(sAddr) IX_OSAL_LE_AC_XSTOBUSS(sAddr)
+#define IX_OSSERV_LE_AC_XSTOBUSB(bAddr) IX_OSAL_LE_AC_XSTOBUSB(bAddr)
+#define IX_OSSERV_LE_AC_BUSTOXSL(wAddr) IX_OSAL_LE_AC_BUSTOXSL(wAddr)
+#define IX_OSSERV_LE_AC_BUSTOXSS(sAddr) IX_OSAL_LE_AC_BUSTOXSS(sAddr)
+#define IX_OSSERV_LE_AC_BUSTOXSB(bAddr) IX_OSAL_LE_AC_BUSTOXSB(bAddr)
+
+#define IX_OSSERV_LE_DC_XSTOBUSL(wData) IX_OSAL_LE_DC_XSTOBUSL(wData)
+#define IX_OSSERV_LE_DC_XSTOBUSS(sData) IX_OSAL_LE_DC_XSTOBUSS(sData)
+#define IX_OSSERV_LE_DC_XSTOBUSB(bData) IX_OSAL_LE_DC_XSTOBUSB(bData)
+#define IX_OSSERV_LE_DC_BUSTOXSL(wData) IX_OSAL_LE_DC_BUSTOXSL(wData)
+#define IX_OSSERV_LE_DC_BUSTOXSS(sData) IX_OSAL_LE_DC_BUSTOXSS(sData)
+#define IX_OSSERV_LE_DC_BUSTOXSB(bData) IX_OSAL_LE_DC_BUSTOXSB(bData)
+
+#define IX_OSSERV_READ_LONG(wAddr) IX_OSAL_READ_LONG(wAddr)
+#define IX_OSSERV_READ_SHORT(sAddr) IX_OSAL_READ_SHORT(sAddr)
+#define IX_OSSERV_READ_BYTE(bAddr) IX_OSAL_READ_BYTE(bAddr)
+#define IX_OSSERV_WRITE_LONG(wAddr, wData) IX_OSAL_WRITE_LONG(wAddr, wData)
+#define IX_OSSERV_WRITE_SHORT(sAddr, sData) IX_OSAL_WRITE_SHORT(sAddr, sData)
+#define IX_OSSERV_WRITE_BYTE(bAddr, bData) IX_OSAL_WRITE_BYTE(bAddr, bData)
+
+
+#define IX_OSSERV_READ_NPE_SHARED_LONG(wAddr) IX_OSAL_READ_BE_SHARED_LONG(wAddr)
+#define IX_OSSERV_READ_NPE_SHARED_SHORT(sAddr) IX_OSAL_READ_BE_SHARED_SHORT(sAddr)
+#define IX_OSSERV_WRITE_NPE_SHARED_LONG(wAddr, wData) IX_OSAL_WRITE_BE_SHARED_LONG(wAddr, wData)
+#define IX_OSSERV_WRITE_NPE_SHARED_SHORT(sAddr, sData) IX_OSAL_WRITE_BE_SHARED_SHORT(sAddr, sData)
+
+#define IX_OSSERV_SWAP_NPE_SHARED_LONG(wData) IX_OSAL_SWAP_BE_SHARED_LONG(wData)
+#define IX_OSSERV_SWAP_NPE_SHARED_SHORT(sData) IX_OSAL_SWAP_BE_SHARED_SHORT(sData)
+
+
+/* Map osServ address/size */
+#define IX_OSSERV_QMGR_MAP_SIZE IX_OSAL_IXP400_QMGR_MAP_SIZE
+#define IX_OSSERV_EXP_REG_MAP_SIZE IX_OSAL_IXP400_EXP_REG_MAP_SIZE
+#define IX_OSSERV_UART1_MAP_SIZE IX_OSAL_IXP400_UART1_MAP_SIZE
+#define IX_OSSERV_UART2_MAP_SIZE IX_OSAL_IXP400_UART2_MAP_SIZE
+#define IX_OSSERV_PMU_MAP_SIZE IX_OSAL_IXP400_PMU_MAP_SIZE
+#define IX_OSSERV_OSTS_MAP_SIZE IX_OSAL_IXP400_OSTS_MAP_SIZE
+#define IX_OSSERV_NPEA_MAP_SIZE IX_OSAL_IXP400_NPEA_MAP_SIZE
+#define IX_OSSERV_NPEB_MAP_SIZE IX_OSAL_IXP400_NPEB_MAP_SIZE
+#define IX_OSSERV_NPEC_MAP_SIZE IX_OSAL_IXP400_NPEC_MAP_SIZE
+#define IX_OSSERV_ETHA_MAP_SIZE IX_OSAL_IXP400_ETHA_MAP_SIZE
+#define IX_OSSERV_ETHB_MAP_SIZE IX_OSAL_IXP400_ETHB_MAP_SIZE
+#define IX_OSSERV_USB_MAP_SIZE IX_OSAL_IXP400_USB_MAP_SIZE
+#define IX_OSSERV_GPIO_MAP_SIZE IX_OSAL_IXP400_GPIO_MAP_SIZE
+#define IX_OSSERV_EXP_BUS_MAP_SIZE IX_OSAL_IXP400_EXP_BUS_MAP_SIZE
+#define IX_OSSERV_EXP_BUS_CS0_MAP_SIZE IX_OSAL_IXP400_EXP_BUS_CS0_MAP_SIZE
+#define IX_OSSERV_EXP_BUS_CS1_MAP_SIZE IX_OSAL_IXP400_EXP_BUS_CS1_MAP_SIZE
+#define IX_OSSERV_EXP_BUS_CS4_MAP_SIZE IX_OSAL_IXP400_EXP_BUS_CS4_MAP_SIZE
+
+
+#define IX_OSSERV_GPIO_PHYS_BASE IX_OSAL_IXP400_GPIO_PHYS_BASE
+#define IX_OSSERV_UART1_PHYS_BASE IX_OSAL_IXP400_UART1_PHYS_BASE
+#define IX_OSSERV_UART2_PHYS_BASE IX_OSAL_IXP400_UART2_PHYS_BASE
+#define IX_OSSERV_ETHA_PHYS_BASE IX_OSAL_IXP400_ETHA_PHYS_BASE
+#define IX_OSSERV_ETHB_PHYS_BASE IX_OSAL_IXP400_ETHB_PHYS_BASE
+#define IX_OSSERV_NPEA_PHYS_BASE IX_OSAL_IXP400_NPEA_PHYS_BASE
+#define IX_OSSERV_NPEB_PHYS_BASE IX_OSAL_IXP400_NPEB_PHYS_BASE
+#define IX_OSSERV_NPEC_PHYS_BASE IX_OSAL_IXP400_NPEC_PHYS_BASE
+#define IX_OSSERV_PERIPHERAL_PHYS_BASE IX_OSAL_IXP400_PERIPHERAL_PHYS_BASE
+#define IX_OSSERV_QMGR_PHYS_BASE IX_OSAL_IXP400_QMGR_PHYS_BASE
+#define IX_OSSERV_OSTS_PHYS_BASE IX_OSAL_IXP400_OSTS_PHYS_BASE
+#define IX_OSSERV_USB_PHYS_BASE IX_OSAL_IXP400_USB_PHYS_BASE
+#define IX_OSSERV_EXP_BUS_PHYS_BASE IX_OSAL_IXP400_EXP_BUS_PHYS_BASE
+#define IX_OSSERV_EXP_BUS_BOOT_PHYS_BASE IX_OSAL_IXP400_EXP_BUS_BOOT_PHYS_BASE
+#define IX_OSSERV_EXP_BUS_CS0_PHYS_BASE IX_OSAL_IXP400_EXP_BUS_CS0_PHYS_BASE
+#define IX_OSSERV_EXP_BUS_CS1_PHYS_BASE IX_OSAL_IXP400_EXP_BUS_CS1_PHYS_BASE
+#define IX_OSSERV_EXP_BUS_CS4_PHYS_BASE IX_OSAL_IXP400_EXP_BUS_CS4_PHYS_BASE
+#define IX_OSSERV_EXP_BUS_REGS_PHYS_BASE IX_OSAL_IXP400_EXP_BUS_REGS_PHYS_BASE
+
+#define IX_OSSERV_MEM_MAP(physAddr, size) IX_OSAL_MEM_MAP(physAddr, size)
+
+#define IX_OSSERV_MEM_UNMAP(virtAddr) IX_OSAL_MEM_UNMAP(virtAddr)
+
+#endif /* IX_OSAL_BACKWARD_MEM_MAP_H */
diff --git a/cpu/ixp/npe/include/IxOsalBackwardOsServices.h b/cpu/ixp/npe/include/IxOsalBackwardOsServices.h
new file mode 100644
index 0000000000..0ccff84aee
--- /dev/null
+++ b/cpu/ixp/npe/include/IxOsalBackwardOsServices.h
@@ -0,0 +1,125 @@
+/**
+ * This file is intended to provide backward
+ * compatibility for main osService/OSSL
+ * APIs.
+ *
+ * It shall be phased out gradually and users
+ * are strongly recommended to use IX_OSAL API.
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+#ifndef IX_OSAL_BACKWARD_OSSERVICES_H
+#define IX_OSAL_BACKWARD_OSSERVICES_H
+
+#ifndef __vxworks
+typedef UINT32 IX_IRQ_STATUS;
+#else
+typedef int IX_IRQ_STATUS;
+#endif
+
+typedef IxOsalMutex IxMutex;
+
+typedef IxOsalFastMutex IxFastMutex;
+
+typedef IxOsalVoidFnVoidPtr IxVoidFnVoidPtr;
+
+typedef IxOsalVoidFnPtr IxVoidFnPtr;
+
+
+#define LOG_NONE IX_OSAL_LOG_LVL_NONE
+#define LOG_USER IX_OSAL_LOG_LVL_USER
+#define LOG_FATAL IX_OSAL_LOG_LVL_FATAL
+#define LOG_ERROR IX_OSAL_LOG_LVL_ERROR
+#define LOG_WARNING IX_OSAL_LOG_LVL_WARNING
+#define LOG_MESSAGE IX_OSAL_LOG_LVL_MESSAGE
+#define LOG_DEBUG1 IX_OSAL_LOG_LVL_DEBUG1
+#define LOG_DEBUG2 IX_OSAL_LOG_LVL_DEBUG2
+#define LOG_DEBUG3 IX_OSAL_LOG_LVL_DEBUG3
+#ifndef __vxworks
+#define LOG_ALL IX_OSAL_LOG_LVL_ALL
+#endif
+
+PUBLIC IX_STATUS
+ixOsServIntBind (int level, void (*routine) (void *), void *parameter);
+
+PUBLIC IX_STATUS ixOsServIntUnbind (int level);
+
+
+PUBLIC int ixOsServIntLock (void);
+
+PUBLIC void ixOsServIntUnlock (int lockKey);
+
+
+PUBLIC int ixOsServIntLevelSet (int level);
+
+PUBLIC IX_STATUS ixOsServMutexInit (IxMutex * mutex);
+
+PUBLIC IX_STATUS ixOsServMutexLock (IxMutex * mutex);
+
+PUBLIC IX_STATUS ixOsServMutexUnlock (IxMutex * mutex);
+
+PUBLIC IX_STATUS ixOsServMutexDestroy (IxMutex * mutex);
+
+PUBLIC IX_STATUS ixOsServFastMutexInit (IxFastMutex * mutex);
+
+PUBLIC IX_STATUS ixOsServFastMutexTryLock (IxFastMutex * mutex);
+
+PUBLIC IX_STATUS ixOsServFastMutexUnlock (IxFastMutex * mutex);
+
+PUBLIC int
+ixOsServLog (int level, char *format, int arg1, int arg2, int arg3, int arg4,
+ int arg5, int arg6);
+
+
+PUBLIC int ixOsServLogLevelSet (int level);
+
+PUBLIC void ixOsServSleep (int microseconds);
+
+PUBLIC void ixOsServTaskSleep (int milliseconds);
+
+PUBLIC unsigned int ixOsServTimestampGet (void);
+
+
+PUBLIC void ixOsServUnload (void);
+
+PUBLIC void ixOsServYield (void);
+
+#endif
+/* IX_OSAL_BACKWARD_OSSERVICES_H */
diff --git a/cpu/ixp/npe/include/IxOsalBackwardOssl.h b/cpu/ixp/npe/include/IxOsalBackwardOssl.h
new file mode 100644
index 0000000000..634b494aec
--- /dev/null
+++ b/cpu/ixp/npe/include/IxOsalBackwardOssl.h
@@ -0,0 +1,272 @@
+/**
+ * This file is intended to provide backward
+ * compatibility for main osService/OSSL
+ * APIs.
+ *
+ * It shall be phased out gradually and users
+ * are strongly recommended to use IX_OSAL API.
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+#ifndef IX_OSAL_BACKWARD_OSSL_H
+#define IX_OSAL_BACKWARD_OSSL_H
+
+
+typedef IxOsalThread ix_ossl_thread_t;
+
+typedef IxOsalSemaphore ix_ossl_sem_t;
+
+typedef IxOsalMutex ix_ossl_mutex_t;
+
+typedef IxOsalTimeval ix_ossl_time_t;
+
+
+/* Map sub-fields for ix_ossl_time_t */
+#define tv_sec secs
+#define tv_nec nsecs
+
+
+typedef IX_STATUS ix_error;
+
+typedef UINT32 ix_ossl_thread_priority;
+
+typedef UINT32 ix_uint32;
+
+
+#define IX_OSSL_ERROR_SUCCESS IX_SUCCESS
+
+#define IX_ERROR_SUCCESS IX_SUCCESS
+
+
+typedef enum
+{
+ IX_OSSL_SEM_UNAVAILABLE = 0,
+ IX_OSSL_SEM_AVAILABLE
+} ix_ossl_sem_state;
+
+
+typedef enum
+{
+ IX_OSSL_MUTEX_UNLOCK = 0,
+ IX_OSSL_MUTEX_LOCK
+} ix_ossl_mutex_state;
+
+
+typedef IxOsalVoidFnVoidPtr ix_ossl_thread_entry_point_t;
+
+
+#define IX_OSSL_THREAD_PRI_HIGH 90
+#define IX_OSSL_THREAD_PRI_MEDIUM 160
+#define IX_OSSL_THREAD_PRI_LOW 240
+
+
+#define IX_OSSL_WAIT_FOREVER IX_OSAL_WAIT_FOREVER
+
+#define IX_OSSL_WAIT_NONE IX_OSAL_WAIT_NONE
+
+#define BILLION IX_OSAL_BILLION
+
+#define IX_OSSL_TIME_EQ(a,b) IX_OSAL_TIME_EQ(a,b)
+
+#define IX_OSSL_TIME_GT(a,b) IX_OSAL_TIME_GT(a,b)
+
+#define IX_OSSL_TIME_LT(a,b) IX_OSAL_TIME_LT(a,b)
+
+#define IX_OSSL_TIME_ADD(a,b) IX_OSAL_TIME_ADD(a,b)
+
+#define IX_OSSL_TIME_SUB(a,b) IX_OSAL_TIME_SUB(a,b)
+
+
+/* a is tick, b is timeval */
+#define IX_OSSL_TIME_CONVERT_TO_TICK(a,b) \
+ (a) = IX_OSAL_TIMEVAL_TO_TICKS(b)
+
+
+
+
+PUBLIC IX_STATUS
+ixOsalOsIxp400BackwardOsslThreadCreate (IxOsalVoidFnVoidPtr entryPoint,
+ void *arg, IxOsalThread * ptrThread);
+
+#define ix_ossl_thread_create(entryPoint, arg, ptrTid) \
+ ixOsalOsIxp400BackwardOsslThreadCreate(entryPoint, arg, ptrTid)
+
+
+/* void ix_ossl_thread_exit(ix_error retError, void* retObj) */
+#define ix_ossl_thread_exit(retError, retObj) \
+ ixOsalThreadExit()
+
+
+PUBLIC IX_STATUS ixOsalOsIxp400BackwardOsslThreadKill (IxOsalThread tid);
+
+/* ix_error ix_ossl_thread_kill(tid) */
+#define ix_ossl_thread_kill(tid) \
+ ixOsalOsIxp400BackwardOsslThreadKill(tid)
+
+
+PUBLIC IX_STATUS
+ixOsalOsIxp400BackwardOsslThreadSetPriority (IxOsalThread tid,
+ UINT32 priority);
+
+
+/*
+ * ix_error ix_ossl_thread_set_priority(ix_ossl_thread_t tid,
+ * ix_ossl_thread_priority priority
+ * );
+ */
+
+#define ix_ossl_thread_set_priority(tid, priority) \
+ ixOsalOsIxp400BackwardOsslThreadSetPriority(tid, priority)
+
+
+PUBLIC IX_STATUS ixOsalOsIxp400BackwardOsslTickGet (int *pticks);
+
+#define ix_ossl_tick_get(pticks) \
+ ixOsalOsIxp400BackwardOsslTickGet(pticks)
+
+PUBLIC IX_STATUS ixOsalOsIxp400BackwardOsslThreadDelay (int ticks);
+
+#define ix_ossl_thread_delay(ticks) ixOsalOsIxp400BackwardOsslThreadDelay(ticks)
+
+
+
+/* ix_error ix_ossl_sem_init(int start_value, ix_ossl_sem_t* sid); */
+/* Note sid is a pointer to semaphore */
+#define ix_ossl_sem_init(value, sid) \
+ ixOsalSemaphoreInit(sid, value)
+
+
+PUBLIC IX_STATUS
+ixOsalOsIxp400BackwardOsslSemaphoreWait (IxOsalSemaphore semaphore,
+ INT32 timeout);
+
+
+/*
+ix_error ix_ossl_sem_take(
+ ix_ossl_sem_t sid,
+ ix_uint32 timeout
+ );
+*/
+
+#define ix_ossl_sem_take( sid, timeout) \
+ ixOsalOsIxp400BackwardOsslSemaphoreWait(sid, timeout)
+
+
+
+PUBLIC IX_STATUS
+ixOsalOsIxp400BackwardOsslSemaphorePost (IxOsalSemaphore sid);
+
+/*ix_error ix_ossl_sem_give(ix_ossl_sem_t sid); */
+#define ix_ossl_sem_give(sid) \
+ ixOsalOsIxp400BackwardOsslSemaphorePost(sid);
+
+
+PUBLIC IX_STATUS ixOsalOsIxp400BackwardSemaphoreDestroy (IxOsalSemaphore sid);
+
+#define ix_ossl_sem_fini(sid) \
+ ixOsalOsIxp400BackwardSemaphoreDestroy(sid)
+
+
+PUBLIC IX_STATUS
+ixOsalOsIxp400BackwardOsslMutexInit (ix_ossl_mutex_state start_state,
+ IxOsalMutex * pMutex);
+
+
+/* ix_error ix_ossl_mutex_init(ix_ossl_mutex_state start_state, ix_ossl_mutex_t* mid); */
+#define ix_ossl_mutex_init(start_state, pMutex) \
+ ixOsalOsIxp400BackwardOsslMutexInit(start_state, pMutex)
+
+
+PUBLIC IX_STATUS
+ixOsalOsIxp400BackwardOsslMutexLock (IxOsalMutex mid, INT32 timeout);
+
+/*
+ix_error ix_ossl_mutex_lock(
+ ix_ossl_mutex_t mid,
+ ix_uint32 timeout
+ );
+*/
+#define ix_ossl_mutex_lock(mid, timeout) \
+ ixOsalOsIxp400BackwardOsslMutexLock(mid, timout)
+
+
+PUBLIC IX_STATUS ixOsalOsIxp400BackwardOsslMutexUnlock (IxOsalMutex mid);
+
+/* ix_error ix_ossl_mutex_unlock(ix_ossl_mutex_t mid); */
+#define ix_ossl_mutex_unlock(mid) \
+ ixOsalOsIxp400BackwardOsslMutexUnlock(mid)
+
+PUBLIC IX_STATUS ixOsalOsIxp400BackwardOsslMutexDestroy (IxOsalMutex mid);
+
+#define ix_ossl_mutex_fini(mid) \
+ ixOsalOsIxp400BackwardOsslMutexDestroy(mid);
+
+#define ix_ossl_sleep(sleeptime_ms) \
+ ixOsalSleep(sleeptime_ms)
+
+PUBLIC IX_STATUS ixOsalOsIxp400BackwardOsslSleepTick (UINT32 ticks);
+
+#define ix_ossl_sleep_tick(sleeptime_ticks) \
+ ixOsalOsIxp400BackwardOsslSleepTick(sleeptime_ticks)
+
+
+PUBLIC IX_STATUS ixOsalOsIxp400BackwardOsslTimeGet (IxOsalTimeval * pTv);
+
+#define ix_ossl_time_get(pTv) \
+ ixOsalOsIxp400BackwardOsslTimeGet(pTv)
+
+
+typedef UINT32 ix_ossl_size_t;
+
+#define ix_ossl_malloc(arg_size) \
+ ixOsalMemAlloc(arg_size)
+
+#define ix_ossl_free(arg_pMemory) \
+ ixOsalMemFree(arg_pMemory)
+
+
+#define ix_ossl_memcpy(arg_pDest, arg_pSrc,arg_Count) \
+ ixOsalMemCopy(arg_pDest, arg_pSrc,arg_Count)
+
+#define ix_ossl_memset(arg_pDest, arg_pChar, arg_Count) \
+ ixOsalMemSet(arg_pDest, arg_pChar, arg_Count)
+
+
+#endif /* IX_OSAL_BACKWARD_OSSL_H */
diff --git a/cpu/ixp/npe/include/IxOsalBufferMgt.h b/cpu/ixp/npe/include/IxOsalBufferMgt.h
new file mode 100644
index 0000000000..497ed04710
--- /dev/null
+++ b/cpu/ixp/npe/include/IxOsalBufferMgt.h
@@ -0,0 +1,621 @@
+/**
+ * @file IxOsalBufferMgt.h
+ *
+ * @brief OSAL Buffer pool management and buffer management definitions.
+ *
+ * Design Notes:
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+/* @par
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 1979, 1980, 1983, 1986, 1988, 1989, 1991, 1992, 1993, 1994
+ * The Regents of the University of California. All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+#ifndef IxOsalBufferMgt_H
+#define IxOsalBufferMgt_H
+
+#include "IxOsal.h"
+/**
+ * @defgroup IxOsalBufferMgt OSAL Buffer Management Module.
+ *
+ * @brief Buffer management module for IxOsal
+ *
+ * @{
+ */
+
+/**
+ * @ingroup IxOsalBufferMgt
+ *
+ * @def IX_OSAL_MBUF_MAX_POOLS
+ *
+ * @brief The maximum number of pools that can be allocated, must be
+ * a multiple of 32 as required by implementation logic.
+ * @note This can safely be increased if more pools are required.
+ */
+#define IX_OSAL_MBUF_MAX_POOLS 32
+
+/**
+ * @ingroup IxOsalBufferMgt
+ *
+ * @def IX_OSAL_MBUF_POOL_NAME_LEN
+ *
+ * @brief The maximum string length of the pool name
+ */
+#define IX_OSAL_MBUF_POOL_NAME_LEN 64
+
+
+
+/**
+ * Define IX_OSAL_MBUF
+ */
+
+
+/* forward declaration of internal structure */
+struct __IXP_BUF;
+
+/*
+ * OS can define it in IxOsalOs.h to skip the following
+ * definition.
+ */
+#ifndef IX_OSAL_ATTRIBUTE_ALIGN32
+#define IX_OSAL_ATTRIBUTE_ALIGN32 __attribute__ ((aligned(32)))
+#endif
+
+/* release v1.4 backward compatible definitions */
+struct __IX_MBUF
+{
+ struct __IXP_BUF *ix_next IX_OSAL_ATTRIBUTE_ALIGN32;
+ struct __IXP_BUF *ix_nextPacket;
+ UINT8 *ix_data;
+ UINT32 ix_len;
+ unsigned char ix_type;
+ unsigned char ix_flags;
+ unsigned short ix_reserved;
+ UINT32 ix_rsvd;
+ UINT32 ix_PktLen;
+ void *ix_priv;
+};
+
+struct __IX_CTRL
+{
+ UINT32 ix_reserved[2]; /**< Reserved field */
+ UINT32 ix_signature; /**< Field to indicate if buffers are allocated by the system */
+ UINT32 ix_allocated_len; /**< Allocated buffer length */
+ UINT32 ix_allocated_data; /**< Allocated buffer data pointer */
+ void *ix_pool; /**< pointer to the buffer pool */
+ struct __IXP_BUF *ix_chain; /**< chaining */
+ void *ix_osbuf_ptr; /**< Storage for OS-specific buffer pointer */
+};
+
+struct __IX_NE_SHARED
+{
+ UINT32 reserved[8] IX_OSAL_ATTRIBUTE_ALIGN32; /**< Reserved area for NPE Service-specific usage */
+};
+
+
+/*
+ * IXP buffer structure
+ */
+typedef struct __IXP_BUF
+{
+ struct __IX_MBUF ix_mbuf IX_OSAL_ATTRIBUTE_ALIGN32; /**< buffer header */
+ struct __IX_CTRL ix_ctrl; /**< buffer management */
+ struct __IX_NE_SHARED ix_ne; /**< Reserved area for NPE Service-specific usage*/
+} IXP_BUF;
+
+
+
+/**
+ * @ingroup IxOsalBufferMgt
+ *
+ * @def typedef IX_OSAL_MBUF
+ *
+ * @brief Generic IXP mbuf format.
+ */
+typedef IXP_BUF IX_OSAL_MBUF;
+
+
+/**
+ * @ingroup IxOsalBufferMgt
+ *
+ * @def IX_OSAL_IXP_NEXT_BUFFER_IN_PKT_PTR(m_blk_ptr)
+ *
+ * @brief Return pointer to the next mbuf in a single packet
+ */
+#define IX_OSAL_MBUF_NEXT_BUFFER_IN_PKT_PTR(m_blk_ptr) \
+ (m_blk_ptr)->ix_mbuf.ix_next
+
+
+/**
+ * @ingroup IxOsalBufferMgt
+ *
+ * @def IX_OSAL_MBUF_NEXT_PKT_IN_CHAIN_PTR(m_blk_ptr)
+ *
+ * @brief Return pointer to the next packet in the chain
+ */
+#define IX_OSAL_MBUF_NEXT_PKT_IN_CHAIN_PTR(m_blk_ptr) \
+ (m_blk_ptr)->ix_mbuf.ix_nextPacket
+
+
+/**
+ * @ingroup IxOsalBufferMgt
+ *
+ * @def IX_OSAL_MBUF_MDATA(m_blk_ptr)
+ *
+ * @brief Return pointer to the data in the mbuf
+ */
+#define IX_OSAL_MBUF_MDATA(m_blk_ptr) (m_blk_ptr)->ix_mbuf.ix_data
+
+/**
+ * @ingroup IxOsalBufferMgt
+ *
+ * @def IX_OSAL_MBUF_MLEN(m_blk_ptr)
+ *
+ * @brief Return the data length
+ */
+#define IX_OSAL_MBUF_MLEN(m_blk_ptr) \
+ (m_blk_ptr)->ix_mbuf.ix_len
+
+/**
+ * @ingroup IxOsalBufferMgt
+ *
+ * @def IX_OSAL_MBUF_MTYPE(m_blk_ptr)
+ *
+ * @brief Return the data type in the mbuf
+ */
+#define IX_OSAL_MBUF_MTYPE(m_blk_ptr) \
+ (m_blk_ptr)->ix_mbuf.ix_type
+
+
+/**
+ * @ingroup IxOsalBufferMgt
+ *
+ * @def IX_OSAL_MBUF_FLAGS(m_blk_ptr)
+ *
+ * @brief Return the buffer flags
+ */
+#define IX_OSAL_MBUF_FLAGS(m_blk_ptr) \
+ (m_blk_ptr)->ix_mbuf.ix_flags
+
+
+/**
+ * @ingroup IxOsalBufferMgt
+ *
+ * @def IX_OSAL_MBUF_NET_POOL(m_blk_ptr)
+ *
+ * @brief Return pointer to a network pool
+ */
+#define IX_OSAL_MBUF_NET_POOL(m_blk_ptr) \
+ (m_blk_ptr)->ix_ctrl.ix_pool
+
+
+
+/**
+ * @ingroup IxOsalBufferMgt
+ *
+ * @def IX_OSAL_MBUF_PKT_LEN(m_blk_ptr)
+ *
+ * @brief Return the total length of all the data in
+ * the mbuf chain for this packet
+ */
+#define IX_OSAL_MBUF_PKT_LEN(m_blk_ptr) \
+ (m_blk_ptr)->ix_mbuf.ix_PktLen
+
+
+
+
+/**
+ * @ingroup IxOsalBufferMgt
+ *
+ * @def IX_OSAL_MBUF_PRIV(m_blk_ptr)
+ *
+ * @brief Return the private field
+ */
+#define IX_OSAL_MBUF_PRIV(m_blk_ptr) \
+ (m_blk_ptr)->ix_mbuf.ix_priv
+
+
+
+/**
+ * @ingroup IxOsalBufferMgt
+ *
+ * @def IX_OSAL_MBUF_SIGNATURE(m_blk_ptr)
+ *
+ * @brief Return the signature field of IX_OSAL_MBUF
+ */
+#define IX_OSAL_MBUF_SIGNATURE(m_blk_ptr) \
+ (m_blk_ptr)->ix_ctrl.ix_signature
+
+
+/**
+ * @ingroup IxOsalBufferMgt
+ *
+ * @def IX_OSAL_MBUF_OSBUF_PTR(m_blk_ptr)
+ *
+ * @brief Return ix_osbuf_ptr field of IX_OSAL_MBUF, which is used to store OS-specific buffer pointer during a buffer conversion.
+ */
+#define IX_OSAL_MBUF_OSBUF_PTR(m_blk_ptr) \
+ (m_blk_ptr)->ix_ctrl.ix_osbuf_ptr
+
+
+/**
+ * @ingroup IxOsalBufferMgt
+ *
+ * @def IX_OSAL_MBUF_ALLOCATED_BUFF_LEN(m_blk_ptr)
+ *
+ * @brief Return the allocated buffer size
+ */
+#define IX_OSAL_MBUF_ALLOCATED_BUFF_LEN(m_blk_ptr) \
+ (m_blk_ptr)->ix_ctrl.ix_allocated_len
+
+/**
+ * @ingroup IxOsalBufferMgt
+ *
+ * @def IX_OSAL_MBUF_ALLOCATED_BUFF_DATA(m_blk_ptr)
+ *
+ * @brief Return the allocated buffer pointer
+ */
+#define IX_OSAL_MBUF_ALLOCATED_BUFF_DATA(m_blk_ptr) \
+ (m_blk_ptr)->ix_ctrl.ix_allocated_data
+
+
+
+/* Name length */
+#define IX_OSAL_MBUF_POOL_NAME_LEN 64
+
+
+/****************************************************
+ * Macros for buffer pool management
+ ****************************************************/
+
+/**
+ * @ingroup IxOsalBufferMgt
+ *
+ * @def IX_OSAL_MBUF_POOL_FREE_COUNT(m_pool_ptr
+ *
+ * @brief Return the total number of freed buffers left in the pool.
+ */
+#define IX_OSAL_MBUF_POOL_FREE_COUNT(m_pool_ptr) \
+ ixOsalBuffPoolFreeCountGet(m_pool_ptr)
+
+/**
+ * @ingroup IxOsalBufferMgt
+ *
+ * @def IX_OSAL_MBUF_POOL_SIZE_ALIGN
+ *
+ * @brief This macro takes an integer as an argument and
+ * rounds it up to be a multiple of the memory cache-line
+ * size.
+ *
+ * @param int [in] size - the size integer to be rounded up
+ *
+ * @return int - the size, rounded up to a multiple of
+ * the cache-line size
+ */
+#define IX_OSAL_MBUF_POOL_SIZE_ALIGN(size) \
+ ((((size) + (IX_OSAL_CACHE_LINE_SIZE - 1)) / \
+ IX_OSAL_CACHE_LINE_SIZE) * \
+ IX_OSAL_CACHE_LINE_SIZE)
+
+/* Don't use this directly, use macro */
+PUBLIC UINT32 ixOsalBuffPoolMbufAreaSizeGet (int count);
+
+
+/**
+ * @ingroup IxOsalBufferMgt
+ *
+ * @def IX_OSAL_MBUF_POOL_MBUF_AREA_SIZE_ALIGNED
+ *
+ * @brief This macro calculates, from the number of mbufs required, the
+ * size of the memory area required to contain the mbuf headers for the
+ * buffers in the pool. The size to be used for each mbuf header is
+ * rounded up to a multiple of the cache-line size, to ensure
+ * each mbuf header aligns on a cache-line boundary.
+ * This macro is used by IX_OSAL_MBUF_POOL_MBUF_AREA_ALLOC()
+ *
+ * @param int [in] count - the number of buffers the pool will contain
+ *
+ * @return int - the total size required for the pool mbuf area (aligned)
+ */
+#define IX_OSAL_MBUF_POOL_MBUF_AREA_SIZE_ALIGNED(count) \
+ ixOsalBuffPoolMbufAreaSizeGet(count)
+
+
+/* Don't use this directly, use macro */
+PUBLIC UINT32 ixOsalBuffPoolDataAreaSizeGet (int count, int size);
+
+
+/**
+ * @ingroup IxOsalBufferMgt
+ *
+ * @def IX_OSAL_MBUF_POOL_DATA_AREA_SIZE_ALIGNED
+ *
+ * @brief This macro calculates, from the number of mbufs required and the
+ * size of the data portion for each mbuf, the size of the data memory area
+ * required. The size is adjusted to ensure alignment on cache line boundaries.
+ * This macro is used by IX_OSAL_MBUF_POOL_DATA_AREA_ALLOC()
+ *
+ *
+ * @param int [in] count - The number of mbufs in the pool.
+ * @param int [in] size - The desired size for each mbuf data portion.
+ * This size will be rounded up to a multiple of the
+ * cache-line size to ensure alignment on cache-line
+ * boundaries for each data block.
+ *
+ * @return int - the total size required for the pool data area (aligned)
+ */
+#define IX_OSAL_MBUF_POOL_DATA_AREA_SIZE_ALIGNED(count, size) \
+ ixOsalBuffPoolDataAreaSizeGet((count), (size))
+
+
+/**
+ * @ingroup IxOsalBufferMgt
+ *
+ * @def IX_OSAL_MBUF_POOL_MBUF_AREA_ALLOC
+ *
+ * @brief Allocates the memory area needed for the number of mbuf headers
+ * specified by <i>count</i>.
+ * This macro ensures the mbuf headers align on cache line boundaries.
+ * This macro evaluates to a pointer to the memory allocated.
+ *
+ * @param int [in] count - the number of mbufs the pool will contain
+ * @param int [out] memAreaSize - the total amount of memory allocated
+ *
+ * @return void * - a pointer to the allocated memory area
+ */
+#define IX_OSAL_MBUF_POOL_MBUF_AREA_ALLOC(count, memAreaSize) \
+ IX_OSAL_CACHE_DMA_MALLOC((memAreaSize = \
+ IX_OSAL_MBUF_POOL_MBUF_AREA_SIZE_ALIGNED(count)))
+
+/**
+ * @ingroup IxOsalBufferMgt
+ *
+ * @def IX_OSAL_MBUF_POOL_DATA_AREA_ALLOC
+ *
+ * @brief Allocates the memory pool for the data portion of the pool mbufs.
+ * The number of mbufs is specified by <i>count</i>. The size of the data
+ * portion of each mbuf is specified by <i>size</i>.
+ * This macro ensures the mbufs are aligned on cache line boundaries
+ * This macro evaluates to a pointer to the memory allocated.
+ *
+ * @param int [in] count - the number of mbufs the pool will contain
+ * @param int [in] size - the desired size (in bytes) required for the data
+ * portion of each mbuf. Note that this size may be
+ * rounded up to ensure alignment on cache-line
+ * boundaries.
+ * @param int [out] memAreaSize - the total amount of memory allocated
+ *
+ * @return void * - a pointer to the allocated memory area
+ */
+#define IX_OSAL_MBUF_POOL_DATA_AREA_ALLOC(count, size, memAreaSize) \
+ IX_OSAL_CACHE_DMA_MALLOC((memAreaSize = \
+ IX_OSAL_MBUF_POOL_DATA_AREA_SIZE_ALIGNED(count,size)))
+
+
+
+/**
+ * @ingroup IxOsalBufferMgt
+ *
+ * @def IX_OSAL_MBUF_POOL_INIT
+ *
+ * @brief Wrapper macro for ixOsalPoolInit()
+ * See function description below for details.
+ */
+#define IX_OSAL_MBUF_POOL_INIT(count, size, name) \
+ ixOsalPoolInit((count), (size), (name))
+
+/**
+ * @ingroup IxOsalBufferMgt
+ *
+ * @def IX_OSAL_MBUF_NO_ALLOC_POOL_INIT
+ *
+ * @return Pointer to the new pool or NULL if the initialization failed.
+ *
+ * @brief Wrapper macro for ixOsalNoAllocPoolInit()
+ * See function description below for details.
+ *
+ */
+#define IX_OSAL_MBUF_NO_ALLOC_POOL_INIT(bufPtr, dataPtr, count, size, name) \
+ ixOsalNoAllocPoolInit( (bufPtr), (dataPtr), (count), (size), (name))
+
+/**
+ * @ingroup IxOsalBufferMgt
+ *
+ * @def IX_OSAL_MBUF_POOL_GET
+ *
+ * @brief Wrapper macro for ixOsalMbufAlloc()
+ * See function description below for details.
+ */
+#define IX_OSAL_MBUF_POOL_GET(poolPtr) \
+ ixOsalMbufAlloc(poolPtr)
+
+/**
+ * @ingroup IxOsalBufferMgt
+ *
+ * @def IX_OSAL_MBUF_POOL_PUT
+ *
+ * @brief Wrapper macro for ixOsalMbufFree()
+ * See function description below for details.
+ */
+#define IX_OSAL_MBUF_POOL_PUT(bufPtr) \
+ ixOsalMbufFree(bufPtr)
+
+/**
+ * @ingroup IxOsalBufferMgt
+ *
+ * @def IX_OSAL_MBUF_POOL_PUT_CHAIN
+ *
+ * @brief Wrapper macro for ixOsalMbufChainFree()
+ * See function description below for details.
+ */
+#define IX_OSAL_MBUF_POOL_PUT_CHAIN(bufPtr) \
+ ixOsalMbufChainFree(bufPtr)
+
+/**
+ * @ingroup IxOsalBufferMgt
+ *
+ * @def IX_OSAL_MBUF_POOL_SHOW
+ *
+ * @brief Wrapper macro for ixOsalMbufPoolShow()
+ * See function description below for details.
+ */
+#define IX_OSAL_MBUF_POOL_SHOW(poolPtr) \
+ ixOsalMbufPoolShow(poolPtr)
+
+/**
+ * @ingroup IxOsalBufferMgt
+ *
+ * @def IX_OSAL_MBUF_POOL_MDATA_RESET
+ *
+ * @brief Wrapper macro for ixOsalMbufDataPtrReset()
+ * See function description below for details.
+ */
+#define IX_OSAL_MBUF_POOL_MDATA_RESET(bufPtr) \
+ ixOsalMbufDataPtrReset(bufPtr)
+
+/**
+ * @ingroup IxOsalBufferMgt
+ *
+ * @def IX_OSAL_MBUF_POOL_UNINIT
+ *
+ * @brief Wrapper macro for ixOsalBuffPoolUninit()
+ * See function description below for details.
+ */
+#define IX_OSAL_MBUF_POOL_UNINIT(m_pool_ptr) \
+ ixOsalBuffPoolUninit(m_pool_ptr)
+
+/*
+ * Include OS-specific bufferMgt definitions
+ */
+#include "IxOsalOsBufferMgt.h"
+
+
+/**
+ * @ingroup IxOsalBufferMgt
+ *
+ * @def IX_OSAL_CONVERT_OSBUF_TO_IXPBUF( osBufPtr, ixpBufPtr)
+ *
+ * @brief Convert pre-allocated os-specific buffer format to OSAL IXP_BUF (IX_OSAL_MBUF) format.
+ * It is users' responsibility to provide pre-allocated and valid buffer pointers.
+ * @param osBufPtr (in) - a pre-allocated os-specific buffer pointer.
+ * @param ixpBufPtr (in)- a pre-allocated OSAL IXP_BUF pointer
+ * @return None
+ */
+#define IX_OSAL_CONVERT_OSBUF_TO_IXPBUF( osBufPtr, ixpBufPtr) \
+ IX_OSAL_OS_CONVERT_OSBUF_TO_IXPBUF( osBufPtr, ixpBufPtr)
+
+
+/**
+ * @ingroup IxOsalBufferMgt
+ *
+ * @def IX_OSAL_CONVERT_IXPBUF_TO_OSBUF( ixpBufPtr, osBufPtr)
+ *
+ * @brief Convert pre-allocated OSAL IXP_BUF (IX_OSAL_MBUF) format to os-specific buffer pointers.
+ * @param ixpBufPtr (in) - OSAL IXP_BUF pointer
+ * @param osBufPtr (out) - os-specific buffer pointer.
+ * @return None
+ */
+
+#define IX_OSAL_CONVERT_IXPBUF_TO_OSBUF( ixpBufPtr, osBufPtr) \
+ IX_OSAL_OS_CONVERT_IXPBUF_TO_OSBUF( ixpBufPtr, osBufPtr)
+
+
+PUBLIC IX_OSAL_MBUF_POOL *ixOsalPoolInit (UINT32 count,
+ UINT32 size, const char *name);
+
+PUBLIC IX_OSAL_MBUF_POOL *ixOsalNoAllocPoolInit (void *poolBufPtr,
+ void *poolDataPtr,
+ UINT32 count,
+ UINT32 size,
+ const char *name);
+
+PUBLIC IX_OSAL_MBUF *ixOsalMbufAlloc (IX_OSAL_MBUF_POOL * pool);
+
+PUBLIC IX_OSAL_MBUF *ixOsalMbufFree (IX_OSAL_MBUF * mbuf);
+
+PUBLIC void ixOsalMbufChainFree (IX_OSAL_MBUF * mbuf);
+
+PUBLIC void ixOsalMbufDataPtrReset (IX_OSAL_MBUF * mbuf);
+
+PUBLIC void ixOsalMbufPoolShow (IX_OSAL_MBUF_POOL * pool);
+
+PUBLIC IX_STATUS ixOsalBuffPoolUninit (IX_OSAL_MBUF_POOL * pool);
+
+PUBLIC UINT32 ixOsalBuffPoolFreeCountGet(IX_OSAL_MBUF_POOL * pool);
+
+
+/**
+ * @} IxOsalBufferMgt
+ */
+
+
+#endif /* IxOsalBufferMgt_H */
diff --git a/cpu/ixp/npe/include/IxOsalBufferMgtDefault.h b/cpu/ixp/npe/include/IxOsalBufferMgtDefault.h
new file mode 100644
index 0000000000..684b52edb4
--- /dev/null
+++ b/cpu/ixp/npe/include/IxOsalBufferMgtDefault.h
@@ -0,0 +1,88 @@
+/**
+ * @file IxOsalBufferMgtDefault.h
+ *
+ * @brief Default buffer pool management and buffer management
+ * definitions.
+ *
+ * Design Notes:
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+#ifndef IX_OSAL_BUFFER_MGT_DEFAULT_H
+#define IX_OSAL_BUFFER_MGT_DEFAULT_H
+
+/**
+ * @enum IxMbufPoolAllocationType
+ * @brief Used to indicate how the pool memory was allocated
+ */
+
+typedef enum
+{
+ IX_OSAL_MBUF_POOL_TYPE_SYS_ALLOC = 0, /**< mbuf pool allocated by the system */
+ IX_OSAL_MBUF_POOL_TYPE_USER_ALLOC /**< mbuf pool allocated by the user */
+} IxOsalMbufPoolAllocationType;
+
+
+/**
+ * @brief Implementation of buffer pool structure for use with non-VxWorks OS
+ */
+
+typedef struct
+{
+ IX_OSAL_MBUF *nextFreeBuf; /**< Pointer to the next free mbuf */
+ void *mbufMemPtr; /**< Pointer to the mbuf memory area */
+ void *dataMemPtr; /**< Pointer to the data memory area */
+ int bufDataSize; /**< The size of the data portion of each mbuf */
+ int totalBufsInPool; /**< Total number of mbufs in the pool */
+ int freeBufsInPool; /**< Number of free mbufs currently in the pool */
+ int mbufMemSize; /**< The size of the pool mbuf memory area */
+ int dataMemSize; /**< The size of the pool data memory area */
+ char name[IX_OSAL_MBUF_POOL_NAME_LEN + 1]; /**< Descriptive name for pool */
+ IxOsalMbufPoolAllocationType poolAllocType;
+ unsigned int poolIdx; /**< Pool Index */
+} IxOsalMbufPool;
+
+typedef IxOsalMbufPool IX_OSAL_MBUF_POOL;
+
+
+PUBLIC IX_STATUS ixOsalBuffPoolUninit (IX_OSAL_MBUF_POOL * pool);
+
+
+#endif /* IX_OSAL_BUFFER_MGT_DEFAULT_H */
diff --git a/cpu/ixp/npe/include/IxOsalConfig.h b/cpu/ixp/npe/include/IxOsalConfig.h
new file mode 100644
index 0000000000..d56e796393
--- /dev/null
+++ b/cpu/ixp/npe/include/IxOsalConfig.h
@@ -0,0 +1,76 @@
+/**
+ * @file IxOsalConfig.h
+ *
+ * @brief OSAL Configuration header file
+ *
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+/*
+ * This file contains user-editable fields for modules inclusion.
+ */
+#ifndef IxOsalConfig_H
+#define IxOsalConfig_H
+
+
+/*
+ * Note: in the future these config options may
+ * become build time decision.
+ */
+
+/* Choose cache */
+#define IX_OSAL_CACHED
+/* #define IX_OSAL_UNCACHED */
+
+
+/*
+ * Select the module headers to include
+ */
+#include "IxOsalIoMem.h" /* I/O Memory Management module API */
+#include "IxOsalBufferMgt.h" /* Buffer Management module API */
+
+/*
+ * Select main platform header file to use
+ */
+#include "IxOsalOem.h"
+
+
+
+#endif /* IxOsalConfig_H */
diff --git a/cpu/ixp/npe/include/IxOsalEndianess.h b/cpu/ixp/npe/include/IxOsalEndianess.h
new file mode 100644
index 0000000000..3b1c739474
--- /dev/null
+++ b/cpu/ixp/npe/include/IxOsalEndianess.h
@@ -0,0 +1,134 @@
+/**
+ * @file IxOsalEndianess.h (Obsolete file)
+ *
+ * @brief Header file for determining system endianess and OS
+ *
+ * @par
+ * @version $Revision: 1.1
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+
+#ifndef IxOsalEndianess_H
+#define IxOsalEndianess_H
+
+#if defined (__vxworks) || defined (__linux)
+
+/* get ntohl/ntohs/htohl/htons macros and CPU definitions for VxWorks */
+/* #include <netinet/in.h> */
+
+#elif defined (__wince)
+
+/* get ntohl/ntohs/htohl/htons macros definitions for WinCE */
+#include <Winsock2.h>
+
+#else
+
+#error Unknown OS, please add a section with the include file for htonl/htons/ntohl/ntohs
+
+#endif /* vxworks or linux or wince */
+
+/* Compiler specific endianness selector - WARNING this works only with arm gcc, use appropriate defines with diab */
+
+#ifndef __wince
+
+#if defined (__ARMEL__)
+
+#ifndef __LITTLE_ENDIAN
+
+#define __LITTLE_ENDIAN
+
+#endif /* _LITTLE_ENDIAN */
+
+#elif defined (__ARMEB__) || CPU == SIMSPARCSOLARIS
+
+#ifndef __BIG_ENDIAN
+
+#define __BIG_ENDIAN
+
+#endif /* __BIG_ENDIAN */
+
+#else
+
+#error Error, could not identify target endianness
+
+#endif /* endianness selector no WinCE OSes */
+
+#else /* ndef __wince */
+
+#define __LITTLE_ENDIAN
+
+#endif /* def __wince */
+
+
+/* OS mode selector */
+#if defined (__vxworks) && defined (__LITTLE_ENDIAN)
+
+#define IX_OSAL_VXWORKS_LE
+
+#elif defined (__vxworks) && defined (__BIG_ENDIAN)
+
+#define IX_OSAL_VXWORKS_BE
+
+#elif defined (__linux) && defined (__BIG_ENDIAN)
+
+#define IX_OSAL_LINUX_BE
+
+#elif defined (__linux) && defined (__LITTLE_ENDIAN)
+
+#define IX_OSAL_LINUX_LE
+
+#elif defined (BOOTLOADER_BLD) && defined (__LITTLE_ENDIAN)
+
+#define IX_OSAL_EBOOT_LE
+
+#elif defined (__wince) && defined (__LITTLE_ENDIAN)
+
+#define IX_OSAL_WINCE_LE
+
+#else
+
+#error Unknown OS/Endianess combination - only vxWorks BE LE, Linux BE LE, WinCE BE LE are supported
+
+#endif /* mode selector */
+
+
+
+#endif /* IxOsalEndianess_H */
diff --git a/cpu/ixp/npe/include/IxOsalIoMem.h b/cpu/ixp/npe/include/IxOsalIoMem.h
new file mode 100644
index 0000000000..ac0ce65703
--- /dev/null
+++ b/cpu/ixp/npe/include/IxOsalIoMem.h
@@ -0,0 +1,322 @@
+/*
+ * @file IxOsalIoMem.h
+ * @author Intel Corporation
+ * @date 25-08-2004
+ *
+ * @brief description goes here
+ */
+
+/**
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+#ifndef IxOsalIoMem_H
+#define IxOsalIoMem_H
+
+
+/*
+ * Decide OS and Endianess, such as IX_OSAL_VXWORKS_LE.
+ */
+#include "IxOsalEndianess.h"
+
+/**
+ * @defgroup IxOsalIoMem Osal IoMem module
+ *
+ * @brief I/O memory and endianess support.
+ *
+ * @{
+ */
+
+/* Low-level conversion macros - DO NOT USE UNLESS ABSOLUTELY NEEDED */
+#ifndef __wince
+
+
+/*
+ * Private function to swap word
+ */
+#ifdef __XSCALE__
+static __inline__ UINT32
+ixOsalCoreWordSwap (UINT32 wordIn)
+{
+ /*
+ * Storage for the swapped word
+ */
+ UINT32 wordOut;
+
+ /*
+ * wordIn = A, B, C, D
+ */
+ __asm__ (" eor r1, %1, %1, ror #16;" /* R1 = A^C, B^D, C^A, D^B */
+ " bic r1, r1, #0x00ff0000;" /* R1 = A^C, 0 , C^A, D^B */
+ " mov %0, %1, ror #8;" /* wordOut = D, A, B, C */
+ " eor %0, %0, r1, lsr #8;" /* wordOut = D, C, B, A */
+ : "=r" (wordOut): "r" (wordIn):"r1");
+
+ return wordOut;
+}
+
+#define IX_OSAL_SWAP_LONG(wData) (ixOsalCoreWordSwap(wData))
+#else
+#define IX_OSAL_SWAP_LONG(wData) ((wData >> 24) | (((wData >> 16) & 0xFF) << 8) | (((wData >> 8) & 0xFF) << 16) | ((wData & 0xFF) << 24))
+#endif
+
+#else /* ndef __wince */
+#define IX_OSAL_SWAP_LONG(wData) ((((UINT32)wData << 24) | ((UINT32)wData >> 24)) | (((wData << 8) & 0xff0000) | ((wData >> 8) & 0xff00)))
+#endif /* ndef __wince */
+
+#define IX_OSAL_SWAP_SHORT(sData) ((sData >> 8) | ((sData & 0xFF) << 8))
+#define IX_OSAL_SWAP_SHORT_ADDRESS(sAddr) ((sAddr) ^ 0x2)
+#define IX_OSAL_SWAP_BYTE_ADDRESS(bAddr) ((bAddr) ^ 0x3)
+
+#define IX_OSAL_BE_XSTOBUSL(wData) (wData)
+#define IX_OSAL_BE_XSTOBUSS(sData) (sData)
+#define IX_OSAL_BE_XSTOBUSB(bData) (bData)
+#define IX_OSAL_BE_BUSTOXSL(wData) (wData)
+#define IX_OSAL_BE_BUSTOXSS(sData) (sData)
+#define IX_OSAL_BE_BUSTOXSB(bData) (bData)
+
+#define IX_OSAL_LE_AC_XSTOBUSL(wAddr) (wAddr)
+#define IX_OSAL_LE_AC_XSTOBUSS(sAddr) IX_OSAL_SWAP_SHORT_ADDRESS(sAddr)
+#define IX_OSAL_LE_AC_XSTOBUSB(bAddr) IX_OSAL_SWAP_BYTE_ADDRESS(bAddr)
+#define IX_OSAL_LE_AC_BUSTOXSL(wAddr) (wAddr)
+#define IX_OSAL_LE_AC_BUSTOXSS(sAddr) IX_OSAL_SWAP_SHORT_ADDRESS(sAddr)
+#define IX_OSAL_LE_AC_BUSTOXSB(bAddr) IX_OSAL_SWAP_BYTE_ADDRESS(bAddr)
+
+#define IX_OSAL_LE_DC_XSTOBUSL(wData) IX_OSAL_SWAP_LONG(wData)
+#define IX_OSAL_LE_DC_XSTOBUSS(sData) IX_OSAL_SWAP_SHORT(sData)
+#define IX_OSAL_LE_DC_XSTOBUSB(bData) (bData)
+#define IX_OSAL_LE_DC_BUSTOXSL(wData) IX_OSAL_SWAP_LONG(wData)
+#define IX_OSAL_LE_DC_BUSTOXSS(sData) IX_OSAL_SWAP_SHORT(sData)
+#define IX_OSAL_LE_DC_BUSTOXSB(bData) (bData)
+
+
+/*
+ * Decide SDRAM mapping, then implement read/write
+ */
+#include "IxOsalMemAccess.h"
+
+
+/**
+ * @ingroup IxOsalIoMem
+ * @enum IxOsalMapEntryType
+ * @brief This is an emum for OSAL I/O mem map type.
+ */
+typedef enum
+{
+ IX_OSAL_STATIC_MAP = 0, /**<Set map entry type to static map */
+ IX_OSAL_DYNAMIC_MAP /**<Set map entry type to dynamic map */
+} IxOsalMapEntryType;
+
+
+/**
+ * @ingroup IxOsalIoMem
+ * @enum IxOsalMapEndianessType
+ * @brief This is an emum for OSAL I/O mem Endianess and Coherency mode.
+ */
+typedef enum
+{
+ IX_OSAL_BE = 0x1, /**<Set map endian mode to Big Endian */
+ IX_OSAL_LE_AC = 0x2, /**<Set map endian mode to Little Endian, Address Coherent */
+ IX_OSAL_LE_DC = 0x4, /**<Set map endian mode to Little Endian, Data Coherent */
+ IX_OSAL_LE = 0x8 /**<Set map endian mode to Little Endian without specifying coherency mode */
+} IxOsalMapEndianessType;
+
+
+/**
+ * @struct IxOsalMemoryMap
+ * @brief IxOsalMemoryMap structure
+ */
+typedef struct _IxOsalMemoryMap
+{
+ IxOsalMapEntryType type; /**< map type - IX_OSAL_STATIC_MAP or IX_OSAL_DYNAMIC_MAP */
+
+ UINT32 physicalAddress; /**< physical address of the memory mapped I/O zone */
+
+ UINT32 size; /**< size of the map */
+
+ UINT32 virtualAddress; /**< virtual address of the zone; must be predefined
+ in the global memory map for static maps and has
+ to be NULL for dynamic maps (populated on allocation)
+ */
+ /*
+ * pointer to a map function called to map a dynamic map;
+ * will populate the virtualAddress field
+ */
+ void (*mapFunction) (struct _IxOsalMemoryMap * map); /**< pointer to a map function called to map a dynamic map */
+
+ /*
+ * pointer to a map function called to unmap a dynamic map;
+ * will reset the virtualAddress field to NULL
+ */
+ void (*unmapFunction) (struct _IxOsalMemoryMap * map); /**< pointer to a map function called to unmap a dynamic map */
+
+ /*
+ * reference count describing how many components share this map;
+ * actual allocation/deallocation for dynamic maps is done only
+ * between 0 <=> 1 transitions of the counter
+ */
+ UINT32 refCount; /**< reference count describing how many components share this map */
+
+ /*
+ * memory endian type for the map; can be a combination of IX_OSAL_BE (Big
+ * Endian) and IX_OSAL_LE or IX_OSAL_LE_AC or IX_OSAL_LE_DC
+ * (Little Endian, Address Coherent or Data Coherent). Any combination is
+ * allowed provided it contains at most one LE flag - e.g.
+ * (IX_OSAL_BE), (IX_OSAL_LE_AC), (IX_OSAL_BE | IX_OSAL_LE_DC) are valid
+ * combinations while (IX_OSAL_BE | IX_OSAL_LE_DC | IX_OSAL_LE_AC) is not.
+ */
+ IxOsalMapEndianessType mapEndianType; /**< memory endian type for the map */
+
+ char *name; /**< user-friendly name */
+} IxOsalMemoryMap;
+
+
+
+
+/* Internal function to map a memory zone
+ * NOTE - This should not be called by the user.
+ * Use the macro IX_OSAL_MEM_MAP instead
+ */
+PUBLIC void *ixOsalIoMemMap (UINT32 requestedAddress,
+ UINT32 size,
+ IxOsalMapEndianessType requestedCoherency);
+
+
+/* Internal function to unmap a memory zone mapped with ixOsalIoMemMap
+ * NOTE - This should not be called by the user.
+ * Use the macro IX_OSAL_MEM_UNMAP instead
+ */
+PUBLIC void ixOsalIoMemUnmap (UINT32 requestedAddress, UINT32 coherency);
+
+
+/* Internal function to convert virtual address to physical address
+ * NOTE - This should not be called by the user.
+ * Use the macro IX_OSAL_MMAP_VIRT_TO_PHYS */
+PUBLIC UINT32 ixOsalIoMemVirtToPhys (UINT32 virtualAddress, UINT32 coherency);
+
+
+/* Internal function to convert physical address to virtual address
+ * NOTE - This should not be called by the user.
+ * Use the macro IX_OSAL_MMAP_PHYS_TO_VIRT */
+PUBLIC UINT32
+ixOsalIoMemPhysToVirt (UINT32 physicalAddress, UINT32 coherency);
+
+/**
+ * @ingroup IxOsalIoMem
+ *
+ * @def IX_OSAL_MEM_MAP(physAddr, size)
+ *
+ * @brief Map an I/O mapped physical memory zone to virtual zone and return virtual
+ * pointer.
+ * @param physAddr - the physical address
+ * @param size - the size
+ * @return start address of the virtual memory zone.
+ *
+ * @note This function maps an I/O mapped physical memory zone of the given size
+ * into a virtual memory zone accessible by the caller and returns a cookie -
+ * the start address of the virtual memory zone.
+ * IX_OSAL_MMAP_PHYS_TO_VIRT should NOT therefore be used on the returned
+ * virtual address.
+ * The memory zone is to be unmapped using IX_OSAL_MEM_UNMAP once the caller has
+ * finished using this zone (e.g. on driver unload) using the cookie as
+ * parameter.
+ * The IX_OSAL_READ/WRITE_LONG/SHORT macros should be used to read and write
+ * the mapped memory, adding the necessary offsets to the address cookie.
+ */
+#define IX_OSAL_MEM_MAP(physAddr, size) \
+ ixOsalIoMemMap((physAddr), (size), IX_OSAL_COMPONENT_MAPPING)
+
+
+/**
+ * @ingroup IxOsalIoMem
+ *
+ * @def IX_OSAL_MEM_UNMAP(virtAddr)
+ *
+ * @brief Unmap a previously mapped I/O memory zone using virtual pointer obtained
+ * during the mapping operation.
+ * pointer.
+ * @param virtAddr - the virtual pointer to the zone to be unmapped.
+ * @return none
+ *
+ * @note This function unmaps a previously mapped I/O memory zone using
+ * the cookie obtained in the mapping operation. The memory zone in question
+ * becomes unavailable to the caller once unmapped and the cookie should be
+ * discarded.
+ *
+ * This function cannot fail if the given parameter is correct and does not
+ * return a value.
+ */
+#define IX_OSAL_MEM_UNMAP(virtAddr) \
+ ixOsalIoMemUnmap ((virtAddr), IX_OSAL_COMPONENT_MAPPING)
+
+/**
+ * @ingroup IxOsalIoMem
+ *
+ * @def IX_OSAL_MMAP_VIRT_TO_PHYS(virtAddr)
+ *
+ * @brief This function Converts a virtual address into a physical
+ * address, including the dynamically mapped memory.
+ *
+ * @param virtAddr - virtual address to convert
+ * Return value: corresponding physical address, or NULL
+ */
+#define IX_OSAL_MMAP_VIRT_TO_PHYS(virtAddr) \
+ ixOsalIoMemVirtToPhys(virtAddr, IX_OSAL_COMPONENT_MAPPING)
+
+
+/**
+ * @ingroup IxOsalIoMem
+ *
+ * @def IX_OSAL_MMAP_PHYS_TO_VIRT(physAddr)
+ *
+ * @brief This function Converts a virtual address into a physical
+ * address, including the dynamically mapped memory.
+ *
+ * @param physAddr - physical address to convert
+ * Return value: corresponding virtual address, or NULL
+ *
+ */
+#define IX_OSAL_MMAP_PHYS_TO_VIRT(physAddr) \
+ ixOsalIoMemPhysToVirt(physAddr, IX_OSAL_COMPONENT_MAPPING)
+
+/**
+ * @} IxOsalIoMem
+ */
+
+#endif /* IxOsalIoMem_H */
diff --git a/cpu/ixp/npe/include/IxOsalMemAccess.h b/cpu/ixp/npe/include/IxOsalMemAccess.h
new file mode 100644
index 0000000000..2ad0ccfbb2
--- /dev/null
+++ b/cpu/ixp/npe/include/IxOsalMemAccess.h
@@ -0,0 +1,494 @@
+/**
+ * @file IxOsalMemAccess.h
+ *
+ * @brief Header file for memory access
+ *
+ * @par
+ * @version $Revision: 1.0 $
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+#ifndef IxOsalMemAccess_H
+#define IxOsalMemAccess_H
+
+
+/* Global BE switch
+ *
+ * Should be set only in BE mode and only if the component uses I/O memory.
+ */
+
+#if defined (__BIG_ENDIAN)
+
+#define IX_OSAL_BE_MAPPING
+
+#endif /* Global switch */
+
+
+/* By default only static memory maps in use;
+ define IX_OSAL_DYNAMIC_MEMORY_MAP per component if dynamic maps are
+ used instead in that component */
+#define IX_OSAL_STATIC_MEMORY_MAP
+
+
+/*
+ * SDRAM coherency mode
+ * Must be defined to BE, LE_DATA_COHERENT or LE_ADDRESS_COHERENT.
+ * The mode changes depending on OS
+ */
+#if defined (IX_OSAL_LINUX_BE) || defined (IX_OSAL_VXWORKS_BE)
+
+#define IX_SDRAM_BE
+
+#elif defined (IX_OSAL_VXWORKS_LE)
+
+#define IX_SDRAM_LE_DATA_COHERENT
+
+#elif defined (IX_OSAL_LINUX_LE)
+
+#define IX_SDRAM_LE_DATA_COHERENT
+
+#elif defined (IX_OSAL_WINCE_LE)
+
+#define IX_SDRAM_LE_DATA_COHERENT
+
+#elif defined (IX_OSAL_EBOOT_LE)
+
+#define IX_SDRAM_LE_ADDRESS_COHERENT
+
+#endif
+
+
+
+
+/**************************************
+ * Retrieve current component mapping *
+ **************************************/
+
+/*
+ * Only use customized mapping for LE.
+ *
+ */
+#if defined (IX_OSAL_VXWORKS_LE) || defined (IX_OSAL_LINUX_LE) || defined (IX_OSAL_WINCE_LE) || defined (IX_OSAL_EBOOT_LE)
+
+#include "IxOsalOsIxp400CustomizedMapping.h"
+
+#endif
+
+
+/*******************************************************************
+ * Turn off IX_STATIC_MEMORY map for components using dynamic maps *
+ *******************************************************************/
+#ifdef IX_OSAL_DYNAMIC_MEMORY_MAP
+
+#undef IX_OSAL_STATIC_MEMORY_MAP
+
+#endif
+
+
+/************************************************************
+ * Turn off BE access for components using LE or no mapping *
+ ************************************************************/
+
+#if ( defined (IX_OSAL_LE_AC_MAPPING) || defined (IX_OSAL_LE_DC_MAPPING) || defined (IX_OSAL_NO_MAPPING) )
+
+#undef IX_OSAL_BE_MAPPING
+
+#endif
+
+
+/*****************
+ * Safety checks *
+ *****************/
+
+/* Default to no_mapping */
+#if !defined (IX_OSAL_BE_MAPPING) && !defined (IX_OSAL_LE_AC_MAPPING) && !defined (IX_OSAL_LE_DC_MAPPING) && !defined (IX_OSAL_NO_MAPPING)
+
+#define IX_OSAL_NO_MAPPING
+
+#endif /* check at least one mapping */
+
+/* No more than one mapping can be defined for a component */
+#if (defined (IX_OSAL_BE_MAPPING) && defined (IX_OSAL_LE_AC_MAPPING)) \
+ ||(defined (IX_OSAL_BE_MAPPING) && defined (IX_OSAL_LE_DC_MAPPING)) \
+ ||(defined (IX_OSAL_BE_MAPPING) && defined (IX_OSAL_NO_MAPPING)) \
+ ||(defined (IX_OSAL_LE_DC_MAPPING) && defined (IX_OSAL_NO_MAPPING)) \
+ ||(defined (IX_OSAL_LE_DC_MAPPING) && defined (IX_OSAL_LE_AC_MAPPING)) \
+ ||(defined (IX_OSAL_LE_AC_MAPPING) && defined (IX_OSAL_NO_MAPPING))
+
+
+#ifdef IX_OSAL_BE_MAPPING
+#warning IX_OSAL_BE_MAPPING is defined
+#endif
+
+#ifdef IX_OSAL_LE_AC_MAPPING
+#warning IX_OSAL_LE_AC_MAPPING is defined
+#endif
+
+#ifdef IX_OSAL_LE_DC_MAPPING
+#warning IX_OSAL_LE_DC_MAPPING is defined
+#endif
+
+#ifdef IX_OSAL_NO_MAPPING
+#warning IX_OSAL_NO_MAPPING is defined
+#endif
+
+#error More than one I/O mapping is defined, please check your component mapping
+
+#endif /* check at most one mapping */
+
+
+/* Now set IX_OSAL_COMPONENT_MAPPING */
+
+#ifdef IX_OSAL_BE_MAPPING
+#define IX_OSAL_COMPONENT_MAPPING IX_OSAL_BE
+#endif
+
+#ifdef IX_OSAL_LE_AC_MAPPING
+#define IX_OSAL_COMPONENT_MAPPING IX_OSAL_LE_AC
+#endif
+
+#ifdef IX_OSAL_LE_DC_MAPPING
+#define IX_OSAL_COMPONENT_MAPPING IX_OSAL_LE_DC
+#endif
+
+#ifdef IX_OSAL_NO_MAPPING
+#define IX_OSAL_COMPONENT_MAPPING IX_OSAL_LE
+#endif
+
+
+/* SDRAM coherency should be defined */
+#if !defined (IX_SDRAM_BE) && !defined (IX_SDRAM_LE_DATA_COHERENT) && !defined (IX_SDRAM_LE_ADDRESS_COHERENT)
+
+#error SDRAM coherency must be defined
+
+#endif /* SDRAM coherency must be defined */
+
+/* SDRAM coherency cannot be defined in several ways */
+#if (defined (IX_SDRAM_BE) && (defined (IX_SDRAM_LE_DATA_COHERENT) || defined (IX_SDRAM_LE_ADDRESS_COHERENT))) \
+ || (defined (IX_SDRAM_LE_DATA_COHERENT) && (defined (IX_SDRAM_BE) || defined (IX_SDRAM_LE_ADDRESS_COHERENT))) \
+ || (defined (IX_SDRAM_LE_ADDRESS_COHERENT) && (defined (IX_SDRAM_BE) || defined (IX_SDRAM_LE_DATA_COHERENT)))
+
+#error SDRAM coherency cannot be defined in more than one way
+
+#endif /* SDRAM coherency must be defined exactly once */
+
+
+/*********************
+ * Read/write macros *
+ *********************/
+
+/* WARNING - except for addition of special cookie read/write macros (see below)
+ these macros are NOT user serviceable. Please do not modify */
+
+#define IX_OSAL_READ_LONG_RAW(wAddr) (*(wAddr))
+#define IX_OSAL_READ_SHORT_RAW(sAddr) (*(sAddr))
+#define IX_OSAL_READ_BYTE_RAW(bAddr) (*(bAddr))
+#define IX_OSAL_WRITE_LONG_RAW(wAddr, wData) (*(wAddr) = (wData))
+#define IX_OSAL_WRITE_SHORT_RAW(sAddr,sData) (*(sAddr) = (sData))
+#define IX_OSAL_WRITE_BYTE_RAW(bAddr, bData) (*(bAddr) = (bData))
+
+#ifdef __linux
+
+/* Linux - specific cookie reads/writes.
+ Redefine per OS if dynamic memory maps are used
+ and I/O memory is accessed via functions instead of raw pointer access. */
+
+#define IX_OSAL_READ_LONG_COOKIE(wCookie) (readl((UINT32) (wCookie) ))
+#define IX_OSAL_READ_SHORT_COOKIE(sCookie) (readw((UINT32) (sCookie) ))
+#define IX_OSAL_READ_BYTE_COOKIE(bCookie) (readb((UINT32) (bCookie) ))
+#define IX_OSAL_WRITE_LONG_COOKIE(wCookie, wData) (writel(wData, (UINT32) (wCookie) ))
+#define IX_OSAL_WRITE_SHORT_COOKIE(sCookie, sData) (writew(sData, (UINT32) (sCookie) ))
+#define IX_OSAL_WRITE_BYTE_COOKIE(bCookie, bData) (writeb(bData, (UINT32) (bCookie) ))
+
+#endif /* linux */
+
+#ifdef __wince
+
+/* WinCE - specific cookie reads/writes. */
+
+static __inline__ UINT32
+ixOsalWinCEReadLCookie (volatile UINT32 * lCookie)
+{
+ return *lCookie;
+}
+
+static __inline__ UINT16
+ixOsalWinCEReadWCookie (volatile UINT16 * wCookie)
+{
+#if 0
+ UINT32 auxVal = *((volatile UINT32 *) wCookie);
+ if ((unsigned) wCookie & 3)
+ return (UINT16) (auxVal >> 16);
+ else
+ return (UINT16) (auxVal & 0xffff);
+#else
+ return *wCookie;
+#endif
+}
+
+static __inline__ UINT8
+ixOsalWinCEReadBCookie (volatile UINT8 * bCookie)
+{
+#if 0
+ UINT32 auxVal = *((volatile UINT32 *) bCookie);
+ return (UINT8) ((auxVal >> (3 - (((unsigned) bCookie & 3) << 3)) & 0xff));
+#else
+ return *bCookie;
+#endif
+}
+
+static __inline__ void
+ixOsalWinCEWriteLCookie (volatile UINT32 * lCookie, UINT32 lVal)
+{
+ *lCookie = lVal;
+}
+
+static __inline__ void
+ixOsalWinCEWriteWCookie (volatile UINT16 * wCookie, UINT16 wVal)
+{
+#if 0
+ volatile UINT32 *auxCookie =
+ (volatile UINT32 *) ((unsigned) wCookie & ~3);
+ if ((unsigned) wCookie & 3)
+ {
+ *auxCookie &= 0xffff;
+ *auxCookie |= (UINT32) wVal << 16;
+ }
+ else
+ {
+ *auxCookie &= ~0xffff;
+ *auxCookie |= (UINT32) wVal & 0xffff;
+ }
+#else
+ *wCookie = wVal;
+#endif
+}
+
+static __inline__ void
+ixOsalWinCEWriteBCookie (volatile UINT8 * bCookie, UINT8 bVal)
+{
+#if 0
+ volatile UINT32 *auxCookie =
+ (volatile UINT32 *) ((unsigned) bCookie & ~3);
+ *auxCookie &= 0xff << (3 - (((unsigned) bCookie & 3) << 3));
+ *auxCookie |= (UINT32) bVal << (3 - (((unsigned) bCookie & 3) << 3));
+#else
+ *bCookie = bVal;
+#endif
+}
+
+
+#define IX_OSAL_READ_LONG_COOKIE(wCookie) (ixOsalWinCEReadLCookie(wCookie))
+#define IX_OSAL_READ_SHORT_COOKIE(sCookie) (ixOsalWinCEReadWCookie(sCookie))
+#define IX_OSAL_READ_BYTE_COOKIE(bCookie) (ixOsalWinCEReadBCookie(bCookie))
+#define IX_OSAL_WRITE_LONG_COOKIE(wCookie, wData) (ixOsalWinCEWriteLCookie(wCookie, wData))
+#define IX_OSAL_WRITE_SHORT_COOKIE(sCookie, sData) (ixOsalWinCEWriteWCookie(sCookie, sData))
+#define IX_OSAL_WRITE_BYTE_COOKIE(bCookie, bData) (ixOsalWinCEWriteBCookie(bCookie, bData))
+
+#endif /* wince */
+
+#if defined (__vxworks) || (defined (__linux) && defined (IX_OSAL_STATIC_MEMORY_MAP)) || \
+ (defined (__wince) && defined (IX_OSAL_STATIC_MEMORY_MAP))
+
+#define IX_OSAL_READ_LONG_IO(wAddr) IX_OSAL_READ_LONG_RAW(wAddr)
+#define IX_OSAL_READ_SHORT_IO(sAddr) IX_OSAL_READ_SHORT_RAW(sAddr)
+#define IX_OSAL_READ_BYTE_IO(bAddr) IX_OSAL_READ_BYTE_RAW(bAddr)
+#define IX_OSAL_WRITE_LONG_IO(wAddr, wData) IX_OSAL_WRITE_LONG_RAW(wAddr, wData)
+#define IX_OSAL_WRITE_SHORT_IO(sAddr, sData) IX_OSAL_WRITE_SHORT_RAW(sAddr, sData)
+#define IX_OSAL_WRITE_BYTE_IO(bAddr, bData) IX_OSAL_WRITE_BYTE_RAW(bAddr, bData)
+
+#elif (defined (__linux) && !defined (IX_OSAL_STATIC_MEMORY_MAP)) || \
+ (defined (__wince) && !defined (IX_OSAL_STATIC_MEMORY_MAP))
+
+#ifndef __wince
+#include <asm/io.h>
+#endif /* ndef __wince */
+
+#define IX_OSAL_READ_LONG_IO(wAddr) IX_OSAL_READ_LONG_COOKIE(wAddr)
+#define IX_OSAL_READ_SHORT_IO(sAddr) IX_OSAL_READ_SHORT_COOKIE(sAddr)
+#define IX_OSAL_READ_BYTE_IO(bAddr) IX_OSAL_READ_BYTE_COOKIE(bAddr)
+#define IX_OSAL_WRITE_LONG_IO(wAddr, wData) IX_OSAL_WRITE_LONG_COOKIE(wAddr, wData)
+#define IX_OSAL_WRITE_SHORT_IO(sAddr, sData) IX_OSAL_WRITE_SHORT_COOKIE(sAddr, sData)
+#define IX_OSAL_WRITE_BYTE_IO(bAddr, bData) IX_OSAL_WRITE_BYTE_COOKIE(bAddr, bData)
+
+#endif
+
+/* Define BE macros */
+#define IX_OSAL_READ_LONG_BE(wAddr) IX_OSAL_BE_BUSTOXSL(IX_OSAL_READ_LONG_IO((volatile UINT32 *) (wAddr) ))
+#define IX_OSAL_READ_SHORT_BE(sAddr) IX_OSAL_BE_BUSTOXSS(IX_OSAL_READ_SHORT_IO((volatile UINT16 *) (sAddr) ))
+#define IX_OSAL_READ_BYTE_BE(bAddr) IX_OSAL_BE_BUSTOXSB(IX_OSAL_READ_BYTE_IO((volatile UINT8 *) (bAddr) ))
+#define IX_OSAL_WRITE_LONG_BE(wAddr, wData) IX_OSAL_WRITE_LONG_IO((volatile UINT32 *) (wAddr), IX_OSAL_BE_XSTOBUSL((UINT32) (wData) ))
+#define IX_OSAL_WRITE_SHORT_BE(sAddr, sData) IX_OSAL_WRITE_SHORT_IO((volatile UINT16 *) (sAddr), IX_OSAL_BE_XSTOBUSS((UINT16) (sData) ))
+#define IX_OSAL_WRITE_BYTE_BE(bAddr, bData) IX_OSAL_WRITE_BYTE_IO((volatile UINT8 *) (bAddr), IX_OSAL_BE_XSTOBUSB((UINT8) (bData) ))
+
+/* Define LE AC macros */
+#define IX_OSAL_READ_LONG_LE_AC(wAddr) IX_OSAL_READ_LONG_IO((volatile UINT32 *) IX_OSAL_LE_AC_BUSTOXSL((UINT32) (wAddr) ))
+#define IX_OSAL_READ_SHORT_LE_AC(sAddr) IX_OSAL_READ_SHORT_IO((volatile UINT16 *) IX_OSAL_LE_AC_BUSTOXSS((UINT32) (sAddr) ))
+#define IX_OSAL_READ_BYTE_LE_AC(bAddr) IX_OSAL_READ_BYTE_IO((volatile UINT8 *) IX_OSAL_LE_AC_BUSTOXSB((UINT32) (bAddr) ))
+#define IX_OSAL_WRITE_LONG_LE_AC(wAddr, wData) IX_OSAL_WRITE_LONG_IO((volatile UINT32 *) IX_OSAL_LE_AC_XSTOBUSL((UINT32) (wAddr) ), (UINT32) (wData))
+#define IX_OSAL_WRITE_SHORT_LE_AC(sAddr, sData) IX_OSAL_WRITE_SHORT_IO((volatile UINT16 *) IX_OSAL_LE_AC_XSTOBUSS((UINT32) (sAddr) ), (UINT16) (sData))
+#define IX_OSAL_WRITE_BYTE_LE_AC(bAddr, bData) IX_OSAL_WRITE_BYTE_IO((volatile UINT8 *) IX_OSAL_LE_AC_XSTOBUSB((UINT32) (bAddr) ), (UINT8) (bData))
+
+
+/* Inline functions are required here to avoid reading the same I/O location 2 or 4 times for the byte swap */
+static __inline__ UINT32
+ixOsalDataCoherentLongReadSwap (volatile UINT32 * wAddr)
+{
+ UINT32 wData = IX_OSAL_READ_LONG_IO (wAddr);
+ return IX_OSAL_LE_DC_BUSTOXSL (wData);
+}
+
+static __inline__ UINT16
+ixOsalDataCoherentShortReadSwap (volatile UINT16 * sAddr)
+{
+ UINT16 sData = IX_OSAL_READ_SHORT_IO (sAddr);
+ return IX_OSAL_LE_DC_BUSTOXSS (sData);
+}
+
+static __inline__ void
+ixOsalDataCoherentLongWriteSwap (volatile UINT32 * wAddr, UINT32 wData)
+{
+ wData = IX_OSAL_LE_DC_XSTOBUSL (wData);
+ IX_OSAL_WRITE_LONG_IO (wAddr, wData);
+}
+
+static __inline__ void
+ixOsalDataCoherentShortWriteSwap (volatile UINT16 * sAddr, UINT16 sData)
+{
+ sData = IX_OSAL_LE_DC_XSTOBUSS (sData);
+ IX_OSAL_WRITE_SHORT_IO (sAddr, sData);
+}
+
+/* Define LE DC macros */
+
+#define IX_OSAL_READ_LONG_LE_DC(wAddr) ixOsalDataCoherentLongReadSwap((volatile UINT32 *) (wAddr) )
+#define IX_OSAL_READ_SHORT_LE_DC(sAddr) ixOsalDataCoherentShortReadSwap((volatile UINT16 *) (sAddr) )
+#define IX_OSAL_READ_BYTE_LE_DC(bAddr) IX_OSAL_LE_DC_BUSTOXSB(IX_OSAL_READ_BYTE_IO((volatile UINT8 *) (bAddr) ))
+#define IX_OSAL_WRITE_LONG_LE_DC(wAddr, wData) ixOsalDataCoherentLongWriteSwap((volatile UINT32 *) (wAddr), (UINT32) (wData))
+#define IX_OSAL_WRITE_SHORT_LE_DC(sAddr, sData) ixOsalDataCoherentShortWriteSwap((volatile UINT16 *) (sAddr), (UINT16) (sData))
+#define IX_OSAL_WRITE_BYTE_LE_DC(bAddr, bData) IX_OSAL_WRITE_BYTE_IO((volatile UINT8 *) (bAddr), IX_OSAL_LE_DC_XSTOBUSB((UINT8) (bData)))
+
+#if defined (IX_OSAL_BE_MAPPING)
+
+#define IX_OSAL_READ_LONG(wAddr) IX_OSAL_READ_LONG_BE(wAddr)
+#define IX_OSAL_READ_SHORT(sAddr) IX_OSAL_READ_SHORT_BE(sAddr)
+#define IX_OSAL_READ_BYTE(bAddr) IX_OSAL_READ_BYTE_BE(bAddr)
+#define IX_OSAL_WRITE_LONG(wAddr, wData) IX_OSAL_WRITE_LONG_BE(wAddr, wData)
+#define IX_OSAL_WRITE_SHORT(sAddr, sData) IX_OSAL_WRITE_SHORT_BE(sAddr, sData)
+#define IX_OSAL_WRITE_BYTE(bAddr, bData) IX_OSAL_WRITE_BYTE_BE(bAddr, bData)
+
+#elif defined (IX_OSAL_LE_AC_MAPPING)
+
+#define IX_OSAL_READ_LONG(wAddr) IX_OSAL_READ_LONG_LE_AC(wAddr)
+#define IX_OSAL_READ_SHORT(sAddr) IX_OSAL_READ_SHORT_LE_AC(sAddr)
+#define IX_OSAL_READ_BYTE(bAddr) IX_OSAL_READ_BYTE_LE_AC(bAddr)
+#define IX_OSAL_WRITE_LONG(wAddr, wData) IX_OSAL_WRITE_LONG_LE_AC(wAddr, wData)
+#define IX_OSAL_WRITE_SHORT(sAddr, sData) IX_OSAL_WRITE_SHORT_LE_AC(sAddr, sData)
+#define IX_OSAL_WRITE_BYTE(bAddr, bData) IX_OSAL_WRITE_BYTE_LE_AC(bAddr, bData)
+
+#elif defined (IX_OSAL_LE_DC_MAPPING)
+
+#define IX_OSAL_READ_LONG(wAddr) IX_OSAL_READ_LONG_LE_DC(wAddr)
+#define IX_OSAL_READ_SHORT(sAddr) IX_OSAL_READ_SHORT_LE_DC(sAddr)
+#define IX_OSAL_READ_BYTE(bAddr) IX_OSAL_READ_BYTE_LE_DC(bAddr)
+#define IX_OSAL_WRITE_LONG(wAddr, wData) IX_OSAL_WRITE_LONG_LE_DC(wAddr, wData)
+#define IX_OSAL_WRITE_SHORT(sAddr, sData) IX_OSAL_WRITE_SHORT_LE_DC(sAddr, sData)
+#define IX_OSAL_WRITE_BYTE(bAddr, bData) IX_OSAL_WRITE_BYTE_LE_DC(bAddr, bData)
+
+#endif /* End of BE and LE coherency mode switch */
+
+
+/* Reads/writes to and from memory shared with NPEs - depends on the SDRAM coherency */
+
+#if defined (IX_SDRAM_BE)
+
+#define IX_OSAL_READ_BE_SHARED_LONG(wAddr) IX_OSAL_READ_LONG_RAW(wAddr)
+#define IX_OSAL_READ_BE_SHARED_SHORT(sAddr) IX_OSAL_READ_SHORT_RAW(sAddr)
+#define IX_OSAL_READ_BE_SHARED_BYTE(bAddr) IX_OSAL_READ_BYTE_RAW(bAddr)
+
+#define IX_OSAL_WRITE_BE_SHARED_LONG(wAddr, wData) IX_OSAL_WRITE_LONG_RAW(wAddr, wData)
+#define IX_OSAL_WRITE_BE_SHARED_SHORT(sAddr, sData) IX_OSAL_WRITE_SHORT_RAW(sAddr, sData)
+#define IX_OSAL_WRITE_BE_SHARED_BYTE(bAddr, bData) IX_OSAL_WRITE_BYTE_RAW(bAddr, bData)
+
+#define IX_OSAL_SWAP_BE_SHARED_LONG(wData) (wData)
+#define IX_OSAL_SWAP_BE_SHARED_SHORT(sData) (sData)
+#define IX_OSAL_SWAP_BE_SHARED_BYTE(bData) (bData)
+
+#elif defined (IX_SDRAM_LE_ADDRESS_COHERENT)
+
+#define IX_OSAL_READ_BE_SHARED_LONG(wAddr) IX_OSAL_READ_LONG_RAW(wAddr)
+#define IX_OSAL_READ_BE_SHARED_SHORT(sAddr) IX_OSAL_READ_SHORT_RAW(IX_OSAL_SWAP_SHORT_ADDRESS(sAddr))
+#define IX_OSAL_READ_BE_SHARED_BYTE(bAddr) IX_OSAL_READ_BYTE_RAW(IX_OSAL_SWAP_BYTE_ADDRESS(bAddr))
+
+#define IX_OSAL_WRITE_BE_SHARED_LONG(wAddr, wData) IX_OSAL_WRITE_LONG_RAW(wAddr, wData)
+#define IX_OSAL_WRITE_BE_SHARED_SHORT(sAddr, sData) IX_OSAL_WRITE_SHORT_RAW(IX_OSAL_SWAP_SHORT_ADDRESS(sAddr), sData)
+#define IX_OSAL_WRITE_BE_SHARED_BYTE(bAddr, bData) IX_OSAL_WRITE_BYTE_RAW(IX_OSAL_SWAP_BYTE_ADDRESS(bAddr), bData)
+
+#define IX_OSAL_SWAP_BE_SHARED_LONG(wData) (wData)
+#define IX_OSAL_SWAP_BE_SHARED_SHORT(sData) (sData)
+#define IX_OSAL_SWAP_BE_SHARED_BYTE(bData) (bData)
+
+#elif defined (IX_SDRAM_LE_DATA_COHERENT)
+
+#define IX_OSAL_READ_BE_SHARED_LONG(wAddr) IX_OSAL_SWAP_LONG(IX_OSAL_READ_LONG_RAW(wAddr))
+#define IX_OSAL_READ_BE_SHARED_SHORT(sAddr) IX_OSAL_SWAP_SHORT(IX_OSAL_READ_SHORT_RAW(sAddr))
+#define IX_OSAL_READ_BE_SHARED_BYTE(bAddr) IX_OSAL_READ_BYTE_RAW(bAddr)
+
+#define IX_OSAL_WRITE_BE_SHARED_LONG(wAddr, wData) IX_OSAL_WRITE_LONG_RAW(wAddr, IX_OSAL_SWAP_LONG(wData))
+#define IX_OSAL_WRITE_BE_SHARED_SHORT(sAddr, sData) IX_OSAL_WRITE_SHORT_RAW(sAddr, IX_OSAL_SWAP_SHORT(sData))
+#define IX_OSAL_WRITE_BE_SHARED_BYTE(bAddr, bData) IX_OSAL_WRITE_BYTE_RAW(bAddr, bData)
+
+#define IX_OSAL_SWAP_BE_SHARED_LONG(wData) IX_OSAL_SWAP_LONG(wData)
+#define IX_OSAL_SWAP_BE_SHARED_SHORT(sData) IX_OSAL_SWAP_SHORT(sData)
+
+#endif
+
+
+#define IX_OSAL_COPY_BE_SHARED_LONG_ARRAY(wDestAddr, wSrcAddr, wCount) \
+ { \
+ UINT32 i; \
+ \
+ for ( i = 0 ; i < wCount ; i++ ) \
+ { \
+ * (((UINT32 *) wDestAddr) + i) = IX_OSAL_READ_BE_SHARED_LONG(((UINT32 *) wSrcAddr) + i); \
+ }; \
+ };
+
+#endif /* IxOsalMemAccess_H */
diff --git a/cpu/ixp/npe/include/IxOsalOem.h b/cpu/ixp/npe/include/IxOsalOem.h
new file mode 100644
index 0000000000..f89402620c
--- /dev/null
+++ b/cpu/ixp/npe/include/IxOsalOem.h
@@ -0,0 +1,97 @@
+/**
+ * @file IxOsalIxpOem.h
+ *
+ * @brief this file contains platform-specific defines.
+ *
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+#ifndef IxOsalOem_H
+#define IxOsalOem_H
+
+#include "IxOsalTypes.h"
+
+/* OS-specific header for Platform package */
+#include "IxOsalOsIxp400.h"
+
+/*
+ * Platform Name
+ */
+#define IX_OSAL_PLATFORM_NAME ixp400
+
+/*
+ * Cache line size
+ */
+#define IX_OSAL_CACHE_LINE_SIZE (32)
+
+
+/* Platform-specific fastmutex implementation */
+PUBLIC IX_STATUS ixOsalOemFastMutexTryLock (IxOsalFastMutex * mutex);
+
+/* Platform-specific init (MemMap) */
+PUBLIC IX_STATUS
+ixOsalOemInit (void);
+
+/* Platform-specific unload (MemMap) */
+PUBLIC void
+ixOsalOemUnload (void);
+
+/* Default implementations */
+
+PUBLIC UINT32
+ixOsalIxp400SharedTimestampGet (void);
+
+
+UINT32
+ixOsalIxp400SharedTimestampRateGet (void);
+
+UINT32
+ixOsalIxp400SharedSysClockRateGet (void);
+
+void
+ixOsalIxp400SharedTimeGet (IxOsalTimeval * tv);
+
+
+INT32
+ixOsalIxp400SharedLog (UINT32 level, UINT32 device, char *format,
+ int arg1, int arg2, int arg3, int arg4,
+ int arg5, int arg6);
+
+#endif /* IxOsal_Oem_H */
diff --git a/cpu/ixp/npe/include/IxOsalOs.h b/cpu/ixp/npe/include/IxOsalOs.h
new file mode 100644
index 0000000000..6c66613415
--- /dev/null
+++ b/cpu/ixp/npe/include/IxOsalOs.h
@@ -0,0 +1,30 @@
+#ifndef IxOsalOs_H
+#define IxOsalOs_H
+
+#ifndef IX_OSAL_CACHED
+#error "Uncached memory not supported in linux environment"
+#endif
+
+static inline unsigned long __v2p(unsigned long v)
+{
+ if (v < 0x40000000)
+ return (v & 0xfffffff);
+ else
+ return v;
+}
+
+#define IX_OSAL_OS_MMU_VIRT_TO_PHYS(addr) __v2p((u32)addr)
+#define IX_OSAL_OS_MMU_PHYS_TO_VIRT(addr) (addr)
+
+/*
+ * Data cache not enabled (hopefully)
+ */
+#define IX_OSAL_OS_CACHE_INVALIDATE(addr, size)
+#define IX_OSAL_OS_CACHE_FLUSH(addr, size)
+#define HAL_DCACHE_INVALIDATE(addr, size)
+#define HAL_DCACHE_FLUSH(addr, size)
+
+#define __ixp42X /* sr: U-Boot needs this define */
+
+#endif /* IxOsalOs_H */
+
diff --git a/cpu/ixp/npe/include/IxOsalOsAssert.h b/cpu/ixp/npe/include/IxOsalOsAssert.h
new file mode 100644
index 0000000000..e4c3e1f614
--- /dev/null
+++ b/cpu/ixp/npe/include/IxOsalOsAssert.h
@@ -0,0 +1,10 @@
+#ifndef IxOsalOsAssert_H
+#define IxOsalOsAssert_H
+
+#define IX_OSAL_OS_ASSERT(c) if(!(c)) \
+ { \
+ ixOsalLog (IX_OSAL_LOG_LVL_ERROR, IX_OSAL_LOG_DEV_STDOUT, "Assertion failure \n", 0, 0, 0, 0, 0, 0);\
+ while(1); \
+ }
+
+#endif /* IxOsalOsAssert_H */
diff --git a/cpu/ixp/npe/include/IxOsalOsBufferMgt.h b/cpu/ixp/npe/include/IxOsalOsBufferMgt.h
new file mode 100644
index 0000000000..8e46586ea0
--- /dev/null
+++ b/cpu/ixp/npe/include/IxOsalOsBufferMgt.h
@@ -0,0 +1,96 @@
+/**
+ * @file IxOsalOsBufferMgt.h
+ *
+ * @brief vxworks-specific buffer management module definitions.
+ *
+ * Design Notes:
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+
+#ifndef IX_OSAL_OS_BUFFER_MGT_H
+#define IX_OSAL_OS_BUFFER_MGT_H
+
+/*
+ * use the defaul bufferMgt provided by OSAL framework.
+ */
+#define IX_OSAL_USE_DEFAULT_BUFFER_MGT
+
+#include "IxOsalBufferMgtDefault.h"
+
+#if 0 /* FIXME */
+/* Define os-specific buffer macros for subfields */
+#define IX_OSAL_OSBUF_MDATA(osBufPtr) IX_OSAL_MBUF_MDATA(osBufPtr)
+ ( ((M_BLK *) osBufPtr)->m_data )
+
+#define IX_OSAL_OSBUF_MLEN(osBufPtr) \
+ ( ((M_BLK *) osBufPtr)->m_len )
+
+#define IX_OSAL_OSBUF_PKT_LEN(osBufPtr) \
+ ( ((M_BLK *) osBufPtr)->m_pkthdr.len )
+
+#define IX_OSAL_OS_CONVERT_OSBUF_TO_IXPBUF( osBufPtr, ixpBufPtr) \
+ { \
+ IX_OSAL_MBUF_OSBUF_PTR( (IX_OSAL_MBUF *) ixpBufPtr) = (void *) osBufPtr; \
+ IX_OSAL_MBUF_MDATA((IX_OSAL_MBUF *) ixpBufPtr) = IX_OSAL_OSBUF_MDATA(osBufPtr); \
+ IX_OSAL_MBUF_PKT_LEN((IX_OSAL_MBUF *) ixpBufPtr) = IX_OSAL_OSBUF_PKT_LEN(osBufPtr); \
+ IX_OSAL_MBUF_MLEN((IX_OSAL_MBUF *) ixpBufPtr) = IX_OSAL_OSBUF_MLEN(osBufPtr); \
+ }
+
+#define IX_OSAL_OS_CONVERT_IXPBUF_TO_OSBUF( ixpBufPtr, osBufPtr) \
+ { \
+ if (ixpBufPtr == NULL) \
+ { /* Do nothing */ } \
+ else \
+ { \
+ (M_BLK *) osBufPtr = (M_BLK *) IX_OSAL_MBUF_OSBUF_PTR((IX_OSAL_MBUF *) ixpBufPtr); \
+ if (osBufPtr == NULL) \
+ { /* Do nothing */ } \
+ else \
+ { \
+ IX_OSAL_OSBUF_MLEN(osBufPtr) =IX_OSAL_MBUF_MLEN((IX_OSAL_MBUF *) ixpBufPtr); \
+ IX_OSAL_OSBUF_PKT_LEN(osBufPtr) =IX_OSAL_MBUF_PKT_LEN((IX_OSAL_MBUF *) ixpBufPtr); \
+ } \
+ } \
+ }
+
+#endif /* FIXME */
+
+#endif /* #define IX_OSAL_OS_BUFFER_MGT_H */
diff --git a/cpu/ixp/npe/include/IxOsalOsIxp400.h b/cpu/ixp/npe/include/IxOsalOsIxp400.h
new file mode 100644
index 0000000000..44a94fb30f
--- /dev/null
+++ b/cpu/ixp/npe/include/IxOsalOsIxp400.h
@@ -0,0 +1,316 @@
+/**
+ * @file IxOsalOsIxp400.h
+ *
+ * @brief OS and platform specific definitions
+ *
+ * Design Notes:
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+#ifndef IxOsalOsIxp400_H
+#define IxOsalOsIxp400_H
+
+#define BIT(x) (1<<(x))
+
+#define IXP425_EthA_BASE 0xc8009000
+#define IXP425_EthB_BASE 0xc800a000
+
+#define IXP425_PSMA_BASE 0xc8006000
+#define IXP425_PSMB_BASE 0xc8007000
+#define IXP425_PSMC_BASE 0xc8008000
+
+#define IXP425_PERIPHERAL_BASE 0xc8000000
+
+#define IXP425_QMGR_BASE 0x60000000
+#define IXP425_OSTS 0xC8005000
+
+#define IXP425_INT_LVL_NPEA 0
+#define IXP425_INT_LVL_NPEB 1
+#define IXP425_INT_LVL_NPEC 2
+
+#define IXP425_INT_LVL_QM1 3
+#define IXP425_INT_LVL_QM2 4
+
+#define IXP425_EXPANSION_BUS_BASE1 0x50000000
+#define IXP425_EXPANSION_BUS_BASE2 0x50000000
+#define IXP425_EXPANSION_BUS_CS1_BASE 0x51000000
+
+#define IXP425_EXP_CONFIG_BASE 0xC4000000
+
+/* physical addresses to be used when requesting memory with IX_OSAL_MEM_MAP */
+#define IX_OSAL_IXP400_INTC_PHYS_BASE IXP425_INTC_BASE
+#define IX_OSAL_IXP400_GPIO_PHYS_BASE IXP425_GPIO_BASE
+#define IX_OSAL_IXP400_UART1_PHYS_BASE IXP425_UART1_BASE
+#define IX_OSAL_IXP400_UART2_PHYS_BASE IXP425_UART2_BASE
+#define IX_OSAL_IXP400_ETHA_PHYS_BASE IXP425_EthA_BASE
+#define IX_OSAL_IXP400_ETHB_PHYS_BASE IXP425_EthB_BASE
+#define IX_OSAL_IXP400_NPEA_PHYS_BASE IXP425_NPEA_BASE
+#define IX_OSAL_IXP400_NPEB_PHYS_BASE IXP425_NPEB_BASE
+#define IX_OSAL_IXP400_NPEC_PHYS_BASE IXP425_NPEC_BASE
+#define IX_OSAL_IXP400_PERIPHERAL_PHYS_BASE IXP425_PERIPHERAL_BASE
+#define IX_OSAL_IXP400_QMGR_PHYS_BASE IXP425_QMGR_BASE
+#define IX_OSAL_IXP400_OSTS_PHYS_BASE IXP425_TIMER_BASE
+#define IX_OSAL_IXP400_USB_PHYS_BASE IXP425_USB_BASE
+#define IX_OSAL_IXP400_EXP_CFG_PHYS_BASE IXP425_EXP_CFG_BASE
+#define IX_OSAL_IXP400_EXP_BUS_PHYS_BASE IXP425_EXP_BUS_BASE2
+#define IX_OSAL_IXP400_EXP_BUS_BOOT_PHYS_BASE IXP425_EXP_BUS_BASE1
+#define IX_OSAL_IXP400_EXP_BUS_CS0_PHYS_BASE IXP425_EXP_BUS_CS0_BASE
+#define IX_OSAL_IXP400_EXP_BUS_CS1_PHYS_BASE IXP425_EXP_BUS_CS1_BASE
+#define IX_OSAL_IXP400_EXP_BUS_CS4_PHYS_BASE IXP425_EXP_BUS_CS4_BASE
+#define IX_OSAL_IXP400_EXP_BUS_REGS_PHYS_BASE IXP425_EXP_CFG_BASE
+#define IX_OSAL_IXP400_PCI_CFG_PHYS_BASE IXP425_PCI_CFG_BASE
+
+/* map sizes to be used when requesting memory with IX_OSAL_MEM_MAP */
+#define IX_OSAL_IXP400_QMGR_MAP_SIZE (0x4000) /**< Queue Manager map size */
+#define IX_OSAL_IXP400_PERIPHERAL_MAP_SIZE (0xC000) /**< Peripheral space map size */
+#define IX_OSAL_IXP400_UART1_MAP_SIZE (0x1000) /**< UART1 map size */
+#define IX_OSAL_IXP400_UART2_MAP_SIZE (0x1000) /**< UART2 map size */
+#define IX_OSAL_IXP400_PMU_MAP_SIZE (0x1000) /**< PMU map size */
+#define IX_OSAL_IXP400_OSTS_MAP_SIZE (0x1000) /**< OS Timers map size */
+#define IX_OSAL_IXP400_NPEA_MAP_SIZE (0x1000) /**< NPE A map size */
+#define IX_OSAL_IXP400_NPEB_MAP_SIZE (0x1000) /**< NPE B map size */
+#define IX_OSAL_IXP400_NPEC_MAP_SIZE (0x1000) /**< NPE C map size */
+#define IX_OSAL_IXP400_ETHA_MAP_SIZE (0x1000) /**< Eth A map size */
+#define IX_OSAL_IXP400_ETHB_MAP_SIZE (0x1000) /**< Eth B map size */
+#define IX_OSAL_IXP400_USB_MAP_SIZE (0x1000) /**< USB map size */
+#define IX_OSAL_IXP400_GPIO_MAP_SIZE (0x1000) /**< GPIO map size */
+#define IX_OSAL_IXP400_EXP_REG_MAP_SIZE (0x1000) /**< Exp Bus Config Registers map size */
+#define IX_OSAL_IXP400_EXP_BUS_MAP_SIZE (0x08000000) /**< Expansion bus map size */
+#define IX_OSAL_IXP400_EXP_BUS_CS0_MAP_SIZE (0x01000000) /**< CS0 map size */
+#define IX_OSAL_IXP400_EXP_BUS_CS1_MAP_SIZE (0x01000000) /**< CS1 map size */
+#define IX_OSAL_IXP400_EXP_BUS_CS4_MAP_SIZE (0x01000000) /**< CS4 map size */
+#define IX_OSAL_IXP400_PCI_CFG_MAP_SIZE (0x1000) /**< PCI Bus Config Registers map size */
+
+#define IX_OSAL_IXP400_EXP_FUSE (IXP425_EXP_CONFIG_BASE + 0x28)
+#define IX_OSAL_IXP400_ETH_NPEA_PHYS_BASE 0xC800C000
+#define IX_OSAL_IXP400_ETH_NPEA_MAP_SIZE 0x1000
+
+/*
+ * Interrupt Levels
+ */
+#define IX_OSAL_IXP400_NPEA_IRQ_LVL (0)
+#define IX_OSAL_IXP400_NPEB_IRQ_LVL (1)
+#define IX_OSAL_IXP400_NPEC_IRQ_LVL (2)
+#define IX_OSAL_IXP400_QM1_IRQ_LVL (3)
+#define IX_OSAL_IXP400_QM2_IRQ_LVL (4)
+#define IX_OSAL_IXP400_TIMER1_IRQ_LVL (5)
+#define IX_OSAL_IXP400_GPIO0_IRQ_LVL (6)
+#define IX_OSAL_IXP400_GPIO1_IRQ_LVL (7)
+#define IX_OSAL_IXP400_PCI_INT_IRQ_LVL (8)
+#define IX_OSAL_IXP400_PCI_DMA1_IRQ_LVL (9)
+#define IX_OSAL_IXP400_PCI_DMA2_IRQ_LVL (10)
+#define IX_OSAL_IXP400_TIMER2_IRQ_LVL (11)
+#define IX_OSAL_IXP400_USB_IRQ_LVL (12)
+#define IX_OSAL_IXP400_UART2_IRQ_LVL (13)
+#define IX_OSAL_IXP400_TIMESTAMP_IRQ_LVL (14)
+#define IX_OSAL_IXP400_UART1_IRQ_LVL (15)
+#define IX_OSAL_IXP400_WDOG_IRQ_LVL (16)
+#define IX_OSAL_IXP400_AHB_PMU_IRQ_LVL (17)
+#define IX_OSAL_IXP400_XSCALE_PMU_IRQ_LVL (18)
+#define IX_OSAL_IXP400_GPIO2_IRQ_LVL (19)
+#define IX_OSAL_IXP400_GPIO3_IRQ_LVL (20)
+#define IX_OSAL_IXP400_GPIO4_IRQ_LVL (21)
+#define IX_OSAL_IXP400_GPIO5_IRQ_LVL (22)
+#define IX_OSAL_IXP400_GPIO6_IRQ_LVL (23)
+#define IX_OSAL_IXP400_GPIO7_IRQ_LVL (24)
+#define IX_OSAL_IXP400_GPIO8_IRQ_LVL (25)
+#define IX_OSAL_IXP400_GPIO9_IRQ_LVL (26)
+#define IX_OSAL_IXP400_GPIO10_IRQ_LVL (27)
+#define IX_OSAL_IXP400_GPIO11_IRQ_LVL (28)
+#define IX_OSAL_IXP400_GPIO12_IRQ_LVL (29)
+#define IX_OSAL_IXP400_SW_INT1_IRQ_LVL (30)
+#define IX_OSAL_IXP400_SW_INT2_IRQ_LVL (31)
+
+/* USB interrupt level mask */
+#define IX_OSAL_IXP400_INT_LVL_USB IRQ_IXP425_USB
+
+/* USB IRQ */
+#define IX_OSAL_IXP400_USB_IRQ IRQ_IXP425_USB
+
+/*
+ * OS name retrieval
+ */
+#define IX_OSAL_OEM_OS_NAME_GET(name, limit) \
+ixOsalOsIxp400NameGet((INT8*)(name), (INT32) (limit))
+
+/*
+ * OS version retrieval
+ */
+#define IX_OSAL_OEM_OS_VERSION_GET(version, limit) \
+ixOsalOsIxp400VersionGet((INT8*)(version), (INT32) (limit))
+
+/*
+ * Function to retrieve the OS name
+ */
+PUBLIC IX_STATUS ixOsalOsIxp400NameGet(INT8* osName, INT32 maxSize);
+
+/*
+ * Function to retrieve the OS version
+ */
+PUBLIC IX_STATUS ixOsalOsIxp400VersionGet(INT8* osVersion, INT32 maxSize);
+
+/*
+ * TimestampGet
+ */
+PUBLIC UINT32 ixOsalOsIxp400TimestampGet (void);
+
+/*
+ * Timestamp
+ */
+#define IX_OSAL_OEM_TIMESTAMP_GET ixOsalOsIxp400TimestampGet
+
+
+/*
+ * Timestamp resolution
+ */
+PUBLIC UINT32 ixOsalOsIxp400TimestampResolutionGet (void);
+
+#define IX_OSAL_OEM_TIMESTAMP_RESOLUTION_GET ixOsalOsIxp400TimestampResolutionGet
+
+/*
+ * Retrieves the system clock rate
+ */
+PUBLIC UINT32 ixOsalOsIxp400SysClockRateGet (void);
+
+#define IX_OSAL_OEM_SYS_CLOCK_RATE_GET ixOsalOsIxp400SysClockRateGet
+
+/*
+ * required by FS but is not really platform-specific.
+ */
+#define IX_OSAL_OEM_TIME_GET(pTv) ixOsalTimeGet(pTv)
+
+
+
+/* linux map/unmap functions */
+PUBLIC void ixOsalLinuxMemMap (IxOsalMemoryMap * map);
+
+PUBLIC void ixOsalLinuxMemUnmap (IxOsalMemoryMap * map);
+
+
+/*********************
+ * Memory map
+ ********************/
+
+/* Global memmap only visible to IO MEM module */
+
+#ifdef IxOsalIoMem_C
+
+IxOsalMemoryMap ixOsalGlobalMemoryMap[] = {
+ {
+ /* Global BE and LE_AC map */
+ IX_OSAL_STATIC_MAP, /* type */
+ 0x00000000, /* physicalAddress */
+ 0x30000000, /* size */
+ 0x00000000, /* virtualAddress */
+ NULL, /* mapFunction */
+ NULL, /* unmapFunction */
+ 0, /* refCount */
+ IX_OSAL_BE | IX_OSAL_LE_AC,/* endianType */
+ "global_low" /* name */
+ },
+
+ /* SDRAM LE_DC alias */
+ {
+ IX_OSAL_STATIC_MAP, /* type */
+ 0x00000000, /* physicalAddress */
+ 0x10000000, /* size */
+ 0x30000000, /* virtualAddress */
+ NULL, /* mapFunction */
+ NULL, /* unmapFunction */
+ 0, /* refCount */
+ IX_OSAL_LE_DC, /* endianType */
+ "sdram_dc" /* name */
+ },
+
+ /* QMGR LE_DC alias */
+ {
+ IX_OSAL_STATIC_MAP, /* type */
+ 0x60000000, /* physicalAddress */
+ 0x00100000, /* size */
+ 0x60000000, /* virtualAddress */
+ NULL, /* mapFunction */
+ NULL, /* unmapFunction */
+ 0, /* refCount */
+ IX_OSAL_LE_DC, /* endianType */
+ "qmgr_dc" /* name */
+ },
+
+ /* QMGR BE alias */
+ {
+ IX_OSAL_STATIC_MAP, /* type */
+ 0x60000000, /* physicalAddress */
+ 0x00100000, /* size */
+ 0x60000000, /* virtualAddress */
+ NULL, /* mapFunction */
+ NULL, /* unmapFunction */
+ 0, /* refCount */
+ IX_OSAL_BE | IX_OSAL_LE_AC,/* endianType */
+ "qmgr_be" /* name */
+ },
+
+ /* Global BE and LE_AC map */
+ {
+ IX_OSAL_STATIC_MAP, /* type */
+ 0x40000000, /* physicalAddress */
+ 0x20000000, /* size */
+ 0x40000000, /* virtualAddress */
+ NULL, /* mapFunction */
+ NULL, /* unmapFunction */
+ 0, /* refCount */
+ IX_OSAL_BE | IX_OSAL_LE_AC,/* endianType */
+ "Misc Cfg" /* name */
+ },
+
+ /* Global BE and LE_AC map */
+ {
+ IX_OSAL_STATIC_MAP, /* type */
+ 0x70000000, /* physicalAddress */
+ 0x8FFFFFFF, /* size */
+ 0x70000000, /* virtualAddress */
+ NULL, /* mapFunction */
+ NULL, /* unmapFunction */
+ 0, /* refCount */
+ IX_OSAL_BE | IX_OSAL_LE_AC,/* endianType */
+ "Exp Cfg" /* name */
+ },
+};
+
+#endif /* IxOsalIoMem_C */
+#endif /* #define IxOsalOsIxp400_H */
diff --git a/cpu/ixp/npe/include/IxOsalOsIxp400CustomizedMapping.h b/cpu/ixp/npe/include/IxOsalOsIxp400CustomizedMapping.h
new file mode 100644
index 0000000000..47ce3a2d80
--- /dev/null
+++ b/cpu/ixp/npe/include/IxOsalOsIxp400CustomizedMapping.h
@@ -0,0 +1,404 @@
+/**
+ * @file IxOsalOsIxp400CustomizedMapping.h
+ *
+ * @brief Set LE coherency modes for components.
+ * The default setting is IX_OSAL_NO_MAPPING for LE.
+ *
+ *
+ * By default IX_OSAL_STATIC_MEMORY_MAP is defined for all the components.
+ * If any component uses a dynamic memory map it must define
+ * IX_OSAL_DYNAMIC_MEMORY_MAP in its corresponding section.
+ *
+ *
+ * @par
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+#ifndef IxOsalOsIxp400CustomizedMapping_H
+#define IxOsalOsIxp400CustomizedMapping_H
+
+/*
+ * only include this file in Little Endian
+ */
+
+#if defined (IX_OSAL_LINUX_BE)
+#error Only include IxOsalOsIxp400CustomizedMapping.h in Little Endian
+#endif
+
+ /*
+ * Components don't have to be in this list if
+ * the default mapping is OK.
+ */
+#define ix_osal 1
+#define ix_dmaAcc 2
+#define ix_atmdAcc 3
+
+#define ix_atmsch 5
+#define ix_ethAcc 6
+#define ix_npeMh 7
+#define ix_qmgr 8
+#define ix_npeDl 9
+#define ix_atmm 10
+#define ix_hssAcc 11
+#define ix_ethDB 12
+#define ix_ethMii 13
+#define ix_timerCtrl 14
+#define ix_adsl 15
+#define ix_usb 16
+#define ix_uartAcc 17
+#define ix_featureCtrl 18
+#define ix_cryptoAcc 19
+#define ix_unloadAcc 33
+#define ix_perfProfAcc 34
+#define ix_parityENAcc 49
+#define ix_sspAcc 51
+#define ix_timeSyncAcc 52
+#define ix_i2c 53
+
+#define ix_codelets_uartAcc 21
+#define ix_codelets_timers 22
+#define ix_codelets_atm 23
+#define ix_codelets_ethAal5App 24
+#define ix_codelets_demoUtils 26
+#define ix_codelets_usb 27
+#define ix_codelets_hssAcc 28
+#define ix_codelets_dmaAcc 40
+#define ix_codelets_cryptoAcc 41
+#define ix_codelets_perfProfAcc 42
+#define ix_codelets_ethAcc 43
+#define ix_codelets_parityENAcc 54
+#define ix_codelets_timeSyncAcc 55
+
+
+#endif /* IxOsalOsIxp400CustomizedMapping_H */
+
+
+/***************************
+ * osal
+ ***************************/
+#if (IX_COMPONENT_NAME == ix_osal)
+
+#define IX_OSAL_LE_AC_MAPPING
+
+#endif /* osal */
+
+/***************************
+ * dmaAcc
+ ***************************/
+#if (IX_COMPONENT_NAME == ix_dmaAcc)
+
+#define IX_OSAL_LE_AC_MAPPING
+
+#endif /* dmaAcc */
+
+/***************************
+ * atmdAcc
+ ***************************/
+#if (IX_COMPONENT_NAME == ix_atmdAcc)
+
+#define IX_OSAL_LE_AC_MAPPING
+
+#endif /* atmdAcc */
+
+/***************************
+ * atmsch
+ ***************************/
+#if (IX_COMPONENT_NAME == ix_atmsch)
+
+#define IX_OSAL_LE_AC_MAPPING
+
+#endif /* atmsch */
+
+/***************************
+ * ethAcc
+ ***************************/
+#if (IX_COMPONENT_NAME == ix_ethAcc)
+
+#define IX_OSAL_LE_AC_MAPPING
+
+#endif /* ethAcc */
+
+/***************************
+ * npeMh
+ ***************************/
+#if (IX_COMPONENT_NAME == ix_npeMh)
+
+#define IX_OSAL_LE_AC_MAPPING
+
+#endif /* npeMh */
+
+/***************************
+ * qmgr
+ ***************************/
+#if (IX_COMPONENT_NAME == ix_qmgr)
+
+#define IX_OSAL_LE_DC_MAPPING
+
+#endif /* qmgr */
+
+/***************************
+ * npeDl
+ ***************************/
+#if (IX_COMPONENT_NAME == ix_npeDl)
+
+#define IX_OSAL_LE_AC_MAPPING
+
+#endif /* npeDl */
+
+/***************************
+ * atmm
+ ***************************/
+#if (IX_COMPONENT_NAME == ix_atmm)
+
+#define IX_OSAL_LE_AC_MAPPING
+
+#endif /* atmm */
+
+/***************************
+ * ethMii
+ ***************************/
+#if (IX_COMPONENT_NAME == ix_ethMii)
+
+#define IX_OSAL_LE_AC_MAPPING
+
+#endif /* ethMii */
+
+
+/***************************
+ * adsl
+ ***************************/
+#if (IX_COMPONENT_NAME == ix_adsl)
+
+#define IX_OSAL_LE_AC_MAPPING
+
+#endif /* adsl */
+
+/***************************
+ * usb
+ ***************************/
+#if (IX_COMPONENT_NAME == ix_usb)
+
+#define IX_OSAL_LE_AC_MAPPING
+
+#endif /* usb */
+
+/***************************
+ * uartAcc
+ ***************************/
+#if (IX_COMPONENT_NAME == ix_uartAcc)
+
+#define IX_OSAL_LE_AC_MAPPING
+
+#endif /* uartAcc */
+
+/***************************
+ * featureCtrl
+ ***************************/
+#if (IX_COMPONENT_NAME == ix_featureCtrl)
+
+#define IX_OSAL_LE_AC_MAPPING
+
+#endif /* featureCtrl */
+
+/***************************
+ * cryptoAcc
+ ***************************/
+#if (IX_COMPONENT_NAME == ix_cryptoAcc)
+
+#define IX_OSAL_LE_AC_MAPPING
+
+#endif /* cryptoAcc */
+
+/***************************
+ * codelets_usb
+ ***************************/
+#if (IX_COMPONENT_NAME == ix_codelets_usb)
+
+#define IX_OSAL_LE_AC_MAPPING
+
+#endif /* codelets_usb */
+
+
+/***************************
+ * codelets_uartAcc
+ ***************************/
+#if (IX_COMPONENT_NAME == ix_codelets_uartAcc)
+
+#define IX_OSAL_LE_AC_MAPPING
+
+#endif /* codelets_uartAcc */
+
+
+
+/***************************
+ * codelets_timers
+ ***************************/
+#if (IX_COMPONENT_NAME == ix_codelets_timers)
+
+#define IX_OSAL_LE_AC_MAPPING
+
+#endif /* codelets_timers */
+
+/***************************
+ * codelets_atm
+ ***************************/
+#if (IX_COMPONENT_NAME == ix_codelets_atm)
+
+#define IX_OSAL_LE_AC_MAPPING
+
+#endif /* codelets_atm */
+
+/***************************
+ * codelets_ethAal5App
+ ***************************/
+#if (IX_COMPONENT_NAME == ix_codelets_ethAal5App)
+
+#define IX_OSAL_LE_AC_MAPPING
+
+#endif /* codelets_ethAal5App */
+
+/***************************
+ * codelets_ethAcc
+ ***************************/
+#if (IX_COMPONENT_NAME == ix_codelets_ethAcc)
+
+#define IX_OSAL_LE_AC_MAPPING
+
+#endif /* codelets_ethAcc */
+
+
+/***************************
+ * codelets_demoUtils
+ ***************************/
+#if (IX_COMPONENT_NAME == ix_codelets_demoUtils)
+
+#define IX_OSAL_LE_AC_MAPPING
+
+#endif /* codelets_demoUtils */
+
+
+
+/***************************
+ * perfProfAcc
+ ***************************/
+#if (IX_COMPONENT_NAME == ix_perfProfAcc)
+
+#define IX_OSAL_LE_AC_MAPPING
+
+#endif /* perfProfAcc */
+
+
+/***************************
+ * unloadAcc
+ ***************************/
+#if (IX_COMPONENT_NAME == ix_unloadAcc)
+
+#define IX_OSAL_LE_AC_MAPPING
+
+#endif /* unloadAcc */
+
+
+
+
+
+/***************************
+ * parityENAcc
+ ***************************/
+#if (IX_COMPONENT_NAME == ix_parityENAcc)
+
+#define IX_OSAL_LE_AC_MAPPING
+
+#endif /* parityENAcc */
+
+/***************************
+ * codelets_parityENAcc
+ ***************************/
+#if (IX_COMPONENT_NAME == ix_codelets_parityENAcc)
+
+#define IX_OSAL_LE_AC_MAPPING
+
+#endif /* codelets_parityENAcc */
+
+
+
+
+/***************************
+ * timeSyncAcc
+ ***************************/
+#if (IX_COMPONENT_NAME == ix_timeSyncAcc)
+
+#define IX_OSAL_LE_AC_MAPPING
+
+#endif /* timeSyncAcc */
+
+
+/***************************
+ * codelets_timeSyncAcc
+ ***************************/
+#if (IX_COMPONENT_NAME == ix_codelets_timeSyncAcc)
+
+#define IX_OSAL_LE_AC_MAPPING
+
+#endif /* codelets_timeSyncAcc */
+
+
+
+
+/***************************
+ * i2c
+ ***************************/
+#if (IX_COMPONENT_NAME == ix_i2c)
+
+#define IX_OSAL_LE_AC_MAPPING
+
+#endif /* i2c */
+
+
+
+/***************************
+ * sspAcc
+ ***************************/
+#if (IX_COMPONENT_NAME == ix_sspAcc)
+
+#define IX_OSAL_LE_AC_MAPPING
+
+#endif /* sspAcc */
+
+
diff --git a/cpu/ixp/npe/include/IxOsalOsTypes.h b/cpu/ixp/npe/include/IxOsalOsTypes.h
new file mode 100644
index 0000000000..272eef185e
--- /dev/null
+++ b/cpu/ixp/npe/include/IxOsalOsTypes.h
@@ -0,0 +1,60 @@
+#ifndef IxOsalOsTypes_H
+#define IxOsalOsTypes_H
+
+#include <asm/types.h>
+
+typedef s64 INT64;
+typedef u64 UINT64;
+typedef s32 INT32;
+typedef u32 UINT32;
+typedef s16 INT16;
+typedef u16 UINT16;
+typedef s8 INT8;
+typedef u8 UINT8;
+
+typedef u32 ULONG;
+typedef u16 USHORT;
+typedef u8 UCHAR;
+typedef u32 BOOL;
+
+#if 0 /* FIXME */
+
+/* Default stack limit is 10 KB */
+#define IX_OSAL_OS_THREAD_DEFAULT_STACK_SIZE (10240)
+
+/* Maximum stack limit is 32 MB */
+#define IX_OSAL_OS_THREAD_MAX_STACK_SIZE (33554432) /* 32 MBytes */
+
+/* Default thread priority */
+#define IX_OSAL_OS_DEFAULT_THREAD_PRIORITY (90)
+
+/* Thread maximum priority (0 - 255). 0 - highest priority */
+#define IX_OSAL_OS_MAX_THREAD_PRIORITY (255)
+
+#endif /* FIXME */
+
+#define IX_OSAL_OS_WAIT_FOREVER (-1L)
+#define IX_OSAL_OS_WAIT_NONE 0
+
+
+/* Thread handle is eventually an int type */
+typedef int IxOsalOsThread;
+
+/* Semaphore handle FIXME */
+typedef int IxOsalOsSemaphore;
+
+/* Mutex handle */
+typedef int IxOsalOsMutex;
+
+/*
+ * Fast mutex handle - fast mutex operations are implemented in
+ * native assembler code using atomic test-and-set instructions
+ */
+typedef int IxOsalOsFastMutex;
+
+typedef struct
+{
+} IxOsalOsMessageQueue;
+
+
+#endif /* IxOsalOsTypes_H */
diff --git a/cpu/ixp/npe/include/IxOsalOsUtilitySymbols.h b/cpu/ixp/npe/include/IxOsalOsUtilitySymbols.h
new file mode 100644
index 0000000000..beb45a0794
--- /dev/null
+++ b/cpu/ixp/npe/include/IxOsalOsUtilitySymbols.h
@@ -0,0 +1,4 @@
+#ifndef IxOsalOsUtilitySymbols_H
+#define IxOsalOsUtilitySymbols_H
+
+#endif /* IxOsalOsUtilitySymbols_H */
diff --git a/cpu/ixp/npe/include/IxOsalTypes.h b/cpu/ixp/npe/include/IxOsalTypes.h
new file mode 100644
index 0000000000..c617ec5781
--- /dev/null
+++ b/cpu/ixp/npe/include/IxOsalTypes.h
@@ -0,0 +1,401 @@
+/**
+ * @file IxOsalTypes.h
+ *
+ * @brief Define OSAL basic data types.
+ *
+ * This file contains fundamental data types used by OSAL.
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+
+#ifndef IxOsalTypes_H
+#define IxOsalTypes_H
+
+#include <config.h>
+#include <common.h>
+
+#define __ixp42X /* sr: U-Boot needs this define */
+#define IXP425_EXP_CFG_BASE 0xC4000000
+#define diag_printf debug
+
+#undef SIMSPARCSOLARIS
+#define SIMSPARCSOLARIS 0xaffe /* sr: U-Boot gets confused with this solaris define */
+
+/*
+ * Include the OS-specific type definitions
+ */
+#include "IxOsalOsTypes.h"
+/**
+ * @defgroup IxOsalTypes Osal basic data types.
+ *
+ * @brief Basic data types for Osal
+ *
+ * @{
+ */
+
+/**
+ * @brief OSAL status
+ *
+ * @note Possible OSAL return status include IX_SUCCESS and IX_FAIL.
+ */
+typedef UINT32 IX_STATUS;
+
+/**
+ * @brief VUINT32
+ *
+ * @note volatile UINT32
+ */
+typedef volatile UINT32 VUINT32;
+
+/**
+ * @brief VINT32
+ *
+ * @note volatile INT32
+ */
+typedef volatile INT32 VINT32;
+
+
+#ifndef NUMELEMS
+#define NUMELEMS(x) (sizeof(x) / sizeof((x)[0]))
+#endif
+
+
+/**
+ * @ingroup IxOsalTypes
+ *
+ * @def IX_OSAL_BILLION
+ *
+ * @brief Alias for 1,000,000,000
+ *
+ */
+#define IX_OSAL_BILLION (1000000000)
+
+#ifndef TRUE
+#define TRUE 1L
+#endif
+
+#if TRUE != 1
+#error TRUE is not defined to 1
+#endif
+
+#ifndef FALSE
+#define FALSE 0L
+#endif
+
+#if FALSE != 0
+#error FALSE is not defined to 0
+#endif
+
+#ifndef NULL
+#define NULL 0L
+#endif
+
+/**
+ * @ingroup IxOsalTypes
+ *
+ * @def IX_SUCCESS
+ *
+ * @brief Success status
+ *
+ */
+#ifndef IX_SUCCESS
+#define IX_SUCCESS 0L /**< #defined as 0L */
+#endif
+
+/**
+ * @ingroup IxOsalTypes
+ *
+ * @def IX_FAIL
+ *
+ * @brief Failure status
+ *
+ */
+#ifndef IX_FAIL
+#define IX_FAIL 1L /**< #defined as 1L */
+#endif
+
+
+#ifndef PRIVATE
+#ifdef IX_PRIVATE_OFF
+#define PRIVATE /* nothing */
+#else
+#define PRIVATE static /**< #defined as static, except for debug builds */
+#endif /* IX_PRIVATE_OFF */
+#endif /* PRIVATE */
+
+
+/**
+ * @ingroup IxOsalTypes
+ *
+ * @def IX_OSAL_INLINE
+ *
+ * @brief Alias for __inline
+ *
+ */
+#ifndef IX_OSAL_INLINE
+#define IX_OSAL_INLINE __inline
+#endif /* IX_OSAL_INLINE */
+
+
+#ifndef __inline__
+#define __inline__ IX_OSAL_INLINE
+#endif
+
+
+/* Each OS can define its own PUBLIC, otherwise it will be empty. */
+#ifndef PUBLIC
+#define PUBLIC
+#endif /* PUBLIC */
+
+
+/**
+ * @ingroup IxOsalTypes
+ *
+ * @def IX_OSAL_INLINE_EXTERN
+ *
+ * @brief Alias for __inline extern
+ *
+ */
+#ifndef IX_OSAL_INLINE_EXTERN
+#define IX_OSAL_INLINE_EXTERN IX_OSAL_INLINE extern
+#endif
+
+/**
+ * @ingroup IxOsalTypes
+ * @enum IxOsalLogDevice
+ * @brief This is an emum for OSAL log devices.
+ */
+typedef enum
+{
+ IX_OSAL_LOG_DEV_STDOUT = 0, /**< standard output (implemented by default) */
+ IX_OSAL_LOG_DEV_STDERR = 1, /**< standard error (implemented */
+ IX_OSAL_LOG_DEV_HEX_DISPLAY = 2, /**< hexadecimal display (not implemented) */
+ IX_OSAL_LOG_DEV_ASCII_DISPLAY = 3 /**< ASCII-capable display (not implemented) */
+} IxOsalLogDevice;
+
+
+/**
+ * @ingroup IxOsalTypes
+ *
+ * @def IX_OSAL_LOG_ERROR
+ *
+ * @brief Alias for -1, used as log function error status
+ *
+ */
+#define IX_OSAL_LOG_ERROR (-1)
+
+/**
+ * @ingroup IxOsalTypes
+ * @enum IxOsalLogLevel
+ * @brief This is an emum for OSAL log trace level.
+ */
+typedef enum
+{
+ IX_OSAL_LOG_LVL_NONE = 0, /**<No trace level */
+ IX_OSAL_LOG_LVL_USER = 1, /**<Set trace level to user */
+ IX_OSAL_LOG_LVL_FATAL = 2, /**<Set trace level to fatal */
+ IX_OSAL_LOG_LVL_ERROR = 3, /**<Set trace level to error */
+ IX_OSAL_LOG_LVL_WARNING = 4, /**<Set trace level to warning */
+ IX_OSAL_LOG_LVL_MESSAGE = 5, /**<Set trace level to message */
+ IX_OSAL_LOG_LVL_DEBUG1 = 6, /**<Set trace level to debug1 */
+ IX_OSAL_LOG_LVL_DEBUG2 = 7, /**<Set trace level to debug2 */
+ IX_OSAL_LOG_LVL_DEBUG3 = 8, /**<Set trace level to debug3 */
+ IX_OSAL_LOG_LVL_ALL /**<Set trace level to all */
+} IxOsalLogLevel;
+
+
+/**
+ * @ingroup IxOsalTypes
+ * @brief Void function pointer prototype
+ *
+ * @note accepts a void pointer parameter
+ * and does not return a value.
+ */
+typedef void (*IxOsalVoidFnVoidPtr) (void *);
+
+typedef void (*IxOsalVoidFnPtr) (void);
+
+
+/**
+ * @brief Timeval structure
+ *
+ * @note Contain subfields of seconds and nanoseconds..
+ */
+typedef struct
+{
+ UINT32 secs; /**< seconds */
+ UINT32 nsecs; /**< nanoseconds */
+} IxOsalTimeval;
+
+
+/**
+ * @ingroup IxOsalTypes
+ * @brief IxOsalTimer
+ *
+ * @note OSAL timer handle
+ *
+ */
+typedef UINT32 IxOsalTimer;
+
+
+/**
+ * @ingroup IxOsalTypes
+ *
+ * @def IX_OSAL_WAIT_FOREVER
+ *
+ * @brief Definition for timeout forever, OS-specific.
+ *
+ */
+#define IX_OSAL_WAIT_FOREVER IX_OSAL_OS_WAIT_FOREVER
+
+/**
+ * @ingroup IxOsalTypes
+ *
+ * @def IX_OSAL_WAIT_NONE
+ *
+ * @brief Definition for timeout 0, OS-specific.
+ *
+ */
+#define IX_OSAL_WAIT_NONE IX_OSAL_OS_WAIT_NONE
+
+
+/**
+ * @ingroup IxOsalTypes
+ * @brief IxOsalMutex
+ *
+ * @note Mutex handle, OS-specific
+ *
+ */
+typedef IxOsalOsMutex IxOsalMutex;
+
+/**
+ * @ingroup IxOsalTypes
+ * @brief IxOsalFastMutex
+ *
+ * @note FastMutex handle, OS-specific
+ *
+ */
+typedef IxOsalOsFastMutex IxOsalFastMutex;
+
+/**
+ * @ingroup IxOsalTypes
+ * @brief IxOsalThread
+ *
+ * @note Thread handle, OS-specific
+ *
+ */
+typedef IxOsalOsThread IxOsalThread;
+
+/**
+ * @ingroup IxOsalTypes
+ * @brief IxOsalSemaphore
+ *
+ * @note Semaphore handle, OS-specific
+ *
+ */
+typedef IxOsalOsSemaphore IxOsalSemaphore;
+
+/**
+ * @ingroup IxOsalTypes
+ * @brief IxOsalMessageQueue
+ *
+ * @note Message Queue handle, OS-specific
+ *
+ */
+typedef IxOsalOsMessageQueue IxOsalMessageQueue;
+
+
+/**
+ * @brief Thread Attribute
+ * @note Default thread attribute
+ */
+typedef struct
+{
+ char *name; /**< name */
+ UINT32 stackSize; /**< stack size */
+ UINT32 priority; /**< priority */
+} IxOsalThreadAttr;
+
+/**
+ * @ingroup IxOsalTypes
+ *
+ * @def IX_OSAL_THREAD_DEFAULT_STACK_SIZE
+ *
+ * @brief Default thread stack size, OS-specific.
+ *
+ */
+#define IX_OSAL_THREAD_DEFAULT_STACK_SIZE (IX_OSAL_OS_THREAD_DEFAULT_STACK_SIZE)
+
+/**
+ * @ingroup IxOsalTypes
+ *
+ * @def IX_OSAL_THREAD_MAX_STACK_SIZE
+ *
+ * @brief Max stack size, OS-specific.
+ *
+ */
+#define IX_OSAL_THREAD_MAX_STACK_SIZE (IX_OSAL_OS_THREAD_MAX_STACK_SIZE)
+
+/**
+ * @ingroup IxOsalTypes
+ *
+ * @def IX_OSAL_DEFAULT_THREAD_PRIORITY
+ *
+ * @brief Default thread priority, OS-specific.
+ *
+ */
+#define IX_OSAL_DEFAULT_THREAD_PRIORITY (IX_OSAL_OS_DEFAULT_THREAD_PRIORITY)
+
+/**
+ * @ingroup IxOsalTypes
+ *
+ * @def IX_OSAL_MAX_THREAD_PRIORITY
+ *
+ * @brief Max thread priority, OS-specific.
+ *
+ */
+#define IX_OSAL_MAX_THREAD_PRIORITY (IX_OSAL_OS_MAX_THREAD_PRIORITY)
+
+/**
+ * @} IxOsalTypes
+ */
+
+
+#endif /* IxOsalTypes_H */
diff --git a/cpu/ixp/npe/include/IxOsalUtilitySymbols.h b/cpu/ixp/npe/include/IxOsalUtilitySymbols.h
new file mode 100644
index 0000000000..f2a73db8b9
--- /dev/null
+++ b/cpu/ixp/npe/include/IxOsalUtilitySymbols.h
@@ -0,0 +1,51 @@
+/**
+ * @file
+ *
+ * @brief OSAL Configuration header file
+ *
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+#ifndef IxOsalUtilitySymbols_H
+#define IxOsalUtilitySymbols_H
+
+#include "IxOsalOsUtilitySymbols.h" /* OS-specific utility symbol definitions */
+
+#endif /* IxOsalUtilitySymbols_H */
diff --git a/cpu/ixp/npe/include/IxParityENAcc.h b/cpu/ixp/npe/include/IxParityENAcc.h
new file mode 100644
index 0000000000..62fe1714f1
--- /dev/null
+++ b/cpu/ixp/npe/include/IxParityENAcc.h
@@ -0,0 +1,785 @@
+/**
+ * @file IxParityENAcc.h
+ *
+ * @author Intel Corporation
+ * @date 24 Mar 2004
+ *
+ * @brief This file contains the public API for the IXP400 Parity Error
+ * Notifier access component.
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+/**
+ * @defgroup IxParityENAcc IXP400 Parity Error Notifier (IxParityENAcc) API
+ *
+ * @brief The public API for the Parity Error Notifier
+ *
+ * @{
+ */
+
+#ifndef IXPARITYENACC_H
+#define IXPARITYENACC_H
+
+#ifdef __ixp46X
+
+#include "IxOsal.h"
+
+/*
+ * #defines for function return types, etc.
+ */
+
+/**
+ * @ingroup IxParityENAcc
+ *
+ * @enum IxParityENAccStatus
+ *
+ * @brief The status as returend from the API
+ */
+typedef enum /**< IxParityENAccStatus */
+{
+ IX_PARITYENACC_SUCCESS = IX_SUCCESS, /**< The request is successful */
+ IX_PARITYENACC_INVALID_PARAMETERS, /**< Invalid or NULL parameters passed */
+ IX_PARITYENACC_NOT_INITIALISED, /**< Access layer has not been initialised before accessing the APIs */
+ IX_PARITYENACC_ALREADY_INITIALISED, /**< Access layer has already been initialised */
+ IX_PARITYENACC_OPERATION_FAILED, /**< Operation did not succeed due to hardware failure */
+ IX_PARITYENACC_NO_PARITY /**< No parity condition exits or has already been cleared */
+} IxParityENAccStatus;
+
+/**
+ * @ingroup IxParityENAcc
+ *
+ * @enum IxParityENAccParityType
+ *
+ * @brief Odd or Even Parity Type
+ */
+typedef enum /**< IxParityENAccParityType */
+{
+ IX_PARITYENACC_EVEN_PARITY, /**< Even Parity */
+ IX_PARITYENACC_ODD_PARITY /**< Odd Parity */
+} IxParityENAccParityType;
+
+/**
+ * @ingroup IxParityENAcc
+ *
+ * @enum IxParityENAccConfigOption
+ *
+ * @brief The parity error enable/disable configuration option
+ */
+typedef enum /**< IxParityENAccConfigOption */
+{
+ IX_PARITYENACC_DISABLE, /**< Disable parity error detection */
+ IX_PARITYENACC_ENABLE /**< Enable parity error detection */
+} IxParityENAccConfigOption;
+
+/**
+ * @ingroup IxParityENAcc
+ *
+ * @struct IxParityENAccNpeConfig
+ *
+ * @brief NPE parity detection is to be enabled/disabled
+ */
+typedef struct /**< IxParityENAccNpeConfig */
+{
+ IxParityENAccConfigOption ideEnabled; /**< NPE IMem, DMem and External */
+ IxParityENAccParityType parityOddEven; /**< Parity - Odd or Even */
+} IxParityENAccNpeConfig ;
+
+
+/**
+ * @ingroup IxParityENAcc
+ *
+ * @struct IxParityENAccMcuConfig
+ *
+ * @brief MCU pairty detection is to be enabled/disabled
+ */
+typedef struct /**< IxParityENAccMcuConfig */
+{
+ IxParityENAccConfigOption singlebitDetectEnabled; /**< Single-bit parity error detection */
+ IxParityENAccConfigOption singlebitCorrectionEnabled; /**< Single-bit parity error correction */
+ IxParityENAccConfigOption multibitDetectionEnabled; /**< Multi-bit parity error detection */
+} IxParityENAccMcuConfig ;
+
+
+/**
+ * @ingroup IxParityENAcc
+ *
+ * @struct IxParityENAccEbcConfig
+ *
+ * @brief Expansion Bus Controller parity detection is to be enabled or disabled
+ *
+ * Note: All the Chip Select(s) and External Masters will have the same parity
+ */
+typedef struct /**< IxParityENAccEbcConfig */
+{
+ IxParityENAccConfigOption ebcCs0Enabled; /**< Expansion Bus Controller - Chip Select 0 */
+ IxParityENAccConfigOption ebcCs1Enabled; /**< Expansion Bus Controller - Chip Select 1 */
+ IxParityENAccConfigOption ebcCs2Enabled; /**< Expansion Bus Controller - Chip Select 2 */
+ IxParityENAccConfigOption ebcCs3Enabled; /**< Expansion Bus Controller - Chip Select 3 */
+ IxParityENAccConfigOption ebcCs4Enabled; /**< Expansion Bus Controller - Chip Select 4 */
+ IxParityENAccConfigOption ebcCs5Enabled; /**< Expansion Bus Controller - Chip Select 5 */
+ IxParityENAccConfigOption ebcCs6Enabled; /**< Expansion Bus Controller - Chip Select 6 */
+ IxParityENAccConfigOption ebcCs7Enabled; /**< Expansion Bus Controller - Chip Select 7 */
+ IxParityENAccConfigOption ebcExtMstEnabled; /**< External Master on Expansion bus */
+ IxParityENAccParityType parityOddEven; /**< Parity - Odd or Even */
+} IxParityENAccEbcConfig ;
+
+/**
+ * @ingroup IxParityENAcc
+ *
+ * @struct IxParityENAccHWParityConfig
+ *
+ * @brief Parity error configuration of the Hardware Blocks
+ */
+typedef struct /**< IxParityENAccHWParityConfig */
+{
+ IxParityENAccNpeConfig npeAConfig; /**< NPE A parity detection is to be enabled/disabled */
+ IxParityENAccNpeConfig npeBConfig; /**< NPE B parity detection is to be enabled/disabled */
+ IxParityENAccNpeConfig npeCConfig; /**< NPE C parity detection is to be enabled/disabled */
+ IxParityENAccMcuConfig mcuConfig; /**< MCU pairty detection is to be enabled/disabled */
+ IxParityENAccConfigOption swcpEnabled; /**< SWCP parity detection is to be enabled */
+ IxParityENAccConfigOption aqmEnabled; /**< AQM parity detection is to be enabled */
+ IxParityENAccEbcConfig ebcConfig; /**< Expansion Bus Controller parity detection is to be enabled/disabled */
+} IxParityENAccHWParityConfig;
+
+
+/**
+ * @ingroup IxParityENAcc
+ *
+ * @struct IxParityENAccNpeParityErrorStats
+ *
+ * @brief NPE parity error statistics
+ */
+typedef struct /* IxParityENAccNpeParityErrorStats */
+{
+ UINT32 parityErrorsIMem; /**< Parity errors in Instruction Memory */
+ UINT32 parityErrorsDMem; /**< Parity errors in Data Memory */
+ UINT32 parityErrorsExternal; /**< Parity errors in NPE External Entities */
+} IxParityENAccNpeParityErrorStats;
+
+/**
+ * @ingroup IxParityENAcc
+ *
+ * @struct IxParityENAccMcuParityErrorStats
+ *
+ * @brief DDR Memory Control Unit parity error statistics
+ *
+ * Note: There could be two outstanding parity errors at any given time whose address
+ * details captured. If there is no room for the new interrupt then it would be treated
+ * as overflow parity condition.
+ */
+typedef struct /* IxParityENAccMcuParityErrorStats */
+{
+ UINT32 parityErrorsSingleBit; /**< Parity errors of the type Single-Bit */
+ UINT32 parityErrorsMultiBit; /**< Parity errors of the type Multi-Bit */
+ UINT32 parityErrorsOverflow; /**< Parity errors when more than two parity errors occured */
+} IxParityENAccMcuParityErrorStats;
+
+/**
+ * @ingroup IxParityENAcc
+ *
+ * @struct IxParityENAccEbcParityErrorStats
+ *
+ * @brief Expansion Bus Controller parity error statistics
+ */
+typedef struct /* IxParityENAccEbcParityErrorStats */
+{
+ UINT32 parityErrorsInbound; /**< Odd bit parity errors on inbound transfers */
+ UINT32 parityErrorsOutbound; /**< Odd bit parity errors on outbound transfers */
+} IxParityENAccEbcParityErrorStats;
+
+
+/**
+ * @ingroup IxParityENAcc
+ *
+ * @struct IxParityENAccParityErrorStats
+ *
+ * @brief Parity Error Statistics for the all the hardware blocks
+ */
+typedef struct /**< IxParityENAccParityErrorStats */
+{
+ IxParityENAccNpeParityErrorStats npeStats; /**< NPE parity error statistics */
+ IxParityENAccMcuParityErrorStats mcuStats; /**< MCU parity error statistics */
+ IxParityENAccEbcParityErrorStats ebcStats; /**< EBC parity error statistics */
+ UINT32 swcpStats; /**< SWCP parity error statistics */
+ UINT32 aqmStats; /**< AQM parity error statistics */
+} IxParityENAccParityErrorStats;
+
+
+/**
+ * @ingroup IxParityENAcc
+ *
+ * @enum IxParityENAccParityErrorSource
+ *
+ * @brief The source of the parity error notification
+ */
+typedef enum /**< IxParityENAccParityErrorSource */
+{
+ IX_PARITYENACC_NPE_A_IMEM, /**< NPE A - Instruction memory */
+ IX_PARITYENACC_NPE_A_DMEM, /**< NPE A - Data memory */
+ IX_PARITYENACC_NPE_A_EXT, /**< NPE A - External Entity*/
+ IX_PARITYENACC_NPE_B_IMEM, /**< NPE B - Instruction memory */
+ IX_PARITYENACC_NPE_B_DMEM, /**< NPE B - Data memory */
+ IX_PARITYENACC_NPE_B_EXT, /**< NPE B - External Entity*/
+ IX_PARITYENACC_NPE_C_IMEM, /**< NPE C - Instruction memory */
+ IX_PARITYENACC_NPE_C_DMEM, /**< NPE C - Data memory */
+ IX_PARITYENACC_NPE_C_EXT, /**< NPE C - External Entity*/
+ IX_PARITYENACC_SWCP, /**< SWCP */
+ IX_PARITYENACC_AQM, /**< AQM */
+ IX_PARITYENACC_MCU_SBIT, /**< DDR Memory Controller Unit - Single bit parity */
+ IX_PARITYENACC_MCU_MBIT, /**< DDR Memory Controller Unit - Multi bit parity */
+ IX_PARITYENACC_MCU_OVERFLOW, /**< DDR Memory Controller Unit - Parity errors in excess of two */
+ IX_PARITYENACC_EBC_CS, /**< Expansion Bus Controller - Chip Select */
+ IX_PARITYENACC_EBC_EXTMST /**< Expansion Bus Controller - External Master */
+} IxParityENAccParityErrorSource;
+
+/**
+ * @ingroup IxParityENAcc
+ *
+ * @enum IxParityENAccParityErrorAccess
+ *
+ * @brief The type of access resulting in parity error
+ */
+typedef enum /**< IxParityENAccParityErrorAccess */
+{
+ IX_PARITYENACC_READ, /**< Read Access */
+ IX_PARITYENACC_WRITE /**< Write Access */
+} IxParityENAccParityErrorAccess;
+
+/**
+ * @ingroup IxParityENAcc
+ *
+ * @typedef IxParityENAccParityErrorAddress
+ *
+ * @brief The memory location which has parity error
+ */
+typedef UINT32 IxParityENAccParityErrorAddress;
+
+/**
+ * @ingroup IxParityENAcc
+ *
+ * @typedef IxParityENAccParityErrorData
+ *
+ * @brief The data read from the memory location which has parity error
+ */
+typedef UINT32 IxParityENAccParityErrorData;
+
+/**
+ * @ingroup IxParityENAcc
+ *
+ * @enum IxParityENAccParityErrorRequester
+ *
+ * @brief The requester interface through which the SDRAM memory access
+ * resulted in the parity error.
+ */
+typedef enum /**< IxParityENAccParityErrorRequester */
+{
+ IX_PARITYENACC_MPI, /**< Direct Memory Port Interface */
+ IX_PARITYENACC_AHB_BUS /**< South or North AHB Bus */
+} IxParityENAccParityErrorRequester;
+
+/**
+ * @ingroup IxParityENAcc
+ *
+ * @enum IxParityENAccAHBErrorMaster
+ *
+ * @brief The Master on the AHB bus interface whose transaction might have
+ * resulted in the parity error notification to XScale.
+ */
+typedef enum /**< IxParityENAccAHBErrorMaster */
+{
+ IX_PARITYENACC_AHBN_MST_NPE_A, /**< NPE - A */
+ IX_PARITYENACC_AHBN_MST_NPE_B, /**< NPE - B */
+ IX_PARITYENACC_AHBN_MST_NPE_C, /**< NPE - C */
+ IX_PARITYENACC_AHBS_MST_XSCALE, /**< XScale Bus Interface Unit */
+ IX_PARITYENACC_AHBS_MST_PBC, /**< PCI Bus Controller */
+ IX_PARITYENACC_AHBS_MST_EBC, /**< Expansion Bus Controller */
+ IX_PARITYENACC_AHBS_MST_AHB_BRIDGE, /**< AHB Bridge */
+ IX_PARITYENACC_AHBS_MST_USBH /**< USB Host Controller */
+} IxParityENAccAHBErrorMaster;
+
+/**
+ * @ingroup IxParityENAcc
+ *
+ * @enum IxParityENAccAHBErrorSlave
+ *
+ * @brief The Slave on the AHB bus interface whose transaction might have
+ * resulted in the parity error notification to XScale.
+ */
+typedef enum /**< IxParityENAccAHBErrorSlave */
+{
+ IX_PARITYENACC_AHBN_SLV_MCU, /**< Memory Control Unit */
+ IX_PARITYENACC_AHBN_SLV_AHB_BRIDGE, /**< AHB Bridge */
+ IX_PARITYENACC_AHBS_SLV_MCU, /**< XScale Bus Interface Unit */
+ IX_PARITYENACC_AHBS_SLV_APB_BRIDGE, /**< APB Bridge */
+ IX_PARITYENACC_AHBS_SLV_AQM, /**< AQM */
+ IX_PARITYENACC_AHBS_SLV_RSA, /**< RSA (Crypto Bus) */
+ IX_PARITYENACC_AHBS_SLV_PBC, /**< PCI Bus Controller */
+ IX_PARITYENACC_AHBS_SLV_EBC, /**< Expansion Bus Controller */
+ IX_PARITYENACC_AHBS_SLV_USBH /**< USB Host Controller */
+} IxParityENAccAHBErrorSlave;
+
+/**
+ * @ingroup IxParityENAcc
+ *
+ * @struct IxParityENAccAHBErrorTransaction
+ *
+ * @brief The Master and Slave on the AHB bus interface whose transaction might
+ * have resulted in the parity error notification to XScale.
+ *
+ * NOTE: This information may be used in the data abort exception handler
+ * to differentiate between the XScale and non-XScale access to the SDRAM
+ * memory.
+ */
+typedef struct /**< IxParityENAccAHBErrorTransaction */
+{
+ IxParityENAccAHBErrorMaster ahbErrorMaster; /**< Master on AHB bus */
+ IxParityENAccAHBErrorSlave ahbErrorSlave; /**< Slave on AHB bus */
+} IxParityENAccAHBErrorTransaction;
+
+/**
+ * @ingroup IxParityENAcc
+ *
+ * @struct IxParityENAccParityErrorContextMessage
+ *
+ * @brief Parity Error Context Message
+ */
+typedef struct /**< IxParityENAccParityErrorContextMessage */
+{
+ IxParityENAccParityErrorSource pecParitySource; /**< Source info of parity error */
+ IxParityENAccParityErrorAccess pecAccessType; /**< Read or Write Access
+ Read - NPE, SWCP, AQM, DDR MCU,
+ Exp Bus Ctrlr (Outbound)
+ Write - DDR MCU,
+ Exp Bus Ctrlr (Inbound
+ i.e., External Master) */
+ IxParityENAccParityErrorAddress pecAddress; /**< Address faulty location
+ Valid only for AQM, DDR MCU,
+ Exp Bus Ctrlr */
+ IxParityENAccParityErrorData pecData; /**< Data read from the faulty location
+ Valid only for AQM and DDR MCU
+ For DDR MCU it is the bit location
+ of the Single-bit parity */
+ IxParityENAccParityErrorRequester pecRequester; /**< Requester of SDRAM memory access
+ Valid only for the DDR MCU */
+ IxParityENAccAHBErrorTransaction ahbErrorTran; /**< Master and Slave information on the
+ last AHB Error Transaction */
+} IxParityENAccParityErrorContextMessage;
+
+/**
+ * @ingroup IxParityENAcc
+ *
+ * @typedef IxParityENAccCallback
+ *
+ * @brief This prototype shows the format of a callback function.
+ *
+ * The callback will be used to notify the parity error to the client application.
+ * The callback will be registered by @ref ixParityENAccCallbackRegister.
+ *
+ * It will be called from an ISR when a parity error is detected and thus
+ * needs to follow the interrupt callable function conventions.
+ *
+ */
+typedef void (*IxParityENAccCallback) (void);
+
+
+/*
+ * Prototypes for interface functions.
+ */
+
+/**
+ * @ingroup IxParityENAcc
+ *
+ * @fn IxParityENAccStatus ixParityENAccInit(void)
+ *
+ * @brief This function will initialise the IxParityENAcc component.
+ *
+ * This function will initialise the IxParityENAcc component. It should only be
+ * called once, prior to using the IxParityENAcc component.
+ *
+ * <OL><LI>It initialises the internal data structures, registers the ISR that
+ * will be triggered when a parity error occurs in IXP4xx silicon.</LI></OL>
+ *
+ * @li Re-entrant : No
+ * @li ISR Callable : No
+ *
+ * @return @li IX_PARITYENACC_SUCCESS - Initialization is successful
+ * @li IX_PARITYENACC_ALREADY_INITIALISED - The access layer has already
+ * been initialized
+ * @li IX_PARITYENACC_OPERATION_FAILED - The request failed because the
+ * operation didn't succeed on the hardware. Refer to error trace/log
+ * for details.
+ */
+
+PUBLIC IxParityENAccStatus ixParityENAccInit(void);
+
+/**
+ * @ingroup IxParityENAcc
+ *
+ * @fn IxParityENAccStatus ixParityENAccCallbackRegister (
+ IxParityENAccCallback parityErrNfyCallBack)
+ *
+ * @brief This function will register a new callback with IxParityENAcc component.
+ * It can also reregister a new callback replacing the old callback.
+ *
+ * @param parityErrNfyCallBack [in] - This parameter will specify the call-back
+ * function supplied by the client application.
+ *
+ * This interface registers the user application supplied call-back handler with
+ * the parity error handling access component after the init.
+ *
+ * The callback function will be called from an ISR that will be triggered by the
+ * parity error in the IXP400 silicon.
+ *
+ * The following actions will be performed by this function:
+ * <OL><LI>Check for the prior initialisation of the module before registering or
+ * re-registering of the callback.
+ * Check for parity error detection disabled before re-registration of the callback.
+ * </LI></OL>
+ *
+ * @li Re-entrant : No
+ * @li ISR Callable : No
+ *
+ * @return @li IX_PARITYENACC_SUCCESS - The parameters check passed and the
+ * registration is successful.
+ * @li IX_PARITYENACC_INVALID_PARAMETERS - Request failed due to NULL
+ * parameter passed.
+ * @li IX_PARITYENACC_OPERATION_FAILED - The request failed because the
+ * parity error detection not yet disabled.
+ * @li IX_PARITYENACC_NOT_INITIALISED - The operation requested prior to
+ * the initialisation of the access layer.
+ */
+
+PUBLIC IxParityENAccStatus ixParityENAccCallbackRegister (
+ IxParityENAccCallback parityErrNfyCallBack);
+
+/**
+ * @ingroup IxParityENAcc
+ *
+ * @fn IxParityENAccStatus ixParityENAccParityDetectionConfigure (
+ const IxParityENAccHWParityConfig *hwParityConfig)
+ *
+ * @brief This interface allows the client application to enable the parity
+ * error detection on the underlying hardware block.
+ *
+ * @param hwParityConfig [in] - Hardware blocks for which the parity error
+ * detection is to be enabled or disabled.
+ *
+ * The client application allocates and provides the reference to the buffer.
+ *
+ * It will also verify whether the specific hardware block is functional or not.
+ *
+ * NOTE: Failure in enabling or disabling of one or more components result in
+ * trace message but still returns IX_PARITYENACC_SUCCESS. Refer to the function
+ * @ref ixParityENAccParityDetectionQuery on how to verify the failures while
+ * enabling/disabling paritys error detection.
+ *
+ * It shall be invoked after the Init and CallbackRegister functions but before
+ * any other function of the IxParityENAcc layer.
+ *
+ * @li Re-entrant : No
+ * @li ISR Callable : No
+ *
+ * @return @li IX_PARITYENACC_SUCCESS - The parameters check passed and the
+ * request to enable/disable is successful.
+ * @li IX_PARITYENACC_INVALID_PARAMETERS-The request failed due to
+ * NULL parameter supplied.
+ * @li IX_PARITYENACC_OPERATION_FAILED - The request failed because the
+ * operation didn't succeed on the hardware.
+ * @li IX_PARITYENACC_NOT_INITIALISED - The operation requested prior to
+ * the initialisation of the access layer.
+ */
+
+PUBLIC IxParityENAccStatus ixParityENAccParityDetectionConfigure (
+ const IxParityENAccHWParityConfig *hwParityConfig);
+
+/**
+ * @ingroup IxParityENAcc
+ *
+ * @fn IxParityENAccStatus ixParityENAccParityDetectionQuery (
+ IxParityENAccHWParityConfig * const hwParityConfig)
+ *
+ * @brief This interface allows the client application to determine the
+ * status of the parity error detection on the specified hardware blocks
+ *
+ * @param hwParityConfig [out] - Hardware blocks whose parity error detection
+ * has been enabled or disabled.
+ *
+ * The client application allocates and provides the reference to the buffer.
+ *
+ * This interface can be used immediately after the interface @ref
+ * ixParityENAccParityDetectionConfigure to see on which of the hardware blocks
+ * the parity error detection has either been enabled or disabled based on the
+ * client application request.
+ *
+ * @li Re-entrant : No
+ * @li ISR Callable : No
+ *
+ * @return @li IX_PARITYENACC_SUCCESS - The parameters check passed and the
+ * request to query on whether the hardware parity error detection
+ * is enabled or disabled is successful.
+ * @li IX_PARITYENACC_INVALID_PARAMETERS-The request failed due to
+ * NULL parameter or invalid values supplied.
+ * @li IX_PARITYENACC_NOT_INITIALISED - The operation requested prior
+ * to the initialisation of the access layer.
+ */
+
+PUBLIC IxParityENAccStatus ixParityENAccParityDetectionQuery(
+ IxParityENAccHWParityConfig * const hwParityConfig);
+
+/**
+ * @ingroup IxParityENAcc
+ *
+ * @fn IxParityENAccStatus ixParityENAccParityErrorContextGet(
+ IxParityENAccParityErrorContextMessage * const pecMessage)
+ *
+ * @brief This interface allows the client application to determine the
+ * status of the parity error context on hardware block for which the
+ * current parity error interrupt triggered.
+ *
+ * @param pecMessage [out] - The parity error context information of the
+ * parity interrupt currently being process.
+ *
+ * The client application allocates and provides the reference to the buffer.
+ *
+ * Refer to the data structure @ref IxParityENAccParityErrorContextMessage
+ * for details.
+ *
+ * The routine will will fetch the parity error context in the following
+ * priority, if multiple parity errors observed.
+ *
+ * <pre>
+ * 0 - MCU (Multi-bit and single-bit in that order)
+ * 1 - NPE-A
+ * 2 - NPE-B
+ * 3 - NPE-C
+ * 4 - SWCP
+ * 5 - QM
+ * 6 - EXP
+ *
+ * NOTE: The information provided in the @ref IxParityENAccAHBErrorTransaction
+ * may be of help for the client application to decide on the course of action
+ * to take. This info is taken from the Performance Monitoring Unit register
+ * which records most recent error observed on the AHB bus. This information
+ * might have been overwritten by some other error by the time it is retrieved.
+ * </pre>
+ *
+ * @li Re-entrant : No
+ * @li ISR Callable : Yes
+ *
+ * @return @li IX_PARITYENACC_SUCCESS-The parameters check passed and the
+ * request to get the parity error context information is successful.
+ * @li IX_PARITYENACC_INVALID_PARAMETERS-The request failed due to
+ * NULL parameter is passed
+ * @li IX_PARITYENACC_OPERATION_FAILED - The request failed because
+ * the operation didn't succeed on the hardware.
+ * @li IX_PARITYENACC_NOT_INITIALISED - The operation requested prior
+ * to the initialisation of the access layer.
+ * @li IX_PARITYENACC_NO_PARITY - No parity condition exits or has
+ * already been cleared
+ */
+
+PUBLIC IxParityENAccStatus ixParityENAccParityErrorContextGet(
+ IxParityENAccParityErrorContextMessage * const pecMessage);
+
+/**
+ * @ingroup IxParityENAcc
+ *
+ * @fn IxParityENAccStatus ixParityENAccParityErrorInterruptClear (
+ const IxParityENAccParityErrorContextMessage *pecMessage)
+ *
+ * @brief This interface helps the client application to clear off the
+ * interrupt condition on the hardware block identified in the parity
+ * error context message. Please refer to the table below as the operation
+ * varies depending on the interrupt source.
+ *
+ * @param pecMessage [in] - The parity error context information of the
+ * hardware block whose parity error interrupt condition is to disabled.
+ *
+ * The client application allocates and provides the reference to the buffer.
+ *
+ * <pre>
+ * ****************************************************************************
+ * Following actions will be taken during the interrupt clear for respective
+ * hardware blocks.
+ *
+ * Parity Source Actions taken during Interrupt clear
+ * ------------- -------------------------------------------------------
+ * NPE-A Interrupt will be masked off at the interrupt controller
+ * so that it will not trigger continuously.
+ * Client application has to take appropriate action and
+ * re-configure the parity error detection subsequently.
+ * The client application will not be notified of further
+ * interrupts, until the re-configuration is done using
+ * @ref ixParityENAccParityDetectionConfigure.
+ *
+ * NPE-B Interrupt will be masked off at the interrupt controller
+ * so that it will not trigger continuously.
+ * Client application has to take appropriate action and
+ * re-configure the parity error detection subsequently.
+ * The client application will not be notified of further
+ * interrupts, until the re-configuration is done using
+ * @ref ixParityENAccParityDetectionConfigure.
+ *
+ * NPE-C Interrupt will be masked off at the interrupt controller
+ * Client application has to take appropriate action and
+ * re-configure the parity error detection subsequently.
+ * The client application will not be notified of further
+ * interrupts, until the re-configuration is done using
+ * @ref ixParityENAccParityDetectionConfigure.
+ *
+ * SWCP Interrupt will be masked off at the interrupt controller.
+ * Client application has to take appropriate action and
+ * re-configure the parity error detection subsequently.
+ * The client application will not be notified of further
+ * interrupts, until the re-configuration is done using
+ * @ref ixParityENAccParityDetectionConfigure.
+ *
+ * AQM Interrupt will be masked off at the interrupt controller.
+ * Client application has to take appropriate action and
+ * re-configure the parity error detection subsequently.
+ * The client application will not be notified of further
+ * interrupts, until the re-configuration is done using
+ * @ref ixParityENAccParityDetectionConfigure.
+ *
+ * MCU Parity interrupt condition is cleared at the SDRAM MCU for
+ * the following:
+ * 1. Single-bit
+ * 2. Multi-bit
+ * 3. Overflow condition i.e., more than two parity conditions
+ * occurred
+ * Note that single-parity errors do not result in data abort
+ * and not all data aborts caused by multi-bit parity error.
+ *
+ * EXP Parity interrupt condition is cleared at the expansion bus
+ * controller for the following:
+ * 1. External master initiated Inbound write
+ * 2. Internal master (IXP400) initiated Outbound read
+ * ****************************************************************************
+ * </pre>
+ * @li Re-entrant : No
+ * @li ISR Callable : No
+ *
+ * @return @li IX_PARITYENACC_SUCCESS-The parameters check passed and the request
+ * to clear the parity error interrupt condition is successful.
+ * @li IX_PARITYENACC_INVALID_PARAMETERS-The request failed due to
+ * NULL parameters have been passed or contents have been
+ * supplied with invalid values.
+ * @li IX_PARITYENACC_OPERATION_FAILED - The request failed because
+ * the operation didn't succeed on the hardware.
+ * @li IX_PARITYENACC_NOT_INITIALISED - The operation requested prior
+ * to the initialisation of the access layer.
+ */
+
+PUBLIC IxParityENAccStatus ixParityENAccParityErrorInterruptClear (
+ const IxParityENAccParityErrorContextMessage *pecMessage);
+
+/**
+ * @ingroup IxParityENAcc
+ *
+ * @fn IxParityENAccStatus ixParityENAccStatsGet (
+ IxParityENAccParityErrorStats * const ixParityErrorStats)
+ *
+ * @brief This interface allows the client application to retrieve parity
+ * error statistics for all the hardware blocks
+ *
+ * @param ixParityErrorStats - [out] The statistics for all the hardware blocks.
+ *
+ * The client application allocates and provides the reference to the buffer.
+ *
+ * @li Re-entrant : No
+ * @li ISR Callable : Yes
+ *
+ * @return @li IX_PARITYENACC_SUCCESS-The parameters check passed and the
+ * request to retrieve parity error statistics for the hardware
+ * block is successful.
+ * @li IX_PARITYENACC_INVALID_PARAMETERS-The request failed due to a
+ * NULL parameter passed.
+ * @li IX_PARITYENACC_NOT_INITIALISED - The operation requested prior
+ * to the initialisation of the access layer.
+ */
+
+PUBLIC IxParityENAccStatus ixParityENAccStatsGet (
+ IxParityENAccParityErrorStats * const ixParityErrorStats);
+
+/**
+ * @ingroup IxParityENAcc
+ *
+ * @fn IxParityENAccStatus ixParityENAccStatsShow (void)
+ *
+ * @brief This interface allows the client application to print all the
+ * parity error statistics.
+ *
+ * @li Re-entrant : No
+ * @li ISR Callable : No
+ *
+ * @return @li IX_PARITYENACC_SUCCESS - The request to show the pairty
+ * error statistics is successful.
+ * @li IX_PARITYENACC_NOT_INITIALISED - The operation requested
+ * prior to the initialisation of the access layer.
+ */
+
+PUBLIC IxParityENAccStatus ixParityENAccStatsShow (void);
+
+/**
+ * @ingroup IxParityENAcc
+ *
+ * @fn IxParityENAccStatus ixParityENAccStatsReset (void)
+ *
+ * @brief This interface allows the client application to reset all the
+ * parity error statistics.
+ *
+ * @li Re-entrant : No
+ * @li ISR Callable : No
+ *
+ * @return @li IX_PARITYENACC_SUCCESS - The request to reset the parity
+ * error statistics is successful.
+ * @li IX_PARITYENACC_NOT_INITIALISED - The operation requested
+ * prior to the initialisation of the access layer.
+ */
+
+PUBLIC IxParityENAccStatus ixParityENAccStatsReset (void);
+
+#endif /* IXPARITYENACC_H */
+#endif /* __ixp46X */
+
+/**
+ * @} defgroup IxParityENAcc
+ */
+
diff --git a/cpu/ixp/npe/include/IxPerfProfAcc.h b/cpu/ixp/npe/include/IxPerfProfAcc.h
new file mode 100644
index 0000000000..65c0ba96ab
--- /dev/null
+++ b/cpu/ixp/npe/include/IxPerfProfAcc.h
@@ -0,0 +1,1358 @@
+/**
+ * @file IxPerfProfAcc.h
+ *
+ * @brief Header file for the IXP400 Perf Prof component (IxPerfProfAcc)
+ *
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+/**
+ * @defgroup IxPerfProfAcc IXP400 Performance Profiling (IxPerfProfAcc) API
+ *
+ * @brief IXP400 Performance Profiling Utility component Public API.
+ * @li NOTE: Xcycle measurement is not supported in Linux.
+ *
+ *
+ * @{
+ */
+#ifndef IXPERFPROFACC_H
+#define IXPERFPROFACC_H
+
+#include "IxOsal.h"
+
+#ifdef __linux
+#include <linux/proc_fs.h>
+#endif
+
+/*
+ * Section for #define
+ */
+/**
+ * @ingroup IxPerfProfAcc
+ *
+ * @def IX_PERFPROF_ACC_XSCALE_PMU_MAX_PROFILE_SAMPLES
+ *
+ * @brief This is the maximum number of profiling samples allowed, which can be
+ * modified according to the user's discretion
+ */
+#define IX_PERFPROF_ACC_XSCALE_PMU_MAX_PROFILE_SAMPLES 0xFFFF
+
+/**
+ * @ingroup IxPerfProfAcc
+ *
+ * @def IX_PERFPROF_ACC_BUS_PMU_MAX_PECS
+ *
+ * @brief This is the maximum number of Programmable Event Counters available.
+ * This is a hardware specific and fixed value. Do not change.
+ *
+ */
+#define IX_PERFPROF_ACC_BUS_PMU_MAX_PECS 7
+
+/**
+ * @ingroup IxPerfProfAcc
+ *
+ * @def IX_PERFPROF_ACC_XCYCLE_MAX_NUM_OF_MEASUREMENTS
+ *
+ * @brief Max number of measurement allowed. This constant is used when
+ * creating storage array for Xcycle. When run in continuous mode,
+ * Xcycle will wrap around and re-use buffer.
+ */
+#define IX_PERFPROF_ACC_XCYCLE_MAX_NUM_OF_MEASUREMENTS 600
+
+#ifdef __linux
+/**
+ * @ingroup IxPerfProfAcc
+ *
+ * @def IX_PERFPROF_ACC_XSCALE_PMU_SYMBOL_ACCURACY
+ *
+ * @brief Level of accuracy required for matching the PC Address to
+ * symbol address. This is used when the XScale PMU time/event
+ * sampling functions get the PC address and search for the
+ * corresponding symbol address.
+ */
+#define IX_PERFPROF_ACC_XSCALE_PMU_SYMBOL_ACCURACY 0xffff
+
+#endif /*__linux*/
+
+/**
+ * @ingroup IxPerfProfAcc
+ *
+ * @def IX_PERFPROF_ACC_LOG
+ *
+ * @brief Mechanism for logging a formatted message for the PerfProfAcc component
+ *
+ * @param level UINT32 [in] - trace level
+ * @param device UINT32 [in] - output device
+ * @param str char* [in] - format string, similar to printf().
+ * @param a UINT32 [in] - first argument to display
+ * @param b UINT32 [in] - second argument to display
+ * @param c UINT32 [in] - third argument to display
+ * @param d UINT32 [in] - fourth argument to display
+ * @param e UINT32 [in] - fifth argument to display
+ * @param f UINT32 [in] - sixth argument to display
+ *
+ * @return none
+ */
+#ifndef NDEBUG
+#define IX_PERFPROF_ACC_LOG(level, device, str, a, b, c, d, e, f)\
+ (ixOsalLog (level, device, str, a, b, c, d, e, f))
+#else /*do nothing*/
+#define IX_PERFPROF_ACC_LOG(level, device, str, a, b, c, d, e, f)
+#endif /*ifdef NDEBUG */
+
+/*
+ * Section for struct
+ */
+
+/**
+ * @brief contains summary of samples taken
+ *
+ * Structure contains all details of each program counter value - frequency
+ * that PC occurs
+ */
+typedef struct
+{
+ UINT32 programCounter; /**<the program counter value of the sample*/
+ UINT32 freq; /**<the frequency of the occurence of the sample*/
+} IxPerfProfAccXscalePmuSamplePcProfile;
+
+/**
+ * @brief contains results of a counter
+ *
+ * Structure contains the results of a counter, which are split into the lower
+ * and upper 32 bits of the final count
+ */
+typedef struct
+{
+ UINT32 lower32BitsEventCount; /**<lower 32bits value of the event counter*/
+ UINT32 upper32BitsEventCount; /**<upper 32bits value of the event counter*/
+} IxPerfProfAccXscalePmuEvtCnt;
+
+/**
+ * @brief contains results of counters and their overflow
+ *
+ * Structure contains all values of counters and associated overflows. The
+ * specific event and clock counters are determined by the user
+ */
+typedef struct
+{
+ UINT32 clk_value; /**<current value of clock counter*/
+ UINT32 clk_samples; /**<number of clock counter overflows*/
+ UINT32 event1_value; /**<current value of event 1 counter*/
+ UINT32 event1_samples; /**<number of event 1 counter overflows*/
+ UINT32 event2_value; /**<current value of event 2 counter*/
+ UINT32 event2_samples; /**<number of event 2 counter overflows*/
+ UINT32 event3_value; /**<current value of event 3 counter*/
+ UINT32 event3_samples; /**<number of event 3 counter overflows*/
+ UINT32 event4_value; /**<current value of event 4 counter*/
+ UINT32 event4_samples; /**<number of event 4 counter overflows*/
+} IxPerfProfAccXscalePmuResults;
+
+/**
+ *
+ * @brief Results obtained from Xcycle run
+ */
+typedef struct
+{
+ float maxIdlePercentage; /**<maximum percentage of Idle cycles*/
+ float minIdlePercentage; /**<minimum percentage of Idle cycles*/
+ float aveIdlePercentage; /**<average percentage of Idle cycles*/
+ UINT32 totalMeasurements; /**<total number of measurement made */
+} IxPerfProfAccXcycleResults;
+
+/**
+ *
+ * @brief Results obtained from running the Bus Pmu component. The results
+ * are obtained when the get functions is called.
+ *
+ */
+typedef struct
+{
+ UINT32 statsToGetLower27Bit[IX_PERFPROF_ACC_BUS_PMU_MAX_PECS]; /**<Lower 27 Bit of counter value */
+ UINT32 statsToGetUpper32Bit[IX_PERFPROF_ACC_BUS_PMU_MAX_PECS]; /**<Upper 32 Bit of counter value */
+} IxPerfProfAccBusPmuResults;
+
+/*
+ * Section for enum
+ */
+
+/**
+ * @ingroup IxPerfProfAcc
+ *
+ * @enum IxPerfProfAccBusPmuEventCounters1
+ *
+ * @brief Type of bus pmu events supported on PEC 1.
+ *
+ * Lists all bus pmu events.
+ */
+typedef enum
+{
+ IX_PERFPROF_ACC_BUS_PMU_PEC1_NORTH_NPEA_GRANT_SELECT = 1, /**< Select North NPEA grant on PEC1*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC1_NORTH_NPEB_GRANT_SELECT, /**< Select North NPEB grant on PEC1*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC1_NORTH_NPEC_GRANT_SELECT, /**< Select North NPEC grant on PEC1*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC1_NORTH_BUS_IDLE_SELECT, /**< Select North bus idle on PEC1*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC1_NORTH_NPEA_REQ_SELECT, /**< Select North NPEA req on PEC1*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC1_NORTH_NPEB_REQ_SELECT, /**< Select North NPEB req on PEC1*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC1_NORTH_NPEC_REQ_SELECT, /**< Select North NPEC req on PEC1*/
+
+ IX_PERFPROF_ACC_BUS_PMU_PEC1_SOUTH_GSKT_GRANT_SELECT, /**< Select south gasket grant on PEC1*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC1_SOUTH_ABB_GRANT_SELECT, /**< Select south abb grant on PEC1*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC1_SOUTH_PCI_GRANT_SELECT, /**< Select south pci grant on PEC1*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC1_SOUTH_APB_GRANT_SELECT, /**< Select south apb grant on PEC1*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC1_SOUTH_GSKT_REQ_SELECT, /**< Select south gasket request on PEC1*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC1_SOUTH_ABB_REQ_SELECT, /**< Select south abb request on PEC1*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC1_SOUTH_PCI_REQ_SELECT, /**< Select south pci request on PEC1*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC1_SOUTH_APB_REQ_SELECT, /**< Select south apb request on PEC1*/
+
+ IX_PERFPROF_ACC_BUS_PMU_PEC1_SDR_0_HIT_SELECT, /**< Select sdram0 hit on PEC1*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC1_SDR_1_HIT_SELECT, /**< Select sdram1 hit on PEC1*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC1_SDR_2_HIT_SELECT, /**< Select sdram2 hit on PEC1*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC1_SDR_3_HIT_SELECT, /**< Select sdram3 hit on PEC1*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC1_SDR_4_MISS_SELECT, /**< Select sdram4 miss on PEC1*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC1_SDR_5_MISS_SELECT, /**< Select sdram5 miss on PEC1*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC1_SDR_6_MISS_SELECT, /**< Select sdram6 miss on PEC1*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC1_SDR_7_MISS_SELECT /**< Select sdram7 miss on PEC1*/
+} IxPerfProfAccBusPmuEventCounters1;
+
+/**
+ * @ingroup IxPerfProfAcc
+ *
+ * @enum IxPerfProfAccBusPmuEventCounters2
+ *
+ * @brief Type of bus pmu events supported on PEC 2.
+ *
+ * Lists all bus pmu events.
+ */
+typedef enum
+{
+ IX_PERFPROF_ACC_BUS_PMU_PEC2_NORTH_NPEA_XFER_SELECT = 24, /**< Select North NPEA transfer on PEC2*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC2_NORTH_NPEB_XFER_SELECT, /**< Select North NPEB transfer on PEC2*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC2_NORTH_NPEC_XFER_SELECT, /**< Select North NPEC transfer on PEC2*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC2_NORTH_BUS_WRITE_SELECT, /**< Select North bus write on PEC2*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC2_NORTH_NPEA_OWN_SELECT, /**< Select North NPEA own on PEC2*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC2_NORTH_NPEB_OWN_SELECT, /**< Select North NPEB own on PEC2*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC2_NORTH_NPEC_OWN_SELECT, /**< Select North NPEC own on PEC2*/
+
+ IX_PERFPROF_ACC_BUS_PMU_PEC2_SOUTH_GSKT_XFER_SELECT, /**< Select South gasket transfer on PEC2*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC2_SOUTH_ABB_XFER_SELECT, /**< Select South abb transfer on PEC2*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC2_SOUTH_PCI_XFER_SELECT, /**< Select South pci transfer on PEC2*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC2_SOUTH_APB_XFER_SELECT, /**< Select South apb transfer on PEC2*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC2_SOUTH_GSKT_OWN_SELECT, /**< Select South gasket own on PEC2*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC2_SOUTH_ABB_OWN_SELECT, /**< Select South abb own on PEC2*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC2_SOUTH_PCI_OWN_SELECT, /**< Select South pci own on PEC2*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC2_SOUTH_APB_OWN_SELECT, /**< Select South apb own transfer on PEC2*/
+
+ IX_PERFPROF_ACC_BUS_PMU_PEC2_SDR_1_HIT_SELECT, /**< Select sdram1 hit on PEC2*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC2_SDR_2_HIT_SELECT, /**< Select sdram2 hit on PEC2*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC2_SDR_3_HIT_SELECT, /**< Select sdram3 hit on PEC2*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC2_SDR_4_HIT_SELECT, /**< Select sdram4 hit on PEC2*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC2_SDR_5_MISS_SELECT, /**< Select sdram5 miss on PEC2*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC2_SDR_6_MISS_SELECT, /**< Select sdram6 miss on PEC2*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC2_SDR_7_MISS_SELECT, /**< Select sdram7 miss on PEC2*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC2_SDR_0_MISS_SELECT /**< Select sdram0 miss on PEC2*/
+} IxPerfProfAccBusPmuEventCounters2;
+
+/**
+ * @ingroup IxPerfProfAcc
+ *
+ * @enum IxPerfProfAccBusPmuEventCounters3
+ *
+ * @brief Type of bus pmu events supported on PEC 3.
+ *
+ * Lists all bus pmu events.
+ */
+typedef enum
+{
+ IX_PERFPROF_ACC_BUS_PMU_PEC3_NORTH_NPEA_RETRY_SELECT = 47, /**< Select north NPEA retry on PEC3*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC3_NORTH_NPEB_RETRY_SELECT, /**< Select north NPEB retry on PEC3*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC3_NORTH_NPEC_RETRY_SELECT, /**< Select north NPEC retry on PEC3*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC3_NORTH_BUS_READ_SELECT, /**< Select north bus read on PEC3*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC3_NORTH_NPEA_WRITE_SELECT, /**< Select north NPEA write on PEC3*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC3_NORTH_NPEB_WRITE_SELECT, /**< Select north NPEB write on PEC3*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC3_NORTH_NPEC_WRITE_SELECT, /**< Select north NPEC wirte on PEC3*/
+
+ IX_PERFPROF_ACC_BUS_PMU_PEC3_SOUTH_GSKT_RETRY_SELECT, /**< Select south gasket retry on PEC3*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC3_SOUTH_ABB_RETRY_SELECT, /**< Select south abb retry on PEC3*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC3_SOUTH_PCI_RETRY_SELECT, /**< Select south pci retry on PEC3*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC3_SOUTH_APB_RETRY_SELECT, /**< Select south apb retry on PEC3*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC3_SOUTH_GSKT_WRITE_SELECT, /**< Select south gasket write on PEC3*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC3_SOUTH_ABB_WRITE_SELECT, /**< Select south abb write on PEC3*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC3_SOUTH_PCI_WRITE_SELECT, /**< Select south pci write on PEC3*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC3_SOUTH_APB_WRITE_SELECT, /**< Select south apb write on PEC3*/
+
+ IX_PERFPROF_ACC_BUS_PMU_PEC3_SDR_2_HIT_SELECT, /**< Select sdram2 hit on PEC3*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC3_SDR_3_HIT_SELECT, /**< Select sdram3 hit on PEC3*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC3_SDR_4_HIT_SELECT, /**< Select sdram4 hit on PEC3*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC3_SDR_5_HIT_SELECT, /**< Select sdram5 hit on PEC3*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC3_SDR_6_MISS_SELECT, /**< Select sdram6 miss on PEC3*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC3_SDR_7_MISS_SELECT, /**< Select sdram7 miss on PEC3*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC3_SDR_0_MISS_SELECT, /**< Select sdram0 miss on PEC3*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC3_SDR_1_MISS_SELECT /**< Select sdram1 miss on PEC3*/
+} IxPerfProfAccBusPmuEventCounters3;
+
+/**
+ * @ingroup IxPerfProfAcc
+ *
+ * @enum IxPerfProfAccBusPmuEventCounters4
+ *
+ * @brief Type of bus pmu events supported on PEC 4.
+ *
+ * Lists all bus pmu events.
+ */
+typedef enum
+{
+ IX_PERFPROF_ACC_BUS_PMU_PEC4_SOUTH_PCI_SPLIT_SELECT = 70, /**< Select south pci split on PEC4*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC4_SOUTH_EXP_SPLIT_SELECT, /**< Select south expansion split on PEC4*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC4_SOUTH_APB_GRANT_SELECT, /**< Select south apb grant on PEC4*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC4_SOUTH_APB_XFER_SELECT, /**< Select south apb transfer on PEC4*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC4_SOUTH_GSKT_READ_SELECT, /**< Select south gasket read on PEC4*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC4_SOUTH_ABB_READ_SELECT, /**< Select south abb read on PEC4*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC4_SOUTH_PCI_READ_SELECT, /**< Select south pci read on PEC4*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC4_SOUTH_APB_READ_SELECT, /**< Select south apb read on PEC4*/
+
+ IX_PERFPROF_ACC_BUS_PMU_PEC4_NORTH_ABB_SPLIT_SELECT, /**< Select north abb split on PEC4*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC4_NORTH_NPEA_REQ_SELECT, /**< Select north NPEA req on PEC4*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC4_NORTH_NPEA_READ_SELECT, /**< Select north NPEA read on PEC4*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC4_NORTH_NPEB_READ_SELECT, /**< Select north NPEB read on PEC4*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC4_NORTH_NPEC_READ_SELECT, /**< Select north NPEC read on PEC4*/
+
+ IX_PERFPROF_ACC_BUS_PMU_PEC4_SDR_3_HIT_SELECT, /**< Select sdram3 hit on PEC4*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC4_SDR_4_HIT_SELECT, /**< Select sdram4 hit on PEC4*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC4_SDR_5_HIT_SELECT, /**< Select sdram5 hit on PEC4*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC4_SDR_6_HIT_SELECT, /**< Select sdram6 hit on PEC4*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC4_SDR_7_MISS_SELECT, /**< Select sdram7 miss on PEC4*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC4_SDR_0_MISS_SELECT, /**< Select sdram0 miss on PEC4*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC4_SDR_1_MISS_SELECT, /**< Select sdram1 miss on PEC4*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC4_SDR_2_MISS_SELECT /**< Select sdram2 miss on PEC4*/
+} IxPerfProfAccBusPmuEventCounters4;
+
+/**
+ * @ingroup IxPerfProfAcc
+ *
+ * @enum IxPerfProfAccBusPmuEventCounters5
+ *
+ * @brief Type of bus pmu events supported on PEC 5.
+ *
+ * Lists all bus pmu events.
+ */
+typedef enum
+{
+ IX_PERFPROF_ACC_BUS_PMU_PEC5_SOUTH_ABB_GRANT_SELECT = 91, /**< Select south abb grant on PEC5*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC5_SOUTH_ABB_XFER_SELECT, /**< Select south abb transfer on PEC5*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC5_SOUTH_ABB_RETRY_SELECT, /**< Select south abb retry on PEC5*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC5_SOUTH_EXP_SPLIT_SELECT, /**< Select south expansion split on PEC5*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC5_SOUTH_ABB_REQ_SELECT, /**< Select south abb request on PEC5*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC5_SOUTH_ABB_OWN_SELECT, /**< Select south abb own on PEC5*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC5_SOUTH_BUS_IDLE_SELECT, /**< Select south bus idle on PEC5*/
+
+ IX_PERFPROF_ACC_BUS_PMU_PEC5_NORTH_NPEB_GRANT_SELECT, /**< Select north NPEB grant on PEC5*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC5_NORTH_NPEB_XFER_SELECT, /**< Select north NPEB transfer on PEC5*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC5_NORTH_NPEB_RETRY_SELECT, /**< Select north NPEB retry on PEC5*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC5_NORTH_NPEB_REQ_SELECT, /**< Select north NPEB request on PEC5*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC5_NORTH_NPEB_OWN_SELECT, /**< Select north NPEB own on PEC5*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC5_NORTH_NPEB_WRITE_SELECT, /**< Select north NPEB write on PEC5*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC5_NORTH_NPEB_READ_SELECT, /**< Select north NPEB read on PEC5*/
+
+ IX_PERFPROF_ACC_BUS_PMU_PEC5_SDR_4_HIT_SELECT, /**< Select north sdram4 hit on PEC5*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC5_SDR_5_HIT_SELECT, /**< Select north sdram5 hit on PEC5*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC5_SDR_6_HIT_SELECT, /**< Select north sdram6 hit on PEC5*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC5_SDR_7_HIT_SELECT, /**< Select north sdram7 hit on PEC5*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC5_SDR_0_MISS_SELECT, /**< Select north sdram0 miss on PEC5*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC5_SDR_1_MISS_SELECT, /**< Select north sdram1 miss on PEC5*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC5_SDR_2_MISS_SELECT, /**< Select north sdram2 miss on PEC5*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC5_SDR_3_MISS_SELECT /**< Select north sdram3 miss on PEC5*/
+} IxPerfProfAccBusPmuEventCounters5;
+
+/**
+ * @ingroup IxPerfProfAcc
+ *
+ * @enum IxPerfProfAccBusPmuEventCounters6
+ *
+ * @brief Type of bus pmu events supported on PEC 6.
+ *
+ * Lists all bus pmu events.
+ */
+typedef enum
+{
+ IX_PERFPROF_ACC_BUS_PMU_PEC6_SOUTH_PCI_GRANT_SELECT = 113, /**< Select south pci grant on PEC6*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC6_SOUTH_PCI_XFER_SELECT, /**< Select south pci transfer on PEC6*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC6_SOUTH_PCI_RETRY_SELECT, /**< Select south pci retry on PEC6*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC6_SOUTH_PCI_SPLIT_SELECT, /**< Select south pci split on PEC6*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC6_SOUTH_PCI_REQ_SELECT, /**< Select south pci request on PEC6*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC6_SOUTH_PCI_OWN_SELECT, /**< Select south pci own on PEC6*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC6_SOUTH_BUS_WRITE_SELECT, /**< Select south pci write on PEC6*/
+
+ IX_PERFPROF_ACC_BUS_PMU_PEC6_NORTH_NPEC_GRANT_SELECT, /**< Select north NPEC grant on PEC6*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC6_NORTH_NPEC_XFER_SELECT, /**< Select north NPEC transfer on PEC6*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC6_NORTH_NPEC_RETRY_SELECT, /**< Select north NPEC retry on PEC6*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC6_NORTH_NPEC_REQ_SELECT, /**< Select north NPEC request on PEC6*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC6_NORTH_NPEC_OWN_SELECT, /**< Select north NPEC own on PEC6*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC6_NORTH_NPEB_WRITE_SELECT, /**< Select north NPEB write on PEC6*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC6_NORTH_NPEC_READ_SELECT, /**< Select north NPEC read on PEC6*/
+
+ IX_PERFPROF_ACC_BUS_PMU_PEC6_SDR_5_HIT_SELECT, /**< Select sdram5 hit on PEC6*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC6_SDR_6_HIT_SELECT, /**< Select sdram6 hit on PEC6*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC6_SDR_7_HIT_SELECT, /**< Select sdram7 hit on PEC6*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC6_SDR_0_HIT_SELECT, /**< Select sdram0 hit on PEC6*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC6_SDR_1_MISS_SELECT, /**< Select sdram1 miss on PEC6*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC6_SDR_2_MISS_SELECT, /**< Select sdram2 miss on PEC6*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC6_SDR_3_MISS_SELECT, /**< Select sdram3 miss on PEC6*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC6_SDR_4_MISS_SELECT /**< Select sdram4 miss on PEC6*/
+} IxPerfProfAccBusPmuEventCounters6;
+
+/**
+ * @ingroup IxPerfProfAcc
+ *
+ * @enum IxPerfProfAccBusPmuEventCounters7
+ *
+ * @brief Type of bus pmu events supported on PEC 7.
+ *
+ * Lists all bus pmu events.
+ */
+typedef enum
+{
+ IX_PERFPROF_ACC_BUS_PMU_PEC7_SOUTH_APB_RETRY_SELECT = 135, /**< Select south apb retry on PEC7*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC7_SOUTH_APB_REQ_SELECT, /**< Select south apb request on PEC7*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC7_SOUTH_APB_OWN_SELECT, /**< Select south apb own on PEC7*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC7_SOUTH_BUS_READ_SELECT, /**< Select south bus read on PEC7*/
+ IX_PERFPROF_ACC_BUS_PMU_PEC7_CYCLE_COUNT_SELECT /**< Select cycle count on PEC7*/
+} IxPerfProfAccBusPmuEventCounters7;
+
+/**
+ * @ingroup IxPerfProfAcc
+ *
+ * @enum IxPerfProfAccXscalePmuEvent
+ *
+ * @brief Type of xscale pmu events supported
+ *
+ * Lists all xscale pmu events. The maximum is a default value that the user
+ * should not exceed.
+ */
+typedef enum
+{
+ IX_PERFPROF_ACC_XSCALE_PMU_EVENT_CACHE_MISS=0, /**< cache miss*/
+ IX_PERFPROF_ACC_XSCALE_PMU_EVENT_CACHE_INSTRUCTION,/**< cache instruction*/
+ IX_PERFPROF_ACC_XSCALE_PMU_EVENT_STALL, /**< event stall*/
+ IX_PERFPROF_ACC_XSCALE_PMU_EVENT_INST_TLB_MISS, /**< instruction tlb miss*/
+ IX_PERFPROF_ACC_XSCALE_PMU_EVENT_DATA_TLB_MISS, /**< data tlb miss*/
+ IX_PERFPROF_ACC_XSCALE_PMU_EVENT_BRANCH_EXEC, /**< branch executed*/
+ IX_PERFPROF_ACC_XSCALE_PMU_EVENT_BRANCH_MISPREDICT, /**<branch mispredict*/
+ IX_PERFPROF_ACC_XSCALE_PMU_EVENT_INST_EXEC, /**< instruction executed*/
+ IX_PERFPROF_ACC_XSCALE_PMU_EVENT_FULL_EVERYCYCLE, /**<
+ *Stall - data cache
+ *buffers are full.
+ *This event occurs
+ *every cycle where
+ *condition present
+ */
+ IX_PERFPROF_ACC_XSCALE_PMU_EVENT_ONCE, /**<
+ *Stall - data cache buffers are
+ *full.This event occurs once
+ *for each contiguous sequence
+ */
+ IX_PERFPROF_ACC_XSCALE_PMU_EVENT_DATA_CACHE_ACCESS, /**< data cache access*/
+ IX_PERFPROF_ACC_XSCALE_PMU_EVENT_DATA_CACHE_MISS, /**< data cache miss*/
+ IX_PERFPROF_ACC_XSCALE_PMU_EVENT_DATA_CACHE_WRITEBACK, /**<data cache
+ *writeback
+ */
+ IX_PERFPROF_ACC_XSCALE_PMU_EVENT_SW_CHANGE_PC, /**< sw change pc*/
+ IX_PERFPROF_ACC_XSCALE_PMU_EVENT_MAX /**< max value*/
+} IxPerfProfAccXscalePmuEvent;
+
+/**
+ * @ingroup IxPerfProfAcc
+ *
+ * @enum IxPerfProfAccStatus
+ *
+ * @brief Invalid Status Definitions
+ *
+ * These status will be used by the APIs to return to the user.
+ */
+typedef enum
+{
+ IX_PERFPROF_ACC_STATUS_SUCCESS = IX_SUCCESS, /**< success*/
+ IX_PERFPROF_ACC_STATUS_FAIL = IX_FAIL, /**< fail*/
+ IX_PERFPROF_ACC_STATUS_ANOTHER_UTIL_IN_PROGRESS,/**<another utility in
+ *progress
+ */
+ IX_PERFPROF_ACC_STATUS_XCYCLE_MEASUREMENT_IN_PROGRESS, /**<measurement in
+ *progress
+ */
+ IX_PERFPROF_ACC_STATUS_XCYCLE_NO_BASELINE, /**<no baseline yet*/
+ IX_PERFPROF_ACC_STATUS_XCYCLE_MEASUREMENT_REQUEST_OUT_OF_RANGE, /**<
+ * Measurement chosen
+ * is out of range
+ */
+ IX_PERFPROF_ACC_STATUS_XCYCLE_PRIORITY_SET_FAIL, /**<
+ * Cannot set
+ * task priority
+ */
+ IX_PERFPROF_ACC_STATUS_XCYCLE_THREAD_CREATE_FAIL, /**<
+ * Fail create thread
+ */
+ IX_PERFPROF_ACC_STATUS_XCYCLE_PRIORITY_RESTORE_FAIL, /**<
+ *cannot restore
+ *priority
+ */
+ IX_PERFPROF_ACC_STATUS_XCYCLE_MEASUREMENT_NOT_RUNNING, /**< xcycle not running*/
+ IX_PERFPROF_ACC_STATUS_XSCALE_PMU_NUM_INVALID, /**< invalid number
+ *entered
+ */
+ IX_PERFPROF_ACC_STATUS_XSCALE_PMU_EVENT_INVALID, /**< invalid pmu event*/
+ IX_PERFPROF_ACC_STATUS_XSCALE_PMU_START_NOT_CALLED, /**<a start process
+ *was not called
+ *before attempting
+ *a stop or results
+ *get
+ */
+ IX_PERFPROF_ACC_STATUS_BUS_PMU_MODE_ERROR, /**< invalid mode*/
+ IX_PERFPROF_ACC_STATUS_BUS_PMU_PEC1_ERROR, /**< invalid pec1 entered*/
+ IX_PERFPROF_ACC_STATUS_BUS_PMU_PEC2_ERROR, /**< invalid pec2 entered*/
+ IX_PERFPROF_ACC_STATUS_BUS_PMU_PEC3_ERROR, /**< invalid pec3 entered*/
+ IX_PERFPROF_ACC_STATUS_BUS_PMU_PEC4_ERROR, /**< invalid pec4 entered*/
+ IX_PERFPROF_ACC_STATUS_BUS_PMU_PEC5_ERROR, /**< invalid pec5 entered*/
+ IX_PERFPROF_ACC_STATUS_BUS_PMU_PEC6_ERROR, /**< invalid pec6 entered*/
+ IX_PERFPROF_ACC_STATUS_BUS_PMU_PEC7_ERROR, /**< invalid pec7 entered*/
+ IX_PERFPROF_ACC_STATUS_BUS_PMU_START_NOT_CALLED, /**<a start process
+ *was not called
+ *before attempting
+ *a stop
+ */
+ IX_PERFPROF_ACC_STATUS_COMPONENT_NOT_SUPPORTED /**<Device or OS does not support component*/
+} IxPerfProfAccStatus;
+
+/**
+ * @ingroup IxPerfProfAcc
+ *
+ * @enum IxPerfProfAccBusPmuMode
+ *
+ * @brief State selection of counters.
+ *
+ * These states will be used to determine the counters whose values are to be
+ * read.
+ */
+typedef enum
+{
+ IX_PERFPROF_ACC_BUS_PMU_MODE_HALT=0, /**< halt state*/
+ IX_PERFPROF_ACC_BUS_PMU_MODE_SOUTH, /**< south state*/
+ IX_PERFPROF_ACC_BUS_PMU_MODE_NORTH, /**< north state*/
+ IX_PERFPROF_ACC_BUS_PMU_MODE_SDRAM /**< SDRAM state*/
+} IxPerfProfAccBusPmuMode;
+
+/*
+ * Section for prototypes interface functions
+ */
+
+/**
+ * @ingroup IxPerfProfAcc
+ *
+ * @fn ixPerfProfAccXscalePmuEventCountStart(
+ BOOL clkCntDiv,
+ UINT32 numEvents,
+ IxPerfProfAccXscalePmuEvent pmuEvent1,
+ IxPerfProfAccXscalePmuEvent pmuEvent2,
+ IxPerfProfAccXscalePmuEvent pmuEvent3,
+ IxPerfProfAccXscalePmuEvent pmuEvent4 )
+ *
+ * @brief This API will start the clock and event counting
+ *
+ * @param clkCntDiv BOOL [in] - enables/disables the clock divider. When
+ * true, the divider is enabled and the clock count will be incremented
+ * by one at each 64th processor clock cycle. When false, the divider
+ * is disabled and the clock count will be incremented at every
+ * processor clock cycle.
+ * @param numEvents UINT32 [in] - the number of PMU events that are to be
+ * monitored as specified by the user. For clock counting only, this
+ * is set to zero.
+ * @param pmuEvent1 @ref IxPerfProfAccXscalePmuEvent [in] - the specific PMU
+ * event to be monitored by counter 1
+ * @param pmuEvent2 @ref IxPerfProfAccXscalePmuEvent [in] - the specific PMU
+ * event to be monitored by counter 2
+ * @param pmuEvent3 @ref IxPerfProfAccXscalePmuEvent [in] - the specific PMU
+ * event to be monitored by counter 3
+ * @param pmuEvent4 @ref IxPerfProfAccXscalePmuEvent [in] - the specific PMU
+ * event to be monitored by counter 4
+ *
+ * This API will start the clock and xscale PMU event counting. Up to
+ * 4 events can be monitored simultaneously. This API has to be called before
+ * ixPerfProfAccXscalePmuEventCountStop can be called.
+ *
+ * @return
+ * - IX_PERFPROF_ACC_STATUS_SUCCESS if clock and events counting are
+ * started successfully
+ * - IX_PERFPROF_ACC_STATUS_FAIL if unable to start the counting
+ * - IX_PERFPROF_ACC_STATUS_XSCALE_PMU_NUM_INVALID if the number of events
+ * specified is out of the valid range
+ * - IX_PERFPROF_ACC_STATUS_XSCALE_PMU_EVENT_INVALID if the value of the PMU
+ * event specified does not exist
+ * - IX_PERFPROF_ACC_STATUS_ANOTHER_UTIL_IN_PROGRESS - another utility is
+ * running
+ *
+ * @li Reentrant : no
+ * @li ISR Callable : no
+ *
+ */
+PUBLIC IxPerfProfAccStatus
+ixPerfProfAccXscalePmuEventCountStart(
+ BOOL clkCntDiv,
+ UINT32 numEvents,
+ IxPerfProfAccXscalePmuEvent pmuEvent1,
+ IxPerfProfAccXscalePmuEvent pmuEvent2,
+ IxPerfProfAccXscalePmuEvent pmuEvent3,
+ IxPerfProfAccXscalePmuEvent pmuEvent4 );
+
+/**
+ * @ingroup IxPerfProfAcc
+ *
+ * @fn ixPerfProfAccXscalePmuEventCountStop (
+ IxPerfProfAccXscalePmuResults *eventCountStopResults)
+ *
+ * @brief This API will stop the clock and event counting
+ *
+ * @param *eventCountStopResults @ref IxPerfProfAccXscalePmuResults [out] - pointer
+ * to struct containing results of counters and their overflow. It is the
+ * users's responsibility to allocate the memory for this pointer.
+ *
+ * This API will stop the clock and xscale PMU events that are being counted.
+ * The results of the clock and events count will be stored in the pointer
+ * allocated by the user. It can only be called once
+ * IxPerfProfAccEventCountStart has been called.
+ *
+ * @return
+ * - IX_PERFPROF_ACC_STATUS_SUCCESS if clock and events counting are
+ * stopped successfully
+ * - IX_PERFPROF_ACC_STATUS_XSCALE_PMU_START_NOT_CALLED if
+ * ixPerfProfAccXscalePmuEventCountStart is not called first.
+ *
+ * @li Reentrant : no
+ * @li ISR Callable : no
+ *
+ */
+
+PUBLIC IxPerfProfAccStatus
+ixPerfProfAccXscalePmuEventCountStop(
+ IxPerfProfAccXscalePmuResults *eventCountStopResults);
+
+/**
+ * @ingroup IxPerfProfAcc
+ *
+ * @fn ixPerfProfAccXscalePmuTimeSampStart(
+ UINT32 samplingRate,
+ BOOL clkCntDiv)
+ *
+ * @brief Starts the time based sampling
+ *
+ * @param samplingRate UINT32 [in] - sampling rate is the number of
+ * clock counts before a counter overflow interrupt is generated,
+ * at which, a sample is taken; the rate specified cannot be greater
+ * than the counter size of 32bits or set to zero.
+ * @param clkCntDiv BOOL [in] - enables/disables the clock divider. When
+ * true, the divider is enabled and the clock count will be incremented
+ * by one at each 64th processor clock cycle. When false, the divider
+ * is disabled and the clock count will be incremented at every
+ * processor clock cycle.
+ *
+ * This API starts the time based sampling to determine the frequency with
+ * which lines of code are being executed. Sampling is done at the rate
+ * specified by the user. At each sample,the value of the program counter
+ * is determined. Each of these occurrences are recorded to determine the
+ * frequency with which the Xscale code is being executed. This API has to be
+ * called before ixPerfProfAccXscalePmuTimeSampStop can be called.
+ *
+ * @return
+ * - IX_PERFPROF_ACC_STATUS_SUCCESS if time based sampling is started
+ * successfully
+ * - IX_PERFPROF_ACC_STATUS_FAIL if unable to start the sampling
+ * - IX_PERFPROF_ACC_STATUS_ANOTHER_UTIL_IN_PROGRESS - another utility is
+ * running
+ *
+ * @li Reentrant : no
+ * @li ISR Callable : no
+ *
+ */
+PUBLIC IxPerfProfAccStatus
+ixPerfProfAccXscalePmuTimeSampStart(
+ UINT32 samplingRate,
+ BOOL clkCntDiv);
+
+/**
+ * @ingroup IxPerfProfAcc
+ *
+ * @fn ixPerfProfAccXscalePmuTimeSampStop(
+ IxPerfProfAccXscalePmuEvtCnt *clkCount,
+ IxPerfProfAccXscalePmuSamplePcProfile *timeProfile)
+ *
+ * @brief Stops the time based sampling
+ *
+ * @param *clkCount @ref IxPerfProfAccXscalePmuEvtCnt [out] - pointer to the
+ * struct containing the final clock count and its overflow. It is the
+ * user's responsibility to allocate the memory for this pointer.
+ * @param *timeProfile @ref IxPerfProfAccXscalePmuSamplePcProfile [out] -
+ * pointer to the array of profiles for each program counter value;
+ * the user should set the size of the array to
+ * IX_PERFPROF_ACC_XSCALE_PMU_MAX_PROFILE_SAMPLES. It is the user's
+ * responsibility to allocate the memory for this pointer.
+ *
+ * This API stops the time based sampling. The results are stored in the
+ * pointers allocated by the user. It can only be called once
+ * ixPerfProfAccXscalePmuTimeSampStart has been called.
+ *
+ * @return
+ * - IX_PERFPROF_ACC_STATUS_SUCCESS if time based sampling is stopped
+ * successfully
+ * - IX_PERFPROF_ACC_STATUS_XSCALE_PMU_START_NOT_CALLED if
+ * ixPerfProfAccXscalePmuTimeSampStart not called first
+ *
+ * @li Reentrant : no
+ * @li ISR Callable : no
+ *
+ */
+PUBLIC IxPerfProfAccStatus
+ixPerfProfAccXscalePmuTimeSampStop(
+ IxPerfProfAccXscalePmuEvtCnt *clkCount,
+ IxPerfProfAccXscalePmuSamplePcProfile *timeProfile);
+
+/**
+ * @ingroup IxPerfProfAcc
+ *
+ * @fn ixPerfProfAccXscalePmuEventSampStart(
+ UINT32 numEvents,
+ IxPerfProfAccXscalePmuEvent pmuEvent1,
+ UINT32 eventRate1,
+ IxPerfProfAccXscalePmuEvent pmuEvent2,
+ UINT32 eventRate2,
+ IxPerfProfAccXscalePmuEvent pmuEvent3,
+ UINT32 eventRate3,
+ IxPerfProfAccXscalePmuEvent pmuEvent4,
+ UINT32 eventRate4)
+ *
+ * @brief Starts the event based sampling
+ *
+ * @param numEvents UINT32 [in] - the number of PMU events that are
+ * to be monitored as specified by the user. The value should be
+ * between 1-4 events at a time.
+ * @param pmuEvent1 @ref IxPerfProfAccXscalePmuEvent [in] - the specific PMU
+ * event to be monitored by counter 1
+ * @param eventRate1 UINT32 [in] - sampling rate of counter 1. The rate is
+ * the number of events before a sample taken. If 0 is specified, the
+ * the full counter value (0xFFFFFFFF) is used. The rate must not be
+ * greater than the full counter value.
+ * @param pmuEvent2 @ref IxPerfProfAccXscalePmuEvent [in] - the specific PMU
+ * event to be monitored by counter 2
+ * @param eventRate2 UINT32 [in] - sampling rate of counter 2. The rate is
+ * the number of events before a sample taken. If 0 is specified, the
+ * full counter value (0xFFFFFFFF) is used. The rate must not be
+ * greater than the full counter value.
+ * @param pmuEvent3 @ref IxPerfProfAccXscalePmuEvent [in] - the specific PMU
+ * event to be monitored by counter 3
+ * @param eventRate3 UINT32 [in] - sampling rate of counter 3. The rate is
+ * the number of events before a sample taken. If 0 is specified, the
+ * full counter value (0xFFFFFFFF) is used. The rate must not be
+ * greater than the full counter value.
+ * @param pmuEvent4 @ref IxPerfProfAccXscalePmuEvent [in] - the specific PMU
+ * event to be monitored by counter 4
+ * @param eventRate4 UINT32 [in] - sampling rate of counter 4. The rate is
+ * the number of events before a sample taken. If 0 is specified, the
+ * full counter value (0xFFFFFFFF) is used. The rate must not be
+ * greater than the full counter value.
+ *
+ * Starts the event based sampling to determine the frequency with
+ * which events are being executed. The sampling rate is the number of events,
+ * as specified by the user, before a counter overflow interrupt is
+ * generated. A sample is taken at each counter overflow interrupt. At each
+ * sample,the value of the program counter determines the corresponding
+ * location in the code. Each of these occurrences are recorded to determine
+ * the frequency with which the Xscale code in each event is executed. This API
+ * has to be called before ixPerfProfAccXscalePmuEventSampStop can be called.
+ *
+ * @return
+ * - IX_PERFPROF_ACC_STATUS_SUCCESS if event based sampling is started
+ * successfully
+ * - IX_PERFPROF_ACC_STATUS_FAIL if unable to start the sampling
+ * - IX_PERFPROF_ACC_STATUS_XSCALE_PMU_NUM_INVALID if the number of events
+ * specified is out of the valid range
+ * - IX_PERFPROF_ACC_STATUS_XSCALE_PMU_EVENT_INVALID if the value of the
+ * PMU event specified does not exist
+ * - IX_PERFPROF_ACC_STATUS_ANOTHER_UTIL_IN_PROGRESS - another utility is
+ * running
+ *
+ * @li Reentrant : no
+ * @li ISR Callable : no
+ *
+ */
+PUBLIC IxPerfProfAccStatus
+ixPerfProfAccXscalePmuEventSampStart(
+ UINT32 numEvents,
+ IxPerfProfAccXscalePmuEvent pmuEvent1,
+ UINT32 eventRate1,
+ IxPerfProfAccXscalePmuEvent pmuEvent2,
+ UINT32 eventRate2,
+ IxPerfProfAccXscalePmuEvent pmuEvent3,
+ UINT32 eventRate3,
+ IxPerfProfAccXscalePmuEvent pmuEvent4,
+ UINT32 eventRate4);
+
+/**
+ * @ingroup IxPerfProfAcc
+ *
+ * @fn ixPerfProfAccXscalePmuEventSampStop(
+ IxPerfProfAccXscalePmuSamplePcProfile *eventProfile1,
+ IxPerfProfAccXscalePmuSamplePcProfile *eventProfile2,
+ IxPerfProfAccXscalePmuSamplePcProfile *eventProfile3,
+ IxPerfProfAccXscalePmuSamplePcProfile *eventProfile4)
+ *
+ * @brief Stops the event based sampling
+ *
+ * @param *eventProfile1 @ref IxPerfProfAccXscalePmuSamplePcProfile [out] -
+ * pointer to the array of profiles for each program counter value;
+ * the user should set the size of the array to
+ * IX_PERFPROF_ACC_XSCALE_PMU_MAX_PROFILE_SAMPLES. It is the
+ * users's responsibility to allocate memory for this pointer.
+ * @param *eventProfile2 @ref IxPerfProfAccXscalePmuSamplePcProfile [out] -
+ * pointer to the array of profiles for each program counter value;
+ * the user should set the size of the array to
+ * IX_PERFPROF_ACC_XSCALE_PMU_MAX_PROFILE_SAMPLES. It is the
+ * users's responsibility to allocate memory for this pointer.
+ * @param *eventProfile3 @ref IxPerfProfAccXscalePmuSamplePcProfile [out] -
+ * pointer to the array of profiles for each program counter value;
+ * the user should set the size of the array to
+ * IX_PERFPROF_ACC_XSCALE_PMU_MAX_PROFILE_SAMPLES. It is the
+ * users's responsibility to allocate memory for this pointer.
+ * @param *eventProfile4 @ref IxPerfProfAccXscalePmuSamplePcProfile [out] -
+ * pointer to the array of profiles for each program counter value;
+ * the user should set the size of the array to
+ * IX_PERFPROF_ACC_XSCALE_PMU_MAX_PROFILE_SAMPLES. It is the
+ * users's responsibility to allocate memory for this pointer.
+ *
+ * This API stops the event based sampling. The results are stored in the
+ * pointers allocated by the user. It can only be called once
+ * ixPerfProfAccEventSampStart has been called.
+ *
+ * @return
+ * - IX_PERFPROF_ACC_STATUS_SUCCESS if event based sampling is stopped
+ * successfully
+ * - IX_PERFPROF_ACC_STATUS_XSCALE_PMU_START_NOT_CALLED if
+ * ixPerfProfAccEventSampStart not called first.
+ *
+ * @li Reentrant : no
+ * @li ISR Callable : no
+ *
+ */
+PUBLIC IxPerfProfAccStatus
+ixPerfProfAccXscalePmuEventSampStop(
+ IxPerfProfAccXscalePmuSamplePcProfile *eventProfile1,
+ IxPerfProfAccXscalePmuSamplePcProfile *eventProfile2,
+ IxPerfProfAccXscalePmuSamplePcProfile *eventProfile3,
+ IxPerfProfAccXscalePmuSamplePcProfile *eventProfile4);
+
+/**
+ * @ingroup IxPerfProfAcc
+ *
+ * @fn ixPerfProfAccXscalePmuResultsGet(IxPerfProfAccXscalePmuResults *results)
+ *
+ * @brief Reads the current value of the counters and their overflow
+ *
+ * @param *results @ref IxPerfProfAccXscalePmuResults [out] - pointer to the
+ results struct. It is the user's responsibility to allocate memory
+ for this pointer
+ *
+ * This API reads the value of all four event counters and the clock counter,
+ * and the associated overflows. It does not give results associated with
+ * sampling, i.e. PC and their frequencies. This API can be called at any time
+ * once a process has been started. If it is called before a process has started
+ * the user should be aware that the values it contains are default values and
+ * might be meaningless. The values of the counters are stored in the pointer
+ * allocated by the client.
+ *
+ * @return - none
+ *
+ * @li Reentrant : no
+ * @li ISR Callable : no
+ *
+ */
+PUBLIC void
+ixPerfProfAccXscalePmuResultsGet(IxPerfProfAccXscalePmuResults *results);
+
+/**
+ * @ingroup IxPerfProfAcc
+ *
+ * @fn ixPerfProfAccBusPmuStart(
+ IxPerfProfAccBusPmuMode mode,
+ IxPerfProfAccBusPmuEventCounters1 pecEvent1,
+ IxPerfProfAccBusPmuEventCounters2 pecEvent2,
+ IxPerfProfAccBusPmuEventCounters3 pecEvent3,
+ IxPerfProfAccBusPmuEventCounters4 pecEvent4,
+ IxPerfProfAccBusPmuEventCounters5 pecEvent5,
+ IxPerfProfAccBusPmuEventCounters6 pecEvent6,
+ IxPerfProfAccBusPmuEventCounters7 pecEvent7)
+ * @brief Initializes all the counters and selects events to be monitored.
+ *
+ * Function initializes all the counters and assigns the events associated
+ * with the counters. Users send in the mode and events they want to count.
+ * This API verifies if the combination chosen is appropriate
+ * and sets all the registers accordingly. Selecting HALT mode will result
+ * in an error. User should use ixPerfProfAccBusPmuStop() to HALT.
+ *
+ *
+ * @param mode @ref IxPerfProfAccStateBusPmuMode [in] - Mode selection.
+ * @param pecEvent1 @ref IxPerfProfAccBusPmuEventCounters1 [in] - Event for PEC1.
+ * @param pecEvent2 @ref IxPerfProfAccBusPmuEventCounters2 [in] - Event for PEC2.
+ * @param pecEvent3 @ref IxPerfProfAccBusPmuEventCounters3 [in] - Event for PEC3.
+ * @param pecEvent4 @ref IxPerfProfAccBusPmuEventCounters4 [in] - Event for PEC4.
+ * @param pecEvent5 @ref IxPerfProfAccBusPmuEventCounters5 [in] - Event for PEC5.
+ * @param pecEvent6 @ref IxPerfProfAccBusPmuEventCounters6 [in] - Event for PEC6.
+ * @param pecEvent7 @ref IxPerfProfAccBusPmuEventCounters7 [in] - Event for PEC7.
+ *
+ * @return
+ * - IX_PERFPROF_ACC_STATUS_SUCCESS - Initialization executed
+ * successfully.
+ * - IX_PERFPROF_ACC_STATUS_BUS_PMU_MODE_ERROR - Error in selection of
+ * mode. Only NORTH, SOUTH and SDRAM modes are allowed.
+ * - IX_PERFPROF_ACC_STATUS_BUS_PMU_PEC1_ERROR - Error in selection of
+ * event for PEC1
+ * - IX_PERFPROF_ACC_STATUS_BUS_PMU_PEC2_ERROR - Error in selection of
+ * event for PEC2
+ * - IX_PERFPROF_ACC_STATUS_BUS_PMU_PEC3_ERROR - Error in selection of
+ * event for PEC3
+ * - IX_PERFPROF_ACC_STATUS_BUS_PMU_PEC4_ERROR - Error in selection of
+ * event for PEC4
+ * - IX_PERFPROF_ACC_STATUS_BUS_PMU_PEC5_ERROR - Error in selection of
+ * event for PEC5
+ * - IX_PERFPROF_ACC_STATUS_BUS_PMU_PEC6_ERROR - Error in selection of
+ * event for PEC6
+ * - IX_PERFPROF_ACC_STATUS_BUS_PMU_PEC7_ERROR - Error in selection of
+ * event for PEC7
+ * - IX_PERFPROF_ACC_STATUS_ANOTHER_UTIL_IN_PROGRESS - another utility
+ * is running
+ * - IX_PERFPROF_ACC_STATUS_FAIL - Failed to start because interrupt
+ * service routine fails to bind.
+ *
+ * @li Reentrant : no
+ * @li ISR Callable : no
+ *
+ **/
+PUBLIC
+IxPerfProfAccStatus ixPerfProfAccBusPmuStart (
+ IxPerfProfAccBusPmuMode mode,
+ IxPerfProfAccBusPmuEventCounters1 pecEvent1,
+ IxPerfProfAccBusPmuEventCounters2 pecEvent2,
+ IxPerfProfAccBusPmuEventCounters3 pecEvent3,
+ IxPerfProfAccBusPmuEventCounters4 pecEvent4,
+ IxPerfProfAccBusPmuEventCounters5 pecEvent5,
+ IxPerfProfAccBusPmuEventCounters6 pecEvent6,
+ IxPerfProfAccBusPmuEventCounters7 pecEvent7);
+
+/**
+ * @ingroup IxPerfProfAcc
+ *
+ * @fn ixPerfProfAccBusPmuStop(void)
+ * @brief Stops all counters.
+ *
+ * This function stops all the PECs by setting the halt bit in the ESR.
+ *
+ *
+ * @return
+ * - IX_PERFPROF_ACC_STATUS_SUCCESS - Counters successfully halted.
+ * - IX_PERFPROF_ACC_STATUS_FAIL - Counters could'nt be halted.
+ * - IX_PERFPROF_ACC_STATUS_BUS_PMU_START_NOT_CALLED - the
+ * ixPerfProfAccBusPmuStart() function is not called.
+ *
+ * @li Reentrant : no
+ * @li ISR Callable : no
+ *
+ **/
+PUBLIC IxPerfProfAccStatus
+ixPerfProfAccBusPmuStop (void);
+
+/**
+ * @ingroup IxPerfProfAcc
+ *
+ * @fn ixPerfProfAccBusPmuResultsGet (
+ IxPerfProfAccBusPmuResults *busPmuResults)
+ * @brief Gets values of all counters
+ *
+ * This function is responsible for getting all the counter values from the
+ * lower API and putting it into an array for the user.
+ *
+ * @param *busPmuResults @ref IxPerfProfAccBusPmuResults [out]
+ * - Pointer to a structure of arrays to store all counter values.
+ *
+ * @return none
+ *
+ * @li Reentrant : no
+ * @li ISR Callable : no
+ *
+ **/
+PUBLIC void
+ixPerfProfAccBusPmuResultsGet (IxPerfProfAccBusPmuResults *BusPmuResults);
+
+/**
+ * @ingroup IxPerfProfAcc
+ *
+ * @fn ixPerfProfAccBusPmuPMSRGet (
+ UINT32 *pmsrValue)
+ * @brief Get values of PMSR
+ *
+ * This API gets the Previous Master Slave Register
+ * value and returns it to the calling function. This value indicates
+ * which master or slave accessed the north, south bus or sdram last.
+ * The value returned by this function is a 32 bit value and is read
+ * from location of an offset 0x0024 of the base value.
+ *
+ * The PMSR value returned indicate the following:
+ * <pre>
+ *
+ * *************************************************************************************
+ * * Bit * Name * Description *
+ * * *
+ * *************************************************************************************
+ * * [31:18] *Reserved* *
+ * *************************************************************************************
+ * * [17:12] * PSS * Indicates which of the slaves on *
+ * * * * ARBS was previously *
+ * * * * accessed by the AHBS. *
+ * * * * [000001] Expansion Bus *
+ * * * * [000010] SDRAM Controller *
+ * * * * [000100] PCI *
+ * * * * [001000] Queue Manager *
+ * * * * [010000] AHB-APB Bridge *
+ * * * * [100000] Reserved *
+ * *************************************************************************************
+ * * [11:8] * PSN * Indicates which of the Slaves on *
+ * * * * ARBN was previously *
+ * * * * accessed the AHBN. *
+ * * * * [0001] SDRAM Controller *
+ * * * * [0010] AHB-AHB Bridge *
+ * * * * [0100] Reserved *
+ * * * * [1000] Reserved *
+ * *************************************************************************************
+ * * [7:4] * PMS * Indicates which of the Masters on *
+ * * * * ARBS was previously *
+ * * * * accessing the AHBS. *
+ * * * * [0001] Gasket *
+ * * * * [0010] AHB-AHB Bridge *
+ * * * * [0100] PCI *
+ * * * * [1000] APB *
+ * *************************************************************************************
+ * * [3:0] * PMN * Indicates which of the Masters on *
+ * * * * ARBN was previously *
+ * * * * accessing the AHBN. *
+ * * * * [0001] NPEA *
+ * * * * [0010] NPEB *
+ * * * * [0100] NPEC *
+ * * * * [1000] Reserved *
+ * *************************************************************************************
+ * </pre>
+ *
+ * @param *pmsrValue UINT32 [out] - Pointer to return PMSR value. Users need to
+ * allocate storage for psmrValue.
+ *
+ * @return none
+ *
+ * @li Reentrant : no
+ * @li ISR Callable : no
+ *
+ **/
+PUBLIC void
+ixPerfProfAccBusPmuPMSRGet (
+UINT32 *pmsrValue);
+
+
+/**
+ * The APIs below are specifically used for Xcycle module.
+ **/
+
+/**
+ * @ingroup IxPerfProfAcc
+ *
+ * @fn ixPerfProfAccXcycleBaselineRun (
+ UINT32 *numBaselineCycle)
+ *
+ * @brief Perform baseline for Xcycle
+ *
+ * @param *numBaselineCycle UINT32 [out] - pointer to baseline value after
+ * calibration. Calling function are responsible for
+ * allocating memory space for this pointer.
+ *
+ * Global Data :
+ * - None.
+ *
+ * This function MUST be run before the Xcycle tool can be used. This
+ * function must be run immediately when the OS boots up with no other
+ * addition programs running.
+ * Addition note : This API will measure the time needed to perform
+ * a fix amount of CPU instructions (~ 1 second worth of loops) as a
+ * highest priority task and with interrupt disabled. The time measured
+ * is known as the baseline - interpreted as the shortest time
+ * needed to complete the amount of CPU instructions. The baseline is
+ * returned as unit of time in 66Mhz clock tick.
+ *
+ * @return
+ * - IX_PERFPROF_ACC_STATUS_SUCCESS - successful run, result is returned
+ * - IX_PERFPROF_ACC_STATUS_XCYCLE_PRIORITY_SET_FAIL - failed to change
+ * task priority
+ * - IX_PERFPROF_ACC_STATUS_XCYCLE_PRIORITY_RESTORE_FAIL - failed to
+ * restore task priority
+ * - IX_PERFPROF_ACC_STATUS_ANOTHER_UTIL_IN_PROGRESS - another utility
+ * is running
+ * - IX_PERFPROF_ACC_STATUS_XCYCLE_MEASUREMENT_IN_PROGRESS - Xcycle
+ * tool has already started
+ *
+ * @li Reentrant : no
+ * @li ISR Callable : no
+ *
+ */
+PUBLIC IxPerfProfAccStatus
+ixPerfProfAccXcycleBaselineRun(
+ UINT32 *numBaselineCycle);
+
+/**
+ * @ingroup IxPerfProfAcc
+ *
+ * @fn ixPerfProfAccXcycleStart(
+ UINT32 numMeasurementsRequested);
+ *
+ * @brief Start the measurement
+ *
+ * @param numMeasurementsRequested UINT32 [in] - number of measurements
+ * to perform. Value can be 0 to
+ * IX_PERFPROF_ACC_XCYCLE_MAX_NUM_OF_MEASUREMENTS.
+ * 0 indicate continuous measurement.
+ *
+ * Global Data :
+ * - None.
+ *
+ *
+ * Start the measurements immediately.
+ * numMeasurementsRequested specifies number of measurements to run.
+ * If numMeasurementsRequested is set to 0, the measurement will
+ * be performed continuously until IxPerfProfAccXcycleStop()
+ * is called.
+ * It is estimated that 1 measurement takes approximately 1 second during
+ * low CPU utilization, therefore 128 measurement takes approximately 128 sec.
+ * When CPU utilization is high, the measurement will take longer.
+ * This function spawn a task the perform the measurement and returns.
+ * The measurement may continue even if this function returns.
+ *
+ * IMPORTANT: Under heavy CPU utilization, the task spawn by this
+ * function may starve and fail to respond to stop command. User
+ * may need to kill the task manually in this case.
+ *
+ * There are only IX_PERFPROF_ACC_XCYCLE_MAX_NUM_OF_MEASUREMENTS
+ * storage available so storing is wrapped around if measurements are
+ * more than IX_PERFPROF_ACC_XCYCLE_MAX_NUM_OF_MEASUREMENTS.
+ *
+ *
+ * @return
+ * - IX_PERFPROF_ACC_STATUS_SUCCESS - successful start, a thread is created
+ * in the background to perform measurement.
+ * - IX_PERFPROF_ACC_STATUS_XCYCLE_PRIORITY_SET_FAIL - failed to set
+ * task priority
+ * - IX_PERFPROF_ACC_STATUS_XCYCLE_THREAD_CREATE_FAIL - failed to create
+ * thread to perform measurement.
+ * - IX_PERFPROF_ACC_STATUS_XCYCLE_NO_BASELINE - baseline is not available
+ * - IX_PERFPROF_ACC_STATUS_XCYCLE_MEASUREMENT_REQUEST_OUT_OF_RANGE -
+ * value is larger than IX_PERFPROF_ACC_XCYCLE_MAX_NUM_OF_MEASUREMENTS
+ * - IX_PERFPROF_ACC_STATUS_XCYCLE_MEASUREMENT_IN_PROGRESS - Xcycle tool
+ * has already started
+ * - IX_PERFPROF_ACC_STATUS_ANOTHER_UTIL_IN_PROGRESS - another utility is
+ * running
+ *
+ * @li Reentrant : no
+ * @li ISR Callable : no
+ *
+ */
+PUBLIC IxPerfProfAccStatus
+ixPerfProfAccXcycleStart (
+ UINT32 numMeasurementsRequested);
+
+/**
+ * @ingroup IxPerfProfAcc
+ *
+ * @fn ixPerfProfAccXcycleStop(void);
+ *
+ * @brief Stop the Xcycle measurement
+ *
+ * @param None
+ *
+ * Global Data :
+ * - None.
+ *
+ * Stop Xcycle measurements immediately. If the measurements have stopped
+ * or not started, return IX_PERFPROF_STATUS_XCYCLE_MEASUREMENT_NOT_RUNNING.
+ * Note: This function does not stop measurement cold. The measurement thread
+ * may need a few seconds to complete the last measurement. User needs to use
+ * ixPerfProfAccXcycleInProgress() to determine if measurement is indeed
+ * completed.
+ *
+ * @return
+ * - IX_PERFPROF_ACC_STATUS_SUCCESS - successful measurement is stopped
+ * - IX_PERFPROF_STATUS_XCYCLE_MEASUREMENT_NOT_RUNNING - no measurement running
+ *
+ * @li Reentrant : no
+ * @li ISR Callable : no
+ *
+ */
+PUBLIC IxPerfProfAccStatus
+ixPerfProfAccXcycleStop(void);
+
+/**
+ * @ingroup IxPerfProfAcc
+ *
+ * @fn ixPerfProfAccXcycleResultsGet(
+ IxPerfProfAccXcycleResults *xcycleResult )
+ *
+ * @brief Get the results of Xcycle measurement
+ *
+ * @param *xcycleResult @ref IxPerfProfAccXcycleResults [out] - Pointer to
+ * results of last measurements. Calling function are
+ * responsible for allocating memory space for this pointer.
+ *
+ * Global Data :
+ * - None.
+ *
+ * Retrieve the results of last measurement. User should use
+ * ixPerfProfAccXcycleInProgress() to check if measurement is completed
+ * before getting the results.
+ *
+ * @return
+ * - IX_PERFPROF_ACC_STATUS_SUCCESS - successful
+ * - IX_PERFPROF_ACC_STATUS_FAIL - result is not complete.
+ * - IX_PERFPROF_ACC_STATUS_XCYCLE_NO_BASELINE - baseline is performed
+ * - IX_PERFPROF_ACC_STATUS_XCYCLE_MEASUREMENT_IN_PROGRESS - Xcycle
+ * tool is still running
+ *
+ * @li Reentrant : no
+ * @li ISR Callable : no
+ *
+ */
+PUBLIC IxPerfProfAccStatus
+ixPerfProfAccXcycleResultsGet (
+ IxPerfProfAccXcycleResults *xcycleResult);
+
+/**
+ * @ingroup IxPerfProfAcc
+ *
+ * @fn ixPerfProfAccXcycleInProgress (void)
+ *
+ * @brief Check if Xcycle is running
+ *
+ * @param None
+ * Global Data :
+ * - None.
+ *
+ * Check if Xcycle measuring task is running.
+ *
+ * @return
+ * - TRUE - Xcycle is running
+ * - FALSE - Xcycle is not running
+ *
+ * @li Reentrant : no
+ * @li ISR Callable : no
+ *
+ */
+PUBLIC BOOL
+ixPerfProfAccXcycleInProgress(void);
+
+#ifdef __linux
+/**
+ * @ingroup IxPerfProfAcc
+ *
+ * @fn ixPerfProfAccXscalePmuTimeSampCreateProcFile
+ *
+ * @brief Enables proc file to call module function
+ *
+ * @param None
+ *
+ * Global Data :
+ * - None.
+ *
+ * This function is declared globally to enable /proc directory system to call
+ * and execute the function when the registered file is called. This function is not meant to
+ * be called by the user.
+ *
+ * @return
+ * - Length of data written to file.
+ *
+ * @li Reentrant : no
+ * @li ISR Callable : no
+ *
+ */
+int
+ixPerfProfAccXscalePmuTimeSampCreateProcFile (char *buf, char **start, off_t offset,
+ int count, int *eof, void *data);
+
+/**
+ * @ingroup IxPerfProfAcc
+ *
+ * @fn ixPerfProfAccXscalePmuEventSampCreateProcFile
+ *
+ * @brief Enables proc file to call module function
+ *
+ * @param None
+ *
+ * Global Data :
+ * - None.
+ *
+ * This function is declared globally to enable /proc directory system to call
+ * and execute the function when the registered file is called. This function is not meant to
+ * be called by the user.
+ *
+ * @return
+ * - Length of data written to file.
+ *
+ * @li Reentrant : no
+ * @li ISR Callable : no
+ *
+ */
+int
+ixPerfProfAccXscalePmuEventSampCreateProcFile (char *buf, char **start, off_t offset,
+ int count, int *eof, void *data);
+
+
+#endif /* ifdef __linux */
+
+#endif /* ndef IXPERFPROFACC_H */
+
+/**
+ *@} defgroup IxPerfProfAcc
+ */
+
+
diff --git a/cpu/ixp/npe/include/IxQMgr.h b/cpu/ixp/npe/include/IxQMgr.h
new file mode 100644
index 0000000000..c083a2b322
--- /dev/null
+++ b/cpu/ixp/npe/include/IxQMgr.h
@@ -0,0 +1,2210 @@
+/**
+ * @file IxQMgr.h
+ *
+ * @date 30-Oct-2001
+ *
+ * @brief This file contains the public API of IxQMgr component.
+ *
+ * Some functions contained in this module are inline to achieve better
+ * data-path performance. For this to work, the function definitions are
+ * contained in this header file. The "normal" use of inline functions
+ * is to use the inline functions in the module in which they are
+ * defined. In this case these inline functions are used in external
+ * modules and therefore the use of "inline extern". What this means
+ * is as follows: if a function foo is declared as "inline extern" this
+ * definition is only used for inlining, in no case is the function
+ * compiled on its own. If the compiler cannot inline the function it
+ * becomes an external reference. Therefore in IxQMgrQAccess.c all
+ * inline functions are defined without the "inline extern" specifier
+ * and so define the external references. In all other source files
+ * including this header file, these funtions are defined as "inline
+ * extern".
+ *
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+*/
+
+/* ------------------------------------------------------
+ Doxygen group definitions
+ ------------------------------------------------------ */
+/**
+ * @defgroup IxQMgrAPI IXP400 Queue Manager (IxQMgr) API
+ *
+ * @brief The public API for the IXP400 QMgr component.
+ *
+ * IxQMgr is a low level interface to the AHB Queue Manager
+ *
+ * @{
+ */
+
+#ifndef IXQMGR_H
+#define IXQMGR_H
+
+/*
+ * User defined include files
+ */
+
+#include "IxOsal.h"
+
+/*
+ * Define QMgr's IoMem macros, in DC mode if in LE
+ * regular if in BE. (Note: For Linux LSP gold release
+ * may need to adjust mode.
+ */
+#if defined (__BIG_ENDIAN)
+
+#define IX_QMGR_INLINE_READ_LONG IX_OSAL_READ_LONG_BE
+#define IX_QMGR_INLINE_WRITE_LONG IX_OSAL_WRITE_LONG_BE
+
+#else
+
+#define IX_QMGR_INLINE_READ_LONG IX_OSAL_READ_LONG_LE_DC
+#define IX_QMGR_INLINE_WRITE_LONG IX_OSAL_WRITE_LONG_LE_DC
+
+#endif
+
+/*
+ * #defines and macros
+ */
+
+/**
+*
+* @ingroup IxQMgrAPI
+*
+* @def IX_QMGR_INLINE
+*
+* @brief Inline definition, for inlining of Queue Access functions on API
+*
+* Please read the header information in this file for more details on the
+* use of function inlining in this component.
+*
+*/
+
+#ifndef __wince
+
+#ifdef IXQMGRQACCESS_C
+/* If IXQMGRQACCESS_C is set then the IxQmgrQAccess.c is including this file
+ and must instantiate a concrete definition for each inlineable API function
+ whether or not that function actually gets inlined. */
+# ifdef NO_INLINE_APIS
+# undef NO_INLINE_APIS
+# endif
+# define IX_QMGR_INLINE /* Empty Define */
+#else
+# ifndef NO_INLINE_APIS
+# define IX_QMGR_INLINE IX_OSAL_INLINE_EXTERN
+# else
+# define IX_QMGR_INLINE /* Empty Define */
+# endif
+#endif
+
+#else /* ndef __wince */
+
+# ifndef NO_INLINE_APIS
+# define NO_INLINE_APIS
+# endif
+# define IX_QMGR_INLINE
+
+#endif
+
+
+/**
+*
+* @ingroup IxQMgrAPI
+*
+* @def IX_QMGR_MAX_NUM_QUEUES
+*
+* @brief Number of queues supported by the AQM.
+*
+* This constant is used to indicate the number of AQM queues
+*
+*/
+#define IX_QMGR_MAX_NUM_QUEUES 64
+
+/**
+*
+* @ingroup IxQMgrAPI
+*
+* @def IX_QMGR_MIN_QID
+*
+* @brief Minimum queue identifier.
+*
+* This constant is used to indicate the smallest queue identifier
+*
+*/
+#define IX_QMGR_MIN_QID IX_QMGR_QUEUE_0
+
+/**
+*
+* @ingroup IxQMgrAPI
+*
+* @def IX_QMGR_MAX_QID
+*
+* @brief Maximum queue identifier.
+*
+* This constant is used to indicate the largest queue identifier
+*
+*/
+#define IX_QMGR_MAX_QID IX_QMGR_QUEUE_63
+
+/**
+*
+* @ingroup IxQMgrAPI
+*
+* @def IX_QMGR_MIN_QUEUPP_QID
+*
+* @brief Minimum queue identifier for reduced functionality queues.
+*
+* This constant is used to indicate Minimum queue identifier for reduced
+* functionality queues
+*
+*/
+#define IX_QMGR_MIN_QUEUPP_QID 32
+
+/**
+*
+* @ingroup IxQMgrAPI
+*
+* @def IX_QMGR_MAX_QNAME_LEN
+*
+* @brief Maximum queue name length.
+*
+* This constant is used to indicate the maximum null terminated string length
+* (excluding '\0') for a queue name
+*
+*/
+#define IX_QMGR_MAX_QNAME_LEN 16
+
+/**
+ *
+ * @ingroup IxQMgrAPI
+ *
+ * @def IX_QMGR_WARNING
+ *
+ * @brief Warning return code.
+ *
+ * Execution complete, but there is a special case to handle
+ *
+ */
+#define IX_QMGR_WARNING 2
+
+/**
+ *
+ * @ingroup IxQMgrAPI
+ *
+ * @def IX_QMGR_PARAMETER_ERROR
+ *
+ * @brief Parameter error return code (NULL pointer etc..).
+ *
+ * parameter error out of range/invalid
+ *
+ */
+#define IX_QMGR_PARAMETER_ERROR 3
+
+/**
+ *
+ * @ingroup IxQMgrAPI
+ *
+ * @def IX_QMGR_INVALID_Q_ENTRY_SIZE
+ *
+ * @brief Invalid entry size return code.
+ *
+ * Invalid queue entry size for a queue read/write
+ *
+ */
+#define IX_QMGR_INVALID_Q_ENTRY_SIZE 4
+
+/**
+ *
+ * @ingroup IxQMgrAPI
+ *
+ * @def IX_QMGR_INVALID_Q_ID
+ *
+ * @brief Invalid queue identifier return code.
+ *
+ * Invalid queue id, not in range 0-63
+ *
+ */
+#define IX_QMGR_INVALID_Q_ID 5
+
+/**
+ *
+ * @ingroup IxQMgrAPI
+ *
+ * @def IX_QMGR_INVALID_CB_ID
+ *
+ * @brief Invalid callback identifier return code.
+ *
+ * Invalid callback id
+ */
+#define IX_QMGR_INVALID_CB_ID 6
+
+/**
+ *
+ * @ingroup IxQMgrAPI
+ *
+ * @def IX_QMGR_CB_ALREADY_SET
+ *
+ * @brief Callback set error return code.
+ *
+ * The specified callback has already been for this queue
+ *
+ */
+#define IX_QMGR_CB_ALREADY_SET 7
+
+/**
+ *
+ * @ingroup IxQMgrAPI
+ *
+ * @def IX_QMGR_NO_AVAILABLE_SRAM
+ *
+ * @brief Sram consumed return code.
+ *
+ * All AQM Sram is consumed by queue configuration
+ *
+ */
+#define IX_QMGR_NO_AVAILABLE_SRAM 8
+
+/**
+ *
+ * @ingroup IxQMgrAPI
+ *
+ * @def IX_QMGR_INVALID_INT_SOURCE_ID
+ *
+ * @brief Invalid queue interrupt source identifier return code.
+ *
+ * Invalid queue interrupt source given for notification enable
+ */
+#define IX_QMGR_INVALID_INT_SOURCE_ID 9
+
+/**
+ *
+ * @ingroup IxQMgrAPI
+ *
+ * @def IX_QMGR_INVALID_QSIZE
+ *
+ * @brief Invalid queue size error code.
+ *
+ * Invalid queue size not one of 16,32, 64, 128
+ *
+ *
+ */
+#define IX_QMGR_INVALID_QSIZE 10
+
+/**
+ *
+ * @ingroup IxQMgrAPI
+ *
+ * @def IX_QMGR_INVALID_Q_WM
+ *
+ * @brief Invalid queue watermark return code.
+ *
+ * Invalid queue watermark given for watermark set
+ */
+#define IX_QMGR_INVALID_Q_WM 11
+
+/**
+ *
+ * @ingroup IxQMgrAPI
+ *
+ * @def IX_QMGR_Q_NOT_CONFIGURED
+ *
+ * @brief Queue not configured return code.
+ *
+ * Returned to the client when a function has been called on an unconfigured
+ * queue
+ *
+ */
+#define IX_QMGR_Q_NOT_CONFIGURED 12
+
+/**
+ *
+ * @ingroup IxQMgrAPI
+ *
+ * @def IX_QMGR_Q_ALREADY_CONFIGURED
+ *
+ * @brief Queue already configured return code.
+ *
+ * Returned to client to indicate that a queue has already been configured
+ */
+#define IX_QMGR_Q_ALREADY_CONFIGURED 13
+
+/**
+ *
+ * @ingroup IxQMgrAPI
+ *
+ * @def IX_QMGR_Q_UNDERFLOW
+ *
+ * @brief Underflow return code.
+ *
+ * Underflow on a queue read has occurred
+ *
+ */
+#define IX_QMGR_Q_UNDERFLOW 14
+
+/**
+ *
+ * @ingroup IxQMgrAPI
+ *
+ * @def IX_QMGR_Q_OVERFLOW
+ *
+ * @brief Overflow return code.
+ *
+ * Overflow on a queue write has occurred
+ *
+ */
+#define IX_QMGR_Q_OVERFLOW 15
+
+/**
+ *
+ * @ingroup IxQMgrAPI
+ *
+ * @def IX_QMGR_Q_INVALID_PRIORITY
+ *
+ * @brief Invalid priority return code.
+ *
+ * Invalid priority, not one of 0,1,2
+ */
+#define IX_QMGR_Q_INVALID_PRIORITY 16
+
+/**
+ *
+ * @ingroup IxQMgrAPI
+ *
+ * @def IX_QMGR_ENTRY_INDEX_OUT_OF_BOUNDS
+ *
+ * @brief Entry index out of bounds return code.
+ *
+ * Entry index is greater than number of entries in queue.
+ */
+#define IX_QMGR_ENTRY_INDEX_OUT_OF_BOUNDS 17
+
+/**
+ *
+ * @ingroup IxQMgrAPI
+ *
+ * @def ixQMgrDispatcherLoopRun
+ *
+ * @brief Map old function name ixQMgrDispatcherLoopRun ()
+ * to @ref ixQMgrDispatcherLoopRunA0 ().
+ *
+ */
+#define ixQMgrDispatcherLoopRun ixQMgrDispatcherLoopRunA0
+
+
+/**
+ *
+ * @ingroup IxQMgrAPI
+ *
+ * @def IX_QMGR_QUEUE
+ *
+ * @brief Definition of AQM queue numbers
+ *
+ */
+#define IX_QMGR_QUEUE_0 (0) /**< Queue Number 0 */
+#define IX_QMGR_QUEUE_1 (1) /**< Queue Number 1 */
+#define IX_QMGR_QUEUE_2 (2) /**< Queue Number 2 */
+#define IX_QMGR_QUEUE_3 (3) /**< Queue Number 3 */
+#define IX_QMGR_QUEUE_4 (4) /**< Queue Number 4 */
+#define IX_QMGR_QUEUE_5 (5) /**< Queue Number 5 */
+#define IX_QMGR_QUEUE_6 (6) /**< Queue Number 6 */
+#define IX_QMGR_QUEUE_7 (7) /**< Queue Number 7 */
+#define IX_QMGR_QUEUE_8 (8) /**< Queue Number 8 */
+#define IX_QMGR_QUEUE_9 (9) /**< Queue Number 9 */
+#define IX_QMGR_QUEUE_10 (10) /**< Queue Number 10 */
+#define IX_QMGR_QUEUE_11 (11) /**< Queue Number 11 */
+#define IX_QMGR_QUEUE_12 (12) /**< Queue Number 12 */
+#define IX_QMGR_QUEUE_13 (13) /**< Queue Number 13 */
+#define IX_QMGR_QUEUE_14 (14) /**< Queue Number 14 */
+#define IX_QMGR_QUEUE_15 (15) /**< Queue Number 15 */
+#define IX_QMGR_QUEUE_16 (16) /**< Queue Number 16 */
+#define IX_QMGR_QUEUE_17 (17) /**< Queue Number 17 */
+#define IX_QMGR_QUEUE_18 (18) /**< Queue Number 18 */
+#define IX_QMGR_QUEUE_19 (19) /**< Queue Number 19 */
+#define IX_QMGR_QUEUE_20 (20) /**< Queue Number 20 */
+#define IX_QMGR_QUEUE_21 (21) /**< Queue Number 21 */
+#define IX_QMGR_QUEUE_22 (22) /**< Queue Number 22 */
+#define IX_QMGR_QUEUE_23 (23) /**< Queue Number 23 */
+#define IX_QMGR_QUEUE_24 (24) /**< Queue Number 24 */
+#define IX_QMGR_QUEUE_25 (25) /**< Queue Number 25 */
+#define IX_QMGR_QUEUE_26 (26) /**< Queue Number 26 */
+#define IX_QMGR_QUEUE_27 (27) /**< Queue Number 27 */
+#define IX_QMGR_QUEUE_28 (28) /**< Queue Number 28 */
+#define IX_QMGR_QUEUE_29 (29) /**< Queue Number 29 */
+#define IX_QMGR_QUEUE_30 (30) /**< Queue Number 30 */
+#define IX_QMGR_QUEUE_31 (31) /**< Queue Number 31 */
+#define IX_QMGR_QUEUE_32 (32) /**< Queue Number 32 */
+#define IX_QMGR_QUEUE_33 (33) /**< Queue Number 33 */
+#define IX_QMGR_QUEUE_34 (34) /**< Queue Number 34 */
+#define IX_QMGR_QUEUE_35 (35) /**< Queue Number 35 */
+#define IX_QMGR_QUEUE_36 (36) /**< Queue Number 36 */
+#define IX_QMGR_QUEUE_37 (37) /**< Queue Number 37 */
+#define IX_QMGR_QUEUE_38 (38) /**< Queue Number 38 */
+#define IX_QMGR_QUEUE_39 (39) /**< Queue Number 39 */
+#define IX_QMGR_QUEUE_40 (40) /**< Queue Number 40 */
+#define IX_QMGR_QUEUE_41 (41) /**< Queue Number 41 */
+#define IX_QMGR_QUEUE_42 (42) /**< Queue Number 42 */
+#define IX_QMGR_QUEUE_43 (43) /**< Queue Number 43 */
+#define IX_QMGR_QUEUE_44 (44) /**< Queue Number 44 */
+#define IX_QMGR_QUEUE_45 (45) /**< Queue Number 45 */
+#define IX_QMGR_QUEUE_46 (46) /**< Queue Number 46 */
+#define IX_QMGR_QUEUE_47 (47) /**< Queue Number 47 */
+#define IX_QMGR_QUEUE_48 (48) /**< Queue Number 48 */
+#define IX_QMGR_QUEUE_49 (49) /**< Queue Number 49 */
+#define IX_QMGR_QUEUE_50 (50) /**< Queue Number 50 */
+#define IX_QMGR_QUEUE_51 (51) /**< Queue Number 51 */
+#define IX_QMGR_QUEUE_52 (52) /**< Queue Number 52 */
+#define IX_QMGR_QUEUE_53 (53) /**< Queue Number 53 */
+#define IX_QMGR_QUEUE_54 (54) /**< Queue Number 54 */
+#define IX_QMGR_QUEUE_55 (55) /**< Queue Number 55 */
+#define IX_QMGR_QUEUE_56 (56) /**< Queue Number 56 */
+#define IX_QMGR_QUEUE_57 (57) /**< Queue Number 57 */
+#define IX_QMGR_QUEUE_58 (58) /**< Queue Number 58 */
+#define IX_QMGR_QUEUE_59 (59) /**< Queue Number 59 */
+#define IX_QMGR_QUEUE_60 (60) /**< Queue Number 60 */
+#define IX_QMGR_QUEUE_61 (61) /**< Queue Number 61 */
+#define IX_QMGR_QUEUE_62 (62) /**< Queue Number 62 */
+#define IX_QMGR_QUEUE_63 (63) /**< Queue Number 63 */
+#define IX_QMGR_QUEUE_INVALID (64) /**< AQM Queue Number Delimiter */
+
+
+/*
+ * Typedefs
+ */
+
+/**
+ * @typedef IxQMgrQId
+ *
+ * @ingroup IxQMgrAPI
+ *
+ * @brief Used in the API to identify the AQM queues.
+ *
+ */
+typedef int IxQMgrQId;
+
+/**
+ * @typedef IxQMgrQStatus
+ *
+ * @ingroup IxQMgrAPI
+ *
+ * @brief Queue status.
+ *
+ * A queues status is defined by its relative fullness or relative emptiness.
+ * Each of the queues 0-31 have Nearly Empty, Nearly Full, Empty, Full,
+ * Underflow and Overflow status flags. Queues 32-63 have just Nearly Empty and
+ * Full status flags.
+ * The flags bit positions are outlined below:
+ *
+ * OF - bit-5<br>
+ * UF - bit-4<br>
+ * F - bit-3<br>
+ * NF - bit-2<br>
+ * NE - bit-1<br>
+ * E - bit-0<br>
+ *
+ */
+typedef UINT32 IxQMgrQStatus;
+
+/**
+ * @enum IxQMgrQStatusMask
+ *
+ * @ingroup IxQMgrAPI
+ *
+ * @brief Queue status mask.
+ *
+ * Masks for extracting the individual status flags from the IxQMgrStatus
+ * word.
+ *
+ */
+typedef enum
+{
+ IX_QMGR_Q_STATUS_E_BIT_MASK = 0x1,
+ IX_QMGR_Q_STATUS_NE_BIT_MASK = 0x2,
+ IX_QMGR_Q_STATUS_NF_BIT_MASK = 0x4,
+ IX_QMGR_Q_STATUS_F_BIT_MASK = 0x8,
+ IX_QMGR_Q_STATUS_UF_BIT_MASK = 0x10,
+ IX_QMGR_Q_STATUS_OF_BIT_MASK = 0x20
+} IxQMgrQStatusMask;
+
+/**
+ * @enum IxQMgrSourceId
+ *
+ * @ingroup IxQMgrAPI
+ *
+ * @brief Queue interrupt source select.
+ *
+ * This enum defines the different source conditions on a queue that result in
+ * an interupt being fired by the AQM. Interrupt source is configurable for
+ * queues 0-31 only. The interrupt source for queues 32-63 is hardwired to the
+ * NE(Nearly Empty) status flag.
+ *
+ */
+typedef enum
+{
+ IX_QMGR_Q_SOURCE_ID_E = 0, /**< Queue Empty due to last read */
+ IX_QMGR_Q_SOURCE_ID_NE, /**< Queue Nearly Empty due to last read */
+ IX_QMGR_Q_SOURCE_ID_NF, /**< Queue Nearly Full due to last write */
+ IX_QMGR_Q_SOURCE_ID_F, /**< Queue Full due to last write */
+ IX_QMGR_Q_SOURCE_ID_NOT_E, /**< Queue Not Empty due to last write */
+ IX_QMGR_Q_SOURCE_ID_NOT_NE, /**< Queue Not Nearly Empty due to last write */
+ IX_QMGR_Q_SOURCE_ID_NOT_NF, /**< Queue Not Nearly Full due to last read */
+ IX_QMGR_Q_SOURCE_ID_NOT_F /**< Queue Not Full due to last read */
+} IxQMgrSourceId;
+
+/**
+ * @enum IxQMgrQEntrySizeInWords
+ *
+ * @ingroup IxQMgrAPI
+ *
+ * @brief QMgr queue entry sizes.
+ *
+ * The entry size of a queue specifies the size of a queues entry in words.
+ *
+ */
+typedef enum
+{
+ IX_QMGR_Q_ENTRY_SIZE1 = 1, /**< 1 word entry */
+ IX_QMGR_Q_ENTRY_SIZE2 = 2, /**< 2 word entry */
+ IX_QMGR_Q_ENTRY_SIZE4 = 4 /**< 4 word entry */
+} IxQMgrQEntrySizeInWords;
+
+/**
+ * @enum IxQMgrQSizeInWords
+ *
+ * @ingroup IxQMgrAPI
+ *
+ * @brief QMgr queue sizes.
+ *
+ * These values define the allowed queue sizes for AQM queue. The sizes are
+ * specified in words.
+ *
+ */
+typedef enum
+{
+ IX_QMGR_Q_SIZE16 = 16, /**< 16 word buffer */
+ IX_QMGR_Q_SIZE32 = 32, /**< 32 word buffer */
+ IX_QMGR_Q_SIZE64 = 64, /**< 64 word buffer */
+ IX_QMGR_Q_SIZE128 = 128, /**< 128 word buffer */
+ IX_QMGR_Q_SIZE_INVALID = 129 /**< Insure that this is greater than largest
+ * queue size supported by the hardware
+ */
+} IxQMgrQSizeInWords;
+
+/**
+ * @enum IxQMgrWMLevel
+ *
+ * @ingroup IxQMgrAPI
+ *
+ * @brief QMgr watermark levels.
+ *
+ * These values define the valid watermark levels(in ENTRIES) for queues. Each
+ * queue 0-63 have configurable Nearly full and Nearly empty watermarks. For
+ * queues 32-63 the Nearly full watermark has NO EFFECT.
+ * If the Nearly full watermark is set to IX_QMGR_Q_WM_LEVEL16 this means that
+ * the nearly full flag will be set by the hardware when there are >= 16 empty
+ * entries in the specified queue.
+ * If the Nearly empty watermark is set to IX_QMGR_Q_WM_LEVEL16 this means that
+ * the Nearly empty flag will be set by the hardware when there are <= 16 full
+ * entries in the specified queue.
+ */
+typedef enum
+{
+ IX_QMGR_Q_WM_LEVEL0 = 0, /**< 0 entry watermark */
+ IX_QMGR_Q_WM_LEVEL1 = 1, /**< 1 entry watermark */
+ IX_QMGR_Q_WM_LEVEL2 = 2, /**< 2 entry watermark */
+ IX_QMGR_Q_WM_LEVEL4 = 4, /**< 4 entry watermark */
+ IX_QMGR_Q_WM_LEVEL8 = 8, /**< 8 entry watermark */
+ IX_QMGR_Q_WM_LEVEL16 = 16, /**< 16 entry watermark */
+ IX_QMGR_Q_WM_LEVEL32 = 32, /**< 32 entry watermark */
+ IX_QMGR_Q_WM_LEVEL64 = 64 /**< 64 entry watermark */
+} IxQMgrWMLevel;
+
+/**
+ * @ingroup IxQMgrAPI
+ *
+ * @enum IxQMgrDispatchGroup
+ *
+ * @brief QMgr dispatch group select identifiers.
+ *
+ * This enum defines the groups over which the dispatcher will process when
+ * called. One of the enum values must be used as a input to
+ * @a ixQMgrDispatcherLoopRunA0, @a ixQMgrDispatcherLoopRunB0
+ * or @a ixQMgrDispatcherLoopRunB0LLP.
+ *
+ */
+typedef enum
+{
+ IX_QMGR_QUELOW_GROUP = 0, /**< Queues 0-31 */
+ IX_QMGR_QUEUPP_GROUP /**< Queues 32-63 */
+} IxQMgrDispatchGroup;
+
+/**
+ * @ingroup IxQMgrAPI
+ *
+ * @enum IxQMgrPriority
+ *
+ * @brief Dispatcher priority levels.
+ *
+ * This enum defines the different queue dispatch priority levels.
+ * The lowest priority number (0) is the highest priority level.
+ *
+ */
+typedef enum
+{
+ IX_QMGR_Q_PRIORITY_0 = 0, /**< Priority level 0 */
+ IX_QMGR_Q_PRIORITY_1, /**< Priority level 1 */
+ IX_QMGR_Q_PRIORITY_2, /**< Priority level 2 */
+ IX_QMGR_Q_PRIORITY_INVALID /**< Invalid Priority level */
+} IxQMgrPriority;
+
+/**
+ * @ingroup IxQMgrAPI
+ *
+ * @enum IxQMgrType
+ *
+ * @brief Callback types as used with livelock prevention
+ *
+ * This enum defines the different callback types.
+ * These types are only used when Livelock prevention is enabled.
+ * The default is IX_QMGR_TYPE_REALTIME_OTHER.
+ *
+ */
+
+typedef enum
+{
+ IX_QMGR_TYPE_REALTIME_OTHER = 0, /**< Real time callbacks-always allowed run*/
+ IX_QMGR_TYPE_REALTIME_PERIODIC, /**< Periodic callbacks-always allowed run */
+ IX_QMGR_TYPE_REALTIME_SPORADIC /**< Sporadic callbacks-only run if no
+ periodic callbacks are in progress */
+} IxQMgrType;
+
+
+/**
+ * @ingroup IxQMgrAPI
+ *
+ * @typedef IxQMgrCallbackId
+ *
+ * @brief Uniquely identifies a callback function.
+ *
+ * A unique callback identifier associated with each callback
+ * registered by clients.
+ *
+ */
+typedef unsigned IxQMgrCallbackId;
+
+/**
+ * @typedef IxQMgrCallback
+ *
+ * @brief QMgr notification callback type.
+ *
+ * This defines the interface to all client callback functions.
+ *
+ * @param qId @ref IxQMgrQId [in] - the queue identifier
+ * @param cbId @ref IxQMgrCallbackId [in] - the callback identifier
+ */
+typedef void (*IxQMgrCallback)(IxQMgrQId qId,
+ IxQMgrCallbackId cbId);
+
+/**
+ * @ingroup IxQMgrAPI
+ *
+ * @typedef IxQMgrDispatcherFuncPtr
+ *
+ * @brief QMgr Dispatcher Loop function pointer.
+ *
+ * This defines the interface for QMgr Dispather functions.
+ *
+ * @param group @ref IxQMgrDispatchGroup [in] - the group of the
+ * queue of which the dispatcher will run
+ */
+typedef void (*IxQMgrDispatcherFuncPtr)(IxQMgrDispatchGroup group);
+
+/*
+ * Function Prototypes
+ */
+
+/* ------------------------------------------------------------
+ Initialisation related functions
+ ---------------------------------------------------------- */
+
+/**
+ *
+ * @ingroup IxQMgrAPI
+ *
+ * @fn ixQMgrInit (void)
+ *
+ * @brief Initialise the QMgr.
+ *
+ * This function must be called before and other QMgr function. It
+ * sets up internal data structures.
+ *
+ * @return @li IX_SUCCESS, the IxQMgr successfully initialised
+ * @return @li IX_FAIL, failed to initialize the Qmgr
+ *
+ */
+PUBLIC IX_STATUS
+ixQMgrInit (void);
+
+/**
+ *
+ * @ingroup IxQMgrAPI
+ *
+ * @fn ixQMgrUnload (void)
+ *
+ * @brief Uninitialise the QMgr.
+ *
+ * This function will perform the tasks required to unload the QMgr component
+ * cleanly. This includes unmapping kernel memory.
+ * This should be called before a soft reboot or unloading of a kernel module.
+ *
+ * @pre It should only be called if @ref ixQMgrInit has already been called.
+ *
+ * @post No QMgr functions should be called until ixQMgrInit is called again.
+ *
+ * @return @li IX_SUCCESS, the IxQMgr successfully uninitialised
+ * @return @li IX_FAIL, failed to uninitialize the Qmgr
+ *
+ */
+PUBLIC IX_STATUS
+ixQMgrUnload (void);
+
+/**
+ *
+ * @ingroup IxQMgrAPI
+ *
+ * @fn ixQMgrShow (void)
+ *
+ * @brief Describe queue configuration and statistics for active queues.
+ *
+ * This function shows active queues, their configurations and statistics.
+ *
+ * @return @li void
+ *
+ */
+PUBLIC void
+ixQMgrShow (void);
+
+/**
+ *
+ * @ingroup IxQMgrAPI
+ *
+ * @fn ixQMgrQShow (IxQMgrQId qId)
+ *
+ * @brief Display aqueue configuration and statistics for a queue.
+ *
+ * This function shows queue configuration and statistics for a queue.
+ *
+ * @param qId @ref IxQMgrQId [in] - the queue identifier.
+ *
+ * @return @li IX_SUCCESS, success
+ * @return @li IX_QMGR_Q_NOT_CONFIGURED, queue not configured for this QId
+ *
+ */
+PUBLIC IX_STATUS
+ixQMgrQShow (IxQMgrQId qId);
+
+
+/* ------------------------------------------------------------
+ Configuration related functions
+ ---------------------------------------------------------- */
+
+/**
+ *
+ * @ingroup IxQMgrAPI
+ *
+ * @fn ixQMgrQConfig (char *qName,
+ IxQMgrQId qId,
+ IxQMgrQSizeInWords qSizeInWords,
+ IxQMgrQEntrySizeInWords qEntrySizeInWords)
+ *
+ * @brief Configure an AQM queue.
+ *
+ * This function is called by a client to setup a queue. The size and entrySize
+ * qId and qName(NULL pointer) are checked for valid values. This function must
+ * be called for each queue, before any queue accesses are made and after
+ * ixQMgrInit() has been called. qName is assumed to be a '\0' terminated array
+ * of 16 charachters or less.
+ *
+ * @param *qName char [in] - is the name provided by the client and is associated
+ * with a QId by the QMgr.
+ * @param qId @ref IxQMgrQId [in] - the qId of this queue
+ * @param qSizeInWords @ref IxQMgrQSize [in] - the size of the queue can be one of 16,32
+ * 64, 128 words.
+ * @param qEntrySizeInWords @ref IxQMgrQEntrySizeInWords [in] - the size of a queue entry
+ * can be one of 1,2,4 words.
+ *
+ * @return @li IX_SUCCESS, a specified queue has been successfully configured.
+ * @return @li IX_FAIL, IxQMgr has not been initialised.
+ * @return @li IX_QMGR_PARAMETER_ERROR, invalid parameter(s).
+ * @return @li IX_QMGR_INVALID_QSIZE, invalid queue size
+ * @return @li IX_QMGR_INVALID_Q_ID, invalid queue id
+ * @return @li IX_QMGR_INVALID_Q_ENTRY_SIZE, invalid queue entry size
+ * @return @li IX_QMGR_Q_ALREADY_CONFIGURED, queue already configured
+ *
+ */
+PUBLIC IX_STATUS
+ixQMgrQConfig (char *qName,
+ IxQMgrQId qId,
+ IxQMgrQSizeInWords qSizeInWords,
+ IxQMgrQEntrySizeInWords qEntrySizeInWords);
+
+/**
+ * @ingroup IxQMgrAPI
+ *
+ * @fn ixQMgrQSizeInEntriesGet (IxQMgrQId qId,
+ unsigned *qSizeInEntries)
+ *
+ * @brief Return the size of a queue in entries.
+ *
+ * This function returns the the size of the queue in entriese.
+ *
+ * @param qId @ref IxQMgrQId [in] - the queue identifier
+ * @param *qSizeInEntries @ref IxQMgrQSize [out] - queue size in entries
+ *
+ * @return @li IX_SUCCESS, successfully retrieved the number of full entrie
+ * @return @li IX_QMGR_Q_NOT_CONFIGURED, queue not configured for this QId
+ * @return @li IX_QMGR_PARAMETER_ERROR, invalid parameter(s).
+ *
+ */
+PUBLIC IX_STATUS
+ixQMgrQSizeInEntriesGet (IxQMgrQId qId,
+ unsigned *qSizeInEntries);
+
+/**
+ *
+ * @ingroup IxQMgrAPI
+ *
+ * @fn ixQMgrWatermarkSet (IxQMgrQId qId,
+ IxQMgrWMLevel ne,
+ IxQMgrWMLevel nf)
+ *
+ * @brief Set the Nearly Empty and Nearly Full Watermarks fo a queue.
+ *
+ * This function is called by a client to set the watermarks NE and NF for the
+ * queue specified by qId.
+ * The queue must be empty at the time this function is called, it is the clients
+ * responsibility to ensure that the queue is empty.
+ * This function will read the status of the queue before the watermarks are set
+ * and again after the watermarks are set. If the status register has changed,
+ * due to a queue access by an NPE for example, a warning is returned.
+ * Queues 32-63 only support the NE flag, therefore the value of nf will be ignored
+ * for these queues.
+ *
+ * @param qId @ref IxQMgrQId [in] - the QId of the queue.
+ * @param ne @ref IxQMgrWMLevel [in] - the NE(Nearly Empty) watermark for this
+ * queue. Valid values are 0,1,2,4,8,16,32 and
+ * 64 entries.
+ * @param nf @ref IxQMgrWMLevel [in] - the NF(Nearly Full) watermark for this queue.
+ * Valid values are 0,1,2,4,8,16,32 and 64
+ * entries.
+ *
+ * @return @li IX_SUCCESS, watermarks have been set for the queu
+ * @return @li IX_QMGR_Q_NOT_CONFIGURED, queue not configured for this QId
+ * @return @li IX_QMGR_INVALID_Q_WM, invalid watermark
+ * @return @li IX_QMGR_WARNING, the status register may not be constistent
+ *
+ */
+PUBLIC IX_STATUS
+ixQMgrWatermarkSet (IxQMgrQId qId,
+ IxQMgrWMLevel ne,
+ IxQMgrWMLevel nf);
+
+/**
+ * @ingroup IxQMgrAPI
+ *
+ * @fn ixQMgrAvailableSramAddressGet (UINT32 *address,
+ unsigned *sizeOfFreeSram)
+ *
+ * @brief Return the address of available AQM SRAM.
+ *
+ * This function returns the starting address in AQM SRAM not used by the
+ * current queue configuration and should only be called after all queues
+ * have been configured.
+ * Calling this function before all queues have been configured will will return
+ * the currently available SRAM. A call to configure another queue will use some
+ * of the available SRAM.
+ * The amount of SRAM available is specified in sizeOfFreeSram. The address is the
+ * address of the bottom of available SRAM. Available SRAM extends from address
+ * from address to address + sizeOfFreeSram.
+ *
+ * @param **address UINT32 [out] - the address of the available SRAM, NULL if
+ * none available.
+ * @param *sizeOfFreeSram unsigned [out]- the size in words of available SRAM
+ *
+ * @return @li IX_SUCCESS, there is available SRAM and is pointed to by address
+ * @return @li IX_QMGR_PARAMETER_ERROR, invalid parameter(s)
+ * @return @li IX_QMGR_NO_AVAILABLE_SRAM, all AQM SRAM is consumed by the queue
+ * configuration.
+ *
+ */
+PUBLIC IX_STATUS
+ixQMgrAvailableSramAddressGet (UINT32 *address,
+ unsigned *sizeOfFreeSram);
+
+
+/* ------------------------------------------------------------
+ Queue access related functions
+ ---------------------------------------------------------- */
+
+/**
+ *
+ * @ingroup IxQMgrAPI
+ *
+ * @fn ixQMgrQReadWithChecks (IxQMgrQId qId,
+ UINT32 *entry)
+ *
+ * @brief Read an entry from a queue.
+ *
+ * This function reads an entire entry from a queue returning it in entry. The
+ * queue configuration word is read to determine what entry size this queue is
+ * configured for and then the number of words specified by the entry size is
+ * read. entry must be a pointer to a previously allocated array of sufficient
+ * size to hold an entry.
+ *
+ * @note - IX_QMGR_Q_UNDERFLOW is only returned for queues 0-31 as queues 32-63
+ * do not have an underflow status maintained.
+ *
+ * @param qId @ref IxQMgrQId [in] - the queue identifier.
+ * @param *entry UINT32 [out] - pointer to the entry word(s).
+ *
+ * @return @li IX_SUCCESS, entry was successfully read.
+ * @return @li IX_QMGR_PARAMETER_ERROR, invalid paramter(s).
+ * @return @li IX_QMGR_Q_NOT_CONFIGURED, queue not configured for this QId
+ * @return @li IX_QMGR_Q_UNDERFLOW, attempt to read from an empty queue
+ *
+ */
+PUBLIC IX_STATUS
+ixQMgrQReadWithChecks (IxQMgrQId qId,
+ UINT32 *entry);
+
+
+
+/**
+ * @brief Internal structure to facilitate inlining functions in IxQMgr.h
+ */
+typedef struct
+{
+ /* fields related to write functions */
+ UINT32 qOflowStatBitMask; /**< overflow status mask */
+ UINT32 qWriteCount; /**< queue write count */
+
+ /* fields related to read and write functions */
+ volatile UINT32 *qAccRegAddr; /**< access register */
+ volatile UINT32 *qUOStatRegAddr; /**< status register */
+ volatile UINT32 *qConfigRegAddr; /**< config register */
+ UINT32 qEntrySizeInWords; /**< queue entry size in words */
+ UINT32 qSizeInEntries; /**< queue size in entries */
+
+ /* fields related to read functions */
+ UINT32 qUflowStatBitMask; /**< underflow status mask */
+ UINT32 qReadCount; /**< queue read count */
+} IxQMgrQInlinedReadWriteInfo;
+
+
+/**
+ *
+ * @ingroup IxQMgrAPI
+ *
+ * @fn ixQMgrQReadMWordsMinus1 (IxQMgrQId qId,
+ UINT32 *entry)
+ *
+ * @brief This function reads the remaining of the q entry
+ * for queues configured with many words.
+ * (the first word of the entry is already read
+ * in the inlined function and the entry pointer already
+ * incremented
+ *
+ * @param qId @ref IxQMgrQId [in] - the queue identifier.
+ * @param *entry UINT32 [out] - pointer to the entry word(s).
+ *
+ * @return @li IX_SUCCESS, entry was successfully read.
+ * @return @li IX_QMGR_Q_UNDERFLOW, attempt to read from an empty queue
+ *
+ */
+PUBLIC IX_STATUS
+ixQMgrQReadMWordsMinus1 (IxQMgrQId qId,
+ UINT32 *entry);
+
+
+
+/**
+ *
+ * @ingroup IxQMgrAPI
+ *
+ * @fn ixQMgrQRead (IxQMgrQId qId,
+ UINT32 *entry)
+ *
+ * @brief Fast read of an entry from a queue.
+ *
+ * This function is a heavily streamlined version of ixQMgrQReadWithChecks(),
+ * but performs essentially the same task. It reads an entire entry from a
+ * queue, returning it in entry which must be a pointer to a previously
+ * allocated array of sufficient size to hold an entry.
+ *
+ * @note - This function is inlined, to reduce unnecessary function call
+ * overhead. It does not perform any parameter checks, or update any statistics.
+ * Also, it does not check that the queue specified by qId has been configured.
+ * or is in range. It simply reads an entry from the queue, and checks for
+ * underflow.
+ *
+ * @note - IX_QMGR_Q_UNDERFLOW is only returned for queues 0-31 as queues 32-63
+ * do not have an underflow status maintained.
+ *
+ * @param qId @ref IxQMgrQId [in] - the queue identifier.
+ * @param *entry UINT32 [out] - pointer to the entry word(s).
+ *
+ * @return @li IX_SUCCESS, entry was successfully read.
+ * @return @li IX_QMGR_Q_UNDERFLOW, attempt to read from an empty queue
+ *
+ */
+#ifdef NO_INLINE_APIS
+PUBLIC IX_STATUS
+ixQMgrQRead (IxQMgrQId qId,
+ UINT32 *entryPtr);
+#else
+extern IxQMgrQInlinedReadWriteInfo ixQMgrQInlinedReadWriteInfo[];
+extern IX_STATUS ixQMgrQReadMWordsMinus1 (IxQMgrQId qId, UINT32 *entryPtr);
+
+IX_QMGR_INLINE PUBLIC IX_STATUS
+ixQMgrQRead (IxQMgrQId qId,
+ UINT32 *entryPtr);
+#endif
+
+IX_QMGR_INLINE PUBLIC IX_STATUS
+ixQMgrQRead (IxQMgrQId qId,
+ UINT32 *entryPtr)
+#ifdef NO_INLINE_APIS
+ ;
+#else
+{
+ IxQMgrQInlinedReadWriteInfo *infoPtr = &ixQMgrQInlinedReadWriteInfo[qId];
+ UINT32 entry, entrySize;
+
+ /* get a new entry */
+ entrySize = infoPtr->qEntrySizeInWords;
+ entry = IX_QMGR_INLINE_READ_LONG(infoPtr->qAccRegAddr);
+
+ if (entrySize != IX_QMGR_Q_ENTRY_SIZE1)
+ {
+ *entryPtr = entry;
+ /* process the remaining part of the entry */
+ return ixQMgrQReadMWordsMinus1(qId, entryPtr);
+ }
+
+ /* underflow is available for lower queues only */
+ if (qId < IX_QMGR_MIN_QUEUPP_QID)
+ {
+ /* the counter of queue entries is decremented. In happy
+ * day scenario there are many entries in the queue
+ * and the counter does not reach zero.
+ */
+ if (infoPtr->qReadCount-- == 0)
+ {
+ /* There is maybe no entry in the queue
+ * qReadCount is now negative, but will be corrected before
+ * the function returns.
+ */
+ UINT32 qPtrs; /* queue internal pointers */
+
+ /* when a queue is empty, the hw guarantees to return
+ * a null value. If the value is not null, the queue is
+ * not empty.
+ */
+ if (entry == 0)
+ {
+ /* get the queue status */
+ UINT32 status = IX_QMGR_INLINE_READ_LONG(infoPtr->qUOStatRegAddr);
+
+ /* check the underflow status */
+ if (status & infoPtr->qUflowStatBitMask)
+ {
+ /* the queue is empty
+ * clear the underflow status bit if it was set
+ */
+ IX_QMGR_INLINE_WRITE_LONG(infoPtr->qUOStatRegAddr,
+ status & ~infoPtr->qUflowStatBitMask);
+ *entryPtr = 0;
+ infoPtr->qReadCount = 0;
+ return IX_QMGR_Q_UNDERFLOW;
+ }
+ }
+ /* store the result */
+ *entryPtr = entry;
+
+ /* No underflow occured : someone is filling the queue
+ * or the queue contains null entries.
+ * The current counter needs to be
+ * updated from the current number of entries in the queue
+ */
+
+ /* get snapshot of queue pointers */
+ qPtrs = IX_QMGR_INLINE_READ_LONG(infoPtr->qConfigRegAddr);
+
+ /* Mod subtraction of pointers to get number of words in Q. */
+ qPtrs = (qPtrs - (qPtrs >> 7)) & 0x7f;
+
+ if (qPtrs == 0)
+ {
+ /* no entry in the queue */
+ infoPtr->qReadCount = 0;
+ }
+ else
+ {
+ /* convert the number of words inside the queue
+ * to a number of entries
+ */
+ infoPtr->qReadCount = qPtrs & (infoPtr->qSizeInEntries - 1);
+ }
+ return IX_SUCCESS;
+ }
+ }
+ *entryPtr = entry;
+ return IX_SUCCESS;
+}
+#endif
+
+/**
+ *
+ * @ingroup IxQMgrAPI
+ *
+ * @fn ixQMgrQBurstRead (IxQMgrQId qId,
+ UINT32 numEntries,
+ UINT32 *entries)
+ *
+ * @brief Read a number of entries from an AQM queue.
+ *
+ * This function will burst read a number of entries from the specified queue.
+ * The entry size of queue is auto-detected. The function will attempt to
+ * read as many entries as specified by the numEntries parameter and will
+ * return an UNDERFLOW if any one of the individual entry reads fail.
+ *
+ * @warning
+ * IX_QMGR_Q_UNDERFLOW is only returned for queues 0-31 as queues 32-63
+ * do not have an underflow status maintained, hence there is a potential for
+ * silent failure here. This function must be used with caution.
+ *
+ * @note
+ * This function is intended for fast draining of queues, so to make it
+ * as efficient as possible, it has the following features:
+ * - This function is inlined, to reduce unnecessary function call overhead.
+ * - It does not perform any parameter checks, or update any statistics.
+ * - It does not check that the queue specified by qId has been configured.
+ * - It does not check that the queue has the number of full entries that
+ * have been specified to be read. It will read until it finds a NULL entry or
+ * until the number of specified entries have been read. It always checks for
+ * underflow after all the reads have been performed.
+ * Therefore, the client should ensure before calling this function that there
+ * are enough entries in the queue to read. ixQMgrQNumEntriesGet() will
+ * provide the number of full entries in a queue.
+ * ixQMgrQRead() or ixQMgrQReadWithChecks(), which only reads
+ * a single queue entry per call, should be used instead if the user requires
+ * checks for UNDERFLOW after each entry read.
+ *
+ * @param qId @ref IxQMgrQId [in] - the queue identifier.
+ * @param numEntries unsigned [in] - the number of entries to read.
+ * This number should be greater than 0
+ * @param *entries UINT32 [out] - the word(s) read.
+ *
+ * @return @li IX_SUCCESS, entries were successfully read.
+ * @return @li IX_QMGR_Q_UNDERFLOW, attempt to read from an empty queue
+ *
+ */
+#ifdef NO_INLINE_APIS
+PUBLIC IX_STATUS
+ixQMgrQBurstRead (IxQMgrQId qId,
+ UINT32 numEntries,
+ UINT32 *entries);
+#else
+IX_QMGR_INLINE PUBLIC IX_STATUS
+ixQMgrQBurstRead (IxQMgrQId qId,
+ UINT32 numEntries,
+ UINT32 *entries);
+#endif /* endif NO_INLINE_APIS */
+
+IX_QMGR_INLINE PUBLIC IX_STATUS
+ixQMgrQBurstRead (IxQMgrQId qId,
+ UINT32 numEntries,
+ UINT32 *entries)
+#ifdef NO_INLINE_APIS
+;
+#else
+{
+ IxQMgrQInlinedReadWriteInfo *infoPtr = &ixQMgrQInlinedReadWriteInfo[qId];
+ UINT32 nullCheckEntry;
+
+ if (infoPtr->qEntrySizeInWords == IX_QMGR_Q_ENTRY_SIZE1)
+ {
+ volatile UINT32 *qAccRegAddr = infoPtr->qAccRegAddr;
+
+ /* the code is optimized to take care of data dependencies:
+ * Durig a read, there are a few cycles needed to get the
+ * read complete. During these cycles, it is poossible to
+ * do some CPU, e.g. increment pointers and decrement
+ * counters.
+ */
+
+ /* fetch a queue entry */
+ nullCheckEntry = IX_QMGR_INLINE_READ_LONG(infoPtr->qAccRegAddr);
+
+ /* iterate the specified number of queue entries */
+ while (--numEntries)
+ {
+ /* check the result of the previous read */
+ if (nullCheckEntry == 0)
+ {
+ /* if we read a NULL entry, stop. We have underflowed */
+ break;
+ }
+ else
+ {
+ /* write the entry */
+ *entries = nullCheckEntry;
+ /* fetch next entry */
+ nullCheckEntry = IX_QMGR_INLINE_READ_LONG(qAccRegAddr);
+ /* increment the write address */
+ entries++;
+ }
+ }
+ /* write the pre-fetched entry */
+ *entries = nullCheckEntry;
+ }
+ else
+ {
+ IxQMgrQEntrySizeInWords entrySizeInWords = infoPtr->qEntrySizeInWords;
+ /* read the specified number of queue entries */
+ nullCheckEntry = 0;
+ while (numEntries--)
+ {
+ UINT32 i;
+
+ for (i = 0; i < (UINT32)entrySizeInWords; i++)
+ {
+ *entries = IX_QMGR_INLINE_READ_LONG(infoPtr->qAccRegAddr + i);
+ nullCheckEntry |= *entries++;
+ }
+
+ /* if we read a NULL entry, stop. We have underflowed */
+ if (nullCheckEntry == 0)
+ {
+ break;
+ }
+ nullCheckEntry = 0;
+ }
+ }
+
+ /* reset the current read count : next access to the read function
+ * will force a underflow status check
+ */
+ infoPtr->qReadCount = 0;
+
+ /* Check if underflow occurred on the read */
+ if (nullCheckEntry == 0 && qId < IX_QMGR_MIN_QUEUPP_QID)
+ {
+ /* get the queue status */
+ UINT32 status = IX_QMGR_INLINE_READ_LONG(infoPtr->qUOStatRegAddr);
+
+ if (status & infoPtr->qUflowStatBitMask)
+ {
+ /* clear the underflow status bit if it was set */
+ IX_QMGR_INLINE_WRITE_LONG(infoPtr->qUOStatRegAddr,
+ status & ~infoPtr->qUflowStatBitMask);
+ return IX_QMGR_Q_UNDERFLOW;
+ }
+ }
+
+ return IX_SUCCESS;
+}
+#endif
+
+/**
+ * @ingroup IxQMgrAPI
+ *
+ * @fn ixQMgrQPeek (IxQMgrQId qId,
+ unsigned int entryIndex,
+ UINT32 *entry)
+ *
+ * @brief Read an entry from a queue without moving the read pointer.
+ *
+ * This function inspects an entry in a queue. The entry is inspected directly
+ * in AQM SRAM and is not read from queue access registers. The entry is NOT removed
+ * from the queue and the read/write pointers are unchanged.
+ * N.B: The queue should not be accessed when this function is called.
+ *
+ * @param qId @ref IxQMgrQId [in] - the queue identifier.
+ * @param entryIndex unsigned int [in] - index of entry in queue in the range
+ * [0].......[current number of entries in queue].
+ * @param *entry UINT32 [out] - pointer to the entry word(s).
+ *
+ * @return @li IX_SUCCESS, entry was successfully inspected.
+ * @return @li IX_QMGR_PARAMETER_ERROR, invalid paramter(s).
+ * @return @li IX_QMGR_Q_NOT_CONFIGURED, queue not configured for this QId.
+ * @return @li IX_QMGR_ENTRY_INDEX_OUT_OF_BOUNDS, an entry does not exist at
+ * specified index.
+ * @return @li IX_FAIL, failed to inpected the queue entry.
+ */
+PUBLIC IX_STATUS
+ixQMgrQPeek (IxQMgrQId qId,
+ unsigned int entryIndex,
+ UINT32 *entry);
+
+/**
+ *
+ * @ingroup IxQMgrAPI
+ *
+ * @fn ixQMgrQWriteWithChecks (IxQMgrQId qId,
+ UINT32 *entry)
+ *
+ * @brief Write an entry to an AQM queue.
+ *
+ * This function will write the entry size number of words pointed to by entry to
+ * the queue specified by qId. The queue configuration word is read to
+ * determine the entry size of queue and the corresponding number of words is
+ * then written to the queue.
+ *
+ * @note - IX_QMGR_Q_OVERFLOW is only returned for queues 0-31 as queues 32-63
+ * do not have an overflow status maintained.
+ *
+ * @param qId @ref IxQMgrQId [in] - the queue identifier.
+ * @param *entry UINT32 [in] - the word(s) to write.
+ *
+ * @return @li IX_SUCCESS, value was successfully written.
+ * @return @li IX_QMGR_PARAMETER_ERROR, invalid paramter(s).
+ * @return @li IX_QMGR_Q_NOT_CONFIGURED, queue not configured for this QId
+ * @return @li IX_QMGR_Q_OVERFLOW, attempt to write to a full queue
+ *
+ */
+PUBLIC IX_STATUS
+ixQMgrQWriteWithChecks (IxQMgrQId qId,
+ UINT32 *entry);
+
+/**
+ *
+ * @ingroup IxQMgrAPI
+ *
+ * @fn ixQMgrQWrite (IxQMgrQId qId,
+ UINT32 *entry)
+ *
+ * @brief Fast write of an entry to a queue.
+ *
+ * This function is a heavily streamlined version of ixQMgrQWriteWithChecks(),
+ * but performs essentially the same task. It will write the entry size number
+ * of words pointed to by entry to the queue specified by qId.
+ *
+ * @note - This function is inlined, to reduce unnecessary function call
+ * overhead. It does not perform any parameter checks, or update any
+ * statistics. Also, it does not check that the queue specified by qId has
+ * been configured. It simply writes an entry to the queue, and checks for
+ * overflow.
+ *
+ * @note - IX_QMGR_Q_OVERFLOW is only returned for queues 0-31 as queues 32-63
+ * do not have an overflow status maintained.
+ *
+ * @param qId @ref IxQMgrQId [in] - the queue identifier.
+ * @param *entry UINT32 [in] - pointer to the entry word(s).
+ *
+ * @return @li IX_SUCCESS, entry was successfully read.
+ * @return @li IX_QMGR_Q_OVERFLOW, attempt to write to a full queue
+ *
+ */
+#ifdef NO_INLINE_APIS
+PUBLIC IX_STATUS
+ixQMgrQWrite (IxQMgrQId qId,
+ UINT32 *entry);
+#else
+IX_QMGR_INLINE PUBLIC IX_STATUS
+ixQMgrQWrite (IxQMgrQId qId,
+ UINT32 *entry);
+#endif /* NO_INLINE_APIS */
+
+IX_QMGR_INLINE PUBLIC IX_STATUS
+ixQMgrQWrite (IxQMgrQId qId,
+ UINT32 *entry)
+#ifdef NO_INLINE_APIS
+ ;
+#else
+{
+ IxQMgrQInlinedReadWriteInfo *infoPtr = &ixQMgrQInlinedReadWriteInfo[qId];
+ UINT32 entrySize;
+
+ /* write the entry */
+ IX_QMGR_INLINE_WRITE_LONG(infoPtr->qAccRegAddr, *entry);
+ entrySize = infoPtr->qEntrySizeInWords;
+
+ if (entrySize != IX_QMGR_Q_ENTRY_SIZE1)
+ {
+ /* process the remaining part of the entry */
+ volatile UINT32 *qAccRegAddr = infoPtr->qAccRegAddr;
+ while (--entrySize)
+ {
+ ++entry;
+ IX_QMGR_INLINE_WRITE_LONG(++qAccRegAddr, *entry);
+ }
+ entrySize = infoPtr->qEntrySizeInWords;
+ }
+
+ /* overflow is available for lower queues only */
+ if (qId < IX_QMGR_MIN_QUEUPP_QID)
+ {
+ UINT32 qSize = infoPtr->qSizeInEntries;
+ /* increment the current number of entries in the queue
+ * and check for overflow
+ */
+ if (infoPtr->qWriteCount++ == qSize)
+ {
+ /* the queue may have overflow */
+ UINT32 qPtrs; /* queue internal pointers */
+
+ /* get the queue status */
+ UINT32 status = IX_QMGR_INLINE_READ_LONG(infoPtr->qUOStatRegAddr);
+
+ /* read the status twice because the status may
+ * not be immediately ready after the write operation
+ */
+ if ((status & infoPtr->qOflowStatBitMask) ||
+ ((status = IX_QMGR_INLINE_READ_LONG(infoPtr->qUOStatRegAddr))
+ & infoPtr->qOflowStatBitMask))
+ {
+ /* the queue is full, clear the overflow status
+ * bit if it was set
+ */
+ IX_QMGR_INLINE_WRITE_LONG(infoPtr->qUOStatRegAddr,
+ status & ~infoPtr->qOflowStatBitMask);
+ infoPtr->qWriteCount = infoPtr->qSizeInEntries;
+ return IX_QMGR_Q_OVERFLOW;
+ }
+ /* No overflow occured : someone is draining the queue
+ * and the current counter needs to be
+ * updated from the current number of entries in the queue
+ */
+
+ /* get q pointer snapshot */
+ qPtrs = IX_QMGR_INLINE_READ_LONG(infoPtr->qConfigRegAddr);
+
+ /* Mod subtraction of pointers to get number of words in Q. */
+ qPtrs = (qPtrs - (qPtrs >> 7)) & 0x7f;
+
+ if (qPtrs == 0)
+ {
+ /* the queue may be full at the time of the
+ * snapshot. Next access will check
+ * the overflow status again.
+ */
+ infoPtr->qWriteCount = qSize;
+ }
+ else
+ {
+ /* convert the number of words to a number of entries */
+ if (entrySize == IX_QMGR_Q_ENTRY_SIZE1)
+ {
+ infoPtr->qWriteCount = qPtrs & (qSize - 1);
+ }
+ else
+ {
+ infoPtr->qWriteCount = (qPtrs / entrySize) & (qSize - 1);
+ }
+ }
+ }
+ }
+ return IX_SUCCESS;
+}
+#endif
+
+/**
+ *
+ * @ingroup IxQMgrAPI
+ *
+ * @fn ixQMgrQBurstWrite (IxQMgrQId qId,
+ unsigned numEntries,
+ UINT32 *entries)
+ *
+ * @brief Write a number of entries to an AQM queue.
+ *
+ * This function will burst write a number of entries to the specified queue.
+ * The entry size of queue is auto-detected. The function will attempt to
+ * write as many entries as specified by the numEntries parameter and will
+ * return an OVERFLOW if any one of the individual entry writes fail.
+ *
+ * @warning
+ * IX_QMGR_Q_OVERFLOW is only returned for queues 0-31 as queues 32-63
+ * do not have an overflow status maintained, hence there is a potential for
+ * silent failure here. This function must be used with caution.
+ *
+ * @note
+ * This function is intended for fast population of queues, so to make it
+ * as efficient as possible, it has the following features:
+ * - This function is inlined, to reduce unnecessary function call overhead.
+ * - It does not perform any parameter checks, or update any statistics.
+ * - It does not check that the queue specified by qId has been configured.
+ * - It does not check that the queue has enough free space to hold the entries
+ * before writing, and only checks for overflow after all writes have been
+ * performed. Therefore, the client should ensure before calling this function
+ * that there is enough free space in the queue to hold the number of entries
+ * to be written. ixQMgrQWrite() or ixQMgrQWriteWithChecks(), which only writes
+ * a single queue entry per call, should be used instead if the user requires
+ * checks for OVERFLOW after each entry written.
+ *
+ * @param qId @ref IxQMgrQId [in] - the queue identifier.
+ * @param numEntries unsigned [in] - the number of entries to write.
+ * @param *entries UINT32 [in] - the word(s) to write.
+ *
+ * @return @li IX_SUCCESS, value was successfully written.
+ * @return @li IX_QMGR_Q_OVERFLOW, attempt to write to a full queue
+ *
+ */
+#ifdef NO_INLINE_APIS
+PUBLIC IX_STATUS
+ixQMgrQBurstWrite (IxQMgrQId qId,
+ unsigned numEntries,
+ UINT32 *entries);
+#else
+IX_QMGR_INLINE PUBLIC IX_STATUS
+ixQMgrQBurstWrite (IxQMgrQId qId,
+ unsigned numEntries,
+ UINT32 *entries);
+#endif /* NO_INLINE_APIS */
+
+IX_QMGR_INLINE PUBLIC IX_STATUS
+ixQMgrQBurstWrite (IxQMgrQId qId,
+ unsigned numEntries,
+ UINT32 *entries)
+#ifdef NO_INLINE_APIS
+;
+#else
+{
+ IxQMgrQInlinedReadWriteInfo *infoPtr = &ixQMgrQInlinedReadWriteInfo[qId];
+ UINT32 status;
+
+ /* update the current write count */
+ infoPtr->qWriteCount += numEntries;
+
+ if (infoPtr->qEntrySizeInWords == IX_QMGR_Q_ENTRY_SIZE1)
+ {
+ volatile UINT32 *qAccRegAddr = infoPtr->qAccRegAddr;
+ while (numEntries--)
+ {
+ IX_QMGR_INLINE_WRITE_LONG(qAccRegAddr, *entries);
+ entries++;
+ }
+ }
+ else
+ {
+ IxQMgrQEntrySizeInWords entrySizeInWords = infoPtr->qEntrySizeInWords;
+ UINT32 i;
+
+ /* write each queue entry */
+ while (numEntries--)
+ {
+ /* write the queueEntrySize number of words for each entry */
+ for (i = 0; i < (UINT32)entrySizeInWords; i++)
+ {
+ IX_QMGR_INLINE_WRITE_LONG((infoPtr->qAccRegAddr + i), *entries);
+ entries++;
+ }
+ }
+ }
+
+ /* check if the write count overflows */
+ if (infoPtr->qWriteCount > infoPtr->qSizeInEntries)
+ {
+ /* reset the current write count */
+ infoPtr->qWriteCount = infoPtr->qSizeInEntries;
+ }
+
+ /* Check if overflow occurred on the write operation */
+ if (qId < IX_QMGR_MIN_QUEUPP_QID)
+ {
+ /* get the queue status */
+ status = IX_QMGR_INLINE_READ_LONG(infoPtr->qUOStatRegAddr);
+
+ /* read the status twice because the status may
+ * not be ready at the time of the write
+ */
+ if ((status & infoPtr->qOflowStatBitMask) ||
+ ((status = IX_QMGR_INLINE_READ_LONG(infoPtr->qUOStatRegAddr))
+ & infoPtr->qOflowStatBitMask))
+ {
+ /* clear the underflow status bit if it was set */
+ IX_QMGR_INLINE_WRITE_LONG(infoPtr->qUOStatRegAddr,
+ status & ~infoPtr->qOflowStatBitMask);
+ return IX_QMGR_Q_OVERFLOW;
+ }
+ }
+
+ return IX_SUCCESS;
+}
+#endif
+
+/**
+ * @ingroup IxQMgrAPI
+ *
+ * @fn ixQMgrQPoke (IxQMgrQId qId,
+ unsigned int entryIndex,
+ UINT32 *entry)
+ *
+ * @brief Write an entry to a queue without moving the write pointer.
+ *
+ * This function modifies an entry in a queue. The entry is modified directly
+ * in AQM SRAM and not using the queue access registers. The entry is NOT added to the
+ * queue and the read/write pointers are unchanged.
+ * N.B: The queue should not be accessed when this function is called.
+ *
+ * @param qId @ref IxQMgrQId [in] - the queue identifier.
+ * @param entryIndex unsigned int [in] - index of entry in queue in the range
+ * [0].......[current number of entries in queue].
+ * @param *entry UINT32 [in] - pointer to the entry word(s).
+ *
+ * @return @li IX_SUCCESS, entry was successfully modified.
+ * @return @li IX_QMGR_PARAMETER_ERROR, invalid paramter(s).
+ * @return @li IX_QMGR_Q_NOT_CONFIGURED, queue not configured for this QId.
+ * @return @li IX_QMGR_ENTRY_INDEX_OUT_OF_BOUNDS, an entry does not exist at
+ * specified index.
+ * @return @li IX_FAIL, failed to modify the queue entry.
+ */
+PUBLIC IX_STATUS
+ixQMgrQPoke (IxQMgrQId qId,
+ unsigned int entryIndex,
+ UINT32 *entry);
+
+/**
+ *
+ * @ingroup IxQMgrAPI
+ *
+ * @fn ixQMgrQNumEntriesGet (IxQMgrQId qId,
+ unsigned *numEntries)
+ *
+ * @brief Get a snapshot of the number of entries in a queue.
+ *
+ * This function gets the number of entries in a queue.
+ *
+ * @param qId @ref IxQMgrQId [in] qId - the queue idenfifier
+ * @param *numEntries unsigned [out] - the number of entries in a queue
+ *
+ * @return @li IX_SUCCESS, got the number of entries for the queue
+ * @return @li IX_QMGR_PARAMETER_ERROR, invalid paramter(s).
+ * @return @li IX_QMGR_Q_NOT_CONFIGURED, the specified qId has not been configured
+ * @return @li IX_QMGR_WARNING, could not determine num entries at this time
+ *
+ */
+PUBLIC IX_STATUS
+ixQMgrQNumEntriesGet (IxQMgrQId qId,
+ unsigned *numEntries);
+
+/**
+ *
+ * @ingroup IxQMgrAPI
+ *
+ * @fn ixQMgrQStatusGetWithChecks (IxQMgrQId qId,
+ IxQMgrQStatus *qStatus)
+ *
+ * @brief Get a queues status.
+ *
+ * This function reads the specified queues status. A queues status is defined
+ * by its status flags. For queues 0-31 these flags are E,NE,NF,F. For
+ * queues 32-63 these flags are NE and F.
+ *
+ * @param qId @ref IxQMgrQId [in] - the queue identifier.
+ * @param &qStatus @ref IxQMgrQStatus [out] - the status of the specified queue.
+ *
+ * @return @li IX_SUCCESS, queue status was successfully read.
+ * @return @li IX_QMGR_Q_NOT_CONFIGURED, the specified qId has not been configured
+ * @return @li IX_QMGR_PARAMETER_ERROR, invalid paramter.
+ *
+ */
+PUBLIC IX_STATUS
+ixQMgrQStatusGetWithChecks (IxQMgrQId qId,
+ IxQMgrQStatus *qStatus);
+
+/**
+ *
+ * @ingroup IxQMgrAPI
+ *
+ * @fn ixQMgrQStatusGet (IxQMgrQId qId,
+ IxQMgrQStatus *qStatus)
+ *
+ * @brief Fast get of a queue's status.
+ *
+ * This function is a streamlined version of ixQMgrQStatusGetWithChecks(), but
+ * performs essentially the same task. It reads the specified queue's status.
+ * A queues status is defined by its status flags. For queues 0-31 these flags
+ * are E,NE,NF,F. For queues 32-63 these flags are NE and F.
+ *
+ * @note - This function is inlined, to reduce unnecessary function call
+ * overhead. It does not perform any parameter checks, or update any
+ * statistics. Also, it does not check that the queue specified by qId has
+ * been configured. It simply reads the specified queue's status.
+ *
+ * @param qId @ref IxQMgrQId [in] - the queue identifier.
+ * @param *qStatus @ref IxQMgrQStatus [out] - the status of the specified queue.
+ *
+ * @return @li void.
+ *
+ */
+
+#ifdef NO_INLINE_APIS
+PUBLIC IX_STATUS
+ixQMgrQStatusGet (IxQMgrQId qId,
+ IxQMgrQStatus *qStatus);
+#else
+extern UINT32 ixQMgrAqmIfQueLowStatRegAddr[];
+extern UINT32 ixQMgrAqmIfQueLowStatBitsOffset[];
+extern UINT32 ixQMgrAqmIfQueLowStatBitsMask;
+extern UINT32 ixQMgrAqmIfQueUppStat0RegAddr;
+extern UINT32 ixQMgrAqmIfQueUppStat1RegAddr;
+extern UINT32 ixQMgrAqmIfQueUppStat0BitMask[];
+extern UINT32 ixQMgrAqmIfQueUppStat1BitMask[];
+
+IX_QMGR_INLINE PUBLIC IX_STATUS
+ixQMgrQStatusGet (IxQMgrQId qId,
+ IxQMgrQStatus *qStatus);
+#endif /* endif NO_INLINE_APIS */
+
+IX_QMGR_INLINE PUBLIC IX_STATUS
+ixQMgrQStatusGet (IxQMgrQId qId,
+ IxQMgrQStatus *qStatus)
+#ifdef NO_INLINE_APIS
+ ;
+#else
+{
+ /* read the status of a queue in the range 0-31 */
+ if (qId < IX_QMGR_MIN_QUEUPP_QID)
+ {
+ volatile UINT32 *lowStatRegAddr = (UINT32*)ixQMgrAqmIfQueLowStatRegAddr[qId];
+
+ UINT32 lowStatBitsOffset = ixQMgrAqmIfQueLowStatBitsOffset[qId];
+ UINT32 lowStatBitsMask = ixQMgrAqmIfQueLowStatBitsMask;
+
+ /* read the status register for this queue */
+ *qStatus = IX_QMGR_INLINE_READ_LONG(lowStatRegAddr);
+
+ /* mask out the status bits relevant only to this queue */
+ *qStatus = (*qStatus >> lowStatBitsOffset) & lowStatBitsMask;
+
+ }
+ else /* read status of a queue in the range 32-63 */
+ {
+
+ volatile UINT32 *qNearEmptyStatRegAddr = (UINT32*)ixQMgrAqmIfQueUppStat0RegAddr;
+ volatile UINT32 *qFullStatRegAddr = (UINT32*)ixQMgrAqmIfQueUppStat1RegAddr;
+ int maskIndex = qId - IX_QMGR_MIN_QUEUPP_QID;
+ UINT32 qNearEmptyStatBitMask = ixQMgrAqmIfQueUppStat0BitMask[maskIndex];
+ UINT32 qFullStatBitMask = ixQMgrAqmIfQueUppStat1BitMask[maskIndex];
+
+ /* Reset the status bits */
+ *qStatus = 0;
+
+ /* Check if the queue is nearly empty */
+ if (IX_QMGR_INLINE_READ_LONG(qNearEmptyStatRegAddr) & qNearEmptyStatBitMask)
+ {
+ *qStatus |= IX_QMGR_Q_STATUS_NE_BIT_MASK;
+ }
+
+ /* Check if the queue is full */
+ if (IX_QMGR_INLINE_READ_LONG(qFullStatRegAddr) & qFullStatBitMask)
+ {
+ *qStatus |= IX_QMGR_Q_STATUS_F_BIT_MASK;
+ }
+ }
+ return IX_SUCCESS;
+}
+#endif
+
+/* ------------------------------------------------------------
+ Queue dispatch related functions
+ ---------------------------------------------------------- */
+
+/**
+ *
+ * @ingroup IxQMgrAPI
+ *
+ * @fn ixQMgrDispatcherPrioritySet (IxQMgrQId qId,
+ IxQMgrPriority priority)
+ *
+ * @brief Set the dispatch priority of a queue.
+ *
+ * This function is called to set the dispatch priority of queue. The effect of
+ * this function is to add a priority change request to a queue. This queue is
+ * serviced by @a ixQMgrDispatcherLoopRunA0, @a ixQMgrDispatcherLoopRunB0 or
+ * @a ixQMgrDispatcherLoopRunB0LLP.
+ *
+ * This function is re-entrant. and can be used from an interrupt context
+ *
+ * @param qId @ref IxQMgrQId [in] - the queue identifier
+ * @param priority @ref IxQMgrPriority [in] - the new queue dispatch priority
+ *
+ * @return @li IX_SUCCESS, priority change request is queued
+ * @return @li IX_QMGR_Q_NOT_CONFIGURED, the specified qId has not been configured
+ * @return @li IX_QMGR_Q_INVALID_PRIORITY, specified priority is invalid
+ *
+ */
+PUBLIC IX_STATUS
+ixQMgrDispatcherPrioritySet (IxQMgrQId qId,
+ IxQMgrPriority priority);
+/**
+ *
+ * @ingroup IxQMgrAPI
+ *
+ * @fn ixQMgrNotificationEnable (IxQMgrQId qId,
+ IxQMgrSourceId sourceId)
+ *
+ * @brief Enable notification on a queue for a specified queue source flag.
+ *
+ * This function is called by a client of the QMgr to enable notifications on a
+ * specified condition.
+ * If the condition for the notification is set after the client has called this
+ * function but before the function has enabled the interrupt source, then the
+ * notification will not occur.
+ * For queues 32-63 the notification source is fixed to the NE(Nearly Empty) flag
+ * and cannot be changed so the sourceId parameter is ignored for these queues.
+ * The status register is read before the notofication is enabled and is read again
+ * after the notification has been enabled, if they differ then the warning status
+ * is returned.
+ *
+ * This function is re-entrant. and can be used from an interrupt context
+ *
+ * @param qId @ref IxQMgrQId [in] - the queue identifier
+ * @param sourceId @ref IxQMgrSourceId [in] - the interrupt src condition identifier
+ *
+ * @return @li IX_SUCCESS, the interrupt has been enabled for the specified source
+ * @return @li IX_QMGR_Q_NOT_CONFIGURED, the specified qId has not been configured
+ * @return @li IX_QMGR_INVALID_INT_SOURCE_ID, interrupt source invalid for this queue
+ * @return @li IX_QMGR_WARNING, the status register may not be constistent
+ *
+ */
+PUBLIC IX_STATUS
+ixQMgrNotificationEnable (IxQMgrQId qId,
+ IxQMgrSourceId sourceId);
+
+/**
+ * @ingroup IxQMgrAPI
+ *
+ * @fn ixQMgrNotificationDisable (IxQMgrQId qId)
+ *
+ * @brief Disable notifications on a queue.
+ *
+ * This function is called to disable notifications on a specified queue.
+ *
+ * This function is re-entrant. and can be used from an interrupt context
+ *
+ * @param qId @ref IxQMgrQId [in] - the queue identifier
+ *
+ * @return @li IX_SUCCESS, the interrupt has been disabled
+ * @return @li IX_QMGR_Q_NOT_CONFIGURED, the specified qId has not been configured
+ *
+ */
+PUBLIC IX_STATUS
+ixQMgrNotificationDisable (IxQMgrQId qId);
+
+/**
+ *
+ * @ingroup IxQMgrAPI
+ *
+ * @fn ixQMgrDispatcherLoopRunA0 (IxQMgrDispatchGroup group)
+ *
+ * @brief Run the callback dispatcher.
+ *
+ * This function runs the dispatcher for a group of queues.
+ * Callbacks are made for interrupts that have occurred on queues within
+ * the group that have registered callbacks. The order in which queues are
+ * serviced depends on the queue priorities set by the client.
+ * This function may be called from interrupt or task context.
+ * For optimisations that were introduced in IXP42X B0 and supported IXP46X
+ * the @a ixQMgrDispatcherLoopRunB0, or @a ixQMgrDispatcherLoopRunB0LLP
+ * should be used.
+ *
+ * This function is not re-entrant.
+ *
+ * @param group @ref IxQMgrDispatchGroup [in] - the group of queues over which the
+ * dispatcher will run
+ *
+ * @return @li void
+ *
+ * @note This function may be called from interrupt or task context.
+ * However, for optimal performance the choice of context depends also on the
+ * operating system used.
+ *
+ */
+PUBLIC void
+ixQMgrDispatcherLoopRunA0 (IxQMgrDispatchGroup group);
+
+/**
+ *
+ * @ingroup IxQMgrAPI
+ *
+ * @fn ixQMgrDispatcherLoopRunB0 (IxQMgrDispatchGroup group)
+ *
+ * @brief Run the callback dispatcher.
+ *
+ * The enhanced version of @a ixQMgrDispatcherLoopRunA0 that is optimised for
+ * features introduced in IXP42X B0 silicon and supported on IXP46X.
+ * This is the default dispatcher for IXP42X B0 and IXP46X silicon.
+ * The function runs the dispatcher for a group of queues.
+ * Callbacks are made for interrupts that have occurred on queues within
+ * the group that have registered callbacks. The order in which queues are
+ * serviced depends on the queue priorities set by the client.
+ * This function may be called from interrupt or task context.
+ *
+ * This function is not re-entrant.
+ *
+ * @param group @ref IxQMgrDispatchGroup [in] - the group of queues over which the
+ * dispatcher will run
+ *
+ * @return @li void
+ *
+ *
+ * @note This function may be called from interrupt or task context.
+ * However, for optimal performance the choice of context depends also on the
+ * operating system used.
+ *
+ */
+PUBLIC void
+ixQMgrDispatcherLoopRunB0 (IxQMgrDispatchGroup group);
+
+/**
+ *
+ * @ingroup IxQMgrAPI
+ *
+ * @fn ixQMgrDispatcherLoopRunB0LLP (IxQMgrDispatchGroup group)
+ *
+ * @brief Run the callback dispatcher.
+ *
+ * This is a version of the optimised dispatcher for IXP42X B0 and IXP46X,
+ * @a ixQMgrDispatcherLoopRunB0, with added support for livelock prevention.
+ * This dispatcher will only be used for the IXP42X B0 or IXP46X silicon if
+ * feature control indicates that IX_FEATURECTRL_ORIGB0_DISPATCHER is set to
+ * IX_FEATURE_CTRL_SWCONFIG_DISABLED. Otherwise the @a ixQMgrDispatcherLoopRunB0
+ * dispatcher will be used (Default).
+ *
+ * When this dispatcher notifies for a queue that is type
+ * IX_QMGR_TYPE_REALTIME_PERIODIC, notifications for queues that are set
+ * as type IX_QMGR_REALTIME_SPORADIC are not processed and disabled.
+ * This helps prevent any tasks resulting from the notification of the
+ * IX_QMGR_TYPE_REALTIME_PERIODIC type queue to being subject to livelock.
+ * The function runs the dispatcher for a group of queues.
+ * Callbacks are made for interrupts that have occurred on queues within
+ * the group that have registered callbacks. The order in which queues are
+ * serviced depends on their type along with the queue priorities set by the
+ * client. This function may be called from interrupt or task context.
+ *
+ * This function is not re-entrant.
+ *
+ * @param group @ref IxQMgrDispatchGroup [in] - the group of queues over which
+ * the dispatcher will run
+ *
+ * @return @li void
+ *
+ * @note This function may be called from interrupt or task context.
+ * However, for optimal performance the choice of context depends also on the
+ * operating system used.
+ *
+ */
+PUBLIC void
+ixQMgrDispatcherLoopRunB0LLP (IxQMgrDispatchGroup group);
+
+/**
+ *
+ * @ingroup IxQMgrAPI
+ *
+ * @fn ixQMgrNotificationCallbackSet (IxQMgrQId qId,
+ IxQMgrCallback callback,
+ IxQMgrCallbackId callbackId)
+ *
+ * @brief Set the notification callback for a queue.
+ *
+ * This function sets the callback for the specified queue. This callback will
+ * be called by the dispatcher, and may be called in the context of a interrupt
+ * If callback has a value of NULL the previously registered callback, if one
+ * exists will be unregistered.
+ *
+ * @param qId @ref IxQMgrQId [in] - the queue idenfifier
+ * @param callback @ref IxQMgrCallback [in] - the callback registered for this queue
+ * @param callbackId @ref IxQMgrCallbackId [in] - the callback identifier
+ *
+ * @return @li IX_SUCCESS, the callback for the specified queue has been set
+ * @return @li IX_QMGR_Q_NOT_CONFIGURED, the specified qId has not been configured
+ *
+ */
+PUBLIC IX_STATUS
+ixQMgrNotificationCallbackSet (IxQMgrQId qId,
+ IxQMgrCallback callback,
+ IxQMgrCallbackId callbackId);
+
+/**
+ *
+ * @ingroup IxQMgrAPI
+ *
+ * @fn ixQMgrDispatcherLoopGet (IxQMgrDispatcherFuncPtr *qDispatcherFuncPtr)
+ *
+ * @brief Get QMgr DispatcherLoopRun for respective silicon device
+ *
+ * This function gets a function pointer to ixQMgrDispatcherLoopRunA0() for IXP42X A0
+ * Silicon. If the IXP42X B0 or 46X Silicon, the default is the ixQMgrDispatcherLoopRunB0()
+ * function, however if live lock prevention is enabled a function pointer to
+ * ixQMgrDispatcherLoopRunB0LLP() is given.
+ *
+ * @param *qDispatchFuncPtr @ref IxQMgrDispatcherFuncPtr [out] -
+ * the function pointer of QMgr Dispatcher
+ *
+ */
+PUBLIC void
+ixQMgrDispatcherLoopGet (IxQMgrDispatcherFuncPtr *qDispatcherFuncPtr);
+
+/**
+ *
+ * @ingroup IxQMgrAPI
+ *
+ * @fn ixQMgrStickyInterruptRegEnable(void)
+ *
+ * @brief Enable AQM's sticky interrupt register behaviour only available
+ * on B0 Silicon.
+ *
+ * When AQM's sticky interrupt register is enabled, interrupt register bit will
+ * only be cleared when a '1' is written to interrupt register bit and the
+ * interrupting condition is satisfied, i.e.queue condition does not exist.
+ *
+ * @note This function must be called before any queue is enabled.
+ * Calling this function after queue is enabled will cause
+ * undefined results.
+ *
+ * @return none
+ *
+ */
+PUBLIC void
+ixQMgrStickyInterruptRegEnable(void);
+
+
+/**
+ * @ingroup IxQMgrAPI
+ *
+ * @fn ixQMgrCallbackTypeSet(IxQMgrQId qId,
+ IxQMgrType type)
+ *
+ * @brief Set the Callback Type of a queue.
+ *
+ * This function is only used for live lock prevention.
+ * This function allows the callback type of a queue to be set. The default for
+ * all queues is IX_QMGR_TYPE_REALTIME_OTHER. Setting the type to
+ * IX_QMGR_TYPE_REALTIME_SPORADIC means that this queue will have it's
+ * notifications disabled while there is a task associated with a
+ * queue of type IX_QMGR_TYPE_REALTIME_PERIODIC running. As live lock
+ * prevention operates on lower queues, this function should
+ * be called for lower queues only.
+ * This function is not re-entrant.
+ *
+ * @param qId @ref IxQMgrQId [in] - the queue identifier
+ * @param type @ref IxQMgrType [in] - the type of callback
+ *
+ * @return @li IX_SUCCESS, successfully set callback type for the queue entry
+ * @return @li IX_QMGR_Q_NOT_CONFIGURED, queue not configured for this QId
+ * @return @li IX_QMGR_PARAMETER_ERROR, invalid parameter(s).
+ *
+ */
+PUBLIC IX_STATUS
+ixQMgrCallbackTypeSet(IxQMgrQId qId,
+ IxQMgrType type);
+
+/**
+ * @ingroup IxQMgrAPI
+ *
+ * @fn ixQMgrCallbackTypeGet(IxQMgrQId qId,
+ IxQMgrType *type)
+ *
+ * @brief Get the Callback Type of a queue.
+ *
+ * This function allows the callback type of a queue to be got. As live lock
+ * prevention operates on lower queues, this function should
+ * be called for lower queues only.
+ * This function is re-entrant.
+ *
+ * @param qId @ref IxQMgrQId [in] - the queue identifier
+ * @param *type @ref IxQMgrType [out] - the type of callback
+ *
+ * @return @li IX_SUCCESS, successfully set callback type for the queue entry
+ * @return @li IX_QMGR_Q_NOT_CONFIGURED, queue not configured for this QId
+ * @return @li IX_QMGR_PARAMETER_ERROR, invalid parameter(s)
+ *
+ */
+PUBLIC IX_STATUS
+ixQMgrCallbackTypeGet(IxQMgrQId qId,
+ IxQMgrType *type);
+
+/**
+ * @ingroup IxQMgrAPI
+ *
+ * @fn ixQMgrPeriodicDone(void)
+ *
+ * @brief Indicate that the Periodic task is completed for LLP
+ *
+ * This function is used as part of live lock prevention.
+ * A periodic task is a task that results from a queue that
+ * is set as type IX_QMGR_TYPE_REALTIME_PERIODIC. This function
+ * should be called to indicate to the dispatcher that the
+ * the periodic task is completed. This ensures that the notifications
+ * for queues set as type sporadic queues are re-enabled.
+ * This function is re-entrant.
+ *
+ */
+PUBLIC void
+ixQMgrPeriodicDone(void);
+
+
+/**
+ * @ingroup IxQMgrAPI
+ *
+ * @fn ixQMgrLLPShow(int resetStats)
+ *
+ * @brief Print out the live lock prevention statistics when in debug mode.
+ *
+ * This function prints out statistics related to the livelock. These
+ * statistics are only collected in debug mode.
+ * This function is not re-entrant.
+ *
+ * @param resetStats @ref int [in] - if set the the stats are reset.
+ *
+ */
+PUBLIC void
+ixQMgrLLPShow(int resetStats);
+
+
+#endif /* IXQMGR_H */
+
+/**
+ * @} defgroup IxQMgrAPI
+ */
+
+
diff --git a/cpu/ixp/npe/include/IxQMgrAqmIf_p.h b/cpu/ixp/npe/include/IxQMgrAqmIf_p.h
new file mode 100644
index 0000000000..7f5733c5d2
--- /dev/null
+++ b/cpu/ixp/npe/include/IxQMgrAqmIf_p.h
@@ -0,0 +1,927 @@
+/**
+ * @file IxQMgrAqmIf_p.h
+ *
+ * @author Intel Corporation
+ * @date 30-Oct-2001
+ *
+ * @brief The IxQMgrAqmIf sub-component provides a number of inline
+ * functions for performing I/O on the AQM.
+ *
+ * Because some functions contained in this module are inline and are
+ * used in other modules (within the QMgr component) the definitions are
+ * contained in this header file. The "normal" use of inline functions
+ * is to use the inline functions in the module in which they are
+ * defined. In this case these inline functions are used in external
+ * modules and therefore the use of "inline extern". What this means
+ * is as follows: if a function foo is declared as "inline extern"this
+ * definition is only used for inlining, in no case is the function
+ * compiled on its own. If the compiler cannot inline the function it
+ * becomes an external reference. Therefore in IxQMgrAqmIf.c all
+ * inline functions are defined without the "inline extern" specifier
+ * and so define the external references. In all other modules these
+ * funtions are defined as "inline extern".
+ *
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+*/
+
+#ifndef IXQMGRAQMIF_P_H
+#define IXQMGRAQMIF_P_H
+
+#include "IxOsalTypes.h"
+
+/*
+ * inline definition
+ */
+
+#ifdef IX_OSAL_INLINE_ALL
+/* If IX_OSAL_INLINE_ALL is set then each inlineable API functions will be defined as
+ inline functions */
+#define IX_QMGR_AQMIF_INLINE IX_OSAL_INLINE_EXTERN
+#else
+#ifdef IXQMGRAQMIF_C
+#ifndef IX_QMGR_AQMIF_INLINE
+#define IX_QMGR_AQMIF_INLINE
+#endif
+#else
+#ifndef IX_QMGR_AQMIF_INLINE
+#define IX_QMGR_AQMIF_INLINE IX_OSAL_INLINE_EXTERN
+#endif
+#endif /* IXQMGRAQMIF_C */
+#endif /* IX_OSAL_INLINE */
+
+
+/*
+ * User defined include files.
+ */
+#include "IxQMgr.h"
+#include "IxQMgrLog_p.h"
+#include "IxQMgrQCfg_p.h"
+
+/* Because this file contains inline functions which will be compiled into
+ * other components, we need to ensure that the IX_COMPONENT_NAME define
+ * is set to ix_qmgr while this code is being compiled. This will ensure
+ * that the correct implementation is provided for the memory access macros
+ * IX_OSAL_READ_LONG and IX_OSAL_WRITE_LONG which are used in this file.
+ * This must be done before including "IxOsalMemAccess.h"
+ */
+#define IX_QMGR_AQMIF_SAVED_COMPONENT_NAME IX_COMPONENT_NAME
+#undef IX_COMPONENT_NAME
+#define IX_COMPONENT_NAME ix_qmgr
+#include "IxOsal.h"
+
+/*
+ * #defines and macros used in this file.
+ */
+
+/* Number of bytes per word */
+#define IX_QMGR_NUM_BYTES_PER_WORD 4
+
+/* Underflow bit mask */
+#define IX_QMGR_UNDERFLOW_BIT_OFFSET 0x0
+
+/* Overflow bit mask */
+#define IX_QMGR_OVERFLOW_BIT_OFFSET 0x1
+
+/* Queue access register, queue 0 */
+#define IX_QMGR_QUEACC0_OFFSET 0x0000
+
+/* Size of queue access register in words */
+#define IX_QMGR_QUEACC_SIZE 0x4/*words*/
+
+/* Queue status register, queues 0-7 */
+#define IX_QMGR_QUELOWSTAT0_OFFSET (IX_QMGR_QUEACC0_OFFSET +\
+(IX_QMGR_MAX_NUM_QUEUES * IX_QMGR_QUEACC_SIZE * IX_QMGR_NUM_BYTES_PER_WORD))
+
+/* Queue status register, queues 8-15 */
+#define IX_QMGR_QUELOWSTAT1_OFFSET (IX_QMGR_QUELOWSTAT0_OFFSET +\
+ IX_QMGR_NUM_BYTES_PER_WORD)
+
+/* Queue status register, queues 16-23 */
+#define IX_QMGR_QUELOWSTAT2_OFFSET (IX_QMGR_QUELOWSTAT1_OFFSET +\
+ IX_QMGR_NUM_BYTES_PER_WORD)
+
+/* Queue status register, queues 24-31 */
+#define IX_QMGR_QUELOWSTAT3_OFFSET (IX_QMGR_QUELOWSTAT2_OFFSET +\
+ IX_QMGR_NUM_BYTES_PER_WORD)
+
+/* Queue status register Q status bits mask */
+#define IX_QMGR_QUELOWSTAT_QUE_STS_BITS_MASK 0xF
+
+/* Size of queue 0-31 status register */
+#define IX_QMGR_QUELOWSTAT_SIZE 0x4 /*words*/
+
+/* The number of queues' status specified per word */
+#define IX_QMGR_QUELOWSTAT_NUM_QUE_PER_WORD 0x8
+
+/* Queue UF/OF status register queues 0-15 */
+#define IX_QMGR_QUEUOSTAT0_OFFSET (IX_QMGR_QUELOWSTAT3_OFFSET +\
+ IX_QMGR_NUM_BYTES_PER_WORD)
+/* Queue UF/OF status register queues 16-31 */
+#define IX_QMGR_QUEUOSTAT1_OFFSET (IX_QMGR_QUEUOSTAT0_OFFSET +\
+ IX_QMGR_NUM_BYTES_PER_WORD)
+
+/* The number of queues' underflow/overflow status specified per word */
+#define IX_QMGR_QUEUOSTAT_NUM_QUE_PER_WORD 0x10
+
+/* Queue NE status register, queues 32-63 */
+#define IX_QMGR_QUEUPPSTAT0_OFFSET (IX_QMGR_QUEUOSTAT1_OFFSET +\
+ IX_QMGR_NUM_BYTES_PER_WORD)
+
+/* Queue F status register, queues 32-63 */
+#define IX_QMGR_QUEUPPSTAT1_OFFSET (IX_QMGR_QUEUPPSTAT0_OFFSET +\
+ IX_QMGR_NUM_BYTES_PER_WORD)
+
+/* Size of queue 32-63 status register */
+#define IX_QMGR_QUEUPPSTAT_SIZE 0x2 /*words*/
+
+/* The number of queues' status specified per word */
+#define IX_QMGR_QUEUPPSTAT_NUM_QUE_PER_WORD 0x20
+
+/* Queue INT source select register, queues 0-7 */
+#define IX_QMGR_INT0SRCSELREG0_OFFSET (IX_QMGR_QUEUPPSTAT1_OFFSET +\
+ IX_QMGR_NUM_BYTES_PER_WORD)
+
+/* Queue INT source select register, queues 8-15 */
+#define IX_QMGR_INT0SRCSELREG1_OFFSET (IX_QMGR_INT0SRCSELREG0_OFFSET+\
+ IX_QMGR_NUM_BYTES_PER_WORD)
+
+/* Queue INT source select register, queues 16-23 */
+#define IX_QMGR_INT0SRCSELREG2_OFFSET (IX_QMGR_INT0SRCSELREG1_OFFSET+\
+ IX_QMGR_NUM_BYTES_PER_WORD)
+
+/* Queue INT source select register, queues 24-31 */
+#define IX_QMGR_INT0SRCSELREG3_OFFSET (IX_QMGR_INT0SRCSELREG2_OFFSET+\
+ IX_QMGR_NUM_BYTES_PER_WORD)
+
+/* Size of interrupt source select reegister */
+#define IX_QMGR_INT0SRCSELREG_SIZE 0x4 /*words*/
+
+/* The number of queues' interrupt source select specified per word*/
+#define IX_QMGR_INTSRC_NUM_QUE_PER_WORD 0x8
+
+/* Queue INT enable register, queues 0-31 */
+#define IX_QMGR_QUEIEREG0_OFFSET (IX_QMGR_INT0SRCSELREG3_OFFSET +\
+ IX_QMGR_NUM_BYTES_PER_WORD)
+
+/* Queue INT enable register, queues 32-63 */
+#define IX_QMGR_QUEIEREG1_OFFSET (IX_QMGR_QUEIEREG0_OFFSET +\
+ IX_QMGR_NUM_BYTES_PER_WORD)
+
+/* Queue INT register, queues 0-31 */
+#define IX_QMGR_QINTREG0_OFFSET (IX_QMGR_QUEIEREG1_OFFSET +\
+ IX_QMGR_NUM_BYTES_PER_WORD)
+
+/* Queue INT register, queues 32-63 */
+#define IX_QMGR_QINTREG1_OFFSET (IX_QMGR_QINTREG0_OFFSET +\
+ IX_QMGR_NUM_BYTES_PER_WORD)
+
+/* Size of interrupt register */
+#define IX_QMGR_QINTREG_SIZE 0x2 /*words*/
+
+/* Number of queues' status specified per word */
+#define IX_QMGR_QINTREG_NUM_QUE_PER_WORD 0x20
+
+/* Number of bits per queue interrupt status */
+#define IX_QMGR_QINTREG_BITS_PER_QUEUE 0x1
+#define IX_QMGR_QINTREG_BIT_OFFSET 0x1
+
+/* Size of address space not used by AQM */
+#define IX_QMGR_AQM_UNUSED_ADDRESS_SPACE_SIZE_IN_BYTES 0x1bC0
+
+/* Queue config register, queue 0 */
+#define IX_QMGR_QUECONFIG_BASE_OFFSET (IX_QMGR_QINTREG1_OFFSET +\
+ IX_QMGR_NUM_BYTES_PER_WORD +\
+ IX_QMGR_AQM_UNUSED_ADDRESS_SPACE_SIZE_IN_BYTES)
+
+/* Total size of configuration words */
+#define IX_QMGR_QUECONFIG_SIZE 0x100
+
+/* Start of SRAM queue buffer space */
+#define IX_QMGR_QUEBUFFER_SPACE_OFFSET (IX_QMGR_QUECONFIG_BASE_OFFSET +\
+ IX_QMGR_MAX_NUM_QUEUES * IX_QMGR_NUM_BYTES_PER_WORD)
+
+/* Total bits in a word */
+#define BITS_PER_WORD 32
+
+/* Size of queue buffer space */
+#define IX_QMGR_QUE_BUFFER_SPACE_SIZE 0x1F00
+
+/*
+ * This macro will return the address of the access register for the
+ * queue specified by qId
+ */
+#define IX_QMGR_Q_ACCESS_ADDR_GET(qId)\
+ (((qId) * (IX_QMGR_QUEACC_SIZE * IX_QMGR_NUM_BYTES_PER_WORD))\
+ + IX_QMGR_QUEACC0_OFFSET)
+
+/*
+ * Bit location of bit-3 of INT0SRCSELREG0 register to enabled
+ * sticky interrupt register.
+ */
+#define IX_QMGR_INT0SRCSELREG0_BIT3 3
+
+/*
+ * Variable declerations global to this file. Externs are followed by
+ * statics.
+ */
+extern UINT32 aqmBaseAddress;
+
+/*
+ * Function declarations.
+ */
+void
+ixQMgrAqmIfInit (void);
+
+void
+ixQMgrAqmIfUninit (void);
+
+unsigned
+ixQMgrAqmIfLog2 (unsigned number);
+
+void
+ixQMgrAqmIfQRegisterBitsWrite (IxQMgrQId qId,
+ UINT32 registerBaseAddrOffset,
+ unsigned queuesPerRegWord,
+ UINT32 value);
+
+void
+ixQMgrAqmIfQStatusCheckValsCalc (IxQMgrQId qId,
+ IxQMgrSourceId srcSel,
+ unsigned int *statusWordOffset,
+ UINT32 *checkValue,
+ UINT32 *mask);
+/*
+ * The Xscale software allways deals with logical addresses and so the
+ * base address of the AQM memory space is not a hardcoded value. This
+ * function must be called before any other function in this component.
+ * NO CHECKING is performed to ensure that the base address has been
+ * set.
+ */
+void
+ixQMgrAqmIfBaseAddressSet (UINT32 address);
+
+/*
+ * Get the base address of the AQM memory space.
+ */
+void
+ixQMgrAqmIfBaseAddressGet (UINT32 *address);
+
+/*
+ * Get the sram base address
+ */
+void
+ixQMgrAqmIfSramBaseAddressGet (UINT32 *address);
+
+/*
+ * Read a queue status
+ */
+void
+ixQMgrAqmIfQueStatRead (IxQMgrQId qId,
+ IxQMgrQStatus* status);
+
+
+/*
+ * Set INT0SRCSELREG0 Bit3
+ */
+void ixQMgrAqmIfIntSrcSelReg0Bit3Set (void);
+
+
+/*
+ * Set the interrupt source
+ */
+void
+ixQMgrAqmIfIntSrcSelWrite (IxQMgrQId qId,
+ IxQMgrSourceId sourceId);
+
+/*
+ * Enable interruptson a queue
+ */
+void
+ixQMgrAqmIfQInterruptEnable (IxQMgrQId qId);
+
+/*
+ * Disable interrupt on a quee
+ */
+void
+ixQMgrAqmIfQInterruptDisable (IxQMgrQId qId);
+
+/*
+ * Write the config register of the specified queue
+ */
+void
+ixQMgrAqmIfQueCfgWrite (IxQMgrQId qId,
+ IxQMgrQSizeInWords qSizeInWords,
+ IxQMgrQEntrySizeInWords entrySizeInWords,
+ UINT32 freeSRAMAddress);
+
+/*
+ * read fields from the config of the specified queue.
+ */
+void
+ixQMgrAqmIfQueCfgRead (IxQMgrQId qId,
+ unsigned int numEntries,
+ UINT32 *baseAddress,
+ unsigned int *ne,
+ unsigned int *nf,
+ UINT32 *readPtr,
+ UINT32 *writePtr);
+
+/*
+ * Set the ne and nf watermark level on a queue.
+ */
+void
+ixQMgrAqmIfWatermarkSet (IxQMgrQId qId,
+ unsigned ne,
+ unsigned nf);
+
+/* Inspect an entry without moving the read pointer */
+IX_STATUS
+ixQMgrAqmIfQPeek (IxQMgrQId qId,
+ unsigned int entryIndex,
+ unsigned int *entry);
+
+/* Modify an entry without moving the write pointer */
+IX_STATUS
+ixQMgrAqmIfQPoke (IxQMgrQId qId,
+ unsigned int entryIndex,
+ unsigned int *entry);
+
+/*
+ * Function prototype for inline functions. For description refers to
+ * the functions defintion below.
+ */
+IX_QMGR_AQMIF_INLINE void
+ixQMgrAqmIfWordWrite (VUINT32 *address,
+ UINT32 word);
+
+IX_QMGR_AQMIF_INLINE void
+ixQMgrAqmIfWordRead (VUINT32 *address,
+ UINT32 *word);
+
+IX_QMGR_AQMIF_INLINE void
+ixQMgrAqmIfQPop (IxQMgrQId qId,
+ IxQMgrQEntrySizeInWords numWords,
+ UINT32 *entry);
+
+IX_QMGR_AQMIF_INLINE void
+ixQMgrAqmIfQPush (IxQMgrQId qId,
+ IxQMgrQEntrySizeInWords numWords,
+ UINT32 *entry);
+
+IX_QMGR_AQMIF_INLINE void
+ixQMgrAqmIfQStatusRegsRead (IxQMgrDispatchGroup group,
+ UINT32 *qStatusWords);
+
+IX_QMGR_AQMIF_INLINE BOOL
+ixQMgrAqmIfQStatusCheck (UINT32 *oldQStatusWords,
+ UINT32 *newQStatusWords,
+ unsigned int statusWordOffset,
+ UINT32 checkValue,
+ UINT32 mask);
+
+IX_QMGR_AQMIF_INLINE BOOL
+ixQMgrAqmIfRegisterBitCheck (IxQMgrQId qId,
+ UINT32 registerBaseAddrOffset,
+ unsigned queuesPerRegWord,
+ unsigned relativeBitOffset,
+ BOOL reset);
+
+IX_QMGR_AQMIF_INLINE BOOL
+ixQMgrAqmIfUnderflowCheck (IxQMgrQId qId);
+
+IX_QMGR_AQMIF_INLINE BOOL
+ixQMgrAqmIfOverflowCheck (IxQMgrQId qId);
+
+IX_QMGR_AQMIF_INLINE UINT32
+ixQMgrAqmIfQRegisterBitsRead (IxQMgrQId qId,
+ UINT32 registerBaseAddrOffset,
+ unsigned queuesPerRegWord);
+IX_QMGR_AQMIF_INLINE void
+ixQMgrAqmIfQInterruptRegWrite (IxQMgrDispatchGroup group,
+ UINT32 reg);
+IX_QMGR_AQMIF_INLINE void
+ixQMgrAqmIfQInterruptRegRead (IxQMgrDispatchGroup group,
+ UINT32 *regVal);
+
+IX_QMGR_AQMIF_INLINE void
+ixQMgrAqmIfQueLowStatRead (IxQMgrQId qId,
+ IxQMgrQStatus *status);
+
+IX_QMGR_AQMIF_INLINE void
+ixQMgrAqmIfQueUppStatRead (IxQMgrQId qId,
+ IxQMgrQStatus *status);
+
+IX_QMGR_AQMIF_INLINE void
+ixQMgrAqmIfQueStatRead (IxQMgrQId qId,
+ IxQMgrQStatus *qStatus);
+
+IX_QMGR_AQMIF_INLINE unsigned
+ixQMgrAqmIfPow2NumDivide (unsigned numerator,
+ unsigned denominator);
+
+IX_QMGR_AQMIF_INLINE void
+ixQMgrAqmIfQInterruptEnableRegRead (IxQMgrDispatchGroup group,
+ UINT32 *regVal);
+/*
+ * Inline functions
+ */
+
+/*
+ * This inline function is used by other QMgr components to write one
+ * word to the specified address.
+ */
+IX_QMGR_AQMIF_INLINE void
+ixQMgrAqmIfWordWrite (VUINT32 *address,
+ UINT32 word)
+{
+ IX_OSAL_WRITE_LONG(address, word);
+}
+
+/*
+ * This inline function is used by other QMgr components to read a
+ * word from the specified address.
+ */
+IX_QMGR_AQMIF_INLINE void
+ixQMgrAqmIfWordRead (VUINT32 *address,
+ UINT32 *word)
+{
+ *word = IX_OSAL_READ_LONG(address);
+}
+
+
+/*
+ * This inline function is used by other QMgr components to pop an
+ * entry off the specified queue.
+ */
+IX_QMGR_AQMIF_INLINE void
+ixQMgrAqmIfQPop (IxQMgrQId qId,
+ IxQMgrQEntrySizeInWords numWords,
+ UINT32 *entry)
+{
+ volatile UINT32 *accRegAddr;
+
+ accRegAddr = (UINT32*)(aqmBaseAddress +
+ IX_QMGR_Q_ACCESS_ADDR_GET(qId));
+
+ switch (numWords)
+ {
+ case IX_QMGR_Q_ENTRY_SIZE1:
+ ixQMgrAqmIfWordRead (accRegAddr, entry);
+ break;
+ case IX_QMGR_Q_ENTRY_SIZE2:
+ ixQMgrAqmIfWordRead (accRegAddr++, entry++);
+ ixQMgrAqmIfWordRead (accRegAddr, entry);
+ break;
+ case IX_QMGR_Q_ENTRY_SIZE4:
+ ixQMgrAqmIfWordRead (accRegAddr++, entry++);
+ ixQMgrAqmIfWordRead (accRegAddr++, entry++);
+ ixQMgrAqmIfWordRead (accRegAddr++, entry++);
+ ixQMgrAqmIfWordRead (accRegAddr, entry);
+ break;
+ default:
+ IX_QMGR_LOG_ERROR0("Invalid Q Entry size passed to ixQMgrAqmIfQPop");
+ break;
+ }
+}
+
+/*
+ * This inline function is used by other QMgr components to push an
+ * entry to the specified queue.
+ */
+IX_QMGR_AQMIF_INLINE void
+ixQMgrAqmIfQPush (IxQMgrQId qId,
+ IxQMgrQEntrySizeInWords numWords,
+ UINT32 *entry)
+{
+ volatile UINT32 *accRegAddr;
+
+ accRegAddr = (UINT32*)(aqmBaseAddress +
+ IX_QMGR_Q_ACCESS_ADDR_GET(qId));
+
+ switch (numWords)
+ {
+ case IX_QMGR_Q_ENTRY_SIZE1:
+ ixQMgrAqmIfWordWrite (accRegAddr, *entry);
+ break;
+ case IX_QMGR_Q_ENTRY_SIZE2:
+ ixQMgrAqmIfWordWrite (accRegAddr++, *entry++);
+ ixQMgrAqmIfWordWrite (accRegAddr, *entry);
+ break;
+ case IX_QMGR_Q_ENTRY_SIZE4:
+ ixQMgrAqmIfWordWrite (accRegAddr++, *entry++);
+ ixQMgrAqmIfWordWrite (accRegAddr++, *entry++);
+ ixQMgrAqmIfWordWrite (accRegAddr++, *entry++);
+ ixQMgrAqmIfWordWrite (accRegAddr, *entry);
+ break;
+ default:
+ IX_QMGR_LOG_ERROR0("Invalid Q Entry size passed to ixQMgrAqmIfQPush");
+ break;
+ }
+}
+
+/*
+ * The AQM interrupt registers contains a bit for each AQM queue
+ * specifying the queue (s) that cause an interrupt to fire. This
+ * function is called by IxQMGrDispatcher component.
+ */
+IX_QMGR_AQMIF_INLINE void
+ixQMgrAqmIfQStatusRegsRead (IxQMgrDispatchGroup group,
+ UINT32 *qStatusWords)
+{
+ volatile UINT32 *regAddress = NULL;
+
+ if (group == IX_QMGR_QUELOW_GROUP)
+ {
+ regAddress = (UINT32*)(aqmBaseAddress +
+ IX_QMGR_QUELOWSTAT0_OFFSET);
+
+ ixQMgrAqmIfWordRead (regAddress++, qStatusWords++);
+ ixQMgrAqmIfWordRead (regAddress++, qStatusWords++);
+ ixQMgrAqmIfWordRead (regAddress++, qStatusWords++);
+ ixQMgrAqmIfWordRead (regAddress, qStatusWords);
+ }
+ else /* We have the upper queues */
+ {
+ /* Only need to read the Nearly Empty status register for
+ * queues 32-63 as for therse queues the interrtupt source
+ * condition is fixed to Nearly Empty
+ */
+ regAddress = (UINT32*)(aqmBaseAddress +
+ IX_QMGR_QUEUPPSTAT0_OFFSET);
+ ixQMgrAqmIfWordRead (regAddress, qStatusWords);
+ }
+}
+
+
+/*
+ * This function check if the status for a queue has changed between
+ * 2 snapshots and if it has, that the status matches a particular
+ * value after masking.
+ */
+IX_QMGR_AQMIF_INLINE BOOL
+ixQMgrAqmIfQStatusCheck (UINT32 *oldQStatusWords,
+ UINT32 *newQStatusWords,
+ unsigned int statusWordOffset,
+ UINT32 checkValue,
+ UINT32 mask)
+{
+ if (((oldQStatusWords[statusWordOffset] & mask) !=
+ (newQStatusWords[statusWordOffset] & mask)) &&
+ ((newQStatusWords[statusWordOffset] & mask) == checkValue))
+ {
+ return TRUE;
+ }
+
+ return FALSE;
+}
+
+/*
+ * The AQM interrupt register contains a bit for each AQM queue
+ * specifying the queue (s) that cause an interrupt to fire. This
+ * function is called by IxQMgrDispatcher component.
+ */
+IX_QMGR_AQMIF_INLINE void
+ixQMgrAqmIfQInterruptRegRead (IxQMgrDispatchGroup group,
+ UINT32 *regVal)
+{
+ volatile UINT32 *regAddress;
+
+ if (group == IX_QMGR_QUELOW_GROUP)
+ {
+ regAddress = (UINT32*)(aqmBaseAddress +
+ IX_QMGR_QINTREG0_OFFSET);
+ }
+ else
+ {
+ regAddress = (UINT32*)(aqmBaseAddress +
+ IX_QMGR_QINTREG1_OFFSET);
+ }
+
+ ixQMgrAqmIfWordRead (regAddress, regVal);
+}
+
+/*
+ * The AQM interrupt enable register contains a bit for each AQM queue.
+ * This function reads the interrupt enable register. This
+ * function is called by IxQMgrDispatcher component.
+ */
+IX_QMGR_AQMIF_INLINE void
+ixQMgrAqmIfQInterruptEnableRegRead (IxQMgrDispatchGroup group,
+ UINT32 *regVal)
+{
+ volatile UINT32 *regAddress;
+
+ if (group == IX_QMGR_QUELOW_GROUP)
+ {
+ regAddress = (UINT32*)(aqmBaseAddress +
+ IX_QMGR_QUEIEREG0_OFFSET);
+ }
+ else
+ {
+ regAddress = (UINT32*)(aqmBaseAddress +
+ IX_QMGR_QUEIEREG1_OFFSET);
+ }
+
+ ixQMgrAqmIfWordRead (regAddress, regVal);
+}
+
+
+/*
+ * This inline function will read the status bit of a queue
+ * specified by qId. If reset is TRUE the bit is cleared.
+ */
+IX_QMGR_AQMIF_INLINE BOOL
+ixQMgrAqmIfRegisterBitCheck (IxQMgrQId qId,
+ UINT32 registerBaseAddrOffset,
+ unsigned queuesPerRegWord,
+ unsigned relativeBitOffset,
+ BOOL reset)
+{
+ UINT32 actualBitOffset;
+ volatile UINT32 *registerAddress;
+ UINT32 registerWord;
+
+ /*
+ * Calculate the registerAddress
+ * multiple queues split accross registers
+ */
+ registerAddress = (UINT32*)(aqmBaseAddress +
+ registerBaseAddrOffset +
+ ((qId / queuesPerRegWord) *
+ IX_QMGR_NUM_BYTES_PER_WORD));
+
+ /*
+ * Get the status word
+ */
+ ixQMgrAqmIfWordRead (registerAddress, &registerWord);
+
+ /*
+ * Calculate the actualBitOffset
+ * status for multiple queues stored in one register
+ */
+ actualBitOffset = (relativeBitOffset + 1) <<
+ ((qId & (queuesPerRegWord - 1)) * (BITS_PER_WORD / queuesPerRegWord));
+
+ /* Check if the status bit is set */
+ if (registerWord & actualBitOffset)
+ {
+ /* Clear the bit if reset */
+ if (reset)
+ {
+ ixQMgrAqmIfWordWrite (registerAddress, registerWord & (~actualBitOffset));
+ }
+ return TRUE;
+ }
+
+ /* Bit not set */
+ return FALSE;
+}
+
+
+/*
+ * @ingroup IxQmgrAqmIfAPI
+ *
+ * @brief Read the underflow status of a queue
+ *
+ * This inline function will read the underflow status of a queue
+ * specified by qId.
+ *
+ */
+IX_QMGR_AQMIF_INLINE BOOL
+ixQMgrAqmIfUnderflowCheck (IxQMgrQId qId)
+{
+ if (qId < IX_QMGR_MIN_QUEUPP_QID)
+ {
+ return (ixQMgrAqmIfRegisterBitCheck (qId,
+ IX_QMGR_QUEUOSTAT0_OFFSET,
+ IX_QMGR_QUEUOSTAT_NUM_QUE_PER_WORD,
+ IX_QMGR_UNDERFLOW_BIT_OFFSET,
+ TRUE/*reset*/));
+ }
+ else
+ {
+ /* Qs 32-63 have no underflow status */
+ return FALSE;
+ }
+}
+
+/*
+ * This inline function will read the overflow status of a queue
+ * specified by qId.
+ */
+IX_QMGR_AQMIF_INLINE BOOL
+ixQMgrAqmIfOverflowCheck (IxQMgrQId qId)
+{
+ if (qId < IX_QMGR_MIN_QUEUPP_QID)
+ {
+ return (ixQMgrAqmIfRegisterBitCheck (qId,
+ IX_QMGR_QUEUOSTAT0_OFFSET,
+ IX_QMGR_QUEUOSTAT_NUM_QUE_PER_WORD,
+ IX_QMGR_OVERFLOW_BIT_OFFSET,
+ TRUE/*reset*/));
+ }
+ else
+ {
+ /* Qs 32-63 have no overflow status */
+ return FALSE;
+ }
+}
+
+/*
+ * This inline function will read the status bits of a queue
+ * specified by qId.
+ */
+IX_QMGR_AQMIF_INLINE UINT32
+ixQMgrAqmIfQRegisterBitsRead (IxQMgrQId qId,
+ UINT32 registerBaseAddrOffset,
+ unsigned queuesPerRegWord)
+{
+ volatile UINT32 *registerAddress;
+ UINT32 registerWord;
+ UINT32 statusBitsMask;
+ UINT32 bitsPerQueue;
+
+ bitsPerQueue = BITS_PER_WORD / queuesPerRegWord;
+
+ /*
+ * Calculate the registerAddress
+ * multiple queues split accross registers
+ */
+ registerAddress = (UINT32*)(aqmBaseAddress +
+ registerBaseAddrOffset +
+ ((qId / queuesPerRegWord) *
+ IX_QMGR_NUM_BYTES_PER_WORD));
+ /*
+ * Read the status word
+ */
+ ixQMgrAqmIfWordRead (registerAddress, &registerWord);
+
+
+ /*
+ * Calculate the mask for the status bits for this queue.
+ */
+ statusBitsMask = ((1 << bitsPerQueue) - 1);
+
+ /*
+ * Shift the status word so it is right justified
+ */
+ registerWord >>= ((qId & (queuesPerRegWord - 1)) * bitsPerQueue);
+
+ /*
+ * Mask out all bar the status bits for this queue
+ */
+ return (registerWord &= statusBitsMask);
+}
+
+/*
+ * This function is called by IxQMgrDispatcher to set the contents of
+ * the AQM interrupt register.
+ */
+IX_QMGR_AQMIF_INLINE void
+ixQMgrAqmIfQInterruptRegWrite (IxQMgrDispatchGroup group,
+ UINT32 reg)
+{
+ volatile UINT32 *address;
+
+ if (group == IX_QMGR_QUELOW_GROUP)
+ {
+ address = (UINT32*)(aqmBaseAddress +
+ IX_QMGR_QINTREG0_OFFSET);
+ }
+ else
+ {
+ address = (UINT32*)(aqmBaseAddress +
+ IX_QMGR_QINTREG1_OFFSET);
+ }
+
+ ixQMgrAqmIfWordWrite (address, reg);
+}
+
+/*
+ * Read the status of a queue in the range 0-31.
+ *
+ * This function is used by other QMgr components to read the
+ * status of the queue specified by qId.
+ */
+IX_QMGR_AQMIF_INLINE void
+ixQMgrAqmIfQueLowStatRead (IxQMgrQId qId,
+ IxQMgrQStatus *status)
+{
+ /* Read the general status bits */
+ *status = ixQMgrAqmIfQRegisterBitsRead (qId,
+ IX_QMGR_QUELOWSTAT0_OFFSET,
+ IX_QMGR_QUELOWSTAT_NUM_QUE_PER_WORD);
+}
+
+/*
+ * This function will read the status of the queue specified
+ * by qId.
+ */
+IX_QMGR_AQMIF_INLINE void
+ixQMgrAqmIfQueUppStatRead (IxQMgrQId qId,
+ IxQMgrQStatus *status)
+{
+ /* Reset the status bits */
+ *status = 0;
+
+ /*
+ * Check if the queue is nearly empty,
+ * N.b. QUPP stat register contains status for regs 32-63 at each
+ * bit position so subtract 32 to get bit offset
+ */
+ if (ixQMgrAqmIfRegisterBitCheck ((qId - IX_QMGR_MIN_QUEUPP_QID),
+ IX_QMGR_QUEUPPSTAT0_OFFSET,
+ IX_QMGR_QUEUPPSTAT_NUM_QUE_PER_WORD,
+ 0/*relativeBitOffset*/,
+ FALSE/*!reset*/))
+ {
+ *status |= IX_QMGR_Q_STATUS_NE_BIT_MASK;
+ }
+
+ /*
+ * Check if the queue is full,
+ * N.b. QUPP stat register contains status for regs 32-63 at each
+ * bit position so subtract 32 to get bit offset
+ */
+ if (ixQMgrAqmIfRegisterBitCheck ((qId - IX_QMGR_MIN_QUEUPP_QID),
+ IX_QMGR_QUEUPPSTAT1_OFFSET,
+ IX_QMGR_QUEUPPSTAT_NUM_QUE_PER_WORD,
+ 0/*relativeBitOffset*/,
+ FALSE/*!reset*/))
+ {
+ *status |= IX_QMGR_Q_STATUS_F_BIT_MASK;
+ }
+}
+
+/*
+ * This function is used by other QMgr components to read the
+ * status of the queue specified by qId.
+ */
+IX_QMGR_AQMIF_INLINE void
+ixQMgrAqmIfQueStatRead (IxQMgrQId qId,
+ IxQMgrQStatus *qStatus)
+{
+ if (qId < IX_QMGR_MIN_QUEUPP_QID)
+ {
+ ixQMgrAqmIfQueLowStatRead (qId, qStatus);
+ }
+ else
+ {
+ ixQMgrAqmIfQueUppStatRead (qId, qStatus);
+ }
+}
+
+
+/*
+ * This function performs a mod division
+ */
+IX_QMGR_AQMIF_INLINE unsigned
+ixQMgrAqmIfPow2NumDivide (unsigned numerator,
+ unsigned denominator)
+{
+ /* Number is evenly divisable by 2 */
+ return (numerator >> ixQMgrAqmIfLog2 (denominator));
+}
+
+/* Restore IX_COMPONENT_NAME */
+#undef IX_COMPONENT_NAME
+#define IX_COMPONENT_NAME IX_QMGR_AQMIF_SAVED_COMPONENT_NAME
+
+#endif/*IXQMGRAQMIF_P_H*/
diff --git a/cpu/ixp/npe/include/IxQMgrDefines_p.h b/cpu/ixp/npe/include/IxQMgrDefines_p.h
new file mode 100644
index 0000000000..0183596af5
--- /dev/null
+++ b/cpu/ixp/npe/include/IxQMgrDefines_p.h
@@ -0,0 +1,55 @@
+/**
+ * @file IxQMgrDefines_p.h
+ *
+ * @author Intel Corporation
+ * @date 19-Jul-2002
+ *
+ * @brief IxQMgr Defines and tuneable constants
+ *
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+*/
+
+#ifndef IXQMGRDEFINES_P_H
+#define IXQMGRDEFINES_P_H
+
+#define IX_QMGR_PARM_CHECKS_ENABLED 1
+#define IX_QMGR_STATS_UPDATE_ENABLED 1
+
+#endif /* IXQMGRDEFINES_P_H */
diff --git a/cpu/ixp/npe/include/IxQMgrDispatcher_p.h b/cpu/ixp/npe/include/IxQMgrDispatcher_p.h
new file mode 100644
index 0000000000..71a3f8588e
--- /dev/null
+++ b/cpu/ixp/npe/include/IxQMgrDispatcher_p.h
@@ -0,0 +1,106 @@
+/**
+ * @file IxQMgrDispatcher_p.h
+ *
+ * @author Intel Corporation
+ * @date 07-Feb-2002
+ *
+ * @brief This file contains the internal functions for dispatcher
+ *
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+*/
+
+#ifndef IXQMGRDISPATCHER_P_H
+#define IXQMGRDISPATCHER_P_H
+
+/*
+ * User defined include files
+ */
+#include "IxQMgr.h"
+
+/*
+ * This structure defines the statistic data for a queue
+ */
+typedef struct
+{
+ unsigned callbackCnt; /* Call count of callback */
+ unsigned priorityChangeCnt; /* Priority change count */
+ unsigned intNoCallbackCnt; /* Interrupt fired but no callback set count */
+ unsigned intLostCallbackCnt; /* Interrupt lost and detected ; SCR541 */
+ BOOL notificationEnabled; /* Interrupt enabled for this queue */
+ IxQMgrSourceId srcSel; /* interrupt source */
+ unsigned enableCount; /* num times notif enabled by LLP */
+ unsigned disableCount; /* num of times notif disabled by LLP */
+} IxQMgrDispatcherQStats;
+
+/*
+ * This structure defines statistic data for the disatcher
+ */
+typedef struct
+ {
+ unsigned loopRunCnt; /* ixQMgrDispatcherLoopRun count */
+
+ IxQMgrDispatcherQStats queueStats[IX_QMGR_MAX_NUM_QUEUES];
+
+} IxQMgrDispatcherStats;
+
+/*
+ * Initialise the dispatcher component
+ */
+void
+ixQMgrDispatcherInit (void);
+
+/*
+ * Get the dispatcher statistics
+ */
+IxQMgrDispatcherStats*
+ixQMgrDispatcherStatsGet (void);
+
+/**
+ * Retrieve the number of leading zero bits starting from the MSB
+ * This function is implemented as an (extremely fast) asm routine
+ * for XSCALE processor (see clz instruction) and as a (slower) C
+ * function for other systems.
+ */
+unsigned int
+ixQMgrCountLeadingZeros(unsigned int value);
+
+#endif/*IXQMGRDISPATCHER_P_H*/
+
+
diff --git a/cpu/ixp/npe/include/IxQMgrLog_p.h b/cpu/ixp/npe/include/IxQMgrLog_p.h
new file mode 100644
index 0000000000..6b685b8a28
--- /dev/null
+++ b/cpu/ixp/npe/include/IxQMgrLog_p.h
@@ -0,0 +1,124 @@
+/**
+ * @file IxQMgrLog_p.h
+ *
+ * @author Intel Corporation
+ * @date 07-Feb-2002
+ *
+ * @brief This file contains the internal functions for config
+ *
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+*/
+
+#ifndef IXQMGRLOG_P_H
+#define IXQMGRLOG_P_H
+
+/*
+ * User defined header files
+ */
+#include "IxOsal.h"
+
+/*
+ * Macros
+ */
+
+#define IX_QMGR_LOG0(string) do\
+{\
+ ixOsalLog(IX_OSAL_LOG_LVL_USER, IX_OSAL_LOG_DEV_STDOUT, string, 0, 0, 0, 0, 0, 0);\
+}while(0);
+
+#define IX_QMGR_LOG1(string, arg1) do\
+{\
+ ixOsalLog(IX_OSAL_LOG_LVL_USER, IX_OSAL_LOG_DEV_STDOUT, string, (int)arg1, 0, 0, 0, 0, 0);\
+}while(0);
+
+#define IX_QMGR_LOG2(string, arg1, arg2) do\
+{\
+ ixOsalLog(IX_OSAL_LOG_LVL_USER, IX_OSAL_LOG_DEV_STDOUT, string, (int)arg1, (int)arg2, 0, 0, 0, 0);\
+}while(0);
+
+#define IX_QMGR_LOG3(string, arg1, arg2, arg3) do\
+{\
+ ixOsalLog(IX_OSAL_LOG_LVL_USER, IX_OSAL_LOG_DEV_STDOUT, string, (int)arg1, (int)arg2, (int)arg3, 0, 0, 0);\
+}while(0);
+
+#define IX_QMGR_LOG6(string, arg1, arg2, arg3, arg4, arg5, arg6) do\
+{\
+ ixOsalLog(IX_OSAL_LOG_LVL_USER, IX_OSAL_LOG_DEV_STDOUT, string, (int)arg1, (int)arg2, (int)arg3, (int)arg4, (int)arg5, (int)arg6); \
+}while(0);
+
+#define IX_QMGR_LOG_WARNING0(string) do\
+{\
+ ixOsalLog(IX_OSAL_LOG_LVL_WARNING, IX_OSAL_LOG_DEV_STDOUT, string, 0, 0, 0, 0, 0, 0);\
+}while(0);
+
+#define IX_QMGR_LOG_WARNING1(string, arg1) do\
+{\
+ ixOsalLog(IX_OSAL_LOG_LVL_WARNING, IX_OSAL_LOG_DEV_STDOUT, string, (int)arg1, 0, 0, 0, 0, 0);\
+}while(0);
+
+#define IX_QMGR_LOG_WARNING2(string, arg1, arg2) do\
+{\
+ ixOsalLog(IX_OSAL_LOG_LVL_WARNING, IX_OSAL_LOG_DEV_STDOUT, string, (int)arg1, (int)arg2, 0, 0, 0, 0);\
+}while(0);
+
+#define IX_QMGR_LOG_ERROR0(string) do\
+{\
+ ixOsalLog(IX_OSAL_LOG_LVL_ERROR, IX_OSAL_LOG_DEV_STDERR, string, 0, 0, 0, 0, 0, 0);\
+}while(0);
+
+#define IX_QMGR_LOG_ERROR1(string, arg1) do\
+{\
+ ixOsalLog(IX_OSAL_LOG_LVL_ERROR, IX_OSAL_LOG_DEV_STDERR, string, (int)arg1, 0, 0, 0, 0, 0);\
+}while(0);
+
+#define IX_QMGR_LOG_ERROR2(string, arg1, arg2) do\
+{\
+ ixOsalLog(IX_OSAL_LOG_LVL_ERROR, IX_OSAL_LOG_DEV_STDERR, string, (int)arg1, (int)arg2, 0, 0, 0, 0);\
+}while(0);
+
+#define IX_QMGR_LOG_ERROR3(string, arg1, arg2, arg3) do\
+{\
+ ixOsalLog(IX_OSAL_LOG_LVL_ERROR, IX_OSAL_LOG_DEV_STDERR, string, (int)arg1, (int)arg2, (int)arg3, 0, 0, 0);\
+}while(0);
+#endif /* IX_QMGRLOG_P_H */
+
+
+
+
diff --git a/cpu/ixp/npe/include/IxQMgrQAccess_p.h b/cpu/ixp/npe/include/IxQMgrQAccess_p.h
new file mode 100644
index 0000000000..8612670a17
--- /dev/null
+++ b/cpu/ixp/npe/include/IxQMgrQAccess_p.h
@@ -0,0 +1,96 @@
+/**
+ * @file IxQMgrQAccess_p.h
+ *
+ * @author Intel Corporation
+ * @date 30-Oct-2001
+ *
+ * @brief QAccess private header file
+ *
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+*/
+
+#ifndef IXQMGRQACCESS_P_H
+#define IXQMGRQACCESS_P_H
+
+/*
+ * User defined header files
+ */
+#include "IxQMgr.h"
+
+/*
+ * Global variables declarations.
+ */
+extern volatile UINT32 * ixQMgrAqmIfQueAccRegAddr[];
+
+/*
+ * Initialise the Queue Access component
+ */
+void
+ixQMgrQAccessInit (void);
+
+/*
+ * read the remainder of a multi-word queue entry
+ * (the first word is already read)
+ */
+IX_STATUS
+ixQMgrQReadMWordsMinus1 (IxQMgrQId qId,
+ UINT32 *entry);
+
+/*
+ * Fast access : pop a q entry from a single word queue
+ */
+extern __inline__ UINT32 ixQMgrQAccessPop(IxQMgrQId qId);
+
+extern __inline__ UINT32 ixQMgrQAccessPop(IxQMgrQId qId)
+{
+ return *(ixQMgrAqmIfQueAccRegAddr[qId]);
+}
+
+/*
+ * Fast access : push a q entry in a single word queue
+ */
+extern __inline__ void ixQMgrQAccessPush(IxQMgrQId qId, UINT32 entry);
+
+extern __inline__ void ixQMgrQAccessPush(IxQMgrQId qId, UINT32 entry)
+{
+ *(ixQMgrAqmIfQueAccRegAddr[qId]) = entry;
+}
+
+#endif/*IXQMGRQACCESS_P_H*/
diff --git a/cpu/ixp/npe/include/IxQMgrQCfg_p.h b/cpu/ixp/npe/include/IxQMgrQCfg_p.h
new file mode 100644
index 0000000000..c9dae1ef04
--- /dev/null
+++ b/cpu/ixp/npe/include/IxQMgrQCfg_p.h
@@ -0,0 +1,122 @@
+/**
+ * @file IxQMgrQCfg_p.h
+ *
+ * @author Intel Corporation
+ * @date 07-Feb-2002
+ *
+ * @brief This file contains the internal functions for config
+ *
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+*/
+
+#ifndef IXQMGRQCFG_P_H
+#define IXQMGRQCFG_P_H
+
+/*
+ * User defined header files
+ */
+#include "IxQMgr.h"
+
+/*
+ * Typedefs
+ */
+typedef struct
+{
+ unsigned wmSetCnt;
+
+ struct
+ {
+ char *qName;
+ BOOL isConfigured;
+ unsigned int qSizeInWords;
+ unsigned int qEntrySizeInWords;
+ unsigned int ne;
+ unsigned int nf;
+ unsigned int numEntries;
+ UINT32 baseAddress;
+ UINT32 readPtr;
+ UINT32 writePtr;
+ } qStats[IX_QMGR_MAX_NUM_QUEUES];
+
+} IxQMgrQCfgStats;
+
+/*
+ * Initialize the QCfg subcomponent
+ */
+void
+ixQMgrQCfgInit (void);
+
+/*
+ * Uninitialize the QCfg subcomponent
+ */
+void
+ixQMgrQCfgUninit (void);
+
+/*
+ * Get the Q size in words
+ */
+IxQMgrQSizeInWords
+ixQMgrQSizeInWordsGet (IxQMgrQId qId);
+
+/*
+ * Get the Q entry size in words
+ */
+IxQMgrQEntrySizeInWords
+ixQMgrQEntrySizeInWordsGet (IxQMgrQId qId);
+
+/*
+ * Get the generic cfg stats
+ */
+IxQMgrQCfgStats*
+ixQMgrQCfgStatsGet (void);
+
+/*
+ * Get queue specific stats
+ */
+IxQMgrQCfgStats*
+ixQMgrQCfgQStatsGet (IxQMgrQId qId);
+
+/*
+ * Check is the queue configured
+ */
+BOOL
+ixQMgrQIsConfigured(IxQMgrQId qId);
+
+#endif /* IX_QMGRQCFG_P_H */
diff --git a/cpu/ixp/npe/include/IxQueueAssignments.h b/cpu/ixp/npe/include/IxQueueAssignments.h
new file mode 100644
index 0000000000..0c1543fa79
--- /dev/null
+++ b/cpu/ixp/npe/include/IxQueueAssignments.h
@@ -0,0 +1,516 @@
+/**
+ * @file IxQueueAssignments.h
+ *
+ * @author Intel Corporation
+ * @date 29-Oct-2004
+ *
+ * @brief Central definition for queue assignments
+ *
+ * Design Notes:
+ * This file contains queue assignments used by Ethernet (EthAcc),
+ * HSS (HssAcc), ATM (atmdAcc) and DMA (dmaAcc) access libraries.
+ *
+ * Note: Ethernet QoS traffic class definitions are managed separately
+ * by EthDB in IxEthDBQoS.h.
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+#ifndef IxQueueAssignments_H
+#define IxQueueAssignments_H
+
+#include "IxQMgr.h"
+
+/***************************************************************************
+ * Queue assignments for ATM
+ ***************************************************************************/
+
+/**
+ * @brief Global compiler switch to select between 3 possible NPE Modes
+ * Define this macro to enable MPHY mode
+ *
+ * Default(No Switch) = MultiPHY Utopia2
+ * IX_UTOPIAMODE = 1 for single Phy Utopia1
+ * IX_MPHYSINGLEPORT = 1 for single Phy Utopia2
+ */
+#define IX_NPE_MPHYMULTIPORT 1
+#if IX_UTOPIAMODE == 1
+#undef IX_NPE_MPHYMULTIPORT
+#endif
+#if IX_MPHYSINGLEPORT == 1
+#undef IX_NPE_MPHYMULTIPORT
+#endif
+
+/**
+ * @def IX_NPE_A_TXDONE_QUEUE_HIGHWATERMARK
+ *
+ * @brief The NPE reserves the High Watermark for its operation. But it must be set by the Xscale
+ */
+#define IX_NPE_A_TXDONE_QUEUE_HIGHWATERMARK 2
+
+/**
+ * @def IX_NPE_A_QMQ_ATM_TX_DONE
+ *
+ * @brief Queue ID for ATM Transmit Done queue
+ */
+#define IX_NPE_A_QMQ_ATM_TX_DONE IX_QMGR_QUEUE_1
+
+/**
+ * @def IX_NPE_A_QMQ_ATM_TX0
+ *
+ * @brief Queue ID for ATM transmit Queue in a single phy configuration
+ */
+#define IX_NPE_A_QMQ_ATM_TX0 IX_QMGR_QUEUE_2
+
+
+/**
+ * @def IX_NPE_A_QMQ_ATM_TXID_MIN
+ *
+ * @brief Queue Manager Queue ID for ATM transmit Queue with minimum number of queue
+ *
+ */
+
+/**
+ * @def IX_NPE_A_QMQ_ATM_TXID_MAX
+ *
+ * @brief Queue Manager Queue ID for ATM transmit Queue with maximum number of queue
+ *
+ */
+
+/**
+ * @def IX_NPE_A_QMQ_ATM_RX_HI
+ *
+ * @brief Queue Manager Queue ID for ATM Receive high Queue
+ *
+ */
+
+/**
+ * @def IX_NPE_A_QMQ_ATM_RX_LO
+ *
+ * @brief Queue Manager Queue ID for ATM Receive low Queue
+ */
+
+#ifdef IX_NPE_MPHYMULTIPORT
+/**
+ * @def IX_NPE_A_QMQ_ATM_TX1
+ *
+ * @brief Queue ID for ATM transmit Queue Multiphy from 1 to 11
+ */
+#define IX_NPE_A_QMQ_ATM_TX1 IX_NPE_A_QMQ_ATM_TX0+1
+#define IX_NPE_A_QMQ_ATM_TX2 IX_NPE_A_QMQ_ATM_TX1+1
+#define IX_NPE_A_QMQ_ATM_TX3 IX_NPE_A_QMQ_ATM_TX2+1
+#define IX_NPE_A_QMQ_ATM_TX4 IX_NPE_A_QMQ_ATM_TX3+1
+#define IX_NPE_A_QMQ_ATM_TX5 IX_NPE_A_QMQ_ATM_TX4+1
+#define IX_NPE_A_QMQ_ATM_TX6 IX_NPE_A_QMQ_ATM_TX5+1
+#define IX_NPE_A_QMQ_ATM_TX7 IX_NPE_A_QMQ_ATM_TX6+1
+#define IX_NPE_A_QMQ_ATM_TX8 IX_NPE_A_QMQ_ATM_TX7+1
+#define IX_NPE_A_QMQ_ATM_TX9 IX_NPE_A_QMQ_ATM_TX8+1
+#define IX_NPE_A_QMQ_ATM_TX10 IX_NPE_A_QMQ_ATM_TX9+1
+#define IX_NPE_A_QMQ_ATM_TX11 IX_NPE_A_QMQ_ATM_TX10+1
+#define IX_NPE_A_QMQ_ATM_TXID_MIN IX_NPE_A_QMQ_ATM_TX0
+#define IX_NPE_A_QMQ_ATM_TXID_MAX IX_NPE_A_QMQ_ATM_TX11
+#define IX_NPE_A_QMQ_ATM_RX_HI IX_QMGR_QUEUE_21
+#define IX_NPE_A_QMQ_ATM_RX_LO IX_QMGR_QUEUE_22
+#else
+#define IX_NPE_A_QMQ_ATM_TXID_MIN IX_NPE_A_QMQ_ATM_TX0
+#define IX_NPE_A_QMQ_ATM_TXID_MAX IX_NPE_A_QMQ_ATM_TX0
+#define IX_NPE_A_QMQ_ATM_RX_HI IX_QMGR_QUEUE_10
+#define IX_NPE_A_QMQ_ATM_RX_LO IX_QMGR_QUEUE_11
+#endif /* MPHY */
+
+/**
+ * @def IX_NPE_A_QMQ_ATM_FREE_VC0
+ *
+ * @brief Hardware QMgr Queue ID for ATM Free VC Queue.
+ *
+ * There are 32 Hardware QMgr Queue ID; from IX_NPE_A_QMQ_ATM_FREE_VC1 to
+ * IX_NPE_A_QMQ_ATM_FREE_VC30
+ */
+#define IX_NPE_A_QMQ_ATM_FREE_VC0 IX_QMGR_QUEUE_32
+#define IX_NPE_A_QMQ_ATM_FREE_VC1 IX_NPE_A_QMQ_ATM_FREE_VC0+1
+#define IX_NPE_A_QMQ_ATM_FREE_VC2 IX_NPE_A_QMQ_ATM_FREE_VC1+1
+#define IX_NPE_A_QMQ_ATM_FREE_VC3 IX_NPE_A_QMQ_ATM_FREE_VC2+1
+#define IX_NPE_A_QMQ_ATM_FREE_VC4 IX_NPE_A_QMQ_ATM_FREE_VC3+1
+#define IX_NPE_A_QMQ_ATM_FREE_VC5 IX_NPE_A_QMQ_ATM_FREE_VC4+1
+#define IX_NPE_A_QMQ_ATM_FREE_VC6 IX_NPE_A_QMQ_ATM_FREE_VC5+1
+#define IX_NPE_A_QMQ_ATM_FREE_VC7 IX_NPE_A_QMQ_ATM_FREE_VC6+1
+#define IX_NPE_A_QMQ_ATM_FREE_VC8 IX_NPE_A_QMQ_ATM_FREE_VC7+1
+#define IX_NPE_A_QMQ_ATM_FREE_VC9 IX_NPE_A_QMQ_ATM_FREE_VC8+1
+#define IX_NPE_A_QMQ_ATM_FREE_VC10 IX_NPE_A_QMQ_ATM_FREE_VC9+1
+#define IX_NPE_A_QMQ_ATM_FREE_VC11 IX_NPE_A_QMQ_ATM_FREE_VC10+1
+#define IX_NPE_A_QMQ_ATM_FREE_VC12 IX_NPE_A_QMQ_ATM_FREE_VC11+1
+#define IX_NPE_A_QMQ_ATM_FREE_VC13 IX_NPE_A_QMQ_ATM_FREE_VC12+1
+#define IX_NPE_A_QMQ_ATM_FREE_VC14 IX_NPE_A_QMQ_ATM_FREE_VC13+1
+#define IX_NPE_A_QMQ_ATM_FREE_VC15 IX_NPE_A_QMQ_ATM_FREE_VC14+1
+#define IX_NPE_A_QMQ_ATM_FREE_VC16 IX_NPE_A_QMQ_ATM_FREE_VC15+1
+#define IX_NPE_A_QMQ_ATM_FREE_VC17 IX_NPE_A_QMQ_ATM_FREE_VC16+1
+#define IX_NPE_A_QMQ_ATM_FREE_VC18 IX_NPE_A_QMQ_ATM_FREE_VC17+1
+#define IX_NPE_A_QMQ_ATM_FREE_VC19 IX_NPE_A_QMQ_ATM_FREE_VC18+1
+#define IX_NPE_A_QMQ_ATM_FREE_VC20 IX_NPE_A_QMQ_ATM_FREE_VC19+1
+#define IX_NPE_A_QMQ_ATM_FREE_VC21 IX_NPE_A_QMQ_ATM_FREE_VC20+1
+#define IX_NPE_A_QMQ_ATM_FREE_VC22 IX_NPE_A_QMQ_ATM_FREE_VC21+1
+#define IX_NPE_A_QMQ_ATM_FREE_VC23 IX_NPE_A_QMQ_ATM_FREE_VC22+1
+#define IX_NPE_A_QMQ_ATM_FREE_VC24 IX_NPE_A_QMQ_ATM_FREE_VC23+1
+#define IX_NPE_A_QMQ_ATM_FREE_VC25 IX_NPE_A_QMQ_ATM_FREE_VC24+1
+#define IX_NPE_A_QMQ_ATM_FREE_VC26 IX_NPE_A_QMQ_ATM_FREE_VC25+1
+#define IX_NPE_A_QMQ_ATM_FREE_VC27 IX_NPE_A_QMQ_ATM_FREE_VC26+1
+#define IX_NPE_A_QMQ_ATM_FREE_VC28 IX_NPE_A_QMQ_ATM_FREE_VC27+1
+#define IX_NPE_A_QMQ_ATM_FREE_VC29 IX_NPE_A_QMQ_ATM_FREE_VC28+1
+#define IX_NPE_A_QMQ_ATM_FREE_VC30 IX_NPE_A_QMQ_ATM_FREE_VC29+1
+#define IX_NPE_A_QMQ_ATM_FREE_VC31 IX_NPE_A_QMQ_ATM_FREE_VC30+1
+
+/**
+ * @def IX_NPE_A_QMQ_ATM_RXFREE_MIN
+ *
+ * @brief The minimum queue ID for FreeVC queue
+ */
+#define IX_NPE_A_QMQ_ATM_RXFREE_MIN IX_NPE_A_QMQ_ATM_FREE_VC0
+
+/**
+ * @def IX_NPE_A_QMQ_ATM_RXFREE_MAX
+ *
+ * @brief The maximum queue ID for FreeVC queue
+ */
+#define IX_NPE_A_QMQ_ATM_RXFREE_MAX IX_NPE_A_QMQ_ATM_FREE_VC31
+
+/**
+ * @def IX_NPE_A_QMQ_OAM_FREE_VC
+ * @brief OAM Rx Free queue ID
+ */
+#ifdef IX_NPE_MPHYMULTIPORT
+#define IX_NPE_A_QMQ_OAM_FREE_VC IX_QMGR_QUEUE_14
+#else
+#define IX_NPE_A_QMQ_OAM_FREE_VC IX_QMGR_QUEUE_3
+#endif /* MPHY */
+
+/****************************************************************************
+ * Queue assignments for HSS
+ ****************************************************************************/
+
+/**** HSS Port 0 ****/
+
+/**
+ * @def IX_NPE_A_QMQ_HSS0_CHL_RX_TRIG
+ *
+ * @brief Hardware QMgr Queue ID for HSS Port 0 Channelized Receive trigger
+ */
+#define IX_NPE_A_QMQ_HSS0_CHL_RX_TRIG IX_QMGR_QUEUE_12
+
+/**
+ * @def IX_NPE_A_QMQ_HSS0_PKT_RX
+ *
+ * @brief Hardware QMgr Queue ID for HSS Port 0 Packetized Receive
+ */
+#define IX_NPE_A_QMQ_HSS0_PKT_RX IX_QMGR_QUEUE_13
+
+/**
+ * @def IX_NPE_A_QMQ_HSS0_PKT_TX0
+ *
+ * @brief Hardware QMgr Queue ID for HSS Port 0 Packetized Transmit queue 0
+ */
+#define IX_NPE_A_QMQ_HSS0_PKT_TX0 IX_QMGR_QUEUE_14
+
+/**
+ * @def IX_NPE_A_QMQ_HSS0_PKT_TX1
+ *
+ * @brief Hardware QMgr Queue ID for HSS Port 0 Packetized Transmit queue 1
+ */
+#define IX_NPE_A_QMQ_HSS0_PKT_TX1 IX_QMGR_QUEUE_15
+
+/**
+ * @def IX_NPE_A_QMQ_HSS0_PKT_TX2
+ *
+ * @brief Hardware QMgr Queue ID for HSS Port 0 Packetized Transmit queue 2
+ */
+#define IX_NPE_A_QMQ_HSS0_PKT_TX2 IX_QMGR_QUEUE_16
+
+/**
+ * @def IX_NPE_A_QMQ_HSS0_PKT_TX3
+ *
+ * @brief Hardware QMgr Queue ID for HSS Port 0 Packetized Transmit queue 3
+ */
+#define IX_NPE_A_QMQ_HSS0_PKT_TX3 IX_QMGR_QUEUE_17
+
+/**
+ * @def IX_NPE_A_QMQ_HSS0_PKT_RX_FREE0
+ *
+ * @brief Hardware QMgr Queue ID for HSS Port 0 Packetized Receive Free queue 0
+ */
+#define IX_NPE_A_QMQ_HSS0_PKT_RX_FREE0 IX_QMGR_QUEUE_18
+
+/**
+ * @def IX_NPE_A_QMQ_HSS0_PKT_RX_FREE1
+ *
+ * @brief Hardware QMgr Queue ID for HSS Port 0 Packetized Receive Free queue 1
+ */
+#define IX_NPE_A_QMQ_HSS0_PKT_RX_FREE1 IX_QMGR_QUEUE_19
+
+/**
+ * @def IX_NPE_A_QMQ_HSS0_PKT_RX_FREE2
+ *
+ * @brief Hardware QMgr Queue ID for HSS Port 0 Packetized Receive Free queue 2
+ */
+#define IX_NPE_A_QMQ_HSS0_PKT_RX_FREE2 IX_QMGR_QUEUE_20
+
+/**
+ * @def IX_NPE_A_QMQ_HSS0_PKT_RX_FREE3
+ *
+ * @brief Hardware QMgr Queue ID for HSS Port 0 Packetized Receive Free queue 3
+ */
+#define IX_NPE_A_QMQ_HSS0_PKT_RX_FREE3 IX_QMGR_QUEUE_21
+
+/**
+ * @def IX_NPE_A_QMQ_HSS0_PKT_TX_DONE
+ *
+ * @brief Hardware QMgr Queue ID for HSS Port 0 Packetized Transmit Done queue
+ */
+#define IX_NPE_A_QMQ_HSS0_PKT_TX_DONE IX_QMGR_QUEUE_22
+
+/**** HSS Port 1 ****/
+
+/**
+ * @def IX_NPE_A_QMQ_HSS1_CHL_RX_TRIG
+ *
+ * @brief Hardware QMgr Queue ID for HSS Port 1 Channelized Receive trigger
+ */
+#define IX_NPE_A_QMQ_HSS1_CHL_RX_TRIG IX_QMGR_QUEUE_10
+
+/**
+ * @def IX_NPE_A_QMQ_HSS1_PKT_RX
+ *
+ * @brief Hardware QMgr Queue ID for HSS Port 1 Packetized Receive
+ */
+#define IX_NPE_A_QMQ_HSS1_PKT_RX IX_QMGR_QUEUE_0
+
+/**
+ * @def IX_NPE_A_QMQ_HSS1_PKT_TX0
+ *
+ * @brief Hardware QMgr Queue ID for HSS Port 1 Packetized Transmit queue 0
+ */
+#define IX_NPE_A_QMQ_HSS1_PKT_TX0 IX_QMGR_QUEUE_5
+
+/**
+ * @def IX_NPE_A_QMQ_HSS1_PKT_TX1
+ *
+ * @brief Hardware QMgr Queue ID for HSS Port 1 Packetized Transmit queue 1
+ */
+#define IX_NPE_A_QMQ_HSS1_PKT_TX1 IX_QMGR_QUEUE_6
+
+/**
+ * @def IX_NPE_A_QMQ_HSS1_PKT_TX2
+ *
+ * @brief Hardware QMgr Queue ID for HSS Port 1 Packetized Transmit queue 2
+ */
+#define IX_NPE_A_QMQ_HSS1_PKT_TX2 IX_QMGR_QUEUE_7
+
+/**
+ * @def IX_NPE_A_QMQ_HSS1_PKT_TX3
+ *
+ * @brief Hardware QMgr Queue ID for HSS Port 1 Packetized Transmit queue 3
+ */
+#define IX_NPE_A_QMQ_HSS1_PKT_TX3 IX_QMGR_QUEUE_8
+
+/**
+ * @def IX_NPE_A_QMQ_HSS1_PKT_RX_FREE0
+ *
+ * @brief Hardware QMgr Queue ID for HSS Port 1 Packetized Receive Free queue 0
+ */
+#define IX_NPE_A_QMQ_HSS1_PKT_RX_FREE0 IX_QMGR_QUEUE_1
+
+/**
+ * @def IX_NPE_A_QMQ_HSS1_PKT_RX_FREE1
+ *
+ * @brief Hardware QMgr Queue ID for HSS Port 1 Packetized Receive Free queue 1
+ */
+#define IX_NPE_A_QMQ_HSS1_PKT_RX_FREE1 IX_QMGR_QUEUE_2
+
+/**
+ * @def IX_NPE_A_QMQ_HSS1_PKT_RX_FREE2
+ *
+ * @brief Hardware QMgr Queue ID for HSS Port 1 Packetized Receive Free queue 2
+ */
+#define IX_NPE_A_QMQ_HSS1_PKT_RX_FREE2 IX_QMGR_QUEUE_3
+
+/**
+ * @def IX_NPE_A_QMQ_HSS1_PKT_RX_FREE3
+ *
+ * @brief Hardware QMgr Queue ID for HSS Port 1 Packetized Receive Free queue 3
+ */
+#define IX_NPE_A_QMQ_HSS1_PKT_RX_FREE3 IX_QMGR_QUEUE_4
+
+/**
+ * @def IX_NPE_A_QMQ_HSS1_PKT_TX_DONE
+ *
+ * @brief Hardware QMgr Queue ID for HSS Port 1 Packetized Transmit Done queue
+ */
+#define IX_NPE_A_QMQ_HSS1_PKT_TX_DONE IX_QMGR_QUEUE_9
+
+/*****************************************************************************************
+ * Queue assignments for DMA
+ *****************************************************************************************/
+
+#define IX_DMA_NPE_A_REQUEST_QID IX_QMGR_QUEUE_19 /**< Queue Id for NPE A DMA Request */
+#define IX_DMA_NPE_A_DONE_QID IX_QMGR_QUEUE_20 /**< Queue Id for NPE A DMA Done */
+#define IX_DMA_NPE_B_REQUEST_QID IX_QMGR_QUEUE_24 /**< Queue Id for NPE B DMA Request */
+#define IX_DMA_NPE_B_DONE_QID IX_QMGR_QUEUE_26 /**< Queue Id for NPE B DMA Done */
+#define IX_DMA_NPE_C_REQUEST_QID IX_QMGR_QUEUE_25 /**< Queue Id for NPE C DMA Request */
+#define IX_DMA_NPE_C_DONE_QID IX_QMGR_QUEUE_27 /**< Queue Id for NPE C DMA Done */
+
+
+/*****************************************************************************************
+ * Queue assignments for Ethernet
+ *
+ * Note: Rx queue definitions, which include QoS traffic class definitions
+ * are managed by EthDB and declared in IxEthDBQoS.h
+ *****************************************************************************************/
+
+/**
+*
+* @def IX_ETH_ACC_RX_FRAME_ETH_Q
+*
+* @brief Eth0/Eth1 NPE Frame Recieve Q.
+*
+* @note THIS IS NOT USED - the Rx queues are read from EthDB QoS configuration
+*
+*/
+#define IX_ETH_ACC_RX_FRAME_ETH_Q (IX_QMGR_QUEUE_4)
+
+/**
+*
+* @def IX_ETH_ACC_RX_FREE_BUFF_ENET0_Q
+*
+* @brief Supply Rx Buffers Ethernet Q for NPEB - Eth 0 - Port 1
+*
+*/
+#define IX_ETH_ACC_RX_FREE_BUFF_ENET0_Q (IX_QMGR_QUEUE_27)
+
+/**
+*
+* @def IX_ETH_ACC_RX_FREE_BUFF_ENET1_Q
+*
+* @brief Supply Rx Buffers Ethernet Q for NPEC - Eth 1 - Port 2
+*
+*/
+#define IX_ETH_ACC_RX_FREE_BUFF_ENET1_Q (IX_QMGR_QUEUE_28)
+
+/**
+*
+* @def IX_ETH_ACC_RX_FREE_BUFF_ENET2_Q
+*
+* @brief Supply Rx Buffers Ethernet Q for NPEA - Eth 2 - Port 3
+*
+*/
+#define IX_ETH_ACC_RX_FREE_BUFF_ENET2_Q (IX_QMGR_QUEUE_26)
+
+
+/**
+*
+* @def IX_ETH_ACC_TX_FRAME_ENET0_Q
+*
+* @brief Submit frame Q for NPEB Eth 0 - Port 1
+*
+*/
+#define IX_ETH_ACC_TX_FRAME_ENET0_Q (IX_QMGR_QUEUE_24)
+
+
+/**
+*
+* @def IX_ETH_ACC_TX_FRAME_ENET1_Q
+*
+* @brief Submit frame Q for NPEC Eth 1 - Port 2
+*
+*/
+#define IX_ETH_ACC_TX_FRAME_ENET1_Q (IX_QMGR_QUEUE_25)
+
+/**
+*
+* @def IX_ETH_ACC_TX_FRAME_ENET2_Q
+*
+* @brief Submit frame Q for NPEA Eth 2 - Port 3
+*
+*/
+#define IX_ETH_ACC_TX_FRAME_ENET2_Q (IX_QMGR_QUEUE_23)
+
+/**
+*
+* @def IX_ETH_ACC_TX_FRAME_DONE_ETH_Q
+*
+* @brief Transmit complete Q for NPE Eth 0/1, Port 1&2
+*
+*/
+#define IX_ETH_ACC_TX_FRAME_DONE_ETH_Q (IX_QMGR_QUEUE_31)
+
+/*****************************************************************************************
+ * Queue assignments for Crypto
+ *****************************************************************************************/
+
+/** Crypto Service Request Queue */
+#define IX_CRYPTO_ACC_CRYPTO_REQ_Q (IX_QMGR_QUEUE_29)
+
+/** Crypto Service Done Queue */
+#define IX_CRYPTO_ACC_CRYPTO_DONE_Q (IX_QMGR_QUEUE_30)
+
+/** Crypto Req Q CB tag */
+#define IX_CRYPTO_ACC_CRYPTO_REQ_Q_CB_TAG (0)
+
+/** Crypto Done Q CB tag */
+#define IX_CRYPTO_ACC_CRYPTO_DONE_Q_CB_TAG (1)
+
+/** WEP Service Request Queue */
+#define IX_CRYPTO_ACC_WEP_REQ_Q (IX_QMGR_QUEUE_21)
+
+/** WEP Service Done Queue */
+#define IX_CRYPTO_ACC_WEP_DONE_Q (IX_QMGR_QUEUE_22)
+
+/** WEP Req Q CB tag */
+#define IX_CRYPTO_ACC_WEP_REQ_Q_CB_TAG (2)
+
+/** WEP Done Q CB tag */
+#define IX_CRYPTO_ACC_WEP_DONE_Q_CB_TAG (3)
+
+/** Number of queues allocate to crypto hardware accelerator services */
+#define IX_CRYPTO_ACC_NUM_OF_CRYPTO_Q (2)
+
+/** Number of queues allocate to WEP NPE services */
+#define IX_CRYPTO_ACC_NUM_OF_WEP_NPE_Q (2)
+
+/** Number of queues allocate to CryptoAcc component */
+#define IX_CRYPTO_ACC_NUM_OF_Q (IX_CRYPTO_ACC_NUM_OF_CRYPTO_Q + IX_CRYPTO_ACC_NUM_OF_WEP_NPE_Q)
+
+#endif /* IxQueueAssignments_H */
diff --git a/cpu/ixp/npe/include/IxSspAcc.h b/cpu/ixp/npe/include/IxSspAcc.h
new file mode 100644
index 0000000000..35e7abf06f
--- /dev/null
+++ b/cpu/ixp/npe/include/IxSspAcc.h
@@ -0,0 +1,1271 @@
+/**
+ * @file IxSspAcc.h
+ *
+ * @brief Header file for the IXP400 SSP Serial Port Access (IxSspAcc)
+ *
+ * @version $Revision: 0.1 $
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+/**
+ * @defgroup IxSspAcc IXP400 SSP Serial Port Access (IxSspAcc) API
+ *
+ * @brief IXP400 SSP Serial Port Access Public API
+ *
+ * @{
+ */
+#ifndef IXSSPACC_H
+#define IXSSPACC_H
+
+#ifdef __ixp46X
+
+#include "IxOsal.h"
+
+/*
+ * Section for enum
+ */
+/**
+ * @ingroup IxSspAcc
+ *
+ * @enum IxSspAccDataSize
+ *
+ * @brief The data sizes in bits that are supported by the protocol
+ */
+typedef enum
+{
+ DATA_SIZE_TOO_SMALL = 0x2,
+ DATA_SIZE_4 = 0x3,
+ DATA_SIZE_5,
+ DATA_SIZE_6,
+ DATA_SIZE_7,
+ DATA_SIZE_8,
+ DATA_SIZE_9,
+ DATA_SIZE_10,
+ DATA_SIZE_11,
+ DATA_SIZE_12,
+ DATA_SIZE_13,
+ DATA_SIZE_14,
+ DATA_SIZE_15,
+ DATA_SIZE_16,
+ DATA_SIZE_TOO_BIG
+} IxSspAccDataSize;
+
+/**
+ * @ingroup IxSspAcc
+ *
+ * @enum IxSspAccPortStatus
+ *
+ * @brief The status of the SSP port to be set to enable/disable
+ */
+typedef enum
+{
+ SSP_PORT_DISABLE = 0x0,
+ SSP_PORT_ENABLE,
+ INVALID_SSP_PORT_STATUS
+} IxSspAccPortStatus;
+
+/**
+ * @ingroup IxSspAcc
+ *
+ * @enum IxSspAccFrameFormat
+ *
+ * @brief The frame format that is to be used - SPI, SSP, or Microwire
+ */
+typedef enum
+{
+ SPI_FORMAT = 0x0,
+ SSP_FORMAT,
+ MICROWIRE_FORMAT,
+ INVALID_FORMAT
+} IxSspAccFrameFormat;
+
+/**
+ * @ingroup IxSspAcc
+ *
+ * @enum IxSspAccClkSource
+ *
+ * @brief The source to produce the SSP serial clock
+ */
+typedef enum
+{
+ ON_CHIP_CLK = 0x0,
+ EXTERNAL_CLK,
+ INVALID_CLK_SOURCE
+} IxSspAccClkSource;
+
+/**
+ * @ingroup IxSspAcc
+ *
+ * @enum IxSspAccSpiSclkPhase
+ *
+ * @brief The SPI SCLK Phase:
+ * 0 - SCLK is inactive one cycle at the start of a frame and 1/2 cycle at the
+ * end of a frame.
+ * 1 - SCLK is inactive 1/2 cycle at the start of a frame and one cycle at the
+ * end of a frame.
+ */
+typedef enum
+{
+ START_ONE_END_HALF = 0x0,
+ START_HALF_END_ONE,
+ INVALID_SPI_PHASE
+} IxSspAccSpiSclkPhase;
+
+/**
+ * @ingroup IxSspAcc
+ *
+ * @enum IxSspAccSpiSclkPolarity
+ *
+ * @brief The SPI SCLK Polarity can be set to either low or high.
+ */
+typedef enum
+{
+ SPI_POLARITY_LOW = 0x0,
+ SPI_POLARITY_HIGH,
+ INVALID_SPI_POLARITY
+} IxSspAccSpiSclkPolarity;
+
+/**
+ * @ingroup IxSspAcc
+ *
+ * @enum IxSspAccMicrowireCtlWord
+ *
+ * @brief The Microwire control word can be either 8 or 16 bit.
+ */
+typedef enum
+{
+ MICROWIRE_8_BIT = 0x0,
+ MICROWIRE_16_BIT,
+ INVALID_MICROWIRE_CTL_WORD
+} IxSspAccMicrowireCtlWord;
+
+/**
+ * @ingroup IxSspAcc
+ *
+ * @enum IxSspAccFifoThreshold
+ *
+ * @brief The threshold in frames (each frame is defined by IxSspAccDataSize)
+ * that can be set for the FIFO to trigger a threshold exceed when
+ * checking with the ExceedThresholdCheck functions or an interrupt
+ * when it is enabled.
+ */
+typedef enum
+{
+ FIFO_TSHLD_1 = 0x0,
+ FIFO_TSHLD_2,
+ FIFO_TSHLD_3,
+ FIFO_TSHLD_4,
+ FIFO_TSHLD_5,
+ FIFO_TSHLD_6,
+ FIFO_TSHLD_7,
+ FIFO_TSHLD_8,
+ FIFO_TSHLD_9,
+ FIFO_TSHLD_10,
+ FIFO_TSHLD_11,
+ FIFO_TSHLD_12,
+ FIFO_TSHLD_13,
+ FIFO_TSHLD_14,
+ FIFO_TSHLD_15,
+ FIFO_TSHLD_16,
+ INVALID_FIFO_TSHLD
+} IxSspAccFifoThreshold;
+
+/**
+ * @ingroup IxSspAcc
+ *
+ * @enum IX_SSP_STATUS
+ *
+ * @brief The statuses that can be returned in a SSP Serial Port Access
+ */
+typedef enum
+{
+ IX_SSP_SUCCESS = IX_SUCCESS, /**< Success status */
+ IX_SSP_FAIL, /**< Fail status */
+ IX_SSP_RX_FIFO_OVERRUN_HANDLER_MISSING, /**<
+ Rx FIFO Overrun handler is NULL. */
+ IX_SSP_RX_FIFO_HANDLER_MISSING, /**<
+ Rx FIFO threshold hit or above handler is NULL
+ */
+ IX_SSP_TX_FIFO_HANDLER_MISSING, /**<
+ Tx FIFO threshold hit or below handler is NULL
+ */
+ IX_SSP_FIFO_NOT_EMPTY_FOR_SETTING_CTL_CMD, /**<
+ Tx FIFO not empty and therefore microwire
+ control command size setting is not allowed. */
+ IX_SSP_INVALID_FRAME_FORMAT_ENUM_VALUE, /**<
+ frame format selected is invalid. */
+ IX_SSP_INVALID_DATA_SIZE_ENUM_VALUE, /**<
+ data size selected is invalid. */
+ IX_SSP_INVALID_CLOCK_SOURCE_ENUM_VALUE, /**<
+ source clock selected is invalid. */
+ IX_SSP_INVALID_TX_FIFO_THRESHOLD_ENUM_VALUE, /**<
+ Tx FIFO threshold selected is invalid. */
+ IX_SSP_INVALID_RX_FIFO_THRESHOLD_ENUM_VALUE, /**<
+ Rx FIFO threshold selected is invalid. */
+ IX_SSP_INVALID_SPI_PHASE_ENUM_VALUE, /**<
+ SPI phase selected is invalid. */
+ IX_SSP_INVALID_SPI_POLARITY_ENUM_VALUE, /**<
+ SPI polarity selected is invalid. */
+ IX_SSP_INVALID_MICROWIRE_CTL_CMD_ENUM_VALUE, /**<
+ Microwire control command selected is invalid
+ */
+ IX_SSP_INT_UNBIND_FAIL, /**< Interrupt unbind fail to unbind SSP
+ interrupt */
+ IX_SSP_INT_BIND_FAIL, /**< Interrupt bind fail during init */
+ IX_SSP_RX_FIFO_NOT_EMPTY, /**<
+ Rx FIFO not empty while trying to change data
+ size. */
+ IX_SSP_TX_FIFO_NOT_EMPTY, /**<
+ Rx FIFO not empty while trying to change data
+ size or microwire control command size. */
+ IX_SSP_POLL_MODE_BLOCKING, /**<
+ poll mode selected blocks interrupt mode from
+ being selected. */
+ IX_SSP_TX_FIFO_HIT_BELOW_THRESHOLD, /**<
+ Tx FIFO level hit or below threshold. */
+ IX_SSP_TX_FIFO_EXCEED_THRESHOLD, /**<
+ Tx FIFO level exceeded threshold. */
+ IX_SSP_RX_FIFO_HIT_ABOVE_THRESHOLD, /**<
+ Rx FIFO level hit or exceeded threshold. */
+ IX_SSP_RX_FIFO_BELOW_THRESHOLD, /**<
+ Rx FIFO level below threshold. */
+ IX_SSP_BUSY, /**< SSP is busy. */
+ IX_SSP_IDLE, /**< SSP is idle. */
+ IX_SSP_OVERRUN_OCCURRED, /**<
+ SSP has experienced an overrun. */
+ IX_SSP_NO_OVERRUN, /**<
+ SSP did not experience an overrun. */
+ IX_SSP_NOT_SUPORTED, /**< hardware does not support SSP */
+ IX_SSP_NOT_INIT, /**< SSP Access not intialized */
+ IX_SSP_NULL_POINTER /**< parameter passed in is NULL */
+} IX_SSP_STATUS;
+
+/**
+ * @ingroup IxSspAcc
+ *
+ * @brief SSP Rx FIFO Overrun handler
+ *
+ * This function is called for the client to handle Rx FIFO Overrun that occurs
+ * in the SSP hardware
+ */
+typedef void (*RxFIFOOverrunHandler)(void);
+
+/**
+ * @ingroup IxSspAcc
+ *
+ * @brief SSP Rx FIFO Threshold hit or above handler
+ *
+ * This function is called for the client to handle Rx FIFO threshold hit or
+ * or above that occurs in the SSP hardware
+ */
+typedef void (*RxFIFOThresholdHandler)(void);
+
+/**
+ * @ingroup IxSspAcc
+ *
+ * @brief SSP Tx FIFO Threshold hit or below handler
+ *
+ * This function is called for the client to handle Tx FIFO threshold hit or
+ * or below that occurs in the SSP hardware
+ */
+typedef void (*TxFIFOThresholdHandler)(void);
+
+
+/*
+ * Section for struct
+ */
+/**
+ * @ingroup IxSspAcc
+ *
+ * @brief contains all the variables required to initialize the SSP serial port
+ * hardware.
+ *
+ * Structure to be filled and used for calling initialization
+ */
+typedef struct
+{
+ IxSspAccFrameFormat FrameFormatSelected;/**<Select between SPI, SSP and
+ Microwire. */
+ IxSspAccDataSize DataSizeSelected; /**<Select between 4 and 16. */
+ IxSspAccClkSource ClkSourceSelected; /**<Select clock source to be
+ on-chip or external. */
+ IxSspAccFifoThreshold TxFIFOThresholdSelected;
+ /**<Select Tx FIFO threshold
+ between 1 to 16. */
+ IxSspAccFifoThreshold RxFIFOThresholdSelected;
+ /**<Select Rx FIFO threshold
+ between 1 to 16. */
+ BOOL RxFIFOIntrEnable; /**<Enable/disable Rx FIFO
+ threshold interrupt. Disabling
+ this interrupt will require
+ the use of the polling function
+ RxFIFOExceedThresholdCheck. */
+ BOOL TxFIFOIntrEnable; /**<Enable/disable Tx FIFO
+ threshold interrupt. Disabling
+ this interrupt will require
+ the use of the polling function
+ TxFIFOExceedThresholdCheck. */
+ RxFIFOThresholdHandler RxFIFOThsldHdlr; /**<Pointer to function to handle
+ a Rx FIFO interrupt. */
+ TxFIFOThresholdHandler TxFIFOThsldHdlr; /**<Pointer to function to handle
+ a Tx FIFO interrupt. */
+ RxFIFOOverrunHandler RxFIFOOverrunHdlr; /**<Pointer to function to handle
+ a Rx FIFO overrun interrupt. */
+ BOOL LoopbackEnable; /**<Select operation mode to be
+ normal or loopback mode. */
+ IxSspAccSpiSclkPhase SpiSclkPhaseSelected;
+ /**<Select SPI SCLK phase to start
+ with one inactive cycle and end
+ with 1/2 inactive cycle or
+ start with 1/2 inactive cycle
+ and end with one inactive
+ cycle. (Only used in
+ SPI format). */
+ IxSspAccSpiSclkPolarity SpiSclkPolaritySelected;
+ /**<Select SPI SCLK idle state
+ to be low or high. (Only used in
+ SPI format). */
+ IxSspAccMicrowireCtlWord MicrowireCtlWordSelected;
+ /**<Select Microwire control
+ format to be 8 or 16-bit. (Only
+ used in Microwire format). */
+ UINT8 SerialClkRateSelected; /**<Select between 0 (1.8432Mbps)
+ and 255 (7.2Kbps). The
+ formula used is Bit rate =
+ 3.6864x10^6 /
+ (2 x (SerialClkRateSelect + 1))
+ */
+} IxSspInitVars;
+
+/**
+ * @ingroup IxSspAcc
+ *
+ * @brief contains counters of the SSP statistics
+ *
+ * Structure contains all values of counters and associated overflows.
+ */
+typedef struct
+{
+ UINT32 ixSspRcvCounter; /**<Total frames received. */
+ UINT32 ixSspXmitCounter; /**<Total frames transmitted. */
+ UINT32 ixSspOverflowCounter;/**<Total occurrences of overflow. */
+} IxSspAccStatsCounters;
+
+
+/*
+ * Section for prototypes interface functions
+ */
+
+/**
+ * @ingroup IxSspAcc
+ *
+ * @fn ixSspAccInit (
+ IxSspInitVars *initVarsSelected);
+ *
+ * @brief Initializes the SSP Access module.
+ *
+ * @param "IxSspAccInitVars [in] *initVarsSelected" - struct containing required
+ * variables for initialization
+ *
+ * Global Data :
+ * - None.
+ *
+ * This API will initialize the SSP Serial Port hardware to the user specified
+ * configuration. Then it will enable the SSP Serial Port.
+ * *NOTE*: Once interrupt or polling mode is selected, the mode cannot be
+ * changed via the interrupt enable/disable function but the init needs to be
+ * called again to change it.
+ *
+ * @return
+ * - IX_SSP_SUCCESS - Successfully initialize and enable the SSP
+ * serial port.
+ * - IX_SSP_RX_FIFO_HANDLER_MISSING - interrupt mode is selected but RX FIFO
+ * handler pointer is NULL
+ * - IX_SSP_TX_FIFO_HANDLER_MISSING - interrupt mode is selected but TX FIFO
+ * handler pointer is NULL
+ * - IX_SSP_RX_FIFO_OVERRUN_HANDLER_MISSING - interrupt mode is selected but
+ * RX FIFO Overrun handler pointer is NULL
+ * - IX_SSP_RX_FIFO_NOT_EMPTY - Rx FIFO not empty, data size change is not
+ * allowed.
+ * - IX_SSP_TX_FIFO_NOT_EMPTY - Tx FIFO not empty, data size change is not
+ * allowed.
+ * - IX_SSP_INVALID_FRAME_FORMAT_ENUM_VALUE - frame format selected is invalid
+ * - IX_SSP_INVALID_DATA_SIZE_ENUM_VALUE - data size selected is invalid
+ * - IX_SSP_INVALID_CLOCK_SOURCE_ENUM_VALUE - clock source selected is invalid
+ * - IX_SSP_INVALID_TX_FIFO_THRESHOLD_ENUM_VALUE - Tx FIFO threshold level
+ * selected is invalid
+ * - IX_SSP_INVALID_RX_FIFO_THRESHOLD_ENUM_VALUE - Rx FIFO threshold level
+ * selected is invalid
+ * - IX_SSP_INVALID_SPI_PHASE_ENUM_VALUE - SPI phase selected is invalid
+ * - IX_SSP_INVALID_SPI_POLARITY_ENUM_VALUE - SPI polarity selected is invalid
+ * - IX_SSP_INVALID_MICROWIRE_CTL_CMD_ENUM_VALUE - microwire control command
+ * size is invalid
+ * - IX_SSP_INT_UNBIND_FAIL - interrupt handler failed to unbind SSP interrupt
+ * - IX_SSP_INT_BIND_FAIL - interrupt handler failed to bind to SSP interrupt
+ * hardware trigger
+ * - IX_SSP_NOT_SUPORTED - hardware does not support SSP
+ * - IX_SSP_NULL_POINTER - parameter passed in is NULL
+ *
+ * @li Reentrant : yes
+ * @li ISR Callable : yes
+ *
+ */
+PUBLIC IX_SSP_STATUS
+ixSspAccInit (IxSspInitVars *initVarsSelected);
+
+/**
+ * @ingroup IxSspAcc
+ *
+ * @fn ixSspAccUninit (
+ void)
+ *
+ * @brief Un-initializes the SSP Serial Port Access component
+ *
+ * @param - None
+ *
+ * Global Data :
+ * - None.
+ *
+ * This API will disable the SSP Serial Port hardware. The client can call the
+ * init function again if they wish to enable the SSP.
+ *
+ * @return
+ * - IX_SSP_SUCCESS - successfully uninit SSP component
+ * - IX_SSP_INT_UNBIND_FAIL - interrupt handler failed to unbind SSP interrupt
+ *
+ * @li Reentrant : yes
+ * @li ISR Callable : yes
+ *
+ */
+PUBLIC IX_SSP_STATUS
+ixSspAccUninit (void);
+
+/**
+ * @ingroup IxSspAcc
+ *
+ * @fn ixSspAccFIFODataSubmit (
+ UINT16 *data,
+ UINT32 amtOfData)
+ *
+ * @brief Inserts data into the SSP Serial Port's FIFO
+ *
+ * @param "UINT16 [in] *data" - pointer to the location to transmit the data
+ * from
+ * "UINT32 [in] amtOfData" - number of data to be transmitted.
+ *
+ * Global Data :
+ * - None.
+ *
+ * This API will insert the amount of data specified by "amtOfData" from buffer
+ * pointed to by "data" into the FIFO to be transmitted by the hardware.
+ *
+ * @return
+ * - IX_SSP_SUCCESS - Data inserted successfully into FIFO
+ * - IX_SSP_FAIL - FIFO insufficient space
+ * - IX_SSP_NULL_POINTER - data pointer passed by client is NULL
+ * - IX_SSP_NOT_INIT - SSP not initialized. SSP init needs to be called.
+ *
+ * @li Reentrant : yes
+ * @li ISR Callable : yes
+ *
+ */
+PUBLIC IX_SSP_STATUS
+ixSspAccFIFODataSubmit (
+ UINT16* data,
+ UINT32 amtOfData);
+
+/**
+ * @ingroup IxSspAcc
+ *
+ * @fn ixSspAccFIFODataReceive (
+ UINT16 *data,
+ UINT32 amtOfData)
+ *
+ * @brief Extract data from the SSP Serial Port's FIFO
+ *
+ * @param "UINT16 [in] *data" - pointer to the location to receive the data into
+ * "UINT32 [in] amtOfData" - number of data to be received.
+ *
+ * Global Data :
+ * - None.
+ *
+ * This API will extract the amount of data specified by "amtOfData" from the
+ * FIFO already received by the hardware into the buffer pointed to by "data".
+ *
+ * @return
+ * - IX_SSP_SUCCESS - Data extracted successfully from FIFO
+ * - IX_SSP_FAIL - FIFO has no data
+ * - IX_SSP_NULL_POINTER - data pointer passed by client is NULL
+ * - IX_SSP_NOT_INIT - SSP not initialized. SSP init needs to be called.
+ *
+ * @li Reentrant : yes
+ * @li ISR Callable : yes
+ *
+ */
+PUBLIC IX_SSP_STATUS
+ixSspAccFIFODataReceive (
+ UINT16* data,
+ UINT32 amtOfData);
+
+
+/**
+ * Polling Functions
+ */
+
+/**
+ * @ingroup IxSspAcc
+ *
+ * @fn ixSspAccTxFIFOHitOrBelowThresholdCheck (
+ void)
+ *
+ * @brief Check if the Tx FIFO threshold has been hit or fallen below.
+ *
+ * @param - None
+ *
+ * Global Data :
+ * - None.
+ *
+ * This API will return whether the Tx FIFO threshold has been exceeded or not
+ *
+ * @return
+ * - IX_SSP_TX_FIFO_HIT_BELOW_THRESHOLD - Tx FIFO level hit or below threshold .
+ * - IX_SSP_TX_FIFO_EXCEED_THRESHOLD - Tx FIFO level exceeded threshold.
+ * - IX_SSP_NOT_INIT - SSP not initialized. SSP init needs to be called.
+ *
+ * @li Reentrant : yes
+ * @li ISR Callable : yes
+ *
+ */
+PUBLIC IX_SSP_STATUS
+ixSspAccTxFIFOHitOrBelowThresholdCheck (
+ void);
+
+/**
+ * @ingroup IxSspAcc
+ *
+ * @fn ixSspAccRxFIFOHitOrAboveThresholdCheck (
+ void)
+ *
+ * @brief Check if the Rx FIFO threshold has been hit or exceeded.
+ *
+ * @param - None
+ *
+ * Global Data :
+ * - None.
+ *
+ * This API will return whether the Rx FIFO level is below threshold or not
+ *
+ * @return
+ * - IX_SSP_RX_FIFO_HIT_ABOVE_THRESHOLD - Rx FIFO level hit or exceeded threshold
+ * - IX_SSP_RX_FIFO_BELOW_THRESHOLD - Rx FIFO level below threshold
+ * - IX_SSP_NOT_INIT - SSP not initialized. SSP init needs to be called.
+ *
+ * @li Reentrant : yes
+ * @li ISR Callable : yes
+ *
+ */
+PUBLIC IX_SSP_STATUS
+ixSspAccRxFIFOHitOrAboveThresholdCheck (
+ void);
+
+
+/**
+ * Configuration functions
+ *
+ * NOTE: These configurations are not required to be called once init is called
+ * unless configurations need to be changed on the fly.
+ */
+
+/**
+ * @ingroup IxSspAcc
+ *
+ * @fn ixSspAccSSPPortStatusSet (
+ IxSspAccPortStatus portStatusSelected)
+ *
+ * @brief Enables/disables the SSP Serial Port hardware.
+ *
+ * @param "IxSspAccPortStatus [in] portStatusSelected" - Set the SSP port to
+ * enable or disable
+ *
+ * Global Data :
+ * - None.
+ *
+ * This API will enable/disable the SSP Serial Port hardware.
+ * NOTE: This function is called by init to enable the SSP after setting up the
+ * configurations and by uninit to disable the SSP.
+ *
+ * @return
+ * - IX_SSP_SUCCESS - Port status set with valid enum value
+ * - IX_SSP_FAIL - invalid enum value
+ * - IX_SSP_NOT_INIT - SSP not initialized. SSP init needs to be called.
+ *
+ * @li Reentrant : yes
+ * @li ISR Callable : yes
+ *
+ */
+PUBLIC IX_SSP_STATUS
+ixSspAccSSPPortStatusSet (
+ IxSspAccPortStatus portStatusSelected);
+
+/**
+ * @ingroup IxSspAcc
+ *
+ * @fn ixSspAccFrameFormatSelect (
+ IxSspAccFrameFormat frameFormatSelected)
+ *
+ * @brief Sets the frame format for the SSP Serial Port hardware
+ *
+ * @param "IxSspAccFrameFormat [in] frameFormatSelected" - The frame format of
+ * SPI, SSP or Microwire can be selected as the format
+ *
+ * Global Data :
+ * - None.
+ *
+ * This API will set the format for the transfers via user input.
+ * *NOTE*: The SSP hardware will be disabled to clear the FIFOs. Then its
+ * previous state (enabled/disabled) restored after changing the format.
+ *
+ * @return
+ * - IX_SSP_SUCCESS - frame format set with valid enum value
+ * - IX_SSP_INVALID_FRAME_FORMAT_ENUM_VALUE - invalid frame format value
+ * - IX_SSP_NOT_INIT - SSP not initialized. SSP init needs to be called.
+ *
+ * @li Reentrant : yes
+ * @li ISR Callable : yes
+ *
+ */
+PUBLIC IX_SSP_STATUS
+ixSspAccFrameFormatSelect (
+ IxSspAccFrameFormat frameFormatSelected);
+
+/**
+ * @ingroup IxSspAcc
+ *
+ * @fn ixSspAccDataSizeSelect (
+ IxSspAccDataSize dataSizeSelected)
+ *
+ * @brief Sets the data size for transfers
+ *
+ * @param "IxSspAccDataSize [in] dataSizeSelected" - The data size between 4
+ * and 16 that can be selected for data transfers
+ *
+ * Global Data :
+ * - None.
+ *
+ * This API will set the data size for the transfers via user input. It will
+ * disallow the change of the data size if either of the Rx/Tx FIFO is not
+ * empty to prevent data loss.
+ * *NOTE*: The SSP port will be disabled if the FIFOs are found to be empty and
+ * if between the check and disabling of the SSP (which clears the
+ * FIFOs) data is received into the FIFO, it might be lost.
+ * *NOTE*: The FIFOs can be cleared by disabling the SSP Port if necessary to
+ * force the data size change.
+ *
+ * @return
+ * - IX_SSP_SUCCESS - data size set with valid enum value
+ * - IX_SSP_RX_FIFO_NOT_EMPTY - Rx FIFO not empty, data size change is not
+ * allowed.
+ * - IX_SSP_TX_FIFO_NOT_EMPTY - Tx FIFO not empty, data size change is not
+ * allowed.
+ * - IX_SSP_INVALID_DATA_SIZE_ENUM_VALUE - invalid enum value
+ * - IX_SSP_NOT_INIT - SSP not initialized. SSP init needs to be called.
+ *
+ * @li Reentrant : yes
+ * @li ISR Callable : yes
+ *
+ */
+PUBLIC IX_SSP_STATUS
+ixSspAccDataSizeSelect (
+ IxSspAccDataSize dataSizeSelected);
+
+/**
+ * @ingroup IxSspAcc
+ *
+ * @fn ixSspAccClockSourceSelect(
+ IxSspAccClkSource clkSourceSelected)
+ *
+ * @brief Sets the clock source of the SSP Serial Port hardware
+ *
+ * @param "IxSspAccClkSource [in] clkSourceSelected" - The clock source from
+ * either external source on on-chip can be selected as the source
+ *
+ * Global Data :
+ * - None.
+ *
+ * This API will set the clock source for the transfers via user input.
+ *
+ * @return
+ * - IX_SSP_SUCCESS - clock source set with valid enum value
+ * - IX_SSP_INVALID_CLOCK_SOURCE_ENUM_VALUE - invalid enum value
+ * - IX_SSP_NOT_INIT - SSP not initialized. SSP init needs to be called.
+ *
+ * @li Reentrant : yes
+ * @li ISR Callable : yes
+ *
+ */
+PUBLIC IX_SSP_STATUS
+ixSspAccClockSourceSelect (
+ IxSspAccClkSource clkSourceSelected);
+
+/**
+ * @ingroup IxSspAcc
+ *
+ * @fn ixSspAccSerialClockRateConfigure (
+ UINT8 serialClockRateSelected)
+ *
+ * @brief Sets the on-chip Serial Clock Rate of the SSP Serial Port hardware.
+ *
+ * @param "UINT8 [in] serialClockRateSelected" - The serial clock rate that can
+ * be set is between 7.2Kbps and 1.8432Mbps. The formula used is
+ * Bit rate = 3.6864x10^6 / (2 x (SerialClockRateSelected + 1))
+ *
+ * Global Data :
+ * - None.
+ *
+ * This API will set the serial clock rate for the transfers via user input.
+ *
+ * @return
+ * - IX_SSP_SUCCESS - Serial clock rate configured successfully
+ * - IX_SSP_NOT_INIT - SSP not initialized. SSP init needs to be called.
+ *
+ * @li Reentrant : yes
+ * @li ISR Callable : yes
+ *
+ */
+PUBLIC IX_SSP_STATUS
+ixSspAccSerialClockRateConfigure (
+ UINT8 serialClockRateSelected);
+
+/**
+ * @ingroup IxSspAcc
+ *
+ * @fn ixSspAccRxFIFOIntEnable (
+ RxFIFOThresholdHandler rxFIFOIntrHandler)
+ *
+ * @brief Enables service request interrupt whenever the Rx FIFO hits its
+ * threshold
+ *
+ * @param "void [in] *rxFIFOIntrHandler(UINT32)" - function pointer to the
+ * interrupt handler for the Rx FIFO exceeded.
+ *
+ * Global Data :
+ * - None.
+ *
+ * This API will enable the service request interrupt for the Rx FIFO
+ *
+ * @return
+ * - IX_SSP_SUCCESS - Rx FIFO level interrupt enabled successfully
+ * - IX_SSP_RX_FIFO_HANDLER_MISSING - missing handler for Rx FIFO level interrupt
+ * - IX_SSP_POLL_MODE_BLOCKING - poll mode is selected at init, interrupt not
+ * allowed to be enabled. Use init to enable interrupt mode.
+ * - IX_SSP_NOT_INIT - SSP not initialized. SSP init needs to be called.
+ *
+ * @li Reentrant : yes
+ * @li ISR Callable : yes
+ *
+ */
+PUBLIC IX_SSP_STATUS
+ixSspAccRxFIFOIntEnable (
+ RxFIFOThresholdHandler rxFIFOIntrHandler);
+
+/**
+ * @ingroup IxSspAcc
+ *
+ * @fn ixSspAccRxFIFOIntDisable (
+ void)
+ *
+ * @brief Disables service request interrupt of the Rx FIFO.
+ *
+ * @param - None
+ *
+ * Global Data :
+ * - None.
+ *
+ * This API will disable the service request interrupt of the Rx FIFO.
+ *
+ * @return
+ * - IX_SSP_SUCCESS - Rx FIFO Interrupt disabled successfully
+ * - IX_SSP_NOT_INIT - SSP not initialized. SSP init needs to be called.
+ *
+ * @li Reentrant : yes
+ * @li ISR Callable : yes
+ *
+ */
+PUBLIC IX_SSP_STATUS
+ixSspAccRxFIFOIntDisable (
+ void);
+
+/**
+ * @ingroup IxSspAcc
+ *
+ * @fn ixSspAccTxFIFOIntEnable (
+ TxFIFOThresholdHandler txFIFOIntrHandler)
+ *
+ * @brief Enables service request interrupt of the Tx FIFO.
+ *
+ * @param "void [in] *txFIFOIntrHandler(UINT32)" - function pointer to the
+ * interrupt handler for the Tx FIFO exceeded.
+ *
+ * Global Data :
+ * - None.
+ *
+ * This API will enable the service request interrupt of the Tx FIFO.
+ *
+ * @return
+ * - IX_SSP_SUCCESS - Tx FIFO level interrupt enabled successfully
+ * - IX_SSP_TX_FIFO_HANDLER_MISSING - missing handler for Tx FIFO level interrupt
+ * - IX_SSP_POLL_MODE_BLOCKING - poll mode is selected at init, interrupt not
+ * allowed to be enabled. Use init to enable interrupt mode.
+ * - IX_SSP_NOT_INIT - SSP not initialized. SSP init needs to be called.
+ *
+ * @li Reentrant : yes
+ * @li ISR Callable : yes
+ *
+ */
+PUBLIC IX_SSP_STATUS
+ixSspAccTxFIFOIntEnable (
+ TxFIFOThresholdHandler txFIFOIntrHandler);
+
+/**
+ * @ingroup IxSspAcc
+ *
+ * @fn ixSspAccTxFIFOIntDisable (
+ void)
+ *
+ * @brief Disables service request interrupt of the Tx FIFO
+ *
+ * @param - None
+ *
+ * Global Data :
+ * - None.
+ *
+ * This API will disable the service request interrupt of the Tx FIFO
+ *
+ * @return
+ * - IX_SSP_SUCCESS - Tx FIFO Interrupt disabled successfuly.
+ * - IX_SSP_NOT_INIT - SSP not initialized. SSP init needs to be called.
+ *
+ * @li Reentrant : yes
+ * @li ISR Callable : yes
+ *
+ */
+PUBLIC IX_SSP_STATUS
+ixSspAccTxFIFOIntDisable (
+ void);
+
+/**
+ * @ingroup IxSspAcc
+ *
+ * @fn ixSspAccLoopbackEnable (
+ BOOL loopbackEnable)
+ *
+ * @brief Enables/disables the loopback mode
+ *
+ * @param "BOOL [in] loopbackEnable" - True to enable and false to disable.
+ *
+ * Global Data :
+ * - None.
+ *
+ * This API will set the mode of operation to either loopback or normal mode
+ * according to the user input.
+ *
+ * @return
+ * - IX_SSP_SUCCESS - Loopback enabled successfully
+ * - IX_SSP_NOT_INIT - SSP not initialized. SSP init needs to be called.
+ *
+ * @li Reentrant : yes
+ * @li ISR Callable : yes
+ *
+ */
+PUBLIC IX_SSP_STATUS
+ixSspAccLoopbackEnable (
+ BOOL loopbackEnable);
+
+/**
+ * @ingroup IxSspAcc
+ *
+ * @fn ixSspAccSpiSclkPolaritySet (
+ IxSspAccSpiSclkPolarity spiSclkPolaritySelected)
+ *
+ * @brief Sets the SPI SCLK Polarity to Low or High
+ *
+ * @param - "IxSspAccSpiSclkPolarity [in] spiSclkPolaritySelected" - SPI SCLK
+ * polarity that can be selected to either high or low
+ *
+ * Global Data :
+ * - None.
+ *
+ * This API is only used for the SPI frame format and will set the SPI SCLK polarity
+ * to either low or high
+ *
+ * @return
+ * - IX_SSP_SUCCESS - SPI Sclk polarity set with valid enum value
+ * - IX_SSP_INVALID_SPI_POLARITY_ENUM_VALUE - invalid SPI polarity value
+ * - IX_SSP_NOT_INIT - SSP not initialized. SSP init needs to be called.
+ *
+ * @li Reentrant : yes
+ * @li ISR Callable : yes
+ *
+ */
+PUBLIC IX_SSP_STATUS
+ixSspAccSpiSclkPolaritySet (
+ IxSspAccSpiSclkPolarity spiSclkPolaritySelected);
+
+/**
+ * @ingroup IxSspAcc
+ *
+ * @fn ixSspAccSpiSclkPhaseSet (
+ IxSspAccSpiSclkPhase spiSclkPhaseSelected)
+ *
+ * @brief Sets the SPI SCLK Phase
+ *
+ * @param "IxSspAccSpiSclkPhase [in] spiSclkPhaseSelected" - Phase of either
+ * the SCLK is inactive one cycle at the start of a frame and 1/2
+ * cycle at the end of a frame, OR
+ * the SCLK is inactive 1/2 cycle at the start of a frame and one
+ * cycle at the end of a frame.
+ *
+ * Global Data :
+ * - IX_SSP_SUCCESS - SPI Sclk phase set with valid enum value
+ * - IX_SSP_INVALID_SPI_PHASE_ENUM_VALUE - invalid SPI phase value
+ * - IX_SSP_NOT_INIT - SSP not initialized. SSP init needs to be called.
+ *
+ * This API is only used for the SPI frame format and will set the SPI SCLK
+ * phase according to user input.
+ *
+ * @return
+ * - None
+ *
+ * @li Reentrant : yes
+ * @li ISR Callable : yes
+ *
+ */
+PUBLIC IX_SSP_STATUS
+ixSspAccSpiSclkPhaseSet (
+ IxSspAccSpiSclkPhase spiSclkPhaseSelected);
+
+/**
+ * @ingroup IxSspAcc
+ *
+ * @fn ixSspAccMicrowireControlWordSet (
+ IxSspAccMicrowireCtlWord microwireCtlWordSelected)
+ *
+ * @brief Sets the Microwire control word to 8 or 16 bit format
+ *
+ * @param "IxSspAccMicrowireCtlWord [in] microwireCtlWordSelected" - Microwire
+ * control word format can be either 8 or 16 bit format
+ *
+ * Global Data :
+ * - None.
+ *
+ * This API is only used for the Microwire frame format and will set the
+ * control word to 8 or 16 bit format
+ *
+ * @return
+ * - IX_SSP_SUCCESS - Microwire Control Word set with valid enum value
+ * - IX_SSP_TX_FIFO_NOT_EMPTY - Tx FIFO not empty, data size change is not
+ * allowed.
+ * - IX_SSP_INVALID_MICROWIRE_CTL_CMD_ENUM_VALUE - invalid enum value
+ * - IX_SSP_NOT_INIT - SSP not initialized. SSP init needs to be called.
+ *
+ * @li Reentrant : yes
+ * @li ISR Callable : yes
+ *
+ */
+PUBLIC IX_SSP_STATUS
+ixSspAccMicrowireControlWordSet (
+ IxSspAccMicrowireCtlWord microwireCtlWordSelected);
+
+/**
+ * @ingroup IxSspAcc
+ *
+ * @fn ixSspAccTxFIFOThresholdSet (
+ IxSspAccFifoThreshold txFIFOThresholdSelected)
+ *
+ * @brief Sets the Tx FIFO Threshold.
+ *
+ * @param "IxSspAccFifoThreshold [in] txFIFOThresholdSelected" - Threshold that
+ * is set for a Tx FIFO service request to be triggered
+ *
+ * Global Data :
+ * - None.
+ *
+ * This API will set the threshold for a Tx FIFO threshold to be triggered
+ *
+ * @return
+ * - IX_SSP_SUCCESS - Tx FIFO Threshold set with valid enum value
+ * - IX_SSP_INVALID_TX_FIFO_THRESHOLD_ENUM_VALUE - invalid enum value
+ * - IX_SSP_NOT_INIT - SSP not initialized. SSP init needs to be called.
+ *
+ * @li Reentrant : yes
+ * @li ISR Callable : yes
+ *
+ */
+PUBLIC IX_SSP_STATUS
+ixSspAccTxFIFOThresholdSet (
+ IxSspAccFifoThreshold txFIFOThresholdSelected);
+
+/**
+ * @ingroup IxSspAcc
+ *
+ * @fn ixSspAccRxFIFOThresholdSet (
+ IxSspAccFifoThreshold rxFIFOThresholdSelected)
+ *
+ * @brief Sets the Rx FIFO Threshold.
+ *
+ * @param "IxSspAccFifoThreshold [in] rxFIFOThresholdSelected" - Threshold that
+ * is set for a Tx FIFO service request to be triggered
+ *
+ * Global Data :
+ * - None.
+ *
+ * This API will will set the threshold for a Rx FIFO threshold to be triggered
+ *
+ * @return
+ * - IX_SSP_SUCCESS - Rx FIFO Threshold set with valid enum value
+ * - IX_SSP_INVALID_RX_FIFO_THRESHOLD_ENUM_VALUE - invalid enum value
+ * - IX_SSP_NOT_INIT - SSP not initialized. SSP init needs to be called.
+ *
+ * @li Reentrant : yes
+ * @li ISR Callable : yes
+ *
+ */
+PUBLIC IX_SSP_STATUS
+ixSspAccRxFIFOThresholdSet (
+ IxSspAccFifoThreshold rxFIFOThresholdSelected);
+
+
+/**
+ * Debug functions
+ */
+
+/**
+ * @ingroup IxSspAcc
+ *
+ * @fn ixSspAccStatsGet (
+ IxSspAccStatsCounters *sspStats)
+ *
+ * @brief Returns the SSP Statistics through the pointer passed in
+ *
+ * @param "IxSspAccStatsCounters [in] *sspStats" - SSP statistics counter will
+ * be read and written to the location pointed by this pointer.
+ *
+ * Global Data :
+ * - None.
+ *
+ * This API will return the statistics counters of the SSP transfers.
+ *
+ * @return
+ * - IX_SSP_SUCCESS - Stats obtained into the pointer provided successfully
+ * - IX_SSP_FAIL - client provided pointer is NULL
+ *
+ * @li Reentrant : yes
+ * @li ISR Callable : yes
+ *
+ */
+PUBLIC IX_SSP_STATUS
+ixSspAccStatsGet (
+ IxSspAccStatsCounters *sspStats);
+
+/**
+ * @ingroup IxSspAcc
+ *
+ * @fn ixSspAccStatsReset (
+ void)
+ *
+ * @brief Resets the SSP Statistics
+ *
+ * @param - None
+ *
+ * Global Data :
+ * - None.
+ *
+ * This API will reset the SSP statistics counters.
+ *
+ * @return
+ * - None
+ *
+ * @li Reentrant : yes
+ * @li ISR Callable : yes
+ *
+ */
+PUBLIC void
+ixSspAccStatsReset (
+ void);
+
+/**
+ * @ingroup IxSspAcc
+ *
+ * @fn ixSspAccShow (
+ void)
+ *
+ * @brief Display SSP status registers and statistics counters.
+ *
+ * @param - None
+ *
+ * Global Data :
+ * - None.
+ *
+ * This API will display the status registers of the SSP and the statistics
+ * counters.
+ *
+ * @return
+ * - IX_SSP_SUCCESS - SSP show called successfully.
+ * - IX_SSP_NOT_INIT - SSP not initialized. SSP init needs to be called.
+ *
+ * @li Reentrant : yes
+ * @li ISR Callable : yes
+ *
+ */
+PUBLIC IX_SSP_STATUS
+ixSspAccShow (
+ void);
+
+/**
+ * @ingroup IxSspAcc
+ *
+ * @fn ixSspAccSSPBusyCheck (
+ void)
+ *
+ * @brief Determine the state of the SSP serial port hardware.
+ *
+ * @param - None
+ *
+ * Global Data :
+ * - None.
+ *
+ * This API will return the state of the SSP serial port hardware - busy or
+ * idle
+ *
+ * @return
+ * - IX_SSP_BUSY - SSP is busy
+ * - IX_SSP_IDLE - SSP is idle.
+ * - IX_SSP_NOT_INIT - SSP not initialized. SSP init needs to be called.
+ *
+ * @li Reentrant : yes
+ * @li ISR Callable : yes
+ *
+ */
+PUBLIC IX_SSP_STATUS
+ixSspAccSSPBusyCheck (
+ void);
+
+/**
+ * @ingroup IxSspAcc
+ *
+ * @fn ixSspAccTxFIFOLevelGet (
+ void)
+ *
+ * @brief Obtain the Tx FIFO's level
+ *
+ * @param - None
+ *
+ * Global Data :
+ * - None.
+ *
+ * This API will return the level of the Tx FIFO
+ *
+ * @return
+ * - 0..16; 0 can also mean SSP not initialized and will need to be init.
+ *
+ * @li Reentrant : yes
+ * @li ISR Callable : yes
+ *
+ */
+PUBLIC UINT8
+ixSspAccTxFIFOLevelGet (
+ void);
+
+/**
+ * @ingroup IxSspAcc
+ *
+ * @fn ixSspAccRxFIFOLevelGet (
+ void)
+ *
+ * @brief Obtain the Rx FIFO's level
+ *
+ * @param - None
+ *
+ * Global Data :
+ * - None.
+ *
+ * This API will return the level of the Rx FIFO
+ *
+ * @return
+ * - 0..16; 0 can also mean SSP not initialized and will need to be init.
+ *
+ * @li Reentrant : yes
+ * @li ISR Callable : yes
+ *
+ */
+PUBLIC UINT8
+ixSspAccRxFIFOLevelGet (
+ void);
+
+/**
+ * @ingroup IxSspAcc
+ *
+ * @fn ixSspAccRxFIFOOverrunCheck (
+ void)
+ *
+ * @brief Check if the Rx FIFO has overrun its FIFOs
+ *
+ * @param - None
+ *
+ * Global Data :
+ * - None.
+ *
+ * This API will return whether the Rx FIFO has overrun its 16 FIFOs
+ *
+ * @return
+ * - IX_SSP_OVERRUN_OCCURRED - Rx FIFO overrun occurred
+ * - IX_SSP_NO_OVERRUN - Rx FIFO did not overrun
+ * - IX_SSP_NOT_INIT - SSP not initialized. SSP init needs to be called.
+ *
+ * @li Reentrant : yes
+ * @li ISR Callable : yes
+ *
+ */
+PUBLIC IX_SSP_STATUS
+ixSspAccRxFIFOOverrunCheck (
+ void);
+
+#endif /* __ixp46X */
+#endif /* IXSSPACC_H */
diff --git a/cpu/ixp/npe/include/IxTimeSyncAcc.h b/cpu/ixp/npe/include/IxTimeSyncAcc.h
new file mode 100644
index 0000000000..25effed90b
--- /dev/null
+++ b/cpu/ixp/npe/include/IxTimeSyncAcc.h
@@ -0,0 +1,783 @@
+/**
+ * @file IxTimeSyncAcc.h
+ *
+ * @author Intel Corporation
+ * @date 07 May 2004
+ *
+ * @brief Header file for IXP400 Access Layer to IEEE 1588(TM) Precision
+ * Clock Synchronisation Protocol Hardware Assist
+ *
+ * @version 1
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+/**
+ * @defgroup IxTimeSyncAcc IXP400 Time Sync Access Component API
+ *
+ * @brief Public API for IxTimeSyncAcc
+ *
+ * @{
+ */
+#ifndef IXTIMESYNCACC_H
+#define IXTIMESYNCACC_H
+
+#ifdef __ixp46X
+
+#include "IxOsal.h"
+
+/**
+ * Section for enum
+ */
+
+/**
+ * @ingroup IxTimeSyncAcc
+ *
+ * @enum IxTimeSyncAccStatus
+ *
+ * @brief The status as returned from the API
+ */
+typedef enum /**< IxTimeSyncAccStatus */
+{
+ IX_TIMESYNCACC_SUCCESS = IX_SUCCESS, /**< Requested operation successful */
+ IX_TIMESYNCACC_INVALIDPARAM, /**< An invalid parameter was passed */
+ IX_TIMESYNCACC_NOTIMESTAMP, /**< While polling no time stamp available */
+ IX_TIMESYNCACC_INTERRUPTMODEINUSE, /**< Polling not allowed while operating in interrupt mode */
+ IX_TIMESYNCACC_FAILED /**< Internal error occurred */
+}IxTimeSyncAccStatus;
+
+/**
+ * @ingroup IxTimeSyncAcc
+ *
+ * @enum IxTimeSyncAccAuxMode
+ *
+ * @brief Master or Slave Auxiliary Time Stamp (Snap Shot)
+ */
+typedef enum /**< IxTimeSyncAccAuxMode */
+{
+ IX_TIMESYNCACC_AUXMODE_MASTER, /**< Auxiliary Master Mode */
+ IX_TIMESYNCACC_AUXMODE_SLAVE, /**< Auxiliary Slave Mode */
+ IX_TIMESYNCACC_AUXMODE_INVALID /**< Invalid Auxiliary Mode */
+}IxTimeSyncAccAuxMode;
+
+/**
+ * @ingroup IxTimeSyncAcc
+ *
+ * @enum IxTimeSyncAcc1588PTPPort
+ *
+ * @brief IEEE 1588 PTP Communication Port(Channel)
+ */
+typedef enum /**< IxTimeSyncAcc1588PTPPort */
+{
+ IX_TIMESYNCACC_NPE_A_1588PTP_PORT, /**< PTP Communication Port on NPE-A */
+ IX_TIMESYNCACC_NPE_B_1588PTP_PORT, /**< PTP Communication Port on NPE-B */
+ IX_TIMESYNCACC_NPE_C_1588PTP_PORT, /**< PTP Communication Port on NPE-C */
+ IX_TIMESYNCACC_NPE_1588PORT_INVALID /**< Invalid PTP Communication Port */
+} IxTimeSyncAcc1588PTPPort;
+
+/**
+ * @ingroup IxTimeSyncAcc
+ *
+ * @enum IxTimeSyncAcc1588PTPPortMode
+ *
+ * @brief Master or Slave mode for IEEE 1588 PTP Communication Port
+ */
+typedef enum /**< IxTimeSyncAcc1588PTPPortMode */
+{
+ IX_TIMESYNCACC_1588PTP_PORT_MASTER, /**< PTP Communication Port in Master Mode */
+ IX_TIMESYNCACC_1588PTP_PORT_SLAVE, /**< PTP Communication Port in Slave Mode */
+ IX_TIMESYNCACC_1588PTP_PORT_ANYMODE, /**< PTP Communication Port in ANY Mode
+ allows time stamping of all messages
+ including non-1588 PTP */
+ IX_TIMESYNCACC_1588PTP_PORT_MODE_INVALID /**< Invalid PTP Port Mode */
+}IxTimeSyncAcc1588PTPPortMode;
+
+/**
+ * @ingroup IxTimeSyncAcc
+ *
+ * @enum IxTimeSyncAcc1588PTPMsgType
+ *
+ * @brief 1588 PTP Messages types that can be detected on communication port
+ *
+ * Note that client code can determine this based on master/slave mode in which
+ * it is already operating in and this information is made available for the sake
+ * of convenience only.
+ */
+typedef enum /**< IxTimeSyncAcc1588PTPMsgType */
+{
+ IX_TIMESYNCACC_1588PTP_MSGTYPE_SYNC, /**< PTP Sync message sent by Master or received by Slave */
+ IX_TIMESYNCACC_1588PTP_MSGTYPE_DELAYREQ, /**< PTP Delay_Req message sent by Slave or received by Master */
+ IX_TIMESYNCACC_1588PTP_MSGTYPE_UNKNOWN /**< Other PTP and non-PTP message sent or received by both
+ Master and/or Slave */
+} IxTimeSyncAcc1588PTPMsgType;
+
+/**
+ * Section for struct
+ */
+
+/**
+ * @ingroup IxTimeSyncAcc
+ *
+ * @struct IxTimeSyncAccTimeValue
+ *
+ * @brief Struct to hold 64 bit SystemTime and TimeStamp values
+ */
+typedef struct /**< IxTimeSyncAccTimeValue */
+{
+ UINT32 timeValueLowWord; /**< Lower 32 bits of the time value */
+ UINT32 timeValueHighWord; /**< Upper 32 bits of the time value */
+} IxTimeSyncAccTimeValue;
+
+/**
+ * @ingroup IxTimeSyncAcc
+ *
+ * @struct IxTimeSyncAccUuid
+ *
+ * @brief Struct to hold 48 bit UUID values captured in Sync or Delay_Req messages
+ */
+typedef struct /**< IxTimeSyncAccUuid */
+{
+ UINT32 uuidValueLowWord; /**<The lower 32 bits of the UUID */
+ UINT16 uuidValueHighHalfword; /**<The upper 16 bits of the UUID */
+} IxTimeSyncAccUuid;
+
+/**
+ * @ingroup IxTimeSyncAcc
+ *
+ * @struct IxTimeSyncAccPtpMsgData
+ *
+ * @brief Struct for data from the PTP message returned when TimeStamp available
+ */
+typedef struct /**< IxTimeSyncAccPtpMsgData */
+{
+ IxTimeSyncAcc1588PTPMsgType ptpMsgType; /**< PTP Messages type */
+ IxTimeSyncAccTimeValue ptpTimeStamp; /**< 64 bit TimeStamp value from PTP Message */
+ IxTimeSyncAccUuid ptpUuid; /**< 48 bit UUID value from the PTP Message */
+ UINT16 ptpSequenceNumber; /**< 16 bit Sequence Number from PTP Message */
+} IxTimeSyncAccPtpMsgData;
+
+/**
+ * @ingroup IxTimeSyncAcc
+ *
+ * @struct IxTimeSyncAccStats
+ *
+ * @brief Statistics for the PTP messages
+ */
+typedef struct /**< IxTimeSyncAccStats */
+{
+ UINT32 rxMsgs; /**< Count of timestamps for received PTP Messages */
+ UINT32 txMsgs; /**< Count of timestamps for transmitted PTP Messages */
+} IxTimeSyncAccStats;
+
+/**
+ * @ingroup IxTimeSyncAcc
+ *
+ * @typedef IxTimeSyncAccTargetTimeCallback
+ *
+ * @brief Callback for use by target time stamp interrupt
+ */
+typedef void (*IxTimeSyncAccTargetTimeCallback)(IxTimeSyncAccTimeValue targetTime);
+
+/**
+ * @ingroup IxTimeSyncAcc
+ *
+ * @typedef IxTimeSyncAccAuxTimeCallback
+ *
+ * @brief Callback for use by auxiliary time interrupts
+ */
+typedef void (*IxTimeSyncAccAuxTimeCallback)(IxTimeSyncAccAuxMode auxMode,
+ IxTimeSyncAccTimeValue auxTime);
+
+/*
+ * Section for prototypes interface functions
+ */
+
+/**
+ * @ingroup IxTimeSyncAcc
+ *
+ * @fn IxTimeSyncAccStatus ixTimeSyncAccPTPPortConfigSet(
+ IxTimeSyncAcc1588PTPPort ptpPort,
+ IxTimeSyncAcc1588PTPPortMode ptpPortMode)
+ *
+ * @brief Configures the IEEE 1588 message detect on particular PTP port.
+ *
+ * @param ptpPort [in] - PTP port to config
+ * @param ptpPortMode [in]- Port to operate in Master or Slave mode
+ *
+ * This API will enable the time stamping on a particular PTP port.
+ *
+ * @li Re-entrant : No
+ * @li ISR Callable : No
+ *
+ * @return @li IX_TIMESYNCACC_SUCCESS - Operation is successful
+ * @li IX_TIMESYNCACC_INVALIDPARAM - Invalid parameters passed
+ * @li IX_TIMESYNCACC_FAILED - Internal error occurred
+ */
+PUBLIC IxTimeSyncAccStatus
+ixTimeSyncAccPTPPortConfigSet(IxTimeSyncAcc1588PTPPort ptpPort,
+ IxTimeSyncAcc1588PTPPortMode ptpPortMode);
+
+/**
+ * @ingroup IxTimeSyncAcc
+ *
+ * @fn IxTimeSyncAccStatus ixTimeSyncAccPTPPortConfigGet(
+ IxTimeSyncAcc1588PTPPort ptpPort,
+ IxTimeSyncAcc1588PTPPortMode *ptpPortMode)
+ *
+ * @brief Retrieves IEEE 1588 PTP operation mode on particular PTP port.
+ *
+ * @param ptpPort [in] - PTP port
+ * @param ptpPortMode [in]- Mode of operation of PTP port (Master or Slave)
+ *
+ * This API will identify the time stamping capability of a PTP port by means
+ * of obtaining its mode of operation.
+ *
+ * @li Re-entrant : No
+ * @li ISR Callable : No
+ *
+ * @return @li IX_TIMESYNCACC_SUCCESS - Operation is successful
+ * @li IX_TIMESYNCACC_INVALIDPARAM - Invalid parameters passed
+ * @li IX_TIMESYNCACC_FAILED - Internal error occurred
+ */
+PUBLIC IxTimeSyncAccStatus
+ixTimeSyncAccPTPPortConfigGet(IxTimeSyncAcc1588PTPPort ptpPort,
+ IxTimeSyncAcc1588PTPPortMode *ptpPortMode);
+
+/**
+ * @ingroup IxTimeSyncAcc
+ *
+ * @fn IxTimeSyncAccStatus ixTimeSyncAccPTPRxPoll(
+ IxTimeSyncAcc1588PTPPort ptpPort,
+ IxTimeSyncAccPtpMsgData *ptpMsgData)
+ *
+ * @brief Polls the IEEE 1588 message/time stamp detect status on a particular
+ * PTP Port on the Receive side.
+ *
+ * @param ptpPort [in] - PTP port to poll
+ * @param ptpMsgData [out] - Current TimeStamp and other Data
+ *
+ * This API will poll for the availability of a time stamp on the received Sync
+ * (Slave) or Delay_Req (Master) messages.
+ * The client application will provide the buffer.
+ *
+ * @li Re-entrant : No
+ * @li ISR Callable : No
+ *
+ * @return @li IX_TIMESYNCACC_SUCCESS - Operation is successful
+ * @li IX_TIMESYNCACC_INVALIDPARAM - Invalid parameters passed
+ * @li IX_TIMESYNCACC_NOTIMESTAMP - No time stamp available
+ * @li IX_TIMESYNCACC_FAILED - Internal error occurred
+ */
+PUBLIC IxTimeSyncAccStatus
+ixTimeSyncAccPTPRxPoll(IxTimeSyncAcc1588PTPPort ptpPort,
+ IxTimeSyncAccPtpMsgData *ptpMsgData);
+
+/**
+ * @ingroup IxTimeSyncAcc
+ *
+ * @fn IxTimeSyncAccStatus ixTimeSyncAccPTPTxPoll(
+ IxTimeSyncAcc1588PTPPort ptpPort,
+ IxTimeSyncAccPtpMsgData *ptpMsgData)
+ *
+ *
+ * @brief Polls the IEEE 1588 message/time stamp detect status on a particular
+ * PTP Port on the Transmit side.
+ *
+ * @param ptpPort [in] - PTP port to poll
+ * @param ptpMsgData [out] - Current TimeStamp and other Data
+ *
+ * This API will poll for the availability of a time stamp on the transmitted
+ * Sync (Master) or Delay_Req (Slave) messages.
+ * The client application will provide the buffer.
+ *
+ * @li Re-entrant : No
+ * @li ISR Callable : No
+ *
+ * @return @li IX_TIMESYNCACC_SUCCESS - Operation is successful
+ * @li IX_TIMESYNCACC_INVALIDPARAM - Invalid parameters passed
+ * @li IX_TIMESYNCACC_NOTIMESTAMP - No time stamp available
+ * @li IX_TIMESYNCACC_FAILED - Internal error occurred
+ */
+PUBLIC IxTimeSyncAccStatus
+ixTimeSyncAccPTPTxPoll(IxTimeSyncAcc1588PTPPort ptpPort,
+ IxTimeSyncAccPtpMsgData *ptpMsgData);
+
+/**
+ * @ingroup IxTimeSyncAcc
+ *
+ * @fn IxTimeSyncAccStatus ixTimeSyncAccSystemTimeSet(
+ IxTimeSyncAccTimeValue systemTime)
+ *
+ * @brief Sets the System Time in the IEEE 1588 hardware assist block
+ *
+ * @param systemTime [in] - Value to set System Time
+ *
+ * This API will set the SystemTime to given value.
+ *
+ * @li Re-entrant : yes
+ * @li ISR Callable : no
+ *
+ * @return @li IX_TIMESYNCACC_SUCCESS - Operation is successful
+ * @li IX_TIMESYNCACC_FAILED - Internal error occurred
+ */
+PUBLIC IxTimeSyncAccStatus
+ixTimeSyncAccSystemTimeSet(IxTimeSyncAccTimeValue systemTime);
+
+/**
+ * @ingroup IxTimeSyncAcc
+ *
+ * @fn IxTimeSyncAccStatus ixTimeSyncAccSystemTimeGet(
+ IxTimeSyncAccTimeValue *systemTime)
+ *
+ * @brief Gets the System Time from the IEEE 1588 hardware assist block
+ *
+ * @param systemTime [out] - Copy the current System Time into the client
+ * application provided buffer
+ *
+ * This API will get the SystemTime from IEEE1588 block and return to client
+ *
+ * @li Re-entrant : no
+ * @li ISR Callable : no
+ *
+ * @return @li IX_TIMESYNCACC_SUCCESS - Operation is successful
+ * @li IX_TIMESYNCACC_INVALIDPARAM - Invalid parameters passed
+ * @li IX_TIMESYNCACC_FAILED - Internal error occurred
+ */
+PUBLIC IxTimeSyncAccStatus
+ixTimeSyncAccSystemTimeGet(IxTimeSyncAccTimeValue *systemTime);
+
+/**
+ * @ingroup IxTimeSyncAcc
+ *
+ * @fn IxTimeSyncAccStatus ixTimeSyncAccTickRateSet(
+ UINT32 tickRate)
+ *
+ * @brief Sets the Tick Rate (Frequency Scaling Value) in the IEEE 1588
+ * hardware assist block
+ *
+ * @param tickRate [in] - Value to set Tick Rate
+ *
+ * This API will set the Tick Rate (Frequency Scaling Value) in the IEEE
+ * 1588 block to the given value. The Accumulator register (not client
+ * visible) is incremented by this TickRate value every clock cycle. When
+ * the Accumulator overflows, the SystemTime is incremented by one. This
+ * TickValue can therefore be used to adjust the system timer.
+ *
+ * @li Re-entrant : yes
+ * @li ISR Callable : no
+ *
+ * @return @li IX_TIMESYNCACC_SUCCESS - Operation is successful
+ * @li IX_TIMESYNCACC_FAILED - Internal error occurred
+ */
+PUBLIC IxTimeSyncAccStatus
+ixTimeSyncAccTickRateSet(UINT32 tickRate);
+
+/**
+ * @ingroup IxTimeSyncAcc
+ *
+ * @fn IxTimeSyncAccStatus ixTimeSyncAccTickRateGet(
+ UINT32 *tickRate)
+ *
+ * @brief Gets the Tick Rate (Frequency Scaling Value) from the IEEE 1588
+ * hardware assist block
+ *
+ * @param tickRate [out] - Current Tick Rate value in the IEEE 1588 block
+ *
+ * This API will get the TickRate on IEE15588 block. Refer to @ref
+ * ixTimeSyncAccTickRateSet for notes on usage of this value.
+ *
+ * @li Reentrant : yes
+ * @li ISR Callable : no
+ *
+ * @return @li IX_TIMESYNCACC_SUCCESS - Operation is successful
+ * @li IX_TIMESYNCACC_INVALIDPARAM - Invalid parameters passed
+ * @li IX_TIMESYNCACC_FAILED - Internal error occurred
+ */
+PUBLIC IxTimeSyncAccStatus
+ixTimeSyncAccTickRateGet(UINT32 *tickRate);
+
+/**
+ * @ingroup IxTimeSyncAcc
+ *
+ * @fn IxTimeSyncAccStatus ixTimeSyncAccTargetTimeInterruptEnable(
+ IxTimeSyncAccTargetTimeCallback targetTimeCallback)
+ *
+ * @brief Enables the interrupt to verify the condition where the System Time
+ * greater or equal to the Target Time in the IEEE 1588 hardware assist block.
+ * If the condition is true an interrupt will be sent to XScale.
+ *
+ * @param targetTimeCallback [in] - Callback to be invoked when interrupt fires
+ *
+ * This API will enable the Target Time reached/hit condition interrupt.
+ *
+ * NOTE: The client application needs to ensure that the APIs
+ * @ref ixTimeSyncAccTargetTimeInterruptEnable, @ref ixTimeSyncAccTargetTimeSet and
+ * @ref ixTimeSyncAccTargetTimeInterruptDisable are accessed in mutual exclusive
+ * manner with respect to each other.
+ *
+ * @li Re-entrant : no
+ * @li ISR Callable : yes
+ *
+ * @return @li IX_TIMESYNCACC_SUCCESS - Operation is successful
+ * @li IX_TIMESYNCACC_INVALIDPARAM - Null parameter passed for callback
+ * @li IX_TIMESYNCACC_FAILED - Internal error occurred
+ */
+PUBLIC IxTimeSyncAccStatus
+ixTimeSyncAccTargetTimeInterruptEnable(IxTimeSyncAccTargetTimeCallback targetTimeCallback);
+
+/**
+ * @ingroup IxTimeSyncAcc
+ *
+ * @fn IxTimeSyncAccStatus ixTimeSyncAccTargetTimeInterruptDisable(
+ void)
+ *
+ * @brief Disables the interrupt for the condition explained in the function
+ * description of @ref ixTimeSyncAccTargetTimeInterruptEnable.
+ *
+ * This API will disable the Target Time interrupt.
+ *
+ * NOTE: The client application needs to ensure that the APIs
+ * @ref ixTimeSyncAccTargetTimeInterruptEnable, @ref ixTimeSyncAccTargetTimeSet and
+ * @ref ixTimeSyncAccTargetTimeInterruptDisable are accessed in mutual exclusive
+ * manner with respect to each other.
+ *
+ * @li Re-entrant : no
+ * @li ISR Callable : yes
+ *
+ * @return @li IX_TIMESYNCACC_SUCCESS - Operation is successful
+ * @li IX_TIMESYNCACC_FAILED - Internal error occurred
+ */
+PUBLIC IxTimeSyncAccStatus
+ixTimeSyncAccTargetTimeInterruptDisable(void);
+
+/**
+ * @ingroup IxTimeSyncAcc
+ *
+ * @fn IxTimeSyncAccStatus ixTimeSyncAccTargetTimePoll(
+ BOOL *ttmPollFlag,
+ IxTimeSyncAccTimeValue *targetTime)
+ *
+ * @brief Poll to verify the condition where the System Time greater or equal to
+ * the Target Time in the IEEE 1588 hardware assist block. If the condition is
+ * true an event flag is set in the hardware.
+ *
+ * @param ttmPollFlag [out] - TRUE if the target time reached/hit condition event set
+ * FALSE if the target time reached/hit condition event is
+ not set
+ * @param targetTime [out] - Capture current targetTime into client provided buffer
+ *
+ * Poll the target time reached/hit condition status. Return true and the current
+ * target time value, if the condition is true else return false.
+ *
+ * NOTE: The client application will need to clear the event flag that will be set
+ * as long as the condition that the System Time greater or equal to the Target Time is
+ * valid, in one of the following ways:
+ * 1) Invoke the API to change the target time
+ * 2) Change the system timer value
+ *
+ * @li Re-entrant : yes
+ * @li ISR Callable : no
+ *
+ * @return @li IX_TIMESYNCACC_SUCCESS - Operation is successful
+ * @li IX_TIMESYNCACC_INVALIDPARAM - Null parameter passed
+ * @li IX_TIMESYNCACC_FAILED - Internal error occurred
+ * @li IX_TIMESYNCACC_INTERRUPTMODEINUSE - Interrupt mode in use
+ */
+PUBLIC IxTimeSyncAccStatus
+ixTimeSyncAccTargetTimePoll(BOOL *ttmPollFlag,
+ IxTimeSyncAccTimeValue *targetTime);
+
+/**
+ * @ingroup IxTimeSyncAcc
+ *
+ * @fn IxTimeSyncAccStatus ixTimeSyncAccTargetTimeSet(
+ IxTimeSyncAccTimeValue targetTime)
+ *
+ * @brief Sets the Target Time in the IEEE 1588 hardware assist block
+ *
+ * @param targetTime [in] - Value to set Target Time
+ *
+ * This API will set the Target Time to a given value.
+ *
+ * NOTE: The client application needs to ensure that the APIs
+ * @ref ixTimeSyncAccTargetTimeInterruptEnable, @ref ixTimeSyncAccTargetTimeSet and
+ * @ref ixTimeSyncAccTargetTimeInterruptDisable are accessed in mutual exclusive
+ * manner with respect to each other.
+ *
+ * @li Reentrant : no
+ * @li ISR Callable : yes
+ *
+ * @return @li IX_TIMESYNCACC_SUCCESS - Operation is successful
+ * @li IX_TIMESYNCACC_FAILED - Internal error occurred
+ */
+PUBLIC IxTimeSyncAccStatus
+ixTimeSyncAccTargetTimeSet(IxTimeSyncAccTimeValue targetTime);
+
+/**
+ * @ingroup IxTimeSyncAcc
+ *
+ * @fn IxTimeSyncAccStatus ixTimeSyncAccTargetTimeGet(
+ IxTimeSyncAccTimeValue *targetTime)
+ *
+ * @brief Gets the Target Time in the IEEE 1588 hardware assist block
+ *
+ * @param targetTime [out] - Copy current time to client provided buffer
+ *
+ * This API will get the Target Time from IEEE 1588 block and return to the
+ * client application
+ *
+ * @li Re-entrant : yes
+ * @li ISR Callable : no
+ *
+ * @return @li IX_TIMESYNCACC_SUCCESS - Operation is successful
+ * @li IX_TIMESYNCACC_INVALIDPARAM - Null parameter passed
+ * @li IX_TIMESYNCACC_FAILED - Internal error occurred
+ */
+PUBLIC IxTimeSyncAccStatus
+ixTimeSyncAccTargetTimeGet(IxTimeSyncAccTimeValue *targetTime);
+
+/**
+ * @ingroup IxTimeSyncAcc
+ *
+ * @fn IxTimeSyncAccStatus ixTimeSyncAccAuxTimeInterruptEnable(
+ IxTimeSyncAccAuxMode auxMode,
+ IxTimeSyncAccAuxTimeCallback auxTimeCallback)
+ *
+ * @brief Enables the interrupt notification for the given mode of Auxiliary Time
+ * Stamp in the IEEE 1588 hardware assist block
+ *
+ * @param auxMode [in] - Auxiliary time stamp register (slave or master) to use
+ * @param auxTimeCallback [in] - Callback to be invoked when interrupt fires
+ *
+ * This API will enable the Auxiliary Master/Slave Time stamp Interrupt.
+ *
+ * <pre>
+ * NOTE: 1) An individual callback is to be registered for each Slave and Master
+ * Auxiliary Time Stamp registers. Thus to register for both Master and Slave time
+ * stamp interrupts either the same callback or two separate callbacks the API has
+ * to be invoked twice.
+ * 2) On the IXDP465 Development Platform, the Auxiliary Timestamp signal for
+ * slave mode is tied to GPIO 8 pin. This signal is software routed by default to
+ * PCI for backwards compatibility with the IXDP425 Development Platform. This
+ * routing must be disabled for the auxiliary slave time stamp register to work
+ * properly. The following commands may be used to accomplish this. However, refer
+ * to the IXDP465 Development Platform Users Guide or the BSP/LSP documentation for
+ * more specific information.
+ *
+ * For Linux (at the Redboot prompt i.e., before loading zImage):
+ * mfill -b 0x54100000 -1 -l 1 -p 8
+ * mfill -b 0x54100001 -1 -l 1 -p 0x7f
+ * For vxWorks, at the prompt:
+ * intDisable(25)
+ * ixdp400FpgaIODetach(8)
+ * </pre>
+ *
+ * @li Re-entrant : no
+ * @li ISR Callable : no
+ *
+ * @return @li IX_TIMESYNCACC_SUCCESS - Operation is successful
+ * @li IX_TIMESYNCACC_INVALIDPARAM - Null parameter passed for callback or
+ invalid auxiliary snapshot mode
+ * @li IX_TIMESYNCACC_FAILED - Internal error occurred
+ */
+PUBLIC IxTimeSyncAccStatus
+ixTimeSyncAccAuxTimeInterruptEnable(IxTimeSyncAccAuxMode auxMode,
+ IxTimeSyncAccAuxTimeCallback auxTimeCallback);
+
+/**
+ * @ingroup IxTimeSyncAcc
+ *
+ * @fn IxTimeSyncAccStatus ixTimeSyncAccAuxTimeInterruptDisable(
+ IxTimeSyncAccAuxMode auxMode)
+ *
+ * @brief Disables the interrupt for the indicated mode of Auxiliary Time Stamp
+ * in the IEEE 1588 hardware assist block
+ *
+ * @param auxMode [in] - Auxiliary time stamp mode (slave or master) using which
+ * the interrupt will be disabled.
+ *
+ * This API will disable the Auxiliary Time Stamp Interrupt (Master or Slave)
+ *
+ * @li Re-entrant : yes
+ * @li ISR Callable : no
+ *
+ * @return @li IX_TIMESYNCACC_SUCCESS - Operation is successful
+ * @li IX_TIMESYNCACC_INVALIDPARAM - Invalid parameters passed
+ * @li IX_TIMESYNCACC_FAILED - Internal error occurred
+ */
+PUBLIC IxTimeSyncAccStatus
+ixTimeSyncAccAuxTimeInterruptDisable(IxTimeSyncAccAuxMode auxMode);
+
+/**
+ * @ingroup IxTimeSyncAcc
+ *
+ * @fn IxTimeSyncAccStatus ixTimeSyncAccAuxTimePoll(
+ IxTimeSyncAccAuxMode auxMode,
+ BOOL *auxPollFlag,
+ IxTimeSyncAccTimeValue *auxTime)
+ *
+ * @brief Poll for the Auxiliary Time Stamp captured for the mode indicated
+ * (Master or Slave)
+ *
+ * @param auxMode [in] - Auxiliary Snapshot Register (Slave or Master) to be checked
+ * @param auxPollFlag [out] - TRUE if the time stamp captured in auxiliary
+ snapshot register
+ * FALSE if the time stamp not captured in
+ auxiliary snapshot register
+ * @param auxTime [out] - Copy the current Auxiliary Snapshot Register value into the
+ * client provided buffer
+ *
+ * Polls for the Time stamp in the appropriate Auxiliary Snapshot Registers based
+ * on the mode specified. Return true and the contents of the Auxiliary snapshot,
+ * if it is available else return false.
+ *
+ * Please refer to the note #2 of the API @ref ixTimeSyncAccAuxTimeInterruptEnable
+ * for more information for Auxiliary Slave mode.
+ *
+ * @li Re-entrant : yes
+ * @li ISR Callable : no
+ *
+ * @return @li IX_TIMESYNCACC_SUCCESS - Operation is successful
+ * @li IX_TIMESYNCACC_INVALIDPARAM - Null parameter passed for auxPollFlag,
+ callback or invalid auxiliary snapshot mode
+ * @li IX_TIMESYNCACC_FAILED - Internal error occurred
+ * @li IX_TIMESYNCACC_INTERRUPTMODEINUSE - Interrupt mode in use
+ */
+PUBLIC IxTimeSyncAccStatus
+ixTimeSyncAccAuxTimePoll(IxTimeSyncAccAuxMode auxMode,
+ BOOL *auxPollFlag,
+ IxTimeSyncAccTimeValue *auxTime);
+
+/**
+ * @ingroup IxTimeSyncAcc
+ *
+ * @fn IxTimeSyncAccStatus ixTimeSyncAccReset(void)
+ *
+ * @brief Resets the IEEE 1588 hardware assist block
+ *
+ * Sets the reset bit in the IEEE1588 silicon which fully resets the silicon block
+ *
+ * @li Reentrant : yes
+ * @li ISR Callable : no
+ *
+ * @return @li IX_TIMESYNCACC_SUCCESS - Operation is successful
+ * @li IX_TIMESYNCACC_FAILED - Internal error occurred
+ */
+PUBLIC IxTimeSyncAccStatus
+ixTimeSyncAccReset(void);
+
+/**
+ * @ingroup IxTimeSyncAcc
+ *
+ * @fn IxTimeSyncAccStatus ixTimeSyncAccStatsGet(IxTimeSyncAccStats
+ *timeSyncStats)
+ *
+ * @brief Returns the IxTimeSyncAcc Statistics in the client supplied buffer
+ *
+ * @param timeSyncStats [out] - TimeSync statistics counter values
+ *
+ * This API will return the statistics of the received or transmitted messages.
+ *
+ * NOTE: 1) These counters are updated only when the client polls for the time
+ * stamps or interrupt are enabled. This is because the IxTimeSyncAcc module
+ * does not either transmit or receive messages and does only run the code
+ * when explicit requests received by client application.
+ *
+ * 2) These statistics reflect the number of valid PTP messages exchanged
+ * in Master and Slave modes but includes all the messages (including valid
+ * non-PTP messages) while operating in the Any mode.
+ *
+ * @li Reentrant : no
+ * @li ISR Callable : no
+ *
+ * @return @li IX_TIMESYNCACC_SUCCESS - Operation is successful
+ * @li IX_TIMESYNCACC_INVALIDPARAM - NULL parameter passed
+ * @li IX_TIMESYNCACC_FAILED - Internal error occurred
+ */
+PUBLIC IxTimeSyncAccStatus
+ixTimeSyncAccStatsGet(IxTimeSyncAccStats *timeSyncStats);
+
+/**
+ * @ingroup IxTimeSyncAcc
+ *
+ * @fn void ixTimeSyncAccStatsReset(void)
+ *
+ * @brief Reset Time Sync statistics
+ *
+ * This API will reset the statistics counters of the TimeSync access layer.
+ *
+ * @li Reentrant : yes
+ * @li ISR Callable: no
+ *
+ * @return @li None
+ */
+PUBLIC void
+ixTimeSyncAccStatsReset(void);
+
+/**
+ * @ingroup IxTimeSyncAcc
+ *
+ * @fn IxTimeSyncAccStatus ixTimeSyncAccShow(void)
+ *
+ * @brief Displays the Time Sync current status
+ *
+ * This API will display status on the current configuration of the IEEE
+ * 1588 hardware assist block, contents of the various time stamp registers,
+ * outstanding interrupts and/or events.
+ *
+ * Note that this is intended for debug only, and in contrast to the other
+ * functions, it does not clear the any of the status bits associated with
+ * active timestamps and so is passive in its nature.
+ *
+ * @li Reentrant : yes
+ * @li ISR Callable : no
+ *
+ * @return @li IX_TIMESYNCACC_SUCCESS - Operation is successful
+ * @li IX_TIMESYNCACC_FAILED - Internal error occurred
+ */
+PUBLIC IxTimeSyncAccStatus
+ixTimeSyncAccShow(void);
+
+#endif /* __ixp46X */
+#endif /* IXTIMESYNCACC_H */
+
+/**
+ * @} defgroup IxTimeSyncAcc
+ */
+
diff --git a/cpu/ixp/npe/include/IxTimerCtrl.h b/cpu/ixp/npe/include/IxTimerCtrl.h
new file mode 100644
index 0000000000..669dd3ef28
--- /dev/null
+++ b/cpu/ixp/npe/include/IxTimerCtrl.h
@@ -0,0 +1,263 @@
+/**
+ * @file IxTimerCtrl.h
+ * @brief
+ * This is the header file for the Timer Control component.
+ *
+ * The timer callback control component provides a mechanism by which different
+ * client components can start a timer and have a supplied callback function
+ * invoked when the timer expires.
+ * The callbacks are all dispatched from one thread inside this component.
+ * Any component that needs to be called periodically should use this facility
+ * rather than create its own task with a sleep loop.
+ *
+ * @par
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+*/
+
+/**
+ * @defgroup IxTimerCtrl IXP400 Timer Control (IxTimerCtrl) API
+ *
+ * @brief The public API for the IXP400 Timer Control Component.
+ *
+ * @{
+ */
+
+#ifndef IxTimerCtrl_H
+#define IxTimerCtrl_H
+
+
+#include "IxTypes.h"
+/* #include "Ossl.h" */
+
+/*
+ * #defines and macros used in this file.
+ */
+
+/**
+ * @ingroup IxTimerCtrl
+ *
+ * @def IX_TIMERCTRL_NO_FREE_TIMERS
+ *
+ * @brief Timer schedule return code.
+ *
+ * Indicates that the request to start a timer failed because
+ * all available timer resources are used.
+ */
+#define IX_TIMERCTRL_NO_FREE_TIMERS 2
+
+
+/**
+ * @ingroup IxTimerCtrl
+ *
+ * @def IX_TIMERCTRL_PARAM_ERROR
+ *
+ * @brief Timer schedule return code.
+ *
+ * Indicates that the request to start a timer failed because
+ * the client has supplied invalid parameters.
+ */
+#define IX_TIMERCTRL_PARAM_ERROR 3
+
+
+/*
+ * Typedefs whose scope is limited to this file.
+ */
+
+/**
+ * @ingroup IxTimerCtrl
+ *
+ * @brief A typedef for a pointer to a timer callback function.
+ * @para void * - This parameter is supplied by the client when the
+ * timer is started and passed back to the client in the callback.
+ * @note in general timer callback functions should not block or
+ * take longer than 100ms. This constraint is required to ensure that
+ * higher priority callbacks are not held up.
+ * All callbacks are called from the same thread.
+ * This thread is a shared resource.
+ * The parameter passed is provided when the timer is scheduled.
+ */
+typedef void (*IxTimerCtrlTimerCallback)(void *userParam);
+
+
+/**
+ * @ingroup IxTimerCtrl
+ *
+ * @brief List used to identify the users of timers.
+ * @note The order in this list indicates priority. Components appearing
+ * higher in the list will be given priority over components lower in the
+ * list. When adding components, please insert at an appropriate position
+ * for priority ( i.e values should be less than IxTimerCtrlMaxPurpose ) .
+ */
+typedef enum
+{
+ IxTimerCtrlAdslPurpose,
+ /* Insert new purposes above this line only
+ */
+ IxTimerCtrlMaxPurpose
+}
+IxTimerCtrlPurpose;
+
+
+/*
+ * Function definition
+ */
+
+/**
+ * @ingroup IxTimerCtrl
+ *
+ * @fn ixTimerCtrlSchedule(IxTimerCtrlTimerCallback func,
+ void *userParam,
+ IxTimerCtrlPurpose purpose,
+ UINT32 relativeTime,
+ unsigned *timerId )
+ *
+ * @brief Schedules a callback function to be called after a period of "time".
+ * The callback function should not block or run for more than 100ms.
+ * This function
+ *
+ * @param func @ref IxTimerCtrlTimerCallback [in] - the callback function to be called.
+ * @param userParam void [in] - a parameter to send to the callback function, can be NULL.
+ * @param purpose @ref IxTimerCtrlPurpose [in] - the purpose of the callback, internally this component will
+ * decide the priority of callbacks with different purpose.
+ * @param relativeTime UINT32 [in] - time relative to now in milliseconds after which the callback
+ * will be called. The time must be greater than the duration of one OS tick.
+ * @param *timerId unsigned [out] - An id for the callback scheduled.
+ * This id can be used to cancel the callback.
+ * @return
+ * @li IX_SUCCESS - The timer was started successfully.
+ * @li IX_TIMERCTRL_NO_FREE_TIMERS - The timer was not started because the maximum number
+ * of running timers has been exceeded.
+ * @li IX_TIMERCTRL_PARAM_ERROR - The timer was not started because the client has supplied
+ * a NULL callback func, or the requested timeout is less than one OS tick.
+ * @note This function is re-entrant. The function accesses a list of running timers
+ * and may suspend the calling thread if this list is being accesed by another thread.
+ */
+PUBLIC IX_STATUS
+ixTimerCtrlSchedule(IxTimerCtrlTimerCallback func,
+ void *userParam,
+ IxTimerCtrlPurpose purpose,
+ UINT32 relativeTime,
+ unsigned *timerId );
+
+
+/**
+ * @ingroup IxTimerCtrl
+ *
+ * @fn ixTimerCtrlScheduleRepeating(IxTimerCtrlTimerCallback func,
+ void *param,
+ IxTimerCtrlPurpose purpose,
+ UINT32 interval,
+ unsigned *timerId )
+ *
+ * @brief Schedules a callback function to be called after a period of "time".
+ * The callback function should not block or run for more than 100ms.
+ *
+ * @param func @ref IxTimerCtrlTimerCallback [in] - the callback function to be called.
+ * @param userParam void [in] - a parameter to send to the callback function, can be NULL.
+ * @param purpose @ref IxTimerCtrlPurpose [in] - the purpose of the callback, internally this component will
+ * decide the priority of callbacks with different purpose.
+ * @param interval UINT32 [in] - the interval in milliseconds between calls to func.
+ * @param timerId unsigned [out] - An id for the callback scheduled.
+ * This id can be used to cancel the callback.
+ * @return
+ * @li IX_SUCCESS - The timer was started successfully.
+ * @li IX_TIMERCTRL_NO_FREE_TIMERS - The timer was not started because the maximum number
+ * of running timers has been exceeded.
+ * @li IX_TIMERCTRL_PARAM_ERROR - The timer was not started because the client has supplied
+ * a NULL callback func, or the requested timeout is less than one OS tick.
+ * @note This function is re-entrant. The function accesses a list of running timers
+ * and may suspend the calling thread if this list is being accesed by another thread.
+ */
+PUBLIC IX_STATUS
+ixTimerCtrlScheduleRepeating(IxTimerCtrlTimerCallback func,
+ void *param,
+ IxTimerCtrlPurpose purpose,
+ UINT32 interval,
+ unsigned *timerId );
+
+/**
+ * @ingroup IxTimerCtrl
+ *
+ * @fn ixTimerCtrlCancel (unsigned id)
+ *
+ * @brief Cancels a scheduled callback.
+ *
+ * @param id unsigned [in] - the id of the callback to be cancelled.
+ * @return
+ * @li IX_SUCCESS - The timer was successfully stopped.
+ * @li IX_FAIL - The id parameter did not corrrespond to any running timer..
+ * @note This function is re-entrant. The function accesses a list of running timers
+ * and may suspend the calling thread if this list is being accesed by another thread.
+ */
+PUBLIC IX_STATUS
+ixTimerCtrlCancel (unsigned id);
+
+/**
+ * @ingroup IxTimerCtrl
+ *
+ * @fn ixTimerCtrlInit(void)
+ *
+ * @brief Initialise the Timer Control Component.
+ * @return
+ * @li IX_SUCCESS - The timer control component initialized successfully.
+ * @li IX_FAIL - The timer control component initialization failed,
+ * or the component was already initialized.
+ * @note This must be done before any other API function is called.
+ * This function should be called once only and is not re-entrant.
+ */
+PUBLIC IX_STATUS
+ixTimerCtrlInit(void);
+
+
+/**
+ * @ingroup IxTimerCtrl
+ *
+ * @fn ixTimerCtrlShow( void )
+ *
+ * @brief Display the status of the Timer Control Component.
+ * @return void
+ * @note Displays a list of running timers.
+ * This function is not re-entrant. This function does not suspend the calling thread.
+ */
+PUBLIC void
+ixTimerCtrlShow( void );
+
+#endif /* IXTIMERCTRL_H */
+
diff --git a/cpu/ixp/npe/include/IxTypes.h b/cpu/ixp/npe/include/IxTypes.h
new file mode 100644
index 0000000000..c4c5a2d267
--- /dev/null
+++ b/cpu/ixp/npe/include/IxTypes.h
@@ -0,0 +1,86 @@
+/**
+ * @file IxTypes.h (Replaced by OSAL)
+ *
+ * @date 28-NOV-2001
+
+ * @brief This file contains basic types used by the IXP400 software
+ *
+ * Design Notes:
+ * This file shall only include fundamental types and definitions to be
+ * shared by all the IXP400 components.
+ * Please DO NOT add component-specific types here.
+ *
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+/**
+ * @defgroup IxTypes IXP400 Types (IxTypes)
+ *
+ * @brief Basic data types used by the IXP400 project
+ *
+ * @{
+ */
+
+#ifndef IxTypes_H
+
+#ifndef __doxygen_HIDE
+
+#define IxTypes_H
+
+#endif /* __doxygen_HIDE */
+
+
+/* WR51880: Undefined data types workaround for backward compatibility */
+#ifdef __linux
+#ifndef __INCvxTypesOldh
+typedef int (*FUNCPTR)(void);
+typedef int STATUS;
+#define OK (0)
+#define ERROR (-1)
+#endif
+#endif
+
+#include "IxOsalBackward.h"
+
+#endif /* IxTypes_H */
+
+/**
+ * @} addtogroup IxTypes
+ */
diff --git a/cpu/ixp/npe/include/IxUART.h b/cpu/ixp/npe/include/IxUART.h
new file mode 100644
index 0000000000..03a44441c5
--- /dev/null
+++ b/cpu/ixp/npe/include/IxUART.h
@@ -0,0 +1,458 @@
+/**
+ * @file IxUART.h
+ *
+ * @date 12-OCT-01
+ *
+ * @brief Public header for the Intel IXP400 internal UART, generic driver.
+ *
+ * Design Notes:
+ * This driver allows you to perform the following functions:
+ * Device Initialization,
+ * send/receive characters.
+ *
+ * Perform Uart IOCTL for the following:
+ * Set/Get the current baud rate,
+ * set parity,
+ * set the number of Stop bits,
+ * set the character Length (5,6,7,8),
+ * enable/disable Hardware flow control.
+ *
+ * Only Polled mode is supported for now.
+ *
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+*/
+
+/**
+ * @defgroup IxUARTAccAPI IXP400 UART Access (IxUARTAcc) API
+ *
+ * @brief IXP400 UARTAcc Driver Public API
+ *
+ * @{
+ */
+
+
+/* Defaults */
+
+/**
+ * @defgroup DefaultDefines Defines for Default Values
+ *
+ * @brief Default values which can be used for UART configuration
+ *
+ * @sa ixUARTDev
+ */
+
+/**
+ * @def IX_UART_DEF_OPTS
+ *
+ * @brief The default hardware options to set the UART to -
+ * no flow control, 8 bit word, 1 stop bit, no parity
+ *
+ * @ingroup DefaultDefines
+ */
+#define IX_UART_DEF_OPTS (CLOCAL | CS8)
+
+/**
+ * @def IX_UART_DEF_XMIT
+ *
+ * @brief The default UART FIFO size - must be no bigger than 64
+ *
+ * @ingroup DefaultDefines
+ */
+#define IX_UART_DEF_XMIT 64
+
+/**
+ * @def IX_UART_DEF_BAUD
+ *
+ * @brief The default UART baud rate - 9600
+ *
+ * @ingroup DefaultDefines
+ */
+#define IX_UART_DEF_BAUD 9600
+
+/**
+ * @def IX_UART_MIN_BAUD
+ *
+ * @brief The minimum UART baud rate - 9600
+ *
+ * @ingroup DefaultDefines
+ */
+#define IX_UART_MIN_BAUD 9600
+
+/**
+ * @def IX_UART_MAX_BAUD
+ *
+ * @brief The maximum UART baud rate - 926100
+ *
+ * @ingroup DefaultDefines
+ */
+#define IX_UART_MAX_BAUD 926100
+
+/**
+ * @def IX_UART_XTAL
+ *
+ * @brief The UART clock speed
+ *
+ * @ingroup DefaultDefines
+ */
+#define IX_UART_XTAL 14745600
+
+
+
+/* IOCTL commands (Request codes) */
+
+/**
+ * @defgroup IoctlCommandDefines Defines for IOCTL Commands
+ *
+ * @brief IOCTL Commands (Request codes) which can be used
+ * with @ref ixUARTIoctl
+ */
+
+
+/**
+ * @ingroup IoctlCommandDefines
+ *
+ * @def IX_BAUD_SET
+ *
+ * @brief Set the baud rate
+ */
+#define IX_BAUD_SET 0
+
+/**
+ * @ingroup IoctlCommandDefines
+ *
+ * @def IX_BAUD_GET
+ *
+ * @brief Get the baud rate
+ */
+#define IX_BAUD_GET 1
+
+/**
+ * @ingroup IoctlCommandDefines
+ * @def IX_MODE_SET
+ * @brief Set the UART mode of operation
+ */
+#define IX_MODE_SET 2
+
+/**
+ * @ingroup IoctlCommandDefines
+ *
+ * @def IX_MODE_GET
+ *
+ * @brief Get the current UART mode of operation
+ */
+#define IX_MODE_GET 3
+
+/**
+ * @ingroup IoctlCommandDefines
+ *
+ * @def IX_OPTS_SET
+ *
+ * @brief Set the UART device options
+ */
+#define IX_OPTS_SET 4
+
+/**
+ * @ingroup IoctlCommandDefines
+ *
+ * @def IX_OPTS_GET
+ *
+ * @brief Get the UART device options
+ */
+#define IX_OPTS_GET 5
+
+/**
+ * @ingroup IoctlCommandDefines
+ *
+ * @def IX_STATS_GET
+ *
+ * @brief Get the UART statistics
+ */
+#define IX_STATS_GET 6
+
+
+/* POSIX style ioctl arguments */
+
+/**
+ * @defgroup IoctlArgDefines Defines for IOCTL Arguments
+ *
+ * @brief POSIX style IOCTL arguments which can be used
+ * with @ref ixUARTIoctl
+ *
+ * @sa ixUARTMode
+ */
+
+
+/**
+ * @ingroup IoctlArgDefines
+ *
+ * @def CLOCAL
+ *
+ * @brief Software flow control
+ */
+#ifdef CLOCAL
+#undef CLOCAL
+#endif
+#define CLOCAL 0x1
+
+/**
+ * @ingroup IoctlArgDefines
+ *
+ * @def CREAD
+ *
+ * @brief Enable interrupt receiver
+ */
+#ifdef CREAD
+#undef CREAD
+#endif
+#define CREAD 0x2
+
+/**
+ * @ingroup IoctlArgDefines
+ *
+ * @def CSIZE
+ *
+ * @brief Characters size
+ */
+#ifdef CSIZE
+#undef CSIZE
+#endif
+#define CSIZE 0xc
+
+/**
+ * @ingroup IoctlArgDefines
+ *
+ * @def CS5
+ *
+ * @brief 5 bits
+ */
+#ifdef CS5
+#undef CS5
+#endif
+#define CS5 0x0
+
+/**
+ * @ingroup IoctlArgDefines
+ *
+ * @def CS6
+ *
+ * @brief 6 bits
+ */
+#ifdef CS6
+#undef CS6
+#endif
+#define CS6 0x4
+
+/**
+ * @ingroup IoctlArgDefines
+ *
+ * @def CS7
+ *
+ * @brief 7 bits
+ */
+#ifdef CS7
+#undef CS7
+#endif
+#define CS7 0x8
+
+/**
+ * @ingroup IoctlArgDefines
+ *
+ * @def CS8
+ *
+ * @brief 8 bits
+ */
+#ifdef CS8
+#undef CS8
+#endif
+#define CS8 0xc
+
+/**
+ * @ingroup IoctlArgDefines
+ *
+ * @def STOPB
+ *
+ * @brief Send two stop bits (else one)
+ */
+#define STOPB 0x20
+
+/**
+ * @ingroup IoctlArgDefines
+ *
+ * @def PARENB
+ *
+ * @brief Parity detection enabled (else disabled)
+ */
+#ifdef PARENB
+#undef PARENB
+#endif
+#define PARENB 0x40
+
+/**
+ * @ingroup IoctlArgDefines
+ *
+ * @def PARODD
+ *
+ * @brief Odd parity (else even)
+ */
+#ifdef PARODD
+#undef PARODD
+#endif
+#define PARODD 0x80
+
+/**
+ * @enum ixUARTMode
+ * @brief The mode to set to UART to.
+ */
+typedef enum
+{
+ INTERRUPT=0, /**< Interrupt mode */
+ POLLED, /**< Polled mode */
+ LOOPBACK /**< Loopback mode */
+} ixUARTMode;
+
+/**
+ * @struct ixUARTStats
+ * @brief Statistics for the UART.
+ */
+typedef struct
+{
+ UINT32 rxCount;
+ UINT32 txCount;
+ UINT32 overrunErr;
+ UINT32 parityErr;
+ UINT32 framingErr;
+ UINT32 breakErr;
+} ixUARTStats;
+
+/**
+ * @struct ixUARTDev
+ * @brief Device descriptor for the UART.
+ */
+typedef struct
+{
+ UINT8 *addr; /**< device base address */
+ ixUARTMode mode; /**< interrupt, polled or loopback */
+ int baudRate; /**< baud rate */
+ int freq; /**< UART clock frequency */
+ int options; /**< hardware options */
+ int fifoSize; /**< FIFO xmit size */
+
+ ixUARTStats stats; /**< device statistics */
+} ixUARTDev;
+
+/**
+ * @ingroup IxUARTAccAPI
+ *
+ * @fn IX_STATUS ixUARTInit(ixUARTDev* pUART)
+ *
+ * @param pUART @ref ixUARTDev [in] - pointer to UART structure describing our device.
+ *
+ * @brief Initialise the UART. This puts the chip in a quiescent state.
+ *
+ * @pre The base address for the UART must contain a valid value.
+ * Also the baud rate and hardware options must contain sensible values
+ * otherwise the defaults will be used as defined in ixUART.h
+ *
+ * @post UART is initialized and ready to send and receive data.
+ *
+ * @note This function should only be called once per device.
+ *
+ * @retval IX_SUCCESS - UART device successfully initialised.
+ * @retval IX_FAIL - Critical error, device not initialised.
+ ***************************************************************************/
+PUBLIC IX_STATUS ixUARTInit(ixUARTDev* pUART);
+
+/**
+ * @ingroup IxUARTAccAPI
+ *
+ * @fn IX_STATUS ixUARTPollOutput(ixUARTDev* pUART, int outChar)
+ *
+ * @param pUART @ref ixUARTDev [out] - pointer to UART structure describing our device.
+ * @param outChar int [out] - character to transmit.
+ *
+ * @brief Transmit a character in polled mode.
+ *
+ * @pre UART device must be initialised.
+ *
+ * @retval IX_SUCCESS - character was successfully transmitted.
+ * @retval IX_FAIL - output buffer is full (try again).
+ ***************************************************************************/
+PUBLIC IX_STATUS ixUARTPollOutput(ixUARTDev* pUART, int outChar);
+
+/**
+ * @ingroup IxUARTAccAPI
+ *
+ * @fn IX_STATUS ixUARTPollInput(ixUARTDev* pUART, char *inChar)
+ *
+ * @param pUART @ref ixUARTDev [in] - pointer to UART structure describing our device.
+ * @param *inChar char [in] - character read from the device.
+ *
+ * @brief Receive a character in polled mode.
+ *
+ * @pre UART device must be initialised.
+ *
+ * @retval IX_SUCCESS - character was successfully read.
+ * @retval IX_FAIL - input buffer empty (try again).
+ ***************************************************************************/
+PUBLIC IX_STATUS ixUARTPollInput(ixUARTDev* pUART, char *inChar);
+
+/**
+ * @ingroup IxUARTAccAPI
+ *
+ * @fn IX_STATUS ixUARTIoctl(ixUARTDev* pUART, int cmd, void* arg)
+ *
+ * @param pUART @ref ixUARTDev [in] - pointer to UART structure describing our device.
+ * @param cmd int [in] - an ioctl request code.
+ * @param arg void* [in] - optional argument used to set the device mode,
+ * baud rate, and hardware options.
+ *
+ * @brief Perform I/O control routines on the device.
+ *
+ * @retval IX_SUCCESS - requested feature was set/read successfully.
+ * @retval IX_FAIL - error setting/reading the requested feature.
+ *
+ * @sa IoctlCommandDefines
+ * @sa IoctlArgDefines
+ ***************************************************************************/
+PUBLIC IX_STATUS ixUARTIoctl(ixUARTDev* pUART, int cmd, void* arg);
+
+/**
+ * @} defgroup IxUARTAcc
+ */
diff --git a/cpu/ixp/npe/include/IxVersionId.h b/cpu/ixp/npe/include/IxVersionId.h
new file mode 100644
index 0000000000..27796ede84
--- /dev/null
+++ b/cpu/ixp/npe/include/IxVersionId.h
@@ -0,0 +1,155 @@
+/**
+ * @file IxVersionId.h
+ *
+ * @date 22-Aug-2002
+ *
+ * @brief This file contains the IXP400 Software version identifier
+ *
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ */
+
+/**
+ * @defgroup IxVersionId IXP400 Version ID (IxVersionId)
+ *
+ * @brief Version Identifiers
+ *
+ * @{
+ */
+
+#ifndef IXVERSIONID_H
+#define IXVERSIONID_H
+
+/**
+ * @brief Version Identifier String
+ *
+ * This string will be updated with each customer release of the IXP400
+ * Software.
+ */
+#define IX_VERSION_ID "2_0"
+
+/**
+ * This string will be updated with each customer release of the IXP400
+ * ADSL driver package.
+ */
+#define IX_VERSION_ADSL_ID "1_12"
+
+
+/**
+ * This string will be updated with each customer release of the IXP400
+ * USB Client driver package.
+ */
+#define IX_VERSION_USBRNDIS_ID "1_9"
+
+/**
+ * This string will be updated with each customer release of the IXP400
+ * I2C Linux driver package.
+ */
+#define IX_VERSION_I2C_LINUX_ID "1_0"
+
+/**
+ * @brief Linux Ethernet Driver Patch Version Identifier String
+ *
+ * This string will be updated with each release of Linux Ethernet Patch
+ */
+#define LINUX_ETHERNET_DRIVER_PATCH_ID "1_4"
+
+/**
+ * @brief Linux Integration Patch Version Identifier String
+ *
+ * This String will be updated with each release of Linux Integration Patch
+ */
+#define LINUX_INTEGRATION_PATCH_ID "1_3"
+
+/**
+ * @brief Linux Ethernet Readme version Identifier String
+ *
+ * This string will be updated with each release of Linux Ethernet Readme
+ */
+#define LINUX_ETHERNET_README_ID "1_3"
+
+/**
+ * @brief Linux Integration Readme version Identifier String
+ *
+ * This string will be updated with each release of Linux Integration Readme
+ */
+
+#define LINUX_INTEGRATION_README_ID "1_3"
+
+/**
+ * @brief Linux I2C driver Readme version Identifier String
+ *
+ * This string will be updated with each release of Linux I2C Driver Readme
+ */
+#define LINUX_I2C_DRIVER_README_ID "1_0"
+
+/**
+ * @brief ixp425_eth_update_nf_bridge.patch version Identifier String
+ *
+ * This string will be updated with each release of ixp425_eth_update_nf_bridge.
+patch
+ *
+ */
+
+#define IXP425_ETH_UPDATE_NF_BRIDGE_ID "1_3"
+
+/**
+ * @brief Internal Release Identifier String
+ *
+ * This string will be updated with each internal release (SQA drop)
+ * of the IXP400 Software.
+ */
+#define IX_VERSION_INTERNAL_ID "SQA3_5"
+
+/**
+ * @brief Compatible Tornado Version Identifier
+ */
+#define IX_VERSION_COMPATIBLE_TORNADO "Tornado2_2_1-PNE2_0"
+
+/**
+ * @brief Compatible Linux Version Identifier
+ */
+#define IX_VERSION_COMPATIBLE_LINUX "MVL3_1"
+
+
+#endif /* IXVERSIONID_H */
+
+/**
+ * @} addtogroup IxVersionId
+ */
diff --git a/cpu/ixp/npe/include/ix_error.h b/cpu/ixp/npe/include/ix_error.h
new file mode 100644
index 0000000000..d32ace20b5
--- /dev/null
+++ b/cpu/ixp/npe/include/ix_error.h
@@ -0,0 +1,66 @@
+/**
+ * ============================================================================
+ * = COPYRIGHT
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ * = PRODUCT
+ * Intel(r) IXP425 Software Release
+ *
+ * = FILENAME
+ * ix_error.h (Replaced by OSAL)
+ *
+ * = DESCRIPTION
+ * This file will describe the basic error type and support functions that
+ * will be used by the IXA SDK Framework API.
+ *
+ * = AUTHOR
+ * Intel Corporation
+ *
+ * = CHANGE HISTORY
+ * 4/22/2002 4:19:03 PM - creation time
+ * ============================================================================
+ */
+
+#if !defined(__IX_ERROR_H__)
+#define __IX_ERROR_H__
+
+#include "IxOsalBackward.h"
+
+#endif /* end !defined(__IX_ERROR_H__) */
+
diff --git a/cpu/ixp/npe/include/ix_macros.h b/cpu/ixp/npe/include/ix_macros.h
new file mode 100644
index 0000000000..53f5942f97
--- /dev/null
+++ b/cpu/ixp/npe/include/ix_macros.h
@@ -0,0 +1,266 @@
+/**
+ * ============================================================================
+ * = COPYRIGHT
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ * = PRODUCT
+ * Intel(r) IXP425 Software Release
+ *
+ * = FILENAME
+ * ix_macros.h
+ *
+ * = DESCRIPTION
+ * This file will define the basic preprocessor macros that are going to be used
+ * the IXA SDK Framework API.
+ *
+ * = AUTHOR
+ * Intel Corporation
+ *
+ * = CHANGE HISTORY
+ * 4/22/2002 4:41:05 PM - creation time
+ * ============================================================================
+ */
+
+#if !defined(__IX_MACROS_H__)
+#define __IX_MACROS_H__
+
+
+#if defined(__cplusplus)
+extern "C"
+{
+#endif /* end defined(__cplusplus) */
+
+
+/**
+ * MACRO NAME: IX_BIT_FIELD_MASK16
+ *
+ * DESCRIPTION: Builds the mask required to extract the bit field from a 16 bit unsigned integer value.
+ *
+ * @Param: - IN arg_FieldLSBBit an unsigned integer value representing the position of the least significant
+ * bit of the bit field.
+ * @Param: - IN arg_FieldMSBBit an unsigned integer value representing the position of the most significant
+ * bit of the bit field.
+ *
+ * @Return: Returns a 16 bit mask that will extract the bit field from a 16 bit unsigned integer value.
+ */
+#define IX_BIT_FIELD_MASK16( \
+ arg_FieldLSBBit, \
+ arg_FieldMSBBit \
+ ) \
+ ((ix_bit_mask16)((((ix_uint16)1 << (arg_FieldMSBBit + 1 - arg_FieldLSBBit)) - \
+ (ix_uint16)1) << arg_FieldLSBBit))
+
+
+
+/**
+ * MACRO NAME: IX_GET_BIT_FIELD16
+ *
+ * DESCRIPTION: Extracts a bit field from 16 bit unsigned integer. The returned value is normalized in
+ * in the sense that will be right aligned.
+ *
+ * @Param: - IN arg_PackedData16 a 16 bit unsigned integer that contains the bit field of interest.
+ * @Param: - IN arg_FieldLSBBit an unsigned integer value representing the position of the least significant
+ * bit of the bit field.
+ * @Param: - IN arg_FieldMSBBit an unsigned integer value representing the position of the most significant
+ * bit of the bit field.
+ *
+ * @Return: Returns the value of the bit field. The value can be from 0 to (1 << (arg_FieldMSBBit + 1 -
+ * arg_FieldLSBBit)) - 1.
+ */
+#define IX_GET_BIT_FIELD16( \
+ arg_PackedData16, \
+ arg_FieldLSBBit, \
+ arg_FieldMSBBit \
+ ) \
+ (((ix_uint16)(arg_PackedData16) & IX_BIT_FIELD_MASK16(arg_FieldLSBBit, arg_FieldMSBBit)) >> \
+ arg_FieldLSBBit)
+
+
+/**
+ * MACRO NAME: IX_MAKE_BIT_FIELD16
+ *
+ * DESCRIPTION: This macro will create a temporary 16 bit value with the bit field
+ * desired set to the desired value.
+ *
+ * @Param: - IN arg_BitFieldValue is the new value of the bit field. The value can be from 0 to
+ * (1 << (arg_FieldMSBBit + 1 - arg_FieldLSBBit)) - 1.
+ * @Param: - IN arg_FieldLSBBit an unsigned integer value representing the position of the least significant
+ * bit of the bit field.
+ * @Param: - IN arg_FieldMSBBit an unsigned integer value representing the position of the most significant
+ * bit of the bit field.
+ *
+ * @Return: Returns a temporary ix_uint16 value that has the bit field set to the appropriate value.
+ */
+#define IX_MAKE_BIT_FIELD16( \
+ arg_BitFieldValue, \
+ arg_FieldLSBBit, \
+ arg_FieldMSBBit \
+ ) \
+ (((ix_uint16)(arg_BitFieldValue) << arg_FieldLSBBit) & \
+ IX_BIT_FIELD_MASK16(arg_FieldLSBBit, arg_FieldMSBBit))
+
+/**
+ * MACRO NAME: IX_SET_BIT_FIELD16
+ *
+ * DESCRIPTION: Sets a new value for a bit field from a 16 bit unsigned integer.
+ *
+ * @Param: - IN arg_PackedData16 a 16 bit unsigned integer that contains the bit field of interest.
+ * @Param: - IN arg_BitFieldValue is the new vale of the bit field. The value can be from 0 to
+ * (1 << (arg_FieldMSBBit + 1 - arg_FieldLSBBit)) - 1.
+ * @Param: - IN arg_FieldLSBBit an unsigned integer value representing the position of the least significant
+ * bit of the bit field.
+ * @Param: - IN arg_FieldMSBBit an unsigned integer value representing the position of the most significant
+ * bit of the bit field.
+ *
+ * @Return: Returns the updated value of arg_PackedData16.
+ */
+#define IX_SET_BIT_FIELD16( \
+ arg_PackedData16, \
+ arg_BitFieldValue, \
+ arg_FieldLSBBit, \
+ arg_FieldMSBBit \
+ ) \
+ (arg_PackedData16 = (((ix_uint16)(arg_PackedData16) & \
+ ~(IX_BIT_FIELD_MASK16(arg_FieldLSBBit, arg_FieldMSBBit))) | \
+ IX_MAKE_BIT_FIELD16(arg_BitFieldValue, arg_FieldLSBBit, arg_FieldMSBBit)))
+
+
+/**
+ * MACRO NAME: IX_BIT_FIELD_MASK32
+ *
+ * DESCRIPTION: Builds the mask required to extract the bit field from a 32 bit unsigned integer value.
+ *
+ * @Param: - IN arg_FieldLSBBit an unsigned integer value representing the position of the least significant
+ * bit of the bit field.
+ * @Param: - IN arg_FieldMSBBit an unsigned integer value representing the position of the most significant
+ * bit of the bit field.
+ *
+ * @Return: Returns a 32 bit mask that will extract the bit field from a 32 bit unsigned integer value.
+ */
+#define IX_BIT_FIELD_MASK32( \
+ arg_FieldLSBBit, \
+ arg_FieldMSBBit \
+ ) \
+ ((ix_bit_mask32)((((ix_uint32)1 << (arg_FieldMSBBit + 1 - arg_FieldLSBBit)) - \
+ (ix_uint32)1) << arg_FieldLSBBit))
+
+
+
+/**
+ * MACRO NAME: IX_GET_BIT_FIELD32
+ *
+ * DESCRIPTION: Extracts a bit field from 32 bit unsigned integer. The returned value is normalized in
+ * in the sense that will be right aligned.
+ *
+ * @Param: - IN arg_PackedData32 a 32 bit unsigned integer that contains the bit field of interest.
+ * @Param: - IN arg_FieldLSBBit an unsigned integer value representing the position of the least significant
+ * bit of the bit field.
+ * @Param: - IN arg_FieldMSBBit an unsigned integer value representing the position of the most significant
+ * bit of the bit field.
+ *
+ * @Return: Returns the value of the bit field. The value can be from 0 to (1 << (arg_FieldMSBBit + 1 -
+ * arg_FieldLSBBit)) - 1.
+ */
+#define IX_GET_BIT_FIELD32( \
+ arg_PackedData32, \
+ arg_FieldLSBBit, \
+ arg_FieldMSBBit \
+ ) \
+ (((ix_uint32)(arg_PackedData32) & IX_BIT_FIELD_MASK32(arg_FieldLSBBit, arg_FieldMSBBit)) >> \
+ arg_FieldLSBBit)
+
+
+
+
+/**
+ * MACRO NAME: IX_MAKE_BIT_FIELD32
+ *
+ * DESCRIPTION: This macro will create a temporary 32 bit value with the bit field
+ * desired set to the desired value.
+ *
+ * @Param: - IN arg_BitFieldValue is the new value of the bit field. The value can be from 0 to
+ * (1 << (arg_FieldMSBBit + 1 - arg_FieldLSBBit)) - 1.
+ * @Param: - IN arg_FieldLSBBit an unsigned integer value representing the position of the least significant
+ * bit of the bit field.
+ * @Param: - IN arg_FieldMSBBit an unsigned integer value representing the position of the most significant
+ * bit of the bit field.
+ *
+ * @Return: Returns a temporary ix_uint32 value that has the bit field set to the appropriate value.
+ */
+#define IX_MAKE_BIT_FIELD32( \
+ arg_BitFieldValue, \
+ arg_FieldLSBBit, \
+ arg_FieldMSBBit \
+ ) \
+ (((ix_uint32)(arg_BitFieldValue) << arg_FieldLSBBit) & \
+ IX_BIT_FIELD_MASK32(arg_FieldLSBBit, arg_FieldMSBBit))
+
+
+/**
+ * MACRO NAME: IX_SET_BIT_FIELD32
+ *
+ * DESCRIPTION: Sets a new value for a bit field from a 32 bit unsigned integer.
+ *
+ * @Param: - IN arg_PackedData32 a 32 bit unsigned integer that contains the bit field of interest.
+ * @Param: - IN arg_BitFieldValue is the new value of the bit field. The value can be from 0 to
+ * (1 << (arg_FieldMSBBit + 1 - arg_FieldLSBBit)) - 1.
+ * @Param: - IN arg_FieldLSBBit an unsigned integer value representing the position of the least significant
+ * bit of the bit field.
+ * @Param: - IN arg_FieldMSBBit an unsigned integer value representing the position of the most significant
+ * bit of the bit field.
+ *
+ * @Return: Returns the updated value of arg_PackedData32.
+ */
+#define IX_SET_BIT_FIELD32( \
+ arg_PackedData32, \
+ arg_BitFieldValue, \
+ arg_FieldLSBBit, \
+ arg_FieldMSBBit \
+ ) \
+ (arg_PackedData32 = (((ix_uint32)(arg_PackedData32) & \
+ ~(IX_BIT_FIELD_MASK32(arg_FieldLSBBit, arg_FieldMSBBit))) | \
+ IX_MAKE_BIT_FIELD32(arg_BitFieldValue, arg_FieldLSBBit, arg_FieldMSBBit)))
+
+
+
+#if defined(__cplusplus)
+}
+#endif /* end defined(__cplusplus) */
+
+#endif /* end !defined(__IX_MACROS_H__) */
diff --git a/cpu/ixp/npe/include/ix_os_type.h b/cpu/ixp/npe/include/ix_os_type.h
new file mode 100644
index 0000000000..8575096722
--- /dev/null
+++ b/cpu/ixp/npe/include/ix_os_type.h
@@ -0,0 +1,65 @@
+/**
+ * ============================================================================
+ * = COPYRIGHT
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ * = PRODUCT
+ * Intel(r) IXP425 Software Release
+ *
+ * = FILENAME
+ * ix_os_type.h (Replaced by OSAL)
+ *
+ * = DESCRIPTION
+ * This file provides protable symbol definitions for the current OS type.
+ *
+ * = AUTHOR
+ * Intel Corporation
+ *
+ * = CHANGE HISTORY
+ * 4/22/2002 4:43:30 PM - creation time
+ * ============================================================================
+ */
+
+#if !defined(__IX_OS_TYPE_H__)
+#define __IX_OS_TYPE_H__
+
+#include "IxOsalBackward.h"
+
+#endif /* end !defined(__IX_OS_TYPE_H__) */
+
diff --git a/cpu/ixp/npe/include/ix_ossl.h b/cpu/ixp/npe/include/ix_ossl.h
new file mode 100644
index 0000000000..b59f7d0873
--- /dev/null
+++ b/cpu/ixp/npe/include/ix_ossl.h
@@ -0,0 +1,160 @@
+/**
+ * ============================================================================
+ * = COPYRIGHT
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ * = PRODUCT
+ * Intel(r) IXP425 Software Release
+ *
+ * = LIBRARY
+ * OSSL - Operating System Services Library
+ *
+ * = MODULE
+ * OSSL Abstraction layer header file
+ *
+ * = FILENAME
+ * ix_ossl.h (Replaced by OSAL)
+ *
+ * = DESCRIPTION
+ * This file contains the prototypes of OS-independent wrapper
+ * functions which allow the programmer not to be tied to a specific
+ * operating system. The OSSL functions can be divided into three classes:
+ *
+ * 1) synchronization-related wrapper functions around thread system calls
+ * 2) thread-related wrapper functions around thread calls
+ * 3) transactor/workbench osapi calls -- defined in osApi.h
+ *
+ * Both 1 and 2 classes of functions provide Thread Management, Thread
+ * Synchronization, Mutual Exclusion and Timer primitives. Namely,
+ * creation and deletion functions as well as the standard "wait" and
+ * "exit". Additionally, a couple of utility functions which enable to
+ * pause the execution of a thread are also provided.
+ *
+ * The 3rd class provides a slew of other OSAPI functions to handle
+ * Transactor/WorkBench OS calls.
+ *
+ *
+ * OSSL Thread APIs:
+ * The OSSL thread functions that allow for thread creation,
+ * get thread id, thread deletion and set thread priroity.
+ *
+ * ix_ossl_thread_create
+ * ix_ossl_thread_get_id
+ * ix_ossl_thread_exit
+ * ix_ossl_thread_kill
+ * ix_ossl_thread_set_priority
+ * ix_ossl_thread__delay
+ *
+ * OSSL Semaphore APIs:
+ * The OSSL semaphore functions that allow for initialization,
+ * posting, waiting and deletion of semaphores.
+ *
+ * ix_ossl_sem_init
+ * ix_ossl_sem_fini
+ * ix_ossl_sem_take
+ * ix_ossl_sem_give
+ * ix_ossl_sem_flush
+ *
+ * OSSL Mutex APIs:
+ * The OSSL wrapper functions that allow for initialization,
+ * posting, waiting and deletion of mutexes.
+ *
+ * ix_ossl_mutex_init
+ * ix_ossl_mutex_fini
+ * ix_ossl_mutex_lock
+ * ix_ossl_mutex_unlock
+ *
+ * OSSL Timer APIs:
+ * The timer APIs provide sleep and get time functions.
+ *
+ * ix_ossl_sleep
+ * ix_ossl_sleep_tick
+ * ix_ossl_time_get
+ *
+ * OSAPIs for Transactor/WorkBench:
+ * These OSAPI functions are used for transator OS calls.
+ * They are defined in osApi.h.
+ *
+ * Sem_Init
+ * Sem_Destroy
+ * Sem_Wait
+ * Sem_Wait
+ * Thread_Create
+ * Thread_Cancel
+ * Thread_SetPriority
+ * delayMs
+ * delayTick
+ *
+ *
+ *
+ **********************************************************************
+ *
+ *
+ * = AUTHOR
+ * Intel Corporation
+ *
+ * = ACKNOWLEDGEMENTS
+ *
+ *
+ * = CREATION TIME
+ * 1/8/2002 1:53:42 PM
+ *
+ * = CHANGE HISTORY
+ * 02/22/2002 : Renamed osapi.h os_api.h
+ * Moved OS header file includes from OSSL.h to os_api.h
+ * Moved OS specific datatypes to os_api.h
+ * Modified data types, macros and functions as per
+ * 'C' coding guidelines.
+ *
+ *
+ * ============================================================================
+ */
+
+#ifndef _IX_OSSL_H
+#ifndef __doxygen_hide
+#define _IX_OSSL_H
+#endif /* __doxygen_hide */
+
+#include "IxOsalBackward.h"
+
+#endif /* _IX_OSSL_H */
+
+/**
+ * @} defgroup IxOSSL
+ */
diff --git a/cpu/ixp/npe/include/ix_symbols.h b/cpu/ixp/npe/include/ix_symbols.h
new file mode 100644
index 0000000000..f7bb029d66
--- /dev/null
+++ b/cpu/ixp/npe/include/ix_symbols.h
@@ -0,0 +1,106 @@
+/**
+ * ============================================================================
+ * = COPYRIGHT
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ * = PRODUCT
+ * Intel(r) IXP425 Software Release
+ *
+ * = FILENAME
+ * ix_symbols.h
+ *
+ * = DESCRIPTION
+ * This file declares all the global preprocessor symbols required by
+ * the IXA SDK Framework API.
+ *
+ * = AUTHOR
+ * Intel Corporation
+ *
+ * = CHANGE HISTORY
+ * 4/23/2002 10:41:13 AM - creation time
+ * ============================================================================
+ */
+
+#if !defined(__IX_SYMBOLS_H__)
+#define __IX_SYMBOLS_H__
+
+
+#if defined(__cplusplus)
+extern "C"
+{
+#endif /* end defined(__cplusplus) */
+
+/**
+ * The IX_EXPORT_FUNCTION symbol will be used for compilation on different platforms.
+ * We are planning to provide a simulation version of the library that should work
+ * with the Transactor rather than the hardware. This implementation will be done on
+ * WIN32 in the form of a DLL that will need to export functions and symbols.
+ */
+#if (_IX_OS_TYPE_ == _IX_OS_WIN32_)
+# if defined(_IX_LIB_INTERFACE_IMPLEMENTATION_)
+# define IX_EXPORT_FUNCTION __declspec( dllexport )
+# elif defined(_IX_LIB_INTERFACE_IMPORT_DLL_)
+# define IX_EXPORT_FUNCTION __declspec( dllimport )
+# else
+# define IX_EXPORT_FUNCTION extern
+# endif
+#elif (_IX_OS_TYPE_ == _IX_OS_WINCE_)
+# define IX_EXPORT_FUNCTION __declspec(dllexport)
+#else
+# define IX_EXPORT_FUNCTION extern
+#endif
+
+
+/**
+ * This symbols should be defined when we want to build for a multithreaded environment
+ */
+#define _IX_MULTI_THREADED_ 1
+
+
+/**
+ * This symbol should be defined in the case we to buils for a multithreaded environment
+ * but we want that our modules to work as if they are used in a single threaded environment.
+ */
+/* #define _IX_RM_EXPLICIT_SINGLE_THREADED_ 1 */
+
+#if defined(__cplusplus)
+}
+#endif /* end defined(__cplusplus) */
+
+#endif /* end !defined(__IX_SYMBOLS_H__) */
diff --git a/cpu/ixp/npe/include/ix_types.h b/cpu/ixp/npe/include/ix_types.h
new file mode 100644
index 0000000000..fc7b1e993a
--- /dev/null
+++ b/cpu/ixp/npe/include/ix_types.h
@@ -0,0 +1,208 @@
+/**
+ * ============================================================================
+ * = COPYRIGHT
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ * = PRODUCT
+ * Intel(r) IXP425 Software Release
+ *
+ * = FILENAME
+ * ix_types.h
+ *
+ * = DESCRIPTION
+ * This file will define generic types that will guarantee the protability
+ * between different architectures and compilers. It should be used the entire
+ * IXA SDK Framework API.
+ *
+ * = AUTHOR
+ * Intel Corporation
+ *
+ * = CHANGE HISTORY
+ * 4/22/2002 4:44:17 PM - creation time
+ * ============================================================================
+ */
+
+#if !defined(__IX_TYPES_H__)
+#define __IX_TYPES_H__
+
+
+#if defined(__cplusplus)
+extern "C"
+{
+#endif /* end defined(__cplusplus) */
+
+
+/**
+ * Define generic integral data types that will guarantee the size.
+ */
+
+/**
+ * TYPENAME: ix_int8
+ *
+ * DESCRIPTION: This type defines an 8 bit signed integer value.
+ *
+ */
+typedef signed char ix_int8;
+
+
+/**
+ * TYPENAME: ix_uint8
+ *
+ * DESCRIPTION: This type defines an 8 bit unsigned integer value.
+ *
+ */
+typedef unsigned char ix_uint8;
+
+
+/**
+ * TYPENAME: ix_int16
+ *
+ * DESCRIPTION: This type defines an 16 bit signed integer value.
+ *
+ */
+typedef signed short int ix_int16;
+
+
+/**
+ * TYPENAME: ix_uint16
+ *
+ * DESCRIPTION: This type defines an 16 bit unsigned integer value.
+ *
+ */
+typedef unsigned short int ix_uint16;
+
+
+/**
+ * TYPENAME: ix_int32
+ *
+ * DESCRIPTION: This type defines an 32 bit signed integer value.
+ *
+ */
+typedef signed int ix_int32;
+
+
+/**
+ * TYPENAME: ix_uint32
+ *
+ * DESCRIPTION: This type defines an 32 bit unsigned integer value.
+ *
+ */
+#ifndef __wince
+typedef unsigned int ix_uint32;
+#else
+typedef unsigned long ix_uint32;
+#endif
+
+/**
+ * TYPENAME: ix_int64
+ *
+ * DESCRIPTION: This type defines an 64 bit signed integer value.
+ *
+ */
+#ifndef __wince
+__extension__ typedef signed long long int ix_int64;
+#endif
+
+/**
+ * TYPENAME: ix_uint64
+ *
+ * DESCRIPTION: This type defines an 64 bit unsigned integer value.
+ *
+ */
+#ifndef __wince
+__extension__ typedef unsigned long long int ix_uint64;
+#endif
+
+
+/**
+ * TYPENAME: ix_bit_mask8
+ *
+ * DESCRIPTION: This is a generic type for a 8 bit mask.
+ */
+typedef ix_uint8 ix_bit_mask8;
+
+
+/**
+ * TYPENAME: ix_bit_mask16
+ *
+ * DESCRIPTION: This is a generic type for a 16 bit mask.
+ */
+typedef ix_uint16 ix_bit_mask16;
+
+
+/**
+ * TYPENAME: ix_bit_mask32
+ *
+ * DESCRIPTION: This is a generic type for a 32 bit mask.
+ */
+typedef ix_uint32 ix_bit_mask32;
+
+
+/**
+ * TYPENAME: ix_bit_mask64
+ *
+ * DESCRIPTION: This is a generic type for a 64 bit mask.
+ */
+#ifndef __wince
+typedef ix_uint64 ix_bit_mask64;
+#endif
+
+
+/**
+ * TYPENAME: ix_handle
+ *
+ * DESCRIPTION: This type defines a generic handle.
+ *
+ */
+typedef ix_uint32 ix_handle;
+
+
+
+/**
+ * DESCRIPTION: This symbol defines a NULL handle
+ *
+ */
+#define IX_NULL_HANDLE ((ix_handle)0)
+
+
+#if defined(__cplusplus)
+}
+#endif /* end defined(__cplusplus) */
+
+#endif /* end !defined(__IX_TYPES_H__) */
diff --git a/cpu/ixp/npe/include/npe.h b/cpu/ixp/npe/include/npe.h
new file mode 100644
index 0000000000..e53458defb
--- /dev/null
+++ b/cpu/ixp/npe/include/npe.h
@@ -0,0 +1,90 @@
+/*
+ * (C) Copyright 2005
+ * Stefan Roese, DENX Software Engineering, sr@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef NPE_H
+#define NPE_H
+
+/*
+ * defines...
+ */
+#define CFG_NPE_NUMS 1
+#ifdef CONFIG_HAS_ETH1
+#undef CFG_NPE_NUMS
+#define CFG_NPE_NUMS 2
+#endif
+
+#define NPE_NUM_PORTS 3
+#define ACTIVE_PORTS 1
+
+#define NPE_PKT_SIZE 1600
+
+#define CONFIG_DEVS_ETH_INTEL_NPE_MAX_RX_DESCRIPTORS 64
+#define CONFIG_DEVS_ETH_INTEL_NPE_MAX_TX_DESCRIPTORS 2
+
+#define NPE_MBUF_POOL_SIZE \
+ ((CONFIG_DEVS_ETH_INTEL_NPE_MAX_TX_DESCRIPTORS + \
+ CONFIG_DEVS_ETH_INTEL_NPE_MAX_RX_DESCRIPTORS) * \
+ sizeof(IX_OSAL_MBUF) * ACTIVE_PORTS)
+
+#define NPE_PKT_POOL_SIZE \
+ ((CONFIG_DEVS_ETH_INTEL_NPE_MAX_TX_DESCRIPTORS + \
+ CONFIG_DEVS_ETH_INTEL_NPE_MAX_RX_DESCRIPTORS) * \
+ NPE_PKT_SIZE * ACTIVE_PORTS)
+
+#define NPE_MEM_POOL_SIZE (NPE_MBUF_POOL_SIZE + NPE_PKT_POOL_SIZE)
+
+#define PHY_AUTONEGOTIATE_TIMEOUT 4000 /* 4000 ms autonegotiate timeout */
+
+/*
+ * structs...
+ */
+struct npe {
+ u8 active; /* NPE active */
+ u8 eth_id; /* IX_ETH_PORT_1 or IX_ETH_PORT_2 */
+ u8 phy_no; /* which PHY (0 - 31) */
+ u8 mac_address[6];
+
+ IX_OSAL_MBUF *rxQHead;
+ IX_OSAL_MBUF *txQHead;
+
+ u8 *tx_pkts;
+ u8 *rx_pkts;
+ IX_OSAL_MBUF *rx_mbufs;
+ IX_OSAL_MBUF *tx_mbufs;
+
+ int print_speed;
+
+ int rx_read;
+ int rx_write;
+ int rx_len[PKTBUFSRX];
+};
+
+/*
+ * prototypes...
+ */
+extern int npe_miiphy_read (char *devname, unsigned char addr,
+ unsigned char reg, unsigned short *value);
+extern int npe_miiphy_write (char *devname, unsigned char addr,
+ unsigned char reg, unsigned short value);
+
+#endif /* ifndef NPE_H */
diff --git a/cpu/ixp/npe/include/os_datatypes.h b/cpu/ixp/npe/include/os_datatypes.h
new file mode 100644
index 0000000000..4387b2a052
--- /dev/null
+++ b/cpu/ixp/npe/include/os_datatypes.h
@@ -0,0 +1,82 @@
+/**
+ * ============================================================================
+ * = COPYRIGHT
+ *
+ * @par
+ * IXP400 SW Release version 2.0
+ *
+ * -- Copyright Notice --
+ *
+ * @par
+ * Copyright 2001-2005, Intel Corporation.
+ * All rights reserved.
+ *
+ * @par
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @par
+ * -- End of Copyright Notice --
+ * = PRODUCT
+ * Intel(r) IXP425 Software Release
+ *
+ * = LIBRARY
+ * OSSL - Operating System Services Library
+ *
+ * = MODULE
+ * OS Specific Data Types header file
+ *
+ * = FILENAME
+ * OSSL.h (Replaced by OSAL)
+ *
+ * = DESCRIPTION
+ * This file contains definitions and encapsulations for OS specific data types. These
+ * encapsulated data types are used by OSSL header files and OS API functions.
+ *
+ *
+ **********************************************************************
+ *
+ *
+ * = AUTHOR
+ * Intel Corporation
+ *
+ * = AKNOWLEDGEMENTS
+ *
+ *
+ * = CREATION TIME
+ * 1/8/2002 1:53:42 PM
+ *
+ * = CHANGE HISTORY
+
+ * ============================================================================
+ */
+
+#ifndef _OS_DATATYPES_H
+#define _OS_DATATYPES_H
+
+#include "IxOsalBackward.h"
+
+#endif /* _OS_DATATYPES_H */
+
diff --git a/cpu/ixp/npe/miiphy.c b/cpu/ixp/npe/miiphy.c
new file mode 100644
index 0000000000..c63c54e28f
--- /dev/null
+++ b/cpu/ixp/npe/miiphy.c
@@ -0,0 +1,118 @@
+/*-----------------------------------------------------------------------------+
+ |
+ | This source code has been made available to you by IBM on an AS-IS
+ | basis. Anyone receiving this source is licensed under IBM
+ | copyrights to use it in any way he or she deems fit, including
+ | copying it, modifying it, compiling it, and redistributing it either
+ | with or without modifications. No license under IBM patents or
+ | patent applications is to be implied by the copyright license.
+ |
+ | Any user of this software should understand that IBM cannot provide
+ | technical support for this software and will not be responsible for
+ | any consequences resulting from the use of this software.
+ |
+ | Any person who transfers this source code or any derivative work
+ | must include the IBM copyright notice, this paragraph, and the
+ | preceding two paragraphs in the transferred software.
+ |
+ | COPYRIGHT I B M CORPORATION 1995
+ | LICENSED MATERIAL - PROGRAM PROPERTY OF I B M
+ +-----------------------------------------------------------------------------*/
+/*-----------------------------------------------------------------------------+
+ |
+ | File Name: miiphy.c
+ |
+ | Function: This module has utilities for accessing the MII PHY through
+ | the EMAC3 macro.
+ |
+ | Author: Mark Wisner
+ |
+ | Change Activity-
+ |
+ | Date Description of Change BY
+ | --------- --------------------- ---
+ | 05-May-99 Created MKW
+ | 01-Jul-99 Changed clock setting of sta_reg from 66Mhz to 50Mhz to
+ | better match OPB speed. Also modified delay times. JWB
+ | 29-Jul-99 Added Full duplex support MKW
+ | 24-Aug-99 Removed printf from dp83843_duplex() JWB
+ | 19-Jul-00 Ported to esd cpci405 sr
+ | 23-Dec-03 Ported from miiphy.c to 440GX Travis Sawyer TBS
+ | <travis.sawyer@sandburst.com>
+ |
+ +-----------------------------------------------------------------------------*/
+
+#include <common.h>
+#include <miiphy.h>
+#include "IxOsal.h"
+#include "IxEthAcc.h"
+#include "IxEthAcc_p.h"
+#include "IxEthAccMac_p.h"
+#include "IxEthAccMii_p.h"
+
+/***********************************************************/
+/* Dump out to the screen PHY regs */
+/***********************************************************/
+
+void miiphy_dump (char *devname, unsigned char addr)
+{
+ unsigned long i;
+ unsigned short data;
+
+
+ for (i = 0; i < 0x1A; i++) {
+ if (miiphy_read (devname, addr, i, &data)) {
+ printf ("read error for reg %lx\n", i);
+ return;
+ }
+ printf ("Phy reg %lx ==> %4x\n", i, data);
+
+ /* jump to the next set of regs */
+ if (i == 0x07)
+ i = 0x0f;
+
+ } /* end for loop */
+} /* end dump */
+
+
+/***********************************************************/
+/* (Re)start autonegotiation */
+/***********************************************************/
+int phy_setup_aneg (char *devname, unsigned char addr)
+{
+ unsigned short ctl, adv;
+
+ /* Setup standard advertise */
+ miiphy_read (devname, addr, PHY_ANAR, &adv);
+ adv |= (PHY_ANLPAR_ACK | PHY_ANLPAR_RF | PHY_ANLPAR_T4 |
+ PHY_ANLPAR_TXFD | PHY_ANLPAR_TX | PHY_ANLPAR_10FD |
+ PHY_ANLPAR_10);
+ miiphy_write (devname, addr, PHY_ANAR, adv);
+
+ /* Start/Restart aneg */
+ miiphy_read (devname, addr, PHY_BMCR, &ctl);
+ ctl |= (PHY_BMCR_AUTON | PHY_BMCR_RST_NEG);
+ miiphy_write (devname, addr, PHY_BMCR, ctl);
+
+ return 0;
+}
+
+
+int npe_miiphy_read (char *devname, unsigned char addr,
+ unsigned char reg, unsigned short *value)
+{
+ u16 val;
+
+ ixEthAccMiiReadRtn(addr, reg, &val);
+ *value = val;
+
+ return 0;
+} /* phy_read */
+
+
+int npe_miiphy_write (char *devname, unsigned char addr,
+ unsigned char reg, unsigned short value)
+{
+ ixEthAccMiiWriteRtn(addr, reg, value);
+ return 0;
+} /* phy_write */
diff --git a/cpu/ixp/npe/npe.c b/cpu/ixp/npe/npe.c
new file mode 100644
index 0000000000..ab7ca8bef0
--- /dev/null
+++ b/cpu/ixp/npe/npe.c
@@ -0,0 +1,694 @@
+/*
+ * (C) Copyright 2005-2006
+ * Stefan Roese, DENX Software Engineering, sr@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#if 0
+#define DEBUG /* define for debug output */
+#endif
+
+#include <config.h>
+#include <common.h>
+#include <net.h>
+#include <miiphy.h>
+#include <malloc.h>
+#include <asm/processor.h>
+#include <asm/arch-ixp/ixp425.h>
+
+#include <IxOsal.h>
+#include <IxEthAcc.h>
+#include <IxEthDB.h>
+#include <IxNpeDl.h>
+#include <IxQMgr.h>
+#include <IxNpeMh.h>
+#include <ix_ossl.h>
+#include <IxFeatureCtrl.h>
+
+#include <npe.h>
+
+#ifdef CONFIG_IXP4XX_NPE
+
+static IxQMgrDispatcherFuncPtr qDispatcherFunc = NULL;
+static int npe_exists[NPE_NUM_PORTS];
+static int npe_used[NPE_NUM_PORTS];
+
+/* A little extra so we can align to cacheline. */
+static u8 npe_alloc_pool[NPE_MEM_POOL_SIZE + CFG_CACHELINE_SIZE - 1];
+static u8 *npe_alloc_end;
+static u8 *npe_alloc_free;
+
+static void *npe_alloc(int size)
+{
+ static int count = 0;
+ void *p = NULL;
+
+ size = (size + (CFG_CACHELINE_SIZE-1)) & ~(CFG_CACHELINE_SIZE-1);
+ count++;
+
+ if ((npe_alloc_free + size) < npe_alloc_end) {
+ p = npe_alloc_free;
+ npe_alloc_free += size;
+ } else {
+ printf("%s: failed (count=%d, size=%d)!\n", count, size);
+ }
+ return p;
+}
+
+/* Not interrupt safe! */
+static void mbuf_enqueue(IX_OSAL_MBUF **q, IX_OSAL_MBUF *new)
+{
+ IX_OSAL_MBUF *m = *q;
+
+ IX_OSAL_MBUF_NEXT_PKT_IN_CHAIN_PTR(new) = NULL;
+
+ if (m) {
+ while(IX_OSAL_MBUF_NEXT_PKT_IN_CHAIN_PTR(m))
+ m = IX_OSAL_MBUF_NEXT_PKT_IN_CHAIN_PTR(m);
+ IX_OSAL_MBUF_NEXT_PKT_IN_CHAIN_PTR(m) = new;
+ } else
+ *q = new;
+}
+
+/* Not interrupt safe! */
+static IX_OSAL_MBUF *mbuf_dequeue(IX_OSAL_MBUF **q)
+{
+ IX_OSAL_MBUF *m = *q;
+ if (m)
+ *q = IX_OSAL_MBUF_NEXT_PKT_IN_CHAIN_PTR(m);
+ return m;
+}
+
+static void reset_tx_mbufs(struct npe* p_npe)
+{
+ IX_OSAL_MBUF *m;
+ int i;
+
+ p_npe->txQHead = NULL;
+
+ for (i = 0; i < CONFIG_DEVS_ETH_INTEL_NPE_MAX_TX_DESCRIPTORS; i++) {
+ m = &p_npe->tx_mbufs[i];
+
+ memset(m, 0, sizeof(*m));
+
+ IX_OSAL_MBUF_MDATA(m) = (void *)&p_npe->tx_pkts[i * NPE_PKT_SIZE];
+ IX_OSAL_MBUF_MLEN(m) = IX_OSAL_MBUF_PKT_LEN(m) = NPE_PKT_SIZE;
+ mbuf_enqueue(&p_npe->txQHead, m);
+ }
+}
+
+static void reset_rx_mbufs(struct npe* p_npe)
+{
+ IX_OSAL_MBUF *m;
+ int i;
+
+ p_npe->rxQHead = NULL;
+
+ HAL_DCACHE_INVALIDATE(p_npe->rx_pkts, NPE_PKT_SIZE *
+ CONFIG_DEVS_ETH_INTEL_NPE_MAX_RX_DESCRIPTORS);
+
+ for (i = 0; i < CONFIG_DEVS_ETH_INTEL_NPE_MAX_RX_DESCRIPTORS; i++) {
+ m = &p_npe->rx_mbufs[i];
+
+ memset(m, 0, sizeof(*m));
+
+ IX_OSAL_MBUF_MDATA(m) = (void *)&p_npe->rx_pkts[i * NPE_PKT_SIZE];
+ IX_OSAL_MBUF_MLEN(m) = IX_OSAL_MBUF_PKT_LEN(m) = NPE_PKT_SIZE;
+
+ if(ixEthAccPortRxFreeReplenish(p_npe->eth_id, m) != IX_SUCCESS) {
+ printf("ixEthAccPortRxFreeReplenish failed for port %d\n", p_npe->eth_id);
+ break;
+ }
+ }
+}
+
+static void init_rx_mbufs(struct npe* p_npe)
+{
+ p_npe->rxQHead = NULL;
+
+ p_npe->rx_pkts = npe_alloc(NPE_PKT_SIZE *
+ CONFIG_DEVS_ETH_INTEL_NPE_MAX_RX_DESCRIPTORS);
+ if (p_npe->rx_pkts == NULL) {
+ printf("alloc of packets failed.\n");
+ return;
+ }
+
+ p_npe->rx_mbufs = (IX_OSAL_MBUF *)
+ npe_alloc(sizeof(IX_OSAL_MBUF) *
+ CONFIG_DEVS_ETH_INTEL_NPE_MAX_RX_DESCRIPTORS);
+ if (p_npe->rx_mbufs == NULL) {
+ printf("alloc of mbufs failed.\n");
+ return;
+ }
+
+ reset_rx_mbufs(p_npe);
+}
+
+static void init_tx_mbufs(struct npe* p_npe)
+{
+ p_npe->tx_pkts = npe_alloc(NPE_PKT_SIZE *
+ CONFIG_DEVS_ETH_INTEL_NPE_MAX_TX_DESCRIPTORS);
+ if (p_npe->tx_pkts == NULL) {
+ printf("alloc of packets failed.\n");
+ return;
+ }
+
+ p_npe->tx_mbufs = (IX_OSAL_MBUF *)
+ npe_alloc(sizeof(IX_OSAL_MBUF) *
+ CONFIG_DEVS_ETH_INTEL_NPE_MAX_TX_DESCRIPTORS);
+ if (p_npe->tx_mbufs == NULL) {
+ printf("alloc of mbufs failed.\n");
+ return;
+ }
+
+ reset_tx_mbufs(p_npe);
+}
+
+/* Convert IX_ETH_PORT_n to IX_NPEMH_NPEID_NPEx */
+static int __eth_to_npe(int eth_id)
+{
+ switch(eth_id) {
+ case IX_ETH_PORT_1:
+ return IX_NPEMH_NPEID_NPEB;
+
+ case IX_ETH_PORT_2:
+ return IX_NPEMH_NPEID_NPEC;
+
+ case IX_ETH_PORT_3:
+ return IX_NPEMH_NPEID_NPEA;
+ }
+ return 0;
+}
+
+/* Poll the CSR machinery. */
+static void npe_poll(int eth_id)
+{
+ if (qDispatcherFunc != NULL) {
+ ixNpeMhMessagesReceive(__eth_to_npe(eth_id));
+ (*qDispatcherFunc)(IX_QMGR_QUELOW_GROUP);
+ }
+}
+
+/* ethAcc RX callback */
+static void npe_rx_callback(u32 cbTag, IX_OSAL_MBUF *m, IxEthAccPortId portid)
+{
+ struct npe* p_npe = (struct npe *)cbTag;
+
+ if (IX_OSAL_MBUF_MLEN(m) > 0) {
+ mbuf_enqueue(&p_npe->rxQHead, m);
+
+ if (p_npe->rx_write == ((p_npe->rx_read-1) & (PKTBUFSRX-1))) {
+ debug("Rx overflow: rx_write=%d rx_read=%d\n",
+ p_npe->rx_write, p_npe->rx_read);
+ } else {
+ debug("Received message #%d (len=%d)\n", p_npe->rx_write,
+ IX_OSAL_MBUF_MLEN(m));
+ memcpy((void *)NetRxPackets[p_npe->rx_write], IX_OSAL_MBUF_MDATA(m),
+ IX_OSAL_MBUF_MLEN(m));
+ p_npe->rx_len[p_npe->rx_write] = IX_OSAL_MBUF_MLEN(m);
+ p_npe->rx_write++;
+ if (p_npe->rx_write == PKTBUFSRX)
+ p_npe->rx_write = 0;
+
+#ifdef CONFIG_PRINT_RX_FRAMES
+ {
+ u8 *ptr = IX_OSAL_MBUF_MDATA(m);
+ int i;
+
+ for (i=0; i<60; i++) {
+ debug("%02x ", *ptr++);
+ }
+ debug("\n");
+ }
+#endif
+ }
+
+ m = mbuf_dequeue(&p_npe->rxQHead);
+ } else {
+ debug("Received frame with length 0!!!\n");
+ m = mbuf_dequeue(&p_npe->rxQHead);
+ }
+
+ /* Now return mbuf to NPE */
+ IX_OSAL_MBUF_MLEN(m) = IX_OSAL_MBUF_PKT_LEN(m) = NPE_PKT_SIZE;
+ IX_OSAL_MBUF_NEXT_BUFFER_IN_PKT_PTR(m) = NULL;
+ IX_OSAL_MBUF_FLAGS(m) = 0;
+
+ if(ixEthAccPortRxFreeReplenish(p_npe->eth_id, m) != IX_SUCCESS) {
+ debug("npe_rx_callback: Error returning mbuf.\n");
+ }
+}
+
+/* ethAcc TX callback */
+static void npe_tx_callback(u32 cbTag, IX_OSAL_MBUF *m)
+{
+ struct npe* p_npe = (struct npe *)cbTag;
+
+ debug("%s\n", __FUNCTION__);
+
+ IX_OSAL_MBUF_MLEN(m) = IX_OSAL_MBUF_PKT_LEN(m) = NPE_PKT_SIZE;
+ IX_OSAL_MBUF_NEXT_BUFFER_IN_PKT_PTR(m) = NULL;
+ IX_OSAL_MBUF_FLAGS(m) = 0;
+
+ mbuf_enqueue(&p_npe->txQHead, m);
+}
+
+
+static int npe_set_mac_address(struct eth_device *dev)
+{
+ struct npe *p_npe = (struct npe *)dev->priv;
+ IxEthAccMacAddr npeMac;
+
+ debug("%s\n", __FUNCTION__);
+
+ /* Set MAC address */
+ memcpy(npeMac.macAddress, dev->enetaddr, 6);
+
+ if (ixEthAccPortUnicastMacAddressSet(p_npe->eth_id, &npeMac) != IX_ETH_ACC_SUCCESS) {
+ printf("Error setting unicast address! %02x:%02x:%02x:%02x:%02x:%02x\n",
+ npeMac.macAddress[0], npeMac.macAddress[1],
+ npeMac.macAddress[2], npeMac.macAddress[3],
+ npeMac.macAddress[4], npeMac.macAddress[5]);
+ return 0;
+ }
+
+ return 1;
+}
+
+/* Boot-time CSR library initialization. */
+static int npe_csr_load(void)
+{
+ int i;
+
+ if (ixQMgrInit() != IX_SUCCESS) {
+ debug("Error initialising queue manager!\n");
+ return 0;
+ }
+
+ ixQMgrDispatcherLoopGet(&qDispatcherFunc);
+
+ if(ixNpeMhInitialize(IX_NPEMH_NPEINTERRUPTS_YES) != IX_SUCCESS) {
+ printf("Error initialising NPE Message handler!\n");
+ return 0;
+ }
+
+ if (npe_used[IX_ETH_PORT_1] && npe_exists[IX_ETH_PORT_1] &&
+ ixNpeDlNpeInitAndStart(IX_NPEDL_NPEIMAGE_NPEB_ETH_LEARN_FILTER_SPAN_FIREWALL_VLAN_QOS)
+ != IX_SUCCESS) {
+ printf("Error downloading firmware to NPE-B!\n");
+ return 0;
+ }
+
+ if (npe_used[IX_ETH_PORT_2] && npe_exists[IX_ETH_PORT_2] &&
+ ixNpeDlNpeInitAndStart(IX_NPEDL_NPEIMAGE_NPEC_ETH_LEARN_FILTER_SPAN_FIREWALL_VLAN_QOS)
+ != IX_SUCCESS) {
+ printf("Error downloading firmware to NPE-C!\n");
+ return 0;
+ }
+
+ /* don't need this for U-Boot */
+ ixFeatureCtrlSwConfigurationWrite(IX_FEATURECTRL_ETH_LEARNING, FALSE);
+
+ if (ixEthAccInit() != IX_ETH_ACC_SUCCESS) {
+ printf("Error initialising Ethernet access driver!\n");
+ return 0;
+ }
+
+ for (i = 0; i < IX_ETH_ACC_NUMBER_OF_PORTS; i++) {
+ if (!npe_used[i] || !npe_exists[i])
+ continue;
+ if (ixEthAccPortInit(i) != IX_ETH_ACC_SUCCESS) {
+ printf("Error initialising Ethernet port%d!\n", i);
+ }
+ if (ixEthAccTxSchedulingDisciplineSet(i, FIFO_NO_PRIORITY) != IX_ETH_ACC_SUCCESS) {
+ printf("Error setting scheduling discipline for port %d.\n", i);
+ }
+ if (ixEthAccPortRxFrameAppendFCSDisable(i) != IX_ETH_ACC_SUCCESS) {
+ printf("Error disabling RX FCS for port %d.\n", i);
+ }
+ if (ixEthAccPortTxFrameAppendFCSEnable(i) != IX_ETH_ACC_SUCCESS) {
+ printf("Error enabling TX FCS for port %d.\n", i);
+ }
+ }
+
+ return 1;
+}
+
+static int npe_init(struct eth_device *dev, bd_t * bis)
+{
+ struct npe *p_npe = (struct npe *)dev->priv;
+ int i;
+ u16 reg_short;
+ int speed;
+ int duplex;
+
+ debug("%s: 1\n", __FUNCTION__);
+
+ miiphy_read (dev->name, p_npe->phy_no, PHY_BMSR, &reg_short);
+
+ /*
+ * Wait if PHY is capable of autonegotiation and autonegotiation is not complete
+ */
+ if ((reg_short & PHY_BMSR_AUTN_ABLE) && !(reg_short & PHY_BMSR_AUTN_COMP)) {
+ puts ("Waiting for PHY auto negotiation to complete");
+ i = 0;
+ while (!(reg_short & PHY_BMSR_AUTN_COMP)) {
+ /*
+ * Timeout reached ?
+ */
+ if (i > PHY_AUTONEGOTIATE_TIMEOUT) {
+ puts (" TIMEOUT !\n");
+ break;
+ }
+
+ if ((i++ % 1000) == 0) {
+ putc ('.');
+ miiphy_read (dev->name, p_npe->phy_no, PHY_BMSR, &reg_short);
+ }
+ udelay (1000); /* 1 ms */
+ }
+ puts (" done\n");
+ udelay (500000); /* another 500 ms (results in faster booting) */
+ }
+
+ speed = miiphy_speed (dev->name, p_npe->phy_no);
+ duplex = miiphy_duplex (dev->name, p_npe->phy_no);
+
+ if (p_npe->print_speed) {
+ p_npe->print_speed = 0;
+ printf ("ENET Speed is %d Mbps - %s duplex connection\n",
+ (int) speed, (duplex == HALF) ? "HALF" : "FULL");
+ }
+
+ npe_alloc_end = npe_alloc_pool + sizeof(npe_alloc_pool);
+ npe_alloc_free = (u8 *)(((unsigned)npe_alloc_pool +
+ CFG_CACHELINE_SIZE - 1) & ~(CFG_CACHELINE_SIZE - 1));
+
+ /* initialize mbuf pool */
+ init_rx_mbufs(p_npe);
+ init_tx_mbufs(p_npe);
+
+ if (ixEthAccPortRxCallbackRegister(p_npe->eth_id, npe_rx_callback,
+ (u32)p_npe) != IX_ETH_ACC_SUCCESS) {
+ printf("can't register RX callback!\n");
+ return 0;
+ }
+
+ if (ixEthAccPortTxDoneCallbackRegister(p_npe->eth_id, npe_tx_callback,
+ (u32)p_npe) != IX_ETH_ACC_SUCCESS) {
+ printf("can't register TX callback!\n");
+ return 0;
+ }
+
+ npe_set_mac_address(dev);
+
+ if (ixEthAccPortEnable(p_npe->eth_id) != IX_ETH_ACC_SUCCESS) {
+ printf("can't enable port!\n");
+ return 0;
+ }
+
+ p_npe->active = 1;
+
+ return 1;
+}
+
+#if 0 /* test-only: probably have to deal with it when booting linux (for a clean state) */
+/* Uninitialize CSR library. */
+static void npe_csr_unload(void)
+{
+ ixEthAccUnload();
+ ixEthDBUnload();
+ ixNpeMhUnload();
+ ixQMgrUnload();
+}
+
+/* callback which is used by ethAcc to recover RX buffers when stopping */
+static void npe_rx_stop_callback(u32 cbTag, IX_OSAL_MBUF *m, IxEthAccPortId portid)
+{
+ debug("%s\n", __FUNCTION__);
+}
+
+/* callback which is used by ethAcc to recover TX buffers when stopping */
+static void npe_tx_stop_callback(u32 cbTag, IX_OSAL_MBUF *m)
+{
+ debug("%s\n", __FUNCTION__);
+}
+#endif
+
+static void npe_halt(struct eth_device *dev)
+{
+ struct npe *p_npe = (struct npe *)dev->priv;
+ int i;
+
+ debug("%s\n", __FUNCTION__);
+
+ /* Delay to give time for recovery of mbufs */
+ for (i = 0; i < 100; i++) {
+ npe_poll(p_npe->eth_id);
+ udelay(100);
+ }
+
+#if 0 /* test-only: probably have to deal with it when booting linux (for a clean state) */
+ if (ixEthAccPortRxCallbackRegister(p_npe->eth_id, npe_rx_stop_callback,
+ (u32)p_npe) != IX_ETH_ACC_SUCCESS) {
+ debug("Error registering rx callback!\n");
+ }
+
+ if (ixEthAccPortTxDoneCallbackRegister(p_npe->eth_id, npe_tx_stop_callback,
+ (u32)p_npe) != IX_ETH_ACC_SUCCESS) {
+ debug("Error registering tx callback!\n");
+ }
+
+ if (ixEthAccPortDisable(p_npe->eth_id) != IX_ETH_ACC_SUCCESS) {
+ debug("npe_stop: Error disabling NPEB!\n");
+ }
+
+ /* Delay to give time for recovery of mbufs */
+ for (i = 0; i < 100; i++) {
+ npe_poll(p_npe->eth_id);
+ udelay(10000);
+ }
+
+ /*
+ * For U-Boot only, we are probably launching Linux or other OS that
+ * needs a clean slate for its NPE library.
+ */
+#if 0 /* test-only */
+ for (i = 0; i < IX_ETH_ACC_NUMBER_OF_PORTS; i++) {
+ if (npe_used[i] && npe_exists[i])
+ if (ixNpeDlNpeStopAndReset(__eth_to_npe(i)) != IX_SUCCESS)
+ printf("Failed to stop and reset NPE B.\n");
+ }
+#endif
+
+#endif
+ p_npe->active = 0;
+}
+
+
+static int npe_send(struct eth_device *dev, volatile void *packet, int len)
+{
+ struct npe *p_npe = (struct npe *)dev->priv;
+ u8 *dest;
+ int err;
+ IX_OSAL_MBUF *m;
+
+ debug("%s\n", __FUNCTION__);
+ m = mbuf_dequeue(&p_npe->txQHead);
+ dest = IX_OSAL_MBUF_MDATA(m);
+ IX_OSAL_MBUF_PKT_LEN(m) = IX_OSAL_MBUF_MLEN(m) = len;
+ IX_OSAL_MBUF_NEXT_PKT_IN_CHAIN_PTR(m) = NULL;
+
+ memcpy(dest, (char *)packet, len);
+
+ if ((err = ixEthAccPortTxFrameSubmit(p_npe->eth_id, m, IX_ETH_ACC_TX_DEFAULT_PRIORITY))
+ != IX_ETH_ACC_SUCCESS) {
+ printf("npe_send: Can't submit frame. err[%d]\n", err);
+ mbuf_enqueue(&p_npe->txQHead, m);
+ return 0;
+ }
+
+#ifdef DEBUG_PRINT_TX_FRAMES
+ {
+ u8 *ptr = IX_OSAL_MBUF_MDATA(m);
+ int i;
+
+ for (i=0; i<IX_OSAL_MBUF_MLEN(m); i++) {
+ printf("%02x ", *ptr++);
+ }
+ printf(" (tx-len=%d)\n", IX_OSAL_MBUF_MLEN(m));
+ }
+#endif
+
+ npe_poll(p_npe->eth_id);
+
+ return len;
+}
+
+static int npe_rx(struct eth_device *dev)
+{
+ struct npe *p_npe = (struct npe *)dev->priv;
+
+ debug("%s\n", __FUNCTION__);
+ npe_poll(p_npe->eth_id);
+
+ debug("%s: rx_write=%d rx_read=%d\n", __FUNCTION__, p_npe->rx_write, p_npe->rx_read);
+ while (p_npe->rx_write != p_npe->rx_read) {
+ debug("Reading message #%d\n", p_npe->rx_read);
+ NetReceive(NetRxPackets[p_npe->rx_read], p_npe->rx_len[p_npe->rx_read]);
+ p_npe->rx_read++;
+ if (p_npe->rx_read == PKTBUFSRX)
+ p_npe->rx_read = 0;
+ }
+
+ return 0;
+}
+
+int npe_initialize(bd_t * bis)
+{
+ static int virgin = 0;
+ struct eth_device *dev;
+ int eth_num = 0;
+ struct npe *p_npe = NULL;
+
+ for (eth_num = 0; eth_num < CFG_NPE_NUMS; eth_num++) {
+
+ /* See if we can actually bring up the interface, otherwise, skip it */
+ switch (eth_num) {
+ default: /* fall through */
+ case 0:
+ if (memcmp (bis->bi_enetaddr, "\0\0\0\0\0\0", 6) == 0) {
+ continue;
+ }
+ break;
+#ifdef CONFIG_HAS_ETH1
+ case 1:
+ if (memcmp (bis->bi_enet1addr, "\0\0\0\0\0\0", 6) == 0) {
+ continue;
+ }
+ break;
+#endif
+ }
+
+ /* Allocate device structure */
+ dev = (struct eth_device *)malloc(sizeof(*dev));
+ if (dev == NULL) {
+ printf ("%s: Cannot allocate eth_device %d\n", __FUNCTION__, eth_num);
+ return -1;
+ }
+ memset(dev, 0, sizeof(*dev));
+
+ /* Allocate our private use data */
+ p_npe = (struct npe *)malloc(sizeof(struct npe));
+ if (p_npe == NULL) {
+ printf("%s: Cannot allocate private hw data for eth_device %d",
+ __FUNCTION__, eth_num);
+ free(dev);
+ return -1;
+ }
+ memset(p_npe, 0, sizeof(struct npe));
+
+ switch (eth_num) {
+ default: /* fall through */
+ case 0:
+ memcpy(dev->enetaddr, bis->bi_enetaddr, 6);
+ p_npe->eth_id = 0;
+ p_npe->phy_no = CONFIG_PHY_ADDR;
+ break;
+
+#ifdef CONFIG_HAS_ETH1
+ case 1:
+ memcpy(dev->enetaddr, bis->bi_enet1addr, 6);
+ p_npe->eth_id = 1;
+ p_npe->phy_no = CONFIG_PHY1_ADDR;
+ break;
+#endif
+ }
+
+ sprintf(dev->name, "NPE%d", eth_num);
+ dev->priv = (void *)p_npe;
+ dev->init = npe_init;
+ dev->halt = npe_halt;
+ dev->send = npe_send;
+ dev->recv = npe_rx;
+
+ p_npe->print_speed = 1;
+
+ if (0 == virgin) {
+ virgin = 1;
+
+ if (ixFeatureCtrlDeviceRead() == IX_FEATURE_CTRL_DEVICE_TYPE_IXP42X) {
+ switch (ixFeatureCtrlProductIdRead() & IX_FEATURE_CTRL_SILICON_STEPPING_MASK) {
+ case IX_FEATURE_CTRL_SILICON_TYPE_B0:
+ /*
+ * If it is B0 Silicon, we only enable port when its corresponding
+ * Eth Coprocessor is available.
+ */
+ if (ixFeatureCtrlComponentCheck(IX_FEATURECTRL_ETH0) ==
+ IX_FEATURE_CTRL_COMPONENT_ENABLED)
+ npe_exists[IX_ETH_PORT_1] = TRUE;
+
+ if (ixFeatureCtrlComponentCheck(IX_FEATURECTRL_ETH1) ==
+ IX_FEATURE_CTRL_COMPONENT_ENABLED)
+ npe_exists[IX_ETH_PORT_2] = TRUE;
+ break;
+ case IX_FEATURE_CTRL_SILICON_TYPE_A0:
+ /*
+ * If it is A0 Silicon, we enable both as both Eth Coprocessors
+ * are available.
+ */
+ npe_exists[IX_ETH_PORT_1] = TRUE;
+ npe_exists[IX_ETH_PORT_2] = TRUE;
+ break;
+ }
+ } else if (ixFeatureCtrlDeviceRead() == IX_FEATURE_CTRL_DEVICE_TYPE_IXP46X) {
+ if (ixFeatureCtrlComponentCheck(IX_FEATURECTRL_ETH0) ==
+ IX_FEATURE_CTRL_COMPONENT_ENABLED)
+ npe_exists[IX_ETH_PORT_1] = TRUE;
+
+ if (ixFeatureCtrlComponentCheck(IX_FEATURECTRL_ETH1) ==
+ IX_FEATURE_CTRL_COMPONENT_ENABLED)
+ npe_exists[IX_ETH_PORT_2] = TRUE;
+ }
+
+ npe_used[IX_ETH_PORT_1] = 1;
+ npe_used[IX_ETH_PORT_2] = 1;
+
+ npe_alloc_end = npe_alloc_pool + sizeof(npe_alloc_pool);
+ npe_alloc_free = (u8 *)(((unsigned)npe_alloc_pool +
+ CFG_CACHELINE_SIZE - 1)
+ & ~(CFG_CACHELINE_SIZE - 1));
+
+ if (!npe_csr_load())
+ return 0;
+ }
+
+ eth_register(dev);
+
+#if defined(CONFIG_MII) || (CONFIG_COMMANDS & CFG_CMD_MII)
+ miiphy_register(dev->name, npe_miiphy_read, npe_miiphy_write);
+#endif
+
+ } /* end for each supported device */
+
+ return 1;
+}
+
+#endif /* CONFIG_IXP4XX_NPE */
diff --git a/cpu/ixp/serial.c b/cpu/ixp/serial.c
index aea0cf8696..2015958571 100644
--- a/cpu/ixp/serial.c
+++ b/cpu/ixp/serial.c
@@ -31,10 +31,10 @@
#include <common.h>
#include <asm/arch/ixp425.h>
+DECLARE_GLOBAL_DATA_PTR;
+
void serial_setbrg (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
unsigned int quot = 0;
int uart = CFG_IXP425_CONSOLE;
diff --git a/cpu/ixp/start.S b/cpu/ixp/start.S
index 2726f65978..757cfaa2d5 100644
--- a/cpu/ixp/start.S
+++ b/cpu/ixp/start.S
@@ -211,7 +211,7 @@ reset:
/* copy */
mov r0, #0
mov r4, r0
- add r2, r0, #0x40000
+ add r2, r0, #CFG_MONITOR_LEN
mov r1, #0x10000000
mov r5, r1
@@ -497,3 +497,29 @@ reset_cpu:
reset_endless:
b reset_endless
+
+#ifdef CONFIG_USE_IRQ
+
+.LC0: .word loops_per_jiffy
+
+/*
+ * 0 <= r0 <= 2000
+ */
+.globl udelay
+udelay:
+ mov r2, #0x6800
+ orr r2, r2, #0x00db
+ mul r0, r2, r0
+ ldr r2, .LC0
+ ldr r2, [r2] @ max = 0x0fffffff
+ mov r0, r0, lsr #11 @ max = 0x00003fff
+ mov r2, r2, lsr #11 @ max = 0x0003ffff
+ mul r0, r2, r0 @ max = 2^32-1
+ movs r0, r0, lsr #6
+
+delay_loop:
+ subs r0, r0, #1
+ bne delay_loop
+ mov pc, lr
+
+#endif /* CONFIG_USE_IRQ */
diff --git a/cpu/ixp/timer.c b/cpu/ixp/timer.c
index 8df2a31f5c..920f34e612 100644
--- a/cpu/ixp/timer.c
+++ b/cpu/ixp/timer.c
@@ -1,5 +1,7 @@
-/* vi: set ts=8 sw=8 noet: */
/*
+ * (C) Copyright 2006
+ * Stefan Roese, DENX Software Engineering, sr@denx.de.
+ *
* (C) Copyright 2002
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
* Marius Groeger <mgroeger@sysgo.de>
@@ -30,6 +32,7 @@
#include <common.h>
#include <asm/arch/ixp425.h>
+#ifndef CONFIG_USE_IRQ
ulong get_timer (ulong base)
{
return get_timer_masked () - base;
@@ -77,3 +80,4 @@ ulong get_timer_masked (void)
}
return (reload_constant - current);
}
+#endif /* #ifndef CONFIG_USE_IRQ */
diff --git a/cpu/lh7a40x/cpu.c b/cpu/lh7a40x/cpu.c
index 718f253471..578eb73e8e 100644
--- a/cpu/lh7a40x/cpu.c
+++ b/cpu/lh7a40x/cpu.c
@@ -33,6 +33,10 @@
#include <command.h>
#include <arm920t.h>
+#ifdef CONFIG_USE_IRQ
+DECLARE_GLOBAL_DATA_PTR;
+#endif
+
/* read co-processor 15, register #1 (control register) */
static unsigned long read_p15_c1 (void)
{
@@ -90,8 +94,6 @@ int cpu_init (void)
* setup up stacks if necessary
*/
#ifdef CONFIG_USE_IRQ
- DECLARE_GLOBAL_DATA_PTR;
-
IRQ_STACK_START = _armboot_start - CFG_MALLOC_LEN - CFG_GBL_DATA_SIZE - 4;
FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ;
#endif
diff --git a/cpu/lh7a40x/serial.c b/cpu/lh7a40x/serial.c
index ff5b2d8c08..2132c052a4 100644
--- a/cpu/lh7a40x/serial.c
+++ b/cpu/lh7a40x/serial.c
@@ -21,6 +21,8 @@
#include <common.h>
#include <lh7a40x.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#if defined(CONFIG_CONSOLE_UART1)
# define UART_CONSOLE 1
#elif defined(CONFIG_CONSOLE_UART2)
@@ -33,7 +35,6 @@
void serial_setbrg (void)
{
- DECLARE_GLOBAL_DATA_PTR;
lh7a40x_uart_t* uart = LH7A40X_UART_PTR(UART_CONSOLE);
int i;
unsigned int reg = 0;
diff --git a/cpu/mcf52x2/cpu.c b/cpu/mcf52x2/cpu.c
index 32a524f7e7..aa6b2bd670 100644
--- a/cpu/mcf52x2/cpu.c
+++ b/cpu/mcf52x2/cpu.c
@@ -2,6 +2,10 @@
* (C) Copyright 2003
* Josef Baumgartner <josef.baumgartner@telex.de>
*
+ * MCF5282 additionals
+ * (C) Copyright 2005
+ * BuS Elektronik GmbH & Co. KG <esw@bus-elektronik.de>
+ *
* See file CREDITS for list of people who contributed to this
* project.
*
@@ -25,19 +29,61 @@
#include <watchdog.h>
#include <command.h>
+#ifdef CONFIG_M5271
+#include <asm/immap_5271.h>
+#include <asm/m5271.h>
+#endif
+
#ifdef CONFIG_M5272
#include <asm/immap_5272.h>
#include <asm/m5272.h>
#endif
#ifdef CONFIG_M5282
-
+#include <asm/m5282.h>
+#include <asm/immap_5282.h>
#endif
#ifdef CONFIG_M5249
#include <asm/m5249.h>
#endif
+#ifdef CONFIG_M5271
+int checkcpu (void)
+{
+ char buf[32];
+
+ printf ("CPU: Freescale Coldfire MCF5271 at %s MHz\n", strmhz(buf, CFG_CLK));
+ return 0;
+}
+
+int do_reset (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[]) {
+ mbar_writeByte(MCF_RCM_RCR,
+ MCF_RCM_RCR_SOFTRST | MCF_RCM_RCR_FRCRSTOUT);
+ return 0;
+};
+
+#if defined(CONFIG_WATCHDOG)
+void watchdog_reset (void)
+{
+ mbar_writeShort(MCF_WTM_WSR, 0x5555);
+ mbar_writeShort(MCF_WTM_WSR, 0xAAAA);
+}
+
+int watchdog_disable (void)
+{
+ mbar_writeShort(MCF_WTM_WCR, 0);
+ return (0);
+}
+
+int watchdog_init (void)
+{
+ mbar_writeShort(MCF_WTM_WCR, MCF_WTM_WCR_EN);
+ return (0);
+}
+#endif /* #ifdef CONFIG_WATCHDOG */
+
+#endif
#ifdef CONFIG_M5272
int do_reset (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[]) {
@@ -66,16 +112,15 @@ int checkcpu(void) {
case 0x4: suf = "3K75N"; break;
default:
suf = NULL;
- printf ("MOTOROLA MCF5272 (Mask:%01x)\n", msk);
+ printf ("Freescale MCF5272 (Mask:%01x)\n", msk);
break;
}
if (suf)
- printf ("MOTOROLA MCF5272 %s\n", suf);
+ printf ("Freescale MCF5272 %s\n", suf);
return 0;
};
-
#if defined(CONFIG_WATCHDOG)
/* Called by macro WATCHDOG_RESET */
void watchdog_reset (void)
@@ -117,11 +162,25 @@ int watchdog_init (void)
#ifdef CONFIG_M5282
int checkcpu (void)
{
- puts ("CPU: MOTOROLA Coldfire MCF5282\n");
+ unsigned char resetsource = MCFRESET_RSR;
+
+ printf ("CPU: Freescale Coldfire MCF5282 (PIN: %2.2x REV: %2.2x)\n",
+ MCFCCM_CIR>>8,MCFCCM_CIR & MCFCCM_CIR_PRN_MASK);
+ printf ("Reset:%s%s%s%s%s%s%s\n",
+ (resetsource & MCFRESET_RSR_LOL) ? " Loss of Lock" : "",
+ (resetsource & MCFRESET_RSR_LOC) ? " Loss of Clock" : "",
+ (resetsource & MCFRESET_RSR_EXT) ? " External" : "",
+ (resetsource & MCFRESET_RSR_POR) ? " Power On" : "",
+ (resetsource & MCFRESET_RSR_WDR) ? " Watchdog" : "",
+ (resetsource & MCFRESET_RSR_SOFT) ? " Software" : "",
+ (resetsource & MCFRESET_RSR_LVD) ? " Low Voltage" : ""
+ );
return 0;
}
-int do_reset (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[]) {
+int do_reset (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
+{
+ MCFRESET_RCR = MCFRESET_RCR_SOFTRST;
return 0;
};
#endif
@@ -131,7 +190,7 @@ int checkcpu (void)
{
char buf[32];
- printf ("CPU: MOTOROLA Coldfire MCF5249 at %s MHz\n", strmhz(buf, CFG_CLK));
+ printf ("CPU: Freescale Coldfire MCF5249 at %s MHz\n", strmhz(buf, CFG_CLK));
return 0;
}
diff --git a/cpu/mcf52x2/cpu_init.c b/cpu/mcf52x2/cpu_init.c
index 350c431dba..1748ea9d9b 100644
--- a/cpu/mcf52x2/cpu_init.c
+++ b/cpu/mcf52x2/cpu_init.c
@@ -2,6 +2,10 @@
* (C) Copyright 2003
* Josef Baumgartner <josef.baumgartner@telex.de>
*
+ * MCF5282 additionals
+ * (C) Copyright 2005
+ * BuS Elektronik GmbH & Co. KG <esw@bus-elektronik.de>
+ *
* See file CREDITS for list of people who contributed to this
* project.
*
@@ -12,7 +16,7 @@
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
@@ -24,6 +28,11 @@
#include <common.h>
#include <watchdog.h>
+#ifdef CONFIG_M5271
+#include <asm/m5271.h>
+#include <asm/immap_5271.h>
+#endif
+
#ifdef CONFIG_M5272
#include <asm/m5272.h>
#include <asm/immap_5272.h>
@@ -38,6 +47,38 @@
#include <asm/m5249.h>
#endif
+#if defined(CONFIG_M5271)
+void cpu_init_f (void)
+{
+#ifndef CONFIG_WATCHDOG
+ /* Disable the watchdog if we aren't using it */
+ mbar_writeShort(MCF_WTM_WCR, 0);
+#endif
+
+ /* Set clockspeed to 100MHz */
+ mbar_writeShort(MCF_FMPLL_SYNCR,
+ MCF_FMPLL_SYNCR_MFD(0) | MCF_FMPLL_SYNCR_RFD(0));
+ while (!mbar_readByte(MCF_FMPLL_SYNSR) & MCF_FMPLL_SYNSR_LOCK);
+
+ /* Enable UART pins */
+ mbar_writeShort(MCF_GPIO_PAR_UART, MCF_GPIO_PAR_UART_U0TXD |
+ MCF_GPIO_PAR_UART_U0RXD |
+ MCF_GPIO_PAR_UART_U1RXD_UART1 |
+ MCF_GPIO_PAR_UART_U1TXD_UART1);
+
+ /* Enable Ethernet pins */
+ mbar_writeByte(MCF_GPIO_PAR_FECI2C, CFG_FECI2C);
+}
+
+/*
+ * initialize higher level parts of CPU like timers
+ */
+int cpu_init_r (void)
+{
+ return (0);
+}
+#endif
+
#if defined(CONFIG_M5272)
/*
* Breath some life into the CPU...
@@ -60,7 +101,7 @@ void cpu_init_f (void)
regp->sysctrl_reg.sc_scr = CFG_SCR;
regp->sysctrl_reg.sc_spr = CFG_SPR;
- /* Setup Ports: */
+ /* Setup Ports: */
regp->gpio_reg.gpio_pacnt = CFG_PACNT;
regp->gpio_reg.gpio_paddr = CFG_PADDR;
regp->gpio_reg.gpio_padat = CFG_PADAT;
@@ -110,15 +151,15 @@ void cpu_init_f (void)
#endif /* #ifndef CONFIG_MONITOR_IS_IN_RAM */
- /* enable instruction cache now */
- icache_enable();
+ /* enable instruction cache now */
+ icache_enable();
}
/*
* initialize higher level parts of CPU like timers
*/
-int cpu_init_r (void)
+int cpu_init_r (void)
{
return (0);
}
@@ -135,13 +176,186 @@ int cpu_init_r (void)
*/
void cpu_init_f (void)
{
+#ifndef CONFIG_WATCHDOG
+ /* disable watchdog if we aren't using it */
+ MCFWTM_WCR = 0;
+#endif
+
+#ifndef CONFIG_MONITOR_IS_IN_RAM
+ /* Set speed /PLL */
+ MCFCLOCK_SYNCR = MCFCLOCK_SYNCR_MFD(CFG_MFD) | MCFCLOCK_SYNCR_RFD(CFG_RFD);
+
+ /* Set up the GPIO ports */
+#ifdef CFG_PEPAR
+ MCFGPIO_PEPAR = CFG_PEPAR;
+#endif
+#ifdef CFG_PFPAR
+ MCFGPIO_PFPAR = CFG_PFPAR;
+#endif
+#ifdef CFG_PJPAR
+ MCFGPIO_PJPAR = CFG_PJPAR;
+#endif
+#ifdef CFG_PSDPAR
+ MCFGPIO_PSDPAR = CFG_PSDPAR;
+#endif
+#ifdef CFG_PASPAR
+ MCFGPIO_PASPAR = CFG_PASPAR;
+#endif
+#ifdef CFG_PEHLPAR
+ MCFGPIO_PEHLPAR = CFG_PEHLPAR;
+#endif
+#ifdef CFG_PQSPAR
+ MCFGPIO_PQSPAR = CFG_PQSPAR;
+#endif
+#ifdef CFG_PTCPAR
+ MCFGPIO_PTCPAR = CFG_PTCPAR;
+#endif
+#ifdef CFG_PTDPAR
+ MCFGPIO_PTDPAR = CFG_PTDPAR;
+#endif
+#ifdef CFG_PUAPAR
+ MCFGPIO_PUAPAR = CFG_PUAPAR;
+#endif
+
+#ifdef CFG_DDRUA
+ MCFGPIO_DDRUA = CFG_DDRUA;
+#endif
+
+ /* This is probably a bad place to setup chip selects, but everyone
+ else is doing it! */
+
+#if defined(CFG_CS0_BASE) & defined(CFG_CS0_SIZE) & \
+ defined(CFG_CS0_WIDTH) & defined(CFG_CS0_RO) & \
+ defined(CFG_CS0_WS)
+
+ MCFCSM_CSAR0 = (CFG_CS0_BASE >> 16) & 0xFFFF;
+
+ #if (CFG_CS0_WIDTH == 8)
+ #define CFG_CS0_PS MCFCSM_CSCR_PS_8
+ #elif (CFG_CS0_WIDTH == 16)
+ #define CFG_CS0_PS MCFCSM_CSCR_PS_16
+ #elif (CFG_CS0_WIDTH == 32)
+ #define CFG_CS0_PS MCFCSM_CSCR_PS_32
+ #else
+ #error "CFG_CS0_WIDTH: Fault - wrong bus with for CS0"
+ #endif
+ MCFCSM_CSCR0 = MCFCSM_CSCR_WS(CFG_CS0_WS)
+ |CFG_CS0_PS
+ |MCFCSM_CSCR_AA;
+
+ #if (CFG_CS0_RO != 0)
+ MCFCSM_CSMR0 = MCFCSM_CSMR_BAM(CFG_CS0_SIZE-1)
+ |MCFCSM_CSMR_WP|MCFCSM_CSMR_V;
+ #else
+ MCFCSM_CSMR0 = MCFCSM_CSMR_BAM(CFG_CS0_SIZE-1)|MCFCSM_CSMR_V;
+ #endif
+#else
+ #waring "Chip Select 0 are not initialized/used"
+#endif
+
+#if defined(CFG_CS1_BASE) & defined(CFG_CS1_SIZE) & \
+ defined(CFG_CS1_WIDTH) & defined(CFG_CS1_RO) & \
+ defined(CFG_CS1_WS)
+
+ MCFCSM_CSAR1 = (CFG_CS1_BASE >> 16) & 0xFFFF;
+
+ #if (CFG_CS1_WIDTH == 8)
+ #define CFG_CS1_PS MCFCSM_CSCR_PS_8
+ #elif (CFG_CS1_WIDTH == 16)
+ #define CFG_CS1_PS MCFCSM_CSCR_PS_16
+ #elif (CFG_CS1_WIDTH == 32)
+ #define CFG_CS1_PS MCFCSM_CSCR_PS_32
+ #else
+ #error "CFG_CS1_WIDTH: Fault - wrong bus with for CS1"
+ #endif
+ MCFCSM_CSCR1 = MCFCSM_CSCR_WS(CFG_CS1_WS)
+ |CFG_CS1_PS
+ |MCFCSM_CSCR_AA;
+
+ #if (CFG_CS1_RO != 0)
+ MCFCSM_CSMR1 = MCFCSM_CSMR_BAM(CFG_CS1_SIZE-1)
+ |MCFCSM_CSMR_WP
+ |MCFCSM_CSMR_V;
+ #else
+ MCFCSM_CSMR1 = MCFCSM_CSMR_BAM(CFG_CS1_SIZE-1)
+ |MCFCSM_CSMR_V;
+ #endif
+#else
+ #warning "Chip Select 1 are not initialized/used"
+#endif
+
+#if defined(CFG_CS2_BASE) & defined(CFG_CS2_SIZE) & \
+ defined(CFG_CS2_WIDTH) & defined(CFG_CS2_RO) & \
+ defined(CFG_CS2_WS)
+
+ MCFCSM_CSAR2 = (CFG_CS2_BASE >> 16) & 0xFFFF;
+
+ #if (CFG_CS2_WIDTH == 8)
+ #define CFG_CS2_PS MCFCSM_CSCR_PS_8
+ #elif (CFG_CS2_WIDTH == 16)
+ #define CFG_CS2_PS MCFCSM_CSCR_PS_16
+ #elif (CFG_CS2_WIDTH == 32)
+ #define CFG_CS2_PS MCFCSM_CSCR_PS_32
+ #else
+ #error "CFG_CS2_WIDTH: Fault - wrong bus with for CS2"
+ #endif
+ MCFCSM_CSCR2 = MCFCSM_CSCR_WS(CFG_CS2_WS)
+ |CFG_CS2_PS
+ |MCFCSM_CSCR_AA;
+
+ #if (CFG_CS2_RO != 0)
+ MCFCSM_CSMR2 = MCFCSM_CSMR_BAM(CFG_CS2_SIZE-1)
+ |MCFCSM_CSMR_WP
+ |MCFCSM_CSMR_V;
+ #else
+ MCFCSM_CSMR2 = MCFCSM_CSMR_BAM(CFG_CS2_SIZE-1)
+ |MCFCSM_CSMR_V;
+ #endif
+#else
+ #warning "Chip Select 2 are not initialized/used"
+#endif
+#if defined(CFG_CS3_BASE) & defined(CFG_CS3_SIZE) & \
+ defined(CFG_CS3_WIDTH) & defined(CFG_CS3_RO) & \
+ defined(CFG_CS3_WS)
+
+ MCFCSM_CSAR3 = (CFG_CS3_BASE >> 16) & 0xFFFF;
+
+ #if (CFG_CS3_WIDTH == 8)
+ #define CFG_CS3_PS MCFCSM_CSCR_PS_8
+ #elif (CFG_CS3_WIDTH == 16)
+ #define CFG_CS3_PS MCFCSM_CSCR_PS_16
+ #elif (CFG_CS3_WIDTH == 32)
+ #define CFG_CS3_PS MCFCSM_CSCR_PS_32
+ #else
+ #error "CFG_CS3_WIDTH: Fault - wrong bus with for CS1"
+ #endif
+ MCFCSM_CSCR3 = MCFCSM_CSCR_WS(CFG_CS3_WS)
+ |CFG_CS3_PS
+ |MCFCSM_CSCR_AA;
+
+ #if (CFG_CS3_RO != 0)
+ MCFCSM_CSMR3 = MCFCSM_CSMR_BAM(CFG_CS3_SIZE-1)
+ |MCFCSM_CSMR_WP
+ |MCFCSM_CSMR_V;
+ #else
+ MCFCSM_CSMR3 = MCFCSM_CSMR_BAM(CFG_CS3_SIZE-1)
+ |MCFCSM_CSMR_V;
+ #endif
+#else
+ #warning "Chip Select 3 are not initialized/used"
+#endif
+
+#endif /* CONFIG_MONITOR_IS_IN_RAM */
+
+ /* defer enabling cache until boot (see do_go) */
+ /* icache_enable(); */
}
/*
* initialize higher level parts of CPU like timers
*/
-int cpu_init_r (void)
+int cpu_init_r (void)
{
return (0);
}
@@ -165,23 +379,23 @@ void cpu_init_f (void)
volatile unsigned long cpll = mbar2_readLong(MCFSIM_PLLCR);
unsigned long pllcr;
#ifdef CFG_FAST_CLK
- pllcr = 0x925a3100; /* ~140MHz clock (PLL bypass = 0) */
+ pllcr = 0x925a3100; /* ~140MHz clock (PLL bypass = 0) */
#else
- pllcr = 0x135a4140; /* ~72MHz clock (PLL bypass = 0) */
-#endif
- cpll = cpll & 0xfffffffe; /* Set PLL bypass mode = 0 (PSTCLK = crystal) */
- mbar2_writeLong(MCFSIM_PLLCR, cpll); /* Set the PLL to bypass mode (PSTCLK = crystal) */
- mbar2_writeLong(MCFSIM_PLLCR, pllcr); /* set the clock speed */
- pllcr ^= 0x00000001; /* Set pll bypass to 1 */
- mbar2_writeLong(MCFSIM_PLLCR, pllcr); /* Start locking (pll bypass = 1) */
- udelay(0x20); /* Wait for a lock ... */
+ pllcr = 0x135a4140; /* ~72MHz clock (PLL bypass = 0) */
+#endif
+ cpll = cpll & 0xfffffffe; /* Set PLL bypass mode = 0 (PSTCLK = crystal) */
+ mbar2_writeLong(MCFSIM_PLLCR, cpll); /* Set the PLL to bypass mode (PSTCLK = crystal) */
+ mbar2_writeLong(MCFSIM_PLLCR, pllcr); /* set the clock speed */
+ pllcr ^= 0x00000001; /* Set pll bypass to 1 */
+ mbar2_writeLong(MCFSIM_PLLCR, pllcr); /* Start locking (pll bypass = 1) */
+ udelay(0x20); /* Wait for a lock ... */
#endif /* #ifndef CFG_PLL_BYPASS */
/*
* NOTE: by setting the GPIO_FUNCTION registers, we ensure that the UART pins
- * (UART0: gpio 30,27, UART1: gpio 31, 28) will be used as UART pins
- * which is their primary function.
- * ~Jeremy
+ * (UART0: gpio 30,27, UART1: gpio 31, 28) will be used as UART pins
+ * which is their primary function.
+ * ~Jeremy
*/
mbar2_writeLong(MCFSIM_GPIO_FUNC, CFG_GPIO_FUNC);
mbar2_writeLong(MCFSIM_GPIO1_FUNC, CFG_GPIO1_FUNC);
@@ -196,7 +410,7 @@ void cpu_init_f (void)
* (Internal Register Display) command
* ~Jeremy
*
- */
+ */
mbar_writeByte(MCFSIM_MPARK, 0x30); /* 5249 Internal Core takes priority over DMA */
mbar_writeByte(MCFSIM_SYPCR, 0x00);
mbar_writeByte(MCFSIM_SWIVR, 0x0f);
@@ -215,9 +429,9 @@ void cpu_init_f (void)
mbar_writeByte(MCFSIM_QSPIICR, 0x00);
mbar2_writeLong(MCFSIM_GPIO_INT_EN, 0x00000080);
- mbar2_writeByte(MCFSIM_INTBASE, 0x40); /* Base interrupts at 64 */
+ mbar2_writeByte(MCFSIM_INTBASE, 0x40); /* Base interrupts at 64 */
mbar2_writeByte(MCFSIM_SPURVEC, 0x00);
- mbar2_writeLong(MCFSIM_IDECONFIG1, 0x00000020); /* Enable a 1 cycle pre-drive cycle on CS1 */
+ mbar2_writeLong(MCFSIM_IDECONFIG1, 0x00000020); /* Enable a 1 cycle pre-drive cycle on CS1 */
/* Setup interrupt priorities for gpio7 */
/* mbar2_writeLong(MCFSIM_INTLEV5, 0x70000000); */
@@ -245,7 +459,7 @@ void cpu_init_f (void)
/*
* initialize higher level parts of CPU like timers
*/
-int cpu_init_r (void)
+int cpu_init_r (void)
{
return (0);
}
diff --git a/cpu/mcf52x2/fec.c b/cpu/mcf52x2/fec.c
index a5c50af63c..6db6214722 100644
--- a/cpu/mcf52x2/fec.c
+++ b/cpu/mcf52x2/fec.c
@@ -25,6 +25,11 @@
#include <malloc.h>
#include <asm/fec.h>
+#ifdef CONFIG_M5271
+#include <asm/m5271.h>
+#include <asm/immap_5271.h>
+#endif
+
#ifdef CONFIG_M5272
#include <asm/m5272.h>
#include <asm/immap_5272.h>
@@ -41,7 +46,7 @@
#ifdef CONFIG_M5272
#define FEC_ADDR (CFG_MBAR + 0x840)
#endif
-#ifdef CONFIG_M5282
+#if defined(CONFIG_M5282) || defined(CONFIG_M5271)
#define FEC_ADDR (CFG_MBAR + 0x1000)
#endif
@@ -200,7 +205,9 @@ int eth_rx (void)
int eth_init (bd_t * bd)
{
-
+#ifndef CFG_ENET_BD_BASE
+ DECLARE_GLOBAL_DATA_PTR;
+#endif
int i;
volatile fec_t *fecp = (fec_t *) (FEC_ADDR);
@@ -240,10 +247,26 @@ int eth_init (bd_t * bd)
#endif
#undef ea
+#ifdef CONFIG_M5271
/* Clear multicast address hash table
*/
+ fecp->fec_ghash_table_high = 0;
+ fecp->fec_ghash_table_low = 0;
+
+ /* Clear individual address hash table
+ */
+ fecp->fec_ihash_table_high = 0;
+ fecp->fec_ihash_table_low = 0;
+#else
+ /* Clear multicast address hash table
+ */
+#ifdef CONFIG_M5282
+ fecp->fec_ihash_table_high = 0;
+ fecp->fec_ihash_table_low = 0;
+#else
fecp->fec_hash_table_high = 0;
fecp->fec_hash_table_low = 0;
+#endif
/* Set maximum receive buffer size.
*/
@@ -256,7 +279,16 @@ int eth_init (bd_t * bd)
txIdx = 0;
if (!rtx) {
+#ifdef CFG_ENET_BD_BASE
rtx = (RTXBD *) CFG_ENET_BD_BASE;
+#else
+ rtx = (RTXBD *) (CFG_MONITOR_BASE+gd->reloc_off -
+ (((PKTBUFSRX+TX_BUF_CNT)*+sizeof(cbd_t)
+ +0xFF)
+ & ~0xFF)
+ );
+ debug("set ENET_DB_BASE to %lX\n",(long) rtx);
+#endif
}
/*
@@ -290,15 +322,18 @@ int eth_init (bd_t * bd)
/* Enable MII mode
*/
-#if 0 /* Full duplex mode */
+
+#if 0 /* Full duplex mode */
fecp->fec_r_cntrl = FEC_RCNTRL_MII_MODE;
fecp->fec_x_cntrl = FEC_TCNTRL_FDEN;
-#else /* Half duplex mode */
- fecp->fec_r_cntrl = FEC_RCNTRL_MII_MODE | FEC_RCNTRL_DRT;
+#else /* Half duplex mode */
+ fecp->fec_r_cntrl = (PKT_MAXBUF_SIZE << 16); /* set max frame length */
+ fecp->fec_r_cntrl |= FEC_RCNTRL_MII_MODE | FEC_RCNTRL_DRT;
fecp->fec_x_cntrl = 0;
#endif
/* Set MII speed */
- fecp->fec_mii_speed = 0x0e;
+ fecp->fec_mii_speed = (((CFG_CLK / 2) / (2500000 / 10)) + 5) / 10;
+ fecp->fec_mii_speed *= 2;
/* Configure port B for MII.
*/
@@ -402,7 +437,7 @@ static void mii_discover_phy (void)
*/
udelay (10000); /* wait 10ms */
}
- for (phyno = 0; phyno < 32 && phyaddr < 0; ++phyno) {
+ for (phyno = 1; phyno < 32 && phyaddr < 0; ++phyno) {
phytype = mii_send (mk_mii_read (phyno, PHY_PHYIDR1));
#ifdef ET_DEBUG
printf ("PHY type 0x%x pass %d type ", phytype, pass);
diff --git a/cpu/mcf52x2/interrupts.c b/cpu/mcf52x2/interrupts.c
index 868df39194..116747ad3a 100644
--- a/cpu/mcf52x2/interrupts.c
+++ b/cpu/mcf52x2/interrupts.c
@@ -27,6 +27,11 @@
#include <watchdog.h>
#include <asm/processor.h>
+#ifdef CONFIG_M5271
+#include <asm/m5271.h>
+#include <asm/immap_5271.h>
+#endif
+
#ifdef CONFIG_M5272
#include <asm/m5272.h>
#include <asm/immap_5272.h>
@@ -171,7 +176,7 @@ int interrupt_init (void)
}
#endif
-#ifdef CONFIG_M5282
+#if defined(CONFIG_M5282) || defined(CONFIG_M5271)
int interrupt_init (void)
{
return 0;
diff --git a/cpu/mcf52x2/serial.c b/cpu/mcf52x2/serial.c
index c7309220f1..8be09e34fe 100644
--- a/cpu/mcf52x2/serial.c
+++ b/cpu/mcf52x2/serial.c
@@ -23,9 +23,14 @@
#include <common.h>
#include <command.h>
+#include <watchdog.h>
#include <asm/mcfuart.h>
+#ifdef CONFIG_M5271
+#include <asm/m5271.h>
+#endif
+
#ifdef CONFIG_M5272
#include <asm/m5272.h>
#endif
@@ -38,7 +43,9 @@
#include <asm/m5249.h>
#endif
-#ifdef CONFIG_M5249
+DECLARE_GLOBAL_DATA_PTR;
+
+#if defined(CONFIG_M5249) || defined(CONFIG_M5271)
#define DoubleClock(a) ((double)(CFG_CLK/2) / 32.0 / (double)(a))
#else
#define DoubleClock(a) ((double)(CFG_CLK) / 32.0 / (double)(a))
@@ -46,41 +53,77 @@
void rs_serial_setbaudrate(int port,int baudrate)
{
-#if defined(CONFIG_M5272) || defined(CONFIG_M5249)
+#if defined(CONFIG_M5272) || defined(CONFIG_M5249) || defined(CONFIG_M5271)
volatile unsigned char *uartp;
- double clock, fraction;
+# ifndef CONFIG_M5271
+ double fraction;
+# endif
+ double clock;
if (port == 0)
- uartp = (volatile unsigned char *) (CFG_MBAR + MCFUART_BASE1);
+ uartp = (volatile unsigned char *) (CFG_MBAR + MCFUART_BASE1);
else
- uartp = (volatile unsigned char *) (CFG_MBAR + MCFUART_BASE2);
+ uartp = (volatile unsigned char *) (CFG_MBAR + MCFUART_BASE2);
+
+ clock = DoubleClock(baudrate); /* Set baud above */
- clock = DoubleClock(baudrate); /* Set baud above */
+ uartp[MCFUART_UBG1] = (((int)clock >> 8) & 0xff); /* set msb baud */
+ uartp[MCFUART_UBG2] = ((int)clock & 0xff); /* set lsb baud */
+# ifndef CONFIG_M5271
fraction = ((clock - (int)clock) * 16.0) + 0.5;
+ uartp[MCFUART_UFPD] = ((int)fraction & 0xf); /* set baud fraction adjust */
+# endif
+#endif
+
+#if defined(CONFIG_M5282)
+ volatile unsigned char *uartp;
+ long clock;
+
+ switch (port) {
+ case 1:
+ uartp = (volatile unsigned char *) (CFG_MBAR + MCFUART_BASE2);
+ break;
+ case 2:
+ uartp = (volatile unsigned char *) (CFG_MBAR + MCFUART_BASE3);
+ break;
+ default:
+ uartp = (volatile unsigned char *) (CFG_MBAR + MCFUART_BASE1);
+ }
+
+ clock = (long) CFG_CLK / ((long) 32 * baudrate); /* Set baud above */
+
+ uartp[MCFUART_UBG1] = (((int)clock >> 8) & 0xff); /* set msb baud */
+ uartp[MCFUART_UBG2] = ((int) clock & 0xff); /* set lsb baud */
- uartp[MCFUART_UBG1] = (((int)clock >> 8) & 0xff); /* set msb baud */
- uartp[MCFUART_UBG2] = ((int)clock & 0xff); /* set lsb baud */
- uartp[MCFUART_UFPD] = ((int)fraction & 0xf); /* set baud fraction adjust */
#endif
};
-void rs_serial_init(int port,int baudrate)
+void rs_serial_init (int port, int baudrate)
{
- volatile unsigned char *uartp;
+ volatile unsigned char *uartp;
/*
- * Reset UART, get it into known state...
+ * Reset UART, get it into known state...
*/
- if (port == 0)
- uartp = (volatile unsigned char *) (CFG_MBAR + MCFUART_BASE1);
- else
+ switch (port) {
+ case 1:
uartp = (volatile unsigned char *) (CFG_MBAR + MCFUART_BASE2);
+ break;
+#if defined(CONFIG_M5282)
+ case 2:
+ uartp = (volatile unsigned char *) (CFG_MBAR + MCFUART_BASE3);
+ break;
+#endif
+ default:
+ uartp = (volatile unsigned char *) (CFG_MBAR + MCFUART_BASE1);
+ }
- uartp[MCFUART_UCR] = MCFUART_UCR_CMDRESETRX; /* reset RX */
- uartp[MCFUART_UCR] = MCFUART_UCR_CMDRESETTX; /* reset TX */
- uartp[MCFUART_UCR] = MCFUART_UCR_CMDRESETMRPTR; /* reset MR pointer */
- uartp[MCFUART_UCR] = MCFUART_UCR_CMDRESETERR; /* reset Error pointer */
+ uartp[MCFUART_UCR] = MCFUART_UCR_CMDRESETTX; /* reset TX */
+ uartp[MCFUART_UCR] = MCFUART_UCR_CMDRESETRX; /* reset RX */
+
+ uartp[MCFUART_UCR] = MCFUART_UCR_CMDRESETMRPTR; /* reset MR pointer */
+ uartp[MCFUART_UCR] = MCFUART_UCR_CMDRESETERR; /* reset Error pointer */
/*
* Set port for CONSOLE_BAUD_RATE, 8 data bits, 1 stop bit, no parity.
@@ -88,9 +131,15 @@ void rs_serial_init(int port,int baudrate)
uartp[MCFUART_UMR] = MCFUART_MR1_PARITYNONE | MCFUART_MR1_CS8;
uartp[MCFUART_UMR] = MCFUART_MR2_STOP1;
- rs_serial_setbaudrate(port,baudrate);
+ /* Mask UART interrupts */
+ uartp[MCFUART_UIMR] = 0;
+ /* Set clock Select Register: Tx/Rx clock is timer */
uartp[MCFUART_UCSR] = MCFUART_UCSR_RXCLKTIMER | MCFUART_UCSR_TXCLKTIMER;
+
+ rs_serial_setbaudrate (port, baudrate);
+
+ /* Enable Tx/Rx */
uartp[MCFUART_UCR] = MCFUART_UCR_RXENABLE | MCFUART_UCR_TXENABLE;
return;
@@ -134,12 +183,10 @@ int rs_get_char(void)
}
void serial_setbrg(void) {
- DECLARE_GLOBAL_DATA_PTR;
rs_serial_setbaudrate(0,gd->bd->bi_baudrate);
}
int serial_init(void) {
- DECLARE_GLOBAL_DATA_PTR;
rs_serial_init(0,gd->baudrate);
return 0;
}
@@ -152,13 +199,14 @@ void serial_putc(const char c) {
}
void serial_puts (const char *s) {
- while (*s) {
+ while (*s)
serial_putc(*s++);
- }
}
int serial_getc(void) {
- while(!rs_is_char());
+ while(!rs_is_char())
+ WATCHDOG_RESET();
+
return rs_get_char();
}
diff --git a/cpu/mcf52x2/speed.c b/cpu/mcf52x2/speed.c
index 519c992581..ac860b2c67 100644
--- a/cpu/mcf52x2/speed.c
+++ b/cpu/mcf52x2/speed.c
@@ -24,13 +24,13 @@
#include <common.h>
#include <asm/processor.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/*
* get_clocks() fills in gd->cpu_clock and gd->bus_clk
*/
int get_clocks (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->cpu_clk = CFG_CLK;
#ifdef CONFIG_M5249
gd->bus_clk = gd->cpu_clk / 2;
diff --git a/cpu/mcf52x2/start.S b/cpu/mcf52x2/start.S
index b4926e2376..8a83ca5ef7 100644
--- a/cpu/mcf52x2/start.S
+++ b/cpu/mcf52x2/start.S
@@ -55,7 +55,15 @@
*/
_vectors:
-.long 0x00000000, _START
+.long 0x00000000 /* Flash offset is 0 until we setup CS0 */
+#if defined(CONFIG_R5200)
+.long 0x400
+#elif defined(CONFIG_M5282)
+.long _start - TEXT_BASE
+#else
+.long _START
+#endif
+
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
@@ -96,20 +104,23 @@ _vectors:
.text
+
+#if defined(CFG_INT_FLASH_BASE) && \
+ (defined(CONFIG_M5282) || defined(CONFIG_M5281))
+ #if (TEXT_BASE == CFG_INT_FLASH_BASE)
+ .long 0x55AA55AA,0xAA55AA55 /* CFM Backdoorkey */
+ .long 0xFFFFFFFF /* all sectors protected */
+ .long 0x00000000 /* supervisor/User restriction */
+ .long 0x00000000 /* programm/data space restriction */
+ .long 0x00000000 /* Flash security */
+ #endif
+#endif
.globl _start
_start:
nop
nop
move.w #0x2700,%sr
- /* if we come from a pre-loader we have no exception table and
- * therefore no VBR to set
- */
-#if !defined(CONFIG_MONITOR_IS_IN_RAM)
- move.l #CFG_FLASH_BASE, %d0
- movec %d0, %VBR
-#endif
-
#if defined(CONFIG_M5272) || defined(CONFIG_M5249)
move.l #(CFG_MBAR + 1), %d0 /* set MBAR address + valid flag */
move.c %d0, %MBAR
@@ -124,26 +135,70 @@ _start:
movec %d0, %RAMBAR0
#endif /* #if defined(CONFIG_M5272) || defined(CONFIG_M5249) */
-#ifdef CONFIG_M5282
+#if defined(CONFIG_M5282) || defined(CONFIG_M5271)
/* Initialize IPSBAR */
move.l #(CFG_MBAR + 1), %d0 /* set IPSBAR address + valid flag */
move.l %d0, 0x40000000
+ /* Initialize RAMBAR1: locate SRAM and validate it */
+ move.l #(CFG_INIT_RAM_ADDR + 0x21), %d0
+ movec %d0, %RAMBAR1
+
+#if (TEXT_BASE == CFG_INT_FLASH_BASE)
+ /* Setup code in SRAM to initialize FLASHBAR, if start from internal Flash */
+
+ move.l #(_flashbar_setup-CFG_INT_FLASH_BASE), %a0
+ move.l #(_flashbar_setup_end-CFG_INT_FLASH_BASE), %a1
+ move.l #(CFG_INIT_RAM_ADDR), %a2
+_copy_flash:
+ move.l (%a0)+, (%a2)+
+ cmp.l %a0, %a1
+ bgt.s _copy_flash
+ jmp CFG_INIT_RAM_ADDR
+
+_flashbar_setup:
/* Initialize FLASHBAR: locate internal Flash and validate it */
move.l #(CFG_INT_FLASH_BASE + 0x21), %d0
movec %d0, %RAMBAR0
+ jmp _after_flashbar_copy.L /* Force jump to absolute address */
+_flashbar_setup_end:
+ nop
+_after_flashbar_copy:
+#else
+ /* Setup code to initialize FLASHBAR, if start from external Memory */
+ move.l #(CFG_INT_FLASH_BASE + 0x21), %d0
+ movec %d0, %RAMBAR0
+#endif /* (TEXT_BASE == CFG_INT_FLASH_BASE) */
- /* Initialize RAMBAR1: locate SRAM and validate it */
- move.l #(CFG_INIT_RAM_ADDR + 0x21), %d0
- movec %d0, %RAMBAR1
+#endif
+ /* if we come from a pre-loader we have no exception table and
+ * therefore no VBR to set
+ */
+#if !defined(CONFIG_MONITOR_IS_IN_RAM)
+ move.l #CFG_FLASH_BASE, %d0
+ movec %d0, %VBR
#endif
+#ifdef CONFIG_R5200
+ move.l #(_flash_setup-CFG_FLASH_BASE), %a0
+ move.l #(_flash_setup_end-CFG_FLASH_BASE), %a1
+ move.l #(CFG_INIT_RAM_ADDR), %a2
+_copy_flash:
+ move.l (%a0)+, (%a2)+
+ cmp.l %a0, %a1
+ bgt.s _copy_flash
+ jmp CFG_INIT_RAM_ADDR
+_after_flash_copy:
+#endif
+
+#if 0
/* invalidate and disable cache */
move.l #0x01000000, %d0 /* Invalidate cache cmd */
movec %d0, %CACR /* Invalidate cache */
move.l #0, %d0
movec %d0, %ACR0
movec %d0, %ACR1
+#endif
/* set stackpointer to end of internal ram to get some stackspace for the first c-code */
move.l #(CFG_INIT_RAM_ADDR + CFG_INIT_SP_OFFSET), %sp
@@ -154,10 +209,28 @@ _start:
bsr cpu_init_f /* run low-level CPU init code (from flash) */
bsr board_init_f /* run low-level board init code (from flash) */
- /* board_init_f() does not return
+ /* board_init_f() does not return */
/*------------------------------------------------------------------------------*/
+#ifdef CONFIG_R5200
+_flash_setup:
+ /* CSAR0 */
+ move.l #((CFG_FLASH_BASE & 0xffff0000) >> 16), %d0
+ move.w %d0, 0x40000080
+
+ /* CSCR0 */
+ move.l #0x2180, %d0 /* 8 wait states, 16bit port, auto ack, */
+ move.w %d0, 0x4000008A
+
+ /* CSMR0 */
+ move.l #0x001f0001, %d0 /* 2 MB, valid */
+ move.l %d0, 0x40000084
+
+ jmp _after_flash_copy.L
+_flash_setup_end:
+#endif
+
/*
* void relocate_code (addr_sp, gd, addr_moni)
*
@@ -180,7 +253,6 @@ relocate_code:
move.l #CFG_MONITOR_BASE, %a1
move.l #__init_end, %a2
move.l %a0, %a3
-
/* copy the code to RAM */
1:
move.l (%a1)+, (%a3)+
@@ -191,14 +263,14 @@ relocate_code:
* We are done. Do not return, instead branch to second part of board
* initialization, now running from RAM.
*/
- move.l %a0, %a1
+ move.l %a0, %a1
add.l #(in_ram - CFG_MONITOR_BASE), %a1
jmp (%a1)
in_ram:
clear_bss:
- /*
+ /*
* Now clear BSS segment
*/
move.l %a0, %a1
@@ -228,6 +300,23 @@ clear_bss:
cmp.l %a2, %a1
bne 7b
+#if defined(CONFIG_M5281) || defined(CONFIG_M5282)
+ /* patch the 3 accesspoints to 3 ichache_state */
+ /* quick and dirty */
+
+ move.l %a0,%d1
+ add.l #(icache_state - CFG_MONITOR_BASE),%d1
+ move.l %a0,%a1
+ add.l #(icache_state_access_1+2 - CFG_MONITOR_BASE),%a1
+ move.l %d1,(%a1)
+ move.l %a0,%a1
+ add.l #(icache_state_access_2+2 - CFG_MONITOR_BASE),%a1
+ move.l %d1,(%a1)
+ move.l %a0,%a1
+ add.l #(icache_state_access_3+2 - CFG_MONITOR_BASE),%a1
+ move.l %d1,(%a1)
+#endif
+
/* calculate relative jump to board_init_r in ram */
move.l %a0, %a1
add.l #(board_init_r - CFG_MONITOR_BASE), %a1
@@ -235,6 +324,10 @@ clear_bss:
/* set parameters for board_init_r */
move.l %a0,-(%sp) /* dest_addr */
move.l %d0,-(%sp) /* gd */
+ #if defined(DEBUG) && (TEXT_BASE != CFG_INT_FLASH_BASE) && \
+ defined(CFG_HALT_BEFOR_RAM_JUMP)
+ halt
+ #endif
jsr (%a1)
/*------------------------------------------------------------------------------*/
@@ -289,6 +382,7 @@ icache_enable:
move.l #0x80400100, %d0 /* Setup cache mask, data cache disabel*/
movec %d0, %CACR /* Enable cache */
moveq #1, %d0
+icache_state_access_1:
move.l %d0, icache_state
rts
#endif
@@ -323,18 +417,19 @@ icache_disable:
movec %d0, %ACR0 /* Enable cache */
movec %d0, %ACR1 /* Enable cache */
moveq #0, %d0
+icache_state_access_2:
move.l %d0, icache_state
rts
.globl icache_status
icache_status:
+icache_state_access_3:
move.l icache_state, %d0
rts
.data
icache_state:
- .long 1
-
+ .long 0 /* cache is diabled on inirialization */
/*------------------------------------------------------------------------------*/
diff --git a/cpu/mips/au1x00_eth.c b/cpu/mips/au1x00_eth.c
index 9ce9b35397..078e8328b6 100644
--- a/cpu/mips/au1x00_eth.c
+++ b/cpu/mips/au1x00_eth.c
@@ -224,10 +224,14 @@ static void au1x00_halt(struct eth_device* dev){
int au1x00_enet_initialize(bd_t *bis){
struct eth_device* dev;
- dev = (struct eth_device*) malloc(sizeof *dev);
+ if ((dev = (struct eth_device*)malloc(sizeof *dev)) == NULL) {
+ puts ("malloc failed\n");
+ return 0;
+ }
+
memset(dev, 0, sizeof *dev);
- sprintf(dev->name, "Au1X00 ETHERNET");
+ sprintf(dev->name, "Au1X00 ethernet");
dev->iobase = 0;
dev->priv = 0;
dev->init = au1x00_init;
diff --git a/cpu/mips/config.mk b/cpu/mips/config.mk
index c357615c03..b29986e26b 100644
--- a/cpu/mips/config.mk
+++ b/cpu/mips/config.mk
@@ -21,7 +21,7 @@
# MA 02111-1307 USA
#
v=$(shell \
-mips-linux-as --version|grep "GNU assembler"|awk '{print $$3}'|awk -F . '{print $$2}')
+$(CROSS_COMPILE)as --version|grep "GNU assembler"|awk '{print $$3}'|awk -F . '{print $$2}')
MIPSFLAGS=$(shell \
if [ "$v" -lt "14" ]; then \
echo "-mcpu=4kc"; \
diff --git a/cpu/mpc5xx/cpu.c b/cpu/mpc5xx/cpu.c
index 0c22a31f0d..4bef90c48a 100644
--- a/cpu/mpc5xx/cpu.c
+++ b/cpu/mpc5xx/cpu.c
@@ -34,6 +34,7 @@
#include <command.h>
#include <mpc5xx.h>
+DECLARE_GLOBAL_DATA_PTR;
#if (defined(CONFIG_MPC555))
# define ID_STR "MPC555/556"
@@ -62,8 +63,6 @@ static int check_cpu_version (long clock, uint pvr, uint immr)
*/
int checkcpu (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
ulong clock = gd->cpu_clk;
uint immr = get_immr (0); /* Return full IMMR contents */
uint pvr = get_pvr (); /* Retrieve PVR register */
@@ -104,7 +103,6 @@ void reset_5xx_watchdog (volatile immap_t * immr)
*/
unsigned long get_tbclk (void)
{
- DECLARE_GLOBAL_DATA_PTR;
volatile immap_t *immr = (volatile immap_t *) CFG_IMMR;
ulong oscclk, factor;
diff --git a/cpu/mpc5xx/serial.c b/cpu/mpc5xx/serial.c
index 48687829e5..ac5556f05c 100644
--- a/cpu/mpc5xx/serial.c
+++ b/cpu/mpc5xx/serial.c
@@ -34,6 +34,7 @@
#include <command.h>
#include <mpc5xx.h>
+DECLARE_GLOBAL_DATA_PTR;
/*
* Local function prototypes
@@ -128,7 +129,6 @@ int serial_tstc()
void serial_setbrg (void)
{
- DECLARE_GLOBAL_DATA_PTR;
volatile immap_t *immr = (immap_t *)CFG_IMMR;
short scxbr;
diff --git a/cpu/mpc5xx/speed.c b/cpu/mpc5xx/speed.c
index f6097f5c13..6a1fa155e2 100644
--- a/cpu/mpc5xx/speed.c
+++ b/cpu/mpc5xx/speed.c
@@ -31,12 +31,13 @@
#include <mpc5xx.h>
#include <asm/processor.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/*
* Get cpu and bus clock
*/
int get_clocks (void)
{
- DECLARE_GLOBAL_DATA_PTR;
volatile immap_t *immr = (immap_t *) CFG_IMMR;
#ifndef CONFIG_5xx_GCLK_FREQ
diff --git a/cpu/mpc5xxx/cpu.c b/cpu/mpc5xxx/cpu.c
index 2d695d12eb..6b6f8282cf 100644
--- a/cpu/mpc5xxx/cpu.c
+++ b/cpu/mpc5xxx/cpu.c
@@ -31,14 +31,14 @@
#include <mpc5xxx.h>
#include <asm/processor.h>
+DECLARE_GLOBAL_DATA_PTR;
+
int checkcpu (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
ulong clock = gd->cpu_clk;
char buf[32];
#ifndef CONFIG_MGT5100
- uint svr;
+ uint svr, pvr;
#endif
puts ("CPU: ");
@@ -47,7 +47,8 @@ int checkcpu (void)
puts (CPU_ID_STR);
printf (" (JTAG ID %08lx)", *(vu_long *)MPC5XXX_CDM_JTAGID);
#else
- svr = get_svr ();
+ svr = get_svr();
+ pvr = get_pvr();
switch (SVR_VER (svr)) {
case SVR_MPC5200:
printf ("MPC5200");
@@ -57,11 +58,10 @@ int checkcpu (void)
break;
}
- printf (" v%d.%d", SVR_MJREV (svr), SVR_MNREV (svr));
+ printf (" v%d.%d, Core v%d.%d", SVR_MJREV (svr), SVR_MNREV (svr),
+ PVR_MAJ(pvr), PVR_MIN(pvr));
#endif
-
printf (" at %s MHz\n", strmhz (buf, clock));
-
return 0;
}
@@ -94,8 +94,6 @@ do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
*/
unsigned long get_tbclk (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
ulong tbclk;
tbclk = (gd->bus_clk + 3L) / 4L;
diff --git a/cpu/mpc5xxx/cpu_init.c b/cpu/mpc5xxx/cpu_init.c
index 3df005009e..b7e00b3e24 100644
--- a/cpu/mpc5xxx/cpu_init.c
+++ b/cpu/mpc5xxx/cpu_init.c
@@ -24,6 +24,8 @@
#include <common.h>
#include <mpc5xxx.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/*
* Breath some life into the CPU...
*
@@ -32,8 +34,6 @@
*/
void cpu_init_f (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
unsigned long addecr = (1 << 25); /* Boot_CS */
#if defined(CFG_RAMBOOT) && defined(CONFIG_MGT5100)
addecr |= (1 << 22); /* SDRAM enable */
@@ -152,6 +152,10 @@ void cpu_init_f (void)
/* enable timebase */
*(vu_long *)(MPC5XXX_XLBARB + 0x40) |= (1 << 13);
+ /* Enable snooping for RAM */
+ *(vu_long *)(MPC5XXX_XLBARB + 0x40) |= (1 << 15);
+ *(vu_long *)(MPC5XXX_XLBARB + 0x70) = CFG_SDRAM_BASE | 0x1d;
+
# if defined(CFG_IPBSPEED_133)
/* Motorola reports IPB should better run at 133 MHz. */
*(vu_long *)MPC5XXX_ADDECR |= 1;
diff --git a/cpu/mpc5xxx/fec.c b/cpu/mpc5xxx/fec.c
index 86c8ce6879..19737ce868 100644
--- a/cpu/mpc5xxx/fec.c
+++ b/cpu/mpc5xxx/fec.c
@@ -14,6 +14,8 @@
#include "sdma.h"
#include "fec.h"
+DECLARE_GLOBAL_DATA_PTR;
+
/* #define DEBUG 0x28 */
#if (CONFIG_COMMANDS & CFG_CMD_NET) && defined(CONFIG_NET_MULTI) && \
@@ -242,7 +244,6 @@ static void mpc5xxx_fec_set_hwaddr(mpc5xxx_fec_priv *fec, char *mac)
/********************************************************************/
static int mpc5xxx_fec_init(struct eth_device *dev, bd_t * bis)
{
- DECLARE_GLOBAL_DATA_PTR;
mpc5xxx_fec_priv *fec = (mpc5xxx_fec_priv *)dev->priv;
struct mpc5xxx_sdma *sdma = (struct mpc5xxx_sdma *)MPC5XXX_SDMA;
@@ -393,7 +394,6 @@ static int mpc5xxx_fec_init(struct eth_device *dev, bd_t * bis)
/********************************************************************/
static int mpc5xxx_fec_init_phy(struct eth_device *dev, bd_t * bis)
{
- DECLARE_GLOBAL_DATA_PTR;
mpc5xxx_fec_priv *fec = (mpc5xxx_fec_priv *)dev->priv;
const uint8 phyAddr = CONFIG_PHY_ADDR; /* Only one PHY */
@@ -880,8 +880,9 @@ int mpc5xxx_fec_initialize(bd_t * bis)
fec->rbdBase = (FEC_RBD *)(FEC_BD_BASE + FEC_TBD_NUM * sizeof(FEC_TBD));
#if defined(CONFIG_CANMB) || defined(CONFIG_HMI1001) || \
defined(CONFIG_ICECUBE) || defined(CONFIG_INKA4X0) || \
+ defined(CONFIG_MCC200) || defined(CONFIG_O2DNT) || \
defined(CONFIG_PM520) || defined(CONFIG_TOP5200) || \
- defined(CONFIG_TQM5200) || defined(CONFIG_O2DNT)
+ defined(CONFIG_TQM5200)
# ifndef CONFIG_FEC_10MBIT
fec->xcv_type = MII100;
# else
diff --git a/cpu/mpc5xxx/i2c.c b/cpu/mpc5xxx/i2c.c
index 044db46f6f..0f02e78a3b 100644
--- a/cpu/mpc5xxx/i2c.c
+++ b/cpu/mpc5xxx/i2c.c
@@ -23,6 +23,8 @@
#include <common.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#ifdef CONFIG_HARD_I2C
#include <mpc5xxx.h>
@@ -228,7 +230,6 @@ void i2c_init(int speed, int saddr)
static int mpc_get_fdr(int speed)
{
- DECLARE_GLOBAL_DATA_PTR;
static int fdr = -1;
if (fdr == -1) {
diff --git a/cpu/mpc5xxx/ide.c b/cpu/mpc5xxx/ide.c
index 1af794c6ec..29b99f6b15 100644
--- a/cpu/mpc5xxx/ide.c
+++ b/cpu/mpc5xxx/ide.c
@@ -27,6 +27,8 @@
#ifdef CFG_CMD_IDE
#include <mpc5xxx.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#define CALC_TIMING(t) (t + period - 1) / period
#ifdef CONFIG_IDE_RESET
@@ -35,7 +37,6 @@ extern void init_ide_reset (void);
int ide_preinit (void)
{
- DECLARE_GLOBAL_DATA_PTR;
long period, t0, t1, t2_8, t2_16, t4, ta;
vu_long reg;
struct mpc5xxx_sdma *psdma = (struct mpc5xxx_sdma *) MPC5XXX_SDMA;
diff --git a/cpu/mpc5xxx/pci_mpc5200.c b/cpu/mpc5xxx/pci_mpc5200.c
index 1d903459e0..2f01d5ce99 100644
--- a/cpu/mpc5xxx/pci_mpc5200.c
+++ b/cpu/mpc5xxx/pci_mpc5200.c
@@ -135,10 +135,6 @@ void pci_mpc5xxx_init (struct pci_controller *hose)
*(vu_long *)MPC5XXX_PCI_BAR1 = CONFIG_PCI_MEMORY_BUS | (1 << 3);
*(vu_long *)MPC5XXX_PCI_TBATR1 = CONFIG_PCI_MEMORY_PHYS | 1;
- /* Enable snooping for RAM */
- *(vu_long *)(MPC5XXX_XLBARB + 0x40) |= (1 << 15);
- *(vu_long *)(MPC5XXX_XLBARB + 0x70) = CONFIG_PCI_MEMORY_PHYS | 0x1d;
-
/* Park XLB on PCI */
*(vu_long *)(MPC5XXX_XLBARB + 0x40) &= ~((7 << 8) | (3 << 5));
*(vu_long *)(MPC5XXX_XLBARB + 0x40) |= (3 << 8) | (3 << 5);
diff --git a/cpu/mpc5xxx/serial.c b/cpu/mpc5xxx/serial.c
index 91e1def98c..6cb523d3c7 100644
--- a/cpu/mpc5xxx/serial.c
+++ b/cpu/mpc5xxx/serial.c
@@ -23,6 +23,9 @@
* Hacked for MPC8260 by Murray.Jensen@cmst.csiro.au, 19-Oct-00, with
* changes based on the file arch/ppc/mbxboot/m8260_tty.c from the
* Linux/PPC sources (m8260_tty.c had no copyright info in it).
+ *
+ * Martin Krause, 8 Jun 2006
+ * Added CONFIG_SERIAL_MULTI support
*/
/*
@@ -33,6 +36,12 @@
#include <common.h>
#include <mpc5xxx.h>
+#if defined (CONFIG_SERIAL_MULTI)
+#include <serial.h>
+#endif
+
+DECLARE_GLOBAL_DATA_PTR;
+
#if defined(CONFIG_PSC_CONSOLE)
#if CONFIG_PSC_CONSOLE == 1
@@ -53,11 +62,41 @@
#error CONFIG_PSC_CONSOLE must be in 1 ... 6
#endif
+#if defined(CONFIG_SERIAL_MULTI) && !defined(CONFIG_PSC_CONSOLE2)
+#error you must define CONFIG_PSC_CONSOLE2 if CONFIG_SERIAL_MULTI is set
+#endif
+
+#if defined(CONFIG_SERIAL_MULTI)
+#if CONFIG_PSC_CONSOLE2 == 1
+#define PSC_BASE2 MPC5XXX_PSC1
+#elif CONFIG_PSC_CONSOLE2 == 2
+#define PSC_BASE2 MPC5XXX_PSC2
+#elif CONFIG_PSC_CONSOLE2 == 3
+#define PSC_BASE2 MPC5XXX_PSC3
+#elif defined(CONFIG_MGT5100)
+#error CONFIG_PSC_CONSOLE2 must be in 1, 2 or 3
+#elif CONFIG_PSC_CONSOLE2 == 4
+#define PSC_BASE2 MPC5XXX_PSC4
+#elif CONFIG_PSC_CONSOLE2 == 5
+#define PSC_BASE2 MPC5XXX_PSC5
+#elif CONFIG_PSC_CONSOLE2 == 6
+#define PSC_BASE2 MPC5XXX_PSC6
+#else
+#error CONFIG_PSC_CONSOLE2 must be in 1 ... 6
+#endif
+#endif /* CONFIG_SERIAL_MULTI */
+
+#if defined(CONFIG_SERIAL_MULTI)
+int serial_init_dev (unsigned long dev_base)
+#else
int serial_init (void)
+#endif
{
- DECLARE_GLOBAL_DATA_PTR;
-
+#if defined(CONFIG_SERIAL_MULTI)
+ volatile struct mpc5xxx_psc *psc = (struct mpc5xxx_psc *)dev_base;
+#else
volatile struct mpc5xxx_psc *psc = (struct mpc5xxx_psc *)PSC_BASE;
+#endif
unsigned long baseclk;
int div;
@@ -100,13 +139,24 @@ int serial_init (void)
return (0);
}
-void
-serial_putc(const char c)
+#if defined(CONFIG_SERIAL_MULTI)
+void serial_putc_dev (unsigned long dev_base, const char c)
+#else
+void serial_putc(const char c)
+#endif
{
+#if defined(CONFIG_SERIAL_MULTI)
+ volatile struct mpc5xxx_psc *psc = (struct mpc5xxx_psc *)dev_base;
+#else
volatile struct mpc5xxx_psc *psc = (struct mpc5xxx_psc *)PSC_BASE;
+#endif
if (c == '\n')
+#if defined(CONFIG_SERIAL_MULTI)
+ serial_putc_dev (dev_base, '\r');
+#else
serial_putc('\r');
+#endif
/* Wait for last character to go. */
while (!(psc->psc_status & PSC_SR_TXEMP))
@@ -115,18 +165,32 @@ serial_putc(const char c)
psc->psc_buffer_8 = c;
}
-void
-serial_puts (const char *s)
+#if defined(CONFIG_SERIAL_MULTI)
+void serial_puts_dev (unsigned long dev_base, const char *s)
+#else
+void serial_puts (const char *s)
+#endif
{
while (*s) {
+#if defined(CONFIG_SERIAL_MULTI)
+ serial_putc_dev (dev_base, *s++);
+#else
serial_putc (*s++);
+#endif
}
}
-int
-serial_getc(void)
+#if defined(CONFIG_SERIAL_MULTI)
+int serial_getc_dev (unsigned long dev_base)
+#else
+int serial_getc(void)
+#endif
{
+#if defined(CONFIG_SERIAL_MULTI)
+ volatile struct mpc5xxx_psc *psc = (struct mpc5xxx_psc *)dev_base;
+#else
volatile struct mpc5xxx_psc *psc = (struct mpc5xxx_psc *)PSC_BASE;
+#endif
/* Wait for a character to arrive. */
while (!(psc->psc_status & PSC_SR_RXRDY))
@@ -135,20 +199,32 @@ serial_getc(void)
return psc->psc_buffer_8;
}
-int
-serial_tstc(void)
+#if defined(CONFIG_SERIAL_MULTI)
+int serial_tstc_dev (unsigned long dev_base)
+#else
+int serial_tstc(void)
+#endif
{
+#if defined(CONFIG_SERIAL_MULTI)
+ volatile struct mpc5xxx_psc *psc = (struct mpc5xxx_psc *)dev_base;
+#else
volatile struct mpc5xxx_psc *psc = (struct mpc5xxx_psc *)PSC_BASE;
+#endif
return (psc->psc_status & PSC_SR_RXRDY);
}
-void
-serial_setbrg(void)
+#if defined(CONFIG_SERIAL_MULTI)
+void serial_setbrg_dev (unsigned long dev_base)
+#else
+void serial_setbrg(void)
+#endif
{
- DECLARE_GLOBAL_DATA_PTR;
-
+#if defined(CONFIG_SERIAL_MULTI)
+ volatile struct mpc5xxx_psc *psc = (struct mpc5xxx_psc *)dev_base;
+#else
volatile struct mpc5xxx_psc *psc = (struct mpc5xxx_psc *)PSC_BASE;
+#endif
unsigned long baseclk, div;
#if defined(CONFIG_MGT5100)
@@ -162,4 +238,87 @@ serial_setbrg(void)
psc->ctur = (div >> 8) & 0xFF;
psc->ctlr = div & 0xff;
}
+
+#if defined(CONFIG_SERIAL_MULTI)
+int serial0_init(void)
+{
+ return (serial_init_dev(PSC_BASE));
+}
+
+int serial1_init(void)
+{
+ return (serial_init_dev(PSC_BASE2));
+}
+void serial0_setbrg (void)
+{
+ serial_setbrg_dev(PSC_BASE);
+}
+void serial1_setbrg (void)
+{
+ serial_setbrg_dev(PSC_BASE2);
+}
+
+void serial0_putc(const char c)
+{
+ serial_putc_dev(PSC_BASE,c);
+}
+
+void serial1_putc(const char c)
+{
+ serial_putc_dev(PSC_BASE2, c);
+}
+void serial0_puts(const char *s)
+{
+ serial_puts_dev(PSC_BASE, s);
+}
+
+void serial1_puts(const char *s)
+{
+ serial_puts_dev(PSC_BASE2, s);
+}
+
+int serial0_getc(void)
+{
+ return(serial_getc_dev(PSC_BASE));
+}
+
+int serial1_getc(void)
+{
+ return(serial_getc_dev(PSC_BASE2));
+}
+int serial0_tstc(void)
+{
+ return (serial_tstc_dev(PSC_BASE));
+}
+
+int serial1_tstc(void)
+{
+ return (serial_tstc_dev(PSC_BASE2));
+}
+
+struct serial_device serial0_device =
+{
+ "serial0",
+ "UART0",
+ serial0_init,
+ serial0_setbrg,
+ serial0_getc,
+ serial0_tstc,
+ serial0_putc,
+ serial0_puts,
+};
+
+struct serial_device serial1_device =
+{
+ "serial1",
+ "UART1",
+ serial1_init,
+ serial1_setbrg,
+ serial1_getc,
+ serial1_tstc,
+ serial1_putc,
+ serial1_puts,
+};
+#endif /* CONFIG_SERIAL_MULTI */
+
#endif /* CONFIG_PSC_CONSOLE */
diff --git a/cpu/mpc5xxx/speed.c b/cpu/mpc5xxx/speed.c
index 4f4e814e94..7847adcefa 100644
--- a/cpu/mpc5xxx/speed.c
+++ b/cpu/mpc5xxx/speed.c
@@ -25,6 +25,8 @@
#include <mpc5xxx.h>
#include <asm/processor.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/* ------------------------------------------------------------------------- */
/* Bus-to-Core Multipliers */
@@ -43,8 +45,6 @@ static int bus2core[] = {
int get_clocks (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
ulong val, vco;
#if !defined(CFG_MPC5XXX_CLKIN)
@@ -81,8 +81,6 @@ int get_clocks (void)
int prt_mpc5xxx_clks (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
printf(" Bus %ld MHz, IPB %ld MHz, PCI %ld MHz\n",
gd->bus_clk / 1000000, gd->ipb_clk / 1000000,
gd->pci_clk / 1000000);
diff --git a/cpu/mpc8220/cpu.c b/cpu/mpc8220/cpu.c
index 0cfe8089b8..be274cde9e 100644
--- a/cpu/mpc8220/cpu.c
+++ b/cpu/mpc8220/cpu.c
@@ -31,10 +31,10 @@
#include <mpc8220.h>
#include <asm/processor.h>
+DECLARE_GLOBAL_DATA_PTR;
+
int checkcpu (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
ulong clock = gd->cpu_clk;
char buf[32];
@@ -81,8 +81,6 @@ int do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
*/
unsigned long get_tbclk (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
ulong tbclk;
tbclk = (gd->bus_clk + 3L) / 4L;
diff --git a/cpu/mpc8220/cpu_init.c b/cpu/mpc8220/cpu_init.c
index 8c358a870c..3cf5f66a13 100644
--- a/cpu/mpc8220/cpu_init.c
+++ b/cpu/mpc8220/cpu_init.c
@@ -24,6 +24,8 @@
#include <common.h>
#include <mpc8220.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/*
* Breath some life into the CPU...
*
@@ -32,8 +34,6 @@
*/
void cpu_init_f (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
volatile flexbus8220_t *flexbus = (volatile flexbus8220_t *) MMAP_FB;
volatile pcfg8220_t *portcfg = (volatile pcfg8220_t *) MMAP_PCFG;
volatile xlbarb8220_t *xlbarb = (volatile xlbarb8220_t *) MMAP_XLBARB;
diff --git a/cpu/mpc8220/dramSetup.c b/cpu/mpc8220/dramSetup.c
index 1d0d384722..08e3172f2b 100644
--- a/cpu/mpc8220/dramSetup.c
+++ b/cpu/mpc8220/dramSetup.c
@@ -32,6 +32,8 @@ characteristics to initialize the dram on MPC8220
#include "i2cCore.h"
#include "dramSetup.h"
+DECLARE_GLOBAL_DATA_PTR;
+
#define SPD_SIZE CFG_SDRAM_SPD_SIZE
#define DRAM_SPD (CFG_SDRAM_SPD_I2C_ADDR)<<1 /* on Board SPD eeprom */
#define TOTAL_BANK CFG_SDRAM_TOTAL_BANKS
@@ -91,8 +93,6 @@ int spd_readbyte (volatile i2c8220_t * pi2c, u8 * readb, int *index)
int readSpdData (u8 * spdData)
{
- DECLARE_GLOBAL_DATA_PTR;
-
volatile i2c8220_t *pi2cReg;
volatile pcfg8220_t *pcfg;
u8 slvAdr = DRAM_SPD;
@@ -403,8 +403,6 @@ u8 checkMuxSetting (u8 rows, u8 columns)
u32 dramSetup (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
draminfo_t DramInfo[TOTAL_BANK];
draminfo_t *pDramInfo;
u32 size, temp, cfg_value, mode_value, refresh;
diff --git a/cpu/mpc8220/i2c.c b/cpu/mpc8220/i2c.c
index 62f7c0f5d3..d67936dc31 100644
--- a/cpu/mpc8220/i2c.c
+++ b/cpu/mpc8220/i2c.c
@@ -23,6 +23,8 @@
#include <common.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#ifdef CONFIG_HARD_I2C
#include <mpc8220.h>
@@ -235,7 +237,6 @@ void i2c_init (int speed, int saddr)
static int mpc_get_fdr (int speed)
{
- DECLARE_GLOBAL_DATA_PTR;
static int fdr = -1;
if (fdr == -1) {
diff --git a/cpu/mpc8220/speed.c b/cpu/mpc8220/speed.c
index 8346efe12e..200a762711 100644
--- a/cpu/mpc8220/speed.c
+++ b/cpu/mpc8220/speed.c
@@ -25,6 +25,8 @@
#include <mpc8220.h>
#include <asm/processor.h>
+DECLARE_GLOBAL_DATA_PTR;
+
typedef struct pllmultiplier {
u8 hid1;
int multi;
@@ -39,8 +41,6 @@ typedef struct pllmultiplier {
int get_clocks (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
pllcfg_t bus2core[] = {
{0x02, 2, 8}, /* 1 */
{0x01, 2, 4},
@@ -109,8 +109,6 @@ int get_clocks (void)
int prt_mpc8220_clks (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
printf (" Bus %ld MHz, CPU %ld MHz, PCI %ld MHz, VCO %ld MHz\n",
gd->bus_clk / 1000000, gd->cpu_clk / 1000000,
gd->pci_clk / 1000000, gd->vco_clk / 1000000);
diff --git a/cpu/mpc8220/uart.c b/cpu/mpc8220/uart.c
index 5f54aac16e..0c4b536b48 100644
--- a/cpu/mpc8220/uart.c
+++ b/cpu/mpc8220/uart.c
@@ -30,12 +30,13 @@
#include <common.h>
#include <mpc8220.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#define PSC_BASE MMAP_PSC1
#if defined(CONFIG_PSC_CONSOLE)
int serial_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
volatile psc8220_t *psc = (psc8220_t *) PSC_BASE;
u32 counter;
@@ -106,8 +107,6 @@ int serial_tstc (void)
void serial_setbrg (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
volatile psc8220_t *psc = (psc8220_t *) PSC_BASE;
u32 counter;
diff --git a/cpu/mpc824x/cpu.c b/cpu/mpc824x/cpu.c
index 312dfe2296..0a45cc8419 100644
--- a/cpu/mpc824x/cpu.c
+++ b/cpu/mpc824x/cpu.c
@@ -26,10 +26,10 @@
#include <common.h>
#include <command.h>
+DECLARE_GLOBAL_DATA_PTR;
+
int checkcpu (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
unsigned int pvr = get_pvr ();
unsigned int version = pvr >> 16;
unsigned char revision;
diff --git a/cpu/mpc824x/speed.c b/cpu/mpc824x/speed.c
index a37a087af1..fdcb9723cb 100644
--- a/cpu/mpc824x/speed.c
+++ b/cpu/mpc824x/speed.c
@@ -29,6 +29,8 @@
#include <mpc824x.h>
#include <asm/processor.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/* ------------------------------------------------------------------------- */
/* NOTE: This describes the proper use of this file.
*
@@ -107,8 +109,6 @@ short pllratio_to_factor[] = {
/* compute the CPU and memory bus clock frequencies */
int get_clocks (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
uint hid1 = mfspr(HID1);
hid1 = (hid1 >> (32-5)) & 0x1f;
gd->cpu_clk = (pllratio_to_factor[hid1] * get_bus_freq(0) + 5)
diff --git a/cpu/mpc8260/commproc.c b/cpu/mpc8260/commproc.c
index e5c5fcf27b..8777e77369 100644
--- a/cpu/mpc8260/commproc.c
+++ b/cpu/mpc8260/commproc.c
@@ -20,11 +20,11 @@
#include <common.h>
#include <asm/cpm_8260.h>
+DECLARE_GLOBAL_DATA_PTR;
+
void
m8260_cpm_reset(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
volatile immap_t *immr = (immap_t *)CFG_IMMR;
volatile ulong count;
@@ -54,8 +54,6 @@ m8260_cpm_reset(void)
uint
m8260_cpm_dpalloc(uint size, uint align)
{
- DECLARE_GLOBAL_DATA_PTR;
-
volatile immap_t *immr = (immap_t *)CFG_IMMR;
uint retloc;
uint align_mask, off;
@@ -112,8 +110,6 @@ m8260_cpm_hostalloc(uint size, uint align)
void
m8260_cpm_setbrg(uint brg, uint rate)
{
- DECLARE_GLOBAL_DATA_PTR;
-
volatile immap_t *immr = (immap_t *)CFG_IMMR;
volatile uint *bp;
uint cd = BRG_UART_CLK / rate;
@@ -137,8 +133,6 @@ m8260_cpm_setbrg(uint brg, uint rate)
void
m8260_cpm_fastbrg(uint brg, uint rate, int div16)
{
- DECLARE_GLOBAL_DATA_PTR;
-
volatile immap_t *immr = (immap_t *)CFG_IMMR;
volatile uint *bp;
diff --git a/cpu/mpc8260/cpu.c b/cpu/mpc8260/cpu.c
index 5d979330a3..4f23012b72 100644
--- a/cpu/mpc8260/cpu.c
+++ b/cpu/mpc8260/cpu.c
@@ -1,5 +1,5 @@
/*
- * (C) Copyright 2000-2003
+ * (C) Copyright 2000-2006
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
@@ -47,10 +47,10 @@
#include <asm/processor.h>
#include <asm/cpm_8260.h>
+DECLARE_GLOBAL_DATA_PTR;
+
int checkcpu (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
volatile immap_t *immap = (immap_t *) CFG_IMMR;
ulong clock = gd->cpu_clk;
uint pvr = get_pvr ();
@@ -264,8 +264,6 @@ do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
*/
unsigned long get_tbclk (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
ulong tbclk;
tbclk = (gd->bus_clk + 3L) / 4L;
diff --git a/cpu/mpc8260/cpu_init.c b/cpu/mpc8260/cpu_init.c
index babcce4e9b..640026be5a 100644
--- a/cpu/mpc8260/cpu_init.c
+++ b/cpu/mpc8260/cpu_init.c
@@ -26,6 +26,8 @@
#include <asm/cpm_8260.h>
#include <ioports.h>
+DECLARE_GLOBAL_DATA_PTR;
+
static void config_8260_ioports (volatile immap_t * immr)
{
int portnum;
@@ -97,7 +99,6 @@ static void config_8260_ioports (volatile immap_t * immr)
*/
void cpu_init_f (volatile immap_t * immr)
{
- DECLARE_GLOBAL_DATA_PTR;
#if !defined(CONFIG_COGENT) /* done in start.S for the cogent */
uint sccr;
#endif
@@ -222,8 +223,6 @@ void cpu_init_f (volatile immap_t * immr)
*/
int cpu_init_r (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
volatile immap_t *immr = (immap_t *) gd->bd->bi_immr_base;
immr->im_cpm.cp_rccr = CFG_RCCR;
@@ -236,8 +235,6 @@ int cpu_init_r (void)
*/
int prt_8260_rsr (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
static struct {
ulong mask;
char *desc;
diff --git a/cpu/mpc8260/ether_fcc.c b/cpu/mpc8260/ether_fcc.c
index ed3515fcf3..584c40f17a 100644
--- a/cpu/mpc8260/ether_fcc.c
+++ b/cpu/mpc8260/ether_fcc.c
@@ -51,6 +51,8 @@
#include <miiphy.h>
#endif
+DECLARE_GLOBAL_DATA_PTR;
+
#if defined(CONFIG_ETHER_ON_FCC) && (CONFIG_COMMANDS & CFG_CMD_NET) && \
defined(CONFIG_NET_MULTI)
@@ -644,8 +646,6 @@ swap16 (unsigned short x)
void
eth_loopback_test (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
volatile immap_t *immr = (immap_t *)CFG_IMMR;
volatile cpm8260_t *cp = &(immr->im_cpm);
int c, nclosed;
diff --git a/cpu/mpc8260/i2c.c b/cpu/mpc8260/i2c.c
index ea97ab85fb..34bd3897f6 100644
--- a/cpu/mpc8260/i2c.c
+++ b/cpu/mpc8260/i2c.c
@@ -34,6 +34,8 @@
/* define to enable debug messages */
#undef DEBUG_I2C
+DECLARE_GLOBAL_DATA_PTR;
+
/* uSec to wait between polls of the i2c */
#define DELAY_US 100
/* uSec to wait for the CPM to start processing the buffer */
@@ -213,8 +215,6 @@ static int i2c_setrate(int hz, int speed)
void i2c_init(int speed, int slaveadd)
{
- DECLARE_GLOBAL_DATA_PTR;
-
volatile immap_t *immap = (immap_t *)CFG_IMMR ;
volatile cpm8260_t *cp = (cpm8260_t *)&immap->im_cpm;
volatile i2c8260_t *i2c = (i2c8260_t *)&immap->im_i2c;
diff --git a/cpu/mpc8260/interrupts.c b/cpu/mpc8260/interrupts.c
index b2e4d83924..56e9a72137 100644
--- a/cpu/mpc8260/interrupts.c
+++ b/cpu/mpc8260/interrupts.c
@@ -29,6 +29,8 @@
#include <mpc8260_irq.h>
#include <asm/processor.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/****************************************************************************/
struct irq_action {
@@ -140,8 +142,6 @@ static int m8260_get_irq (struct pt_regs *regs)
int interrupt_init_cpu (unsigned *decrementer_count)
{
- DECLARE_GLOBAL_DATA_PTR;
-
volatile immap_t *immr = (immap_t *) CFG_IMMR;
*decrementer_count = (gd->bus_clk / 4) / CFG_HZ;
diff --git a/cpu/mpc8260/pci.c b/cpu/mpc8260/pci.c
index 44576deb61..b14fc159be 100644
--- a/cpu/mpc8260/pci.c
+++ b/cpu/mpc8260/pci.c
@@ -33,6 +33,11 @@
#include <mpc8260.h>
#include <asm/m8260_pci.h>
#include <asm/io.h>
+
+#if defined CONFIG_MPC8266ADS || defined CONFIG_MPC8272 || defined CONFIG_PM826
+DECLARE_GLOBAL_DATA_PTR;
+#endif
+
/*
* Local->PCI map (from CPU) controlled by
* MPC826x master window
@@ -234,9 +239,6 @@ static inline void pci_outl (u32 addr, u32 data)
void pci_mpc8250_init (struct pci_controller *hose)
{
-#if defined CONFIG_MPC8266ADS || defined CONFIG_MPC8272
- DECLARE_GLOBAL_DATA_PTR;
-#endif
u16 tempShort;
volatile immap_t *immap = (immap_t *) CFG_IMMR;
@@ -399,7 +401,7 @@ void pci_mpc8250_init (struct pci_controller *hose)
hose->last_busno = 0xff;
/* System memory space */
-#if defined CONFIG_MPC8266ADS || defined CONFIG_MPC8272
+#if defined CONFIG_MPC8266ADS || defined CONFIG_MPC8272 || defined CONFIG_PM826
pci_set_region (hose->regions + 0,
PCI_SLV_MEM_BUS,
PCI_SLV_MEM_LOCAL,
diff --git a/cpu/mpc8260/serial_scc.c b/cpu/mpc8260/serial_scc.c
index 32016f2f91..3a6eaf0a67 100644
--- a/cpu/mpc8260/serial_scc.c
+++ b/cpu/mpc8260/serial_scc.c
@@ -32,6 +32,8 @@
#include <mpc8260.h>
#include <asm/cpm_8260.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#if defined(CONFIG_CONS_ON_SCC)
#if CONFIG_CONS_INDEX == 1 /* Console on SCC1 */
@@ -181,8 +183,6 @@ int serial_init (void)
void
serial_setbrg (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
#if defined(CONFIG_CONS_USE_EXTC)
m8260_cpm_extcbrg(SCC_INDEX, gd->baudrate,
CONFIG_CONS_EXTC_RATE, CONFIG_CONS_EXTC_PINSEL);
diff --git a/cpu/mpc8260/serial_smc.c b/cpu/mpc8260/serial_smc.c
index b486f8385e..f3dffeb119 100644
--- a/cpu/mpc8260/serial_smc.c
+++ b/cpu/mpc8260/serial_smc.c
@@ -34,6 +34,8 @@
#include <mpc8260.h>
#include <asm/cpm_8260.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#if defined(CONFIG_CONS_ON_SMC)
#if CONFIG_CONS_INDEX == 1 /* Console on SMC1 */
@@ -170,8 +172,6 @@ int serial_init (void)
void
serial_setbrg (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
#if defined(CONFIG_CONS_USE_EXTC)
m8260_cpm_extcbrg(brg_map[SMC_INDEX], gd->baudrate,
CONFIG_CONS_EXTC_RATE, CONFIG_CONS_EXTC_PINSEL);
diff --git a/cpu/mpc8260/speed.c b/cpu/mpc8260/speed.c
index a761a178bc..360404f0cf 100644
--- a/cpu/mpc8260/speed.c
+++ b/cpu/mpc8260/speed.c
@@ -25,6 +25,8 @@
#include <mpc8260.h>
#include <asm/processor.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/* ------------------------------------------------------------------------- */
/* Bus-to-Core Multiplier */
@@ -101,8 +103,6 @@ corecnf_t corecnf_tab[] = {
int get_clocks (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
volatile immap_t *immap = (immap_t *) CFG_IMMR;
ulong clkin;
ulong sccr, dfbrg;
@@ -159,11 +159,9 @@ int get_clocks (void)
int prt_8260_clks (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
volatile immap_t *immap = (immap_t *) CFG_IMMR;
ulong sccr, dfbrg;
- ulong scmr, corecnf, busdf, cpmdf, plldf, pllmf;
+ ulong scmr, corecnf, busdf, cpmdf, plldf, pllmf, pcidf;
corecnf_t *cp;
sccr = immap->im_clkrst.car_sccr;
@@ -175,6 +173,7 @@ int prt_8260_clks (void)
cpmdf = (scmr & SCMR_CPMDF_MSK) >> SCMR_CPMDF_SHIFT;
plldf = (scmr & SCMR_PLLDF) ? 1 : 0;
pllmf = (scmr & SCMR_PLLMF_MSK) >> SCMR_PLLMF_SHIFT;
+ pcidf = (sccr & SCCR_PCIDF_MSK) >> SCCR_PCIDF_SHIFT;
cp = &corecnf_tab[corecnf];
@@ -204,8 +203,9 @@ int prt_8260_clks (void)
cp->vco_div, cp->freq_60x, cp->freq_core);
printf (" - dfbrg %ld, corecnf 0x%02lx, busdf %ld, cpmdf %ld, "
- "plldf %ld, pllmf %ld\n", dfbrg, corecnf, busdf, cpmdf, plldf,
- pllmf);
+ "plldf %ld, pllmf %ld, pcidf %ld\n",
+ dfbrg, corecnf, busdf, cpmdf,
+ plldf, pllmf, pcidf);
printf (" - vco_out %10ld, scc_clk %10ld, brg_clk %10ld\n",
gd->vco_out, gd->scc_clk, gd->brg_clk);
@@ -215,9 +215,20 @@ int prt_8260_clks (void)
if (sccr & SCCR_PCI_MODE) {
uint pci_div;
-
- pci_div = ( (sccr & SCCR_PCI_MODCK) ? 2 : 1) *
- ( ( (sccr & SCCR_PCIDF_MSK) >> SCCR_PCIDF_SHIFT) + 1);
+ uint pcidf = (sccr & SCCR_PCIDF_MSK) >> SCCR_PCIDF_SHIFT;
+
+ if (sccr & SCCR_PCI_MODCK) {
+ pci_div = 2;
+ if (pcidf == 9) {
+ pci_div *= 5;
+ } else if (pcidf == 0xB) {
+ pci_div *= 6;
+ } else {
+ pci_div *= (pcidf + 1);
+ }
+ } else {
+ pci_div = pcidf + 1;
+ }
printf (" - pci_clk %10ld\n", (gd->cpm_clk * 2) / pci_div);
}
@@ -225,5 +236,3 @@ int prt_8260_clks (void)
return (0);
}
-
-/* ------------------------------------------------------------------------- */
diff --git a/cpu/mpc83xx/cpu.c b/cpu/mpc83xx/cpu.c
index 8c9b515fa5..20bba6c66b 100644
--- a/cpu/mpc83xx/cpu.c
+++ b/cpu/mpc83xx/cpu.c
@@ -35,12 +35,14 @@
#include <watchdog.h>
#include <command.h>
#include <mpc83xx.h>
+#include <ft_build.h>
#include <asm/processor.h>
+DECLARE_GLOBAL_DATA_PTR;
+
int checkcpu(void)
{
- DECLARE_GLOBAL_DATA_PTR;
ulong clock = gd->cpu_clk;
u32 pvr = get_pvr();
char buf[32];
@@ -92,6 +94,8 @@ do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
/* enable Reset Control Reg */
immap->reset.rpr = 0x52535445;
+ __asm__ __volatile__ ("sync");
+ __asm__ __volatile__ ("isync");
/* confirm Reset Control Reg is enabled */
while(!((immap->reset.rcer) & RCER_CRE));
@@ -135,8 +139,6 @@ do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
unsigned long get_tbclk(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
ulong tbclk;
tbclk = (gd->bus_clk + 3L) / 4L;
@@ -151,3 +153,125 @@ void watchdog_reset (void)
hang(); /* FIXME: implement watchdog_reset()? */
}
#endif /* CONFIG_WATCHDOG */
+
+#if defined(CONFIG_OF_FLAT_TREE)
+void
+ft_cpu_setup(void *blob, bd_t *bd)
+{
+ u32 *p;
+ int len;
+ ulong clock;
+
+ clock = bd->bi_busfreq;
+ p = ft_get_prop(blob, "/cpus/" OF_CPU "/bus-frequency", &len);
+ if (p != NULL)
+ *p = cpu_to_be32(clock);
+
+ p = ft_get_prop(blob, "/" OF_SOC "/bus-frequency", &len);
+ if (p != NULL)
+ *p = cpu_to_be32(clock);
+
+ p = ft_get_prop(blob, "/" OF_SOC "/serial@4500/clock-frequency", &len);
+ if (p != NULL)
+ *p = cpu_to_be32(clock);
+
+ p = ft_get_prop(blob, "/" OF_SOC "/serial@4600/clock-frequency", &len);
+ if (p != NULL)
+ *p = cpu_to_be32(clock);
+
+#ifdef CONFIG_MPC83XX_TSEC1
+ p = ft_get_prop(blob, "/" OF_SOC "/ethernet@24000/address", &len);
+ memcpy(p, bd->bi_enetaddr, 6);
+#endif
+
+#ifdef CONFIG_MPC83XX_TSEC2
+ p = ft_get_prop(blob, "/" OF_SOC "/ethernet@25000/address", &len);
+ memcpy(p, bd->bi_enet1addr, 6);
+#endif
+}
+#endif
+
+#if defined(CONFIG_DDR_ECC)
+void dma_init(void)
+{
+ volatile immap_t *immap = (immap_t *)CFG_IMMRBAR;
+ volatile dma8349_t *dma = &immap->dma;
+ volatile u32 status = swab32(dma->dmasr0);
+ volatile u32 dmamr0 = swab32(dma->dmamr0);
+
+ debug("DMA-init\n");
+
+ /* initialize DMASARn, DMADAR and DMAABCRn */
+ dma->dmadar0 = (u32)0;
+ dma->dmasar0 = (u32)0;
+ dma->dmabcr0 = 0;
+
+ __asm__ __volatile__ ("sync");
+ __asm__ __volatile__ ("isync");
+
+ /* clear CS bit */
+ dmamr0 &= ~DMA_CHANNEL_START;
+ dma->dmamr0 = swab32(dmamr0);
+ __asm__ __volatile__ ("sync");
+ __asm__ __volatile__ ("isync");
+
+ /* while the channel is busy, spin */
+ while(status & DMA_CHANNEL_BUSY) {
+ status = swab32(dma->dmasr0);
+ }
+
+ debug("DMA-init end\n");
+}
+
+uint dma_check(void)
+{
+ volatile immap_t *immap = (immap_t *)CFG_IMMRBAR;
+ volatile dma8349_t *dma = &immap->dma;
+ volatile u32 status = swab32(dma->dmasr0);
+ volatile u32 byte_count = swab32(dma->dmabcr0);
+
+ /* while the channel is busy, spin */
+ while (status & DMA_CHANNEL_BUSY) {
+ status = swab32(dma->dmasr0);
+ }
+
+ if (status & DMA_CHANNEL_TRANSFER_ERROR) {
+ printf ("DMA Error: status = %x @ %d\n", status, byte_count);
+ }
+
+ return status;
+}
+
+int dma_xfer(void *dest, u32 count, void *src)
+{
+ volatile immap_t *immap = (immap_t *)CFG_IMMRBAR;
+ volatile dma8349_t *dma = &immap->dma;
+ volatile u32 dmamr0;
+
+ /* initialize DMASARn, DMADAR and DMAABCRn */
+ dma->dmadar0 = swab32((u32)dest);
+ dma->dmasar0 = swab32((u32)src);
+ dma->dmabcr0 = swab32(count);
+
+ __asm__ __volatile__ ("sync");
+ __asm__ __volatile__ ("isync");
+
+ /* init direct transfer, clear CS bit */
+ dmamr0 = (DMA_CHANNEL_TRANSFER_MODE_DIRECT |
+ DMA_CHANNEL_SOURCE_ADDRESS_HOLD_8B |
+ DMA_CHANNEL_SOURCE_ADRESSS_HOLD_EN);
+
+ dma->dmamr0 = swab32(dmamr0);
+
+ __asm__ __volatile__ ("sync");
+ __asm__ __volatile__ ("isync");
+
+ /* set CS to start DMA transfer */
+ dmamr0 |= DMA_CHANNEL_START;
+ dma->dmamr0 = swab32(dmamr0);
+ __asm__ __volatile__ ("sync");
+ __asm__ __volatile__ ("isync");
+
+ return ((int)dma_check());
+}
+#endif /*CONFIG_DDR_ECC*/
diff --git a/cpu/mpc83xx/cpu_init.c b/cpu/mpc83xx/cpu_init.c
index dcb34457b1..6ed0992c07 100644
--- a/cpu/mpc83xx/cpu_init.c
+++ b/cpu/mpc83xx/cpu_init.c
@@ -29,6 +29,8 @@
#include <mpc83xx.h>
#include <ioports.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/*
* Breathe some life into the CPU...
*
@@ -38,8 +40,6 @@
*/
void cpu_init_f (volatile immap_t * im)
{
- DECLARE_GLOBAL_DATA_PTR;
-
/* Pointer is writable since we allocated a register for it */
gd = (gd_t *) (CFG_INIT_RAM_ADDR + CFG_GBL_DATA_OFFSET);
@@ -63,8 +63,12 @@ void cpu_init_f (volatile immap_t * im)
im->sysconf.spcr |= SPCR_TBEN;
/* System General Purpose Register */
- im->sysconf.sicrh = SICRH_TSOBI1;
- im->sysconf.sicrl = SICRL_LDP_A;
+#ifdef CFG_SICRH
+ im->sysconf.sicrh = CFG_SICRH;
+#endif
+#ifdef CFG_SICRL
+ im->sysconf.sicrl = CFG_SICRL;
+#endif
/*
* Memory Controller:
@@ -87,69 +91,70 @@ void cpu_init_f (volatile immap_t * im)
#error CFG_BR0_PRELIM, CFG_OR0_PRELIM, CFG_LBLAWBAR0_PRELIM & CFG_LBLAWAR0_PRELIM must be defined
#endif
-#if defined(CFG_BR1_PRELIM) \
- && defined(CFG_OR1_PRELIM) \
- && defined(CFG_LBLAWBAR1_PRELIM) \
- && defined(CFG_LBLAWAR1_PRELIM)
+#if defined(CFG_BR1_PRELIM) && defined(CFG_OR1_PRELIM)
im->lbus.bank[1].br = CFG_BR1_PRELIM;
im->lbus.bank[1].or = CFG_OR1_PRELIM;
+#endif
+#if defined(CFG_LBLAWBAR1_PRELIM) && defined(CFG_LBLAWAR1_PRELIM)
im->sysconf.lblaw[1].bar = CFG_LBLAWBAR1_PRELIM;
im->sysconf.lblaw[1].ar = CFG_LBLAWAR1_PRELIM;
#endif
-#if defined(CFG_BR2_PRELIM) \
- && defined(CFG_OR2_PRELIM) \
- && defined(CFG_LBLAWBAR2_PRELIM) \
- && defined(CFG_LBLAWAR2_PRELIM)
+#if defined(CFG_BR2_PRELIM) && defined(CFG_OR2_PRELIM)
im->lbus.bank[2].br = CFG_BR2_PRELIM;
im->lbus.bank[2].or = CFG_OR2_PRELIM;
+#endif
+#if defined(CFG_LBLAWBAR2_PRELIM) && defined(CFG_LBLAWAR2_PRELIM)
im->sysconf.lblaw[2].bar = CFG_LBLAWBAR2_PRELIM;
im->sysconf.lblaw[2].ar = CFG_LBLAWAR2_PRELIM;
#endif
-#if defined(CFG_BR3_PRELIM) \
- && defined(CFG_OR3_PRELIM) \
- && defined(CFG_LBLAWBAR3_PRELIM) \
- && defined(CFG_LBLAWAR3_PRELIM)
+#if defined(CFG_BR3_PRELIM) && defined(CFG_OR3_PRELIM)
im->lbus.bank[3].br = CFG_BR3_PRELIM;
im->lbus.bank[3].or = CFG_OR3_PRELIM;
+#endif
+#if defined(CFG_LBLAWBAR3_PRELIM) && defined(CFG_LBLAWAR3_PRELIM)
im->sysconf.lblaw[3].bar = CFG_LBLAWBAR3_PRELIM;
im->sysconf.lblaw[3].ar = CFG_LBLAWAR3_PRELIM;
#endif
-#if defined(CFG_BR4_PRELIM) \
- && defined(CFG_OR4_PRELIM) \
- && defined(CFG_LBLAWBAR4_PRELIM) \
- && defined(CFG_LBLAWAR4_PRELIM)
+#if defined(CFG_BR4_PRELIM) && defined(CFG_OR4_PRELIM)
im->lbus.bank[4].br = CFG_BR4_PRELIM;
im->lbus.bank[4].or = CFG_OR4_PRELIM;
+#endif
+#if defined(CFG_LBLAWBAR4_PRELIM) && defined(CFG_LBLAWAR4_PRELIM)
im->sysconf.lblaw[4].bar = CFG_LBLAWBAR4_PRELIM;
im->sysconf.lblaw[4].ar = CFG_LBLAWAR4_PRELIM;
#endif
-#if defined(CFG_BR5_PRELIM) \
- && defined(CFG_OR5_PRELIM) \
- && defined(CFG_LBLAWBAR5_PRELIM) \
- && defined(CFG_LBLAWAR5_PRELIM)
+#if defined(CFG_BR5_PRELIM) && defined(CFG_OR5_PRELIM)
im->lbus.bank[5].br = CFG_BR5_PRELIM;
im->lbus.bank[5].or = CFG_OR5_PRELIM;
+#endif
+#if defined(CFG_LBLAWBAR5_PRELIM) && defined(CFG_LBLAWAR5_PRELIM)
im->sysconf.lblaw[5].bar = CFG_LBLAWBAR5_PRELIM;
im->sysconf.lblaw[5].ar = CFG_LBLAWAR5_PRELIM;
#endif
-#if defined(CFG_BR6_PRELIM) \
- && defined(CFG_OR6_PRELIM) \
- && defined(CFG_LBLAWBAR6_PRELIM) \
- && defined(CFG_LBLAWAR6_PRELIM)
+#if defined(CFG_BR6_PRELIM) && defined(CFG_OR6_PRELIM)
im->lbus.bank[6].br = CFG_BR6_PRELIM;
im->lbus.bank[6].or = CFG_OR6_PRELIM;
+#endif
+#if defined(CFG_LBLAWBAR6_PRELIM) && defined(CFG_LBLAWAR6_PRELIM)
im->sysconf.lblaw[6].bar = CFG_LBLAWBAR6_PRELIM;
im->sysconf.lblaw[6].ar = CFG_LBLAWAR6_PRELIM;
#endif
-#if defined(CFG_BR7_PRELIM) \
- && defined(CFG_OR7_PRELIM) \
- && defined(CFG_LBLAWBAR7_PRELIM) \
- && defined(CFG_LBLAWAR7_PRELIM)
+#if defined(CFG_BR7_PRELIM) && defined(CFG_OR7_PRELIM)
im->lbus.bank[7].br = CFG_BR7_PRELIM;
im->lbus.bank[7].or = CFG_OR7_PRELIM;
+#endif
+#if defined(CFG_LBLAWBAR7_PRELIM) && defined(CFG_LBLAWAR7_PRELIM)
im->sysconf.lblaw[7].bar = CFG_LBLAWBAR7_PRELIM;
im->sysconf.lblaw[7].ar = CFG_LBLAWAR7_PRELIM;
#endif
+#ifdef CFG_GPIO1_PRELIM
+ im->pgio[0].dir = CFG_GPIO1_DIR;
+ im->pgio[0].dat = CFG_GPIO1_DAT;
+#endif
+#ifdef CFG_GPIO2_PRELIM
+ im->pgio[1].dir = CFG_GPIO2_DIR;
+ im->pgio[1].dat = CFG_GPIO2_DAT;
+#endif
}
diff --git a/cpu/mpc83xx/i2c.c b/cpu/mpc83xx/i2c.c
index 4e70f808a4..70450f9e49 100644
--- a/cpu/mpc83xx/i2c.c
+++ b/cpu/mpc83xx/i2c.c
@@ -41,7 +41,7 @@
#include <i2c.h>
#include <asm/i2c.h>
-#if defined(CONFIG_MPC8349ADS) || defined(CONFIG_TQM834X)
+#if defined(CONFIG_MPC8349EMDS) || defined(CONFIG_TQM834X)
i2c_t * mpc8349_i2c = (i2c_t*)(CFG_IMMRBAR + CFG_I2C_OFFSET);
#endif
diff --git a/cpu/mpc83xx/interrupts.c b/cpu/mpc83xx/interrupts.c
index 53474f60c9..5a0babfcbb 100644
--- a/cpu/mpc83xx/interrupts.c
+++ b/cpu/mpc83xx/interrupts.c
@@ -35,6 +35,8 @@
#include <mpc83xx.h>
#include <asm/processor.h>
+DECLARE_GLOBAL_DATA_PTR;
+
struct irq_action {
interrupt_handler_t *handler;
void *arg;
@@ -43,6 +45,14 @@ struct irq_action {
int interrupt_init_cpu (unsigned *decrementer_count)
{
+ volatile immap_t *immr = (immap_t *) CFG_IMMRBAR;
+
+ *decrementer_count = (gd->bus_clk / 4) / CFG_HZ;
+
+ /* Enable e300 time base */
+
+ immr->sysconf.spcr |= 0x00400000;
+
return 0;
}
diff --git a/cpu/mpc83xx/spd_sdram.c b/cpu/mpc83xx/spd_sdram.c
index 63dcd664be..48624feca6 100644
--- a/cpu/mpc83xx/spd_sdram.c
+++ b/cpu/mpc83xx/spd_sdram.c
@@ -1,4 +1,7 @@
/*
+ * (C) Copyright 2006
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
* Copyright 2004 Freescale Semiconductor.
* (C) Copyright 2003 Motorola Inc.
* Xianghua Xiao (X.Xiao@motorola.com)
@@ -63,13 +66,42 @@ picos_to_clk(int picos)
return clks;
}
-unsigned int
-banksize(unsigned char row_dens)
+unsigned int banksize(unsigned char row_dens)
{
return ((row_dens >> 2) | ((row_dens & 3) << 6)) << 24;
}
-long int spd_sdram(int(read_spd)(uint addr))
+int read_spd(uint addr)
+{
+ return ((int) addr);
+}
+
+#undef SPD_DEBUG
+#ifdef SPD_DEBUG
+static void spd_debug(spd_eeprom_t *spd)
+{
+ printf ("\nDIMM type: %-18.18s\n", spd->mpart);
+ printf ("SPD size: %d\n", spd->info_size);
+ printf ("EEPROM size: %d\n", 1 << spd->chip_size);
+ printf ("Memory type: %d\n", spd->mem_type);
+ printf ("Row addr: %d\n", spd->nrow_addr);
+ printf ("Column addr: %d\n", spd->ncol_addr);
+ printf ("# of rows: %d\n", spd->nrows);
+ printf ("Row density: %d\n", spd->row_dens);
+ printf ("# of banks: %d\n", spd->nbanks);
+ printf ("Data width: %d\n",
+ 256 * spd->dataw_msb + spd->dataw_lsb);
+ printf ("Chip width: %d\n", spd->primw);
+ printf ("Refresh rate: %02X\n", spd->refresh);
+ printf ("CAS latencies: %02X\n", spd->cas_lat);
+ printf ("Write latencies: %02X\n", spd->write_lat);
+ printf ("tRP: %d\n", spd->trp);
+ printf ("tRCD: %d\n", spd->trcd);
+ printf ("\n");
+}
+#endif /* SPD_DEBUG */
+
+long int spd_sdram()
{
volatile immap_t *immap = (immap_t *)CFG_IMMRBAR;
volatile ddr8349_t *ddr = &immap->ddr;
@@ -81,10 +113,10 @@ long int spd_sdram(int(read_spd)(uint addr))
unsigned char caslat;
unsigned int trfc, trfc_clk, trfc_low;
-#warning Current spd_sdram does not fit its usage... adjust implementation or API...
-
CFG_READ_SPD(SPD_EEPROM_ADDRESS, 0, 1, (uchar *) & spd, sizeof (spd));
-
+#ifdef SPD_DEBUG
+ spd_debug(&spd);
+#endif
if (spd.nrows > 2) {
puts("DDR:Only two chip selects are supported on ADS.\n");
return 0;
@@ -219,25 +251,31 @@ long int spd_sdram(int(read_spd)(uint addr))
* Only DDR I is supported
* DDR I and II have different mode-register-set definition
*/
-
- /* burst length is always 4 */
switch(caslat) {
case 2:
- ddr->sdram_mode = 0x52; /* 1.5 */
+ tmp = 0x50; /* 1.5 */
break;
case 3:
- ddr->sdram_mode = 0x22; /* 2.0 */
+ tmp = 0x20; /* 2.0 */
break;
case 4:
- ddr->sdram_mode = 0x62; /* 2.5 */
+ tmp = 0x60; /* 2.5 */
break;
case 5:
- ddr->sdram_mode = 0x32; /* 3.0 */
+ tmp = 0x30; /* 3.0 */
break;
default:
puts("DDR:only CAS Latency 1.5, 2.0, 2.5, 3.0 is supported.\n");
return 0;
}
+#if defined (CONFIG_DDR_32BIT)
+ /* set burst length to 8 for 32-bit data path */
+ tmp |= 0x03;
+#else
+ /* set burst length to 4 - default for 64-bit data path */
+ tmp |= 0x02;
+#endif
+ ddr->sdram_mode = tmp;
debug("DDR:sdram_mode=0x%08x\n", ddr->sdram_mode);
switch(spd.refresh) {
@@ -282,8 +320,13 @@ long int spd_sdram(int(read_spd)(uint addr))
*/
#if defined(CONFIG_DDR_ECC)
if (spd.config == 0x02) {
- ddr->err_disable = 0x0000000d;
- ddr->err_sbe = 0x00ff0000;
+ /* disable error detection */
+ ddr->err_disable = ~ECC_ERROR_ENABLE;
+
+ /* set single bit error threshold to maximum value,
+ * reset counter to zero */
+ ddr->err_sbe = (255 << ECC_ERROR_MAN_SBET_SHIFT) |
+ (0 << ECC_ERROR_MAN_SBEC_SHIFT);
}
debug("DDR:err_disable=0x%08x\n", ddr->err_disable);
debug("DDR:err_sbe=0x%08x\n", ddr->err_sbe);
@@ -297,7 +340,8 @@ long int spd_sdram(int(read_spd)(uint addr))
* CLK_ADJST = 2-MCK/MCK_B, is lauched 1/2 of one SDRAM
* clock cycle after address/command
*/
- ddr->sdram_clk_cntl = 0x82000000;
+ /*ddr->sdram_clk_cntl = 0x82000000;*/
+ ddr->sdram_clk_cntl = (DDR_SDRAM_CLK_CNTL_SS_EN|DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05);
/*
* Figure out the settings for the sdram_cfg register. Build up
@@ -311,6 +355,10 @@ long int spd_sdram(int(read_spd)(uint addr))
*/
tmp = 0xc2000000;
+#if defined (CONFIG_DDR_32BIT)
+ /* in 32-Bit mode burst len is 8 beats */
+ tmp |= (SDRAM_CFG_32_BE | SDRAM_CFG_8_BE);
+#endif
/*
* sdram_cfg[3] = RD_EN - registered DIMM enable
* A value of 0x26 indicates micron registered DIMMS (micron.com)
@@ -324,7 +372,7 @@ long int spd_sdram(int(read_spd)(uint addr))
* If the user wanted ECC (enabled via sdram_cfg[2])
*/
if (spd.config == 0x02) {
- tmp |= 0x20000000;
+ tmp |= SDRAM_CFG_ECC_EN;
}
#endif
@@ -340,37 +388,94 @@ long int spd_sdram(int(read_spd)(uint addr))
udelay(500);
debug("DDR:sdram_cfg=0x%08x\n", ddr->sdram_cfg);
-
- return memsize;/*in MBytes*/
+ return memsize; /*in MBytes*/
}
#endif /* CONFIG_SPD_EEPROM */
#if defined(CONFIG_DDR_ECC)
/*
- * Initialize all of memory for ECC, then enable errors.
+ * Use timebase counter, get_timer() is not availabe
+ * at this point of initialization yet.
*/
+static __inline__ unsigned long get_tbms (void)
+{
+ unsigned long tbl;
+ unsigned long tbu1, tbu2;
+ unsigned long ms;
+ unsigned long long tmp;
+
+ ulong tbclk = get_tbclk();
+
+ /* get the timebase ticks */
+ do {
+ asm volatile ("mftbu %0":"=r" (tbu1):);
+ asm volatile ("mftb %0":"=r" (tbl):);
+ asm volatile ("mftbu %0":"=r" (tbu2):);
+ } while (tbu1 != tbu2);
+
+ /* convert ticks to ms */
+ tmp = (unsigned long long)(tbu1);
+ tmp = (tmp << 32);
+ tmp += (unsigned long long)(tbl);
+ ms = tmp/(tbclk/1000);
+
+ return ms;
+}
-void
-ddr_enable_ecc(unsigned int dram_size)
+/*
+ * Initialize all of memory for ECC, then enable errors.
+ */
+/* #define CONFIG_DDR_ECC_INIT_VIA_DMA */
+void ddr_enable_ecc(unsigned int dram_size)
{
-#ifndef FIXME
- uint *p = 0;
- uint i = 0;
+ uint *p;
volatile immap_t *immap = (immap_t *)CFG_IMMRBAR;
- volatile ccsr_ddr_t *ddr= &immap->im_ddr;
+ volatile ddr8349_t *ddr = &immap->ddr;
+ unsigned long t_start, t_end;
+#if defined(CONFIG_DDR_ECC_INIT_VIA_DMA)
+ uint i;
+#endif
+
+ debug("Initialize a Cachline in DRAM\n");
+ icache_enable();
+#if defined(CONFIG_DDR_ECC_INIT_VIA_DMA)
+ /* Initialise DMA for direct Transfers */
dma_init();
+#endif
+
+ t_start = get_tbms();
- for (*p = 0; p < (uint *)(8 * 1024); p++) {
+#if !defined(CONFIG_DDR_ECC_INIT_VIA_DMA)
+ debug("DDR init: Cache flush method\n");
+ for (p = 0; p < (uint *)(dram_size); p++) {
if (((unsigned int)p & 0x1f) == 0) {
ppcDcbz((unsigned long) p);
}
+
+ /* write pattern to cache and flush */
*p = (unsigned int)0xdeadbeef;
+
if (((unsigned int)p & 0x1c) == 0x1c) {
ppcDcbf((unsigned long) p);
}
}
+#else
+ printf("DDR init: DMA method\n");
+ for (p = 0; p < (uint *)(8 * 1024); p++) {
+ /* zero one data cache line */
+ if (((unsigned int)p & 0x1f) == 0) {
+ ppcDcbz((unsigned long)p);
+ }
+
+ /* write pattern to it and flush */
+ *p = (unsigned int)0xdeadbeef;
+
+ if (((unsigned int)p & 0x1c) == 0x1c) {
+ ppcDcbf((unsigned long)p);
+ }
+ }
/* 8K */
dma_xfer((uint *)0x2000, 0x2000, (uint *)0);
@@ -396,13 +501,31 @@ ddr_enable_ecc(unsigned int dram_size)
for (i = 1; i < dram_size / 0x800000; i++) {
dma_xfer((uint *)(0x800000*i), 0x800000, (uint *)0);
}
-
- /*
- * Enable errors for ECC.
- */
- ddr->err_disable = 0x00000000;
- asm("sync;isync");
#endif
-}
+ t_end = get_tbms();
+ icache_disable();
+
+ debug("\nREADY!!\n");
+ debug("ddr init duration: %ld ms\n", t_end - t_start);
+
+ /* Clear All ECC Errors */
+ if ((ddr->err_detect & ECC_ERROR_DETECT_MME) == ECC_ERROR_DETECT_MME)
+ ddr->err_detect |= ECC_ERROR_DETECT_MME;
+ if ((ddr->err_detect & ECC_ERROR_DETECT_MBE) == ECC_ERROR_DETECT_MBE)
+ ddr->err_detect |= ECC_ERROR_DETECT_MBE;
+ if ((ddr->err_detect & ECC_ERROR_DETECT_SBE) == ECC_ERROR_DETECT_SBE)
+ ddr->err_detect |= ECC_ERROR_DETECT_SBE;
+ if ((ddr->err_detect & ECC_ERROR_DETECT_MSE) == ECC_ERROR_DETECT_MSE)
+ ddr->err_detect |= ECC_ERROR_DETECT_MSE;
+
+ /* Disable ECC-Interrupts */
+ ddr->err_int_en &= ECC_ERR_INT_DISABLE;
+
+ /* Enable errors for ECC */
+ ddr->err_disable &= ECC_ERROR_ENABLE;
+
+ __asm__ __volatile__ ("sync");
+ __asm__ __volatile__ ("isync");
+}
#endif /* CONFIG_DDR_ECC */
diff --git a/cpu/mpc83xx/speed.c b/cpu/mpc83xx/speed.c
index 1368fc3fea..ad6b3f669f 100644
--- a/cpu/mpc83xx/speed.c
+++ b/cpu/mpc83xx/speed.c
@@ -32,6 +32,8 @@
#include <mpc83xx.h>
#include <asm/processor.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/* ----------------------------------------------------------------- */
typedef enum {
@@ -92,7 +94,6 @@ corecnf_t corecnf_tab[] = {
*/
int get_clocks (void)
{
- DECLARE_GLOBAL_DATA_PTR;
volatile immap_t *im = (immap_t *)CFG_IMMRBAR;
u32 pci_sync_in;
u8 spmf;
@@ -342,14 +343,11 @@ int get_clocks (void)
*********************************************/
ulong get_bus_freq (ulong dummy)
{
- DECLARE_GLOBAL_DATA_PTR;
return gd->csb_clk;
}
int print_clock_conf (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
printf("Clock configuration:\n");
printf(" Coherent System Bus: %4d MHz\n",gd->csb_clk/1000000);
printf(" Core: %4d MHz\n",gd->core_clk/1000000);
diff --git a/cpu/mpc83xx/start.S b/cpu/mpc83xx/start.S
index fb001a654c..6e02cce799 100644
--- a/cpu/mpc83xx/start.S
+++ b/cpu/mpc83xx/start.S
@@ -179,10 +179,47 @@ in_flash:
#endif
#endif /* CFG_RAMBOOT */
- bl setup_stack_in_data_cache_on_r1
+ /* setup the bats */
+ bl setup_bats
+ sync
+
+ /*
+ * Cache must be enabled here for stack-in-cache trick.
+ * This means we need to enable the BATS.
+ * This means:
+ * 1) for the EVB, original gt regs need to be mapped
+ * 2) need to have an IBAT for the 0xf region,
+ * we are running there!
+ * Cache should be turned on after BATs, since by default
+ * everything is write-through.
+ * The init-mem BAT can be reused after reloc. The old
+ * gt-regs BAT can be reused after board_init_f calls
+ * board_early_init_f (EVB only).
+ */
+ /* enable address translation */
+ bl enable_addr_trans
+ sync
+
+ /* enable and invalidate the data cache */
+ bl dcache_enable
+ sync
+#ifdef CFG_INIT_RAM_LOCK
+ bl lock_ram_in_cache
+ sync
+#endif
+
+ /* set up the stack pointer in our newly created
+ * cache-ram (r1) */
+ lis r1, (CFG_INIT_RAM_ADDR + CFG_GBL_DATA_OFFSET)@h
+ ori r1, r1, (CFG_INIT_RAM_ADDR + CFG_GBL_DATA_OFFSET)@l
+
+ li r0, 0 /* Make room for stack frame header and */
+ stwu r0, -4(r1) /* clear final stack frame so that */
+ stwu r0, -4(r1) /* stack backtraces terminate cleanly */
+
/* let the C-code set up the rest */
- /* */
+ /* */
/* Be careful to keep code relocatable & stack humble */
/*------------------------------------------------------*/
@@ -426,8 +463,14 @@ init_e300_core: /* time t 10 */
#else
/* Disable Wathcdog */
/*-------------------*/
+ lwz r4, SWCRR(r3)
+ /* Check to see if its enabled for disabling
+ once disabled by SW you can't re-enable */
+ andi. r4, r4, 0x4
+ beq 1f
xor r4, r4, r4
stw r4, SWCRR(r3)
+1:
#endif /* CONFIG_WATCHDOG */
/* Initialize the Hardware Implementation-dependent Registers */
@@ -503,6 +546,221 @@ init_e300_core: /* time t 10 */
/*------------------------------*/
blr
+ .globl invalidate_bats
+invalidate_bats:
+ /* invalidate BATs */
+ mtspr IBAT0U, r0
+ mtspr IBAT1U, r0
+ mtspr IBAT2U, r0
+ mtspr IBAT3U, r0
+#if (CFG_HID2 & HID2_HBE)
+ mtspr IBAT4U, r0
+ mtspr IBAT5U, r0
+ mtspr IBAT6U, r0
+ mtspr IBAT7U, r0
+#endif
+ isync
+ mtspr DBAT0U, r0
+ mtspr DBAT1U, r0
+ mtspr DBAT2U, r0
+ mtspr DBAT3U, r0
+#if (CFG_HID2 & HID2_HBE)
+ mtspr DBAT4U, r0
+ mtspr DBAT5U, r0
+ mtspr DBAT6U, r0
+ mtspr DBAT7U, r0
+#endif
+ isync
+ sync
+ blr
+
+ /* setup_bats - set them up to some initial state */
+ .globl setup_bats
+setup_bats:
+ addis r0, r0, 0x0000
+
+ /* IBAT 0 */
+ addis r4, r0, CFG_IBAT0L@h
+ ori r4, r4, CFG_IBAT0L@l
+ addis r3, r0, CFG_IBAT0U@h
+ ori r3, r3, CFG_IBAT0U@l
+ mtspr IBAT0L, r4
+ mtspr IBAT0U, r3
+ isync
+
+ /* DBAT 0 */
+ addis r4, r0, CFG_DBAT0L@h
+ ori r4, r4, CFG_DBAT0L@l
+ addis r3, r0, CFG_DBAT0U@h
+ ori r3, r3, CFG_DBAT0U@l
+ mtspr DBAT0L, r4
+ mtspr DBAT0U, r3
+ isync
+
+ /* IBAT 1 */
+ addis r4, r0, CFG_IBAT1L@h
+ ori r4, r4, CFG_IBAT1L@l
+ addis r3, r0, CFG_IBAT1U@h
+ ori r3, r3, CFG_IBAT1U@l
+ mtspr IBAT1L, r4
+ mtspr IBAT1U, r3
+ isync
+
+ /* DBAT 1 */
+ addis r4, r0, CFG_DBAT1L@h
+ ori r4, r4, CFG_DBAT1L@l
+ addis r3, r0, CFG_DBAT1U@h
+ ori r3, r3, CFG_DBAT1U@l
+ mtspr DBAT1L, r4
+ mtspr DBAT1U, r3
+ isync
+
+ /* IBAT 2 */
+ addis r4, r0, CFG_IBAT2L@h
+ ori r4, r4, CFG_IBAT2L@l
+ addis r3, r0, CFG_IBAT2U@h
+ ori r3, r3, CFG_IBAT2U@l
+ mtspr IBAT2L, r4
+ mtspr IBAT2U, r3
+ isync
+
+ /* DBAT 2 */
+ addis r4, r0, CFG_DBAT2L@h
+ ori r4, r4, CFG_DBAT2L@l
+ addis r3, r0, CFG_DBAT2U@h
+ ori r3, r3, CFG_DBAT2U@l
+ mtspr DBAT2L, r4
+ mtspr DBAT2U, r3
+ isync
+
+ /* IBAT 3 */
+ addis r4, r0, CFG_IBAT3L@h
+ ori r4, r4, CFG_IBAT3L@l
+ addis r3, r0, CFG_IBAT3U@h
+ ori r3, r3, CFG_IBAT3U@l
+ mtspr IBAT3L, r4
+ mtspr IBAT3U, r3
+ isync
+
+ /* DBAT 3 */
+ addis r4, r0, CFG_DBAT3L@h
+ ori r4, r4, CFG_DBAT3L@l
+ addis r3, r0, CFG_DBAT3U@h
+ ori r3, r3, CFG_DBAT3U@l
+ mtspr DBAT3L, r4
+ mtspr DBAT3U, r3
+ isync
+
+#if (CFG_HID2 & HID2_HBE)
+ /* IBAT 4 */
+ addis r4, r0, CFG_IBAT4L@h
+ ori r4, r4, CFG_IBAT4L@l
+ addis r3, r0, CFG_IBAT4U@h
+ ori r3, r3, CFG_IBAT4U@l
+ mtspr IBAT4L, r4
+ mtspr IBAT4U, r3
+ isync
+
+ /* DBAT 4 */
+ addis r4, r0, CFG_DBAT4L@h
+ ori r4, r4, CFG_DBAT4L@l
+ addis r3, r0, CFG_DBAT4U@h
+ ori r3, r3, CFG_DBAT4U@l
+ mtspr DBAT4L, r4
+ mtspr DBAT4U, r3
+ isync
+
+ /* IBAT 5 */
+ addis r4, r0, CFG_IBAT5L@h
+ ori r4, r4, CFG_IBAT5L@l
+ addis r3, r0, CFG_IBAT5U@h
+ ori r3, r3, CFG_IBAT5U@l
+ mtspr IBAT5L, r4
+ mtspr IBAT5U, r3
+ isync
+
+ /* DBAT 5 */
+ addis r4, r0, CFG_DBAT5L@h
+ ori r4, r4, CFG_DBAT5L@l
+ addis r3, r0, CFG_DBAT5U@h
+ ori r3, r3, CFG_DBAT5U@l
+ mtspr DBAT5L, r4
+ mtspr DBAT5U, r3
+ isync
+
+ /* IBAT 6 */
+ addis r4, r0, CFG_IBAT6L@h
+ ori r4, r4, CFG_IBAT6L@l
+ addis r3, r0, CFG_IBAT6U@h
+ ori r3, r3, CFG_IBAT6U@l
+ mtspr IBAT6L, r4
+ mtspr IBAT6U, r3
+ isync
+
+ /* DBAT 6 */
+ addis r4, r0, CFG_DBAT6L@h
+ ori r4, r4, CFG_DBAT6L@l
+ addis r3, r0, CFG_DBAT6U@h
+ ori r3, r3, CFG_DBAT6U@l
+ mtspr DBAT6L, r4
+ mtspr DBAT6U, r3
+ isync
+
+ /* IBAT 7 */
+ addis r4, r0, CFG_IBAT7L@h
+ ori r4, r4, CFG_IBAT7L@l
+ addis r3, r0, CFG_IBAT7U@h
+ ori r3, r3, CFG_IBAT7U@l
+ mtspr IBAT7L, r4
+ mtspr IBAT7U, r3
+ isync
+
+ /* DBAT 7 */
+ addis r4, r0, CFG_DBAT7L@h
+ ori r4, r4, CFG_DBAT7L@l
+ addis r3, r0, CFG_DBAT7U@h
+ ori r3, r3, CFG_DBAT7U@l
+ mtspr DBAT7L, r4
+ mtspr DBAT7U, r3
+ isync
+#endif
+
+ /* Invalidate TLBs.
+ * -> for (val = 0; val < 0x20000; val+=0x1000)
+ * -> tlbie(val);
+ */
+ lis r3, 0
+ lis r5, 2
+
+1:
+ tlbie r3
+ addi r3, r3, 0x1000
+ cmp 0, 0, r3, r5
+ blt 1b
+
+ blr
+
+ .globl enable_addr_trans
+enable_addr_trans:
+ /* enable address translation */
+ mfmsr r5
+ ori r5, r5, (MSR_IR | MSR_DR)
+ mtmsr r5
+ isync
+ blr
+
+ .globl disable_addr_trans
+disable_addr_trans:
+ /* disable address translation */
+ mflr r4
+ mfmsr r3
+ andi. r0, r3, (MSR_IR | MSR_DR)
+ beqlr
+ andc r3, r3, r0
+ mtspr SRR0, r4
+ mtspr SRR1, r3
+ rfi
+
/* Cache functions.
*
* Note: requires that all cache bits in
@@ -538,32 +796,31 @@ icache_disable:
.globl icache_status
icache_status:
mfspr r3, HID0
- rlwinm r3, r3, HID0_ICE_SHIFT, 31, 31
+ rlwinm r3, r3, (31 - HID0_ICE_SHIFT + 1), 31, 31
blr
.globl dcache_enable
dcache_enable:
mfspr r3, HID0
- ori r3, r3, HID0_ENABLE_DATA_CACHE
- lis r4, 0
- ori r4, r4, HID0_LOCK_DATA_CACHE
- andc r3, r3, r4
- ori r4, r3, HID0_LOCK_INSTRUCTION_CACHE
- sync
- mtspr HID0, r4 /* sets enable and invalidate, clears lock */
+ li r5, HID0_DCFI|HID0_DLOCK
+ andc r3, r3, r5
+ mtspr HID0, r3 /* no invalidate, unlock */
+ ori r3, r3, HID0_DCE
+ ori r5, r3, HID0_DCFI
+ mtspr HID0, r5 /* enable + invalidate */
+ mtspr HID0, r3 /* enable */
sync
- mtspr HID0, r3 /* clears invalidate */
blr
.globl dcache_disable
dcache_disable:
mfspr r3, HID0
lis r4, 0
- ori r4, r4, HID0_ENABLE_DATA_CACHE|HID0_LOCK_DATA_CACHE
+ ori r4, r4, HID0_DCE|HID0_DLOCK
andc r3, r3, r4
- ori r4, r3, HID0_INVALIDATE_DATA_CACHE
+ ori r4, r3, HID0_DCI
sync
- mtspr HID0, r4 /* sets invalidate, clears enable and lock */
+ mtspr HID0, r4 /* sets invalidate, clears enable and lock */
sync
mtspr HID0, r3 /* clears invalidate */
blr
@@ -571,7 +828,7 @@ dcache_disable:
.globl dcache_status
dcache_status:
mfspr r3, HID0
- rlwinm r3, r3, HID0_DCE_SHIFT, 31, 31
+ rlwinm r3, r3, (31 - HID0_DCE_SHIFT + 1), 31, 31
blr
.globl get_pvr
@@ -579,6 +836,40 @@ get_pvr:
mfspr r3, PVR
blr
+/*------------------------------------------------------------------------------- */
+/* Function: ppcDcbf */
+/* Description: Data Cache block flush */
+/* Input: r3 = effective address */
+/* Output: none. */
+/*------------------------------------------------------------------------------- */
+ .globl ppcDcbf
+ppcDcbf:
+ dcbf r0,r3
+ blr
+
+/*------------------------------------------------------------------------------- */
+/* Function: ppcDcbi */
+/* Description: Data Cache block Invalidate */
+/* Input: r3 = effective address */
+/* Output: none. */
+/*------------------------------------------------------------------------------- */
+ .globl ppcDcbi
+ppcDcbi:
+ dcbi r0,r3
+ blr
+
+/*--------------------------------------------------------------------------
+ * Function: ppcDcbz
+ * Description: Data Cache block zero.
+ * Input: r3 = effective address
+ * Output: none.
+ *-------------------------------------------------------------------------- */
+
+ .globl ppcDcbz
+ppcDcbz:
+ dcbz r0,r3
+ blr
+
/*-------------------------------------------------------------------*/
/*
@@ -668,46 +959,29 @@ relocate_code:
* Now flush the cache: note that we must start from a cache aligned
* address. Otherwise we might miss one cache line.
*/
-4:
- bl un_setup_stack_in_data_cache
- mr r7, r3
- mr r8, r4
- bl dcache_disable
- mr r3, r7
- mr r4, r8
-
- cmpwi r6,0
+4: cmpwi r6,0
add r5,r3,r5
- beq 7f /* Always flush prefetch queue in any case */
+ beq 7f /* Always flush prefetch queue in any case */
subi r0,r6,1
andc r3,r3,r0
- mfspr r7,HID0 /* don't do dcbst if dcache is disabled*/
- rlwinm r7,r7,HID0_DCE_SHIFT,31,31
- cmpwi r7,0
- beq 9f
mr r4,r3
5: dcbst 0,r4
add r4,r4,r6
cmplw r4,r5
blt 5b
- sync /* Wait for all dcbst to complete on bus */
-9: mfspr r7,HID0 /* don't do icbi if icache is disabled */
- rlwinm r7,r7,HID0_DCE_SHIFT,31,31
- cmpwi r7,0
- beq 7f
+ sync /* Wait for all dcbst to complete on bus */
mr r4,r3
6: icbi 0,r4
add r4,r4,r6
cmplw r4,r5
blt 6b
-7: sync /* Wait for all icbi to complete on bus */
+7: sync /* Wait for all icbi to complete on bus */
isync
/*
* We are done. Do not return, instead branch to second part of board
* initialization, now running from RAM.
*/
-
addi r0, r10, in_ram - _start + EXC_OFF_SYS_RESET
mtlr r0
blr
@@ -865,6 +1139,27 @@ trap_reloc:
blr
#ifdef CFG_INIT_RAM_LOCK
+lock_ram_in_cache:
+ /* Allocate Initial RAM in data cache.
+ */
+ lis r3, (CFG_INIT_RAM_ADDR & ~31)@h
+ ori r3, r3, (CFG_INIT_RAM_ADDR & ~31)@l
+ li r2, ((CFG_INIT_RAM_END & ~31) + \
+ (CFG_INIT_RAM_ADDR & 31) + 31) / 32
+ mtctr r2
+1:
+ dcbz r0, r3
+ addi r3, r3, 32
+ bdnz 1b
+
+ /* Lock the data cache */
+ mfspr r0, HID0
+ ori r0, r0, 0x1000
+ sync
+ mtspr HID0, r0
+ sync
+ blr
+
.globl unlock_ram_in_cache
unlock_ram_in_cache:
/* invalidate the INIT_RAM section */
@@ -878,6 +1173,15 @@ unlock_ram_in_cache:
bdnz 1b
sync /* Wait for all icbi to complete on bus */
isync
+
+ /* Unlock the data cache and invalidate it */
+ mfspr r3, HID0
+ li r5, HID0_DLOCK|HID0_DCFI
+ andc r3, r3, r5 /* no invalidate, unlock */
+ ori r5, r3, HID0_DCFI /* invalidate, unlock */
+ mtspr HID0, r5 /* invalidate, unlock */
+ mtspr HID0, r3 /* no invalidate, unlock */
+ sync
blr
#endif
@@ -946,148 +1250,3 @@ remap_flash_by_law0:
stw r4, LBLAWBAR1(r3)
stw r4, LBLAWAR1(r3) /* Off LBIU LAW1 */
blr
-
-setup_stack_in_data_cache_on_r1:
- lis r3, (CFG_IMMRBAR)@h
-
- /* setup D-BAT for the D-Cache (with out real memory backup) */
-
- lis r4, (CFG_INIT_RAM_ADDR & 0xFFFE0000)@h
- mtspr DBAT0U, r4
- ori r4, r4, 0x0002
- mtspr DBAT0L, r4
- isync
-
-#if 0
- /* Enable MMU */
- mfmsr r4
- ori r4, r4, (MSR_DR | MSR_IR)@l
- mtmsr r4
-#endif
-
- /* Enable and invalidate data cache. */
- mfspr r4, HID0
- mr r5, r4
- ori r4, r4, HID0_DCE | HID0_DCI
- ori r5, r5, HID0_DCE
- sync
- mtspr HID0, r4
- mtspr HID0, r5
- sync
-
- /* Allocate Initial RAM in data cache.*/
- li r0, 0
- lis r4, (CFG_INIT_RAM_ADDR)@h
- ori r4, r4, (CFG_INIT_RAM_ADDR)@l
- li r5, 128*8 /* 128*8*32=32Kb */
- mtctr r5
-1:
- dcbz r0, r4
- addi r4, r4, 32
- bdnz 1b
- isync
-
- /* Lock all the D-cache, basically leaving the reset of the program without dcache */
- mfspr r4, HID0
- ori r4, r4, (HID0_DLOCK)@l
- sync
- mtspr HID0 , r4
-
- /* setup the stack pointer in r1 */
- lis r1, (CFG_INIT_RAM_ADDR + CFG_GBL_DATA_OFFSET)@h
- ori r1, r1, (CFG_INIT_RAM_ADDR + CFG_GBL_DATA_OFFSET)@l
- li r0, 0 /* Make room for stack frame header and */
-
- stwu r0, -4(r1) /* clear final stack frame so that */
- stwu r0, -4(r1) /* stack backtraces terminate cleanly */
-
- blr
-
-un_setup_stack_in_data_cache:
- blr
- mr r14, r4
- mr r15, r5
-
-
- lis r4, (CFG_INIT_RAM_ADDR & 0xFFFE0000)@h
- mtspr DBAT0U, r4
- ori r4, r4, 0x0002
- mtspr DBAT0L, r4
- isync
-
- /* un lock all the D-cache */
- mfspr r4, HID0
- lis r5, (~(HID0_DLOCK))@h
- ori r5, r5, (~(HID0_DLOCK))@l
- and r4, r4, r5
- sync
- mtspr HID0 , r4
-
- /* Re - Allocate Initial RAM in data cache.*/
- li r0, 0
- lis r4, (CFG_INIT_RAM_ADDR)@h
- ori r4, r4, (CFG_INIT_RAM_ADDR)@l
- li r5, 128*8 /* 128*8*32=32Kb */
- mtctr r5
-1:
- dcbz r0, r4
- addi r4, r4, 32
- bdnz 1b
- isync
-
- mflr r16
- bl dcache_disable
- mtlr r16
-
- blr
-
-#if 0
-#define GREEN_LIGHT 0x2B0D4046
-#define RED_LIGHT 0x250D4046
-#define LIB_CNT 0x4FFF
-
-/*
- * Lib Light
- */
-
- .globl liblight
-liblight:
- lis r3, CFG_IMMRBAR@h
- ori r3, r3, CFG_IMMRBAR@l
- li r4, 0x3002
- mtmsr r4
- xor r4, r4, r4
- mtspr HID0, r4
- mtspr HID2, r4
- lis r4, 0xF8000000@h
- ori r4, r4, 0xF8000000@l
- stw r4, LBLAWBAR1(r3)
- lis r4, 0x8000000E@h
- ori r4, r4, 0x8000000E@l
- stw r4, LBLAWAR1(r3)
- lis r4, 0xF8000801@h
- ori r4, r4, 0xF8000801@l
- stw r4, BR1(r3)
- lis r4, 0xFFFFE8f0@h
- ori r4, r4, 0xFFFFE8f0@l
- stw r4, OR1(r3)
-
- lis r4, 0xF8000000@h
- ori r4, r4, 0xF8000000@l
- lis r5, GREEN_LIGHT@h
- ori r5, r5, GREEN_LIGHT@l
- lis r6, RED_LIGHT@h
- ori r6, r6, RED_LIGHT@l
- lis r7, LIB_CNT@h
- ori r7, r7, LIB_CNT@l
-
-1:
- stw r5, 0(r4)
- mtctr r7
-2: bdnz 2b
- stw r6, 0(r4)
- mtctr r7
-3: bdnz 3b
- b 1b
-
-#endif
diff --git a/cpu/mpc83xx/traps.c b/cpu/mpc83xx/traps.c
index c7a56386e8..44345afbfa 100644
--- a/cpu/mpc83xx/traps.c
+++ b/cpu/mpc83xx/traps.c
@@ -40,6 +40,8 @@
#include <asm/processor.h>
#include <asm/mpc8349_pci.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/* Returns 0 if exception not found and fixup otherwise. */
extern unsigned long search_exception_table(unsigned long);
@@ -52,7 +54,6 @@ extern unsigned long search_exception_table(unsigned long);
void
print_backtrace(unsigned long *sp)
{
- DECLARE_GLOBAL_DATA_PTR;
int cnt = 0;
unsigned long i;
diff --git a/cpu/mpc85xx/commproc.c b/cpu/mpc85xx/commproc.c
index aa8a5a57ba..3504d50cae 100644
--- a/cpu/mpc85xx/commproc.c
+++ b/cpu/mpc85xx/commproc.c
@@ -24,6 +24,8 @@
#include <common.h>
#include <asm/cpm_85xx.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#if defined(CONFIG_CPM2)
/*
* because we have stack and init data in dual port ram
@@ -35,8 +37,6 @@
void
m8560_cpm_reset(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
volatile immap_t *immr = (immap_t *)CFG_IMMR;
volatile ulong count;
@@ -64,8 +64,6 @@ m8560_cpm_reset(void)
uint
m8560_cpm_dpalloc(uint size, uint align)
{
- DECLARE_GLOBAL_DATA_PTR;
-
volatile immap_t *immr = (immap_t *)CFG_IMMR;
uint retloc;
uint align_mask, off;
@@ -122,8 +120,6 @@ m8560_cpm_hostalloc(uint size, uint align)
void
m8560_cpm_setbrg(uint brg, uint rate)
{
- DECLARE_GLOBAL_DATA_PTR;
-
volatile immap_t *immr = (immap_t *)CFG_IMMR;
volatile uint *bp;
@@ -146,8 +142,6 @@ m8560_cpm_setbrg(uint brg, uint rate)
void
m8560_cpm_fastbrg(uint brg, uint rate, int div16)
{
- DECLARE_GLOBAL_DATA_PTR;
-
volatile immap_t *immr = (immap_t *)CFG_IMMR;
volatile uint *bp;
diff --git a/cpu/mpc85xx/cpu_init.c b/cpu/mpc85xx/cpu_init.c
index efde9cc31a..c12b47b589 100644
--- a/cpu/mpc85xx/cpu_init.c
+++ b/cpu/mpc85xx/cpu_init.c
@@ -30,6 +30,8 @@
#include <ioports.h>
#include <asm/io.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#ifdef CONFIG_CPM2
static void config_8560_ioports (volatile immap_t * immr)
{
@@ -103,7 +105,6 @@ static void config_8560_ioports (volatile immap_t * immr)
void cpu_init_f (void)
{
- DECLARE_GLOBAL_DATA_PTR;
volatile immap_t *immap = (immap_t *)CFG_IMMR;
volatile ccsr_lbc_t *memctl = &immap->im_lbc;
extern void m8560_cpm_reset (void);
diff --git a/cpu/mpc85xx/serial_scc.c b/cpu/mpc85xx/serial_scc.c
index cf060d6890..4e925f8bea 100644
--- a/cpu/mpc85xx/serial_scc.c
+++ b/cpu/mpc85xx/serial_scc.c
@@ -35,6 +35,8 @@
#include <common.h>
#include <asm/cpm_85xx.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#if defined(CONFIG_CPM2)
#if defined(CONFIG_CONS_ON_SCC)
@@ -186,8 +188,6 @@ int serial_init (void)
void
serial_setbrg (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
#if defined(CONFIG_CONS_USE_EXTC)
m8560_cpm_extcbrg(SCC_INDEX, gd->baudrate,
CONFIG_CONS_EXTC_RATE, CONFIG_CONS_EXTC_PINSEL);
diff --git a/cpu/mpc85xx/speed.c b/cpu/mpc85xx/speed.c
index d736742f62..ca81ee7352 100644
--- a/cpu/mpc85xx/speed.c
+++ b/cpu/mpc85xx/speed.c
@@ -29,6 +29,8 @@
#include <ppc_asm.tmpl>
#include <asm/processor.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/* --------------------------------------------------------------- */
void get_sys_info (sys_info_t * sysInfo)
@@ -80,7 +82,6 @@ void get_sys_info (sys_info_t * sysInfo)
int get_clocks (void)
{
- DECLARE_GLOBAL_DATA_PTR;
sys_info_t sys_info;
#if defined(CONFIG_CPM2)
volatile immap_t *immap = (immap_t *) CFG_IMMR;
diff --git a/cpu/mpc85xx/start.S b/cpu/mpc85xx/start.S
index 7ac65736bc..f96a4c3f8b 100644
--- a/cpu/mpc85xx/start.S
+++ b/cpu/mpc85xx/start.S
@@ -715,7 +715,7 @@ icache_disable:
.globl icache_status
icache_status:
mfspr r3,L1CSR1
- srwi r3, r3, 31 /* >>31 => select bit 0 */
+ andi. r3,r3,1
blr
.globl dcache_enable
@@ -748,7 +748,7 @@ dcache_disable:
.globl dcache_status
dcache_status:
mfspr r3,L1CSR0
- srwi r3, r3, 31 /* >>31 => select bit 0 */
+ andi. r3,r3,1
blr
.globl get_pir
diff --git a/cpu/mpc85xx/traps.c b/cpu/mpc85xx/traps.c
index a87eed2ad1..904f052339 100644
--- a/cpu/mpc85xx/traps.c
+++ b/cpu/mpc85xx/traps.c
@@ -39,6 +39,8 @@
#include <command.h>
#include <asm/processor.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
int (*debugger_exception_handler)(struct pt_regs *) = 0;
#endif
@@ -83,7 +85,6 @@ extern void do_bedbug_breakpoint(struct pt_regs *);
void
print_backtrace(unsigned long *sp)
{
- DECLARE_GLOBAL_DATA_PTR;
int cnt = 0;
unsigned long i;
diff --git a/cpu/mpc8xx/commproc.c b/cpu/mpc8xx/commproc.c
index 75740e07f2..07c763cfde 100644
--- a/cpu/mpc8xx/commproc.c
+++ b/cpu/mpc8xx/commproc.c
@@ -24,12 +24,12 @@
#include <common.h>
#include <commproc.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#ifdef CFG_ALLOC_DPRAM
int dpram_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
/* Reclaim the DP memory for our use. */
gd->dp_alloc_base = CPM_DATAONLY_BASE;
gd->dp_alloc_top = CPM_DATAONLY_BASE + CPM_DATAONLY_SIZE;
@@ -43,7 +43,6 @@ int dpram_init (void)
*/
uint dpram_alloc (uint size)
{
- DECLARE_GLOBAL_DATA_PTR;
uint addr = gd->dp_alloc_base;
if ((gd->dp_alloc_base + size) >= gd->dp_alloc_top)
@@ -56,8 +55,6 @@ uint dpram_alloc (uint size)
uint dpram_base (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
return gd->dp_alloc_base;
}
@@ -67,8 +64,6 @@ uint dpram_base (void)
*/
uint dpram_alloc_align (uint size, uint align)
{
- DECLARE_GLOBAL_DATA_PTR;
-
uint addr, mask = align - 1;
addr = (gd->dp_alloc_base + mask) & ~mask;
@@ -83,8 +78,6 @@ uint dpram_alloc_align (uint size, uint align)
uint dpram_base_align (uint align)
{
- DECLARE_GLOBAL_DATA_PTR;
-
uint mask = align - 1;
return (gd->dp_alloc_base + mask) & ~mask;
diff --git a/cpu/mpc8xx/cpu.c b/cpu/mpc8xx/cpu.c
index 4a32986a2e..97112f03da 100644
--- a/cpu/mpc8xx/cpu.c
+++ b/cpu/mpc8xx/cpu.c
@@ -39,6 +39,8 @@
#include <mpc8xx.h>
#include <asm/cache.h>
+DECLARE_GLOBAL_DATA_PTR;
+
static char *cpu_warning = "\n " \
"*** Warning: CPU Core has Silicon Bugs -- Check the Errata ***";
@@ -69,14 +71,15 @@ static int check_CPU (long clock, uint pvr, uint immr)
k = (immr << 16) | *((ushort *) & immap->im_cpm.cp_dparam[0xB0]);
m = 0;
+ suf = "";
/*
* Some boards use sockets so different CPUs can be used.
* We have to check chip version in run time.
*/
switch (k) {
- case 0x00020001: pre = 'P'; suf = ""; break;
- case 0x00030001: suf = ""; break;
+ case 0x00020001: pre = 'P'; break;
+ case 0x00030001: break;
case 0x00120003: suf = "A"; break;
case 0x00130003: suf = "A3"; break;
@@ -93,7 +96,11 @@ static int check_CPU (long clock, uint pvr, uint immr)
/* this value is not documented anywhere */
case 0x40000000: pre = 'P'; suf = "D"; m = 1; break;
/* MPC866P/MPC866T/MPC859T/MPC859DSL/MPC852T */
- case 0x08000003: pre = 'M'; suf = ""; m = 1;
+ case 0x08010004: /* Rev. A.0 */
+ suf = "A";
+ /* fall through */
+ case 0x08000003: /* Rev. 0.3 */
+ pre = 'M'; m = 1;
if (id_str == NULL)
id_str =
# if defined(CONFIG_MPC852T)
@@ -344,8 +351,6 @@ static int check_CPU (long clock, uint pvr, uint immr)
int checkcpu (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
ulong clock = gd->cpu_clk;
uint immr = get_immr (0); /* Return full IMMR contents */
uint pvr = get_pvr ();
@@ -534,8 +539,6 @@ int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
*/
unsigned long get_tbclk (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
uint immr = get_immr (0); /* Return full IMMR contents */
volatile immap_t *immap = (volatile immap_t *)(immr & 0xFFFF0000);
ulong oscclk, factor, pll;
diff --git a/cpu/mpc8xx/cpu_init.c b/cpu/mpc8xx/cpu_init.c
index b2c59c6f57..c79e5780ad 100644
--- a/cpu/mpc8xx/cpu_init.c
+++ b/cpu/mpc8xx/cpu_init.c
@@ -27,6 +27,10 @@
#include <mpc8xx.h>
#include <commproc.h>
+#if defined(CFG_RTCSC) || defined(CFG_RMDS)
+DECLARE_GLOBAL_DATA_PTR;
+#endif
+
#if defined(CFG_I2C_UCODE_PATCH) || defined(CFG_SPI_UCODE_PATCH)
void cpm_load_patch (volatile immap_t * immr);
#endif
@@ -157,6 +161,7 @@ void cpu_init_f (volatile immap_t * immr)
defined(CONFIG_RMU) || \
defined(CONFIG_RPXCLASSIC) || \
defined(CONFIG_RPXLITE) || \
+ defined(CONFIG_SPC1920) || \
defined(CONFIG_SPD823TS)
memctl->memc_br0 = CFG_BR0_PRELIM;
@@ -259,8 +264,6 @@ void cpu_init_f (volatile immap_t * immr)
int cpu_init_r (void)
{
#if defined(CFG_RTCSC) || defined(CFG_RMDS)
- DECLARE_GLOBAL_DATA_PTR;
-
bd_t *bd = gd->bd;
volatile immap_t *immr = (volatile immap_t *) (bd->bi_immr_base);
#endif
diff --git a/cpu/mpc8xx/fec.c b/cpu/mpc8xx/fec.c
index d2f5d88844..6d2755e830 100644
--- a/cpu/mpc8xx/fec.c
+++ b/cpu/mpc8xx/fec.c
@@ -27,6 +27,8 @@
#include <net.h>
#include <command.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#undef ET_DEBUG
#if (CONFIG_COMMANDS & CFG_CMD_NET) && \
@@ -371,7 +373,6 @@ static inline void fec_half_duplex(struct eth_device *dev)
static void fec_pin_init(int fecidx)
{
- DECLARE_GLOBAL_DATA_PTR;
bd_t *bd = gd->bd;
volatile immap_t *immr = (immap_t *) CFG_IMMR;
volatile fec_t *fecp;
@@ -395,8 +396,10 @@ static void fec_pin_init(int fecidx)
* * to 2.5 MHz.
* * This MDC frequency is equal to system clock / (2 * MII_SPEED).
* * Then MII_SPEED = system_clock / 2 * 2,5 Mhz.
+ *
+ * All MII configuration is done via FEC1 registers:
*/
- fecp->fec_mii_speed = ((bd->bi_intfreq + 4999999) / 5000000) << 1;
+ immr->im_cpm.cp_fec1.fec_mii_speed = ((bd->bi_intfreq + 4999999) / 5000000) << 1;
#if defined(CONFIG_NETTA) || defined(CONFIG_NETPHONE) || defined(CONFIG_NETTA2)
/* our PHYs are the limit at 2.5 MHz */
@@ -507,8 +510,6 @@ static void fec_pin_init(int fecidx)
#if defined(CONFIG_MPC885_FAMILY) /* MPC87x/88x have got 2 FECs and different pinout */
#if !defined(CONFIG_RMII)
-
-#warning this configuration is not tested; please report if it works
immr->im_cpm.cp_pepar |= 0x0003fffc;
immr->im_cpm.cp_pedir |= 0x0003fffc;
immr->im_cpm.cp_peso &= ~0x000087fc;
@@ -821,6 +822,7 @@ static void fec_halt(struct eth_device* dev)
#define PHY_ID_LSI80225 0x0016f870 /* LSI 80225 */
#define PHY_ID_LSI80225B 0x0016f880 /* LSI 80225/B */
#define PHY_ID_DM9161 0x0181B880 /* Davicom DM9161 */
+#define PHY_ID_KSM8995M 0x00221450 /* MICREL KS8995MA */
/* send command to phy using mii, wait for result */
static uint
@@ -906,6 +908,9 @@ static int mii_discover_phy(struct eth_device *dev)
case PHY_ID_DM9161:
printf("Davicom DM9161\n");
break;
+ case PHY_ID_KSM8995M:
+ printf("MICREL KS8995M\n");
+ break;
default:
printf("0x%08x\n", phytype);
break;
diff --git a/cpu/mpc8xx/i2c.c b/cpu/mpc8xx/i2c.c
index 682db53edb..6c59374e3f 100644
--- a/cpu/mpc8xx/i2c.c
+++ b/cpu/mpc8xx/i2c.c
@@ -37,6 +37,8 @@
#include <watchdog.h>
#endif
+DECLARE_GLOBAL_DATA_PTR;
+
/* define to enable debug messages */
#undef DEBUG_I2C
@@ -205,8 +207,6 @@ i2c_setrate (int hz, int speed)
void
i2c_init(int speed, int slaveaddr)
{
- DECLARE_GLOBAL_DATA_PTR;
-
volatile immap_t *immap = (immap_t *)CFG_IMMR ;
volatile cpm8xx_t *cp = (cpm8xx_t *)&immap->im_cpm;
volatile i2c8xx_t *i2c = (i2c8xx_t *)&immap->im_i2c;
@@ -615,8 +615,6 @@ int i2c_probe(uchar chip)
int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
{
- DECLARE_GLOBAL_DATA_PTR;
-
i2c_state_t state;
uchar xaddr[4];
int rc;
@@ -671,8 +669,6 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
{
- DECLARE_GLOBAL_DATA_PTR;
-
i2c_state_t state;
uchar xaddr[4];
int rc;
diff --git a/cpu/mpc8xx/serial.c b/cpu/mpc8xx/serial.c
index fa0405f198..8ae584f2e1 100644
--- a/cpu/mpc8xx/serial.c
+++ b/cpu/mpc8xx/serial.c
@@ -27,6 +27,8 @@
#include <serial.h>
#include <watchdog.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#if !defined(CONFIG_8xx_CONS_NONE) /* No Console at all */
#if defined(CONFIG_8xx_CONS_SMC1) /* Console on SMC1 */
@@ -65,7 +67,6 @@
static void serial_setdivisor(volatile cpm8xx_t *cp)
{
- DECLARE_GLOBAL_DATA_PTR;
int divisor=(gd->cpu_clk + 8*gd->baudrate)/16/gd->baudrate;
if(divisor/16>0x1000) {
@@ -226,9 +227,12 @@ static int smc_init (void)
sp->smc_smcm = 0;
sp->smc_smce = 0xff;
- /* Set up the baud rate generator.
- */
+#ifdef CFG_SPC1920_SMC1_CLK4 /* clock source is PLD */
+ *((volatile uchar *) CFG_SPC1920_PLD_BASE+6) = 0xff;
+#else
+ /* Set up the baud rate generator */
smc_setbrg ();
+#endif
/* Make the first buffer the only buffer.
*/
@@ -268,8 +272,6 @@ smc_putc(const char c)
volatile cpm8xx_t *cpmp = &(im->im_cpm);
#ifdef CONFIG_MODEM_SUPPORT
- DECLARE_GLOBAL_DATA_PTR;
-
if (gd->be_quiet)
return;
#endif
@@ -553,8 +555,6 @@ scc_putc(const char c)
volatile cpm8xx_t *cpmp = &(im->im_cpm);
#ifdef CONFIG_MODEM_SUPPORT
- DECLARE_GLOBAL_DATA_PTR;
-
if (gd->be_quiet)
return;
#endif
@@ -649,13 +649,11 @@ struct serial_device serial_scc_device =
#ifdef CONFIG_MODEM_SUPPORT
void disable_putc(void)
{
- DECLARE_GLOBAL_DATA_PTR;
gd->be_quiet = 1;
}
void enable_putc(void)
{
- DECLARE_GLOBAL_DATA_PTR;
gd->be_quiet = 0;
}
#endif
diff --git a/cpu/mpc8xx/speed.c b/cpu/mpc8xx/speed.c
index f03831617c..101d5f9cb3 100644
--- a/cpu/mpc8xx/speed.c
+++ b/cpu/mpc8xx/speed.c
@@ -25,6 +25,8 @@
#include <mpc8xx.h>
#include <asm/processor.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#if !defined(CONFIG_8xx_CPUCLK_DEFAULT) || defined(CFG_MEASURE_CPUCLK) || defined(DEBUG)
#define PITC_SHIFT 16
@@ -181,8 +183,6 @@ unsigned long measure_gclk(void)
*/
int get_clocks (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
uint immr = get_immr (0); /* Return full IMMR contents */
volatile immap_t *immap = (immap_t *) (immr & 0xFFFF0000);
uint sccr = immap->im_clkrst.car_sccr;
@@ -238,8 +238,6 @@ static long init_pll_866 (long clk);
*/
int get_clocks_866 (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
volatile immap_t *immr = (immap_t *) CFG_IMMR;
char tmp[64];
long cpuclk = 0;
@@ -261,7 +259,11 @@ int get_clocks_866 (void)
*/
sccr_reg = immr->im_clkrst.car_sccr;
sccr_reg &= ~SCCR_EBDF11;
+#if defined(CONFIG_TQM885D)
+ if (gd->cpu_clk <= 80000000) {
+#else
if (gd->cpu_clk <= 66000000) {
+#endif
sccr_reg |= SCCR_EBDF00; /* bus division factor = 1 */
gd->bus_clk = gd->cpu_clk;
} else {
@@ -277,8 +279,6 @@ int get_clocks_866 (void)
*/
int sdram_adjust_866 (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
volatile immap_t *immr = (immap_t *) CFG_IMMR;
long mamr;
@@ -364,15 +364,14 @@ static long init_pll_866 (long clk)
#endif /* CONFIG_8xx_CPUCLK_DEFAULT */
-#if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M)
+#if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
+ && !defined(CONFIG_TQM885D)
/*
* Adjust sdram refresh rate to actual CPU clock
* and set timebase source according to actual CPU clock
*/
int adjust_sdram_tbs_8xx (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
volatile immap_t *immr = (immap_t *) CFG_IMMR;
long mamr;
long sccr;
@@ -390,6 +389,6 @@ int adjust_sdram_tbs_8xx (void)
return (0);
}
-#endif /* CONFIG_TQM8xxL/M, !TQM866M */
+#endif /* CONFIG_TQM8xxL/M, !TQM866M, !TQM885D */
/* ------------------------------------------------------------------------- */
diff --git a/cpu/mpc8xx/video.c b/cpu/mpc8xx/video.c
index ee60477ab8..918de67943 100644
--- a/cpu/mpc8xx/video.c
+++ b/cpu/mpc8xx/video.c
@@ -39,6 +39,8 @@
#ifdef CONFIG_VIDEO
+DECLARE_GLOBAL_DATA_PTR;
+
/************************************************************************/
/* ** DEBUG SETTINGS */
/************************************************************************/
@@ -1164,7 +1166,6 @@ static void *video_logo (void)
u16 *screen = video_fb_address, width = VIDEO_COLS;
#ifdef VIDEO_INFO
# ifndef CONFIG_FADS
- DECLARE_GLOBAL_DATA_PTR;
char temp[32];
# endif
char info[80];
@@ -1282,8 +1283,6 @@ static int video_init (void *videobase)
int drv_video_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
int error, devices = 1;
device_t videodev;
diff --git a/cpu/nios/serial.c b/cpu/nios/serial.c
index 4bdda25007..5ecdc6d7ea 100644
--- a/cpu/nios/serial.c
+++ b/cpu/nios/serial.c
@@ -26,6 +26,8 @@
#include <watchdog.h>
#include <nios-io.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/*------------------------------------------------------------------
* JTAG acts as the serial port
*-----------------------------------------------------------------*/
@@ -83,7 +85,6 @@ int serial_init (void) { return (0);}
void serial_setbrg (void)
{
- DECLARE_GLOBAL_DATA_PTR;
unsigned div;
div = (CONFIG_SYS_CLK_FREQ/gd->baudrate)-1;
diff --git a/cpu/nios2/epcs.c b/cpu/nios2/epcs.c
index a8851e99a2..414c38c2b1 100644
--- a/cpu/nios2/epcs.c
+++ b/cpu/nios2/epcs.c
@@ -25,7 +25,7 @@
#if defined(CFG_NIOS_EPCSBASE)
#include <command.h>
-#include <nios2.h>
+#include <asm/io.h>
#include <nios2-io.h>
#include <nios2-epcs.h>
@@ -72,8 +72,7 @@
*/
#define EPCS_TIMEOUT 100 /* 100 msec timeout */
-static nios_spi_t *epcs =
- (nios_spi_t *)CACHE_BYPASS(CFG_NIOS_EPCSBASE);
+static nios_spi_t *epcs = (nios_spi_t *)CFG_NIOS_EPCSBASE;
/***********************************************************************
* Device access
@@ -81,16 +80,20 @@ static nios_spi_t *epcs =
static int epcs_cs (int assert)
{
ulong start;
+ unsigned tmp;
+
if (assert) {
- epcs->control |= NIOS_SPI_SSO;
+ tmp = readl (&epcs->control);
+ writel (&epcs->control, tmp | NIOS_SPI_SSO);
} else {
/* Let all bits shift out */
start = get_timer (0);
- while ((epcs->status & NIOS_SPI_TMT) == 0)
+ while ((readl (&epcs->status) & NIOS_SPI_TMT) == 0)
if (get_timer (start) > EPCS_TIMEOUT)
return (-1);
- epcs->control &= ~NIOS_SPI_SSO;
+ tmp = readl (&epcs->control);
+ writel (&epcs->control, tmp & ~NIOS_SPI_SSO);
}
return (0);
}
@@ -100,10 +103,10 @@ static int epcs_tx (unsigned char c)
ulong start;
start = get_timer (0);
- while ((epcs->status & NIOS_SPI_TRDY) == 0)
+ while ((readl (&epcs->status) & NIOS_SPI_TRDY) == 0)
if (get_timer (start) > EPCS_TIMEOUT)
return (-1);
- epcs->txdata = c;
+ writel (&epcs->txdata, c);
return (0);
}
@@ -112,10 +115,10 @@ static int epcs_rx (void)
ulong start;
start = get_timer (0);
- while ((epcs->status & NIOS_SPI_RRDY) == 0)
+ while ((readl (&epcs->status) & NIOS_SPI_RRDY) == 0)
if (get_timer (start) > EPCS_TIMEOUT)
return (-1);
- return (epcs->rxdata);
+ return (readl (&epcs->rxdata));
}
static unsigned char bitrev[] = {
@@ -207,6 +210,21 @@ static struct epcs_devinfo_t devinfo[] = {
{ 0, 0, 0, 0, 0, 0 }
};
+int epcs_reset (void)
+{
+ /* When booting from an epcs controller, the epcs bootrom
+ * code may leave the slave select in an asserted state.
+ * This causes two problems: (1) The initial epcs access
+ * will fail -- not a big deal, and (2) a software reset
+ * will cause the bootrom code to hang since it does not
+ * ensure the select is negated prior to first access -- a
+ * big deal. Here we just negate chip select and everything
+ * gets better :-)
+ */
+ epcs_cs (0); /* Negate chip select */
+ return (0);
+}
+
epcs_devinfo_t *epcs_dev_find (void)
{
unsigned char buf[4];
diff --git a/cpu/nios2/exceptions.S b/cpu/nios2/exceptions.S
index d3b95cfc7a..b9c7a587e1 100644
--- a/cpu/nios2/exceptions.S
+++ b/cpu/nios2/exceptions.S
@@ -30,6 +30,9 @@
.global _exception
+ .set noat
+ .set nobreak
+
_exception:
/* SAVE ALL REGS -- this allows trap and unimplemented
* instruction handlers to be coded conveniently in C
diff --git a/cpu/nios2/interrupts.c b/cpu/nios2/interrupts.c
index 4a6da582bb..4685161b88 100644
--- a/cpu/nios2/interrupts.c
+++ b/cpu/nios2/interrupts.c
@@ -27,6 +27,7 @@
#include <nios2.h>
#include <nios2-io.h>
+#include <asm/io.h>
#include <asm/ptrace.h>
#include <common.h>
#include <command.h>
@@ -79,7 +80,7 @@ void tmr_isr (void *arg)
/* Interrupt is cleared by writing anything to the
* status register.
*/
- tmr->status = 0;
+ writel (&tmr->status, 0);
timestamp += CFG_NIOS_TMRMS;
#ifdef CONFIG_STATUS_LED
status_led_tick(timestamp);
@@ -88,16 +89,17 @@ void tmr_isr (void *arg)
static void tmr_init (void)
{
- nios_timer_t *tmr =(nios_timer_t *)CACHE_BYPASS(CFG_NIOS_TMRBASE);
+ nios_timer_t *tmr =(nios_timer_t *)CFG_NIOS_TMRBASE;
+
+ writel (&tmr->status, 0);
+ writel (&tmr->control, 0);
+ writel (&tmr->control, NIOS_TIMER_STOP);
- tmr->control &= ~(NIOS_TIMER_START | NIOS_TIMER_ITO);
- tmr->control |= NIOS_TIMER_STOP;
#if defined(CFG_NIOS_TMRCNT)
- tmr->periodl = CFG_NIOS_TMRCNT & 0xffff;
- tmr->periodh = (CFG_NIOS_TMRCNT >> 16) & 0xffff;
+ writel (&tmr->periodl, CFG_NIOS_TMRCNT & 0xffff);
+ writel (&tmr->periodh, (CFG_NIOS_TMRCNT >> 16) & 0xffff);
#endif
- tmr->control |= ( NIOS_TIMER_ITO |
- NIOS_TIMER_CONT |
+ writel (&tmr->control, NIOS_TIMER_ITO | NIOS_TIMER_CONT |
NIOS_TIMER_START );
irq_install_handler (CFG_NIOS_TMRIRQ, tmr_isr, (void *)tmr);
}
diff --git a/cpu/nios2/serial.c b/cpu/nios2/serial.c
index 2d08c93d09..0bd3821e39 100644
--- a/cpu/nios2/serial.c
+++ b/cpu/nios2/serial.c
@@ -24,16 +24,17 @@
#include <common.h>
#include <watchdog.h>
-#include <nios2.h>
+#include <asm/io.h>
#include <nios2-io.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/*------------------------------------------------------------------
* JTAG acts as the serial port
*-----------------------------------------------------------------*/
#if defined(CONFIG_CONSOLE_JTAG)
-static nios_jtag_t *jtag =
- (nios_jtag_t *)CACHE_BYPASS(CFG_NIOS_CONSOLE);
+static nios_jtag_t *jtag = (nios_jtag_t *)CFG_NIOS_CONSOLE;
void serial_setbrg( void ){ return; }
int serial_init( void ) { return(0);}
@@ -42,9 +43,9 @@ void serial_putc (char c)
{
unsigned val;
- while (NIOS_JTAG_WSPACE (jtag->control) == 0)
+ while (NIOS_JTAG_WSPACE ( readl (&jtag->control)) == 0)
WATCHDOG_RESET ();
- jtag->data = (unsigned char)c;
+ writel (&jtag->data, (unsigned char)c);
}
void serial_puts (const char *s)
@@ -55,7 +56,7 @@ void serial_puts (const char *s)
int serial_tstc (void)
{
- return (jtag->control & NIOS_JTAG_RRDY);
+ return ( readl (&jtag->control) & NIOS_JTAG_RRDY);
}
int serial_getc (void)
@@ -65,7 +66,7 @@ int serial_getc (void)
while (1) {
WATCHDOG_RESET ();
- val = jtag->data;
+ val = readl (&jtag->data);
if (val & NIOS_JTAG_RVALID)
break;
}
@@ -78,8 +79,7 @@ int serial_getc (void)
*-----------------------------------------------------------------*/
#else
-static nios_uart_t *uart = (nios_uart_t *)
- CACHE_BYPASS(CFG_NIOS_CONSOLE);
+static nios_uart_t *uart = (nios_uart_t *) CFG_NIOS_CONSOLE;
#if defined(CFG_NIOS_FIXEDBAUD)
@@ -93,11 +93,10 @@ int serial_init (void) { return (0);}
void serial_setbrg (void)
{
- DECLARE_GLOBAL_DATA_PTR;
unsigned div;
div = (CONFIG_SYS_CLK_FREQ/gd->baudrate)-1;
- uart->divisor = div;
+ writel (&uart->divisor,div);
return;
}
@@ -117,9 +116,9 @@ void serial_putc (char c)
{
if (c == '\n')
serial_putc ('\r');
- while ((uart->status & NIOS_UART_TRDY) == 0)
+ while ((readl (&uart->status) & NIOS_UART_TRDY) == 0)
WATCHDOG_RESET ();
- uart->txdata = (unsigned char)c;
+ writel (&uart->txdata,(unsigned char)c);
}
void serial_puts (const char *s)
@@ -131,14 +130,14 @@ void serial_puts (const char *s)
int serial_tstc (void)
{
- return (uart->status & NIOS_UART_RRDY);
+ return (readl (&uart->status) & NIOS_UART_RRDY);
}
int serial_getc (void)
{
while (serial_tstc () == 0)
WATCHDOG_RESET ();
- return( uart->rxdata & 0x00ff );
+ return (readl (&uart->rxdata) & 0x00ff );
}
#endif /* CONFIG_JTAG_CONSOLE */
diff --git a/cpu/nios2/sysid.c b/cpu/nios2/sysid.c
index 2b7a569cc5..b5a29593ea 100644
--- a/cpu/nios2/sysid.c
+++ b/cpu/nios2/sysid.c
@@ -26,20 +26,21 @@
#if defined (CFG_NIOS_SYSID_BASE)
#include <command.h>
-#include <nios2.h>
+#include <asm/io.h>
#include <nios2-io.h>
#include <linux/time.h>
void display_sysid (void)
{
- struct nios_sysid_t *sysid =
- (struct nios_sysid_t *)CACHE_BYPASS(CFG_NIOS_SYSID_BASE);
+ struct nios_sysid_t *sysid = (struct nios_sysid_t *)CFG_NIOS_SYSID_BASE;
struct tm t;
char asc[32];
+ time_t stamp;
- localtime_r ((time_t *)&sysid->timestamp, &t);
+ stamp = readl (&sysid->timestamp);
+ localtime_r (&stamp, &t);
asctime_r (&t, asc);
- printf ("SYSID : %08x, %s", sysid->id, asc);
+ printf ("SYSID : %08x, %s", readl (&sysid->id), asc);
}
diff --git a/cpu/omap3/Makefile b/cpu/omap3/Makefile
new file mode 100644
index 0000000000..203278e9cf
--- /dev/null
+++ b/cpu/omap3/Makefile
@@ -0,0 +1,43 @@
+#
+# (C) Copyright 2000-2003
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = lib$(CPU).a
+
+START = start.o
+OBJS = interrupts.o cpu.o
+
+all: .depend $(START) $(LIB)
+
+$(LIB): $(OBJS)
+ $(AR) crv $@ $(OBJS)
+
+#########################################################################
+
+.depend: Makefile $(START:.o=.S) $(OBJS:.o=.c)
+ $(CC) -M $(CFLAGS) $(START:.o=.S) $(OBJS:.o=.c) > $@
+
+sinclude .depend
+
+#########################################################################
diff --git a/cpu/omap3/config.mk b/cpu/omap3/config.mk
new file mode 100644
index 0000000000..76b1b87374
--- /dev/null
+++ b/cpu/omap3/config.mk
@@ -0,0 +1,33 @@
+#
+# (C) Copyright 2002
+# Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+PLATFORM_RELFLAGS += -fno-strict-aliasing -fno-common -ffixed-r8 \
+ -msoft-float
+
+PLATFORM_CPPFLAGS += -march=armv7a
+# =========================================================================
+#
+# Supply options according to compiler version
+#
+# =========================================================================
+PLATFORM_CPPFLAGS +=$(call cc-option,-mapcs-32,-mabi=apcs-gnu)
+PLATFORM_RELFLAGS +=$(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,))
diff --git a/cpu/omap3/cpu.c b/cpu/omap3/cpu.c
new file mode 100644
index 0000000000..2200ed3af9
--- /dev/null
+++ b/cpu/omap3/cpu.c
@@ -0,0 +1,235 @@
+/*
+ * (C) Copyright 2004 Texas Insturments
+ *
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Marius Groeger <mgroeger@sysgo.de>
+ *
+ * (C) Copyright 2002
+ * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * CPU specific code
+ */
+
+#include <common.h>
+#include <command.h>
+#if !defined(CONFIG_INTEGRATOR) && ! defined(CONFIG_ARCH_CINTEGRATOR)
+#include <asm/arch/cpu.h>
+#endif
+#include <asm/arch/sys_info.h>
+
+#ifdef CONFIG_USE_IRQ
+DECLARE_GLOBAL_DATA_PTR;
+#endif
+
+/* read co-processor 15, register #1 (control register) */
+static unsigned long read_p15_c1 (void)
+{
+ unsigned long value;
+
+ __asm__ __volatile__(
+ "mrc p15, 0, %0, c1, c0, 0 @ read control reg\n"
+ : "=r" (value)
+ :
+ : "memory");
+ return value;
+}
+
+/* write to co-processor 15, register #1 (control register) */
+static void write_p15_c1 (unsigned long value)
+{
+ __asm__ __volatile__(
+ "mcr p15, 0, %0, c1, c0, 0 @ write it back\n"
+ :
+ : "r" (value)
+ : "memory");
+
+ read_p15_c1 ();
+}
+
+static void cp_delay (void)
+{
+ volatile int i;
+
+ /* Many OMAP regs need at least 2 nops */
+ for (i = 0; i < 100; i++);
+}
+
+/* See also ARM Ref. Man. */
+#define C1_MMU (1<<0) /* mmu off/on */
+#define C1_ALIGN (1<<1) /* alignment faults off/on */
+#define C1_DC (1<<2) /* dcache off/on */
+#define C1_WB (1<<3) /* merging write buffer on/off */
+#define C1_BIG_ENDIAN (1<<7) /* big endian off/on */
+#define C1_SYS_PROT (1<<8) /* system protection */
+#define C1_ROM_PROT (1<<9) /* ROM protection */
+#define C1_IC (1<<12) /* icache off/on */
+#define C1_HIGH_VECTORS (1<<13) /* location of vectors: low/high addresses */
+#define RESERVED_1 (0xf << 3) /* must be 111b for R/W */
+
+int cpu_init (void)
+{
+ /*
+ * setup up stacks if necessary
+ */
+#ifdef CONFIG_USE_IRQ
+ IRQ_STACK_START = _armboot_start - CFG_MALLOC_LEN - CFG_GBL_DATA_SIZE - 4;
+ FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ;
+#endif
+ return 0;
+}
+
+int cleanup_before_linux (void)
+{
+ /*
+ * this function is called just before we call linux
+ * it prepares the processor for linux
+ *
+ * we turn off caches etc ...
+ */
+ disable_interrupts ();
+
+#ifdef CONFIG_LCD
+ {
+ extern void lcd_disable(void);
+ extern void lcd_panel_disable(void);
+
+ lcd_disable(); /* proper disable of lcd & panel */
+ lcd_panel_disable();
+ }
+#endif
+
+{
+ unsigned int i, external_boot;
+
+ /* turn off I/D-cache */
+ asm ("mrc p15, 0, %0, c1, c0, 0":"=r" (i));
+ i &= ~(C1_DC | C1_IC);
+ asm ("mcr p15, 0, %0, c1, c0, 0": :"r" (i));
+
+ /* invalidate I-cache */
+ arm_cache_flush();
+#ifndef CONFIG_L2_OFF
+ /* turn off L2 cache */
+ l2cache_disable();
+ /* invalidate L2 cache also */
+ external_boot = (get_boot_type() == 0x1F) ? 1 : 0;
+ v7_flush_dcache_all(get_device_type(), external_boot);
+#endif
+ i = 0;
+ /* mem barrier to sync up things */
+ asm ("mcr p15, 0, %0, c7, c10, 4": :"r" (i));
+}
+
+ return(0);
+}
+
+int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+ disable_interrupts ();
+ reset_cpu (0);
+ /*NOTREACHED*/
+ return(0);
+}
+
+void icache_enable (void)
+{
+ ulong reg;
+
+ reg = read_p15_c1 (); /* get control reg. */
+ cp_delay ();
+ write_p15_c1 (reg | C1_IC);
+}
+
+void icache_disable (void)
+{
+ ulong reg;
+
+ reg = read_p15_c1 ();
+ cp_delay ();
+ write_p15_c1 (reg & ~C1_IC);
+}
+
+void l2cache_enable()
+{
+ ulong reg;
+ unsigned long i;
+ volatile unsigned int j;
+
+ /* ES2 onwards we can disable/enable L2 ourselves */
+ if(get_cpu_rev() == CPU_3430_ES2) {
+ __asm__ __volatile__("mrc p15, 0, %0, c1, c0, 1":"=r" (i));
+ __asm__ __volatile__("orr %0, %0, #0x2":"=r"(i));
+ __asm__ __volatile__("mcr p15, 0, %0, c1, c0, 1":"=r" (i));
+ }
+ else {
+ /* Save r0, r12 and restore them after usage */
+ __asm__ __volatile__("mov %0, r12":"=r" (j));
+ __asm__ __volatile__("mov %0, r0":"=r" (i));
+
+ /* GP Device ROM code API usage here */
+ /* r12 = AUXCR Write function and r0 value */
+ __asm__ __volatile__("mov r12, #0x3");
+ __asm__ __volatile__("mrc p15, 0, r0, c1, c0, 1");
+ __asm__ __volatile__("orr r0, r0, #0x2");
+ /* SMI instruction to call ROM Code API */
+ __asm__ __volatile__(".word 0xE1600070");
+ __asm__ __volatile__("mov r0, %0":"=r" (i));
+ __asm__ __volatile__("mov r12, %0":"=r" (j));
+ }
+
+}
+
+void l2cache_disable()
+{
+ ulong reg;
+ unsigned long i;
+ volatile unsigned int j;
+
+ /* ES2 onwards we can disable/enable L2 ourselves */
+ if(get_cpu_rev() == CPU_3430_ES2) {
+ __asm__ __volatile__("mrc p15, 0, %0, c1, c0, 1":"=r" (i));
+ __asm__ __volatile__("bic %0, %0, #0x2":"=r"(i));
+ __asm__ __volatile__("mcr p15, 0, %0, c1, c0, 1":"=r" (i));
+ }
+ else {
+ /* Save r0, r12 and restore them after usage */
+ __asm__ __volatile__("mov %0, r12":"=r" (j));
+ __asm__ __volatile__("mov %0, r0":"=r" (i));
+
+ /* GP Device ROM code API usage here */
+ /* r12 = AUXCR Write function and r0 value */
+ __asm__ __volatile__("mov r12, #0x3");
+ __asm__ __volatile__("mrc p15, 0, r0, c1, c0, 1");
+ __asm__ __volatile__("bic r0, r0, #0x2");
+ /* SMI instruction to call ROM Code API */
+ __asm__ __volatile__(".word 0xE1600070");
+ __asm__ __volatile__("mov r0, %0":"=r" (i));
+ __asm__ __volatile__("mov r12, %0":"=r" (j));
+ }
+}
+
+int icache_status (void)
+{
+ return(read_p15_c1 () & C1_IC) != 0;
+}
diff --git a/cpu/omap3/interrupts.c b/cpu/omap3/interrupts.c
new file mode 100644
index 0000000000..25ac6906fd
--- /dev/null
+++ b/cpu/omap3/interrupts.c
@@ -0,0 +1,301 @@
+/*
+ * (C) Copyright 2004
+ * Texas Instruments
+ * Richard Woodruff <r-woodruff2@ti.com>
+ *
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Marius Groeger <mgroeger@sysgo.de>
+ * Alex Zuepke <azu@sysgo.de>
+ *
+ * (C) Copyright 2002
+ * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/arch/bits.h>
+
+#if !defined(CONFIG_INTEGRATOR) && ! defined(CONFIG_ARCH_CINTEGRATOR)
+# include <asm/arch/cpu.h>
+#endif
+
+#include <asm/proc-armv/ptrace.h>
+
+#define TIMER_LOAD_VAL 0
+
+/* macro to read the 32 bit timer */
+#define READ_TIMER (*(volatile ulong *)(CFG_TIMERBASE+TCRR))
+
+#ifdef CONFIG_USE_IRQ
+/* enable IRQ interrupts */
+void enable_interrupts (void)
+{
+ unsigned long temp;
+ __asm__ __volatile__("mrs %0, cpsr\n"
+ "bic %0, %0, #0x80\n"
+ "msr cpsr_c, %0"
+ : "=r" (temp)
+ :
+ : "memory");
+}
+
+/*
+ * disable IRQ/FIQ interrupts
+ * returns true if interrupts had been enabled before we disabled them
+ */
+int disable_interrupts (void)
+{
+ unsigned long old,temp;
+ __asm__ __volatile__("mrs %0, cpsr\n"
+ "orr %1, %0, #0xc0\n"
+ "msr cpsr_c, %1"
+ : "=r" (old), "=r" (temp)
+ :
+ : "memory");
+ return(old & 0x80) == 0;
+}
+#else
+void enable_interrupts (void)
+{
+ return;
+}
+int disable_interrupts (void)
+{
+ return 0;
+}
+#endif
+
+
+void bad_mode (void)
+{
+ panic ("Resetting CPU ...\n");
+ reset_cpu (0);
+}
+
+void show_regs (struct pt_regs *regs)
+{
+ unsigned long flags;
+ const char *processor_modes[] = {
+ "USER_26", "FIQ_26", "IRQ_26", "SVC_26",
+ "UK4_26", "UK5_26", "UK6_26", "UK7_26",
+ "UK8_26", "UK9_26", "UK10_26", "UK11_26",
+ "UK12_26", "UK13_26", "UK14_26", "UK15_26",
+ "USER_32", "FIQ_32", "IRQ_32", "SVC_32",
+ "UK4_32", "UK5_32", "UK6_32", "ABT_32",
+ "UK8_32", "UK9_32", "UK10_32", "UND_32",
+ "UK12_32", "UK13_32", "UK14_32", "SYS_32",
+ };
+
+ flags = condition_codes (regs);
+
+ printf ("pc : [<%08lx>] lr : [<%08lx>]\n"
+ "sp : %08lx ip : %08lx fp : %08lx\n",
+ instruction_pointer (regs),
+ regs->ARM_lr, regs->ARM_sp, regs->ARM_ip, regs->ARM_fp);
+ printf ("r10: %08lx r9 : %08lx r8 : %08lx\n",
+ regs->ARM_r10, regs->ARM_r9, regs->ARM_r8);
+ printf ("r7 : %08lx r6 : %08lx r5 : %08lx r4 : %08lx\n",
+ regs->ARM_r7, regs->ARM_r6, regs->ARM_r5, regs->ARM_r4);
+ printf ("r3 : %08lx r2 : %08lx r1 : %08lx r0 : %08lx\n",
+ regs->ARM_r3, regs->ARM_r2, regs->ARM_r1, regs->ARM_r0);
+ printf ("Flags: %c%c%c%c",
+ flags & CC_N_BIT ? 'N' : 'n',
+ flags & CC_Z_BIT ? 'Z' : 'z',
+ flags & CC_C_BIT ? 'C' : 'c', flags & CC_V_BIT ? 'V' : 'v');
+ printf (" IRQs %s FIQs %s Mode %s%s\n",
+ interrupts_enabled (regs) ? "on" : "off",
+ fast_interrupts_enabled (regs) ? "on" : "off",
+ processor_modes[processor_mode (regs)],
+ thumb_mode (regs) ? " (T)" : "");
+}
+
+void do_undefined_instruction (struct pt_regs *pt_regs)
+{
+ printf ("undefined instruction\n");
+ show_regs (pt_regs);
+ bad_mode ();
+}
+
+void do_software_interrupt (struct pt_regs *pt_regs)
+{
+ printf ("software interrupt\n");
+ show_regs (pt_regs);
+ bad_mode ();
+}
+
+void do_prefetch_abort (struct pt_regs *pt_regs)
+{
+ printf ("prefetch abort\n");
+ show_regs (pt_regs);
+ bad_mode ();
+}
+
+void do_data_abort (struct pt_regs *pt_regs)
+{
+ printf ("data abort\n");
+ show_regs (pt_regs);
+ bad_mode ();
+}
+
+void do_not_used (struct pt_regs *pt_regs)
+{
+ printf ("not used\n");
+ show_regs (pt_regs);
+ bad_mode ();
+}
+
+void do_fiq (struct pt_regs *pt_regs)
+{
+ printf ("fast interrupt request\n");
+ show_regs (pt_regs);
+ bad_mode ();
+}
+
+void do_irq (struct pt_regs *pt_regs)
+{
+ printf ("interrupt request\n");
+ show_regs (pt_regs);
+ bad_mode ();
+}
+
+#if defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_CINTEGRATOR)
+/* Use the IntegratorCP function from board/integratorcp.c */
+#else
+
+static ulong timestamp;
+static ulong lastinc;
+
+/* nothing really to do with interrupts, just starts up a counter. */
+int interrupt_init (void)
+{
+ int32_t val;
+
+ /* Start the counter ticking up */
+ *((int32_t *) (CFG_TIMERBASE + TLDR)) = TIMER_LOAD_VAL; /* reload value on overflow*/
+ val = (CFG_PVT << 2) | BIT5 | BIT1 | BIT0; /* mask to enable timer*/
+ *((int32_t *) (CFG_TIMERBASE + TCLR)) = val; /* start timer */
+
+ reset_timer_masked(); /* init the timestamp and lastinc value */
+
+ return(0);
+}
+/*
+ * timer without interrupts
+ */
+void reset_timer (void)
+{
+ reset_timer_masked ();
+}
+
+ulong get_timer (ulong base)
+{
+ return get_timer_masked () - base;
+}
+
+void set_timer (ulong t)
+{
+ timestamp = t;
+}
+
+/* delay x useconds AND perserve advance timstamp value */
+void udelay (unsigned long usec)
+{
+ ulong tmo, tmp;
+
+ if (usec >= 1000) { /* if "big" number, spread normalization to seconds */
+ tmo = usec / 1000; /* start to normalize for usec to ticks per sec */
+ tmo *= CFG_HZ; /* find number of "ticks" to wait to achieve target */
+ tmo /= 1000; /* finish normalize. */
+ } else { /* else small number, don't kill it prior to HZ multiply */
+ tmo = usec * CFG_HZ;
+ tmo /= (1000*1000);
+ }
+
+ tmp = get_timer (0); /* get current timestamp */
+ if ( (tmo + tmp + 1) < tmp )/* if setting this forward will roll time stamp */
+ reset_timer_masked (); /* reset "advancing" timestamp to 0, set lastinc value */
+ else
+ tmo += tmp; /* else, set advancing stamp wake up time */
+ while (get_timer_masked () < tmo)/* loop till event */
+ /*NOP*/;
+}
+
+void reset_timer_masked (void)
+{
+ /* reset time */
+ lastinc = READ_TIMER; /* capture current incrementer value time */
+ timestamp = 0; /* start "advancing" time stamp from 0 */
+}
+
+ulong get_timer_masked (void)
+{
+ ulong now = READ_TIMER; /* current tick value */
+
+ if (now >= lastinc) /* normal mode (non roll) */
+ timestamp += (now - lastinc); /* move stamp fordward with absoulte diff ticks */
+ else /* we have rollover of incrementer */
+ timestamp += (0xFFFFFFFF - lastinc) + now;
+ lastinc = now;
+ return timestamp;
+}
+
+/* waits specified delay value and resets timestamp */
+void udelay_masked (unsigned long usec)
+{
+ ulong tmo;
+ ulong endtime;
+ signed long diff;
+
+ if (usec >= 1000) { /* if "big" number, spread normalization to seconds */
+ tmo = usec / 1000; /* start to normalize for usec to ticks per sec */
+ tmo *= CFG_HZ; /* find number of "ticks" to wait to achieve target */
+ tmo /= 1000; /* finish normalize. */
+ } else { /* else small number, don't kill it prior to HZ multiply */
+ tmo = usec * CFG_HZ;
+ tmo /= (1000*1000);
+ }
+ endtime = get_timer_masked () + tmo;
+
+ do {
+ ulong now = get_timer_masked ();
+ diff = endtime - now;
+ } while (diff >= 0);
+}
+
+/*
+ * This function is derived from PowerPC code (read timebase as long long).
+ * On ARM it just returns the timer value.
+ */
+unsigned long long get_ticks(void)
+{
+ return get_timer(0);
+}
+/*
+ * This function is derived from PowerPC code (timebase clock frequency).
+ * On ARM it returns the number of timer ticks per second.
+ */
+ulong get_tbclk (void)
+{
+ ulong tbclk;
+ tbclk = CFG_HZ;
+ return tbclk;
+}
+#endif /* !Integrator/CP */
diff --git a/cpu/omap3/start.S b/cpu/omap3/start.S
new file mode 100644
index 0000000000..5137a04b58
--- /dev/null
+++ b/cpu/omap3/start.S
@@ -0,0 +1,511 @@
+/*
+ * armboot - Startup Code for OMAP3430/ARM Cortex CPU-core
+ *
+ * Copyright (c) 2004 Texas Instruments <r-woodruff2@ti.com>
+ *
+ * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
+ * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
+ * Copyright (c) 2002 Gary Jennejohn <gj@denx.de>
+ * Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
+ * Copyright (c) 2003 Kshitij <kshitij@ti.com>
+ * Copyright (c) 2006 Syed Mohammed Khasim <x0khasim@ti.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <config.h>
+#include <version.h>
+#if !defined(CONFIG_INTEGRATOR) && ! defined(CONFIG_ARCH_CINTEGRATOR)
+#include <asm/arch/cpu.h>
+#endif
+.globl _start
+_start: b reset
+ ldr pc, _undefined_instruction
+ ldr pc, _software_interrupt
+ ldr pc, _prefetch_abort
+ ldr pc, _data_abort
+ ldr pc, _not_used
+ ldr pc, _irq
+ ldr pc, _fiq
+
+_undefined_instruction: .word undefined_instruction
+_software_interrupt: .word software_interrupt
+_prefetch_abort: .word prefetch_abort
+_data_abort: .word data_abort
+_not_used: .word not_used
+_irq: .word irq
+_fiq: .word fiq
+_pad: .word 0x12345678 /* now 16*4=64 */
+.global _end_vect
+_end_vect:
+
+ .balignl 16,0xdeadbeef
+/*
+ *************************************************************************
+ *
+ * Startup Code (reset vector)
+ *
+ * do important init only if we don't start from memory!
+ * setup Memory and board specific bits prior to relocation.
+ * relocate armboot to ram
+ * setup stack
+ *
+ *************************************************************************
+ */
+
+_TEXT_BASE:
+ .word TEXT_BASE
+
+.globl _armboot_start
+_armboot_start:
+ .word _start
+
+/*
+ * These are defined in the board-specific linker script.
+ */
+.globl _bss_start
+_bss_start:
+ .word __bss_start
+
+.globl _bss_end
+_bss_end:
+ .word _end
+
+#ifdef CONFIG_USE_IRQ
+/* IRQ stack memory (calculated at run-time) */
+.globl IRQ_STACK_START
+IRQ_STACK_START:
+ .word 0x0badc0de
+
+/* IRQ stack memory (calculated at run-time) */
+.globl FIQ_STACK_START
+FIQ_STACK_START:
+ .word 0x0badc0de
+#endif
+
+/*
+ * the actual reset code
+ */
+
+reset:
+ /*
+ * set the cpu to SVC32 mode
+ */
+ mrs r0,cpsr
+ bic r0,r0,#0x1f
+ orr r0,r0,#0xd3
+ msr cpsr,r0
+
+#if (CONFIG_OMAP34XX)
+ /* Copy vectors to mask ROM indirect addr */
+ adr r0, _start /* r0 <- current position of code */
+ add r0, r0, #4 /* skip reset vector */
+ mov r2, #64 /* r2 <- size to copy */
+ add r2, r0, r2 /* r2 <- source end address */
+ mov r1, #SRAM_OFFSET0 /* build vect addr */
+ mov r3, #SRAM_OFFSET1
+ add r1, r1, r3
+ mov r3, #SRAM_OFFSET2
+ add r1, r1, r3
+next:
+ ldmia r0!, {r3-r10} /* copy from source address [r0] */
+ stmia r1!, {r3-r10} /* copy to target address [r1] */
+ cmp r0, r2 /* until source end address [r2] */
+ bne next /* loop until equal */
+#if !defined(CFG_NAND_BOOT) && !defined(CFG_ONENAND_BOOT)
+ /* No need to copy/exec the clock code - DPLL adjust already done
+ * in NAND/oneNAND Boot.
+ */
+ bl cpy_clk_code /* put dpll adjust code behind vectors */
+#endif /* NAND Boot */
+#endif /* 24xx */
+ /* the mask ROM code should have PLL and others stable */
+#ifndef CONFIG_SKIP_LOWLEVEL_INIT
+ bl cpu_init_crit
+#endif
+
+#ifndef CONFIG_SKIP_RELOCATE_UBOOT
+relocate: /* relocate U-Boot to RAM */
+ adr r0, _start /* r0 <- current position of code */
+ ldr r1, _TEXT_BASE /* test if we run from flash or RAM */
+ cmp r0, r1 /* don't reloc during debug */
+ beq stack_setup
+
+ ldr r2, _armboot_start
+ ldr r3, _bss_start
+ sub r2, r3, r2 /* r2 <- size of armboot */
+ add r2, r0, r2 /* r2 <- source end address */
+
+copy_loop: /* copy 32 bytes at a time */
+ ldmia r0!, {r3-r10} /* copy from source address [r0] */
+ stmia r1!, {r3-r10} /* copy to target address [r1] */
+ cmp r0, r2 /* until source end addreee [r2] */
+ ble copy_loop
+#endif /* CONFIG_SKIP_RELOCATE_UBOOT */
+
+ /* Set up the stack */
+stack_setup:
+ ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */
+ sub r0, r0, #CFG_MALLOC_LEN /* malloc area */
+ sub r0, r0, #CFG_GBL_DATA_SIZE /* bdinfo */
+#ifdef CONFIG_USE_IRQ
+ sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
+#endif
+ sub sp, r0, #12 /* leave 3 words for abort-stack */
+ and sp, sp, #~7 /* 8 byte alinged for (ldr/str)d */
+
+ /* Clear BSS (if any). Is below tx (watch load addr - need space) */
+clear_bss:
+ ldr r0, _bss_start /* find start of bss segment */
+ ldr r1, _bss_end /* stop here */
+ mov r2, #0x00000000 /* clear value */
+clbss_l:
+ str r2, [r0] /* clear BSS location */
+ cmp r0, r1 /* are we at the end yet */
+ add r0, r0, #4 /* increment clear index pointer */
+ bne clbss_l /* keep clearing till at end */
+
+ ldr pc, _start_armboot /* jump to C code */
+
+_start_armboot: .word start_armboot
+
+
+/*
+ *************************************************************************
+ *
+ * CPU_init_critical registers
+ *
+ * setup important registers
+ * setup memory timing
+ *
+ *************************************************************************
+ */
+cpu_init_crit:
+ /*
+ * Invalidate L1 I/D
+ */
+ mov r0, #0 /* set up for MCR */
+ mcr p15, 0, r0, c8, c7, 0 /* invalidate TLBs */
+ mcr p15, 0, r0, c7, c5, 0 /* invalidate icache */
+
+ /*
+ * disable MMU stuff and caches
+ */
+ mrc p15, 0, r0, c1, c0, 0
+ bic r0, r0, #0x00002000 @ clear bits 13 (--V-)
+ bic r0, r0, #0x00000007 @ clear bits 2:0 (-CAM)
+ orr r0, r0, #0x00000002 @ set bit 1 (--A-) Align
+ orr r0, r0, #0x00000800 @ set bit 12 (Z---) BTB
+ mcr p15, 0, r0, c1, c0, 0
+
+ /*
+ * Jump to board specific initialization... The Mask ROM will have already initialized
+ * basic memory. Go here to bump up clock rate and handle wake up conditions.
+ */
+ mov ip, lr /* persevere link reg across call */
+ bl lowlevel_init /* go setup pll,mux,memory */
+ mov lr, ip /* restore link */
+ mov pc, lr /* back to my caller */
+/*
+ *************************************************************************
+ *
+ * Interrupt handling
+ *
+ *************************************************************************
+ */
+@
+@ IRQ stack frame.
+@
+#define S_FRAME_SIZE 72
+
+#define S_OLD_R0 68
+#define S_PSR 64
+#define S_PC 60
+#define S_LR 56
+#define S_SP 52
+
+#define S_IP 48
+#define S_FP 44
+#define S_R10 40
+#define S_R9 36
+#define S_R8 32
+#define S_R7 28
+#define S_R6 24
+#define S_R5 20
+#define S_R4 16
+#define S_R3 12
+#define S_R2 8
+#define S_R1 4
+#define S_R0 0
+
+#define MODE_SVC 0x13
+#define I_BIT 0x80
+
+/*
+ * use bad_save_user_regs for abort/prefetch/undef/swi ...
+ * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
+ */
+
+ .macro bad_save_user_regs
+ sub sp, sp, #S_FRAME_SIZE @ carve out a frame on current user stack
+ stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12
+
+ ldr r2, _armboot_start
+ sub r2, r2, #(CFG_MALLOC_LEN)
+ sub r2, r2, #(CFG_GBL_DATA_SIZE+8) @ set base 2 words into abort stack
+ ldmia r2, {r2 - r3} @ get values for "aborted" pc and cpsr (into parm regs)
+ add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack
+
+ add r5, sp, #S_SP
+ mov r1, lr
+ stmia r5, {r0 - r3} @ save sp_SVC, lr_SVC, pc, cpsr
+ mov r0, sp @ save current stack into r0 (param register)
+ .endm
+
+ .macro irq_save_user_regs
+ sub sp, sp, #S_FRAME_SIZE
+ stmia sp, {r0 - r12} @ Calling r0-r12
+ add r8, sp, #S_PC @ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good.
+ stmdb r8, {sp, lr}^ @ Calling SP, LR
+ str lr, [r8, #0] @ Save calling PC
+ mrs r6, spsr
+ str r6, [r8, #4] @ Save CPSR
+ str r0, [r8, #8] @ Save OLD_R0
+ mov r0, sp
+ .endm
+
+ .macro irq_restore_user_regs
+ ldmia sp, {r0 - lr}^ @ Calling r0 - lr
+ mov r0, r0
+ ldr lr, [sp, #S_PC] @ Get PC
+ add sp, sp, #S_FRAME_SIZE
+ subs pc, lr, #4 @ return & move spsr_svc into cpsr
+ .endm
+
+ .macro get_bad_stack
+ ldr r13, _armboot_start @ setup our mode stack (enter in banked mode)
+ sub r13, r13, #(CFG_MALLOC_LEN) @ move past malloc pool
+ sub r13, r13, #(CFG_GBL_DATA_SIZE+8) @ move to reserved a couple spots for abort stack
+
+ str lr, [r13] @ save caller lr in position 0 of saved stack
+ mrs lr, spsr @ get the spsr
+ str lr, [r13, #4] @ save spsr in position 1 of saved stack
+
+ mov r13, #MODE_SVC @ prepare SVC-Mode
+ @ msr spsr_c, r13
+ msr spsr, r13 @ switch modes, make sure moves will execute
+ mov lr, pc @ capture return pc
+ movs pc, lr @ jump to next instruction & switch modes.
+ .endm
+
+ .macro get_bad_stack_swi
+ sub r13, r13, #4 @ space on current stack for scratch reg.
+ str r0, [r13] @ save R0's value.
+ ldr r0, _armboot_start @ get data regions start
+ sub r0, r0, #(CFG_MALLOC_LEN) @ move past malloc pool
+ sub r0, r0, #(CFG_GBL_DATA_SIZE+8) @ move past gbl and a couple spots for abort stack
+ str lr, [r0] @ save caller lr in position 0 of saved stack
+ mrs r0, spsr @ get the spsr
+ str lr, [r0, #4] @ save spsr in position 1 of saved stack
+ ldr r0, [r13] @ restore r0
+ add r13, r13, #4 @ pop stack entry
+ .endm
+
+ .macro get_irq_stack @ setup IRQ stack
+ ldr sp, IRQ_STACK_START
+ .endm
+
+ .macro get_fiq_stack @ setup FIQ stack
+ ldr sp, FIQ_STACK_START
+ .endm
+
+/*
+ * exception handlers
+ */
+ .align 5
+undefined_instruction:
+ get_bad_stack
+ bad_save_user_regs
+ bl do_undefined_instruction
+
+ .align 5
+software_interrupt:
+ get_bad_stack_swi
+ bad_save_user_regs
+ bl do_software_interrupt
+
+ .align 5
+prefetch_abort:
+ get_bad_stack
+ bad_save_user_regs
+ bl do_prefetch_abort
+
+ .align 5
+data_abort:
+ get_bad_stack
+ bad_save_user_regs
+ bl do_data_abort
+
+ .align 5
+not_used:
+ get_bad_stack
+ bad_save_user_regs
+ bl do_not_used
+
+#ifdef CONFIG_USE_IRQ
+
+ .align 5
+irq:
+ get_irq_stack
+ irq_save_user_regs
+ bl do_irq
+ irq_restore_user_regs
+
+ .align 5
+fiq:
+ get_fiq_stack
+ /* someone ought to write a more effiction fiq_save_user_regs */
+ irq_save_user_regs
+ bl do_fiq
+ irq_restore_user_regs
+
+#else
+
+ .align 5
+irq:
+ get_bad_stack
+ bad_save_user_regs
+ bl do_irq
+
+ .align 5
+fiq:
+ get_bad_stack
+ bad_save_user_regs
+ bl do_fiq
+
+#endif
+
+#if (CONFIG_OMAP34XX)
+/* Service ID from Primary Protected Application */
+#define PPA_L2_INVALIDATE 40
+
+l2_inv_api_params:
+ .word 0x1, 0x0
+#endif
+
+ .align 5
+.global arm_cache_flush
+arm_cache_flush:
+ mcr p15, 0, r1, c7, c5, 0 @ invalidate I cache
+ mov pc, lr @ back to caller
+
+/*
+ * v7_flush_dcache_all()
+ *
+ * Flush the whole D-cache.
+ *
+ * Corrupted registers: r0-r5, r7, r9-r11
+ *
+ * - mm - mm_struct describing address space
+ */
+ .align 5
+.global v7_flush_dcache_all
+v7_flush_dcache_all:
+ stmfd r13!, {r0-r12, r14}
+
+#if (CONFIG_OMAP34XX)
+ cmp r0, #0x3 @ check if the device is GP
+ beq gp_l2_inv
+ cmp r1, #1 @ or if it is EMU/HS device
+ beq emu_ext_boot_l2_inv @ in external boot mode
+
+emu_internal_boot_l2_inv:
+ mov r0, #PPA_L2_INVALIDATE @ set service ID for PPA
+ mov r12, r0 @ copy secure Service ID in r12
+ mov r1, #0 @ set task id for ROM code in r1
+ mov r2, #7 @ set some flags in r2, r6
+ mov r6, #0xff
+ adr r3, l2_inv_api_params @ r3 points to dummy parameters
+ mcr p15, 0, r0, c7, c5, 4 @ data write barrier
+ mcr p15, 0, r0, c7, c10, 5 @ data memory barrier
+ .word 0xE1600071 @ call SMI monitor (smi #1)
+ b finished_inval
+
+gp_l2_inv:
+ mov r12, #0x1 @ set up to invalidate L2
+ .word 0x01600070 @ call SMI monitor (smieq #0)
+ b finished_inval @ if GP device, inval done above
+
+emu_ext_boot_l2_inv:
+#endif
+
+ mrc p15, 1, r0, c0, c0, 1 @ read clidr
+ ands r3, r0, #0x7000000 @ extract loc from clidr
+ mov r3, r3, lsr #23 @ left align loc bit field
+ beq finished_inval @ if loc is 0, then no need to clean
+ mov r10, #0 @ start clean at cache level 0
+inval_loop1:
+ add r2, r10, r10, lsr #1 @ work out 3x current cache level
+ mov r1, r0, lsr r2 @ extract cache type bits from clidr
+ and r1, r1, #7 @ mask of the bits for current cache only
+ cmp r1, #2 @ see what cache we have at this level
+ blt skip_inval @ skip if no cache, or just i-cache
+ mcr p15, 2, r10, c0, c0, 0 @ select current cache level in cssr
+ isb @ isb to sych the new cssr&csidr
+ mrc p15, 1, r1, c0, c0, 0 @ read the new csidr
+ and r2, r1, #7 @ extract the length of the cache lines
+ add r2, r2, #4 @ add 4 (line length offset)
+ ldr r4, =0x3ff
+ ands r4, r4, r1, lsr #3 @ find maximum number on the way size
+ clz r5, r4 @ find bit position of way size increment
+ ldr r7, =0x7fff
+ ands r7, r7, r1, lsr #13 @ extract max number of the index size
+inval_loop2:
+ mov r9, r4 @ create working copy of max way size
+inval_loop3:
+ orr r11, r10, r9, lsl r5 @ factor way and cache number into r11
+ orr r11, r11, r7, lsl r2 @ factor index number into r11
+ mcr p15, 0, r11, c7, c6, 2 @ invalidate by set/way
+ subs r9, r9, #1 @ decrement the way
+ bge inval_loop3
+ subs r7, r7, #1 @ decrement the index
+ bge inval_loop2
+skip_inval:
+ add r10, r10, #2 @ increment cache number
+ cmp r3, r10
+ bgt inval_loop1
+finished_inval:
+ mov r10, #0 @ swith back to cache level 0
+ mcr p15, 2, r10, c0, c0, 0 @ select current cache level in cssr
+ isb
+
+ ldmfd r13!, {r0-r12, pc}
+
+
+ .align 5
+.global reset_cpu
+reset_cpu:
+ ldr r1, rstctl /* get addr for global reset reg */
+ mov r3, #0x2 /* full reset pll+mpu */
+ str r3, [r1] /* force reset */
+ mov r0, r0
+_loop_forever:
+ b _loop_forever
+rstctl:
+ .word PRM_RSTCTRL
diff --git a/cpu/ppc4xx/405gp_pci.c b/cpu/ppc4xx/405gp_pci.c
index 64431ab13a..cf5eccb01f 100644
--- a/cpu/ppc4xx/405gp_pci.c
+++ b/cpu/ppc4xx/405gp_pci.c
@@ -77,10 +77,16 @@
#include <asm/processor.h>
#include <pci.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#if defined(CONFIG_405GP) || defined(CONFIG_405EP)
#ifdef CONFIG_PCI
+#if defined(CONFIG_PMC405)
+ushort pmc405_pci_subsys_deviceid(void);
+#endif
+
/*#define DEBUG*/
/*-----------------------------------------------------------------------------+
@@ -88,21 +94,16 @@
*-----------------------------------------------------------------------------*/
void pci_405gp_init(struct pci_controller *hose)
{
- DECLARE_GLOBAL_DATA_PTR;
-
int i, reg_num = 0;
bd_t *bd = gd->bd;
unsigned short temp_short;
unsigned long ptmpcila[2] = {CFG_PCI_PTM1PCI, CFG_PCI_PTM2PCI};
#if defined(CONFIG_CPCI405) || defined(CONFIG_PMC405)
- unsigned long ptmla[2] = {bd->bi_memstart, bd->bi_flashstart};
- unsigned long ptmms[2] = {~(bd->bi_memsize - 1) | 1, ~(bd->bi_flashsize - 1) | 1};
char *ptmla_str, *ptmms_str;
-#else
+#endif
unsigned long ptmla[2] = {CFG_PCI_PTM1LA, CFG_PCI_PTM2LA};
unsigned long ptmms[2] = {CFG_PCI_PTM1MS, CFG_PCI_PTM2MS};
-#endif
#if defined(CONFIG_PIP405) || defined (CONFIG_MIP405)
unsigned long pmmla[3] = {0x80000000, 0xA0000000, 0};
unsigned long pmmma[3] = {0xE0000001, 0xE0000001, 0};
@@ -372,7 +373,7 @@ void pci_405gp_setup_vga(struct pci_controller *hose, pci_dev_t dev,
{
unsigned int cmdstat = 0;
- pciauto_setup_device(hose, dev, 6, hose->pci_mem, hose->pci_io);
+ pciauto_setup_device(hose, dev, 6, hose->pci_mem, hose->pci_prefetch, hose->pci_io);
/* always enable io space on vga boards */
pci_hose_read_config_dword(hose, dev, PCI_COMMAND, &cmdstat);
@@ -437,7 +438,7 @@ void pci_440_init (struct pci_controller *hose)
* The PCI initialization sequence enable bit must be set ... if not abort
* pci setup since updating the bit requires chip reset.
*--------------------------------------------------------------------------*/
-#if defined(CONFIG_440GX) || defined(CONFIG_440SP)
+#if defined(CONFIG_440GX) || defined(CONFIG_440SP) || defined(CONFIG_440SPE)
unsigned long strap;
mfsdr(sdr_sdstp1,strap);
@@ -464,17 +465,30 @@ void pci_440_init (struct pci_controller *hose)
hose->first_busno = 0;
hose->last_busno = 0xff;
+ /* PCI I/O space */
pci_set_region(hose->regions + reg_num++,
0x00000000,
PCIX0_IOBASE,
0x10000,
PCI_REGION_IO);
+ /* PCI memory space */
pci_set_region(hose->regions + reg_num++,
CFG_PCI_TARGBASE,
CFG_PCI_MEMBASE,
0x10000000,
PCI_REGION_MEM );
+
+#if defined(CONFIG_PCI_SYS_MEM_BUS) && defined(CONFIG_PCI_SYS_MEM_PHYS) && \
+ defined(CONFIG_PCI_SYS_MEM_SIZE)
+ /* System memory space */
+ pci_set_region(hose->regions + reg_num++,
+ CONFIG_PCI_SYS_MEM_BUS,
+ CONFIG_PCI_SYS_MEM_PHYS,
+ CONFIG_PCI_SYS_MEM_SIZE,
+ PCI_REGION_MEM | PCI_REGION_MEMORY );
+#endif
+
hose->region_count = reg_num;
pci_setup_indirect(hose, PCIX0_CFGADR, PCIX0_CFGDATA);
@@ -501,7 +515,7 @@ void pci_440_init (struct pci_controller *hose)
out16r( PCIX0_CLS, 0x00060000 ); /* Bridge, host bridge */
#endif
-#if defined(CONFIG_440GX)
+#if defined(CONFIG_440GX) || defined(CONFIG_440SPE)
out32r( PCIX0_BRDGOPT1, 0x04000060 ); /* PLB Rq pri highest */
out32r( PCIX0_BRDGOPT2, in32(PCIX0_BRDGOPT2) | 0x83 ); /* Enable host config, clear Timeout, ensure int src1 */
#elif defined(PCIX0_BRDGOPT1)
@@ -519,8 +533,13 @@ void pci_440_init (struct pci_controller *hose)
out32r( PCIX0_POM0SA, 0 ); /* disable */
out32r( PCIX0_POM1SA, 0 ); /* disable */
out32r( PCIX0_POM2SA, 0 ); /* disable */
+#if defined(CONFIG_440SPE)
+ out32r( PCIX0_POM0LAL, 0x10000000 );
+ out32r( PCIX0_POM0LAH, 0x0000000c );
+#else
out32r( PCIX0_POM0LAL, 0x00000000 );
out32r( PCIX0_POM0LAH, 0x00000003 );
+#endif
out32r( PCIX0_POM0PCIAL, CFG_PCI_MEMBASE );
out32r( PCIX0_POM0PCIAH, 0x00000000 );
out32r( PCIX0_POM0SA, 0xf0000001 ); /* 256MB, enabled */
diff --git a/cpu/ppc4xx/4xx_enet.c b/cpu/ppc4xx/4xx_enet.c
index 86dc2d066e..fab65aff78 100644
--- a/cpu/ppc4xx/4xx_enet.c
+++ b/cpu/ppc4xx/4xx_enet.c
@@ -181,6 +181,9 @@ static void ppc_4xx_eth_halt (struct eth_device *dev)
{
EMAC_4XX_HW_PST hw_p = dev->priv;
uint32_t failsafe = 10000;
+#if defined(CONFIG_440SPE)
+ unsigned long mfr;
+#endif
out32 (EMAC_IER + hw_p->hw_addr, 0x00000000); /* disable emac interrupts */
@@ -202,8 +205,23 @@ static void ppc_4xx_eth_halt (struct eth_device *dev)
}
/* EMAC RESET */
+#if defined(CONFIG_440SPE)
+ /* provide clocks for EMAC internal loopback */
+ mfsdr (sdr_mfr, mfr);
+ mfr |= 0x08000000;
+ mtsdr(sdr_mfr, mfr);
+#endif
+
out32 (EMAC_M0 + hw_p->hw_addr, EMAC_M0_SRST);
+#if defined(CONFIG_440SPE)
+ /* remove clocks for EMAC internal loopback */
+ mfsdr (sdr_mfr, mfr);
+ mfr &= ~0x08000000;
+ mtsdr(sdr_mfr, mfr);
+#endif
+
+
#ifndef CONFIG_NETCONSOLE
hw_p->print_speed = 1; /* print speed message again next time */
#endif
@@ -301,7 +319,7 @@ int ppc_4xx_eth_setup_bridge(int devnum, bd_t * bis)
return ((int)pfc1);
}
-#endif
+#endif /* CONFIG_440_GX */
static int ppc_4xx_eth_init (struct eth_device *dev, bd_t * bis)
{
@@ -314,12 +332,16 @@ static int ppc_4xx_eth_init (struct eth_device *dev, bd_t * bis)
unsigned mode_reg;
unsigned short devnum;
unsigned short reg_short;
-#if defined(CONFIG_440GX) || defined(CONFIG_440SP)
+#if defined(CONFIG_440GX) || defined(CONFIG_440SP) || defined(CONFIG_440SPE)
sys_info_t sysinfo;
-#if defined(CONFIG_440GX)
+#if defined(CONFIG_440GX) || defined(CONFIG_440SPE)
int ethgroup = -1;
#endif
#endif
+#if defined(CONFIG_440SPE)
+ unsigned long mfr;
+#endif
+
EMAC_4XX_HW_PST hw_p = dev->priv;
@@ -330,7 +352,7 @@ static int ppc_4xx_eth_init (struct eth_device *dev, bd_t * bis)
return -1;
}
-#if defined(CONFIG_440GX) || defined(CONFIG_440SP)
+#if defined(CONFIG_440GX) || defined(CONFIG_440SP) || defined(CONFIG_440SPE)
/* Need to get the OPB frequency so we can access the PHY */
get_sys_info (&sysinfo);
#endif
@@ -360,6 +382,7 @@ static int ppc_4xx_eth_init (struct eth_device *dev, bd_t * bis)
hw_p->stats.pkts_tx = 0;
hw_p->stats.pkts_rx = 0;
hw_p->stats.pkts_handled = 0;
+ hw_p->print_speed = 1; /* print speed message again next time */
#endif
hw_p->tx_err_index = 0; /* Transmit Error Index for tx_err_log */
@@ -373,7 +396,7 @@ static int ppc_4xx_eth_init (struct eth_device *dev, bd_t * bis)
hw_p->tx_i_index = 0; /* Transmit Interrupt Queue Index */
hw_p->tx_u_index = 0; /* Transmit User Queue Index */
-#if defined(CONFIG_440) && !defined(CONFIG_440SP)
+#if defined(CONFIG_440) && !defined(CONFIG_440SP) && !defined(CONFIG_440SPE)
/* set RMII mode */
/* NOTE: 440GX spec states that mode is mutually exclusive */
/* NOTE: Therefore, disable all other EMACS, since we handle */
@@ -406,6 +429,12 @@ static int ppc_4xx_eth_init (struct eth_device *dev, bd_t * bis)
__asm__ volatile ("eieio");
/* reset emac so we have access to the phy */
+#if defined(CONFIG_440SPE)
+ /* provide clocks for EMAC internal loopback */
+ mfsdr (sdr_mfr, mfr);
+ mfr |= 0x08000000;
+ mtsdr(sdr_mfr, mfr);
+#endif
out32 (EMAC_M0 + hw_p->hw_addr, EMAC_M0_SRST);
__asm__ volatile ("eieio");
@@ -416,7 +445,14 @@ static int ppc_4xx_eth_init (struct eth_device *dev, bd_t * bis)
failsafe--;
}
-#if defined(CONFIG_440GX) || defined(CONFIG_440SP)
+#if defined(CONFIG_440SPE)
+ /* remove clocks for EMAC internal loopback */
+ mfsdr (sdr_mfr, mfr);
+ mfr &= ~0x08000000;
+ mtsdr(sdr_mfr, mfr);
+#endif
+
+#if defined(CONFIG_440GX) || defined(CONFIG_440SP) || defined(CONFIG_440SPE)
/* Whack the M1 register */
mode_reg = 0x0;
mode_reg &= ~0x00000038;
@@ -468,7 +504,7 @@ static int ppc_4xx_eth_init (struct eth_device *dev, bd_t * bis)
if (hw_p->first_init == 0) {
miiphy_reset (dev->name, reg);
-#if defined(CONFIG_440GX) || defined(CONFIG_440SP)
+#if defined(CONFIG_440GX) || defined(CONFIG_440SP) || defined(CONFIG_440SPE)
#if defined(CONFIG_CIS8201_PHY)
/*
* Cicada 8201 PHY needs to have an extended register whacked
@@ -544,7 +580,7 @@ static int ppc_4xx_eth_init (struct eth_device *dev, bd_t * bis)
(int) speed, (duplex == HALF) ? "HALF" : "FULL");
}
-#if defined(CONFIG_440) && !defined(CONFIG_440SP)
+#if defined(CONFIG_440) && !defined(CONFIG_440SP) && !defined(CONFIG_440SPE)
#if defined(CONFIG_440EP) || defined(CONFIG_440GR)
mfsdr(sdr_mfr, reg);
if (speed == 100) {
@@ -575,7 +611,7 @@ static int ppc_4xx_eth_init (struct eth_device *dev, bd_t * bis)
#endif /* defined(CONFIG_440) && !defined(CONFIG_440SP) */
/* set the Mal configuration reg */
-#if defined(CONFIG_440GX) || defined(CONFIG_440SP)
+#if defined(CONFIG_440GX) || defined(CONFIG_440SP) || defined(CONFIG_440SPE)
mtdcr (malmcr, MAL_CR_PLBB | MAL_CR_OPBBL | MAL_CR_LEA |
MAL_CR_PLBLT_DEFAULT | MAL_CR_EOPIE | 0x00330000);
#else
@@ -759,8 +795,7 @@ static int ppc_4xx_eth_init (struct eth_device *dev, bd_t * bis)
/* set speed */
if (speed == _1000BASET) {
-#if defined(CONFIG_440SP)
-#define SDR0_PFC1_EM_1000 0x00200000
+#if defined(CONFIG_440SP) || defined(CONFIG_440SPE)
unsigned long pfc1;
mfsdr (sdr_pfc1, pfc1);
pfc1 |= SDR0_PFC1_EM_1000;
@@ -787,7 +822,7 @@ static int ppc_4xx_eth_init (struct eth_device *dev, bd_t * bis)
/* set receive low/high water mark register */
#if defined(CONFIG_440)
- /* 440GP has a 64 byte burst length */
+ /* 440s has a 64 byte burst length */
out32 (EMAC_RX_HI_LO_WMARK + hw_p->hw_addr, 0x80009000);
#else
/* 405s have a 16 byte burst length */
@@ -895,7 +930,7 @@ static int ppc_4xx_eth_send (struct eth_device *dev, volatile void *ptr,
#if defined (CONFIG_440)
-#if defined(CONFIG_440SP)
+#if defined(CONFIG_440SP) || defined(CONFIG_440SPE)
/*
* Hack: On 440SP all enet irq sources are located on UIC1
* Needs some cleanup. --sr
@@ -1367,21 +1402,20 @@ int ppc_4xx_eth_initialize (bd_t * bis)
#endif
/* set phy num and mode */
bis->bi_phynum[0] = CONFIG_PHY_ADDR;
+ bis->bi_phymode[0] = 0;
+
#if defined(CONFIG_PHY1_ADDR)
bis->bi_phynum[1] = CONFIG_PHY1_ADDR;
+ bis->bi_phymode[1] = 0;
#endif
#if defined(CONFIG_440GX)
bis->bi_phynum[2] = CONFIG_PHY2_ADDR;
bis->bi_phynum[3] = CONFIG_PHY3_ADDR;
- bis->bi_phymode[0] = 0;
- bis->bi_phymode[1] = 0;
bis->bi_phymode[2] = 2;
bis->bi_phymode[3] = 2;
-#if defined (CONFIG_440GX)
ppc_4xx_eth_setup_bridge(0, bis);
#endif
-#endif
for (eth_num = 0; eth_num < LAST_EMAC_NUM; eth_num++) {
@@ -1478,9 +1512,15 @@ int ppc_4xx_eth_initialize (bd_t * bis)
if (0 == virgin) {
/* set the MAL IER ??? names may change with new spec ??? */
+#if defined(CONFIG_440SPE)
+ mal_ier =
+ MAL_IER_PT | MAL_IER_PRE | MAL_IER_PWE |
+ MAL_IER_DE | MAL_IER_OTE | MAL_IER_OE | MAL_IER_PE ;
+#else
mal_ier =
MAL_IER_DE | MAL_IER_NE | MAL_IER_TE |
MAL_IER_OPBE | MAL_IER_PLBE;
+#endif
mtdcr (malesr, 0xffffffff); /* clear pending interrupts */
mtdcr (maltxdeir, 0xffffffff); /* clear pending interrupts */
mtdcr (malrxdeir, 0xffffffff); /* clear pending interrupts */
@@ -1510,11 +1550,13 @@ int ppc_4xx_eth_initialize (bd_t * bis)
#else
emac0_dev = dev;
#endif
+
+#if defined(CONFIG_NET_MULTI)
#if defined(CONFIG_MII) || (CONFIG_COMMANDS & CFG_CMD_MII)
miiphy_register (dev->name,
emac4xx_miiphy_read, emac4xx_miiphy_write);
#endif
-
+#endif
} /* end for each supported device */
return (1);
}
diff --git a/cpu/ppc4xx/cpu.c b/cpu/ppc4xx/cpu.c
index a26533c59c..71303bcc49 100644
--- a/cpu/ppc4xx/cpu.c
+++ b/cpu/ppc4xx/cpu.c
@@ -1,5 +1,5 @@
/*
- * (C) Copyright 2000-2003
+ * (C) Copyright 2000-2006
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
@@ -37,6 +37,10 @@
#include <asm/cache.h>
#include <ppc4xx.h>
+#if !defined(CONFIG_405)
+DECLARE_GLOBAL_DATA_PTR;
+#endif
+
#if defined(CONFIG_440)
#define FREQ_EBC (sys_info.freqEPB)
@@ -78,7 +82,9 @@ int pci_arbiter_enabled(void)
return (mfdcr(cpc0_strp1) & CPC0_STRP1_PAE_MASK);
#endif
-#if defined(CONFIG_440GX) || defined(CONFIG_440EP) || defined(CONFIG_440GR) || defined(CONFIG_440SP)
+#if defined(CONFIG_440GX) || defined(CONFIG_440EP) || \
+ defined(CONFIG_440GR) || defined(CONFIG_440SP) || \
+ defined(CONFIG_440SPE)
unsigned long val;
mfsdr(sdr_sdstp1, val);
@@ -87,8 +93,8 @@ int pci_arbiter_enabled(void)
}
#endif
-#if defined(CONFIG_405EP)|| defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
- defined(CONFIG_440GX) || defined(CONFIG_440SP)
+#if defined(CONFIG_405EP) || defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
+ defined(CONFIG_440GX) || defined(CONFIG_440SP) || defined(CONFIG_440SPE)
#define I2C_BOOTROM
@@ -98,7 +104,9 @@ int i2c_bootrom_enabled(void)
return (mfdcr(cpc0_boot) & CPC0_BOOT_SEP);
#endif
-#if defined(CONFIG_440GX) || defined(CONFIG_440EP) || defined(CONFIG_440GR) || defined(CONFIG_440SP)
+#if defined(CONFIG_440GX) || defined(CONFIG_440EP) || \
+ defined(CONFIG_440GR) || defined(CONFIG_440SP) || \
+ defined(CONFIG_440SPE)
unsigned long val;
mfsdr(sdr_sdcs, val);
@@ -116,7 +124,6 @@ static int do_chip_reset(unsigned long sys0, unsigned long sys1);
int checkcpu (void)
{
#if !defined(CONFIG_405) /* not used on Xilinx 405 FPGA implementations */
- DECLARE_GLOBAL_DATA_PTR;
uint pvr = get_pvr();
ulong clock = gd->cpu_clk;
char buf[32];
@@ -220,12 +227,20 @@ int checkcpu (void)
case PVR_440EP_RB: /* 440EP rev B and 440GR rev A have same PVR */
puts("EP Rev. B");
break;
+
+ case PVR_440EP_RC: /* 440EP rev C and 440GR rev B have same PVR */
+ puts("EP Rev. C");
+ break;
#endif /* CONFIG_440EP */
#ifdef CONFIG_440GR
case PVR_440GR_RA: /* 440EP rev B and 440GR rev A have same PVR */
puts("GR Rev. A");
break;
+
+ case PVR_440GR_RB: /* 440EP rev C and 440GR rev B have same PVR */
+ puts("GR Rev. B");
+ break;
#endif /* CONFIG_440GR */
#endif /* CONFIG_440 */
@@ -237,6 +252,14 @@ int checkcpu (void)
puts("SP Rev. B");
break;
+ case PVR_440SPe_RA:
+ puts("SPe Rev. A");
+ break;
+
+ case PVR_440SPe_RB:
+ puts("SPe Rev. B");
+ break;
+
default:
printf (" UNKNOWN (PVR=%08x)", pvr);
break;
diff --git a/cpu/ppc4xx/cpu_init.c b/cpu/ppc4xx/cpu_init.c
index 79cfba3a45..b27567fa4d 100644
--- a/cpu/ppc4xx/cpu_init.c
+++ b/cpu/ppc4xx/cpu_init.c
@@ -1,5 +1,5 @@
/*
- * (C) Copyright 2000
+ * (C) Copyright 2000-2006
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
@@ -27,6 +27,10 @@
#include <asm/processor.h>
#include <ppc4xx.h>
+#if defined(CONFIG_405GP) || defined(CONFIG_405EP)
+DECLARE_GLOBAL_DATA_PTR;
+#endif
+
#define mtebc(reg, data) mtdcr(ebccfga,reg);mtdcr(ebccfgd,data)
@@ -97,6 +101,117 @@
# endif
#endif /* CFG_INIT_DCACHE_CS */
+#if defined(CFG_440_GPIO_TABLE)
+gpio_param_s gpio_tab[GPIO_GROUP_MAX][GPIO_MAX] = CFG_440_GPIO_TABLE;
+
+void set_chip_gpio_configuration(gpio_param_s (*gpio_tab)[GPIO_GROUP_MAX][GPIO_MAX])
+{
+ unsigned char i=0, j=0, reg_offset = 0, gpio_core;
+ unsigned long gpio_reg, gpio_core_add;
+
+ for (gpio_core=0; gpio_core<GPIO_GROUP_MAX; gpio_core++) {
+ j = 0;
+ reg_offset = 0;
+ /* GPIO config of the GPIOs 0 to 31 */
+ for (i=0; i<GPIO_MAX; i++, j++) {
+ if (i == GPIO_MAX/2) {
+ reg_offset = 4;
+ j = i-16;
+ }
+
+ gpio_core_add = (*gpio_tab)[gpio_core][i].add;
+
+ if (((*gpio_tab)[gpio_core][i].in_out == GPIO_IN) ||
+ ((*gpio_tab)[gpio_core][i].in_out == GPIO_BI)) {
+
+ switch ((*gpio_tab)[gpio_core][i].alt_nb) {
+ case GPIO_SEL:
+ break;
+
+ case GPIO_ALT1:
+ gpio_reg = in32(GPIO_IS1(gpio_core_add+reg_offset))
+ & ~(GPIO_MASK >> (j*2));
+ gpio_reg = gpio_reg | (GPIO_IN_SEL >> (j*2));
+ out32(GPIO_IS1(gpio_core_add+reg_offset), gpio_reg);
+ break;
+
+ case GPIO_ALT2:
+ gpio_reg = in32(GPIO_IS2(gpio_core_add+reg_offset))
+ & ~(GPIO_MASK >> (j*2));
+ gpio_reg = gpio_reg | (GPIO_IN_SEL >> (j*2));
+ out32(GPIO_IS2(gpio_core_add+reg_offset), gpio_reg);
+ break;
+
+ case GPIO_ALT3:
+ gpio_reg = in32(GPIO_IS3(gpio_core_add+reg_offset))
+ & ~(GPIO_MASK >> (j*2));
+ gpio_reg = gpio_reg | (GPIO_IN_SEL >> (j*2));
+ out32(GPIO_IS3(gpio_core_add+reg_offset), gpio_reg);
+ break;
+ }
+ }
+
+ if (((*gpio_tab)[gpio_core][i].in_out == GPIO_OUT) ||
+ ((*gpio_tab)[gpio_core][i].in_out == GPIO_BI)) {
+
+ switch ((*gpio_tab)[gpio_core][i].alt_nb) {
+ case GPIO_SEL:
+ if (gpio_core == GPIO0) {
+ gpio_reg = in32(GPIO0_TCR) | (0x80000000 >> (j));
+ out32(GPIO0_TCR, gpio_reg);
+ }
+
+ if (gpio_core == GPIO1) {
+ gpio_reg = in32(GPIO1_TCR) | (0x80000000 >> (j));
+ out32(GPIO1_TCR, gpio_reg);
+ }
+
+ gpio_reg = in32(GPIO_OS(gpio_core_add+reg_offset))
+ & ~(GPIO_MASK >> (j*2));
+ out32(GPIO_OS(gpio_core_add+reg_offset), gpio_reg);
+ gpio_reg = in32(GPIO_TS(gpio_core_add+reg_offset))
+ & ~(GPIO_MASK >> (j*2));
+ out32(GPIO_TS(gpio_core_add+reg_offset), gpio_reg);
+ break;
+
+ case GPIO_ALT1:
+ gpio_reg = in32(GPIO_OS(gpio_core_add+reg_offset))
+ & ~(GPIO_MASK >> (j*2));
+ gpio_reg = gpio_reg | (GPIO_ALT1_SEL >> (j*2));
+ out32(GPIO_OS(gpio_core_add+reg_offset), gpio_reg);
+ gpio_reg = in32(GPIO_TS(gpio_core_add+reg_offset))
+ & ~(GPIO_MASK >> (j*2));
+ gpio_reg = gpio_reg | (GPIO_ALT1_SEL >> (j*2));
+ out32(GPIO_TS(gpio_core_add+reg_offset), gpio_reg);
+ break;
+
+ case GPIO_ALT2:
+ gpio_reg = in32(GPIO_OS(gpio_core_add+reg_offset))
+ & ~(GPIO_MASK >> (j*2));
+ gpio_reg = gpio_reg | (GPIO_ALT2_SEL >> (j*2));
+ out32(GPIO_OS(gpio_core_add+reg_offset), gpio_reg);
+ gpio_reg = in32(GPIO_TS(gpio_core_add+reg_offset))
+ & ~(GPIO_MASK >> (j*2));
+ gpio_reg = gpio_reg | (GPIO_ALT2_SEL >> (j*2));
+ out32(GPIO_TS(gpio_core_add+reg_offset), gpio_reg);
+ break;
+
+ case GPIO_ALT3:
+ gpio_reg = in32(GPIO_OS(gpio_core_add+reg_offset))
+ & ~(GPIO_MASK >> (j*2));
+ gpio_reg = gpio_reg | (GPIO_ALT3_SEL >> (j*2));
+ out32(GPIO_OS(gpio_core_add+reg_offset), gpio_reg);
+ gpio_reg = in32(GPIO_TS(gpio_core_add+reg_offset))
+ & ~(GPIO_MASK >> (j*2));
+ gpio_reg = gpio_reg | (GPIO_ALT3_SEL >> (j*2));
+ out32(GPIO_TS(gpio_core_add+reg_offset), gpio_reg);
+ break;
+ }
+ }
+ }
+ }
+}
+#endif /* CFG_440_GPIO_TABLE */
/*
* Breath some life into the CPU...
@@ -125,10 +240,16 @@ cpu_init_f (void)
mtdcr(cpc0_epctl, CPC0_EPRCSR_E0NFE | CPC0_EPRCSR_E1NFE);
#endif /* CONFIG_405EP */
+#if defined(CFG_440_GPIO_TABLE)
+ set_chip_gpio_configuration(&gpio_tab);
+#endif /* CFG_440_GPIO_TABLE */
+
/*
* External Bus Controller (EBC) Setup
*/
#if (defined(CFG_EBC_PB0AP) && defined(CFG_EBC_PB0CR))
+#if (defined(CONFIG_405GP) || defined(CONFIG_405CR) || \
+ defined(CONFIG_405EP) || defined(CONFIG_405))
/*
* Move the next instructions into icache, since these modify the flash
* we are running from!
@@ -144,6 +265,7 @@ cpu_init_f (void)
asm volatile(" ori 3, 3, 0xA000" ::: "r3");
asm volatile(" mtctr 3" ::: "ctr");
asm volatile("2: bdnz 2b" ::: "ctr", "cr0");
+#endif
mtebc(pb0ap, CFG_EBC_PB0AP);
mtebc(pb0cr, CFG_EBC_PB0CR);
@@ -209,8 +331,6 @@ cpu_init_f (void)
int cpu_init_r (void)
{
#if defined(CONFIG_405GP) || defined(CONFIG_405EP)
- DECLARE_GLOBAL_DATA_PTR;
-
bd_t *bd = gd->bd;
unsigned long reg;
#if defined(CONFIG_405GP)
diff --git a/cpu/ppc4xx/i2c.c b/cpu/ppc4xx/i2c.c
index be94b571ff..7db1cd8046 100644
--- a/cpu/ppc4xx/i2c.c
+++ b/cpu/ppc4xx/i2c.c
@@ -16,6 +16,8 @@
#ifdef CONFIG_HARD_I2C
+DECLARE_GLOBAL_DATA_PTR;
+
#define IIC_OK 0
#define IIC_NOK 1
#define IIC_NOK_LA 2 /* Lost arbitration */
@@ -350,7 +352,6 @@ int i2c_read (uchar chip, uint addr, int alen, uchar * buffer, int len)
{
uchar xaddr[4];
int ret;
- DECLARE_GLOBAL_DATA_PTR;
if ( alen > 4 ) {
printf ("I2C read: addr len %d not supported\n", alen);
diff --git a/cpu/ppc4xx/interrupts.c b/cpu/ppc4xx/interrupts.c
index 1d8dc7c221..886f405156 100644
--- a/cpu/ppc4xx/interrupts.c
+++ b/cpu/ppc4xx/interrupts.c
@@ -36,6 +36,8 @@
#include <commproc.h>
#include "vecnum.h"
+DECLARE_GLOBAL_DATA_PTR;
+
/****************************************************************************/
/*
@@ -48,18 +50,22 @@ struct irq_action {
};
static struct irq_action irq_vecs[32];
+void uic0_interrupt( void * parms); /* UIC0 handler */
#if defined(CONFIG_440)
static struct irq_action irq_vecs1[32]; /* For UIC1 */
void uic1_interrupt( void * parms); /* UIC1 handler */
-#if defined(CONFIG_440GX)
+#if defined(CONFIG_440GX) || defined(CONFIG_440SPE)
static struct irq_action irq_vecs2[32]; /* For UIC2 */
-
-void uic0_interrupt( void * parms); /* UIC0 handler */
void uic2_interrupt( void * parms); /* UIC2 handler */
-#endif /* CONFIG_440GX */
+#endif /* CONFIG_440GX CONFIG_440SPE */
+
+#if defined(CONFIG_440SPE)
+static struct irq_action irq_vecs3[32]; /* For UIC3 */
+void uic3_interrupt( void * parms); /* UIC3 handler */
+#endif /* CONFIG_440SPE */
#endif /* CONFIG_440 */
@@ -96,8 +102,6 @@ static __inline__ void set_evpr(unsigned long val)
int interrupt_init_cpu (unsigned *decrementer_count)
{
- DECLARE_GLOBAL_DATA_PTR;
-
int vec;
unsigned long val;
@@ -115,11 +119,16 @@ int interrupt_init_cpu (unsigned *decrementer_count)
irq_vecs1[vec].handler = NULL;
irq_vecs1[vec].arg = NULL;
irq_vecs1[vec].count = 0;
-#if defined(CONFIG_440GX)
+#if defined(CONFIG_440GX) || defined(CONFIG_440SPE)
irq_vecs2[vec].handler = NULL;
irq_vecs2[vec].arg = NULL;
irq_vecs2[vec].count = 0;
#endif /* CONFIG_440GX */
+#if defined(CONFIG_440SPE)
+ irq_vecs3[vec].handler = NULL;
+ irq_vecs3[vec].arg = NULL;
+ irq_vecs3[vec].count = 0;
+#endif /* CONFIG_440SPE */
#endif
}
@@ -221,6 +230,34 @@ void external_interrupt(struct pt_regs *regs)
} /* external_interrupt CONFIG_440GX */
+#elif defined(CONFIG_440SPE)
+void external_interrupt(struct pt_regs *regs)
+{
+ ulong uic_msr;
+
+ /*
+ * Read masked interrupt status register to determine interrupt source
+ */
+ /* 440 SPe uses base uic register */
+ uic_msr = mfdcr(uic0msr);
+
+ if ( (UICB0_UIC1CI & uic_msr) || (UICB0_UIC1NCI & uic_msr) )
+ uic1_interrupt(0);
+
+ if ( (UICB0_UIC2CI & uic_msr) || (UICB0_UIC2NCI & uic_msr) )
+ uic2_interrupt(0);
+
+ if ( (UICB0_UIC3CI & uic_msr) || (UICB0_UIC3NCI & uic_msr) )
+ uic3_interrupt(0);
+
+ if (uic_msr & ~(UICB0_ALL))
+ uic0_interrupt(0);
+
+ mtdcr(uic0sr, uic_msr);
+
+ return;
+} /* external_interrupt CONFIG_440SPE */
+
#else
void external_interrupt(struct pt_regs *regs)
@@ -266,7 +303,7 @@ void external_interrupt(struct pt_regs *regs)
}
#endif
-#if defined(CONFIG_440GX)
+#if defined(CONFIG_440GX) || defined(CONFIG_440SPE)
/* Handler for UIC0 interrupt */
void uic0_interrupt( void * parms)
{
@@ -357,8 +394,8 @@ void uic1_interrupt( void * parms)
}
#endif /* defined(CONFIG_440) */
-#if defined(CONFIG_440GX)
-/* Handler for UIC1 interrupt */
+#if defined(CONFIG_440GX) || defined(CONFIG_440SPE)
+/* Handler for UIC2 interrupt */
void uic2_interrupt( void * parms)
{
ulong uic2_msr;
@@ -384,7 +421,7 @@ void uic2_interrupt( void * parms)
(*irq_vecs2[vec].handler)(irq_vecs2[vec].arg);
} else {
mtdcr(uic2er, mfdcr(uic2er) & ~(0x80000000 >> vec));
- printf ("Masking bogus interrupt vector (uic1) 0x%x\n", vec);
+ printf ("Masking bogus interrupt vector (uic2) 0x%x\n", vec);
}
/*
@@ -402,6 +439,51 @@ void uic2_interrupt( void * parms)
}
#endif /* defined(CONFIG_440GX) */
+#if defined(CONFIG_440SPE)
+/* Handler for UIC3 interrupt */
+void uic3_interrupt( void * parms)
+{
+ ulong uic3_msr;
+ ulong msr_shift;
+ int vec;
+
+ /*
+ * Read masked interrupt status register to determine interrupt source
+ */
+ uic3_msr = mfdcr(uic3msr);
+ msr_shift = uic3_msr;
+ vec = 0;
+
+ while (msr_shift != 0) {
+ if (msr_shift & 0x80000000) {
+ /*
+ * Increment irq counter (for debug purpose only)
+ */
+ irq_vecs3[vec].count++;
+
+ if (irq_vecs3[vec].handler != NULL) {
+ /* call isr */
+ (*irq_vecs3[vec].handler)(irq_vecs3[vec].arg);
+ } else {
+ mtdcr(uic3er, mfdcr(uic3er) & ~(0x80000000 >> vec));
+ printf ("Masking bogus interrupt vector (uic3) 0x%x\n", vec);
+ }
+
+ /*
+ * After servicing the interrupt, we have to remove the status indicator.
+ */
+ mtdcr(uic3sr, (0x80000000 >> vec));
+ }
+
+ /*
+ * Shift msr to next position and increment vector
+ */
+ msr_shift <<= 1;
+ vec++;
+ }
+}
+#endif /* defined(CONFIG_440SPE) */
+
/****************************************************************************/
/*
@@ -414,7 +496,7 @@ void irq_install_handler (int vec, interrupt_handler_t * handler, void *arg)
int i = vec;
#if defined(CONFIG_440)
-#if defined(CONFIG_440GX)
+#if defined(CONFIG_440GX) || defined(CONFIG_440SPE)
if ((vec > 31) && (vec < 64)) {
i = vec - 32;
irqa = irq_vecs1;
@@ -441,7 +523,7 @@ void irq_install_handler (int vec, interrupt_handler_t * handler, void *arg)
irqa[i].arg = arg;
#if defined(CONFIG_440)
-#if defined(CONFIG_440GX)
+#if defined(CONFIG_440GX) || defined(CONFIG_440SPE)
if ((vec > 31) && (vec < 64))
mtdcr (uic1er, mfdcr (uic1er) | (0x80000000 >> i));
else if (vec > 63)
@@ -464,7 +546,7 @@ void irq_free_handler (int vec)
int i = vec;
#if defined(CONFIG_440)
-#if defined(CONFIG_440GX)
+#if defined(CONFIG_440GX) || defined(CONFIG_440SPE)
if ((vec > 31) && (vec < 64)) {
irqa = irq_vecs1;
i = vec - 32;
@@ -485,7 +567,7 @@ void irq_free_handler (int vec)
#endif
#if defined(CONFIG_440)
-#if defined(CONFIG_440GX)
+#if defined(CONFIG_440GX) || defined(CONFIG_440SPE)
if ((vec > 31) && (vec < 64))
mtdcr (uic1er, mfdcr (uic1er) & ~(0x80000000 >> i));
else if (vec > 63)
@@ -553,7 +635,7 @@ do_irqinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
printf("\n");
#endif
-#if defined(CONFIG_440GX)
+#if defined(CONFIG_440GX) || defined(CONFIG_440SPE)
printf ("\nUIC 2\n");
printf ("Nr Routine Arg Count\n");
@@ -566,6 +648,19 @@ do_irqinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
printf("\n");
#endif
+#if defined(CONFIG_440SPE)
+ printf ("\nUIC 3\n");
+ printf ("Nr Routine Arg Count\n");
+
+ for (vec=0; vec<32; vec++) {
+ if (irq_vecs3[vec].handler != NULL)
+ printf ("%02d %08lx %08lx %d\n",
+ vec+63, (ulong)irq_vecs3[vec].handler,
+ (ulong)irq_vecs3[vec].arg, irq_vecs3[vec].count);
+ }
+ printf("\n");
+#endif
+
return 0;
}
#endif /* CONFIG_COMMANDS & CFG_CMD_IRQ */
diff --git a/cpu/ppc4xx/miiphy.c b/cpu/ppc4xx/miiphy.c
index f26f2a203a..aa580ed48f 100644
--- a/cpu/ppc4xx/miiphy.c
+++ b/cpu/ppc4xx/miiphy.c
@@ -50,7 +50,7 @@
#include <405_mal.h>
#include <miiphy.h>
-
+#undef ET_DEBUG
/***********************************************************/
/* Dump out to the screen PHY regs */
/***********************************************************/
@@ -90,6 +90,10 @@ int phy_setup_aneg (char *devname, unsigned char addr)
PHY_ANLPAR_10);
miiphy_write (devname, addr, PHY_ANAR, adv);
+ miiphy_read (devname, addr, PHY_1000BTCR, &adv);
+ adv |= (0x0300);
+ miiphy_write (devname, addr, PHY_1000BTCR, adv);
+
/* Start/Restart aneg */
miiphy_read (devname, addr, PHY_BMCR, &ctl);
ctl |= (PHY_BMCR_AUTON | PHY_BMCR_RST_NEG);
@@ -104,7 +108,7 @@ int phy_setup_aneg (char *devname, unsigned char addr)
/***********************************************************/
unsigned int miiphy_getemac_offset (void)
{
-#if (defined(CONFIG_440) && !defined(CONFIG_440SP)) && defined(CONFIG_NET_MULTI)
+#if (defined(CONFIG_440) && !defined(CONFIG_440SP) && !defined(CONFIG_440SPE)) && defined(CONFIG_NET_MULTI)
unsigned long zmii;
unsigned long eoffset;
@@ -155,10 +159,12 @@ int emac4xx_miiphy_read (char *devname, unsigned char addr,
i = 0;
/* see if it is ready for sec */
- while ((in32 (EMAC_STACR + emac_reg) & EMAC_STACR_OC) == 0) {
+ while ((in32 (EMAC_STACR + emac_reg) & EMAC_STACR_OC) == EMAC_STACR_OC_MASK) {
udelay (7);
if (i > 5) {
-#if 0
+#ifdef ET_DEBUG
+ sta_reg = in32 (EMAC_STACR + emac_reg);
+ printf ("read : EMAC_STACR=0x%0x\n", sta_reg); /* test-only */
printf ("read err 1\n");
#endif
return -1;
@@ -167,31 +173,41 @@ int emac4xx_miiphy_read (char *devname, unsigned char addr,
}
sta_reg = reg; /* reg address */
/* set clock (50Mhz) and read flags */
-#if defined(CONFIG_440GX)
- sta_reg |= EMAC_STACR_READ;
+#if defined(CONFIG_440GX) || defined(CONFIG_440SPE)
+#if defined(CONFIG_IBM_EMAC4_V4) /* EMAC4 V4 changed bit setting */
+ sta_reg = (sta_reg & ~EMAC_STACR_OP_MASK) | EMAC_STACR_READ;
+#else
+ sta_reg |= EMAC_STACR_READ;
+#endif
#else
sta_reg = (sta_reg | EMAC_STACR_READ) & ~EMAC_STACR_CLK_100MHZ;
#endif
-#if defined(CONFIG_PHY_CLK_FREQ) && !defined(CONFIG_440GX)
+#if defined(CONFIG_PHY_CLK_FREQ) && !defined(CONFIG_440GX) && !defined(CONFIG__440SP) && !defined(CONFIG__440SPE)
sta_reg = sta_reg | CONFIG_PHY_CLK_FREQ;
#endif
sta_reg = sta_reg | (addr << 5); /* Phy address */
-
+ sta_reg = sta_reg | EMAC_STACR_OC_MASK; /* new IBM emac v4 */
out32 (EMAC_STACR + emac_reg, sta_reg);
-#if 0 /* test-only */
+#ifdef ET_DEBUG
printf ("a2: write: EMAC_STACR=0x%0x\n", sta_reg); /* test-only */
#endif
sta_reg = in32 (EMAC_STACR + emac_reg);
+#ifdef ET_DEBUG
+ printf ("a21: read : EMAC_STACR=0x%0x\n", sta_reg); /* test-only */
+#endif
i = 0;
- while ((sta_reg & EMAC_STACR_OC) == 0) {
+ while ((sta_reg & EMAC_STACR_OC) == EMAC_STACR_OC_MASK) {
udelay (7);
if (i > 5) {
return -1;
}
i++;
sta_reg = in32 (EMAC_STACR + emac_reg);
+#ifdef ET_DEBUG
+ printf ("a22: read : EMAC_STACR=0x%0x\n", sta_reg); /* test-only */
+#endif
}
if ((sta_reg & EMAC_STACR_PHYE) != 0) {
return -1;
@@ -219,7 +235,7 @@ int emac4xx_miiphy_write (char *devname, unsigned char addr,
/* see if it is ready for 1000 nsec */
i = 0;
- while ((in32 (EMAC_STACR + emac_reg) & EMAC_STACR_OC) == 0) {
+ while ((in32 (EMAC_STACR + emac_reg) & EMAC_STACR_OC) == EMAC_STACR_OC_MASK) {
if (i > 5)
return -1;
udelay (7);
@@ -228,16 +244,21 @@ int emac4xx_miiphy_write (char *devname, unsigned char addr,
sta_reg = 0;
sta_reg = reg; /* reg address */
/* set clock (50Mhz) and read flags */
-#if defined(CONFIG_440GX)
- sta_reg |= EMAC_STACR_WRITE;
+#if defined(CONFIG_440GX) || defined(CONFIG_440SPE)
+#if defined(CONFIG_IBM_EMAC4_V4) /* EMAC4 V4 changed bit setting */
+ sta_reg = (sta_reg & ~EMAC_STACR_OP_MASK) | EMAC_STACR_WRITE;
+#else
+ sta_reg |= EMAC_STACR_WRITE;
+#endif
#else
sta_reg = (sta_reg | EMAC_STACR_WRITE) & ~EMAC_STACR_CLK_100MHZ;
#endif
-#if defined(CONFIG_PHY_CLK_FREQ) && !defined(CONFIG_440GX)
+#if defined(CONFIG_PHY_CLK_FREQ) && !defined(CONFIG_440GX) && !defined(CONFIG__440SP) && !defined(CONFIG__440SPE)
sta_reg = sta_reg | CONFIG_PHY_CLK_FREQ; /* Set clock frequency (PLB freq. dependend) */
#endif
- sta_reg = sta_reg | ((unsigned long) addr << 5); /* Phy address */
+ sta_reg = sta_reg | ((unsigned long) addr << 5);/* Phy address */
+ sta_reg = sta_reg | EMAC_STACR_OC_MASK; /* new IBM emac v4 */
memcpy (&sta_reg, &value, 2); /* put in data */
out32 (EMAC_STACR + emac_reg, sta_reg);
@@ -245,12 +266,18 @@ int emac4xx_miiphy_write (char *devname, unsigned char addr,
/* wait for completion */
i = 0;
sta_reg = in32 (EMAC_STACR + emac_reg);
- while ((sta_reg & EMAC_STACR_OC) == 0) {
+#ifdef ET_DEBUG
+ printf ("a31: read : EMAC_STACR=0x%0x\n", sta_reg); /* test-only */
+#endif
+ while ((sta_reg & EMAC_STACR_OC) == EMAC_STACR_OC_MASK) {
udelay (7);
if (i > 5)
return -1;
i++;
sta_reg = in32 (EMAC_STACR + emac_reg);
+#ifdef ET_DEBUG
+ printf ("a32: read : EMAC_STACR=0x%0x\n", sta_reg); /* test-only */
+#endif
}
if ((sta_reg & EMAC_STACR_PHYE) != 0)
diff --git a/cpu/ppc4xx/sdram.c b/cpu/ppc4xx/sdram.c
index e9548cdcf3..faeea5c91e 100644
--- a/cpu/ppc4xx/sdram.c
+++ b/cpu/ppc4xx/sdram.c
@@ -1,7 +1,10 @@
/*
- * (C) Copyright 2005
+ * (C) Copyright 2005-2006
* Stefan Roese, DENX Software Engineering, sr@denx.de.
*
+ * (C) Copyright 2006
+ * DAVE Srl <www.dave-tech.it>
+ *
* (C) Copyright 2002-2004
* Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
*
@@ -15,7 +18,7 @@
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
@@ -27,63 +30,161 @@
#include <common.h>
#include <ppc4xx.h>
#include <asm/processor.h>
+#include "sdram.h"
#ifdef CONFIG_SDRAM_BANK0
-#define mtsdram0(reg, data) mtdcr(memcfga,reg);mtdcr(memcfgd,data)
-
-
-struct sdram_conf_s {
- unsigned long size;
- unsigned long reg;
-};
-
-typedef struct sdram_conf_s sdram_conf_t;
-
#ifndef CFG_SDRAM_TABLE
sdram_conf_t mb0cf[] = {
- {(128 << 20), 0x000A4001}, /* (0-128MB) Address Mode 3, 13x10(4) */
- {(64 << 20), 0x00084001}, /* (0-64MB) Address Mode 3, 13x9(4) */
- {(32 << 20), 0x00062001}, /* (0-32MB) Address Mode 2, 12x9(4) */
- {(16 << 20), 0x00046001}, /* (0-16MB) Address Mode 4, 12x8(4) */
- {(4 << 20), 0x00008001}, /* (0-4MB) Address Mode 5, 11x8(2) */
+ {(128 << 20), 13, 0x000A4001}, /* (0-128MB) Address Mode 3, 13x10(4) */
+ {(64 << 20), 13, 0x00084001}, /* (0-64MB) Address Mode 3, 13x9(4) */
+ {(32 << 20), 12, 0x00062001}, /* (0-32MB) Address Mode 2, 12x9(4) */
+ {(16 << 20), 12, 0x00046001}, /* (0-16MB) Address Mode 4, 12x8(4) */
+ {(4 << 20), 11, 0x00008001}, /* (0-4MB) Address Mode 5, 11x8(2) */
};
#else
sdram_conf_t mb0cf[] = CFG_SDRAM_TABLE;
#endif
-#define N_MB0CF (sizeof(mb0cf) / sizeof(mb0cf[0]))
+#define N_MB0CF (sizeof(mb0cf) / sizeof(mb0cf[0]))
#ifndef CONFIG_440
-/*
- * Autodetect onboard SDRAM on 405 platforms
- */
-void sdram_init(void)
+#ifdef CFG_SDRAM_CASL
+static ulong ns2clks(ulong ns)
{
- ulong sdtr1;
- ulong rtr;
- int i;
+ ulong bus_period_x_10 = ONE_BILLION / (get_bus_freq(0) / 10);
+ return ((ns * 10) + bus_period_x_10) / bus_period_x_10;
+}
+#endif /* CFG_SDRAM_CASL */
+
+static ulong compute_sdtr1(ulong speed)
+{
+#ifdef CFG_SDRAM_CASL
+ ulong tmp;
+ ulong sdtr1 = 0;
+
+ /* CASL */
+ if (CFG_SDRAM_CASL < 2)
+ sdtr1 |= (1 << SDRAM0_TR_CASL);
+ else
+ if (CFG_SDRAM_CASL > 4)
+ sdtr1 |= (3 << SDRAM0_TR_CASL);
+ else
+ sdtr1 |= ((CFG_SDRAM_CASL-1) << SDRAM0_TR_CASL);
+
+ /* PTA */
+ tmp = ns2clks(CFG_SDRAM_PTA);
+ if ((tmp >= 2) && (tmp <= 4))
+ sdtr1 |= ((tmp-1) << SDRAM0_TR_PTA);
+ else
+ sdtr1 |= ((4-1) << SDRAM0_TR_PTA);
+
+ /* CTP */
+ tmp = ns2clks(CFG_SDRAM_CTP);
+ if ((tmp >= 2) && (tmp <= 4))
+ sdtr1 |= ((tmp-1) << SDRAM0_TR_CTP);
+ else
+ sdtr1 |= ((4-1) << SDRAM0_TR_CTP);
+
+ /* LDF */
+ tmp = ns2clks(CFG_SDRAM_LDF);
+ if ((tmp >= 2) && (tmp <= 4))
+ sdtr1 |= ((tmp-1) << SDRAM0_TR_LDF);
+ else
+ sdtr1 |= ((2-1) << SDRAM0_TR_LDF);
+
+ /* RFTA */
+ tmp = ns2clks(CFG_SDRAM_RFTA);
+ if ((tmp >= 4) && (tmp <= 10))
+ sdtr1 |= ((tmp-4) << SDRAM0_TR_RFTA);
+ else
+ sdtr1 |= ((10-4) << SDRAM0_TR_RFTA);
+
+ /* RCD */
+ tmp = ns2clks(CFG_SDRAM_RCD);
+ if ((tmp >= 2) && (tmp <= 4))
+ sdtr1 |= ((tmp-1) << SDRAM0_TR_RCD);
+ else
+ sdtr1 |= ((4-1) << SDRAM0_TR_RCD);
+
+ return sdtr1;
+#else /* CFG_SDRAM_CASL */
/*
- * Support for 100MHz and 133MHz SDRAM
+ * If no values are configured in the board config file
+ * use the default values, which seem to be ok for most
+ * boards.
+ *
+ * REMARK:
+ * For new board ports we strongly recommend to define the
+ * correct values for the used SDRAM chips in your board
+ * config file (see PPChameleonEVB.h)
*/
- if (get_bus_freq(0) > 100000000) {
+ if (speed > 100000000) {
/*
* 133 MHz SDRAM
*/
- sdtr1 = 0x01074015;
- rtr = 0x07f00000;
+ return 0x01074015;
} else {
/*
* default: 100 MHz SDRAM
*/
- sdtr1 = 0x0086400d;
- rtr = 0x05f00000;
+ return 0x0086400d;
}
+#endif /* CFG_SDRAM_CASL */
+}
+
+/* refresh is expressed in ms */
+static ulong compute_rtr(ulong speed, ulong rows, ulong refresh)
+{
+#ifdef CFG_SDRAM_CASL
+ ulong tmp;
+
+ tmp = ((refresh*1000*1000) / (1 << rows)) * (speed / 1000);
+ tmp /= 1000000;
+
+ return ((tmp & 0x00003FF8) << 16);
+#else /* CFG_SDRAM_CASL */
+ if (speed > 100000000) {
+ /*
+ * 133 MHz SDRAM
+ */
+ return 0x07f00000;
+ } else {
+ /*
+ * default: 100 MHz SDRAM
+ */
+ return 0x05f00000;
+ }
+#endif /* CFG_SDRAM_CASL */
+}
+
+/*
+ * Autodetect onboard SDRAM on 405 platforms
+ */
+void sdram_init(void)
+{
+ ulong speed;
+ ulong sdtr1;
+ int i;
+
+ /*
+ * Determine SDRAM speed
+ */
+ speed = get_bus_freq(0); /* parameter not used on ppc4xx */
+
+ /*
+ * sdtr1 (register SDRAM0_TR) must take into account timings listed
+ * in SDRAM chip datasheet. rtr (register SDRAM0_RTR) must take into
+ * account actual SDRAM size. So we can set up sdtr1 according to what
+ * is specified in board configuration file while rtr dependds on SDRAM
+ * size we are assuming before detection.
+ */
+ sdtr1 = compute_sdtr1(speed);
for (i=0; i<N_MB0CF; i++) {
/*
@@ -96,7 +197,7 @@ void sdram_init(void)
*/
mtsdram0(mem_mb0cf, mb0cf[i].reg);
mtsdram0(mem_sdtr1, sdtr1);
- mtsdram0(mem_rtr, rtr);
+ mtsdram0(mem_rtr, compute_rtr(speed, mb0cf[i].rows, 64));
udelay(200);
@@ -120,16 +221,135 @@ void sdram_init(void)
#else /* CONFIG_440 */
+#define NUM_TRIES 64
+#define NUM_READS 10
+
+static void sdram_tr1_set(int ram_address, int* tr1_value)
+{
+ int i;
+ int j, k;
+ volatile unsigned int* ram_pointer = (unsigned int *)ram_address;
+ int first_good = -1, last_bad = 0x1ff;
+
+ unsigned long test[NUM_TRIES] = {
+ 0x00000000, 0x00000000, 0xFFFFFFFF, 0xFFFFFFFF,
+ 0x00000000, 0x00000000, 0xFFFFFFFF, 0xFFFFFFFF,
+ 0xFFFFFFFF, 0xFFFFFFFF, 0x00000000, 0x00000000,
+ 0xFFFFFFFF, 0xFFFFFFFF, 0x00000000, 0x00000000,
+ 0xAAAAAAAA, 0xAAAAAAAA, 0x55555555, 0x55555555,
+ 0xAAAAAAAA, 0xAAAAAAAA, 0x55555555, 0x55555555,
+ 0x55555555, 0x55555555, 0xAAAAAAAA, 0xAAAAAAAA,
+ 0x55555555, 0x55555555, 0xAAAAAAAA, 0xAAAAAAAA,
+ 0xA5A5A5A5, 0xA5A5A5A5, 0x5A5A5A5A, 0x5A5A5A5A,
+ 0xA5A5A5A5, 0xA5A5A5A5, 0x5A5A5A5A, 0x5A5A5A5A,
+ 0x5A5A5A5A, 0x5A5A5A5A, 0xA5A5A5A5, 0xA5A5A5A5,
+ 0x5A5A5A5A, 0x5A5A5A5A, 0xA5A5A5A5, 0xA5A5A5A5,
+ 0xAA55AA55, 0xAA55AA55, 0x55AA55AA, 0x55AA55AA,
+ 0xAA55AA55, 0xAA55AA55, 0x55AA55AA, 0x55AA55AA,
+ 0x55AA55AA, 0x55AA55AA, 0xAA55AA55, 0xAA55AA55,
+ 0x55AA55AA, 0x55AA55AA, 0xAA55AA55, 0xAA55AA55 };
+
+ /* go through all possible SDRAM0_TR1[RDCT] values */
+ for (i=0; i<=0x1ff; i++) {
+ /* set the current value for TR1 */
+ mtsdram(mem_tr1, (0x80800800 | i));
+
+ /* write values */
+ for (j=0; j<NUM_TRIES; j++) {
+ ram_pointer[j] = test[j];
+
+ /* clear any cache at ram location */
+ __asm__("dcbf 0,%0": :"r" (&ram_pointer[j]));
+ }
+
+ /* read values back */
+ for (j=0; j<NUM_TRIES; j++) {
+ for (k=0; k<NUM_READS; k++) {
+ /* clear any cache at ram location */
+ __asm__("dcbf 0,%0": :"r" (&ram_pointer[j]));
+
+ if (ram_pointer[j] != test[j])
+ break;
+ }
+
+ /* read error */
+ if (k != NUM_READS)
+ break;
+ }
+
+ /* we have a SDRAM0_TR1[RDCT] that is part of the window */
+ if (j == NUM_TRIES) {
+ if (first_good == -1)
+ first_good = i; /* found beginning of window */
+ } else { /* bad read */
+ /* if we have not had a good read then don't care */
+ if (first_good != -1) {
+ /* first failure after a good read */
+ last_bad = i-1;
+ break;
+ }
+ }
+ }
+
+ /* return the current value for TR1 */
+ *tr1_value = (first_good + last_bad) / 2;
+}
+
+
+#ifdef CONFIG_SDRAM_ECC
+static void ecc_init(ulong start, ulong size)
+{
+ ulong current_addr; /* current byte address */
+ ulong end_addr; /* end of memory region */
+ ulong addr_inc; /* address skip between writes */
+ ulong cfg0_reg; /* for restoring ECC state */
+
+ /*
+ * TODO: Enable dcache before running this test (speedup)
+ */
+
+ mfsdram(mem_cfg0, cfg0_reg);
+ mtsdram(mem_cfg0, (cfg0_reg & ~SDRAM_CFG0_MEMCHK) | SDRAM_CFG0_MEMCHK_GEN);
+
+ /*
+ * look at geometry of SDRAM (data width) to determine whether we
+ * can skip words when writing
+ */
+ if ((cfg0_reg & SDRAM_CFG0_DRAMWDTH) == SDRAM_CFG0_DRAMWDTH_32)
+ addr_inc = 4;
+ else
+ addr_inc = 8;
+
+ current_addr = start;
+ end_addr = start + size;
+
+ while (current_addr < end_addr) {
+ *((ulong *)current_addr) = 0x00000000;
+ current_addr += addr_inc;
+ }
+
+ /*
+ * TODO: Flush dcache and disable it again
+ */
+
+ /*
+ * Enable ecc checking and parity errors
+ */
+ mtsdram(mem_cfg0, (cfg0_reg & ~SDRAM_CFG0_MEMCHK) | SDRAM_CFG0_MEMCHK_CHK);
+}
+#endif
+
/*
* Autodetect onboard DDR SDRAM on 440 platforms
*
* NOTE: Some of the hardcoded values are hardware dependant,
- * so this should be extended for other future boards
- * using this routine!
+ * so this should be extended for other future boards
+ * using this routine!
*/
long int initdram(int board_type)
{
int i;
+ int tr1_bank1;
for (i=0; i<N_MB0CF; i++) {
/*
@@ -140,11 +360,11 @@ long int initdram(int board_type)
/*
* Setup some default
*/
- mtsdram(mem_uabba, 0x00000000); /* ubba=0 (default) */
- mtsdram(mem_slio, 0x00000000); /* rdre=0 wrre=0 rarw=0 */
+ mtsdram(mem_uabba, 0x00000000); /* ubba=0 (default) */
+ mtsdram(mem_slio, 0x00000000); /* rdre=0 wrre=0 rarw=0 */
mtsdram(mem_devopt, 0x00000000); /* dll=0 ds=0 (normal) */
mtsdram(mem_wddctr, 0x00000000); /* wrcp=0 dcd=0 */
- mtsdram(mem_clktr, 0x40000000); /* clkp=1 (90 deg wr) dcdt=0 */
+ mtsdram(mem_clktr, 0x40000000); /* clkp=1 (90 deg wr) dcdt=0 */
/*
* Following for CAS Latency = 2.5 @ 133 MHz PLB
@@ -159,11 +379,21 @@ long int initdram(int board_type)
/*
* Enable the controller, then wait for DCEN to complete
*/
- mtsdram(mem_cfg0, 0x86000000); /* DCEN=1, PMUD=1, 64-bit */
+ mtsdram(mem_cfg0, 0x82000000); /* DCEN=1, PMUD=0, 64-bit */
udelay(10000);
if (get_ram_size(0, mb0cf[i].size) == mb0cf[i].size) {
/*
+ * Optimize TR1 to current hardware environment
+ */
+ sdram_tr1_set(0x00000000, &tr1_bank1);
+ mtsdram(mem_tr1, (tr1_bank1 | 0x80800800));
+
+#ifdef CONFIG_SDRAM_ECC
+ ecc_init(0, mb0cf[i].size);
+#endif
+
+ /*
* OK, size detected -> all done
*/
return mb0cf[i].size;
diff --git a/cpu/ppc4xx/sdram.h b/cpu/ppc4xx/sdram.h
new file mode 100644
index 0000000000..62b5442f3b
--- /dev/null
+++ b/cpu/ppc4xx/sdram.h
@@ -0,0 +1,78 @@
+/*
+ * (C) Copyright 2006
+ * Stefan Roese, DENX Software Engineering, sr@denx.de.
+ *
+ * (C) Copyright 2006
+ * DAVE Srl <www.dave-tech.it>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _SDRAM_H_
+#define _SDRAM_H_
+
+#include <config.h>
+
+#define mtsdram0(reg, data) mtdcr(memcfga,reg);mtdcr(memcfgd,data)
+
+#define ONE_BILLION 1000000000
+
+struct sdram_conf_s {
+ unsigned long size;
+ int rows;
+ unsigned long reg;
+};
+
+typedef struct sdram_conf_s sdram_conf_t;
+
+/* Bitfields offsets */
+#define SDRAM0_TR_CASL (31 - 8)
+#define SDRAM0_TR_PTA (31 - 13)
+#define SDRAM0_TR_CTP (31 - 15)
+#define SDRAM0_TR_LDF (31 - 17)
+#define SDRAM0_TR_RFTA (31 - 29)
+#define SDRAM0_TR_RCD (31 - 31)
+
+#ifdef CFG_SDRAM_CL
+/* SDRAM timings [ns] according to AMCC/IBM names (see SDRAM_faq.doc) */
+#define CFG_SDRAM_CASL CFG_SDRAM_CL
+#define CFG_SDRAM_PTA CFG_SDRAM_tRP
+#define CFG_SDRAM_CTP (CFG_SDRAM_tRC - CFG_SDRAM_tRCD - CFG_SDRAM_tRP)
+#define CFG_SDRAM_LDF 0
+#ifdef CFG_SDRAM_tRFC
+#define CFG_SDRAM_RFTA CFG_SDRAM_tRFC
+#else
+#define CFG_SDRAM_RFTA CFG_SDRAM_tRC
+#endif
+#define CFG_SDRAM_RCD CFG_SDRAM_tRCD
+#endif /* #ifdef CFG_SDRAM_CL */
+
+/*
+ * Some defines for the 440 DDR controller
+ */
+#define SDRAM_CFG0_DC_EN 0x80000000 /* SDRAM Controller Enable */
+#define SDRAM_CFG0_MEMCHK 0x30000000 /* Memory data error checking mask*/
+#define SDRAM_CFG0_MEMCHK_NON 0x00000000 /* No ECC generation */
+#define SDRAM_CFG0_MEMCHK_GEN 0x20000000 /* ECC generation */
+#define SDRAM_CFG0_MEMCHK_CHK 0x30000000 /* ECC generation and checking */
+#define SDRAM_CFG0_DRAMWDTH 0x02000000 /* DRAM width mask */
+#define SDRAM_CFG0_DRAMWDTH_32 0x00000000 /* 32 bits */
+#define SDRAM_CFG0_DRAMWDTH_64 0x02000000 /* 64 bits */
+
+#endif
diff --git a/cpu/ppc4xx/serial.c b/cpu/ppc4xx/serial.c
index e7f6bcbe1e..ad3ca6e819 100644
--- a/cpu/ppc4xx/serial.c
+++ b/cpu/ppc4xx/serial.c
@@ -1,5 +1,5 @@
/*
- * (C) Copyright 2000
+ * (C) Copyright 2000-2006
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
@@ -59,6 +59,8 @@
#include <malloc.h>
#endif
+DECLARE_GLOBAL_DATA_PTR;
+
/*****************************************************************************/
#ifdef CONFIG_IOP480
@@ -161,8 +163,6 @@
int serial_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
volatile char val;
unsigned short br_reg;
@@ -185,8 +185,6 @@ int serial_init (void)
void serial_setbrg (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
unsigned short br_reg;
br_reg = ((((CONFIG_CPUCLOCK * 1000000) / 16) / gd->baudrate) - 1);
@@ -277,11 +275,11 @@ int serial_tstc ()
#define UART1_BASE CFG_PERIPHERAL_BASE + 0x00000300
#endif
-#if defined(CONFIG_440SP)
+#if defined(CONFIG_440SP) || defined(CONFIG_440SPE)
#define UART2_BASE CFG_PERIPHERAL_BASE + 0x00000600
#endif
-#if defined(CONFIG_440GX) || defined(CONFIG_440EP) || defined(CONFIG_440GR) || defined(CONFIG_440SP)
+#if defined(CONFIG_440GX) || defined(CONFIG_440EP) || defined(CONFIG_440GR) || defined(CONFIG_440SP) || defined(CONFIG_440SPE)
#define CR0_MASK 0xdfffffff
#define CR0_EXTCLK_ENA 0x00800000
#define CR0_UDIV_POS 0
@@ -311,14 +309,18 @@ int serial_tstc ()
#if defined(CONFIG_UART1_CONSOLE)
#define ACTING_UART0_BASE UART1_BASE
#define ACTING_UART1_BASE UART0_BASE
-#if defined(CONFIG_440GX) || defined(CONFIG_440EP) || defined(CONFIG_440GR) || defined(CONFIG_440SP)
+#if defined(CONFIG_440GX) || defined(CONFIG_440EP) || \
+ defined(CONFIG_440GR) || defined(CONFIG_440SP) || \
+ defined(CONFIG_440SPE)
#define UART0_SDR sdr_uart1
#define UART1_SDR sdr_uart0
#endif /* CONFIG_440GX */
#else
#define ACTING_UART0_BASE UART0_BASE
#define ACTING_UART1_BASE UART1_BASE
-#if defined(CONFIG_440GX) || defined(CONFIG_440EP) || defined(CONFIG_440GR) || defined(CONFIG_440SP)
+#if defined(CONFIG_440GX) || defined(CONFIG_440EP) || \
+ defined(CONFIG_440GR) || defined(CONFIG_440SP) || \
+ defined(CONFIG_440SPE)
#define UART0_SDR sdr_uart0
#define UART1_SDR sdr_uart1
#endif /* CONFIG_440GX */
@@ -431,8 +433,6 @@ int serial_init_dev (unsigned long dev_base)
int serial_init(void)
#endif
{
- DECLARE_GLOBAL_DATA_PTR;
-
unsigned long reg;
unsigned long udiv;
unsigned short bdiv;
@@ -441,7 +441,8 @@ int serial_init(void)
unsigned long tmp;
#endif
-#if defined(CONFIG_440GX) || defined(CONFIG_440SP)
+#if defined(CONFIG_440GX) || defined(CONFIG_440SP) || \
+ defined(CONFIG_440SPE)
#if defined(CONFIG_SERIAL_MULTI)
if (UART0_BASE == dev_base) {
mfsdr(UART0_SDR,reg);
@@ -470,7 +471,9 @@ int serial_init(void)
serial_divs (gd->baudrate, &udiv, &bdiv);
#endif
-#if defined(CONFIG_440GX) || defined(CONFIG_440EP) || defined(CONFIG_440GR) || defined(CONFIG_440SP)
+#if defined(CONFIG_440GX) || defined(CONFIG_440EP) || \
+ defined(CONFIG_440GR) || defined(CONFIG_440SP) || \
+ defined(CONFIG_440SPE)
reg |= udiv << CR0_UDIV_POS; /* set the UART divisor */
#if defined(CONFIG_SERIAL_MULTI)
if (UART0_BASE == dev_base) {
@@ -520,8 +523,6 @@ int serial_init_dev (unsigned long dev_base)
int serial_init (void)
#endif
{
- DECLARE_GLOBAL_DATA_PTR;
-
unsigned long reg;
unsigned long tmp;
unsigned long clk;
@@ -597,8 +598,6 @@ void serial_setbrg_dev (unsigned long dev_base)
void serial_setbrg (void)
#endif
{
- DECLARE_GLOBAL_DATA_PTR;
-
unsigned long tmp;
unsigned long clk;
unsigned long udiv;
@@ -615,8 +614,28 @@ void serial_setbrg (void)
#else
udiv = ((mfdcr (cntrl0) & 0x3e) >> 1) + 1;
#endif /* CONFIG_405EP */
+
+#if !defined(CFG_EXT_SERIAL_CLOCK) && \
+ ( defined(CONFIG_440GX) || defined(CONFIG_440EP) || \
+ defined(CONFIG_440GR) || defined(CONFIG_440SP) || \
+ defined(CONFIG_440SPE) )
+ serial_divs (gd->baudrate, &udiv, &bdiv);
+ tmp = udiv << CR0_UDIV_POS; /* set the UART divisor */
+#if defined(CONFIG_SERIAL_MULTI)
+ if (UART0_BASE == dev_base) {
+ mtsdr (UART0_SDR, tmp);
+ } else {
+ mtsdr (UART1_SDR, tmp);
+ }
+#else
+ mtsdr (UART0_SDR, tmp);
+#endif
+
+#else
+
tmp = gd->baudrate * udiv * 16;
bdiv = (clk + tmp / 2) / tmp;
+#endif /* !defined(CFG_EXT_SERIAL_CLOCK) && (...) */
#if defined(CONFIG_SERIAL_MULTI)
out8 (dev_base + UART_LCR, 0x80); /* set DLAB bit */
@@ -880,8 +899,6 @@ int serial_buffered_tstc (void)
#if (CONFIG_KGDB_SER_INDEX & 2)
void kgdb_serial_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
volatile char val;
unsigned short br_reg;
diff --git a/cpu/ppc4xx/spd_sdram.c b/cpu/ppc4xx/spd_sdram.c
index ebd5f3998f..c24456bea8 100644
--- a/cpu/ppc4xx/spd_sdram.c
+++ b/cpu/ppc4xx/spd_sdram.c
@@ -745,7 +745,7 @@ long int spd_sdram(void) {
*/
check_volt_type(dimm_populated, iic0_dimm_addr, num_dimm_banks);
-#if defined(CONFIG_440GX)
+#if defined(CONFIG_440GX) || defined(CONFIG_440EP) || defined(CONFIG_440GR) || defined(CONFIG_440SP)
/*
* Soft-reset SDRAM controller.
*/
@@ -1007,9 +1007,9 @@ void program_cfg0(unsigned long* dimm_populated,
}
/*
- * program Page Management Unit
+ * program Page Management Unit (0 == enabled)
*/
- cfg0 |= SDRAM_CFG0_PMUD;
+ cfg0 &= ~SDRAM_CFG0_PMUD;
/*
* program Memory Controller Options 0
diff --git a/cpu/ppc4xx/speed.c b/cpu/ppc4xx/speed.c
index 553c491e24..e552c03473 100644
--- a/cpu/ppc4xx/speed.c
+++ b/cpu/ppc4xx/speed.c
@@ -26,10 +26,14 @@
#include <ppc4xx.h>
#include <asm/processor.h>
-/* ------------------------------------------------------------------------- */
+DECLARE_GLOBAL_DATA_PTR;
#define ONE_BILLION 1000000000
-
+#ifdef DEBUG
+#define DEBUGF(fmt,args...) printf(fmt ,##args)
+#else
+#define DEBUGF(fmt,args...)
+#endif
#if defined(CONFIG_405GP) || defined(CONFIG_405CR)
@@ -283,7 +287,7 @@ ulong get_PCI_freq (void)
return sys_info.freqPCI;
}
-#elif !defined(CONFIG_440GX) && !defined(CONFIG_440SP)
+#elif !defined(CONFIG_440GX) && !defined(CONFIG_440SP) && !defined(CONFIG_440SPE)
void get_sys_info (sys_info_t * sysInfo)
{
unsigned long strp0;
@@ -326,6 +330,26 @@ void get_sys_info (sys_info_t * sysInfo)
unsigned long m;
unsigned long prbdv0;
+#if defined(CONFIG_440SPE)
+ unsigned long sys_freq;
+ unsigned long sys_per=0;
+ unsigned long msr;
+ unsigned long pci_clock_per;
+ unsigned long sdr_ddrpll;
+
+ /*-------------------------------------------------------------------------+
+ | Get the system clock period.
+ +-------------------------------------------------------------------------*/
+ sys_per = determine_sysper();
+
+ msr = (mfmsr () & ~(MSR_EE)); /* disable interrupts */
+
+ /*-------------------------------------------------------------------------+
+ | Calculate the system clock speed from the period.
+ +-------------------------------------------------------------------------*/
+ sys_freq=(ONE_BILLION/sys_per)*1000;
+#endif
+
/* Extract configured divisors */
mfsdr( sdr_sdstp0,strp0 );
mfsdr( sdr_sdstp1,strp1 );
@@ -360,12 +384,238 @@ void get_sys_info (sys_info_t * sysInfo)
m = sysInfo->pllExtBusDiv * sysInfo->pllOpbDiv * sysInfo->pllFwdDivB;
/* Now calculate the individual clocks */
+#if defined(CONFIG_440SPE)
+ sysInfo->freqVCOMhz = (m * sys_freq) ;
+#else
sysInfo->freqVCOMhz = (m * CONFIG_SYS_CLK_FREQ) + (m>>1);
+#endif
sysInfo->freqProcessor = sysInfo->freqVCOMhz/sysInfo->pllFwdDivA;
sysInfo->freqPLB = sysInfo->freqVCOMhz/sysInfo->pllFwdDivB/prbdv0;
sysInfo->freqOPB = sysInfo->freqPLB/sysInfo->pllOpbDiv;
sysInfo->freqEPB = sysInfo->freqOPB/sysInfo->pllExtBusDiv;
+#if defined(CONFIG_440SPE)
+ /* Determine PCI Clock Period */
+ pci_clock_per = determine_pci_clock_per();
+ sysInfo->freqPCI = (ONE_BILLION/pci_clock_per) * 1000;
+ mfsdr(sdr_ddr0, sdr_ddrpll);
+ sysInfo->freqDDR = ((sysInfo->freqPLB) * SDR0_DDR0_DDRM_DECODE(sdr_ddrpll));
+#endif
+
+
+}
+
+#endif
+
+#if defined(CONFIG_440SPE)
+unsigned long determine_sysper(void)
+{
+ unsigned int fpga_clocking_reg;
+ unsigned int master_clock_selection;
+ unsigned long master_clock_per = 0;
+ unsigned long fb_div_selection;
+ unsigned int vco_div_reg_value;
+ unsigned long vco_div_selection;
+ unsigned long sys_per = 0;
+ int extClkVal;
+
+ /*-------------------------------------------------------------------------+
+ | Read FPGA reg 0 and reg 1 to get FPGA reg information
+ +-------------------------------------------------------------------------*/
+ fpga_clocking_reg = in16(FPGA_REG16);
+
+
+ /* Determine Master Clock Source Selection */
+ master_clock_selection = fpga_clocking_reg & FPGA_REG16_MASTER_CLK_MASK;
+
+ switch(master_clock_selection) {
+ case FPGA_REG16_MASTER_CLK_66_66:
+ master_clock_per = PERIOD_66_66MHZ;
+ break;
+ case FPGA_REG16_MASTER_CLK_50:
+ master_clock_per = PERIOD_50_00MHZ;
+ break;
+ case FPGA_REG16_MASTER_CLK_33_33:
+ master_clock_per = PERIOD_33_33MHZ;
+ break;
+ case FPGA_REG16_MASTER_CLK_25:
+ master_clock_per = PERIOD_25_00MHZ;
+ break;
+ case FPGA_REG16_MASTER_CLK_EXT:
+ if ((extClkVal==EXTCLK_33_33)
+ && (extClkVal==EXTCLK_50)
+ && (extClkVal==EXTCLK_66_66)
+ && (extClkVal==EXTCLK_83)) {
+ /* calculate master clock period from external clock value */
+ master_clock_per=(ONE_BILLION/extClkVal) * 1000;
+ } else {
+ /* Unsupported */
+ DEBUGF ("%s[%d] *** master clock selection failed ***\n", __FUNCTION__,__LINE__);
+ hang();
+ }
+ break;
+ default:
+ /* Unsupported */
+ DEBUGF ("%s[%d] *** master clock selection failed ***\n", __FUNCTION__,__LINE__);
+ hang();
+ break;
+ }
+
+ /* Determine FB divisors values */
+ if ((fpga_clocking_reg & FPGA_REG16_FB1_DIV_MASK) == FPGA_REG16_FB1_DIV_LOW) {
+ if ((fpga_clocking_reg & FPGA_REG16_FB2_DIV_MASK) == FPGA_REG16_FB2_DIV_LOW)
+ fb_div_selection = FPGA_FB_DIV_6;
+ else
+ fb_div_selection = FPGA_FB_DIV_12;
+ } else {
+ if ((fpga_clocking_reg & FPGA_REG16_FB2_DIV_MASK) == FPGA_REG16_FB2_DIV_LOW)
+ fb_div_selection = FPGA_FB_DIV_10;
+ else
+ fb_div_selection = FPGA_FB_DIV_20;
+ }
+
+ /* Determine VCO divisors values */
+ vco_div_reg_value = fpga_clocking_reg & FPGA_REG16_VCO_DIV_MASK;
+
+ switch(vco_div_reg_value) {
+ case FPGA_REG16_VCO_DIV_4:
+ vco_div_selection = FPGA_VCO_DIV_4;
+ break;
+ case FPGA_REG16_VCO_DIV_6:
+ vco_div_selection = FPGA_VCO_DIV_6;
+ break;
+ case FPGA_REG16_VCO_DIV_8:
+ vco_div_selection = FPGA_VCO_DIV_8;
+ break;
+ case FPGA_REG16_VCO_DIV_10:
+ default:
+ vco_div_selection = FPGA_VCO_DIV_10;
+ break;
+ }
+
+ if (master_clock_selection == FPGA_REG16_MASTER_CLK_EXT) {
+ switch(master_clock_per) {
+ case PERIOD_25_00MHZ:
+ if (fb_div_selection == FPGA_FB_DIV_12) {
+ if (vco_div_selection == FPGA_VCO_DIV_4)
+ sys_per = PERIOD_75_00MHZ;
+ if (vco_div_selection == FPGA_VCO_DIV_6)
+ sys_per = PERIOD_50_00MHZ;
+ }
+ break;
+ case PERIOD_33_33MHZ:
+ if (fb_div_selection == FPGA_FB_DIV_6) {
+ if (vco_div_selection == FPGA_VCO_DIV_4)
+ sys_per = PERIOD_50_00MHZ;
+ if (vco_div_selection == FPGA_VCO_DIV_6)
+ sys_per = PERIOD_33_33MHZ;
+ }
+ if (fb_div_selection == FPGA_FB_DIV_10) {
+ if (vco_div_selection == FPGA_VCO_DIV_4)
+ sys_per = PERIOD_83_33MHZ;
+ if (vco_div_selection == FPGA_VCO_DIV_10)
+ sys_per = PERIOD_33_33MHZ;
+ }
+ if (fb_div_selection == FPGA_FB_DIV_12) {
+ if (vco_div_selection == FPGA_VCO_DIV_4)
+ sys_per = PERIOD_100_00MHZ;
+ if (vco_div_selection == FPGA_VCO_DIV_6)
+ sys_per = PERIOD_66_66MHZ;
+ if (vco_div_selection == FPGA_VCO_DIV_8)
+ sys_per = PERIOD_50_00MHZ;
+ }
+ break;
+ case PERIOD_50_00MHZ:
+ if (fb_div_selection == FPGA_FB_DIV_6) {
+ if (vco_div_selection == FPGA_VCO_DIV_4)
+ sys_per = PERIOD_75_00MHZ;
+ if (vco_div_selection == FPGA_VCO_DIV_6)
+ sys_per = PERIOD_50_00MHZ;
+ }
+ if (fb_div_selection == FPGA_FB_DIV_10) {
+ if (vco_div_selection == FPGA_VCO_DIV_6)
+ sys_per = PERIOD_83_33MHZ;
+ if (vco_div_selection == FPGA_VCO_DIV_10)
+ sys_per = PERIOD_50_00MHZ;
+ }
+ if (fb_div_selection == FPGA_FB_DIV_12) {
+ if (vco_div_selection == FPGA_VCO_DIV_6)
+ sys_per = PERIOD_100_00MHZ;
+ if (vco_div_selection == FPGA_VCO_DIV_8)
+ sys_per = PERIOD_75_00MHZ;
+ }
+ break;
+ case PERIOD_66_66MHZ:
+ if (fb_div_selection == FPGA_FB_DIV_6) {
+ if (vco_div_selection == FPGA_VCO_DIV_4)
+ sys_per = PERIOD_100_00MHZ;
+ if (vco_div_selection == FPGA_VCO_DIV_6)
+ sys_per = PERIOD_66_66MHZ;
+ if (vco_div_selection == FPGA_VCO_DIV_8)
+ sys_per = PERIOD_50_00MHZ;
+ }
+ if (fb_div_selection == FPGA_FB_DIV_10) {
+ if (vco_div_selection == FPGA_VCO_DIV_8)
+ sys_per = PERIOD_83_33MHZ;
+ if (vco_div_selection == FPGA_VCO_DIV_10)
+ sys_per = PERIOD_66_66MHZ;
+ }
+ if (fb_div_selection == FPGA_FB_DIV_12) {
+ if (vco_div_selection == FPGA_VCO_DIV_8)
+ sys_per = PERIOD_100_00MHZ;
+ }
+ break;
+ default:
+ break;
+ }
+
+ if (sys_per == 0) {
+ /* Other combinations are not supported */
+ DEBUGF ("%s[%d] *** sys period compute failed ***\n", __FUNCTION__,__LINE__);
+ hang();
+ }
+ } else {
+ /* calcul system clock without cheking */
+ /* if engineering option clock no check is selected */
+ /* sys_per = master_clock_per * vco_div_selection / fb_div_selection */
+ sys_per = (master_clock_per/fb_div_selection) * vco_div_selection;
+ }
+
+ return(sys_per);
+
+}
+
+/*-------------------------------------------------------------------------+
+| determine_pci_clock_per.
++-------------------------------------------------------------------------*/
+unsigned long determine_pci_clock_per(void)
+{
+ unsigned long pci_clock_selection, pci_period;
+
+ /*-------------------------------------------------------------------------+
+ | Read FPGA reg 6 to get PCI 0 FPGA reg information
+ +-------------------------------------------------------------------------*/
+ pci_clock_selection = in16(FPGA_REG16); /* was reg6 averifier */
+
+
+ pci_clock_selection = pci_clock_selection & FPGA_REG16_PCI0_CLK_MASK;
+
+ switch (pci_clock_selection) {
+ case FPGA_REG16_PCI0_CLK_133_33:
+ pci_period = PERIOD_133_33MHZ;
+ break;
+ case FPGA_REG16_PCI0_CLK_100:
+ pci_period = PERIOD_100_00MHZ;
+ break;
+ case FPGA_REG16_PCI0_CLK_66_66:
+ pci_period = PERIOD_66_66MHZ;
+ break;
+ default:
+ pci_period = PERIOD_33_33MHZ;;
+ break;
+ }
+
+ return(pci_period);
}
#endif
@@ -522,8 +772,6 @@ ulong get_PCI_freq (void)
int get_clocks (void)
{
#if defined(CONFIG_405GP) || defined(CONFIG_405CR) || defined(CONFIG_440) || defined(CONFIG_405) || defined(CONFIG_405EP)
- DECLARE_GLOBAL_DATA_PTR;
-
sys_info_t sys_info;
get_sys_info (&sys_info);
@@ -533,8 +781,6 @@ int get_clocks (void)
#endif /* defined(CONFIG_405GP) || defined(CONFIG_405CR) */
#ifdef CONFIG_IOP480
- DECLARE_GLOBAL_DATA_PTR;
-
gd->cpu_clk = 66000000;
gd->bus_clk = 66000000;
#endif
diff --git a/cpu/ppc4xx/start.S b/cpu/ppc4xx/start.S
index 48b430d14d..699fa7fd75 100644
--- a/cpu/ppc4xx/start.S
+++ b/cpu/ppc4xx/start.S
@@ -155,6 +155,11 @@
/**************************************************************************/
_start_440:
+ /*----------------------------------------------------------------+
+ | Core bug fix. Clear the esr
+ +-----------------------------------------------------------------*/
+ li r0,0
+ mtspr esr,r0
/*----------------------------------------------------------------*/
/* Clear and set up some registers. */
/*----------------------------------------------------------------*/
@@ -166,7 +171,7 @@ _start_440:
mtspr srr1,r0
mtspr csrr0,r0
mtspr csrr1,r0
-#if defined(CONFIG_440GX) || defined(CONFIG_440SP) /* NOTE: 440GX adds machine check status regs */
+#if defined(CONFIG_440GX) || defined(CONFIG_440SP) || defined(CONFIG_440SPE) /* NOTE: 440GX adds machine check status regs */
mtspr mcsrr0,r0
mtspr mcsrr1,r0
mfspr r1, mcsr
@@ -200,6 +205,31 @@ _start_440:
ori r1,r1,0x6000 /* cache touch */
mtspr ccr0,r1
+#if defined (CONFIG_440SPE)
+ /*----------------------------------------------------------------+
+ | Initialize Core Configuration Reg1.
+ | a. ICDPEI: Record even parity. Normal operation.
+ | b. ICTPEI: Record even parity. Normal operation.
+ | c. DCTPEI: Record even parity. Normal operation.
+ | d. DCDPEI: Record even parity. Normal operation.
+ | e. DCUPEI: Record even parity. Normal operation.
+ | f. DCMPEI: Record even parity. Normal operation.
+ | g. FCOM: Normal operation
+ | h. MMUPEI: Record even parity. Normal operation.
+ | i. FFF: Flush only as much data as necessary.
+ | j. TCS: Timebase increments from CPU clock.
+ +-----------------------------------------------------------------*/
+ li r0,0
+ mtspr ccr1, r0
+
+ /*----------------------------------------------------------------+
+ | Reset the timebase.
+ | The previous write to CCR1 sets the timebase source.
+ +-----------------------------------------------------------------*/
+ mtspr tbl, r0
+ mtspr tbu, r0
+#endif
+
/*----------------------------------------------------------------*/
/* Setup interrupt vectors */
/*----------------------------------------------------------------*/
@@ -261,15 +291,26 @@ _start_440:
mtspr ivlim,r1
mtspr dvlim,r1
+ /*----------------------------------------------------------------+
+ |Initialize MMUCR[STID] = 0.
+ +-----------------------------------------------------------------*/
+ mfspr r0,mmucr
+ addis r1,0,0xFFFF
+ ori r1,r1,0xFF00
+ and r0,r0,r1
+ mtspr mmucr,r0
+
/*----------------------------------------------------------------*/
/* Clear all TLB entries -- TID = 0, TS = 0 */
/*----------------------------------------------------------------*/
- mtspr mmucr,r0
+ addis r0,0,0x0000
li r1,0x003f /* 64 TLB entries */
mtctr r1
-0: tlbwe r0,r1,0x0000 /* Invalidate all entries (V=0)*/
+rsttlb: tlbwe r0,r1,0x0000 /* Invalidate all entries (V=0)*/
+ tlbwe r0,r1,0x0001
+ tlbwe r0,r1,0x0002
subi r1,r1,0x0001
- bdnz 0b
+ bdnz rsttlb
/*----------------------------------------------------------------*/
/* TLB entry setup -- step thru tlbtab */
@@ -340,23 +381,6 @@ _start:
mtspr tcr,r0 /* disable all */
mtspr esr,r0 /* clear exception syndrome register */
mtxer r0 /* clear integer exception register */
-#if !defined(CONFIG_440GX)
- lis r1,0x0002 /* set CE bit (Critical Exceptions) */
- ori r1,r1,0x1000 /* set ME bit (Machine Exceptions) */
- mtmsr r1 /* change MSR */
-#elif !defined(CONFIG_440EP) && !defined(CONFIG_440GR)
- bl __440gx_msr_set
- b __440gx_msr_continue
-
-__440gx_msr_set:
- lis r1, 0x0002 /* set CE bit (Critical Exceptions) */
- ori r1,r1,0x1000 /* set ME bit (Machine Exceptions) */
- mtspr srr1,r1
- mflr r1
- mtspr srr0,r1
- rfi
-__440gx_msr_continue:
-#endif
/*----------------------------------------------------------------*/
/* Debug setup -- some (not very good) ice's need an event*/
@@ -394,7 +418,7 @@ __440gx_msr_continue:
addi r3,r3,32
bdnz ..d_ag
#else
-#if defined (CONFIG_440GX) || defined(CONFIG_440SP)
+#if defined (CONFIG_440GX) || defined(CONFIG_440SP) || defined(CONFIG_440SPE)
mtdcr l2_cache_cfg,r0 /* Ensure L2 Cache is off */
#endif
mtdcr isram0_sb1cr,r0 /* Disable bank 1 */
@@ -421,6 +445,19 @@ __440gx_msr_continue:
lis r1, 0x8003
ori r1,r1, 0x0980 /* fourth 64k */
mtdcr isram0_sb3cr,r1
+#elif defined(CONFIG_440SPE)
+ lis r1,0x0000 /* BAS = 0000_0000 */
+ ori r1,r1,0x0984 /* first 64k */
+ mtdcr isram0_sb0cr,r1
+ lis r1,0x0001
+ ori r1,r1,0x0984 /* second 64k */
+ mtdcr isram0_sb1cr,r1
+ lis r1, 0x0002
+ ori r1,r1, 0x0984 /* third 64k */
+ mtdcr isram0_sb2cr,r1
+ lis r1, 0x0003
+ ori r1,r1, 0x0984 /* fourth 64k */
+ mtdcr isram0_sb3cr,r1
#else
ori r1,r1,0x0380 /* 8k rw */
mtdcr isram0_sb0cr,r1
@@ -458,9 +495,6 @@ __440gx_msr_continue:
mtspr esr,r0 /* clear Exception Syndrome Reg */
mttcr r0 /* timer control register */
mtexier r0 /* disable all interrupts */
- addi r4,r0,0x1000 /* set ME bit (Machine Exceptions) */
- oris r4,r4,0x2 /* set CE bit (Critical Exceptions) */
- mtmsr r4 /* change MSR */
addis r4,r0,0xFFFF /* set r4 to 0xFFFFFFFF (status in the */
ori r4,r4,0xFFFF /* dbsr is cleared by setting bits to 1) */
mtdbsr r4 /* clear/reset the dbsr */
@@ -571,9 +605,6 @@ __440gx_msr_continue:
mttcr r4 /* clear Timer Control Reg */
mtxer r4 /* clear Fixed-Point Exception Reg */
mtevpr r4 /* clear Exception Vector Prefix Reg */
- addi r4,r0,0x1000 /* set ME bit (Machine Exceptions) */
- oris r4,r4,0x0002 /* set CE bit (Critical Exceptions) */
- mtmsr r4 /* change MSR */
addi r4,r0,(0xFFFF-0x10000) /* set r4 to 0xFFFFFFFF (status in the */
/* dbsr is cleared by setting bits to 1) */
mtdbsr r4 /* clear/reset the dbsr */
@@ -1220,13 +1251,20 @@ ppcSync:
*/
.globl relocate_code
relocate_code:
-#if defined(CONFIG_440EP) || defined(CONFIG_440GR)
- dccci 0,0 /* Invalidate data cache, now no longer our stack */
+#if defined(CONFIG_440EP) || defined(CONFIG_440GR) || defined(CONFIG_440SPE)
+ /*
+ * On some 440er platforms the cache is enabled in the first TLB (Boot-CS)
+ * to speed up the boot process. Now this cache needs to be disabled.
+ */
+ iccci 0,0 /* Invalidate inst cache */
+ dccci 0,0 /* Invalidate data cache, now no longer our stack */
sync
+ isync
addi r1,r0,0x0000 /* TLB entry #0 */
tlbre r0,r1,0x0002 /* Read contents */
ori r0,r0,0x0c00 /* Or in the inhibit, write through bit */
tlbwe r0,r1,0x0002 /* Save it out */
+ sync
isync
#endif
mr r1, r3 /* Set new stack pointer */
@@ -1428,6 +1466,24 @@ trap_init:
cmplw 0, r7, r8
blt 4b
+#if !defined(CONFIG_440GX) && !defined(CONFIG_440SPE)
+ addi r7,r0,0x1000 /* set ME bit (Machine Exceptions) */
+ oris r7,r7,0x0002 /* set CE bit (Critical Exceptions) */
+ mtmsr r7 /* change MSR */
+#else
+ bl __440gx_msr_set
+ b __440gx_msr_continue
+
+__440gx_msr_set:
+ addi r7,r0,0x1000 /* set ME bit (Machine Exceptions) */
+ oris r7,r7,0x0002 /* set CE bit (Critical Exceptions) */
+ mtspr srr1,r7
+ mflr r7
+ mtspr srr0,r7
+ rfi
+__440gx_msr_continue:
+#endif
+
mtlr r4 /* restore link register */
blr
diff --git a/cpu/ppc4xx/vecnum.h b/cpu/ppc4xx/vecnum.h
index cbfe41db9c..93cef026a3 100644
--- a/cpu/ppc4xx/vecnum.h
+++ b/cpu/ppc4xx/vecnum.h
@@ -31,7 +31,48 @@
#ifndef _VECNUMS_H_
#define _VECNUMS_H_
-#if defined(CONFIG_440SP)
+#if defined(CONFIG_440SPE)
+/* UIC 0 */
+#define VECNUM_U0 0 /* UART0 */
+#define VECNUM_U1 1 /* UART1 */
+#define VECNUM_IIC0 2 /* IIC0 */
+#define VECNUM_IIC1 3 /* IIC1 */
+#define VECNUM_PIM 4 /* PCI inbound message */
+#define VECNUM_PCRW 5 /* PCI command reg write */
+#define VECNUM_PPM 6 /* PCI power management */
+#define VECNUM_MSI0 7 /* PCI MSI level 0 */
+#define VECNUM_MSI1 8 /* PCI MSI level 0 */
+#define VECNUM_MSI2 9 /* PCI MSI level 0 */
+#define VECNUM_D0 12 /* DMA channel 0 */
+#define VECNUM_D1 13 /* DMA channel 1 */
+#define VECNUM_D2 14 /* DMA channel 2 */
+#define VECNUM_D3 15 /* DMA channel 3 */
+#define VECNUM_UIC1NC 30 /* UIC1 non-critical interrupt */
+#define VECNUM_UIC1C 31 /* UIC1 critical interrupt */
+
+/* UIC 1 */
+#define VECNUM_MS (32 + 1 ) /* MAL SERR */
+#define VECNUM_TXDE (32 + 2 ) /* MAL TXDE */
+#define VECNUM_RXDE (32 + 3 ) /* MAL RXDE */
+#define VECNUM_MTE (32 + 6 ) /* MAL Tx EOB */
+#define VECNUM_MRE (32 + 7 ) /* MAL Rx EOB */
+#define VECNUM_CT0 (32 + 12 ) /* GPT compare timer 0 */
+#define VECNUM_CT1 (32 + 13 ) /* GPT compare timer 1 */
+#define VECNUM_CT2 (32 + 14 ) /* GPT compare timer 2 */
+#define VECNUM_CT3 (32 + 15 ) /* GPT compare timer 3 */
+#define VECNUM_CT4 (32 + 16 ) /* GPT compare timer 4 */
+#define VECNUM_ETH0 (32 + 28) /* Ethernet interrupt status */
+#define VECNUM_EWU0 (32 + 29) /* Emac wakeup */
+
+/* UIC 2 */
+#define VECNUM_EIR5 (62 + 24) /* External interrupt 5 */
+#define VECNUM_EIR4 (62 + 25) /* External interrupt 4 */
+#define VECNUM_EIR3 (62 + 26) /* External interrupt 3 */
+#define VECNUM_EIR2 (62 + 27) /* External interrupt 2 */
+#define VECNUM_EIR1 (62 + 28) /* External interrupt 1 */
+#define VECNUM_EIR0 (62 + 29) /* External interrupt 0 */
+
+#elif defined(CONFIG_440SP)
/* UIC 0 */
#define VECNUM_U0 0 /* UART0 */
diff --git a/cpu/pxa/cpu.c b/cpu/pxa/cpu.c
index d1551ddc38..0ee8180361 100644
--- a/cpu/pxa/cpu.c
+++ b/cpu/pxa/cpu.c
@@ -34,14 +34,16 @@
#include <command.h>
#include <asm/arch/pxa-regs.h>
+#ifdef CONFIG_USE_IRQ
+DECLARE_GLOBAL_DATA_PTR;
+#endif
+
int cpu_init (void)
{
/*
* setup up stacks if necessary
*/
#ifdef CONFIG_USE_IRQ
- DECLARE_GLOBAL_DATA_PTR;
-
IRQ_STACK_START = _armboot_start - CFG_MALLOC_LEN - CFG_GBL_DATA_SIZE - 4;
FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ;
#endif
@@ -143,6 +145,7 @@ int dcache_status (void)
return 0; /* always off */
}
+#ifndef CONFIG_CPU_MONAHANS
void set_GPIO_mode(int gpio_mode)
{
int gpio = gpio_mode & GPIO_MD_MASK_NR;
@@ -160,3 +163,4 @@ void set_GPIO_mode(int gpio_mode)
gafr = GAFR(gpio) & ~(0x3 << (((gpio) & 0xf)*2));
GAFR(gpio) = gafr | (fn << (((gpio) & 0xf)*2));
}
+#endif /* CONFIG_CPU_MONAHANS */
diff --git a/cpu/pxa/i2c.c b/cpu/pxa/i2c.c
index b6155b137e..722d949473 100644
--- a/cpu/pxa/i2c.c
+++ b/cpu/pxa/i2c.c
@@ -47,7 +47,13 @@
/*#define DEBUG_I2C 1 /###* activate local debugging output */
#define I2C_PXA_SLAVE_ADDR 0x1 /* slave pxa unit address */
-#define I2C_ICR_INIT (ICR_BEIE | ICR_IRFIE | ICR_ITEIE | ICR_GCD | ICR_SCLE)
+
+#if (CFG_I2C_SPEED == 400000)
+#define I2C_ICR_INIT (ICR_FM | ICR_BEIE | ICR_IRFIE | ICR_ITEIE | ICR_GCD | ICR_SCLE)
+#else
+#define I2C_ICR_INIT (ICR_BEIE | ICR_IRFIE | ICR_ITEIE | ICR_GCD | ICR_SCLE)
+#endif
+
#define I2C_ISR_INIT 0x7FF
#ifdef DEBUG_I2C
@@ -91,7 +97,11 @@ static void i2c_reset( void )
ICR |= ICR_UR; /* reset the unit */
udelay(100);
ICR &= ~ICR_IUE; /* disable unit */
+#ifdef CONFIG_CPU_MONAHANS
+ CKENB |= (CKENB_4_I2C); /* | CKENB_1_PWM1 | CKENB_0_PWM0); */
+#else /* CONFIG_CPU_MONAHANS */
CKEN |= CKEN14_I2C; /* set the global I2C clock on */
+#endif
ISAR = I2C_PXA_SLAVE_ADDR; /* set our slave address */
ICR = I2C_ICR_INIT; /* set control register values */
ISR = I2C_ISR_INIT; /* set clear interrupt bits */
@@ -104,9 +114,8 @@ static void i2c_reset( void )
* i2c_isr_set_cleared: - wait until certain bits of the I2C status register
* are set and cleared
*
- * @return: 0 in case of success, 1 means timeout (no match within 10 ms).
+ * @return: 1 in case of success, 0 means timeout (no match within 10 ms).
*/
-
static int i2c_isr_set_cleared( unsigned long set_mask, unsigned long cleared_mask )
{
int timeout = 10000;
@@ -360,9 +369,9 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
msg.data = 0x00;
if ((ret=i2c_transfer(&msg))) return -1;
- *(buffer++) = msg.data;
-
+ *buffer = msg.data;
PRINTD(("i2c_read: reading byte (0x%08x)=0x%02x\n",(unsigned int)buffer,*buffer));
+ buffer++;
}
diff --git a/cpu/pxa/serial.c b/cpu/pxa/serial.c
index cedebfe496..cb3a478990 100644
--- a/cpu/pxa/serial.c
+++ b/cpu/pxa/serial.c
@@ -32,10 +32,10 @@
#include <watchdog.h>
#include <asm/arch/pxa-regs.h>
+DECLARE_GLOBAL_DATA_PTR;
+
void serial_setbrg (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
unsigned int quot = 0;
if (gd->baudrate == 1200)
@@ -54,7 +54,11 @@ void serial_setbrg (void)
hang ();
#ifdef CONFIG_FFUART
+#ifdef CONFIG_CPU_MONAHANS
+ CKENA |= CKENA_22_FFUART;
+#else
CKEN |= CKEN6_FFUART;
+#endif /* CONFIG_CPU_MONAHANS */
FFIER = 0; /* Disable for now */
FFFCR = 0; /* No fifos enabled */
@@ -68,7 +72,11 @@ void serial_setbrg (void)
FFIER = IER_UUE; /* Enable FFUART */
#elif defined(CONFIG_BTUART)
+#ifdef CONFIG_CPU_MONAHANS
+ CKENA |= CKENA_21_BTUART;
+#else
CKEN |= CKEN7_BTUART;
+#endif /* CONFIG_CPU_MONAHANS */
BTIER = 0;
BTFCR = 0;
@@ -82,7 +90,11 @@ void serial_setbrg (void)
BTIER = IER_UUE; /* Enable BFUART */
#elif defined(CONFIG_STUART)
+#ifdef CONFIG_CPU_MONAHANS
+ CKENA |= CKENA_23_STUART;
+#else
CKEN |= CKEN5_STUART;
+#endif /* CONFIG_CPU_MONAHANS */
STIER = 0;
STFCR = 0;
diff --git a/cpu/pxa/start.S b/cpu/pxa/start.S
index a8cc0800b0..ffaa30fdc5 100644
--- a/cpu/pxa/start.S
+++ b/cpu/pxa/start.S
@@ -6,8 +6,8 @@
* Copyright (C) 2000 Wolfgang Denk <wd@denx.de>
* Copyright (C) 2001 Alex Zuepke <azu@sysgo.de>
* Copyright (C) 2002 Kyle Harris <kharris@nexus-tech.net>
- * Copyright (C) 2003 Robert Schwebel <r.schwebel@pengutronix.de>
- * Copyright (C) 2003 Kai-Uwe Bloem <kai-uwe.bloem@auerswald.de>
+ * Copyright (C) 2003 Robert Schwebel <r.schwebel@pengutronix.de>
+ * Copyright (C) 2003 Kai-Uwe Bloem <kai-uwe.bloem@auerswald.de>
*
* See file CREDITS for list of people who contributed to this
* project.
@@ -30,6 +30,7 @@
#include <config.h>
#include <version.h>
+#include <asm/arch/pxa-regs.h>
.globl _start
_start: b reset
@@ -116,13 +117,13 @@ reset:
relocate: /* relocate U-Boot to RAM */
adr r0, _start /* r0 <- current position of code */
ldr r1, _TEXT_BASE /* test if we run from flash or RAM */
- cmp r0, r1 /* don't reloc during debug */
- beq stack_setup
+ cmp r0, r1 /* don't reloc during debug */
+ beq stack_setup
ldr r2, _armboot_start
ldr r3, _bss_start
- sub r2, r3, r2 /* r2 <- size of armboot */
- add r2, r0, r2 /* r2 <- source end address */
+ sub r2, r3, r2 /* r2 <- size of armboot */
+ add r2, r0, r2 /* r2 <- source end address */
copy_loop:
ldmia r0!, {r3-r10} /* copy from source address [r0] */
@@ -134,19 +135,19 @@ copy_loop:
/* Set up the stack */
stack_setup:
ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */
- sub r0, r0, #CFG_MALLOC_LEN /* malloc area */
- sub r0, r0, #CFG_GBL_DATA_SIZE /* bdinfo */
+ sub r0, r0, #CFG_MALLOC_LEN /* malloc area */
+ sub r0, r0, #CFG_GBL_DATA_SIZE /* bdinfo */
#ifdef CONFIG_USE_IRQ
sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
#endif
sub sp, r0, #12 /* leave 3 words for abort-stack */
clear_bss:
- ldr r0, _bss_start /* find start of bss segment */
- ldr r1, _bss_end /* stop here */
- mov r2, #0x00000000 /* clear */
+ ldr r0, _bss_start /* find start of bss segment */
+ ldr r1, _bss_end /* stop here */
+ mov r2, #0x00000000 /* clear */
-clbss_l:str r2, [r0] /* clear loop... */
+clbss_l:str r2, [r0] /* clear loop... */
add r0, r0, #4
cmp r0, r1
ble clbss_l
@@ -164,8 +165,16 @@ _start_armboot: .word start_armboot
/* - setup memory timing */
/* */
/****************************************************************************/
+/* mk@tbd: Fix this! */
+#ifdef CONFIG_CPU_MONAHANS
+#undef ICMR
+#undef OSMR3
+#undef OSCR
+#undef OWER
+#undef OIER
+#endif
-/* Interrupt-Controller base address */
+/* Interrupt-Controller base address */
IC_BASE: .word 0x40d00000
#define ICMR 0x04
@@ -180,7 +189,15 @@ OSTIMER_BASE: .word 0x40a00000
#define OWER 0x18
#define OIER 0x1C
-/* Clock Manager Registers */
+/* Clock Manager Registers */
+#ifdef CONFIG_CPU_MONAHANS
+# ifndef CFG_MONAHANS_RUN_MODE_OSC_RATIO
+# error "You have to define CFG_MONAHANS_RUN_MODE_OSC_RATIO!!"
+# endif
+# ifndef CFG_MONAHANS_TURBO_RUN_MODE_RATIO
+# define CFG_MONAHANS_TURBO_RUN_MODE_RATIO 0x1
+# endif
+#else /* ! CONFIG_CPU_MONAHANS */
#ifdef CFG_CPUSPEED
CC_BASE: .word 0x41300000
#define CCCR 0x00
@@ -188,26 +205,50 @@ cpuspeed: .word CFG_CPUSPEED
#else
#error "You have to define CFG_CPUSPEED!!"
#endif
+#endif /* CONFIG_CPU_MONAHANS */
-
- /* RS: ??? */
- .macro CPWAIT
- mrc p15,0,r0,c2,c0,0
- mov r0,r0
+ /* takes care the CP15 update has taken place */
+ .macro CPWAIT reg
+ mrc p15,0,\reg,c2,c0,0
+ mov \reg,\reg
sub pc,pc,#4
.endm
-
cpu_init_crit:
/* mask all IRQs */
+#ifndef CONFIG_CPU_MONAHANS
ldr r0, IC_BASE
mov r1, #0x00
str r1, [r0, #ICMR]
-
-#if defined(CFG_CPUSPEED)
+#else
+ /* Step 1 - Enable CP6 permission */
+ mrc p15, 0, r1, c15, c1, 0 @ read CPAR
+ orr r1, r1, #0x40
+ mcr p15, 0, r1, c15, c1, 0
+ CPWAIT r1
+
+ /* Step 2 - Mask ICMR & ICMR2 */
+ mov r1, #0
+ mcr p6, 0, r1, c1, c0, 0 @ ICMR
+ mcr p6, 0, r1, c7, c0, 0 @ ICMR2
+
+ /* turn off all clocks but the ones we will definitly require */
+ ldr r1, =CKENA
+ ldr r2, =(CKENA_22_FFUART | CKENA_10_SRAM | CKENA_9_SMC | CKENA_8_DMC)
+ str r2, [r1]
+ ldr r1, =CKENB
+ ldr r2, =(CKENB_6_IRQ)
+ str r2, [r1]
+#endif
/* set clock speed */
+#ifdef CONFIG_CPU_MONAHANS
+ ldr r0, =ACCR
+ ldr r1, =(((CFG_MONAHANS_TURBO_RUN_MODE_RATIO<<8) & ACCR_XN_MASK) | (CFG_MONAHANS_RUN_MODE_OSC_RATIO & ACCR_XL_MASK))
+ str r1, [r0]
+#else /* ! CONFIG_CPU_MONAHANS */
+#ifdef CFG_CPUSPEED
ldr r0, CC_BASE
ldr r1, cpuspeed
str r1, [r0, #CCCR]
@@ -215,7 +256,9 @@ cpu_init_crit:
mcr p14, 0, r0, c6, c0, 0
setspeed_done:
-#endif
+
+#endif /* CFG_CPUSPEED */
+#endif /* CONFIG_CPU_MONAHANS */
/*
* before relocating, we have to setup RAM timing
@@ -227,19 +270,21 @@ setspeed_done:
mov lr, ip
/* Memory interfaces are working. Disable MMU and enable I-cache. */
+ /* mk: hmm, this is not in the monahans docs, leave it now but
+ * check here if it doesn't work :-) */
ldr r0, =0x2001 /* enable access to all coproc. */
mcr p15, 0, r0, c15, c1, 0
- CPWAIT
+ CPWAIT r0
mcr p15, 0, r0, c7, c10, 4 /* drain the write & fill buffers */
- CPWAIT
+ CPWAIT r0
mcr p15, 0, r0, c7, c7, 0 /* flush Icache, Dcache and BTB */
- CPWAIT
+ CPWAIT r0
mcr p15, 0, r0, c8, c7, 0 /* flush instuction and data TLBs */
- CPWAIT
+ CPWAIT r0
/* Enable the Icache */
/*
@@ -292,7 +337,7 @@ setspeed_done:
ldr r2, _armboot_start
sub r2, r2, #(CONFIG_STACKSIZE+CFG_MALLOC_LEN)
- sub r2, r2, #(CFG_GBL_DATA_SIZE+8) @ set base 2 words into abort stack
+ sub r2, r2, #(CFG_GBL_DATA_SIZE+8) @ set base 2 words into abort stack
ldmia r2, {r2 - r4} /* get pc, cpsr, old_r0 */
add r0, sp, #S_FRAME_SIZE /* restore sp_SVC */
@@ -419,17 +464,17 @@ fiq:
#endif
/****************************************************************************/
-/* */
+/* */
/* Reset function: the PXA250 doesn't have a reset function, so we have to */
-/* perform a watchdog timeout for a soft reset. */
-/* */
+/* perform a watchdog timeout for a soft reset. */
+/* */
/****************************************************************************/
.align 5
.globl reset_cpu
- /* FIXME: this code is PXA250 specific. How is this handled on */
- /* other XScale processors? */
+ /* FIXME: this code is PXA250 specific. How is this handled on */
+ /* other XScale processors? */
reset_cpu:
@@ -437,13 +482,13 @@ reset_cpu:
ldr r0, OSTIMER_BASE
ldr r1, [r0, #OWER]
- orr r1, r1, #0x0001 /* bit0: WME */
+ orr r1, r1, #0x0001 /* bit0: WME */
str r1, [r0, #OWER]
/* OS timer does only wrap every 1165 seconds, so we have to set */
- /* the match register as well. */
+ /* the match register as well. */
- ldr r1, [r0, #OSCR] /* read OS timer */
+ ldr r1, [r0, #OSCR] /* read OS timer */
add r1, r1, #0x800 /* let OSMR3 match after */
add r1, r1, #0x800 /* 4096*(1/3.6864MHz)=1ms */
str r1, [r0, #OSMR3]
diff --git a/cpu/s3c44b0/serial.c b/cpu/s3c44b0/serial.c
index 70b4ee811c..95d0266c6c 100644
--- a/cpu/s3c44b0/serial.c
+++ b/cpu/s3c44b0/serial.c
@@ -37,6 +37,8 @@
#include <common.h>
#include <asm/hardware.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/* flush serial input queue. returns 0 on success or negative error
* number otherwise
*/
@@ -68,8 +70,6 @@ static int serial_flush_output(void)
void serial_setbrg (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
u32 divisor = 0;
/* get correct divisor */
diff --git a/cpu/sa1100/cpu.c b/cpu/sa1100/cpu.c
index 17e5b0d195..f1bd644093 100644
--- a/cpu/sa1100/cpu.c
+++ b/cpu/sa1100/cpu.c
@@ -33,14 +33,16 @@
#include <common.h>
#include <command.h>
+#ifdef CONFIG_USE_IRQ
+DECLARE_GLOBAL_DATA_PTR;
+#endif
+
int cpu_init (void)
{
/*
* setup up stacks if necessary
*/
#ifdef CONFIG_USE_IRQ
- DECLARE_GLOBAL_DATA_PTR;
-
IRQ_STACK_START = _armboot_start - CFG_MALLOC_LEN - CFG_GBL_DATA_SIZE - 4;
FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ;
#endif
diff --git a/cpu/sa1100/serial.c b/cpu/sa1100/serial.c
index a598489df7..5d1887580d 100644
--- a/cpu/sa1100/serial.c
+++ b/cpu/sa1100/serial.c
@@ -31,10 +31,10 @@
#include <common.h>
#include <SA-1100.h>
+DECLARE_GLOBAL_DATA_PTR;
+
void serial_setbrg (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
unsigned int reg = 0;
if (gd->baudrate == 1200)
diff --git a/doc/README.440-DDR-performance b/doc/README.440-DDR-performance
new file mode 100644
index 0000000000..17bc74764b
--- /dev/null
+++ b/doc/README.440-DDR-performance
@@ -0,0 +1,90 @@
+AMCC suggested to set the PMU bit to 0 for best performace on the
+PPC440 DDR controller. The 440er common DDR setup files (sdram.c &
+spd_sdram.c) are changed accordingly. So all 440er boards using
+these setup routines will automatically receive this performance
+increase.
+
+Please see below some benchmarks done by AMCC to demonstrate this
+performance changes:
+
+
+----------------------------------------
+SDRAM0_CFG0[PMU] = 1 (U-boot default for Bamboo, Yosemite and Yellowstone)
+----------------------------------------
+Stream benchmark results
+-------------------------------------------------------------
+This system uses 8 bytes per DOUBLE PRECISION word.
+-------------------------------------------------------------
+Array size = 2000000, Offset = 0
+Total memory required = 45.8 MB.
+Each test is run 10 times, but only
+the *best* time for each is used.
+-------------------------------------------------------------
+Your clock granularity/precision appears to be 1 microseconds.
+Each test below will take on the order of 112345 microseconds.
+ (= 112345 clock ticks)
+Increase the size of the arrays if this shows that you are not getting
+at least 20 clock ticks per test.
+-------------------------------------------------------------
+WARNING -- The above is only a rough guideline.
+For best results, please be sure you know the precision of your system
+timer.
+-------------------------------------------------------------
+Function Rate (MB/s) RMS time Min time Max time
+Copy: 256.7683 0.1248 0.1246 0.1250
+Scale: 246.0157 0.1302 0.1301 0.1302
+Add: 255.0316 0.1883 0.1882 0.1885
+Triad: 253.1245 0.1897 0.1896 0.1899
+
+
+TTCP Benchmark Results
+ttcp-t: socket
+ttcp-t: connect
+ttcp-t: buflen=8192, nbuf=2048, align=16384/0, port=5000 tcp ->
+localhost
+ttcp-t: 16777216 bytes in 0.28 real seconds = 454.29 Mbit/sec +++
+ttcp-t: 2048 I/O calls, msec/call = 0.14, calls/sec = 7268.57
+ttcp-t: 0.0user 0.1sys 0:00real 60% 0i+0d 0maxrss 0+2pf 3+1506csw
+
+----------------------------------------
+SDRAM0_CFG0[PMU] = 0 (Suggested modification)
+Setting PMU = 0 provides a noticeable performance improvement *2% to
+5% improvement in memory performance.
+*Improves the Mbit/sec for TTCP benchmark by almost 76%.
+----------------------------------------
+Stream benchmark results
+-------------------------------------------------------------
+This system uses 8 bytes per DOUBLE PRECISION word.
+-------------------------------------------------------------
+Array size = 2000000, Offset = 0
+Total memory required = 45.8 MB.
+Each test is run 10 times, but only
+the *best* time for each is used.
+-------------------------------------------------------------
+Your clock granularity/precision appears to be 1 microseconds.
+Each test below will take on the order of 120066 microseconds.
+ (= 120066 clock ticks)
+Increase the size of the arrays if this shows that you are not getting
+at least 20 clock ticks per test.
+-------------------------------------------------------------
+WARNING -- The above is only a rough guideline.
+For best results, please be sure you know the precision of your system
+timer.
+-------------------------------------------------------------
+Function Rate (MB/s) RMS time Min time Max time
+Copy: 262.5167 0.1221 0.1219 0.1223
+Scale: 258.4856 0.1238 0.1238 0.1240
+Add: 262.5404 0.1829 0.1828 0.1831
+Triad: 266.8594 0.1800 0.1799 0.1802
+
+TTCP Benchmark Results
+ttcp-t: socket
+ttcp-t: connect
+ttcp-t: buflen=8192, nbuf=2048, align=16384/0, port=5000 tcp ->
+localhost
+ttcp-t: 16777216 bytes in 0.16 real seconds = 804.06 Mbit/sec +++
+ttcp-t: 2048 I/O calls, msec/call = 0.08, calls/sec = 12864.89
+ttcp-t: 0.0user 0.0sys 0:00real 46% 0i+0d 0maxrss 0+2pf 120+1csw
+
+
+2006-07-28, Stefan Roese <sr@denx.de>
diff --git a/doc/README.bamboo b/doc/README.bamboo
new file mode 100644
index 0000000000..b50be01ab7
--- /dev/null
+++ b/doc/README.bamboo
@@ -0,0 +1,15 @@
+The configuration for the AMCC 440EP eval board "Bamboo" was changed
+to only use 384 kbytes of FLASH for the U-Boot image. This way the
+redundant environment can be saved in the remaining 2 sectors of the
+same flash chip.
+
+Caution: With an upgrade from an earlier U-Boot version the current
+environment will be erased since the environment is now saved in
+different sectors. By using the following command the environment can
+be saved after upgrading the U-Boot image and *before* resetting the
+board:
+
+setenv recover_env 'prot off FFF80000 FFF9FFFF;era FFF80000 FFF9FFFF;' \
+ 'cp.b FFF60000 FFF80000 20000'
+
+2006-07-27, Stefan Roese <sr@denx.de>
diff --git a/doc/README.m68k b/doc/README.m68k
index d5accdd2d6..6dea2b567a 100644
--- a/doc/README.m68k
+++ b/doc/README.m68k
@@ -1,7 +1,12 @@
U-Boot for Motorola M68K
-Last Update: January 12, 2004
+====================================================================
+History
+
+August 08,2005; Jens Scharsig <esw@bus-elektronik.de>
+ MCF5282 implementation without preloader
+January 12, 2004; <josef.baumgartner@telex.de>
====================================================================
This file contains status information for the port of U-Boot to the
@@ -33,16 +38,8 @@ CPU specific code is located in: cpu/mcf52x2
-----------------------------
CPU specific code is located in: cpu/mcf52x2
-At the moment the code isn't fully implemented and still needs a pre-loader!
-The preloader must initialize the processor and then start u-boot. The board
-must be configured for a pre-loader (see 4.1)
-
-For the preloader, please see
-http://mailman.uclinux.org/pipermail/uclinux-dev/2003-December/023384.html
-
-U-boot is configured to run at 0x20000 at default. This can be configured by
-change TEXT_BASE in board/m5282evb/config.mk and CFG_MONITOR_BASE in
-include/configs/M5282EVB.h.
+The MCF5282 Port no longer needs a preloader and can place in external or
+internal FLASH.
3. SUPPORTED BOARDs
@@ -67,6 +64,27 @@ Board specific code is located in: board/m5282evb
To configure the board, type: make M5272C3_config
+At the moment the code isn't fully implemented and still needs a pre-loader!
+The preloader must initialize the processor and then start u-boot. The board
+must be configured for a pre-loader (see 4.1)
+
+For the preloader, please see
+http://mailman.uclinux.org/pipermail/uclinux-dev/2003-December/023384.html
+
+U-boot is configured to run at 0x20000 at default. This can be configured by
+change TEXT_BASE in board/m5282evb/config.mk and CFG_MONITOR_BASE in
+include/configs/M5282EVB.h.
+
+3.2 BuS EB+MCF-EV123
+---------------------
+
+Board specific code is located in: board/bus/EB+MCF-EV123
+
+To configure the board, type:
+
+make EB+MCF-EV123_config for external FLASH
+make EB+MCF-EV123_internal_config for internal FLASH
+
4. CONFIGURATION OPTIONS/SETTINGS
----------------------------------
@@ -80,7 +98,6 @@ be compiled in. The start address of u-boot must be adjusted in
the boards config header file (CFG_MONITOR_BASE) and Makefile
(TEXT_BASE) to the load address.
-
4.1 MCF5272 specific Options/Settings
-------------------------------------
@@ -123,14 +140,27 @@ CFG_INT_FLASH_BASE
CFG_ENET_BD_BASE
-- defines the base addres of the FEC buffer descriptors
+CFG_MFD
+ -- defines the PLL Multiplication Factor Devider
+ (see table 9-4 of MCF user manual)
+CFG_RFD -- defines the PLL Reduce Frecuency Devider
+ (see table 9-4 of MCF user manual)
+
+CFG_CSx_BASE -- defines the base address of chip select x
+CFG_CSx_SIZE -- defines the memory size (address range) of chip select x
+CFG_CSx_WIDTH -- defines the bus with of chip select x
+CFG_CSx_RO -- if set to 0 chip select x is read/wirte
+ else chipselct is read only
+CFG_CSx_WS -- defines the number of wait states of chip select x
+
+CFG_PxDDR -- defines the contents of the Data Direction Registers
+CFG_PxDAT -- defines the contents of the Data Registers
+CFG_PXCNT -- defines the contents of the Port Configuration Registers
+
+CFG_PxPAR -- defines the function of ports
+
5. COMPILER
-----------
To create U-Boot the gcc-2.95.3 compiler set (m68k-elf-20030314) from uClinux.org was used.
You can download it from: http://www.uclinux.org/pub/uClinux/m68k-elf-tools/
-
-
-Regards,
-
-Josef
-<josef.baumgartner@telex.de>
diff --git a/doc/README.mpc8349emds.ddrecc b/doc/README.mpc8349emds.ddrecc
new file mode 100644
index 0000000000..eb249c3956
--- /dev/null
+++ b/doc/README.mpc8349emds.ddrecc
@@ -0,0 +1,154 @@
+Overview
+========
+
+The overall usage pattern for ECC diagnostic commands is the following:
+
+ * (injecting errors is initially disabled)
+
+ * define inject mask (which tells the DDR controller what type of errors
+ we'll be injecting: single/multiple bit etc.)
+
+ * enable injecting errors - from now on the controller injects errors as
+ indicated in the inject mask
+
+IMPORTANT NOTICE: enabling injecting multiple-bit errors is potentially
+dangerous as such errors are NOT corrected by the controller. Therefore caution
+should be taken when enabling the injection of multiple-bit errors: it is only
+safe when used on a carefully selected memory area and used under control of
+the 'ecc test' command (see example 'Injecting Multiple-Bit Errors' below). In
+particular, when you simply set the multiple-bit errors in inject mask and
+enable injection, U-Boot is very likely to hang quickly as the errors will be
+injected when it accesses its code, data etc.
+
+
+Use cases for DDR 'ecc' command:
+================================
+
+Before executing particular tests reset target board or clear status registers:
+
+=> ecc captureclear
+=> ecc errdetectclr all
+=> ecc sbecnt 0
+
+
+Injecting Single-Bit Errors
+---------------------------
+
+1. Set 1 bit in Data Path Error Inject Mask
+
+=> ecc injectdatahi 1
+
+2. Run test over some memory region
+
+=> ecc test 200000 10
+
+3. Check ECC status
+
+=> ecc status
+...
+Memory Data Path Error Injection Mask High/Low: 00000001 00000000
+...
+Memory Single-Bit Error Management (0..255):
+ Single-Bit Error Threshold: 255
+ Single Bit Error Counter: 16
+...
+Memory Error Detect:
+ Multiple Memory Errors: 0
+ Multiple-Bit Error: 0
+ Single-Bit Error: 0
+...
+
+16 errors were generated, Single-Bit Error flag was not set as Single Bit Error
+Counter did not reach Single-Bit Error Threshold.
+
+4. Make sure used memory region got re-initialized with 0xcafecafe pattern
+
+=> md 200000
+00200000: cafecafe cafecafe cafecafe cafecafe ................
+00200010: cafecafe cafecafe cafecafe cafecafe ................
+00200020: cafecafe cafecafe cafecafe cafecafe ................
+00200030: cafecafe cafecafe cafecafe cafecafe ................
+00200040: cafecafe cafecafe cafecafe cafecafe ................
+00200050: cafecafe cafecafe cafecafe cafecafe ................
+00200060: cafecafe cafecafe cafecafe cafecafe ................
+00200070: cafecafe cafecafe cafecafe cafecafe ................
+00200080: deadbeef deadbeef deadbeef deadbeef ................
+00200090: deadbeef deadbeef deadbeef deadbeef ................
+
+
+Injecting Multiple-Bit Errors
+-----------------------------
+
+1. Set more than 1 bit in Data Path Error Inject Mask
+
+=> ecc injectdatahi 5
+
+2. Run test over some memory region
+
+=> ecc test 200000 10
+
+3. Check ECC status
+
+=> ecc status
+...
+Memory Data Path Error Injection Mask High/Low: 00000005 00000000
+...
+Memory Error Detect:
+ Multiple Memory Errors: 1
+ Multiple-Bit Error: 1
+ Single-Bit Error: 0
+...
+
+Observe that both Multiple Memory Errors and Multiple-Bit Error flags are set.
+
+4. Make sure used memory region got re-initialized with 0xcafecafe pattern
+
+=> md 200000
+00200000: cafecafe cafecafe cafecafe cafecafe ................
+00200010: cafecafe cafecafe cafecafe cafecafe ................
+00200020: cafecafe cafecafe cafecafe cafecafe ................
+00200030: cafecafe cafecafe cafecafe cafecafe ................
+00200040: cafecafe cafecafe cafecafe cafecafe ................
+00200050: cafecafe cafecafe cafecafe cafecafe ................
+00200060: cafecafe cafecafe cafecafe cafecafe ................
+00200070: cafecafe cafecafe cafecafe cafecafe ................
+00200080: deadbeef deadbeef deadbeef deadbeef ................
+00200090: deadbeef deadbeef deadbeef deadbeef ................
+
+
+Test Single-Bit Error Counter and Threshold
+-------------------------------------------
+
+1. Set 1 bit in Data Path Error Inject Mask
+
+=> ecc injectdatahi 1
+
+2. Enable error injection
+
+=> ecc inject en
+
+3. Let u-boot run for a with Single-Bit error injection enabled
+
+4. Disable error injection
+
+=> ecc inject dis
+
+4. Check status
+
+=> ecc status
+
+...
+Memory Single-Bit Error Management (0..255):
+ Single-Bit Error Threshold: 255
+ Single Bit Error Counter: 60
+
+Memory Error Detect:
+ Multiple Memory Errors: 1
+ Multiple-Bit Error: 0
+ Single-Bit Error: 1
+...
+
+Observe that Single-Bit Error is 'on' which means that Single-Bit Error Counter
+reached Single-Bit Error Threshold. Multiple Memory Errors bit is also 'on', that
+is Counter reached Threshold more than one time (it wraps back after reaching
+Threshold).
diff --git a/doc/README.nand b/doc/README.nand
index 0f2bdc5cc4..f2d6a5b1e6 100644
--- a/doc/README.nand
+++ b/doc/README.nand
@@ -1,5 +1,9 @@
NAND FLASH commands and notes
+
+See NOTE below!!!
+
+
# (C) Copyright 2003
# Dave Ellis, SIXNET, dge@sixnetio.com
#
@@ -173,3 +177,33 @@ More Definitions:
#define NAND_ChipID_UNKNOWN 0x00
#define NAND_MAX_FLOORS 1
#define NAND_MAX_CHIPS 1
+
+
+NOTE:
+=====
+
+We now use a complete rewrite of the NAND code based on what is in
+2.6.12 Linux kernel.
+
+The old NAND handling code has been re-factored and is now confined
+to only board-specific files and - unfortunately - to the DoC code
+(see below). A new configuration variable has been introduced:
+CFG_NAND_LEGACY, which has to be defined in the board config file if
+that board uses legacy code. If CFG_NAND_LEGACY is defined, the board
+specific config.mk file should also have "BOARDLIBS =
+drivers/nand_legacy/libnand_legacy.a". For boards using the new NAND
+approach (PPChameleon and netstar at the moment) no variable is
+necessary, but the config.mk should have "BOARDLIBS =
+drivers/nand/libnand.a".
+
+The necessary changes have been made to all affected boards, and no
+build breakage has been introduced, except for NETTA and NETTA_ISDN
+targets from MAKEALL. This is due to the fact that these two boards
+use JFFS, which has been adopted to use the new NAND, and at the same
+time use NAND in legacy mode. The breakage will disappear when the
+board-specific code is changed to the new NAND.
+
+As mentioned above, the legacy code is still used by the DoC subsystem.
+The consequence of this is that the legacy NAND can't be removed from
+the tree until the DoC is ported to use the new NAND support (or boards
+with DoC will break).
diff --git a/doc/README.serial_multi b/doc/README.serial_multi
index a8d48fc4d9..40f78159f5 100644
--- a/doc/README.serial_multi
+++ b/doc/README.serial_multi
@@ -52,3 +52,29 @@ PPC4XX Specific
setenv stdout serial0
setenv stderr serial0
setenv stdin serial0
+
+MPC5xxx Specific
+================
+
+Up to two PSCs can be used as console.
+
+Support for hardware handshake has not been implemented yet.
+
+*) The first (default) console port is defined by:
+ #define CONFIG_PSC_CONSOLE <PSC number>
+
+*) The second (alternative) console port is defined by:
+ #define CONFIG_PSC_CONSOLE2 <PSC number>
+
+*) Commands to switch to the second console:
+ setenv stdout serial1
+ setenv stderr serial1
+ setenv stdin serial1
+
+*) Commands to switch to the first console:
+ setenv stdout serial0
+ setenv stderr serial0
+ setenv stdin serial0
+
+*) If a file descriptor is set to "serial" then the
+ current serial device will be used.
diff --git a/drivers/Makefile b/drivers/Makefile
index e6176ed86a..a6e7b5411c 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -31,7 +31,7 @@ OBJS = 3c589.o 5701rls.o ali512x.o \
bcm570x.o bcm570x_autoneg.o cfb_console.o cfi_flash.o \
cs8900.o ct69000.o dataflash.o dc2114x.o dm9000x.o \
e1000.o eepro100.o \
- i8042.o i82365.o inca-ip_sw.o keyboard.o \
+ i8042.o inca-ip_sw.o keyboard.o \
lan91c96.o \
natsemi.o ne2000.o netarm_eth.o netconsole.o \
ns16550.o ns8382x.o ns87308.o ns7520_eth.o omap1510_i2c.o \
@@ -48,7 +48,9 @@ OBJS = 3c589.o 5701rls.o ali512x.o \
ti_pci1410a.o tigon3.o tsec.o \
usbdcore.o usbdcore_ep0.o usbdcore_omap1510.o usbtty.o \
videomodes.o w83c553f.o \
- ks8695eth.o
+ ks8695eth.o smsc9118.o \
+ pxa_pcmcia.o mpc8xx_pcmcia.o tqm8xx_pcmcia.o \
+ rpx_pcmcia.o
all: $(LIB)
diff --git a/drivers/cfi_flash.c b/drivers/cfi_flash.c
index 4b7a1107a9..33e7e5e53d 100644
--- a/drivers/cfi_flash.c
+++ b/drivers/cfi_flash.c
@@ -42,7 +42,7 @@
*/
/* The DEBUG define must be before common to enable debugging */
-/* #define DEBUG */
+/*#define DEBUG */
#include <common.h>
#include <asm/processor.h>
@@ -81,11 +81,13 @@
#define FLASH_CMD_BLOCK_ERASE 0x20
#define FLASH_CMD_ERASE_CONFIRM 0xD0
#define FLASH_CMD_WRITE 0x40
+#define FLASH_CMD_WRITE_S 0x41
#define FLASH_CMD_PROTECT 0x60
#define FLASH_CMD_PROTECT_SET 0x01
#define FLASH_CMD_PROTECT_CLEAR 0xD0
#define FLASH_CMD_CLEAR_STATUS 0x50
#define FLASH_CMD_WRITE_TO_BUFFER 0xE8
+#define FLASH_CMD_WRITE_TO_BUFFER_S 0xE9
#define FLASH_CMD_WRITE_BUFFER_CONFIRM 0xD0
#define FLASH_STATUS_DONE 0x80
@@ -104,16 +106,19 @@
#define AMD_CMD_ERASE_SECTOR 0x30
#define AMD_CMD_UNLOCK_START 0xAA
#define AMD_CMD_UNLOCK_ACK 0x55
+#define AMD_CMD_WRITE_TO_BUFFER 0x25
+#define AMD_CMD_WRITE_BUFFER_CONFIRM 0x29
#define AMD_STATUS_TOGGLE 0x40
#define AMD_STATUS_ERROR 0x20
-#define AMD_ADDR_ERASE_START 0x555
-#define AMD_ADDR_START 0x555
-#define AMD_ADDR_ACK 0x2AA
+#define AMD_ADDR_ERASE_START ((info->portwidth == FLASH_CFI_8BIT) ? 0xAAA : 0x555)
+#define AMD_ADDR_START ((info->portwidth == FLASH_CFI_8BIT) ? 0xAAA : 0x555)
+#define AMD_ADDR_ACK ((info->portwidth == FLASH_CFI_8BIT) ? 0x555 : 0x2AA)
#define FLASH_OFFSET_CFI 0x55
#define FLASH_OFFSET_CFI_RESP 0x10
#define FLASH_OFFSET_PRIMARY_VENDOR 0x13
+#define FLASH_OFFSET_EXT_QUERY_T_P_ADDR 0x15 /* extended query table primary addr */
#define FLASH_OFFSET_WTOUT 0x1F
#define FLASH_OFFSET_WBTOUT 0x20
#define FLASH_OFFSET_ETOUT 0x21
@@ -136,6 +141,7 @@
#define CFI_CMDSET_NONE 0
#define CFI_CMDSET_INTEL_EXTENDED 1
+#define CFI_CMDSET_INTEL_SIBLEY 512
#define CFI_CMDSET_AMD_STANDARD 2
#define CFI_CMDSET_INTEL_STANDARD 3
#define CFI_CMDSET_AMD_EXTENDED 4
@@ -175,7 +181,12 @@ static ulong bank_base[CFG_MAX_FLASH_BANKS] = CFG_FLASH_BANKS_LIST;
flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* FLASH chips info */
#endif
-
+/*
+ * Check if chip width is defined. If not, start detecting with 8bit.
+ */
+#ifndef CFG_FLASH_CFI_WIDTH
+#define CFG_FLASH_CFI_WIDTH FLASH_CFI_8BIT
+#endif
/*-----------------------------------------------------------------------
* Functions
*/
@@ -183,17 +194,17 @@ flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* FLASH chips info */
typedef unsigned long flash_sect_t;
static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c);
-static void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf);
-static void flash_write_cmd (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
+static void flash_make_cmd (flash_info_t * info, ulong cmd, void *cmdbuf);
+static void flash_write_cmd (flash_info_t * info, flash_sect_t sect, uint offset, ulong cmd);
static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect);
static int flash_isequal (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
static int flash_isset (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
static int flash_toggle (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
static int flash_detect_cfi (flash_info_t * info);
-ulong flash_get_size (ulong base, int banknum);
static int flash_write_cfiword (flash_info_t * info, ulong dest, cfiword_t cword);
static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
ulong tout, char *prompt);
+ulong flash_get_size (ulong base, int banknum);
#if defined(CFG_ENV_IS_IN_FLASH) || defined(CFG_ENV_ADDR_REDUND) || (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
static flash_info_t *flash_get_info(ulong base);
#endif
@@ -335,9 +346,24 @@ unsigned long flash_init (void)
unsigned long size = 0;
int i;
+#ifdef CFG_FLASH_PROTECTION
+ char *s = getenv("unlock");
+#endif
+
+#ifdef ENV_IS_VARIABLE
+ /* GDP has a different flash combination */
+ extern ulong NOR_FLASH_BANKS_LIST[CFG_MAX_FLASH_BANKS];
+ extern int NOR_MAX_FLASH_BANKS;
+ memcpy(bank_base, NOR_FLASH_BANKS_LIST, sizeof(bank_base));
+#endif
/* Init: no FLASHes known */
for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
flash_info[i].flash_id = FLASH_UNKNOWN;
+#ifdef ENV_IS_VARIABLE
+ if(i > (NOR_MAX_FLASH_BANKS - 1)) {
+ break;
+ }
+#endif
size += flash_info[i].size = flash_get_size (bank_base[i], i);
if (flash_info[i].flash_id == FLASH_UNKNOWN) {
#ifndef CFG_FLASH_QUIET_TEST
@@ -345,10 +371,57 @@ unsigned long flash_init (void)
i, flash_info[i].size, flash_info[i].size << 20);
#endif /* CFG_FLASH_QUIET_TEST */
}
+#ifdef CFG_FLASH_PROTECTION
+ else if ((s != NULL) && (strcmp(s, "yes") == 0)) {
+ /*
+ * Only the U-Boot image and it's environment is protected,
+ * all other sectors are unprotected (unlocked) if flash
+ * hardware protection is used (CFG_FLASH_PROTECTION) and
+ * the environment variable "unlock" is set to "yes".
+ */
+ if (flash_info[i].legacy_unlock) {
+ int k;
+
+ /*
+ * Disable legacy_unlock temporarily, since
+ * flash_real_protect would relock all other sectors
+ * again otherwise.
+ */
+ flash_info[i].legacy_unlock = 0;
+
+ /*
+ * Legacy unlocking (e.g. Intel J3) -> unlock only one
+ * sector. This will unlock all sectors.
+ */
+ flash_real_protect (&flash_info[i], 0, 0);
+
+ flash_info[i].legacy_unlock = 1;
+
+ /*
+ * Manually mark other sectors as unlocked (unprotected)
+ */
+ for (k = 1; k < flash_info[i].sector_count; k++)
+ flash_info[i].protect[k] = 0;
+ } else {
+ /*
+ * No legancy unlocking -> unlock all sectors
+ */
+ flash_protect (FLAG_PROTECT_CLEAR,
+ flash_info[i].start[0],
+ flash_info[i].start[0] + flash_info[i].size - 1,
+ &flash_info[i]);
+ }
+ }
+#endif /* CFG_FLASH_PROTECTION */
}
/* Monitor protection ON by default */
#if (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
+#ifdef ENV_IS_VARIABLE
+extern int flash_env_init(void);
+extern int (*boot_env_init) (void);
+ if (flash_env_init == boot_env_init)
+#endif
flash_protect (FLAG_PROTECT_SET,
CFG_MONITOR_BASE,
CFG_MONITOR_BASE + monitor_flash_len - 1,
@@ -357,6 +430,12 @@ unsigned long flash_init (void)
/* Environment protection ON by default */
#ifdef CFG_ENV_IS_IN_FLASH
+#ifdef ENV_IS_VARIABLE
+extern int flash_env_init(void);
+extern int (*boot_env_init) (void);
+ if (flash_env_init == boot_env_init)
+#endif
+
flash_protect (FLAG_PROTECT_SET,
CFG_ENV_ADDR,
CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1,
@@ -427,6 +506,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last)
switch (info->vendor) {
case CFI_CMDSET_INTEL_STANDARD:
case CFI_CMDSET_INTEL_EXTENDED:
+ case CFI_CMDSET_INTEL_SIBLEY:
flash_write_cmd (info, sect, 0, FLASH_CMD_CLEAR_STATUS);
flash_write_cmd (info, sect, 0, FLASH_CMD_BLOCK_ERASE);
flash_write_cmd (info, sect, 0, FLASH_CMD_ERASE_CONFIRM);
@@ -538,7 +618,6 @@ int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
int buffered_size;
#endif
/* get lower aligned address */
- /* get lower aligned address */
wp = (addr & ~(info->portwidth - 1));
/* handle unaligned start */
@@ -565,7 +644,22 @@ int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
buffered_size = (info->portwidth / info->chipwidth);
buffered_size *= info->buffer_size;
while (cnt >= info->portwidth) {
- i = buffered_size > cnt ? cnt : buffered_size;
+ /* prohibit buffer write when buffer_size is 1 */
+ if (info->buffer_size == 1) {
+ cword.l = 0;
+ for (i = 0; i < info->portwidth; i++)
+ flash_add_byte (info, &cword, *src++);
+ if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
+ return rc;
+ wp += info->portwidth;
+ cnt -= info->portwidth;
+ continue;
+ }
+
+ /* write buffer until next buffered_size aligned boundary */
+ i = buffered_size - (wp % buffered_size);
+ if (i > cnt)
+ i = cnt;
if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK)
return rc;
i -= i & (info->portwidth - 1);
@@ -600,7 +694,6 @@ int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
for (; i < info->portwidth; ++i, ++cp) {
flash_add_byte (info, &cword, (*(uchar *) cp));
}
-
return flash_write_cfiword (info, wp, cword);
}
@@ -624,10 +717,13 @@ int flash_real_protect (flash_info_t * info, long sector, int prot)
prot ? "protect" : "unprotect")) == 0) {
info->protect[sector] = prot;
- /* Intel's unprotect unprotects all locking */
- if (prot == 0) {
- flash_sect_t i;
+ /*
+ * On some of Intel's flash chips (marked via legacy_unlock)
+ * unprotect unprotects all locking.
+ */
+ if ((prot == 0) && (info->legacy_unlock)) {
+ flash_sect_t i;
for (i = 0; i < info->sector_count; i++) {
if (info->protect[i])
flash_real_protect (info, i, 1);
@@ -636,7 +732,6 @@ int flash_real_protect (flash_info_t * info, long sector, int prot)
}
return retcode;
}
-
/*-----------------------------------------------------------------------
* flash_read_user_serial - read the OneTimeProgramming cells
*/
@@ -680,6 +775,7 @@ static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
switch (info->vendor) {
case CFI_CMDSET_INTEL_STANDARD:
case CFI_CMDSET_INTEL_EXTENDED:
+ case CFI_CMDSET_INTEL_SIBLEY:
retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE);
break;
case CFI_CMDSET_AMD_STANDARD:
@@ -702,16 +798,21 @@ static int flash_status_check (flash_info_t * info, flash_sect_t sector,
{
ulong start;
+#if CFG_HZ != 1000
+ tout *= CFG_HZ/1000;
+#endif
+
/* Wait for command completion */
start = get_timer (0);
while (flash_is_busy (info, sector)) {
- if (get_timer (start) > info->erase_blk_tout * CFG_HZ) {
+ if (get_timer (start) > tout) {
printf ("Flash %s timeout at address %lx data %lx\n",
prompt, info->start[sector],
flash_read_long (info, sector, 0));
flash_write_cmd (info, sector, 0, info->cmd_reset);
return ERR_TIMOUT;
}
+ udelay (1); /* also triggers watchdog */
}
return ERR_OK;
}
@@ -727,6 +828,7 @@ static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
retcode = flash_status_check (info, sector, tout, prompt);
switch (info->vendor) {
+ case CFI_CMDSET_INTEL_SIBLEY:
case CFI_CMDSET_INTEL_EXTENDED:
case CFI_CMDSET_INTEL_STANDARD:
if ((retcode != ERR_OK)
@@ -805,23 +907,47 @@ static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
/*-----------------------------------------------------------------------
* make a proper sized command based on the port and chip widths
*/
-static void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf)
+static void flash_make_cmd (flash_info_t * info, ulong cmd, void *cmdbuf)
{
int i;
+
+#if defined(__LITTLE_ENDIAN)
+ ushort stmpw;
+ uint stmpi;
+#endif
uchar *cp = (uchar *) cmdbuf;
+ /* Store cmd in proper location based on chip width and port width
+ * cmd might be >1 byte in which case, we locate the proper part of
+ * cmd to store into the cmdbuf
+ */
+ for (i = 0; i < info->portwidth; i++) {
+ *cp++ = ((i + 1) % info->chipwidth) ? cmd>>(8*(i+1)): cmd;
+ }
#if defined(__LITTLE_ENDIAN)
- for (i = info->portwidth; i > 0; i--)
-#else
- for (i = 1; i <= info->portwidth; i++)
+ switch (info->portwidth) {
+ case FLASH_CFI_8BIT:
+ break;
+ case FLASH_CFI_16BIT:
+ stmpw = *(ushort *) cmdbuf;
+ *(ushort *) cmdbuf = __swab16 (stmpw);
+ break;
+ case FLASH_CFI_32BIT:
+ stmpi = *(uint *) cmdbuf;
+ *(uint *) cmdbuf = __swab32 (stmpi);
+ break;
+ default:
+ debug ("WARNING: flash_make_cmd: unsuppported LittleEndian mode\n");
+ break;
+ }
#endif
- *cp++ = (i & (info->chipwidth - 1)) ? '\0' : cmd;
}
+
/*
* Write a proper sized command to the correct address
*/
-static void flash_write_cmd (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
+static void flash_write_cmd (flash_info_t * info, flash_sect_t sect, uint offset, ulong cmd)
{
volatile cfiptr_t addr;
@@ -834,18 +960,27 @@ static void flash_write_cmd (flash_info_t * info, flash_sect_t sect, uint offset
debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr.cp, cmd,
cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
*addr.cp = cword.c;
+#ifdef CONFIG_BLACKFIN
+ asm("ssync;");
+#endif
break;
case FLASH_CFI_16BIT:
debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr.wp,
cmd, cword.w,
info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
*addr.wp = cword.w;
+#ifdef CONFIG_BLACKFIN
+ asm("ssync;");
+#endif
break;
case FLASH_CFI_32BIT:
debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr.lp,
cmd, cword.l,
info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
*addr.lp = cword.l;
+#ifdef CONFIG_BLACKFIN
+ asm("ssync;");
+#endif
break;
case FLASH_CFI_64BIT:
#ifdef DEBUG
@@ -860,6 +995,9 @@ static void flash_write_cmd (flash_info_t * info, flash_sect_t sect, uint offset
}
#endif
*addr.llp = cword.ll;
+#ifdef CONFIG_BLACKFIN
+ asm("ssync;");
+#endif
break;
}
}
@@ -985,7 +1123,7 @@ static int flash_detect_cfi (flash_info_t * info)
{
debug ("flash detect cfi\n");
- for (info->portwidth = FLASH_CFI_8BIT;
+ for (info->portwidth = CFG_FLASH_CFI_WIDTH;
info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
for (info->chipwidth = FLASH_CFI_BY8;
info->chipwidth <= info->portwidth;
@@ -1026,6 +1164,10 @@ ulong flash_get_size (ulong base, int banknum)
uchar num_erase_regions;
int erase_region_size;
int erase_region_count;
+#ifdef CFG_FLASH_PROTECTION
+ int ext_addr;
+ info->legacy_unlock = 0;
+#endif
info->start[0] = base;
@@ -1037,8 +1179,16 @@ ulong flash_get_size (ulong base, int banknum)
switch (info->vendor) {
case CFI_CMDSET_INTEL_STANDARD:
case CFI_CMDSET_INTEL_EXTENDED:
+ case CFI_CMDSET_INTEL_SIBLEY:
default:
info->cmd_reset = FLASH_CMD_RESET;
+#ifdef CFG_FLASH_PROTECTION
+ /* read legacy lock/unlock bit from intel flash */
+ ext_addr = flash_read_ushort (info, 0,
+ FLASH_OFFSET_EXT_QUERY_T_P_ADDR);
+ info->legacy_unlock =
+ flash_read_uchar (info, ext_addr + 5) & 0x08;
+#endif
break;
case CFI_CMDSET_AMD_STANDARD:
case CFI_CMDSET_AMD_EXTENDED:
@@ -1078,13 +1228,14 @@ ulong flash_get_size (ulong base, int banknum)
for (j = 0; j < erase_region_count; j++) {
info->start[sect_cnt] = sector;
sector += (erase_region_size * size_ratio);
-
/*
* Only read protection status from supported devices (intel...)
*/
switch (info->vendor) {
+ case CFI_CMDSET_INTEL_SIBLEY:
case CFI_CMDSET_INTEL_EXTENDED:
case CFI_CMDSET_INTEL_STANDARD:
+
info->protect[sect_cnt] =
flash_isset (info, sect_cnt,
FLASH_OFFSET_PROTECT,
@@ -1104,10 +1255,12 @@ ulong flash_get_size (ulong base, int banknum)
info->buffer_size = (1 << flash_read_ushort (info, 0, FLASH_OFFSET_BUFFER_SIZE));
tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_ETOUT);
info->erase_blk_tout = (tmp * (1 << flash_read_uchar (info, FLASH_OFFSET_EMAX_TOUT)));
- tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_WBTOUT);
- info->buffer_write_tout = (tmp * (1 << flash_read_uchar (info, FLASH_OFFSET_WBMAX_TOUT)));
- tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_WTOUT);
- info->write_tout = (tmp * (1 << flash_read_uchar (info, FLASH_OFFSET_WMAX_TOUT))) / 1000;
+ tmp = (1 << flash_read_uchar (info, FLASH_OFFSET_WBTOUT)) *
+ (1 << flash_read_uchar (info, FLASH_OFFSET_WBMAX_TOUT));
+ info->buffer_write_tout = tmp / 1000 + (tmp % 1000 ? 1 : 0); /* round up when converting to ms */
+ tmp = (1 << flash_read_uchar (info, FLASH_OFFSET_WTOUT)) *
+ (1 << flash_read_uchar (info, FLASH_OFFSET_WMAX_TOUT));
+ info->write_tout = tmp / 1000 + (tmp % 1000 ? 1 : 0); /* round up when converting to ms */
info->flash_id = FLASH_MAN_CFI;
if ((info->interface == FLASH_CFI_X8X16) && (info->chipwidth == FLASH_CFI_BY8)) {
info->portwidth >>= 1; /* XXX - Need to test on x8/x16 in parallel. */
@@ -1118,13 +1271,26 @@ ulong flash_get_size (ulong base, int banknum)
return (info->size);
}
+/* loop through the sectors from the highest address
+ * when the passed address is greater or equal to the sector address
+ * we have a match
+ */
+static flash_sect_t find_sector (flash_info_t * info, ulong addr)
+{
+ flash_sect_t sector;
+
+ for (sector = info->sector_count - 1; sector >= 0; sector--) {
+ if (addr >= info->start[sector])
+ break;
+ }
+ return sector;
+}
/*-----------------------------------------------------------------------
*/
-static int flash_write_cfiword (flash_info_t * info, ulong dest,
+static int flash_write_cfiword(flash_info_t * info, ulong dest,
cfiword_t cword)
{
-
cfiptr_t ctladdr;
cfiptr_t cptr;
int flag;
@@ -1157,6 +1323,10 @@ static int flash_write_cfiword (flash_info_t * info, ulong dest,
flag = disable_interrupts ();
switch (info->vendor) {
+ case CFI_CMDSET_INTEL_SIBLEY:
+ flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
+ flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE_S);
+ break;
case CFI_CMDSET_INTEL_EXTENDED:
case CFI_CMDSET_INTEL_STANDARD:
flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
@@ -1188,26 +1358,12 @@ static int flash_write_cfiword (flash_info_t * info, ulong dest,
if (flag)
enable_interrupts ();
- return flash_full_status_check (info, 0, info->write_tout, "write");
+ return flash_full_status_check (info, find_sector (info, dest),
+ info->write_tout, "write");
}
#ifdef CFG_FLASH_USE_BUFFER_WRITE
-/* loop through the sectors from the highest address
- * when the passed address is greater or equal to the sector address
- * we have a match
- */
-static flash_sect_t find_sector (flash_info_t * info, ulong addr)
-{
- flash_sect_t sector;
-
- for (sector = info->sector_count - 1; sector >= 0; sector--) {
- if (addr >= info->start[sector])
- break;
- }
- return sector;
-}
-
static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
int len)
{
@@ -1216,66 +1372,132 @@ static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
int retcode;
volatile cfiptr_t src;
volatile cfiptr_t dst;
- /* buffered writes in the AMD chip set is not supported yet */
- if((info->vendor == CFI_CMDSET_AMD_STANDARD) ||
- (info->vendor == CFI_CMDSET_AMD_EXTENDED))
- return ERR_INVAL;
+ volatile int shift_bits;
+
+ switch (info->vendor) {
+ case CFI_CMDSET_INTEL_STANDARD:
+ case CFI_CMDSET_INTEL_EXTENDED:
+ case CFI_CMDSET_INTEL_SIBLEY:
+ src.cp = cp;
+ dst.cp = (uchar *) dest;
+ sector = find_sector (info, dest);
+ flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
+ if(info->vendor == CFI_CMDSET_INTEL_SIBLEY){
+ flash_write_cmd (info, sector, 0, FLASH_CMD_WRITE_TO_BUFFER_S);
+ }
+ else {
+ flash_write_cmd (info, sector, 0, FLASH_CMD_WRITE_TO_BUFFER);
+ }
+/* This seems like out of place for flash. Actually not sending status command
+ * Check once
+ */
+#if 0
+ if ((retcode = flash_status_check (info, sector, info->buffer_write_tout,
+ "write to buffer")) == ERR_OK) {
+#else
+ retcode = ERR_OK;
+ if(retcode == ERR_OK) {
+#endif
+ /* reduce the number of loops by the width of the port */
+ switch (info->portwidth) {
+ case FLASH_CFI_8BIT:
+ shift_bits = 0;
+ break;
+ case FLASH_CFI_16BIT:
+ shift_bits = 1;
+ break;
+ case FLASH_CFI_32BIT:
+ shift_bits = 2;
+ break;
+ case FLASH_CFI_64BIT:
+ shift_bits = 3;
+ break;
+ default:
+ return ERR_INVAL;
+ break;
+ }
+
+ cnt = len >> shift_bits;
+ /*
+ * if there are trailing bytes to write(non-aligned end)..
+ * then do one more word write
+ */
+ if (len & ((0x1 << shift_bits) - 1))
+ cnt++;
+
+ flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
+ while (cnt-- > 0) {
+ switch (info->portwidth) {
+ case FLASH_CFI_8BIT:
+ *dst.cp++ = *src.cp++;
+ break;
+ case FLASH_CFI_16BIT:
+ *dst.wp++ = *src.wp++;
+ break;
+ case FLASH_CFI_32BIT:
+ *dst.lp++ = *src.lp++;
+ break;
+ case FLASH_CFI_64BIT:
+ *dst.llp++ = *src.llp++;
+ break;
+ default:
+ return ERR_INVAL;
+ break;
+ }
+ }
+ flash_write_cmd (info, sector, 0,
+ FLASH_CMD_WRITE_BUFFER_CONFIRM);
+ retcode = flash_full_status_check (info, sector,
+ info->buffer_write_tout,
+ "buffer write");
+ }
+ return retcode;
+
+ case CFI_CMDSET_AMD_STANDARD:
+ case CFI_CMDSET_AMD_EXTENDED:
+ src.cp = cp;
+ dst.cp = (uchar *) dest;
+ sector = find_sector (info, dest);
+
+ flash_unlock_seq(info,0);
+ flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_TO_BUFFER);
- src.cp = cp;
- dst.cp = (uchar *) dest;
- sector = find_sector (info, dest);
- flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
- flash_write_cmd (info, sector, 0, FLASH_CMD_WRITE_TO_BUFFER);
- if ((retcode =
- flash_status_check (info, sector, info->buffer_write_tout,
- "write to buffer")) == ERR_OK) {
- /* reduce the number of loops by the width of the port */
switch (info->portwidth) {
case FLASH_CFI_8BIT:
cnt = len;
+ flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
+ while (cnt-- > 0) *dst.cp++ = *src.cp++;
break;
case FLASH_CFI_16BIT:
cnt = len >> 1;
+ flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
+ while (cnt-- > 0) *dst.wp++ = *src.wp++;
break;
case FLASH_CFI_32BIT:
cnt = len >> 2;
+ flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
+ while (cnt-- > 0) *dst.lp++ = *src.lp++;
break;
case FLASH_CFI_64BIT:
cnt = len >> 3;
+ flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
+ while (cnt-- > 0) *dst.llp++ = *src.llp++;
break;
default:
return ERR_INVAL;
- break;
}
- flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
- while (cnt-- > 0) {
- switch (info->portwidth) {
- case FLASH_CFI_8BIT:
- *dst.cp++ = *src.cp++;
- break;
- case FLASH_CFI_16BIT:
- *dst.wp++ = *src.wp++;
- break;
- case FLASH_CFI_32BIT:
- *dst.lp++ = *src.lp++;
- break;
- case FLASH_CFI_64BIT:
- *dst.llp++ = *src.llp++;
- break;
- default:
- return ERR_INVAL;
- break;
- }
- }
- flash_write_cmd (info, sector, 0,
- FLASH_CMD_WRITE_BUFFER_CONFIRM);
- retcode =
- flash_full_status_check (info, sector,
- info->buffer_write_tout,
- "buffer write");
+
+ flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
+ retcode = flash_full_status_check (info, sector, info->buffer_write_tout,
+ "buffer write");
+ return retcode;
+
+ default:
+ debug ("Unknown Command Set\n");
+ return ERR_INVAL;
}
- flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
- return retcode;
}
+
#endif /* CFG_FLASH_USE_BUFFER_WRITE */
#endif /* CFG_FLASH_CFI */
+
diff --git a/drivers/ct69000.c b/drivers/ct69000.c
index 7bcf19f5dd..29d82e4c43 100644
--- a/drivers/ct69000.c
+++ b/drivers/ct69000.c
@@ -272,6 +272,9 @@ struct ctfb_chips_properties {
static const struct ctfb_chips_properties chips[] = {
{PCI_DEVICE_ID_CT_69000, 0x200000, 1, 4, -2, 3, 257, 100, 220},
+#ifdef CONFIG_USE_CPCIDVI
+ {PCI_DEVICE_ID_CT_69030, 0x400000, 1, 4, -2, 3, 257, 100, 220},
+#endif
{PCI_DEVICE_ID_CT_65555, 0x100000, 16, 4, 0, 1, 255, 48, 220}, /* NOT TESTED */
{0, 0, 0, 0, 0, 0, 0, 0, 0} /* Terminator */
};
@@ -957,6 +960,9 @@ SetDrawingEngine (int bits_per_pixel)
*/
static struct pci_device_id supported[] = {
{PCI_VENDOR_ID_CT, PCI_DEVICE_ID_CT_69000},
+#ifdef CONFIG_USE_CPCIDVI
+ {PCI_VENDOR_ID_CT, PCI_DEVICE_ID_CT_69030},
+#endif
{}
};
@@ -1121,7 +1127,22 @@ video_hw_init (void)
pGD->cprBase = pci_mem_base; /* Dummy */
/* set up Hardware */
+#ifdef CONFIG_USE_CPCIDVI
+ if (device_id == PCI_DEVICE_ID_CT_69030) {
+ ctWrite (CT_MSR_W_O, 0x0b);
+ ctWrite (0x3cd, 0x13);
+ ctWrite_i (CT_FP_O, 0x02, 0x00);
+ ctWrite_i (CT_FP_O, 0x05, 0x00);
+ ctWrite_i (CT_FP_O, 0x06, 0x00);
+ ctWrite (0x3c2, 0x0b);
+ ctWrite_i (CT_FP_O, 0x02, 0x10);
+ ctWrite_i (CT_FP_O, 0x01, 0x09);
+ } else {
+ ctWrite (CT_MSR_W_O, 0x01);
+ }
+#else
ctWrite (CT_MSR_W_O, 0x01);
+#endif
/* set the extended Registers */
ctLoadRegs (CT_XR_O, xreg);
diff --git a/drivers/dataflash.c b/drivers/dataflash.c
index ded039578a..17eb8597f8 100644
--- a/drivers/dataflash.c
+++ b/drivers/dataflash.c
@@ -174,8 +174,7 @@ void dataflash_print_info (void)
/* Function Name : AT91F_DataflashSelect */
/* Object : Select the correct device */
/*------------------------------------------------------------------------------*/
-AT91PS_DataFlash AT91F_DataflashSelect (AT91PS_DataFlash pFlash,
- unsigned int *addr)
+AT91PS_DataFlash AT91F_DataflashSelect (AT91PS_DataFlash pFlash, unsigned long *addr)
{
char addr_valid = 0;
int i;
@@ -291,7 +290,7 @@ int i,j, area1, area2, addr_valid = 0;
/*------------------------------------------------------------------------------*/
int read_dataflash (unsigned long addr, unsigned long size, char *result)
{
- int AddrToRead = addr;
+ unsigned long AddrToRead = addr;
AT91PS_DataFlash pFlash = &DataFlashInst;
pFlash = AT91F_DataflashSelect (pFlash, &AddrToRead);
@@ -313,7 +312,7 @@ int read_dataflash (unsigned long addr, unsigned long size, char *result)
int write_dataflash (unsigned long addr_dest, unsigned long addr_src,
unsigned long size)
{
- int AddrToWrite = addr_dest;
+ unsigned long AddrToWrite = addr_dest;
AT91PS_DataFlash pFlash = &DataFlashInst;
pFlash = AT91F_DataflashSelect (pFlash, &AddrToWrite);
@@ -330,7 +329,7 @@ int write_dataflash (unsigned long addr_dest, unsigned long addr_src,
if (AddrToWrite == -1)
return -1;
- return AT91F_DataFlashWrite (pFlash, (char *) addr_src, AddrToWrite, size);
+ return AT91F_DataFlashWrite (pFlash, (uchar *)addr_src, AddrToWrite, size);
}
diff --git a/drivers/i8042.c b/drivers/i8042.c
index e21978dc24..22c2a4e3a0 100644
--- a/drivers/i8042.c
+++ b/drivers/i8042.c
@@ -12,7 +12,7 @@
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
@@ -29,6 +29,14 @@
#ifdef CONFIG_I8042_KBD
+#ifdef CONFIG_USE_CPCIDVI
+extern u8 gt_cpcidvi_in8(u32 offset);
+extern void gt_cpcidvi_out8(u32 offset, u8 data);
+
+#define in8(a) gt_cpcidvi_in8(a)
+#define out8(a, b) gt_cpcidvi_out8(a,b)
+#endif
+
#include <i8042.h>
/* defines */
@@ -41,10 +49,10 @@ static int cursor_state = 0;
/* locals */
-static int kbd_input = -1; /* no input yet */
-static int kbd_mapping = KBD_US; /* default US keyboard */
-static int kbd_flags = NORMAL; /* after reset */
-static int kbd_state = 0; /* unshift code */
+static int kbd_input = -1; /* no input yet */
+static int kbd_mapping = KBD_US; /* default US keyboard */
+static int kbd_flags = NORMAL; /* after reset */
+static int kbd_state = 0; /* unshift code */
static void kbd_conv_char (unsigned char scan_code);
static void kbd_led_set (void);
@@ -60,230 +68,230 @@ static int kbd_reset (void);
static unsigned char kbd_fct_map [144] =
{ /* kbd_fct_map table for scan code */
- 0, AS, AS, AS, AS, AS, AS, AS, /* scan 0- 7 */
- AS, AS, AS, AS, AS, AS, AS, AS, /* scan 8- F */
- AS, AS, AS, AS, AS, AS, AS, AS, /* scan 10-17 */
- AS, AS, AS, AS, AS, CN, AS, AS, /* scan 18-1F */
- AS, AS, AS, AS, AS, AS, AS, AS, /* scan 20-27 */
- AS, AS, SH, AS, AS, AS, AS, AS, /* scan 28-2F */
- AS, AS, AS, AS, AS, AS, SH, AS, /* scan 30-37 */
- AS, AS, CP, 0, 0, 0, 0, 0, /* scan 38-3F */
- 0, 0, 0, 0, 0, NM, ST, ES, /* scan 40-47 */
- ES, ES, ES, ES, ES, ES, ES, ES, /* scan 48-4F */
- ES, ES, ES, ES, 0, 0, AS, 0, /* scan 50-57 */
- 0, 0, 0, 0, 0, 0, 0, 0, /* scan 58-5F */
- 0, 0, 0, 0, 0, 0, 0, 0, /* scan 60-67 */
- 0, 0, 0, 0, 0, 0, 0, 0, /* scan 68-6F */
- AS, 0, 0, AS, 0, 0, AS, 0, /* scan 70-77 */
- 0, AS, 0, 0, 0, AS, 0, 0, /* scan 78-7F */
- AS, CN, AS, AS, AK, ST, EX, EX, /* enhanced */
- AS, EX, EX, AS, EX, AS, EX, EX /* enhanced */
+ 0, AS, AS, AS, AS, AS, AS, AS, /* scan 0- 7 */
+ AS, AS, AS, AS, AS, AS, AS, AS, /* scan 8- F */
+ AS, AS, AS, AS, AS, AS, AS, AS, /* scan 10-17 */
+ AS, AS, AS, AS, AS, CN, AS, AS, /* scan 18-1F */
+ AS, AS, AS, AS, AS, AS, AS, AS, /* scan 20-27 */
+ AS, AS, SH, AS, AS, AS, AS, AS, /* scan 28-2F */
+ AS, AS, AS, AS, AS, AS, SH, AS, /* scan 30-37 */
+ AS, AS, CP, 0, 0, 0, 0, 0, /* scan 38-3F */
+ 0, 0, 0, 0, 0, NM, ST, ES, /* scan 40-47 */
+ ES, ES, ES, ES, ES, ES, ES, ES, /* scan 48-4F */
+ ES, ES, ES, ES, 0, 0, AS, 0, /* scan 50-57 */
+ 0, 0, 0, 0, 0, 0, 0, 0, /* scan 58-5F */
+ 0, 0, 0, 0, 0, 0, 0, 0, /* scan 60-67 */
+ 0, 0, 0, 0, 0, 0, 0, 0, /* scan 68-6F */
+ AS, 0, 0, AS, 0, 0, AS, 0, /* scan 70-77 */
+ 0, AS, 0, 0, 0, AS, 0, 0, /* scan 78-7F */
+ AS, CN, AS, AS, AK, ST, EX, EX, /* enhanced */
+ AS, EX, EX, AS, EX, AS, EX, EX /* enhanced */
};
static unsigned char kbd_key_map [2][5][144] =
{
{ /* US keyboard */
{ /* unshift code */
- 0, 0x1b, '1', '2', '3', '4', '5', '6', /* scan 0- 7 */
- '7', '8', '9', '0', '-', '=', 0x08, '\t', /* scan 8- F */
- 'q', 'w', 'e', 'r', 't', 'y', 'u', 'i', /* scan 10-17 */
- 'o', 'p', '[', ']', '\r', CN, 'a', 's', /* scan 18-1F */
- 'd', 'f', 'g', 'h', 'j', 'k', 'l', ';', /* scan 20-27 */
- '\'', '`', SH, '\\', 'z', 'x', 'c', 'v', /* scan 28-2F */
- 'b', 'n', 'm', ',', '.', '/', SH, '*', /* scan 30-37 */
- ' ', ' ', CP, 0, 0, 0, 0, 0, /* scan 38-3F */
- 0, 0, 0, 0, 0, NM, ST, '7', /* scan 40-47 */
- '8', '9', '-', '4', '5', '6', '+', '1', /* scan 48-4F */
- '2', '3', '0', '.', 0, 0, 0, 0, /* scan 50-57 */
- 0, 0, 0, 0, 0, 0, 0, 0, /* scan 58-5F */
- 0, 0, 0, 0, 0, 0, 0, 0, /* scan 60-67 */
- 0, 0, 0, 0, 0, 0, 0, 0, /* scan 68-6F */
- 0, 0, 0, 0, 0, 0, 0, 0, /* scan 70-77 */
- 0, 0, 0, 0, 0, 0, 0, 0, /* scan 78-7F */
- '\r', CN, '/', '*', ' ', ST, 'F', 'A', /* extended */
- 0, 'D', 'C', 0, 'B', 0, '@', 'P' /* extended */
+ 0, 0x1b, '1', '2', '3', '4', '5', '6', /* scan 0- 7 */
+ '7', '8', '9', '0', '-', '=', 0x08, '\t', /* scan 8- F */
+ 'q', 'w', 'e', 'r', 't', 'y', 'u', 'i', /* scan 10-17 */
+ 'o', 'p', '[', ']', '\r', CN, 'a', 's', /* scan 18-1F */
+ 'd', 'f', 'g', 'h', 'j', 'k', 'l', ';', /* scan 20-27 */
+ '\'', '`', SH, '\\', 'z', 'x', 'c', 'v', /* scan 28-2F */
+ 'b', 'n', 'm', ',', '.', '/', SH, '*', /* scan 30-37 */
+ ' ', ' ', CP, 0, 0, 0, 0, 0, /* scan 38-3F */
+ 0, 0, 0, 0, 0, NM, ST, '7', /* scan 40-47 */
+ '8', '9', '-', '4', '5', '6', '+', '1', /* scan 48-4F */
+ '2', '3', '0', '.', 0, 0, 0, 0, /* scan 50-57 */
+ 0, 0, 0, 0, 0, 0, 0, 0, /* scan 58-5F */
+ 0, 0, 0, 0, 0, 0, 0, 0, /* scan 60-67 */
+ 0, 0, 0, 0, 0, 0, 0, 0, /* scan 68-6F */
+ 0, 0, 0, 0, 0, 0, 0, 0, /* scan 70-77 */
+ 0, 0, 0, 0, 0, 0, 0, 0, /* scan 78-7F */
+ '\r', CN, '/', '*', ' ', ST, 'F', 'A', /* extended */
+ 0, 'D', 'C', 0, 'B', 0, '@', 'P' /* extended */
},
{ /* shift code */
- 0, 0x1b, '!', '@', '#', '$', '%', '^', /* scan 0- 7 */
- '&', '*', '(', ')', '_', '+', 0x08, '\t', /* scan 8- F */
- 'Q', 'W', 'E', 'R', 'T', 'Y', 'U', 'I', /* scan 10-17 */
- 'O', 'P', '{', '}', '\r', CN, 'A', 'S', /* scan 18-1F */
- 'D', 'F', 'G', 'H', 'J', 'K', 'L', ':', /* scan 20-27 */
- '"', '~', SH, '|', 'Z', 'X', 'C', 'V', /* scan 28-2F */
- 'B', 'N', 'M', '<', '>', '?', SH, '*', /* scan 30-37 */
- ' ', ' ', CP, 0, 0, 0, 0, 0, /* scan 38-3F */
- 0, 0, 0, 0, 0, NM, ST, '7', /* scan 40-47 */
- '8', '9', '-', '4', '5', '6', '+', '1', /* scan 48-4F */
- '2', '3', '0', '.', 0, 0, 0, 0, /* scan 50-57 */
- 0, 0, 0, 0, 0, 0, 0, 0, /* scan 58-5F */
- 0, 0, 0, 0, 0, 0, 0, 0, /* scan 60-67 */
- 0, 0, 0, 0, 0, 0, 0, 0, /* scan 68-6F */
- 0, 0, 0, 0, 0, 0, 0, 0, /* scan 70-77 */
- 0, 0, 0, 0, 0, 0, 0, 0, /* scan 78-7F */
- '\r', CN, '/', '*', ' ', ST, 'F', 'A', /* extended */
- 0, 'D', 'C', 0, 'B', 0, '@', 'P' /* extended */
+ 0, 0x1b, '!', '@', '#', '$', '%', '^', /* scan 0- 7 */
+ '&', '*', '(', ')', '_', '+', 0x08, '\t', /* scan 8- F */
+ 'Q', 'W', 'E', 'R', 'T', 'Y', 'U', 'I', /* scan 10-17 */
+ 'O', 'P', '{', '}', '\r', CN, 'A', 'S', /* scan 18-1F */
+ 'D', 'F', 'G', 'H', 'J', 'K', 'L', ':', /* scan 20-27 */
+ '"', '~', SH, '|', 'Z', 'X', 'C', 'V', /* scan 28-2F */
+ 'B', 'N', 'M', '<', '>', '?', SH, '*', /* scan 30-37 */
+ ' ', ' ', CP, 0, 0, 0, 0, 0, /* scan 38-3F */
+ 0, 0, 0, 0, 0, NM, ST, '7', /* scan 40-47 */
+ '8', '9', '-', '4', '5', '6', '+', '1', /* scan 48-4F */
+ '2', '3', '0', '.', 0, 0, 0, 0, /* scan 50-57 */
+ 0, 0, 0, 0, 0, 0, 0, 0, /* scan 58-5F */
+ 0, 0, 0, 0, 0, 0, 0, 0, /* scan 60-67 */
+ 0, 0, 0, 0, 0, 0, 0, 0, /* scan 68-6F */
+ 0, 0, 0, 0, 0, 0, 0, 0, /* scan 70-77 */
+ 0, 0, 0, 0, 0, 0, 0, 0, /* scan 78-7F */
+ '\r', CN, '/', '*', ' ', ST, 'F', 'A', /* extended */
+ 0, 'D', 'C', 0, 'B', 0, '@', 'P' /* extended */
},
{ /* control code */
- 0xff, 0x1b, 0xff, 0x00, 0xff, 0xff, 0xff, 0xff, /* scan 0- 7 */
- 0x1e, 0xff, 0xff, 0xff, 0x1f, 0xff, 0xff, '\t', /* scan 8- F */
- 0x11, 0x17, 0x05, 0x12, 0x14, 0x19, 0x15, 0x09, /* scan 10-17 */
- 0x0f, 0x10, 0x1b, 0x1d, '\r', CN, 0x01, 0x13, /* scan 18-1F */
- 0x04, 0x06, 0x07, 0x08, 0x0a, 0x0b, 0x0c, 0xff, /* scan 20-27 */
- 0xff, 0x1c, SH, 0xff, 0x1a, 0x18, 0x03, 0x16, /* scan 28-2F */
- 0x02, 0x0e, 0x0d, 0xff, 0xff, 0xff, SH, 0xff, /* scan 30-37 */
- 0xff, 0xff, CP, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 38-3F */
- 0xff, 0xff, 0xff, 0xff, 0xff, NM, ST, 0xff, /* scan 40-47 */
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 48-4F */
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 50-57 */
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 58-5F */
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 60-67 */
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 68-6F */
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 70-77 */
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 78-7F */
- '\r', CN, '/', '*', ' ', ST, 0xff, 0xff, /* extended */
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff /* extended */
+ 0xff, 0x1b, 0xff, 0x00, 0xff, 0xff, 0xff, 0xff, /* scan 0- 7 */
+ 0x1e, 0xff, 0xff, 0xff, 0x1f, 0xff, 0xff, '\t', /* scan 8- F */
+ 0x11, 0x17, 0x05, 0x12, 0x14, 0x19, 0x15, 0x09, /* scan 10-17 */
+ 0x0f, 0x10, 0x1b, 0x1d, '\r', CN, 0x01, 0x13, /* scan 18-1F */
+ 0x04, 0x06, 0x07, 0x08, 0x0a, 0x0b, 0x0c, 0xff, /* scan 20-27 */
+ 0xff, 0x1c, SH, 0xff, 0x1a, 0x18, 0x03, 0x16, /* scan 28-2F */
+ 0x02, 0x0e, 0x0d, 0xff, 0xff, 0xff, SH, 0xff, /* scan 30-37 */
+ 0xff, 0xff, CP, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 38-3F */
+ 0xff, 0xff, 0xff, 0xff, 0xff, NM, ST, 0xff, /* scan 40-47 */
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 48-4F */
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 50-57 */
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 58-5F */
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 60-67 */
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 68-6F */
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 70-77 */
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 78-7F */
+ '\r', CN, '/', '*', ' ', ST, 0xff, 0xff, /* extended */
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff /* extended */
},
{ /* non numeric code */
- 0, 0x1b, '1', '2', '3', '4', '5', '6', /* scan 0- 7 */
- '7', '8', '9', '0', '-', '=', 0x08, '\t', /* scan 8- F */
- 'q', 'w', 'e', 'r', 't', 'y', 'u', 'i', /* scan 10-17 */
- 'o', 'p', '[', ']', '\r', CN, 'a', 's', /* scan 18-1F */
- 'd', 'f', 'g', 'h', 'j', 'k', 'l', ';', /* scan 20-27 */
- '\'', '`', SH, '\\', 'z', 'x', 'c', 'v', /* scan 28-2F */
- 'b', 'n', 'm', ',', '.', '/', SH, '*', /* scan 30-37 */
- ' ', ' ', CP, 0, 0, 0, 0, 0, /* scan 38-3F */
- 0, 0, 0, 0, 0, NM, ST, 'w', /* scan 40-47 */
- 'x', 'y', 'l', 't', 'u', 'v', 'm', 'q', /* scan 48-4F */
- 'r', 's', 'p', 'n', 0, 0, 0, 0, /* scan 50-57 */
- 0, 0, 0, 0, 0, 0, 0, 0, /* scan 58-5F */
- 0, 0, 0, 0, 0, 0, 0, 0, /* scan 60-67 */
- 0, 0, 0, 0, 0, 0, 0, 0, /* scan 68-6F */
- 0, 0, 0, 0, 0, 0, 0, 0, /* scan 70-77 */
- 0, 0, 0, 0, 0, 0, 0, 0, /* scan 78-7F */
- '\r', CN, '/', '*', ' ', ST, 'F', 'A', /* extended */
- 0, 'D', 'C', 0, 'B', 0, '@', 'P' /* extended */
+ 0, 0x1b, '1', '2', '3', '4', '5', '6', /* scan 0- 7 */
+ '7', '8', '9', '0', '-', '=', 0x08, '\t', /* scan 8- F */
+ 'q', 'w', 'e', 'r', 't', 'y', 'u', 'i', /* scan 10-17 */
+ 'o', 'p', '[', ']', '\r', CN, 'a', 's', /* scan 18-1F */
+ 'd', 'f', 'g', 'h', 'j', 'k', 'l', ';', /* scan 20-27 */
+ '\'', '`', SH, '\\', 'z', 'x', 'c', 'v', /* scan 28-2F */
+ 'b', 'n', 'm', ',', '.', '/', SH, '*', /* scan 30-37 */
+ ' ', ' ', CP, 0, 0, 0, 0, 0, /* scan 38-3F */
+ 0, 0, 0, 0, 0, NM, ST, 'w', /* scan 40-47 */
+ 'x', 'y', 'l', 't', 'u', 'v', 'm', 'q', /* scan 48-4F */
+ 'r', 's', 'p', 'n', 0, 0, 0, 0, /* scan 50-57 */
+ 0, 0, 0, 0, 0, 0, 0, 0, /* scan 58-5F */
+ 0, 0, 0, 0, 0, 0, 0, 0, /* scan 60-67 */
+ 0, 0, 0, 0, 0, 0, 0, 0, /* scan 68-6F */
+ 0, 0, 0, 0, 0, 0, 0, 0, /* scan 70-77 */
+ 0, 0, 0, 0, 0, 0, 0, 0, /* scan 78-7F */
+ '\r', CN, '/', '*', ' ', ST, 'F', 'A', /* extended */
+ 0, 'D', 'C', 0, 'B', 0, '@', 'P' /* extended */
},
{ /* right alt mode - not used in US keyboard */
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 0 - 7 */
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 8 - F */
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 10 -17 */
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 18 -1F */
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 20 -27 */
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 28 -2F */
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 30 -37 */
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 38 -3F */
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 40 -47 */
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 48 -4F */
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 50 -57 */
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 58 -5F */
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 60 -67 */
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 68 -6F */
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 70 -77 */
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 78 -7F */
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* extended */
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff /* extended */
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 0 - 7 */
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 8 - F */
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 10 -17 */
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 18 -1F */
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 20 -27 */
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 28 -2F */
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 30 -37 */
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 38 -3F */
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 40 -47 */
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 48 -4F */
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 50 -57 */
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 58 -5F */
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 60 -67 */
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 68 -6F */
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 70 -77 */
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 78 -7F */
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* extended */
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff /* extended */
}
},
{ /* german keyboard */
{ /* unshift code */
- 0, 0x1b, '1', '2', '3', '4', '5', '6', /* scan 0- 7 */
- '7', '8', '9', '0', 0xe1, '\'', 0x08, '\t', /* scan 8- F */
- 'q', 'w', 'e', 'r', 't', 'z', 'u', 'i', /* scan 10-17 */
- 'o', 'p', 0x81, '+', '\r', CN, 'a', 's', /* scan 18-1F */
- 'd', 'f', 'g', 'h', 'j', 'k', 'l', 0x94, /* scan 20-27 */
- 0x84, '^', SH, '#', 'y', 'x', 'c', 'v', /* scan 28-2F */
- 'b', 'n', 'm', ',', '.', '-', SH, '*', /* scan 30-37 */
- ' ', ' ', CP, 0, 0, 0, 0, 0, /* scan 38-3F */
- 0, 0, 0, 0, 0, NM, ST, '7', /* scan 40-47 */
- '8', '9', '-', '4', '5', '6', '+', '1', /* scan 48-4F */
- '2', '3', '0', ',', 0, 0, '<', 0, /* scan 50-57 */
- 0, 0, 0, 0, 0, 0, 0, 0, /* scan 58-5F */
- 0, 0, 0, 0, 0, 0, 0, 0, /* scan 60-67 */
- 0, 0, 0, 0, 0, 0, 0, 0, /* scan 68-6F */
- 0, 0, 0, 0, 0, 0, 0, 0, /* scan 70-77 */
- 0, 0, 0, 0, 0, 0, 0, 0, /* scan 78-7F */
- '\r', CN, '/', '*', ' ', ST, 'F', 'A', /* extended */
- 0, 'D', 'C', 0, 'B', 0, '@', 'P' /* extended */
+ 0, 0x1b, '1', '2', '3', '4', '5', '6', /* scan 0- 7 */
+ '7', '8', '9', '0', 0xe1, '\'', 0x08, '\t', /* scan 8- F */
+ 'q', 'w', 'e', 'r', 't', 'z', 'u', 'i', /* scan 10-17 */
+ 'o', 'p', 0x81, '+', '\r', CN, 'a', 's', /* scan 18-1F */
+ 'd', 'f', 'g', 'h', 'j', 'k', 'l', 0x94, /* scan 20-27 */
+ 0x84, '^', SH, '#', 'y', 'x', 'c', 'v', /* scan 28-2F */
+ 'b', 'n', 'm', ',', '.', '-', SH, '*', /* scan 30-37 */
+ ' ', ' ', CP, 0, 0, 0, 0, 0, /* scan 38-3F */
+ 0, 0, 0, 0, 0, NM, ST, '7', /* scan 40-47 */
+ '8', '9', '-', '4', '5', '6', '+', '1', /* scan 48-4F */
+ '2', '3', '0', ',', 0, 0, '<', 0, /* scan 50-57 */
+ 0, 0, 0, 0, 0, 0, 0, 0, /* scan 58-5F */
+ 0, 0, 0, 0, 0, 0, 0, 0, /* scan 60-67 */
+ 0, 0, 0, 0, 0, 0, 0, 0, /* scan 68-6F */
+ 0, 0, 0, 0, 0, 0, 0, 0, /* scan 70-77 */
+ 0, 0, 0, 0, 0, 0, 0, 0, /* scan 78-7F */
+ '\r', CN, '/', '*', ' ', ST, 'F', 'A', /* extended */
+ 0, 'D', 'C', 0, 'B', 0, '@', 'P' /* extended */
},
{ /* shift code */
- 0, 0x1b, '!', '"', 0x15, '$', '%', '&', /* scan 0- 7 */
- '/', '(', ')', '=', '?', '`', 0x08, '\t', /* scan 8- F */
- 'Q', 'W', 'E', 'R', 'T', 'Z', 'U', 'I', /* scan 10-17 */
- 'O', 'P', 0x9a, '*', '\r', CN, 'A', 'S', /* scan 18-1F */
- 'D', 'F', 'G', 'H', 'J', 'K', 'L', 0x99, /* scan 20-27 */
- 0x8e, 0xf8, SH, '\'', 'Y', 'X', 'C', 'V', /* scan 28-2F */
- 'B', 'N', 'M', ';', ':', '_', SH, '*', /* scan 30-37 */
- ' ', ' ', CP, 0, 0, 0, 0, 0, /* scan 38-3F */
- 0, 0, 0, 0, 0, NM, ST, '7', /* scan 40-47 */
- '8', '9', '-', '4', '5', '6', '+', '1', /* scan 48-4F */
- '2', '3', '0', ',', 0, 0, '>', 0, /* scan 50-57 */
- 0, 0, 0, 0, 0, 0, 0, 0, /* scan 58-5F */
- 0, 0, 0, 0, 0, 0, 0, 0, /* scan 60-67 */
- 0, 0, 0, 0, 0, 0, 0, 0, /* scan 68-6F */
- 0, 0, 0, 0, 0, 0, 0, 0, /* scan 70-77 */
- 0, 0, 0, 0, 0, 0, 0, 0, /* scan 78-7F */
- '\r', CN, '/', '*', ' ', ST, 'F', 'A', /* extended */
- 0, 'D', 'C', 0, 'B', 0, '@', 'P' /* extended */
+ 0, 0x1b, '!', '"', 0x15, '$', '%', '&', /* scan 0- 7 */
+ '/', '(', ')', '=', '?', '`', 0x08, '\t', /* scan 8- F */
+ 'Q', 'W', 'E', 'R', 'T', 'Z', 'U', 'I', /* scan 10-17 */
+ 'O', 'P', 0x9a, '*', '\r', CN, 'A', 'S', /* scan 18-1F */
+ 'D', 'F', 'G', 'H', 'J', 'K', 'L', 0x99, /* scan 20-27 */
+ 0x8e, 0xf8, SH, '\'', 'Y', 'X', 'C', 'V', /* scan 28-2F */
+ 'B', 'N', 'M', ';', ':', '_', SH, '*', /* scan 30-37 */
+ ' ', ' ', CP, 0, 0, 0, 0, 0, /* scan 38-3F */
+ 0, 0, 0, 0, 0, NM, ST, '7', /* scan 40-47 */
+ '8', '9', '-', '4', '5', '6', '+', '1', /* scan 48-4F */
+ '2', '3', '0', ',', 0, 0, '>', 0, /* scan 50-57 */
+ 0, 0, 0, 0, 0, 0, 0, 0, /* scan 58-5F */
+ 0, 0, 0, 0, 0, 0, 0, 0, /* scan 60-67 */
+ 0, 0, 0, 0, 0, 0, 0, 0, /* scan 68-6F */
+ 0, 0, 0, 0, 0, 0, 0, 0, /* scan 70-77 */
+ 0, 0, 0, 0, 0, 0, 0, 0, /* scan 78-7F */
+ '\r', CN, '/', '*', ' ', ST, 'F', 'A', /* extended */
+ 0, 'D', 'C', 0, 'B', 0, '@', 'P' /* extended */
},
{ /* control code */
- 0xff, 0x1b, 0xff, 0x00, 0xff, 0xff, 0xff, 0xff, /* scan 0- 7 */
- 0x1e, 0xff, 0xff, 0xff, 0x1f, 0xff, 0xff, '\t', /* scan 8- F */
- 0x11, 0x17, 0x05, 0x12, 0x14, 0x19, 0x15, 0x09, /* scan 10-17 */
- 0x0f, 0x10, 0x1b, 0x1d, '\r', CN, 0x01, 0x13, /* scan 18-1F */
- 0x04, 0x06, 0x07, 0x08, 0x0a, 0x0b, 0x0c, 0xff, /* scan 20-27 */
- 0xff, 0x1c, SH, 0xff, 0x1a, 0x18, 0x03, 0x16, /* scan 28-2F */
- 0x02, 0x0e, 0x0d, 0xff, 0xff, 0xff, SH, 0xff, /* scan 30-37 */
- 0xff, 0xff, CP, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 38-3F */
- 0xff, 0xff, 0xff, 0xff, 0xff, NM, ST, 0xff, /* scan 40-47 */
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 48-4F */
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 50-57 */
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 58-5F */
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 60-67 */
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 68-6F */
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 70-77 */
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 78-7F */
- '\r', CN, '/', '*', ' ', ST, 0xff, 0xff, /* extended */
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff /* extended */
+ 0xff, 0x1b, 0xff, 0x00, 0xff, 0xff, 0xff, 0xff, /* scan 0- 7 */
+ 0x1e, 0xff, 0xff, 0xff, 0x1f, 0xff, 0xff, '\t', /* scan 8- F */
+ 0x11, 0x17, 0x05, 0x12, 0x14, 0x19, 0x15, 0x09, /* scan 10-17 */
+ 0x0f, 0x10, 0x1b, 0x1d, '\r', CN, 0x01, 0x13, /* scan 18-1F */
+ 0x04, 0x06, 0x07, 0x08, 0x0a, 0x0b, 0x0c, 0xff, /* scan 20-27 */
+ 0xff, 0x1c, SH, 0xff, 0x1a, 0x18, 0x03, 0x16, /* scan 28-2F */
+ 0x02, 0x0e, 0x0d, 0xff, 0xff, 0xff, SH, 0xff, /* scan 30-37 */
+ 0xff, 0xff, CP, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 38-3F */
+ 0xff, 0xff, 0xff, 0xff, 0xff, NM, ST, 0xff, /* scan 40-47 */
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 48-4F */
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 50-57 */
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 58-5F */
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 60-67 */
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 68-6F */
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 70-77 */
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 78-7F */
+ '\r', CN, '/', '*', ' ', ST, 0xff, 0xff, /* extended */
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff /* extended */
},
{ /* non numeric code */
- 0, 0x1b, '1', '2', '3', '4', '5', '6', /* scan 0- 7 */
- '7', '8', '9', '0', 0xe1, '\'', 0x08, '\t', /* scan 8- F */
- 'q', 'w', 'e', 'r', 't', 'z', 'u', 'i', /* scan 10-17 */
- 'o', 'p', 0x81, '+', '\r', CN, 'a', 's', /* scan 18-1F */
- 'd', 'f', 'g', 'h', 'j', 'k', 'l', 0x94, /* scan 20-27 */
- 0x84, '^', SH, 0, 'y', 'x', 'c', 'v', /* scan 28-2F */
- 'b', 'n', 'm', ',', '.', '-', SH, '*', /* scan 30-37 */
- ' ', ' ', CP, 0, 0, 0, 0, 0, /* scan 38-3F */
- 0, 0, 0, 0, 0, NM, ST, 'w', /* scan 40-47 */
- 'x', 'y', 'l', 't', 'u', 'v', 'm', 'q', /* scan 48-4F */
- 'r', 's', 'p', 'n', 0, 0, '<', 0, /* scan 50-57 */
- 0, 0, 0, 0, 0, 0, 0, 0, /* scan 58-5F */
- 0, 0, 0, 0, 0, 0, 0, 0, /* scan 60-67 */
- 0, 0, 0, 0, 0, 0, 0, 0, /* scan 68-6F */
- 0, 0, 0, 0, 0, 0, 0, 0, /* scan 70-77 */
- 0, 0, 0, 0, 0, 0, 0, 0, /* scan 78-7F */
- '\r', CN, '/', '*', ' ', ST, 'F', 'A', /* extended */
- 0, 'D', 'C', 0, 'B', 0, '@', 'P' /* extended */
+ 0, 0x1b, '1', '2', '3', '4', '5', '6', /* scan 0- 7 */
+ '7', '8', '9', '0', 0xe1, '\'', 0x08, '\t', /* scan 8- F */
+ 'q', 'w', 'e', 'r', 't', 'z', 'u', 'i', /* scan 10-17 */
+ 'o', 'p', 0x81, '+', '\r', CN, 'a', 's', /* scan 18-1F */
+ 'd', 'f', 'g', 'h', 'j', 'k', 'l', 0x94, /* scan 20-27 */
+ 0x84, '^', SH, 0, 'y', 'x', 'c', 'v', /* scan 28-2F */
+ 'b', 'n', 'm', ',', '.', '-', SH, '*', /* scan 30-37 */
+ ' ', ' ', CP, 0, 0, 0, 0, 0, /* scan 38-3F */
+ 0, 0, 0, 0, 0, NM, ST, 'w', /* scan 40-47 */
+ 'x', 'y', 'l', 't', 'u', 'v', 'm', 'q', /* scan 48-4F */
+ 'r', 's', 'p', 'n', 0, 0, '<', 0, /* scan 50-57 */
+ 0, 0, 0, 0, 0, 0, 0, 0, /* scan 58-5F */
+ 0, 0, 0, 0, 0, 0, 0, 0, /* scan 60-67 */
+ 0, 0, 0, 0, 0, 0, 0, 0, /* scan 68-6F */
+ 0, 0, 0, 0, 0, 0, 0, 0, /* scan 70-77 */
+ 0, 0, 0, 0, 0, 0, 0, 0, /* scan 78-7F */
+ '\r', CN, '/', '*', ' ', ST, 'F', 'A', /* extended */
+ 0, 'D', 'C', 0, 'B', 0, '@', 'P' /* extended */
},
{ /* Right alt mode - is used in German keyboard */
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 0 - 7 */
- '{', '[', ']', '}', '\\', 0xff, 0xff, 0xff, /* scan 8 - F */
- '@', 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 10 -17 */
- 0xff, 0xff, 0xff, '~', 0xff, 0xff, 0xff, 0xff, /* scan 18 -1F */
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 20 -27 */
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 28 -2F */
- 0xff, 0xff, 0xe6, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 30 -37 */
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 38 -3F */
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 40 -47 */
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 48 -4F */
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, '|', 0xff, /* scan 50 -57 */
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 58 -5F */
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 60 -67 */
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 68 -6F */
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 70 -77 */
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 78 -7F */
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* extended */
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff /* extended */
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 0 - 7 */
+ '{', '[', ']', '}', '\\', 0xff, 0xff, 0xff, /* scan 8 - F */
+ '@', 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 10 -17 */
+ 0xff, 0xff, 0xff, '~', 0xff, 0xff, 0xff, 0xff, /* scan 18 -1F */
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 20 -27 */
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 28 -2F */
+ 0xff, 0xff, 0xe6, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 30 -37 */
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 38 -3F */
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 40 -47 */
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 48 -4F */
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, '|', 0xff, /* scan 50 -57 */
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 58 -5F */
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 60 -67 */
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 68 -6F */
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 70 -77 */
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* scan 78 -7F */
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* extended */
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff /* extended */
}
}
};
@@ -318,6 +326,13 @@ int i8042_kbd_init (void)
int keymap, try;
char *penv;
+#ifdef CONFIG_USE_CPCIDVI
+ if ((penv = getenv ("console")) != NULL) {
+ if (strncmp (penv, "serial", 7) == 0) {
+ return -1;
+ }
+ }
+#endif
/* Init keyboard device (default US layout) */
keymap = KBD_US;
if ((penv = getenv ("keymap")) != NULL)
@@ -330,9 +345,9 @@ int i8042_kbd_init (void)
{
if (kbd_reset() == 0)
{
- kbd_mapping = keymap;
- kbd_flags = NORMAL;
- kbd_state = 0;
+ kbd_mapping = keymap;
+ kbd_flags = NORMAL;
+ kbd_state = 0;
kbd_led_set();
return 0;
}
@@ -344,7 +359,7 @@ int i8042_kbd_init (void)
/*******************************************************************************
*
* i8042_tstc - test if keyboard input is available
- * option: cursor blinking if called in a loop
+ * option: cursor blinking if called in a loop
*/
int i8042_tstc (void)
{
@@ -380,7 +395,7 @@ int i8042_tstc (void)
/*******************************************************************************
*
* i8042_getc - wait till keyboard input is available
- * option: turn on/off cursor while waiting
+ * option: turn on/off cursor while waiting
*/
int i8042_getc (void)
{
@@ -433,8 +448,8 @@ static void kbd_conv_char (unsigned char scan_code)
{
if (scan_code == 0xe1)
{
- kbd_flags ^= BRK; /* reset the break flag */
- kbd_flags ^= E1; /* bitwise EXOR with E1 flag */
+ kbd_flags ^= BRK; /* reset the break flag */
+ kbd_flags ^= E1; /* bitwise EXOR with E1 flag */
}
return;
}
@@ -545,7 +560,7 @@ static void kbd_caps (unsigned char scan_code)
if ((kbd_flags & BRK) == NORMAL)
{
kbd_flags ^= CAPS;
- kbd_led_set (); /* update keyboard LED */
+ kbd_led_set (); /* update keyboard LED */
}
}
@@ -558,7 +573,7 @@ static void kbd_num (unsigned char scan_code)
{
kbd_flags ^= NUM;
kbd_state = (kbd_flags & NUM) ? AS : NM;
- kbd_led_set (); /* update keyboard LED */
+ kbd_led_set (); /* update keyboard LED */
}
}
@@ -570,7 +585,7 @@ static void kbd_scroll (unsigned char scan_code)
if ((kbd_flags & BRK) == NORMAL)
{
kbd_flags ^= STP;
- kbd_led_set (); /* update keyboard LED */
+ kbd_led_set (); /* update keyboard LED */
if (kbd_flags & STP)
kbd_input = 0x13;
else
@@ -600,9 +615,9 @@ static void kbd_alt (unsigned char scan_code)
static void kbd_led_set (void)
{
kbd_input_empty();
- out8 (I8042_DATA_REG, 0xed); /* SET LED command */
+ out8 (I8042_DATA_REG, 0xed); /* SET LED command */
kbd_input_empty();
- out8 (I8042_DATA_REG, (kbd_flags & 0x7)); /* LED bits only */
+ out8 (I8042_DATA_REG, (kbd_flags & 0x7)); /* LED bits only */
}
@@ -633,7 +648,11 @@ static int kbd_reset (void)
if (kbd_input_empty() == 0)
return -1;
+#ifdef CONFIG_USE_CPCIDVI
+ out8 (I8042_COMMAND_REG, 0x60);
+#else
out8 (I8042_DATA_REG, 0x60);
+#endif
if (kbd_input_empty() == 0)
return -1;
diff --git a/drivers/keyboard.c b/drivers/keyboard.c
index 1579095558..9975202d7a 100644
--- a/drivers/keyboard.c
+++ b/drivers/keyboard.c
@@ -33,7 +33,7 @@
#define KBD_BUFFER_LEN 0x20 /* size of the keyboardbuffer */
-#ifdef CONFIG_MPC5xxx
+#if defined(CONFIG_MPC5xxx) || defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || defined(CONFIG_MPC8555)
int ps2ser_check(void);
#endif
@@ -75,7 +75,7 @@ static void kbd_put_queue(char data)
/* test if a character is in the queue */
static int kbd_testc(void)
{
-#ifdef CONFIG_MPC5xxx
+#if defined(CONFIG_MPC5xxx) || defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || defined(CONFIG_MPC8555)
/* no ISR is used, so received chars must be polled */
ps2ser_check();
#endif
@@ -90,7 +90,7 @@ static int kbd_getc(void)
{
char c;
while(in_pointer==out_pointer) {
-#ifdef CONFIG_MPC5xxx
+#if defined(CONFIG_MPC5xxx) || defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || defined(CONFIG_MPC8555)
/* no ISR is used, so received chars must be polled */
ps2ser_check();
#endif
diff --git a/drivers/ks8695eth.c b/drivers/ks8695eth.c
index a4b03aee8c..b598dd7f23 100644
--- a/drivers/ks8695eth.c
+++ b/drivers/ks8695eth.c
@@ -18,11 +18,11 @@
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
-#ifdef CONFIG_DRIVER_KS8695ETH
-
/****************************************************************************/
#include <common.h>
+
+#ifdef CONFIG_DRIVER_KS8695ETH
#include <malloc.h>
#include <net.h>
#include <asm/io.h>
@@ -216,10 +216,10 @@ int eth_send(volatile void *packet, int len)
packet, len);
dp = &ks8695_tx[next];
- memcpy((void *) dp->addr, packet, len);
+ memcpy((void *) dp->addr, (void *) packet, len);
if (len < 64) {
- memset(dp->addr+len, 0, 64-len);
+ memset((void *) (dp->addr + len), 0, 64-len);
len = 64;
}
diff --git a/drivers/lan91c96.c b/drivers/lan91c96.c
index bb03dae39c..a50c5f0abe 100644
--- a/drivers/lan91c96.c
+++ b/drivers/lan91c96.c
@@ -185,21 +185,21 @@ static int smc_rcv (void);
. If an EEPROM is present it really should be consulted.
*/
int smc_get_ethaddr(bd_t *bd);
-int get_rom_mac(char *v_rom_mac);
+int get_rom_mac(unsigned char *v_rom_mac);
/* ------------------------------------------------------------
* Internal routines
* ------------------------------------------------------------
*/
-static char smc_mac_addr[] = { 0xc0, 0x00, 0x00, 0x1b, 0x62, 0x9c };
+static unsigned char smc_mac_addr[] = { 0xc0, 0x00, 0x00, 0x1b, 0x62, 0x9c };
/*
* This function must be called before smc_open() if you want to override
* the default mac address.
*/
-void smc_set_mac_addr (const char *addr)
+void smc_set_mac_addr (const unsigned char *addr)
{
int i;
@@ -883,7 +883,7 @@ int smc_get_ethaddr (bd_t * bd)
char *s = NULL;
char *e = NULL;
char *v_mac, es[] = "11:22:33:44:55:66";
- uchar s_env_mac[64];
+ char s_env_mac[64];
uchar v_env_mac[6];
uchar v_rom_mac[6];
@@ -905,7 +905,7 @@ int smc_get_ethaddr (bd_t * bd)
if (!env_present) { /* if NO env */
if (rom_valid) { /* but ROM is valid */
- v_mac = v_rom_mac;
+ v_mac = (char *)v_rom_mac;
sprintf (s_env_mac, "%02X:%02X:%02X:%02X:%02X:%02X",
v_mac[0], v_mac[1], v_mac[2], v_mac[3],
v_mac[4], v_mac[5]);
@@ -915,7 +915,7 @@ int smc_get_ethaddr (bd_t * bd)
return (-1);
}
} else { /* good env, don't care ROM */
- v_mac = v_env_mac; /* always use a good env over a ROM */
+ v_mac = (char *)v_env_mac; /* always use a good env over a ROM */
}
if (env_present && rom_valid) { /* if both env and ROM are good */
@@ -935,7 +935,7 @@ int smc_get_ethaddr (bd_t * bd)
}
}
memcpy (bd->bi_enetaddr, v_mac, 6); /* update global address to match env (allows env changing) */
- smc_set_mac_addr (v_mac); /* use old function to update smc default */
+ smc_set_mac_addr ((unsigned char *)v_mac); /* use old function to update smc default */
PRINTK("Using MAC Address %02X:%02X:%02X:%02X:%02X:%02X\n", v_mac[0], v_mac[1],
v_mac[2], v_mac[3], v_mac[4], v_mac[5]);
return (0);
@@ -946,7 +946,7 @@ int smc_get_ethaddr (bd_t * bd)
* Note, this has omly been tested for the OMAP730 P2.
*/
-int get_rom_mac (char *v_rom_mac)
+int get_rom_mac (unsigned char *v_rom_mac)
{
#ifdef HARDCODE_MAC /* used for testing or to supress run time warnings */
char hw_mac_addr[] = { 0x02, 0x80, 0xad, 0x20, 0x31, 0xb8 };
diff --git a/drivers/lan91c96.h b/drivers/lan91c96.h
index b7d7455b9d..7d33a821f3 100644
--- a/drivers/lan91c96.h
+++ b/drivers/lan91c96.h
@@ -51,7 +51,7 @@
* in order to override the default mac address.
*/
-void smc_set_mac_addr(const char *addr);
+void smc_set_mac_addr(const unsigned char *addr);
/* I want some simple types */
diff --git a/drivers/mpc8xx_pcmcia.c b/drivers/mpc8xx_pcmcia.c
new file mode 100644
index 0000000000..399a719e56
--- /dev/null
+++ b/drivers/mpc8xx_pcmcia.c
@@ -0,0 +1,304 @@
+#include <common.h>
+#if defined(CONFIG_8xx)
+#include <mpc8xx.h>
+#endif
+#include <pcmcia.h>
+
+#undef CONFIG_PCMCIA
+
+#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
+#define CONFIG_PCMCIA
+#endif
+
+#if (CONFIG_COMMANDS & CFG_CMD_IDE) && defined(CONFIG_IDE_8xx_PCCARD)
+#define CONFIG_PCMCIA
+#endif
+
+#if defined(CONFIG_8xx) && defined(CONFIG_PCMCIA)
+
+#if defined(CONFIG_IDE_8xx_PCCARD)
+extern int check_ide_device (int slot);
+#endif
+
+extern int pcmcia_hardware_enable (int slot);
+extern int pcmcia_voltage_set(int slot, int vcc, int vpp);
+
+#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
+extern int pcmcia_hardware_disable(int slot);
+#endif
+
+static u_int m8xx_get_graycode(u_int size);
+#if 0 /* Disabled */
+static u_int m8xx_get_speed(u_int ns, u_int is_io);
+#endif
+
+/* look up table for pgcrx registers */
+u_int *pcmcia_pgcrx[2] = {
+ &((immap_t *)CFG_IMMR)->im_pcmcia.pcmc_pgcra,
+ &((immap_t *)CFG_IMMR)->im_pcmcia.pcmc_pgcrb,
+};
+
+/*
+ * Search this table to see if the windowsize is
+ * supported...
+ */
+
+#define M8XX_SIZES_NO 32
+
+static const u_int m8xx_size_to_gray[M8XX_SIZES_NO] =
+{ 0x00000001, 0x00000002, 0x00000008, 0x00000004,
+ 0x00000080, 0x00000040, 0x00000010, 0x00000020,
+ 0x00008000, 0x00004000, 0x00001000, 0x00002000,
+ 0x00000100, 0x00000200, 0x00000800, 0x00000400,
+
+ 0x0fffffff, 0xffffffff, 0xffffffff, 0xffffffff,
+ 0x01000000, 0x02000000, 0xffffffff, 0x04000000,
+ 0x00010000, 0x00020000, 0x00080000, 0x00040000,
+ 0x00800000, 0x00400000, 0x00100000, 0x00200000 };
+
+
+/* -------------------------------------------------------------------- */
+
+#ifdef CONFIG_HMI10
+#define HMI10_FRAM_TIMING ( PCMCIA_SHT(2) \
+ | PCMCIA_SST(2) \
+ | PCMCIA_SL(4))
+#endif
+
+#if defined(CONFIG_LWMON) || defined(CONFIG_NSCU)
+#define CFG_PCMCIA_TIMING ( PCMCIA_SHT(9) \
+ | PCMCIA_SST(3) \
+ | PCMCIA_SL(12))
+#else
+#define CFG_PCMCIA_TIMING ( PCMCIA_SHT(2) \
+ | PCMCIA_SST(4) \
+ | PCMCIA_SL(9))
+#endif
+
+/* -------------------------------------------------------------------- */
+
+int pcmcia_on (void)
+{
+ u_long reg, base;
+ pcmcia_win_t *win;
+ u_int slotbit;
+ u_int rc, slot;
+ int i;
+
+ debug ("Enable PCMCIA " PCMCIA_SLOT_MSG "\n");
+
+ /* intialize the fixed memory windows */
+ win = (pcmcia_win_t *)(&((immap_t *)CFG_IMMR)->im_pcmcia.pcmc_pbr0);
+ base = CFG_PCMCIA_MEM_ADDR;
+
+ if((reg = m8xx_get_graycode(CFG_PCMCIA_MEM_SIZE)) == -1) {
+ printf ("Cannot set window size to 0x%08x\n",
+ CFG_PCMCIA_MEM_SIZE);
+ return (1);
+ }
+
+ slotbit = PCMCIA_SLOT_x;
+ for (i=0; i<PCMCIA_MEM_WIN_NO; ++i) {
+ win->br = base;
+
+#if (PCMCIA_SOCKETS_NO == 2)
+ if (i == 4) /* Another slot starting from win 4 */
+ slotbit = (slotbit ? PCMCIA_PSLOT_A : PCMCIA_PSLOT_B);
+#endif
+ switch (i) {
+#ifdef CONFIG_IDE_8xx_PCCARD
+ case 4:
+#ifdef CONFIG_HMI10
+ { /* map FRAM area */
+ win->or = ( PCMCIA_BSIZE_256K
+ | PCMCIA_PPS_8
+ | PCMCIA_PRS_ATTR
+ | slotbit
+ | PCMCIA_PV
+ | HMI10_FRAM_TIMING );
+ break;
+ }
+#endif
+ case 0: { /* map attribute memory */
+ win->or = ( PCMCIA_BSIZE_64M
+ | PCMCIA_PPS_8
+ | PCMCIA_PRS_ATTR
+ | slotbit
+ | PCMCIA_PV
+ | CFG_PCMCIA_TIMING );
+ break;
+ }
+ case 5:
+ case 1: { /* map I/O window for data reg */
+ win->or = ( PCMCIA_BSIZE_1K
+ | PCMCIA_PPS_16
+ | PCMCIA_PRS_IO
+ | slotbit
+ | PCMCIA_PV
+ | CFG_PCMCIA_TIMING );
+ break;
+ }
+ case 6:
+ case 2: { /* map I/O window for cmd/ctrl reg block */
+ win->or = ( PCMCIA_BSIZE_1K
+ | PCMCIA_PPS_8
+ | PCMCIA_PRS_IO
+ | slotbit
+ | PCMCIA_PV
+ | CFG_PCMCIA_TIMING );
+ break;
+ }
+#endif /* CONFIG_IDE_8xx_PCCARD */
+#ifdef CONFIG_HMI10
+ case 3: { /* map I/O window for 4xUART data/ctrl */
+ win->br += 0x40000;
+ win->or = ( PCMCIA_BSIZE_256K
+ | PCMCIA_PPS_8
+ | PCMCIA_PRS_IO
+ | slotbit
+ | PCMCIA_PV
+ | CFG_PCMCIA_TIMING );
+ break;
+ }
+#endif /* CONFIG_HMI10 */
+ default: /* set to not valid */
+ win->or = 0;
+ break;
+ }
+
+ debug ("MemWin %d: PBR 0x%08lX POR %08lX\n",
+ i, win->br, win->or);
+ base += CFG_PCMCIA_MEM_SIZE;
+ ++win;
+ }
+
+ for (i=0, rc=0, slot=_slot_; i<PCMCIA_SOCKETS_NO; i++, slot = !slot) {
+ /* turn off voltage */
+ if ((rc = pcmcia_voltage_set(slot, 0, 0)))
+ continue;
+
+ /* Enable external hardware */
+ if ((rc = pcmcia_hardware_enable(slot)))
+ continue;
+
+#ifdef CONFIG_IDE_8xx_PCCARD
+ if ((rc = check_ide_device(i)))
+ continue;
+#endif
+ }
+ return rc;
+}
+
+#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
+int pcmcia_off (void)
+{
+ int i;
+ pcmcia_win_t *win;
+
+ printf ("Disable PCMCIA " PCMCIA_SLOT_MSG "\n");
+
+ /* clear interrupt state, and disable interrupts */
+ ((immap_t *)CFG_IMMR)->im_pcmcia.pcmc_pscr = PCMCIA_MASK(_slot_);
+ ((immap_t *)CFG_IMMR)->im_pcmcia.pcmc_per &= ~PCMCIA_MASK(_slot_);
+
+ /* turn off interrupt and disable CxOE */
+ PCMCIA_PGCRX(_slot_) = __MY_PCMCIA_GCRX_CXOE;
+
+ /* turn off memory windows */
+ win = (pcmcia_win_t *)(&((immap_t *)CFG_IMMR)->im_pcmcia.pcmc_pbr0);
+
+ for (i=0; i<PCMCIA_MEM_WIN_NO; ++i) {
+ /* disable memory window */
+ win->or = 0;
+ ++win;
+ }
+
+ /* turn off voltage */
+ pcmcia_voltage_set(_slot_, 0, 0);
+
+ /* disable external hardware */
+ printf ("Shutdown and Poweroff " PCMCIA_SLOT_MSG "\n");
+ pcmcia_hardware_disable(_slot_);
+ return 0;
+}
+#endif /* CFG_CMD_PCMCIA */
+
+
+static u_int m8xx_get_graycode(u_int size)
+{
+ u_int k;
+
+ for (k = 0; k < M8XX_SIZES_NO; k++) {
+ if(m8xx_size_to_gray[k] == size)
+ break;
+ }
+
+ if((k == M8XX_SIZES_NO) || (m8xx_size_to_gray[k] == -1))
+ k = -1;
+
+ return k;
+}
+
+#if 0
+
+#if defined(CONFIG_RPXCLASSIC) || defined(CONFIG_RPXLITE)
+
+/* The RPX boards seems to have it's bus monitor timeout set to 6*8 clocks.
+ * SYPCR is write once only, therefore must the slowest memory be faster
+ * than the bus monitor or we will get a machine check due to the bus timeout.
+ */
+#undef PCMCIA_BMT_LIMIT
+#define PCMCIA_BMT_LIMIT (6*8)
+#endif
+
+static u_int m8xx_get_speed(u_int ns, u_int is_io)
+{
+ u_int reg, clocks, psst, psl, psht;
+
+ if(!ns) {
+
+ /*
+ * We get called with IO maps setup to 0ns
+ * if not specified by the user.
+ * They should be 255ns.
+ */
+
+ if(is_io)
+ ns = 255;
+ else
+ ns = 100; /* fast memory if 0 */
+ }
+
+ /*
+ * In PSST, PSL, PSHT fields we tell the controller
+ * timing parameters in CLKOUT clock cycles.
+ * CLKOUT is the same as GCLK2_50.
+ */
+
+ /* how we want to adjust the timing - in percent */
+
+#define ADJ 180 /* 80 % longer accesstime - to be sure */
+
+ clocks = ((M8XX_BUSFREQ / 1000) * ns) / 1000;
+ clocks = (clocks * ADJ) / (100*1000);
+
+ if(clocks >= PCMCIA_BMT_LIMIT) {
+ DEBUG(0, "Max access time limit reached\n");
+ clocks = PCMCIA_BMT_LIMIT-1;
+ }
+
+ psst = clocks / 7; /* setup time */
+ psht = clocks / 7; /* hold time */
+ psl = (clocks * 5) / 7; /* strobe length */
+
+ psst += clocks - (psst + psht + psl);
+
+ reg = psst << 12;
+ reg |= psl << 7;
+ reg |= psht << 16;
+
+ return reg;
+}
+#endif /* 0 */
+
+#endif /* CONFIG_8xx && CONFIG_PCMCIA */
diff --git a/drivers/nand/Makefile b/drivers/nand/Makefile
new file mode 100644
index 0000000000..96f67dfca8
--- /dev/null
+++ b/drivers/nand/Makefile
@@ -0,0 +1,16 @@
+include $(TOPDIR)/config.mk
+
+LIB := libnand.a
+
+OBJS := nand.o nand_base.o nand_ids.o nand_ecc.o nand_bbt.o
+all: $(LIB)
+
+$(LIB): $(OBJS)
+ $(AR) crv $@ $(OBJS)
+
+#########################################################################
+
+.depend: Makefile $(OBJS:.o=.c)
+ $(CC) -M $(CFLAGS) $(OBJS:.o=.c) > $@
+
+sinclude .depend
diff --git a/drivers/nand/diskonchip.c b/drivers/nand/diskonchip.c
new file mode 100644
index 0000000000..e17af70d07
--- /dev/null
+++ b/drivers/nand/diskonchip.c
@@ -0,0 +1,1787 @@
+/*
+ * drivers/mtd/nand/diskonchip.c
+ *
+ * (C) 2003 Red Hat, Inc.
+ * (C) 2004 Dan Brown <dan_brown@ieee.org>
+ * (C) 2004 Kalev Lember <kalev@smartlink.ee>
+ *
+ * Author: David Woodhouse <dwmw2@infradead.org>
+ * Additional Diskonchip 2000 and Millennium support by Dan Brown <dan_brown@ieee.org>
+ * Diskonchip Millennium Plus support by Kalev Lember <kalev@smartlink.ee>
+ *
+ * Error correction code lifted from the old docecc code
+ * Author: Fabrice Bellard (fabrice.bellard@netgem.com)
+ * Copyright (C) 2000 Netgem S.A.
+ * converted to the generic Reed-Solomon library by Thomas Gleixner <tglx@linutronix.de>
+ *
+ * Interface to generic NAND code for M-Systems DiskOnChip devices
+ *
+ * $Id: diskonchip.c,v 1.45 2005/01/05 18:05:14 dwmw2 Exp $
+ */
+
+#include <common.h>
+
+#if !defined(CFG_NAND_LEGACY)
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/sched.h>
+#include <linux/delay.h>
+#include <linux/rslib.h>
+#include <linux/moduleparam.h>
+#include <asm/io.h>
+
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/nand.h>
+#include <linux/mtd/doc2000.h>
+#include <linux/mtd/compatmac.h>
+#include <linux/mtd/partitions.h>
+#include <linux/mtd/inftl.h>
+
+/* Where to look for the devices? */
+#ifndef CONFIG_MTD_DISKONCHIP_PROBE_ADDRESS
+#define CONFIG_MTD_DISKONCHIP_PROBE_ADDRESS 0
+#endif
+
+static unsigned long __initdata doc_locations[] = {
+#if defined (__alpha__) || defined(__i386__) || defined(__x86_64__)
+#ifdef CONFIG_MTD_DISKONCHIP_PROBE_HIGH
+ 0xfffc8000, 0xfffca000, 0xfffcc000, 0xfffce000,
+ 0xfffd0000, 0xfffd2000, 0xfffd4000, 0xfffd6000,
+ 0xfffd8000, 0xfffda000, 0xfffdc000, 0xfffde000,
+ 0xfffe0000, 0xfffe2000, 0xfffe4000, 0xfffe6000,
+ 0xfffe8000, 0xfffea000, 0xfffec000, 0xfffee000,
+#else /* CONFIG_MTD_DOCPROBE_HIGH */
+ 0xc8000, 0xca000, 0xcc000, 0xce000,
+ 0xd0000, 0xd2000, 0xd4000, 0xd6000,
+ 0xd8000, 0xda000, 0xdc000, 0xde000,
+ 0xe0000, 0xe2000, 0xe4000, 0xe6000,
+ 0xe8000, 0xea000, 0xec000, 0xee000,
+#endif /* CONFIG_MTD_DOCPROBE_HIGH */
+#elif defined(__PPC__)
+ 0xe4000000,
+#elif defined(CONFIG_MOMENCO_OCELOT)
+ 0x2f000000,
+ 0xff000000,
+#elif defined(CONFIG_MOMENCO_OCELOT_G) || defined (CONFIG_MOMENCO_OCELOT_C)
+ 0xff000000,
+##else
+#warning Unknown architecture for DiskOnChip. No default probe locations defined
+#endif
+ 0xffffffff };
+
+static struct mtd_info *doclist = NULL;
+
+struct doc_priv {
+ void __iomem *virtadr;
+ unsigned long physadr;
+ u_char ChipID;
+ u_char CDSNControl;
+ int chips_per_floor; /* The number of chips detected on each floor */
+ int curfloor;
+ int curchip;
+ int mh0_page;
+ int mh1_page;
+ struct mtd_info *nextdoc;
+};
+
+/* Max number of eraseblocks to scan (from start of device) for the (I)NFTL
+ MediaHeader. The spec says to just keep going, I think, but that's just
+ silly. */
+#define MAX_MEDIAHEADER_SCAN 8
+
+/* This is the syndrome computed by the HW ecc generator upon reading an empty
+ page, one with all 0xff for data and stored ecc code. */
+static u_char empty_read_syndrome[6] = { 0x26, 0xff, 0x6d, 0x47, 0x73, 0x7a };
+/* This is the ecc value computed by the HW ecc generator upon writing an empty
+ page, one with all 0xff for data. */
+static u_char empty_write_ecc[6] = { 0x4b, 0x00, 0xe2, 0x0e, 0x93, 0xf7 };
+
+#define INFTL_BBT_RESERVED_BLOCKS 4
+
+#define DoC_is_MillenniumPlus(doc) ((doc)->ChipID == DOC_ChipID_DocMilPlus16 || (doc)->ChipID == DOC_ChipID_DocMilPlus32)
+#define DoC_is_Millennium(doc) ((doc)->ChipID == DOC_ChipID_DocMil)
+#define DoC_is_2000(doc) ((doc)->ChipID == DOC_ChipID_Doc2k)
+
+static void doc200x_hwcontrol(struct mtd_info *mtd, int cmd);
+static void doc200x_select_chip(struct mtd_info *mtd, int chip);
+
+static int debug=0;
+module_param(debug, int, 0);
+
+static int try_dword=1;
+module_param(try_dword, int, 0);
+
+static int no_ecc_failures=0;
+module_param(no_ecc_failures, int, 0);
+
+#ifdef CONFIG_MTD_PARTITIONS
+static int no_autopart=0;
+module_param(no_autopart, int, 0);
+#endif
+
+#ifdef MTD_NAND_DISKONCHIP_BBTWRITE
+static int inftl_bbt_write=1;
+#else
+static int inftl_bbt_write=0;
+#endif
+module_param(inftl_bbt_write, int, 0);
+
+static unsigned long doc_config_location = CONFIG_MTD_DISKONCHIP_PROBE_ADDRESS;
+module_param(doc_config_location, ulong, 0);
+MODULE_PARM_DESC(doc_config_location, "Physical memory address at which to probe for DiskOnChip");
+
+
+/* Sector size for HW ECC */
+#define SECTOR_SIZE 512
+/* The sector bytes are packed into NB_DATA 10 bit words */
+#define NB_DATA (((SECTOR_SIZE + 1) * 8 + 6) / 10)
+/* Number of roots */
+#define NROOTS 4
+/* First consective root */
+#define FCR 510
+/* Number of symbols */
+#define NN 1023
+
+/* the Reed Solomon control structure */
+static struct rs_control *rs_decoder;
+
+/*
+ * The HW decoder in the DoC ASIC's provides us a error syndrome,
+ * which we must convert to a standard syndrom usable by the generic
+ * Reed-Solomon library code.
+ *
+ * Fabrice Bellard figured this out in the old docecc code. I added
+ * some comments, improved a minor bit and converted it to make use
+ * of the generic Reed-Solomon libary. tglx
+ */
+static int doc_ecc_decode (struct rs_control *rs, uint8_t *data, uint8_t *ecc)
+{
+ int i, j, nerr, errpos[8];
+ uint8_t parity;
+ uint16_t ds[4], s[5], tmp, errval[8], syn[4];
+
+ /* Convert the ecc bytes into words */
+ ds[0] = ((ecc[4] & 0xff) >> 0) | ((ecc[5] & 0x03) << 8);
+ ds[1] = ((ecc[5] & 0xfc) >> 2) | ((ecc[2] & 0x0f) << 6);
+ ds[2] = ((ecc[2] & 0xf0) >> 4) | ((ecc[3] & 0x3f) << 4);
+ ds[3] = ((ecc[3] & 0xc0) >> 6) | ((ecc[0] & 0xff) << 2);
+ parity = ecc[1];
+
+ /* Initialize the syndrom buffer */
+ for (i = 0; i < NROOTS; i++)
+ s[i] = ds[0];
+ /*
+ * Evaluate
+ * s[i] = ds[3]x^3 + ds[2]x^2 + ds[1]x^1 + ds[0]
+ * where x = alpha^(FCR + i)
+ */
+ for(j = 1; j < NROOTS; j++) {
+ if(ds[j] == 0)
+ continue;
+ tmp = rs->index_of[ds[j]];
+ for(i = 0; i < NROOTS; i++)
+ s[i] ^= rs->alpha_to[rs_modnn(rs, tmp + (FCR + i) * j)];
+ }
+
+ /* Calc s[i] = s[i] / alpha^(v + i) */
+ for (i = 0; i < NROOTS; i++) {
+ if (syn[i])
+ syn[i] = rs_modnn(rs, rs->index_of[s[i]] + (NN - FCR - i));
+ }
+ /* Call the decoder library */
+ nerr = decode_rs16(rs, NULL, NULL, 1019, syn, 0, errpos, 0, errval);
+
+ /* Incorrectable errors ? */
+ if (nerr < 0)
+ return nerr;
+
+ /*
+ * Correct the errors. The bitpositions are a bit of magic,
+ * but they are given by the design of the de/encoder circuit
+ * in the DoC ASIC's.
+ */
+ for(i = 0;i < nerr; i++) {
+ int index, bitpos, pos = 1015 - errpos[i];
+ uint8_t val;
+ if (pos >= NB_DATA && pos < 1019)
+ continue;
+ if (pos < NB_DATA) {
+ /* extract bit position (MSB first) */
+ pos = 10 * (NB_DATA - 1 - pos) - 6;
+ /* now correct the following 10 bits. At most two bytes
+ can be modified since pos is even */
+ index = (pos >> 3) ^ 1;
+ bitpos = pos & 7;
+ if ((index >= 0 && index < SECTOR_SIZE) ||
+ index == (SECTOR_SIZE + 1)) {
+ val = (uint8_t) (errval[i] >> (2 + bitpos));
+ parity ^= val;
+ if (index < SECTOR_SIZE)
+ data[index] ^= val;
+ }
+ index = ((pos >> 3) + 1) ^ 1;
+ bitpos = (bitpos + 10) & 7;
+ if (bitpos == 0)
+ bitpos = 8;
+ if ((index >= 0 && index < SECTOR_SIZE) ||
+ index == (SECTOR_SIZE + 1)) {
+ val = (uint8_t)(errval[i] << (8 - bitpos));
+ parity ^= val;
+ if (index < SECTOR_SIZE)
+ data[index] ^= val;
+ }
+ }
+ }
+ /* If the parity is wrong, no rescue possible */
+ return parity ? -1 : nerr;
+}
+
+static void DoC_Delay(struct doc_priv *doc, unsigned short cycles)
+{
+ volatile char dummy;
+ int i;
+
+ for (i = 0; i < cycles; i++) {
+ if (DoC_is_Millennium(doc))
+ dummy = ReadDOC(doc->virtadr, NOP);
+ else if (DoC_is_MillenniumPlus(doc))
+ dummy = ReadDOC(doc->virtadr, Mplus_NOP);
+ else
+ dummy = ReadDOC(doc->virtadr, DOCStatus);
+ }
+
+}
+
+#define CDSN_CTRL_FR_B_MASK (CDSN_CTRL_FR_B0 | CDSN_CTRL_FR_B1)
+
+/* DOC_WaitReady: Wait for RDY line to be asserted by the flash chip */
+static int _DoC_WaitReady(struct doc_priv *doc)
+{
+ void __iomem *docptr = doc->virtadr;
+ unsigned long timeo = jiffies + (HZ * 10);
+
+ if(debug) printk("_DoC_WaitReady...\n");
+ /* Out-of-line routine to wait for chip response */
+ if (DoC_is_MillenniumPlus(doc)) {
+ while ((ReadDOC(docptr, Mplus_FlashControl) & CDSN_CTRL_FR_B_MASK) != CDSN_CTRL_FR_B_MASK) {
+ if (time_after(jiffies, timeo)) {
+ printk("_DoC_WaitReady timed out.\n");
+ return -EIO;
+ }
+ udelay(1);
+ cond_resched();
+ }
+ } else {
+ while (!(ReadDOC(docptr, CDSNControl) & CDSN_CTRL_FR_B)) {
+ if (time_after(jiffies, timeo)) {
+ printk("_DoC_WaitReady timed out.\n");
+ return -EIO;
+ }
+ udelay(1);
+ cond_resched();
+ }
+ }
+
+ return 0;
+}
+
+static inline int DoC_WaitReady(struct doc_priv *doc)
+{
+ void __iomem *docptr = doc->virtadr;
+ int ret = 0;
+
+ if (DoC_is_MillenniumPlus(doc)) {
+ DoC_Delay(doc, 4);
+
+ if ((ReadDOC(docptr, Mplus_FlashControl) & CDSN_CTRL_FR_B_MASK) != CDSN_CTRL_FR_B_MASK)
+ /* Call the out-of-line routine to wait */
+ ret = _DoC_WaitReady(doc);
+ } else {
+ DoC_Delay(doc, 4);
+
+ if (!(ReadDOC(docptr, CDSNControl) & CDSN_CTRL_FR_B))
+ /* Call the out-of-line routine to wait */
+ ret = _DoC_WaitReady(doc);
+ DoC_Delay(doc, 2);
+ }
+
+ if(debug) printk("DoC_WaitReady OK\n");
+ return ret;
+}
+
+static void doc2000_write_byte(struct mtd_info *mtd, u_char datum)
+{
+ struct nand_chip *this = mtd->priv;
+ struct doc_priv *doc = this->priv;
+ void __iomem *docptr = doc->virtadr;
+
+ if(debug)printk("write_byte %02x\n", datum);
+ WriteDOC(datum, docptr, CDSNSlowIO);
+ WriteDOC(datum, docptr, 2k_CDSN_IO);
+}
+
+static u_char doc2000_read_byte(struct mtd_info *mtd)
+{
+ struct nand_chip *this = mtd->priv;
+ struct doc_priv *doc = this->priv;
+ void __iomem *docptr = doc->virtadr;
+ u_char ret;
+
+ ReadDOC(docptr, CDSNSlowIO);
+ DoC_Delay(doc, 2);
+ ret = ReadDOC(docptr, 2k_CDSN_IO);
+ if (debug) printk("read_byte returns %02x\n", ret);
+ return ret;
+}
+
+static void doc2000_writebuf(struct mtd_info *mtd,
+ const u_char *buf, int len)
+{
+ struct nand_chip *this = mtd->priv;
+ struct doc_priv *doc = this->priv;
+ void __iomem *docptr = doc->virtadr;
+ int i;
+ if (debug)printk("writebuf of %d bytes: ", len);
+ for (i=0; i < len; i++) {
+ WriteDOC_(buf[i], docptr, DoC_2k_CDSN_IO + i);
+ if (debug && i < 16)
+ printk("%02x ", buf[i]);
+ }
+ if (debug) printk("\n");
+}
+
+static void doc2000_readbuf(struct mtd_info *mtd,
+ u_char *buf, int len)
+{
+ struct nand_chip *this = mtd->priv;
+ struct doc_priv *doc = this->priv;
+ void __iomem *docptr = doc->virtadr;
+ int i;
+
+ if (debug)printk("readbuf of %d bytes: ", len);
+
+ for (i=0; i < len; i++) {
+ buf[i] = ReadDOC(docptr, 2k_CDSN_IO + i);
+ }
+}
+
+static void doc2000_readbuf_dword(struct mtd_info *mtd,
+ u_char *buf, int len)
+{
+ struct nand_chip *this = mtd->priv;
+ struct doc_priv *doc = this->priv;
+ void __iomem *docptr = doc->virtadr;
+ int i;
+
+ if (debug) printk("readbuf_dword of %d bytes: ", len);
+
+ if (unlikely((((unsigned long)buf)|len) & 3)) {
+ for (i=0; i < len; i++) {
+ *(uint8_t *)(&buf[i]) = ReadDOC(docptr, 2k_CDSN_IO + i);
+ }
+ } else {
+ for (i=0; i < len; i+=4) {
+ *(uint32_t*)(&buf[i]) = readl(docptr + DoC_2k_CDSN_IO + i);
+ }
+ }
+}
+
+static int doc2000_verifybuf(struct mtd_info *mtd,
+ const u_char *buf, int len)
+{
+ struct nand_chip *this = mtd->priv;
+ struct doc_priv *doc = this->priv;
+ void __iomem *docptr = doc->virtadr;
+ int i;
+
+ for (i=0; i < len; i++)
+ if (buf[i] != ReadDOC(docptr, 2k_CDSN_IO))
+ return -EFAULT;
+ return 0;
+}
+
+static uint16_t __init doc200x_ident_chip(struct mtd_info *mtd, int nr)
+{
+ struct nand_chip *this = mtd->priv;
+ struct doc_priv *doc = this->priv;
+ uint16_t ret;
+
+ doc200x_select_chip(mtd, nr);
+ doc200x_hwcontrol(mtd, NAND_CTL_SETCLE);
+ this->write_byte(mtd, NAND_CMD_READID);
+ doc200x_hwcontrol(mtd, NAND_CTL_CLRCLE);
+ doc200x_hwcontrol(mtd, NAND_CTL_SETALE);
+ this->write_byte(mtd, 0);
+ doc200x_hwcontrol(mtd, NAND_CTL_CLRALE);
+
+ ret = this->read_byte(mtd) << 8;
+ ret |= this->read_byte(mtd);
+
+ if (doc->ChipID == DOC_ChipID_Doc2k && try_dword && !nr) {
+ /* First chip probe. See if we get same results by 32-bit access */
+ union {
+ uint32_t dword;
+ uint8_t byte[4];
+ } ident;
+ void __iomem *docptr = doc->virtadr;
+
+ doc200x_hwcontrol(mtd, NAND_CTL_SETCLE);
+ doc2000_write_byte(mtd, NAND_CMD_READID);
+ doc200x_hwcontrol(mtd, NAND_CTL_CLRCLE);
+ doc200x_hwcontrol(mtd, NAND_CTL_SETALE);
+ doc2000_write_byte(mtd, 0);
+ doc200x_hwcontrol(mtd, NAND_CTL_CLRALE);
+
+ ident.dword = readl(docptr + DoC_2k_CDSN_IO);
+ if (((ident.byte[0] << 8) | ident.byte[1]) == ret) {
+ printk(KERN_INFO "DiskOnChip 2000 responds to DWORD access\n");
+ this->read_buf = &doc2000_readbuf_dword;
+ }
+ }
+
+ return ret;
+}
+
+static void __init doc2000_count_chips(struct mtd_info *mtd)
+{
+ struct nand_chip *this = mtd->priv;
+ struct doc_priv *doc = this->priv;
+ uint16_t mfrid;
+ int i;
+
+ /* Max 4 chips per floor on DiskOnChip 2000 */
+ doc->chips_per_floor = 4;
+
+ /* Find out what the first chip is */
+ mfrid = doc200x_ident_chip(mtd, 0);
+
+ /* Find how many chips in each floor. */
+ for (i = 1; i < 4; i++) {
+ if (doc200x_ident_chip(mtd, i) != mfrid)
+ break;
+ }
+ doc->chips_per_floor = i;
+ printk(KERN_DEBUG "Detected %d chips per floor.\n", i);
+}
+
+static int doc200x_wait(struct mtd_info *mtd, struct nand_chip *this, int state)
+{
+ struct doc_priv *doc = this->priv;
+
+ int status;
+
+ DoC_WaitReady(doc);
+ this->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1);
+ DoC_WaitReady(doc);
+ status = (int)this->read_byte(mtd);
+
+ return status;
+}
+
+static void doc2001_write_byte(struct mtd_info *mtd, u_char datum)
+{
+ struct nand_chip *this = mtd->priv;
+ struct doc_priv *doc = this->priv;
+ void __iomem *docptr = doc->virtadr;
+
+ WriteDOC(datum, docptr, CDSNSlowIO);
+ WriteDOC(datum, docptr, Mil_CDSN_IO);
+ WriteDOC(datum, docptr, WritePipeTerm);
+}
+
+static u_char doc2001_read_byte(struct mtd_info *mtd)
+{
+ struct nand_chip *this = mtd->priv;
+ struct doc_priv *doc = this->priv;
+ void __iomem *docptr = doc->virtadr;
+
+ /*ReadDOC(docptr, CDSNSlowIO); */
+ /* 11.4.5 -- delay twice to allow extended length cycle */
+ DoC_Delay(doc, 2);
+ ReadDOC(docptr, ReadPipeInit);
+ /*return ReadDOC(docptr, Mil_CDSN_IO); */
+ return ReadDOC(docptr, LastDataRead);
+}
+
+static void doc2001_writebuf(struct mtd_info *mtd,
+ const u_char *buf, int len)
+{
+ struct nand_chip *this = mtd->priv;
+ struct doc_priv *doc = this->priv;
+ void __iomem *docptr = doc->virtadr;
+ int i;
+
+ for (i=0; i < len; i++)
+ WriteDOC_(buf[i], docptr, DoC_Mil_CDSN_IO + i);
+ /* Terminate write pipeline */
+ WriteDOC(0x00, docptr, WritePipeTerm);
+}
+
+static void doc2001_readbuf(struct mtd_info *mtd,
+ u_char *buf, int len)
+{
+ struct nand_chip *this = mtd->priv;
+ struct doc_priv *doc = this->priv;
+ void __iomem *docptr = doc->virtadr;
+ int i;
+
+ /* Start read pipeline */
+ ReadDOC(docptr, ReadPipeInit);
+
+ for (i=0; i < len-1; i++)
+ buf[i] = ReadDOC(docptr, Mil_CDSN_IO + (i & 0xff));
+
+ /* Terminate read pipeline */
+ buf[i] = ReadDOC(docptr, LastDataRead);
+}
+
+static int doc2001_verifybuf(struct mtd_info *mtd,
+ const u_char *buf, int len)
+{
+ struct nand_chip *this = mtd->priv;
+ struct doc_priv *doc = this->priv;
+ void __iomem *docptr = doc->virtadr;
+ int i;
+
+ /* Start read pipeline */
+ ReadDOC(docptr, ReadPipeInit);
+
+ for (i=0; i < len-1; i++)
+ if (buf[i] != ReadDOC(docptr, Mil_CDSN_IO)) {
+ ReadDOC(docptr, LastDataRead);
+ return i;
+ }
+ if (buf[i] != ReadDOC(docptr, LastDataRead))
+ return i;
+ return 0;
+}
+
+static u_char doc2001plus_read_byte(struct mtd_info *mtd)
+{
+ struct nand_chip *this = mtd->priv;
+ struct doc_priv *doc = this->priv;
+ void __iomem *docptr = doc->virtadr;
+ u_char ret;
+
+ ReadDOC(docptr, Mplus_ReadPipeInit);
+ ReadDOC(docptr, Mplus_ReadPipeInit);
+ ret = ReadDOC(docptr, Mplus_LastDataRead);
+ if (debug) printk("read_byte returns %02x\n", ret);
+ return ret;
+}
+
+static void doc2001plus_writebuf(struct mtd_info *mtd,
+ const u_char *buf, int len)
+{
+ struct nand_chip *this = mtd->priv;
+ struct doc_priv *doc = this->priv;
+ void __iomem *docptr = doc->virtadr;
+ int i;
+
+ if (debug)printk("writebuf of %d bytes: ", len);
+ for (i=0; i < len; i++) {
+ WriteDOC_(buf[i], docptr, DoC_Mil_CDSN_IO + i);
+ if (debug && i < 16)
+ printk("%02x ", buf[i]);
+ }
+ if (debug) printk("\n");
+}
+
+static void doc2001plus_readbuf(struct mtd_info *mtd,
+ u_char *buf, int len)
+{
+ struct nand_chip *this = mtd->priv;
+ struct doc_priv *doc = this->priv;
+ void __iomem *docptr = doc->virtadr;
+ int i;
+
+ if (debug)printk("readbuf of %d bytes: ", len);
+
+ /* Start read pipeline */
+ ReadDOC(docptr, Mplus_ReadPipeInit);
+ ReadDOC(docptr, Mplus_ReadPipeInit);
+
+ for (i=0; i < len-2; i++) {
+ buf[i] = ReadDOC(docptr, Mil_CDSN_IO);
+ if (debug && i < 16)
+ printk("%02x ", buf[i]);
+ }
+
+ /* Terminate read pipeline */
+ buf[len-2] = ReadDOC(docptr, Mplus_LastDataRead);
+ if (debug && i < 16)
+ printk("%02x ", buf[len-2]);
+ buf[len-1] = ReadDOC(docptr, Mplus_LastDataRead);
+ if (debug && i < 16)
+ printk("%02x ", buf[len-1]);
+ if (debug) printk("\n");
+}
+
+static int doc2001plus_verifybuf(struct mtd_info *mtd,
+ const u_char *buf, int len)
+{
+ struct nand_chip *this = mtd->priv;
+ struct doc_priv *doc = this->priv;
+ void __iomem *docptr = doc->virtadr;
+ int i;
+
+ if (debug)printk("verifybuf of %d bytes: ", len);
+
+ /* Start read pipeline */
+ ReadDOC(docptr, Mplus_ReadPipeInit);
+ ReadDOC(docptr, Mplus_ReadPipeInit);
+
+ for (i=0; i < len-2; i++)
+ if (buf[i] != ReadDOC(docptr, Mil_CDSN_IO)) {
+ ReadDOC(docptr, Mplus_LastDataRead);
+ ReadDOC(docptr, Mplus_LastDataRead);
+ return i;
+ }
+ if (buf[len-2] != ReadDOC(docptr, Mplus_LastDataRead))
+ return len-2;
+ if (buf[len-1] != ReadDOC(docptr, Mplus_LastDataRead))
+ return len-1;
+ return 0;
+}
+
+static void doc2001plus_select_chip(struct mtd_info *mtd, int chip)
+{
+ struct nand_chip *this = mtd->priv;
+ struct doc_priv *doc = this->priv;
+ void __iomem *docptr = doc->virtadr;
+ int floor = 0;
+
+ if(debug)printk("select chip (%d)\n", chip);
+
+ if (chip == -1) {
+ /* Disable flash internally */
+ WriteDOC(0, docptr, Mplus_FlashSelect);
+ return;
+ }
+
+ floor = chip / doc->chips_per_floor;
+ chip -= (floor * doc->chips_per_floor);
+
+ /* Assert ChipEnable and deassert WriteProtect */
+ WriteDOC((DOC_FLASH_CE), docptr, Mplus_FlashSelect);
+ this->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
+
+ doc->curchip = chip;
+ doc->curfloor = floor;
+}
+
+static void doc200x_select_chip(struct mtd_info *mtd, int chip)
+{
+ struct nand_chip *this = mtd->priv;
+ struct doc_priv *doc = this->priv;
+ void __iomem *docptr = doc->virtadr;
+ int floor = 0;
+
+ if(debug)printk("select chip (%d)\n", chip);
+
+ if (chip == -1)
+ return;
+
+ floor = chip / doc->chips_per_floor;
+ chip -= (floor * doc->chips_per_floor);
+
+ /* 11.4.4 -- deassert CE before changing chip */
+ doc200x_hwcontrol(mtd, NAND_CTL_CLRNCE);
+
+ WriteDOC(floor, docptr, FloorSelect);
+ WriteDOC(chip, docptr, CDSNDeviceSelect);
+
+ doc200x_hwcontrol(mtd, NAND_CTL_SETNCE);
+
+ doc->curchip = chip;
+ doc->curfloor = floor;
+}
+
+static void doc200x_hwcontrol(struct mtd_info *mtd, int cmd)
+{
+ struct nand_chip *this = mtd->priv;
+ struct doc_priv *doc = this->priv;
+ void __iomem *docptr = doc->virtadr;
+
+ switch(cmd) {
+ case NAND_CTL_SETNCE:
+ doc->CDSNControl |= CDSN_CTRL_CE;
+ break;
+ case NAND_CTL_CLRNCE:
+ doc->CDSNControl &= ~CDSN_CTRL_CE;
+ break;
+ case NAND_CTL_SETCLE:
+ doc->CDSNControl |= CDSN_CTRL_CLE;
+ break;
+ case NAND_CTL_CLRCLE:
+ doc->CDSNControl &= ~CDSN_CTRL_CLE;
+ break;
+ case NAND_CTL_SETALE:
+ doc->CDSNControl |= CDSN_CTRL_ALE;
+ break;
+ case NAND_CTL_CLRALE:
+ doc->CDSNControl &= ~CDSN_CTRL_ALE;
+ break;
+ case NAND_CTL_SETWP:
+ doc->CDSNControl |= CDSN_CTRL_WP;
+ break;
+ case NAND_CTL_CLRWP:
+ doc->CDSNControl &= ~CDSN_CTRL_WP;
+ break;
+ }
+ if (debug)printk("hwcontrol(%d): %02x\n", cmd, doc->CDSNControl);
+ WriteDOC(doc->CDSNControl, docptr, CDSNControl);
+ /* 11.4.3 -- 4 NOPs after CSDNControl write */
+ DoC_Delay(doc, 4);
+}
+
+static void doc2001plus_command (struct mtd_info *mtd, unsigned command, int column, int page_addr)
+{
+ struct nand_chip *this = mtd->priv;
+ struct doc_priv *doc = this->priv;
+ void __iomem *docptr = doc->virtadr;
+
+ /*
+ * Must terminate write pipeline before sending any commands
+ * to the device.
+ */
+ if (command == NAND_CMD_PAGEPROG) {
+ WriteDOC(0x00, docptr, Mplus_WritePipeTerm);
+ WriteDOC(0x00, docptr, Mplus_WritePipeTerm);
+ }
+
+ /*
+ * Write out the command to the device.
+ */
+ if (command == NAND_CMD_SEQIN) {
+ int readcmd;
+
+ if (column >= mtd->oobblock) {
+ /* OOB area */
+ column -= mtd->oobblock;
+ readcmd = NAND_CMD_READOOB;
+ } else if (column < 256) {
+ /* First 256 bytes --> READ0 */
+ readcmd = NAND_CMD_READ0;
+ } else {
+ column -= 256;
+ readcmd = NAND_CMD_READ1;
+ }
+ WriteDOC(readcmd, docptr, Mplus_FlashCmd);
+ }
+ WriteDOC(command, docptr, Mplus_FlashCmd);
+ WriteDOC(0, docptr, Mplus_WritePipeTerm);
+ WriteDOC(0, docptr, Mplus_WritePipeTerm);
+
+ if (column != -1 || page_addr != -1) {
+ /* Serially input address */
+ if (column != -1) {
+ /* Adjust columns for 16 bit buswidth */
+ if (this->options & NAND_BUSWIDTH_16)
+ column >>= 1;
+ WriteDOC(column, docptr, Mplus_FlashAddress);
+ }
+ if (page_addr != -1) {
+ WriteDOC((unsigned char) (page_addr & 0xff), docptr, Mplus_FlashAddress);
+ WriteDOC((unsigned char) ((page_addr >> 8) & 0xff), docptr, Mplus_FlashAddress);
+ /* One more address cycle for higher density devices */
+ if (this->chipsize & 0x0c000000) {
+ WriteDOC((unsigned char) ((page_addr >> 16) & 0x0f), docptr, Mplus_FlashAddress);
+ printk("high density\n");
+ }
+ }
+ WriteDOC(0, docptr, Mplus_WritePipeTerm);
+ WriteDOC(0, docptr, Mplus_WritePipeTerm);
+ /* deassert ALE */
+ if (command == NAND_CMD_READ0 || command == NAND_CMD_READ1 || command == NAND_CMD_READOOB || command == NAND_CMD_READID)
+ WriteDOC(0, docptr, Mplus_FlashControl);
+ }
+
+ /*
+ * program and erase have their own busy handlers
+ * status and sequential in needs no delay
+ */
+ switch (command) {
+
+ case NAND_CMD_PAGEPROG:
+ case NAND_CMD_ERASE1:
+ case NAND_CMD_ERASE2:
+ case NAND_CMD_SEQIN:
+ case NAND_CMD_STATUS:
+ return;
+
+ case NAND_CMD_RESET:
+ if (this->dev_ready)
+ break;
+ udelay(this->chip_delay);
+ WriteDOC(NAND_CMD_STATUS, docptr, Mplus_FlashCmd);
+ WriteDOC(0, docptr, Mplus_WritePipeTerm);
+ WriteDOC(0, docptr, Mplus_WritePipeTerm);
+ while ( !(this->read_byte(mtd) & 0x40));
+ return;
+
+ /* This applies to read commands */
+ default:
+ /*
+ * If we don't have access to the busy pin, we apply the given
+ * command delay
+ */
+ if (!this->dev_ready) {
+ udelay (this->chip_delay);
+ return;
+ }
+ }
+
+ /* Apply this short delay always to ensure that we do wait tWB in
+ * any case on any machine. */
+ ndelay (100);
+ /* wait until command is processed */
+ while (!this->dev_ready(mtd));
+}
+
+static int doc200x_dev_ready(struct mtd_info *mtd)
+{
+ struct nand_chip *this = mtd->priv;
+ struct doc_priv *doc = this->priv;
+ void __iomem *docptr = doc->virtadr;
+
+ if (DoC_is_MillenniumPlus(doc)) {
+ /* 11.4.2 -- must NOP four times before checking FR/B# */
+ DoC_Delay(doc, 4);
+ if ((ReadDOC(docptr, Mplus_FlashControl) & CDSN_CTRL_FR_B_MASK) != CDSN_CTRL_FR_B_MASK) {
+ if(debug)
+ printk("not ready\n");
+ return 0;
+ }
+ if (debug)printk("was ready\n");
+ return 1;
+ } else {
+ /* 11.4.2 -- must NOP four times before checking FR/B# */
+ DoC_Delay(doc, 4);
+ if (!(ReadDOC(docptr, CDSNControl) & CDSN_CTRL_FR_B)) {
+ if(debug)
+ printk("not ready\n");
+ return 0;
+ }
+ /* 11.4.2 -- Must NOP twice if it's ready */
+ DoC_Delay(doc, 2);
+ if (debug)printk("was ready\n");
+ return 1;
+ }
+}
+
+static int doc200x_block_bad(struct mtd_info *mtd, loff_t ofs, int getchip)
+{
+ /* This is our last resort if we couldn't find or create a BBT. Just
+ pretend all blocks are good. */
+ return 0;
+}
+
+static void doc200x_enable_hwecc(struct mtd_info *mtd, int mode)
+{
+ struct nand_chip *this = mtd->priv;
+ struct doc_priv *doc = this->priv;
+ void __iomem *docptr = doc->virtadr;
+
+ /* Prime the ECC engine */
+ switch(mode) {
+ case NAND_ECC_READ:
+ WriteDOC(DOC_ECC_RESET, docptr, ECCConf);
+ WriteDOC(DOC_ECC_EN, docptr, ECCConf);
+ break;
+ case NAND_ECC_WRITE:
+ WriteDOC(DOC_ECC_RESET, docptr, ECCConf);
+ WriteDOC(DOC_ECC_EN | DOC_ECC_RW, docptr, ECCConf);
+ break;
+ }
+}
+
+static void doc2001plus_enable_hwecc(struct mtd_info *mtd, int mode)
+{
+ struct nand_chip *this = mtd->priv;
+ struct doc_priv *doc = this->priv;
+ void __iomem *docptr = doc->virtadr;
+
+ /* Prime the ECC engine */
+ switch(mode) {
+ case NAND_ECC_READ:
+ WriteDOC(DOC_ECC_RESET, docptr, Mplus_ECCConf);
+ WriteDOC(DOC_ECC_EN, docptr, Mplus_ECCConf);
+ break;
+ case NAND_ECC_WRITE:
+ WriteDOC(DOC_ECC_RESET, docptr, Mplus_ECCConf);
+ WriteDOC(DOC_ECC_EN | DOC_ECC_RW, docptr, Mplus_ECCConf);
+ break;
+ }
+}
+
+/* This code is only called on write */
+static int doc200x_calculate_ecc(struct mtd_info *mtd, const u_char *dat,
+ unsigned char *ecc_code)
+{
+ struct nand_chip *this = mtd->priv;
+ struct doc_priv *doc = this->priv;
+ void __iomem *docptr = doc->virtadr;
+ int i;
+ int emptymatch = 1;
+
+ /* flush the pipeline */
+ if (DoC_is_2000(doc)) {
+ WriteDOC(doc->CDSNControl & ~CDSN_CTRL_FLASH_IO, docptr, CDSNControl);
+ WriteDOC(0, docptr, 2k_CDSN_IO);
+ WriteDOC(0, docptr, 2k_CDSN_IO);
+ WriteDOC(0, docptr, 2k_CDSN_IO);
+ WriteDOC(doc->CDSNControl, docptr, CDSNControl);
+ } else if (DoC_is_MillenniumPlus(doc)) {
+ WriteDOC(0, docptr, Mplus_NOP);
+ WriteDOC(0, docptr, Mplus_NOP);
+ WriteDOC(0, docptr, Mplus_NOP);
+ } else {
+ WriteDOC(0, docptr, NOP);
+ WriteDOC(0, docptr, NOP);
+ WriteDOC(0, docptr, NOP);
+ }
+
+ for (i = 0; i < 6; i++) {
+ if (DoC_is_MillenniumPlus(doc))
+ ecc_code[i] = ReadDOC_(docptr, DoC_Mplus_ECCSyndrome0 + i);
+ else
+ ecc_code[i] = ReadDOC_(docptr, DoC_ECCSyndrome0 + i);
+ if (ecc_code[i] != empty_write_ecc[i])
+ emptymatch = 0;
+ }
+ if (DoC_is_MillenniumPlus(doc))
+ WriteDOC(DOC_ECC_DIS, docptr, Mplus_ECCConf);
+ else
+ WriteDOC(DOC_ECC_DIS, docptr, ECCConf);
+#if 0
+ /* If emptymatch=1, we might have an all-0xff data buffer. Check. */
+ if (emptymatch) {
+ /* Note: this somewhat expensive test should not be triggered
+ often. It could be optimized away by examining the data in
+ the writebuf routine, and remembering the result. */
+ for (i = 0; i < 512; i++) {
+ if (dat[i] == 0xff) continue;
+ emptymatch = 0;
+ break;
+ }
+ }
+ /* If emptymatch still =1, we do have an all-0xff data buffer.
+ Return all-0xff ecc value instead of the computed one, so
+ it'll look just like a freshly-erased page. */
+ if (emptymatch) memset(ecc_code, 0xff, 6);
+#endif
+ return 0;
+}
+
+static int doc200x_correct_data(struct mtd_info *mtd, u_char *dat, u_char *read_ecc, u_char *calc_ecc)
+{
+ int i, ret = 0;
+ struct nand_chip *this = mtd->priv;
+ struct doc_priv *doc = this->priv;
+ void __iomem *docptr = doc->virtadr;
+ volatile u_char dummy;
+ int emptymatch = 1;
+
+ /* flush the pipeline */
+ if (DoC_is_2000(doc)) {
+ dummy = ReadDOC(docptr, 2k_ECCStatus);
+ dummy = ReadDOC(docptr, 2k_ECCStatus);
+ dummy = ReadDOC(docptr, 2k_ECCStatus);
+ } else if (DoC_is_MillenniumPlus(doc)) {
+ dummy = ReadDOC(docptr, Mplus_ECCConf);
+ dummy = ReadDOC(docptr, Mplus_ECCConf);
+ dummy = ReadDOC(docptr, Mplus_ECCConf);
+ } else {
+ dummy = ReadDOC(docptr, ECCConf);
+ dummy = ReadDOC(docptr, ECCConf);
+ dummy = ReadDOC(docptr, ECCConf);
+ }
+
+ /* Error occured ? */
+ if (dummy & 0x80) {
+ for (i = 0; i < 6; i++) {
+ if (DoC_is_MillenniumPlus(doc))
+ calc_ecc[i] = ReadDOC_(docptr, DoC_Mplus_ECCSyndrome0 + i);
+ else
+ calc_ecc[i] = ReadDOC_(docptr, DoC_ECCSyndrome0 + i);
+ if (calc_ecc[i] != empty_read_syndrome[i])
+ emptymatch = 0;
+ }
+ /* If emptymatch=1, the read syndrome is consistent with an
+ all-0xff data and stored ecc block. Check the stored ecc. */
+ if (emptymatch) {
+ for (i = 0; i < 6; i++) {
+ if (read_ecc[i] == 0xff) continue;
+ emptymatch = 0;
+ break;
+ }
+ }
+ /* If emptymatch still =1, check the data block. */
+ if (emptymatch) {
+ /* Note: this somewhat expensive test should not be triggered
+ often. It could be optimized away by examining the data in
+ the readbuf routine, and remembering the result. */
+ for (i = 0; i < 512; i++) {
+ if (dat[i] == 0xff) continue;
+ emptymatch = 0;
+ break;
+ }
+ }
+ /* If emptymatch still =1, this is almost certainly a freshly-
+ erased block, in which case the ECC will not come out right.
+ We'll suppress the error and tell the caller everything's
+ OK. Because it is. */
+ if (!emptymatch) ret = doc_ecc_decode (rs_decoder, dat, calc_ecc);
+ if (ret > 0)
+ printk(KERN_ERR "doc200x_correct_data corrected %d errors\n", ret);
+ }
+ if (DoC_is_MillenniumPlus(doc))
+ WriteDOC(DOC_ECC_DIS, docptr, Mplus_ECCConf);
+ else
+ WriteDOC(DOC_ECC_DIS, docptr, ECCConf);
+ if (no_ecc_failures && (ret == -1)) {
+ printk(KERN_ERR "suppressing ECC failure\n");
+ ret = 0;
+ }
+ return ret;
+}
+
+/*u_char mydatabuf[528]; */
+
+static struct nand_oobinfo doc200x_oobinfo = {
+ .useecc = MTD_NANDECC_AUTOPLACE,
+ .eccbytes = 6,
+ .eccpos = {0, 1, 2, 3, 4, 5},
+ .oobfree = { {8, 8} }
+};
+
+/* Find the (I)NFTL Media Header, and optionally also the mirror media header.
+ On sucessful return, buf will contain a copy of the media header for
+ further processing. id is the string to scan for, and will presumably be
+ either "ANAND" or "BNAND". If findmirror=1, also look for the mirror media
+ header. The page #s of the found media headers are placed in mh0_page and
+ mh1_page in the DOC private structure. */
+static int __init find_media_headers(struct mtd_info *mtd, u_char *buf,
+ const char *id, int findmirror)
+{
+ struct nand_chip *this = mtd->priv;
+ struct doc_priv *doc = this->priv;
+ unsigned offs, end = (MAX_MEDIAHEADER_SCAN << this->phys_erase_shift);
+ int ret;
+ size_t retlen;
+
+ end = min(end, mtd->size); /* paranoia */
+ for (offs = 0; offs < end; offs += mtd->erasesize) {
+ ret = mtd->read(mtd, offs, mtd->oobblock, &retlen, buf);
+ if (retlen != mtd->oobblock) continue;
+ if (ret) {
+ printk(KERN_WARNING "ECC error scanning DOC at 0x%x\n",
+ offs);
+ }
+ if (memcmp(buf, id, 6)) continue;
+ printk(KERN_INFO "Found DiskOnChip %s Media Header at 0x%x\n", id, offs);
+ if (doc->mh0_page == -1) {
+ doc->mh0_page = offs >> this->page_shift;
+ if (!findmirror) return 1;
+ continue;
+ }
+ doc->mh1_page = offs >> this->page_shift;
+ return 2;
+ }
+ if (doc->mh0_page == -1) {
+ printk(KERN_WARNING "DiskOnChip %s Media Header not found.\n", id);
+ return 0;
+ }
+ /* Only one mediaheader was found. We want buf to contain a
+ mediaheader on return, so we'll have to re-read the one we found. */
+ offs = doc->mh0_page << this->page_shift;
+ ret = mtd->read(mtd, offs, mtd->oobblock, &retlen, buf);
+ if (retlen != mtd->oobblock) {
+ /* Insanity. Give up. */
+ printk(KERN_ERR "Read DiskOnChip Media Header once, but can't reread it???\n");
+ return 0;
+ }
+ return 1;
+}
+
+static inline int __init nftl_partscan(struct mtd_info *mtd,
+ struct mtd_partition *parts)
+{
+ struct nand_chip *this = mtd->priv;
+ struct doc_priv *doc = this->priv;
+ int ret = 0;
+ u_char *buf;
+ struct NFTLMediaHeader *mh;
+ const unsigned psize = 1 << this->page_shift;
+ unsigned blocks, maxblocks;
+ int offs, numheaders;
+
+ buf = kmalloc(mtd->oobblock, GFP_KERNEL);
+ if (!buf) {
+ printk(KERN_ERR "DiskOnChip mediaheader kmalloc failed!\n");
+ return 0;
+ }
+ if (!(numheaders=find_media_headers(mtd, buf, "ANAND", 1))) goto out;
+ mh = (struct NFTLMediaHeader *) buf;
+
+/*#ifdef CONFIG_MTD_DEBUG_VERBOSE */
+/* if (CONFIG_MTD_DEBUG_VERBOSE >= 2) */
+ printk(KERN_INFO " DataOrgID = %s\n"
+ " NumEraseUnits = %d\n"
+ " FirstPhysicalEUN = %d\n"
+ " FormattedSize = %d\n"
+ " UnitSizeFactor = %d\n",
+ mh->DataOrgID, mh->NumEraseUnits,
+ mh->FirstPhysicalEUN, mh->FormattedSize,
+ mh->UnitSizeFactor);
+/*#endif */
+
+ blocks = mtd->size >> this->phys_erase_shift;
+ maxblocks = min(32768U, mtd->erasesize - psize);
+
+ if (mh->UnitSizeFactor == 0x00) {
+ /* Auto-determine UnitSizeFactor. The constraints are:
+ - There can be at most 32768 virtual blocks.
+ - There can be at most (virtual block size - page size)
+ virtual blocks (because MediaHeader+BBT must fit in 1).
+ */
+ mh->UnitSizeFactor = 0xff;
+ while (blocks > maxblocks) {
+ blocks >>= 1;
+ maxblocks = min(32768U, (maxblocks << 1) + psize);
+ mh->UnitSizeFactor--;
+ }
+ printk(KERN_WARNING "UnitSizeFactor=0x00 detected. Correct value is assumed to be 0x%02x.\n", mh->UnitSizeFactor);
+ }
+
+ /* NOTE: The lines below modify internal variables of the NAND and MTD
+ layers; variables with have already been configured by nand_scan.
+ Unfortunately, we didn't know before this point what these values
+ should be. Thus, this code is somewhat dependant on the exact
+ implementation of the NAND layer. */
+ if (mh->UnitSizeFactor != 0xff) {
+ this->bbt_erase_shift += (0xff - mh->UnitSizeFactor);
+ mtd->erasesize <<= (0xff - mh->UnitSizeFactor);
+ printk(KERN_INFO "Setting virtual erase size to %d\n", mtd->erasesize);
+ blocks = mtd->size >> this->bbt_erase_shift;
+ maxblocks = min(32768U, mtd->erasesize - psize);
+ }
+
+ if (blocks > maxblocks) {
+ printk(KERN_ERR "UnitSizeFactor of 0x%02x is inconsistent with device size. Aborting.\n", mh->UnitSizeFactor);
+ goto out;
+ }
+
+ /* Skip past the media headers. */
+ offs = max(doc->mh0_page, doc->mh1_page);
+ offs <<= this->page_shift;
+ offs += mtd->erasesize;
+
+ /*parts[0].name = " DiskOnChip Boot / Media Header partition"; */
+ /*parts[0].offset = 0; */
+ /*parts[0].size = offs; */
+
+ parts[0].name = " DiskOnChip BDTL partition";
+ parts[0].offset = offs;
+ parts[0].size = (mh->NumEraseUnits - numheaders) << this->bbt_erase_shift;
+
+ offs += parts[0].size;
+ if (offs < mtd->size) {
+ parts[1].name = " DiskOnChip Remainder partition";
+ parts[1].offset = offs;
+ parts[1].size = mtd->size - offs;
+ ret = 2;
+ goto out;
+ }
+ ret = 1;
+out:
+ kfree(buf);
+ return ret;
+}
+
+/* This is a stripped-down copy of the code in inftlmount.c */
+static inline int __init inftl_partscan(struct mtd_info *mtd,
+ struct mtd_partition *parts)
+{
+ struct nand_chip *this = mtd->priv;
+ struct doc_priv *doc = this->priv;
+ int ret = 0;
+ u_char *buf;
+ struct INFTLMediaHeader *mh;
+ struct INFTLPartition *ip;
+ int numparts = 0;
+ int blocks;
+ int vshift, lastvunit = 0;
+ int i;
+ int end = mtd->size;
+
+ if (inftl_bbt_write)
+ end -= (INFTL_BBT_RESERVED_BLOCKS << this->phys_erase_shift);
+
+ buf = kmalloc(mtd->oobblock, GFP_KERNEL);
+ if (!buf) {
+ printk(KERN_ERR "DiskOnChip mediaheader kmalloc failed!\n");
+ return 0;
+ }
+
+ if (!find_media_headers(mtd, buf, "BNAND", 0)) goto out;
+ doc->mh1_page = doc->mh0_page + (4096 >> this->page_shift);
+ mh = (struct INFTLMediaHeader *) buf;
+
+ mh->NoOfBootImageBlocks = le32_to_cpu(mh->NoOfBootImageBlocks);
+ mh->NoOfBinaryPartitions = le32_to_cpu(mh->NoOfBinaryPartitions);
+ mh->NoOfBDTLPartitions = le32_to_cpu(mh->NoOfBDTLPartitions);
+ mh->BlockMultiplierBits = le32_to_cpu(mh->BlockMultiplierBits);
+ mh->FormatFlags = le32_to_cpu(mh->FormatFlags);
+ mh->PercentUsed = le32_to_cpu(mh->PercentUsed);
+
+/*#ifdef CONFIG_MTD_DEBUG_VERBOSE */
+/* if (CONFIG_MTD_DEBUG_VERBOSE >= 2) */
+ printk(KERN_INFO " bootRecordID = %s\n"
+ " NoOfBootImageBlocks = %d\n"
+ " NoOfBinaryPartitions = %d\n"
+ " NoOfBDTLPartitions = %d\n"
+ " BlockMultiplerBits = %d\n"
+ " FormatFlgs = %d\n"
+ " OsakVersion = %d.%d.%d.%d\n"
+ " PercentUsed = %d\n",
+ mh->bootRecordID, mh->NoOfBootImageBlocks,
+ mh->NoOfBinaryPartitions,
+ mh->NoOfBDTLPartitions,
+ mh->BlockMultiplierBits, mh->FormatFlags,
+ ((unsigned char *) &mh->OsakVersion)[0] & 0xf,
+ ((unsigned char *) &mh->OsakVersion)[1] & 0xf,
+ ((unsigned char *) &mh->OsakVersion)[2] & 0xf,
+ ((unsigned char *) &mh->OsakVersion)[3] & 0xf,
+ mh->PercentUsed);
+/*#endif */
+
+ vshift = this->phys_erase_shift + mh->BlockMultiplierBits;
+
+ blocks = mtd->size >> vshift;
+ if (blocks > 32768) {
+ printk(KERN_ERR "BlockMultiplierBits=%d is inconsistent with device size. Aborting.\n", mh->BlockMultiplierBits);
+ goto out;
+ }
+
+ blocks = doc->chips_per_floor << (this->chip_shift - this->phys_erase_shift);
+ if (inftl_bbt_write && (blocks > mtd->erasesize)) {
+ printk(KERN_ERR "Writeable BBTs spanning more than one erase block are not yet supported. FIX ME!\n");
+ goto out;
+ }
+
+ /* Scan the partitions */
+ for (i = 0; (i < 4); i++) {
+ ip = &(mh->Partitions[i]);
+ ip->virtualUnits = le32_to_cpu(ip->virtualUnits);
+ ip->firstUnit = le32_to_cpu(ip->firstUnit);
+ ip->lastUnit = le32_to_cpu(ip->lastUnit);
+ ip->flags = le32_to_cpu(ip->flags);
+ ip->spareUnits = le32_to_cpu(ip->spareUnits);
+ ip->Reserved0 = le32_to_cpu(ip->Reserved0);
+
+/*#ifdef CONFIG_MTD_DEBUG_VERBOSE */
+/* if (CONFIG_MTD_DEBUG_VERBOSE >= 2) */
+ printk(KERN_INFO " PARTITION[%d] ->\n"
+ " virtualUnits = %d\n"
+ " firstUnit = %d\n"
+ " lastUnit = %d\n"
+ " flags = 0x%x\n"
+ " spareUnits = %d\n",
+ i, ip->virtualUnits, ip->firstUnit,
+ ip->lastUnit, ip->flags,
+ ip->spareUnits);
+/*#endif */
+
+/*
+ if ((i == 0) && (ip->firstUnit > 0)) {
+ parts[0].name = " DiskOnChip IPL / Media Header partition";
+ parts[0].offset = 0;
+ parts[0].size = mtd->erasesize * ip->firstUnit;
+ numparts = 1;
+ }
+*/
+
+ if (ip->flags & INFTL_BINARY)
+ parts[numparts].name = " DiskOnChip BDK partition";
+ else
+ parts[numparts].name = " DiskOnChip BDTL partition";
+ parts[numparts].offset = ip->firstUnit << vshift;
+ parts[numparts].size = (1 + ip->lastUnit - ip->firstUnit) << vshift;
+ numparts++;
+ if (ip->lastUnit > lastvunit) lastvunit = ip->lastUnit;
+ if (ip->flags & INFTL_LAST) break;
+ }
+ lastvunit++;
+ if ((lastvunit << vshift) < end) {
+ parts[numparts].name = " DiskOnChip Remainder partition";
+ parts[numparts].offset = lastvunit << vshift;
+ parts[numparts].size = end - parts[numparts].offset;
+ numparts++;
+ }
+ ret = numparts;
+out:
+ kfree(buf);
+ return ret;
+}
+
+static int __init nftl_scan_bbt(struct mtd_info *mtd)
+{
+ int ret, numparts;
+ struct nand_chip *this = mtd->priv;
+ struct doc_priv *doc = this->priv;
+ struct mtd_partition parts[2];
+
+ memset((char *) parts, 0, sizeof(parts));
+ /* On NFTL, we have to find the media headers before we can read the
+ BBTs, since they're stored in the media header eraseblocks. */
+ numparts = nftl_partscan(mtd, parts);
+ if (!numparts) return -EIO;
+ this->bbt_td->options = NAND_BBT_ABSPAGE | NAND_BBT_8BIT |
+ NAND_BBT_SAVECONTENT | NAND_BBT_WRITE |
+ NAND_BBT_VERSION;
+ this->bbt_td->veroffs = 7;
+ this->bbt_td->pages[0] = doc->mh0_page + 1;
+ if (doc->mh1_page != -1) {
+ this->bbt_md->options = NAND_BBT_ABSPAGE | NAND_BBT_8BIT |
+ NAND_BBT_SAVECONTENT | NAND_BBT_WRITE |
+ NAND_BBT_VERSION;
+ this->bbt_md->veroffs = 7;
+ this->bbt_md->pages[0] = doc->mh1_page + 1;
+ } else {
+ this->bbt_md = NULL;
+ }
+
+ /* It's safe to set bd=NULL below because NAND_BBT_CREATE is not set.
+ At least as nand_bbt.c is currently written. */
+ if ((ret = nand_scan_bbt(mtd, NULL)))
+ return ret;
+ add_mtd_device(mtd);
+#ifdef CONFIG_MTD_PARTITIONS
+ if (!no_autopart)
+ add_mtd_partitions(mtd, parts, numparts);
+#endif
+ return 0;
+}
+
+static int __init inftl_scan_bbt(struct mtd_info *mtd)
+{
+ int ret, numparts;
+ struct nand_chip *this = mtd->priv;
+ struct doc_priv *doc = this->priv;
+ struct mtd_partition parts[5];
+
+ if (this->numchips > doc->chips_per_floor) {
+ printk(KERN_ERR "Multi-floor INFTL devices not yet supported.\n");
+ return -EIO;
+ }
+
+ if (DoC_is_MillenniumPlus(doc)) {
+ this->bbt_td->options = NAND_BBT_2BIT | NAND_BBT_ABSPAGE;
+ if (inftl_bbt_write)
+ this->bbt_td->options |= NAND_BBT_WRITE;
+ this->bbt_td->pages[0] = 2;
+ this->bbt_md = NULL;
+ } else {
+ this->bbt_td->options = NAND_BBT_LASTBLOCK | NAND_BBT_8BIT |
+ NAND_BBT_VERSION;
+ if (inftl_bbt_write)
+ this->bbt_td->options |= NAND_BBT_WRITE;
+ this->bbt_td->offs = 8;
+ this->bbt_td->len = 8;
+ this->bbt_td->veroffs = 7;
+ this->bbt_td->maxblocks = INFTL_BBT_RESERVED_BLOCKS;
+ this->bbt_td->reserved_block_code = 0x01;
+ this->bbt_td->pattern = "MSYS_BBT";
+
+ this->bbt_md->options = NAND_BBT_LASTBLOCK | NAND_BBT_8BIT |
+ NAND_BBT_VERSION;
+ if (inftl_bbt_write)
+ this->bbt_md->options |= NAND_BBT_WRITE;
+ this->bbt_md->offs = 8;
+ this->bbt_md->len = 8;
+ this->bbt_md->veroffs = 7;
+ this->bbt_md->maxblocks = INFTL_BBT_RESERVED_BLOCKS;
+ this->bbt_md->reserved_block_code = 0x01;
+ this->bbt_md->pattern = "TBB_SYSM";
+ }
+
+ /* It's safe to set bd=NULL below because NAND_BBT_CREATE is not set.
+ At least as nand_bbt.c is currently written. */
+ if ((ret = nand_scan_bbt(mtd, NULL)))
+ return ret;
+ memset((char *) parts, 0, sizeof(parts));
+ numparts = inftl_partscan(mtd, parts);
+ /* At least for now, require the INFTL Media Header. We could probably
+ do without it for non-INFTL use, since all it gives us is
+ autopartitioning, but I want to give it more thought. */
+ if (!numparts) return -EIO;
+ add_mtd_device(mtd);
+#ifdef CONFIG_MTD_PARTITIONS
+ if (!no_autopart)
+ add_mtd_partitions(mtd, parts, numparts);
+#endif
+ return 0;
+}
+
+static inline int __init doc2000_init(struct mtd_info *mtd)
+{
+ struct nand_chip *this = mtd->priv;
+ struct doc_priv *doc = this->priv;
+
+ this->write_byte = doc2000_write_byte;
+ this->read_byte = doc2000_read_byte;
+ this->write_buf = doc2000_writebuf;
+ this->read_buf = doc2000_readbuf;
+ this->verify_buf = doc2000_verifybuf;
+ this->scan_bbt = nftl_scan_bbt;
+
+ doc->CDSNControl = CDSN_CTRL_FLASH_IO | CDSN_CTRL_ECC_IO;
+ doc2000_count_chips(mtd);
+ mtd->name = "DiskOnChip 2000 (NFTL Model)";
+ return (4 * doc->chips_per_floor);
+}
+
+static inline int __init doc2001_init(struct mtd_info *mtd)
+{
+ struct nand_chip *this = mtd->priv;
+ struct doc_priv *doc = this->priv;
+
+ this->write_byte = doc2001_write_byte;
+ this->read_byte = doc2001_read_byte;
+ this->write_buf = doc2001_writebuf;
+ this->read_buf = doc2001_readbuf;
+ this->verify_buf = doc2001_verifybuf;
+
+ ReadDOC(doc->virtadr, ChipID);
+ ReadDOC(doc->virtadr, ChipID);
+ ReadDOC(doc->virtadr, ChipID);
+ if (ReadDOC(doc->virtadr, ChipID) != DOC_ChipID_DocMil) {
+ /* It's not a Millennium; it's one of the newer
+ DiskOnChip 2000 units with a similar ASIC.
+ Treat it like a Millennium, except that it
+ can have multiple chips. */
+ doc2000_count_chips(mtd);
+ mtd->name = "DiskOnChip 2000 (INFTL Model)";
+ this->scan_bbt = inftl_scan_bbt;
+ return (4 * doc->chips_per_floor);
+ } else {
+ /* Bog-standard Millennium */
+ doc->chips_per_floor = 1;
+ mtd->name = "DiskOnChip Millennium";
+ this->scan_bbt = nftl_scan_bbt;
+ return 1;
+ }
+}
+
+static inline int __init doc2001plus_init(struct mtd_info *mtd)
+{
+ struct nand_chip *this = mtd->priv;
+ struct doc_priv *doc = this->priv;
+
+ this->write_byte = NULL;
+ this->read_byte = doc2001plus_read_byte;
+ this->write_buf = doc2001plus_writebuf;
+ this->read_buf = doc2001plus_readbuf;
+ this->verify_buf = doc2001plus_verifybuf;
+ this->scan_bbt = inftl_scan_bbt;
+ this->hwcontrol = NULL;
+ this->select_chip = doc2001plus_select_chip;
+ this->cmdfunc = doc2001plus_command;
+ this->enable_hwecc = doc2001plus_enable_hwecc;
+
+ doc->chips_per_floor = 1;
+ mtd->name = "DiskOnChip Millennium Plus";
+
+ return 1;
+}
+
+static inline int __init doc_probe(unsigned long physadr)
+{
+ unsigned char ChipID;
+ struct mtd_info *mtd;
+ struct nand_chip *nand;
+ struct doc_priv *doc;
+ void __iomem *virtadr;
+ unsigned char save_control;
+ unsigned char tmp, tmpb, tmpc;
+ int reg, len, numchips;
+ int ret = 0;
+
+ virtadr = ioremap(physadr, DOC_IOREMAP_LEN);
+ if (!virtadr) {
+ printk(KERN_ERR "Diskonchip ioremap failed: 0x%x bytes at 0x%lx\n", DOC_IOREMAP_LEN, physadr);
+ return -EIO;
+ }
+
+ /* It's not possible to cleanly detect the DiskOnChip - the
+ * bootup procedure will put the device into reset mode, and
+ * it's not possible to talk to it without actually writing
+ * to the DOCControl register. So we store the current contents
+ * of the DOCControl register's location, in case we later decide
+ * that it's not a DiskOnChip, and want to put it back how we
+ * found it.
+ */
+ save_control = ReadDOC(virtadr, DOCControl);
+
+ /* Reset the DiskOnChip ASIC */
+ WriteDOC(DOC_MODE_CLR_ERR | DOC_MODE_MDWREN | DOC_MODE_RESET,
+ virtadr, DOCControl);
+ WriteDOC(DOC_MODE_CLR_ERR | DOC_MODE_MDWREN | DOC_MODE_RESET,
+ virtadr, DOCControl);
+
+ /* Enable the DiskOnChip ASIC */
+ WriteDOC(DOC_MODE_CLR_ERR | DOC_MODE_MDWREN | DOC_MODE_NORMAL,
+ virtadr, DOCControl);
+ WriteDOC(DOC_MODE_CLR_ERR | DOC_MODE_MDWREN | DOC_MODE_NORMAL,
+ virtadr, DOCControl);
+
+ ChipID = ReadDOC(virtadr, ChipID);
+
+ switch(ChipID) {
+ case DOC_ChipID_Doc2k:
+ reg = DoC_2k_ECCStatus;
+ break;
+ case DOC_ChipID_DocMil:
+ reg = DoC_ECCConf;
+ break;
+ case DOC_ChipID_DocMilPlus16:
+ case DOC_ChipID_DocMilPlus32:
+ case 0:
+ /* Possible Millennium Plus, need to do more checks */
+ /* Possibly release from power down mode */
+ for (tmp = 0; (tmp < 4); tmp++)
+ ReadDOC(virtadr, Mplus_Power);
+
+ /* Reset the Millennium Plus ASIC */
+ tmp = DOC_MODE_RESET | DOC_MODE_MDWREN | DOC_MODE_RST_LAT |
+ DOC_MODE_BDECT;
+ WriteDOC(tmp, virtadr, Mplus_DOCControl);
+ WriteDOC(~tmp, virtadr, Mplus_CtrlConfirm);
+
+ mdelay(1);
+ /* Enable the Millennium Plus ASIC */
+ tmp = DOC_MODE_NORMAL | DOC_MODE_MDWREN | DOC_MODE_RST_LAT |
+ DOC_MODE_BDECT;
+ WriteDOC(tmp, virtadr, Mplus_DOCControl);
+ WriteDOC(~tmp, virtadr, Mplus_CtrlConfirm);
+ mdelay(1);
+
+ ChipID = ReadDOC(virtadr, ChipID);
+
+ switch (ChipID) {
+ case DOC_ChipID_DocMilPlus16:
+ reg = DoC_Mplus_Toggle;
+ break;
+ case DOC_ChipID_DocMilPlus32:
+ printk(KERN_ERR "DiskOnChip Millennium Plus 32MB is not supported, ignoring.\n");
+ default:
+ ret = -ENODEV;
+ goto notfound;
+ }
+ break;
+
+ default:
+ ret = -ENODEV;
+ goto notfound;
+ }
+ /* Check the TOGGLE bit in the ECC register */
+ tmp = ReadDOC_(virtadr, reg) & DOC_TOGGLE_BIT;
+ tmpb = ReadDOC_(virtadr, reg) & DOC_TOGGLE_BIT;
+ tmpc = ReadDOC_(virtadr, reg) & DOC_TOGGLE_BIT;
+ if ((tmp == tmpb) || (tmp != tmpc)) {
+ printk(KERN_WARNING "Possible DiskOnChip at 0x%lx failed TOGGLE test, dropping.\n", physadr);
+ ret = -ENODEV;
+ goto notfound;
+ }
+
+ for (mtd = doclist; mtd; mtd = doc->nextdoc) {
+ unsigned char oldval;
+ unsigned char newval;
+ nand = mtd->priv;
+ doc = nand->priv;
+ /* Use the alias resolution register to determine if this is
+ in fact the same DOC aliased to a new address. If writes
+ to one chip's alias resolution register change the value on
+ the other chip, they're the same chip. */
+ if (ChipID == DOC_ChipID_DocMilPlus16) {
+ oldval = ReadDOC(doc->virtadr, Mplus_AliasResolution);
+ newval = ReadDOC(virtadr, Mplus_AliasResolution);
+ } else {
+ oldval = ReadDOC(doc->virtadr, AliasResolution);
+ newval = ReadDOC(virtadr, AliasResolution);
+ }
+ if (oldval != newval)
+ continue;
+ if (ChipID == DOC_ChipID_DocMilPlus16) {
+ WriteDOC(~newval, virtadr, Mplus_AliasResolution);
+ oldval = ReadDOC(doc->virtadr, Mplus_AliasResolution);
+ WriteDOC(newval, virtadr, Mplus_AliasResolution); /* restore it */
+ } else {
+ WriteDOC(~newval, virtadr, AliasResolution);
+ oldval = ReadDOC(doc->virtadr, AliasResolution);
+ WriteDOC(newval, virtadr, AliasResolution); /* restore it */
+ }
+ newval = ~newval;
+ if (oldval == newval) {
+ printk(KERN_DEBUG "Found alias of DOC at 0x%lx to 0x%lx\n", doc->physadr, physadr);
+ goto notfound;
+ }
+ }
+
+ printk(KERN_NOTICE "DiskOnChip found at 0x%lx\n", physadr);
+
+ len = sizeof(struct mtd_info) +
+ sizeof(struct nand_chip) +
+ sizeof(struct doc_priv) +
+ (2 * sizeof(struct nand_bbt_descr));
+ mtd = kmalloc(len, GFP_KERNEL);
+ if (!mtd) {
+ printk(KERN_ERR "DiskOnChip kmalloc (%d bytes) failed!\n", len);
+ ret = -ENOMEM;
+ goto fail;
+ }
+ memset(mtd, 0, len);
+
+ nand = (struct nand_chip *) (mtd + 1);
+ doc = (struct doc_priv *) (nand + 1);
+ nand->bbt_td = (struct nand_bbt_descr *) (doc + 1);
+ nand->bbt_md = nand->bbt_td + 1;
+
+ mtd->priv = nand;
+ mtd->owner = THIS_MODULE;
+
+ nand->priv = doc;
+ nand->select_chip = doc200x_select_chip;
+ nand->hwcontrol = doc200x_hwcontrol;
+ nand->dev_ready = doc200x_dev_ready;
+ nand->waitfunc = doc200x_wait;
+ nand->block_bad = doc200x_block_bad;
+ nand->enable_hwecc = doc200x_enable_hwecc;
+ nand->calculate_ecc = doc200x_calculate_ecc;
+ nand->correct_data = doc200x_correct_data;
+
+ nand->autooob = &doc200x_oobinfo;
+ nand->eccmode = NAND_ECC_HW6_512;
+ nand->options = NAND_USE_FLASH_BBT | NAND_HWECC_SYNDROME;
+
+ doc->physadr = physadr;
+ doc->virtadr = virtadr;
+ doc->ChipID = ChipID;
+ doc->curfloor = -1;
+ doc->curchip = -1;
+ doc->mh0_page = -1;
+ doc->mh1_page = -1;
+ doc->nextdoc = doclist;
+
+ if (ChipID == DOC_ChipID_Doc2k)
+ numchips = doc2000_init(mtd);
+ else if (ChipID == DOC_ChipID_DocMilPlus16)
+ numchips = doc2001plus_init(mtd);
+ else
+ numchips = doc2001_init(mtd);
+
+ if ((ret = nand_scan(mtd, numchips))) {
+ /* DBB note: i believe nand_release is necessary here, as
+ buffers may have been allocated in nand_base. Check with
+ Thomas. FIX ME! */
+ /* nand_release will call del_mtd_device, but we haven't yet
+ added it. This is handled without incident by
+ del_mtd_device, as far as I can tell. */
+ nand_release(mtd);
+ kfree(mtd);
+ goto fail;
+ }
+
+ /* Success! */
+ doclist = mtd;
+ return 0;
+
+notfound:
+ /* Put back the contents of the DOCControl register, in case it's not
+ actually a DiskOnChip. */
+ WriteDOC(save_control, virtadr, DOCControl);
+fail:
+ iounmap(virtadr);
+ return ret;
+}
+
+static void release_nanddoc(void)
+{
+ struct mtd_info *mtd, *nextmtd;
+ struct nand_chip *nand;
+ struct doc_priv *doc;
+
+ for (mtd = doclist; mtd; mtd = nextmtd) {
+ nand = mtd->priv;
+ doc = nand->priv;
+
+ nextmtd = doc->nextdoc;
+ nand_release(mtd);
+ iounmap(doc->virtadr);
+ kfree(mtd);
+ }
+}
+
+static int __init init_nanddoc(void)
+{
+ int i, ret = 0;
+
+ /* We could create the decoder on demand, if memory is a concern.
+ * This way we have it handy, if an error happens
+ *
+ * Symbolsize is 10 (bits)
+ * Primitve polynomial is x^10+x^3+1
+ * first consecutive root is 510
+ * primitve element to generate roots = 1
+ * generator polinomial degree = 4
+ */
+ rs_decoder = init_rs(10, 0x409, FCR, 1, NROOTS);
+ if (!rs_decoder) {
+ printk (KERN_ERR "DiskOnChip: Could not create a RS decoder\n");
+ return -ENOMEM;
+ }
+
+ if (doc_config_location) {
+ printk(KERN_INFO "Using configured DiskOnChip probe address 0x%lx\n", doc_config_location);
+ ret = doc_probe(doc_config_location);
+ if (ret < 0)
+ goto outerr;
+ } else {
+ for (i=0; (doc_locations[i] != 0xffffffff); i++) {
+ doc_probe(doc_locations[i]);
+ }
+ }
+ /* No banner message any more. Print a message if no DiskOnChip
+ found, so the user knows we at least tried. */
+ if (!doclist) {
+ printk(KERN_INFO "No valid DiskOnChip devices found\n");
+ ret = -ENODEV;
+ goto outerr;
+ }
+ return 0;
+outerr:
+ free_rs(rs_decoder);
+ return ret;
+}
+
+static void __exit cleanup_nanddoc(void)
+{
+ /* Cleanup the nand/DoC resources */
+ release_nanddoc();
+
+ /* Free the reed solomon resources */
+ if (rs_decoder) {
+ free_rs(rs_decoder);
+ }
+}
+
+module_init(init_nanddoc);
+module_exit(cleanup_nanddoc);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("David Woodhouse <dwmw2@infradead.org>");
+MODULE_DESCRIPTION("M-Systems DiskOnChip 2000, Millennium and Millennium Plus device driver\n");
+#endif
diff --git a/drivers/nand/nand.c b/drivers/nand/nand.c
new file mode 100644
index 0000000000..e1781fcbbf
--- /dev/null
+++ b/drivers/nand/nand.c
@@ -0,0 +1,73 @@
+/*
+ * (C) Copyright 2005
+ * 2N Telekomunikace, a.s. <www.2n.cz>
+ * Ladislav Michl <michl@2n.cz>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+
+#if (CONFIG_COMMANDS & CFG_CMD_NAND) && !defined(CFG_NAND_LEGACY)
+
+#include <nand.h>
+
+#ifndef CFG_NAND_BASE_LIST
+#define CFG_NAND_BASE_LIST { CFG_NAND_BASE }
+#endif
+
+int nand_curr_device = -1;
+nand_info_t nand_info[CFG_MAX_NAND_DEVICE];
+
+static struct nand_chip nand_chip[CFG_MAX_NAND_DEVICE];
+static ulong base_address[CFG_MAX_NAND_DEVICE] = CFG_NAND_BASE_LIST;
+
+static const char default_nand_name[] = "nand";
+
+extern void board_nand_init(struct nand_chip *nand);
+
+static void nand_init_chip(struct mtd_info *mtd, struct nand_chip *nand,
+ ulong base_addr)
+{
+ mtd->priv = nand;
+
+ nand->IO_ADDR_R = nand->IO_ADDR_W = (void __iomem *)base_addr;
+ board_nand_init(nand);
+
+ if (nand_scan(mtd, 1) == 0) {
+ if (!mtd->name)
+ mtd->name = (char *)default_nand_name;
+ } else
+ mtd->name = NULL;
+
+}
+
+void nand_init(void)
+{
+ int i;
+ unsigned int size = 0;
+ for (i = 0; i < CFG_MAX_NAND_DEVICE; i++) {
+ nand_init_chip(&nand_info[i], &nand_chip[i], base_address[i]);
+ size += nand_info[i].size;
+ if (nand_curr_device == -1)
+ nand_curr_device = i;
+}
+ printf("%lu MiB\n", size / (1024 * 1024));
+}
+
+#endif
diff --git a/drivers/nand/nand_base.c b/drivers/nand/nand_base.c
new file mode 100644
index 0000000000..b7a5d32fb3
--- /dev/null
+++ b/drivers/nand/nand_base.c
@@ -0,0 +1,2665 @@
+/*
+ * drivers/mtd/nand.c
+ *
+ * Overview:
+ * This is the generic MTD driver for NAND flash devices. It should be
+ * capable of working with almost all NAND chips currently available.
+ * Basic support for AG-AND chips is provided.
+ *
+ * Additional technical information is available on
+ * http://www.linux-mtd.infradead.org/tech/nand.html
+ *
+ * Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com)
+ * 2002 Thomas Gleixner (tglx@linutronix.de)
+ *
+ * 02-08-2004 tglx: support for strange chips, which cannot auto increment
+ * pages on read / read_oob
+ *
+ * 03-17-2004 tglx: Check ready before auto increment check. Simon Bayes
+ * pointed this out, as he marked an auto increment capable chip
+ * as NOAUTOINCR in the board driver.
+ * Make reads over block boundaries work too
+ *
+ * 04-14-2004 tglx: first working version for 2k page size chips
+ *
+ * 05-19-2004 tglx: Basic support for Renesas AG-AND chips
+ *
+ * 09-24-2004 tglx: add support for hardware controllers (e.g. ECC) shared
+ * among multiple independend devices. Suggestions and initial patch
+ * from Ben Dooks <ben-mtd@fluff.org>
+ *
+ * Credits:
+ * David Woodhouse for adding multichip support
+ *
+ * Aleph One Ltd. and Toby Churchill Ltd. for supporting the
+ * rework for 2K page size chips
+ *
+ * TODO:
+ * Enable cached programming for 2k page size chips
+ * Check, if mtd->ecctype should be set to MTD_ECC_HW
+ * if we have HW ecc support.
+ * The AG-AND chips have nice features for speed improvement,
+ * which are not supported yet. Read / program 4 pages in one go.
+ *
+ * $Id: nand_base.c,v 1.126 2004/12/13 11:22:25 lavinen Exp $
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+/* XXX U-BOOT XXX */
+#if 0
+#include <linux/delay.h>
+#include <linux/errno.h>
+#include <linux/sched.h>
+#include <linux/slab.h>
+#include <linux/types.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/nand.h>
+#include <linux/mtd/nand_ecc.h>
+#include <linux/mtd/compatmac.h>
+#include <linux/interrupt.h>
+#include <linux/bitops.h>
+#include <asm/io.h>
+
+#ifdef CONFIG_MTD_PARTITIONS
+#include <linux/mtd/partitions.h>
+#endif
+
+#endif
+
+#include <common.h>
+
+#if (CONFIG_COMMANDS & CFG_CMD_NAND) && !defined(CFG_NAND_LEGACY)
+
+#include <malloc.h>
+#include <watchdog.h>
+#include <linux/mtd/compat.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/nand.h>
+#include <linux/mtd/nand_ecc.h>
+
+#include <asm/io.h>
+#include <asm/errno.h>
+
+#ifdef CONFIG_JFFS2_NAND
+#include <jffs2/jffs2.h>
+#endif
+
+/* Define default oob placement schemes for large and small page devices */
+static struct nand_oobinfo nand_oob_8 = {
+ .useecc = MTD_NANDECC_AUTOPLACE,
+ .eccbytes = 3,
+ .eccpos = {0, 1, 2},
+ .oobfree = { {3, 2}, {6, 2} }
+};
+
+static struct nand_oobinfo nand_oob_16 = {
+ .useecc = MTD_NANDECC_AUTOPLACE,
+ .eccbytes = 6,
+ .eccpos = {0, 1, 2, 3, 6, 7},
+ .oobfree = { {8, 8} }
+};
+
+static struct nand_oobinfo nand_oob_64 = {
+ .useecc = MTD_NANDECC_AUTOPLACE,
+ .eccbytes = 24,
+ .eccpos = {
+ 40, 41, 42, 43, 44, 45, 46, 47,
+ 48, 49, 50, 51, 52, 53, 54, 55,
+ 56, 57, 58, 59, 60, 61, 62, 63},
+ .oobfree = { {2, 38} }
+};
+
+/* This is used for padding purposes in nand_write_oob */
+static u_char ffchars[] = {
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+};
+
+/*
+ * NAND low-level MTD interface functions
+ */
+static void nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len);
+static void nand_read_buf(struct mtd_info *mtd, u_char *buf, int len);
+static int nand_verify_buf(struct mtd_info *mtd, const u_char *buf, int len);
+
+static int nand_read (struct mtd_info *mtd, loff_t from, size_t len, size_t * retlen, u_char * buf);
+static int nand_read_ecc (struct mtd_info *mtd, loff_t from, size_t len,
+ size_t * retlen, u_char * buf, u_char * eccbuf, struct nand_oobinfo *oobsel);
+static int nand_read_oob (struct mtd_info *mtd, loff_t from, size_t len, size_t * retlen, u_char * buf);
+static int nand_write (struct mtd_info *mtd, loff_t to, size_t len, size_t * retlen, const u_char * buf);
+static int nand_write_ecc (struct mtd_info *mtd, loff_t to, size_t len,
+ size_t * retlen, const u_char * buf, u_char * eccbuf, struct nand_oobinfo *oobsel);
+static int nand_write_oob (struct mtd_info *mtd, loff_t to, size_t len, size_t * retlen, const u_char *buf);
+/* XXX U-BOOT XXX */
+#if 0
+static int nand_writev (struct mtd_info *mtd, const struct kvec *vecs,
+ unsigned long count, loff_t to, size_t * retlen);
+static int nand_writev_ecc (struct mtd_info *mtd, const struct kvec *vecs,
+ unsigned long count, loff_t to, size_t * retlen, u_char *eccbuf, struct nand_oobinfo *oobsel);
+#endif
+static int nand_erase (struct mtd_info *mtd, struct erase_info *instr);
+static void nand_sync (struct mtd_info *mtd);
+
+/* Some internal functions */
+static int nand_write_page (struct mtd_info *mtd, struct nand_chip *this, int page, u_char *oob_buf,
+ struct nand_oobinfo *oobsel, int mode);
+#ifdef CONFIG_MTD_NAND_VERIFY_WRITE
+static int nand_verify_pages (struct mtd_info *mtd, struct nand_chip *this, int page, int numpages,
+ u_char *oob_buf, struct nand_oobinfo *oobsel, int chipnr, int oobmode);
+#else
+#define nand_verify_pages(...) (0)
+#endif
+
+static void nand_get_device (struct nand_chip *this, struct mtd_info *mtd, int new_state);
+
+/**
+ * nand_release_device - [GENERIC] release chip
+ * @mtd: MTD device structure
+ *
+ * Deselect, release chip lock and wake up anyone waiting on the device
+ */
+/* XXX U-BOOT XXX */
+#if 0
+static void nand_release_device (struct mtd_info *mtd)
+{
+ struct nand_chip *this = mtd->priv;
+
+ /* De-select the NAND device */
+ this->select_chip(mtd, -1);
+ /* Do we have a hardware controller ? */
+ if (this->controller) {
+ spin_lock(&this->controller->lock);
+ this->controller->active = NULL;
+ spin_unlock(&this->controller->lock);
+ }
+ /* Release the chip */
+ spin_lock (&this->chip_lock);
+ this->state = FL_READY;
+ wake_up (&this->wq);
+ spin_unlock (&this->chip_lock);
+}
+#else
+static void nand_release_device (struct mtd_info *mtd)
+{
+ struct nand_chip *this = mtd->priv;
+ this->select_chip(mtd, -1); /* De-select the NAND device */
+}
+#endif
+
+/**
+ * nand_read_byte - [DEFAULT] read one byte from the chip
+ * @mtd: MTD device structure
+ *
+ * Default read function for 8bit buswith
+ */
+static u_char nand_read_byte(struct mtd_info *mtd)
+{
+ struct nand_chip *this = mtd->priv;
+ return readb(this->IO_ADDR_R);
+}
+
+/**
+ * nand_write_byte - [DEFAULT] write one byte to the chip
+ * @mtd: MTD device structure
+ * @byte: pointer to data byte to write
+ *
+ * Default write function for 8it buswith
+ */
+static void nand_write_byte(struct mtd_info *mtd, u_char byte)
+{
+ struct nand_chip *this = mtd->priv;
+ writeb(byte, this->IO_ADDR_W);
+}
+
+/**
+ * nand_read_byte16 - [DEFAULT] read one byte endianess aware from the chip
+ * @mtd: MTD device structure
+ *
+ * Default read function for 16bit buswith with
+ * endianess conversion
+ */
+static u_char nand_read_byte16(struct mtd_info *mtd)
+{
+ struct nand_chip *this = mtd->priv;
+ return (u_char) cpu_to_le16(readw(this->IO_ADDR_R));
+}
+
+/**
+ * nand_write_byte16 - [DEFAULT] write one byte endianess aware to the chip
+ * @mtd: MTD device structure
+ * @byte: pointer to data byte to write
+ *
+ * Default write function for 16bit buswith with
+ * endianess conversion
+ */
+static void nand_write_byte16(struct mtd_info *mtd, u_char byte)
+{
+ struct nand_chip *this = mtd->priv;
+ writew(le16_to_cpu((u16) byte), this->IO_ADDR_W);
+}
+
+/**
+ * nand_read_word - [DEFAULT] read one word from the chip
+ * @mtd: MTD device structure
+ *
+ * Default read function for 16bit buswith without
+ * endianess conversion
+ */
+static u16 nand_read_word(struct mtd_info *mtd)
+{
+ struct nand_chip *this = mtd->priv;
+ return readw(this->IO_ADDR_R);
+}
+
+/**
+ * nand_write_word - [DEFAULT] write one word to the chip
+ * @mtd: MTD device structure
+ * @word: data word to write
+ *
+ * Default write function for 16bit buswith without
+ * endianess conversion
+ */
+static void nand_write_word(struct mtd_info *mtd, u16 word)
+{
+ struct nand_chip *this = mtd->priv;
+ writew(word, this->IO_ADDR_W);
+}
+
+/**
+ * nand_select_chip - [DEFAULT] control CE line
+ * @mtd: MTD device structure
+ * @chip: chipnumber to select, -1 for deselect
+ *
+ * Default select function for 1 chip devices.
+ */
+static void nand_select_chip(struct mtd_info *mtd, int chip)
+{
+ struct nand_chip *this = mtd->priv;
+ switch(chip) {
+ case -1:
+ this->hwcontrol(mtd, NAND_CTL_CLRNCE);
+ break;
+ case 0:
+ this->hwcontrol(mtd, NAND_CTL_SETNCE);
+ break;
+
+ default:
+ BUG();
+ }
+}
+
+/**
+ * nand_write_buf - [DEFAULT] write buffer to chip
+ * @mtd: MTD device structure
+ * @buf: data buffer
+ * @len: number of bytes to write
+ *
+ * Default write function for 8bit buswith
+ */
+static void nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len)
+{
+ int i;
+ struct nand_chip *this = mtd->priv;
+
+ for (i=0; i<len; i++)
+ writeb(buf[i], this->IO_ADDR_W);
+}
+
+/**
+ * nand_read_buf - [DEFAULT] read chip data into buffer
+ * @mtd: MTD device structure
+ * @buf: buffer to store date
+ * @len: number of bytes to read
+ *
+ * Default read function for 8bit buswith
+ */
+static void nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)
+{
+ int i;
+ struct nand_chip *this = mtd->priv;
+
+ for (i=0; i<len; i++)
+ buf[i] = readb(this->IO_ADDR_R);
+}
+
+/**
+ * nand_verify_buf - [DEFAULT] Verify chip data against buffer
+ * @mtd: MTD device structure
+ * @buf: buffer containing the data to compare
+ * @len: number of bytes to compare
+ *
+ * Default verify function for 8bit buswith
+ */
+static int nand_verify_buf(struct mtd_info *mtd, const u_char *buf, int len)
+{
+ int i;
+ struct nand_chip *this = mtd->priv;
+
+ for (i=0; i<len; i++)
+ if (buf[i] != readb(this->IO_ADDR_R))
+ return -EFAULT;
+
+ return 0;
+}
+
+/**
+ * nand_write_buf16 - [DEFAULT] write buffer to chip
+ * @mtd: MTD device structure
+ * @buf: data buffer
+ * @len: number of bytes to write
+ *
+ * Default write function for 16bit buswith
+ */
+static void nand_write_buf16(struct mtd_info *mtd, const u_char *buf, int len)
+{
+ int i;
+ struct nand_chip *this = mtd->priv;
+ u16 *p = (u16 *) buf;
+ len >>= 1;
+
+ for (i=0; i<len; i++)
+ writew(p[i], this->IO_ADDR_W);
+
+}
+
+/**
+ * nand_read_buf16 - [DEFAULT] read chip data into buffer
+ * @mtd: MTD device structure
+ * @buf: buffer to store date
+ * @len: number of bytes to read
+ *
+ * Default read function for 16bit buswith
+ */
+static void nand_read_buf16(struct mtd_info *mtd, u_char *buf, int len)
+{
+ int i;
+ struct nand_chip *this = mtd->priv;
+ u16 *p = (u16 *) buf;
+ len >>= 1;
+
+ for (i=0; i<len; i++)
+ p[i] = readw(this->IO_ADDR_R);
+}
+
+/**
+ * nand_verify_buf16 - [DEFAULT] Verify chip data against buffer
+ * @mtd: MTD device structure
+ * @buf: buffer containing the data to compare
+ * @len: number of bytes to compare
+ *
+ * Default verify function for 16bit buswith
+ */
+static int nand_verify_buf16(struct mtd_info *mtd, const u_char *buf, int len)
+{
+ int i;
+ struct nand_chip *this = mtd->priv;
+ u16 *p = (u16 *) buf;
+ len >>= 1;
+
+ for (i=0; i<len; i++)
+ if (p[i] != readw(this->IO_ADDR_R))
+ return -EFAULT;
+
+ return 0;
+}
+
+/**
+ * nand_block_bad - [DEFAULT] Read bad block marker from the chip
+ * @mtd: MTD device structure
+ * @ofs: offset from device start
+ * @getchip: 0, if the chip is already selected
+ *
+ * Check, if the block is bad.
+ */
+static int nand_block_bad(struct mtd_info *mtd, loff_t ofs, int getchip)
+{
+ int page, chipnr, res = 0;
+ struct nand_chip *this = mtd->priv;
+ u16 bad;
+
+ if (getchip) {
+ page = (int)(ofs >> this->page_shift);
+ chipnr = (int)(ofs >> this->chip_shift);
+
+ /* Grab the lock and see if the device is available */
+ nand_get_device (this, mtd, FL_READING);
+
+ /* Select the NAND device */
+ this->select_chip(mtd, chipnr);
+ } else
+ page = (int) ofs;
+
+ if (this->options & NAND_BUSWIDTH_16) {
+ this->cmdfunc (mtd, NAND_CMD_READOOB, this->badblockpos & 0xFE, page & this->pagemask);
+ bad = cpu_to_le16(this->read_word(mtd));
+ if (this->badblockpos & 0x1)
+ bad >>= 1;
+ if ((bad & 0xFF) != 0xff)
+ res = 1;
+ } else {
+ this->cmdfunc (mtd, NAND_CMD_READOOB, this->badblockpos, page & this->pagemask);
+ if (this->read_byte(mtd) != 0xff)
+ res = 1;
+ }
+
+ if (getchip) {
+ /* Deselect and wake up anyone waiting on the device */
+ nand_release_device(mtd);
+ }
+
+ return res;
+}
+
+/**
+ * nand_default_block_markbad - [DEFAULT] mark a block bad
+ * @mtd: MTD device structure
+ * @ofs: offset from device start
+ *
+ * This is the default implementation, which can be overridden by
+ * a hardware specific driver.
+*/
+static int nand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
+{
+ struct nand_chip *this = mtd->priv;
+ u_char buf[2] = {0, 0};
+ size_t retlen;
+ int block;
+
+ /* Get block number */
+ block = ((int) ofs) >> this->bbt_erase_shift;
+ this->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
+
+ /* Do we have a flash based bad block table ? */
+ if (this->options & NAND_USE_FLASH_BBT)
+ return nand_update_bbt (mtd, ofs);
+
+ /* We write two bytes, so we dont have to mess with 16 bit access */
+ ofs += mtd->oobsize + (this->badblockpos & ~0x01);
+ return nand_write_oob (mtd, ofs , 2, &retlen, buf);
+}
+
+/**
+ * nand_check_wp - [GENERIC] check if the chip is write protected
+ * @mtd: MTD device structure
+ * Check, if the device is write protected
+ *
+ * The function expects, that the device is already selected
+ */
+static int nand_check_wp (struct mtd_info *mtd)
+{
+ struct nand_chip *this = mtd->priv;
+ /* Check the WP bit */
+ this->cmdfunc (mtd, NAND_CMD_STATUS, -1, -1);
+ return (this->read_byte(mtd) & 0x80) ? 0 : 1;
+}
+
+/**
+ * nand_block_checkbad - [GENERIC] Check if a block is marked bad
+ * @mtd: MTD device structure
+ * @ofs: offset from device start
+ * @getchip: 0, if the chip is already selected
+ * @allowbbt: 1, if its allowed to access the bbt area
+ *
+ * Check, if the block is bad. Either by reading the bad block table or
+ * calling of the scan function.
+ */
+static int nand_block_checkbad (struct mtd_info *mtd, loff_t ofs, int getchip, int allowbbt)
+{
+ struct nand_chip *this = mtd->priv;
+
+ if (!this->bbt)
+ return this->block_bad(mtd, ofs, getchip);
+
+ /* Return info from the table */
+ return nand_isbad_bbt (mtd, ofs, allowbbt);
+}
+
+/**
+ * nand_command - [DEFAULT] Send command to NAND device
+ * @mtd: MTD device structure
+ * @command: the command to be sent
+ * @column: the column address for this command, -1 if none
+ * @page_addr: the page address for this command, -1 if none
+ *
+ * Send command to NAND device. This function is used for small page
+ * devices (256/512 Bytes per page)
+ */
+static void nand_command (struct mtd_info *mtd, unsigned command, int column, int page_addr)
+{
+ register struct nand_chip *this = mtd->priv;
+
+ /* Begin command latch cycle */
+ this->hwcontrol(mtd, NAND_CTL_SETCLE);
+ /*
+ * Write out the command to the device.
+ */
+ if (command == NAND_CMD_SEQIN) {
+ int readcmd;
+
+ if (column >= mtd->oobblock) {
+ /* OOB area */
+ column -= mtd->oobblock;
+ readcmd = NAND_CMD_READOOB;
+ } else if (column < 256) {
+ /* First 256 bytes --> READ0 */
+ readcmd = NAND_CMD_READ0;
+ } else {
+ column -= 256;
+ readcmd = NAND_CMD_READ1;
+ }
+ this->write_byte(mtd, readcmd);
+ }
+ this->write_byte(mtd, command);
+
+ /* Set ALE and clear CLE to start address cycle */
+ this->hwcontrol(mtd, NAND_CTL_CLRCLE);
+
+ if (column != -1 || page_addr != -1) {
+ this->hwcontrol(mtd, NAND_CTL_SETALE);
+
+ /* Serially input address */
+ if (column != -1) {
+ /* Adjust columns for 16 bit buswidth */
+ if (this->options & NAND_BUSWIDTH_16)
+ column >>= 1;
+ this->write_byte(mtd, column);
+ }
+ if (page_addr != -1) {
+ this->write_byte(mtd, (unsigned char) (page_addr & 0xff));
+ this->write_byte(mtd, (unsigned char) ((page_addr >> 8) & 0xff));
+ /* One more address cycle for devices > 32MiB */
+ if (this->chipsize > (32 << 20))
+ this->write_byte(mtd, (unsigned char) ((page_addr >> 16) & 0x0f));
+ }
+ /* Latch in address */
+ this->hwcontrol(mtd, NAND_CTL_CLRALE);
+ }
+
+ /*
+ * program and erase have their own busy handlers
+ * status and sequential in needs no delay
+ */
+ switch (command) {
+
+ case NAND_CMD_PAGEPROG:
+ case NAND_CMD_ERASE1:
+ case NAND_CMD_ERASE2:
+ case NAND_CMD_SEQIN:
+ case NAND_CMD_STATUS:
+ return;
+
+ case NAND_CMD_RESET:
+ if (this->dev_ready)
+ break;
+ udelay(this->chip_delay);
+ this->hwcontrol(mtd, NAND_CTL_SETCLE);
+ this->write_byte(mtd, NAND_CMD_STATUS);
+ this->hwcontrol(mtd, NAND_CTL_CLRCLE);
+ while ( !(this->read_byte(mtd) & 0x40));
+ return;
+
+ /* This applies to read commands */
+ default:
+ /*
+ * If we don't have access to the busy pin, we apply the given
+ * command delay
+ */
+ if (!this->dev_ready) {
+ udelay (this->chip_delay);
+ return;
+ }
+ }
+
+ /* Apply this short delay always to ensure that we do wait tWB in
+ * any case on any machine. */
+ ndelay (100);
+ /* wait until command is processed */
+ while (!this->dev_ready(mtd));
+}
+
+/**
+ * nand_command_lp - [DEFAULT] Send command to NAND large page device
+ * @mtd: MTD device structure
+ * @command: the command to be sent
+ * @column: the column address for this command, -1 if none
+ * @page_addr: the page address for this command, -1 if none
+ *
+ * Send command to NAND device. This is the version for the new large page devices
+ * We dont have the seperate regions as we have in the small page devices.
+ * We must emulate NAND_CMD_READOOB to keep the code compatible.
+ *
+ */
+static void nand_command_lp (struct mtd_info *mtd, unsigned command, int column, int page_addr)
+{
+ register struct nand_chip *this = mtd->priv;
+
+ /* Emulate NAND_CMD_READOOB */
+ if (command == NAND_CMD_READOOB) {
+ column += mtd->oobblock;
+ command = NAND_CMD_READ0;
+ }
+
+
+ /* Begin command latch cycle */
+ this->hwcontrol(mtd, NAND_CTL_SETCLE);
+ /* Write out the command to the device. */
+ this->write_byte(mtd, command);
+ /* End command latch cycle */
+ this->hwcontrol(mtd, NAND_CTL_CLRCLE);
+
+ if (column != -1 || page_addr != -1) {
+ this->hwcontrol(mtd, NAND_CTL_SETALE);
+
+ /* Serially input address */
+ if (column != -1) {
+ /* Adjust columns for 16 bit buswidth */
+ if (this->options & NAND_BUSWIDTH_16)
+ column >>= 1;
+ this->write_byte(mtd, column & 0xff);
+ this->write_byte(mtd, column >> 8);
+ }
+ if (page_addr != -1) {
+ this->write_byte(mtd, (unsigned char) (page_addr & 0xff));
+ this->write_byte(mtd, (unsigned char) ((page_addr >> 8) & 0xff));
+ /* One more address cycle for devices > 128MiB */
+ if (this->chipsize > (128 << 20))
+ this->write_byte(mtd, (unsigned char) ((page_addr >> 16) & 0xff));
+ }
+ /* Latch in address */
+ this->hwcontrol(mtd, NAND_CTL_CLRALE);
+ }
+
+ /*
+ * program and erase have their own busy handlers
+ * status and sequential in needs no delay
+ */
+ switch (command) {
+
+ case NAND_CMD_CACHEDPROG:
+ case NAND_CMD_PAGEPROG:
+ case NAND_CMD_ERASE1:
+ case NAND_CMD_ERASE2:
+ case NAND_CMD_SEQIN:
+ case NAND_CMD_STATUS:
+ return;
+
+
+ case NAND_CMD_RESET:
+ if (this->dev_ready)
+ break;
+ udelay(this->chip_delay);
+ this->hwcontrol(mtd, NAND_CTL_SETCLE);
+ this->write_byte(mtd, NAND_CMD_STATUS);
+ this->hwcontrol(mtd, NAND_CTL_CLRCLE);
+ while ( !(this->read_byte(mtd) & 0x40));
+ return;
+
+ case NAND_CMD_READ0:
+ /* Begin command latch cycle */
+ this->hwcontrol(mtd, NAND_CTL_SETCLE);
+ /* Write out the start read command */
+ this->write_byte(mtd, NAND_CMD_READSTART);
+ /* End command latch cycle */
+ this->hwcontrol(mtd, NAND_CTL_CLRCLE);
+ /* Fall through into ready check */
+
+ /* This applies to read commands */
+ default:
+ /*
+ * If we don't have access to the busy pin, we apply the given
+ * command delay
+ */
+ if (!this->dev_ready) {
+ udelay (this->chip_delay);
+ return;
+ }
+ }
+
+ /* Apply this short delay always to ensure that we do wait tWB in
+ * any case on any machine. */
+ ndelay (100);
+ /* wait until command is processed */
+ while (!this->dev_ready(mtd));
+}
+
+/**
+ * nand_get_device - [GENERIC] Get chip for selected access
+ * @this: the nand chip descriptor
+ * @mtd: MTD device structure
+ * @new_state: the state which is requested
+ *
+ * Get the device and lock it for exclusive access
+ */
+/* XXX U-BOOT XXX */
+#if 0
+static void nand_get_device (struct nand_chip *this, struct mtd_info *mtd, int new_state)
+{
+ struct nand_chip *active = this;
+
+ DECLARE_WAITQUEUE (wait, current);
+
+ /*
+ * Grab the lock and see if the device is available
+ */
+retry:
+ /* Hardware controller shared among independend devices */
+ if (this->controller) {
+ spin_lock (&this->controller->lock);
+ if (this->controller->active)
+ active = this->controller->active;
+ else
+ this->controller->active = this;
+ spin_unlock (&this->controller->lock);
+ }
+
+ if (active == this) {
+ spin_lock (&this->chip_lock);
+ if (this->state == FL_READY) {
+ this->state = new_state;
+ spin_unlock (&this->chip_lock);
+ return;
+ }
+ }
+ set_current_state (TASK_UNINTERRUPTIBLE);
+ add_wait_queue (&active->wq, &wait);
+ spin_unlock (&active->chip_lock);
+ schedule ();
+ remove_wait_queue (&active->wq, &wait);
+ goto retry;
+}
+#else
+static void nand_get_device (struct nand_chip *this, struct mtd_info *mtd, int new_state) {}
+#endif
+
+/**
+ * nand_wait - [DEFAULT] wait until the command is done
+ * @mtd: MTD device structure
+ * @this: NAND chip structure
+ * @state: state to select the max. timeout value
+ *
+ * Wait for command done. This applies to erase and program only
+ * Erase can take up to 400ms and program up to 20ms according to
+ * general NAND and SmartMedia specs
+ *
+*/
+/* XXX U-BOOT XXX */
+#if 0
+static int nand_wait(struct mtd_info *mtd, struct nand_chip *this, int state)
+{
+ unsigned long timeo = jiffies;
+ int status;
+
+ if (state == FL_ERASING)
+ timeo += (HZ * 400) / 1000;
+ else
+ timeo += (HZ * 20) / 1000;
+
+ /* Apply this short delay always to ensure that we do wait tWB in
+ * any case on any machine. */
+ ndelay (100);
+
+ if ((state == FL_ERASING) && (this->options & NAND_IS_AND))
+ this->cmdfunc (mtd, NAND_CMD_STATUS_MULTI, -1, -1);
+ else
+ this->cmdfunc (mtd, NAND_CMD_STATUS, -1, -1);
+
+ while (time_before(jiffies, timeo)) {
+ /* Check, if we were interrupted */
+ if (this->state != state)
+ return 0;
+
+ if (this->dev_ready) {
+ if (this->dev_ready(mtd))
+ break;
+ } else {
+ if (this->read_byte(mtd) & NAND_STATUS_READY)
+ break;
+ }
+ yield ();
+ }
+ status = (int) this->read_byte(mtd);
+ return status;
+
+ return 0;
+}
+#else
+static int nand_wait(struct mtd_info *mtd, struct nand_chip *this, int state)
+{
+ unsigned long timeo;
+
+ if (state == FL_ERASING)
+ timeo = CFG_HZ * 400;
+ else
+ timeo = CFG_HZ * 20;
+
+ if ((state == FL_ERASING) && (this->options & NAND_IS_AND))
+ this->cmdfunc(mtd, NAND_CMD_STATUS_MULTI, -1, -1);
+ else
+ this->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1);
+
+ reset_timer();
+
+ while (1) {
+ if (get_timer(0) > timeo) {
+ printf("Timeout!");
+ return 0;
+ }
+
+ if (this->dev_ready) {
+ if (this->dev_ready(mtd))
+ break;
+ } else {
+ if (this->read_byte(mtd) & NAND_STATUS_READY)
+ break;
+ }
+ }
+#ifdef PPCHAMELON_NAND_TIMER_HACK
+ reset_timer();
+ while (get_timer(0) < 10);
+#endif /* PPCHAMELON_NAND_TIMER_HACK */
+
+ return this->read_byte(mtd);
+}
+#endif
+
+/**
+ * nand_write_page - [GENERIC] write one page
+ * @mtd: MTD device structure
+ * @this: NAND chip structure
+ * @page: startpage inside the chip, must be called with (page & this->pagemask)
+ * @oob_buf: out of band data buffer
+ * @oobsel: out of band selecttion structre
+ * @cached: 1 = enable cached programming if supported by chip
+ *
+ * Nand_page_program function is used for write and writev !
+ * This function will always program a full page of data
+ * If you call it with a non page aligned buffer, you're lost :)
+ *
+ * Cached programming is not supported yet.
+ */
+static int nand_write_page (struct mtd_info *mtd, struct nand_chip *this, int page,
+ u_char *oob_buf, struct nand_oobinfo *oobsel, int cached)
+{
+ int i, status;
+ u_char ecc_code[32];
+ int eccmode = oobsel->useecc ? this->eccmode : NAND_ECC_NONE;
+ uint *oob_config = oobsel->eccpos;
+ int datidx = 0, eccidx = 0, eccsteps = this->eccsteps;
+ int eccbytes = 0;
+
+ /* FIXME: Enable cached programming */
+ cached = 0;
+
+ /* Send command to begin auto page programming */
+ this->cmdfunc (mtd, NAND_CMD_SEQIN, 0x00, page);
+
+ /* Write out complete page of data, take care of eccmode */
+ switch (eccmode) {
+ /* No ecc, write all */
+ case NAND_ECC_NONE:
+ printk (KERN_WARNING "Writing data without ECC to NAND-FLASH is not recommended\n");
+ this->write_buf(mtd, this->data_poi, mtd->oobblock);
+ break;
+
+ /* Software ecc 3/256, write all */
+ case NAND_ECC_SOFT:
+ for (; eccsteps; eccsteps--) {
+ this->calculate_ecc(mtd, &this->data_poi[datidx], ecc_code);
+ for (i = 0; i < 3; i++, eccidx++)
+ oob_buf[oob_config[eccidx]] = ecc_code[i];
+ datidx += this->eccsize;
+ }
+ this->write_buf(mtd, this->data_poi, mtd->oobblock);
+ break;
+ default:
+ eccbytes = this->eccbytes;
+ for (; eccsteps; eccsteps--) {
+ /* enable hardware ecc logic for write */
+ this->enable_hwecc(mtd, NAND_ECC_WRITE);
+ this->write_buf(mtd, &this->data_poi[datidx], this->eccsize);
+ this->calculate_ecc(mtd, &this->data_poi[datidx], ecc_code);
+ for (i = 0; i < eccbytes; i++, eccidx++)
+ oob_buf[oob_config[eccidx]] = ecc_code[i];
+ /* If the hardware ecc provides syndromes then
+ * the ecc code must be written immidiately after
+ * the data bytes (words) */
+ if (this->options & NAND_HWECC_SYNDROME)
+ this->write_buf(mtd, ecc_code, eccbytes);
+ datidx += this->eccsize;
+ }
+ break;
+ }
+
+ /* Write out OOB data */
+ if (this->options & NAND_HWECC_SYNDROME)
+ this->write_buf(mtd, &oob_buf[oobsel->eccbytes], mtd->oobsize - oobsel->eccbytes);
+ else
+ this->write_buf(mtd, oob_buf, mtd->oobsize);
+
+ /* Send command to actually program the data */
+ this->cmdfunc (mtd, cached ? NAND_CMD_CACHEDPROG : NAND_CMD_PAGEPROG, -1, -1);
+
+ if (!cached) {
+ /* call wait ready function */
+ status = this->waitfunc (mtd, this, FL_WRITING);
+ /* See if device thinks it succeeded */
+ if (status & 0x01) {
+ DEBUG (MTD_DEBUG_LEVEL0, "%s: " "Failed write, page 0x%08x, ", __FUNCTION__, page);
+ return -EIO;
+ }
+ } else {
+ /* FIXME: Implement cached programming ! */
+ /* wait until cache is ready*/
+ /* status = this->waitfunc (mtd, this, FL_CACHEDRPG); */
+ }
+ return 0;
+}
+
+#ifdef CONFIG_MTD_NAND_VERIFY_WRITE
+/**
+ * nand_verify_pages - [GENERIC] verify the chip contents after a write
+ * @mtd: MTD device structure
+ * @this: NAND chip structure
+ * @page: startpage inside the chip, must be called with (page & this->pagemask)
+ * @numpages: number of pages to verify
+ * @oob_buf: out of band data buffer
+ * @oobsel: out of band selecttion structre
+ * @chipnr: number of the current chip
+ * @oobmode: 1 = full buffer verify, 0 = ecc only
+ *
+ * The NAND device assumes that it is always writing to a cleanly erased page.
+ * Hence, it performs its internal write verification only on bits that
+ * transitioned from 1 to 0. The device does NOT verify the whole page on a
+ * byte by byte basis. It is possible that the page was not completely erased
+ * or the page is becoming unusable due to wear. The read with ECC would catch
+ * the error later when the ECC page check fails, but we would rather catch
+ * it early in the page write stage. Better to write no data than invalid data.
+ */
+static int nand_verify_pages (struct mtd_info *mtd, struct nand_chip *this, int page, int numpages,
+ u_char *oob_buf, struct nand_oobinfo *oobsel, int chipnr, int oobmode)
+{
+ int i, j, datidx = 0, oobofs = 0, res = -EIO;
+ int eccsteps = this->eccsteps;
+ int hweccbytes;
+ u_char oobdata[64];
+
+ hweccbytes = (this->options & NAND_HWECC_SYNDROME) ? (oobsel->eccbytes / eccsteps) : 0;
+
+ /* Send command to read back the first page */
+ this->cmdfunc (mtd, NAND_CMD_READ0, 0, page);
+
+ for(;;) {
+ for (j = 0; j < eccsteps; j++) {
+ /* Loop through and verify the data */
+ if (this->verify_buf(mtd, &this->data_poi[datidx], mtd->eccsize)) {
+ DEBUG (MTD_DEBUG_LEVEL0, "%s: " "Failed write verify, page 0x%08x ", __FUNCTION__, page);
+ goto out;
+ }
+ datidx += mtd->eccsize;
+ /* Have we a hw generator layout ? */
+ if (!hweccbytes)
+ continue;
+ if (this->verify_buf(mtd, &this->oob_buf[oobofs], hweccbytes)) {
+ DEBUG (MTD_DEBUG_LEVEL0, "%s: " "Failed write verify, page 0x%08x ", __FUNCTION__, page);
+ goto out;
+ }
+ oobofs += hweccbytes;
+ }
+
+ /* check, if we must compare all data or if we just have to
+ * compare the ecc bytes
+ */
+ if (oobmode) {
+ if (this->verify_buf(mtd, &oob_buf[oobofs], mtd->oobsize - hweccbytes * eccsteps)) {
+ DEBUG (MTD_DEBUG_LEVEL0, "%s: " "Failed write verify, page 0x%08x ", __FUNCTION__, page);
+ goto out;
+ }
+ } else {
+ /* Read always, else autoincrement fails */
+ this->read_buf(mtd, oobdata, mtd->oobsize - hweccbytes * eccsteps);
+
+ if (oobsel->useecc != MTD_NANDECC_OFF && !hweccbytes) {
+ int ecccnt = oobsel->eccbytes;
+
+ for (i = 0; i < ecccnt; i++) {
+ int idx = oobsel->eccpos[i];
+ if (oobdata[idx] != oob_buf[oobofs + idx] ) {
+ DEBUG (MTD_DEBUG_LEVEL0,
+ "%s: Failed ECC write "
+ "verify, page 0x%08x, " "%6i bytes were succesful\n", __FUNCTION__, page, i);
+ goto out;
+ }
+ }
+ }
+ }
+ oobofs += mtd->oobsize - hweccbytes * eccsteps;
+ page++;
+ numpages--;
+
+ /* Apply delay or wait for ready/busy pin
+ * Do this before the AUTOINCR check, so no problems
+ * arise if a chip which does auto increment
+ * is marked as NOAUTOINCR by the board driver.
+ * Do this also before returning, so the chip is
+ * ready for the next command.
+ */
+ if (!this->dev_ready)
+ udelay (this->chip_delay);
+ else
+ while (!this->dev_ready(mtd));
+
+ /* All done, return happy */
+ if (!numpages)
+ return 0;
+
+
+ /* Check, if the chip supports auto page increment */
+ if (!NAND_CANAUTOINCR(this))
+ this->cmdfunc (mtd, NAND_CMD_READ0, 0x00, page);
+ }
+ /*
+ * Terminate the read command. We come here in case of an error
+ * So we must issue a reset command.
+ */
+out:
+ this->cmdfunc (mtd, NAND_CMD_RESET, -1, -1);
+ return res;
+}
+#endif
+
+/**
+ * nand_read - [MTD Interface] MTD compability function for nand_read_ecc
+ * @mtd: MTD device structure
+ * @from: offset to read from
+ * @len: number of bytes to read
+ * @retlen: pointer to variable to store the number of read bytes
+ * @buf: the databuffer to put data
+ *
+ * This function simply calls nand_read_ecc with oob buffer and oobsel = NULL
+*/
+static int nand_read (struct mtd_info *mtd, loff_t from, size_t len, size_t * retlen, u_char * buf)
+{
+ return nand_read_ecc (mtd, from, len, retlen, buf, NULL, NULL);
+}
+
+
+/**
+ * nand_read_ecc - [MTD Interface] Read data with ECC
+ * @mtd: MTD device structure
+ * @from: offset to read from
+ * @len: number of bytes to read
+ * @retlen: pointer to variable to store the number of read bytes
+ * @buf: the databuffer to put data
+ * @oob_buf: filesystem supplied oob data buffer
+ * @oobsel: oob selection structure
+ *
+ * NAND read with ECC
+ */
+static int nand_read_ecc (struct mtd_info *mtd, loff_t from, size_t len,
+ size_t * retlen, u_char * buf, u_char * oob_buf, struct nand_oobinfo *oobsel)
+{
+ int i, j, col, realpage, page, end, ecc, chipnr, sndcmd = 1;
+ int read = 0, oob = 0, ecc_status = 0, ecc_failed = 0;
+ struct nand_chip *this = mtd->priv;
+ u_char *data_poi, *oob_data = oob_buf;
+ u_char ecc_calc[32];
+ u_char ecc_code[32];
+ int eccmode, eccsteps;
+ unsigned *oob_config;
+ int datidx;
+ int blockcheck = (1 << (this->phys_erase_shift - this->page_shift)) - 1;
+ int eccbytes;
+ int compareecc = 1;
+ int oobreadlen;
+
+
+ DEBUG (MTD_DEBUG_LEVEL3, "nand_read_ecc: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
+
+ /* Do not allow reads past end of device */
+ if ((from + len) > mtd->size) {
+ DEBUG (MTD_DEBUG_LEVEL0, "nand_read_ecc: Attempt read beyond end of device\n");
+ *retlen = 0;
+ return -EINVAL;
+ }
+
+ /* Grab the lock and see if the device is available */
+ nand_get_device (this, mtd ,FL_READING);
+
+ /* use userspace supplied oobinfo, if zero */
+ if (oobsel == NULL)
+ oobsel = &mtd->oobinfo;
+
+ /* Autoplace of oob data ? Use the default placement scheme */
+ if (oobsel->useecc == MTD_NANDECC_AUTOPLACE)
+ oobsel = this->autooob;
+
+ eccmode = oobsel->useecc ? this->eccmode : NAND_ECC_NONE;
+ oob_config = oobsel->eccpos;
+
+ /* Select the NAND device */
+ chipnr = (int)(from >> this->chip_shift);
+ this->select_chip(mtd, chipnr);
+
+ /* First we calculate the starting page */
+ realpage = (int) (from >> this->page_shift);
+ page = realpage & this->pagemask;
+
+ /* Get raw starting column */
+ col = from & (mtd->oobblock - 1);
+
+ end = mtd->oobblock;
+ ecc = this->eccsize;
+ eccbytes = this->eccbytes;
+
+ if ((eccmode == NAND_ECC_NONE) || (this->options & NAND_HWECC_SYNDROME))
+ compareecc = 0;
+
+ oobreadlen = mtd->oobsize;
+ if (this->options & NAND_HWECC_SYNDROME)
+ oobreadlen -= oobsel->eccbytes;
+
+ /* Loop until all data read */
+ while (read < len) {
+
+ int aligned = (!col && (len - read) >= end);
+ /*
+ * If the read is not page aligned, we have to read into data buffer
+ * due to ecc, else we read into return buffer direct
+ */
+ if (aligned)
+ data_poi = &buf[read];
+ else
+ data_poi = this->data_buf;
+
+ /* Check, if we have this page in the buffer
+ *
+ * FIXME: Make it work when we must provide oob data too,
+ * check the usage of data_buf oob field
+ */
+ if (realpage == this->pagebuf && !oob_buf) {
+ /* aligned read ? */
+ if (aligned)
+ memcpy (data_poi, this->data_buf, end);
+ goto readdata;
+ }
+
+ /* Check, if we must send the read command */
+ if (sndcmd) {
+ this->cmdfunc (mtd, NAND_CMD_READ0, 0x00, page);
+ sndcmd = 0;
+ }
+
+ /* get oob area, if we have no oob buffer from fs-driver */
+ if (!oob_buf || oobsel->useecc == MTD_NANDECC_AUTOPLACE ||
+ oobsel->useecc == MTD_NANDECC_AUTOPL_USR)
+ oob_data = &this->data_buf[end];
+
+ eccsteps = this->eccsteps;
+
+ switch (eccmode) {
+ case NAND_ECC_NONE: { /* No ECC, Read in a page */
+/* XXX U-BOOT XXX */
+#if 0
+ static unsigned long lastwhinge = 0;
+ if ((lastwhinge / HZ) != (jiffies / HZ)) {
+ printk (KERN_WARNING "Reading data from NAND FLASH without ECC is not recommended\n");
+ lastwhinge = jiffies;
+ }
+#else
+ puts("Reading data from NAND FLASH without ECC is not recommended\n");
+#endif
+ this->read_buf(mtd, data_poi, end);
+ break;
+ }
+
+ case NAND_ECC_SOFT: /* Software ECC 3/256: Read in a page + oob data */
+ this->read_buf(mtd, data_poi, end);
+ for (i = 0, datidx = 0; eccsteps; eccsteps--, i+=3, datidx += ecc)
+ this->calculate_ecc(mtd, &data_poi[datidx], &ecc_calc[i]);
+ break;
+
+ default:
+ for (i = 0, datidx = 0; eccsteps; eccsteps--, i+=eccbytes, datidx += ecc) {
+ this->enable_hwecc(mtd, NAND_ECC_READ);
+ this->read_buf(mtd, &data_poi[datidx], ecc);
+
+ /* HW ecc with syndrome calculation must read the
+ * syndrome from flash immidiately after the data */
+ if (!compareecc) {
+ /* Some hw ecc generators need to know when the
+ * syndrome is read from flash */
+ this->enable_hwecc(mtd, NAND_ECC_READSYN);
+ this->read_buf(mtd, &oob_data[i], eccbytes);
+ /* We calc error correction directly, it checks the hw
+ * generator for an error, reads back the syndrome and
+ * does the error correction on the fly */
+ if (this->correct_data(mtd, &data_poi[datidx], &oob_data[i], &ecc_code[i]) == -1) {
+ DEBUG (MTD_DEBUG_LEVEL0, "nand_read_ecc: "
+ "Failed ECC read, page 0x%08x on chip %d\n", page, chipnr);
+ ecc_failed++;
+ }
+ } else {
+ this->calculate_ecc(mtd, &data_poi[datidx], &ecc_calc[i]);
+ }
+ }
+ break;
+ }
+
+ /* read oobdata */
+ this->read_buf(mtd, &oob_data[mtd->oobsize - oobreadlen], oobreadlen);
+
+ /* Skip ECC check, if not requested (ECC_NONE or HW_ECC with syndromes) */
+ if (!compareecc)
+ goto readoob;
+
+ /* Pick the ECC bytes out of the oob data */
+ for (j = 0; j < oobsel->eccbytes; j++)
+ ecc_code[j] = oob_data[oob_config[j]];
+
+ /* correct data, if neccecary */
+ for (i = 0, j = 0, datidx = 0; i < this->eccsteps; i++, datidx += ecc) {
+ ecc_status = this->correct_data(mtd, &data_poi[datidx], &ecc_code[j], &ecc_calc[j]);
+
+ /* Get next chunk of ecc bytes */
+ j += eccbytes;
+
+ /* Check, if we have a fs supplied oob-buffer,
+ * This is the legacy mode. Used by YAFFS1
+ * Should go away some day
+ */
+ if (oob_buf && oobsel->useecc == MTD_NANDECC_PLACE) {
+ int *p = (int *)(&oob_data[mtd->oobsize]);
+ p[i] = ecc_status;
+ }
+
+ if (ecc_status == -1) {
+ DEBUG (MTD_DEBUG_LEVEL0, "nand_read_ecc: " "Failed ECC read, page 0x%08x\n", page);
+ ecc_failed++;
+ }
+ }
+
+ readoob:
+ /* check, if we have a fs supplied oob-buffer */
+ if (oob_buf) {
+ /* without autoplace. Legacy mode used by YAFFS1 */
+ switch(oobsel->useecc) {
+ case MTD_NANDECC_AUTOPLACE:
+ case MTD_NANDECC_AUTOPL_USR:
+ /* Walk through the autoplace chunks */
+ for (i = 0, j = 0; j < mtd->oobavail; i++) {
+ int from = oobsel->oobfree[i][0];
+ int num = oobsel->oobfree[i][1];
+ memcpy(&oob_buf[oob], &oob_data[from], num);
+ j+= num;
+ }
+ oob += mtd->oobavail;
+ break;
+ case MTD_NANDECC_PLACE:
+ /* YAFFS1 legacy mode */
+ oob_data += this->eccsteps * sizeof (int);
+ default:
+ oob_data += mtd->oobsize;
+ }
+ }
+ readdata:
+ /* Partial page read, transfer data into fs buffer */
+ if (!aligned) {
+ for (j = col; j < end && read < len; j++)
+ buf[read++] = data_poi[j];
+ this->pagebuf = realpage;
+ } else
+ read += mtd->oobblock;
+
+ /* Apply delay or wait for ready/busy pin
+ * Do this before the AUTOINCR check, so no problems
+ * arise if a chip which does auto increment
+ * is marked as NOAUTOINCR by the board driver.
+ */
+ if (!this->dev_ready)
+ udelay (this->chip_delay);
+ else
+ while (!this->dev_ready(mtd));
+
+ if (read == len)
+ break;
+
+ /* For subsequent reads align to page boundary. */
+ col = 0;
+ /* Increment page address */
+ realpage++;
+
+ page = realpage & this->pagemask;
+ /* Check, if we cross a chip boundary */
+ if (!page) {
+ chipnr++;
+ this->select_chip(mtd, -1);
+ this->select_chip(mtd, chipnr);
+ }
+ /* Check, if the chip supports auto page increment
+ * or if we have hit a block boundary.
+ */
+ if (!NAND_CANAUTOINCR(this) || !(page & blockcheck))
+ sndcmd = 1;
+ }
+
+ /* Deselect and wake up anyone waiting on the device */
+ nand_release_device(mtd);
+
+ /*
+ * Return success, if no ECC failures, else -EBADMSG
+ * fs driver will take care of that, because
+ * retlen == desired len and result == -EBADMSG
+ */
+ *retlen = read;
+ return ecc_failed ? -EBADMSG : 0;
+}
+
+/**
+ * nand_read_oob - [MTD Interface] NAND read out-of-band
+ * @mtd: MTD device structure
+ * @from: offset to read from
+ * @len: number of bytes to read
+ * @retlen: pointer to variable to store the number of read bytes
+ * @buf: the databuffer to put data
+ *
+ * NAND read out-of-band data from the spare area
+ */
+static int nand_read_oob (struct mtd_info *mtd, loff_t from, size_t len, size_t * retlen, u_char * buf)
+{
+ int i, col, page, chipnr;
+ struct nand_chip *this = mtd->priv;
+ int blockcheck = (1 << (this->phys_erase_shift - this->page_shift)) - 1;
+
+ DEBUG (MTD_DEBUG_LEVEL3, "nand_read_oob: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
+
+ /* Shift to get page */
+ page = (int)(from >> this->page_shift);
+ chipnr = (int)(from >> this->chip_shift);
+
+ /* Mask to get column */
+ col = from & (mtd->oobsize - 1);
+
+ /* Initialize return length value */
+ *retlen = 0;
+
+ /* Do not allow reads past end of device */
+ if ((from + len) > mtd->size) {
+ DEBUG (MTD_DEBUG_LEVEL0, "nand_read_oob: Attempt read beyond end of device\n");
+ *retlen = 0;
+ return -EINVAL;
+ }
+
+ /* Grab the lock and see if the device is available */
+ nand_get_device (this, mtd , FL_READING);
+
+ /* Select the NAND device */
+ this->select_chip(mtd, chipnr);
+
+ /* Send the read command */
+ this->cmdfunc (mtd, NAND_CMD_READOOB, col, page & this->pagemask);
+ /*
+ * Read the data, if we read more than one page
+ * oob data, let the device transfer the data !
+ */
+ i = 0;
+ while (i < len) {
+ int thislen = mtd->oobsize - col;
+ thislen = min_t(int, thislen, len);
+ this->read_buf(mtd, &buf[i], thislen);
+ i += thislen;
+
+ /* Apply delay or wait for ready/busy pin
+ * Do this before the AUTOINCR check, so no problems
+ * arise if a chip which does auto increment
+ * is marked as NOAUTOINCR by the board driver.
+ */
+ if (!this->dev_ready)
+ udelay (this->chip_delay);
+ else
+ while (!this->dev_ready(mtd));
+
+ /* Read more ? */
+ if (i < len) {
+ page++;
+ col = 0;
+
+ /* Check, if we cross a chip boundary */
+ if (!(page & this->pagemask)) {
+ chipnr++;
+ this->select_chip(mtd, -1);
+ this->select_chip(mtd, chipnr);
+ }
+
+ /* Check, if the chip supports auto page increment
+ * or if we have hit a block boundary.
+ */
+ if (!NAND_CANAUTOINCR(this) || !(page & blockcheck)) {
+ /* For subsequent page reads set offset to 0 */
+ this->cmdfunc (mtd, NAND_CMD_READOOB, 0x0, page & this->pagemask);
+ }
+ }
+ }
+
+ /* Deselect and wake up anyone waiting on the device */
+ nand_release_device(mtd);
+
+ /* Return happy */
+ *retlen = len;
+ return 0;
+}
+
+/**
+ * nand_read_raw - [GENERIC] Read raw data including oob into buffer
+ * @mtd: MTD device structure
+ * @buf: temporary buffer
+ * @from: offset to read from
+ * @len: number of bytes to read
+ * @ooblen: number of oob data bytes to read
+ *
+ * Read raw data including oob into buffer
+ */
+int nand_read_raw (struct mtd_info *mtd, uint8_t *buf, loff_t from, size_t len, size_t ooblen)
+{
+ struct nand_chip *this = mtd->priv;
+ int page = (int) (from >> this->page_shift);
+ int chip = (int) (from >> this->chip_shift);
+ int sndcmd = 1;
+ int cnt = 0;
+ int pagesize = mtd->oobblock + mtd->oobsize;
+ int blockcheck = (1 << (this->phys_erase_shift - this->page_shift)) - 1;
+
+ /* Do not allow reads past end of device */
+ if ((from + len) > mtd->size) {
+ DEBUG (MTD_DEBUG_LEVEL0, "nand_read_raw: Attempt read beyond end of device\n");
+ return -EINVAL;
+ }
+
+ /* Grab the lock and see if the device is available */
+ nand_get_device (this, mtd , FL_READING);
+
+ this->select_chip (mtd, chip);
+
+ /* Add requested oob length */
+ len += ooblen;
+
+ while (len) {
+ if (sndcmd)
+ this->cmdfunc (mtd, NAND_CMD_READ0, 0, page & this->pagemask);
+ sndcmd = 0;
+
+ this->read_buf (mtd, &buf[cnt], pagesize);
+
+ len -= pagesize;
+ cnt += pagesize;
+ page++;
+
+ if (!this->dev_ready)
+ udelay (this->chip_delay);
+ else
+ while (!this->dev_ready(mtd));
+
+ /* Check, if the chip supports auto page increment */
+ if (!NAND_CANAUTOINCR(this) || !(page & blockcheck))
+ sndcmd = 1;
+ }
+
+ /* Deselect and wake up anyone waiting on the device */
+ nand_release_device(mtd);
+ return 0;
+}
+
+
+/**
+ * nand_prepare_oobbuf - [GENERIC] Prepare the out of band buffer
+ * @mtd: MTD device structure
+ * @fsbuf: buffer given by fs driver
+ * @oobsel: out of band selection structre
+ * @autoplace: 1 = place given buffer into the oob bytes
+ * @numpages: number of pages to prepare
+ *
+ * Return:
+ * 1. Filesystem buffer available and autoplacement is off,
+ * return filesystem buffer
+ * 2. No filesystem buffer or autoplace is off, return internal
+ * buffer
+ * 3. Filesystem buffer is given and autoplace selected
+ * put data from fs buffer into internal buffer and
+ * retrun internal buffer
+ *
+ * Note: The internal buffer is filled with 0xff. This must
+ * be done only once, when no autoplacement happens
+ * Autoplacement sets the buffer dirty flag, which
+ * forces the 0xff fill before using the buffer again.
+ *
+*/
+static u_char * nand_prepare_oobbuf (struct mtd_info *mtd, u_char *fsbuf, struct nand_oobinfo *oobsel,
+ int autoplace, int numpages)
+{
+ struct nand_chip *this = mtd->priv;
+ int i, len, ofs;
+
+ /* Zero copy fs supplied buffer */
+ if (fsbuf && !autoplace)
+ return fsbuf;
+
+ /* Check, if the buffer must be filled with ff again */
+ if (this->oobdirty) {
+ memset (this->oob_buf, 0xff,
+ mtd->oobsize << (this->phys_erase_shift - this->page_shift));
+ this->oobdirty = 0;
+ }
+
+ /* If we have no autoplacement or no fs buffer use the internal one */
+ if (!autoplace || !fsbuf)
+ return this->oob_buf;
+
+ /* Walk through the pages and place the data */
+ this->oobdirty = 1;
+ ofs = 0;
+ while (numpages--) {
+ for (i = 0, len = 0; len < mtd->oobavail; i++) {
+ int to = ofs + oobsel->oobfree[i][0];
+ int num = oobsel->oobfree[i][1];
+ memcpy (&this->oob_buf[to], fsbuf, num);
+ len += num;
+ fsbuf += num;
+ }
+ ofs += mtd->oobavail;
+ }
+ return this->oob_buf;
+}
+
+#define NOTALIGNED(x) (x & (mtd->oobblock-1)) != 0
+
+/**
+ * nand_write - [MTD Interface] compability function for nand_write_ecc
+ * @mtd: MTD device structure
+ * @to: offset to write to
+ * @len: number of bytes to write
+ * @retlen: pointer to variable to store the number of written bytes
+ * @buf: the data to write
+ *
+ * This function simply calls nand_write_ecc with oob buffer and oobsel = NULL
+ *
+*/
+static int nand_write (struct mtd_info *mtd, loff_t to, size_t len, size_t * retlen, const u_char * buf)
+{
+ return (nand_write_ecc (mtd, to, len, retlen, buf, NULL, NULL));
+}
+
+/**
+ * nand_write_ecc - [MTD Interface] NAND write with ECC
+ * @mtd: MTD device structure
+ * @to: offset to write to
+ * @len: number of bytes to write
+ * @retlen: pointer to variable to store the number of written bytes
+ * @buf: the data to write
+ * @eccbuf: filesystem supplied oob data buffer
+ * @oobsel: oob selection structure
+ *
+ * NAND write with ECC
+ */
+static int nand_write_ecc (struct mtd_info *mtd, loff_t to, size_t len,
+ size_t * retlen, const u_char * buf, u_char * eccbuf, struct nand_oobinfo *oobsel)
+{
+ int startpage, page, ret = -EIO, oob = 0, written = 0, chipnr;
+ int autoplace = 0, numpages, totalpages;
+ struct nand_chip *this = mtd->priv;
+ u_char *oobbuf, *bufstart;
+ int ppblock = (1 << (this->phys_erase_shift - this->page_shift));
+
+ DEBUG (MTD_DEBUG_LEVEL3, "nand_write_ecc: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
+
+ /* Initialize retlen, in case of early exit */
+ *retlen = 0;
+
+ /* Do not allow write past end of device */
+ if ((to + len) > mtd->size) {
+ DEBUG (MTD_DEBUG_LEVEL0, "nand_write_ecc: Attempt to write past end of page\n");
+ return -EINVAL;
+ }
+
+ /* reject writes, which are not page aligned */
+ if (NOTALIGNED (to) || NOTALIGNED(len)) {
+ printk (KERN_NOTICE "nand_write_ecc: Attempt to write not page aligned data\n");
+ return -EINVAL;
+ }
+
+ /* Grab the lock and see if the device is available */
+ nand_get_device (this, mtd, FL_WRITING);
+
+ /* Calculate chipnr */
+ chipnr = (int)(to >> this->chip_shift);
+ /* Select the NAND device */
+ this->select_chip(mtd, chipnr);
+
+ /* Check, if it is write protected */
+ if (nand_check_wp(mtd))
+ goto out;
+
+ /* if oobsel is NULL, use chip defaults */
+ if (oobsel == NULL)
+ oobsel = &mtd->oobinfo;
+
+ /* Autoplace of oob data ? Use the default placement scheme */
+ if (oobsel->useecc == MTD_NANDECC_AUTOPLACE) {
+ oobsel = this->autooob;
+ autoplace = 1;
+ }
+ if (oobsel->useecc == MTD_NANDECC_AUTOPL_USR)
+ autoplace = 1;
+
+ /* Setup variables and oob buffer */
+ totalpages = len >> this->page_shift;
+ page = (int) (to >> this->page_shift);
+ /* Invalidate the page cache, if we write to the cached page */
+ if (page <= this->pagebuf && this->pagebuf < (page + totalpages))
+ this->pagebuf = -1;
+
+ /* Set it relative to chip */
+ page &= this->pagemask;
+ startpage = page;
+ /* Calc number of pages we can write in one go */
+ numpages = min (ppblock - (startpage & (ppblock - 1)), totalpages);
+ oobbuf = nand_prepare_oobbuf (mtd, eccbuf, oobsel, autoplace, numpages);
+ bufstart = (u_char *)buf;
+
+ /* Loop until all data is written */
+ while (written < len) {
+
+ this->data_poi = (u_char*) &buf[written];
+ /* Write one page. If this is the last page to write
+ * or the last page in this block, then use the
+ * real pageprogram command, else select cached programming
+ * if supported by the chip.
+ */
+ ret = nand_write_page (mtd, this, page, &oobbuf[oob], oobsel, (--numpages > 0));
+ if (ret) {
+ DEBUG (MTD_DEBUG_LEVEL0, "nand_write_ecc: write_page failed %d\n", ret);
+ goto out;
+ }
+ /* Next oob page */
+ oob += mtd->oobsize;
+ /* Update written bytes count */
+ written += mtd->oobblock;
+ if (written == len)
+ goto cmp;
+
+ /* Increment page address */
+ page++;
+
+ /* Have we hit a block boundary ? Then we have to verify and
+ * if verify is ok, we have to setup the oob buffer for
+ * the next pages.
+ */
+ if (!(page & (ppblock - 1))){
+ int ofs;
+ this->data_poi = bufstart;
+ ret = nand_verify_pages (mtd, this, startpage,
+ page - startpage,
+ oobbuf, oobsel, chipnr, (eccbuf != NULL));
+ if (ret) {
+ DEBUG (MTD_DEBUG_LEVEL0, "nand_write_ecc: verify_pages failed %d\n", ret);
+ goto out;
+ }
+ *retlen = written;
+
+ ofs = autoplace ? mtd->oobavail : mtd->oobsize;
+ if (eccbuf)
+ eccbuf += (page - startpage) * ofs;
+ totalpages -= page - startpage;
+ numpages = min (totalpages, ppblock);
+ page &= this->pagemask;
+ startpage = page;
+ oob = 0;
+ this->oobdirty = 1;
+ oobbuf = nand_prepare_oobbuf (mtd, eccbuf, oobsel,
+ autoplace, numpages);
+ /* Check, if we cross a chip boundary */
+ if (!page) {
+ chipnr++;
+ this->select_chip(mtd, -1);
+ this->select_chip(mtd, chipnr);
+ }
+ }
+ }
+ /* Verify the remaining pages */
+cmp:
+ this->data_poi = bufstart;
+ ret = nand_verify_pages (mtd, this, startpage, totalpages,
+ oobbuf, oobsel, chipnr, (eccbuf != NULL));
+ if (!ret)
+ *retlen = written;
+ else
+ DEBUG (MTD_DEBUG_LEVEL0, "nand_write_ecc: verify_pages failed %d\n", ret);
+
+out:
+ /* Deselect and wake up anyone waiting on the device */
+ nand_release_device(mtd);
+
+ return ret;
+}
+
+
+/**
+ * nand_write_oob - [MTD Interface] NAND write out-of-band
+ * @mtd: MTD device structure
+ * @to: offset to write to
+ * @len: number of bytes to write
+ * @retlen: pointer to variable to store the number of written bytes
+ * @buf: the data to write
+ *
+ * NAND write out-of-band
+ */
+static int nand_write_oob (struct mtd_info *mtd, loff_t to, size_t len, size_t * retlen, const u_char * buf)
+{
+ int column, page, status, ret = -EIO, chipnr;
+ struct nand_chip *this = mtd->priv;
+
+ DEBUG (MTD_DEBUG_LEVEL3, "nand_write_oob: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
+
+ /* Shift to get page */
+ page = (int) (to >> this->page_shift);
+ chipnr = (int) (to >> this->chip_shift);
+
+ /* Mask to get column */
+ column = to & (mtd->oobsize - 1);
+
+ /* Initialize return length value */
+ *retlen = 0;
+
+ /* Do not allow write past end of page */
+ if ((column + len) > mtd->oobsize) {
+ DEBUG (MTD_DEBUG_LEVEL0, "nand_write_oob: Attempt to write past end of page\n");
+ return -EINVAL;
+ }
+
+ /* Grab the lock and see if the device is available */
+ nand_get_device (this, mtd, FL_WRITING);
+
+ /* Select the NAND device */
+ this->select_chip(mtd, chipnr);
+
+ /* Reset the chip. Some chips (like the Toshiba TC5832DC found
+ in one of my DiskOnChip 2000 test units) will clear the whole
+ data page too if we don't do this. I have no clue why, but
+ I seem to have 'fixed' it in the doc2000 driver in
+ August 1999. dwmw2. */
+ this->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
+
+ /* Check, if it is write protected */
+ if (nand_check_wp(mtd))
+ goto out;
+
+ /* Invalidate the page cache, if we write to the cached page */
+ if (page == this->pagebuf)
+ this->pagebuf = -1;
+
+ if (NAND_MUST_PAD(this)) {
+ /* Write out desired data */
+ this->cmdfunc (mtd, NAND_CMD_SEQIN, mtd->oobblock, page & this->pagemask);
+ /* prepad 0xff for partial programming */
+ this->write_buf(mtd, ffchars, column);
+ /* write data */
+ this->write_buf(mtd, buf, len);
+ /* postpad 0xff for partial programming */
+ this->write_buf(mtd, ffchars, mtd->oobsize - (len+column));
+ } else {
+ /* Write out desired data */
+ this->cmdfunc (mtd, NAND_CMD_SEQIN, mtd->oobblock + column, page & this->pagemask);
+ /* write data */
+ this->write_buf(mtd, buf, len);
+ }
+ /* Send command to program the OOB data */
+ this->cmdfunc (mtd, NAND_CMD_PAGEPROG, -1, -1);
+
+ status = this->waitfunc (mtd, this, FL_WRITING);
+
+ /* See if device thinks it succeeded */
+ if (status & 0x01) {
+ DEBUG (MTD_DEBUG_LEVEL0, "nand_write_oob: " "Failed write, page 0x%08x\n", page);
+ ret = -EIO;
+ goto out;
+ }
+ /* Return happy */
+ *retlen = len;
+
+#ifdef CONFIG_MTD_NAND_VERIFY_WRITE
+ /* Send command to read back the data */
+ this->cmdfunc (mtd, NAND_CMD_READOOB, column, page & this->pagemask);
+
+ if (this->verify_buf(mtd, buf, len)) {
+ DEBUG (MTD_DEBUG_LEVEL0, "nand_write_oob: " "Failed write verify, page 0x%08x\n", page);
+ ret = -EIO;
+ goto out;
+ }
+#endif
+ ret = 0;
+out:
+ /* Deselect and wake up anyone waiting on the device */
+ nand_release_device(mtd);
+
+ return ret;
+}
+
+/* XXX U-BOOT XXX */
+#if 0
+/**
+ * nand_writev - [MTD Interface] compabilty function for nand_writev_ecc
+ * @mtd: MTD device structure
+ * @vecs: the iovectors to write
+ * @count: number of vectors
+ * @to: offset to write to
+ * @retlen: pointer to variable to store the number of written bytes
+ *
+ * NAND write with kvec. This just calls the ecc function
+ */
+static int nand_writev (struct mtd_info *mtd, const struct kvec *vecs, unsigned long count,
+ loff_t to, size_t * retlen)
+{
+ return (nand_writev_ecc (mtd, vecs, count, to, retlen, NULL, NULL));
+}
+
+/**
+ * nand_writev_ecc - [MTD Interface] write with iovec with ecc
+ * @mtd: MTD device structure
+ * @vecs: the iovectors to write
+ * @count: number of vectors
+ * @to: offset to write to
+ * @retlen: pointer to variable to store the number of written bytes
+ * @eccbuf: filesystem supplied oob data buffer
+ * @oobsel: oob selection structure
+ *
+ * NAND write with iovec with ecc
+ */
+static int nand_writev_ecc (struct mtd_info *mtd, const struct kvec *vecs, unsigned long count,
+ loff_t to, size_t * retlen, u_char *eccbuf, struct nand_oobinfo *oobsel)
+{
+ int i, page, len, total_len, ret = -EIO, written = 0, chipnr;
+ int oob, numpages, autoplace = 0, startpage;
+ struct nand_chip *this = mtd->priv;
+ int ppblock = (1 << (this->phys_erase_shift - this->page_shift));
+ u_char *oobbuf, *bufstart;
+
+ /* Preset written len for early exit */
+ *retlen = 0;
+
+ /* Calculate total length of data */
+ total_len = 0;
+ for (i = 0; i < count; i++)
+ total_len += (int) vecs[i].iov_len;
+
+ DEBUG (MTD_DEBUG_LEVEL3,
+ "nand_writev: to = 0x%08x, len = %i, count = %ld\n", (unsigned int) to, (unsigned int) total_len, count);
+
+ /* Do not allow write past end of page */
+ if ((to + total_len) > mtd->size) {
+ DEBUG (MTD_DEBUG_LEVEL0, "nand_writev: Attempted write past end of device\n");
+ return -EINVAL;
+ }
+
+ /* reject writes, which are not page aligned */
+ if (NOTALIGNED (to) || NOTALIGNED(total_len)) {
+ printk (KERN_NOTICE "nand_write_ecc: Attempt to write not page aligned data\n");
+ return -EINVAL;
+ }
+
+ /* Grab the lock and see if the device is available */
+ nand_get_device (this, mtd, FL_WRITING);
+
+ /* Get the current chip-nr */
+ chipnr = (int) (to >> this->chip_shift);
+ /* Select the NAND device */
+ this->select_chip(mtd, chipnr);
+
+ /* Check, if it is write protected */
+ if (nand_check_wp(mtd))
+ goto out;
+
+ /* if oobsel is NULL, use chip defaults */
+ if (oobsel == NULL)
+ oobsel = &mtd->oobinfo;
+
+ /* Autoplace of oob data ? Use the default placement scheme */
+ if (oobsel->useecc == MTD_NANDECC_AUTOPLACE) {
+ oobsel = this->autooob;
+ autoplace = 1;
+ }
+ if (oobsel->useecc == MTD_NANDECC_AUTOPL_USR)
+ autoplace = 1;
+
+ /* Setup start page */
+ page = (int) (to >> this->page_shift);
+ /* Invalidate the page cache, if we write to the cached page */
+ if (page <= this->pagebuf && this->pagebuf < ((to + total_len) >> this->page_shift))
+ this->pagebuf = -1;
+
+ startpage = page & this->pagemask;
+
+ /* Loop until all kvec' data has been written */
+ len = 0;
+ while (count) {
+ /* If the given tuple is >= pagesize then
+ * write it out from the iov
+ */
+ if ((vecs->iov_len - len) >= mtd->oobblock) {
+ /* Calc number of pages we can write
+ * out of this iov in one go */
+ numpages = (vecs->iov_len - len) >> this->page_shift;
+ /* Do not cross block boundaries */
+ numpages = min (ppblock - (startpage & (ppblock - 1)), numpages);
+ oobbuf = nand_prepare_oobbuf (mtd, NULL, oobsel, autoplace, numpages);
+ bufstart = (u_char *)vecs->iov_base;
+ bufstart += len;
+ this->data_poi = bufstart;
+ oob = 0;
+ for (i = 1; i <= numpages; i++) {
+ /* Write one page. If this is the last page to write
+ * then use the real pageprogram command, else select
+ * cached programming if supported by the chip.
+ */
+ ret = nand_write_page (mtd, this, page & this->pagemask,
+ &oobbuf[oob], oobsel, i != numpages);
+ if (ret)
+ goto out;
+ this->data_poi += mtd->oobblock;
+ len += mtd->oobblock;
+ oob += mtd->oobsize;
+ page++;
+ }
+ /* Check, if we have to switch to the next tuple */
+ if (len >= (int) vecs->iov_len) {
+ vecs++;
+ len = 0;
+ count--;
+ }
+ } else {
+ /* We must use the internal buffer, read data out of each
+ * tuple until we have a full page to write
+ */
+ int cnt = 0;
+ while (cnt < mtd->oobblock) {
+ if (vecs->iov_base != NULL && vecs->iov_len)
+ this->data_buf[cnt++] = ((u_char *) vecs->iov_base)[len++];
+ /* Check, if we have to switch to the next tuple */
+ if (len >= (int) vecs->iov_len) {
+ vecs++;
+ len = 0;
+ count--;
+ }
+ }
+ this->pagebuf = page;
+ this->data_poi = this->data_buf;
+ bufstart = this->data_poi;
+ numpages = 1;
+ oobbuf = nand_prepare_oobbuf (mtd, NULL, oobsel, autoplace, numpages);
+ ret = nand_write_page (mtd, this, page & this->pagemask,
+ oobbuf, oobsel, 0);
+ if (ret)
+ goto out;
+ page++;
+ }
+
+ this->data_poi = bufstart;
+ ret = nand_verify_pages (mtd, this, startpage, numpages, oobbuf, oobsel, chipnr, 0);
+ if (ret)
+ goto out;
+
+ written += mtd->oobblock * numpages;
+ /* All done ? */
+ if (!count)
+ break;
+
+ startpage = page & this->pagemask;
+ /* Check, if we cross a chip boundary */
+ if (!startpage) {
+ chipnr++;
+ this->select_chip(mtd, -1);
+ this->select_chip(mtd, chipnr);
+ }
+ }
+ ret = 0;
+out:
+ /* Deselect and wake up anyone waiting on the device */
+ nand_release_device(mtd);
+
+ *retlen = written;
+ return ret;
+}
+#endif
+
+/**
+ * single_erease_cmd - [GENERIC] NAND standard block erase command function
+ * @mtd: MTD device structure
+ * @page: the page address of the block which will be erased
+ *
+ * Standard erase command for NAND chips
+ */
+static void single_erase_cmd (struct mtd_info *mtd, int page)
+{
+ struct nand_chip *this = mtd->priv;
+ /* Send commands to erase a block */
+ this->cmdfunc (mtd, NAND_CMD_ERASE1, -1, page);
+ this->cmdfunc (mtd, NAND_CMD_ERASE2, -1, -1);
+}
+
+/**
+ * multi_erease_cmd - [GENERIC] AND specific block erase command function
+ * @mtd: MTD device structure
+ * @page: the page address of the block which will be erased
+ *
+ * AND multi block erase command function
+ * Erase 4 consecutive blocks
+ */
+static void multi_erase_cmd (struct mtd_info *mtd, int page)
+{
+ struct nand_chip *this = mtd->priv;
+ /* Send commands to erase a block */
+ this->cmdfunc (mtd, NAND_CMD_ERASE1, -1, page++);
+ this->cmdfunc (mtd, NAND_CMD_ERASE1, -1, page++);
+ this->cmdfunc (mtd, NAND_CMD_ERASE1, -1, page++);
+ this->cmdfunc (mtd, NAND_CMD_ERASE1, -1, page);
+ this->cmdfunc (mtd, NAND_CMD_ERASE2, -1, -1);
+}
+
+/**
+ * nand_erase - [MTD Interface] erase block(s)
+ * @mtd: MTD device structure
+ * @instr: erase instruction
+ *
+ * Erase one ore more blocks
+ */
+static int nand_erase (struct mtd_info *mtd, struct erase_info *instr)
+{
+ return nand_erase_nand (mtd, instr, 0);
+}
+
+/**
+ * nand_erase_intern - [NAND Interface] erase block(s)
+ * @mtd: MTD device structure
+ * @instr: erase instruction
+ * @allowbbt: allow erasing the bbt area
+ *
+ * Erase one ore more blocks
+ */
+int nand_erase_nand (struct mtd_info *mtd, struct erase_info *instr, int allowbbt)
+{
+ int page, len, status, pages_per_block, ret, chipnr;
+ struct nand_chip *this = mtd->priv;
+
+ DEBUG (MTD_DEBUG_LEVEL3,
+ "nand_erase: start = 0x%08x, len = %i\n", (unsigned int) instr->addr, (unsigned int) instr->len);
+
+ /* Start address must align on block boundary */
+ if (instr->addr & ((1 << this->phys_erase_shift) - 1)) {
+ DEBUG (MTD_DEBUG_LEVEL0, "nand_erase: Unaligned address\n");
+ return -EINVAL;
+ }
+
+ /* Length must align on block boundary */
+ if (instr->len & ((1 << this->phys_erase_shift) - 1)) {
+ DEBUG (MTD_DEBUG_LEVEL0, "nand_erase: Length not block aligned\n");
+ return -EINVAL;
+ }
+
+ /* Do not allow erase past end of device */
+ if ((instr->len + instr->addr) > mtd->size) {
+ DEBUG (MTD_DEBUG_LEVEL0, "nand_erase: Erase past end of device\n");
+ return -EINVAL;
+ }
+
+ instr->fail_addr = 0xffffffff;
+
+ /* Grab the lock and see if the device is available */
+ nand_get_device (this, mtd, FL_ERASING);
+
+ /* Shift to get first page */
+ page = (int) (instr->addr >> this->page_shift);
+ chipnr = (int) (instr->addr >> this->chip_shift);
+
+ /* Calculate pages in each block */
+ pages_per_block = 1 << (this->phys_erase_shift - this->page_shift);
+
+ /* Select the NAND device */
+ this->select_chip(mtd, chipnr);
+
+ /* Check the WP bit */
+ /* Check, if it is write protected */
+ if (nand_check_wp(mtd)) {
+ DEBUG (MTD_DEBUG_LEVEL0, "nand_erase: Device is write protected!!!\n");
+ instr->state = MTD_ERASE_FAILED;
+ goto erase_exit;
+ }
+
+ /* Loop through the pages */
+ len = instr->len;
+
+ instr->state = MTD_ERASING;
+
+ while (len) {
+#ifndef NAND_ALLOW_ERASE_ALL
+ /* Check if we have a bad block, we do not erase bad blocks ! */
+ if (nand_block_checkbad(mtd, ((loff_t) page) << this->page_shift, 0, allowbbt)) {
+ printk (KERN_WARNING "nand_erase: attempt to erase a bad block at page 0x%08x\n", page);
+ instr->state = MTD_ERASE_FAILED;
+ goto erase_exit;
+ }
+#endif
+ /* Invalidate the page cache, if we erase the block which contains
+ the current cached page */
+ if (page <= this->pagebuf && this->pagebuf < (page + pages_per_block))
+ this->pagebuf = -1;
+
+ this->erase_cmd (mtd, page & this->pagemask);
+
+ status = this->waitfunc (mtd, this, FL_ERASING);
+
+ /* See if block erase succeeded */
+ if (status & 0x01) {
+ DEBUG (MTD_DEBUG_LEVEL0, "nand_erase: " "Failed erase, page 0x%08x\n", page);
+ instr->state = MTD_ERASE_FAILED;
+ instr->fail_addr = (page << this->page_shift);
+ goto erase_exit;
+ }
+
+ /* Increment page address and decrement length */
+ len -= (1 << this->phys_erase_shift);
+ page += pages_per_block;
+
+ /* Check, if we cross a chip boundary */
+ if (len && !(page & this->pagemask)) {
+ chipnr++;
+ this->select_chip(mtd, -1);
+ this->select_chip(mtd, chipnr);
+ }
+ }
+ instr->state = MTD_ERASE_DONE;
+
+erase_exit:
+
+ ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
+ /* Do call back function */
+ if (!ret)
+ mtd_erase_callback(instr);
+
+ /* Deselect and wake up anyone waiting on the device */
+ nand_release_device(mtd);
+
+ /* Return more or less happy */
+ return ret;
+}
+
+/**
+ * nand_sync - [MTD Interface] sync
+ * @mtd: MTD device structure
+ *
+ * Sync is actually a wait for chip ready function
+ */
+static void nand_sync (struct mtd_info *mtd)
+{
+ struct nand_chip *this = mtd->priv;
+
+ DEBUG (MTD_DEBUG_LEVEL3, "nand_sync: called\n");
+
+ /* Grab the lock and see if the device is available */
+ nand_get_device (this, mtd, FL_SYNCING);
+ /* Release it and go back */
+ nand_release_device (mtd);
+}
+
+
+/**
+ * nand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
+ * @mtd: MTD device structure
+ * @ofs: offset relative to mtd start
+ */
+static int nand_block_isbad (struct mtd_info *mtd, loff_t ofs)
+{
+ /* Check for invalid offset */
+ if (ofs > mtd->size)
+ return -EINVAL;
+
+ return nand_block_checkbad (mtd, ofs, 1, 0);
+}
+
+/**
+ * nand_block_markbad - [MTD Interface] Mark the block at the given offset as bad
+ * @mtd: MTD device structure
+ * @ofs: offset relative to mtd start
+ */
+static int nand_block_markbad (struct mtd_info *mtd, loff_t ofs)
+{
+ struct nand_chip *this = mtd->priv;
+ int ret;
+
+ if ((ret = nand_block_isbad(mtd, ofs))) {
+ /* If it was bad already, return success and do nothing. */
+ if (ret > 0)
+ return 0;
+ return ret;
+ }
+
+ return this->block_markbad(mtd, ofs);
+}
+
+/**
+ * nand_scan - [NAND Interface] Scan for the NAND device
+ * @mtd: MTD device structure
+ * @maxchips: Number of chips to scan for
+ *
+ * This fills out all the not initialized function pointers
+ * with the defaults.
+ * The flash ID is read and the mtd/chip structures are
+ * filled with the appropriate values. Buffers are allocated if
+ * they are not provided by the board driver
+ *
+ */
+int nand_scan (struct mtd_info *mtd, int maxchips)
+{
+ int i, j, nand_maf_id, nand_dev_id, busw;
+ struct nand_chip *this = mtd->priv;
+
+ /* Get buswidth to select the correct functions*/
+ busw = this->options & NAND_BUSWIDTH_16;
+
+ /* check for proper chip_delay setup, set 20us if not */
+ if (!this->chip_delay)
+ this->chip_delay = 20;
+
+ /* check, if a user supplied command function given */
+ if (this->cmdfunc == NULL)
+ this->cmdfunc = nand_command;
+
+ /* check, if a user supplied wait function given */
+ if (this->waitfunc == NULL)
+ this->waitfunc = nand_wait;
+
+ if (!this->select_chip)
+ this->select_chip = nand_select_chip;
+ if (!this->write_byte)
+ this->write_byte = busw ? nand_write_byte16 : nand_write_byte;
+ if (!this->read_byte)
+ this->read_byte = busw ? nand_read_byte16 : nand_read_byte;
+ if (!this->write_word)
+ this->write_word = nand_write_word;
+ if (!this->read_word)
+ this->read_word = nand_read_word;
+ if (!this->block_bad)
+ this->block_bad = nand_block_bad;
+ if (!this->block_markbad)
+ this->block_markbad = nand_default_block_markbad;
+ if (!this->write_buf)
+ this->write_buf = busw ? nand_write_buf16 : nand_write_buf;
+ if (!this->read_buf)
+ this->read_buf = busw ? nand_read_buf16 : nand_read_buf;
+ if (!this->verify_buf)
+ this->verify_buf = busw ? nand_verify_buf16 : nand_verify_buf;
+ if (!this->scan_bbt)
+ this->scan_bbt = nand_default_bbt;
+
+ /* Select the device */
+ this->select_chip(mtd, 0);
+
+ /* Send the command for reading device ID */
+ this->cmdfunc (mtd, NAND_CMD_READID, 0x00, -1);
+
+ /* Read manufacturer and device IDs */
+ nand_maf_id = this->read_byte(mtd);
+ nand_dev_id = this->read_byte(mtd);
+
+ /* Print and store flash device information */
+ for (i = 0; nand_flash_ids[i].name != NULL; i++) {
+
+ if (nand_dev_id != nand_flash_ids[i].id)
+ continue;
+
+ if (!mtd->name) mtd->name = nand_flash_ids[i].name;
+ this->chipsize = nand_flash_ids[i].chipsize << 20;
+
+ /* New devices have all the information in additional id bytes */
+ if (!nand_flash_ids[i].pagesize) {
+ int extid;
+ /* The 3rd id byte contains non relevant data ATM */
+ extid = this->read_byte(mtd);
+ /* The 4th id byte is the important one */
+ extid = this->read_byte(mtd);
+ /* Calc pagesize */
+ mtd->oobblock = 1024 << (extid & 0x3);
+ extid >>= 2;
+ /* Calc oobsize */
+ mtd->oobsize = (8 << (extid & 0x03)) * (mtd->oobblock / 512);
+ extid >>= 2;
+ /* Calc blocksize. Blocksize is multiples of 64KiB */
+ mtd->erasesize = (64 * 1024) << (extid & 0x03);
+ extid >>= 2;
+ /* Get buswidth information */
+ busw = (extid & 0x01) ? NAND_BUSWIDTH_16 : 0;
+
+ } else {
+ /* Old devices have this data hardcoded in the
+ * device id table */
+ mtd->erasesize = nand_flash_ids[i].erasesize;
+ mtd->oobblock = nand_flash_ids[i].pagesize;
+ mtd->oobsize = mtd->oobblock / 32;
+ busw = nand_flash_ids[i].options & NAND_BUSWIDTH_16;
+ }
+
+ /* Check, if buswidth is correct. Hardware drivers should set
+ * this correct ! */
+ if (busw != (this->options & NAND_BUSWIDTH_16)) {
+ printk (KERN_INFO "NAND device: Manufacturer ID:"
+ " 0x%02x, Chip ID: 0x%02x (%s %s)\n", nand_maf_id, nand_dev_id,
+ nand_manuf_ids[i].name , mtd->name);
+ printk (KERN_WARNING
+ "NAND bus width %d instead %d bit\n",
+ (this->options & NAND_BUSWIDTH_16) ? 16 : 8,
+ busw ? 16 : 8);
+ this->select_chip(mtd, -1);
+ return 1;
+ }
+
+ /* Calculate the address shift from the page size */
+ this->page_shift = ffs(mtd->oobblock) - 1;
+ this->bbt_erase_shift = this->phys_erase_shift = ffs(mtd->erasesize) - 1;
+ this->chip_shift = ffs(this->chipsize) - 1;
+
+ /* Set the bad block position */
+ this->badblockpos = mtd->oobblock > 512 ?
+ NAND_LARGE_BADBLOCK_POS : NAND_SMALL_BADBLOCK_POS;
+
+ /* Get chip options, preserve non chip based options */
+ this->options &= ~NAND_CHIPOPTIONS_MSK;
+ this->options |= nand_flash_ids[i].options & NAND_CHIPOPTIONS_MSK;
+ /* Set this as a default. Board drivers can override it, if neccecary */
+ this->options |= NAND_NO_AUTOINCR;
+ /* Check if this is a not a samsung device. Do not clear the options
+ * for chips which are not having an extended id.
+ */
+ if (nand_maf_id != NAND_MFR_SAMSUNG && !nand_flash_ids[i].pagesize)
+ this->options &= ~NAND_SAMSUNG_LP_OPTIONS;
+
+ /* Check for AND chips with 4 page planes */
+ if (this->options & NAND_4PAGE_ARRAY)
+ this->erase_cmd = multi_erase_cmd;
+ else
+ this->erase_cmd = single_erase_cmd;
+
+ /* Do not replace user supplied command function ! */
+ if (mtd->oobblock > 512 && this->cmdfunc == nand_command)
+ this->cmdfunc = nand_command_lp;
+
+ /* Try to identify manufacturer */
+ for (j = 0; nand_manuf_ids[j].id != 0x0; j++) {
+ if (nand_manuf_ids[j].id == nand_maf_id)
+ break;
+ }
+ break;
+ }
+
+ if (!nand_flash_ids[i].name) {
+ printk (KERN_WARNING "No NAND device found!!!\n");
+ this->select_chip(mtd, -1);
+ return 1;
+ }
+
+ for (i=1; i < maxchips; i++) {
+ this->select_chip(mtd, i);
+
+ /* Send the command for reading device ID */
+ this->cmdfunc (mtd, NAND_CMD_READID, 0x00, -1);
+
+ /* Read manufacturer and device IDs */
+ if (nand_maf_id != this->read_byte(mtd) ||
+ nand_dev_id != this->read_byte(mtd))
+ break;
+ }
+ if (i > 1)
+ printk(KERN_INFO "%d NAND chips detected\n", i);
+
+ /* Allocate buffers, if neccecary */
+ if (!this->oob_buf) {
+ size_t len;
+ len = mtd->oobsize << (this->phys_erase_shift - this->page_shift);
+ this->oob_buf = kmalloc (len, GFP_KERNEL);
+ if (!this->oob_buf) {
+ printk (KERN_ERR "nand_scan(): Cannot allocate oob_buf\n");
+ return -ENOMEM;
+ }
+ this->options |= NAND_OOBBUF_ALLOC;
+ }
+
+ if (!this->data_buf) {
+ size_t len;
+ len = mtd->oobblock + mtd->oobsize;
+ this->data_buf = kmalloc (len, GFP_KERNEL);
+ if (!this->data_buf) {
+ if (this->options & NAND_OOBBUF_ALLOC)
+ kfree (this->oob_buf);
+ printk (KERN_ERR "nand_scan(): Cannot allocate data_buf\n");
+ return -ENOMEM;
+ }
+ this->options |= NAND_DATABUF_ALLOC;
+ }
+
+ /* Store the number of chips and calc total size for mtd */
+ this->numchips = i;
+ mtd->size = i * this->chipsize;
+ /* Convert chipsize to number of pages per chip -1. */
+ this->pagemask = (this->chipsize >> this->page_shift) - 1;
+ /* Preset the internal oob buffer */
+ memset(this->oob_buf, 0xff, mtd->oobsize << (this->phys_erase_shift - this->page_shift));
+
+ /* If no default placement scheme is given, select an
+ * appropriate one */
+ if (!this->autooob) {
+ /* Select the appropriate default oob placement scheme for
+ * placement agnostic filesystems */
+ switch (mtd->oobsize) {
+ case 8:
+ this->autooob = &nand_oob_8;
+ break;
+ case 16:
+ this->autooob = &nand_oob_16;
+ break;
+ case 64:
+ this->autooob = &nand_oob_64;
+ break;
+ default:
+ printk (KERN_WARNING "No oob scheme defined for oobsize %d\n",
+ mtd->oobsize);
+/* BUG(); */
+ }
+ }
+
+ /* The number of bytes available for the filesystem to place fs dependend
+ * oob data */
+ if (this->options & NAND_BUSWIDTH_16) {
+ mtd->oobavail = mtd->oobsize - (this->autooob->eccbytes + 2);
+ if (this->autooob->eccbytes & 0x01)
+ mtd->oobavail--;
+ } else
+ mtd->oobavail = mtd->oobsize - (this->autooob->eccbytes + 1);
+
+ /*
+ * check ECC mode, default to software
+ * if 3byte/512byte hardware ECC is selected and we have 256 byte pagesize
+ * fallback to software ECC
+ */
+ this->eccsize = 256; /* set default eccsize */
+ this->eccbytes = 3;
+
+ switch (this->eccmode) {
+ case NAND_ECC_HW12_2048:
+ if (mtd->oobblock < 2048) {
+ printk(KERN_WARNING "2048 byte HW ECC not possible on %d byte page size, fallback to SW ECC\n",
+ mtd->oobblock);
+ this->eccmode = NAND_ECC_SOFT;
+ this->calculate_ecc = nand_calculate_ecc;
+ this->correct_data = nand_correct_data;
+ } else
+ this->eccsize = 2048;
+ break;
+
+ case NAND_ECC_HW3_512:
+ case NAND_ECC_HW6_512:
+ case NAND_ECC_HW8_512:
+ if (mtd->oobblock == 256) {
+ printk (KERN_WARNING "512 byte HW ECC not possible on 256 Byte pagesize, fallback to SW ECC \n");
+ this->eccmode = NAND_ECC_SOFT;
+ this->calculate_ecc = nand_calculate_ecc;
+ this->correct_data = nand_correct_data;
+ } else
+ this->eccsize = 512; /* set eccsize to 512 */
+ break;
+
+ case NAND_ECC_HW3_256:
+ break;
+
+ case NAND_ECC_NONE:
+ printk (KERN_WARNING "NAND_ECC_NONE selected by board driver. This is not recommended !!\n");
+ this->eccmode = NAND_ECC_NONE;
+ break;
+
+ case NAND_ECC_SOFT:
+ this->calculate_ecc = nand_calculate_ecc;
+ this->correct_data = nand_correct_data;
+ break;
+
+ default:
+ printk (KERN_WARNING "Invalid NAND_ECC_MODE %d\n", this->eccmode);
+/* BUG(); */
+ }
+
+ /* Check hardware ecc function availability and adjust number of ecc bytes per
+ * calculation step
+ */
+ switch (this->eccmode) {
+ case NAND_ECC_HW12_2048:
+ this->eccbytes += 4;
+ case NAND_ECC_HW8_512:
+ this->eccbytes += 2;
+ case NAND_ECC_HW6_512:
+ this->eccbytes += 3;
+ case NAND_ECC_HW3_512:
+ case NAND_ECC_HW3_256:
+ if (this->calculate_ecc && this->correct_data && this->enable_hwecc)
+ break;
+ printk (KERN_WARNING "No ECC functions supplied, Hardware ECC not possible\n");
+/* BUG(); */
+ }
+
+ mtd->eccsize = this->eccsize;
+
+ /* Set the number of read / write steps for one page to ensure ECC generation */
+ switch (this->eccmode) {
+ case NAND_ECC_HW12_2048:
+ this->eccsteps = mtd->oobblock / 2048;
+ break;
+ case NAND_ECC_HW3_512:
+ case NAND_ECC_HW6_512:
+ case NAND_ECC_HW8_512:
+ this->eccsteps = mtd->oobblock / 512;
+ break;
+ case NAND_ECC_HW3_256:
+ case NAND_ECC_SOFT:
+ this->eccsteps = mtd->oobblock / 256;
+ break;
+
+ case NAND_ECC_NONE:
+ this->eccsteps = 1;
+ break;
+ }
+
+/* XXX U-BOOT XXX */
+#if 0
+ /* Initialize state, waitqueue and spinlock */
+ this->state = FL_READY;
+ init_waitqueue_head (&this->wq);
+ spin_lock_init (&this->chip_lock);
+#endif
+
+ /* De-select the device */
+ this->select_chip(mtd, -1);
+
+ /* Invalidate the pagebuffer reference */
+ this->pagebuf = -1;
+
+ /* Fill in remaining MTD driver data */
+ mtd->type = MTD_NANDFLASH;
+ mtd->flags = MTD_CAP_NANDFLASH | MTD_ECC;
+ mtd->ecctype = MTD_ECC_SW;
+ mtd->erase = nand_erase;
+ mtd->point = NULL;
+ mtd->unpoint = NULL;
+ mtd->read = nand_read;
+ mtd->write = nand_write;
+ mtd->read_ecc = nand_read_ecc;
+ mtd->write_ecc = nand_write_ecc;
+ mtd->read_oob = nand_read_oob;
+ mtd->write_oob = nand_write_oob;
+/* XXX U-BOOT XXX */
+#if 0
+ mtd->readv = NULL;
+ mtd->writev = nand_writev;
+ mtd->writev_ecc = nand_writev_ecc;
+#endif
+ mtd->sync = nand_sync;
+/* XXX U-BOOT XXX */
+#if 0
+ mtd->lock = NULL;
+ mtd->unlock = NULL;
+ mtd->suspend = NULL;
+ mtd->resume = NULL;
+#endif
+ mtd->block_isbad = nand_block_isbad;
+ mtd->block_markbad = nand_block_markbad;
+
+ /* and make the autooob the default one */
+ memcpy(&mtd->oobinfo, this->autooob, sizeof(mtd->oobinfo));
+/* XXX U-BOOT XXX */
+#if 0
+ mtd->owner = THIS_MODULE;
+#endif
+ /* Build bad block table */
+ return this->scan_bbt (mtd);
+}
+
+/**
+ * nand_release - [NAND Interface] Free resources held by the NAND device
+ * @mtd: MTD device structure
+ */
+void nand_release (struct mtd_info *mtd)
+{
+ struct nand_chip *this = mtd->priv;
+
+#ifdef CONFIG_MTD_PARTITIONS
+ /* Deregister partitions */
+ del_mtd_partitions (mtd);
+#endif
+ /* Deregister the device */
+/* XXX U-BOOT XXX */
+#if 0
+ del_mtd_device (mtd);
+#endif
+ /* Free bad block table memory, if allocated */
+ if (this->bbt)
+ kfree (this->bbt);
+ /* Buffer allocated by nand_scan ? */
+ if (this->options & NAND_OOBBUF_ALLOC)
+ kfree (this->oob_buf);
+ /* Buffer allocated by nand_scan ? */
+ if (this->options & NAND_DATABUF_ALLOC)
+ kfree (this->data_buf);
+}
+
+#endif
diff --git a/drivers/nand/nand_bbt.c b/drivers/nand/nand_bbt.c
new file mode 100644
index 0000000000..aaa9400e54
--- /dev/null
+++ b/drivers/nand/nand_bbt.c
@@ -0,0 +1,1052 @@
+/*
+ * drivers/mtd/nand_bbt.c
+ *
+ * Overview:
+ * Bad block table support for the NAND driver
+ *
+ * Copyright (C) 2004 Thomas Gleixner (tglx@linutronix.de)
+ *
+ * $Id: nand_bbt.c,v 1.28 2004/11/13 10:19:09 gleixner Exp $
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Description:
+ *
+ * When nand_scan_bbt is called, then it tries to find the bad block table
+ * depending on the options in the bbt descriptor(s). If a bbt is found
+ * then the contents are read and the memory based bbt is created. If a
+ * mirrored bbt is selected then the mirror is searched too and the
+ * versions are compared. If the mirror has a greater version number
+ * than the mirror bbt is used to build the memory based bbt.
+ * If the tables are not versioned, then we "or" the bad block information.
+ * If one of the bbt's is out of date or does not exist it is (re)created.
+ * If no bbt exists at all then the device is scanned for factory marked
+ * good / bad blocks and the bad block tables are created.
+ *
+ * For manufacturer created bbts like the one found on M-SYS DOC devices
+ * the bbt is searched and read but never created
+ *
+ * The autogenerated bad block table is located in the last good blocks
+ * of the device. The table is mirrored, so it can be updated eventually.
+ * The table is marked in the oob area with an ident pattern and a version
+ * number which indicates which of both tables is more up to date.
+ *
+ * The table uses 2 bits per block
+ * 11b: block is good
+ * 00b: block is factory marked bad
+ * 01b, 10b: block is marked bad due to wear
+ *
+ * The memory bad block table uses the following scheme:
+ * 00b: block is good
+ * 01b: block is marked bad due to wear
+ * 10b: block is reserved (to protect the bbt area)
+ * 11b: block is factory marked bad
+ *
+ * Multichip devices like DOC store the bad block info per floor.
+ *
+ * Following assumptions are made:
+ * - bbts start at a page boundary, if autolocated on a block boundary
+ * - the space neccecary for a bbt in FLASH does not exceed a block boundary
+ *
+ */
+
+#include <common.h>
+
+#if (CONFIG_COMMANDS & CFG_CMD_NAND) && !defined(CFG_NAND_LEGACY)
+
+#include <malloc.h>
+#include <linux/mtd/compat.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/nand.h>
+
+#include <asm/errno.h>
+
+/**
+ * check_pattern - [GENERIC] check if a pattern is in the buffer
+ * @buf: the buffer to search
+ * @len: the length of buffer to search
+ * @paglen: the pagelength
+ * @td: search pattern descriptor
+ *
+ * Check for a pattern at the given place. Used to search bad block
+ * tables and good / bad block identifiers.
+ * If the SCAN_EMPTY option is set then check, if all bytes except the
+ * pattern area contain 0xff
+ *
+*/
+static int check_pattern (uint8_t *buf, int len, int paglen, struct nand_bbt_descr *td)
+{
+ int i, end;
+ uint8_t *p = buf;
+
+ end = paglen + td->offs;
+ if (td->options & NAND_BBT_SCANEMPTY) {
+ for (i = 0; i < end; i++) {
+ if (p[i] != 0xff)
+ return -1;
+ }
+ }
+ p += end;
+
+ /* Compare the pattern */
+ for (i = 0; i < td->len; i++) {
+ if (p[i] != td->pattern[i])
+ return -1;
+ }
+
+ p += td->len;
+ end += td->len;
+ if (td->options & NAND_BBT_SCANEMPTY) {
+ for (i = end; i < len; i++) {
+ if (*p++ != 0xff)
+ return -1;
+ }
+ }
+ return 0;
+}
+
+/**
+ * read_bbt - [GENERIC] Read the bad block table starting from page
+ * @mtd: MTD device structure
+ * @buf: temporary buffer
+ * @page: the starting page
+ * @num: the number of bbt descriptors to read
+ * @bits: number of bits per block
+ * @offs: offset in the memory table
+ * @reserved_block_code: Pattern to identify reserved blocks
+ *
+ * Read the bad block table starting from page.
+ *
+ */
+static int read_bbt (struct mtd_info *mtd, uint8_t *buf, int page, int num,
+ int bits, int offs, int reserved_block_code)
+{
+ int res, i, j, act = 0;
+ struct nand_chip *this = mtd->priv;
+ size_t retlen, len, totlen;
+ loff_t from;
+ uint8_t msk = (uint8_t) ((1 << bits) - 1);
+
+ totlen = (num * bits) >> 3;
+ from = ((loff_t)page) << this->page_shift;
+
+ while (totlen) {
+ len = min (totlen, (size_t) (1 << this->bbt_erase_shift));
+ res = mtd->read_ecc (mtd, from, len, &retlen, buf, NULL, this->autooob);
+ if (res < 0) {
+ if (retlen != len) {
+ printk (KERN_INFO "nand_bbt: Error reading bad block table\n");
+ return res;
+ }
+ printk (KERN_WARNING "nand_bbt: ECC error while reading bad block table\n");
+ }
+
+ /* Analyse data */
+ for (i = 0; i < len; i++) {
+ uint8_t dat = buf[i];
+ for (j = 0; j < 8; j += bits, act += 2) {
+ uint8_t tmp = (dat >> j) & msk;
+ if (tmp == msk)
+ continue;
+ if (reserved_block_code &&
+ (tmp == reserved_block_code)) {
+ printk (KERN_DEBUG "nand_read_bbt: Reserved block at 0x%08x\n",
+ ((offs << 2) + (act >> 1)) << this->bbt_erase_shift);
+ this->bbt[offs + (act >> 3)] |= 0x2 << (act & 0x06);
+ continue;
+ }
+ /* Leave it for now, if its matured we can move this
+ * message to MTD_DEBUG_LEVEL0 */
+ printk (KERN_DEBUG "nand_read_bbt: Bad block at 0x%08x\n",
+ ((offs << 2) + (act >> 1)) << this->bbt_erase_shift);
+ /* Factory marked bad or worn out ? */
+ if (tmp == 0)
+ this->bbt[offs + (act >> 3)] |= 0x3 << (act & 0x06);
+ else
+ this->bbt[offs + (act >> 3)] |= 0x1 << (act & 0x06);
+ }
+ }
+ totlen -= len;
+ from += len;
+ }
+ return 0;
+}
+
+/**
+ * read_abs_bbt - [GENERIC] Read the bad block table starting at a given page
+ * @mtd: MTD device structure
+ * @buf: temporary buffer
+ * @td: descriptor for the bad block table
+ * @chip: read the table for a specific chip, -1 read all chips.
+ * Applies only if NAND_BBT_PERCHIP option is set
+ *
+ * Read the bad block table for all chips starting at a given page
+ * We assume that the bbt bits are in consecutive order.
+*/
+static int read_abs_bbt (struct mtd_info *mtd, uint8_t *buf, struct nand_bbt_descr *td, int chip)
+{
+ struct nand_chip *this = mtd->priv;
+ int res = 0, i;
+ int bits;
+
+ bits = td->options & NAND_BBT_NRBITS_MSK;
+ if (td->options & NAND_BBT_PERCHIP) {
+ int offs = 0;
+ for (i = 0; i < this->numchips; i++) {
+ if (chip == -1 || chip == i)
+ res = read_bbt (mtd, buf, td->pages[i], this->chipsize >> this->bbt_erase_shift, bits, offs, td->reserved_block_code);
+ if (res)
+ return res;
+ offs += this->chipsize >> (this->bbt_erase_shift + 2);
+ }
+ } else {
+ res = read_bbt (mtd, buf, td->pages[0], mtd->size >> this->bbt_erase_shift, bits, 0, td->reserved_block_code);
+ if (res)
+ return res;
+ }
+ return 0;
+}
+
+/**
+ * read_abs_bbts - [GENERIC] Read the bad block table(s) for all chips starting at a given page
+ * @mtd: MTD device structure
+ * @buf: temporary buffer
+ * @td: descriptor for the bad block table
+ * @md: descriptor for the bad block table mirror
+ *
+ * Read the bad block table(s) for all chips starting at a given page
+ * We assume that the bbt bits are in consecutive order.
+ *
+*/
+static int read_abs_bbts (struct mtd_info *mtd, uint8_t *buf, struct nand_bbt_descr *td,
+ struct nand_bbt_descr *md)
+{
+ struct nand_chip *this = mtd->priv;
+
+ /* Read the primary version, if available */
+ if (td->options & NAND_BBT_VERSION) {
+ nand_read_raw (mtd, buf, td->pages[0] << this->page_shift, mtd->oobblock, mtd->oobsize);
+ td->version[0] = buf[mtd->oobblock + td->veroffs];
+ printk (KERN_DEBUG "Bad block table at page %d, version 0x%02X\n", td->pages[0], td->version[0]);
+ }
+
+ /* Read the mirror version, if available */
+ if (md && (md->options & NAND_BBT_VERSION)) {
+ nand_read_raw (mtd, buf, md->pages[0] << this->page_shift, mtd->oobblock, mtd->oobsize);
+ md->version[0] = buf[mtd->oobblock + md->veroffs];
+ printk (KERN_DEBUG "Bad block table at page %d, version 0x%02X\n", md->pages[0], md->version[0]);
+ }
+
+ return 1;
+}
+
+/**
+ * create_bbt - [GENERIC] Create a bad block table by scanning the device
+ * @mtd: MTD device structure
+ * @buf: temporary buffer
+ * @bd: descriptor for the good/bad block search pattern
+ * @chip: create the table for a specific chip, -1 read all chips.
+ * Applies only if NAND_BBT_PERCHIP option is set
+ *
+ * Create a bad block table by scanning the device
+ * for the given good/bad block identify pattern
+ */
+static void create_bbt (struct mtd_info *mtd, uint8_t *buf, struct nand_bbt_descr *bd, int chip)
+{
+ struct nand_chip *this = mtd->priv;
+ int i, j, numblocks, len, scanlen;
+ int startblock;
+ loff_t from;
+ size_t readlen, ooblen;
+
+ if (bd->options & NAND_BBT_SCANALLPAGES)
+ len = 1 << (this->bbt_erase_shift - this->page_shift);
+ else {
+ if (bd->options & NAND_BBT_SCAN2NDPAGE)
+ len = 2;
+ else
+ len = 1;
+ }
+ scanlen = mtd->oobblock + mtd->oobsize;
+ readlen = len * mtd->oobblock;
+ ooblen = len * mtd->oobsize;
+
+ if (chip == -1) {
+ /* Note that numblocks is 2 * (real numblocks) here, see i+=2 below as it
+ * makes shifting and masking less painful */
+ numblocks = mtd->size >> (this->bbt_erase_shift - 1);
+ startblock = 0;
+ from = 0;
+ } else {
+ if (chip >= this->numchips) {
+ printk (KERN_WARNING "create_bbt(): chipnr (%d) > available chips (%d)\n",
+ chip + 1, this->numchips);
+ return;
+ }
+ numblocks = this->chipsize >> (this->bbt_erase_shift - 1);
+ startblock = chip * numblocks;
+ numblocks += startblock;
+ from = startblock << (this->bbt_erase_shift - 1);
+ }
+
+ for (i = startblock; i < numblocks;) {
+ nand_read_raw (mtd, buf, from, readlen, ooblen);
+ for (j = 0; j < len; j++) {
+ if (check_pattern (&buf[j * scanlen], scanlen, mtd->oobblock, bd)) {
+ this->bbt[i >> 3] |= 0x03 << (i & 0x6);
+ break;
+ }
+ }
+ i += 2;
+ from += (1 << this->bbt_erase_shift);
+ }
+}
+
+/**
+ * search_bbt - [GENERIC] scan the device for a specific bad block table
+ * @mtd: MTD device structure
+ * @buf: temporary buffer
+ * @td: descriptor for the bad block table
+ *
+ * Read the bad block table by searching for a given ident pattern.
+ * Search is preformed either from the beginning up or from the end of
+ * the device downwards. The search starts always at the start of a
+ * block.
+ * If the option NAND_BBT_PERCHIP is given, each chip is searched
+ * for a bbt, which contains the bad block information of this chip.
+ * This is neccecary to provide support for certain DOC devices.
+ *
+ * The bbt ident pattern resides in the oob area of the first page
+ * in a block.
+ */
+static int search_bbt (struct mtd_info *mtd, uint8_t *buf, struct nand_bbt_descr *td)
+{
+ struct nand_chip *this = mtd->priv;
+ int i, chips;
+ int bits, startblock, block, dir;
+ int scanlen = mtd->oobblock + mtd->oobsize;
+ int bbtblocks;
+
+ /* Search direction top -> down ? */
+ if (td->options & NAND_BBT_LASTBLOCK) {
+ startblock = (mtd->size >> this->bbt_erase_shift) -1;
+ dir = -1;
+ } else {
+ startblock = 0;
+ dir = 1;
+ }
+
+ /* Do we have a bbt per chip ? */
+ if (td->options & NAND_BBT_PERCHIP) {
+ chips = this->numchips;
+ bbtblocks = this->chipsize >> this->bbt_erase_shift;
+ startblock &= bbtblocks - 1;
+ } else {
+ chips = 1;
+ bbtblocks = mtd->size >> this->bbt_erase_shift;
+ }
+
+ /* Number of bits for each erase block in the bbt */
+ bits = td->options & NAND_BBT_NRBITS_MSK;
+
+ for (i = 0; i < chips; i++) {
+ /* Reset version information */
+ td->version[i] = 0;
+ td->pages[i] = -1;
+ /* Scan the maximum number of blocks */
+ for (block = 0; block < td->maxblocks; block++) {
+ int actblock = startblock + dir * block;
+ /* Read first page */
+ nand_read_raw (mtd, buf, actblock << this->bbt_erase_shift, mtd->oobblock, mtd->oobsize);
+ if (!check_pattern(buf, scanlen, mtd->oobblock, td)) {
+ td->pages[i] = actblock << (this->bbt_erase_shift - this->page_shift);
+ if (td->options & NAND_BBT_VERSION) {
+ td->version[i] = buf[mtd->oobblock + td->veroffs];
+ }
+ break;
+ }
+ }
+ startblock += this->chipsize >> this->bbt_erase_shift;
+ }
+ /* Check, if we found a bbt for each requested chip */
+ for (i = 0; i < chips; i++) {
+ if (td->pages[i] == -1)
+ printk (KERN_WARNING "Bad block table not found for chip %d\n", i);
+ else
+ printk (KERN_DEBUG "Bad block table found at page %d, version 0x%02X\n", td->pages[i], td->version[i]);
+ }
+ return 0;
+}
+
+/**
+ * search_read_bbts - [GENERIC] scan the device for bad block table(s)
+ * @mtd: MTD device structure
+ * @buf: temporary buffer
+ * @td: descriptor for the bad block table
+ * @md: descriptor for the bad block table mirror
+ *
+ * Search and read the bad block table(s)
+*/
+static int search_read_bbts (struct mtd_info *mtd, uint8_t *buf,
+ struct nand_bbt_descr *td, struct nand_bbt_descr *md)
+{
+ /* Search the primary table */
+ search_bbt (mtd, buf, td);
+
+ /* Search the mirror table */
+ if (md)
+ search_bbt (mtd, buf, md);
+
+ /* Force result check */
+ return 1;
+}
+
+
+/**
+ * write_bbt - [GENERIC] (Re)write the bad block table
+ *
+ * @mtd: MTD device structure
+ * @buf: temporary buffer
+ * @td: descriptor for the bad block table
+ * @md: descriptor for the bad block table mirror
+ * @chipsel: selector for a specific chip, -1 for all
+ *
+ * (Re)write the bad block table
+ *
+*/
+static int write_bbt (struct mtd_info *mtd, uint8_t *buf,
+ struct nand_bbt_descr *td, struct nand_bbt_descr *md, int chipsel)
+{
+ struct nand_chip *this = mtd->priv;
+ struct nand_oobinfo oobinfo;
+ struct erase_info einfo;
+ int i, j, res, chip = 0;
+ int bits, startblock, dir, page, offs, numblocks, sft, sftmsk;
+ int nrchips, bbtoffs, pageoffs;
+ uint8_t msk[4];
+ uint8_t rcode = td->reserved_block_code;
+ size_t retlen, len = 0;
+ loff_t to;
+
+ if (!rcode)
+ rcode = 0xff;
+ /* Write bad block table per chip rather than per device ? */
+ if (td->options & NAND_BBT_PERCHIP) {
+ numblocks = (int) (this->chipsize >> this->bbt_erase_shift);
+ /* Full device write or specific chip ? */
+ if (chipsel == -1) {
+ nrchips = this->numchips;
+ } else {
+ nrchips = chipsel + 1;
+ chip = chipsel;
+ }
+ } else {
+ numblocks = (int) (mtd->size >> this->bbt_erase_shift);
+ nrchips = 1;
+ }
+
+ /* Loop through the chips */
+ for (; chip < nrchips; chip++) {
+
+ /* There was already a version of the table, reuse the page
+ * This applies for absolute placement too, as we have the
+ * page nr. in td->pages.
+ */
+ if (td->pages[chip] != -1) {
+ page = td->pages[chip];
+ goto write;
+ }
+
+ /* Automatic placement of the bad block table */
+ /* Search direction top -> down ? */
+ if (td->options & NAND_BBT_LASTBLOCK) {
+ startblock = numblocks * (chip + 1) - 1;
+ dir = -1;
+ } else {
+ startblock = chip * numblocks;
+ dir = 1;
+ }
+
+ for (i = 0; i < td->maxblocks; i++) {
+ int block = startblock + dir * i;
+ /* Check, if the block is bad */
+ switch ((this->bbt[block >> 2] >> (2 * (block & 0x03))) & 0x03) {
+ case 0x01:
+ case 0x03:
+ continue;
+ }
+ page = block << (this->bbt_erase_shift - this->page_shift);
+ /* Check, if the block is used by the mirror table */
+ if (!md || md->pages[chip] != page)
+ goto write;
+ }
+ printk (KERN_ERR "No space left to write bad block table\n");
+ return -ENOSPC;
+write:
+
+ /* Set up shift count and masks for the flash table */
+ bits = td->options & NAND_BBT_NRBITS_MSK;
+ switch (bits) {
+ case 1: sft = 3; sftmsk = 0x07; msk[0] = 0x00; msk[1] = 0x01; msk[2] = ~rcode; msk[3] = 0x01; break;
+ case 2: sft = 2; sftmsk = 0x06; msk[0] = 0x00; msk[1] = 0x01; msk[2] = ~rcode; msk[3] = 0x03; break;
+ case 4: sft = 1; sftmsk = 0x04; msk[0] = 0x00; msk[1] = 0x0C; msk[2] = ~rcode; msk[3] = 0x0f; break;
+ case 8: sft = 0; sftmsk = 0x00; msk[0] = 0x00; msk[1] = 0x0F; msk[2] = ~rcode; msk[3] = 0xff; break;
+ default: return -EINVAL;
+ }
+
+ bbtoffs = chip * (numblocks >> 2);
+
+ to = ((loff_t) page) << this->page_shift;
+
+ memcpy (&oobinfo, this->autooob, sizeof(oobinfo));
+ oobinfo.useecc = MTD_NANDECC_PLACEONLY;
+
+ /* Must we save the block contents ? */
+ if (td->options & NAND_BBT_SAVECONTENT) {
+ /* Make it block aligned */
+ to &= ~((loff_t) ((1 << this->bbt_erase_shift) - 1));
+ len = 1 << this->bbt_erase_shift;
+ res = mtd->read_ecc (mtd, to, len, &retlen, buf, &buf[len], &oobinfo);
+ if (res < 0) {
+ if (retlen != len) {
+ printk (KERN_INFO "nand_bbt: Error reading block for writing the bad block table\n");
+ return res;
+ }
+ printk (KERN_WARNING "nand_bbt: ECC error while reading block for writing bad block table\n");
+ }
+ /* Calc the byte offset in the buffer */
+ pageoffs = page - (int)(to >> this->page_shift);
+ offs = pageoffs << this->page_shift;
+ /* Preset the bbt area with 0xff */
+ memset (&buf[offs], 0xff, (size_t)(numblocks >> sft));
+ /* Preset the bbt's oob area with 0xff */
+ memset (&buf[len + pageoffs * mtd->oobsize], 0xff,
+ ((len >> this->page_shift) - pageoffs) * mtd->oobsize);
+ if (td->options & NAND_BBT_VERSION) {
+ buf[len + (pageoffs * mtd->oobsize) + td->veroffs] = td->version[chip];
+ }
+ } else {
+ /* Calc length */
+ len = (size_t) (numblocks >> sft);
+ /* Make it page aligned ! */
+ len = (len + (mtd->oobblock-1)) & ~(mtd->oobblock-1);
+ /* Preset the buffer with 0xff */
+ memset (buf, 0xff, len + (len >> this->page_shift) * mtd->oobsize);
+ offs = 0;
+ /* Pattern is located in oob area of first page */
+ memcpy (&buf[len + td->offs], td->pattern, td->len);
+ if (td->options & NAND_BBT_VERSION) {
+ buf[len + td->veroffs] = td->version[chip];
+ }
+ }
+
+ /* walk through the memory table */
+ for (i = 0; i < numblocks; ) {
+ uint8_t dat;
+ dat = this->bbt[bbtoffs + (i >> 2)];
+ for (j = 0; j < 4; j++ , i++) {
+ int sftcnt = (i << (3 - sft)) & sftmsk;
+ /* Do not store the reserved bbt blocks ! */
+ buf[offs + (i >> sft)] &= ~(msk[dat & 0x03] << sftcnt);
+ dat >>= 2;
+ }
+ }
+
+ memset (&einfo, 0, sizeof (einfo));
+ einfo.mtd = mtd;
+ einfo.addr = (unsigned long) to;
+ einfo.len = 1 << this->bbt_erase_shift;
+ res = nand_erase_nand (mtd, &einfo, 1);
+ if (res < 0) {
+ printk (KERN_WARNING "nand_bbt: Error during block erase: %d\n", res);
+ return res;
+ }
+
+ res = mtd->write_ecc (mtd, to, len, &retlen, buf, &buf[len], &oobinfo);
+ if (res < 0) {
+ printk (KERN_WARNING "nand_bbt: Error while writing bad block table %d\n", res);
+ return res;
+ }
+ printk (KERN_DEBUG "Bad block table written to 0x%08x, version 0x%02X\n",
+ (unsigned int) to, td->version[chip]);
+
+ /* Mark it as used */
+ td->pages[chip] = page;
+ }
+ return 0;
+}
+
+/**
+ * nand_memory_bbt - [GENERIC] create a memory based bad block table
+ * @mtd: MTD device structure
+ * @bd: descriptor for the good/bad block search pattern
+ *
+ * The function creates a memory based bbt by scanning the device
+ * for manufacturer / software marked good / bad blocks
+*/
+static int nand_memory_bbt (struct mtd_info *mtd, struct nand_bbt_descr *bd)
+{
+ struct nand_chip *this = mtd->priv;
+
+ /* Ensure that we only scan for the pattern and nothing else */
+ bd->options = 0;
+ create_bbt (mtd, this->data_buf, bd, -1);
+ return 0;
+}
+
+/**
+ * check_create - [GENERIC] create and write bbt(s) if neccecary
+ * @mtd: MTD device structure
+ * @buf: temporary buffer
+ * @bd: descriptor for the good/bad block search pattern
+ *
+ * The function checks the results of the previous call to read_bbt
+ * and creates / updates the bbt(s) if neccecary
+ * Creation is neccecary if no bbt was found for the chip/device
+ * Update is neccecary if one of the tables is missing or the
+ * version nr. of one table is less than the other
+*/
+static int check_create (struct mtd_info *mtd, uint8_t *buf, struct nand_bbt_descr *bd)
+{
+ int i, chips, writeops, chipsel, res;
+ struct nand_chip *this = mtd->priv;
+ struct nand_bbt_descr *td = this->bbt_td;
+ struct nand_bbt_descr *md = this->bbt_md;
+ struct nand_bbt_descr *rd, *rd2;
+
+ /* Do we have a bbt per chip ? */
+ if (td->options & NAND_BBT_PERCHIP)
+ chips = this->numchips;
+ else
+ chips = 1;
+
+ for (i = 0; i < chips; i++) {
+ writeops = 0;
+ rd = NULL;
+ rd2 = NULL;
+ /* Per chip or per device ? */
+ chipsel = (td->options & NAND_BBT_PERCHIP) ? i : -1;
+ /* Mirrored table avilable ? */
+ if (md) {
+ if (td->pages[i] == -1 && md->pages[i] == -1) {
+ writeops = 0x03;
+ goto create;
+ }
+
+ if (td->pages[i] == -1) {
+ rd = md;
+ td->version[i] = md->version[i];
+ writeops = 1;
+ goto writecheck;
+ }
+
+ if (md->pages[i] == -1) {
+ rd = td;
+ md->version[i] = td->version[i];
+ writeops = 2;
+ goto writecheck;
+ }
+
+ if (td->version[i] == md->version[i]) {
+ rd = td;
+ if (!(td->options & NAND_BBT_VERSION))
+ rd2 = md;
+ goto writecheck;
+ }
+
+ if (((int8_t) (td->version[i] - md->version[i])) > 0) {
+ rd = td;
+ md->version[i] = td->version[i];
+ writeops = 2;
+ } else {
+ rd = md;
+ td->version[i] = md->version[i];
+ writeops = 1;
+ }
+
+ goto writecheck;
+
+ } else {
+ if (td->pages[i] == -1) {
+ writeops = 0x01;
+ goto create;
+ }
+ rd = td;
+ goto writecheck;
+ }
+create:
+ /* Create the bad block table by scanning the device ? */
+ if (!(td->options & NAND_BBT_CREATE))
+ continue;
+
+ /* Create the table in memory by scanning the chip(s) */
+ create_bbt (mtd, buf, bd, chipsel);
+
+ td->version[i] = 1;
+ if (md)
+ md->version[i] = 1;
+writecheck:
+ /* read back first ? */
+ if (rd)
+ read_abs_bbt (mtd, buf, rd, chipsel);
+ /* If they weren't versioned, read both. */
+ if (rd2)
+ read_abs_bbt (mtd, buf, rd2, chipsel);
+
+ /* Write the bad block table to the device ? */
+ if ((writeops & 0x01) && (td->options & NAND_BBT_WRITE)) {
+ res = write_bbt (mtd, buf, td, md, chipsel);
+ if (res < 0)
+ return res;
+ }
+
+ /* Write the mirror bad block table to the device ? */
+ if ((writeops & 0x02) && md && (md->options & NAND_BBT_WRITE)) {
+ res = write_bbt (mtd, buf, md, td, chipsel);
+ if (res < 0)
+ return res;
+ }
+ }
+ return 0;
+}
+
+/**
+ * mark_bbt_regions - [GENERIC] mark the bad block table regions
+ * @mtd: MTD device structure
+ * @td: bad block table descriptor
+ *
+ * The bad block table regions are marked as "bad" to prevent
+ * accidental erasures / writes. The regions are identified by
+ * the mark 0x02.
+*/
+static void mark_bbt_region (struct mtd_info *mtd, struct nand_bbt_descr *td)
+{
+ struct nand_chip *this = mtd->priv;
+ int i, j, chips, block, nrblocks, update;
+ uint8_t oldval, newval;
+
+ /* Do we have a bbt per chip ? */
+ if (td->options & NAND_BBT_PERCHIP) {
+ chips = this->numchips;
+ nrblocks = (int)(this->chipsize >> this->bbt_erase_shift);
+ } else {
+ chips = 1;
+ nrblocks = (int)(mtd->size >> this->bbt_erase_shift);
+ }
+
+ for (i = 0; i < chips; i++) {
+ if ((td->options & NAND_BBT_ABSPAGE) ||
+ !(td->options & NAND_BBT_WRITE)) {
+ if (td->pages[i] == -1) continue;
+ block = td->pages[i] >> (this->bbt_erase_shift - this->page_shift);
+ block <<= 1;
+ oldval = this->bbt[(block >> 3)];
+ newval = oldval | (0x2 << (block & 0x06));
+ this->bbt[(block >> 3)] = newval;
+ if ((oldval != newval) && td->reserved_block_code)
+ nand_update_bbt(mtd, block << (this->bbt_erase_shift - 1));
+ continue;
+ }
+ update = 0;
+ if (td->options & NAND_BBT_LASTBLOCK)
+ block = ((i + 1) * nrblocks) - td->maxblocks;
+ else
+ block = i * nrblocks;
+ block <<= 1;
+ for (j = 0; j < td->maxblocks; j++) {
+ oldval = this->bbt[(block >> 3)];
+ newval = oldval | (0x2 << (block & 0x06));
+ this->bbt[(block >> 3)] = newval;
+ if (oldval != newval) update = 1;
+ block += 2;
+ }
+ /* If we want reserved blocks to be recorded to flash, and some
+ new ones have been marked, then we need to update the stored
+ bbts. This should only happen once. */
+ if (update && td->reserved_block_code)
+ nand_update_bbt(mtd, (block - 2) << (this->bbt_erase_shift - 1));
+ }
+}
+
+/**
+ * nand_scan_bbt - [NAND Interface] scan, find, read and maybe create bad block table(s)
+ * @mtd: MTD device structure
+ * @bd: descriptor for the good/bad block search pattern
+ *
+ * The function checks, if a bad block table(s) is/are already
+ * available. If not it scans the device for manufacturer
+ * marked good / bad blocks and writes the bad block table(s) to
+ * the selected place.
+ *
+ * The bad block table memory is allocated here. It must be freed
+ * by calling the nand_free_bbt function.
+ *
+*/
+int nand_scan_bbt (struct mtd_info *mtd, struct nand_bbt_descr *bd)
+{
+ struct nand_chip *this = mtd->priv;
+ int len, res = 0;
+ uint8_t *buf;
+ struct nand_bbt_descr *td = this->bbt_td;
+ struct nand_bbt_descr *md = this->bbt_md;
+
+ len = mtd->size >> (this->bbt_erase_shift + 2);
+ /* Allocate memory (2bit per block) */
+ this->bbt = kmalloc (len, GFP_KERNEL);
+ if (!this->bbt) {
+ printk (KERN_ERR "nand_scan_bbt: Out of memory\n");
+ return -ENOMEM;
+ }
+ /* Clear the memory bad block table */
+ memset (this->bbt, 0x00, len);
+
+ /* If no primary table decriptor is given, scan the device
+ * to build a memory based bad block table
+ */
+ if (!td)
+ return nand_memory_bbt(mtd, bd);
+
+ /* Allocate a temporary buffer for one eraseblock incl. oob */
+ len = (1 << this->bbt_erase_shift);
+ len += (len >> this->page_shift) * mtd->oobsize;
+ buf = kmalloc (len, GFP_KERNEL);
+ if (!buf) {
+ printk (KERN_ERR "nand_bbt: Out of memory\n");
+ kfree (this->bbt);
+ this->bbt = NULL;
+ return -ENOMEM;
+ }
+
+ /* Is the bbt at a given page ? */
+ if (td->options & NAND_BBT_ABSPAGE) {
+ res = read_abs_bbts (mtd, buf, td, md);
+ } else {
+ /* Search the bad block table using a pattern in oob */
+ res = search_read_bbts (mtd, buf, td, md);
+ }
+
+ if (res)
+ res = check_create (mtd, buf, bd);
+
+ /* Prevent the bbt regions from erasing / writing */
+ mark_bbt_region (mtd, td);
+ if (md)
+ mark_bbt_region (mtd, md);
+
+ kfree (buf);
+ return res;
+}
+
+
+/**
+ * nand_update_bbt - [NAND Interface] update bad block table(s)
+ * @mtd: MTD device structure
+ * @offs: the offset of the newly marked block
+ *
+ * The function updates the bad block table(s)
+*/
+int nand_update_bbt (struct mtd_info *mtd, loff_t offs)
+{
+ struct nand_chip *this = mtd->priv;
+ int len, res = 0, writeops = 0;
+ int chip, chipsel;
+ uint8_t *buf;
+ struct nand_bbt_descr *td = this->bbt_td;
+ struct nand_bbt_descr *md = this->bbt_md;
+
+ if (!this->bbt || !td)
+ return -EINVAL;
+
+ len = mtd->size >> (this->bbt_erase_shift + 2);
+ /* Allocate a temporary buffer for one eraseblock incl. oob */
+ len = (1 << this->bbt_erase_shift);
+ len += (len >> this->page_shift) * mtd->oobsize;
+ buf = kmalloc (len, GFP_KERNEL);
+ if (!buf) {
+ printk (KERN_ERR "nand_update_bbt: Out of memory\n");
+ return -ENOMEM;
+ }
+
+ writeops = md != NULL ? 0x03 : 0x01;
+
+ /* Do we have a bbt per chip ? */
+ if (td->options & NAND_BBT_PERCHIP) {
+ chip = (int) (offs >> this->chip_shift);
+ chipsel = chip;
+ } else {
+ chip = 0;
+ chipsel = -1;
+ }
+
+ td->version[chip]++;
+ if (md)
+ md->version[chip]++;
+
+ /* Write the bad block table to the device ? */
+ if ((writeops & 0x01) && (td->options & NAND_BBT_WRITE)) {
+ res = write_bbt (mtd, buf, td, md, chipsel);
+ if (res < 0)
+ goto out;
+ }
+ /* Write the mirror bad block table to the device ? */
+ if ((writeops & 0x02) && md && (md->options & NAND_BBT_WRITE)) {
+ res = write_bbt (mtd, buf, md, td, chipsel);
+ }
+
+out:
+ kfree (buf);
+ return res;
+}
+
+/* Define some generic bad / good block scan pattern which are used
+ * while scanning a device for factory marked good / bad blocks
+ *
+ * The memory based patterns just
+ */
+static uint8_t scan_ff_pattern[] = { 0xff, 0xff };
+
+static struct nand_bbt_descr smallpage_memorybased = {
+ .options = 0,
+ .offs = 5,
+ .len = 1,
+ .pattern = scan_ff_pattern
+};
+
+static struct nand_bbt_descr largepage_memorybased = {
+ .options = 0,
+ .offs = 0,
+ .len = 2,
+ .pattern = scan_ff_pattern
+};
+
+static struct nand_bbt_descr smallpage_flashbased = {
+ .options = NAND_BBT_SCANEMPTY | NAND_BBT_SCANALLPAGES,
+ .offs = 5,
+ .len = 1,
+ .pattern = scan_ff_pattern
+};
+
+static struct nand_bbt_descr largepage_flashbased = {
+ .options = NAND_BBT_SCANEMPTY | NAND_BBT_SCANALLPAGES,
+ .offs = 0,
+ .len = 2,
+ .pattern = scan_ff_pattern
+};
+
+static uint8_t scan_agand_pattern[] = { 0x1C, 0x71, 0xC7, 0x1C, 0x71, 0xC7 };
+
+static struct nand_bbt_descr agand_flashbased = {
+ .options = NAND_BBT_SCANEMPTY | NAND_BBT_SCANALLPAGES,
+ .offs = 0x20,
+ .len = 6,
+ .pattern = scan_agand_pattern
+};
+
+/* Generic flash bbt decriptors
+*/
+static uint8_t bbt_pattern[] = {'B', 'b', 't', '0' };
+static uint8_t mirror_pattern[] = {'1', 't', 'b', 'B' };
+
+static struct nand_bbt_descr bbt_main_descr = {
+ .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | NAND_BBT_WRITE
+ | NAND_BBT_2BIT | NAND_BBT_VERSION | NAND_BBT_PERCHIP,
+ .offs = 8,
+ .len = 4,
+ .veroffs = 12,
+ .maxblocks = 4,
+ .pattern = bbt_pattern
+};
+
+static struct nand_bbt_descr bbt_mirror_descr = {
+ .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | NAND_BBT_WRITE
+ | NAND_BBT_2BIT | NAND_BBT_VERSION | NAND_BBT_PERCHIP,
+ .offs = 8,
+ .len = 4,
+ .veroffs = 12,
+ .maxblocks = 4,
+ .pattern = mirror_pattern
+};
+
+/**
+ * nand_default_bbt - [NAND Interface] Select a default bad block table for the device
+ * @mtd: MTD device structure
+ *
+ * This function selects the default bad block table
+ * support for the device and calls the nand_scan_bbt function
+ *
+*/
+int nand_default_bbt (struct mtd_info *mtd)
+{
+ struct nand_chip *this = mtd->priv;
+
+ /* Default for AG-AND. We must use a flash based
+ * bad block table as the devices have factory marked
+ * _good_ blocks. Erasing those blocks leads to loss
+ * of the good / bad information, so we _must_ store
+ * this information in a good / bad table during
+ * startup
+ */
+ if (this->options & NAND_IS_AND) {
+ /* Use the default pattern descriptors */
+ if (!this->bbt_td) {
+ this->bbt_td = &bbt_main_descr;
+ this->bbt_md = &bbt_mirror_descr;
+ }
+ this->options |= NAND_USE_FLASH_BBT;
+ return nand_scan_bbt (mtd, &agand_flashbased);
+ }
+
+
+ /* Is a flash based bad block table requested ? */
+ if (this->options & NAND_USE_FLASH_BBT) {
+ /* Use the default pattern descriptors */
+ if (!this->bbt_td) {
+ this->bbt_td = &bbt_main_descr;
+ this->bbt_md = &bbt_mirror_descr;
+ }
+ if (!this->badblock_pattern) {
+ this->badblock_pattern = (mtd->oobblock > 512) ?
+ &largepage_flashbased : &smallpage_flashbased;
+ }
+ } else {
+ this->bbt_td = NULL;
+ this->bbt_md = NULL;
+ if (!this->badblock_pattern) {
+ this->badblock_pattern = (mtd->oobblock > 512) ?
+ &largepage_memorybased : &smallpage_memorybased;
+ }
+ }
+ return nand_scan_bbt (mtd, this->badblock_pattern);
+}
+
+/**
+ * nand_isbad_bbt - [NAND Interface] Check if a block is bad
+ * @mtd: MTD device structure
+ * @offs: offset in the device
+ * @allowbbt: allow access to bad block table region
+ *
+ */
+int nand_isbad_bbt (struct mtd_info *mtd, loff_t offs, int allowbbt)
+{
+ struct nand_chip *this = mtd->priv;
+ int block;
+ uint8_t res;
+
+ /* Get block number * 2 */
+ block = (int) (offs >> (this->bbt_erase_shift - 1));
+ res = (this->bbt[block >> 3] >> (block & 0x06)) & 0x03;
+
+ DEBUG (MTD_DEBUG_LEVEL2, "nand_isbad_bbt(): bbt info for offs 0x%08x: (block %d) 0x%02x\n",
+ (unsigned int)offs, res, block >> 1);
+
+ switch ((int)res) {
+ case 0x00: return 0;
+ case 0x01: return 1;
+ case 0x02: return allowbbt ? 0 : 1;
+ }
+ return 1;
+}
+
+#endif
diff --git a/drivers/nand/nand_ecc.c b/drivers/nand/nand_ecc.c
new file mode 100644
index 0000000000..f33be9655d
--- /dev/null
+++ b/drivers/nand/nand_ecc.c
@@ -0,0 +1,244 @@
+/*
+ * This file contains an ECC algorithm from Toshiba that detects and
+ * corrects 1 bit errors in a 256 byte block of data.
+ *
+ * drivers/mtd/nand/nand_ecc.c
+ *
+ * Copyright (C) 2000-2004 Steven J. Hill (sjhill@realitydiluted.com)
+ * Toshiba America Electronics Components, Inc.
+ *
+ * $Id: nand_ecc.c,v 1.14 2004/06/16 15:34:37 gleixner Exp $
+ *
+ * This file is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 or (at your option) any
+ * later version.
+ *
+ * This file is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this file; if not, write to the Free Software Foundation, Inc.,
+ * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+ *
+ * As a special exception, if other files instantiate templates or use
+ * macros or inline functions from these files, or you compile these
+ * files and link them with other works to produce a work based on these
+ * files, these files do not by themselves cause the resulting work to be
+ * covered by the GNU General Public License. However the source code for
+ * these files must still be made available in accordance with section (3)
+ * of the GNU General Public License.
+ *
+ * This exception does not invalidate any other reasons why a work based on
+ * this file might be covered by the GNU General Public License.
+ */
+
+#include <common.h>
+
+#if (CONFIG_COMMANDS & CFG_CMD_NAND) && !defined(CFG_NAND_LEGACY)
+
+#include<linux/mtd/mtd.h>
+/*
+ * Pre-calculated 256-way 1 byte column parity
+ */
+static const u_char nand_ecc_precalc_table[] = {
+ 0x00, 0x55, 0x56, 0x03, 0x59, 0x0c, 0x0f, 0x5a, 0x5a, 0x0f, 0x0c, 0x59, 0x03, 0x56, 0x55, 0x00,
+ 0x65, 0x30, 0x33, 0x66, 0x3c, 0x69, 0x6a, 0x3f, 0x3f, 0x6a, 0x69, 0x3c, 0x66, 0x33, 0x30, 0x65,
+ 0x66, 0x33, 0x30, 0x65, 0x3f, 0x6a, 0x69, 0x3c, 0x3c, 0x69, 0x6a, 0x3f, 0x65, 0x30, 0x33, 0x66,
+ 0x03, 0x56, 0x55, 0x00, 0x5a, 0x0f, 0x0c, 0x59, 0x59, 0x0c, 0x0f, 0x5a, 0x00, 0x55, 0x56, 0x03,
+ 0x69, 0x3c, 0x3f, 0x6a, 0x30, 0x65, 0x66, 0x33, 0x33, 0x66, 0x65, 0x30, 0x6a, 0x3f, 0x3c, 0x69,
+ 0x0c, 0x59, 0x5a, 0x0f, 0x55, 0x00, 0x03, 0x56, 0x56, 0x03, 0x00, 0x55, 0x0f, 0x5a, 0x59, 0x0c,
+ 0x0f, 0x5a, 0x59, 0x0c, 0x56, 0x03, 0x00, 0x55, 0x55, 0x00, 0x03, 0x56, 0x0c, 0x59, 0x5a, 0x0f,
+ 0x6a, 0x3f, 0x3c, 0x69, 0x33, 0x66, 0x65, 0x30, 0x30, 0x65, 0x66, 0x33, 0x69, 0x3c, 0x3f, 0x6a,
+ 0x6a, 0x3f, 0x3c, 0x69, 0x33, 0x66, 0x65, 0x30, 0x30, 0x65, 0x66, 0x33, 0x69, 0x3c, 0x3f, 0x6a,
+ 0x0f, 0x5a, 0x59, 0x0c, 0x56, 0x03, 0x00, 0x55, 0x55, 0x00, 0x03, 0x56, 0x0c, 0x59, 0x5a, 0x0f,
+ 0x0c, 0x59, 0x5a, 0x0f, 0x55, 0x00, 0x03, 0x56, 0x56, 0x03, 0x00, 0x55, 0x0f, 0x5a, 0x59, 0x0c,
+ 0x69, 0x3c, 0x3f, 0x6a, 0x30, 0x65, 0x66, 0x33, 0x33, 0x66, 0x65, 0x30, 0x6a, 0x3f, 0x3c, 0x69,
+ 0x03, 0x56, 0x55, 0x00, 0x5a, 0x0f, 0x0c, 0x59, 0x59, 0x0c, 0x0f, 0x5a, 0x00, 0x55, 0x56, 0x03,
+ 0x66, 0x33, 0x30, 0x65, 0x3f, 0x6a, 0x69, 0x3c, 0x3c, 0x69, 0x6a, 0x3f, 0x65, 0x30, 0x33, 0x66,
+ 0x65, 0x30, 0x33, 0x66, 0x3c, 0x69, 0x6a, 0x3f, 0x3f, 0x6a, 0x69, 0x3c, 0x66, 0x33, 0x30, 0x65,
+ 0x00, 0x55, 0x56, 0x03, 0x59, 0x0c, 0x0f, 0x5a, 0x5a, 0x0f, 0x0c, 0x59, 0x03, 0x56, 0x55, 0x00
+};
+
+
+/**
+ * nand_trans_result - [GENERIC] create non-inverted ECC
+ * @reg2: line parity reg 2
+ * @reg3: line parity reg 3
+ * @ecc_code: ecc
+ *
+ * Creates non-inverted ECC code from line parity
+ */
+static void nand_trans_result(u_char reg2, u_char reg3,
+ u_char *ecc_code)
+{
+ u_char a, b, i, tmp1, tmp2;
+
+ /* Initialize variables */
+ a = b = 0x80;
+ tmp1 = tmp2 = 0;
+
+ /* Calculate first ECC byte */
+ for (i = 0; i < 4; i++) {
+ if (reg3 & a) /* LP15,13,11,9 --> ecc_code[0] */
+ tmp1 |= b;
+ b >>= 1;
+ if (reg2 & a) /* LP14,12,10,8 --> ecc_code[0] */
+ tmp1 |= b;
+ b >>= 1;
+ a >>= 1;
+ }
+
+ /* Calculate second ECC byte */
+ b = 0x80;
+ for (i = 0; i < 4; i++) {
+ if (reg3 & a) /* LP7,5,3,1 --> ecc_code[1] */
+ tmp2 |= b;
+ b >>= 1;
+ if (reg2 & a) /* LP6,4,2,0 --> ecc_code[1] */
+ tmp2 |= b;
+ b >>= 1;
+ a >>= 1;
+ }
+
+ /* Store two of the ECC bytes */
+ ecc_code[0] = tmp1;
+ ecc_code[1] = tmp2;
+}
+
+/**
+ * nand_calculate_ecc - [NAND Interface] Calculate 3 byte ECC code for 256 byte block
+ * @mtd: MTD block structure
+ * @dat: raw data
+ * @ecc_code: buffer for ECC
+ */
+int nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat, u_char *ecc_code)
+{
+ u_char idx, reg1, reg2, reg3;
+ int j;
+
+ /* Initialize variables */
+ reg1 = reg2 = reg3 = 0;
+ ecc_code[0] = ecc_code[1] = ecc_code[2] = 0;
+
+ /* Build up column parity */
+ for(j = 0; j < 256; j++) {
+
+ /* Get CP0 - CP5 from table */
+ idx = nand_ecc_precalc_table[dat[j]];
+ reg1 ^= (idx & 0x3f);
+
+ /* All bit XOR = 1 ? */
+ if (idx & 0x40) {
+ reg3 ^= (u_char) j;
+ reg2 ^= ~((u_char) j);
+ }
+ }
+
+ /* Create non-inverted ECC code from line parity */
+ nand_trans_result(reg2, reg3, ecc_code);
+
+ /* Calculate final ECC code */
+ ecc_code[0] = ~ecc_code[0];
+ ecc_code[1] = ~ecc_code[1];
+ ecc_code[2] = ((~reg1) << 2) | 0x03;
+ return 0;
+}
+
+/**
+ * nand_correct_data - [NAND Interface] Detect and correct bit error(s)
+ * @mtd: MTD block structure
+ * @dat: raw data read from the chip
+ * @read_ecc: ECC from the chip
+ * @calc_ecc: the ECC calculated from raw data
+ *
+ * Detect and correct a 1 bit error for 256 byte block
+ */
+int nand_correct_data(struct mtd_info *mtd, u_char *dat, u_char *read_ecc, u_char *calc_ecc)
+{
+ u_char a, b, c, d1, d2, d3, add, bit, i;
+
+ /* Do error detection */
+ d1 = calc_ecc[0] ^ read_ecc[0];
+ d2 = calc_ecc[1] ^ read_ecc[1];
+ d3 = calc_ecc[2] ^ read_ecc[2];
+
+ if ((d1 | d2 | d3) == 0) {
+ /* No errors */
+ return 0;
+ }
+ else {
+ a = (d1 ^ (d1 >> 1)) & 0x55;
+ b = (d2 ^ (d2 >> 1)) & 0x55;
+ c = (d3 ^ (d3 >> 1)) & 0x54;
+
+ /* Found and will correct single bit error in the data */
+ if ((a == 0x55) && (b == 0x55) && (c == 0x54)) {
+ c = 0x80;
+ add = 0;
+ a = 0x80;
+ for (i=0; i<4; i++) {
+ if (d1 & c)
+ add |= a;
+ c >>= 2;
+ a >>= 1;
+ }
+ c = 0x80;
+ for (i=0; i<4; i++) {
+ if (d2 & c)
+ add |= a;
+ c >>= 2;
+ a >>= 1;
+ }
+ bit = 0;
+ b = 0x04;
+ c = 0x80;
+ for (i=0; i<3; i++) {
+ if (d3 & c)
+ bit |= b;
+ c >>= 2;
+ b >>= 1;
+ }
+ b = 0x01;
+ a = dat[add];
+ a ^= (b << bit);
+ dat[add] = a;
+ return 1;
+ } else {
+ i = 0;
+ while (d1) {
+ if (d1 & 0x01)
+ ++i;
+ d1 >>= 1;
+ }
+ while (d2) {
+ if (d2 & 0x01)
+ ++i;
+ d2 >>= 1;
+ }
+ while (d3) {
+ if (d3 & 0x01)
+ ++i;
+ d3 >>= 1;
+ }
+ if (i == 1) {
+ /* ECC Code Error Correction */
+ read_ecc[0] = calc_ecc[0];
+ read_ecc[1] = calc_ecc[1];
+ read_ecc[2] = calc_ecc[2];
+ return 2;
+ }
+ else {
+ /* Uncorrectable Error */
+ return -1;
+ }
+ }
+ }
+
+ /* Should never happen */
+ return -1;
+}
+
+#endif /* CONFIG_COMMANDS & CFG_CMD_NAND */
diff --git a/drivers/nand/nand_ids.c b/drivers/nand/nand_ids.c
new file mode 100644
index 0000000000..a2422132b3
--- /dev/null
+++ b/drivers/nand/nand_ids.c
@@ -0,0 +1,129 @@
+/*
+ * drivers/mtd/nandids.c
+ *
+ * Copyright (C) 2002 Thomas Gleixner (tglx@linutronix.de)
+ *
+ * $Id: nand_ids.c,v 1.10 2004/05/26 13:40:12 gleixner Exp $
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include <common.h>
+
+#if (CONFIG_COMMANDS & CFG_CMD_NAND) && !defined(CFG_NAND_LEGACY)
+
+#include <linux/mtd/nand.h>
+
+/*
+* Chip ID list
+*
+* Name. ID code, pagesize, chipsize in MegaByte, eraseblock size,
+* options
+*
+* Pagesize; 0, 256, 512
+* 0 get this information from the extended chip ID
++ 256 256 Byte page size
+* 512 512 Byte page size
+*/
+struct nand_flash_dev nand_flash_ids[] = {
+ {"NAND 1MiB 5V 8-bit", 0x6e, 256, 1, 0x1000, 0},
+ {"NAND 2MiB 5V 8-bit", 0x64, 256, 2, 0x1000, 0},
+ {"NAND 4MiB 5V 8-bit", 0x6b, 512, 4, 0x2000, 0},
+ {"NAND 1MiB 3,3V 8-bit", 0xe8, 256, 1, 0x1000, 0},
+ {"NAND 1MiB 3,3V 8-bit", 0xec, 256, 1, 0x1000, 0},
+ {"NAND 2MiB 3,3V 8-bit", 0xea, 256, 2, 0x1000, 0},
+ {"NAND 4MiB 3,3V 8-bit", 0xd5, 512, 4, 0x2000, 0},
+ {"NAND 4MiB 3,3V 8-bit", 0xe3, 512, 4, 0x2000, 0},
+ {"NAND 4MiB 3,3V 8-bit", 0xe5, 512, 4, 0x2000, 0},
+ {"NAND 8MiB 3,3V 8-bit", 0xd6, 512, 8, 0x2000, 0},
+
+ {"NAND 8MiB 1,8V 8-bit", 0x39, 512, 8, 0x2000, 0},
+ {"NAND 8MiB 3,3V 8-bit", 0xe6, 512, 8, 0x2000, 0},
+ {"NAND 8MiB 1,8V 16-bit", 0x49, 512, 8, 0x2000, NAND_BUSWIDTH_16},
+ {"NAND 8MiB 3,3V 16-bit", 0x59, 512, 8, 0x2000, NAND_BUSWIDTH_16},
+
+ {"NAND 16MiB 1,8V 8-bit", 0x33, 512, 16, 0x4000, 0},
+ {"NAND 16MiB 3,3V 8-bit", 0x73, 512, 16, 0x4000, 0},
+ {"NAND 16MiB 1,8V 16-bit", 0x43, 512, 16, 0x4000, NAND_BUSWIDTH_16},
+ {"NAND 16MiB 3,3V 16-bit", 0x53, 512, 16, 0x4000, NAND_BUSWIDTH_16},
+
+ {"NAND 32MiB 1,8V 8-bit", 0x35, 512, 32, 0x4000, 0},
+ {"NAND 32MiB 3,3V 8-bit", 0x75, 512, 32, 0x4000, 0},
+ {"NAND 32MiB 1,8V 16-bit", 0x45, 512, 32, 0x4000, NAND_BUSWIDTH_16},
+ {"NAND 32MiB 3,3V 16-bit", 0x55, 512, 32, 0x4000, NAND_BUSWIDTH_16},
+
+ {"NAND 64MiB 1,8V 8-bit", 0x36, 512, 64, 0x4000, 0},
+ {"NAND 64MiB 3,3V 8-bit", 0x76, 512, 64, 0x4000, 0},
+ {"NAND 64MiB 1,8V 16-bit", 0x46, 512, 64, 0x4000, NAND_BUSWIDTH_16},
+ {"NAND 64MiB 3,3V 16-bit", 0x56, 512, 64, 0x4000, NAND_BUSWIDTH_16},
+
+ {"NAND 128MiB 1,8V 8-bit", 0x78, 512, 128, 0x4000, 0},
+ {"NAND 128MiB 3,3V 8-bit", 0x79, 512, 128, 0x4000, 0},
+ {"NAND 128MiB 1,8V 16-bit", 0x72, 512, 128, 0x4000, NAND_BUSWIDTH_16},
+ {"NAND 128MiB 3,3V 16-bit", 0x74, 512, 128, 0x4000, NAND_BUSWIDTH_16},
+
+ {"NAND 256MiB 3,3V 8-bit", 0x71, 512, 256, 0x4000, 0},
+
+ {"NAND 512MiB 3,3V 8-bit", 0xDC, 512, 512, 0x4000, 0},
+
+ /* These are the new chips with large page size. The pagesize
+ * and the erasesize is determined from the extended id bytes
+ */
+ /* 1 Gigabit */
+ {"NAND 128MiB 1,8V 8-bit", 0xA1, 0, 128, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR}, /* sdp3430*/
+ {"NAND 128MiB 3,3V 8-bit", 0xF1, 0, 128, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
+ {"NAND 128MiB 1,8V 16-bit", 0xB1, 0, 128, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
+ {"NAND 128MiB 3,3V 16-bit", 0xC1, 0, 128, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
+
+ /* 2 Gigabit */
+ {"NAND 256MiB 1,8V 8-bit", 0xAA, 0, 256, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
+ {"NAND 256MiB 3,3V 8-bit", 0xDA, 0, 256, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
+ {"NAND 256MiB 1,8V 16-bit", 0xBA, 0, 256, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR}, /* lab3430 */
+ {"NAND 256MiB 3,3V 16-bit", 0xCA, 0, 256, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
+
+ /* 4 Gigabit */
+ {"NAND 512MiB 1,8V 8-bit", 0xAC, 0, 512, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
+ {"NAND 512MiB 3,3V 8-bit", 0xDC, 0, 512, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
+ {"NAND 512MiB 1,8V 16-bit", 0xBC, 0, 512, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
+ {"NAND 512MiB 3,3V 16-bit", 0xCC, 0, 512, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
+
+ /* 8 Gigabit */
+ {"NAND 1GiB 1,8V 8-bit", 0xA3, 0, 1024, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
+ {"NAND 1GiB 3,3V 8-bit", 0xD3, 0, 1024, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
+ {"NAND 1GiB 1,8V 16-bit", 0xB3, 0, 1024, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
+ {"NAND 1GiB 3,3V 16-bit", 0xC3, 0, 1024, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
+
+ /* 16 Gigabit */
+ {"NAND 2GiB 1,8V 8-bit", 0xA5, 0, 2048, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
+ {"NAND 2GiB 3,3V 8-bit", 0xD5, 0, 2048, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
+ {"NAND 2GiB 1,8V 16-bit", 0xB5, 0, 2048, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
+ {"NAND 2GiB 3,3V 16-bit", 0xC5, 0, 2048, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
+
+ /* Renesas AND 1 Gigabit. Those chips do not support extended id and have a strange page/block layout !
+ * The chosen minimum erasesize is 4 * 2 * 2048 = 16384 Byte, as those chips have an array of 4 page planes
+ * 1 block = 2 pages, but due to plane arrangement the blocks 0-3 consists of page 0 + 4,1 + 5, 2 + 6, 3 + 7
+ * Anyway JFFS2 would increase the eraseblock size so we chose a combined one which can be erased in one go
+ * There are more speed improvements for reads and writes possible, but not implemented now
+ */
+ {"AND 128MiB 3,3V 8-bit", 0x01, 2048, 128, 0x4000, NAND_IS_AND | NAND_NO_AUTOINCR | NAND_4PAGE_ARRAY},
+
+ {NULL,}
+};
+
+/*
+* Manufacturer ID list
+*/
+struct nand_manufacturers nand_manuf_ids[] = {
+ {NAND_MFR_TOSHIBA, "Toshiba"},
+ {NAND_MFR_SAMSUNG, "Samsung"},
+ {NAND_MFR_FUJITSU, "Fujitsu"},
+ {NAND_MFR_NATIONAL, "National"},
+ {NAND_MFR_RENESAS, "Renesas"},
+ {NAND_MFR_STMICRO, "ST Micro"},
+ {NAND_MFR_MICRON, "Micron"},
+ {0x0, "Unknown"}
+};
+#endif
diff --git a/drivers/nand_legacy/Makefile b/drivers/nand_legacy/Makefile
new file mode 100644
index 0000000000..7e2cf66730
--- /dev/null
+++ b/drivers/nand_legacy/Makefile
@@ -0,0 +1,16 @@
+include $(TOPDIR)/config.mk
+
+LIB := libnand_legacy.a
+
+OBJS := nand_legacy.o
+all: $(LIB)
+
+$(LIB): $(OBJS)
+ $(AR) crv $@ $(OBJS)
+
+#########################################################################
+
+.depend: Makefile $(OBJS:.o=.c)
+ $(CC) -M $(CFLAGS) $(OBJS:.o=.c) > $@
+
+sinclude .depend
diff --git a/drivers/nand_legacy/nand_legacy.c b/drivers/nand_legacy/nand_legacy.c
new file mode 100644
index 0000000000..458046d41c
--- /dev/null
+++ b/drivers/nand_legacy/nand_legacy.c
@@ -0,0 +1,1619 @@
+/*
+ * (C) 2006 Denx
+ * Driver for NAND support, Rick Bronson
+ * borrowed heavily from:
+ * (c) 1999 Machine Vision Holdings, Inc.
+ * (c) 1999, 2000 David Woodhouse <dwmw2@infradead.org>
+ *
+ * Added 16-bit nand support
+ * (C) 2004 Texas Instruments
+ */
+
+#include <common.h>
+#include <command.h>
+#include <malloc.h>
+#include <asm/io.h>
+#include <watchdog.h>
+
+#ifdef CONFIG_SHOW_BOOT_PROGRESS
+# include <status_led.h>
+# define SHOW_BOOT_PROGRESS(arg) show_boot_progress(arg)
+#else
+# define SHOW_BOOT_PROGRESS(arg)
+#endif
+
+#if (CONFIG_COMMANDS & CFG_CMD_NAND) && defined(CFG_NAND_LEGACY)
+
+#include <linux/mtd/nand_legacy.h>
+#include <linux/mtd/nand_ids.h>
+#include <jffs2/jffs2.h>
+
+#ifdef CONFIG_OMAP1510
+void archflashwp(void *archdata, int wp);
+#endif
+
+#define ROUND_DOWN(value,boundary) ((value) & (~((boundary)-1)))
+
+#undef PSYCHO_DEBUG
+#undef NAND_DEBUG
+
+/* ****************** WARNING *********************
+ * When ALLOW_ERASE_BAD_DEBUG is non-zero the erase command will
+ * erase (or at least attempt to erase) blocks that are marked
+ * bad. This can be very handy if you are _sure_ that the block
+ * is OK, say because you marked a good block bad to test bad
+ * block handling and you are done testing, or if you have
+ * accidentally marked blocks bad.
+ *
+ * Erasing factory marked bad blocks is a _bad_ idea. If the
+ * erase succeeds there is no reliable way to find them again,
+ * and attempting to program or erase bad blocks can affect
+ * the data in _other_ (good) blocks.
+ */
+#define ALLOW_ERASE_BAD_DEBUG 0
+
+#define CONFIG_MTD_NAND_ECC /* enable ECC */
+#define CONFIG_MTD_NAND_ECC_JFFS2
+
+/* bits for nand_legacy_rw() `cmd'; or together as needed */
+#define NANDRW_READ 0x01
+#define NANDRW_WRITE 0x00
+#define NANDRW_JFFS2 0x02
+#define NANDRW_JFFS2_SKIP 0x04
+
+
+/*
+ * Exported variables etc.
+ */
+
+/* Definition of the out of band configuration structure */
+struct nand_oob_config {
+ /* position of ECC bytes inside oob */
+ int ecc_pos[6];
+ /* position of bad blk flag inside oob -1 = inactive */
+ int badblock_pos;
+ /* position of ECC valid flag inside oob -1 = inactive */
+ int eccvalid_pos;
+} oob_config = { {0}, 0, 0};
+
+struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE] = {{0}};
+
+int curr_device = -1; /* Current NAND Device */
+
+
+/*
+ * Exported functionss
+ */
+int nand_legacy_erase(struct nand_chip* nand, size_t ofs,
+ size_t len, int clean);
+int nand_legacy_rw(struct nand_chip* nand, int cmd,
+ size_t start, size_t len,
+ size_t * retlen, u_char * buf);
+void nand_print(struct nand_chip *nand);
+void nand_print_bad(struct nand_chip *nand);
+int nand_read_oob(struct nand_chip* nand, size_t ofs, size_t len,
+ size_t * retlen, u_char * buf);
+int nand_write_oob(struct nand_chip* nand, size_t ofs, size_t len,
+ size_t * retlen, const u_char * buf);
+
+/*
+ * Internals
+ */
+static int NanD_WaitReady(struct nand_chip *nand, int ale_wait);
+static int nand_read_ecc(struct nand_chip *nand, size_t start, size_t len,
+ size_t * retlen, u_char *buf, u_char *ecc_code);
+static int nand_write_ecc (struct nand_chip* nand, size_t to, size_t len,
+ size_t * retlen, const u_char * buf,
+ u_char * ecc_code);
+#ifdef CONFIG_MTD_NAND_ECC
+static int nand_correct_data (u_char *dat, u_char *read_ecc, u_char *calc_ecc);
+static void nand_calculate_ecc (const u_char *dat, u_char *ecc_code);
+#endif
+
+
+/*
+ *
+ * Function definitions
+ *
+ */
+
+/* returns 0 if block containing pos is OK:
+ * valid erase block and
+ * not marked bad, or no bad mark position is specified
+ * returns 1 if marked bad or otherwise invalid
+ */
+static int check_block (struct nand_chip *nand, unsigned long pos)
+{
+ size_t retlen;
+ uint8_t oob_data;
+ uint16_t oob_data16[6];
+ int page0 = pos & (-nand->erasesize);
+ int page1 = page0 + nand->oobblock;
+ int badpos = oob_config.badblock_pos;
+
+ if (pos >= nand->totlen)
+ return 1;
+
+ if (badpos < 0)
+ return 0; /* no way to check, assume OK */
+
+ if (nand->bus16) {
+ if (nand_read_oob(nand, (page0 + 0), 12, &retlen, (uint8_t *)oob_data16)
+ || (oob_data16[2] & 0xff00) != 0xff00)
+ return 1;
+ if (nand_read_oob(nand, (page1 + 0), 12, &retlen, (uint8_t *)oob_data16)
+ || (oob_data16[2] & 0xff00) != 0xff00)
+ return 1;
+ } else {
+ /* Note - bad block marker can be on first or second page */
+ if (nand_read_oob(nand, page0 + badpos, 1, &retlen, (unsigned char *)&oob_data)
+ || oob_data != 0xff
+ || nand_read_oob (nand, page1 + badpos, 1, &retlen, (unsigned char *)&oob_data)
+ || oob_data != 0xff)
+ return 1;
+ }
+
+ return 0;
+}
+
+/* print bad blocks in NAND flash */
+void nand_print_bad(struct nand_chip* nand)
+{
+ unsigned long pos;
+
+ for (pos = 0; pos < nand->totlen; pos += nand->erasesize) {
+ if (check_block(nand, pos))
+ printf(" 0x%8.8lx\n", pos);
+ }
+ puts("\n");
+}
+
+/* cmd: 0: NANDRW_WRITE write, fail on bad block
+ * 1: NANDRW_READ read, fail on bad block
+ * 2: NANDRW_WRITE | NANDRW_JFFS2 write, skip bad blocks
+ * 3: NANDRW_READ | NANDRW_JFFS2 read, data all 0xff for bad blocks
+ * 7: NANDRW_READ | NANDRW_JFFS2 | NANDRW_JFFS2_SKIP read, skip bad blocks
+ */
+int nand_legacy_rw (struct nand_chip* nand, int cmd,
+ size_t start, size_t len,
+ size_t * retlen, u_char * buf)
+{
+ int ret = 0, n, total = 0;
+ char eccbuf[6];
+ /* eblk (once set) is the start of the erase block containing the
+ * data being processed.
+ */
+ unsigned long eblk = ~0; /* force mismatch on first pass */
+ unsigned long erasesize = nand->erasesize;
+
+ while (len) {
+ if ((start & (-erasesize)) != eblk) {
+ /* have crossed into new erase block, deal with
+ * it if it is sure marked bad.
+ */
+ eblk = start & (-erasesize); /* start of block */
+ if (check_block(nand, eblk)) {
+ if (cmd == (NANDRW_READ | NANDRW_JFFS2)) {
+ while (len > 0 &&
+ start - eblk < erasesize) {
+ *(buf++) = 0xff;
+ ++start;
+ ++total;
+ --len;
+ }
+ continue;
+ } else if (cmd == (NANDRW_READ | NANDRW_JFFS2 | NANDRW_JFFS2_SKIP)) {
+ start += erasesize;
+ continue;
+ } else if (cmd == (NANDRW_WRITE | NANDRW_JFFS2)) {
+ /* skip bad block */
+ start += erasesize;
+ continue;
+ } else {
+ ret = 1;
+ break;
+ }
+ }
+ }
+ /* The ECC will not be calculated correctly if
+ less than 512 is written or read */
+ /* Is request at least 512 bytes AND it starts on a proper boundry */
+ if((start != ROUND_DOWN(start, 0x200)) || (len < 0x200))
+ printf("Warning block writes should be at least 512 bytes and start on a 512 byte boundry\n");
+
+ if (cmd & NANDRW_READ) {
+ ret = nand_read_ecc(nand, start,
+ min(len, eblk + erasesize - start),
+ (size_t *)&n, (u_char*)buf, (u_char *)eccbuf);
+ } else {
+ ret = nand_write_ecc(nand, start,
+ min(len, eblk + erasesize - start),
+ (size_t *)&n, (u_char*)buf, (u_char *)eccbuf);
+ }
+
+ if (ret)
+ break;
+
+ start += n;
+ buf += n;
+ total += n;
+ len -= n;
+ }
+ if (retlen)
+ *retlen = total;
+
+ return ret;
+}
+
+void nand_print(struct nand_chip *nand)
+{
+ if (nand->numchips > 1) {
+ printf("%s at 0x%lx,\n"
+ "\t %d chips %s, size %d MB, \n"
+ "\t total size %ld MB, sector size %ld kB\n",
+ nand->name, nand->IO_ADDR, nand->numchips,
+ nand->chips_name, 1 << (nand->chipshift - 20),
+ nand->totlen >> 20, nand->erasesize >> 10);
+ }
+ else {
+ printf("%s at 0x%lx (", nand->chips_name, nand->IO_ADDR);
+ print_size(nand->totlen, ", ");
+ print_size(nand->erasesize, " sector)\n");
+ }
+}
+
+/* ------------------------------------------------------------------------- */
+
+static int NanD_WaitReady(struct nand_chip *nand, int ale_wait)
+{
+ /* This is inline, to optimise the common case, where it's ready instantly */
+ int ret = 0;
+
+#ifdef NAND_NO_RB /* in config file, shorter delays currently wrap accesses */
+ if(ale_wait)
+ NAND_WAIT_READY(nand); /* do the worst case 25us wait */
+ else
+ udelay(10);
+#else /* has functional r/b signal */
+ NAND_WAIT_READY(nand);
+#endif
+ return ret;
+}
+
+/* NanD_Command: Send a flash command to the flash chip */
+
+static inline int NanD_Command(struct nand_chip *nand, unsigned char command)
+{
+ unsigned long nandptr = nand->IO_ADDR;
+
+ /* Assert the CLE (Command Latch Enable) line to the flash chip */
+ NAND_CTL_SETCLE(nandptr);
+
+ /* Send the command */
+ WRITE_NAND_COMMAND(command, nandptr);
+
+ /* Lower the CLE line */
+ NAND_CTL_CLRCLE(nandptr);
+
+#ifdef NAND_NO_RB
+ if(command == NAND_CMD_RESET){
+ u_char ret_val;
+ NanD_Command(nand, NAND_CMD_STATUS);
+ do {
+ ret_val = READ_NAND(nandptr);/* wait till ready */
+ } while((ret_val & 0x40) != 0x40);
+ }
+#endif
+ return NanD_WaitReady(nand, 0);
+}
+
+/* NanD_Address: Set the current address for the flash chip */
+
+static int NanD_Address(struct nand_chip *nand, int numbytes, unsigned long ofs)
+{
+ unsigned long nandptr;
+ int i;
+
+ nandptr = nand->IO_ADDR;
+
+ /* Assert the ALE (Address Latch Enable) line to the flash chip */
+ NAND_CTL_SETALE(nandptr);
+
+ /* Send the address */
+ /* Devices with 256-byte page are addressed as:
+ * Column (bits 0-7), Page (bits 8-15, 16-23, 24-31)
+ * there is no device on the market with page256
+ * and more than 24 bits.
+ * Devices with 512-byte page are addressed as:
+ * Column (bits 0-7), Page (bits 9-16, 17-24, 25-31)
+ * 25-31 is sent only if the chip support it.
+ * bit 8 changes the read command to be sent
+ * (NAND_CMD_READ0 or NAND_CMD_READ1).
+ */
+
+ if (numbytes == ADDR_COLUMN || numbytes == ADDR_COLUMN_PAGE)
+ WRITE_NAND_ADDRESS(ofs, nandptr);
+
+ ofs = ofs >> nand->page_shift;
+
+ if (numbytes == ADDR_PAGE || numbytes == ADDR_COLUMN_PAGE) {
+ for (i = 0; i < nand->pageadrlen; i++, ofs = ofs >> 8) {
+ WRITE_NAND_ADDRESS(ofs, nandptr);
+ }
+ }
+
+ /* Lower the ALE line */
+ NAND_CTL_CLRALE(nandptr);
+
+ /* Wait for the chip to respond */
+ return NanD_WaitReady(nand, 1);
+}
+
+/* NanD_SelectChip: Select a given flash chip within the current floor */
+
+static inline int NanD_SelectChip(struct nand_chip *nand, int chip)
+{
+ /* Wait for it to be ready */
+ return NanD_WaitReady(nand, 0);
+}
+
+/* NanD_IdentChip: Identify a given NAND chip given {floor,chip} */
+
+static int NanD_IdentChip(struct nand_chip *nand, int floor, int chip)
+{
+ int mfr, id, i;
+
+ NAND_ENABLE_CE(nand); /* set pin low */
+ /* Reset the chip */
+ if (NanD_Command(nand, NAND_CMD_RESET)) {
+#ifdef NAND_DEBUG
+ printf("NanD_Command (reset) for %d,%d returned true\n",
+ floor, chip);
+#endif
+ NAND_DISABLE_CE(nand); /* set pin high */
+ return 0;
+ }
+
+ /* Read the NAND chip ID: 1. Send ReadID command */
+ if (NanD_Command(nand, NAND_CMD_READID)) {
+#ifdef NAND_DEBUG
+ printf("NanD_Command (ReadID) for %d,%d returned true\n",
+ floor, chip);
+#endif
+ NAND_DISABLE_CE(nand); /* set pin high */
+ return 0;
+ }
+
+ /* Read the NAND chip ID: 2. Send address byte zero */
+ NanD_Address(nand, ADDR_COLUMN, 0);
+
+ /* Read the manufacturer and device id codes from the device */
+
+ mfr = READ_NAND(nand->IO_ADDR);
+
+ id = READ_NAND(nand->IO_ADDR);
+
+ NAND_DISABLE_CE(nand); /* set pin high */
+
+#ifdef NAND_DEBUG
+ printf("NanD_Command (ReadID) got %x %x\n", mfr, id);
+#endif
+ if (mfr == 0xff || mfr == 0) {
+ /* No response - return failure */
+ return 0;
+ }
+
+ /* Check it's the same as the first chip we identified.
+ * M-Systems say that any given nand_chip device should only
+ * contain _one_ type of flash part, although that's not a
+ * hardware restriction. */
+ if (nand->mfr) {
+ if (nand->mfr == mfr && nand->id == id) {
+ return 1; /* This is another the same the first */
+ } else {
+ printf("Flash chip at floor %d, chip %d is different:\n",
+ floor, chip);
+ }
+ }
+
+ /* Print and store the manufacturer and ID codes. */
+ for (i = 0; nand_flash_ids[i].name != NULL; i++) {
+ if (mfr == nand_flash_ids[i].manufacture_id &&
+ id == nand_flash_ids[i].model_id) {
+#ifdef NAND_DEBUG
+ printf("Flash chip found:\n\t Manufacturer ID: 0x%2.2X, "
+ "Chip ID: 0x%2.2X (%s)\n", mfr, id,
+ nand_flash_ids[i].name);
+#endif
+ if (!nand->mfr) {
+ nand->mfr = mfr;
+ nand->id = id;
+ nand->chipshift =
+ nand_flash_ids[i].chipshift;
+ nand->page256 = nand_flash_ids[i].page256;
+ nand->eccsize = 256;
+ if (nand->page256) {
+ nand->oobblock = 256;
+ nand->oobsize = 8;
+ nand->page_shift = 8;
+ } else {
+ nand->oobblock = 512;
+ nand->oobsize = 16;
+ nand->page_shift = 9;
+ }
+ nand->pageadrlen = nand_flash_ids[i].pageadrlen;
+ nand->erasesize = nand_flash_ids[i].erasesize;
+ nand->chips_name = nand_flash_ids[i].name;
+ nand->bus16 = nand_flash_ids[i].bus16;
+ return 1;
+ }
+ return 0;
+ }
+ }
+
+
+#ifdef NAND_DEBUG
+ /* We haven't fully identified the chip. Print as much as we know. */
+ printf("Unknown flash chip found: %2.2X %2.2X\n",
+ id, mfr);
+#endif
+
+ return 0;
+}
+
+/* NanD_ScanChips: Find all NAND chips present in a nand_chip, and identify them */
+
+static void NanD_ScanChips(struct nand_chip *nand)
+{
+ int floor, chip;
+ int numchips[NAND_MAX_FLOORS];
+ int maxchips = NAND_MAX_CHIPS;
+ int ret = 1;
+
+ nand->numchips = 0;
+ nand->mfr = 0;
+ nand->id = 0;
+
+
+ /* For each floor, find the number of valid chips it contains */
+ for (floor = 0; floor < NAND_MAX_FLOORS; floor++) {
+ ret = 1;
+ numchips[floor] = 0;
+ for (chip = 0; chip < maxchips && ret != 0; chip++) {
+
+ ret = NanD_IdentChip(nand, floor, chip);
+ if (ret) {
+ numchips[floor]++;
+ nand->numchips++;
+ }
+ }
+ }
+
+ /* If there are none at all that we recognise, bail */
+ if (!nand->numchips) {
+#ifdef NAND_DEBUG
+ puts ("No NAND flash chips recognised.\n");
+#endif
+ return;
+ }
+
+ /* Allocate an array to hold the information for each chip */
+ nand->chips = malloc(sizeof(struct Nand) * nand->numchips);
+ if (!nand->chips) {
+ puts ("No memory for allocating chip info structures\n");
+ return;
+ }
+
+ ret = 0;
+
+ /* Fill out the chip array with {floor, chipno} for each
+ * detected chip in the device. */
+ for (floor = 0; floor < NAND_MAX_FLOORS; floor++) {
+ for (chip = 0; chip < numchips[floor]; chip++) {
+ nand->chips[ret].floor = floor;
+ nand->chips[ret].chip = chip;
+ nand->chips[ret].curadr = 0;
+ nand->chips[ret].curmode = 0x50;
+ ret++;
+ }
+ }
+
+ /* Calculate and print the total size of the device */
+ nand->totlen = nand->numchips * (1 << nand->chipshift);
+
+#ifdef NAND_DEBUG
+ printf("%d flash chips found. Total nand_chip size: %ld MB\n",
+ nand->numchips, nand->totlen >> 20);
+#endif
+}
+
+/* we need to be fast here, 1 us per read translates to 1 second per meg */
+static void NanD_ReadBuf (struct nand_chip *nand, u_char * data_buf, int cntr)
+{
+ unsigned long nandptr = nand->IO_ADDR;
+
+ NanD_Command (nand, NAND_CMD_READ0);
+
+ if (nand->bus16) {
+ u16 val;
+
+ while (cntr >= 16) {
+ val = READ_NAND (nandptr);
+ *data_buf++ = val & 0xff;
+ *data_buf++ = val >> 8;
+ val = READ_NAND (nandptr);
+ *data_buf++ = val & 0xff;
+ *data_buf++ = val >> 8;
+ val = READ_NAND (nandptr);
+ *data_buf++ = val & 0xff;
+ *data_buf++ = val >> 8;
+ val = READ_NAND (nandptr);
+ *data_buf++ = val & 0xff;
+ *data_buf++ = val >> 8;
+ val = READ_NAND (nandptr);
+ *data_buf++ = val & 0xff;
+ *data_buf++ = val >> 8;
+ val = READ_NAND (nandptr);
+ *data_buf++ = val & 0xff;
+ *data_buf++ = val >> 8;
+ val = READ_NAND (nandptr);
+ *data_buf++ = val & 0xff;
+ *data_buf++ = val >> 8;
+ val = READ_NAND (nandptr);
+ *data_buf++ = val & 0xff;
+ *data_buf++ = val >> 8;
+ cntr -= 16;
+ }
+
+ while (cntr > 0) {
+ val = READ_NAND (nandptr);
+ *data_buf++ = val & 0xff;
+ *data_buf++ = val >> 8;
+ cntr -= 2;
+ }
+ } else {
+ while (cntr >= 16) {
+ *data_buf++ = READ_NAND (nandptr);
+ *data_buf++ = READ_NAND (nandptr);
+ *data_buf++ = READ_NAND (nandptr);
+ *data_buf++ = READ_NAND (nandptr);
+ *data_buf++ = READ_NAND (nandptr);
+ *data_buf++ = READ_NAND (nandptr);
+ *data_buf++ = READ_NAND (nandptr);
+ *data_buf++ = READ_NAND (nandptr);
+ *data_buf++ = READ_NAND (nandptr);
+ *data_buf++ = READ_NAND (nandptr);
+ *data_buf++ = READ_NAND (nandptr);
+ *data_buf++ = READ_NAND (nandptr);
+ *data_buf++ = READ_NAND (nandptr);
+ *data_buf++ = READ_NAND (nandptr);
+ *data_buf++ = READ_NAND (nandptr);
+ *data_buf++ = READ_NAND (nandptr);
+ cntr -= 16;
+ }
+
+ while (cntr > 0) {
+ *data_buf++ = READ_NAND (nandptr);
+ cntr--;
+ }
+ }
+}
+
+/*
+ * NAND read with ECC
+ */
+static int nand_read_ecc(struct nand_chip *nand, size_t start, size_t len,
+ size_t * retlen, u_char *buf, u_char *ecc_code)
+{
+ int col, page;
+ int ecc_status = 0;
+#ifdef CONFIG_MTD_NAND_ECC
+ int j;
+ int ecc_failed = 0;
+ u_char *data_poi;
+ u_char ecc_calc[6];
+#endif
+
+ /* Do not allow reads past end of device */
+ if ((start + len) > nand->totlen) {
+ printf ("%s: Attempt read beyond end of device %x %x %x\n",
+ __FUNCTION__, (uint) start, (uint) len, (uint) nand->totlen);
+ *retlen = 0;
+ return -1;
+ }
+
+ /* First we calculate the starting page */
+ /*page = shr(start, nand->page_shift);*/
+ page = start >> nand->page_shift;
+
+ /* Get raw starting column */
+ col = start & (nand->oobblock - 1);
+
+ /* Initialize return value */
+ *retlen = 0;
+
+ /* Select the NAND device */
+ NAND_ENABLE_CE(nand); /* set pin low */
+
+ /* Loop until all data read */
+ while (*retlen < len) {
+
+#ifdef CONFIG_MTD_NAND_ECC
+ /* Do we have this page in cache ? */
+ if (nand->cache_page == page)
+ goto readdata;
+ /* Send the read command */
+ NanD_Command(nand, NAND_CMD_READ0);
+ if (nand->bus16) {
+ NanD_Address(nand, ADDR_COLUMN_PAGE,
+ (page << nand->page_shift) + (col >> 1));
+ } else {
+ NanD_Address(nand, ADDR_COLUMN_PAGE,
+ (page << nand->page_shift) + col);
+ }
+
+ /* Read in a page + oob data */
+ NanD_ReadBuf(nand, nand->data_buf, nand->oobblock + nand->oobsize);
+
+ /* copy data into cache, for read out of cache and if ecc fails */
+ if (nand->data_cache) {
+ memcpy (nand->data_cache, nand->data_buf,
+ nand->oobblock + nand->oobsize);
+ }
+
+ /* Pick the ECC bytes out of the oob data */
+ for (j = 0; j < 6; j++) {
+ ecc_code[j] = nand->data_buf[(nand->oobblock + oob_config.ecc_pos[j])];
+ }
+
+ /* Calculate the ECC and verify it */
+ /* If block was not written with ECC, skip ECC */
+ if (oob_config.eccvalid_pos != -1 &&
+ (nand->data_buf[nand->oobblock + oob_config.eccvalid_pos] & 0x0f) != 0x0f) {
+
+ nand_calculate_ecc (&nand->data_buf[0], &ecc_calc[0]);
+ switch (nand_correct_data (&nand->data_buf[0], &ecc_code[0], &ecc_calc[0])) {
+ case -1:
+ printf ("%s: Failed ECC read, page 0x%08x\n", __FUNCTION__, page);
+ ecc_failed++;
+ break;
+ case 1:
+ case 2: /* transfer ECC corrected data to cache */
+ if (nand->data_cache)
+ memcpy (nand->data_cache, nand->data_buf, 256);
+ break;
+ }
+ }
+
+ if (oob_config.eccvalid_pos != -1 &&
+ nand->oobblock == 512 && (nand->data_buf[nand->oobblock + oob_config.eccvalid_pos] & 0xf0) != 0xf0) {
+
+ nand_calculate_ecc (&nand->data_buf[256], &ecc_calc[3]);
+ switch (nand_correct_data (&nand->data_buf[256], &ecc_code[3], &ecc_calc[3])) {
+ case -1:
+ printf ("%s: Failed ECC read, page 0x%08x\n", __FUNCTION__, page);
+ ecc_failed++;
+ break;
+ case 1:
+ case 2: /* transfer ECC corrected data to cache */
+ if (nand->data_cache)
+ memcpy (&nand->data_cache[256], &nand->data_buf[256], 256);
+ break;
+ }
+ }
+readdata:
+ /* Read the data from ECC data buffer into return buffer */
+ data_poi = (nand->data_cache) ? nand->data_cache : nand->data_buf;
+ data_poi += col;
+ if ((*retlen + (nand->oobblock - col)) >= len) {
+ memcpy (buf + *retlen, data_poi, len - *retlen);
+ *retlen = len;
+ } else {
+ memcpy (buf + *retlen, data_poi, nand->oobblock - col);
+ *retlen += nand->oobblock - col;
+ }
+ /* Set cache page address, invalidate, if ecc_failed */
+ nand->cache_page = (nand->data_cache && !ecc_failed) ? page : -1;
+
+ ecc_status += ecc_failed;
+ ecc_failed = 0;
+
+#else
+ /* Send the read command */
+ NanD_Command(nand, NAND_CMD_READ0);
+ if (nand->bus16) {
+ NanD_Address(nand, ADDR_COLUMN_PAGE,
+ (page << nand->page_shift) + (col >> 1));
+ } else {
+ NanD_Address(nand, ADDR_COLUMN_PAGE,
+ (page << nand->page_shift) + col);
+ }
+
+ /* Read the data directly into the return buffer */
+ if ((*retlen + (nand->oobblock - col)) >= len) {
+ NanD_ReadBuf(nand, buf + *retlen, len - *retlen);
+ *retlen = len;
+ /* We're done */
+ continue;
+ } else {
+ NanD_ReadBuf(nand, buf + *retlen, nand->oobblock - col);
+ *retlen += nand->oobblock - col;
+ }
+#endif
+ /* For subsequent reads align to page boundary. */
+ col = 0;
+ /* Increment page address */
+ page++;
+ }
+
+ /* De-select the NAND device */
+ NAND_DISABLE_CE(nand); /* set pin high */
+
+ /*
+ * Return success, if no ECC failures, else -EIO
+ * fs driver will take care of that, because
+ * retlen == desired len and result == -EIO
+ */
+ return ecc_status ? -1 : 0;
+}
+
+/*
+ * Nand_page_program function is used for write and writev !
+ */
+static int nand_write_page (struct nand_chip *nand,
+ int page, int col, int last, u_char * ecc_code)
+{
+
+ int i;
+ unsigned long nandptr = nand->IO_ADDR;
+
+#ifdef CONFIG_MTD_NAND_ECC
+#ifdef CONFIG_MTD_NAND_VERIFY_WRITE
+ int ecc_bytes = (nand->oobblock == 512) ? 6 : 3;
+#endif
+#endif
+ /* pad oob area */
+ for (i = nand->oobblock; i < nand->oobblock + nand->oobsize; i++)
+ nand->data_buf[i] = 0xff;
+
+#ifdef CONFIG_MTD_NAND_ECC
+ /* Zero out the ECC array */
+ for (i = 0; i < 6; i++)
+ ecc_code[i] = 0x00;
+
+ /* Read back previous written data, if col > 0 */
+ if (col) {
+ NanD_Command (nand, NAND_CMD_READ0);
+ if (nand->bus16) {
+ NanD_Address (nand, ADDR_COLUMN_PAGE,
+ (page << nand->page_shift) + (col >> 1));
+ } else {
+ NanD_Address (nand, ADDR_COLUMN_PAGE,
+ (page << nand->page_shift) + col);
+ }
+
+ if (nand->bus16) {
+ u16 val;
+
+ for (i = 0; i < col; i += 2) {
+ val = READ_NAND (nandptr);
+ nand->data_buf[i] = val & 0xff;
+ nand->data_buf[i + 1] = val >> 8;
+ }
+ } else {
+ for (i = 0; i < col; i++)
+ nand->data_buf[i] = READ_NAND (nandptr);
+ }
+ }
+
+ /* Calculate and write the ECC if we have enough data */
+ if ((col < nand->eccsize) && (last >= nand->eccsize)) {
+ nand_calculate_ecc (&nand->data_buf[0], &(ecc_code[0]));
+ for (i = 0; i < 3; i++) {
+ nand->data_buf[(nand->oobblock +
+ oob_config.ecc_pos[i])] = ecc_code[i];
+ }
+ if (oob_config.eccvalid_pos != -1) {
+ nand->data_buf[nand->oobblock +
+ oob_config.eccvalid_pos] = 0xf0;
+ }
+ }
+
+ /* Calculate and write the second ECC if we have enough data */
+ if ((nand->oobblock == 512) && (last == nand->oobblock)) {
+ nand_calculate_ecc (&nand->data_buf[256], &(ecc_code[3]));
+ for (i = 3; i < 6; i++) {
+ nand->data_buf[(nand->oobblock +
+ oob_config.ecc_pos[i])] = ecc_code[i];
+ }
+ if (oob_config.eccvalid_pos != -1) {
+ nand->data_buf[nand->oobblock +
+ oob_config.eccvalid_pos] &= 0x0f;
+ }
+ }
+#endif
+ /* Prepad for partial page programming !!! */
+ for (i = 0; i < col; i++)
+ nand->data_buf[i] = 0xff;
+
+ /* Postpad for partial page programming !!! oob is already padded */
+ for (i = last; i < nand->oobblock; i++)
+ nand->data_buf[i] = 0xff;
+
+ /* Send command to begin auto page programming */
+ NanD_Command (nand, NAND_CMD_READ0);
+ NanD_Command (nand, NAND_CMD_SEQIN);
+ if (nand->bus16) {
+ NanD_Address (nand, ADDR_COLUMN_PAGE,
+ (page << nand->page_shift) + (col >> 1));
+ } else {
+ NanD_Address (nand, ADDR_COLUMN_PAGE,
+ (page << nand->page_shift) + col);
+ }
+
+ /* Write out complete page of data */
+ if (nand->bus16) {
+ for (i = 0; i < (nand->oobblock + nand->oobsize); i += 2) {
+ WRITE_NAND (nand->data_buf[i] +
+ (nand->data_buf[i + 1] << 8),
+ nand->IO_ADDR);
+ }
+ } else {
+ for (i = 0; i < (nand->oobblock + nand->oobsize); i++)
+ WRITE_NAND (nand->data_buf[i], nand->IO_ADDR);
+ }
+
+ /* Send command to actually program the data */
+ NanD_Command (nand, NAND_CMD_PAGEPROG);
+ NanD_Command (nand, NAND_CMD_STATUS);
+#ifdef NAND_NO_RB
+ {
+ u_char ret_val;
+
+ do {
+ ret_val = READ_NAND (nandptr); /* wait till ready */
+ } while ((ret_val & 0x40) != 0x40);
+ }
+#endif
+ /* See if device thinks it succeeded */
+ if (READ_NAND (nand->IO_ADDR) & 0x01) {
+ printf ("%s: Failed write, page 0x%08x, ", __FUNCTION__,
+ page);
+ return -1;
+ }
+#ifdef CONFIG_MTD_NAND_VERIFY_WRITE
+ /*
+ * The NAND device assumes that it is always writing to
+ * a cleanly erased page. Hence, it performs its internal
+ * write verification only on bits that transitioned from
+ * 1 to 0. The device does NOT verify the whole page on a
+ * byte by byte basis. It is possible that the page was
+ * not completely erased or the page is becoming unusable
+ * due to wear. The read with ECC would catch the error
+ * later when the ECC page check fails, but we would rather
+ * catch it early in the page write stage. Better to write
+ * no data than invalid data.
+ */
+
+ /* Send command to read back the page */
+ if (col < nand->eccsize)
+ NanD_Command (nand, NAND_CMD_READ0);
+ else
+ NanD_Command (nand, NAND_CMD_READ1);
+ if (nand->bus16) {
+ NanD_Address (nand, ADDR_COLUMN_PAGE,
+ (page << nand->page_shift) + (col >> 1));
+ } else {
+ NanD_Address (nand, ADDR_COLUMN_PAGE,
+ (page << nand->page_shift) + col);
+ }
+
+ /* Loop through and verify the data */
+ if (nand->bus16) {
+ for (i = col; i < last; i = +2) {
+ if ((nand->data_buf[i] +
+ (nand->data_buf[i + 1] << 8)) != READ_NAND (nand->IO_ADDR)) {
+ printf ("%s: Failed write verify, page 0x%08x ",
+ __FUNCTION__, page);
+ return -1;
+ }
+ }
+ } else {
+ for (i = col; i < last; i++) {
+ if (nand->data_buf[i] != READ_NAND (nand->IO_ADDR)) {
+ printf ("%s: Failed write verify, page 0x%08x ",
+ __FUNCTION__, page);
+ return -1;
+ }
+ }
+ }
+
+#ifdef CONFIG_MTD_NAND_ECC
+ /*
+ * We also want to check that the ECC bytes wrote
+ * correctly for the same reasons stated above.
+ */
+ NanD_Command (nand, NAND_CMD_READOOB);
+ if (nand->bus16) {
+ NanD_Address (nand, ADDR_COLUMN_PAGE,
+ (page << nand->page_shift) + (col >> 1));
+ } else {
+ NanD_Address (nand, ADDR_COLUMN_PAGE,
+ (page << nand->page_shift) + col);
+ }
+ if (nand->bus16) {
+ for (i = 0; i < nand->oobsize; i += 2) {
+ u16 val;
+
+ val = READ_NAND (nand->IO_ADDR);
+ nand->data_buf[i] = val & 0xff;
+ nand->data_buf[i + 1] = val >> 8;
+ }
+ } else {
+ for (i = 0; i < nand->oobsize; i++) {
+ nand->data_buf[i] = READ_NAND (nand->IO_ADDR);
+ }
+ }
+ for (i = 0; i < ecc_bytes; i++) {
+ if ((nand->data_buf[(oob_config.ecc_pos[i])] != ecc_code[i]) && ecc_code[i]) {
+ printf ("%s: Failed ECC write "
+ "verify, page 0x%08x, "
+ "%6i bytes were succesful\n",
+ __FUNCTION__, page, i);
+ return -1;
+ }
+ }
+#endif /* CONFIG_MTD_NAND_ECC */
+#endif /* CONFIG_MTD_NAND_VERIFY_WRITE */
+ return 0;
+}
+
+static int nand_write_ecc (struct nand_chip* nand, size_t to, size_t len,
+ size_t * retlen, const u_char * buf, u_char * ecc_code)
+{
+ int i, page, col, cnt, ret = 0;
+
+ /* Do not allow write past end of device */
+ if ((to + len) > nand->totlen) {
+ printf ("%s: Attempt to write past end of page\n", __FUNCTION__);
+ return -1;
+ }
+
+ /* Shift to get page */
+ page = ((int) to) >> nand->page_shift;
+
+ /* Get the starting column */
+ col = to & (nand->oobblock - 1);
+
+ /* Initialize return length value */
+ *retlen = 0;
+
+ /* Select the NAND device */
+#ifdef CONFIG_OMAP1510
+ archflashwp(0,0);
+#endif
+#ifdef CFG_NAND_WP
+ NAND_WP_OFF();
+#endif
+
+ NAND_ENABLE_CE(nand); /* set pin low */
+
+ /* Check the WP bit */
+ NanD_Command(nand, NAND_CMD_STATUS);
+ if (!(READ_NAND(nand->IO_ADDR) & 0x80)) {
+ printf ("%s: Device is write protected!!!\n", __FUNCTION__);
+ ret = -1;
+ goto out;
+ }
+
+ /* Loop until all data is written */
+ while (*retlen < len) {
+ /* Invalidate cache, if we write to this page */
+ if (nand->cache_page == page)
+ nand->cache_page = -1;
+
+ /* Write data into buffer */
+ if ((col + len) >= nand->oobblock) {
+ for (i = col, cnt = 0; i < nand->oobblock; i++, cnt++) {
+ nand->data_buf[i] = buf[(*retlen + cnt)];
+ }
+ } else {
+ for (i = col, cnt = 0; cnt < (len - *retlen); i++, cnt++) {
+ nand->data_buf[i] = buf[(*retlen + cnt)];
+ }
+ }
+ /* We use the same function for write and writev !) */
+ ret = nand_write_page (nand, page, col, i, ecc_code);
+ if (ret)
+ goto out;
+
+ /* Next data start at page boundary */
+ col = 0;
+
+ /* Update written bytes count */
+ *retlen += cnt;
+
+ /* Increment page address */
+ page++;
+ }
+
+ /* Return happy */
+ *retlen = len;
+
+out:
+ /* De-select the NAND device */
+ NAND_DISABLE_CE(nand); /* set pin high */
+#ifdef CONFIG_OMAP1510
+ archflashwp(0,1);
+#endif
+#ifdef CFG_NAND_WP
+ NAND_WP_ON();
+#endif
+
+ return ret;
+}
+
+/* read from the 16 bytes of oob data that correspond to a 512 byte
+ * page or 2 256-byte pages.
+ */
+int nand_read_oob(struct nand_chip* nand, size_t ofs, size_t len,
+ size_t * retlen, u_char * buf)
+{
+ int len256 = 0;
+ struct Nand *mychip;
+ int ret = 0;
+
+ mychip = &nand->chips[ofs >> nand->chipshift];
+
+ /* update address for 2M x 8bit devices. OOB starts on the second */
+ /* page to maintain compatibility with nand_read_ecc. */
+ if (nand->page256) {
+ if (!(ofs & 0x8))
+ ofs += 0x100;
+ else
+ ofs -= 0x8;
+ }
+
+ NAND_ENABLE_CE(nand); /* set pin low */
+ NanD_Command(nand, NAND_CMD_READOOB);
+ if (nand->bus16) {
+ NanD_Address(nand, ADDR_COLUMN_PAGE,
+ ((ofs >> nand->page_shift) << nand->page_shift) +
+ ((ofs & (nand->oobblock - 1)) >> 1));
+ } else {
+ NanD_Address(nand, ADDR_COLUMN_PAGE, ofs);
+ }
+
+ /* treat crossing 8-byte OOB data for 2M x 8bit devices */
+ /* Note: datasheet says it should automaticaly wrap to the */
+ /* next OOB block, but it didn't work here. mf. */
+ if (nand->page256 && ofs + len > (ofs | 0x7) + 1) {
+ len256 = (ofs | 0x7) + 1 - ofs;
+ NanD_ReadBuf(nand, buf, len256);
+
+ NanD_Command(nand, NAND_CMD_READOOB);
+ NanD_Address(nand, ADDR_COLUMN_PAGE, ofs & (~0x1ff));
+ }
+
+ NanD_ReadBuf(nand, &buf[len256], len - len256);
+
+ *retlen = len;
+ /* Reading the full OOB data drops us off of the end of the page,
+ * causing the flash device to go into busy mode, so we need
+ * to wait until ready 11.4.1 and Toshiba TC58256FT nands */
+
+ ret = NanD_WaitReady(nand, 1);
+ NAND_DISABLE_CE(nand); /* set pin high */
+
+ return ret;
+
+}
+
+/* write to the 16 bytes of oob data that correspond to a 512 byte
+ * page or 2 256-byte pages.
+ */
+int nand_write_oob(struct nand_chip* nand, size_t ofs, size_t len,
+ size_t * retlen, const u_char * buf)
+{
+ int len256 = 0;
+ int i;
+ unsigned long nandptr = nand->IO_ADDR;
+
+#ifdef PSYCHO_DEBUG
+ printf("nand_write_oob(%lx, %d): %2.2X %2.2X %2.2X %2.2X ... %2.2X %2.2X .. %2.2X %2.2X\n",
+ (long)ofs, len, buf[0], buf[1], buf[2], buf[3],
+ buf[8], buf[9], buf[14],buf[15]);
+#endif
+
+ NAND_ENABLE_CE(nand); /* set pin low to enable chip */
+
+ /* Reset the chip */
+ NanD_Command(nand, NAND_CMD_RESET);
+
+ /* issue the Read2 command to set the pointer to the Spare Data Area. */
+ NanD_Command(nand, NAND_CMD_READOOB);
+ if (nand->bus16) {
+ NanD_Address(nand, ADDR_COLUMN_PAGE,
+ ((ofs >> nand->page_shift) << nand->page_shift) +
+ ((ofs & (nand->oobblock - 1)) >> 1));
+ } else {
+ NanD_Address(nand, ADDR_COLUMN_PAGE, ofs);
+ }
+
+ /* update address for 2M x 8bit devices. OOB starts on the second */
+ /* page to maintain compatibility with nand_read_ecc. */
+ if (nand->page256) {
+ if (!(ofs & 0x8))
+ ofs += 0x100;
+ else
+ ofs -= 0x8;
+ }
+
+ /* issue the Serial Data In command to initial the Page Program process */
+ NanD_Command(nand, NAND_CMD_SEQIN);
+ if (nand->bus16) {
+ NanD_Address(nand, ADDR_COLUMN_PAGE,
+ ((ofs >> nand->page_shift) << nand->page_shift) +
+ ((ofs & (nand->oobblock - 1)) >> 1));
+ } else {
+ NanD_Address(nand, ADDR_COLUMN_PAGE, ofs);
+ }
+
+ /* treat crossing 8-byte OOB data for 2M x 8bit devices */
+ /* Note: datasheet says it should automaticaly wrap to the */
+ /* next OOB block, but it didn't work here. mf. */
+ if (nand->page256 && ofs + len > (ofs | 0x7) + 1) {
+ len256 = (ofs | 0x7) + 1 - ofs;
+ for (i = 0; i < len256; i++)
+ WRITE_NAND(buf[i], nandptr);
+
+ NanD_Command(nand, NAND_CMD_PAGEPROG);
+ NanD_Command(nand, NAND_CMD_STATUS);
+#ifdef NAND_NO_RB
+ { u_char ret_val;
+ do {
+ ret_val = READ_NAND(nandptr); /* wait till ready */
+ } while ((ret_val & 0x40) != 0x40);
+ }
+#endif
+ if (READ_NAND(nandptr) & 1) {
+ puts ("Error programming oob data\n");
+ /* There was an error */
+ NAND_DISABLE_CE(nand); /* set pin high */
+ *retlen = 0;
+ return -1;
+ }
+ NanD_Command(nand, NAND_CMD_SEQIN);
+ NanD_Address(nand, ADDR_COLUMN_PAGE, ofs & (~0x1ff));
+ }
+
+ if (nand->bus16) {
+ for (i = len256; i < len; i += 2) {
+ WRITE_NAND(buf[i] + (buf[i+1] << 8), nandptr);
+ }
+ } else {
+ for (i = len256; i < len; i++)
+ WRITE_NAND(buf[i], nandptr);
+ }
+
+ NanD_Command(nand, NAND_CMD_PAGEPROG);
+ NanD_Command(nand, NAND_CMD_STATUS);
+#ifdef NAND_NO_RB
+ { u_char ret_val;
+ do {
+ ret_val = READ_NAND(nandptr); /* wait till ready */
+ } while ((ret_val & 0x40) != 0x40);
+ }
+#endif
+ if (READ_NAND(nandptr) & 1) {
+ puts ("Error programming oob data\n");
+ /* There was an error */
+ NAND_DISABLE_CE(nand); /* set pin high */
+ *retlen = 0;
+ return -1;
+ }
+
+ NAND_DISABLE_CE(nand); /* set pin high */
+ *retlen = len;
+ return 0;
+
+}
+
+int nand_legacy_erase(struct nand_chip* nand, size_t ofs, size_t len, int clean)
+{
+ /* This is defined as a structure so it will work on any system
+ * using native endian jffs2 (the default).
+ */
+ static struct jffs2_unknown_node clean_marker = {
+ JFFS2_MAGIC_BITMASK,
+ JFFS2_NODETYPE_CLEANMARKER,
+ 8 /* 8 bytes in this node */
+ };
+ unsigned long nandptr;
+ struct Nand *mychip;
+ int ret = 0;
+
+ if (ofs & (nand->erasesize-1) || len & (nand->erasesize-1)) {
+ printf ("Offset and size must be sector aligned, erasesize = %d\n",
+ (int) nand->erasesize);
+ return -1;
+ }
+
+ nandptr = nand->IO_ADDR;
+
+ /* Select the NAND device */
+#ifdef CONFIG_OMAP1510
+ archflashwp(0,0);
+#endif
+#ifdef CFG_NAND_WP
+ NAND_WP_OFF();
+#endif
+ NAND_ENABLE_CE(nand); /* set pin low */
+
+ /* Check the WP bit */
+ NanD_Command(nand, NAND_CMD_STATUS);
+ if (!(READ_NAND(nand->IO_ADDR) & 0x80)) {
+ printf ("nand_write_ecc: Device is write protected!!!\n");
+ ret = -1;
+ goto out;
+ }
+
+ /* Check the WP bit */
+ NanD_Command(nand, NAND_CMD_STATUS);
+ if (!(READ_NAND(nand->IO_ADDR) & 0x80)) {
+ printf ("%s: Device is write protected!!!\n", __FUNCTION__);
+ ret = -1;
+ goto out;
+ }
+
+ /* FIXME: Do nand in the background. Use timers or schedule_task() */
+ while(len) {
+ /*mychip = &nand->chips[shr(ofs, nand->chipshift)];*/
+ mychip = &nand->chips[ofs >> nand->chipshift];
+
+ /* always check for bad block first, genuine bad blocks
+ * should _never_ be erased.
+ */
+ if (ALLOW_ERASE_BAD_DEBUG || !check_block(nand, ofs)) {
+ /* Select the NAND device */
+ NAND_ENABLE_CE(nand); /* set pin low */
+
+ NanD_Command(nand, NAND_CMD_ERASE1);
+ NanD_Address(nand, ADDR_PAGE, ofs);
+ NanD_Command(nand, NAND_CMD_ERASE2);
+
+ NanD_Command(nand, NAND_CMD_STATUS);
+
+#ifdef NAND_NO_RB
+ { u_char ret_val;
+ do {
+ ret_val = READ_NAND(nandptr); /* wait till ready */
+ } while ((ret_val & 0x40) != 0x40);
+ }
+#endif
+ if (READ_NAND(nandptr) & 1) {
+ printf ("%s: Error erasing at 0x%lx\n",
+ __FUNCTION__, (long)ofs);
+ /* There was an error */
+ ret = -1;
+ goto out;
+ }
+ if (clean) {
+ int n; /* return value not used */
+ int p, l;
+
+ /* clean marker position and size depend
+ * on the page size, since 256 byte pages
+ * only have 8 bytes of oob data
+ */
+ if (nand->page256) {
+ p = NAND_JFFS2_OOB8_FSDAPOS;
+ l = NAND_JFFS2_OOB8_FSDALEN;
+ } else {
+ p = NAND_JFFS2_OOB16_FSDAPOS;
+ l = NAND_JFFS2_OOB16_FSDALEN;
+ }
+
+ ret = nand_write_oob(nand, ofs + p, l, (size_t *)&n,
+ (u_char *)&clean_marker);
+ /* quit here if write failed */
+ if (ret)
+ goto out;
+ }
+ }
+ ofs += nand->erasesize;
+ len -= nand->erasesize;
+ }
+
+out:
+ /* De-select the NAND device */
+ NAND_DISABLE_CE(nand); /* set pin high */
+#ifdef CONFIG_OMAP1510
+ archflashwp(0,1);
+#endif
+#ifdef CFG_NAND_WP
+ NAND_WP_ON();
+#endif
+
+ return ret;
+}
+
+
+static inline int nandcheck(unsigned long potential, unsigned long physadr)
+{
+ return 0;
+}
+
+unsigned long nand_probe(unsigned long physadr)
+{
+ struct nand_chip *nand = NULL;
+ int i = 0, ChipID = 1;
+
+#ifdef CONFIG_MTD_NAND_ECC_JFFS2
+ oob_config.ecc_pos[0] = NAND_JFFS2_OOB_ECCPOS0;
+ oob_config.ecc_pos[1] = NAND_JFFS2_OOB_ECCPOS1;
+ oob_config.ecc_pos[2] = NAND_JFFS2_OOB_ECCPOS2;
+ oob_config.ecc_pos[3] = NAND_JFFS2_OOB_ECCPOS3;
+ oob_config.ecc_pos[4] = NAND_JFFS2_OOB_ECCPOS4;
+ oob_config.ecc_pos[5] = NAND_JFFS2_OOB_ECCPOS5;
+ oob_config.eccvalid_pos = 4;
+#else
+ oob_config.ecc_pos[0] = NAND_NOOB_ECCPOS0;
+ oob_config.ecc_pos[1] = NAND_NOOB_ECCPOS1;
+ oob_config.ecc_pos[2] = NAND_NOOB_ECCPOS2;
+ oob_config.ecc_pos[3] = NAND_NOOB_ECCPOS3;
+ oob_config.ecc_pos[4] = NAND_NOOB_ECCPOS4;
+ oob_config.ecc_pos[5] = NAND_NOOB_ECCPOS5;
+ oob_config.eccvalid_pos = NAND_NOOB_ECCVPOS;
+#endif
+ oob_config.badblock_pos = 5;
+
+ for (i=0; i<CFG_MAX_NAND_DEVICE; i++) {
+ if (nand_dev_desc[i].ChipID == NAND_ChipID_UNKNOWN) {
+ nand = &nand_dev_desc[i];
+ break;
+ }
+ }
+ if (!nand)
+ return (0);
+
+ memset((char *)nand, 0, sizeof(struct nand_chip));
+
+ nand->IO_ADDR = physadr;
+ nand->cache_page = -1; /* init the cache page */
+ NanD_ScanChips(nand);
+
+ if (nand->totlen == 0) {
+ /* no chips found, clean up and quit */
+ memset((char *)nand, 0, sizeof(struct nand_chip));
+ nand->ChipID = NAND_ChipID_UNKNOWN;
+ return (0);
+ }
+
+ nand->ChipID = ChipID;
+ if (curr_device == -1)
+ curr_device = i;
+
+ nand->data_buf = malloc (nand->oobblock + nand->oobsize);
+ if (!nand->data_buf) {
+ puts ("Cannot allocate memory for data structures.\n");
+ return (0);
+ }
+
+ return (nand->totlen);
+}
+
+#ifdef CONFIG_MTD_NAND_ECC
+/*
+ * Pre-calculated 256-way 1 byte column parity
+ */
+static const u_char nand_ecc_precalc_table[] = {
+ 0x00, 0x55, 0x56, 0x03, 0x59, 0x0c, 0x0f, 0x5a,
+ 0x5a, 0x0f, 0x0c, 0x59, 0x03, 0x56, 0x55, 0x00,
+ 0x65, 0x30, 0x33, 0x66, 0x3c, 0x69, 0x6a, 0x3f,
+ 0x3f, 0x6a, 0x69, 0x3c, 0x66, 0x33, 0x30, 0x65,
+ 0x66, 0x33, 0x30, 0x65, 0x3f, 0x6a, 0x69, 0x3c,
+ 0x3c, 0x69, 0x6a, 0x3f, 0x65, 0x30, 0x33, 0x66,
+ 0x03, 0x56, 0x55, 0x00, 0x5a, 0x0f, 0x0c, 0x59,
+ 0x59, 0x0c, 0x0f, 0x5a, 0x00, 0x55, 0x56, 0x03,
+ 0x69, 0x3c, 0x3f, 0x6a, 0x30, 0x65, 0x66, 0x33,
+ 0x33, 0x66, 0x65, 0x30, 0x6a, 0x3f, 0x3c, 0x69,
+ 0x0c, 0x59, 0x5a, 0x0f, 0x55, 0x00, 0x03, 0x56,
+ 0x56, 0x03, 0x00, 0x55, 0x0f, 0x5a, 0x59, 0x0c,
+ 0x0f, 0x5a, 0x59, 0x0c, 0x56, 0x03, 0x00, 0x55,
+ 0x55, 0x00, 0x03, 0x56, 0x0c, 0x59, 0x5a, 0x0f,
+ 0x6a, 0x3f, 0x3c, 0x69, 0x33, 0x66, 0x65, 0x30,
+ 0x30, 0x65, 0x66, 0x33, 0x69, 0x3c, 0x3f, 0x6a,
+ 0x6a, 0x3f, 0x3c, 0x69, 0x33, 0x66, 0x65, 0x30,
+ 0x30, 0x65, 0x66, 0x33, 0x69, 0x3c, 0x3f, 0x6a,
+ 0x0f, 0x5a, 0x59, 0x0c, 0x56, 0x03, 0x00, 0x55,
+ 0x55, 0x00, 0x03, 0x56, 0x0c, 0x59, 0x5a, 0x0f,
+ 0x0c, 0x59, 0x5a, 0x0f, 0x55, 0x00, 0x03, 0x56,
+ 0x56, 0x03, 0x00, 0x55, 0x0f, 0x5a, 0x59, 0x0c,
+ 0x69, 0x3c, 0x3f, 0x6a, 0x30, 0x65, 0x66, 0x33,
+ 0x33, 0x66, 0x65, 0x30, 0x6a, 0x3f, 0x3c, 0x69,
+ 0x03, 0x56, 0x55, 0x00, 0x5a, 0x0f, 0x0c, 0x59,
+ 0x59, 0x0c, 0x0f, 0x5a, 0x00, 0x55, 0x56, 0x03,
+ 0x66, 0x33, 0x30, 0x65, 0x3f, 0x6a, 0x69, 0x3c,
+ 0x3c, 0x69, 0x6a, 0x3f, 0x65, 0x30, 0x33, 0x66,
+ 0x65, 0x30, 0x33, 0x66, 0x3c, 0x69, 0x6a, 0x3f,
+ 0x3f, 0x6a, 0x69, 0x3c, 0x66, 0x33, 0x30, 0x65,
+ 0x00, 0x55, 0x56, 0x03, 0x59, 0x0c, 0x0f, 0x5a,
+ 0x5a, 0x0f, 0x0c, 0x59, 0x03, 0x56, 0x55, 0x00
+};
+
+
+/*
+ * Creates non-inverted ECC code from line parity
+ */
+static void nand_trans_result(u_char reg2, u_char reg3,
+ u_char *ecc_code)
+{
+ u_char a, b, i, tmp1, tmp2;
+
+ /* Initialize variables */
+ a = b = 0x80;
+ tmp1 = tmp2 = 0;
+
+ /* Calculate first ECC byte */
+ for (i = 0; i < 4; i++) {
+ if (reg3 & a) /* LP15,13,11,9 --> ecc_code[0] */
+ tmp1 |= b;
+ b >>= 1;
+ if (reg2 & a) /* LP14,12,10,8 --> ecc_code[0] */
+ tmp1 |= b;
+ b >>= 1;
+ a >>= 1;
+ }
+
+ /* Calculate second ECC byte */
+ b = 0x80;
+ for (i = 0; i < 4; i++) {
+ if (reg3 & a) /* LP7,5,3,1 --> ecc_code[1] */
+ tmp2 |= b;
+ b >>= 1;
+ if (reg2 & a) /* LP6,4,2,0 --> ecc_code[1] */
+ tmp2 |= b;
+ b >>= 1;
+ a >>= 1;
+ }
+
+ /* Store two of the ECC bytes */
+ ecc_code[0] = tmp1;
+ ecc_code[1] = tmp2;
+}
+
+/*
+ * Calculate 3 byte ECC code for 256 byte block
+ */
+static void nand_calculate_ecc (const u_char *dat, u_char *ecc_code)
+{
+ u_char idx, reg1, reg3;
+ int j;
+
+ /* Initialize variables */
+ reg1 = reg3 = 0;
+ ecc_code[0] = ecc_code[1] = ecc_code[2] = 0;
+
+ /* Build up column parity */
+ for(j = 0; j < 256; j++) {
+
+ /* Get CP0 - CP5 from table */
+ idx = nand_ecc_precalc_table[dat[j]];
+ reg1 ^= idx;
+
+ /* All bit XOR = 1 ? */
+ if (idx & 0x40) {
+ reg3 ^= (u_char) j;
+ }
+ }
+
+ /* Create non-inverted ECC code from line parity */
+ nand_trans_result((reg1 & 0x40) ? ~reg3 : reg3, reg3, ecc_code);
+
+ /* Calculate final ECC code */
+ ecc_code[0] = ~ecc_code[0];
+ ecc_code[1] = ~ecc_code[1];
+ ecc_code[2] = ((~reg1) << 2) | 0x03;
+}
+
+/*
+ * Detect and correct a 1 bit error for 256 byte block
+ */
+static int nand_correct_data (u_char *dat, u_char *read_ecc, u_char *calc_ecc)
+{
+ u_char a, b, c, d1, d2, d3, add, bit, i;
+
+ /* Do error detection */
+ d1 = calc_ecc[0] ^ read_ecc[0];
+ d2 = calc_ecc[1] ^ read_ecc[1];
+ d3 = calc_ecc[2] ^ read_ecc[2];
+
+ if ((d1 | d2 | d3) == 0) {
+ /* No errors */
+ return 0;
+ } else {
+ a = (d1 ^ (d1 >> 1)) & 0x55;
+ b = (d2 ^ (d2 >> 1)) & 0x55;
+ c = (d3 ^ (d3 >> 1)) & 0x54;
+
+ /* Found and will correct single bit error in the data */
+ if ((a == 0x55) && (b == 0x55) && (c == 0x54)) {
+ c = 0x80;
+ add = 0;
+ a = 0x80;
+ for (i=0; i<4; i++) {
+ if (d1 & c)
+ add |= a;
+ c >>= 2;
+ a >>= 1;
+ }
+ c = 0x80;
+ for (i=0; i<4; i++) {
+ if (d2 & c)
+ add |= a;
+ c >>= 2;
+ a >>= 1;
+ }
+ bit = 0;
+ b = 0x04;
+ c = 0x80;
+ for (i=0; i<3; i++) {
+ if (d3 & c)
+ bit |= b;
+ c >>= 2;
+ b >>= 1;
+ }
+ b = 0x01;
+ a = dat[add];
+ a ^= (b << bit);
+ dat[add] = a;
+ return 1;
+ }
+ else {
+ i = 0;
+ while (d1) {
+ if (d1 & 0x01)
+ ++i;
+ d1 >>= 1;
+ }
+ while (d2) {
+ if (d2 & 0x01)
+ ++i;
+ d2 >>= 1;
+ }
+ while (d3) {
+ if (d3 & 0x01)
+ ++i;
+ d3 >>= 1;
+ }
+ if (i == 1) {
+ /* ECC Code Error Correction */
+ read_ecc[0] = calc_ecc[0];
+ read_ecc[1] = calc_ecc[1];
+ read_ecc[2] = calc_ecc[2];
+ return 2;
+ }
+ else {
+ /* Uncorrectable Error */
+ return -1;
+ }
+ }
+ }
+
+ /* Should never happen */
+ return -1;
+}
+
+#endif
+
+#ifdef CONFIG_JFFS2_NAND
+int read_jffs2_nand(size_t start, size_t len,
+ size_t * retlen, u_char * buf, int nanddev)
+{
+ return nand_legacy_rw(nand_dev_desc + nanddev, NANDRW_READ | NANDRW_JFFS2,
+ start, len, retlen, buf);
+}
+#endif /* CONFIG_JFFS2_NAND */
+
+#endif /* (CONFIG_COMMANDS & CFG_CMD_NAND) && defined(CFG_NAND_LEGACY) */
diff --git a/drivers/netconsole.c b/drivers/netconsole.c
index 9a0a24f3ac..69089f92ce 100644
--- a/drivers/netconsole.c
+++ b/drivers/netconsole.c
@@ -29,6 +29,8 @@
#include <devices.h>
#include <net.h>
+DECLARE_GLOBAL_DATA_PTR;
+
static char input_buffer[512];
static int input_size = 0; /* char count in input buffer */
static int input_offset = 0; /* offset to valid chars in input buffer */
@@ -105,8 +107,6 @@ int nc_input_packet (uchar * pkt, unsigned dest, unsigned src, unsigned len)
static void nc_send_packet (const char *buf, int len)
{
- DECLARE_GLOBAL_DATA_PTR;
-
struct eth_device *eth;
int inited = 0;
uchar *pkt;
diff --git a/drivers/ns16550.c b/drivers/ns16550.c
index 2429464d89..b43ebc3097 100644
--- a/drivers/ns16550.c
+++ b/drivers/ns16550.c
@@ -1,4 +1,9 @@
/*
+ * This file is licensed under
+ * the terms of the GNU General Public License version 2. This program
+ * is licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ *
* COM1 NS16550 support
* originally from linux source (arch/ppc/boot/ns16550.c)
* modified to use CFG_ISA_MEM and new defines
diff --git a/drivers/ns9750_serial.c b/drivers/ns9750_serial.c
index aced3dae8e..8dff367745 100644
--- a/drivers/ns9750_serial.c
+++ b/drivers/ns9750_serial.c
@@ -33,6 +33,8 @@
#include "ns9750_bbus.h" /* for GPIOs */
#include "ns9750_ser.h" /* for serial configuration */
+DECLARE_GLOBAL_DATA_PTR;
+
#define CONSOLE CONFIG_CONS_INDEX
static unsigned int calcBitrateRegister( void );
@@ -183,8 +185,6 @@ void serial_setbrg( void )
static unsigned int calcBitrateRegister( void )
{
- DECLARE_GLOBAL_DATA_PTR;
-
return ( NS9750_SER_BITRATE_EBIT |
NS9750_SER_BITRATE_CLKMUX_BCLK |
NS9750_SER_BITRATE_TMODE |
@@ -204,8 +204,6 @@ static unsigned int calcBitrateRegister( void )
static unsigned int calcRxCharGapRegister( void )
{
- DECLARE_GLOBAL_DATA_PTR;
-
return NS9750_SER_RX_CHAR_TIMER_TRUN;
}
diff --git a/drivers/omap24xx_i2c.c b/drivers/omap24xx_i2c.c
index 7dab78685d..8fe641f810 100644
--- a/drivers/omap24xx_i2c.c
+++ b/drivers/omap24xx_i2c.c
@@ -22,72 +22,211 @@
#include <common.h>
-#ifdef CONFIG_DRIVER_OMAP24XX_I2C
+#if defined(CONFIG_DRIVER_OMAP24XX_I2C) || defined(CONFIG_DRIVER_OMAP34XX_I2C)
#include <asm/arch/i2c.h>
#include <asm/io.h>
+#include <i2c.h>
-#define inw(a) __raw_readw(a)
-#define outw(a,v) __raw_writew(a,v)
+static u32 i2c_base = I2C_DEFAULT_BASE;
+static u32 i2c_speed = CFG_I2C_SPEED;
-static void wait_for_bb (void);
-static u16 wait_for_pin (void);
+//#define DEBUG
+
+#if DEBUG
+
+#define DBG(ARGS...) {printf ("[%d]",__LINE__);printf(ARGS);}
+#define inb(a) ({u8 v=__raw_readb(i2c_base + (a));printf("%d:Rb[%x<=%x]\n",__LINE__,a,v);v;})
+#define outb(v,a) {printf("%d:Wb[%x<=%x]\n",__LINE__,a,v);__raw_writeb((v), (i2c_base + (a)));}
+#define inw(a) ({u16 v=__raw_readb(i2c_base + (a));printf("%d:Rw[%x<=%x]\n",__LINE__,a,v);v;})
+#define outw(v,a) {printf("%d:Ww[%x<=%x]\n",__LINE__,a,v);__raw_writew((v), (i2c_base + (a)));}
+
+#else
+#define DBG(ARGS...)
+#define inb(a) __raw_readb(i2c_base + (a))
+#define outb(v,a) __raw_writeb((v), (i2c_base + (a)))
+#define inw(a) __raw_readw(i2c_base +(a))
+#define outw(v,a) __raw_writew((v), (i2c_base + (a)))
+#endif
+
+static void wait_for_bb(void);
+static u16 wait_for_pin(void);
static void flush_fifo(void);
-void i2c_init (int speed, int slaveadd)
+#ifdef CONFIG_OMAP34XX
+#define I2C_NUM_IF 3
+#else
+#define I2C_NUM_IF 2
+#endif
+
+int select_bus(int bus, int speed)
+{
+ if ((bus < 0) || (bus >= I2C_NUM_IF)) {
+ printf("Bad bus ID-%d\n", bus);
+ return -1;
+ }
+
+#if defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX)
+ /* Check speed */
+ if ((speed != OMAP_I2C_STANDARD) && (speed != OMAP_I2C_FAST_MODE)
+ && (speed != OMAP_I2C_HIGH_SPEED)) {
+ printf("Invalid Speed for i2c init-%d\n", speed);
+ return -1;
+ }
+#else
+ if ((speed != OMAP_I2C_STANDARD) && (speed != OMAP_I2C_FAST_MODE)) {
+ printf("Invalid Speed for i2c init-%d\n", speed);
+ return -1;
+ }
+#endif
+
+#if defined(CONFIG_OMAP34XX)
+ if (bus == 2)
+ i2c_base = I2C_BASE3;
+ else
+#endif
+ if (bus == 1)
+ i2c_base = I2C_BASE2;
+ else
+ i2c_base = I2C_BASE1;
+
+ i2c_init(speed, CFG_I2C_SLAVE);
+ return 0;
+}
+
+void i2c_init(int speed, int slaveadd)
{
- u16 scl;
+ int scl_lh = 0;
+ int psc = 0;
+ int iclk = 0;
+
+ /* assume clock settings done */
+ /* write to clock regs to enable if and fun clks for board */
+#if defined(CONFIG_OMAP243X)
+ {
+ u32 v = 0;
+
+ v = __raw_readl(CM_ICLKEN1_CORE) | (0x3 << 19); /* Interface clocks on */
+ __raw_writel(v, CM_ICLKEN1_CORE);
+ v = __raw_readl(CM_FCLKEN1_CORE) & ~(0x3 << 19);
+ __raw_writel(v, CM_FCLKEN1_CORE);
+ v = __raw_readl(CM_FCLKEN2_CORE) | (0x3 << 19); /* Functional Clocks on */
+ __raw_writel(v, CM_FCLKEN2_CORE);
+ }
+#endif /* End of 243x code */
- outw(0x2, I2C_SYSC); /* for ES2 after soft reset */
+ outw(0x2, I2C_SYSC); /* for ES2 after soft reset */
udelay(1000);
- outw(0x0, I2C_SYSC); /* will probably self clear but */
+ outw(0x0, I2C_SYSC); /* will probably self clear but */
- if (inw (I2C_CON) & I2C_CON_EN) {
- outw (0, I2C_CON);
- udelay (50000);
+ if (inw(I2C_CON) & I2C_CON_EN) {
+ outw(0, I2C_CON);
+ udelay(50000);
+ }
+ /* compute divisors - dynamic decision based on i/p clock */
+ psc = I2C_PSC_MAX;
+ while (psc >= I2C_PSC_MIN) {
+ iclk = I2C_IP_CLK / (psc + 1);
+ switch (speed) {
+ case OMAP_I2C_STANDARD:
+ scl_lh = (iclk * 10 / (OMAP_I2C_STANDARD * 2));
+ break;
+ case OMAP_I2C_HIGH_SPEED:
+ /* PSC ignored for HS */
+ case OMAP_I2C_FAST_MODE:
+ scl_lh = (iclk * 10 / (OMAP_I2C_FAST_MODE * 2));
+ break;
+ /* no default case - fall thru */
+ }
+ DBG("Search- speed= %d SysClk=%d, iclk=%d,psc=0x%x[%d],scl_lh=0x%x[%d]\n",
+ speed, I2C_IP_CLK, iclk, psc, psc, scl_lh, scl_lh);
+ /* Check for decimal places.. if yes, we ignore it */
+ if (scl_lh % 10) {
+ scl_lh = -1;
+ } else {
+ scl_lh /= 10;
+ scl_lh -= 7;
+ }
+ if (scl_lh >= 0) {
+ break;
+ }
+ psc--;
}
+ /* Did not find an optimal config */
+ if (psc < I2C_PSC_MIN) {
+ printf
+ ("Unable to set Prescalar for i2c_clock=%d syI2C_IP_CLK=%d\n",
+ speed, I2C_IP_CLK);
+ psc = 0;
+ return;
- /* 12Mhz I2C module clock */
- outw (0, I2C_PSC);
- speed = speed/1000; /* 100 or 400 */
- scl = ((12000/(speed*2)) - 7); /* use 7 when PSC = 0 */
- outw (scl, I2C_SCLL);
- outw (scl, I2C_SCLH);
+ }
+ iclk = I2C_IP_CLK / (psc + 1);
+ /* Initialize the I2C clock timers to generate an I2C bus clock
+ * frequency of i2c_clock kilohertz (default is 100 KHz).
+ */
+ switch (speed) {
+ case OMAP_I2C_STANDARD:
+ scl_lh =
+ (((iclk / (OMAP_I2C_STANDARD * 2)) - 7) &
+ I2C_SCLL_SCLL_M) << I2C_SCLL_SCLL;
+ break;
+ case OMAP_I2C_HIGH_SPEED:
+ scl_lh =
+ (((I2C_IP_CLK / (OMAP_I2C_HIGH_SPEED * 2)) - 7) &
+ I2C_SCLH_HSSCLL_M) << I2C_SCLL_HSSCLL;
+ /* Fall through for the FS settings */
+ case OMAP_I2C_FAST_MODE:
+ scl_lh |=
+ (((iclk / (OMAP_I2C_FAST_MODE * 2)) - 7) &
+ I2C_SCLL_SCLL_M) << I2C_SCLL_SCLL;
+ break;
+ /* no default case */
+ }
+
+ DBG(" speed= %d SysClk=%d, iclk=%d,psc=0x%x[%d],scl_lh=0x%x[%d]\n",
+ speed, I2C_IP_CLK, iclk, psc, psc, scl_lh, scl_lh);
+
+ outw(psc, I2C_PSC);
+ outw(scl_lh, I2C_SCLL);
+ outw(scl_lh, I2C_SCLH);
/* own address */
- outw (slaveadd, I2C_OA);
- outw (I2C_CON_EN, I2C_CON);
+ outw(slaveadd, I2C_OA);
+ outw(I2C_CON_EN, I2C_CON);
/* have to enable intrrupts or OMAP i2c module doesn't work */
- outw (I2C_IE_XRDY_IE | I2C_IE_RRDY_IE | I2C_IE_ARDY_IE |
- I2C_IE_NACK_IE | I2C_IE_AL_IE, I2C_IE);
- udelay (1000);
+ outw(I2C_IE_XRDY_IE | I2C_IE_RRDY_IE | I2C_IE_ARDY_IE |
+ I2C_IE_NACK_IE | I2C_IE_AL_IE, I2C_IE);
+ udelay(1000);
flush_fifo();
- outw (0xFFFF, I2C_STAT);
- outw (0, I2C_CNT);
+ outw(0xFFFF, I2C_STAT);
+ outw(0, I2C_CNT);
+ i2c_speed = speed;
}
-static int i2c_read_byte (u8 devaddr, u8 regoffset, u8 * value)
+static int i2c_read_byte(u8 devaddr, u8 regoffset, u8 * value)
{
int i2c_error = 0;
u16 status;
/* wait until bus not busy */
- wait_for_bb ();
+ wait_for_bb();
/* one byte only */
- outw (1, I2C_CNT);
+ outw(1, I2C_CNT);
/* set slave address */
- outw (devaddr, I2C_SA);
+ outw(devaddr, I2C_SA);
/* no stop bit needed here */
- outw (I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_TRX, I2C_CON);
+ outw(I2C_CON_EN | ((i2c_speed == OMAP_I2C_HIGH_SPEED) ? 0x1 << 12 : 0) |
+ I2C_CON_MST | I2C_CON_STT | I2C_CON_TRX, I2C_CON);
- status = wait_for_pin ();
+ status = wait_for_pin();
if (status & I2C_STAT_XRDY) {
/* Important: have to use byte access */
- *(volatile u8 *) (I2C_DATA) = regoffset;
- udelay (20000);
- if (inw (I2C_STAT) & I2C_STAT_NACK) {
+ outb(regoffset, I2C_DATA);
+ udelay(20000);
+ if (inw(I2C_STAT) & I2C_STAT_NACK) {
i2c_error = 1;
}
} else {
@@ -95,166 +234,199 @@ static int i2c_read_byte (u8 devaddr, u8 regoffset, u8 * value)
}
if (!i2c_error) {
+ int err = 10;
/* free bus, otherwise we can't use a combined transction */
- outw (0, I2C_CON);
- while (inw (I2C_STAT) || (inw (I2C_CON) & I2C_CON_MST)) {
- udelay (10000);
+ outw(0, I2C_CON);
+ while (inw(I2C_STAT) || (inw(I2C_CON) & I2C_CON_MST)) {
+ udelay(10000);
/* Have to clear pending interrupt to clear I2C_STAT */
- outw (0xFFFF, I2C_STAT);
+ outw(0xFFFF, I2C_STAT);
+ if (!err--) {
+ break;
+ }
}
- wait_for_bb ();
+ wait_for_bb();
/* set slave address */
- outw (devaddr, I2C_SA);
+ outw(devaddr, I2C_SA);
/* read one byte from slave */
- outw (1, I2C_CNT);
+ outw(1, I2C_CNT);
/* need stop bit here */
- outw (I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_STP,
- I2C_CON);
+ outw(I2C_CON_EN |
+ ((i2c_speed ==
+ OMAP_I2C_HIGH_SPEED) ? 0x1 << 12 : 0) | I2C_CON_MST |
+ I2C_CON_STT | I2C_CON_STP, I2C_CON);
- status = wait_for_pin ();
+ status = wait_for_pin();
if (status & I2C_STAT_RRDY) {
- *value = inw (I2C_DATA);
- udelay (20000);
+#if defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX)
+ *value = inb(I2C_DATA);
+#else
+ *value = inw(I2C_DATA);
+#endif
+ udelay(20000);
} else {
i2c_error = 1;
}
if (!i2c_error) {
- outw (I2C_CON_EN, I2C_CON);
- while (inw (I2C_STAT)
- || (inw (I2C_CON) & I2C_CON_MST)) {
- udelay (10000);
- outw (0xFFFF, I2C_STAT);
+ int err = 10;
+ outw(I2C_CON_EN, I2C_CON);
+ while (inw(I2C_STAT)
+ || (inw(I2C_CON) & I2C_CON_MST)) {
+ udelay(10000);
+ outw(0xFFFF, I2C_STAT);
+ if (!err--) {
+ break;
+ }
}
}
}
flush_fifo();
- outw (0xFFFF, I2C_STAT);
- outw (0, I2C_CNT);
+ outw(0xFFFF, I2C_STAT);
+ outw(0, I2C_CNT);
return i2c_error;
}
-static int i2c_write_byte (u8 devaddr, u8 regoffset, u8 value)
+static int i2c_write_byte(u8 devaddr, u8 regoffset, u8 value)
{
int i2c_error = 0;
u16 status, stat;
/* wait until bus not busy */
- wait_for_bb ();
+ wait_for_bb();
/* two bytes */
- outw (2, I2C_CNT);
+ outw(2, I2C_CNT);
/* set slave address */
- outw (devaddr, I2C_SA);
+ outw(devaddr, I2C_SA);
/* stop bit needed here */
- outw (I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_TRX |
- I2C_CON_STP, I2C_CON);
+ outw(I2C_CON_EN | ((i2c_speed == OMAP_I2C_HIGH_SPEED) ? 0x1 << 12 : 0) |
+ I2C_CON_MST | I2C_CON_STT | I2C_CON_TRX | I2C_CON_STP, I2C_CON);
/* wait until state change */
- status = wait_for_pin ();
+ status = wait_for_pin();
if (status & I2C_STAT_XRDY) {
- /* send out two bytes */
- outw ((value << 8) + regoffset, I2C_DATA);
+#if defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX)
+ /* send out 1 byte */
+ outb(regoffset, I2C_DATA);
+ outw(I2C_STAT_XRDY, I2C_STAT);
+ status = wait_for_pin();
+ if ((status & I2C_STAT_XRDY)) {
+ /* send out next 1 byte */
+ outb(value, I2C_DATA);
+ outw(I2C_STAT_XRDY, I2C_STAT);
+ } else {
+ i2c_error = 1;
+ }
+#else
+ /* send out 2 bytes */
+ outw((value << 8) | regoffset, I2C_DATA);
+#endif
/* must have enough delay to allow BB bit to go low */
- udelay (50000);
- if (inw (I2C_STAT) & I2C_STAT_NACK) {
+ udelay(50000);
+ if (inw(I2C_STAT) & I2C_STAT_NACK) {
i2c_error = 1;
}
} else {
i2c_error = 1;
}
-
if (!i2c_error) {
int eout = 200;
- outw (I2C_CON_EN, I2C_CON);
- while ((stat = inw (I2C_STAT)) || (inw (I2C_CON) & I2C_CON_MST)) {
- udelay (1000);
+ outw(I2C_CON_EN, I2C_CON);
+ while ((stat = inw(I2C_STAT)) || (inw(I2C_CON) & I2C_CON_MST)) {
+ udelay(1000);
/* have to read to clear intrrupt */
- outw (0xFFFF, I2C_STAT);
- if(--eout == 0) /* better leave with error than hang */
+ outw(0xFFFF, I2C_STAT);
+ if (--eout == 0) /* better leave with error than hang */
break;
}
}
flush_fifo();
- outw (0xFFFF, I2C_STAT);
- outw (0, I2C_CNT);
+ outw(0xFFFF, I2C_STAT);
+ outw(0, I2C_CNT);
return i2c_error;
}
static void flush_fifo(void)
-{ u16 stat;
+{
+ u16 stat;
/* note: if you try and read data when its not there or ready
* you get a bus error
*/
- while(1){
+ while (1) {
stat = inw(I2C_STAT);
- if(stat == I2C_STAT_RRDY){
+ if (stat == I2C_STAT_RRDY) {
+#if defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX)
+ inb(I2C_DATA);
+#else
inw(I2C_DATA);
- outw(I2C_STAT_RRDY,I2C_STAT);
+#endif
+ outw(I2C_STAT_RRDY, I2C_STAT);
udelay(1000);
- }else
+ } else
break;
}
}
-int i2c_probe (uchar chip)
+int i2c_probe(uchar chip)
{
- int res = 1; /* default = fail */
+ int res = 1; /* default = fail */
- if (chip == inw (I2C_OA)) {
+ if (chip == inw(I2C_OA)) {
return res;
}
/* wait until bus not busy */
- wait_for_bb ();
+ wait_for_bb();
/* try to read one byte */
- outw (1, I2C_CNT);
+ outw(1, I2C_CNT);
/* set slave address */
- outw (chip, I2C_SA);
+ outw(chip, I2C_SA);
/* stop bit needed here */
- outw (I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_STP, I2C_CON);
+ outw(I2C_CON_EN | ((i2c_speed == OMAP_I2C_HIGH_SPEED) ? 0x1 << 12 : 0) |
+ I2C_CON_MST | I2C_CON_STT | I2C_CON_STP, I2C_CON);
/* enough delay for the NACK bit set */
- udelay (50000);
+ udelay(50000);
- if (!(inw (I2C_STAT) & I2C_STAT_NACK)) {
- res = 0; /* success case */
+ if (!(inw(I2C_STAT) & I2C_STAT_NACK)) {
+ res = 0; /* success case */
flush_fifo();
outw(0xFFFF, I2C_STAT);
} else {
- outw(0xFFFF, I2C_STAT); /* failue, clear sources*/
- outw (inw (I2C_CON) | I2C_CON_STP, I2C_CON); /* finish up xfer */
+ outw(0xFFFF, I2C_STAT); /* failue, clear sources */
+ outw(inw(I2C_CON) | I2C_CON_STP, I2C_CON); /* finish up xfer */
udelay(20000);
- wait_for_bb ();
+ wait_for_bb();
}
flush_fifo();
- outw (0, I2C_CNT); /* don't allow any more data in...we don't want it.*/
+ outw(0, I2C_CNT); /* don't allow any more data in...we don't want it. */
outw(0xFFFF, I2C_STAT);
return res;
}
-int i2c_read (uchar chip, uint addr, int alen, uchar * buffer, int len)
+int i2c_read(uchar chip, uint addr, int alen, uchar * buffer, int len)
{
int i;
if (alen > 1) {
- printf ("I2C read: addr len %d not supported\n", alen);
+ printf("I2C read: addr len %d not supported\n", alen);
return 1;
}
if (addr + len > 256) {
- printf ("I2C read: address out of range\n");
+ printf("I2C read: address out of range\n");
return 1;
}
for (i = 0; i < len; i++) {
- if (i2c_read_byte (chip, addr + i, &buffer[i])) {
- printf ("I2C read: I/O error\n");
- i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
+ if (i2c_read_byte(chip, addr + i, &buffer[i])) {
+ printf("I2C read: I/O error\n");
+ i2c_init(i2c_speed, CFG_I2C_SLAVE);
return 1;
}
}
@@ -262,24 +434,24 @@ int i2c_read (uchar chip, uint addr, int alen, uchar * buffer, int len)
return 0;
}
-int i2c_write (uchar chip, uint addr, int alen, uchar * buffer, int len)
+int i2c_write(uchar chip, uint addr, int alen, uchar * buffer, int len)
{
int i;
if (alen > 1) {
- printf ("I2C read: addr len %d not supported\n", alen);
+ printf("I2C read: addr len %d not supported\n", alen);
return 1;
}
if (addr + len > 256) {
- printf ("I2C read: address out of range\n");
+ printf("I2C read: address out of range\n");
return 1;
}
for (i = 0; i < len; i++) {
- if (i2c_write_byte (chip, addr + i, buffer[i])) {
- printf ("I2C read: I/O error\n");
- i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
+ if (i2c_write_byte(chip, addr + i, buffer[i])) {
+ printf("I2C read: I/O error\n");
+ i2c_init(i2c_speed, CFG_I2C_SLAVE);
return 1;
}
}
@@ -287,43 +459,43 @@ int i2c_write (uchar chip, uint addr, int alen, uchar * buffer, int len)
return 0;
}
-static void wait_for_bb (void)
+static void wait_for_bb(void)
{
int timeout = 10;
u16 stat;
- outw(0xFFFF, I2C_STAT); /* clear current interruts...*/
- while ((stat = inw (I2C_STAT) & I2C_STAT_BB) && timeout--) {
- outw (stat, I2C_STAT);
- udelay (50000);
+ outw(0xFFFF, I2C_STAT); /* clear current interruts... */
+ while ((stat = inw(I2C_STAT) & I2C_STAT_BB) && timeout--) {
+ outw(stat, I2C_STAT);
+ udelay(50000);
}
if (timeout <= 0) {
- printf ("timed out in wait_for_bb: I2C_STAT=%x\n",
- inw (I2C_STAT));
+ printf("timed out in wait_for_bb: I2C_STAT=%x\n",
+ inw(I2C_STAT));
}
- outw(0xFFFF, I2C_STAT); /* clear delayed stuff*/
+ outw(0xFFFF, I2C_STAT); /* clear delayed stuff */
}
-static u16 wait_for_pin (void)
+static u16 wait_for_pin(void)
{
u16 status;
int timeout = 10;
do {
- udelay (1000);
- status = inw (I2C_STAT);
- } while ( !(status &
+ udelay(1000);
+ status = inw(I2C_STAT);
+ } while (!(status &
(I2C_STAT_ROVR | I2C_STAT_XUDF | I2C_STAT_XRDY |
I2C_STAT_RRDY | I2C_STAT_ARDY | I2C_STAT_NACK |
I2C_STAT_AL)) && timeout--);
if (timeout <= 0) {
- printf ("timed out in wait_for_pin: I2C_STAT=%x\n",
- inw (I2C_STAT));
- outw(0xFFFF, I2C_STAT);
-}
+ printf("timed out in wait_for_pin: I2C_STAT=%x\n",
+ inw(I2C_STAT));
+ outw(0xFFFF, I2C_STAT);
+ }
return status;
}
-#endif /* CONFIG_DRIVER_OMAP24XX_I2C */
+#endif /* CONFIG_DRIVER_OMAP24XX_I2C */
diff --git a/drivers/onenand/Makefile b/drivers/onenand/Makefile
new file mode 100644
index 0000000000..e7446324d5
--- /dev/null
+++ b/drivers/onenand/Makefile
@@ -0,0 +1,42 @@
+#
+# (C) Copyright 2005
+# Kyungmin Park, Samsung Electronics.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = libonenand.a
+
+OBJS = onenand_base.o onenand_bbt.o
+
+all: $(LIB)
+
+$(LIB): $(OBJS)
+ $(AR) crv $@ $(OBJS)
+
+#########################################################################
+
+.depend: Makefile $(OBJS:.o=.c)
+ $(CC) -M $(CFLAGS) $(OBJS:.o=.c) > $@
+
+sinclude .depend
+
+#########################################################################
diff --git a/drivers/onenand/onenand_base.c b/drivers/onenand/onenand_base.c
new file mode 100644
index 0000000000..dde7b8be17
--- /dev/null
+++ b/drivers/onenand/onenand_base.c
@@ -0,0 +1,1307 @@
+/*
+ * linux/drivers/mtd/onenand/onenand_base.c
+ *
+ * Copyright (C) 2005 Samsung Electronics
+ * Kyungmin Park <kyungmin.park@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <common.h>
+
+#if (CONFIG_COMMANDS & CFG_CMD_ONENAND)
+
+#include <linux/mtd/onenand.h>
+
+#include <asm/io.h>
+
+static void *onenand_memcpy(void *dest, const void *src, size_t count)
+{
+ unsigned short *_s = (unsigned short *) (src);
+ unsigned short *_d = (unsigned short *) (dest);
+ count >>= 1;
+ while (count--)
+ *_d++ = *_s++;
+
+ return _d;
+}
+
+static const unsigned char ffchars[] = {
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */
+};
+
+/**
+ * onenand_readw - [OneNAND Interface] Read OneNAND register
+ * @param addr address to read
+ *
+ * Read OneNAND register
+ */
+static unsigned short onenand_readw(void __iomem *addr)
+{
+ return readw(addr);
+}
+
+/**
+ * onenand_writew - [OneNAND Interface] Write OneNAND register with value
+ * @param value value to write
+ * @param addr address to write
+ *
+ * Write OneNAND register with value
+ */
+static void onenand_writew(unsigned short value, void __iomem *addr)
+{
+ writew(value, addr);
+}
+
+/**
+ * onenand_block_address - [DEFAULT] Get block address
+ * @param device the device id
+ * @param block the block
+ * @return translated block address if DDP, otherwise same
+ *
+ * Setup Start Address 1 Register (F100h)
+ */
+static int onenand_block_address(int device, int block)
+{
+ if (device & ONENAND_DEVICE_IS_DDP) {
+ /* Device Flash Core select, NAND Flash Block Address */
+ int dfs = 0, density, mask;
+
+ density = device >> ONENAND_DEVICE_DENSITY_SHIFT;
+ mask = (1 << (density + 6));
+
+ if (block & mask)
+ dfs = 1;
+
+ return (dfs << ONENAND_DDP_SHIFT) | (block & (mask - 1));
+ }
+
+ return block;
+}
+
+/**
+ * onenand_bufferram_address - [DEFAULT] Get bufferram address
+ * @param device the device id
+ * @param block the block
+ * @return set DBS value if DDP, otherwise 0
+ *
+ * Setup Start Address 2 Register (F101h) for DDP
+ */
+static int onenand_bufferram_address(int device, int block)
+{
+ if (device & ONENAND_DEVICE_IS_DDP) {
+ /* Device BufferRAM Select */
+ int dbs = 0, density, mask;
+
+ density = device >> ONENAND_DEVICE_DENSITY_SHIFT;
+ mask = (1 << (density + 6));
+
+ if (block & mask)
+ dbs = 1;
+
+ return (dbs << ONENAND_DDP_SHIFT);
+ }
+
+ return 0;
+}
+
+/**
+ * onenand_page_address - [DEFAULT] Get page address
+ * @param page the page address
+ * @param sector the sector address
+ * @return combined page and sector address
+ *
+ * Setup Start Address 8 Register (F107h)
+ */
+static int onenand_page_address(int page, int sector)
+{
+ /* Flash Page Address, Flash Sector Address */
+ int fpa, fsa;
+
+ fpa = page & ONENAND_FPA_MASK;
+ fsa = sector & ONENAND_FSA_MASK;
+
+ return ((fpa << ONENAND_FPA_SHIFT) | fsa);
+}
+
+/**
+ * onenand_buffer_address - [DEFAULT] Get buffer address
+ * @param dataram1 DataRAM index
+ * @param sectors the sector address
+ * @param count the number of sectors
+ * @return the start buffer value
+ *
+ * Setup Start Buffer Register (F200h)
+ */
+static int onenand_buffer_address(int dataram1, int sectors, int count)
+{
+ int bsa, bsc;
+
+ /* BufferRAM Sector Address */
+ bsa = sectors & ONENAND_BSA_MASK;
+
+ if (dataram1)
+ bsa |= ONENAND_BSA_DATARAM1; /* DataRAM1 */
+ else
+ bsa |= ONENAND_BSA_DATARAM0; /* DataRAM0 */
+
+ /* BufferRAM Sector Count */
+ bsc = count & ONENAND_BSC_MASK;
+
+ return ((bsa << ONENAND_BSA_SHIFT) | bsc);
+}
+
+/**
+ * onenand_command - [DEFAULT] Send command to OneNAND device
+ * @param mtd MTD device structure
+ * @param cmd the command to be sent
+ * @param addr offset to read from or write to
+ * @param len number of bytes to read or write
+ *
+ * Send command to OneNAND device. This function is used for middle/large page
+ * devices (1KB/2KB Bytes per page)
+ */
+static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t len)
+{
+ struct onenand_chip *this = mtd->priv;
+ int value, readcmd = 0;
+ int block, page;
+ /* Now we use page size operation */
+ int sectors = 4, count = 4;
+
+ /* Address translation */
+ switch (cmd) {
+ case ONENAND_CMD_UNLOCK:
+ case ONENAND_CMD_LOCK:
+ case ONENAND_CMD_LOCK_TIGHT:
+ block = -1;
+ page = -1;
+ break;
+
+ case ONENAND_CMD_ERASE:
+ case ONENAND_CMD_BUFFERRAM:
+ block = (int) (addr >> this->erase_shift);
+ page = -1;
+ break;
+
+ default:
+ block = (int) (addr >> this->erase_shift);
+ page = (int) (addr >> this->page_shift);
+ page &= this->page_mask;
+ break;
+ }
+
+
+ /* NOTE: The setting order of the registers is very important! */
+ if (cmd == ONENAND_CMD_BUFFERRAM) {
+ /* Select DataRAM for DDP */
+ value = onenand_bufferram_address(this->device_id, block);
+ this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
+
+ /* Switch to the next data buffer */
+ ONENAND_SET_NEXT_BUFFERRAM(this);
+
+ return 0;
+ }
+
+ if (block != -1) {
+ /* Write 'DFS, FBA' of Flash */
+ value = onenand_block_address(this->device_id, block);
+ this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
+ }
+
+ if (page != -1) {
+ int dataram;
+
+ switch (cmd) {
+ case ONENAND_CMD_READ:
+ case ONENAND_CMD_READOOB:
+ dataram = ONENAND_SET_NEXT_BUFFERRAM(this);
+ readcmd = 1;
+ break;
+
+ default:
+ dataram = ONENAND_CURRENT_BUFFERRAM(this);
+ break;
+ }
+
+ /* Write 'FPA, FSA' of Flash */
+ value = onenand_page_address(page, sectors);
+ this->write_word(value, this->base + ONENAND_REG_START_ADDRESS8);
+
+ /* Write 'BSA, BSC' of DataRAM */
+ value = onenand_buffer_address(dataram, sectors, count);
+ this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
+
+ if (readcmd) {
+ /* Select DataRAM for DDP */
+ value = onenand_bufferram_address(this->device_id, block);
+ this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
+ }
+ }
+
+ /* Interrupt clear */
+ this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
+
+ /* Write command */
+ this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
+
+ return 0;
+}
+
+/**
+ * onenand_wait - [DEFAULT] wait until the command is done
+ * @param mtd MTD device structure
+ * @param state state to select the max. timeout value
+ *
+ * Wait for command done. This applies to all OneNAND command
+ * Read can take up to 30us, erase up to 2ms and program up to 350us
+ * according to general OneNAND specs
+ */
+static int onenand_wait(struct mtd_info *mtd, int state)
+{
+ struct onenand_chip * this = mtd->priv;
+ unsigned int flags = ONENAND_INT_MASTER;
+ unsigned int interrupt = 0;
+ unsigned int ctrl, ecc;
+
+ if (state == FL_UNLOCKING)
+ printk("");
+
+ while (1) {
+ interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
+
+ if (interrupt & flags)
+ break;
+ }
+
+
+ ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
+
+ if (state == FL_UNLOCKING) {
+ printk("");
+ if (ctrl & (1 << 6))
+ printk("Block remains locked\n");
+ }
+
+
+ if (ctrl & ONENAND_CTRL_ERROR) {
+ DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: controller error = 0x%04x\n", ctrl);
+ return -EAGAIN;
+ }
+
+ if (ctrl & ONENAND_CTRL_LOCK) {
+ DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: it's locked error = 0x%04x\n", ctrl);
+ return -EIO;
+ }
+
+ if (interrupt & ONENAND_INT_READ) {
+ ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS);
+ if (ecc & ONENAND_ECC_2BIT_ALL) {
+ DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: ECC error = 0x%04x\n", ecc);
+ return -EBADMSG;
+ }
+ }
+ return 0;
+}
+
+/**
+ * onenand_bufferram_offset - [DEFAULT] BufferRAM offset
+ * @param mtd MTD data structure
+ * @param area BufferRAM area
+ * @return offset given area
+ *
+ * Return BufferRAM offset given area
+ */
+static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area)
+{
+ struct onenand_chip *this = mtd->priv;
+
+ if (ONENAND_CURRENT_BUFFERRAM(this)) {
+ if (area == ONENAND_DATARAM)
+ return mtd->oobblock;
+ if (area == ONENAND_SPARERAM)
+ return mtd->oobsize;
+ }
+
+ return 0;
+}
+
+/**
+ * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area
+ * @param mtd MTD data structure
+ * @param area BufferRAM area
+ * @param buffer the databuffer to put/get data
+ * @param offset offset to read from or write to
+ * @param count number of bytes to read/write
+ *
+ * Read the BufferRAM area
+ */
+static int onenand_read_bufferram(struct mtd_info *mtd, int area,
+ unsigned char *buffer, int offset, size_t count)
+{
+ struct onenand_chip *this = mtd->priv;
+ void __iomem *bufferram;
+
+ bufferram = this->base + area;
+
+ bufferram += onenand_bufferram_offset(mtd, area);
+
+ onenand_memcpy(buffer, bufferram + offset, count);
+
+ return 0;
+}
+
+/**
+ * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode
+ * @param mtd MTD data structure
+ * @param area BufferRAM area
+ * @param buffer the databuffer to put/get data
+ * @param offset offset to read from or write to
+ * @param count number of bytes to read/write
+ *
+ * Read the BufferRAM area with Sync. Burst Mode
+ */
+static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area,
+ unsigned char *buffer, int offset, size_t count)
+{
+ struct onenand_chip *this = mtd->priv;
+ void __iomem *bufferram;
+
+ bufferram = this->base + area;
+
+ bufferram += onenand_bufferram_offset(mtd, area);
+
+ this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ);
+
+ onenand_memcpy(buffer, bufferram + offset, count);
+
+ this->mmcontrol(mtd, 0);
+
+ return 0;
+}
+
+/**
+ * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area
+ * @param mtd MTD data structure
+ * @param area BufferRAM area
+ * @param buffer the databuffer to put/get data
+ * @param offset offset to read from or write to
+ * @param count number of bytes to read/write
+ *
+ * Write the BufferRAM area
+ */
+static int onenand_write_bufferram(struct mtd_info *mtd, int area,
+ const unsigned char *buffer, int offset, size_t count)
+{
+ struct onenand_chip *this = mtd->priv;
+ void __iomem *bufferram;
+
+ bufferram = this->base + area;
+
+ bufferram += onenand_bufferram_offset(mtd, area);
+
+ onenand_memcpy(bufferram + offset, buffer, count);
+
+ return 0;
+}
+
+/**
+ * onenand_check_bufferram - [GENERIC] Check BufferRAM information
+ * @param mtd MTD data structure
+ * @param addr address to check
+ * @return 1 if there are valid data, otherwise 0
+ *
+ * Check bufferram if there is data we required
+ */
+static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr)
+{
+ struct onenand_chip *this = mtd->priv;
+ int block, page;
+ int i;
+
+ block = (int) (addr >> this->erase_shift);
+ page = (int) (addr >> this->page_shift);
+ page &= this->page_mask;
+
+ i = ONENAND_CURRENT_BUFFERRAM(this);
+
+ /* Is there valid data? */
+ if (this->bufferram[i].block == block &&
+ this->bufferram[i].page == page &&
+ this->bufferram[i].valid)
+ return 1;
+
+ return 0;
+}
+
+/**
+ * onenand_update_bufferram - [GENERIC] Update BufferRAM information
+ * @param mtd MTD data structure
+ * @param addr address to update
+ * @param valid valid flag
+ *
+ * Update BufferRAM information
+ */
+static int onenand_update_bufferram(struct mtd_info *mtd, loff_t addr,
+ int valid)
+{
+ struct onenand_chip *this = mtd->priv;
+ int block, page;
+ int i;
+
+ block = (int) (addr >> this->erase_shift);
+ page = (int) (addr >> this->page_shift);
+ page &= this->page_mask;
+
+ /* Invalidate BufferRAM */
+ for (i = 0; i < MAX_BUFFERRAM; i++) {
+ if (this->bufferram[i].block == block &&
+ this->bufferram[i].page == page)
+ this->bufferram[i].valid = 0;
+ }
+
+ /* Update BufferRAM */
+ i = ONENAND_CURRENT_BUFFERRAM(this);
+ this->bufferram[i].block = block;
+ this->bufferram[i].page = page;
+ this->bufferram[i].valid = valid;
+
+ return 0;
+}
+
+/**
+ * onenand_get_device - [GENERIC] Get chip for selected access
+ * @param mtd MTD device structure
+ * @param new_state the state which is requested
+ *
+ * Get the device and lock it for exclusive access
+ */
+static void onenand_get_device(struct mtd_info *mtd, int new_state)
+{
+ /* Do nothing */
+}
+
+/**
+ * onenand_release_device - [GENERIC] release chip
+ * @param mtd MTD device structure
+ *
+ * Deselect, release chip lock and wake up anyone waiting on the device
+ */
+static void onenand_release_device(struct mtd_info *mtd)
+{
+ /* Do nothing */
+}
+
+/**
+ * onenand_read_ecc - [MTD Interface] Read data with ECC
+ * @param mtd MTD device structure
+ * @param from offset to read from
+ * @param len number of bytes to read
+ * @param retlen pointer to variable to store the number of read bytes
+ * @param buf the databuffer to put data
+ * @param oob_buf filesystem supplied oob data buffer
+ * @param oobsel oob selection structure
+ *
+ * OneNAND read with ECC
+ */
+static int onenand_read_ecc(struct mtd_info *mtd, loff_t from, size_t len,
+ size_t *retlen, u_char *buf,
+ u_char *oob_buf, struct nand_oobinfo *oobsel)
+{
+ struct onenand_chip *this = mtd->priv;
+ int read = 0, column;
+ int thislen;
+ int ret = 0;
+
+ DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_ecc: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
+
+ /* Do not allow reads past end of device */
+ if ((from + len) > mtd->size) {
+ DEBUG(MTD_DEBUG_LEVEL0, "onenand_read_ecc: Attempt read beyond end of device\n");
+ *retlen = 0;
+ return -EINVAL;
+ }
+
+ /* Grab the lock and see if the device is available */
+ onenand_get_device(mtd, FL_READING);
+
+ /* TODO handling oob */
+
+ while (read < len) {
+ thislen = min_t(int, mtd->oobblock, len - read);
+
+ column = from & (mtd->oobblock - 1);
+ if (column + thislen > mtd->oobblock)
+ thislen = mtd->oobblock - column;
+
+ if (!onenand_check_bufferram(mtd, from)) {
+ this->command(mtd, ONENAND_CMD_READ, from, mtd->oobblock);
+
+ ret = this->wait(mtd, FL_READING);
+ /* First copy data and check return value for ECC handling */
+ onenand_update_bufferram(mtd, from, 1);
+ }
+
+ this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
+
+ read += thislen;
+
+ if (read == len)
+ break;
+
+ if (ret) {
+ DEBUG(MTD_DEBUG_LEVEL0, "onenand_read_ecc: read failed = %d\n", ret);
+ goto out;
+ }
+
+ from += thislen;
+ buf += thislen;
+ }
+
+out:
+ /* Deselect and wake up anyone waiting on the device */
+ onenand_release_device(mtd);
+
+ /*
+ * Return success, if no ECC failures, else -EBADMSG
+ * fs driver will take care of that, because
+ * retlen == desired len and result == -EBADMSG
+ */
+ *retlen = read;
+ return ret;
+}
+
+/**
+ * onenand_read - [MTD Interface] MTD compability function for onenand_read_ecc
+ * @param mtd MTD device structure
+ * @param from offset to read from
+ * @param len number of bytes to read
+ * @param retlen pointer to variable to store the number of read bytes
+ * @param buf the databuffer to put data
+ *
+ * This function simply calls onenand_read_ecc with oob buffer and oobsel = NULL
+*/
+int onenand_read(struct mtd_info *mtd, loff_t from, size_t len,
+ size_t *retlen, u_char *buf)
+{
+ return onenand_read_ecc(mtd, from, len, retlen, buf, NULL, NULL);
+}
+
+/**
+ * onenand_read_oob - [MTD Interface] OneNAND read out-of-band
+ * @param mtd MTD device structure
+ * @param from offset to read from
+ * @param len number of bytes to read
+ * @param retlen pointer to variable to store the number of read bytes
+ * @param buf the databuffer to put data
+ *
+ * OneNAND read out-of-band data from the spare area
+ */
+int onenand_read_oob(struct mtd_info *mtd, loff_t from, size_t len,
+ size_t *retlen, u_char *buf)
+{
+ struct onenand_chip *this = mtd->priv;
+ int read = 0, thislen, column;
+ int ret = 0;
+
+ DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_oob: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
+
+ /* Initialize return length value */
+ *retlen = 0;
+
+ /* Do not allow reads past end of device */
+ if (unlikely((from + len) > mtd->size)) {
+ DEBUG(MTD_DEBUG_LEVEL0, "onenand_read_oob: Attempt read beyond end of device\n");
+ return -EINVAL;
+ }
+
+ /* Grab the lock and see if the device is available */
+ onenand_get_device(mtd, FL_READING);
+
+ column = from & (mtd->oobsize - 1);
+
+ while (read < len) {
+ thislen = mtd->oobsize - column;
+ thislen = min_t(int, thislen, len);
+
+ this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize);
+
+ onenand_update_bufferram(mtd, from, 0);
+
+ ret = this->wait(mtd, FL_READING);
+ /* First copy data and check return value for ECC handling */
+
+ this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
+
+ read += thislen;
+
+ if (read == len)
+ break;
+
+ if (ret) {
+ DEBUG(MTD_DEBUG_LEVEL0, "onenand_read_oob: read failed = %d\n", ret);
+ goto out;
+ }
+
+ buf += thislen;
+
+ /* Read more? */
+ if (read < len) {
+ /* Page size */
+ from += mtd->oobblock;
+ column = 0;
+ }
+ }
+
+out:
+ /* Deselect and wake up anyone waiting on the device */
+ onenand_release_device(mtd);
+
+ *retlen = read;
+ return ret;
+}
+
+#ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
+/**
+ * onenand_verify_page - [GENERIC] verify the chip contents after a write
+ * @param mtd MTD device structure
+ * @param buf the databuffer to verify
+ * @param block block address
+ * @param page page address
+ *
+ * Check DataRAM area directly
+ */
+static int onenand_verify_page(struct mtd_info *mtd, u_char *buf,
+ loff_t addr, int block, int page)
+{
+ struct onenand_chip *this = mtd->priv;
+ void __iomem *dataram0, *dataram1;
+ int ret = 0;
+
+ this->command(mtd, ONENAND_CMD_READ, addr, mtd->oobblock);
+
+ ret = this->wait(mtd, FL_READING);
+ if (ret)
+ return ret;
+
+ onenand_update_bufferram(mtd, addr, 1);
+
+ /* Check, if the two dataram areas are same */
+ dataram0 = this->base + ONENAND_DATARAM;
+ dataram1 = dataram0 + mtd->oobblock;
+
+ if (memcmp(dataram0, dataram1, mtd->oobblock))
+ return -EBADMSG;
+
+ return 0;
+}
+#else
+#define onenand_verify_page(...) (0)
+#endif
+
+#define NOTALIGNED(x) ((x & (mtd->oobblock - 1)) != 0)
+
+/**
+ * onenand_write_ecc - [MTD Interface] OneNAND write with ECC
+ * @param mtd MTD device structure
+ * @param to offset to write to
+ * @param len number of bytes to write
+ * @param retlen pointer to variable to store the number of written bytes
+ * @param buf the data to write
+ * @param eccbuf filesystem supplied oob data buffer
+ * @param oobsel oob selection structure
+ *
+ * OneNAND write with ECC
+ */
+static int onenand_write_ecc(struct mtd_info *mtd, loff_t to, size_t len,
+ size_t *retlen, const u_char *buf,
+ u_char *eccbuf, struct nand_oobinfo *oobsel)
+{
+ struct onenand_chip *this = mtd->priv;
+ int written = 0;
+ int ret = 0;
+
+ DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_ecc: to = 0x%x, len = %d\n", (unsigned int) to, (int) len);
+
+ /* Initialize retlen, in case of early exit */
+ *retlen = 0;
+
+ /* Do not allow writes past end of device */
+ if (unlikely((to + len) > mtd->size)) {
+ DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_ecc: Attempt write to past end of device\n");
+ return -EINVAL;
+ }
+
+ /* Reject writes, which are not page aligned */
+ if (unlikely(NOTALIGNED(to))) {
+ DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_ecc: Attempt to write nonpage alignd address\n");
+ return -EINVAL;
+ }
+
+ if (unlikely(NOTALIGNED(len))) {
+ DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_ecc: Attempt to write not page aligned size\n");
+ return -EINVAL;
+ }
+
+ /* Grab the lock and see if the device is available */
+ onenand_get_device(mtd, FL_WRITING);
+
+
+ /* Loop until all data write */
+ while (written < len) {
+ int thislen = min_t(int, mtd->oobblock, len - written);
+
+ this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobblock);
+
+ this->write_bufferram(mtd, ONENAND_DATARAM, buf, 0, thislen);
+ this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize);
+
+ this->command(mtd, ONENAND_CMD_PROG, to, mtd->oobblock);
+
+ onenand_update_bufferram(mtd, to, 1);
+
+ ret = this->wait(mtd, FL_WRITING);
+ if (ret) {
+ DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_ecc: write filaed %d\n", ret);
+ goto out;
+ }
+
+ written += thislen;
+
+ /* Only check verify write turn on */
+ ret = onenand_verify_page(mtd, (u_char *) buf, to, block, page);
+ if (ret) {
+ DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_ecc: verify failed %d\n", ret);
+ goto out;
+ }
+
+ if (written == len)
+ break;
+
+ to += thislen;
+ buf += thislen;
+ }
+
+out:
+ /* Deselect and wake up anyone waiting on the device */
+ onenand_release_device(mtd);
+
+ *retlen = written;
+
+ return ret;
+}
+
+/**
+ * onenand_write - [MTD Interface] compability function for onenand_write_ecc
+ * @param mtd MTD device structure
+ * @param to offset to write to
+ * @param len number of bytes to write
+ * @param retlen pointer to variable to store the number of written bytes
+ * @param buf the data to write
+ *
+ * This function simply calls onenand_write_ecc
+ * with oob buffer and oobsel = NULL
+ */
+int onenand_write(struct mtd_info *mtd, loff_t to, size_t len,
+ size_t *retlen, const u_char *buf)
+{
+ return onenand_write_ecc(mtd, to, len, retlen, buf, NULL, NULL);
+}
+
+/**
+ * onenand_write_oob - [MTD Interface] OneNAND write out-of-band
+ * @param mtd MTD device structure
+ * @param to offset to write to
+ * @param len number of bytes to write
+ * @param retlen pointer to variable to store the number of written bytes
+ * @param buf the data to write
+ *
+ * OneNAND write out-of-band
+ */
+int onenand_write_oob(struct mtd_info *mtd, loff_t to, size_t len,
+ size_t *retlen, const u_char *buf)
+{
+ struct onenand_chip *this = mtd->priv;
+ int column, status;
+ int written = 0;
+
+ DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_oob: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
+
+ /* Initialize retlen, in case of early exit */
+ *retlen = 0;
+
+ /* Do not allow writes past end of device */
+ if (unlikely((to + len) > mtd->size)) {
+ DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_oob: Attempt write to past end of device\n");
+ return -EINVAL;
+ }
+
+ /* Grab the lock and see if the device is available */
+ onenand_get_device(mtd, FL_WRITING);
+
+ /* Loop until all data write */
+ while (written < len) {
+ int thislen = min_t(int, mtd->oobsize, len - written);
+
+ column = to & (mtd->oobsize - 1);
+
+ this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize);
+
+ this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize);
+ this->write_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
+
+ this->command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize);
+
+ onenand_update_bufferram(mtd, to, 0);
+
+ status = this->wait(mtd, FL_WRITING);
+ if (status)
+ goto out;
+
+ written += thislen;
+
+ if (written == len)
+ break;
+
+ to += thislen;
+ buf += thislen;
+ }
+
+out:
+ /* Deselect and wake up anyone waiting on the device */
+ onenand_release_device(mtd);
+
+ *retlen = written;
+
+ return 0;
+}
+
+/**
+ * onenand_erase - [MTD Interface] erase block(s)
+ * @param mtd MTD device structure
+ * @param instr erase instruction
+ *
+ * Erase one ore more blocks
+ */
+int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
+{
+ struct onenand_chip *this = mtd->priv;
+ unsigned int block_size;
+ loff_t addr;
+ int len;
+ int ret = 0;
+
+ DEBUG(MTD_DEBUG_LEVEL3, "onenand_erase: start = 0x%08x, len = %i\n", (unsigned int) instr->addr, (unsigned int) instr->len);
+
+ block_size = (1 << this->erase_shift);
+
+ /* Start address must align on block boundary */
+ if (unlikely(instr->addr & (block_size - 1))) {
+ DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Unaligned address\n");
+ return -EINVAL;
+ }
+
+ /* Length must align on block boundary */
+ if (unlikely(instr->len & (block_size - 1))) {
+ DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Length not block aligned\n");
+ return -EINVAL;
+ }
+
+ /* Do not allow erase past end of device */
+ if (unlikely((instr->len + instr->addr) > mtd->size)) {
+ DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Erase past end of device\n");
+ return -EINVAL;
+ }
+
+ instr->fail_addr = 0xffffffff;
+
+ /* Grab the lock and see if the device is available */
+ onenand_get_device(mtd, FL_ERASING);
+
+ /* Loop throught the pages */
+ len = instr->len;
+ addr = instr->addr;
+
+ instr->state = MTD_ERASING;
+
+ while (len) {
+
+ /* TODO Check badblock */
+
+ this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
+
+ ret = this->wait(mtd, FL_ERASING);
+ /* Check, if it is write protected */
+ if (ret) {
+ if (ret == -EPERM)
+ DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Device is write protected!!!\n");
+ else {
+ printk("onenand_erase: Failed erase, block %d\n", (unsigned) (addr >> this->erase_shift));
+ DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Failed erase, block %d\n", (unsigned) (addr >> this->erase_shift));
+ }
+ instr->state = MTD_ERASE_FAILED;
+ instr->fail_addr = addr;
+ goto erase_exit;
+ }
+
+ len -= block_size;
+ addr += block_size;
+ }
+
+ instr->state = MTD_ERASE_DONE;
+
+erase_exit:
+
+ ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
+ /* Do call back function */
+ if (!ret)
+ mtd_erase_callback(instr);
+
+ /* Deselect and wake up anyone waiting on the device */
+ onenand_release_device(mtd);
+
+ return ret;
+}
+
+/**
+ * onenand_sync - [MTD Interface] sync
+ * @param mtd MTD device structure
+ *
+ * Sync is actually a wait for chip ready function
+ */
+void onenand_sync(struct mtd_info *mtd)
+{
+ DEBUG(MTD_DEBUG_LEVEL3, "onenand_sync: called\n");
+
+ /* Grab the lock and see if the device is available */
+ onenand_get_device(mtd, FL_SYNCING);
+
+ /* Release it and go back */
+ onenand_release_device(mtd);
+}
+
+/**
+ * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
+ * @param mtd MTD device structure
+ * @param ofs offset relative to mtd start
+ */
+int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs)
+{
+ /*
+ * TODO
+ * 1. Bad block table (BBT)
+ * -> using NAND BBT to support JFFS2
+ * 2. Bad block management (BBM)
+ * -> bad block replace scheme
+ *
+ * Currently we do nothing
+ */
+ return 0;
+}
+
+/**
+ * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad
+ * @param mtd MTD device structure
+ * @param ofs offset relative to mtd start
+ */
+int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs)
+{
+ /* see above */
+ return 0;
+}
+
+/**
+ * onenand_unlock - [MTD Interface] Unlock block(s)
+ * @param mtd MTD device structure
+ * @param ofs offset relative to mtd start
+ * @param len number of bytes to unlock
+ *
+ * Unlock one or more blocks
+ */
+int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len)
+{
+ struct onenand_chip *this = mtd->priv;
+ int start, end, block, value, status;
+#if 1
+ start = ofs >> this->erase_shift;
+ end = len >> this->erase_shift;
+#else
+ start = ofs ;
+ end = len ;
+#endif
+
+ /* Continuous lock scheme */
+ if (this->options & ONENAND_CONT_LOCK) {
+ /* Set start block address */
+ this->write_word(start, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
+ /* Set end block address */
+ this->write_word(end - 1, this->base + ONENAND_REG_END_BLOCK_ADDRESS);
+ /* Write unlock command */
+ this->command(mtd, ONENAND_CMD_UNLOCK, 0, 0);
+
+ /* There's no return value */
+ this->wait(mtd, FL_UNLOCKING);
+
+ /* Sanity check */
+ while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
+ & ONENAND_CTRL_ONGO)
+ continue;
+
+ /* Check lock status */
+ status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
+ if (!(status & ONENAND_WP_US))
+ printk(KERN_ERR "wp status = 0x%x\n", status);
+
+ return 0;
+ }
+
+ /* Block lock scheme */
+ for (block = start; block < end; block++) {
+ /* Set start block address */
+ this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
+ /* Write unlock command */
+ this->command(mtd, ONENAND_CMD_UNLOCK, 0, 0);
+
+ /* There's no return value */
+ this->wait(mtd, FL_UNLOCKING);
+
+ /* Sanity check */
+ while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
+ & ONENAND_CTRL_ONGO)
+ continue;
+
+ /* Set block address for read block status */
+ value = onenand_block_address(this->device_id, block);
+ this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
+
+ /* Check lock status */
+ status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
+ if (!(status & ONENAND_WP_US))
+ printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
+ }
+
+ return 0;
+}
+
+/**
+ * onenand_print_device_info - Print device ID
+ * @param device device ID
+ *
+ * Print device ID
+ */
+void onenand_print_device_info(int device, int verbose)
+{
+ int vcc, demuxed, ddp, density;
+
+ if (!verbose)
+ return;
+
+ vcc = device & ONENAND_DEVICE_VCC_MASK;
+ demuxed = device & ONENAND_DEVICE_IS_DEMUX;
+ ddp = device & ONENAND_DEVICE_IS_DDP;
+ density = device >> ONENAND_DEVICE_DENSITY_SHIFT;
+ printk(KERN_INFO "%sOneNAND%s %dMB %sV 16-bit (0x%02x)\n",
+ demuxed ? "" : "Muxed ",
+ ddp ? "(DDP)" : "",
+ (16 << density),
+ vcc ? "2.65/3.3" : "1.8",
+ device);
+}
+
+static const struct onenand_manufacturers onenand_manuf_ids[] = {
+ {ONENAND_MFR_SAMSUNG, "Samsung"},
+ {ONENAND_MFR_UNKNOWN, "Unknown"}
+};
+
+/**
+ * onenand_check_maf - Check manufacturer ID
+ * @param manuf manufacturer ID
+ *
+ * Check manufacturer ID
+ */
+static int onenand_check_maf(int manuf)
+{
+ int i;
+
+ for (i = 0; onenand_manuf_ids[i].id; i++) {
+ if (manuf == onenand_manuf_ids[i].id)
+ break;
+ }
+
+#ifdef ONENAND_DEBUG
+ printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n",
+ onenand_manuf_ids[i].name, manuf);
+#endif
+
+ return (i != ONENAND_MFR_UNKNOWN);
+}
+
+/**
+ * onenand_probe - [OneNAND Interface] Probe the OneNAND device
+ * @param mtd MTD device structure
+ *
+ * OneNAND detection method:
+ * Compare the the values from command with ones from register
+ */
+static int onenand_probe(struct mtd_info *mtd)
+{
+ struct onenand_chip *this = mtd->priv;
+ int bram_maf_id, bram_dev_id, maf_id, dev_id;
+ int version_id;
+ int density;
+
+ /* Send the command for reading device ID from BootRAM */
+ this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM);
+
+ udelay(1); /* no interrupt for readid */
+
+ /* Read manufacturer and device IDs from BootRAM */
+ bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0);
+ bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2);
+
+ /* Check manufacturer ID */
+ if (onenand_check_maf(bram_maf_id)) {
+ printk(KERN_DEBUG "OneNAND: onenand_check_maf failed : %x\n", bram_maf_id);
+ return -ENXIO;
+ }
+
+ /* Reset OneNAND to read default register values */
+ this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM);
+
+ this->wait(mtd, FL_RESETING); /* 10, 20, 500us */
+
+ /* Read manufacturer and device IDs from Register */
+ maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID);
+ dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
+
+ /* Check OneNAND device */
+ if (maf_id != bram_maf_id || dev_id != bram_dev_id) {
+ printk(KERN_DEBUG "OneNAND mafid and dev id recog fail\n");
+ return -ENXIO;
+ }
+
+ /* Flash device information */
+ onenand_print_device_info(dev_id, 1);
+ this->device_id = dev_id;
+
+ density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT;
+ this->chipsize = (16 << density) << 20;
+
+ /* OneNAND page size & block size */
+ /* The data buffer size is equal to page size */
+ mtd->oobblock = this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE);
+ mtd->oobsize = mtd->oobblock >> 5;
+ /* Pagers per block is always 64 in OneNAND */
+ mtd->erasesize = mtd->oobblock << 6;
+
+ this->erase_shift = ffs(mtd->erasesize) - 1;
+ this->page_shift = ffs(mtd->oobblock) - 1;
+ this->ppb_shift = (this->erase_shift - this->page_shift);
+ this->page_mask = (mtd->erasesize / mtd->oobblock) - 1;
+
+ /* REVIST: Multichip handling */
+
+ mtd->size = this->chipsize;
+
+ /* Version ID */
+ version_id = this->read_word(this->base + ONENAND_REG_VERSION_ID);
+#ifdef ONENAND_DEBUG
+ printk(KERN_DEBUG "OneNAND version = 0x%04x\n", version_id);
+#endif
+
+ /* Lock scheme */
+ if (density <= ONENAND_DEVICE_DENSITY_512Mb &&
+ !(version_id >> ONENAND_VERSION_PROCESS_SHIFT)) {
+ printk(KERN_INFO "Lock scheme is Continues Lock\n");
+ this->options |= ONENAND_CONT_LOCK;
+ }
+
+ return 0;
+}
+
+
+/**
+ * onenand_scan - [OneNAND Interface] Scan for the OneNAND device
+ * @param mtd MTD device structure
+ * @param maxchips Number of chips to scan for
+ *
+ * This fills out all the not initialized function pointers
+ * with the defaults.
+ * The flash ID is read and the mtd/chip structures are
+ * filled with the appropriate values.
+ */
+int onenand_scan(struct mtd_info *mtd, int maxchips)
+{
+ struct onenand_chip *this = mtd->priv;
+
+ if (!this->read_word)
+ this->read_word = onenand_readw;
+ if (!this->write_word)
+ this->write_word = onenand_writew;
+
+ if (!this->command)
+ this->command = onenand_command;
+ if (!this->wait)
+ this->wait = onenand_wait;
+
+ if (!this->read_bufferram)
+ this->read_bufferram = onenand_read_bufferram;
+ if (!this->write_bufferram)
+ this->write_bufferram = onenand_write_bufferram;
+
+ if (onenand_probe(mtd))
+ return -ENXIO;
+
+ /* Set Sync. Burst Read after probing */
+ if (this->mmcontrol) {
+ printk(KERN_INFO "OneNAND Sync. Burst Read support\n");
+ this->read_bufferram = onenand_sync_read_bufferram;
+ }
+
+#ifdef ENV_IS_VARIABLE
+extern int onenand_env_init(void);
+extern int (*boot_env_init) (void);
+ if (onenand_env_init == boot_env_init)
+#endif
+ onenand_unlock(mtd, CFG_ENV_ADDR, mtd->size);
+
+ return onenand_default_bbt(mtd);
+}
+
+/**
+ * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device
+ * @param mtd MTD device structure
+ */
+void onenand_release(struct mtd_info *mtd)
+{
+}
+
+/*
+ * OneNAND initialization at U-Boot
+ */
+struct mtd_info onenand_mtd;
+struct onenand_chip onenand_chip;
+
+void onenand_init(void)
+{
+ memset(&onenand_mtd, 0, sizeof(struct mtd_info));
+ memset(&onenand_chip, 0, sizeof(struct onenand_chip));
+
+ onenand_chip.base = (void *) CFG_ONENAND_BASE;
+ onenand_mtd.priv = &onenand_chip;
+
+ onenand_scan(&onenand_mtd, 1);
+
+}
+
+#endif /* CFG_CMD_ONENAND */
diff --git a/drivers/onenand/onenand_bbt.c b/drivers/onenand/onenand_bbt.c
new file mode 100644
index 0000000000..183fb85aaa
--- /dev/null
+++ b/drivers/onenand/onenand_bbt.c
@@ -0,0 +1,252 @@
+/*
+ * linux/drivers/mtd/onenand/onenand_bbt.c
+ *
+ * Bad Block Table support for the OneNAND driver
+ *
+ * Copyright(c) 2005 Samsung Electronics
+ * Kyungmin Park <kyungmin.park@samsung.com>
+ *
+ * Derived from nand_bbt.c
+ *
+ * TODO:
+ * Split BBT core and chip specific BBT.
+ */
+
+#include <common.h>
+
+#if (CONFIG_COMMANDS & CFG_CMD_ONENAND)
+
+#include <linux/mtd/onenand.h>
+#include <malloc.h>
+
+/**
+ * check_short_pattern - [GENERIC] check if a pattern is in the buffer
+ * @param buf the buffer to search
+ * @param len the length of buffer to search
+ * @param paglen the pagelength
+ * @param td search pattern descriptor
+ *
+ * Check for a pattern at the given place. Used to search bad block
+ * tables and good / bad block identifiers. Same as check_pattern, but
+ * no optional empty check and the pattern is expected to start
+ * at offset 0.
+ *
+ */
+static int check_short_pattern(uint8_t *buf, int len, int paglen, struct nand_bbt_descr *td)
+{
+ int i;
+ uint8_t *p = buf;
+
+ /* Compare the pattern */
+ for (i = 0; i < td->len; i++) {
+ if (p[i] != td->pattern[i])
+ return -1;
+ }
+ return 0;
+}
+
+/**
+ * create_bbt - [GENERIC] Create a bad block table by scanning the device
+ * @param mtd MTD device structure
+ * @param buf temporary buffer
+ * @param bd descriptor for the good/bad block search pattern
+ * @param chip create the table for a specific chip, -1 read all chips.
+ * Applies only if NAND_BBT_PERCHIP option is set
+ *
+ * Create a bad block table by scanning the device
+ * for the given good/bad block identify pattern
+ */
+static int create_bbt(struct mtd_info *mtd, uint8_t *buf, struct nand_bbt_descr *bd, int chip)
+{
+ struct onenand_chip *this = mtd->priv;
+ struct bbm_info *bbm = this->bbm;
+ int i, j, numblocks, len, scanlen;
+ int startblock;
+ loff_t from;
+ size_t readlen, ooblen;
+
+ printk(KERN_INFO "Scanning device for bad blocks\n");
+
+ len = 1;
+
+ /* We need only read few bytes from the OOB area */
+ scanlen = ooblen = 0;
+ readlen = bd->len;
+
+ /* chip == -1 case only */
+ /* Note that numblocks is 2 * (real numblocks) here;
+ * see i += 2 below as it makses shifting and masking less painful
+ */
+ numblocks = mtd->size >> (bbm->bbt_erase_shift - 1);
+ printk(KERN_INFO "num of blocks = %d\n", numblocks);
+ startblock = 0;
+ from = 0;
+
+// ***onenand_read_oob(&onenand_mtd, ofs, len, &retlen, (u_char *) addr);
+
+ for (i = startblock; i < numblocks; ) {
+ int ret;
+
+ for (j = 0; j < len; j++) {
+ size_t retlen;
+
+ /* No need to read pages fully,
+ * just read required OOB bytes */
+
+
+ ret = onenand_read_oob(mtd, from + j * mtd->oobblock + bd->offs,
+ readlen, &retlen, &buf[0]);
+
+ if (ret)
+ return ret;
+
+ if (check_short_pattern(&buf[j * scanlen], scanlen, mtd->oobblock, bd)) {
+ bbm->bbt[i >> 3] |= 0x03 << (i & 0x6);
+ printk(KERN_WARNING "Bad eraseblock %d at 0x%08x\n",
+ i >> 1, (unsigned int) from);
+ break;
+ }
+ }
+ i += 2;
+ from += (1 << bbm->bbt_erase_shift);
+ }
+
+ return 0;
+}
+
+
+/**
+ * onenand_memory_bbt - [GENERIC] create a memory based bad block table
+ * @param mtd MTD device structure
+ * @param bd descriptor for the good/bad block search pattern
+ *
+ * The function creates a memory based bbt by scanning the device
+ * for manufacturer / software marked good / bad blocks
+ */
+static inline int onenand_memory_bbt (struct mtd_info *mtd, struct nand_bbt_descr *bd)
+{
+ unsigned char data_buf[MAX_ONENAND_PAGESIZE];
+
+ bd->options &= ~NAND_BBT_SCANEMPTY;
+ return create_bbt(mtd, data_buf, bd, -1);
+}
+
+/**
+ * onenand_isbad_bbt - [OneNAND Interface] Check if a block is bad
+ * @param mtd MTD device structure
+ * @param offs offset in the device
+ * @param allowbbt allow access to bad block table region
+ */
+static int onenand_isbad_bbt(struct mtd_info *mtd, loff_t offs, int allowbbt)
+{
+ struct onenand_chip *this = mtd->priv;
+ struct bbm_info *bbm = this->bbm;
+ int block;
+ uint8_t res;
+
+ /* Get block number * 2 */
+ block = (int) (offs >> (bbm->bbt_erase_shift - 1));
+ res = (bbm->bbt[block >> 3] >> (block & 0x06)) & 0x03;
+
+ DEBUG(MTD_DEBUG_LEVEL2, "onenand_isbad_bbt: bbt info for offs 0x%08x: (block %d) 0x%02x\n",
+ (unsigned int) offs, block >> 1, res);
+
+ switch ((int) res) {
+ case 0x00: return 0;
+ case 0x01: return 1;
+ case 0x02: return allowbbt ? 0 : 1;
+ }
+
+ return 1;
+}
+
+/**
+ * onenand_scan_bbt - [OneNAND Interface] scan, find, read and maybe create bad block table(s)
+ * @param mtd MTD device structure
+ * @param bd descriptor for the good/bad block search pattern
+ *
+ * The function checks, if a bad block table(s) is/are already
+ * available. If not it scans the device for manufacturer
+ * marked good / bad blocks and writes the bad block table(s) to
+ * the selected place.
+ *
+ * The bad block table memory is allocated here. It must be freed
+ * by calling the onenand_free_bbt function.
+ *
+ */
+int onenand_scan_bbt(struct mtd_info *mtd, struct nand_bbt_descr *bd)
+{
+ struct onenand_chip *this = mtd->priv;
+ struct bbm_info *bbm = this->bbm;
+ int len, ret = 0;
+
+ len = mtd->size >> (this->erase_shift + 2);
+ /* Allocate memory (2bit per block) */
+ bbm->bbt = malloc(len);
+ if (!bbm->bbt) {
+ printk(KERN_ERR "onenand_scan_bbt: Out of memory\n");
+ return -ENOMEM;
+ }
+ /* Clear the memory bad block table */
+ memset(bbm->bbt, 0x00, len);
+
+ /* Set the bad block position */
+ bbm->badblockpos = ONENAND_BADBLOCK_POS;
+
+ /* Set erase shift */
+ bbm->bbt_erase_shift = this->erase_shift;
+
+ if (!bbm->isbad_bbt)
+ bbm->isbad_bbt = onenand_isbad_bbt;
+
+ /* Scan the device to build a memory based bad block table */
+ if ((ret = onenand_memory_bbt(mtd, bd))) {
+ printk(KERN_ERR "onenand_scan_bbt: Can't scan flash and build the RAM-based BBT\n");
+ free(bbm->bbt);
+ bbm->bbt = NULL;
+ }
+
+ return ret;
+}
+
+/*
+ * Define some generic bad / good block scan pattern which are used
+ * while scanning a device for factory marked good / bad blocks.
+ */
+static uint8_t scan_ff_pattern[] = { 0xff, 0xff };
+
+static struct nand_bbt_descr largepage_memorybased = {
+ .options = 0,
+ .offs = 0,
+ .len = 2,
+ .pattern = scan_ff_pattern,
+};
+
+/**
+ * onenand_default_bbt - [OneNAND Interface] Select a default bad block table for the device
+ * @param mtd MTD device structure
+ *
+ * This function selects the default bad block table
+ * support for the device and calls the onenand_scan_bbt function
+ */
+int onenand_default_bbt(struct mtd_info *mtd)
+{
+ struct onenand_chip *this = mtd->priv;
+ struct bbm_info *bbm;
+
+ this->bbm = malloc(sizeof(struct bbm_info));
+ if (!this->bbm)
+ return -ENOMEM;
+
+ bbm = this->bbm;
+
+ memset(bbm, 0, sizeof(struct bbm_info));
+
+ /* 1KB page has same configuration as 2KB page */
+ if (!bbm->badblock_pattern)
+ bbm->badblock_pattern = &largepage_memorybased;
+
+ return onenand_scan_bbt(mtd, bbm->badblock_pattern);
+}
+
+#endif /* CFG_CMD_ONENAND */
diff --git a/drivers/pci.c b/drivers/pci.c
index 5360030661..050582f782 100644
--- a/drivers/pci.c
+++ b/drivers/pci.c
@@ -163,7 +163,7 @@ pci_dev_t pci_find_devices(struct pci_device_id *ids, int index)
for (bus = hose->first_busno; bus <= hose->last_busno; bus++)
#endif
for (bdf = PCI_BDF(bus,0,0);
-#ifdef CONFIG_ELPPC
+#if defined(CONFIG_ELPPC) || defined(CONFIG_PPMC7XX)
bdf < PCI_BDF(bus,PCI_MAX_PCI_DEVICES-1,PCI_MAX_PCI_FUNCTIONS-1);
#else
bdf < PCI_BDF(bus+1,0,0);
@@ -459,6 +459,7 @@ int pci_hose_scan_bus(struct pci_controller *hose, int bus)
PCI_BUS(dev), PCI_DEV(dev), PCI_FUNC(dev));
if (cfg) {
cfg->config_device(hose, dev, cfg);
+ sub_bus = max(sub_bus, hose->current_busno);
#ifdef CONFIG_PCI_PNP
} else {
int n = pciauto_config_device(hose, dev);
diff --git a/drivers/pci_auto.c b/drivers/pci_auto.c
index 3302457a39..15f74328f0 100644
--- a/drivers/pci_auto.c
+++ b/drivers/pci_auto.c
@@ -77,6 +77,7 @@ int pciauto_region_allocate(struct pci_region* res, unsigned int size, unsigned
void pciauto_setup_device(struct pci_controller *hose,
pci_dev_t dev, int bars_num,
struct pci_region *mem,
+ struct pci_region *prefetch,
struct pci_region *io)
{
unsigned int bar_value, bar_response, bar_size;
@@ -111,7 +112,10 @@ void pciauto_setup_device(struct pci_controller *hose,
found_mem64 = 1;
bar_size = ~(bar_response & PCI_BASE_ADDRESS_MEM_MASK) + 1;
- bar_res = mem;
+ if (prefetch && (bar_response & PCI_BASE_ADDRESS_MEM_PREFETCH))
+ bar_res = prefetch;
+ else
+ bar_res = mem;
DEBUGF("PCI Autoconfig: BAR %d, Mem, size=0x%x, ", bar_nr, bar_size);
}
@@ -148,6 +152,7 @@ static void pciauto_prescan_setup_bridge(struct pci_controller *hose,
pci_dev_t dev, int sub_bus)
{
struct pci_region *pci_mem = hose->pci_mem;
+ struct pci_region *pci_prefetch = hose->pci_prefetch;
struct pci_region *pci_io = hose->pci_io;
unsigned int cmdstat;
@@ -169,6 +174,21 @@ static void pciauto_prescan_setup_bridge(struct pci_controller *hose,
cmdstat |= PCI_COMMAND_MEMORY;
}
+ if (pci_prefetch) {
+ /* Round memory allocator to 1MB boundary */
+ pciauto_region_align(pci_prefetch, 0x100000);
+
+ /* Set up memory and I/O filter limits, assume 32-bit I/O space */
+ pci_hose_write_config_word(hose, dev, PCI_PREF_MEMORY_BASE,
+ (pci_prefetch->bus_lower & 0xfff00000) >> 16);
+
+ cmdstat |= PCI_COMMAND_MEMORY;
+ } else {
+ /* We don't support prefetchable memory for now, so disable */
+ pci_hose_write_config_word(hose, dev, PCI_PREF_MEMORY_BASE, 0x1000);
+ pci_hose_write_config_word(hose, dev, PCI_PREF_MEMORY_LIMIT, 0x1000);
+ }
+
if (pci_io) {
/* Round I/O allocator to 4KB boundary */
pciauto_region_align(pci_io, 0x1000);
@@ -181,10 +201,6 @@ static void pciauto_prescan_setup_bridge(struct pci_controller *hose,
cmdstat |= PCI_COMMAND_IO;
}
- /* We don't support prefetchable memory for now, so disable */
- pci_hose_write_config_word(hose, dev, PCI_PREF_MEMORY_BASE, 0x1000);
- pci_hose_write_config_word(hose, dev, PCI_PREF_MEMORY_LIMIT, 0x1000);
-
/* Enable memory and I/O accesses, enable bus master */
pci_hose_write_config_dword(hose, dev, PCI_COMMAND, cmdstat | PCI_COMMAND_MASTER);
}
@@ -193,6 +209,7 @@ static void pciauto_postscan_setup_bridge(struct pci_controller *hose,
pci_dev_t dev, int sub_bus)
{
struct pci_region *pci_mem = hose->pci_mem;
+ struct pci_region *pci_prefetch = hose->pci_prefetch;
struct pci_region *pci_io = hose->pci_io;
/* Configure bus number registers */
@@ -206,6 +223,14 @@ static void pciauto_postscan_setup_bridge(struct pci_controller *hose,
(pci_mem->bus_lower-1) >> 16);
}
+ if (pci_prefetch) {
+ /* Round memory allocator to 1MB boundary */
+ pciauto_region_align(pci_prefetch, 0x100000);
+
+ pci_hose_write_config_word(hose, dev, PCI_PREF_MEMORY_LIMIT,
+ (pci_prefetch->bus_lower-1) >> 16);
+ }
+
if (pci_io) {
/* Round I/O allocator to 4KB boundary */
pciauto_region_align(pci_io, 0x1000);
@@ -239,6 +264,11 @@ void pciauto_config_init(struct pci_controller *hose)
hose->pci_mem->size < hose->regions[i].size)
hose->pci_mem = hose->regions + i;
break;
+ case (PCI_REGION_MEM | PCI_REGION_PREFETCH):
+ if (!hose->pci_prefetch ||
+ hose->pci_prefetch->size < hose->regions[i].size)
+ hose->pci_prefetch = hose->regions + i;
+ break;
}
}
@@ -251,6 +281,14 @@ void pciauto_config_init(struct pci_controller *hose)
hose->pci_mem->bus_start + hose->pci_mem->size - 1);
}
+ if (hose->pci_prefetch) {
+ pciauto_region_init(hose->pci_prefetch);
+
+ DEBUGF("PCI Autoconfig: Prefetchable Memory region: [%lx-%lx]\n",
+ hose->pci_prefetch->bus_start,
+ hose->pci_prefetch->bus_start + hose->pci_prefetch->size - 1);
+ }
+
if (hose->pci_io) {
pciauto_region_init(hose->pci_io);
@@ -275,7 +313,7 @@ int pciauto_config_device(struct pci_controller *hose, pci_dev_t dev)
switch(class) {
case PCI_CLASS_BRIDGE_PCI:
hose->current_busno++;
- pciauto_setup_device(hose, dev, 2, hose->pci_mem, hose->pci_io);
+ pciauto_setup_device(hose, dev, 2, hose->pci_mem, hose->pci_prefetch, hose->pci_io);
DEBUGF("PCI Autoconfig: Found P2P bridge, device %d\n", PCI_DEV(dev));
@@ -301,12 +339,12 @@ int pciauto_config_device(struct pci_controller *hose, pci_dev_t dev)
return sub_bus;
}
- pciauto_setup_device(hose, dev, 6, hose->pci_mem, hose->pci_io);
+ pciauto_setup_device(hose, dev, 6, hose->pci_mem, hose->pci_prefetch, hose->pci_io);
break;
case PCI_CLASS_BRIDGE_CARDBUS:
/* just do a minimal setup of the bridge, let the OS take care of the rest */
- pciauto_setup_device(hose, dev, 0, hose->pci_mem, hose->pci_io);
+ pciauto_setup_device(hose, dev, 0, hose->pci_mem, hose->pci_prefetch, hose->pci_io);
DEBUGF("PCI Autoconfig: Found P2CardBus bridge, device %d\n", PCI_DEV(dev));
@@ -328,11 +366,11 @@ int pciauto_config_device(struct pci_controller *hose, pci_dev_t dev)
* the PIMMR window to be allocated (BAR0 - 1MB size)
*/
DEBUGF("PCI Autoconfig: Broken bridge found, only minimal config\n");
- pciauto_setup_device(hose, dev, 0, hose->pci_mem, hose->pci_io);
+ pciauto_setup_device(hose, dev, 0, hose->pci_mem, hose->pci_prefetch, hose->pci_io);
break;
#endif
default:
- pciauto_setup_device(hose, dev, 6, hose->pci_mem, hose->pci_io);
+ pciauto_setup_device(hose, dev, 6, hose->pci_mem, hose->pci_prefetch, hose->pci_io);
break;
}
diff --git a/drivers/pci_indirect.c b/drivers/pci_indirect.c
index e8f19f5701..d7be0810f5 100644
--- a/drivers/pci_indirect.c
+++ b/drivers/pci_indirect.c
@@ -36,6 +36,10 @@ static int \
indirect_##rw##_config_##size(struct pci_controller *hose, \
pci_dev_t dev, int offset, type val) \
{ \
+ u32 b, d,f; \
+ b = PCI_BUS(dev); d = PCI_DEV(dev); f = PCI_FUNC(dev); \
+ b = b - hose->first_busno; \
+ dev = PCI_BDF(b, d, f); \
out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000000); \
sync(); \
cfg_##rw(val, hose->cfg_data + (offset & mask), type, op); \
@@ -47,17 +51,25 @@ static int \
indirect_##rw##_config_##size(struct pci_controller *hose, \
pci_dev_t dev, int offset, type val) \
{ \
+ u32 b, d,f; \
+ b = PCI_BUS(dev); d = PCI_DEV(dev); f = PCI_FUNC(dev); \
+ b = b - hose->first_busno; \
+ dev = PCI_BDF(b, d, f); \
*(hose->cfg_addr) = dev | (offset & 0xfc) | 0x80000000; \
sync(); \
cfg_##rw(val, hose->cfg_data + (offset & mask), type, op); \
return 0; \
}
-#elif defined(CONFIG_440GX) || defined(CONFIG_440EP) || defined(CONFIG_440GR)
+#elif defined(CONFIG_440GX) || defined(CONFIG_440EP) || defined(CONFIG_440GR) || defined(CONFIG_440SPE)
#define INDIRECT_PCI_OP(rw, size, type, op, mask) \
static int \
indirect_##rw##_config_##size(struct pci_controller *hose, \
pci_dev_t dev, int offset, type val) \
{ \
+ u32 b, d,f; \
+ b = PCI_BUS(dev); d = PCI_DEV(dev); f = PCI_FUNC(dev); \
+ b = b - hose->first_busno; \
+ dev = PCI_BDF(b, d, f); \
if (PCI_BUS(dev) > 0) \
out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000001); \
else \
@@ -71,6 +83,10 @@ static int \
indirect_##rw##_config_##size(struct pci_controller *hose, \
pci_dev_t dev, int offset, type val) \
{ \
+ u32 b, d,f; \
+ b = PCI_BUS(dev); d = PCI_DEV(dev); f = PCI_FUNC(dev); \
+ b = b - hose->first_busno; \
+ dev = PCI_BDF(b, d, f); \
out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000000); \
cfg_##rw(val, hose->cfg_data + (offset & mask), type, op); \
return 0; \
diff --git a/drivers/ps2ser.c b/drivers/ps2ser.c
index e2a38dc3dc..4e304f7407 100644
--- a/drivers/ps2ser.c
+++ b/drivers/ps2ser.c
@@ -20,6 +20,11 @@
#include <asm/io.h>
#include <asm/atomic.h>
#include <ps2mult.h>
+#if defined(CFG_NS16550) || defined(CONFIG_MPC85xx)
+#include <ns16550.h>
+#endif
+
+DECLARE_GLOBAL_DATA_PTR;
/* #define DEBUG */
@@ -43,13 +48,24 @@
#else
#error CONFIG_PS2SERIAL must be in 1 ... 6
#endif
-#endif /* CONFIG_MPC5xxx */
+
+#elif defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || defined(CONFIG_MPC8555)
+
+#if CONFIG_PS2SERIAL == 1
+#define COM_BASE (CFG_CCSRBAR+0x4500)
+#elif CONFIG_PS2SERIAL == 2
+#define COM_BASE (CFG_CCSRBAR+0x4600)
+#else
+#error CONFIG_PS2SERIAL must be in 1 ... 2
+#endif
+
+#endif /* CONFIG_MPC5xxx / CONFIG_MPC8540 / other */
static int ps2ser_getc_hw(void);
static void ps2ser_interrupt(void *dev_id);
extern struct serial_state rs_table[]; /* in serial.c */
-#ifndef CONFIG_MPC5xxx
+#if !defined(CONFIG_MPC5xxx) && !defined(CONFIG_MPC8540) && !defined(CONFIG_MPC8541) && !defined(CONFIG_MPC8555)
static struct serial_state *state;
#endif
@@ -61,8 +77,6 @@ static int ps2buf_out_idx;
#ifdef CONFIG_MPC5xxx
int ps2ser_init(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
volatile struct mpc5xxx_psc *psc = (struct mpc5xxx_psc *)PSC_BASE;
unsigned long baseclk;
int div;
@@ -106,7 +120,23 @@ int ps2ser_init(void)
return (0);
}
-#else /* !CONFIG_MPC5xxx */
+#elif defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || defined(CONFIG_MPC8555)
+int ps2ser_init(void)
+{
+ NS16550_t com_port = (NS16550_t)COM_BASE;
+
+ com_port->ier = 0x00;
+ com_port->lcr = LCR_BKSE | LCR_8N1;
+ com_port->dll = (CFG_NS16550_CLK / 16 / PS2SER_BAUD) & 0xff;
+ com_port->dlm = ((CFG_NS16550_CLK / 16 / PS2SER_BAUD) >> 8) & 0xff;
+ com_port->lcr = LCR_8N1;
+ com_port->mcr = (MCR_DTR | MCR_RTS);
+ com_port->fcr = (FCR_FIFO_EN | FCR_RXSR | FCR_TXSR);
+
+ return (0);
+}
+
+#else /* !CONFIG_MPC5xxx && !CONFIG_MPC8540 / other */
static inline unsigned int ps2ser_in(int offset)
{
@@ -150,12 +180,14 @@ int ps2ser_init(void)
return 0;
}
-#endif /* CONFIG_MPC5xxx */
+#endif /* CONFIG_MPC5xxx / CONFIG_MPC8540 / other */
void ps2ser_putc(int chr)
{
#ifdef CONFIG_MPC5xxx
volatile struct mpc5xxx_psc *psc = (struct mpc5xxx_psc *)PSC_BASE;
+#elif defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || defined(CONFIG_MPC8555)
+ NS16550_t com_port = (NS16550_t)COM_BASE;
#endif
#ifdef DEBUG
printf(">>>> 0x%02x\n", chr);
@@ -165,6 +197,9 @@ void ps2ser_putc(int chr)
while (!(psc->psc_status & PSC_SR_TXRDY));
psc->psc_buffer_8 = chr;
+#elif defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || defined(CONFIG_MPC8555)
+ while ((com_port->lsr & LSR_THRE) == 0);
+ com_port->thr = chr;
#else
while (!(ps2ser_in(UART_LSR) & UART_LSR_THRE));
@@ -176,6 +211,8 @@ static int ps2ser_getc_hw(void)
{
#ifdef CONFIG_MPC5xxx
volatile struct mpc5xxx_psc *psc = (struct mpc5xxx_psc *)PSC_BASE;
+#elif defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || defined(CONFIG_MPC8555)
+ NS16550_t com_port = (NS16550_t)COM_BASE;
#endif
int res = -1;
@@ -183,6 +220,10 @@ static int ps2ser_getc_hw(void)
if (psc->psc_status & PSC_SR_RXRDY) {
res = (psc->psc_buffer_8);
}
+#elif defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || defined(CONFIG_MPC8555)
+ if (com_port->lsr & LSR_DR) {
+ res = com_port->rbr;
+ }
#else
if (ps2ser_in(UART_LSR) & UART_LSR_DR) {
res = (ps2ser_in(UART_RX));
@@ -238,6 +279,8 @@ static void ps2ser_interrupt(void *dev_id)
{
#ifdef CONFIG_MPC5xxx
volatile struct mpc5xxx_psc *psc = (struct mpc5xxx_psc *)PSC_BASE;
+#elif defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || defined(CONFIG_MPC8555)
+ NS16550_t com_port = (NS16550_t)COM_BASE;
#endif
int chr;
int status;
@@ -246,6 +289,8 @@ static void ps2ser_interrupt(void *dev_id)
chr = ps2ser_getc_hw();
#ifdef CONFIG_MPC5xxx
status = psc->psc_status;
+#elif defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || defined(CONFIG_MPC8555)
+ status = com_port->lsr;
#else
status = ps2ser_in(UART_IIR);
#endif
@@ -260,6 +305,8 @@ static void ps2ser_interrupt(void *dev_id)
}
#ifdef CONFIG_MPC5xxx
} while (status & PSC_SR_RXRDY);
+#elif defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || defined(CONFIG_MPC8555)
+ } while (status & LSR_DR);
#else
} while (status & UART_IIR_RDI);
#endif
diff --git a/drivers/pxa_pcmcia.c b/drivers/pxa_pcmcia.c
new file mode 100644
index 0000000000..d9d38bbfcd
--- /dev/null
+++ b/drivers/pxa_pcmcia.c
@@ -0,0 +1,95 @@
+#include <common.h>
+#include <config.h>
+
+#ifdef CONFIG_PXA_PCMCIA
+
+#include <pcmcia.h>
+#include <asm/arch/pxa-regs.h>
+#include <asm/io.h>
+
+static inline void msWait(unsigned msVal)
+{
+ udelay(msVal*1000);
+}
+
+int pcmcia_on (void)
+{
+ unsigned int reg_arr[] = {
+ 0x48000028, CFG_MCMEM0_VAL,
+ 0x4800002c, CFG_MCMEM1_VAL,
+ 0x48000030, CFG_MCATT0_VAL,
+ 0x48000034, CFG_MCATT1_VAL,
+ 0x48000038, CFG_MCIO0_VAL,
+ 0x4800003c, CFG_MCIO1_VAL,
+
+ 0, 0
+ };
+ int i, rc;
+
+#ifdef CONFIG_EXADRON1
+ int cardDetect;
+ volatile unsigned int *v_pBCRReg =
+ (volatile unsigned int *) 0x08000000;
+#endif
+
+ debug ("%s\n", __FUNCTION__);
+
+ i = 0;
+ while (reg_arr[i])
+ *((volatile unsigned int *) reg_arr[i++]) |= reg_arr[i++];
+ udelay (1000);
+
+ debug ("%s: programmed mem controller \n", __FUNCTION__);
+
+#ifdef CONFIG_EXADRON1
+
+/*define useful BCR masks */
+#define BCR_CF_INIT_VAL 0x00007230
+#define BCR_CF_PWRON_BUSOFF_RESETOFF_VAL 0x00007231
+#define BCR_CF_PWRON_BUSOFF_RESETON_VAL 0x00007233
+#define BCR_CF_PWRON_BUSON_RESETON_VAL 0x00007213
+#define BCR_CF_PWRON_BUSON_RESETOFF_VAL 0x00007211
+
+ /* we see from the GPIO bit if the card is present */
+ cardDetect = !(GPLR0 & GPIO_bit (14));
+
+ if (cardDetect) {
+ printf ("No PCMCIA card found!\n");
+ }
+
+ /* reset the card via the BCR line */
+ *v_pBCRReg = (unsigned) BCR_CF_INIT_VAL;
+ msWait (500);
+
+ *v_pBCRReg = (unsigned) BCR_CF_PWRON_BUSOFF_RESETOFF_VAL;
+ msWait (500);
+
+ *v_pBCRReg = (unsigned) BCR_CF_PWRON_BUSOFF_RESETON_VAL;
+ msWait (500);
+
+ *v_pBCRReg = (unsigned) BCR_CF_PWRON_BUSON_RESETON_VAL;
+ msWait (500);
+
+ *v_pBCRReg = (unsigned) BCR_CF_PWRON_BUSON_RESETOFF_VAL;
+ msWait (1500);
+
+ /* enable address bus */
+ GPCR1 = 0x01;
+ /* and the first CF slot */
+ MECR = 0x00000002;
+
+#endif /* EXADRON 1 */
+
+ rc = check_ide_device (0); /* use just slot 0 */
+
+ return rc;
+}
+
+#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
+int pcmcia_off (void)
+{
+ return 0;
+}
+#endif
+
+#endif /* CONFIG_PXA_PCMCIA */
diff --git a/drivers/rpx_pcmcia.c b/drivers/rpx_pcmcia.c
new file mode 100644
index 0000000000..2a0a9e05a2
--- /dev/null
+++ b/drivers/rpx_pcmcia.c
@@ -0,0 +1,73 @@
+/* -------------------------------------------------------------------- */
+/* RPX Boards from Embedded Planet */
+/* -------------------------------------------------------------------- */
+#include <common.h>
+#ifdef CONFIG_8xx
+#include <mpc8xx.h>
+#endif
+#include <pcmcia.h>
+
+#undef CONFIG_PCMCIA
+
+#if CONFIG_COMMANDS & CFG_CMD_PCMCIA
+#define CONFIG_PCMCIA
+#endif
+
+#if (CONFIG_COMMANDS & CFG_CMD_IDE) && defined(CONFIG_IDE_8xx_PCCARD)
+#define CONFIG_PCMCIA
+#endif
+
+#if defined(CONFIG_PCMCIA) \
+ && (defined(CONFIG_RPXCLASSIC) || defined(CONFIG_RPXLITE))
+
+#define PCMCIA_BOARD_MSG "RPX CLASSIC or RPX LITE"
+
+int pcmcia_voltage_set(int slot, int vcc, int vpp)
+{
+ u_long reg = 0;
+
+ switch(vcc) {
+ case 0: break;
+ case 33: reg |= BCSR1_PCVCTL4; break;
+ case 50: reg |= BCSR1_PCVCTL5; break;
+ default: return 1;
+ }
+
+ switch(vpp) {
+ case 0: break;
+ case 33:
+ case 50:
+ if(vcc == vpp)
+ reg |= BCSR1_PCVCTL6;
+ else
+ return 1;
+ break;
+ case 120:
+ reg |= BCSR1_PCVCTL7;
+ default: return 1;
+ }
+
+ /* first, turn off all power */
+ *((uint *)RPX_CSR_ADDR) &= ~(BCSR1_PCVCTL4 | BCSR1_PCVCTL5
+ | BCSR1_PCVCTL6 | BCSR1_PCVCTL7);
+
+ /* enable new powersettings */
+ *((uint *)RPX_CSR_ADDR) |= reg;
+
+ return 0;
+}
+
+int pcmcia_hardware_enable (int slot)
+{
+ return 0; /* No hardware to enable */
+}
+
+#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
+static int pcmcia_hardware_disable(int slot)
+{
+ return 0; /* No hardware to disable */
+}
+#endif /* CONFIG_COMMANDS & CFG_CMD_PCMCIA */
+
+
+#endif /* CONFIG_PCMCIA && (CONFIG_RPXCLASSIC || CONFIG_RPXLITE) */
diff --git a/drivers/s3c4510b_eth.c b/drivers/s3c4510b_eth.c
index 0274dd2f99..48901aa12f 100644
--- a/drivers/s3c4510b_eth.c
+++ b/drivers/s3c4510b_eth.c
@@ -175,7 +175,7 @@ s32 eth_send(volatile void *packet, s32 length)
}
/* copy user data into frame data pointer */
- memcpy((void *)eth->m_curTX_FD->m_frameDataPtr.bf.dataPtr,
+ memcpy((void *)(eth->m_curTX_FD->m_frameDataPtr.bf.dataPtr),
(void *)packet,
length);
diff --git a/drivers/s3c4510b_uart.c b/drivers/s3c4510b_uart.c
index 44b96a9c5e..ddcd591f84 100644
--- a/drivers/s3c4510b_uart.c
+++ b/drivers/s3c4510b_uart.c
@@ -50,6 +50,8 @@
#include <asm/hardware.h>
#include "s3c4510b_uart.h"
+DECLARE_GLOBAL_DATA_PTR;
+
static UART *uart;
/* flush serial input queue. returns 0 on success or negative error
@@ -82,8 +84,6 @@ static int serial_flush_output(void)
void serial_setbrg (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
UART_LINE_CTRL ulctrl;
UART_CTRL uctrl;
UART_BAUD_DIV ubd;
diff --git a/drivers/serial.c b/drivers/serial.c
index 057a1ab017..228781b46a 100644
--- a/drivers/serial.c
+++ b/drivers/serial.c
@@ -30,6 +30,8 @@
#include <ns87308.h>
#endif
+DECLARE_GLOBAL_DATA_PTR;
+
#if !defined(CONFIG_CONS_INDEX)
#error "No console index specified."
#elif (CONFIG_CONS_INDEX < 1) || (CONFIG_CONS_INDEX > 4)
@@ -77,7 +79,6 @@ static NS16550_t serial_ports[4] = {
static int calc_divisor (NS16550_t port)
{
- DECLARE_GLOBAL_DATA_PTR;
#ifdef CONFIG_OMAP1510
/* If can't cleanly clock 115200 set div to 1 */
if ((CFG_NS16550_CLK == 12000000) && (gd->baudrate == 115200)) {
diff --git a/drivers/serial_max3100.c b/drivers/serial_max3100.c
index bbe212b81f..35c5596985 100644
--- a/drivers/serial_max3100.c
+++ b/drivers/serial_max3100.c
@@ -28,6 +28,8 @@
#ifdef CONFIG_MAX3100_SERIAL
+DECLARE_GLOBAL_DATA_PTR;
+
/**************************************************************/
/* convienient macros */
@@ -217,7 +219,6 @@ int serial_init(void)
{
unsigned int wconf, rconf;
int i;
- DECLARE_GLOBAL_DATA_PTR;
wconf = 0;
diff --git a/drivers/smc91111.c b/drivers/smc91111.c
index 060da8ff2a..f91e4b9843 100644
--- a/drivers/smc91111.c
+++ b/drivers/smc91111.c
@@ -160,6 +160,9 @@ extern void eth_halt(void);
extern int eth_rx(void);
extern int eth_send(volatile void *packet, int length);
+#ifdef SHARED_RESOURCES
+ extern void swap_to(int device_id);
+#endif
/*
. This is called by register_netdev(). It is responsible for
@@ -210,7 +213,7 @@ static int smc_rcv(void);
. If an EEPROM is present it really should be consulted.
*/
int smc_get_ethaddr(bd_t *bd);
-int get_rom_mac(char *v_rom_mac);
+int get_rom_mac(uchar *v_rom_mac);
/*
------------------------------------------------------------
@@ -276,17 +279,23 @@ static inline void SMC_outb(byte value, dword offset)
static inline void SMC_insw(dword offset, volatile uchar* buf, dword len)
{
+ volatile word *p = (volatile word *)buf;
+
while (len-- > 0) {
- *((word*)buf)++ = SMC_inw(offset);
- barrier(); *((volatile u32*)(0xc0000000));
+ *p++ = SMC_inw(offset);
+ barrier();
+ *((volatile u32*)(0xc0000000));
}
}
static inline void SMC_outsw(dword offset, uchar* buf, dword len)
{
+ volatile word *p = (volatile word *)buf;
+
while (len-- > 0) {
- SMC_outw(*((word*)buf)++, offset);
- barrier(); *(volatile u32*)(0xc0000000);
+ SMC_outw(*p++, offset);
+ barrier();
+ *(volatile u32*)(0xc0000000);
}
}
#endif /* CONFIG_SMC_USE_IOFUNCS */
@@ -298,7 +307,7 @@ static char unsigned smc_mac_addr[6] = {0x02, 0x80, 0xad, 0x20, 0x31, 0xb8};
* the default mac address.
*/
-void smc_set_mac_addr(const char *addr) {
+void smc_set_mac_addr(const unsigned char *addr) {
int i;
for (i=0; i < sizeof(smc_mac_addr); i++){
@@ -527,6 +536,9 @@ static void smc_shutdown()
SMC_SELECT_BANK( 0 );
SMC_outb( RCR_CLEAR, RCR_REG );
SMC_outb( TCR_CLEAR, TCR_REG );
+#ifdef SHARED_RESOURCES
+ swap_to(FLASH);
+#endif
}
@@ -1505,6 +1517,9 @@ static void print_packet( byte * buf, int length )
#endif
int eth_init(bd_t *bd) {
+#ifdef SHARED_RESOURCES
+ swap_to(ETHERNET);
+#endif
return (smc_open(bd));
}
@@ -1524,7 +1539,8 @@ int smc_get_ethaddr (bd_t * bd)
{
int env_size, rom_valid, env_present = 0, reg;
char *s = NULL, *e, *v_mac, es[] = "11:22:33:44:55:66";
- uchar s_env_mac[64], v_env_mac[6], v_rom_mac[6];
+ char s_env_mac[64];
+ uchar v_env_mac[6], v_rom_mac[6];
env_size = getenv_r ("ethaddr", s_env_mac, sizeof (s_env_mac));
if ((env_size > 0) && (env_size < sizeof (es))) { /* exit if env is bad */
@@ -1547,7 +1563,7 @@ int smc_get_ethaddr (bd_t * bd)
if (!env_present) { /* if NO env */
if (rom_valid) { /* but ROM is valid */
- v_mac = v_rom_mac;
+ v_mac = (char *)v_rom_mac;
sprintf (s_env_mac, "%02X:%02X:%02X:%02X:%02X:%02X",
v_mac[0], v_mac[1], v_mac[2], v_mac[3],
v_mac[4], v_mac[5]);
@@ -1557,7 +1573,7 @@ int smc_get_ethaddr (bd_t * bd)
return (-1);
}
} else { /* good env, don't care ROM */
- v_mac = v_env_mac; /* always use a good env over a ROM */
+ v_mac = (char *)v_env_mac; /* always use a good env over a ROM */
}
if (env_present && rom_valid) { /* if both env and ROM are good */
@@ -1577,13 +1593,13 @@ int smc_get_ethaddr (bd_t * bd)
}
}
memcpy (bd->bi_enetaddr, v_mac, 6); /* update global address to match env (allows env changing) */
- smc_set_mac_addr (v_mac); /* use old function to update smc default */
+ smc_set_mac_addr ((uchar *)v_mac); /* use old function to update smc default */
PRINTK("Using MAC Address %02X:%02X:%02X:%02X:%02X:%02X\n", v_mac[0], v_mac[1],
v_mac[2], v_mac[3], v_mac[4], v_mac[5]);
return (0);
}
-int get_rom_mac (char *v_rom_mac)
+int get_rom_mac (uchar *v_rom_mac)
{
#ifdef HARDCODE_MAC /* used for testing or to supress run time warnings */
char hw_mac_addr[] = { 0x02, 0x80, 0xad, 0x20, 0x31, 0xb8 };
diff --git a/drivers/smc91111.h b/drivers/smc91111.h
index cf08582fbf..d03cbc320b 100644
--- a/drivers/smc91111.h
+++ b/drivers/smc91111.h
@@ -49,7 +49,7 @@
* in order to override the default mac address.
*/
-void smc_set_mac_addr(const char *addr);
+void smc_set_mac_addr (const unsigned char *addr);
/* I want some simple types */
@@ -185,6 +185,8 @@ typedef unsigned long int dword;
#ifdef CONFIG_ADNPESC1
#define SMC_inw(r) (*((volatile word *)(SMC_BASE_ADDRESS+((r)<<1))))
+#elif CONFIG_BLACKFIN
+#define SMC_inw(r) ({ word __v = (*((volatile word *)(SMC_BASE_ADDRESS+(r)))); asm("ssync;"); __v;})
#else
#define SMC_inw(r) (*((volatile word *)(SMC_BASE_ADDRESS+(r))))
#endif
@@ -192,6 +194,8 @@ typedef unsigned long int dword;
#ifdef CONFIG_ADNPESC1
#define SMC_outw(d,r) (*((volatile word *)(SMC_BASE_ADDRESS+((r)<<1))) = d)
+#elif CONFIG_BLACKFIN
+#define SMC_outw(d,r) {(*((volatile word *)(SMC_BASE_ADDRESS+(r))) = d);asm("ssync;");}
#else
#define SMC_outw(d,r) (*((volatile word *)(SMC_BASE_ADDRESS+(r))) = d)
#endif
diff --git a/drivers/smsc9118.c b/drivers/smsc9118.c
new file mode 100644
index 0000000000..f33c1cb3eb
--- /dev/null
+++ b/drivers/smsc9118.c
@@ -0,0 +1,855 @@
+//--------------------------------------------------------------------------
+//
+// File name: smsc9118.c
+//
+// Abstract: Driver for SMSC LAN9118 ethernet controller.
+//
+// Start Automated RH
+// *** Do not edit between "Start Automated RH" and "End Automated RH" ***
+//
+// Copyright 2005, Seagate Technology LLC
+//
+// This program is free software; you can redistribute it and/or modify
+// it under the terms of the GNU General Public License as published by
+// the Free Software Foundation; either version 2 of the License, or
+// (at your option) any later version.
+//
+// This program is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+//
+// You should have received a copy of the GNU General Public License
+// along with this program; if not, write to the Free Software
+// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+//
+// Revision History
+//
+// *** Do not edit between "Start Automated RH" and "End Automated RH" ***
+// End Automated RH
+//
+//--------------------------------------------------------------------------
+/*---------------------------------------------------------------------------
+ * Copyright(c) 2005-2006 SMSC
+ *
+ * Use of this source code is subject to the terms of the SMSC Software
+ * License Agreement (SLA) under which you licensed this software product.
+ * If you did not accept the terms of the SLA, you are not authorized to use
+ * this source code.
+ *
+ * This code and information is provided as is without warranty of any kind,
+ * either expressed or implied, including but not limited to the implied
+ * warranties of merchantability and/or fitness for a particular purpose.
+ *
+ * File name : smsc9118.c
+ * Description : smsc9118 polled driver (non-interrupt driven)
+ *
+ * History :
+ * 09-27-06 MDG v1.0 (First Release)
+ * modified for ARM platform
+ *----------------------------------------------------------------------------*/
+
+#include <common.h>
+#include <command.h>
+#include <config.h>
+#include "smsc9118.h"
+#include <net.h>
+
+#ifdef CONFIG_DRIVER_SMSC9118
+
+//*************************************************************************
+ // FUNCTION PROTOTYPES
+
+//*************************************************************************
+int eth_init(bd_t *bd);
+void eth_halt(void);
+int eth_rx(void);
+int eth_send(volatile void *packet, int length);
+extern void *malloc( unsigned ); // <stdlib.h>
+extern void free( void * ); // <stdlib.h>
+
+//*************************************************************************
+ // LOCAL DEFINITIONS AND MACROS
+
+//*************************************************************************
+//#define DEBUG
+#define GPIO_OUT(val) (*GPIO_CFG = ((*GPIO_CFG & ~GPIO_CFG_GPIOD_MSK) | (val & GPIO_CFG_GPIOD_MSK)))
+#define ENET_MAX_MTU PKTSIZE
+#define ENET_MAX_MTU_ALIGNED PKTSIZE_ALIGN
+#define NUM_RX_BUFF PKTBUFSRX
+#define ENET_ADDR_LENGTH 6
+#define TX_TIMEOUT_COUNT 30 // waiting for TX_FIFO to drain
+
+
+//*************************************************************************
+ // GLOBAL DATA
+
+//*************************************************************************
+static const char date_code[] = BUILD_NUMBER;
+
+static char * txbp; // TX buffer pointer (only 1 buffer)
+static volatile char * rxbp[PKTBUFSRX]; // Receiver buffer queue (IP layers)
+static struct rxQue rxAvlQue[PKTBUFSRX]; // Receive buffer available queue
+static int rxNdx = 0; // Current receive buffer index
+static int rxNdxIn = 0; // Used for input
+static int rxNdxOut = 0; // Used for output to protocol layer
+static ushort lastTxTag = 0x0;
+static unsigned char macAddr[ENET_ADDR_LENGTH];
+
+// Temp variables
+//#ifdef DEBUG
+ulong MaxRxFifoSz;
+ulong TotalInts = 0;
+ulong TotalRXE = 0;
+ulong TotalRxPackets = 0;
+ulong TotalBytes = 0;
+ulong EmptyReads = 0;
+
+ulong RxPacketBuf[400];
+ulong SWIntTriggered = FALSE;
+ulong TotalRxDrop = 0;
+ulong TotalPackets = 0;
+ulong TotalWords = 0;
+ulong TBLower1, TBLower2;
+//#endif
+// Temp variables
+
+
+//*************************************************************************
+ // EXTERNS
+
+//*************************************************************************
+#ifdef DEBUG
+extern int use_smsc9118;
+#endif
+
+static void lan9118_udelay(unsigned long delta) // Arg is really microseconds
+{
+ const unsigned long start = *FREE_RUN, // Start timing
+ usec = delta * (25000000/1000000);
+
+ // usec adjusted for 25MHz on-chip clock, 1 microsecond (1/1000000) scaling
+ do {
+ delta = *FREE_RUN;
+ if (delta >= start)
+ delta = (delta - start);
+ else
+ delta = (delta - start) + 1; // use 0x100000000, not 0xffffffff
+ } while (delta < usec);
+}
+
+static int MacBusy(int ReqTO)
+{
+ int timeout = ReqTO;
+ int RetVal = FALSE; // No timeout
+
+ while (timeout--) {
+ if (!(*MAC_CSR_CMD & MAC_CSR_CMD_CSR_BUSY)) {
+ goto done;
+ }
+ }
+ RetVal = TRUE; // Timeout
+done:
+ return (RetVal);
+}
+
+static ulong
+GetMacReg(int Reg)
+{
+ ulong RegVal = 0xffffffff;
+
+ if (*MAC_CSR_CMD & MAC_CSR_CMD_CSR_BUSY) {
+ LAN9118_WARN("GetMacReg: previous command not complete\n");
+ goto done;
+ }
+
+ *MAC_CSR_CMD = MAC_RD_CMD(Reg);
+ DELAY(1);
+
+ if (MacBusy(MAC_TIMEOUT) == TRUE) {
+ LAN9118_WARN("GetMacReg: timeout waiting for response "
+ "from MAC\n");
+ goto done;
+ }
+
+ RegVal = *MAC_CSR_DATA;
+done:
+ return (RegVal);
+}
+
+static int
+PhyBusy(int ReqTO)
+{
+ int timeout = ReqTO;
+ int RetVal = FALSE; // No timeout
+
+ while (timeout--) {
+ if (!(GetMacReg(MAC_MIIACC) & MAC_MIIACC_MII_BUSY)) {
+ goto done;
+ }
+ }
+
+ RetVal = TRUE; // Timeout
+done:
+ return (RetVal);
+}
+
+static int
+SetMacReg(int Reg, ulong Value)
+{
+ int RetVal = FALSE;
+
+ if (*MAC_CSR_CMD & MAC_CSR_CMD_CSR_BUSY) {
+ LAN9118_WARN("SetMacReg: previous command not complete\n");
+ goto done;
+ }
+
+ *MAC_CSR_DATA = Value;
+ DELAY(1);
+ *MAC_CSR_CMD = MAC_WR_CMD(Reg);
+ DELAY(1);
+
+ if (MacBusy(MAC_TIMEOUT) == TRUE) {
+ LAN9118_WARN("SetMacReg: timeout waiting for response "
+ "from MAC\n");
+ goto done;
+ }
+
+ RetVal = TRUE;
+done:
+ return (RetVal);
+}
+
+static ushort
+GetPhyReg(unchar Reg)
+{
+ ushort RegVal = 0xffff;
+
+ if (GetMacReg(MAC_MIIACC) & MAC_MIIACC_MII_BUSY) {
+ LAN9118_WARN("GetPhyReg: MII busy\n");
+ RegVal = 0;
+ goto done;
+ }
+
+ SetMacReg(MAC_MIIACC, MAC_MII_RD_CMD((unchar)PHY_ADDR, Reg));
+ DELAY(1);
+
+ if (PhyBusy(PHY_TIMEOUT) == TRUE) {
+ LAN9118_WARN("GetPhyReg: timeout waiting for MII command\n");
+ goto done;
+ }
+
+ RegVal = (ushort)GetMacReg(MAC_MIIDATA);
+done:
+ return (RegVal);
+}
+
+static int
+SetPhyReg(unchar Reg, ushort Value)
+{
+ int RetVal = FALSE;
+
+ if (GetMacReg(MAC_MIIACC) & MAC_MIIACC_MII_BUSY) {
+ LAN9118_WARN("SetPhyReg: MII busy\n");
+ goto done;
+ }
+
+ SetMacReg(MAC_MIIDATA, Value);
+ DELAY(1);
+ SetMacReg(MAC_MIIACC, MAC_MII_WR_CMD((unchar)PHY_ADDR, Reg));
+ DELAY(1);
+
+ if (PhyBusy(PHY_TIMEOUT) == TRUE) {
+ LAN9118_WARN("SetPhyReg: timeout waiting for MII command\n");
+ goto done;
+ }
+
+ RetVal = TRUE;
+done:
+ return (RetVal);
+}
+
+// Display directly accessed, Control/Status Registers
+static int
+DumpCsrRegs(void)
+{
+ printf("ID_REV:\t\t0x%0.8x\n", *ID_REV);
+ printf("IRQ_CFG:\t0x%0.8x\n", *IRQ_CFG);
+ printf("INT_STS:\t0x%0.8x\n", *INT_STS);
+ printf("INT_EN:\t\t0x%0.8x\n", *INT_EN);
+ printf("BYTE_TEST:\t0x%0.8x\n", *BYTE_TEST);
+ printf("FIFO_INT:\t0x%0.8x\n", *FIFO_INT);
+ printf("RX_CFG:\t\t0x%0.8x\n", *RX_CFG);
+ printf("TX_CFG:\t\t0x%0.8x\n", *TX_CFG);
+ printf("HW_CFG:\t\t0x%0.8x\n", *HW_CFG);
+ printf("RX_DP_CTL:\t0x%0.8x\n", *RX_DP_CTL);
+ printf("RX_FIFO_INF:\t0x%0.8x\n", *RX_FIFO_INF);
+ printf("TX_FIFO_INF:\t0x%0.8x\n", *TX_FIFO_INF);
+ printf("PWR_MGMT:\t0x%0.8x\n", *PWR_MGMT);
+ printf("GPIO_CFG:\t0x%0.8x\n", *GPIO_CFG);
+ printf("GPT_CFG:\t0x%0.8x\n", *GPT_CFG);
+ printf("GPT_CNT:\t0x%0.8x\n", *GPT_CNT);
+ printf("FPGA_REV:\t0x%0.8x\n", *FPGA_REV);
+ printf("ENDIAN:\t\t0x%0.8x\n", *ENDIAN);
+ printf("FREE_RUN\t0x%0.8x\n", *FREE_RUN);
+ printf("RX_DROP\t\t0x%0.8x\n", *RX_DROP);
+ printf("MAC_CSR_CMD\t0x%0.8x\n", *MAC_CSR_CMD);
+ printf("MAC_CSR_DATA\t0x%0.8x\n", *MAC_CSR_DATA);
+ printf("AFC_CFG\t\t0x%0.8x\n", *AFC_CFG);
+ return (0);
+}
+
+// Display Media Access Controller Registers
+static int
+DumpMacRegs(void)
+{
+ printf("MAC_CR\t\t0x%0.8x\n", GetMacReg(MAC_CR));
+ printf("MAC_ADDRH\t0x%0.8x\n", GetMacReg(MAC_ADDRH));
+ printf("MAC_ADDRL\t0x%0.8x\n", GetMacReg(MAC_ADDRL));
+ printf("MAC_HASHH\t0x%0.8x\n", GetMacReg(MAC_HASHH));
+ printf("MAC_HASHL\t0x%0.8x\n", GetMacReg(MAC_HASHL));
+ printf("MAC_MIIACC\t0x%0.8x\n", GetMacReg(MAC_MIIACC));
+ printf("MAC_MIIDATA\t0x%0.8x\n", GetMacReg(MAC_MIIDATA));
+ printf("MAC_FLOW\t0x%0.8x\n", GetMacReg(MAC_FLOW));
+ printf("MAC_VLAN1\t0x%0.8x\n", GetMacReg(MAC_VLAN1));
+ printf("MAC_VLAN2\t0x%0.8x\n", GetMacReg(MAC_VLAN2));
+ printf("MAC_WUFF\t0x%0.8x\n", GetMacReg(MAC_WUFF));
+ printf("MAC_WUCSR\t0x%0.8x\n", GetMacReg(MAC_WUCSR));
+ return (0);
+}
+
+// Display PHYsical media interface registers
+static int
+DumpPhyRegs(void)
+{
+ printf("PHY_BCR\t\t0x%0.4x\n", GetPhyReg(PHY_BCR));
+ printf("PHY_BSR\t\t0x%0.4x\n", GetPhyReg(PHY_BSR));
+ printf("PHY_ID1\t\t0x%0.4x\n", GetPhyReg(PHY_ID1));
+ printf("PHY_ID2\t\t0x%0.4x\n", GetPhyReg(PHY_ID2));
+ printf("PHY_ANAR\t0x%0.4x\n", GetPhyReg(PHY_ANAR));
+ printf("PHY_ANLPAR\t0x%0.4x\n", GetPhyReg(PHY_ANLPAR));
+ printf("PHY_ANEXPR\t0x%0.4x\n", GetPhyReg(PHY_ANEXPR));
+ printf("PHY_SILREV\t0x%0.4x\n", GetPhyReg(PHY_SILREV));
+ printf("PHY_MCSR\t0x%0.4x\n", GetPhyReg(PHY_MCSR));
+ printf("PHY_SPMODES\t0x%0.4x\n", GetPhyReg(PHY_SPMODES));
+ printf("PHY_CSIR\t0x%0.4x\n", GetPhyReg(PHY_CSIR));
+ printf("PHY_ISR\t\t0x%0.4x\n", GetPhyReg(PHY_ISR));
+ printf("PHY_IMR\t\t0x%0.4x\n", GetPhyReg(PHY_IMR));
+ printf("PHY_PHYSCSR\t0x%0.4x\n", GetPhyReg(PHY_PHYSCSR));
+ return (0);
+}
+
+static int
+lan9118_open(bd_t *bis)
+{
+ int RetVal = TRUE;
+ int timeout;
+ int i;
+
+ printf("DRIVER_VERSION : %X, ", DRIVER_VERSION);
+ printf("DATECODE : %s\r\n", BUILD_NUMBER);
+#ifdef DEBUG
+ TotalInts = 0;
+ TotalRXE = 0;
+ TotalBytes = 0;
+
+ if (bis->bi_bootflags & 0x40000000) {
+ use_smsc9118 = 1;
+ }
+#endif //DEBUG
+
+ // Because we just came out of h/w reset we can't be sure that
+ // the chip has completed reset and may have to implement the
+ // workaround for Errata 5, stepping A0. Therefore we need to
+ // check the ID_REV in little endian, the reset default.
+ if (((*ID_REV & ID_REV_ID_MASK) == ID_REV_CHIP_118) ||
+ ((*ID_REV & ID_REV_ID_MASK) == ID_REV_CHIP_218) ||
+ ((*ID_REV & ID_REV_ID_MASK) == ID_REV_CHIP_211))
+ {
+ printf("LAN9x18 (0x%08x) detected.\n", *ID_REV);
+ }
+ else
+ {
+ printf("Failed to detect LAN9118. ID_REV = 0x%08x\n", *ID_REV);
+ RetVal = FALSE;
+ goto done;
+ }
+
+ // Does SoftReset to 118
+ *HW_CFG = HW_CFG_SRST;
+ DELAY(10);
+
+ // Is the internal PHY running?
+ if ((*PWR_MGMT & PWR_MGMT_PM_MODE_MSK) != 0) {
+ // Apparently not...
+ *BYTE_TEST = 0x0; // Wake it up
+ DELAY(1);
+ timeout = PHY_TIMEOUT;
+ while (timeout-- && ((*PWR_MGMT & PWR_MGMT_PME_READY) == 0)) {
+ lan9118_udelay(1);
+ }
+ if ((*PWR_MGMT & PWR_MGMT_PME_READY) == 0) {
+ LAN9118_WARN("LAN9118: PHY not ready");
+ LAN9118_WARN(" - aborting\n");
+ RetVal = FALSE;
+ goto done;
+ }
+ }
+
+ // Setup TX and RX resources.
+
+ // There is one TX buffer.
+ if ((txbp = (char *)malloc(ENET_MAX_MTU_ALIGNED)) == NULL) {
+ LAN9118_WARN("lan9118_open: can't get TX buffer\n");
+ goto cleanup;
+ }
+
+ // The receive buffers are allocated and aligned by upper layer
+ // software.
+ for (i = 0; i < PKTBUFSRX; i++) {
+ rxbp[i] = NetRxPackets[i];
+ rxAvlQue[i].index = -1;
+ }
+
+ rxNdx = 0;
+ rxNdxIn = 0;
+ rxNdxOut = 0;
+ lastTxTag = 0x0;
+
+ // Set TX Fifo Size
+ *HW_CFG = 0x00040000; // 4K for TX
+
+ // This value is dependent on TX Fifo Size since there's a limited
+ // amount of Fifo space.
+ MaxRxFifoSz = 13440; // Decimal
+
+ // Set automatic flow control.
+ *AFC_CFG = 0x008c46af;
+
+ // Flash LEDs.
+ *GPIO_CFG = 0x70700000;
+
+ // Disable interrupts until the rest of initialization is complete.
+ *INT_EN = 0x0; // Clear interrupt enables
+ *INT_STS = 0xffffffff; // Clear pending interrupts
+ *IRQ_CFG = 0x00000001; // IRQ disable
+
+ // Enable flow control and pause frame time
+ SetMacReg(MAC_FLOW, 0xffff0002);
+
+ // Set MAC address, if octet 0 is non-null assume it's all good.
+ {
+ unsigned mac_addrh;
+ unsigned mac_addrl;
+
+ memcpy(macAddr, bis->bi_enetaddr, ENET_ADDR_LENGTH);
+ mac_addrh = macAddr[5] << 8 | macAddr[4];
+ mac_addrl = macAddr[3] << 24 | macAddr[2] << 16 |
+ macAddr[1] << 8 | macAddr[0];
+ if (mac_addrh != 0 || mac_addrl != 0) {
+ SetMacReg(MAC_ADDRH, mac_addrh);
+ SetMacReg(MAC_ADDRL, mac_addrl);
+ }
+ }
+
+ // Dump old status and data
+ *TX_CFG = (TX_CFG_TXS_DUMP | TX_CFG_TXD_DUMP);
+ *RX_CFG = (RX_CFG_FORCE_DISCARD);
+
+ // Initialize Tx parameters
+ *HW_CFG = ((*HW_CFG & HW_CFG_TX_FIF_SZ_MSK) | HW_CFG_SF);
+ *FIFO_INT = FIFO_INT_TDAL_MSK; // Max out value
+ *INT_EN |= INT_EN_TDFA_INT_EN;
+ {
+ // Disable MAC heartbeat SQE and enable MAC transmitter
+ ulong macCR = GetMacReg(MAC_CR);
+ macCR |= (MAC_CR_TXEN | MAC_CR_HBDIS);
+ macCR &= ~MAC_CR_PRMS; // Turn off promiscuous mode
+ macCR |= MAC_CR_BCAST; // Don't accept broadcast frames
+ SetMacReg(MAC_CR, macCR);
+ }
+
+ // Initialize Rx parameters
+ *RX_CFG = 0x00000000; // 4byte end-alignment
+ {
+ // Enable receiver.
+ ulong macCR = GetMacReg(MAC_CR);
+ SetMacReg(MAC_CR, (macCR | MAC_CR_RXEN));
+ }
+ *FIFO_INT = ((*FIFO_INT & 0xffff0000) | 0x00000101);
+ *INT_EN |= (INT_EN_RSFL_INT_EN | INT_EN_RXE_INT_EN);
+ *INT_EN |= INT_EN_RXDFH_INT_EN;
+
+ // Initialize PHY parameters
+#if 1
+ if (((GetPhyReg(PHY_ID1) == PHY_ID1_LAN9118) &&
+ (GetPhyReg(PHY_ID2) == PHY_ID2_LAN9118)) ||
+ ((GetPhyReg(PHY_ID1) == PHY_ID1_LAN9218) &&
+ (GetPhyReg(PHY_ID2) == PHY_ID2_LAN9218)))
+#else
+ if(1)
+#endif
+ {
+ // Reset the PHY
+ SetPhyReg(PHY_BCR, PHY_BCR_RST);
+ timeout = PHY_TIMEOUT;
+ lan9118_udelay(50*1000); // > 50ms
+ while(timeout-- && (GetPhyReg(PHY_BCR) & PHY_BCR_RST))
+ {
+ lan9118_udelay(10);
+ }
+ if (timeout == 0)
+ {
+ LAN9118_WARN("PHY reset incomplete\n");
+ RetVal = FALSE;
+ goto done;
+ }
+
+ // Setup and start auto negotiation
+ {
+ ushort anar;
+ ushort bcr;
+ char * spddplx;
+
+ anar = GetPhyReg(PHY_ANAR);
+ anar &= ~PHY_ANAR_PAUSE_OP_MSK;
+ anar |= PHY_ANAR_PAUSE_OP_BOTH;
+ anar |= (PHY_ANAR_10_FDPLX | PHY_ANAR_10_ABLE |
+ PHY_ANAR_100_TX_FDPLX | PHY_ANAR_100_TX_ABLE);
+ SetPhyReg(PHY_ANAR, anar);
+
+ DELAY(2);
+ bcr = GetPhyReg(PHY_BCR);
+ bcr |= (PHY_BCR_SS | PHY_BCR_FDPLX);
+ SetPhyReg(PHY_BCR, bcr);
+ DELAY(2);
+
+ printf("start Auto negotiation... (take ~2sec)\n");
+ bcr = GetPhyReg(PHY_BCR);
+ bcr |= (PHY_BCR_ANE | PHY_BCR_RSTAN);
+ SetPhyReg(PHY_BCR, bcr);
+ DELAY(2);
+
+ timeout = PHY_AN_TIMEOUT;
+ while((timeout--) && ((GetPhyReg(PHY_BSR) & PHY_BSR_ANC) == 0)) {
+ lan9118_udelay(500000);
+ }
+ if ((GetPhyReg(PHY_BSR) & PHY_BSR_ANC) == 0) {
+ LAN9118_WARN("Auto negotiation failed\n");
+ RetVal = FALSE;
+ goto done;
+ }
+
+ if ((GetPhyReg(PHY_BSR) & PHY_BSR_LINK_STATUS) == 0) {
+ LAN9118_WARN("Link down\n");
+ RetVal = FALSE;
+ goto done;
+ }
+
+ switch ((GetPhyReg(PHY_PHYSCSR) & PHY_PHYSCSR_SPEED_MSK)>>2) {
+ case 0x01:
+ spddplx = "10BaseT, half duplex";
+ break;
+ case 0x02:
+ spddplx = "100BaseTX, half duplex";
+ break;
+ case 0x05:
+ spddplx = "10BaseT, full duplex";
+ break;
+ case 0x06:
+ spddplx = "100BaseTX, full duplex";
+ break;
+ default:
+ spddplx = "Unknown";
+ break;
+ }
+ printf("Auto negotiation complete, %s\n", spddplx);
+ }
+
+ // If PHYs auto negotiated for full duplex, enable full duplex in MAC.
+ if ((GetPhyReg(PHY_ANAR) & GetPhyReg(PHY_ANLPAR)) & 0x0140) {
+ SetMacReg(MAC_CR, (GetMacReg(MAC_CR) | 0x00100000));
+ }
+ // correct PHY_ID is detected
+ goto done;
+ }
+ else
+ {
+ printf("Unknown PHY ID : 0x%x, 0x%x\n", GetPhyReg(PHY_ID1), GetPhyReg(PHY_ID2));
+ }
+
+ goto done;
+
+cleanup:
+ if (txbp != NULL) {
+ free(txbp);
+ }
+
+done:
+ return (RetVal);
+}
+
+static void
+lan9118_close(void)
+{
+ // Release the TX buffer.
+ if (txbp != NULL) {
+ free(txbp);
+ }
+}
+
+static int
+lan9118_read()
+{
+ int curBufNdx;
+ int loopCount = 0;
+ ulong rxStatus;
+ ulong count;
+ ulong len;
+ int ffwdOk = TRUE;
+ int timeout;
+ int handled = 0;
+
+ while((*RX_FIFO_INF & 0x00ff0000) != 0) {
+ if (loopCount >= NUM_RX_BUFF) {
+//printf("read: loopCount exceeded\n");
+ break; // Packet buffers full
+ }
+
+ curBufNdx = rxNdx;
+ loopCount++;
+ if (++rxNdx >= NUM_RX_BUFF) {
+ rxNdx = 0; // Wrap buffer slot #
+ }
+
+ rxStatus = *RX_STATUS_FIFO_PORT;
+ len = count = rxStatus >> 16;
+
+ if (count >= 4*sizeof(ulong)) {
+ ffwdOk = TRUE; // Use h/w to toss packet
+ } else {
+ ffwdOk = FALSE; // Have to empty manually on error
+ }
+
+ if (count != 0) {
+ if (count > ENET_MAX_MTU) {
+ count = 0;
+ } else {
+ if ((rxStatus & TX_STATUS_FIFO_ES) != 0) {
+ count = 0;
+ }
+ }
+ }
+
+ if (count == 0) {
+ if (ffwdOk == TRUE) {
+ // Drain it the fast way
+ *RX_DP_CTL = RX_DP_FFWD;
+ timeout = FFWD_TIMEOUT;
+ while (timeout-- && (*RX_DP_CTL & RX_DP_FFWD)) {
+ lan9118_udelay(1);
+ }
+ if ((*RX_DP_CTL & RX_DP_FFWD) != 0) {
+ LAN9118_WARN("lan9118_read: fast "
+ "forward op failed\n");
+ break;
+ }
+ } else {
+ // Drain it manually
+ while (len--) {
+ volatile ulong tmp = *RX_FIFO_PORT;
+ }
+ }
+ } else if (rxAvlQue[rxNdxIn].index != -1) {
+ LAN9118_WARN("lan9118_read: read buffers full!\n");
+ break;
+ } else {
+ register ulong *rxbpl;
+ int ndx;
+
+ TotalRxPackets++;
+ TotalBytes += count;
+ rxAvlQue[rxNdxIn].index = curBufNdx;
+ rxAvlQue[rxNdxIn].len = count;
+ if (++rxNdxIn >= NUM_RX_BUFF) {
+ rxNdxIn = 0;
+ }
+
+ // Copy this packet to a NetRxPacket buffer
+ handled = 1;
+//printf("read: %d empty reads prior to this one\n", EmptyReads);
+ EmptyReads = 0;
+ rxbpl = (ulong *)rxbp[curBufNdx];
+ for (ndx = (count+3)/sizeof(ulong); ndx > 0; ndx--) {
+ *rxbpl++ = *RX_FIFO_PORT;
+ }
+#if 0
+{
+ printf("Received: packet contents follows.\n");
+ int i;
+ for (i = 1; i <= count; i++) {
+ printf("0x%02x ", rxbp[curBufNdx][i-1]);
+ if (!(i%16))
+ printf("\n");
+ }
+ printf("\n");
+}
+#endif
+ DELAY(3);
+ }
+ }
+
+ if (handled) {
+ for (;;) {
+ curBufNdx = rxAvlQue[rxNdxOut].index;
+ if (curBufNdx == -1) {
+ len = -1; // Nothing else received
+//printf("read: nothing else received: rxNdxOut: %d curBufNdx: %d\n", rxNdxOut, curBufNdx);
+ break;
+ }
+ len = rxAvlQue[rxNdxOut].len;
+//printf("read: sending a packet up: rxNdxOut: %d curBufNdx: %d\n", rxNdxOut, curBufNdx);
+ NetReceive(NetRxPackets[curBufNdx], len - 4);
+ rxAvlQue[rxNdxOut].index = -1; // Free buffer
+ if (++rxNdxOut >= NUM_RX_BUFF) {
+ rxNdxOut = 0; // Handle wrap
+ }
+ }
+ } else {
+ EmptyReads++;
+ return (-1); // Nothing was received
+ }
+
+ return (len);
+}
+
+
+static int sendToNet(uchar * txbp, int len)
+{
+ ulong tx_cmd_a, tx_cmd_b;
+ int i;
+ ulong * txbpl = (ulong *)txbp;
+
+ lastTxTag++;
+
+#if DEBUG
+ {
+ printf("sendToNet: packet contents follows.\n");
+ int i;
+ int j = 0;
+ for (i = 0; i < len; i++) {
+ if (++j == 20) {
+ j = 0;
+ printf("\n");
+ }
+ printf("%0.1x ", txbp[i]);
+ }
+ printf("\n");
+
+// printf("sendToNet: peek TX status: 0x%0.8x\n",
+// *TX_STATUS_FIFO_PEEK);
+ }
+#endif // DEBUG
+
+ tx_cmd_a = (((ulong)txbp & 0x3) << 16) | 0x00003000 | len;
+ tx_cmd_b = (lastTxTag << 16) | len;
+
+#if DEBUG
+ printf("sendToNet: tx_cmd_a: 0x%0.8x tx_cmd_b: 0x%0.8x\n",
+ tx_cmd_a, tx_cmd_b);
+#endif // DEBUG
+
+ *TX_FIFO_PORT = tx_cmd_a;
+ *TX_FIFO_PORT = tx_cmd_b;
+
+ for (i = (len+3)/sizeof(ulong); i > 0; i--) {
+ *TX_FIFO_PORT = *txbpl++;
+ }
+
+ *TX_CFG = TX_CFG_TX_ON; // Enable transmitter
+
+ return (TRUE);
+}
+
+static int lan9118_write(volatile void *ptr, int len)
+{
+ ulong startTime;
+ ulong timeout;
+ char statusStr[64];
+
+ if (len > ENET_MAX_MTU) {
+ len = ENET_MAX_MTU;
+ }
+
+ // Copy the packet.
+ memcpy((void *)txbp, (void *)ptr, len);
+
+ // Drain the TX status fifo just in case there are old (good) statuses.
+ for (timeout=0; timeout<TX_TIMEOUT_COUNT; timeout++)
+ {
+ if ((*TX_FIFO_INF & TX_FIFO_TXSUSED_MSK) == 0) {
+ break;
+ }
+ printf("lan9118_write: discarded old TX status\n");
+ }
+ if (timeout == TX_TIMEOUT_COUNT) // timed out? Yes--
+ {
+ DumpCsrRegs();
+ DumpMacRegs();
+ DumpPhyRegs();
+ }
+
+ if (sendToNet(txbp, len) == FALSE) {
+ return (-1);
+ }
+
+//printf("write: sent packet out: len: %d\n", len);
+
+ startTime = get_timer(0);
+ while (1) {
+ if ((*TX_FIFO_INF & TX_FIFO_TXSUSED_MSK) == 0) {
+ // No status yet
+ if ((get_timer(0) - startTime) > TX_TIMEOUT) {
+ return (-1);
+ }
+ } else {
+ ulong txStatus = *TX_STATUS_FIFO_PORT;
+
+ if ((txStatus & TX_STATUS_FIFO_ES) == TX_STATUS_FIFO_ES) {
+ sprintf(statusStr, "lan9118_write: error "
+ "status: 0x%0.8x\n", txStatus);
+ LAN9118_WARN(statusStr);
+ return (-1);
+ } else {
+ *TX_CFG |= TX_CFG_STOP_TX; // Stop transmitter
+ return (len); // successful send
+ }
+ }
+ }
+}
+
+int eth_init(bd_t *bd)
+{
+ return lan9118_open(bd);
+}
+
+void eth_halt(void)
+{
+ lan9118_close();
+}
+
+int eth_rx(void)
+{
+ int r;
+
+ r = lan9118_read();
+
+ return r;
+}
+
+int eth_send(volatile void *packet, int length)
+{
+ return lan9118_write(packet, length);
+}
+
+#endif // #ifdef CONFIG_DRIVER_SMSC9118
diff --git a/drivers/smsc9118.h b/drivers/smsc9118.h
new file mode 100644
index 0000000000..0e043b4914
--- /dev/null
+++ b/drivers/smsc9118.h
@@ -0,0 +1,489 @@
+//--------------------------------------------------------------------------
+//
+// File name: smsc9118.h
+//
+// Abstract: Address map and register definitions for SMSC LAN9118
+// ethernet controller.
+//
+// Start Automated RH
+// *** Do not edit between "Start Automated RH" and "End Automated RH" ***
+//
+// Copyright 2005, Seagate Technology LLC
+//
+// This program is free software; you can redistribute it and/or modify
+// it under the terms of the GNU General Public License as published by
+// the Free Software Foundation; either version 2 of the License, or
+// (at your option) any later version.
+//
+// This program is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+//
+// You should have received a copy of the GNU General Public License
+// along with this program; if not, write to the Free Software
+// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+//
+// Revision History
+//
+// *** Do not edit between "Start Automated RH" and "End Automated RH" ***
+// End Automated RH
+//
+//
+//--------------------------------------------------------------------------
+/*---------------------------------------------------------------------------
+ * Copyright(c) 2005-2006 SMSC
+ *
+ * Use of this source code is subject to the terms of the SMSC Software
+ * License Agreement (SLA) under which you licensed this software product.
+ * If you did not accept the terms of the SLA, you are not authorized to use
+ * this source code.
+ *
+ * This code and information is provided as is without warranty of any kind,
+ * either expressed or implied, including but not limited to the implied
+ * warranties of merchantability and/or fitness for a particular purpose.
+ *
+ * File name : smsc9118.c
+ * Description : smsc9118 polled driver (non-interrupt driven)
+ *
+ * History :
+ * 09-27-06 MDG First Release
+ * modified for ARM platform
+ *----------------------------------------------------------------------------*/
+
+#ifdef CONFIG_DRIVER_SMSC9118
+
+//*************************************************************************
+ // GLOBAL DEFINITIONS
+
+//*************************************************************************
+#define LAN9118_WARN(s) (printf("%s", s))
+
+#define DRIVER_VERSION 0x101
+#define BUILD_NUMBER "092706"
+
+//*************************************************************************
+ // DATA STRUCTURE DEFINITIONS
+
+//*************************************************************************
+
+
+#ifndef _SMSC9118_H
+#define _SMSC9118_H
+
+#ifndef CONFIG_SMSC9118_BASE
+#error "CONFIG_SMSC9118_BASE is not defined."
+#else
+#define SMSC9118_BASE CONFIG_SMSC9118_BASE
+#endif
+
+#define MAC_TIMEOUT 200
+#define PHY_TIMEOUT 200
+//#define PHY_AN_TIMEOUT 3000 * 1000 // 3 seconds
+#define PHY_AN_TIMEOUT 10 // 3 seconds
+#define SRST_TIMEOUT 100
+#define TX_TIMEOUT 3000 // 3000 * 1/HZ
+#define FFWD_TIMEOUT 100
+#define PHY_ADDR 1
+#define FALSE 0
+#define TRUE 1
+
+#define DELAY(n) ( { \
+ int _i = 100*n; \
+ do { \
+ volatile ulong _temp; \
+ _temp = *BYTE_TEST; \
+ } while (--_i); \
+ } )
+
+struct rxQue {
+ int index; // Index into NetRxPackets[]
+ int len; // Length of packet at this index
+};
+
+// Lan9118 memory map
+
+// Control/Status Register Map (directly addressable registers)
+#define RX_FIFO_PORT (volatile ulong *)(SMSC9118_BASE + 0x0)
+#define RX_FIFO_ALIAS_PORTS (volatile ulong *)(SMSC9118_BASE + 0x4)
+#define TX_FIFO_PORT (volatile ulong *)(SMSC9118_BASE + 0x20)
+#define TX_FIFO_ALIAS_PORTS (volatile ulong *)(SMSC9118_BASE + 0x24)
+#define RX_STATUS_FIFO_PORT (volatile ulong *)(SMSC9118_BASE + 0x40)
+#define RX_STATUS_FIFO_PEEK (volatile ulong *)(SMSC9118_BASE + 0x44)
+#define TX_STATUS_FIFO_PORT (volatile ulong *)(SMSC9118_BASE + 0x48)
+#define TX_STATUS_FIFO_PEEK (volatile ulong *)(SMSC9118_BASE + 0x4C)
+#define TX_STATUS_FIFO_ES (0x00008000)
+#define TX_STATUS_FIFO_TAG_MSK (0xffff0000)
+
+#define ID_REV (volatile ulong *)(SMSC9118_BASE + 0x50)
+#define ID_REV_ID_MASK (0xFFFF0000)
+#define ID_REV_CHIP_118 (0x01180000)
+#define ID_REV_CHIP_218 (0x118A0000)
+#define ID_REV_CHIP_211 (0x92110000)
+#define ID_REV_REV_MASK (0x0000FFFF)
+
+#define IRQ_CFG (volatile ulong *)(SMSC9118_BASE + 0x54)
+#define IRQ_CFG_MASTER_INT (0x00001000)
+#define IRQ_CFG_ENABLE (0x00000100)
+#define IRQ_CFG_IRQ_POL_HIGH (0x00000010)
+#define IRQ_CFG_IRQ_TYPE_PUPU (0x00000001)
+
+#define INT_STS (volatile ulong *)(SMSC9118_BASE + 0x58)
+#define INT_STS_SW_INT (0x80000000)
+#define INT_STS_TXSTOP_INT (0x02000000)
+#define INT_STS_RXSTOP_INT (0x01000000)
+#define INT_STS_RXDFH_INT (0x00800000)
+#define INT_STS_RXDF_INT (0x00400000)
+#define INT_STS_TIOC_INT (0x00200000)
+#define INT_STS_GPT_INT (0x00080000)
+#define INT_STS_PHY_INT (0x00040000)
+#define INT_STS_PMT_INT (0x00020000)
+#define INT_STS_TXSO_INT (0x00010000)
+#define INT_STS_RWT_INT (0x00008000)
+#define INT_STS_RXE_INT (0x00004000)
+#define INT_STS_TXE_INT (0x00002000)
+#define INT_STS_ERX_INT (0x00001000)
+#define INT_STS_TDFU_INT (0x00000800)
+#define INT_STS_TDFO_INT (0x00000400)
+#define INT_STS_TDFA_INT (0x00000200)
+#define INT_STS_TSFF_INT (0x00000100)
+#define INT_STS_TSFL_INT (0x00000080)
+#define INT_STS_RDFO_INT (0x00000040)
+#define INT_STS_RDFL_INT (0x00000020)
+#define INT_STS_RSFF_INT (0x00000010)
+#define INT_STS_RSFL_INT (0x00000008)
+#define INT_STS_GPIO2_INT (0x00000004)
+#define INT_STS_GPIO1_INT (0x00000002)
+#define INT_STS_GPIO0_INT (0x00000001)
+
+#define INT_EN (volatile ulong *)(SMSC9118_BASE + 0x5C)
+#define INT_EN_SW_INT_EN (0x80000000)
+#define INT_EN_TXSTOP_INT_EN (0x02000000)
+#define INT_EN_RXSTOP_INT_EN (0x01000000)
+#define INT_EN_RXDFH_INT_EN (0x00800000)
+#define INT_EN_RXDF_INT_EN (0x00400000)
+#define INT_EN_TIOC_INT_EN (0x00200000)
+#define INT_EN_GPT_INT_EN (0x00080000)
+#define INT_EN_PHY_INT_EN (0x00040000)
+#define INT_EN_PMT_INT_EN (0x00020000)
+#define INT_EN_TXSO_INT_EN (0x00010000)
+#define INT_EN_RWT_INT_EN (0x00008000)
+#define INT_EN_RXE_INT_EN (0x00004000)
+#define INT_EN_TXE_INT_EN (0x00002000)
+#define INT_EN_ERX_INT_EN (0x00001000)
+#define INT_EN_TDFU_INT_EN (0x00000800)
+#define INT_EN_TDFO_INT_EN (0x00000400)
+#define INT_EN_TDFA_INT_EN (0x00000200)
+#define INT_EN_TSFF_INT_EN (0x00000100)
+#define INT_EN_TSFL_INT_EN (0x00000080)
+#define INT_EN_RDFO_INT_EN (0x00000040)
+#define INT_EN_RDFL_INT_EN (0x00000020)
+#define INT_EN_RSFF_INT_EN (0x00000010)
+#define INT_EN_RSFL_INT_EN (0x00000008)
+#define INT_EN_GPIO2_EN (0x00000004)
+#define INT_EN_GPIO1_EN (0x00000002)
+#define INT_EN_GPIO0_EN (0x00000001)
+
+#define BYTE_TEST (volatile ulong *)(SMSC9118_BASE + 0x64)
+#define BYTE_TEST_VAL (0x87654321)
+
+#define FIFO_INT (volatile ulong *)(SMSC9118_BASE + 0x68)
+#define FIFO_INT_TDAL_MSK (0xFF000000)
+#define FIFO_INT_TSL_MSK (0x00FF0000)
+#define FIFO_INT_RDAL_MSK (0x0000FF00)
+#define FIFO_INT_RSL_MSK (0x000000FF)
+
+#define RX_CFG (volatile ulong *)(SMSC9118_BASE + 0x6C)
+#define RX_CFG_END_ALIGN4 (0x00000000)
+#define RX_CFG_END_ALIGN16 (0x40000000)
+#define RX_CFG_END_ALIGN32 (0x80000000)
+#define RX_CFG_FORCE_DISCARD (0x00008000)
+#define RX_CFG_RXDOFF_MSK (0x00003C00)
+#define RX_CFG_RXBAD (0x00000001)
+
+#define TX_CFG (volatile ulong *)(SMSC9118_BASE + 0x70)
+#define TX_CFG_TXS_DUMP (0x00008000)
+#define TX_CFG_TXD_DUMP (0x00004000)
+#define TX_CFG_TXSAO (0x00000004)
+#define TX_CFG_TX_ON (0x00000002)
+#define TX_CFG_STOP_TX (0x00000001)
+
+#define HW_CFG (volatile ulong *)(SMSC9118_BASE + 0x74)
+#define HW_CFG_TTM (0x00200000)
+#define HW_CFG_SF (0x00100000)
+#define HW_CFG_TX_FIF_SZ_MSK (0x000F0000)
+#define HW_CFG_TR_MSK (0x00003000)
+#define HW_CFG_BITMD_MSK (0x00000004)
+#define HW_CFG_BITMD_32 (0x00000004)
+#define HW_CFG_SRST_TO (0x00000002)
+#define HW_CFG_SRST (0x00000001)
+
+#define RX_DP_CTL (volatile ulong *)(SMSC9118_BASE + 0x78)
+#define RX_DP_FFWD (0x80000000)
+#define RX_DP_RX_FFWD_MSK (0x00000FFF)
+
+#define RX_FIFO_INF (volatile ulong *)(SMSC9118_BASE + 0x7C)
+#define RX_FIFO_RXSUSED_MSK (0x00FF0000)
+#define RX_FIFO_RXDUSED_MSK (0x0000FFFF)
+
+#define TX_FIFO_INF (volatile ulong *)(SMSC9118_BASE + 0x80)
+#define TX_FIFO_TXSUSED_MSK (0x00FF0000)
+#define TX_FIFO_TDFREE_MSK (0x0000FFFF)
+
+#define PWR_MGMT (volatile ulong *)(SMSC9118_BASE + 0x84)
+#define PWR_MGMT_PM_MODE_MSK (0x00030000)
+#define PWR_MGMT_PM_MODE_MSK_LE (0x00000003)
+#define PWR_MGMT_PM__D0 (0x00000000)
+#define PWR_MGMT_PM__D1 (0x00010000)
+#define PWR_MGMT_PM__D2 (0x00020000)
+#define PWR_MGMT_PHY_RST (0x00000400)
+#define PWR_MGMT_WOL_EN (0x00000200)
+#define PWR_MGMT_ED_EN (0x00000100)
+#define PWR_MGMT_PME_TYPE_PUPU (0x00000040)
+#define PWR_MGMT_WUPS_MSK (0x00000030)
+#define PWR_MGMT_WUPS_NOWU (0x00000000)
+#define PWR_MGMT_WUPS_D2D0 (0x00000010)
+#define PWR_MGMT_WUPS_D1D0 (0x00000020)
+#define PWR_MGMT_WUPS_UNDEF (0x00000030)
+#define PWR_MGMT_PME_IND_PUL (0x00000008)
+#define PWR_MGMT_PME_POL_HIGH (0x00000004)
+#define PWR_MGMT_PME_EN (0x00000002)
+#define PWR_MGMT_PME_READY (0x00000001)
+
+#define GPIO_CFG (volatile ulong *)(SMSC9118_BASE + 0x88)
+#define GPIO_CFG_LEDx_MSK (0x70000000)
+#define GPIO_CFG_LED1_EN (0x10000000)
+#define GPIO_CFG_LED2_EN (0x20000000)
+#define GPIO_CFG_LED3_EN (0x40000000)
+#define GPIO_CFG_GPIOBUFn_MSK (0x00070000)
+#define GPIO_CFG_GPIOBUF0_PUPU (0x00010000)
+#define GPIO_CFG_GPIOBUF1_PUPU (0x00020000)
+#define GPIO_CFG_GPIOBUF2_PUPU (0x00040000)
+#define GPIO_CFG_GPDIRn_MSK (0x00000700)
+#define GPIO_CFG_GPIOBUF0_OUT (0x00000100)
+#define GPIO_CFG_GPIOBUF1_OUT (0x00000200)
+#define GPIO_CFG_GPIOBUF2_OUT (0x00000400)
+#define GPIO_CFG_GPIOD_MSK (0x00000007)
+#define GPIO_CFG_GPIOD0 (0x00000001)
+#define GPIO_CFG_GPIOD1 (0x00000002)
+#define GPIO_CFG_GPIOD2 (0x00000004)
+
+#define GPT_CFG (volatile ulong *)(SMSC9118_BASE + 0x8C)
+#define GPT_CFG_TIMER_EN (0x20000000)
+#define GPT_CFG_GPT_LOAD_MSK (0x0000FFFF)
+
+#define GPT_CNT (volatile ulong *)(SMSC9118_BASE + 0x90)
+#define GPT_CNT_MSK (0x0000FFFF)
+
+#define FPGA_REV (volatile ulong *)(SMSC9118_BASE + 0x94)
+
+#define ENDIAN (volatile ulong *)(SMSC9118_BASE + 0x98)
+#define ENDIAN_BIG (0xFFFFFFFF)
+
+#define FREE_RUN (volatile ulong *)(SMSC9118_BASE + 0x9C)
+#define FREE_RUN_FR_CNT_MSK (0xFFFFFFFF)
+
+#define RX_DROP (volatile ulong *)(SMSC9118_BASE + 0xA0)
+#define RX_DROP_RX_DFC_MSK (0xFFFFFFFF)
+
+#define MAC_CSR_CMD (volatile ulong *)(SMSC9118_BASE + 0xA4)
+#define MAC_CSR_CMD_CSR_BUSY (0x80000000)
+#define MAC_CSR_CMD_RNW (0x40000000)
+#define MAC_RD_CMD(Reg) ((Reg & 0x000000FF) | \
+ (MAC_CSR_CMD_CSR_BUSY | MAC_CSR_CMD_RNW))
+#define MAC_WR_CMD(Reg) ((Reg & 0x000000FF) | \
+ (MAC_CSR_CMD_CSR_BUSY))
+
+#define MAC_CSR_DATA (volatile ulong *)(SMSC9118_BASE + 0xA8)
+
+#define AFC_CFG (volatile ulong *)(SMSC9118_BASE + 0xAC)
+#define AFC_CFG_AFC_HI_MSK (0x00FF0000)
+#define AFC_CFG_AFC_LO_MSK (0x0000FF00)
+
+#define E2P_CMD (volatile ulong *)(SMSC9118_BASE + 0xB0)
+#define E2P_DATA (volatile ulong *)(SMSC9118_BASE + 0xB4)
+
+// MAC Control and Status Registers (accessed through MAC_CSR_CMD/_DATA regs)
+#define MAC_CR (0x1)
+#define MAC_CR_RXALL (0x80000000)
+#define MAC_CR_HBDIS (0x10000000)
+#define MAC_CR_RCVOWN (0x00800000)
+#define MAC_CR_LOOPBK (0x00200000)
+#define MAC_CR_FDPX (0x00100000)
+#define MAC_CR_MCPAS (0x00080000)
+#define MAC_CR_PRMS (0x00040000)
+#define MAC_CR_INVFILT (0x00020000)
+#define MAC_CR_PASSBAD (0x00010000)
+#define MAC_CR_HFILT (0x00008000)
+#define MAC_CR_HPFILT (0x00002000)
+#define MAC_CR_LCOLL (0x00001000)
+#define MAC_CR_BCAST (0x00000800)
+#define MAC_CR_DISRTY (0x00000400)
+#define MAC_CR_PADSTR (0x00000100)
+#define MAC_CR_BOLMT_MSK (0x000000C0)
+#define MAC_CR_BOLMT_10 (0x00000000)
+#define MAC_CR_BOLMT_8 (0x00000040)
+#define MAC_CR_BOLMT_4 (0x00000080)
+#define MAC_CR_BOLMT_1 (0x000000C0)
+#define MAC_CR_DFCHK (0x00000020)
+#define MAC_CR_TXEN (0x00000008)
+#define MAC_CR_RXEN (0x00000004)
+
+#define MAC_ADDRH (0x2)
+#define MAC_ADDRH_MSK (0x0000FFFF)
+
+#define MAC_ADDRL (0x3)
+#define MAC_ADDRL_MSK (0xFFFFFFFF)
+
+#define MAC_HASHH (0x4)
+#define MAC_HASHH_MSK (0xFFFFFFFF)
+
+#define MAC_HASHL (0x5)
+#define MAC_HASHL_MSK (0xFFFFFFFF)
+
+#define MAC_MIIACC (0x6)
+#define MAC_MIIACC_MII_WRITE (0x00000002)
+#define MAC_MIIACC_MII_BUSY (0x00000001)
+#define MAC_MII_RD_CMD(Addr,Reg) (((Addr & 0x1f) << 11) | \
+ ((Reg & 0x1f)) << 6)
+#define MAC_MII_WR_CMD(Addr,Reg) (((Addr & 0x1f) << 11) | \
+ ((Reg & 0x1f) << 6) | \
+ MAC_MIIACC_MII_WRITE)
+
+#define MAC_MIIDATA (0x7)
+#define MAC_MIIDATA_MSK (0x0000FFFF)
+#define MAC_MII_DATA(Data) (Data & MAC_MIIDATA_MSK)
+
+#define MAC_FLOW (0x8)
+#define MAC_FLOW_FCPT_MSK (0xFFFF0000)
+#define MAC_FLOW_FCPASS (0x00000004)
+#define MAC_FLOW_FCEN (0x00000002)
+#define MAC_FLOW_FCBSY (0x00000001)
+
+#define MAC_VLAN1 (0x9)
+#define MAC_VLAN2 (0xA)
+#define MAC_WUFF (0xB)
+
+#define MAC_WUCSR (0xC)
+#define MAC_WUCSR_GUE (0x00000200)
+#define MAC_WUCSR_WUFR (0x00000040)
+#define MAC_WUCSR_MPR (0x00000020)
+#define MAC_WUCSR_WUEN (0x00000004)
+#define MAC_WUCSR_MPEN (0x00000002)
+
+// PHY Control and Status Registers (accessed through MAC_MIIACC/_MIIDATA regs)
+#define PHY_BCR (0x0)
+#define PHY_BCR_RST (0x8000)
+#define PHY_BCR_LOOPBK (0x4000)
+#define PHY_BCR_SS (0x2000)
+#define PHY_BCR_ANE (0x1000)
+#define PHY_BCR_PWRDN (0x0800)
+#define PHY_BCR_RSTAN (0x0200)
+#define PHY_BCR_FDPLX (0x0100)
+#define PHY_BCR_COLLTST (0x0080)
+
+#define PHY_BSR (0x1)
+#define PHY_BSR_100_T4_ABLE (0x8000)
+#define PHY_BSR_100_TX_FDPLX (0x4000)
+#define PHY_BSR_100_TX_HDPLX (0x2000)
+#define PHY_BSR_10_FDPLX (0x1000)
+#define PHY_BSR_10_HDPLX (0x0800)
+#define PHY_BSR_ANC (0x0020)
+#define PHY_BSR_REM_FAULT (0x0010)
+#define PHY_BSR_AN_ABLE (0x0008)
+#define PHY_BSR_LINK_STATUS (0x0004)
+#define PHY_BSR_JAB_DET (0x0002)
+#define PHY_BSR_EXT_CAP (0x0001)
+
+#define PHY_ID1 (0x2)
+#define PHY_ID1_MSK (0xFFFF)
+#define PHY_ID1_LAN9118 (0x0007)
+#define PHY_ID1_LAN9218 (PHY_ID1_LAN9118)
+
+#define PHY_ID2 (0x3)
+#define PHY_ID2_MSK (0xFFFF)
+#define PHY_ID2_MODEL_MSK (0x03F0)
+#define PHY_ID2_REV_MSK (0x000F)
+#define PHY_ID2_LAN9118 (0xC0D1)
+#define PHY_ID2_LAN9218 (0xC0C3)
+
+#define PHY_ANAR (0x4)
+#define PHY_ANAR_NXTPG_CAP (0x8000)
+#define PHY_ANAR_REM_FAULT (0x2000)
+#define PHY_ANAR_PAUSE_OP_MSK (0x0C00)
+#define PHY_ANAR_PAUSE_OP_NONE (0x0000)
+#define PHY_ANAR_PAUSE_OP_ASLP (0x0400)
+#define PHY_ANAR_PAUSE_OP_SLP (0x0800)
+#define PHY_ANAR_PAUSE_OP_BOTH (0x0C00)
+#define PHY_ANAR_100_T4_ABLE (0x0200)
+#define PHY_ANAR_100_TX_FDPLX (0x0100)
+#define PHY_ANAR_100_TX_ABLE (0x0080)
+#define PHY_ANAR_10_FDPLX (0x0040)
+#define PHY_ANAR_10_ABLE (0x0020)
+
+#define PHY_ANLPAR (0x5)
+#define PHY_ANLPAR_NXTPG_CAP (0x8000)
+#define PHY_ANLPAR_ACK (0x4000)
+#define PHY_ANLPAR_REM_FAULT (0x2000)
+#define PHY_ANLPAR_PAUSE_CAP (0x0400)
+#define PHY_ANLPAR_100_T4_ABLE (0x0200)
+#define PHY_ANLPAR_100_TX_FDPLX (0x0100)
+#define PHY_ANLPAR_100_TX_ABLE (0x0080)
+#define PHY_ANLPAR_10_FDPLX (0x0040)
+#define PHY_ANLPAR_10_ABLE (0x0020)
+
+#define PHY_ANEXPR (0x6)
+#define PHY_ANEXPR_PARDET_FAULT (0x0010)
+#define PHY_ANEXPR_LP_NXTPG_CAP (0x0008)
+#define PHY_ANEXPR_NXTPG_CAP (0x0004)
+#define PHY_ANEXPR_NEWPG_REC (0x0002)
+#define PHY_ANEXPR_LP_AN_ABLE (0x0001)
+
+#define PHY_SILREV (0x10)
+
+#define PHY_MCSR (0x11)
+#define PHY_MCSR_FASTRIP (0x4000)
+#define PHY_MCSR_EDPWRDOWN (0x2000)
+#define PHY_MCSR_LOWSQEN (0x0800)
+#define PHY_MCSR_MDPREBP (0x0400)
+#define PHY_MCSR_FASTEST (0x0100)
+#define PHY_MCSR_PHYADBP (0x0008)
+#define PHY_MCSR_FGLS (0x0004)
+#define PHY_MCSR_ENERGYON (0x0002)
+
+#define PHY_SPMODES (0x12)
+
+#define PHY_CSIR (0x1B)
+#define PHY_CSIR_SQEOFF (0x0800)
+#define PHY_CSIR_FEFIEN (0x0020)
+#define PHY_CSIR_XPOL (0x0010)
+
+#define PHY_ISR (0x1C)
+#define PHY_ISR_INT7 (0x0080)
+#define PHY_ISR_INT6 (0x0040)
+#define PHY_ISR_INT5 (0x0020)
+#define PHY_ISR_INT4 (0x0010)
+#define PHY_ISR_INT3 (0x0008)
+#define PHY_ISR_INT2 (0x0004)
+#define PHY_ISR_INT1 (0x0002)
+
+#define PHY_IMR (0x1E)
+#define PHY_IMR_INT7 (0x0080)
+#define PHY_IMR_INT6 (0x0040)
+#define PHY_IMR_INT5 (0x0020)
+#define PHY_IMR_INT4 (0x0010)
+#define PHY_IMR_INT3 (0x0008)
+#define PHY_IMR_INT2 (0x0004)
+#define PHY_IMR_INT1 (0x0002)
+
+#define PHY_PHYSCSR (0x1F)
+#define PHY_PHYSCSR_ANDONE (0x1000)
+#define PHY_PHYSCSR_4B5B_EN (0x0040)
+#define PHY_PHYSCSR_SPEED_MSK (0x001C)
+#define PHY_PHYSCSR_SPEED_10HD (0x0004)
+#define PHY_PHYSCSR_SPEED_10FD (0x0014)
+#define PHY_PHYSCSR_SPEED_100HD (0x0008)
+#define PHY_PHYSCSR_SPEED_100FD (0x0018)
+#endif // #ifndef _SMSC9118_H
+
+#endif // CONFIG_DRIVER_SMSC9118
diff --git a/drivers/tqm8xx_pcmcia.c b/drivers/tqm8xx_pcmcia.c
new file mode 100644
index 0000000000..a0f53cd684
--- /dev/null
+++ b/drivers/tqm8xx_pcmcia.c
@@ -0,0 +1,330 @@
+/* -------------------------------------------------------------------- */
+/* TQM8xxL Boards by TQ Components */
+/* SC8xx Boards by SinoVee Microsystems */
+/* -------------------------------------------------------------------- */
+#include <common.h>
+#ifdef CONFIG_8xx
+#include <mpc8xx.h>
+#endif
+#include <pcmcia.h>
+
+#undef CONFIG_PCMCIA
+
+#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
+#define CONFIG_PCMCIA
+#endif
+
+#if (CONFIG_COMMANDS & CFG_CMD_IDE) && defined(CONFIG_IDE_8xx_PCCARD)
+#define CONFIG_PCMCIA
+#endif
+
+#if defined(CONFIG_PCMCIA) \
+ && (defined(CONFIG_TQM8xxL) || defined(CONFIG_SVM_SC8xx))
+
+#if defined(CONFIG_VIRTLAB2)
+#define PCMCIA_BOARD_MSG "Virtlab2"
+#elif defined(CONFIG_TQM8xxL)
+#define PCMCIA_BOARD_MSG "TQM8xxL"
+#elif defined(CONFIG_SVM_SC8xx)
+#define PCMCIA_BOARD_MSG "SC8xx"
+#endif
+
+#if defined(CONFIG_NSCU)
+
+#define power_config(slot) do {} while (0)
+#define power_off(slot) do {} while (0)
+#define power_on_5_0(slot) do {} while (0)
+#define power_on_3_3(slot) do {} while (0)
+
+#elif defined(CONFIG_HMI10)
+
+static inline void power_config(int slot)
+{
+ volatile immap_t *immap = (immap_t *)CFG_IMMR;
+ /*
+ * Configure Port B pins for
+ * 5 Volts Enable and 3 Volts enable
+ */
+ immap->im_cpm.cp_pbpar &= ~(0x00000300);
+}
+
+static inline void power_off(int slot)
+{
+ volatile immap_t *immap = (immap_t *)CFG_IMMR;
+ /* remove all power */
+ immap->im_cpm.cp_pbdat |= 0x00000300;
+}
+
+static inline void power_on_5_0(int slot)
+{
+ volatile immap_t *immap = (immap_t *)CFG_IMMR;
+ immap->im_cpm.cp_pbdat &= ~(0x0000100);
+ immap->im_cpm.cp_pbdir |= 0x00000300;
+}
+
+static inline void power_on_3_3(int slot)
+{
+ volatile immap_t *immap = (immap_t *)CFG_IMMR;
+ immap->im_cpm.cp_pbdat &= ~(0x0000200);
+ immap->im_cpm.cp_pbdir |= 0x00000300;
+}
+
+#elif defined(CONFIG_VIRTLAB2)
+
+#define power_config(slot) do {} while (0)
+static inline void power_off(int slot)
+{
+ volatile unsigned char *powerctl =
+ (volatile unsigned char *)PCMCIA_CTRL;
+ *powerctl = 0;
+}
+
+static inline void power_on_5_0(int slot)
+{
+ volatile unsigned char *powerctl =
+ (volatile unsigned char *)PCMCIA_CTRL;
+ *powerctl = 2; /* Enable 5V Vccout */
+}
+
+static inline void power_on_3_3(int slot)
+{
+ volatile unsigned char *powerctl =
+ (volatile unsigned char *)PCMCIA_CTRL;
+ *powerctl = 1; /* Enable 3.3V Vccout */
+}
+
+#else
+
+static inline void power_config(int slot)
+{
+ volatile immap_t *immap = (immap_t *)CFG_IMMR;
+ /*
+ * Configure Port C pins for
+ * 5 Volts Enable and 3 Volts enable
+ */
+ immap->im_ioport.iop_pcpar &= ~(0x0002 | 0x0004);
+ immap->im_ioport.iop_pcso &= ~(0x0002 | 0x0004);
+}
+
+static inline void power_off(int slot)
+{
+ volatile immap_t *immap = (immap_t *)CFG_IMMR;
+ immap->im_ioport.iop_pcdat &= ~(0x0002 | 0x0004);
+}
+
+static inline void power_on_5_0(int slot)
+{
+ volatile immap_t *immap = (immap_t *)CFG_IMMR;
+ immap->im_ioport.iop_pcdat |= 0x0004;
+ immap->im_ioport.iop_pcdir |= (0x0002 | 0x0004);
+}
+
+static inline void power_on_3_3(int slot)
+{
+ volatile immap_t *immap = (immap_t *)CFG_IMMR;
+ immap->im_ioport.iop_pcdat |= 0x0002;
+ immap->im_ioport.iop_pcdir |= (0x0002 | 0x0004);
+}
+
+#endif
+
+#ifdef CONFIG_HMI10
+static inline int check_card_is_absent(int slot)
+{
+ volatile pcmconf8xx_t *pcmp =
+ (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
+ return pcmp->pcmc_pipr & (0x10000000 >> (slot << 4));
+}
+#else
+static inline int check_card_is_absent(int slot)
+{
+ volatile pcmconf8xx_t *pcmp =
+ (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
+ return pcmp->pcmc_pipr & (0x18000000 >> (slot << 4));
+}
+#endif
+
+#ifdef NSCU_OE_INV
+#define NSCU_GCRX_CXOE 0
+#else
+#define NSCU_GCRX_CXOE __MY_PCMCIA_GCRX_CXOE
+#endif
+
+int pcmcia_hardware_enable(int slot)
+{
+ volatile pcmconf8xx_t *pcmp =
+ (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
+ volatile sysconf8xx_t *sysp =
+ (sysconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_siu_conf));
+ uint reg, mask;
+
+ debug ("hardware_enable: " PCMCIA_BOARD_MSG " Slot %c\n", 'A'+slot);
+
+ udelay(10000);
+
+ /*
+ * Configure SIUMCR to enable PCMCIA port B
+ * (VFLS[0:1] are not used for debugging, we connect FRZ# instead)
+ */
+ sysp->sc_siumcr &= ~SIUMCR_DBGC11; /* set DBGC to 00 */
+
+ /* clear interrupt state, and disable interrupts */
+ pcmp->pcmc_pscr = PCMCIA_MASK(slot);
+ pcmp->pcmc_per &= ~PCMCIA_MASK(slot);
+
+ /*
+ * Disable interrupts, DMA, and PCMCIA buffers
+ * (isolate the interface) and assert RESET signal
+ */
+ debug ("Disable PCMCIA buffers and assert RESET\n");
+ reg = 0;
+ reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
+ reg |= NSCU_GCRX_CXOE;
+
+ PCMCIA_PGCRX(slot) = reg;
+ udelay(500);
+
+ power_config(slot);
+ power_off(slot);
+
+ /*
+ * Make sure there is a card in the slot, then configure the interface.
+ */
+ udelay(10000);
+ debug ("[%d] %s: PIPR(%p)=0x%x\n", __LINE__,__FUNCTION__,
+ &(pcmp->pcmc_pipr),pcmp->pcmc_pipr);
+
+ if (check_card_is_absent(slot)) {
+ printf (" No Card found\n");
+ return (1);
+ }
+
+ /*
+ * Power On.
+ */
+ mask = PCMCIA_VS1(slot) | PCMCIA_VS2(slot);
+ reg = pcmp->pcmc_pipr;
+ debug ("PIPR: 0x%x ==> VS1=o%s, VS2=o%s\n",
+ reg,
+ (reg&PCMCIA_VS1(slot))?"n":"ff",
+ (reg&PCMCIA_VS2(slot))?"n":"ff");
+
+ if ((reg & mask) == mask) {
+ power_on_5_0(slot);
+ puts (" 5.0V card found: ");
+ } else {
+ power_on_3_3(slot);
+ puts (" 3.3V card found: ");
+ }
+
+#if 0
+ /* VCC switch error flag, PCMCIA slot INPACK_ pin */
+ cp->cp_pbdir &= ~(0x0020 | 0x0010);
+ cp->cp_pbpar &= ~(0x0020 | 0x0010);
+ udelay(500000);
+#endif
+
+ udelay(1000);
+ debug ("Enable PCMCIA buffers and stop RESET\n");
+ reg = PCMCIA_PGCRX(slot);
+ reg &= ~__MY_PCMCIA_GCRX_CXRESET; /* active high */
+ reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */
+ reg &= ~NSCU_GCRX_CXOE;
+
+ PCMCIA_PGCRX(slot) = reg;
+
+ udelay(250000); /* some cards need >150 ms to come up :-( */
+
+ debug ("# hardware_enable done\n");
+
+ return (0);
+}
+
+
+#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
+int pcmcia_hardware_disable(int slot)
+{
+ u_long reg;
+
+ debug ("hardware_disable: " PCMCIA_BOARD_MSG " Slot %c\n", 'A'+slot);
+
+
+ /* remove all power */
+ power_off(slot);
+
+ debug ("Disable PCMCIA buffers and assert RESET\n");
+ reg = 0;
+ reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
+ reg |= NSCU_GCRX_CXOE; /* active low */
+
+ PCMCIA_PGCRX(slot) = reg;
+
+ udelay(10000);
+
+ return (0);
+}
+#endif /* CFG_CMD_PCMCIA */
+
+int pcmcia_voltage_set(int slot, int vcc, int vpp)
+{
+#ifndef CONFIG_NSCU
+ u_long reg;
+# ifdef DEBUG
+ volatile pcmconf8xx_t *pcmp =
+ (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
+# endif
+
+ debug ("voltage_set: " PCMCIA_BOARD_MSG
+ " Slot %c, Vcc=%d.%d, Vpp=%d.%d\n",
+ 'A'+slot, vcc/10, vcc%10, vpp/10, vcc%10);
+
+ /*
+ * Disable PCMCIA buffers (isolate the interface)
+ * and assert RESET signal
+ */
+ debug ("Disable PCMCIA buffers and assert RESET\n");
+ reg = PCMCIA_PGCRX(slot);
+ reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
+ reg &= ~__MY_PCMCIA_GCRX_CXOE; /* active low */
+ reg |= NSCU_GCRX_CXOE; /* active low */
+
+ PCMCIA_PGCRX(slot) = reg;
+ udelay(500);
+
+ debug ("PCMCIA power OFF\n");
+ power_config(slot);
+ power_off(slot);
+
+ switch(vcc) {
+ case 0: break;
+ case 33: power_on_3_3(slot); break;
+ case 50: power_on_5_0(slot); break;
+ default: goto done;
+ }
+
+ /* Checking supported voltages */
+
+ debug("PIPR: 0x%x --> %s\n", pcmp->pcmc_pipr,
+ (pcmp->pcmc_pipr & 0x00008000) ? "only 5 V" : "can do 3.3V");
+
+ if (vcc)
+ debug("PCMCIA powered at %sV\n", (vcc == 50) ? "5.0" : "3.3");
+ else
+ debug("PCMCIA powered down\n");
+
+done:
+ debug("Enable PCMCIA buffers and stop RESET\n");
+ reg = PCMCIA_PGCRX(slot);
+ reg &= ~__MY_PCMCIA_GCRX_CXRESET; /* active high */
+ reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */
+ reg &= ~NSCU_GCRX_CXOE; /* active low */
+
+ PCMCIA_PGCRX(slot) = reg;
+ udelay(500);
+
+ debug("voltage_set: " PCMCIA_BOARD_MSG " Slot %c, DONE\n", slot+'A');
+#endif /* CONFIG_NSCU */
+ return (0);
+}
+
+#endif /* CONFIG_PCMCIA && (CONFIG_TQM8xxL || CONFIG_SVM_SC8xx) */
diff --git a/drivers/tsec.c b/drivers/tsec.c
index f860dae8b0..7ec565ca67 100644
--- a/drivers/tsec.c
+++ b/drivers/tsec.c
@@ -23,6 +23,8 @@
#include "tsec.h"
#include "miiphy.h"
+DECLARE_GLOBAL_DATA_PTR;
+
#define TX_BUF_CNT 2
static uint rxIdx; /* index of the current RX buffer */
@@ -940,6 +942,56 @@ static struct phy_info phy_info_lxt971 = {
},
};
+/* Parse the DP83865's link and auto-neg status register for speed and duplex
+ * information */
+uint mii_parse_dp83865_lanr(uint mii_reg, struct tsec_private *priv)
+{
+ switch (mii_reg & MIIM_DP83865_SPD_MASK) {
+
+ case MIIM_DP83865_SPD_1000:
+ priv->speed = 1000;
+ break;
+
+ case MIIM_DP83865_SPD_100:
+ priv->speed = 100;
+ break;
+
+ default:
+ priv->speed = 10;
+ break;
+
+ }
+
+ if (mii_reg & MIIM_DP83865_DPX_FULL)
+ priv->duplexity = 1;
+ else
+ priv->duplexity = 0;
+
+ return 0;
+}
+
+struct phy_info phy_info_dp83865 = {
+ 0x20005c7,
+ "NatSemi DP83865",
+ 4,
+ (struct phy_cmd[]) { /* config */
+ {MIIM_CONTROL, MIIM_DP83865_CR_INIT, NULL},
+ {miim_end,}
+ },
+ (struct phy_cmd[]) { /* startup */
+ /* Status is read once to clear old link state */
+ {MIIM_STATUS, miim_read, NULL},
+ /* Auto-negotiate */
+ {MIIM_STATUS, miim_read, &mii_parse_sr},
+ /* Read the link and auto-neg status */
+ {MIIM_DP83865_LANR, miim_read, &mii_parse_dp83865_lanr},
+ {miim_end,}
+ },
+ (struct phy_cmd[]) { /* shutdown */
+ {miim_end,}
+ },
+};
+
struct phy_info *phy_info[] = {
#if 0
&phy_info_cis8201,
@@ -949,6 +1001,7 @@ struct phy_info *phy_info[] = {
&phy_info_M88E1111S,
&phy_info_dm9161,
&phy_info_lxt971,
+ &phy_info_dp83865,
NULL
};
@@ -1031,7 +1084,6 @@ static void relocate_cmds(void)
struct phy_cmd **cmdlistptr;
struct phy_cmd *cmd;
int i,j,k;
- DECLARE_GLOBAL_DATA_PTR;
for(i=0; phy_info[i]; i++) {
/* First thing's first: relocate the pointers to the
diff --git a/drivers/tsec.h b/drivers/tsec.h
index c26fcc0e73..b55b2992b2 100644
--- a/drivers/tsec.h
+++ b/drivers/tsec.h
@@ -124,7 +124,7 @@
/* Cicada 8204 Extended PHY Control Register 1 */
#define MIIM_CIS8204_EPHY_CON 0x17
#define MIIM_CIS8204_EPHYCON_INIT 0x0006
-#define MIIM_CIS8204_EPHYCON_RGMII 0x1000
+#define MIIM_CIS8204_EPHYCON_RGMII 0x1100
/* Cicada 8204 Serial LED Control Register */
#define MIIM_CIS8204_SLED_CON 0x1b
@@ -161,12 +161,22 @@
#define MIIM_DM9161_10BTCSR_INIT 0x7800
/* LXT971 Status 2 registers */
-#define MIIM_LXT971_SR2 17 /* Status Register 2 */
-#define MIIM_LXT971_SR2_SPEED_MASK 0xf000
-#define MIIM_LXT971_SR2_10HDX 0x1000 /* 10 Mbit half duplex selected */
-#define MIIM_LXT971_SR2_10FDX 0x2000 /* 10 Mbit full duplex selected */
-#define MIIM_LXT971_SR2_100HDX 0x4000 /* 100 Mbit half duplex selected */
-#define MIIM_LXT971_SR2_100FDX 0x8000 /* 100 Mbit full duplex selected */
+#define MIIM_LXT971_SR2 0x11 /* Status Register 2 */
+#define MIIM_LXT971_SR2_SPEED_MASK 0x4200
+#define MIIM_LXT971_SR2_10HDX 0x0000 /* 10 Mbit half duplex selected */
+#define MIIM_LXT971_SR2_10FDX 0x0200 /* 10 Mbit full duplex selected */
+#define MIIM_LXT971_SR2_100HDX 0x4000 /* 100 Mbit half duplex selected */
+#define MIIM_LXT971_SR2_100FDX 0x4200 /* 100 Mbit full duplex selected */
+
+/* DP83865 Control register values */
+#define MIIM_DP83865_CR_INIT 0x9200
+
+/* DP83865 Link and Auto-Neg Status Register */
+#define MIIM_DP83865_LANR 0x11
+#define MIIM_DP83865_SPD_MASK 0x0018
+#define MIIM_DP83865_SPD_1000 0x0010
+#define MIIM_DP83865_SPD_100 0x0008
+#define MIIM_DP83865_DPX_FULL 0x0002
#define MIIM_READ_COMMAND 0x00000001
diff --git a/efile b/efile
new file mode 100644
index 0000000000..fdc485b934
--- /dev/null
+++ b/efile
@@ -0,0 +1,56 @@
+omap3430sdp.c:116: warning: function declaration isn't a prototype
+omap3430sdp.c:145: warning: function declaration isn't a prototype
+omap3430sdp.c:170: warning: function declaration isn't a prototype
+omap3430sdp.c: In function 'try_unlock_memory':
+omap3430sdp.c:185: warning: implicit declaration of function 'get_boot_type'
+omap3430sdp.c: In function 's_init':
+omap3430sdp.c:212: warning: implicit declaration of function 'v7_flush_dcache_all'
+omap3430sdp.c:236: warning: implicit declaration of function 'l2cache_enable'
+mem.c: In function 'gpmc_init':
+mem.c:347: warning: unused variable 'i'
+mem.c:346: warning: unused variable 'config_sel'
+mem.c: At top level:
+mem.c:98: warning: 'gpmc_stnor' defined but not used
+clock.c:46: warning: function declaration isn't a prototype
+clock.c:47: warning: function declaration isn't a prototype
+clock.c:48: warning: function declaration isn't a prototype
+clock.c:49: warning: function declaration isn't a prototype
+clock.c: In function 'prcm_init':
+clock.c:130: warning: 'sil_index' may be used uninitialized in this function
+/home/a0384864/LAB_BOOT/src/u-boot/include/asm/arch/sys_proto.h:40: warning: 'get_sysboot_value' declared inline after being called
+/home/a0384864/LAB_BOOT/src/u-boot/include/asm/arch/sys_proto.h:40: warning: previous declaration of 'get_sysboot_value' was here
+nand.c: In function 'board_nand_init':
+nand.c:439: warning: assignment makes pointer from integer without a cast
+nand.c:440: warning: assignment makes pointer from integer without a cast
+nand.c: At top level:
+nand.c:125: warning: 'omap_nand_dev_ready' defined but not used
+nand.c:249: warning: 'omap_compare_ecc' defined but not used
+cpu.c: In function 'cleanup_before_linux':
+cpu.c:131: warning: implicit declaration of function 'arm_cache_flush'
+cpu.c:134: warning: implicit declaration of function 'l2cache_disable'
+cpu.c:136: warning: implicit declaration of function 'get_boot_type'
+cpu.c:137: warning: implicit declaration of function 'v7_flush_dcache_all'
+cpu.c:137: warning: implicit declaration of function 'get_device_type'
+cpu.c: At top level:
+cpu.c:174: warning: function declaration isn't a prototype
+cpu.c: In function 'l2cache_enable':
+cpu.c:180: warning: implicit declaration of function 'get_cpu_rev'
+cpu.c:175: warning: unused variable 'reg'
+cpu.c: At top level:
+cpu.c:204: warning: function declaration isn't a prototype
+cpu.c:204: warning: conflicting types for 'l2cache_disable'
+cpu.c:134: warning: previous implicit declaration of 'l2cache_disable' was here
+cpu.c: In function 'l2cache_disable':
+cpu.c:205: warning: unused variable 'reg'
+smsc9118.c: In function 'lan9118_open':
+smsc9118.c:410: warning: pointer targets in assignment differ in signedness
+smsc9118.c: At top level:
+smsc9118.c:603: warning: function declaration isn't a prototype
+smsc9118.c: In function 'lan9118_read':
+smsc9118.c:660: warning: unused variable 'tmp'
+smsc9118.c: In function 'lan9118_write':
+smsc9118.c:802: warning: pointer targets in passing argument 1 of 'sendToNet' differ in signedness
+cmd_i2c.c: In function 'do_i2c_bus':
+cmd_i2c.c:888: warning: implicit declaration of function 'select_bus'
+env_common.c: In function 'env_complete':
+env_common.c:280: warning: pointer targets in assignment differ in signedness
diff --git a/examples/Makefile b/examples/Makefile
index 2f8c4c4035..a342d75062 100644
--- a/examples/Makefile
+++ b/examples/Makefile
@@ -42,7 +42,7 @@ LOAD_ADDR = 0x00800000 -L $(gcclibdir)/m32 -T nios.lds
endif
ifeq ($(ARCH),nios2)
-LOAD_ADDR = 0x00800000 -L $(gcclibdir) -T nios2.lds
+LOAD_ADDR = 0x02000000 -L $(gcclibdir) -T nios2.lds
endif
ifeq ($(ARCH),m68k)
@@ -53,6 +53,10 @@ ifeq ($(ARCH),microblaze)
LOAD_ADDR = 0x80F00000
endif
+ifeq ($(ARCH),blackfin)
+LOAD_ADDR = 0x1000
+endif
+
include $(TOPDIR)/config.mk
SREC = hello_world.srec
@@ -73,6 +77,11 @@ SREC += sched.srec
BIN += sched.bin sched
endif
+ifeq ($(ARCH),blackfin)
+SREC += smc91111_eeprom.srec
+BIN += smc91111_eeprom.bin smc91111_eeprom
+endif
+
# The following example is pretty 8xx specific...
ifeq ($(CPU),mpc8xx)
SREC += timer.srec
diff --git a/examples/mem_to_mem_idma2intr.c b/examples/mem_to_mem_idma2intr.c
index 3a269c9082..3ff28041f8 100644
--- a/examples/mem_to_mem_idma2intr.c
+++ b/examples/mem_to_mem_idma2intr.c
@@ -30,6 +30,8 @@
#include <common.h>
#include <exports.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#define STANDALONE
#ifndef STANDALONE /* Linked into/Part of PPCBoot */
@@ -346,8 +348,6 @@ static uint dpbase = 0;
uint dpalloc (uint size, uint align)
{
- DECLARE_GLOBAL_DATA_PTR;
-
volatile immap_t *immr = (immap_t *) CFG_IMMR;
uint retloc;
uint align_mask, off;
diff --git a/examples/smc91111_eeprom.c b/examples/smc91111_eeprom.c
index 885f9336cd..98e3e86ffa 100644
--- a/examples/smc91111_eeprom.c
+++ b/examples/smc91111_eeprom.c
@@ -214,13 +214,11 @@ int smc91111_eeprom (int argc, char *argv[])
switch (what) {
case 1:
- printf ("Writing EEPROM register %02x with %04x\n",
- reg, value);
+ printf ("Writing EEPROM register %02x with %04x\n", reg, value);
write_eeprom_reg (value, reg);
break;
case 2:
- printf ("Writing MAC register bank %i,
- reg %02x with %04x\n", reg >> 4, reg & 0xE, value);
+ printf ("Writing MAC register bank %i, reg %02x with %04x\n", reg >> 4, reg & 0xE, value);
SMC_SELECT_BANK (reg >> 4);
SMC_outw (value, reg & 0xE);
break;
diff --git a/examples/stubs.c b/examples/stubs.c
index d4c6e063e3..1caa575747 100644
--- a/examples/stubs.c
+++ b/examples/stubs.c
@@ -92,7 +92,7 @@ gd_t *global_data;
#x ":\n" \
" movhi r8, %%hi(%0)\n" \
" ori r8, r0, %%lo(%0)\n" \
-" add r8, r0, r15\n" \
+" add r8, r8, r15\n" \
" ldw r8, 0(r8)\n" \
" ldw r8, %1(r8)\n" \
" jmp r8\n" \
@@ -125,6 +125,19 @@ gd_t *global_data;
" lwi r5, r5, %1\n" \
" bra r5\n" \
: : "i"(offsetof(gd_t, jt)), "i"(XF_ ## x * sizeof(void *)) : "r5");
+#elif defined(CONFIG_BLACKFIN)
+/*
+ * P5 holds the pointer to the global_data, P0 is a call-clobbered
+ * register
+ */
+#define EXPORT_FUNC(x) \
+ asm volatile ( \
+" .globl " #x "\n" \
+#x ":\n" \
+" P0 = [P5 + %0]\n" \
+" P0 = [P0 + %1]\n" \
+" JUMP (P0)\n" \
+ : : "i"(offsetof(gd_t, jt)), "i"(XF_ ## x * sizeof(void *)) : "P0");
#else
#error stubs definition missing for this architecture
#endif
diff --git a/examples/timer.c b/examples/timer.c
index 037fdfdb3a..13ec06f02c 100644
--- a/examples/timer.c
+++ b/examples/timer.c
@@ -26,6 +26,8 @@
#include <mpc8xx_irq.h>
#include <exports.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#undef DEBUG
#define TIMER_PERIOD 1000000 /* 1 second clock */
@@ -115,8 +117,6 @@ static char *usage = "\n[q, b, e, ?] ";
int timer (int argc, char *argv[])
{
- DECLARE_GLOBAL_DATA_PTR;
-
cpmtimer8xx_t *cpmtimerp; /* Pointer to the CPM Timer structure */
tid_8xx_cpmtimer_t hw;
tid_8xx_cpmtimer_t *hwp = &hw;
diff --git a/fs/ext2/ext2fs.c b/fs/ext2/ext2fs.c
index c21d2d6172..9cf2fb7ba4 100644
--- a/fs/ext2/ext2fs.c
+++ b/fs/ext2/ext2fs.c
@@ -389,7 +389,7 @@ int ext2fs_read_file
int blockcnt;
int log2blocksize = LOG2_EXT2_BLOCK_SIZE (node->data);
int blocksize = 1 << (log2blocksize + DISK_SECTOR_BITS);
- unsigned int filesize = node->inode.size;
+ unsigned int filesize = __le32_to_cpu(node->inode.size);
/* Adjust len so it we can't read past the end of the file. */
if (len > filesize) {
diff --git a/fs/jffs2/jffs2_1pass.c b/fs/jffs2/jffs2_1pass.c
index c6c0c2a57f..41ff4c1fbb 100644
--- a/fs/jffs2/jffs2_1pass.c
+++ b/fs/jffs2/jffs2_1pass.c
@@ -144,6 +144,11 @@
static struct part_info *current_part;
#if defined(CONFIG_JFFS2_NAND) && (CONFIG_COMMANDS & CFG_CMD_NAND)
+#if defined(CFG_NAND_LEGACY)
+#include <linux/mtd/nand_legacy.h>
+#else
+#include <nand.h>
+#endif
/*
* Support for jffs2 on top of NAND-flash
*
@@ -154,9 +159,14 @@ static struct part_info *current_part;
*
*/
-/* this one defined in cmd_nand.c */
+#if defined(CFG_NAND_LEGACY)
+/* this one defined in nand_legacy.c */
int read_jffs2_nand(size_t start, size_t len,
- size_t * retlen, u_char * buf, int nanddev);
+ size_t * retlen, u_char * buf, int nanddev);
+#else
+/* info for NAND chips, defined in drivers/nand/nand.c */
+extern nand_info_t nand_info[];
+#endif
#define NAND_PAGE_SIZE 512
#define NAND_PAGE_SHIFT 9
@@ -174,7 +184,11 @@ static int read_nand_cached(u32 off, u32 size, u_char *buf)
{
struct mtdids *id = current_part->dev->id;
u32 bytes_read = 0;
+#if defined(CFG_NAND_LEGACY)
size_t retlen;
+#else
+ ulong retlen;
+#endif
int cpy_bytes;
while (bytes_read < size) {
@@ -191,6 +205,8 @@ static int read_nand_cached(u32 off, u32 size, u_char *buf)
return -1;
}
}
+
+#if defined(CFG_NAND_LEGACY)
if (read_jffs2_nand(nand_cache_off, NAND_CACHE_SIZE,
&retlen, nand_cache, id->num) < 0 ||
retlen != NAND_CACHE_SIZE) {
@@ -198,6 +214,16 @@ static int read_nand_cached(u32 off, u32 size, u_char *buf)
nand_cache_off, NAND_CACHE_SIZE);
return -1;
}
+#else
+ retlen = NAND_CACHE_SIZE;
+ if (nand_read(&nand_info[id->num], nand_cache_off,
+ &retlen, nand_cache) != 0 ||
+ retlen != NAND_CACHE_SIZE) {
+ printf("read_nand_cached: error reading nand off %#x size %d bytes\n",
+ nand_cache_off, NAND_CACHE_SIZE);
+ return -1;
+ }
+#endif
}
cpy_bytes = nand_cache_off + NAND_CACHE_SIZE - (off + bytes_read);
if (cpy_bytes > size - bytes_read)
@@ -1167,7 +1193,8 @@ jffs2_1pass_build_lists(struct part_info * part)
if (node->magic == JFFS2_MAGIC_BITMASK && hdr_crc(node)) {
/* if its a fragment add it */
if (node->nodetype == JFFS2_NODETYPE_INODE &&
- inode_crc((struct jffs2_raw_inode *) node)) {
+ inode_crc((struct jffs2_raw_inode *) node) &&
+ data_crc((struct jffs2_raw_inode *) node)) {
if (insert_node(&pL->frag, (u32) part->offset +
offset) == NULL) {
put_fl_mem(node);
diff --git a/fs/jffs2/jffs2_nand_1pass.c b/fs/jffs2/jffs2_nand_1pass.c
new file mode 100644
index 0000000000..e78af7578b
--- /dev/null
+++ b/fs/jffs2/jffs2_nand_1pass.c
@@ -0,0 +1,1036 @@
+#include <common.h>
+
+#if !defined(CFG_NAND_LEGACY) && (CONFIG_COMMANDS & CFG_CMD_JFFS2)
+
+#include <malloc.h>
+#include <linux/stat.h>
+#include <linux/time.h>
+
+#include <jffs2/jffs2.h>
+#include <jffs2/jffs2_1pass.h>
+#include <nand.h>
+
+#include "jffs2_nand_private.h"
+
+#define NODE_CHUNK 1024 /* size of memory allocation chunk in b_nodes */
+
+/* Debugging switches */
+#undef DEBUG_DIRENTS /* print directory entry list after scan */
+#undef DEBUG_FRAGMENTS /* print fragment list after scan */
+#undef DEBUG /* enable debugging messages */
+
+#ifdef DEBUG
+# define DEBUGF(fmt,args...) printf(fmt ,##args)
+#else
+# define DEBUGF(fmt,args...)
+#endif
+
+static nand_info_t *nand;
+
+/* Compression names */
+static char *compr_names[] = {
+ "NONE",
+ "ZERO",
+ "RTIME",
+ "RUBINMIPS",
+ "COPY",
+ "DYNRUBIN",
+ "ZLIB",
+#if defined(CONFIG_JFFS2_LZO_LZARI)
+ "LZO",
+ "LZARI",
+#endif
+};
+
+/* Spinning wheel */
+static char spinner[] = { '|', '/', '-', '\\' };
+
+/* Memory management */
+struct mem_block {
+ unsigned index;
+ struct mem_block *next;
+ char nodes[0];
+};
+
+static void
+free_nodes(struct b_list *list)
+{
+ while (list->listMemBase != NULL) {
+ struct mem_block *next = list->listMemBase->next;
+ free(list->listMemBase);
+ list->listMemBase = next;
+ }
+}
+
+static struct b_node *
+add_node(struct b_list *list, int size)
+{
+ u32 index = 0;
+ struct mem_block *memBase;
+ struct b_node *b;
+
+ memBase = list->listMemBase;
+ if (memBase != NULL)
+ index = memBase->index;
+
+ if (memBase == NULL || index >= NODE_CHUNK) {
+ /* we need more space before we continue */
+ memBase = mmalloc(sizeof(struct mem_block) + NODE_CHUNK * size);
+ if (memBase == NULL) {
+ putstr("add_node: malloc failed\n");
+ return NULL;
+ }
+ memBase->next = list->listMemBase;
+ index = 0;
+ }
+ /* now we have room to add it. */
+ b = (struct b_node *)&memBase->nodes[size * index];
+ index ++;
+
+ memBase->index = index;
+ list->listMemBase = memBase;
+ list->listCount++;
+ return b;
+}
+
+static struct b_node *
+insert_node(struct b_list *list, struct b_node *new)
+{
+#ifdef CFG_JFFS2_SORT_FRAGMENTS
+ struct b_node *b, *prev;
+
+ if (list->listTail != NULL && list->listCompare(new, list->listTail))
+ prev = list->listTail;
+ else if (list->listLast != NULL && list->listCompare(new, list->listLast))
+ prev = list->listLast;
+ else
+ prev = NULL;
+
+ for (b = (prev ? prev->next : list->listHead);
+ b != NULL && list->listCompare(new, b);
+ prev = b, b = b->next) {
+ list->listLoops++;
+ }
+ if (b != NULL)
+ list->listLast = prev;
+
+ if (b != NULL) {
+ new->next = b;
+ if (prev != NULL)
+ prev->next = new;
+ else
+ list->listHead = new;
+ } else
+#endif
+ {
+ new->next = (struct b_node *) NULL;
+ if (list->listTail != NULL) {
+ list->listTail->next = new;
+ list->listTail = new;
+ } else {
+ list->listTail = list->listHead = new;
+ }
+ }
+
+ return new;
+}
+
+static struct b_node *
+insert_inode(struct b_list *list, struct jffs2_raw_inode *node, u32 offset)
+{
+ struct b_inode *new;
+
+ if (!(new = (struct b_inode *)add_node(list, sizeof(struct b_inode)))) {
+ putstr("add_node failed!\r\n");
+ return NULL;
+ }
+ new->offset = offset;
+ new->version = node->version;
+ new->ino = node->ino;
+ new->isize = node->isize;
+ new->csize = node->csize;
+
+ return insert_node(list, (struct b_node *)new);
+}
+
+static struct b_node *
+insert_dirent(struct b_list *list, struct jffs2_raw_dirent *node, u32 offset)
+{
+ struct b_dirent *new;
+
+ if (!(new = (struct b_dirent *)add_node(list, sizeof(struct b_dirent)))) {
+ putstr("add_node failed!\r\n");
+ return NULL;
+ }
+ new->offset = offset;
+ new->version = node->version;
+ new->pino = node->pino;
+ new->ino = node->ino;
+ new->nhash = full_name_hash(node->name, node->nsize);
+ new->nsize = node->nsize;
+ new->type = node->type;
+
+ return insert_node(list, (struct b_node *)new);
+}
+
+#ifdef CFG_JFFS2_SORT_FRAGMENTS
+/* Sort data entries with the latest version last, so that if there
+ * is overlapping data the latest version will be used.
+ */
+static int compare_inodes(struct b_node *new, struct b_node *old)
+{
+ struct jffs2_raw_inode ojNew;
+ struct jffs2_raw_inode ojOld;
+ struct jffs2_raw_inode *jNew =
+ (struct jffs2_raw_inode *)get_fl_mem(new->offset, sizeof(ojNew), &ojNew);
+ struct jffs2_raw_inode *jOld =
+ (struct jffs2_raw_inode *)get_fl_mem(old->offset, sizeof(ojOld), &ojOld);
+
+ return jNew->version > jOld->version;
+}
+
+/* Sort directory entries so all entries in the same directory
+ * with the same name are grouped together, with the latest version
+ * last. This makes it easy to eliminate all but the latest version
+ * by marking the previous version dead by setting the inode to 0.
+ */
+static int compare_dirents(struct b_node *new, struct b_node *old)
+{
+ struct jffs2_raw_dirent ojNew;
+ struct jffs2_raw_dirent ojOld;
+ struct jffs2_raw_dirent *jNew =
+ (struct jffs2_raw_dirent *)get_fl_mem(new->offset, sizeof(ojNew), &ojNew);
+ struct jffs2_raw_dirent *jOld =
+ (struct jffs2_raw_dirent *)get_fl_mem(old->offset, sizeof(ojOld), &ojOld);
+ int cmp;
+
+ /* ascending sort by pino */
+ if (jNew->pino != jOld->pino)
+ return jNew->pino > jOld->pino;
+
+ /* pino is the same, so use ascending sort by nsize, so
+ * we don't do strncmp unless we really must.
+ */
+ if (jNew->nsize != jOld->nsize)
+ return jNew->nsize > jOld->nsize;
+
+ /* length is also the same, so use ascending sort by name
+ */
+ cmp = strncmp(jNew->name, jOld->name, jNew->nsize);
+ if (cmp != 0)
+ return cmp > 0;
+
+ /* we have duplicate names in this directory, so use ascending
+ * sort by version
+ */
+ if (jNew->version > jOld->version) {
+ /* since jNew is newer, we know jOld is not valid, so
+ * mark it with inode 0 and it will not be used
+ */
+ jOld->ino = 0;
+ return 1;
+ }
+
+ return 0;
+}
+#endif
+
+static u32
+jffs_init_1pass_list(struct part_info *part)
+{
+ struct b_lists *pL;
+
+ if (part->jffs2_priv != NULL) {
+ pL = (struct b_lists *)part->jffs2_priv;
+ free_nodes(&pL->frag);
+ free_nodes(&pL->dir);
+ free(pL);
+ }
+ if (NULL != (part->jffs2_priv = malloc(sizeof(struct b_lists)))) {
+ pL = (struct b_lists *)part->jffs2_priv;
+
+ memset(pL, 0, sizeof(*pL));
+#ifdef CFG_JFFS2_SORT_FRAGMENTS
+ pL->dir.listCompare = compare_dirents;
+ pL->frag.listCompare = compare_inodes;
+#endif
+ }
+ return 0;
+}
+
+/* find the inode from the slashless name given a parent */
+static long
+jffs2_1pass_read_inode(struct b_lists *pL, u32 ino, char *dest,
+ struct stat *stat)
+{
+ struct b_inode *jNode;
+ u32 totalSize = 0;
+ u32 latestVersion = 0;
+ long ret;
+
+#ifdef CFG_JFFS2_SORT_FRAGMENTS
+ /* Find file size before loading any data, so fragments that
+ * start past the end of file can be ignored. A fragment
+ * that is partially in the file is loaded, so extra data may
+ * be loaded up to the next 4K boundary above the file size.
+ * This shouldn't cause trouble when loading kernel images, so
+ * we will live with it.
+ */
+ for (jNode = (struct b_inode *)pL->frag.listHead; jNode; jNode = jNode->next) {
+ if ((ino == jNode->ino)) {
+ /* get actual file length from the newest node */
+ if (jNode->version >= latestVersion) {
+ totalSize = jNode->isize;
+ latestVersion = jNode->version;
+ }
+ }
+ }
+#endif
+
+ for (jNode = (struct b_inode *)pL->frag.listHead; jNode; jNode = jNode->next) {
+ if ((ino != jNode->ino))
+ continue;
+#ifndef CFG_JFFS2_SORT_FRAGMENTS
+ /* get actual file length from the newest node */
+ if (jNode->version >= latestVersion) {
+ totalSize = jNode->isize;
+ latestVersion = jNode->version;
+ }
+#endif
+ if (dest || stat) {
+ char *src, *dst;
+ char data[4096 + sizeof(struct jffs2_raw_inode)];
+ struct jffs2_raw_inode *inode;
+ size_t len;
+
+ inode = (struct jffs2_raw_inode *)&data;
+ len = sizeof(struct jffs2_raw_inode);
+ if (dest)
+ len += jNode->csize;
+ nand_read(nand, jNode->offset, &len, inode);
+ /* ignore data behind latest known EOF */
+ if (inode->offset > totalSize)
+ continue;
+
+ if (stat) {
+ stat->st_mtime = inode->mtime;
+ stat->st_mode = inode->mode;
+ stat->st_ino = inode->ino;
+ stat->st_size = totalSize;
+ }
+
+ if (!dest)
+ continue;
+
+ src = ((char *) inode) + sizeof(struct jffs2_raw_inode);
+ dst = (char *) (dest + inode->offset);
+
+ switch (inode->compr) {
+ case JFFS2_COMPR_NONE:
+ ret = 0;
+ memcpy(dst, src, inode->dsize);
+ break;
+ case JFFS2_COMPR_ZERO:
+ ret = 0;
+ memset(dst, 0, inode->dsize);
+ break;
+ case JFFS2_COMPR_RTIME:
+ ret = 0;
+ rtime_decompress(src, dst, inode->csize, inode->dsize);
+ break;
+ case JFFS2_COMPR_DYNRUBIN:
+ /* this is slow but it works */
+ ret = 0;
+ dynrubin_decompress(src, dst, inode->csize, inode->dsize);
+ break;
+ case JFFS2_COMPR_ZLIB:
+ ret = zlib_decompress(src, dst, inode->csize, inode->dsize);
+ break;
+#if defined(CONFIG_JFFS2_LZO_LZARI)
+ case JFFS2_COMPR_LZO:
+ ret = lzo_decompress(src, dst, inode->csize, inode->dsize);
+ break;
+ case JFFS2_COMPR_LZARI:
+ ret = lzari_decompress(src, dst, inode->csize, inode->dsize);
+ break;
+#endif
+ default:
+ /* unknown */
+ putLabeledWord("UNKOWN COMPRESSION METHOD = ", inode->compr);
+ return -1;
+ }
+ }
+ }
+
+ return totalSize;
+}
+
+/* find the inode from the slashless name given a parent */
+static u32
+jffs2_1pass_find_inode(struct b_lists * pL, const char *name, u32 pino)
+{
+ struct b_dirent *jDir;
+ int len = strlen(name); /* name is assumed slash free */
+ unsigned int nhash = full_name_hash(name, len);
+ u32 version = 0;
+ u32 inode = 0;
+
+ /* we need to search all and return the inode with the highest version */
+ for (jDir = (struct b_dirent *)pL->dir.listHead; jDir; jDir = jDir->next) {
+ if ((pino == jDir->pino) && (jDir->ino) && /* 0 for unlink */
+ (len == jDir->nsize) && (nhash == jDir->nhash)) {
+ /* TODO: compare name */
+ if (jDir->version < version)
+ continue;
+
+ if (jDir->version == version && inode != 0) {
+ /* I'm pretty sure this isn't legal */
+ putstr(" ** ERROR ** ");
+/* putnstr(jDir->name, jDir->nsize); */
+/* putLabeledWord(" has dup version =", version); */
+ }
+ inode = jDir->ino;
+ version = jDir->version;
+ }
+ }
+ return inode;
+}
+
+char *mkmodestr(unsigned long mode, char *str)
+{
+ static const char *l = "xwr";
+ int mask = 1, i;
+ char c;
+
+ switch (mode & S_IFMT) {
+ case S_IFDIR: str[0] = 'd'; break;
+ case S_IFBLK: str[0] = 'b'; break;
+ case S_IFCHR: str[0] = 'c'; break;
+ case S_IFIFO: str[0] = 'f'; break;
+ case S_IFLNK: str[0] = 'l'; break;
+ case S_IFSOCK: str[0] = 's'; break;
+ case S_IFREG: str[0] = '-'; break;
+ default: str[0] = '?';
+ }
+
+ for(i = 0; i < 9; i++) {
+ c = l[i%3];
+ str[9-i] = (mode & mask)?c:'-';
+ mask = mask<<1;
+ }
+
+ if(mode & S_ISUID) str[3] = (mode & S_IXUSR)?'s':'S';
+ if(mode & S_ISGID) str[6] = (mode & S_IXGRP)?'s':'S';
+ if(mode & S_ISVTX) str[9] = (mode & S_IXOTH)?'t':'T';
+ str[10] = '\0';
+ return str;
+}
+
+static inline void dump_stat(struct stat *st, const char *name)
+{
+ char str[20];
+ char s[64], *p;
+
+ if (st->st_mtime == (time_t)(-1)) /* some ctimes really hate -1 */
+ st->st_mtime = 1;
+
+ ctime_r(&st->st_mtime, s/*,64*/); /* newlib ctime doesn't have buflen */
+
+ if ((p = strchr(s,'\n')) != NULL) *p = '\0';
+ if ((p = strchr(s,'\r')) != NULL) *p = '\0';
+
+/*
+ printf("%6lo %s %8ld %s %s\n", st->st_mode, mkmodestr(st->st_mode, str),
+ st->st_size, s, name);
+*/
+
+ printf(" %s %8ld %s %s", mkmodestr(st->st_mode,str), st->st_size, s, name);
+}
+
+static inline int
+dump_inode(struct b_lists *pL, struct b_dirent *d, struct b_inode *i)
+{
+ char fname[JFFS2_MAX_NAME_LEN + 1];
+ struct stat st;
+ size_t len;
+
+ if(!d || !i) return -1;
+ len = d->nsize;
+ nand_read(nand, d->offset + sizeof(struct jffs2_raw_dirent),
+ &len, &fname);
+ fname[d->nsize] = '\0';
+
+ memset(&st, 0, sizeof(st));
+
+ jffs2_1pass_read_inode(pL, i->ino, NULL, &st);
+
+ dump_stat(&st, fname);
+/* FIXME
+ if (d->type == DT_LNK) {
+ unsigned char *src = (unsigned char *) (&i[1]);
+ putstr(" -> ");
+ putnstr(src, (int)i->dsize);
+ }
+*/
+ putstr("\r\n");
+
+ return 0;
+}
+
+/* list inodes with the given pino */
+static u32
+jffs2_1pass_list_inodes(struct b_lists * pL, u32 pino)
+{
+ struct b_dirent *jDir;
+ u32 i_version = 0;
+
+ for (jDir = (struct b_dirent *)pL->dir.listHead; jDir; jDir = jDir->next) {
+ if ((pino == jDir->pino) && (jDir->ino)) { /* ino=0 -> unlink */
+ struct b_inode *jNode = (struct b_inode *)pL->frag.listHead;
+ struct b_inode *i = NULL;
+
+ while (jNode) {
+ if (jNode->ino == jDir->ino && jNode->version >= i_version) {
+ i_version = jNode->version;
+ i = jNode;
+ }
+ jNode = jNode->next;
+ }
+ dump_inode(pL, jDir, i);
+ }
+ }
+ return pino;
+}
+
+static u32
+jffs2_1pass_search_inode(struct b_lists * pL, const char *fname, u32 pino)
+{
+ int i;
+ char tmp[256];
+ char working_tmp[256];
+ char *c;
+
+ /* discard any leading slash */
+ i = 0;
+ while (fname[i] == '/')
+ i++;
+ strcpy(tmp, &fname[i]);
+
+ while ((c = (char *) strchr(tmp, '/'))) /* we are still dired searching */
+ {
+ strncpy(working_tmp, tmp, c - tmp);
+ working_tmp[c - tmp] = '\0';
+#if 0
+ putstr("search_inode: tmp = ");
+ putstr(tmp);
+ putstr("\r\n");
+ putstr("search_inode: wtmp = ");
+ putstr(working_tmp);
+ putstr("\r\n");
+ putstr("search_inode: c = ");
+ putstr(c);
+ putstr("\r\n");
+#endif
+ for (i = 0; i < strlen(c) - 1; i++)
+ tmp[i] = c[i + 1];
+ tmp[i] = '\0';
+#if 0
+ putstr("search_inode: post tmp = ");
+ putstr(tmp);
+ putstr("\r\n");
+#endif
+
+ if (!(pino = jffs2_1pass_find_inode(pL, working_tmp, pino))) {
+ putstr("find_inode failed for name=");
+ putstr(working_tmp);
+ putstr("\r\n");
+ return 0;
+ }
+ }
+ /* this is for the bare filename, directories have already been mapped */
+ if (!(pino = jffs2_1pass_find_inode(pL, tmp, pino))) {
+ putstr("find_inode failed for name=");
+ putstr(tmp);
+ putstr("\r\n");
+ return 0;
+ }
+ return pino;
+
+}
+
+static u32
+jffs2_1pass_resolve_inode(struct b_lists * pL, u32 ino)
+{
+ struct b_dirent *jDir;
+ struct b_inode *jNode;
+ u8 jDirFoundType = 0;
+ u32 jDirFoundIno = 0;
+ u32 jDirFoundPino = 0;
+ char tmp[JFFS2_MAX_NAME_LEN + 1];
+ u32 version = 0;
+ u32 pino;
+
+ /* we need to search all and return the inode with the highest version */
+ for (jDir = (struct b_dirent *)pL->dir.listHead; jDir; jDir = jDir->next) {
+ if (ino == jDir->ino) {
+ if (jDir->version < version)
+ continue;
+
+ if (jDir->version == version && jDirFoundType) {
+ /* I'm pretty sure this isn't legal */
+ putstr(" ** ERROR ** ");
+/* putnstr(jDir->name, jDir->nsize); */
+/* putLabeledWord(" has dup version (resolve) = ", */
+/* version); */
+ }
+
+ jDirFoundType = jDir->type;
+ jDirFoundIno = jDir->ino;
+ jDirFoundPino = jDir->pino;
+ version = jDir->version;
+ }
+ }
+ /* now we found the right entry again. (shoulda returned inode*) */
+ if (jDirFoundType != DT_LNK)
+ return jDirFoundIno;
+
+ /* it's a soft link so we follow it again. */
+ for (jNode = (struct b_inode *)pL->frag.listHead; jNode; jNode = jNode->next) {
+ if (jNode->ino == jDirFoundIno) {
+ size_t len = jNode->csize;
+ nand_read(nand, jNode->offset + sizeof(struct jffs2_raw_inode), &len, &tmp);
+ tmp[jNode->csize] = '\0';
+ break;
+ }
+ }
+ /* ok so the name of the new file to find is in tmp */
+ /* if it starts with a slash it is root based else shared dirs */
+ if (tmp[0] == '/')
+ pino = 1;
+ else
+ pino = jDirFoundPino;
+
+ return jffs2_1pass_search_inode(pL, tmp, pino);
+}
+
+static u32
+jffs2_1pass_search_list_inodes(struct b_lists * pL, const char *fname, u32 pino)
+{
+ int i;
+ char tmp[256];
+ char working_tmp[256];
+ char *c;
+
+ /* discard any leading slash */
+ i = 0;
+ while (fname[i] == '/')
+ i++;
+ strcpy(tmp, &fname[i]);
+ working_tmp[0] = '\0';
+ while ((c = (char *) strchr(tmp, '/'))) /* we are still dired searching */
+ {
+ strncpy(working_tmp, tmp, c - tmp);
+ working_tmp[c - tmp] = '\0';
+ for (i = 0; i < strlen(c) - 1; i++)
+ tmp[i] = c[i + 1];
+ tmp[i] = '\0';
+ /* only a failure if we arent looking at top level */
+ if (!(pino = jffs2_1pass_find_inode(pL, working_tmp, pino)) &&
+ (working_tmp[0])) {
+ putstr("find_inode failed for name=");
+ putstr(working_tmp);
+ putstr("\r\n");
+ return 0;
+ }
+ }
+
+ if (tmp[0] && !(pino = jffs2_1pass_find_inode(pL, tmp, pino))) {
+ putstr("find_inode failed for name=");
+ putstr(tmp);
+ putstr("\r\n");
+ return 0;
+ }
+ /* this is for the bare filename, directories have already been mapped */
+ if (!(pino = jffs2_1pass_list_inodes(pL, pino))) {
+ putstr("find_inode failed for name=");
+ putstr(tmp);
+ putstr("\r\n");
+ return 0;
+ }
+ return pino;
+
+}
+
+unsigned char
+jffs2_1pass_rescan_needed(struct part_info *part)
+{
+ struct b_node *b;
+ struct jffs2_unknown_node onode;
+ struct jffs2_unknown_node *node;
+ struct b_lists *pL = (struct b_lists *)part->jffs2_priv;
+
+ if (part->jffs2_priv == 0){
+ DEBUGF ("rescan: First time in use\n");
+ return 1;
+ }
+ /* if we have no list, we need to rescan */
+ if (pL->frag.listCount == 0) {
+ DEBUGF ("rescan: fraglist zero\n");
+ return 1;
+ }
+
+ /* or if we are scanning a new partition */
+ if (pL->partOffset != part->offset) {
+ DEBUGF ("rescan: different partition\n");
+ return 1;
+ }
+
+ /* FIXME */
+#if 0
+ /* but suppose someone reflashed a partition at the same offset... */
+ b = pL->dir.listHead;
+ while (b) {
+ node = (struct jffs2_unknown_node *) get_fl_mem(b->offset,
+ sizeof(onode), &onode);
+ if (node->nodetype != JFFS2_NODETYPE_DIRENT) {
+ DEBUGF ("rescan: fs changed beneath me? (%lx)\n",
+ (unsigned long) b->offset);
+ return 1;
+ }
+ b = b->next;
+ }
+#endif
+ return 0;
+}
+
+#ifdef DEBUG_FRAGMENTS
+static void
+dump_fragments(struct b_lists *pL)
+{
+ struct b_node *b;
+ struct jffs2_raw_inode ojNode;
+ struct jffs2_raw_inode *jNode;
+
+ putstr("\r\n\r\n******The fragment Entries******\r\n");
+ b = pL->frag.listHead;
+ while (b) {
+ jNode = (struct jffs2_raw_inode *) get_fl_mem(b->offset,
+ sizeof(ojNode), &ojNode);
+ putLabeledWord("\r\n\tbuild_list: FLASH_OFFSET = ", b->offset);
+ putLabeledWord("\tbuild_list: totlen = ", jNode->totlen);
+ putLabeledWord("\tbuild_list: inode = ", jNode->ino);
+ putLabeledWord("\tbuild_list: version = ", jNode->version);
+ putLabeledWord("\tbuild_list: isize = ", jNode->isize);
+ putLabeledWord("\tbuild_list: atime = ", jNode->atime);
+ putLabeledWord("\tbuild_list: offset = ", jNode->offset);
+ putLabeledWord("\tbuild_list: csize = ", jNode->csize);
+ putLabeledWord("\tbuild_list: dsize = ", jNode->dsize);
+ putLabeledWord("\tbuild_list: compr = ", jNode->compr);
+ putLabeledWord("\tbuild_list: usercompr = ", jNode->usercompr);
+ putLabeledWord("\tbuild_list: flags = ", jNode->flags);
+ putLabeledWord("\tbuild_list: offset = ", b->offset); /* FIXME: ? [RS] */
+ b = b->next;
+ }
+}
+#endif
+
+#ifdef DEBUG_DIRENTS
+static void
+dump_dirents(struct b_lists *pL)
+{
+ struct b_node *b;
+ struct jffs2_raw_dirent *jDir;
+
+ putstr("\r\n\r\n******The directory Entries******\r\n");
+ b = pL->dir.listHead;
+ while (b) {
+ jDir = (struct jffs2_raw_dirent *) get_node_mem(b->offset);
+ putstr("\r\n");
+ putnstr(jDir->name, jDir->nsize);
+ putLabeledWord("\r\n\tbuild_list: magic = ", jDir->magic);
+ putLabeledWord("\tbuild_list: nodetype = ", jDir->nodetype);
+ putLabeledWord("\tbuild_list: hdr_crc = ", jDir->hdr_crc);
+ putLabeledWord("\tbuild_list: pino = ", jDir->pino);
+ putLabeledWord("\tbuild_list: version = ", jDir->version);
+ putLabeledWord("\tbuild_list: ino = ", jDir->ino);
+ putLabeledWord("\tbuild_list: mctime = ", jDir->mctime);
+ putLabeledWord("\tbuild_list: nsize = ", jDir->nsize);
+ putLabeledWord("\tbuild_list: type = ", jDir->type);
+ putLabeledWord("\tbuild_list: node_crc = ", jDir->node_crc);
+ putLabeledWord("\tbuild_list: name_crc = ", jDir->name_crc);
+ putLabeledWord("\tbuild_list: offset = ", b->offset); /* FIXME: ? [RS] */
+ b = b->next;
+ put_fl_mem(jDir);
+ }
+}
+#endif
+
+static int
+jffs2_fill_scan_buf(nand_info_t *nand, unsigned char *buf,
+ unsigned ofs, unsigned len)
+{
+ int ret;
+ unsigned olen;
+
+ olen = len;
+ ret = nand_read(nand, ofs, &olen, buf);
+ if (ret) {
+ printf("nand_read(0x%x bytes from 0x%x) returned %d\n", len, ofs, ret);
+ return ret;
+ }
+ if (olen < len) {
+ printf("Read at 0x%x gave only 0x%x bytes\n", ofs, olen);
+ return -1;
+ }
+ return 0;
+}
+
+#define EMPTY_SCAN_SIZE 1024
+static u32
+jffs2_1pass_build_lists(struct part_info * part)
+{
+ struct b_lists *pL;
+ struct jffs2_unknown_node *node;
+ unsigned nr_blocks, sectorsize, ofs, offset;
+ char *buf;
+ int i;
+ u32 counter = 0;
+ u32 counter4 = 0;
+ u32 counterF = 0;
+ u32 counterN = 0;
+
+ struct mtdids *id = part->dev->id;
+ nand = nand_info + id->num;
+
+ /* if we are building a list we need to refresh the cache. */
+ jffs_init_1pass_list(part);
+ pL = (struct b_lists *)part->jffs2_priv;
+ pL->partOffset = part->offset;
+ puts ("Scanning JFFS2 FS: ");
+
+ sectorsize = nand->erasesize;
+ nr_blocks = part->size / sectorsize;
+ buf = malloc(sectorsize);
+ if (!buf)
+ return 0;
+
+ for (i = 0; i < nr_blocks; i++) {
+ printf("\b\b%c ", spinner[counter++ % sizeof(spinner)]);
+
+ offset = part->offset + i * sectorsize;
+
+ if (nand_block_isbad(nand, offset))
+ continue;
+
+ if (jffs2_fill_scan_buf(nand, buf, offset, EMPTY_SCAN_SIZE))
+ return 0;
+
+ ofs = 0;
+ /* Scan only 4KiB of 0xFF before declaring it's empty */
+ while (ofs < EMPTY_SCAN_SIZE && *(uint32_t *)(&buf[ofs]) == 0xFFFFFFFF)
+ ofs += 4;
+ if (ofs == EMPTY_SCAN_SIZE)
+ continue;
+
+ if (jffs2_fill_scan_buf(nand, buf + EMPTY_SCAN_SIZE, offset + EMPTY_SCAN_SIZE, sectorsize - EMPTY_SCAN_SIZE))
+ return 0;
+ offset += ofs;
+
+ while (ofs < sectorsize - sizeof(struct jffs2_unknown_node)) {
+ node = (struct jffs2_unknown_node *)&buf[ofs];
+ if (node->magic != JFFS2_MAGIC_BITMASK || !hdr_crc(node)) {
+ offset += 4;
+ ofs += 4;
+ counter4++;
+ continue;
+ }
+ /* if its a fragment add it */
+ if (node->nodetype == JFFS2_NODETYPE_INODE &&
+ inode_crc((struct jffs2_raw_inode *) node)) {
+ if (insert_inode(&pL->frag, (struct jffs2_raw_inode *) node,
+ offset) == NULL) {
+ return 0;
+ }
+ } else if (node->nodetype == JFFS2_NODETYPE_DIRENT &&
+ dirent_crc((struct jffs2_raw_dirent *) node) &&
+ dirent_name_crc((struct jffs2_raw_dirent *) node)) {
+ if (! (counterN%100))
+ puts ("\b\b. ");
+ if (insert_dirent(&pL->dir, (struct jffs2_raw_dirent *) node,
+ offset) == NULL) {
+ return 0;
+ }
+ counterN++;
+ } else if (node->nodetype == JFFS2_NODETYPE_CLEANMARKER) {
+ if (node->totlen != sizeof(struct jffs2_unknown_node))
+ printf("OOPS Cleanmarker has bad size "
+ "%d != %d\n", node->totlen,
+ sizeof(struct jffs2_unknown_node));
+ } else if (node->nodetype == JFFS2_NODETYPE_PADDING) {
+ if (node->totlen < sizeof(struct jffs2_unknown_node))
+ printf("OOPS Padding has bad size "
+ "%d < %d\n", node->totlen,
+ sizeof(struct jffs2_unknown_node));
+ } else {
+ printf("Unknown node type: %x len %d "
+ "offset 0x%x\n", node->nodetype,
+ node->totlen, offset);
+ }
+ offset += ((node->totlen + 3) & ~3);
+ ofs += ((node->totlen + 3) & ~3);
+ counterF++;
+ }
+ }
+
+ putstr("\b\b done.\r\n"); /* close off the dots */
+
+#if 0
+ putLabeledWord("dir entries = ", pL->dir.listCount);
+ putLabeledWord("frag entries = ", pL->frag.listCount);
+ putLabeledWord("+4 increments = ", counter4);
+ putLabeledWord("+file_offset increments = ", counterF);
+#endif
+
+#ifdef DEBUG_DIRENTS
+ dump_dirents(pL);
+#endif
+
+#ifdef DEBUG_FRAGMENTS
+ dump_fragments(pL);
+#endif
+
+ /* give visual feedback that we are done scanning the flash */
+ led_blink(0x0, 0x0, 0x1, 0x1); /* off, forever, on 100ms, off 100ms */
+ free(buf);
+
+ return 1;
+}
+
+
+static u32
+jffs2_1pass_fill_info(struct b_lists * pL, struct b_jffs2_info * piL)
+{
+ struct b_node *b;
+ struct jffs2_raw_inode ojNode;
+ struct jffs2_raw_inode *jNode;
+ int i;
+
+ for (i = 0; i < JFFS2_NUM_COMPR; i++) {
+ piL->compr_info[i].num_frags = 0;
+ piL->compr_info[i].compr_sum = 0;
+ piL->compr_info[i].decompr_sum = 0;
+ }
+/* FIXME
+ b = pL->frag.listHead;
+ while (b) {
+ jNode = (struct jffs2_raw_inode *) get_fl_mem(b->offset,
+ sizeof(ojNode), &ojNode);
+ if (jNode->compr < JFFS2_NUM_COMPR) {
+ piL->compr_info[jNode->compr].num_frags++;
+ piL->compr_info[jNode->compr].compr_sum += jNode->csize;
+ piL->compr_info[jNode->compr].decompr_sum += jNode->dsize;
+ }
+ b = b->next;
+ }
+*/
+ return 0;
+}
+
+
+static struct b_lists *
+jffs2_get_list(struct part_info * part, const char *who)
+{
+ if (jffs2_1pass_rescan_needed(part)) {
+ if (!jffs2_1pass_build_lists(part)) {
+ printf("%s: Failed to scan JFFSv2 file structure\n", who);
+ return NULL;
+ }
+ }
+ return (struct b_lists *)part->jffs2_priv;
+}
+
+
+/* Print directory / file contents */
+u32
+jffs2_1pass_ls(struct part_info * part, const char *fname)
+{
+ struct b_lists *pl;
+ long ret = 0;
+ u32 inode;
+
+ if (! (pl = jffs2_get_list(part, "ls")))
+ return 0;
+
+ if (! (inode = jffs2_1pass_search_list_inodes(pl, fname, 1))) {
+ putstr("ls: Failed to scan jffs2 file structure\r\n");
+ return 0;
+ }
+
+#if 0
+ putLabeledWord("found file at inode = ", inode);
+ putLabeledWord("read_inode returns = ", ret);
+#endif
+
+ return ret;
+}
+
+
+/* Load a file from flash into memory. fname can be a full path */
+u32
+jffs2_1pass_load(char *dest, struct part_info * part, const char *fname)
+{
+
+ struct b_lists *pl;
+ long ret = 0;
+ u32 inode;
+
+ if (! (pl = jffs2_get_list(part, "load")))
+ return 0;
+
+ if (! (inode = jffs2_1pass_search_inode(pl, fname, 1))) {
+ putstr("load: Failed to find inode\r\n");
+ return 0;
+ }
+
+ /* Resolve symlinks */
+ if (! (inode = jffs2_1pass_resolve_inode(pl, inode))) {
+ putstr("load: Failed to resolve inode structure\r\n");
+ return 0;
+ }
+
+ if ((ret = jffs2_1pass_read_inode(pl, inode, dest, NULL)) < 0) {
+ putstr("load: Failed to read inode\r\n");
+ return 0;
+ }
+
+ DEBUGF ("load: loaded '%s' to 0x%lx (%ld bytes)\n", fname,
+ (unsigned long) dest, ret);
+ return ret;
+}
+
+/* Return information about the fs on this partition */
+u32
+jffs2_1pass_info(struct part_info * part)
+{
+ struct b_jffs2_info info;
+ struct b_lists *pl;
+ int i;
+
+ if (! (pl = jffs2_get_list(part, "info")))
+ return 0;
+
+ jffs2_1pass_fill_info(pl, &info);
+ for (i = 0; i < JFFS2_NUM_COMPR; i++) {
+ printf ("Compression: %s\n"
+ "\tfrag count: %d\n"
+ "\tcompressed sum: %d\n"
+ "\tuncompressed sum: %d\n",
+ compr_names[i],
+ info.compr_info[i].num_frags,
+ info.compr_info[i].compr_sum,
+ info.compr_info[i].decompr_sum);
+ }
+ return 1;
+}
+
+#endif /* CFG_CMD_JFFS2 */
diff --git a/fs/jffs2/jffs2_nand_private.h b/fs/jffs2/jffs2_nand_private.h
new file mode 100644
index 0000000000..18cca8d076
--- /dev/null
+++ b/fs/jffs2/jffs2_nand_private.h
@@ -0,0 +1,133 @@
+#ifndef jffs2_private_h
+#define jffs2_private_h
+
+#include <jffs2/jffs2.h>
+
+struct b_node {
+ struct b_node *next;
+};
+
+struct b_inode {
+ struct b_inode *next;
+ u32 offset; /* physical offset to beginning of real inode */
+ u32 version;
+ u32 ino;
+ u32 isize;
+ u32 csize;
+};
+
+struct b_dirent {
+ struct b_dirent *next;
+ u32 offset; /* physical offset to beginning of real dirent */
+ u32 version;
+ u32 pino;
+ u32 ino;
+ unsigned int nhash;
+ unsigned char nsize;
+ unsigned char type;
+};
+
+struct b_list {
+ struct b_node *listTail;
+ struct b_node *listHead;
+ unsigned int listCount;
+ struct mem_block *listMemBase;
+};
+
+struct b_lists {
+ char *partOffset;
+ struct b_list dir;
+ struct b_list frag;
+};
+
+struct b_compr_info {
+ u32 num_frags;
+ u32 compr_sum;
+ u32 decompr_sum;
+};
+
+struct b_jffs2_info {
+ struct b_compr_info compr_info[JFFS2_NUM_COMPR];
+};
+
+static inline int
+hdr_crc(struct jffs2_unknown_node *node)
+{
+#if 1
+ u32 crc = crc32_no_comp(0, (unsigned char *)node, sizeof(struct jffs2_unknown_node) - 4);
+#else
+ /* what's the semantics of this? why is this here? */
+ u32 crc = crc32_no_comp(~0, (unsigned char *)node, sizeof(struct jffs2_unknown_node) - 4);
+
+ crc ^= ~0;
+#endif
+ if (node->hdr_crc != crc) {
+ return 0;
+ } else {
+ return 1;
+ }
+}
+
+static inline int
+dirent_crc(struct jffs2_raw_dirent *node)
+{
+ if (node->node_crc != crc32_no_comp(0, (unsigned char *)node, sizeof(struct jffs2_raw_dirent) - 8)) {
+ return 0;
+ } else {
+ return 1;
+ }
+}
+
+static inline int
+dirent_name_crc(struct jffs2_raw_dirent *node)
+{
+ if (node->name_crc != crc32_no_comp(0, (unsigned char *)&(node->name), node->nsize)) {
+ return 0;
+ } else {
+ return 1;
+ }
+}
+
+static inline int
+inode_crc(struct jffs2_raw_inode *node)
+{
+ if (node->node_crc != crc32_no_comp(0, (unsigned char *)node, sizeof(struct jffs2_raw_inode) - 8)) {
+ return 0;
+ } else {
+ return 1;
+ }
+}
+
+/* Borrowed from include/linux/dcache.h */
+
+/* Name hashing routines. Initial hash value */
+/* Hash courtesy of the R5 hash in reiserfs modulo sign bits */
+#define init_name_hash() 0
+
+/* partial hash update function. Assume roughly 4 bits per character */
+static inline unsigned long
+partial_name_hash(unsigned long c, unsigned long prevhash)
+{
+ return (prevhash + (c << 4) + (c >> 4)) * 11;
+}
+
+/*
+ * Finally: cut down the number of bits to a int value (and try to avoid
+ * losing bits)
+ */
+static inline unsigned long end_name_hash(unsigned long hash)
+{
+ return (unsigned int) hash;
+}
+
+/* Compute the hash for a name string. */
+static inline unsigned int
+full_name_hash(const unsigned char *name, unsigned int len)
+{
+ unsigned long hash = init_name_hash();
+ while (len--)
+ hash = partial_name_hash(*name++, hash);
+ return end_name_hash(hash);
+}
+
+#endif /* jffs2_private.h */
diff --git a/fs/jffs2/jffs2_private.h b/fs/jffs2/jffs2_private.h
index 65ca6eb98f..46ed644e4d 100644
--- a/fs/jffs2/jffs2_private.h
+++ b/fs/jffs2/jffs2_private.h
@@ -85,4 +85,16 @@ inode_crc(struct jffs2_raw_inode *node)
}
}
+static inline int
+data_crc(struct jffs2_raw_inode *node)
+{
+ if (node->data_crc != crc32_no_comp(0, (unsigned char *)
+ ((int) &node->node_crc + sizeof (node->node_crc)),
+ node->csize)) {
+ return 0;
+ } else {
+ return 1;
+ }
+}
+
#endif /* jffs2_private.h */
diff --git a/include/405_mal.h b/include/405_mal.h
index 69d20c98ff..0598586953 100644
--- a/include/405_mal.h
+++ b/include/405_mal.h
@@ -92,11 +92,21 @@
#define MAL_ESR_PBEI 0x00000001
/* ^^ ^^ */
/* Mal IER */
+#ifdef CONFIG_440SPE
+#define MAL_IER_PT 0x00000080
+#define MAL_IER_PRE 0x00000040
+#define MAL_IER_PWE 0x00000020
+#define MAL_IER_DE 0x00000010
+#define MAL_IER_OTE 0x00000004
+#define MAL_IER_OE 0x00000002
+#define MAL_IER_PE 0x00000001
+#else
#define MAL_IER_DE 0x00000010
#define MAL_IER_NE 0x00000008
#define MAL_IER_TE 0x00000004
#define MAL_IER_OPBE 0x00000002
#define MAL_IER_PLBE 0x00000001
+#endif
/* MAL Channel Active Set and Reset Registers */
#define MAL_TXRX_CASR (0x80000000)
diff --git a/include/asm-arm/arch-arm1136/clocks.h b/include/asm-arm/arch-arm1136/clocks.h
index 2a95af1810..8e00d2e3e9 100644
--- a/include/asm-arm/arch-arm1136/clocks.h
+++ b/include/asm-arm/arch-arm1136/clocks.h
@@ -22,91 +22,30 @@
#define _OMAP24XX_CLOCKS_H_
#define COMMIT_DIVIDERS 0x1
-
#define MODE_BYPASS_FAST 0x2
#define APLL_LOCK 0xc
-#ifdef CONFIG_APTIX
-#define DPLL_LOCK 0x1 /* stay in bypass mode */
-#else
#define DPLL_LOCK 0x3 /* DPLL lock */
-#endif
+#define LDELAY 12000000
-/****************************************************************************;
-; PRCM Scheme II
-;
-; Enable clocks and DPLL for:
-; DPLL=300, DPLLout=600 M=1,N=50 CM_CLKSEL1_PLL[21:8] 12/2*50
-; Core=600 (core domain) DPLLx2 CM_CLKSEL2_PLL[1:0]
-; MPUF=300 (mpu domain) 2 CM_CLKSEL_MPU[4:0]
-; DSPF=200 (dsp domain) 3 CM_CLKSEL_DSP[4:0]
-; DSPI=100 6 CM_CLKSEL_DSP[6:5]
-; DSP_S bypass CM_CLKSEL_DSP[7]
-; IVAF=200 (dsp domain) 3 CM_CLKSEL_DSP[12:8]
-; IVAF=100 auto
-; IVAI auto
-; IVA_MPU auto
-; IVA_S bypass CM_CLKSEL_DSP[13]
-; GFXF=50 (gfx domain) 12 CM_CLKSEL_FGX[2:0]
-; SSI_SSRF=200 3 CM_CLKSEL1_CORE[24:20]
-; SSI_SSTF=100 auto
-; L3=100Mhz (sdram) 6 CM_CLKSEL1_CORE[4:0]
-; L4=100Mhz 6
-; C_L4_USB=50 12 CM_CLKSEL1_CORE[6:5]
-***************************************************************************/
-#define II_DPLL_OUT_X2 0x2 /* x2 core out */
-#define II_MPU_DIV 0x2 /* mpu = core/2 */
-#define II_DSP_DIV 0x343 /* dsp & iva divider */
-#define II_GFX_DIV 0x2
-#define II_BUS_DIV 0x04601026
-#define II_DPLL_300 0x01832100
+#if defined(CONFIG_OMAP242X)
+#include <asm/arch/clocks242x.h>
+#elif defined(CONFIG_OMAP243X)
+#include <asm/arch/clocks243x.h>
+#endif
-/****************************************************************************;
-; PRCM Scheme III
-;
-; Enable clocks and DPLL for:
-; DPLL=266, DPLLout=532 M=5+1,N=133 CM_CLKSEL1_PLL[21:8] 12/6*133=266
-; Core=532 (core domain) DPLLx2 CM_CLKSEL2_PLL[1:0]
-; MPUF=266 (mpu domain) /2 CM_CLKSEL_MPU[4:0]
-; DSPF=177.3 (dsp domain) /3 CM_CLKSEL_DSP[4:0]
-; DSPI=88.67 /6 CM_CLKSEL_DSP[6:5]
-; DSP_S ACTIVATED CM_CLKSEL_DSP[7]
-; IVAF=88.67 (dsp domain) /3 CM_CLKSEL_DSP[12:8]
-; IVAF=88.67 auto
-; IVAI auto
-; IVA_MPU auto
-; IVA_S ACTIVATED CM_CLKSEL_DSP[13]
-; GFXF=66.5 (gfx domain) /8 CM_CLKSEL_FGX[2:0]:
-; SSI_SSRF=177.3 /3 CM_CLKSEL1_CORE[24:20]
-; SSI_SSTF=88.67 auto
-; L3=133Mhz (sdram) /4 CM_CLKSEL1_CORE[4:0]
-; L4=66.5Mhz /8
-; C_L4_USB=33.25 /16 CM_CLKSEL1_CORE[6:5]
-***************************************************************************/
-#define III_DPLL_OUT_X2 0x2 /* x2 core out */
-#define III_MPU_DIV 0x2 /* mpu = core/2 */
-#define III_DSP_DIV 0x23C3 /* dsp & iva divider sych enabled*/
-#define III_GFX_DIV 0x2
-#define III_BUS_DIV 0x08301044
-#define III_DPLL_266 0x01885500
+#define S12M 12000000
+#define S13M 13000000
+#define S19_2M 19200000
+#define S24M 24000000
+#define S26M 26000000
+#define S38_4M 38400000
-/* set defaults for boot up */
-#ifdef PRCM_CONFIG_II
-# define DPLL_OUT II_DPLL_OUT_X2
-# define MPU_DIV II_MPU_DIV
-# define DSP_DIV II_DSP_DIV
-# define GFX_DIV II_GFX_DIV
-# define BUS_DIV II_BUS_DIV
-# define DPLL_VAL II_DPLL_300
-#elif PRCM_CONFIG_III
-# define DPLL_OUT III_DPLL_OUT_X2
-# define MPU_DIV III_MPU_DIV
-# define DSP_DIV III_DSP_DIV
-# define GFX_DIV III_GFX_DIV
-# define BUS_DIV III_BUS_DIV
-# define DPLL_VAL III_DPLL_266
#endif
-/* lock delay time out */
-#define LDELAY 12000000
-#endif
+
+
+
+
+
+
diff --git a/include/asm-arm/arch-arm1136/clocks242x.h b/include/asm-arm/arch-arm1136/clocks242x.h
new file mode 100644
index 0000000000..0ae1c4ea4f
--- /dev/null
+++ b/include/asm-arm/arch-arm1136/clocks242x.h
@@ -0,0 +1,147 @@
+/*
+ * (C) Copyright 2004
+ * Texas Instruments, <www.ti.com>
+ * Richard Woodruff <r-woodruff2@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR /PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#ifndef _OMAP242X_CLOCKS_H_
+#define _OMAP242X_CLOCKS_H_
+
+/****************************************************************************;
+; PRCM Scheme I
+;
+; Enable clocks and DPLL for:
+; DPLL=330, DPLLout=660 M=1,N=55 CM_CLKSEL1_PLL[21:8] 12/2*55
+; Core=660 (core domain) DPLLx2 CM_CLKSEL2_PLL[1:0]
+; MPUF=330 (mpu domain) 2 CM_CLKSEL_MPU[4:0]
+; DSPF=220 (dsp domain) 3 CM_CLKSEL_DSP[4:0]
+; DSPI=110 6 CM_CLKSEL_DSP[6:5]
+; DSP_S activated CM_CLKSEL_DSP[7]
+; IVAF=165 (dsp domain) 4 CM_CLKSEL_DSP[12:8]
+; IVAF=82.5 auto
+; IVAI auto
+; IVA_MPU auto
+; IVA_S bypass CM_CLKSEL_DSP[13]
+; GFXF=82.5 (gfx domain) 8 CM_CLKSEL_FGX[2:0]
+; SSI_SSRF=220 3 CM_CLKSEL1_CORE[24:20]
+; SSI_SSTF=110 auto
+; L3=165Mhz (sdram) 4 CM_CLKSEL1_CORE[4:0]
+; L4=82.5Mhz 8
+; C_L4_USB=41.25 16 CM_CLKSEL1_CORE[6:5]
+***************************************************************************/
+#define I_DPLL_OUT_X2 0x2 /* x2 core out */
+#define I_MPU_DIV 0x2 /* mpu = core/2 */
+#define I_DSP_DIV 0x3c3 /* dsp & iva divider */
+#define I_GFX_DIV 0x2
+#define I_BUS_DIV 0x04601044
+#ifdef INPUT_CLK_13MHZ
+#define I_DPLL_330 0x0114AC00 /* 13MHz */
+#else
+#define I_DPLL_330 0x01837100 /* 12MHz */
+#endif
+
+/****************************************************************************;
+; PRCM Scheme II <tested>
+;
+; Enable clocks and DPLL for:
+; DPLL=300, DPLLout=600 M=1,N=50 CM_CLKSEL1_PLL[21:8] 12/2*50
+; Core=600 (core domain) DPLLx2 CM_CLKSEL2_PLL[1:0]
+; MPUF=300 (mpu domain) 2 CM_CLKSEL_MPU[4:0]
+; DSPF=200 (dsp domain) 3 CM_CLKSEL_DSP[4:0]
+; DSPI=100 6 CM_CLKSEL_DSP[6:5]
+; DSP_S bypass CM_CLKSEL_DSP[7]
+; IVAF=200 (dsp domain) 3 CM_CLKSEL_DSP[12:8]
+; IVAF=100 auto
+; IVAI auto
+; IVA_MPU auto
+; IVA_S bypass CM_CLKSEL_DSP[13]
+; GFXF=50 (gfx domain) 12 CM_CLKSEL_FGX[2:0]
+; SSI_SSRF=200 3 CM_CLKSEL1_CORE[24:20]
+; SSI_SSTF=100 auto
+; L3=100Mhz (sdram) 6 CM_CLKSEL1_CORE[4:0]
+; L4=100Mhz 6
+; C_L4_USB=50 12 CM_CLKSEL1_CORE[6:5]
+***************************************************************************/
+#define II_DPLL_OUT_X2 0x2 /* x2 core out */
+#define II_MPU_DIV 0x2 /* mpu = core/2 */
+#define II_DSP_DIV 0x343 /* dsp & iva divider */
+#define II_GFX_DIV 0x2
+#define II_BUS_DIV 0x04601026
+#ifdef INPUT_CLK_13MHZ
+#define II_DPLL_300 0x0112CC00 /* 13MHz */
+#else
+#define II_DPLL_300 0x01832100 /* 12MHz */
+#endif
+
+/****************************************************************************;
+; PRCM Scheme III <tested>
+;
+; Enable clocks and DPLL for:
+; DPLL=266, DPLLout=532 M=5+1,N=133 CM_CLKSEL1_PLL[21:8] 12/6*133=266
+; Core=532 (core domain) DPLLx2 CM_CLKSEL2_PLL[1:0]
+; MPUF=266 (mpu domain) /2 CM_CLKSEL_MPU[4:0]
+; DSPF=177.3 (dsp domain) /3 CM_CLKSEL_DSP[4:0]
+; DSPI=88.67 /6 CM_CLKSEL_DSP[6:5]
+; DSP_S ACTIVATED CM_CLKSEL_DSP[7]
+; IVAF=88.67 (dsp domain) /3 CM_CLKSEL_DSP[12:8]
+; IVAF=88.67 auto
+; IVAI auto
+; IVA_MPU auto
+; IVA_S ACTIVATED CM_CLKSEL_DSP[13]
+; GFXF=66.5 (gfx domain) /8 CM_CLKSEL_FGX[2:0]:
+; SSI_SSRF=177.3 /3 CM_CLKSEL1_CORE[24:20]
+; SSI_SSTF=88.67 auto
+; L3=133Mhz (sdram) /4 CM_CLKSEL1_CORE[4:0]
+; L4=66.5Mhz /8
+; C_L4_USB=33.25 /16 CM_CLKSEL1_CORE[6:5]
+***************************************************************************/
+#define III_DPLL_OUT_X2 0x2 /* x2 core out */
+#define III_MPU_DIV 0x2 /* mpu = core/2 */
+#define III_DSP_DIV 0x23C3 /* dsp & iva divider sych enabled*/
+#define III_GFX_DIV 0x2
+#define III_BUS_DIV 0x08301044
+#ifdef INPUT_CLK_13MHZ
+#define III_DPLL_266 0x0110AC00 /* 13MHz */
+#else
+#define III_DPLL_266 0x01885500 /* 12MHz */
+#endif
+
+/* set defaults for boot up */
+#ifdef PRCM_CONFIG_I
+# define DPLL_OUT I_DPLL_OUT_X2
+# define MPU_DIV I_MPU_DIV
+# define DSP_DIV I_DSP_DIV
+# define GFX_DIV I_GFX_DIV
+# define BUS_DIV I_BUS_DIV
+# define DPLL_VAL I_DPLL_266
+#elif PRCM_CONFIG_II
+# define DPLL_OUT II_DPLL_OUT_X2
+# define MPU_DIV II_MPU_DIV
+# define DSP_DIV II_DSP_DIV
+# define GFX_DIV II_GFX_DIV
+# define BUS_DIV II_BUS_DIV
+# define DPLL_VAL II_DPLL_300
+#elif PRCM_CONFIG_III
+# define DPLL_OUT III_DPLL_OUT_X2
+# define MPU_DIV III_MPU_DIV
+# define DSP_DIV III_DSP_DIV
+# define GFX_DIV III_GFX_DIV
+# define BUS_DIV III_BUS_DIV
+# define DPLL_VAL III_DPLL_266
+#endif
+
+#endif
diff --git a/include/asm-arm/arch-arm1136/clocks243x.h b/include/asm-arm/arch-arm1136/clocks243x.h
new file mode 100644
index 0000000000..18d2e46772
--- /dev/null
+++ b/include/asm-arm/arch-arm1136/clocks243x.h
@@ -0,0 +1,223 @@
+/*
+ * (C) Copyright 2005
+ * Texas Instruments, <www.ti.com>
+ * Richard Woodruff <r-woodruff2@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR /PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#ifndef _OMAP243X_CLOCKS_H_
+#define _OMAP243X_CLOCKS_H_
+
+/* cm_clksel core fields not ratio governed */
+#define RX_CLKSEL_DSS1 (0x10 << 8)
+#define RX_CLKSEL_DSS2 (0x0 << 13)
+#define RX_CLKSEL_SSI (0x5 << 20)
+
+/* 2430 Ratio's */
+/* 2430-Ratio Config 1 */
+#define R1_CLKSEL_L3 (4 << 0)
+#define R1_CLKSEL_L4 (2 << 5)
+#define R1_CLKSEL_USB (4 << 25)
+#define R1_CM_CLKSEL1_CORE_VAL R1_CLKSEL_USB | RX_CLKSEL_SSI | RX_CLKSEL_DSS2 \
+ | RX_CLKSEL_DSS1 | R1_CLKSEL_L4 | R1_CLKSEL_L3
+#define R1_CLKSEL_MPU (2 << 0)
+#define R1_CM_CLKSEL_MPU_VAL R1_CLKSEL_MPU
+#define R1_CLKSEL_DSP (2 << 0)
+#define R1_CLKSEL_DSP_IF (2 << 5)
+#define R1_CM_CLKSEL_DSP_VAL R1_CLKSEL_DSP | R1_CLKSEL_DSP_IF
+#define R1_CLKSEL_GFX (2 << 0)
+#define R1_CM_CLKSEL_GFX_VAL R1_CLKSEL_GFX
+#define R1_CLKSEL_MDM (4 << 0)
+#define R1_CM_CLKSEL_MDM_VAL R1_CLKSEL_MDM
+
+/* 2430-Ratio Config 2 */
+#define R2_CLKSEL_L3 (6 << 0)
+#define R2_CLKSEL_L4 (2 << 5)
+#define R2_CLKSEL_USB (2 << 25)
+#define R2_CM_CLKSEL1_CORE_VAL R2_CLKSEL_USB | RX_CLKSEL_SSI | RX_CLKSEL_DSS2 \
+ | RX_CLKSEL_DSS1 | R2_CLKSEL_L4 | R2_CLKSEL_L3
+#define R2_CLKSEL_MPU (2 << 0)
+#define R2_CM_CLKSEL_MPU_VAL R2_CLKSEL_MPU
+#define R2_CLKSEL_DSP (2 << 0)
+#define R2_CLKSEL_DSP_IF (3 << 5)
+#define R2_CM_CLKSEL_DSP_VAL R2_CLKSEL_DSP | R2_CLKSEL_DSP_IF
+#define R2_CLKSEL_GFX (2 << 0)
+#define R2_CM_CLKSEL_GFX_VAL R2_CLKSEL_GFX
+#define R2_CLKSEL_MDM (6 << 0)
+#define R2_CM_CLKSEL_MDM_VAL R2_CLKSEL_MDM
+
+/* 2430-Ratio Boot */
+#define RB_CLKSEL_L3 (1 << 0)
+#define RB_CLKSEL_L4 (1 << 5)
+#define RB_CLKSEL_USB (1 << 25)
+#define RB_CM_CLKSEL1_CORE_VAL RB_CLKSEL_USB | RX_CLKSEL_SSI | RX_CLKSEL_DSS2 \
+ | RX_CLKSEL_DSS1 | RB_CLKSEL_L4 | RB_CLKSEL_L3
+#define RB_CLKSEL_MPU (1 << 0)
+#define RB_CM_CLKSEL_MPU_VAL RB_CLKSEL_MPU
+#define RB_CLKSEL_DSP (1 << 0)
+#define RB_CLKSEL_DSP_IF (1 << 5)
+#define RB_CM_CLKSEL_DSP_VAL RB_CLKSEL_DSP | RB_CLKSEL_DSP_IF
+#define RB_CLKSEL_GFX (1 << 0)
+#define RB_CM_CLKSEL_GFX_VAL RB_CLKSEL_GFX
+#define RB_CLKSEL_MDM (1 << 0)
+#define RB_CM_CLKSEL_MDM_VAL RB_CLKSEL_MDM
+
+/* 2430 Target modes: Along with each configuration the CPU has several modes
+ * which goes along with them. Modes mainly are the addition of descrite DPLL
+ * combinations to go along with a ratio.
+ */
+/* hardware goverend */
+#define MX_48M_SRC (0 << 3)
+#define MX_54M_SRC (0 << 5)
+#define MX_APLLS_CLIKIN_12 (3 << 23)
+#define MX_APLLS_CLIKIN_13 (2 << 23)
+#define MX_APLLS_CLIKIN_19_2 (0 << 23)
+
+/* 2430 - standalone, 2*ref*M/(n+1), M/N is for exactness not relock speed */
+
+/* boot (boot) */
+#define MB_DPLL_MULT (1 << 12)
+#define MB_DPLL_DIV (0 << 8)
+#define MB_CM_CLKSEL1_PLL_12_VAL MX_48M_SRC | MX_54M_SRC | MB_DPLL_DIV \
+ | MB_DPLL_MULT | MX_APLLS_CLIKIN_12
+
+#define MB_CM_CLKSEL1_PLL_13_VAL MX_48M_SRC | MX_54M_SRC | MB_DPLL_DIV \
+ | MB_DPLL_MULT | MX_APLLS_CLIKIN_13
+
+#define MB_CM_CLKSEL1_PLL_19_VAL MX_48M_SRC | MX_54M_SRC | MB_DPLL_DIV \
+ | MB_DPLL_MULT | MX_APLLS_CLIKIN_19
+
+/* #2 (ratio1) DPLL = 330*2 = 660MHz, L3=165MHz */
+
+#define M2_DPLL_MULT_12 (55 << 12)
+#define M2_DPLL_DIV_12 (1 << 8)
+#define M2_CM_CLKSEL1_PLL_12_VAL MX_48M_SRC | MX_54M_SRC | M2_DPLL_DIV_12 \
+ | M2_DPLL_MULT_12 | MX_APLLS_CLIKIN_12
+/* Use 658.7MHz instead of 660MHz for LP-Refresh M=76 N=2, relock time issue */
+#define M2_DPLL_MULT_13 (330 << 12)
+#define M2_DPLL_DIV_13 (12 << 8)
+#define M2_CM_CLKSEL1_PLL_13_VAL MX_48M_SRC | MX_54M_SRC | M2_DPLL_DIV_13 \
+ | M2_DPLL_MULT_13 | MX_APLLS_CLIKIN_13
+#define M2_DPLL_MULT_19 (275 << 12)
+#define M2_DPLL_DIV_19 (15 << 8)
+#define M2_CM_CLKSEL1_PLL_19_VAL MX_48M_SRC | MX_54M_SRC | M2_DPLL_DIV_19 \
+ | M2_DPLL_MULT_19 | MX_APLLS_CLIKIN_19_2
+
+/* #3 (ratio2) DPLL = 330*2 = 660MHz, L3=110MHz */
+#define M3_DPLL_MULT_12 (55 << 12)
+#define M3_DPLL_DIV_12 (1 << 8)
+#define M3_CM_CLKSEL1_PLL_12_VAL MX_48M_SRC | MX_54M_SRC | M3_DPLL_DIV_12 \
+ | M3_DPLL_MULT_12 | MX_APLLS_CLIKIN_12
+#define M3_DPLL_MULT_13 (330 << 12)
+#define M3_DPLL_DIV_13 (12 << 8)
+#define M3_CM_CLKSEL1_PLL_13_VAL MX_48M_SRC | MX_54M_SRC | M3_DPLL_DIV_13 \
+ | M3_DPLL_MULT_13 | MX_APLLS_CLIKIN_13
+#define M3_DPLL_MULT_19 (275 << 12)
+#define M3_DPLL_DIV_19 (15 << 8)
+#define M3_CM_CLKSEL1_PLL_19_VAL MX_48M_SRC | MX_54M_SRC | M3_DPLL_DIV_19 \
+ | M3_DPLL_MULT_19 | MX_APLLS_CLIKIN_19_2
+
+/* #4 (ratio2), DPLL = 399*2 = 798MHz, L3=133MHz*/
+#define M4_DPLL_MULT_12 (133 << 12)
+#define M4_DPLL_DIV_12 (3 << 8)
+#define M4_CM_CLKSEL1_PLL_12_VAL MX_48M_SRC | MX_54M_SRC | M4_DPLL_DIV_12 \
+ | M4_DPLL_MULT_12 | MX_APLLS_CLIKIN_12
+#define M4_DPLL_MULT_13 (399 << 12)
+#define M4_DPLL_DIV_13 (12 << 8)
+#define M4_CM_CLKSEL1_PLL_13_VAL MX_48M_SRC | MX_54M_SRC | M4_DPLL_DIV_13 \
+ | M4_DPLL_MULT_13 | MX_APLLS_CLIKIN_13
+#define M4_DPLL_MULT_19 (145 << 12)
+#define M4_DPLL_DIV_19 (6 << 8)
+#define M4_CM_CLKSEL1_PLL_19_VAL MX_48M_SRC | MX_54M_SRC | M4_DPLL_DIV_19 \
+ | M4_DPLL_MULT_19 | MX_APLLS_CLIKIN_19_2
+
+/* #5a (ratio1) baseport-target, target DPLL = 266*2 = 532MHz, L3=133MHz */
+#define M5A_DPLL_MULT_12 (133 << 12)
+#define M5A_DPLL_DIV_12 (5 << 8)
+#define M5A_CM_CLKSEL1_PLL_12_VAL MX_48M_SRC | MX_54M_SRC | M5A_DPLL_DIV_12 \
+ | M5A_DPLL_MULT_12 | MX_APLLS_CLIKIN_12
+#define M5A_DPLL_MULT_13 (266 << 12)
+#define M5A_DPLL_DIV_13 (12 << 8)
+#define M5A_CM_CLKSEL1_PLL_13_VAL MX_48M_SRC | MX_54M_SRC | M5A_DPLL_DIV_13 \
+ | M5A_DPLL_MULT_13 | MX_APLLS_CLIKIN_13
+#define M5A_DPLL_MULT_19 (180 << 12)
+#define M5A_DPLL_DIV_19 (12 << 8)
+#define M5A_CM_CLKSEL1_PLL_19_VAL MX_48M_SRC | MX_54M_SRC | M5A_DPLL_DIV_19 \
+ | M5A_DPLL_MULT_19 | MX_APLLS_CLIKIN_19_2
+
+/* #5b (ratio1) target DPLL = 200*2 = 400MHz, L3=100MHz */
+#define M5B_DPLL_MULT_12 (50 << 12)
+#define M5B_DPLL_DIV_12 (2 << 8)
+#define M5B_CM_CLKSEL1_PLL_12_VAL MX_48M_SRC | MX_54M_SRC | M5B_DPLL_DIV_12 \
+ | M5B_DPLL_MULT_12 | MX_APLLS_CLIKIN_12
+#define M5B_DPLL_MULT_13 (200 << 12)
+#define M5B_DPLL_DIV_13 (12 << 8)
+
+#define M5B_CM_CLKSEL1_PLL_13_VAL MX_48M_SRC | MX_54M_SRC | M5B_DPLL_DIV_13 \
+ | M5B_DPLL_MULT_13 | MX_APLLS_CLIKIN_13
+#define M5B_DPLL_MULT_19 (125 << 12)
+#define M5B_DPLL_DIV_19 (31 << 8)
+#define M5B_CM_CLKSEL1_PLL_19_VAL MX_48M_SRC | MX_54M_SRC | M5B_DPLL_DIV_19 \
+ | M5B_DPLL_MULT_19 | MX_APLLS_CLIKIN_19_2
+
+/* 2430 - chassis (sedna) */
+ /* 165 (ratio1) same as above #2 */
+ /* 150 (ratio1)*/
+ /* 133 (ratio2) same as above #4 */
+ /* 110 (ratio2) same as above #3*/
+ /* 104 (ratio2)*/
+ /* boot (boot) */
+
+/* high and low operation value */
+#define MX_CLKSEL2_PLL_2x_VAL (2 << 0)
+#define MX_CLKSEL2_PLL_1x_VAL (1 << 0)
+
+/* set defaults for boot up */
+#if defined(PRCM_CONFIG_2) /* ARM-330MHz IVA2-330MHz L3-165MHz */
+# define DPLL_OUT MX_CLKSEL2_PLL_2x_VAL
+# define MPU_DIV R1_CLKSEL_MPU
+# define DSP_DIV R1_CM_CLKSEL_DSP_VAL
+# define GFX_DIV R1_CM_CLKSEL_GFX_VAL
+# define BUS_DIV R1_CM_CLKSEL1_CORE_VAL
+# define DPLL_VAL M2_CM_CLKSEL1_PLL_13_VAL
+# define MDM_DIV R2_CM_CLKSEL_MDM_VAL
+#elif defined(PRCM_CONFIG_3) /* ARM-330MHz IVA2-330MHz L3-110MHz */
+# define DPLL_OUT MX_CLKSEL2_PLL_2x_VAL
+# define MPU_DIV R2_CLKSEL_MPU
+# define DSP_DIV R2_CM_CLKSEL_DSP_VAL
+# define GFX_DIV R2_CM_CLKSEL_GFX_VAL
+# define BUS_DIV R2_CM_CLKSEL1_CORE_VAL
+# define DPLL_VAL M3_CM_CLKSEL1_PLL_13_VAL
+# define MDM_DIV R2_CM_CLKSEL_MDM_VAL
+#elif defined(PRCM_CONFIG_5A) /* ARM-266MHz IVA2-266MHz L3-133MHz */
+# define DPLL_OUT MX_CLKSEL2_PLL_2x_VAL
+# define MPU_DIV R1_CLKSEL_MPU
+# define DSP_DIV R1_CM_CLKSEL_DSP_VAL
+# define GFX_DIV R1_CM_CLKSEL_GFX_VAL
+# define BUS_DIV R1_CM_CLKSEL1_CORE_VAL
+# define DPLL_VAL M5A_CM_CLKSEL1_PLL_13_VAL
+# define MDM_DIV R2_CM_CLKSEL_MDM_VAL
+#elif defined(PRCM_CONFIG_5B) /* ARM-200MHz IVA2-200MHz L3-100MHz */
+# define DPLL_OUT MX_CLKSEL2_PLL_2x_VAL
+# define MPU_DIV R1_CLKSEL_MPU
+# define DSP_DIV R1_CM_CLKSEL_DSP_VAL
+# define GFX_DIV R1_CM_CLKSEL_GFX_VAL
+# define BUS_DIV R1_CM_CLKSEL1_CORE_VAL
+# define DPLL_VAL M5B_CM_CLKSEL1_PLL_13_VAL
+# define MDM_DIV R1_CM_CLKSEL_MDM_VAL
+#endif
+
+#endif
diff --git a/include/asm-arm/arch-arm1136/cpu.h b/include/asm-arm/arch-arm1136/cpu.h
new file mode 100644
index 0000000000..ff17cbccb5
--- /dev/null
+++ b/include/asm-arm/arch-arm1136/cpu.h
@@ -0,0 +1,188 @@
+/*
+ * (C) Copyright 2005
+ * Texas Instruments, <www.ti.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#ifndef _OMAP24XX_CPU_H
+#define _OMAP24XX_CPU_H
+/* CPU Specific Headers */
+#ifdef CONFIG_OMAP242X
+#include <asm/arch/omap2420.h>
+#endif
+#ifdef CONFIG_OMAP243X
+#include <asm/arch/omap2430.h>
+#endif
+
+/* Register offsets of common modules */
+/* Control */
+#define CONTROL_STATUS (OMAP24XX_CTRL_BASE + 0x2F8)
+#define OMAP24XX_MCR (OMAP24XX_CTRL_BASE + 0x8C)
+
+/* Tap Information */
+#define TAP_IDCODE_REG (OMAP24XX_TAP_BASE+0x204)
+#define PRODUCTION_ID (OMAP24XX_TAP_BASE+0x208)
+
+/* device type */
+#define DEVICE_MASK (BIT8|BIT9|BIT10)
+#define TST_DEVICE 0x0
+#define EMU_DEVICE 0x1
+#define HS_DEVICE 0x2
+#define GP_DEVICE 0x3
+
+/* GPMC CS3/cs4/cs6 not avaliable */
+#define GPMC_SYSCONFIG (OMAP24XX_GPMC_BASE+0x10)
+#define GPMC_IRQENABLE (OMAP24XX_GPMC_BASE+0x1C)
+#define GPMC_TIMEOUT_CONTROL (OMAP24XX_GPMC_BASE+0x40)
+#define GPMC_CONFIG (OMAP24XX_GPMC_BASE+0x50)
+
+#define GPMC_CONFIG_CS0 (OMAP24XX_GPMC_BASE+0x60)
+#define GPMC_CONFIG_WIDTH (0x30)
+
+#define GPMC_CONFIG1 (0x00)
+#define GPMC_CONFIG2 (0x04)
+#define GPMC_CONFIG3 (0x08)
+#define GPMC_CONFIG4 (0x0C)
+#define GPMC_CONFIG5 (0x10)
+#define GPMC_CONFIG6 (0x14)
+#define GPMC_CONFIG7 (0x18)
+#define GPMC_NAND_CMD (0x1C)
+#define GPMC_NAND_ADR (0x20)
+#define GPMC_NAND_DAT (0x24)
+
+/* GPMC Mapping */
+# define FLASH_BASE 0x04000000 /* NOR flash (64 Meg aligned) */
+# define DEBUG_BASE 0x08000000 /* debug board */
+# define NAND_BASE 0x0C000000 /* NAND flash */
+# define SIBLEY_MAP1 0x10000000 /* Sibley1 flash */
+# define SIBLEY_MAP2 0x14000000 /* Sibley2 flash */
+# define PCMCIA_BASE 0x18000000 /* PCMCIA region */
+# define ONENAND_MAP 0x20000000 /* OneNand flash */
+
+/* SMS */
+#define SMS_SYSCONFIG (OMAP24XX_SMS_BASE+0x10)
+#define SMS_CLASS_ARB0 (OMAP24XX_SMS_BASE+0xD0)
+#define BURSTCOMPLETE_GROUP7 BIT31
+
+/* SDRC */
+#define SDRC_SYSCONFIG (OMAP24XX_SDRC_BASE+0x10)
+#define SDRC_STATUS (OMAP24XX_SDRC_BASE+0x14)
+#define SDRC_CS_CFG (OMAP24XX_SDRC_BASE+0x40)
+#define SDRC_SHARING (OMAP24XX_SDRC_BASE+0x44)
+#define SDRC_DLLA_CTRL (OMAP24XX_SDRC_BASE+0x60)
+#define SDRC_DLLA_STATUS (OMAP24XX_SDRC_BASE+0x64)
+#define SDRC_DLLB_CTRL (OMAP24XX_SDRC_BASE+0x68)
+#define SDRC_DLLB_STATUS (OMAP24XX_SDRC_BASE+0x6C)
+#define DLLPHASE BIT1
+#define LOADDLL BIT2
+#define DLL_DELAY_MASK 0xFF00
+#define DLL_NO_FILTER_MASK (BIT8|BIT9)
+
+#define SDRC_POWER (OMAP24XX_SDRC_BASE+0x70)
+#define SDRC_MCFG_0 (OMAP24XX_SDRC_BASE+0x80)
+#define SDRC_MR_0 (OMAP24XX_SDRC_BASE+0x84)
+#define SDRC_ACTIM_CTRLA_0 (OMAP24XX_SDRC_BASE+0x9C)
+#define SDRC_ACTIM_CTRLB_0 (OMAP24XX_SDRC_BASE+0xA0)
+#define SDRC_ACTIM_CTRLA_1 (OMAP24XX_SDRC_BASE+0xC4)
+#define SDRC_ACTIM_CTRLB_1 (OMAP24XX_SDRC_BASE+0xC8)
+#define SDRC_RFR_CTRL (OMAP24XX_SDRC_BASE+0xA4)
+#define SDRC_MANUAL_0 (OMAP24XX_SDRC_BASE+0xA8)
+#define OMAP24XX_SDRC_CS0 0x80000000
+#define OMAP24XX_SDRC_CS1 0xA0000000
+#define CMD_NOP 0x0
+#define CMD_PRECHARGE 0x1
+#define CMD_AUTOREFRESH 0x2
+#define CMD_ENTR_PWRDOWN 0x3
+#define CMD_EXIT_PWRDOWN 0x4
+#define CMD_ENTR_SRFRSH 0x5
+#define CMD_CKE_HIGH 0x6
+#define CMD_CKE_LOW 0x7
+#define SOFTRESET BIT1
+#define SMART_IDLE (0x2 << 3)
+#define REF_ON_IDLE (0x1 << 6)
+
+/* timer regs offsets (32 bit regs) */
+#define TIDR 0x0 /* r */
+#define TIOCP_CFG 0x10 /* rw */
+#define TISTAT 0x14 /* r */
+#define TISR 0x18 /* rw */
+#define TIER 0x1C /* rw */
+#define TWER 0x20 /* rw */
+#define TCLR 0x24 /* rw */
+#define TCRR 0x28 /* rw */
+#define TLDR 0x2C /* rw */
+#define TTGR 0x30 /* rw */
+#define TWPS 0x34 /* r */
+#define TMAR 0x38 /* rw */
+#define TCAR1 0x3c /* r */
+#define TSICR 0x40 /* rw */
+#define TCAR2 0x44 /* r */
+
+/* Watchdog */
+#define WWPS 0x34 /* r */
+#define WSPR 0x48 /* rw */
+#define WD_UNLOCK1 0xAAAA
+#define WD_UNLOCK2 0x5555
+
+/* PRCM */
+#define PRCM_CLKSRC_CTRL (OMAP24XX_CM_BASE+0x060)
+#define PRCM_CLKOUT_CTRL (OMAP24XX_CM_BASE+0x070)
+#define PRCM_CLKEMUL_CTRL (OMAP24XX_CM_BASE+0x078)
+#define PRCM_CLKCFG_CTRL (OMAP24XX_CM_BASE+0x080)
+#define PRCM_CLKCFG_STATUS (OMAP24XX_CM_BASE+0x084)
+#define CM_CLKSEL_MPU (OMAP24XX_CM_BASE+0x140)
+#define RM_RSTST_MPU (OMAP24XX_CM_BASE+0x158)
+#define CM_FCLKEN1_CORE (OMAP24XX_CM_BASE+0x200)
+#define CM_FCLKEN2_CORE (OMAP24XX_CM_BASE+0x204)
+#define CM_ICLKEN1_CORE (OMAP24XX_CM_BASE+0x210)
+#define CM_ICLKEN2_CORE (OMAP24XX_CM_BASE+0x214)
+#define CM_CLKSEL1_CORE (OMAP24XX_CM_BASE+0x240)
+#define CM_CLKSEL_WKUP (OMAP24XX_CM_BASE+0x440)
+#define CM_CLKSEL2_CORE (OMAP24XX_CM_BASE+0x244)
+#define CM_FCLKEN_GFX (OMAP24XX_CM_BASE+0x300)
+#define CM_ICLKEN_GFX (OMAP24XX_CM_BASE+0x310)
+#define CM_CLKSEL_GFX (OMAP24XX_CM_BASE+0x340)
+#define RM_RSTCTRL_GFX (OMAP24XX_CM_BASE+0x350)
+#define CM_FCLKEN_WKUP (OMAP24XX_CM_BASE+0x400)
+#define CM_ICLKEN_WKUP (OMAP24XX_CM_BASE+0x410)
+#define CM_CLKSEL_WKUP (OMAP24XX_CM_BASE+0x440)
+#define PM_RSTCTRL_WKUP (OMAP24XX_CM_BASE+0x450)
+#define CM_CLKEN_PLL (OMAP24XX_CM_BASE+0x500)
+#define CM_IDLEST_CKGEN (OMAP24XX_CM_BASE+0x520)
+#define CM_CLKSEL1_PLL (OMAP24XX_CM_BASE+0x540)
+#define CM_CLKSEL2_PLL (OMAP24XX_CM_BASE+0x544)
+#define CM_CLKSEL_DSP (OMAP24XX_CM_BASE+0x840)
+#define CM_CLKSEL_MDM (OMAP24XX_CM_BASE+0xC40)
+
+/* SMX-APE */
+#define PM_RT_APE_BASE_ADDR_ARM (SMX_APE_BASE + 0x10000)
+#define PM_GPMC_BASE_ADDR_ARM (SMX_APE_BASE + 0x12400)
+#define PM_OCM_RAM_BASE_ADDR_ARM (SMX_APE_BASE + 0x12800)
+#define PM_OCM_ROM_BASE_ADDR_ARM (SMX_APE_BASE + 0x12C00)
+
+/* IVA2 */
+#define PM_IVA2_BASE_ADDR_ARM (SMX_APE_BASE + 0x14000)
+
+/* I2C base */
+#define I2C_BASE1 (OMAP24XX_L4_IO_BASE + 0x70000)
+#define I2C_BASE2 (OMAP24XX_L4_IO_BASE + 0x72000)
+
+#endif
diff --git a/include/asm-arm/arch-arm1136/i2c.h b/include/asm-arm/arch-arm1136/i2c.h
index 7248950e52..a71bd7d2e5 100644
--- a/include/asm-arm/arch-arm1136/i2c.h
+++ b/include/asm-arm/arch-arm1136/i2c.h
@@ -23,24 +23,26 @@
#ifndef _OMAP24XX_I2C_H_
#define _OMAP24XX_I2C_H_
-#define I2C_BASE 0x48070000
-#define I2C_BASE2 0x48072000 /* nothing hooked up on h4 */
-
-#define I2C_REV (I2C_BASE + 0x00)
-#define I2C_IE (I2C_BASE + 0x04)
-#define I2C_STAT (I2C_BASE + 0x08)
-#define I2C_IV (I2C_BASE + 0x0c)
-#define I2C_BUF (I2C_BASE + 0x14)
-#define I2C_CNT (I2C_BASE + 0x18)
-#define I2C_DATA (I2C_BASE + 0x1c)
-#define I2C_SYSC (I2C_BASE + 0x20)
-#define I2C_CON (I2C_BASE + 0x24)
-#define I2C_OA (I2C_BASE + 0x28)
-#define I2C_SA (I2C_BASE + 0x2c)
-#define I2C_PSC (I2C_BASE + 0x30)
-#define I2C_SCLL (I2C_BASE + 0x34)
-#define I2C_SCLH (I2C_BASE + 0x38)
-#define I2C_SYSTEST (I2C_BASE + 0x3c)
+/* Get the i2c base addresses */
+#include <asm/arch/cpu.h>
+
+#define I2C_DEFAULT_BASE I2C_BASE1
+
+#define I2C_REV (0x00)
+#define I2C_IE (0x04)
+#define I2C_STAT (0x08)
+#define I2C_IV (0x0c)
+#define I2C_BUF (0x14)
+#define I2C_CNT (0x18)
+#define I2C_DATA (0x1c)
+#define I2C_SYSC (0x20)
+#define I2C_CON (0x24)
+#define I2C_OA (0x28)
+#define I2C_SA (0x2c)
+#define I2C_PSC (0x30)
+#define I2C_SCLL (0x34)
+#define I2C_SCLH (0x38)
+#define I2C_SYSTEST (0x3c)
/* I2C masks */
@@ -104,4 +106,37 @@
#define I2C_SYSTEST_SDA_I (1 << 1) /* SDA line sense input value */
#define I2C_SYSTEST_SDA_O (1 << 0) /* SDA line drive output value */
+#define I2C_SCLL_SCLL (0)
+#define I2C_SCLL_SCLL_M (0xFF)
+#define I2C_SCLL_HSSCLL (8)
+#define I2C_SCLH_HSSCLL_M (0xFF)
+#define I2C_SCLH_SCLH (0)
+#define I2C_SCLH_SCLH_M (0xFF)
+#define I2C_SCLH_HSSCLH (8)
+#define I2C_SCLH_HSSCLH_M (0xFF)
+
+#define OMAP_I2C_STANDARD 100
+#define OMAP_I2C_FAST_MODE 400
+#define OMAP_I2C_HIGH_SPEED 3400
+
+#define SYSTEM_CLOCK_12 12000
+#define SYSTEM_CLOCK_13 13000
+#define SYSTEM_CLOCK_192 19200
+#define SYSTEM_CLOCK_96 96000
+
+#ifdef CONFIG_OMAP243X
+#define I2C_IP_CLK SYSTEM_CLOCK_96
+#define I2C_PSC_MAX (0x0f)
+#define I2C_PSC_MIN (0x00)
+#else
+/* 242x */
+#ifdef INPUT_CLK_13MHZ
+#define I2C_IP_CLK SYSTEM_CLOCK_13
+#else
+#define I2C_IP_CLK SYSTEM_CLOCK_12
+#endif
+#define I2C_PSC_MAX (0xff)
+#define I2C_PSC_MIN (0x00)
+#endif
+
#endif
diff --git a/include/asm-arm/arch-arm1136/mem.h b/include/asm-arm/arch-arm1136/mem.h
index c81f1c4370..2a3da73608 100644
--- a/include/asm-arm/arch-arm1136/mem.h
+++ b/include/asm-arm/arch-arm1136/mem.h
@@ -1,5 +1,6 @@
+
/*
- * (C) Copyright 2004
+ * (C) Copyright 2004-2005
* Texas Instruments, <www.ti.com>
* Richard Woodruff <r-woodruff2@ti.com>
*
@@ -13,7 +14,7 @@
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
@@ -25,8 +26,8 @@
#ifndef _OMAP24XX_MEM_H_
#define _OMAP24XX_MEM_H_
-#define SDRC_CS0_OSET 0x0
-#define SDRC_CS1_OSET 0x30 /* mirror CS1 regs appear offset 0x30 from CS0 */
+#define SDRC_CS0_OSET 0x0
+#define SDRC_CS1_OSET 0x30 /* mirror CS1 regs appear offset 0x30 from CS0 */
#ifndef __ASSEMBLY__
/* struct's for holding data tables for current boards, they are getting used
@@ -48,109 +49,335 @@ typedef enum {
STACKED = 0,
IP_DDR = 1,
COMBO_DDR = 2,
- IP_SDR = 3,
+ IP_SDR = 3,
} mem_t;
#endif
+/* set the 243x-SDRC incoming address convention */
+#if defined(SDRC_B_R_C)
+#define B_ALL (0 << 6) /* bank-row-column */
+#elif defined(SDRC_B1_R_B0_C)
+#define B_ALL (1 << 6) /* bank1-row-bank0-column */
+#elif defined(SDRC_R_B_C)
+#define B_ALL (2 << 6) /* row-bank-column */
+#endif
+
/* Slower full frequency range default timings for x32 operation*/
#define H4_2420_SDRC_SHARING 0x00000100
#define H4_2420_SDRC_MDCFG_0_SDR 0x00D04010 /* discrete sdr module */
#define H4_2420_SDRC_MR_0_SDR 0x00000031
#define H4_2420_SDRC_MDCFG_0_DDR 0x01702011 /* descrite ddr module */
+#define SDP_2430_SDRC_MDCFG_0_DDR (0x02584019|B_ALL) /* Infin ddr module */
#define H4_2420_COMBO_MDCFG_0_DDR 0x00801011 /* combo module */
#define H4_2420_SDRC_MR_0_DDR 0x00000032
#define H4_2422_SDRC_SHARING 0x00004b00
-#define H4_2422_SDRC_MDCFG_0_DDR 0x00801011 /* stacked ddr on 2422 */
+#define H4_2422_SDRC_MDCFG_MONO_DDR 0x01A02011 /* stacked mono die ddr on 2422 */
+#define H4_2422_SDRC_MDCFG_0_DDR 0x00801011 /* stacked dual die ddr on 2422 */
#define H4_2422_SDRC_MR_0_DDR 0x00000032
+#define H4_2423_SDRC_SHARING 0x00004900 /* 2420POP board cke1 not connected */
+#define H4_2423_SDRC_MDCFG_0_DDR 0x01A02011 /* stacked dual die ddr on 2423 */
+#define H4_2423_SDRC_MDCFG_1_DDR 0x00801011 /* stacked dual die ddr on 2423 */
+
/* ES1 work around timings */
#define H4_242x_SDRC_ACTIM_CTRLA_0_ES1 0x9bead909 /* 165Mhz for use with 100/133 */
-#define H4_242x_SDRC_ACTIM_CTRLB_0_ES1 0x00000020
-#define H4_242x_SDRC_RFR_CTRL_ES1 0x00002401 /* use over refresh for ES1 */
+#define H4_242x_SDRC_ACTIM_CTRLB_0_ES1 0x00000020
+#define H4_242x_SDRC_RFR_CTRL_ES1 0x00002401 /* use over refresh for ES1 */
/* optimized timings good for current shipping parts */
-#define H4_242X_SDRC_ACTIM_CTRLA_0_100MHz 0x5A59B485
-#define H4_242X_SDRC_ACTIM_CTRLB_0_100MHz 0x0000000e
-#define H4_242X_SDRC_ACTIM_CTRLA_0_133MHz 0x8BA6E6C8 /* temp warn 0 settings */
-#define H4_242X_SDRC_ACTIM_CTRLB_0_133MHz 0x00000010 /* temp warn 0 settings */
-#define H4_242X_SDRC_RFR_CTRL_100MHz 0x0002da01
-#define H4_242X_SDRC_RFR_CTRL_133MHz 0x0003de01
-#define H4_242x_SDRC_DLLAB_CTRL_100MHz 0x0000980E /* 72deg, allow DPLLout*1 to work (combo)*/
-#define H4_242x_SDRC_DLLAB_CTRL_133MHz 0x0000690E /* 72deg, for ES2 */
-
-#ifdef PRCM_CONFIG_II
-# define H4_2420_SDRC_ACTIM_CTRLA_0 H4_242X_SDRC_ACTIM_CTRLA_0_100MHz
-# define H4_2420_SDRC_ACTIM_CTRLB_0 H4_242X_SDRC_ACTIM_CTRLB_0_100MHz
-# define H4_2420_SDRC_RFR_CTRL H4_242X_SDRC_RFR_CTRL_100MHz
-# define H4_2420_SDRC_DLLAB_CTRL H4_242x_SDRC_DLLAB_CTRL_100MHz
-# define H4_2422_SDRC_ACTIM_CTRLA_0 H4_242X_SDRC_ACTIM_CTRLA_0_100MHz
-# define H4_2422_SDRC_ACTIM_CTRLB_0 H4_242X_SDRC_ACTIM_CTRLB_0_100MHz
-# define H4_2422_SDRC_RFR_CTRL H4_242X_SDRC_RFR_CTRL_100MHz
-# define H4_2422_SDRC_DLLAB_CTRL H4_242x_SDRC_DLLAB_CTRL_100MHz
-#elif PRCM_CONFIG_III
-# define H4_2420_SDRC_ACTIM_CTRLA_0 H4_242X_SDRC_ACTIM_CTRLA_0_133MHz
-# define H4_2420_SDRC_ACTIM_CTRLB_0 H4_242X_SDRC_ACTIM_CTRLB_0_133MHz
-# define H4_2420_SDRC_RFR_CTRL H4_242X_SDRC_RFR_CTRL_133MHz
-# define H4_2420_SDRC_DLLAB_CTRL H4_242x_SDRC_DLLAB_CTRL_133MHz
-# define H4_2422_SDRC_ACTIM_CTRLA_0 H4_242X_SDRC_ACTIM_CTRLA_0_100MHz
-# define H4_2422_SDRC_ACTIM_CTRLB_0 H4_242X_SDRC_ACTIM_CTRLB_0_100MHz
-# define H4_2422_SDRC_RFR_CTRL H4_242X_SDRC_RFR_CTRL_100MHz
-# define H4_2422_SDRC_DLLAB_CTRL H4_242x_SDRC_DLLAB_CTRL_100MHz
+#define H4_242X_SDRC_ACTIM_CTRLA_0_100MHz 0x5A59B485
+#define H4_242X_SDRC_ACTIM_CTRLB_0_100MHz 0x0000000e
+#define H4_242X_SDRC_ACTIM_CTRLA_0_133MHz 0x8BA6E6C8 /* temp warn 0 settings */
+#define H4_242X_SDRC_ACTIM_CTRLB_0_133MHz 0x00000010 /* temp warn 0 settings */
+#define H4_242X_SDRC_RFR_CTRL_100MHz 0x0002da01
+#define H4_242X_SDRC_RFR_CTRL_133MHz 0x0003de01 /* 7.8us/7.5ns - 50 = 0x3de */
+#define SDP_24XX_SDRC_RFR_CTRL_165MHz 0x0004e201 /* 7.8us/6ns - 50 = 0x4e2 */
+#define H4_242X_SDRC_DLLAB_CTRL_100MHz 0x0000980E /* 90deg, allow DPLLout*1 to work (combo)*/
+#define H4_242X_SDRC_DLLAB_CTRL_133MHz 0x0000690E /* 90deg, for ES2 */
+#define SDP_24XX_SDRC_DLLAB_CTRL_165MHz 0x0000170C /* 72deg, code will recalc dll load */
+
+/* Infineon part of 2430SDP (133MHz optimized) ~ 7.5ns
+ * TDAL = Twr/Tck + Trp/tck = 15/7.5 + 22.5/7.5 = 2 + 3 = 5
+ * TDPL = 15/7.5 = 2
+ * TRRD = 15/2.5 = 2
+ * TRCD = 22.5/7.5 = 3
+ * TRP = 22.5/7.5 = 3
+ * TRAS = 45/7.5 = 6
+ * TRC = 65/7.5 = 8.6->9
+ * TRFC = 75/7.5 = 10
+ * ACTIMB
+ * TCKE = 2 <new in 2430>
+ * XSR = 120/7.5 = 16
+ */
+#define TDAL_133 5
+#define TDPL_133 2
+#define TRRD_133 2
+#define TRCD_133 3
+#define TRP_133 3
+#define TRAS_133 6
+#define TRC_133 9
+#define TRFC_133 10
+#define V_ACTIMA_133 ((TRFC_133 << 27) | (TRC_133 << 22) | (TRAS_133 << 18) |(TRP_133 << 15) | \
+ (TRCD_133 << 12) |(TRRD_133 << 9) |(TDPL_133 << 6) | (TDAL_133))
+
+#define TCKE_133 2
+#define XSR_133 16
+#define V_ACTIMB_133 ((TCKE_133 << 12) | (XSR_133 << 0))
+
+/* Infineon part of 2430SDP (165MHz optimized) 6.06ns
+ * ACTIMA
+ * TDAL = Twr/Tck + Trp/tck = 15/6 + 18/6 = 2.5 + 3 = 5.5 -> 6
+ * TDPL (Twr) = 15/6 = 2.5 -> 3
+ * TRRD = 12/6 = 2
+ * TRCD = 18/6 = 3
+ * TRP = 18/6 = 3
+ * TRAS = 42/6 = 7
+ * TRC = 60/6 = 10
+ * TRFC = 72/6 = 12
+ * ACTIMB
+ * TCKE = 2 <new in 2430>
+ * XSR = 120/6 = 20
+ */
+#define TDAL_165 6
+#define TDPL_165 3
+#define TRRD_165 2
+#define TRCD_165 3
+#define TRP_165 3
+#define TRAS_165 7
+#define TRC_165 10
+#define TRFC_165 12
+#define V_ACTIMA_165 ((TRFC_165 << 27) | (TRC_165 << 22) | (TRAS_165 << 18) |(TRP_165 << 15) | \
+ (TRCD_165 << 12) |(TRRD_165 << 9) |(TDPL_165 << 6) | (TDAL_165))
+
+#define TCKE_165 2
+#define XSR_165 20
+#define V_ACTIMB_165 ((TCKE_165 << 12) | (XSR_165 << 0))
+
+#if defined(PRCM_CONFIG_II) || defined(PRCM_CONFIG_5B)
+# define H4_2420_SDRC_ACTIM_CTRLA_0 H4_242X_SDRC_ACTIM_CTRLA_0_100MHz
+# define SDP_2430_SDRC_ACTIM_CTRLA_0 V_ACTIMA_133
+# define H4_2420_SDRC_ACTIM_CTRLB_0 H4_242X_SDRC_ACTIM_CTRLB_0_100MHz
+# define H4_2420_SDRC_RFR_CTRL H4_242X_SDRC_RFR_CTRL_100MHz
+# define H4_2420_SDRC_DLLAB_CTRL H4_242X_SDRC_DLLAB_CTRL_100MHz
+# define SDP_2430_SDRC_DLLAB_CTRL 0x0000730E
+# define H4_2422_SDRC_ACTIM_CTRLA_0 H4_242X_SDRC_ACTIM_CTRLA_0_100MHz
+# define H4_2422_SDRC_ACTIM_CTRLB_0 H4_242X_SDRC_ACTIM_CTRLB_0_100MHz
+# define H4_2422_SDRC_RFR_CTRL H4_242X_SDRC_RFR_CTRL_100MHz
+# define H4_2422_SDRC_DLLAB_CTRL H4_242X_SDRC_DLLAB_CTRL_100MHz
+#elif defined(PRCM_CONFIG_III) || defined(PRCM_CONFIG_5A) || defined(PRCM_CONFIG_3)
+# define H4_2420_SDRC_ACTIM_CTRLA_0 H4_242X_SDRC_ACTIM_CTRLA_0_133MHz
+# define SDP_2430_SDRC_ACTIM_CTRLA_0 V_ACTIMA_133
+# define H4_2420_SDRC_ACTIM_CTRLB_0 H4_242X_SDRC_ACTIM_CTRLB_0_133MHz
+# define H4_2420_SDRC_RFR_CTRL H4_242X_SDRC_RFR_CTRL_133MHz
+# define H4_2420_SDRC_DLLAB_CTRL H4_242X_SDRC_DLLAB_CTRL_133MHz
+# define SDP_2430_SDRC_DLLAB_CTRL 0x0000730E
+# define H4_2422_SDRC_ACTIM_CTRLA_0 H4_242X_SDRC_ACTIM_CTRLA_0_133MHz
+# define H4_2422_SDRC_ACTIM_CTRLB_0 H4_242X_SDRC_ACTIM_CTRLB_0_133MHz
+# define H4_2422_SDRC_RFR_CTRL H4_242X_SDRC_RFR_CTRL_133MHz
+# define H4_2422_SDRC_DLLAB_CTRL H4_242X_SDRC_DLLAB_CTRL_133MHz
+#elif defined(PRCM_CONFIG_I) || defined(PRCM_CONFIG_2)
+# define H4_2420_SDRC_ACTIM_CTRLA_0 V_ACTIMA_165
+# define SDP_2430_SDRC_ACTIM_CTRLA_0 V_ACTIMA_165
+# define H4_2420_SDRC_ACTIM_CTRLB_0 V_ACTIMB_165
+# define H4_2420_SDRC_RFR_CTRL SDP_24XX_SDRC_RFR_CTRL_165MHz
+# define H4_2420_SDRC_DLLAB_CTRL SDP_24XX_SDRC_DLLAB_CTRL_165MHz
+# define SDP_2430_SDRC_DLLAB_CTRL SDP_24XX_SDRC_DLLAB_CTRL_165MHz
+# define H4_2422_SDRC_ACTIM_CTRLA_0 V_ACTIMA_165
+# define H4_2422_SDRC_ACTIM_CTRLB_0 V_ACTIMB_165
+# define H4_2422_SDRC_RFR_CTRL SDP_24XX_SDRC_RFR_CTRL_165MHz
+# define H4_2422_SDRC_DLLAB_CTRL SDP_24XX_SDRC_DLLAB_CTRL_165MHz
#endif
+/*
+ * GPMC settings -
+ * Definitions is as per the following format
+ * # define <PART>_GPMC_CONFIG<x> <value>
+ * Where:
+ * PART is the part name e.g. STNOR - Intel Strata Flash
+ * x is GPMC config registers from 1 to 6 (there will be 6 macros)
+ * Value is corresponding value
+ *
+ * For every valid PRCM configuration there should be only one definition of the same.
+ * if values are independent of the board, this definition will be present in this file
+ * if values are dependent on the board, then this should go into corresponding mem-boardName.h file
+ *
+ * Currently valid part Names are (PART):
+ * STNOR - Intel Strata Flash
+ * SMNAND - Samsung NAND
+ * MPDB - H4 MPDB board
+ * SBNOR - Sibley NOR
+ * ONNAND - Samsung One NAND
+ *
+ * include/configs/file.h contains the following defn - for all CS we are interested
+ * #define OMAP24XX_GPMC_CSx PART
+ * #define OMAP24XX_GPMC_CSx_SIZE Size
+ * #define OMAP24XX_GPMC_CSx_MAP Map
+ * Where:
+ * x - CS number
+ * PART - Part Name as defined above
+ * SIZE - how big is the mapping to be
+ * GPMC_SIZE_128M - 0x8
+ * GPMC_SIZE_64M - 0xC
+ * GPMC_SIZE_32M - 0xE
+ * GPMC_SIZE_16M - 0xF
+ * MAP - Map this CS to which address(GPMC address space)- Absolute address
+ * >>24 before being used.
+ */
+
+#define GPMC_SIZE_256M 0x0
+#define GPMC_SIZE_128M 0x8
+#define GPMC_SIZE_64M 0xC
+#define GPMC_SIZE_32M 0xE
+#define GPMC_SIZE_16M 0xF
+
+#if defined(PRCM_CONFIG_II) || defined(PRCM_CONFIG_5B) /* L3 at 100MHz */
+# define SMNAND_GPMC_CONFIG1 0x0
+# define SMNAND_GPMC_CONFIG2 0x00141400
+# define SMNAND_GPMC_CONFIG3 0x00141400
+# define SMNAND_GPMC_CONFIG4 0x0F010F01
+# define SMNAND_GPMC_CONFIG5 0x010C1414
+# define SMNAND_GPMC_CONFIG6 0x00000A80
+# define STNOR_GPMC_CONFIG1 0x3
+# define STNOR_GPMC_CONFIG2 0x000f0f01
+# define STNOR_GPMC_CONFIG3 0x00050502
+# define STNOR_GPMC_CONFIG4 0x0C060C06
+# define STNOR_GPMC_CONFIG5 0x01131F1F
+# define STNOR_GPMC_CONFIG6 0x0 /* 0? Not defined so far... this value is reset val as per gpmc doc */
+# define MPDB_GPMC_CONFIG1 0x00011000
+# define MPDB_GPMC_CONFIG2 0x001F1F00
+# define MPDB_GPMC_CONFIG3 0x00080802
+# define MPDB_GPMC_CONFIG4 0x1C091C09
+# define MPDB_GPMC_CONFIG5 0x031A1F1F
+# define MPDB_GPMC_CONFIG6 0x000003C2
+#endif
+
+#if defined(PRCM_CONFIG_III) || defined(PRCM_CONFIG_5A) || defined(PRCM_CONFIG_3) /* L3 at 133MHz */
+# define SMNAND_GPMC_CONFIG1 0x00001800
+# define SMNAND_GPMC_CONFIG2 0x00141400
+# define SMNAND_GPMC_CONFIG3 0x00141400
+# define SMNAND_GPMC_CONFIG4 0x0F010F01
+# define SMNAND_GPMC_CONFIG5 0x010C1414
+# define SMNAND_GPMC_CONFIG6 0x00000A80
+# define SMNAND_GPMC_CONFIG7 0x00000C44
+
+# define STNOR_GPMC_CONFIG1 0x3
+# define STNOR_GPMC_CONFIG2 0x00151501
+# define STNOR_GPMC_CONFIG3 0x00060602
+# define STNOR_GPMC_CONFIG4 0x10081008
+# define STNOR_GPMC_CONFIG5 0x01131F1F
+# define STNOR_GPMC_CONFIG6 0x000004c4
-/* GPMC settings */
-#ifdef PRCM_CONFIG_II /* L3 at 100MHz */
-# ifdef CFG_NAND_BOOT
-# define H4_24XX_GPMC_CONFIG1_0 0x0
-# define H4_24XX_GPMC_CONFIG2_0 0x00141400
-# define H4_24XX_GPMC_CONFIG3_0 0x00141400
-# define H4_24XX_GPMC_CONFIG4_0 0x0F010F01
-# define H4_24XX_GPMC_CONFIG5_0 0x010C1414
-# define H4_24XX_GPMC_CONFIG6_0 0x00000A80
-# else /* else NOR */
-# define H4_24XX_GPMC_CONFIG1_0 0x3
-# define H4_24XX_GPMC_CONFIG2_0 0x000f0f01
-# define H4_24XX_GPMC_CONFIG3_0 0x00050502
-# define H4_24XX_GPMC_CONFIG4_0 0x0C060C06
-# define H4_24XX_GPMC_CONFIG5_0 0x01131F1F
-# endif /* endif CFG_NAND_BOOT */
-# define H4_24XX_GPMC_CONFIG7_0 (0x00000C40|(H4_CS0_BASE >> 24))
-# define H4_24XX_GPMC_CONFIG1_1 0x00011000
-# define H4_24XX_GPMC_CONFIG2_1 0x001F1F00
-# define H4_24XX_GPMC_CONFIG3_1 0x00080802
-# define H4_24XX_GPMC_CONFIG4_1 0x1C091C09
-# define H4_24XX_GPMC_CONFIG5_1 0x031A1F1F
-# define H4_24XX_GPMC_CONFIG6_1 0x000003C2
-# define H4_24XX_GPMC_CONFIG7_1 (0x00000F40|(H4_CS1_BASE >> 24))
-#endif /* endif PRCM_CONFIG_II */
-
-#ifdef PRCM_CONFIG_III /* L3 at 133MHz */
-# ifdef CFG_NAND_BOOT
-# define H4_24XX_GPMC_CONFIG1_0 0x0
-# define H4_24XX_GPMC_CONFIG2_0 0x00141400
-# define H4_24XX_GPMC_CONFIG3_0 0x00141400
-# define H4_24XX_GPMC_CONFIG4_0 0x0F010F01
-# define H4_24XX_GPMC_CONFIG5_0 0x010C1414
-# define H4_24XX_GPMC_CONFIG6_0 0x00000A80
-# else /* NOR boot */
-# define H4_24XX_GPMC_CONFIG1_0 0x3
-# define H4_24XX_GPMC_CONFIG2_0 0x00151501
-# define H4_24XX_GPMC_CONFIG3_0 0x00060602
-# define H4_24XX_GPMC_CONFIG4_0 0x10081008
-# define H4_24XX_GPMC_CONFIG5_0 0x01131F1F
-# define H4_24XX_GPMC_CONFIG6_0 0x000004c4
-# endif /* endif CFG_NAND_BOOT */
-# define H4_24XX_GPMC_CONFIG7_0 (0x00000C40|(H4_CS0_BASE >> 24))
-# define H4_24XX_GPMC_CONFIG1_1 0x00011000
-# define H4_24XX_GPMC_CONFIG2_1 0x001f1f01
-# define H4_24XX_GPMC_CONFIG3_1 0x00080803
-# define H4_24XX_GPMC_CONFIG4_1 0x1C091C09
-# define H4_24XX_GPMC_CONFIG5_1 0x041f1F1F
-# define H4_24XX_GPMC_CONFIG6_1 0x000004C4
-# define H4_24XX_GPMC_CONFIG7_1 (0x00000F40|(H4_CS1_BASE >> 24))
+# define MPDB_GPMC_CONFIG1 0x00011000
+# define MPDB_GPMC_CONFIG2 0x001f1f01
+# define MPDB_GPMC_CONFIG3 0x00080803
+# define MPDB_GPMC_CONFIG4 0x1C091C09
+# define MPDB_GPMC_CONFIG5 0x041f1F1F
+# define MPDB_GPMC_CONFIG6 0x000004C4
+
+# define SIBNOR_GPMC_CONFIG1 0x3
+# define SIBNOR_GPMC_CONFIG2 0x00151501
+# define SIBNOR_GPMC_CONFIG3 0x00060602
+# define SIBNOR_GPMC_CONFIG4 0x10081008
+# define SIBNOR_GPMC_CONFIG5 0x01131F1F
+# define SIBNOR_GPMC_CONFIG6 0x00000000
+
+# define ONENAND_GPMC_CONFIG1 0x00001200
+# define ONENAND_GPMC_CONFIG2 0x000c0c01
+# define ONENAND_GPMC_CONFIG3 0x00030301
+# define ONENAND_GPMC_CONFIG4 0x0c040c04
+# define ONENAND_GPMC_CONFIG5 0x010C1010
+# define ONENAND_GPMC_CONFIG6 0x00000000
+
+# define PCMCIA_GPMC_CONFIG1 0x01E91200
+# define PCMCIA_GPMC_CONFIG2 0x001E1E01
+# define PCMCIA_GPMC_CONFIG3 0x00020203
+# define PCMCIA_GPMC_CONFIG4 0x1D041D04
+# define PCMCIA_GPMC_CONFIG5 0x031D1F1F
+# define PCMCIA_GPMC_CONFIG6 0x000004C4
#endif /* endif CFG_PRCM_III */
+#if defined (PRCM_CONFIG_I) || defined(PRCM_CONFIG_2) /* L3 at 165MHz */
+# define SMNAND_GPMC_CONFIG1 0x00001800
+# define SMNAND_GPMC_CONFIG2 0x00141400
+# define SMNAND_GPMC_CONFIG3 0x00141400
+# define SMNAND_GPMC_CONFIG4 0x0F010F01
+# define SMNAND_GPMC_CONFIG5 0x010C1414
+# define SMNAND_GPMC_CONFIG6 0x00000A80
+# define SMNAND_GPMC_CONFIG7 0x00000C44
+
+# define STNOR_GPMC_CONFIG1 0x3
+# define STNOR_GPMC_CONFIG2 0x00151501
+# define STNOR_GPMC_CONFIG3 0x00060602
+# define STNOR_GPMC_CONFIG4 0x11091109
+# define STNOR_GPMC_CONFIG5 0x01141F1F
+# define STNOR_GPMC_CONFIG6 0x000004c4
+
+# define MPDB_GPMC_CONFIG1 0x00011000
+# define MPDB_GPMC_CONFIG2 0x001f1f01
+# define MPDB_GPMC_CONFIG3 0x00080803
+# define MPDB_GPMC_CONFIG4 0x1c0b1c0a
+# define MPDB_GPMC_CONFIG5 0x041f1F1F
+# define MPDB_GPMC_CONFIG6 0x000004C4
+
+# define SIBNOR_GPMC_CONFIG1 0x3
+# define SIBNOR_GPMC_CONFIG2 0x00151501
+# define SIBNOR_GPMC_CONFIG3 0x00060602
+# define SIBNOR_GPMC_CONFIG4 0x11091109
+# define SIBNOR_GPMC_CONFIG5 0x01141F1F
+# define SIBNOR_GPMC_CONFIG6 0x00000000
+
+# define ONENAND_GPMC_CONFIG1 0x00001200
+# define ONENAND_GPMC_CONFIG2 0x000F0F01
+# define ONENAND_GPMC_CONFIG3 0x00030301
+# define ONENAND_GPMC_CONFIG4 0x0F040F04
+# define ONENAND_GPMC_CONFIG5 0x010F1010
+# define ONENAND_GPMC_CONFIG6 0x00000000
+
+# define PCMCIA_GPMC_CONFIG1 0x01E91200
+# define PCMCIA_GPMC_CONFIG2 0x001E1E01
+# define PCMCIA_GPMC_CONFIG3 0x00020203
+# define PCMCIA_GPMC_CONFIG4 0x1D041D04
+# define PCMCIA_GPMC_CONFIG5 0x031D1F1F
+# define PCMCIA_GPMC_CONFIG6 0x000004C4
+
+#endif
+
+#if 0
+/* Board Specific Settings for each of the configurations for chips
+ * whose values change as per platform. - None currently
+ */
+#if CONFIG_OMAP24XXH4
+#include <asm/arch/mem-h4.h>
+#endif
+
+#if CONFIG_2430SDP
+#include <asm/arch/mem-sdp2430.h>
+#endif
+
+#endif /* if 0 */
+
+/* max number of GPMC Chip Selects */
+#define GPMC_MAX_CS 8
+/* max number of GPMC regs */
+#define GPMC_MAX_REG 7
+
+#define PROC_NOR 1
+#define PROC_NAND 2
+#define PISMO_SIBLEY0 3
+#define PISMO_SIBLEY1 4
+#define PISMO_ONENAND 5
+#define DBG_MPDB 6
+#define PISMO_PCMCIA 7
+
+/* make it readable for the gpmc_init */
+#define PROC_NOR_BASE FLASH_BASE
+#define PROC_NAND_BASE NAND_BASE
+#define PISMO_SIB0_BASE SIBLEY_MAP1
+#define PISMO_SIB1_BASE SIBLEY_MAP2
+#define PISMO_ONEN_BASE ONENAND_MAP
+#define DBG_MPDB_BASE DEBUG_BASE
+#define PISMO_PCMCIA_BASE PCMCIA_BASE
+
#endif /* endif _OMAP24XX_MEM_H_ */
diff --git a/include/asm-arm/arch-arm1136/mux.h b/include/asm-arm/arch-arm1136/mux.h
index 67c8419086..e61f9f18f8 100644
--- a/include/asm-arm/arch-arm1136/mux.h
+++ b/include/asm-arm/arch-arm1136/mux.h
@@ -55,6 +55,9 @@ void muxSetupHDQ(void);
#define CONTROL_PADCONF_GPMC_NCS0_BYTE3 ((volatile unsigned char *)0x4800008F)
/* Pin Muxing registers used for SDRC */
+#define CONTROL_PADCONF_SDRC_STK_DM1 0xAC
+#define CONTROL_PADCONF_SDRC_DQS1 0xB0
+
#define CONTROL_PADCONF_SDRC_NCS0_BYTE0 ((volatile unsigned char *)0x480000A0)
#define CONTROL_PADCONF_SDRC_NCS0_BYTE1 ((volatile unsigned char *)0x480000A1)
#define CONTROL_PADCONF_SDRC_NCS0_BYTE2 ((volatile unsigned char *)0x480000A2)
diff --git a/include/asm-arm/arch-arm1136/omap2420.h b/include/asm-arm/arch-arm1136/omap2420.h
index d833035a4b..e8638a6098 100644
--- a/include/asm-arm/arch-arm1136/omap2420.h
+++ b/include/asm-arm/arch-arm1136/omap2420.h
@@ -30,12 +30,7 @@
/*
* 2420 specific Section
*/
-
-/* L3 Firewall */
-#define A_REQINFOPERM0 0x68005048
-#define A_READPERM0 0x68005050
-#define A_WRITEPERM0 0x68005058
-/* #define GP_DEVICE (BIT8|BIT9) FIXME -- commented out to make compile -- FIXME */
+#define OMAP24XX_L4_IO_BASE (0x48000000)
/* L3 Firewall */
#define A_REQINFOPERM0 0x68005048
@@ -43,143 +38,52 @@
#define A_WRITEPERM0 0x68005058
/* CONTROL */
-#define OMAP2420_CTRL_BASE (0x48000000)
-#define CONTROL_STATUS (OMAP2420_CTRL_BASE + 0x2F8)
-
-/* device type */
-#define TST_DEVICE 0x0
-#define EMU_DEVICE 0x1
-#define HS_DEVICE 0x2
-#define GP_DEVICE 0x3
+#define OMAP24XX_CTRL_BASE (0x48000000)
/* TAP information */
-#define OMAP2420_TAP_BASE (0x48014000)
-#define TAP_IDCODE_REG (OMAP2420_TAP_BASE+0x204)
-#define PRODUCTION_ID (OMAP2420_TAP_BASE+0x208)
+#define OMAP24XX_TAP_BASE (0x48014000)
/* GPMC */
-#define OMAP2420_GPMC_BASE (0x6800A000)
-#define GPMC_SYSCONFIG (OMAP2420_GPMC_BASE+0x10)
-#define GPMC_IRQENABLE (OMAP2420_GPMC_BASE+0x1C)
-#define GPMC_TIMEOUT_CONTROL (OMAP2420_GPMC_BASE+0x40)
-#define GPMC_CONFIG (OMAP2420_GPMC_BASE+0x50)
-#define GPMC_CONFIG1_0 (OMAP2420_GPMC_BASE+0x60)
-#define GPMC_CONFIG2_0 (OMAP2420_GPMC_BASE+0x64)
-#define GPMC_CONFIG3_0 (OMAP2420_GPMC_BASE+0x68)
-#define GPMC_CONFIG4_0 (OMAP2420_GPMC_BASE+0x6C)
-#define GPMC_CONFIG5_0 (OMAP2420_GPMC_BASE+0x70)
-#define GPMC_CONFIG6_0 (OMAP2420_GPMC_BASE+0x74)
-#define GPMC_CONFIG7_0 (OMAP2420_GPMC_BASE+0x78)
-#define GPMC_CONFIG1_1 (OMAP2420_GPMC_BASE+0x90)
-#define GPMC_CONFIG2_1 (OMAP2420_GPMC_BASE+0x94)
-#define GPMC_CONFIG3_1 (OMAP2420_GPMC_BASE+0x98)
-#define GPMC_CONFIG4_1 (OMAP2420_GPMC_BASE+0x9C)
-#define GPMC_CONFIG5_1 (OMAP2420_GPMC_BASE+0xA0)
-#define GPMC_CONFIG6_1 (OMAP2420_GPMC_BASE+0xA4)
-#define GPMC_CONFIG7_1 (OMAP2420_GPMC_BASE+0xA8)
+#define OMAP24XX_GPMC_BASE (0x6800A000)
/* SMS */
-#define OMAP2420_SMS_BASE 0x68008000
-#define SMS_SYSCONFIG (OMAP2420_SMS_BASE+0x10)
-#define SMS_CLASS_ARB0 (OMAP2420_SMS_BASE+0xD0)
-# define BURSTCOMPLETE_GROUP7 BIT31
+#define OMAP24XX_SMS_BASE 0x68008000
/* SDRC */
-#define OMAP2420_SDRC_BASE 0x68009000
-#define SDRC_SYSCONFIG (OMAP2420_SDRC_BASE+0x10)
-#define SDRC_STATUS (OMAP2420_SDRC_BASE+0x14)
-#define SDRC_CS_CFG (OMAP2420_SDRC_BASE+0x40)
-#define SDRC_SHARING (OMAP2420_SDRC_BASE+0x44)
-#define SDRC_DLLA_CTRL (OMAP2420_SDRC_BASE+0x60)
-#define SDRC_DLLB_CTRL (OMAP2420_SDRC_BASE+0x68)
-#define SDRC_POWER (OMAP2420_SDRC_BASE+0x70)
-#define SDRC_MCFG_0 (OMAP2420_SDRC_BASE+0x80)
-#define SDRC_MR_0 (OMAP2420_SDRC_BASE+0x84)
-#define SDRC_ACTIM_CTRLA_0 (OMAP2420_SDRC_BASE+0x9C)
-#define SDRC_ACTIM_CTRLB_0 (OMAP2420_SDRC_BASE+0xA0)
-#define SDRC_ACTIM_CTRLA_1 (OMAP2420_SDRC_BASE+0xC4)
-#define SDRC_ACTIM_CTRLB_1 (OMAP2420_SDRC_BASE+0xC8)
-#define SDRC_RFR_CTRL (OMAP2420_SDRC_BASE+0xA4)
-#define SDRC_MANUAL_0 (OMAP2420_SDRC_BASE+0xA8)
-#define OMAP2420_SDRC_CS0 0x80000000
-#define OMAP2420_SDRC_CS1 0xA0000000
-#define CMD_NOP 0x0
-#define CMD_PRECHARGE 0x1
-#define CMD_AUTOREFRESH 0x2
-#define CMD_ENTR_PWRDOWN 0x3
-#define CMD_EXIT_PWRDOWN 0x4
-#define CMD_ENTR_SRFRSH 0x5
-#define CMD_CKE_HIGH 0x6
-#define CMD_CKE_LOW 0x7
-#define SOFTRESET BIT1
-#define SMART_IDLE (0x2 << 3)
-#define REF_ON_IDLE (0x1 << 6)
-
+#define OMAP24XX_SDRC_BASE 0x68009000
/* UART */
-#define OMAP2420_UART1 0x4806A000
-#define OMAP2420_UART2 0x4806C000
-#define OMAP2420_UART3 0x4806E000
+#define OMAP24XX_UART1 0x4806A000
+#define OMAP24XX_UART2 0x4806C000
+#define OMAP24XX_UART3 0x4806E000
/* General Purpose Timers */
-#define OMAP2420_GPT1 0x48028000
-#define OMAP2420_GPT2 0x4802A000
-#define OMAP2420_GPT3 0x48078000
-#define OMAP2420_GPT4 0x4807A000
-#define OMAP2420_GPT5 0x4807C000
-#define OMAP2420_GPT6 0x4807E000
-#define OMAP2420_GPT7 0x48080000
-#define OMAP2420_GPT8 0x48082000
-#define OMAP2420_GPT9 0x48084000
-#define OMAP2420_GPT10 0x48086000
-#define OMAP2420_GPT11 0x48088000
-#define OMAP2420_GPT12 0x4808A000
-
-/* timer regs offsets (32 bit regs) */
-#define TIDR 0x0 /* r */
-#define TIOCP_CFG 0x10 /* rw */
-#define TISTAT 0x14 /* r */
-#define TISR 0x18 /* rw */
-#define TIER 0x1C /* rw */
-#define TWER 0x20 /* rw */
-#define TCLR 0x24 /* rw */
-#define TCRR 0x28 /* rw */
-#define TLDR 0x2C /* rw */
-#define TTGR 0x30 /* rw */
-#define TWPS 0x34 /* r */
-#define TMAR 0x38 /* rw */
-#define TCAR1 0x3c /* r */
-#define TSICR 0x40 /* rw */
-#define TCAR2 0x44 /* r */
+#define OMAP24XX_GPT1 0x48028000
+#define OMAP24XX_GPT2 0x4802A000
+#define OMAP24XX_GPT3 0x48078000
+#define OMAP24XX_GPT4 0x4807A000
+#define OMAP24XX_GPT5 0x4807C000
+#define OMAP24XX_GPT6 0x4807E000
+#define OMAP24XX_GPT7 0x48080000
+#define OMAP24XX_GPT8 0x48082000
+#define OMAP24XX_GPT9 0x48084000
+#define OMAP24XX_GPT10 0x48086000
+#define OMAP24XX_GPT11 0x48088000
+#define OMAP24XX_GPT12 0x4808A000
+
/* WatchDog Timers (1 secure, 3 GP) */
#define WD1_BASE 0x48020000
#define WD2_BASE 0x48022000
#define WD3_BASE 0x48024000
#define WD4_BASE 0x48026000
-#define WWPS 0x34 /* r */
-#define WSPR 0x48 /* rw */
-#define WD_UNLOCK1 0xAAAA
-#define WD_UNLOCK2 0x5555
+
+/* 32KTIMER */
+#define SYNC_32KTIMER 0x48004000
+#define S32K_CR (SYNC_32KTIMER+0x10)
/* PRCM */
-#define OMAP2420_CM_BASE 0x48008000
-#define PRCM_CLKCFG_CTRL (OMAP2420_CM_BASE+0x080)
-#define CM_CLKSEL_MPU (OMAP2420_CM_BASE+0x140)
-#define CM_FCLKEN1_CORE (OMAP2420_CM_BASE+0x200)
-#define CM_FCLKEN2_CORE (OMAP2420_CM_BASE+0x204)
-#define CM_ICLKEN1_CORE (OMAP2420_CM_BASE+0x210)
-#define CM_ICLKEN2_CORE (OMAP2420_CM_BASE+0x214)
-#define CM_CLKSEL1_CORE (OMAP2420_CM_BASE+0x240)
-#define CM_CLKSEL_WKUP (OMAP2420_CM_BASE+0x440)
-#define CM_CLKSEL2_CORE (OMAP2420_CM_BASE+0x244)
-#define CM_CLKSEL_GFX (OMAP2420_CM_BASE+0x340)
-#define PM_RSTCTRL_WKUP (OMAP2420_CM_BASE+0x450)
-#define CM_CLKEN_PLL (OMAP2420_CM_BASE+0x500)
-#define CM_IDLEST_CKGEN (OMAP2420_CM_BASE+0x520)
-#define CM_CLKSEL1_PLL (OMAP2420_CM_BASE+0x540)
-#define CM_CLKSEL2_PLL (OMAP2420_CM_BASE+0x544)
-#define CM_CLKSEL_DSP (OMAP2420_CM_BASE+0x840)
+#define OMAP24XX_CM_BASE 0x48008000
/*
* H4 specific Section
@@ -191,17 +95,7 @@
* you want your code to live below that address, you have to
* be prepared to jump though hoops, to reset the base address.
*/
-#if defined(CONFIG_OMAP2420H4)
-/* GPMC */
-#ifdef CONFIG_VIRTIO_A /* Pre version B */
-# define H4_CS0_BASE 0x08000000 /* flash (64 Meg aligned) */
-# define H4_CS1_BASE 0x04000000 /* debug board */
-# define H4_CS2_BASE 0x0A000000 /* wifi board */
-#else
-# define H4_CS0_BASE 0x04000000 /* flash (64 Meg aligned) */
-# define H4_CS1_BASE 0x08000000 /* debug board */
-# define H4_CS2_BASE 0x0A000000 /* wifi board */
-#endif
+#if defined(CONFIG_OMAP24XXH4)
/* base address for indirect vectors (internal boot mode) */
#define SRAM_OFFSET0 0x40000000
@@ -214,8 +108,8 @@
#define PERIFERAL_PORT_BASE 0x480FE003
/* FPGA on Debug board.*/
-#define ETH_CONTROL_REG (H4_CS1_BASE+0x30b)
-#define LAN_RESET_REGISTER (H4_CS1_BASE+0x1c)
+#define ETH_CONTROL_REG (DEBUG_BASE+0x30b)
+#define LAN_RESET_REGISTER (DEBUG_BASE+0x1c)
#endif /* endif CONFIG_2420H4 */
#endif
diff --git a/include/asm-arm/arch-arm1136/omap2430.h b/include/asm-arm/arch-arm1136/omap2430.h
new file mode 100644
index 0000000000..8a34418259
--- /dev/null
+++ b/include/asm-arm/arch-arm1136/omap2430.h
@@ -0,0 +1,138 @@
+/*
+ * (C) Copyright 2004-2005
+ * Texas Instruments, <www.ti.com>
+ * Richard Woodruff <r-woodruff2@ti.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _OMAP2430_SYS_H_
+#define _OMAP2430_SYS_H_
+
+#include <asm/arch/sizes.h>
+
+/*
+ * 2430 specific Section
+ */
+
+/* Stuff on L3 Interconnect */
+#define SMX_APE_BASE 0x68000000
+
+/* L3 Firewall */
+#define A_REQINFOPERM0 (SMX_APE_BASE + 0x05048)
+#define A_READPERM0 (SMX_APE_BASE + 0x05050)
+#define A_WRITEPERM0 (SMX_APE_BASE + 0x05058)
+
+/* GPMC */
+#define OMAP24XX_GPMC_BASE (0x6E000000)
+
+/* SMS */
+#define OMAP24XX_SMS_BASE 0x6C000000
+
+/* SDRC */
+#define OMAP24XX_SDRC_BASE 0x6D000000
+
+/*
+ * L4 Peripherals - L4 Wakeup and L4 Core now
+ */
+#define OMAP243X_CORE_L4_IO_BASE 0x48000000
+
+#define OMAP243X_WAKEUP_L4_IO_BASE 0x49000000
+
+#define OMAP24XX_L4_IO_BASE OMAP243X_CORE_L4_IO_BASE
+
+/* CONTROL */
+#define OMAP24XX_CTRL_BASE (OMAP243X_WAKEUP_L4_IO_BASE+0x2000)
+
+/* TAP information */
+#define OMAP24XX_TAP_BASE (OMAP243X_WAKEUP_L4_IO_BASE+0xA000)
+
+/* UART */
+#define OMAP24XX_UART1 (OMAP24XX_L4_IO_BASE+0x6a000)
+#define OMAP24XX_UART2 (OMAP24XX_L4_IO_BASE+0x6c000)
+#define OMAP24XX_UART3 (OMAP24XX_L4_IO_BASE+0x6e000)
+
+/* General Purpose Timers */
+#define OMAP24XX_GPT1 (OMAP243X_WAKEUP_L4_IO_BASE+0x18000)
+#define OMAP24XX_GPT2 (OMAP24XX_L4_IO_BASE+0x2A000)
+#define OMAP24XX_GPT3 (OMAP24XX_L4_IO_BASE+0x78000)
+#define OMAP24XX_GPT4 (OMAP24XX_L4_IO_BASE+0x7A000)
+#define OMAP24XX_GPT5 (OMAP24XX_L4_IO_BASE+0x7C000)
+#define OMAP24XX_GPT6 (OMAP24XX_L4_IO_BASE+0x7E000)
+#define OMAP24XX_GPT7 (OMAP24XX_L4_IO_BASE+0x80000)
+#define OMAP24XX_GPT8 (OMAP24XX_L4_IO_BASE+0x82000)
+#define OMAP24XX_GPT9 (OMAP24XX_L4_IO_BASE+0x84000)
+#define OMAP24XX_GPT10 (OMAP24XX_L4_IO_BASE+0x86000)
+#define OMAP24XX_GPT11 (OMAP24XX_L4_IO_BASE+0x88000)
+#define OMAP24XX_GPT12 (OMAP24XX_L4_IO_BASE+0x8A000)
+
+
+/* WatchDog Timers (1 secure, 3 GP) */
+#define WD1_BASE (OMAP243X_WAKEUP_L4_IO_BASE+0x14000)
+#define WD2_BASE (OMAP243X_WAKEUP_L4_IO_BASE+0x16000)
+#define WD3_BASE (OMAP24XX_L4_IO_BASE+0x24000) /* not present */
+#define WD4_BASE (OMAP24XX_L4_IO_BASE+0x26000)
+
+/* 32KTIMER */
+#define SYNC_32KTIMER_BASE (OMAP243X_WAKEUP_L4_IO_BASE+0x20000)
+#define S32K_CR (SYNC_32KTIMER_BASE+0x10)
+
+/* PRCM */
+#define OMAP24XX_CM_BASE (OMAP243X_WAKEUP_L4_IO_BASE+0x06000)
+
+/*
+ * SDP2430 specific Section
+ */
+
+/*
+ * The 243x's chip selects are programmable. The mask ROM
+ * does configure CS0 to 0x08000000 before dispatch. So, if
+ * you want your code to live below that address, you have to
+ * be prepared to jump though hoops, to reset the base address.
+ * Same as in SDP2430
+ */
+#if (CONFIG_2430SDP)
+
+/* base address for indirect vectors (internal boot mode) */
+#define SRAM_OFFSET0 0x40000000
+#define SRAM_OFFSET1 0x00200000
+#define SRAM_OFFSET2 0x0000F800
+#define SRAM_VECT_CODE (SRAM_OFFSET0|SRAM_OFFSET1|SRAM_OFFSET2)
+
+#define LOW_LEVEL_SRAM_STACK 0x4020FFFC
+
+#define PERIFERAL_PORT_BASE 0x480FE003
+
+/* FPGA on Debug board.*/
+#define ETH_CONTROL_REG (DEBUG_BASE+0x30b)
+#define LAN_RESET_REGISTER (DEBUG_BASE+0x1c)
+#define DIP_SWITCH_INPUT_REG2 (DEBUG_BASE+0x60)
+#define LED_REGISTER (DEBUG_BASE+0x40)
+#define FPGA_REV_REGISTER (DEBUG_BASE+0x10)
+#define EEPROM_MAIN_BRD (DEBUG_BASE+0x10000+0x1800)
+#define EEPROM_CONN_BRD (DEBUG_BASE+0x10000+0x1900)
+#define EEPROM_UI_BRD (DEBUG_BASE+0x10000+0x1A00)
+#define EEPROM_MCAM_BRD (DEBUG_BASE+0x10000+0x1B00)
+#define I2C2_MEMORY_STATUS_REG (DEBUG_BASE+0x10000+0xA)
+#define ENHANCED_UI_EE_NAME "750-2038"
+#define GDP_MB_EE_NAME "750-2031-3"
+
+#endif /* endif (CONFIG_2430SDP) */
+
+#endif
diff --git a/include/asm-arm/arch-arm1136/rev.h b/include/asm-arm/arch-arm1136/rev.h
new file mode 100644
index 0000000000..9aedbc5337
--- /dev/null
+++ b/include/asm-arm/arch-arm1136/rev.h
@@ -0,0 +1,59 @@
+/*
+ * (C) Copyright 2004
+ * Texas Instruments, <www.ti.com>
+ * Richard Woodruff <r-woodruff2@ti.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _OMAP24XX_REV_H_
+#define _OMAP24XX_REV_H_
+
+typedef struct h4_system_data {
+ /* base board info */
+ u32 base_b_rev; /* rev from base board i2c */
+ /* cpu board info */
+ u32 cpu_b_rev; /* rev from cpu board i2c */
+ u32 cpu_b_mux; /* mux type on daughter board */
+ u32 cpu_b_ddr_type; /* mem type */
+ u32 cpu_b_ddr_speed; /* ddr speed rating */
+ u32 cpu_b_switches; /* boot ctrl switch settings */
+ /* cpu info */
+ u32 cpu_type; /* type of cpu; 2420, 2422, 2430,...*/
+ u32 cpu_rev; /* rev of given cpu; ES1, ES2,...*/
+} h4_sys_data;
+
+#define CDB_DDR_COMBO /* combo part on cpu daughter card */
+#define CDB_DDR_IPDB /* 2x16 parts on daughter card */
+
+#define DDR_100 100 /* type found on most mem d-boards */
+#define DDR_111 111 /* some combo parts */
+#define DDR_133 133 /* most combo, some mem d-boards */
+#define DDR_165 165 /* future parts */
+
+#define CPU_2420 0x2420
+#define CPU_2422 0x2422
+#define CPU_2430 0x2430
+
+#define CPU_2422_ES1 1
+#define CPU_2422_ES2 2
+#define CPU_2420_ES1 1
+#define CPU_2420_ES2 2
+
+#endif
diff --git a/include/asm-arm/arch-arm1136/sys_info.h b/include/asm-arm/arch-arm1136/sys_info.h
index 53c231a5e4..e5a51acd9d 100644
--- a/include/asm-arm/arch-arm1136/sys_info.h
+++ b/include/asm-arm/arch-arm1136/sys_info.h
@@ -53,30 +53,89 @@ typedef struct h4_system_data {
#define CPU_2420 0x2420
#define CPU_2422 0x2422 /* 2420 + 64M stacked */
#define CPU_2423 0x2423 /* 2420 + 96M stacked */
+#define CPU_2430 0x2430
+/* 242x real hardware:
+ * ES1 = rev 0
+ * ES2 = rev 1
+ * ES2.05 = rev 2
+ * ES2.1 = rev 3
+ * ES2.1.1 = rev 4
+ * ES2.2 = rev 5
+ */
+
+/* 242x code defines:
+ * ES1 = 0+1 = 1
+ * ES2 = 1+1 = 2
+ * ES2.05 = 2+1 = 3
+ * ES2.1 = 3+1 = 4
+ * ES2.1.1 = 4+1 = 5
+ * ES2.2 = 5+1 = 6
+ */
#define CPU_2422_ES1 1
#define CPU_2422_ES2 2
+#define CPU_2422_ES2_05 3
+#define CPU_2422_ES2_1 4
+#define CPU_2422_ES2_1_1 5
+#define CPU_2422_ES2_2 6
+
#define CPU_2420_ES1 1
#define CPU_2420_ES2 2
-#define CPU_2420_2422_ES1 1
+#define CPU_2420_ES2_05 3
+#define CPU_2420_ES2_1 4
+#define CPU_2420_ES2_1_1 5
+#define CPU_2420_ES2_2 6
+
+#define CPU_242X_ES1 1
+#define CPU_242X_ES2 2
+#define CPU_242X_ES2_05 3
+#define CPU_242X_ES2_1 4
+#define CPU_242X_ES2_1_1 5
+#define CPU_242X_ES2_2 6
+
+/* 243x real hardware:
+ * ES1 = rev 0
+ * ES2 = rev 1
+ *
+ * 243x code defines:
+ * ES1 = 0+1 = 1
+ * ES2 = 1+1 = 2
+ * ES2.1.0 = 2+1 = 3
+ */
+#define CPU_2430_ES1 1
+#define CPU_2430_ES2 2
+#define CPU_2430_ES2_1_0 3
#define CPU_2420_CHIPID 0x0B5D9000
+#define CPU_2430_CHIPID 0x0B68A000
#define CPU_24XX_ID_MASK 0x0FFFF000
#define CPU_242X_REV_MASK 0xF0000000
#define CPU_242X_PID_MASK 0x000F0000
-#define BOARD_H4_MENELAUS 1
-#define BOARD_H4_SDP 2
+#define BOARD_H4_MENELAUS 1
+#define BOARD_H4_SDP 2
+#define BOARD_H4_MENELAUS_HRP 3
+#define BOARD_SDP_2430_M1 4 /* pre-T2 platform */
+#define BOARD_SDP_2430_T2 5 /* Triton2 companion chip */
+#define BOARD_GDP_2430_T2 6 /* 2430 GDP Variant */
+
+/* Various SDP Variants */
+#define BOARD_SDP_2430_0_1 0x01
+#define BOARD_SDP_2430_1_0 0x10
+#define BOARD_SDP_2430_1_1 0x11
+#define BOARD_SDP_2430_2_1 0x20
#define GPMC_MUXED 1
#define GPMC_NONMUXED 0
#define TYPE_NAND 0x800 /* bit pos for nand in gpmc reg */
#define TYPE_NOR 0x000
+#define TYPE_ONENAND 0x800
#define WIDTH_8BIT 0x0000
#define WIDTH_16BIT 0x1000 /* bit pos for 16 bit in gpmc */
#define I2C_MENELAUS 0x72 /* i2c id for companion chip */
+#define I2C_TRITON2 0x4B /* addres of power group */
#endif
diff --git a/include/asm-arm/arch-arm720t/s3c4510b.h b/include/asm-arm/arch-arm720t/s3c4510b.h
index 517b1ada99..73a3b6d856 100644
--- a/include/asm-arm/arch-arm720t/s3c4510b.h
+++ b/include/asm-arm/arch-arm720t/s3c4510b.h
@@ -267,8 +267,6 @@ struct _irq_handler {
void (*m_func)( void *data);
};
-extern struct _irq_handler IRQ_HANDLER[];
-
#endif
#endif /* __S3C4510_h */
diff --git a/include/asm-arm/arch-ixp/ixp425.h b/include/asm-arm/arch-ixp/ixp425.h
index fbe68586b3..11dc356a92 100644
--- a/include/asm-arm/arch-ixp/ixp425.h
+++ b/include/asm-arm/arch-ixp/ixp425.h
@@ -73,21 +73,18 @@
* PCI Configuration space
*/
#define IXP425_PCI_CFG_BASE_PHYS (0xC0000000)
-#define IXP425_PCI_CFG_BASE_VIRT (0xFFFD0000)
#define IXP425_PCI_CFG_REGION_SIZE (0x00001000)
/*
* Expansion BUS Configuration registers
*/
#define IXP425_EXP_CFG_BASE_PHYS (0xC4000000)
-#define IXP425_EXP_CFG_BASE_VIRT (0xFFFD1000)
#define IXP425_EXP_CFG_REGION_SIZE (0x00001000)
/*
* Peripheral space
*/
#define IXP425_PERIPHERAL_BASE_PHYS (0xC8000000)
-#define IXP425_PERIPHERAL_BASE_VIRT (0xFFFD2000)
#define IXP425_PERIPHERAL_REGION_SIZE (0x0000C000)
/*
@@ -99,7 +96,6 @@
* Q Manager space .. not static mapped
*/
#define IXP425_QMGR_BASE_PHYS (0x60000000)
-#define IXP425_QMGR_BASE_VIRT (0xFFFDE000)
#define IXP425_QMGR_REGION_SIZE (0x00004000)
/*
@@ -113,10 +109,8 @@
*/
#define IXP425_EXP_BUS_BASE1_PHYS (0x00000000)
#define IXP425_EXP_BUS_BASE2_PHYS (0x50000000)
-#define IXP425_EXP_BUS_BASE2_VIRT (0xF0000000)
#define IXP425_EXP_BUS_BASE_PHYS IXP425_EXP_BUS_BASE2_PHYS
-#define IXP425_EXP_BUS_BASE_VIRT IXP425_EXP_BUS_BASE2_VIRT
#define IXP425_EXP_BUS_REGION_SIZE (0x08000000)
#define IXP425_EXP_BUS_CSX_REGION_SIZE (0x01000000)
@@ -130,20 +124,10 @@
#define IXP425_EXP_BUS_CS6_BASE_PHYS (IXP425_EXP_BUS_BASE2_PHYS + 0x06000000)
#define IXP425_EXP_BUS_CS7_BASE_PHYS (IXP425_EXP_BUS_BASE2_PHYS + 0x07000000)
-#define IXP425_EXP_BUS_CS0_BASE_VIRT (IXP425_EXP_BUS_BASE2_VIRT + 0x00000000)
-#define IXP425_EXP_BUS_CS1_BASE_VIRT (IXP425_EXP_BUS_BASE2_VIRT + 0x01000000)
-#define IXP425_EXP_BUS_CS2_BASE_VIRT (IXP425_EXP_BUS_BASE2_VIRT + 0x02000000)
-#define IXP425_EXP_BUS_CS3_BASE_VIRT (IXP425_EXP_BUS_BASE2_VIRT + 0x03000000)
-#define IXP425_EXP_BUS_CS4_BASE_VIRT (IXP425_EXP_BUS_BASE2_VIRT + 0x04000000)
-#define IXP425_EXP_BUS_CS5_BASE_VIRT (IXP425_EXP_BUS_BASE2_VIRT + 0x05000000)
-#define IXP425_EXP_BUS_CS6_BASE_VIRT (IXP425_EXP_BUS_BASE2_VIRT + 0x06000000)
-#define IXP425_EXP_BUS_CS7_BASE_VIRT (IXP425_EXP_BUS_BASE2_VIRT + 0x07000000)
-
#define IXP425_FLASH_WRITABLE (0x2)
#define IXP425_FLASH_DEFAULT (0xbcd23c40)
#define IXP425_FLASH_WRITE (0xbcd23c42)
-
#define IXP425_EXP_CS0_OFFSET 0x00
#define IXP425_EXP_CS1_OFFSET 0x04
#define IXP425_EXP_CS2_OFFSET 0x08
@@ -161,7 +145,7 @@
* Expansion Bus Controller registers.
*/
#ifndef __ASSEMBLY__
-#define IXP425_EXP_REG(x) ((volatile u32 *)(IXP425_EXP_CFG_BASE_VIRT+(x)))
+#define IXP425_EXP_REG(x) ((volatile u32 *)(IXP425_EXP_CFG_BASE_PHYS+(x)))
#else
#define IXP425_EXP_REG(x) (IXP425_EXP_CFG_BASE_PHYS+(x))
#endif
@@ -288,7 +272,6 @@
#define MSR_DDSR (1 << 1) /* Delta Data Set Ready */
#define MSR_DCTS (1 << 0) /* Delta Clear To Send */
-#define IXP425_CONSOLE_UART_BASE_VIRT IXP425_UART1_BASE_VIRT
#define IXP425_CONSOLE_UART_BASE_PHYS IXP425_UART1_BASE_PHYS
/*
* Peripheral Space Registers
@@ -306,20 +289,6 @@
#define IXP425_EthB_BASE_PHYS (IXP425_PERIPHERAL_BASE_PHYS + 0xA000)
#define IXP425_USB_BASE_PHYS (IXP425_PERIPHERAL_BASE_PHYS + 0xB000)
-#define IXP425_UART1_BASE_VIRT (IXP425_PERIPHERAL_BASE_VIRT + 0x0000)
-#define IXP425_UART2_BASE_VIRT (IXP425_PERIPHERAL_BASE_VIRT + 0x1000)
-#define IXP425_PMU_BASE_VIRT (IXP425_PERIPHERAL_BASE_VIRT + 0x2000)
-#define IXP425_INTC_BASE_VIRT (IXP425_PERIPHERAL_BASE_VIRT + 0x3000)
-#define IXP425_GPIO_BASE_VIRT (IXP425_PERIPHERAL_BASE_VIRT + 0x4000)
-#define IXP425_TIMER_BASE_VIRT (IXP425_PERIPHERAL_BASE_VIRT + 0x5000)
-#define IXP425_NPEA_BASE_VIRT (IXP425_PERIPHERAL_BASE_VIRT + 0x6000)
-#define IXP425_NPEB_BASE_VIRT (IXP425_PERIPHERAL_BASE_VIRT + 0x7000)
-#define IXP425_NPEC_BASE_VIRT (IXP425_PERIPHERAL_BASE_VIRT + 0x8000)
-#define IXP425_EthA_BASE_VIRT (IXP425_PERIPHERAL_BASE_VIRT + 0x9000)
-#define IXP425_EthB_BASE_VIRT (IXP425_PERIPHERAL_BASE_VIRT + 0xA000)
-#define IXP425_USB_BASE_VIRT (IXP425_PERIPHERAL_BASE_VIRT + 0xB000)
-
-
/*
* UART Register Definitions , Offsets only as there are 2 UARTS.
* IXP425_UART1_BASE , IXP425_UART2_BASE.
@@ -341,11 +310,14 @@
#define IXP425_ICIH_OFFSET 0x18 /* IRQ Highest Pri Int */
#define IXP425_ICFH_OFFSET 0x1C /* FIQ Highest Pri Int */
+#define N_IRQS 32
+#define IXP425_TIMER_2_IRQ 11
+
/*
* Interrupt Controller Register Definitions.
*/
#ifndef __ASSEMBLY__
-#define IXP425_INTC_REG(x) ((volatile u32 *)(IXP425_INTC_BASE_VIRT+(x)))
+#define IXP425_INTC_REG(x) ((volatile u32 *)(IXP425_INTC_BASE_PHYS+(x)))
#else
#define IXP425_INTC_REG(x) (IXP425_INTC_BASE_PHYS+(x))
#endif
@@ -375,7 +347,7 @@
* GPIO Register Definitions.
* [Only perform 32bit reads/writes]
*/
-#define IXP425_GPIO_REG(x) ((volatile u32 *)(IXP425_GPIO_BASE_VIRT+(x)))
+#define IXP425_GPIO_REG(x) ((volatile u32 *)(IXP425_GPIO_BASE_PHYS+(x)))
#define IXP425_GPIO_GPOUTR IXP425_GPIO_REG(IXP425_GPIO_GPOUTR_OFFSET)
#define IXP425_GPIO_GPOER IXP425_GPIO_REG(IXP425_GPIO_GPOER_OFFSET)
@@ -387,6 +359,16 @@
#define IXP425_GPIO_GPDBSELR IXP425_GPIO_REG(IXP425_GPIO_GPDBSELR_OFFSET)
/*
+ * Macros to make it easy to access the GPIO registers
+ */
+#define GPIO_OUTPUT_ENABLE(line) *IXP425_GPIO_GPOER &= ~(1 << (line))
+#define GPIO_OUTPUT_DISABLE(line) *IXP425_GPIO_GPOER |= (1 << (line))
+#define GPIO_OUTPUT_SET(line) *IXP425_GPIO_GPOUTR |= (1 << (line))
+#define GPIO_OUTPUT_CLEAR(line) *IXP425_GPIO_GPOUTR &= ~(1 << (line))
+#define GPIO_INT_ACT_LOW_SET(line) *IXP425_GPIO_GPIT1R = \
+ (*IXP425_GPIO_GPIT1R & ~(0x7 << (line * 3))) | (0x1 << (line * 3))
+
+/*
* Constants to make it easy to access Timer Control/Status registers
*/
#define IXP425_OSTS_OFFSET 0x00 /* Continious TimeStamp */
@@ -409,7 +391,9 @@
#define IXP425_TIMER_REG(x) (IXP425_TIMER_BASE_PHYS+(x))
#endif
+#if 0 /* test-only: also defined in npe/include/... */
#define IXP425_OSTS IXP425_TIMER_REG(IXP425_OSTS_OFFSET)
+#endif
#define IXP425_OST1 IXP425_TIMER_REG(IXP425_OST1_OFFSET)
#define IXP425_OSRT1 IXP425_TIMER_REG(IXP425_OSRT1_OFFSET)
#define IXP425_OST2 IXP425_TIMER_REG(IXP425_OST2_OFFSET)
@@ -457,12 +441,12 @@
#define PCI_ATPDMA0_LENADDR_OFFSET 0x48
#define PCI_ATPDMA1_AHBADDR_OFFSET 0x4C
#define PCI_ATPDMA1_PCIADDR_OFFSET 0x50
-#define PCI_ATPDMA1_LENADDR_OFFSET 0x54
+#define PCI_ATPDMA1_LENADDR_OFFSET 0x54
/*
* PCI Control/Status Registers
*/
-#define IXP425_PCI_CSR(x) ((volatile u32 *)(IXP425_PCI_CFG_BASE_VIRT+(x)))
+#define IXP425_PCI_CSR(x) ((volatile u32 *)(IXP425_PCI_CFG_BASE_PHYS+(x)))
#define PCI_NP_AD IXP425_PCI_CSR(PCI_NP_AD_OFFSET)
#define PCI_NP_CBE IXP425_PCI_CSR(PCI_NP_CBE_OFFSET)
diff --git a/include/asm-arm/arch-omap/sizes.h b/include/asm-arm/arch-omap/sizes.h
new file mode 100644
index 0000000000..f8d92ca120
--- /dev/null
+++ b/include/asm-arm/arch-omap/sizes.h
@@ -0,0 +1,52 @@
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+/* DO NOT EDIT!! - this file automatically generated
+ * from .s file by awk -f s2h.awk
+ */
+/* Size defintions
+ * Copyright (C) ARM Limited 1998. All rights reserved.
+ */
+
+#ifndef __sizes_h
+#define __sizes_h 1
+
+/* handy sizes */
+#define SZ_1K 0x00000400
+#define SZ_4K 0x00001000
+#define SZ_8K 0x00002000
+#define SZ_16K 0x00004000
+#define SZ_64K 0x00010000
+#define SZ_128K 0x00020000
+#define SZ_256K 0x00040000
+#define SZ_512K 0x00080000
+
+#define SZ_1M 0x00100000
+#define SZ_2M 0x00200000
+#define SZ_4M 0x00400000
+#define SZ_8M 0x00800000
+#define SZ_16M 0x01000000
+#define SZ_32M 0x02000000
+#define SZ_64M 0x04000000
+#define SZ_128M 0x08000000
+#define SZ_256M 0x10000000
+#define SZ_512M 0x20000000
+
+#define SZ_1G 0x40000000
+#define SZ_2G 0x80000000
+
+#endif
+
+/* END */
diff --git a/include/asm-arm/arch-omap3/bits.h b/include/asm-arm/arch-omap3/bits.h
new file mode 100644
index 0000000000..8522335bfc
--- /dev/null
+++ b/include/asm-arm/arch-omap3/bits.h
@@ -0,0 +1,48 @@
+/* bits.h
+ * Copyright (c) 2004 Texas Instruments
+ *
+ * This package is free software; you can redistribute it and/or
+ * modify it under the terms of the license found in the file
+ * named COPYING that should have accompanied this file.
+ *
+ * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
+ * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
+ */
+#ifndef __bits_h
+#define __bits_h 1
+
+#define BIT0 (1<<0)
+#define BIT1 (1<<1)
+#define BIT2 (1<<2)
+#define BIT3 (1<<3)
+#define BIT4 (1<<4)
+#define BIT5 (1<<5)
+#define BIT6 (1<<6)
+#define BIT7 (1<<7)
+#define BIT8 (1<<8)
+#define BIT9 (1<<9)
+#define BIT10 (1<<10)
+#define BIT11 (1<<11)
+#define BIT12 (1<<12)
+#define BIT13 (1<<13)
+#define BIT14 (1<<14)
+#define BIT15 (1<<15)
+#define BIT16 (1<<16)
+#define BIT17 (1<<17)
+#define BIT18 (1<<18)
+#define BIT19 (1<<19)
+#define BIT20 (1<<20)
+#define BIT21 (1<<21)
+#define BIT22 (1<<22)
+#define BIT23 (1<<23)
+#define BIT24 (1<<24)
+#define BIT25 (1<<25)
+#define BIT26 (1<<26)
+#define BIT27 (1<<27)
+#define BIT28 (1<<28)
+#define BIT29 (1<<29)
+#define BIT30 (1<<30)
+#define BIT31 (1<<31)
+
+#endif
diff --git a/include/asm-arm/arch-omap3/clocks.h b/include/asm-arm/arch-omap3/clocks.h
new file mode 100644
index 0000000000..a942e69ab9
--- /dev/null
+++ b/include/asm-arm/arch-omap3/clocks.h
@@ -0,0 +1,35 @@
+/*
+ * (C) Copyright 2006
+ * Texas Instruments, <www.ti.com>
+ * Richard Woodruff <r-woodruff2@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR /PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#ifndef _OMAP34XX_CLOCKS_H_
+#define _OMAP34XX_CLOCKS_H_
+
+#define LDELAY 12000000
+
+#define S12M 12000000
+#define S13M 13000000
+#define S19_2M 19200000
+#define S24M 24000000
+#define S26M 26000000
+#define S38_4M 38400000
+
+#include <asm/arch/clocks343x.h>
+
+#endif
diff --git a/include/asm-arm/arch-omap3/clocks343x.h b/include/asm-arm/arch-omap3/clocks343x.h
new file mode 100644
index 0000000000..fbc59a8ddb
--- /dev/null
+++ b/include/asm-arm/arch-omap3/clocks343x.h
@@ -0,0 +1,155 @@
+/*
+ * (C) Copyright 2006
+ * Texas Instruments, <www.ti.com>
+ * Richard Woodruff <r-woodruff2@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR /PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#ifndef _OMAP343X_CLOCKS_H_
+#define _OMAP343X_CLOCKS_H_
+
+#define PLL_STOP 1 /* PER & IVA */
+#define PLL_LOW_POWER_BYPASS 5 /* MPU, IVA & CORE */
+#define PLL_FAST_RELOCK_BYPASS 6 /* CORE */
+#define PLL_LOCK 7 /* MPU, IVA, CORE & PER */
+
+/* The following configurations are OPP and SysClk value independant
+ * and hence are defined here. All the other DPLL related values are
+ * tabulated in lowlevel_init.S.
+ */
+
+/* CORE DPLL */
+# define CORE_M3X2 2 /* 332MHz : CM_CLKSEL1_EMU */
+# define CORE_SSI_DIV 3 /* 221MHz : CM_CLKSEL_CORE */
+# define CORE_FUSB_DIV 2 /* 41.5MHz: */
+# define CORE_L4_DIV 2 /* 83MHz : L4 */
+# define CORE_L3_DIV 2 /* 166MHz : L3 {DDR} */
+# define GFX_DIV 2 /* 83MHz : CM_CLKSEL_GFX */
+# define WKUP_RSM 2 /* 41.5MHz: CM_CLKSEL_WKUP */
+
+/* PER DPLL */
+# define PER_M6X2 3 /* 288MHz: CM_CLKSEL1_EMU */
+# define PER_M5X2 4 /* 216MHz: CM_CLKSEL_CAM */
+# define PER_M4X2 9 /* 96MHz : CM_CLKSEL_DSS-dss1 */
+# define PER_M3X2 16 /* 54MHz : CM_CLKSEL_DSS-tv */
+
+# define CLSEL1_EMU_VAL ((CORE_M3X2 << 16) | (PER_M6X2 << 24) | (0x0a50))
+
+#ifdef PRCM_CLK_CFG2_332MHZ
+# define M_12 0xA6
+# define N_12 0x05
+# define FSEL_12 0x07
+# define M2_12 0x01 /* M3 of 2 */
+
+# define M_12_ES1 0x19F
+# define M_12_ES1 0x0E
+# define FSL_12_ES1 0x03
+# define M2_12_ES1 0x1 /* M3 of 2 */
+
+# define M_13 0x14C
+# define N_13 0x0C
+# define FSEL_13 0x03
+# define M2_13 0x01 /* M3 of 2 */
+
+# define M_13_ES1 0x1B2
+# define N_13_ES1 0x10
+# define FSL_13_ES1 0x03
+# define M2_13_ES1 0x01 /* M3 of 2 */
+
+# define M_19p2 0x19F
+# define N_19p2 0x17
+# define FSEL_19p2 0x03
+# define M2_19p2 0x01 /* M3 of 2 */
+
+# define M_19p2_ES1 0x19F
+# define N_19p2_ES1 0x17
+# define FSL_19p2_ES1 0x03
+# define M2_19p2_ES1 0x01 /* M3 of 2 */
+
+# define M_26 0xA6
+# define N_26 0x0C
+# define FSEL_26 0x07
+# define M2_26 0x01 /* M3 of 2 */
+
+# define M_26_ES1 0x1B2
+# define N_26_ES1 0x21
+# define FSL_26_ES1 0x03
+# define M2_26_ES1 0x01 /* M3 of 2 */
+
+# define M_38p4 0x19F
+# define N_38p4 0x2F
+# define FSEL_38p4 0x03
+# define M2_38p4 0x01 /* M3 of 2 */
+
+# define M_38p4_ES1 0x19F
+# define N_38p4_ES1 0x2F
+# define FSL_38p4_ES1 0x03
+# define M2_38p4_ES1 0x01 /* M3 of 2 */
+
+#elif defined(PRCM_CLK_CFG2_266MHZ)
+# define M_12 0x85
+# define N_12 0x05
+# define FSEL_12 0x07
+# define M2_12 0x02 /* M3 of 2 */
+
+# define M_12_ES1 0x85 /* 0x10A */
+# define N_12_ES1 0x05 /* 0x05 */
+# define FSL_12_ES1 0x07 /* 0x7 */
+# define M2_12_ES1 0x2 /* 0x2 with an M3 of 4*/
+
+# define M_13 0x10A
+# define N_13 0x0C
+# define FSEL_13 0x3
+# define M2_13 0x1 /* M3 of 2 */
+
+# define M_13_ES1 0x10A /* 0x214 */
+# define N_13_ES1 0x0C /* 0xC */
+# define FSL_13_ES1 0x3 /* 0x3 */
+# define M2_13_ES1 0x1 /* 0x2 with an M3 of 4*/
+
+# define M_19p2 0x115
+# define N_19p2 0x13
+# define FSEL_19p2 0x03
+# define M2_19p2 0x01 /* M3 of 2 */
+
+# define M_19p2_ES1 0x115 /* 0x299 */
+# define N_19p2_ES1 0x13 /* 0x17 */
+# define FSL_19p2_ES1 0x03 /* 0x03 */
+# define M2_19p2_ES1 0x01 /* 0x2 with M3 of 4 */
+
+# define M_26 0x85
+# define N_26 0x0C
+# define FSEL_26 0x07
+# define M2_26 0x01 /* M3 of 2 */
+
+# define M_26_ES1 0x85 /* 0x10A */
+# define N_26_ES1 0x0C /* 0xC */
+# define FSL_26_ES1 0x07 /* 0x7 */
+# define M2_26_ES1 0x01 /* 0x2 with an M3 of 4 */
+
+# define M_38p4 0x11C
+# define N_38p4 0x28
+# define FSEL_38p4 0x03
+# define M2_38p4 0x01 /* M3 of 2 */
+
+# define M_38p4_ES1 0x11C /* 0x299 */
+# define N_38p4_ES1 0x28 /* 0x2f */
+# define FSL_38p4_ES1 0x03 /* 0x3 */
+# define M2_38p4_ES1 0x01 /* 0x2 with an M3 of 4*/
+
+#endif
+
+#endif /* endif _OMAP343X_CLOCKS_H_ */
diff --git a/include/asm-arm/arch-omap3/cpu.h b/include/asm-arm/arch-omap3/cpu.h
new file mode 100644
index 0000000000..28a29c0afe
--- /dev/null
+++ b/include/asm-arm/arch-omap3/cpu.h
@@ -0,0 +1,247 @@
+/*
+ * (C) Copyright 2006
+ * Texas Instruments, <www.ti.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#ifndef _OMAP34XX_CPU_H
+#define _OMAP34XX_CPU_H
+#include <asm/arch/omap3430.h>
+
+/* Register offsets of common modules */
+/* Control */
+#define CONTROL_STATUS (OMAP34XX_CTRL_BASE + 0x2F0)
+#define OMAP34XX_MCR (OMAP34XX_CTRL_BASE + 0x8C)
+#define CONTROL_SCALABLE_OMAP_STATUS (OMAP34XX_CTRL_BASE + 0x44C)
+#define CONTROL_SCALABLE_OMAP_OCP (OMAP34XX_CTRL_BASE + 0x534)
+
+
+/* Tap Information */
+#define TAP_IDCODE_REG (OMAP34XX_TAP_BASE+0x204)
+#define PRODUCTION_ID (OMAP34XX_TAP_BASE+0x208)
+
+/* device type */
+#define DEVICE_MASK (BIT8|BIT9|BIT10)
+#define TST_DEVICE 0x0
+#define EMU_DEVICE 0x1
+#define HS_DEVICE 0x2
+#define GP_DEVICE 0x3
+
+/* GPMC CS3/cs4/cs6 not avaliable */
+#define GPMC_BASE (OMAP34XX_GPMC_BASE)
+#define GPMC_SYSCONFIG (OMAP34XX_GPMC_BASE+0x10)
+#define GPMC_IRQSTATUS (OMAP34XX_GPMC_BASE+0x18)
+#define GPMC_IRQENABLE (OMAP34XX_GPMC_BASE+0x1C)
+#define GPMC_TIMEOUT_CONTROL (OMAP34XX_GPMC_BASE+0x40)
+#define GPMC_CONFIG (OMAP34XX_GPMC_BASE+0x50)
+#define GPMC_STATUS (OMAP34XX_GPMC_BASE+0x54)
+
+#define GPMC_CONFIG_CS0 (OMAP34XX_GPMC_BASE+0x60)
+#define GPMC_CONFIG_WIDTH (0x30)
+
+#define GPMC_CONFIG1 (0x00)
+#define GPMC_CONFIG2 (0x04)
+#define GPMC_CONFIG3 (0x08)
+#define GPMC_CONFIG4 (0x0C)
+#define GPMC_CONFIG5 (0x10)
+#define GPMC_CONFIG6 (0x14)
+#define GPMC_CONFIG7 (0x18)
+#define GPMC_NAND_CMD (0x1C)
+#define GPMC_NAND_ADR (0x20)
+#define GPMC_NAND_DAT (0x24)
+
+#define GPMC_ECC_CONFIG (0x1F4)
+#define GPMC_ECC_CONTROL (0x1F8)
+#define GPMC_ECC_SIZE_CONFIG (0x1FC)
+#define GPMC_ECC1_RESULT (0x200)
+#define GPMC_ECC2_RESULT (0x204)
+#define GPMC_ECC3_RESULT (0x208)
+#define GPMC_ECC4_RESULT (0x20C)
+#define GPMC_ECC5_RESULT (0x210)
+#define GPMC_ECC6_RESULT (0x214)
+#define GPMC_ECC7_RESULT (0x218)
+#define GPMC_ECC8_RESULT (0x21C)
+#define GPMC_ECC9_RESULT (0x220)
+
+
+/* GPMC Mapping */
+# define FLASH_BASE 0x10000000 /* NOR flash (aligned to 256 Meg) */
+# define FLASH_BASE_SDPV1 0x04000000 /* NOR flash (aligned to 64 Meg) */
+# define FLASH_BASE_SDPV2 0x10000000 /* NOR flash (aligned to 256 Meg) */
+# define DEBUG_BASE 0x08000000 /* debug board */
+# define NAND_BASE 0x30000000 /* NAND addr (actual size small port)*/
+# define PISMO2_BASE 0x18000000 /* PISMO2 CS1/2 */
+# define ONENAND_MAP 0x20000000 /* OneNand addr (actual size small port */
+
+/* SMS */
+#define SMS_SYSCONFIG (OMAP34XX_SMS_BASE+0x10)
+#define SMS_RG_ATT0 (OMAP34XX_SMS_BASE+0x48)
+#define SMS_CLASS_ARB0 (OMAP34XX_SMS_BASE+0xD0)
+#define BURSTCOMPLETE_GROUP7 BIT31
+
+/* SDRC */
+#define SDRC_SYSCONFIG (OMAP34XX_SDRC_BASE+0x10)
+#define SDRC_STATUS (OMAP34XX_SDRC_BASE+0x14)
+#define SDRC_CS_CFG (OMAP34XX_SDRC_BASE+0x40)
+#define SDRC_SHARING (OMAP34XX_SDRC_BASE+0x44)
+#define SDRC_DLLA_CTRL (OMAP34XX_SDRC_BASE+0x60)
+#define SDRC_DLLA_STATUS (OMAP34XX_SDRC_BASE+0x64)
+#define SDRC_DLLB_CTRL (OMAP34XX_SDRC_BASE+0x68)
+#define SDRC_DLLB_STATUS (OMAP34XX_SDRC_BASE+0x6C)
+#define DLLPHASE BIT1
+#define LOADDLL BIT2
+#define DLL_DELAY_MASK 0xFF00
+#define DLL_NO_FILTER_MASK (BIT8|BIT9)
+
+#define SDRC_POWER (OMAP34XX_SDRC_BASE+0x70)
+#define WAKEUPPROC BIT26
+
+#define SDRC_MCFG_0 (OMAP34XX_SDRC_BASE+0x80)
+#define SDRC_MR_0 (OMAP34XX_SDRC_BASE+0x84)
+#define SDRC_ACTIM_CTRLA_0 (OMAP34XX_SDRC_BASE+0x9C)
+#define SDRC_ACTIM_CTRLB_0 (OMAP34XX_SDRC_BASE+0xA0)
+#define SDRC_ACTIM_CTRLA_1 (OMAP34XX_SDRC_BASE+0xC4)
+#define SDRC_ACTIM_CTRLB_1 (OMAP34XX_SDRC_BASE+0xC8)
+#define SDRC_RFR_CTRL (OMAP34XX_SDRC_BASE+0xA4)
+#define SDRC_RFR_CTRL (OMAP34XX_SDRC_BASE+0xA4)
+#define SDRC_MANUAL_0 (OMAP34XX_SDRC_BASE+0xA8)
+#define OMAP34XX_SDRC_CS0 0x80000000
+#define OMAP34XX_SDRC_CS1 0xA0000000
+#define CMD_NOP 0x0
+#define CMD_PRECHARGE 0x1
+#define CMD_AUTOREFRESH 0x2
+#define CMD_ENTR_PWRDOWN 0x3
+#define CMD_EXIT_PWRDOWN 0x4
+#define CMD_ENTR_SRFRSH 0x5
+#define CMD_CKE_HIGH 0x6
+#define CMD_CKE_LOW 0x7
+#define SOFTRESET BIT1
+#define SMART_IDLE (0x2 << 3)
+#define REF_ON_IDLE (0x1 << 6)
+
+/* timer regs offsets (32 bit regs) */
+#define TIDR 0x0 /* r */
+#define TIOCP_CFG 0x10 /* rw */
+#define TISTAT 0x14 /* r */
+#define TISR 0x18 /* rw */
+#define TIER 0x1C /* rw */
+#define TWER 0x20 /* rw */
+#define TCLR 0x24 /* rw */
+#define TCRR 0x28 /* rw */
+#define TLDR 0x2C /* rw */
+#define TTGR 0x30 /* rw */
+#define TWPS 0x34 /* r */
+#define TMAR 0x38 /* rw */
+#define TCAR1 0x3c /* r */
+#define TSICR 0x40 /* rw */
+#define TCAR2 0x44 /* r */
+#define GPT_EN ((0<<2)|BIT1|BIT0) /* enable sys_clk NO-prescale /1 */
+
+/* Watchdog */
+#define WWPS 0x34 /* r */
+#define WSPR 0x48 /* rw */
+#define WD_UNLOCK1 0xAAAA
+#define WD_UNLOCK2 0x5555
+
+/* PRCM */
+#define CM_FCLKEN_IVA2 0x48004000
+#define CM_CLKEN_PLL_IVA2 0x48004004
+#define CM_IDLEST_PLL_IVA2 0x48004024
+#define CM_CLKSEL1_PLL_IVA2 0x48004040
+#define CM_CLKSEL2_PLL_IVA2 0x48004044
+#define CM_CLKEN_PLL_MPU 0x48004904
+#define CM_IDLEST_PLL_MPU 0x48004924
+#define CM_CLKSEL1_PLL_MPU 0x48004940
+#define CM_CLKSEL2_PLL_MPU 0x48004944
+#define CM_FCLKEN1_CORE 0x48004a00
+#define CM_ICLKEN1_CORE 0x48004a10
+#define CM_ICLKEN2_CORE 0x48004a14
+#define CM_CLKSEL_CORE 0x48004a40
+#define CM_FCLKEN_GFX 0x48004b00
+#define CM_ICLKEN_GFX 0x48004b10
+#define CM_CLKSEL_GFX 0x48004b40
+#define CM_FCLKEN_WKUP 0x48004c00
+#define CM_ICLKEN_WKUP 0x48004c10
+#define CM_CLKSEL_WKUP 0x48004c40
+#define CM_IDLEST_WKUP 0x48004c20
+#define CM_CLKEN_PLL 0x48004d00
+#define CM_IDLEST_CKGEN 0x48004d20
+#define CM_CLKSEL1_PLL 0x48004d40
+#define CM_CLKSEL2_PLL 0x48004d44
+#define CM_CLKSEL3_PLL 0x48004d48
+#define CM_FCLKEN_DSS 0x48004e00
+#define CM_ICLKEN_DSS 0x48004e10
+#define CM_CLKSEL_DSS 0x48004e40
+#define CM_FCLKEN_CAM 0x48004f00
+#define CM_ICLKEN_CAM 0x48004f10
+#define CM_CLKSEL_CAM 0x48004F40
+#define CM_FCLKEN_PER 0x48005000
+#define CM_ICLKEN_PER 0x48005010
+#define CM_CLKSEL_PER 0x48005040
+#define CM_CLKSEL1_EMU 0x48005140
+
+#define PRM_CLKSEL 0x48306d40
+#define PRM_RSTCTRL 0x48307250
+#define PRM_CLKSRC_CTRL 0x48307270
+
+/* SMX-APE */
+#define PM_RT_APE_BASE_ADDR_ARM (SMX_APE_BASE + 0x10000)
+#define PM_GPMC_BASE_ADDR_ARM (SMX_APE_BASE + 0x12400)
+#define PM_OCM_RAM_BASE_ADDR_ARM (SMX_APE_BASE + 0x12800)
+#define PM_OCM_ROM_BASE_ADDR_ARM (SMX_APE_BASE + 0x12C00)
+#define PM_IVA2_BASE_ADDR_ARM (SMX_APE_BASE + 0x14000)
+
+#define RT_REQ_INFO_PERMISSION_1 (PM_RT_APE_BASE_ADDR_ARM + 0x68)
+#define RT_READ_PERMISSION_0 (PM_RT_APE_BASE_ADDR_ARM + 0x50)
+#define RT_WRITE_PERMISSION_0 (PM_RT_APE_BASE_ADDR_ARM + 0x58)
+#define RT_ADDR_MATCH_1 (PM_RT_APE_BASE_ADDR_ARM + 0x60)
+
+#define GPMC_REQ_INFO_PERMISSION_0 (PM_GPMC_BASE_ADDR_ARM + 0x48)
+#define GPMC_READ_PERMISSION_0 (PM_GPMC_BASE_ADDR_ARM + 0x50)
+#define GPMC_WRITE_PERMISSION_0 (PM_GPMC_BASE_ADDR_ARM + 0x58)
+
+#define OCM_REQ_INFO_PERMISSION_0 (PM_OCM_RAM_BASE_ADDR_ARM + 0x48)
+#define OCM_READ_PERMISSION_0 (PM_OCM_RAM_BASE_ADDR_ARM + 0x50)
+#define OCM_WRITE_PERMISSION_0 (PM_OCM_RAM_BASE_ADDR_ARM + 0x58)
+#define OCM_ADDR_MATCH_2 (PM_OCM_RAM_BASE_ADDR_ARM + 0x80)
+
+#define IVA2_REQ_INFO_PERMISSION_0 (PM_IVA2_BASE_ADDR_ARM + 0x48)
+#define IVA2_READ_PERMISSION_0 (PM_IVA2_BASE_ADDR_ARM + 0x50)
+#define IVA2_WRITE_PERMISSION_0 (PM_IVA2_BASE_ADDR_ARM + 0x58)
+
+#define IVA2_REQ_INFO_PERMISSION_1 (PM_IVA2_BASE_ADDR_ARM + 0x68)
+#define IVA2_READ_PERMISSION_1 (PM_IVA2_BASE_ADDR_ARM + 0x70)
+#define IVA2_WRITE_PERMISSION_1 (PM_IVA2_BASE_ADDR_ARM + 0x78)
+
+#define IVA2_REQ_INFO_PERMISSION_2 (PM_IVA2_BASE_ADDR_ARM + 0x88)
+#define IVA2_READ_PERMISSION_2 (PM_IVA2_BASE_ADDR_ARM + 0x90)
+#define IVA2_WRITE_PERMISSION_2 (PM_IVA2_BASE_ADDR_ARM + 0x98)
+
+#define IVA2_REQ_INFO_PERMISSION_3 (PM_IVA2_BASE_ADDR_ARM + 0xA8)
+#define IVA2_READ_PERMISSION_3 (PM_IVA2_BASE_ADDR_ARM + 0xB0)
+#define IVA2_WRITE_PERMISSION_3 (PM_IVA2_BASE_ADDR_ARM + 0xB8)
+
+/* I2C base */
+#define I2C_BASE1 (OMAP34XX_CORE_L4_IO_BASE + 0x70000)
+#define I2C_BASE2 (OMAP34XX_CORE_L4_IO_BASE + 0x72000)
+#define I2C_BASE3 (OMAP34XX_CORE_L4_IO_BASE + 0x60000)
+
+#endif
diff --git a/include/asm-arm/arch-omap3/i2c.h b/include/asm-arm/arch-omap3/i2c.h
new file mode 100644
index 0000000000..afcda5eb68
--- /dev/null
+++ b/include/asm-arm/arch-omap3/i2c.h
@@ -0,0 +1,131 @@
+/*
+ * (C) Copyright 2004-2006
+ * Texas Instruments, <www.ti.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#ifndef _OMAP34XX_I2C_H_
+#define _OMAP34XX_I2C_H_
+
+/* Get the i2c base addresses */
+#include <asm/arch/cpu.h>
+
+#define I2C_DEFAULT_BASE I2C_BASE1
+
+#define I2C_REV (0x00)
+#define I2C_IE (0x04)
+#define I2C_STAT (0x08)
+#define I2C_IV (0x0c)
+#define I2C_BUF (0x14)
+#define I2C_CNT (0x18)
+#define I2C_DATA (0x1c)
+#define I2C_SYSC (0x20)
+#define I2C_CON (0x24)
+#define I2C_OA (0x28)
+#define I2C_SA (0x2c)
+#define I2C_PSC (0x30)
+#define I2C_SCLL (0x34)
+#define I2C_SCLH (0x38)
+#define I2C_SYSTEST (0x3c)
+
+/* I2C masks */
+
+/* I2C Interrupt Enable Register (I2C_IE): */
+#define I2C_IE_GC_IE (1 << 5)
+#define I2C_IE_XRDY_IE (1 << 4) /* Transmit data ready interrupt enable */
+#define I2C_IE_RRDY_IE (1 << 3) /* Receive data ready interrupt enable */
+#define I2C_IE_ARDY_IE (1 << 2) /* Register access ready interrupt enable */
+#define I2C_IE_NACK_IE (1 << 1) /* No acknowledgment interrupt enable */
+#define I2C_IE_AL_IE (1 << 0) /* Arbitration lost interrupt enable */
+
+/* I2C Status Register (I2C_STAT): */
+
+#define I2C_STAT_SBD (1 << 15) /* Single byte data */
+#define I2C_STAT_BB (1 << 12) /* Bus busy */
+#define I2C_STAT_ROVR (1 << 11) /* Receive overrun */
+#define I2C_STAT_XUDF (1 << 10) /* Transmit underflow */
+#define I2C_STAT_AAS (1 << 9) /* Address as slave */
+#define I2C_STAT_GC (1 << 5)
+#define I2C_STAT_XRDY (1 << 4) /* Transmit data ready */
+#define I2C_STAT_RRDY (1 << 3) /* Receive data ready */
+#define I2C_STAT_ARDY (1 << 2) /* Register access ready */
+#define I2C_STAT_NACK (1 << 1) /* No acknowledgment interrupt enable */
+#define I2C_STAT_AL (1 << 0) /* Arbitration lost interrupt enable */
+
+
+/* I2C Interrupt Code Register (I2C_INTCODE): */
+
+#define I2C_INTCODE_MASK 7
+#define I2C_INTCODE_NONE 0
+#define I2C_INTCODE_AL 1 /* Arbitration lost */
+#define I2C_INTCODE_NAK 2 /* No acknowledgement/general call */
+#define I2C_INTCODE_ARDY 3 /* Register access ready */
+#define I2C_INTCODE_RRDY 4 /* Rcv data ready */
+#define I2C_INTCODE_XRDY 5 /* Xmit data ready */
+
+/* I2C Buffer Configuration Register (I2C_BUF): */
+
+#define I2C_BUF_RDMA_EN (1 << 15) /* Receive DMA channel enable */
+#define I2C_BUF_XDMA_EN (1 << 7) /* Transmit DMA channel enable */
+
+/* I2C Configuration Register (I2C_CON): */
+
+#define I2C_CON_EN (1 << 15) /* I2C module enable */
+#define I2C_CON_BE (1 << 14) /* Big endian mode */
+#define I2C_CON_STB (1 << 11) /* Start byte mode (master mode only) */
+#define I2C_CON_MST (1 << 10) /* Master/slave mode */
+#define I2C_CON_TRX (1 << 9) /* Transmitter/receiver mode (master mode only) */
+#define I2C_CON_XA (1 << 8) /* Expand address */
+#define I2C_CON_STP (1 << 1) /* Stop condition (master mode only) */
+#define I2C_CON_STT (1 << 0) /* Start condition (master mode only) */
+
+/* I2C System Test Register (I2C_SYSTEST): */
+
+#define I2C_SYSTEST_ST_EN (1 << 15) /* System test enable */
+#define I2C_SYSTEST_FREE (1 << 14) /* Free running mode (on breakpoint) */
+#define I2C_SYSTEST_TMODE_MASK (3 << 12) /* Test mode select */
+#define I2C_SYSTEST_TMODE_SHIFT (12) /* Test mode select */
+#define I2C_SYSTEST_SCL_I (1 << 3) /* SCL line sense input value */
+#define I2C_SYSTEST_SCL_O (1 << 2) /* SCL line drive output value */
+#define I2C_SYSTEST_SDA_I (1 << 1) /* SDA line sense input value */
+#define I2C_SYSTEST_SDA_O (1 << 0) /* SDA line drive output value */
+
+#define I2C_SCLL_SCLL (0)
+#define I2C_SCLL_SCLL_M (0xFF)
+#define I2C_SCLL_HSSCLL (8)
+#define I2C_SCLH_HSSCLL_M (0xFF)
+#define I2C_SCLH_SCLH (0)
+#define I2C_SCLH_SCLH_M (0xFF)
+#define I2C_SCLH_HSSCLH (8)
+#define I2C_SCLH_HSSCLH_M (0xFF)
+
+#define OMAP_I2C_STANDARD 100
+#define OMAP_I2C_FAST_MODE 400
+#define OMAP_I2C_HIGH_SPEED 3400
+
+#define SYSTEM_CLOCK_12 12000
+#define SYSTEM_CLOCK_13 13000
+#define SYSTEM_CLOCK_192 19200
+#define SYSTEM_CLOCK_96 96000
+
+#define I2C_IP_CLK SYSTEM_CLOCK_96
+#define I2C_PSC_MAX (0x0f)
+#define I2C_PSC_MIN (0x00)
+
+#endif
diff --git a/include/asm-arm/arch-omap3/mem.h b/include/asm-arm/arch-omap3/mem.h
new file mode 100644
index 0000000000..8c497c271c
--- /dev/null
+++ b/include/asm-arm/arch-omap3/mem.h
@@ -0,0 +1,434 @@
+/*
+ * (C) Copyright 2006
+ * Texas Instruments, <www.ti.com>
+ * Richard Woodruff <r-woodruff2@ti.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _OMAP34XX_MEM_H_
+#define _OMAP34XX_MEM_H_
+
+#define SDRC_CS0_OSET 0x0
+#define SDRC_CS1_OSET 0x30 /* mirror CS1 regs appear offset 0x30 from CS0 */
+
+#ifndef __ASSEMBLY__
+
+typedef enum {
+ STACKED = 0,
+ IP_DDR = 1,
+ COMBO_DDR = 2,
+ IP_SDR = 3,
+} mem_t;
+
+#endif
+
+/* set the 343x-SDRC incoming address convention */
+#if defined(SDRC_B_R_C)
+#define B_ALL (0 << 6) /* bank-row-column */
+#elif defined(SDRC_B1_R_B0_C)
+#define B_ALL (1 << 6) /* bank1-row-bank0-column */
+#elif defined(SDRC_R_B_C)
+#define B_ALL (2 << 6) /* row-bank-column */
+#endif
+
+/* Future memory combinations based on past */
+#define SDP_SDRC_MDCFG_MONO_DDR 0x0
+#define SDP_COMBO_MDCFG_0_DDR 0x0
+#define SDP_SDRC_MDCFG_0_SDR 0x0
+
+/* Slower full frequency range default timings for x32 operation*/
+#define SDP_SDRC_SHARING 0x00000100
+#define SDP_SDRC_MR_0_SDR 0x00000031
+
+#ifdef CONFIG_3430ZEBU
+#define SDP_SDRC_MDCFG_0_DDR (0x02582019|B_ALL) /* Infin ddr module */
+#else
+#define SDP_SDRC_MDCFG_0_DDR (0x02584019|B_ALL) /* Infin ddr module */
+#endif
+
+#define SDP_SDRC_MR_0_DDR 0x00000032
+
+/* optimized timings good for current shipping parts */
+#define SDP_3430_SDRC_RFR_CTRL_100MHz 0x0002da01
+#define SDP_3430_SDRC_RFR_CTRL_133MHz 0x0003de01 /* 7.8us/7.5ns - 50=0x3de */
+#define SDP_3430_SDRC_RFR_CTRL_165MHz 0x0004e201 /* 7.8us/6ns - 50=0x4e2 */
+
+#define DLL_OFFSET 0
+#define DLL_WRITEDDRCLKX2DIS 1
+#define DLL_ENADLL 1
+#define DLL_LOCKDLL 0
+#define DLL_DLLPHASE_72 0
+#define DLL_DLLPHASE_90 1
+
+#define SDP_SDRC_DLLAB_CTRL ((DLL_ENADLL << 3) | \
+ (DLL_LOCKDLL << 2) | (DLL_DLLPHASE_90 << 1))
+
+#ifdef CONFIG_3430LABRADOR
+/* Micron part of 3430 LABRADOR (133MHz optimized) ~ 7.5ns
+ * TDAL = Twr/Tck + Trp/tck = 15/7.5 + 22.5/7.5 = 2 + 3 = 5
+ * TDPL = 15/7.5 = 2
+ * TRRD = 15/7.5 = 2
+ * TRCD = 22.5/7.5 = 3
+ * TRP = 22.5/7.5 = 3
+ * TRAS = 45/7.5 = 6
+ * TRC = 75/7.5 = 10
+ * TRFC = 125/7.5 = 16.6->17
+ * ACTIMB
+ * TWTR = 1
+ * TCKE = 1
+ * TXSR = 138/7.5 = 18.3->19
+ * TXP = 25/7.5 = 3.3->4
+ */
+#define TDAL_133 5
+#define TDPL_133 2
+#define TRRD_133 2
+#define TRCD_133 3
+#define TRP_133 3
+#define TRAS_133 6
+#define TRC_133 10
+#define TRFC_133 17
+#define V_ACTIMA_133 ((TRFC_133 << 27) | (TRC_133 << 22) | (TRAS_133 << 18) \
+ |(TRP_133 << 15) | (TRCD_133 << 12) |(TRRD_133 << 9) |(TDPL_133 << 6) \
+ | (TDAL_133))
+
+#define TWTR_133 1
+#define TCKE_133 1
+#define TXSR_133 19
+#define TXP_133 4
+#define V_ACTIMB_133 ((TWTR_133 << 16) | (TCKE_133 << 12) | (TXP_133 << 8) \
+ | (TXSR_133 << 0))
+#else
+/* Infineon part of 3430SDP (133MHz optimized) ~ 7.5ns
+ * TDAL = Twr/Tck + Trp/tck = 15/7.5 + 22.5/7.5 = 2 + 3 = 5
+ * TDPL = 15/7.5 = 2
+ * TRRD = 15/2.5 = 2
+ * TRCD = 22.5/7.5 = 3
+ * TRP = 22.5/7.5 = 3
+ * TRAS = 45/7.5 = 6
+ * TRC = 65/7.5 = 8.6->9
+ * TRFC = 75/7.5 = 10
+ * ACTIMB
+ * TCKE = 2
+ * XSR = 120/7.5 = 16
+ */
+#define TDAL_133 5
+#define TDPL_133 2
+#define TRRD_133 2
+#define TRCD_133 3
+#define TRP_133 3
+#define TRAS_133 6
+#define TRC_133 9
+#define TRFC_133 10
+#define V_ACTIMA_133 ((TRFC_133 << 27) | (TRC_133 << 22) | (TRAS_133 << 18) \
+ |(TRP_133 << 15) | (TRCD_133 << 12) |(TRRD_133 << 9) |(TDPL_133 << 6) \
+ | (TDAL_133))
+
+#define TWTR_133 1
+#define TCKE_133 2
+#define TXP_133 2
+#define XSR_133 16
+#define V_ACTIMB_133 ((TCKE_133 << 12) | (XSR_133 << 0)) | \
+ (TXP_133 << 8) | (TWTR_133 << 16)
+
+#define V_ACTIMA_100 V_ACTIMA_133
+#define V_ACTIMB_100 V_ACTIMB_133
+#endif
+
+/* Infineon part of 3430SDP (165MHz optimized) 6.06ns
+ * ACTIMA
+ * TDAL = Twr/Tck + Trp/tck = 15/6 + 18/6 = 2.5 + 3 = 5.5 -> 6
+ * TDPL (Twr) = 15/6 = 2.5 -> 3
+ * TRRD = 12/6 = 2
+ * TRCD = 18/6 = 3
+ * TRP = 18/6 = 3
+ * TRAS = 42/6 = 7
+ * TRC = 60/6 = 10
+ * TRFC = 72/6 = 12
+ * ACTIMB
+ * TCKE = 2
+ * XSR = 120/6 = 20
+ */
+#define TDAL_165 6
+#define TDPL_165 3
+#define TRRD_165 2
+#define TRCD_165 3
+#define TRP_165 3
+#define TRAS_165 7
+#define TRC_165 10
+#define TRFC_165 12
+#define V_ACTIMA_165 ((TRFC_165 << 27) | (TRC_165 << 22) | (TRAS_165 << 18) \
+ | (TRP_165 << 15) | (TRCD_165 << 12) |(TRRD_165 << 9) | \
+ (TDPL_165 << 6) | (TDAL_165))
+
+#define TWTR_165 1
+#define TCKE_165 2
+#define TXP_165 2
+#define XSR_165 20
+#define V_ACTIMB_165 ((TCKE_165 << 12) | (XSR_165 << 0)) | \
+ (TXP_165 << 8) | (TWTR_165 << 16)
+
+/* New and compatability speed defines */
+#if defined(PRCM_CLK_CFG2_200MHZ) || defined(PRCM_CONFIG_II) || defined(PRCM_CONFIG_5B)
+# define L3_100MHZ /* Use with <= 100MHz SDRAM */
+#elif defined (PRCM_CLK_CFG2_266MHZ) || defined(PRCM_CONFIG_III) || defined(PRCM_CONFIG_5A)
+# define L3_133MHZ /* Use with <= 133MHz SDRAM*/
+#elif defined(PRCM_CLK_CFG2_332MHZ) || defined(PRCM_CONFIG_I) || defined(PRCM_CONFIG_2)
+# define L3_165MHZ /* Use with <= 165MHz SDRAM (L3=166 on 3430) */
+#endif
+
+#if defined(L3_100MHZ)
+# define SDP_SDRC_ACTIM_CTRLA_0 V_ACTIMA_100
+# define SDP_SDRC_ACTIM_CTRLB_0 V_ACTIMB_100
+# define SDP_SDRC_RFR_CTRL SDP_3430_SDRC_RFR_CTRL_100MHz
+#elif defined(L3_133MHZ)
+# define SDP_SDRC_ACTIM_CTRLA_0 V_ACTIMA_133
+# define SDP_SDRC_ACTIM_CTRLB_0 V_ACTIMB_133
+# define SDP_SDRC_RFR_CTRL SDP_3430_SDRC_RFR_CTRL_133MHz
+#elif defined(L3_165MHZ)
+# define SDP_SDRC_ACTIM_CTRLA_0 V_ACTIMA_165
+# define SDP_SDRC_ACTIM_CTRLB_0 V_ACTIMB_165
+# define SDP_SDRC_RFR_CTRL SDP_3430_SDRC_RFR_CTRL_165MHz
+#endif
+
+/*
+ * GPMC settings -
+ * Definitions is as per the following format
+ * # define <PART>_GPMC_CONFIG<x> <value>
+ * Where:
+ * PART is the part name e.g. STNOR - Intel Strata Flash
+ * x is GPMC config registers from 1 to 6 (there will be 6 macros)
+ * Value is corresponding value
+ *
+ * For every valid PRCM configuration there should be only one definition of
+ * the same. if values are independent of the board, this definition will be
+ * present in this file if values are dependent on the board, then this should
+ * go into corresponding mem-boardName.h file
+ *
+ * Currently valid part Names are (PART):
+ * STNOR - Intel Strata Flash
+ * SMNAND - Samsung NAND
+ * M_NAND - Micron Large page x16 NAND
+ * MPDB - H4 MPDB board
+ * SBNOR - Sibley NOR
+ * ONNAND - Samsung One NAND
+ *
+ * include/configs/file.h contains the defn - for all CS we are interested
+ * #define OMAP34XX_GPMC_CSx PART
+ * #define OMAP34XX_GPMC_CSx_SIZE Size
+ * #define OMAP34XX_GPMC_CSx_MAP Map
+ * Where:
+ * x - CS number
+ * PART - Part Name as defined above
+ * SIZE - how big is the mapping to be
+ * GPMC_SIZE_128M - 0x8
+ * GPMC_SIZE_64M - 0xC
+ * GPMC_SIZE_32M - 0xE
+ * GPMC_SIZE_16M - 0xF
+ * MAP - Map this CS to which address(GPMC address space)- Absolute address
+ * >>24 before being used.
+ */
+#define GPMC_SIZE_128M 0x8
+#define GPMC_SIZE_64M 0xC
+#define GPMC_SIZE_32M 0xE
+#define GPMC_SIZE_16M 0xF
+
+#if defined(L3_100MHZ)
+# define SMNAND_GPMC_CONFIG1 0x0
+# define SMNAND_GPMC_CONFIG2 0x00141400
+# define SMNAND_GPMC_CONFIG3 0x00141400
+# define SMNAND_GPMC_CONFIG4 0x0F010F01
+# define SMNAND_GPMC_CONFIG5 0x010C1414
+# define SMNAND_GPMC_CONFIG6 0x00000A80
+
+# define M_NAND_GPMC_CONFIG1 0x00001800
+# define M_NAND_GPMC_CONFIG2 0x00141400
+# define M_NAND_GPMC_CONFIG3 0x00141400
+# define M_NAND_GPMC_CONFIG4 0x0F010F01
+# define M_NAND_GPMC_CONFIG5 0x010C1414
+# define M_NAND_GPMC_CONFIG6 0x1f0f0A80
+
+# define STNOR_GPMC_CONFIG1 0x3
+# define STNOR_GPMC_CONFIG2 0x000f0f01
+# define STNOR_GPMC_CONFIG3 0x00050502
+# define STNOR_GPMC_CONFIG4 0x0C060C06
+# define STNOR_GPMC_CONFIG5 0x01131F1F
+# define STNOR_GPMC_CONFIG6 0x1F0F0000
+
+# define MPDB_GPMC_CONFIG1 0x00011000
+# define MPDB_GPMC_CONFIG2 0x001F1F00
+# define MPDB_GPMC_CONFIG3 0x00080802
+# define MPDB_GPMC_CONFIG4 0x1C091C09
+# define MPDB_GPMC_CONFIG5 0x031A1F1F
+# define MPDB_GPMC_CONFIG6 0x000003C2
+#endif
+
+#if defined(L3_133MHZ)
+# define SMNAND_GPMC_CONFIG1 0x00000800
+# define SMNAND_GPMC_CONFIG2 0x00141400
+# define SMNAND_GPMC_CONFIG3 0x00141400
+# define SMNAND_GPMC_CONFIG4 0x0F010F01
+# define SMNAND_GPMC_CONFIG5 0x010C1414
+# define SMNAND_GPMC_CONFIG6 0x1F0F0A80
+# define SMNAND_GPMC_CONFIG7 0x00000C44
+
+# define M_NAND_GPMC_CONFIG1 0x00001800 /* might reuse smnand, with |= 1000 */
+# define M_NAND_GPMC_CONFIG2 0x00141400
+# define M_NAND_GPMC_CONFIG3 0x00141400
+# define M_NAND_GPMC_CONFIG4 0x0F010F01
+# define M_NAND_GPMC_CONFIG5 0x010C1414
+# define M_NAND_GPMC_CONFIG6 0x1F0F0A80
+# define M_NAND_GPMC_CONFIG7 0x00000C44
+
+# define STNOR_GPMC_CONFIG1 0x1203
+# define STNOR_GPMC_CONFIG2 0x00151501
+# define STNOR_GPMC_CONFIG3 0x00060602
+# define STNOR_GPMC_CONFIG4 0x10081008
+# define STNOR_GPMC_CONFIG5 0x01131F1F
+# define STNOR_GPMC_CONFIG6 0x1F0F04c4
+
+# define SIBNOR_GPMC_CONFIG1 0x1200
+# define SIBNOR_GPMC_CONFIG2 0x001f1f00
+# define SIBNOR_GPMC_CONFIG3 0x00080802
+# define SIBNOR_GPMC_CONFIG4 0x1C091C09
+# define SIBNOR_GPMC_CONFIG5 0x01131F1F
+# define SIBNOR_GPMC_CONFIG6 0x1F0F03C2
+
+/* ES1 SDP and ES1 chip Debug FPGA */
+# define MPDB_GPMC_CONFIG1 0x00011000
+# define MPDB_GPMC_CONFIG2 0x001f1f01
+# define MPDB_GPMC_CONFIG3 0x00080803
+# define MPDB_GPMC_CONFIG4 0x1C091C09
+# define MPDB_GPMC_CONFIG5 0x041f1F1F
+# define MPDB_GPMC_CONFIG6 0x000004C4
+
+/* ES2 SDP and ES2 chip Debug FPGA */
+# define SDPV2_MPDB_GPMC_CONFIG1 0x00611200
+# define SDPV2_MPDB_GPMC_CONFIG2 0x001F1F01
+# define SDPV2_MPDB_GPMC_CONFIG3 0x00080803
+# define SDPV2_MPDB_GPMC_CONFIG4 0x1D091D09
+# define SDPV2_MPDB_GPMC_CONFIG5 0x041D1F1F
+# define SDPV2_MPDB_GPMC_CONFIG6 0x1D0904C4
+
+# define LAB_ENET_GPMC_CONFIG1 0x00611000
+# define LAB_ENET_GPMC_CONFIG2 0x001F1F01
+# define LAB_ENET_GPMC_CONFIG3 0x00080803
+# define LAB_ENET_GPMC_CONFIG4 0x1D091D09
+# define LAB_ENET_GPMC_CONFIG5 0x041D1F1F
+# define LAB_ENET_GPMC_CONFIG6 0x1D0904C4
+
+# define P2_GPMC_CONFIG1 0x0
+# define P2_GPMC_CONFIG2 0x0
+# define P2_GPMC_CONFIG3 0x0
+# define P2_GPMC_CONFIG4 0x0
+# define P2_GPMC_CONFIG5 0x0
+# define P2_GPMC_CONFIG6 0x0
+
+# define ONENAND_GPMC_CONFIG1 0x00001200
+# define ONENAND_GPMC_CONFIG2 0x000c0c01
+# define ONENAND_GPMC_CONFIG3 0x00030301
+# define ONENAND_GPMC_CONFIG4 0x0c040c04
+# define ONENAND_GPMC_CONFIG5 0x010C1010
+# define ONENAND_GPMC_CONFIG6 0x1F060000
+
+#endif /* endif L3_133MHZ */
+
+#if defined (L3_165MHZ)
+# define SMNAND_GPMC_CONFIG1 0x00000800
+# define SMNAND_GPMC_CONFIG2 0x00141400
+# define SMNAND_GPMC_CONFIG3 0x00141400
+# define SMNAND_GPMC_CONFIG4 0x0F010F01
+# define SMNAND_GPMC_CONFIG5 0x010C1414
+# define SMNAND_GPMC_CONFIG6 0x1F0F0A80
+# define SMNAND_GPMC_CONFIG7 0x00000C44
+
+# define M_NAND_GPMC_CONFIG1 0x00001800
+# define M_NAND_GPMC_CONFIG2 0x00141400
+# define M_NAND_GPMC_CONFIG3 0x00141400
+# define M_NAND_GPMC_CONFIG4 0x0F010F01
+# define M_NAND_GPMC_CONFIG5 0x010C1414
+# define M_NAND_GPMC_CONFIG6 0x1F0F0A80
+# define M_NAND_GPMC_CONFIG7 0x00000C44
+
+# define STNOR_GPMC_CONFIG1 0x3
+# define STNOR_GPMC_CONFIG2 0x00151501
+# define STNOR_GPMC_CONFIG3 0x00060602
+# define STNOR_GPMC_CONFIG4 0x11091109
+# define STNOR_GPMC_CONFIG5 0x01141F1F
+# define STNOR_GPMC_CONFIG6 0x1F0F04c4
+
+# define SIBNOR_GPMC_CONFIG1 0x1200
+# define SIBNOR_GPMC_CONFIG2 0x001f1f00
+# define SIBNOR_GPMC_CONFIG3 0x00080802
+# define SIBNOR_GPMC_CONFIG4 0x1C091C09
+# define SIBNOR_GPMC_CONFIG5 0x01131F1F
+# define SIBNOR_GPMC_CONFIG6 0x1F0F03C2
+
+# define SDPV2_MPDB_GPMC_CONFIG1 0x00611200
+# define SDPV2_MPDB_GPMC_CONFIG2 0x001F1F01
+# define SDPV2_MPDB_GPMC_CONFIG3 0x00080803
+# define SDPV2_MPDB_GPMC_CONFIG4 0x1D091D09
+# define SDPV2_MPDB_GPMC_CONFIG5 0x041D1F1F
+# define SDPV2_MPDB_GPMC_CONFIG6 0x1D0904C4
+
+# define MPDB_GPMC_CONFIG1 0x00011000
+# define MPDB_GPMC_CONFIG2 0x001f1f01
+# define MPDB_GPMC_CONFIG3 0x00080803
+# define MPDB_GPMC_CONFIG4 0x1c0b1c0a
+# define MPDB_GPMC_CONFIG5 0x041f1F1F
+# define MPDB_GPMC_CONFIG6 0x1F0F04C4
+
+# define P2_GPMC_CONFIG1 0x0
+# define P2_GPMC_CONFIG2 0x0
+# define P2_GPMC_CONFIG3 0x0
+# define P2_GPMC_CONFIG4 0x0
+# define P2_GPMC_CONFIG5 0x0
+# define P2_GPMC_CONFIG6 0x0
+
+# define ONENAND_GPMC_CONFIG1 0x00001200
+# define ONENAND_GPMC_CONFIG2 0x000F0F01
+# define ONENAND_GPMC_CONFIG3 0x00030301
+# define ONENAND_GPMC_CONFIG4 0x0F040F04
+# define ONENAND_GPMC_CONFIG5 0x010F1010
+# define ONENAND_GPMC_CONFIG6 0x1F060000
+
+#endif
+
+/* max number of GPMC Chip Selects */
+#define GPMC_MAX_CS 8
+/* max number of GPMC regs */
+#define GPMC_MAX_REG 7
+
+#define PISMO1_NOR 1
+#define PISMO1_NAND 2
+#define PISMO2_CS0 3
+#define PISMO2_CS1 4
+#define PISMO1_ONENAND 5
+#define DBG_MPDB 6
+#define PISMO2_NAND_CS0 7
+#define PISMO2_NAND_CS1 8
+
+/* make it readable for the gpmc_init */
+#define PISMO1_NOR_BASE FLASH_BASE
+#define PISMO1_NAND_BASE NAND_BASE
+#define PISMO2_CS0_BASE PISMO2_MAP1
+#define PISMO1_ONEN_BASE ONENAND_MAP
+#define DBG_MPDB_BASE DEBUG_BASE
+
+#endif /* endif _OMAP34XX_MEM_H_ */
diff --git a/include/asm-arm/arch-omap3/mux.h b/include/asm-arm/arch-omap3/mux.h
new file mode 100644
index 0000000000..6695ac353d
--- /dev/null
+++ b/include/asm-arm/arch-omap3/mux.h
@@ -0,0 +1,437 @@
+/*
+ * (C) Copyright 2006
+ * Texas Instruments, <www.ti.com>
+ * Syed Mohammed Khasim <x0khasim@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#ifndef _OMAP3430_MUX_H_
+#define _OMAP3430_MUX_H_
+
+/*
+ * OFF_PD - Off mode pull type down
+ * OFF_PU - Off mode pull type up
+ * OFF_OUT_PTD - Off Mode Mux low for OUT
+ * OFF_OUT_PTU - Off Mode Mux high for OUT
+ * OFF_IN - Off Mode Mux set to IN
+ * OFF_OUT - Off Mode Mux set to OUT
+ * OFF_EN - Off Mode Mux Enable
+ * IEN - Input Enable
+ * IDIS - Input Disable
+ * PTD - Pull type Down
+ * PTU - Pull type Up
+ * DIS - Pull type selection is inactive
+ * EN - Pull type selection is active
+ * M0 - Mode 0
+ */
+
+#define OFF_PD (1 << 12)
+#define OFF_PU (3 << 12)
+#define OFF_OUT_PTD (0 << 11)
+#define OFF_OUT_PTU (1 << 11)
+#define OFF_IN (1 << 10)
+#define OFF_OUT (0 << 10)
+#define OFF_EN (1 << 9)
+
+#define IEN (1 << 8)
+#define IDIS (0 << 8)
+#define PTU (1 << 4)
+#define PTD (0 << 4)
+#define EN (1 << 3)
+#define DIS (0 << 3)
+
+#define M0 0
+#define M1 1
+#define M2 2
+#define M3 3
+#define M4 4
+#define M5 5
+#define M6 6
+#define M7 7
+
+#ifdef CONFIG_OFF_PADCONF
+#define OFF_IN_PD (OFF_PD | OFF_IN | OFF_EN)
+#define OFF_IN_PU (OFF_PU | OFF_IN | OFF_EN)
+#define OFF_OUT_PD (OFF_OUT_PTD | OFF_OUT | OFF_EN)
+#define OFF_OUT_PU (OFF_OUT_PTU | OFF_OUT | OFF_EN)
+#else
+#define OFF_IN_PD 0
+#define OFF_IN_PU 0
+#define OFF_OUT_PD 0
+#define OFF_OUT_PU 0
+#endif /* #ifdef CONFIG_OFF_PADCONF */
+
+/*
+ * To get the actual address the offset has to added
+ * with OMAP34XX_CTRL_BASE to get the actual address
+ */
+
+/*SDRC*/
+#define CONTROL_PADCONF_SDRC_D0 0x0030
+#define CONTROL_PADCONF_SDRC_D1 0x0032
+#define CONTROL_PADCONF_SDRC_D2 0x0034
+#define CONTROL_PADCONF_SDRC_D3 0x0036
+#define CONTROL_PADCONF_SDRC_D4 0x0038
+#define CONTROL_PADCONF_SDRC_D5 0x003A
+#define CONTROL_PADCONF_SDRC_D6 0x003C
+#define CONTROL_PADCONF_SDRC_D7 0x003E
+#define CONTROL_PADCONF_SDRC_D8 0x0040
+#define CONTROL_PADCONF_SDRC_D9 0x0042
+#define CONTROL_PADCONF_SDRC_D10 0x0044
+#define CONTROL_PADCONF_SDRC_D11 0x0046
+#define CONTROL_PADCONF_SDRC_D12 0x0048
+#define CONTROL_PADCONF_SDRC_D13 0x004A
+#define CONTROL_PADCONF_SDRC_D14 0x004C
+#define CONTROL_PADCONF_SDRC_D15 0x004E
+#define CONTROL_PADCONF_SDRC_D16 0x0050
+#define CONTROL_PADCONF_SDRC_D17 0x0052
+#define CONTROL_PADCONF_SDRC_D18 0x0054
+#define CONTROL_PADCONF_SDRC_D19 0x0056
+#define CONTROL_PADCONF_SDRC_D20 0x0058
+#define CONTROL_PADCONF_SDRC_D21 0x005A
+#define CONTROL_PADCONF_SDRC_D22 0x005C
+#define CONTROL_PADCONF_SDRC_D23 0x005E
+#define CONTROL_PADCONF_SDRC_D24 0x0060
+#define CONTROL_PADCONF_SDRC_D25 0x0062
+#define CONTROL_PADCONF_SDRC_D26 0x0064
+#define CONTROL_PADCONF_SDRC_D27 0x0066
+#define CONTROL_PADCONF_SDRC_D28 0x0068
+#define CONTROL_PADCONF_SDRC_D29 0x006A
+#define CONTROL_PADCONF_SDRC_D30 0x006C
+#define CONTROL_PADCONF_SDRC_D31 0x006E
+#define CONTROL_PADCONF_SDRC_CLK 0x0070
+#define CONTROL_PADCONF_SDRC_DQS0 0x0072
+#define CONTROL_PADCONF_SDRC_DQS1 0x0074
+#define CONTROL_PADCONF_SDRC_DQS2 0x0076
+#define CONTROL_PADCONF_SDRC_DQS3 0x0078
+/*GPMC*/
+#define CONTROL_PADCONF_GPMC_A1 0x007A
+#define CONTROL_PADCONF_GPMC_A2 0x007C
+#define CONTROL_PADCONF_GPMC_A3 0x007E
+#define CONTROL_PADCONF_GPMC_A4 0x0080
+#define CONTROL_PADCONF_GPMC_A5 0x0082
+#define CONTROL_PADCONF_GPMC_A6 0x0084
+#define CONTROL_PADCONF_GPMC_A7 0x0086
+#define CONTROL_PADCONF_GPMC_A8 0x0088
+#define CONTROL_PADCONF_GPMC_A9 0x008A
+#define CONTROL_PADCONF_GPMC_A10 0x008C
+#define CONTROL_PADCONF_GPMC_D0 0x008E
+#define CONTROL_PADCONF_GPMC_D1 0x0090
+#define CONTROL_PADCONF_GPMC_D2 0x0092
+#define CONTROL_PADCONF_GPMC_D3 0x0094
+#define CONTROL_PADCONF_GPMC_D4 0x0096
+#define CONTROL_PADCONF_GPMC_D5 0x0098
+#define CONTROL_PADCONF_GPMC_D6 0x009A
+#define CONTROL_PADCONF_GPMC_D7 0x009C
+#define CONTROL_PADCONF_GPMC_D8 0x009E
+#define CONTROL_PADCONF_GPMC_D9 0x00A0
+#define CONTROL_PADCONF_GPMC_D10 0x00A2
+#define CONTROL_PADCONF_GPMC_D11 0x00A4
+#define CONTROL_PADCONF_GPMC_D12 0x00A6
+#define CONTROL_PADCONF_GPMC_D13 0x00A8
+#define CONTROL_PADCONF_GPMC_D14 0x00AA
+#define CONTROL_PADCONF_GPMC_D15 0x00AC
+#define CONTROL_PADCONF_GPMC_nCS0 0x00AE
+#define CONTROL_PADCONF_GPMC_nCS1 0x00B0
+#define CONTROL_PADCONF_GPMC_nCS2 0x00B2
+#define CONTROL_PADCONF_GPMC_nCS3 0x00B4
+#define CONTROL_PADCONF_GPMC_nCS4 0x00B6
+#define CONTROL_PADCONF_GPMC_nCS5 0x00B8
+#define CONTROL_PADCONF_GPMC_nCS6 0x00BA
+#define CONTROL_PADCONF_GPMC_nCS7 0x00BC
+#define CONTROL_PADCONF_GPMC_CLK 0x00BE
+#define CONTROL_PADCONF_GPMC_nADV_ALE 0x00C0
+#define CONTROL_PADCONF_GPMC_nOE 0x00C2
+#define CONTROL_PADCONF_GPMC_nWE 0x00C4
+#define CONTROL_PADCONF_GPMC_nBE0_CLE 0x00C6
+#define CONTROL_PADCONF_GPMC_nBE1 0x00C8
+#define CONTROL_PADCONF_GPMC_nWP 0x00CA
+#define CONTROL_PADCONF_GPMC_WAIT0 0x00CC
+#define CONTROL_PADCONF_GPMC_WAIT1 0x00CE
+#define CONTROL_PADCONF_GPMC_WAIT2 0x00D0
+#define CONTROL_PADCONF_GPMC_WAIT3 0x00D2
+/*DSS*/
+#define CONTROL_PADCONF_DSS_PCLK 0x00D4
+#define CONTROL_PADCONF_DSS_HSYNC 0x00D6
+#define CONTROL_PADCONF_DSS_VSYNC 0x00D8
+#define CONTROL_PADCONF_DSS_ACBIAS 0x00DA
+#define CONTROL_PADCONF_DSS_DATA0 0x00DC
+#define CONTROL_PADCONF_DSS_DATA1 0x00DE
+#define CONTROL_PADCONF_DSS_DATA2 0x00E0
+#define CONTROL_PADCONF_DSS_DATA3 0x00E2
+#define CONTROL_PADCONF_DSS_DATA4 0x00E4
+#define CONTROL_PADCONF_DSS_DATA5 0x00E6
+#define CONTROL_PADCONF_DSS_DATA6 0x00E8
+#define CONTROL_PADCONF_DSS_DATA7 0x00EA
+#define CONTROL_PADCONF_DSS_DATA8 0x00EC
+#define CONTROL_PADCONF_DSS_DATA9 0x00EE
+#define CONTROL_PADCONF_DSS_DATA10 0x00F0
+#define CONTROL_PADCONF_DSS_DATA11 0x00F2
+#define CONTROL_PADCONF_DSS_DATA12 0x00F4
+#define CONTROL_PADCONF_DSS_DATA13 0x00F6
+#define CONTROL_PADCONF_DSS_DATA14 0x00F8
+#define CONTROL_PADCONF_DSS_DATA15 0x00FA
+#define CONTROL_PADCONF_DSS_DATA16 0x00FC
+#define CONTROL_PADCONF_DSS_DATA17 0x00FE
+#define CONTROL_PADCONF_DSS_DATA18 0x0100
+#define CONTROL_PADCONF_DSS_DATA19 0x0102
+#define CONTROL_PADCONF_DSS_DATA20 0x0104
+#define CONTROL_PADCONF_DSS_DATA21 0x0106
+#define CONTROL_PADCONF_DSS_DATA22 0x0108
+#define CONTROL_PADCONF_DSS_DATA23 0x010A
+/*CAMERA*/
+#define CONTROL_PADCONF_CAM_HS 0x010C
+#define CONTROL_PADCONF_CAM_VS 0x010E
+#define CONTROL_PADCONF_CAM_XCLKA 0x0110
+#define CONTROL_PADCONF_CAM_PCLK 0x0112
+#define CONTROL_PADCONF_CAM_FLD 0x0114
+#define CONTROL_PADCONF_CAM_D0 0x0116
+#define CONTROL_PADCONF_CAM_D1 0x0118
+#define CONTROL_PADCONF_CAM_D2 0x011A
+#define CONTROL_PADCONF_CAM_D3 0x011C
+#define CONTROL_PADCONF_CAM_D4 0x011E
+#define CONTROL_PADCONF_CAM_D5 0x0120
+#define CONTROL_PADCONF_CAM_D6 0x0122
+#define CONTROL_PADCONF_CAM_D7 0x0124
+#define CONTROL_PADCONF_CAM_D8 0x0126
+#define CONTROL_PADCONF_CAM_D9 0x0128
+#define CONTROL_PADCONF_CAM_D10 0x012A
+#define CONTROL_PADCONF_CAM_D11 0x012C
+#define CONTROL_PADCONF_CAM_XCLKB 0x012E
+#define CONTROL_PADCONF_CAM_WEN 0x0130
+#define CONTROL_PADCONF_CAM_STROBE 0x0132
+#define CONTROL_PADCONF_CSI2_DX0 0x0134
+#define CONTROL_PADCONF_CSI2_DY0 0x0136
+#define CONTROL_PADCONF_CSI2_DX1 0x0138
+#define CONTROL_PADCONF_CSI2_DY1 0x013A
+/*Audio Interface */
+#define CONTROL_PADCONF_McBSP2_FSX 0x013C
+#define CONTROL_PADCONF_McBSP2_CLKX 0x013E
+#define CONTROL_PADCONF_McBSP2_DR 0x0140
+#define CONTROL_PADCONF_McBSP2_DX 0x0142
+#define CONTROL_PADCONF_
+#define CONTROL_PADCONF_MMC1_CLK 0x0144
+#define CONTROL_PADCONF_MMC1_CMD 0x0146
+#define CONTROL_PADCONF_MMC1_DAT0 0x0148
+#define CONTROL_PADCONF_MMC1_DAT1 0x014A
+#define CONTROL_PADCONF_MMC1_DAT2 0x014C
+#define CONTROL_PADCONF_MMC1_DAT3 0x014E
+#define CONTROL_PADCONF_MMC1_DAT4 0x0150
+#define CONTROL_PADCONF_MMC1_DAT5 0x0152
+#define CONTROL_PADCONF_MMC1_DAT6 0x0154
+#define CONTROL_PADCONF_MMC1_DAT7 0x0156
+/*Wireless LAN */
+#define CONTROL_PADCONF_MMC2_CLK 0x0158
+#define CONTROL_PADCONF_MMC2_CMD 0x015A
+#define CONTROL_PADCONF_MMC2_DAT0 0x015C
+#define CONTROL_PADCONF_MMC2_DAT1 0x015E
+#define CONTROL_PADCONF_MMC2_DAT2 0x0160
+#define CONTROL_PADCONF_MMC2_DAT3 0x0162
+#define CONTROL_PADCONF_MMC2_DAT4 0x0164
+#define CONTROL_PADCONF_MMC2_DAT5 0x0166
+#define CONTROL_PADCONF_MMC2_DAT6 0x0168
+#define CONTROL_PADCONF_MMC2_DAT7 0x016A
+/*Bluetooth*/
+#define CONTROL_PADCONF_McBSP3_DX 0x016C
+#define CONTROL_PADCONF_McBSP3_DR 0x016E
+#define CONTROL_PADCONF_McBSP3_CLKX 0x0170
+#define CONTROL_PADCONF_McBSP3_FSX 0x0172
+#define CONTROL_PADCONF_UART2_CTS 0x0174
+#define CONTROL_PADCONF_UART2_RTS 0x0176
+#define CONTROL_PADCONF_UART2_TX 0x0178
+#define CONTROL_PADCONF_UART2_RX 0x017A
+/*Modem Interface */
+#define CONTROL_PADCONF_UART1_TX 0x017C
+#define CONTROL_PADCONF_UART1_RTS 0x017E
+#define CONTROL_PADCONF_UART1_CTS 0x0180
+#define CONTROL_PADCONF_UART1_RX 0x0182
+#define CONTROL_PADCONF_McBSP4_CLKX 0x0184
+#define CONTROL_PADCONF_McBSP4_DR 0x0186
+#define CONTROL_PADCONF_McBSP4_DX 0x0188
+#define CONTROL_PADCONF_McBSP4_FSX 0x018A
+#define CONTROL_PADCONF_McBSP1_CLKR 0x018C
+#define CONTROL_PADCONF_McBSP1_FSR 0x018E
+#define CONTROL_PADCONF_McBSP1_DX 0x0190
+#define CONTROL_PADCONF_McBSP1_DR 0x0192
+#define CONTROL_PADCONF_McBSP_CLKS 0x0194
+#define CONTROL_PADCONF_McBSP1_FSX 0x0196
+#define CONTROL_PADCONF_McBSP1_CLKX 0x0198
+/*Serial Interface*/
+#define CONTROL_PADCONF_UART3_CTS_RCTX 0x019A
+#define CONTROL_PADCONF_UART3_RTS_SD 0x019C
+#define CONTROL_PADCONF_UART3_RX_IRRX 0x019E
+#define CONTROL_PADCONF_UART3_TX_IRTX 0x01A0
+#define CONTROL_PADCONF_HSUSB0_CLK 0x01A2
+#define CONTROL_PADCONF_HSUSB0_STP 0x01A4
+#define CONTROL_PADCONF_HSUSB0_DIR 0x01A6
+#define CONTROL_PADCONF_HSUSB0_NXT 0x01A8
+#define CONTROL_PADCONF_HSUSB0_DATA0 0x01AA
+#define CONTROL_PADCONF_HSUSB0_DATA1 0x01AC
+#define CONTROL_PADCONF_HSUSB0_DATA2 0x01AE
+#define CONTROL_PADCONF_HSUSB0_DATA3 0x01B0
+#define CONTROL_PADCONF_HSUSB0_DATA4 0x01B2
+#define CONTROL_PADCONF_HSUSB0_DATA5 0x01B4
+#define CONTROL_PADCONF_HSUSB0_DATA6 0x01B6
+#define CONTROL_PADCONF_HSUSB0_DATA7 0x01B8
+#define CONTROL_PADCONF_I2C1_SCL 0x01BA
+#define CONTROL_PADCONF_I2C1_SDA 0x01BC
+#define CONTROL_PADCONF_I2C2_SCL 0x01BE
+#define CONTROL_PADCONF_I2C2_SDA 0x01C0
+#define CONTROL_PADCONF_I2C3_SCL 0x01C2
+#define CONTROL_PADCONF_I2C3_SDA 0x01C4
+#define CONTROL_PADCONF_I2C4_SCL 0x0A00
+#define CONTROL_PADCONF_I2C4_SDA 0x0A02
+#define CONTROL_PADCONF_HDQ_SIO 0x01C6
+#define CONTROL_PADCONF_McSPI1_CLK 0x01C8
+#define CONTROL_PADCONF_McSPI1_SIMO 0x01CA
+#define CONTROL_PADCONF_McSPI1_SOMI 0x01CC
+#define CONTROL_PADCONF_McSPI1_CS0 0x01CE
+#define CONTROL_PADCONF_McSPI1_CS1 0x01D0
+#define CONTROL_PADCONF_McSPI1_CS2 0x01D2
+#define CONTROL_PADCONF_McSPI1_CS3 0x01D4
+#define CONTROL_PADCONF_McSPI2_CLK 0x01D6
+#define CONTROL_PADCONF_McSPI2_SIMO 0x01D8
+#define CONTROL_PADCONF_McSPI2_SOMI 0x01DA
+#define CONTROL_PADCONF_McSPI2_CS0 0x01DC
+#define CONTROL_PADCONF_McSPI2_CS1 0x01DE
+/*Control and debug */
+#define CONTROL_PADCONF_SYS_32K 0x0A04
+#define CONTROL_PADCONF_SYS_CLKREQ 0x0A06
+#define CONTROL_PADCONF_SYS_nIRQ 0x01E0
+#define CONTROL_PADCONF_SYS_BOOT0 0x0A0A
+#define CONTROL_PADCONF_SYS_BOOT1 0x0A0C
+#define CONTROL_PADCONF_SYS_BOOT2 0x0A0E
+#define CONTROL_PADCONF_SYS_BOOT3 0x0A10
+#define CONTROL_PADCONF_SYS_BOOT4 0x0A12
+#define CONTROL_PADCONF_SYS_BOOT5 0x0A14
+#define CONTROL_PADCONF_SYS_BOOT6 0x0A16
+#define CONTROL_PADCONF_SYS_OFF_MODE 0x0A18
+#define CONTROL_PADCONF_SYS_CLKOUT1 0x0A1A
+#define CONTROL_PADCONF_SYS_CLKOUT2 0x01E2
+#define CONTROL_PADCONF_JTAG_nTRST 0x0A1C
+#define CONTROL_PADCONF_JTAG_TCK 0x0A1E
+#define CONTROL_PADCONF_JTAG_TMS 0x0A20
+#define CONTROL_PADCONF_JTAG_TDI 0x0A22
+#define CONTROL_PADCONF_JTAG_EMU0 0x0A24
+#define CONTROL_PADCONF_JTAG_EMU1 0x0A26
+
+#define CONTROL_PADCONF_ETK_CLK 0x0A28
+#define CONTROL_PADCONF_ETK_CTL 0x0A2A
+#define CONTROL_PADCONF_ETK_D0 0x0A2C
+#define CONTROL_PADCONF_ETK_D1 0x0A2E
+#define CONTROL_PADCONF_ETK_D2 0x0A30
+#define CONTROL_PADCONF_ETK_D3 0x0A32
+#define CONTROL_PADCONF_ETK_D4 0x0A34
+#define CONTROL_PADCONF_ETK_D5 0x0A36
+#define CONTROL_PADCONF_ETK_D6 0x0A38
+#define CONTROL_PADCONF_ETK_D7 0x0A3A
+#define CONTROL_PADCONF_ETK_D8 0x0A3C
+#define CONTROL_PADCONF_ETK_D9 0x0A3E
+#define CONTROL_PADCONF_ETK_D10 0x0A40
+#define CONTROL_PADCONF_ETK_D11 0x0A42
+#define CONTROL_PADCONF_ETK_D12 0x0A44
+#define CONTROL_PADCONF_ETK_D13 0x0A46
+#define CONTROL_PADCONF_ETK_D14 0x0A48
+#define CONTROL_PADCONF_ETK_D15 0x0A4A
+
+#define CONTROL_PADCONF_ETK_CLK_ES2 0x05D8
+#define CONTROL_PADCONF_ETK_CTL_ES2 0x05DA
+#define CONTROL_PADCONF_ETK_D0_ES2 0x05DC
+#define CONTROL_PADCONF_ETK_D1_ES2 0x05DE
+#define CONTROL_PADCONF_ETK_D2_ES2 0x05E0
+#define CONTROL_PADCONF_ETK_D3_ES2 0x05E2
+#define CONTROL_PADCONF_ETK_D4_ES2 0x05E4
+#define CONTROL_PADCONF_ETK_D5_ES2 0x05E6
+#define CONTROL_PADCONF_ETK_D6_ES2 0x05E8
+#define CONTROL_PADCONF_ETK_D7_ES2 0x05EA
+#define CONTROL_PADCONF_ETK_D8_ES2 0x05EC
+#define CONTROL_PADCONF_ETK_D9_ES2 0x05EE
+#define CONTROL_PADCONF_ETK_D10_ES2 0x05F0
+#define CONTROL_PADCONF_ETK_D11_ES2 0x05F2
+#define CONTROL_PADCONF_ETK_D12_ES2 0x05F4
+#define CONTROL_PADCONF_ETK_D13_ES2 0x05F6
+#define CONTROL_PADCONF_ETK_D14_ES2 0x05F8
+#define CONTROL_PADCONF_ETK_D15_ES2 0x05FA
+
+/*Die to Die */
+#define CONTROL_PADCONF_d2d_mcad0 0x01E4
+#define CONTROL_PADCONF_d2d_mcad1 0x01E6
+#define CONTROL_PADCONF_d2d_mcad2 0x01E8
+#define CONTROL_PADCONF_d2d_mcad3 0x01EA
+#define CONTROL_PADCONF_d2d_mcad4 0x01EC
+#define CONTROL_PADCONF_d2d_mcad5 0x01EE
+#define CONTROL_PADCONF_d2d_mcad6 0x01F0
+#define CONTROL_PADCONF_d2d_mcad7 0x01F2
+#define CONTROL_PADCONF_d2d_mcad8 0x01F4
+#define CONTROL_PADCONF_d2d_mcad9 0x01F6
+#define CONTROL_PADCONF_d2d_mcad10 0x01F8
+#define CONTROL_PADCONF_d2d_mcad11 0x01FA
+#define CONTROL_PADCONF_d2d_mcad12 0x01FC
+#define CONTROL_PADCONF_d2d_mcad13 0x01FE
+#define CONTROL_PADCONF_d2d_mcad14 0x0200
+#define CONTROL_PADCONF_d2d_mcad15 0x0202
+#define CONTROL_PADCONF_d2d_mcad16 0x0204
+#define CONTROL_PADCONF_d2d_mcad17 0x0206
+#define CONTROL_PADCONF_d2d_mcad18 0x0208
+#define CONTROL_PADCONF_d2d_mcad19 0x020A
+#define CONTROL_PADCONF_d2d_mcad20 0x020C
+#define CONTROL_PADCONF_d2d_mcad21 0x020E
+#define CONTROL_PADCONF_d2d_mcad22 0x0210
+#define CONTROL_PADCONF_d2d_mcad23 0x0212
+#define CONTROL_PADCONF_d2d_mcad24 0x0214
+#define CONTROL_PADCONF_d2d_mcad25 0x0216
+#define CONTROL_PADCONF_d2d_mcad26 0x0218
+#define CONTROL_PADCONF_d2d_mcad27 0x021A
+#define CONTROL_PADCONF_d2d_mcad28 0x021C
+#define CONTROL_PADCONF_d2d_mcad29 0x021E
+#define CONTROL_PADCONF_d2d_mcad30 0x0220
+#define CONTROL_PADCONF_d2d_mcad31 0x0222
+#define CONTROL_PADCONF_d2d_mcad32 0x0224
+#define CONTROL_PADCONF_d2d_mcad33 0x0226
+#define CONTROL_PADCONF_d2d_mcad34 0x0228
+#define CONTROL_PADCONF_d2d_mcad35 0x022A
+#define CONTROL_PADCONF_d2d_mcad36 0x022C
+#define CONTROL_PADCONF_d2d_clk26mi 0x022E
+#define CONTROL_PADCONF_d2d_nrespwron 0x0230
+#define CONTROL_PADCONF_d2d_nreswarm 0x0232
+#define CONTROL_PADCONF_d2d_arm9nirq 0x0234
+#define CONTROL_PADCONF_d2d_uma2p6fiq 0x0236
+#define CONTROL_PADCONF_d2d_spint 0x0238
+#define CONTROL_PADCONF_d2d_frint 0x023A
+#define CONTROL_PADCONF_d2d_dmareq0 0x023C
+#define CONTROL_PADCONF_d2d_dmareq1 0x023E
+#define CONTROL_PADCONF_d2d_dmareq2 0x0240
+#define CONTROL_PADCONF_d2d_dmareq3 0x0242
+#define CONTROL_PADCONF_d2d_n3gtrst 0x0244
+#define CONTROL_PADCONF_d2d_n3gtdi 0x0246
+#define CONTROL_PADCONF_d2d_n3gtdo 0x0248
+#define CONTROL_PADCONF_d2d_n3gtms 0x024A
+#define CONTROL_PADCONF_d2d_n3gtck 0x024C
+#define CONTROL_PADCONF_d2d_n3grtck 0x024E
+#define CONTROL_PADCONF_d2d_mstdby 0x0250
+#define CONTROL_PADCONF_d2d_swakeup 0x0A4C
+#define CONTROL_PADCONF_d2d_idlereq 0x0252
+#define CONTROL_PADCONF_d2d_idleack 0x0254
+#define CONTROL_PADCONF_d2d_mwrite 0x0256
+#define CONTROL_PADCONF_d2d_swrite 0x0258
+#define CONTROL_PADCONF_d2d_mread 0x025A
+#define CONTROL_PADCONF_d2d_sread 0x025C
+#define CONTROL_PADCONF_d2d_mbusflag 0x025E
+#define CONTROL_PADCONF_d2d_sbusflag 0x0260
+#define CONTROL_PADCONF_sdrc_cke0 0x0262
+#define CONTROL_PADCONF_sdrc_cke1 0x0264
+
+#endif
diff --git a/include/asm-arm/arch-omap3/omap3430.h b/include/asm-arm/arch-omap3/omap3430.h
new file mode 100644
index 0000000000..405346eef3
--- /dev/null
+++ b/include/asm-arm/arch-omap3/omap3430.h
@@ -0,0 +1,132 @@
+/*
+ * (C) Copyright 2006
+ * Texas Instruments, <www.ti.com>
+ * Richard Woodruff <r-woodruff2@ti.com>
+ * Syed Mohammed Khasim <x0khasim@ti.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _OMAP3430_SYS_H_
+#define _OMAP3430_SYS_H_
+
+#include <asm/arch/sizes.h>
+
+/*
+ * 3430 specific Section
+ */
+
+/* Stuff on L3 Interconnect */
+#define SMX_APE_BASE 0x68000000
+
+/* L3 Firewall */
+#define A_REQINFOPERM0 (SMX_APE_BASE + 0x05048)
+#define A_READPERM0 (SMX_APE_BASE + 0x05050)
+#define A_WRITEPERM0 (SMX_APE_BASE + 0x05058)
+
+/* GPMC */
+#define OMAP34XX_GPMC_BASE (0x6E000000)
+
+/* SMS */
+#define OMAP34XX_SMS_BASE 0x6C000000
+
+/* SDRC */
+#define OMAP34XX_SDRC_BASE 0x6D000000
+
+/*
+ * L4 Peripherals - L4 Wakeup and L4 Core now
+ */
+#define OMAP34XX_CORE_L4_IO_BASE 0x48000000
+
+#define OMAP34XX_WAKEUP_L4_IO_BASE 0x48300000
+
+#define OMAP34XX_L4_PER 0x49000000
+
+#define OMAP34XX_L4_IO_BASE OMAP34XX_CORE_L4_IO_BASE
+
+/* CONTROL */
+#define OMAP34XX_CTRL_BASE (OMAP34XX_L4_IO_BASE+0x2000)
+
+/* TAP information dont know for 3430*/
+#define OMAP34XX_TAP_BASE (0x49000000) /*giving some junk for virtio */
+
+/* UART */
+#define OMAP34XX_UART1 (OMAP34XX_L4_IO_BASE+0x6a000)
+#define OMAP34XX_UART2 (OMAP34XX_L4_IO_BASE+0x6c000)
+#define OMAP34XX_UART3 (OMAP34XX_L4_PER+0x20000)
+
+/* General Purpose Timers */
+#define OMAP34XX_GPT1 0x48318000
+#define OMAP34XX_GPT2 0x49032000
+#define OMAP34XX_GPT3 0x49034000
+#define OMAP34XX_GPT4 0x49036000
+#define OMAP34XX_GPT5 0x49038000
+#define OMAP34XX_GPT6 0x4903A000
+#define OMAP34XX_GPT7 0x4903C000
+#define OMAP34XX_GPT8 0x4903E000
+#define OMAP34XX_GPT9 0x49040000
+#define OMAP34XX_GPT10 0x48086000
+#define OMAP34XX_GPT11 0x48088000
+#define OMAP34XX_GPT12 0x48304000
+
+/* WatchDog Timers (1 secure, 3 GP) */
+#define WD1_BASE (0x4830C000)
+#define WD2_BASE (0x48314000)
+#define WD3_BASE (0x49030000)
+
+/* 32KTIMER */
+#define SYNC_32KTIMER_BASE (0x48320000)
+#define S32K_CR (SYNC_32KTIMER_BASE+0x10)
+
+/*
+ * SDP3430 specific Section
+ */
+
+/*
+ * The 343x's chip selects are programmable. The mask ROM
+ * does configure CS0 to 0x08000000 before dispatch. So, if
+ * you want your code to live below that address, you have to
+ * be prepared to jump though hoops, to reset the base address.
+ * Same as in SDP3430
+ */
+#ifdef CONFIG_OMAP34XX
+/* base address for indirect vectors (internal boot mode) */
+#define SRAM_OFFSET0 0x40000000
+#define SRAM_OFFSET1 0x00200000
+#define SRAM_OFFSET2 0x0000F800
+#define SRAM_VECT_CODE (SRAM_OFFSET0|SRAM_OFFSET1|SRAM_OFFSET2)
+#define LOW_LEVEL_SRAM_STACK 0x4020FFFC
+#endif
+
+#if defined(CONFIG_3430SDP)
+/* FPGA on Debug board.*/
+# define ETH_CONTROL_REG (DEBUG_BASE+0x30b)
+# define LAN_RESET_REGISTER (DEBUG_BASE+0x1c)
+
+# define DIP_SWITCH_INPUT_REG2 (DEBUG_BASE+0x60)
+# define LED_REGISTER (DEBUG_BASE+0x40)
+# define FPGA_REV_REGISTER (DEBUG_BASE+0x10)
+# define EEPROM_MAIN_BRD (DEBUG_BASE+0x10000+0x1800)
+# define EEPROM_CONN_BRD (DEBUG_BASE+0x10000+0x1900)
+# define EEPROM_UI_BRD (DEBUG_BASE+0x10000+0x1A00)
+# define EEPROM_MCAM_BRD (DEBUG_BASE+0x10000+0x1B00)
+# define ENHANCED_UI_EE_NAME "750-2075"
+#endif
+
+#endif /* _OMAP3430_SYS_H_ */
diff --git a/include/asm-arm/arch-omap3/rev.h b/include/asm-arm/arch-omap3/rev.h
new file mode 100644
index 0000000000..c0e95d4be1
--- /dev/null
+++ b/include/asm-arm/arch-omap3/rev.h
@@ -0,0 +1,43 @@
+/*
+ * (C) Copyright 2006
+ * Texas Instruments, <www.ti.com>
+ *
+ * Richard Woodruff <r-woodruff2@ti.com>
+ * Syed Mohammed Khasim <x0khasim@ti.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _OMAP34XX_REV_H_
+#define _OMAP34XX_REV_H_
+
+#define CDB_DDR_COMBO /* combo part on cpu daughter card */
+#define CDB_DDR_IPDB /* 2x16 parts on daughter card */
+
+#define DDR_100 100 /* type found on most mem d-boards */
+#define DDR_111 111 /* some combo parts */
+#define DDR_133 133 /* most combo, some mem d-boards */
+#define DDR_165 165 /* future parts */
+
+#define CPU_3430 0x3430
+
+#define CPU_3430_ES1 1
+#define CPU_3430_ES2 1
+
+#endif
diff --git a/include/asm-arm/arch-omap3/sizes.h b/include/asm-arm/arch-omap3/sizes.h
new file mode 100644
index 0000000000..aaba18f150
--- /dev/null
+++ b/include/asm-arm/arch-omap3/sizes.h
@@ -0,0 +1,49 @@
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+/* Size defintions
+ * Copyright (C) ARM Limited 1998. All rights reserved.
+ */
+
+#ifndef __sizes_h
+#define __sizes_h 1
+
+/* handy sizes */
+#define SZ_1K 0x00000400
+#define SZ_4K 0x00001000
+#define SZ_8K 0x00002000
+#define SZ_16K 0x00004000
+#define SZ_32K 0x00008000
+#define SZ_64K 0x00010000
+#define SZ_128K 0x00020000
+#define SZ_256K 0x00040000
+#define SZ_512K 0x00080000
+
+#define SZ_1M 0x00100000
+#define SZ_2M 0x00200000
+#define SZ_4M 0x00400000
+#define SZ_8M 0x00800000
+#define SZ_16M 0x01000000
+#define SZ_31M 0x01F00000
+#define SZ_32M 0x02000000
+#define SZ_64M 0x04000000
+#define SZ_128M 0x08000000
+#define SZ_256M 0x10000000
+#define SZ_512M 0x20000000
+
+#define SZ_1G 0x40000000
+#define SZ_2G 0x80000000
+
+#endif /* __sizes_h */
diff --git a/include/asm-arm/arch-omap3/sys_info.h b/include/asm-arm/arch-omap3/sys_info.h
new file mode 100644
index 0000000000..18e2b491c7
--- /dev/null
+++ b/include/asm-arm/arch-omap3/sys_info.h
@@ -0,0 +1,77 @@
+/*
+ * (C) Copyright 2006
+ * Texas Instruments, <www.ti.com>
+ * Richard Woodruff <r-woodruff2@ti.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _OMAP34XX_SYS_INFO_H_
+#define _OMAP34XX_SYS_INFO_H_
+
+#define XDR_POP 5 /* package on package part */
+#define SDR_DISCRETE 4 /* 128M memory SDR module*/
+#define DDR_STACKED 3 /* stacked part on 2422 */
+#define DDR_COMBO 2 /* combo part on cpu daughter card (menalaeus) */
+#define DDR_DISCRETE 1 /* 2x16 parts on daughter card */
+
+#define DDR_100 100 /* type found on most mem d-boards */
+#define DDR_111 111 /* some combo parts */
+#define DDR_133 133 /* most combo, some mem d-boards */
+#define DDR_165 165 /* future parts */
+
+#define CPU_3430 0x3430
+
+/* 343x real hardware:
+ * ES1 = rev 0
+ */
+
+/* 343x code defines:
+ * ES1 = 0+1 = 1
+ * ES1 = 1+1 = 1
+ */
+#define CPU_3430_ES1 1
+#define CPU_3430_ES2 2
+
+/* Currently Virtio models this one */
+#define CPU_3430_CHIPID 0x0B68A000
+
+#define GPMC_MUXED 1
+#define GPMC_NONMUXED 0
+
+#define TYPE_NAND 0x800 /* bit pos for nand in gpmc reg */
+#define TYPE_NOR 0x000
+#define TYPE_ONENAND 0x800
+
+#define WIDTH_8BIT 0x0000
+#define WIDTH_16BIT 0x1000 /* bit pos for 16 bit in gpmc */
+
+#define I2C_MENELAUS 0x72 /* i2c id for companion chip */
+#define I2C_TRITON2 0x4B /* addres of power group */
+
+#define BOOT_FAST_XIP 0x1f
+
+/* SDP definitions according to FPGA Rev. Is this OK?? */
+#define SDP_3430_V1 0x1
+#define SDP_3430_V2 0x2
+
+#define BOARD_3430_LABRADOR 0x80
+#define BOARD_3430_LABRADOR_V1 0x1
+
+#endif
diff --git a/include/asm-arm/arch-omap3/sys_proto.h b/include/asm-arm/arch-omap3/sys_proto.h
new file mode 100644
index 0000000000..7ac53a2018
--- /dev/null
+++ b/include/asm-arm/arch-omap3/sys_proto.h
@@ -0,0 +1,59 @@
+/*
+ * (C) Copyright 2004-2006
+ * Texas Instruments, <www.ti.com>
+ * Richard Woodruff <r-woodruff2@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR /PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#ifndef _OMAP34XX_SYS_PROTO_H_
+#define _OMAP34XX_SYS_PROTO_H_
+
+void prcm_init(void);
+void per_clocks_enable(void);
+
+void memif_init(void);
+void sdrc_init(void);
+void do_sdrc_init(u32,u32);
+void gpmc_init(void);
+
+void ether_init(void);
+void watchdog_init(void);
+void set_muxconf_regs(void);
+
+u32 get_cpu_type(void);
+u32 get_cpu_rev(void);
+u32 cpu_is_3410(void);
+u32 get_mem_type(void);
+u32 get_sysboot_value(void);
+u32 get_gpmc0_base(void);
+u32 is_gpmc_muxed(void);
+u32 get_gpmc0_type(void);
+u32 get_gpmc0_width(void);
+u32 get_board_type(void);
+void display_board_info(u32);
+void update_mux(u32,u32);
+u32 get_sdr_cs_size(u32 offset);
+u32 running_in_sdram(void);
+u32 running_in_sram(void);
+u32 running_in_flash(void);
+u32 running_from_internal_boot(void);
+u32 get_device_type(void);
+
+void sr32(u32 addr, u32 start_bit, u32 num_bits, u32 value);
+u32 wait_on_value(u32 read_bit_mask, u32 match_value, u32 read_addr, u32 bound);
+void sdelay(unsigned long loops);
+
+#endif
diff --git a/include/asm-arm/arch-pxa/hardware.h b/include/asm-arm/arch-pxa/hardware.h
index 3ff1d26145..c8c479a186 100644
--- a/include/asm-arm/arch-pxa/hardware.h
+++ b/include/asm-arm/arch-pxa/hardware.h
@@ -92,6 +92,10 @@ typedef struct { volatile u32 offset[4096]; } __regbase;
# define __REG2(x,y) (*(volatile u32 *)((u32)&__REG(x) + (y)))
# else
# define __REG(x) (x)
+# ifdef CONFIG_CPU_MONAHANS /* Hack to make this work with mona's pxa-regs.h */
+# define __REG_2(x) (x)
+# define __REG_3(x) (x)
+# endif
# endif
#endif /* UBOOT_REG_FIX */
diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h
index 41d37d791a..ebda7192ed 100644
--- a/include/asm-arm/arch-pxa/pxa-regs.h
+++ b/include/asm-arm/arch-pxa/pxa-regs.h
@@ -33,12 +33,21 @@ typedef void (*ExcpHndlr) (void) ;
/*
* PXA Chip selects
*/
+#ifdef CONFIG_CPU_MONAHANS
+#define PXA_CS0_PHYS 0x00000000 /* for both small and large same start */
+#define PXA_CS1_PHYS 0x04000000 /* Small partition start address (64MB) */
+#define PXA_CS1_LPHYS 0x30000000 /* Large partition start address (256MB) */
+#define PXA_CS2_PHYS 0x10000000 /* (64MB) */
+#define PXA_CS3_PHYS 0x14000000 /* (64MB) */
+#define PXA_PCMCIA_PHYS 0x20000000 /* (256MB) */
+#else
#define PXA_CS0_PHYS 0x00000000
#define PXA_CS1_PHYS 0x04000000
#define PXA_CS2_PHYS 0x08000000
#define PXA_CS3_PHYS 0x0C000000
#define PXA_CS4_PHYS 0x10000000
#define PXA_CS5_PHYS 0x14000000
+#endif /* CONFIG_CPU_MONAHANS */
/*
* Personal Computer Memory Card International Association (PCMCIA) sockets
@@ -49,10 +58,12 @@ typedef void (*ExcpHndlr) (void) ;
#define PCMCIAAttrSp PCMCIAPrtSp /* PCMCIA Attribute Space [byte] */
#define PCMCIAMemSp PCMCIAPrtSp /* PCMCIA Memory Space [byte] */
+#ifndef CONFIG_CPU_MONAHANS /* Monahans supports only one slot */
#define PCMCIA0Sp PCMCIASp /* PCMCIA 0 Space [byte] */
#define PCMCIA0IOSp PCMCIAIOSp /* PCMCIA 0 I/O Space [byte] */
#define PCMCIA0AttrSp PCMCIAAttrSp /* PCMCIA 0 Attribute Space [byte] */
#define PCMCIA0MemSp PCMCIAMemSp /* PCMCIA 0 Memory Space [byte] */
+#endif
#define PCMCIA1Sp PCMCIASp /* PCMCIA 1 Space [byte] */
#define PCMCIA1IOSp PCMCIAIOSp /* PCMCIA 1 I/O Space [byte] */
@@ -72,10 +83,12 @@ typedef void (*ExcpHndlr) (void) ;
#define _PCMCIA0Attr _PCMCIAAttr (0) /* PCMCIA 0 Attribute */
#define _PCMCIA0Mem _PCMCIAMem (0) /* PCMCIA 0 Memory */
+#ifndef CONFIG_CPU_MONAHANS /* Monahans supports only one slot */
#define _PCMCIA1 _PCMCIA (1) /* PCMCIA 1 */
#define _PCMCIA1IO _PCMCIAIO (1) /* PCMCIA 1 I/O */
#define _PCMCIA1Attr _PCMCIAAttr (1) /* PCMCIA 1 Attribute */
#define _PCMCIA1Mem _PCMCIAMem (1) /* PCMCIA 1 Memory */
+#endif
/*
* DMA Controller
@@ -96,6 +109,24 @@ typedef void (*ExcpHndlr) (void) ;
#define DCSR13 __REG(0x40000034) /* DMA Control / Status Register for Channel 13 */
#define DCSR14 __REG(0x40000038) /* DMA Control / Status Register for Channel 14 */
#define DCSR15 __REG(0x4000003c) /* DMA Control / Status Register for Channel 15 */
+#ifdef CONFIG_CPU_MONAHANS
+#define DCSR16 __REG(0x40000040) /* DMA Control / Status Register for Channel 16 */
+#define DCSR17 __REG(0x40000044) /* DMA Control / Status Register for Channel 17 */
+#define DCSR18 __REG(0x40000048) /* DMA Control / Status Register for Channel 18 */
+#define DCSR19 __REG(0x4000004c) /* DMA Control / Status Register for Channel 19 */
+#define DCSR20 __REG(0x40000050) /* DMA Control / Status Register for Channel 20 */
+#define DCSR21 __REG(0x40000054) /* DMA Control / Status Register for Channel 21 */
+#define DCSR22 __REG(0x40000058) /* DMA Control / Status Register for Channel 22 */
+#define DCSR23 __REG(0x4000005c) /* DMA Control / Status Register for Channel 23 */
+#define DCSR24 __REG(0x40000060) /* DMA Control / Status Register for Channel 24 */
+#define DCSR25 __REG(0x40000064) /* DMA Control / Status Register for Channel 25 */
+#define DCSR26 __REG(0x40000068) /* DMA Control / Status Register for Channel 26 */
+#define DCSR27 __REG(0x4000006c) /* DMA Control / Status Register for Channel 27 */
+#define DCSR28 __REG(0x40000070) /* DMA Control / Status Register for Channel 28 */
+#define DCSR29 __REG(0x40000074) /* DMA Control / Status Register for Channel 29 */
+#define DCSR30 __REG(0x40000078) /* DMA Control / Status Register for Channel 30 */
+#define DCSR31 __REG(0x4000007c) /* DMA Control / Status Register for Channel 31 */
+#endif /* CONFIG_CPU_MONAHANS */
#define DCSR(x) __REG2(0x40000000, (x) << 2)
@@ -103,7 +134,7 @@ typedef void (*ExcpHndlr) (void) ;
#define DCSR_NODESC (1 << 30) /* No-Descriptor Fetch (read / write) */
#define DCSR_STOPIRQEN (1 << 29) /* Stop Interrupt Enable (read / write) */
-#if defined(CONFIG_PXA27X)
+#if defined(CONFIG_PXA27X) || defined (CONFIG_CPU_MONAHANS)
#define DCSR_EORIRQEN (1 << 28) /* End of Receive Interrupt Enable (R/W) */
#define DCSR_EORJMPEN (1 << 27) /* Jump to next descriptor on EOR */
#define DCSR_EORSTOPEN (1 << 26) /* STOP on an EOR */
@@ -444,11 +475,11 @@ typedef void (*ExcpHndlr) (void) ;
#define ICR_ACKNAK 0x4 /* send ACK(0) or NAK(1) */
#define ICR_TB 0x8 /* transfer byte bit */
#define ICR_MA 0x10 /* master abort */
-#define ICR_SCLE 0x20 /* master clock enable */
+#define ICR_SCLE 0x20 /* master clock enable, mona SCLEA */
#define ICR_IUE 0x40 /* unit enable */
#define ICR_GCD 0x80 /* general call disable */
#define ICR_ITEIE 0x100 /* enable tx interrupts */
-#define ICR_IRFIE 0x200 /* enable rx interrupts */
+#define ICR_IRFIE 0x200 /* enable rx interrupts, mona: DRFIE */
#define ICR_BEIE 0x400 /* enable bus error ints */
#define ICR_SSDIE 0x800 /* slave STOP detected int enable */
#define ICR_ALDIE 0x1000 /* enable arbitration interrupt */
@@ -790,21 +821,21 @@ typedef void (*ExcpHndlr) (void) ;
#define RTAR __REG(0x40900004) /* RTC Alarm Register */
#define RTSR __REG(0x40900008) /* RTC Status Register */
#define RTTR __REG(0x4090000C) /* RTC Timer Trim Register */
-#define RDAR1 __REG(0x40900018) /* Wristwatch Day Alarm Reg 1 */
-#define RDAR2 __REG(0x40900020) /* Wristwatch Day Alarm Reg 2 */
-#define RYAR1 __REG(0x4090001C) /* Wristwatch Year Alarm Reg 1 */
-#define RYAR2 __REG(0x40900024) /* Wristwatch Year Alarm Reg 2 */
-#define SWAR1 __REG(0x4090002C) /* Stopwatch Alarm Register 1 */
-#define SWAR2 __REG(0x40900030) /* Stopwatch Alarm Register 2 */
-#define PIAR __REG(0x40900038) /* Periodic Interrupt Alarm Register */
-#define RDCR __REG(0x40900010) /* RTC Day Count Register. */
-#define RYCR __REG(0x40900014) /* RTC Year Count Register. */
-#define SWCR __REG(0x40900028) /* Stopwatch Count Register */
-#define RTCPICR __REG(0x40900034) /* Periodic Interrupt Counter Register */
-
-#define RTSR_PICE (1 << 15) /* Peridoc interrupt count enable */
-#define RTSR_PIALE (1 << 14) /* Peridoc interrupt Alarm enable */
-#define RTSR_PIAL (1 << 13) /* Peridoc interrupt Alarm status */
+#define RDAR1 __REG(0x40900018) /* Wristwatch Day Alarm Reg 1 */
+#define RDAR2 __REG(0x40900020) /* Wristwatch Day Alarm Reg 2 */
+#define RYAR1 __REG(0x4090001C) /* Wristwatch Year Alarm Reg 1 */
+#define RYAR2 __REG(0x40900024) /* Wristwatch Year Alarm Reg 2 */
+#define SWAR1 __REG(0x4090002C) /* Stopwatch Alarm Register 1 */
+#define SWAR2 __REG(0x40900030) /* Stopwatch Alarm Register 2 */
+#define PIAR __REG(0x40900038) /* Periodic Interrupt Alarm Register */
+#define RDCR __REG(0x40900010) /* RTC Day Count Register. */
+#define RYCR __REG(0x40900014) /* RTC Year Count Register. */
+#define SWCR __REG(0x40900028) /* Stopwatch Count Register */
+#define RTCPICR __REG(0x40900034) /* Periodic Interrupt Counter Register */
+
+#define RTSR_PICE (1 << 15) /* Peridoc interrupt count enable */
+#define RTSR_PIALE (1 << 14) /* Peridoc interrupt Alarm enable */
+#define RTSR_PIAL (1 << 13) /* Peridoc interrupt Alarm status */
#define RTSR_HZE (1 << 3) /* HZ interrupt enable */
#define RTSR_ALE (1 << 2) /* RTC alarm interrupt enable */
#define RTSR_HZ (1 << 1) /* HZ rising-edge detected */
@@ -813,15 +844,47 @@ typedef void (*ExcpHndlr) (void) ;
/*
* OS Timer & Match Registers
*/
-#define OSMR0 __REG(0x40A00000) /* */
-#define OSMR1 __REG(0x40A00004) /* */
-#define OSMR2 __REG(0x40A00008) /* */
-#define OSMR3 __REG(0x40A0000C) /* */
+#define OSMR0 __REG(0x40A00000) /* OS Timer Match Register 0 */
+#define OSMR1 __REG(0x40A00004) /* OS Timer Match Register 1 */
+#define OSMR2 __REG(0x40A00008) /* OS Timer Match Register 2 */
+#define OSMR3 __REG(0x40A0000C) /* OS Timer Match Register 3 */
#define OSCR __REG(0x40A00010) /* OS Timer Counter Register */
#define OSSR __REG(0x40A00014) /* OS Timer Status Register */
#define OWER __REG(0x40A00018) /* OS Timer Watchdog Enable Register */
#define OIER __REG(0x40A0001C) /* OS Timer Interrupt Enable Register */
+#ifdef CONFIG_CPU_MONAHANS
+#define OSCR4 __REG(0x40A00040) /* OS Timer Counter Register 4 */
+#define OSCR5 __REG(0x40A00044) /* OS Timer Counter Register 5 */
+#define OSCR6 __REG(0x40A00048) /* OS Timer Counter Register 6 */
+#define OSCR7 __REG(0x40A0004C) /* OS Timer Counter Register 7 */
+#define OSCR8 __REG(0x40A00050) /* OS Timer Counter Register 8 */
+#define OSCR9 __REG(0x40A00054) /* OS Timer Counter Register 9 */
+#define OSCR10 __REG(0x40A00058) /* OS Timer Counter Register 10 */
+#define OSCR11 __REG(0x40A0005C) /* OS Timer Counter Register 11 */
+
+#define OSMR4 __REG(0x40A00080) /* OS Timer Match Register 4 */
+#define OSMR5 __REG(0x40A00084) /* OS Timer Match Register 5 */
+#define OSMR6 __REG(0x40A00088) /* OS Timer Match Register 6 */
+#define OSMR7 __REG(0x40A0008C) /* OS Timer Match Register 7 */
+#define OSMR8 __REG(0x40A00090) /* OS Timer Match Register 8 */
+#define OSMR9 __REG(0x40A00094) /* OS Timer Match Register 9 */
+#define OSMR10 __REG(0x40A00098) /* OS Timer Match Register 10 */
+#define OSMR11 __REG(0x40A0009C) /* OS Timer Match Register 11 */
+
+#define OMCR4 __REG(0x40A000C0) /* OS Match Control Register 4 */
+#define OMCR5 __REG(0x40A000C4) /* OS Match Control Register 5 */
+#define OMCR6 __REG(0x40A000C8) /* OS Match Control Register 6 */
+#define OMCR7 __REG(0x40A000CC) /* OS Match Control Register 7 */
+#define OMCR8 __REG(0x40A000D0) /* OS Match Control Register 8 */
+#define OMCR9 __REG(0x40A000D4) /* OS Match Control Register 9 */
+#define OMCR10 __REG(0x40A000D8) /* OS Match Control Register 10 */
+#define OMCR11 __REG(0x40A000DC) /* OS Match Control Register 11 */
+
+#define OSCR_CLK_FREQ 3.250 /* MHz */
+#endif /* CONFIG_CPU_MONAHANS */
+
+#define OSSR_M4 (1 << 4) /* Match status channel 4 */
#define OSSR_M3 (1 << 3) /* Match status channel 3 */
#define OSSR_M2 (1 << 2) /* Match status channel 2 */
#define OSSR_M1 (1 << 1) /* Match status channel 1 */
@@ -829,6 +892,7 @@ typedef void (*ExcpHndlr) (void) ;
#define OWER_WME (1 << 0) /* Watchdog Match Enable */
+#define OIER_E4 (1 << 4) /* Interrupt enable channel 4 */
#define OIER_E3 (1 << 3) /* Interrupt enable channel 3 */
#define OIER_E2 (1 << 2) /* Interrupt enable channel 2 */
#define OIER_E1 (1 << 1) /* Interrupt enable channel 1 */
@@ -855,6 +919,20 @@ typedef void (*ExcpHndlr) (void) ;
#define ICPR __REG(0x40D00010) /* Interrupt Controller Pending Register */
#define ICCR __REG(0x40D00014) /* Interrupt Controller Control Register */
+#ifdef CONFIG_CPU_MONAHANS
+#define ICHP __REG(0x40D00018) /* Interrupt Controller Highest Priority Register */
+/* Missing: 32 Interrupt priority registers
+ * These are the same as beneath for PXA27x: maybe can be merged if
+ * GPIO Stuff is same too.
+ */
+#define ICIP2 __REG(0x40D0009C) /* Interrupt Controller IRQ Pending Register 2 */
+#define ICMR2 __REG(0x40D000A0) /* Interrupt Controller Mask Register 2 */
+#define ICLR2 __REG(0x40D000A4) /* Interrupt Controller Level Register 2 */
+#define ICFP2 __REG(0x40D000A8) /* Interrupt Controller FIQ Pending Register 2 */
+#define ICPR2 __REG(0x40D000AC) /* Interrupt Controller Pending Register 2 */
+/* Missing: 2 Interrupt priority registers */
+#endif /* CONFIG_CPU_MONAHANS */
+
/*
* General Purpose I/O
*/
@@ -886,12 +964,287 @@ typedef void (*ExcpHndlr) (void) ;
#define GEDR1 __REG(0x40E0004C) /* GPIO Edge Detect Status Register GPIO<63:32> */
#define GEDR2 __REG(0x40E00050) /* GPIO Edge Detect Status Register GPIO<80:64> */
+#ifdef CONFIG_CPU_MONAHANS
+#define GPLR3 __REG(0x40E00100) /* GPIO Pin-Level Register GPIO<127:96> */
+#define GPDR3 __REG(0x40E0010C) /* GPIO Pin Direction Register GPIO<127:96> */
+#define GPSR3 __REG(0x40E00118) /* GPIO Pin Output Set Register GPIO<127:96> */
+#define GPCR3 __REG(0x40E00124) /* GPIO Pin Output Clear Register GPIO<127:96> */
+#define GRER3 __REG(0x40E00130) /* GPIO Rising-Edge Detect Register GPIO<127:96> */
+#define GFER3 __REG(0x40E0013C) /* GPIO Falling-Edge Detect Register GPIO<127:96> */
+#define GEDR3 __REG(0x40E00148) /* GPIO Edge Detect Status Register GPIO<127:96> */
+
+#define GSDR0 __REG(0x40E00400) /* Bit-wise Set of GPDR[31:0] */
+#define GSDR1 __REG(0x40E00404) /* Bit-wise Set of GPDR[63:32] */
+#define GSDR2 __REG(0x40E00408) /* Bit-wise Set of GPDR[95:64] */
+#define GSDR3 __REG(0x40E0040C) /* Bit-wise Set of GPDR[127:96] */
+
+#define GCDR0 __REG(0x40E00420) /* Bit-wise Clear of GPDR[31:0] */
+#define GCDR1 __REG(0x40E00424) /* Bit-wise Clear of GPDR[63:32] */
+#define GCDR2 __REG(0x40E00428) /* Bit-wise Clear of GPDR[95:64] */
+#define GCDR3 __REG(0x40E0042C) /* Bit-wise Clear of GPDR[127:96] */
+
+#define GSRER0 __REG(0x40E00440) /* Set Rising Edge Det. Enable [31:0] */
+#define GSRER1 __REG(0x40E00444) /* Set Rising Edge Det. Enable [63:32] */
+#define GSRER2 __REG(0x40E00448) /* Set Rising Edge Det. Enable [95:64] */
+#define GSRER3 __REG(0x40E0044C) /* Set Rising Edge Det. Enable [127:96] */
+
+#define GCRER0 __REG(0x40E00460) /* Clear Rising Edge Det. Enable [31:0] */
+#define GCRER1 __REG(0x40E00464) /* Clear Rising Edge Det. Enable [63:32] */
+#define GCRER2 __REG(0x40E00468) /* Clear Rising Edge Det. Enable [95:64] */
+#define GCRER3 __REG(0x40E0046C) /* Clear Rising Edge Det. Enable[127:96] */
+
+#define GSFER0 __REG(0x40E00480) /* Set Falling Edge Det. Enable [31:0] */
+#define GSFER1 __REG(0x40E00484) /* Set Falling Edge Det. Enable [63:32] */
+#define GSFER2 __REG(0x40E00488) /* Set Falling Edge Det. Enable [95:64] */
+#define GSFER3 __REG(0x40E0048C) /* Set Falling Edge Det. Enable[127:96] */
+
+#define GCFER0 __REG(0x40E004A0) /* Clr Falling Edge Det. Enable [31:0] */
+#define GCFER1 __REG(0x40E004A4) /* Clr Falling Edge Det. Enable [63:32] */
+#define GCFER2 __REG(0x40E004A8) /* Clr Falling Edge Det. Enable [95:64] */
+#define GCFER3 __REG(0x40E004AC) /* Clr Falling Edge Det. Enable[127:96] */
+
+#define GSDR(x) __REG2(0x40E00400, ((x) & 0x60) >> 3)
+#define GCDR(x) __REG2(0x40300420, ((x) & 0x60) >> 3)
+
+/* Multi-funktion Pin Registers, uncomplete, only:
+ * - GPIO
+ * - Data Flash DF_* pins defined.
+ */
+#define GPIO0 __REG(0x40e10124)
+#define GPIO1 __REG(0x40e10128)
+#define GPIO2 __REG(0x40e1012c)
+#define GPIO3 __REG(0x40e10130)
+#define GPIO4 __REG(0x40e10134)
+#define nXCVREN __REG(0x40e10138)
+
+#define DF_CLE_NOE __REG(0x40e10204)
+#define DF_ALE_WE1 __REG(0x40e10208)
+
+#define DF_SCLK_E __REG(0x40e10210)
+#define nBE0 __REG(0x40e10214)
+#define nBE1 __REG(0x40e10218)
+#define DF_ALE_WE2 __REG(0x40e1021c)
+#define DF_INT_RnB __REG(0x40e10220)
+#define DF_nCS0 __REG(0x40e10224)
+#define DF_nCS1 __REG(0x40e10228)
+#define DF_nWE __REG(0x40e1022c)
+#define DF_nRE __REG(0x40e10230)
+#define nLUA __REG(0x40e10234)
+#define nLLA __REG(0x40e10238)
+#define DF_ADDR0 __REG(0x40e1023c)
+#define DF_ADDR1 __REG(0x40e10240)
+#define DF_ADDR2 __REG(0x40e10244)
+#define DF_ADDR3 __REG(0x40e10248)
+#define DF_IO0 __REG(0x40e1024c)
+#define DF_IO8 __REG(0x40e10250)
+#define DF_IO1 __REG(0x40e10254)
+#define DF_IO9 __REG(0x40e10258)
+#define DF_IO2 __REG(0x40e1025c)
+#define DF_IO10 __REG(0x40e10260)
+#define DF_IO3 __REG(0x40e10264)
+#define DF_IO11 __REG(0x40e10268)
+#define DF_IO4 __REG(0x40e1026c)
+#define DF_IO12 __REG(0x40e10270)
+#define DF_IO5 __REG(0x40e10274)
+#define DF_IO13 __REG(0x40e10278)
+#define DF_IO6 __REG(0x40e1027c)
+#define DF_IO14 __REG(0x40e10280)
+#define DF_IO7 __REG(0x40e10284)
+#define DF_IO15 __REG(0x40e10288)
+
+#define GPIO5 __REG(0x40e1028c)
+#define GPIO6 __REG(0x40e10290)
+#define GPIO7 __REG(0x40e10294)
+#define GPIO8 __REG(0x40e10298)
+#define GPIO9 __REG(0x40e1029c)
+
+#define GPIO11 __REG(0x40e102a0)
+#define GPIO12 __REG(0x40e102a4)
+#define GPIO13 __REG(0x40e102a8)
+#define GPIO14 __REG(0x40e102ac)
+#define GPIO15 __REG(0x40e102b0)
+#define GPIO16 __REG(0x40e102b4)
+#define GPIO17 __REG(0x40e102b8)
+#define GPIO18 __REG(0x40e102bc)
+#define GPIO19 __REG(0x40e102c0)
+#define GPIO20 __REG(0x40e102c4)
+#define GPIO21 __REG(0x40e102c8)
+#define GPIO22 __REG(0x40e102cc)
+#define GPIO23 __REG(0x40e102d0)
+#define GPIO24 __REG(0x40e102d4)
+#define GPIO25 __REG(0x40e102d8)
+#define GPIO26 __REG(0x40e102dc)
+
+#define GPIO27 __REG(0x40e10400)
+#define GPIO28 __REG(0x40e10404)
+#define GPIO29 __REG(0x40e10408)
+#define GPIO30 __REG(0x40e1040c)
+#define GPIO31 __REG(0x40e10410)
+#define GPIO32 __REG(0x40e10414)
+#define GPIO33 __REG(0x40e10418)
+#define GPIO34 __REG(0x40e1041c)
+#define GPIO35 __REG(0x40e10420)
+#define GPIO36 __REG(0x40e10424)
+#define GPIO37 __REG(0x40e10428)
+#define GPIO38 __REG(0x40e1042c)
+#define GPIO39 __REG(0x40e10430)
+#define GPIO40 __REG(0x40e10434)
+#define GPIO41 __REG(0x40e10438)
+#define GPIO42 __REG(0x40e1043c)
+#define GPIO43 __REG(0x40e10440)
+#define GPIO44 __REG(0x40e10444)
+#define GPIO45 __REG(0x40e10448)
+#define GPIO46 __REG(0x40e1044c)
+#define GPIO47 __REG(0x40e10450)
+#define GPIO48 __REG(0x40e10454)
+
+#define GPIO10 __REG(0x40e10458)
+
+#define GPIO49 __REG(0x40e1045c)
+#define GPIO50 __REG(0x40e10460)
+#define GPIO51 __REG(0x40e10464)
+#define GPIO52 __REG(0x40e10468)
+#define GPIO53 __REG(0x40e1046c)
+#define GPIO54 __REG(0x40e10470)
+#define GPIO55 __REG(0x40e10474)
+#define GPIO56 __REG(0x40e10478)
+#define GPIO57 __REG(0x40e1047c)
+#define GPIO58 __REG(0x40e10480)
+#define GPIO59 __REG(0x40e10484)
+#define GPIO60 __REG(0x40e10488)
+#define GPIO61 __REG(0x40e1048c)
+#define GPIO62 __REG(0x40e10490)
+
+#define GPIO6_2 __REG(0x40e10494)
+#define GPIO7_2 __REG(0x40e10498)
+#define GPIO8_2 __REG(0x40e1049c)
+#define GPIO9_2 __REG(0x40e104a0)
+#define GPIO10_2 __REG(0x40e104a4)
+#define GPIO11_2 __REG(0x40e104a8)
+#define GPIO12_2 __REG(0x40e104ac)
+#define GPIO13_2 __REG(0x40e104b0)
+
+#define GPIO63 __REG(0x40e104b4)
+#define GPIO64 __REG(0x40e104b8)
+#define GPIO65 __REG(0x40e104bc)
+#define GPIO66 __REG(0x40e104c0)
+#define GPIO67 __REG(0x40e104c4)
+#define GPIO68 __REG(0x40e104c8)
+#define GPIO69 __REG(0x40e104cc)
+#define GPIO70 __REG(0x40e104d0)
+#define GPIO71 __REG(0x40e104d4)
+#define GPIO72 __REG(0x40e104d8)
+#define GPIO73 __REG(0x40e104dc)
+
+#define GPIO14_2 __REG(0x40e104e0)
+#define GPIO15_2 __REG(0x40e104e4)
+#define GPIO16_2 __REG(0x40e104e8)
+#define GPIO17_2 __REG(0x40e104ec)
+
+#define GPIO74 __REG(0x40e104f0)
+#define GPIO75 __REG(0x40e104f4)
+#define GPIO76 __REG(0x40e104f8)
+#define GPIO77 __REG(0x40e104fc)
+#define GPIO78 __REG(0x40e10500)
+#define GPIO79 __REG(0x40e10504)
+#define GPIO80 __REG(0x40e10508)
+#define GPIO81 __REG(0x40e1050c)
+#define GPIO82 __REG(0x40e10510)
+#define GPIO83 __REG(0x40e10514)
+#define GPIO84 __REG(0x40e10518)
+#define GPIO85 __REG(0x40e1051c)
+#define GPIO86 __REG(0x40e10520)
+#define GPIO87 __REG(0x40e10524)
+#define GPIO88 __REG(0x40e10528)
+#define GPIO89 __REG(0x40e1052c)
+#define GPIO90 __REG(0x40e10530)
+#define GPIO91 __REG(0x40e10534)
+#define GPIO92 __REG(0x40e10538)
+#define GPIO93 __REG(0x40e1053c)
+#define GPIO94 __REG(0x40e10540)
+#define GPIO95 __REG(0x40e10544)
+#define GPIO96 __REG(0x40e10548)
+#define GPIO97 __REG(0x40e1054c)
+#define GPIO98 __REG(0x40e10550)
+
+#define GPIO99 __REG(0x40e10600)
+#define GPIO100 __REG(0x40e10604)
+#define GPIO101 __REG(0x40e10608)
+#define GPIO102 __REG(0x40e1060c)
+#define GPIO103 __REG(0x40e10610)
+#define GPIO104 __REG(0x40e10614)
+#define GPIO105 __REG(0x40e10618)
+#define GPIO106 __REG(0x40e1061c)
+#define GPIO107 __REG(0x40e10620)
+#define GPIO108 __REG(0x40e10624)
+#define GPIO109 __REG(0x40e10628)
+#define GPIO110 __REG(0x40e1062c)
+#define GPIO111 __REG(0x40e10630)
+#define GPIO112 __REG(0x40e10634)
+
+#define GPIO113 __REG(0x40e10638)
+#define GPIO114 __REG(0x40e1063c)
+#define GPIO115 __REG(0x40e10640)
+#define GPIO116 __REG(0x40e10644)
+#define GPIO117 __REG(0x40e10648)
+#define GPIO118 __REG(0x40e1064c)
+#define GPIO119 __REG(0x40e10650)
+#define GPIO120 __REG(0x40e10654)
+#define GPIO121 __REG(0x40e10658)
+#define GPIO122 __REG(0x40e1065c)
+#define GPIO123 __REG(0x40e10660)
+#define GPIO124 __REG(0x40e10664)
+#define GPIO125 __REG(0x40e10668)
+#define GPIO126 __REG(0x40e1066c)
+#define GPIO127 __REG(0x40e10670)
+
+#define GPIO0_2 __REG(0x40e10674)
+#define GPIO1_2 __REG(0x40e10678)
+#define GPIO2_2 __REG(0x40e1067c)
+#define GPIO3_2 __REG(0x40e10680)
+#define GPIO4_2 __REG(0x40e10684)
+#define GPIO5_2 __REG(0x40e10688)
+
+/* MFPR Bit Definitions, see 4-10, Vol. 1 */
+#define PULL_SEL 0x8000
+#define PULLUP_EN 0x4000
+#define PULLDOWN_EN 0x2000
+
+#define DRIVE_FAST_1mA 0x0
+#define DRIVE_FAST_2mA 0x400
+#define DRIVE_FAST_3mA 0x800
+#define DRIVE_FAST_4mA 0xC00
+#define DRIVE_SLOW_6mA 0x1000
+#define DRIVE_FAST_6mA 0x1400
+#define DRIVE_SLOW_10mA 0x1800
+#define DRIVE_FAST_10mA 0x1C00
+
+#define SLEEP_SEL 0x200
+#define SLEEP_DATA 0x100
+#define SLEEP_OE_N 0x80
+#define EDGE_CLEAR 0x40
+#define EDGE_FALL_EN 0x20
+#define EDGE_RISE_EN 0x10
+
+#define AF_SEL_0 0x0 /* Alternate function 0 (reset state) */
+#define AF_SEL_1 0x1 /* Alternate function 1 */
+#define AF_SEL_2 0x2 /* Alternate function 2 */
+#define AF_SEL_3 0x3 /* Alternate function 3 */
+#define AF_SEL_4 0x4 /* Alternate function 4 */
+#define AF_SEL_5 0x5 /* Alternate function 5 */
+#define AF_SEL_6 0x6 /* Alternate function 6 */
+#define AF_SEL_7 0x7 /* Alternate function 7 */
+
+
+#else /* CONFIG_CPU_MONAHANS */
+
#define GAFR0_L __REG(0x40E00054) /* GPIO Alternate Function Select Register GPIO<15:0> */
#define GAFR0_U __REG(0x40E00058) /* GPIO Alternate Function Select Register GPIO<31:16> */
#define GAFR1_L __REG(0x40E0005C) /* GPIO Alternate Function Select Register GPIO<47:32> */
#define GAFR1_U __REG(0x40E00060) /* GPIO Alternate Function Select Register GPIO<63:48> */
#define GAFR2_L __REG(0x40E00064) /* GPIO Alternate Function Select Register GPIO<79:64> */
#define GAFR2_U __REG(0x40E00068) /* GPIO Alternate Function Select Register GPIO 80 */
+#endif /* CONFIG_CPU_MONAHANS */
/* More handy macros. The argument is a literal GPIO number. */
@@ -1136,12 +1489,85 @@ typedef void (*ExcpHndlr) (void) ;
#define GPIO79_nCS_3_MD (79 | GPIO_ALT_FN_2_OUT)
#define GPIO80_nCS_4_MD (80 | GPIO_ALT_FN_2_OUT)
-#define GPIO117_SCL (117 | GPIO_ALT_FN_1_OUT)
-#define GPIO118_SDA (118 | GPIO_ALT_FN_1_OUT)
+#define GPIO117_SCL (117 | GPIO_ALT_FN_1_OUT)
+#define GPIO118_SDA (118 | GPIO_ALT_FN_1_OUT)
/*
* Power Manager
*/
+#ifdef CONFIG_CPU_MONAHANS
+
+#define ASCR __REG(0x40F40000) /* Application Subsystem Power Status/Control Register */
+#define ARSR __REG(0x40F40004) /* Application Subsystem Reset Status Register */
+#define AD3ER __REG(0x40F40008) /* Application Subsystem D3 state Wakeup Enable Register */
+#define AD3SR __REG(0x40F4000C) /* Application Subsystem D3 state Wakeup Status Register */
+#define AD2D0ER __REG(0x40F40010) /* Application Subsystem D2 to D0 state Wakeup Enable Register */
+#define AD2D0SR __REG(0x40F40014) /* Application Subsystem D2 to D0 state Wakeup Status Register */
+#define AD2D1ER __REG(0x40F40018) /* Application Subsystem D2 to D1 state Wakeup Enable Register */
+#define AD2D1SR __REG(0x40F4001C) /* Application Subsystem D2 to D1 state Wakeup Status Register */
+#define AD1D0ER __REG(0x40F40020) /* Application Subsystem D1 to D0 state Wakeup Enable Register */
+#define AD1D0SR __REG(0x40F40024) /* Application Subsystem D1 to D0 state Wakeup Status Register */
+#define ASDCNT __REG(0x40F40028) /* Application Subsystem SRAM Drowsy Count Register */
+#define AD3R __REG(0x40F40030) /* Application Subsystem D3 State Configuration Register */
+#define AD2R __REG(0x40F40034) /* Application Subsystem D2 State Configuration Register */
+#define AD1R __REG(0x40F40038) /* Application Subsystem D1 State Configuration Register */
+
+#define PMCR __REG(0x40F50000) /* Power Manager Control Register */
+#define PSR __REG(0x40F50004) /* Power Manager S2 Status Register */
+#define PSPR __REG(0x40F50008) /* Power Manager Scratch Pad Register */
+#define PCFR __REG(0x40F5000C) /* Power Manager General Configuration Register */
+#define PWER __REG(0x40F50010) /* Power Manager Wake-up Enable Register */
+#define PWSR __REG(0x40F50014) /* Power Manager Wake-up Status Register */
+#define PECR __REG(0x40F50018) /* Power Manager EXT_WAKEUP[1:0] Control Register */
+#define DCDCSR __REG(0x40F50080) /* DC-DC Controller Status Register */
+#define PVCR __REG(0x40F50100) /* Power Manager Voltage Change Control Register */
+#define PCMD(x) __REG(0x40F50110 + x*4)
+#define PCMD0 __REG(0x40F50110 + 0 * 4)
+#define PCMD1 __REG(0x40F50110 + 1 * 4)
+#define PCMD2 __REG(0x40F50110 + 2 * 4)
+#define PCMD3 __REG(0x40F50110 + 3 * 4)
+#define PCMD4 __REG(0x40F50110 + 4 * 4)
+#define PCMD5 __REG(0x40F50110 + 5 * 4)
+#define PCMD6 __REG(0x40F50110 + 6 * 4)
+#define PCMD7 __REG(0x40F50110 + 7 * 4)
+#define PCMD8 __REG(0x40F50110 + 8 * 4)
+#define PCMD9 __REG(0x40F50110 + 9 * 4)
+#define PCMD10 __REG(0x40F50110 + 10 * 4)
+#define PCMD11 __REG(0x40F50110 + 11 * 4)
+#define PCMD12 __REG(0x40F50110 + 12 * 4)
+#define PCMD13 __REG(0x40F50110 + 13 * 4)
+#define PCMD14 __REG(0x40F50110 + 14 * 4)
+#define PCMD15 __REG(0x40F50110 + 15 * 4)
+#define PCMD16 __REG(0x40F50110 + 16 * 4)
+#define PCMD17 __REG(0x40F50110 + 17 * 4)
+#define PCMD18 __REG(0x40F50110 + 18 * 4)
+#define PCMD19 __REG(0x40F50110 + 19 * 4)
+#define PCMD20 __REG(0x40F50110 + 20 * 4)
+#define PCMD21 __REG(0x40F50110 + 21 * 4)
+#define PCMD22 __REG(0x40F50110 + 22 * 4)
+#define PCMD23 __REG(0x40F50110 + 23 * 4)
+#define PCMD24 __REG(0x40F50110 + 24 * 4)
+#define PCMD25 __REG(0x40F50110 + 25 * 4)
+#define PCMD26 __REG(0x40F50110 + 26 * 4)
+#define PCMD27 __REG(0x40F50110 + 27 * 4)
+#define PCMD28 __REG(0x40F50110 + 28 * 4)
+#define PCMD29 __REG(0x40F50110 + 29 * 4)
+#define PCMD30 __REG(0x40F50110 + 30 * 4)
+#define PCMD31 __REG(0x40F50110 + 31 * 4)
+
+#define PCMD_MBC (1<<12)
+#define PCMD_DCE (1<<11)
+#define PCMD_LC (1<<10)
+#define PCMD_SQC (3<<8) /* only 00 and 01 are valid */
+
+#define PVCR_FVC (0x1 << 28)
+#define PVCR_VCSA (0x1<<14)
+#define PVCR_CommandDelay (0xf80)
+#define PVCR_ReadPointer (0x01f00000)
+#define PVCR_SlaveAddress (0x7f)
+
+#else /* ifdef CONFIG_CPU_MONAHANS */
+
#define PMCR __REG(0x40F00000) /* Power Manager Control Register */
#define PSSR __REG(0x40F00004) /* Power Manager Sleep Status Register */
#define PSPR __REG(0x40F00008) /* Power Manager Scratch Pad Register */
@@ -1225,6 +1651,8 @@ typedef void (*ExcpHndlr) (void) ;
#define RCSR_WDR (1 << 1) /* Watchdog Reset */
#define RCSR_HWR (1 << 0) /* Hardware Reset */
+#endif /* CONFIG_CPU_MONAHANS */
+
/*
* SSP Serial Port Registers
*/
@@ -1259,6 +1687,67 @@ typedef void (*ExcpHndlr) (void) ;
/*
* Core Clock
*/
+
+#if defined(CONFIG_CPU_MONAHANS)
+#define ACCR __REG(0x41340000) /* Application Subsystem Clock Configuration Register */
+#define ACSR __REG(0x41340004) /* Application Subsystem Clock Status Register */
+#define AICSR __REG(0x41340008) /* Application Subsystem Interrupt Control/Status Register */
+#define CKENA __REG(0x4134000C) /* A Clock Enable Register */
+#define CKENB __REG(0x41340010) /* B Clock Enable Register */
+#define AC97_DIV __REG(0x41340014) /* AC97 clock divisor value register */
+
+#define ACCR_SMC_MASK 0x03800000 /* Static Memory Controller Frequency Select */
+#define ACCR_SRAM_MASK 0x000c0000 /* SRAM Controller Frequency Select */
+#define ACCR_FC_MASK 0x00030000 /* Frequency Change Frequency Select */
+#define ACCR_HSIO_MASK 0x0000c000 /* High Speed IO Frequency Select */
+#define ACCR_DDR_MASK 0x00003000 /* DDR Memory Controller Frequency Select */
+#define ACCR_XN_MASK 0x00000700 /* Run Mode Frequency to Turbo Mode Frequency Multiplier */
+#define ACCR_XL_MASK 0x0000001f /* Crystal Frequency to Memory Frequency Multiplier */
+#define ACCR_XPDIS (1 << 31)
+#define ACCR_SPDIS (1 << 30)
+#define ACCR_13MEND1 (1 << 27)
+#define ACCR_D0CS (1 << 26)
+#define ACCR_13MEND2 (1 << 21)
+#define ACCR_PCCE (1 << 11)
+
+#define CKENA_30_MSL0 (1 << 30) /* MSL0 Interface Unit Clock Enable */
+#define CKENA_29_SSP4 (1 << 29) /* SSP3 Unit Clock Enable */
+#define CKENA_28_SSP3 (1 << 28) /* SSP2 Unit Clock Enable */
+#define CKENA_27_SSP2 (1 << 27) /* SSP1 Unit Clock Enable */
+#define CKENA_26_SSP1 (1 << 26) /* SSP0 Unit Clock Enable */
+#define CKENA_25_TSI (1 << 25) /* TSI Clock Enable */
+#define CKENA_24_AC97 (1 << 24) /* AC97 Unit Clock Enable */
+#define CKENA_23_STUART (1 << 23) /* STUART Unit Clock Enable */
+#define CKENA_22_FFUART (1 << 22) /* FFUART Unit Clock Enable */
+#define CKENA_21_BTUART (1 << 21) /* BTUART Unit Clock Enable */
+#define CKENA_20_UDC (1 << 20) /* UDC Clock Enable */
+#define CKENA_19_TPM (1 << 19) /* TPM Unit Clock Enable */
+#define CKENA_18_USIM1 (1 << 18) /* USIM1 Unit Clock Enable */
+#define CKENA_17_USIM0 (1 << 17) /* USIM0 Unit Clock Enable */
+#define CKENA_15_CIR (1 << 15) /* Consumer IR Clock Enable */
+#define CKENA_14_KEY (1 << 14) /* Keypad Controller Clock Enable */
+#define CKENA_13_MMC1 (1 << 13) /* MMC1 Clock Enable */
+#define CKENA_12_MMC0 (1 << 12) /* MMC0 Clock Enable */
+#define CKENA_11_FLASH (1 << 11) /* Boot ROM Clock Enable */
+#define CKENA_10_SRAM (1 << 10) /* SRAM Controller Clock Enable */
+#define CKENA_9_SMC (1 << 9) /* Static Memory Controller */
+#define CKENA_8_DMC (1 << 8) /* Dynamic Memory Controller */
+#define CKENA_7_GRAPHICS (1 << 7) /* 2D Graphics Clock Enable */
+#define CKENA_6_USBCLI (1 << 6) /* USB Client Unit Clock Enable */
+#define CKENA_4_NAND (1 << 4) /* NAND Flash Controller Clock Enable */
+#define CKENA_3_CAMERA (1 << 3) /* Camera Interface Clock Enable */
+#define CKENA_2_USBHOST (1 << 2) /* USB Host Unit Clock Enable */
+#define CKENA_1_LCD (1 << 1) /* LCD Unit Clock Enable */
+
+#define CKENB_8_1WIRE ((1 << 8) + 32) /* One Wire Interface Unit Clock Enable */
+#define CKENB_7_GPIO ((1 << 7) + 32) /* GPIO Clock Enable */
+#define CKENB_6_IRQ ((1 << 6) + 32) /* Interrupt Controller Clock Enable */
+#define CKENB_4_I2C ((1 << 4) + 32) /* I2C Unit Clock Enable */
+#define CKENB_1_PWM1 ((1 << 1) + 32) /* PWM2 & PWM3 Clock Enable */
+#define CKENB_0_PWM0 ((1 << 0) + 32) /* PWM0 & PWM1 Clock Enable */
+
+#else /* if defined CONFIG_CPU_MONAHANS */
+
#define CCCR __REG(0x41300000) /* Core Clock Configuration Register */
#define CKEN __REG(0x41300004) /* Clock Enable Register */
#define OSCC __REG(0x41300008) /* Oscillator Configuration Register */
@@ -1318,6 +1807,8 @@ typedef void (*ExcpHndlr) (void) ;
#define CCCR_N30 (0x6 << 7)
#endif
+#endif /* CONFIG_CPU_MONAHANS */
+
/*
* LCD
*/
@@ -1502,6 +1993,163 @@ typedef void (*ExcpHndlr) (void) ;
/*
* Memory controller
*/
+
+#ifdef CONFIG_CPU_MONAHANS
+/* Static Memory Controller Registers */
+#define MSC0 __REG_2(0x4A000008) /* Static Memory Control Register 0 */
+#define MSC1 __REG_2(0x4A00000C) /* Static Memory Control Register 1 */
+#define MECR __REG_2(0x4A000014) /* Expansion Memory (PCMCIA/Compact Flash) Bus Configuration */
+#define SXCNFG __REG_2(0x4A00001C) /* Synchronous Static Memory Control Register */
+#define MCMEM0 __REG_2(0x4A000028) /* Card interface Common Memory Space Socket 0 Timing */
+#define MCATT0 __REG_2(0x4A000030) /* Card interface Attribute Space Socket 0 Timing Configuration */
+#define MCIO0 __REG_2(0x4A000038) /* Card interface I/O Space Socket 0 Timing Configuration */
+#define MEMCLKCFG __REG_2(0x4A000068) /* SCLK speed configuration */
+#define CSADRCFG0 __REG_2(0x4A000080) /* Address Configuration for chip select 0 */
+#define CSADRCFG1 __REG_2(0x4A000084) /* Address Configuration for chip select 1 */
+#define CSADRCFG2 __REG_2(0x4A000088) /* Address Configuration for chip select 2 */
+#define CSADRCFG3 __REG_2(0x4A00008C) /* Address Configuration for chip select 3 */
+#define CSADRCFG_P __REG_2(0x4A000090) /* Address Configuration for pcmcia card interface */
+#define CSMSADRCFG __REG_2(0x4A0000A0) /* Master Address Configuration Register */
+#define CLK_RET_DEL __REG_2(0x4A0000B0) /* Delay line and mux selects for return data latching for sync. flash */
+#define ADV_RET_DEL __REG_2(0x4A0000B4) /* Delay line and mux selects for return data latching for sync. flash */
+
+/* Dynamic Memory Controller Registers */
+#define MDCNFG __REG_2(0x48100000) /* SDRAM Configuration Register 0 */
+#define MDREFR __REG_2(0x48100004) /* SDRAM Refresh Control Register */
+#define FLYCNFG __REG_2(0x48100020) /* Fly-by DMA DVAL[1:0] polarities */
+#define MDMRS __REG_2(0x48100040) /* MRS value to be written to SDRAM */
+#define DDR_SCAL __REG_2(0x48100050) /* Software Delay Line Calibration/Configuration for external DDR memory. */
+#define DDR_HCAL __REG_2(0x48100060) /* Hardware Delay Line Calibration/Configuration for external DDR memory. */
+#define DDR_WCAL __REG_2(0x48100068) /* DDR Write Strobe Calibration Register */
+#define DMCIER __REG_2(0x48100070) /* Dynamic MC Interrupt Enable Register. */
+#define DMCISR __REG_2(0x48100078) /* Dynamic MC Interrupt Status Register. */
+#define DDR_DLS __REG_2(0x48100080) /* DDR Delay Line Value Status register for external DDR memory. */
+#define EMPI __REG_2(0x48100090) /* EMPI Control Register */
+#define RCOMP __REG_2(0x48100100)
+#define PAD_MA __REG_2(0x48100110)
+#define PAD_MDMSB __REG_2(0x48100114)
+#define PAD_MDLSB __REG_2(0x48100118)
+#define PAD_DMEM __REG_2(0x4810011c)
+#define PAD_SDCLK __REG_2(0x48100120)
+#define PAD_SDCS __REG_2(0x48100124)
+#define PAD_SMEM __REG_2(0x48100128)
+#define PAD_SCLK __REG_2(0x4810012C)
+#define TAI __REG_2(0x48100F00) /* TAI Tavor Address Isolation Register */
+
+/* Some frequently used bits */
+#define MDCNFG_DMAP 0x80000000 /* SDRAM 1GB Memory Map Enable */
+#define MDCNFG_DMCEN 0x40000000 /* Enable Dynamic Memory Controller */
+#define MDCNFG_HWFREQ 0x20000000 /* Hardware Frequency Change Calibration */
+#define MDCNFG_DTYPE 0x400 /* SDRAM Type: 1=DDR SDRAM */
+
+#define MDCNFG_DTC_0 0x0 /* Timing Category of SDRAM */
+#define MDCNFG_DTC_1 0x100
+#define MDCNFG_DTC_2 0x200
+#define MDCNFG_DTC_3 0x300
+
+#define MDCNFG_DRAC_12 0x0 /* Number of Row Access Bits */
+#define MDCNFG_DRAC_13 0x20
+#define MDCNFG_DRAC_14 0x40
+
+#define MDCNFG_DCAC_9 0x0 /* Number of Column Acess Bits */
+#define MDCNFG_DCAC_10 0x08
+#define MDCNFG_DCAC_11 0x10
+
+#define MDCNFG_DBW_16 0x4 /* SDRAM Data Bus width 16bit */
+#define MDCNFG_DCSE1 0x2 /* SDRAM CS 1 Enable */
+#define MDCNFG_DCSE0 0x1 /* SDRAM CS 0 Enable */
+
+
+/* Data Flash Controller Registers */
+
+#define NDCR __REG(0x43100000) /* Data Flash Control register */
+#define NDTR0CS0 __REG(0x43100004) /* Data Controller Timing Parameter 0 Register for ND_nCS0 */
+/* #define NDTR0CS1 __REG(0x43100008) /\* Data Controller Timing Parameter 0 Register for ND_nCS1 *\/ */
+#define NDTR1CS0 __REG(0x4310000C) /* Data Controller Timing Parameter 1 Register for ND_nCS0 */
+/* #define NDTR1CS1 __REG(0x43100010) /\* Data Controller Timing Parameter 1 Register for ND_nCS1 *\/ */
+#define NDSR __REG(0x43100014) /* Data Controller Status Register */
+#define NDPCR __REG(0x43100018) /* Data Controller Page Count Register */
+#define NDBDR0 __REG(0x4310001C) /* Data Controller Bad Block Register 0 */
+#define NDBDR1 __REG(0x43100020) /* Data Controller Bad Block Register 1 */
+#define NDDB __REG(0x43100040) /* Data Controller Data Buffer */
+#define NDCB0 __REG(0x43100048) /* Data Controller Command Buffer0 */
+#define NDCB1 __REG(0x4310004C) /* Data Controller Command Buffer1 */
+#define NDCB2 __REG(0x43100050) /* Data Controller Command Buffer2 */
+
+#define NDCR_SPARE_EN (0x1<<31)
+#define NDCR_ECC_EN (0x1<<30)
+#define NDCR_DMA_EN (0x1<<29)
+#define NDCR_ND_RUN (0x1<<28)
+#define NDCR_DWIDTH_C (0x1<<27)
+#define NDCR_DWIDTH_M (0x1<<26)
+#define NDCR_PAGE_SZ (0x3<<24)
+#define NDCR_NCSX (0x1<<23)
+#define NDCR_ND_STOP (0x1<<22)
+/* reserved:
+ * #define NDCR_ND_MODE (0x3<<21)
+ * #define NDCR_NAND_MODE 0x0 */
+#define NDCR_CLR_PG_CNT (0x1<<20)
+#define NDCR_CLR_ECC (0x1<<19)
+#define NDCR_RD_ID_CNT (0x7<<16)
+#define NDCR_RA_START (0x1<<15)
+#define NDCR_PG_PER_BLK (0x1<<14)
+#define NDCR_ND_ARB_EN (0x1<<12)
+#define NDCR_RDYM (0x1<<11)
+#define NDCR_CS0_PAGEDM (0x1<<10)
+#define NDCR_CS1_PAGEDM (0x1<<9)
+#define NDCR_CS0_CMDDM (0x1<<8)
+#define NDCR_CS1_CMDDM (0x1<<7)
+#define NDCR_CS0_BBDM (0x1<<6)
+#define NDCR_CS1_BBDM (0x1<<5)
+#define NDCR_DBERRM (0x1<<4)
+#define NDCR_SBERRM (0x1<<3)
+#define NDCR_WRDREQM (0x1<<2)
+#define NDCR_RDDREQM (0x1<<1)
+#define NDCR_WRCMDREQM (0x1)
+
+#define NDSR_RDY (0x1<<11)
+#define NDSR_CS0_PAGED (0x1<<10)
+#define NDSR_CS1_PAGED (0x1<<9)
+#define NDSR_CS0_CMDD (0x1<<8)
+#define NDSR_CS1_CMDD (0x1<<7)
+#define NDSR_CS0_BBD (0x1<<6)
+#define NDSR_CS1_BBD (0x1<<5)
+#define NDSR_DBERR (0x1<<4)
+#define NDSR_SBERR (0x1<<3)
+#define NDSR_WRDREQ (0x1<<2)
+#define NDSR_RDDREQ (0x1<<1)
+#define NDSR_WRCMDREQ (0x1)
+
+#define NDCB0_AUTO_RS (0x1<<25)
+#define NDCB0_CSEL (0x1<<24)
+#define NDCB0_CMD_TYPE (0x7<<21)
+#define NDCB0_NC (0x1<<20)
+#define NDCB0_DBC (0x1<<19)
+#define NDCB0_ADDR_CYC (0x7<<16)
+#define NDCB0_CMD2 (0xff<<8)
+#define NDCB0_CMD1 (0xff)
+#define MCMEM(s) MCMEM0
+#define MCATT(s) MCATT0
+#define MCIO(s) MCIO0
+#define MECR_CIT (1 << 1)/* Card Is There: 0 -> no card, 1 -> card inserted */
+
+/* Maximum values for NAND Interface Timing Registers in DFC clock
+ * periods */
+#define DFC_MAX_tCH 7
+#define DFC_MAX_tCS 7
+#define DFC_MAX_tWH 7
+#define DFC_MAX_tWP 7
+#define DFC_MAX_tRH 7
+#define DFC_MAX_tRP 15
+#define DFC_MAX_tR 65535
+#define DFC_MAX_tWHR 15
+#define DFC_MAX_tAR 15
+
+#define DFC_CLOCK 104 /* DFC Clock is 104 MHz */
+#define DFC_CLK_PER_US DFC_CLOCK/1000 /* clock period in ns */
+
+#else /* CONFIG_CPU_MONAHANS */
+
#define MEMC_BASE __REG(0x48000000) /* Base of Memory Controller */
#define MDCNFG_OFFSET 0x0
#define MDREFR_OFFSET 0x4
@@ -1573,6 +2221,8 @@ typedef void (*ExcpHndlr) (void) ;
#define ARB_CORE_PARK (1<<24) /* Be parked with core when idle */
#define ARB_LOCK_FLAG (1<<23) /* Only Locking masters gain access to the bus */
+#endif /* CONFIG_CPU_MONAHANS */
+
/* Interrupt Controller */
#define ICIP2 __REG(0x40D0009C) /* Interrupt Controller IRQ Pending Register 2 */
@@ -1733,16 +2383,16 @@ typedef void (*ExcpHndlr) (void) ;
#define KPAS_SO (0x1 << 31)
#define KPASMKPx_SO (0x1 << 31)
-#define GPIO113_BIT (1 << 17)/* GPIO113 in GPSR, GPCR, bit 17 */
-#define PSLR __REG(0x40F00034)
-#define PSTR __REG(0x40F00038) /* Power Manager Standby Configuration Reg */
-#define PSNR __REG(0x40F0003C) /* Power Manager Sense Configuration Reg */
-#define PVCR __REG(0x40F00040) /* Power Manager Voltage Change Control Reg */
-#define PKWR __REG(0x40F00050) /* Power Manager KB Wake-Up Enable Reg */
-#define PKSR __REG(0x40F00054) /* Power Manager KB Level-Detect Status Reg */
-#define OSMR4 __REG(0x40A00080) /* */
-#define OSCR4 __REG(0x40A00040) /* OS Timer Counter Register */
-#define OMCR4 __REG(0x40A000C0) /* */
+#define GPIO113_BIT (1 << 17)/* GPIO113 in GPSR, GPCR, bit 17 */
+#define PSLR __REG(0x40F00034)
+#define PSTR __REG(0x40F00038) /* Power Manager Standby Configuration Reg */
+#define PSNR __REG(0x40F0003C) /* Power Manager Sense Configuration Reg */
+#define PVCR __REG(0x40F00040) /* Power Manager Voltage Change Control Reg */
+#define PKWR __REG(0x40F00050) /* Power Manager KB Wake-Up Enable Reg */
+#define PKSR __REG(0x40F00054) /* Power Manager KB Level-Detect Status Reg */
+#define OSMR4 __REG(0x40A00080) /* */
+#define OSCR4 __REG(0x40A00040) /* OS Timer Counter Register */
+#define OMCR4 __REG(0x40A000C0) /* */
#endif /* CONFIG_PXA27X */
diff --git a/include/asm-arm/io.h b/include/asm-arm/io.h
index c2b69fb2dd..648a10dd92 100644
--- a/include/asm-arm/io.h
+++ b/include/asm-arm/io.h
@@ -58,6 +58,14 @@ extern void __raw_readsl(unsigned int addr, void *data, int longlen);
#define __raw_readw(a) __arch_getw(a)
#define __raw_readl(a) __arch_getl(a)
+#define writeb(v,a) __arch_putb(v,a)
+#define writew(v,a) __arch_putw(v,a)
+#define writel(v,a) __arch_putl(v,a)
+
+#define readb(a) __arch_getb(a)
+#define readw(a) __arch_getw(a)
+#define readl(a) __arch_getl(a)
+
/*
* The compiler seems to be incapable of optimising constants
* properly. Spell it out to the compiler in some cases.
diff --git a/include/asm-arm/mach-types.h b/include/asm-arm/mach-types.h
index fd03748523..428552e22c 100644
--- a/include/asm-arm/mach-types.h
+++ b/include/asm-arm/mach-types.h
@@ -736,6 +736,9 @@ extern unsigned int __machine_arch_type;
#define MACH_TYPE_LN2410SBC 725
#define MACH_TYPE_CB3RUFC 726
#define MACH_TYPE_MP2USB 727
+#define MACH_TYPE_OMAP_2430SDP 900
+#define MACH_TYPE_PDNB3 1002
+#define MACH_TYPE_OMAP_3430SDP 1138
#ifdef CONFIG_ARCH_EBSA110
# ifdef machine_arch_type
@@ -6821,6 +6824,30 @@ extern unsigned int __machine_arch_type;
# define machine_is_omap_h4() (0)
#endif
+#ifdef CONFIG_MACH_OMAP_2430SDP
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_OMAP_2430SDP
+# endif
+# define machine_is_omap_2430SDP() (machine_arch_type == MACH_TYPE_OMAP_2430SDP)
+#else
+# define machine_is_omap_2430SDP() (0)
+#endif
+
+#ifdef CONFIG_MACH_OMAP_3430SDP
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_OMAP_3430SDP
+# endif
+# define machine_is_omap_3430SDP() (machine_arch_type == MACH_TYPE_OMAP_3430SDP)
+#else
+# define machine_is_omap_3430SDP() (0)
+#endif
+
#ifdef CONFIG_MACH_N10
# ifdef machine_arch_type
# undef machine_arch_type
diff --git a/include/asm-arm/u-boot.h b/include/asm-arm/u-boot.h
index 146934cf0c..c120312e0a 100644
--- a/include/asm-arm/u-boot.h
+++ b/include/asm-arm/u-boot.h
@@ -48,6 +48,10 @@ typedef struct bd_info {
ulong start;
ulong size;
} bi_dram[CONFIG_NR_DRAM_BANKS];
+#ifdef CONFIG_HAS_ETH1
+ /* second onboard ethernet port */
+ unsigned char bi_enet1addr[6];
+#endif
} bd_t;
#define bi_env_data bi_env->data
diff --git a/include/asm-blackfin/bitops.h b/include/asm-blackfin/bitops.h
new file mode 100644
index 0000000000..65d2c25345
--- /dev/null
+++ b/include/asm-blackfin/bitops.h
@@ -0,0 +1,380 @@
+/*
+ * U-boot - bitops.h Routines for bit operations
+ *
+ * Copyright (c) 2005 blackfin.uclinux.org
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _BLACKFIN_BITOPS_H
+#define _BLACKFIN_BITOPS_H
+
+/*
+ * Copyright 1992, Linus Torvalds.
+ */
+
+#include <linux/config.h>
+#include <asm/byteorder.h>
+#include <asm/system.h>
+
+#ifdef __KERNEL__
+/*
+ * Function prototypes to keep gcc -Wall happy
+ */
+
+/*
+ * The __ functions are not atomic
+ */
+
+/*
+ * ffz = Find First Zero in word. Undefined if no zero exists,
+ * so code should check against ~0UL first..
+ */
+static __inline__ unsigned long ffz(unsigned long word)
+{
+ unsigned long result = 0;
+
+ while (word & 1) {
+ result++;
+ word >>= 1;
+ }
+ return result;
+}
+
+static __inline__ void set_bit(int nr, volatile void *addr)
+{
+ int *a = (int *) addr;
+ int mask;
+ unsigned long flags;
+
+ a += nr >> 5;
+ mask = 1 << (nr & 0x1f);
+ save_and_cli(flags);
+ *a |= mask;
+ restore_flags(flags);
+}
+
+static __inline__ void __set_bit(int nr, volatile void *addr)
+{
+ int *a = (int *) addr;
+ int mask;
+
+ a += nr >> 5;
+ mask = 1 << (nr & 0x1f);
+ *a |= mask;
+}
+
+/*
+ * clear_bit() doesn't provide any barrier for the compiler.
+ */
+#define smp_mb__before_clear_bit() barrier()
+#define smp_mb__after_clear_bit() barrier()
+
+static __inline__ void clear_bit(int nr, volatile void *addr)
+{
+ int *a = (int *) addr;
+ int mask;
+ unsigned long flags;
+
+ a += nr >> 5;
+ mask = 1 << (nr & 0x1f);
+ save_and_cli(flags);
+ *a &= ~mask;
+ restore_flags(flags);
+}
+
+static __inline__ void change_bit(int nr, volatile void *addr)
+{
+ int mask, flags;
+ unsigned long *ADDR = (unsigned long *) addr;
+
+ ADDR += nr >> 5;
+ mask = 1 << (nr & 31);
+ save_and_cli(flags);
+ *ADDR ^= mask;
+ restore_flags(flags);
+}
+
+static __inline__ void __change_bit(int nr, volatile void *addr)
+{
+ int mask;
+ unsigned long *ADDR = (unsigned long *) addr;
+
+ ADDR += nr >> 5;
+ mask = 1 << (nr & 31);
+ *ADDR ^= mask;
+}
+
+static __inline__ int test_and_set_bit(int nr, volatile void *addr)
+{
+ int mask, retval;
+ volatile unsigned int *a = (volatile unsigned int *) addr;
+ unsigned long flags;
+
+ a += nr >> 5;
+ mask = 1 << (nr & 0x1f);
+ save_and_cli(flags);
+ retval = (mask & *a) != 0;
+ *a |= mask;
+ restore_flags(flags);
+
+ return retval;
+}
+
+static __inline__ int __test_and_set_bit(int nr, volatile void *addr)
+{
+ int mask, retval;
+ volatile unsigned int *a = (volatile unsigned int *) addr;
+
+ a += nr >> 5;
+ mask = 1 << (nr & 0x1f);
+ retval = (mask & *a) != 0;
+ *a |= mask;
+ return retval;
+}
+
+static __inline__ int test_and_clear_bit(int nr, volatile void *addr)
+{
+ int mask, retval;
+ volatile unsigned int *a = (volatile unsigned int *) addr;
+ unsigned long flags;
+
+ a += nr >> 5;
+ mask = 1 << (nr & 0x1f);
+ save_and_cli(flags);
+ retval = (mask & *a) != 0;
+ *a &= ~mask;
+ restore_flags(flags);
+
+ return retval;
+}
+
+static __inline__ int __test_and_clear_bit(int nr, volatile void *addr)
+{
+ int mask, retval;
+ volatile unsigned int *a = (volatile unsigned int *) addr;
+
+ a += nr >> 5;
+ mask = 1 << (nr & 0x1f);
+ retval = (mask & *a) != 0;
+ *a &= ~mask;
+ return retval;
+}
+
+static __inline__ int test_and_change_bit(int nr, volatile void *addr)
+{
+ int mask, retval;
+ volatile unsigned int *a = (volatile unsigned int *) addr;
+ unsigned long flags;
+
+ a += nr >> 5;
+ mask = 1 << (nr & 0x1f);
+ save_and_cli(flags);
+ retval = (mask & *a) != 0;
+ *a ^= mask;
+ restore_flags(flags);
+
+ return retval;
+}
+
+static __inline__ int __test_and_change_bit(int nr, volatile void *addr)
+{
+ int mask, retval;
+ volatile unsigned int *a = (volatile unsigned int *) addr;
+
+ a += nr >> 5;
+ mask = 1 << (nr & 0x1f);
+ retval = (mask & *a) != 0;
+ *a ^= mask;
+ return retval;
+}
+
+/*
+ * This routine doesn't need to be atomic.
+ */
+static __inline__ int __constant_test_bit(int nr,
+ const volatile void *addr)
+{
+ return ((1UL << (nr & 31)) &
+ (((const volatile unsigned int *) addr)[nr >> 5])) != 0;
+}
+
+static __inline__ int __test_bit(int nr, volatile void *addr)
+{
+ int *a = (int *) addr;
+ int mask;
+
+ a += nr >> 5;
+ mask = 1 << (nr & 0x1f);
+ return ((mask & *a) != 0);
+}
+
+#define test_bit(nr,addr) \
+(__builtin_constant_p(nr) ? \
+ __constant_test_bit((nr),(addr)) : \
+ __test_bit((nr),(addr)))
+
+#define find_first_zero_bit(addr, size) \
+ find_next_zero_bit((addr), (size), 0)
+
+static __inline__ int find_next_zero_bit(void *addr, int size, int offset)
+{
+ unsigned long *p = ((unsigned long *) addr) + (offset >> 5);
+ unsigned long result = offset & ~31UL;
+ unsigned long tmp;
+
+ if (offset >= size)
+ return size;
+ size -= result;
+ offset &= 31UL;
+ if (offset) {
+ tmp = *(p++);
+ tmp |= ~0UL >> (32 - offset);
+ if (size < 32)
+ goto found_first;
+ if (~tmp)
+ goto found_middle;
+ size -= 32;
+ result += 32;
+ }
+ while (size & ~31UL) {
+ if (~(tmp = *(p++)))
+ goto found_middle;
+ result += 32;
+ size -= 32;
+ }
+ if (!size)
+ return result;
+ tmp = *p;
+
+ found_first:
+ tmp |= ~0UL >> size;
+ found_middle:
+ return result + ffz(tmp);
+}
+
+/*
+ * ffs: find first bit set. This is defined the same way as
+ * the libc and compiler builtin ffs routines, therefore
+ * differs in spirit from the above ffz (man ffs).
+ */
+
+#define ffs(x) generic_ffs(x)
+
+/*
+ * hweightN: returns the hamming weight (i.e. the number
+ * of bits set) of a N-bit word
+ */
+
+#define hweight32(x) generic_hweight32(x)
+#define hweight16(x) generic_hweight16(x)
+#define hweight8(x) generic_hweight8(x)
+
+static __inline__ int ext2_set_bit(int nr, volatile void *addr)
+{
+ int mask, retval;
+ unsigned long flags;
+ volatile unsigned char *ADDR = (unsigned char *) addr;
+
+ ADDR += nr >> 3;
+ mask = 1 << (nr & 0x07);
+ save_and_cli(flags);
+ retval = (mask & *ADDR) != 0;
+ *ADDR |= mask;
+ restore_flags(flags);
+ return retval;
+}
+
+static __inline__ int ext2_clear_bit(int nr, volatile void *addr)
+{
+ int mask, retval;
+ unsigned long flags;
+ volatile unsigned char *ADDR = (unsigned char *) addr;
+
+ ADDR += nr >> 3;
+ mask = 1 << (nr & 0x07);
+ save_and_cli(flags);
+ retval = (mask & *ADDR) != 0;
+ *ADDR &= ~mask;
+ restore_flags(flags);
+ return retval;
+}
+
+static __inline__ int ext2_test_bit(int nr, const volatile void *addr)
+{
+ int mask;
+ const volatile unsigned char *ADDR = (const unsigned char *) addr;
+
+ ADDR += nr >> 3;
+ mask = 1 << (nr & 0x07);
+ return ((mask & *ADDR) != 0);
+}
+
+#define ext2_find_first_zero_bit(addr, size) \
+ ext2_find_next_zero_bit((addr), (size), 0)
+
+static __inline__ unsigned long ext2_find_next_zero_bit(void *addr,
+ unsigned long size,
+ unsigned long
+ offset)
+{
+ unsigned long *p = ((unsigned long *) addr) + (offset >> 5);
+ unsigned long result = offset & ~31UL;
+ unsigned long tmp;
+
+ if (offset >= size)
+ return size;
+ size -= result;
+ offset &= 31UL;
+ if (offset) {
+ tmp = *(p++);
+ tmp |= ~0UL >> (32 - offset);
+ if (size < 32)
+ goto found_first;
+ if (~tmp)
+ goto found_middle;
+ size -= 32;
+ result += 32;
+ }
+ while (size & ~31UL) {
+ if (~(tmp = *(p++)))
+ goto found_middle;
+ result += 32;
+ size -= 32;
+ }
+ if (!size)
+ return result;
+ tmp = *p;
+
+ found_first:
+ tmp |= ~0UL >> size;
+ found_middle:
+ return result + ffz(tmp);
+}
+
+/* Bitmap functions for the minix filesystem. */
+#define minix_test_and_set_bit(nr,addr) test_and_set_bit(nr,addr)
+#define minix_set_bit(nr,addr) set_bit(nr,addr)
+#define minix_test_and_clear_bit(nr,addr) test_and_clear_bit(nr,addr)
+#define minix_test_bit(nr,addr) test_bit(nr,addr)
+#define minix_find_first_zero_bit(addr,size) find_first_zero_bit(addr,size)
+
+#endif
+
+#endif
diff --git a/include/asm-blackfin/blackfin.h b/include/asm-blackfin/blackfin.h
new file mode 100644
index 0000000000..fbdbf30fa1
--- /dev/null
+++ b/include/asm-blackfin/blackfin.h
@@ -0,0 +1,46 @@
+/*
+ * U-boot - blackfin.h
+ *
+ * Copyright (c) 2005 blackfin.uclinux.org
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _BLACKFIN_H_
+#define _BLACKFIN_H_
+
+#include <asm/cpu/defBF533.h>
+#include <asm/cpu/bf533_serial.h>
+
+#ifndef __ASSEMBLY__
+#ifndef ASSEMBLY
+
+#ifdef SHARED_RESOURCES
+ #include <asm/shared_resources.h>
+#endif
+#include <asm/cpu/cdefBF53x.h>
+
+#endif
+#endif
+
+#include <asm/cpu/defBF533.h>
+#include <asm/cpu/defBF533_extn.h>
+#include <asm/cpu/bf533_serial.h>
+
+#endif
diff --git a/include/asm-blackfin/blackfin_defs.h b/include/asm-blackfin/blackfin_defs.h
new file mode 100644
index 0000000000..2190215971
--- /dev/null
+++ b/include/asm-blackfin/blackfin_defs.h
@@ -0,0 +1,83 @@
+/*
+ * U-boot - blackfin_defs.h
+ *
+ * Copyright (c) 2005 blackfin.uclinux.org
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __BLACKFIN_DEFS_H__
+#define __BLACKFIN_DEFS_H__
+
+#define TS_MAGICKEY 0x5a5a5a5a
+#define TASK_STATE 0
+#define TASK_FLAGS 4
+#define TASK_PTRACE 24
+#define TASK_BLOCKED 636
+#define TASK_COUNTER 32
+#define TASK_SIGPENDING 8
+#define TASK_NEEDRESCHED 20
+#define TASK_THREAD 600
+#define TASK_MM 44
+#define TASK_ACTIVE_MM 80
+#define THREAD_KSP 0
+#define THREAD_USP 4
+#define THREAD_SR 8
+#define THREAD_ESP0 12
+#define THREAD_PC 16
+#define PT_ORIG_R0 208
+#define PT_R0 204
+#define PT_R1 200
+#define PT_R2 196
+#define PT_R3 192
+#define PT_R4 188
+#define PT_R5 184
+#define PT_R6 180
+#define PT_R7 176
+#define PT_P0 172
+#define PT_P1 168
+#define PT_P2 164
+#define PT_P3 160
+#define PT_P4 156
+#define PT_P5 152
+#define PT_A0w 72
+#define PT_A1w 64
+#define PT_A0x 76
+#define PT_A1x 68
+#define PT_RETS 28
+#define PT_RESERVED 32
+#define PT_ASTAT 36
+#define PT_SEQSTAT 8
+#define PT_PC 24
+#define PT_IPEND 0
+#define PT_USP 144
+#define PT_FP 148
+#define PT_SYSCFG 4
+#define IRQ_HANDLER 0
+#define IRQ_DEVID 8
+#define IRQ_NEXT 16
+#define STAT_IRQ 5148
+#define SIGSEGV 11
+#define SEGV_MAPERR 196609
+#define SIGTRAP 5
+#define PT_PTRACED 1
+#define PT_TRACESYS 2
+#define PT_DTRACE 4
+
+#endif
diff --git a/include/asm-blackfin/byteorder.h b/include/asm-blackfin/byteorder.h
new file mode 100644
index 0000000000..3b4df4e134
--- /dev/null
+++ b/include/asm-blackfin/byteorder.h
@@ -0,0 +1,40 @@
+/*
+ * U-boot - byteorder.h
+ *
+ * Copyright (c) 2005 blackfin.uclinux.org
+ *
+ * (C) Copyright 2000-2004
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _BLACKFIN_BYTEORDER_H
+#define _BLACKFIN_BYTEORDER_H
+
+#include <asm/types.h>
+
+#if defined(__GNUC__) && !defined(__STRICT_ANSI__) || defined(__KERNEL__)
+# define __BYTEORDER_HAS_U64__
+# define __SWAB_64_THRU_32__
+#endif
+
+#include <linux/byteorder/little_endian.h>
+
+#endif
diff --git a/include/asm-blackfin/cplb.h b/include/asm-blackfin/cplb.h
new file mode 100644
index 0000000000..7715f645de
--- /dev/null
+++ b/include/asm-blackfin/cplb.h
@@ -0,0 +1,48 @@
+/************************************************************************
+ *
+ * cplb.h
+ *
+ * (c) Copyright 2002-2003 Analog Devices, Inc. All rights reserved.
+ *
+ ************************************************************************/
+
+/* Defines necessary for cplb initialisation routines. */
+
+#ifndef _CPLB_H
+#define _CPLB_H
+
+#define CPLB_ENABLE_ICACHE_P 0
+#define CPLB_ENABLE_DCACHE_P 1
+#define CPLB_ENABLE_DCACHE2_P 2
+#define CPLB_ENABLE_CPLBS_P 3 /* Deprecated!*/
+#define CPLB_ENABLE_ICPLBS_P 4
+#define CPLB_ENABLE_DCPLBS_P 5
+
+#define CPLB_ENABLE_ICACHE (1<<CPLB_ENABLE_ICACHE_P)
+#define CPLB_ENABLE_DCACHE (1<<CPLB_ENABLE_DCACHE_P)
+#define CPLB_ENABLE_DCACHE2 (1<<CPLB_ENABLE_DCACHE2_P)
+#define CPLB_ENABLE_CPLBS (1<<CPLB_ENABLE_CPLBS_P)
+#define CPLB_ENABLE_ICPLBS (1<<CPLB_ENABLE_ICPLBS_P)
+#define CPLB_ENABLE_DCPLBS (1<<CPLB_ENABLE_DCPLBS_P)
+#define CPLB_ENABLE_ANY_CPLBS CPLB_ENABLE_CPLBS | \
+ CPLB_ENABLE_ICPLBS | \
+ CPLB_ENABLE_DCPLBS
+
+#define CPLB_RELOADED 0x0000
+#define CPLB_NO_UNLOCKED 0x0001
+#define CPLB_NO_ADDR_MATCH 0x0002
+#define CPLB_PROT_VIOL 0x0003
+
+#define CPLB_DEF_CACHE CPLB_L1_CHBL | CPLB_WT
+#define CPLB_CACHE_ENABLED CPLB_L1_CHBL | CPLB_DIRTY
+
+#define CPLB_ALL_ACCESS CPLB_SUPV_WR | CPLB_USER_RD | CPLB_USER_WR
+
+#define CPLB_I_PAGE_MGMT CPLB_LOCK | CPLB_VALID
+#define CPLB_D_PAGE_MGMT CPLB_LOCK | CPLB_ALL_ACCESS | CPLB_VALID
+#define CPLB_DNOCACHE CPLB_ALL_ACCESS | CPLB_VALID
+#define CPLB_DDOCACHE CPLB_DNOCACHE | CPLB_DEF_CACHE
+#define CPLB_INOCACHE CPLB_USER_RD | CPLB_VALID
+#define CPLB_IDOCACHE CPLB_INOCACHE | CPLB_L1_CHBL
+
+#endif /* _CPLB_H */
diff --git a/include/asm-blackfin/cplbtab.h b/include/asm-blackfin/cplbtab.h
new file mode 100644
index 0000000000..ab7d989b1a
--- /dev/null
+++ b/include/asm-blackfin/cplbtab.h
@@ -0,0 +1,572 @@
+/*This file is subject to the terms and conditions of the GNU General Public
+ * License.
+ *
+ * Blackfin BF533/2.6 support : LG Soft India
+ * Updated : Ashutosh Singh / Jahid Khan : Rrap Software Pvt Ltd
+ * Updated : 1. SDRAM_KERNEL, SDRAM_DKENEL are added as initial cplb's
+ * shouldn't be victimized. cplbmgr.S search logic is corrected
+ * to findout the appropriate victim.
+ * 2. SDRAM_IGENERIC in dpdt_table is replaced with SDRAM_DGENERIC
+ * : LG Soft India
+ */
+#include <config.h>
+
+#ifndef __ARCH_BFINNOMMU_CPLBTAB_H
+#define __ARCH_BFINNOMMU_CPLBTAB_H
+
+/*************************************************************************
+ * ICPLB TABLE
+ *************************************************************************/
+
+.data
+
+/* This table is configurable */
+
+.align 4;
+
+/* Data Attibutes*/
+
+#define SDRAM_IGENERIC (PAGE_SIZE_4MB | CPLB_L1_CHBL | CPLB_USER_RD | CPLB_VALID)
+#define SDRAM_IKERNEL (PAGE_SIZE_4MB | CPLB_L1_CHBL | CPLB_USER_RD | CPLB_VALID | CPLB_LOCK)
+#define L1_IMEMORY (PAGE_SIZE_1MB | CPLB_L1_CHBL | CPLB_USER_RD | CPLB_VALID | CPLB_LOCK)
+#define SDRAM_INON_CHBL (PAGE_SIZE_4MB | CPLB_USER_RD | CPLB_VALID)
+
+/*Use the menuconfig cache policy here - CONFIG_BLKFIN_WT/CONFIG_BLKFIN_WB*/
+
+#define ANOMALY_05000158 0x200
+#ifdef CONFIG_BLKFIN_WB /*Write Back Policy */
+ #define SDRAM_DGENERIC (PAGE_SIZE_4MB | CPLB_L1_CHBL | CPLB_DIRTY | CPLB_SUPV_WR | CPLB_USER_WR | CPLB_USER_RD | CPLB_VALID | ANOMALY_05000158)
+ #define SDRAM_DNON_CHBL (PAGE_SIZE_4MB | CPLB_DIRTY | CPLB_SUPV_WR | CPLB_USER_RD | CPLB_USER_WR | CPLB_VALID | ANOMALY_05000158)
+ #define SDRAM_DKERNEL (PAGE_SIZE_4MB | CPLB_L1_CHBL | CPLB_USER_RD | CPLB_USER_WR | CPLB_DIRTY | CPLB_SUPV_WR | CPLB_VALID | CPLB_LOCK | ANOMALY_05000158)
+ #define L1_DMEMORY (PAGE_SIZE_4KB | CPLB_L1_CHBL | CPLB_DIRTY | CPLB_SUPV_WR | CPLB_USER_WR | CPLB_USER_RD | CPLB_VALID | ANOMALY_05000158)
+ #define SDRAM_EBIU (PAGE_SIZE_1MB | CPLB_DIRTY | CPLB_USER_RD | CPLB_USER_WR | CPLB_SUPV_WR | CPLB_VALID | ANOMALY_05000158)
+
+#else /*Write Through*/
+ #define SDRAM_DGENERIC (PAGE_SIZE_4MB | CPLB_L1_CHBL | CPLB_WT | CPLB_L1_AOW | CPLB_SUPV_WR | CPLB_USER_RD | CPLB_USER_WR | CPLB_VALID | ANOMALY_05000158)
+ #define SDRAM_DNON_CHBL (PAGE_SIZE_4MB | CPLB_WT | CPLB_L1_AOW | CPLB_SUPV_WR | CPLB_USER_WR | CPLB_USER_RD | CPLB_VALID | ANOMALY_05000158)
+ #define SDRAM_DKERNEL (PAGE_SIZE_4MB | CPLB_L1_CHBL | CPLB_WT | CPLB_L1_AOW | CPLB_USER_RD | CPLB_SUPV_WR | CPLB_USER_WR | CPLB_VALID | CPLB_LOCK | ANOMALY_05000158)
+ #define L1_DMEMORY (PAGE_SIZE_4KB | CPLB_L1_CHBL | CPLB_L1_AOW | CPLB_WT | CPLB_SUPV_WR | CPLB_USER_WR | CPLB_VALID | ANOMALY_05000158)
+ #define SDRAM_EBIU (PAGE_SIZE_1MB | CPLB_WT | CPLB_L1_AOW | CPLB_USER_RD | CPLB_USER_WR | CPLB_SUPV_WR | CPLB_VALID | ANOMALY_05000158)
+#endif
+
+.global icplb_table
+icplb_table:
+.byte4 0xFFA00000;
+.byte4 (L1_IMEMORY);
+.byte4 0x00000000;
+.byte4 (SDRAM_IKERNEL); /*SDRAM_Page1*/
+.byte4 0x00400000;
+.byte4 (SDRAM_IKERNEL); /*SDRAM_Page1*/
+.byte4 0x07C00000;
+.byte4 (SDRAM_IKERNEL); /*SDRAM_Page14*/
+.byte4 0x00800000;
+.byte4 (SDRAM_IGENERIC); /*SDRAM_Page2*/
+.byte4 0x00C00000;
+.byte4 (SDRAM_IGENERIC); /*SDRAM_Page2*/
+.byte4 0x01000000;
+.byte4 (SDRAM_IGENERIC); /*SDRAM_Page4*/
+.byte4 0x01400000;
+.byte4 (SDRAM_IGENERIC); /*SDRAM_Page5*/
+.byte4 0x01800000;
+.byte4 (SDRAM_IGENERIC); /*SDRAM_Page6*/
+.byte4 0x01C00000;
+.byte4 (SDRAM_IGENERIC); /*SDRAM_Page7*/
+#ifndef CONFIG_EZKIT /*STAMP Memory regions*/
+.byte4 0x02000000;
+.byte4 (SDRAM_IGENERIC); /*SDRAM_Page8*/
+.byte4 0x02400000;
+.byte4 (SDRAM_IGENERIC); /*SDRAM_Page9*/
+.byte4 0x02800000;
+.byte4 (SDRAM_IGENERIC); /*SDRAM_Page10*/
+.byte4 0x02C00000;
+.byte4 (SDRAM_IGENERIC); /*SDRAM_Page11*/
+.byte4 0x03000000;
+.byte4 (SDRAM_IGENERIC); /*SDRAM_Page12*/
+.byte4 0x03400000;
+.byte4 (SDRAM_IGENERIC); /*SDRAM_Page13*/
+#endif
+.byte4 0xffffffff; /* end of section - termination*/
+
+.align 4;
+.global ipdt_table
+ipdt_table:
+#ifdef CONFIG_CPLB_INFO
+.byte4 0x00000000;
+.byte4 (SDRAM_IKERNEL); /*SDRAM_Page0*/
+.byte4 0x00400000;
+.byte4 (SDRAM_IKERNEL); /*SDRAM_Page1*/
+#endif
+.byte4 0x00800000;
+.byte4 (SDRAM_IGENERIC); /*SDRAM_Page2*/
+.byte4 0x00C00000;
+.byte4 (SDRAM_IGENERIC); /*SDRAM_Page3*/
+.byte4 0x01000000;
+.byte4 (SDRAM_IGENERIC); /*SDRAM_Page4*/
+.byte4 0x01400000;
+.byte4 (SDRAM_IGENERIC); /*SDRAM_Page5*/
+.byte4 0x01800000;
+.byte4 (SDRAM_IGENERIC); /*SDRAM_Page6*/
+.byte4 0x01C00000;
+.byte4 (SDRAM_IGENERIC); /*SDRAM_Page7*/
+#ifndef CONFIG_EZKIT /*STAMP Memory regions*/
+.byte4 0x02000000;
+.byte4 (SDRAM_IGENERIC); /*SDRAM_Page8*/
+.byte4 0x02400000;
+.byte4 (SDRAM_IGENERIC); /*SDRAM_Page9*/
+.byte4 0x02800000;
+.byte4 (SDRAM_IGENERIC); /*SDRAM_Page10*/
+.byte4 0x02C00000;
+.byte4 (SDRAM_IGENERIC); /*SDRAM_Page11*/
+.byte4 0x03000000;
+.byte4 (SDRAM_IGENERIC); /*SDRAM_Page12*/
+.byte4 0x03400000;
+.byte4 (SDRAM_IGENERIC); /*SDRAM_Page13*/
+.byte4 0x03800000;
+.byte4 (SDRAM_IGENERIC); /*SDRAM_Page14*/
+.byte4 0x03C00000;
+.byte4 (SDRAM_IGENERIC); /*SDRAM_Page15*/
+#endif
+.byte4 0x20200000;
+.byte4 (SDRAM_EBIU); /* Async Memory Bank 2 (Secnd)*/
+.byte4 0x20100000;
+.byte4 (SDRAM_EBIU); /* Async Memory Bank 1 (Prim B)*/
+.byte4 0x20000000;
+.byte4 (SDRAM_EBIU); /* Async Memory Bank 0 (Prim A)*/
+.byte4 0x20300000; /*Fix for Network*/
+.byte4 (SDRAM_EBIU); /*Async Memory bank 3*/
+
+#ifdef CONFIG_STAMP
+.byte4 0x04000000;
+.byte4 (SDRAM_IGENERIC);
+.byte4 0x04400000;
+.byte4 (SDRAM_IGENERIC);
+.byte4 0x04800000;
+.byte4 (SDRAM_IGENERIC);
+.byte4 0x04C00000;
+.byte4 (SDRAM_IGENERIC);
+.byte4 0x05000000;
+.byte4 (SDRAM_IGENERIC);
+.byte4 0x05400000;
+.byte4 (SDRAM_IGENERIC);
+.byte4 0x05800000;
+.byte4 (SDRAM_IGENERIC);
+.byte4 0x05C00000;
+.byte4 (SDRAM_IGENERIC);
+.byte4 0x06000000;
+.byte4 (SDRAM_IGENERIC); /*SDRAM_Page25*/
+.byte4 0x06400000;
+.byte4 (SDRAM_IGENERIC); /*SDRAM_Page26*/
+.byte4 0x06800000;
+.byte4 (SDRAM_IGENERIC); /*SDRAM_Page27*/
+.byte4 0x06C00000;
+.byte4 (SDRAM_IGENERIC); /*SDRAM_Page28*/
+.byte4 0x07000000;
+.byte4 (SDRAM_IGENERIC); /*SDRAM_Page29*/
+.byte4 0x07400000;
+.byte4 (SDRAM_IGENERIC); /*SDRAM_Page30*/
+.byte4 0x07800000;
+.byte4 (SDRAM_IGENERIC); /*SDRAM_Page31*/
+#ifdef CONFIG_CPLB_INFO
+.byte4 0x07C00000;
+.byte4 (SDRAM_IKERNEL); /*SDRAM_Page32*/
+#endif
+#endif
+.byte4 0xffffffff; /* end of section - termination*/
+
+/*********************************************************************
+ * DCPLB TABLE
+ ********************************************************************/
+
+.global dcplb_table
+dcplb_table:
+.byte4 0x00000000;
+.byte4 (SDRAM_DKERNEL); /*SDRAM_Page1*/
+.byte4 0x00400000;
+.byte4 (SDRAM_DKERNEL); /*SDRAM_Page1*/
+.byte4 0x07C00000;
+.byte4 (SDRAM_DKERNEL); /*SDRAM_Page15*/
+.byte4 0x00800000;
+.byte4 (SDRAM_DGENERIC); /*SDRAM_Page2*/
+.byte4 0x00C00000;
+.byte4 (SDRAM_DGENERIC); /*SDRAM_Page3*/
+.byte4 0x01000000;
+.byte4 (SDRAM_DGENERIC); /*SDRAM_Page4*/
+.byte4 0x01400000;
+.byte4 (SDRAM_DGENERIC); /*SDRAM_Page5*/
+.byte4 0x01800000;
+.byte4 (SDRAM_DGENERIC); /*SDRAM_Page6*/
+.byte4 0x01C00000;
+.byte4 (SDRAM_DGENERIC); /*SDRAM_Page7*/
+#ifndef CONFIG_EZKIT
+.byte4 0x02000000;
+.byte4 (SDRAM_DGENERIC); /*SDRAM_Page8*/
+.byte4 0x02400000;
+.byte4 (SDRAM_DGENERIC); /*SDRAM_Page9*/
+.byte4 0x02800000;
+.byte4 (SDRAM_DGENERIC); /*SDRAM_Page10*/
+.byte4 0x02C00000;
+.byte4 (SDRAM_DGENERIC); /*SDRAM_Page11*/
+.byte4 0x03000000;
+.byte4 (SDRAM_DGENERIC); /*SDRAM_Page12*/
+.byte4 0x03400000;
+.byte4 (SDRAM_DGENERIC); /*SDRAM_Page13*/
+.byte4 0x03800000;
+.byte4 (SDRAM_DGENERIC); /*SDRAM_Page14*/
+#endif
+.byte4 0xffffffff; /*end of section - termination*/
+
+/**********************************************************************
+ * PAGE DESCRIPTOR TABLE
+ *
+ **********************************************************************/
+
+/* Till here we are discussing about the static memory management model.
+ * However, the operating envoronments commonly define more CPLB
+ * descriptors to cover the entire addressable memory than will fit into
+ * the available on-chip 16 CPLB MMRs. When this happens, the below table
+ * will be used which will hold all the potentially required CPLB descriptors
+ *
+ * This is how Page descriptor Table is implemented in uClinux/Blackfin.
+ */
+.global dpdt_table
+dpdt_table:
+#ifdef CONFIG_CPLB_INFO
+.byte4 0x00000000;
+.byte4 (SDRAM_DKERNEL); /*SDRAM_Page0*/
+.byte4 0x00400000;
+.byte4 (SDRAM_DKERNEL); /*SDRAM_Page1*/
+#endif
+.byte4 0x00800000;
+.byte4 (SDRAM_DGENERIC); /*SDRAM_Page2*/
+.byte4 0x00C00000;
+.byte4 (SDRAM_DGENERIC); /*SDRAM_Page3*/
+.byte4 0x01000000;
+.byte4 (SDRAM_DGENERIC); /*SDRAM_Page4*/
+.byte4 0x01400000;
+.byte4 (SDRAM_DGENERIC); /*SDRAM_Page5*/
+.byte4 0x01800000;
+.byte4 (SDRAM_DGENERIC); /*SDRAM_Page6*/
+.byte4 0x01C00000;
+.byte4 (SDRAM_DGENERIC); /*SDRAM_Page7*/
+
+#ifndef CONFIG_EZKIT
+.byte4 0x02000000;
+.byte4 (SDRAM_DGENERIC); /*SDRAM_Page8*/
+.byte4 0x02400000;
+.byte4 (SDRAM_DGENERIC); /*SDRAM_Page9*/
+.byte4 0x02800000;
+.byte4 (SDRAM_DGENERIC); /*SDRAM_Page10*/
+.byte4 0x02C00000;
+.byte4 (SDRAM_DGENERIC); /*SDRAM_Page11*/
+.byte4 0x03000000;
+.byte4 (SDRAM_DGENERIC); /*SDRAM_Page12*/
+.byte4 0x03400000;
+.byte4 (SDRAM_DGENERIC); /*SDRAM_Page13*/
+.byte4 0x03800000;
+.byte4 (SDRAM_DGENERIC); /*SDRAM_Page14*/
+.byte4 0x03C00000;
+.byte4 (SDRAM_DGENERIC); /*SDRAM_Page15*/
+#endif
+.byte4 0x20200000;
+.byte4 (SDRAM_EBIU); /* Async Memory Bank 2 (Secnd)*/
+.byte4 0x20100000;
+.byte4 (SDRAM_EBIU); /* Async Memory Bank 1 (Prim B)*/
+.byte4 0x20000000;
+.byte4 (SDRAM_EBIU); /* Async Memory Bank 0 (Prim A)*/
+.byte4 0x20300000; /*Fix for Network*/
+.byte4 (SDRAM_EBIU); /*Async Memory bank 3*/
+
+#ifdef CONFIG_STAMP
+.byte4 0x04000000;
+.byte4 (SDRAM_DGENERIC);
+.byte4 0x04400000;
+.byte4 (SDRAM_DGENERIC);
+.byte4 0x04800000;
+.byte4 (SDRAM_DGENERIC);
+.byte4 0x04C00000;
+.byte4 (SDRAM_DGENERIC);
+.byte4 0x05000000;
+.byte4 (SDRAM_DGENERIC);
+.byte4 0x05400000;
+.byte4 (SDRAM_DGENERIC);
+.byte4 0x05800000;
+.byte4 (SDRAM_DGENERIC);
+.byte4 0x05C00000;
+.byte4 (SDRAM_DGENERIC);
+.byte4 0x06000000;
+.byte4 (SDRAM_DGENERIC); /*SDRAM_Page25*/
+.byte4 0x06400000;
+.byte4 (SDRAM_DGENERIC); /*SDRAM_Page26*/
+.byte4 0x06800000;
+.byte4 (SDRAM_DGENERIC); /*SDRAM_Page27*/
+.byte4 0x06C00000;
+.byte4 (SDRAM_DGENERIC); /*SDRAM_Page28*/
+.byte4 0x07000000;
+.byte4 (SDRAM_DGENERIC); /*SDRAM_Page29*/
+.byte4 0x07400000;
+.byte4 (SDRAM_DGENERIC); /*SDRAM_Page30*/
+.byte4 0x07800000;
+.byte4 (SDRAM_DGENERIC); /*SDRAM_Page31*/
+#ifdef CONFIG_CPLB_INFO
+.byte4 0x07C00000;
+.byte4 (SDRAM_DKERNEL); /*SDRAM_Page32*/
+#endif
+#endif
+
+.byte4 0xFF900000;
+.byte4 (L1_DMEMORY);
+.byte4 0xFF901000;
+.byte4 (L1_DMEMORY);
+.byte4 0xFF902000;
+.byte4 (L1_DMEMORY);
+.byte4 0xFF903000;
+.byte4 (L1_DMEMORY);
+.byte4 0xFF904000;
+.byte4 (L1_DMEMORY);
+.byte4 0xFF905000;
+.byte4 (L1_DMEMORY);
+.byte4 0xFF906000;
+.byte4 (L1_DMEMORY);
+.byte4 0xFF907000;
+.byte4 (L1_DMEMORY);
+.byte4 0xFF800000;
+.byte4 (L1_DMEMORY);
+.byte4 0xFF801000;
+.byte4 (L1_DMEMORY);
+.byte4 0xFF802000;
+.byte4 (L1_DMEMORY);
+.byte4 0xFF803000;
+.byte4 (L1_DMEMORY);
+
+.byte4 0xffffffff; /*end of section - termination*/
+
+#ifdef CONFIG_CPLB_INFO
+.global ipdt_swapcount_table; /* swapin count first, then swapout count*/
+ipdt_swapcount_table:
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000; /* 10 */
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000; /* 20 */
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000; /* 30 */
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000; /* 40 */
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000; /* 50 */
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000; /* 60 */
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000; /* 70 */
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000; /* 80 */
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000; /* 90 */
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000; /* 100 */
+
+.global dpdt_swapcount_table; /* swapin count first, then swapout count*/
+dpdt_swapcount_table:
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000; /* 10 */
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000; /* 20 */
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000; /* 30 */
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000; /* 40 */
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000; /* 50 */
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000; /* 60 */
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000; /* 70 */
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000; /* 80 */
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000; /* 80 */
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000; /* 100 */
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000; /* 110 */
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000;
+.byte4 0x00000000; /* 120 */
+
+#endif
+
+#endif /*__ARCH_BFINNOMMU_CPLBTAB_H*/
diff --git a/include/asm-blackfin/cpu/bf533_irq.h b/include/asm-blackfin/cpu/bf533_irq.h
new file mode 100644
index 0000000000..9c5230db41
--- /dev/null
+++ b/include/asm-blackfin/cpu/bf533_irq.h
@@ -0,0 +1,137 @@
+/*
+ * U-boot bf533_irq.h
+ *
+ * Copyright (c) 2005 blackfin.uclinux.org
+ *
+ * This file is based on
+ * linux/arch/$(ARCH)/platform/$(PLATFORM)/irq.c
+ * Changed by HuTao Apr18, 2003
+ *
+ * Copyright was missing when I got the code so took from MIPS arch ...MaTed---
+ * Copyright (C) 1994 by Waldorf GMBH, written by Ralf Baechle
+ * Copyright (C) 1995, 96, 97, 98, 99, 2000, 2001 by Ralf Baechle
+ *
+ * Adapted for BlackFin (ADI) by Ted Ma <mated@sympatico.ca>
+ * Copyright (c) 2002 Arcturus Networks Inc. (www.arcturusnetworks.com)
+ * Copyright (c) 2002 Lineo, Inc. <mattw@lineo.com>
+ *
+ * Adapted for BlackFin BF533 by Bas Vermeulen <bas@buyways.nl>
+ * Copyright (c) 2003 BuyWays B.V. (www.buyways.nl)
+
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _BF533_IRQ_H_
+#define _BF533_IRQ_H_
+
+/*
+ * Interrupt source definitions
+ * Event Source Core Event Name Number
+ * EMU 0
+ * Reset RST 1
+ * NMI NMI 2
+ * Exception EVX 3
+ * Reserved -- 4
+ * Hardware Error IVHW 5
+ * Core Timer IVTMR 6
+ * PLL Wakeup Interrupt IVG7 7
+ * DMA Error (generic) IVG7 8
+ * PPI Error Interrupt IVG7 9
+ * SPORT0 Error Interrupt IVG7 10
+ * SPORT1 Error Interrupt IVG7 11
+ * SPI Error Interrupt IVG7 12
+ * UART Error Interrupt IVG7 13
+ * RTC Interrupt IVG8 14
+ * DMA0 Interrupt (PPI) IVG8 15
+ * DMA1 (SPORT0 RX) IVG9 16
+ * DMA2 (SPORT0 TX) IVG9 17
+ * DMA3 (SPORT1 RX) IVG9 18
+ * DMA4 (SPORT1 TX) IVG9 19
+ * DMA5 (PPI) IVG10 20
+ * DMA6 (UART RX) IVG10 21
+ * DMA7 (UART TX) IVG10 22
+ * Timer0 IVG11 23
+ * Timer1 IVG11 24
+ * Timer2 IVG11 25
+ * PF Interrupt A IVG12 26
+ * PF Interrupt B IVG12 27
+ * DMA8/9 Interrupt IVG13 28
+ * DMA10/11 Interrupt IVG13 29
+ * Watchdog Timer IVG13 30
+ * Software Interrupt 1 IVG14 31
+ * Software Interrupt 2 --
+ * (lowest priority) IVG15 32
+ */
+
+/* The ABSTRACT IRQ definitions */
+
+/* The first seven of the following are fixed,
+ * the rest you change if you need to
+ */
+
+#define IRQ_EMU 0 /* Emulation */
+#define IRQ_RST 1 /* reset */
+#define IRQ_NMI 2 /* Non Maskable */
+#define IRQ_EVX 3 /* Exception */
+#define IRQ_UNUSED 4 /* - unused interrupt */
+#define IRQ_HWERR 5 /* Hardware Error */
+#define IRQ_CORETMR 6 /* Core timer */
+#define IRQ_PLL_WAKEUP 7 /* PLL Wakeup Interrupt */
+#define IRQ_DMA_ERROR 8 /* DMA Error (general) */
+#define IRQ_PPI_ERROR 9 /* PPI Error Interrupt */
+#define IRQ_SPORT0_ERROR 10 /* SPORT0 Error Interrupt */
+#define IRQ_SPORT1_ERROR 11 /* SPORT1 Error Interrupt */
+#define IRQ_SPI_ERROR 12 /* SPI Error Interrupt */
+#define IRQ_UART_ERROR 13 /* UART Error Interrupt */
+#define IRQ_RTC 14 /* RTC Interrupt */
+#define IRQ_PPI 15 /* DMA0 Interrupt (PPI) */
+#define IRQ_SPORT0 16 /* DMA1 Interrupt (SPORT0 RX) */
+#define IRQ_SPARE1 17 /* DMA2 Interrupt (SPORT0 TX) */
+#define IRQ_SPORT1 18 /* DMA3 Interrupt (SPORT1 RX) */
+#define IRQ_SPARE2 19 /* DMA4 Interrupt (SPORT1 TX) */
+#define IRQ_SPI 20 /* DMA5 Interrupt (SPI) */
+#define IRQ_UART 21 /* DMA6 Interrupt (UART RX) */
+#define IRQ_SPARE3 22 /* DMA7 Interrupt (UART TX) */
+#define IRQ_TMR0 23 /* Timer 0 */
+#define IRQ_TMR1 24 /* Timer 1 */
+#define IRQ_TMR2 25 /* Timer 2 */
+#define IRQ_PROG_INTA 26 /* Programmable Flags A (8) */
+#define IRQ_PROG_INTB 27 /* Programmable Flags B (8) */
+#define IRQ_MEM_DMA0 28 /* DMA8/9 Interrupt (Memory DMA Stream 0) */
+#define IRQ_MEM_DMA1 29 /* DMA10/11 Interrupt (Memory DMA Stream 1) */
+#define IRQ_WATCH 30 /* Watch Dog Timer */
+#define IRQ_SW_INT1 31 /* Software Int 1 */
+#define IRQ_SW_INT2 32 /* Software Int 2 (reserved for SYSCALL) */
+
+#define IRQ_UART_RX_BIT 0x4000
+#define IRQ_UART_TX_BIT 0x8000
+#define IRQ_UART_ERROR_BIT 0x40
+
+#define IVG7 7
+#define IVG8 8
+#define IVG9 9
+#define IVG10 10
+#define IVG11 11
+#define IVG12 12
+#define IVG13 13
+#define IVG14 14
+#define IVG15 15
+#define SYS_IRQS 33
+
+#endif
diff --git a/include/asm-blackfin/cpu/bf533_rtc.h b/include/asm-blackfin/cpu/bf533_rtc.h
new file mode 100644
index 0000000000..bc09922a5e
--- /dev/null
+++ b/include/asm-blackfin/cpu/bf533_rtc.h
@@ -0,0 +1,46 @@
+/*
+ * U-boot - bf533_rtc.h
+ *
+ * Copyright (c) 2005 blackfin.uclinux.org
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _BF533_RTC_H_
+#define _BF533_RTC_H_
+
+void rtc_init(void);
+void wait_for_complete(void);
+void rtc_reset(void);
+
+#define MIN_TO_SECS(_x_) (60 * _x_)
+#define HRS_TO_SECS(_x_) (60 * 60 * _x_)
+#define DAYS_TO_SECS(_x_) (24 * 60 * 60 * _x_)
+
+#define NUM_SECS_IN_DAY (24 * 3600)
+#define NUM_SECS_IN_HOUR (3600)
+#define NUM_SECS_IN_MIN (60)
+
+/* Shift values for RTC_STAT register */
+#define DAY_BITS_OFF 17
+#define HOUR_BITS_OFF 12
+#define MIN_BITS_OFF 6
+#define SEC_BITS_OFF 0
+
+#endif
diff --git a/include/asm-blackfin/cpu/bf533_serial.h b/include/asm-blackfin/cpu/bf533_serial.h
new file mode 100644
index 0000000000..d5e162a8f9
--- /dev/null
+++ b/include/asm-blackfin/cpu/bf533_serial.h
@@ -0,0 +1,79 @@
+/*
+ * U-boot bf533_serial.h
+ *
+ * Copyright (c) 2005 blackfin.uclinux.org
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+
+#ifndef _BF533_SERIAL_H_
+#define _BF533_SERIAL_H_
+
+#define BYTE_REF(addr) (*((volatile char*)addr))
+#define HALFWORD_REF(addr) (*((volatile short*)addr))
+#define WORD_REF(addr) (*((volatile long*)addr))
+
+#define UART_THR_LO HALFWORD_REF(UART_THR)
+#define UART_RBR_LO HALFWORD_REF(UART_RBR)
+#define UART_DLL_LO HALFWORD_REF(UART_DLL)
+#define UART_IER_LO HALFWORD_REF(UART_IER)
+#define UART_IER_ERBFI 0x01
+#define UART_IER_ETBEI 0x02
+#define UART_IER_ELSI 0x04
+#define UART_IER_EDDSI 0x08
+
+#define UART_DLH_LO HALFWORD_REF(UART_DLH)
+#define UART_IIR_LO HALFWORD_REF(UART_IIR)
+#define UART_IIR_NOINT 0x01
+#define UART_IIR_STATUS 0x06
+#define UART_IIR_LSR 0x06
+#define UART_IIR_RBR 0x04
+#define UART_IIR_THR 0x02
+#define UART_IIR_MSR 0x00
+
+#define UART_LCR_LO HALFWORD_REF(UART_LCR)
+#define UART_LCR_WLS5 0
+#define UART_LCR_WLS6 0x01
+#define UART_LCR_WLS7 0x02
+#define UART_LCR_WLS8 0x03
+#define UART_LCR_STB 0x04
+#define UART_LCR_PEN 0x08
+#define UART_LCR_EPS 0x10
+#define UART_LCR_SP 0x20
+#define UART_LCR_SB 0x40
+#define UART_LCR_DLAB 0x80
+
+#define UART_MCR_LO HALFWORD_REF(UART_MCR)
+
+#define UART_LSR_LO HALFWORD_REF(UART_LSR)
+#define UART_LSR_DR 0x01
+#define UART_LSR_OE 0x02
+#define UART_LSR_PE 0x04
+#define UART_LSR_FE 0x08
+#define UART_LSR_BI 0x10
+#define UART_LSR_THRE 0x20
+#define UART_LSR_TEMT 0x40
+
+#define UART_MSR_LO HALFWORD_REF(UART_MSR)
+#define UART_SCR_LO HALFWORD_REF(UART_SCR)
+#define UART_GCTL_LO HALFWORD_REF(UART_GCTL)
+#define UART_GCTL_UCEN 0x01
+
+#endif
diff --git a/include/asm-blackfin/cpu/cdefBF531.h b/include/asm-blackfin/cpu/cdefBF531.h
new file mode 100644
index 0000000000..68d841d185
--- /dev/null
+++ b/include/asm-blackfin/cpu/cdefBF531.h
@@ -0,0 +1,24 @@
+/*
+ * cdefBF531.h
+ *
+ * This file is subject to the terms and conditions of the GNU Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Non-GPL License also available as part of VisualDSP++
+ *
+ * http://www.analog.com/processors/resources/crosscore/visualDspDevSoftware.html
+ *
+ * (c) Copyright 2001-2005 Analog Devices, Inc. All rights reserved
+ *
+ * This file under source code control, please send bugs or changes to:
+ * dsptools.support@analog.com
+ *
+ */
+
+#ifndef _CDEFBF531_H
+#define _CDEFBF531_H
+
+#include <cdefBF532.h>
+
+#endif /* _CDEFBF531_H */
diff --git a/include/asm-blackfin/cpu/cdefBF532.h b/include/asm-blackfin/cpu/cdefBF532.h
new file mode 100644
index 0000000000..a4d422f765
--- /dev/null
+++ b/include/asm-blackfin/cpu/cdefBF532.h
@@ -0,0 +1,398 @@
+/*
+ * cdefBF532.h
+ *
+ * This file is subject to the terms and conditions of the GNU Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Non-GPL License also available as part of VisualDSP++
+ *
+ * http://www.analog.com/processors/resources/crosscore/visualDspDevSoftware.html
+ *
+ * (c) Copyright 2001-2005 Analog Devices, Inc. All rights reserved
+ *
+ * This file under source code control, please send bugs or changes to:
+ * dsptools.support@analog.com
+ *
+ */
+
+#ifndef _CDEF_BF532_H
+#define _CDEF_BF532_H
+
+/*
+ * #if !defined(__ADSPLPBLACKFIN__)
+ * #warning cdefBF532.h should only be included for 532 compatible chips.
+ * #endif
+ */
+
+/* include all Core registers and bit definitions */
+#include <asm/cpu/defBF532.h>
+
+/* include core specific register pointer definitions */
+#include <asm/cpu/cdef_LPBlackfin.h>
+
+/* Clock and System Control (0xFFC0 0400-0xFFC0 07FF) */
+#define pPLL_CTL ((volatile unsigned short *)PLL_CTL)
+#define pPLL_STAT ((volatile unsigned short *)PLL_STAT)
+#define pPLL_LOCKCNT ((volatile unsigned short *)PLL_LOCKCNT)
+#define pCHIPID ((volatile unsigned long *)CHIPID)
+#define pSWRST ((volatile unsigned short *)SWRST)
+#define pSYSCR ((volatile unsigned short *)SYSCR)
+#define pPLL_DIV ((volatile unsigned short *)PLL_DIV)
+#define pVR_CTL ((volatile unsigned short *)VR_CTL)
+
+/* System Interrupt Controller (0xFFC0 0C00-0xFFC0 0FFF) */
+#define pSIC_IAR0 ((volatile unsigned long *)SIC_IAR0)
+#define pSIC_IAR1 ((volatile unsigned long *)SIC_IAR1)
+#define pSIC_IAR2 ((volatile unsigned long *)SIC_IAR2)
+#define pSIC_IAR3 ((volatile unsigned long *)SIC_IAR3)
+#define pSIC_IMASK ((volatile unsigned long *)SIC_IMASK)
+#define pSIC_ISR ((volatile unsigned long *)SIC_ISR)
+#define pSIC_IWR ((volatile unsigned long *)SIC_IWR)
+
+/* Watchdog Timer (0xFFC0 1000-0xFFC0 13FF) */
+#define pWDOG_CTL ((volatile unsigned short *)WDOG_CTL)
+#define pWDOG_CNT ((volatile unsigned long *)WDOG_CNT)
+#define pWDOG_STAT ((volatile unsigned long *)WDOG_STAT)
+
+/* Real Time Clock (0xFFC0 1400-0xFFC0 17FF) */
+#define pRTC_STAT ((volatile unsigned long *)RTC_STAT)
+#define pRTC_ICTL ((volatile unsigned short *)RTC_ICTL)
+#define pRTC_ISTAT ((volatile unsigned short *)RTC_ISTAT)
+#define pRTC_SWCNT ((volatile unsigned short *)RTC_SWCNT)
+#define pRTC_ALARM ((volatile unsigned long *)RTC_ALARM)
+#define pRTC_FAST ((volatile unsigned short *)RTC_FAST)
+#define pRTC_PREN ((volatile unsigned short *)RTC_PREN)
+
+/* General Purpose IO (0xFFC0 2400-0xFFC0 27FF) */
+#define pFIO_DIR ((volatile unsigned short *)FIO_DIR)
+#define pFIO_FLAG_C ((volatile unsigned short *)FIO_FLAG_C)
+#define pFIO_FLAG_S ((volatile unsigned short *)FIO_FLAG_S)
+#define pFIO_MASKA_C ((volatile unsigned short *)FIO_MASKA_C)
+#define pFIO_MASKA_S ((volatile unsigned short *)FIO_MASKA_S)
+#define pFIO_MASKB_C ((volatile unsigned short *)FIO_MASKB_C)
+#define pFIO_MASKB_S ((volatile unsigned short *)FIO_MASKB_S)
+#define pFIO_POLAR ((volatile unsigned short *)FIO_POLAR)
+#define pFIO_EDGE ((volatile unsigned short *)FIO_EDGE)
+#define pFIO_BOTH ((volatile unsigned short *)FIO_BOTH)
+#define pFIO_INEN ((volatile unsigned short *)FIO_INEN)
+#define pFIO_FLAG_D ((volatile unsigned short *)FIO_FLAG_D)
+#define pFIO_FLAG_T ((volatile unsigned short *)FIO_FLAG_T)
+#define pFIO_MASKA_D ((volatile unsigned short *)FIO_MASKA_D)
+#define pFIO_MASKA_T ((volatile unsigned short *)FIO_MASKA_T)
+#define pFIO_MASKB_D ((volatile unsigned short *)FIO_MASKB_D)
+#define pFIO_MASKB_T ((volatile unsigned short *)FIO_MASKB_T)
+
+/* DMA Test Registers */
+#define pDMA_CCOMP ((volatile unsigned long *)DMA_CCOMP)
+#define pDMA_ACOMP ((volatile unsigned long *)DMA_ACOMP)
+#define pDMA_MISR ((volatile unsigned long *)DMA_MISR)
+#define pDMA_TCPER ((volatile unsigned short *)DMA_TCPER)
+#define pDMA_TCCNT ((volatile unsigned short *)DMA_TCCNT)
+#define pDMA_TMODE ((volatile unsigned short *)DMA_TMODE)
+#define pDMA_TMCHAN ((volatile unsigned short *)DMA_TMCHAN)
+#define pDMA_TMSTAT ((volatile unsigned short *)DMA_TMSTAT)
+#define pDMA_TMBD ((volatile unsigned short *)DMA_TMBD)
+#define pDMA_TMM0D ((volatile unsigned short *)DMA_TMM0D)
+#define pDMA_TMM1D ((volatile unsigned short *)DMA_TMM1D)
+#define pDMA_TMMA ((volatile void **)DMA_TMMA)
+
+/* DMA Controller */
+#define pDMA0_CONFIG ((volatile unsigned short *)DMA0_CONFIG)
+#define pDMA0_NEXT_DESC_PTR ((volatile void **)DMA0_NEXT_DESC_PTR)
+#define pDMA0_START_ADDR ((volatile void **)DMA0_START_ADDR)
+#define pDMA0_X_COUNT ((volatile unsigned short *)DMA0_X_COUNT)
+#define pDMA0_Y_COUNT ((volatile unsigned short *)DMA0_Y_COUNT)
+#define pDMA0_X_MODIFY ((volatile signed short *)DMA0_X_MODIFY)
+#define pDMA0_Y_MODIFY ((volatile signed short *)DMA0_Y_MODIFY)
+#define pDMA0_CURR_DESC_PTR ((volatile void **)DMA0_CURR_DESC_PTR)
+#define pDMA0_CURR_ADDR ((volatile void **)DMA0_CURR_ADDR)
+#define pDMA0_CURR_X_COUNT ((volatile unsigned short *)DMA0_CURR_X_COUNT)
+#define pDMA0_CURR_Y_COUNT ((volatile unsigned short *)DMA0_CURR_Y_COUNT)
+#define pDMA0_IRQ_STATUS ((volatile unsigned short *)DMA0_IRQ_STATUS)
+#define pDMA0_PERIPHERAL_MAP ((volatile unsigned short *)DMA0_PERIPHERAL_MAP)
+
+#define pDMA1_CONFIG ((volatile unsigned short *)DMA1_CONFIG)
+#define pDMA1_NEXT_DESC_PTR ((volatile void **)DMA1_NEXT_DESC_PTR)
+#define pDMA1_START_ADDR ((volatile void **)DMA1_START_ADDR)
+#define pDMA1_X_COUNT ((volatile unsigned short *)DMA1_X_COUNT)
+#define pDMA1_Y_COUNT ((volatile unsigned short *)DMA1_Y_COUNT)
+#define pDMA1_X_MODIFY ((volatile signed short *)DMA1_X_MODIFY)
+#define pDMA1_Y_MODIFY ((volatile signed short *)DMA1_Y_MODIFY)
+#define pDMA1_CURR_DESC_PTR ((volatile void **)DMA1_CURR_DESC_PTR)
+#define pDMA1_CURR_ADDR ((volatile void **)DMA1_CURR_ADDR)
+#define pDMA1_CURR_X_COUNT ((volatile unsigned short *)DMA1_CURR_X_COUNT)
+#define pDMA1_CURR_Y_COUNT ((volatile unsigned short *)DMA1_CURR_Y_COUNT)
+#define pDMA1_IRQ_STATUS ((volatile unsigned short *)DMA1_IRQ_STATUS)
+#define pDMA1_PERIPHERAL_MAP ((volatile unsigned short *)DMA1_PERIPHERAL_MAP)
+
+#define pDMA2_CONFIG ((volatile unsigned short *)DMA2_CONFIG)
+#define pDMA2_NEXT_DESC_PTR ((volatile void **)DMA2_NEXT_DESC_PTR)
+#define pDMA2_START_ADDR ((volatile void **)DMA2_START_ADDR)
+#define pDMA2_X_COUNT ((volatile unsigned short *)DMA2_X_COUNT)
+#define pDMA2_Y_COUNT ((volatile unsigned short *)DMA2_Y_COUNT)
+#define pDMA2_X_MODIFY ((volatile signed short *)DMA2_X_MODIFY)
+#define pDMA2_Y_MODIFY ((volatile signed short *)DMA2_Y_MODIFY)
+#define pDMA2_CURR_DESC_PTR ((volatile void **)DMA2_CURR_DESC_PTR)
+#define pDMA2_CURR_ADDR ((volatile void **)DMA2_CURR_ADDR)
+#define pDMA2_CURR_X_COUNT ((volatile unsigned short *)DMA2_CURR_X_COUNT)
+#define pDMA2_CURR_Y_COUNT ((volatile unsigned short *)DMA2_CURR_Y_COUNT)
+#define pDMA2_IRQ_STATUS ((volatile unsigned short *)DMA2_IRQ_STATUS)
+#define pDMA2_PERIPHERAL_MAP ((volatile unsigned short *)DMA2_PERIPHERAL_MAP)
+
+#define pDMA3_CONFIG ((volatile unsigned short *)DMA3_CONFIG)
+#define pDMA3_NEXT_DESC_PTR ((volatile void **)DMA3_NEXT_DESC_PTR)
+#define pDMA3_START_ADDR ((volatile void **)DMA3_START_ADDR)
+#define pDMA3_X_COUNT ((volatile unsigned short *)DMA3_X_COUNT)
+#define pDMA3_Y_COUNT ((volatile unsigned short *)DMA3_Y_COUNT)
+#define pDMA3_X_MODIFY ((volatile signed short *)DMA3_X_MODIFY)
+#define pDMA3_Y_MODIFY ((volatile signed short *)DMA3_Y_MODIFY)
+#define pDMA3_CURR_DESC_PTR ((volatile void **)DMA3_CURR_DESC_PTR)
+#define pDMA3_CURR_ADDR ((volatile void **)DMA3_CURR_ADDR)
+#define pDMA3_CURR_X_COUNT ((volatile unsigned short *)DMA3_CURR_X_COUNT)
+#define pDMA3_CURR_Y_COUNT ((volatile unsigned short *)DMA3_CURR_Y_COUNT)
+#define pDMA3_IRQ_STATUS ((volatile unsigned short *)DMA3_IRQ_STATUS)
+#define pDMA3_PERIPHERAL_MAP ((volatile unsigned short *)DMA3_PERIPHERAL_MAP)
+
+#define pDMA4_CONFIG ((volatile unsigned short *)DMA4_CONFIG)
+#define pDMA4_NEXT_DESC_PTR ((volatile void **)DMA4_NEXT_DESC_PTR)
+#define pDMA4_START_ADDR ((volatile void **)DMA4_START_ADDR)
+#define pDMA4_X_COUNT ((volatile unsigned short *)DMA4_X_COUNT)
+#define pDMA4_Y_COUNT ((volatile unsigned short *)DMA4_Y_COUNT)
+#define pDMA4_X_MODIFY ((volatile signed short *)DMA4_X_MODIFY)
+#define pDMA4_Y_MODIFY ((volatile signed short *)DMA4_Y_MODIFY)
+#define pDMA4_CURR_DESC_PTR ((volatile void **)DMA4_CURR_DESC_PTR)
+#define pDMA4_CURR_ADDR ((volatile void **)DMA4_CURR_ADDR)
+#define pDMA4_CURR_X_COUNT ((volatile unsigned short *)DMA4_CURR_X_COUNT)
+#define pDMA4_CURR_Y_COUNT ((volatile unsigned short *)DMA4_CURR_Y_COUNT)
+#define pDMA4_IRQ_STATUS ((volatile unsigned short *)DMA4_IRQ_STATUS)
+#define pDMA4_PERIPHERAL_MAP ((volatile unsigned short *)DMA4_PERIPHERAL_MAP)
+
+#define pDMA5_CONFIG ((volatile unsigned short *)DMA5_CONFIG)
+#define pDMA5_NEXT_DESC_PTR ((volatile void **)DMA5_NEXT_DESC_PTR)
+#define pDMA5_START_ADDR ((volatile void **)DMA5_START_ADDR)
+#define pDMA5_X_COUNT ((volatile unsigned short *)DMA5_X_COUNT)
+#define pDMA5_Y_COUNT ((volatile unsigned short *)DMA5_Y_COUNT)
+#define pDMA5_X_MODIFY ((volatile signed short *)DMA5_X_MODIFY)
+#define pDMA5_Y_MODIFY ((volatile signed short *)DMA5_Y_MODIFY)
+#define pDMA5_CURR_DESC_PTR ((volatile void **)DMA5_CURR_DESC_PTR)
+#define pDMA5_CURR_ADDR ((volatile void **)DMA5_CURR_ADDR)
+#define pDMA5_CURR_X_COUNT ((volatile unsigned short *)DMA5_CURR_X_COUNT)
+#define pDMA5_CURR_Y_COUNT ((volatile unsigned short *)DMA5_CURR_Y_COUNT)
+#define pDMA5_IRQ_STATUS ((volatile unsigned short *)DMA5_IRQ_STATUS)
+#define pDMA5_PERIPHERAL_MAP ((volatile unsigned short *)DMA5_PERIPHERAL_MAP)
+
+#define pDMA6_CONFIG ((volatile unsigned short *)DMA6_CONFIG)
+#define pDMA6_NEXT_DESC_PTR ((volatile void **)DMA6_NEXT_DESC_PTR)
+#define pDMA6_START_ADDR ((volatile void **)DMA6_START_ADDR)
+#define pDMA6_X_COUNT ((volatile unsigned short *)DMA6_X_COUNT)
+#define pDMA6_Y_COUNT ((volatile unsigned short *)DMA6_Y_COUNT)
+#define pDMA6_X_MODIFY ((volatile signed short *)DMA6_X_MODIFY)
+#define pDMA6_Y_MODIFY ((volatile signed short *)DMA6_Y_MODIFY)
+#define pDMA6_CURR_DESC_PTR ((volatile void **)DMA6_CURR_DESC_PTR)
+#define pDMA6_CURR_ADDR ((volatile void **)DMA6_CURR_ADDR)
+#define pDMA6_CURR_X_COUNT ((volatile unsigned short *)DMA6_CURR_X_COUNT)
+#define pDMA6_CURR_Y_COUNT ((volatile unsigned short *)DMA6_CURR_Y_COUNT)
+#define pDMA6_IRQ_STATUS ((volatile unsigned short *)DMA6_IRQ_STATUS)
+#define pDMA6_PERIPHERAL_MAP ((volatile unsigned short *)DMA6_PERIPHERAL_MAP)
+
+#define pDMA7_CONFIG ((volatile unsigned short *)DMA7_CONFIG)
+#define pDMA7_NEXT_DESC_PTR ((volatile void **)DMA7_NEXT_DESC_PTR)
+#define pDMA7_START_ADDR ((volatile void **)DMA7_START_ADDR)
+#define pDMA7_X_COUNT ((volatile unsigned short *)DMA7_X_COUNT)
+#define pDMA7_Y_COUNT ((volatile unsigned short *)DMA7_Y_COUNT)
+#define pDMA7_X_MODIFY ((volatile signed short *)DMA7_X_MODIFY)
+#define pDMA7_Y_MODIFY ((volatile signed short *)DMA7_Y_MODIFY)
+#define pDMA7_CURR_DESC_PTR ((volatile void **)DMA7_CURR_DESC_PTR)
+#define pDMA7_CURR_ADDR ((volatile void **)DMA7_CURR_ADDR)
+#define pDMA7_CURR_X_COUNT ((volatile unsigned short *)DMA7_CURR_X_COUNT)
+#define pDMA7_CURR_Y_COUNT ((volatile unsigned short *)DMA7_CURR_Y_COUNT)
+#define pDMA7_IRQ_STATUS ((volatile unsigned short *)DMA7_IRQ_STATUS)
+#define pDMA7_PERIPHERAL_MAP ((volatile unsigned short *)DMA7_PERIPHERAL_MAP)
+
+#define pMDMA_D1_CONFIG ((volatile unsigned short *)MDMA_D1_CONFIG)
+#define pMDMA_D1_NEXT_DESC_PTR ((volatile void **)MDMA_D1_NEXT_DESC_PTR)
+#define pMDMA_D1_START_ADDR ((volatile void **)MDMA_D1_START_ADDR)
+#define pMDMA_D1_X_COUNT ((volatile unsigned short *)MDMA_D1_X_COUNT)
+#define pMDMA_D1_Y_COUNT ((volatile unsigned short *)MDMA_D1_Y_COUNT)
+#define pMDMA_D1_X_MODIFY ((volatile signed short *)MDMA_D1_X_MODIFY)
+#define pMDMA_D1_Y_MODIFY ((volatile signed short *)MDMA_D1_Y_MODIFY)
+#define pMDMA_D1_CURR_DESC_PTR ((volatile void **)MDMA_D1_CURR_DESC_PTR)
+#define pMDMA_D1_CURR_ADDR ((volatile void **)MDMA_D1_CURR_ADDR)
+#define pMDMA_D1_CURR_X_COUNT ((volatile unsigned short *)MDMA_D1_CURR_X_COUNT)
+#define pMDMA_D1_CURR_Y_COUNT ((volatile unsigned short *)MDMA_D1_CURR_Y_COUNT)
+#define pMDMA_D1_IRQ_STATUS ((volatile unsigned short *)MDMA_D1_IRQ_STATUS)
+#define pMDMA_D1_PERIPHERAL_MAP ((volatile unsigned short *)MDMA_D1_PERIPHERAL_MAP)
+
+#define pMDMA_S1_CONFIG ((volatile unsigned short *)MDMA_S1_CONFIG)
+#define pMDMA_S1_NEXT_DESC_PTR ((volatile void **)MDMA_S1_NEXT_DESC_PTR)
+#define pMDMA_S1_START_ADDR ((volatile void **)MDMA_S1_START_ADDR)
+#define pMDMA_S1_X_COUNT ((volatile unsigned short *)MDMA_S1_X_COUNT)
+#define pMDMA_S1_Y_COUNT ((volatile unsigned short *)MDMA_S1_Y_COUNT)
+#define pMDMA_S1_X_MODIFY ((volatile signed short *)MDMA_S1_X_MODIFY)
+#define pMDMA_S1_Y_MODIFY ((volatile signed short *)MDMA_S1_Y_MODIFY)
+#define pMDMA_S1_CURR_DESC_PTR ((volatile void **)MDMA_S1_CURR_DESC_PTR)
+#define pMDMA_S1_CURR_ADDR ((volatile void **)MDMA_S1_CURR_ADDR)
+#define pMDMA_S1_CURR_X_COUNT ((volatile unsigned short *)MDMA_S1_CURR_X_COUNT)
+#define pMDMA_S1_CURR_Y_COUNT ((volatile unsigned short *)MDMA_S1_CURR_Y_COUNT)
+#define pMDMA_S1_IRQ_STATUS ((volatile unsigned short *)MDMA_S1_IRQ_STATUS)
+#define pMDMA_S1_PERIPHERAL_MAP ((volatile unsigned short *)MDMA_S1_PERIPHERAL_MAP)
+
+#define pMDMA_D0_CONFIG ((volatile unsigned short *)MDMA_D0_CONFIG)
+#define pMDMA_D0_NEXT_DESC_PTR ((volatile void **)MDMA_D0_NEXT_DESC_PTR)
+#define pMDMA_D0_START_ADDR ((volatile void **)MDMA_D0_START_ADDR)
+#define pMDMA_D0_X_COUNT ((volatile unsigned short *)MDMA_D0_X_COUNT)
+#define pMDMA_D0_Y_COUNT ((volatile unsigned short *)MDMA_D0_Y_COUNT)
+#define pMDMA_D0_X_MODIFY ((volatile signed short *)MDMA_D0_X_MODIFY)
+#define pMDMA_D0_Y_MODIFY ((volatile signed short *)MDMA_D0_Y_MODIFY)
+#define pMDMA_D0_CURR_DESC_PTR ((volatile void **)MDMA_D0_CURR_DESC_PTR)
+#define pMDMA_D0_CURR_ADDR ((volatile void **)MDMA_D0_CURR_ADDR)
+#define pMDMA_D0_CURR_X_COUNT ((volatile unsigned short *)MDMA_D0_CURR_X_COUNT)
+#define pMDMA_D0_CURR_Y_COUNT ((volatile unsigned short *)MDMA_D0_CURR_Y_COUNT)
+#define pMDMA_D0_IRQ_STATUS ((volatile unsigned short *)MDMA_D0_IRQ_STATUS)
+#define pMDMA_D0_PERIPHERAL_MAP ((volatile unsigned short *)MDMA_D0_PERIPHERAL_MAP)
+
+#define pMDMA_S0_CONFIG ((volatile unsigned short *)MDMA_S0_CONFIG)
+#define pMDMA_S0_NEXT_DESC_PTR ((volatile void **)MDMA_S0_NEXT_DESC_PTR)
+#define pMDMA_S0_START_ADDR ((volatile void **)MDMA_S0_START_ADDR)
+#define pMDMA_S0_X_COUNT ((volatile unsigned short *)MDMA_S0_X_COUNT)
+#define pMDMA_S0_Y_COUNT ((volatile unsigned short *)MDMA_S0_Y_COUNT)
+#define pMDMA_S0_X_MODIFY ((volatile signed short *)MDMA_S0_X_MODIFY)
+#define pMDMA_S0_Y_MODIFY ((volatile signed short *)MDMA_S0_Y_MODIFY)
+#define pMDMA_S0_CURR_DESC_PTR ((volatile void **)MDMA_S0_CURR_DESC_PTR)
+#define pMDMA_S0_CURR_ADDR ((volatile void **)MDMA_S0_CURR_ADDR)
+#define pMDMA_S0_CURR_X_COUNT ((volatile unsigned short *)MDMA_S0_CURR_X_COUNT)
+#define pMDMA_S0_CURR_Y_COUNT ((volatile unsigned short *)MDMA_S0_CURR_Y_COUNT)
+#define pMDMA_S0_IRQ_STATUS ((volatile unsigned short *)MDMA_S0_IRQ_STATUS)
+#define pMDMA_S0_PERIPHERAL_MAP ((volatile unsigned short *)MDMA_S0_PERIPHERAL_MAP)
+
+/* Aysnchronous Memory Controller - External Bus Interface Unit (0xFFC0 3C00-0xFFC0 3FFF) */
+#define pEBIU_AMGCTL ((volatile unsigned short *)EBIU_AMGCTL)
+#define pEBIU_AMBCTL0 ((volatile unsigned long *)EBIU_AMBCTL0)
+#define pEBIU_AMBCTL1 ((volatile unsigned long *)EBIU_AMBCTL1)
+
+/* System Bus Interface Unit (0xFFC0 4800-0xFFC0 4FFF) */
+/* #define L1SBAR 0xFFC04840 */ /* L1 SRAM Base Address Register */
+/* #define L1CSR 0xFFC04844 */ /* L1 SRAM Control Initialization Register */
+
+/*
+ * #define pDB_ACOMP ((volatile void **)DB_ACOMP)
+ * #define pDB_CCOMP ((volatile unsigned long *)DB_CCOMP)
+ */
+
+/* SDRAM Controller External Bus Interface Unit (0xFFC0 4C00-0xFFC0 4FFF) */
+#define pEBIU_SDGCTL ((volatile unsigned long *)EBIU_SDGCTL)
+#define pEBIU_SDRRC ((volatile unsigned short *)EBIU_SDRRC)
+#define pEBIU_SDSTAT ((volatile unsigned short *)EBIU_SDSTAT)
+#define pEBIU_SDBCTL ((volatile unsigned short *)EBIU_SDBCTL)
+
+/* UART Controller */
+#define pUART_THR ((volatile unsigned short *)UART_THR)
+#define pUART_RBR ((volatile unsigned short *)UART_RBR)
+#define pUART_DLL ((volatile unsigned short *)UART_DLL)
+#define pUART_IER ((volatile unsigned short *)UART_IER)
+#define pUART_DLH ((volatile unsigned short *)UART_DLH)
+#define pUART_IIR ((volatile unsigned short *)UART_IIR)
+#define pUART_LCR ((volatile unsigned short *)UART_LCR)
+#define pUART_MCR ((volatile unsigned short *)UART_MCR)
+#define pUART_LSR ((volatile unsigned short *)UART_LSR)
+
+/*
+ * #define UART_MSR
+ */
+#define pUART_SCR ((volatile unsigned short *)UART_SCR)
+#define pUART_GCTL ((volatile unsigned short *)UART_GCTL)
+
+/* SPI Controller */
+#define pSPI_CTL ((volatile unsigned short *)SPI_CTL)
+#define pSPI_FLG ((volatile unsigned short *)SPI_FLG)
+#define pSPI_STAT ((volatile unsigned short *)SPI_STAT)
+#define pSPI_TDBR ((volatile unsigned short *)SPI_TDBR)
+#define pSPI_RDBR ((volatile unsigned short *)SPI_RDBR)
+#define pSPI_BAUD ((volatile unsigned short *)SPI_BAUD)
+#define pSPI_SHADOW ((volatile unsigned short *)SPI_SHADOW)
+
+/* TIMER 0, 1, 2 Registers */
+#define pTIMER0_CONFIG ((volatile unsigned short *)TIMER0_CONFIG)
+#define pTIMER0_COUNTER ((volatile unsigned long *)TIMER0_COUNTER)
+#define pTIMER0_PERIOD ((volatile unsigned long *)TIMER0_PERIOD)
+#define pTIMER0_WIDTH ((volatile unsigned long *)TIMER0_WIDTH)
+
+#define pTIMER1_CONFIG ((volatile unsigned short *)TIMER1_CONFIG)
+#define pTIMER1_COUNTER ((volatile unsigned long *)TIMER1_COUNTER)
+#define pTIMER1_PERIOD ((volatile unsigned long *)TIMER1_PERIOD)
+#define pTIMER1_WIDTH ((volatile unsigned long *)TIMER1_WIDTH)
+
+#define pTIMER2_CONFIG ((volatile unsigned short *)TIMER2_CONFIG)
+#define pTIMER2_COUNTER ((volatile unsigned long *)TIMER2_COUNTER)
+#define pTIMER2_PERIOD ((volatile unsigned long *)TIMER2_PERIOD)
+#define pTIMER2_WIDTH ((volatile unsigned long *)TIMER2_WIDTH)
+
+#define pTIMER_ENABLE ((volatile unsigned short *)TIMER_ENABLE)
+#define pTIMER_DISABLE ((volatile unsigned short *)TIMER_DISABLE)
+#define pTIMER_STATUS ((volatile unsigned short *)TIMER_STATUS)
+
+/* SPORT0 Controller */
+#define pSPORT0_TCR1 ((volatile unsigned short *)SPORT0_TCR1)
+#define pSPORT0_TCR2 ((volatile unsigned short *)SPORT0_TCR2)
+#define pSPORT0_TCLKDIV ((volatile unsigned short *)SPORT0_TCLKDIV)
+#define pSPORT0_TFSDIV ((volatile unsigned short *)SPORT0_TFSDIV)
+#define pSPORT0_TX ((volatile long *)SPORT0_TX)
+#define pSPORT0_RX ((volatile long *)SPORT0_RX)
+#define pSPORT0_TX32 ((volatile long *)SPORT0_TX)
+#define pSPORT0_RX32 ((volatile long *)SPORT0_RX)
+#define pSPORT0_TX16 ((volatile unsigned short *)SPORT0_TX)
+#define pSPORT0_RX16 ((volatile unsigned short *)SPORT0_RX)
+#define pSPORT0_RCR1 ((volatile unsigned short *)SPORT0_RCR1)
+#define pSPORT0_RCR2 ((volatile unsigned short *)SPORT0_RCR2)
+#define pSPORT0_RCLKDIV ((volatile unsigned short *)SPORT0_RCLKDIV)
+#define pSPORT0_RFSDIV ((volatile unsigned short *)SPORT0_RFSDIV)
+#define pSPORT0_STAT ((volatile unsigned short *)SPORT0_STAT)
+#define pSPORT0_CHNL ((volatile unsigned short *)SPORT0_CHNL)
+#define pSPORT0_MCMC1 ((volatile unsigned short *)SPORT0_MCMC1)
+#define pSPORT0_MCMC2 ((volatile unsigned short *)SPORT0_MCMC2)
+#define pSPORT0_MTCS0 ((volatile unsigned long *)SPORT0_MTCS0)
+#define pSPORT0_MTCS1 ((volatile unsigned long *)SPORT0_MTCS1)
+#define pSPORT0_MTCS2 ((volatile unsigned long *)SPORT0_MTCS2)
+#define pSPORT0_MTCS3 ((volatile unsigned long *)SPORT0_MTCS3)
+#define pSPORT0_MRCS0 ((volatile unsigned long *)SPORT0_MRCS0)
+#define pSPORT0_MRCS1 ((volatile unsigned long *)SPORT0_MRCS1)
+#define pSPORT0_MRCS2 ((volatile unsigned long *)SPORT0_MRCS2)
+#define pSPORT0_MRCS3 ((volatile unsigned long *)SPORT0_MRCS3)
+
+/* SPORT1 Controller */
+#define pSPORT1_TCR1 ((volatile unsigned short *)SPORT1_TCR1)
+#define pSPORT1_TCR2 ((volatile unsigned short *)SPORT1_TCR2)
+#define pSPORT1_TCLKDIV ((volatile unsigned short *)SPORT1_TCLKDIV)
+#define pSPORT1_TFSDIV ((volatile unsigned short *)SPORT1_TFSDIV)
+#define pSPORT1_TX ((volatile long *)SPORT1_TX)
+#define pSPORT1_RX ((volatile long *)SPORT1_RX)
+#define pSPORT1_TX32 ((volatile long *)SPORT1_TX)
+#define pSPORT1_RX32 ((volatile long *)SPORT1_RX)
+#define pSPORT1_TX16 ((volatile unsigned short *)SPORT1_TX)
+#define pSPORT1_RX16 ((volatile unsigned short *)SPORT1_RX)
+#define pSPORT1_RCR1 ((volatile unsigned short *)SPORT1_RCR1)
+#define pSPORT1_RCR2 ((volatile unsigned short *)SPORT1_RCR2)
+#define pSPORT1_RCLKDIV ((volatile unsigned short *)SPORT1_RCLKDIV)
+#define pSPORT1_RFSDIV ((volatile unsigned short *)SPORT1_RFSDIV)
+#define pSPORT1_STAT ((volatile unsigned short *)SPORT1_STAT)
+#define pSPORT1_CHNL ((volatile unsigned short *)SPORT1_CHNL)
+#define pSPORT1_MCMC1 ((volatile unsigned short *)SPORT1_MCMC1)
+#define pSPORT1_MCMC2 ((volatile unsigned short *)SPORT1_MCMC2)
+#define pSPORT1_MTCS0 ((volatile unsigned long *)SPORT1_MTCS0)
+#define pSPORT1_MTCS1 ((volatile unsigned long *)SPORT1_MTCS1)
+#define pSPORT1_MTCS2 ((volatile unsigned long *)SPORT1_MTCS2)
+#define pSPORT1_MTCS3 ((volatile unsigned long *)SPORT1_MTCS3)
+#define pSPORT1_MRCS0 ((volatile unsigned long *)SPORT1_MRCS0)
+#define pSPORT1_MRCS1 ((volatile unsigned long *)SPORT1_MRCS1)
+#define pSPORT1_MRCS2 ((volatile unsigned long *)SPORT1_MRCS2)
+#define pSPORT1_MRCS3 ((volatile unsigned long *)SPORT1_MRCS3)
+
+/* Parallel Peripheral Interface (PPI) */
+#define pPPI_CONTROL ((volatile unsigned short *)PPI_CONTROL)
+#define pPPI_STATUS ((volatile unsigned short *)PPI_STATUS)
+#define pPPI_DELAY ((volatile unsigned short *)PPI_DELAY)
+#define pPPI_COUNT ((volatile unsigned short *)PPI_COUNT)
+#define pPPI_FRAME ((volatile unsigned short *)PPI_FRAME)
+
+#endif /* _CDEF_BF532_H */
diff --git a/include/asm-blackfin/cpu/cdefBF533.h b/include/asm-blackfin/cpu/cdefBF533.h
new file mode 100644
index 0000000000..8c751e6073
--- /dev/null
+++ b/include/asm-blackfin/cpu/cdefBF533.h
@@ -0,0 +1,24 @@
+/*
+ * cdefBF533.h
+ *
+ * This file is subject to the terms and conditions of the GNU Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Non-GPL License also available as part of VisualDSP++
+ *
+ * http://www.analog.com/processors/resources/crosscore/visualDspDevSoftware.html
+ *
+ * (c) Copyright 2001-2005 Analog Devices, Inc. All rights reserved
+ *
+ * This file under source code control, please send bugs or changes to:
+ * dsptools.support@analog.com
+ *
+ */
+
+#ifndef _CDEFBF533_H
+#define _CDEFBF533_H
+
+#include <asm/cpu/cdefBF532.h>
+
+#endif /* _CDEFBF533_H */
diff --git a/include/asm-blackfin/cpu/cdefBF53x.h b/include/asm-blackfin/cpu/cdefBF53x.h
new file mode 100644
index 0000000000..db4eaa9cf2
--- /dev/null
+++ b/include/asm-blackfin/cpu/cdefBF53x.h
@@ -0,0 +1,32 @@
+/************************************************************************
+ *
+ * cdefBF53x.h
+ *
+ * (c) Copyright 2002-2003 Analog Devices, Inc. All rights reserved.
+ *
+ ************************************************************************/
+
+#ifndef _CDEFBF53x_H
+#define _CDEFBF53x_H
+
+#if defined(__ADSPBF531__)
+ #include <asm/cpu/cdefBF531.h>
+#elif defined(__ADSPBF532__)
+ #include <asm/cpu/cdefBF532.h>
+#elif defined(__ADSPBF533__)
+ #include <asm/cpu/cdefBF533.h>
+#elif defined(__ADSPBF561__)
+ #include <asm/cpu/cdefBF561.h>
+#elif defined(__ADSPBF535__)
+ #include <asm/cpu/cdefBF535.h>
+#elif defined(__AD6532__)
+ #include <sam/cpu/cdefAD6532.h>
+#else
+ #if defined(__ADSPLPBLACKFIN__)
+ #include <asm/cpu/cdefBF532.h>
+ #else
+ #include <asm/cpu/cdefBF535.h>
+ #endif
+#endif
+
+#endif /* _CDEFBF53x_H */
diff --git a/include/asm-blackfin/cpu/cdef_LPBlackfin.h b/include/asm-blackfin/cpu/cdef_LPBlackfin.h
new file mode 100644
index 0000000000..e6471cbcb3
--- /dev/null
+++ b/include/asm-blackfin/cpu/cdef_LPBlackfin.h
@@ -0,0 +1,185 @@
+/*
+ * cdef_LPBlackfin.h
+ *
+ * This file is subject to the terms and conditions of the GNU Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Non-GPL License also available as part of VisualDSP++
+ *
+ * http://www.analog.com/processors/resources/crosscore/visualDspDevSoftware.html
+ *
+ * (c) Copyright 2001-2005 Analog Devices, Inc. All rights reserved
+ *
+ * This file under source code control, please send bugs or changes to:
+ * dsptools.support@analog.com
+ *
+ */
+
+#ifndef _CDEF_LPBLACKFIN_H
+#define _CDEF_LPBLACKFIN_H
+
+/*
+ * #if !defined(__ADSPLPBLACKFIN__)
+ * #warning cdef_LPBlackfin.h should only be included for 532 compatible chips.
+ * #endif
+ */
+#include <asm/cpu/def_LPBlackfin.h>
+
+/* Cache & SRAM Memory */
+#define pSRAM_BASE_ADDRESS ((volatile void **)SRAM_BASE_ADDRESS)
+#define pDMEM_CONTROL ((volatile unsigned long *)DMEM_CONTROL)
+#define pDCPLB_STATUS ((volatile unsigned long *)DCPLB_STATUS)
+#define pDCPLB_FAULT_ADDR ((volatile void **)DCPLB_FAULT_ADDR)
+
+/* #define MMR_TIMEOUT 0xFFE00010 */ /* Memory-Mapped Register Timeout Register */
+#define pDCPLB_ADDR0 ((volatile void **)DCPLB_ADDR0)
+#define pDCPLB_ADDR1 ((volatile void **)DCPLB_ADDR1)
+#define pDCPLB_ADDR2 ((volatile void **)DCPLB_ADDR2)
+#define pDCPLB_ADDR3 ((volatile void **)DCPLB_ADDR3)
+#define pDCPLB_ADDR4 ((volatile void **)DCPLB_ADDR4)
+#define pDCPLB_ADDR5 ((volatile void **)DCPLB_ADDR5)
+#define pDCPLB_ADDR6 ((volatile void **)DCPLB_ADDR6)
+#define pDCPLB_ADDR7 ((volatile void **)DCPLB_ADDR7)
+#define pDCPLB_ADDR8 ((volatile void **)DCPLB_ADDR8)
+#define pDCPLB_ADDR9 ((volatile void **)DCPLB_ADDR9)
+#define pDCPLB_ADDR10 ((volatile void **)DCPLB_ADDR10)
+#define pDCPLB_ADDR11 ((volatile void **)DCPLB_ADDR11)
+#define pDCPLB_ADDR12 ((volatile void **)DCPLB_ADDR12)
+#define pDCPLB_ADDR13 ((volatile void **)DCPLB_ADDR13)
+#define pDCPLB_ADDR14 ((volatile void **)DCPLB_ADDR14)
+#define pDCPLB_ADDR15 ((volatile void **)DCPLB_ADDR15)
+#define pDCPLB_DATA0 ((volatile unsigned long *)DCPLB_DATA0)
+#define pDCPLB_DATA1 ((volatile unsigned long *)DCPLB_DATA1)
+#define pDCPLB_DATA2 ((volatile unsigned long *)DCPLB_DATA2)
+#define pDCPLB_DATA3 ((volatile unsigned long *)DCPLB_DATA3)
+#define pDCPLB_DATA4 ((volatile unsigned long *)DCPLB_DATA4)
+#define pDCPLB_DATA5 ((volatile unsigned long *)DCPLB_DATA5)
+#define pDCPLB_DATA6 ((volatile unsigned long *)DCPLB_DATA6)
+#define pDCPLB_DATA7 ((volatile unsigned long *)DCPLB_DATA7)
+#define pDCPLB_DATA8 ((volatile unsigned long *)DCPLB_DATA8)
+#define pDCPLB_DATA9 ((volatile unsigned long *)DCPLB_DATA9)
+#define pDCPLB_DATA10 ((volatile unsigned long *)DCPLB_DATA10)
+#define pDCPLB_DATA11 ((volatile unsigned long *)DCPLB_DATA11)
+#define pDCPLB_DATA12 ((volatile unsigned long *)DCPLB_DATA12)
+#define pDCPLB_DATA13 ((volatile unsigned long *)DCPLB_DATA13)
+#define pDCPLB_DATA14 ((volatile unsigned long *)DCPLB_DATA14)
+#define pDCPLB_DATA15 ((volatile unsigned long *)DCPLB_DATA15)
+#define pDTEST_COMMAND ((volatile unsigned long *)DTEST_COMMAND)
+
+/* #define DTEST_INDEX 0xFFE00304 */ /* Data Test Index Register */
+#define pDTEST_DATA0 ((volatile unsigned long *)DTEST_DATA0)
+#define pDTEST_DATA1 ((volatile unsigned long *)DTEST_DATA1)
+
+/*
+ * # define DTEST_DATA2 0xFFE00408 Data Test Data Register
+ * #define DTEST_DATA3 0xFFE0040C Data Test Data Register
+ */
+#define pIMEM_CONTROL ((volatile unsigned long *)IMEM_CONTROL)
+#define pICPLB_STATUS ((volatile unsigned long *)ICPLB_STATUS)
+#define pICPLB_FAULT_ADDR ((volatile void **)ICPLB_FAULT_ADDR)
+#define pICPLB_ADDR0 ((volatile void **)ICPLB_ADDR0)
+#define pICPLB_ADDR1 ((volatile void **)ICPLB_ADDR1)
+#define pICPLB_ADDR2 ((volatile void **)ICPLB_ADDR2)
+#define pICPLB_ADDR3 ((volatile void **)ICPLB_ADDR3)
+#define pICPLB_ADDR4 ((volatile void **)ICPLB_ADDR4)
+#define pICPLB_ADDR5 ((volatile void **)ICPLB_ADDR5)
+#define pICPLB_ADDR6 ((volatile void **)ICPLB_ADDR6)
+#define pICPLB_ADDR7 ((volatile void **)ICPLB_ADDR7)
+#define pICPLB_ADDR8 ((volatile void **)ICPLB_ADDR8)
+#define pICPLB_ADDR9 ((volatile void **)ICPLB_ADDR9)
+#define pICPLB_ADDR10 ((volatile void **)ICPLB_ADDR10)
+#define pICPLB_ADDR11 ((volatile void **)ICPLB_ADDR11)
+#define pICPLB_ADDR12 ((volatile void **)ICPLB_ADDR12)
+#define pICPLB_ADDR13 ((volatile void **)ICPLB_ADDR13)
+#define pICPLB_ADDR14 ((volatile void **)ICPLB_ADDR14)
+#define pICPLB_ADDR15 ((volatile void **)ICPLB_ADDR15)
+#define pICPLB_DATA0 ((volatile unsigned long *)ICPLB_DATA0)
+#define pICPLB_DATA1 ((volatile unsigned long *)ICPLB_DATA1)
+#define pICPLB_DATA2 ((volatile unsigned long *)ICPLB_DATA2)
+#define pICPLB_DATA3 ((volatile unsigned long *)ICPLB_DATA3)
+#define pICPLB_DATA4 ((volatile unsigned long *)ICPLB_DATA4)
+#define pICPLB_DATA5 ((volatile unsigned long *)ICPLB_DATA5)
+#define pICPLB_DATA6 ((volatile unsigned long *)ICPLB_DATA6)
+#define pICPLB_DATA7 ((volatile unsigned long *)ICPLB_DATA7)
+#define pICPLB_DATA8 ((volatile unsigned long *)ICPLB_DATA8)
+#define pICPLB_DATA9 ((volatile unsigned long *)ICPLB_DATA9)
+#define pICPLB_DATA10 ((volatile unsigned long *)ICPLB_DATA10)
+#define pICPLB_DATA11 ((volatile unsigned long *)ICPLB_DATA11)
+#define pICPLB_DATA12 ((volatile unsigned long *)ICPLB_DATA12)
+#define pICPLB_DATA13 ((volatile unsigned long *)ICPLB_DATA13)
+#define pICPLB_DATA14 ((volatile unsigned long *)ICPLB_DATA14)
+#define pICPLB_DATA15 ((volatile unsigned long *)ICPLB_DATA15)
+#define pITEST_COMMAND ((volatile unsigned long *)ITEST_COMMAND)
+
+/* #define ITEST_INDEX 0xFFE01304 */ /* Instruction Test Index Register */
+#define pITEST_DATA0 ((volatile unsigned long *)ITEST_DATA0)
+#define pITEST_DATA1 ((volatile unsigned long *)ITEST_DATA1)
+
+/* Event/Interrupt Registers */
+#define pEVT0 ((volatile void **)EVT0)
+#define pEVT1 ((volatile void **)EVT1)
+#define pEVT2 ((volatile void **)EVT2)
+#define pEVT3 ((volatile void **)EVT3)
+#define pEVT4 ((volatile void **)EVT4)
+#define pEVT5 ((volatile void **)EVT5)
+#define pEVT6 ((volatile void **)EVT6)
+#define pEVT7 ((volatile void **)EVT7)
+#define pEVT8 ((volatile void **)EVT8)
+#define pEVT9 ((volatile void **)EVT9)
+#define pEVT10 ((volatile void **)EVT10)
+#define pEVT11 ((volatile void **)EVT11)
+#define pEVT12 ((volatile void **)EVT12)
+#define pEVT13 ((volatile void **)EVT13)
+#define pEVT14 ((volatile void **)EVT14)
+#define pEVT15 ((volatile void **)EVT15)
+#define pIMASK ((volatile unsigned long *)IMASK)
+#define pIPEND ((volatile unsigned long *)IPEND)
+#define pILAT ((volatile unsigned long *)ILAT)
+
+/* Core Timer Registers */
+#define pTCNTL ((volatile unsigned long *)TCNTL)
+#define pTPERIOD ((volatile unsigned long *)TPERIOD)
+#define pTSCALE ((volatile unsigned long *)TSCALE)
+#define pTCOUNT ((volatile unsigned long *)TCOUNT)
+
+/* Debug/MP/Emulation Registers */
+#define pDSPID ((volatile unsigned long *)DSPID)
+#define pDBGCTL ((volatile unsigned long *)DBGCTL)
+#define pDBGSTAT ((volatile unsigned long *)DBGSTAT)
+#define pEMUDAT ((volatile unsigned long *)EMUDAT)
+
+/* Trace Buffer Registers */
+#define pTBUFCTL ((volatile unsigned long *)TBUFCTL)
+#define pTBUFSTAT ((volatile unsigned long *)TBUFSTAT)
+#define pTBUF ((volatile void **)TBUF)
+
+/* Watch Point Control Registers */
+#define pWPIACTL ((volatile unsigned long *)WPIACTL)
+#define pWPIA0 ((volatile void **)WPIA0)
+#define pWPIA1 ((volatile void **)WPIA1)
+#define pWPIA2 ((volatile void **)WPIA2)
+#define pWPIA3 ((volatile void **)WPIA3)
+#define pWPIA4 ((volatile void **)WPIA4)
+#define pWPIA5 ((volatile void **)WPIA5)
+#define pWPIACNT0 ((volatile unsigned long *)WPIACNT0)
+#define pWPIACNT1 ((volatile unsigned long *)WPIACNT1)
+#define pWPIACNT2 ((volatile unsigned long *)WPIACNT2)
+#define pWPIACNT3 ((volatile unsigned long *)WPIACNT3)
+#define pWPIACNT4 ((volatile unsigned long *)WPIACNT4)
+#define pWPIACNT5 ((volatile unsigned long *)WPIACNT5)
+#define pWPDACTL ((volatile unsigned long *)WPDACTL)
+#define pWPDA0 ((volatile void **)WPDA0)
+#define pWPDA1 ((volatile void **)WPDA1)
+#define pWPDACNT0 ((volatile unsigned long *)WPDACNT0)
+#define pWPDACNT1 ((volatile unsigned long *)WPDACNT1)
+#define pWPSTAT ((volatile unsigned long *)WPSTAT)
+
+/* Performance Monitor Registers */
+#define pPFCTL ((volatile unsigned long *)PFCTL)
+#define pPFCNTR0 ((volatile unsigned long *)PFCNTR0)
+#define pPFCNTR1 ((volatile unsigned long *)PFCNTR1)
+
+/* #define IPRIO 0xFFE02110 */ /* Core Interrupt Priority Register */
+
+#endif /* _CDEF_LPBLACKFIN_H */
diff --git a/include/asm-blackfin/cpu/defBF531.h b/include/asm-blackfin/cpu/defBF531.h
new file mode 100644
index 0000000000..6c7cd5a6db
--- /dev/null
+++ b/include/asm-blackfin/cpu/defBF531.h
@@ -0,0 +1,24 @@
+/*
+ * defBF531.h
+ *
+ * This file is subject to the terms and conditions of the GNU Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Non-GPL License also available as part of VisualDSP++
+ *
+ * http://www.analog.com/processors/resources/crosscore/visualDspDevSoftware.html
+ *
+ * (c) Copyright 2001-2005 Analog Devices, Inc. All rights reserved
+ *
+ * This file under source code control, please send bugs or changes to:
+ * dsptools.support@analog.com
+ *
+ */
+
+#ifndef _DEFBF531_H
+#define _DEFBF531_H
+
+#include <defBF532.h>
+
+#endif /* _DEFBF531_H */
diff --git a/include/asm-blackfin/cpu/defBF532.h b/include/asm-blackfin/cpu/defBF532.h
new file mode 100644
index 0000000000..26a5fe6442
--- /dev/null
+++ b/include/asm-blackfin/cpu/defBF532.h
@@ -0,0 +1,1159 @@
+/*
+ * defBF532.h
+ *
+ * This file is subject to the terms and conditions of the GNU Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Non-GPL License also available as part of VisualDSP++
+ *
+ * http://www.analog.com/processors/resources/crosscore/visualDspDevSoftware.html
+ *
+ * (c) Copyright 2001-2005 Analog Devices, Inc. All rights reserved
+ *
+ * This file under source code control, please send bugs or changes to:
+ * dsptools.support@analog.com
+ *
+ */
+
+/* SYSTEM & MM REGISTER BIT & ADDRESS DEFINITIONS FOR ADSP-BF532 */
+
+#ifndef _DEF_BF532_H
+#define _DEF_BF532_H
+
+/*
+ * #if !defined(__ADSPLPBLACKFIN__)
+ * #warning defBF532.h should only be included for 532 compatible chips
+ * #endif
+ */
+
+/* include all Core registers and bit definitions */
+#include <asm/cpu/def_LPBlackfin.h>
+
+/* Helper macros
+ * usage:
+ * P0.H = HI(UART_THR);
+ * P0.L = LO(UART_THR);
+ */
+
+#define LO(con32) ((con32) & 0xFFFF)
+#define lo(con32) ((con32) & 0xFFFF)
+#define HI(con32) (((con32) >> 16) & 0xFFFF)
+#define hi(con32) (((con32) >> 16) & 0xFFFF)
+
+/*
+ * System MMR Register Map
+ */
+
+/* Clock and System Control (0xFFC00000 - 0xFFC000FF) */
+#define PLL_CTL 0xFFC00000 /* PLL Control register (16-bit) */
+#define PLL_DIV 0xFFC00004 /* PLL Divide Register (16-bit) */
+#define VR_CTL 0xFFC00008 /* Voltage Regulator Control Register (16-bit) */
+#define PLL_STAT 0xFFC0000C /* PLL Status register (16-bit) */
+#define PLL_LOCKCNT 0xFFC00010 /* PLL Lock Count register (16-bit) */
+#define CHIPID 0xFFC00014 /* Chip ID register (32-bit) */
+#define SWRST 0xFFC00100 /* Software Reset Register (16-bit) */
+#define SYSCR 0xFFC00104 /* System Configuration register */
+
+/* System Interrupt Controller (0xFFC00100 - 0xFFC001FF) */
+#define SIC_RVECT 0xFFC00108 /* Interrupt Reset Vector Address Register */
+#define SIC_IMASK 0xFFC0010C /* Interrupt Mask Register */
+#define SIC_IAR0 0xFFC00110 /* Interrupt Assignment Register 0 */
+#define SIC_IAR1 0xFFC00114 /* Interrupt Assignment Register 1 */
+#define SIC_IAR2 0xFFC00118 /* Interrupt Assignment Register 2 */
+#define SIC_ISR 0xFFC00120 /* Interrupt Status Register */
+#define SIC_IWR 0xFFC00124 /* Interrupt Wakeup Register */
+
+/* Watchdog Timer (0xFFC00200 - 0xFFC002FF) */
+#define WDOG_CTL 0xFFC00200 /* Watchdog Control Register */
+#define WDOG_CNT 0xFFC00204 /* Watchdog Count Register */
+#define WDOG_STAT 0xFFC00208 /* Watchdog Status Register */
+
+/* Real Time Clock (0xFFC00300 - 0xFFC003FF) */
+#define RTC_STAT 0xFFC00300 /* RTC Status Register */
+#define RTC_ICTL 0xFFC00304 /* RTC Interrupt Control Register */
+#define RTC_ISTAT 0xFFC00308 /* RTC Interrupt Status Register */
+#define RTC_SWCNT 0xFFC0030C /* RTC Stopwatch Count Register */
+#define RTC_ALARM 0xFFC00310 /* RTC Alarm Time Register */
+#define RTC_FAST 0xFFC00314 /* RTC Prescaler Enable Register */
+#define RTC_PREN 0xFFC00314 /* RTC Prescaler Enable Register (alternate macro) */
+
+/* UART Controller (0xFFC00400 - 0xFFC004FF) */
+#define UART_THR 0xFFC00400 /* Transmit Holding register */
+#define UART_RBR 0xFFC00400 /* Receive Buffer register */
+#define UART_DLL 0xFFC00400 /* Divisor Latch (Low-Byte) */
+#define UART_IER 0xFFC00404 /* Interrupt Enable Register */
+#define UART_DLH 0xFFC00404 /* Divisor Latch (High-Byte) */
+#define UART_IIR 0xFFC00408 /* Interrupt Identification Register */
+#define UART_LCR 0xFFC0040C /* Line Control Register */
+#define UART_MCR 0xFFC00410 /* Modem Control Register */
+#define UART_LSR 0xFFC00414 /* Line Status Register */
+/* #define UART_MSR 0xFFC00418 */ /* Modem Status Register (UNUSED in ADSP-BF532) */
+#define UART_SCR 0xFFC0041C /* SCR Scratch Register */
+#define UART_GCTL 0xFFC00424 /* Global Control Register */
+
+/* SPI Controller (0xFFC00500 - 0xFFC005FF) */
+#define SPI_CTL 0xFFC00500 /* SPI Control Register */
+#define SPI_FLG 0xFFC00504 /* SPI Flag register */
+#define SPI_STAT 0xFFC00508 /* SPI Status register */
+#define SPI_TDBR 0xFFC0050C /* SPI Transmit Data Buffer Register */
+#define SPI_RDBR 0xFFC00510 /* SPI Receive Data Buffer Register */
+#define SPI_BAUD 0xFFC00514 /* SPI Baud rate Register */
+#define SPI_SHADOW 0xFFC00518 /* SPI_RDBR Shadow Register */
+
+/* TIMER 0, 1, 2 Registers (0xFFC00600 - 0xFFC006FF) */
+#define TIMER0_CONFIG 0xFFC00600 /* Timer 0 Configuration Register */
+#define TIMER0_COUNTER 0xFFC00604 /* Timer 0 Counter Register */
+#define TIMER0_PERIOD 0xFFC00608 /* Timer 0 Period Register */
+#define TIMER0_WIDTH 0xFFC0060C /* Timer 0 Width Register */
+
+#define TIMER1_CONFIG 0xFFC00610 /* Timer 1 Configuration Register */
+#define TIMER1_COUNTER 0xFFC00614 /* Timer 1 Counter Register */
+#define TIMER1_PERIOD 0xFFC00618 /* Timer 1 Period Register */
+#define TIMER1_WIDTH 0xFFC0061C /* Timer 1 Width Register */
+
+#define TIMER2_CONFIG 0xFFC00620 /* Timer 2 Configuration Register */
+#define TIMER2_COUNTER 0xFFC00624 /* Timer 2 Counter Register */
+#define TIMER2_PERIOD 0xFFC00628 /* Timer 2 Period Register */
+#define TIMER2_WIDTH 0xFFC0062C /* Timer 2 Width Register */
+
+#define TIMER_ENABLE 0xFFC00640 /* Timer Enable Register */
+#define TIMER_DISABLE 0xFFC00644 /* Timer Disable Register */
+#define TIMER_STATUS 0xFFC00648 /* Timer Status Register */
+
+/* General Purpose IO (0xFFC00700 - 0xFFC007FF) */
+#define FIO_FLAG_D 0xFFC00700 /* Flag Mask to directly specify state of pins */
+#define FIO_FLAG_C 0xFFC00704 /* Peripheral Interrupt Flag Register (clear) */
+#define FIO_FLAG_S 0xFFC00708 /* Peripheral Interrupt Flag Register (set) */
+#define FIO_FLAG_T 0xFFC0070C /* Flag Mask to directly toggle state of pins */
+#define FIO_MASKA_D 0xFFC00710 /* Flag Mask Interrupt A Register (set directly) */
+#define FIO_MASKA_C 0xFFC00714 /* Flag Mask Interrupt A Register (clear) */
+#define FIO_MASKA_S 0xFFC00718 /* Flag Mask Interrupt A Register (set) */
+#define FIO_MASKA_T 0xFFC0071C /* Flag Mask Interrupt A Register (toggle) */
+#define FIO_MASKB_D 0xFFC00720 /* Flag Mask Interrupt B Register (set directly) */
+#define FIO_MASKB_C 0xFFC00724 /* Flag Mask Interrupt B Register (clear) */
+#define FIO_MASKB_S 0xFFC00728 /* Flag Mask Interrupt B Register (set) */
+#define FIO_MASKB_T 0xFFC0072C /* Flag Mask Interrupt B Register (toggle) */
+#define FIO_DIR 0xFFC00730 /* Peripheral Flag Direction Register */
+#define FIO_POLAR 0xFFC00734 /* Flag Source Polarity Register */
+#define FIO_EDGE 0xFFC00738 /* Flag Source Sensitivity Register */
+#define FIO_BOTH 0xFFC0073C /* Flag Set on BOTH Edges Register */
+#define FIO_INEN 0xFFC00740 /* Flag Input Enable Register */
+
+/* SPORT0 Controller (0xFFC00800 - 0xFFC008FF) */
+#define SPORT0_TCR1 0xFFC00800 /* SPORT0 Transmit Configuration 1 Register */
+#define SPORT0_TCR2 0xFFC00804 /* SPORT0 Transmit Configuration 2 Register */
+#define SPORT0_TCLKDIV 0xFFC00808 /* SPORT0 Transmit Clock Divider */
+#define SPORT0_TFSDIV 0xFFC0080C /* SPORT0 Transmit Frame Sync Divider */
+#define SPORT0_TX 0xFFC00810 /* SPORT0 TX Data Register */
+#define SPORT0_RX 0xFFC00818 /* SPORT0 RX Data Register */
+#define SPORT0_RCR1 0xFFC00820 /* SPORT0 Transmit Configuration 1 Register */
+#define SPORT0_RCR2 0xFFC00824 /* SPORT0 Transmit Configuration 2 Register */
+#define SPORT0_RCLKDIV 0xFFC00828 /* SPORT0 Receive Clock Divider */
+#define SPORT0_RFSDIV 0xFFC0082C /* SPORT0 Receive Frame Sync Divider */
+#define SPORT0_STAT 0xFFC00830 /* SPORT0 Status Register */
+#define SPORT0_CHNL 0xFFC00834 /* SPORT0 Current Channel Register */
+#define SPORT0_MCMC1 0xFFC00838 /* SPORT0 Multi-Channel Configuration Register 1 */
+#define SPORT0_MCMC2 0xFFC0083C /* SPORT0 Multi-Channel Configuration Register 2 */
+#define SPORT0_MTCS0 0xFFC00840 /* SPORT0 Multi-Channel Transmit Select Register 0 */
+#define SPORT0_MTCS1 0xFFC00844 /* SPORT0 Multi-Channel Transmit Select Register 1 */
+#define SPORT0_MTCS2 0xFFC00848 /* SPORT0 Multi-Channel Transmit Select Register 2 */
+#define SPORT0_MTCS3 0xFFC0084C /* SPORT0 Multi-Channel Transmit Select Register 3 */
+#define SPORT0_MRCS0 0xFFC00850 /* SPORT0 Multi-Channel Receive Select Register 0 */
+#define SPORT0_MRCS1 0xFFC00854 /* SPORT0 Multi-Channel Receive Select Register 1 */
+#define SPORT0_MRCS2 0xFFC00858 /* SPORT0 Multi-Channel Receive Select Register 2 */
+#define SPORT0_MRCS3 0xFFC0085C /* SPORT0 Multi-Channel Receive Select Register 3 */
+
+/* SPORT1 Controller (0xFFC00900 - 0xFFC009FF) */
+#define SPORT1_TCR1 0xFFC00900 /* SPORT1 Transmit Configuration 1 Register */
+#define SPORT1_TCR2 0xFFC00904 /* SPORT1 Transmit Configuration 2 Register */
+#define SPORT1_TCLKDIV 0xFFC00908 /* SPORT1 Transmit Clock Divider */
+#define SPORT1_TFSDIV 0xFFC0090C /* SPORT1 Transmit Frame Sync Divider */
+#define SPORT1_TX 0xFFC00910 /* SPORT1 TX Data Register */
+#define SPORT1_RX 0xFFC00918 /* SPORT1 RX Data Register */
+#define SPORT1_RCR1 0xFFC00920 /* SPORT1 Transmit Configuration 1 Register */
+#define SPORT1_RCR2 0xFFC00924 /* SPORT1 Transmit Configuration 2 Register */
+#define SPORT1_RCLKDIV 0xFFC00928 /* SPORT1 Receive Clock Divider */
+#define SPORT1_RFSDIV 0xFFC0092C /* SPORT1 Receive Frame Sync Divider */
+#define SPORT1_STAT 0xFFC00930 /* SPORT1 Status Register */
+#define SPORT1_CHNL 0xFFC00934 /* SPORT1 Current Channel Register */
+#define SPORT1_MCMC1 0xFFC00938 /* SPORT1 Multi-Channel Configuration Register 1 */
+#define SPORT1_MCMC2 0xFFC0093C /* SPORT1 Multi-Channel Configuration Register 2 */
+#define SPORT1_MTCS0 0xFFC00940 /* SPORT1 Multi-Channel Transmit Select Register 0 */
+#define SPORT1_MTCS1 0xFFC00944 /* SPORT1 Multi-Channel Transmit Select Register 1 */
+#define SPORT1_MTCS2 0xFFC00948 /* SPORT1 Multi-Channel Transmit Select Register 2 */
+#define SPORT1_MTCS3 0xFFC0094C /* SPORT1 Multi-Channel Transmit Select Register 3 */
+#define SPORT1_MRCS0 0xFFC00950 /* SPORT1 Multi-Channel Receive Select Register 0 */
+#define SPORT1_MRCS1 0xFFC00954 /* SPORT1 Multi-Channel Receive Select Register 1 */
+#define SPORT1_MRCS2 0xFFC00958 /* SPORT1 Multi-Channel Receive Select Register 2 */
+#define SPORT1_MRCS3 0xFFC0095C /* SPORT1 Multi-Channel Receive Select Register 3 */
+
+/* Asynchronous Memory Controller - External Bus Interface Unit */
+#define EBIU_AMGCTL 0xFFC00A00 /* Asynchronous Memory Global Control Register */
+#define EBIU_AMBCTL0 0xFFC00A04 /* Asynchronous Memory Bank Control Register 0 */
+#define EBIU_AMBCTL1 0xFFC00A08 /* Asynchronous Memory Bank Control Register 1 */
+
+/* SDRAM Controller External Bus Interface Unit (0xFFC00A00 - 0xFFC00AFF) */
+#define EBIU_SDGCTL 0xFFC00A10 /* SDRAM Global Control Register */
+#define EBIU_SDBCTL 0xFFC00A14 /* SDRAM Bank Control Register */
+#define EBIU_SDRRC 0xFFC00A18 /* SDRAM Refresh Rate Control Register */
+#define EBIU_SDSTAT 0xFFC00A1C /* SDRAM Status Register */
+
+/* DMA Test Registers */
+#define DMA_CCOMP 0xFFC00B04 /* DMA Cycle Count Register */
+#define DMA_ACOMP 0xFFC00B00 /* Debug Compare Address Register */
+#define DMA_MISR 0xFFC00B08 /* MISR Register */
+#define DMA_TCPER 0xFFC00B0C /* Traffic Control Periods Register */
+#define DMA_TCCNT 0xFFC00B10 /* Traffic Control Current Counts Register */
+#define DMA_TMODE 0xFFC00B14 /* DMA Test Modes Register */
+#define DMA_TMCHAN 0xFFC00B18 /* DMA Testmode Selected Channel Register */
+#define DMA_TMSTAT 0xFFC00B1C /* DMA Testmode Channel Status Register */
+#define DMA_TMBD 0xFFC00B20 /* DMA Testmode DAB Bus Data Register */
+#define DMA_TMM0D 0xFFC00B24 /* DMA Testmode Mem0 Data Register */
+#define DMA_TMM1D 0xFFC00B28 /* DMA Testmode Mem1 Data Register */
+#define DMA_TMMA 0xFFC00B2C /* DMA Testmode Memory Address Register */
+
+/* DMA Controller (0xFFC00C00 - 0xFFC00FFF) */
+#define DMA0_CONFIG 0xFFC00C08 /* DMA Channel 0 Configuration Register */
+#define DMA0_NEXT_DESC_PTR 0xFFC00C00 /* DMA Channel 0 Next Descriptor Pointer Register */
+#define DMA0_START_ADDR 0xFFC00C04 /* DMA Channel 0 Start Address Register */
+#define DMA0_X_COUNT 0xFFC00C10 /* DMA Channel 0 X Count Register */
+#define DMA0_Y_COUNT 0xFFC00C18 /* DMA Channel 0 Y Count Register */
+#define DMA0_X_MODIFY 0xFFC00C14 /* DMA Channel 0 X Modify Register */
+#define DMA0_Y_MODIFY 0xFFC00C1C /* DMA Channel 0 Y Modify Register */
+#define DMA0_CURR_DESC_PTR 0xFFC00C20 /* DMA Channel 0 Current Descriptor Pointer Register */
+#define DMA0_CURR_ADDR 0xFFC00C24 /* DMA Channel 0 Current Address Register */
+#define DMA0_CURR_X_COUNT 0xFFC00C30 /* DMA Channel 0 Current X Count Register */
+#define DMA0_CURR_Y_COUNT 0xFFC00C38 /* DMA Channel 0 Current Y Count Register */
+#define DMA0_IRQ_STATUS 0xFFC00C28 /* DMA Channel 0 Interrupt/Status Register */
+#define DMA0_PERIPHERAL_MAP 0xFFC00C2C /* DMA Channel 0 Peripheral Map Register */
+
+#define DMA1_CONFIG 0xFFC00C48 /* DMA Channel 1 Configuration Register */
+#define DMA1_NEXT_DESC_PTR 0xFFC00C40 /* DMA Channel 1 Next Descriptor Pointer Register */
+#define DMA1_START_ADDR 0xFFC00C44 /* DMA Channel 1 Start Address Register */
+#define DMA1_X_COUNT 0xFFC00C50 /* DMA Channel 1 X Count Register */
+#define DMA1_Y_COUNT 0xFFC00C58 /* DMA Channel 1 Y Count Register */
+#define DMA1_X_MODIFY 0xFFC00C54 /* DMA Channel 1 X Modify Register */
+#define DMA1_Y_MODIFY 0xFFC00C5C /* DMA Channel 1 Y Modify Register */
+#define DMA1_CURR_DESC_PTR 0xFFC00C60 /* DMA Channel 1 Current Descriptor Pointer Register */
+#define DMA1_CURR_ADDR 0xFFC00C64 /* DMA Channel 1 Current Address Register */
+#define DMA1_CURR_X_COUNT 0xFFC00C70 /* DMA Channel 1 Current X Count Register */
+#define DMA1_CURR_Y_COUNT 0xFFC00C78 /* DMA Channel 1 Current Y Count Register */
+#define DMA1_IRQ_STATUS 0xFFC00C68 /* DMA Channel 1 Interrupt/Status Register */
+#define DMA1_PERIPHERAL_MAP 0xFFC00C6C /* DMA Channel 1 Peripheral Map Register */
+
+#define DMA2_CONFIG 0xFFC00C88 /* DMA Channel 2 Configuration Register */
+#define DMA2_NEXT_DESC_PTR 0xFFC00C80 /* DMA Channel 2 Next Descriptor Pointer Register */
+#define DMA2_START_ADDR 0xFFC00C84 /* DMA Channel 2 Start Address Register */
+#define DMA2_X_COUNT 0xFFC00C90 /* DMA Channel 2 X Count Register */
+#define DMA2_Y_COUNT 0xFFC00C98 /* DMA Channel 2 Y Count Register */
+#define DMA2_X_MODIFY 0xFFC00C94 /* DMA Channel 2 X Modify Register */
+#define DMA2_Y_MODIFY 0xFFC00C9C /* DMA Channel 2 Y Modify Register */
+#define DMA2_CURR_DESC_PTR 0xFFC00CA0 /* DMA Channel 2 Current Descriptor Pointer Register */
+#define DMA2_CURR_ADDR 0xFFC00CA4 /* DMA Channel 2 Current Address Register */
+#define DMA2_CURR_X_COUNT 0xFFC00CB0 /* DMA Channel 2 Current X Count Register */
+#define DMA2_CURR_Y_COUNT 0xFFC00CB8 /* DMA Channel 2 Current Y Count Register */
+#define DMA2_IRQ_STATUS 0xFFC00CA8 /* DMA Channel 2 Interrupt/Status Register */
+#define DMA2_PERIPHERAL_MAP 0xFFC00CAC /* DMA Channel 2 Peripheral Map Register */
+
+#define DMA3_CONFIG 0xFFC00CC8 /* DMA Channel 3 Configuration Register */
+#define DMA3_NEXT_DESC_PTR 0xFFC00CC0 /* DMA Channel 3 Next Descriptor Pointer Register */
+#define DMA3_START_ADDR 0xFFC00CC4 /* DMA Channel 3 Start Address Register */
+#define DMA3_X_COUNT 0xFFC00CD0 /* DMA Channel 3 X Count Register */
+#define DMA3_Y_COUNT 0xFFC00CD8 /* DMA Channel 3 Y Count Register */
+#define DMA3_X_MODIFY 0xFFC00CD4 /* DMA Channel 3 X Modify Register */
+#define DMA3_Y_MODIFY 0xFFC00CDC /* DMA Channel 3 Y Modify Register */
+#define DMA3_CURR_DESC_PTR 0xFFC00CE0 /* DMA Channel 3 Current Descriptor Pointer Register */
+#define DMA3_CURR_ADDR 0xFFC00CE4 /* DMA Channel 3 Current Address Register */
+#define DMA3_CURR_X_COUNT 0xFFC00CF0 /* DMA Channel 3 Current X Count Register */
+#define DMA3_CURR_Y_COUNT 0xFFC00CF8 /* DMA Channel 3 Current Y Count Register */
+#define DMA3_IRQ_STATUS 0xFFC00CE8 /* DMA Channel 3 Interrupt/Status Register */
+#define DMA3_PERIPHERAL_MAP 0xFFC00CEC /* DMA Channel 3 Peripheral Map Register */
+
+#define DMA4_CONFIG 0xFFC00D08 /* DMA Channel 4 Configuration Register */
+#define DMA4_NEXT_DESC_PTR 0xFFC00D00 /* DMA Channel 4 Next Descriptor Pointer Register */
+#define DMA4_START_ADDR 0xFFC00D04 /* DMA Channel 4 Start Address Register */
+#define DMA4_X_COUNT 0xFFC00D10 /* DMA Channel 4 X Count Register */
+#define DMA4_Y_COUNT 0xFFC00D18 /* DMA Channel 4 Y Count Register */
+#define DMA4_X_MODIFY 0xFFC00D14 /* DMA Channel 4 X Modify Register */
+#define DMA4_Y_MODIFY 0xFFC00D1C /* DMA Channel 4 Y Modify Register */
+#define DMA4_CURR_DESC_PTR 0xFFC00D20 /* DMA Channel 4 Current Descriptor Pointer Register */
+#define DMA4_CURR_ADDR 0xFFC00D24 /* DMA Channel 4 Current Address Register */
+#define DMA4_CURR_X_COUNT 0xFFC00D30 /* DMA Channel 4 Current X Count Register */
+#define DMA4_CURR_Y_COUNT 0xFFC00D38 /* DMA Channel 4 Current Y Count Register */
+#define DMA4_IRQ_STATUS 0xFFC00D28 /* DMA Channel 4 Interrupt/Status Register */
+#define DMA4_PERIPHERAL_MAP 0xFFC00D2C /* DMA Channel 4 Peripheral Map Register */
+
+#define DMA5_CONFIG 0xFFC00D48 /* DMA Channel 5 Configuration Register */
+#define DMA5_NEXT_DESC_PTR 0xFFC00D40 /* DMA Channel 5 Next Descriptor Pointer Register */
+#define DMA5_START_ADDR 0xFFC00D44 /* DMA Channel 5 Start Address Register */
+#define DMA5_X_COUNT 0xFFC00D50 /* DMA Channel 5 X Count Register */
+#define DMA5_Y_COUNT 0xFFC00D58 /* DMA Channel 5 Y Count Register */
+#define DMA5_X_MODIFY 0xFFC00D54 /* DMA Channel 5 X Modify Register */
+#define DMA5_Y_MODIFY 0xFFC00D5C /* DMA Channel 5 Y Modify Register */
+#define DMA5_CURR_DESC_PTR 0xFFC00D60 /* DMA Channel 5 Current Descriptor Pointer Register */
+#define DMA5_CURR_ADDR 0xFFC00D64 /* DMA Channel 5 Current Address Register */
+#define DMA5_CURR_X_COUNT 0xFFC00D70 /* DMA Channel 5 Current X Count Register */
+#define DMA5_CURR_Y_COUNT 0xFFC00D78 /* DMA Channel 5 Current Y Count Register */
+#define DMA5_IRQ_STATUS 0xFFC00D68 /* DMA Channel 5 Interrupt/Status Register */
+#define DMA5_PERIPHERAL_MAP 0xFFC00D6C /* DMA Channel 5 Peripheral Map Register */
+
+#define DMA6_CONFIG 0xFFC00D88 /* DMA Channel 6 Configuration Register */
+#define DMA6_NEXT_DESC_PTR 0xFFC00D80 /* DMA Channel 6 Next Descriptor Pointer Register */
+#define DMA6_START_ADDR 0xFFC00D84 /* DMA Channel 6 Start Address Register */
+#define DMA6_X_COUNT 0xFFC00D90 /* DMA Channel 6 X Count Register */
+#define DMA6_Y_COUNT 0xFFC00D98 /* DMA Channel 6 Y Count Register */
+#define DMA6_X_MODIFY 0xFFC00D94 /* DMA Channel 6 X Modify Register */
+#define DMA6_Y_MODIFY 0xFFC00D9C /* DMA Channel 6 Y Modify Register */
+#define DMA6_CURR_DESC_PTR 0xFFC00DA0 /* DMA Channel 6 Current Descriptor Pointer Register */
+#define DMA6_CURR_ADDR 0xFFC00DA4 /* DMA Channel 6 Current Address Register */
+#define DMA6_CURR_X_COUNT 0xFFC00DB0 /* DMA Channel 6 Current X Count Register */
+#define DMA6_CURR_Y_COUNT 0xFFC00DB8 /* DMA Channel 6 Current Y Count Register */
+#define DMA6_IRQ_STATUS 0xFFC00DA8 /* DMA Channel 6 Interrupt/Status Register */
+#define DMA6_PERIPHERAL_MAP 0xFFC00DAC /* DMA Channel 6 Peripheral Map Register */
+
+#define DMA7_CONFIG 0xFFC00DC8 /* DMA Channel 7 Configuration Register */
+#define DMA7_NEXT_DESC_PTR 0xFFC00DC0 /* DMA Channel 7 Next Descriptor Pointer Register */
+#define DMA7_START_ADDR 0xFFC00DC4 /* DMA Channel 7 Start Address Register */
+#define DMA7_X_COUNT 0xFFC00DD0 /* DMA Channel 7 X Count Register */
+#define DMA7_Y_COUNT 0xFFC00DD8 /* DMA Channel 7 Y Count Register */
+#define DMA7_X_MODIFY 0xFFC00DD4 /* DMA Channel 7 X Modify Register */
+#define DMA7_Y_MODIFY 0xFFC00DDC /* DMA Channel 7 Y Modify Register */
+#define DMA7_CURR_DESC_PTR 0xFFC00DE0 /* DMA Channel 7 Current Descriptor Pointer Register */
+#define DMA7_CURR_ADDR 0xFFC00DE4 /* DMA Channel 7 Current Address Register */
+#define DMA7_CURR_X_COUNT 0xFFC00DF0 /* DMA Channel 7 Current X Count Register */
+#define DMA7_CURR_Y_COUNT 0xFFC00DF8 /* DMA Channel 7 Current Y Count Register */
+#define DMA7_IRQ_STATUS 0xFFC00DE8 /* DMA Channel 7 Interrupt/Status Register */
+#define DMA7_PERIPHERAL_MAP 0xFFC00DEC /* DMA Channel 7 Peripheral Map Register */
+
+#define MDMA_D1_CONFIG 0xFFC00E88 /* MemDMA Stream 1 Destination Configuration Register */
+#define MDMA_D1_NEXT_DESC_PTR 0xFFC00E80 /* MemDMA Stream 1 Destination Next Descriptor Pointer Register */
+#define MDMA_D1_START_ADDR 0xFFC00E84 /* MemDMA Stream 1 Destination Start Address Register */
+#define MDMA_D1_X_COUNT 0xFFC00E90 /* MemDMA Stream 1 Destination X Count Register */
+#define MDMA_D1_Y_COUNT 0xFFC00E98 /* MemDMA Stream 1 Destination Y Count Register */
+#define MDMA_D1_X_MODIFY 0xFFC00E94 /* MemDMA Stream 1 Destination X Modify Register */
+#define MDMA_D1_Y_MODIFY 0xFFC00E9C /* MemDMA Stream 1 Destination Y Modify Register */
+#define MDMA_D1_CURR_DESC_PTR 0xFFC00EA0 /* MemDMA Stream 1 Destination Current Descriptor Pointer Register */
+#define MDMA_D1_CURR_ADDR 0xFFC00EA4 /* MemDMA Stream 1 Destination Current Address Register */
+#define MDMA_D1_CURR_X_COUNT 0xFFC00EB0 /* MemDMA Stream 1 Destination Current X Count Register */
+#define MDMA_D1_CURR_Y_COUNT 0xFFC00EB8 /* MemDMA Stream 1 Destination Current Y Count Register */
+#define MDMA_D1_IRQ_STATUS 0xFFC00EA8 /* MemDMA Stream 1 Destination Interrupt/Status Register */
+#define MDMA_D1_PERIPHERAL_MAP 0xFFC00EAC /* MemDMA Stream 1 Destination Peripheral Map Register */
+
+#define MDMA_S1_CONFIG 0xFFC00EC8 /* MemDMA Stream 1 Source Configuration Register */
+#define MDMA_S1_NEXT_DESC_PTR 0xFFC00EC0 /* MemDMA Stream 1 Source Next Descriptor Pointer Register */
+#define MDMA_S1_START_ADDR 0xFFC00EC4 /* MemDMA Stream 1 Source Start Address Register */
+#define MDMA_S1_X_COUNT 0xFFC00ED0 /* MemDMA Stream 1 Source X Count Register */
+#define MDMA_S1_Y_COUNT 0xFFC00ED8 /* MemDMA Stream 1 Source Y Count Register */
+#define MDMA_S1_X_MODIFY 0xFFC00ED4 /* MemDMA Stream 1 Source X Modify Register */
+#define MDMA_S1_Y_MODIFY 0xFFC00EDC /* MemDMA Stream 1 Source Y Modify Register */
+#define MDMA_S1_CURR_DESC_PTR 0xFFC00EE0 /* MemDMA Stream 1 Source Current Descriptor Pointer Register */
+#define MDMA_S1_CURR_ADDR 0xFFC00EE4 /* MemDMA Stream 1 Source Current Address Register */
+#define MDMA_S1_CURR_X_COUNT 0xFFC00EF0 /* MemDMA Stream 1 Source Current X Count Register */
+#define MDMA_S1_CURR_Y_COUNT 0xFFC00EF8 /* MemDMA Stream 1 Source Current Y Count Register */
+#define MDMA_S1_IRQ_STATUS 0xFFC00EE8 /* MemDMA Stream 1 Source Interrupt/Status Register */
+#define MDMA_S1_PERIPHERAL_MAP 0xFFC00EEC /* MemDMA Stream 1 Source Peripheral Map Register */
+
+#define MDMA_D0_CONFIG 0xFFC00E08 /* MemDMA Stream 0 Destination Configuration Register */
+#define MDMA_D0_NEXT_DESC_PTR 0xFFC00E00 /* MemDMA Stream 0 Destination Next Descriptor Pointer Register */
+#define MDMA_D0_START_ADDR 0xFFC00E04 /* MemDMA Stream 0 Destination Start Address Register */
+#define MDMA_D0_X_COUNT 0xFFC00E10 /* MemDMA Stream 0 Destination X Count Register */
+#define MDMA_D0_Y_COUNT 0xFFC00E18 /* MemDMA Stream 0 Destination Y Count Register */
+#define MDMA_D0_X_MODIFY 0xFFC00E14 /* MemDMA Stream 0 Destination X Modify Register */
+#define MDMA_D0_Y_MODIFY 0xFFC00E1C /* MemDMA Stream 0 Destination Y Modify Register */
+#define MDMA_D0_CURR_DESC_PTR 0xFFC00E20 /* MemDMA Stream 0 Destination Current Descriptor Pointer Register */
+#define MDMA_D0_CURR_ADDR 0xFFC00E24 /* MemDMA Stream 0 Destination Current Address Register */
+#define MDMA_D0_CURR_X_COUNT 0xFFC00E30 /* MemDMA Stream 0 Destination Current X Count Register */
+#define MDMA_D0_CURR_Y_COUNT 0xFFC00E38 /* MemDMA Stream 0 Destination Current Y Count Register */
+#define MDMA_D0_IRQ_STATUS 0xFFC00E28 /* MemDMA Stream 0 Destination Interrupt/Status Register */
+#define MDMA_D0_PERIPHERAL_MAP 0xFFC00E2C /* MemDMA Stream 0 Destination Peripheral Map Register */
+
+#define MDMA_S0_CONFIG 0xFFC00E48 /* MemDMA Stream 0 Source Configuration Register */
+#define MDMA_S0_NEXT_DESC_PTR 0xFFC00E40 /* MemDMA Stream 0 Source Next Descriptor Pointer Register */
+#define MDMA_S0_START_ADDR 0xFFC00E44 /* MemDMA Stream 0 Source Start Address Register */
+#define MDMA_S0_X_COUNT 0xFFC00E50 /* MemDMA Stream 0 Source X Count Register */
+#define MDMA_S0_Y_COUNT 0xFFC00E58 /* MemDMA Stream 0 Source Y Count Register */
+#define MDMA_S0_X_MODIFY 0xFFC00E54 /* MemDMA Stream 0 Source X Modify Register */
+#define MDMA_S0_Y_MODIFY 0xFFC00E5C /* MemDMA Stream 0 Source Y Modify Register */
+#define MDMA_S0_CURR_DESC_PTR 0xFFC00E60 /* MemDMA Stream 0 Source Current Descriptor Pointer Register */
+#define MDMA_S0_CURR_ADDR 0xFFC00E64 /* MemDMA Stream 0 Source Current Address Register */
+#define MDMA_S0_CURR_X_COUNT 0xFFC00E70 /* MemDMA Stream 0 Source Current X Count Register */
+#define MDMA_S0_CURR_Y_COUNT 0xFFC00E78 /* MemDMA Stream 0 Source Current Y Count Register */
+#define MDMA_S0_IRQ_STATUS 0xFFC00E68 /* MemDMA Stream 0 Source Interrupt/Status Register */
+#define MDMA_S0_PERIPHERAL_MAP 0xFFC00E6C /* MemDMA Stream 0 Source Peripheral Map Register */
+
+/* Parallel Peripheral Interface (PPI) (0xFFC01000 - 0xFFC010FF) */
+#define PPI_CONTROL 0xFFC01000 /* PPI Control Register */
+#define PPI_STATUS 0xFFC01004 /* PPI Status Register */
+#define PPI_COUNT 0xFFC01008 /* PPI Transfer Count Register */
+#define PPI_DELAY 0xFFC0100C /* PPI Delay Count Register */
+#define PPI_FRAME 0xFFC01010 /* PPI Frame Length Register */
+
+/*
+ * System MMR Register Bits
+ */
+/*
+ * PLL AND RESET MASKS
+ */
+
+/* PLL_CTL Masks */
+#define PLL_CLKIN 0x00000000 /* Pass CLKIN to PLL */
+#define PLL_CLKIN_DIV2 0x00000001 /* Pass CLKIN/2 to PLL */
+#define PLL_OFF 0x00000002 /* Shut off PLL clocks */
+#define STOPCK_OFF 0x00000008 /* Core clock off */
+#define PDWN 0x00000020 /* Put the PLL in a Deep Sleep state */
+#define BYPASS 0x00000100 /* Bypass the PLL */
+
+/* PLL_DIV Masks */
+#define SCLK_DIV(x) (x) /* SCLK = VCO / x */
+
+#define CCLK_DIV1 0x00000000 /* CCLK = VCO / 1 */
+#define CCLK_DIV2 0x00000010 /* CCLK = VCO / 2 */
+#define CCLK_DIV4 0x00000020 /* CCLK = VCO / 4 */
+#define CCLK_DIV8 0x00000030 /* CCLK = VCO / 8 */
+
+/* SWRST Mask */
+#define SYSTEM_RESET 0x00000007 /* Initiates a system software reset */
+
+/*
+ * SYSTEM INTERRUPT CONTROLLER MASKS
+ */
+
+/* SIC_IAR0 Masks */
+#define P0_IVG(x) ((x)-7) /* Peripheral #0 assigned IVG #x */
+#define P1_IVG(x) ((x)-7) << 0x4 /* Peripheral #1 assigned IVG #x */
+#define P2_IVG(x) ((x)-7) << 0x8 /* Peripheral #2 assigned IVG #x */
+#define P3_IVG(x) ((x)-7) << 0xC /* Peripheral #3 assigned IVG #x */
+#define P4_IVG(x) ((x)-7) << 0x10 /* Peripheral #4 assigned IVG #x */
+#define P5_IVG(x) ((x)-7) << 0x14 /* Peripheral #5 assigned IVG #x */
+#define P6_IVG(x) ((x)-7) << 0x18 /* Peripheral #6 assigned IVG #x */
+#define P7_IVG(x) ((x)-7) << 0x1C /* Peripheral #7 assigned IVG #x */
+
+/* SIC_IAR1 Masks */
+#define P8_IVG(x) ((x)-7) /* Peripheral #8 assigned IVG #x */
+#define P9_IVG(x) ((x)-7) << 0x4 /* Peripheral #9 assigned IVG #x */
+#define P10_IVG(x) ((x)-7) << 0x8 /* Peripheral #10 assigned IVG #x */
+#define P11_IVG(x) ((x)-7) << 0xC /* Peripheral #11 assigned IVG #x */
+#define P12_IVG(x) ((x)-7) << 0x10 /* Peripheral #12 assigned IVG #x */
+#define P13_IVG(x) ((x)-7) << 0x14 /* Peripheral #13 assigned IVG #x */
+#define P14_IVG(x) ((x)-7) << 0x18 /* Peripheral #14 assigned IVG #x */
+#define P15_IVG(x) ((x)-7) << 0x1C /* Peripheral #15 assigned IVG #x */
+
+/* SIC_IAR2 Masks */
+#define P16_IVG(x) ((x)-7) /* Peripheral #16 assigned IVG #x */
+#define P17_IVG(x) ((x)-7) << 0x4 /* Peripheral #17 assigned IVG #x */
+#define P18_IVG(x) ((x)-7) << 0x8 /* Peripheral #18 assigned IVG #x */
+#define P19_IVG(x) ((x)-7) << 0xC /* Peripheral #19 assigned IVG #x */
+#define P20_IVG(x) ((x)-7) << 0x10 /* Peripheral #20 assigned IVG #x */
+#define P21_IVG(x) ((x)-7) << 0x14 /* Peripheral #21 assigned IVG #x */
+#define P22_IVG(x) ((x)-7) << 0x18 /* Peripheral #22 assigned IVG #x */
+#define P23_IVG(x) ((x)-7) << 0x1C /* Peripheral #23 assigned IVG #x */
+
+/* SIC_IMASK Masks */
+#define SIC_UNMASK_ALL 0x00000000 /* Unmask all peripheral interrupts */
+#define SIC_MASK_ALL 0xFFFFFFFF /* Mask all peripheral interrupts */
+#define SIC_MASK(x) (1 << (x)) /* Mask Peripheral #x interrupt */
+#define SIC_UNMASK(x) (0xFFFFFFFF ^ (1 << (x))) /* Unmask Peripheral #x interrupt */
+
+/* SIC_IWR Masks */
+#define IWR_DISABLE_ALL 0x00000000 /* Wakeup Disable all peripherals */
+#define IWR_ENABLE_ALL 0xFFFFFFFF /* Wakeup Enable all peripherals */
+#define IWR_ENABLE(x) (1 << (x)) /* Wakeup Enable Peripheral #x */
+#define IWR_DISABLE(x) (0xFFFFFFFF ^ (1 << (x))) /* Wakeup Disable Peripheral #x */
+
+/*
+ * WATCHDOG TIMER MASKS
+ */
+/* Watchdog Timer WDOG_CTL Register */
+#define ICTL(x) ((x<<1) & 0x0006)
+#define ENABLE_RESET 0x00000000 /* Set Watchdog Timer to generate reset */
+#define ENABLE_NMI 0x00000002 /* Set Watchdog Timer to generate non-maskable interrupt */
+#define ENABLE_GPI 0x00000004 /* Set Watchdog Timer to generate general-purpose interrupt */
+#define DISABLE_EVT 0x00000006 /* Disable Watchdog Timer interrupts */
+
+#define TMR_EN 0x0000
+#define TMR_DIS 0x0AD0
+#define TRO 0x8000
+
+#define ICTL_P0 0x01
+#define ICTL_P1 0x02
+#define TRO_P 0x0F
+
+/* RTC_STAT and RTC_ALARM register */
+#define RTSEC 0x0000003F /* Real-Time Clock Seconds */
+#define RTMIN 0x00000FC0 /* Real-Time Clock Minutes */
+#define RTHR 0x0001F000 /* Real-Time Clock Hours */
+#define RTDAY 0xFFFE0000 /* Real-Time Clock Days */
+
+/* RTC_ICTL register */
+#define SWIE 0x0001 /* Stopwatch Interrupt Enable */
+#define AIE 0x0002 /* Alarm Interrupt Enable */
+#define SIE 0x0004 /* Seconds (1 Hz) Interrupt Enable */
+#define MIE 0x0008 /* Minutes Interrupt Enable */
+#define HIE 0x0010 /* Hours Interrupt Enable */
+#define DIE 0x0020 /* 24 Hours (Days) Interrupt Enable */
+#define DAIE 0x0040 /* Day Alarm (Day, Hour, Minute, Second) Interrupt Enable */
+#define WCIE 0x8000 /* Write Complete Interrupt Enable */
+
+/* RTC_ISTAT register */
+#define SWEF 0x0001 /* Stopwatch Event Flag */
+#define AEF 0x0002 /* Alarm Event Flag */
+#define SEF 0x0004 /* Seconds (1 Hz) Event Flag */
+#define MEF 0x0008 /* Minutes Event Flag */
+#define HEF 0x0010 /* Hours Event Flag */
+#define DEF 0x0020 /* 24 Hours (Days) Event Flag */
+#define DAEF 0x0040 /* Day Alarm (Day, Hour, Minute, Second) Event Flag */
+#define WPS 0x4000 /* Write Pending Status (RO) */
+#define WCOM 0x8000 /* Write Complete */
+
+/* RTC_FAST Mask (RTC_PREN Mask) */
+#define ENABLE_PRESCALE 0x00000001 /* Enable prescaler so RTC runs at 1 Hz */
+#define PREN 0x00000001 /* ** Must be set after power-up for proper operation of RTC */
+
+/*
+ * UART CONTROLLER MASKS
+ */
+
+/* UART_LCR Register */
+#define DLAB 0x80
+#define SB 0x40
+#define STP 0x20
+#define EPS 0x10
+#define PEN 0x08
+#define STB 0x04
+#define WLS(x) ((x-5) & 0x03)
+
+#define DLAB_P 0x07
+#define SB_P 0x06
+#define STP_P 0x05
+#define EPS_P 0x04
+#define PEN_P 0x03
+#define STB_P 0x02
+#define WLS_P1 0x01
+#define WLS_P0 0x00
+
+/* UART_MCR Register */
+#define LOOP_ENA 0x10
+#define LOOP_ENA_P 0x04
+
+/* UART_LSR Register */
+#define TEMT 0x40
+#define THRE 0x20
+#define BI 0x10
+#define FE 0x08
+#define PE 0x04
+#define OE 0x02
+#define DR 0x01
+
+#define TEMP_P 0x06
+#define THRE_P 0x05
+#define BI_P 0x04
+#define FE_P 0x03
+#define PE_P 0x02
+#define OE_P 0x01
+#define DR_P 0x00
+
+/* UART_IER Register */
+#define ELSI 0x04
+#define ETBEI 0x02
+#define ERBFI 0x01
+
+#define ELSI_P 0x02
+#define ETBEI_P 0x01
+#define ERBFI_P 0x00
+
+/* UART_IIR Register */
+#define STATUS(x) ((x << 1) & 0x06)
+#define NINT 0x01
+#define STATUS_P1 0x02
+#define STATUS_P0 0x01
+#define NINT_P 0x00
+
+/* UART_GCTL Register */
+#define FFE 0x20
+#define FPE 0x10
+#define RPOLC 0x08
+#define TPOLC 0x04
+#define IREN 0x02
+#define UCEN 0x01
+
+#define FFE_P 0x05
+#define FPE_P 0x04
+#define RPOLC_P 0x03
+#define TPOLC_P 0x02
+#define IREN_P 0x01
+#define UCEN_P 0x00
+
+/*
+ * SERIAL PORT MASKS
+ */
+/* SPORTx_TCR1 Masks */
+#define TSPEN 0x0001 /* TX enable */
+#define ITCLK 0x0002 /* Internal TX Clock Select */
+#define TDTYPE 0x000C /* TX Data Formatting Select */
+#define TLSBIT 0x0010 /* TX Bit Order */
+#define ITFS 0x0200 /* Internal TX Frame Sync Select */
+#define TFSR 0x0400 /* TX Frame Sync Required Select */
+#define DITFS 0x0800 /* Data Independent TX Frame Sync Select */
+#define LTFS 0x1000 /* Low TX Frame Sync Select */
+#define LATFS 0x2000 /* Late TX Frame Sync Select */
+#define TCKFE 0x4000 /* TX Clock Falling Edge Select */
+
+/* SPORTx_TCR2 Masks */
+#define SLEN 0x001F /*TX Word Length */
+#define TXSE 0x0100 /*TX Secondary Enable */
+#define TSFSE 0x0200 /*TX Stereo Frame Sync Enable */
+#define TRFST 0x0400 /*TX Right-First Data Order */
+
+/* SPORTx_RCR1 Masks */
+#define RSPEN 0x0001 /* RX enable */
+#define IRCLK 0x0002 /* Internal RX Clock Select */
+#define RDTYPE 0x000C /* RX Data Formatting Select */
+#define RULAW 0x0008 /* u-Law enable */
+#define RALAW 0x000C /* A-Law enable */
+#define RLSBIT 0x0010 /* RX Bit Order */
+#define IRFS 0x0200 /* Internal RX Frame Sync Select */
+#define RFSR 0x0400 /* RX Frame Sync Required Select */
+#define LRFS 0x1000 /* Low RX Frame Sync Select */
+#define LARFS 0x2000 /* Late RX Frame Sync Select */
+#define RCKFE 0x4000 /* RX Clock Falling Edge Select */
+
+/* SPORTx_RCR2 Masks */
+#define SLEN 0x001F /* RX Word Length */
+#define RXSE 0x0100 /* RX Secondary Enable */
+#define RSFSE 0x0200 /* RX Stereo Frame Sync Enable */
+#define RRFST 0x0400 /* Right-First Data Order */
+
+/* SPORTx_STAT Masks */
+#define RXNE 0x0001 /* RX FIFO Not Empty Status */
+#define RUVF 0x0002 /* RX Underflow Status */
+#define ROVF 0x0004 /* RX Overflow Status */
+#define TXF 0x0008 /* TX FIFO Full Status */
+#define TUVF 0x0010 /* TX Underflow Status */
+#define TOVF 0x0020 /* TX Overflow Status */
+#define TXHRE 0x0040 /* TX Hold Register Empty */
+
+/* SPORTx_MCMC1 Masks */
+#define WSIZE 0x0000F000 /* Multichannel Window Size Field */
+#define WOFF 0x000003FF /* /Multichannel Window Offset Field */
+
+/* SPORTx_MCMC2 Masks */
+#define MCCRM 0x00000003 /* Multichannel Clock Recovery Mode */
+#define MCDTXPE 0x00000004 /* Multichannel DMA Transmit Packing */
+#define MCDRXPE 0x00000008 /* Multichannel DMA Receive Packing */
+#define MCMEN 0x00000010 /* Multichannel Frame Mode Enable */
+#define FSDR 0x00000080 /* Multichannel Frame Sync to Data Relationship */
+#define MFD 0x0000F000 /* Multichannel Frame Delay */
+
+/*
+ * PARALLEL PERIPHERAL INTERFACE (PPI) MASKS
+ */
+
+/* PPI_CONTROL Masks */
+#define PORT_EN 0x00000001 /* PPI Port Enable */
+#define PORT_DIR 0x00000002 /* PPI Port Direction */
+#define XFR_TYPE 0x0000000C /* PPI Transfer Type */
+#define PORT_CFG 0x00000030 /* PPI Port Configuration */
+#define FLD_SEL 0x00000040 /* PPI Active Field Select */
+#define PACK_EN 0x00000080 /* PPI Packing Mode */
+#define DMA32 0x00000100 /* PPI 32-bit DMA Enable */
+#define SKIP_EN 0x00000200 /* PPI Skip Element Enable */
+#define SKIP_EO 0x00000400 /* PPI Skip Even/Odd Elements */
+#define DLENGTH 0x00003800 /* PPI Data Length */
+#define DLEN_8 0x0 /* PPI Data Length mask for DLEN=8 */
+#define DLEN(x) (((x-9) & 0x07) << 11) /* PPI Data Length (only works for x=10-->x=16) */
+#define POL 0x0000C000 /* PPI Signal Polarities */
+
+/* PPI_STATUS Masks */
+#define FLD 0x00000400 /* Field Indicator */
+#define FT_ERR 0x00000800 /* Frame Track Error */
+#define OVR 0x00001000 /* FIFO Overflow Error */
+#define UNDR 0x00002000 /* FIFO Underrun Error */
+#define ERR_DET 0x00004000 /* Error Detected Indicator */
+#define ERR_NCOR 0x00008000 /* Error Not Corrected Indicator */
+
+/*
+ * DMA CONTROLLER MASKS
+ */
+
+/* DMAx_CONFIG, MDMA_yy_CONFIG Masks */
+#define DMAEN 0x00000001 /* Channel Enable */
+#define WNR 0x00000002 /* Channel Direction (W/R*) */
+#define WDSIZE_8 0x00000000 /* Word Size 8 bits */
+#define WDSIZE_16 0x00000004 /* Word Size 16 bits */
+#define WDSIZE_32 0x00000008 /* Word Size 32 bits */
+#define DMA2D 0x00000010 /* 2D/1D* Mode */
+#define RESTART 0x00000020 /* Restart */
+#define DI_SEL 0x00000040 /* Data Interrupt Select */
+#define DI_EN 0x00000080 /* Data Interrupt Enable */
+#define NDSIZE 0x00000900 /* Next Descriptor Size */
+#define FLOW 0x00007000 /* Flow Control */
+
+#define DMAEN_P 0 /* Channel Enable */
+#define WNR_P 1 /* Channel Direction (W/R*) */
+#define DMA2D_P 4 /* 2D/1D* Mode */
+#define RESTART_P 5 /* Restart */
+#define DI_SEL_P 6 /* Data Interrupt Select */
+#define DI_EN_P 7 /* Data Interrupt Enable */
+
+/* DMAx_IRQ_STATUS, MDMA_yy_IRQ_STATUS Masks */
+#define DMA_DONE 0x00000001 /* DMA Done Indicator */
+#define DMA_ERR 0x00000002 /* DMA Error Indicator */
+#define DFETCH 0x00000004 /* Descriptor Fetch Indicator */
+#define DMA_RUN 0x00000008 /* DMA Running Indicator */
+
+#define DMA_DONE_P 0 /* DMA Done Indicator */
+#define DMA_ERR_P 1 /* DMA Error Indicator */
+#define DFETCH_P 2 /* Descriptor Fetch Indicator */
+#define DMA_RUN_P 3 /* DMA Running Indicator */
+
+/* DMAx_PERIPHERAL_MAP, MDMA_yy_PERIPHERAL_MAP Masks */
+#define CTYPE 0x00000040 /* DMA Channel Type Indicator */
+#define CTYPE_P 6 /* DMA Channel Type Indicator BIT POSITION */
+#define PCAP8 0x00000080 /* DMA 8-bit Operation Indicator */
+#define PCAP16 0x00000100 /* DMA 16-bit Operation Indicator */
+#define PCAP32 0x00000200 /* DMA 32-bit Operation Indicator */
+#define PCAPWR 0x00000400 /* DMA Write Operation Indicator */
+#define PCAPRD 0x00000800 /* DMA Read Operation Indicator */
+#define PMAP 0x00007000 /* DMA Peripheral Map Field */
+
+/*
+ * GENERAL PURPOSE TIMER MASKS
+ */
+
+/* PWM Timer bit definitions */
+
+/* TIMER_ENABLE Register */
+#define TIMEN0 0x0001
+#define TIMEN1 0x0002
+#define TIMEN2 0x0004
+
+#define TIMEN0_P 0x00
+#define TIMEN1_P 0x01
+#define TIMEN2_P 0x02
+
+/* TIMER_DISABLE Register */
+#define TIMDIS0 0x0001
+#define TIMDIS1 0x0002
+#define TIMDIS2 0x0004
+
+#define TIMDIS0_P 0x00
+#define TIMDIS1_P 0x01
+#define TIMDIS2_P 0x02
+
+/* TIMER_STATUS Register */
+#define TIMIL0 0x0001
+#define TIMIL1 0x0002
+#define TIMIL2 0x0004
+#define TOVL_ERR0 0x0010
+#define TOVL_ERR1 0x0020
+#define TOVL_ERR2 0x0040
+#define TRUN0 0x1000
+#define TRUN1 0x2000
+#define TRUN2 0x4000
+
+#define TIMIL0_P 0x00
+#define TIMIL1_P 0x01
+#define TIMIL2_P 0x02
+#define TOVL_ERR0_P 0x04
+#define TOVL_ERR1_P 0x05
+#define TOVL_ERR2_P 0x06
+#define TRUN0_P 0x0C
+#define TRUN1_P 0x0D
+#define TRUN2_P 0x0E
+
+/* TIMERx_CONFIG Registers */
+#define PWM_OUT 0x0001
+#define WDTH_CAP 0x0002
+#define EXT_CLK 0x0003
+#define PULSE_HI 0x0004
+#define PERIOD_CNT 0x0008
+#define IRQ_ENA 0x0010
+#define TIN_SEL 0x0020
+#define OUT_DIS 0x0040
+#define CLK_SEL 0x0080
+#define TOGGLE_HI 0x0100
+#define EMU_RUN 0x0200
+#define ERR_TYP(x) ((x & 0x03) << 14)
+
+#define TMODE_P0 0x00
+#define TMODE_P1 0x01
+#define PULSE_HI_P 0x02
+#define PERIOD_CNT_P 0x03
+#define IRQ_ENA_P 0x04
+#define TIN_SEL_P 0x05
+#define OUT_DIS_P 0x06
+#define CLK_SEL_P 0x07
+#define TOGGLE_HI_P 0x08
+#define EMU_RUN_P 0x09
+#define ERR_TYP_P0 0x0E
+#define ERR_TYP_P1 0x0F
+
+/*
+ * PROGRAMMABLE FLAG MASKS
+ */
+
+/* General Purpose IO (0xFFC00700 - 0xFFC007FF) Masks */
+#define PF0 0x0001
+#define PF1 0x0002
+#define PF2 0x0004
+#define PF3 0x0008
+#define PF4 0x0010
+#define PF5 0x0020
+#define PF6 0x0040
+#define PF7 0x0080
+#define PF8 0x0100
+#define PF9 0x0200
+#define PF10 0x0400
+#define PF11 0x0800
+#define PF12 0x1000
+#define PF13 0x2000
+#define PF14 0x4000
+#define PF15 0x8000
+
+/* General Purpose IO (0xFFC00700 - 0xFFC007FF) BIT POSITIONS */
+#define PF0_P 0
+#define PF1_P 1
+#define PF2_P 2
+#define PF3_P 3
+#define PF4_P 4
+#define PF5_P 5
+#define PF6_P 6
+#define PF7_P 7
+#define PF8_P 8
+#define PF9_P 9
+#define PF10_P 10
+#define PF11_P 11
+#define PF12_P 12
+#define PF13_P 13
+#define PF14_P 14
+#define PF15_P 15
+
+/*
+ * SERIAL PERIPHERAL INTERFACE (SPI) MASKS
+ */
+
+/* SPI_CTL Masks */
+#define TIMOD 0x00000003 /* Transfer initiation mode and interrupt generation */
+#define SZ 0x00000004 /* Send Zero (=0) or last (=1) word when TDBR empty. */
+#define GM 0x00000008 /* When RDBR full, get more (=1) data or discard (=0) incoming Data */
+#define PSSE 0x00000010 /* Enable (=1) Slave-Select input for Master. */
+#define EMISO 0x00000020 /* Enable (=1) MISO pin as an output. */
+#define SIZE 0x00000100 /* Word length (0 => 8 bits, 1 => 16 bits) */
+#define LSBF 0x00000200 /* Data format (0 => MSB sent/received first 1 => LSB sent/received first) */
+#define CPHA 0x00000400 /* Clock phase (0 => SPICLK starts toggling in middle of xfer, 1 => SPICLK toggles at the beginning of xfer. */
+#define CPOL 0x00000800 /* Clock polarity (0 => active-high, 1 => active-low) */
+#define MSTR 0x00001000 /* Configures SPI as master (=1) or slave (=0) */
+#define WOM 0x00002000 /* Open drain (=1) data output enable (for MOSI and MISO) */
+#define SPE 0x00004000 /* SPI module enable (=1), disable (=0) */
+
+/* SPI_FLG Masks */
+#define FLS1 0x00000002 /* Enables (=1) SPI_FLOUT1 as flag output for SPI Slave-select */
+#define FLS2 0x00000004 /* Enables (=1) SPI_FLOUT2 as flag output for SPI Slave-select */
+#define FLS3 0x00000008 /* Enables (=1) SPI_FLOUT3 as flag output for SPI Slave-select */
+#define FLS4 0x00000010 /* Enables (=1) SPI_FLOUT4 as flag output for SPI Slave-select */
+#define FLS5 0x00000020 /* Enables (=1) SPI_FLOUT5 as flag output for SPI Slave-select */
+#define FLS6 0x00000040 /* Enables (=1) SPI_FLOUT6 as flag output for SPI Slave-select */
+#define FLS7 0x00000080 /* Enables (=1) SPI_FLOUT7 as flag output for SPI Slave-select */
+#define FLG1 0x00000200 /* Activates (=0) SPI_FLOUT1 as flag output for SPI Slave-select */
+#define FLG2 0x00000400 /* Activates (=0) SPI_FLOUT2 as flag output for SPI Slave-select */
+#define FLG3 0x00000800 /* Activates (=0) SPI_FLOUT3 as flag output for SPI Slave-select */
+#define FLG4 0x00001000 /* Activates (=0) SPI_FLOUT4 as flag output for SPI Slave-select */
+#define FLG5 0x00002000 /* Activates (=0) SPI_FLOUT5 as flag output for SPI Slave-select */
+#define FLG6 0x00004000 /* Activates (=0) SPI_FLOUT6 as flag output for SPI Slave-select */
+#define FLG7 0x00008000 /* Activates (=0) SPI_FLOUT7 as flag output for SPI Slave-select */
+
+/* SPI_FLG Bit Positions */
+#define FLS1_P 0x00000001 /* Enables (=1) SPI_FLOUT1 as flag output for SPI Slave-select */
+#define FLS2_P 0x00000002 /* Enables (=1) SPI_FLOUT2 as flag output for SPI Slave-select */
+#define FLS3_P 0x00000003 /* Enables (=1) SPI_FLOUT3 as flag output for SPI Slave-select */
+#define FLS4_P 0x00000004 /* Enables (=1) SPI_FLOUT4 as flag output for SPI Slave-select */
+#define FLS5_P 0x00000005 /* Enables (=1) SPI_FLOUT5 as flag output for SPI Slave-select */
+#define FLS6_P 0x00000006 /* Enables (=1) SPI_FLOUT6 as flag output for SPI Slave-select */
+#define FLS7_P 0x00000007 /* Enables (=1) SPI_FLOUT7 as flag output for SPI Slave-select */
+#define FLG1_P 0x00000009 /* Activates (=0) SPI_FLOUT1 as flag output for SPI Slave-select */
+#define FLG2_P 0x0000000A /* Activates (=0) SPI_FLOUT2 as flag output for SPI Slave-select */
+#define FLG3_P 0x0000000B /* Activates (=0) SPI_FLOUT3 as flag output for SPI Slave-select */
+#define FLG4_P 0x0000000C /* Activates (=0) SPI_FLOUT4 as flag output for SPI Slave-select */
+#define FLG5_P 0x0000000D /* Activates (=0) SPI_FLOUT5 as flag output for SPI Slave-select */
+#define FLG6_P 0x0000000E /* Activates (=0) SPI_FLOUT6 as flag output for SPI Slave-select */
+#define FLG7_P 0x0000000F /* Activates (=0) SPI_FLOUT7 as flag output for SPI Slave-select */
+
+/* SPI_STAT Masks */
+#define SPIF 0x00000001 /* Set (=1) when SPI single-word transfer complete */
+#define MODF 0x00000002 /* Set(=1)in a master device when some other device tries to become master */
+#define TXE 0x00000004 /* Set (=1) when transmission occurs with no new data in SPI_TDBR */
+#define TXS 0x00000008 /* SPI_TDBR Data Buffer Status (0=Empty, 1=Full) */
+#define RBSY 0x00000010 /* Set (=1) when data is received with RDBR full */
+#define RXS 0x00000020 /* SPI_RDBR Data Buffer Status (0=Empty, 1=Full) */
+#define TXCOL 0x00000040 /* When set (=1), corrupt data may have been transmitted */
+
+/*
+ * ASYNCHRONOUS MEMORY CONTROLLER MASKS
+ */
+
+/* AMGCTL Masks */
+#define AMCKEN 0x00000001 /* Enable CLKOUT */
+#define AMBEN_B0 0x00000002 /* Enable Asynchronous Memory Bank 0 only */
+#define AMBEN_B0_B1 0x00000004 /* Enable Asynchronous Memory Banks 0 & 1 only */
+#define AMBEN_B0_B1_B2 0x00000006 /* Enable Asynchronous Memory Banks 0, 1, and 2 */
+#define AMBEN_ALL 0x00000008 /* Enable Asynchronous Memory Banks (all) 0, 1, 2, and 3 */
+
+/* AMGCTL Bit Positions */
+#define AMCKEN_P 0x00000000 /* Enable CLKOUT */
+#define AMBEN_P0 0x00000001 /* Asynchronous Memory Enable, 000 - banks 0-3 disabled, 001 - Bank 0 enabled */
+#define AMBEN_P1 0x00000002 /* Asynchronous Memory Enable, 010 - banks 0&1 enabled, 011 - banks 0-3 enabled */
+#define AMBEN_P2 0x00000003 /* Asynchronous Memory Enable, 1xx - All banks (bank 0, 1, 2, and 3) enabled */
+
+/* AMBCTL0 Masks */
+#define B0RDYEN 0x00000001 /* Bank 0 RDY Enable, 0=disable, 1=enable */
+#define B0RDYPOL 0x00000002 /* Bank 0 RDY Active high, 0=active low, 1=active high */
+#define B0TT_1 0x00000004 /* Bank 0 Transition Time from Read to Write = 1 cycle */
+#define B0TT_2 0x00000008 /* Bank 0 Transition Time from Read to Write = 2 cycles */
+#define B0TT_3 0x0000000C /* Bank 0 Transition Time from Read to Write = 3 cycles */
+#define B0TT_4 0x00000000 /* Bank 0 Transition Time from Read to Write = 4 cycles */
+#define B0ST_1 0x00000010 /* Bank 0 Setup Time from AOE asserted to Read/Write asserted=1 cycle */
+#define B0ST_2 0x00000020 /* Bank 0 Setup Time from AOE asserted to Read/Write asserted=2 cycles */
+#define B0ST_3 0x00000030 /* Bank 0 Setup Time from AOE asserted to Read/Write asserted=3 cycles */
+#define B0ST_4 0x00000000 /* Bank 0 Setup Time from AOE asserted to Read/Write asserted=4 cycles */
+#define B0HT_1 0x00000040 /* Bank 0 Hold Time from Read/Write deasserted to AOE deasserted = 1 cycle */
+#define B0HT_2 0x00000080 /* Bank 0 Hold Time from Read/Write deasserted to AOE deasserted = 2 cycles */
+#define B0HT_3 0x000000C0 /* Bank 0 Hold Time from Read/Write deasserted to AOE deasserted = 3 cycles */
+#define B0HT_0 0x00000000 /* Bank 0 Hold Time from Read/Write deasserted to AOE deasserted = 0 cycles */
+#define B0RAT_1 0x00000100 /* Bank 0 Read Access Time = 1 cycle */
+#define B0RAT_2 0x00000200 /* Bank 0 Read Access Time = 2 cycles */
+#define B0RAT_3 0x00000300 /* Bank 0 Read Access Time = 3 cycles */
+#define B0RAT_4 0x00000400 /* Bank 0 Read Access Time = 4 cycles */
+#define B0RAT_5 0x00000500 /* Bank 0 Read Access Time = 5 cycles */
+#define B0RAT_6 0x00000600 /* Bank 0 Read Access Time = 6 cycles */
+#define B0RAT_7 0x00000700 /* Bank 0 Read Access Time = 7 cycles */
+#define B0RAT_8 0x00000800 /* Bank 0 Read Access Time = 8 cycles */
+#define B0RAT_9 0x00000900 /* Bank 0 Read Access Time = 9 cycles */
+#define B0RAT_10 0x00000A00 /* Bank 0 Read Access Time = 10 cycles */
+#define B0RAT_11 0x00000B00 /* Bank 0 Read Access Time = 11 cycles */
+#define B0RAT_12 0x00000C00 /* Bank 0 Read Access Time = 12 cycles */
+#define B0RAT_13 0x00000D00 /* Bank 0 Read Access Time = 13 cycles */
+#define B0RAT_14 0x00000E00 /* Bank 0 Read Access Time = 14 cycles */
+#define B0RAT_15 0x00000F00 /* Bank 0 Read Access Time = 15 cycles */
+#define B0WAT_1 0x00001000 /* Bank 0 Write Access Time = 1 cycle */
+#define B0WAT_2 0x00002000 /* Bank 0 Write Access Time = 2 cycles */
+#define B0WAT_3 0x00003000 /* Bank 0 Write Access Time = 3 cycles */
+#define B0WAT_4 0x00004000 /* Bank 0 Write Access Time = 4 cycles */
+#define B0WAT_5 0x00005000 /* Bank 0 Write Access Time = 5 cycles */
+#define B0WAT_6 0x00006000 /* Bank 0 Write Access Time = 6 cycles */
+#define B0WAT_7 0x00007000 /* Bank 0 Write Access Time = 7 cycles */
+#define B0WAT_8 0x00008000 /* Bank 0 Write Access Time = 8 cycles */
+#define B0WAT_9 0x00009000 /* Bank 0 Write Access Time = 9 cycles */
+#define B0WAT_10 0x0000A000 /* Bank 0 Write Access Time = 10 cycles */
+#define B0WAT_11 0x0000B000 /* Bank 0 Write Access Time = 11 cycles */
+#define B0WAT_12 0x0000C000 /* Bank 0 Write Access Time = 12 cycles */
+#define B0WAT_13 0x0000D000 /* Bank 0 Write Access Time = 13 cycles */
+#define B0WAT_14 0x0000E000 /* Bank 0 Write Access Time = 14 cycles */
+#define B0WAT_15 0x0000F000 /* Bank 0 Write Access Time = 15 cycles */
+#define B1RDYEN 0x00010000 /* Bank 1 RDY enable, 0=disable, 1=enable */
+#define B1RDYPOL 0x00020000 /* Bank 1 RDY Active high, 0=active low, 1=active high */
+#define B1TT_1 0x00040000 /* Bank 1 Transition Time from Read to Write = 1 cycle */
+#define B1TT_2 0x00080000 /* Bank 1 Transition Time from Read to Write = 2 cycles */
+#define B1TT_3 0x000C0000 /* Bank 1 Transition Time from Read to Write = 3 cycles */
+#define B1TT_4 0x00000000 /* Bank 1 Transition Time from Read to Write = 4 cycles */
+#define B1ST_1 0x00100000 /* Bank 1 Setup Time from AOE asserted to Read or Write asserted = 1 cycle */
+#define B1ST_2 0x00200000 /* Bank 1 Setup Time from AOE asserted to Read or Write asserted = 2 cycles */
+#define B1ST_3 0x00300000 /* Bank 1 Setup Time from AOE asserted to Read or Write asserted = 3 cycles */
+#define B1ST_4 0x00000000 /* Bank 1 Setup Time from AOE asserted to Read or Write asserted = 4 cycles */
+#define B1HT_1 0x00400000 /* Bank 1 Hold Time from Read or Write deasserted to AOE deasserted = 1 cycle */
+#define B1HT_2 0x00800000 /* Bank 1 Hold Time from Read or Write deasserted to AOE deasserted = 2 cycles */
+#define B1HT_3 0x00C00000 /* Bank 1 Hold Time from Read or Write deasserted to AOE deasserted = 3 cycles */
+#define B1HT_0 0x00000000 /* Bank 1 Hold Time from Read or Write deasserted to AOE deasserted = 0 cycles */
+#define B1RAT_1 0x01000000 /* Bank 1 Read Access Time = 1 cycle */
+#define B1RAT_2 0x02000000 /* Bank 1 Read Access Time = 2 cycles */
+#define B1RAT_3 0x03000000 /* Bank 1 Read Access Time = 3 cycles */
+#define B1RAT_4 0x04000000 /* Bank 1 Read Access Time = 4 cycles */
+#define B1RAT_5 0x05000000 /* Bank 1 Read Access Time = 5 cycles */
+#define B1RAT_6 0x06000000 /* Bank 1 Read Access Time = 6 cycles */
+#define B1RAT_7 0x07000000 /* Bank 1 Read Access Time = 7 cycles */
+#define B1RAT_8 0x08000000 /* Bank 1 Read Access Time = 8 cycles */
+#define B1RAT_9 0x09000000 /* Bank 1 Read Access Time = 9 cycles */
+#define B1RAT_10 0x0A000000 /* Bank 1 Read Access Time = 10 cycles */
+#define B1RAT_11 0x0B000000 /* Bank 1 Read Access Time = 11 cycles */
+#define B1RAT_12 0x0C000000 /* Bank 1 Read Access Time = 12 cycles */
+#define B1RAT_13 0x0D000000 /* Bank 1 Read Access Time = 13 cycles */
+#define B1RAT_14 0x0E000000 /* Bank 1 Read Access Time = 14 cycles */
+#define B1RAT_15 0x0F000000 /* Bank 1 Read Access Time = 15 cycles */
+#define B1WAT_1 0x10000000 /* Bank 1 Write Access Time = 1 cycle */
+#define B1WAT_2 0x20000000 /* Bank 1 Write Access Time = 2 cycles */
+#define B1WAT_3 0x30000000 /* Bank 1 Write Access Time = 3 cycles */
+#define B1WAT_4 0x40000000 /* Bank 1 Write Access Time = 4 cycles */
+#define B1WAT_5 0x50000000 /* Bank 1 Write Access Time = 5 cycles */
+#define B1WAT_6 0x60000000 /* Bank 1 Write Access Time = 6 cycles */
+#define B1WAT_7 0x70000000 /* Bank 1 Write Access Time = 7 cycles */
+#define B1WAT_8 0x80000000 /* Bank 1 Write Access Time = 8 cycles */
+#define B1WAT_9 0x90000000 /* Bank 1 Write Access Time = 9 cycles */
+#define B1WAT_10 0xA0000000 /* Bank 1 Write Access Time = 10 cycles */
+#define B1WAT_11 0xB0000000 /* Bank 1 Write Access Time = 11 cycles */
+#define B1WAT_12 0xC0000000 /* Bank 1 Write Access Time = 12 cycles */
+#define B1WAT_13 0xD0000000 /* Bank 1 Write Access Time = 13 cycles */
+#define B1WAT_14 0xE0000000 /* Bank 1 Write Access Time = 14 cycles */
+#define B1WAT_15 0xF0000000 /* Bank 1 Write Access Time = 15 cycles */
+
+/* AMBCTL1 Masks */
+#define B2RDYEN 0x00000001 /* Bank 2 RDY Enable, 0=disable, 1=enable */
+#define B2RDYPOL 0x00000002 /* Bank 2 RDY Active high, 0=active low, 1=active high */
+#define B2TT_1 0x00000004 /* Bank 2 Transition Time from Read to Write = 1 cycle */
+#define B2TT_2 0x00000008 /* Bank 2 Transition Time from Read to Write = 2 cycles */
+#define B2TT_3 0x0000000C /* Bank 2 Transition Time from Read to Write = 3 cycles */
+#define B2TT_4 0x00000000 /* Bank 2 Transition Time from Read to Write = 4 cycles */
+#define B2ST_1 0x00000010 /* Bank 2 Setup Time from AOE asserted to Read or Write asserted = 1 cycle */
+#define B2ST_2 0x00000020 /* Bank 2 Setup Time from AOE asserted to Read or Write asserted = 2 cycles */
+#define B2ST_3 0x00000030 /* Bank 2 Setup Time from AOE asserted to Read or Write asserted = 3 cycles */
+#define B2ST_4 0x00000000 /* Bank 2 Setup Time from AOE asserted to Read or Write asserted = 4 cycles */
+#define B2HT_1 0x00000040 /* Bank 2 Hold Time from Read or Write deasserted to AOE deasserted = 1 cycle */
+#define B2HT_2 0x00000080 /* Bank 2 Hold Time from Read or Write deasserted to AOE deasserted = 2 cycles */
+#define B2HT_3 0x000000C0 /* Bank 2 Hold Time from Read or Write deasserted to AOE deasserted = 3 cycles */
+#define B2HT_0 0x00000000 /* Bank 2 Hold Time from Read or Write deasserted to AOE deasserted = 0 cycles */
+#define B2RAT_1 0x00000100 /* Bank 2 Read Access Time = 1 cycle */
+#define B2RAT_2 0x00000200 /* Bank 2 Read Access Time = 2 cycles */
+#define B2RAT_3 0x00000300 /* Bank 2 Read Access Time = 3 cycles */
+#define B2RAT_4 0x00000400 /* Bank 2 Read Access Time = 4 cycles */
+#define B2RAT_5 0x00000500 /* Bank 2 Read Access Time = 5 cycles */
+#define B2RAT_6 0x00000600 /* Bank 2 Read Access Time = 6 cycles */
+#define B2RAT_7 0x00000700 /* Bank 2 Read Access Time = 7 cycles */
+#define B2RAT_8 0x00000800 /* Bank 2 Read Access Time = 8 cycles */
+#define B2RAT_9 0x00000900 /* Bank 2 Read Access Time = 9 cycles */
+#define B2RAT_10 0x00000A00 /* Bank 2 Read Access Time = 10 cycles */
+#define B2RAT_11 0x00000B00 /* Bank 2 Read Access Time = 11 cycles */
+#define B2RAT_12 0x00000C00 /* Bank 2 Read Access Time = 12 cycles */
+#define B2RAT_13 0x00000D00 /* Bank 2 Read Access Time = 13 cycles */
+#define B2RAT_14 0x00000E00 /* Bank 2 Read Access Time = 14 cycles */
+#define B2RAT_15 0x00000F00 /* Bank 2 Read Access Time = 15 cycles */
+#define B2WAT_1 0x00001000 /* Bank 2 Write Access Time = 1 cycle */
+#define B2WAT_2 0x00002000 /* Bank 2 Write Access Time = 2 cycles */
+#define B2WAT_3 0x00003000 /* Bank 2 Write Access Time = 3 cycles */
+#define B2WAT_4 0x00004000 /* Bank 2 Write Access Time = 4 cycles */
+#define B2WAT_5 0x00005000 /* Bank 2 Write Access Time = 5 cycles */
+#define B2WAT_6 0x00006000 /* Bank 2 Write Access Time = 6 cycles */
+#define B2WAT_7 0x00007000 /* Bank 2 Write Access Time = 7 cycles */
+#define B2WAT_8 0x00008000 /* Bank 2 Write Access Time = 8 cycles */
+#define B2WAT_9 0x00009000 /* Bank 2 Write Access Time = 9 cycles */
+#define B2WAT_10 0x0000A000 /* Bank 2 Write Access Time = 10 cycles */
+#define B2WAT_11 0x0000B000 /* Bank 2 Write Access Time = 11 cycles */
+#define B2WAT_12 0x0000C000 /* Bank 2 Write Access Time = 12 cycles */
+#define B2WAT_13 0x0000D000 /* Bank 2 Write Access Time = 13 cycles */
+#define B2WAT_14 0x0000E000 /* Bank 2 Write Access Time = 14 cycles */
+#define B2WAT_15 0x0000F000 /* Bank 2 Write Access Time = 15 cycles */
+#define B3RDYEN 0x00010000 /* Bank 3 RDY enable, 0=disable, 1=enable */
+#define B3RDYPOL 0x00020000 /* Bank 3 RDY Active high, 0=active low, 1=active high */
+#define B3TT_1 0x00040000 /* Bank 3 Transition Time from Read to Write = 1 cycle */
+#define B3TT_2 0x00080000 /* Bank 3 Transition Time from Read to Write = 2 cycles */
+#define B3TT_3 0x000C0000 /* Bank 3 Transition Time from Read to Write = 3 cycles */
+#define B3TT_4 0x00000000 /* Bank 3 Transition Time from Read to Write = 4 cycles */
+#define B3ST_1 0x00100000 /* Bank 3 Setup Time from AOE asserted to Read or Write asserted = 1 cycle */
+#define B3ST_2 0x00200000 /* Bank 3 Setup Time from AOE asserted to Read or Write asserted = 2 cycles */
+#define B3ST_3 0x00300000 /* Bank 3 Setup Time from AOE asserted to Read or Write asserted = 3 cycles */
+#define B3ST_4 0x00000000 /* Bank 3 Setup Time from AOE asserted to Read or Write asserted = 4 cycles */
+#define B3HT_1 0x00400000 /* Bank 3 Hold Time from Read or Write deasserted to AOE deasserted = 1 cycle */
+#define B3HT_2 0x00800000 /* Bank 3 Hold Time from Read or Write deasserted to AOE deasserted = 2 cycles */
+#define B3HT_3 0x00C00000 /* Bank 3 Hold Time from Read or Write deasserted to AOE deasserted = 3 cycles */
+#define B3HT_0 0x00000000 /* Bank 3 Hold Time from Read or Write deasserted to AOE deasserted = 0 cycles */
+#define B3RAT_1 0x01000000 /* Bank 3 Read Access Time = 1 cycle */
+#define B3RAT_2 0x02000000 /* Bank 3 Read Access Time = 2 cycles */
+#define B3RAT_3 0x03000000 /* Bank 3 Read Access Time = 3 cycles */
+#define B3RAT_4 0x04000000 /* Bank 3 Read Access Time = 4 cycles */
+#define B3RAT_5 0x05000000 /* Bank 3 Read Access Time = 5 cycles */
+#define B3RAT_6 0x06000000 /* Bank 3 Read Access Time = 6 cycles */
+#define B3RAT_7 0x07000000 /* Bank 3 Read Access Time = 7 cycles */
+#define B3RAT_8 0x08000000 /* Bank 3 Read Access Time = 8 cycles */
+#define B3RAT_9 0x09000000 /* Bank 3 Read Access Time = 9 cycles */
+#define B3RAT_10 0x0A000000 /* Bank 3 Read Access Time = 10 cycles */
+#define B3RAT_11 0x0B000000 /* Bank 3 Read Access Time = 11 cycles */
+#define B3RAT_12 0x0C000000 /* Bank 3 Read Access Time = 12 cycles */
+#define B3RAT_13 0x0D000000 /* Bank 3 Read Access Time = 13 cycles */
+#define B3RAT_14 0x0E000000 /* Bank 3 Read Access Time = 14 cycles */
+#define B3RAT_15 0x0F000000 /* Bank 3 Read Access Time = 15 cycles */
+#define B3WAT_1 0x10000000 /* Bank 3 Write Access Time = 1 cycle */
+#define B3WAT_2 0x20000000 /* Bank 3 Write Access Time = 2 cycles */
+#define B3WAT_3 0x30000000 /* Bank 3 Write Access Time = 3 cycles */
+#define B3WAT_4 0x40000000 /* Bank 3 Write Access Time = 4 cycles */
+#define B3WAT_5 0x50000000 /* Bank 3 Write Access Time = 5 cycles */
+#define B3WAT_6 0x60000000 /* Bank 3 Write Access Time = 6 cycles */
+#define B3WAT_7 0x70000000 /* Bank 3 Write Access Time = 7 cycles */
+#define B3WAT_8 0x80000000 /* Bank 3 Write Access Time = 8 cycles */
+#define B3WAT_9 0x90000000 /* Bank 3 Write Access Time = 9 cycles */
+#define B3WAT_10 0xA0000000 /* Bank 3 Write Access Time = 10 cycles */
+#define B3WAT_11 0xB0000000 /* Bank 3 Write Access Time = 11 cycles */
+#define B3WAT_12 0xC0000000 /* Bank 3 Write Access Time = 12 cycles */
+#define B3WAT_13 0xD0000000 /* Bank 3 Write Access Time = 13 cycles */
+#define B3WAT_14 0xE0000000 /* Bank 3 Write Access Time = 14 cycles */
+#define B3WAT_15 0xF0000000 /* Bank 3 Write Access Time = 15 cycles */
+
+/*
+ * SDRAM CONTROLLER MASKS
+ */
+
+/* SDGCTL Masks */
+#define SCTLE 0x00000001 /* Enable SCLK[0], /SRAS, /SCAS, /SWE, SDQM[3:0] */
+#define CL_2 0x00000008 /* SDRAM CAS latency = 2 cycles */
+#define CL_3 0x0000000C /* SDRAM CAS latency = 3 cycles */
+#define PFE 0x00000010 /* Enable SDRAM prefetch */
+#define PFP 0x00000020 /* Prefetch has priority over AMC requests */
+#define TRAS_1 0x00000040 /* SDRAM tRAS = 1 cycle */
+#define TRAS_2 0x00000080 /* SDRAM tRAS = 2 cycles */
+#define TRAS_3 0x000000C0 /* SDRAM tRAS = 3 cycles */
+#define TRAS_4 0x00000100 /* SDRAM tRAS = 4 cycles */
+#define TRAS_5 0x00000140 /* SDRAM tRAS = 5 cycles */
+#define TRAS_6 0x00000180 /* SDRAM tRAS = 6 cycles */
+#define TRAS_7 0x000001C0 /* SDRAM tRAS = 7 cycles */
+#define TRAS_8 0x00000200 /* SDRAM tRAS = 8 cycles */
+#define TRAS_9 0x00000240 /* SDRAM tRAS = 9 cycles */
+#define TRAS_10 0x00000280 /* SDRAM tRAS = 10 cycles */
+#define TRAS_11 0x000002C0 /* SDRAM tRAS = 11 cycles */
+#define TRAS_12 0x00000300 /* SDRAM tRAS = 12 cycles */
+#define TRAS_13 0x00000340 /* SDRAM tRAS = 13 cycles */
+#define TRAS_14 0x00000380 /* SDRAM tRAS = 14 cycles */
+#define TRAS_15 0x000003C0 /* SDRAM tRAS = 15 cycles */
+#define TRP_1 0x00000800 /* SDRAM tRP = 1 cycle */
+#define TRP_2 0x00001000 /* SDRAM tRP = 2 cycles */
+#define TRP_3 0x00001800 /* SDRAM tRP = 3 cycles */
+#define TRP_4 0x00002000 /* SDRAM tRP = 4 cycles */
+#define TRP_5 0x00002800 /* SDRAM tRP = 5 cycles */
+#define TRP_6 0x00003000 /* SDRAM tRP = 6 cycles */
+#define TRP_7 0x00003800 /* SDRAM tRP = 7 cycles */
+#define TRCD_1 0x00008000 /* SDRAM tRCD = 1 cycle */
+#define TRCD_2 0x00010000 /* SDRAM tRCD = 2 cycles */
+#define TRCD_3 0x00018000 /* SDRAM tRCD = 3 cycles */
+#define TRCD_4 0x00020000 /* SDRAM tRCD = 4 cycles */
+#define TRCD_5 0x00028000 /* SDRAM tRCD = 5 cycles */
+#define TRCD_6 0x00030000 /* SDRAM tRCD = 6 cycles */
+#define TRCD_7 0x00038000 /* SDRAM tRCD = 7 cycles */
+#define TWR_1 0x00080000 /* SDRAM tWR = 1 cycle */
+#define TWR_2 0x00100000 /* SDRAM tWR = 2 cycles */
+#define TWR_3 0x00180000 /* SDRAM tWR = 3 cycles */
+#define PUPSD 0x00200000 /* Power-up start delay */
+#define PSM 0x00400000 /* SDRAM power-up sequence = Precharge, mode register set, 8 CBR refresh cycles */
+#define PSS 0x00800000 /* enable SDRAM power-up sequence on next SDRAM access */
+#define SRFS 0x01000000 /* Start SDRAM self-refresh mode */
+#define EBUFE 0x02000000 /* Enable external buffering timing */
+#define FBBRW 0x04000000 /* Fast back-to-back read write enable */
+#define EMREN 0x10000000 /* Extended mode register enable */
+#define TCSR 0x20000000 /* Temp compensated self refresh value 85 deg C */
+#define CDDBG 0x40000000 /* Tristate SDRAM controls during bus grant */
+
+/* EBIU_SDBCTL Masks */
+#define EBE 0x00000001 /* Enable SDRAM external bank */
+#define EBSZ_16 0x00000000 /* SDRAM external bank size = 16MB */
+#define EBSZ_32 0x00000002 /* SDRAM external bank size = 32MB */
+#define EBSZ_64 0x00000004 /* SDRAM external bank size = 64MB */
+#define EBSZ_128 0x00000006 /* SDRAM external bank size = 128MB */
+#define EBCAW_8 0x00000000 /* SDRAM external bank column address width = 8 bits */
+#define EBCAW_9 0x00000010 /* SDRAM external bank column address width = 9 bits */
+#define EBCAW_10 0x00000020 /* SDRAM external bank column address width = 9 bits */
+#define EBCAW_11 0x00000030 /* SDRAM external bank column address width = 9 bits */
+
+/* EBIU_SDSTAT Masks */
+#define SDCI 0x00000001 /* SDRAM controller is idle */
+#define SDSRA 0x00000002 /* SDRAM SDRAM self refresh is active */
+#define SDPUA 0x00000004 /* SDRAM power up active */
+#define SDRS 0x00000008 /* SDRAM is in reset state */
+#define SDEASE 0x00000010 /* SDRAM EAB sticky error status - W1C */
+#define BGSTAT 0x00000020 /* Bus granted */
+
+#endif /* _DEF_BF532_H */
diff --git a/include/asm-blackfin/cpu/defBF533.h b/include/asm-blackfin/cpu/defBF533.h
new file mode 100644
index 0000000000..90e50afa7f
--- /dev/null
+++ b/include/asm-blackfin/cpu/defBF533.h
@@ -0,0 +1,24 @@
+/*
+ * defBF533.h
+ *
+ * This file is subject to the terms and conditions of the GNU Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Non-GPL License also available as part of VisualDSP++
+ *
+ * http://www.analog.com/processors/resources/crosscore/visualDspDevSoftware.html
+ *
+ * (c) Copyright 2001-2005 Analog Devices, Inc. All rights reserved
+ *
+ * This file under source code control, please send bugs or changes to:
+ * dsptools.support@analog.com
+ *
+ */
+
+#ifndef _DEFBF533_H
+#define _DEFBF533_H
+
+#include <asm/cpu/defBF532.h>
+
+#endif /* _DEFBF533_H */
diff --git a/include/asm-blackfin/cpu/defBF533_extn.h b/include/asm-blackfin/cpu/defBF533_extn.h
new file mode 100644
index 0000000000..a9a1c7ccbd
--- /dev/null
+++ b/include/asm-blackfin/cpu/defBF533_extn.h
@@ -0,0 +1,76 @@
+/*
+ * defBF533_extn.h
+ *
+ * This file is subject to the terms and conditions of the GNU Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Non-GPL License also available as part of VisualDSP++
+ *
+ * http://www.analog.com/processors/resources/crosscore/visualDspDevSoftware.html
+ *
+ * (c) Copyright 2001-2005 Analog Devices, Inc. All rights reserved
+ *
+ * This file under source code control, please send bugs or changes to:
+ * dsptools.support@analog.com
+ *
+ */
+
+#ifndef _DEF_BF533_EXTN_H
+#define _DEF_BF533_EXTN_H
+
+#define OFFSET_( x ) ((x) & 0x0000FFFF) /* define macro for offset */
+/* Delay inserted for PLL transition */
+#define DELAY 0x1000
+
+#define L1_ISRAM 0xFFA00000
+#define L1_ISRAM_END 0xFFA10000
+#define DATA_BANKA_SRAM 0xFF800000
+#define DATA_BANKA_SRAM_END 0xFF808000
+#define DATA_BANKB_SRAM 0xFF900000
+#define DATA_BANKB_SRAM_END 0xFF908000
+#define SYSMMR_BASE 0xFFC00000
+#define WDSIZE16 0x00000004
+
+/* Event Vector Table Address */
+#define EVT_EMULATION_ADDR 0xffe02000
+#define EVT_RESET_ADDR 0xffe02004
+#define EVT_NMI_ADDR 0xffe02008
+#define EVT_EXCEPTION_ADDR 0xffe0200c
+#define EVT_GLOBAL_INT_ENB_ADDR 0xffe02010
+#define EVT_HARDWARE_ERROR_ADDR 0xffe02014
+#define EVT_TIMER_ADDR 0xffe02018
+#define EVT_IVG7_ADDR 0xffe0201c
+#define EVT_IVG8_ADDR 0xffe02020
+#define EVT_IVG9_ADDR 0xffe02024
+#define EVT_IVG10_ADDR 0xffe02028
+#define EVT_IVG11_ADDR 0xffe0202c
+#define EVT_IVG12_ADDR 0xffe02030
+#define EVT_IVG13_ADDR 0xffe02034
+#define EVT_IVG14_ADDR 0xffe02038
+#define EVT_IVG15_ADDR 0xffe0203c
+#define EVT_OVERRIDE_ADDR 0xffe02100
+
+/* IMASK Bit values */
+#define IVG15_POS 0x00008000
+#define IVG14_POS 0x00004000
+#define IVG13_POS 0x00002000
+#define IVG12_POS 0x00001000
+#define IVG11_POS 0x00000800
+#define IVG10_POS 0x00000400
+#define IVG9_POS 0x00000200
+#define IVG8_POS 0x00000100
+#define IVG7_POS 0x00000080
+#define IVGTMR_POS 0x00000040
+#define IVGHW_POS 0x00000020
+
+#define WDOG_TMR_DISABLE (0xAD << 4)
+#define ICTL_RST 0x00000000
+#define ICTL_NMI 0x00000002
+#define ICTL_GP 0x00000004
+#define ICTL_DISABLE 0x00000003
+
+/* Watch Dog timer values setup */
+#define WATCHDOG_DISABLE WDOG_TMR_DISABLE | ICTL_DISABLE
+
+#endif /* _DEF_BF533_EXTN_H */
diff --git a/include/asm-blackfin/cpu/def_LPBlackfin.h b/include/asm-blackfin/cpu/def_LPBlackfin.h
new file mode 100644
index 0000000000..9ac78c836a
--- /dev/null
+++ b/include/asm-blackfin/cpu/def_LPBlackfin.h
@@ -0,0 +1,445 @@
+/*
+ * def_LPBlackfin.h
+ *
+ * This file is subject to the terms and conditions of the GNU Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Non-GPL License also available as part of VisualDSP++
+ *
+ * http://www.analog.com/processors/resources/crosscore/visualDspDevSoftware.html
+ *
+ * (c) Copyright 2001-2005 Analog Devices, Inc. All rights reserved
+ *
+ * This file under source code control, please send bugs or changes to:
+ * dsptools.support@analog.com
+ *
+ */
+
+/* LP Blackfin CORE REGISTER BIT & ADDRESS DEFINITIONS FOR ADSP-BF532 */
+
+#ifndef _DEF_LPBLACKFIN_H
+#define _DEF_LPBLACKFIN_H
+
+/*
+ * #if !defined(__ADSPLPBLACKFIN__)
+ * #warning def_LPBlackfin.h should only be included for 532 compatible chips.
+ * #endif
+ */
+
+#define MK_BMSK_( x ) (1<<x) /* Make a bit mask from a bit position */
+
+/*
+ * System Register Bits
+ */
+
+/*
+ * ASTAT register
+ */
+
+/* definitions of ASTAT bit positions */
+#define ASTAT_AZ_P 0x00000000 /* Result of last ALU0 or shifter operation is zero */
+#define ASTAT_AN_P 0x00000001 /* Result of last ALU0 or shifter operation is negative */
+#define ASTAT_CC_P 0x00000005 /* Condition Code, used for holding comparison results */
+#define ASTAT_AQ_P 0x00000006 /* Quotient Bit */
+#define ASTAT_RND_MOD_P 0x00000008 /* Rounding mode, set for biased, clear for unbiased */
+#define ASTAT_AC0_P 0x0000000C /* Result of last ALU0 operation generated a carry */
+#define ASTAT_AC0_COPY_P 0x00000002 /* Result of last ALU0 operation generated a carry */
+#define ASTAT_AC1_P 0x0000000D /* Result of last ALU1 operation generated a carry */
+#define ASTAT_AV0_P 0x00000010 /* Result of last ALU0 or MAC0 operation overflowed, sticky for MAC */
+#define ASTAT_AV0S_P 0x00000011 /* Sticky version of ASTAT_AV0 */
+#define ASTAT_AV1_P 0x00000012 /* Result of last MAC1 operation overflowed, sticky for MAC */
+#define ASTAT_AV1S_P 0x00000013 /* Sticky version of ASTAT_AV1 */
+#define ASTAT_V_P 0x00000018 /* Result of last ALU0 or MAC0 operation overflowed */
+#define ASTAT_V_COPY_P 0x00000003 /* Result of last ALU0 or MAC0 operation overflowed */
+#define ASTAT_VS_P 0x00000019 /* Sticky version of ASTAT_V */
+
+/* ** Masks */
+#define ASTAT_AZ MK_BMSK_(ASTAT_AZ_P) /* Result of last ALU0 or shifter operation is zero */
+#define ASTAT_AN MK_BMSK_(ASTAT_AN_P) /* Result of last ALU0 or shifter operation is negative */
+#define ASTAT_AC0 MK_BMSK_(ASTAT_AC0_P) /* Result of last ALU0 operation generated a carry */
+#define ASTAT_AC0_COPY MK_BMSK_(ASTAT_AC0_COPY_P) /* Result of last ALU0 operation generated a carry */
+#define ASTAT_AC1 MK_BMSK_(ASTAT_AC1_P) /* Result of last ALU0 operation generated a carry */
+#define ASTAT_AV0 MK_BMSK_(ASTAT_AV0_P) /* Result of last ALU0 or MAC0 operation overflowed, sticky for MAC */
+#define ASTAT_AV1 MK_BMSK_(ASTAT_AV1_P) /* Result of last MAC1 operation overflowed, sticky for MAC */
+#define ASTAT_CC MK_BMSK_(ASTAT_CC_P) /* Condition Code, used for holding comparison results */
+#define ASTAT_AQ MK_BMSK_(ASTAT_AQ_P) /* Quotient Bit */
+#define ASTAT_RND_MOD MK_BMSK_(ASTAT_RND_MOD_P) /* Rounding mode, set for biased, clear for unbiased */
+#define ASTAT_V MK_BMSK_(ASTAT_V_P) /* Overflow Bit */
+#define ASTAT_V_COPY MK_BMSK_(ASTAT_V_COPY_P) /* Overflow Bit */
+
+/*
+ * SEQSTAT register
+ */
+
+/* ** Bit Positions */
+#define SEQSTAT_EXCAUSE0_P 0x00000000 /* Last exception cause bit 0 */
+#define SEQSTAT_EXCAUSE1_P 0x00000001 /* Last exception cause bit 1 */
+#define SEQSTAT_EXCAUSE2_P 0x00000002 /* Last exception cause bit 2 */
+#define SEQSTAT_EXCAUSE3_P 0x00000003 /* Last exception cause bit 3 */
+#define SEQSTAT_EXCAUSE4_P 0x00000004 /* Last exception cause bit 4 */
+#define SEQSTAT_EXCAUSE5_P 0x00000005 /* Last exception cause bit 5 */
+#define SEQSTAT_IDLE_REQ_P 0x0000000C /* Pending idle mode request, set by IDLE instruction */
+#define SEQSTAT_SFTRESET_P 0x0000000D /* Indicates whether the last reset was a software reset (=1) */
+#define SEQSTAT_HWERRCAUSE0_P 0x0000000E /* Last hw error cause bit 0 */
+#define SEQSTAT_HWERRCAUSE1_P 0x0000000F /* Last hw error cause bit 1 */
+#define SEQSTAT_HWERRCAUSE2_P 0x00000010 /* Last hw error cause bit 2 */
+#define SEQSTAT_HWERRCAUSE3_P 0x00000011 /* Last hw error cause bit 3 */
+#define SEQSTAT_HWERRCAUSE4_P 0x00000012 /* Last hw error cause bit 4 */
+#define SEQSTAT_HWERRCAUSE5_P 0x00000013 /* Last hw error cause bit 5 */
+#define SEQSTAT_HWERRCAUSE6_P 0x00000014 /* Last hw error cause bit 6 */
+#define SEQSTAT_HWERRCAUSE7_P 0x00000015 /* Last hw error cause bit 7 */
+
+/* ** Masks */
+/* Exception cause */
+#define SEQSTAT_EXCAUSE MK_BMSK_(SEQSTAT_EXCAUSE0_P ) | \
+ MK_BMSK_(SEQSTAT_EXCAUSE1_P ) | \
+ MK_BMSK_(SEQSTAT_EXCAUSE2_P ) | \
+ MK_BMSK_(SEQSTAT_EXCAUSE3_P ) | \
+ MK_BMSK_(SEQSTAT_EXCAUSE4_P ) | \
+ MK_BMSK_(SEQSTAT_EXCAUSE5_P ) | \
+ 0
+
+/* Indicates whether the last reset was a software reset (=1) */
+#define SEQSTAT_SFTRESET MK_BMSK_(SEQSTAT_SFTRESET_P )
+
+/* Last hw error cause */
+#define SEQSTAT_HWERRCAUSE MK_BMSK_(SEQSTAT_HWERRCAUSE0_P ) | \
+ MK_BMSK_(SEQSTAT_HWERRCAUSE1_P ) | \
+ MK_BMSK_(SEQSTAT_HWERRCAUSE2_P ) | \
+ MK_BMSK_(SEQSTAT_HWERRCAUSE3_P ) | \
+ MK_BMSK_(SEQSTAT_HWERRCAUSE4_P ) | \
+ 0
+
+/*
+ * SYSCFG register
+ */
+
+/* ** Bit Positions */
+#define SYSCFG_SSSTEP_P 0x00000000 /* Supervisor single step, when set it forces an exception for each instruction executed */
+#define SYSCFG_CCEN_P 0x00000001 /* Enable cycle counter (=1) */
+#define SYSCFG_SNEN_P 0x00000002 /* Self nesting Interrupt Enable */
+
+/* ** Masks */
+#define SYSCFG_SSSTEP MK_BMSK_(SYSCFG_SSSTEP_P) /* Supervisor single step, when set it forces an exception for each instruction executed */
+#define SYSCFG_CCEN MK_BMSK_(SYSCFG_CCEN_P) /* Enable cycle counter (=1) */
+#define SYSCFG_SNEN MK_BMSK_(SYSCFG_SNEN_P /* Self Nesting Interrupt Enable */
+
+/* Backward-compatibility for typos in prior releases */
+#define SYSCFG_SSSSTEP SYSCFG_SSSTEP
+#define SYSCFG_CCCEN SYSCFG_CCEN
+
+/*
+ * Core MMR Register Map
+ */
+
+/* Data Cache & SRAM Memory (0xFFE00000 - 0xFFE00404) */
+#define SRAM_BASE_ADDRESS 0xFFE00000 /* SRAM Base Address Register */
+#define DMEM_CONTROL 0xFFE00004 /* Data memory control */
+#define DCPLB_STATUS 0xFFE00008 /* Data Cache Programmable Look-Aside Buffer Status */
+#define DCPLB_FAULT_STATUS 0xFFE00008 /* "" (older define) */
+#define DCPLB_FAULT_ADDR 0xFFE0000C /* Data Cache Programmable Look-Aside Buffer Fault Address */
+#define DCPLB_ADDR0 0xFFE00100 /* Data Cache Protection Lookaside Buffer 0 */
+#define DCPLB_ADDR1 0xFFE00104 /* Data Cache Protection Lookaside Buffer 1 */
+#define DCPLB_ADDR2 0xFFE00108 /* Data Cache Protection Lookaside Buffer 2 */
+#define DCPLB_ADDR3 0xFFE0010C /* Data Cacheability Protection Lookaside Buffer 3 */
+#define DCPLB_ADDR4 0xFFE00110 /* Data Cacheability Protection Lookaside Buffer 4 */
+#define DCPLB_ADDR5 0xFFE00114 /* Data Cacheability Protection Lookaside Buffer 5 */
+#define DCPLB_ADDR6 0xFFE00118 /* Data Cacheability Protection Lookaside Buffer 6 */
+#define DCPLB_ADDR7 0xFFE0011C /* Data Cacheability Protection Lookaside Buffer 7 */
+#define DCPLB_ADDR8 0xFFE00120 /* Data Cacheability Protection Lookaside Buffer 8 */
+#define DCPLB_ADDR9 0xFFE00124 /* Data Cacheability Protection Lookaside Buffer 9 */
+#define DCPLB_ADDR10 0xFFE00128 /* Data Cacheability Protection Lookaside Buffer 10 */
+#define DCPLB_ADDR11 0xFFE0012C /* Data Cacheability Protection Lookaside Buffer 11 */
+#define DCPLB_ADDR12 0xFFE00130 /* Data Cacheability Protection Lookaside Buffer 12 */
+#define DCPLB_ADDR13 0xFFE00134 /* Data Cacheability Protection Lookaside Buffer 13 */
+#define DCPLB_ADDR14 0xFFE00138 /* Data Cacheability Protection Lookaside Buffer 14 */
+#define DCPLB_ADDR15 0xFFE0013C /* Data Cacheability Protection Lookaside Buffer 15 */
+#define DCPLB_DATA0 0xFFE00200 /* Data Cache 0 Status */
+#define DCPLB_DATA1 0xFFE00204 /* Data Cache 1 Status */
+#define DCPLB_DATA2 0xFFE00208 /* Data Cache 2 Status */
+#define DCPLB_DATA3 0xFFE0020C /* Data Cache 3 Status */
+#define DCPLB_DATA4 0xFFE00210 /* Data Cache 4 Status */
+#define DCPLB_DATA5 0xFFE00214 /* Data Cache 5 Status */
+#define DCPLB_DATA6 0xFFE00218 /* Data Cache 6 Status */
+#define DCPLB_DATA7 0xFFE0021C /* Data Cache 7 Status */
+#define DCPLB_DATA8 0xFFE00220 /* Data Cache 8 Status */
+#define DCPLB_DATA9 0xFFE00224 /* Data Cache 9 Status */
+#define DCPLB_DATA10 0xFFE00228 /* Data Cache 10 Status */
+#define DCPLB_DATA11 0xFFE0022C /* Data Cache 11 Status */
+#define DCPLB_DATA12 0xFFE00230 /* Data Cache 12 Status */
+#define DCPLB_DATA13 0xFFE00234 /* Data Cache 13 Status */
+#define DCPLB_DATA14 0xFFE00238 /* Data Cache 14 Status */
+#define DCPLB_DATA15 0xFFE0023C /* Data Cache 15 Status */
+#define DTEST_COMMAND 0xFFE00300 /* Data Test Command Register */
+#define DTEST_DATA0 0xFFE00400 /* Data Test Data Register */
+#define DTEST_DATA1 0xFFE00404 /* Data Test Data Register */
+
+/* Instruction Cache & SRAM Memory (0xFFE01004 - 0xFFE01404) */
+#define IMEM_CONTROL 0xFFE01004 /* Instruction Memory Control */
+#define ICPLB_STATUS 0xFFE01008 /* Instruction Cache miss status */
+#define CODE_FAULT_STATUS 0xFFE01008 /* "" (older define) */
+#define ICPLB_FAULT_ADDR 0xFFE0100C /* Instruction Cache miss address */
+#define CODE_FAULT_ADDR 0xFFE0100C /* "" (older define) */
+#define ICPLB_ADDR0 0xFFE01100 /* Instruction Cacheability Protection Lookaside Buffer 0 */
+#define ICPLB_ADDR1 0xFFE01104 /* Instruction Cacheability Protection Lookaside Buffer 1 */
+#define ICPLB_ADDR2 0xFFE01108 /* Instruction Cacheability Protection Lookaside Buffer 2 */
+#define ICPLB_ADDR3 0xFFE0110C /* Instruction Cacheability Protection Lookaside Buffer 3 */
+#define ICPLB_ADDR4 0xFFE01110 /* Instruction Cacheability Protection Lookaside Buffer 4 */
+#define ICPLB_ADDR5 0xFFE01114 /* Instruction Cacheability Protection Lookaside Buffer 5 */
+#define ICPLB_ADDR6 0xFFE01118 /* Instruction Cacheability Protection Lookaside Buffer 6 */
+#define ICPLB_ADDR7 0xFFE0111C /* Instruction Cacheability Protection Lookaside Buffer 7 */
+#define ICPLB_ADDR8 0xFFE01120 /* Instruction Cacheability Protection Lookaside Buffer 8 */
+#define ICPLB_ADDR9 0xFFE01124 /* Instruction Cacheability Protection Lookaside Buffer 9 */
+#define ICPLB_ADDR10 0xFFE01128 /* Instruction Cacheability Protection Lookaside Buffer 10 */
+#define ICPLB_ADDR11 0xFFE0112C /* Instruction Cacheability Protection Lookaside Buffer 11 */
+#define ICPLB_ADDR12 0xFFE01130 /* Instruction Cacheability Protection Lookaside Buffer 12 */
+#define ICPLB_ADDR13 0xFFE01134 /* Instruction Cacheability Protection Lookaside Buffer 13 */
+#define ICPLB_ADDR14 0xFFE01138 /* Instruction Cacheability Protection Lookaside Buffer 14 */
+#define ICPLB_ADDR15 0xFFE0113C /* Instruction Cacheability Protection Lookaside Buffer 15 */
+#define ICPLB_DATA0 0xFFE01200 /* Instruction Cache 0 Status */
+#define ICPLB_DATA1 0xFFE01204 /* Instruction Cache 1 Status */
+#define ICPLB_DATA2 0xFFE01208 /* Instruction Cache 2 Status */
+#define ICPLB_DATA3 0xFFE0120C /* Instruction Cache 3 Status */
+#define ICPLB_DATA4 0xFFE01210 /* Instruction Cache 4 Status */
+#define ICPLB_DATA5 0xFFE01214 /* Instruction Cache 5 Status */
+#define ICPLB_DATA6 0xFFE01218 /* Instruction Cache 6 Status */
+#define ICPLB_DATA7 0xFFE0121C /* Instruction Cache 7 Status */
+#define ICPLB_DATA8 0xFFE01220 /* Instruction Cache 8 Status */
+#define ICPLB_DATA9 0xFFE01224 /* Instruction Cache 9 Status */
+#define ICPLB_DATA10 0xFFE01228 /* Instruction Cache 10 Status */
+#define ICPLB_DATA11 0xFFE0122C /* Instruction Cache 11 Status */
+#define ICPLB_DATA12 0xFFE01230 /* Instruction Cache 12 Status */
+#define ICPLB_DATA13 0xFFE01234 /* Instruction Cache 13 Status */
+#define ICPLB_DATA14 0xFFE01238 /* Instruction Cache 14 Status */
+#define ICPLB_DATA15 0xFFE0123C /* Instruction Cache 15 Status */
+#define ITEST_COMMAND 0xFFE01300 /* Instruction Test Command Register */
+#define ITEST_DATA0 0xFFE01400 /* Instruction Test Data Register */
+#define ITEST_DATA1 0xFFE01404 /* Instruction Test Data Register */
+
+/* Event/Interrupt Controller Registers (0xFFE02000 - 0xFFE02110) */
+#define EVT0 0xFFE02000 /* Event Vector 0 ESR Address */
+#define EVT1 0xFFE02004 /* Event Vector 1 ESR Address */
+#define EVT2 0xFFE02008 /* Event Vector 2 ESR Address */
+#define EVT3 0xFFE0200C /* Event Vector 3 ESR Address */
+#define EVT4 0xFFE02010 /* Event Vector 4 ESR Address */
+#define EVT5 0xFFE02014 /* Event Vector 5 ESR Address */
+#define EVT6 0xFFE02018 /* Event Vector 6 ESR Address */
+#define EVT7 0xFFE0201C /* Event Vector 7 ESR Address */
+#define EVT8 0xFFE02020 /* Event Vector 8 ESR Address */
+#define EVT9 0xFFE02024 /* Event Vector 9 ESR Address */
+#define EVT10 0xFFE02028 /* Event Vector 10 ESR Address */
+#define EVT11 0xFFE0202C /* Event Vector 11 ESR Address */
+#define EVT12 0xFFE02030 /* Event Vector 12 ESR Address */
+#define EVT13 0xFFE02034 /* Event Vector 13 ESR Address */
+#define EVT14 0xFFE02038 /* Event Vector 14 ESR Address */
+#define EVT15 0xFFE0203C /* Event Vector 15 ESR Address */
+#define IMASK 0xFFE02104 /* Interrupt Mask Register */
+#define IPEND 0xFFE02108 /* Interrupt Pending Register */
+#define ILAT 0xFFE0210C /* Interrupt Latch Register */
+#define IPRIO 0xFFE02110 /* Core Interrupt Priority Register */
+
+/* Core Timer Registers (0xFFE03000 - 0xFFE0300C) */
+#define TCNTL 0xFFE03000 /* Core Timer Control Register */
+#define TPERIOD 0xFFE03004 /* Core Timer Period Register */
+#define TSCALE 0xFFE03008 /* Core Timer Scale Register */
+#define TCOUNT 0xFFE0300C /* Core Timer Count Register */
+
+/* Debug/MP/Emulation Registers (0xFFE05000 - 0xFFE05008) */
+#define DSPID 0xFFE05000 /* DSP Processor ID Register for MP implementations */
+#define DBGSTAT 0xFFE05008 /* Debug Status Register */
+
+/* Trace Buffer Registers (0xFFE06000 - 0xFFE06100) */
+#define TBUFCTL 0xFFE06000 /* Trace Buffer Control Register */
+#define TBUFSTAT 0xFFE06004 /* Trace Buffer Status Register */
+#define TBUF 0xFFE06100 /* Trace Buffer */
+
+/* Watchpoint Control Registers (0xFFE07000 - 0xFFE07200) */
+#define WPIACTL 0xFFE07000 /* Watchpoint Instruction Address Control Register */
+#define WPIA0 0xFFE07040 /* Watchpoint Instruction Address Register 0 */
+#define WPIA1 0xFFE07044 /* Watchpoint Instruction Address Register 1 */
+#define WPIA2 0xFFE07048 /* Watchpoint Instruction Address Register 2 */
+#define WPIA3 0xFFE0704C /* Watchpoint Instruction Address Register 3 */
+#define WPIA4 0xFFE07050 /* Watchpoint Instruction Address Register 4 */
+#define WPIA5 0xFFE07054 /* Watchpoint Instruction Address Register 5 */
+#define WPIACNT0 0xFFE07080 /* Watchpoint Instruction Address Count Register 0 */
+#define WPIACNT1 0xFFE07084 /* Watchpoint Instruction Address Count Register 1 */
+#define WPIACNT2 0xFFE07088 /* Watchpoint Instruction Address Count Register 2 */
+#define WPIACNT3 0xFFE0708C /* Watchpoint Instruction Address Count Register 3 */
+#define WPIACNT4 0xFFE07090 /* Watchpoint Instruction Address Count Register 4 */
+#define WPIACNT5 0xFFE07094 /* Watchpoint Instruction Address Count Register 5 */
+#define WPDACTL 0xFFE07100 /* Watchpoint Data Address Control Register */
+#define WPDA0 0xFFE07140 /* Watchpoint Data Address Register 0 */
+#define WPDA1 0xFFE07144 /* Watchpoint Data Address Register 1 */
+#define WPDACNT0 0xFFE07180 /* Watchpoint Data Address Count Value Register 0 */
+#define WPDACNT1 0xFFE07184 /* Watchpoint Data Address Count Value Register 1 */
+#define WPSTAT 0xFFE07200 /* Watchpoint Status Register */
+
+/* Performance Monitor Registers (0xFFE08000 - 0xFFE08104) */
+#define PFCTL 0xFFE08000 /* Performance Monitor Control Register */
+#define PFCNTR0 0xFFE08100 /* Performance Monitor Counter Register 0 */
+#define PFCNTR1 0xFFE08104 /* Performance Monitor Counter Register 1 */
+
+/*
+ * Core MMR Register Bits
+ */
+
+/*
+ * EVT registers (ILAT, IMASK, and IPEND).
+ */
+
+/* ** Bit Positions */
+#define EVT_EMU_P 0x00000000 /* Emulator interrupt bit position */
+#define EVT_RST_P 0x00000001 /* Reset interrupt bit position */
+#define EVT_NMI_P 0x00000002 /* Non Maskable interrupt bit position */
+#define EVT_EVX_P 0x00000003 /* Exception bit position */
+#define EVT_IRPTEN_P 0x00000004 /* Global interrupt enable bit position */
+#define EVT_IVHW_P 0x00000005 /* Hardware Error interrupt bit position */
+#define EVT_IVTMR_P 0x00000006 /* Timer interrupt bit position */
+#define EVT_IVG7_P 0x00000007 /* IVG7 interrupt bit position */
+#define EVT_IVG8_P 0x00000008 /* IVG8 interrupt bit position */
+#define EVT_IVG9_P 0x00000009 /* IVG9 interrupt bit position */
+#define EVT_IVG10_P 0x0000000a /* IVG10 interrupt bit position */
+#define EVT_IVG11_P 0x0000000b /* IVG11 interrupt bit position */
+#define EVT_IVG12_P 0x0000000c /* IVG12 interrupt bit position */
+#define EVT_IVG13_P 0x0000000d /* IVG13 interrupt bit position */
+#define EVT_IVG14_P 0x0000000e /* IVG14 interrupt bit position */
+#define EVT_IVG15_P 0x0000000f /* IVG15 interrupt bit position */
+
+/* ** Masks */
+#define EVT_EMU MK_BMSK_(EVT_EMU_P ) /* Emulator interrupt mask */
+#define EVT_RST MK_BMSK_(EVT_RST_P ) /* Reset interrupt mask */
+#define EVT_NMI MK_BMSK_(EVT_NMI_P ) /* Non Maskable interrupt mask */
+#define EVT_EVX MK_BMSK_(EVT_EVX_P ) /* Exception mask */
+#define EVT_IRPTEN MK_BMSK_(EVT_IRPTEN_P) /* Global interrupt enable mask */
+#define EVT_IVHW MK_BMSK_(EVT_IVHW_P ) /* Hardware Error interrupt mask */
+#define EVT_IVTMR MK_BMSK_(EVT_IVTMR_P ) /* Timer interrupt mask */
+#define EVT_IVG7 MK_BMSK_(EVT_IVG7_P ) /* IVG7 interrupt mask */
+#define EVT_IVG8 MK_BMSK_(EVT_IVG8_P ) /* IVG8 interrupt mask */
+#define EVT_IVG9 MK_BMSK_(EVT_IVG9_P ) /* IVG9 interrupt mask */
+#define EVT_IVG10 MK_BMSK_(EVT_IVG10_P ) /* IVG10 interrupt mask */
+#define EVT_IVG11 MK_BMSK_(EVT_IVG11_P ) /* IVG11 interrupt mask */
+#define EVT_IVG12 MK_BMSK_(EVT_IVG12_P ) /* IVG12 interrupt mask */
+#define EVT_IVG13 MK_BMSK_(EVT_IVG13_P ) /* IVG13 interrupt mask */
+#define EVT_IVG14 MK_BMSK_(EVT_IVG14_P ) /* IVG14 interrupt mask */
+#define EVT_IVG15 MK_BMSK_(EVT_IVG15_P ) /* IVG15 interrupt mask */
+
+/*
+ * DMEM_CONTROL Register
+ */
+
+/* ** Bit Positions */
+#define ENDM_P 0x00 /* (doesn't really exist) Enable Data Memory L1 */
+#define DMCTL_ENDM_P 0x00 /* "" (older define) */
+#define DMC0_P 0x01 /* Data Memory Configuration, 00 - A SRAM, B SRAM */
+#define DMCTL_DMC0_P 0x01 /* "" (older define) */
+#define DMC1_P 0x02 /* Data Memory Configuration, 10 - A SRAM, B SRAM */
+#define DMCTL_DMC1_P 0x02 /* "" (older define) */
+#define DMC2_P 0x03 /* Data Memory Configuration, 11 - A CACHE, B CACHE */
+#define DMCTL_DMC2_P 0x03 /* "" (older define) */
+#define DCBS_P 0x04 /* L1 Data Cache Bank Select */
+#define PORT_PREF0_P 0x12 /* DAG0 Port Preference */
+#define PORT_PREF1_P 0x13 /* DAG1 Port Preference */
+
+/* ** Masks */
+#define ENDM 0x00000001 /* (doesn't really exist) Enable Data Memory L1 */
+#define ENDCPLB 0x00000002 /* Enable DCPLB */
+#define ASRAM_BSRAM 0x00000000
+#define ACACHE_BSRAM 0x00000008
+#define ACACHE_BCACHE 0x0000000C
+#define DCBS 0x00000010 /* L1 Data Cache Bank Select */
+#define PORT_PREF0 0x00001000 /* DAG0 Port Preference */
+#define PORT_PREF1 0x00002000 /* DAG1 Port Preference */
+
+/* IMEM_CONTROL Register */
+/* ** Bit Positions */
+#define ENIM_P 0x00 /* Enable L1 Code Memory */
+#define IMCTL_ENIM_P 0x00 /* "" (older define) */
+#define ENICPLB_P 0x01 /* Enable ICPLB */
+#define IMCTL_ENICPLB_P 0x01 /* "" (older define) */
+#define IMC_P 0x02 /* Enable */
+#define IMCTL_IMC_P 0x02 /* Configure L1 code memory as cache (0=SRAM) */
+#define ILOC0_P 0x03 /* Lock Way 0 */
+#define ILOC1_P 0x04 /* Lock Way 1 */
+#define ILOC2_P 0x05 /* Lock Way 2 */
+#define ILOC3_P 0x06 /* Lock Way 3 */
+#define LRUPRIORST_P 0x0D /* Least Recently Used Replacement Priority */
+
+/* ** Masks */
+#define ENIM 0x00000001 /* Enable L1 Code Memory */
+#define ENICPLB 0x00000002 /* Enable ICPLB */
+#define IMC 0x00000004 /* Configure L1 code memory as cache (0=SRAM) */
+#define ILOC0 0x00000008 /* Lock Way 0 */
+#define ILOC1 0x00000010 /* Lock Way 1 */
+#define ILOC2 0x00000020 /* Lock Way 2 */
+#define ILOC3 0x00000040 /* Lock Way 3 */
+#define LRUPRIORST 0x00002000 /* Least Recently Used Replacement Priority */
+
+/* TCNTL Masks */
+#define TMPWR 0x00000001 /* Timer Low Power Control, 0=low power mode, 1=active state */
+#define TMREN 0x00000002 /* Timer enable, 0=disable, 1=enable */
+#define TAUTORLD 0x00000004 /* Timer auto reload */
+#define TINT 0x00000008 /* Timer generated interrupt 0=no interrupt has been generated, 1=interrupt has been generated (sticky) */
+
+/* TCNTL Bit Positions */
+#define TMPWR_P 0x00000000 /* Timer Low Power Control, 0=low power mode, 1=active state */
+#define TMREN_P 0x00000001 /* Timer enable, 0=disable, 1=enable */
+#define TAUTORLD_P 0x00000002 /* Timer auto reload */
+#define TINT_P 0x00000003 /* Timer generated interrupt 0=no interrupt has been generated, 1=interrupt has been generated (sticky) */
+
+/* DCPLB_DATA and ICPLB_DATA Registers */
+/* ** Bit Positions */
+#define CPLB_VALID_P 0x00000000 /* 0=invalid entry, 1=valid entry */
+#define CPLB_LOCK_P 0x00000001 /* 0=entry may be replaced, 1=entry locked */
+#define CPLB_USER_RD_P 0x00000002 /* 0=no read access, 1=read access allowed (user mode) */
+
+/* ** Masks */
+#define CPLB_VALID 0x00000001 /* 0=invalid entry, 1=valid entry */
+#define CPLB_LOCK 0x00000002 /* 0=entry may be replaced, 1=entry locked */
+#define CPLB_USER_RD 0x00000004 /* 0=no read access, 1=read access allowed (user mode) */
+#define PAGE_SIZE_1KB 0x00000000 /* 1 KB page size */
+#define PAGE_SIZE_4KB 0x00010000 /* 4 KB page size */
+#define PAGE_SIZE_1MB 0x00020000 /* 1 MB page size */
+#define PAGE_SIZE_4MB 0x00030000 /* 4 MB page size */
+#define CPLB_L1SRAM 0x00000020 /* 0=SRAM mapped in L1, 0=SRAM not mapped to L1 */
+#define CPLB_PORTPRIO 0x00000200 /* 0=low priority port, 1= high priority port */
+#define CPLB_L1_CHBL 0x00001000 /* 0=non-cacheable in L1, 1=cacheable in L1 */
+
+/* ICPLB_DATA only */
+#define CPLB_LRUPRIO 0x00000100 /* 0=can be replaced by any line, 1=priority for non-replacement */
+
+/* DCPLB_DATA only */
+#define CPLB_USER_WR 0x00000008 /* 0=no write access, 0=write access allowed (user mode) */
+#define CPLB_SUPV_WR 0x00000010 /* 0=no write access, 0=write access allowed (supervisor mode) */
+#define CPLB_DIRTY 0x00000080 /* 1=dirty, 0=clean */
+#define CPLB_L1_AOW 0x00008000 /* 0=do not allocate cache lines on write-through writes */
+ /* 1= allocate cache lines on write-through writes. */
+#define CPLB_WT 0x00004000 /* 0=write-back, 1=write-through */
+
+/* ITEST_COMMAND and DTEST_COMMAND Registers */
+/* ** Masks */
+#define TEST_READ 0x00000000 /* Read Access */
+#define TEST_WRITE 0x00000002 /* Write Access */
+#define TEST_TAG 0x00000000 /* Access TAG */
+#define TEST_DATA 0x00000004 /* Access DATA */
+#define TEST_DW0 0x00000000 /* Select Double Word 0 */
+#define TEST_DW1 0x00000008 /* Select Double Word 1 */
+#define TEST_DW2 0x00000010 /* Select Double Word 2 */
+#define TEST_DW3 0x00000018 /* Select Double Word 3 */
+#define TEST_MB0 0x00000000 /* Select Mini-Bank 0 */
+#define TEST_MB1 0x00010000 /* Select Mini-Bank 1 */
+#define TEST_MB2 0x00020000 /* Select Mini-Bank 2 */
+#define TEST_MB3 0x00030000 /* Select Mini-Bank 3 */
+#define TEST_SET(x) ((x << 5) & 0x03E0) /* Set Index 0->31 */
+#define TEST_WAY0 0x00000000 /* Access Way0 */
+#define TEST_WAY1 0x04000000 /* Access Way1 */
+
+/* ** ITEST_COMMAND only */
+#define TEST_WAY2 0x08000000 /* Access Way2 */
+#define TEST_WAY3 0x0C000000 /* Access Way3 */
+
+/* ** DTEST_COMMAND only */
+#define TEST_BNKSELA 0x00000000 /* Access SuperBank A */
+#define TEST_BNKSELB 0x00800000 /* Access SuperBank B */
+
+#endif /* _DEF_LPBLACKFIN_H */
diff --git a/include/asm-blackfin/current.h b/include/asm-blackfin/current.h
new file mode 100644
index 0000000000..108c2792a0
--- /dev/null
+++ b/include/asm-blackfin/current.h
@@ -0,0 +1,40 @@
+/*
+ * U-boot - current.h
+ *
+ * Copyright (c) 2005 blackfin.uclinux.org
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _BLACKFIN_CURRENT_H
+#define _BLACKFIN_CURRENT_H
+/*
+ * current.h
+ * (C) Copyright 2000, Lineo, David McCullough <davidm@lineo.com>
+ *
+ * rather than dedicate a register (as the m68k source does), we
+ * just keep a global, we should probably just change it all to be
+ * current and lose _current_task.
+ */
+
+extern struct task_struct *_current_task;
+#define get_current() _current_task
+#define current _current_task
+
+#endif
diff --git a/include/asm-blackfin/delay.h b/include/asm-blackfin/delay.h
new file mode 100644
index 0000000000..dbb73887ef
--- /dev/null
+++ b/include/asm-blackfin/delay.h
@@ -0,0 +1,55 @@
+/*
+ * U-boot - delay.h Routines for introducing delays
+ *
+ * Copyright (c) 2005 blackfin.uclinux.org
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _BLACKFIN_DELAY_H
+#define _BLACKFIN_DELAY_H
+
+/*
+ * Changes made by akbar.hussain@Lineo.com, for BLACKFIN
+ * Copyright (C) 1994 Hamish Macdonald
+ *
+ * Delay routines, using a pre-computed "loops_per_second" value.
+ */
+
+extern __inline__ void __delay(unsigned long loops)
+{
+ __asm__ __volatile__("1:\t%0 += -1;\n\t"
+ "cc = %0 == 0;\n\t"
+ "if ! cc jump 1b;\n":"=d"(loops)
+ :"0"(loops));
+}
+
+/*
+ * Use only for very small delays ( < 1 msec). Should probably use a
+ * lookup table, really, as the multiplications take much too long with
+ * short delays. This is a "reasonable" implementation, though (and the
+ * first constant multiplications gets optimized away if the delay is
+ * a constant)
+ */
+extern __inline__ void udelay(unsigned long usecs)
+{
+ __delay(usecs);
+}
+
+#endif
diff --git a/include/asm-blackfin/entry.h b/include/asm-blackfin/entry.h
new file mode 100644
index 0000000000..607a5b8e98
--- /dev/null
+++ b/include/asm-blackfin/entry.h
@@ -0,0 +1,385 @@
+/*
+ * U-boot - entry.h Routines for context saving and restoring
+ *
+ * Copyright (c) 2005 blackfin.uclinux.org
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __BLACKFIN_ENTRY_H
+#define __BLACKFIN_ENTRY_H
+
+#include <linux/config.h>
+#include <asm/setup.h>
+#include <asm/page.h>
+
+/*
+ * Stack layout in 'ret_from_exception':
+ *
+ */
+
+/*
+ * Register %p2 is now set to the current task throughout
+ * the whole kernel.
+ */
+
+#ifdef __ASSEMBLY__
+
+#define LFLUSH_I_AND_D 0x00000808
+#define LSIGTRAP 5
+
+/* process bits for task_struct.flags */
+#define PF_TRACESYS_OFF 3
+#define PF_TRACESYS_BIT 5
+#define PF_PTRACED_OFF 3
+#define PF_PTRACED_BIT 4
+#define PF_DTRACE_OFF 1
+#define PF_DTRACE_BIT 5
+
+#define NEW_PT_REGS
+
+#if defined(NEW_PT_REGS)
+
+#define SAVE_ALL_INT save_context_no_interrupts
+#define SAVE_ALL_SYS save_context_no_interrupts
+#define SAVE_CONTEXT save_context_with_interrupts
+
+#define RESTORE_ALL restore_context_no_interrupts
+#define RESTORE_ALL_SYS restore_context_no_interrupts
+#define RESTORE_CONTEXT restore_context_with_interrupts
+
+#else
+
+#define SAVE_ALL_INT save_all_int
+#define SAVE_ALL_SYS save_all_sys
+#define SAVE_CONTEXT save_context
+#define RESTORE_ALL restore_context
+#define RESTORE_CONTEXT restore_context
+
+#endif
+
+/*
+ * Code to save processor context.
+ * We even save the register which are preserved by a function call
+ * - r4, r5, r6, r7, p3, p4, p5
+ */
+.macro save_context_with_interrupts
+ [--sp] = R0;
+ [--sp] = ( R7:0, P5:0 );
+ [--sp] = fp;
+ [--sp] = usp;
+
+ [--sp] = i0;
+ [--sp] = i1;
+ [--sp] = i2;
+ [--sp] = i3;
+
+ [--sp] = m0;
+ [--sp] = m1;
+ [--sp] = m2;
+ [--sp] = m3;
+
+ [--sp] = l0;
+ [--sp] = l1;
+ [--sp] = l2;
+ [--sp] = l3;
+
+ [--sp] = b0;
+ [--sp] = b1;
+ [--sp] = b2;
+ [--sp] = b3;
+ [--sp] = a0.x;
+ [--sp] = a0.w;
+ [--sp] = a1.x;
+ [--sp] = a1.w;
+
+ [--sp] = LC0;
+ [--sp] = LC1;
+ [--sp] = LT0;
+ [--sp] = LT1;
+ [--sp] = LB0;
+ [--sp] = LB1;
+
+ [--sp] = ASTAT;
+
+ [--sp] = r0; /* Skip reserved */
+ [--sp] = RETS;
+ [--sp] = RETI;
+ [--sp] = RETX;
+ [--sp] = RETN;
+ [--sp] = RETE;
+ [--sp] = SEQSTAT;
+ [--sp] = SYSCFG;
+ [--sp] = r0; /* Skip IPEND as well. */
+.endm
+
+.macro save_context_no_interrupts
+ [--sp] = R0;
+ [--sp] = ( R7:0, P5:0 );
+ [--sp] = fp;
+ [--sp] = usp;
+
+ [--sp] = i0;
+ [--sp] = i1;
+ [--sp] = i2;
+ [--sp] = i3;
+
+ [--sp] = m0;
+ [--sp] = m1;
+ [--sp] = m2;
+ [--sp] = m3;
+
+ [--sp] = l0;
+ [--sp] = l1;
+ [--sp] = l2;
+ [--sp] = l3;
+
+ [--sp] = b0;
+ [--sp] = b1;
+ [--sp] = b2;
+ [--sp] = b3;
+ [--sp] = a0.x;
+ [--sp] = a0.w;
+ [--sp] = a1.x;
+ [--sp] = a1.w;
+
+ [--sp] = LC0;
+ [--sp] = LC1;
+ [--sp] = LT0;
+ [--sp] = LT1;
+ [--sp] = LB0;
+ [--sp] = LB1;
+
+ [--sp] = ASTAT;
+
+ [--sp] = r0; /* Skip reserved */
+ [--sp] = RETS;
+ r0 = RETI;
+ [--sp] = r0;
+ [--sp] = RETX;
+ [--sp] = RETN;
+ [--sp] = RETE;
+ [--sp] = SEQSTAT;
+ [--sp] = SYSCFG;
+ [--sp] = r0; /* Skip IPEND as well. */
+.endm
+
+.macro restore_context_no_interrupts
+ sp += 4;
+ SYSCFG = [sp++];
+ SEQSTAT = [sp++];
+ RETE = [sp++];
+ RETN = [sp++];
+ RETX = [sp++];
+ r0 = [sp++];
+ RETI = r0;
+ RETS = [sp++];
+
+ sp += 4;
+
+ ASTAT = [sp++];
+
+ LB1 = [sp++];
+ LB0 = [sp++];
+ LT1 = [sp++];
+ LT0 = [sp++];
+ LC1 = [sp++];
+ LC0 = [sp++];
+
+ a1.w = [sp++];
+ a1.x = [sp++];
+ a0.w = [sp++];
+ a0.x = [sp++];
+ b3 = [sp++];
+ b2 = [sp++];
+ b1 = [sp++];
+ b0 = [sp++];
+
+ l3 = [sp++];
+ l2 = [sp++];
+ l1 = [sp++];
+ l0 = [sp++];
+
+ m3 = [sp++];
+ m2 = [sp++];
+ m1 = [sp++];
+ m0 = [sp++];
+
+ i3 = [sp++];
+ i2 = [sp++];
+ i1 = [sp++];
+ i0 = [sp++];
+
+ sp += 4;
+ fp = [sp++];
+
+ ( R7 : 0, P5 : 0) = [ SP ++ ];
+ sp += 4;
+.endm
+
+.macro restore_context_with_interrupts
+ sp += 4;
+ SYSCFG = [sp++];
+ SEQSTAT = [sp++];
+ RETE = [sp++];
+ RETN = [sp++];
+ RETX = [sp++];
+ RETI = [sp++];
+ RETS = [sp++];
+
+ sp += 4;
+
+ ASTAT = [sp++];
+
+ LB1 = [sp++];
+ LB0 = [sp++];
+ LT1 = [sp++];
+ LT0 = [sp++];
+ LC1 = [sp++];
+ LC0 = [sp++];
+
+ a1.w = [sp++];
+ a1.x = [sp++];
+ a0.w = [sp++];
+ a0.x = [sp++];
+ b3 = [sp++];
+ b2 = [sp++];
+ b1 = [sp++];
+ b0 = [sp++];
+
+ l3 = [sp++];
+ l2 = [sp++];
+ l1 = [sp++];
+ l0 = [sp++];
+
+ m3 = [sp++];
+ m2 = [sp++];
+ m1 = [sp++];
+ m0 = [sp++];
+
+ i3 = [sp++];
+ i2 = [sp++];
+ i1 = [sp++];
+ i0 = [sp++];
+
+ sp += 4;
+ fp = [sp++];
+
+ ( R7 : 0, P5 : 0) = [ SP ++ ];
+ sp += 4;
+.endm
+
+#if !defined(NEW_PT_REGS)
+/*
+ * a -1 in the orig_r0 field signifies
+ * that the stack frame is NOT for syscall
+ */
+.macro save_all_int
+/* reserved and disable the single step of SYSCFG, by Steven Chen 03/07/10 */
+ [--sp] = r0;
+ r0.l = 0x30; /* Errata for BF533 */
+ r0.h = 0x0;
+ syscfg = r0; /* disable single step flag in SYSCFG */
+ r0 = [sp++];
+ [--sp] = syscfg; /* store SYSCFG */
+
+ [--sp] = r0; /* Reserved for IPEND */
+ [--sp] = fp;
+ [--sp] = usp;
+ [--sp] = r0;
+
+ [--sp] = r0;
+ r0 = [sp + 8];
+ [--sp] = a0.x;
+ [--sp] = a1.x;
+ [--sp] = a0.w;
+ [--sp] = a1.w;
+ [--sp] = rets;
+ [--sp] = astat;
+ [--sp] = seqstat;
+ [--sp] = retx; /* current pc when exception happens */
+ [--sp] = ( r7:5, p5:0 );
+ [--sp] = r1;
+ [--sp] = r2;
+ [--sp] = r4;
+ [--sp] = r3;
+.endm
+
+.macro save_all_sys
+ [--sp] = r0;
+ [--sp] = r0;
+ [--sp] = a0.x;
+ [--sp] = a1.x;
+ [--sp] = a0.w;
+ [--sp] = a1.w;
+ [--sp] = rets;
+ [--sp] = astat;
+ [--sp] = seqstat;
+ [--sp] = retx; /* current pc when exception happens */
+ [--sp] = ( r7:5, p5:0 );
+ [--sp] = r1;
+ [--sp] = r2;
+ [--sp] = r4;
+ [--sp] = r3;
+.endm
+
+.macro restore_all
+ r3 = [sp++];
+ r4 = [sp++];
+ r2 = [sp++];
+ r1 = [sp++];
+ ( r7:5, p5:0 ) = [sp++];
+ retx = [sp++];
+ seqstat = [sp++];
+ astat = [sp++];
+ rets = [sp++];
+ a1.w = [sp++];
+ a0.w = [sp++];
+ a1.x = [sp++];
+ a0.x = [sp++];
+ sp += 4; /* orig r0 */
+ r0 = [sp++];
+
+ sp += 4;
+ fp = [sp++];
+ sp +=4; /* Skip the IPEND */
+
+ syscfg = [sp++];
+
+.endm
+
+#endif
+
+#define STR(X) STR1(X)
+#define STR1(X) #X
+
+#if defined(NEW_PT_REGS)
+
+#define PT_OFF_ORIG_R0 208
+#define PT_OFF_SR 8
+
+#else
+
+#define PT_OFF_ORIG_R0 0x54
+#define PT_OFF_SR 0x38 /* seqstat in pt_regs */
+
+#endif
+#endif
+
+#endif
diff --git a/include/asm-blackfin/errno.h b/include/asm-blackfin/errno.h
new file mode 100644
index 0000000000..713bba0b22
--- /dev/null
+++ b/include/asm-blackfin/errno.h
@@ -0,0 +1,156 @@
+/*
+ * U-boot - errno.h Error number defines
+ *
+ * Copyright (c) 2005 blackfin.uclinux.org
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _BLACKFIN_ERRNO_H
+#define _BLACKFIN_ERRNO_H
+
+#define EPERM 1 /* Operation not permitted */
+#define ENOENT 2 /* No such file or directory */
+#define ESRCH 3 /* No such process */
+#define EINTR 4 /* Interrupted system call */
+#define EIO 5 /* I/O error */
+#define ENXIO 6 /* No such device or address */
+#define E2BIG 7 /* Arg list too long */
+#define ENOEXEC 8 /* Exec format error */
+#define EBADF 9 /* Bad file number */
+#define ECHILD 10 /* No child processes */
+#define EAGAIN 11 /* Try again */
+#define ENOMEM 12 /* Out of memory */
+#define EACCES 13 /* Permission denied */
+#define EFAULT 14 /* Bad address */
+#define ENOTBLK 15 /* Block device required */
+#define EBUSY 16 /* Device or resource busy */
+#define EEXIST 17 /* File exists */
+#define EXDEV 18 /* Cross-device link */
+#define ENODEV 19 /* No such device */
+#define ENOTDIR 20 /* Not a directory */
+#define EISDIR 21 /* Is a directory */
+#define EINVAL 22 /* Invalid argument */
+#define ENFILE 23 /* File table overflow */
+#define EMFILE 24 /* Too many open files */
+#define ENOTTY 25 /* Not a typewriter */
+#define ETXTBSY 26 /* Text file busy */
+#define EFBIG 27 /* File too large */
+#define ENOSPC 28 /* No space left on device */
+#define ESPIPE 29 /* Illegal seek */
+#define EROFS 30 /* Read-only file system */
+#define EMLINK 31 /* Too many links */
+#define EPIPE 32 /* Broken pipe */
+#define EDOM 33 /* Math argument out of domain of func */
+#define ERANGE 34 /* Math result not representable */
+#define EDEADLK 35 /* Resource deadlock would occur */
+#define ENAMETOOLONG 36 /* File name too long */
+#define ENOLCK 37 /* No record locks available */
+#define ENOSYS 38 /* Function not implemented */
+#define ENOTEMPTY 39 /* Directory not empty */
+#define ELOOP 40 /* Too many symbolic links encountered */
+#define EWOULDBLOCK EAGAIN /* Operation would block */
+#define ENOMSG 42 /* No message of desired type */
+#define EIDRM 43 /* Identifier removed */
+#define ECHRNG 44 /* Channel number out of range */
+#define EL2NSYNC 45 /* Level 2 not synchronized */
+#define EL3HLT 46 /* Level 3 halted */
+#define EL3RST 47 /* Level 3 reset */
+#define ELNRNG 48 /* Link number out of range */
+#define EUNATCH 49 /* Protocol driver not attached */
+#define ENOCSI 50 /* No CSI structure available */
+#define EL2HLT 51 /* Level 2 halted */
+#define EBADE 52 /* Invalid exchange */
+#define EBADR 53 /* Invalid request descriptor */
+#define EXFULL 54 /* Exchange full */
+#define ENOANO 55 /* No anode */
+#define EBADRQC 56 /* Invalid request code */
+#define EBADSLT 57 /* Invalid slot */
+
+#define EDEADLOCK EDEADLK
+
+#define EBFONT 59 /* Bad font file format */
+#define ENOSTR 60 /* Device not a stream */
+#define ENODATA 61 /* No data available */
+#define ETIME 62 /* Timer expired */
+#define ENOSR 63 /* Out of streams resources */
+#define ENONET 64 /* Machine is not on the network */
+#define ENOPKG 65 /* Package not installed */
+#define EREMOTE 66 /* Object is remote */
+#define ENOLINK 67 /* Link has been severed */
+#define EADV 68 /* Advertise error */
+#define ESRMNT 69 /* Srmount error */
+#define ECOMM 70 /* Communication error on send */
+#define EPROTO 71 /* Protocol error */
+#define EMULTIHOP 72 /* Multihop attempted */
+#define EDOTDOT 73 /* RFS specific error */
+#define EBADMSG 74 /* Not a data message */
+#define EOVERFLOW 75 /* Value too large for defined data type */
+#define ENOTUNIQ 76 /* Name not unique on network */
+#define EBADFD 77 /* File descriptor in bad state */
+#define EREMCHG 78 /* Remote address changed */
+#define ELIBACC 79 /* Can not access a needed shared library */
+#define ELIBBAD 80 /* Accessing a corrupted shared library */
+#define ELIBSCN 81 /* .lib section in a.out corrupted */
+#define ELIBMAX 82 /* Attempting to link in too many shared libraries */
+#define ELIBEXEC 83 /* Cannot exec a shared library directly */
+#define EILSEQ 84 /* Illegal byte sequence */
+#define ERESTART 85 /* Interrupted system call should be restarted */
+#define ESTRPIPE 86 /* Streams pipe error */
+#define EUSERS 87 /* Too many users */
+#define ENOTSOCK 88 /* Socket operation on non-socket */
+#define EDESTADDRREQ 89 /* Destination address required */
+#define EMSGSIZE 90 /* Message too long */
+#define EPROTOTYPE 91 /* Protocol wrong type for socket */
+#define ENOPROTOOPT 92 /* Protocol not available */
+#define EPROTONOSUPPORT 93 /* Protocol not supported */
+#define ESOCKTNOSUPPORT 94 /* Socket type not supported */
+#define EOPNOTSUPP 95 /* Operation not supported on transport endpoint */
+#define EPFNOSUPPORT 96 /* Protocol family not supported */
+#define EAFNOSUPPORT 97 /* Address family not supported by protocol */
+#define EADDRINUSE 98 /* Address already in use */
+#define EADDRNOTAVAIL 99 /* Cannot assign requested address */
+#define ENETDOWN 100 /* Network is down */
+#define ENETUNREACH 101 /* Network is unreachable */
+#define ENETRESET 102 /* Network dropped connection because of reset */
+#define ECONNABORTED 103 /* Software caused connection abort */
+#define ECONNRESET 104 /* Connection reset by peer */
+#define ENOBUFS 105 /* No buffer space available */
+#define EISCONN 106 /* Transport endpoint is already connected */
+#define ENOTCONN 107 /* Transport endpoint is not connected */
+#define ESHUTDOWN 108 /* Cannot send after transport endpoint shutdown */
+#define ETOOMANYREFS 109 /* Too many references: cannot splice */
+#define ETIMEDOUT 110 /* Connection timed out */
+#define ECONNREFUSED 111 /* Connection refused */
+#define EHOSTDOWN 112 /* Host is down */
+#define EHOSTUNREACH 113 /* No route to host */
+#define EALREADY 114 /* Operation already in progress */
+#define EINPROGRESS 115 /* Operation now in progress */
+#define ESTALE 116 /* Stale NFS file handle */
+#define EUCLEAN 117 /* Structure needs cleaning */
+#define ENOTNAM 118 /* Not a XENIX named type file */
+#define ENAVAIL 119 /* No XENIX semaphores available */
+#define EISNAM 120 /* Is a named type file */
+#define EREMOTEIO 121 /* Remote I/O error */
+#define EDQUOT 122 /* Quota exceeded */
+
+#define ENOMEDIUM 123 /* No medium found */
+#define EMEDIUMTYPE 124 /* Wrong medium type */
+
+#endif
diff --git a/include/asm-blackfin/global_data.h b/include/asm-blackfin/global_data.h
new file mode 100644
index 0000000000..56a12f07b3
--- /dev/null
+++ b/include/asm-blackfin/global_data.h
@@ -0,0 +1,64 @@
+/*
+ * U-boot - global_data.h Declarations for global data of u-boot
+ *
+ * Copyright (c) 2005 blackfin.uclinux.org
+ *
+ * (C) Copyright 2000-2004
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __ASM_GBL_DATA_H
+#define __ASM_GBL_DATA_H
+
+#include <asm/irq.h>
+
+/*
+ * The following data structure is placed in some memory wich is
+ * available very early after boot (like DPRAM on MPC8xx/MPC82xx, or
+ * some locked parts of the data cache) to allow for a minimum set of
+ * global variables during system initialization (until we have set
+ * up the memory controller so that we can use RAM).
+ *
+ * Keep it *SMALL* and remember to set CFG_GBL_DATA_SIZE > sizeof(gd_t)
+ */
+typedef struct global_data {
+ bd_t *bd;
+ unsigned long flags;
+ unsigned long board_type;
+ unsigned long baudrate;
+ unsigned long have_console; /* serial_init() was called */
+ unsigned long ram_size; /* RAM size */
+ unsigned long reloc_off; /* Relocation Offset */
+ unsigned long env_addr; /* Address of Environment struct */
+ unsigned long env_valid; /* Checksum of Environment valid? */
+ void **jt; /* jump table */
+} gd_t;
+
+/*
+ * Global Data Flags
+ */
+#define GD_FLG_RELOC 0x00001 /* Code was relocated to RAM */
+#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
+#define GD_FLG_SILENT 0x00004 /* Silent mode */
+
+#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("P5")
+
+#endif
diff --git a/include/asm-blackfin/hw_irq.h b/include/asm-blackfin/hw_irq.h
new file mode 100644
index 0000000000..1ee050ec14
--- /dev/null
+++ b/include/asm-blackfin/hw_irq.h
@@ -0,0 +1,37 @@
+/*
+ * U-boot - hw_irq.h
+ *
+ * Copyright (c) 2005 blackfin.uclinux.org
+ *
+ * This file is based on
+ * linux/arch/$(ARCH)/platform/$(PLATFORM)/hw_irq.h
+ * BlackFin (ADI) assembler restricted values by Ted Ma <mated@sympatico.ca>
+ * Copyright (c) 2002 Arcturus Networks Inc. (www.arcturusnetworks.com)
+ * Copyright (c) 2002 Lineo, Inc <mattw@lineo.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <linux/config.h>
+#ifdef CONFIG_EZKIT533
+#include <asm/board/bf533_irq.h>
+#endif
+#ifdef CONFIG_STAMP
+#include <asm/board/bf533_irq.h>
+#endif
diff --git a/include/asm-blackfin/io-kernel.h b/include/asm-blackfin/io-kernel.h
new file mode 100644
index 0000000000..0b0572ffa4
--- /dev/null
+++ b/include/asm-blackfin/io-kernel.h
@@ -0,0 +1,135 @@
+/*
+ * U-boot - io-kernel.h
+ *
+ * Copyright (c) 2005 blackfin.uclinux.org
+ *
+ * (C) Copyright 2000-2004
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _BLACKFIN_IO_H
+#define _BLACKFIN_IO_H
+
+#ifdef __KERNEL__
+
+#include <linux/config.h>
+
+/*
+ * These are for ISA/PCI shared memory _only_ and should never be used
+ * on any other type of memory, including Zorro memory. They are meant to
+ * access the bus in the bus byte order which is little-endian!.
+ *
+ * readX/writeX() are used to access memory mapped devices. On some
+ * architectures the memory mapped IO stuff needs to be accessed
+ * differently. On the m68k architecture, we just read/write the
+ * memory location directly.
+ */
+/* ++roman: The assignments to temp. vars avoid that gcc sometimes generates
+ * two accesses to memory, which may be undesireable for some devices.
+ */
+#define readb(addr) ({ unsigned char __v = (*(volatile unsigned char *) (addr));asm("ssync;"); __v; })
+#define readw(addr) ({ unsigned short __v = (*(volatile unsigned short *) (addr)); asm("ssync;");__v; })
+#define readl(addr) ({ unsigned int __v = (*(volatile unsigned int *) (addr));asm("ssync;"); __v; })
+#define writeb(b,addr) (void)((*(volatile unsigned char *) (addr)) = (b))
+#define writew(b,addr) (void)((*(volatile unsigned short *) (addr)) = (b))
+#define writel(b,addr) (void)((*(volatile unsigned int *) (addr)) = (b))
+#define __raw_readb readb
+#define __raw_readw readw
+#define __raw_readl readl
+#define __raw_writeb writeb
+#define __raw_writew writew
+#define __raw_writel writel
+#define memset_io(a,b,c) memset((void *)(a),(b),(c))
+#define memcpy_fromio(a,b,c) memcpy((a),(void *)(b),(c))
+#define memcpy_toio(a,b,c) memcpy((void *)(a),(b),(c))
+#define inb(addr) cf_inb((volatile unsigned char*)(addr))
+#define inw(addr) readw(addr)
+#define inl(addr) readl(addr)
+#define outb(x,addr) cf_outb((unsigned char)(x), (volatile unsigned char*)(addr))
+#define outw(x,addr) ((void) writew(x,addr))
+#define outl(x,addr) ((void) writel(x,addr))
+#define inb_p(addr) inb(addr)
+#define inw_p(addr) inw(addr)
+#define inl_p(addr) inl(addr)
+#define outb_p(x,addr) outb(x,addr)
+#define outw_p(x,addr) outw(x,addr)
+#define outl_p(x,addr) outl(x,addr)
+#define insb(port, addr, count) memcpy((void*)addr, (void*)port, count)
+#define insw(port, addr, count) cf_insw((unsigned short*)addr, (unsigned short*)(port), (count))
+#define insl(port, addr, count) memcpy((void*)addr, (void*)port, (4*count))
+#define outsb(port, addr, count) memcpy((void*)port, (void*)addr, count)
+#define outsw(port,addr,count) cf_outsw((unsigned short*)(port), (unsigned short*)addr, (count))
+#define outsl(port, addr, count) memcpy((void*)port, (void*)addr, (4*count))
+#define IO_SPACE_LIMIT 0xffff
+
+/* Values for nocacheflag and cmode */
+#define IOMAP_FULL_CACHING 0
+#define IOMAP_NOCACHE_SER 1
+#define IOMAP_NOCACHE_NONSER 2
+#define IOMAP_WRITETHROUGH 3
+
+#ifndef __ASSEMBLY__
+extern void *__ioremap(unsigned long physaddr, unsigned long size, int cacheflag);
+extern void __iounmap(void *addr, unsigned long size);
+extern inline void *ioremap(unsigned long physaddr, unsigned long size)
+{
+ return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
+}
+extern inline void *ioremap_nocache(unsigned long physaddr, unsigned long size)
+{
+ return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
+}
+extern inline void *ioremap_writethrough(unsigned long physaddr, unsigned long size)
+{
+ return __ioremap(physaddr, size, IOMAP_WRITETHROUGH);
+}
+extern inline void *ioremap_fullcache(unsigned long physaddr, unsigned long size)
+{
+ return __ioremap(physaddr, size, IOMAP_FULL_CACHING);
+}
+
+extern void iounmap(void *addr);
+
+/* Nothing to do */
+
+extern void blkfin_inv_cache_all(void);
+
+#endif
+
+#define dma_cache_inv(_start,_size) do { blkfin_inv_cache_all();} while (0)
+#define dma_cache_wback(_start,_size) do { } while (0)
+#define dma_cache_wback_inv(_start,_size) do { blkfin_inv_cache_all();} while (0)
+
+/* Pages to physical address... */
+#define page_to_phys(page) ((page - mem_map) << PAGE_SHIFT)
+#define page_to_bus(page) ((page - mem_map) << PAGE_SHIFT)
+
+#define mm_ptov(vaddr) ((void *) (vaddr))
+#define mm_vtop(vaddr) ((unsigned long) (vaddr))
+#define phys_to_virt(vaddr) ((void *) (vaddr))
+#define virt_to_phys(vaddr) ((unsigned long) (vaddr))
+
+#define virt_to_bus virt_to_phys
+#define bus_to_virt phys_to_virt
+
+#endif
+
+#endif
diff --git a/include/asm-blackfin/io.h b/include/asm-blackfin/io.h
new file mode 100644
index 0000000000..e5b388e262
--- /dev/null
+++ b/include/asm-blackfin/io.h
@@ -0,0 +1,122 @@
+/*
+ * U-boot - io.h IO routines
+ *
+ * Copyright (c) 2005 blackfin.uclinux.org
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _BLACKFIN_IO_H
+#define _BLACKFIN_IO_H
+
+#ifdef __KERNEL__
+
+#include <linux/config.h>
+
+/* function prototypes for CF support */
+extern void cf_outsw(unsigned short *addr, unsigned short *sect_buf, int words);
+extern void cf_insw(unsigned short *sect_buf, unsigned short *addr, int words);
+extern unsigned char cf_inb(volatile unsigned char *addr);
+extern void cf_outb(unsigned char val, volatile unsigned char* addr);
+
+/*
+ * These are for ISA/PCI shared memory _only_ and should never be used
+ * on any other type of memory, including Zorro memory. They are meant to
+ * access the bus in the bus byte order which is little-endian!.
+ *
+ * readX/writeX() are used to access memory mapped devices. On some
+ * architectures the memory mapped IO stuff needs to be accessed
+ * differently. On the m68k architecture, we just read/write the
+ * memory location directly.
+ */
+
+
+#define readb(addr) ({ unsigned char __v = (*(volatile unsigned char *) (addr));asm("ssync;"); __v; })
+#define readw(addr) ({ unsigned short __v = (*(volatile unsigned short *) (addr)); asm("ssync;");__v; })
+#define readl(addr) ({ unsigned int __v = (*(volatile unsigned int *) (addr));asm("ssync;"); __v; })
+
+#define writeb(b,addr) {((*(volatile unsigned char *) (addr)) = (b)); asm("ssync;");}
+#define writew(b,addr) {((*(volatile unsigned short *) (addr)) = (b)); asm("ssync;");}
+#define writel(b,addr) {((*(volatile unsigned int *) (addr)) = (b)); asm("ssync;");}
+
+#define memset_io(a,b,c) memset((void *)(a),(b),(c))
+#define memcpy_fromio(a,b,c) memcpy((a),(void *)(b),(c))
+#define memcpy_toio(a,b,c) memcpy((void *)(a),(b),(c))
+
+#define inb_p(addr) readb((addr) + BF533_PCIIO_BASE)
+#define inb(addr) cf_inb((volatile unsigned char*)(addr))
+
+#define outb(x,addr) cf_outb((unsigned char)(x), (volatile unsigned char*)(addr))
+#define outb_p(x,addr) outb(x, (addr) + BF533_PCIIO_BASE)
+
+#define inw(addr) readw((addr) + BF533_PCIIO_BASE)
+#define inl(addr) readl((addr) + BF533_PCIIO_BASE)
+
+#define outw(x,addr) writew(x, (addr) + BF533_PCIIO_BASE)
+#define outl(x,addr) writel(x, (addr) + BF533_PCIIO_BASE)
+
+#define insb(port, addr, count) memcpy((void*)addr, (void*)(BF533_PCIIO_BASE + port), count)
+#define insw(port, addr, count) cf_insw((unsigned short*)addr, (unsigned short*)(port), (count))
+#define insl(port, addr, count) memcpy((void*)addr, (void*)(BF533_PCIIO_BASE + port), (4*count))
+
+#define outsb(port,addr,count) memcpy((void*)(BF533_PCIIO_BASE + port), (void*)addr, count)
+#define outsw(port,addr,count) cf_outsw((unsigned short*)(port), (unsigned short*)addr, (count))
+#define outsl(port,addr,count) memcpy((void*)(BF533_PCIIO_BASE + port), (void*)addr, (4*count))
+
+#define IO_SPACE_LIMIT 0xffff
+
+/* Values for nocacheflag and cmode */
+#define IOMAP_FULL_CACHING 0
+#define IOMAP_NOCACHE_SER 1
+#define IOMAP_NOCACHE_NONSER 2
+#define IOMAP_WRITETHROUGH 3
+
+extern void *__ioremap(unsigned long physaddr, unsigned long size,
+ int cacheflag);
+extern void __iounmap(void *addr, unsigned long size);
+
+extern inline void *ioremap(unsigned long physaddr, unsigned long size)
+{
+ return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
+}
+extern inline void *ioremap_nocache(unsigned long physaddr,
+ unsigned long size)
+{
+ return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
+}
+extern inline void *ioremap_writethrough(unsigned long physaddr,
+ unsigned long size)
+{
+ return __ioremap(physaddr, size, IOMAP_WRITETHROUGH);
+}
+extern inline void *ioremap_fullcache(unsigned long physaddr,
+ unsigned long size)
+{
+ return __ioremap(physaddr, size, IOMAP_FULL_CACHING);
+}
+
+extern void iounmap(void *addr);
+
+extern void blkfin_inv_cache_all(void);
+#define dma_cache_inv(_start,_size) do { blkfin_inv_cache_all();} while (0)
+#define dma_cache_wback(_start,_size) do { } while (0)
+#define dma_cache_wback_inv(_start,_size) do { blkfin_inv_cache_all();} while (0)
+
+#endif
+#endif
diff --git a/include/asm-blackfin/irq.h b/include/asm-blackfin/irq.h
new file mode 100644
index 0000000000..5fbc5a363b
--- /dev/null
+++ b/include/asm-blackfin/irq.h
@@ -0,0 +1,142 @@
+/*
+ * U-boot - irq.h Interrupt related header file
+ *
+ * Copyright (c) 2005 blackfin.uclinux.org
+ *
+ * This file was based on
+ * linux/arch/$(ARCH)/platform/$(PLATFORM)/irq.c
+ *
+ * Changed by HuTao Apr18, 2003
+ *
+ * Copyright was missing when I got the code so took from MIPS arch ...MaTed---
+ * Copyright (C) 1994 by Waldorf GMBH, written by Ralf Baechle
+ * Copyright (C) 1995, 96, 97, 98, 99, 2000, 2001 by Ralf Baechle
+ *
+ * Adapted for BlackFin (ADI) by Ted Ma <mated@sympatico.ca>
+ * Copyright (c) 2002 Arcturus Networks Inc. (www.arcturusnetworks.com)
+ * Copyright (c) 2002 Lineo, Inc. <mattw@lineo.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _BLACKFIN_IRQ_H_
+#define _BLACKFIN_IRQ_H_
+
+#include <linux/config.h>
+#include <asm/cpu/bf533_irq.h>
+
+/*
+ * On the Blackfin, the interrupt structure allows remmapping of the hardware
+ * levels.
+ * - I'm going to assume that the H/W level is going to stay at the default
+ * settings. If someone wants to go through and abstart this out, feel free
+ * to mod the interrupt numbering scheme.
+ * - I'm abstracting the interrupts so that uClinux does not know anything
+ * about the H/W levels. If you want to change the H/W AND keep the abstracted
+ * levels that uClinux sees, you should be able to do most of it here.
+ * - I've left the "abstract" numbering sparce in case someone wants to pull the
+ * interrupts apart (just the TX/RX for the various devices)
+ */
+
+#define NR_IRQS SYS_IRQS
+/*
+ * "Generic" interrupt sources
+ */
+#define IRQ_SCHED_TIMER (8) /* interrupt source for scheduling timer */
+
+static __inline__ int irq_cannonicalize(int irq)
+{
+ return irq;
+}
+
+/*
+ * Machine specific interrupt sources.
+ *
+ * Adding an interrupt service routine for a source with this bit
+ * set indicates a special machine specific interrupt source.
+ * The machine specific files define these sources.
+ *
+ * The IRQ_MACHSPEC bit is now gone - the only thing it did was to
+ * introduce unnecessary overhead.
+ *
+ * All interrupt handling is actually machine specific so it is better
+ * to use function pointers, as used by the Sparc port, and select the
+ * interrupt handling functions when initializing the kernel. This way
+ * we save some unnecessary overhead at run-time.
+ * 01/11/97 - Jes
+ */
+
+extern void (*mach_enable_irq) (unsigned int);
+extern void (*mach_disable_irq) (unsigned int);
+extern int sys_request_irq(unsigned int,
+ void (*)(int, void *, struct pt_regs *),
+ unsigned long, const char *, void *);
+extern void sys_free_irq(unsigned int, void *);
+
+/*
+ * various flags for request_irq() - the Amiga now uses the standard
+ * mechanism like all other architectures - SA_INTERRUPT and SA_SHIRQ
+ * are your friends.
+ */
+#define IRQ_FLG_LOCK (0x0001) /* handler is not replaceable */
+#define IRQ_FLG_REPLACE (0x0002) /* replace existing handler */
+#define IRQ_FLG_FAST (0x0004)
+#define IRQ_FLG_SLOW (0x0008)
+#define IRQ_FLG_STD (0x8000) /* internally used */
+
+/*
+ * This structure is used to chain together the ISRs for a particular
+ * interrupt source (if it supports chaining).
+ */
+typedef struct irq_node {
+ void (*handler) (int, void *, struct pt_regs *);
+ unsigned long flags;
+ void *dev_id;
+ const char *devname;
+ struct irq_node *next;
+} irq_node_t;
+
+/*
+ * This structure has only 4 elements for speed reasons
+ */
+typedef struct irq_handler {
+ void (*handler) (int, void *, struct pt_regs *);
+ unsigned long flags;
+ void *dev_id;
+ const char *devname;
+} irq_handler_t;
+
+/* count of spurious interrupts */
+extern volatile unsigned int num_spurious;
+
+/*
+ * This function returns a new irq_node_t
+ */
+extern irq_node_t *new_irq_node(void);
+
+/*
+ * Some drivers want these entry points
+ */
+#define enable_irq(x) (mach_enable_irq ? (*mach_enable_irq)(x) : 0)
+#define disable_irq(x) (mach_disable_irq ? (*mach_disable_irq)(x) : 0)
+
+#define enable_irq_nosync(x) enable_irq(x)
+#define disable_irq_nosync(x) disable_irq(x)
+
+#endif
diff --git a/include/asm-blackfin/linkage.h b/include/asm-blackfin/linkage.h
new file mode 100644
index 0000000000..18f0c36d24
--- /dev/null
+++ b/include/asm-blackfin/linkage.h
@@ -0,0 +1,60 @@
+/*
+ * U-boot - linkage.h
+ *
+ * Copyright (c) 2005 blackfin.uclinux.org
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _LINUX_LINKAGE_H
+#define _LINUX_LINKAGE_H
+
+#include <linux/config.h>
+
+#ifdef __cplusplus
+#define CPP_ASMLINKAGE extern "C"
+#else
+#define CPP_ASMLINKAGE
+#endif
+
+#define asmlinkage CPP_ASMLINKAGE
+
+#define SYMBOL_NAME_STR(X) #X
+#define SYMBOL_NAME(X) X
+#ifdef __STDC__
+#define SYMBOL_NAME_LABEL(X) X##:
+#else
+#define SYMBOL_NAME_LABEL(X) X:
+#endif
+
+#define __ALIGN .align 4
+#define __ALIGN_STR ".align 4"
+
+#ifdef __ASSEMBLY__
+
+#define ALIGN __ALIGN
+#define ALIGN_STR __ALIGN_STR
+
+#define ENTRY(name) \
+ .globl SYMBOL_NAME(name); \
+ ALIGN; \
+ SYMBOL_NAME_LABEL(name)
+#endif
+
+#endif
diff --git a/include/asm-blackfin/machdep.h b/include/asm-blackfin/machdep.h
new file mode 100644
index 0000000000..0a43ba1c5a
--- /dev/null
+++ b/include/asm-blackfin/machdep.h
@@ -0,0 +1,89 @@
+/*
+ * U-boot - machdep.h
+ *
+ * Copyright (c) 2005 blackfin.uclinux.org
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _BLACKFIN_MACHDEP_H
+#define _BLACKFIN_MACHDEP_H
+
+/* Machine dependent initial routines:
+ *
+ * Based on include/asm-m68knommu/machdep.h
+ * For blackfin, just now we only have bfin, so they'd point to the default bfin
+ *
+ */
+
+struct pt_regs;
+struct kbd_repeat;
+struct mktime;
+struct hwclk_time;
+struct gendisk;
+struct buffer_head;
+
+extern void (*mach_sched_init) (void (*handler) (int, void *, struct pt_regs *));
+
+/* machine dependent keyboard functions */
+extern int (*mach_keyb_init) (void);
+extern int (*mach_kbdrate) (struct kbd_repeat *);
+extern void (*mach_kbd_leds) (unsigned int);
+
+/* machine dependent irq functions */
+extern void (*mach_init_IRQ) (void);
+extern void (*(*mach_default_handler)[]) (int, void *, struct pt_regs *);
+extern int (*mach_request_irq) (unsigned int irq,
+ void (*handler) (int, void *,
+ struct pt_regs *),
+ unsigned long flags, const char *devname,
+ void *dev_id);
+extern void (*mach_free_irq) (unsigned int irq, void *dev_id);
+extern void (*mach_get_model) (char *model);
+extern int (*mach_get_hardware_list) (char *buffer);
+extern int (*mach_get_irq_list) (char *buf);
+extern void (*mach_process_int) (int irq, struct pt_regs * fp);
+
+/* machine dependent timer functions */
+extern unsigned long (*mach_gettimeoffset) (void);
+extern void (*mach_gettod) (int *year, int *mon, int *day, int *hour,
+ int *min, int *sec);
+extern int (*mach_hwclk) (int, struct hwclk_time *);
+extern int (*mach_set_clock_mmss) (unsigned long);
+extern void (*mach_reset) (void);
+extern void (*mach_halt) (void);
+extern void (*mach_power_off) (void);
+extern unsigned long (*mach_hd_init) (unsigned long, unsigned long);
+extern void (*mach_hd_setup) (char *, int *);
+extern long mach_max_dma_address;
+extern void (*mach_floppy_setup) (char *, int *);
+extern void (*mach_floppy_eject) (void);
+extern void (*mach_heartbeat) (int);
+extern void (*mach_l2_flush) (int);
+extern int mach_sysrq_key;
+extern int mach_sysrq_shift_state;
+extern int mach_sysrq_shift_mask;
+extern char *mach_sysrq_xlate;
+
+#ifdef CONFIG_UCLINUX
+extern void config_BSP(char *command, int len);
+extern void (*mach_tick) (void);
+#endif
+
+#endif
diff --git a/include/asm-blackfin/mem_init.h b/include/asm-blackfin/mem_init.h
new file mode 100644
index 0000000000..1a13d908e0
--- /dev/null
+++ b/include/asm-blackfin/mem_init.h
@@ -0,0 +1,287 @@
+/*
+ * U-boot - mem_init.h Header file for memory initialization
+ *
+ * Copyright (c) 2005 blackfin.uclinux.org
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#if ( CONFIG_MEM_MT48LC16M16A2TG_75 || CONFIG_MEM_MT48LC64M4A2FB_7E )
+ #if ( CONFIG_SCLK_HZ > 119402985 )
+ #define SDRAM_tRP TRP_2
+ #define SDRAM_tRP_num 2
+ #define SDRAM_tRAS TRAS_7
+ #define SDRAM_tRAS_num 7
+ #define SDRAM_tRCD TRCD_2
+ #define SDRAM_tWR TWR_2
+ #endif
+ #if ( CONFIG_SCLK_HZ > 104477612 ) && ( CONFIG_SCLK_HZ <= 119402985 )
+ #define SDRAM_tRP TRP_2
+ #define SDRAM_tRP_num 2
+ #define SDRAM_tRAS TRAS_6
+ #define SDRAM_tRAS_num 6
+ #define SDRAM_tRCD TRCD_2
+ #define SDRAM_tWR TWR_2
+ #endif
+ #if ( CONFIG_SCLK_HZ > 89552239 ) && ( CONFIG_SCLK_HZ <= 104477612 )
+ #define SDRAM_tRP TRP_2
+ #define SDRAM_tRP_num 2
+ #define SDRAM_tRAS TRAS_5
+ #define SDRAM_tRAS_num 5
+ #define SDRAM_tRCD TRCD_2
+ #define SDRAM_tWR TWR_2
+ #endif
+ #if ( CONFIG_SCLK_HZ > 74626866 ) && ( CONFIG_SCLK_HZ <= 89552239 )
+ #define SDRAM_tRP TRP_2
+ #define SDRAM_tRP_num 2
+ #define SDRAM_tRAS TRAS_4
+ #define SDRAM_tRAS_num 4
+ #define SDRAM_tRCD TRCD_2
+ #define SDRAM_tWR TWR_2
+ #endif
+ #if ( CONFIG_SCLK_HZ > 66666667 ) && ( CONFIG_SCLK_HZ <= 74626866 )
+ #define SDRAM_tRP TRP_2
+ #define SDRAM_tRP_num 2
+ #define SDRAM_tRAS TRAS_3
+ #define SDRAM_tRAS_num 3
+ #define SDRAM_tRCD TRCD_2
+ #define SDRAM_tWR TWR_2
+ #endif
+ #if ( CONFIG_SCLK_HZ > 59701493 ) && ( CONFIG_SCLK_HZ <= 66666667 )
+ #define SDRAM_tRP TRP_1
+ #define SDRAM_tRP_num 1
+ #define SDRAM_tRAS TRAS_4
+ #define SDRAM_tRAS_num 3
+ #define SDRAM_tRCD TRCD_1
+ #define SDRAM_tWR TWR_2
+ #endif
+ #if ( CONFIG_SCLK_HZ > 44776119 ) && ( CONFIG_SCLK_HZ <= 59701493 )
+ #define SDRAM_tRP TRP_1
+ #define SDRAM_tRP_num 1
+ #define SDRAM_tRAS TRAS_3
+ #define SDRAM_tRAS_num 3
+ #define SDRAM_tRCD TRCD_1
+ #define SDRAM_tWR TWR_2
+ #endif
+ #if ( CONFIG_SCLK_HZ > 29850746 ) && ( CONFIG_SCLK_HZ <= 44776119 )
+ #define SDRAM_tRP TRP_1
+ #define SDRAM_tRP_num 1
+ #define SDRAM_tRAS TRAS_2
+ #define SDRAM_tRAS_num 2
+ #define SDRAM_tRCD TRCD_1
+ #define SDRAM_tWR TWR_2
+ #endif
+ #if ( CONFIG_SCLK_HZ <= 29850746 )
+ #define SDRAM_tRP TRP_1
+ #define SDRAM_tRP_num 1
+ #define SDRAM_tRAS TRAS_1
+ #define SDRAM_tRAS_num 1
+ #define SDRAM_tRCD TRCD_1
+ #define SDRAM_tWR TWR_2
+ #endif
+#endif
+
+#if (CONFIG_MEM_MT48LC16M16A2TG_75)
+ /*SDRAM INFORMATION: */
+ #define SDRAM_Tref 64 /* Refresh period in milliseconds */
+ #define SDRAM_NRA 8192 /* Number of row addresses in SDRAM */
+ #define SDRAM_CL CL_3
+#endif
+
+#if (CONFIG_MEM_MT48LC64M4A2FB_7E)
+ /*SDRAM INFORMATION: */
+ #define SDRAM_Tref 64 /* Refresh period in milliseconds */
+ #define SDRAM_NRA 8192 /* Number of row addresses in SDRAM */
+ #define SDRAM_CL CL_2
+#endif
+
+#if ( CONFIG_MEM_SIZE == 128 )
+ #define SDRAM_SIZE EBSZ_128
+#endif
+#if ( CONFIG_MEM_SIZE == 64 )
+ #define SDRAM_SIZE EBSZ_64
+#endif
+#if ( CONFIG_MEM_SIZE == 32 )
+ #define SDRAM_SIZE EBSZ_32
+#endif
+#if ( CONFIG_MEM_SIZE == 16 )
+ #define SDRAM_SIZE EBSZ_16
+#endif
+#if ( CONFIG_MEM_ADD_WDTH == 11 )
+ #define SDRAM_WIDTH EBCAW_11
+#endif
+#if ( CONFIG_MEM_ADD_WDTH == 10 )
+ #define SDRAM_WIDTH EBCAW_10
+#endif
+#if ( CONFIG_MEM_ADD_WDTH == 9 )
+ #define SDRAM_WIDTH EBCAW_9
+#endif
+#if ( CONFIG_MEM_ADD_WDTH == 8 )
+ #define SDRAM_WIDTH EBCAW_8
+#endif
+
+#define mem_SDBCTL SDRAM_WIDTH | SDRAM_SIZE | EBE
+
+/* Equation from section 17 (p17-46) of BF533 HRM */
+#define mem_SDRRC ((( CONFIG_SCLK_HZ / 1000) * SDRAM_Tref) / SDRAM_NRA) - (SDRAM_tRAS_num + SDRAM_tRP_num)
+
+/* Enable SCLK Out */
+#define mem_SDGCTL ( SCTLE | SDRAM_CL | SDRAM_tRAS | SDRAM_tRP | SDRAM_tRCD | SDRAM_tWR | PSS )
+
+#define flash_EBIU_AMBCTL_WAT ( ( CONFIG_FLASH_SPEED_BWAT * 4 ) / ( 4000000000 / CONFIG_SCLK_HZ ) ) + 1
+#define flash_EBIU_AMBCTL_RAT ( ( CONFIG_FLASH_SPEED_BRAT * 4 ) / ( 4000000000 / CONFIG_SCLK_HZ ) ) + 1
+#define flash_EBIU_AMBCTL_HT ( ( CONFIG_FLASH_SPEED_BHT * 4 ) / ( 4000000000 / CONFIG_SCLK_HZ ) )
+#define flash_EBIU_AMBCTL_ST ( ( CONFIG_FLASH_SPEED_BST * 4 ) / ( 4000000000 / CONFIG_SCLK_HZ ) ) + 1
+#define flash_EBIU_AMBCTL_TT ( ( CONFIG_FLASH_SPEED_BTT * 4 ) / ( 4000000000 / CONFIG_SCLK_HZ ) ) + 1
+
+#if (flash_EBIU_AMBCTL_TT > 3 )
+ #define flash_EBIU_AMBCTL0_TT B0TT_4
+#endif
+#if (flash_EBIU_AMBCTL_TT == 3 )
+ #define flash_EBIU_AMBCTL0_TT B0TT_3
+#endif
+#if (flash_EBIU_AMBCTL_TT == 2 )
+ #define flash_EBIU_AMBCTL0_TT B0TT_2
+#endif
+#if (flash_EBIU_AMBCTL_TT < 2 )
+ #define flash_EBIU_AMBCTL0_TT B0TT_1
+#endif
+
+#if (flash_EBIU_AMBCTL_ST > 3 )
+ #define flash_EBIU_AMBCTL0_ST B0ST_4
+#endif
+#if (flash_EBIU_AMBCTL_ST == 3 )
+ #define flash_EBIU_AMBCTL0_ST B0ST_3
+#endif
+#if (flash_EBIU_AMBCTL_ST == 2 )
+ #define flash_EBIU_AMBCTL0_ST B0ST_2
+#endif
+#if (flash_EBIU_AMBCTL_ST < 2 )
+ #define flash_EBIU_AMBCTL0_ST B0ST_1
+#endif
+
+#if (flash_EBIU_AMBCTL_HT > 2 )
+ #define flash_EBIU_AMBCTL0_HT B0HT_3
+#endif
+#if (flash_EBIU_AMBCTL_HT == 2 )
+ #define flash_EBIU_AMBCTL0_HT B0HT_2
+#endif
+#if (flash_EBIU_AMBCTL_HT == 1 )
+ #define flash_EBIU_AMBCTL0_HT B0HT_1
+#endif
+#if (flash_EBIU_AMBCTL_HT == 0 && CONFIG_FLASH_SPEED_BHT == 0)
+ #define flash_EBIU_AMBCTL0_HT B0HT_0
+#endif
+#if (flash_EBIU_AMBCTL_HT == 0 && CONFIG_FLASH_SPEED_BHT != 0)
+ #define flash_EBIU_AMBCTL0_HT B0HT_1
+#endif
+
+#if (flash_EBIU_AMBCTL_WAT > 14)
+ #define flash_EBIU_AMBCTL0_WAT B0WAT_15
+#endif
+#if (flash_EBIU_AMBCTL_WAT == 14)
+ #define flash_EBIU_AMBCTL0_WAT B0WAT_14
+#endif
+#if (flash_EBIU_AMBCTL_WAT == 13)
+ #define flash_EBIU_AMBCTL0_WAT B0WAT_13
+#endif
+#if (flash_EBIU_AMBCTL_WAT == 12)
+ #define flash_EBIU_AMBCTL0_WAT B0WAT_12
+#endif
+#if (flash_EBIU_AMBCTL_WAT == 11)
+ #define flash_EBIU_AMBCTL0_WAT B0WAT_11
+#endif
+#if (flash_EBIU_AMBCTL_WAT == 10)
+ #define flash_EBIU_AMBCTL0_WAT B0WAT_10
+#endif
+#if (flash_EBIU_AMBCTL_WAT == 9)
+ #define flash_EBIU_AMBCTL0_WAT B0WAT_9
+#endif
+#if (flash_EBIU_AMBCTL_WAT == 8)
+ #define flash_EBIU_AMBCTL0_WAT B0WAT_8
+#endif
+#if (flash_EBIU_AMBCTL_WAT == 7)
+ #define flash_EBIU_AMBCTL0_WAT B0WAT_7
+#endif
+#if (flash_EBIU_AMBCTL_WAT == 6)
+ #define flash_EBIU_AMBCTL0_WAT B0WAT_6
+#endif
+#if (flash_EBIU_AMBCTL_WAT == 5)
+ #define flash_EBIU_AMBCTL0_WAT B0WAT_5
+#endif
+#if (flash_EBIU_AMBCTL_WAT == 4)
+ #define flash_EBIU_AMBCTL0_WAT B0WAT_4
+#endif
+#if (flash_EBIU_AMBCTL_WAT == 3)
+ #define flash_EBIU_AMBCTL0_WAT B0WAT_3
+#endif
+#if (flash_EBIU_AMBCTL_WAT == 2)
+ #define flash_EBIU_AMBCTL0_WAT B0WAT_2
+#endif
+#if (flash_EBIU_AMBCTL_WAT == 1)
+ #define flash_EBIU_AMBCTL0_WAT B0WAT_1
+#endif
+
+#if (flash_EBIU_AMBCTL_RAT > 14)
+ #define flash_EBIU_AMBCTL0_RAT B0RAT_15
+#endif
+#if (flash_EBIU_AMBCTL_RAT == 14)
+ #define flash_EBIU_AMBCTL0_RAT B0RAT_14
+#endif
+#if (flash_EBIU_AMBCTL_RAT == 13)
+ #define flash_EBIU_AMBCTL0_RAT B0RAT_13
+#endif
+#if (flash_EBIU_AMBCTL_RAT == 12)
+ #define flash_EBIU_AMBCTL0_RAT B0RAT_12
+#endif
+#if (flash_EBIU_AMBCTL_RAT == 11)
+ #define flash_EBIU_AMBCTL0_RAT B0RAT_11
+#endif
+#if (flash_EBIU_AMBCTL_RAT == 10)
+ #define flash_EBIU_AMBCTL0_RAT B0RAT_10
+#endif
+#if (flash_EBIU_AMBCTL_RAT == 9)
+ #define flash_EBIU_AMBCTL0_RAT B0RAT_9
+#endif
+#if (flash_EBIU_AMBCTL_RAT == 8)
+ #define flash_EBIU_AMBCTL0_RAT B0RAT_8
+#endif
+#if (flash_EBIU_AMBCTL_RAT == 7)
+ #define flash_EBIU_AMBCTL0_RAT B0RAT_7
+#endif
+#if (flash_EBIU_AMBCTL_RAT == 6)
+ #define flash_EBIU_AMBCTL0_RAT B0RAT_6
+#endif
+#if (flash_EBIU_AMBCTL_RAT == 5)
+ #define flash_EBIU_AMBCTL0_RAT B0RAT_5
+#endif
+#if (flash_EBIU_AMBCTL_RAT == 4)
+ #define flash_EBIU_AMBCTL0_RAT B0RAT_4
+#endif
+#if (flash_EBIU_AMBCTL_RAT == 3)
+ #define flash_EBIU_AMBCTL0_RAT B0RAT_3
+#endif
+#if (flash_EBIU_AMBCTL_RAT == 2)
+ #define flash_EBIU_AMBCTL0_RAT B0RAT_2
+#endif
+#if (flash_EBIU_AMBCTL_RAT == 1)
+ #define flash_EBIU_AMBCTL0_RAT B0RAT_1
+#endif
+
+#define flash_EBIU_AMBCTL0 flash_EBIU_AMBCTL0_WAT | flash_EBIU_AMBCTL0_RAT | flash_EBIU_AMBCTL0_HT | flash_EBIU_AMBCTL0_ST | flash_EBIU_AMBCTL0_TT | CONFIG_FLASH_SPEED_RDYEN
diff --git a/include/asm-blackfin/page.h b/include/asm-blackfin/page.h
new file mode 100644
index 0000000000..406ece5377
--- /dev/null
+++ b/include/asm-blackfin/page.h
@@ -0,0 +1,128 @@
+/*
+ * U-boot - page.h
+ *
+ * Copyright (c) 2005 blackfin.uclinux.org
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _BLACKFIN_PAGE_H
+#define _BLACKFIN_PAGE_H
+
+#include <linux/config.h>
+
+/* PAGE_SHIFT determines the page size */
+
+#define PAGE_SHIFT (12)
+#define PAGE_SIZE (4096)
+#define PAGE_MASK (~(PAGE_SIZE-1))
+
+#ifdef __KERNEL__
+
+#include <asm/setup.h>
+
+#if PAGE_SHIFT < 13
+#define KTHREAD_SIZE (8192)
+#else
+#define KTHREAD_SIZE PAGE_SIZE
+#endif
+
+#ifndef __ASSEMBLY__
+
+#define get_user_page(vaddr) __get_free_page(GFP_KERNEL)
+#define free_user_page(page, addr) free_page(addr)
+
+#define clear_page(page) memset((page), 0, PAGE_SIZE)
+#define copy_page(to,from) memcpy((to), (from), PAGE_SIZE)
+
+#define clear_user_page(page, vaddr) clear_page(page)
+#define copy_user_page(to, from, vaddr) copy_page(to, from)
+
+/*
+ * These are used to make use of C type-checking..
+ */
+typedef struct {
+ unsigned long pte;
+} pte_t;
+typedef struct {
+ unsigned long pmd[16];
+} pmd_t;
+typedef struct {
+ unsigned long pgd;
+} pgd_t;
+typedef struct {
+ unsigned long pgprot;
+} pgprot_t;
+
+#define pte_val(x) ((x).pte)
+#define pmd_val(x) ((&x)->pmd[0])
+#define pgd_val(x) ((x).pgd)
+#define pgprot_val(x) ((x).pgprot)
+
+#define __pte(x) ((pte_t) { (x) } )
+#define __pmd(x) ((pmd_t) { (x) } )
+#define __pgd(x) ((pgd_t) { (x) } )
+#define __pgprot(x) ((pgprot_t) { (x) } )
+
+/* to align the pointer to the (next) page boundary */
+#define PAGE_ALIGN(addr) (((addr)+PAGE_SIZE-1)&PAGE_MASK)
+
+/* Pure 2^n version of get_order */
+extern __inline__ int get_order(unsigned long size)
+{
+ int order;
+
+ size = (size - 1) >> (PAGE_SHIFT - 1);
+ order = -1;
+ do {
+ size >>= 1;
+ order++;
+ } while (size);
+ return order;
+}
+
+#endif /* !__ASSEMBLY__ */
+
+#include <asm/page_offset.h>
+
+#define PAGE_OFFSET (PAGE_OFFSET_RAW)
+
+#ifndef __ASSEMBLY__
+
+#define __pa(vaddr) virt_to_phys((void *)vaddr)
+#define __va(paddr) phys_to_virt((unsigned long)paddr)
+
+#define MAP_NR(addr) (((unsigned long)(addr)-PAGE_OFFSET) >> PAGE_SHIFT)
+#define virt_to_page(addr) (mem_map + (((unsigned long)(addr)-PAGE_OFFSET) >> PAGE_SHIFT))
+#define VALID_PAGE(page) ((page - mem_map) < max_mapnr)
+
+#define BUG() do { \
+ \
+ while (1); /* dead-loop */ \
+} while (0)
+
+#define PAGE_BUG(page) do { \
+ BUG(); \
+} while (0)
+
+#endif
+
+#endif
+
+#endif
diff --git a/include/asm-blackfin/page_offset.h b/include/asm-blackfin/page_offset.h
new file mode 100644
index 0000000000..262473fc3d
--- /dev/null
+++ b/include/asm-blackfin/page_offset.h
@@ -0,0 +1,35 @@
+/*
+ * U-boot - page_offset.h
+ *
+ * Copyright (c) 2005 blackfin.uclinux.org
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * Changes made by Akbar Hussain April 10, 2001
+ */
+
+#include <linux/config.h>
+
+/* This handles the memory map.. */
+
+#ifdef CONFIG_BLACKFIN
+#define PAGE_OFFSET_RAW 0x00000000
+#endif
diff --git a/include/asm-blackfin/posix_types.h b/include/asm-blackfin/posix_types.h
new file mode 100644
index 0000000000..f1f2b5ffc2
--- /dev/null
+++ b/include/asm-blackfin/posix_types.h
@@ -0,0 +1,90 @@
+/*
+ * U-boot - posix_types.h
+ *
+ * Copyright (c) 2005 blackfin.uclinux.org
+ *
+ * (C) Copyright 2000-2004
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __ARCH_BLACKFIN_POSIX_TYPES_H
+#define __ARCH_BLACKFIN_POSIX_TYPES_H
+
+/*
+ * This file is generally used by user-level software, so you need to
+ * be a little careful about namespace pollution etc. Also, we cannot
+ * assume GCC is being used.
+ */
+
+typedef unsigned short __kernel_dev_t;
+typedef unsigned long __kernel_ino_t;
+typedef unsigned short __kernel_mode_t;
+typedef unsigned short __kernel_nlink_t;
+typedef long __kernel_off_t;
+typedef int __kernel_pid_t;
+typedef unsigned short __kernel_ipc_pid_t;
+typedef unsigned short __kernel_uid_t;
+typedef unsigned short __kernel_gid_t;
+typedef unsigned int __kernel_size_t;
+typedef int __kernel_ssize_t;
+typedef int __kernel_ptrdiff_t;
+typedef long __kernel_time_t;
+typedef long __kernel_suseconds_t;
+typedef long __kernel_clock_t;
+typedef int __kernel_daddr_t;
+typedef char *__kernel_caddr_t;
+typedef unsigned short __kernel_uid16_t;
+typedef unsigned short __kernel_gid16_t;
+typedef unsigned int __kernel_uid32_t;
+typedef unsigned int __kernel_gid32_t;
+
+typedef unsigned short __kernel_old_uid_t;
+typedef unsigned short __kernel_old_gid_t;
+
+#ifdef __GNUC__
+typedef long long __kernel_loff_t;
+#endif
+
+typedef struct {
+#if defined(__KERNEL__) || defined(__USE_ALL)
+ int val[2];
+#else /* !defined(__KERNEL__) && !defined(__USE_ALL) */
+ int __val[2];
+#endif /* !defined(__KERNEL__) && !defined(__USE_ALL) */
+} __kernel_fsid_t;
+
+#if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2)
+
+#undef __FD_SET
+#define __FD_SET(d, set) ((set)->fds_bits[__FDELT(d)] |= __FDMASK(d))
+
+#undef __FD_CLR
+#define __FD_CLR(d, set) ((set)->fds_bits[__FDELT(d)] &= ~__FDMASK(d))
+
+#undef __FD_ISSET
+#define __FD_ISSET(d, set) ((set)->fds_bits[__FDELT(d)] & __FDMASK(d))
+
+#undef __FD_ZERO
+#define __FD_ZERO(fdsetp) (memset (fdsetp, 0, sizeof(*(fd_set *)fdsetp)))
+
+#endif /* defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) */
+
+#endif
diff --git a/include/asm-blackfin/processor.h b/include/asm-blackfin/processor.h
new file mode 100644
index 0000000000..19bd720106
--- /dev/null
+++ b/include/asm-blackfin/processor.h
@@ -0,0 +1,174 @@
+/*
+ * U-boot - processor.h
+ *
+ * Copyright (c) 2005 blackfin.uclinux.org
+ *
+ * This file is based on
+ * include/asm-m68k/processor.h
+ * Changes made by Akbar Hussain Lineo, Inc, May 2001 for BLACKFIN
+ * Copyright (C) 1995 Hamish Macdonald
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __ASM_BLACKFIN_PROCESSOR_H
+#define __ASM_BLACKFIN_PROCESSOR_H
+
+/*
+ * Default implementation of macro that returns current
+ * instruction pointer ("program counter").
+ */
+#define current_text_addr() ({ __label__ _l; _l: &&_l;})
+
+#include <linux/config.h>
+#include <asm/segment.h>
+#include <asm/ptrace.h>
+#include <asm/current.h>
+
+extern inline unsigned long rdusp(void)
+{
+ unsigned long usp;
+
+ __asm__ __volatile__("%0 = usp;\n\t":"=da"(usp));
+ return usp;
+}
+
+extern inline void wrusp(unsigned long usp)
+{
+ __asm__ __volatile__("usp = %0;\n\t"::"da"(usp));
+}
+
+/*
+ * User space process size: 3.75GB. This is hardcoded into a few places,
+ * so don't change it unless you know what you are doing.
+ */
+#define TASK_SIZE (0xF0000000UL)
+
+/*
+ * Bus types
+ */
+#define EISA_bus 0
+#define MCA_bus 0
+
+/* There is no pc register avaliable for BLACKFIN, so we are going to get
+ * it indirectly
+ */
+
+#if 0
+inline unsigned long obtain_pc_indirectly(void)
+{
+ unsigned long pc;
+ __asm__ __volatile__("%0 = rets;\n":"=d"(pc));
+ return (pc - 4); /* call pcrel24 is 4 bytes long */
+}
+#endif
+
+/*
+ * if you change this structure, you must change the code and offsets
+ * in m68k/machasm.S
+ */
+
+struct thread_struct {
+ unsigned long ksp; /* kernel stack pointer */
+ unsigned long usp; /* user stack pointer */
+ unsigned short seqstat; /* saved status register */
+ unsigned long esp0; /* points to SR of stack frame pt_regs */
+ unsigned long pc; /* instruction pointer */
+};
+
+#define INIT_MMAP { &init_mm, 0, 0x40000000, NULL, __pgprot(_PAGE_PRESENT|_PAGE_ACCESSED), VM_READ | VM_WRITE | VM_EXEC, 1, NULL, NULL }
+
+#define INIT_THREAD { \
+ sizeof(init_stack) + (unsigned long) init_stack, 0, \
+ PS_S, 0\
+}
+
+/*
+ * Do necessary setup to start up a newly executed thread.
+ *
+ * pass the data segment into user programs if it exists,
+ * it can't hurt anything as far as I can tell
+ */
+#define start_thread(_regs, _pc, _usp) \
+do { \
+ set_fs(USER_DS); /* reads from user space */ \
+ (_regs)->pc = (_pc); \
+ if (current->mm) \
+ (_regs)->r5 = current->mm->start_data; \
+ (_regs)->seqstat &= ~0x0c00; \
+ wrusp(_usp); \
+ /* Adde by HuTao, May 26, 2003 3:39PM */\
+ if ((_regs)->ipend & 0x8000) /* check whether system in supper mode - StChen */\
+ (_regs)->ipend = 0x0;\
+} while(0)
+
+/* Forward declaration, a strange C thing */
+struct task_struct;
+
+/* Free all resources held by a thread. */
+static inline void release_thread(struct task_struct *dead_task)
+{
+}
+
+extern int kernel_thread(int (*fn) (void *), void *arg,
+ unsigned long flags);
+
+#define copy_segments(tsk, mm) do { } while (0)
+#define release_segments(mm) do { } while (0)
+#define forget_segments() do { } while (0)
+
+/*
+ * Free current thread data structures etc..
+ */
+static inline void exit_thread(void)
+{
+}
+
+/*
+ * Return saved PC of a blocked thread.
+ */
+extern inline unsigned long thread_saved_pc(struct thread_struct *t)
+{
+ extern void scheduling_functions_start_here(void);
+ extern void scheduling_functions_end_here(void);
+ return 0;
+}
+
+unsigned long get_wchan(struct task_struct *p);
+
+#define KSTK_EIP(tsk) \
+ ({ \
+ unsigned long eip = 0; \
+ if ((tsk)->thread.esp0 > PAGE_SIZE && \
+ MAP_NR((tsk)->thread.esp0) < max_mapnr) \
+ eip = ((struct pt_regs *) (tsk)->thread.esp0)->pc; \
+ eip; })
+#define KSTK_ESP(tsk) ((tsk) == current ? rdusp() : (tsk)->thread.usp)
+#define THREAD_SIZE (2*PAGE_SIZE)
+
+/* Allocation and freeing of basic task resources. */
+#define alloc_task_struct() \
+ ((struct task_struct *) __get_free_pages(GFP_KERNEL,1))
+#define free_task_struct(p) free_pages((unsigned long)(p),1)
+#define get_task_struct(tsk) atomic_inc(&mem_map[MAP_NR(tsk)].count)
+
+#define init_task (init_task_union.task)
+#define init_stack (init_task_union.stack)
+
+#endif
diff --git a/include/asm-blackfin/ptrace.h b/include/asm-blackfin/ptrace.h
new file mode 100644
index 0000000000..afd57773ac
--- /dev/null
+++ b/include/asm-blackfin/ptrace.h
@@ -0,0 +1,269 @@
+/*
+ * U-boot - ptrace.h
+ *
+ * Copyright (c) 2005 blackfin.uclinux.org
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _BLACKFIN_PTRACE_H
+#define _BLACKFIN_PTRACE_H
+
+#define NEW_PT_REGS
+
+/*
+ * GCC defines register number like this:
+ * -----------------------------
+ * 0 - 7 are data registers R0-R7
+ * 8 - 15 are address registers P0-P7
+ * 16 - 31 dsp registers I/B/L0 -- I/B/L3 & M0--M3
+ * 32 - 33 A registers A0 & A1
+ * 34 - status register
+ *
+ * We follows above, except:
+ * 32-33 --- Low 32-bit of A0&1
+ * 34-35 --- High 8-bit of A0&1
+ */
+
+#if defined(NEW_PT_REGS)
+
+#define PT_IPEND 0
+#define PT_SYSCFG (PT_IPEND+4)
+#define PT_SEQSTAT (PT_SYSCFG+4)
+#define PT_RETE (PT_SEQSTAT+4)
+#define PT_RETN (PT_RETE+4)
+#define PT_RETX (PT_RETN+4)
+#define PT_RETI (PT_RETX+4)
+#define PT_PC PT_RETI
+#define PT_RETS (PT_RETI+4)
+#define PT_RESERVED (PT_RETS+4)
+#define PT_ASTAT (PT_RESERVED+4)
+#define PT_LB1 (PT_ASTAT+4)
+#define PT_LB0 (PT_LB1+4)
+#define PT_LT1 (PT_LB0+4)
+#define PT_LT0 (PT_LT1+4)
+#define PT_LC1 (PT_LT0+4)
+#define PT_LC0 (PT_LC1+4)
+#define PT_A1W (PT_LC0+4)
+#define PT_A1X (PT_A1W+4)
+#define PT_A0W (PT_A1X+4)
+#define PT_A0X (PT_A0W+4)
+#define PT_B3 (PT_A0X+4)
+#define PT_B2 (PT_B3+4)
+#define PT_B1 (PT_B2+4)
+#define PT_B0 (PT_B1+4)
+#define PT_L3 (PT_B0+4)
+#define PT_L2 (PT_L3+4)
+#define PT_L1 (PT_L2+4)
+#define PT_L0 (PT_L1+4)
+#define PT_M3 (PT_L0+4)
+#define PT_M2 (PT_M3+4)
+#define PT_M1 (PT_M2+4)
+#define PT_M0 (PT_M1+4)
+#define PT_I3 (PT_M0+4)
+#define PT_I2 (PT_I3+4)
+#define PT_I1 (PT_I2+4)
+#define PT_I0 (PT_I1+4)
+#define PT_USP (PT_I0+4)
+#define PT_FP (PT_USP+4)
+#define PT_P5 (PT_FP+4)
+#define PT_P4 (PT_P5+4)
+#define PT_P3 (PT_P4+4)
+#define PT_P2 (PT_P3+4)
+#define PT_P1 (PT_P2+4)
+#define PT_P0 (PT_P1+4)
+#define PT_R7 (PT_P0+4)
+#define PT_R6 (PT_R7+4)
+#define PT_R5 (PT_R6+4)
+#define PT_R4 (PT_R5+4)
+#define PT_R3 (PT_R4+4)
+#define PT_R2 (PT_R3+4)
+#define PT_R1 (PT_R2+4)
+#define PT_R0 (PT_R1+4)
+#define PT_ORIG_R0 (PT_R0+4)
+#define PT_SR PT_SEQSTAT
+
+#else
+/*
+ * Here utilize blackfin : dpregs = [pregs + imm16s4]
+ * [pregs + imm16s4] = dpregs
+ * to access defferent saved reg in stack
+ */
+#define PT_R3 0
+#define PT_R4 4
+#define PT_R2 8
+#define PT_R1 12
+#define PT_P5 16
+#define PT_P4 20
+#define PT_P3 24
+#define PT_P2 28
+#define PT_P1 32
+#define PT_P0 36
+#define PT_R7 40
+#define PT_R6 44
+#define PT_R5 48
+#define PT_PC 52
+#define PT_SEQSTAT 56 /* so-called SR reg */
+#define PT_SR PT_SEQSTAT
+#define PT_ASTAT 60
+#define PT_RETS 64
+#define PT_A1w 68
+#define PT_A0w 72
+#define PT_A1x 76
+#define PT_A0x 80
+#define PT_ORIG_R0 84
+#define PT_R0 88
+#define PT_USP 92
+#define PT_FP 96
+#define PT_SP 100
+
+/* Added by HuTao, May26 2003 3:18PM */
+#define PT_IPEND 100
+
+/* Add SYSCFG register for single stepping support */
+#define PT_SYSCFG 104
+
+#endif
+
+#ifndef __ASSEMBLY__
+
+#if defined(NEW_PT_REGS)
+/* this struct defines the way the registers are stored on the
+ * stack during a system call.
+ */
+struct pt_regs {
+ long ipend;
+ long syscfg;
+ long seqstat;
+ long rete;
+ long retn;
+ long retx;
+ long pc;
+ long rets;
+ long reserved;
+ long astat;
+ long lb1;
+ long lb0;
+ long lt1;
+ long lt0;
+ long lc1;
+ long lc0;
+ long a1w;
+ long a1x;
+ long a0w;
+ long a0x;
+ long b3;
+ long b2;
+ long b1;
+ long b0;
+ long l3;
+ long l2;
+ long l1;
+ long l0;
+ long m3;
+ long m2;
+ long m1;
+ long m0;
+ long i3;
+ long i2;
+ long i1;
+ long i0;
+ long usp;
+ long fp;
+ long p5;
+ long p4;
+ long p3;
+ long p2;
+ long p1;
+ long p0;
+ long r7;
+ long r6;
+ long r5;
+ long r4;
+ long r3;
+ long r2;
+ long r1;
+ long r0;
+ long orig_r0;
+};
+
+#else
+/* now we don't know what regs the system call will use */
+struct pt_regs {
+ long r3;
+ long r4;
+ long r2;
+ long r1;
+ long p5;
+ long p4;
+ long p3;
+ long p2;
+ long p1;
+ long p0;
+ long r7;
+ long r6;
+ long r5;
+ unsigned long pc;
+ unsigned long seqstat;
+ unsigned long astat;
+ unsigned long rets;
+ long a1w;
+ long a0w;
+ long a1x;
+ long a0x;
+ long orig_r0;
+ long r0;
+ long usp;
+ long fp;
+/*
+ * Added for supervisor/user mode switch.
+ *
+ * HuTao May26 03 3:23PM
+ */
+ long ipend;
+ long syscfg;
+};
+
+#endif
+
+/* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */
+#define PTRACE_GETREGS 12
+#define PTRACE_SETREGS 13 /* ptrace signal */
+
+#ifdef __KERNEL__
+
+#ifndef PS_S
+#define PS_S (0x0c00)
+
+/* Bit 11:10 of SEQSTAT defines user/supervisor/debug mode
+ * 00: user
+ * 01: supervisor
+ * 1x: debug
+ */
+
+#define PS_M (0x1000) /* I am not sure why this is required here Akbar */
+#endif
+
+#define user_mode(regs) (!((regs)->seqstat & PS_S))
+#define instruction_pointer(regs) ((regs)->pc)
+extern void show_regs(struct pt_regs *);
+
+#endif
+#endif
+#endif
diff --git a/include/asm-blackfin/segment.h b/include/asm-blackfin/segment.h
new file mode 100644
index 0000000000..9e6d817fc7
--- /dev/null
+++ b/include/asm-blackfin/segment.h
@@ -0,0 +1,46 @@
+/*
+ * U-boot - segment.h
+ *
+ * Copyright (c) 2005 blackfin.uclinux.org
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _BLACKFIN_SEGMENT_H
+#define _BLACKFIN_SEGMENT_H
+
+/* define constants */
+typedef unsigned long mm_segment_t; /* domain register */
+
+#define KERNEL_CS 0x0
+#define KERNEL_DS 0x0
+#define __KERNEL_CS 0x0
+#define __KERNEL_DS 0x0
+
+#define USER_CS 0x1
+#define USER_DS 0x1
+#define __USER_CS 0x1
+#define __USER_DS 0x1
+
+#define get_ds() (KERNEL_DS)
+#define get_fs() (__USER_DS)
+#define segment_eq(a,b) ((a) == (b))
+#define set_fs(val)
+
+#endif
diff --git a/include/asm-blackfin/setup.h b/include/asm-blackfin/setup.h
new file mode 100644
index 0000000000..6ce96880ac
--- /dev/null
+++ b/include/asm-blackfin/setup.h
@@ -0,0 +1,86 @@
+/*
+ * U-boot - setup.h
+ *
+ * Copyright (c) 2005 blackfin.uclinux.org
+ *
+ * This file is based on
+ * asm/setup.h -- Definition of the Linux/Blackfin setup information
+ * Copyright Lineo, Inc 2001 Tony Kou
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _BLACKFIN_SETUP_H
+#define _BLACKFIN_SETUP_H
+
+#include <linux/config.h>
+
+/*
+ * Linux/Blackfin Architectures
+ */
+
+#define MACH_BFIN 1
+
+#ifdef __KERNEL__
+
+#ifndef __ASSEMBLY__
+extern unsigned long blackfin_machtype;
+#endif
+
+#if defined(CONFIG_BFIN)
+#define MACH_IS_BFIN (blackfin_machtype == MACH_BFIN)
+#endif
+
+#ifndef MACH_TYPE
+#define MACH_TYPE (blackfin_machtype)
+#endif
+
+#endif
+
+/*
+ * CPU, FPU and MMU types
+ *
+ * Note: we don't need now:
+ *
+ */
+
+#ifndef __ASSEMBLY__
+extern unsigned long blackfin_cputype;
+#ifdef CONFIG_VME
+extern unsigned long vme_brdtype;
+#endif
+
+/*
+ * Miscellaneous
+ */
+
+#define NUM_MEMINFO 4
+#define CL_SIZE 256
+
+extern int blackfin_num_memory; /* # of memory blocks found (and used) */
+extern int blackfin_realnum_memory; /* real # of memory blocks found */
+extern struct mem_info blackfin_memory[NUM_MEMINFO]; /* memory description */
+
+struct mem_info {
+ unsigned long addr; /* physical address of memory chunk */
+ unsigned long size; /* length of memory chunk (in bytes) */
+};
+#endif
+
+#endif
diff --git a/include/asm-blackfin/shared_resources.h b/include/asm-blackfin/shared_resources.h
new file mode 100644
index 0000000000..fbef18618c
--- /dev/null
+++ b/include/asm-blackfin/shared_resources.h
@@ -0,0 +1,33 @@
+/*
+ * U-boot - setup.h
+ *
+ * Copyright (c) 2005 blackfin.uclinux.org
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _SHARED_RESOURCES_H_
+#define _SHARED_RESOURCES_H_
+
+void swap_to(int device_id);
+
+#define FLASH 0
+#define ETHERNET 1
+
+#endif /* _SHARED_RESOURCES_H_ */
diff --git a/include/asm-blackfin/string.h b/include/asm-blackfin/string.h
new file mode 100644
index 0000000000..ffd81d61a8
--- /dev/null
+++ b/include/asm-blackfin/string.h
@@ -0,0 +1,79 @@
+/*
+ * U-boot - string.h String functions
+ *
+ * Copyright (c) 2005 blackfin.uclinux.org
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/* Changed by Lineo Inc. May 2001 */
+
+#ifndef _BLACKFINNOMMU_STRING_H_
+#define _BLACKFINNOMMU_STRING_H_
+
+#ifdef __KERNEL__ /* only set these up for kernel code */
+
+#include <asm/setup.h>
+#include <asm/page.h>
+#include <asm/cpu/defBF533.h>
+
+#define __HAVE_ARCH_STRCPY
+#define __HAVE_ARCH_STRNCPY
+#define __HAVE_ARCH_STRCMP
+#define __HAVE_ARCH_STRNCMP
+#define __HAVE_ARCH_MEMCPY
+
+extern char *strcpy(char *dest, const char *src);
+extern char *strncpy(char *dest, const char *src, size_t n);
+extern int strcmp(const char *cs, const char *ct);
+extern int strncmp(const char *cs, const char *ct, size_t count);
+extern void * memcpy(void * dest,const void *src,size_t count);
+extern void *memset(void *s, int c, size_t count);
+extern int memcmp(const void *, const void *, __kernel_size_t);
+
+#else /* KERNEL */
+
+/*
+ * let user libraries deal with these,
+ * IMHO the kernel has no place defining these functions for user apps
+ */
+
+#define __HAVE_ARCH_STRCPY 1
+#define __HAVE_ARCH_STRNCPY 1
+#define __HAVE_ARCH_STRCAT 1
+#define __HAVE_ARCH_STRNCAT 1
+#define __HAVE_ARCH_STRCMP 1
+#define __HAVE_ARCH_STRNCMP 1
+#define __HAVE_ARCH_STRNICMP 1
+#define __HAVE_ARCH_STRCHR 1
+#define __HAVE_ARCH_STRRCHR 1
+#define __HAVE_ARCH_STRSTR 1
+#define __HAVE_ARCH_STRLEN 1
+#define __HAVE_ARCH_STRNLEN 1
+#define __HAVE_ARCH_MEMSET 1
+#define __HAVE_ARCH_MEMCPY 1
+#define __HAVE_ARCH_MEMMOVE 1
+#define __HAVE_ARCH_MEMSCAN 1
+#define __HAVE_ARCH_MEMCMP 1
+#define __HAVE_ARCH_MEMCHR 1
+#define __HAVE_ARCH_STRTOK 1
+
+#endif /* KERNEL */
+
+#endif /* _BLACKFIN_STRING_H_ */
diff --git a/include/asm-blackfin/system.h b/include/asm-blackfin/system.h
new file mode 100644
index 0000000000..0e53adfe0f
--- /dev/null
+++ b/include/asm-blackfin/system.h
@@ -0,0 +1,182 @@
+/*
+ * U-boot - system.h
+ *
+ * Copyright (c) 2005 blackfin.uclinux.org
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _BLACKFIN_SYSTEM_H
+#define _BLACKFIN_SYSTEM_H
+
+#include <linux/config.h> /* get configuration macros */
+#include <asm/linkage.h>
+#include <asm/blackfin.h>
+#include <asm/segment.h>
+#include <asm/entry.h>
+
+#define prepare_to_switch() do { } while(0)
+
+/*
+ * switch_to(n) should switch tasks to task ptr, first checking that
+ * ptr isn't the current task, in which case it does nothing. This
+ * also clears the TS-flag if the task we switched to has used the
+ * math co-processor latest.
+ *
+ * 05/25/01 - Tony Kou (tonyko@lineo.ca)
+ *
+ * Adapted for BlackFin (ADI) by Ted Ma, Metrowerks, and Motorola GSG
+ * Copyright (c) 2002 Arcturus Networks Inc. (www.arcturusnetworks.com)
+ * Copyright (c) 2003 Metrowerks (www.metrowerks.com)
+ */
+
+asmlinkage void resume(void);
+
+#define switch_to(prev,next,last) { \
+ void *_last; \
+ __asm__ __volatile__( \
+ "r0 = %1;\n\t" \
+ "r1 = %2;\n\t" \
+ "call resume;\n\t" \
+ "%0 = r0;\n\t" \
+ : "=d" (_last) \
+ : "d" (prev), \
+ "d" (next) \
+ : "CC", "R0", "R1", "R2", "R3", "R4", "R5", "P0", "P1");\
+ (last) = _last; \
+}
+
+/* Force kerenl switch to user mode -- Steven Chen */
+#define switch_to_user_mode() { \
+ __asm__ __volatile__( \
+ "call kernel_to_user_mode;\n\t" \
+ :: \
+ : "CC", "R0", "R1", "R2", "R3", "R4", "R5", "P0", "P1");\
+}
+
+/*
+ * Interrupt configuring macros.
+ */
+
+extern int irq_flags;
+
+#define __sti() { \
+ __asm__ __volatile__ ( \
+ "r3 = %0;" \
+ "sti r3;" \
+ ::"m"(irq_flags):"R3"); \
+}
+
+#define __cli() { \
+ __asm__ __volatile__ ( \
+ "cli r3;" \
+ :::"R3"); \
+}
+
+#define __save_flags(x) { \
+ __asm__ __volatile__ ( \
+ "cli r3;" \
+ "%0 = r3;" \
+ "sti r3;" \
+ ::"m"(x):"R3"); \
+}
+
+#define __save_and_cli(x) { \
+ __asm__ __volatile__ ( \
+ "cli r3;" \
+ "%0 = r3;" \
+ ::"m"(x):"R3"); \
+}
+
+#define __restore_flags(x) { \
+ __asm__ __volatile__ ( \
+ "r3 = %0;" \
+ "sti r3;" \
+ ::"m"(x):"R3"); \
+}
+
+/* For spinlocks etc */
+#define local_irq_save(x) __save_and_cli(x)
+#define local_irq_restore(x) __restore_flags(x)
+#define local_irq_disable() __cli()
+#define local_irq_enable() __sti()
+
+#define cli() __cli()
+#define sti() __sti()
+#define save_flags(x) __save_flags(x)
+#define restore_flags(x) __restore_flags(x)
+#define save_and_cli(x) __save_and_cli(x)
+
+/*
+ * Force strict CPU ordering.
+ */
+#define nop() asm volatile ("nop;\n\t"::)
+#define mb() asm volatile ("" : : :"memory")
+#define rmb() asm volatile ("" : : :"memory")
+#define wmb() asm volatile ("" : : :"memory")
+#define set_rmb(var, value) do { xchg(&var, value); } while (0)
+#define set_mb(var, value) set_rmb(var, value)
+#define set_wmb(var, value) do { var = value; wmb(); } while (0)
+
+#ifdef CONFIG_SMP
+#define smp_mb() mb()
+#define smp_rmb() rmb()
+#define smp_wmb() wmb()
+#else
+#define smp_mb() barrier()
+#define smp_rmb() barrier()
+#define smp_wmb() barrier()
+#endif
+
+#define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
+#define tas(ptr) (xchg((ptr),1))
+
+struct __xchg_dummy {
+ unsigned long a[100];
+};
+#define __xg(x) ((volatile struct __xchg_dummy *)(x))
+
+static inline unsigned long __xchg(unsigned long x, volatile void *ptr,
+ int size)
+{
+ unsigned long tmp;
+ unsigned long flags = 0;
+
+ save_and_cli(flags);
+
+ switch (size) {
+ case 1:
+ __asm__ __volatile__("%0 = %2;\n\t" "%2 = %1;\n\t": "=&d"(tmp): "d"(x), "m"(*__xg(ptr)):"memory");
+ break;
+ case 2:
+ __asm__ __volatile__("%0 = %2;\n\t" "%2 = %1;\n\t": "=&d"(tmp): "d"(x), "m"(*__xg(ptr)):"memory");
+ break;
+ case 4:
+ __asm__ __volatile__("%0 = %2;\n\t" "%2 = %1;\n\t": "=&d"(tmp): "d"(x), "m"(*__xg(ptr)):"memory");
+ break;
+ }
+ restore_flags(flags);
+ return tmp;
+}
+
+/* Depend on whether Blackfin has hard reset function */
+/* YES it does, but it is tricky to implement - FIXME later ...MaTed--- */
+#define HARD_RESET_NOW() ({})
+
+#endif /* _BLACKFIN_SYSTEM_H */
diff --git a/include/asm-blackfin/traps.h b/include/asm-blackfin/traps.h
new file mode 100644
index 0000000000..29e6eba6fa
--- /dev/null
+++ b/include/asm-blackfin/traps.h
@@ -0,0 +1,86 @@
+/*
+ * U-boot - traps.h
+ *
+ * Copyright (c) 2005 blackfin.uclinux.org
+ *
+ * This file is based on
+ * linux/include/asm/traps.h
+ * Copyright (C) 1993 Hamish Macdonald
+ * Lineo, Inc Jul 2001 Tony Kou
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ */
+
+#ifndef _BLACKFIN_TRAPS_H
+#define _BLACKFIN_TRAPS_H
+
+#ifndef __ASSEMBLY__
+typedef void (*e_vector) (void);
+extern e_vector vectors[];
+#endif
+
+#define VEC_SYS (0)
+#define VEC_EXCPT01 (1)
+#define VEC_EXCPT02 (2)
+#define VEC_EXCPT03 (3)
+#define VEC_EXCPT04 (4)
+#define VEC_EXCPT05 (5)
+#define VEC_EXCPT06 (6)
+#define VEC_EXCPT07 (7)
+#define VEC_EXCPT08 (8)
+#define VEC_EXCPT09 (9)
+#define VEC_EXCPT10 (10)
+#define VEC_EXCPT11 (11)
+#define VEC_EXCPT12 (12)
+#define VEC_EXCPT13 (13)
+#define VEC_EXCPT14 (14)
+#define VEC_EXCPT15 (15)
+#define VEC_STEP (16)
+#define VEC_OVFLOW (17)
+#define VEC_UNDEF_I (33)
+#define VEC_ILGAL_I (34)
+#define VEC_CPLB_VL (35)
+#define VEC_MISALI_D (36)
+#define VEC_UNCOV (37)
+#define VEC_CPLB_M (38)
+#define VEC_CPLB_MHIT (39)
+#define VEC_WATCH (40)
+#define VEC_ISTRU_VL (41)
+#define VEC_MISALI_I (42)
+#define VEC_CPLB_I_VL (43)
+#define VEC_CPLB_I_M (44)
+#define VEC_CPLB_I_MHIT (45)
+#define VEC_ILL_RES (46) /* including unvalid supervisor mode insn */
+
+#define VECOFF(vec) ((vec)<<2)
+
+#ifndef __ASSEMBLY__
+
+/* Status register bits */
+#define PS_T (0x8000)
+#define PS_S (0x0c00) /* Supervisor mode = 0b01 */
+#define PS_D (0x0c00) /* Debug mode = 0b1x */
+#define PS_M (0x1000)
+#define PS_C (0x0001)
+
+#endif
+#endif
diff --git a/include/asm-blackfin/types.h b/include/asm-blackfin/types.h
new file mode 100644
index 0000000000..942ed275af
--- /dev/null
+++ b/include/asm-blackfin/types.h
@@ -0,0 +1,83 @@
+/*
+ * U-boot - types.h
+ *
+ * Copyright (c) 2005 blackfin.uclinux.org
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _BLACKFIN_TYPES_H
+#define _BLACKFIN_TYPES_H
+
+/*
+ * This file is never included by application software unless
+ * explicitly requested (e.g., via linux/types.h) in which case the
+ * application is Linux specific so (user-) name space pollution is
+ * not a major issue. However, for interoperability, libraries still
+ * need to be careful to avoid a name clashes.
+ */
+
+typedef unsigned short umode_t;
+
+/*
+ * __xx is ok: it doesn't pollute the POSIX namespace. Use these in the
+ * header files exported to user space
+ */
+
+typedef __signed__ char __s8;
+typedef unsigned char __u8;
+
+typedef __signed__ short __s16;
+typedef unsigned short __u16;
+
+typedef __signed__ int __s32;
+typedef unsigned int __u32;
+
+/* HK0617 -- Changes to unsigned long temporarily */
+#if defined(__GNUC__) && !defined(__STRICT_ANSI__)
+typedef __signed__ long long __s64;
+typedef unsigned long long __u64;
+#endif
+
+/*
+ * These aren't exported outside the kernel to avoid name space clashes
+ */
+#ifdef __KERNEL__
+
+typedef signed char s8;
+typedef unsigned char u8;
+
+typedef signed short s16;
+typedef unsigned short u16;
+
+typedef signed int s32;
+typedef unsigned int u32;
+
+typedef signed long long s64;
+typedef unsigned long long u64;
+
+#define BITS_PER_LONG 32
+
+/* Dma addresses are 32-bits wide. */
+
+typedef u32 dma_addr_t;
+
+#endif
+
+#endif
diff --git a/include/asm-blackfin/u-boot.h b/include/asm-blackfin/u-boot.h
new file mode 100644
index 0000000000..ec39338039
--- /dev/null
+++ b/include/asm-blackfin/u-boot.h
@@ -0,0 +1,47 @@
+/*
+ * U-boot - u-boot.h Structure declarations for board specific data
+ *
+ * Copyright (c) 2005 blackfin.uclinux.org
+ *
+ * (C) Copyright 2000-2004
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _U_BOOT_H_
+#define _U_BOOT_H_ 1
+
+typedef struct bd_info {
+ int bi_baudrate; /* serial console baudrate */
+ unsigned long bi_ip_addr; /* IP Address */
+ unsigned char bi_enetaddr[6]; /* Ethernet adress */
+ unsigned long bi_arch_number; /* unique id for this board */
+ unsigned long bi_boot_params; /* where this board expects params */
+ unsigned long bi_memstart; /* start of DRAM memory */
+ unsigned long bi_memsize; /* size of DRAM memory in bytes */
+ unsigned long bi_flashstart; /* start of FLASH memory */
+ unsigned long bi_flashsize; /* size of FLASH memory */
+ unsigned long bi_flashoffset; /* reserved area for startup monitor */
+} bd_t;
+
+#define bi_env_data bi_env->data
+#define bi_env_crc bi_env->crc
+
+#endif /* _U_BOOT_H_ */
diff --git a/include/asm-blackfin/uaccess.h b/include/asm-blackfin/uaccess.h
new file mode 100644
index 0000000000..8578166a37
--- /dev/null
+++ b/include/asm-blackfin/uaccess.h
@@ -0,0 +1,207 @@
+/*
+ * U-boot - uaccess.h
+ *
+ * Copyright (c) 2005 blackfin.uclinux.org
+ *
+ * This file is based on
+ * Based on: include/asm-m68knommu/uaccess.h
+ * Changes made by Lineo Inc. May 2001
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __BLACKFIN_UACCESS_H
+#define __BLACKFIN_UACCESS_H
+
+/*
+ * User space memory access functions
+ */
+#include <asm/segment.h>
+#include <asm/errno.h>
+
+#define VERIFY_READ 0
+#define VERIFY_WRITE 1
+
+/* We let the MMU do all checking */
+static inline int access_ok(int type, const void *addr, unsigned long size)
+{
+ return ((unsigned long) addr < 0x10f00000); /* need final decision - Tony */
+}
+
+static inline int verify_area(int type, const void *addr,
+ unsigned long size)
+{
+ return access_ok(type, addr, size) ? 0 : -EFAULT;
+}
+
+/*
+ * The exception table consists of pairs of addresses: the first is the
+ * address of an instruction that is allowed to fault, and the second is
+ * the address at which the program should continue. No registers are
+ * modified, so it is entirely up to the continuation code to figure out
+ * what to do.
+ *
+ * All the routines below use bits of fixup code that are out of line
+ * with the main instruction path. This means when everything is well,
+ * we don't even have to jump over them. Further, they do not intrude
+ * on our cache or tlb entries.
+ */
+
+struct exception_table_entry {
+ unsigned long insn, fixup;
+};
+
+/* Returns 0 if exception not found and fixup otherwise. */
+extern unsigned long search_exception_table(unsigned long);
+
+/*
+ * These are the main single-value transfer routines. They automatically
+ * use the right size if we just have the right pointer type.
+ */
+
+#define put_user(x, ptr) \
+({ \
+ int __pu_err = 0; \
+ typeof(*(ptr)) __pu_val = (x); \
+ switch (sizeof (*(ptr))) { \
+ case 1: \
+ __put_user_asm(__pu_err, __pu_val, ptr, B); \
+ break; \
+ case 2: \
+ __put_user_asm(__pu_err, __pu_val, ptr, W); \
+ break; \
+ case 4: \
+ __put_user_asm(__pu_err, __pu_val, ptr, ); \
+ break; \
+ default: \
+ __pu_err = __put_user_bad(); \
+ break; \
+ } \
+ __pu_err; \
+})
+/*
+ * [pregs] = dregs ==> 32bits
+ * H[pregs] = dregs ==> 16bits
+ * B[pregs] = dregs ==> 8 bits
+ */
+
+#define __put_user(x, ptr) put_user(x, ptr)
+
+static inline int bad_user_access_length(void)
+{
+ panic("bad_user_access_length");
+ return -1;
+}
+
+#define __put_user_bad() (bad_user_access_length(), (-EFAULT))
+
+/*
+ * Tell gcc we read from memory instead of writing: this is because
+ * we do not write to any memory gcc knows about, so there are no
+ * aliasing issues.
+ */
+
+#define __ptr(x) ((unsigned long *)(x))
+
+#define __put_user_asm(err,x,ptr,bhw) \
+ __asm__ (#bhw"[%1] = %0;\n\t" \
+ : /* no outputs */ \
+ :"d" (x),"a" (__ptr(ptr)) : "memory")
+
+#define get_user(x, ptr) \
+({ \
+ int __gu_err = 0; \
+ typeof(*(ptr)) __gu_val = 0; \
+ switch (sizeof(*(ptr))) { \
+ case 1: \
+ __get_user_asm(__gu_err, __gu_val, ptr, B, "=d",(Z)); \
+ break; \
+ case 2: \
+ __get_user_asm(__gu_err, __gu_val, ptr, W, "=r",(Z)); \
+ break; \
+ case 4: \
+ __get_user_asm(__gu_err, __gu_val, ptr, , "=r",); \
+ break; \
+ default: \
+ __gu_val = 0; \
+ __gu_err = __get_user_bad(); \
+ break; \
+ } \
+ (x) = __gu_val; \
+ __gu_err; \
+})
+
+/* dregs = [pregs] ==> 32bits
+ * H[pregs] ==> 16bits
+ * B[pregs] ==> 8 bits
+ */
+
+#define __get_user(x, ptr) get_user(x, ptr)
+#define __get_user_bad() (bad_user_access_length(), (-EFAULT))
+
+#define __get_user_asm(err,x,ptr,bhw,reg,option) \
+ __asm__ ("%0 =" #bhw "[%1]"#option";\n\t" \
+ : "=d" (x) \
+ : "a" (__ptr(ptr)))
+
+#define copy_from_user(to, from, n) (memcpy(to, from, n), 0)
+#define copy_to_user(to, from, n) (memcpy(to, from, n), 0)
+
+#define __copy_from_user(to, from, n) copy_from_user(to, from, n)
+#define __copy_to_user(to, from, n) copy_to_user(to, from, n)
+
+#define copy_to_user_ret(to,from,n,retval) ({ if (copy_to_user(to,from,n)) return retval; })
+#define copy_from_user_ret(to,from,n,retval) ({ if (copy_from_user(to,from,n)) return retval; })
+
+/*
+ * Copy a null terminated string from userspace.
+ */
+
+static inline long strncpy_from_user(char *dst, const char *src,
+ long count)
+{
+ char *tmp;
+ strncpy(dst, src, count);
+ for (tmp = dst; *tmp && count > 0; tmp++, count--);
+ return (tmp - dst); /* DAVIDM should we count a NUL ? check getname */
+}
+
+/*
+ * Return the size of a string (including the ending 0)
+ *
+ * Return 0 on exception, a value greater than N if too long
+ */
+static inline long strnlen_user(const char *src, long n)
+{
+ return (strlen(src) + 1); /* DAVIDM make safer */
+}
+
+#define strlen_user(str) strnlen_user(str, 32767)
+
+/*
+ * Zero Userspace
+ */
+
+static inline unsigned long clear_user(void *to, unsigned long n)
+{
+ memset(to, 0, n);
+ return (0);
+}
+
+#endif
diff --git a/include/asm-blackfin/virtconvert.h b/include/asm-blackfin/virtconvert.h
new file mode 100644
index 0000000000..769f5a089c
--- /dev/null
+++ b/include/asm-blackfin/virtconvert.h
@@ -0,0 +1,47 @@
+/*
+ * U-boot - virtconvert.h
+ *
+ * Copyright (c) 2005 blackfin.uclinux.org
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __BLACKFIN_VIRT_CONVERT__
+#define __BLACKFIN_VIRT_CONVERT__
+
+/*
+ * Macros used for converting between virtual and physical mappings.
+ */
+
+#ifdef __KERNEL__
+
+#include <linux/config.h>
+#include <asm/setup.h>
+#include <asm/page.h>
+
+#define mm_vtop(vaddr) ((unsigned long) vaddr)
+#define mm_ptov(vaddr) ((unsigned long) vaddr)
+#define phys_to_virt(vaddr) ((unsigned long) vaddr)
+#define virt_to_phys(vaddr) ((unsigned long) vaddr)
+
+#define virt_to_bus virt_to_phys
+#define bus_to_virt phys_to_virt
+
+#endif
+#endif
diff --git a/include/asm-m68k/immap_5271.h b/include/asm-m68k/immap_5271.h
new file mode 100644
index 0000000000..424dc1d1ff
--- /dev/null
+++ b/include/asm-m68k/immap_5271.h
@@ -0,0 +1,98 @@
+/*
+ * MCF5272 Internal Memory Map
+ *
+ * Copyright (c) 2003 Josef Baumgartner <josef.baumgartner@telex.de>
+ * 2006 Zachary P. Landau <zachary.landau@labxtechnologies.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __IMMAP_5271__
+#define __IMMAP_5271__
+
+/* Interrupt module registers
+*/
+typedef struct int_ctrl {
+ uint int_icr1;
+ uint int_icr2;
+ uint int_icr3;
+ uint int_icr4;
+ uint int_isr;
+ uint int_pitr;
+ uint int_piwr;
+ uchar res1[3];
+ uchar int_pivr;
+} intctrl_t;
+
+/* Timer module registers
+ */
+typedef struct timer_ctrl {
+ ushort timer_tmr;
+ ushort res1;
+ ushort timer_trr;
+ ushort res2;
+ ushort timer_tcap;
+ ushort res3;
+ ushort timer_tcn;
+ ushort res4;
+ ushort timer_ter;
+ uchar res5[14];
+} timer_t;
+
+ /* Fast ethernet controller registers
+ */
+typedef struct fec {
+ uint res1;
+ uint fec_ievent;
+ uint fec_imask;
+ uint res2;
+ uint fec_r_des_active;
+ uint fec_x_des_active;
+ uint res3[3];
+ uint fec_ecntrl;
+ uint res4[6];
+ uint fec_mii_data;
+ uint fec_mii_speed;
+ uint res5[7];
+ uint fec_mibc;
+ uint res6[7];
+ uint fec_r_cntrl;
+ uint res7[15];
+ uint fec_x_cntrl;
+ uint res8[7];
+ uint fec_addr_low;
+ uint fec_addr_high;
+ uint fec_opd;
+ uint res9[10];
+ uint fec_ihash_table_high;
+ uint fec_ihash_table_low;
+ uint fec_ghash_table_high;
+ uint fec_ghash_table_low;
+ uint res10[7];
+ uint fec_tfwr;
+ uint res11;
+ uint fec_r_bound;
+ uint fec_r_fstart;
+ uint res12[11];
+ uint fec_r_des_start;
+ uint fec_x_des_start;
+ uint fec_r_buff_size;
+} fec_t;
+
+#endif /* __IMMAP_5271__ */
diff --git a/include/asm-m68k/immap_5282.h b/include/asm-m68k/immap_5282.h
index f2b77db871..6553b08696 100644
--- a/include/asm-m68k/immap_5282.h
+++ b/include/asm-m68k/immap_5282.h
@@ -13,7 +13,7 @@
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
@@ -25,39 +25,61 @@
#ifndef __IMMAP_5282__
#define __IMMAP_5282__
+struct sys_ctrl {
+ uint ipsbar;
+ char res1[4];
+ uint rambar;
+ char res2[4];
+ uchar crsr;
+ uchar cwcr;
+ uchar lpicr;
+ uchar cwsr;
+ uint dmareqc;
+ char res3[4];
+ uint mpark;
+
+ /* TODO: finish these */
+};
/* Fast ethernet controller registers
*/
typedef struct fec {
- uint fec_ecntrl; /* ethernet control register */
- uint fec_ievent; /* interrupt event register */
- uint fec_imask; /* interrupt mask register */
- uint fec_ivec; /* interrupt level and vector status */
- uint fec_r_des_active; /* Rx ring updated flag */
- uint fec_x_des_active; /* Tx ring updated flag */
- uint res3[10]; /* reserved */
- uint fec_mii_data; /* MII data register */
- uint fec_mii_speed; /* MII speed control register */
- uint res4[17]; /* reserved */
- uint fec_r_bound; /* end of RAM (read-only) */
- uint fec_r_fstart; /* Rx FIFO start address */
- uint res5[6]; /* reserved */
- uint fec_x_fstart; /* Tx FIFO start address */
- uint res7[21]; /* reserved */
- uint fec_r_cntrl; /* Rx control register */
- uint fec_r_hash; /* Rx hash register */
- uint res8[14]; /* reserved */
- uint fec_x_cntrl; /* Tx control register */
- uint res9[0x9e]; /* reserved */
- uint fec_addr_low; /* lower 32 bits of station address */
- uint fec_addr_high; /* upper 16 bits of station address */
- uint fec_hash_table_high; /* upper 32-bits of hash table */
- uint fec_hash_table_low; /* lower 32-bits of hash table */
- uint fec_r_des_start; /* beginning of Rx descriptor ring */
- uint fec_x_des_start; /* beginning of Tx descriptor ring */
- uint fec_r_buff_size; /* Rx buffer size */
- uint res2[9]; /* reserved */
- uchar fec_fifo[960]; /* fifo RAM */
+ uint res1; /* reserved 1000*/
+ uint fec_ievent; /* interrupt event register 1004*/ /* EIR */
+ uint fec_imask; /* interrupt mask register 1008*/ /* EIMR */
+ uint res2; /* reserved 100c*/
+ uint fec_r_des_active; /* Rx ring updated flag 1010*/ /* RDAR */
+ uint fec_x_des_active; /* Tx ring updated flag 1014*/ /* XDAR */
+ uint res3[3]; /* reserved 1018*/
+ uint fec_ecntrl; /* ethernet control register 1024*/ /* ECR */
+ uint res4[6]; /* reserved 1028*/
+ uint fec_mii_data; /* MII data register 1040*/ /* MDATA */
+ uint fec_mii_speed; /* MII speed control register 1044*/ /* MSCR */
+ /*1044*/
+ uint res5[7]; /* reserved 1048*/
+ uint fec_mibc; /* MIB Control/Status register 1064*/ /* MIBC */
+ uint res6[7]; /* reserved 1068*/
+ uint fec_r_cntrl; /* Rx control register 1084*/ /* RCR */
+ uint res7[15]; /* reserved 1088*/
+ uint fec_x_cntrl; /* Tx control register 10C4*/ /* TCR */
+ uint res8[7]; /* reserved 10C8*/
+ uint fec_addr_low; /* lower 32 bits of station address */ /* PALR */
+ uint fec_addr_high; /* upper 16 bits of station address */ /* PAUR */
+ uint fec_opd; /* opcode + pause duration 10EC*/ /* OPD */
+ uint res9[10]; /* reserved 10F0*/
+ uint fec_ihash_table_high; /* upper 32-bits of individual hash */ /* IAUR */
+ uint fec_ihash_table_low; /* lower 32-bits of individual hash */ /* IALR */
+ uint fec_ghash_table_high; /* upper 32-bits of group hash */ /* GAUR */
+ uint fec_ghash_table_low; /* lower 32-bits of group hash */ /* GALR */
+ uint res10[7]; /* reserved 1128*/
+ uint fec_tfwr; /* Transmit FIFO watermark 1144*/ /* TFWR */
+ uint res11; /* reserved 1148*/
+ uint fec_r_bound; /* FIFO Receive Bound Register = end of */ /* FRBR */
+ uint fec_r_fstart; /* FIFO Receive FIfo Start Registers = */ /* FRSR */
+ uint res12[11]; /* reserved 1154*/
+ uint fec_r_des_start;/* beginning of Rx descriptor ring 1180*/ /* ERDSR */
+ uint fec_x_des_start;/* beginning of Tx descriptor ring 1184*/ /* ETDSR */
+ uint fec_r_buff_size;/* Rx buffer size 1188*/ /* EMRBR */
} fec_t;
#endif /* __IMMAP_5282__ */
diff --git a/include/asm-m68k/m5271.h b/include/asm-m68k/m5271.h
new file mode 100644
index 0000000000..765414fdc3
--- /dev/null
+++ b/include/asm-m68k/m5271.h
@@ -0,0 +1,114 @@
+/*
+ * mcf5271.h -- Definitions for Motorola Coldfire 5271
+ *
+ * (C) Copyright 2006, Lab X Technologies <zachary.landau@labxtechnologies.com>
+ * Based on mcf5272sim.h of uCLinux distribution:
+ * (C) Copyright 1999, Greg Ungerer (gerg@snapgear.com)
+ * (C) Copyright 2000, Lineo Inc. (www.lineo.com)
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+
+#ifndef _MCF5271_H_
+#define _MCF5271_H_
+
+#define mbar_readLong(x) *((volatile unsigned long *) (CFG_MBAR + x))
+#define mbar_readShort(x) *((volatile unsigned short *) (CFG_MBAR + x))
+#define mbar_readByte(x) *((volatile unsigned char *) (CFG_MBAR + x))
+#define mbar_writeLong(x,y) *((volatile unsigned long *) (CFG_MBAR + x)) = y
+#define mbar_writeShort(x,y) *((volatile unsigned short *) (CFG_MBAR + x)) = y
+#define mbar_writeByte(x,y) *((volatile unsigned char *) (CFG_MBAR + x)) = y
+
+#define MCF_FMPLL_SYNCR 0x120000
+#define MCF_FMPLL_SYNSR 0x120004
+#define MCF_FMPLL_SYNCR_MFD(x) ((x&0x7)<<24)
+#define MCF_FMPLL_SYNCR_RFD(x) ((x&0x7)<<19)
+#define MCF_FMPLL_SYNSR_LOCK 0x8
+
+#define MCF_WTM_WCR 0x140000
+#define MCF_WTM_WCNTR 0x140004
+#define MCF_WTM_WSR 0x140006
+#define MCF_WTM_WCR_EN 0x0001
+
+#define MCF_RCM_RCR 0x110000
+#define MCF_RCM_RCR_FRCRSTOUT 0x40
+#define MCF_RCM_RCR_SOFTRST 0x80
+
+#define MCF_GPIO_PAR_AD 0x100040
+#define MCF_GPIO_PAR_CS 0x100045
+#define MCF_GPIO_PAR_SDRAM 0x100046
+#define MCF_GPIO_PAR_FECI2C 0x100047
+#define MCF_GPIO_PAR_UART 0x100048
+
+#define MCF_GPIO_AD_ADDR23 0x80
+#define MCF_GPIO_AD_ADDR22 0x40
+#define MCF_GPIO_AD_ADDR21 0x20
+#define MCF_GPIO_AD_DATAL 0x01
+#define MCF_GPIO_AD_MASK 0xe1
+
+#define MCF_GPIO_PAR_CS_PAR_CS2 0x04
+
+#define MCF_GPIO_SDRAM_CSSDCS_00 0x00 /* CS[3:2] pins: CS3, CS2 */
+#define MCF_GPIO_SDRAM_CSSDCS_01 0x40 /* CS[3:2] pins: CS3, SD_CS0 */
+#define MCF_GPIO_SDRAM_CSSDCS_10 0x80 /* CS[3:2] pins: SD_CS1, SC2 */
+#define MCF_GPIO_SDRAM_CSSDCS_11 0xc0 /* CS[3:2] pins: SD_CS1, SD_CS0 */
+#define MCF_GPIO_SDRAM_SDWE 0x20 /* WE pin */
+#define MCF_GPIO_SDRAM_SCAS 0x10 /* CAS pin */
+#define MCF_GPIO_SDRAM_SRAS 0x08 /* RAS pin */
+#define MCF_GPIO_SDRAM_SCKE 0x04 /* CKE pin */
+#define MCF_GPIO_SDRAM_SDCS_00 0x00 /* SD_CS[0:1] pins: GPIO, GPIO */
+#define MCF_GPIO_SDRAM_SDCS_01 0x01 /* SD_CS[0:1] pins: GPIO, SD_CS0 */
+#define MCF_GPIO_SDRAM_SDCS_10 0x02 /* SD_CS[0:1] pins: SD_CS1, GPIO */
+#define MCF_GPIO_SDRAM_SDCS_11 0x03 /* SD_CS[0:1] pins: SD_CS1, SD_CS0 */
+
+#define MCF_GPIO_PAR_UART_U0RTS 0x0001
+#define MCF_GPIO_PAR_UART_U0CTS 0x0002
+#define MCF_GPIO_PAR_UART_U0TXD 0x0004
+#define MCF_GPIO_PAR_UART_U0RXD 0x0008
+#define MCF_GPIO_PAR_UART_U1RXD_UART1 0x0C00
+#define MCF_GPIO_PAR_UART_U1TXD_UART1 0x0300
+
+#define MCF_GPIO_PAR_SDRAM_PAR_CSSDCS(x) (((x)&0x03)<<6)
+
+#define MCF_SDRAMC_DCR 0x000040
+#define MCF_SDRAMC_DACR0 0x000048
+#define MCF_SDRAMC_DMR0 0x00004C
+
+#define MCF_SDRAMC_DCR_RC(x) (((x)&0x01FF)<<0)
+#define MCF_SDRAMC_DCR_RTIM(x) (((x)&0x0003)<<9)
+#define MCF_SDRAMC_DCR_IS 0x0800
+#define MCF_SDRAMC_DCR_COC 0x1000
+#define MCF_SDRAMC_DCR_NAM 0x2000
+
+#define MCF_SDRAMC_DACRn_IP 0x00000008
+#define MCF_SDRAMC_DACRn_PS(x) (((x)&0x00000003)<<4)
+#define MCF_SDRAMC_DACRn_MRS 0x00000040
+#define MCF_SDRAMC_DACRn_CBM(x) (((x)&0x00000007)<<8)
+#define MCF_SDRAMC_DACRn_CASL(x) (((x)&0x00000003)<<12)
+#define MCF_SDRAMC_DACRn_RE 0x00008000
+#define MCF_SDRAMC_DACRn_BA(x) (((x)&0x00003FFF)<<18)
+
+#define MCF_SDRAMC_DMRn_BAM_8M 0x007C0000
+#define MCF_SDRAMC_DMRn_BAM_16M 0x00FC0000
+#define MCF_SDRAMC_DMRn_V 0x00000001
+
+#define MCFSIM_ICR1 0x000C41
+
+#endif /* _MCF5271_H_ */
diff --git a/include/asm-m68k/m5282.h b/include/asm-m68k/m5282.h
index 073b0bc790..e5058a46aa 100644
--- a/include/asm-m68k/m5282.h
+++ b/include/asm-m68k/m5282.h
@@ -1,9 +1,6 @@
/*
* mcf5282.h -- Definitions for Motorola Coldfire 5282
*
- * Based on mcf5282sim.h of uCLinux distribution:
- * (C) Copyright 1999, Greg Ungerer (gerg@snapgear.com)
- *
* See file CREDITS for list of people who contributed to this
* project.
*
@@ -34,27 +31,515 @@
#define INT_RAM_SIZE 65536
+/* General Purpose I/O Module GPIO */
-/*
- * Define the 5282 SIM register set addresses.
- */
-#define MCFICM_INTC0 0x0c00 /* Base for Interrupt Ctrl 0 */
-#define MCFICM_INTC1 0x0d00 /* Base for Interrupt Ctrl 0 */
-#define MCFINTC_IPRH 0x00 /* Interrupt pending 32-63 */
-#define MCFINTC_IPRL 0x04 /* Interrupt pending 1-31 */
-#define MCFINTC_IMRH 0x08 /* Interrupt mask 32-63 */
-#define MCFINTC_IMRL 0x0c /* Interrupt mask 1-31 */
-#define MCFINTC_INTFRCH 0x10 /* Interrupt force 32-63 */
-#define MCFINTC_INTFRCL 0x14 /* Interrupt force 1-31 */
-#define MCFINTC_IRLR 0x18 /* */
-#define MCFINTC_IACKL 0x19 /* */
-#define MCFINTC_ICR0 0x40 /* Base ICR register */
-
-#define MCFINT_UART0 13 /* Interrupt number for UART0 */
-#define MCFINT_PIT1 55 /* Interrupt number for PIT1 */
-
-#define MCF5282_GPIO_PUAPAR 0x10005C
+#define MCFGPIO_PORTA (*(vu_char *) (CFG_MBAR+0x100000))
+#define MCFGPIO_PORTB (*(vu_char *) (CFG_MBAR+0x100001))
+#define MCFGPIO_PORTC (*(vu_char *) (CFG_MBAR+0x100002))
+#define MCFGPIO_PORTD (*(vu_char *) (CFG_MBAR+0x100003))
+#define MCFGPIO_PORTE (*(vu_char *) (CFG_MBAR+0x100004))
+#define MCFGPIO_PORTF (*(vu_char *) (CFG_MBAR+0x100005))
+#define MCFGPIO_PORTG (*(vu_char *) (CFG_MBAR+0x100006))
+#define MCFGPIO_PORTH (*(vu_char *) (CFG_MBAR+0x100007))
+#define MCFGPIO_PORTJ (*(vu_char *) (CFG_MBAR+0x100008))
+#define MCFGPIO_PORTDD (*(vu_char *) (CFG_MBAR+0x100009))
+#define MCFGPIO_PORTEH (*(vu_char *) (CFG_MBAR+0x10000A))
+#define MCFGPIO_PORTEL (*(vu_char *) (CFG_MBAR+0x10000B))
+#define MCFGPIO_PORTAS (*(vu_char *) (CFG_MBAR+0x10000C))
+#define MCFGPIO_PORTQS (*(vu_char *) (CFG_MBAR+0x10000D))
+#define MCFGPIO_PORTSD (*(vu_char *) (CFG_MBAR+0x10000E))
+#define MCFGPIO_PORTTC (*(vu_char *) (CFG_MBAR+0x10000F))
+#define MCFGPIO_PORTTD (*(vu_char *) (CFG_MBAR+0x100010))
+#define MCFGPIO_PORTUA (*(vu_char *) (CFG_MBAR+0x100011))
+
+#define MCFGPIO_DDRA (*(vu_char *) (CFG_MBAR+0x100014))
+#define MCFGPIO_DDRB (*(vu_char *) (CFG_MBAR+0x100015))
+#define MCFGPIO_DDRC (*(vu_char *) (CFG_MBAR+0x100016))
+#define MCFGPIO_DDRD (*(vu_char *) (CFG_MBAR+0x100017))
+#define MCFGPIO_DDRE (*(vu_char *) (CFG_MBAR+0x100018))
+#define MCFGPIO_DDRF (*(vu_char *) (CFG_MBAR+0x100019))
+#define MCFGPIO_DDRG (*(vu_char *) (CFG_MBAR+0x10001A))
+#define MCFGPIO_DDRH (*(vu_char *) (CFG_MBAR+0x10001B))
+#define MCFGPIO_DDRJ (*(vu_char *) (CFG_MBAR+0x10001C))
+#define MCFGPIO_DDRDD (*(vu_char *) (CFG_MBAR+0x10001D))
+#define MCFGPIO_DDREH (*(vu_char *) (CFG_MBAR+0x10001E))
+#define MCFGPIO_DDREL (*(vu_char *) (CFG_MBAR+0x10001F))
+#define MCFGPIO_DDRAS (*(vu_char *) (CFG_MBAR+0x100020))
+#define MCFGPIO_DDRQS (*(vu_char *) (CFG_MBAR+0x100021))
+#define MCFGPIO_DDRSD (*(vu_char *) (CFG_MBAR+0x100022))
+#define MCFGPIO_DDRTC (*(vu_char *) (CFG_MBAR+0x100023))
+#define MCFGPIO_DDRTD (*(vu_char *) (CFG_MBAR+0x100024))
+#define MCFGPIO_DDRUA (*(vu_char *) (CFG_MBAR+0x100025))
+
+#define MCFGPIO_PORTAP (*(vu_char *) (CFG_MBAR+0x100028))
+#define MCFGPIO_PORTBP (*(vu_char *) (CFG_MBAR+0x100029))
+#define MCFGPIO_PORTCP (*(vu_char *) (CFG_MBAR+0x10002A))
+#define MCFGPIO_PORTDP (*(vu_char *) (CFG_MBAR+0x10002B))
+#define MCFGPIO_PORTEP (*(vu_char *) (CFG_MBAR+0x10002C))
+#define MCFGPIO_PORTFP (*(vu_char *) (CFG_MBAR+0x10002D))
+#define MCFGPIO_PORTGP (*(vu_char *) (CFG_MBAR+0x10002E))
+#define MCFGPIO_PORTHP (*(vu_char *) (CFG_MBAR+0x10002F))
+#define MCFGPIO_PORTJP (*(vu_char *) (CFG_MBAR+0x100030))
+#define MCFGPIO_PORTDDP (*(vu_char *) (CFG_MBAR+0x100031))
+#define MCFGPIO_PORTEHP (*(vu_char *) (CFG_MBAR+0x100032))
+#define MCFGPIO_PORTELP (*(vu_char *) (CFG_MBAR+0x100033))
+#define MCFGPIO_PORTASP (*(vu_char *) (CFG_MBAR+0x100034))
+#define MCFGPIO_PORTQSP (*(vu_char *) (CFG_MBAR+0x100035))
+#define MCFGPIO_PORTSDP (*(vu_char *) (CFG_MBAR+0x100036))
+#define MCFGPIO_PORTTCP (*(vu_char *) (CFG_MBAR+0x100037))
+#define MCFGPIO_PORTTDP (*(vu_char *) (CFG_MBAR+0x100038))
+#define MCFGPIO_PORTUAP (*(vu_char *) (CFG_MBAR+0x100039))
+
+#define MCFGPIO_SETA (*(vu_char *) (CFG_MBAR+0x100028))
+#define MCFGPIO_SETB (*(vu_char *) (CFG_MBAR+0x100029))
+#define MCFGPIO_SETC (*(vu_char *) (CFG_MBAR+0x10002A))
+#define MCFGPIO_SETD (*(vu_char *) (CFG_MBAR+0x10002B))
+#define MCFGPIO_SETE (*(vu_char *) (CFG_MBAR+0x10002C))
+#define MCFGPIO_SETF (*(vu_char *) (CFG_MBAR+0x10002D))
+#define MCFGPIO_SETG (*(vu_char *) (CFG_MBAR+0x10002E))
+#define MCFGPIO_SETH (*(vu_char *) (CFG_MBAR+0x10002F))
+#define MCFGPIO_SETJ (*(vu_char *) (CFG_MBAR+0x100030))
+#define MCFGPIO_SETDD (*(vu_char *) (CFG_MBAR+0x100031))
+#define MCFGPIO_SETEH (*(vu_char *) (CFG_MBAR+0x100032))
+#define MCFGPIO_SETEL (*(vu_char *) (CFG_MBAR+0x100033))
+#define MCFGPIO_SETAS (*(vu_char *) (CFG_MBAR+0x100034))
+#define MCFGPIO_SETQS (*(vu_char *) (CFG_MBAR+0x100035))
+#define MCFGPIO_SETSD (*(vu_char *) (CFG_MBAR+0x100036))
+#define MCFGPIO_SETTC (*(vu_char *) (CFG_MBAR+0x100037))
+#define MCFGPIO_SETTD (*(vu_char *) (CFG_MBAR+0x100038))
+#define MCFGPIO_SETUA (*(vu_char *) (CFG_MBAR+0x100039))
+
+#define MCFGPIO_CLRA (*(vu_char *) (CFG_MBAR+0x10003C))
+#define MCFGPIO_CLRB (*(vu_char *) (CFG_MBAR+0x10003D))
+#define MCFGPIO_CLRC (*(vu_char *) (CFG_MBAR+0x10003E))
+#define MCFGPIO_CLRD (*(vu_char *) (CFG_MBAR+0x10003F))
+#define MCFGPIO_CLRE (*(vu_char *) (CFG_MBAR+0x100040))
+#define MCFGPIO_CLRF (*(vu_char *) (CFG_MBAR+0x100041))
+#define MCFGPIO_CLRG (*(vu_char *) (CFG_MBAR+0x100042))
+#define MCFGPIO_CLRH (*(vu_char *) (CFG_MBAR+0x100043))
+#define MCFGPIO_CLRJ (*(vu_char *) (CFG_MBAR+0x100044))
+#define MCFGPIO_CLRDD (*(vu_char *) (CFG_MBAR+0x100045))
+#define MCFGPIO_CLREH (*(vu_char *) (CFG_MBAR+0x100046))
+#define MCFGPIO_CLREL (*(vu_char *) (CFG_MBAR+0x100047))
+#define MCFGPIO_CLRAS (*(vu_char *) (CFG_MBAR+0x100048))
+#define MCFGPIO_CLRQS (*(vu_char *) (CFG_MBAR+0x100049))
+#define MCFGPIO_CLRSD (*(vu_char *) (CFG_MBAR+0x10004A))
+#define MCFGPIO_CLRTC (*(vu_char *) (CFG_MBAR+0x10004B))
+#define MCFGPIO_CLRTD (*(vu_char *) (CFG_MBAR+0x10004C))
+#define MCFGPIO_CLRUA (*(vu_char *) (CFG_MBAR+0x10004D))
+
+#define MCFGPIO_PBCDPAR (*(vu_char *) (CFG_MBAR+0x100050))
+#define MCFGPIO_PFPAR (*(vu_char *) (CFG_MBAR+0x100051))
+#define MCFGPIO_PEPAR (*(vu_short *)(CFG_MBAR+0x100052))
+#define MCFGPIO_PJPAR (*(vu_char *) (CFG_MBAR+0x100054))
+#define MCFGPIO_PSDPAR (*(vu_char *) (CFG_MBAR+0x100055))
+#define MCFGPIO_PASPAR (*(vu_short *)(CFG_MBAR+0x100056))
+#define MCFGPIO_PEHLPAR (*(vu_char *) (CFG_MBAR+0x100058))
+#define MCFGPIO_PQSPAR (*(vu_char *) (CFG_MBAR+0x100059))
+#define MCFGPIO_PTCPAR (*(vu_char *) (CFG_MBAR+0x10005A))
+#define MCFGPIO_PTDPAR (*(vu_char *) (CFG_MBAR+0x10005B))
+#define MCFGPIO_PUAPAR (*(vu_char *) (CFG_MBAR+0x10005C))
+
+/* Bit level definitions and macros */
+#define MCFGPIO_PORT7 (0x80)
+#define MCFGPIO_PORT6 (0x40)
+#define MCFGPIO_PORT5 (0x20)
+#define MCFGPIO_PORT4 (0x10)
+#define MCFGPIO_PORT3 (0x08)
+#define MCFGPIO_PORT2 (0x04)
+#define MCFGPIO_PORT1 (0x02)
+#define MCFGPIO_PORT0 (0x01)
+#define MCFGPIO_PORT(x) (0x01<<x)
+
+#define MCFGPIO_DDR7 (0x80)
+#define MCFGPIO_DDR6 (0x40)
+#define MCFGPIO_DDR5 (0x20)
+#define MCFGPIO_DDR4 (0x10)
+#define MCFGPIO_DDR3 (0x08)
+#define MCFGPIO_DDR2 (0x04)
+#define MCFGPIO_DDR1 (0x02)
+#define MCFGPIO_DDR0 (0x01)
+#define MCFGPIO_DDR(x) (0x01<<x)
+
+#define MCFGPIO_Px7 (0x80)
+#define MCFGPIO_Px6 (0x40)
+#define MCFGPIO_Px5 (0x20)
+#define MCFGPIO_Px4 (0x10)
+#define MCFGPIO_Px3 (0x08)
+#define MCFGPIO_Px2 (0x04)
+#define MCFGPIO_Px1 (0x02)
+#define MCFGPIO_Px0 (0x01)
+#define MCFGPIO_Px(x) (0x01<<x)
+
+
+#define MCFGPIO_PBCDPAR_PBPA (0x80)
+#define MCFGPIO_PBCDPAR_PCDPA (0x40)
+
+#define MCFGPIO_PEPAR_PEPA7 (0x4000)
+#define MCFGPIO_PEPAR_PEPA6 (0x1000)
+#define MCFGPIO_PEPAR_PEPA5 (0x0400)
+#define MCFGPIO_PEPAR_PEPA4 (0x0100)
+#define MCFGPIO_PEPAR_PEPA3 (0x0040)
+#define MCFGPIO_PEPAR_PEPA2 (0x0010)
+#define MCFGPIO_PEPAR_PEPA1(x) (((x)&0x3)<<2)
+#define MCFGPIO_PEPAR_PEPA0(x) (((x)&0x3))
+
+#define MCFGPIO_PFPAR_PFPA7 (0x80)
+#define MCFGPIO_PFPAR_PFPA6 (0x40)
+#define MCFGPIO_PFPAR_PFPA5 (0x20)
+
+#define MCFGPIO_PJPAR_PJPA7 (0x80)
+#define MCFGPIO_PJPAR_PJPA6 (0x40)
+#define MCFGPIO_PJPAR_PJPA5 (0x20)
+#define MCFGPIO_PJPAR_PJPA4 (0x10)
+#define MCFGPIO_PJPAR_PJPA3 (0x08)
+#define MCFGPIO_PJPAR_PJPA2 (0x04)
+#define MCFGPIO_PJPAR_PJPA1 (0x02)
+#define MCFGPIO_PJPAR_PJPA0 (0x01)
+#define MCFGPIO_PJPAR_PJPA(x) (0x01<<x)
+
+#define MCFGPIO_PSDPAR_PSDPA (0x80)
+
+#define MCFGPIO_PASPAR_PASPA5(x) (((x)&0x3)<<10)
+#define MCFGPIO_PASPAR_PASPA4(x) (((x)&0x3)<<8)
+#define MCFGPIO_PASPAR_PASPA3(x) (((x)&0x3)<<6)
+#define MCFGPIO_PASPAR_PASPA2(x) (((x)&0x3)<<4)
+#define MCFGPIO_PASPAR_PASPA1(x) (((x)&0x3)<<2)
+#define MCFGPIO_PASPAR_PASPA0(x) (((x)&0x3))
+
+#define MCFGPIO_PEHLPAR_PEHPA (0x80)
+#define MCFGPIO_PEHLPAR_PELPA (0x40)
+
+#define MCFGPIO_PQSPAR_PQSPA6 (0x40)
+#define MCFGPIO_PQSPAR_PQSPA5 (0x20)
+#define MCFGPIO_PQSPAR_PQSPA4 (0x10)
+#define MCFGPIO_PQSPAR_PQSPA3 (0x08)
+#define MCFGPIO_PQSPAR_PQSPA2 (0x04)
+#define MCFGPIO_PQSPAR_PQSPA1 (0x02)
+#define MCFGPIO_PQSPAR_PQSPA0 (0x01)
+#define MCFGPIO_PQSPAR_PQSPA(x) (0x01<<x)
+
+#define MCFGPIO_PTCPAR_PTCPA3(x) (((x)&0x3)<<6)
+#define MCFGPIO_PTCPAR_PTCPA2(x) (((x)&0x3)<<4)
+#define MCFGPIO_PTCPAR_PTCPA1(x) (((x)&0x3)<<2)
+#define MCFGPIO_PTCPAR_PTCPA0(x) (((x)&0x3))
+
+#define MCFGPIO_PTDPAR_PTDPA3(x) (((x)&0x3)<<6)
+#define MCFGPIO_PTDPAR_PTDPA2(x) (((x)&0x3)<<4)
+#define MCFGPIO_PTDPAR_PTDPA1(x) (((x)&0x3)<<2)
+#define MCFGPIO_PTDPAR_PTDPA0(x) (((x)&0x3))
+
+#define MCFGPIO_PUAPAR_PUAPA3 (0x08)
+#define MCFGPIO_PUAPAR_PUAPA2 (0x04)
+#define MCFGPIO_PUAPAR_PUAPA1 (0x02)
+#define MCFGPIO_PUAPAR_PUAPA0 (0x01)
+
+/* System Conrol Module SCM */
+
+#define MCFSCM_RAMBAR (*(vu_long *) (CFG_MBAR+0x00000008))
+#define MCFSCM_CRSR (*(vu_char *) (CFG_MBAR+0x00000010))
+#define MCFSCM_CWCR (*(vu_char *) (CFG_MBAR+0x00000011))
+#define MCFSCM_LPICR (*(vu_char *) (CFG_MBAR+0x00000012))
+#define MCFSCM_CWSR (*(vu_char *) (CFG_MBAR+0x00000013))
+
+#define MCFSCM_MPARK (*(vu_long *) (CFG_MBAR+0x0000001C))
+#define MCFSCM_MPR (*(vu_char *) (CFG_MBAR+0x00000020))
+#define MCFSCM_PACR0 (*(vu_char *) (CFG_MBAR+0x00000024))
+#define MCFSCM_PACR1 (*(vu_char *) (CFG_MBAR+0x00000025))
+#define MCFSCM_PACR2 (*(vu_char *) (CFG_MBAR+0x00000026))
+#define MCFSCM_PACR3 (*(vu_char *) (CFG_MBAR+0x00000027))
+#define MCFSCM_PACR4 (*(vu_char *) (CFG_MBAR+0x00000028))
+#define MCFSCM_PACR5 (*(vu_char *) (CFG_MBAR+0x0000002A))
+#define MCFSCM_PACR6 (*(vu_char *) (CFG_MBAR+0x0000002B))
+#define MCFSCM_PACR7 (*(vu_char *) (CFG_MBAR+0x0000002C))
+#define MCFSCM_PACR8 (*(vu_char *) (CFG_MBAR+0x0000002E))
+#define MCFSCM_GPACR0 (*(vu_char *) (CFG_MBAR+0x00000030))
+#define MCFSCM_GPACR1 (*(vu_char *) (CFG_MBAR+0x00000031))
+
+
+#define MCFSCM_CRSR_EXT (0x80)
+#define MCFSCM_CRSR_CWDR (0x20)
+#define MCFSCM_RAMBAR_BA(x) ((x)&0xFFFF0000)
+#define MCFSCM_RAMBAR_BDE (0x00000200)
+
+/* Reset Controller Module RCM */
+
+#define MCFRESET_RCR (*(vu_char *) (CFG_MBAR+0x00110000))
+#define MCFRESET_RSR (*(vu_char *) (CFG_MBAR+0x00110001))
+
+#define MCFRESET_RCR_SOFTRST (0x80)
+#define MCFRESET_RCR_FRCRSTOUT (0x40)
+#define MCFRESET_RCR_LVDF (0x10)
+#define MCFRESET_RCR_LVDIE (0x08)
+#define MCFRESET_RCR_LVDRE (0x04)
+#define MCFRESET_RCR_LVDE (0x01)
+
+#define MCFRESET_RSR_LVD (0x40)
+#define MCFRESET_RSR_SOFT (0x20)
+#define MCFRESET_RSR_WDR (0x10)
+#define MCFRESET_RSR_POR (0x08)
+#define MCFRESET_RSR_EXT (0x04)
+#define MCFRESET_RSR_LOC (0x02)
+#define MCFRESET_RSR_LOL (0x01)
+#define MCFRESET_RSR_ALL (0x7F)
+#define MCFRESET_RCR_SOFTRST (0x80)
+#define MCFRESET_RCR_FRCRSTOUT (0x40)
+
+/* Chip Configuration Module CCM */
+
+#define MCFCCM_CCR (*(vu_short *)(CFG_MBAR+0x00110004))
+#define MCFCCM_RCON (*(vu_short *)(CFG_MBAR+0x00110008))
+#define MCFCCM_CIR (*(vu_short *)(CFG_MBAR+0x0011000A))
+
+
+/* Bit level definitions and macros */
+#define MCFCCM_CCR_LOAD (0x8000)
+#define MCFCCM_CCR_MODE(x) (((x)&0x0007)<<8)
+#define MCFCCM_CCR_SZEN (0x0040)
+#define MCFCCM_CCR_PSTEN (0x0020)
+#define MCFCCM_CCR_BME (0x0008)
+#define MCFCCM_CCR_BMT(x) (((x)&0x0007))
+
+#define MCFCCM_CIR_PIN_MASK (0xFF00)
+#define MCFCCM_CIR_PRN_MASK (0x00FF)
+
+/* Clock Module */
+
+#define MCFCLOCK_SYNCR (*(vu_short *)(CFG_MBAR+0x120000))
+#define MCFCLOCK_SYNSR (*(vu_char *) (CFG_MBAR+0x120002))
+
+#define MCFCLOCK_SYNCR_MFD(x) (((x)&0x0007)<<12)
+#define MCFCLOCK_SYNCR_RFD(x) (((x)&0x0007)<<8)
+#define MCFCLOCK_SYNSR_LOCK 0x08
+
+#define MCFSDRAMC_DCR (*(vu_short *)(CFG_MBAR+0x00000040))
+#define MCFSDRAMC_DACR0 (*(vu_long *) (CFG_MBAR+0x00000048))
+#define MCFSDRAMC_DMR0 (*(vu_long *) (CFG_MBAR+0x0000004c))
+#define MCFSDRAMC_DACR1 (*(vu_long *) (CFG_MBAR+0x00000050))
+#define MCFSDRAMC_DMR1 (*(vu_long *) (CFG_MBAR+0x00000054))
+
+#define MCFSDRAMC_DCR_NAM (0x2000)
+#define MCFSDRAMC_DCR_COC (0x1000)
+#define MCFSDRAMC_DCR_IS (0x0800)
+#define MCFSDRAMC_DCR_RTIM_3 (0x0000)
+#define MCFSDRAMC_DCR_RTIM_6 (0x0200)
+#define MCFSDRAMC_DCR_RTIM_9 (0x0400)
+#define MCFSDRAMC_DCR_RC(x) ((x)&0x01FF)
+
+#define MCFSDRAMC_DACR_BASE(x) ((x)&0xFFFC0000)
+#define MCFSDRAMC_DACR_RE (0x00008000)
+#define MCFSDRAMC_DACR_CASL(x) (((x)&0x03)<<12)
+#define MCFSDRAMC_DACR_CBM(x) (((x)&0x07)<<8)
+#define MCFSDRAMC_DACR_PS_32 (0x00000000)
+#define MCFSDRAMC_DACR_PS_16 (0x00000020)
+#define MCFSDRAMC_DACR_PS_8 (0x00000010)
+#define MCFSDRAMC_DACR_IP (0x00000008)
+#define MCFSDRAMC_DACR_IMRS (0x00000040)
+
+#define MCFSDRAMC_DMR_BAM_16M (0x00FC0000)
+#define MCFSDRAMC_DMR_WP (0x00000100)
+#define MCFSDRAMC_DMR_CI (0x00000040)
+#define MCFSDRAMC_DMR_AM (0x00000020)
+#define MCFSDRAMC_DMR_SC (0x00000010)
+#define MCFSDRAMC_DMR_SD (0x00000008)
+#define MCFSDRAMC_DMR_UC (0x00000004)
+#define MCFSDRAMC_DMR_UD (0x00000002)
+#define MCFSDRAMC_DMR_V (0x00000001)
+
+#define MCFWTM_WCR (*(vu_short *)(CFG_MBAR+0x00140000))
+#define MCFWTM_WMR (*(vu_short *)(CFG_MBAR+0x00140002))
+#define MCFWTM_WCNTR (*(vu_short *)(CFG_MBAR+0x00140004))
+#define MCFWTM_WSR (*(vu_short *)(CFG_MBAR+0x00140006))
+
+/* Chip SELECT Module CSM */
+#define MCFCSM_CSAR0 (*(vu_short *)(CFG_MBAR+0x00000080))
+#define MCFCSM_CSMR0 (*(vu_long *) (CFG_MBAR+0x00000084))
+#define MCFCSM_CSCR0 (*(vu_short *)(CFG_MBAR+0x0000008a))
+#define MCFCSM_CSAR1 (*(vu_short *)(CFG_MBAR+0x0000008C))
+#define MCFCSM_CSMR1 (*(vu_long *) (CFG_MBAR+0x00000090))
+#define MCFCSM_CSCR1 (*(vu_short *)(CFG_MBAR+0x00000096))
+#define MCFCSM_CSAR2 (*(vu_short *)(CFG_MBAR+0x00000098))
+#define MCFCSM_CSMR2 (*(vu_long *) (CFG_MBAR+0x0000009C))
+#define MCFCSM_CSCR2 (*(vu_short *)(CFG_MBAR+0x000000A2))
+#define MCFCSM_CSAR3 (*(vu_short *)(CFG_MBAR+0x000000A4))
+#define MCFCSM_CSMR3 (*(vu_long *) (CFG_MBAR+0x000000A8))
+#define MCFCSM_CSCR3 (*(vu_short *)(CFG_MBAR+0x000000AE))
+
+#define MCFCSM_CSMR_BAM(x) ((x) & 0xFFFF0000)
+#define MCFCSM_CSMR_WP (1<<8)
+#define MCFCSM_CSMR_V (0x01)
+#define MCFCSM_CSCR_WS(x) ((x & 0x0F)<<10)
+#define MCFCSM_CSCR_AA (0x0100)
+#define MCFCSM_CSCR_PS_32 (0x0000)
+#define MCFCSM_CSCR_PS_8 (0x0040)
+#define MCFCSM_CSCR_PS_16 (0x0080)
+
+/*********************************************************************
+*
+* General Purpose Timer (GPT) Module
+*
+*********************************************************************/
+
+#define MCFGPTA_GPTIOS (*(vu_char *)(CFG_MBAR+0x1A0000))
+#define MCFGPTA_GPTCFORC (*(vu_char *)(CFG_MBAR+0x1A0001))
+#define MCFGPTA_GPTOC3M (*(vu_char *)(CFG_MBAR+0x1A0002))
+#define MCFGPTA_GPTOC3D (*(vu_char *)(CFG_MBAR+0x1A0003))
+#define MCFGPTA_GPTCNT (*(vu_short *)(CFG_MBAR+0x1A0004))
+#define MCFGPTA_GPTSCR1 (*(vu_char *)(CFG_MBAR+0x1A0006))
+#define MCFGPTA_GPTTOV (*(vu_char *)(CFG_MBAR+0x1A0008))
+#define MCFGPTA_GPTCTL1 (*(vu_char *)(CFG_MBAR+0x1A0009))
+#define MCFGPTA_GPTCTL2 (*(vu_char *)(CFG_MBAR+0x1A000B))
+#define MCFGPTA_GPTIE (*(vu_char *)(CFG_MBAR+0x1A000C))
+#define MCFGPTA_GPTSCR2 (*(vu_char *)(CFG_MBAR+0x1A000D))
+#define MCFGPTA_GPTFLG1 (*(vu_char *)(CFG_MBAR+0x1A000E))
+#define MCFGPTA_GPTFLG2 (*(vu_char *)(CFG_MBAR+0x1A000F))
+#define MCFGPTA_GPTC0 (*(vu_short *)(CFG_MBAR+0x1A0010))
+#define MCFGPTA_GPTC1 (*(vu_short *)(CFG_MBAR+0x1A0012))
+#define MCFGPTA_GPTC2 (*(vu_short *)(CFG_MBAR+0x1A0014))
+#define MCFGPTA_GPTC3 (*(vu_short *)(CFG_MBAR+0x1A0016))
+#define MCFGPTA_GPTPACTL (*(vu_char *)(CFG_MBAR+0x1A0018))
+#define MCFGPTA_GPTPAFLG (*(vu_char *)(CFG_MBAR+0x1A0019))
+#define MCFGPTA_GPTPACNT (*(vu_short *)(CFG_MBAR+0x1A001A))
+#define MCFGPTA_GPTPORT (*(vu_char *)(CFG_MBAR+0x1A001D))
+#define MCFGPTA_GPTDDR (*(vu_char *)(CFG_MBAR+0x1A001E))
+
+
+#define MCFGPTB_GPTIOS (*(vu_char *)(CFG_MBAR+0x1B0000))
+#define MCFGPTB_GPTCFORC (*(vu_char *)(CFG_MBAR+0x1B0001))
+#define MCFGPTB_GPTOC3M (*(vu_char *)(CFG_MBAR+0x1B0002))
+#define MCFGPTB_GPTOC3D (*(vu_char *)(CFG_MBAR+0x1B0003))
+#define MCFGPTB_GPTCNT (*(vu_short *)(CFG_MBAR+0x1B0004))
+#define MCFGPTB_GPTSCR1 (*(vu_char *)(CFG_MBAR+0x1B0006))
+#define MCFGPTB_GPTTOV (*(vu_char *)(CFG_MBAR+0x1B0008))
+#define MCFGPTB_GPTCTL1 (*(vu_char *)(CFG_MBAR+0x1B0009))
+#define MCFGPTB_GPTCTL2 (*(vu_char *)(CFG_MBAR+0x1B000B))
+#define MCFGPTB_GPTIE (*(vu_char *)(CFG_MBAR+0x1B000C))
+#define MCFGPTB_GPTSCR2 (*(vu_char *)(CFG_MBAR+0x1B000D))
+#define MCFGPTB_GPTFLG1 (*(vu_char *)(CFG_MBAR+0x1B000E))
+#define MCFGPTB_GPTFLG2 (*(vu_char *)(CFG_MBAR+0x1B000F))
+#define MCFGPTB_GPTC0 (*(vu_short *)(CFG_MBAR+0x1B0010))
+#define MCFGPTB_GPTC1 (*(vu_short *)(CFG_MBAR+0x1B0012))
+#define MCFGPTB_GPTC2 (*(vu_short *)(CFG_MBAR+0x1B0014))
+#define MCFGPTB_GPTC3 (*(vu_short *)(CFG_MBAR+0x1B0016))
+#define MCFGPTB_GPTPACTL (*(vu_char *)(CFG_MBAR+0x1B0018))
+#define MCFGPTB_GPTPAFLG (*(vu_char *)(CFG_MBAR+0x1B0019))
+#define MCFGPTB_GPTPACNT (*(vu_short *)(CFG_MBAR+0x1B001A))
+#define MCFGPTB_GPTPORT (*(vu_char *)(CFG_MBAR+0x1B001D))
+#define MCFGPTB_GPTDDR (*(vu_char *)(CFG_MBAR+0x1B001E))
+
+/* Bit level definitions and macros */
+#define MCFGPT_GPTIOS_IOS3 (0x08)
+#define MCFGPT_GPTIOS_IOS2 (0x04)
+#define MCFGPT_GPTIOS_IOS1 (0x02)
+#define MCFGPT_GPTIOS_IOS0 (0x01)
+
+#define MCFGPT_GPTCFORC_FOC3 (0x08)
+#define MCFGPT_GPTCFORC_FOC2 (0x04)
+#define MCFGPT_GPTCFORC_FOC1 (0x02)
+#define MCFGPT_GPTCFORC_FOC0 (0x01)
+
+#define MCFGPT_GPTOC3M_OC3M3 (0x08)
+#define MCFGPT_GPTOC3M_OC3M2 (0x04)
+#define MCFGPT_GPTOC3M_OC3M1 (0x02)
+#define MCFGPT_GPTOC3M_OC3M0 (0x01)
+
+#define MCFGPT_GPTOC3M_OC3D(x) (((x)&0x04))
+
+#define MCFGPT_GPTSCR1_GPTEN (0x80)
+#define MCFGPT_GPTSCR1_TFFCA (0x10)
+
+#define MCFGPT_GPTTOV3 (0x08)
+#define MCFGPT_GPTTOV2 (0x04)
+#define MCFGPT_GPTTOV1 (0x02)
+#define MCFGPT_GPTTOV0 (0x01)
+
+#define MCFGPT_GPTCTL_OMOL3(x) (((x)&0x03)<<6)
+#define MCFGPT_GPTCTL_OMOL2(x) (((x)&0x03)<<4)
+#define MCFGPT_GPTCTL_OMOL1(x) (((x)&0x03)<<2)
+#define MCFGPT_GPTCTL_OMOL0(x) (((x)&0x03))
+
+#define MCFGPT_GPTCTL2_EDG3(x) (((x)&0x03)<<6)
+#define MCFGPT_GPTCTL2_EDG2(x) (((x)&0x03)<<4)
+#define MCFGPT_GPTCTL2_EDG1(x) (((x)&0x03)<<2)
+#define MCFGPT_GPTCTL2_EDG0(x) (((x)&0x03))
+
+#define MCFGPT_GPTIE_C3I (0x08)
+#define MCFGPT_GPTIE_C2I (0x04)
+#define MCFGPT_GPTIE_C1I (0x02)
+#define MCFGPT_GPTIE_C0I (0x01)
+
+#define MCFGPT_GPTSCR2_TOI (0x80)
+#define MCFGPT_GPTSCR2_PUPT (0x20)
+#define MCFGPT_GPTSCR2_RDPT (0x10)
+#define MCFGPT_GPTSCR2_TCRE (0x08)
+#define MCFGPT_GPTSCR2_PR(x) (((x)&0x07))
+
+#define MCFGPT_GPTFLG1_C3F (0x08)
+#define MCFGPT_GPTFLG1_C2F (0x04)
+#define MCFGPT_GPTFLG1_C1F (0x02)
+#define MCFGPT_GPTFLG1_C0F (0x01)
+
+#define MCFGPT_GPTFLG2_TOF (0x80)
+#define MCFGPT_GPTFLG2_C3F (0x08)
+#define MCFGPT_GPTFLG2_C2F (0x04)
+#define MCFGPT_GPTFLG2_C1F (0x02)
+#define MCFGPT_GPTFLG2_C0F (0x01)
+
+#define MCFGPT_GPTPACTL_PAE (0x40)
+#define MCFGPT_GPTPACTL_PAMOD (0x20)
+#define MCFGPT_GPTPACTL_PEDGE (0x10)
+#define MCFGPT_GPTPACTL_CLK_PACLK (0x04)
+#define MCFGPT_GPTPACTL_CLK_PACLK256 (0x08)
+#define MCFGPT_GPTPACTL_CLK_PACLK65536 (0x0C)
+#define MCFGPT_GPTPACTL_CLK(x) (((x)&0x03)<<2)
+#define MCFGPT_GPTPACTL_PAOVI (0x02)
+#define MCFGPT_GPTPACTL_PAI (0x01)
+
+#define MCFGPT_GPTPAFLG_PAOVF (0x02)
+#define MCFGPT_GPTPAFLG_PAIF (0x01)
+
+#define MCFGPT_GPTPORT_PORTT3 (0x08)
+#define MCFGPT_GPTPORT_PORTT2 (0x04)
+#define MCFGPT_GPTPORT_PORTT1 (0x02)
+#define MCFGPT_GPTPORT_PORTT0 (0x01)
+
+#define MCFGPT_GPTDDR_DDRT3 (0x08)
+#define MCFGPT_GPTDDR_DDRT2 (0x04)
+#define MCFGPT_GPTDDR_DDRT1 (0x02)
+#define MCFGPT_GPTDDR_DDRT0 (0x01)
+
+/* Coldfire Flash Module CFM */
+
+#define MCFCFM_MCR (*(vu_short *)(CFG_MBAR+0x1D0000))
+#define MCFCFM_MCR_LOCK (0x0400)
+#define MCFCFM_MCR_PVIE (0x0200)
+#define MCFCFM_MCR_AEIE (0x0100)
+#define MCFCFM_MCR_CBEIE (0x0080)
+#define MCFCFM_MCR_CCIE (0x0040)
+#define MCFCFM_MCR_KEYACC (0x0020)
+
+#define MCFCFM_CLKD (*(vu_char *)(CFG_MBAR+0x1D0002))
+
+#define MCFCFM_SEC (*(vu_long*) (CFG_MBAR+0x1D0008))
+#define MCFCFM_SEC_KEYEN (0x80000000)
+#define MCFCFM_SEC_SECSTAT (0x40000000)
+
+#define MCFCFM_PROT (*(vu_long*) (CFG_MBAR+0x1D0010))
+#define MCFCFM_SACC (*(vu_long*) (CFG_MBAR+0x1D0014))
+#define MCFCFM_DACC (*(vu_long*) (CFG_MBAR+0x1D0018))
+#define MCFCFM_USTAT (*(vu_char*) (CFG_MBAR+0x1D0020))
+#define MCFCFM_USTAT_CBEIF 0x80
+#define MCFCFM_USTAT_CCIF 0x40
+#define MCFCFM_USTAT_PVIOL 0x20
+#define MCFCFM_USTAT_ACCERR 0x10
+#define MCFCFM_USTAT_BLANK 0x04
+#define MCFCFM_CMD (*(vu_char*) (CFG_MBAR+0x1D0024))
+#define MCFCFM_CMD_ERSVER 0x05
+#define MCFCFM_CMD_PGERSVER 0x06
+#define MCFCFM_CMD_PGM 0x20
+#define MCFCFM_CMD_PGERS 0x40
+#define MCFCFM_CMD_MASERS 0x41
/****************************************************************************/
#endif /* m5282_h */
diff --git a/include/asm-m68k/mcftimer.h b/include/asm-m68k/mcftimer.h
index 047950b5a5..a73b80eaf8 100644
--- a/include/asm-m68k/mcftimer.h
+++ b/include/asm-m68k/mcftimer.h
@@ -45,7 +45,7 @@
#elif defined(CONFIG_M5249) || defined(CONFIG_M5307) || defined(CONFIG_M5407)
#define MCFTIMER_BASE1 0x140 /* Base address of TIMER1 */
#define MCFTIMER_BASE2 0x180 /* Base address of TIMER2 */
-#elif defined(CONFIG_M5282)
+#elif defined(CONFIG_M5282) | defined(CONFIG_M5271)
#define MCFTIMER_BASE1 0x150000 /* Base address of TIMER1 */
#define MCFTIMER_BASE2 0x160000 /* Base address of TIMER2 */
#define MCFTIMER_BASE3 0x170000 /* Base address of TIMER4 */
diff --git a/include/asm-m68k/mcfuart.h b/include/asm-m68k/mcfuart.h
index e5082a917b..7c0999d61d 100644
--- a/include/asm-m68k/mcfuart.h
+++ b/include/asm-m68k/mcfuart.h
@@ -46,7 +46,7 @@
#define MCFUART_BASE1 0x140 /* Base address of UART1 */
#define MCFUART_BASE2 0x180 /* Base address of UART2 */
#endif
-#elif defined(CONFIG_M5282)
+#elif defined(CONFIG_M5282) || defined(CONFIG_M5271)
#define MCFUART_BASE1 0x200 /* Base address of UART1 */
#define MCFUART_BASE2 0x240 /* Base address of UART2 */
#define MCFUART_BASE3 0x280 /* Base address of UART3 */
diff --git a/include/asm-m68k/ptrace.h b/include/asm-m68k/ptrace.h
index a6d3d74545..75b241883f 100644
--- a/include/asm-m68k/ptrace.h
+++ b/include/asm-m68k/ptrace.h
@@ -43,7 +43,7 @@ struct pt_regs {
ulong a4;
ulong a5;
ulong a6;
-#if defined(CONFIG_M5272) || defined(CONFIG_M5282) || defined(CONFIG_M5249)
+#if defined(CONFIG_M5272) || defined(CONFIG_M5282) || defined(CONFIG_M5249) || defined(CONFIG_M5271)
unsigned format : 4; /* frame format specifier */
unsigned vector : 12; /* vector offset */
unsigned short sr;
diff --git a/include/asm-mips/au1x00.h b/include/asm-mips/au1x00.h
index 4e19dc4da2..a4e9947d93 100644
--- a/include/asm-mips/au1x00.h
+++ b/include/asm-mips/au1x00.h
@@ -119,6 +119,11 @@ static __inline__ int au_ffs(int x)
return __ilog2(x & -x) + 1;
}
+#define gpio_set(Value) outl(Value, SYS_OUTPUTSET)
+#define gpio_clear(Value) outl(Value, SYS_OUTPUTCLR)
+#define gpio_read() inl(SYS_PINSTATERD)
+#define gpio_tristate(Value) outl(Value, SYS_TRIOUTCLR)
+
#endif /* !ASSEMBLY */
#ifdef CONFIG_PM
diff --git a/include/asm-nios2/io.h b/include/asm-nios2/io.h
index b16a98865a..0fab53bf0e 100644
--- a/include/asm-nios2/io.h
+++ b/include/asm-nios2/io.h
@@ -39,12 +39,13 @@ extern unsigned inl (unsigned port);
#define readl(addr)\
({unsigned long val;\
asm volatile( "ldwio %0, 0(%1)" :"=r"(val) : "r" (addr)); val;})
+
#define writeb(addr,val)\
- asm volatile ("stbio %0, 0(%1)" : : "r" (addr), "r" (val))
+ asm volatile ("stbio %1, 0(%0)" : : "r" (addr), "r" (val))
#define writew(addr,val)\
- asm volatile ("sthio %0, 0(%1)" : : "r" (addr), "r" (val))
+ asm volatile ("sthio %1, 0(%0)" : : "r" (addr), "r" (val))
#define writel(addr,val)\
- asm volatile ("stwio %0, 0(%1)" : : "r" (addr), "r" (val))
+ asm volatile ("stwio %1, 0(%0)" : : "r" (addr), "r" (val))
#define inb(addr) readb(addr)
#define inw(addr) readw(addr)
diff --git a/include/asm-ppc/i2c.h b/include/asm-ppc/i2c.h
index fa9d164e9a..1680d3a7c1 100644
--- a/include/asm-ppc/i2c.h
+++ b/include/asm-ppc/i2c.h
@@ -87,7 +87,7 @@ typedef struct i2c
#error CFG_I2C_OFFSET is not defined in /include/configs/${BOARD}.h
#endif
-#if defined(CONFIG_MPC8349ADS) || defined(CONFIG_TQM834X)
+#if defined(CONFIG_MPC8349EMDS) || defined(CONFIG_TQM834X)
/*
* MPC8349 have two i2c bus
*/
diff --git a/include/asm-ppc/immap_83xx.h b/include/asm-ppc/immap_83xx.h
index 6c2c712a26..c2b4c5c6ab 100644
--- a/include/asm-ppc/immap_83xx.h
+++ b/include/asm-ppc/immap_83xx.h
@@ -71,8 +71,8 @@ typedef struct sysconf8349 {
| SPCR_TSEC2DP | SPCR_TSEC2BDP | SPCR_TSEC2EP)
u32 sicrl; /* System General Purpose Register Low */
#define SICRL_LDP_A 0x80000000
-#define SICRL_USB0 0x40000000
-#define SICRL_USB1 0x20000000
+#define SICRL_USB1 0x40000000
+#define SICRL_USB0 0x20000000
#define SICRL_UART 0x0C000000
#define SICRL_GPIO1_A 0x02000000
#define SICRL_GPIO1_B 0x01000000
@@ -675,24 +675,76 @@ typedef struct ddr8349{
u8 res9[8];
u32 sdram_clk_cntl;
#define DDR_SDRAM_CLK_CNTL_SS_EN 0x80000000
+#define DDR_SDRAM_CLK_CNTL_CLK_ADJUST_025 0x01000000
#define DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05 0x02000000
+#define DDR_SDRAM_CLK_CNTL_CLK_ADJUST_075 0x03000000
+#define DDR_SDRAM_CLK_CNTL_CLK_ADJUST_1 0x04000000
u8 res4[0xCCC];
u32 data_err_inject_hi; /**< Memory Data Path Error Injection Mask High */
u32 data_err_inject_lo; /**< Memory Data Path Error Injection Mask Low */
u32 ecc_err_inject; /**< Memory Data Path Error Injection Mask ECC */
+#define ECC_ERR_INJECT_EMB (0x80000000>>22) /* ECC Mirror Byte */
+#define ECC_ERR_INJECT_EIEN (0x80000000>>23) /* Error Injection Enable */
+#define ECC_ERR_INJECT_EEIM (0xff000000>>24) /* ECC Erroe Injection Enable */
+#define ECC_ERR_INJECT_EEIM_SHIFT 0
u8 res5[0x14];
u32 capture_data_hi; /**< Memory Data Path Read Capture High */
u32 capture_data_lo; /**< Memory Data Path Read Capture Low */
u32 capture_ecc; /**< Memory Data Path Read Capture ECC */
+#define CAPTURE_ECC_ECE (0xff000000>>24)
+#define CAPTURE_ECC_ECE_SHIFT 0
u8 res6[0x14];
u32 err_detect; /**< Memory Error Detect */
+#define ECC_ERROR_DETECT_MME (0x80000000>>0) /* Multiple Memory Errors */
+#define ECC_ERROR_DETECT_MBE (0x80000000>>28) /* Multiple-Bit Error */
+#define ECC_ERROR_DETECT_SBE (0x80000000>>29) /* Single-Bit ECC Error Pickup */
+#define ECC_ERROR_DETECT_MSE (0x80000000>>31) /* Memory Select Error */
u32 err_disable; /**< Memory Error Disable */
+#define ECC_ERROR_DISABLE_MBED (0x80000000>>28) /* Multiple-Bit ECC Error Disable */
+#define ECC_ERROR_DISABLE_SBED (0x80000000>>29) /* Sinle-Bit ECC Error disable */
+#define ECC_ERROR_DISABLE_MSED (0x80000000>>31) /* Memory Select Error Disable */
+#define ECC_ERROR_ENABLE ~(ECC_ERROR_DISABLE_MSED|ECC_ERROR_DISABLE_SBED|ECC_ERROR_DISABLE_MBED)
u32 err_int_en; /**< Memory Error Interrupt Enable */
+#define ECC_ERR_INT_EN_MBEE (0x80000000>>28) /* Multiple-Bit ECC Error Interrupt Enable */
+#define ECC_ERR_INT_EN_SBEE (0x80000000>>29) /* Single-Bit ECC Error Interrupt Enable */
+#define ECC_ERR_INT_EN_MSEE (0x80000000>>31) /* Memory Select Error Interrupt Enable */
+#define ECC_ERR_INT_DISABLE ~(ECC_ERR_INT_EN_MBEE|ECC_ERR_INT_EN_SBEE|ECC_ERR_INT_EN_MSEE)
u32 capture_attributes; /**< Memory Error Attributes Capture */
+#define ECC_CAPT_ATTR_BNUM (0xe0000000>>1) /* Data Beat Num */
+#define ECC_CAPT_ATTR_BNUM_SHIFT 28
+#define ECC_CAPT_ATTR_TSIZ (0xc0000000>>6) /* Transaction Size */
+#define ECC_CAPT_ATTR_TSIZ_FOUR_DW 0
+#define ECC_CAPT_ATTR_TSIZ_ONE_DW 1
+#define ECC_CAPT_ATTR_TSIZ_TWO_DW 2
+#define ECC_CAPT_ATTR_TSIZ_THREE_DW 3
+#define ECC_CAPT_ATTR_TSIZ_SHIFT 24
+#define ECC_CAPT_ATTR_TSRC (0xf8000000>>11) /* Transaction Source */
+#define ECC_CAPT_ATTR_TSRC_E300_CORE_DT 0x0
+#define ECC_CAPT_ATTR_TSRC_E300_CORE_IF 0x2
+#define ECC_CAPT_ATTR_TSRC_TSEC1 0x4
+#define ECC_CAPT_ATTR_TSRC_TSEC2 0x5
+#define ECC_CAPT_ATTR_TSRC_USB (0x06|0x07)
+#define ECC_CAPT_ATTR_TSRC_ENCRYPT 0x8
+#define ECC_CAPT_ATTR_TSRC_I2C 0x9
+#define ECC_CAPT_ATTR_TSRC_JTAG 0xA
+#define ECC_CAPT_ATTR_TSRC_PCI1 0xD
+#define ECC_CAPT_ATTR_TSRC_PCI2 0xE
+#define ECC_CAPT_ATTR_TSRC_DMA 0xF
+#define ECC_CAPT_ATTR_TSRC_SHIFT 16
+#define ECC_CAPT_ATTR_TTYP (0xe0000000>>18) /* Transaction Type */
+#define ECC_CAPT_ATTR_TTYP_WRITE 0x1
+#define ECC_CAPT_ATTR_TTYP_READ 0x2
+#define ECC_CAPT_ATTR_TTYP_R_M_W 0x3
+#define ECC_CAPT_ATTR_TTYP_SHIFT 12
+#define ECC_CAPT_ATTR_VLD (0x80000000>>31) /* Valid */
u32 capture_address; /**< Memory Error Address Capture */
u32 capture_ext_address;/**< Memory Error Extended Address Capture */
u32 err_sbe; /**< Memory Single-Bit ECC Error Management */
+#define ECC_ERROR_MAN_SBET (0xff000000>>8) /* Single-Bit Error Threshold 0..255*/
+#define ECC_ERROR_MAN_SBET_SHIFT 16
+#define ECC_ERROR_MAN_SBEC (0xff000000>>24) /* Single Bit Error Counter 0..255*/
+#define ECC_ERROR_MAN_SBEC_SHIFT 0
u8 res7[0xA4];
u32 debug_reg;
u8 res8[0xFC];
@@ -795,10 +847,95 @@ typedef struct spi8349
u8 res1[0xD8];
} spi8349_t;
+
+/*
+ * DMA/Messaging Unit
+ */
typedef struct dma8349 {
- u8 fixme[0x300];
+ u32 res0[0xC]; /* 0x0-0x29 reseverd */
+ u32 omisr; /* 0x30 Outbound message interrupt status register */
+ u32 omimr; /* 0x34 Outbound message interrupt mask register */
+ u32 res1[0x6]; /* 0x38-0x49 reserved */
+
+ u32 imr0; /* 0x50 Inbound message register 0 */
+ u32 imr1; /* 0x54 Inbound message register 1 */
+ u32 omr0; /* 0x58 Outbound message register 0 */
+ u32 omr1; /* 0x5C Outbound message register 1 */
+
+ u32 odr; /* 0x60 Outbound doorbell register */
+ u32 res2; /* 0x64-0x67 reserved */
+ u32 idr; /* 0x68 Inbound doorbell register */
+ u32 res3[0x5]; /* 0x6C-0x79 reserved */
+
+ u32 imisr; /* 0x80 Inbound message interrupt status register */
+ u32 imimr; /* 0x84 Inbound message interrupt mask register */
+ u32 res4[0x1E]; /* 0x88-0x99 reserved */
+
+ u32 dmamr0; /* 0x100 DMA 0 mode register */
+ u32 dmasr0; /* 0x104 DMA 0 status register */
+ u32 dmacdar0; /* 0x108 DMA 0 current descriptor address register */
+ u32 res5; /* 0x10C reserved */
+ u32 dmasar0; /* 0x110 DMA 0 source address register */
+ u32 res6; /* 0x114 reserved */
+ u32 dmadar0; /* 0x118 DMA 0 destination address register */
+ u32 res7; /* 0x11C reserved */
+ u32 dmabcr0; /* 0x120 DMA 0 byte count register */
+ u32 dmandar0; /* 0x124 DMA 0 next descriptor address register */
+ u32 res8[0x16]; /* 0x128-0x179 reserved */
+
+ u32 dmamr1; /* 0x180 DMA 1 mode register */
+ u32 dmasr1; /* 0x184 DMA 1 status register */
+ u32 dmacdar1; /* 0x188 DMA 1 current descriptor address register */
+ u32 res9; /* 0x18C reserved */
+ u32 dmasar1; /* 0x190 DMA 1 source address register */
+ u32 res10; /* 0x194 reserved */
+ u32 dmadar1; /* 0x198 DMA 1 destination address register */
+ u32 res11; /* 0x19C reserved */
+ u32 dmabcr1; /* 0x1A0 DMA 1 byte count register */
+ u32 dmandar1; /* 0x1A4 DMA 1 next descriptor address register */
+ u32 res12[0x16];/* 0x1A8-0x199 reserved */
+
+ u32 dmamr2; /* 0x200 DMA 2 mode register */
+ u32 dmasr2; /* 0x204 DMA 2 status register */
+ u32 dmacdar2; /* 0x208 DMA 2 current descriptor address register */
+ u32 res13; /* 0x20C reserved */
+ u32 dmasar2; /* 0x210 DMA 2 source address register */
+ u32 res14; /* 0x214 reserved */
+ u32 dmadar2; /* 0x218 DMA 2 destination address register */
+ u32 res15; /* 0x21C reserved */
+ u32 dmabcr2; /* 0x220 DMA 2 byte count register */
+ u32 dmandar2; /* 0x224 DMA 2 next descriptor address register */
+ u32 res16[0x16];/* 0x228-0x279 reserved */
+
+ u32 dmamr3; /* 0x280 DMA 3 mode register */
+ u32 dmasr3; /* 0x284 DMA 3 status register */
+ u32 dmacdar3; /* 0x288 DMA 3 current descriptor address register */
+ u32 res17; /* 0x28C reserved */
+ u32 dmasar3; /* 0x290 DMA 3 source address register */
+ u32 res18; /* 0x294 reserved */
+ u32 dmadar3; /* 0x298 DMA 3 destination address register */
+ u32 res19; /* 0x29C reserved */
+ u32 dmabcr3; /* 0x2A0 DMA 3 byte count register */
+ u32 dmandar3; /* 0x2A4 DMA 3 next descriptor address register */
+
+ u32 dmagsr; /* 0x2A8 DMA general status register */
+ u32 res20[0x15];/* 0x2AC-0x2FF reserved */
} dma8349_t;
+/* DMAMRn bits */
+#define DMA_CHANNEL_START (0x00000001) /* Bit - DMAMRn CS */
+#define DMA_CHANNEL_TRANSFER_MODE_DIRECT (0x00000004) /* Bit - DMAMRn CTM */
+#define DMA_CHANNEL_SOURCE_ADRESSS_HOLD_EN (0x00001000) /* Bit - DMAMRn SAHE */
+#define DMA_CHANNEL_SOURCE_ADDRESS_HOLD_1B (0x00000000) /* 2Bit- DMAMRn SAHTS 1byte */
+#define DMA_CHANNEL_SOURCE_ADDRESS_HOLD_2B (0x00004000) /* 2Bit- DMAMRn SAHTS 2bytes */
+#define DMA_CHANNEL_SOURCE_ADDRESS_HOLD_4B (0x00008000) /* 2Bit- DMAMRn SAHTS 4bytes */
+#define DMA_CHANNEL_SOURCE_ADDRESS_HOLD_8B (0x0000c000) /* 2Bit- DMAMRn SAHTS 8bytes */
+#define DMA_CHANNEL_SNOOP (0x00010000) /* Bit - DMAMRn DMSEN */
+
+/* DMASRn bits */
+#define DMA_CHANNEL_BUSY (0x00000004) /* Bit - DMASRn CB */
+#define DMA_CHANNEL_TRANSFER_ERROR (0x00000080) /* Bit - DMASRn TE */
+
/*
* PCI Software Configuration Registers
*/
diff --git a/include/asm-ppc/iopin_85xx.h b/include/asm-ppc/iopin_85xx.h
new file mode 100644
index 0000000000..f854df633a
--- /dev/null
+++ b/include/asm-ppc/iopin_85xx.h
@@ -0,0 +1,146 @@
+/*
+ * MPC85xx I/O port pin manipulation functions
+ */
+
+#ifndef _ASM_IOPIN_85xx_H_
+#define _ASM_IOPIN_85xx_H_
+
+#include <linux/types.h>
+#include <asm/immap_85xx.h>
+
+#ifdef __KERNEL__
+
+typedef struct {
+ u_char port:2; /* port number (A=0, B=1, C=2, D=3) */
+ u_char pin:5; /* port pin (0-31) */
+ u_char flag:1; /* for whatever */
+} iopin_t;
+
+#define IOPIN_PORTA 0
+#define IOPIN_PORTB 1
+#define IOPIN_PORTC 2
+#define IOPIN_PORTD 3
+
+extern __inline__ void iopin_set_high (iopin_t * iopin)
+{
+ volatile uint *datp = &((immap_t *) CFG_IMMR)->im_cpm.im_cpm_iop.pdata;
+ datp[iopin->port * 8] |= (1 << (31 - iopin->pin));
+}
+
+extern __inline__ void iopin_set_low (iopin_t * iopin)
+{
+ volatile uint *datp = &((immap_t *) CFG_IMMR)->im_cpm.im_cpm_iop.pdata;
+ datp[iopin->port * 8] &= ~(1 << (31 - iopin->pin));
+}
+
+extern __inline__ uint iopin_is_high (iopin_t * iopin)
+{
+ volatile uint *datp = &((immap_t *) CFG_IMMR)->im_cpm.im_cpm_iop.pdata;
+ return (datp[iopin->port * 8] >> (31 - iopin->pin)) & 1;
+}
+
+extern __inline__ uint iopin_is_low (iopin_t * iopin)
+{
+ volatile uint *datp = &((immap_t *) CFG_IMMR)->im_cpm.im_cpm_iop.pdata;
+ return ((datp[iopin->port * 8] >> (31 - iopin->pin)) & 1) ^ 1;
+}
+
+extern __inline__ void iopin_set_out (iopin_t * iopin)
+{
+ volatile uint *dirp = &((immap_t *) CFG_IMMR)->im_cpm.im_cpm_iop.pdira;
+ dirp[iopin->port * 8] |= (1 << (31 - iopin->pin));
+}
+
+extern __inline__ void iopin_set_in (iopin_t * iopin)
+{
+ volatile uint *dirp = &((immap_t *) CFG_IMMR)->im_cpm.im_cpm_iop.pdira;
+ dirp[iopin->port * 8] &= ~(1 << (31 - iopin->pin));
+}
+
+extern __inline__ uint iopin_is_out (iopin_t * iopin)
+{
+ volatile uint *dirp = &((immap_t *) CFG_IMMR)->im_cpm.im_cpm_iop.pdira;
+ return (dirp[iopin->port * 8] >> (31 - iopin->pin)) & 1;
+}
+
+extern __inline__ uint iopin_is_in (iopin_t * iopin)
+{
+ volatile uint *dirp = &((immap_t *) CFG_IMMR)->im_cpm.im_cpm_iop.pdira;
+ return ((dirp[iopin->port * 8] >> (31 - iopin->pin)) & 1) ^ 1;
+}
+
+extern __inline__ void iopin_set_odr (iopin_t * iopin)
+{
+ volatile uint *odrp = &((immap_t *) CFG_IMMR)->im_cpm.im_cpm_iop.podra;
+ odrp[iopin->port * 8] |= (1 << (31 - iopin->pin));
+}
+
+extern __inline__ void iopin_set_act (iopin_t * iopin)
+{
+ volatile uint *odrp = &((immap_t *) CFG_IMMR)->im_cpm.im_cpm_iop.podra;
+ odrp[iopin->port * 8] &= ~(1 << (31 - iopin->pin));
+}
+
+extern __inline__ uint iopin_is_odr (iopin_t * iopin)
+{
+ volatile uint *odrp = &((immap_t *) CFG_IMMR)->im_cpm.im_cpm_iop.podra;
+ return (odrp[iopin->port * 8] >> (31 - iopin->pin)) & 1;
+}
+
+extern __inline__ uint iopin_is_act (iopin_t * iopin)
+{
+ volatile uint *odrp = &((immap_t *) CFG_IMMR)->im_cpm.im_cpm_iop.podra;
+ return ((odrp[iopin->port * 8] >> (31 - iopin->pin)) & 1) ^ 1;
+}
+
+extern __inline__ void iopin_set_ded (iopin_t * iopin)
+{
+ volatile uint *parp = &((immap_t *) CFG_IMMR)->im_cpm.im_cpm_iop.ppara;
+ parp[iopin->port * 8] |= (1 << (31 - iopin->pin));
+}
+
+extern __inline__ void iopin_set_gen (iopin_t * iopin)
+{
+ volatile uint *parp = &((immap_t *) CFG_IMMR)->im_cpm.im_cpm_iop.ppara;
+ parp[iopin->port * 8] &= ~(1 << (31 - iopin->pin));
+}
+
+extern __inline__ uint iopin_is_ded (iopin_t * iopin)
+{
+ volatile uint *parp = &((immap_t *) CFG_IMMR)->im_cpm.im_cpm_iop.ppara;
+ return (parp[iopin->port * 8] >> (31 - iopin->pin)) & 1;
+}
+
+extern __inline__ uint iopin_is_gen (iopin_t * iopin)
+{
+ volatile uint *parp = &((immap_t *) CFG_IMMR)->im_cpm.im_cpm_iop.ppara;
+ return ((parp[iopin->port * 8] >> (31 - iopin->pin)) & 1) ^ 1;
+}
+
+extern __inline__ void iopin_set_opt2 (iopin_t * iopin)
+{
+ volatile uint *sorp = &((immap_t *) CFG_IMMR)->im_cpm.im_cpm_iop.psora;
+ sorp[iopin->port * 8] |= (1 << (31 - iopin->pin));
+}
+
+extern __inline__ void iopin_set_opt1 (iopin_t * iopin)
+{
+ volatile uint *sorp = &((immap_t *) CFG_IMMR)->im_cpm.im_cpm_iop.psora;
+ sorp[iopin->port * 8] &= ~(1 << (31 - iopin->pin));
+}
+
+extern __inline__ uint iopin_is_opt2 (iopin_t * iopin)
+{
+ volatile uint *sorp = &((immap_t *) CFG_IMMR)->im_cpm.im_cpm_iop.psora;
+ return (sorp[iopin->port * 8] >> (31 - iopin->pin)) & 1;
+}
+
+extern __inline__ uint iopin_is_opt1 (iopin_t * iopin)
+{
+ volatile uint *sorp = &((immap_t *) CFG_IMMR)->im_cpm.im_cpm_iop.psora;
+ return ((sorp[iopin->port * 8] >> (31 - iopin->pin)) & 1) ^ 1;
+}
+
+#endif /* __KERNEL__ */
+
+#endif /* _ASM_IOPIN_85xx_H_ */
diff --git a/include/asm-ppc/mmu.h b/include/asm-ppc/mmu.h
index 2606b79a24..baaf6f7976 100644
--- a/include/asm-ppc/mmu.h
+++ b/include/asm-ppc/mmu.h
@@ -470,4 +470,45 @@ extern int write_bat(ppc_bat_t bat, unsigned long upper, unsigned long lower);
#define LAWAR_SIZE_1G (LAWAR_SIZE_BASE+19)
#define LAWAR_SIZE_2G (LAWAR_SIZE_BASE+20)
+#ifdef CONFIG_440SPE
+/*----------------------------------------------------------------------------+
+| Following instructions are not available in Book E mode of the GNU assembler.
++----------------------------------------------------------------------------*/
+#define DCCCI(ra,rb) .long 0x7c000000|\
+ (ra<<16)|(rb<<11)|(454<<1)
+
+#define ICCCI(ra,rb) .long 0x7c000000|\
+ (ra<<16)|(rb<<11)|(966<<1)
+
+#define DCREAD(rt,ra,rb) .long 0x7c000000|\
+ (rt<<21)|(ra<<16)|(rb<<11)|(486<<1)
+
+#define ICREAD(ra,rb) .long 0x7c000000|\
+ (ra<<16)|(rb<<11)|(998<<1)
+
+#define TLBSX(rt,ra,rb) .long 0x7c000000|\
+ (rt<<21)|(ra<<16)|(rb<<11)|(914<<1)
+
+#define TLBWE(rs,ra,ws) .long 0x7c000000|\
+ (rs<<21)|(ra<<16)|(ws<<11)|(978<<1)
+
+#define TLBRE(rt,ra,ws) .long 0x7c000000|\
+ (rt<<21)|(ra<<16)|(ws<<11)|(946<<1)
+
+#define TLBSXDOT(rt,ra,rb) .long 0x7c000001|\
+ (rt<<21)|(ra<<16)|(rb<<11)|(914<<1)
+
+#define MSYNC .long 0x7c000000|\
+ (598<<1)
+
+#define MBAR_INST .long 0x7c000000|\
+ (854<<1)
+
+/*----------------------------------------------------------------------------+
+| Following instruction is not available in PPC405 mode of the GNU assembler.
++----------------------------------------------------------------------------*/
+#define TLBRE(rt,ra,ws) .long 0x7c000000|\
+ (rt<<21)|(ra<<16)|(ws<<11)|(946<<1)
+
+#endif
#endif /* _PPC_MMU_H_ */
diff --git a/include/asm-ppc/mpc8349_pci.h b/include/asm-ppc/mpc8349_pci.h
index 48255a34f9..7a1adba950 100644
--- a/include/asm-ppc/mpc8349_pci.h
+++ b/include/asm-ppc/mpc8349_pci.h
@@ -77,6 +77,7 @@
#define POCMR_ENABLE 0x80000000
#define POCMR_PCI_IO 0x40000000
#define POCMR_PREFETCH_EN 0x20000000
+#define POCMR_PCI2 0x10000000
/* Soft PCI reset */
diff --git a/include/asm-ppc/processor.h b/include/asm-ppc/processor.h
index 811378383d..44b23f1eb4 100644
--- a/include/asm-ppc/processor.h
+++ b/include/asm-ppc/processor.h
@@ -725,7 +725,9 @@
#define PVR_440GP_RC 0x40120481
#define PVR_440EP_RA 0x42221850
#define PVR_440EP_RB 0x422218D3 /* 440EP rev B and 440GR rev A have same PVR */
+#define PVR_440EP_RC 0x422218D4 /* 440EP rev C and 440GR rev B have same PVR */
#define PVR_440GR_RA 0x422218D3 /* 440EP rev B and 440GR rev A have same PVR */
+#define PVR_440GR_RB 0x422218D4 /* 440EP rev C and 440GR rev B have same PVR */
#define PVR_440GX_RA 0x51B21850
#define PVR_440GX_RB 0x51B21851
#define PVR_440GX_RC 0x51B21892
@@ -733,6 +735,8 @@
#define PVR_405EP_RB 0x51210950
#define PVR_440SP_RA 0x53221850
#define PVR_440SP_RB 0x53221891
+#define PVR_440SPe_RA 0x53421890
+#define PVR_440SPe_RB 0x53421891
#define PVR_601 0x00010000
#define PVR_602 0x00050000
#define PVR_603 0x00030000
diff --git a/include/bmp_logo.h b/include/bmp_logo.h
deleted file mode 100644
index 9c924b8592..0000000000
--- a/include/bmp_logo.h
+++ /dev/null
@@ -1,1948 +0,0 @@
-/*
- * Automatically generated by "tools/bmp_logo"
- *
- * DO NOT EDIT
- *
- */
-
-
-#ifndef __BMP_LOGO_H__
-#define __BMP_LOGO_H__
-
-#define BMP_LOGO_WIDTH 160
-#define BMP_LOGO_HEIGHT 96
-#define BMP_LOGO_COLORS 31
-#define BMP_LOGO_OFFSET 16
-
-unsigned short bmp_logo_palette[] = {
- 0x0343, 0x0454, 0x0565, 0x0565, 0x0676, 0x0787, 0x0898, 0x0999,
- 0x0AAA, 0x0ABA, 0x0BCB, 0x0CCC, 0x0DDD, 0x0EEE, 0x0FFF, 0x0FB3,
- 0x0FB4, 0x0FC4, 0x0FC5, 0x0FC6, 0x0FD7, 0x0FD8, 0x0FD9, 0x0FDA,
- 0x0FEA, 0x0FEB, 0x0FEC, 0x0FFD, 0x0FFE, 0x0FFF, 0x0FFF,
-};
-
-unsigned char bmp_logo_bitmap[] = {
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x1B,
- 0x1B, 0x1B, 0x1B, 0x1B, 0x1B, 0x1B, 0x1B, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x10,
- 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x10,
- 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x10,
- 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
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- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x10, 0x10, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x10, 0x10,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x10, 0x10, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x10,
- 0x10, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x1A, 0x10,
- 0x14, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x10, 0x10,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x17, 0x10, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x17, 0x10, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x10, 0x10, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x1B, 0x10, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x10, 0x10, 0x10, 0x10,
- 0x10, 0x10, 0x1C, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x10, 0x10, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x14, 0x10, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x10, 0x10, 0x10, 0x10,
- 0x10, 0x10, 0x10, 0x10, 0x1A, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x10, 0x10, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x10, 0x10,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x10, 0x10, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x1C, 0x10, 0x10, 0x10, 0x10, 0x10, 0x13, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x13, 0x10, 0x10, 0x10, 0x10, 0x10, 0x16, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x10, 0x10,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x17, 0x10, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x17, 0x10, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x10, 0x10, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x13, 0x10,
- 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x11, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x1E, 0x10, 0x16, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x10, 0x10, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x10, 0x10, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x10, 0x10, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x10, 0x10, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x10, 0x10, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x1A, 0x10, 0x19, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x11, 0x10, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x10, 0x10, 0x10, 0x11, 0x14,
- 0x10, 0x10, 0x10, 0x17, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x2E,
- 0x2E, 0x2E, 0x2E, 0x2E, 0x2E, 0x16, 0x10, 0x10,
- 0x10, 0x14, 0x13, 0x10, 0x10, 0x10, 0x2E, 0x2E,
-
-};
-
-#endif /* __BMP_LOGO_H__ */
diff --git a/include/cmd_confdefs.h b/include/cmd_confdefs.h
index 9ee4849611..8532cc9aa0 100644
--- a/include/cmd_confdefs.h
+++ b/include/cmd_confdefs.h
@@ -94,6 +94,7 @@
#define CFG_CMD_EXT2 0x1000000000000000ULL /* EXT2 Support */
#define CFG_CMD_SNTP 0x2000000000000000ULL /* SNTP support */
#define CFG_CMD_DISPLAY 0x4000000000000000ULL /* Display support */
+#define CFG_CMD_ONENAND 0x8000000000000000ULL /* OneNAND support */
#define CFG_CMD_ALL 0xFFFFFFFFFFFFFFFFULL /* ALL commands */
@@ -112,7 +113,6 @@
CFG_CMD_DISPLAY | \
CFG_CMD_DOC | \
CFG_CMD_DTT | \
- CFG_CMD_ECHO | \
CFG_CMD_EEPROM | \
CFG_CMD_ELF | \
CFG_CMD_EXT2 | \
@@ -142,6 +142,7 @@
CFG_CMD_SPI | \
CFG_CMD_UNIVERSE | \
CFG_CMD_USB | \
+ CFG_CMD_ONENAND | \
CFG_CMD_VFD )
/* Default configuration
diff --git a/include/common.h b/include/common.h
index d2570a803e..e4637ad356 100644
--- a/include/common.h
+++ b/include/common.h
@@ -116,12 +116,13 @@ typedef void (interrupt_handler_t)(void *);
/*
* enable common handling for all TQM8xxL/M boards:
- * - CONFIG_TQM8xxM will be defined for all TQM8xxM boards
+ * - CONFIG_TQM8xxM will be defined for all TQM8xxM and TQM885D boards
* - CONFIG_TQM8xxL will be defined for all TQM8xxL _and_ TQM8xxM boards
*/
#if defined(CONFIG_TQM823M) || defined(CONFIG_TQM850M) || \
defined(CONFIG_TQM855M) || defined(CONFIG_TQM860M) || \
- defined(CONFIG_TQM862M) || defined(CONFIG_TQM866M)
+ defined(CONFIG_TQM862M) || defined(CONFIG_TQM866M) || \
+ defined(CONFIG_TQM885D)
# ifndef CONFIG_TQM8xxM
# define CONFIG_TQM8xxM
# endif
@@ -365,7 +366,8 @@ void trap_init (ulong);
defined (CONFIG_75x) || \
defined (CONFIG_74xx) || \
defined (CONFIG_MPC8220) || \
- defined(CONFIG_MPC85xx)
+ defined (CONFIG_MPC85xx) || \
+ defined (CONFIG_MPC83XX)
unsigned char in8(unsigned int);
void out8(unsigned int, unsigned char);
unsigned short in16(unsigned int);
@@ -457,6 +459,10 @@ void get_sys_info ( sys_info_t * );
#if defined(CONFIG_4xx) || defined(CONFIG_IOP480)
# if defined(CONFIG_440)
typedef PPC440_SYS_INFO sys_info_t;
+# if defined(CONFIG_440SPE)
+ unsigned long determine_sysper(void);
+ unsigned long determine_pci_clock_per(void);
+# endif
# else
typedef PPC405_SYS_INFO sys_info_t;
# endif
diff --git a/include/commproc.h b/include/commproc.h
index 790016655e..12400e3edd 100644
--- a/include/commproc.h
+++ b/include/commproc.h
@@ -2,7 +2,7 @@
* MPC8xx Communication Processor Module.
* Copyright (c) 1997 Dan Malek (dmalek@jlc.net)
*
- * (C) Copyright 2000-2004
+ * (C) Copyright 2000-2006
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* This file contains structures and information for the communication
@@ -1405,14 +1405,16 @@ typedef struct scc_enet {
#endif /* CONFIG_SXNI855T */
-/*** MVS1, TQM823L/M, TQM850L/M, ETX094, R360MPI *******************/
+/*** MVS1, TQM823L/M, TQM850L/M, TQM885D, ETX094, R360MPI **********/
#if (defined(CONFIG_MVS) && CONFIG_MVS < 2) || \
defined(CONFIG_R360MPI) || defined(CONFIG_RBC823) || \
defined(CONFIG_TQM823L) || defined(CONFIG_TQM823M) || \
defined(CONFIG_TQM850L) || defined(CONFIG_TQM850M) || \
- defined(CONFIG_ETX094) || defined(CONFIG_RRVISION)|| \
+ defined(CONFIG_TQM885D) || defined(CONFIG_ETX094) || \
+ defined(CONFIG_RRVISION)|| defined(CONFIG_VIRTLAB2)|| \
(defined(CONFIG_LANTEC) && CONFIG_LANTEC < 2)
+
/* Bits in parallel I/O port registers that have to be set/cleared
* to configure the pins for SCC2 use.
*/
@@ -1437,6 +1439,11 @@ typedef struct scc_enet {
*/
#define SICR_ENET_MASK ((uint)0x0000ff00)
#define SICR_ENET_CLKRT ((uint)0x00002600)
+
+# ifdef CONFIG_FEC_ENET /* Use FEC for Fast Ethernet */
+#define FEC_ENET
+# endif /* CONFIG_FEC_ENET */
+
#endif /* CONFIG_MVS v1, CONFIG_TQM823L/M, CONFIG_TQM850L/M, etc. */
/*** TQM855L/M, TQM860L/M, TQM862L/M, TQM866L/M *********************/
diff --git a/include/configs/ASH405.h b/include/configs/ASH405.h
index 9841893899..d03c05bf34 100644
--- a/include/configs/ASH405.h
+++ b/include/configs/ASH405.h
@@ -132,6 +132,9 @@
* NAND-FLASH stuff
*-----------------------------------------------------------------------
*/
+
+#define CFG_NAND_LEGACY
+
#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
#define SECTORSIZE 512
diff --git a/include/configs/Adder.h b/include/configs/Adder.h
index f8075466c4..0e6b50f8b0 100644
--- a/include/configs/Adder.h
+++ b/include/configs/Adder.h
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004 Arabella Software Ltd.
+ * Copyright (C) 2004-2005 Arabella Software Ltd.
* Yuli Barcohen <yuli@arabellasw.com>
*
* Support for Analogue&Micro Adder boards family.
@@ -35,11 +35,13 @@
#define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */
#define CONFIG_BAUDRATE 38400
-#define CONFIG_FEC_ENET /* Ethernet is on FEC */
-#ifdef CONFIG_FEC_ENET
+#define CONFIG_ETHER_ON_FEC1
+#define CONFIG_ETHER_ON_FEC2
+
+#if defined(CONFIG_ETHER_ON_FEC1) || defined(CONFIG_ETHER_ON_FEC2)
#define CFG_DISCOVER_PHY
#define FEC_ENET
-#endif /* CONFIG_FEC_ENET */
+#endif /* CONFIG_ETHER_ON_FEC || CONFIG_ETHER_ON_FEC2 */
#define CONFIG_8xx_OSCLK 10000000 /* 10 MHz oscillator on EXTCLK */
#define CONFIG_8xx_CPUCLK_DEFAULT 50000000
@@ -47,7 +49,7 @@
#ifdef CONFIG_MPC852T
#define CFG_8xx_CPUCLK_MAX 50000000
#else
-#define CFG_8xx_CPUCLK_MAX 120000000
+#define CFG_8xx_CPUCLK_MAX 133000000
#endif /* CONFIG_MPC852T */
#define CONFIG_COMMANDS (CONFIG_CMD_DFL \
@@ -62,7 +64,7 @@
#define CONFIG_BOOTDELAY 5 /* Autoboot after 5 seconds */
#define CONFIG_BOOTCOMMAND "bootm fe040000" /* Autoboot command */
-#define CONFIG_BOOTARGS "root=/dev/mtdblock2 rw"
+#define CONFIG_BOOTARGS "root=/dev/mtdblock1 rw mtdparts=1M(ROM)ro,-(root)"
#define CONFIG_BZIP2 /* Include support for bzip2 compressed images */
#undef CONFIG_WATCHDOG /* Disable platform specific watchdog */
@@ -79,7 +81,7 @@
#define CFG_MAXARGS 16 /* Max number of command args */
#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
-#define CFG_LOAD_ADDR 0x100000 /* Default load address */
+#define CFG_LOAD_ADDR 0x400000 /* Default load address */
#define CFG_HZ 1000 /* Decrementer freq: 1 ms ticks */
@@ -89,24 +91,21 @@
* RAM configuration (note that CFG_SDRAM_BASE must be zero)
*/
#define CFG_SDRAM_BASE 0x00000000
-#define CFG_SDRAM_SIZE 0x00800000 /* 8 Mbyte */
-
-#define CFG_OR1_PRELIM (0xFF800000 | OR_CSNT_SAM | OR_ACS_DIV2)
-#define CFG_BR1_PRELIM (CFG_SDRAM_BASE | BR_PS_32 | BR_MS_UPMA | BR_V)
+#define CFG_SDRAM_MAX_SIZE 0x01000000 /* Up to 16 Mbyte */
-#define CFG_MAMR 0x00802114
+#define CFG_MAMR 0x00002114
/*
- * 2048 SDRAM rows
+ * 4096 Up to 4096 SDRAM rows
* 1000 factor s -> ms
- * 64 PTP (pre-divider from MPTPR) from SDRAM example configuration
+ * 32 PTP (pre-divider from MPTPR)
* 4 Number of refresh cycles per period
* 64 Refresh cycle in ms per number of rows
*/
-#define CFG_PTA_PER_CLK ((2048 * 64 * 1000) / (4 * 64))
+#define CFG_PTA_PER_CLK ((4096 * 32 * 1000) / (4 * 64))
#define CFG_MEMTEST_START 0x00100000 /* memtest works on */
-#define CFG_MEMTEST_END 0x00700000 /* 1 ... 7 MB in SDRAM */
+#define CFG_MEMTEST_END 0x00500000 /* 1 ... 5 MB in SDRAM */
#define CFG_RESET_ADDRESS 0x09900000
@@ -139,6 +138,8 @@
#define CFG_ENV_SECT_SIZE 0x10000 /* We use one complete sector */
#define CFG_ENV_ADDR (CFG_MONITOR_BASE + CFG_MONITOR_LEN)
+#define CONFIG_ENV_OVERWRITE
+
#define CFG_OR0_PRELIM 0xFF000774
#define CFG_BR0_PRELIM (CFG_FLASH_BASE | BR_PS_16 | BR_MS_GPCM | BR_V)
diff --git a/include/configs/BC3450.h b/include/configs/BC3450.h
new file mode 100644
index 0000000000..5b54f30e08
--- /dev/null
+++ b/include/configs/BC3450.h
@@ -0,0 +1,568 @@
+/*
+ * -- Version 1.1 --
+ *
+ * (C) Copyright 2003-2005
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * (C) Copyright 2004-2005
+ * Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de
+ *
+ * (C) Copyright 2005
+ * Stefan Strobl, GERSYS GmbH, stefan.strobl@gersys.de.
+ *
+ * History:
+ * 1.1 - add define CONFIG_ZERO_BOOTDELAY_CHECK
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * High Level Configuration Options
+ */
+#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */
+#define CONFIG_MPC5200 1 /* (more precisely a MPC5200 CPU) */
+#define CONFIG_TQM5200 1 /* ... on a TQM5200 module */
+
+#define CONFIG_BC3450 1 /* ... on a BC3450 mainboard */
+#define CONFIG_BC3450_PS2 1 /* + a PS/2 converter onboard */
+#define CONFIG_BC3450_IDE 1 /* + IDE drives (Compact Flash) */
+#define CONFIG_BC3450_USB 1 /* + USB support */
+# define CONFIG_FAT 1 /* + FAT support */
+# define CONFIG_EXT2 1 /* + EXT2 support */
+#undef CONFIG_BC3450_BUZZER /* + Buzzer onboard */
+#undef CONFIG_BC3450_CAN /* + CAN transceiver */
+#undef CONFIG_BC3450_DS1340 /* + a RTC DS1340 onboard */
+#undef CONFIG_BC3450_DS3231 /* + a RTC DS3231 onboard tbd */
+#undef CONFIG_BC3450_AC97 /* + AC97 on PSC2, tbd */
+#define CONFIG_BC3450_FP 1 /* + enable FP O/P */
+#undef CONFIG_BC3450_CRT /* + enable CRT O/P (Debug only!) */
+
+#define CFG_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
+
+#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
+#define BOOTFLAG_WARM 0x02 /* Software reboot */
+
+#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
+#endif
+
+/*
+ * Serial console configuration
+ */
+#define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
+#define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
+#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
+
+/*
+ * AT-PS/2 Multiplexer
+ */
+#ifdef CONFIG_BC3450_PS2
+# define CONFIG_PS2KBD /* AT-PS/2 Keyboard */
+# define CONFIG_PS2MULT /* .. on PS/2 Multiplexer */
+# define CONFIG_PS2SERIAL 6 /* .. on PSC6 */
+# define CONFIG_PS2MULT_DELAY (CFG_HZ/2) /* Initial delay */
+# define CONFIG_BOARD_EARLY_INIT_R
+#endif /* CONFIG_BC3450_PS2 */
+
+/*
+ * PCI Mapping:
+ * 0x40000000 - 0x4fffffff - PCI Memory
+ * 0x50000000 - 0x50ffffff - PCI IO Space
+ */
+# define CONFIG_PCI 1
+# define CONFIG_PCI_PNP 1
+/* #define CONFIG_PCI_SCAN_SHOW 1 */
+
+#define CONFIG_PCI_MEM_BUS 0x40000000
+#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
+#define CONFIG_PCI_MEM_SIZE 0x10000000
+
+#define CONFIG_PCI_IO_BUS 0x50000000
+#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
+#define CONFIG_PCI_IO_SIZE 0x01000000
+
+#define CONFIG_NET_MULTI 1
+/*#define CONFIG_EEPRO100 XXX - FIXME: conflicts when CONFIG_MII is enabled */
+#define CFG_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
+#define CONFIG_NS8382X 1
+
+#ifdef CONFIG_PCI
+# define ADD_PCI_CMD CFG_CMD_PCI
+#else
+# define ADD_PCI_CMD 0
+#endif
+
+/*
+ * Video console
+ */
+# define CONFIG_VIDEO
+# define CONFIG_VIDEO_SM501
+# define CONFIG_VIDEO_SM501_32BPP
+# define CONFIG_CFB_CONSOLE
+# define CONFIG_VIDEO_LOGO
+# define CONFIG_VGA_AS_SINGLE_DEVICE
+# define CONFIG_CONSOLE_EXTRA_INFO /* display Board/Device-Infos */
+# define CONFIG_VIDEO_SW_CURSOR
+# define CONFIG_SPLASH_SCREEN
+# define CFG_CONSOLE_IS_IN_ENV
+
+#ifdef CONFIG_VIDEO
+# define ADD_BMP_CMD CFG_CMD_BMP
+#else
+# define ADD_BMP_CMD 0
+#endif
+
+/*
+ * Partitions
+ */
+#define CONFIG_MAC_PARTITION
+#define CONFIG_DOS_PARTITION
+#define CONFIG_ISO_PARTITION
+
+/*
+ * USB
+ */
+#ifdef CONFIG_BC3450_USB
+# define CONFIG_USB_OHCI
+# define ADD_USB_CMD CFG_CMD_USB
+# define CONFIG_USB_STORAGE
+#else /* !CONFIG_BC3450_USB */
+# define ADD_USB_CMD 0
+#endif /* CONFIG_BC3450_USB */
+
+/*
+ * POST support
+ */
+#define CONFIG_POST (CFG_POST_MEMORY | \
+ CFG_POST_CPU | \
+ CFG_POST_I2C)
+
+#ifdef CONFIG_POST
+# define CFG_CMD_POST_DIAG CFG_CMD_DIAG
+/* preserve space for the post_word at end of on-chip SRAM */
+# define MPC5XXX_SRAM_POST_SIZE MPC5XXX_SRAM_SIZE-4
+#else
+# define CFG_CMD_POST_DIAG 0
+#endif /* CONFIG_POST */
+
+/*
+ * IDE
+ */
+#ifdef CONFIG_BC3450_IDE
+# define ADD_IDE_CMD CFG_CMD_IDE
+#else
+# define ADD_IDE_CMD 0
+#endif /* CONFIG_BC3450_IDE */
+
+/*
+ * Filesystem support
+ */
+#if defined (CONFIG_BC3450_IDE) || defined (CONFIG_BC3450_USB)
+#ifdef CONFIG_FAT
+# define ADD_FAT_CMD CFG_CMD_FAT
+#else
+# define ADD_FAT_CMD 0
+#endif /* CONFIG_FAT */
+
+#ifdef CONFIG_EXT2
+# define ADD_EXT2_CMD CFG_CMD_EXT2
+#else
+# define ADD_EXT2_CMD 0
+#endif /* CONFIG_EXT2 */
+#endif /* CONFIG_BC3450_IDE / _USB */
+
+/*
+ * Supported commands
+ */
+#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
+ ADD_BMP_CMD | \
+ ADD_IDE_CMD | \
+ ADD_FAT_CMD | \
+ ADD_EXT2_CMD | \
+ ADD_PCI_CMD | \
+ ADD_USB_CMD | \
+ CFG_CMD_ASKENV | \
+ CFG_CMD_DATE | \
+ CFG_CMD_DHCP | \
+ CFG_CMD_ECHO | \
+ CFG_CMD_EEPROM | \
+ CFG_CMD_I2C | \
+ CFG_CMD_JFFS2 | \
+ CFG_CMD_MII | \
+ CFG_CMD_NFS | \
+ CFG_CMD_PING | \
+ CFG_CMD_POST_DIAG | \
+ CFG_CMD_REGINFO | \
+ CFG_CMD_SNTP | \
+ CFG_CMD_BSP)
+
+/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
+#include <cmd_confdefs.h>
+
+#define CONFIG_TIMESTAMP /* display image timestamps */
+
+#if (TEXT_BASE == 0xFC000000) /* Boot low */
+# define CFG_LOWBOOT 1
+#endif
+
+/*
+ * Autobooting
+ */
+#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
+#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
+
+#define CONFIG_PREBOOT "echo;" \
+ "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
+ "echo;"
+
+#undef CONFIG_BOOTARGS
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "netdev=eth0\0" \
+ "ipaddr=192.168.1.10\0" \
+ "serverip=192.168.1.3\0" \
+ "netmask=255.255.255.0\0" \
+ "hostname=bc3450\0" \
+ "rootpath=/opt/eldk/ppc_6xx\0" \
+ "kernel_addr=fc0a0000\0" \
+ "ramdisk_addr=fc1c0000\0" \
+ "ramargs=setenv bootargs root=/dev/ram rw\0" \
+ "nfsargs=setenv bootargs root=/dev/nfs rw " \
+ "nfsroot=$(serverip):$(rootpath)\0" \
+ "ideargs=setenv bootargs root=/dev/hda2 ro\0" \
+ "addip=setenv bootargs $(bootargs) " \
+ "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask)" \
+ ":$(hostname):$(netdev):off panic=1\0" \
+ "addcons=setenv bootargs $(bootargs) " \
+ "console=ttyS0,$(baudrate) console=tty0\0" \
+ "flash_self=run ramargs addip addcons;" \
+ "bootm $(kernel_addr) $(ramdisk_addr)\0" \
+ "flash_nfs=run nfsargs addip addcons; bootm $(kernel_addr)\0" \
+ "net_nfs=tftp 200000 $(bootfile); " \
+ "run nfsargs addip addcons; bootm\0" \
+ "ide_nfs=run nfsargs addip addcons; " \
+ "disk 200000 0:1; bootm\0" \
+ "ide_ide=run ideargs addip addcons; " \
+ "disk 200000 0:1; bootm\0" \
+ "usb_self=run usbload; run ramargs addip addcons; " \
+ "bootm 200000 400000\0" \
+ "usbload=usb reset; usb scan; usbboot 200000 0:1; " \
+ "usbboot 400000 0:2\0" \
+ "bootfile=uImage\0" \
+ "load=tftp 200000 $(u-boot)\0" \
+ "u-boot=u-boot.bin\0" \
+ "update=protect off FC000000 FC05FFFF;" \
+ "erase FC000000 FC05FFFF;" \
+ "cp.b 200000 FC000000 $(filesize);" \
+ "protect on FC000000 FC05FFFF\0" \
+ ""
+
+#define CONFIG_BOOTCOMMAND "run flash_self"
+
+/*
+ * IPB Bus clocking configuration.
+ */
+#define CFG_IPBSPEED_133 /* define for 133MHz speed */
+
+/*
+ * PCI Bus clocking configuration
+ *
+ * Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if
+ * CFG_IPBSPEED_133 is defined. This is because a PCI Clock of 66 MHz yet
+ * hasn't been tested with a IPB Bus Clock of 66 MHz.
+ */
+#if defined(CFG_IPBSPEED_133)
+# define CFG_PCISPEED_66 /* define for 66MHz speed */
+#endif
+
+/*
+ * I2C configuration
+ */
+#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
+#define CFG_I2C_MODULE 2 /* Select I2C module #2 */
+
+/*
+ * I2C clock frequency
+ *
+ * Please notice, that the resulting clock frequency could differ from the
+ * configured value. This is because the I2C clock is derived from system
+ * clock over a frequency divider with only a few divider values. U-boot
+ * calculates the best approximation for CFG_I2C_SPEED. However the calculated
+ * approximation allways lies below the configured value, never above.
+ */
+#define CFG_I2C_SPEED 100000 /* 100 kHz */
+#define CFG_I2C_SLAVE 0x7F
+
+/*
+ * EEPROM configuration for I²C EEPROM M24C32
+ * M24C64 should work also. For other EEPROMs config should be verified.
+ *
+ * The TQM5200 module may hold an EEPROM at address 0x50.
+ */
+#define CFG_I2C_EEPROM_ADDR 0x50 /* 1010000x (TQM) */
+#define CFG_I2C_EEPROM_ADDR_LEN 2
+#define CFG_EEPROM_PAGE_WRITE_BITS 5 /* =32 Bytes per write */
+#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 70
+
+/*
+ * RTC configuration
+ */
+#if defined (CONFIG_BC3450_DS1340) && !defined (CONFIG_BC3450_DS3231)
+# define CONFIG_RTC_M41T11 1
+# define CFG_I2C_RTC_ADDR 0x68
+#else
+# define CONFIG_RTC_MPC5200 1 /* use MPC5200 internal RTC */
+# define CONFIG_BOARD_EARLY_INIT_R
+#endif
+
+/*
+ * Flash configuration
+ */
+#define CFG_FLASH_BASE TEXT_BASE /* 0xFC000000 */
+
+/* use CFI flash driver if no module variant is spezified */
+#define CFG_FLASH_CFI 1 /* Flash is CFI conformant */
+#define CFG_FLASH_CFI_DRIVER 1 /* Use the common driver */
+#define CFG_FLASH_BANKS_LIST { CFG_BOOTCS_START }
+#define CFG_FLASH_EMPTY_INFO
+#define CFG_FLASH_SIZE 0x04000000 /* 64 MByte */
+#define CFG_MAX_FLASH_SECT 512 /* max num of sects on one chip */
+#undef CFG_FLASH_USE_BUFFER_WRITE /* not supported yet for AMD */
+
+#if !defined(CFG_LOWBOOT)
+#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x00760000 + 0x00800000)
+#else /* CFG_LOWBOOT */
+#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x00060000)
+#endif /* CFG_LOWBOOT */
+#define CFG_MAX_FLASH_BANKS 1 /* max num of flash banks
+ (= chip selects) */
+#define CFG_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
+#define CFG_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
+
+/* Dynamic MTD partition support */
+#define CONFIG_JFFS2_CMDLINE
+#define MTDIDS_DEFAULT "nor0=TQM5200-0"
+#define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:640k(firmware)," \
+ "1408k(kernel)," \
+ "2m(initrd)," \
+ "4m(small-fs)," \
+ "16m(big-fs)," \
+ "8m(misc)"
+
+/*
+ * Environment settings
+ */
+#define CFG_ENV_IS_IN_FLASH 1
+#define CFG_ENV_SIZE 0x10000
+#define CFG_ENV_SECT_SIZE 0x20000
+#define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR + CFG_ENV_SECT_SIZE)
+#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
+
+/*
+ * Memory map
+ */
+#define CFG_MBAR 0xF0000000
+#define CFG_SDRAM_BASE 0x00000000
+#define CFG_DEFAULT_MBAR 0x80000000
+
+/* Use ON-Chip SRAM until RAM will be available */
+#define CFG_INIT_RAM_ADDR MPC5XXX_SRAM
+#ifdef CONFIG_POST
+/* preserve space for the post_word at end of on-chip SRAM */
+# define CFG_INIT_RAM_END MPC5XXX_SRAM_POST_SIZE
+#else
+# define CFG_INIT_RAM_END MPC5XXX_SRAM_SIZE
+#endif /*CONFIG_POST*/
+
+#define CFG_GBL_DATA_SIZE 128 /* Bytes reserved for initial data */
+#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
+#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
+
+#define CFG_MONITOR_BASE TEXT_BASE
+#if (CFG_MONITOR_BASE < CFG_FLASH_BASE)
+# define CFG_RAMBOOT 1
+#endif
+
+#define CFG_MONITOR_LEN (384 << 10) /* Reserve 384 kB for Monitor */
+#define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
+#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
+
+/*
+ * Ethernet configuration
+ *
+ * Define CONFIG_FEC10MBIT to force FEC at 10MBIT
+ */
+#define CONFIG_MPC5xxx_FEC 1
+#undef CONFIG_FEC_10MBIT
+#define CONFIG_PHY_ADDR 0x00
+
+/*
+ * GPIO configuration on BC3450
+ *
+ * PSC1: UART1 (Service-UART) [0x xxxxxxx4]
+ * PSC2: UART2 [0x xxxxxx4x]
+ * or: AC/97 if CONFIG_BC3450_AC97 [0x xxxxxx2x]
+ * PSC3: USB2 [0x xxxxx1xx]
+ * USB: UART4(ext.)/UART5(int.) [0x xxxx2xxx]
+ * (this has to match
+ * CONFIG_USB_CONFIG which is
+ * used by usb_ohci.c to set
+ * the USB ports)
+ * Eth: 10/100Mbit Ethernet [0x xxx0xxxx]
+ * (this is reset to '5'
+ * in FEC driver: fec.c)
+ * PSC6: UART6 (int. to PS/2 contr.) [0x xx5xxxxx]
+ * ATA/CS: ??? [0x x1xxxxxx]
+ * FIXME! UM Fig 2-10 suggests [0x x0xxxxxx]
+ * CS1: Use Pin gpio_wkup_6 as second
+ * SDRAM chip select (mem_cs1)
+ * Timer: CAN2 / SPI
+ * I2C: CAN1 / I²C2 [0x bxxxxxxx]
+ */
+#ifdef CONFIG_BC3450_AC97
+# define CFG_GPS_PORT_CONFIG 0xb1502124
+#else /* PSC2=UART2 */
+# define CFG_GPS_PORT_CONFIG 0xb1502144
+#endif
+
+/*
+ * Miscellaneous configurable options
+ */
+#define CFG_LONGHELP /* undef to save memory */
+#define CFG_PROMPT "=> " /* Monitor Command Prompt */
+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
+#else
+#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
+#endif
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
+#define CFG_MAXARGS 16 /* max no of command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Arg. Buffer Size */
+
+#define CFG_ALT_MEMTEST /* Enable an alternative, */
+ /* more extensive mem test */
+
+#define CFG_MEMTEST_START 0x00100000 /* memtest works on */
+#define CFG_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
+
+#define CFG_LOAD_ADDR 0x100000 /* default load address */
+
+#define CFG_HZ 1000 /* dec freq: 1ms ticks */
+
+/*
+ * Enable loopw commando. This has only affect, if CFG_CMD_MEM is defined,
+ * which is normally part of the default commands (CFV_CMD_DFL)
+ */
+#define CONFIG_LOOPW
+
+/*
+ * Various low-level settings
+ */
+#if defined(CONFIG_MPC5200)
+# define CFG_HID0_INIT HID0_ICE | HID0_ICFI
+# define CFG_HID0_FINAL HID0_ICE
+#else
+# define CFG_HID0_INIT 0
+# define CFG_HID0_FINAL 0
+#endif
+
+#define CFG_BOOTCS_START CFG_FLASH_BASE
+#define CFG_BOOTCS_SIZE CFG_FLASH_SIZE
+#ifdef CFG_PCISPEED_66
+# define CFG_BOOTCS_CFG 0x0008DF30 /* for pci_clk = 66 MHz */
+#else
+# define CFG_BOOTCS_CFG 0x0004DF30 /* for pci_clk = 33 MHz */
+#endif
+#define CFG_CS0_START CFG_FLASH_BASE
+#define CFG_CS0_SIZE CFG_FLASH_SIZE
+
+/* automatic configuration of chip selects */
+#ifdef CONFIG_TQM5200
+# define CONFIG_LAST_STAGE_INIT
+#endif /* CONFIG_TQM5200 */
+
+/*
+ * SRAM - Do not map below 2 GB in address space, because this area is used
+ * for SDRAM autosizing.
+ */
+#ifdef CONFIG_TQM5200
+# define CFG_CS2_START 0xE5000000
+# define CFG_CS2_SIZE 0x100000 /* 1 MByte */
+# define CFG_CS2_CFG 0x0004D930
+#endif /* CONFIG_TQM5200 */
+
+/*
+ * Grafic controller - Do not map below 2 GB in address space, because this
+ * area is used for SDRAM autosizing.
+ */
+#ifdef CONFIG_TQM5200
+# define SM501_FB_BASE 0xE0000000
+# define CFG_CS1_START (SM501_FB_BASE)
+# define CFG_CS1_SIZE 0x4000000 /* 64 MByte */
+# define CFG_CS1_CFG 0x8F48FF70
+# define SM501_MMIO_BASE CFG_CS1_START + 0x03E00000
+#endif /* CONFIG_TQM5200 */
+
+#define CFG_CS_BURST 0x00000000
+#define CFG_CS_DEADCYCLE 0x33333311 /* 1 dead cycle for */
+ /* flash and SM501 */
+
+#define CFG_RESET_ADDRESS 0xff000000
+
+/*
+ * USB stuff
+ */
+#define CONFIG_USB_CLOCK 0x0001BBBB
+#define CONFIG_USB_CONFIG 0x00002000 /* we're using Port 2 */
+
+/*
+ * IDE/ATA stuff Supports IDE harddisk
+ */
+#undef CONFIG_IDE_8xx_PCCARD /* Use IDE with PC Card Adapter */
+
+#undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */
+#undef CONFIG_IDE_LED /* LED for ide not supported */
+
+#define CONFIG_IDE_RESET /* reset for ide supported */
+#define CONFIG_IDE_PREINIT
+
+#define CFG_IDE_MAXBUS 1 /* max. 1 IDE bus */
+#define CFG_IDE_MAXDEVICE 2 /* max. 2 drives per IDE bus */
+
+#define CFG_ATA_IDE0_OFFSET 0x0000
+
+#define CFG_ATA_BASE_ADDR MPC5XXX_ATA
+
+/* Offset for data I/O */
+#define CFG_ATA_DATA_OFFSET (0x0060)
+
+/* Offset for normal register accesses */
+#define CFG_ATA_REG_OFFSET (CFG_ATA_DATA_OFFSET)
+
+/* Offset for alternate registers */
+#define CFG_ATA_ALT_OFFSET (0x005C)
+
+/* Interval between registers */
+#define CFG_ATA_STRIDE 4
+
+#endif /* __CONFIG_H */
diff --git a/include/configs/BMW.h b/include/configs/BMW.h
index 050054d274..3bd43d8369 100644
--- a/include/configs/BMW.h
+++ b/include/configs/BMW.h
@@ -69,6 +69,10 @@
CFG_CMD_DOC | \
CFG_CMD_ELF | \
0 )
+
+/* CFG_CMD_DOC required legacy NAND support */
+#define CFG_NAND_LEGACY
+
#if 0
#define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_DHCP | \
CFG_CMD_PCI | CFG_CMD_DOC | CFG_CMD_DATE)
diff --git a/include/configs/CATcenter.h b/include/configs/CATcenter.h
index ffe89cb78f..7ec4599ebb 100644
--- a/include/configs/CATcenter.h
+++ b/include/configs/CATcenter.h
@@ -193,6 +193,8 @@
*/
#define CFG_NAND0_BASE 0xFF400000
#define CFG_NAND1_BASE 0xFF000000
+#define CFG_NAND_BASE_LIST { CFG_NAND0_BASE }
+#define NAND_BIG_DELAY_US 25
/* For CATcenter there is only NAND on the module */
#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
@@ -218,9 +220,9 @@
#define CFG_NAND1_RDY (0x80000000 >> 31) /* our RDY is GPIO31 */
-#define NAND_DISABLE_CE(nand) do \
+#define MACRO_NAND_DISABLE_CE(nandptr) do \
{ \
- switch((unsigned long)(((struct nand_chip *)nand)->IO_ADDR)) \
+ switch((unsigned long)nandptr) \
{ \
case CFG_NAND0_BASE: \
out32(GPIO0_OR, in32(GPIO0_OR) | CFG_NAND0_CE); \
@@ -231,9 +233,9 @@
} \
} while(0)
-#define NAND_ENABLE_CE(nand) do \
+#define MACRO_NAND_ENABLE_CE(nandptr) do \
{ \
- switch((unsigned long)(((struct nand_chip *)nand)->IO_ADDR)) \
+ switch((unsigned long)nandptr) \
{ \
case CFG_NAND0_BASE: \
out32(GPIO0_OR, in32(GPIO0_OR) & ~CFG_NAND0_CE); \
@@ -244,8 +246,7 @@
} \
} while(0)
-
-#define NAND_CTL_CLRALE(nandptr) do \
+#define MACRO_NAND_CTL_CLRALE(nandptr) do \
{ \
switch((unsigned long)nandptr) \
{ \
@@ -258,7 +259,7 @@
} \
} while(0)
-#define NAND_CTL_SETALE(nandptr) do \
+#define MACRO_NAND_CTL_SETALE(nandptr) do \
{ \
switch((unsigned long)nandptr) \
{ \
@@ -271,7 +272,7 @@
} \
} while(0)
-#define NAND_CTL_CLRCLE(nandptr) do \
+#define MACRO_NAND_CTL_CLRCLE(nandptr) do \
{ \
switch((unsigned long)nandptr) \
{ \
@@ -284,7 +285,7 @@
} \
} while(0)
-#define NAND_CTL_SETCLE(nandptr) do { \
+#define MACRO_NAND_CTL_SETCLE(nandptr) do { \
switch((unsigned long)nandptr) { \
case CFG_NAND0_BASE: \
out32(GPIO0_OR, in32(GPIO0_OR) | CFG_NAND0_CLE); \
diff --git a/include/configs/CMS700.h b/include/configs/CMS700.h
index 6025886e3e..1cca2859f4 100644
--- a/include/configs/CMS700.h
+++ b/include/configs/CMS700.h
@@ -81,6 +81,8 @@
/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
#include <cmd_confdefs.h>
+#define CFG_NAND_LEGACY
+
#undef CONFIG_WATCHDOG /* watchdog disabled */
#define CONFIG_SDRAM_BANK0 1 /* init onboard SDRAM bank 0 */
diff --git a/include/configs/CPCI2DP.h b/include/configs/CPCI2DP.h
index 756bb8ceac..56fd9a6d35 100644
--- a/include/configs/CPCI2DP.h
+++ b/include/configs/CPCI2DP.h
@@ -143,8 +143,9 @@
#define CFG_PCI_SUBSYS_VENDORID 0x12FE /* PCI Vendor ID: esd gmbh */
#define CFG_PCI_SUBSYS_DEVICEID 0x040b /* PCI Device ID: CPCI-2DP */
#define CFG_PCI_CLASSCODE 0x0280 /* PCI Class Code: Network/Other*/
-#define CFG_PCI_PTM1LA 0x00000000 /* point to sdram */
-#define CFG_PCI_PTM1MS 0xfc000001 /* 64MB, enable hard-wired to 1 */
+
+#define CFG_PCI_PTM1LA (bd->bi_memstart) /* point to sdram */
+#define CFG_PCI_PTM1MS (~(bd->bi_memsize - 1) | 1) /* memsize, enable hard-wired to 1 */
#define CFG_PCI_PTM1PCI 0x00000000 /* Host: use this pci address */
#define CFG_PCI_PTM2LA 0xef000000 /* point to internal regs + PB0/1 */
#define CFG_PCI_PTM2MS 0xff000001 /* 16MB, enable */
@@ -250,14 +251,15 @@
#define CFG_INIT_RAM_ADDR 0x40000000 /* use data cache */
#define CFG_INIT_RAM_END 0x2000 /* End of used area in RAM */
-#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
-#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
+#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
+#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
/*-----------------------------------------------------------------------
* GPIO definitions
*/
#define CFG_EEPROM_WP (0x80000000 >> 13) /* GPIO13 */
+#define CFG_SELF_RST (0x80000000 >> 14) /* GPIO14 */
#define CFG_PB_LED (0x80000000 >> 16) /* GPIO16 */
#define CFG_INTA_FAKE (0x80000000 >> 23) /* GPIO23 */
diff --git a/include/configs/CPCI405.h b/include/configs/CPCI405.h
index d49020db76..047e2f1eef 100644
--- a/include/configs/CPCI405.h
+++ b/include/configs/CPCI405.h
@@ -79,6 +79,8 @@
/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
#include <cmd_confdefs.h>
+#define CFG_NAND_LEGACY
+
#undef CONFIG_WATCHDOG /* watchdog disabled */
#define CONFIG_SDRAM_BANK0 1 /* init onboard SDRAM bank 0 */
@@ -151,8 +153,8 @@
#define CFG_PCI_SUBSYS_DEVICEID 0x0405 /* PCI Device ID: CPCI-405 */
#define CFG_PCI_SUBSYS_DEVICEID2 0x0406 /* PCI Device ID: CPCI-405-A */
#define CFG_PCI_CLASSCODE 0x0b20 /* PCI Class Code: Processor/PPC*/
-#define CFG_PCI_PTM1LA 0x00000000 /* point to sdram */
-#define CFG_PCI_PTM1MS 0xfc000001 /* 64MB, enable hard-wired to 1 */
+#define CFG_PCI_PTM1LA (bd->bi_memstart) /* point to sdram */
+#define CFG_PCI_PTM1MS (~(bd->bi_memsize - 1) | 1) /* memsize, enable hard-wired to 1 */
#define CFG_PCI_PTM1PCI 0x00000000 /* Host: use this pci address */
#define CFG_PCI_PTM2LA 0xffc00000 /* point to flash */
#define CFG_PCI_PTM2MS 0xffc00001 /* 4MB, enable */
diff --git a/include/configs/CPCI4052.h b/include/configs/CPCI4052.h
index 13dbe80daf..d756f447f7 100644
--- a/include/configs/CPCI4052.h
+++ b/include/configs/CPCI4052.h
@@ -100,6 +100,8 @@
/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
#include <cmd_confdefs.h>
+#define CFG_NAND_LEGACY
+
#undef CONFIG_WATCHDOG /* watchdog disabled */
#define CONFIG_SDRAM_BANK0 1 /* init onboard SDRAM bank 0 */
@@ -178,8 +180,8 @@
#define CFG_PCI_SUBSYS_DEVICEID 0x0405 /* PCI Device ID: CPCI-405 */
#define CFG_PCI_SUBSYS_DEVICEID2 0x0406 /* PCI Device ID: CPCI-405-A */
#define CFG_PCI_CLASSCODE 0x0b20 /* PCI Class Code: Processor/PPC*/
-#define CFG_PCI_PTM1LA 0x00000000 /* point to sdram */
-#define CFG_PCI_PTM1MS 0xfc000001 /* 64MB, enable hard-wired to 1 */
+#define CFG_PCI_PTM1LA (bd->bi_memstart) /* point to sdram */
+#define CFG_PCI_PTM1MS (~(bd->bi_memsize - 1) | 1) /* memsize, enable hard-wired to 1 */
#define CFG_PCI_PTM1PCI 0x00000000 /* Host: use this pci address */
#define CFG_PCI_PTM2LA 0xffc00000 /* point to flash */
#define CFG_PCI_PTM2MS 0xffc00001 /* 4MB, enable */
diff --git a/include/configs/CPCI405AB.h b/include/configs/CPCI405AB.h
index aaaafa94fd..852d94a410 100644
--- a/include/configs/CPCI405AB.h
+++ b/include/configs/CPCI405AB.h
@@ -87,6 +87,9 @@
/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
#include <cmd_confdefs.h>
+#define CFG_NAND_LEGACY
+
+
#undef CONFIG_WATCHDOG /* watchdog disabled */
#define CONFIG_SDRAM_BANK0 1 /* init onboard SDRAM bank 0 */
@@ -161,8 +164,8 @@
#define CFG_PCI_SUBSYS_DEVICEID 0x0405 /* PCI Device ID: CPCI-405 */
#define CFG_PCI_SUBSYS_DEVICEID2 0x0406 /* PCI Device ID: CPCI-405-A */
#define CFG_PCI_CLASSCODE 0x0b20 /* PCI Class Code: Processor/PPC*/
-#define CFG_PCI_PTM1LA 0x00000000 /* point to sdram */
-#define CFG_PCI_PTM1MS 0xfc000001 /* 64MB, enable hard-wired to 1 */
+#define CFG_PCI_PTM1LA (bd->bi_memstart) /* point to sdram */
+#define CFG_PCI_PTM1MS (~(bd->bi_memsize - 1) | 1) /* memsize, enable hard-wired to 1 */
#define CFG_PCI_PTM1PCI 0x00000000 /* Host: use this pci address */
#define CFG_PCI_PTM2LA 0xffc00000 /* point to flash */
#define CFG_PCI_PTM2MS 0xffc00001 /* 4MB, enable */
diff --git a/include/configs/CPCI405DT.h b/include/configs/CPCI405DT.h
index 5cd9aba9e5..2260327c3f 100644
--- a/include/configs/CPCI405DT.h
+++ b/include/configs/CPCI405DT.h
@@ -98,6 +98,8 @@
/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
#include <cmd_confdefs.h>
+#define CFG_NAND_LEGACY
+
#undef CONFIG_WATCHDOG /* watchdog disabled */
#define CONFIG_SDRAM_BANK0 1 /* init onboard SDRAM bank 0 */
@@ -183,8 +185,8 @@
#define CFG_PCI_SUBSYS_DEVICEID 0x0405 /* PCI Device ID: CPCI-405 */
#define CFG_PCI_SUBSYS_DEVICEID2 0x0406 /* PCI Device ID: CPCI-405-A */
#define CFG_PCI_CLASSCODE 0x0b20 /* PCI Class Code: Processor/PPC*/
-#define CFG_PCI_PTM1LA 0x00000000 /* point to sdram */
-#define CFG_PCI_PTM1MS 0xfc000001 /* 64MB, enable hard-wired to 1 */
+#define CFG_PCI_PTM1LA (bd->bi_memstart) /* point to sdram */
+#define CFG_PCI_PTM1MS (~(bd->bi_memsize - 1) | 1) /* memsize, enable hard-wired to 1 */
#define CFG_PCI_PTM1PCI 0x00000000 /* Host: use this pci address */
#define CFG_PCI_PTM2LA 0xffc00000 /* point to flash */
#define CFG_PCI_PTM2MS 0xffc00001 /* 4MB, enable */
diff --git a/include/configs/CPCI750.h b/include/configs/CPCI750.h
index 8bfd0ee820..244e45a750 100644
--- a/include/configs/CPCI750.h
+++ b/include/configs/CPCI750.h
@@ -12,7 +12,7 @@
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
@@ -57,7 +57,7 @@
#define CONFIG_CPCI750 1 /* this is an CPCI750 board */
-#define CONFIG_BAUDRATE 9600 /* console baudrate = 9600 */
+#define CONFIG_BAUDRATE 9600 /* console baudrate = 9600 */
#undef CONFIG_ECC /* enable ECC support */
@@ -70,10 +70,12 @@
#define CONFIG_IDENT_STRING "Marvell 64360 + IBM750FX"
/*#define CFG_HUSH_PARSER*/
-#undef CFG_HUSH_PARSER
+#define CFG_HUSH_PARSER
#define CFG_PROMPT_HUSH_PS2 "> "
+#define CFG_AUTO_COMPLETE 1
+
/* Define which ETH port will be used for connecting the network */
#define CFG_ETH_PORT ETH_0
@@ -82,19 +84,19 @@
* for your console driver.
*
* what to do:
- * to use the DUART, undef CONFIG_MPSC. If you have hacked a serial
+ * to use the DUART, undef CONFIG_MPSC. If you have hacked a serial
* cable onto the second DUART channel, change the CFG_DUART port from 1
* to 0 below.
*
* to use the MPSC, #define CONFIG_MPSC. If you have wired up another
* mpsc channel, change CONFIG_MPSC_PORT to the desired value.
*/
-#define CONFIG_MPSC
+#define CONFIG_MPSC
#define CONFIG_MPSC_PORT 0
/* to change the default ethernet port, use this define (options: 0, 1, 2) */
#define CONFIG_NET_MULTI
-#define MV_ETH_DEVS 1
+#define MV_ETH_DEVS 1
#define CONFIG_ETHER_PORT 0
#undef CONFIG_ETHER_PORT_MII /* use RMII */
@@ -116,38 +118,38 @@
#define CONFIG_SERIAL "AA000001"
#define CONFIG_SERVERIP "10.0.0.79"
-#define CONFIG_ROOTPATH "/export/nfs_cpci750/%s"
+#define CONFIG_ROOTPATH "/export/nfs_cpci750/%s"
#define CONFIG_TESTDRAMDATA y
-#define CONFIG_TESTDRAMADDRESS n
+#define CONFIG_TESTDRAMADDRESS n
#define CONFIG_TESETDRAMWALK n
/* ----------------------------------------------------------------------------- */
-#define CONFIG_LOADS_ECHO 0 /* echo off for serial download */
-#define CFG_LOADS_BAUD_CHANGE /* allow baudrate changes */
+#define CONFIG_LOADS_ECHO 0 /* echo off for serial download */
+#define CFG_LOADS_BAUD_CHANGE /* allow baudrate changes */
#undef CONFIG_WATCHDOG /* watchdog disabled */
-#undef CONFIG_ALTIVEC /* undef to disable */
+#undef CONFIG_ALTIVEC /* undef to disable */
#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | \
CONFIG_BOOTP_BOOTFILESIZE)
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL \
+#define CONFIG_COMMANDS (CONFIG_CMD_DFL \
| CFG_CMD_ASKENV \
- | CFG_CMD_I2C \
+ | CFG_CMD_I2C \
| CFG_CMD_CACHE \
| CFG_CMD_EEPROM \
- | CFG_CMD_PCI \
+ | CFG_CMD_PCI \
| CFG_CMD_ELF \
| CFG_CMD_DATE \
- | CFG_CMD_NET \
- | CFG_CMD_PING \
- | CFG_CMD_IDE \
- | CFG_CMD_FAT \
- | CFG_CMD_EXT2 \
+ | CFG_CMD_NET \
+ | CFG_CMD_PING \
+ | CFG_CMD_IDE \
+ | CFG_CMD_FAT \
+ | CFG_CMD_EXT2 \
)
#define CONFIG_DOS_PARTITION
@@ -155,28 +157,40 @@
/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
#include <cmd_confdefs.h>
+#define CONFIG_USE_CPCIDVI
+
+#ifdef CONFIG_USE_CPCIDVI
+#define CONFIG_VIDEO
+#define CONFIG_VIDEO_CT69000
+#define CONFIG_CFB_CONSOLE
+#define CONFIG_VIDEO_SW_CURSOR
+#define CONFIG_VIDEO_LOGO
+#define CONFIG_I8042_KBD
+#define CFG_ISA_IO 0
+#endif
+
/*
* Miscellaneous configurable options
*/
#define CFG_I2C_EEPROM_ADDR_LEN 2
#define CFG_I2C_MULTI_EEPROMS
-#define CFG_I2C_SPEED 80000 /* I2C speed default */
+#define CFG_I2C_SPEED 80000 /* I2C speed default */
#define CFG_GT_DUAL_CPU /* also for JTAG even with one cpu */
-#define CFG_LONGHELP /* undef to save memory */
-#define CFG_PROMPT "=> " /* Monitor Command Prompt */
+#define CFG_LONGHELP /* undef to save memory */
+#define CFG_PROMPT "=> " /* Monitor Command Prompt */
#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
-#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
+#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
-#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
+#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
#endif
-#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
-#define CFG_MAXARGS 16 /* max number of command args */
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
+#define CFG_MAXARGS 16 /* max number of command args */
#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
/*#define CFG_MEMTEST_START 0x00400000*/ /* memtest works on */
/*#define CFG_MEMTEST_END 0x00C00000*/ /* 4 ... 12 MB in DRAM */
-/*#define CFG_MEMTEST_END 0x07c00000*/ /* 4 ... 124 MB in DRAM */
+/*#define CFG_MEMTEST_END 0x07c00000*/ /* 4 ... 124 MB in DRAM */
/*
#define CFG_DRAM_TEST
@@ -184,21 +198,21 @@
* CFG_DRAM_TEST - enables the following tests.
*
* CFG_DRAM_TEST_DATA - Enables test for shorted or open data lines
- * Environment variable 'test_dram_data' must be
- * set to 'y'.
+ * Environment variable 'test_dram_data' must be
+ * set to 'y'.
* CFG_DRAM_TEST_DATA - Enables test to verify that each word is uniquely
- * addressable. Environment variable
- * 'test_dram_address' must be set to 'y'.
+ * addressable. Environment variable
+ * 'test_dram_address' must be set to 'y'.
* CFG_DRAM_TEST_WALK - Enables test a 64-bit walking ones pattern test.
- * This test takes about 6 minutes to test 64 MB.
- * Environment variable 'test_dram_walk' must be
- * set to 'y'.
+ * This test takes about 6 minutes to test 64 MB.
+ * Environment variable 'test_dram_walk' must be
+ * set to 'y'.
*/
#define CFG_DRAM_TEST
#if defined(CFG_DRAM_TEST)
#define CFG_MEMTEST_START 0x00400000 /* memtest works on */
/*#define CFG_MEMTEST_END 0x00C00000*/ /* 4 ... 12 MB in DRAM */
-#define CFG_MEMTEST_END 0x07c00000 /* 4 ... 124 MB in DRAM */
+#define CFG_MEMTEST_END 0x07c00000 /* 4 ... 124 MB in DRAM */
#define CFG_DRAM_TEST_DATA
#define CFG_DRAM_TEST_ADDRESS
#define CFG_DRAM_TEST_WALK
@@ -207,10 +221,10 @@
#define CONFIG_DISPLAY_MEMMAP /* at the end of the bootprocess show the memory map */
#undef CFG_DISPLAY_DIMM_SPD_CONTENT /* show SPD content during boot */
-#define CFG_LOAD_ADDR 0x00300000 /* default load address */
+#define CFG_LOAD_ADDR 0x00300000 /* default load address */
-#define CFG_HZ 1000 /* decr freq: 1ms ticks */
-#define CFG_BUS_HZ 133000000 /* 133 MHz (CPU = 5*Bus = 666MHz) */
+#define CFG_HZ 1000 /* decr freq: 1ms ticks */
+#define CFG_BUS_HZ 133000000 /* 133 MHz (CPU = 5*Bus = 666MHz) */
#define CFG_BUS_CLK CFG_BUS_HZ
#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
@@ -237,7 +251,7 @@
* To an unused memory region. The stack will remain in cache until RAM
* is initialized
*/
-#undef CFG_INIT_RAM_LOCK
+#undef CFG_INIT_RAM_LOCK
/* #define CFG_INIT_RAM_ADDR 0x40000000*/ /* unused memory region */
/* #define CFG_INIT_RAM_ADDR 0xfba00000*/ /* unused memory region */
#define CFG_INIT_RAM_ADDR 0xf1080000 /* unused memory region */
@@ -247,7 +261,7 @@
#define RELOCATE_INTERNAL_RAM_ADDR
#ifdef RELOCATE_INTERNAL_RAM_ADDR
-/*#define CFG_INTERNAL_RAM_ADDR 0xfba00000*/
+/*#define CFG_INTERNAL_RAM_ADDR 0xfba00000*/
#define CFG_INTERNAL_RAM_ADDR 0xf1080000
#endif
@@ -256,28 +270,34 @@
* (Set up by the startup code)
* Please note that CFG_SDRAM_BASE _must_ start at 0
*/
-#define CFG_SDRAM_BASE 0x00000000
+#define CFG_SDRAM_BASE 0x00000000
/* Dummies for BAT 4-7 */
-#define CFG_SDRAM1_BASE 0x10000000 /* each 256 MByte */
-#define CFG_SDRAM2_BASE 0x20000000
-#define CFG_SDRAM3_BASE 0x30000000
-#define CFG_SDRAM4_BASE 0x40000000
+#define CFG_SDRAM1_BASE 0x10000000 /* each 256 MByte */
+#define CFG_SDRAM2_BASE 0x20000000
+#define CFG_SDRAM3_BASE 0x30000000
+#define CFG_SDRAM4_BASE 0x40000000
#define CFG_RESET_ADDRESS 0xfff00100
-#define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
+#define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
#define CFG_MONITOR_BASE 0xfff00000
-#define CFG_MALLOC_LEN (128 << 10) /* Reserve 256 kB for malloc */
+#define CFG_MALLOC_LEN (128 << 10) /* Reserve 256 kB for malloc */
/*-----------------------------------------------------------------------
* FLASH related
*----------------------------------------------------------------------*/
+#define CFG_FLASH_CFI_DRIVER
#define CFG_FLASH_CFI 1 /* Flash is CFI conformant */
-#define CFG_MAX_FLASH_SECT 128 /* max number of sectors on one chip */
-#define CFG_MAX_FLASH_BANKS 4 /* max number of memory banks */
-#define CFG_FLASH_INCREMENT 0x01000000 /* there is only one bank */
#define CFG_FLASH_PROTECTION 1 /* use hardware protection */
#define CFG_FLASH_USE_BUFFER_WRITE 1 /* use buffered writes (20x faster) */
-#define CFG_FLASH_BASE 0xfc000000 /* start of flash banks */
+#define CFG_FLASH_BASE 0xfc000000 /* start of flash banks */
+#define CFG_MAX_FLASH_BANKS 4 /* max number of memory banks */
+#define CFG_FLASH_INCREMENT 0x01000000 /* size of flash bank */
+#define CFG_MAX_FLASH_SECT 128 /* max number of sectors on one chip */
+#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE, \
+ CFG_FLASH_BASE + 1*CFG_FLASH_INCREMENT, \
+ CFG_FLASH_BASE + 2*CFG_FLASH_INCREMENT, \
+ CFG_FLASH_BASE + 3*CFG_FLASH_INCREMENT }
+#define CFG_FLASH_EMPTY_INFO 1 /* show if bank is empty */
/* areas to map different things with the GT in physical space */
#define CFG_DRAM_BANKS 4
@@ -288,20 +308,20 @@
/* Peripheral Device section */
/*******************************************************/
-/* We have on the cpci750 Board : */
-/* GT-Chipset Register Area */
-/* GT-Chipset internal SRAM 256k */
-/* SRAM on external device module */
-/* Real time clock on external device module */
-/* dobble UART on external device module */
-/* Data flash on external device module */
-/* Boot flash on external device module */
+/* We have on the cpci750 Board : */
+/* GT-Chipset Register Area */
+/* GT-Chipset internal SRAM 256k */
+/* SRAM on external device module */
+/* Real time clock on external device module */
+/* dobble UART on external device module */
+/* Data flash on external device module */
+/* Boot flash on external device module */
/*******************************************************/
#define CFG_DFL_GT_REGS 0x14000000 /* boot time GT_REGS */
-#define CFG_CPCI750_RESET_ADDR 0x14000000 /* After power on Reset the CPCI750 is here */
+#define CFG_CPCI750_RESET_ADDR 0x14000000 /* After power on Reset the CPCI750 is here */
-#undef MARVEL_STANDARD_CFG
-#ifndef MARVEL_STANDARD_CFG
+#undef MARVEL_STANDARD_CFG
+#ifndef MARVEL_STANDARD_CFG
/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
#define CFG_GT_REGS 0xf1000000 /* GT Registers will be mapped here */
/*#define CFG_DEV_BASE 0xfc000000*/ /* GT Devices CS start here */
@@ -313,11 +333,11 @@
#define CFG_DEV2_SPACE 0xfe000000 /* DEV_CS2 flash 3 */
#define CFG_DEV3_SPACE 0xf0000000 /* DEV_CS3 nvram/can */
-#define CFG_BOOT_SIZE _16M /* cpci750 flash 0 */
-#define CFG_DEV0_SIZE _16M /* cpci750 flash 1 */
-#define CFG_DEV1_SIZE _16M /* cpci750 flash 2 */
-#define CFG_DEV2_SIZE _16M /* cpci750 flash 3 */
-#define CFG_DEV3_SIZE _16M /* cpci750 nvram/can */
+#define CFG_BOOT_SIZE _16M /* cpci750 flash 0 */
+#define CFG_DEV0_SIZE _16M /* cpci750 flash 1 */
+#define CFG_DEV1_SIZE _16M /* cpci750 flash 2 */
+#define CFG_DEV2_SIZE _16M /* cpci750 flash 3 */
+#define CFG_DEV3_SIZE _16M /* cpci750 nvram/can */
/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
#endif
@@ -326,22 +346,22 @@
#define CFG_DEV0_PAR 0x8FDFFFFF /* 16 bit flash */
#define CFG_DEV1_PAR 0x8FDFFFFF /* 16 bit flash */
#define CFG_DEV2_PAR 0x8FDFFFFF /* 16 bit flash */
-#define CFG_DEV3_PAR 0x8FCFFFFF /* nvram/can */
+#define CFG_DEV3_PAR 0x8FCFFFFF /* nvram/can */
#define CFG_BOOT_PAR 0x8FDFFFFF /* 16 bit flash */
- /* c 4 a 8 2 4 1 c */
- /* 33 22|2222|22 22|111 1|11 11|1 1 | | */
+ /* c 4 a 8 2 4 1 c */
+ /* 33 22|2222|22 22|111 1|11 11|1 1 | | */
/* 10 98|7654|32 10|987 6|54 32|1 098|7 654|3 210 */
/* 11|00|0100|10 10|100|0 00|10 0|100 0|001 1|100 */
/* 3| 0|.... ..| 2| 4 | 0 | 4 | 8 | 3 | 4 */
/* MPP Control MV64360 Appendix P P. 632*/
-#define CFG_MPP_CONTROL_0 0x00002222 /* */
-#define CFG_MPP_CONTROL_1 0x11110000 /* */
-#define CFG_MPP_CONTROL_2 0x11111111 /* */
-#define CFG_MPP_CONTROL_3 0x00001111 /* */
-/* #define CFG_SERIAL_PORT_MUX 0x00000102*/ /* */
+#define CFG_MPP_CONTROL_0 0x00002222 /* */
+#define CFG_MPP_CONTROL_1 0x11110000 /* */
+#define CFG_MPP_CONTROL_2 0x11111111 /* */
+#define CFG_MPP_CONTROL_3 0x00001111 /* */
+/* #define CFG_SERIAL_PORT_MUX 0x00000102*/ /* */
#define CFG_GPP_LEVEL_CONTROL 0xffffffff /* 1111 1111 1111 1111 1111 1111 1111 1111*/
@@ -358,12 +378,12 @@
ECC disable
non registered DRAM */
/* 31:26 25:22 21:20 19 18 17 16 */
- /* 100001 0000 010 0 0 0 0 */
+ /* 100001 0000 010 0 0 0 0 */
/* refresh_count=0x400
phisical interleaving disable
virtual interleaving enable */
/* 15 14 13:0 */
- /* 0 1 0x400 */
+ /* 0 1 0x400 */
# define CFG_SDRAM_CONFIG 0x58200400 /* 0x1400 copied from Dink32 bzw. VxWorks*/
@@ -372,14 +392,14 @@
*-----------------------------------------------------------------------
*/
-#define PCI_HOST_ADAPTER 0 /* configure ar pci adapter */
-#define PCI_HOST_FORCE 1 /* configure as pci host */
-#define PCI_HOST_AUTO 2 /* detected via arbiter enable */
+#define PCI_HOST_ADAPTER 0 /* configure ar pci adapter */
+#define PCI_HOST_FORCE 1 /* configure as pci host */
+#define PCI_HOST_AUTO 2 /* detected via arbiter enable */
-#define CONFIG_PCI /* include pci support */
-#define CONFIG_PCI_HOST PCI_HOST_FORCE /* select pci host function */
-#define CONFIG_PCI_PNP /* do pci plug-and-play */
-#define CONFIG_PCI_SCAN_SHOW /* show devices on bus */
+#define CONFIG_PCI /* include pci support */
+#define CONFIG_PCI_HOST PCI_HOST_FORCE /* select pci host function */
+#define CONFIG_PCI_PNP /* do pci plug-and-play */
+#define CONFIG_PCI_SCAN_SHOW /* show devices on bus */
/* PCI MEMORY MAP section */
#define CFG_PCI0_MEM_BASE 0x80000000
@@ -401,6 +421,8 @@
#define CFG_PCI1_IO_SPACE (CFG_PCI1_IO_BASE)
#define CFG_PCI1_IO_SPACE_PCI 0x00000000
+#define CFG_ISA_IO_BASE_ADDRESS (CFG_PCI0_IO_BASE)
+
#if defined (CONFIG_750CX)
#define CFG_PCI_IDSEL 0x0
#else
@@ -411,21 +433,21 @@
* IDE/ATA stuff
*-----------------------------------------------------------------------
*/
-#undef CONFIG_IDE_8xx_DIRECT /* no pcmcia interface required */
-#undef CONFIG_IDE_LED /* no led for ide supported */
-#define CONFIG_IDE_RESET /* no reset for ide supported */
-#define CONFIG_IDE_PREINIT /* check for units */
+#undef CONFIG_IDE_8xx_DIRECT /* no pcmcia interface required */
+#undef CONFIG_IDE_LED /* no led for ide supported */
+#define CONFIG_IDE_RESET /* no reset for ide supported */
+#define CONFIG_IDE_PREINIT /* check for units */
-#define CFG_IDE_MAXBUS 2 /* max. 1 IDE busses */
-#define CFG_IDE_MAXDEVICE (CFG_IDE_MAXBUS*2) /* max. 1 drives per IDE bus */
+#define CFG_IDE_MAXBUS 2 /* max. 1 IDE busses */
+#define CFG_IDE_MAXDEVICE (CFG_IDE_MAXBUS*2) /* max. 1 drives per IDE bus */
-#define CFG_ATA_BASE_ADDR 0
-#define CFG_ATA_IDE0_OFFSET 0
-#define CFG_ATA_IDE1_OFFSET 0
+#define CFG_ATA_BASE_ADDR 0
+#define CFG_ATA_IDE0_OFFSET 0
+#define CFG_ATA_IDE1_OFFSET 0
-#define CFG_ATA_DATA_OFFSET 0x0000 /* Offset for data I/O */
-#define CFG_ATA_REG_OFFSET 0x0000 /* Offset for normal register accesses */
-#define CFG_ATA_ALT_OFFSET 0x0000 /* Offset for alternate registers */
+#define CFG_ATA_DATA_OFFSET 0x0000 /* Offset for data I/O */
+#define CFG_ATA_REG_OFFSET 0x0000 /* Offset for normal register accesses */
+#define CFG_ATA_ALT_OFFSET 0x0000 /* Offset for alternate registers */
/*----------------------------------------------------------------------
@@ -529,7 +551,7 @@
* have to be in the first 8 MB of memory, since this is
* the maximum mapped by the Linux kernel during initialization.
*/
-#define CFG_BOOTMAPSZ (8<<20) /* Initial Memory map for Linux */
+#define CFG_BOOTMAPSZ (8<<20) /* Initial Memory map for Linux */
/*-----------------------------------------------------------------------
* FLASH organization
@@ -541,23 +563,23 @@
#define CFG_FLASH_LOCK_TOUT 500 /* Timeout for Flash Lock (in ms) */
#if 0
-#define CFG_ENV_IS_IN_FLASH 0
-#define CFG_ENV_SIZE 0x1000 /* Total Size of Environment Sector */
+#define CFG_ENV_IS_IN_FLASH 0
+#define CFG_ENV_SIZE 0x1000 /* Total Size of Environment Sector */
#define CFG_ENV_SECT_SIZE 0x10000
#define CFG_ENV_ADDR 0xFFF78000 /* Marvell 8-Bit Bootflash last sector */
-/* #define CFG_ENV_ADDR (CFG_FLASH_BASE+CFG_MONITOR_LEN-CFG_ENV_SECT_SIZE) */
+/* #define CFG_ENV_ADDR (CFG_FLASH_BASE+CFG_MONITOR_LEN-CFG_ENV_SECT_SIZE) */
#endif
#define CFG_ENV_IS_IN_EEPROM 1 /* use EEPROM for environment vars */
#define CFG_EEPROM_PAGE_WRITE_BITS 5
#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 20
-#define CFG_I2C_EEPROM_ADDR 0x050
+#define CFG_I2C_EEPROM_ADDR 0x050
#define CFG_ENV_OFFSET 0x200 /* environment starts at the beginning of the EEPROM */
#define CFG_ENV_SIZE 0x600 /* 2048 bytes may be used for env vars*/
#define CFG_NVRAM_BASE_ADDR 0xf0000000 /* NVRAM base address */
#define CFG_NVRAM_SIZE (32*1024) /* NVRAM size */
-#define CFG_VXWORKS_MAC_PTR (CFG_NVRAM_BASE_ADDR+CFG_NVRAM_SIZE-0x40)
+#define CFG_VXWORKS_MAC_PTR (CFG_NVRAM_BASE_ADDR+CFG_NVRAM_SIZE-0x40)
/*-----------------------------------------------------------------------
* Cache Configuration
@@ -579,7 +601,7 @@
#if defined (CONFIG_750CX) || defined (CONFIG_750FX)
#define L2_INIT 0
#else
-#define L2_INIT (L2CR_L2SIZ_2M | L2CR_L2CLK_3 | L2CR_L2RAM_BURST | \
+#define L2_INIT (L2CR_L2SIZ_2M | L2CR_L2CLK_3 | L2CR_L2RAM_BURST | \
L2CR_L2OH_5 | L2CR_L2CTL | L2CR_L2WT)
#endif
@@ -590,9 +612,9 @@
*
* Boot Flags
*/
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
+#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#define CFG_BOARD_ASM_INIT 1
+#define CFG_BOARD_ASM_INIT 1
#endif /* __CONFIG_H */
diff --git a/include/configs/CPU87.h b/include/configs/CPU87.h
index a23d7e50b7..7a1dada2db 100644
--- a/include/configs/CPU87.h
+++ b/include/configs/CPU87.h
@@ -189,6 +189,8 @@
/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
#include <cmd_confdefs.h>
+#define CFG_NAND_LEGACY
+
/*
* Miscellaneous configurable options
*/
@@ -453,7 +455,7 @@
#define CFG_MIN_AM_MASK 0xC0000000
/*
- * we use the same values for 32 MB and 128 MB SDRAM
+ * we use the same values for 32 MB, 128 MB and 256 MB SDRAM
* refresh rate = 7.68 uS (100 MHz Bus Clock)
*/
@@ -508,6 +510,24 @@
PSDMR_WRC_1C |\
PSDMR_CL_2)
+ /* SDRAM initialization values for 10-column chips
+ */
+#define CFG_OR2_10COL (CFG_MIN_AM_MASK |\
+ ORxS_BPD_4 |\
+ ORxS_ROWST_PBI1_A4 |\
+ ORxS_NUMR_13)
+
+#define CFG_PSDMR_10COL (PSDMR_PBI |\
+ PSDMR_SDAM_A17_IS_A5 |\
+ PSDMR_BSMA_A13_A15 |\
+ PSDMR_SDA10_PBI1_A6 |\
+ PSDMR_RFRC_7_CLK |\
+ PSDMR_PRETOACT_2W |\
+ PSDMR_ACTTORW_2W |\
+ PSDMR_LDOTOPRE_1C |\
+ PSDMR_WRC_1C |\
+ PSDMR_CL_2)
+
/*
* Init Memory Controller:
*
@@ -586,9 +606,9 @@
BRx_MS_SDRAM_P |\
BRx_V)
-#define CFG_OR2_PRELIM CFG_OR2_9COL
+#define CFG_OR2_PRELIM CFG_OR2_8COL
-#define CFG_PSDMR CFG_PSDMR_9COL
+#define CFG_PSDMR CFG_PSDMR_8COL
#endif /* CFG_RAMBOOT */
/* Bank 3 - Dual Ported SRAM
diff --git a/include/configs/EB+MCF-EV123.h b/include/configs/EB+MCF-EV123.h
new file mode 100644
index 0000000000..720b335b09
--- /dev/null
+++ b/include/configs/EB+MCF-EV123.h
@@ -0,0 +1,223 @@
+/*
+ * Configuation settings for the BuS EB+MCF-EV123 boards.
+ *
+ * (C) Copyright 2005 BuS Elektronik GmbH & Co.KG <esw@bus-elektonik.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _CONFIG_EB_MCF_EV123_H_
+#define _CONFIG_EB_MCF_EV123_H_
+
+#define CONFIG_EB_MCF_EV123
+
+#undef DEBUG
+#undef CFG_HALT_BEFOR_RAM_JUMP
+#undef ET_DEBUG
+
+/*
+ * High Level Configuration Options (easy to change)
+ */
+
+#define CONFIG_MCF52x2 /* define processor family */
+#define CONFIG_M5282 /* define processor type */
+
+#define CONFIG_MISC_INIT_R
+
+#define FEC_ENET
+#define CONFIG_ETHADDR 00:CF:52:82:EB:01
+
+#define CONFIG_BAUDRATE 9600
+#define CFG_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
+
+#undef CONFIG_MONITOR_IS_IN_RAM /* define if monitor is started from a pre-loader */
+
+#define CONFIG_BOOTCOMMAND "printenv"
+
+/* Configuration for environment
+ * Environment is embedded in u-boot in the second sector of the flash
+ */
+#ifndef CONFIG_MONITOR_IS_IN_RAM
+#define CFG_ENV_ADDR 0xF003C000 /* End of 256K */
+#define CFG_ENV_SECT_SIZE 0x4000
+#define CFG_ENV_IS_IN_FLASH 1
+/*
+#define CFG_ENV_IS_EMBEDDED 1
+#define CFG_ENV_ADDR_REDUND 0xF0018000
+#define CFG_ENV_SECT_SIZE_REDUND 0x4000
+*/
+#else
+#define CFG_ENV_ADDR 0xFFE04000
+#define CFG_ENV_SECT_SIZE 0x2000
+#define CFG_ENV_IS_IN_FLASH 1
+#endif
+
+/*#define CONFIG_COMMANDS ( CONFIG_CMD_DFL & ~(CFG_CMD_LOADS | CFG_CMD_LOADB) ) */
+#define CONFIG_COMMANDS ( CONFIG_CMD_DFL & ~(CFG_CMD_LOADB))
+
+/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
+#include <cmd_confdefs.h>
+
+#define CONFIG_BOOTDELAY 5
+#define CFG_PROMPT "\nEV123 U-Boot> "
+#define CFG_LONGHELP /* undef to save memory */
+
+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
+#else
+#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
+#endif
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
+#define CFG_MAXARGS 16 /* max number of command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+
+#define CFG_LOAD_ADDR 0x20000
+
+#define CFG_MEMTEST_START 0x100000
+#define CFG_MEMTEST_END 0x400000
+/*#define CFG_DRAM_TEST 1 */
+#undef CFG_DRAM_TEST
+
+/* Clock and PLL Configuration */
+#define CFG_HZ 10000000
+#define CFG_CLK 58982400 /* 9,8304MHz * 6 */
+
+/* PLL Configuration: Ext Clock * 6 (see table 9-4 of MCF user manual) */
+
+#define CFG_MFD 0x01 /* PLL Multiplication Factor Devider */
+#define CFG_RFD 0x00 /* PLL Reduce Frecuency Devider */
+
+/*
+ * Low Level Configuration Settings
+ * (address mappings, register initial values, etc.)
+ * You should know what you are doing if you make changes here.
+ */
+#define CFG_MBAR 0x40000000
+
+#define CFG_DISCOVER_PHY
+/* #define CFG_ENET_BD_BASE 0x380000 */
+
+/*-----------------------------------------------------------------------
+ * Definitions for initial stack pointer and data area (in DPRAM)
+ */
+#define CFG_INIT_RAM_ADDR 0x20000000
+#define CFG_INIT_RAM_END 0x10000 /* End of used area in internal SRAM */
+#define CFG_GBL_DATA_SIZE 64 /* size in bytes reserved for initial data */
+#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
+#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
+
+/*-----------------------------------------------------------------------
+ * Start addresses for the final memory configuration
+ * (Set up by the startup code)
+ * Please note that CFG_SDRAM_BASE _must_ start at 0
+ */
+#define CFG_SDRAM_BASE1 0x00000000
+#define CFG_SDRAM_SIZE1 16 /* SDRAM size in MB */
+
+/*
+#define CFG_SDRAM_BASE0 CFG_SDRAM_BASE1+CFG_SDRAM_SIZE1*1024*1024
+#define CFG_SDRAM_SIZE0 16 */ /* SDRAM size in MB */
+
+#define CFG_SDRAM_BASE CFG_SDRAM_BASE1
+#define CFG_SDRAM_SIZE CFG_SDRAM_SIZE1
+
+#define CFG_FLASH_BASE 0xFFE00000
+#define CFG_INT_FLASH_BASE 0xF0000000
+
+/* If M5282 port is fully implemented the monitor base will be behind
+ * the vector table. */
+#if (TEXT_BASE != CFG_INT_FLASH_BASE)
+#define CFG_MONITOR_BASE (TEXT_BASE + 0x400)
+#else
+#define CFG_MONITOR_BASE (TEXT_BASE + 0x418) /* 24 Byte for CFM-Config */
+#endif
+
+#define CFG_MONITOR_LEN 0x20000
+#define CFG_MALLOC_LEN (256 << 10)
+#define CFG_BOOTPARAMS_LEN 64*1024
+
+/*
+ * For booting Linux, the board info and command line data
+ * have to be in the first 8 MB of memory, since this is
+ * the maximum mapped by the Linux kernel during initialization ??
+ */
+#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
+
+/*-----------------------------------------------------------------------
+ * FLASH organization
+ */
+#define CFG_MAX_FLASH_SECT 35
+#define CFG_MAX_FLASH_BANKS 2
+#define CFG_FLASH_ERASE_TOUT 10000000
+#define CFG_FLASH_PROTECTION
+
+/*-----------------------------------------------------------------------
+ * Cache Configuration
+ */
+#define CFG_CACHELINE_SIZE 16
+
+/*-----------------------------------------------------------------------
+ * Memory bank definitions
+ */
+
+#define CFG_CS0_BASE CFG_FLASH_BASE
+#define CFG_CS0_SIZE 2*1024*1024
+#define CFG_CS0_WIDTH 16
+#define CFG_CS0_RO 0
+#define CFG_CS0_WS 6
+
+#define CFG_CS3_BASE 0xE0000000
+#define CFG_CS3_SIZE 1*1024*1024
+#define CFG_CS3_WIDTH 16
+#define CFG_CS3_RO 0
+#define CFG_CS3_WS 6
+
+/*-----------------------------------------------------------------------
+ * Port configuration
+ */
+#define CFG_PACNT 0x0000000 /* Port A D[31:24] */
+#define CFG_PADDR 0x0000000
+#define CFG_PADAT 0x0000000
+
+#define CFG_PBCNT 0x0000000 /* Port B D[23:16] */
+#define CFG_PBDDR 0x0000000
+#define CFG_PBDAT 0x0000000
+
+#define CFG_PCCNT 0x0000000 /* Port C D[15:08] */
+#define CFG_PCDDR 0x0000000
+#define CFG_PCDAT 0x0000000
+
+#define CFG_PDCNT 0x0000000 /* Port D D[07:00] */
+#define CFG_PCDDR 0x0000000
+#define CFG_PCDAT 0x0000000
+
+#define CFG_PEHLPAR 0xC0
+#define CFG_PUAPAR 0x0F /* UA0..UA3 = Uart 0 +1 */
+#define CFG_DDRUA 0x05
+#define CFG_PJPAR 0xFF;
+
+/*-----------------------------------------------------------------------
+ * CCM configuration
+ */
+
+#define CFG_CCM_SIZ 0
+
+/*---------------------------------------------------------------------*/
+#endif /* _CONFIG_M5282EVB_H */
+/*---------------------------------------------------------------------*/
diff --git a/include/configs/EP1C20.h b/include/configs/EP1C20.h
new file mode 100644
index 0000000000..5507f352b9
--- /dev/null
+++ b/include/configs/EP1C20.h
@@ -0,0 +1,199 @@
+/*
+ * (C) Copyright 2005, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*------------------------------------------------------------------------
+ * BOARD/CPU
+ *----------------------------------------------------------------------*/
+#define CONFIG_EP1C20 1 /* EP1C20 board */
+#define CONFIG_SYS_CLK_FREQ 50000000 /* 50 MHz core clk */
+
+#define CFG_RESET_ADDR 0x00000000 /* Hard-reset address */
+#define CFG_EXCEPTION_ADDR 0x01000020 /* Exception entry point*/
+#define CFG_NIOS_SYSID_BASE 0x021208b8 /* System id address */
+#define CONFIG_BOARD_EARLY_INIT_F 1 /* enable early board-spec. init*/
+
+/*------------------------------------------------------------------------
+ * CACHE -- the following will support II/s and II/f. The II/s does not
+ * have dcache, so the cache instructions will behave as NOPs.
+ *----------------------------------------------------------------------*/
+#define CFG_ICACHE_SIZE 4096 /* 4 KByte total */
+#define CFG_ICACHELINE_SIZE 32 /* 32 bytes/line */
+#define CFG_DCACHE_SIZE 2048 /* 2 KByte (II/f) */
+#define CFG_DCACHELINE_SIZE 4 /* 4 bytes/line (II/f) */
+
+/*------------------------------------------------------------------------
+ * MEMORY BASE ADDRESSES
+ *----------------------------------------------------------------------*/
+#define CFG_FLASH_BASE 0x00000000 /* FLASH base addr */
+#define CFG_FLASH_SIZE 0x00800000 /* 8 MByte */
+#define CFG_SDRAM_BASE 0x01000000 /* SDRAM base addr */
+#define CFG_SDRAM_SIZE 0x01000000 /* 16 MByte */
+#define CFG_SRAM_BASE 0x02000000 /* SRAM base addr */
+#define CFG_SRAM_SIZE 0x00100000 /* 1 MB (only 1M mapped)*/
+
+/*------------------------------------------------------------------------
+ * MEMORY ORGANIZATION
+ * -Monitor at top.
+ * -The heap is placed below the monitor.
+ * -Global data is placed below the heap.
+ * -The stack is placed below global data (&grows down).
+ *----------------------------------------------------------------------*/
+#define CFG_MONITOR_LEN (256 * 1024) /* Reserve 128k */
+#define CFG_GBL_DATA_SIZE 128 /* Global data size rsvd*/
+#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
+
+#define CFG_MONITOR_BASE TEXT_BASE
+#define CFG_MALLOC_BASE (CFG_MONITOR_BASE - CFG_MALLOC_LEN)
+#define CFG_GBL_DATA_OFFSET (CFG_MALLOC_BASE - CFG_GBL_DATA_SIZE)
+#define CFG_INIT_SP CFG_GBL_DATA_OFFSET
+
+/*------------------------------------------------------------------------
+ * FLASH (AM29LV065D)
+ *----------------------------------------------------------------------*/
+#define CFG_MAX_FLASH_SECT 128 /* Max # sects per bank */
+#define CFG_MAX_FLASH_BANKS 1 /* Max # of flash banks */
+#define CFG_FLASH_ERASE_TOUT 8000 /* Erase timeout (msec) */
+#define CFG_FLASH_WRITE_TOUT 100 /* Write timeout (msec) */
+#define CFG_FLASH_WORD_SIZE unsigned char /* flash word size */
+
+/*------------------------------------------------------------------------
+ * ENVIRONMENT -- Put environment in sector CFG_MONITOR_LEN above
+ * CFG_RESET_ADDR, since we assume the monitor is stored at the
+ * reset address, no? This will keep the environment in user region
+ * of flash. NOTE: the monitor length must be multiple of sector size
+ * (which is common practice).
+ *----------------------------------------------------------------------*/
+#define CFG_ENV_IS_IN_FLASH 1 /* Environment in flash */
+#define CFG_ENV_SIZE (64 * 1024) /* 64 KByte (1 sector) */
+#define CONFIG_ENV_OVERWRITE /* Serial change Ok */
+#define CFG_ENV_ADDR (CFG_RESET_ADDR + CFG_MONITOR_LEN)
+
+/*------------------------------------------------------------------------
+ * CONSOLE
+ *----------------------------------------------------------------------*/
+#if defined(CONFIG_CONSOLE_JTAG)
+#define CFG_NIOS_CONSOLE 0x021208b0 /* JTAG UART base addr */
+#else
+#define CFG_NIOS_CONSOLE 0x02120840 /* UART base addr */
+#endif
+
+#define CFG_NIOS_FIXEDBAUD 1 /* Baudrate is fixed */
+#define CONFIG_BAUDRATE 115200 /* Initial baudrate */
+#define CFG_BAUDRATE_TABLE {115200} /* It's fixed ;-) */
+
+#define CFG_CONSOLE_INFO_QUIET 1 /* Suppress console info*/
+
+/*------------------------------------------------------------------------
+ * EPCS Device -- wne CFG_NIOS_EPCSBASE is defined code/commands for
+ * epcs device access is enabled. The base address is the epcs
+ * _register_ base address, NOT THE ADDRESS OF THE MEMORY BLOCK.
+ * The register base is currently at offset 0x600 from the memory base.
+ *----------------------------------------------------------------------*/
+#define CFG_NIOS_EPCSBASE 0x02100200 /* EPCS register base */
+
+/*------------------------------------------------------------------------
+ * DEBUG
+ *----------------------------------------------------------------------*/
+#undef CONFIG_ROM_STUBS /* Stubs not in ROM */
+
+/*------------------------------------------------------------------------
+ * TIMEBASE --
+ *
+ * The high res timer defaults to 1 msec. Since it includes the period
+ * registers, we can slow it down to 10 msec using TMRCNT. If the default
+ * period is acceptable, TMRCNT can be left undefined.
+ *----------------------------------------------------------------------*/
+#define CFG_NIOS_TMRBASE 0x02120820 /* Tick timer base addr */
+#define CFG_NIOS_TMRIRQ 3 /* Timer IRQ num */
+#define CFG_NIOS_TMRMS 10 /* 10 msec per tick */
+#define CFG_NIOS_TMRCNT (CFG_NIOS_TMRMS * (CONFIG_SYS_CLK_FREQ/1000))
+#define CFG_HZ (CONFIG_SYS_CLK_FREQ/(CFG_NIOS_TMRCNT + 1))
+
+/*------------------------------------------------------------------------
+ * STATUS LED -- Provides a simple blinking led. For Nios2 each board
+ * must implement its own led routines -- leds are, after all,
+ * board-specific, no?
+ *----------------------------------------------------------------------*/
+#define CFG_LEDPIO_ADDR 0x02120870 /* LED PIO base addr */
+#define CONFIG_STATUS_LED /* Enable status driver */
+
+#define STATUS_LED_BIT 1 /* Bit-0 on PIO */
+#define STATUS_LED_STATE 1 /* Blinking */
+#define STATUS_LED_PERIOD (500/CFG_NIOS_TMRMS) /* Every 500 msec */
+
+/*------------------------------------------------------------------------
+ * ETHERNET -- The header file for the SMC91111 driver hurts my eyes ...
+ * and really doesn't need any additional clutter. So I choose the lazy
+ * way out to avoid changes there -- define the base address to ensure
+ * cache bypass so there's no need to monkey with inx/outx macros.
+ *----------------------------------------------------------------------*/
+#define CONFIG_SMC91111_BASE 0x82110300 /* Base addr (bypass) */
+#define CONFIG_DRIVER_SMC91111 /* Using SMC91c111 */
+#undef CONFIG_SMC91111_EXT_PHY /* Internal PHY */
+#define CONFIG_SMC_USE_32_BIT /* 32-bit interface */
+
+#define CONFIG_ETHADDR 08:00:3e:26:0a:5b
+#define CONFIG_NETMASK 255.255.255.0
+#define CONFIG_IPADDR 192.168.2.21
+#define CONFIG_SERVERIP 192.168.2.16
+
+/*------------------------------------------------------------------------
+ * COMMANDS
+ *----------------------------------------------------------------------*/
+#define CONFIG_COMMANDS (CFG_CMD_BDI | \
+ CFG_CMD_DHCP | \
+ CFG_CMD_ECHO | \
+ CFG_CMD_ENV | \
+ CFG_CMD_FLASH | \
+ CFG_CMD_IMI | \
+ CFG_CMD_IRQ | \
+ CFG_CMD_LOADS | \
+ CFG_CMD_LOADB | \
+ CFG_CMD_MEMORY | \
+ CFG_CMD_MISC | \
+ CFG_CMD_NET | \
+ CFG_CMD_PING | \
+ CFG_CMD_RUN | \
+ CFG_CMD_SAVES )
+#include <cmd_confdefs.h>
+
+/*------------------------------------------------------------------------
+ * MISC
+ *----------------------------------------------------------------------*/
+#define CFG_LONGHELP /* Provide extended help*/
+#define CFG_PROMPT "==> " /* Command prompt */
+#define CFG_CBSIZE 256 /* Console I/O buf size */
+#define CFG_MAXARGS 16 /* Max command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot arg buf size */
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print buf size */
+#define CFG_LOAD_ADDR CFG_SDRAM_BASE /* Default load address */
+#define CFG_MEMTEST_START CFG_SDRAM_BASE /* Start addr for test */
+#define CFG_MEMTEST_END CFG_INIT_SP - 0x00020000
+
+#define CFG_HUSH_PARSER
+#define CFG_PROMPT_HUSH_PS2 "> "
+
+#endif /* __CONFIG_H */
diff --git a/include/configs/EP1S10.h b/include/configs/EP1S10.h
new file mode 100644
index 0000000000..6eca9f23dc
--- /dev/null
+++ b/include/configs/EP1S10.h
@@ -0,0 +1,193 @@
+/*
+ * (C) Copyright 2005, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*------------------------------------------------------------------------
+ * BOARD/CPU
+ *----------------------------------------------------------------------*/
+#define CONFIG_EP1S10 1 /* EP1S10 board */
+#define CONFIG_SYS_CLK_FREQ 50000000 /* 50 MHz core clk */
+
+#define CFG_RESET_ADDR 0x00000000 /* Hard-reset address */
+#define CFG_EXCEPTION_ADDR 0x01000020 /* Exception entry point*/
+#define CFG_NIOS_SYSID_BASE 0x021208b8 /* System id address */
+
+/*------------------------------------------------------------------------
+ * CACHE -- the following will support II/s and II/f. The II/s does not
+ * have dcache, so the cache instructions will behave as NOPs.
+ *----------------------------------------------------------------------*/
+#define CFG_ICACHE_SIZE 4096 /* 4 KByte total */
+#define CFG_ICACHELINE_SIZE 32 /* 32 bytes/line */
+#define CFG_DCACHE_SIZE 2048 /* 2 KByte (II/f) */
+#define CFG_DCACHELINE_SIZE 4 /* 4 bytes/line (II/f) */
+
+/*------------------------------------------------------------------------
+ * MEMORY BASE ADDRESSES
+ *----------------------------------------------------------------------*/
+#define CFG_FLASH_BASE 0x00000000 /* FLASH base addr */
+#define CFG_FLASH_SIZE 0x00800000 /* 8 MByte */
+#define CFG_SDRAM_BASE 0x01000000 /* SDRAM base addr */
+#define CFG_SDRAM_SIZE 0x01000000 /* 16 MByte */
+#define CFG_SRAM_BASE 0x02000000 /* SRAM base addr */
+#define CFG_SRAM_SIZE 0x00100000 /* 1 MB */
+
+/*------------------------------------------------------------------------
+ * MEMORY ORGANIZATION
+ * -Monitor at top.
+ * -The heap is placed below the monitor.
+ * -Global data is placed below the heap.
+ * -The stack is placed below global data (&grows down).
+ *----------------------------------------------------------------------*/
+#define CFG_MONITOR_LEN (256 * 1024) /* Reserve 256k */
+#define CFG_GBL_DATA_SIZE 128 /* Global data size rsvd*/
+#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 256*1024) /* 256k heap */
+
+#define CFG_MONITOR_BASE TEXT_BASE
+#define CFG_MALLOC_BASE (CFG_MONITOR_BASE - CFG_MALLOC_LEN)
+#define CFG_GBL_DATA_OFFSET (CFG_MALLOC_BASE - CFG_GBL_DATA_SIZE)
+#define CFG_INIT_SP CFG_GBL_DATA_OFFSET
+
+/*------------------------------------------------------------------------
+ * FLASH (AM29LV065D)
+ *----------------------------------------------------------------------*/
+#define CFG_MAX_FLASH_SECT 128 /* Max # sects per bank */
+#define CFG_MAX_FLASH_BANKS 1 /* Max # of flash banks */
+#define CFG_FLASH_ERASE_TOUT 8000 /* Erase timeout (msec) */
+#define CFG_FLASH_WRITE_TOUT 100 /* Write timeout (msec) */
+
+/*------------------------------------------------------------------------
+ * ENVIRONMENT -- Put environment in sector CFG_MONITOR_LEN above
+ * CFG_FLASH_BASE, since we assume that u-boot is stored at the bottom
+ * of flash memory. This will keep the environment in user region
+ * of flash. NOTE: the monitor length must be multiple of sector size
+ * (which is common practice).
+ *----------------------------------------------------------------------*/
+#define CFG_ENV_IS_IN_FLASH 1 /* Environment in flash */
+#define CFG_ENV_SIZE (64 * 1024) /* 64 KByte (1 sector) */
+#define CONFIG_ENV_OVERWRITE /* Serial change Ok */
+#define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_MONITOR_LEN)
+
+/*------------------------------------------------------------------------
+ * CONSOLE
+ *----------------------------------------------------------------------*/
+#if defined(CONFIG_CONSOLE_JTAG)
+#define CFG_NIOS_CONSOLE 0x021208b0 /* JTAG UART base addr */
+#else
+#define CFG_NIOS_CONSOLE 0x02120840 /* UART base addr */
+#endif
+
+#define CFG_NIOS_FIXEDBAUD 1 /* Baudrate is fixed */
+#define CONFIG_BAUDRATE 115200 /* Initial baudrate */
+#define CFG_BAUDRATE_TABLE {115200} /* It's fixed ;-) */
+
+#define CFG_CONSOLE_INFO_QUIET 1 /* Suppress console info*/
+
+/*------------------------------------------------------------------------
+ * EPCS Device -- None for stratix.
+ *----------------------------------------------------------------------*/
+#undef CFG_NIOS_EPCSBASE
+
+/*------------------------------------------------------------------------
+ * DEBUG
+ *----------------------------------------------------------------------*/
+#undef CONFIG_ROM_STUBS /* Stubs not in ROM */
+
+/*------------------------------------------------------------------------
+ * TIMEBASE --
+ *
+ * The high res timer defaults to 1 msec. Since it includes the period
+ * registers, we can slow it down to 10 msec using TMRCNT. If the default
+ * period is acceptable, TMRCNT can be left undefined.
+ *----------------------------------------------------------------------*/
+#define CFG_NIOS_TMRBASE 0x02120820 /* Tick timer base addr */
+#define CFG_NIOS_TMRIRQ 3 /* Timer IRQ num */
+#define CFG_NIOS_TMRMS 10 /* 10 msec per tick */
+#define CFG_NIOS_TMRCNT (CFG_NIOS_TMRMS * (CONFIG_SYS_CLK_FREQ/1000))
+#define CFG_HZ (CONFIG_SYS_CLK_FREQ/(CFG_NIOS_TMRCNT + 1))
+
+/*------------------------------------------------------------------------
+ * STATUS LED -- Provides a simple blinking led. For Nios2 each board
+ * must implement its own led routines -- since leds are board-specific.
+ *----------------------------------------------------------------------*/
+#define CFG_LEDPIO_ADDR 0x02120870 /* LED PIO base addr */
+#define CONFIG_STATUS_LED /* Enable status driver */
+
+#define STATUS_LED_BIT 1 /* Bit-0 on PIO */
+#define STATUS_LED_STATE 1 /* Blinking */
+#define STATUS_LED_PERIOD (500/CFG_NIOS_TMRMS) /* Every 500 msec */
+
+/*------------------------------------------------------------------------
+ * ETHERNET -- The header file for the SMC91111 driver hurts my eyes ...
+ * and really doesn't need any additional clutter. So I choose the lazy
+ * way out to avoid changes there -- define the base address to ensure
+ * cache bypass so there's no need to monkey with inx/outx macros.
+ *----------------------------------------------------------------------*/
+#define CONFIG_SMC91111_BASE 0x82110300 /* Base addr (bypass) */
+#define CONFIG_DRIVER_SMC91111 /* Using SMC91c111 */
+#undef CONFIG_SMC91111_EXT_PHY /* Internal PHY */
+#define CONFIG_SMC_USE_32_BIT /* 32-bit interface */
+
+#define CONFIG_ETHADDR 08:00:3e:26:0a:5b
+#define CONFIG_NETMASK 255.255.255.0
+#define CONFIG_IPADDR 192.168.2.21
+#define CONFIG_SERVERIP 192.168.2.16
+
+/*------------------------------------------------------------------------
+ * COMMANDS
+ *----------------------------------------------------------------------*/
+#define CONFIG_COMMANDS (CFG_CMD_BDI | \
+ CFG_CMD_DHCP | \
+ CFG_CMD_ECHO | \
+ CFG_CMD_ENV | \
+ CFG_CMD_FLASH | \
+ CFG_CMD_IMI | \
+ CFG_CMD_IRQ | \
+ CFG_CMD_LOADS | \
+ CFG_CMD_LOADB | \
+ CFG_CMD_MEMORY | \
+ CFG_CMD_MISC | \
+ CFG_CMD_NET | \
+ CFG_CMD_PING | \
+ CFG_CMD_RUN | \
+ CFG_CMD_SAVES )
+#include <cmd_confdefs.h>
+
+/*------------------------------------------------------------------------
+ * MISC
+ *----------------------------------------------------------------------*/
+#define CFG_LONGHELP /* Provide extended help*/
+#define CFG_PROMPT "==> " /* Command prompt */
+#define CFG_CBSIZE 256 /* Console I/O buf size */
+#define CFG_MAXARGS 16 /* Max command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot arg buf size */
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print buf size */
+#define CFG_LOAD_ADDR CFG_SDRAM_BASE /* Default load address */
+#define CFG_MEMTEST_START CFG_SDRAM_BASE /* Start addr for test */
+#define CFG_MEMTEST_END CFG_INIT_SP - 0x00020000
+
+#define CFG_HUSH_PARSER
+#define CFG_PROMPT_HUSH_PS2 "> "
+
+#endif /* __CONFIG_H */
diff --git a/include/configs/EP1S40.h b/include/configs/EP1S40.h
new file mode 100644
index 0000000000..976e79acb6
--- /dev/null
+++ b/include/configs/EP1S40.h
@@ -0,0 +1,193 @@
+/*
+ * (C) Copyright 2005, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*------------------------------------------------------------------------
+ * BOARD/CPU
+ *----------------------------------------------------------------------*/
+#define CONFIG_EP1S40 1 /* EP1S40 board */
+#define CONFIG_SYS_CLK_FREQ 50000000 /* 50 MHz core clk */
+
+#define CFG_RESET_ADDR 0x00000000 /* Hard-reset address */
+#define CFG_EXCEPTION_ADDR 0x01000020 /* Exception entry point*/
+#define CFG_NIOS_SYSID_BASE 0x021208b8 /* System id address */
+
+/*------------------------------------------------------------------------
+ * CACHE -- the following will support II/s and II/f. The II/s does not
+ * have dcache, so the cache instructions will behave as NOPs.
+ *----------------------------------------------------------------------*/
+#define CFG_ICACHE_SIZE 4096 /* 4 KByte total */
+#define CFG_ICACHELINE_SIZE 32 /* 32 bytes/line */
+#define CFG_DCACHE_SIZE 2048 /* 2 KByte (II/f) */
+#define CFG_DCACHELINE_SIZE 4 /* 4 bytes/line (II/f) */
+
+/*------------------------------------------------------------------------
+ * MEMORY BASE ADDRESSES
+ *----------------------------------------------------------------------*/
+#define CFG_FLASH_BASE 0x00000000 /* FLASH base addr */
+#define CFG_FLASH_SIZE 0x00800000 /* 8 MByte */
+#define CFG_SDRAM_BASE 0x01000000 /* SDRAM base addr */
+#define CFG_SDRAM_SIZE 0x01000000 /* 16 MByte */
+#define CFG_SRAM_BASE 0x02000000 /* SRAM base addr */
+#define CFG_SRAM_SIZE 0x00100000 /* 1 MB */
+
+/*------------------------------------------------------------------------
+ * MEMORY ORGANIZATION
+ * -Monitor at top.
+ * -The heap is placed below the monitor.
+ * -Global data is placed below the heap.
+ * -The stack is placed below global data (&grows down).
+ *----------------------------------------------------------------------*/
+#define CFG_MONITOR_LEN (256 * 1024) /* Reserve 256k */
+#define CFG_GBL_DATA_SIZE 128 /* Global data size rsvd*/
+#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 256*1024) /* 256k heap */
+
+#define CFG_MONITOR_BASE TEXT_BASE
+#define CFG_MALLOC_BASE (CFG_MONITOR_BASE - CFG_MALLOC_LEN)
+#define CFG_GBL_DATA_OFFSET (CFG_MALLOC_BASE - CFG_GBL_DATA_SIZE)
+#define CFG_INIT_SP CFG_GBL_DATA_OFFSET
+
+/*------------------------------------------------------------------------
+ * FLASH (AM29LV065D)
+ *----------------------------------------------------------------------*/
+#define CFG_MAX_FLASH_SECT 128 /* Max # sects per bank */
+#define CFG_MAX_FLASH_BANKS 1 /* Max # of flash banks */
+#define CFG_FLASH_ERASE_TOUT 8000 /* Erase timeout (msec) */
+#define CFG_FLASH_WRITE_TOUT 100 /* Write timeout (msec) */
+
+/*------------------------------------------------------------------------
+ * ENVIRONMENT -- Put environment in sector CFG_MONITOR_LEN above
+ * CFG_FLASH_BASE, since we assume that u-boot is stored at the bottom
+ * of flash memory. This will keep the environment in user region
+ * of flash. NOTE: the monitor length must be multiple of sector size
+ * (which is common practice).
+ *----------------------------------------------------------------------*/
+#define CFG_ENV_IS_IN_FLASH 1 /* Environment in flash */
+#define CFG_ENV_SIZE (64 * 1024) /* 64 KByte (1 sector) */
+#define CONFIG_ENV_OVERWRITE /* Serial change Ok */
+#define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_MONITOR_LEN)
+
+/*------------------------------------------------------------------------
+ * CONSOLE
+ *----------------------------------------------------------------------*/
+#if defined(CONFIG_CONSOLE_JTAG)
+#define CFG_NIOS_CONSOLE 0x021208b0 /* JTAG UART base addr */
+#else
+#define CFG_NIOS_CONSOLE 0x02120840 /* UART base addr */
+#endif
+
+#define CFG_NIOS_FIXEDBAUD 1 /* Baudrate is fixed */
+#define CONFIG_BAUDRATE 115200 /* Initial baudrate */
+#define CFG_BAUDRATE_TABLE {115200} /* It's fixed ;-) */
+
+#define CFG_CONSOLE_INFO_QUIET 1 /* Suppress console info*/
+
+/*------------------------------------------------------------------------
+ * EPCS Device -- None for stratix.
+ *----------------------------------------------------------------------*/
+#undef CFG_NIOS_EPCSBASE
+
+/*------------------------------------------------------------------------
+ * DEBUG
+ *----------------------------------------------------------------------*/
+#undef CONFIG_ROM_STUBS /* Stubs not in ROM */
+
+/*------------------------------------------------------------------------
+ * TIMEBASE --
+ *
+ * The high res timer defaults to 1 msec. Since it includes the period
+ * registers, we can slow it down to 10 msec using TMRCNT. If the default
+ * period is acceptable, TMRCNT can be left undefined.
+ *----------------------------------------------------------------------*/
+#define CFG_NIOS_TMRBASE 0x02120820 /* Tick timer base addr */
+#define CFG_NIOS_TMRIRQ 3 /* Timer IRQ num */
+#define CFG_NIOS_TMRMS 10 /* 10 msec per tick */
+#define CFG_NIOS_TMRCNT (CFG_NIOS_TMRMS * (CONFIG_SYS_CLK_FREQ/1000))
+#define CFG_HZ (CONFIG_SYS_CLK_FREQ/(CFG_NIOS_TMRCNT + 1))
+
+/*------------------------------------------------------------------------
+ * STATUS LED -- Provides a simple blinking led. For Nios2 each board
+ * must implement its own led routines -- since leds are board-specific.
+ *----------------------------------------------------------------------*/
+#define CFG_LEDPIO_ADDR 0x02120870 /* LED PIO base addr */
+#define CONFIG_STATUS_LED /* Enable status driver */
+
+#define STATUS_LED_BIT 1 /* Bit-0 on PIO */
+#define STATUS_LED_STATE 1 /* Blinking */
+#define STATUS_LED_PERIOD (500/CFG_NIOS_TMRMS) /* Every 500 msec */
+
+/*------------------------------------------------------------------------
+ * ETHERNET -- The header file for the SMC91111 driver hurts my eyes ...
+ * and really doesn't need any additional clutter. So I choose the lazy
+ * way out to avoid changes there -- define the base address to ensure
+ * cache bypass so there's no need to monkey with inx/outx macros.
+ *----------------------------------------------------------------------*/
+#define CONFIG_SMC91111_BASE 0x82110300 /* Base addr (bypass) */
+#define CONFIG_DRIVER_SMC91111 /* Using SMC91c111 */
+#undef CONFIG_SMC91111_EXT_PHY /* Internal PHY */
+#define CONFIG_SMC_USE_32_BIT /* 32-bit interface */
+
+#define CONFIG_ETHADDR 08:00:3e:26:0a:5b
+#define CONFIG_NETMASK 255.255.255.0
+#define CONFIG_IPADDR 192.168.2.21
+#define CONFIG_SERVERIP 192.168.2.16
+
+/*------------------------------------------------------------------------
+ * COMMANDS
+ *----------------------------------------------------------------------*/
+#define CONFIG_COMMANDS (CFG_CMD_BDI | \
+ CFG_CMD_DHCP | \
+ CFG_CMD_ECHO | \
+ CFG_CMD_ENV | \
+ CFG_CMD_FLASH | \
+ CFG_CMD_IMI | \
+ CFG_CMD_IRQ | \
+ CFG_CMD_LOADS | \
+ CFG_CMD_LOADB | \
+ CFG_CMD_MEMORY | \
+ CFG_CMD_MISC | \
+ CFG_CMD_NET | \
+ CFG_CMD_PING | \
+ CFG_CMD_RUN | \
+ CFG_CMD_SAVES )
+#include <cmd_confdefs.h>
+
+/*------------------------------------------------------------------------
+ * MISC
+ *----------------------------------------------------------------------*/
+#define CFG_LONGHELP /* Provide extended help*/
+#define CFG_PROMPT "==> " /* Command prompt */
+#define CFG_CBSIZE 256 /* Console I/O buf size */
+#define CFG_MAXARGS 16 /* Max command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot arg buf size */
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print buf size */
+#define CFG_LOAD_ADDR CFG_SDRAM_BASE /* Default load address */
+#define CFG_MEMTEST_START CFG_SDRAM_BASE /* Start addr for test */
+#define CFG_MEMTEST_END CFG_INIT_SP - 0x00020000
+
+#define CFG_HUSH_PARSER
+#define CFG_PROMPT_HUSH_PS2 "> "
+
+#endif /* __CONFIG_H */
diff --git a/include/configs/EP88x.h b/include/configs/EP88x.h
new file mode 100644
index 0000000000..738763b86f
--- /dev/null
+++ b/include/configs/EP88x.h
@@ -0,0 +1,205 @@
+/*
+ * Copyright (C) 2005 Arabella Software Ltd.
+ * Yuli Barcohen <yuli@arabellasw.com>
+ *
+ * Support for Embedded Planet EP88x boards.
+ * Tested on EP88xC with MPC885 CPU, 64MB SDRAM and 16MB flash.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#define CONFIG_MPC885
+
+#define CONFIG_EP88X /* Embedded Planet EP88x board */
+
+#define CONFIG_BOARD_EARLY_INIT_F /* Call board_early_init_f */
+
+/* Allow serial number (serial#) and MAC address (ethaddr) to be overwritten */
+#define CONFIG_ENV_OVERWRITE
+
+#define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */
+#define CONFIG_BAUDRATE 38400
+
+#define CONFIG_ETHER_ON_FEC1 /* Enable Ethernet on FEC1 */
+#define CONFIG_ETHER_ON_FEC2 /* Enable Ethernet on FEC2 */
+#if defined(CONFIG_ETHER_ON_FEC1) || defined(CONFIG_ETHER_ON_FEC2)
+#define CFG_DISCOVER_PHY
+#define FEC_ENET
+#endif /* CONFIG_FEC_ENET */
+
+#define CONFIG_8xx_OSCLK 10000000 /* 10 MHz oscillator on EXTCLK */
+#define CONFIG_8xx_CPUCLK_DEFAULT 100000000
+#define CFG_8xx_CPUCLK_MIN 40000000
+#define CFG_8xx_CPUCLK_MAX 133000000
+
+#define CONFIG_COMMANDS (CONFIG_CMD_DFL \
+ | CFG_CMD_DHCP \
+ | CFG_CMD_IMMAP \
+ | CFG_CMD_MII \
+ | CFG_CMD_PING \
+ )
+
+/* This must be included AFTER the definition of CONFIG_COMMANDS */
+#include <cmd_confdefs.h>
+
+#define CONFIG_BOOTDELAY 5 /* Autoboot after 5 seconds */
+#define CONFIG_BOOTCOMMAND "bootm fe060000" /* Autoboot command */
+#define CONFIG_BOOTARGS "root=/dev/mtdblock1 rw mtdparts=phys:2M(ROM)ro,-(root)"
+
+#define CONFIG_BZIP2 /* Include support for bzip2 compressed images */
+#undef CONFIG_WATCHDOG /* Disable platform specific watchdog */
+
+/*-----------------------------------------------------------------------
+ * Miscellaneous configurable options
+ */
+#define CFG_PROMPT "=> " /* Monitor Command Prompt */
+#define CFG_HUSH_PARSER
+#define CFG_PROMPT_HUSH_PS2 "> "
+#define CFG_LONGHELP /* #undef to save memory */
+#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
+#define CFG_PBSIZE (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16) /* Print Buffer Size */
+#define CFG_MAXARGS 16 /* Max number of command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+
+#define CFG_LOAD_ADDR 0x400000 /* Default load address */
+
+#define CFG_HZ 1000 /* Decrementer freq: 1 ms ticks */
+
+#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
+
+/*-----------------------------------------------------------------------
+ * RAM configuration (note that CFG_SDRAM_BASE must be zero)
+ */
+#define CFG_SDRAM_BASE 0x00000000
+#define CFG_SDRAM_MAX_SIZE 0x08000000 /* Up to 128 Mbyte */
+
+#define CFG_MAMR 0x00805000
+
+/*
+ * 4096 Up to 4096 SDRAM rows
+ * 1000 factor s -> ms
+ * 32 PTP (pre-divider from MPTPR)
+ * 4 Number of refresh cycles per period
+ * 64 Refresh cycle in ms per number of rows
+ */
+#define CFG_PTA_PER_CLK ((4096 * 32 * 1000) / (4 * 64))
+
+#define CFG_MEMTEST_START 0x00100000 /* memtest works on */
+#define CFG_MEMTEST_END 0x00500000 /* 1 ... 5 MB in SDRAM */
+
+#define CFG_RESET_ADDRESS 0x09900000
+
+/*-----------------------------------------------------------------------
+ * For booting Linux, the board info and command line data
+ * have to be in the first 8 MB of memory, since this is
+ * the maximum mapped by the Linux kernel during initialization.
+ */
+#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
+
+#define CFG_MONITOR_BASE TEXT_BASE
+#define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 KB for Monitor */
+#ifdef CONFIG_BZIP2
+#define CFG_MALLOC_LEN (4096 << 10) /* Reserve ~4 MB for malloc() */
+#else
+#define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 KB for malloc() */
+#endif /* CONFIG_BZIP2 */
+
+/*-----------------------------------------------------------------------
+ * Flash organisation
+ */
+#define CFG_FLASH_BASE 0xFC000000
+#define CFG_FLASH_CFI /* The flash is CFI compatible */
+#define CFG_FLASH_CFI_DRIVER /* Use common CFI driver */
+#define CFG_MAX_FLASH_BANKS 1 /* Max number of flash banks */
+#define CFG_MAX_FLASH_SECT 512 /* Max num of sects on one chip */
+
+/* Environment is in flash */
+#define CFG_ENV_IS_IN_FLASH
+#define CFG_ENV_SECT_SIZE 0x20000 /* We use one complete sector */
+#define CFG_ENV_ADDR (CFG_MONITOR_BASE + CFG_MONITOR_LEN)
+
+#define CFG_OR0_PRELIM 0xFC000160
+#define CFG_BR0_PRELIM (CFG_FLASH_BASE | BR_PS_32 | BR_MS_GPCM | BR_V)
+
+#define CFG_DIRECT_FLASH_TFTP
+
+/*-----------------------------------------------------------------------
+ * BCSR
+ */
+#define CFG_OR3_PRELIM 0xFF0005B0
+#define CFG_BR3_PRELIM (0xFA000000 |BR_PS_16 | BR_MS_GPCM | BR_V)
+
+#define CFG_BCSR 0xFA400000
+
+/*-----------------------------------------------------------------------
+ * Internal Memory Map Register
+ */
+#define CFG_IMMR 0xF0000000
+
+/*-----------------------------------------------------------------------
+ * Definitions for initial stack pointer and data area (in DPRAM)
+ */
+#define CFG_INIT_RAM_ADDR CFG_IMMR
+#define CFG_INIT_RAM_END 0x2F00 /* End of used area in DPRAM */
+#define CFG_GBL_DATA_SIZE 128 /* Size in bytes reserved for initial data */
+#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
+#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
+
+/*-----------------------------------------------------------------------
+ * Configuration registers
+ */
+#ifdef CONFIG_WATCHDOG
+#define CFG_SYPCR (SYPCR_SWTC | SYPCR_BMT | SYPCR_BME | \
+ SYPCR_SWF | SYPCR_SWE | SYPCR_SWRI | \
+ SYPCR_SWP)
+#else
+#define CFG_SYPCR (SYPCR_SWTC | SYPCR_BMT | SYPCR_BME | \
+ SYPCR_SWF | SYPCR_SWP)
+#endif /* CONFIG_WATCHDOG */
+
+#define CFG_SIUMCR (SIUMCR_MLRC01 | SIUMCR_DBGC11)
+
+/* TBSCR - Time Base Status and Control Register */
+#define CFG_TBSCR (TBSCR_TBF | TBSCR_TBE)
+
+/* PISCR - Periodic Interrupt Status and Control */
+#define CFG_PISCR PISCR_PS
+
+/* SCCR - System Clock and reset Control Register */
+#define SCCR_MASK SCCR_EBDF11
+#define CFG_SCCR SCCR_RTSEL
+
+#define CFG_DER 0
+
+/*-----------------------------------------------------------------------
+ * Cache Configuration
+ */
+#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx chips */
+
+/*-----------------------------------------------------------------------
+ * Internal Definitions
+ *
+ * Boot Flags
+ */
+#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from flash */
+#define BOOTFLAG_WARM 0x02 /* Software reboot */
+
+#endif /* __CONFIG_H */
diff --git a/include/configs/GEN860T.h b/include/configs/GEN860T.h
index de8f7ae711..6613f90a77 100644
--- a/include/configs/GEN860T.h
+++ b/include/configs/GEN860T.h
@@ -284,6 +284,8 @@
*/
#include <cmd_confdefs.h>
+#define CFG_NAND_LEGACY
+
/*
* Verbose help from command monitor.
*/
diff --git a/include/configs/HH405.h b/include/configs/HH405.h
index 131c21555d..dc40ebc861 100644
--- a/include/configs/HH405.h
+++ b/include/configs/HH405.h
@@ -5,6 +5,9 @@
* (C) Copyright 2005
* Stefan Roese, DENX Software Engineering, sr@denx.de.
*
+ * (C) Copyright 2006
+ * Matthias Fuchs, esd GmbH, matthias.fuchs@esd-electronics.com
+ *
* See file CREDITS for list of people who contributed to this
* project.
*
@@ -61,9 +64,13 @@
#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
+#define CONFIG_NET_MULTI 1
+#undef CONFIG_HAS_ETH1
+
#define CONFIG_MII 1 /* MII PHY management */
-#define CONFIG_PHY_ADDR 0 /* PHY address */
+#define CONFIG_PHY_ADDR 0 /* PHY address */
#define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */
+#define CONFIG_RESET_PHY_R 1 /* use reset_phy() to disable phy sleep mode */
#define CONFIG_PHY_CLK_FREQ EMAC_STACR_CLK_66MHZ /* 66 MHz OPB clock*/
@@ -79,6 +86,7 @@
#else
#define CONFIG_VIDEO_SM501_16BPP
#endif
+#define CONFIG_VIDEO_SM501_FBMEM_OFFSET 0x10000
#define CONFIG_CFB_CONSOLE
#define CONFIG_VIDEO_LOGO
#define CONFIG_VGA_AS_SINGLE_DEVICE
@@ -122,6 +130,8 @@
/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
#include <cmd_confdefs.h>
+#define CFG_NAND_LEGACY
+
#undef CONFIG_BZIP2 /* include support for bzip2 compressed images */
#undef CONFIG_WATCHDOG /* watchdog disabled */
@@ -434,9 +444,12 @@
#define CFG_FPGA_CTRL_VGA0_BL_MODE 0x0008
#define CFG_FPGA_CTRL_CF_RESET 0x0040
#define CFG_FPGA_CTRL_PS2_PWR 0x0080
-#define CFG_FPGA_CTRL_CF_PWR 0x0100 /* low active */
+#define CFG_FPGA_CTRL_CF_PWRN 0x0100 /* low active */
#define CFG_FPGA_CTRL_CF_BUS_EN 0x0200
#define CFG_FPGA_CTRL_LCD_CLK 0x7000 /* Mask for lcd clock */
+#define CFG_FPGA_CTRL_OW_ENABLE 0x8000
+
+#define CFG_FPGA_STATUS_CF_DETECT 0x8000
#define LCD_CLK_OFF 0x0000 /* Off */
#define LCD_CLK_02083 0x1000 /* 2.083 MHz */
diff --git a/include/configs/HUB405.h b/include/configs/HUB405.h
index eb627e881d..f84e356216 100644
--- a/include/configs/HUB405.h
+++ b/include/configs/HUB405.h
@@ -135,6 +135,8 @@
* NAND-FLASH stuff
*-----------------------------------------------------------------------
*/
+#define CFG_NAND_LEGACY
+
#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
#define SECTORSIZE 512
diff --git a/include/configs/IDS8247.h b/include/configs/IDS8247.h
index aaa44c5398..29eb874dbf 100644
--- a/include/configs/IDS8247.h
+++ b/include/configs/IDS8247.h
@@ -236,6 +236,7 @@
*/
#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+#define CFG_NAND_LEGACY
#define CFG_NAND0_BASE 0xE1000000
#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
diff --git a/include/configs/ISPAN.h b/include/configs/ISPAN.h
index 65056a21ee..706bdb94f5 100644
--- a/include/configs/ISPAN.h
+++ b/include/configs/ISPAN.h
@@ -109,7 +109,6 @@
#define CONFIG_COMMANDS ( CONFIG_CMD_DFL \
| CFG_CMD_ASKENV \
| CFG_CMD_DHCP \
- | CFG_CMD_ECHO \
| CFG_CMD_IMMAP \
| CFG_CMD_MII \
| CFG_CMD_PING \
diff --git a/include/configs/IceCube.h b/include/configs/IceCube.h
index afba5c625e..1152f838d9 100644
--- a/include/configs/IceCube.h
+++ b/include/configs/IceCube.h
@@ -56,7 +56,9 @@
* 0x40000000 - 0x4fffffff - PCI Memory
* 0x50000000 - 0x50ffffff - PCI IO Space
*/
-#define CONFIG_PCI 1
+#define CONFIG_PCI
+
+#if defined(CONFIG_PCI)
#define CONFIG_PCI_PNP 1
#define CONFIG_PCI_SCAN_SHOW 1
@@ -67,6 +69,8 @@
#define CONFIG_PCI_IO_BUS 0x50000000
#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
#define CONFIG_PCI_IO_SIZE 0x01000000
+#define ADD_PCI_CMD CFG_CMD_PCI
+#endif
#define CFG_XLB_PIPELINING 1
@@ -76,8 +80,6 @@
#define CFG_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
#define CONFIG_NS8382X 1
-#define ADD_PCI_CMD CFG_CMD_PCI
-
#else /* MPC5100 */
#define CONFIG_MII 1
@@ -122,9 +124,13 @@
# define CFG_LOWBOOT16 1
#endif
#if (TEXT_BASE == 0xFF800000) /* Boot low with 8 MB Flash */
+#if defined(CONFIG_LITE5200B)
+# error CFG_LOWBOOT08 is incompatible with the Lite5200B
+#else
# define CFG_LOWBOOT 1
# define CFG_LOWBOOT08 1
#endif
+#endif
/*
* Autobooting
@@ -160,8 +166,12 @@
/*
* IPB Bus clocking configuration.
*/
-#undef CFG_IPBSPEED_133 /* define for 133MHz speed */
+#if defined(CONFIG_LITE5200B)
+#define CFG_IPBSPEED_133 /* define for 133MHz speed */
+#else
+#undef CFG_IPBSPEED_133 /* define for 133MHz speed */
#endif
+#endif /* CONFIG_MPC5200 */
/*
* I2C configuration
*/
@@ -182,6 +192,20 @@
/*
* Flash configuration
*/
+#if defined(CONFIG_LITE5200B)
+#define CFG_FLASH_BASE 0xFE000000
+#define CFG_FLASH_SIZE 0x01000000
+#if !defined(CFG_LOWBOOT)
+#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x01760000 + 0x00800000)
+#else /* CFG_LOWBOOT */
+#if defined(CFG_LOWBOOT08)
+# error CFG_LOWBOOT08 is incompatible with the Lite5200B
+#endif
+#if defined(CFG_LOWBOOT16)
+#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x01060000)
+#endif
+#endif /* CFG_LOWBOOT */
+#else /* !CONFIG_LITE5200B (IceCube)*/
#define CFG_FLASH_BASE 0xFF000000
#define CFG_FLASH_SIZE 0x01000000
#if !defined(CFG_LOWBOOT)
@@ -194,6 +218,7 @@
#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x00040000)
#endif
#endif /* CFG_LOWBOOT */
+#endif /* CONFIG_LITE5200B */
#define CFG_MAX_FLASH_BANKS 2 /* max num of memory banks */
#define CFG_MAX_FLASH_SECT 128 /* max num of sects on one chip */
@@ -203,13 +228,23 @@
#undef CONFIG_FLASH_16BIT /* Flash is 8-bit */
+#if defined(CONFIG_LITE5200B)
+#define CFG_FLASH_CFI_DRIVER
+#define CFG_FLASH_CFI
+#define CFG_FLASH_BANKS_LIST {CFG_CS1_START,CFG_CS0_START}
+#endif
+
/*
* Environment settings
*/
#define CFG_ENV_IS_IN_FLASH 1
#define CFG_ENV_SIZE 0x10000
+#if defined(CONFIG_LITE5200B)
+#define CFG_ENV_SECT_SIZE 0x20000
+#else
#define CFG_ENV_SECT_SIZE 0x10000
+#endif
#define CONFIG_ENV_OVERWRITE 1
/*
@@ -246,6 +281,9 @@
*/
/* #define CONFIG_FEC_10MBIT 1 */
#define CONFIG_PHY_ADDR 0x00
+#if defined(CONFIG_LITE5200B)
+#define CONFIG_FEC_MII100 1
+#endif
/*
* GPIO configuration
@@ -288,6 +326,16 @@
#define CFG_HID0_FINAL 0
#endif
+#if defined(CONFIG_LITE5200B)
+#define CFG_CS1_START CFG_FLASH_BASE
+#define CFG_CS1_SIZE CFG_FLASH_SIZE
+#define CFG_CS1_CFG 0x00047800
+#define CFG_CS0_START (CFG_FLASH_BASE + CFG_FLASH_SIZE)
+#define CFG_CS0_SIZE CFG_FLASH_SIZE
+#define CFG_BOOTCS_START CFG_CS0_START
+#define CFG_BOOTCS_SIZE CFG_FLASH_SIZE
+#define CFG_BOOTCS_CFG 0x00047800
+#else /* IceCube aka Lite5200 */
#ifdef CONFIG_MPC5200_DDR
#define CFG_BOOTCS_START (CFG_CS1_START + CFG_CS1_SIZE)
@@ -306,6 +354,7 @@
#define CFG_CS0_SIZE CFG_FLASH_SIZE
#endif /* CONFIG_MPC5200_DDR */
+#endif /*CONFIG_LITE5200B */
#define CFG_CS_BURST 0x00000000
#define CFG_CS_DEADCYCLE 0x33333333
diff --git a/include/configs/M5271EVB.h b/include/configs/M5271EVB.h
new file mode 100644
index 0000000000..f0fc013434
--- /dev/null
+++ b/include/configs/M5271EVB.h
@@ -0,0 +1,156 @@
+/*
+ * Configuation settings for the Freescale M5271EVB
+ *
+ * Based on MC5272C3 and r5200 board configs
+ * (C) Copyright 2006 Lab X Technologies <zachary.landau@labxtechnologies.com>
+ * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * board/config.h - configuration options, board specific
+ */
+
+#ifndef _M5271EVB_H
+#define _M5271EVB_H
+
+#define DEBUG
+#undef DEBUG
+
+/*
+ * High Level Configuration Options (easy to change)
+ */
+#define CONFIG_MCF52x2 /* define processor family */
+#define CONFIG_M5271 /* define processor type */
+#define CONFIG_M5271EVB /* define board type */
+
+#define CONFIG_IPADDR 192.168.30.1
+#define CONFIG_SERVERIP 192.168.1.1
+#define CONFIG_ETHADDR 00:06:3b:01:41:55
+
+#define CONFIG_BAUDRATE 19200
+#define CFG_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
+
+#undef CONFIG_WATCHDOG /* disable watchdog */
+
+#define CONFIG_BOOTDELAY 5
+
+/* Configuration for environment
+ * Environment is embedded in u-boot in the second sector of the flash
+ */
+#ifndef CONFIG_MONITOR_IS_IN_RAM
+#define CFG_ENV_OFFSET 0x4000
+#define CFG_ENV_SECT_SIZE 0x2000
+#define CFG_ENV_IS_IN_FLASH 1
+#else
+#define CFG_ENV_ADDR 0xffe04000
+#define CFG_ENV_SECT_SIZE 0x2000
+#define CFG_ENV_IS_IN_FLASH 1
+#endif
+
+#define CONFIG_COMMANDS ((CONFIG_CMD_DFL | CFG_CMD_PING | CFG_CMD_NET ) & ~(CFG_CMD_LOADS | CFG_CMD_LOADB))
+
+/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
+#include <cmd_confdefs.h>
+
+#define CFG_PROMPT "=> "
+#define CFG_LONGHELP /* undef to save memory */
+
+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
+#else
+#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
+#endif
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
+#define CFG_MAXARGS 16 /* max number of command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+
+#define CFG_LOAD_ADDR 0x00100000
+
+#define CFG_MEMTEST_START 0x400
+#define CFG_MEMTEST_END 0x380000
+
+#define CFG_HZ 1000000
+#define CFG_CLK 100000000
+
+/*
+ * Low Level Configuration Settings
+ * (address mappings, register initial values, etc.)
+ * You should know what you are doing if you make changes here.
+ */
+
+#define CFG_MBAR 0x40000000 /* Register Base Addrs */
+
+/* Enable FEC ethernet */
+#define FEC_ENET
+#define CONFIG_NET_RETRY_COUNT 5
+#define CFG_ENET_BD_BASE 0x480000
+
+/*
+ * Definitions for initial stack pointer and data area (in DPRAM)
+ */
+#define CFG_INIT_RAM_ADDR 0x20000000
+#define CFG_INIT_RAM_END 0x1000 /* End of used area in internal SRAM */
+#define CFG_GBL_DATA_SIZE 64 /* size in bytes reserved for initial data */
+#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
+#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
+
+/*
+ * Start addresses for the final memory configuration
+ * (Set up by the startup code)
+ * Please note that CFG_SDRAM_BASE _must_ start at 0
+ */
+#define CFG_SDRAM_BASE 0x00000000
+#define CFG_SDRAM_SIZE 16 /* SDRAM size in MB */
+#define CFG_FLASH_BASE 0xffe00000
+
+#ifdef CONFIG_MONITOR_IS_IN_RAM
+#define CFG_MONITOR_BASE 0x20000
+#else
+#define CFG_MONITOR_BASE (CFG_FLASH_BASE + 0x400)
+#endif
+
+#define CFG_MONITOR_LEN 0x40000
+#define CFG_MALLOC_LEN (256 << 10)
+#define CFG_BOOTPARAMS_LEN (64*1024)
+
+/*
+ * For booting Linux, the board info and command line data
+ * have to be in the first 8 MB of memory, since this is
+ * the maximum mapped by the Linux kernel during initialization ??
+ */
+#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
+
+/* FLASH organization */
+#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
+#define CFG_MAX_FLASH_SECT 11 /* max number of sectors on one chip */
+#define CFG_FLASH_ERASE_TOUT 1000
+
+#define CFG_FLASH_CFI 1
+#define CFG_FLASH_CFI_DRIVER 1
+#define CFG_FLASH_SIZE 0x200000
+
+/* Cache Configuration */
+#define CFG_CACHELINE_SIZE 16
+
+/* Port configuration */
+#define CFG_FECI2C 0xF0
+
+#endif /* _M5271EVB_H */
diff --git a/include/configs/MIP405.h b/include/configs/MIP405.h
index db2147b481..7e57a0fae1 100644
--- a/include/configs/MIP405.h
+++ b/include/configs/MIP405.h
@@ -58,7 +58,6 @@
CFG_CMD_CACHE | \
CFG_CMD_DATE | \
CFG_CMD_DHCP | \
- CFG_CMD_ECHO | \
CFG_CMD_EEPROM | \
CFG_CMD_ELF | \
CFG_CMD_FAT | \
@@ -87,6 +86,8 @@
/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
#include <cmd_confdefs.h>
+#define CFG_NAND_LEGACY
+
#define CFG_HUSH_PARSER
#define CFG_PROMPT_HUSH_PS2 "> "
/**************************************************************
diff --git a/include/configs/MPC8349ADS.h b/include/configs/MPC8349ADS.h
deleted file mode 100644
index d6d2fabeec..0000000000
--- a/include/configs/MPC8349ADS.h
+++ /dev/null
@@ -1,584 +0,0 @@
-/*
- * Copyright 2004 Freescale Semiconductor.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * mpc8349ads board configuration file
- *
- * Please refer to doc/README.mpc83xxads for more info.
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-#undef DEBUG
-
-#define CONFIG_MII
-
-/*
- * High Level Configuration Options
- */
-#define CONFIG_E300 1 /* E300 Family */
-#define CONFIG_MPC83XX 1 /* MPC83XX family */
-#define CONFIG_MPC8349 1 /* MPC8349 specific */
-#define CONFIG_MPC8349ADS 1 /* MPC8349ADS board specific */
-
-/* FIXME: Real PCI support will come in a follow-up update. */
-#undef CONFIG_PCI
-
-#define CONFIG_TSEC_ENET /* tsec ethernet support */
-#define CONFIG_ENV_OVERWRITE
-
-#define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup*/
-
-#undef CONFIG_DDR_ECC /* only for ECC DDR module */
-
-#define PCI_66M
-#ifdef PCI_66M
-#define CONFIG_83XX_CLKIN 66000000 /* in Hz */
-#else
-#define CONFIG_83XX_CLKIN 33000000 /* in Hz */
-#endif
-
-#ifndef CONFIG_SYS_CLK_FREQ
-#ifdef PCI_66M
-#define CONFIG_SYS_CLK_FREQ 66000000
-#else
-#define CONFIG_SYS_CLK_FREQ 33000000
-#endif
-#endif
-
-#define CONFIG_BOARD_EARLY_INIT_F /* call board_pre_init */
-
-#define CFG_IMMRBAR 0xE0000000
-
-#undef CFG_DRAM_TEST /* memory test, takes time */
-#define CFG_MEMTEST_START 0x00000000 /* memtest region */
-#define CFG_MEMTEST_END 0x00100000
-
-/*
- * DDR Setup
- */
-
-#define CFG_DDR_BASE 0x00000000 /* DDR is system memory*/
-#define CFG_SDRAM_BASE CFG_DDR_BASE
-#undef CONFIG_DDR_2T_TIMING
-#define CFG_DDR_SDRAM_BASE CFG_DDR_BASE
-
-#if defined(CONFIG_SPD_EEPROM)
- /*
- * Determine DDR configuration from I2C interface.
- */
- #define SPD_EEPROM_ADDRESS 0x51 /* DDR DIMM */
-#else
- /*
- * Manually set up DDR parameters
- */
- #define CFG_DDR_SIZE 256 /* Mb */
- #define CFG_DDR_CONFIG (CSCONFIG_EN | CSCONFIG_ROW_BIT_13 | CSCONFIG_COL_BIT_9)
- #define CFG_DDR_TIMING_1 0x37344321
- #define CFG_DDR_TIMING_2 0x00000800 /* P9-45,may need tuning */
- #define CFG_DDR_CONTROL 0xc2000000 /* unbuffered,no DYN_PWR */
- #define CFG_DDR_MODE 0x00000062 /* DLL,normal,seq,4/2.5 */
- #define CFG_DDR_INTERVAL 0x05200100 /* autocharge,no open page */
-#endif
-
-/*
- * SDRAM on the Local Bus
- */
-#define CFG_LBC_SDRAM_BASE 0xf0000000 /* Localbus SDRAM */
-#define CFG_LBC_SDRAM_SIZE 64 /* LBC SDRAM is 64MB */
-
-/*
- * FLASH on the Local Bus
- */
-#define CFG_FLASH_CFI /* use the Common Flash Interface */
-#define CFG_FLASH_CFI_DRIVER /* use the CFI driver */
-#define CFG_FLASH_BASE 0xFE000000 /* start of FLASH */
-#define CFG_FLASH_SIZE 8 /* FLASH size in MB */
-/* #define CFG_FLASH_USE_BUFFER_WRITE */
-
-#define CFG_BR0_PRELIM (CFG_FLASH_BASE | /* Flash Base address */ \
- (2 << BR_PS_SHIFT) | /* 32 bit port size */ \
- BR_V) /* valid */
-#define CFG_OR0_PRELIM 0xff806ff7 /* 16Mb Flash size*/
-#define CFG_LBLAWBAR0_PRELIM CFG_FLASH_BASE /* Window base at flash base */
-#define CFG_LBLAWAR0_PRELIM 0x80000016 /* 16Mb window size */
-
-#define CFG_MAX_FLASH_BANKS 1 /* number of banks */
-#define CFG_MAX_FLASH_SECT 64 /* sectors per device */
-
-#undef CFG_FLASH_CHECKSUM
-#define CFG_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */
-#define CFG_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */
-
-#define CFG_MID_FLASH_JUMP 0x7F000000
-#define CFG_MONITOR_BASE TEXT_BASE /* start of monitor */
-
-#if (CFG_MONITOR_BASE < CFG_FLASH_BASE)
-#define CFG_RAMBOOT
-#else
-#undef CFG_RAMBOOT
-#endif
-
-/*
- * BCSR register on local bus 32KB, 8-bit wide for ADS config reg
- */
-#define CFG_BCSR 0xF8000000
-#define CFG_LBLAWBAR1_PRELIM CFG_BCSR /* Access window base at BCSR base */
-#define CFG_LBLAWAR1_PRELIM 0x8000000E /* Access window size 32K */
-#define CFG_BR1_PRELIM (CFG_BCSR|0x00000801) /* Port-size=8bit, MSEL=GPCM */
-#define CFG_OR1_PRELIM 0xFFFFE8f0 /* length 32K */
-
-#define CONFIG_L1_INIT_RAM
-#define CFG_INIT_RAM_LOCK 1
-#define CFG_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */
-#define CFG_INIT_RAM_END 0x1000 /* End of used area in RAM*/
-
-#define CFG_GBL_DATA_SIZE 0x100 /* num bytes initial data */
-#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
-#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
-
-#define CFG_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Mon */
-#define CFG_MALLOC_LEN (128 * 1024) /* Reserved for malloc */
-
-/*
- * Local Bus LCRR and LBCR regs
- * LCRR: DLL bypass, Clock divider is 4
- * External Local Bus rate is
- * CLKIN * HRCWL_CSB_TO_CLKIN / HRCWL_LCL_BUS_TO_SCB_CLK / LCRR_CLKDIV
- */
-#define CFG_LCRR (LCRR_DBYP | LCRR_CLKDIV_4)
-#define CFG_LBC_LBCR 0x00000000
-
-#define CFG_LB_SDRAM /* if board has SRDAM on local bus */
-
-#ifdef CFG_LB_SDRAM
-/*local bus BR2, OR2 definition for SDRAM if soldered on the ADS board*/
-/*
- * Base Register 2 and Option Register 2 configure SDRAM.
- * The SDRAM base address, CFG_LBC_SDRAM_BASE, is 0xf0000000.
- *
- * For BR2, need:
- * Base address of 0xf0000000 = BR[0:16] = 1111 0000 0000 0000 0
- * port-size = 32-bits = BR2[19:20] = 11
- * no parity checking = BR2[21:22] = 00
- * SDRAM for MSEL = BR2[24:26] = 011
- * Valid = BR[31] = 1
- *
- * 0 4 8 12 16 20 24 28
- * 1111 0000 0000 0000 0001 1000 0110 0001 = f0001861
- *
- * FIXME: CFG_LBC_SDRAM_BASE should be masked and OR'ed into
- * FIXME: the top 17 bits of BR2.
- */
-
-#define CFG_BR2_PRELIM 0xf0001861 /*Port-size=32bit, MSEL=SDRAM*/
-#define CFG_LBLAWBAR2_PRELIM 0xF0000000
-#define CFG_LBLAWAR2_PRELIM 0x80000019 /*64M*/
-
-/*
- * The SDRAM size in MB, CFG_LBC_SDRAM_SIZE, is 64.
- *
- * For OR2, need:
- * 64MB mask for AM, OR2[0:7] = 1111 1100
- * XAM, OR2[17:18] = 11
- * 9 columns OR2[19-21] = 010
- * 13 rows OR2[23-25] = 100
- * EAD set for extra time OR[31] = 1
- *
- * 0 4 8 12 16 20 24 28
- * 1111 1100 0000 0000 0110 1001 0000 0001 = fc006901
- */
-
-#define CFG_OR2_PRELIM 0xfc006901
-
-#define CFG_LBC_LSRT 0x32000000 /* LB sdram refresh timer, about 6us */
-#define CFG_LBC_MRTPR 0x20000000 /* LB refresh timer prescal, 266MHz/32*/
-
-/*
- * LSDMR masks
- */
-#define CFG_LBC_LSDMR_RFEN (1 << (31 - 1))
-#define CFG_LBC_LSDMR_BSMA1516 (3 << (31 - 10))
-#define CFG_LBC_LSDMR_BSMA1617 (4 << (31 - 10))
-#define CFG_LBC_LSDMR_RFCR5 (3 << (31 - 16))
-#define CFG_LBC_LSDMR_RFCR8 (5 << (31 - 16))
-#define CFG_LBC_LSDMR_RFCR16 (7 << (31 - 16))
-#define CFG_LBC_LSDMR_PRETOACT3 (3 << (31 - 19))
-#define CFG_LBC_LSDMR_PRETOACT6 (5 << (31 - 19))
-#define CFG_LBC_LSDMR_PRETOACT7 (7 << (31 - 19))
-#define CFG_LBC_LSDMR_ACTTORW3 (3 << (31 - 22))
-#define CFG_LBC_LSDMR_ACTTORW7 (7 << (31 - 22))
-#define CFG_LBC_LSDMR_ACTTORW6 (6 << (31 - 22))
-#define CFG_LBC_LSDMR_BL8 (1 << (31 - 23))
-#define CFG_LBC_LSDMR_WRC2 (2 << (31 - 27))
-#define CFG_LBC_LSDMR_WRC3 (3 << (31 - 27))
-#define CFG_LBC_LSDMR_WRC4 (0 << (31 - 27))
-#define CFG_LBC_LSDMR_BUFCMD (1 << (31 - 29))
-#define CFG_LBC_LSDMR_CL3 (3 << (31 - 31))
-
-#define CFG_LBC_LSDMR_OP_NORMAL (0 << (31 - 4))
-#define CFG_LBC_LSDMR_OP_ARFRSH (1 << (31 - 4))
-#define CFG_LBC_LSDMR_OP_SRFRSH (2 << (31 - 4))
-#define CFG_LBC_LSDMR_OP_MRW (3 << (31 - 4))
-#define CFG_LBC_LSDMR_OP_PRECH (4 << (31 - 4))
-#define CFG_LBC_LSDMR_OP_PCHALL (5 << (31 - 4))
-#define CFG_LBC_LSDMR_OP_ACTBNK (6 << (31 - 4))
-#define CFG_LBC_LSDMR_OP_RWINV (7 << (31 - 4))
-
-#define CFG_LBC_LSDMR_COMMON ( CFG_LBC_LSDMR_RFEN \
- | CFG_LBC_LSDMR_BSMA1516 \
- | CFG_LBC_LSDMR_RFCR8 \
- | CFG_LBC_LSDMR_PRETOACT6 \
- | CFG_LBC_LSDMR_ACTTORW3 \
- | CFG_LBC_LSDMR_BL8 \
- | CFG_LBC_LSDMR_WRC3 \
- | CFG_LBC_LSDMR_CL3 \
- )
-
-/*
- * SDRAM Controller configuration sequence.
- */
-#define CFG_LBC_LSDMR_1 ( CFG_LBC_LSDMR_COMMON \
- | CFG_LBC_LSDMR_OP_PCHALL)
-#define CFG_LBC_LSDMR_2 ( CFG_LBC_LSDMR_COMMON \
- | CFG_LBC_LSDMR_OP_ARFRSH)
-#define CFG_LBC_LSDMR_3 ( CFG_LBC_LSDMR_COMMON \
- | CFG_LBC_LSDMR_OP_ARFRSH)
-#define CFG_LBC_LSDMR_4 ( CFG_LBC_LSDMR_COMMON \
- | CFG_LBC_LSDMR_OP_MRW)
-#define CFG_LBC_LSDMR_5 ( CFG_LBC_LSDMR_COMMON \
- | CFG_LBC_LSDMR_OP_NORMAL)
-#endif
-
-/*
- * Serial Port
- */
-#define CONFIG_CONS_INDEX 1
-#undef CONFIG_SERIAL_SOFTWARE_FIFO
-#define CFG_NS16550
-#define CFG_NS16550_SERIAL
-#define CFG_NS16550_REG_SIZE 1
-#define CFG_NS16550_CLK get_bus_freq(0)
-
-#define CFG_BAUDRATE_TABLE \
- {300, 600, 1200, 2400, 4800, 9600, 19200, 38400,115200}
-
-#define CFG_NS16550_COM1 (CFG_IMMRBAR+0x4500)
-#define CFG_NS16550_COM2 (CFG_IMMRBAR+0x4600)
-
-/* Use the HUSH parser */
-#define CFG_HUSH_PARSER
-#ifdef CFG_HUSH_PARSER
-#define CFG_PROMPT_HUSH_PS2 "> "
-#endif
-
-/* I2C */
-#define CONFIG_HARD_I2C /* I2C with hardware support*/
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
-#define CFG_I2C_SPEED 400000 /* I2C speed and slave address */
-#define CFG_I2C_SLAVE 0x7F
-#define CFG_I2C_NOPROBES {0x69} /* Don't probe these addrs */
-#define CFG_I2C_OFFSET 0x3000
-#define CFG_I2C2_OFFSET 0x3100
-
-/* TSEC */
-#define CFG_TSEC1_OFFSET 0x24000
-#define CFG_TSEC1 (CFG_IMMRBAR+CFG_TSEC1_OFFSET)
-#define CFG_TSEC2_OFFSET 0x25000
-#define CFG_TSEC2 (CFG_IMMRBAR+CFG_TSEC2_OFFSET)
-
-/* IO Configuration */
-#define CFG_IO_CONF (\
- IO_CONF_UART |\
- IO_CONF_TSEC1 |\
- IO_CONF_IRQ0 |\
- IO_CONF_IRQ1 |\
- IO_CONF_IRQ2 |\
- IO_CONF_IRQ3 |\
- IO_CONF_IRQ4 |\
- IO_CONF_IRQ5 |\
- IO_CONF_IRQ6 |\
- IO_CONF_IRQ7 )
-
-/*
- * General PCI
- * Addresses are mapped 1-1.
- */
-#define CFG_PCI1_MEM_BASE 0x80000000
-#define CFG_PCI1_MEM_PHYS CFG_PCI1_MEM_BASE
-#define CFG_PCI1_MEM_SIZE 0x20000000 /* 512M */
-#define CFG_PCI1_IO_BASE 0x00000000
-#define CFG_PCI1_IO_PHYS 0xe2000000
-#define CFG_PCI1_IO_SIZE 0x1000000 /* 16M */
-
-#define CFG_PCI2_MEM_BASE 0xA0000000
-#define CFG_PCI2_MEM_PHYS CFG_PCI2_MEM_BASE
-#define CFG_PCI2_MEM_SIZE 0x20000000 /* 512M */
-#define CFG_PCI2_IO_BASE 0x00000000
-#define CFG_PCI2_IO_PHYS 0xe3000000
-#define CFG_PCI2_IO_SIZE 0x1000000 /* 16M */
-#if defined(CONFIG_PCI)
-
-#define PCI_ALL_PCI1
-#if defined(PCI_64BIT)
-#undef PCI_ALL_PCI1
-#undef PCI_TWO_PCI1
-#undef PCI_ONE_PCI1
-#endif
-
-#define CONFIG_NET_MULTI
-#define CONFIG_PCI_PNP /* do pci plug-and-play */
-
-#undef CONFIG_EEPRO100
-#undef CONFIG_TULIP
-
-#if !defined(CONFIG_PCI_PNP)
- #define PCI_ENET0_IOADDR 0xFIXME
- #define PCI_ENET0_MEMADDR 0xFIXME
- #define PCI_IDSEL_NUMBER 0x0c /* slot0->3(IDSEL)=12->15 */
-#endif
-
-#undef CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
-#define CFG_PCI_SUBSYS_VENDORID 0x1057 /* Motorola */
-
-#endif /* CONFIG_PCI */
-
-#if defined(CONFIG_TSEC_ENET)
-#ifndef CONFIG_NET_MULTI
-#define CONFIG_NET_MULTI 1
-#endif
-
-#define CONFIG_GMII 1 /* MII PHY management */
-#define CONFIG_MPC83XX_TSEC1 1
-#define CONFIG_MPC83XX_TSEC1_NAME "TSEC0"
-#define CONFIG_MPC83XX_TSEC2 1
-#define CONFIG_MPC83XX_TSEC2_NAME "TSEC1"
-#define TSEC1_PHY_ADDR 0
-#define TSEC2_PHY_ADDR 1
-#define TSEC1_PHYIDX 0
-#define TSEC2_PHYIDX 0
-
-/* Options are: TSEC[0-1] */
-#define CONFIG_ETHPRIME "TSEC0"
-
-#endif /* CONFIG_TSEC_ENET */
-
-/*
- * Environment
- */
-#ifndef CFG_RAMBOOT
- #define CFG_ENV_IS_IN_FLASH 1
- #define CFG_ENV_ADDR (CFG_MONITOR_BASE + 0x40000)
- #define CFG_ENV_SECT_SIZE 0x40000 /* 256K(one sector) for env */
- #define CFG_ENV_SIZE 0x2000
-#else
- #define CFG_NO_FLASH 1 /* Flash is not usable now */
- #define CFG_ENV_IS_NOWHERE 1 /* Store ENV in memory only */
- #define CFG_ENV_ADDR (CFG_MONITOR_BASE - 0x1000)
- #define CFG_ENV_SIZE 0x2000
-#endif
-
-#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
-#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
-
-#if defined(CFG_RAMBOOT)
-#if defined(CONFIG_PCI)
-#define CONFIG_COMMANDS ((CONFIG_CMD_DFL \
- | CFG_CMD_PING \
- | CFG_CMD_PCI \
- | CFG_CMD_I2C) \
- & \
- ~(CFG_CMD_ENV \
- | CFG_CMD_LOADS))
-#else
-#define CONFIG_COMMANDS ((CONFIG_CMD_DFL \
- | CFG_CMD_PING \
- | CFG_CMD_I2C) \
- & \
- ~(CFG_CMD_ENV \
- | CFG_CMD_LOADS))
-#endif
-#else
-#if defined(CONFIG_PCI)
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL \
- | CFG_CMD_PCI \
- | CFG_CMD_PING \
- | CFG_CMD_I2C)
-#else
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL \
- | CFG_CMD_PING \
- | CFG_CMD_I2C \
- | CFG_CMD_MII \
- )
-#endif
-#endif
-
-#include <cmd_confdefs.h>
-
-#undef CONFIG_WATCHDOG /* watchdog disabled */
-
-/*
- * Miscellaneous configurable options
- */
-#define CFG_LONGHELP /* undef to save memory */
-#define CFG_LOAD_ADDR 0x2000000 /* default load address */
-#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
- #define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
-#else
- #define CFG_CBSIZE 256 /* Console I/O Buffer Size */
-#endif
-
-#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
-#define CFG_MAXARGS 16 /* max number of command args */
-#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
-#define CFG_HZ 1000 /* decrementer freq: 1ms ticks */
-
-/*
- * For booting Linux, the board info and command line data
- * have to be in the first 8 MB of memory, since this is
- * the maximum mapped by the Linux kernel during initialization.
- */
-#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux*/
-
-/* Cache Configuration */
-#define CFG_DCACHE_SIZE 32768
-#define CFG_CACHELINE_SIZE 32
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
-#define CFG_CACHELINE_SHIFT 5 /*log base 2 of the above value*/
-#endif
-
-#define CFG_RCWH_PCIHOST 0x80000000 /* PCIHOST */
-
-#define CFG_HRCW_LOW (\
- HRCWL_LCL_BUS_TO_SCB_CLK_1X1 |\
- HRCWL_DDR_TO_SCB_CLK_1X1 |\
- HRCWL_CSB_TO_CLKIN_4X1 |\
- HRCWL_VCO_1X2 |\
- HRCWL_CORE_TO_CSB_2X1)
-
-#if defined(PCI_64BIT)
-#define CFG_HRCW_HIGH (\
- HRCWH_PCI_HOST |\
- HRCWH_64_BIT_PCI |\
- HRCWH_PCI1_ARBITER_ENABLE |\
- HRCWH_PCI2_ARBITER_DISABLE |\
- HRCWH_CORE_ENABLE |\
- HRCWH_FROM_0X00000100 |\
- HRCWH_BOOTSEQ_DISABLE |\
- HRCWH_SW_WATCHDOG_DISABLE |\
- HRCWH_ROM_LOC_LOCAL_16BIT |\
- HRCWH_TSEC1M_IN_GMII |\
- HRCWH_TSEC2M_IN_GMII )
-#else
-#define CFG_HRCW_HIGH (\
- HRCWH_PCI_HOST |\
- HRCWH_32_BIT_PCI |\
- HRCWH_PCI1_ARBITER_ENABLE |\
- HRCWH_PCI2_ARBITER_ENABLE |\
- HRCWH_CORE_ENABLE |\
- HRCWH_FROM_0X00000100 |\
- HRCWH_BOOTSEQ_DISABLE |\
- HRCWH_SW_WATCHDOG_DISABLE |\
- HRCWH_ROM_LOC_LOCAL_16BIT |\
- HRCWH_TSEC1M_IN_GMII |\
- HRCWH_TSEC2M_IN_GMII )
-#endif
-
-#define CFG_HID0_INIT 0x000000000
-
-#define CFG_HID0_FINAL CFG_HID0_INIT
-
-/* #define CFG_HID0_FINAL (\
- HID0_ENABLE_INSTRUCTION_CACHE |\
- HID0_ENABLE_M_BIT |\
- HID0_ENABLE_ADDRESS_BROADCAST ) */
-
-#define CFG_HID2 0x000000000
-
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
-#define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */
-#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
-#endif
-
-/*
- * Environment Configuration
- */
-
-#if defined(CONFIG_TSEC_ENET)
-#define CONFIG_ETHADDR 00:04:9f:11:22:33
-#define CONFIG_HAS_ETH1
-#define CONFIG_ETH1ADDR 00:E0:0C:00:7D:01
-#endif
-
-#define CONFIG_IPADDR 192.168.1.253
-
-#define CONFIG_HOSTNAME unknown
-#define CONFIG_ROOTPATH /nfsroot
-#define CONFIG_BOOTFILE your.uImage
-
-#define CONFIG_SERVERIP 192.168.1.1
-#define CONFIG_GATEWAYIP 192.168.1.1
-#define CONFIG_NETMASK 255.255.255.0
-
-#define CONFIG_LOADADDR 200000 /* default location for tftp and bootm */
-
-#define CONFIG_BOOTDELAY 6 /* -1 disables auto-boot */
-#undef CONFIG_BOOTARGS /* the boot command will set bootargs */
-
-#define CONFIG_BAUDRATE 115200
-
-
-#define CONFIG_EXTRA_ENV_SETTINGS \
- "netdev=eth0\0" \
- "consoledev=ttyS0\0" \
- "ramdiskaddr=400000\0" \
- "ramdiskfile=ramfs.83xx\0"
-
-#define CONFIG_NFSBOOTCOMMAND \
- "setenv bootargs root=/dev/nfs rw " \
- "nfsroot=$serverip:$rootpath " \
- "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
- "console=$consoledev,$baudrate $othbootargs;" \
- "tftp $loadaddr $bootfile;" \
- "bootm $loadaddr"
-
-#define CONFIG_RAMBOOTCOMMAND \
- "setenv bootargs root=/dev/ram rw " \
- "console=$consoledev,$baudrate $othbootargs;" \
- "tftp $ramdiskaddr $ramdiskfile;" \
- "tftp $loadaddr $bootfile;" \
- "bootm $loadaddr $ramdiskaddr"
-
-#define CONFIG_BOOTCOMMAND CONFIG_NFSBOOTCOMMAND
-
-#endif /* __CONFIG_H */
diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h
new file mode 100644
index 0000000000..66f164660e
--- /dev/null
+++ b/include/configs/MPC8349EMDS.h
@@ -0,0 +1,716 @@
+/*
+ * (C) Copyright 2006
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * mpc8349emds board configuration file
+ *
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#undef DEBUG
+
+/*
+ * High Level Configuration Options
+ */
+#define CONFIG_E300 1 /* E300 Family */
+#define CONFIG_MPC83XX 1 /* MPC83XX family */
+#define CONFIG_MPC8349 1 /* MPC8349 specific */
+#define CONFIG_MPC8349EMDS 1 /* MPC8349EMDS board specific */
+
+#undef CONFIG_PCI
+#undef CONFIG_MPC83XX_PCI2 /* support for 2nd PCI controller */
+
+#define PCI_66M
+#ifdef PCI_66M
+#define CONFIG_83XX_CLKIN 66000000 /* in Hz */
+#else
+#define CONFIG_83XX_CLKIN 33000000 /* in Hz */
+#endif
+
+#ifndef CONFIG_SYS_CLK_FREQ
+#ifdef PCI_66M
+#define CONFIG_SYS_CLK_FREQ 66000000
+#define HRCWL_CSB_TO_CLKIN HRCWL_CSB_TO_CLKIN_4X1
+#else
+#define CONFIG_SYS_CLK_FREQ 33000000
+#define HRCWL_CSB_TO_CLKIN HRCWL_CSB_TO_CLKIN_8X1
+#endif
+#endif
+
+#define CONFIG_BOARD_EARLY_INIT_F /* call board_pre_init */
+
+#define CFG_IMMRBAR 0xE0000000
+
+#undef CFG_DRAM_TEST /* memory test, takes time */
+#define CFG_MEMTEST_START 0x00000000 /* memtest region */
+#define CFG_MEMTEST_END 0x00100000
+
+/*
+ * DDR Setup
+ */
+#undef CONFIG_DDR_ECC /* only for ECC DDR module */
+#define CONFIG_DDR_ECC_CMD /* use DDR ECC user commands */
+#define CONFIG_SPD_EEPROM /* use SPD EEPROM for DDR setup*/
+
+/*
+ * 32-bit data path mode.
+ *
+ * Please note that using this mode for devices with the real density of 64-bit
+ * effectively reduces the amount of available memory due to the effect of
+ * wrapping around while translating address to row/columns, for example in the
+ * 256MB module the upper 128MB get aliased with contents of the lower
+ * 128MB); normally this define should be used for devices with real 32-bit
+ * data path.
+ */
+#undef CONFIG_DDR_32BIT
+
+#define CFG_DDR_BASE 0x00000000 /* DDR is system memory*/
+#define CFG_SDRAM_BASE CFG_DDR_BASE
+#define CFG_DDR_SDRAM_BASE CFG_DDR_BASE
+#undef CONFIG_DDR_2T_TIMING
+
+#if defined(CONFIG_SPD_EEPROM)
+/*
+ * Determine DDR configuration from I2C interface.
+ */
+#define SPD_EEPROM_ADDRESS 0x51 /* DDR DIMM */
+#else
+/*
+ * Manually set up DDR parameters
+ */
+#define CFG_DDR_SIZE 256 /* MB */
+#define CFG_DDR_CONFIG (CSCONFIG_EN | CSCONFIG_ROW_BIT_13 | CSCONFIG_COL_BIT_10)
+#define CFG_DDR_TIMING_1 0x36332321
+#define CFG_DDR_TIMING_2 0x00000800 /* P9-45,may need tuning */
+#define CFG_DDR_CONTROL 0xc2000000 /* unbuffered,no DYN_PWR */
+#define CFG_DDR_INTERVAL 0x04060100 /* autocharge,no open page */
+
+#if defined(CONFIG_DDR_32BIT)
+/* set burst length to 8 for 32-bit data path */
+#define CFG_DDR_MODE 0x00000023 /* DLL,normal,seq,4/2.5, 8 burst len */
+#else
+/* the default burst length is 4 - for 64-bit data path */
+#define CFG_DDR_MODE 0x00000022 /* DLL,normal,seq,4/2.5, 4 burst len */
+#endif
+#endif
+
+/*
+ * SDRAM on the Local Bus
+ */
+#define CFG_LBC_SDRAM_BASE 0xF0000000 /* Localbus SDRAM */
+#define CFG_LBC_SDRAM_SIZE 64 /* LBC SDRAM is 64MB */
+
+/*
+ * FLASH on the Local Bus
+ */
+#define CFG_FLASH_CFI /* use the Common Flash Interface */
+#define CFG_FLASH_CFI_DRIVER /* use the CFI driver */
+#define CFG_FLASH_BASE 0xFE000000 /* start of FLASH */
+#define CFG_FLASH_SIZE 8 /* flash size in MB */
+/* #define CFG_FLASH_USE_BUFFER_WRITE */
+
+#define CFG_BR0_PRELIM (CFG_FLASH_BASE | /* flash Base address */ \
+ (2 << BR_PS_SHIFT) | /* 32 bit port size */ \
+ BR_V) /* valid */
+
+#define CFG_OR0_PRELIM 0xFF806FF7 /* 8 MB flash size */
+#define CFG_LBLAWBAR0_PRELIM CFG_FLASH_BASE /* window base at flash base */
+#define CFG_LBLAWAR0_PRELIM 0x80000016 /* 8 MB window size */
+
+#define CFG_MAX_FLASH_BANKS 1 /* number of banks */
+#define CFG_MAX_FLASH_SECT 64 /* sectors per device */
+
+#undef CFG_FLASH_CHECKSUM
+#define CFG_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */
+#define CFG_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */
+
+#define CFG_MID_FLASH_JUMP 0x7F000000
+#define CFG_MONITOR_BASE TEXT_BASE /* start of monitor */
+
+#if (CFG_MONITOR_BASE < CFG_FLASH_BASE)
+#define CFG_RAMBOOT
+#else
+#undef CFG_RAMBOOT
+#endif
+
+/*
+ * BCSR register on local bus 32KB, 8-bit wide for MDS config reg
+ */
+#define CFG_BCSR 0xE2400000
+#define CFG_LBLAWBAR1_PRELIM CFG_BCSR /* Access window base at BCSR base */
+#define CFG_LBLAWAR1_PRELIM 0x8000000E /* Access window size 32K */
+#define CFG_BR1_PRELIM (CFG_BCSR|0x00000801) /* Port-size=8bit, MSEL=GPCM */
+#define CFG_OR1_PRELIM 0xFFFFE8F0 /* length 32K */
+
+#define CONFIG_L1_INIT_RAM
+#define CFG_INIT_RAM_LOCK 1
+#define CFG_INIT_RAM_ADDR 0xFD000000 /* Initial RAM address */
+#define CFG_INIT_RAM_END 0x1000 /* End of used area in RAM*/
+
+#define CFG_GBL_DATA_SIZE 0x100 /* num bytes initial data */
+#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
+#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
+
+#define CFG_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Mon */
+#define CFG_MALLOC_LEN (128 * 1024) /* Reserved for malloc */
+
+/*
+ * Local Bus LCRR and LBCR regs
+ * LCRR: DLL bypass, Clock divider is 4
+ * External Local Bus rate is
+ * CLKIN * HRCWL_CSB_TO_CLKIN / HRCWL_LCL_BUS_TO_SCB_CLK / LCRR_CLKDIV
+ */
+#define CFG_LCRR (LCRR_DBYP | LCRR_CLKDIV_4)
+#define CFG_LBC_LBCR 0x00000000
+
+#define CFG_LB_SDRAM /* if board has SRDAM on local bus */
+
+#ifdef CFG_LB_SDRAM
+/* Local bus BR2, OR2 definition for SDRAM if soldered on the MDS board */
+/*
+ * Base Register 2 and Option Register 2 configure SDRAM.
+ * The SDRAM base address, CFG_LBC_SDRAM_BASE, is 0xf0000000.
+ *
+ * For BR2, need:
+ * Base address of 0xf0000000 = BR[0:16] = 1111 0000 0000 0000 0
+ * port-size = 32-bits = BR2[19:20] = 11
+ * no parity checking = BR2[21:22] = 00
+ * SDRAM for MSEL = BR2[24:26] = 011
+ * Valid = BR[31] = 1
+ *
+ * 0 4 8 12 16 20 24 28
+ * 1111 0000 0000 0000 0001 1000 0110 0001 = F0001861
+ *
+ * FIXME: CFG_LBC_SDRAM_BASE should be masked and OR'ed into
+ * FIXME: the top 17 bits of BR2.
+ */
+
+#define CFG_BR2_PRELIM 0xF0001861 /* Port-size=32bit, MSEL=SDRAM */
+#define CFG_LBLAWBAR2_PRELIM 0xF0000000
+#define CFG_LBLAWAR2_PRELIM 0x80000019 /* 64M */
+
+/*
+ * The SDRAM size in MB, CFG_LBC_SDRAM_SIZE, is 64.
+ *
+ * For OR2, need:
+ * 64MB mask for AM, OR2[0:7] = 1111 1100
+ * XAM, OR2[17:18] = 11
+ * 9 columns OR2[19-21] = 010
+ * 13 rows OR2[23-25] = 100
+ * EAD set for extra time OR[31] = 1
+ *
+ * 0 4 8 12 16 20 24 28
+ * 1111 1100 0000 0000 0110 1001 0000 0001 = FC006901
+ */
+
+#define CFG_OR2_PRELIM 0xFC006901
+
+#define CFG_LBC_LSRT 0x32000000 /* LB sdram refresh timer, about 6us */
+#define CFG_LBC_MRTPR 0x20000000 /* LB refresh timer prescal, 266MHz/32 */
+
+/*
+ * LSDMR masks
+ */
+#define CFG_LBC_LSDMR_RFEN (1 << (31 - 1))
+#define CFG_LBC_LSDMR_BSMA1516 (3 << (31 - 10))
+#define CFG_LBC_LSDMR_BSMA1617 (4 << (31 - 10))
+#define CFG_LBC_LSDMR_RFCR5 (3 << (31 - 16))
+#define CFG_LBC_LSDMR_RFCR8 (5 << (31 - 16))
+#define CFG_LBC_LSDMR_RFCR16 (7 << (31 - 16))
+#define CFG_LBC_LSDMR_PRETOACT3 (3 << (31 - 19))
+#define CFG_LBC_LSDMR_PRETOACT6 (5 << (31 - 19))
+#define CFG_LBC_LSDMR_PRETOACT7 (7 << (31 - 19))
+#define CFG_LBC_LSDMR_ACTTORW3 (3 << (31 - 22))
+#define CFG_LBC_LSDMR_ACTTORW7 (7 << (31 - 22))
+#define CFG_LBC_LSDMR_ACTTORW6 (6 << (31 - 22))
+#define CFG_LBC_LSDMR_BL8 (1 << (31 - 23))
+#define CFG_LBC_LSDMR_WRC2 (2 << (31 - 27))
+#define CFG_LBC_LSDMR_WRC3 (3 << (31 - 27))
+#define CFG_LBC_LSDMR_WRC4 (0 << (31 - 27))
+#define CFG_LBC_LSDMR_BUFCMD (1 << (31 - 29))
+#define CFG_LBC_LSDMR_CL3 (3 << (31 - 31))
+
+#define CFG_LBC_LSDMR_OP_NORMAL (0 << (31 - 4))
+#define CFG_LBC_LSDMR_OP_ARFRSH (1 << (31 - 4))
+#define CFG_LBC_LSDMR_OP_SRFRSH (2 << (31 - 4))
+#define CFG_LBC_LSDMR_OP_MRW (3 << (31 - 4))
+#define CFG_LBC_LSDMR_OP_PRECH (4 << (31 - 4))
+#define CFG_LBC_LSDMR_OP_PCHALL (5 << (31 - 4))
+#define CFG_LBC_LSDMR_OP_ACTBNK (6 << (31 - 4))
+#define CFG_LBC_LSDMR_OP_RWINV (7 << (31 - 4))
+
+#define CFG_LBC_LSDMR_COMMON ( CFG_LBC_LSDMR_RFEN \
+ | CFG_LBC_LSDMR_BSMA1516 \
+ | CFG_LBC_LSDMR_RFCR8 \
+ | CFG_LBC_LSDMR_PRETOACT6 \
+ | CFG_LBC_LSDMR_ACTTORW3 \
+ | CFG_LBC_LSDMR_BL8 \
+ | CFG_LBC_LSDMR_WRC3 \
+ | CFG_LBC_LSDMR_CL3 \
+ )
+
+/*
+ * SDRAM Controller configuration sequence.
+ */
+#define CFG_LBC_LSDMR_1 ( CFG_LBC_LSDMR_COMMON \
+ | CFG_LBC_LSDMR_OP_PCHALL)
+#define CFG_LBC_LSDMR_2 ( CFG_LBC_LSDMR_COMMON \
+ | CFG_LBC_LSDMR_OP_ARFRSH)
+#define CFG_LBC_LSDMR_3 ( CFG_LBC_LSDMR_COMMON \
+ | CFG_LBC_LSDMR_OP_ARFRSH)
+#define CFG_LBC_LSDMR_4 ( CFG_LBC_LSDMR_COMMON \
+ | CFG_LBC_LSDMR_OP_MRW)
+#define CFG_LBC_LSDMR_5 ( CFG_LBC_LSDMR_COMMON \
+ | CFG_LBC_LSDMR_OP_NORMAL)
+#endif
+
+/*
+ * Serial Port
+ */
+#define CONFIG_CONS_INDEX 1
+#undef CONFIG_SERIAL_SOFTWARE_FIFO
+#define CFG_NS16550
+#define CFG_NS16550_SERIAL
+#define CFG_NS16550_REG_SIZE 1
+#define CFG_NS16550_CLK get_bus_freq(0)
+
+#define CFG_BAUDRATE_TABLE \
+ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400,115200}
+
+#define CFG_NS16550_COM1 (CFG_IMMRBAR+0x4500)
+#define CFG_NS16550_COM2 (CFG_IMMRBAR+0x4600)
+
+/* Use the HUSH parser */
+#define CFG_HUSH_PARSER
+#ifdef CFG_HUSH_PARSER
+#define CFG_PROMPT_HUSH_PS2 "> "
+#endif
+
+/* I2C */
+#define CONFIG_HARD_I2C /* I2C with hardware support*/
+#undef CONFIG_SOFT_I2C /* I2C bit-banged */
+#define CFG_I2C_SPEED 400000 /* I2C speed and slave address */
+#define CFG_I2C_SLAVE 0x7F
+#define CFG_I2C_NOPROBES {0x69} /* Don't probe these addrs */
+#define CFG_I2C_OFFSET 0x3000
+#define CFG_I2C2_OFFSET 0x3100
+
+/* TSEC */
+#define CFG_TSEC1_OFFSET 0x24000
+#define CFG_TSEC1 (CFG_IMMRBAR+CFG_TSEC1_OFFSET)
+#define CFG_TSEC2_OFFSET 0x25000
+#define CFG_TSEC2 (CFG_IMMRBAR+CFG_TSEC2_OFFSET)
+
+/* USB */
+#define CFG_USE_MPC834XSYS_USB_PHY 1 /* Use SYS board PHY */
+
+/*
+ * General PCI
+ * Addresses are mapped 1-1.
+ */
+#define CFG_PCI1_MEM_BASE 0x80000000
+#define CFG_PCI1_MEM_PHYS CFG_PCI1_MEM_BASE
+#define CFG_PCI1_MEM_SIZE 0x10000000 /* 256M */
+#define CFG_PCI1_MMIO_BASE 0x90000000
+#define CFG_PCI1_MMIO_PHYS CFG_PCI1_MMIO_BASE
+#define CFG_PCI1_MMIO_SIZE 0x10000000 /* 256M */
+#define CFG_PCI1_IO_BASE 0x00000000
+#define CFG_PCI1_IO_PHYS 0xE2000000
+#define CFG_PCI1_IO_SIZE 0x00100000 /* 1M */
+
+#define CFG_PCI2_MEM_BASE 0xA0000000
+#define CFG_PCI2_MEM_PHYS CFG_PCI2_MEM_BASE
+#define CFG_PCI2_MEM_SIZE 0x10000000 /* 256M */
+#define CFG_PCI2_MMIO_BASE 0xB0000000
+#define CFG_PCI2_MMIO_PHYS CFG_PCI2_MMIO_BASE
+#define CFG_PCI2_MMIO_SIZE 0x10000000 /* 256M */
+#define CFG_PCI2_IO_BASE 0x00000000
+#define CFG_PCI2_IO_PHYS 0xE2100000
+#define CFG_PCI2_IO_SIZE 0x00100000 /* 1M */
+
+#if defined(CONFIG_PCI)
+
+#define PCI_ONE_PCI1
+#if defined(PCI_64BIT)
+#undef PCI_ALL_PCI1
+#undef PCI_TWO_PCI1
+#undef PCI_ONE_PCI1
+#endif
+
+#define CONFIG_NET_MULTI
+#define CONFIG_PCI_PNP /* do pci plug-and-play */
+
+#undef CONFIG_EEPRO100
+#undef CONFIG_TULIP
+
+#if !defined(CONFIG_PCI_PNP)
+ #define PCI_ENET0_IOADDR 0xFIXME
+ #define PCI_ENET0_MEMADDR 0xFIXME
+ #define PCI_IDSEL_NUMBER 0x0c /* slot0->3(IDSEL)=12->15 */
+#endif
+
+#undef CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
+#define CFG_PCI_SUBSYS_VENDORID 0x1057 /* Motorola */
+
+#endif /* CONFIG_PCI */
+
+/*
+ * TSEC configuration
+ */
+#define CONFIG_TSEC_ENET /* TSEC ethernet support */
+
+#if defined(CONFIG_TSEC_ENET)
+#ifndef CONFIG_NET_MULTI
+#define CONFIG_NET_MULTI 1
+#endif
+
+#define CONFIG_GMII 1 /* MII PHY management */
+#define CONFIG_MPC83XX_TSEC1 1
+#define CONFIG_MPC83XX_TSEC1_NAME "TSEC0"
+#define CONFIG_MPC83XX_TSEC2 1
+#define CONFIG_MPC83XX_TSEC2_NAME "TSEC1"
+#define TSEC1_PHY_ADDR 0
+#define TSEC2_PHY_ADDR 1
+#define TSEC1_PHYIDX 0
+#define TSEC2_PHYIDX 0
+
+/* Options are: TSEC[0-1] */
+#define CONFIG_ETHPRIME "TSEC0"
+
+#endif /* CONFIG_TSEC_ENET */
+
+/*
+ * Configure on-board RTC
+ */
+#define CONFIG_RTC_DS1374 /* use ds1374 rtc via i2c */
+#define CFG_I2C_RTC_ADDR 0x68 /* at address 0x68 */
+
+/*
+ * Environment
+ */
+#ifndef CFG_RAMBOOT
+ #define CFG_ENV_IS_IN_FLASH 1
+ #define CFG_ENV_ADDR (CFG_MONITOR_BASE + 0x40000)
+ #define CFG_ENV_SECT_SIZE 0x20000 /* 128K(one sector) for env */
+ #define CFG_ENV_SIZE 0x2000
+
+/* Address and size of Redundant Environment Sector */
+#define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR + CFG_ENV_SECT_SIZE)
+#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
+
+#else
+ #define CFG_NO_FLASH 1 /* Flash is not usable now */
+ #define CFG_ENV_IS_NOWHERE 1 /* Store ENV in memory only */
+ #define CFG_ENV_ADDR (CFG_MONITOR_BASE - 0x1000)
+ #define CFG_ENV_SIZE 0x2000
+#endif
+
+#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
+#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
+
+#if defined(CFG_RAMBOOT)
+#if defined(CONFIG_PCI)
+#define CONFIG_COMMANDS ((CONFIG_CMD_DFL \
+ | CFG_CMD_PING \
+ | CFG_CMD_PCI \
+ | CFG_CMD_I2C \
+ | CFG_CMD_DATE) \
+ & \
+ ~(CFG_CMD_ENV \
+ | CFG_CMD_LOADS))
+#else
+#define CONFIG_COMMANDS ((CONFIG_CMD_DFL \
+ | CFG_CMD_PING \
+ | CFG_CMD_I2C \
+ | CFG_CMD_DATE) \
+ & \
+ ~(CFG_CMD_ENV \
+ | CFG_CMD_LOADS))
+#endif
+#else
+#if defined(CONFIG_PCI)
+#define CONFIG_COMMANDS (CONFIG_CMD_DFL \
+ | CFG_CMD_PCI \
+ | CFG_CMD_PING \
+ | CFG_CMD_I2C \
+ | CFG_CMD_DATE \
+ )
+#else
+#define CONFIG_COMMANDS (CONFIG_CMD_DFL \
+ | CFG_CMD_PING \
+ | CFG_CMD_I2C \
+ | CFG_CMD_MII \
+ | CFG_CMD_DATE \
+ )
+#endif
+#endif
+
+#include <cmd_confdefs.h>
+
+#undef CONFIG_WATCHDOG /* watchdog disabled */
+
+/*
+ * Miscellaneous configurable options
+ */
+#define CFG_LONGHELP /* undef to save memory */
+#define CFG_LOAD_ADDR 0x2000000 /* default load address */
+#define CFG_PROMPT "=> " /* Monitor Command Prompt */
+
+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+ #define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
+#else
+ #define CFG_CBSIZE 256 /* Console I/O Buffer Size */
+#endif
+
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
+#define CFG_MAXARGS 16 /* max number of command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+#define CFG_HZ 1000 /* decrementer freq: 1ms ticks */
+
+/*
+ * For booting Linux, the board info and command line data
+ * have to be in the first 8 MB of memory, since this is
+ * the maximum mapped by the Linux kernel during initialization.
+ */
+#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux*/
+
+/* Cache Configuration */
+#define CFG_DCACHE_SIZE 32768
+#define CFG_CACHELINE_SIZE 32
+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#define CFG_CACHELINE_SHIFT 5 /*log base 2 of the above value*/
+#endif
+
+#define CFG_RCWH_PCIHOST 0x80000000 /* PCIHOST */
+
+#if 1 /*528/264*/
+#define CFG_HRCW_LOW (\
+ HRCWL_LCL_BUS_TO_SCB_CLK_1X1 |\
+ HRCWL_DDR_TO_SCB_CLK_1X1 |\
+ HRCWL_CSB_TO_CLKIN |\
+ HRCWL_VCO_1X2 |\
+ HRCWL_CORE_TO_CSB_2X1)
+#elif 0 /*396/132*/
+#define CFG_HRCW_LOW (\
+ HRCWL_LCL_BUS_TO_SCB_CLK_1X1 |\
+ HRCWL_DDR_TO_SCB_CLK_1X1 |\
+ HRCWL_CSB_TO_CLKIN |\
+ HRCWL_VCO_1X4 |\
+ HRCWL_CORE_TO_CSB_3X1)
+#elif 0 /*264/132*/
+#define CFG_HRCW_LOW (\
+ HRCWL_LCL_BUS_TO_SCB_CLK_1X1 |\
+ HRCWL_DDR_TO_SCB_CLK_1X1 |\
+ HRCWL_CSB_TO_CLKIN |\
+ HRCWL_VCO_1X4 |\
+ HRCWL_CORE_TO_CSB_2X1)
+#elif 0 /*132/132*/
+#define CFG_HRCW_LOW (\
+ HRCWL_LCL_BUS_TO_SCB_CLK_1X1 |\
+ HRCWL_DDR_TO_SCB_CLK_1X1 |\
+ HRCWL_CSB_TO_CLKIN |\
+ HRCWL_VCO_1X4 |\
+ HRCWL_CORE_TO_CSB_1X1)
+#elif 0 /*264/264 */
+#define CFG_HRCW_LOW (\
+ HRCWL_LCL_BUS_TO_SCB_CLK_1X1 |\
+ HRCWL_DDR_TO_SCB_CLK_1X1 |\
+ HRCWL_CSB_TO_CLKIN |\
+ HRCWL_VCO_1X4 |\
+ HRCWL_CORE_TO_CSB_1X1)
+#endif
+
+#if defined(PCI_64BIT)
+#define CFG_HRCW_HIGH (\
+ HRCWH_PCI_HOST |\
+ HRCWH_64_BIT_PCI |\
+ HRCWH_PCI1_ARBITER_ENABLE |\
+ HRCWH_PCI2_ARBITER_DISABLE |\
+ HRCWH_CORE_ENABLE |\
+ HRCWH_FROM_0X00000100 |\
+ HRCWH_BOOTSEQ_DISABLE |\
+ HRCWH_SW_WATCHDOG_DISABLE |\
+ HRCWH_ROM_LOC_LOCAL_16BIT |\
+ HRCWH_TSEC1M_IN_GMII |\
+ HRCWH_TSEC2M_IN_GMII )
+#else
+#define CFG_HRCW_HIGH (\
+ HRCWH_PCI_HOST |\
+ HRCWH_32_BIT_PCI |\
+ HRCWH_PCI1_ARBITER_ENABLE |\
+ HRCWH_PCI2_ARBITER_ENABLE |\
+ HRCWH_CORE_ENABLE |\
+ HRCWH_FROM_0X00000100 |\
+ HRCWH_BOOTSEQ_DISABLE |\
+ HRCWH_SW_WATCHDOG_DISABLE |\
+ HRCWH_ROM_LOC_LOCAL_16BIT |\
+ HRCWH_TSEC1M_IN_GMII |\
+ HRCWH_TSEC2M_IN_GMII )
+#endif
+
+/* System IO Config */
+#define CFG_SICRH SICRH_TSOBI1
+#define CFG_SICRL SICRL_LDP_A
+
+#define CFG_HID0_INIT 0x000000000
+#define CFG_HID0_FINAL HID0_ENABLE_MACHINE_CHECK
+
+/* #define CFG_HID0_FINAL (\
+ HID0_ENABLE_INSTRUCTION_CACHE |\
+ HID0_ENABLE_M_BIT |\
+ HID0_ENABLE_ADDRESS_BROADCAST ) */
+
+
+#define CFG_HID2 HID2_HBE
+
+/* DDR @ 0x00000000 */
+#define CFG_IBAT0L (CFG_SDRAM_BASE | BATL_PP_10 | BATL_MEMCOHERENCE)
+#define CFG_IBAT0U (CFG_SDRAM_BASE | BATU_BL_256M | BATU_VS | BATU_VP)
+
+/* PCI @ 0x80000000 */
+#ifdef CONFIG_PCI
+#define CFG_IBAT1L (CFG_PCI1_MEM_BASE | BATL_PP_10 | BATL_MEMCOHERENCE)
+#define CFG_IBAT1U (CFG_PCI1_MEM_BASE | BATU_BL_256M | BATU_VS | BATU_VP)
+#define CFG_IBAT2L (CFG_PCI1_MMIO_BASE | BATL_PP_10 | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
+#define CFG_IBAT2U (CFG_PCI1_MMIO_BASE | BATU_BL_256M | BATU_VS | BATU_VP)
+#else
+#define CFG_IBAT1L (0)
+#define CFG_IBAT1U (0)
+#define CFG_IBAT2L (0)
+#define CFG_IBAT2U (0)
+#endif
+
+#ifdef CONFIG_MPC83XX_PCI2
+#define CFG_IBAT3L (CFG_PCI2_MEM_BASE | BATL_PP_10 | BATL_MEMCOHERENCE)
+#define CFG_IBAT3U (CFG_PCI2_MEM_BASE | BATU_BL_256M | BATU_VS | BATU_VP)
+#define CFG_IBAT4L (CFG_PCI2_MMIO_BASE | BATL_PP_10 | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
+#define CFG_IBAT4U (CFG_PCI2_MMIO_BASE | BATU_BL_256M | BATU_VS | BATU_VP)
+#else
+#define CFG_IBAT3L (0)
+#define CFG_IBAT3U (0)
+#define CFG_IBAT4L (0)
+#define CFG_IBAT4U (0)
+#endif
+
+/* IMMRBAR @ 0xE0000000, PCI IO @ 0xE2000000 & BCSR @ 0xE2400000 */
+#define CFG_IBAT5L (CFG_IMMRBAR | BATL_PP_10 | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
+#define CFG_IBAT5U (CFG_IMMRBAR | BATU_BL_256M | BATU_VS | BATU_VP)
+
+/* SDRAM @ 0xF0000000, stack in DCACHE 0xFDF00000 & FLASH @ 0xFE000000 */
+#define CFG_IBAT6L (0xF0000000 | BATL_PP_10 | BATL_MEMCOHERENCE)
+#define CFG_IBAT6U (0xF0000000 | BATU_BL_256M | BATU_VS | BATU_VP)
+
+#define CFG_IBAT7L (0)
+#define CFG_IBAT7U (0)
+
+#define CFG_DBAT0L CFG_IBAT0L
+#define CFG_DBAT0U CFG_IBAT0U
+#define CFG_DBAT1L CFG_IBAT1L
+#define CFG_DBAT1U CFG_IBAT1U
+#define CFG_DBAT2L CFG_IBAT2L
+#define CFG_DBAT2U CFG_IBAT2U
+#define CFG_DBAT3L CFG_IBAT3L
+#define CFG_DBAT3U CFG_IBAT3U
+#define CFG_DBAT4L CFG_IBAT4L
+#define CFG_DBAT4U CFG_IBAT4U
+#define CFG_DBAT5L CFG_IBAT5L
+#define CFG_DBAT5U CFG_IBAT5U
+#define CFG_DBAT6L CFG_IBAT6L
+#define CFG_DBAT6U CFG_IBAT6U
+#define CFG_DBAT7L CFG_IBAT7L
+#define CFG_DBAT7U CFG_IBAT7U
+
+/*
+ * Internal Definitions
+ *
+ * Boot Flags
+ */
+#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
+#define BOOTFLAG_WARM 0x02 /* Software reboot */
+
+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */
+#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
+#endif
+
+/*
+ * Environment Configuration
+ */
+#define CONFIG_ENV_OVERWRITE
+
+#if defined(CONFIG_TSEC_ENET)
+#define CONFIG_ETHADDR 00:04:9f:ef:23:33
+#define CONFIG_HAS_ETH1
+#define CONFIG_ETH1ADDR 00:E0:0C:00:7E:21
+#endif
+
+#define CONFIG_IPADDR 192.168.205.5
+
+#define CONFIG_HOSTNAME mpc8349emds
+#define CONFIG_ROOTPATH /opt/eldk/ppc_6xx
+#define CONFIG_BOOTFILE /tftpboot/tqm83xx/uImage
+
+#define CONFIG_SERVERIP 192.168.1.1
+#define CONFIG_GATEWAYIP 192.168.1.1
+#define CONFIG_NETMASK 255.255.255.0
+
+#define CONFIG_LOADADDR 200000 /* default location for tftp and bootm */
+
+#define CONFIG_BOOTDELAY 6 /* -1 disables auto-boot */
+#undef CONFIG_BOOTARGS /* the boot command will set bootargs */
+
+#define CONFIG_BAUDRATE 115200
+
+#define CONFIG_PREBOOT "echo;" \
+ "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
+ "echo"
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "netdev=eth0\0" \
+ "hostname=mpc8349emds\0" \
+ "nfsargs=setenv bootargs root=/dev/nfs rw " \
+ "nfsroot=${serverip}:${rootpath}\0" \
+ "ramargs=setenv bootargs root=/dev/ram rw\0" \
+ "addip=setenv bootargs ${bootargs} " \
+ "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
+ ":${hostname}:${netdev}:off panic=1\0" \
+ "addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0"\
+ "flash_nfs=run nfsargs addip addtty;" \
+ "bootm ${kernel_addr}\0" \
+ "flash_self=run ramargs addip addtty;" \
+ "bootm ${kernel_addr} ${ramdisk_addr}\0" \
+ "net_nfs=tftp 200000 ${bootfile};run nfsargs addip addtty;" \
+ "bootm\0" \
+ "rootpath=/opt/eldk/ppc_6xx\0" \
+ "bootfile=/tftpboot/mpc8349emds/uImage\0" \
+ "load=tftp 100000 /tftpboot/mpc8349emds/u-boot.bin\0" \
+ "update=protect off fe000000 fe03ffff; " \
+ "era fe000000 fe03ffff; cp.b 100000 fe000000 ${filesize}\0" \
+ "upd=run load;run update\0" \
+ ""
+
+#define CONFIG_BOOTCOMMAND "run flash_self"
+
+#endif /* __CONFIG_H */
diff --git a/include/configs/MPC86xADS.h b/include/configs/MPC86xADS.h
index 565f9bb5c0..831cc5ecd3 100644
--- a/include/configs/MPC86xADS.h
+++ b/include/configs/MPC86xADS.h
@@ -21,7 +21,7 @@
#define CONFIG_MPC86xADS 1 /* new ADS */
#define CONFIG_FADS 1 /* We are FADS compatible (more or less) */
-/* New MPC86xADS - pick one of these */
+/* CPU type - pick one of these */
#define CONFIG_MPC866T 1
#undef CONFIG_MPC866P
#undef CONFIG_MPC859T
@@ -33,7 +33,10 @@
#undef CONFIG_8xx_CONS_NONE
#define CONFIG_BAUDRATE 38400
-#define CONFIG_8xx_OSCLK 10000000 /* 10MHz oscillator on EXTCLK */
+#define CONFIG_8xx_OSCLK 10000000 /* 10MHz oscillator on EXTCLK */
+#define CONFIG_8xx_CPUCLK_DEFAULT 50000000
+#define CFG_8xx_CPUCLK_MIN 40000000
+#define CFG_8xx_CPUCLK_MAX 80000000
#define CONFIG_DRAM_50MHZ 1
#define CONFIG_SDRAM_50MHZ 1
diff --git a/include/configs/MPC885ADS.h b/include/configs/MPC885ADS.h
index 74318e5545..1867c5bf0a 100644
--- a/include/configs/MPC885ADS.h
+++ b/include/configs/MPC885ADS.h
@@ -1,44 +1,34 @@
/*
* A collection of structures, addresses, and values associated with
- * the Motorola DUET ADS board. Values common to all FADS family boards
+ * the Motorola MPC885ADS board. Values common to all FADS family boards
* are in board/fads/fads.h
*
- * Copyright (C) 2003 Arabella Software Ltd.
+ * Copyright (C) 2003-2004 Arabella Software Ltd.
* Yuli Barcohen <yuli@arabellasw.com>
*/
#ifndef __CONFIG_H
#define __CONFIG_H
-/* Board type */
-#define CONFIG_MPC885ADS 1 /* Duet (MPC87x/88x) ADS */
+#define CONFIG_MPC885ADS 1 /* MPC885ADS board */
#define CONFIG_FADS 1 /* We are FADS compatible (more or less) */
-#define CONFIG_MPC885 1 /* MPC885 CPU (Duet family) */
+#define CONFIG_MPC885 1 /* MPC885 CPU (Duet family) */
-#define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */
+#define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */
#undef CONFIG_8xx_CONS_SMC2
#undef CONFIG_8xx_CONS_NONE
#define CONFIG_BAUDRATE 38400
-#define CONFIG_8xx_OSCLK 10000000 /* 10 MHz oscillator on EXTCLK */
-
-#define CFG_PLPRCR ((1 << PLPRCR_MFD_SHIFT) | (12 << PLPRCR_MFI_SHIFT) | PLPRCR_TEXPS)
+#define CONFIG_8xx_OSCLK 10000000 /* 10 MHz oscillator on EXTCLK */
+#define CONFIG_8xx_CPUCLK_DEFAULT 50000000
+#define CFG_8xx_CPUCLK_MIN 40000000
+#define CFG_8xx_CPUCLK_MAX 133000000
#define CONFIG_SDRAM_50MHZ 1
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL \
- | CFG_CMD_DHCP \
- | CFG_CMD_IMMAP \
- | CFG_CMD_MII \
- | CFG_CMD_PING \
- )
-
#include "fads.h"
-#undef CFG_SCCR
-#define CFG_SCCR (SCCR_TBS|SCCR_EBDF11)
-
#define CFG_OR5_PRELIM 0xFFFF8110 /* 64Kbyte address space */
#define CFG_BR5_PRELIM (CFG_PHYDEV_ADDR | BR_PS_8 | BR_V)
diff --git a/include/configs/NC650.h b/include/configs/NC650.h
index 371ea17edd..8da29c4afc 100644
--- a/include/configs/NC650.h
+++ b/include/configs/NC650.h
@@ -1,4 +1,5 @@
/*
+ * (C) Copyright 2006 Detlev Zundel, dzu@denx.de
* (C) Copyright 2005
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
@@ -65,6 +66,11 @@
#define CFG_8XX_XIN CONFIG_8xx_OSCLK
#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
+#define CONFIG_AUTOBOOT_KEYED
+#define CONFIG_AUTOBOOT_PROMPT "\nEnter password - autoboot in %d seconds...\n"
+#define CONFIG_AUTOBOOT_DELAY_STR "ids"
+#define CONFIG_BOOT_RETRY_TIME 900
+#define CONFIG_BOOT_RETRY_MIN 30
#define CONFIG_PREBOOT "echo;echo Type \"run flash_nfs\" to mount root filesystem over NFS;echo"
@@ -75,7 +81,7 @@
"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off;" \
"bootm"
-#undef CONFIG_WATCHDOG /* watchdog disabled */
+#define CONFIG_WATCHDOG /* watchdog enabled */
#undef CONFIG_STATUS_LED /* Status LED disabled */
@@ -96,12 +102,26 @@
/*
* Software (bit-bang) I2C driver configuration
*/
+#if defined(CONFIG_IDS852_REV1)
+
#define SCL 0x1000 /* PA 3 */
#define SDA 0x2000 /* PA 2 */
#define __I2C_DIR immr->im_ioport.iop_padir
#define __I2C_DAT immr->im_ioport.iop_padat
#define __I2C_PAR immr->im_ioport.iop_papar
+
+#elif defined(CONFIG_IDS852_REV2)
+
+#define SCL 0x0002 /* PB 30 */
+#define SDA 0x0001 /* PB 31 */
+
+#define __I2C_PAR immr->im_cpm.cp_pbpar
+#define __I2C_DIR immr->im_cpm.cp_pbdir
+#define __I2C_DAT immr->im_cpm.cp_pbdat
+
+#endif
+
#define I2C_INIT { __I2C_PAR &= ~(SDA|SCL); \
__I2C_DIR |= (SDA|SCL); }
#define I2C_READ ((__I2C_DAT & SDA) ? 1 : 0)
@@ -217,6 +237,8 @@
/*
* NAND flash support
*/
+#define CFG_NAND_LEGACY
+
#define CFG_MAX_NAND_DEVICE 1
#define NAND_ChipID_UNKNOWN 0x00
#define SECTORSIZE 512
@@ -227,17 +249,6 @@
#define ADDR_COLUMN 1
#define NAND_NO_RB
-#define NAND_WAIT_READY(nand) udelay(12)
-#define WRITE_NAND_COMMAND(d, adr) WRITE_NAND(d, adr + 2)
-#define WRITE_NAND_ADDRESS(d, adr) WRITE_NAND(d, adr + 1)
-#define WRITE_NAND(d, adr) (*(volatile uint8_t *)(adr) = (uint8_t)(d))
-#define READ_NAND(adr) (*(volatile uint8_t *)(adr))
-#define NAND_DISABLE_CE(nand) /* nop */
-#define NAND_ENABLE_CE(nand) /* nop */
-#define NAND_CTL_CLRALE(nandptr) /* nop */
-#define NAND_CTL_SETALE(nandptr) /* nop */
-#define NAND_CTL_CLRCLE(nandptr) /* nop */
-#define NAND_CTL_SETCLE(nandptr) /* nop */
/*-----------------------------------------------------------------------
* SYPCR - System Protection Control 11-9
@@ -310,7 +321,8 @@
#define CFG_BR0_PRELIM ((FLASH_BASE0_PRELIM & BR_BA_MSK) | BR_PS_8 | BR_V)
/*
- * BR2 and OR2 (NAND Flash) - now addressed through UPMB
+ * BR2 and OR2 (NAND Flash) - addressed through UPMB on rev 1
+ * rev2 only uses the chipselect
*/
#define CFG_NAND_BASE 0x50000000
#define CFG_NAND_SIZE 0x04000000
@@ -336,6 +348,18 @@
#define CFG_BR3_PRELIM ((SDRAM_BASE3_PRELIM & BR_BA_MSK) | BR_MS_UPMA | BR_V)
/*
+ * BR4 and OR4 (CPLD)
+ */
+#define CFG_CPLD_BASE 0x80000000 /* CPLD */
+#define CFG_CPLD_SIZE 0x10000 /* only 16 used */
+
+#define CFG_OR_TIMING_CPLD (OR_CSNT_SAM | OR_ACS_DIV1 | OR_BI | \
+ OR_SCY_1_CLK)
+
+#define CFG_BR4_PRELIM ((CFG_CPLD_BASE & BR_BA_MSK) | BR_PS_8 | BR_V )
+#define CFG_OR4_PRELIM (((-CFG_CPLD_SIZE) & OR_AM_MSK) | CFG_OR_TIMING_CPLD)
+
+/*
* BR5 and OR5 (SRAM)
*/
#define CFG_SRAM_BASE 0x60000000
@@ -347,6 +371,16 @@
#define CFG_BR5_PRELIM ((CFG_SRAM_BASE & BR_BA_MSK) | BR_PS_8 | BR_V )
#define CFG_OR5_PRELIM (((-CFG_SRAM_SIZE) & OR_AM_MSK) | CFG_OR_TIMING_SRAM)
+#if defined(CONFIG_CP850)
+/*
+ * BR6 and OR6 (DPRAM) - only on CP850
+ */
+#define CFG_OR6_PRELIM 0xffff8170
+#define CFG_BR6_PRELIM 0xa0000401
+#define DPRAM_BASE_ADDR 0xa0000000
+
+#define CONFIG_MISC_INIT_R 1
+#endif
/*
* 4096 Rows from SDRAM example configuration
@@ -411,14 +445,12 @@
#define CONFIG_JFFS2_PART_OFFSET 0x00000000
/* mtdparts command line support */
-/*
#define CONFIG_JFFS2_CMDLINE
#define MTDIDS_DEFAULT "nor0=nc650-0,nand0=nc650-nand"
#define MTDPARTS_DEFAULT "mtdparts=nc650-0:1m(kernel1),1m(kernel2)," \
- "2560k(cramfs1),2560k(cramfs2)," \
- "256k(u-boot),256k(env);" \
- "nc650-nand:4m(nand1),28m(nand2)"
-*/
+ "4m(cramfs1),1m(cramfs2)," \
+ "256k(u-boot),128k(env);" \
+ "nc650-nand:4m(jffs1),28m(jffs2)"
#endif /* __CONFIG_H */
diff --git a/include/configs/NETPHONE.h b/include/configs/NETPHONE.h
index bf4c899592..444f721cc8 100644
--- a/include/configs/NETPHONE.h
+++ b/include/configs/NETPHONE.h
@@ -491,6 +491,7 @@
/****************************************************************/
/* NAND */
+#define CFG_NAND_LEGACY
#define CFG_NAND_BASE NAND_BASE
#define CONFIG_MTD_NAND_ECC_JFFS2
#define CONFIG_MTD_NAND_VERIFY_WRITE
diff --git a/include/configs/NETTA.h b/include/configs/NETTA.h
index 1bcd88d208..25b63457c7 100644
--- a/include/configs/NETTA.h
+++ b/include/configs/NETTA.h
@@ -609,6 +609,7 @@
/****************************************************************/
/* NAND */
+#define CFG_NAND_LEGACY
#define CFG_NAND_BASE NAND_BASE
#define CONFIG_MTD_NAND_VERIFY_WRITE
#define CONFIG_MTD_NAND_UNSAFE
diff --git a/include/configs/NETTA2.h b/include/configs/NETTA2.h
index 529cb4cbae..e20e72495c 100644
--- a/include/configs/NETTA2.h
+++ b/include/configs/NETTA2.h
@@ -491,6 +491,7 @@
/****************************************************************/
/* NAND */
+#define CFG_NAND_LEGACY
#define CFG_NAND_BASE NAND_BASE
#define CONFIG_MTD_NAND_ECC_JFFS2
#define CONFIG_MTD_NAND_VERIFY_WRITE
diff --git a/include/configs/NETVIA.h b/include/configs/NETVIA.h
index dc6b15fcdc..e30be0987a 100644
--- a/include/configs/NETVIA.h
+++ b/include/configs/NETVIA.h
@@ -387,6 +387,8 @@
/*****************************************************************************/
+#define CFG_NAND_LEGACY
+
#if defined(CONFIG_NETVIA_VERSION) && CONFIG_NETVIA_VERSION >= 2
/* NAND */
diff --git a/include/configs/PCIPPC2.h b/include/configs/PCIPPC2.h
index d03706e193..3a97fbcbde 100644
--- a/include/configs/PCIPPC2.h
+++ b/include/configs/PCIPPC2.h
@@ -77,6 +77,7 @@
*/
#include <cmd_confdefs.h>
+#define CFG_NAND_LEGACY
/*
* Miscellaneous configurable options
diff --git a/include/configs/PCIPPC6.h b/include/configs/PCIPPC6.h
index 92b2f7cf83..130beb78e6 100644
--- a/include/configs/PCIPPC6.h
+++ b/include/configs/PCIPPC6.h
@@ -79,6 +79,7 @@
*/
#include <cmd_confdefs.h>
+#define CFG_NAND_LEGACY
/*
* Miscellaneous configurable options
diff --git a/include/configs/PIP405.h b/include/configs/PIP405.h
index 9668fb0ce2..806e95f480 100644
--- a/include/configs/PIP405.h
+++ b/include/configs/PIP405.h
@@ -50,7 +50,6 @@
CFG_CMD_PCI | \
CFG_CMD_CACHE | \
CFG_CMD_IRQ | \
- CFG_CMD_ECHO | \
CFG_CMD_EEPROM | \
CFG_CMD_I2C | \
CFG_CMD_REGINFO | \
@@ -69,6 +68,8 @@
/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
#include <cmd_confdefs.h>
+#define CFG_NAND_LEGACY
+
#define CFG_HUSH_PARSER
#define CFG_PROMPT_HUSH_PS2 "> "
/**************************************************************
diff --git a/include/configs/PK1C20.h b/include/configs/PK1C20.h
index 91e95186a2..83a7ec27b4 100644
--- a/include/configs/PK1C20.h
+++ b/include/configs/PK1C20.h
@@ -32,7 +32,7 @@
#define CFG_RESET_ADDR 0x00000000 /* Hard-reset address */
#define CFG_EXCEPTION_ADDR 0x01000020 /* Exception entry point*/
-#define CFG_NIOS_SYSID_BASE 0x00920828 /* System id address */
+#define CFG_NIOS_SYSID_BASE 0x021208b8 /* System id address */
#define CONFIG_BOARD_EARLY_INIT_F 1 /* enable early board-spec. init*/
/*------------------------------------------------------------------------
@@ -51,7 +51,7 @@
#define CFG_FLASH_SIZE 0x00800000 /* 8 MByte */
#define CFG_SDRAM_BASE 0x01000000 /* SDRAM base addr */
#define CFG_SDRAM_SIZE 0x01000000 /* 16 MByte */
-#define CFG_SRAM_BASE 0x00800000 /* SRAM base addr */
+#define CFG_SRAM_BASE 0x02000000 /* SRAM base addr */
#define CFG_SRAM_SIZE 0x00100000 /* 1 MB (only 1M mapped)*/
/*------------------------------------------------------------------------
@@ -61,7 +61,7 @@
* -Global data is placed below the heap.
* -The stack is placed below global data (&grows down).
*----------------------------------------------------------------------*/
-#define CFG_MONITOR_LEN (128 * 1024) /* Reserve 128k */
+#define CFG_MONITOR_LEN (256 * 1024) /* Reserve 128k */
#define CFG_GBL_DATA_SIZE 128 /* Global data size rsvd*/
#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
@@ -95,9 +95,9 @@
* CONSOLE
*----------------------------------------------------------------------*/
#if defined(CONFIG_CONSOLE_JTAG)
-#define CFG_NIOS_CONSOLE 0x00920820 /* JTAG UART base addr */
+#define CFG_NIOS_CONSOLE 0x021208b0 /* JTAG UART base addr */
#else
-#define CFG_NIOS_CONSOLE 0x009208a0 /* UART base addr */
+#define CFG_NIOS_CONSOLE 0x02120840 /* UART base addr */
#endif
#define CFG_NIOS_FIXEDBAUD 1 /* Baudrate is fixed */
@@ -110,9 +110,9 @@
* EPCS Device -- wne CFG_NIOS_EPCSBASE is defined code/commands for
* epcs device access is enabled. The base address is the epcs
* _register_ base address, NOT THE ADDRESS OF THE MEMORY BLOCK.
- * The register base is currently at offset 0x400 from the memory base.
+ * The register base is currently at offset 0x600 from the memory base.
*----------------------------------------------------------------------*/
-#define CFG_NIOS_EPCSBASE 0x00900400 /* EPCS register base */
+#define CFG_NIOS_EPCSBASE 0x02100200 /* EPCS register base */
/*------------------------------------------------------------------------
* DEBUG
@@ -126,7 +126,7 @@
* registers, we can slow it down to 10 msec using TMRCNT. If the default
* period is acceptable, TMRCNT can be left undefined.
*----------------------------------------------------------------------*/
-#define CFG_NIOS_TMRBASE 0x00920860 /* Tick timer base addr */
+#define CFG_NIOS_TMRBASE 0x02120820 /* Tick timer base addr */
#define CFG_NIOS_TMRIRQ 3 /* Timer IRQ num */
#define CFG_NIOS_TMRMS 10 /* 10 msec per tick */
#define CFG_NIOS_TMRCNT (CFG_NIOS_TMRMS * (CONFIG_SYS_CLK_FREQ/1000))
@@ -137,7 +137,7 @@
* must implement its own led routines -- leds are, after all,
* board-specific, no?
*----------------------------------------------------------------------*/
-#define CFG_LEDPIO_ADDR 0x00920840 /* LED PIO base addr */
+#define CFG_LEDPIO_ADDR 0x02120870 /* LED PIO base addr */
#define CONFIG_STATUS_LED /* Enable status driver */
#define STATUS_LED_BIT 1 /* Bit-0 on PIO */
@@ -150,7 +150,7 @@
* way out to avoid changes there -- define the base address to ensure
* cache bypass so there's no need to monkey with inx/outx macros.
*----------------------------------------------------------------------*/
-#define CONFIG_SMC91111_BASE 0x80910300 /* Base addr (bypass) */
+#define CONFIG_SMC91111_BASE 0x82110300 /* Base addr (bypass) */
#define CONFIG_DRIVER_SMC91111 /* Using SMC91c111 */
#undef CONFIG_SMC91111_EXT_PHY /* Internal PHY */
#define CONFIG_SMC_USE_32_BIT /* 32-bit interface */
diff --git a/include/configs/PLU405.h b/include/configs/PLU405.h
index 54ecfa4c5e..dd5d831680 100644
--- a/include/configs/PLU405.h
+++ b/include/configs/PLU405.h
@@ -160,6 +160,8 @@
* NAND-FLASH stuff
*-----------------------------------------------------------------------
*/
+#define CFG_NAND_LEGACY
+
#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
#define SECTORSIZE 512
diff --git a/include/configs/PM520.h b/include/configs/PM520.h
index 9f1dec82b8..9c241e67e7 100644
--- a/include/configs/PM520.h
+++ b/include/configs/PM520.h
@@ -101,6 +101,8 @@
#define ADD_DOC_CMD 0
#else
#define ADD_DOC_CMD CFG_CMD_DOC
+/* DoC requires legacy NAND for now */
+#define CFG_NAND_LEGACY
#endif
/*
@@ -200,12 +202,13 @@
* Flash configuration (8,16 or 32 MB)
* TEXT base always at 0xFFF00000
* ENV_ADDR always at 0xFFF40000
- * FLASH_BASE at 0xFC000000 for 32 MB
+ * FLASH_BASE at 0xFA000000 for 64 MB
+ * 0xFC000000 for 32 MB
* 0xFD000000 for 16 MB
* 0xFD800000 for 8 MB
*/
-#define CFG_FLASH_BASE 0xfc000000
-#define CFG_FLASH_SIZE 0x02000000
+#define CFG_FLASH_BASE 0xFA000000
+#define CFG_FLASH_SIZE 0x04000000
#define CFG_BOOTROM_BASE 0xFFF00000
#define CFG_BOOTROM_SIZE 0x00080000
#define CFG_ENV_ADDR (0xFDF00000 + 0x40000)
@@ -214,17 +217,18 @@
* Flash configuration (8,16 or 32 MB)
* TEXT base always at 0xFFF00000
* ENV_ADDR always at 0xFFF40000
- * FLASH_BASE at 0xFE000000 for 32 MB
+ * FLASH_BASE at 0xFC000000 for 64 MB
+ * 0xFE000000 for 32 MB
* 0xFF000000 for 16 MB
* 0xFF800000 for 8 MB
*/
-#define CFG_FLASH_BASE 0xfe000000
-#define CFG_FLASH_SIZE 0x02000000
+#define CFG_FLASH_BASE 0xFC000000
+#define CFG_FLASH_SIZE 0x04000000
#define CFG_ENV_ADDR (0xFFF00000 + 0x40000)
#endif
#define CFG_MAX_FLASH_BANKS 1 /* max num of memory banks */
-#define CFG_MAX_FLASH_SECT 128 /* max num of sects on one chip */
+#define CFG_MAX_FLASH_SECT 256 /* max num of sects on one chip */
#define CFG_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
#define CFG_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
@@ -325,11 +329,11 @@
#define CFG_CS0_SIZE CFG_BOOTROM_SIZE
#define CFG_CS1_START CFG_FLASH_BASE
#define CFG_CS1_SIZE CFG_FLASH_SIZE
-#define CFG_CS1_CFG 0x0004fb00
+#define CFG_CS1_CFG 0x0004FF00
#else
#define CFG_BOOTCS_START CFG_FLASH_BASE
#define CFG_BOOTCS_SIZE CFG_FLASH_SIZE
-#define CFG_BOOTCS_CFG 0x0004fb00
+#define CFG_BOOTCS_CFG 0x0004FF00
#define CFG_CS0_START CFG_FLASH_BASE
#define CFG_CS0_SIZE CFG_FLASH_SIZE
#define CFG_CS1_START CFG_DOC_BASE
diff --git a/include/configs/PM826.h b/include/configs/PM826.h
index 6e5e3bbe18..88fdb51ade 100644
--- a/include/configs/PM826.h
+++ b/include/configs/PM826.h
@@ -180,6 +180,8 @@
/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
#include <cmd_confdefs.h>
+#define CFG_NAND_LEGACY
+
/*
* Disk-On-Chip configuration
*/
diff --git a/include/configs/PM828.h b/include/configs/PM828.h
index 982a1f8143..37ee9771b5 100644
--- a/include/configs/PM828.h
+++ b/include/configs/PM828.h
@@ -183,6 +183,7 @@
/*
* Disk-On-Chip configuration
*/
+#define CFG_NAND_LEGACY
#define CFG_DOC_SHORT_TIMEOUT
#define CFG_MAX_DOC_DEVICE 1 /* Max number of DOC devices */
diff --git a/include/configs/PMC405.h b/include/configs/PMC405.h
index 8bcab0b0f3..6e0bd7f23e 100644
--- a/include/configs/PMC405.h
+++ b/include/configs/PMC405.h
@@ -53,9 +53,15 @@
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
+#define CONFIG_NET_MULTI 1
+#undef CONFIG_HAS_ETH1
+
#define CONFIG_MII 1 /* MII PHY management */
#define CONFIG_PHY_ADDR 0 /* PHY address */
#define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */
+#define CONFIG_RESET_PHY_R 1 /* use reset_phy() to disable phy sleep mode */
+
+#define CONFIG_NETCONSOLE /* include NetConsole support */
#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
CFG_CMD_BSP | \
@@ -154,15 +160,24 @@
#define CONFIG_PCI_BOOTDELAY 0 /* enable pci bootdelay variable*/
#define CFG_PCI_SUBSYS_VENDORID 0x12FE /* PCI Vendor ID: esd gmbh */
-#define CFG_PCI_SUBSYS_DEVICEID 0x0408 /* PCI Device ID: PMC-405 */
+#define CFG_PCI_SUBSYS_DEVICEID_NONMONARCH 0x0408 /* PCI Device ID: Non-Monarch */
+#define CFG_PCI_SUBSYS_DEVICEID_MONARCH 0x0409 /* PCI Device ID: Monarch */
+#define CFG_PCI_SUBSYS_DEVICEID pmc405_pci_subsys_deviceid()
+
#define CFG_PCI_CLASSCODE 0x0b20 /* PCI Class Code: Processor/PPC*/
-#define CFG_PCI_PTM1LA 0x00000000 /* point to sdram */
-#define CFG_PCI_PTM1MS 0xfc000001 /* 64MB, enable hard-wired to 1 */
+
+#define CFG_PCI_PTM1LA (bd->bi_memstart) /* point to sdram */
+#define CFG_PCI_PTM1MS (~(bd->bi_memsize - 1) | 1) /* memsize, enable hard-wired to 1 */
#define CFG_PCI_PTM1PCI 0x00000000 /* Host: use this pci address */
+#if 1
+#define CFG_PCI_PTM2LA 0xef000000 /* point to internal regs */
+#define CFG_PCI_PTM2MS 0xff000001 /* 16MB, enable */
+#define CFG_PCI_PTM2PCI 0x00000000 /* Host: use this pci address */
+#else /* old mapping */
#define CFG_PCI_PTM2LA 0xffc00000 /* point to flash */
#define CFG_PCI_PTM2MS 0xffc00001 /* 4MB, enable */
#define CFG_PCI_PTM2PCI 0x04000000 /* Host: use this pci address */
-
+#endif
/*-----------------------------------------------------------------------
* Start addresses for the final memory configuration
* (Set up by the startup code)
@@ -259,7 +274,7 @@
#define FLASH1_BA 0xFE000000 /* FLASH 1 Base Address */
#define CAN_BA 0xF0000000 /* CAN Base Address */
#define RTC_BA 0xF0000500 /* RTC Base Address */
-#define CF_BA 0xF0100000 /* CompactFlash Base Address */
+#define NVRAM_BA 0xF0200000 /* NVRAM Base Address */
/* Memory Bank 0 (Flash Bank 0) initialization */
#define CFG_EBC_PB0AP 0x92015480
@@ -273,9 +288,11 @@
#define CFG_EBC_PB2AP 0x03000440 /* TWT=5,TH=2,CSN=0,OEN=0,WBN=0,WBF=0 */
#define CFG_EBC_PB2CR CAN_BA | 0x18000 /* BAS=0xF00,BS=1MB,BU=R/W,BW=8bit */
-/* Memory Bank 3 (CompactFlash IDE, FPGA internal) initialization */
-#define CFG_EBC_PB3AP 0x010059C0 /* BWT=2,WBN=1,WBF=1,TH=1,RE=1,SOR=1,BEM=1 */
-#define CFG_EBC_PB3CR CF_BA | 0x1A000 /* BAS=0xF01,BS=1MB,BU=R/W,BW=16bit */
+/* Memory Bank 3 -> unused */
+
+/* Memory Bank 4 (NVRAM) initialization */
+#define CFG_EBC_PB4AP 0x03000440 /* TWT=5,TH=2,CSN=0,OEN=0,WBN=0,WBF=0 */
+#define CFG_EBC_PB4CR NVRAM_BA | 0x18000 /* BAS=0xF00,BS=1MB,BU=R/W,BW=8bit */
/*-----------------------------------------------------------------------
* FPGA stuff
@@ -293,6 +310,15 @@
#define CFG_VXWORKS_MAC_PTR 0x00000000 /* Pass Ethernet MAC to VxWorks */
/*-----------------------------------------------------------------------
+ * GPIOs
+ */
+#define CFG_NONMONARCH (0x80000000 >> 14) /* GPIO24 */
+#define CFG_XEREADY (0x80000000 >> 15) /* GPIO15 */
+#define CFG_INTA_FAKE (0x80000000 >> 19) /* GPIO19 */
+#define CFG_SELF_RST (0x80000000 >> 21) /* GPIO21 */
+#define CFG_REV1_2 (0x80000000 >> 23) /* GPIO23 */
+
+/*-----------------------------------------------------------------------
* Definitions for initial stack pointer and data area (in data cache)
*/
diff --git a/include/configs/PPChameleonEVB.h b/include/configs/PPChameleonEVB.h
index 7ca827fa4b..16e2cc6d64 100644
--- a/include/configs/PPChameleonEVB.h
+++ b/include/configs/PPChameleonEVB.h
@@ -139,8 +139,18 @@
#define CFG_I2C_RTC_ADDR 0x68
#define CFG_M41T11_BASE_YEAR 1900
+/*
+ * SDRAM configuration (please see cpu/ppc/sdram.[ch])
+ */
#define CONFIG_SDRAM_BANK0 1 /* init onboard SDRAM bank 0 */
+/* SDRAM timings used in datasheet */
+#define CFG_SDRAM_CL 2
+#define CFG_SDRAM_tRP 20
+#define CFG_SDRAM_tRC 65
+#define CFG_SDRAM_tRCD 20
+#undef CFG_SDRAM_tRFC
+
/*
* Miscellaneous configurable options
*/
@@ -188,34 +198,34 @@
* NAND-FLASH stuff
*-----------------------------------------------------------------------
*/
+/*
+ * nand device 1 on dave (PPChameleonEVB) needs more time,
+ * so we just introduce additional wait in nand_wait(),
+ * effectively for both devices.
+ */
+#define PPCHAMELON_NAND_TIMER_HACK
+
#define CFG_NAND0_BASE 0xFF400000
#define CFG_NAND1_BASE 0xFF000000
+#define CFG_NAND_BASE_LIST { CFG_NAND0_BASE, CFG_NAND1_BASE }
+#define NAND_BIG_DELAY_US 25
+#define CFG_MAX_NAND_DEVICE 2 /* Max number of NAND devices */
-#define CFG_MAX_NAND_DEVICE 2 /* Max number of NAND devices */
-#define SECTORSIZE 512
-#define NAND_NO_RB
-
-#define ADDR_COLUMN 1
-#define ADDR_PAGE 2
-#define ADDR_COLUMN_PAGE 3
-
-#define NAND_ChipID_UNKNOWN 0x00
-#define NAND_MAX_FLOORS 1
#define NAND_MAX_CHIPS 1
#define CFG_NAND0_CE (0x80000000 >> 1) /* our CE is GPIO1 */
+#define CFG_NAND0_RDY (0x80000000 >> 4) /* our RDY is GPIO4 */
#define CFG_NAND0_CLE (0x80000000 >> 2) /* our CLE is GPIO2 */
#define CFG_NAND0_ALE (0x80000000 >> 3) /* our ALE is GPIO3 */
-#define CFG_NAND0_RDY (0x80000000 >> 4) /* our RDY is GPIO4 */
#define CFG_NAND1_CE (0x80000000 >> 14) /* our CE is GPIO14 */
+#define CFG_NAND1_RDY (0x80000000 >> 31) /* our RDY is GPIO31 */
#define CFG_NAND1_CLE (0x80000000 >> 15) /* our CLE is GPIO15 */
#define CFG_NAND1_ALE (0x80000000 >> 16) /* our ALE is GPIO16 */
-#define CFG_NAND1_RDY (0x80000000 >> 31) /* our RDY is GPIO31 */
-#define NAND_DISABLE_CE(nand) do \
+#define MACRO_NAND_DISABLE_CE(nandptr) do \
{ \
- switch((unsigned long)(((struct nand_chip *)nand)->IO_ADDR)) \
+ switch((unsigned long)nandptr) \
{ \
case CFG_NAND0_BASE: \
out32(GPIO0_OR, in32(GPIO0_OR) | CFG_NAND0_CE); \
@@ -226,9 +236,9 @@
} \
} while(0)
-#define NAND_ENABLE_CE(nand) do \
+#define MACRO_NAND_ENABLE_CE(nandptr) do \
{ \
- switch((unsigned long)(((struct nand_chip *)nand)->IO_ADDR)) \
+ switch((unsigned long)nandptr) \
{ \
case CFG_NAND0_BASE: \
out32(GPIO0_OR, in32(GPIO0_OR) & ~CFG_NAND0_CE); \
@@ -239,7 +249,7 @@
} \
} while(0)
-#define NAND_CTL_CLRALE(nandptr) do \
+#define MACRO_NAND_CTL_CLRALE(nandptr) do \
{ \
switch((unsigned long)nandptr) \
{ \
@@ -252,7 +262,7 @@
} \
} while(0)
-#define NAND_CTL_SETALE(nandptr) do \
+#define MACRO_NAND_CTL_SETALE(nandptr) do \
{ \
switch((unsigned long)nandptr) \
{ \
@@ -265,7 +275,7 @@
} \
} while(0)
-#define NAND_CTL_CLRCLE(nandptr) do \
+#define MACRO_NAND_CTL_CLRCLE(nandptr) do \
{ \
switch((unsigned long)nandptr) \
{ \
@@ -278,7 +288,7 @@
} \
} while(0)
-#define NAND_CTL_SETCLE(nandptr) do { \
+#define MACRO_NAND_CTL_SETCLE(nandptr) do { \
switch((unsigned long)nandptr) { \
case CFG_NAND0_BASE: \
out32(GPIO0_OR, in32(GPIO0_OR) | CFG_NAND0_CLE); \
@@ -289,6 +299,17 @@
} \
} while(0)
+#if 0
+#define SECTORSIZE 512
+#define NAND_NO_RB
+
+#define ADDR_COLUMN 1
+#define ADDR_PAGE 2
+#define ADDR_COLUMN_PAGE 3
+
+#define NAND_ChipID_UNKNOWN 0x00
+#define NAND_MAX_FLOORS 1
+
#ifdef NAND_NO_RB
/* constant delay (see also tR in the datasheet) */
#define NAND_WAIT_READY(nand) do { \
@@ -303,7 +324,7 @@
#define WRITE_NAND_ADDRESS(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)(d); } while(0)
#define WRITE_NAND(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)d; } while(0)
#define READ_NAND(adr) ((volatile unsigned char)(*(volatile __u8 *)(unsigned long)adr))
-
+#endif
/*-----------------------------------------------------------------------
* PCI stuff
*-----------------------------------------------------------------------
@@ -338,16 +359,16 @@
#define CFG_SDRAM_BASE 0x00000000
/* Reserve 256 kB for Monitor */
+/*
#define CFG_FLASH_BASE 0xFFFC0000
#define CFG_MONITOR_BASE CFG_FLASH_BASE
#define CFG_MONITOR_LEN (256 * 1024)
+*/
/* Reserve 320 kB for Monitor */
-/*
#define CFG_FLASH_BASE 0xFFFB0000
#define CFG_MONITOR_BASE CFG_FLASH_BASE
#define CFG_MONITOR_LEN (320 * 1024)
-*/
#define CFG_MALLOC_LEN (256 * 1024) /* Reserve 256 kB for malloc() */
diff --git a/include/configs/RPXlite.h b/include/configs/RPXlite.h
index 6b65031099..48ada0ed9b 100644
--- a/include/configs/RPXlite.h
+++ b/include/configs/RPXlite.h
@@ -21,10 +21,6 @@
* MA 02111-1307 USA
*/
-/*
- * board/config.h - configuration options, board specific
- */
-
/* Yoo. Jonghoon, IPone, yooth@ipone.co.kr
* U-Boot port on RPXlite board
*/
@@ -53,8 +49,6 @@
#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
#endif
-#define CONFIG_CLOCKS_IN_MHZ 1 /* clocks passsed to Linux in MHz */
-
#undef CONFIG_BOOTARGS
#define CONFIG_BOOTCOMMAND \
"bootp; " \
@@ -65,6 +59,7 @@
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#undef CFG_LOADS_BAUD_CHANGE /* don't allow baudrate change */
+#define CONFIG_BZIP2 /* Include support for bzip2 compressed images */
#undef CONFIG_WATCHDOG /* watchdog disabled */
#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
@@ -86,12 +81,14 @@
#define CFG_MAXARGS 16 /* max number of command args */
#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
-#define CFG_MEMTEST_START 0x0040000 /* memtest works on */
-#define CFG_MEMTEST_END 0x00C0000 /* 4 ... 12 MB in DRAM */
+#define CFG_MEMTEST_START 0x00400000 /* memtest works on */
+#define CFG_MEMTEST_END 0x00C00000 /* 4 ... 12 MB in DRAM */
-#define CFG_LOAD_ADDR 0x100000 /* default load address */
+#define CFG_RESET_ADDRESS 0x09900000
-#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
+#define CFG_LOAD_ADDR 0x400000 /* default load address */
+
+#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
@@ -120,16 +117,14 @@
* Please note that CFG_SDRAM_BASE _must_ start at 0
*/
#define CFG_SDRAM_BASE 0x00000000
-#define CFG_FLASH_BASE 0xFFC00000
-/*%%% #define CFG_FLASH_BASE 0xFFF00000 */
-#if defined(DEBUG) || (CONFIG_COMMANDS & CFG_CMD_IDE)
+#define CFG_FLASH_BASE 0xFFC00000
+#define CFG_MONITOR_BASE TEXT_BASE
#define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
+#ifdef CONFIG_BZIP2
+#define CFG_MALLOC_LEN (4096 << 10) /* Reserve ~4 MB for malloc() */
#else
-#define CFG_MONITOR_LEN (128 << 10) /* Reserve 128 kB for Monitor */
-#endif
-#define CFG_MONITOR_BASE 0xFFF00000
-/*%%% #define CFG_MONITOR_BASE CFG_FLASH_BASE */
-#define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
+#define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 KB for malloc() */
+#endif /* CONFIG_BZIP2 */
/*
* For booting Linux, the board info and command line data
@@ -147,9 +142,13 @@
#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
+#define CFG_DIRECT_FLASH_TFTP
+
#define CFG_ENV_IS_IN_FLASH 1
-#define CFG_ENV_OFFSET 0x8000 /* Offset of Environment Sector */
-#define CFG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */
+#define CFG_ENV_SECT_SIZE 0x40000 /* We use one complete sector */
+#define CFG_ENV_ADDR (CFG_MONITOR_BASE + CFG_MONITOR_LEN)
+
+#define CONFIG_ENV_OVERWRITE
/*-----------------------------------------------------------------------
* Cache Configuration
@@ -352,12 +351,12 @@
#define BCSR0_ENMONXCVR 0x01 /* Monitor XVCR Control */
#define BCSR0_ENNVRAM 0x02 /* CS4# Control */
-#define BCSR0_LED5 0x04 /* LED5 control 0='on' 1='off' */
-#define BCSR0_LED4 0x08 /* LED4 control 0='on' 1='off' */
+#define BCSR0_LED5 0x04 /* LED5 control 0='on' 1='off' */
+#define BCSR0_LED4 0x08 /* LED4 control 0='on' 1='off' */
#define BCSR0_FULLDPLX 0x10 /* Ethernet XCVR Control */
#define BCSR0_COLTEST 0x20
#define BCSR0_ETHLPBK 0x40
-#define BCSR0_ETHEN 0x80
+#define BCSR0_ETHEN 0x80
#define BCSR1_PCVCTL7 0x01 /* PC Slot B Control */
#define BCSR1_PCVCTL6 0x02
@@ -371,22 +370,13 @@
#define BCSR2_USBSPD 0x40
#define BCSR2_USBSUSP 0x80
-#define BCSR3_BWRTC 0x01 /* Real Time Clock Battery */
-#define BCSR3_BWNVR 0x02 /* NVRAM Battery */
+#define BCSR3_BWRTC 0x01 /* Real Time Clock Battery */
+#define BCSR3_BWNVR 0x02 /* NVRAM Battery */
#define BCSR3_RDY_BSY 0x04 /* Flash Operation */
-#define BCSR3_RPXL 0x08 /* Reserved (reads back '1') */
-#define BCSR3_D27 0x10 /* Dip Switch settings */
-#define BCSR3_D26 0x20
-#define BCSR3_D25 0x40
-#define BCSR3_D24 0x80
-
-
-/*
- * Environment setting
- */
-
-#define CONFIG_ETHADDR 00:10:EC:00:1D:0B
-#define CONFIG_IPADDR 192.168.1.65
-#define CONFIG_SERVERIP 192.168.1.27
+#define BCSR3_RPXL 0x08 /* Reserved (reads back '1') */
+#define BCSR3_D27 0x10 /* Dip Switch settings */
+#define BCSR3_D26 0x20
+#define BCSR3_D25 0x40
+#define BCSR3_D24 0x80
#endif /* __CONFIG_H */
diff --git a/include/configs/RPXlite_DW.h b/include/configs/RPXlite_DW.h
index 8cd7df1ecf..31025473f4 100644
--- a/include/configs/RPXlite_DW.h
+++ b/include/configs/RPXlite_DW.h
@@ -45,7 +45,7 @@
*/
/* #define DEBUG 1 */
-/* #ifdef DEPLOYMENT 1 */
+/* #define DEPLOYMENT 1 */
#undef CONFIG_MPC860
#define CONFIG_MPC823 1 /* This is a MPC823e CPU. */
@@ -61,23 +61,23 @@
#define CONFIG_BAUDRATE 9600 /* console default baudrate = 9600bps */
#ifdef DEBUG
-#define CONFIG_BOOTDELAY -1 /* autoboot disabled */
+#define CONFIG_BOOTDELAY -1 /* autoboot disabled */
#else
-#define CONFIG_BOOTDELAY 6 /* autoboot after 6 seconds */
+#define CONFIG_BOOTDELAY 6 /* autoboot after 6 seconds */
#ifdef DEPLOYMENT
-#define CONFIG_BOOT_RETRY_TIME -1
+#define CONFIG_BOOT_RETRY_TIME -1
#define CONFIG_AUTOBOOT_KEYED
-#define CONFIG_AUTOBOOT_PROMPT "autoboot in %d seconds (stop with 'st')...\n"
-#define CONFIG_AUTOBOOT_STOP_STR "st"
+#define CONFIG_AUTOBOOT_PROMPT "autoboot in %d seconds (stop with 'st')...\n"
+#define CONFIG_AUTOBOOT_STOP_STR "st"
#define CONFIG_ZERO_BOOTDELAY_CHECK
-#define CONFIG_RESET_TO_RETRY 1
-#define CONFIG_BOOT_RETRY_MIN 1
+#define CONFIG_RESET_TO_RETRY 1
+#define CONFIG_BOOT_RETRY_MIN 1
#endif /* DEPLOYMENT */
#endif /* DEBUG */
/* pre-boot commands */
-#define CONFIG_PREBOOT "setenv stdout serial;setenv stdin serial"
+#define CONFIG_PREBOOT "setenv stdout serial;setenv stdin serial"
#undef CONFIG_BOOTARGS
#define CONFIG_EXTRA_ENV_SETTINGS \
@@ -117,6 +117,36 @@
#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
+#if 1 /* Enable this stuff could make image enlarge about 25KB. Mask it if you
+ don't want the advanced function */
+
+#ifdef CONFIG_SPLASH_SCREEN
+#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
+ CFG_CMD_ASKENV | \
+ CFG_CMD_BMP | \
+ CFG_CMD_JFFS2 | \
+ CFG_CMD_PING | \
+ CFG_CMD_ELF | \
+ CFG_CMD_REGINFO | \
+ CFG_CMD_DHCP )
+#else
+#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
+ CFG_CMD_ASKENV | \
+ CFG_CMD_JFFS2 | \
+ CFG_CMD_PING | \
+ CFG_CMD_ELF | \
+ CFG_CMD_REGINFO | \
+ CFG_CMD_DHCP )
+#endif /* CONFIG_SPLASH_SCREEN */
+
+/* test-only */
+#define CFG_JFFS2_FIRST_BANK 0 /* use for JFFS2 */
+#define CFG_JFFS2_NUM_BANKS 1 /* ! second bank contains U-Boot */
+
+#define CONFIG_NETCONSOLE
+
+#endif /* 1 */
+
/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
#include <cmd_confdefs.h>
@@ -280,7 +310,7 @@
#if defined(RPXlite_64MHz)
#define CFG_SCCR ( SCCR_TBS | SCCR_EBDF01 ) /* %%%SCCR:0x02020000 */
#else
-#define CFG_SCCR ( SCCR_TBS | SCCR_EBDF00 ) /* %%%SCCR:0x02000000 */
+#define CFG_SCCR ( SCCR_TBS | SCCR_EBDF00 ) /* %%%SCCR:0x02000000 */
#endif
/*-----------------------------------------------------------------------
@@ -446,5 +476,6 @@
#define CONFIG_SERVERIP 172.16.115.6
#define CONFIG_ROOTPATH /workspace/myfilesystem/target/
#define CONFIG_BOOTFILE uImage.rpxusb
+#define CONFIG_HOSTNAME LITE_H1_DW
#endif /* __CONFIG_H */
diff --git a/include/configs/RPXsuper.h b/include/configs/RPXsuper.h
index 6ae9403c46..45907aa0e7 100644
--- a/include/configs/RPXsuper.h
+++ b/include/configs/RPXsuper.h
@@ -154,7 +154,6 @@
#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
CFG_CMD_IMMAP | \
CFG_CMD_ASKENV | \
- CFG_CMD_ECHO | \
CFG_CMD_I2C | \
CFG_CMD_REGINFO & \
~CFG_CMD_KGDB )
diff --git a/include/configs/Rattler.h b/include/configs/Rattler.h
index a170f290e0..dbc57e8b27 100644
--- a/include/configs/Rattler.h
+++ b/include/configs/Rattler.h
@@ -127,7 +127,6 @@
#define CONFIG_COMMANDS (CONFIG_CMD_DFL \
| CFG_CMD_DHCP \
- | CFG_CMD_ECHO \
| CFG_CMD_IMMAP \
| CFG_CMD_JFFS2 \
| CFG_CMD_MII \
diff --git a/include/configs/SXNI855T.h b/include/configs/SXNI855T.h
index c1c765f39d..a8454d99fc 100644
--- a/include/configs/SXNI855T.h
+++ b/include/configs/SXNI855T.h
@@ -183,6 +183,7 @@
*/
/* NAND flash support */
+#define CFG_NAND_LEGACY
#define CONFIG_MTD_NAND_ECC_JFFS2
#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
#define SECTORSIZE 512
diff --git a/include/configs/TB5200.h b/include/configs/TB5200.h
new file mode 100644
index 0000000000..8a6e5a61b7
--- /dev/null
+++ b/include/configs/TB5200.h
@@ -0,0 +1,507 @@
+/*
+ * (C) Copyright 2003-2006
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * (C) Copyright 2004-2006
+ * Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * High Level Configuration Options
+ * (easy to change)
+ */
+
+#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */
+#define CONFIG_MPC5200 1 /* (more precisely an MPC5200 CPU) */
+#define CONFIG_TQM5200 1 /* ... on TQM5200 module */
+#define CONFIG_TB5200 1 /* ... on a TB5200 base board */
+
+#define CFG_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
+
+#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
+#define BOOTFLAG_WARM 0x02 /* Software reboot */
+
+#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
+#endif
+
+/*
+ * Serial console configuration
+ */
+#define CONFIG_PSC_CONSOLE 1 /* default console is on PSC1 */
+#define CONFIG_SERIAL_MULTI 1 /* support multiple consoles */
+#define CONFIG_PSC_CONSOLE2 6 /* second console is on PSC6 */
+#define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
+#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
+
+/*
+ * Video console
+ */
+#if 1
+#define CONFIG_VIDEO
+#define CONFIG_VIDEO_SM501
+#define CONFIG_VIDEO_SM501_32BPP
+#define CONFIG_CFB_CONSOLE
+#define CONFIG_VIDEO_LOGO
+#define CONFIG_VGA_AS_SINGLE_DEVICE
+#define CONFIG_CONSOLE_EXTRA_INFO
+#define CONFIG_VIDEO_SW_CURSOR
+#define CONFIG_SPLASH_SCREEN
+#define CFG_CONSOLE_IS_IN_ENV
+#endif
+
+#ifdef CONFIG_VIDEO
+#define ADD_BMP_CMD CFG_CMD_BMP
+#else
+#define ADD_BMP_CMD 0
+#endif
+
+/* Partitions */
+#define CONFIG_MAC_PARTITION
+#define CONFIG_DOS_PARTITION
+#define CONFIG_ISO_PARTITION
+
+/* USB */
+#define CONFIG_USB_OHCI
+#define ADD_USB_CMD CFG_CMD_USB | CFG_CMD_FAT
+#define CONFIG_USB_STORAGE
+
+/* POST support */
+#define CONFIG_POST (CFG_POST_MEMORY | \
+ CFG_POST_CPU | \
+ CFG_POST_I2C)
+
+#ifdef CONFIG_POST
+#define CFG_CMD_POST_DIAG CFG_CMD_DIAG
+/* preserve space for the post_word at end of on-chip SRAM */
+#define MPC5XXX_SRAM_POST_SIZE MPC5XXX_SRAM_SIZE-4
+#else
+#define CFG_CMD_POST_DIAG 0
+#endif
+
+/* IDE */
+#define ADD_IDE_CMD (CFG_CMD_IDE | CFG_CMD_FAT | CFG_CMD_EXT2)
+
+/*
+ * Supported commands
+ */
+#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
+ ADD_BMP_CMD | \
+ ADD_IDE_CMD | \
+ ADD_PCI_CMD | \
+ ADD_USB_CMD | \
+ CFG_CMD_ASKENV | \
+ CFG_CMD_DATE | \
+ CFG_CMD_DHCP | \
+ CFG_CMD_ECHO | \
+ CFG_CMD_EEPROM | \
+ CFG_CMD_I2C | \
+ CFG_CMD_JFFS2 | \
+ CFG_CMD_MII | \
+ CFG_CMD_NFS | \
+ CFG_CMD_PING | \
+ CFG_CMD_POST_DIAG | \
+ CFG_CMD_REGINFO | \
+ CFG_CMD_SNTP | \
+ CFG_CMD_BSP)
+
+/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
+#include <cmd_confdefs.h>
+
+#define CONFIG_TIMESTAMP /* display image timestamps */
+
+#if (TEXT_BASE == 0xFC000000) /* Boot low */
+# define CFG_LOWBOOT 1
+#endif
+
+/*
+ * Autobooting
+ */
+#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
+
+#define CONFIG_PREBOOT "echo;" \
+ "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
+ "echo"
+
+#undef CONFIG_BOOTARGS
+
+#if defined(CONFIG_TQM5200_B)
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "netdev=eth0\0" \
+ "rootpath=/opt/eldk/ppc_6xx\0" \
+ "ramargs=setenv bootargs root=/dev/ram rw\0" \
+ "nfsargs=setenv bootargs root=/dev/nfs rw " \
+ "nfsroot=${serverip}:${rootpath}\0" \
+ "addip=setenv bootargs ${bootargs} " \
+ "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
+ ":${hostname}:${netdev}:off panic=1\0" \
+ "flash_self=run ramargs addip;" \
+ "bootm ${kernel_addr} ${ramdisk_addr}\0" \
+ "flash_nfs=run nfsargs addip;" \
+ "bootm ${kernel_addr}\0" \
+ "net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0" \
+ "bootfile=/tftpboot/tqm5200/uImage\0" \
+ "load=tftp 200000 ${u-boot}\0" \
+ "u-boot=/tftpboot/tqm5200/u-boot.bin\0" \
+ "update=protect off FC000000 FC07FFFF;" \
+ "erase FC000000 FC07FFFF;" \
+ "cp.b 200000 FC000000 ${filesize};" \
+ "protect on FC000000 FC07FFFF\0" \
+ ""
+#else
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "netdev=eth0\0" \
+ "rootpath=/opt/eldk/ppc_6xx\0" \
+ "ramargs=setenv bootargs root=/dev/ram rw\0" \
+ "nfsargs=setenv bootargs root=/dev/nfs rw " \
+ "nfsroot=${serverip}:${rootpath}\0" \
+ "addip=setenv bootargs ${bootargs} " \
+ "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
+ ":${hostname}:${netdev}:off panic=1\0" \
+ "flash_self=run ramargs addip;" \
+ "bootm ${kernel_addr} ${ramdisk_addr}\0" \
+ "flash_nfs=run nfsargs addip;" \
+ "bootm ${kernel_addr}\0" \
+ "net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0" \
+ "bootfile=/tftpboot/tqm5200/uImage\0" \
+ "load=tftp 200000 $(u-boot)\0" \
+ "u-boot=/tftpboot/tqm5200/u-boot.bin\0" \
+ "update=protect off FC000000 FC05FFFF;" \
+ "erase FC000000 FC05FFFF;" \
+ "cp.b 200000 FC000000 ${filesize};" \
+ "protect on FC000000 FC05FFFF\0" \
+ ""
+#endif /* CONFIG_TQM5200_B */
+
+#define CONFIG_BOOTCOMMAND "run net_nfs"
+
+/*
+ * IPB Bus clocking configuration.
+ */
+#define CFG_IPBSPEED_133 /* define for 133MHz speed */
+
+#if defined(CFG_IPBSPEED_133)
+/*
+ * PCI Bus clocking configuration
+ *
+ * Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if
+ * CFG_IPBSPEED_133 is defined. This is because a PCI Clock of 66 MHz yet hasn't
+ * been tested with a IPB Bus Clock of 66 MHz.
+ */
+#define CFG_PCISPEED_66 /* define for 66MHz speed */
+#endif
+
+/*
+ * I2C configuration
+ */
+#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
+#define CFG_I2C_MODULE 2 /* Select I2C module #2 */
+
+/*
+ * I2C clock frequency
+ *
+ * Please notice, that the resulting clock frequency could differ from the
+ * configured value. This is because the I2C clock is derived from system
+ * clock over a frequency divider with only a few divider values. U-boot
+ * calculates the best approximation for CFG_I2C_SPEED. However the calculated
+ * approximation allways lies below the configured value, never above.
+ */
+#define CFG_I2C_SPEED 100000 /* 100 kHz */
+#define CFG_I2C_SLAVE 0x7F
+
+/*
+ * EEPROM configuration for onboard EEPROM M24C32 (M24C64 should work
+ * also). For other EEPROMs configuration should be verified. On Mini-FAP the
+ * EEPROM (24C64) is on the same I2C address (but on other I2C bus), so the
+ * same configuration could be used.
+ */
+#define CFG_I2C_EEPROM_ADDR 0x50 /* 1010000x */
+#define CFG_I2C_EEPROM_ADDR_LEN 2
+#define CFG_EEPROM_PAGE_WRITE_BITS 5 /* =32 Bytes per write */
+#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 20
+
+/* List of I2C addresses to be verified by POST */
+#undef I2C_ADDR_LIST
+#define I2C_ADDR_LIST { CFG_I2C_EEPROM_ADDR, \
+ CFG_I2C_RTC_ADDR, \
+ CFG_I2C_SLAVE }
+
+/*
+ * Flash configuration
+ */
+#define CFG_FLASH_BASE TEXT_BASE /* 0xFC000000 */
+
+/* use CFI flash driver */
+#define CFG_FLASH_CFI 1 /* Flash is CFI conformant */
+#define CFG_FLASH_CFI_DRIVER 1 /* Use the common driver */
+#define CFG_FLASH_BANKS_LIST { CFG_BOOTCS_START }
+#define CFG_FLASH_EMPTY_INFO
+#define CFG_FLASH_SIZE 0x04000000 /* 64 MByte */
+#define CFG_MAX_FLASH_SECT 512 /* max num of sects on one chip */
+#define CFG_FLASH_USE_BUFFER_WRITE 1
+
+#if !defined(CFG_LOWBOOT)
+#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x00760000 + 0x00800000)
+#else /* CFG_LOWBOOT */
+#if defined(CONFIG_TQM5200_B)
+#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x00080000)
+#else
+#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x00060000)
+#endif /* CONFIG_TQM5200_B */
+#endif /* CFG_LOWBOOT */
+#define CFG_MAX_FLASH_BANKS 1 /* max num of flash banks
+ (= chip selects) */
+
+/* Dynamic MTD partition support */
+#define CONFIG_JFFS2_CMDLINE
+#define MTDIDS_DEFAULT "nor0=TQM5200-0"
+#if defined(CONFIG_TQM5200_B)
+#define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:768k(firmware)," \
+ "1280k(kernel)," \
+ "2m(initrd)," \
+ "4m(small-fs)," \
+ "16m(big-fs)," \
+ "8m(misc)"
+#else
+#define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:640k(firmware)," \
+ "1408k(kernel)," \
+ "2m(initrd)," \
+ "4m(small-fs)," \
+ "16m(big-fs)," \
+ "8m(misc)"
+#endif /* CONFIG_TQM5200_B */
+
+/*
+ * Environment settings
+ */
+#define CFG_ENV_IS_IN_FLASH 1
+#define CFG_ENV_SIZE 0x10000
+#if defined(CONFIG_TQM5200_B)
+#define CFG_ENV_SECT_SIZE 0x40000
+#else
+#define CFG_ENV_SECT_SIZE 0x20000
+#define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR + CFG_ENV_SECT_SIZE)
+#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
+#endif /* CONFIG_TQM5200_B */
+
+/*
+ * Memory map
+ */
+#define CFG_MBAR 0xF0000000
+#define CFG_SDRAM_BASE 0x00000000
+#define CFG_DEFAULT_MBAR 0x80000000
+
+/* Use ON-Chip SRAM until RAM will be available */
+#define CFG_INIT_RAM_ADDR MPC5XXX_SRAM
+#ifdef CONFIG_POST
+/* preserve space for the post_word at end of on-chip SRAM */
+#define CFG_INIT_RAM_END MPC5XXX_SRAM_POST_SIZE
+#else
+#define CFG_INIT_RAM_END MPC5XXX_SRAM_SIZE
+#endif
+
+
+#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
+#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
+#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
+
+#define CFG_MONITOR_BASE TEXT_BASE
+#if (CFG_MONITOR_BASE < CFG_FLASH_BASE)
+# define CFG_RAMBOOT 1
+#endif
+
+#if defined(CONFIG_TQM5200_B)
+#define CFG_MONITOR_LEN (512 << 10) /* Reserve 512 kB for Monitor */
+#else
+#define CFG_MONITOR_LEN (384 << 10) /* Reserve 384 kB for Monitor */
+#endif /* CONFIG_TQM5200_B */
+#define CFG_MALLOC_LEN (256 << 10) /* Reserve 256 kB for malloc() */
+#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
+
+/*
+ * Ethernet configuration
+ */
+#define CONFIG_MPC5xxx_FEC 1
+/*
+ * Define CONFIG_FEC_10MBIT to force FEC at 10Mb
+ */
+/* #define CONFIG_FEC_10MBIT 1 */
+#define CONFIG_PHY_ADDR 0x00
+
+/*
+ * GPIO configuration
+ *
+ * use pin gpio_wkup_6 as second SDRAM chip select (mem_cs1):
+ * Bit 0 (mask: 0x80000000): 1
+ * use ALT CAN position: Bits 2-3 (mask: 0x30000000):
+ * 00 -> No Alternatives, CAN1/2 on PSC2 according to PSC2 setting.
+ * 01 -> CAN1 on I2C1, CAN2 on Tmr0/1.
+ * Use for REV200 STK52XX boards. Do not use with REV100 modules
+ * (because, there I2C1 is used as I2C bus)
+ * use PSC1 as UART: Bits 28-31 (mask: 0x00000007): 0100
+ * use PSC2 as CAN: Bits 25:27 (mask: 0x00000030)
+ * 000 -> All PSC2 pins are GIOPs
+ * 001 -> CAN1/2 on PSC2 pins
+ * Use for REV100 STK52xx boards
+ * use PSC3: Bits 20:23 (mask: 0x00000300):
+ * 0001 -> USB2
+ * 0000 -> GPIO
+ * use PSC6:
+ * on STK52xx:
+ * use as UART. Pins PSC6_0 to PSC6_3 are used.
+ * Bits 9:11 (mask: 0x00700000):
+ * 101 -> PSC6 : Extended POST test is not available
+ * on MINI-FAP and TQM5200_IB:
+ * use PSC6_0 to PSC6_3 as GPIO: Bits 9:11 (mask: 0x00700000):
+ * 000 -> PSC6 could not be used as UART, CODEC or IrDA
+ * GPIO on PSC6_3 is used in post_hotkeys_pressed() to enable extended POST
+ * tests.
+ */
+#define CFG_GPS_PORT_CONFIG 0x81500114
+
+/*
+ * RTC configuration
+ */
+#define CONFIG_RTC_M41T11 1
+#define CFG_I2C_RTC_ADDR 0x68
+#define CFG_M41T11_BASE_YEAR 1900 /* because Linux uses the same base
+ year */
+
+/*
+ * Miscellaneous configurable options
+ */
+#define CFG_LONGHELP /* undef to save memory */
+#define CFG_PROMPT "=> " /* Monitor Command Prompt */
+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
+#else
+#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
+#endif
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
+#define CFG_MAXARGS 16 /* max number of command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+
+/* Enable an alternate, more extensive memory test */
+#define CFG_ALT_MEMTEST
+
+#define CFG_MEMTEST_START 0x00100000 /* memtest works on */
+#define CFG_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
+
+#define CFG_LOAD_ADDR 0x100000 /* default load address */
+
+#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
+
+/*
+ * Enable loopw commando. This has only affect, if CFG_CMD_MEM is defined,
+ * which is normally part of the default commands (CFV_CMD_DFL)
+ */
+#define CONFIG_LOOPW
+
+/*
+ * Various low-level settings
+ */
+#if defined(CONFIG_MPC5200)
+#define CFG_HID0_INIT HID0_ICE | HID0_ICFI
+#define CFG_HID0_FINAL HID0_ICE
+#else
+#define CFG_HID0_INIT 0
+#define CFG_HID0_FINAL 0
+#endif
+
+#define CFG_BOOTCS_START CFG_FLASH_BASE
+#define CFG_BOOTCS_SIZE CFG_FLASH_SIZE
+#ifdef CFG_PCISPEED_66
+#define CFG_BOOTCS_CFG 0x0008DF30 /* for pci_clk = 66 MHz */
+#else
+#define CFG_BOOTCS_CFG 0x0004DF30 /* for pci_clk = 33 MHz */
+#endif
+#define CFG_CS0_START CFG_FLASH_BASE
+#define CFG_CS0_SIZE CFG_FLASH_SIZE
+
+#define CONFIG_LAST_STAGE_INIT
+
+/*
+ * SRAM - Do not map below 2 GB in address space, because this area is used
+ * for SDRAM autosizing.
+ */
+#define CFG_CS2_START 0xE5000000
+#define CFG_CS2_SIZE 0x100000 /* 1 MByte */
+#define CFG_CS2_CFG 0x0004D930
+
+/*
+ * Grafic controller - Do not map below 2 GB in address space, because this
+ * area is used for SDRAM autosizing.
+ */
+#define SM501_FB_BASE 0xE0000000
+#define CFG_CS1_START (SM501_FB_BASE)
+#define CFG_CS1_SIZE 0x4000000 /* 64 MByte */
+#define CFG_CS1_CFG 0x8F48FF70
+#define SM501_MMIO_BASE CFG_CS1_START + 0x03E00000
+
+#define CFG_CS_BURST 0x00000000
+#define CFG_CS_DEADCYCLE 0x33333311 /* 1 dead cycle for flash and SM501 */
+
+#define CFG_RESET_ADDRESS 0xff000000
+
+/*-----------------------------------------------------------------------
+ * USB stuff
+ *-----------------------------------------------------------------------
+ */
+#define CONFIG_USB_CLOCK 0x0001BBBB
+#define CONFIG_USB_CONFIG 0x00001000
+
+/*-----------------------------------------------------------------------
+ * IDE/ATA stuff Supports IDE harddisk
+ *-----------------------------------------------------------------------
+ */
+
+#undef CONFIG_IDE_8xx_PCCARD /* Use IDE with PC Card Adapter */
+
+#undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */
+#undef CONFIG_IDE_LED /* LED for ide not supported */
+
+#define CONFIG_IDE_RESET /* reset for ide supported */
+#define CONFIG_IDE_PREINIT
+
+#define CFG_IDE_MAXBUS 1 /* max. 1 IDE bus */
+#define CFG_IDE_MAXDEVICE 2 /* max. 2 drives per IDE bus */
+
+#define CFG_ATA_IDE0_OFFSET 0x0000
+
+#define CFG_ATA_BASE_ADDR MPC5XXX_ATA
+
+/* Offset for data I/O */
+#define CFG_ATA_DATA_OFFSET (0x0060)
+
+/* Offset for normal register accesses */
+#define CFG_ATA_REG_OFFSET (CFG_ATA_DATA_OFFSET)
+
+/* Offset for alternate registers */
+#define CFG_ATA_ALT_OFFSET (0x005C)
+
+/* Interval between registers */
+#define CFG_ATA_STRIDE 4
+
+#endif /* __CONFIG_H */
diff --git a/include/configs/TQM5200.h b/include/configs/TQM5200.h
index 5ad1939481..be83b67672 100644
--- a/include/configs/TQM5200.h
+++ b/include/configs/TQM5200.h
@@ -2,7 +2,7 @@
* (C) Copyright 2003-2005
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
- * (C) Copyright 2004-2005
+ * (C) Copyright 2004-2006
* Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de
*
* See file CREDITS for list of people who contributed to this
@@ -32,28 +32,30 @@
* (easy to change)
*/
-#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */
-#define CONFIG_MPC5200 1 /* (more precisely an MPC5200 CPU) */
-#define CONFIG_TQM5200 1 /* ... on TQM5200 module */
-#undef CONFIG_TQM5200_REV100 /* define for revision 100 modules */
-#define CONFIG_STK52XX 1 /* ... on a STK52XX base board */
-#define CONFIG_STK52XX_REV100 1 /* define for revision 100 baseboards */
+#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */
+#define CONFIG_MPC5200 1 /* (more precisely an MPC5200 CPU) */
+#define CONFIG_TQM5200 1 /* ... on TQM5200 module */
+#undef CONFIG_TQM5200_REV100 /* define for revision 100 modules */
-#define CFG_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
+#ifndef CONFIG_CAM5200 /* On a Cameron board or ... */
+#define CONFIG_STK52XX 1 /* ... on a STK52XX board */
+#endif
+
+#define CFG_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
+#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
+#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
+#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
-# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
+# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
/*
* Serial console configuration
*/
-#define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
-#define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
+#define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
+#define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
#ifdef CONFIG_STK52XX
@@ -83,7 +85,7 @@
#define CONFIG_PCI_IO_SIZE 0x01000000
#define CONFIG_NET_MULTI 1
-#define CONFIG_EEPRO100
+#define CONFIG_EEPRO100 1
#define CFG_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
#define CONFIG_NS8382X 1
#endif /* CONFIG_STK52XX */
@@ -97,7 +99,7 @@
/*
* Video console
*/
-#if 1
+#ifndef CONFIG_TQM5200S /* No graphics controller on TQM5200S */
#define CONFIG_VIDEO
#define CONFIG_VIDEO_SM501
#define CONFIG_VIDEO_SM501_32BPP
@@ -130,10 +132,12 @@
#define ADD_USB_CMD 0
#endif
+#ifndef CONFIG_CAM5200
/* POST support */
#define CONFIG_POST (CFG_POST_MEMORY | \
CFG_POST_CPU | \
CFG_POST_I2C)
+#endif
#ifdef CONFIG_POST
#define CFG_CMD_POST_DIAG CFG_CMD_DIAG
@@ -161,7 +165,6 @@
CFG_CMD_ASKENV | \
CFG_CMD_DATE | \
CFG_CMD_DHCP | \
- CFG_CMD_ECHO | \
CFG_CMD_EEPROM | \
CFG_CMD_I2C | \
CFG_CMD_JFFS2 | \
@@ -178,8 +181,8 @@
#define CONFIG_TIMESTAMP /* display image timestamps */
-#if (TEXT_BASE == 0xFC000000) /* Boot low */
-# define CFG_LOWBOOT 1
+#if (TEXT_BASE != 0xFFF00000)
+# define CFG_LOWBOOT 1 /* Boot low */
#endif
/*
@@ -188,20 +191,42 @@
#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
#define CONFIG_PREBOOT "echo;" \
- "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
+ "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
"echo"
#undef CONFIG_BOOTARGS
-#if defined (CONFIG_TQM5200_AA)
-# define CONFIG_U_BOOT_SUFFIX "-AA\0"
-#elif defined (CONFIG_TQM5200_AB)
-# define CONFIG_U_BOOT_SUFFIX "-AB\0"
-#elif defined (CONFIG_TQM5200_AC)
-# define CONFIG_U_BOOT_SUFFIX "-AC\0"
+#ifdef CONFIG_STK52XX
+# if defined(CONFIG_TQM5200_B)
+# if defined(CFG_LOWBOOT)
+# define ENV_UPDT \
+ "update=protect off FC000000 FC07FFFF;" \
+ "erase FC000000 FC07FFFF;" \
+ "cp.b 200000 FC000000 ${filesize};" \
+ "protect on FC000000 FC07FFFF\0"
+# else /* highboot */
+# define ENV_UPDT \
+ "update=protect off FFF00000 FFF7FFFF;" \
+ "erase FFF00000 FFF7FFFF;" \
+ "cp.b 200000 FFF00000 ${filesize};" \
+ "protect on FFF00000 FFF7FFFF\0"
+# endif /* CFG_LOWBOOT */
+# else /* !CONFIG_TQM5200_B */
+# define ENV_UPDT \
+ "update=protect off FC000000 FC05FFFF;" \
+ "erase FC000000 FC05FFFF;" \
+ "cp.b 200000 FC000000 ${filesize};" \
+ "protect on FC000000 FC05FFFF\0"
+# endif /* CONFIG_TQM5200_B */
+#elif defined (CONFIG_CAM5200)
+# define ENV_UPDT \
+ "update=protect off FC000000 FC03FFFF;" \
+ "erase FC000000 FC03FFFF;" \
+ "cp.b 200000 FC000000 ${filesize};" \
+ "protect on FC000000 FC03FFFF\0"
#else
-# define CONFIG_U_BOOT_SUFFIX "\0"
-#endif
+# error "Unknown Carrier Board"
+#endif /* CONFIG_STK52XX */
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
@@ -212,18 +237,18 @@
"addip=setenv bootargs ${bootargs} " \
"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
":${hostname}:${netdev}:off panic=1\0" \
- "flash_self=run ramargs addip;" \
+ "addcons=setenv bootargs ${bootargs} " \
+ "console=ttyS0,${baudrate}\0" \
+ "flash_self=run ramargs addip addcons;" \
"bootm ${kernel_addr} ${ramdisk_addr}\0" \
- "flash_nfs=run nfsargs addip;" \
+ "flash_nfs=run nfsargs addip addcons;" \
"bootm ${kernel_addr}\0" \
- "net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0" \
+ "net_nfs=tftp 200000 ${bootfile};run nfsargs addip addcons;" \
+ "bootm\0" \
"bootfile=/tftpboot/tqm5200/uImage\0" \
+ "u-boot=/tftpboot/tqm5200/u-boot.bin\0" \
"load=tftp 200000 ${u-boot}\0" \
- "u-boot=/tftpboot/tqm5200/u-boot.bin" CONFIG_U_BOOT_SUFFIX \
- "update=protect off FC000000 FC05FFFF;" \
- "erase FC000000 FC05FFFF;" \
- "cp.b 200000 FC000000 ${filesize};" \
- "protect on FC000000 FC05FFFF\0" \
+ ENV_UPDT \
""
#define CONFIG_BOOTCOMMAND "run net_nfs"
@@ -285,13 +310,6 @@
#endif
/* List of I2C addresses to be verified by POST */
-#if defined (CONFIG_TQM5200_AA) || defined (CONFIG_TQM5200_AB)
-#define I2C_ADDR_LIST { CFG_I2C_EEPROM_ADDR, \
- CFG_I2C_SLAVE }
-#elif defined (CONFIG_TQM5200_AC)
-#define I2C_ADDR_LIST { CFG_I2C_SLAVE }
-#endif
-
#if defined (CONFIG_MINIFAP)
#undef I2C_ADDR_LIST
#define I2C_ADDR_LIST { CFG_I2C_EEPROM_ADDR, \
@@ -302,45 +320,80 @@
/*
* Flash configuration
*/
-#define CFG_FLASH_BASE TEXT_BASE /* 0xFC000000 */
+#define CFG_FLASH_BASE 0xFC000000
-/* use CFI flash driver if no module variant is spezified */
+/* use CFI flash driver */
#define CFG_FLASH_CFI 1 /* Flash is CFI conformant */
#define CFG_FLASH_CFI_DRIVER 1 /* Use the common driver */
#define CFG_FLASH_BANKS_LIST { CFG_BOOTCS_START }
#define CFG_FLASH_EMPTY_INFO
#define CFG_FLASH_SIZE 0x04000000 /* 64 MByte */
#define CFG_MAX_FLASH_SECT 512 /* max num of sects on one chip */
-#undef CFG_FLASH_USE_BUFFER_WRITE /* not supported yet for AMD */
+#define CFG_FLASH_USE_BUFFER_WRITE 1
+
+#if defined (CONFIG_CAM5200)
+# define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x00040000)
+#elif defined(CONFIG_TQM5200_B)
+# define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x00080000)
+#else
+# define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x00060000)
+#endif
-#if !defined(CFG_LOWBOOT)
-#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x00760000 + 0x00800000)
-#else /* CFG_LOWBOOT */
-#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x00060000)
-#endif /* CFG_LOWBOOT */
#define CFG_MAX_FLASH_BANKS 1 /* max num of flash banks
(= chip selects) */
-#define CFG_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
-#define CFG_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
/* Dynamic MTD partition support */
#define CONFIG_JFFS2_CMDLINE
#define MTDIDS_DEFAULT "nor0=TQM5200-0"
-#define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:640k(firmware)," \
+
+#ifdef CONFIG_STK52XX
+# if defined(CONFIG_TQM5200_B)
+# if defined(CFG_LOWBOOT)
+# define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:1m(firmware)," \
+ "1536k(kernel)," \
+ "3584k(small-fs)," \
+ "2m(initrd)," \
+ "8m(misc)," \
+ "16m(big-fs)"
+# else /* highboot */
+# define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:2560k(kernel)," \
+ "3584k(small-fs)," \
+ "2m(initrd)," \
+ "8m(misc)," \
+ "15m(big-fs)," \
+ "1m(firmware)"
+# endif /* CFG_LOWBOOT */
+# else /* !CONFIG_TQM5200_B */
+# define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:640k(firmware)," \
"1408k(kernel)," \
"2m(initrd)," \
"4m(small-fs)," \
- "16m(big-fs)," \
- "8m(misc)"
+ "8m(misc)," \
+ "16m(big-fs)"
+# endif /* CONFIG_TQM5200_B */
+#elif defined (CONFIG_CAM5200)
+# define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:768k(firmware)," \
+ "1792k(kernel)," \
+ "3584k(small-fs)," \
+ "2m(initrd)," \
+ "8m(misc)," \
+ "16m(big-fs)"
+#else
+# error "Unknown Carrier Board"
+#endif /* CONFIG_STK52XX */
/*
* Environment settings
*/
#define CFG_ENV_IS_IN_FLASH 1
-#define CFG_ENV_SIZE 0x10000
+#define CFG_ENV_SIZE 0x4000 /* 16 k - keep small for fast booting */
+#if defined(CONFIG_TQM5200_B)
+#define CFG_ENV_SECT_SIZE 0x40000
+#else
#define CFG_ENV_SECT_SIZE 0x20000
+#endif /* CONFIG_TQM5200_B */
#define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR + CFG_ENV_SECT_SIZE)
-#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
+#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
/*
* Memory map
@@ -368,8 +421,15 @@
# define CFG_RAMBOOT 1
#endif
-#define CFG_MONITOR_LEN (384 << 10) /* Reserve 384 kB for Monitor */
-#define CFG_MALLOC_LEN (256 << 10) /* Reserve 256 kB for malloc() */
+#if defined (CONFIG_CAM5200)
+# define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
+#elif defined(CONFIG_TQM5200_B)
+# define CFG_MONITOR_LEN (512 << 10) /* Reserve 512 kB for Monitor */
+#else
+# define CFG_MONITOR_LEN (384 << 10) /* Reserve 384 kB for Monitor */
+#endif
+
+#define CFG_MALLOC_LEN (1024 << 10) /* Reserve 1024 kB for malloc() */
#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
/*
@@ -430,6 +490,8 @@
#if defined (CONFIG_STK52XX) && !defined (CONFIG_STK52XX_REV100)
# define CONFIG_RTC_M41T11 1
# define CFG_I2C_RTC_ADDR 0x68
+# define CFG_M41T11_BASE_YEAR 1900 /* because Linux uses the same base
+ year */
#else
# define CONFIG_RTC_MPC5200 1 /* use internal MPC5200 RTC */
#endif
@@ -439,6 +501,10 @@
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
+
+#define CFG_HUSH_PARSER 1 /* use "hush" command parser */
+#define CFG_PROMPT_HUSH_PS2 "> "
+
#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
@@ -485,37 +551,25 @@
#define CFG_CS0_START CFG_FLASH_BASE
#define CFG_CS0_SIZE CFG_FLASH_SIZE
-/* automatic configuration of chip selects */
-#ifdef CONFIG_CS_AUTOCONF
#define CONFIG_LAST_STAGE_INIT
-#endif
/*
* SRAM - Do not map below 2 GB in address space, because this area is used
* for SDRAM autosizing.
*/
-#if defined CONFIG_TQM5200_AB || defined (CONFIG_CS_AUTOCONF)
#define CFG_CS2_START 0xE5000000
-#ifdef CONFIG_TQM5200_AB
-#define CFG_CS2_SIZE 0x80000 /* 512 kByte */
-#else /* CONFIG_CS_AUTOCONF */
#define CFG_CS2_SIZE 0x100000 /* 1 MByte */
-#endif
#define CFG_CS2_CFG 0x0004D930
-#endif
/*
* Grafic controller - Do not map below 2 GB in address space, because this
* area is used for SDRAM autosizing.
*/
-#if defined (CONFIG_TQM5200_AB) || defined (CONFIG_TQM5200_AC) || \
- defined (CONFIG_CS_AUTOCONF)
#define SM501_FB_BASE 0xE0000000
#define CFG_CS1_START (SM501_FB_BASE)
#define CFG_CS1_SIZE 0x4000000 /* 64 MByte */
#define CFG_CS1_CFG 0x8F48FF70
#define SM501_MMIO_BASE CFG_CS1_START + 0x03E00000
-#endif
#define CFG_CS_BURST 0x00000000
#define CFG_CS_DEADCYCLE 0x33333311 /* 1 dead cycle for flash and SM501 */
diff --git a/include/configs/TQM834x.h b/include/configs/TQM834x.h
index 41f44c5a37..cec7e3ece4 100644
--- a/include/configs/TQM834x.h
+++ b/include/configs/TQM834x.h
@@ -417,11 +417,58 @@ extern int tqm834x_num_flash_banks;
HRCWH_TSEC2M_IN_GMII )
#endif
+/* System IO Config */
+#define CFG_SICRH SICRH_TSOBI1
+#define CFG_SICRL SICRL_LDP_A
+
/* i-cache and d-cache disabled */
#define CFG_HID0_INIT 0x000000000
#define CFG_HID0_FINAL CFG_HID0_INIT
#define CFG_HID2 0x000000000
+/* DDR 0 - 512M */
+#define CFG_IBAT0L (CFG_SDRAM_BASE | BATL_PP_10 | BATL_MEMCOHERENCE)
+#define CFG_IBAT0U (CFG_SDRAM_BASE | BATU_BL_256M | BATU_VS | BATU_VP)
+#define CFG_IBAT1L (CFG_SDRAM_BASE + 0x10000000 | BATL_PP_10 | BATL_MEMCOHERENCE)
+#define CFG_IBAT1U (CFG_SDRAM_BASE + 0x10000000 | BATU_BL_256M | BATU_VS | BATU_VP)
+
+/* stack in DCACHE @ 512M (no backing mem) */
+#define CFG_IBAT2L (CFG_INIT_RAM_ADDR | BATL_PP_10 | BATL_MEMCOHERENCE)
+#define CFG_IBAT2U (CFG_INIT_RAM_ADDR | BATU_BL_128K | BATU_VS | BATU_VP)
+
+/* PCI */
+#define CFG_IBAT3L (CFG_PCI1_MEM_BASE | BATL_PP_10 | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
+#define CFG_IBAT3U (CFG_PCI1_MEM_BASE | BATU_BL_256M | BATU_VS | BATU_VP)
+#define CFG_IBAT4L (CFG_PCI1_MEM_BASE + 0x10000000 | BATL_PP_10 | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
+#define CFG_IBAT4U (CFG_PCI1_MEM_BASE + 0x10000000 | BATU_BL_256M | BATU_VS | BATU_VP)
+#define CFG_IBAT5L (CFG_PCI1_IO_BASE | BATL_PP_10 | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
+#define CFG_IBAT5U (CFG_PCI1_IO_BASE + 0x10000000 | BATU_BL_16M | BATU_VS | BATU_VP)
+
+/* IMMRBAR */
+#define CFG_IBAT6L (CFG_IMMRBAR | BATL_PP_10 | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
+#define CFG_IBAT6U (CFG_IMMRBAR | BATU_BL_1M | BATU_VS | BATU_VP)
+
+/* FLASH */
+#define CFG_IBAT7L (CFG_FLASH_BASE | BATL_PP_10 | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
+#define CFG_IBAT7U (CFG_FLASH_BASE | BATU_BL_256M | BATU_VS | BATU_VP)
+
+#define CFG_DBAT0L CFG_IBAT0L
+#define CFG_DBAT0U CFG_IBAT0U
+#define CFG_DBAT1L CFG_IBAT1L
+#define CFG_DBAT1U CFG_IBAT1U
+#define CFG_DBAT2L CFG_IBAT2L
+#define CFG_DBAT2U CFG_IBAT2U
+#define CFG_DBAT3L CFG_IBAT3L
+#define CFG_DBAT3U CFG_IBAT3U
+#define CFG_DBAT4L CFG_IBAT4L
+#define CFG_DBAT4U CFG_IBAT4U
+#define CFG_DBAT5L CFG_IBAT5L
+#define CFG_DBAT5U CFG_IBAT5U
+#define CFG_DBAT6L CFG_IBAT6L
+#define CFG_DBAT6U CFG_IBAT6U
+#define CFG_DBAT7L CFG_IBAT7L
+#define CFG_DBAT7U CFG_IBAT7U
+
/*
* Internal Definitions
*
diff --git a/include/configs/TQM85xx.h b/include/configs/TQM85xx.h
index 18197f234d..780f27433e 100644
--- a/include/configs/TQM85xx.h
+++ b/include/configs/TQM85xx.h
@@ -158,7 +158,7 @@
#undef CONFIG_CONS_NONE /* define if console on something else */
#define CONFIG_CONS_INDEX 1 /* which serial channel for console */
-#else
+#else /* ! TQM8560 */
#define CONFIG_CONS_INDEX 1
#undef CONFIG_SERIAL_SOFTWARE_FIFO
@@ -170,6 +170,15 @@
#define CFG_NS16550_COM1 (CFG_CCSRBAR+0x4500)
#define CFG_NS16550_COM2 (CFG_CCSRBAR+0x4600)
+/* PS/2 Keyboard */
+#if !defined(CONFIG_TQM8560)
+#define CONFIG_PS2KBD /* AT-PS/2 Keyboard */
+#define CONFIG_PS2MULT /* .. on PS/2 Multiplexer */
+#define CONFIG_PS2SERIAL 2 /* .. on DUART2 */
+#define CONFIG_PS2MULT_DELAY (CFG_HZ/2) /* Initial delay */
+#define CONFIG_BOARD_EARLY_INIT_R 1
+#endif /* !CONFIG_TQM8560 */
+
#endif /* CONFIG_TQM8560 */
#define CONFIG_BAUDRATE 115200
diff --git a/include/configs/TQM885D.h b/include/configs/TQM885D.h
new file mode 100644
index 0000000000..ede4e3b9b3
--- /dev/null
+++ b/include/configs/TQM885D.h
@@ -0,0 +1,492 @@
+/*
+ * (C) Copyright 2000-2005
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * (C) Copyright 2006
+ * Martin Krause, TQ-Systems GmBH, martin.krause@tqs.de
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * board/config.h - configuration options, board specific
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * High Level Configuration Options
+ * (easy to change)
+ */
+
+#define CONFIG_MPC885 1 /* This is a MPC885 CPU */
+#define CONFIG_TQM885D 1 /* ...on a TQM88D module */
+
+#define CONFIG_8xx_OSCLK 10000000 /* 10 MHz - PLL input clock */
+#define CFG_8xx_CPUCLK_MIN 15000000 /* 15 MHz - CPU minimum clock */
+#define CFG_8xx_CPUCLK_MAX 133000000 /* 133 MHz - CPU maximum clock */
+#define CONFIG_8xx_CPUCLK_DEFAULT 66000000 /* 50 MHz - CPU default clock */
+ /* (it will be used if there is no */
+ /* 'cpuclk' variable with valid value) */
+
+#define CFG_MEASURE_CPUCLK /* Measure real cpu clock */
+ /* (function measure_gclk() */
+ /* will be called) */
+#ifdef CFG_MEASURE_CPUCLK
+#define CFG_8XX_XIN 10000000 /* measure_gclk() needs this */
+#endif
+
+#define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */
+
+#define CONFIG_BAUDRATE 115200 /* console baudrate = 115kbps */
+
+#define CONFIG_BOOTCOUNT_LIMIT
+
+#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
+
+#define CONFIG_BOARD_TYPES 1 /* support board types */
+
+#define CONFIG_PREBOOT "echo;" \
+ "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
+ "echo"
+
+#undef CONFIG_BOOTARGS
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "netdev=eth0\0" \
+ "nfsargs=setenv bootargs root=/dev/nfs rw " \
+ "nfsroot=${serverip}:${rootpath}\0" \
+ "ramargs=setenv bootargs root=/dev/ram rw\0" \
+ "addip=setenv bootargs ${bootargs} " \
+ "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
+ ":${hostname}:${netdev}:off panic=1\0" \
+ "flash_nfs=run nfsargs addip;" \
+ "bootm ${kernel_addr}\0" \
+ "flash_self=run ramargs addip;" \
+ "bootm ${kernel_addr} ${ramdisk_addr}\0" \
+ "net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0" \
+ "rootpath=/opt/eldk/ppc_8xx\0" \
+ "bootfile=/tftpboot/TQM866M/uImage\0" \
+ "kernel_addr=40080000\0" \
+ "ramdisk_addr=40180000\0" \
+ ""
+#define CONFIG_BOOTCOMMAND "run flash_self"
+
+#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
+#undef CFG_LOADS_BAUD_CHANGE /* don't allow baudrate change */
+
+#undef CONFIG_WATCHDOG /* watchdog disabled */
+
+#define CONFIG_STATUS_LED 1 /* Status LED enabled */
+
+#undef CONFIG_CAN_DRIVER /* CAN Driver support disabled */
+
+/* enable I2C and select the hardware/software driver */
+#undef CONFIG_HARD_I2C /* I2C with hardware support */
+#define CONFIG_SOFT_I2C 1 /* I2C bit-banged */
+
+#define CFG_I2C_SPEED 93000 /* 93 kHz is supposed to work */
+#define CFG_I2C_SLAVE 0xFE
+
+#ifdef CONFIG_SOFT_I2C
+/*
+ * Software (bit-bang) I2C driver configuration
+ */
+#define PB_SCL 0x00000020 /* PB 26 */
+#define PB_SDA 0x00000010 /* PB 27 */
+
+#define I2C_INIT (immr->im_cpm.cp_pbdir |= PB_SCL)
+#define I2C_ACTIVE (immr->im_cpm.cp_pbdir |= PB_SDA)
+#define I2C_TRISTATE (immr->im_cpm.cp_pbdir &= ~PB_SDA)
+#define I2C_READ ((immr->im_cpm.cp_pbdat & PB_SDA) != 0)
+#define I2C_SDA(bit) if(bit) immr->im_cpm.cp_pbdat |= PB_SDA; \
+ else immr->im_cpm.cp_pbdat &= ~PB_SDA
+#define I2C_SCL(bit) if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \
+ else immr->im_cpm.cp_pbdat &= ~PB_SCL
+#define I2C_DELAY udelay(2) /* 1/4 I2C clock duration */
+#endif /* CONFIG_SOFT_I2C */
+
+#define CFG_I2C_EEPROM_ADDR 0x50 /* EEPROM AT24C?? */
+#define CFG_I2C_EEPROM_ADDR_LEN 2 /* two byte address */
+#define CFG_EEPROM_PAGE_WRITE_BITS 4
+#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */
+
+# define CONFIG_RTC_DS1337 1
+# define CFG_I2C_RTC_ADDR 0x68
+
+#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
+
+#define CONFIG_MAC_PARTITION
+#define CONFIG_DOS_PARTITION
+
+#undef CONFIG_RTC_MPC8xx /* MPC866 does not support RTC */
+
+#define CONFIG_TIMESTAMP /* but print image timestmps */
+
+#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
+ CFG_CMD_ASKENV | \
+ CFG_CMD_DATE | \
+ CFG_CMD_DHCP | \
+ CFG_CMD_EEPROM | \
+ CFG_CMD_I2C | \
+ CFG_CMD_IDE | \
+ CFG_CMD_MII | \
+ CFG_CMD_NFS | \
+ CFG_CMD_PING )
+
+/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
+#include <cmd_confdefs.h>
+
+/*
+ * Miscellaneous configurable options
+ */
+#define CFG_LONGHELP /* undef to save memory */
+#define CFG_PROMPT "=> " /* Monitor Command Prompt */
+
+#if 0
+#define CFG_HUSH_PARSER 1 /* use "hush" command parser */
+#endif
+#ifdef CFG_HUSH_PARSER
+#define CFG_PROMPT_HUSH_PS2 "> "
+#endif
+
+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
+#else
+#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
+#endif
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
+#define CFG_MAXARGS 16 /* max number of command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+
+#define CFG_MEMTEST_START 0x0100000 /* memtest works on */
+#define CFG_MEMTEST_END 0x0300000 /* 1 ... 3 MB in DRAM */
+#define CFG_ALT_MEMTEST /* alternate, more extensive
+ memory test.*/
+
+#define CFG_LOAD_ADDR 0x100000 /* default load address */
+
+#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
+
+#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
+
+/*
+ * Enable loopw commando. This has only effect, if CFG_CMD_MEM is defined,
+ * which is normally part of the default commands (CFV_CMD_DFL)
+ */
+#define CONFIG_LOOPW
+
+/*
+ * Low Level Configuration Settings
+ * (address mappings, register initial values, etc.)
+ * You should know what you are doing if you make changes here.
+ */
+/*-----------------------------------------------------------------------
+ * Internal Memory Mapped Register
+ */
+#define CFG_IMMR 0xFFF00000
+
+/*-----------------------------------------------------------------------
+ * Definitions for initial stack pointer and data area (in DPRAM)
+ */
+#define CFG_INIT_RAM_ADDR CFG_IMMR
+#define CFG_INIT_RAM_END 0x2F00 /* End of used area in DPRAM */
+#define CFG_GBL_DATA_SIZE 64 /* size in bytes reserved for initial data */
+#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
+#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
+
+/*-----------------------------------------------------------------------
+ * Start addresses for the final memory configuration
+ * (Set up by the startup code)
+ * Please note that CFG_SDRAM_BASE _must_ start at 0
+ */
+#define CFG_SDRAM_BASE 0x00000000
+#define CFG_FLASH_BASE 0x40000000
+#define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
+#define CFG_MONITOR_BASE CFG_FLASH_BASE
+#define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
+
+/*
+ * For booting Linux, the board info and command line data
+ * have to be in the first 8 MB of memory, since this is
+ * the maximum mapped by the Linux kernel during initialization.
+ */
+#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
+
+/*-----------------------------------------------------------------------
+ * FLASH organization
+ */
+#define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */
+#define CFG_MAX_FLASH_SECT 256 /* max number of sectors on one chip */
+
+#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
+#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
+
+#define CFG_ENV_IS_IN_FLASH 1
+#define CFG_ENV_OFFSET 0x40000 /* Offset of Environment Sector */
+#define CFG_ENV_SIZE 0x08000 /* Total Size of Environment Sector */
+#define CFG_ENV_SECT_SIZE 0x20000 /* Total Size of Environment Sector */
+
+/* Address and size of Redundant Environment Sector */
+#define CFG_ENV_OFFSET_REDUND (CFG_ENV_OFFSET+CFG_ENV_SECT_SIZE)
+#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
+
+/*-----------------------------------------------------------------------
+ * Hardware Information Block
+ */
+#define CFG_HWINFO_OFFSET 0x0003FFC0 /* offset of HW Info block */
+#define CFG_HWINFO_SIZE 0x00000040 /* size of HW Info block */
+#define CFG_HWINFO_MAGIC 0x54514D38 /* 'TQM8' */
+
+/*-----------------------------------------------------------------------
+ * Cache Configuration
+ */
+#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
+#endif
+
+/*-----------------------------------------------------------------------
+ * SYPCR - System Protection Control 11-9
+ * SYPCR can only be written once after reset!
+ *-----------------------------------------------------------------------
+ * Software & Bus Monitor Timer max, Bus Monitor enable, SW Watchdog freeze
+ */
+#if defined(CONFIG_WATCHDOG)
+#define CFG_SYPCR (SYPCR_SWTC | SYPCR_BMT | SYPCR_BME | SYPCR_SWF | \
+ SYPCR_SWE | SYPCR_SWRI| SYPCR_SWP)
+#else
+#define CFG_SYPCR (SYPCR_SWTC | SYPCR_BMT | SYPCR_BME | SYPCR_SWF | SYPCR_SWP)
+#endif
+
+/*-----------------------------------------------------------------------
+ * SIUMCR - SIU Module Configuration 11-6
+ *-----------------------------------------------------------------------
+ * PCMCIA config., multi-function pin tri-state
+ */
+#ifndef CONFIG_CAN_DRIVER
+#define CFG_SIUMCR (SIUMCR_DBGC00 | SIUMCR_DBPC00 | SIUMCR_MLRC01)
+#else /* we must activate GPL5 in the SIUMCR for CAN */
+#define CFG_SIUMCR (SIUMCR_DBGC11 | SIUMCR_DBPC00 | SIUMCR_MLRC01)
+#endif /* CONFIG_CAN_DRIVER */
+
+/*-----------------------------------------------------------------------
+ * TBSCR - Time Base Status and Control 11-26
+ *-----------------------------------------------------------------------
+ * Clear Reference Interrupt Status, Timebase freezing enabled
+ */
+#define CFG_TBSCR (TBSCR_REFA | TBSCR_REFB | TBSCR_TBF)
+
+/*-----------------------------------------------------------------------
+ * PISCR - Periodic Interrupt Status and Control 11-31
+ *-----------------------------------------------------------------------
+ * Clear Periodic Interrupt Status, Interrupt Timer freezing enabled
+ */
+#define CFG_PISCR (PISCR_PS | PISCR_PITF)
+
+/*-----------------------------------------------------------------------
+ * SCCR - System Clock and reset Control Register 15-27
+ *-----------------------------------------------------------------------
+ * Set clock output, timebase and RTC source and divider,
+ * power management and some other internal clocks
+ */
+#define SCCR_MASK SCCR_EBDF11
+#define CFG_SCCR (SCCR_COM00 | SCCR_DFSYNC00 | SCCR_DFBRG00 | \
+ SCCR_DFNL000 | SCCR_DFNH000 | SCCR_DFLCD000 | \
+ SCCR_DFALCD00)
+
+/*-----------------------------------------------------------------------
+ * PCMCIA stuff
+ *-----------------------------------------------------------------------
+ *
+ */
+#define CFG_PCMCIA_MEM_ADDR (0xE0000000)
+#define CFG_PCMCIA_MEM_SIZE ( 64 << 20 )
+#define CFG_PCMCIA_DMA_ADDR (0xE4000000)
+#define CFG_PCMCIA_DMA_SIZE ( 64 << 20 )
+#define CFG_PCMCIA_ATTRB_ADDR (0xE8000000)
+#define CFG_PCMCIA_ATTRB_SIZE ( 64 << 20 )
+#define CFG_PCMCIA_IO_ADDR (0xEC000000)
+#define CFG_PCMCIA_IO_SIZE ( 64 << 20 )
+
+/*-----------------------------------------------------------------------
+ * IDE/ATA stuff (Supports IDE harddisk on PCMCIA Adapter)
+ *-----------------------------------------------------------------------
+ */
+
+#define CONFIG_IDE_8xx_PCCARD 1 /* Use IDE with PC Card Adapter */
+
+#undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */
+#undef CONFIG_IDE_LED /* LED for ide not supported */
+#undef CONFIG_IDE_RESET /* reset for ide not supported */
+
+#define CFG_IDE_MAXBUS 1 /* max. 1 IDE bus */
+#define CFG_IDE_MAXDEVICE 1 /* max. 1 drive per IDE bus */
+
+#define CFG_ATA_IDE0_OFFSET 0x0000
+
+#define CFG_ATA_BASE_ADDR CFG_PCMCIA_MEM_ADDR
+
+/* Offset for data I/O */
+#define CFG_ATA_DATA_OFFSET (CFG_PCMCIA_MEM_SIZE + 0x320)
+
+/* Offset for normal register accesses */
+#define CFG_ATA_REG_OFFSET (2 * CFG_PCMCIA_MEM_SIZE + 0x320)
+
+/* Offset for alternate registers */
+#define CFG_ATA_ALT_OFFSET 0x0100
+
+/*-----------------------------------------------------------------------
+ *
+ *-----------------------------------------------------------------------
+ *
+ */
+#define CFG_DER 0
+
+/*
+ * Init Memory Controller:
+ *
+ * BR0/1 and OR0/1 (FLASH)
+ */
+
+#define FLASH_BASE0_PRELIM 0x40000000 /* FLASH bank #0 */
+#define FLASH_BASE1_PRELIM 0x60000000 /* FLASH bank #0 */
+
+/* used to re-map FLASH both when starting from SRAM or FLASH:
+ * restrict access enough to keep SRAM working (if any)
+ * but not too much to meddle with FLASH accesses
+ */
+#define CFG_REMAP_OR_AM 0x80000000 /* OR addr mask */
+#define CFG_PRELIM_OR_AM 0xE0000000 /* OR addr mask */
+
+/*
+ * FLASH timing: Default value of OR0 after reset
+ */
+#define CFG_OR_TIMING_FLASH (OR_CSNT_SAM | OR_ACS_MSK | OR_BI | \
+ OR_SCY_6_CLK | OR_TRLX)
+
+#define CFG_OR0_REMAP (CFG_REMAP_OR_AM | CFG_OR_TIMING_FLASH)
+#define CFG_OR0_PRELIM (CFG_PRELIM_OR_AM | CFG_OR_TIMING_FLASH)
+#define CFG_BR0_PRELIM ((FLASH_BASE0_PRELIM & BR_BA_MSK) | BR_V )
+
+#define CFG_OR1_REMAP CFG_OR0_REMAP
+#define CFG_OR1_PRELIM CFG_OR0_PRELIM
+#define CFG_BR1_PRELIM ((FLASH_BASE1_PRELIM & BR_BA_MSK) | BR_V )
+
+/*
+ * BR2/3 and OR2/3 (SDRAM)
+ *
+ */
+#define SDRAM_BASE2_PRELIM 0x00000000 /* SDRAM bank #0 */
+#define SDRAM_BASE3_PRELIM 0x20000000 /* SDRAM bank #1 */
+#define SDRAM_MAX_SIZE (256 << 20) /* max 256 MB per bank */
+
+/* SDRAM timing: Multiplexed addresses, GPL5 output to GPL5_A (don't care) */
+#define CFG_OR_TIMING_SDRAM 0x00000A00
+
+#define CFG_OR2_PRELIM (CFG_PRELIM_OR_AM | CFG_OR_TIMING_SDRAM )
+#define CFG_BR2_PRELIM ((SDRAM_BASE2_PRELIM & BR_BA_MSK) | BR_MS_UPMA | BR_V )
+
+#ifndef CONFIG_CAN_DRIVER
+#define CFG_OR3_PRELIM CFG_OR2_PRELIM
+#define CFG_BR3_PRELIM ((SDRAM_BASE3_PRELIM & BR_BA_MSK) | BR_MS_UPMA | BR_V )
+#else /* CAN uses CS3#, so we can have only one SDRAM bank anyway */
+#define CFG_CAN_BASE 0xC0000000 /* CAN mapped at 0xC0000000 */
+#define CFG_CAN_OR_AM 0xFFFF8000 /* 32 kB address mask */
+#define CFG_OR3_CAN (CFG_CAN_OR_AM | OR_G5LA | OR_BI)
+#define CFG_BR3_CAN ((CFG_CAN_BASE & BR_BA_MSK) | \
+ BR_PS_8 | BR_MS_UPMB | BR_V )
+#endif /* CONFIG_CAN_DRIVER */
+
+/*
+ * 4096 Rows from SDRAM example configuration
+ * 1000 factor s -> ms
+ * 64 PTP (pre-divider from MPTPR) from SDRAM example configuration
+ * 4 Number of refresh cycles per period
+ * 64 Refresh cycle in ms per number of rows
+ */
+#define CFG_PTA_PER_CLK ((4096 * 64 * 1000) / (4 * 64))
+
+/*
+ * Memory Periodic Timer Prescaler
+ * Periodic timer for refresh, start with refresh rate for 40 MHz clock
+ * (CFG_8xx_CPUCLK_MIN / CFG_PTA_PER_CLK)
+ */
+#define CFG_MAMR_PTA 39
+
+/*
+ * For 16 MBit, refresh rates could be 31.3 us
+ * (= 64 ms / 2K = 125 / quad bursts).
+ * For a simpler initialization, 15.6 us is used instead.
+ *
+ * #define CFG_MPTPR_2BK_2K MPTPR_PTP_DIV32 for 2 banks
+ * #define CFG_MPTPR_1BK_2K MPTPR_PTP_DIV64 for 1 bank
+ */
+#define CFG_MPTPR_2BK_4K MPTPR_PTP_DIV16 /* setting for 2 banks */
+#define CFG_MPTPR_1BK_4K MPTPR_PTP_DIV32 /* setting for 1 bank */
+
+/* refresh rate 7.8 us (= 64 ms / 8K = 31.2 / quad bursts) for 256 MBit */
+#define CFG_MPTPR_2BK_8K MPTPR_PTP_DIV8 /* setting for 2 banks */
+#define CFG_MPTPR_1BK_8K MPTPR_PTP_DIV16 /* setting for 1 bank */
+
+/*
+ * MAMR settings for SDRAM
+ */
+
+/* 8 column SDRAM */
+#define CFG_MAMR_8COL ((CFG_MAMR_PTA << MAMR_PTA_SHIFT) | MAMR_PTAE | \
+ MAMR_AMA_TYPE_0 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A11 | \
+ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X)
+/* 9 column SDRAM */
+#define CFG_MAMR_9COL ((CFG_MAMR_PTA << MAMR_PTA_SHIFT) | MAMR_PTAE | \
+ MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \
+ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X)
+/* 10 column SDRAM */
+#define CFG_MAMR_10COL ((CFG_MAMR_PTA << MAMR_PTA_SHIFT) | MAMR_PTAE | \
+ MAMR_AMA_TYPE_2 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A9 | \
+ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X)
+
+/*
+ * Internal Definitions
+ *
+ * Boot Flags
+ */
+#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
+#define BOOTFLAG_WARM 0x02 /* Software reboot */
+
+/*
+ * Network configuration
+ */
+#define CONFIG_SCC2_ENET /* enable ethernet on SCC2 */
+#define CONFIG_FEC_ENET /* enable ethernet on FEC */
+#define CONFIG_ETHER_ON_FEC1 /* ... for FEC1 */
+#define CONFIG_ETHER_ON_FEC2 /* ... for FEC2 */
+
+#if (CONFIG_COMMANDS & CFG_CMD_MII)
+#define CFG_DISCOVER_PHY
+#endif
+
+#define CONFIG_NET_RETRY_COUNT 1 /* reduce max. timeout before
+ switching to another netwok (if the
+ tried network is unreachable) */
+
+#define CONFIG_ETHPRIME "SCC ETHERNET"
+
+#endif /* __CONFIG_H */
diff --git a/include/configs/VCMA9.h b/include/configs/VCMA9.h
index 3f29190e43..5f48a70938 100644
--- a/include/configs/VCMA9.h
+++ b/include/configs/VCMA9.h
@@ -248,6 +248,7 @@
*/
#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+#define CFG_NAND_LEGACY
#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
#define SECTORSIZE 512
diff --git a/include/configs/VOH405.h b/include/configs/VOH405.h
index 3ca137e53a..96f3d26cc5 100644
--- a/include/configs/VOH405.h
+++ b/include/configs/VOH405.h
@@ -141,6 +141,8 @@
* NAND-FLASH stuff
*-----------------------------------------------------------------------
*/
+#define CFG_NAND_LEGACY
+
#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
#define SECTORSIZE 512
diff --git a/include/configs/WUH405.h b/include/configs/WUH405.h
index d92f81f78e..faf855d249 100644
--- a/include/configs/WUH405.h
+++ b/include/configs/WUH405.h
@@ -133,6 +133,8 @@
* NAND-FLASH stuff
*-----------------------------------------------------------------------
*/
+#define CFG_NAND_LEGACY
+
#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
#define SECTORSIZE 512
diff --git a/include/configs/ZPC1900.h b/include/configs/ZPC1900.h
index f71e691b26..a5085cfb79 100644
--- a/include/configs/ZPC1900.h
+++ b/include/configs/ZPC1900.h
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2003-2004 Arabella Software Ltd.
+ * Copyright (C) 2003-2005 Arabella Software Ltd.
* Yuli Barcohen <yuli@arabellasw.com>
*
* U-Boot configuration for Zephyr Engineering ZPC.1900 board.
@@ -32,11 +32,7 @@
#define CPU_ID_STR "MPC8265"
#define CONFIG_CPM2 1 /* Has a CPM2 */
-#undef DEBUG
-
-#undef CONFIG_BOARD_EARLY_INIT_F /* Don't call board_early_init_f */
-
-/* Allow serial number (serial) and MAC address (ethaddr) to be overwritten */
+/* Allow serial number (serial#) and MAC address (ethaddr) to be overwritten */
#define CONFIG_ENV_OVERWRITE
/*
@@ -113,7 +109,6 @@
#define CONFIG_COMMANDS (CONFIG_CMD_DFL \
| CFG_CMD_ASKENV \
| CFG_CMD_DHCP \
- | CFG_CMD_ECHO \
| CFG_CMD_IMMAP \
| CFG_CMD_MII \
| CFG_CMD_PING \
@@ -154,31 +149,30 @@
#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
#define CFG_MEMTEST_START 0x00100000 /* memtest works on */
-#define CFG_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
+#define CFG_MEMTEST_END 0x03800000 /* 1 ... 56 MB in DRAM */
-#define CFG_LOAD_ADDR 0x100000 /* default load address */
+#define CFG_LOAD_ADDR 0x400000 /* default load address */
#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
-#define CFG_FLASH_BASE 0xFFE00000
-#define CFG_FLASH_CFI
-#define CFG_FLASH_CFI_DRIVER
-#define CFG_MAX_FLASH_BANKS 1 /* max num of flash banks */
-#define CFG_MAX_FLASH_SECT 32 /* max num of sects on one chip */
-
-#define CFG_DEFAULT_IMMR 0x0F010000
-
-#define CFG_IMMR 0xF0000000
#define CFG_SDRAM_BASE 0x00000000
#define CFG_SDRAM_SIZE 64
-#define CFG_FLSIMM_BASE 0xFC000000
-#define CFG_LSDRAM_BASE 0xFE000000
+
+#define CFG_IMMR 0xF0000000
+#define CFG_LSDRAM_BASE 0xFC000000
+#define CFG_FLASH_BASE 0xFE000000
#define CFG_BCSR 0xFEA00000
#define CFG_EEPROM 0xFEB00000
+#define CFG_FLSIMM_BASE 0xFF000000
-#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
+#define CFG_FLASH_CFI
+#define CFG_FLASH_CFI_DRIVER
+#define CFG_MAX_FLASH_BANKS 2 /* max num of flash banks */
+#define CFG_MAX_FLASH_SECT 32 /* max num of sects on one chip */
+
+#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE, CFG_FLSIMM_BASE }
#define BCSR_PCI_MODE 0x01
@@ -190,10 +184,10 @@
/* Hard reset configuration word */
#define CFG_HRCW_MASTER (HRCW_EBM | HRCW_BPS01| HRCW_CIP |\
- HRCW_L2CPC10 | HRCW_DPPC00 | HRCW_ISB010 |\
- HRCW_BMS | HRCW_LBPC01 | HRCW_APPC10 |\
- HRCW_MODCK_H0101 \
- ) /* 0x16828605 */
+ HRCW_L2CPC10 | HRCW_DPPC00 | HRCW_ISB100 |\
+ HRCW_BMS | HRCW_LBPC00 | HRCW_APPC10 |\
+ HRCW_MODCK_H0111 \
+ ) /* 0x16848207 */
/* No slaves */
#define CFG_HRCW_SLAVE1 0
#define CFG_HRCW_SLAVE2 0
@@ -211,7 +205,7 @@
#define CFG_RAMBOOT
#endif
-#define CFG_MONITOR_LEN (192 << 10) /* Reserve 192 kB for Monitor */
+#define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
#define CFG_MALLOC_LEN (4096 << 10) /* Reserve 4 MB for malloc() */
#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
@@ -233,14 +227,14 @@
# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
-#define CFG_HID0_INIT 0
-#define CFG_HID0_FINAL (HID0_ICE | HID0_IFEM | HID0_ABE )
+#define CFG_HID0_INIT (HID0_ICFI)
+#define CFG_HID0_FINAL (HID0_ICE | HID0_IFEM | HID0_ABE)
#define CFG_HID2 0
#define CFG_SIUMCR 0x42200000
#define CFG_SYPCR 0xFFFFFFC3
-#define CFG_BCR 0x90400000
+#define CFG_BCR 0x90000000
#define CFG_SCCR SCCR_DFBRG01
#define CFG_RMR RMR_CSRE
@@ -248,18 +242,23 @@
#define CFG_PISCR (PISCR_PS|PISCR_PTF|PISCR_PTE)
#define CFG_RCCR 0
-#define CFG_PSDMR 0x014EB45A
-#define CFG_PSRT 0x0C
-#define CFG_LSDMR 0x008AB552
-#define CFG_LSRT 0x0E
+#define CFG_PSDMR /* 0x834DA43B */0x014DA43A
+#define CFG_PSRT 0x0F/* 0x0C */
+#define CFG_LSDMR 0x0085A562
+#define CFG_LSRT 0x0F
#define CFG_MPTPR 0x4000
+#define CFG_PSDRAM_BR CFG_SDRAM_BASE | 0x00000041
+#define CFG_PSDRAM_OR 0xFC0028C0
+#define CFG_LSDRAM_BR CFG_LSDRAM_BASE | 0x00001861
+#define CFG_LSDRAM_OR 0xFF803480
+
#define CFG_BR0_PRELIM CFG_FLASH_BASE | 0x00000801
#define CFG_OR0_PRELIM 0xFFE00856
#define CFG_BR5_PRELIM CFG_EEPROM | 0x00000801
#define CFG_OR5_PRELIM 0xFFFF03F6
-#define CFG_BR6_PRELIM CFG_FLSIMM_BASE | 0x00000801
-#define CFG_OR6_PRELIM 0xFE000856
+#define CFG_BR6_PRELIM CFG_FLSIMM_BASE | 0x00001801
+#define CFG_OR6_PRELIM 0xFF000856
#define CFG_BR7_PRELIM CFG_BCSR | 0x00000801
#define CFG_OR7_PRELIM 0xFFFF83F6
diff --git a/include/configs/aev.h b/include/configs/aev.h
index aa6bc91b20..8d9f0a1661 100644
--- a/include/configs/aev.h
+++ b/include/configs/aev.h
@@ -1,5 +1,5 @@
/*
- * (C) Copyright 2003-2005
+ * (C) Copyright 2003-2006
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* (C) Copyright 2004-2005
@@ -370,10 +370,7 @@
#define CFG_CS0_START CFG_FLASH_BASE
#define CFG_CS0_SIZE CFG_FLASH_SIZE
-/* automatic configuration of chip selects */
-#ifdef CONFIG_CS_AUTOCONF
#define CONFIG_LAST_STAGE_INIT
-#endif
/*
* SRAM - Do not map below 2 GB in address space, because this area is used
diff --git a/include/configs/bamboo.h b/include/configs/bamboo.h
index eacc74446c..2c1c31927c 100644
--- a/include/configs/bamboo.h
+++ b/include/configs/bamboo.h
@@ -1,5 +1,5 @@
/*
- * (C) Copyright 2005
+ * (C) Copyright 2005-2006
* Stefan Roese, DENX Software Engineering, sr@denx.de.
*
* See file CREDITS for list of people who contributed to this
@@ -43,12 +43,13 @@
* 2nd ethernet port you have to "undef" the following define.
*/
#define CONFIG_BAMBOO_NAND 1 /* enable nand flash support */
+#define CFG_NAND_LEGACY
/*-----------------------------------------------------------------------
* Base addresses -- Note these are effective addresses where the
* actual resources get mapped (not physical addresses)
*----------------------------------------------------------------------*/
-#define CFG_MONITOR_LEN (512 * 1024) /* Reserve 512 kB for Monitor */
+#define CFG_MONITOR_LEN (384 * 1024) /* Reserve 384 kB for Monitor */
#define CFG_MALLOC_LEN (256 * 1024) /* Reserve 256 kB for malloc() */
#define CFG_MONITOR_BASE (-CFG_MONITOR_LEN)
#define CFG_SDRAM_BASE 0x00000000 /* _must_ be 0 */
@@ -256,8 +257,8 @@
"kernel_addr=fff00000\0" \
"ramdisk_addr=fff10000\0" \
"load=tftp 100000 /tftpboot/bamboo/u-boot.bin\0" \
- "update=protect off fff80000 ffffffff;era fff80000 ffffffff;" \
- "cp.b 100000 fff80000 80000;" \
+ "update=protect off fffa0000 ffffffff;era fffa0000 ffffffff;" \
+ "cp.b 100000 fffa0000 60000;" \
"setenv filesize;saveenv\0" \
"upd=run load;run update\0" \
""
@@ -357,6 +358,14 @@
#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
+#define CONFIG_CMDLINE_EDITING
+
+#ifdef CONFIG_CMDLINE_EDITING
+#undef CONFIG_AUTO_COMPLETE
+#else
+#define CONFIG_AUTO_COMPLETE
+#endif
+
/*-----------------------------------------------------------------------
* PCI stuff
*-----------------------------------------------------------------------
diff --git a/include/configs/cmc_pu2.h b/include/configs/cmc_pu2.h
index 46280f7e32..572a70f120 100644
--- a/include/configs/cmc_pu2.h
+++ b/include/configs/cmc_pu2.h
@@ -108,7 +108,7 @@
/* still about 20 kB free with this defined */
#define CFG_LONGHELP
-#define CONFIG_BOOTDELAY 3
+#define CONFIG_BOOTDELAY 1
#ifdef CONFIG_HARD_I2C
#define CONFIG_COMMANDS \
@@ -206,15 +206,6 @@ struct bd_info_ext {
#error CONFIG_USE_IRQ not supported
#endif
-#define CFG_DEVICE_NULLDEV 1 /* enble null device */
-#define CONFIG_SILENT_CONSOLE 1 /* enable silent startup */
-
-#define CONFIG_AUTOBOOT_KEYED
-#define CONFIG_AUTOBOOT_PROMPT "autoboot in %d seconds\n"
-#define CONFIG_AUTOBOOT_STOP_STR "R" /* default password */
-
-#define CONFIG_VERSION_VARIABLE 1 /* include version env variable */
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"net_nfs=tftp ${loadaddr} ${bootfile};run nfsargs addip addcons " \
"addmtd;bootm\0" \
diff --git a/include/configs/dbau1x00.h b/include/configs/dbau1x00.h
index 0a10e3c75b..4cc5085293 100644
--- a/include/configs/dbau1x00.h
+++ b/include/configs/dbau1x00.h
@@ -81,8 +81,7 @@
CFG_CMD_MII | CFG_CMD_RUN | CFG_CMD_BDI | CFG_CMD_BEDBUG | \
CFG_CMD_NFS | CFG_CMD_ELF | CFG_CMD_PCMCIA | CFG_CMD_I2C))
#else /* CONFIG_DBAU1550 */
-/* Boot from Compact flash partition 2 as default */
-#define CONFIG_BOOTCOMMAND "ide reset;disk 0x81000000 0:2;bootm"
+#define CONFIG_BOOTCOMMAND "bootp;bootm"
#define CONFIG_COMMANDS ((CONFIG_CMD_DFL | CFG_CMD_IDE | CFG_CMD_DHCP | CFG_CMD_ELF) & \
~(CFG_CMD_ENV | CFG_CMD_FAT | CFG_CMD_FLASH | CFG_CMD_FPGA | \
@@ -133,8 +132,6 @@
#define PHYS_FLASH_1 0xb8000000 /* Flash Bank #1 */
#define PHYS_FLASH_2 0xbc000000 /* Flash Bank #2 */
-#define CFG_FLASH_BANKS_LIST {PHYS_FLASH_1, PHYS_FLASH_2}
-
#else /* CONFIG_DBAU1550 */
#define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */
@@ -145,6 +142,8 @@
#endif /* CONFIG_DBAU1550 */
+#define CFG_FLASH_BANKS_LIST {PHYS_FLASH_1, PHYS_FLASH_2}
+
#define CFG_FLASH_CFI 1
#define CFG_FLASH_CFI_DRIVER 1
diff --git a/include/configs/delta.h b/include/configs/delta.h
new file mode 100644
index 0000000000..91284fdace
--- /dev/null
+++ b/include/configs/delta.h
@@ -0,0 +1,242 @@
+/*
+ * Configuation settings for the Delta board.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * High Level Configuration Options
+ * (easy to change)
+ */
+#define CONFIG_CPU_MONAHANS 1 /* Intel Monahan CPU */
+#define CONFIG_DELTA 1 /* Delta board */
+
+/* #define CONFIG_LCD 1 */
+#ifdef CONFIG_LCD
+#define CONFIG_SHARP_LM8V31
+#endif
+/* #define CONFIG_MMC 1 */
+#define BOARD_LATE_INIT 1
+
+#undef CONFIG_SKIP_RELOCATE_UBOOT
+#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
+
+/*
+ * Size of malloc() pool
+ */
+#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 256*1024)
+#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
+
+/*
+ * Hardware drivers
+ */
+#undef TURN_ON_ETHERNET
+#ifdef TURN_ON_ETHERNET
+# define CONFIG_DRIVER_SMC91111 1
+# define CONFIG_SMC91111_BASE 0x14000300
+# define CONFIG_SMC91111_EXT_PHY
+# define CONFIG_SMC_USE_32_BIT
+# undef CONFIG_SMC_USE_IOFUNCS /* just for use with the kernel */
+#endif
+
+#define CONFIG_HARD_I2C 1 /* required for DA9030 access */
+#define CFG_I2C_SPEED 400000 /* I2C speed */
+#define CFG_I2C_SLAVE 1 /* I2C controllers address */
+#define DA9030_I2C_ADDR 0x49 /* I2C address of DA9030 */
+#define CFG_DA9030_EXTON_DELAY 100000 /* wait x us after DA9030 reset via EXTON */
+#define CFG_I2C_INIT_BOARD 1
+/* #define CONFIG_HW_WATCHDOG 1 /\* Required for hitting the DA9030 WD *\/ */
+
+#define DELTA_CHECK_KEYBD 1 /* check for keys pressed during boot */
+#define CONFIG_PREBOOT "\0"
+
+#ifdef DELTA_CHECK_KEYBD
+# define KEYBD_DATALEN 4 /* we have four keys */
+# define KEYBD_KP_DKIN0 0x1 /* vol+ */
+# define KEYBD_KP_DKIN1 0x2 /* vol- */
+# define KEYBD_KP_DKIN2 0x3 /* multi */
+# define KEYBD_KP_DKIN5 0x4 /* SWKEY_GN */
+#endif /* DELTA_CHECK_KEYBD */
+
+/*
+ * select serial console configuration
+ */
+#define CONFIG_FFUART 1
+
+/* allow to overwrite serial and ethaddr */
+#define CONFIG_ENV_OVERWRITE
+
+#define CONFIG_BAUDRATE 115200
+
+/* #define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_MMC | CFG_CMD_FAT) */
+#ifdef TURN_ON_ETHERNET
+# define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_PING)
+#else
+# define CONFIG_COMMANDS ((CONFIG_CMD_DFL \
+ | CFG_CMD_ENV \
+ | CFG_CMD_NAND \
+ | CFG_CMD_I2C) \
+ & ~(CFG_CMD_NET \
+ | CFG_CMD_FLASH \
+ | CFG_CMD_IMLS))
+#endif
+
+
+/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
+#include <cmd_confdefs.h>
+
+#define CONFIG_BOOTDELAY -1
+#define CONFIG_ETHADDR 08:00:3e:26:0a:5b
+#define CONFIG_NETMASK 255.255.0.0
+#define CONFIG_IPADDR 192.168.0.21
+#define CONFIG_SERVERIP 192.168.0.250
+#define CONFIG_BOOTCOMMAND "bootm 80000"
+#define CONFIG_BOOTARGS "root=/dev/mtdblock2 rootfstype=cramfs console=ttyS0,115200"
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_TIMESTAMP
+
+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
+#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
+#endif
+
+/*
+ * Miscellaneous configurable options
+ */
+#define CFG_HUSH_PARSER 1
+#define CFG_PROMPT_HUSH_PS2 "> "
+
+#define CFG_LONGHELP /* undef to save memory */
+#ifdef CFG_HUSH_PARSER
+#define CFG_PROMPT "$ " /* Monitor Command Prompt */
+#else
+#define CFG_PROMPT "=> " /* Monitor Command Prompt */
+#endif
+#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
+#define CFG_MAXARGS 16 /* max number of command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+#define CFG_DEVICE_NULLDEV 1
+
+#define CFG_MEMTEST_START 0x80400000 /* memtest works on */
+#define CFG_MEMTEST_END 0x80800000 /* 4 ... 8 MB in DRAM */
+
+#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
+
+#define CFG_LOAD_ADDR (CFG_DRAM_BASE + 0x8000) /* default load address */
+
+#define CFG_HZ 3250000 /* incrementer freq: 3.25 MHz */
+
+/* Monahans Core Frequency */
+#define CFG_MONAHANS_RUN_MODE_OSC_RATIO 16 /* valid values: 8, 16, 24, 31 */
+#define CFG_MONAHANS_TURBO_RUN_MODE_RATIO 1 /* valid values: 1, 2 */
+
+
+ /* valid baudrates */
+#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
+
+/* #define CFG_MMC_BASE 0xF0000000 */
+
+/*
+ * Stack sizes
+ *
+ * The stack sizes are set up in start.S using the settings below
+ */
+#define CONFIG_STACKSIZE (128*1024) /* regular stack */
+#ifdef CONFIG_USE_IRQ
+#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
+#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
+#endif
+
+/*
+ * Physical Memory Map
+ */
+#define CONFIG_NR_DRAM_BANKS 4 /* we have 2 banks of DRAM */
+#define PHYS_SDRAM_1 0x80000000 /* SDRAM Bank #1 */
+#define PHYS_SDRAM_1_SIZE 0x1000000 /* 64 MB */
+#define PHYS_SDRAM_2 0x81000000 /* SDRAM Bank #2 */
+#define PHYS_SDRAM_2_SIZE 0x1000000 /* 64 MB */
+#define PHYS_SDRAM_3 0x82000000 /* SDRAM Bank #3 */
+#define PHYS_SDRAM_3_SIZE 0x1000000 /* 64 MB */
+#define PHYS_SDRAM_4 0x83000000 /* SDRAM Bank #4 */
+#define PHYS_SDRAM_4_SIZE 0x1000000 /* 64 MB */
+
+#define CFG_DRAM_BASE 0x80000000 /* at CS0 */
+#define CFG_DRAM_SIZE 0x04000000 /* 64 MB Ram */
+
+#undef CFG_SKIP_DRAM_SCRUB
+
+/*
+ * NAND Flash
+ */
+/* Use the new NAND code. (BOARDLIBS = drivers/nand/libnand.a required) */
+#undef CFG_NAND_LEGACY
+
+#define CFG_NAND0_BASE 0x0 /* 0x43100040 */ /* 0x10000000 */
+#undef CFG_NAND1_BASE
+
+#define CFG_NAND_BASE_LIST { CFG_NAND0_BASE }
+#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
+
+/* nand timeout values */
+#define CFG_NAND_PROG_ERASE_TO 3000
+#define CFG_NAND_OTHER_TO 100
+#define CFG_NAND_SENDCMD_RETRY 3
+#undef NAND_ALLOW_ERASE_ALL /* Allow erasing bad blocks - don't use */
+
+/* NAND Timing Parameters (in ns) */
+#define NAND_TIMING_tCH 10
+#define NAND_TIMING_tCS 0
+#define NAND_TIMING_tWH 20
+#define NAND_TIMING_tWP 40
+
+#define NAND_TIMING_tRH 20
+#define NAND_TIMING_tRP 40
+
+#define NAND_TIMING_tR 11123
+#define NAND_TIMING_tWHR 100
+#define NAND_TIMING_tAR 10
+
+/* NAND debugging */
+#define CFG_DFC_DEBUG1 /* usefull */
+#undef CFG_DFC_DEBUG2 /* noisy */
+#undef CFG_DFC_DEBUG3 /* extremly noisy */
+
+#define CONFIG_MTD_DEBUG
+#define CONFIG_MTD_DEBUG_VERBOSE 1
+
+#define ADDR_COLUMN 1
+#define ADDR_PAGE 2
+#define ADDR_COLUMN_PAGE 3
+
+#define NAND_ChipID_UNKNOWN 0x00
+#define NAND_MAX_FLOORS 1
+#define NAND_MAX_CHIPS 1
+
+#define CFG_NO_FLASH 1
+
+#define CFG_ENV_IS_IN_NAND 1
+#define CFG_ENV_OFFSET 0x40000
+#define CFG_ENV_OFFSET_REDUND 0x44000
+#define CFG_ENV_SIZE 0x4000
+
+#endif /* __CONFIG_H */
diff --git a/include/configs/ezkit533.h b/include/configs/ezkit533.h
new file mode 100644
index 0000000000..5eda6732ca
--- /dev/null
+++ b/include/configs/ezkit533.h
@@ -0,0 +1,188 @@
+#ifndef __CONFIG_EZKIT533_H__
+#define __CONFIG_EZKIT533_H__
+
+#define CFG_LONGHELP 1
+#define CONFIG_BAUDRATE 57600
+#define CONFIG_STAMP 1
+#define CONFIG_BOOTDELAY 5
+
+#define CONFIG_DRIVER_SMC91111 1
+#define CONFIG_SMC91111_BASE 0x20310300
+#if 0
+#define CONFIG_MII
+#define CFG_DISCOVER_PHY
+#endif
+
+#define CONFIG_RTC_BF533 1
+#define CONFIG_BOOT_RETRY_TIME -1 /* Enable this if bootretry required, currently its disabled */
+
+/* CONFIG_CLKIN_HZ is any value in Hz */
+#define CONFIG_CLKIN_HZ 27000000
+/* CONFIG_CLKIN_HALF controls what is passed to PLL 0=CLKIN */
+/* 1=CLKIN/2 */
+#define CONFIG_CLKIN_HALF 0
+/* CONFIG_PLL_BYPASS controls if the PLL is used 0=don't bypass */
+/* 1=bypass PLL */
+#define CONFIG_PLL_BYPASS 0
+/* CONFIG_VCO_MULT controls what the multiplier of the PLL is. */
+/* Values can range from 1-64 */
+#define CONFIG_VCO_MULT 22
+/* CONFIG_CCLK_DIV controls what the core clock divider is */
+/* Values can be 1, 2, 4, or 8 ONLY */
+#define CONFIG_CCLK_DIV 1
+/* CONFIG_SCLK_DIV controls what the peripheral clock divider is */
+/* Values can range from 1-15 */
+#define CONFIG_SCLK_DIV 5
+
+#if ( CONFIG_CLKIN_HALF == 0 )
+#define CONFIG_VCO_HZ ( CONFIG_CLKIN_HZ * CONFIG_VCO_MULT )
+#else
+#define CONFIG_VCO_HZ (( CONFIG_CLKIN_HZ * CONFIG_VCO_MULT ) / 2 )
+#endif
+
+#if (CONFIG_PLL_BYPASS == 0)
+#define CONFIG_CCLK_HZ ( CONFIG_VCO_HZ / CONFIG_CCLK_DIV )
+#define CONFIG_SCLK_HZ ( CONFIG_VCO_HZ / CONFIG_SCLK_DIV )
+#else
+#define CONFIG_CCLK_HZ CONFIG_CLKIN_HZ
+#define CONFIG_SCLK_HZ CONFIG_CLKIN_HZ
+#endif
+
+#define CONFIG_MEM_SIZE 32 /* 128, 64, 32, 16 */
+#define CONFIG_MEM_ADD_WDTH 9 /* 8, 9, 10, 11 */
+#define CONFIG_MEM_MT48LC16M16A2TG_75 1
+
+#define CONFIG_LOADS_ECHO 1
+
+
+#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
+ CFG_CMD_PING | \
+ CFG_CMD_ELF | \
+ CFG_CMD_I2C | \
+ CFG_CMD_JFFS2 | \
+ CFG_CMD_DATE)
+#define CONFIG_BOOTARGS "root=/dev/mtdblock0 ip=192.168.0.15:192.168.0.2:192.168.0.1:255.255.255.0:ezkit:eth0:off"
+
+/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
+#include <cmd_confdefs.h>
+
+#define CFG_PROMPT "ezkit> " /* Monitor Command Prompt */
+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
+#else
+#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
+#endif
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
+#define CFG_MAXARGS 16 /* max number of command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+#define CFG_MEMTEST_START 0x00100000 /* memtest works on */
+#define CFG_MEMTEST_END 0x01F00000 /* 1 ... 31 MB in DRAM */
+#define CFG_LOAD_ADDR 0x01000000 /* default load address */
+#define CFG_HZ 1000 /* decrementer freq: 10 ms ticks */
+#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
+#define CFG_SDRAM_BASE 0x00000000
+#define CFG_MAX_RAM_SIZE 0x02000000
+#define CFG_FLASH_BASE 0x20000000
+
+#define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
+#define CFG_MONITOR_BASE (CFG_MAX_RAM_SIZE - CFG_MONITOR_LEN)
+#define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
+#define CFG_MALLOC_BASE (CFG_MONITOR_BASE - CFG_MALLOC_LEN)
+#define CFG_GBL_DATA_SIZE 0x4000
+#define CFG_GBL_DATA_ADDR (CFG_MALLOC_BASE - CFG_GBL_DATA_SIZE)
+#define CONFIG_STACKBASE (CFG_GBL_DATA_ADDR - 4)
+
+#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
+#define CFG_FLASH0_BASE 0x20000000
+#define CFG_FLASH1_BASE 0x20200000
+#define CFG_FLASH2_BASE 0x20280000
+#define CFG_MAX_FLASH_BANKS 3 /* max number of memory banks */
+#define CFG_MAX_FLASH_SECT 40 /* max number of sectors on one chip */
+
+#define CFG_ENV_IS_IN_FLASH 1
+#define CFG_ENV_ADDR 0x20020000
+#define CFG_ENV_SECT_SIZE 0x10000 /* Total Size of Environment Sector */
+
+/* JFFS Partition offset set */
+#define CFG_JFFS2_FIRST_BANK 0
+#define CFG_JFFS2_NUM_BANKS 1
+/* 512k reserved for u-boot */
+#define CFG_JFFS2_FIRST_SECTOR 11
+
+
+/*
+ * Stack sizes
+ */
+#define CONFIG_STACKSIZE (128*1024) /* regular stack */
+
+#define POLL_MODE 1
+#define FLASH_TOT_SECT 40
+#define FLASH_SIZE 0x220000
+#define CFG_FLASH_SIZE 0x220000
+
+/*
+ * Initialize PSD4256 registers for using I2C
+ */
+#define CONFIG_MISC_INIT_R
+
+/*
+ * I2C settings
+ * By default PF1 is used as SDA and PF0 as SCL on the Stamp board
+ */
+#define CONFIG_SOFT_I2C 1 /* I2C bit-banged */
+/*
+ * Software (bit-bang) I2C driver configuration
+ */
+#define PF_SCL PF0
+#define PF_SDA PF1
+
+#define I2C_INIT (*pFIO_DIR |= PF_SCL); asm("ssync;")
+#define I2C_ACTIVE (*pFIO_DIR |= PF_SDA); *pFIO_INEN &= ~PF_SDA; asm("ssync;")
+#define I2C_TRISTATE (*pFIO_DIR &= ~PF_SDA); *pFIO_INEN |= PF_SDA; asm("ssync;")
+#define I2C_READ ((volatile)(*pFIO_FLAG_D & PF_SDA) != 0); asm("ssync;")
+#define I2C_SDA(bit) if(bit) { \
+ *pFIO_FLAG_S = PF_SDA; \
+ asm("ssync;"); \
+ } \
+ else { \
+ *pFIO_FLAG_C = PF_SDA; \
+ asm("ssync;"); \
+ }
+#define I2C_SCL(bit) if(bit) { \
+ *pFIO_FLAG_S = PF_SCL; \
+ asm("ssync;"); \
+ } \
+ else { \
+ *pFIO_FLAG_C = PF_SCL; \
+ asm("ssync;"); \
+ }
+#define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */
+
+#define CFG_I2C_SPEED 50000
+#define CFG_I2C_SLAVE 0xFE
+
+
+#define __ADSPLPBLACKFIN__ 1
+#define __ADSPBF533__ 1
+
+/* 0xFF, 0x7BB07BB0, 0x22547BB0 */
+/* #define AMGCTLVAL (AMBEN_P0 | AMBEN_P1 | AMBEN_P2 | AMCKEN)
+#define AMBCTL0VAL (B1WAT_7 | B1RAT_11 | B1HT_2 | B1ST_3 | B1TT_4 | ~B1RDYPOL | \
+ ~B1RDYEN | B0WAT_7 | B0RAT_11 | B0HT_2 | B0ST_3 | B0TT_4 | ~B0RDYPOL | ~B0RDYEN)
+#define AMBCTL1VAL (B3WAT_2 | B3RAT_2 | B3HT_1 | B3ST_1 | B3TT_4 | B3RDYPOL | ~B3RDYEN | \
+ B2WAT_7 | B2RAT_11 | B2HT_2 | B2ST_3 | B2TT_4 | ~B2RDYPOL | ~B2RDYEN)
+*/
+#define AMGCTLVAL 0xFF
+#define AMBCTL0VAL 0x7BB07BB0
+#define AMBCTL1VAL 0xFFC27BB0
+
+#define CONFIG_VDSP 1
+
+#ifdef CONFIG_VDSP
+#define ET_EXEC_VDSP 0x8
+#define SHT_STRTAB_VDSP 0x1
+#define ELFSHDRSIZE_VDSP 0x2C
+#define VDSP_ENTRY_ADDR 0xFFA00000
+#endif
+
+#endif
diff --git a/include/configs/gth2.h b/include/configs/gth2.h
new file mode 100644
index 0000000000..a49ed3bae3
--- /dev/null
+++ b/include/configs/gth2.h
@@ -0,0 +1,195 @@
+/*
+ * (C) Copyright 2005
+ * Thomas.Lange@corelatus.se
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * This file contains the configuration parameters for the gth2 board.
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#define CONFIG_MIPS32 1 /* MIPS32 CPU core */
+#define CONFIG_GTH2 1
+#define CONFIG_AU1X00 1 /* alchemy series cpu */
+
+#define CONFIG_AU1000 1
+
+#define CONFIG_MISC_INIT_R 1
+
+#define CONFIG_ETHADDR DE:AD:BE:EF:01:02 /* Ethernet address */
+
+#define CONFIG_BOOTDELAY 1 /* autoboot after 1 seconds */
+
+#define CONFIG_ENV_OVERWRITE 1 /* Allow change of ethernet address */
+
+#define CONFIG_BOOT_RETRY_TIME 5 /* Retry boot in 5 secs */
+
+#define CONFIG_RESET_TO_RETRY 1 /* If timeout waiting for command, perform a reset */
+
+#define CONFIG_BAUDRATE 115200
+
+/* valid baudrates */
+#define CFG_BAUDRATE_TABLE { 115200 }
+
+/* Only interrupt boot if space is pressed */
+/* If a long serial cable is connected but */
+/* other end is dead, garbage will be read */
+#define CONFIG_AUTOBOOT_KEYED 1
+#define CONFIG_AUTOBOOT_PROMPT "Press space to abort autoboot in %d second\n"
+#define CONFIG_AUTOBOOT_DELAY_STR "d"
+#define CONFIG_AUTOBOOT_STOP_STR " "
+
+#define CONFIG_TIMESTAMP /* Print image info with timestamp */
+#define CONFIG_BOOTARGS "panic=1"
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "addmisc=setenv bootargs $(bootargs) " \
+ "ethaddr=$(ethaddr) \0" \
+ "netboot=bootp;run addmisc;bootm\0" \
+ ""
+
+/* Boot from Compact flash partition 2 as default */
+#define CONFIG_BOOTCOMMAND "ide reset;disk 0x81000000 0:2;run addmisc;bootm"
+
+#define CONFIG_COMMANDS ((CONFIG_CMD_DFL | CFG_CMD_IDE | CFG_CMD_DHCP ) & \
+ ~(CFG_CMD_ENV | CFG_CMD_FAT | CFG_CMD_FLASH | CFG_CMD_FPGA | \
+ CFG_CMD_MII | CFG_CMD_LOADS | CFG_CMD_LOADB | CFG_CMD_ELF | \
+ CFG_CMD_BDI | CFG_CMD_BEDBUG | CFG_CMD_NFS | CFG_CMD_AUTOSCRIPT ))
+
+#include <cmd_confdefs.h>
+
+/*
+ * Miscellaneous configurable options
+ */
+#define CFG_LONGHELP /* undef to save memory */
+#define CFG_PROMPT "GTH2 # " /* Monitor Command Prompt */
+#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
+#define CFG_MAXARGS 16 /* max number of command args*/
+
+#define CFG_MALLOC_LEN 128*1024
+
+#define CFG_BOOTPARAMS_LEN 128*1024
+
+#define CFG_MHZ 500
+
+#define CFG_HZ (CFG_MHZ * 1000000) /* FIXME causes overflow in net.c */
+
+#define CFG_SDRAM_BASE 0x80000000 /* Cached addr */
+
+#define CFG_LOAD_ADDR 0x81000000 /* default load address */
+
+#define CFG_MEMTEST_START 0x80100000
+#define CFG_MEMTEST_END 0x83000000
+
+#define CONFIG_HW_WATCHDOG 1
+
+/*-----------------------------------------------------------------------
+ * FLASH and environment organization
+ */
+#define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */
+#define CFG_MAX_FLASH_SECT (128) /* max number of sectors on one chip */
+
+#define PHYS_FLASH 0xbfc00000 /* Flash Bank #1 */
+
+/* The following #defines are needed to get flash environment right */
+#define CFG_MONITOR_BASE TEXT_BASE
+#define CFG_MONITOR_LEN (192 << 10)
+
+#define CFG_INIT_SP_OFFSET 0x400000
+
+/* We boot from this flash, selected with dip switch */
+#define CFG_FLASH_BASE PHYS_FLASH
+
+/* timeout values are in ticks */
+#define CFG_FLASH_ERASE_TOUT (2 * CFG_HZ) /* Timeout for Flash Erase */
+#define CFG_FLASH_WRITE_TOUT (2 * CFG_HZ) /* Timeout for Flash Write */
+
+#define CFG_ENV_IS_NOWHERE 1
+
+/* Address and size of Primary Environment Sector */
+#define CFG_ENV_ADDR 0xB0030000
+#define CFG_ENV_SIZE 0x10000
+
+#define CONFIG_FLASH_16BIT
+
+#define CONFIG_NR_DRAM_BANKS 2
+
+#define CONFIG_NET_MULTI
+
+#define CONFIG_MEMSIZE_IN_BYTES
+
+/*---ATA PCMCIA ------------------------------------*/
+#define CFG_PCMCIA_MEM_SIZE 0x4000000 /* Offset to slot 1 FIXME!!! */
+
+#define CFG_PCMCIA_MEM_ADDR 0x20000000
+#define CFG_PCMCIA_IO_BASE 0x28000000
+#define CFG_PCMCIA_ATTR_BASE 0x30000000
+
+#define CONFIG_PCMCIA_SLOT_A
+
+#define CONFIG_ATAPI 1
+#define CONFIG_MAC_PARTITION 1
+
+/* We run CF in "true ide" mode or a harddrive via pcmcia */
+#define CONFIG_IDE_PCMCIA 1
+
+/* We only support one slot for now */
+#define CFG_IDE_MAXBUS 1 /* max. 1 IDE bus */
+#define CFG_IDE_MAXDEVICE 1 /* max. 1 drive per IDE bus */
+
+#undef CONFIG_IDE_LED /* LED for ide not supported */
+#undef CONFIG_IDE_RESET /* reset for ide not supported */
+
+#define CFG_ATA_IDE0_OFFSET 0
+
+#define CFG_ATA_BASE_ADDR CFG_PCMCIA_IO_BASE
+
+/* Offset for data I/O */
+#define CFG_ATA_DATA_OFFSET 0
+
+/* Offset for normal register accesses */
+#define CFG_ATA_REG_OFFSET 0
+
+/* Offset for alternate registers */
+#define CFG_ATA_ALT_OFFSET 0x0200
+
+/*-----------------------------------------------------------------------
+ * Cache Configuration
+ */
+#define CFG_DCACHE_SIZE 16384
+#define CFG_ICACHE_SIZE 16384
+#define CFG_CACHELINE_SIZE 32
+
+#define GPIO_CACONFIG (1<<0)
+#define GPIO_DPACONFIG (1<<6)
+#define GPIO_ERESET (1<<11)
+#define GPIO_EEDQ (1<<17)
+#define GPIO_WDI (1<<18)
+#define GPIO_RJ1LY (1<<22)
+#define GPIO_RJ1LG (1<<23)
+#define GPIO_LEDCLK (1<<29)
+#define GPIO_LEDD (1<<30)
+#define GPIO_CPU_LED (1<<31)
+
+#endif /* __CONFIG_H */
diff --git a/include/configs/gw8260.h b/include/configs/gw8260.h
index 6c080437ff..4f83b1945d 100644
--- a/include/configs/gw8260.h
+++ b/include/configs/gw8260.h
@@ -305,7 +305,6 @@
CFG_CMD_BEDBUG | \
CFG_CMD_ELF | \
CFG_CMD_ASKENV | \
- CFG_CMD_ECHO | \
CFG_CMD_REGINFO | \
CFG_CMD_IMMAP | \
CFG_CMD_MII)
diff --git a/include/configs/inka4x0.h b/include/configs/inka4x0.h
index c0cc4f1fbe..773d5d2c1d 100644
--- a/include/configs/inka4x0.h
+++ b/include/configs/inka4x0.h
@@ -101,7 +101,7 @@
/*
* Autobooting
*/
-#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
+#define CONFIG_BOOTDELAY 1 /* autoboot after 1 second */
#define CONFIG_PREBOOT "echo;" \
"echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
@@ -109,6 +109,16 @@
#undef CONFIG_BOOTARGS
+#define CONFIG_ETHADDR 00:a0:a4:03:00:00
+#define CONFIG_OVERWRITE_ETHADDR_ONCE
+
+#define CONFIG_IPADDR 192.168.100.2
+#define CONFIG_SERVERIP 192.168.100.1
+#define CONFIG_NETMASK 255.255.255.0
+#define HOSTNAME inka4x0
+#define CONFIG_BOOTFILE /tftpboot/inka4x0/uImage
+#define CONFIG_ROOTPATH /opt/eldk/ppc_6xx
+
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
"nfsargs=setenv bootargs root=/dev/nfs rw " \
@@ -117,13 +127,22 @@
"addip=setenv bootargs ${bootargs} " \
"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
":${hostname}:${netdev}:off panic=1\0" \
- "flash_nfs=run nfsargs addip;" \
+ "addcons=setenv bootargs ${bootargs} " \
+ "console=ttyS0,${baudrate}\0" \
+ "flash_nfs=run nfsargs addip addcons;" \
"bootm ${kernel_addr}\0" \
- "net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0" \
- "rootpath=/opt/eldk/ppc_82xx\0" \
+ "net_nfs=tftp 200000 ${bootfile};" \
+ "run nfsargs addip addcons;bootm\0" \
+ "enable_disp=mw.l 100000 04000000 1;" \
+ "cp.l 100000 f0000b20 1;" \
+ "cp.l 100000 f0000b28 1\0" \
+ "ideargs=setenv bootargs root=/dev/hda1 rw\0" \
+ "ide_boot=ext2load ide 0:1 200000 uImage;" \
+ "run ideargs addip addcons enable_disp;bootm" \
+ "brightness=255\0" \
""
-#define CONFIG_BOOTCOMMAND "run net_nfs"
+#define CONFIG_BOOTCOMMAND "run ide_boot"
/*
* IPB Bus clocking configuration.
@@ -193,6 +212,7 @@
*/
/* #define CONFIG_FEC_10MBIT 1 */
#define CONFIG_PHY_ADDR 0x00
+#define CONFIG_MII
/*
* GPIO configuration
diff --git a/include/configs/ixdp425.h b/include/configs/ixdp425.h
index b0a80a3ea2..9f9fdb25e2 100644
--- a/include/configs/ixdp425.h
+++ b/include/configs/ixdp425.h
@@ -33,6 +33,9 @@
#define CONFIG_IXP425 1 /* This is an IXP425 CPU */
#define CONFIG_IXDP425 1 /* on an IXDP425 Board */
+#define CONFIG_DISPLAY_CPUINFO 1 /* display cpu info (and speed) */
+#define CONFIG_DISPLAY_BOARDINFO 1 /* display board info */
+
/***************************************************************
* U-boot generic defines start here.
***************************************************************/
@@ -135,6 +138,8 @@
#define CFG_DRAM_SIZE 0x01000000
#define CFG_FLASH_BASE PHYS_FLASH_1
+#define CFG_MONITOR_BASE CFG_FLASH_BASE
+#define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
/*
* Expansion bus settings
@@ -155,16 +160,27 @@
/*
* FLASH and environment organization
*/
+/*
+ * FLASH and environment organization
+ */
#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
-#define CFG_MAX_FLASH_SECT 128 /* max number of sectors on one chip */
+#define CFG_MAX_FLASH_SECT 128 /* max number of sectors on one chip */
+
+#define CFG_FLASH_CFI /* The flash is CFI compatible */
+#define CFG_FLASH_CFI_DRIVER /* Use common CFI driver */
+#define CFG_ENV_IS_IN_FLASH 1
+
+#define CFG_FLASH_BANKS_LIST { PHYS_FLASH_1 }
+
+#define CFG_FLASH_CFI_WIDTH FLASH_CFI_16BIT /* no byte writes on IXP4xx */
+
+#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
+#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
-/* timeout values are in ticks */
-#define CFG_FLASH_ERASE_TOUT (25*CFG_HZ) /* Timeout for Flash Erase */
-#define CFG_FLASH_WRITE_TOUT (25*CFG_HZ) /* Timeout for Flash Write */
+#define CFG_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
-/* FIXME */
-#define CFG_ENV_IS_IN_FLASH 1
-#define CFG_ENV_ADDR (PHYS_FLASH_1 + 0x20000) /* Addr of Environment Sector */
-#define CFG_ENV_SIZE 0x20000 /* Total Size of Environment Sector */
+#define CFG_ENV_SECT_SIZE 0x20000 /* size of one complete sector */
+#define CFG_ENV_ADDR (PHYS_FLASH_1 + 0x20000)
+#define CFG_ENV_SIZE 0x2000 /* Total Size of Environment Sector */
#endif /* __CONFIG_H */
diff --git a/include/configs/ixdpg425.h b/include/configs/ixdpg425.h
new file mode 100644
index 0000000000..af4ecf621a
--- /dev/null
+++ b/include/configs/ixdpg425.h
@@ -0,0 +1,240 @@
+/*
+ * (C) Copyright 2005-2006
+ * Stefan Roese, DENX Software Engineering, sr@denx.de.
+ *
+ * (C) Copyright 2003
+ * Martijn de Gouw, Prodrive B.V., martijn.de.gouw@prodrive.nl
+ *
+ * Configuation settings for the IXDPG425 board.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * High Level Configuration Options
+ * (easy to change)
+ */
+#define CONFIG_IXP425 1 /* This is an IXP425 CPU */
+#define CONFIG_IXDPG425 1 /* on an IXDPG425 Board */
+
+#define CONFIG_DISPLAY_CPUINFO 1 /* display cpu info (and speed) */
+#define CONFIG_DISPLAY_BOARDINFO 1 /* display board info */
+
+/*
+ * Ethernet
+ */
+#define CONFIG_IXP4XX_NPE 1 /* include IXP4xx NPE support */
+#define CONFIG_NET_MULTI 1
+#define CONFIG_PHY_ADDR 5 /* NPE0 PHY address */
+#define CONFIG_HAS_ETH1
+#define CONFIG_PHY1_ADDR 4 /* NPE1 PHY address */
+#define CONFIG_MII 1 /* MII PHY management */
+#define CFG_RX_ETH_BUFFER 16 /* Number of ethernet rx buffers & descriptors */
+
+/*
+ * Misc configuration options
+ */
+#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
+#define CONFIG_USE_IRQ 1 /* we need IRQ stuff for timer */
+
+#define CONFIG_BOOTCOUNT_LIMIT /* support for bootcount limit */
+#define CFG_BOOTCOUNT_ADDR 0x60003000 /* inside qmrg sram */
+
+#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
+#define CONFIG_SETUP_MEMORY_TAGS 1
+#define CONFIG_INITRD_TAG 1
+
+/*
+ * Size of malloc() pool
+ */
+#define CFG_MALLOC_LEN (256 << 10)
+#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
+
+/* allow to overwrite serial and ethaddr */
+#define CONFIG_ENV_OVERWRITE
+
+#define CONFIG_BAUDRATE 115200
+#define CFG_IXP425_CONSOLE IXP425_UART1 /* we use UART1 for console */
+
+#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
+ CFG_CMD_DHCP | \
+ CFG_CMD_ELF | \
+ CFG_CMD_NET | \
+ CFG_CMD_MII | \
+ CFG_CMD_PING)
+
+/* This must be included AFTER the definition of CONFIG_COMMANDS (if any) */
+/* These are u-boot generic parameters */
+#include <cmd_confdefs.h>
+
+#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
+#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
+
+/*
+ * Miscellaneous configurable options
+ */
+#define CFG_LONGHELP /* undef to save memory */
+#define CFG_PROMPT "=> " /* Monitor Command Prompt */
+#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
+#define CFG_MAXARGS 16 /* max number of command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+
+#define CFG_MEMTEST_START 0x00400000 /* memtest works on */
+#define CFG_MEMTEST_END 0x00800000 /* 4 ... 8 MB in DRAM */
+#define CFG_LOAD_ADDR 0x00010000 /* default load address */
+
+#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
+#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
+
+ /* valid baudrates */
+#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
+
+/*
+ * Stack sizes
+ *
+ * The stack sizes are set up in start.S using the settings below
+ */
+#define CONFIG_STACKSIZE (128*1024) /* regular stack */
+#ifdef CONFIG_USE_IRQ
+#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
+#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
+#endif
+
+/***************************************************************
+ * Platform/Board specific defines start here.
+ ***************************************************************/
+
+/*-----------------------------------------------------------------------
+ * Default configuration (environment varibles...)
+ *----------------------------------------------------------------------*/
+#define CONFIG_PREBOOT "echo;" \
+ "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
+ "echo"
+
+#undef CONFIG_BOOTARGS
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "netdev=eth0\0" \
+ "hostname=ixdpg425\0" \
+ "nfsargs=setenv bootargs root=/dev/nfs rw " \
+ "nfsroot=${serverip}:${rootpath}\0" \
+ "ramargs=setenv bootargs root=/dev/ram rw\0" \
+ "addip=setenv bootargs ${bootargs} " \
+ "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
+ ":${hostname}:${netdev}:off panic=1\0" \
+ "addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0"\
+ "flash_nfs=run nfsargs addip addtty;" \
+ "bootm ${kernel_addr}\0" \
+ "flash_self=run ramargs addip addtty;" \
+ "bootm ${kernel_addr} ${ramdisk_addr}\0" \
+ "net_nfs=tftp 200000 ${bootfile};run nfsargs addip addtty;" \
+ "bootm\0" \
+ "rootpath=/opt/eldk/arm\0" \
+ "bootfile=/tftpboot/ixdpg425/uImage\0" \
+ "kernel_addr=50080000\0" \
+ "ramdisk_addr=50200000\0" \
+ "load=tftp 100000 /tftpboot/ixdpg425/u-boot.bin\0" \
+ "update=protect off 50000000 5003ffff;era 50000000 5003ffff;" \
+ "cp.b 100000 50000000 40000;" \
+ "setenv filesize;saveenv\0" \
+ "upd=run load;run update\0" \
+ ""
+#define CONFIG_BOOTCOMMAND "run net_nfs"
+
+/*
+ * Physical Memory Map
+ */
+#define CONFIG_NR_DRAM_BANKS 1 /* we have 2 banks of DRAM */
+#define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */
+#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
+
+#define PHYS_FLASH_1 0x50000000 /* Flash Bank #1 */
+#define PHYS_FLASH_SIZE 0x01000000 /* 16 MB */
+#define PHYS_FLASH_BANK_SIZE 0x01000000 /* 16 MB Banks */
+#define PHYS_FLASH_SECT_SIZE 0x00020000 /* 128 KB sectors (x1) */
+
+#define CFG_DRAM_BASE 0x00000000
+#define CFG_DRAM_SIZE 0x01000000
+
+#define CFG_FLASH_BASE PHYS_FLASH_1
+#define CFG_MONITOR_BASE CFG_FLASH_BASE
+#define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
+
+/*
+ * Expansion bus settings
+ */
+#define CFG_EXP_CS0 0xbcd23c42
+
+/*
+ * SDRAM settings
+ */
+#define CFG_SDR_CONFIG 0x18
+#define CFG_SDR_MODE_CONFIG 0x1
+#define CFG_SDRAM_REFRESH_CNT 0x81a
+
+/*
+ * FLASH and environment organization
+ */
+#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
+#define CFG_MAX_FLASH_SECT 128 /* max number of sectors on one chip */
+
+#define CFG_FLASH_CFI /* The flash is CFI compatible */
+#define CFG_FLASH_CFI_DRIVER /* Use common CFI driver */
+#define CFG_ENV_IS_IN_FLASH 1
+
+#define CFG_FLASH_USE_BUFFER_WRITE 1 /* use buffered writes (20x faster) */
+#define CFG_FLASH_PROTECTION 1 /* hardware flash protection */
+
+#define CFG_FLASH_BANKS_LIST { PHYS_FLASH_1 }
+
+#define CFG_FLASH_CFI_WIDTH FLASH_CFI_16BIT /* no byte writes on IXP4xx */
+
+#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
+#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
+
+#define CFG_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
+
+#define CFG_ENV_SECT_SIZE 0x20000 /* size of one complete sector */
+#define CFG_ENV_ADDR (PHYS_FLASH_1 + 0x40000)
+#define CFG_ENV_SIZE 0x2000 /* Total Size of Environment Sector */
+
+/* Address and size of Redundant Environment Sector */
+#define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR + CFG_ENV_SECT_SIZE)
+#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
+
+/*
+ * GPIO settings
+ */
+#define CFG_GPIO_PCI_INTA_N 6
+#define CFG_GPIO_PCI_INTB_N 7
+#define CFG_GPIO_SWITCH_RESET_N 8
+#define CFG_GPIO_SLIC_RESET_N 13
+#define CFG_GPIO_PCI_CLK 14
+#define CFG_GPIO_EXTBUS_CLK 15
+
+/*
+ * Cache Configuration
+ */
+#define CFG_CACHELINE_SIZE 32
+
+#endif /* __CONFIG_H */
diff --git a/include/configs/kvme080.h b/include/configs/kvme080.h
new file mode 100644
index 0000000000..61cf70576d
--- /dev/null
+++ b/include/configs/kvme080.h
@@ -0,0 +1,262 @@
+/*
+ * (C) Copyright 2005
+ * Sangmoon Kim, dogoil@etinsys.com.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#define CONFIG_MPC824X 1
+#define CONFIG_MPC8245 1
+#define CONFIG_KVME080 1
+
+#define CONFIG_CONS_INDEX 1
+
+#define CONFIG_BAUDRATE 115200
+
+#define CONFIG_BOOTDELAY 5
+
+#define CONFIG_IPADDR 192.168.0.2
+#define CONFIG_NETMASK 255.255.255.0
+#define CONFIG_SERVERIP 192.168.0.1
+
+#define CONFIG_BOOTARGS \
+ "console=ttyS0,115200 " \
+ "root=/dev/nfs rw nfsroot=192.168.0.1:/opt/eldk/ppc_82xx " \
+ "ip=192.168.0.2:192.168.0.1:192.168.0.1:255.255.255.0:" \
+ "kvme080:eth0:none " \
+ "mtdparts=phys_mapped_flash:12m(root),-(kernel)"
+
+#define CONFIG_BOOTCOMMAND \
+ "tftp 800000 kvme080/uImage; " \
+ "bootm 800000"
+
+#define CONFIG_LOADADDR 800000
+
+#define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_BOARD_EARLY_INIT_R
+#define CONFIG_MISC_INIT_R
+
+#define CONFIG_LOADS_ECHO 1
+#undef CFG_LOADS_BAUD_CHANGE
+
+#undef CONFIG_WATCHDOG
+
+#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
+
+#define CONFIG_MAC_PARTITION
+#define CONFIG_DOS_PARTITION
+
+#define CONFIG_RTC_DS164x
+
+#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
+ CFG_CMD_ASKENV | \
+ CFG_CMD_CACHE | \
+ CFG_CMD_DATE | \
+ CFG_CMD_DHCP | \
+ CFG_CMD_DIAG | \
+ CFG_CMD_EEPROM | \
+ CFG_CMD_ELF | \
+ CFG_CMD_I2C | \
+ CFG_CMD_JFFS2 | \
+ CFG_CMD_NFS | \
+ CFG_CMD_PCI | \
+ CFG_CMD_PING | \
+ CFG_CMD_SDRAM | \
+ CFG_CMD_SNTP)
+
+#define CONFIG_NETCONSOLE
+
+#include <cmd_confdefs.h>
+
+#define CFG_LONGHELP
+#define CFG_PROMPT "=> "
+#define CFG_CBSIZE 256
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16)
+#define CFG_MAXARGS 16
+#define CFG_BARGSIZE CFG_CBSIZE
+
+#define CFG_MEMTEST_START 0x00400000
+#define CFG_MEMTEST_END 0x07C00000
+
+#define CFG_LOAD_ADDR 0x00100000
+#define CFG_HZ 1000
+
+#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
+
+#define CFG_INIT_RAM_ADDR 0x40000000
+#define CFG_INIT_RAM_END 0x1000
+#define CFG_GBL_DATA_SIZE 128
+#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
+
+#define CFG_SDRAM_BASE 0x00000000
+#define CFG_FLASH_BASE 0x7C000000
+#define CFG_EUMB_ADDR 0xFC000000
+#define CFG_NVRAM_BASE_ADDR 0xFF000000
+#define CFG_NS16550_COM1 0xFF080000
+#define CFG_NS16550_COM2 0xFF080010
+#define CFG_NS16550_COM3 0xFF080020
+#define CFG_NS16550_COM4 0xFF080030
+#define CFG_RESET_ADDRESS 0xFFF00100
+
+#define CFG_MAX_RAM_SIZE 0x20000000
+#define CFG_FLASH_SIZE (16 * 1024 * 1024)
+#define CFG_NVRAM_SIZE 0x7FFF8
+
+#define CONFIG_VERY_BIG_RAM
+
+#define CFG_MONITOR_LEN 0x00040000
+#define CFG_MONITOR_BASE TEXT_BASE
+#define CFG_MALLOC_LEN (512 << 10)
+
+#define CFG_BOOTMAPSZ (8 << 20)
+
+#define CFG_FLASH_CFI
+#define CFG_FLASH_CFI_DRIVER
+#define CFG_FLASH_USE_BUFFER_WRITE
+#define CFG_FLASH_PROTECTION
+#define CFG_FLASH_EMPTY_INFO
+#define CFG_FLASH_PROTECT_CLEAR
+
+#define CFG_MAX_FLASH_BANKS 1
+#define CFG_MAX_FLASH_SECT 256
+
+#define CFG_FLASH_ERASE_TOUT 120000
+#define CFG_FLASH_WRITE_TOUT 500
+
+#define CFG_JFFS2_FIRST_BANK 0
+#define CFG_JFFS2_NUM_BANKS 1
+
+#define CFG_ENV_IS_IN_NVRAM 1
+#define CONFIG_ENV_OVERWRITE 1
+#define CFG_NVRAM_ACCESS_ROUTINE
+#define CFG_ENV_ADDR CFG_NVRAM_BASE_ADDR
+#define CFG_ENV_SIZE 0x400
+#define CFG_ENV_OFFSET 0
+
+#define CFG_NS16550
+#define CFG_NS16550_SERIAL
+#define CFG_NS16550_REG_SIZE 1
+#define CFG_NS16550_CLK 14745600
+
+#define CONFIG_PCI
+#define CONFIG_PCI_PNP
+
+#define CONFIG_NET_MULTI
+#define CONFIG_EEPRO100
+#define CONFIG_EEPRO100_SROM_WRITE
+
+#define CFG_RX_ETH_BUFFER 8
+
+#define CONFIG_HARD_I2C 1
+#define CFG_I2C_SPEED 400000
+#define CFG_I2C_SLAVE 0x7F
+
+#define CFG_I2C_EEPROM_ADDR 0x57
+#define CFG_I2C_EEPROM_ADDR_LEN 1
+#define CFG_EEPROM_PAGE_WRITE_BITS 3
+#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10
+
+#define CONFIG_SYS_CLK_FREQ 33333333
+
+#define CFG_CACHELINE_SIZE 32
+#if CONFIG_COMMANDS & CFG_CMD_KGDB
+# define CFG_CACHELINE_SHIFT 5
+#endif
+
+#define CFG_DLL_EXTEND 0x00
+#define CFG_PCI_HOLD_DEL 0x20
+
+#define CFG_ROMNAL 15
+#define CFG_ROMFAL 31
+
+#define CFG_REFINT 430
+
+#define CFG_DBUS_SIZE2 1
+
+#define CFG_BSTOPRE 121
+#define CFG_REFREC 8
+#define CFG_RDLAT 4
+#define CFG_PRETOACT 3
+#define CFG_ACTTOPRE 5
+#define CFG_ACTORW 3
+#define CFG_SDMODE_CAS_LAT 3
+#define CFG_SDMODE_WRAP 0
+
+#define CFG_REGISTERD_TYPE_BUFFER 1
+#define CFG_EXTROM 1
+#define CFG_REGDIMM 0
+
+#define CFG_BANK0_START 0x00000000
+#define CFG_BANK0_END (0x4000000 - 1)
+#define CFG_BANK0_ENABLE 1
+#define CFG_BANK1_START 0x04000000
+#define CFG_BANK1_END (0x8000000 - 1)
+#define CFG_BANK1_ENABLE 1
+#define CFG_BANK2_START 0x3ff00000
+#define CFG_BANK2_END 0x3fffffff
+#define CFG_BANK2_ENABLE 0
+#define CFG_BANK3_START 0x3ff00000
+#define CFG_BANK3_END 0x3fffffff
+#define CFG_BANK3_ENABLE 0
+#define CFG_BANK4_START 0x00000000
+#define CFG_BANK4_END 0x00000000
+#define CFG_BANK4_ENABLE 0
+#define CFG_BANK5_START 0x00000000
+#define CFG_BANK5_END 0x00000000
+#define CFG_BANK5_ENABLE 0
+#define CFG_BANK6_START 0x00000000
+#define CFG_BANK6_END 0x00000000
+#define CFG_BANK6_ENABLE 0
+#define CFG_BANK7_START 0x00000000
+#define CFG_BANK7_END 0x00000000
+#define CFG_BANK7_ENABLE 0
+
+#define CFG_BANK_ENABLE 0x03
+
+#define CFG_ODCR 0x75
+#define CFG_PGMAX 0x32
+
+#define CFG_IBAT0L (CFG_SDRAM_BASE | BATL_PP_10 | BATL_MEMCOHERENCE)
+#define CFG_IBAT0U (CFG_SDRAM_BASE | BATU_BL_256M | BATU_VS | BATU_VP)
+
+#define CFG_IBAT1L (CFG_INIT_RAM_ADDR | BATL_PP_10 | BATL_MEMCOHERENCE)
+#define CFG_IBAT1U (CFG_INIT_RAM_ADDR | BATU_BL_128K | BATU_VS | BATU_VP)
+
+#define CFG_IBAT2L (0x80000000 | BATL_PP_10 | BATL_CACHEINHIBIT)
+#define CFG_IBAT2U (0x80000000 | BATU_BL_256M | BATU_VS | BATU_VP)
+
+#define CFG_IBAT3L (0xF0000000 | BATL_PP_10 | BATL_CACHEINHIBIT)
+#define CFG_IBAT3U (0xF0000000 | BATU_BL_256M | BATU_VS | BATU_VP)
+
+#define CFG_DBAT0L CFG_IBAT0L
+#define CFG_DBAT0U CFG_IBAT0U
+#define CFG_DBAT1L CFG_IBAT1L
+#define CFG_DBAT1U CFG_IBAT1U
+#define CFG_DBAT2L CFG_IBAT2L
+#define CFG_DBAT2U CFG_IBAT2U
+#define CFG_DBAT3L CFG_IBAT3L
+#define CFG_DBAT3U CFG_IBAT3U
+
+#define BOOTFLAG_COLD 0x01
+#define BOOTFLAG_WARM 0x02
+
+#endif /* __CONFIG_H */
diff --git a/include/configs/mcc200.h b/include/configs/mcc200.h
new file mode 100644
index 0000000000..ce33b85c96
--- /dev/null
+++ b/include/configs/mcc200.h
@@ -0,0 +1,333 @@
+/*
+ * (C) Copyright 2006
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * High Level Configuration Options
+ * (easy to change)
+ */
+
+#define CONFIG_MPC5200
+#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */
+#define CONFIG_MCC200 1 /* ... on MCC200 board */
+
+#define CFG_MPC5XXX_CLKIN 33000000 /* ... running at 33MHz */
+
+#define CONFIG_MISC_INIT_R
+
+#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
+#define BOOTFLAG_WARM 0x02 /* Software reboot */
+
+#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
+#endif
+
+/*
+ * Serial console configuration
+ *
+ * To select console on the one of 8 external UARTs,
+ * define CONFIG_QUART_CONSOLE as 1, 2, 3, or 4 for the first Quad UART,
+ * or as 5, 6, 7, or 8 for the second Quad UART.
+ *
+ * CONFIG_PSC_CONSOLE must be undefined in this case.
+ */
+/* #define CONFIG_QUART_CONSOLE 1 */ /* console is on UART1 of QUART1 */
+/*
+ * To select console on PSC1, define CONFIG_PSC_CONSOLE as 1
+ * and undefine CONFIG_QUART_CONSOLE.
+ */
+#define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
+#if defined(CONFIG_QUART_CONSOLE) && defined(CONFIG_PSC_CONSOLE)
+#error "Select only one console device!"
+#endif
+#define CONFIG_BAUDRATE 115200
+#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
+
+#define CONFIG_MII 1
+
+#define CONFIG_DOS_PARTITION
+
+/* USB */
+#define CONFIG_USB_OHCI
+#define ADD_USB_CMD CFG_CMD_USB | CFG_CMD_FAT
+#define CONFIG_USB_STORAGE
+
+/*
+ * Supported commands
+ */
+#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
+ ADD_USB_CMD | \
+ CFG_CMD_BEDBUG | \
+ CFG_CMD_FAT | \
+ CFG_CMD_I2C)
+
+/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
+#include <cmd_confdefs.h>
+
+/*
+ * Autobooting
+ */
+#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
+
+#define CONFIG_PREBOOT "echo;" \
+ "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
+ "echo"
+
+#undef CONFIG_BOOTARGS
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "netdev=eth0\0" \
+ "hostname=mcc200\0" \
+ "nfsargs=setenv bootargs root=/dev/nfs rw " \
+ "nfsroot=${serverip}:${rootpath}\0" \
+ "ramargs=setenv bootargs root=/dev/ram rw\0" \
+ "addip=setenv bootargs ${bootargs} " \
+ "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
+ ":${hostname}:${netdev}:off panic=1\0" \
+ "flash_nfs=run nfsargs addip;" \
+ "bootm ${kernel_addr}\0" \
+ "flash_self=run ramargs addip;" \
+ "bootm ${kernel_addr} ${ramdisk_addr}\0" \
+ "net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0" \
+ "rootpath=/opt/eldk/ppc_6xx\0" \
+ "bootfile=/tftpboot/mcc200/uImage\0" \
+ "baudrate=115200\0" \
+ "load=tftp 200000 /tftpboot/mcc200/u-boot.bin\0" \
+ "update=protect off FFF00000 +${filesize};" \
+ "era FFF00000 +${filesize};" \
+ "cp.b 200000 FFF00000 ${filesize}\0" \
+ "serverip=192.168.1.1\0" \
+ "ipaddr=192.168.133.144\0" \
+ "netmask=255.255.0.0\0" \
+ "unlock=yes\0" \
+ "ethaddr=00:02:44:7D:73:3B\0" \
+ ""
+
+#define CONFIG_BOOTCOMMAND "run flash_self"
+
+#define CFG_HUSH_PARSER 1 /* use "hush" command parser */
+#define CFG_PROMPT_HUSH_PS2 "> "
+
+/*
+ * IPB Bus clocking configuration.
+ */
+#define CFG_IPBSPEED_133 /* define for 133MHz speed */
+
+/*
+ * I2C configuration
+ */
+#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
+#define CFG_I2C_MODULE 1 /* Select I2C module #1 or #2 */
+
+#define CFG_I2C_SPEED 100000 /* 100 kHz */
+#define CFG_I2C_SLAVE 0x7F
+
+/*
+ * Flash configuration (8,16 or 32 MB)
+ * TEXT base always at 0xFFF00000
+ * ENV_ADDR always at 0xFFF40000
+ * FLASH_BASE at 0xFC000000 for 64 MB (only 32MB are supported, not enough addr lines!!!)
+ * 0xFE000000 for 32 MB
+ * 0xFF000000 for 16 MB
+ * 0xFF800000 for 8 MB
+ */
+#define CFG_FLASH_BASE 0xfc000000
+#define CFG_FLASH_SIZE 0x04000000
+
+#define CFG_FLASH_CFI /* The flash is CFI compatible */
+#define CFG_FLASH_CFI_DRIVER /* Use common CFI driver */
+
+#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
+
+#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
+#define CFG_MAX_FLASH_SECT 512 /* max number of sectors on one chip */
+
+#define CFG_FLASH_USE_BUFFER_WRITE 1 /* use buffered writes (20x faster) */
+#define CFG_FLASH_PROTECTION 1 /* hardware flash protection */
+
+#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
+#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
+
+#define CFG_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
+#define CFG_FLASH_QUIET_TEST 1 /* don't warn upon unknown flash */
+
+#define CFG_ENV_IS_IN_FLASH 1 /* use FLASH for environment vars */
+
+#define CFG_ENV_SECT_SIZE 0x40000 /* size of one complete sector */
+#define CFG_ENV_ADDR (CFG_MONITOR_BASE + CFG_MONITOR_LEN)
+#define CFG_ENV_SIZE 0x2000 /* Total Size of Environment Sector */
+
+/* Address and size of Redundant Environment Sector */
+#define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR + CFG_ENV_SECT_SIZE)
+#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
+
+#define CONFIG_ENV_OVERWRITE 1 /* allow modification of vendor params */
+
+#if TEXT_BASE == CFG_FLASH_BASE
+#define CFG_LOWBOOT 1
+#endif
+
+/*
+ * Memory map
+ */
+#define CFG_MBAR 0xf0000000
+#define CFG_SDRAM_BASE 0x00000000
+#define CFG_DEFAULT_MBAR 0x80000000
+
+/* Use SRAM until RAM will be available */
+#define CFG_INIT_RAM_ADDR MPC5XXX_SRAM
+#define CFG_INIT_RAM_END MPC5XXX_SRAM_SIZE /* End of used area in DPRAM */
+
+
+#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
+#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
+#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
+
+#define CFG_MONITOR_BASE TEXT_BASE
+#if (CFG_MONITOR_BASE < CFG_FLASH_BASE)
+# define CFG_RAMBOOT 1
+#endif
+
+#define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
+#define CFG_MALLOC_LEN (512 << 10) /* Reserve 512 kB for malloc() */
+#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
+
+/*
+ * Ethernet configuration
+ */
+#define CONFIG_MPC5xxx_FEC 1
+/*
+ * Define CONFIG_FEC_10MBIT to force FEC at 10Mb
+ */
+/* #define CONFIG_FEC_10MBIT 1 */
+#define CONFIG_PHY_ADDR 1
+
+/*
+ * GPIO configuration
+ */
+/* 0x10000004 = 32MB SDRAM */
+/* 0x90000004 = 64MB SDRAM */
+#define CFG_GPS_PORT_CONFIG 0x00000004
+
+/*
+ * Miscellaneous configurable options
+ */
+#define CFG_LONGHELP /* undef to save memory */
+#define CFG_PROMPT "=> " /* Monitor Command Prompt */
+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
+#else
+#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
+#endif
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
+#define CFG_MAXARGS 16 /* max number of command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+
+#define CFG_MEMTEST_START 0x00100000 /* memtest works on */
+#define CFG_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
+
+#define CFG_LOAD_ADDR 0x100000 /* default load address */
+
+#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
+
+/*
+ * Various low-level settings
+ */
+#define CFG_HID0_INIT HID0_ICE | HID0_ICFI
+#define CFG_HID0_FINAL HID0_ICE
+
+#define CFG_BOOTCS_START CFG_FLASH_BASE
+#define CFG_BOOTCS_SIZE CFG_FLASH_SIZE
+#define CFG_BOOTCS_CFG 0x0004fb00
+#define CFG_CS0_START CFG_FLASH_BASE
+#define CFG_CS0_SIZE CFG_FLASH_SIZE
+
+/* Quad UART @0x80000000 (MBAR is relocated to 0xF0000000) */
+#define CFG_CS2_START 0x80000000
+#define CFG_CS2_SIZE 0x00001000
+#define CFG_CS2_CFG 0x1d300
+
+/* Second Quad UART @0x80010000 */
+#define CFG_CS1_START 0x80010000
+#define CFG_CS1_SIZE 0x00001000
+#define CFG_CS1_CFG 0x1d300
+
+/*
+ * Select one of quarts as a default
+ * console. If undefined - PSC console
+ * wil be default
+ */
+#define CFG_CS_BURST 0x00000000
+#define CFG_CS_DEADCYCLE 0x33333333
+
+#define CFG_RESET_ADDRESS 0xff000000
+
+/*
+ * QUART Expanders support
+ */
+#if defined(CONFIG_QUART_CONSOLE)
+/*
+ * We'll use NS16550 chip routines,
+ */
+#define CFG_NS16550 1
+#define CFG_NS16550_SERIAL 1
+#define CONFIG_CONS_INDEX 1
+/*
+ * To achieve necessary offset on SC16C554
+ * A0-A2 (register select) pins with NS16550
+ * functions (in struct NS16550), REG_SIZE
+ * should be 4, because A0-A2 pins are connected
+ * to DA2-DA4 address bus lines.
+ */
+#define CFG_NS16550_REG_SIZE 4
+/*
+ * LocalPlus Bus already inited in cpu_init_f(),
+ * so can work with QUART's chip selects.
+ * One of four SC16C554 UARTs is selected with
+ * A3-A4 (DA5-DA6) lines.
+ */
+#if (CONFIG_QUART_CONSOLE > 0) && (CONFIG_QUART_CONSOLE < 5)
+#define CFG_NS16550_COM1 (CFG_CS2_START | (CONFIG_QUART_CONSOLE - 1)<<5)
+#elif (CONFIG_QUART_CONSOLE > 4) && (CONFIG_QUART_CONSOLE < 9)
+#define CFG_NS16550_COM1 (CFG_CS1_START | (CONFIG_QUART_CONSOLE - 5)<<5)
+#elif
+#error "Wrong QUART expander number."
+#endif
+
+/*
+ * SC16C554 chip's external crystal oscillator frequency
+ * is 7.3728 MHz
+ */
+#define CFG_NS16550_CLK 7372800
+#endif /* CONFIG_QUART_CONSOLE */
+/*-----------------------------------------------------------------------
+ * USB stuff
+ *-----------------------------------------------------------------------
+ */
+#define CONFIG_USB_CLOCK 0x0001BBBB
+#define CONFIG_USB_CONFIG 0x00005000
+
+#endif /* __CONFIG_H */
diff --git a/include/configs/netstar.h b/include/configs/netstar.h
new file mode 100644
index 0000000000..697796a114
--- /dev/null
+++ b/include/configs/netstar.h
@@ -0,0 +1,265 @@
+/*
+ * (C) Copyright 2005 2N TELEKOMUNIKACE, Ladislav Michl
+ *
+ * Configuation settings for the TI OMAP NetStar board.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#include <configs/omap1510.h>
+
+/*
+ * High Level Configuration Options
+ * (easy to change)
+ */
+#define CONFIG_ARM925T 1 /* This is an arm925t CPU */
+#define CONFIG_OMAP 1 /* in a TI OMAP core */
+#define CONFIG_OMAP1510 1 /* which is in a 5910 */
+
+/* Input clock of PLL */
+#define CONFIG_SYS_CLK_FREQ 150000000 /* 150MHz input clock */
+#define CONFIG_XTAL_FREQ 12000000
+
+#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
+
+#define CONFIG_MISC_INIT_R /* There is nothing to really init */
+#define BOARD_LATE_INIT /* but we flash the LEDs here */
+
+#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
+#define CONFIG_SETUP_MEMORY_TAGS 1
+#define CONFIG_INITRD_TAG 1
+
+#define CFG_DEVICE_NULLDEV 1 /* enable null device */
+#define CONFIG_SILENT_CONSOLE 1 /* enable silent startup */
+
+/*
+ * Physical Memory Map
+ */
+#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
+#define PHYS_SDRAM_1 0x10000000 /* SDRAM Bank #1 */
+#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
+
+/*
+ * FLASH organization
+ */
+#define CFG_FLASH_BASE PHYS_FLASH_1
+#define CFG_MAX_FLASH_BANKS 1
+#if (PHYS_SDRAM_1_SIZE == SZ_32M)
+/*#if 1*/
+#define CFG_FLASH_CFI /* Flash is CFI conformant */
+#define CFG_FLASH_CFI_DRIVER /* Use the common driver */
+#define CFG_FLASH_EMPTY_INFO
+#define CFG_MAX_FLASH_SECT 128
+#else
+#define PHYS_FLASH_1_SIZE SZ_1M
+#define CFG_MAX_FLASH_SECT 19
+#define CFG_FLASH_ERASE_TOUT (5*CFG_HZ) /* in ticks */
+#define CFG_FLASH_WRITE_TOUT (5*CFG_HZ)
+#endif
+
+#define CFG_MONITOR_BASE PHYS_FLASH_1
+#define CFG_MONITOR_LEN SZ_256K
+
+/*
+ * Environment settings
+ */
+#define CFG_ENV_IS_IN_FLASH
+#define ENV_IS_SOLITARY
+#define CFG_ENV_ADDR 0x4000
+#define CFG_ENV_SIZE SZ_8K
+#define CFG_ENV_SECT_SIZE SZ_8K
+#define CFG_ENV_ADDR_REDUND 0x6000
+#define CFG_ENV_SIZE_REDUND CFG_ENV_SIZE
+#define CONFIG_ENV_OVERWRITE
+
+/*
+ * Size of malloc() pool
+ */
+#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
+/* XXX #define CFG_MALLOC_LEN (SZ_64K - CFG_GBL_DATA_SIZE)*/
+#define CFG_MALLOC_LEN SZ_4M
+
+/*
+ * The stack size is set up in start.S using the settings below
+ */
+/* XXX #define CONFIG_STACKSIZE SZ_8K /XXX* regular stack */
+#define CONFIG_STACKSIZE SZ_1M /* regular stack */
+
+/*
+ * Hardware drivers
+ */
+#define CONFIG_DRIVER_SMC91111
+#define CONFIG_SMC91111_BASE 0x04000300
+
+/*
+ * NS16550 Configuration
+ */
+#define CFG_NS16550
+#define CFG_NS16550_SERIAL
+#define CFG_NS16550_REG_SIZE (-4)
+#define CFG_NS16550_CLK (CONFIG_XTAL_FREQ) /* can be 12M/32Khz or 48Mhz */
+#define CFG_NS16550_COM1 OMAP1510_UART1_BASE /* uart1 */
+
+#define CONFIG_CONS_INDEX 1
+#define CONFIG_BAUDRATE 115200
+#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
+
+/*#define CONFIG_SKIP_RELOCATE_UBOOT*/
+/*#define CONFIG_SKIP_LOWLEVEL_INIT */
+
+/*
+ * NAND flash
+ */
+#define CFG_MAX_NAND_DEVICE 1
+#define NAND_MAX_CHIPS 1
+#define CFG_NAND_BASE 0x04000000 + (2 << 23)
+
+/*
+ * JFFS2 partitions (mtdparts command line support)
+ */
+#define CONFIG_JFFS2_CMDLINE
+#define MTDIDS_DEFAULT "nor0=omapflash.0,nand0=omapnand.0"
+#define MTDPARTS_DEFAULT "mtdparts=omapflash.0:8k@16k(env),8k(r_env),448k@576k(u-boot);omapnand.0:48M(rootfs0),48M(rootfs1),-(data)"
+
+#if 0
+#define CONFIG_COMMANDS (CFG_CMD_BDI | \
+ CFG_CMD_BOOTD | \
+ CFG_CMD_DHCP | \
+ CFG_CMD_ENV | \
+ CFG_CMD_FLASH | \
+ CFG_CMD_IMI | \
+ CFG_CMD_LOADB | \
+ CFG_CMD_NET | \
+ CFG_CMD_MEMORY | \
+ CFG_CMD_PING | \
+ CFG_CMD_RUN)
+
+#else
+#define CONFIG_COMMANDS (CFG_CMD_BDI | \
+ CFG_CMD_BOOTD | \
+ CFG_CMD_DHCP | \
+ CFG_CMD_ENV | \
+ CFG_CMD_FLASH | \
+ CFG_CMD_NAND | \
+ CFG_CMD_IMI | \
+ CFG_CMD_JFFS2 | \
+ CFG_CMD_LOADB | \
+ CFG_CMD_NET | \
+ CFG_CMD_MEMORY | \
+ CFG_CMD_PING | \
+ CFG_CMD_RUN)
+
+#define CONFIG_JFFS2_NAND 1 /* jffs2 on nand support */
+#endif
+
+#define CONFIG_BOOTP_MASK CONFIG_BOOTP_DEFAULT
+#define CONFIG_LOOPW
+
+/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
+#include <cmd_confdefs.h>
+
+#define CONFIG_BOOTDELAY 3
+#define CONFIG_ZERO_BOOTDELAY_CHECK /* allow to break in always */
+#undef CONFIG_BOOTARGS /* the boot command will set bootargs*/
+#define CFG_AUTOLOAD "n" /* No autoload */
+#define CONFIG_BOOTCOMMAND "run nboot"
+#define CONFIG_PREBOOT "run setup"
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "setup=setenv bootargs console=ttyS0,$baudrate " \
+ "$mtdparts\0" \
+ "ospart=0\0" \
+ "setpart=" \
+ "if test -n $swapos; then " \
+ "if test $ospart -eq 0; then chpart nand0,1; else chpart nand0,0; fi; "\
+ "setenv swapos; saveenv; " \
+ "else " \
+ "chpart nand0,$ospart; " \
+ "fi\0" \
+ "nfsargs=setenv bootargs $bootargs " \
+ "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off " \
+ "nfsroot=$rootpath root=/dev/nfs\0" \
+ "flashargs=run setpart;setenv bootargs $bootargs " \
+ "root=/dev/mtdblock$partition ro " \
+ "rootfstype=jffs2\0" \
+ "initrdargs=setenv bootargs $bootargs " \
+ "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off\0" \
+ "iboot=bootp;run initrdargs;tftp;bootm\0" \
+ "fboot=run flashargs;fsload /boot/uImage;bootm\0" \
+ "nboot=bootp;run nfsargs;tftp;bootm\0"
+
+#if 0 /* feel free to disable for development */
+#define CONFIG_AUTOBOOT_KEYED /* Enable password protection */
+#define CONFIG_AUTOBOOT_PROMPT "\nNetStar PBX - boot in %d sec...\n"
+#define CONFIG_AUTOBOOT_DELAY_STR "R" /* 1st "password" */
+#define CONFIG_BOOT_RETRY_TIME 30
+#endif
+
+/*
+ * Miscellaneous configurable options
+ */
+#define CFG_LONGHELP /* undef to save memory */
+#define CFG_PROMPT "# " /* Monitor Command Prompt */
+#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
+#define CFG_MAXARGS 16 /* max number of command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+
+#define CFG_HUSH_PARSER
+#define CFG_PROMPT_HUSH_PS2 "> "
+#define CONFIG_AUTO_COMPLETE
+
+#define CFG_MEMTEST_START PHYS_SDRAM_1
+#define CFG_MEMTEST_END PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE
+
+#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
+
+#define CFG_LOAD_ADDR PHYS_SDRAM_1 + 0x400000 /* default load address */
+
+/* The 1510 has 3 timers, they can be driven by the RefClk (12Mhz) or by DPLL1.
+ * This time is further subdivided by a local divisor.
+ */
+#define CFG_TIMERBASE OMAP1510_TIMER1_BASE
+#define CFG_PVT 7 /* 2^(pvt+1), divide by 256 */
+#define CFG_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CFG_PVT))
+
+#define OMAP5910_DPLL_DIV 1
+#define OMAP5910_DPLL_MUL ((CONFIG_SYS_CLK_FREQ * \
+ (1 << OMAP5910_DPLL_DIV)) / CONFIG_XTAL_FREQ)
+
+#define OMAP5910_ARM_PER_DIV 2 /* CKL/4 */
+#define OMAP5910_LCD_DIV 2 /* CKL/4 */
+#define OMAP5910_ARM_DIV 0 /* CKL/1 */
+#define OMAP5910_DSP_DIV 0 /* CKL/1 */
+#define OMAP5910_TC_DIV 1 /* CKL/2 */
+#define OMAP5910_DSP_MMU_DIV 1 /* CKL/2 */
+#define OMAP5910_ARM_TIM_SEL 1 /* CKL used for MPU timers */
+
+#define OMAP5910_ARM_EN_CLK 0x03d6 /* 0000 0011 1101 0110b Clock Enable */
+#define OMAP5910_ARM_CKCTL ((OMAP5910_ARM_PER_DIV) | \
+ (OMAP5910_LCD_DIV << 2) | \
+ (OMAP5910_ARM_DIV << 4) | \
+ (OMAP5910_DSP_DIV << 6) | \
+ (OMAP5910_TC_DIV << 8) | \
+ (OMAP5910_DSP_MMU_DIV << 10) | \
+ (OMAP5910_ARM_TIM_SEL << 12))
+
+#endif /* __CONFIG_H */
diff --git a/include/configs/omap1710h3.h b/include/configs/omap1710h3.h
new file mode 100644
index 0000000000..0a2cf9df04
--- /dev/null
+++ b/include/configs/omap1710h3.h
@@ -0,0 +1,236 @@
+/*
+ * (C) Copyright 2003
+ * Texas Instruments.
+ * Kshitij Gupta <kshitij@ti.com>
+ * Configuation settings for the TI OMAP H3 board.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+//#define CFG_NAND_BOOT
+
+/*
+ * If we are developing, we might want to start armboot from ram
+ * so we MUST NOT initialize critical regs like mem-timing ...
+ */
+//#define CONFIG_INIT_CRITICAL /* undef for developing */
+
+/*
+ * High Level Configuration Options
+ * (easy to change)
+ */
+#define CONFIG_ARM926EJS 1 /* This is an arm926ejs CPU core */
+#define CONFIG_OMAP 1 /* in a TI OMAP core */
+#define CONFIG_OMAP1710 1 /* which is in a 1710 */
+#define CONFIG_H3_OMAP1710 1 /* a H3 Board */
+
+/* input clock of PLL */
+/* the OMAP1710 H3 has 12MHz input clock */
+#define CONFIG_SYS_CLK_FREQ 12000000
+
+#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
+
+#define CONFIG_MISC_INIT_R
+
+#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
+#define CONFIG_SETUP_MEMORY_TAGS 1
+
+/*
+ * Size of malloc() pool
+ */
+#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
+#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
+
+/*
+ * Hardware drivers
+ */
+/*
+*/
+#define CONFIG_DRIVER_LAN91C96
+#define CONFIG_LAN91C96_BASE 0x04000300
+#define CONFIG_LAN91C96_EXT_PHY
+
+/*
+ * NS16550 Configuration
+ */
+#define CFG_NS16550
+#define CFG_NS16550_SERIAL
+#define CFG_NS16550_REG_SIZE (-4)
+#define CFG_NS16550_CLK (48000000) /* can be 12M/32Khz or 48Mhz */
+#define CFG_NS16550_COM1 0xfffb0000 /* uart1, bluetooth uart on helen */
+
+/*
+ * select serial console configuration
+ */
+#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on OMAP1710 H3 */
+
+/* allow to overwrite serial and ethaddr */
+#define CONFIG_ENV_OVERWRITE
+#define CONFIG_CONS_INDEX 1
+#define CONFIG_BAUDRATE 115200
+#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
+
+#define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_DHCP | CFG_CMD_NAND | CFG_CMD_JFFS2)
+#define CONFIG_BOOTP_MASK CONFIG_BOOTP_DEFAULT
+
+/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
+#include <cmd_confdefs.h>
+#include <configs/omap1510.h>
+
+
+/*
+ * Board NAND Info.
+ */
+#ifdef CFG_NAND_BOOT
+#define CFG_NAND_ADDR 0x0c000000 /* physical address to access nand at CS3*/
+#else
+#define CFG_NAND_ADDR 0x0a000000 /* physical address to access nand at CS2B*/
+#endif
+
+#define CONFIG_H3_NAND_16BIT
+
+#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
+#define SECTORSIZE 512
+
+#define ADDR_COLUMN 1
+#define ADDR_PAGE 2
+#define ADDR_COLUMN_PAGE 3
+
+#define NAND_ChipID_UNKNOWN 0x00
+#define NAND_MAX_FLOORS 1
+#define NAND_MAX_CHIPS 1
+
+#define WRITE_NAND_COMMAND(d, adr) do{ *(volatile __u8 *)((unsigned long)adr + 2) = (__u8)(d); } while(0)
+#define WRITE_NAND_ADDRESS(d, adr) do{ *(volatile __u8 *)((unsigned long)adr + 4) = (__u8)(d); } while(0)
+#define WRITE_NAND(d, adr) do{ *(volatile __u16 *)((unsigned long)adr) = (__u16)(d); } while(0)
+#define READ_NAND(adr) ((volatile __u16)(*(volatile __u16 *)(unsigned long)adr))
+
+#define NAND_NO_RB 1
+#define NAND_WAIT_READY(nand) udelay(35)
+
+#define NAND_CTL_CLRALE(nandptr) udelay(1);
+#define NAND_CTL_SETALE(nandptr) udelay(1);
+#define NAND_CTL_CLRCLE(nandptr) udelay(1);
+#define NAND_CTL_SETCLE(nandptr) udelay(1);
+#define NAND_DISABLE_CE(nand) udelay(1);
+#define NAND_ENABLE_CE(nand) udelay(1);
+
+
+#define CONFIG_BOOTDELAY 3
+#define CONFIG_BOOTARGS "mem=32M console=ttyS0,115200n8 noinitrd \
+ root=/dev/nfs rw nfsroot=157.87.82.48:\
+ /home/a0875451/mwd/myfs/target ip=dhcp"
+#define CONFIG_NETMASK 255.255.254.0 /* talk on MY local net */
+#define CONFIG_IPADDR 156.117.97.156 /* static IP I currently own */
+#define CONFIG_SERVERIP 156.117.97.139 /* current IP of my dev pc */
+#define CONFIG_BOOTFILE "uImage" /* file to load */
+
+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
+#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
+#endif
+
+/*
+ * Miscellaneous configurable options
+ */
+#define CFG_LONGHELP /* undef to save memory */
+#define CFG_PROMPT "OMAP1710 H3 # " /* Monitor Command Prompt */
+#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
+/* Print Buffer Size */
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16)
+#define CFG_MAXARGS 16 /* max number of command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+
+#define CFG_MEMTEST_START 0x10000000 /* memtest works on */
+#define CFG_MEMTEST_END 0x12000000 /* 32 MB in DRAM */
+
+#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
+
+#define CFG_LOAD_ADDR 0x10000000 /* default load address */
+
+/* The 1710 has 6 timers, they can be driven by the RefClk (12Mhz) or by
+ * DPLL1. This time is further subdivided by a local divisor.
+ */
+#define CFG_TIMERBASE 0xFFFEC500 /* use timer 1 */
+#define CFG_PVT 7 /* 2^(pvt+1), divide by 256 */
+#define CFG_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CFG_PVT))
+
+/*-----------------------------------------------------------------------
+ * Stack sizes
+ *
+ * The stack sizes are set up in start.S using the settings below
+ */
+#define CONFIG_STACKSIZE (128*1024) /* regular stack */
+#ifdef CONFIG_USE_IRQ
+#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
+#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
+#endif
+
+/*-----------------------------------------------------------------------
+ * Physical Memory Map
+ */
+#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
+#define PHYS_SDRAM_1 0x10000000 /* SDRAM Bank #1 */
+#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
+
+#ifdef CFG_NAND_BOOT
+#define PHYS_FLASH_1 0x0a000000 /* Flash Bank #1 */
+#else
+#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
+#endif
+
+#define CFG_FLASH_BASE PHYS_FLASH_1
+
+/*-----------------------------------------------------------------------
+ * FLASH and environment organization
+ */
+#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
+#define PHYS_FLASH_SIZE 0x02000000 /* 32MB */
+#define CFG_MAX_FLASH_SECT (259) /* max number of sectors on one chip */
+
+/* timeout values are in ticks */
+#define CFG_FLASH_ERASE_TOUT (25*CFG_HZ) /* Timeout for Flash Erase */
+#define CFG_FLASH_WRITE_TOUT (25*CFG_HZ) /* Timeout for Flash Write */
+
+#ifdef CFG_NAND_BOOT
+
+#define CFG_ENV_IS_IN_NAND 1
+#define CFG_ENV_SIZE 0x20000 /* Total Size of Environment Sector */
+#define CFG_ENV_OFFSET 0x50000 /* environment starts here */
+
+#else
+/* addr of environment */
+#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x020000)
+
+#define CFG_ENV_IS_IN_FLASH 1
+#define CFG_ENV_SIZE 0x20000 /* Total Size of Environment Sector */
+#define CFG_ENV_OFFSET 0x20000 /* environment starts here */
+
+#endif /* CFG_NAND_BOOT */
+
+/* Flash banks JFFS2 should use */
+#define CFG_MAX_MTD_BANKS (CFG_MAX_FLASH_BANKS+CFG_MAX_NAND_DEVICE)
+#define CFG_JFFS2_MEM_NAND
+#define CFG_JFFS2_FIRST_BANK 1 /* use flash_info[1] */
+#define CFG_JFFS2_NUM_BANKS 1
+
+#endif /* __CONFIG_H */
diff --git a/include/configs/omap2420h4.h b/include/configs/omap2420h4.h
index 12252ac129..7fa373fc8b 100644
--- a/include/configs/omap2420h4.h
+++ b/include/configs/omap2420h4.h
@@ -33,30 +33,29 @@
*/
#define CONFIG_ARM1136 1 /* This is an arm1136 CPU core */
#define CONFIG_OMAP 1 /* in a TI OMAP core */
-#define CONFIG_OMAP2420 1 /* which is in a 2420 */
-#define CONFIG_OMAP2420H4 1 /* and on a H4 board */
-/*#define CONFIG_APTIX 1 #* define if on APTIX test chip */
-/*#define CONFIG_VIRTIO 1 #* Using Virtio simulator */
+#define CONFIG_OMAP24XX 1 /* which is a 24XX Processor */
+#define CONFIG_OMAP242X 1 /* which is in a 242X */
+#define CONFIG_OMAP24XXH4 1 /* and on a H4 board */
/* Clock config to target*/
-#define PRCM_CONFIG_II 1
-/* #define PRCM_CONFIG_III 1 */
+/* #define PRCM_CONFIG_II 1 */
+#define PRCM_CONFIG_III 1
-#include <asm/arch/omap2420.h> /* get chip and board defs */
+#include <asm/arch/cpu.h> /* get chip and board defs */
/* On H4, NOR and NAND flash are mutual exclusive.
Define this if you want to use NAND
*/
-/*#define CFG_NAND_BOOT */
-#ifdef CONFIG_APTIX
-#define V_SCLK 1500000
-#else
+/*
+#define CFG_NAND_BOOT
+#define CFG_NAND_2420
+*/
+
#define V_SCLK 12000000
-#endif
/* input clock of PLL */
-/* the OMAP2420 H4 has 12MHz, 13MHz, or 19.2Mhz crystal input */
+/* the OMAP24XX H4 has 12MHz, 13MHz, or 19.2Mhz crystal input */
#define CONFIG_SYS_CLK_FREQ V_SCLK
#undef CONFIG_USE_IRQ /* no support for IRQs */
@@ -82,36 +81,25 @@
* SMC91c96 Etherent
*/
#define CONFIG_DRIVER_LAN91C96
-#define CONFIG_LAN91C96_BASE (H4_CS1_BASE+0x300)
+#define CONFIG_LAN91C96_BASE (DEBUG_BASE+0x300)
#define CONFIG_LAN91C96_EXT_PHY
/*
* NS16550 Configuration
*/
-#ifdef CONFIG_APTIX
-#define V_NS16550_CLK (6000000) /* 6MHz in current MaxSet */
-#else
#define V_NS16550_CLK (48000000) /* 48MHz (APLL96/2) */
-#endif
#define CFG_NS16550
#define CFG_NS16550_SERIAL
#define CFG_NS16550_REG_SIZE (-4)
#define CFG_NS16550_CLK V_NS16550_CLK /* 3MHz (1.5MHz*2) */
-#define CFG_NS16550_COM1 OMAP2420_UART1
+#define CFG_NS16550_COM1 OMAP24XX_UART1
/*
* select serial console configuration
*/
#define CONFIG_SERIAL1 1 /* UART1 on H4 */
- /*
- * I2C configuration
- */
-#define CONFIG_HARD_I2C
-#define CFG_I2C_SPEED 100000
-#define CFG_I2C_SLAVE 1
-#define CONFIG_DRIVER_OMAP24XX_I2C
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
@@ -129,10 +117,23 @@
/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
#include <cmd_confdefs.h>
+ /*
+ * I2C configuration
+ */
+#if (CONFIG_COMMANDS & CFG_CMD_I2C)
+#define CONFIG_HARD_I2C
+#define CFG_I2C_SPEED 100
+#define CFG_I2C_SLAVE 1
+#define CFG_I2C_BUS 0
+#define CFG_I2C_BUS_SELECT 1
+#define CONFIG_DRIVER_OMAP24XX_I2C 1
+#endif
+
/*
* Board NAND Info.
*/
-#define CFG_NAND_ADDR 0x04000000 /* physical address to access nand at CS0*/
+#define CFG_NAND_ADDR NAND_BASE /* physical address to access nand at CS0*/
+#define CFG_NAND_BASE NAND_BASE /* physical address to access nand at CS0*/
#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
#define SECTORSIZE 512
@@ -145,17 +146,10 @@
#define NAND_MAX_FLOORS 1
#define NAND_MAX_CHIPS 1
-#define WRITE_NAND_COMMAND(d, adr) do {*(volatile u16 *)0x6800A07C = d;} while(0)
-#define WRITE_NAND_ADDRESS(d, adr) do {*(volatile u16 *)0x6800A080 = d;} while(0)
-#define WRITE_NAND(d, adr) do {*(volatile u16 *)0x6800A084 = d;} while(0)
-#define READ_NAND(adr) (*(volatile u16 *)0x6800A084)
#define NAND_WAIT_READY(nand) udelay(10)
-
#define NAND_NO_RB 1
#define CFG_NAND_WP
-#define NAND_WP_OFF() do {*(volatile u32 *)(0x6800A050) |= 0x00000010;} while(0)
-#define NAND_WP_ON() do {*(volatile u32 *)(0x6800A050) &= ~0x00000010;} while(0)
#define NAND_CTL_CLRALE(nandptr)
#define NAND_CTL_SETALE(nandptr)
@@ -164,6 +158,7 @@
#define NAND_DISABLE_CE(nand)
#define NAND_ENABLE_CE(nand)
+
#define CONFIG_BOOTDELAY 3
#ifdef NFS_BOOT_DEFAULTS
@@ -180,11 +175,7 @@
/*
* Miscellaneous configurable options
*/
-#ifdef CONFIG_APTIX
-#define V_PROMPT "OMAP2420 Aptix # "
-#else
#define V_PROMPT "OMAP242x H4 # "
-#endif
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT V_PROMPT
@@ -194,23 +185,18 @@
#define CFG_MAXARGS 16 /* max number of command args */
#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
-#define CFG_MEMTEST_START (OMAP2420_SDRC_CS0) /* memtest works on */
-#define CFG_MEMTEST_END (OMAP2420_SDRC_CS0+SZ_31M)
+#define CFG_MEMTEST_START (OMAP24XX_SDRC_CS0) /* memtest works on */
+#define CFG_MEMTEST_END (OMAP24XX_SDRC_CS0+SZ_31M)
#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
-#define CFG_LOAD_ADDR (OMAP2420_SDRC_CS0) /* default load address */
+#define CFG_LOAD_ADDR (OMAP24XX_SDRC_CS0) /* default load address */
/* The 2420 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) or by
* 32KHz clk, or from external sig. This rate is divided by a local divisor.
*/
-#ifdef CONFIG_APTIX
-#define V_PVT 3
-#else
#define V_PVT 7 /* use with 12MHz/128 */
-#endif
-
-#define CFG_TIMERBASE OMAP2420_GPT2
+#define CFG_TIMERBASE OMAP24XX_GPT2
#define CFG_PVT V_PVT /* 2^(pvt+1) */
#define CFG_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CFG_PVT))
@@ -229,14 +215,14 @@
* Physical Memory Map
*/
#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
-#define PHYS_SDRAM_1 OMAP2420_SDRC_CS0
+#define PHYS_SDRAM_1 OMAP24XX_SDRC_CS0
#define PHYS_SDRAM_1_SIZE SZ_32M /* at least 32 meg */
-#define PHYS_SDRAM_2 OMAP2420_SDRC_CS1
+#define PHYS_SDRAM_2 OMAP24XX_SDRC_CS1
#define PHYS_FLASH_SECT_SIZE SZ_128K
-#define PHYS_FLASH_1 H4_CS0_BASE /* Flash Bank #1 */
+#define PHYS_FLASH_1 FLASH_BASE /* Flash Bank #1 */
#define PHYS_FLASH_SIZE_1 SZ_32M
-#define PHYS_FLASH_2 (H4_CS0_BASE+SZ_32M) /* same cs, 2 chips in series */
+#define PHYS_FLASH_2 (FLASH_BASE+SZ_32M) /* same cs, 2 chips in series */
#define PHYS_FLASH_SIZE_2 SZ_32M
/*-----------------------------------------------------------------------
@@ -246,19 +232,22 @@
#define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */
#define CFG_MAX_FLASH_SECT (259) /* max number of sectors on one chip */
#define CFG_MONITOR_BASE CFG_FLASH_BASE /* Monitor at beginning of flash */
-#define CFG_MONITOR_LEN SZ_128K /* Reserve 1 sector */
+#define CFG_MONITOR_LEN SZ_256K /* Reserve 2 sectors */
#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE, CFG_FLASH_BASE + PHYS_FLASH_SIZE_1 }
#ifdef CFG_NAND_BOOT
#define CFG_ENV_IS_IN_NAND 1
#define CFG_ENV_OFFSET 0x80000 /* environment starts here */
#else
-#define CFG_ENV_ADDR (CFG_FLASH_BASE + SZ_128K)
+#define CFG_ENV_ADDR (CFG_FLASH_BASE + SZ_256K)
#define CFG_ENV_IS_IN_FLASH 1
#define CFG_ENV_SECT_SIZE PHYS_FLASH_SECT_SIZE
#define CFG_ENV_OFFSET ( CFG_MONITOR_BASE + CFG_MONITOR_LEN ) /* Environment after Monitor */
#endif
+
+
+
/*-----------------------------------------------------------------------
* CFI FLASH driver setup
*/
@@ -271,23 +260,40 @@
#define CFG_FLASH_ERASE_TOUT (100*CFG_HZ) /* Timeout for Flash Erase */
#define CFG_FLASH_WRITE_TOUT (100*CFG_HZ) /* Timeout for Flash Write */
+/* Flash banks JFFS2 should use */
+#define CFG_MAX_MTD_BANKS (CFG_MAX_FLASH_BANKS+CFG_MAX_NAND_DEVICE)
#define CFG_JFFS2_MEM_NAND
+#define CFG_JFFS2_FIRST_BANK 1 /* use flash_info[1] */
+#define CFG_JFFS2_NUM_BANKS 1
-/*
- * JFFS2 partitions
- */
-/* No command line, one static partition, whole device */
-#undef CONFIG_JFFS2_CMDLINE
-#define CONFIG_JFFS2_DEV "nor1"
-#define CONFIG_JFFS2_PART_SIZE 0xFFFFFFFF
-#define CONFIG_JFFS2_PART_OFFSET 0x00000000
-
-/* mtdparts command line support */
-/* Note: fake mtd_id used, no linux mtd map file */
-/*
-#define CONFIG_JFFS2_CMDLINE
-#define MTDIDS_DEFAULT "nor1=omap2420-1"
-#define MTDPARTS_DEFAULT "mtdparts=omap2420-1:-(jffs2)"
-*/
+/* GPMC Settings */
+#ifdef CFG_NAND_BOOT
+/* NAND */
+#define FLASH_CONFIGURATION_IDX 1
+#else
+/* NOR */
+#define FLASH_CONFIGURATION_IDX 0
+#endif
+#define PROC_NOR_SIZE GPMC_SIZE_64M
+#define PROC_NAND_SIZE GPMC_SIZE_64M
+#define DBG_MPDB_SIZE GPMC_SIZE_16M
+
+
+/* Other NAND Access APIs */
+#ifdef CFG_NAND_BOOT
+#define WRITE_NAND_COMMAND(d, adr) do {*(volatile u16 *)(0x6800A07C)= (d);} while(0)
+#define WRITE_NAND_ADDRESS(d, adr) do {*(volatile u16 *)(0x6800A080) = (d);} while(0)
+#define WRITE_NAND(d, adr) do {*(volatile u16 *)(0x6800A084)= (d);} while(0)
+#define READ_NAND(adr) (*(volatile u16 *)(0x6800A084))
+#define NAND_WP_OFF() do {*(volatile u32 *)(GPMC_CONFIG) |= 0x00000010;} while(0)
+#define NAND_WP_ON() do {*(volatile u32 *)(GPMC_CONFIG) &= ~0x00000010;} while(0)
+#define NAND_CTL_CLRALE(nandptr)
+#define NAND_CTL_SETALE(nandptr)
+#define NAND_CTL_CLRCLE(nandptr)
+#define NAND_CTL_SETCLE(nandptr)
+#define NAND_DISABLE_CE(nand)
+#define NAND_ENABLE_CE(nand)
+#define NAND_WAIT_READY(nand) udelay(10)
+#endif /* NAND Commands */
#endif /* __CONFIG_H */
diff --git a/include/configs/omap2420h4.h.contrib b/include/configs/omap2420h4.h.contrib
new file mode 100644
index 0000000000..50c6204c81
--- /dev/null
+++ b/include/configs/omap2420h4.h.contrib
@@ -0,0 +1,277 @@
+/*
+ * (C) Copyright 2004
+ * Texas Instruments.
+ * Richard Woodruff <r-woodruff2@ti.com>
+ * Kshitij Gupta <kshitij@ti.com>
+ *
+ * Configuration settings for the 242x TI H4 board.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * High Level Configuration Options
+ */
+#define CONFIG_ARM1136 1 /* This is an arm1136 CPU core */
+#define CONFIG_OMAP 1 /* in a TI OMAP core */
+#define CONFIG_OMAP2420 1 /* which is in a 2420 */
+#define CONFIG_OMAP2420H4 1 /* and on a H4 board */
+//#define CONFIG_APTIX 1 /* define if on APTIX test chip */
+//#define CONFIG_VIRTIO 1 /* Using Virtio simulator */
+
+/* Clock config to target*/
+#define PRCM_CONFIG_II 1
+//#define PRCM_CONFIG_III 1
+
+/* Memory configuration on board */
+//#define CONFIG_OPTIMIZE_DDR 1
+
+/* use only part of sram in startup */
+#define CONFIG_PARTIAL_SRAM 1
+
+#include <asm/arch/omap2420.h> /* get chip and board defs */
+
+/* On H4, NOR and NAND flash are mutual exclusive.
+ Define this if you want to use NAND
+ */
+//#define CFG_NAND_BOOT
+
+#ifdef CONFIG_APTIX
+#define V_SCLK 1500000
+#else
+#define V_SCLK 12000000
+#endif
+
+/* input clock of PLL */
+/* the OMAP2420 H4 has 12MHz, 13MHz, or 19.2Mhz crystal input */
+#define CONFIG_SYS_CLK_FREQ V_SCLK
+
+#undef CONFIG_USE_IRQ /* no support for IRQs */
+#define CONFIG_MISC_INIT_R
+
+#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
+#define CONFIG_SETUP_MEMORY_TAGS 1
+#define CONFIG_INITRD_TAG 1
+#define CONFIG_REVISION_TAG 1
+
+/*
+ * Size of malloc() pool
+ */
+#define CFG_ENV_SIZE SZ_128K /* Total Size of Environment Sector */
+#define CFG_MALLOC_LEN (CFG_ENV_SIZE + SZ_128K)
+#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
+
+/*
+ * Hardware drivers
+ */
+
+/*
+ * SMC91c96 Etherent
+ */
+#define CONFIG_DRIVER_LAN91C96
+#define CONFIG_LAN91C96_BASE (H4_CS1_BASE+0x300)
+#define CONFIG_LAN91C96_EXT_PHY
+
+/*
+ * NS16550 Configuration
+ */
+#ifdef CONFIG_APTIX
+#define V_NS16550_CLK (6000000) /* 6MHz in current MaxSet */
+#else
+#define V_NS16550_CLK (48000000) /* 48MHz (APLL96/2) */
+#endif
+
+#define CFG_NS16550
+#define CFG_NS16550_SERIAL
+#define CFG_NS16550_REG_SIZE (-4)
+#define CFG_NS16550_CLK V_NS16550_CLK /* 3MHz (1.5MHz*2) */
+#define CFG_NS16550_COM1 OMAP2420_UART1
+
+/*
+ * select serial console configuration
+ */
+#define CONFIG_SERIAL1 1 /* UART1 on H4 */
+
+ /*
+ * I2C configuration
+ */
+#define CONFIG_HARD_I2C
+#define CFG_I2C_SPEED 100000
+#define CFG_I2C_SLAVE 1
+#define CONFIG_DRIVER_OMAP24XX_I2C
+
+/* allow to overwrite serial and ethaddr */
+#define CONFIG_ENV_OVERWRITE
+#define CONFIG_CONS_INDEX 1
+#define CONFIG_BAUDRATE 115200
+#define CFG_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200}
+
+#ifdef CFG_NAND_BOOT
+#define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_DHCP | CFG_CMD_I2C | CFG_CMD_NAND | CFG_CMD_JFFS2)
+#else
+#define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_DHCP | CFG_CMD_I2C | CFG_CMD_JFFS2)
+#endif
+// I'd like to get to these. Snap kernel loads if we make MMC go //
+ // #define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_NAND | CFG_CMD_JFFS2 | CFG_CMD_DHCP | CFG_CMD_MMC | CFG_CMD_FAT | CFG_CMD_I2C)
+
+#define CONFIG_BOOTP_MASK CONFIG_BOOTP_DEFAULT
+
+/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
+#include <cmd_confdefs.h>
+
+/*
+ * Board NAND Info.
+ */
+#define CFG_NAND_ADDR 0x04000000 /* physical address to access nand at CS0*/
+
+#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
+#define SECTORSIZE 512
+
+#define ADDR_COLUMN 1
+#define ADDR_PAGE 2
+#define ADDR_COLUMN_PAGE 3
+
+#define NAND_ChipID_UNKNOWN 0x00
+#define NAND_MAX_FLOORS 1
+#define NAND_MAX_CHIPS 1
+
+#define WRITE_NAND_COMMAND(d, adr) do {*(volatile u16 *)0x6800A07C = d;} while(0)
+#define WRITE_NAND_ADDRESS(d, adr) do {*(volatile u16 *)0x6800A080 = d;} while(0)
+#define WRITE_NAND(d, adr) do {*(volatile u16 *)0x6800A084 = d;} while(0)
+#define READ_NAND(adr) (*(volatile u16 *)0x6800A084)
+#define NAND_WAIT_READY(nand) udelay(10)
+
+#define NAND_NO_RB 1
+
+#define CFG_NAND_WP
+#define NAND_WP_OFF() do {*(volatile u32 *)(0x6800A050) |= 0x00000010;} while(0)
+#define NAND_WP_ON() do {*(volatile u32 *)(0x6800A050) &= ~0x00000010;} while(0)
+
+
+#define NAND_CTL_CLRALE(nandptr)
+#define NAND_CTL_SETALE(nandptr)
+#define NAND_CTL_CLRCLE(nandptr)
+#define NAND_CTL_SETCLE(nandptr)
+#define NAND_DISABLE_CE(nand)
+#define NAND_ENABLE_CE(nand)
+
+
+#define CONFIG_BOOTDELAY 3
+
+#ifdef NFS_BOOT_DEFAULTS
+#define CONFIG_BOOTARGS "mem=32M console=ttyS0,115200n8 noinitrd root=/dev/nfs rw nfsroot=128.247.77.158:/home/a0384864/wtbu/rootfs ip=dhcp"
+#else
+#define CONFIG_BOOTARGS "root=/dev/ram0 rw mem=32M console=ttyS0,115200n8 initrd=0x80600000,8M ramdisk_size=8192"
+#endif
+
+#define CONFIG_NETMASK 255.255.254.0
+#define CONFIG_IPADDR 128.247.77.90
+#define CONFIG_SERVERIP 128.247.77.158
+#define CONFIG_BOOTFILE "uImage"
+
+/*
+ * Miscellaneous configurable options
+ */
+#ifdef CONFIG_APTIX
+#define V_PROMPT "OMAP2420 Aptix # "
+#else
+#define V_PROMPT "OMAP242x H4 # "
+#endif
+
+#define CFG_LONGHELP /* undef to save memory */
+#define CFG_PROMPT V_PROMPT
+#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
+/* Print Buffer Size */
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16)
+#define CFG_MAXARGS 16 /* max number of command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+
+#define CFG_MEMTEST_START (OMAP2420_SDRC_CS0) /* memtest works on */
+#define CFG_MEMTEST_END (OMAP2420_SDRC_CS0+SZ_31M)
+
+#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
+
+#define CFG_LOAD_ADDR (OMAP2420_SDRC_CS0) /* default load address */
+
+/* The 2420 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) or by
+ * 32KHz clk, or from external sig. This rate is divided by a local divisor.
+ */
+#ifdef CONFIG_APTIX
+#define V_PVT 3
+#else
+#define V_PVT 7 /* use with 12MHz/128 */
+#endif
+
+#define CFG_TIMERBASE OMAP2420_GPT2
+#define CFG_PVT V_PVT /* 2^(pvt+1) */
+#define CFG_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CFG_PVT))
+
+/*-----------------------------------------------------------------------
+ * Stack sizes
+ *
+ * The stack sizes are set up in start.S using the settings below
+ */
+#define CONFIG_STACKSIZE SZ_128K /* regular stack */
+#ifdef CONFIG_USE_IRQ
+#define CONFIG_STACKSIZE_IRQ SZ_4K /* IRQ stack */
+#define CONFIG_STACKSIZE_FIQ SZ_4K /* FIQ stack */
+#endif
+
+/*-----------------------------------------------------------------------
+ * Physical Memory Map
+ */
+#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
+#define PHYS_SDRAM_1 OMAP2420_SDRC_CS0
+#define PHYS_SDRAM_1_SIZE SZ_32M /* at least 32 meg */
+#define PHYS_SDRAM_2 OMAP2420_SDRC_CS1
+
+#define PHYS_FLASH_1 H4_CS0_BASE /* Flash Bank #1 */
+#define PHYS_FLASH_SIZE_1 SZ_32M
+#define PHYS_FLASH_2 (H4_CS0_BASE+SZ_32M) /* same cs, 2 chips in series */
+#define PHYS_FLASH_SIZE_2 SZ_32M
+#define CFG_FLASH_BASE PHYS_FLASH_1
+
+/*-----------------------------------------------------------------------
+ * FLASH and environment organization
+ */
+#define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */
+#define CFG_MAX_FLASH_SECT (259) /* max number of sectors on one chip */
+
+#ifdef CFG_NAND_BOOT
+#define CFG_ENV_IS_IN_NAND 1
+#define CFG_ENV_OFFSET 0x80000 /* environment starts here */
+#else
+#define CFG_ENV_ADDR (CFG_FLASH_BASE + SZ_128K)
+#define CFG_ENV_IS_IN_FLASH 1
+#endif
+
+/* timeout values are in ticks */
+#define CFG_FLASH_ERASE_TOUT (30*75*CFG_HZ) /* Timeout for Flash Erase */
+#define CFG_FLASH_WRITE_TOUT (30*75*CFG_HZ) /* Timeout for Flash Write */
+
+/* Flash banks JFFS2 should use */
+#define CFG_MAX_MTD_BANKS (CFG_MAX_FLASH_BANKS+CFG_MAX_NAND_DEVICE)
+#define CFG_JFFS2_MEM_NAND
+#define CFG_JFFS2_FIRST_BANK 1 /* use flash_info[1] */
+#define CFG_JFFS2_NUM_BANKS 1
+
+#endif /* __CONFIG_H */
diff --git a/include/configs/omap2420h4.h.keep b/include/configs/omap2420h4.h.keep
new file mode 100644
index 0000000000..f1175b4f4c
--- /dev/null
+++ b/include/configs/omap2420h4.h.keep
@@ -0,0 +1,301 @@
+/*
+ * (C) Copyright 2004
+ * Texas Instruments.
+ * Richard Woodruff <r-woodruff2@ti.com>
+ * Kshitij Gupta <kshitij@ti.com>
+ *
+ * Configuration settings for the 242x TI H4 board.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * High Level Configuration Options
+ */
+#define CONFIG_ARM1136 1 /* This is an arm1136 CPU core */
+#define CONFIG_OMAP 1 /* in a TI OMAP core */
+#define CONFIG_OMAP24XX 1 /* which is a 24XX Processor */
+#define CONFIG_OMAP242X 1 /* which is in a 242X */
+#define CONFIG_OMAP24XXH4 1 /* and on a H4 board */
+/*#define CONFIG_VIRTIO 1 #* Using Virtio simulator */
+
+/* Clock config to target*/
+#define PRCM_CONFIG_II 1
+/* #define PRCM_CONFIG_III 1 */
+
+#include <asm/arch/cpu.h> /* get chip and board defs */
+
+/* On H4, NOR and NAND flash are mutual exclusive.
+ Define this if you want to use NAND
+ */
+/*
+#define CFG_NAND_BOOT
+#define CFG_NAND_2420
+*/
+
+#define V_SCLK 12000000
+
+/* input clock of PLL */
+/* the OMAP24XX H4 has 12MHz, 13MHz, or 19.2Mhz crystal input */
+#define CONFIG_SYS_CLK_FREQ V_SCLK
+
+#undef CONFIG_USE_IRQ /* no support for IRQs */
+#define CONFIG_MISC_INIT_R
+
+#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
+#define CONFIG_SETUP_MEMORY_TAGS 1
+#define CONFIG_INITRD_TAG 1
+#define CONFIG_REVISION_TAG 1
+
+/*
+ * Size of malloc() pool
+ */
+#define CFG_ENV_SIZE SZ_128K /* Total Size of Environment Sector */
+#define CFG_MALLOC_LEN (CFG_ENV_SIZE + SZ_128K)
+#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
+
+/*
+ * Hardware drivers
+ */
+
+/*
+ * SMC91c96 Etherent
+ */
+#define CONFIG_DRIVER_LAN91C96
+#define CONFIG_LAN91C96_BASE (H4_CS1_BASE+0x300)
+#define CONFIG_LAN91C96_EXT_PHY
+
+/*
+ * NS16550 Configuration
+ */
+#define V_NS16550_CLK (48000000) /* 48MHz (APLL96/2) */
+
+#define CFG_NS16550
+#define CFG_NS16550_SERIAL
+#define CFG_NS16550_REG_SIZE (-4)
+#define CFG_NS16550_CLK V_NS16550_CLK /* 3MHz (1.5MHz*2) */
+#define CFG_NS16550_COM1 OMAP24XX_UART1
+
+/*
+ * select serial console configuration
+ */
+#define CONFIG_SERIAL1 1 /* UART1 on H4 */
+
+
+/* allow to overwrite serial and ethaddr */
+#define CONFIG_ENV_OVERWRITE
+#define CONFIG_CONS_INDEX 1
+#define CONFIG_BAUDRATE 115200
+#define CFG_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200}
+
+#ifdef CFG_NAND_BOOT
+#define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_DHCP | CFG_CMD_I2C | CFG_CMD_NAND | CFG_CMD_JFFS2)
+#else
+#define CONFIG_COMMANDS ((CONFIG_CMD_DFL | CFG_CMD_DHCP | CFG_CMD_I2C | CFG_CMD_JFFS2) & ~CFG_CMD_AUTOSCRIPT)
+#endif
+#define CONFIG_BOOTP_MASK CONFIG_BOOTP_DEFAULT
+
+/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
+#include <cmd_confdefs.h>
+
+ /*
+ * I2C configuration
+ */
+#if (CONFIG_COMMANDS & CFG_CMD_I2C)
+#define CONFIG_HARD_I2C
+#define CFG_I2C_SPEED 100
+#define CFG_I2C_SLAVE 1
+#define CFG_I2C_BUS 0
+#define CFG_I2C_BUS_SELECT 1
+#define CONFIG_DRIVER_OMAP24XX_I2C 1
+#endif
+
+/*
+ * Board NAND Info.
+ */
+#define CFG_NAND_ADDR 0x04000000 /* physical address to access nand at CS0*/
+
+#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
+#define SECTORSIZE 512
+
+#define ADDR_COLUMN 1
+#define ADDR_PAGE 2
+#define ADDR_COLUMN_PAGE 3
+
+#define NAND_ChipID_UNKNOWN 0x00
+#define NAND_MAX_FLOORS 1
+#define NAND_MAX_CHIPS 1
+
+#define NAND_WAIT_READY(nand) udelay(10)
+#define NAND_NO_RB 1
+
+#define CFG_NAND_WP
+
+#define NAND_CTL_CLRALE(nandptr)
+#define NAND_CTL_SETALE(nandptr)
+#define NAND_CTL_CLRCLE(nandptr)
+#define NAND_CTL_SETCLE(nandptr)
+#define NAND_DISABLE_CE(nand)
+#define NAND_ENABLE_CE(nand)
+
+
+#define CONFIG_BOOTDELAY 3
+
+#ifdef NFS_BOOT_DEFAULTS
+#define CONFIG_BOOTARGS "mem=32M console=ttyS0,115200n8 noinitrd root=/dev/nfs rw nfsroot=128.247.77.158:/home/a0384864/wtbu/rootfs ip=dhcp"
+#else
+#define CONFIG_BOOTARGS "root=/dev/ram0 rw mem=32M console=ttyS0,115200n8 initrd=0x80600000,8M ramdisk_size=8192"
+#endif
+
+#define CONFIG_NETMASK 255.255.254.0
+#define CONFIG_IPADDR 128.247.77.90
+#define CONFIG_SERVERIP 128.247.77.158
+#define CONFIG_BOOTFILE "uImage"
+
+/*
+ * Miscellaneous configurable options
+ */
+#define V_PROMPT "OMAP242x H4 # "
+
+#define CFG_LONGHELP /* undef to save memory */
+#define CFG_PROMPT V_PROMPT
+#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
+/* Print Buffer Size */
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16)
+#define CFG_MAXARGS 16 /* max number of command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+
+#define CFG_MEMTEST_START (OMAP24XX_SDRC_CS0) /* memtest works on */
+#define CFG_MEMTEST_END (OMAP24XX_SDRC_CS0+SZ_31M)
+
+#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
+
+#define CFG_LOAD_ADDR (OMAP24XX_SDRC_CS0) /* default load address */
+
+/* The 2420 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) or by
+ * 32KHz clk, or from external sig. This rate is divided by a local divisor.
+ */
+#define V_PVT 7 /* use with 12MHz/128 */
+#define CFG_TIMERBASE OMAP24XX_GPT2
+#define CFG_PVT V_PVT /* 2^(pvt+1) */
+#define CFG_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CFG_PVT))
+
+/*-----------------------------------------------------------------------
+ * Stack sizes
+ *
+ * The stack sizes are set up in start.S using the settings below
+ */
+#define CONFIG_STACKSIZE SZ_128K /* regular stack */
+#ifdef CONFIG_USE_IRQ
+#define CONFIG_STACKSIZE_IRQ SZ_4K /* IRQ stack */
+#define CONFIG_STACKSIZE_FIQ SZ_4K /* FIQ stack */
+#endif
+
+/*-----------------------------------------------------------------------
+ * Physical Memory Map
+ */
+#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
+#define PHYS_SDRAM_1 OMAP24XX_SDRC_CS0
+#define PHYS_SDRAM_1_SIZE SZ_32M /* at least 32 meg */
+#define PHYS_SDRAM_2 OMAP24XX_SDRC_CS1
+
+#define PHYS_FLASH_SECT_SIZE SZ_128K
+#define PHYS_FLASH_1 H4_CS0_BASE /* Flash Bank #1 */
+#define PHYS_FLASH_SIZE_1 SZ_32M
+#define PHYS_FLASH_2 (H4_CS0_BASE+SZ_32M) /* same cs, 2 chips in series */
+#define PHYS_FLASH_SIZE_2 SZ_32M
+
+/*-----------------------------------------------------------------------
+ * FLASH and environment organization
+ */
+#define CFG_FLASH_BASE PHYS_FLASH_1
+#define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */
+#define CFG_MAX_FLASH_SECT (259) /* max number of sectors on one chip */
+#define CFG_MONITOR_BASE CFG_FLASH_BASE /* Monitor at beginning of flash */
+#define CFG_MONITOR_LEN SZ_256K /* Reserve 2 sectors */
+#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE, CFG_FLASH_BASE + PHYS_FLASH_SIZE_1 }
+
+#ifdef CFG_NAND_BOOT
+#define CFG_ENV_IS_IN_NAND 1
+#define CFG_ENV_OFFSET 0x80000 /* environment starts here */
+#else
+#define CFG_ENV_ADDR (CFG_FLASH_BASE + SZ_256K)
+#define CFG_ENV_IS_IN_FLASH 1
+#define CFG_ENV_SECT_SIZE PHYS_FLASH_SECT_SIZE
+#define CFG_ENV_OFFSET ( CFG_MONITOR_BASE + CFG_MONITOR_LEN ) /* Environment after Monitor */
+#endif
+
+
+
+
+/*-----------------------------------------------------------------------
+ * CFI FLASH driver setup
+ */
+#define CFG_FLASH_CFI 1 /* Flash memory is CFI compliant */
+#define CFG_FLASH_CFI_DRIVER 1 /* Use drivers/cfi_flash.c */
+#define CFG_FLASH_USE_BUFFER_WRITE 1 /* Use buffered writes (~10x faster) */
+#define CFG_FLASH_PROTECTION 1 /* Use hardware sector protection */
+
+/* timeout values are in ticks */
+#define CFG_FLASH_ERASE_TOUT (100*CFG_HZ) /* Timeout for Flash Erase */
+#define CFG_FLASH_WRITE_TOUT (100*CFG_HZ) /* Timeout for Flash Write */
+
+/* Flash banks JFFS2 should use */
+#define CFG_MAX_MTD_BANKS (CFG_MAX_FLASH_BANKS+CFG_MAX_NAND_DEVICE)
+#define CFG_JFFS2_MEM_NAND
+#define CFG_JFFS2_FIRST_BANK 1 /* use flash_info[1] */
+#define CFG_JFFS2_NUM_BANKS 1
+
+/* GPMC Settings */
+#ifdef CFG_NAND_BOOT
+/* NAND */
+#define OMAP24XX_GPMC_CS0 SMNAND
+#else
+/* NOR */
+#define OMAP24XX_GPMC_CS0 STNOR
+#endif
+
+#define OMAP24XX_GPMC_CS0_SIZE GPMC_SIZE_64M
+#define OMAP24XX_GPMC_CS0_MAP CFG_FLASH_BASE
+
+#define OMAP24XX_GPMC_CS1 MPDB
+#define OMAP24XX_GPMC_CS1_SIZE GPMC_SIZE_16M
+#define OMAP24XX_GPMC_CS1_MAP H4_CS1_BASE
+
+/* Other NAND Access APIs */
+#ifdef CFG_NAND_BOOT
+#define WRITE_NAND_COMMAND(d, adr) do {*(volatile u16 *)(GPMC_NAND_CMD_0)= (d);} while(0)
+#define WRITE_NAND_ADDRESS(d, adr) do {*(volatile u16 *)(GPMC_NAND_ADR_0) = (d);} while(0)
+#define WRITE_NAND(d, adr) do {*(volatile u16 *)(GPMC_NAND_DAT_0)= (d);} while(0)
+#define READ_NAND(adr) (*(volatile u16 *)(GPMC_NAND_DAT_0))
+#define NAND_WP_OFF() do {*(volatile u32 *)(GPMC_CONFIG) |= 0x00000010;} while(0)
+#define NAND_WP_ON() do {*(volatile u32 *)(GPMC_CONFIG) &= ~0x00000010;} while(0)
+#define NAND_CTL_CLRALE(nandptr)
+#define NAND_CTL_SETALE(nandptr)
+#define NAND_CTL_CLRCLE(nandptr)
+#define NAND_CTL_SETCLE(nandptr)
+#define NAND_DISABLE_CE(nand)
+#define NAND_ENABLE_CE(nand)
+#define NAND_WAIT_READY(nand) udelay(10)
+#endif /* NAND Commands */
+
+#endif /* __CONFIG_H */
diff --git a/include/configs/omap2430sdp.h b/include/configs/omap2430sdp.h
new file mode 100644
index 0000000000..dbd92b944c
--- /dev/null
+++ b/include/configs/omap2430sdp.h
@@ -0,0 +1,305 @@
+/*
+ * (C) Copyright 2004-2005
+ * Texas Instruments.
+ * Richard Woodruff <r-woodruff2@ti.com>
+ * Kshitij Gupta <kshitij@ti.com>
+ *
+ * Configuration settings for the 242x TI SDP2430 board.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * High Level Configuration Options
+ */
+#define CONFIG_ARM1136 1 /* This is an arm1136 CPU core */
+#define CONFIG_OMAP 1 /* in a TI OMAP core */
+#define CONFIG_OMAP24XX 1 /* which is a 24XX */
+#define CONFIG_OMAP243X 1 /* which is in a 243X */
+#define CONFIG_2430SDP 1 /* working with SDP? make this 1 */
+
+/* Clock config for target */
+//#define PRCM_CONFIG_5A 1 /* 2430 ES1 */
+#define PRCM_CONFIG_2 1 /* 2430 ES2+330ARM+DDR-165-PISMO */
+
+#define OMAP2430_SQUARE_CLOCK_INPUT 1
+
+#include <asm/arch/cpu.h> /* get chip and board defs */
+
+#define V_SCLK 13000000
+
+/* input clock of PLL */
+/* the OMAP24XX SDP has 12MHz, 13MHz, or 19.2Mhz crystal input */
+#define CONFIG_SYS_CLK_FREQ V_SCLK
+
+#undef CONFIG_USE_IRQ /* no support for IRQs */
+#define CONFIG_MISC_INIT_R
+
+#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
+#define CONFIG_SETUP_MEMORY_TAGS 1
+#define CONFIG_INITRD_TAG 1
+#define CONFIG_REVISION_TAG 1
+
+/*
+ * Size of malloc() pool
+ */
+#define CFG_ENV_SIZE SZ_128K /* Total Size of Environment Sector */
+#define CFG_MALLOC_LEN (CFG_ENV_SIZE + SZ_128K)
+#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
+
+/*
+ * Hardware drivers
+ */
+
+/*
+ * NS16550 Configuration
+ */
+#define V_NS16550_CLK (48000000) /* 48MHz (APLL96/2) */
+
+#define CFG_NS16550
+#define CFG_NS16550_SERIAL
+#define CFG_NS16550_REG_SIZE (-4)
+#define CFG_NS16550_CLK V_NS16550_CLK
+#define CFG_NS16550_COM1 OMAP24XX_UART1
+
+/*
+ * select serial console configuration
+ */
+#define CONFIG_SERIAL1 1 /* UART1 on SDP */
+/* allow to overwrite serial and ethaddr */
+#define CONFIG_ENV_OVERWRITE
+#define CONFIG_CONS_INDEX 1
+#define CONFIG_BAUDRATE 115200
+#define CFG_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, 115200}
+
+#define NET_CMDS (CFG_CMD_DHCP|CFG_CMD_NFS|CFG_CMD_NET)
+
+/* Config CMD*/
+//#define CONFIG_COMMANDS ((CFG_CMD_I2C | CONFIG_CMD_DFL | CFG_CMD_DHCP | CFG_CMD_NAND | CFG_CMD_ONENAND | CFG_CMD_JFFS2) & ~CFG_CMD_AUTOSCRIPT)
+
+//#define CONFIG_COMMANDS ((CFG_CMD_I2C | CONFIG_CMD_DFL | CFG_CMD_DHCP | CFG_CMD_JFFS2) & ~CFG_CMD_AUTOSCRIPT)
+
+#define CONFIG_COMMANDS ((CFG_CMD_I2C | CONFIG_CMD_DFL | CFG_CMD_DHCP | CFG_CMD_ONENAND | CFG_CMD_JFFS2) & ~CFG_CMD_AUTOSCRIPT)
+
+#define CONFIG_BOOTP_MASK CONFIG_BOOTP_DEFAULT
+
+/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
+#include <cmd_confdefs.h>
+
+#if (CONFIG_COMMANDS & CFG_CMD_NET)
+/*
+ * SMC91c96 Etherent
+ */
+#define CONFIG_DRIVER_LAN91C96
+#define CONFIG_LAN91C96_BASE (DEBUG_BASE+0x300)
+#define CONFIG_LAN91C96_EXT_PHY
+#endif
+
+#if (CONFIG_COMMANDS & CFG_CMD_I2C)
+#define CFG_I2C_SPEED 100
+#define CFG_I2C_SLAVE 1
+#define CFG_I2C_BUS 0
+#define CFG_I2C_BUS_SELECT 1
+#define CONFIG_DRIVER_OMAP24XX_I2C 1
+#endif
+
+/*
+ * Board NAND Info.
+ */
+#define CFG_NAND_ADDR NAND_BASE /* physical address to access nand*/
+#define CFG_NAND_BASE NAND_BASE /* physical address to access nand at CS0*/
+
+
+#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
+#define SECTORSIZE 512
+
+#define ADDR_COLUMN 1
+#define ADDR_PAGE 2
+#define ADDR_COLUMN_PAGE 3
+
+#define NAND_ChipID_UNKNOWN 0x00
+#define NAND_MAX_FLOORS 1
+#define NAND_MAX_CHIPS 1
+#define NAND_NO_RB 1
+#define CFG_NAND_WP
+
+
+#define CONFIG_BOOTDELAY 3
+
+#ifdef NFS_BOOT_DEFAULTS
+#define CONFIG_BOOTARGS "mem=32M console=ttyS0,115200n8 noinitrd root=/dev/nfs rw nfsroot=128.247.77.158:/home/a0384864/wtbu/rootfs ip=dhcp"
+#else
+
+#define CONFIG_BOOTARGS "root=/dev/ram0 rw mem=32M console=ttyS0,115200n8 initrd=0x80600000,8M ramdisk_size=8192"
+
+#endif
+
+#define CONFIG_NETMASK 255.255.254.0
+#define CONFIG_IPADDR 128.247.77.90
+#define CONFIG_SERVERIP 128.247.77.158
+#define CONFIG_BOOTFILE "uImage"
+
+/*
+ * Miscellaneous configurable options
+ */
+#define V_PROMPT "OMAP243X SDP # "
+
+#define CFG_LONGHELP /* undef to save memory */
+#define CFG_PROMPT V_PROMPT
+#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
+/* Print Buffer Size */
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16)
+#define CFG_MAXARGS 16 /* max number of command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+
+#define CFG_MEMTEST_START (OMAP24XX_SDRC_CS0) /* memtest works on */
+#define CFG_MEMTEST_END (OMAP24XX_SDRC_CS0+SZ_31M)
+
+#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
+
+#define CFG_LOAD_ADDR (OMAP24XX_SDRC_CS0) /* default load address */
+
+/* The 2430 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) or by
+ * 32KHz clk, or from external sig. This rate is divided by a local divisor.
+ */
+#define V_PVT 7
+
+#define CFG_TIMERBASE OMAP24XX_GPT2
+#define CFG_PVT V_PVT /* 2^(pvt+1) */
+#define CFG_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CFG_PVT))
+
+/*-----------------------------------------------------------------------
+ * Stack sizes
+ *
+ * The stack sizes are set up in start.S using the settings below
+ */
+#define CONFIG_STACKSIZE SZ_128K /* regular stack */
+#ifdef CONFIG_USE_IRQ
+#define CONFIG_STACKSIZE_IRQ SZ_4K /* IRQ stack */
+#define CONFIG_STACKSIZE_FIQ SZ_4K /* FIQ stack */
+#endif
+
+/*-----------------------------------------------------------------------
+ * Physical Memory Map
+ */
+#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
+#define PHYS_SDRAM_1 OMAP24XX_SDRC_CS0
+#define PHYS_SDRAM_1_SIZE SZ_32M /* at least 32 meg */
+#define PHYS_SDRAM_2 OMAP24XX_SDRC_CS1
+
+/* SDRAM Bank Allocation method */
+//#define SDRC_B_R_C 1
+//#define SDRC_B1_R_B0_C 1
+#define SDRC_R_B_C 1
+
+/*-----------------------------------------------------------------------
+ * FLASH and environment organization
+ */
+
+/* **** PISMO SUPPORT *** */
+
+/* Configure the PISMO - REV A Version is as follows */
+#define PISMO_CS0 PISMO_SIBLEY0
+#define PISMO_CS1 PISMO_SIBLEY1
+#define PISMO_CS2 PISMO_ONENAND
+#define PROC_NOR_SIZE GPMC_SIZE_64M
+#define PROC_NAND_SIZE GPMC_SIZE_64M
+#define PISMO_SIB0_SIZE GPMC_SIZE_64M
+#define PISMO_SIB1_SIZE GPMC_SIZE_64M
+#define PISMO_ONEN_SIZE GPMC_SIZE_128M
+#define DBG_MPDB_SIZE GPMC_SIZE_16M
+#define PISMO_PCMCIA_SIZE GPMC_SIZE_128M
+
+#define PHYS_FLASH_SIZE SZ_32M
+#define CFG_MONITOR_LEN SZ_256K /* Reserve 2 sectors */
+#define CFG_MAX_FLASH_SECT (259) /* max number of sectors on one chip */
+
+#define CFG_MAX_FLASH_BANKS 4 /* max number of flash banks */
+#define CFG_FLASH_BANKS_LIST { FLASH_BASE, FLASH_BASE + PHYS_FLASH_SIZE, SIBLEY_MAP1, SIBLEY_MAP2 }
+
+
+# define CFG_FLASH_BASE boot_flash_base
+#define PHYS_FLASH_SECT_SIZE boot_flash_sec
+
+#define CFG_MONITOR_BASE CFG_FLASH_BASE /* Monitor at beginning of flash */
+#define CFG_ONENAND_BASE ONENAND_MAP
+
+#define CFG_ENV_IS_IN_NAND 1
+#define CFG_ENV_IS_IN_ONENAND 1
+#define CFG_ENV_IS_IN_FLASH 1
+#define ONENAND_ENV_OFFSET 0xc0000 /* environment starts here */
+#define SMNAND_ENV_OFFSET 0x80000 /* environment starts here */
+
+#define CFG_ENV_SECT_SIZE boot_flash_sec
+#define CFG_ENV_OFFSET boot_flash_off
+#define CFG_ENV_ADDR boot_flash_env_addr
+
+
+/*-----------------------------------------------------------------------
+ * CFI FLASH driver setup
+ */
+#define CFG_FLASH_CFI 1 /* Flash memory is CFI compliant */
+#define CFG_FLASH_CFI_DRIVER 1 /* Use drivers/cfi_flash.c */
+#define CFG_FLASH_USE_BUFFER_WRITE 1 /* Use buffered writes (~10x faster) */
+#define CFG_FLASH_PROTECTION 1 /* Use hardware sector protection */
+#define CFG_FLASH_QUIET_TEST 1 /* Dont crib abt missing chips */
+#define CFG_FLASH_CFI_WIDTH 0x02
+/* timeout values are in ticks */
+#define CFG_FLASH_ERASE_TOUT (100*CFG_HZ) /* Timeout for Flash Erase */
+#define CFG_FLASH_WRITE_TOUT (100*CFG_HZ) /* Timeout for Flash Write */
+
+/* Flash banks JFFS2 should use */
+#define CFG_MAX_MTD_BANKS (CFG_MAX_FLASH_BANKS+CFG_MAX_NAND_DEVICE)
+#define CFG_JFFS2_MEM_NAND
+#define CFG_JFFS2_FIRST_BANK CFG_MAX_FLASH_BANKS /* use flash_info[2] */
+#define CFG_JFFS2_NUM_BANKS 1
+#define CONFIG_LED_INFO
+#define CONFIG_LED_LEN 16
+
+#define ENV_IS_VARIABLE 1
+
+#ifndef __ASSEMBLY__
+extern unsigned int nand_cs_base;
+extern unsigned int boot_flash_base;
+extern volatile unsigned int boot_flash_env_addr;
+extern unsigned int boot_flash_off;
+extern unsigned int boot_flash_sec;
+extern unsigned int boot_flash_type;
+#endif
+
+#define WRITE_NAND_COMMAND(d, adr) __raw_writew(d, (nand_cs_base + GPMC_NAND_CMD))
+#define WRITE_NAND_ADDRESS(d, adr) __raw_writew(d, (nand_cs_base + GPMC_NAND_ADR))
+#define WRITE_NAND(d, adr) __raw_writew(d, (nand_cs_base + GPMC_NAND_DAT))
+#define READ_NAND(adr) __raw_readw((nand_cs_base + GPMC_NAND_DAT))
+
+/* Other NAND Access APIs */
+#define NAND_WP_OFF() do {*(volatile u32 *)(GPMC_CONFIG) |= 0x00000010;} while(0)
+#define NAND_WP_ON() do {*(volatile u32 *)(GPMC_CONFIG) &= ~0x00000010;} while(0)
+#define NAND_CTL_CLRALE(nandptr)
+#define NAND_CTL_SETALE(nandptr)
+#define NAND_CTL_CLRCLE(nandptr)
+#define NAND_CTL_SETCLE(nandptr)
+#define NAND_DISABLE_CE(nand)
+#define NAND_ENABLE_CE(nand)
+#define NAND_WAIT_READY(nand) udelay(10)
+
+#endif /* __CONFIG_H */
diff --git a/include/configs/omap3430labrador.h b/include/configs/omap3430labrador.h
new file mode 100644
index 0000000000..5d3fef453f
--- /dev/null
+++ b/include/configs/omap3430labrador.h
@@ -0,0 +1,309 @@
+/*
+ * (C) Copyright 2006
+ * Texas Instruments.
+ * Richard Woodruff <r-woodruff2@ti.com>
+ * Syed Mohammed Khasim <x0khasim@ti.com>
+ *
+ * Configuration settings for the 3430 TI SDP3430 board.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * High Level Configuration Options
+ */
+#define CONFIG_ARMCORTEXA8 1 /* This is an ARM V7 CPU core */
+#define CONFIG_OMAP 1 /* in a TI OMAP core */
+#define CONFIG_OMAP34XX 1 /* which is a 34XX */
+#define CONFIG_OMAP3430 1 /* which is in a 3430 */
+#define CONFIG_3430LABRADOR 1 /* working on Labrador */
+//#define CONFIG_3430_AS_3410 1 /* true for 3430 in 3410 mode */
+
+#include <asm/arch/cpu.h> /* get chip and board defs */
+
+/* Clock Defines */
+#define V_OSCK 26000000 /* Clock output from T2 */
+
+#if (V_OSCK > 19200000)
+#define V_SCLK (V_OSCK >> 1)
+#else
+#define V_SCLK V_OSCK
+#endif
+
+#define PRCM_CLK_CFG2_266MHZ 1 /* VDD2=1.15v - 133MHz DDR */
+//#define PRCM_CLK_CFG2_332MHZ 1 /* VDD2=1.15v - 166MHz DDR */
+#define PRCM_PCLK_OPP2 1 /* ARM=500MHz - VDD1=1.20v */
+
+#undef CONFIG_USE_IRQ /* no support for IRQs */
+#define CONFIG_MISC_INIT_R
+
+#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
+#define CONFIG_SETUP_MEMORY_TAGS 1
+#define CONFIG_INITRD_TAG 1
+#define CONFIG_REVISION_TAG 1
+
+/*
+ * Size of malloc() pool
+ */
+#define CFG_ENV_SIZE SZ_128K /* Total Size Environment Sector */
+#define CFG_MALLOC_LEN (CFG_ENV_SIZE + SZ_128K)
+#define CFG_GBL_DATA_SIZE 128 /* bytes reserved for initial data */
+
+/*
+ * Hardware drivers
+ */
+
+/*
+ * NS16550 Configuration
+ */
+#define V_NS16550_CLK (48000000) /* 48MHz */
+
+#define CFG_NS16550
+#define CFG_NS16550_SERIAL
+#define CFG_NS16550_REG_SIZE (-4)
+#define CFG_NS16550_CLK V_NS16550_CLK
+#define CFG_NS16550_COM3 OMAP34XX_UART3
+
+/*
+ * select serial console configuration
+ */
+#define CONFIG_SERIAL3 3 /* UART3 on board */
+/* allow to overwrite serial and ethaddr */
+#define CONFIG_ENV_OVERWRITE
+#define CONFIG_CONS_INDEX 3
+#define CONFIG_BAUDRATE 115200
+#define CFG_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, 115200}
+
+#define NET_CMDS (CFG_CMD_DHCP|CFG_CMD_NFS|CFG_CMD_NET)
+
+#ifndef CONFIG_OPTIONAL_NOR_POPULATED
+//#define C_MSK (CFG_CMD_FLASH | CFG_CMD_IMLS)
+#define C_MSK (CFG_CMD_IMLS | CFG_CMD_FLASH)
+#endif
+
+/* Config CMD*/
+#define CONFIG_COMMANDS (( CFG_CMD_I2C | CONFIG_CMD_DFL | CFG_CMD_DHCP \
+ | CFG_CMD_NAND) & ~(C_MSK))
+
+#define CONFIG_BOOTP_MASK CONFIG_BOOTP_DEFAULT
+
+/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
+#include <cmd_confdefs.h>
+
+#if (CONFIG_COMMANDS & CFG_CMD_NET)
+/*
+ * SMC91c96 Etherent
+ */
+#define CONFIG_DRIVER_SMSC9118
+#define CONFIG_SMSC9118_BASE (DEBUG_BASE)
+#endif
+
+#if (CONFIG_COMMANDS & CFG_CMD_I2C)
+#define CFG_I2C_SPEED 100
+#define CFG_I2C_SLAVE 1
+#define CFG_I2C_BUS 0
+#define CFG_I2C_BUS_SELECT 1
+#define CONFIG_DRIVER_OMAP34XX_I2C 1
+#endif
+
+/*
+ * Board NAND Info.
+ */
+#define CFG_NAND_ADDR NAND_BASE /* physical address to access nand*/
+#define CFG_NAND_BASE NAND_BASE /* physical address to access nand at CS0*/
+#define CFG_NAND_WIDTH_16
+
+#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
+#define SECTORSIZE 512
+
+#define NAND_ALLOW_ERASE_ALL
+#define ADDR_COLUMN 1
+#define ADDR_PAGE 2
+#define ADDR_COLUMN_PAGE 3
+
+#define NAND_ChipID_UNKNOWN 0x00
+#define NAND_MAX_FLOORS 1
+#define NAND_MAX_CHIPS 1
+#define NAND_NO_RB 1
+#define CFG_NAND_WP
+
+#define CONFIG_BOOTDELAY 3
+
+#ifdef NFS_BOOT_DEFAULTS
+#define CONFIG_BOOTARGS "mem=64M console=ttyS2,115200n8 noinitrd root=/dev/nfs rw nfsroot=128.247.77.158:/home/a0384864/wtbu/rootfs ip=dhcp"
+#else
+#define CONFIG_BOOTARGS "root=/dev/ram0 rw mem=64M console=ttyS2,115200n8 initrd=0x80600000,8M ramdisk_size=8192"
+#endif
+
+#define CONFIG_NETMASK 255.255.254.0
+#define CONFIG_IPADDR 128.247.77.90
+#define CONFIG_SERVERIP 128.247.77.158
+#define CONFIG_BOOTFILE "uImage"
+#define CONFIG_AUTO_COMPLETE 1
+/*
+ * Miscellaneous configurable options
+ */
+#define V_PROMPT "OMAP34XX LAB # "
+
+#define CFG_LONGHELP /* undef to save memory */
+#define CFG_PROMPT V_PROMPT
+#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
+/* Print Buffer Size */
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16)
+#define CFG_MAXARGS 16 /* max number of command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+
+#define CFG_MEMTEST_START (OMAP34XX_SDRC_CS0) /* memtest works on */
+#define CFG_MEMTEST_END (OMAP34XX_SDRC_CS0+SZ_31M)
+
+#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
+
+#define CFG_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load address */
+
+/* 2430 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) or by
+ * 32KHz clk, or from external sig. This rate is divided by a local divisor.
+ */
+#define V_PVT 7
+
+#define CFG_TIMERBASE OMAP34XX_GPT2
+#define CFG_PVT V_PVT /* 2^(pvt+1) */
+#define CFG_HZ ((V_SCLK)/(2 << CFG_PVT))
+
+/*-----------------------------------------------------------------------
+ * Stack sizes
+ *
+ * The stack sizes are set up in start.S using the settings below
+ */
+#define CONFIG_STACKSIZE SZ_128K /* regular stack */
+#ifdef CONFIG_USE_IRQ
+#define CONFIG_STACKSIZE_IRQ SZ_4K /* IRQ stack */
+#define CONFIG_STACKSIZE_FIQ SZ_4K /* FIQ stack */
+#endif
+
+/*-----------------------------------------------------------------------
+ * Physical Memory Map
+ */
+#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
+#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
+#define PHYS_SDRAM_1_SIZE SZ_32M /* at least 32 meg */
+#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
+
+/* SDRAM Bank Allocation method */
+/*#define SDRC_B_R_C 1 */
+/*#define SDRC_B1_R_B0_C 1 */
+#define SDRC_R_B_C 1
+
+/*-----------------------------------------------------------------------
+ * FLASH and environment organization
+ */
+
+/* **** PISMO SUPPORT *** */
+
+/* Configure the PISMO */
+/** REMOVE ME ***/
+#define PISMO1_NOR_SIZE_SDPV2 GPMC_SIZE_128M
+#define PISMO1_NOR_SIZE GPMC_SIZE_64M
+
+#define PISMO1_NAND_SIZE GPMC_SIZE_128M
+#define PISMO1_ONEN_SIZE GPMC_SIZE_128M
+#define DBG_MPDB_SIZE GPMC_SIZE_16M
+#define PISMO2_SIZE 0
+
+#define CFG_MAX_FLASH_SECT (520) /* max number of sectors on one chip */
+#define CFG_MAX_FLASH_BANKS 2 /* max number of flash banks */
+#define CFG_MONITOR_LEN SZ_256K /* Reserve 2 sectors */
+
+#define PHYS_FLASH_SIZE_SDPV2 SZ_128M
+#define PHYS_FLASH_SIZE SZ_32M
+
+#define CFG_FLASH_BASE boot_flash_base
+#define PHYS_FLASH_SECT_SIZE boot_flash_sec
+/* Dummy declaration of flash banks to get compilation right */
+#define CFG_FLASH_BANKS_LIST {0, 0}
+
+#define CFG_MONITOR_BASE CFG_FLASH_BASE /* Monitor at start of flash */
+
+#if 1
+#define CFG_ENV_IS_IN_NAND 1
+#define ENV_IS_VARIABLE 1
+#else
+#define CFG_ENV_IS_NOWHERE 1
+#endif
+
+#ifdef CONFIG_OPTIONAL_NOR_POPULATED
+# define CFG_ENV_IS_IN_FLASH 1
+#endif
+
+#define SMNAND_ENV_OFFSET 0xc0000 /* environment starts here */
+
+#define CFG_ENV_SECT_SIZE boot_flash_sec
+#define CFG_ENV_OFFSET boot_flash_off
+#define CFG_ENV_ADDR boot_flash_env_addr
+
+
+/*-----------------------------------------------------------------------
+ * CFI FLASH driver setup
+ */
+#ifndef CONFIG_OPTIONAL_NOR_POPULATED
+#define CFG_NO_FLASH 1 /* Disable NOR Flash support */
+#else
+#define CFG_FLASH_CFI 1 /* Flash memory is CFI compliant */
+#define CFG_FLASH_CFI_DRIVER 1 /* Use drivers/cfi_flash.c */
+#define CFG_FLASH_USE_BUFFER_WRITE 1 /* Use buffered writes (~10x faster) */
+#define CFG_FLASH_PROTECTION 1 /* Use hardware sector protection */
+#define CFG_FLASH_QUIET_TEST 1 /* Dont crib abt missing chips */
+#define CFG_FLASH_CFI_WIDTH 0x02
+/* timeout values are in ticks */
+#define CFG_FLASH_ERASE_TOUT (100*CFG_HZ) /* Timeout for Flash Erase */
+#define CFG_FLASH_WRITE_TOUT (100*CFG_HZ) /* Timeout for Flash Write */
+
+/* Flash banks JFFS2 should use */
+#define CFG_MAX_MTD_BANKS (CFG_MAX_FLASH_BANKS+CFG_MAX_NAND_DEVICE)
+#define CFG_JFFS2_MEM_NAND
+#define CFG_JFFS2_FIRST_BANK CFG_MAX_FLASH_BANKS /* use flash_info[2] */
+#define CFG_JFFS2_NUM_BANKS 1
+#define CONFIG_LED_INFOnand_read_buf16
+#define CONFIG_LED_LEN 16
+#endif /* optional NOR flash */
+
+#ifndef __ASSEMBLY__
+extern unsigned int nand_cs_base;
+extern unsigned int boot_flash_base;
+extern volatile unsigned int boot_flash_env_addr;
+extern unsigned int boot_flash_off;
+extern unsigned int boot_flash_sec;
+extern unsigned int boot_flash_type;
+#endif
+
+#define WRITE_NAND_COMMAND(d, adr) __raw_writew(d, (nand_cs_base + GPMC_NAND_CMD))
+#define WRITE_NAND_ADDRESS(d, adr) __raw_writew(d, (nand_cs_base + GPMC_NAND_ADR))
+#define WRITE_NAND(d, adr) __raw_writew(d, (nand_cs_base + GPMC_NAND_DAT))
+#define READ_NAND(adr) __raw_readw((nand_cs_base + GPMC_NAND_DAT))
+
+/* Other NAND Access APIs */
+#define NAND_WP_OFF() do {*(volatile u32 *)(GPMC_CONFIG) |= 0x00000010;} while(0)
+#define NAND_WP_ON() do {*(volatile u32 *)(GPMC_CONFIG) &= ~0x00000010;} while(0)
+#define NAND_DISABLE_CE(nand)
+#define NAND_ENABLE_CE(nand)
+#define NAND_WAIT_READY(nand) udelay(10)
+
+#endif /* __CONFIG_H */
diff --git a/include/configs/omap3430sdp.h b/include/configs/omap3430sdp.h
new file mode 100644
index 0000000000..e5d3ea71cb
--- /dev/null
+++ b/include/configs/omap3430sdp.h
@@ -0,0 +1,331 @@
+/*
+ * (C) Copyright 2006
+ * Texas Instruments.
+ * Richard Woodruff <r-woodruff2@ti.com>
+ * Syed Mohammed Khasim <x0khasim@ti.com>
+ *
+ * Configuration settings for the 3430 TI SDP3430 board.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * High Level Configuration Options
+ */
+#define CONFIG_ARMCORTEXA8 1 /* This is an ARM V7 CPU core */
+#define CONFIG_OMAP 1 /* in a TI OMAP core */
+#define CONFIG_OMAP34XX 1 /* which is a 34XX */
+#define CONFIG_OMAP3430 1 /* which is in a 3430 */
+#define CONFIG_3430SDP 1 /* working with SDP */
+//#define CONFIG_3430VIRTIO 1 /* working with SDP? comment this line */
+//#define CONFIG_3430ZEBU 1 /* enable this for 3430 ES2 ZeBu */
+//#define CONFIG_3430_AS_3410 1 /* true for 3430 in 3410 mode */
+
+//#define CONFIG_ICACHE_OFF 1 /* disabling I Cache for ZeBu */
+//#define CONFIG_L2_OFF 1
+
+#define CONFIG_OFF_PADCONF 0 /* Enable OFFMODE pad configuration */
+
+#ifdef CONFIG_3430ZEBU
+ #define CFG_NO_FLASH 1 /* Disable Flash support */
+ #define CONFIG_ICACHE_OFF 1 /* disabling I Cache for ZeBu */
+#endif
+
+#include <asm/arch/cpu.h> /* get chip and board defs */
+
+/* Clock Defines */
+#define V_OSCK 26000000 /* Clock output from T2 */
+
+#if (V_OSCK > 19200000)
+#define V_SCLK (V_OSCK >> 1)
+#else
+#define V_SCLK V_OSCK
+#endif
+
+//#define PRCM_CLK_CFG2_266MHZ 1 /* VDD2=1.15v - 133MHz DDR */
+#define PRCM_CLK_CFG2_332MHZ 1 /* VDD2=1.15v - 166MHz DDR */
+#define PRCM_PCLK_OPP2 1 /* ARM=500MHz - VDD1=1.20v */
+
+#undef CONFIG_USE_IRQ /* no support for IRQs */
+#define CONFIG_MISC_INIT_R
+
+#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
+#define CONFIG_SETUP_MEMORY_TAGS 1
+#define CONFIG_INITRD_TAG 1
+#define CONFIG_REVISION_TAG 1
+
+/*
+ * Size of malloc() pool
+ */
+#define CFG_ENV_SIZE SZ_128K /* Total Size Environment Sector */
+#define CFG_MALLOC_LEN (CFG_ENV_SIZE + SZ_128K)
+#define CFG_GBL_DATA_SIZE 128 /* bytes reserved for initial data */
+
+/*
+ * Hardware drivers
+ */
+
+/*
+ * NS16550 Configuration
+ */
+#define V_NS16550_CLK (48000000) /* 48MHz (APLL96/2) */
+
+#define CFG_NS16550
+#define CFG_NS16550_SERIAL
+#define CFG_NS16550_REG_SIZE (-4)
+#define CFG_NS16550_CLK V_NS16550_CLK
+#define CFG_NS16550_COM1 OMAP34XX_UART1
+
+/*
+ * select serial console configuration
+ */
+#define CONFIG_SERIAL1 1 /* UART1 on SDP */
+/* allow to overwrite serial and ethaddr */
+#define CONFIG_ENV_OVERWRITE
+#define CONFIG_CONS_INDEX 1
+#define CONFIG_BAUDRATE 115200
+#define CFG_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, 115200}
+
+#define NET_CMDS (CFG_CMD_DHCP|CFG_CMD_NFS|CFG_CMD_NET)
+
+/* Config CMD*/
+#ifdef CONFIG_3430ZEBU
+#define CONFIG_COMMANDS (( CFG_CMD_I2C | CONFIG_CMD_DFL | CFG_CMD_DHCP) & ~(CFG_CMD_AUTOSCRIPT | CFG_CMD_FLASH | CFG_CMD_IMLS | CFG_CMD_NET) )
+#else
+//#define CONFIG_COMMANDS (( CFG_CMD_I2C | CONFIG_CMD_DFL | CFG_CMD_DHCP | CFG_CMD_ONENAND | CFG_CMD_JFFS2) & ~CFG_CMD_AUTOSCRIPT)
+//#define CONFIG_COMMANDS (( CFG_CMD_I2C | CONFIG_CMD_DFL | CFG_CMD_DHCP | CFG_CMD_NAND | CFG_CMD_JFFS2) & ~CFG_CMD_AUTOSCRIPT)
+#define CONFIG_COMMANDS (( CFG_CMD_I2C | CONFIG_CMD_DFL | CFG_CMD_DHCP | CFG_CMD_JFFS2 | CFG_CMD_ONENAND | CFG_CMD_NAND) & ~CFG_CMD_AUTOSCRIPT)
+
+#endif
+
+#define CONFIG_BOOTP_MASK CONFIG_BOOTP_DEFAULT
+
+/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
+#include <cmd_confdefs.h>
+
+#if (CONFIG_COMMANDS & CFG_CMD_NET)
+/*
+ * SMC91c96 Etherent
+ */
+#define CONFIG_DRIVER_LAN91C96
+#define CONFIG_LAN91C96_BASE (DEBUG_BASE)
+#define CONFIG_LAN91C96_EXT_PHY
+#endif
+
+#if (CONFIG_COMMANDS & CFG_CMD_I2C)
+#define CFG_I2C_SPEED 100
+#define CFG_I2C_SLAVE 1
+#define CFG_I2C_BUS 0
+#define CFG_I2C_BUS_SELECT 1
+#define CONFIG_DRIVER_OMAP34XX_I2C 1
+#endif
+
+/*
+ * Board NAND Info.
+ */
+#define CFG_NAND_ADDR NAND_BASE /* physical address to access nand*/
+#define CFG_NAND_BASE NAND_BASE /* physical address to access nand at CS0*/
+
+
+#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
+#define SECTORSIZE 512
+
+#define NAND_ALLOW_ERASE_ALL
+#define ADDR_COLUMN 1
+#define ADDR_PAGE 2
+#define ADDR_COLUMN_PAGE 3
+
+#define NAND_ChipID_UNKNOWN 0x00
+#define NAND_MAX_FLOORS 1
+#define NAND_MAX_CHIPS 1
+#define NAND_NO_RB 1
+#define CFG_NAND_WP
+
+/* Environment information */
+#if defined(CONFIG_3430ZEBU) && !defined(CONFIG_3430ES2)
+/* Give the standard Kernel jump command as boot cmd and without any delay */
+#define CONFIG_BOOTDELAY 0
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "bootcmd=go 0x80008000\0"
+#else
+#define CONFIG_BOOTDELAY 3
+
+#endif /*CONFIG_3430ZEBU */
+
+#ifdef NFS_BOOT_DEFAULTS
+#define CONFIG_BOOTARGS "mem=64M console=ttyS0,115200n8 noinitrd root=/dev/nfs rw nfsroot=128.247.77.158:/home/a0384864/wtbu/rootfs ip=dhcp"
+#else
+#define CONFIG_BOOTARGS "root=/dev/ram0 rw mem=64M console=ttyS0,115200n8 initrd=0x80600000,8M ramdisk_size=8192"
+#endif
+
+#define CONFIG_NETMASK 255.255.254.0
+#define CONFIG_IPADDR 128.247.77.90
+#define CONFIG_SERVERIP 128.247.77.158
+#define CONFIG_BOOTFILE "uImage"
+#define CONFIG_AUTO_COMPLETE 1
+/*
+ * Miscellaneous configurable options
+ */
+#define V_PROMPT "OMAP34XX SDP # "
+
+#define CFG_LONGHELP /* undef to save memory */
+#define CFG_PROMPT V_PROMPT
+#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
+/* Print Buffer Size */
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16)
+#define CFG_MAXARGS 16 /* max number of command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+
+#define CFG_MEMTEST_START (OMAP34XX_SDRC_CS0) /* memtest works on */
+#define CFG_MEMTEST_END (OMAP34XX_SDRC_CS0+SZ_31M)
+
+#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
+
+#define CFG_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load address */
+
+/* 2430 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) or by
+ * 32KHz clk, or from external sig. This rate is divided by a local divisor.
+ */
+#define V_PVT 7
+
+#define CFG_TIMERBASE OMAP34XX_GPT2
+#define CFG_PVT V_PVT /* 2^(pvt+1) */
+#define CFG_HZ ((V_SCLK)/(2 << CFG_PVT))
+
+/*-----------------------------------------------------------------------
+ * Stack sizes
+ *
+ * The stack sizes are set up in start.S using the settings below
+ */
+#define CONFIG_STACKSIZE SZ_128K /* regular stack */
+#ifdef CONFIG_USE_IRQ
+#define CONFIG_STACKSIZE_IRQ SZ_4K /* IRQ stack */
+#define CONFIG_STACKSIZE_FIQ SZ_4K /* FIQ stack */
+#endif
+
+/*-----------------------------------------------------------------------
+ * Physical Memory Map
+ */
+#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
+#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
+#define PHYS_SDRAM_1_SIZE SZ_32M /* at least 32 meg */
+#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
+
+/* SDRAM Bank Allocation method */
+/*#define SDRC_B_R_C 1 */
+/*#define SDRC_B1_R_B0_C 1 */
+#define SDRC_R_B_C 1
+
+/*-----------------------------------------------------------------------
+ * FLASH and environment organization
+ */
+
+/* **** PISMO SUPPORT *** */
+
+/* Configure the PISMO */
+#define PISMO1_NOR_SIZE_SDPV2 GPMC_SIZE_128M
+#define PISMO1_NOR_SIZE GPMC_SIZE_64M
+
+#define PISMO1_NAND_SIZE GPMC_SIZE_128M
+#define PISMO1_ONEN_SIZE GPMC_SIZE_128M
+#define DBG_MPDB_SIZE GPMC_SIZE_16M
+#define PISMO2_SIZE 0
+
+#define CFG_MAX_FLASH_SECT (520) /* max number of sectors on one chip */
+#define CFG_MAX_FLASH_BANKS 2 /* max number of flash banks */
+#define CFG_MONITOR_LEN SZ_256K /* Reserve 2 sectors */
+
+#define PHYS_FLASH_SIZE_SDPV2 SZ_128M
+#define PHYS_FLASH_SIZE SZ_32M
+
+#define CFG_FLASH_BASE boot_flash_base
+#define PHYS_FLASH_SECT_SIZE boot_flash_sec
+/* Dummy declaration of flash banks to get compilation right */
+#define CFG_FLASH_BANKS_LIST {0, 0}
+
+#define CFG_MONITOR_BASE CFG_FLASH_BASE /* Monitor at start of flash */
+#define CFG_ONENAND_BASE ONENAND_MAP
+
+#define CFG_ENV_IS_IN_NAND 1
+#define CFG_ENV_IS_IN_ONENAND 1
+#define CFG_ENV_IS_IN_FLASH 1
+#define ONENAND_ENV_OFFSET 0xc0000 /* environment starts here */
+#define SMNAND_ENV_OFFSET 0xc0000 /* environment starts here */
+
+#define CFG_ENV_SECT_SIZE boot_flash_sec
+#define CFG_ENV_OFFSET boot_flash_off
+#define CFG_ENV_ADDR boot_flash_env_addr
+
+
+/*-----------------------------------------------------------------------
+ * CFI FLASH driver setup
+ */
+#ifndef CONFIG_3430ZEBU
+#define CFG_FLASH_CFI 1 /* Flash memory is CFI compliant */
+#define CFG_FLASH_CFI_DRIVER 1 /* Use drivers/cfi_flash.c */
+#define CFG_FLASH_USE_BUFFER_WRITE 1 /* Use buffered writes (~10x faster) */
+#define CFG_FLASH_PROTECTION 1 /* Use hardware sector protection */
+#define CFG_FLASH_QUIET_TEST 1 /* Dont crib abt missing chips */
+#define CFG_FLASH_CFI_WIDTH 0x02
+/* timeout values are in ticks */
+#define CFG_FLASH_ERASE_TOUT (100*CFG_HZ) /* Timeout for Flash Erase */
+#define CFG_FLASH_WRITE_TOUT (100*CFG_HZ) /* Timeout for Flash Write */
+
+/* Flash banks JFFS2 should use */
+#define CFG_MAX_MTD_BANKS (CFG_MAX_FLASH_BANKS+CFG_MAX_NAND_DEVICE)
+#define CFG_JFFS2_MEM_NAND
+#define CFG_JFFS2_FIRST_BANK CFG_MAX_FLASH_BANKS /* use flash_info[2] */
+#define CFG_JFFS2_NUM_BANKS 1
+#define CONFIG_LED_INFO
+#define CONFIG_LED_LEN 16
+
+#define ENV_IS_VARIABLE 1
+#endif
+
+#ifndef __ASSEMBLY__
+extern unsigned int nand_cs_base;
+extern unsigned int boot_flash_base;
+extern volatile unsigned int boot_flash_env_addr;
+extern unsigned int boot_flash_off;
+extern unsigned int boot_flash_sec;
+extern unsigned int boot_flash_type;
+#endif
+
+#define WRITE_NAND_COMMAND(d, adr) __raw_writew(d, (nand_cs_base + GPMC_NAND_CMD))
+#define WRITE_NAND_ADDRESS(d, adr) __raw_writew(d, (nand_cs_base + GPMC_NAND_ADR))
+#define WRITE_NAND(d, adr) __raw_writew(d, (nand_cs_base + GPMC_NAND_DAT))
+#define READ_NAND(adr) __raw_readw((nand_cs_base + GPMC_NAND_DAT))
+
+/* Other NAND Access APIs */
+#define NAND_WP_OFF() do {*(volatile u32 *)(GPMC_CONFIG) |= 0x00000010;} while(0)
+#define NAND_WP_ON() do {*(volatile u32 *)(GPMC_CONFIG) &= ~0x00000010;} while(0)
+#ifdef CFG_NAND_LEGACY
+#define NAND_CTL_CLRALE(nandptr)
+#define NAND_CTL_SETALE(nandptr)
+#define NAND_CTL_CLRCLE(nandptr)
+#define NAND_CTL_SETCLE(nandptr)
+#endif
+#define NAND_DISABLE_CE(nand)
+#define NAND_ENABLE_CE(nand)
+#define NAND_WAIT_READY(nand) udelay(10)
+
+#endif /* __CONFIG_H */
diff --git a/include/configs/omap5912osk.h b/include/configs/omap5912osk.h
index 605563aa0a..5db4f52beb 100644
--- a/include/configs/omap5912osk.h
+++ b/include/configs/omap5912osk.h
@@ -35,6 +35,9 @@
#define CONFIG_OMAP1610 1 /* 5912 is same as 1610 */
#define CONFIG_OSK_OMAP5912 1 /* a OSK Board */
+#define CONFIG_DISPLAY_CPUINFO 1 /* display cpu info (and speed) */
+#define CONFIG_DISPLAY_BOARDINFO 1 /* display board info */
+
/* input clock of PLL */
/* the OMAP5912 OSK has 12MHz input clock */
#define CONFIG_SYS_CLK_FREQ 12000000
@@ -45,11 +48,13 @@
#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS 1
+#define CONFIG_INITRD_TAG 1 /* Required for ramdisk support */
/*
* Size of malloc() pool
*/
#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
+#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
/*
* Hardware drivers
@@ -142,27 +147,44 @@
* Physical Memory Map
*/
#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
-#define PHYS_SDRAM_1 0x10000000 /* SDRAM Bank #1 */
+#define PHYS_SDRAM_1 0x10000000 /* SDRAM Bank #1 */
#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
-#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
+#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
+#define PHYS_FLASH_2 0x01000000 /* Flash Bank #2 */
+
+#define CFG_FLASH_BASE PHYS_FLASH_1
-#define CFG_FLASH_BASE PHYS_FLASH_1
+#define CFG_MONITOR_BASE CFG_FLASH_BASE /* Monitor at beginning of flash */
/*-----------------------------------------------------------------------
- * FLASH and environment organization
+ * FLASH driver setup
*/
-#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
+#define CFG_FLASH_CFI 1 /* Flash memory is CFI compliant */
+#define CFG_FLASH_CFI_DRIVER 1 /* Use drivers/cfi_flash.c */
+
+#define CFG_FLASH_BANKS_LIST { PHYS_FLASH_1, PHYS_FLASH_2 }
+
+#define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */
#define PHYS_FLASH_SIZE 0x02000000 /* 32MB */
#define CFG_MAX_FLASH_SECT (259) /* max number of sectors on one chip */
-/* addr of environment */
-#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x020000)
+
+#define CFG_FLASH_USE_BUFFER_WRITE 1 /* Use buffered writes (~10x faster) */
+#define CFG_FLASH_PROTECTION 1 /* Use hardware sector protection */
+
+#define CFG_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
/* timeout values are in ticks */
#define CFG_FLASH_ERASE_TOUT (20*CFG_HZ) /* Timeout for Flash Erase */
#define CFG_FLASH_WRITE_TOUT (20*CFG_HZ) /* Timeout for Flash Write */
+/*-----------------------------------------------------------------------
+ * FLASH and environment organization
+ */
#define CFG_ENV_IS_IN_FLASH 1
+/* addr of environment */
+#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x020000)
+
#define CFG_ENV_SIZE 0x20000 /* Total Size of Environment Sector */
#define CFG_ENV_OFFSET 0x20000 /* environment starts here */
diff --git a/include/configs/omaptest2430.h b/include/configs/omaptest2430.h
new file mode 100644
index 0000000000..6b19e04f1d
--- /dev/null
+++ b/include/configs/omaptest2430.h
@@ -0,0 +1,304 @@
+/*
+ * (C) Copyright 2004
+ * Texas Instruments.
+ * Richard Woodruff <r-woodruff2@ti.com>
+ * Kshitij Gupta <kshitij@ti.com>
+ *
+ * Configuration settings for the 242x TI H4 board.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * High Level Configuration Options
+ */
+#define CONFIG_ARM1136 1 /* This is an arm1136 CPU core */
+#define CONFIG_OMAP 1 /* in a TI OMAP core */
+#define CONFIG_OMAP24XX 1 /* which is a 24XX Processor */
+#define CONFIG_OMAP242X 1 /* which is in a 242X */
+#define CONFIG_OMAP24XXH4 1 /* and on a H4 board */
+#define CONFIG_TEST2430 1 /* to test 2430SDP connectivity */
+
+/* input clock of PLL */
+/* the OMAP24XX H4 has 12MHz, 13MHz, or 19.2Mhz crystal input */
+//#define INPUT_CLK_12MHZ 1
+#define INPUT_CLK_13MHZ 1 /* default is 12MHz */
+
+#define PRCM_CONFIG_II 1
+//#define PRCM_CONFIG_III 1
+
+#include <asm/arch/cpu.h> /* get chip and board defs */
+
+/* On H4, NOR and NAND flash are mutual exclusive.
+ Define this if you want to use NAND
+ */
+/*#define CFG_NAND_BOOT */
+
+#ifdef INPUT_CLK_13MHZ
+#define V_SCLK 13000000
+#else
+#define V_SCLK 12000000
+#endif
+
+#define CONFIG_SYS_CLK_FREQ V_SCLK
+
+#undef CONFIG_USE_IRQ /* no support for IRQs */
+#define CONFIG_MISC_INIT_R
+
+#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
+#define CONFIG_SETUP_MEMORY_TAGS 1
+#define CONFIG_INITRD_TAG 1
+#define CONFIG_REVISION_TAG 1
+
+/*
+ * Size of malloc() pool
+ */
+#define CFG_ENV_SIZE SZ_128K /* Total Size of Environment Sector */
+#define CFG_MALLOC_LEN (CFG_ENV_SIZE + SZ_128K)
+#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
+
+/*
+ * Hardware drivers
+ */
+
+/*
+ * SMC91c96 Etherent
+ */
+#define CONFIG_DRIVER_LAN91C96
+#define CONFIG_LAN91C96_BASE (DEBUG_BASE+0x300)
+#define CONFIG_LAN91C96_EXT_PHY
+
+/*
+ * NS16550 Configuration
+ */
+#define V_NS16550_CLK (48000000) /* 48MHz (APLL96/2) */
+
+#define CFG_NS16550
+#define CFG_NS16550_SERIAL
+#define CFG_NS16550_REG_SIZE (-4)
+#define CFG_NS16550_CLK V_NS16550_CLK /* 3MHz (1.5MHz*2) */
+#define CFG_NS16550_COM1 OMAP24XX_UART1
+
+/*
+ * select serial console configuration
+ */
+#define CONFIG_SERIAL1 1 /* UART1 on H4 */
+
+/* allow to overwrite serial and ethaddr */
+#define CONFIG_ENV_OVERWRITE
+#define CONFIG_CONS_INDEX 1
+#define CONFIG_BAUDRATE 115200
+#define CFG_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200}
+
+#ifdef CFG_NAND_BOOT
+#define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_DHCP | CFG_CMD_I2C | CFG_CMD_NAND | CFG_CMD_JFFS2)
+#else
+#define CONFIG_COMMANDS ((CONFIG_CMD_DFL | CFG_CMD_DHCP | CFG_CMD_I2C | CFG_CMD_JFFS2) & ~CFG_CMD_AUTOSCRIPT)
+#endif
+#define CONFIG_BOOTP_MASK CONFIG_BOOTP_DEFAULT
+
+/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
+#include <cmd_confdefs.h>
+
+ /*
+ * I2C configuration
+ */
+#if (CONFIG_COMMANDS & CFG_CMD_I2C)
+#define CONFIG_HARD_I2C
+#define CFG_I2C_SPEED 100
+#define CFG_I2C_SLAVE 1
+#define CFG_I2C_BUS 0
+#define CFG_I2C_BUS_SELECT 1
+#define CONFIG_DRIVER_OMAP24XX_I2C 1
+#endif
+
+/*
+ * Board NAND Info.
+ */
+#define CFG_NAND_ADDR 0x04000000 /* physical address to access nand at CS0*/
+
+#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
+#define SECTORSIZE 512
+
+#define ADDR_COLUMN 1
+#define ADDR_PAGE 2
+#define ADDR_COLUMN_PAGE 3
+
+#define NAND_ChipID_UNKNOWN 0x00
+#define NAND_MAX_FLOORS 1
+#define NAND_MAX_CHIPS 1
+
+#define NAND_WAIT_READY(nand) udelay(10)
+
+#define NAND_NO_RB 1
+
+#define CFG_NAND_WP
+
+#define NAND_CTL_CLRALE(nandptr)
+#define NAND_CTL_SETALE(nandptr)
+#define NAND_CTL_CLRCLE(nandptr)
+#define NAND_CTL_SETCLE(nandptr)
+#define NAND_DISABLE_CE(nand)
+#define NAND_ENABLE_CE(nand)
+
+
+#define CONFIG_BOOTDELAY 3
+
+#ifdef NFS_BOOT_DEFAULTS
+#define CONFIG_BOOTARGS "mem=32M console=ttyS0,115200n8 noinitrd root=/dev/nfs rw nfsroot=128.247.77.158:/home/a0384864/wtbu/rootfs ip=dhcp"
+#else
+#define CONFIG_BOOTARGS "root=/dev/ram0 rw mem=32M console=ttyS0,115200n8 initrd=0x80600000,8M ramdisk_size=8192"
+#endif
+
+#define CONFIG_NETMASK 255.255.254.0
+#define CONFIG_IPADDR 128.247.77.90
+#define CONFIG_SERVERIP 128.247.77.158
+#define CONFIG_BOOTFILE "uImage"
+
+/*
+ * Miscellaneous configurable options
+ */
+#define V_PROMPT "OMAPtest2430 # "
+
+#define CFG_LONGHELP /* undef to save memory */
+#define CFG_PROMPT V_PROMPT
+#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
+/* Print Buffer Size */
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16)
+#define CFG_MAXARGS 16 /* max number of command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+
+#define CFG_MEMTEST_START (OMAP24XX_SDRC_CS0) /* memtest works on */
+#define CFG_MEMTEST_END (OMAP24XX_SDRC_CS0+SZ_31M)
+
+#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
+
+#define CFG_LOAD_ADDR (OMAP24XX_SDRC_CS0) /* default load address */
+
+/* The 2420 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) or by
+ * 32KHz clk, or from external sig. This rate is divided by a local divisor.
+ */
+#define V_PVT 7 /* use with 12MHz/128 */
+#define CFG_TIMERBASE OMAP24XX_GPT2
+#define CFG_PVT V_PVT /* 2^(pvt+1) */
+#define CFG_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CFG_PVT))
+
+/*-----------------------------------------------------------------------
+ * Stack sizes
+ *
+ * The stack sizes are set up in start.S using the settings below
+ */
+#define CONFIG_STACKSIZE SZ_128K /* regular stack */
+#ifdef CONFIG_USE_IRQ
+#define CONFIG_STACKSIZE_IRQ SZ_4K /* IRQ stack */
+#define CONFIG_STACKSIZE_FIQ SZ_4K /* FIQ stack */
+#endif
+
+/*-----------------------------------------------------------------------
+ * Physical Memory Map
+ */
+#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
+#define PHYS_SDRAM_1 OMAP24XX_SDRC_CS0
+#define PHYS_SDRAM_1_SIZE SZ_32M /* at least 32 meg */
+#define PHYS_SDRAM_2 OMAP24XX_SDRC_CS1
+
+#define PHYS_FLASH_SECT_SIZE SZ_128K
+#define PHYS_FLASH_1 FLASH_BASE /* Flash Bank #1 */
+#define PHYS_FLASH_SIZE_1 SZ_32M
+#define PHYS_FLASH_2 (FLASH_BASE+SZ_32M) /* same cs, 2 chips in series */
+#define PHYS_FLASH_SIZE_2 SZ_32M
+
+/*-----------------------------------------------------------------------
+ * FLASH and environment organization
+ */
+#define CFG_FLASH_BASE PHYS_FLASH_1
+#define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */
+#define CFG_MAX_FLASH_SECT (259) /* max number of sectors on one chip */
+#define CFG_MONITOR_BASE CFG_FLASH_BASE /* Monitor at beginning of flash */
+#define CFG_MONITOR_LEN SZ_128K /* Reserve 1 sector */
+#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE, CFG_FLASH_BASE + PHYS_FLASH_SIZE_1 }
+
+#ifdef CFG_NAND_BOOT
+#define CFG_ENV_IS_IN_NAND 1
+#define CFG_ENV_OFFSET 0x80000 /* environment starts here */
+#else
+#define CFG_ENV_ADDR (CFG_FLASH_BASE + SZ_128K)
+#define CFG_ENV_IS_IN_FLASH 1
+#define CFG_ENV_SECT_SIZE PHYS_FLASH_SECT_SIZE
+#define CFG_ENV_OFFSET ( CFG_MONITOR_BASE + CFG_MONITOR_LEN ) /* Environment after Monitor */
+#endif
+
+
+
+
+/*-----------------------------------------------------------------------
+ * CFI FLASH driver setup
+ */
+#define CFG_FLASH_CFI 1 /* Flash memory is CFI compliant */
+#define CFG_FLASH_CFI_DRIVER 1 /* Use drivers/cfi_flash.c */
+#define CFG_FLASH_USE_BUFFER_WRITE 1 /* Use buffered writes (~10x faster) */
+#define CFG_FLASH_PROTECTION 1 /* Use hardware sector protection */
+
+/* timeout values are in ticks */
+#define CFG_FLASH_ERASE_TOUT (100*CFG_HZ) /* Timeout for Flash Erase */
+#define CFG_FLASH_WRITE_TOUT (100*CFG_HZ) /* Timeout for Flash Write */
+
+/* Flash banks JFFS2 should use */
+#define CFG_MAX_MTD_BANKS (CFG_MAX_FLASH_BANKS+CFG_MAX_NAND_DEVICE)
+#define CFG_JFFS2_MEM_NAND
+#define CFG_JFFS2_FIRST_BANK 1 /* use flash_info[1] */
+#define CFG_JFFS2_NUM_BANKS 1
+
+/* GPMC Settings */
+#ifdef CFG_NAND_BOOT
+/* NAND */
+#define OMAP24XX_GPMC_CS0 SMNAND
+#else
+/* NOR */
+#define OMAP24XX_GPMC_CS0 STNOR
+#endif
+
+#define OMAP24XX_GPMC_CS0_SIZE GPMC_SIZE_64M
+#define OMAP24XX_GPMC_CS0_MAP CFG_FLASH_BASE
+
+#define OMAP24XX_GPMC_CS1 MPDB
+#define OMAP24XX_GPMC_CS1_SIZE GPMC_SIZE_16M
+#define OMAP24XX_GPMC_CS1_MAP DEBUG_BASE
+
+/* Other NAND Access APIs */
+#ifdef CFG_NAND_BOOT
+#define WRITE_NAND_COMMAND(d, adr) do {*(volatile u16 *)(GPMC_NAND_CMD_0)= (d);} while(0)
+#define WRITE_NAND_ADDRESS(d, adr) do {*(volatile u16 *)(GPMC_NAND_ADR_0) = (d);} while(0)
+#define WRITE_NAND(d, adr) do {*(volatile u16 *)(GPMC_NAND_DAT_0)= (d);} while(0)
+#define READ_NAND(adr) (*(volatile u16 *)(GPMC_NAND_DAT_0))
+#define NAND_WP_OFF() do {*(volatile u32 *)(GPMC_CONFIG) |= 0x00000010;} while(0)
+#define NAND_WP_ON() do {*(volatile u32 *)(GPMC_CONFIG) &= ~0x00000010;} while(0)
+#define NAND_CTL_CLRALE(nandptr)
+#define NAND_CTL_SETALE(nandptr)
+#define NAND_CTL_CLRCLE(nandptr)
+#define NAND_CTL_SETCLE(nandptr)
+#define NAND_DISABLE_CE(nand)
+#define NAND_ENABLE_CE(nand)
+#define NAND_WAIT_READY(nand) udelay(10)
+#endif /* NAND Commands */
+
+#endif /* __CONFIG_H */
diff --git a/include/configs/omapv1030gsample.h b/include/configs/omapv1030gsample.h
new file mode 100644
index 0000000000..c237161655
--- /dev/null
+++ b/include/configs/omapv1030gsample.h
@@ -0,0 +1,181 @@
+/*
+ * (C) Copyright 2005
+ * Texas Instruments.
+ * Jian Zhang <jzhang@ti.com>
+ * Configuation settings for the TI OMAPV1030 G-Sample board.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * If we are developing, we might want to start armboot from ram
+ * so we MUST NOT initialize critical regs like mem-timing ...
+ */
+#define CONFIG_INIT_CRITICAL /* undef for developing */
+
+/*
+ * High Level Configuration Options
+ * (easy to change)
+ */
+#define CONFIG_ARM926EJS 1 /* This is an arm926ejs CPU core */
+#define CONFIG_OMAP 1 /* in a TI OMAP core */
+#define CONFIG_OMAPV1030 1 /* which is in an OMAPV1030 */
+#define CONFIG_GSAMPLE_OMAPV1030 1 /* a G-Sample Board */
+
+/* input clock of PLL */
+/* G-Sample has 13MHz input clock */
+#define CONFIG_SYS_CLK_FREQ 13000000
+
+#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
+
+#define CONFIG_MISC_INIT_R
+
+#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
+#define CONFIG_SETUP_MEMORY_TAGS 1
+
+/*
+ * Size of malloc() pool
+ */
+#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
+#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
+
+/*
+ * Hardware drivers
+ */
+/*
+*/
+#define CONFIG_DRIVER_LAN91C96
+#define CONFIG_LAN91C96_BASE 0x08400300
+#define CONFIG_LAN91C96_EXT_PHY
+
+/*
+ * NS16550 Configuration
+ */
+#define CFG_NS16550
+#define CFG_NS16550_SERIAL
+#define CFG_NS16550_REG_SIZE (-4)
+#define CFG_NS16550_CLK (48000000) /* can be 12M/32Khz or 48Mhz */
+#define CFG_NS16550_COM1 0xfffb0000 /* uart1, bluetooth uart on helen */
+#define CFG_NS16550_COM2 0xfffb0800 /* uart2, bluetooth uart on helen */
+
+/*
+ * select serial console configuration
+ */
+#define CONFIG_SERIAL1 2 /* we use SERIAL 2 on OMAPV1030 */
+
+/* allow to overwrite serial and ethaddr */
+#define CONFIG_ENV_OVERWRITE
+#define CONFIG_CONS_INDEX 2
+#define CONFIG_BAUDRATE 115200
+#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
+
+//#define CONFIG_COMMANDS (CONFIG_CMD_DFL & ~CFG_CMD_NET)
+#define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_DHCP)
+#define CONFIG_BOOTP_MASK CONFIG_BOOTP_DEFAULT
+
+/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
+#include <cmd_confdefs.h>
+#include <configs/omap1510.h>
+
+
+#define CONFIG_BOOTDELAY 3
+#define CONFIG_BOOTARGS "mem=32M console=ttyS0,115200n8 noinitrd \
+ root=/dev/nfs rw nfsroot=157.87.82.48:\
+ /home/a0875451/mwd/myfs/target ip=dhcp"
+#define CONFIG_NETMASK 255.255.254.0 /* talk on MY local net */
+#define CONFIG_IPADDR 156.117.97.156 /* static IP I currently own */
+#define CONFIG_SERVERIP 156.117.97.139 /* current IP of my dev pc */
+#define CONFIG_BOOTFILE "uImage" /* file to load */
+
+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
+#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
+#endif
+
+/*
+ * Miscellaneous configurable options
+ */
+#define CFG_LONGHELP /* undef to save memory */
+#define CFG_PROMPT "G-SAMPLE # " /* Monitor Command Prompt */
+#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
+/* Print Buffer Size */
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16)
+#define CFG_MAXARGS 16 /* max number of command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+
+#define CFG_MEMTEST_START 0x10000000 /* memtest works on */
+#define CFG_MEMTEST_END 0x12000000 /* 32 MB in DRAM */
+
+#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
+
+#define CFG_LOAD_ADDR 0x10000000 /* default load address */
+
+/* The OMAPV1030 has 3 MPU timers, they can be driven by the RefClk (13Mhz) or by
+ * DPLL1. This time is further subdivided by a local divisor.
+ */
+#define CFG_TIMERBASE 0xFFFEC500 /* use MPU timer 1 */
+#define CFG_PVT 7 /* 2^(pvt+1), divide by 256 */
+#define CFG_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CFG_PVT))
+
+/*-----------------------------------------------------------------------
+ * Stack sizes
+ *
+ * The stack sizes are set up in start.S using the settings below
+ */
+#define CONFIG_STACKSIZE (128*1024) /* regular stack */
+#ifdef CONFIG_USE_IRQ
+#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
+#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
+#endif
+
+/*-----------------------------------------------------------------------
+ * Physical Memory Map
+ */
+#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
+#define PHYS_SDRAM_1 0x10000000 /* SDRAM Bank #1 */
+#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
+
+#define PHYS_FLASH_1 0x0c000000 /* Flash Bank #1 */
+
+#define CFG_FLASH_BASE PHYS_FLASH_1
+
+/*-----------------------------------------------------------------------
+ * FLASH and environment organization
+ */
+#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
+#define PHYS_FLASH_SIZE 0x02000000 /* 32MB */
+#define CFG_MAX_FLASH_SECT (259) /* max number of sectors on one chip */
+
+/* timeout values are in ticks */
+#define CFG_FLASH_ERASE_TOUT (25*CFG_HZ) /* Timeout for Flash Erase */
+#define CFG_FLASH_WRITE_TOUT (25*CFG_HZ) /* Timeout for Flash Write */
+
+/* addr of environment */
+#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x020000)
+
+#define CFG_ENV_IS_IN_FLASH 1
+#define CFG_ENV_SIZE 0x20000 /* Total Size of Environment Sector */
+#define CFG_ENV_OFFSET 0x20000 /* environment starts here */
+
+#define CFG_MAX_MTD_BANKS (CFG_MAX_FLASH_BANKS)
+
+#endif /* __CONFIG_H */
diff --git a/include/configs/p3p440.h b/include/configs/p3p440.h
index 831d018e2d..aa0901f3ff 100644
--- a/include/configs/p3p440.h
+++ b/include/configs/p3p440.h
@@ -1,5 +1,5 @@
/*
- * (C) Copyright 2005
+ * (C) Copyright 2005-2006
* Stefan Roese, DENX Software Engineering, sr@denx.de.
*
* (C) Copyright 2002 Scott McNutt <smcnutt@artesyncp.com>
@@ -71,9 +71,10 @@
* DDR SDRAM
*----------------------------------------------------------------------*/
#define CONFIG_SDRAM_BANK0 1 /* init onboard DDR SDRAM bank 0*/
-#define CFG_SDRAM_TABLE { \
- {(256 << 20), 0x000C4001}, /* 256MB mode 3, 13x10(4) */ \
- {(64 << 20), 0x00082001}} /* 64MB mode 2, 12x9(4) */
+#define CONFIG_SDRAM_ECC /* enable ECC support */
+#define CFG_SDRAM_TABLE { \
+ {(256 << 20), 13, 0x000C4001}, /* 256MB mode 3, 13x10(4)*/ \
+ {(64 << 20), 12, 0x00082001}} /* 64MB mode 2, 12x9(4) */
/*-----------------------------------------------------------------------
* Serial Port
@@ -146,6 +147,7 @@
"cp.b 100000 fffc0000 40000;" \
"setenv filesize;saveenv\0" \
"upd=run load;run update\0" \
+ "unlock=yes\0" \
""
#define CONFIG_BOOTCOMMAND "run net_nfs"
@@ -275,6 +277,9 @@
#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
+#define CFG_FLASH_USE_BUFFER_WRITE 1 /* use buffered writes (20x faster) */
+#define CFG_FLASH_PROTECTION 1 /* use hardware flash protection */
+
#define CFG_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
#define CFG_FLASH_QUIET_TEST 1 /* don't warn upon unknown flash */
diff --git a/include/configs/pcs440ep.h b/include/configs/pcs440ep.h
new file mode 100644
index 0000000000..50c1c4fd4c
--- /dev/null
+++ b/include/configs/pcs440ep.h
@@ -0,0 +1,412 @@
+/*
+ * (C) Copyright 2006
+ * Stefan Roese, DENX Software Engineering, sr@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/************************************************************************
+ * pcs440ep.h - configuration for PCS440EP board
+ ***********************************************************************/
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*-----------------------------------------------------------------------
+ * High Level Configuration Options
+ *----------------------------------------------------------------------*/
+#define CONFIG_PCS440EP 1 /* Board is PCS440EP */
+#define CONFIG_440EP 1 /* Specific PPC440EP support */
+#define CONFIG_4xx 1 /* ... PPC4xx family */
+#define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */
+
+#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
+#define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */
+
+/*-----------------------------------------------------------------------
+ * Base addresses -- Note these are effective addresses where the
+ * actual resources get mapped (not physical addresses)
+ *----------------------------------------------------------------------*/
+#define CFG_MONITOR_LEN (384 * 1024) /* Reserve 384 kB for Monitor */
+#define CFG_MALLOC_LEN (256 * 1024) /* Reserve 256 kB for malloc() */
+#define CFG_MONITOR_BASE (-CFG_MONITOR_LEN)
+#define CFG_SDRAM_BASE 0x00000000 /* _must_ be 0 */
+#define CFG_FLASH_BASE 0xfff00000 /* start of FLASH */
+#define CFG_PCI_MEMBASE 0xa0000000 /* mapped pci memory*/
+#define CFG_PCI_MEMBASE1 CFG_PCI_MEMBASE + 0x10000000
+#define CFG_PCI_MEMBASE2 CFG_PCI_MEMBASE1 + 0x10000000
+#define CFG_PCI_MEMBASE3 CFG_PCI_MEMBASE2 + 0x10000000
+
+/*Don't change either of these*/
+#define CFG_PERIPHERAL_BASE 0xef600000 /* internal peripherals*/
+#define CFG_PCI_BASE 0xe0000000 /* internal PCI regs*/
+/*Don't change either of these*/
+
+#define CFG_USB_DEVICE 0x50000000
+#define CFG_BOOT_BASE_ADDR 0xf0000000
+
+/*-----------------------------------------------------------------------
+ * Initial RAM & stack pointer (placed in SDRAM)
+ *----------------------------------------------------------------------*/
+#define CFG_INIT_RAM_ADDR 0x70000000 /* DCache */
+#define CFG_INIT_RAM_END (8 << 10)
+#define CFG_GBL_DATA_SIZE 256 /* num bytes initial data*/
+#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
+#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
+
+/*-----------------------------------------------------------------------
+ * Serial Port
+ *----------------------------------------------------------------------*/
+#undef CFG_EXT_SERIAL_CLOCK /* no external clk used */
+#define CONFIG_BAUDRATE 115200
+#define CONFIG_SERIAL_MULTI 1
+/*define this if you want console on UART1*/
+#undef CONFIG_UART1_CONSOLE
+
+#define CFG_BAUDRATE_TABLE \
+ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
+
+/*-----------------------------------------------------------------------
+ * Environment
+ *----------------------------------------------------------------------*/
+#define CFG_ENV_IS_IN_FLASH 1 /* use FLASH for environment vars */
+
+/*-----------------------------------------------------------------------
+ * FLASH related
+ *----------------------------------------------------------------------*/
+#define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */
+#define CFG_MAX_FLASH_SECT 256 /* max number of sectors on one chip */
+
+#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
+#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
+
+#define CFG_FLASH_WORD_SIZE unsigned char /* flash word size (width) */
+#define CFG_FLASH_ADDR0 0x5555 /* 1st address for flash config cycles */
+#define CFG_FLASH_ADDR1 0x2AAA /* 2nd address for flash config cycles */
+
+#define CFG_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
+
+#ifdef CFG_ENV_IS_IN_FLASH
+#define CFG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */
+#define CFG_ENV_ADDR (CFG_MONITOR_BASE-CFG_ENV_SECT_SIZE)
+#define CFG_ENV_SIZE 0x2000 /* Total Size of Environment Sector */
+
+/* Address and size of Redundant Environment Sector */
+#define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR-CFG_ENV_SECT_SIZE)
+#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
+#endif /* CFG_ENV_IS_IN_FLASH */
+
+/*-----------------------------------------------------------------------
+ * DDR SDRAM
+ *----------------------------------------------------------------------*/
+#define CONFIG_SPD_EEPROM /* Use SPD EEPROM for setup */
+#undef CONFIG_DDR_ECC /* don't use ECC */
+#define SPD_EEPROM_ADDRESS {0x50}
+
+/*-----------------------------------------------------------------------
+ * I2C
+ *----------------------------------------------------------------------*/
+#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
+#undef CONFIG_SOFT_I2C /* I2C bit-banged */
+#define CFG_I2C_SPEED 100000 /* I2C speed and slave address */
+#define CFG_I2C_SLAVE 0x7F
+
+#define CFG_I2C_EEPROM_ADDR (0xa4>>1)
+#define CFG_I2C_EEPROM_ADDR_LEN 1
+#define CFG_EEPROM_PAGE_WRITE_ENABLE
+#define CFG_EEPROM_PAGE_WRITE_BITS 3
+#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10
+
+#define CONFIG_PREBOOT "echo;" \
+ "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
+ "echo"
+
+#undef CONFIG_BOOTARGS
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "netdev=eth0\0" \
+ "hostname=pcs440ep\0" \
+ "nfsargs=setenv bootargs root=/dev/nfs rw " \
+ "nfsroot=${serverip}:${rootpath}\0" \
+ "ramargs=setenv bootargs root=/dev/ram rw\0" \
+ "addip=setenv bootargs ${bootargs} " \
+ "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
+ ":${hostname}:${netdev}:off panic=1\0" \
+ "addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0"\
+ "flash_nfs=run nfsargs addip addtty;" \
+ "bootm ${kernel_addr}\0" \
+ "flash_self=run ramargs addip addtty;" \
+ "bootm ${kernel_addr} ${ramdisk_addr}\0" \
+ "net_nfs=tftp 200000 ${bootfile};run nfsargs addip addtty;" \
+ "bootm\0" \
+ "rootpath=/opt/eldk/ppc_4xx\0" \
+ "bootfile=/tftpboot/pcs440ep/uImage\0" \
+ "kernel_addr=FFF00000\0" \
+ "ramdisk_addr=FFF00000\0" \
+ "load=tftp 100000 /tftpboot/pcs440ep/u-boot.bin\0" \
+ "update=protect off FFFA0000 FFFFFFFF;era FFFA0000 FFFFFFFF;" \
+ "cp.b 100000 FFFA0000 60000\0" \
+ "upd=run load;run update\0" \
+ ""
+#define CONFIG_BOOTCOMMAND "run flash_self"
+
+#if 0
+#define CONFIG_BOOTDELAY -1 /* autoboot disabled */
+#else
+#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
+#endif
+
+#define CONFIG_BAUDRATE 115200
+
+#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
+#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
+
+#define CONFIG_MII 1 /* MII PHY management */
+#define CONFIG_NET_MULTI 1 /* required for netconsole */
+#define CONFIG_HAS_ETH1 1 /* add support for "eth1addr" */
+#define CONFIG_PHY_ADDR 1 /* PHY address, See schematics */
+#define CONFIG_PHY1_ADDR 2
+
+#define CFG_RX_ETH_BUFFER 32 /* Number of ethernet rx buffers & descriptors */
+
+#define CONFIG_NETCONSOLE /* include NetConsole support */
+
+/* Partitions */
+#define CONFIG_MAC_PARTITION
+#define CONFIG_DOS_PARTITION
+#define CONFIG_ISO_PARTITION
+
+#ifdef CONFIG_440EP
+/* USB */
+#define CONFIG_USB_OHCI
+#define CONFIG_USB_STORAGE
+
+/*Comment this out to enable USB 1.1 device*/
+#define USB_2_0_DEVICE
+#endif /*CONFIG_440EP*/
+
+#ifdef DEBUG
+#define CONFIG_PANIC_HANG
+#else
+#define CONFIG_HW_WATCHDOG /* watchdog */
+#endif
+
+#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
+ CFG_CMD_ASKENV | \
+ CFG_CMD_DHCP | \
+ CFG_CMD_DIAG | \
+ CFG_CMD_EEPROM | \
+ CFG_CMD_ELF | \
+ CFG_CMD_I2C | \
+ CFG_CMD_IRQ | \
+ CFG_CMD_MII | \
+ CFG_CMD_NET | \
+ CFG_CMD_NFS | \
+ CFG_CMD_PCI | \
+ CFG_CMD_PING | \
+ CFG_CMD_REGINFO | \
+ CFG_CMD_SDRAM | \
+ CFG_CMD_EXT2 | \
+ CFG_CMD_FAT | \
+ CFG_CMD_USB )
+
+
+#define CONFIG_SUPPORT_VFAT
+
+/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
+#include <cmd_confdefs.h>
+
+/*
+ * Miscellaneous configurable options
+ */
+#define CFG_LONGHELP /* undef to save memory */
+#define CFG_PROMPT "=> " /* Monitor Command Prompt */
+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
+#else
+#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
+#endif
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
+#define CFG_MAXARGS 16 /* max number of command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+
+#define CFG_MEMTEST_START 0x0400000 /* memtest works on */
+#define CFG_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
+
+#define CFG_LOAD_ADDR 0x100000 /* default load address */
+#define CFG_EXTBDINFO 1 /* To use extended board_into (bd_t) */
+#define CONFIG_LYNXKDI 1 /* support kdi files */
+
+#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
+
+/*-----------------------------------------------------------------------
+ * PCI stuff
+ *-----------------------------------------------------------------------
+ */
+/* General PCI */
+#define CONFIG_PCI /* include pci support */
+#undef CONFIG_PCI_PNP /* do (not) pci plug-and-play */
+#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
+#define CFG_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CFG_PCI_MEMBASE*/
+
+/* Board-specific PCI */
+#define CFG_PCI_PRE_INIT /* enable board pci_pre_init() */
+#define CFG_PCI_TARGET_INIT
+#define CFG_PCI_MASTER_INIT
+
+#define CFG_PCI_SUBSYS_VENDORID 0x10e8 /* AMCC */
+#define CFG_PCI_SUBSYS_ID 0xcafe /* Whatever */
+
+/*
+ * For booting Linux, the board info and command line data
+ * have to be in the first 8 MB of memory, since this is
+ * the maximum mapped by the Linux kernel during initialization.
+ */
+#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
+
+/*-----------------------------------------------------------------------
+ * External Bus Controller (EBC) Setup
+ *----------------------------------------------------------------------*/
+#define FLASH_BASE0_PRELIM 0xFFF00000 /* FLASH bank #0 */
+#define FLASH_BASE1_PRELIM 0xFFF80000 /* FLASH bank #1 */
+
+#define CFG_FLASH FLASH_BASE0_PRELIM
+#define CFG_SRAM 0xF1000000
+#define CFG_FPGA 0xF2000000
+#define CFG_CF1 0xF0000000
+#define CFG_CF2 0xF0100000
+
+/* Memory Bank 0 (Flash Bank 0, NOR-FLASH) initialization */
+#define CFG_EBC_PB0AP 0x02010000 /* TWT=4,OEN=1 */
+#define CFG_EBC_PB0CR (CFG_FLASH | 0x18000) /* BS=1MB,BU=R/W,BW=8bit */
+
+/* Memory Bank 1 (SRAM) initialization */
+#define CFG_EBC_PB1AP 0x01810040 /* TWT=3,OEN=1,BEM=1 */
+#define CFG_EBC_PB1CR (CFG_SRAM | 0x5A000) /* BS=4MB,BU=R/W,BW=16bit */
+
+/* Memory Bank 2 (FPGA) initialization */
+#define CFG_EBC_PB2AP 0x01010440 /* TWT=2,OEN=1,TH=2,BEM=1 */
+#define CFG_EBC_PB2CR (CFG_FPGA | 0x5A000) /* BS=4MB,BU=R/W,BW=16bit */
+
+/* Memory Bank 3 (CompactFlash) initialization */
+#define CFG_EBC_PB3AP 0x080BD400
+#define CFG_EBC_PB3CR (CFG_CF1 | 0x1A000) /* BS=1MB,BU=R/W,BW=16bit */
+
+/* Memory Bank 4 (CompactFlash) initialization */
+#define CFG_EBC_PB4AP 0x080BD400
+#define CFG_EBC_PB4CR (CFG_CF2 | 0x1A000) /* BS=1MB,BU=R/W,BW=16bit */
+
+/*-----------------------------------------------------------------------
+ * PPC440 GPIO Configuration
+ */
+#define CFG_440_GPIO_TABLE { /* GPIO Alternate1 Alternate2 Alternate3 */ \
+{ \
+/* GPIO Core 0 */ \
+{ GPIO0_BASE, GPIO_OUT, GPIO_SEL }, /* GPIO0 EBC_ADDR(7) DMA_REQ(2) */ \
+{ GPIO0_BASE, GPIO_OUT, GPIO_SEL }, /* GPIO1 EBC_ADDR(6) DMA_ACK(2) */ \
+{ GPIO0_BASE, GPIO_OUT, GPIO_SEL }, /* GPIO2 EBC_ADDR(5) DMA_EOT/TC(2) */ \
+{ GPIO0_BASE, GPIO_OUT, GPIO_SEL }, /* GPIO3 EBC_ADDR(4) DMA_REQ(3) */ \
+{ GPIO0_BASE, GPIO_OUT, GPIO_SEL }, /* GPIO4 EBC_ADDR(3) DMA_ACK(3) */ \
+{ GPIO0_BASE, GPIO_OUT, GPIO_SEL }, /* GPIO5 EBC_ADDR(2) DMA_EOT/TC(3) */ \
+{ GPIO0_BASE, GPIO_OUT, GPIO_ALT1 }, /* GPIO6 EBC_CS_N(1) */ \
+{ GPIO0_BASE, GPIO_OUT, GPIO_ALT1 }, /* GPIO7 EBC_CS_N(2) */ \
+{ GPIO0_BASE, GPIO_OUT, GPIO_ALT1 }, /* GPIO8 EBC_CS_N(3) */ \
+{ GPIO0_BASE, GPIO_OUT, GPIO_ALT1 }, /* GPIO9 EBC_CS_N(4) */ \
+{ GPIO0_BASE, GPIO_OUT, GPIO_SEL }, /* GPIO10 EBC_CS_N(5) */ \
+{ GPIO0_BASE, GPIO_OUT, GPIO_SEL }, /* GPIO11 EBC_BUS_ERR */ \
+{ GPIO0_BASE, GPIO_IN, GPIO_ALT1 }, /* GPIO12 ZII_p0Rxd(0) */ \
+{ GPIO0_BASE, GPIO_IN, GPIO_ALT1 }, /* GPIO13 ZII_p0Rxd(1) */ \
+{ GPIO0_BASE, GPIO_IN, GPIO_ALT1 }, /* GPIO14 ZII_p0Rxd(2) */ \
+{ GPIO0_BASE, GPIO_IN, GPIO_ALT1 }, /* GPIO15 ZII_p0Rxd(3) */ \
+{ GPIO0_BASE, GPIO_OUT, GPIO_ALT1 }, /* GPIO16 ZII_p0Txd(0) */ \
+{ GPIO0_BASE, GPIO_OUT, GPIO_ALT1 }, /* GPIO17 ZII_p0Txd(1) */ \
+{ GPIO0_BASE, GPIO_OUT, GPIO_ALT1 }, /* GPIO18 ZII_p0Txd(2) */ \
+{ GPIO0_BASE, GPIO_OUT, GPIO_ALT1 }, /* GPIO19 ZII_p0Txd(3) */ \
+{ GPIO0_BASE, GPIO_IN, GPIO_ALT1 }, /* GPIO20 ZII_p0Rx_er */ \
+{ GPIO0_BASE, GPIO_IN, GPIO_ALT1 }, /* GPIO21 ZII_p0Rx_dv */ \
+{ GPIO0_BASE, GPIO_IN, GPIO_ALT1 }, /* GPIO22 ZII_p0RxCrs */ \
+{ GPIO0_BASE, GPIO_OUT, GPIO_ALT1 }, /* GPIO23 ZII_p0Tx_er */ \
+{ GPIO0_BASE, GPIO_OUT, GPIO_ALT1 }, /* GPIO24 ZII_p0Tx_en */ \
+{ GPIO0_BASE, GPIO_IN, GPIO_ALT1 }, /* GPIO25 ZII_p0Col */ \
+{ GPIO0_BASE, GPIO_IN, GPIO_SEL }, /* GPIO26 USB2D_RXVALID */ \
+{ GPIO0_BASE, GPIO_IN, GPIO_SEL }, /* GPIO27 EXT_EBC_REQ USB2D_RXERROR */ \
+{ GPIO0_BASE, GPIO_IN, GPIO_SEL }, /* GPIO28 USB2D_TXVALID */ \
+{ GPIO0_BASE, GPIO_IN, GPIO_SEL }, /* GPIO29 EBC_EXT_HDLA USB2D_PAD_SUSPNDM */ \
+{ GPIO0_BASE, GPIO_IN, GPIO_SEL }, /* GPIO30 EBC_EXT_ACK USB2D_XCVRSELECT*/ \
+{ GPIO0_BASE, GPIO_IN, GPIO_SEL }, /* GPIO31 EBC_EXR_BUSREQ USB2D_TERMSELECT*/ \
+}, \
+{ \
+/* GPIO Core 1 */ \
+{ GPIO1_BASE, GPIO_IN, GPIO_SEL }, /* GPIO32 USB2D_OPMODE0 */ \
+{ GPIO1_BASE, GPIO_IN, GPIO_SEL }, /* GPIO33 USB2D_OPMODE1 */ \
+{ GPIO1_BASE, GPIO_OUT, GPIO_ALT3 }, /* GPIO34 UART0_DCD_N UART1_DSR_CTS_N UART2_SOUT*/ \
+{ GPIO1_BASE, GPIO_IN, GPIO_ALT3 }, /* GPIO35 UART0_8PIN_DSR_N UART1_RTS_DTR_N UART2_SIN*/ \
+{ GPIO1_BASE, GPIO_IN, GPIO_ALT1 }, /* GPIO36 UART0_8PIN_CTS_N UART3_SIN*/ \
+{ GPIO1_BASE, GPIO_OUT, GPIO_ALT1 }, /* GPIO37 UART0_RTS_N */ \
+{ GPIO1_BASE, GPIO_OUT, GPIO_ALT2 }, /* GPIO38 UART0_DTR_N UART1_SOUT */ \
+{ GPIO1_BASE, GPIO_IN, GPIO_ALT2 }, /* GPIO39 UART0_RI_N UART1_SIN */ \
+{ GPIO1_BASE, GPIO_IN, GPIO_ALT1 }, /* GPIO40 UIC_IRQ(0) */ \
+{ GPIO1_BASE, GPIO_IN, GPIO_ALT1 }, /* GPIO41 UIC_IRQ(1) */ \
+{ GPIO1_BASE, GPIO_IN, GPIO_ALT1 }, /* GPIO42 UIC_IRQ(2) */ \
+{ GPIO1_BASE, GPIO_IN, GPIO_ALT1 }, /* GPIO43 UIC_IRQ(3) */ \
+{ GPIO1_BASE, GPIO_IN, GPIO_ALT1 }, /* GPIO44 UIC_IRQ(4) DMA_ACK(1) */ \
+{ GPIO1_BASE, GPIO_IN, GPIO_SEL }, /* GPIO45 UIC_IRQ(6) DMA_EOT/TC(1) */ \
+{ GPIO1_BASE, GPIO_BI, GPIO_SEL }, /* GPIO46 UIC_IRQ(7) DMA_REQ(0) */ \
+{ GPIO1_BASE, GPIO_IN, GPIO_SEL }, /* GPIO47 UIC_IRQ(8) DMA_ACK(0) */ \
+{ GPIO1_BASE, GPIO_IN, GPIO_SEL }, /* GPIO48 UIC_IRQ(9) DMA_EOT/TC(0) */ \
+{ GPIO1_BASE, GPIO_IN, GPIO_SEL }, /* GPIO49 Unselect via TraceSelect Bit */ \
+{ GPIO1_BASE, GPIO_IN, GPIO_SEL }, /* GPIO50 Unselect via TraceSelect Bit */ \
+{ GPIO1_BASE, GPIO_IN, GPIO_SEL }, /* GPIO51 Unselect via TraceSelect Bit */ \
+{ GPIO1_BASE, GPIO_IN, GPIO_SEL }, /* GPIO52 Unselect via TraceSelect Bit */ \
+{ GPIO1_BASE, GPIO_IN, GPIO_SEL }, /* GPIO53 Unselect via TraceSelect Bit */ \
+{ GPIO1_BASE, GPIO_IN, GPIO_SEL }, /* GPIO54 Unselect via TraceSelect Bit */ \
+{ GPIO1_BASE, GPIO_IN, GPIO_SEL }, /* GPIO55 Unselect via TraceSelect Bit */ \
+{ GPIO1_BASE, GPIO_IN, GPIO_SEL }, /* GPIO56 Unselect via TraceSelect Bit */ \
+{ GPIO1_BASE, GPIO_IN, GPIO_SEL }, /* GPIO57 Unselect via TraceSelect Bit */ \
+{ GPIO1_BASE, GPIO_IN, GPIO_SEL }, /* GPIO58 Unselect via TraceSelect Bit */ \
+{ GPIO1_BASE, GPIO_IN, GPIO_SEL }, /* GPIO59 Unselect via TraceSelect Bit */ \
+{ GPIO1_BASE, GPIO_IN, GPIO_SEL }, /* GPIO60 Unselect via TraceSelect Bit */ \
+{ GPIO1_BASE, GPIO_IN, GPIO_SEL }, /* GPIO61 Unselect via TraceSelect Bit */ \
+{ GPIO1_BASE, GPIO_IN, GPIO_SEL }, /* GPIO62 Unselect via TraceSelect Bit */ \
+{ GPIO1_BASE, GPIO_IN, GPIO_SEL }, /* GPIO63 Unselect via TraceSelect Bit */ \
+} \
+}
+
+/*-----------------------------------------------------------------------
+ * Cache Configuration
+ */
+#define CFG_DCACHE_SIZE (32<<10) /* For AMCC 440 CPUs */
+#define CFG_CACHELINE_SIZE 32 /* ... */
+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
+#endif
+
+/*
+ * Internal Definitions
+ *
+ * Boot Flags
+ */
+#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
+#define BOOTFLAG_WARM 0x02 /* Software reboot */
+
+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
+#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
+#endif
+
+#endif /* __CONFIG_H */
diff --git a/include/configs/pdnb3.h b/include/configs/pdnb3.h
new file mode 100644
index 0000000000..ba6b113d8c
--- /dev/null
+++ b/include/configs/pdnb3.h
@@ -0,0 +1,307 @@
+/*
+ * (C) Copyright 2006
+ * Stefan Roese, DENX Software Engineering, sr@denx.de.
+ *
+ * Configuation settings for the PDNB3 board.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * High Level Configuration Options
+ * (easy to change)
+ */
+#define CONFIG_IXP425 1 /* This is an IXP425 CPU */
+#define CONFIG_PDNB3 1 /* on an PDNB3 board */
+
+#define CONFIG_DISPLAY_CPUINFO 1 /* display cpu info (and speed) */
+#define CONFIG_DISPLAY_BOARDINFO 1 /* display board info */
+
+/*
+ * Ethernet
+ */
+#define CONFIG_IXP4XX_NPE 1 /* include IXP4xx NPE support */
+#define CONFIG_NET_MULTI 1
+#define CONFIG_PHY_ADDR 16 /* NPE0 PHY address */
+#define CONFIG_HAS_ETH1
+#define CONFIG_PHY1_ADDR 18 /* NPE1 PHY address */
+#define CONFIG_MII 1 /* MII PHY management */
+#define CFG_RX_ETH_BUFFER 16 /* Number of ethernet rx buffers & descriptors */
+
+/*
+ * Misc configuration options
+ */
+#define CONFIG_USE_IRQ 1 /* we need IRQ stuff for timer */
+
+#define CONFIG_BOOTCOUNT_LIMIT /* support for bootcount limit */
+#define CFG_BOOTCOUNT_ADDR 0x60003000 /* inside qmrg sram */
+
+#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
+#define CONFIG_SETUP_MEMORY_TAGS 1
+#define CONFIG_INITRD_TAG 1
+
+/*
+ * Size of malloc() pool
+ */
+#define CFG_MALLOC_LEN (1 << 20)
+#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
+
+/* allow to overwrite serial and ethaddr */
+#define CONFIG_ENV_OVERWRITE
+
+#define CONFIG_BAUDRATE 115200
+#define CFG_IXP425_CONSOLE IXP425_UART1 /* we use UART1 for console */
+
+#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
+ CFG_CMD_DHCP | \
+ CFG_CMD_DATE | \
+ CFG_CMD_NET | \
+ CFG_CMD_MII | \
+ CFG_CMD_NAND | \
+ CFG_CMD_I2C | \
+ CFG_CMD_ELF | \
+ CFG_CMD_PING)
+
+/* This must be included AFTER the definition of CONFIG_COMMANDS (if any) */
+/* These are u-boot generic parameters */
+#include <cmd_confdefs.h>
+
+#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
+#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
+
+/*
+ * Miscellaneous configurable options
+ */
+#define CFG_LONGHELP /* undef to save memory */
+#define CFG_PROMPT "=> " /* Monitor Command Prompt */
+#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
+#define CFG_MAXARGS 16 /* max number of command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+
+#define CFG_MEMTEST_START 0x00400000 /* memtest works on */
+#define CFG_MEMTEST_END 0x00800000 /* 4 ... 8 MB in DRAM */
+#define CFG_LOAD_ADDR 0x00010000 /* default load address */
+
+#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
+#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
+ /* valid baudrates */
+#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
+
+/*
+ * Stack sizes
+ *
+ * The stack sizes are set up in start.S using the settings below
+ */
+#define CONFIG_STACKSIZE (128*1024) /* regular stack */
+#ifdef CONFIG_USE_IRQ
+#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
+#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
+#endif
+
+/***************************************************************
+ * Platform/Board specific defines start here.
+ ***************************************************************/
+
+/*-----------------------------------------------------------------------
+ * Default configuration (environment varibles...)
+ *----------------------------------------------------------------------*/
+#define CONFIG_PREBOOT "echo;" \
+ "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
+ "echo"
+
+#undef CONFIG_BOOTARGS
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "netdev=eth0\0" \
+ "hostname=pdnb3\0" \
+ "nfsargs=setenv bootargs root=/dev/nfs rw " \
+ "nfsroot=${serverip}:${rootpath}\0" \
+ "ramargs=setenv bootargs root=/dev/ram rw\0" \
+ "addip=setenv bootargs ${bootargs} ethaddr=${ethaddr} " \
+ "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
+ ":${hostname}:${netdev}:off panic=1\0" \
+ "addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate} " \
+ "mtdparts=${mtdparts}\0" \
+ "flash_nfs=run nfsargs addip addtty;" \
+ "bootm ${kernel_addr}\0" \
+ "flash_self=run ramargs addip addtty;" \
+ "bootm ${kernel_addr} ${ramdisk_addr}\0" \
+ "net_nfs=tftp 200000 ${bootfile};run nfsargs addip addtty;" \
+ "bootm\0" \
+ "rootpath=/opt/buildroot\0" \
+ "bootfile=/tftpboot/netbox/uImage\0" \
+ "kernel_addr=50080000\0" \
+ "ramdisk_addr=50200000\0" \
+ "load=tftp 100000 /tftpboot/netbox/u-boot.bin\0" \
+ "update=protect off 50000000 5007dfff;era 50000000 5007dfff;" \
+ "cp.b 100000 50000000 ${filesize};" \
+ "setenv filesize;saveenv\0" \
+ "upd=run load;run update\0" \
+ "ipaddr=10.0.0.233\0" \
+ "serverip=10.0.0.152\0" \
+ "netmask=255.255.0.0\0" \
+ "ethaddr=c6:6f:13:36:f3:81\0" \
+ "eth1addr=c6:6f:13:36:f3:82\0" \
+ "mtdparts=IXP4XX-Flash.0:504k@0(uboot),4k@504k(env)," \
+ "4k@508k(renv)\0" \
+ ""
+#define CONFIG_BOOTCOMMAND "run net_nfs"
+
+/*
+ * Physical Memory Map
+ */
+#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
+#define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */
+#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
+
+#define CFG_FLASH_BASE 0x50000000
+#define CFG_MONITOR_BASE CFG_FLASH_BASE
+#define CFG_MONITOR_LEN (504 << 10) /* Reserve 512 kB for Monitor */
+
+/*
+ * Expansion bus settings
+ */
+#define CFG_EXP_CS0 0x94913C43 /* 8bit, max size */
+#define CFG_EXP_CS1 0x85000043 /* 8bit, 512bytes */
+
+/*
+ * SDRAM settings
+ */
+#define CFG_SDR_CONFIG 0x18
+#define CFG_SDR_MODE_CONFIG 0x1
+#define CFG_SDRAM_REFRESH_CNT 0x81a
+
+/*
+ * FLASH and environment organization
+ */
+#define FLASH_BASE0_PRELIM CFG_FLASH_BASE /* FLASH bank #0 */
+
+#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
+#define CFG_MAX_FLASH_SECT 256 /* max number of sectors on one chip */
+
+#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
+#define CFG_FLASH_WRITE_TOUT 1000 /* Timeout for Flash Write (in ms) */
+
+#define CFG_FLASH_WORD_SIZE unsigned char /* flash word size (width) */
+#define CFG_FLASH_ADDR0 0x5555 /* 1st address for flash config cycles */
+#define CFG_FLASH_ADDR1 0x2AAA /* 2nd address for flash config cycles */
+/*
+ * The following defines are added for buggy IOP480 byte interface.
+ * All other boards should use the standard values (CPCI405 etc.)
+ */
+#define CFG_FLASH_READ0 0x0000 /* 0 is standard */
+#define CFG_FLASH_READ1 0x0001 /* 1 is standard */
+#define CFG_FLASH_READ2 0x0002 /* 2 is standard */
+
+#define CFG_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
+
+#define CFG_ENV_IS_IN_FLASH 1
+
+#define CFG_ENV_SECT_SIZE 0x1000 /* size of one complete sector */
+#define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_MONITOR_LEN)
+#define CFG_ENV_SIZE 0x1000 /* Total Size of Environment Sector */
+
+/* Address and size of Redundant Environment Sector */
+#define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR + CFG_ENV_SECT_SIZE)
+#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
+
+/*
+ * NAND-FLASH stuff
+ */
+#define CFG_MAX_NAND_DEVICE 1
+#define NAND_MAX_CHIPS 1
+#define CFG_NAND_BASE 0x51000000 /* NAND FLASH Base Address */
+
+/*
+ * GPIO settings
+ */
+
+/* FPGA program pin configuration */
+#define CFG_GPIO_PRG 12 /* FPGA program pin (cpu output)*/
+#define CFG_GPIO_CLK 10 /* FPGA clk pin (cpu output) */
+#define CFG_GPIO_DATA 14 /* FPGA data pin (cpu output) */
+#define CFG_GPIO_INIT 13 /* FPGA init pin (cpu input) */
+#define CFG_GPIO_DONE 11 /* FPGA done pin (cpu input) */
+
+/* other GPIO's */
+#define CFG_GPIO_RESTORE_INT 0
+#define CFG_GPIO_RESTART_INT 1
+#define CFG_GPIO_SYS_RUNNING 2
+#define CFG_GPIO_PCI_INTA 3
+#define CFG_GPIO_PCI_INTB 4
+#define CFG_GPIO_I2C_SCL 6
+#define CFG_GPIO_I2C_SDA 7
+#define CFG_GPIO_FPGA_RESET 9
+#define CFG_GPIO_CLK_33M 15
+
+/*
+ * I2C stuff
+ */
+
+/* enable I2C and select the hardware/software driver */
+#undef CONFIG_HARD_I2C /* I2C with hardware support */
+#define CONFIG_SOFT_I2C 1 /* I2C bit-banged */
+
+#define CFG_I2C_SPEED 83000 /* 83 kHz is supposed to work */
+#define CFG_I2C_SLAVE 0xFE
+
+/*
+ * Software (bit-bang) I2C driver configuration
+ */
+#define PB_SCL (1 << CFG_GPIO_I2C_SCL)
+#define PB_SDA (1 << CFG_GPIO_I2C_SDA)
+
+#define I2C_INIT GPIO_OUTPUT_ENABLE(CFG_GPIO_I2C_SCL)
+#define I2C_ACTIVE GPIO_OUTPUT_ENABLE(CFG_GPIO_I2C_SDA)
+#define I2C_TRISTATE GPIO_OUTPUT_DISABLE(CFG_GPIO_I2C_SDA)
+#define I2C_READ ((*IXP425_GPIO_GPINR & PB_SDA) != 0)
+#define I2C_SDA(bit) if (bit) GPIO_OUTPUT_SET(CFG_GPIO_I2C_SDA); \
+ else GPIO_OUTPUT_CLEAR(CFG_GPIO_I2C_SDA)
+#define I2C_SCL(bit) if (bit) GPIO_OUTPUT_SET(CFG_GPIO_I2C_SCL); \
+ else GPIO_OUTPUT_CLEAR(CFG_GPIO_I2C_SCL)
+#define I2C_DELAY udelay(3) /* 1/4 I2C clock duration */
+
+/*
+ * I2C RTC
+ */
+#define CONFIG_RTC_M41T11 1
+#define CFG_I2C_RTC_ADDR 0x68
+#define CFG_M41T11_BASE_YEAR 1900 /* play along with the linux driver */
+
+/*
+ * Spartan3 FPGA configuration support
+ */
+#define CFG_FPGA_MAX_SIZE 700*1024 /* 700kByte for XC3S500E */
+
+#define CFG_FPGA_PRG (1 << CFG_GPIO_PRG) /* FPGA program pin (cpu output)*/
+#define CFG_FPGA_CLK (1 << CFG_GPIO_CLK) /* FPGA clk pin (cpu output) */
+#define CFG_FPGA_DATA (1 << CFG_GPIO_DATA) /* FPGA data pin (cpu output) */
+#define CFG_FPGA_INIT (1 << CFG_GPIO_INIT) /* FPGA init pin (cpu input) */
+#define CFG_FPGA_DONE (1 << CFG_GPIO_DONE) /* FPGA done pin (cpu input) */
+
+/*
+ * Cache Configuration
+ */
+#define CFG_CACHELINE_SIZE 32
+
+#endif /* __CONFIG_H */
diff --git a/include/configs/ppmc7xx.h b/include/configs/ppmc7xx.h
new file mode 100644
index 0000000000..072b9dd5b4
--- /dev/null
+++ b/include/configs/ppmc7xx.h
@@ -0,0 +1,419 @@
+/*
+ * ppmc7xx.h
+ * ---------
+ *
+ * Wind River PPMC 7xx/74xx board configuration file.
+ *
+ * By Richard Danter (richard.danter@windriver.com)
+ * Copyright (C) 2005 Wind River Systems
+ */
+
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#define CONFIG_PPMC7XX
+
+
+/*===================================================================
+ *
+ * User configurable settings - Modify to your preference
+ *
+ *===================================================================
+ */
+
+/*
+ * Debug
+ *
+ * DEBUG - Define this is you want extra debug info
+ * GTREGREAD - Required to build with debug
+ * do_bdinfo - Required to build with debug
+ */
+
+#undef DEBUG
+#define GTREGREAD(x) 0xFFFFFFFF
+#define do_bdinfo(a,b,c,d)
+
+
+/*
+ * CPU type
+ *
+ * CONFIG_7xx - We have a 750 or 755 CPU
+ * CONFIG_74xx - We have a 7400 CPU
+ * CONFIG_ALTIVEC - We have altivec enabled CPU (only 7400)
+ * CONFIG_BUS_CLK - System bus clock in Hz
+ */
+
+#define CONFIG_7xx
+#undef CONFIG_74xx
+#undef CONFIG_ALTIVEC
+#define CONFIG_BUS_CLK 66000000
+
+
+/*
+ * Monitor configuration
+ *
+ * CONFIG_COMMANDS - List of command sets to include in shell
+ *
+ * The following command sets have been tested and known to work:
+ *
+ * CFG_CMD_CACHE - Cache control commands
+ * CFG_CMD_MEMORY - Memory display, change and test commands
+ * CFG_CMD_FLASH - Erase and program flash
+ * CFG_CMD_ENV - Environment commands
+ * CFG_CMD_RUN - Run commands stored in env vars
+ * CFG_CMD_ELF - Load ELF files
+ * CFG_CMD_NET - Networking/file download commands
+ * CFG_CMD_PING - ICMP Echo Request command
+ * CFG_CMD_PCI - PCI Bus scanning command
+ */
+
+#define CONFIG_COMMANDS ( (CFG_CMD_DFL & ~(CFG_CMD_KGDB)) | \
+ CFG_CMD_FLASH | \
+ CFG_CMD_ENV | \
+ CFG_CMD_RUN | \
+ CFG_CMD_ELF | \
+ CFG_CMD_NET | \
+ CFG_CMD_PING | \
+ CFG_CMD_PCI)
+
+
+/*
+ * Serial configuration
+ *
+ * CONFIG_CONS_INDEX - Serial console port number (COM1)
+ * CONFIG_BAUDRATE - Serial speed
+ */
+
+#define CONFIG_CONS_INDEX 1
+#define CONFIG_BAUDRATE 9600
+
+
+/*
+ * PCI config
+ *
+ * CONFIG_PCI - Enable PCI bus
+ * CONFIG_PCI_PNP - Enable Plug & Play support
+ * CONFIG_PCI_SCAN_SHOW - Enable display of devices at startup
+ */
+
+#define CONFIG_PCI
+#define CONFIG_PCI_PNP
+#undef CONFIG_PCI_SCAN_SHOW
+
+
+/*
+ * Network config
+ *
+ * CONFIG_NET_MULTI - Support for multiple network interfaces
+ * CONFIG_EEPRO100 - Intel 8255x Ethernet Controller
+ * CONFIG_EEPRO100_SROM_WRITE - Enable writing to network card ROM
+ */
+
+#define CONFIG_NET_MULTI
+#define CONFIG_EEPRO100
+#define CONFIG_EEPRO100_SROM_WRITE
+
+
+/*
+ * Enable extra init functions
+ *
+ * CONFIG_MISC_INIT_F - Call pre-relocation init functions
+ * CONFIG_MISC_INIT_R - Call post relocation init functions
+ */
+
+#undef CONFIG_MISC_INIT_F
+#define CONFIG_MISC_INIT_R
+
+
+/*
+ * Boot config
+ *
+ * CONFIG_BOOTCOMMAND - Command(s) to execute to auto-boot
+ * CONFIG_BOOTDELAY - How long to wait before auto-boot (in sec)
+ */
+
+#define CONFIG_BOOTCOMMAND \
+ "bootp;" \
+ "setenv bootargs root=/dev/nfs rw nfsroot=$(serverip):$(rootpath) " \
+ "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):$(hostname)::off;" \
+ "bootm"
+#define CONFIG_BOOTDELAY 5
+
+
+/*===================================================================
+ *
+ * Board configuration settings - You should not need to modify these
+ *
+ *===================================================================
+ */
+
+
+#include <cmd_confdefs.h>
+
+
+/*
+ * Memory map
+ *
+ * This board runs in a standard CHRP (Map-B) configuration.
+ *
+ * Type Start End Size Width Chip Sel
+ * ----------- ----------- ----------- ------- ------- --------
+ * SDRAM 0x00000000 0x04000000 64MB 64b SDRAMCS0
+ * User LED's 0x78000000 RCS3
+ * UART 0x7C000000 RCS2
+ * Mailbox 0xFF000000 RCS1
+ * Flash 0xFFC00000 0xFFFFFFFF 4MB 64b RCS0
+ *
+ * Flash sectors are laid out as follows.
+ *
+ * Sector Start End Size Comments
+ * ------- ----------- ----------- ------- -----------
+ * 0 0xFFC00000 0xFFC3FFFF 256KB
+ * 1 0xFFC40000 0xFFC7FFFF 256KB
+ * 2 0xFFC80000 0xFFCBFFFF 256KB
+ * 3 0xFFCC0000 0xFFCFFFFF 256KB
+ * 4 0xFFD00000 0xFFD3FFFF 256KB
+ * 5 0xFFD40000 0xFFD7FFFF 256KB
+ * 6 0xFFD80000 0xFFDBFFFF 256KB
+ * 7 0xFFDC0000 0xFFDFFFFF 256KB
+ * 8 0xFFE00000 0xFFE3FFFF 256KB
+ * 9 0xFFE40000 0xFFE7FFFF 256KB
+ * 10 0xFFE80000 0xFFEBFFFF 256KB
+ * 11 0xFFEC0000 0xFFEFFFFF 256KB
+ * 12 0xFFF00000 0xFFF3FFFF 256KB U-Boot code here
+ * 13 0xFFF40000 0xFFF7FFFF 256KB
+ * 14 0xFFF80000 0xFFFBFFFF 256KB
+ * 15 0xFFFC0000 0xFFFDFFFF 128KB
+ * 16 0xFFFE0000 0xFFFE7FFF 32KB U-Boot env vars here
+ * 17 0xFFFE8000 0xFFFEFFFF 32KB U-Boot backup copy of env vars here
+ * 18 0xFFFF0000 0xFFFFFFFF 64KB
+ */
+
+
+/*
+ * SDRAM config - see memory map details above.
+ *
+ * CFG_SDRAM_BASE - Start address of SDRAM, this _must_ be zero!
+ * CFG_SDRAM_SIZE - Total size of contiguous SDRAM bank(s)
+ */
+
+#define CFG_SDRAM_BASE 0x00000000
+#define CFG_SDRAM_SIZE 0x04000000
+
+
+/*
+ * Flash config - see memory map details above.
+ *
+ * CFG_FLASH_BASE - Start address of flash memory
+ * CFG_FLASH_SIZE - Total size of contiguous flash mem
+ * CFG_FLASH_ERASE_TOUT - Erase timeout in ms
+ * CFG_FLASH_WRITE_TOUT - Write timeout in ms
+ * CFG_MAX_FLASH_BANKS - Number of banks of flash on board
+ * CFG_MAX_FLASH_SECT - Number of sectors in a bank
+ */
+
+#define CFG_FLASH_BASE 0xFFC00000
+#define CFG_FLASH_SIZE 0x00400000
+#define CFG_FLASH_ERASE_TOUT 250000
+#define CFG_FLASH_WRITE_TOUT 5000
+#define CFG_MAX_FLASH_BANKS 1
+#define CFG_MAX_FLASH_SECT 19
+
+
+/*
+ * Monitor config - see memory map details above
+ *
+ * CFG_MONITOR_BASE - Base address of monitor code
+ * CFG_MALLOC_LEN - Size of malloc pool (128KB)
+ */
+
+#define CFG_MONITOR_BASE TEXT_BASE
+#define CFG_MALLOC_LEN 0x20000
+
+
+/*
+ * Command shell settings
+ *
+ * CFG_BARGSIZE - Boot Argument buffer size
+ * CFG_BOOTMAPSZ - Size of app's mapped RAM at boot (Linux=8MB)
+ * CFG_CBSIZE - Console Buffer (input) size
+ * CFG_LOAD_ADDR - Default load address
+ * CFG_LONGHELP - Provide more detailed help
+ * CFG_MAXARGS - Number of args accepted by monitor commands
+ * CFG_MEMTEST_START - Start address of test to run on RAM
+ * CFG_MEMTEST_END - End address of RAM test
+ * CFG_PBSIZE - Print Buffer (output) size
+ * CFG_PROMPT - Prompt string
+ */
+
+#define CFG_BARGSIZE 1024
+#define CFG_BOOTMAPSZ 0x800000
+#define CFG_CBSIZE 1024
+#define CFG_LOAD_ADDR 0x100000
+#define CFG_LONGHELP
+#define CFG_MAXARGS 16
+#define CFG_MEMTEST_START 0x00040000
+#define CFG_MEMTEST_END 0x00040100
+#define CFG_PBSIZE 1024
+#define CFG_PROMPT "=> "
+
+
+/*
+ * Environment config - see memory map details above
+ *
+ * CFG_ENV_IS_IN_FLASH - The env variables are stored in flash
+ * CFG_ENV_ADDR - Address of the sector containing env vars
+ * CFG_ENV_SIZE - Ammount of RAM for env vars (used to save RAM, 4KB)
+ * CFG_ENV_SECT_SIZE - Size of sector containing env vars (32KB)
+ */
+
+#define CFG_ENV_IS_IN_FLASH 1
+#define CFG_ENV_ADDR 0xFFFE0000
+#define CFG_ENV_SIZE 0x1000
+#define CFG_ENV_ADDR_REDUND 0xFFFE8000
+#define CFG_ENV_SIZE_REDUND 0x1000
+#define CFG_ENV_SECT_SIZE 0x8000
+
+
+/*
+ * Initial RAM config
+ *
+ * Since the main system RAM is initialised very early, we place the INIT_RAM
+ * in the main system RAM just above the exception vectors. The contents are
+ * copied to top of RAM by the init code.
+ *
+ * CFG_INIT_RAM_ADDR - Address of Init RAM, above exception vect
+ * CFG_INIT_RAM_END - Size of Init RAM
+ * CFG_GBL_DATA_SIZE - Ammount of RAM to reserve for global data
+ * CFG_GBL_DATA_OFFSET - Start of global data, top of stack
+ */
+
+#define CFG_INIT_RAM_ADDR (CFG_SDRAM_BASE + 0x4000)
+#define CFG_INIT_RAM_END 0x4000
+#define CFG_GBL_DATA_SIZE 128
+#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
+
+
+/*
+ * Initial BAT config
+ *
+ * BAT0 - System SDRAM
+ * BAT1 - LED's and Serial Port
+ * BAT2 - PCI Memory
+ * BAT3 - PCI I/O including Flash Memory
+ */
+
+#define CFG_IBAT0L (CFG_SDRAM_BASE | BATL_PP_10 | BATL_MEMCOHERENCE)
+#define CFG_IBAT0U (CFG_SDRAM_BASE | BATU_BL_64M | BATU_VS | BATU_VP)
+#define CFG_DBAT0L CFG_IBAT0L
+#define CFG_DBAT0U CFG_IBAT0U
+
+#define CFG_IBAT1L (0x70000000 | BATL_PP_RW | BATL_CACHEINHIBIT)
+#define CFG_IBAT1U (0x70000000 | BATU_BL_256M | BATU_VS | BATU_VP)
+#define CFG_DBAT1L (0x70000000 | BATL_PP_RW | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
+#define CFG_DBAT1U (0x70000000 | BATU_BL_256M | BATU_VS | BATU_VP)
+
+#define CFG_IBAT2L (0x80000000 | BATL_PP_RW | BATL_CACHEINHIBIT)
+#define CFG_IBAT2U (0x80000000 | BATU_BL_256M | BATU_VS | BATU_VP)
+#define CFG_DBAT2L (0x80000000 | BATL_PP_RW | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
+#define CFG_DBAT2U (0x80000000 | BATU_BL_256M | BATU_VS | BATU_VP)
+
+#define CFG_IBAT3L (0xF0000000 | BATL_PP_RW | BATL_CACHEINHIBIT)
+#define CFG_IBAT3U (0xF0000000 | BATU_BL_256M | BATU_VS | BATU_VP)
+#define CFG_DBAT3L (0xF0000000 | BATL_PP_RW | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
+#define CFG_DBAT3U (0xF0000000 | BATU_BL_256M | BATU_VS | BATU_VP)
+
+
+/*
+ * Cache config
+ *
+ * CFG_CACHELINE_SIZE - Size of a cache line (CPU specific)
+ * CFG_L2 - L2 cache enabled if defined
+ * L2_INIT - L2 cache init flags
+ * L2_ENABLE - L2 cache enable flags
+ */
+
+#define CFG_CACHELINE_SIZE 32
+#undef CFG_L2
+#define L2_INIT 0
+#define L2_ENABLE 0
+
+
+/*
+ * Clocks config
+ *
+ * CFG_BUS_HZ - Bus clock frequency in Hz
+ * CFG_BUS_CLK - As above (?)
+ * CFG_HZ - Decrementer freq in Hz
+ */
+
+#define CFG_BUS_HZ CONFIG_BUS_CLK
+#define CFG_BUS_CLK CONFIG_BUS_CLK
+#define CFG_HZ 1000
+
+
+/*
+ * Serial port config
+ *
+ * CFG_BAUDRATE_TABLE - List of valid baud rates
+ * CFG_NS16550 - Include the NS16550 driver
+ * CFG_NS16550_SERIAL - Include the serial (wrapper) driver
+ * CFG_NS16550_CLK - Frequency of reference clock
+ * CFG_NS16550_REG_SIZE - 64-bit accesses to 8-bit port
+ * CFG_NS16550_COM1 - Base address of 1st serial port
+ */
+
+#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
+#define CFG_NS16550
+#define CFG_NS16550_SERIAL
+#define CFG_NS16550_CLK 3686400
+#define CFG_NS16550_REG_SIZE -8
+#define CFG_NS16550_COM1 0x7C000000
+
+
+/*
+ * PCI Config - Address Map B (CHRP)
+ */
+
+#define CFG_PCI_MEMORY_BUS 0x00000000
+#define CFG_PCI_MEMORY_PHYS 0x00000000
+#define CFG_PCI_MEMORY_SIZE 0x40000000
+#define CFG_PCI_MEM_BUS 0x80000000
+#define CFG_PCI_MEM_PHYS 0x80000000
+#define CFG_PCI_MEM_SIZE 0x7D000000
+#define CFG_ISA_MEM_BUS 0x00000000
+#define CFG_ISA_MEM_PHYS 0xFD000000
+#define CFG_ISA_MEM_SIZE 0x01000000
+#define CFG_PCI_IO_BUS 0x00800000
+#define CFG_PCI_IO_PHYS 0xFE800000
+#define CFG_PCI_IO_SIZE 0x00400000
+#define CFG_ISA_IO_BUS 0x00000000
+#define CFG_ISA_IO_PHYS 0xFE000000
+#define CFG_ISA_IO_SIZE 0x00800000
+#define CFG_ISA_IO_BASE_ADDRESS CFG_ISA_IO_PHYS
+#define CFG_ISA_IO CFG_ISA_IO_PHYS
+#define CFG_60X_PCI_IO_OFFSET CFG_ISA_IO_PHYS
+
+
+/*
+ * Extra init functions
+ *
+ * CFG_BOARD_ASM_INIT - Call assembly init code
+ */
+
+#define CFG_BOARD_ASM_INIT
+
+
+/*
+ * Boot flags
+ *
+ * BOOTFLAG_COLD - Indicates a power-on boot
+ * BOOTFLAG_WARM - Indicates a software reset
+ */
+
+#define BOOTFLAG_COLD 0x01
+#define BOOTFLAG_WARM 0x02
+
+
+#endif /* __CONFIG_H */
diff --git a/include/configs/ppmc8260.h b/include/configs/ppmc8260.h
index 7579222102..d671dccc19 100644
--- a/include/configs/ppmc8260.h
+++ b/include/configs/ppmc8260.h
@@ -279,7 +279,6 @@
#define CONFIG_COMMANDS (((CONFIG_CMD_DFL & ~(CFG_CMD_KGDB))) | \
CFG_CMD_ELF | \
CFG_CMD_ASKENV | \
- CFG_CMD_ECHO | \
CFG_CMD_REGINFO | \
CFG_CMD_MEMTEST | \
CFG_CMD_MII | \
diff --git a/include/configs/r5200.h b/include/configs/r5200.h
new file mode 100644
index 0000000000..e1e406bf9b
--- /dev/null
+++ b/include/configs/r5200.h
@@ -0,0 +1,169 @@
+/*
+ * Configuation settings for the R5200 board
+ *
+ * (C) Copyright 2006 Lab X Technologies <zachary.landau@labxtechnologies.com>
+ * Based on Motorola MC5272C3 board config
+ * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * board/config.h - configuration options, board specific
+ */
+
+#ifndef _R5200_H
+#define _R5200_H
+
+/*
+ * High Level Configuration Options
+ * (easy to change)
+ */
+#define CONFIG_MCF52x2 /* define processor family */
+#define CONFIG_M5271 /* define processor type */
+#define CONFIG_R5200 /* define board type */
+
+#define FEC_ENET
+#define CONFIG_NET_RETRY_COUNT 5
+
+#define CONFIG_IPADDR 192.168.0.172
+#define CONFIG_SERVERIP 192.168.0.148
+#define CONFIG_ETHADDR 00:06:3b:00:44:55
+
+#define CONFIG_BAUDRATE 19200
+#define CFG_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
+
+#define CONFIG_WATCHDOG
+#define CONFIG_WATCHDOG_TIMEOUT 0xFFFF /* clock modulus */
+
+/* Configuration for environment
+ * Environment is embedded in u-boot in the second sector of the flash
+ */
+#ifndef CONFIG_MONITOR_IS_IN_RAM
+#define CFG_ENV_OFFSET 0x20000
+#define CFG_ENV_SECT_SIZE 0x20000
+#define CFG_ENV_IS_IN_FLASH 1
+#define CFG_ENV_IS_EMBEDDED 1
+#else
+#define CFG_ENV_ADDR 0xf0020000
+#define CFG_ENV_SECT_SIZE 0x2000
+#define CFG_ENV_IS_IN_FLASH 1
+#endif
+
+#define CONFIG_COMMANDS ((CONFIG_CMD_DFL | CFG_CMD_PING | CFG_CMD_NET ) & ~(CFG_CMD_LOADS | CFG_CMD_LOADB))
+
+/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
+#include <cmd_confdefs.h>
+
+/* Note: We only copy one sectors worth of application code from location
+ * 10200000 for speed purposes. Increase the size if necessary */
+#define CONFIG_BOOTCOMMAND "cp.b 10200000 0 20000; go 400"
+#define CONFIG_BOOTDELAY 1
+
+#define CFG_PROMPT "u-boot> "
+#define CFG_LONGHELP /* undef to save memory */
+
+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
+#else
+#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
+#endif
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
+#define CFG_MAXARGS 16 /* max number of command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+
+#define CFG_LOAD_ADDR 0x00002000
+
+#define CFG_MEMTEST_START 0x400
+#define CFG_MEMTEST_END 0x380000
+
+#define CFG_HZ 1000000
+#define CFG_CLK 100000000
+
+/*
+ * Low Level Configuration Settings
+ * (address mappings, register initial values, etc.)
+ * You should know what you are doing if you make changes here.
+ */
+
+#define CFG_MBAR 0x40000000 /* Register Base Addrs */
+
+#define CFG_ENET_BD_BASE 0x480000
+
+/*-----------------------------------------------------------------------
+ * Definitions for initial stack pointer and data area (in DPRAM)
+ */
+#define CFG_INIT_RAM_ADDR 0x20000000
+#define CFG_INIT_RAM_END 0x1000 /* End of used area in internal SRAM */
+#define CFG_GBL_DATA_SIZE 64 /* size in bytes reserved for initial data */
+#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
+#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
+
+/*-----------------------------------------------------------------------
+ * Start addresses for the final memory configuration
+ * (Set up by the startup code)
+ * Please note that CFG_SDRAM_BASE _must_ start at 0
+ */
+#define CFG_SDRAM_BASE 0x00000000
+#define CFG_SDRAM_SIZE 8 /* SDRAM size in MB */
+#define CFG_FLASH_BASE 0x10000000
+
+#ifdef CONFIG_MONITOR_IS_IN_RAM
+#define CFG_MONITOR_BASE 0x20000
+#else
+#define CFG_MONITOR_BASE (CFG_FLASH_BASE + 0x400)
+#endif
+
+#define CFG_MONITOR_LEN 0x20001
+#define CFG_MALLOC_LEN (256 << 10)
+#define CFG_BOOTPARAMS_LEN 64*1024
+
+/*
+ * For booting Linux, the board info and command line data
+ * have to be in the first 8 MB of memory, since this is
+ * the maximum mapped by the Linux kernel during initialization ??
+ */
+#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
+
+/*-----------------------------------------------------------------------
+ * FLASH organization
+ */
+#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
+#define CFG_MAX_FLASH_SECT 1024 /* max number of sectors on one chip */
+#define CFG_FLASH_ERASE_TOUT 1000
+
+#define CFG_FLASH_CFI 1
+#define CFG_FLASH_CFI_DRIVER 1
+#define CFG_FLASH_SIZE 0x800000
+
+/*-----------------------------------------------------------------------
+ * Cache Configuration
+ */
+#define CFG_CACHELINE_SIZE 16
+
+/*-----------------------------------------------------------------------
+ * Memory bank definitions
+ */
+
+/*-----------------------------------------------------------------------
+ * Port configuration
+ */
+#define CFG_FECI2C 0xF0
+
+#endif /* _R5200_H */
diff --git a/include/configs/sacsng.h b/include/configs/sacsng.h
index 4e0cfdb4c3..97b52fa1ae 100644
--- a/include/configs/sacsng.h
+++ b/include/configs/sacsng.h
@@ -507,7 +507,6 @@
# define CONFIG_COMMANDS (((CONFIG_CMD_DFL & ~(CFG_CMD_KGDB))) | \
CFG_CMD_ELF | \
CFG_CMD_ASKENV | \
- CFG_CMD_ECHO | \
CFG_CMD_I2C | \
CFG_CMD_SPI | \
CFG_CMD_SDRAM | \
@@ -520,7 +519,6 @@
# define CONFIG_COMMANDS (((CONFIG_CMD_DFL & ~(CFG_CMD_KGDB))) | \
CFG_CMD_ELF | \
CFG_CMD_ASKENV | \
- CFG_CMD_ECHO | \
CFG_CMD_I2C | \
CFG_CMD_SPI | \
CFG_CMD_SDRAM | \
diff --git a/include/configs/sbc2410x.h b/include/configs/sbc2410x.h
new file mode 100644
index 0000000000..866f7b0426
--- /dev/null
+++ b/include/configs/sbc2410x.h
@@ -0,0 +1,239 @@
+/*
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Marius Groeger <mgroeger@sysgo.de>
+ * Gary Jennejohn <gj@denx.de>
+ * David Mueller <d.mueller@elsoft.ch>
+ *
+ * Modified for the friendly-arm SBC-2410X by
+ * (C) Copyright 2005
+ * JinHua Luo, GuangDong Linux Center, <luo.jinhua@gd-linux.com>
+ *
+ * Configuation settings for the friendly-arm SBC-2410X board.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * If we are developing, we might want to start armboot from ram
+ * so we MUST NOT initialize critical regs like mem-timing ...
+ */
+#undef CONFIG_SKIP_LOWLEVEL_INIT /* undef for developing */
+
+/*
+ * High Level Configuration Options
+ * (easy to change)
+ */
+#define CONFIG_ARM920T 1 /* This is an ARM920T Core */
+#define CONFIG_S3C2410 1 /* in a SAMSUNG S3C2410 SoC */
+#define CONFIG_SBC2410X 1 /* on a friendly-arm SBC-2410X Board */
+
+/* input clock of PLL */
+#define CONFIG_SYS_CLK_FREQ 12000000/* the SBC2410X has 12MHz input clock */
+
+
+#define USE_920T_MMU 1
+#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
+
+/*
+ * Size of malloc() pool
+ */
+#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
+#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
+
+/*
+ * Hardware drivers
+ */
+#define CONFIG_DRIVER_CS8900 1 /* we have a CS8900 on-board */
+#define CS8900_BASE 0x19000300
+#define CS8900_BUS16 1 /* the Linux driver does accesses as shorts */
+
+/*
+ * select serial console configuration
+ */
+#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on SBC2410X */
+
+/************************************************************
+ * RTC
+ ************************************************************/
+#define CONFIG_RTC_S3C24X0 1
+
+/* allow to overwrite serial and ethaddr */
+#define CONFIG_ENV_OVERWRITE
+
+#define CONFIG_BAUDRATE 115200
+
+/***********************************************************
+ * Command definition
+ ***********************************************************/
+#define CONFIG_COMMANDS \
+ (CONFIG_CMD_DFL | \
+ CFG_CMD_CACHE | \
+ /*CFG_CMD_NAND |*/ \
+ /*CFG_CMD_EEPROM |*/ \
+ /*CFG_CMD_I2C |*/ \
+ /*CFG_CMD_USB |*/ \
+ CFG_CMD_REGINFO | \
+ CFG_CMD_DATE | \
+ CFG_CMD_PING | \
+ CFG_CMD_DHCP | \
+ CFG_CMD_ELF)
+
+/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
+#include <cmd_confdefs.h>
+
+#define CONFIG_BOOTDELAY 3
+#define CONFIG_BOOTARGS "console=ttySAC0 root=/dev/nfs nfsroot=192.168.0.1:/friendly-arm/rootfs_netserv ip=192.168.0.69:192.168.0.1:192.168.0.1:255.255.255.0:debian:eth0:off"
+#define CONFIG_ETHADDR 08:00:3e:26:0a:5b
+#define CONFIG_NETMASK 255.255.255.0
+#define CONFIG_IPADDR 192.168.0.69
+#define CONFIG_SERVERIP 192.168.0.1
+/*#define CONFIG_BOOTFILE "elinos-lart" */
+#define CONFIG_BOOTCOMMAND "dhcp; bootm"
+
+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
+/* what's this ? it's not used anywhere */
+#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
+#endif
+
+/*
+ * Miscellaneous configurable options
+ */
+#define CFG_LONGHELP /* undef to save memory */
+#define CFG_PROMPT "[ ~ljh@GDLC ]# " /* Monitor Command Prompt */
+#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
+#define CFG_MAXARGS 16 /* max number of command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+
+#define CFG_MEMTEST_START 0x30000000 /* memtest works on */
+#define CFG_MEMTEST_END 0x33F00000 /* 63 MB in DRAM */
+
+#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
+
+#define CFG_LOAD_ADDR 0x33000000 /* default load address */
+
+/* the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need */
+/* it to wrap 100 times (total 1562500) to get 1 sec. */
+#define CFG_HZ 1562500
+
+/* valid baudrates */
+#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
+
+/*-----------------------------------------------------------------------
+ * Stack sizes
+ *
+ * The stack sizes are set up in start.S using the settings below
+ */
+#define CONFIG_STACKSIZE (128*1024) /* regular stack */
+#ifdef CONFIG_USE_IRQ
+#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
+#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
+#endif
+
+/*-----------------------------------------------------------------------
+ * Physical Memory Map
+ */
+#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
+#define PHYS_SDRAM_1 0x30000000 /* SDRAM Bank #1 */
+#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
+
+#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
+
+#define CFG_FLASH_BASE PHYS_FLASH_1
+
+/*-----------------------------------------------------------------------
+ * FLASH and environment organization
+ */
+/* #define CONFIG_AMD_LV400 1 /\* uncomment this if you have a LV400 flash *\/ */
+
+#define CONFIG_AMD_LV800 1 /* uncomment this if you have a LV800 flash */
+
+#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
+
+#ifdef CONFIG_AMD_LV800
+#define PHYS_FLASH_SIZE 0x00100000 /* 1MB */
+#define CFG_MAX_FLASH_SECT (19) /* max number of sectors on one chip */
+#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x0F0000) /* addr of environment */
+#endif
+
+#ifdef CONFIG_AMD_LV400
+#define PHYS_FLASH_SIZE 0x00080000 /* 512KB */
+#define CFG_MAX_FLASH_SECT (11) /* max number of sectors on one chip */
+#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x070000) /* addr of environment */
+#endif
+
+/* timeout values are in ticks */
+#define CFG_FLASH_ERASE_TOUT (5*CFG_HZ) /* Timeout for Flash Erase */
+#define CFG_FLASH_WRITE_TOUT (5*CFG_HZ) /* Timeout for Flash Write */
+
+#define CFG_ENV_IS_IN_FLASH 1
+#define CFG_ENV_SIZE 0x10000 /* Total Size of Environment Sector */
+
+/*-----------------------------------------------------------------------
+ * NAND flash settings
+ */
+#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
+#define SECTORSIZE 512
+
+#define ADDR_COLUMN 1
+#define ADDR_PAGE 2
+#define ADDR_COLUMN_PAGE 3
+
+#define NAND_ChipID_UNKNOWN 0x00
+#define NAND_MAX_FLOORS 1
+#define NAND_MAX_CHIPS 1
+
+#define NAND_WAIT_READY(nand) NF_WaitRB()
+#define NAND_DISABLE_CE(nand) NF_SetCE(NFCE_HIGH)
+#define NAND_ENABLE_CE(nand) NF_SetCE(NFCE_LOW)
+#define WRITE_NAND_COMMAND(d, adr) NF_Cmd(d)
+#define WRITE_NAND_COMMANDW(d, adr) NF_CmdW(d)
+#define WRITE_NAND_ADDRESS(d, adr) NF_Addr(d)
+#define WRITE_NAND(d, adr) NF_Write(d)
+#define READ_NAND(adr) NF_Read()
+/* the following functions are NOP's because S3C24X0 handles this in hardware */
+#define NAND_CTL_CLRALE(nandptr)
+#define NAND_CTL_SETALE(nandptr)
+#define NAND_CTL_CLRCLE(nandptr)
+#define NAND_CTL_SETCLE(nandptr)
+/* #undef CONFIG_MTD_NAND_VERIFY_WRITE */
+#endif /* CONFIG_COMMANDS & CFG_CMD_NAND */
+
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
+#define CONFIG_CMDLINE_TAG
+
+#define CFG_HUSH_PARSER
+#define CFG_PROMPT_HUSH_PS2 "> "
+
+#define CONFIG_CMDLINE_EDITING
+
+#ifdef CONFIG_CMDLINE_EDITING
+#undef CONFIG_AUTO_COMPLETE
+#else
+#define CONFIG_AUTO_COMPLETE
+#endif
+
+#endif /* __CONFIG_H */
diff --git a/include/configs/sbc8260.h b/include/configs/sbc8260.h
index 180ce057d7..9cf0654be1 100644
--- a/include/configs/sbc8260.h
+++ b/include/configs/sbc8260.h
@@ -448,7 +448,6 @@
#ifdef CONFIG_ETHER_ON_FCC
# define CONFIG_COMMANDS (((CONFIG_CMD_DFL & ~(CFG_CMD_KGDB))) | \
CFG_CMD_ASKENV | \
- CFG_CMD_ECHO | \
CFG_CMD_ELF | \
CFG_CMD_I2C | \
CFG_CMD_IMMAP | \
@@ -459,7 +458,6 @@
#else
# define CONFIG_COMMANDS (((CONFIG_CMD_DFL & ~(CFG_CMD_KGDB))) | \
CFG_CMD_ASKENV | \
- CFG_CMD_ECHO | \
CFG_CMD_ELF | \
CFG_CMD_I2C | \
CFG_CMD_IMMAP | \
diff --git a/include/configs/smmaco4.h b/include/configs/smmaco4.h
new file mode 100644
index 0000000000..e106b3b574
--- /dev/null
+++ b/include/configs/smmaco4.h
@@ -0,0 +1,373 @@
+/*
+ * (C) Copyright 2003-2006
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * (C) Copyright 2004-2005
+ * Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * High Level Configuration Options
+ * (easy to change)
+ */
+
+#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */
+#define CONFIG_MPC5200 1 /* (more precisely an MPC5200 CPU) */
+#define CONFIG_TQM5200 1 /* ... on TQM5200 module */
+#undef CONFIG_TQM5200_REV100 /* define for revision 100 modules */
+
+#define CFG_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
+
+#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
+#define BOOTFLAG_WARM 0x02 /* Software reboot */
+
+#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
+#endif
+
+/*
+ * Serial console configuration
+ */
+#define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
+#define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
+#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
+
+/* Partitions */
+#define CONFIG_MAC_PARTITION
+#define CONFIG_DOS_PARTITION
+#define CONFIG_ISO_PARTITION
+
+/* POST support */
+#define CONFIG_POST (CFG_POST_MEMORY | \
+ CFG_POST_CPU | \
+ CFG_POST_I2C)
+
+#ifdef CONFIG_POST
+#define CFG_CMD_POST_DIAG CFG_CMD_DIAG
+/* preserve space for the post_word at end of on-chip SRAM */
+#define MPC5XXX_SRAM_POST_SIZE MPC5XXX_SRAM_SIZE-4
+#else
+#define CFG_CMD_POST_DIAG 0
+#endif
+
+/*
+ * Supported commands
+ */
+#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
+ CFG_CMD_ASKENV | \
+ CFG_CMD_DATE | \
+ CFG_CMD_DHCP | \
+ CFG_CMD_ECHO | \
+ CFG_CMD_EEPROM | \
+ CFG_CMD_I2C | \
+ CFG_CMD_JFFS2 | \
+ CFG_CMD_MII | \
+ CFG_CMD_NFS | \
+ CFG_CMD_PING | \
+ CFG_CMD_POST_DIAG | \
+ CFG_CMD_REGINFO | \
+ CFG_CMD_SNTP )
+
+/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
+#include <cmd_confdefs.h>
+
+#define CONFIG_TIMESTAMP /* display image timestamps */
+
+#if (TEXT_BASE == 0xFC000000) /* Boot low */
+# define CFG_LOWBOOT 1
+#endif
+
+/*
+ * Autobooting
+ */
+#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
+
+#define CONFIG_PREBOOT "echo;" \
+ "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
+ "echo"
+
+#undef CONFIG_BOOTARGS
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "netdev=eth0\0" \
+ "rootpath=/opt/eldk/ppc_6xx\0" \
+ "ramargs=setenv bootargs root=/dev/ram rw\0" \
+ "nfsargs=setenv bootargs root=/dev/nfs rw " \
+ "nfsroot=${serverip}:${rootpath}\0" \
+ "addip=setenv bootargs ${bootargs} " \
+ "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
+ ":${hostname}:${netdev}:off panic=1\0" \
+ "flash_self=run ramargs addip;" \
+ "bootm ${kernel_addr} ${ramdisk_addr}\0" \
+ "flash_nfs=run nfsargs addip;" \
+ "bootm ${kernel_addr}\0" \
+ "net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0" \
+ "bootfile=/tftpboot/smmaco4/uImage\0" \
+ "load=tftp 200000 ${u-boot}\0" \
+ "u-boot=/tftpboot/smmaco4/u-boot.bin\0" \
+ "update=protect off FC000000 FC05FFFF;" \
+ "erase FC000000 FC05FFFF;" \
+ "cp.b 200000 FC000000 ${filesize};" \
+ "protect on FC000000 FC05FFFF\0" \
+ ""
+
+#define CONFIG_BOOTCOMMAND "run net_nfs"
+
+/*
+ * IPB Bus clocking configuration.
+ */
+#define CFG_IPBSPEED_133 /* define for 133MHz speed */
+
+#if defined(CFG_IPBSPEED_133)
+/*
+ * PCI Bus clocking configuration
+ *
+ * Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if
+ * CFG_IPBSPEED_133 is defined. This is because a PCI Clock of 66 MHz yet hasn't
+ * been tested with a IPB Bus Clock of 66 MHz.
+ */
+#define CFG_PCISPEED_66 /* define for 66MHz speed */
+#endif
+
+/*
+ * I2C configuration
+ */
+#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
+#ifdef CONFIG_TQM5200_REV100
+#define CFG_I2C_MODULE 1 /* Select I2C module #1 for rev. 100 board */
+#else
+#define CFG_I2C_MODULE 2 /* Select I2C module #2 for all other revs */
+#endif
+
+/*
+ * I2C clock frequency
+ *
+ * Please notice, that the resulting clock frequency could differ from the
+ * configured value. This is because the I2C clock is derived from system
+ * clock over a frequency divider with only a few divider values. U-boot
+ * calculates the best approximation for CFG_I2C_SPEED. However the calculated
+ * approximation allways lies below the configured value, never above.
+ */
+#define CFG_I2C_SPEED 100000 /* 100 kHz */
+#define CFG_I2C_SLAVE 0x7F
+
+/*
+ * EEPROM configuration for onboard EEPROM M24C32 (M24C64 should work
+ * also). For other EEPROMs configuration should be verified. On Mini-FAP the
+ * EEPROM (24C64) is on the same I2C address (but on other I2C bus), so the
+ * same configuration could be used.
+ */
+#define CFG_I2C_EEPROM_ADDR 0x50 /* 1010000x */
+#define CFG_I2C_EEPROM_ADDR_LEN 2
+#define CFG_EEPROM_PAGE_WRITE_BITS 5 /* =32 Bytes per write */
+#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 20
+
+/*
+ * Flash configuration
+ */
+#define CFG_FLASH_BASE TEXT_BASE /* 0xFC000000 */
+
+/* use CFI flash driver if no module variant is spezified */
+#define CFG_FLASH_CFI 1 /* Flash is CFI conformant */
+#define CFG_FLASH_CFI_DRIVER 1 /* Use the common driver */
+#define CFG_FLASH_BANKS_LIST { CFG_BOOTCS_START }
+#define CFG_FLASH_EMPTY_INFO
+#define CFG_FLASH_SIZE 0x04000000 /* 64 MByte */
+#define CFG_MAX_FLASH_SECT 512 /* max num of sects on one chip */
+#undef CFG_FLASH_USE_BUFFER_WRITE /* not supported yet for AMD */
+
+#if !defined(CFG_LOWBOOT)
+#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x00760000 + 0x00800000)
+#else /* CFG_LOWBOOT */
+#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x00060000)
+#endif /* CFG_LOWBOOT */
+#define CFG_MAX_FLASH_BANKS 1 /* max num of flash banks
+ (= chip selects) */
+#define CFG_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
+#define CFG_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
+
+/* Dynamic MTD partition support */
+#define CONFIG_JFFS2_CMDLINE
+#define MTDIDS_DEFAULT "nor0=TQM5200-0"
+#define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:640k(firmware)," \
+ "1408k(kernel)," \
+ "2m(initrd)," \
+ "4m(small-fs)," \
+ "16m(big-fs)," \
+ "8m(misc)"
+
+/*
+ * Environment settings
+ */
+#define CFG_ENV_IS_IN_FLASH 1
+#define CFG_ENV_SIZE 0x10000
+#define CFG_ENV_SECT_SIZE 0x20000
+#define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR + CFG_ENV_SECT_SIZE)
+#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
+
+/*
+ * Memory map
+ */
+#define CFG_MBAR 0xF0000000
+#define CFG_SDRAM_BASE 0x00000000
+#define CFG_DEFAULT_MBAR 0x80000000
+
+/* Use ON-Chip SRAM until RAM will be available */
+#define CFG_INIT_RAM_ADDR MPC5XXX_SRAM
+#ifdef CONFIG_POST
+/* preserve space for the post_word at end of on-chip SRAM */
+#define CFG_INIT_RAM_END MPC5XXX_SRAM_POST_SIZE
+#else
+#define CFG_INIT_RAM_END MPC5XXX_SRAM_SIZE
+#endif
+
+
+#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
+#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
+#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
+
+#define CFG_MONITOR_BASE TEXT_BASE
+#if (CFG_MONITOR_BASE < CFG_FLASH_BASE)
+# define CFG_RAMBOOT 1
+#endif
+
+#define CFG_MONITOR_LEN (384 << 10) /* Reserve 384 kB for Monitor */
+#define CFG_MALLOC_LEN (256 << 10) /* Reserve 256 kB for malloc() */
+#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
+
+/*
+ * Ethernet configuration
+ */
+#define CONFIG_MPC5xxx_FEC 1
+/*
+ * Define CONFIG_FEC_10MBIT to force FEC at 10Mb
+ */
+/* #define CONFIG_FEC_10MBIT 1 */
+#define CONFIG_PHY_ADDR 0x00
+
+/*
+ * GPIO configuration
+ *
+ * use pin gpio_wkup_6 as second SDRAM chip select (mem_cs1):
+ * Bit 0 (mask: 0x80000000): 1
+ * use ALT CAN position: Bits 2-3 (mask: 0x30000000):
+ * 00 -> No Alternatives, CAN1/2 on PSC2 according to PSC2 setting.
+ * 01 -> CAN1 on I2C1, CAN2 on Tmr0/1.
+ * Use for REV200 STK52XX boards. Do not use with REV100 modules
+ * (because, there I2C1 is used as I2C bus)
+ * use PSC1 as UART: Bits 28-31 (mask: 0x00000007): 0100
+ * use PSC2 as CAN: Bits 25:27 (mask: 0x00000030)
+ * 000 -> All PSC2 pins are GIOPs
+ * 001 -> CAN1/2 on PSC2 pins
+ * Use for REV100 STK52xx boards
+ * use PSC6:
+ * on STK52xx:
+ * use as UART. Pins PSC6_0 to PSC6_3 are used.
+ * Bits 9:11 (mask: 0x00700000):
+ * 101 -> PSC6 : Extended POST test is not available
+ * on MINI-FAP and TQM5200_IB:
+ * use PSC6_0 to PSC6_3 as GPIO: Bits 9:11 (mask: 0x00700000):
+ * 000 -> PSC6 could not be used as UART, CODEC or IrDA
+ * GPIO on PSC6_3 is used in post_hotkeys_pressed() to enable extended POST
+ * tests.
+ */
+#if defined (CONFIG_MINIFAP)
+# define CFG_GPS_PORT_CONFIG 0x91000004
+#elif defined (CONFIG_STK52XX)
+# if defined (CONFIG_STK52XX_REV100)
+# define CFG_GPS_PORT_CONFIG 0x81500014
+# else /* STK52xx REV200 and above */
+# if defined (CONFIG_TQM5200_REV100)
+# error TQM5200 REV100 not supported on STK52XX REV200 or above
+# else/* TQM5200 REV200 and above */
+# define CFG_GPS_PORT_CONFIG 0x91500004
+# endif
+# endif
+#else /* TMQ5200 Inbetriebnahme-Board */
+# define CFG_GPS_PORT_CONFIG 0x81000004
+#endif
+
+/*
+ * RTC configuration
+ */
+#define CONFIG_RTC_MPC5200 1 /* use internal MPC5200 RTC */
+
+/*
+ * Miscellaneous configurable options
+ */
+#define CFG_LONGHELP /* undef to save memory */
+#define CFG_PROMPT "=> " /* Monitor Command Prompt */
+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
+#else
+#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
+#endif
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
+#define CFG_MAXARGS 16 /* max number of command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+
+/* Enable an alternate, more extensive memory test */
+#define CFG_ALT_MEMTEST
+
+#define CFG_MEMTEST_START 0x00100000 /* memtest works on */
+#define CFG_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
+
+#define CFG_LOAD_ADDR 0x100000 /* default load address */
+
+#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
+
+/*
+ * Enable loopw commando. This has only affect, if CFG_CMD_MEM is defined,
+ * which is normally part of the default commands (CFV_CMD_DFL)
+ */
+#define CONFIG_LOOPW
+
+/*
+ * Various low-level settings
+ */
+#if defined(CONFIG_MPC5200)
+#define CFG_HID0_INIT HID0_ICE | HID0_ICFI
+#define CFG_HID0_FINAL HID0_ICE
+#else
+#define CFG_HID0_INIT 0
+#define CFG_HID0_FINAL 0
+#endif
+
+#define CFG_BOOTCS_START CFG_FLASH_BASE
+#define CFG_BOOTCS_SIZE CFG_FLASH_SIZE
+#ifdef CFG_PCISPEED_66
+#define CFG_BOOTCS_CFG 0x0008DF30 /* for pci_clk = 66 MHz */
+#else
+#define CFG_BOOTCS_CFG 0x0004DF30 /* for pci_clk = 33 MHz */
+#endif
+#define CFG_CS0_START CFG_FLASH_BASE
+#define CFG_CS0_SIZE CFG_FLASH_SIZE
+
+#define CFG_CS_BURST 0x00000000
+#define CFG_CS_DEADCYCLE 0x33333311 /* 1 dead cycle for flash and SM501 */
+
+#define CFG_RESET_ADDRESS 0xff000000
+
+#endif /* __CONFIG_H */
diff --git a/include/configs/spc1920.h b/include/configs/spc1920.h
new file mode 100644
index 0000000000..9d3609a67d
--- /dev/null
+++ b/include/configs/spc1920.h
@@ -0,0 +1,362 @@
+/*
+ * (C) Copyright 2006
+ * Markus Klotzbuecher, DENX Software Engineering, mk@denx.de
+ *
+ * Configuation settings for the SPC1920 board.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __H
+#define __CONFIG_H
+
+#define CONFIG_SPC1920 1 /* SPC1920 board */
+#define CONFIG_MPC885 1 /* MPC885 CPU */
+
+#define CONFIG_8xx_CONS_SMC1 /* Console is on SMC1 */
+#undef CONFIG_8xx_CONS_SMC2
+#undef CONFIG_8xx_CONS_NONE
+
+#define CONFIG_MII
+/* #define MII_DEBUG */
+/* #define CONFIG_FEC_ENET */
+#undef CONFIG_ETHER_ON_FEC1
+#define CONFIG_ETHER_ON_FEC2
+#define FEC_ENET
+/* #define CONFIG_FEC2_PHY_NORXERR */
+/* #define CFG_DISCOVER_PHY */
+/* #define CONFIG_PHY_ADDR 0x1 */
+#define CONFIG_FEC2_PHY 1
+
+#define CONFIG_BAUDRATE 19200
+
+/* use PLD CLK4 instead of brg */
+#undef CFG_SPC1920_SMC1_CLK4
+
+#define CONFIG_8xx_OSCLK 10000000 /* 10 MHz oscillator on EXTCLK */
+#define CONFIG_8xx_CPUCLK_DEFAULT 50000000
+#define CFG_8xx_CPUCLK_MIN 40000000
+#define CFG_8xx_CPUCLK_MAX 133000000
+
+#define CFG_RESET_ADDRESS 0xf8000000
+
+#define CONFIG_BOARD_EARLY_INIT_F
+
+
+#if 1
+#define CONFIG_BOOTDELAY -1 /* autoboot disabled */
+#else
+#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
+#endif
+
+#define CONFIG_ENV_OVERWRITE
+
+#define CONFIG_NFSBOOTCOMMAND \
+ "dhcp;" \
+ "setenv bootargs root=/dev/nfs rw nfsroot=$rootpath " \
+ "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:eth0:off;" \
+ "bootm"
+
+#define CONFIG_BOOTCOMMAND \
+ "setenv bootargs root=/dev/mtdblock2 rw mtdparts=phys:1280K(ROM)ro,-(root) "\
+ "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:eth0:off;" \
+ "bootm fe080000"
+
+#undef CONFIG_BOOTARGS
+
+#undef CONFIG_WATCHDOG /* watchdog disabled */
+#define CONFIG_BZIP2 /* include support for bzip2 compressed images */
+
+#ifndef CONFIG_COMMANDS
+#define CONFIG_COMMANDS (CONFIG_CMD_DFL \
+ | CFG_CMD_ASKENV \
+ | CFG_CMD_ECHO \
+ | CFG_CMD_IMMAP \
+ | CFG_CMD_JFFS2 \
+ | CFG_CMD_PING \
+ | CFG_CMD_DHCP \
+ | CFG_CMD_IMMAP \
+ | CFG_CMD_MII)
+ /* & ~( CFG_CMD_NET)) */
+
+
+#endif /* !CONFIG_COMMANDS */
+
+/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
+#include <cmd_confdefs.h>
+
+/*
+ * Miscellaneous configurable options
+ */
+#define CFG_LONGHELP /* undef to save memory */
+#define CFG_PROMPT "=>" /* Monitor Command Prompt */
+#define CFG_HUSH_PARSER
+#define CFG_PROMPT_HUSH_PS2 "> "
+
+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
+#else
+#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
+#endif
+
+#define CFG_PBSIZE (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16) /* Print Buffer Size */
+#define CFG_MAXARGS 16 /* max number of command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+
+#define CFG_LOAD_ADDR 0x00100000
+
+#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
+
+#define CFG_BAUDRATE_TABLE { 2400, 4800, 9600, 19200 }
+
+/*
+ * Low Level Configuration Settings
+ * (address mappings, register initial values, etc.)
+ * You should know what you are doing if you make changes here.
+ */
+
+/*-----------------------------------------------------------------------
+ * Internal Memory Mapped Register
+ */
+#define CFG_IMMR 0xF0000000
+
+/*-----------------------------------------------------------------------
+ * Definitions for initial stack pointer and data area (in DPRAM)
+ */
+#define CFG_INIT_RAM_ADDR CFG_IMMR
+#define CFG_INIT_RAM_END 0x2F00 /* End of used area in DPRAM */
+#define CFG_GBL_DATA_SIZE 64 /* size in bytes reserved for initial data */
+#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
+#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
+
+/*-----------------------------------------------------------------------
+ * Start addresses for the final memory configuration
+ * (Set up by the startup code)
+ * Please note that CFG_SDRAM_BASE _must_ start at 0
+ */
+#define CFG_MEMTEST_START 0x0400000 /* memtest works on */
+#define CFG_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
+
+/*
+ * For booting Linux, the board info and command line data
+ * have to be in the first 8 MB of memory, since this is
+ * the maximum mapped by the Linux kernel during initialization.
+ */
+#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
+
+#define CFG_MONITOR_BASE TEXT_BASE
+#define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 KB for monitor */
+
+#ifdef CONFIG_BZIP2
+#define CFG_MALLOC_LEN (2500 << 10) /* Reserve ~2.5 MB for malloc() */
+#else
+#define CFG_MALLOC_LEN (384 << 10) /* Reserve 384 kB for malloc() */
+#endif /* CONFIG_BZIP2 */
+
+#define CFG_ALLOC_DPRAM 1 /* use allocation routines */
+
+/*
+ * Flash
+ */
+/*-----------------------------------------------------------------------
+ * Flash organisation
+ */
+#define CFG_FLASH_BASE 0xFE000000
+#define CFG_FLASH_CFI /* The flash is CFI compatible */
+#define CFG_FLASH_CFI_DRIVER /* Use common CFI driver */
+#define CFG_MAX_FLASH_BANKS 1 /* Max number of flash banks */
+#define CFG_MAX_FLASH_SECT 128 /* Max num of sects on one chip */
+
+/* Environment is in flash */
+#define CFG_ENV_IS_IN_FLASH
+#define CFG_ENV_SECT_SIZE 0x40000 /* We use one complete sector */
+#define CFG_ENV_ADDR (CFG_MONITOR_BASE + CFG_MONITOR_LEN)
+
+#define CONFIG_ENV_OVERWRITE
+
+/*-----------------------------------------------------------------------
+ * Cache Configuration
+ */
+#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
+#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
+
+/*-----------------------------------------------------------------------
+ * I2C configuration
+ */
+#if (CONFIG_COMMANDS & CFG_CMD_I2C)
+#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
+#define CFG_I2C_SPEED 400000 /* I2C speed and slave address defaults */
+#define CFG_I2C_SLAVE 0x7F
+#endif
+
+/*-----------------------------------------------------------------------
+ * SYPCR - System Protection Control 11-9
+ * SYPCR can only be written once after reset!
+ *-----------------------------------------------------------------------
+ * Software & Bus Monitor Timer max, Bus Monitor enable, SW Watchdog freeze
+ */
+#if defined(CONFIG_WATCHDOG)
+#define CFG_SYPCR (SYPCR_SWTC | SYPCR_BMT | SYPCR_BME | SYPCR_SWF | \
+ SYPCR_SWE | SYPCR_SWRI| SYPCR_SWP)
+#else
+#define CFG_SYPCR (SYPCR_SWTC | SYPCR_BMT | SYPCR_BME | SYPCR_SWF | SYPCR_SWP)
+#endif
+
+/*-----------------------------------------------------------------------
+ * SIUMCR - SIU Module Configuration 11-6
+ *-----------------------------------------------------------------------
+ * PCMCIA config., multi-function pin tri-state
+ */
+#define CFG_SIUMCR (SIUMCR_DBGC00 | SIUMCR_DBPC00 | SIUMCR_MLRC01)
+
+/*-----------------------------------------------------------------------
+ * TBSCR - Time Base Status and Control 11-26
+ *-----------------------------------------------------------------------
+ * Clear Reference Interrupt Status, Timebase freezing enabled
+ */
+#define CFG_TBSCR (TBSCR_REFA | TBSCR_REFB | TBSCR_TBE)
+
+/*-----------------------------------------------------------------------
+ * PISCR - Periodic Interrupt Status and Control 11-31
+ *-----------------------------------------------------------------------
+ * Clear Periodic Interrupt Status, Interrupt Timer freezing enabled
+ */
+#define CFG_PISCR (PISCR_PS | PISCR_PITF)
+
+/*-----------------------------------------------------------------------
+ * SCCR - System Clock and reset Control Register 15-27
+ *-----------------------------------------------------------------------
+ * Set clock output, timebase and RTC source and divider,
+ * power management and some other internal clocks
+ */
+#define SCCR_MASK SCCR_EBDF11
+/* #define CFG_SCCR SCCR_TBS */
+#define CFG_SCCR (SCCR_COM00 | SCCR_DFSYNC00 | SCCR_DFBRG00 | \
+ SCCR_DFNL000 | SCCR_DFNH000 | SCCR_DFLCD000 | \
+ SCCR_DFALCD00)
+
+/*-----------------------------------------------------------------------
+ * DER - Debug Enable Register
+ *-----------------------------------------------------------------------
+ * Set to zero to prevent the processor from entering debug mode
+ */
+#define CFG_DER 0
+
+
+/* Because of the way the 860 starts up and assigns CS0 the entire
+ * address space, we have to set the memory controller differently.
+ * Normally, you write the option register first, and then enable the
+ * chip select by writing the base register. For CS0, you must write
+ * the base register first, followed by the option register.
+ */
+
+
+/*
+ * Init Memory Controller:
+ */
+
+/* BR0 and OR0 (FLASH) */
+#define FLASH_BASE0_PRELIM CFG_FLASH_BASE /* FLASH bank #0 */
+
+
+/* used to re-map FLASH both when starting from SRAM or FLASH:
+ * restrict access enough to keep SRAM working (if any)
+ * but not too much to meddle with FLASH accesses
+ */
+#define CFG_REMAP_OR_AM 0x80000000 /* OR addr mask */
+#define CFG_PRELIM_OR_AM 0xE0000000 /* OR addr mask */
+
+/*
+ * FLASH timing:
+ */
+#define CFG_OR_TIMING_FLASH (OR_ACS_DIV1 | OR_TRLX | OR_CSNT_SAM | \
+ OR_SCY_3_CLK | OR_EHTR | OR_BI)
+
+#define CFG_OR0_REMAP (CFG_REMAP_OR_AM | CFG_OR_TIMING_FLASH)
+#define CFG_OR0_PRELIM (CFG_PRELIM_OR_AM | CFG_OR_TIMING_FLASH)
+#define CFG_BR0_PRELIM ((FLASH_BASE0_PRELIM & BR_BA_MSK) | BR_V )
+
+
+/*
+ * SDRAM CS1 UPMB
+ */
+#define CFG_SDRAM_BASE 0x00000000
+#define CFG_SDRAM_BASE_PRELIM CFG_SDRAM_BASE
+#define SDRAM_MAX_SIZE 0x4000000 /* max 64 MB */
+
+#define CFG_PRELIM_OR1_AM 0xF0000000
+/* #define CFG_OR1_TIMING OR_CSNT_SAM/\* | OR_G5LS /\\* *\\/ *\/ */
+#define SDRAM_TIMING OR_SCY_0_CLK /* SDRAM-Timing */
+
+#define CFG_OR1_PRELIM (CFG_PRELIM_OR1_AM | OR_CSNT_SAM | OR_G5LS | SDRAM_TIMING)
+#define CFG_BR1_PRELIM ((CFG_SDRAM_BASE_PRELIM & BR_BA_MSK) | BR_MS_UPMB | BR_V)
+
+/* #define CFG_OR1_FINAL ((CFG_OR1_AM & OR_AM_MSK) | CFG_OR1_TIMING) */
+/* #define CFG_BR1_FINAL ((CFG_SDRAM_BASE & BR_BA_MSK) | BR_MS_UPMB | BR_V) */
+
+#define CFG_PTB_PER_CLK ((4096 * 16 * 1000) / (4 * 64))
+#define CFG_PTA_PER_CLK 195
+#define CFG_MBMR_PTB 195
+#define CFG_MPTPR MPTPR_PTP_DIV16
+#define CFG_MAR 0x88
+
+#define CFG_MBMR_8COL ((CFG_MBMR_PTB << MBMR_PTB_SHIFT) | \
+ MBMR_AMB_TYPE_0 | \
+ MBMR_G0CLB_A10 | \
+ MBMR_DSB_1_CYCL | \
+ MBMR_RLFB_1X | \
+ MBMR_WLFB_1X | \
+ MBMR_TLFB_4X) /* 0x04804114 */ /* 0x10802114 */
+
+#define CFG_MBMR_9COL ((CFG_MBMR_PTB << MBMR_PTB_SHIFT) | \
+ MBMR_AMB_TYPE_1 | \
+ MBMR_G0CLB_A10 | \
+ MBMR_DSB_1_CYCL | \
+ MBMR_RLFB_1X | \
+ MBMR_WLFB_1X | \
+ MBMR_TLFB_4X) /* 0x04804114 */ /* 0x10802114 */
+
+
+/* PLD CS5 */
+#define CFG_SPC1920_PLD_BASE 0x80000000
+#define CFG_PRELIM_OR5_AM 0xffff8000
+
+#define CFG_OR5_PRELIM (CFG_PRELIM_OR5_AM | \
+ OR_CSNT_SAM | \
+ OR_ACS_DIV1 | \
+ OR_BI | \
+ OR_SCY_0_CLK | \
+ OR_TRLX)
+
+#define CFG_BR5_PRELIM ((CFG_SPC1920_PLD_BASE & BR_BA_MSK) | BR_PS_8 | BR_V);
+
+/* #define CFG_PLD_BASE 0x30000000 */
+/* #define CFG_OR5_PRELIM 0xffff1110 */
+/* #define CFG_BR5_PRELIM 0x30000401 */
+
+/*
+ * Internal Definitions
+ *
+ * Boot Flags
+ */
+#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
+#define BOOTFLAG_WARM 0x02 /* Software reboot */
+
+/* Machine type
+*/
+#define _MACH_8xx (_MACH_fads)
+
+#endif /* __CONFIG_H */
diff --git a/include/configs/spieval.h b/include/configs/spieval.h
index 96cb6e4c7a..f40dde2ac8 100644
--- a/include/configs/spieval.h
+++ b/include/configs/spieval.h
@@ -191,16 +191,6 @@
#undef CONFIG_BOOTARGS
-#if defined (CONFIG_TQM5200_AA)
-# define CONFIG_U_BOOT_SUFFIX "-AA\0"
-#elif defined (CONFIG_TQM5200_AB)
-# define CONFIG_U_BOOT_SUFFIX "-AB\0"
-#elif defined (CONFIG_TQM5200_AC)
-# define CONFIG_U_BOOT_SUFFIX "-AC\0"
-#else
-# define CONFIG_U_BOOT_SUFFIX "\0"
-#endif
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
"rootpath=/opt/eldk/ppc_6xx\0" \
@@ -217,7 +207,7 @@
"net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0" \
"bootfile=/tftpboot/tqm5200/uImage\0" \
"load=tftp 200000 ${u-boot}\0" \
- "u-boot=/tftpboot/tqm5200/u-boot.bin" CONFIG_U_BOOT_SUFFIX \
+ "u-boot=/tftpboot/tqm5200/u-boot.bin\0" \
"update=protect off FC000000 FC05FFFF;" \
"erase FC000000 FC05FFFF;" \
"cp.b 200000 FC000000 ${filesize};" \
@@ -283,13 +273,6 @@
#endif
/* List of I2C addresses to be verified by POST */
-#if defined (CONFIG_TQM5200_AA) || defined (CONFIG_TQM5200_AB)
-#define I2C_ADDR_LIST { CFG_I2C_EEPROM_ADDR, \
- CFG_I2C_SLAVE }
-#elif defined (CONFIG_TQM5200_AC)
-#define I2C_ADDR_LIST { CFG_I2C_SLAVE }
-#endif
-
#if defined (CONFIG_MINIFAP)
#undef I2C_ADDR_LIST
#define I2C_ADDR_LIST { CFG_I2C_EEPROM_ADDR, \
@@ -469,37 +452,25 @@
#define CFG_CS0_START CFG_FLASH_BASE
#define CFG_CS0_SIZE CFG_FLASH_SIZE
-/* automatic configuration of chip selects */
-#ifdef CONFIG_CS_AUTOCONF
#define CONFIG_LAST_STAGE_INIT
-#endif
/*
* SRAM - Do not map below 2 GB in address space, because this area is used
* for SDRAM autosizing.
*/
-#if defined CONFIG_TQM5200_AB || defined (CONFIG_CS_AUTOCONF)
#define CFG_CS2_START 0xE5000000
-#ifdef CONFIG_TQM5200_AB
-#define CFG_CS2_SIZE 0x80000 /* 512 kByte */
-#else /* CONFIG_CS_AUTOCONF */
#define CFG_CS2_SIZE 0x100000 /* 1 MByte */
-#endif
#define CFG_CS2_CFG 0x0004D930
-#endif
/*
* Grafic controller - Do not map below 2 GB in address space, because this
* area is used for SDRAM autosizing.
*/
-#if defined (CONFIG_TQM5200_AB) || defined (CONFIG_TQM5200_AC) || \
- defined (CONFIG_CS_AUTOCONF)
#define SM501_FB_BASE 0xE0000000
#define CFG_CS1_START (SM501_FB_BASE)
#define CFG_CS1_SIZE 0x4000000 /* 64 MByte */
#define CFG_CS1_CFG 0x8F48FF70
#define SM501_MMIO_BASE CFG_CS1_START + 0x03E00000
-#endif
#define CFG_CS_BURST 0x00000000
#define CFG_CS_DEADCYCLE 0x33333311 /* 1 dead cycle for flash and SM501 */
diff --git a/include/configs/stamp.h b/include/configs/stamp.h
new file mode 100644
index 0000000000..248ca70de0
--- /dev/null
+++ b/include/configs/stamp.h
@@ -0,0 +1,333 @@
+/*
+ * U-boot - stamp.h Configuration file for STAMP board
+ * having BF533 processor
+ *
+ * Copyright (c) 2005 blackfin.uclinux.org
+ *
+ * (C) Copyright 2000-2004
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_STAMP_H__
+#define __CONFIG_STAMP_H__
+
+/*
+ * Board settings
+ *
+ */
+
+#define __ADSPLPBLACKFIN__ 1
+#define __ADSPBF533__ 1
+#define CONFIG_STAMP 1
+#define CONFIG_RTC_BF533 1
+
+/* FLASH/ETHERNET uses the same address range */
+#define SHARED_RESOURCES 1
+
+#define CONFIG_VDSP 1
+
+/*
+ * Clock settings
+ *
+ */
+
+/* CONFIG_CLKIN_HZ is any value in Hz */
+#define CONFIG_CLKIN_HZ 11059200
+/* CONFIG_CLKIN_HALF controls what is passed to PLL 0=CLKIN */
+/* 1=CLKIN/2 */
+#define CONFIG_CLKIN_HALF 0
+/* CONFIG_PLL_BYPASS controls if the PLL is used 0=don't bypass */
+/* 1=bypass PLL */
+#define CONFIG_PLL_BYPASS 0
+/* CONFIG_VCO_MULT controls what the multiplier of the PLL is. */
+/* Values can range from 1-64 */
+#define CONFIG_VCO_MULT 45
+/* CONFIG_CCLK_DIV controls what the core clock divider is */
+/* Values can be 1, 2, 4, or 8 ONLY */
+#define CONFIG_CCLK_DIV 1
+/* CONFIG_SCLK_DIV controls what the peripheral clock divider is */
+/* Values can range from 1-15 */
+#define CONFIG_SCLK_DIV 6
+
+/*
+ * Network Settings
+ */
+/* network support */
+#define CONFIG_IPADDR 192.168.0.15
+#define CONFIG_NETMASK 255.255.255.0
+#define CONFIG_GATEWAYIP 192.168.0.1
+#define CONFIG_SERVERIP 192.168.0.2
+#define CONFIG_HOSTNAME STAMP
+#define CONFIG_ROOTPATH /checkout/uClinux-dist/romfs
+
+/* To remove hardcoding and enable MAC storage in EEPROM */
+/* #define CONFIG_ETHADDR 02:80:ad:20:31:b8 */
+
+/*
+ * Command settings
+ *
+ */
+
+#define CFG_LONGHELP 1
+
+#define CONFIG_BOOTDELAY 5
+#define CONFIG_BOOT_RETRY_TIME -1 /* Enable this if bootretry required, currently its disabled */
+#define CONFIG_BOOTCOMMAND "run ramboot"
+#define CONFIG_AUTOBOOT_PROMPT "autoboot in %d seconds\n"
+
+#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
+ CFG_CMD_PING | \
+ CFG_CMD_ELF | \
+ CFG_CMD_I2C | \
+ CFG_CMD_CACHE | \
+ CFG_CMD_JFFS2 | \
+ CFG_CMD_DATE)
+#define CONFIG_BOOTARGS "root=/dev/mtdblock0 rw"
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "ramargs=setenv bootargs root=/dev/mtdblock0 rw\0" \
+ "nfsargs=setenv bootargs root=/dev/nfs rw " \
+ "nfsroot=$(serverip):$(rootpath)\0" \
+ "addip=setenv bootargs $(bootargs) " \
+ "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask)" \
+ ":$(hostname):eth0:off\0" \
+ "ramboot=tftpboot 0x1000000 linux;" \
+ "run ramargs;run addip;bootelf\0" \
+ "nfsboot=tftpboot 0x1000000 linux;" \
+ "run nfsargs;run addip;bootelf\0" \
+ "flashboot=bootm 0x20100000\0" \
+ ""
+
+/* This must be included AFTER the definition of CONFIG_COMMANDS (if any) */
+#include <cmd_confdefs.h>
+
+/*
+ * Console settings
+ *
+ */
+
+#define CONFIG_BAUDRATE 57600
+#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
+
+#define CFG_PROMPT "stamp>" /* Monitor Command Prompt */
+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
+#else
+#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
+#endif
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
+#define CFG_MAXARGS 16 /* max number of command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+
+#define CONFIG_LOADS_ECHO 1
+
+/*
+ * Network settings
+ *
+ */
+
+#define CONFIG_DRIVER_SMC91111 1
+#define CONFIG_SMC91111_BASE 0x20300300
+/* To remove hardcoding and enable MAC storage in EEPROM */
+/* #define HARDCODE_MAC 1 */
+
+/*
+ * Flash settings
+ *
+ */
+
+#define CFG_FLASH_CFI /* The flash is CFI compatible */
+#define CFG_FLASH_CFI_DRIVER /* Use common CFI driver */
+#define CFG_FLASH_CFI_AMD_RESET
+
+#define CFG_ENV_IS_IN_FLASH 1
+
+#define CFG_FLASH_BASE 0x20000000
+#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
+#define CFG_MAX_FLASH_SECT 67 /* max number of sectors on one chip */
+
+#define CFG_ENV_ADDR 0x20020000
+#define CFG_ENV_SIZE 0x10000
+#define CFG_ENV_SECT_SIZE 0x10000 /* Total Size of Environment Sector */
+
+#define CFG_FLASH_ERASE_TOUT 30000 /* Timeout for Chip Erase (in ms) */
+#define CFG_FLASH_ERASEBLOCK_TOUT 5000 /* Timeout for Block Erase (in ms) */
+#define CFG_FLASH_WRITE_TOUT 1 /* Timeout for Flash Write (in ms) */
+
+/* JFFS Partition offset set */
+#define CFG_JFFS2_FIRST_BANK 0
+#define CFG_JFFS2_NUM_BANKS 1
+/* 512k reserved for u-boot */
+#define CFG_JFFS2_FIRST_SECTOR 11
+
+/*
+ * following timeouts shall be used once the
+ * Flash real protection is enabled
+ */
+#define CFG_FLASH_LOCK_TOUT 5 /* Timeout for Flash Set Lock Bit (in ms) */
+#define CFG_FLASH_UNLOCK_TOUT 10000 /* Timeout for Flash Clear Lock Bits (in ms) */
+
+/*
+ * I2C settings
+ * By default PF2 is used as SDA and PF3 as SCL on the Stamp board
+ */
+#define CONFIG_SOFT_I2C 1 /* I2C bit-banged */
+/*
+ * Software (bit-bang) I2C driver configuration
+ */
+#define PF_SCL PF3
+#define PF_SDA PF2
+
+#define I2C_INIT (*pFIO_DIR |= PF_SCL); asm("ssync;")
+#define I2C_ACTIVE (*pFIO_DIR |= PF_SDA); *pFIO_INEN &= ~PF_SDA; asm("ssync;")
+#define I2C_TRISTATE (*pFIO_DIR &= ~PF_SDA); *pFIO_INEN |= PF_SDA; asm("ssync;")
+#define I2C_READ ((volatile)(*pFIO_FLAG_D & PF_SDA) != 0); asm("ssync;")
+#define I2C_SDA(bit) if(bit) { \
+ *pFIO_FLAG_S = PF_SDA; \
+ asm("ssync;"); \
+ } \
+ else { \
+ *pFIO_FLAG_C = PF_SDA; \
+ asm("ssync;"); \
+ }
+#define I2C_SCL(bit) if(bit) { \
+ *pFIO_FLAG_S = PF_SCL; \
+ asm("ssync;"); \
+ } \
+ else { \
+ *pFIO_FLAG_C = PF_SCL; \
+ asm("ssync;"); \
+ }
+#define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */
+
+#define CFG_I2C_SPEED 50000
+#define CFG_I2C_SLAVE 0xFE
+
+/*
+ * Compact Flash settings
+ */
+
+/* Enabled below option for CF support */
+/* #define CONFIG_STAMP_CF 1 */
+
+#if defined(CONFIG_STAMP_CF) && (CONFIG_COMMANDS & CFG_CMD_IDE)
+
+#define CONFIG_MISC_INIT_R 1
+#define CONFIG_DOS_PARTITION 1
+
+/*
+ * IDE/ATA stuff
+ */
+#undef CONFIG_IDE_8xx_DIRECT /* no pcmcia interface required */
+#undef CONFIG_IDE_LED /* no led for ide supported */
+#undef CONFIG_IDE_RESET /* no reset for ide supported */
+
+#define CFG_IDE_MAXBUS 1 /* max. 1 IDE busses */
+#define CFG_IDE_MAXDEVICE (CFG_IDE_MAXBUS*1) /* max. 1 drives per IDE bus */
+
+#define CFG_ATA_BASE_ADDR 0x20200000
+#define CFG_ATA_IDE0_OFFSET 0x0000
+
+#define CFG_ATA_DATA_OFFSET 0x0020 /* Offset for data I/O */
+#define CFG_ATA_REG_OFFSET 0x0020 /* Offset for normal register accesses */
+#define CFG_ATA_ALT_OFFSET 0x0007 /* Offset for alternate registers */
+
+#define CFG_ATA_STRIDE 2
+#endif
+
+/*
+ * SDRAM settings
+ *
+ */
+
+#define CONFIG_MEM_SIZE 128 /* 128, 64, 32, 16 */
+#define CONFIG_MEM_ADD_WDTH 11 /* 8, 9, 10, 11 */
+#define CONFIG_MEM_MT48LC64M4A2FB_7E 1
+
+#define CFG_MEMTEST_START 0x00100000 /* memtest works on */
+#define CFG_MEMTEST_END 0x07EFFFFF /* 1 ... 127 MB in DRAM */
+#define CFG_LOAD_ADDR 0x01000000 /* default load address */
+
+#define CFG_SDRAM_BASE 0x00000000
+#define CFG_MAX_RAM_SIZE 0x08000000
+
+#define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
+#define CFG_MONITOR_BASE (CFG_MAX_RAM_SIZE - CFG_MONITOR_LEN)
+
+#if ( CONFIG_CLKIN_HALF == 0 )
+#define CONFIG_VCO_HZ ( CONFIG_CLKIN_HZ * CONFIG_VCO_MULT )
+#else
+#define CONFIG_VCO_HZ (( CONFIG_CLKIN_HZ * CONFIG_VCO_MULT ) / 2 )
+#endif
+
+#if (CONFIG_PLL_BYPASS == 0)
+#define CONFIG_CCLK_HZ ( CONFIG_VCO_HZ / CONFIG_CCLK_DIV )
+#define CONFIG_SCLK_HZ ( CONFIG_VCO_HZ / CONFIG_SCLK_DIV )
+#else
+#define CONFIG_CCLK_HZ CONFIG_CLKIN_HZ
+#define CONFIG_SCLK_HZ CONFIG_CLKIN_HZ
+#endif
+
+/*
+ * Miscellaneous configurable options
+ */
+#define CFG_HZ 1000 /* 1ms time tick */
+
+#define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
+#define CFG_MALLOC_BASE (CFG_MONITOR_BASE - CFG_MALLOC_LEN)
+#define CFG_GBL_DATA_SIZE 0x4000
+#define CFG_GBL_DATA_ADDR (CFG_MALLOC_BASE - CFG_GBL_DATA_SIZE)
+#define CONFIG_STACKBASE (CFG_GBL_DATA_ADDR - 4)
+
+#define CFG_LARGE_IMAGE_LEN 0x4000000 /* Large Image Length, set to 64 Meg */
+
+#define CONFIG_SHOW_BOOT_PROGRESS 1 /* Show boot progress on LEDs */
+
+/*
+ * Stack sizes
+ */
+#define CONFIG_STACKSIZE (128*1024) /* regular stack */
+
+/*
+ * FLASH organization and environment definitions
+ */
+#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
+
+/* 0xFF, 0xBBC3BBc3, 0x99B39983 */
+/*#define AMGCTLVAL (AMBEN_P0 | AMBEN_P1 | AMBEN_P2 | AMCKEN)
+#define AMBCTL0VAL (B1WAT_11 | B1RAT_11 | B1HT_3 | B1ST_4 | B1TT_4 | B1RDYPOL | \
+ B1RDYEN | B0WAT_11 | B0RAT_11 | B0HT_3 | B0ST_4 | B0TT_4 | B0RDYPOL | B0RDYEN)
+#define AMBCTL1VAL (B3WAT_9 | B3RAT_9 | B3HT_2 | B3ST_3 | B3TT_4 | B3RDYPOL | \
+ B3RDYEN | B2WAT_9 | B2RAT_9 | B2HT_2 | B2ST_4 | B2TT_4 | B2RDYPOL | B2RDYEN)
+*/
+#define AMGCTLVAL 0xFF
+#define AMBCTL0VAL 0xBBC3BBC3
+#define AMBCTL1VAL 0x99B39983
+#define CF_AMBCTL1VAL 0x99B3ffc2
+
+#ifdef CONFIG_VDSP
+#define ET_EXEC_VDSP 0x8
+#define SHT_STRTAB_VDSP 0x1
+#define ELFSHDRSIZE_VDSP 0x2C
+#define VDSP_ENTRY_ADDR 0xFFA00000
+#endif
+
+#endif
diff --git a/include/configs/stxxtc.h b/include/configs/stxxtc.h
index 3ffe6b2e05..614a046105 100644
--- a/include/configs/stxxtc.h
+++ b/include/configs/stxxtc.h
@@ -436,6 +436,7 @@
/****************************************************************/
/* NAND */
+#define CFG_NAND_LEGACY
#define CFG_NAND_BASE NAND_BASE
#define CONFIG_MTD_NAND_ECC_JFFS2
#define CONFIG_MTD_NAND_VERIFY_WRITE
@@ -584,5 +585,7 @@ typedef unsigned int led_id_t;
#define OF_CPU "PowerPC,MPC870@0"
#define OF_TBCLK (MPC8XX_HZ / 16)
+#define CONFIG_OF_HAS_BD_T 1
+#define CONFIG_OF_HAS_UBOOT_ENV 1
#endif /* __CONFIG_H */
diff --git a/include/configs/svm_sc8xx.h b/include/configs/svm_sc8xx.h
index 7118f3f74b..92ee8cb333 100644
--- a/include/configs/svm_sc8xx.h
+++ b/include/configs/svm_sc8xx.h
@@ -141,6 +141,7 @@
/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
#include <cmd_confdefs.h>
+#define CFG_NAND_LEGACY
/*
* Miscellaneous configurable options
diff --git a/include/configs/trab.h b/include/configs/trab.h
index 85ee756e05..a2dc8e7bff 100644
--- a/include/configs/trab.h
+++ b/include/configs/trab.h
@@ -160,7 +160,6 @@
CFG_CMD_DATE | \
CFG_CMD_DHCP | \
CFG_CMD_FAT | \
- CFG_CMD_JFFS2 | \
CFG_CMD_NFS | \
CFG_CMD_SNTP | \
CFG_CMD_USB )
@@ -174,7 +173,6 @@
CFG_CMD_DATE | \
CFG_CMD_DHCP | \
CFG_CMD_FAT | \
- CFG_CMD_JFFS2 | \
CFG_CMD_NFS | \
CFG_CMD_SNTP | \
CFG_CMD_USB )
@@ -384,10 +382,10 @@
#define MTDIDS_DEFAULT "nor0=0"
/* production flash layout */
-#define MTDPARTS_DEFAULT "mtdparts=0:32k(Firmware1)ro," \
+#define MTDPARTS_DEFAULT "mtdparts=0:16k(Firmware1)ro," \
"16k(Env1)," \
"16k(Env2)," \
- "320k(Firmware2)ro," \
+ "336k(Firmware2)ro," \
"896k(Kernel)," \
"5376k(Root-FS)," \
"1408k(JFFS2)," \
@@ -404,7 +402,7 @@
#endif
/* timeout values are in ticks */
-#define CFG_FLASH_ERASE_TOUT (2*CFG_HZ) /* Timeout for Flash Erase */
+#define CFG_FLASH_ERASE_TOUT (15*CFG_HZ) /* Timeout for Flash Erase */
#define CFG_FLASH_WRITE_TOUT (2*CFG_HZ) /* Timeout for Flash Write */
#define CFG_ENV_IS_IN_FLASH 1
diff --git a/include/configs/utx8245.h b/include/configs/utx8245.h
index d312b6559a..e5d4397d2c 100644
--- a/include/configs/utx8245.h
+++ b/include/configs/utx8245.h
@@ -91,7 +91,6 @@ protect on ${u-boot_startaddr} ${u-boot_endaddr}"
| CFG_CMD_ENV | CFG_CMD_CONSOLE \
| CFG_CMD_LOADS | CFG_CMD_LOADB \
| CFG_CMD_IMI | CFG_CMD_CACHE \
- | CFG_CMD_RUN | CFG_CMD_ECHO \
| CFG_CMD_REGINFO | CFG_CMD_NET\
| CFG_CMD_DHCP | CFG_CMD_I2C \
| CFG_CMD_DATE)
diff --git a/include/configs/virtlab2.h b/include/configs/virtlab2.h
new file mode 100644
index 0000000000..06d8536ec3
--- /dev/null
+++ b/include/configs/virtlab2.h
@@ -0,0 +1,461 @@
+/*
+ * (C) Copyright 2006
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * board/config.h - configuration options, board specific
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * High Level Configuration Options
+ * (easy to change)
+ */
+
+#define CONFIG_MPC823 1 /* This is a MPC823 CPU */
+#define CONFIG_VIRTLAB2 1 /* ...on a virtlab2 module */
+#define CONFIG_TQM8xxL 1
+
+#ifdef CONFIG_LCD /* with LCD controller ? */
+#define CONFIG_SPLASH_SCREEN /* ... with splashscreen support*/
+#endif
+
+#define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */
+#undef CONFIG_8xx_CONS_SMC2
+#undef CONFIG_8xx_CONS_NONE
+#define CONFIG_BAUDRATE 115200 /* console baudrate = 115kbps */
+
+#define CONFIG_BOOTCOUNT_LIMIT
+
+#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
+
+#define CONFIG_BOARD_TYPES 1 /* support board types */
+
+#define CONFIG_PREBOOT "echo;echo Type \"run flash_nfs\" to mount root filesystem over NFS;echo"
+
+#undef CONFIG_BOOTARGS
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "netdev=eth0\0" \
+ "nfsargs=setenv bootargs root=/dev/nfs rw " \
+ "nfsroot=${serverip}:${rootpath}\0" \
+ "ramargs=setenv bootargs root=/dev/ram rw\0" \
+ "addip=setenv bootargs ${bootargs} " \
+ "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
+ ":${hostname}:${netdev}:off panic=1\0" \
+ "flash_nfs=run nfsargs addip;" \
+ "bootm ${kernel_addr}\0" \
+ "flash_self=run ramargs addip;" \
+ "bootm ${kernel_addr} ${ramdisk_addr}\0" \
+ "net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0" \
+ "rootpath=/opt/eldk/ppc_8xx\0" \
+ "bootfile=/tftpboot/TQM823L/uImage\0" \
+ "kernel_addr=40040000\0" \
+ "ramdisk_addr=40100000\0" \
+ ""
+#define CONFIG_BOOTCOMMAND "run flash_self"
+
+#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
+#undef CFG_LOADS_BAUD_CHANGE /* don't allow baudrate change */
+
+#undef CONFIG_WATCHDOG /* watchdog disabled */
+
+#if defined(CONFIG_LCD)
+# undef CONFIG_STATUS_LED /* disturbs display */
+#else
+# define CONFIG_STATUS_LED 1 /* Status LED enabled */
+#endif /* CONFIG_LCD */
+
+#undef CONFIG_CAN_DRIVER /* CAN Driver support disabled */
+
+#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
+
+#define CONFIG_MAC_PARTITION
+#define CONFIG_DOS_PARTITION
+
+#define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */
+
+#ifdef CONFIG_SPLASH_SCREEN
+# define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
+ CFG_CMD_ASKENV | \
+ CFG_CMD_BMP | \
+ CFG_CMD_DATE | \
+ CFG_CMD_DHCP | \
+ CFG_CMD_IDE | \
+ CFG_CMD_NFS | \
+ CFG_CMD_SNTP )
+#else
+# define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
+ CFG_CMD_ASKENV | \
+ CFG_CMD_DATE | \
+ CFG_CMD_DHCP | \
+ CFG_CMD_IDE | \
+ CFG_CMD_NFS | \
+ CFG_CMD_SNTP )
+#endif
+
+/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
+#include <cmd_confdefs.h>
+
+/*
+ * Miscellaneous configurable options
+ */
+#define CFG_LONGHELP /* undef to save memory */
+#define CFG_PROMPT "=> " /* Monitor Command Prompt */
+
+#if 0
+#define CFG_HUSH_PARSER 1 /* use "hush" command parser */
+#endif
+#ifdef CFG_HUSH_PARSER
+#define CFG_PROMPT_HUSH_PS2 "> "
+#endif
+
+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
+#else
+#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
+#endif
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
+#define CFG_MAXARGS 16 /* max number of command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+
+#define CFG_MEMTEST_START 0x0400000 /* memtest works on */
+#define CFG_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
+
+#define CFG_LOAD_ADDR 0x100000 /* default load address */
+
+#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
+
+#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
+
+/*
+ * Low Level Configuration Settings
+ * (address mappings, register initial values, etc.)
+ * You should know what you are doing if you make changes here.
+ */
+/*-----------------------------------------------------------------------
+ * Internal Memory Mapped Register
+ */
+#define CFG_IMMR 0xFFF00000
+
+/*-----------------------------------------------------------------------
+ * Definitions for initial stack pointer and data area (in DPRAM)
+ */
+#define CFG_INIT_RAM_ADDR CFG_IMMR
+#define CFG_INIT_RAM_END 0x2F00 /* End of used area in DPRAM */
+#define CFG_GBL_DATA_SIZE 64 /* size in bytes reserved for initial data */
+#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
+#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
+
+/*-----------------------------------------------------------------------
+ * Start addresses for the final memory configuration
+ * (Set up by the startup code)
+ * Please note that CFG_SDRAM_BASE _must_ start at 0
+ */
+#define CFG_SDRAM_BASE 0x00000000
+#define CFG_FLASH_BASE 0x40000000
+#define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
+#define CFG_MONITOR_BASE CFG_FLASH_BASE
+#define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
+
+/*
+ * For booting Linux, the board info and command line data
+ * have to be in the first 8 MB of memory, since this is
+ * the maximum mapped by the Linux kernel during initialization.
+ */
+#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
+
+/*-----------------------------------------------------------------------
+ * FLASH organization
+ */
+#define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */
+#define CFG_MAX_FLASH_SECT 71 /* max number of sectors on one chip */
+
+#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
+#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
+
+#define CFG_ENV_IS_IN_FLASH 1
+#define CFG_ENV_OFFSET 0x8000 /* Offset of Environment Sector */
+#define CFG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */
+
+/* Address and size of Redundant Environment Sector */
+#define CFG_ENV_OFFSET_REDUND (CFG_ENV_OFFSET+CFG_ENV_SIZE)
+#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
+
+/*-----------------------------------------------------------------------
+ * Hardware Information Block
+ */
+#define CFG_HWINFO_OFFSET 0x0003FFC0 /* offset of HW Info block */
+#define CFG_HWINFO_SIZE 0x00000040 /* size of HW Info block */
+#define CFG_HWINFO_MAGIC 0x54514D38 /* 'TQM8' */
+
+/*-----------------------------------------------------------------------
+ * Cache Configuration
+ */
+#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
+#endif
+
+/*-----------------------------------------------------------------------
+ * SYPCR - System Protection Control 11-9
+ * SYPCR can only be written once after reset!
+ *-----------------------------------------------------------------------
+ * Software & Bus Monitor Timer max, Bus Monitor enable, SW Watchdog freeze
+ */
+#if defined(CONFIG_WATCHDOG)
+#define CFG_SYPCR (SYPCR_SWTC | SYPCR_BMT | SYPCR_BME | SYPCR_SWF | \
+ SYPCR_SWE | SYPCR_SWRI| SYPCR_SWP)
+#else
+#define CFG_SYPCR (SYPCR_SWTC | SYPCR_BMT | SYPCR_BME | SYPCR_SWF | SYPCR_SWP)
+#endif
+
+/*-----------------------------------------------------------------------
+ * SIUMCR - SIU Module Configuration 11-6
+ *-----------------------------------------------------------------------
+ * PCMCIA config., multi-function pin tri-state
+ */
+#ifndef CONFIG_CAN_DRIVER
+#define CFG_SIUMCR (SIUMCR_DBGC00 | SIUMCR_DBPC00 | SIUMCR_MLRC01)
+#else /* we must activate GPL5 in the SIUMCR for CAN */
+#define CFG_SIUMCR (SIUMCR_DBGC11 | SIUMCR_DBPC00 | SIUMCR_MLRC01)
+#endif /* CONFIG_CAN_DRIVER */
+
+/*-----------------------------------------------------------------------
+ * TBSCR - Time Base Status and Control 11-26
+ *-----------------------------------------------------------------------
+ * Clear Reference Interrupt Status, Timebase freezing enabled
+ */
+#define CFG_TBSCR (TBSCR_REFA | TBSCR_REFB | TBSCR_TBF)
+
+/*-----------------------------------------------------------------------
+ * RTCSC - Real-Time Clock Status and Control Register 11-27
+ *-----------------------------------------------------------------------
+ */
+#define CFG_RTCSC (RTCSC_SEC | RTCSC_ALR | RTCSC_RTF| RTCSC_RTE)
+
+/*-----------------------------------------------------------------------
+ * PISCR - Periodic Interrupt Status and Control 11-31
+ *-----------------------------------------------------------------------
+ * Clear Periodic Interrupt Status, Interrupt Timer freezing enabled
+ */
+#define CFG_PISCR (PISCR_PS | PISCR_PITF)
+
+/*-----------------------------------------------------------------------
+ * PLPRCR - PLL, Low-Power, and Reset Control Register 15-30
+ *-----------------------------------------------------------------------
+ * Reset PLL lock status sticky bit, timer expired status bit and timer
+ * interrupt status bit
+ */
+#define CFG_PLPRCR (PLPRCR_SPLSS | PLPRCR_TEXPS | PLPRCR_TMIST)
+
+/*-----------------------------------------------------------------------
+ * SCCR - System Clock and reset Control Register 15-27
+ *-----------------------------------------------------------------------
+ * Set clock output, timebase and RTC source and divider,
+ * power management and some other internal clocks
+ */
+#define SCCR_MASK SCCR_EBDF11
+#define CFG_SCCR (SCCR_COM00 | SCCR_DFSYNC00 | SCCR_DFBRG00 | \
+ SCCR_DFNL000 | SCCR_DFNH000 | SCCR_DFLCD000 | \
+ SCCR_DFALCD00)
+
+/*-----------------------------------------------------------------------
+ * PCMCIA stuff
+ *-----------------------------------------------------------------------
+ *
+ */
+#define CFG_PCMCIA_MEM_ADDR (0xE0000000)
+#define CFG_PCMCIA_MEM_SIZE ( 64 << 20 )
+#define CFG_PCMCIA_DMA_ADDR (0xE4000000)
+#define CFG_PCMCIA_DMA_SIZE ( 64 << 20 )
+#define CFG_PCMCIA_ATTRB_ADDR (0xE8000000)
+#define CFG_PCMCIA_ATTRB_SIZE ( 64 << 20 )
+#define CFG_PCMCIA_IO_ADDR (0xEC000000)
+#define CFG_PCMCIA_IO_SIZE ( 64 << 20 )
+
+/*-----------------------------------------------------------------------
+ * IDE/ATA stuff (Supports IDE harddisk on PCMCIA Adapter)
+ *-----------------------------------------------------------------------
+ */
+
+#define CONFIG_IDE_8xx_PCCARD 1 /* Use IDE with PC Card Adapter */
+
+#undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */
+#undef CONFIG_IDE_LED /* LED for ide not supported */
+#undef CONFIG_IDE_RESET /* reset for ide not supported */
+
+#define CFG_IDE_MAXBUS 1 /* max. 1 IDE bus */
+#define CFG_IDE_MAXDEVICE 1 /* max. 1 drive per IDE bus */
+
+#define CFG_ATA_IDE0_OFFSET 0x0000
+
+#define CFG_ATA_BASE_ADDR CFG_PCMCIA_MEM_ADDR
+
+/* Offset for data I/O */
+#define CFG_ATA_DATA_OFFSET (CFG_PCMCIA_MEM_SIZE + 0x320)
+
+/* Offset for normal register accesses */
+#define CFG_ATA_REG_OFFSET (2 * CFG_PCMCIA_MEM_SIZE + 0x320)
+
+/* Offset for alternate registers */
+#define CFG_ATA_ALT_OFFSET 0x0100
+
+/*-----------------------------------------------------------------------
+ *
+ *-----------------------------------------------------------------------
+ *
+ */
+#define CFG_DER 0
+
+/*
+ * Init Memory Controller:
+ *
+ * BR0/1 and OR0/1 (FLASH)
+ */
+
+#define FLASH_BASE0_PRELIM 0x40000000 /* FLASH bank #0 */
+#define FLASH_BASE1_PRELIM 0x60000000 /* FLASH bank #0 */
+
+/* used to re-map FLASH both when starting from SRAM or FLASH:
+ * restrict access enough to keep SRAM working (if any)
+ * but not too much to meddle with FLASH accesses
+ */
+#define CFG_REMAP_OR_AM 0x80000000 /* OR addr mask */
+#define CFG_PRELIM_OR_AM 0xE0000000 /* OR addr mask */
+
+/*
+ * FLASH timing:
+ */
+#define CFG_OR_TIMING_FLASH (OR_ACS_DIV1 | OR_TRLX | OR_CSNT_SAM | \
+ OR_SCY_3_CLK | OR_EHTR | OR_BI)
+
+#define CFG_OR0_REMAP (CFG_REMAP_OR_AM | CFG_OR_TIMING_FLASH)
+#define CFG_OR0_PRELIM (CFG_PRELIM_OR_AM | CFG_OR_TIMING_FLASH)
+#define CFG_BR0_PRELIM ((FLASH_BASE0_PRELIM & BR_BA_MSK) | BR_V )
+
+#define CFG_OR1_REMAP CFG_OR0_REMAP
+#define CFG_OR1_PRELIM CFG_OR0_PRELIM
+#define CFG_BR1_PRELIM ((FLASH_BASE1_PRELIM & BR_BA_MSK) | BR_V )
+
+/*
+ * BR2/3 and OR2/3 (SDRAM)
+ *
+ */
+#define SDRAM_BASE2_PRELIM 0x00000000 /* SDRAM bank #0 */
+#define SDRAM_BASE3_PRELIM 0x20000000 /* SDRAM bank #1 */
+#define SDRAM_MAX_SIZE 0x04000000 /* max 64 MB per bank */
+
+/* SDRAM timing: Multiplexed addresses, GPL5 output to GPL5_A (don't care) */
+#define CFG_OR_TIMING_SDRAM 0x00000A00
+
+#define CFG_OR2_PRELIM (CFG_PRELIM_OR_AM | CFG_OR_TIMING_SDRAM )
+#define CFG_BR2_PRELIM ((SDRAM_BASE2_PRELIM & BR_BA_MSK) | BR_MS_UPMA | BR_V )
+
+#ifndef CONFIG_CAN_DRIVER
+#define CFG_OR3_PRELIM CFG_OR2_PRELIM
+#define CFG_BR3_PRELIM ((SDRAM_BASE3_PRELIM & BR_BA_MSK) | BR_MS_UPMA | BR_V )
+#else /* CAN uses CS3#, so we can have only one SDRAM bank anyway */
+#define CFG_CAN_BASE 0xC0000000 /* CAN mapped at 0xC0000000 */
+#define CFG_CAN_OR_AM 0xFFFF8000 /* 32 kB address mask */
+#define CFG_OR3_CAN (CFG_CAN_OR_AM | OR_G5LA | OR_BI)
+#define CFG_BR3_CAN ((CFG_CAN_BASE & BR_BA_MSK) | \
+ BR_PS_8 | BR_MS_UPMB | BR_V )
+#endif /* CONFIG_CAN_DRIVER */
+
+/*
+ * Memory Periodic Timer Prescaler
+ *
+ * The Divider for PTA (refresh timer) configuration is based on an
+ * example SDRAM configuration (64 MBit, one bank). The adjustment to
+ * the number of chip selects (NCS) and the actually needed refresh
+ * rate is done by setting MPTPR.
+ *
+ * PTA is calculated from
+ * PTA = (gclk * Trefresh) / ((2 ^ (2 * DFBRG)) * PTP * NCS)
+ *
+ * gclk CPU clock (not bus clock!)
+ * Trefresh Refresh cycle * 4 (four word bursts used)
+ *
+ * 4096 Rows from SDRAM example configuration
+ * 1000 factor s -> ms
+ * 32 PTP (pre-divider from MPTPR) from SDRAM example configuration
+ * 4 Number of refresh cycles per period
+ * 64 Refresh cycle in ms per number of rows
+ * --------------------------------------------
+ * Divider = 4096 * 32 * 1000 / (4 * 64) = 512000
+ *
+ * 50 MHz => 50.000.000 / Divider = 98
+ * 66 Mhz => 66.000.000 / Divider = 129
+ * 80 Mhz => 80.000.000 / Divider = 156
+ */
+
+#define CFG_PTA_PER_CLK ((4096 * 32 * 1000) / (4 * 64))
+#define CFG_MAMR_PTA 98
+
+/*
+ * For 16 MBit, refresh rates could be 31.3 us
+ * (= 64 ms / 2K = 125 / quad bursts).
+ * For a simpler initialization, 15.6 us is used instead.
+ *
+ * #define CFG_MPTPR_2BK_2K MPTPR_PTP_DIV32 for 2 banks
+ * #define CFG_MPTPR_1BK_2K MPTPR_PTP_DIV64 for 1 bank
+ */
+#define CFG_MPTPR_2BK_4K MPTPR_PTP_DIV16 /* setting for 2 banks */
+#define CFG_MPTPR_1BK_4K MPTPR_PTP_DIV32 /* setting for 1 bank */
+
+/* refresh rate 7.8 us (= 64 ms / 8K = 31.2 / quad bursts) for 256 MBit */
+#define CFG_MPTPR_2BK_8K MPTPR_PTP_DIV8 /* setting for 2 banks */
+#define CFG_MPTPR_1BK_8K MPTPR_PTP_DIV16 /* setting for 1 bank */
+
+/*
+ * MAMR settings for SDRAM
+ */
+
+/* 8 column SDRAM */
+#define CFG_MAMR_8COL ((CFG_MAMR_PTA << MAMR_PTA_SHIFT) | MAMR_PTAE | \
+ MAMR_AMA_TYPE_0 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A11 | \
+ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X)
+/* 9 column SDRAM */
+#define CFG_MAMR_9COL ((CFG_MAMR_PTA << MAMR_PTA_SHIFT) | MAMR_PTAE | \
+ MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \
+ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X)
+
+
+/*
+ * Internal Definitions
+ *
+ * Boot Flags
+ */
+#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
+#define BOOTFLAG_WARM 0x02 /* Software reboot */
+
+/* Map peripheral control registers on CS4 */
+#define CFG_PERIPHERAL_BASE 0xA0000000
+#define CFG_PERIPHERAL_OR_AM 0xFFFF8000 /* 32 kB address mask */
+#define CFG_OR4_PRELIM (CFG_PERIPHERAL_OR_AM | OR_TRLX | OR_CSNT_SAM | \
+ OR_SCY_2_CLK)
+#define CFG_BR4_PRELIM ((CFG_PERIPHERAL_BASE & BR_BA_MSK) | BR_PS_8 | BR_V)
+#define PCMCIA_CTRL (CFG_PERIPHERAL_BASE + 0xB00)
+#endif /* __CONFIG_H */
diff --git a/include/configs/voiceblue.h b/include/configs/voiceblue.h
index c5ee78ff4d..4e97b01aa1 100644
--- a/include/configs/voiceblue.h
+++ b/include/configs/voiceblue.h
@@ -47,6 +47,8 @@
#define CONFIG_SETUP_MEMORY_TAGS 1
#define CONFIG_INITRD_TAG 1
+#define CONFIG_VERSION_VARIABLE 1 /* include version env variable */
+
/*
* Physical Memory Map
*/
@@ -94,7 +96,6 @@
#define CONFIG_ENV_OVERWRITE
-#define CFG_JFFS_CUSTOM_PART /* see board/voiceblue/jffs2parts.c */
#endif
/*
@@ -104,9 +105,11 @@
#ifdef VOICEBLUE_SMALL_FLASH
#define CFG_MALLOC_LEN (SZ_64K - CFG_GBL_DATA_SIZE)
#define CONFIG_STACKSIZE SZ_8K
+#define PHYS_SDRAM_1_RESERVED 0
#else
#define CFG_MALLOC_LEN SZ_4M
#define CONFIG_STACKSIZE SZ_1M
+#define PHYS_SDRAM_1_RESERVED (CFG_MONITOR_LEN + CFG_MALLOC_LEN + CONFIG_STACKSIZE)
#endif
/*
@@ -174,6 +177,7 @@
#define CONFIG_BOOTCOMMAND "run nboot"
#define CONFIG_PREBOOT "run setup"
#define CONFIG_EXTRA_ENV_SETTINGS \
+ "silent=1\0" \
"ospart=0\0" \
"swapos=no\0" \
"setpart=" \
@@ -185,15 +189,37 @@
"fi\0" \
"setup=setenv bootargs console=ttyS0,$baudrate " \
"mtdparts=$mtdparts\0" \
- "nfsargs=run setpart; setenv bootargs $bootargs " \
- "root=/dev/nfs ip=dhcp\0" \
+ "nfsargs=setenv bootargs $bootargs " \
+ "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off " \
+ "nfsroot=$rootpath root=/dev/nfs\0" \
"flashargs=run setpart; setenv bootargs $bootargs " \
"root=/dev/mtdblock$partition ro " \
"rootfstype=jffs2\0" \
- "nboot=run nfsargs; bootp; tftp; bootm\0" \
- "fboot=run flashargs; fsload /boot/uImage; bootm\0"
+ "initrdargs=setenv bootargs $bootargs " \
+ "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off\0" \
+ "fboot=run flashargs; fsload /boot/uImage; bootm\0" \
+ "iboot=bootp; run initrdargs; tftp; bootm\0" \
+ "nboot=bootp; run nfsargs; tftp; bootm\0"
#endif
+#ifndef VOICEBLUE_SMALL_FLASH
+#define CONFIG_SILENT_CONSOLE 1 /* enable silent startup */
+
+#if 1 /* feel free to disable for development */
+#define CONFIG_AUTOBOOT_KEYED /* Enable password protection */
+#define CONFIG_AUTOBOOT_PROMPT "\nVoiceBlue Enterprise - booting...\n"
+#define CONFIG_AUTOBOOT_DELAY_STR "." /* 1st "password" */
+#endif
+
+/*
+ * JFFS2 partitions (mtdparts command line support)
+ */
+#define CONFIG_JFFS2_CMDLINE
+#define MTDIDS_DEFAULT "nor0=omapflash.0"
+#define MTDPARTS_DEFAULT "mtdparts=omapflash.0:128k(uboot),64k(env),64k(r_env),16256k(data1),-(data2)"
+
+#endif /* VOICEBLUE_SMALL_FLASH */
+
/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
#include <cmd_confdefs.h>
@@ -213,7 +239,7 @@
#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
#define CFG_MEMTEST_START PHYS_SDRAM_1
-#define CFG_MEMTEST_END PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE
+#define CFG_MEMTEST_END PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE - PHYS_SDRAM_1_RESERVED
#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
@@ -247,22 +273,4 @@
#define VOICEBLUE_LED_REG 0x04030000
-/*
- * JFFS2 partitions
- *
- */
-/* No command line, one static partition */
-#undef CONFIG_JFFS2_CMDLINE
-#define CONFIG_JFFS2_DEV "nor0"
-#define CONFIG_JFFS2_PART_SIZE 0xFFFFFFFF
-#define CONFIG_JFFS2_PART_OFFSET 0x00040000
-
-/* mtdparts command line support */
-/* Note: fake mtd_id used, no linux mtd map file */
-/*
-#define CONFIG_JFFS2_CMDLINE
-#define MTDIDS_DEFAULT "nor0=voiceblue-0"
-#define MTDPARTS_DEFAULT "mtdparts=voiceblue-0:128k(uboot),64k(env),64k(renv),-(jffs2)"
-*/
-
#endif /* __CONFIG_H */
diff --git a/include/configs/xm250.h b/include/configs/xm250.h
index 952f73b43d..825bfd14e9 100644
--- a/include/configs/xm250.h
+++ b/include/configs/xm250.h
@@ -119,9 +119,9 @@
/*
* Definitions related to passing arguments to kernel.
*/
-#define CONFIG_CMDLINE_TAG 1 /* send commandline to Kernel */
-#define CONFIG_SETUP_MEMORY_TAGS 1 /* send memory definition to kernel */
-#undef CONFIG_INITRD_TAG /* do not send initrd params */
+#define CONFIG_CMDLINE_TAG 1 /* send commandline to Kernel */
+#define CONFIG_SETUP_MEMORY_TAGS 1 /* send memory definition to kernel */
+#define CONFIG_INITRD_TAG 1 /* do not send initrd params */
#undef CONFIG_VFD /* do not send framebuffer setup */
/*
diff --git a/include/configs/yellowstone.h b/include/configs/yellowstone.h
index d3e9671bc3..7d555665ec 100644
--- a/include/configs/yellowstone.h
+++ b/include/configs/yellowstone.h
@@ -1,5 +1,5 @@
/*
- * (C) Copyright 2005
+ * (C) Copyright 2005-2006
* Stefan Roese, DENX Software Engineering, sr@denx.de.
*
* See file CREDITS for list of people who contributed to this
@@ -174,7 +174,7 @@
"rootpath=/opt/eldk/ppc_4xx\0" \
"bootfile=/tftpboot/yellowstone/uImage\0" \
"kernel_addr=fc000000\0" \
- "ramdisk_addr=fc100000\0" \
+ "ramdisk_addr=fc180000\0" \
"load=tftp 100000 /tftpboot/yellowstone/u-boot.bin\0" \
"update=protect off fff80000 ffffffff;era fff80000 ffffffff;" \
"cp.b 100000 fff80000 80000;" \
diff --git a/include/configs/yosemite.h b/include/configs/yosemite.h
index a67b834866..a81cf34f11 100644
--- a/include/configs/yosemite.h
+++ b/include/configs/yosemite.h
@@ -1,5 +1,5 @@
/*
- * (C) Copyright 2005
+ * (C) Copyright 2005-2006
* Stefan Roese, DENX Software Engineering, sr@denx.de.
*
* See file CREDITS for list of people who contributed to this
@@ -109,6 +109,8 @@
#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
+#define CFG_FLASH_USE_BUFFER_WRITE 1 /* use buffered writes (20x faster) */
+
#define CFG_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
#ifdef CFG_ENV_IS_IN_FLASH
@@ -174,7 +176,7 @@
"rootpath=/opt/eldk/ppc_4xx\0" \
"bootfile=/tftpboot/yosemite/uImage\0" \
"kernel_addr=fc000000\0" \
- "ramdisk_addr=fc100000\0" \
+ "ramdisk_addr=fc180000\0" \
"load=tftp 100000 /tftpboot/yosemite/u-boot.bin\0" \
"update=protect off fff80000 ffffffff;era fff80000 ffffffff;" \
"cp.b 100000 fff80000 80000;" \
diff --git a/include/configs/yucca.h b/include/configs/yucca.h
new file mode 100644
index 0000000000..0e58e7e102
--- /dev/null
+++ b/include/configs/yucca.h
@@ -0,0 +1,526 @@
+/*
+ * (C) Copyright 2004 Paul Reynolds <PaulReynolds@lhsolutions.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/************************************************************************
+ * 1 january 2005 Alain Saurel <asaurel@amcc.com>
+ * Adapted to current Das U-Boot source
+ ***********************************************************************/
+/************************************************************************
+ * yucca.h - configuration for AMCC 440SPe Ref (yucca)
+ ***********************************************************************/
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#define DEBUG
+#undef DEBUG
+
+/*-----------------------------------------------------------------------
+ * High Level Configuration Options
+ *----------------------------------------------------------------------*/
+#define CONFIG_4xx 1 /* ... PPC4xx family */
+#define CONFIG_440 1 /* ... PPC440 family */
+#define CONFIG_440SPE 1 /* Specifc SPe support */
+#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */
+#undef CFG_DRAM_TEST /* Disable-takes long time */
+#define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */
+#define EXTCLK_33_33 33333333
+#define EXTCLK_66_66 66666666
+#define EXTCLK_50 50000000
+#define EXTCLK_83 83333333
+
+#define CONFIG_IBM_EMAC4_V4 1
+#define CONFIG_MISC_INIT_F 1 /* Use misc_init_f() */
+#undef CONFIG_SHOW_BOOT_PROGRESS
+#undef CONFIG_STRESS
+#undef ENABLE_ECC
+/*-----------------------------------------------------------------------
+ * Base addresses -- Note these are effective addresses where the
+ * actual resources get mapped (not physical addresses)
+ *----------------------------------------------------------------------*/
+#define CFG_SDRAM_BASE 0x00000000 /* _must_ be 0 */
+#define CFG_FLASH_BASE 0xfff00000 /* start of FLASH */
+#define CFG_MONITOR_BASE 0xfffb0000 /* start of monitor */
+#define CFG_PERIPHERAL_BASE 0xa0000000 /* internal peripherals */
+#define CFG_ISRAM_BASE 0x90000000 /* internal SRAM */
+
+#define CFG_PCI_MEMBASE 0x80000000 /* mapped pci memory */
+#define CFG_PCI_MEMBASE1 0x90000000 /* mapped pci memory */
+#define CFG_PCI_MEMBASE2 0xa0000000 /* mapped pci memory */
+#define CFG_PCI_MEMBASE3 0xb0000000 /* mapped pci memory */
+
+#define CFG_PCI_BASE 0xd0000000 /* internal PCI regs */
+#define CFG_PCI_TARGBASE 0x80000000 /*PCIaddr mapped to CFG_PCI_MEMBASE*/
+
+/* #define CFG_PCI_BASE_IO 0xB8000000 */ /* internal PCI I-O */
+/* #define CFG_PCI_BASE_REGS 0xBEC00000 */ /* internal PCI regs */
+/* #define CFG_PCI_BASE_CYCLE 0xBED00000 */ /* internal PCI regs */
+
+/* System RAM mapped to PCI space */
+#define CONFIG_PCI_SYS_MEM_BUS CFG_SDRAM_BASE
+#define CONFIG_PCI_SYS_MEM_PHYS CFG_SDRAM_BASE
+#define CONFIG_PCI_SYS_MEM_SIZE (1024 * 1024 * 1024)
+
+#define CFG_FPGA_BASE 0xe2000000 /* epld */
+#define CFG_OPER_FLASH 0xe7000000 /* SRAM - OPER Flash */
+
+/* #define CFG_NVRAM_BASE_ADDR 0x08000000 */
+/*-----------------------------------------------------------------------
+ * Initial RAM & stack pointer (placed in internal SRAM)
+ *----------------------------------------------------------------------*/
+#define CFG_TEMP_STACK_OCM 1
+#define CFG_OCM_DATA_ADDR CFG_ISRAM_BASE
+#define CFG_INIT_RAM_ADDR CFG_ISRAM_BASE /* Initial RAM address */
+#define CFG_INIT_RAM_END 0x2000 /* End of used area in RAM */
+#define CFG_GBL_DATA_SIZE 128 /* num bytes initial data */
+
+#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
+#define CFG_POST_WORD_ADDR (CFG_GBL_DATA_OFFSET - 0x4)
+#define CFG_INIT_SP_OFFSET CFG_POST_WORD_ADDR
+
+#define CFG_MONITOR_LEN (320 * 1024) /* Reserve 320 kB for Mon */
+#define CFG_MALLOC_LEN (512 * 1024) /* Reserve 512 kB for malloc */
+
+/*-----------------------------------------------------------------------
+ * Serial Port
+ *----------------------------------------------------------------------*/
+#define CONFIG_SERIAL_MULTI 1
+#undef CONFIG_UART1_CONSOLE
+
+#undef CONFIG_SERIAL_SOFTWARE_FIFO
+#undef CFG_EXT_SERIAL_CLOCK
+/* #define CFG_EXT_SERIAL_CLOCK (1843200 * 6) */ /* Ext clk @ 11.059 MHz */
+
+#define CONFIG_BAUDRATE 115200
+
+#define CFG_BAUDRATE_TABLE \
+ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
+
+/*-----------------------------------------------------------------------
+ * DDR SDRAM
+ *----------------------------------------------------------------------*/
+#undef CONFIG_SPD_EEPROM /* Use SPD EEPROM for setup */
+#define SPD_EEPROM_ADDRESS {0x53, 0x52} /* SPD i2c spd addresses */
+#define IIC0_DIMM0_ADDR 0x53
+#define IIC0_DIMM1_ADDR 0x52
+
+/*-----------------------------------------------------------------------
+ * I2C
+ *----------------------------------------------------------------------*/
+#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
+#undef CONFIG_SOFT_I2C /* I2C bit-banged */
+#define CFG_I2C_SPEED 400000 /* I2C speed and slave address */
+#define CFG_I2C_SLAVE 0x7F
+
+#define IIC0_BOOTPROM_ADDR 0x50
+#define IIC0_ALT_BOOTPROM_ADDR 0x54
+
+/* Don't probe these addrs */
+#define CFG_I2C_NOPROBES {0x50, 0x52, 0x53, 0x54}
+
+/* #if (CONFIG_COMMANDS & CFG_CMD_EEPROM) */
+/* #define CFG_I2C_EEPROM_ADDR 0x50 */ /* I2C boot EEPROM */
+#define CFG_I2C_EEPROM_ADDR_LEN 2 /* Bytes of address */
+/* #endif */
+
+/*-----------------------------------------------------------------------
+ * Environment
+ *----------------------------------------------------------------------*/
+/* #define CFG_NVRAM_SIZE (0x2000 - 8) */ /* NVRAM size(8k)- RTC regs */
+
+#undef CFG_ENV_IS_IN_NVRAM /* ... not in NVRAM */
+#define CFG_ENV_IS_IN_FLASH 1 /* Environment uses flash */
+#undef CFG_ENV_IS_IN_EEPROM /* ... not in EEPROM */
+#define CONFIG_ENV_OVERWRITE 1
+
+#define CONFIG_PREBOOT "echo;" \
+ "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
+ "echo"
+
+#undef CONFIG_BOOTARGS
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "netdev=eth0\0" \
+ "hostname=yucca\0" \
+ "nfsargs=setenv bootargs root=/dev/nfs rw " \
+ "nfsroot=${serverip}:${rootpath}\0" \
+ "ramargs=setenv bootargs root=/dev/ram rw\0" \
+ "addip=setenv bootargs ${bootargs} " \
+ "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
+ ":${hostname}:${netdev}:off panic=1\0" \
+ "addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0"\
+ "flash_nfs=run nfsargs addip addtty;" \
+ "bootm ${kernel_addr}\0" \
+ "flash_self=run ramargs addip addtty;" \
+ "bootm ${kernel_addr} ${ramdisk_addr}\0" \
+ "net_nfs=tftp 200000 ${bootfile};run nfsargs addip addtty;" \
+ "bootm\0" \
+ "rootpath=/opt/eldk/ppc_4xx\0" \
+ "bootfile=yucca/uImage\0" \
+ "kernel_addr=E7F10000\0" \
+ "ramdisk_addr=E7F20000\0" \
+ "load=tftp 100000 yuca/u-boot.bin\0" \
+ "update=protect off 2:4-7;era 2:4-7;" \
+ "cp.b ${fileaddr} FFFB0000 ${filesize};" \
+ "setenv filesize;saveenv\0" \
+ "upd=run load;run update\0" \
+ ""
+#define CONFIG_BOOTCOMMAND "run flash_self"
+
+#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
+
+#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
+#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
+
+#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
+ CFG_CMD_ASKENV | \
+ CFG_CMD_EEPROM | \
+ CFG_CMD_DHCP | \
+ CFG_CMD_DIAG | \
+ CFG_CMD_ELF | \
+ CFG_CMD_I2C | \
+ CFG_CMD_IRQ | \
+ CFG_CMD_MII | \
+ CFG_CMD_NET | \
+ CFG_CMD_NFS | \
+ CFG_CMD_PCI | \
+ CFG_CMD_PING | \
+ CFG_CMD_REGINFO | \
+ CFG_CMD_SDRAM )
+
+/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
+#include <cmd_confdefs.h>
+
+#define CONFIG_MII 1 /* MII PHY management */
+#undef CONFIG_NET_MULTI
+#define CONFIG_PHY_ADDR 1 /* PHY address, See schematics */
+#define CONFIG_HAS_ETH0
+#define CONFIG_PHY_RESET 1 /* reset phy upon startup */
+#define CONFIG_PHY_RESET_DELAY 1000
+#define CONFIG_CIS8201_PHY 1 /* Enable 'special' RGMII mode for Cicada phy */
+#define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */
+#define CFG_RX_ETH_BUFFER 32 /* Number of ethernet rx buffers & descriptors */
+
+#undef CONFIG_WATCHDOG /* watchdog disabled */
+
+/*
+ * Miscellaneous configurable options
+ */
+#define CFG_LONGHELP /* undef to save memory */
+#define CFG_PROMPT "=> " /* Monitor Command Prompt */
+
+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
+#else
+#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
+#endif
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
+#define CFG_MAXARGS 16 /* max number of command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+
+#define CFG_MEMTEST_START 0x0400000 /* memtest works on */
+#define CFG_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
+
+#define CFG_LOAD_ADDR 0x100000 /* default load address */
+#define CFG_EXTBDINFO 1 /* To use extended board_into (bd_t) */
+
+#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
+
+/*-----------------------------------------------------------------------
+ * FLASH related
+ *----------------------------------------------------------------------*/
+#define CFG_MAX_FLASH_BANKS 3 /* number of banks */
+#define CFG_MAX_FLASH_SECT 256 /* sectors per device */
+
+#undef CFG_FLASH_CHECKSUM
+#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
+#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
+
+#define CFG_FLASH_ADDR0 0x5555
+#define CFG_FLASH_ADDR1 0x2aaa
+#define CFG_FLASH_WORD_SIZE unsigned char
+
+#define CFG_FLASH_2ND_16BIT_DEV 1 /* evb440SPe has 8 and 16bit device */
+#define CFG_FLASH_2ND_ADDR 0xe7c00000 /* evb440SPe has 8 and 16bit device*/
+
+#ifdef CFG_ENV_IS_IN_FLASH
+#define CFG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */
+#define CFG_ENV_ADDR 0xfffa0000
+/* #define CFG_ENV_ADDR (CFG_MONITOR_BASE-CFG_ENV_SECT_SIZE) */
+#define CFG_ENV_SIZE 0x10000 /* Size of Environment vars */
+#endif /* CFG_ENV_IS_IN_FLASH */
+/*-----------------------------------------------------------------------
+ * PCI stuff
+ *-----------------------------------------------------------------------
+ */
+/* General PCI */
+#define CONFIG_PCI /* include pci support */
+#define CONFIG_PCI_PNP 1 /* do pci plug-and-play */
+#define CONFIG_PCI_SCAN_SHOW 1 /* show pci devices on startup */
+#undef CONFIG_PCI_CONFIG_HOST_BRIDGE
+
+/* Board-specific PCI */
+#define CFG_PCI_PRE_INIT 1 /* enable board pci_pre_init() */
+#define CFG_PCI_TARGET_INIT /* let board init pci target */
+#undef CFG_PCI_MASTER_INIT
+
+#define CFG_PCI_SUBSYS_VENDORID 0x1014 /* IBM */
+#define CFG_PCI_SUBSYS_DEVICEID 0xcafe /* Whatever */
+/* #define CFG_PCI_SUBSYS_ID CFG_PCI_SUBSYS_DEVICEID */
+
+/*
+ * NETWORK Support (PCI):
+ */
+/* Support for Intel 82557/82559/82559ER chips. */
+#define CONFIG_EEPRO100
+/*
+ * For booting Linux, the board info and command line data
+ * have to be in the first 8 MB of memory, since this is
+ * the maximum mapped by the Linux kernel during initialization.
+ */
+#define CFG_BOOTMAPSZ (8 << 20) /*Initial Memory map for Linux*/
+/*-----------------------------------------------------------------------
+ * Cache Configuration
+ */
+#define CFG_DCACHE_SIZE 8192 /* For AMCC 405 CPUs */
+#define CFG_CACHELINE_SIZE 32 /* ... */
+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
+#endif
+
+/*
+ * Internal Definitions
+ *
+ * Boot Flags
+ */
+#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
+#define BOOTFLAG_WARM 0x02 /* Software reboot */
+
+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
+#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
+#endif
+
+/* FB Divisor selection */
+#define FPGA_FB_DIV_6 6
+#define FPGA_FB_DIV_10 10
+#define FPGA_FB_DIV_12 12
+#define FPGA_FB_DIV_20 20
+
+/* VCO Divisor selection */
+#define FPGA_VCO_DIV_4 4
+#define FPGA_VCO_DIV_6 6
+#define FPGA_VCO_DIV_8 8
+#define FPGA_VCO_DIV_10 10
+
+/*----------------------------------------------------------------------------+
+| FPGA registers and bit definitions
++----------------------------------------------------------------------------*/
+/* PowerPC 440SPe Board FPGA is reached with physical address 0x1 E2000000. */
+/* TLB initialization makes it correspond to logical address 0xE2000000. */
+/* => Done init_chip.s in bootlib */
+#define FPGA_REG_BASE_ADDR 0xE2000000
+#define FPGA_GPIO_BASE_ADDR 0xE2010000
+#define FPGA_INT_BASE_ADDR 0xE2020000
+
+/*----------------------------------------------------------------------------+
+| Display
++----------------------------------------------------------------------------*/
+#define PPC440SPE_DISPLAY FPGA_REG_BASE_ADDR
+
+#define PPC440SPE_DISPLAY_D8 (FPGA_REG_BASE_ADDR+0x06)
+#define PPC440SPE_DISPLAY_D4 (FPGA_REG_BASE_ADDR+0x04)
+#define PPC440SPE_DISPLAY_D2 (FPGA_REG_BASE_ADDR+0x02)
+#define PPC440SPE_DISPLAY_D1 (FPGA_REG_BASE_ADDR+0x00)
+/*define WRITE_DISPLAY_DIGIT(n) IOREG8(FPGA_REG_BASE_ADDR + (2*n))*/
+/*#define IOREG8(addr) *((volatile unsigned char *)(addr))*/
+
+/*----------------------------------------------------------------------------+
+| ethernet/reset/boot Register 1
++----------------------------------------------------------------------------*/
+#define FPGA_REG10 (FPGA_REG_BASE_ADDR+0x10)
+
+#define FPGA_REG10_10MHZ_ENABLE 0x8000
+#define FPGA_REG10_100MHZ_ENABLE 0x4000
+#define FPGA_REG10_GIGABIT_ENABLE 0x2000
+#define FPGA_REG10_FULL_DUPLEX 0x1000 /* force Full Duplex*/
+#define FPGA_REG10_RESET_ETH 0x0800
+#define FPGA_REG10_AUTO_NEG_DIS 0x0400
+#define FPGA_REG10_INTP_ETH 0x0200
+
+#define FPGA_REG10_RESET_HISR 0x0080
+#define FPGA_REG10_ENABLE_DISPLAY 0x0040
+#define FPGA_REG10_RESET_SDRAM 0x0020
+#define FPGA_REG10_OPER_BOOT 0x0010
+#define FPGA_REG10_SRAM_BOOT 0x0008
+#define FPGA_REG10_SMALL_BOOT 0x0004
+#define FPGA_REG10_FORCE_COLA 0x0002
+#define FPGA_REG10_COLA_MANUAL 0x0001
+
+#define FPGA_REG10_SDRAM_ENABLE 0x0020
+
+#define FPGA_REG10_ENET_ENCODE2(n) ((((unsigned long)(n))&0x0F)<<4) /*from ocotea ?*/
+#define FPGA_REG10_ENET_DECODE2(n) ((((unsigned long)(n))>>4)&0x0F) /*from ocotea ?*/
+
+/*----------------------------------------------------------------------------+
+| MUX control
++----------------------------------------------------------------------------*/
+#define FPGA_REG12 (FPGA_REG_BASE_ADDR+0x12)
+
+#define FPGA_REG12_EBC_CTL 0x8000
+#define FPGA_REG12_UART1_CTS_RTS 0x4000
+#define FPGA_REG12_UART0_RX_ENABLE 0x2000
+#define FPGA_REG12_UART1_RX_ENABLE 0x1000
+#define FPGA_REG12_UART2_RX_ENABLE 0x0800
+#define FPGA_REG12_EBC_OUT_ENABLE 0x0400
+#define FPGA_REG12_GPIO0_OUT_ENABLE 0x0200
+#define FPGA_REG12_GPIO1_OUT_ENABLE 0x0100
+#define FPGA_REG12_GPIO_SELECT 0x0010
+#define FPGA_REG12_GPIO_CHREG 0x0008
+#define FPGA_REG12_GPIO_CLK_CHREG 0x0004
+#define FPGA_REG12_GPIO_OETRI 0x0002
+#define FPGA_REG12_EBC_ERROR 0x0001
+
+/*----------------------------------------------------------------------------+
+| PCI Clock control
++----------------------------------------------------------------------------*/
+#define FPGA_REG16 (FPGA_REG_BASE_ADDR+0x16)
+
+#define FPGA_REG16_PCI_CLK_CTL0 0x8000
+#define FPGA_REG16_PCI_CLK_CTL1 0x4000
+#define FPGA_REG16_PCI_CLK_CTL2 0x2000
+#define FPGA_REG16_PCI_CLK_CTL3 0x1000
+#define FPGA_REG16_PCI_CLK_CTL4 0x0800
+#define FPGA_REG16_PCI_CLK_CTL5 0x0400
+#define FPGA_REG16_PCI_CLK_CTL6 0x0200
+#define FPGA_REG16_PCI_CLK_CTL7 0x0100
+#define FPGA_REG16_PCI_CLK_CTL8 0x0080
+#define FPGA_REG16_PCI_CLK_CTL9 0x0040
+#define FPGA_REG16_PCI_EXT_ARB0 0x0020
+#define FPGA_REG16_PCI_MODE_1 0x0010
+#define FPGA_REG16_PCI_TARGET_MODE 0x0008
+#define FPGA_REG16_PCI_INTP_MODE 0x0004
+
+/* FB1 Divisor selection */
+#define FPGA_REG16_FB2_DIV_MASK 0x1000
+#define FPGA_REG16_FB2_DIV_LOW 0x0000
+#define FPGA_REG16_FB2_DIV_HIGH 0x1000
+/* FB2 Divisor selection */
+/* S3 switch on Board */
+#define FPGA_REG16_FB1_DIV_MASK 0x2000
+#define FPGA_REG16_FB1_DIV_LOW 0x0000
+#define FPGA_REG16_FB1_DIV_HIGH 0x2000
+/* PCI0 Clock Selection */
+/* S3 switch on Board */
+#define FPGA_REG16_PCI0_CLK_MASK 0x0c00
+#define FPGA_REG16_PCI0_CLK_33_33 0x0000
+#define FPGA_REG16_PCI0_CLK_66_66 0x0800
+#define FPGA_REG16_PCI0_CLK_100 0x0400
+#define FPGA_REG16_PCI0_CLK_133_33 0x0c00
+/* VCO Divisor selection */
+/* S3 switch on Board */
+#define FPGA_REG16_VCO_DIV_MASK 0xc000
+#define FPGA_REG16_VCO_DIV_4 0x0000
+#define FPGA_REG16_VCO_DIV_8 0x4000
+#define FPGA_REG16_VCO_DIV_6 0x8000
+#define FPGA_REG16_VCO_DIV_10 0xc000
+/* Master Clock Selection */
+/* S3, S4 switches on Board */
+#define FPGA_REG16_MASTER_CLK_MASK 0x01c0
+#define FPGA_REG16_MASTER_CLK_EXT 0x0000
+#define FPGA_REG16_MASTER_CLK_66_66 0x0040
+#define FPGA_REG16_MASTER_CLK_50 0x0080
+#define FPGA_REG16_MASTER_CLK_33_33 0x00c0
+#define FPGA_REG16_MASTER_CLK_25 0x0100
+
+/*----------------------------------------------------------------------------+
+| PCI Miscellaneous
++----------------------------------------------------------------------------*/
+#define FPGA_REG18 (FPGA_REG_BASE_ADDR+0x18)
+
+#define FPGA_REG18_PCI_PRSNT1 0x8000
+#define FPGA_REG18_PCI_PRSNT2 0x4000
+#define FPGA_REG18_PCI_INTA 0x2000
+#define FPGA_REG18_PCI_SLOT0_INTP 0x1000
+#define FPGA_REG18_PCI_SLOT1_INTP 0x0800
+#define FPGA_REG18_PCI_SLOT2_INTP 0x0400
+#define FPGA_REG18_PCI_SLOT3_INTP 0x0200
+#define FPGA_REG18_PCI_PCI0_VC 0x0100
+#define FPGA_REG18_PCI_PCI0_VTH1 0x0080
+#define FPGA_REG18_PCI_PCI0_VTH2 0x0040
+#define FPGA_REG18_PCI_PCI0_VTH3 0x0020
+
+/*----------------------------------------------------------------------------+
+| PCIe Miscellaneous
++----------------------------------------------------------------------------*/
+#define FPGA_REG1A (FPGA_REG_BASE_ADDR+0x1A)
+
+#define FPGA_REG1A_PE0_GLED 0x8000
+#define FPGA_REG1A_PE1_GLED 0x4000
+#define FPGA_REG1A_PE2_GLED 0x2000
+#define FPGA_REG1A_PE0_YLED 0x1000
+#define FPGA_REG1A_PE1_YLED 0x0800
+#define FPGA_REG1A_PE2_YLED 0x0400
+#define FPGA_REG1A_PE0_PWRON 0x0200
+#define FPGA_REG1A_PE1_PWRON 0x0100
+#define FPGA_REG1A_PE2_PWRON 0x0080
+#define FPGA_REG1A_PE0_REFCLK_ENABLE 0x0040
+#define FPGA_REG1A_PE1_REFCLK_ENABLE 0x0020
+#define FPGA_REG1A_PE2_REFCLK_ENABLE 0x0010
+#define FPGA_REG1A_PE_SPREAD0 0x0008
+#define FPGA_REG1A_PE_SPREAD1 0x0004
+#define FPGA_REG1A_PE_SELSOURCE_0 0x0002
+#define FPGA_REG1A_PE_SELSOURCE_1 0x0001
+
+/*----------------------------------------------------------------------------+
+| PCIe Miscellaneous
++----------------------------------------------------------------------------*/
+#define FPGA_REG1C (FPGA_REG_BASE_ADDR+0x1C)
+
+#define FPGA_REG1C_PE0_ROOTPOINT 0x8000
+#define FPGA_REG1C_PE1_ENDPOINT 0x4000
+#define FPGA_REG1C_PE2_ENDPOINT 0x2000
+#define FPGA_REG1C_PE0_PRSNT 0x1000
+#define FPGA_REG1C_PE1_PRSNT 0x0800
+#define FPGA_REG1C_PE2_PRSNT 0x0400
+#define FPGA_REG1C_PE0_WAKE 0x0080
+#define FPGA_REG1C_PE1_WAKE 0x0040
+#define FPGA_REG1C_PE2_WAKE 0x0020
+#define FPGA_REG1C_PE0_PERST 0x0010
+#define FPGA_REG1C_PE1_PERST 0x0080
+#define FPGA_REG1C_PE2_PERST 0x0040
+
+/*----------------------------------------------------------------------------+
+| Defines
++----------------------------------------------------------------------------*/
+#define PERIOD_133_33MHZ 7500 /* 7,5ns */
+#define PERIOD_100_00MHZ 10000 /* 10ns */
+#define PERIOD_83_33MHZ 12000 /* 12ns */
+#define PERIOD_75_00MHZ 13333 /* 13,333ns */
+#define PERIOD_66_66MHZ 15000 /* 15ns */
+#define PERIOD_50_00MHZ 20000 /* 20ns */
+#define PERIOD_33_33MHZ 30000 /* 30ns */
+#define PERIOD_25_00MHZ 40000 /* 40ns */
+
+/*---------------------------------------------------------------------------*/
+
+#endif /* __CONFIG_H */
diff --git a/include/configs/zylonite.h b/include/configs/zylonite.h
new file mode 100644
index 0000000000..c6aa8ece5b
--- /dev/null
+++ b/include/configs/zylonite.h
@@ -0,0 +1,228 @@
+/*
+ * (C) Copyright 2002
+ * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
+ *
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Marius Groeger <mgroeger@sysgo.de>
+ *
+ * Configuation settings for the Zylonite board.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * High Level Configuration Options
+ * (easy to change)
+ */
+#define CONFIG_CPU_MONAHANS 1 /* Intel Monahan CPU */
+#define CONFIG_ZYLONITE 1 /* Zylonite board */
+
+/* #define CONFIG_LCD 1 */
+#ifdef CONFIG_LCD
+#define CONFIG_SHARP_LM8V31
+#endif
+/* #define CONFIG_MMC 1 */
+#define BOARD_LATE_INIT 1
+
+#undef CONFIG_SKIP_RELOCATE_UBOOT
+#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
+
+/*
+ * Size of malloc() pool
+ */
+#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
+#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
+
+/*
+ * Hardware drivers
+ */
+
+#undef TURN_ON_ETHERNET
+#ifdef TURN_ON_ETHERNET
+# define CONFIG_DRIVER_SMC91111 1
+# define CONFIG_SMC91111_BASE 0x14000300
+# define CONFIG_SMC91111_EXT_PHY
+# define CONFIG_SMC_USE_32_BIT
+# undef CONFIG_SMC_USE_IOFUNCS /* just for use with the kernel */
+#endif
+
+/*
+ * select serial console configuration
+ */
+#define CONFIG_FFUART 1
+
+/* allow to overwrite serial and ethaddr */
+#define CONFIG_ENV_OVERWRITE
+
+#define CONFIG_BAUDRATE 115200
+
+#ifdef TURN_ON_ETHERNET
+# define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_PING)
+#else
+# define CONFIG_COMMANDS ((CONFIG_CMD_DFL \
+ | CFG_CMD_ENV \
+ | CFG_CMD_NAND) \
+ & ~(CFG_CMD_NET \
+ | CFG_CMD_FLASH \
+ | CFG_CMD_IMLS))
+#endif
+
+/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
+#include <cmd_confdefs.h>
+
+#define CONFIG_BOOTDELAY -1
+#define CONFIG_ETHADDR 08:00:3e:26:0a:5b
+#define CONFIG_NETMASK 255.255.0.0
+#define CONFIG_IPADDR 192.168.0.21
+#define CONFIG_SERVERIP 192.168.0.250
+#define CONFIG_BOOTCOMMAND "bootm 80000"
+#define CONFIG_BOOTARGS "root=/dev/mtdblock2 rootfstype=cramfs console=ttyS0,115200"
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_TIMESTAMP
+
+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
+#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
+#endif
+
+/*
+ * Miscellaneous configurable options
+ */
+#define CFG_HUSH_PARSER 1
+#define CFG_PROMPT_HUSH_PS2 "> "
+
+#define CFG_LONGHELP /* undef to save memory */
+#ifdef CFG_HUSH_PARSER
+#define CFG_PROMPT "$ " /* Monitor Command Prompt */
+#else
+#define CFG_PROMPT "=> " /* Monitor Command Prompt */
+#endif
+#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
+#define CFG_MAXARGS 16 /* max number of command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+#define CFG_DEVICE_NULLDEV 1
+
+#define CFG_MEMTEST_START 0x9c000000 /* memtest works on */
+#define CFG_MEMTEST_END 0x9c400000 /* 4 ... 8 MB in DRAM */
+
+#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
+
+#define CFG_LOAD_ADDR (CFG_DRAM_BASE + 0x8000) /* default load address */
+
+#define CFG_HZ 3250000 /* incrementer freq: 3.25 MHz */
+
+/* Monahans Core Frequency */
+#define CFG_MONAHANS_RUN_MODE_OSC_RATIO 16 /* valid values: 8, 16, 24, 31 */
+#define CFG_MONAHANS_TURBO_RUN_MODE_RATIO 1 /* valid values: 1, 2 */
+
+ /* valid baudrates */
+#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
+
+/* #define CFG_MMC_BASE 0xF0000000 */
+
+/*
+ * Stack sizes
+ *
+ * The stack sizes are set up in start.S using the settings below
+ */
+#define CONFIG_STACKSIZE (128*1024) /* regular stack */
+#ifdef CONFIG_USE_IRQ
+#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
+#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
+#endif
+
+/*
+ * Physical Memory Map
+ */
+#define CONFIG_NR_DRAM_BANKS 4 /* we have 2 banks of DRAM */
+#define PHYS_SDRAM_1 0xa0000000 /* SDRAM Bank #1 */
+#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
+#define PHYS_SDRAM_2 0xa4000000 /* SDRAM Bank #2 */
+#define PHYS_SDRAM_2_SIZE 0x00000000 /* 0 MB */
+#define PHYS_SDRAM_3 0xa8000000 /* SDRAM Bank #3 */
+#define PHYS_SDRAM_3_SIZE 0x00000000 /* 0 MB */
+#define PHYS_SDRAM_4 0xac000000 /* SDRAM Bank #4 */
+#define PHYS_SDRAM_4_SIZE 0x00000000 /* 0 MB */
+
+#define CFG_DRAM_BASE 0x80000000 /* at CS0 */
+#define CFG_DRAM_SIZE 0x04000000 /* 64 MB Ram */
+
+#undef CFG_SKIP_DRAM_SCRUB
+
+
+/*
+ * NAND Flash
+ */
+/* Use the new NAND code. (BOARDLIBS = drivers/nand/libnand.a required) */
+#define CONFIG_NEW_NAND_CODE
+#define CFG_NAND0_BASE 0x0
+#undef CFG_NAND1_BASE
+
+#define CFG_NAND_BASE_LIST { CFG_NAND0_BASE }
+#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
+
+/* nand timeout values */
+#define CFG_NAND_PROG_ERASE_TO 3000
+#define CFG_NAND_OTHER_TO 100
+#define CFG_NAND_SENDCMD_RETRY 3
+#undef NAND_ALLOW_ERASE_ALL /* Allow erasing bad blocks - don't use */
+
+/* NAND Timing Parameters (in ns) */
+#define NAND_TIMING_tCH 10
+#define NAND_TIMING_tCS 0
+#define NAND_TIMING_tWH 20
+#define NAND_TIMING_tWP 40
+
+#define NAND_TIMING_tRH 20
+#define NAND_TIMING_tRP 40
+
+#define NAND_TIMING_tR 11123
+#define NAND_TIMING_tWHR 100
+#define NAND_TIMING_tAR 10
+
+/* NAND debugging */
+#define CFG_DFC_DEBUG1 /* usefull */
+#undef CFG_DFC_DEBUG2 /* noisy */
+#undef CFG_DFC_DEBUG3 /* extremly noisy */
+
+#define CONFIG_MTD_DEBUG
+#define CONFIG_MTD_DEBUG_VERBOSE 1
+
+#define ADDR_COLUMN 1
+#define ADDR_PAGE 2
+#define ADDR_COLUMN_PAGE 3
+
+#define NAND_ChipID_UNKNOWN 0x00
+#define NAND_MAX_FLOORS 1
+#define NAND_MAX_CHIPS 1
+
+#define CFG_NO_FLASH 1
+
+#define CFG_ENV_IS_IN_NAND 1
+#define CFG_ENV_OFFSET 0x40000
+#define CFG_ENV_OFFSET_REDUND 0x44000
+#define CFG_ENV_SIZE 0x4000
+
+
+#endif /* __CONFIG_H */
diff --git a/include/crc.h b/include/crc.h
new file mode 100644
index 0000000000..10560c9fa9
--- /dev/null
+++ b/include/crc.h
@@ -0,0 +1,100 @@
+/*
+ *==========================================================================
+ *
+ * crc.h
+ *
+ * Interface for the CRC algorithms.
+ *
+ *==========================================================================
+ *####ECOSGPLCOPYRIGHTBEGIN####
+ * -------------------------------------------
+ * This file is part of eCos, the Embedded Configurable Operating System.
+ * Copyright (C) 2002 Andrew Lunn
+ *
+ * eCos is free software; you can redistribute it and/or modify it under
+ * the terms of the GNU General Public License as published by the Free
+ * Software Foundation; either version 2 or (at your option) any later version.
+ *
+ * eCos is distributed in the hope that it will be useful, but WITHOUT ANY
+ * WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with eCos; if not, write to the Free Software Foundation, Inc.,
+ * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+ *
+ * As a special exception, if other files instantiate templates or use macros
+ * or inline functions from this file, or you compile this file and link it
+ * with other works to produce a work based on this file, this file does not
+ * by itself cause the resulting work to be covered by the GNU General Public
+ * License. However the source code for this file must still be made available
+ * in accordance with section (3) of the GNU General Public License.
+ *
+ * This exception does not invalidate any other reasons why a work based on
+ * this file might be covered by the GNU General Public License.
+ *
+ * Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
+ * at http: *sources.redhat.com/ecos/ecos-license/
+ * -------------------------------------------
+ *####ECOSGPLCOPYRIGHTEND####
+ *==========================================================================
+ *#####DESCRIPTIONBEGIN####
+ *
+ * Author(s): Andrew Lunn
+ * Contributors: Andrew Lunn
+ * Date: 2002-08-06
+ * Purpose:
+ * Description:
+ *
+ * This code is part of eCos (tm).
+ *
+ *####DESCRIPTIONEND####
+ *
+ *==========================================================================
+ */
+
+#ifndef _SERVICES_CRC_CRC_H_
+#define _SERVICES_CRC_CRC_H_
+
+#include <linux/types.h>
+
+#ifndef __externC
+# ifdef __cplusplus
+# define __externC extern "C"
+# else
+# define __externC extern
+# endif
+#endif
+
+/* Compute a CRC, using the POSIX 1003 definition */
+extern uint32_t
+cyg_posix_crc32(unsigned char *s, int len);
+
+/* Gary S. Brown's 32 bit CRC */
+
+extern uint32_t
+cyg_crc32(unsigned char *s, int len);
+
+/* Gary S. Brown's 32 bit CRC, but accumulate the result from a */
+/* previous CRC calculation */
+
+extern uint32_t
+cyg_crc32_accumulate(uint32_t crc, unsigned char *s, int len);
+
+/* Ethernet FCS Algorithm */
+
+extern uint32_t
+cyg_ether_crc32(unsigned char *s, int len);
+
+/* Ethernet FCS algorithm, but accumulate the result from a previous */
+/* CRC calculation. */
+
+extern uint32_t
+cyg_ether_crc32_accumulate(uint32_t crc, unsigned char *s, int len);
+
+/* 16 bit CRC with polynomial x^16+x^12+x^5+1 */
+
+extern uint16_t cyg_crc16(unsigned char *s, int len);
+
+#endif /* _SERVICES_CRC_CRC_H_ */
diff --git a/include/da9030.h b/include/da9030.h
new file mode 100644
index 0000000000..41108b9b36
--- /dev/null
+++ b/include/da9030.h
@@ -0,0 +1,106 @@
+/*
+ * (C) Copyright 2006 DENX Software Engineering
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/* DA9030 register definitions */
+#define CID 0x00
+#define EVENT_A 0x01
+#define EVENT_B 0x02
+#define EVENT_C 0x03
+#define STATUS 0x04
+#define IRQ_MASK_A 0x05
+#define IRQ_MASK_B 0x06
+#define IRQ_MASK_C 0x07
+#define SYS_CONTROL_A 0x08
+#define SYS_CONTROL_B 0x09
+#define FAULT_LOG 0x0A
+#define LDO_10_11 0x10
+#define LDO_15 0x11
+#define LDO_14_16 0x12
+#define LDO_18_19 0x13
+#define LDO_17_SIMCP0 0x14
+#define BUCK2_DVC1 0x15
+#define BUCK2_DVC2 0x16
+#define REG_CONTROL_1_17 0x17
+#define REG_CONTROL_2_18 0x18
+#define USBPUMP 0x19
+#define SLEEP_CONTROL 0x1A
+#define STARTUP_CONTROL 0x1B
+#define LED1_CONTROL 0x20
+#define LED2_CONTROL 0x21
+#define LED3_CONTROL 0x22
+#define LED4_CONTROL 0x23
+#define LEDPC_CONTROL 0x24
+#define WLED_CONTROL 0x25
+#define MISC_CONTROLA 0x26
+#define MISC_CONTROLB 0x27
+#define CHARGE_CONTROL 0x28
+#define CCTR_CONTROL 0x29
+#define TCTR_CONTROL 0x2A
+#define CHARGE_PULSE 0x2B
+
+/* ... some missing ...*/
+
+#define LDO1 0x90
+#define LDO2_3 0x91
+#define LDO4_5 0x92
+#define LDO6_SIMCP 0x93
+#define LDO7_8 0x94
+#define LDO9_12 0x95
+#define BUCK 0x96
+#define REG_CONTROL_1_97 0x97
+#define REG_CONTROL_2_98 0x98
+#define REG_SLEEP_CONTROL1 0x99
+#define REG_SLEEP_CONTROL2 0x9A
+#define REG_SLEEP_CONTROL3 0x9B
+#define ADC_MAN_CONTROL 0xA0
+#define ADC_AUTO_CONTROL 0xA1
+#define VBATMON 0xA2
+#define VBATMONTXMON 0xA3
+#define TBATHIGHP 0xA4
+#define TBATHIGHN 0xA5
+#define TBATLOW 0xA6
+#define MAN_RES 0xB0
+#define VBAT_RES 0xB1
+#define VBATMIN_RES 0xB2
+#define VBATMINTXON_RES 0xB3
+#define ICHMAX_RES 0xB4
+#define ICHMIN_RES 0xB5
+#define ICHAVERAGE_RES 0xB6
+#define VCHMAX_RES 0xB7
+#define VCHMIN_RES 0xB8
+#define TBAT_RES 0xB9
+#define ADC_IN4_RES 0xBA
+
+#define STATUS_ONKEY_N 0x1 /* current ONKEY_N value */
+#define STATUS_PWREN1 (1<<1) /* PWREN1 value */
+#define STATUS_EXTON (1<<2) /* EXTON value */
+#define STATUS_CHDET (1<<3) /* Charger detection status */
+#define STATUS_TBAT (1<<4) /* Battery over/under temperature status */
+#define STATUS_VBATMON (1<<5) /* VBATMON comparison status */
+#define STATUS_VBATMONTXON (1<<6) /* VBATMONTXON comparison status */
+#define STATUS_CHIOVER (1<<7) /* Charge overcurrent */
+
+#define SYS_CONTROL_A_SLEEP_N_PIN_ENABLE 0x1
+#define SYS_CONTROL_A_SHUT_DOWN (1<<1)
+#define SYS_CONTROL_A_HWRES_ENABLE (1<<2)
+#define SYS_CONTROL_A_WDOG_ACTION (1<<3)
+#define SYS_CONTROL_A_WATCHDOG (1<<7)
diff --git a/include/environment.h b/include/environment.h
index bb109649f6..6e34e37021 100644
--- a/include/environment.h
+++ b/include/environment.h
@@ -60,7 +60,7 @@
# if defined(CFG_ENV_ADDR_REDUND) && !defined(CFG_ENV_SIZE_REDUND)
# define CFG_ENV_SIZE_REDUND CFG_ENV_SIZE
# endif
-# if (CFG_ENV_ADDR >= CFG_MONITOR_BASE) && \
+# if ((!defined (ENV_IS_VARIABLE)) || !ENV_IS_VARIABLE) && (CFG_ENV_ADDR >= CFG_MONITOR_BASE) && \
(CFG_ENV_ADDR+CFG_ENV_SIZE) <= (CFG_MONITOR_BASE + CFG_MONITOR_LEN)
# define ENV_IS_EMBEDDED 1
# endif
@@ -69,6 +69,18 @@
# endif
#endif /* CFG_ENV_IS_IN_FLASH */
+#if defined(CFG_ENV_IS_IN_NAND)
+# ifndef CFG_ENV_OFFSET
+# error "Need to define CFG_ENV_OFFSET when using CFG_ENV_IS_IN_NAND"
+# endif
+# ifndef CFG_ENV_SIZE
+# error "Need to define CFG_ENV_SIZE when using CFG_ENV_IS_IN_NAND"
+# endif
+# ifdef CFG_ENV_OFFSET_REDUND
+# define CFG_REDUNDAND_ENVIRONMENT
+# endif
+#endif /* CFG_ENV_IS_IN_NAND */
+
#ifdef CFG_REDUNDAND_ENVIRONMENT
# define ENV_HEADER_SIZE (sizeof(unsigned long) + 1)
diff --git a/include/flash.h b/include/flash.h
index decb046c53..84b48a9f2e 100644
--- a/include/flash.h
+++ b/include/flash.h
@@ -45,6 +45,7 @@ typedef struct {
ushort vendor; /* the primary vendor id */
ushort cmd_reset; /* Vendor specific reset command */
ushort interface; /* used for x8/x16 adjustments */
+ ushort legacy_unlock; /* support Intel legacy (un)locking */
#endif
} flash_info_t;
@@ -233,6 +234,7 @@ extern void flash_read_factory_serial(flash_info_t * info, void * buffer, int of
#define SST_ID_xF3202 0x235A235A /* 39xF3202 ID (32M = 2M x 16 ) */
#define SST_ID_xF6401 0x236B236B /* 39xF6401 ID (64M = 4M x 16 ) */
#define SST_ID_xF6402 0x236A236A /* 39xF6402 ID (64M = 4M x 16 ) */
+#define SST_ID_xF020 0xBFD6BFD6 /* 39xF020 ID (256KB = 2Mbit x 8) */
#define SST_ID_xF040 0xBFD7BFD7 /* 39xF040 ID (512KB = 4Mbit x 8) */
#define STM_ID_F040B 0xE2 /* M29F040B ID ( 4M = 512K x 8 ) */
@@ -242,6 +244,7 @@ extern void flash_read_factory_serial(flash_info_t * info, void * buffer, int of
#define STM_ID_29W320DT 0x22CA22CA /* M29W320DT ID (32 M, top boot sector) */
#define STM_ID_29W320DB 0x22CB22CB /* M29W320DB ID (32 M, bottom boot sect) */
#define STM_ID_29W040B 0x00E300E3 /* M29W040B ID (4M = 512K x 8) */
+#define FLASH_PSD4256GV 0x00E9 /* PSD4256 Flash and CPLD combination */
#define INTEL_ID_28F016S 0x66a066a0 /* 28F016S[VS] ID (16M = 512k x 16) */
#define INTEL_ID_28F800B3T 0x88928892 /* 8M = 512K x 16 top boot sector */
@@ -269,10 +272,17 @@ extern void flash_read_factory_serial(flash_info_t * info, void * buffer, int of
#define INTEL_ID_28F320J3A 0x00160016 /* 32M = 128K x 32 */
#define INTEL_ID_28F640J3A 0x00170017 /* 64M = 128K x 64 */
#define INTEL_ID_28F128J3A 0x00180018 /* 128M = 128K x 128 */
+#define INTEL_ID_28F256J3A 0x001D001D /* 256M = 128K x 256 */
#define INTEL_ID_28F256L18T 0x880D880D /* 256M = 128K x 255 + 32k x 4 */
#define INTEL_ID_28F64K3 0x88018801 /* 64M = 32K x 255 + 32k x 4 */
#define INTEL_ID_28F128K3 0x88028802 /* 128M = 64K x 255 + 32k x 4 */
#define INTEL_ID_28F256K3 0x88038803 /* 256M = 128K x 255 + 32k x 4 */
+#define INTEL_ID_28F64P30T 0x88178817 /* 64M = 32K x 255 + 32k x 4 */
+#define INTEL_ID_28F64P30B 0x881A881A /* 64M = 32K x 255 + 32k x 4 */
+#define INTEL_ID_28F128P30T 0x88188818 /* 128M = 64K x 255 + 32k x 4 */
+#define INTEL_ID_28F128P30B 0x881B881B /* 128M = 64K x 255 + 32k x 4 */
+#define INTEL_ID_28F256P30T 0x88198819 /* 256M = 128K x 255 + 32k x 4 */
+#define INTEL_ID_28F256P30B 0x881C881C /* 256M = 128K x 255 + 32k x 4 */
#define INTEL_ID_28F160S3 0x00D000D0 /* 16M = 512K x 32 (64kB x 32) */
#define INTEL_ID_28F320S3 0x00D400D4 /* 32M = 512K x 64 (64kB x 64) */
@@ -334,6 +344,7 @@ extern void flash_read_factory_serial(flash_info_t * info, void * buffer, int of
#define FLASH_SST160A 0x0046 /* SST 39xF160A ID ( 16M = 1M x 16 ) */
#define FLASH_SST320 0x0048 /* SST 39xF160A ID ( 16M = 1M x 16 ) */
#define FLASH_SST640 0x004A /* SST 39xF160A ID ( 16M = 1M x 16 ) */
+#define FLASH_SST020 0x0024 /* SST 39xF020 ID (256KB = 2Mbit x 8 ) */
#define FLASH_SST040 0x000E /* SST 39xF040 ID (512KB = 4Mbit x 8 ) */
#define FLASH_STM800AB 0x0051 /* STM M29WF800AB ( 8M = 512K x 16 ) */
@@ -401,6 +412,7 @@ extern void flash_read_factory_serial(flash_info_t * info, void * buffer, int of
#define FLASH_28F320J3A 0x00C0 /* INTEL 28F320J3A ( 32M = 128K x 32) */
#define FLASH_28F640J3A 0x00C2 /* INTEL 28F640J3A ( 64M = 128K x 64) */
#define FLASH_28F128J3A 0x00C4 /* INTEL 28F128J3A (128M = 128K x 128) */
+#define FLASH_28F256J3A 0x00C6 /* INTEL 28F256J3A (256M = 128K x 256) */
#define FLASH_FUJLV650 0x00D0 /* Fujitsu MBM 29LV650UE/651UE */
#define FLASH_MT28S4M16LC 0x00E1 /* Micron MT28S4M16LC */
diff --git a/include/ft_build.h b/include/ft_build.h
index 9104b1a555..47ca575d9f 100644
--- a/include/ft_build.h
+++ b/include/ft_build.h
@@ -57,10 +57,12 @@ void ft_prop_int(struct ft_cxt *cxt, const char *name, int val);
void ft_begin(struct ft_cxt *cxt, void *blob, int max_size);
void ft_add_rsvmap(struct ft_cxt *cxt, u64 physaddr, u64 size);
-void ft_setup(void *blob, int size, bd_t * bd);
+void ft_setup(void *blob, int size, bd_t * bd, ulong initrd_start, ulong initrd_end);
void ft_dump_blob(const void *bphp);
void ft_merge_blob(struct ft_cxt *cxt, void *blob);
void *ft_get_prop(void *bphp, const char *propname, int *szp);
+void ft_board_setup(void *blob, bd_t *bd);
+
#endif
diff --git a/include/galileo/core.h b/include/galileo/core.h
index 0735d075b3..49f4dd2d21 100644
--- a/include/galileo/core.h
+++ b/include/galileo/core.h
@@ -110,7 +110,10 @@ extern unsigned int INTERNAL_REG_BASE_ADDR;
#define _1G 0x40000000
#define _2G 0x80000000
+#ifndef BOOL_WAS_DEFINED
+#define BOOL_WAS_DEFINED
typedef enum _bool{false,true} bool;
+#endif
/* Little to Big endian conversion macros */
diff --git a/include/image.h b/include/image.h
index af37bcad5a..139df0b2d1 100644
--- a/include/image.h
+++ b/include/image.h
@@ -75,6 +75,7 @@
#define IH_CPU_NIOS 13 /* Nios-32 */
#define IH_CPU_MICROBLAZE 14 /* MicroBlaze */
#define IH_CPU_NIOS2 15 /* Nios-II */
+#define IH_CPU_BLACKFIN 16 /* Blackfin */
/*
* Image Types
diff --git a/include/linux/mtd/bbm.h b/include/linux/mtd/bbm.h
new file mode 100644
index 0000000000..71a20ae2b0
--- /dev/null
+++ b/include/linux/mtd/bbm.h
@@ -0,0 +1,124 @@
+/*
+ * linux/include/linux/mtd/bbm.h
+ *
+ * NAND family Bad Block Management (BBM) header file
+ * - Bad Block Table (BBT) implementation
+ *
+ * Copyright (c) 2005 Samsung Electronics
+ * Kyungmin Park <kyungmin.park@samsung.com>
+ *
+ * Copyright (c) 2000-2005
+ * Thomas Gleixner <tglx@linuxtronix.de>
+ *
+ */
+#ifndef __LINUX_MTD_BBM_H
+#define __LINUX_MTD_BBM_H
+
+/* The maximum number of NAND chips in an array */
+#ifndef NAND_MAX_CHIPS
+#define NAND_MAX_CHIPS 8
+#endif
+
+/**
+ * struct nand_bbt_descr - bad block table descriptor
+ * @param options options for this descriptor
+ * @param pages the page(s) where we find the bbt, used with
+ * option BBT_ABSPAGE when bbt is searched,
+ * then we store the found bbts pages here.
+ * Its an array and supports up to 8 chips now
+ * @param offs offset of the pattern in the oob area of the page
+ * @param veroffs offset of the bbt version counter in the oob are of the page
+ * @param version version read from the bbt page during scan
+ * @param len length of the pattern, if 0 no pattern check is performed
+ * @param maxblocks maximum number of blocks to search for a bbt. This number of
+ * blocks is reserved at the end of the device
+ * where the tables are written.
+ * @param reserved_block_code if non-0, this pattern denotes a reserved
+ * (rather than bad) block in the stored bbt
+ * @param pattern pattern to identify bad block table or factory marked
+ * good / bad blocks, can be NULL, if len = 0
+ *
+ * Descriptor for the bad block table marker and the descriptor for the
+ * pattern which identifies good and bad blocks. The assumption is made
+ * that the pattern and the version count are always located in the oob area
+ * of the first block.
+ */
+struct nand_bbt_descr {
+ int options;
+ int pages[NAND_MAX_CHIPS];
+ int offs;
+ int veroffs;
+ uint8_t version[NAND_MAX_CHIPS];
+ int len;
+ int maxblocks;
+ int reserved_block_code;
+ uint8_t *pattern;
+};
+
+/* Options for the bad block table descriptors */
+
+/* The number of bits used per block in the bbt on the device */
+#define NAND_BBT_NRBITS_MSK 0x0000000F
+#define NAND_BBT_1BIT 0x00000001
+#define NAND_BBT_2BIT 0x00000002
+#define NAND_BBT_4BIT 0x00000004
+#define NAND_BBT_8BIT 0x00000008
+/* The bad block table is in the last good block of the device */
+#define NAND_BBT_LASTBLOCK 0x00000010
+/* The bbt is at the given page, else we must scan for the bbt */
+#define NAND_BBT_ABSPAGE 0x00000020
+/* The bbt is at the given page, else we must scan for the bbt */
+#define NAND_BBT_SEARCH 0x00000040
+/* bbt is stored per chip on multichip devices */
+#define NAND_BBT_PERCHIP 0x00000080
+/* bbt has a version counter at offset veroffs */
+#define NAND_BBT_VERSION 0x00000100
+/* Create a bbt if none axists */
+#define NAND_BBT_CREATE 0x00000200
+/* Search good / bad pattern through all pages of a block */
+#define NAND_BBT_SCANALLPAGES 0x00000400
+/* Scan block empty during good / bad block scan */
+#define NAND_BBT_SCANEMPTY 0x00000800
+/* Write bbt if neccecary */
+#define NAND_BBT_WRITE 0x00001000
+/* Read and write back block contents when writing bbt */
+#define NAND_BBT_SAVECONTENT 0x00002000
+/* Search good / bad pattern on the first and the second page */
+#define NAND_BBT_SCAN2NDPAGE 0x00004000
+
+/* The maximum number of blocks to scan for a bbt */
+#define NAND_BBT_SCAN_MAXBLOCKS 4
+
+/*
+ * Constants for oob configuration
+ */
+#define ONENAND_BADBLOCK_POS 0
+
+/**
+ * struct bbt_info - [GENERIC] Bad Block Table data structure
+ * @param bbt_erase_shift [INTERN] number of address bits in a bbt entry
+ * @param badblockpos [INTERN] position of the bad block marker in the oob area
+ * @param bbt [INTERN] bad block table pointer
+ * @param badblock_pattern [REPLACEABLE] bad block scan pattern used for initial bad block scan
+ * @param priv [OPTIONAL] pointer to private bbm date
+ */
+struct bbm_info {
+ int bbt_erase_shift;
+ int badblockpos;
+ int options;
+
+ uint8_t *bbt;
+
+ int (*isbad_bbt)(struct mtd_info *mtd, loff_t ofs, int allowbbt);
+
+ /* TODO Add more NAND specific fileds */
+ struct nand_bbt_descr *badblock_pattern;
+
+ void *priv;
+};
+
+/* OneNAND BBT interface */
+extern int onenand_scan_bbt(struct mtd_info *mtd, struct nand_bbt_descr *bd);
+extern int onenand_default_bbt(struct mtd_info *mtd);
+
+#endif /* __LINUX_MTD_BBM_H */
diff --git a/include/linux/mtd/compat.h b/include/linux/mtd/compat.h
new file mode 100644
index 0000000000..460cd45c80
--- /dev/null
+++ b/include/linux/mtd/compat.h
@@ -0,0 +1,44 @@
+#ifndef _LINUX_COMPAT_H_
+#define _LINUX_COMPAT_H_
+
+#define __user
+#define __iomem
+
+#define ndelay(x) udelay(1)
+
+#define printk printf
+
+#define KERN_EMERG
+#define KERN_ALERT
+#define KERN_CRIT
+#define KERN_ERR
+#define KERN_WARNING
+#define KERN_NOTICE
+#define KERN_INFO
+#define KERN_DEBUG
+
+#define kmalloc(size, flags) malloc(size)
+#define kfree(ptr) free(ptr)
+
+/*
+ * ..and if you can't take the strict
+ * types, you can specify one yourself.
+ *
+ * Or not use min/max at all, of course.
+ */
+#define min_t(type,x,y) \
+ ({ type __x = (x); type __y = (y); __x < __y ? __x: __y; })
+#define max_t(type,x,y) \
+ ({ type __x = (x); type __y = (y); __x > __y ? __x: __y; })
+
+#define BUG() do { \
+ printf("U-Boot BUG at %s:%d!\n", __FILE__, __LINE__); \
+} while (0)
+
+#define BUG_ON(condition) do { if (condition) BUG(); } while(0)
+
+#define likely(x) __builtin_expect(!!(x), 1)
+#define unlikely(x) __builtin_expect(!!(x), 0)
+
+#define PAGE_SIZE 4096
+#endif
diff --git a/include/linux/mtd/doc2000.h b/include/linux/mtd/doc2000.h
index ebf9a76924..eeb1d7e98e 100644
--- a/include/linux/mtd/doc2000.h
+++ b/include/linux/mtd/doc2000.h
@@ -91,6 +91,13 @@ struct DiskOnChip;
#define ADDR_PAGE 2
#define ADDR_COLUMN_PAGE 3
+struct Nand {
+ char floor, chip;
+ unsigned long curadr;
+ unsigned char curmode;
+ /* Also some erase/write/pipeline info when we get that far */
+};
+
struct DiskOnChip {
unsigned long physadr;
unsigned long virtadr;
@@ -148,4 +155,62 @@ void doc_probe(unsigned long physadr);
void doc_print(struct DiskOnChip*);
+/*
+ * Standard NAND flash commands
+ */
+#define NAND_CMD_READ0 0
+#define NAND_CMD_READ1 1
+#define NAND_CMD_PAGEPROG 0x10
+#define NAND_CMD_READOOB 0x50
+#define NAND_CMD_ERASE1 0x60
+#define NAND_CMD_STATUS 0x70
+#define NAND_CMD_SEQIN 0x80
+#define NAND_CMD_READID 0x90
+#define NAND_CMD_ERASE2 0xd0
+#define NAND_CMD_RESET 0xff
+
+/*
+ * NAND Flash Manufacturer ID Codes
+ */
+#define NAND_MFR_TOSHIBA 0x98
+#define NAND_MFR_SAMSUNG 0xec
+
+/*
+ * NAND Flash Device ID Structure
+ *
+ * Structure overview:
+ *
+ * name - Complete name of device
+ *
+ * manufacture_id - manufacturer ID code of device.
+ *
+ * model_id - model ID code of device.
+ *
+ * chipshift - total number of address bits for the device which
+ * is used to calculate address offsets and the total
+ * number of bytes the device is capable of.
+ *
+ * page256 - denotes if flash device has 256 byte pages or not.
+ *
+ * pageadrlen - number of bytes minus one needed to hold the
+ * complete address into the flash array. Keep in
+ * mind that when a read or write is done to a
+ * specific address, the address is input serially
+ * 8 bits at a time. This structure member is used
+ * by the read/write routines as a loop index for
+ * shifting the address out 8 bits at a time.
+ *
+ * erasesize - size of an erase block in the flash device.
+ */
+struct nand_flash_dev {
+ char * name;
+ int manufacture_id;
+ int model_id;
+ int chipshift;
+ char page256;
+ char pageadrlen;
+ unsigned long erasesize;
+ int bus16;
+};
+
#endif /* __MTD_DOC2000_H__ */
diff --git a/include/linux/mtd/mtd-abi.h b/include/linux/mtd/mtd-abi.h
new file mode 100644
index 0000000000..3d1d416810
--- /dev/null
+++ b/include/linux/mtd/mtd-abi.h
@@ -0,0 +1,99 @@
+/*
+ * $Id: mtd-abi.h,v 1.7 2004/11/23 15:37:32 gleixner Exp $
+ *
+ * Portions of MTD ABI definition which are shared by kernel and user space
+ */
+
+#ifndef __MTD_ABI_H__
+#define __MTD_ABI_H__
+
+struct erase_info_user {
+ uint32_t start;
+ uint32_t length;
+};
+
+struct mtd_oob_buf {
+ uint32_t start;
+ uint32_t length;
+ unsigned char *ptr;
+};
+
+#define MTD_ABSENT 0
+#define MTD_RAM 1
+#define MTD_ROM 2
+#define MTD_NORFLASH 3
+#define MTD_NANDFLASH 4
+#define MTD_PEROM 5
+#define MTD_OTHER 14
+#define MTD_UNKNOWN 15
+
+#define MTD_CLEAR_BITS 1 /* Bits can be cleared (flash) */
+#define MTD_SET_BITS 2 /* Bits can be set */
+#define MTD_ERASEABLE 4 /* Has an erase function */
+#define MTD_WRITEB_WRITEABLE 8 /* Direct IO is possible */
+#define MTD_VOLATILE 16 /* Set for RAMs */
+#define MTD_XIP 32 /* eXecute-In-Place possible */
+#define MTD_OOB 64 /* Out-of-band data (NAND flash) */
+#define MTD_ECC 128 /* Device capable of automatic ECC */
+#define MTD_NO_VIRTBLOCKS 256 /* Virtual blocks not allowed */
+
+/* Some common devices / combinations of capabilities */
+#define MTD_CAP_ROM 0
+#define MTD_CAP_RAM (MTD_CLEAR_BITS|MTD_SET_BITS|MTD_WRITEB_WRITEABLE)
+#define MTD_CAP_NORFLASH (MTD_CLEAR_BITS|MTD_ERASEABLE)
+#define MTD_CAP_NANDFLASH (MTD_CLEAR_BITS|MTD_ERASEABLE|MTD_OOB)
+#define MTD_WRITEABLE (MTD_CLEAR_BITS|MTD_SET_BITS)
+
+
+/* Types of automatic ECC/Checksum available */
+#define MTD_ECC_NONE 0 /* No automatic ECC available */
+#define MTD_ECC_RS_DiskOnChip 1 /* Automatic ECC on DiskOnChip */
+#define MTD_ECC_SW 2 /* SW ECC for Toshiba & Samsung devices */
+
+/* ECC byte placement */
+#define MTD_NANDECC_OFF 0 /* Switch off ECC (Not recommended) */
+#define MTD_NANDECC_PLACE 1 /* Use the given placement in the structure (YAFFS1 legacy mode) */
+#define MTD_NANDECC_AUTOPLACE 2 /* Use the default placement scheme */
+#define MTD_NANDECC_PLACEONLY 3 /* Use the given placement in the structure (Do not store ecc result on read) */
+#define MTD_NANDECC_AUTOPL_USR 4 /* Use the given autoplacement scheme rather than using the default */
+
+struct mtd_info_user {
+ uint8_t type;
+ uint32_t flags;
+ uint32_t size; /* Total size of the MTD */
+ uint32_t erasesize;
+ uint32_t oobblock; /* Size of OOB blocks (e.g. 512) */
+ uint32_t oobsize; /* Amount of OOB data per block (e.g. 16) */
+ uint32_t ecctype;
+ uint32_t eccsize;
+};
+
+struct region_info_user {
+ uint32_t offset; /* At which this region starts,
+ * from the beginning of the MTD */
+ uint32_t erasesize; /* For this region */
+ uint32_t numblocks; /* Number of blocks in this region */
+ uint32_t regionindex;
+};
+
+#define MEMGETINFO _IOR('M', 1, struct mtd_info_user)
+#define MEMERASE _IOW('M', 2, struct erase_info_user)
+#define MEMWRITEOOB _IOWR('M', 3, struct mtd_oob_buf)
+#define MEMREADOOB _IOWR('M', 4, struct mtd_oob_buf)
+#define MEMLOCK _IOW('M', 5, struct erase_info_user)
+#define MEMUNLOCK _IOW('M', 6, struct erase_info_user)
+#define MEMGETREGIONCOUNT _IOR('M', 7, int)
+#define MEMGETREGIONINFO _IOWR('M', 8, struct region_info_user)
+#define MEMSETOOBSEL _IOW('M', 9, struct nand_oobinfo)
+#define MEMGETOOBSEL _IOR('M', 10, struct nand_oobinfo)
+#define MEMGETBADBLOCK _IOW('M', 11, loff_t)
+#define MEMSETBADBLOCK _IOW('M', 12, loff_t)
+
+struct nand_oobinfo {
+ uint32_t useecc;
+ uint32_t eccbytes;
+ uint32_t oobfree[8][2];
+ uint32_t eccpos[32];
+};
+
+#endif /* __MTD_ABI_H__ */
diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h
new file mode 100644
index 0000000000..13e90803a1
--- /dev/null
+++ b/include/linux/mtd/mtd.h
@@ -0,0 +1,214 @@
+/*
+ * $Id: mtd.h,v 1.56 2004/08/09 18:46:04 dmarlin Exp $
+ *
+ * Copyright (C) 1999-2003 David Woodhouse <dwmw2@infradead.org> et al.
+ *
+ * Released under GPL
+ */
+
+#ifndef __MTD_MTD_H__
+#define __MTD_MTD_H__
+#include <linux/types.h>
+#include <linux/mtd/mtd-abi.h>
+
+#define MAX_MTD_DEVICES 16
+
+#define MTD_ERASE_PENDING 0x01
+#define MTD_ERASING 0x02
+#define MTD_ERASE_SUSPEND 0x04
+#define MTD_ERASE_DONE 0x08
+#define MTD_ERASE_FAILED 0x10
+
+/* If the erase fails, fail_addr might indicate exactly which block failed. If
+ fail_addr = 0xffffffff, the failure was not at the device level or was not
+ specific to any particular block. */
+struct erase_info {
+ struct mtd_info *mtd;
+ u_int32_t addr;
+ u_int32_t len;
+ u_int32_t fail_addr;
+ u_long time;
+ u_long retries;
+ u_int dev;
+ u_int cell;
+ void (*callback) (struct erase_info *self);
+ u_long priv;
+ u_char state;
+ struct erase_info *next;
+};
+
+struct mtd_erase_region_info {
+ u_int32_t offset; /* At which this region starts, from the beginning of the MTD */
+ u_int32_t erasesize; /* For this region */
+ u_int32_t numblocks; /* Number of blocks of erasesize in this region */
+};
+
+struct mtd_info {
+ u_char type;
+ u_int32_t flags;
+ u_int32_t size; /* Total size of the MTD */
+
+ /* "Major" erase size for the device. Naïve users may take this
+ * to be the only erase size available, or may use the more detailed
+ * information below if they desire
+ */
+ u_int32_t erasesize;
+
+ u_int32_t oobblock; /* Size of OOB blocks (e.g. 512) */
+ u_int32_t oobsize; /* Amount of OOB data per block (e.g. 16) */
+ u_int32_t oobavail; /* Number of bytes in OOB area available for fs */
+ u_int32_t ecctype;
+ u_int32_t eccsize;
+
+
+ /* Kernel-only stuff starts here. */
+ char *name;
+ int index;
+
+ /* oobinfo is a nand_oobinfo structure, which can be set by iotcl (MEMSETOOBINFO) */
+ struct nand_oobinfo oobinfo;
+
+ /* Data for variable erase regions. If numeraseregions is zero,
+ * it means that the whole device has erasesize as given above.
+ */
+ int numeraseregions;
+ struct mtd_erase_region_info *eraseregions;
+
+ /* This really shouldn't be here. It can go away in 2.5 */
+ u_int32_t bank_size;
+
+ int (*erase) (struct mtd_info *mtd, struct erase_info *instr);
+
+ /* This stuff for eXecute-In-Place */
+ int (*point) (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char **mtdbuf);
+
+ /* We probably shouldn't allow XIP if the unpoint isn't a NULL */
+ void (*unpoint) (struct mtd_info *mtd, u_char * addr, loff_t from, size_t len);
+
+
+ int (*read) (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf);
+ int (*write) (struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, const u_char *buf);
+
+ int (*read_ecc) (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf, u_char *eccbuf, struct nand_oobinfo *oobsel);
+ int (*write_ecc) (struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, const u_char *buf, u_char *eccbuf, struct nand_oobinfo *oobsel);
+
+ int (*read_oob) (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf);
+ int (*write_oob) (struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, const u_char *buf);
+
+ /*
+ * Methods to access the protection register area, present in some
+ * flash devices. The user data is one time programmable but the
+ * factory data is read only.
+ */
+ int (*read_user_prot_reg) (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf);
+
+ int (*read_fact_prot_reg) (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf);
+
+ /* This function is not yet implemented */
+ int (*write_user_prot_reg) (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf);
+#if 0
+ /* kvec-based read/write methods. We need these especially for NAND flash,
+ with its limited number of write cycles per erase.
+ NB: The 'count' parameter is the number of _vectors_, each of
+ which contains an (ofs, len) tuple.
+ */
+ int (*readv) (struct mtd_info *mtd, struct kvec *vecs, unsigned long count, loff_t from, size_t *retlen);
+ int (*readv_ecc) (struct mtd_info *mtd, struct kvec *vecs, unsigned long count, loff_t from,
+ size_t *retlen, u_char *eccbuf, struct nand_oobinfo *oobsel);
+ int (*writev) (struct mtd_info *mtd, const struct kvec *vecs, unsigned long count, loff_t to, size_t *retlen);
+ int (*writev_ecc) (struct mtd_info *mtd, const struct kvec *vecs, unsigned long count, loff_t to,
+ size_t *retlen, u_char *eccbuf, struct nand_oobinfo *oobsel);
+#endif
+ /* Sync */
+ void (*sync) (struct mtd_info *mtd);
+#if 0
+ /* Chip-supported device locking */
+ int (*lock) (struct mtd_info *mtd, loff_t ofs, size_t len);
+ int (*unlock) (struct mtd_info *mtd, loff_t ofs, size_t len);
+
+ /* Power Management functions */
+ int (*suspend) (struct mtd_info *mtd);
+ void (*resume) (struct mtd_info *mtd);
+#endif
+ /* Bad block management functions */
+ int (*block_isbad) (struct mtd_info *mtd, loff_t ofs);
+ int (*block_markbad) (struct mtd_info *mtd, loff_t ofs);
+
+ void *priv;
+
+ struct module *owner;
+ int usecount;
+};
+
+
+ /* Kernel-side ioctl definitions */
+
+extern int add_mtd_device(struct mtd_info *mtd);
+extern int del_mtd_device (struct mtd_info *mtd);
+
+extern struct mtd_info *get_mtd_device(struct mtd_info *mtd, int num);
+
+extern void put_mtd_device(struct mtd_info *mtd);
+
+#if 0
+struct mtd_notifier {
+ void (*add)(struct mtd_info *mtd);
+ void (*remove)(struct mtd_info *mtd);
+ struct list_head list;
+};
+
+
+extern void register_mtd_user (struct mtd_notifier *new);
+extern int unregister_mtd_user (struct mtd_notifier *old);
+
+int default_mtd_writev(struct mtd_info *mtd, const struct kvec *vecs,
+ unsigned long count, loff_t to, size_t *retlen);
+
+int default_mtd_readv(struct mtd_info *mtd, struct kvec *vecs,
+ unsigned long count, loff_t from, size_t *retlen);
+#endif
+
+#define MTD_ERASE(mtd, args...) (*(mtd->erase))(mtd, args)
+#define MTD_POINT(mtd, a,b,c,d) (*(mtd->point))(mtd, a,b,c, (u_char **)(d))
+#define MTD_UNPOINT(mtd, arg) (*(mtd->unpoint))(mtd, (u_char *)arg)
+#define MTD_READ(mtd, args...) (*(mtd->read))(mtd, args)
+#define MTD_WRITE(mtd, args...) (*(mtd->write))(mtd, args)
+#define MTD_READV(mtd, args...) (*(mtd->readv))(mtd, args)
+#define MTD_WRITEV(mtd, args...) (*(mtd->writev))(mtd, args)
+#define MTD_READECC(mtd, args...) (*(mtd->read_ecc))(mtd, args)
+#define MTD_WRITEECC(mtd, args...) (*(mtd->write_ecc))(mtd, args)
+#define MTD_READOOB(mtd, args...) (*(mtd->read_oob))(mtd, args)
+#define MTD_WRITEOOB(mtd, args...) (*(mtd->write_oob))(mtd, args)
+#define MTD_SYNC(mtd) do { if (mtd->sync) (*(mtd->sync))(mtd); } while (0)
+
+
+#ifdef CONFIG_MTD_PARTITIONS
+void mtd_erase_callback(struct erase_info *instr);
+#else
+static inline void mtd_erase_callback(struct erase_info *instr)
+{
+ if (instr->callback)
+ instr->callback(instr);
+}
+#endif
+
+/*
+ * Debugging macro and defines
+ */
+#define MTD_DEBUG_LEVEL0 (0) /* Quiet */
+#define MTD_DEBUG_LEVEL1 (1) /* Audible */
+#define MTD_DEBUG_LEVEL2 (2) /* Loud */
+#define MTD_DEBUG_LEVEL3 (3) /* Noisy */
+
+#ifdef CONFIG_MTD_DEBUG
+#define DEBUG(n, args...) \
+ do { \
+ if (n <= CONFIG_MTD_DEBUG_VERBOSE) \
+ printk(KERN_INFO args); \
+ } while(0)
+#else /* CONFIG_MTD_DEBUG */
+#define DEBUG(n, args...) do { } while(0)
+
+#endif /* CONFIG_MTD_DEBUG */
+
+#endif /* __MTD_MTD_H__ */
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index 5236904959..49ff80fd3a 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -2,10 +2,10 @@
* linux/include/linux/mtd/nand.h
*
* Copyright (c) 2000 David Woodhouse <dwmw2@mvhi.com>
- * Steven J. Hill <sjhill@cotw.com>
- * Thomas Gleixner <gleixner@autronix.de>
+ * Steven J. Hill <sjhill@realitydiluted.com>
+ * Thomas Gleixner <tglx@linutronix.de>
*
- * $Id: nand.h,v 1.7 2003/07/24 23:30:46 a0384864 Exp $
+ * $Id: nand.h,v 1.68 2004/11/12 10:40:37 gleixner Exp $
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
@@ -15,15 +15,15 @@
* Contains standard defines and IDs for NAND flash devices
*
* Changelog:
- * 01-31-2000 DMW Created
- * 09-18-2000 SJH Moved structure out of the Disk-On-Chip drivers
+ * 01-31-2000 DMW Created
+ * 09-18-2000 SJH Moved structure out of the Disk-On-Chip drivers
* so it can be used by other NAND flash device
* drivers. I also changed the copyright since none
* of the original contents of this file are specific
* to DoC devices. David can whack me with a baseball
* bat later if I did something naughty.
- * 10-11-2000 SJH Added private NAND flash structure for driver
- * 10-24-2000 SJH Added prototype for 'nand_scan' function
+ * 10-11-2000 SJH Added private NAND flash structure for driver
+ * 10-24-2000 SJH Added prototype for 'nand_scan' function
* 10-29-2001 TG changed nand_chip structure to support
* hardwarespecific function for accessing control lines
* 02-21-2002 TG added support for different read/write adress and
@@ -32,10 +32,65 @@
* command delay times for different chips
* 04-28-2002 TG OOB config defines moved from nand.c to avoid duplicate
* defines in jffs2/wbuf.c
+ * 08-07-2002 TG forced bad block location to byte 5 of OOB, even if
+ * CONFIG_MTD_NAND_ECC_JFFS2 is not set
+ * 08-10-2002 TG extensions to nand_chip structure to support HW-ECC
+ *
+ * 08-29-2002 tglx nand_chip structure: data_poi for selecting
+ * internal / fs-driver buffer
+ * support for 6byte/512byte hardware ECC
+ * read_ecc, write_ecc extended for different oob-layout
+ * oob layout selections: NAND_NONE_OOB, NAND_JFFS2_OOB,
+ * NAND_YAFFS_OOB
+ * 11-25-2002 tglx Added Manufacturer code FUJITSU, NATIONAL
+ * Split manufacturer and device ID structures
+ *
+ * 02-08-2004 tglx added option field to nand structure for chip anomalities
+ * 05-25-2004 tglx added bad block table support, ST-MICRO manufacturer id
+ * update of nand_chip structure description
*/
#ifndef __LINUX_MTD_NAND_H
#define __LINUX_MTD_NAND_H
+#include <linux/mtd/compat.h>
+#include <linux/mtd/mtd.h>
+
+struct mtd_info;
+/* Scan and identify a NAND device */
+extern int nand_scan (struct mtd_info *mtd, int max_chips);
+/* Free resources held by the NAND device */
+extern void nand_release (struct mtd_info *mtd);
+
+/* Read raw data from the device without ECC */
+extern int nand_read_raw (struct mtd_info *mtd, uint8_t *buf, loff_t from, size_t len, size_t ooblen);
+
+
+/* This constant declares the max. oobsize / page, which
+ * is supported now. If you add a chip with bigger oobsize/page
+ * adjust this accordingly.
+ */
+#define NAND_MAX_OOBSIZE 64
+
+/*
+ * Constants for hardware specific CLE/ALE/NCE function
+*/
+/* Select the chip by setting nCE to low */
+#define NAND_CTL_SETNCE 1
+/* Deselect the chip by setting nCE to high */
+#define NAND_CTL_CLRNCE 2
+/* Select the command latch by setting CLE to high */
+#define NAND_CTL_SETCLE 3
+/* Deselect the command latch by setting CLE to low */
+#define NAND_CTL_CLRCLE 4
+/* Select the address latch by setting ALE to high */
+#define NAND_CTL_SETALE 5
+/* Deselect the address latch by setting ALE to low */
+#define NAND_CTL_CLRALE 6
+/* Set write protection by setting WP to high. Not used! */
+#define NAND_CTL_SETWP 7
+/* Clear write protection by setting WP to low. Not used! */
+#define NAND_CTL_CLRWP 8
+
/*
* Standard NAND flash commands
*/
@@ -45,12 +100,104 @@
#define NAND_CMD_READOOB 0x50
#define NAND_CMD_ERASE1 0x60
#define NAND_CMD_STATUS 0x70
+#define NAND_CMD_STATUS_MULTI 0x71
#define NAND_CMD_SEQIN 0x80
#define NAND_CMD_READID 0x90
#define NAND_CMD_ERASE2 0xd0
#define NAND_CMD_RESET 0xff
+/* Extended commands for large page devices */
+#define NAND_CMD_READSTART 0x30
+#define NAND_CMD_CACHEDPROG 0x15
+
+/* Status bits */
+#define NAND_STATUS_FAIL 0x01
+#define NAND_STATUS_FAIL_N1 0x02
+#define NAND_STATUS_TRUE_READY 0x20
+#define NAND_STATUS_READY 0x40
+#define NAND_STATUS_WP 0x80
+
/*
+ * Constants for ECC_MODES
+ */
+
+/* No ECC. Usage is not recommended ! */
+#define NAND_ECC_NONE 0
+/* Software ECC 3 byte ECC per 256 Byte data */
+#define NAND_ECC_SOFT 1
+/* Hardware ECC 3 byte ECC per 256 Byte data */
+#define NAND_ECC_HW3_256 2
+/* Hardware ECC 3 byte ECC per 512 Byte data */
+#define NAND_ECC_HW3_512 3
+/* Hardware ECC 3 byte ECC per 512 Byte data */
+#define NAND_ECC_HW6_512 4
+/* Hardware ECC 8 byte ECC per 512 Byte data */
+#define NAND_ECC_HW8_512 6
+/* Hardware ECC 12 byte ECC per 2048 Byte data */
+#define NAND_ECC_HW12_2048 7
+
+/*
+ * Constants for Hardware ECC
+*/
+/* Reset Hardware ECC for read */
+#define NAND_ECC_READ 0
+/* Reset Hardware ECC for write */
+#define NAND_ECC_WRITE 1
+/* Enable Hardware ECC before syndrom is read back from flash */
+#define NAND_ECC_READSYN 2
+
+/* Option constants for bizarre disfunctionality and real
+* features
+*/
+/* Chip can not auto increment pages */
+#define NAND_NO_AUTOINCR 0x00000001
+/* Buswitdh is 16 bit */
+#define NAND_BUSWIDTH_16 0x00000002
+/* Device supports partial programming without padding */
+#define NAND_NO_PADDING 0x00000004
+/* Chip has cache program function */
+#define NAND_CACHEPRG 0x00000008
+/* Chip has copy back function */
+#define NAND_COPYBACK 0x00000010
+/* AND Chip which has 4 banks and a confusing page / block
+ * assignment. See Renesas datasheet for further information */
+#define NAND_IS_AND 0x00000020
+/* Chip has a array of 4 pages which can be read without
+ * additional ready /busy waits */
+#define NAND_4PAGE_ARRAY 0x00000040
+
+/* Options valid for Samsung large page devices */
+#define NAND_SAMSUNG_LP_OPTIONS \
+ (NAND_NO_PADDING | NAND_CACHEPRG | NAND_COPYBACK)
+
+/* Macros to identify the above */
+#define NAND_CANAUTOINCR(chip) (!(chip->options & NAND_NO_AUTOINCR))
+#define NAND_MUST_PAD(chip) (!(chip->options & NAND_NO_PADDING))
+#define NAND_HAS_CACHEPROG(chip) ((chip->options & NAND_CACHEPRG))
+#define NAND_HAS_COPYBACK(chip) ((chip->options & NAND_COPYBACK))
+
+/* Mask to zero out the chip options, which come from the id table */
+#define NAND_CHIPOPTIONS_MSK (0x0000ffff & ~NAND_NO_AUTOINCR)
+
+/* Non chip related options */
+/* Use a flash based bad block table. This option is passed to the
+ * default bad block table function. */
+#define NAND_USE_FLASH_BBT 0x00010000
+/* The hw ecc generator provides a syndrome instead a ecc value on read
+ * This can only work if we have the ecc bytes directly behind the
+ * data bytes. Applies for DOC and AG-AND Renesas HW Reed Solomon generators */
+#define NAND_HWECC_SYNDROME 0x00020000
+
+
+/* Options set by nand scan */
+/* Nand scan has allocated oob_buf */
+#define NAND_OOBBUF_ALLOC 0x40000000
+/* Nand scan has allocated data_buf */
+#define NAND_DATABUF_ALLOC 0x80000000
+
+
+/*
+ * nand_state_t - chip states
* Enumeration for NAND flash chip state
*/
typedef enum {
@@ -58,71 +205,138 @@ typedef enum {
FL_READING,
FL_WRITING,
FL_ERASING,
- FL_SYNCING
+ FL_SYNCING,
+ FL_CACHEDPRG,
} nand_state_t;
+/* Keep gcc happy */
+struct nand_chip;
-/*
- * NAND Private Flash Chip Data
- *
- * Structure overview:
- *
- * IO_ADDR - address to access the 8 I/O lines of the flash device
- *
- * hwcontrol - hardwarespecific function for accesing control-lines
- *
- * dev_ready - hardwarespecific function for accesing device ready/busy line
- *
- * chip_lock - spinlock used to protect access to this structure
- *
- * wq - wait queue to sleep on if a NAND operation is in progress
- *
- * state - give the current state of the NAND device
- *
- * page_shift - number of address bits in a page (column address bits)
- *
- * data_buf - data buffer passed to/from MTD user modules
- *
- * data_cache - data cache for redundant page access and shadow for
- * ECC failure
- *
- * ecc_code_buf - used only for holding calculated or read ECCs for
- * a page read or written when ECC is in use
- *
- * reserved - padding to make structure fall on word boundary if
- * when ECC is in use
+#if 0
+/**
+ * struct nand_hw_control - Control structure for hardware controller (e.g ECC generator) shared among independend devices
+ * @lock: protection lock
+ * @active: the mtd device which holds the controller currently
*/
-struct Nand {
- char floor, chip;
- unsigned long curadr;
- unsigned char curmode;
- /* Also some erase/write/pipeline info when we get that far */
+struct nand_hw_control {
+ spinlock_t lock;
+ struct nand_chip *active;
};
+#endif
+
+/**
+ * struct nand_chip - NAND Private Flash Chip Data
+ * @IO_ADDR_R: [BOARDSPECIFIC] address to read the 8 I/O lines of the flash device
+ * @IO_ADDR_W: [BOARDSPECIFIC] address to write the 8 I/O lines of the flash device
+ * @read_byte: [REPLACEABLE] read one byte from the chip
+ * @write_byte: [REPLACEABLE] write one byte to the chip
+ * @read_word: [REPLACEABLE] read one word from the chip
+ * @write_word: [REPLACEABLE] write one word to the chip
+ * @write_buf: [REPLACEABLE] write data from the buffer to the chip
+ * @read_buf: [REPLACEABLE] read data from the chip into the buffer
+ * @verify_buf: [REPLACEABLE] verify buffer contents against the chip data
+ * @select_chip: [REPLACEABLE] select chip nr
+ * @block_bad: [REPLACEABLE] check, if the block is bad
+ * @block_markbad: [REPLACEABLE] mark the block bad
+ * @hwcontrol: [BOARDSPECIFIC] hardwarespecific function for accesing control-lines
+ * @dev_ready: [BOARDSPECIFIC] hardwarespecific function for accesing device ready/busy line
+ * If set to NULL no access to ready/busy is available and the ready/busy information
+ * is read from the chip status register
+ * @cmdfunc: [REPLACEABLE] hardwarespecific function for writing commands to the chip
+ * @waitfunc: [REPLACEABLE] hardwarespecific function for wait on ready
+ * @calculate_ecc: [REPLACEABLE] function for ecc calculation or readback from ecc hardware
+ * @correct_data: [REPLACEABLE] function for ecc correction, matching to ecc generator (sw/hw)
+ * @enable_hwecc: [BOARDSPECIFIC] function to enable (reset) hardware ecc generator. Must only
+ * be provided if a hardware ECC is available
+ * @erase_cmd: [INTERN] erase command write function, selectable due to AND support
+ * @scan_bbt: [REPLACEABLE] function to scan bad block table
+ * @eccmode: [BOARDSPECIFIC] mode of ecc, see defines
+ * @eccsize: [INTERN] databytes used per ecc-calculation
+ * @eccbytes: [INTERN] number of ecc bytes per ecc-calculation step
+ * @eccsteps: [INTERN] number of ecc calculation steps per page
+ * @chip_delay: [BOARDSPECIFIC] chip dependent delay for transfering data from array to read regs (tR)
+ * @chip_lock: [INTERN] spinlock used to protect access to this structure and the chip
+ * @wq: [INTERN] wait queue to sleep on if a NAND operation is in progress
+ * @state: [INTERN] the current state of the NAND device
+ * @page_shift: [INTERN] number of address bits in a page (column address bits)
+ * @phys_erase_shift: [INTERN] number of address bits in a physical eraseblock
+ * @bbt_erase_shift: [INTERN] number of address bits in a bbt entry
+ * @chip_shift: [INTERN] number of address bits in one chip
+ * @data_buf: [INTERN] internal buffer for one page + oob
+ * @oob_buf: [INTERN] oob buffer for one eraseblock
+ * @oobdirty: [INTERN] indicates that oob_buf must be reinitialized
+ * @data_poi: [INTERN] pointer to a data buffer
+ * @options: [BOARDSPECIFIC] various chip options. They can partly be set to inform nand_scan about
+ * special functionality. See the defines for further explanation
+ * @badblockpos: [INTERN] position of the bad block marker in the oob area
+ * @numchips: [INTERN] number of physical chips
+ * @chipsize: [INTERN] the size of one chip for multichip arrays
+ * @pagemask: [INTERN] page number mask = number of (pages / chip) - 1
+ * @pagebuf: [INTERN] holds the pagenumber which is currently in data_buf
+ * @autooob: [REPLACEABLE] the default (auto)placement scheme
+ * @bbt: [INTERN] bad block table pointer
+ * @bbt_td: [REPLACEABLE] bad block table descriptor for flash lookup
+ * @bbt_md: [REPLACEABLE] bad block table mirror descriptor
+ * @badblock_pattern: [REPLACEABLE] bad block scan pattern used for initial bad block scan
+ * @controller: [OPTIONAL] a pointer to a hardware controller structure which is shared among multiple independend devices
+ * @priv: [OPTIONAL] pointer to private chip date
+ */
struct nand_chip {
- int page_shift;
- u_char *data_buf;
- u_char *data_cache;
- int cache_page;
- u_char ecc_code_buf[6];
- u_char reserved[2];
- char ChipID; /* Type of DiskOnChip */
- struct Nand *chips;
- int chipshift;
- char* chips_name;
- unsigned long erasesize;
- unsigned long mfr; /* Flash IDs - only one type of flash per device */
- unsigned long id;
- char* name;
- int numchips;
- char page256;
- char pageadrlen;
- unsigned long IO_ADDR; /* address to access the 8 I/O lines to the flash device */
- unsigned long totlen;
- uint oobblock; /* Size of OOB blocks (e.g. 512) */
- uint oobsize; /* Amount of OOB data per block (e.g. 16) */
- uint eccsize;
- int bus16;
+ void __iomem *IO_ADDR_R;
+ void __iomem *IO_ADDR_W;
+
+ u_char (*read_byte)(struct mtd_info *mtd);
+ void (*write_byte)(struct mtd_info *mtd, u_char byte);
+ u16 (*read_word)(struct mtd_info *mtd);
+ void (*write_word)(struct mtd_info *mtd, u16 word);
+
+ void (*write_buf)(struct mtd_info *mtd, const u_char *buf, int len);
+ void (*read_buf)(struct mtd_info *mtd, u_char *buf, int len);
+ int (*verify_buf)(struct mtd_info *mtd, const u_char *buf, int len);
+ void (*select_chip)(struct mtd_info *mtd, int chip);
+ int (*block_bad)(struct mtd_info *mtd, loff_t ofs, int getchip);
+ int (*block_markbad)(struct mtd_info *mtd, loff_t ofs);
+ void (*hwcontrol)(struct mtd_info *mtd, int cmd);
+ int (*dev_ready)(struct mtd_info *mtd);
+ void (*cmdfunc)(struct mtd_info *mtd, unsigned command, int column, int page_addr);
+ int (*waitfunc)(struct mtd_info *mtd, struct nand_chip *this, int state);
+ int (*calculate_ecc)(struct mtd_info *mtd, const u_char *dat, u_char *ecc_code);
+ int (*correct_data)(struct mtd_info *mtd, u_char *dat, u_char *read_ecc, u_char *calc_ecc);
+ void (*enable_hwecc)(struct mtd_info *mtd, int mode);
+ void (*erase_cmd)(struct mtd_info *mtd, int page);
+ int (*scan_bbt)(struct mtd_info *mtd);
+ int eccmode;
+ int eccsize;
+ int eccbytes;
+ int eccsteps;
+ int chip_delay;
+#if 0
+ spinlock_t chip_lock;
+ wait_queue_head_t wq;
+ nand_state_t state;
+#endif
+ int page_shift;
+ int phys_erase_shift;
+ int bbt_erase_shift;
+ int chip_shift;
+ u_char *data_buf;
+ u_char *oob_buf;
+ int oobdirty;
+ u_char *data_poi;
+ unsigned int options;
+ int badblockpos;
+ int numchips;
+ unsigned long chipsize;
+ int pagemask;
+ int pagebuf;
+ struct nand_oobinfo *autooob;
+ uint8_t *bbt;
+ struct nand_bbt_descr *bbt_td;
+ struct nand_bbt_descr *bbt_md;
+ struct nand_bbt_descr *badblock_pattern;
+ struct nand_hw_control *controller;
+ void *priv;
};
/*
@@ -130,71 +344,126 @@ struct nand_chip {
*/
#define NAND_MFR_TOSHIBA 0x98
#define NAND_MFR_SAMSUNG 0xec
+#define NAND_MFR_FUJITSU 0x04
+#define NAND_MFR_NATIONAL 0x8f
+#define NAND_MFR_RENESAS 0x07
+#define NAND_MFR_STMICRO 0x20
+#define NAND_MFR_MICRON 0x2c
-/*
- * NAND Flash Device ID Structure
- *
- * Structure overview:
- *
- * name - Complete name of device
- *
- * manufacture_id - manufacturer ID code of device.
- *
- * model_id - model ID code of device.
+/**
+ * struct nand_flash_dev - NAND Flash Device ID Structure
*
- * chipshift - total number of address bits for the device which
- * is used to calculate address offsets and the total
- * number of bytes the device is capable of.
- *
- * page256 - denotes if flash device has 256 byte pages or not.
- *
- * pageadrlen - number of bytes minus one needed to hold the
- * complete address into the flash array. Keep in
- * mind that when a read or write is done to a
- * specific address, the address is input serially
- * 8 bits at a time. This structure member is used
- * by the read/write routines as a loop index for
- * shifting the address out 8 bits at a time.
- *
- * erasesize - size of an erase block in the flash device.
+ * @name: Identify the device type
+ * @id: device ID code
+ * @pagesize: Pagesize in bytes. Either 256 or 512 or 0
+ * If the pagesize is 0, then the real pagesize
+ * and the eraseize are determined from the
+ * extended id bytes in the chip
+ * @erasesize: Size of an erase block in the flash device.
+ * @chipsize: Total chipsize in Mega Bytes
+ * @options: Bitfield to store chip relevant options
*/
struct nand_flash_dev {
- char * name;
- int manufacture_id;
- int model_id;
- int chipshift;
- char page256;
- char pageadrlen;
+ char *name;
+ int id;
+ unsigned long pagesize;
+ unsigned long chipsize;
unsigned long erasesize;
- int bus16;
+ unsigned long options;
};
+/**
+ * struct nand_manufacturers - NAND Flash Manufacturer ID Structure
+ * @name: Manufacturer name
+ * @id: manufacturer ID code of device.
+*/
+struct nand_manufacturers {
+ int id;
+ char * name;
+};
+
+extern struct nand_flash_dev nand_flash_ids[];
+extern struct nand_manufacturers nand_manuf_ids[];
+
+/**
+ * struct nand_bbt_descr - bad block table descriptor
+ * @options: options for this descriptor
+ * @pages: the page(s) where we find the bbt, used with option BBT_ABSPAGE
+ * when bbt is searched, then we store the found bbts pages here.
+ * Its an array and supports up to 8 chips now
+ * @offs: offset of the pattern in the oob area of the page
+ * @veroffs: offset of the bbt version counter in the oob are of the page
+ * @version: version read from the bbt page during scan
+ * @len: length of the pattern, if 0 no pattern check is performed
+ * @maxblocks: maximum number of blocks to search for a bbt. This number of
+ * blocks is reserved at the end of the device where the tables are
+ * written.
+ * @reserved_block_code: if non-0, this pattern denotes a reserved (rather than
+ * bad) block in the stored bbt
+ * @pattern: pattern to identify bad block table or factory marked good /
+ * bad blocks, can be NULL, if len = 0
+ *
+ * Descriptor for the bad block table marker and the descriptor for the
+ * pattern which identifies good and bad blocks. The assumption is made
+ * that the pattern and the version count are always located in the oob area
+ * of the first block.
+ */
+struct nand_bbt_descr {
+ int options;
+ int pages[NAND_MAX_CHIPS];
+ int offs;
+ int veroffs;
+ uint8_t version[NAND_MAX_CHIPS];
+ int len;
+ int maxblocks;
+ int reserved_block_code;
+ uint8_t *pattern;
+};
+
+/* Options for the bad block table descriptors */
+
+/* The number of bits used per block in the bbt on the device */
+#define NAND_BBT_NRBITS_MSK 0x0000000F
+#define NAND_BBT_1BIT 0x00000001
+#define NAND_BBT_2BIT 0x00000002
+#define NAND_BBT_4BIT 0x00000004
+#define NAND_BBT_8BIT 0x00000008
+/* The bad block table is in the last good block of the device */
+#define NAND_BBT_LASTBLOCK 0x00000010
+/* The bbt is at the given page, else we must scan for the bbt */
+#define NAND_BBT_ABSPAGE 0x00000020
+/* The bbt is at the given page, else we must scan for the bbt */
+#define NAND_BBT_SEARCH 0x00000040
+/* bbt is stored per chip on multichip devices */
+#define NAND_BBT_PERCHIP 0x00000080
+/* bbt has a version counter at offset veroffs */
+#define NAND_BBT_VERSION 0x00000100
+/* Create a bbt if none axists */
+#define NAND_BBT_CREATE 0x00000200
+/* Search good / bad pattern through all pages of a block */
+#define NAND_BBT_SCANALLPAGES 0x00000400
+/* Scan block empty during good / bad block scan */
+#define NAND_BBT_SCANEMPTY 0x00000800
+/* Write bbt if neccecary */
+#define NAND_BBT_WRITE 0x00001000
+/* Read and write back block contents when writing bbt */
+#define NAND_BBT_SAVECONTENT 0x00002000
+/* Search good / bad pattern on the first and the second page */
+#define NAND_BBT_SCAN2NDPAGE 0x00004000
+
+/* The maximum number of blocks to scan for a bbt */
+#define NAND_BBT_SCAN_MAXBLOCKS 4
+
+extern int nand_scan_bbt (struct mtd_info *mtd, struct nand_bbt_descr *bd);
+extern int nand_update_bbt (struct mtd_info *mtd, loff_t offs);
+extern int nand_default_bbt (struct mtd_info *mtd);
+extern int nand_isbad_bbt (struct mtd_info *mtd, loff_t offs, int allowbbt);
+extern int nand_erase_nand (struct mtd_info *mtd, struct erase_info *instr, int allowbbt);
+
/*
* Constants for oob configuration
*/
-#define NAND_NOOB_ECCPOS0 0
-#define NAND_NOOB_ECCPOS1 1
-#define NAND_NOOB_ECCPOS2 2
-#define NAND_NOOB_ECCPOS3 3
-#define NAND_NOOB_ECCPOS4 6
-#define NAND_NOOB_ECCPOS5 7
-#define NAND_NOOB_BADBPOS -1
-#define NAND_NOOB_ECCVPOS -1
-
-#define NAND_JFFS2_OOB_ECCPOS0 0
-#define NAND_JFFS2_OOB_ECCPOS1 1
-#define NAND_JFFS2_OOB_ECCPOS2 2
-#define NAND_JFFS2_OOB_ECCPOS3 3
-#define NAND_JFFS2_OOB_ECCPOS4 6
-#define NAND_JFFS2_OOB_ECCPOS5 7
-#define NAND_JFFS2_OOB_BADBPOS 5
-#define NAND_JFFS2_OOB_ECCVPOS 4
-
-#define NAND_JFFS2_OOB8_FSDAPOS 6
-#define NAND_JFFS2_OOB16_FSDAPOS 8
-#define NAND_JFFS2_OOB8_FSDALEN 2
-#define NAND_JFFS2_OOB16_FSDALEN 8
-
-unsigned long nand_probe(unsigned long physadr);
+#define NAND_SMALL_BADBLOCK_POS 5
+#define NAND_LARGE_BADBLOCK_POS 0
#endif /* __LINUX_MTD_NAND_H */
diff --git a/include/linux/mtd/nand_ecc.h b/include/linux/mtd/nand_ecc.h
new file mode 100644
index 0000000000..12c5bc342e
--- /dev/null
+++ b/include/linux/mtd/nand_ecc.h
@@ -0,0 +1,30 @@
+/*
+ * drivers/mtd/nand_ecc.h
+ *
+ * Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com)
+ *
+ * $Id: nand_ecc.h,v 1.4 2004/06/17 02:35:02 dbrown Exp $
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This file is the header for the ECC algorithm.
+ */
+
+#ifndef __MTD_NAND_ECC_H__
+#define __MTD_NAND_ECC_H__
+
+struct mtd_info;
+
+/*
+ * Calculate 3 byte ECC code for 256 byte block
+ */
+int nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat, u_char *ecc_code);
+
+/*
+ * Detect and correct a 1 bit error for 256 byte block
+ */
+int nand_correct_data(struct mtd_info *mtd, u_char *dat, u_char *read_ecc, u_char *calc_ecc);
+
+#endif /* __MTD_NAND_ECC_H__ */
diff --git a/include/linux/mtd/nand_ids.h b/include/linux/mtd/nand_ids.h
index a3d0363a2a..dbdd15c035 100644
--- a/include/linux/mtd/nand_ids.h
+++ b/include/linux/mtd/nand_ids.h
@@ -28,6 +28,10 @@
#ifndef __LINUX_MTD_NAND_IDS_H
#define __LINUX_MTD_NAND_IDS_H
+#ifndef CFG_NAND_LEGACY
+#error This module is for the legacy NAND support
+#endif
+
static struct nand_flash_dev nand_flash_ids[] = {
{"Toshiba TC5816BDC", NAND_MFR_TOSHIBA, 0x64, 21, 1, 2, 0x1000, 0},
{"Toshiba TC5832DC", NAND_MFR_TOSHIBA, 0x6b, 22, 0, 2, 0x2000, 0},
@@ -49,6 +53,8 @@ static struct nand_flash_dev nand_flash_ids[] = {
{"Samsung KM29W16000", NAND_MFR_SAMSUNG, 0xea, 21, 1, 2, 0x1000, 0},
{"Samsung K9F5616Q0C", NAND_MFR_SAMSUNG, 0x45, 25, 0, 2, 0x4000, 1},
{"Samsung K9K1216Q0C", NAND_MFR_SAMSUNG, 0x46, 26, 0, 3, 0x4000, 1},
+ {"Samsung K9F1G08U0M", NAND_MFR_SAMSUNG, 0xf1, 27, 0, 2, 0, 0},
+ {"Micron MT29F2G16ABD", NAND_MFR_MICRON, 0xba, 26, 0, 3, 0x20000, 1}, /* large block won't work*/
{NULL,}
};
diff --git a/include/linux/mtd/nand_legacy.h b/include/linux/mtd/nand_legacy.h
new file mode 100644
index 0000000000..dae7d8923f
--- /dev/null
+++ b/include/linux/mtd/nand_legacy.h
@@ -0,0 +1,204 @@
+/*
+ * linux/include/linux/mtd/nand.h
+ *
+ * Copyright (c) 2000 David Woodhouse <dwmw2@mvhi.com>
+ * Steven J. Hill <sjhill@cotw.com>
+ * Thomas Gleixner <gleixner@autronix.de>
+ *
+ * $Id: nand.h,v 1.7 2003/07/24 23:30:46 a0384864 Exp $
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Info:
+ * Contains standard defines and IDs for NAND flash devices
+ *
+ * Changelog:
+ * 01-31-2000 DMW Created
+ * 09-18-2000 SJH Moved structure out of the Disk-On-Chip drivers
+ * so it can be used by other NAND flash device
+ * drivers. I also changed the copyright since none
+ * of the original contents of this file are specific
+ * to DoC devices. David can whack me with a baseball
+ * bat later if I did something naughty.
+ * 10-11-2000 SJH Added private NAND flash structure for driver
+ * 10-24-2000 SJH Added prototype for 'nand_scan' function
+ * 10-29-2001 TG changed nand_chip structure to support
+ * hardwarespecific function for accessing control lines
+ * 02-21-2002 TG added support for different read/write adress and
+ * ready/busy line access function
+ * 02-26-2002 TG added chip_delay to nand_chip structure to optimize
+ * command delay times for different chips
+ * 04-28-2002 TG OOB config defines moved from nand.c to avoid duplicate
+ * defines in jffs2/wbuf.c
+ */
+#ifndef __LINUX_MTD_NAND_LEGACY_H
+#define __LINUX_MTD_NAND_LEGACY_H
+
+#ifndef CFG_NAND_LEGACY
+#error This module is for the legacy NAND support
+#endif
+
+/*
+ * Standard NAND flash commands
+ */
+#define NAND_CMD_READ0 0
+#define NAND_CMD_READ1 1
+#define NAND_CMD_PAGEPROG 0x10
+#define NAND_CMD_READOOB 0x50
+#define NAND_CMD_ERASE1 0x60
+#define NAND_CMD_STATUS 0x70
+#define NAND_CMD_SEQIN 0x80
+#define NAND_CMD_READID 0x90
+#define NAND_CMD_ERASE2 0xd0
+#define NAND_CMD_RESET 0xff
+
+/*
+ * Enumeration for NAND flash chip state
+ */
+typedef enum {
+ FL_READY,
+ FL_READING,
+ FL_WRITING,
+ FL_ERASING,
+ FL_SYNCING
+} nand_state_t;
+
+
+/*
+ * NAND Private Flash Chip Data
+ *
+ * Structure overview:
+ *
+ * IO_ADDR - address to access the 8 I/O lines of the flash device
+ *
+ * hwcontrol - hardwarespecific function for accesing control-lines
+ *
+ * dev_ready - hardwarespecific function for accesing device ready/busy line
+ *
+ * chip_lock - spinlock used to protect access to this structure
+ *
+ * wq - wait queue to sleep on if a NAND operation is in progress
+ *
+ * state - give the current state of the NAND device
+ *
+ * page_shift - number of address bits in a page (column address bits)
+ *
+ * data_buf - data buffer passed to/from MTD user modules
+ *
+ * data_cache - data cache for redundant page access and shadow for
+ * ECC failure
+ *
+ * ecc_code_buf - used only for holding calculated or read ECCs for
+ * a page read or written when ECC is in use
+ *
+ * reserved - padding to make structure fall on word boundary if
+ * when ECC is in use
+ */
+struct Nand {
+ char floor, chip;
+ unsigned long curadr;
+ unsigned char curmode;
+ /* Also some erase/write/pipeline info when we get that far */
+};
+
+struct nand_chip {
+ int page_shift;
+ u_char *data_buf;
+ u_char *data_cache;
+ int cache_page;
+ u_char ecc_code_buf[6];
+ u_char reserved[2];
+ char ChipID; /* Type of DiskOnChip */
+ struct Nand *chips;
+ int chipshift;
+ char* chips_name;
+ unsigned long erasesize;
+ unsigned long mfr; /* Flash IDs - only one type of flash per device */
+ unsigned long id;
+ char* name;
+ int numchips;
+ char page256;
+ char pageadrlen;
+ unsigned long IO_ADDR; /* address to access the 8 I/O lines to the flash device */
+ unsigned long totlen;
+ uint oobblock; /* Size of OOB blocks (e.g. 512) */
+ uint oobsize; /* Amount of OOB data per block (e.g. 16) */
+ uint eccsize;
+ int bus16;
+};
+
+/*
+ * NAND Flash Manufacturer ID Codes
+ */
+#define NAND_MFR_TOSHIBA 0x98
+#define NAND_MFR_SAMSUNG 0xec
+#define NAND_MFR_MICRON 0x2c
+
+/*
+ * NAND Flash Device ID Structure
+ *
+ * Structure overview:
+ *
+ * name - Complete name of device
+ *
+ * manufacture_id - manufacturer ID code of device.
+ *
+ * model_id - model ID code of device.
+ *
+ * chipshift - total number of address bits for the device which
+ * is used to calculate address offsets and the total
+ * number of bytes the device is capable of.
+ *
+ * page256 - denotes if flash device has 256 byte pages or not.
+ *
+ * pageadrlen - number of bytes minus one needed to hold the
+ * complete address into the flash array. Keep in
+ * mind that when a read or write is done to a
+ * specific address, the address is input serially
+ * 8 bits at a time. This structure member is used
+ * by the read/write routines as a loop index for
+ * shifting the address out 8 bits at a time.
+ *
+ * erasesize - size of an erase block in the flash device.
+ */
+struct nand_flash_dev {
+ char * name;
+ int manufacture_id;
+ int model_id;
+ int chipshift;
+ char page256;
+ char pageadrlen;
+ unsigned long erasesize;
+ int bus16;
+};
+
+/*
+* Constants for oob configuration
+*/
+#define NAND_NOOB_ECCPOS0 0
+#define NAND_NOOB_ECCPOS1 1
+#define NAND_NOOB_ECCPOS2 2
+#define NAND_NOOB_ECCPOS3 3
+#define NAND_NOOB_ECCPOS4 6
+#define NAND_NOOB_ECCPOS5 7
+#define NAND_NOOB_BADBPOS -1
+#define NAND_NOOB_ECCVPOS -1
+
+#define NAND_JFFS2_OOB_ECCPOS0 0
+#define NAND_JFFS2_OOB_ECCPOS1 1
+#define NAND_JFFS2_OOB_ECCPOS2 2
+#define NAND_JFFS2_OOB_ECCPOS3 3
+#define NAND_JFFS2_OOB_ECCPOS4 6
+#define NAND_JFFS2_OOB_ECCPOS5 7
+#define NAND_JFFS2_OOB_BADBPOS 5
+#define NAND_JFFS2_OOB_ECCVPOS 4
+
+#define NAND_JFFS2_OOB8_FSDAPOS 6
+#define NAND_JFFS2_OOB16_FSDAPOS 8
+#define NAND_JFFS2_OOB8_FSDALEN 2
+#define NAND_JFFS2_OOB16_FSDALEN 8
+
+unsigned long nand_probe(unsigned long physadr);
+#endif /* __LINUX_MTD_NAND_LEGACY_H */
diff --git a/include/linux/mtd/onenand.h b/include/linux/mtd/onenand.h
new file mode 100644
index 0000000000..6f27280a63
--- /dev/null
+++ b/include/linux/mtd/onenand.h
@@ -0,0 +1,143 @@
+/*
+ * linux/include/linux/mtd/onenand.h
+ *
+ * Copyright (C) 2005 Samsung Electronics
+ * Kyungmin Park <kyungmin.park@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __LINUX_MTD_ONENAND_H
+#define __LINUX_MTD_ONENAND_H
+
+#include <linux/mtd/onenand_regs.h>
+
+/* Note: The header order is impoertant */
+#include <onenand_uboot.h>
+
+#include <linux/mtd/bbm.h>
+
+#define MAX_BUFFERRAM 2
+#define MAX_ONENAND_PAGESIZE (2048 + 64)
+
+/* Scan and identify a OneNAND device */
+extern int onenand_scan(struct mtd_info *mtd, int max_chips);
+/* Free resources held by the OneNAND device */
+extern void onenand_release(struct mtd_info *mtd);
+
+/**
+ * onenand_state_t - chip states
+ * Enumeration for OneNAND flash chip state
+ */
+typedef enum {
+ FL_READY,
+ FL_READING,
+ FL_WRITING,
+ FL_ERASING,
+ FL_SYNCING,
+ FL_UNLOCKING,
+ FL_LOCKING,
+ FL_RESETING,
+} onenand_state_t;
+
+/**
+ * struct onenand_bufferram - OneNAND BufferRAM Data
+ * @param block block address in BufferRAM
+ * @param page page address in BufferRAM
+ * @param valid valid flag
+ */
+struct onenand_bufferram {
+ int block;
+ int page;
+ int valid;
+};
+
+/**
+ * struct onenand_chip - OneNAND Private Flash Chip Data
+ * @param base [BOARDSPECIFIC] address to access OneNAND
+ * @param chipsize [INTERN] the size of one chip for multichip arrays
+ * @param device_id [INTERN] device ID
+ * @param verstion_id [INTERN] version ID
+ * @param options [BOARDSPECIFIC] various chip options. They can partly be set to inform onenand_scan about
+ * @param erase_shift [INTERN] number of address bits in a block
+ * @param page_shift [INTERN] number of address bits in a page
+ * @param ppb_shift [INTERN] number of address bits in a pages per block
+ * @param page_mask [INTERN] a page per block mask
+ * @param bufferam_index [INTERN] BufferRAM index
+ * @param bufferam [INTERN] BufferRAM info
+ * @param readw [REPLACEABLE] hardware specific function for read short
+ * @param writew [REPLACEABLE] hardware specific function for write short
+ * @param command [REPLACEABLE] hardware specific function for writing commands to the chip
+ * @param wait [REPLACEABLE] hardware specific function for wait on ready
+ * @param read_bufferram [REPLACEABLE] hardware specific function for BufferRAM Area
+ * @param write_bufferram [REPLACEABLE] hardware specific function for BufferRAM Area
+ * @param chip_lock [INTERN] spinlock used to protect access to this structure and the chip
+ * @param wq [INTERN] wait queue to sleep on if a OneNAND operation is in progress
+ * @param state [INTERN] the current state of the OneNAND device
+ * @param autooob [REPLACEABLE] the default (auto)placement scheme
+ * @param priv [OPTIONAL] pointer to private chip date
+ */
+struct onenand_chip {
+ void __iomem *base;
+ unsigned int chipsize;
+ unsigned int device_id;
+ unsigned int options;
+
+ unsigned int erase_shift;
+ unsigned int page_shift;
+ unsigned int ppb_shift; /* Pages per block shift */
+ unsigned int page_mask;
+
+ unsigned int bufferram_index;
+ struct onenand_bufferram bufferram[MAX_BUFFERRAM];
+
+ int (*command)(struct mtd_info *mtd, int cmd, loff_t address, size_t len);
+ int (*wait)(struct mtd_info *mtd, int state);
+ int (*read_bufferram)(struct mtd_info *mtd, int area,
+ unsigned char *buffer, int offset, size_t count);
+ int (*write_bufferram)(struct mtd_info *mtd, int area,
+ const unsigned char *buffer, int offset, size_t count);
+ unsigned short (*read_word)(void __iomem *addr);
+ void (*write_word)(unsigned short value, void __iomem *addr);
+ void (*mmcontrol)(struct mtd_info *mtd, int sync_read);
+
+ spinlock_t chip_lock;
+ wait_queue_head_t wq;
+ onenand_state_t state;
+
+ struct nand_oobinfo *autooob;
+
+ void *bbm;
+
+ void *priv;
+};
+
+#define ONENAND_CURRENT_BUFFERRAM(this) (this->bufferram_index)
+#define ONENAND_NEXT_BUFFERRAM(this) (this->bufferram_index ^ 1)
+#define ONENAND_SET_NEXT_BUFFERRAM(this) (this->bufferram_index ^= 1)
+
+/*
+ * Options bits
+ */
+#define ONENAND_CONT_LOCK (0x0001)
+
+
+/*
+ * OneNAND Flash Manufacturer ID Codes
+ */
+#define ONENAND_MFR_SAMSUNG 0xec
+#define ONENAND_MFR_UNKNOWN 0x00
+
+/**
+ * struct nand_manufacturers - NAND Flash Manufacturer ID Structure
+ * @param name: Manufacturer name
+ * @param id: manufacturer ID code of device.
+*/
+struct onenand_manufacturers {
+ int id;
+ char *name;
+};
+
+#endif /* __LINUX_MTD_ONENAND_H */
diff --git a/include/linux/mtd/onenand_regs.h b/include/linux/mtd/onenand_regs.h
new file mode 100644
index 0000000000..d7832ef8ed
--- /dev/null
+++ b/include/linux/mtd/onenand_regs.h
@@ -0,0 +1,180 @@
+/*
+ * linux/include/linux/mtd/onenand_regs.h
+ *
+ * OneNAND Register header file
+ *
+ * Copyright (C) 2005 Samsung Electronics
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ONENAND_REG_H
+#define __ONENAND_REG_H
+
+/* Memory Address Map Translation (Word order) */
+#define ONENAND_MEMORY_MAP(x) ((x) << 1)
+
+/*
+ * External BufferRAM area
+ */
+#define ONENAND_BOOTRAM ONENAND_MEMORY_MAP(0x0000)
+#define ONENAND_DATARAM ONENAND_MEMORY_MAP(0x0200)
+#define ONENAND_SPARERAM ONENAND_MEMORY_MAP(0x8010)
+
+/*
+ * OneNAND Registers
+ */
+#define ONENAND_REG_MANUFACTURER_ID ONENAND_MEMORY_MAP(0xF000)
+#define ONENAND_REG_DEVICE_ID ONENAND_MEMORY_MAP(0xF001)
+#define ONENAND_REG_VERSION_ID ONENAND_MEMORY_MAP(0xF002)
+#define ONENAND_REG_DATA_BUFFER_SIZE ONENAND_MEMORY_MAP(0xF003)
+#define ONENAND_REG_BOOT_BUFFER_SIZE ONENAND_MEMORY_MAP(0xF004)
+#define ONENAND_REG_NUM_BUFFERS ONENAND_MEMORY_MAP(0xF005)
+#define ONENAND_REG_TECHNOLOGY ONENAND_MEMORY_MAP(0xF006)
+
+#define ONENAND_REG_START_ADDRESS1 ONENAND_MEMORY_MAP(0xF100)
+#define ONENAND_REG_START_ADDRESS2 ONENAND_MEMORY_MAP(0xF101)
+#define ONENAND_REG_START_ADDRESS3 ONENAND_MEMORY_MAP(0xF102)
+#define ONENAND_REG_START_ADDRESS4 ONENAND_MEMORY_MAP(0xF103)
+#define ONENAND_REG_START_ADDRESS5 ONENAND_MEMORY_MAP(0xF104)
+#define ONENAND_REG_START_ADDRESS6 ONENAND_MEMORY_MAP(0xF105)
+#define ONENAND_REG_START_ADDRESS7 ONENAND_MEMORY_MAP(0xF106)
+#define ONENAND_REG_START_ADDRESS8 ONENAND_MEMORY_MAP(0xF107)
+
+#define ONENAND_REG_START_BUFFER ONENAND_MEMORY_MAP(0xF200)
+#define ONENAND_REG_COMMAND ONENAND_MEMORY_MAP(0xF220)
+#define ONENAND_REG_SYS_CFG1 ONENAND_MEMORY_MAP(0xF221)
+#define ONENAND_REG_SYS_CFG2 ONENAND_MEMORY_MAP(0xF222)
+#define ONENAND_REG_CTRL_STATUS ONENAND_MEMORY_MAP(0xF240)
+#define ONENAND_REG_INTERRUPT ONENAND_MEMORY_MAP(0xF241)
+#define ONENAND_REG_START_BLOCK_ADDRESS ONENAND_MEMORY_MAP(0xF24C)
+#define ONENAND_REG_END_BLOCK_ADDRESS ONENAND_MEMORY_MAP(0xF24D)
+#define ONENAND_REG_WP_STATUS ONENAND_MEMORY_MAP(0xF24E)
+
+#define ONENAND_REG_ECC_STATUS ONENAND_MEMORY_MAP(0xFF00)
+#define ONENAND_REG_ECC_M0 ONENAND_MEMORY_MAP(0xFF01)
+#define ONENAND_REG_ECC_S0 ONENAND_MEMORY_MAP(0xFF02)
+#define ONENAND_REG_ECC_M1 ONENAND_MEMORY_MAP(0xFF03)
+#define ONENAND_REG_ECC_S1 ONENAND_MEMORY_MAP(0xFF04)
+#define ONENAND_REG_ECC_M2 ONENAND_MEMORY_MAP(0xFF05)
+#define ONENAND_REG_ECC_S2 ONENAND_MEMORY_MAP(0xFF06)
+#define ONENAND_REG_ECC_M3 ONENAND_MEMORY_MAP(0xFF07)
+#define ONENAND_REG_ECC_S3 ONENAND_MEMORY_MAP(0xFF08)
+
+/*
+ * Device ID Register F001h (R)
+ */
+#define ONENAND_DEVICE_DENSITY_SHIFT (4)
+#define ONENAND_DEVICE_IS_DDP (1 << 3)
+#define ONENAND_DEVICE_IS_DEMUX (1 << 2)
+#define ONENAND_DEVICE_VCC_MASK (0x3)
+
+#define ONENAND_DEVICE_DENSITY_512Mb (0x002)
+
+/*
+ * Version ID Register F002h (R)
+ */
+#define ONENAND_VERSION_PROCESS_SHIFT (8)
+
+/*
+ * Start Address 1 F100h (R/W)
+ */
+#define ONENAND_DDP_SHIFT (15)
+
+/*
+ * Start Address 8 F107h (R/W)
+ */
+#define ONENAND_FPA_MASK (0x3f)
+#define ONENAND_FPA_SHIFT (2)
+#define ONENAND_FSA_MASK (0x03)
+
+/*
+ * Start Buffer Register F200h (R/W)
+ */
+#define ONENAND_BSA_MASK (0x03)
+#define ONENAND_BSA_SHIFT (8)
+#define ONENAND_BSA_BOOTRAM (0 << 2)
+#define ONENAND_BSA_DATARAM0 (2 << 2)
+#define ONENAND_BSA_DATARAM1 (3 << 2)
+#define ONENAND_BSC_MASK (0x03)
+
+/*
+ * Command Register F220h (R/W)
+ */
+#define ONENAND_CMD_READ (0x00)
+#define ONENAND_CMD_READOOB (0x13)
+#define ONENAND_CMD_PROG (0x80)
+#define ONENAND_CMD_PROGOOB (0x1A)
+#define ONENAND_CMD_UNLOCK (0x23)
+#define ONENAND_CMD_LOCK (0x2A)
+#define ONENAND_CMD_LOCK_TIGHT (0x2C)
+#define ONENAND_CMD_ERASE (0x94)
+#define ONENAND_CMD_RESET (0xF0)
+#define ONENAND_CMD_READID (0x90)
+
+/* NOTE: Those are not *REAL* commands */
+#define ONENAND_CMD_BUFFERRAM (0x1978)
+
+/*
+ * System Configuration 1 Register F221h (R, R/W)
+ */
+#define ONENAND_SYS_CFG1_SYNC_READ (1 << 15)
+#define ONENAND_SYS_CFG1_BRL_7 (7 << 12)
+#define ONENAND_SYS_CFG1_BRL_6 (6 << 12)
+#define ONENAND_SYS_CFG1_BRL_5 (5 << 12)
+#define ONENAND_SYS_CFG1_BRL_4 (4 << 12)
+#define ONENAND_SYS_CFG1_BRL_3 (3 << 12)
+#define ONENAND_SYS_CFG1_BRL_10 (2 << 12)
+#define ONENAND_SYS_CFG1_BRL_9 (1 << 12)
+#define ONENAND_SYS_CFG1_BRL_8 (0 << 12)
+#define ONENAND_SYS_CFG1_BRL_SHIFT (12)
+#define ONENAND_SYS_CFG1_BL_32 (4 << 9)
+#define ONENAND_SYS_CFG1_BL_16 (3 << 9)
+#define ONENAND_SYS_CFG1_BL_8 (2 << 9)
+#define ONENAND_SYS_CFG1_BL_4 (1 << 9)
+#define ONENAND_SYS_CFG1_BL_CONT (0 << 9)
+#define ONENAND_SYS_CFG1_BL_SHIFT (9)
+#define ONENAND_SYS_CFG1_NO_ECC (1 << 8)
+#define ONENAND_SYS_CFG1_RDY (1 << 7)
+#define ONENAND_SYS_CFG1_INT (1 << 6)
+#define ONENAND_SYS_CFG1_IOBE (1 << 5)
+#define ONENAND_SYS_CFG1_RDY_CONF (1 << 4)
+
+/*
+ * Controller Status Register F240h (R)
+ */
+#define ONENAND_CTRL_ONGO (1 << 15)
+#define ONENAND_CTRL_LOCK (1 << 14)
+#define ONENAND_CTRL_LOAD (1 << 13)
+#define ONENAND_CTRL_PROGRAM (1 << 12)
+#define ONENAND_CTRL_ERASE (1 << 11)
+#define ONENAND_CTRL_ERROR (1 << 10)
+#define ONENAND_CTRL_RSTB (1 << 7)
+
+/*
+ * Interrupt Status Register F241h (R)
+ */
+#define ONENAND_INT_MASTER (1 << 15)
+#define ONENAND_INT_READ (1 << 7)
+#define ONENAND_INT_WRITE (1 << 6)
+#define ONENAND_INT_ERASE (1 << 5)
+#define ONENAND_INT_RESET (1 << 4)
+#define ONENAND_INT_CLEAR (0 << 0)
+
+/*
+ * NAND Flash Write Protection Status Register F24Eh (R)
+ */
+#define ONENAND_WP_US (1 << 2)
+#define ONENAND_WP_LS (1 << 1)
+#define ONENAND_WP_LTS (1 << 0)
+
+/*
+ * ECC Status Reigser FF00h (R)
+ */
+#define ONENAND_ECC_1BIT (1 << 0)
+#define ONENAND_ECC_2BIT (1 << 1)
+#define ONENAND_ECC_2BIT_ALL (0xAAAA)
+
+#endif /* __ONENAND_REG_H */
diff --git a/include/linux/stat.h b/include/linux/stat.h
index 2f7a3b36ac..f9422cb1fa 100644
--- a/include/linux/stat.h
+++ b/include/linux/stat.h
@@ -67,7 +67,7 @@ struct stat {
#endif /* __PPC__ */
-#if defined (__ARM__) || defined (__I386__) || defined (__M68K__)
+#if defined (__ARM__) || defined (__I386__) || defined (__M68K__) || defined (__blackfin__)
struct stat {
unsigned short st_dev;
diff --git a/include/linux/string.h b/include/linux/string.h
index 1a45fd3215..62390399b0 100644
--- a/include/linux/string.h
+++ b/include/linux/string.h
@@ -38,7 +38,7 @@ extern int strcmp(const char *,const char *);
#ifndef __HAVE_ARCH_STRNCMP
extern int strncmp(const char *,const char *,__kernel_size_t);
#endif
-#ifndef __HAVE_ARCH_STRNICMP
+#if 0 /* not used - was: #ifndef __HAVE_ARCH_STRNICMP */
extern int strnicmp(const char *, const char *, __kernel_size_t);
#endif
#ifndef __HAVE_ARCH_STRCHR
diff --git a/include/mpc5xxx.h b/include/mpc5xxx.h
index f33d858552..50a6ac1e98 100644
--- a/include/mpc5xxx.h
+++ b/include/mpc5xxx.h
@@ -131,6 +131,7 @@
#if defined(CONFIG_MGT5100)
#define MPC5XXX_SDRAM_XLBSEL (MPC5XXX_SDRAM + 0x0010)
#endif
+#define MPC5XXX_SDRAM_SDELAY (MPC5XXX_SDRAM + 0x0090)
/* Clock Distribution Module */
#define MPC5XXX_CDM_JTAGID (MPC5XXX_CDM + 0x0000)
diff --git a/include/mpc85xx.h b/include/mpc85xx.h
index 60b6c61fb0..a4d99b2a16 100644
--- a/include/mpc85xx.h
+++ b/include/mpc85xx.h
@@ -25,4 +25,39 @@
#define SCCR_DFBRG10 0x00000002 /* BRGCLK division by 64 */
#define SCCR_DFBRG11 0x00000003 /* BRGCLK division by 256 */
+/*
+ * Local Bus Controller - memory controller registers
+ */
+#define BRx_V 0x00000001 /* Bank Valid */
+#define BRx_MS_GPCM 0x00000000 /* G.P.C.M. Machine Select */
+#define BRx_MS_SDRAM 0x00000000 /* SDRAM Machine Select */
+#define BRx_MS_UPMA 0x00000080 /* U.P.M.A Machine Select */
+#define BRx_MS_UPMB 0x000000a0 /* U.P.M.B Machine Select */
+#define BRx_MS_UPMC 0x000000c0 /* U.P.M.C Machine Select */
+#define BRx_PS_8 0x00000800 /* 8 bit port size */
+#define BRx_PS_32 0x00001800 /* 32 bit port size */
+#define BRx_BA_MSK 0xffff8000 /* Base Address Mask */
+
+#define ORxG_EAD 0x00000001 /* External addr latch delay */
+#define ORxG_EHTR 0x00000002 /* Extended hold time on read */
+#define ORxG_TRLX 0x00000004 /* Timing relaxed */
+#define ORxG_SETA 0x00000008 /* External address termination */
+#define ORxG_SCY_10_CLK 0x000000a0 /* 10 clock cycles wait states */
+#define ORxG_SCY_15_CLK 0x000000f0 /* 15 clock cycles wait states */
+#define ORxG_XACS 0x00000100 /* Extra addr to CS setup */
+#define ORxG_ACS_DIV2 0x00000600 /* CS is output 1/2 a clock later*/
+#define ORxG_CSNT 0x00000800 /* Chip Select Negation Time */
+
+#define ORxU_BI 0x00000100 /* Burst Inhibit */
+#define ORxU_AM_MSK 0xffff8000 /* Address Mask Mask */
+
+#define MxMR_OP_NORM 0x00000000 /* Normal Operation */
+#define MxMR_DSx_2_CYCL 0x00400000 /* 2 cycle Disable Period */
+#define MxMR_OP_WARR 0x10000000 /* Write to Array */
+#define MxMR_BSEL 0x80000000 /* Bus Select */
+
+/* helpers to convert values into an OR address mask (GPCM mode) */
+#define P2SZ_TO_AM(s) ((~((s) - 1)) & 0xffff8000) /* must be pow of 2 */
+#define MEG_TO_AM(m) P2SZ_TO_AM((m) << 20)
+
#endif /* __MPC85xx_H__ */
diff --git a/include/nand.h b/include/nand.h
new file mode 100644
index 0000000000..905115b3da
--- /dev/null
+++ b/include/nand.h
@@ -0,0 +1,63 @@
+/*
+ * (C) Copyright 2005
+ * 2N Telekomunikace, a.s. <www.2n.cz>
+ * Ladislav Michl <michl@2n.cz>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _NAND_H_
+#define _NAND_H_
+
+#include <linux/mtd/compat.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/nand.h>
+
+typedef struct mtd_info nand_info_t;
+
+extern int nand_curr_device;
+extern nand_info_t nand_info[];
+
+static inline int nand_read(nand_info_t *info, ulong ofs, ulong *len, u_char *buf)
+{
+ return info->read(info, ofs, *len, (size_t *)len, buf);
+}
+
+static inline int nand_write(nand_info_t *info, ulong ofs, ulong *len, u_char *buf)
+{
+ return info->write(info, ofs, *len, (size_t *)len, buf);
+}
+
+static inline int nand_block_isbad(nand_info_t *info, ulong ofs)
+{
+ return info->block_isbad(info, ofs);
+}
+
+static inline int nand_erase(nand_info_t *info, ulong off, ulong size)
+{
+ struct erase_info instr;
+
+ instr.mtd = info;
+ instr.addr = off;
+ instr.len = size;
+ instr.callback = 0;
+
+ return info->erase(info, &instr);
+}
+
+#endif
diff --git a/include/nios2-epcs.h b/include/nios2-epcs.h
index 2c9522cfd8..20e0c87c89 100644
--- a/include/nios2-epcs.h
+++ b/include/nios2-epcs.h
@@ -38,6 +38,11 @@ typedef struct epcs_devinfo_t {
unsigned char prot_mask; /* Protection mask */
}epcs_devinfo_t;
+/* Resets the epcs controller -- to prevent (potential) soft-reset
+ * problems when booting from the epcs controller
+ */
+extern int epcs_reset (void);
+
/* Returns the devinfo struct if EPCS device is found;
* NULL otherwise.
*/
diff --git a/include/ns16550.h b/include/ns16550.h
index e17a11edca..293f9bd8e3 100644
--- a/include/ns16550.h
+++ b/include/ns16550.h
@@ -1,4 +1,9 @@
/*
+ *This file is licensed under
+ * the terms of the GNU General Public License version 2. This program
+ * is licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ *
* NS16550 Serial Port
* originally from linux source (arch/ppc/boot/ns16550.h)
* modified slightly to
@@ -7,6 +12,9 @@
* added prototypes for ns16550.c
* reduced no of com ports to 2
* modifications (c) Rob Taylor, Flying Pig Systems. 2000.
+ *
+ * added support for port on 64-bit bus
+ * by Richard Danter (richard.danter@windriver.com), (C) 2005 Wind River Systems
*/
#if (CFG_NS16550_REG_SIZE == 1)
@@ -45,15 +53,15 @@ struct NS16550 {
} __attribute__ ((packed));
#elif (CFG_NS16550_REG_SIZE == 4)
struct NS16550 {
- unsigned long rbr; /* 0 */
- unsigned long ier; /* 1 */
- unsigned long fcr; /* 2 */
- unsigned long lcr; /* 3 */
- unsigned long mcr; /* 4 */
- unsigned long lsr; /* 5 */
- unsigned long msr; /* 6 */
- unsigned long scr; /* 7 */
-} __attribute__ ((packed));
+ unsigned long rbr; /* 0 r */
+ unsigned long ier; /* 1 rw */
+ unsigned long fcr; /* 2 w */
+ unsigned long lcr; /* 3 rw */
+ unsigned long mcr; /* 4 rw */
+ unsigned long lsr; /* 5 r */
+ unsigned long msr; /* 6 r */
+ unsigned long scr; /* 7 rw */
+}; /* No need to pack an already aligned struct */
#elif (CFG_NS16550_REG_SIZE == -4)
struct NS16550 {
unsigned char rbr; /* 0 */
@@ -82,6 +90,25 @@ struct NS16550 {
int pad10:24;
#endif
} __attribute__ ((packed));
+#elif (CFG_NS16550_REG_SIZE == -8)
+struct NS16550 {
+ unsigned char rbr; /* 0 */
+ unsigned char pad0[7];
+ unsigned char ier; /* 1 */
+ unsigned char pad1[7];
+ unsigned char fcr; /* 2 */
+ unsigned char pad2[7];
+ unsigned char lcr; /* 3 */
+ unsigned char pad3[7];
+ unsigned char mcr; /* 4 */
+ unsigned char pad4[7];
+ unsigned char lsr; /* 5 */
+ unsigned char pad5[7];
+ unsigned char msr; /* 6 */
+ unsigned char pad6[7];
+ unsigned char scr; /* 7 */
+ unsigned char pad7[7];
+} __attribute__ ((packed));
#else
#error "Please define NS16550 registers size."
#endif
@@ -102,7 +129,7 @@ typedef volatile struct NS16550 *NS16550_t;
#define MCR_DMA_EN 0x04
#define MCR_TX_DFR 0x08
-#define LCR_WLS_MSK 0x03 /* character length slect mask */
+#define LCR_WLS_MSK 0x03 /* character length select mask */
#define LCR_WLS_5 0x00 /* 5 bit character length */
#define LCR_WLS_6 0x01 /* 6 bit character length */
#define LCR_WLS_7 0x02 /* 7 bit character length */
diff --git a/include/onenand_uboot.h b/include/onenand_uboot.h
new file mode 100644
index 0000000000..1da9b6d7af
--- /dev/null
+++ b/include/onenand_uboot.h
@@ -0,0 +1,117 @@
+/*
+ * Header file for OneNAND support for U-Boot
+ *
+ * Adaptation from kernel to U-Boot
+ *
+ * Copyright (C) 2005 Samsung Electronics
+ * Kyungmin Park <kyungmin.park@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __UBOOT_ONENAND_H
+#define __UBOOT_ONENAND_H
+
+#ifndef __iomem
+#define __iomem
+#endif
+
+#ifndef CONFIG_OMAP
+#define __mem_pci(x) (x)
+#endif
+
+#define ONENAND_DEBUG
+#undef ONENAND_DEBUG
+
+#define DEBUG_LEVEL 1
+
+#define MTD_DEBUG_LEVEL0 0
+#define MTD_DEBUG_LEVEL1 1
+#define MTD_DEBUG_LEVEL2 2
+#define MTD_DEBUG_LEVEL3 3
+
+#ifdef ONENAND_DEBUG
+#define DEBUG(level, args...) \
+do { \
+ if (level <= DEBUG_LEVEL) { \
+ printf(args); \
+ } \
+} while (0)
+#else
+#define DEBUG(level, args...) do { } while (0)
+#endif
+
+enum {
+ EAGAIN,
+ EIO,
+ EBADMSG,
+ ENXIO,
+ EINVAL,
+ EPERM,
+ ENOMEM,
+};
+
+#define KERN_INFO
+#define KERN_ERR
+#define KERN_WARNING
+#define KERN_DEBUG
+
+#define min_t(type,x,y) ({ type __x = (x); type __y = (y); __x < __y ? __x: __y; })
+
+#define unlikely(x) (x)
+
+struct mtd_info {
+ int size;
+ int oobblock;
+ int oobsize;
+ int erasesize;
+
+ void *priv;
+};
+
+#define MTD_ERASE_PENDING 0x01
+#define MTD_ERASING 0x02
+#define MTD_ERASE_SUSPEND 0x04
+#define MTD_ERASE_DONE 0x08
+#define MTD_ERASE_FAILED 0x10
+
+struct erase_info {
+ struct mtd_info *mtd;
+ u_int32_t addr;
+ u_int32_t len;
+ u_int32_t fail_addr;
+ u_char state;
+};
+
+struct nand_oobinfo {
+};
+
+struct kvec {
+ void *iov_base;
+ size_t iov_len;
+};
+
+typedef int spinlock_t;
+typedef int wait_queue_head_t;
+
+#define printk(args...) printf(args)
+
+#define mtd_erase_callback(x) do { } while (0)
+
+/* Functions */
+extern int onenand_read(struct mtd_info *mtd, loff_t from, size_t len,
+ size_t *retlen, u_char *buf);
+extern int onenand_read_oob(struct mtd_info *mtd, loff_t from, size_t len,
+ size_t *retlen, u_char *buf);
+extern int onenand_write(struct mtd_info *mtd, loff_t from, size_t len,
+ size_t *retlen, const u_char *buf);
+extern int onenand_erase(struct mtd_info *mtd, struct erase_info *instr);
+
+extern int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len);
+
+extern void onenand_print_device_info(int device, int verbose);
+
+
+#endif /* __UBOOT_ONENAND_H */
diff --git a/include/pci.h b/include/pci.h
index 8f19997559..0fc00e4276 100644
--- a/include/pci.h
+++ b/include/pci.h
@@ -309,6 +309,7 @@ struct pci_region {
#define PCI_REGION_MEM 0x00000000 /* PCI memory space */
#define PCI_REGION_IO 0x00000001 /* PCI IO space */
#define PCI_REGION_TYPE 0x00000001
+#define PCI_REGION_PREFETCH 0x00000008 /* prefetchable PCI memory */
#define PCI_REGION_MEMORY 0x00000100 /* System memory */
#define PCI_REGION_RO 0x00000200 /* Read-only memory */
@@ -351,8 +352,8 @@ struct pci_config_table {
unsigned long priv[3];
};
-extern void pci_cfgfunc_nothing(struct pci_controller* hose, pci_dev_t dev,
- struct pci_config_table *);
+extern void pci_cfgfunc_do_nothing(struct pci_controller* hose, pci_dev_t dev,
+ struct pci_config_table *);
extern void pci_cfgfunc_config_device(struct pci_controller* hose, pci_dev_t dev,
struct pci_config_table *);
@@ -386,7 +387,7 @@ struct pci_controller {
int (*write_dword)(struct pci_controller*, pci_dev_t, int where, u32);
/* Used by auto config */
- struct pci_region *pci_mem, *pci_io;
+ struct pci_region *pci_mem, *pci_io, *pci_prefetch;
/* Used by ppc405 autoconfig*/
struct pci_region *pci_fb;
@@ -472,6 +473,7 @@ extern int pciauto_region_allocate(struct pci_region* res, unsigned int size, un
extern void pciauto_setup_device(struct pci_controller *hose,
pci_dev_t dev, int bars_num,
struct pci_region *mem,
+ struct pci_region *prefetch,
struct pci_region *io);
int pciauto_config_device(struct pci_controller *hose, pci_dev_t dev);
diff --git a/include/pci_ids.h b/include/pci_ids.h
index 7dec378ad4..8cc3ec0a23 100644
--- a/include/pci_ids.h
+++ b/include/pci_ids.h
@@ -510,6 +510,7 @@
#define PCI_DEVICE_ID_CT_65554 0x00e4
#define PCI_DEVICE_ID_CT_65555 0x00e5
#define PCI_DEVICE_ID_CT_69000 0x00c0
+#define PCI_DEVICE_ID_CT_69030 0x0c30
#define PCI_VENDOR_ID_MIRO 0x1031
#define PCI_DEVICE_ID_MIRO_36050 0x5601
diff --git a/include/pcmcia.h b/include/pcmcia.h
index 43d4510ed2..8f564da9b8 100644
--- a/include/pcmcia.h
+++ b/include/pcmcia.h
@@ -308,4 +308,14 @@ typedef struct {
#endif /* CFG_CMD_PCMCIA || CFG_CMD_IDE && (CONFIG_IDE_8xx_PCCARD || CONFIG_IDE_8xx_DIRECT) */
+#ifdef CONFIG_8xx
+extern u_int *pcmcia_pgcrx[];
+#define PCMCIA_PGCRX(slot) (*pcmcia_pgcrx[slot])
+#endif
+
+#if (CONFIG_COMMANDS & CFG_CMD_IDE) && defined(CONFIG_IDE_8xx_PCCARD) \
+ || defined(CONFIG_PXA_PCMCIA)
+extern int check_ide_device(int slot);
+#endif
+
#endif /* _PCMCIA_H */
diff --git a/include/ppc440.h b/include/ppc440.h
index 018f7be8ac..d5a9f66a41 100644
--- a/include/ppc440.h
+++ b/include/ppc440.h
@@ -25,6 +25,8 @@
/*--------------------------------------------------------------------- */
/* Special Purpose Registers */
/*--------------------------------------------------------------------- */
+#define xer_reg 0x001
+#define lr_reg 0x008
#define dec 0x016 /* decrementer */
#define srr0 0x01a /* save/restore register 0 */
#define srr1 0x01b /* save/restore register 1 */
@@ -37,6 +39,8 @@
#define ivpr 0x03f /* interrupt prefix register */
#define usprg0 0x100 /* user special purpose register general 0 */
#define usprg1 0x110 /* user special purpose register general 1 */
+#define tblr 0x10c /* time base lower, read only */
+#define tbur 0x10d /* time base upper, read only */
#define sprg1 0x111 /* special purpose register general 1 */
#define sprg2 0x112 /* special purpose register general 2 */
#define sprg3 0x113 /* special purpose register general 3 */
@@ -78,7 +82,7 @@
#define ivor13 0x19d /* interrupt vector offset register 13 */
#define ivor14 0x19e /* interrupt vector offset register 14 */
#define ivor15 0x19f /* interrupt vector offset register 15 */
-#if defined(CONFIG_440GX) || defined(CONFIG_440EP) || defined(CONFIG_440GR) || defined(CONFIG_440SP)
+#if defined(CONFIG_440GX) || defined(CONFIG_440EP) || defined(CONFIG_440GR) || defined(CONFIG_440SP) || defined(CONFIG_440SPE)
#define mcsrr0 0x23a /* machine check save/restore register 0 */
#define mcsrr1 0x23b /* mahcine check save/restore register 1 */
#define mcsr 0x23c /* machine check status register */
@@ -167,12 +171,10 @@
#define sdr_malrbl 0x02a0
#define sdr_maltbs 0x02c0
#define sdr_malrbs 0x02e0
-#define sdr_pci0 0x0300
-#define sdr_usb0 0x0320
+#define sdr_pci0 0x0300
+#define sdr_usb0 0x0320
#define sdr_cust0 0x4000
-#define sdr_sdstp2 0x4001
#define sdr_cust1 0x4002
-#define sdr_sdstp3 0x4003
#define sdr_pfc0 0x4100 /* Pin Function 0 */
#define sdr_pfc1 0x4101 /* Pin Function 1 */
#define sdr_plbtr 0x4200
@@ -212,6 +214,551 @@
#define mem_dlycal 0x0084 /* delay line calibration register */
#define mem_eccesr 0x0098 /* ECC error status */
+#ifdef CONFIG_440GX
+#define sdr_amp 0x0240
+#define sdr_xpllc 0x01c1
+#define sdr_xplld 0x01c2
+#define sdr_xcr 0x01c0
+#define sdr_sdstp2 0x4001
+#define sdr_sdstp3 0x4003
+#endif /* CONFIG_440GX */
+
+#ifdef CONFIG_440SPE
+#undef sdr_sdstp2
+#define sdr_sdstp2 0x0022
+#undef sdr_sdstp3
+#define sdr_sdstp3 0x0023
+#define sdr_ddr0 0x00E1
+#define sdr_uart2 0x0122
+#define sdr_xcr0 0x01c0
+/* #define sdr_xcr1 0x01c3 only one PCIX - SG */
+/* #define sdr_xcr2 0x01c6 only one PCIX - SG */
+#define sdr_xpllc0 0x01c1
+#define sdr_xplld0 0x01c2
+#define sdr_xpllc1 0x01c4 /*notRCW - SG */
+#define sdr_xplld1 0x01c5 /*notRCW - SG */
+#define sdr_xpllc2 0x01c7 /*notRCW - SG */
+#define sdr_xplld2 0x01c8 /*notRCW - SG */
+#define sdr_amp0 0x0240
+#define sdr_amp1 0x0241
+#define sdr_cust2 0x4004
+#define sdr_cust3 0x4006
+#define sdr_sdstp4 0x4001
+#define sdr_sdstp5 0x4003
+#define sdr_sdstp6 0x4005
+#define sdr_sdstp7 0x4007
+
+/*----------------------------------------------------------------------------+
+| Core Configuration/MMU configuration for 440 (CCR1 for 440x5 only).
++----------------------------------------------------------------------------*/
+#define CCR0_PRE 0x40000000
+#define CCR0_CRPE 0x08000000
+#define CCR0_DSTG 0x00200000
+#define CCR0_DAPUIB 0x00100000
+#define CCR0_DTB 0x00008000
+#define CCR0_GICBT 0x00004000
+#define CCR0_GDCBT 0x00002000
+#define CCR0_FLSTA 0x00000100
+#define CCR0_ICSLC_MASK 0x0000000C
+#define CCR0_ICSLT_MASK 0x00000003
+#define CCR1_TCS_MASK 0x00000080
+#define CCR1_TCS_INTCLK 0x00000000
+#define CCR1_TCS_EXTCLK 0x00000080
+#define MMUCR_SEOA 0x01000000
+#define MMUCR_U1TE 0x00400000
+#define MMUCR_U2SWOAE 0x00200000
+#define MMUCR_DULXE 0x00800000
+#define MMUCR_IULXE 0x00400000
+#define MMUCR_STS 0x00100000
+#define MMUCR_STID_MASK 0x000000FF
+
+#define SDR0_CFGADDR 0x00E
+#define SDR0_CFGDATA 0x00F
+
+/******************************************************************************
+ * PCI express defines
+ ******************************************************************************/
+#define SDR0_PE0UTLSET1 0x00000300 /* PE0 Upper transaction layer conf setting */
+#define SDR0_PE0UTLSET2 0x00000301 /* PE0 Upper transaction layer conf setting 2 */
+#define SDR0_PE0DLPSET 0x00000302 /* PE0 Data link & logical physical configuration */
+#define SDR0_PE0LOOP 0x00000303 /* PE0 Loopback interface status */
+#define SDR0_PE0RCSSET 0x00000304 /* PE0 Reset, clock & shutdown setting */
+#define SDR0_PE0RCSSTS 0x00000305 /* PE0 Reset, clock & shutdown status */
+#define SDR0_PE0HSSSET1L0 0x00000306 /* PE0 HSS Control Setting 1: Lane 0 */
+#define SDR0_PE0HSSSET2L0 0x00000307 /* PE0 HSS Control Setting 2: Lane 0 */
+#define SDR0_PE0HSSSTSL0 0x00000308 /* PE0 HSS Control Status : Lane 0 */
+#define SDR0_PE0HSSSET1L1 0x00000309 /* PE0 HSS Control Setting 1: Lane 1 */
+#define SDR0_PE0HSSSET2L1 0x0000030A /* PE0 HSS Control Setting 2: Lane 1 */
+#define SDR0_PE0HSSSTSL1 0x0000030B /* PE0 HSS Control Status : Lane 1 */
+#define SDR0_PE0HSSSET1L2 0x0000030C /* PE0 HSS Control Setting 1: Lane 2 */
+#define SDR0_PE0HSSSET2L2 0x0000030D /* PE0 HSS Control Setting 2: Lane 2 */
+#define SDR0_PE0HSSSTSL2 0x0000030E /* PE0 HSS Control Status : Lane 2 */
+#define SDR0_PE0HSSSET1L3 0x0000030F /* PE0 HSS Control Setting 1: Lane 3 */
+#define SDR0_PE0HSSSET2L3 0x00000310 /* PE0 HSS Control Setting 2: Lane 3 */
+#define SDR0_PE0HSSSTSL3 0x00000311 /* PE0 HSS Control Status : Lane 3 */
+#define SDR0_PE0HSSSET1L4 0x00000312 /* PE0 HSS Control Setting 1: Lane 4 */
+#define SDR0_PE0HSSSET2L4 0x00000313 /* PE0 HSS Control Setting 2: Lane 4 */
+#define SDR0_PE0HSSSTSL4 0x00000314 /* PE0 HSS Control Status : Lane 4 */
+#define SDR0_PE0HSSSET1L5 0x00000315 /* PE0 HSS Control Setting 1: Lane 5 */
+#define SDR0_PE0HSSSET2L5 0x00000316 /* PE0 HSS Control Setting 2: Lane 5 */
+#define SDR0_PE0HSSSTSL5 0x00000317 /* PE0 HSS Control Status : Lane 5 */
+#define SDR0_PE0HSSSET1L6 0x00000318 /* PE0 HSS Control Setting 1: Lane 6 */
+#define SDR0_PE0HSSSET2L6 0x00000319 /* PE0 HSS Control Setting 2: Lane 6 */
+#define SDR0_PE0HSSSTSL6 0x0000031A /* PE0 HSS Control Status : Lane 6 */
+#define SDR0_PE0HSSSET1L7 0x0000031B /* PE0 HSS Control Setting 1: Lane 7 */
+#define SDR0_PE0HSSSET2L7 0x0000031C /* PE0 HSS Control Setting 2: Lane 7 */
+#define SDR0_PE0HSSSTSL7 0x0000031D /* PE0 HSS Control Status : Lane 7 */
+#define SDR0_PE0HSSSEREN 0x0000031E /* PE0 Serdes Transmitter Enable */
+#define SDR0_PE0LANEABCD 0x0000031F /* PE0 Lanes ABCD affectation */
+#define SDR0_PE0LANEEFGH 0x00000320 /* PE0 Lanes EFGH affectation */
+
+#define SDR0_PE1UTLSET1 0x00000340 /* PE1 Upper transaction layer conf setting */
+#define SDR0_PE1UTLSET2 0x00000341 /* PE1 Upper transaction layer conf setting 2 */
+#define SDR0_PE1DLPSET 0x00000342 /* PE1 Data link & logical physical configuration */
+#define SDR0_PE1LOOP 0x00000343 /* PE1 Loopback interface status */
+#define SDR0_PE1RCSSET 0x00000344 /* PE1 Reset, clock & shutdown setting */
+#define SDR0_PE1RCSSTS 0x00000345 /* PE1 Reset, clock & shutdown status */
+#define SDR0_PE1HSSSET1L0 0x00000346 /* PE1 HSS Control Setting 1: Lane 0 */
+#define SDR0_PE1HSSSET2L0 0x00000347 /* PE1 HSS Control Setting 2: Lane 0 */
+#define SDR0_PE1HSSSTSL0 0x00000348 /* PE1 HSS Control Status : Lane 0 */
+#define SDR0_PE1HSSSET1L1 0x00000349 /* PE1 HSS Control Setting 1: Lane 1 */
+#define SDR0_PE1HSSSET2L1 0x0000034A /* PE1 HSS Control Setting 2: Lane 1 */
+#define SDR0_PE1HSSSTSL1 0x0000034B /* PE1 HSS Control Status : Lane 1 */
+#define SDR0_PE1HSSSET1L2 0x0000034C /* PE1 HSS Control Setting 1: Lane 2 */
+#define SDR0_PE1HSSSET2L2 0x0000034D /* PE1 HSS Control Setting 2: Lane 2 */
+#define SDR0_PE1HSSSTSL2 0x0000034E /* PE1 HSS Control Status : Lane 2 */
+#define SDR0_PE1HSSSET1L3 0x0000034F /* PE1 HSS Control Setting 1: Lane 3 */
+#define SDR0_PE1HSSSET2L3 0x00000350 /* PE1 HSS Control Setting 2: Lane 3 */
+#define SDR0_PE1HSSSTSL3 0x00000351 /* PE1 HSS Control Status : Lane 3 */
+#define SDR0_PE1HSSSEREN 0x00000352 /* PE1 Serdes Transmitter Enable */
+#define SDR0_PE1LANEABCD 0x00000353 /* PE1 Lanes ABCD affectation */
+#define SDR0_PE2UTLSET1 0x00000370 /* PE2 Upper transaction layer conf setting */
+#define SDR0_PE2UTLSET2 0x00000371 /* PE2 Upper transaction layer conf setting 2 */
+#define SDR0_PE2DLPSET 0x00000372 /* PE2 Data link & logical physical configuration */
+#define SDR0_PE2LOOP 0x00000373 /* PE2 Loopback interface status */
+#define SDR0_PE2RCSSET 0x00000374 /* PE2 Reset, clock & shutdown setting */
+#define SDR0_PE2RCSSTS 0x00000375 /* PE2 Reset, clock & shutdown status */
+#define SDR0_PE2HSSSET1L0 0x00000376 /* PE2 HSS Control Setting 1: Lane 0 */
+#define SDR0_PE2HSSSET2L0 0x00000377 /* PE2 HSS Control Setting 2: Lane 0 */
+#define SDR0_PE2HSSSTSL0 0x00000378 /* PE2 HSS Control Status : Lane 0 */
+#define SDR0_PE2HSSSET1L1 0x00000379 /* PE2 HSS Control Setting 1: Lane 1 */
+#define SDR0_PE2HSSSET2L1 0x0000037A /* PE2 HSS Control Setting 2: Lane 1 */
+#define SDR0_PE2HSSSTSL1 0x0000037B /* PE2 HSS Control Status : Lane 1 */
+#define SDR0_PE2HSSSET1L2 0x0000037C /* PE2 HSS Control Setting 1: Lane 2 */
+#define SDR0_PE2HSSSET2L2 0x0000037D /* PE2 HSS Control Setting 2: Lane 2 */
+#define SDR0_PE2HSSSTSL2 0x0000037E /* PE2 HSS Control Status : Lane 2 */
+#define SDR0_PE2HSSSET1L3 0x0000037F /* PE2 HSS Control Setting 1: Lane 3 */
+#define SDR0_PE2HSSSET2L3 0x00000380 /* PE2 HSS Control Setting 2: Lane 3 */
+#define SDR0_PE2HSSSTSL3 0x00000381 /* PE2 HSS Control Status : Lane 3 */
+#define SDR0_PE2HSSSEREN 0x00000382 /* PE2 Serdes Transmitter Enable */
+#define SDR0_PE2LANEABCD 0x00000383 /* PE2 Lanes ABCD affectation */
+#define SDR0_PEGPLLSET1 0x000003A0 /* PE Pll LC Tank Setting1 */
+#define SDR0_PEGPLLSET2 0x000003A1 /* PE Pll LC Tank Setting2 */
+#define SDR0_PEGPLLSTS 0x000003A2 /* PE Pll LC Tank Status */
+
+/*----------------------------------------------------------------------------+
+| SDRAM Controller
++----------------------------------------------------------------------------*/
+/*-----------------------------------------------------------------------------+
+| SDRAM DLYCAL Options
++-----------------------------------------------------------------------------*/
+#define SDRAM_DLYCAL_DLCV_MASK 0x000003FC
+#define SDRAM_DLYCAL_DLCV_ENCODE(x) (((x)<<2) & SDRAM_DLYCAL_DLCV_MASK)
+#define SDRAM_DLYCAL_DLCV_DECODE(x) (((x) & SDRAM_DLYCAL_DLCV_MASK)>>2)
+
+/*----------------------------------------------------------------------------+
+| Memory queue defines
++----------------------------------------------------------------------------*/
+/* A REVOIR versus RWC - SG*/
+#define SDRAMQ_DCR_BASE 0x040
+
+#define SDRAM_R0BAS (SDRAMQ_DCR_BASE+0x0) /* rank 0 base address & size */
+#define SDRAM_R1BAS (SDRAMQ_DCR_BASE+0x1) /* rank 1 base address & size */
+#define SDRAM_R2BAS (SDRAMQ_DCR_BASE+0x2) /* rank 2 base address & size */
+#define SDRAM_R3BAS (SDRAMQ_DCR_BASE+0x3) /* rank 3 base address & size */
+#define SDRAM_CONF1HB (SDRAMQ_DCR_BASE+0x5) /* configuration 1 HB */
+#define SDRAM_ERRSTATHB (SDRAMQ_DCR_BASE+0x7) /* error status HB */
+#define SDRAM_ERRADDUHB (SDRAMQ_DCR_BASE+0x8) /* error address upper 32 HB */
+#define SDRAM_ERRADDLHB (SDRAMQ_DCR_BASE+0x9) /* error address lower 32 HB */
+#define SDRAM_PLBADDULL (SDRAMQ_DCR_BASE+0xA) /* PLB base address upper 32 LL */
+#define SDRAM_CONF1LL (SDRAMQ_DCR_BASE+0xB) /* configuration 1 LL */
+#define SDRAM_ERRSTATLL (SDRAMQ_DCR_BASE+0xC) /* error status LL */
+#define SDRAM_ERRADDULL (SDRAMQ_DCR_BASE+0xD) /* error address upper 32 LL */
+#define SDRAM_ERRADDLLL (SDRAMQ_DCR_BASE+0xE) /* error address lower 32 LL */
+#define SDRAM_CONFPATHB (SDRAMQ_DCR_BASE+0xF) /* configuration between paths */
+#define SDRAM_PLBADDUHB (SDRAMQ_DCR_BASE+0x10) /* PLB base address upper 32 LL */
+
+/*-----------------------------------------------------------------------------+
+| Memory Bank 0-7 configuration
++-----------------------------------------------------------------------------*/
+#define SDRAM_RXBAS_SDBA_MASK 0xFF800000 /* Base address */
+#define SDRAM_RXBAS_SDBA_ENCODE(n) ((((unsigned long)(n))&0xFFE00000)>>2)
+#define SDRAM_RXBAS_SDBA_DECODE(n) ((((unsigned long)(n))&0xFFE00000)<<2)
+#define SDRAM_RXBAS_SDSZ_MASK 0x0000FFC0 /* Size */
+#define SDRAM_RXBAS_SDSZ_ENCODE(n) ((((unsigned long)(n))&0x3FF)<<6)
+#define SDRAM_RXBAS_SDSZ_DECODE(n) ((((unsigned long)(n))>>6)&0x3FF)
+#define SDRAM_RXBAS_SDSZ_0 0x00000000 /* 0M */
+#define SDRAM_RXBAS_SDSZ_8 0x0000FFC0 /* 8M */
+#define SDRAM_RXBAS_SDSZ_16 0x0000FF80 /* 16M */
+#define SDRAM_RXBAS_SDSZ_32 0x0000FF00 /* 32M */
+#define SDRAM_RXBAS_SDSZ_64 0x0000FE00 /* 64M */
+#define SDRAM_RXBAS_SDSZ_128 0x0000FC00 /* 128M */
+#define SDRAM_RXBAS_SDSZ_256 0x0000F800 /* 256M */
+#define SDRAM_RXBAS_SDSZ_512 0x0000F000 /* 512M */
+#define SDRAM_RXBAS_SDSZ_1024 0x0000E000 /* 1024M */
+#define SDRAM_RXBAS_SDSZ_2048 0x0000C000 /* 2048M */
+#define SDRAM_RXBAS_SDSZ_4096 0x00008000 /* 4096M */
+
+/*----------------------------------------------------------------------------+
+| Memory controller defines
++----------------------------------------------------------------------------*/
+#define SDRAMC_DCR_BASE 0x010
+#define SDRAMC_CFGADDR (SDRAMC_DCR_BASE+0x0) /* Memory configuration add */
+#define SDRAMC_CFGDATA (SDRAMC_DCR_BASE+0x1) /* Memory configuration data */
+
+/* A REVOIR versus specs 4 bank - SG*/
+#define SDRAM_MCSTAT 0x14 /* memory controller status */
+#define SDRAM_MCOPT1 0x20 /* memory controller options 1 */
+#define SDRAM_MCOPT2 0x21 /* memory controller options 2 */
+#define SDRAM_MODT0 0x22 /* on die termination for bank 0 */
+#define SDRAM_MODT1 0x23 /* on die termination for bank 1 */
+#define SDRAM_MODT2 0x24 /* on die termination for bank 2 */
+#define SDRAM_MODT3 0x25 /* on die termination for bank 3 */
+#define SDRAM_CODT 0x26 /* on die termination for controller */
+#define SDRAM_VVPR 0x27 /* variable VRef programmming */
+#define SDRAM_OPARS 0x28 /* on chip driver control setup */
+#define SDRAM_OPART 0x29 /* on chip driver control trigger */
+#define SDRAM_RTR 0x30 /* refresh timer */
+#define SDRAM_PMIT 0x34 /* power management idle timer */
+#define SDRAM_MB0CF 0x40 /* memory bank 0 configuration */
+#define SDRAM_MB1CF 0x44 /* memory bank 1 configuration */
+#define SDRAM_MB2CF 0x48
+#define SDRAM_MB3CF 0x4C
+#define SDRAM_INITPLR0 0x50 /* manual initialization control */
+#define SDRAM_INITPLR1 0x51 /* manual initialization control */
+#define SDRAM_INITPLR2 0x52 /* manual initialization control */
+#define SDRAM_INITPLR3 0x53 /* manual initialization control */
+#define SDRAM_INITPLR4 0x54 /* manual initialization control */
+#define SDRAM_INITPLR5 0x55 /* manual initialization control */
+#define SDRAM_INITPLR6 0x56 /* manual initialization control */
+#define SDRAM_INITPLR7 0x57 /* manual initialization control */
+#define SDRAM_INITPLR8 0x58 /* manual initialization control */
+#define SDRAM_INITPLR9 0x59 /* manual initialization control */
+#define SDRAM_INITPLR10 0x5a /* manual initialization control */
+#define SDRAM_INITPLR11 0x5b /* manual initialization control */
+#define SDRAM_INITPLR12 0x5c /* manual initialization control */
+#define SDRAM_INITPLR13 0x5d /* manual initialization control */
+#define SDRAM_INITPLR14 0x5e /* manual initialization control */
+#define SDRAM_INITPLR15 0x5f /* manual initialization control */
+#define SDRAM_RQDC 0x70 /* read DQS delay control */
+#define SDRAM_RFDC 0x74 /* read feedback delay control */
+#define SDRAM_RDCC 0x78 /* read data capture control */
+#define SDRAM_DLCR 0x7A /* delay line calibration */
+#define SDRAM_CLKTR 0x80 /* DDR clock timing */
+#define SDRAM_WRDTR 0x81 /* write data, DQS, DM clock, timing */
+#define SDRAM_SDTR1 0x85 /* DDR SDRAM timing 1 */
+#define SDRAM_SDTR2 0x86 /* DDR SDRAM timing 2 */
+#define SDRAM_SDTR3 0x87 /* DDR SDRAM timing 3 */
+#define SDRAM_MMODE 0x88 /* memory mode */
+#define SDRAM_MEMODE 0x89 /* memory extended mode */
+#define SDRAM_ECCCR 0x98 /* ECC error status */
+#define SDRAM_CID 0xA4 /* core ID */
+#define SDRAM_RID 0xA8 /* revision ID */
+
+/*-----------------------------------------------------------------------------+
+| Memory Controller Status
++-----------------------------------------------------------------------------*/
+#define SDRAM_MCSTAT_MIC_MASK 0x80000000 /* Memory init status mask */
+#define SDRAM_MCSTAT_MIC_NOTCOMP 0x00000000 /* Mem init not complete */
+#define SDRAM_MCSTAT_MIC_COMP 0x80000000 /* Mem init complete */
+#define SDRAM_MCSTAT_SRMS_MASK 0x80000000 /* Mem self refresh stat mask */
+#define SDRAM_MCSTAT_SRMS_NOT_SF 0x00000000 /* Mem not in self refresh */
+#define SDRAM_MCSTAT_SRMS_SF 0x80000000 /* Mem in self refresh */
+
+/*-----------------------------------------------------------------------------+
+| Memory Controller Options 1
++-----------------------------------------------------------------------------*/
+#define SDRAM_MCOPT1_MCHK_MASK 0x30000000 /* Memory data err check mask*/
+#define SDRAM_MCOPT1_MCHK_NON 0x00000000 /* No ECC generation */
+#define SDRAM_MCOPT1_MCHK_GEN 0x20000000 /* ECC generation */
+#define SDRAM_MCOPT1_MCHK_CHK 0x10000000 /* ECC generation and check */
+#define SDRAM_MCOPT1_MCHK_CHK_REP 0x30000000 /* ECC generation, chk, report*/
+#define SDRAM_MCOPT1_MCHK_CHK_DECODE(n) ((((unsigned long)(n))>>28)&0x3)
+#define SDRAM_MCOPT1_RDEN_MASK 0x08000000 /* Registered DIMM mask */
+#define SDRAM_MCOPT1_RDEN 0x08000000 /* Registered DIMM enable */
+#define SDRAM_MCOPT1_PMU_MASK 0x06000000 /* Page management unit mask */
+#define SDRAM_MCOPT1_PMU_CLOSE 0x00000000 /* PMU Close */
+#define SDRAM_MCOPT1_PMU_OPEN 0x04000000 /* PMU Open */
+#define SDRAM_MCOPT1_PMU_AUTOCLOSE 0x02000000 /* PMU AutoClose */
+#define SDRAM_MCOPT1_DMWD_MASK 0x01000000 /* DRAM width mask */
+#define SDRAM_MCOPT1_DMWD_32 0x00000000 /* 32 bits */
+#define SDRAM_MCOPT1_DMWD_64 0x01000000 /* 64 bits */
+#define SDRAM_MCOPT1_UIOS_MASK 0x00C00000 /* Unused IO State */
+#define SDRAM_MCOPT1_BCNT_MASK 0x00200000 /* Bank count */
+#define SDRAM_MCOPT1_4_BANKS 0x00000000 /* 4 Banks */
+#define SDRAM_MCOPT1_8_BANKS 0x00200000 /* 8 Banks */
+#define SDRAM_MCOPT1_DDR_TYPE_MASK 0x00100000 /* DDR Memory Type mask */
+#define SDRAM_MCOPT1_DDR1_TYPE 0x00000000 /* DDR1 Memory Type */
+#define SDRAM_MCOPT1_DDR2_TYPE 0x00100000 /* DDR2 Memory Type */
+#define SDRAM_MCOPT1_QDEP 0x00020000 /* 4 commands deep */
+#define SDRAM_MCOPT1_RWOO_MASK 0x00008000 /* Out of Order Read mask */
+#define SDRAM_MCOPT1_RWOO_DISABLED 0x00000000 /* disabled */
+#define SDRAM_MCOPT1_RWOO_ENABLED 0x00008000 /* enabled */
+#define SDRAM_MCOPT1_WOOO_MASK 0x00004000 /* Out of Order Write mask */
+#define SDRAM_MCOPT1_WOOO_DISABLED 0x00000000 /* disabled */
+#define SDRAM_MCOPT1_WOOO_ENABLED 0x00004000 /* enabled */
+#define SDRAM_MCOPT1_DCOO_MASK 0x00002000 /* All Out of Order mask */
+#define SDRAM_MCOPT1_DCOO_DISABLED 0x00002000 /* disabled */
+#define SDRAM_MCOPT1_DCOO_ENABLED 0x00000000 /* enabled */
+#define SDRAM_MCOPT1_DREF_MASK 0x00001000 /* Deferred refresh mask */
+#define SDRAM_MCOPT1_DREF_NORMAL 0x00000000 /* normal refresh */
+#define SDRAM_MCOPT1_DREF_DEFER_4 0x00001000 /* defer up to 4 refresh cmd */
+
+/*-----------------------------------------------------------------------------+
+| Memory Controller Options 2
++-----------------------------------------------------------------------------*/
+#define SDRAM_MCOPT2_SREN_MASK 0x80000000 /* Self Test mask */
+#define SDRAM_MCOPT2_SREN_EXIT 0x00000000 /* Self Test exit */
+#define SDRAM_MCOPT2_SREN_ENTER 0x80000000 /* Self Test enter */
+#define SDRAM_MCOPT2_PMEN_MASK 0x40000000 /* Power Management mask */
+#define SDRAM_MCOPT2_PMEN_DISABLE 0x00000000 /* disable */
+#define SDRAM_MCOPT2_PMEN_ENABLE 0x40000000 /* enable */
+#define SDRAM_MCOPT2_IPTR_MASK 0x20000000 /* Init Trigger Reg mask */
+#define SDRAM_MCOPT2_IPTR_IDLE 0x00000000 /* idle */
+#define SDRAM_MCOPT2_IPTR_EXECUTE 0x20000000 /* execute preloaded init */
+#define SDRAM_MCOPT2_XSRP_MASK 0x10000000 /* Exit Self Refresh Prevent */
+#define SDRAM_MCOPT2_XSRP_ALLOW 0x00000000 /* allow self refresh exit */
+#define SDRAM_MCOPT2_XSRP_PREVENT 0x10000000 /* prevent self refresh exit */
+#define SDRAM_MCOPT2_DCEN_MASK 0x08000000 /* SDRAM Controller Enable */
+#define SDRAM_MCOPT2_DCEN_DISABLE 0x00000000 /* SDRAM Controller Enable */
+#define SDRAM_MCOPT2_DCEN_ENABLE 0x08000000 /* SDRAM Controller Enable */
+#define SDRAM_MCOPT2_ISIE_MASK 0x04000000 /* Init Seq Interruptable mas*/
+#define SDRAM_MCOPT2_ISIE_DISABLE 0x00000000 /* disable */
+#define SDRAM_MCOPT2_ISIE_ENABLE 0x04000000 /* enable */
+
+/*-----------------------------------------------------------------------------+
+| SDRAM Refresh Timer Register
++-----------------------------------------------------------------------------*/
+#define SDRAM_RTR_RINT_MASK 0xFFF80000
+#define SDRAM_RTR_RINT_ENCODE(n) ((((unsigned long)(n))&0xFFF8)<<16)
+#define SDRAM_RTR_RINT_DECODE(n) ((((unsigned long)(n))>>16)&0xFFF8)
+
+/*-----------------------------------------------------------------------------+
+| SDRAM Read DQS Delay Control Register
++-----------------------------------------------------------------------------*/
+#define SDRAM_RQDC_RQDE_MASK 0x80000000
+#define SDRAM_RQDC_RQDE_DISABLE 0x00000000
+#define SDRAM_RQDC_RQDE_ENABLE 0x80000000
+#define SDRAM_RQDC_RQFD_MASK 0x000001FF
+#define SDRAM_RQDC_RQFD_ENCODE(n) ((((unsigned long)(n))&0x1FF)<<0)
+
+#define SDRAM_RQDC_RQFD_MAX 0x1FF
+
+/*-----------------------------------------------------------------------------+
+| SDRAM Read Data Capture Control Register
++-----------------------------------------------------------------------------*/
+#define SDRAM_RDCC_RDSS_MASK 0xC0000000
+#define SDRAM_RDCC_RDSS_T1 0x00000000
+#define SDRAM_RDCC_RDSS_T2 0x40000000
+#define SDRAM_RDCC_RDSS_T3 0x80000000
+#define SDRAM_RDCC_RDSS_T4 0xC0000000
+#define SDRAM_RDCC_RSAE_MASK 0x00000001
+#define SDRAM_RDCC_RSAE_DISABLE 0x00000001
+#define SDRAM_RDCC_RSAE_ENABLE 0x00000000
+
+/*-----------------------------------------------------------------------------+
+| SDRAM Read Feedback Delay Control Register
++-----------------------------------------------------------------------------*/
+#define SDRAM_RFDC_ARSE_MASK 0x80000000
+#define SDRAM_RFDC_ARSE_DISABLE 0x80000000
+#define SDRAM_RFDC_ARSE_ENABLE 0x00000000
+#define SDRAM_RFDC_RFOS_MASK 0x007F0000
+#define SDRAM_RFDC_RFOS_ENCODE(n) ((((unsigned long)(n))&0x7F)<<16)
+#define SDRAM_RFDC_RFFD_MASK 0x000003FF
+#define SDRAM_RFDC_RFFD_ENCODE(n) ((((unsigned long)(n))&0x3FF)<<0)
+
+#define SDRAM_RFDC_RFFD_MAX 0x7FF
+
+/*-----------------------------------------------------------------------------+
+| SDRAM Delay Line Calibration Register
++-----------------------------------------------------------------------------*/
+#define SDRAM_DLCR_DCLM_MASK 0x80000000
+#define SDRAM_DLCR_DCLM_MANUEL 0x80000000
+#define SDRAM_DLCR_DCLM_AUTO 0x00000000
+#define SDRAM_DLCR_DLCR_MASK 0x08000000
+#define SDRAM_DLCR_DLCR_CALIBRATE 0x08000000
+#define SDRAM_DLCR_DLCR_IDLE 0x00000000
+#define SDRAM_DLCR_DLCS_MASK 0x07000000
+#define SDRAM_DLCR_DLCS_NOT_RUN 0x00000000
+#define SDRAM_DLCR_DLCS_IN_PROGRESS 0x01000000
+#define SDRAM_DLCR_DLCS_COMPLETE 0x02000000
+#define SDRAM_DLCR_DLCS_CONT_DONE 0x03000000
+#define SDRAM_DLCR_DLCS_ERROR 0x04000000
+#define SDRAM_DLCR_DLCV_MASK 0x000001FF
+#define SDRAM_DLCR_DLCV_ENCODE(n) ((((unsigned long)(n))&0x1FF)<<0)
+#define SDRAM_DLCR_DLCV_DECODE(n) ((((unsigned long)(n))>>0)&0x1FF)
+
+/*-----------------------------------------------------------------------------+
+| SDRAM Controller On Die Termination Register
++-----------------------------------------------------------------------------*/
+#define SDRAM_CODT_ODT_ON 0x80000000
+#define SDRAM_CODT_ODT_OFF 0x00000000
+#define SDRAM_CODT_DQS_VOLTAGE_DDR_MASK 0x00000020
+#define SDRAM_CODT_DQS_2_5_V_DDR1 0x00000000
+#define SDRAM_CODT_DQS_1_8_V_DDR2 0x00000020
+#define SDRAM_CODT_DQS_MASK 0x00000010
+#define SDRAM_CODT_DQS_DIFFERENTIAL 0x00000000
+#define SDRAM_CODT_DQS_SINGLE_END 0x00000010
+#define SDRAM_CODT_CKSE_DIFFERENTIAL 0x00000000
+#define SDRAM_CODT_CKSE_SINGLE_END 0x00000008
+#define SDRAM_CODT_FEEBBACK_RCV_SINGLE_END 0x00000004
+#define SDRAM_CODT_FEEBBACK_DRV_SINGLE_END 0x00000002
+#define SDRAM_CODT_IO_HIZ 0x00000000
+#define SDRAM_CODT_IO_NMODE 0x00000001
+
+/*-----------------------------------------------------------------------------+
+| SDRAM Mode Register
++-----------------------------------------------------------------------------*/
+#define SDRAM_MMODE_WR_MASK 0x00000E00
+#define SDRAM_MMODE_WR_DDR1 0x00000000
+#define SDRAM_MMODE_WR_DDR2_3_CYC 0x00000400
+#define SDRAM_MMODE_WR_DDR2_4_CYC 0x00000600
+#define SDRAM_MMODE_WR_DDR2_5_CYC 0x00000800
+#define SDRAM_MMODE_WR_DDR2_6_CYC 0x00000A00
+#define SDRAM_MMODE_DCL_MASK 0x00000070
+#define SDRAM_MMODE_DCL_DDR1_2_0_CLK 0x00000020
+#define SDRAM_MMODE_DCL_DDR1_2_5_CLK 0x00000060
+#define SDRAM_MMODE_DCL_DDR1_3_0_CLK 0x00000030
+#define SDRAM_MMODE_DCL_DDR2_2_0_CLK 0x00000020
+#define SDRAM_MMODE_DCL_DDR2_3_0_CLK 0x00000030
+#define SDRAM_MMODE_DCL_DDR2_4_0_CLK 0x00000040
+#define SDRAM_MMODE_DCL_DDR2_5_0_CLK 0x00000050
+#define SDRAM_MMODE_DCL_DDR2_6_0_CLK 0x00000060
+#define SDRAM_MMODE_DCL_DDR2_7_0_CLK 0x00000070
+
+/*-----------------------------------------------------------------------------+
+| SDRAM Extended Mode Register
++-----------------------------------------------------------------------------*/
+#define SDRAM_MEMODE_DIC_MASK 0x00000002
+#define SDRAM_MEMODE_DIC_NORMAL 0x00000000
+#define SDRAM_MEMODE_DIC_WEAK 0x00000002
+#define SDRAM_MEMODE_DLL_MASK 0x00000001
+#define SDRAM_MEMODE_DLL_DISABLE 0x00000001
+#define SDRAM_MEMODE_DLL_ENABLE 0x00000000
+#define SDRAM_MEMODE_RTT_MASK 0x00000044
+#define SDRAM_MEMODE_RTT_DISABLED 0x00000000
+#define SDRAM_MEMODE_RTT_75OHM 0x00000004
+#define SDRAM_MEMODE_RTT_150OHM 0x00000040
+#define SDRAM_MEMODE_DQS_MASK 0x00000400
+#define SDRAM_MEMODE_DQS_DISABLE 0x00000400
+#define SDRAM_MEMODE_DQS_ENABLE 0x00000000
+
+/*-----------------------------------------------------------------------------+
+| SDRAM Clock Timing Register
++-----------------------------------------------------------------------------*/
+#define SDRAM_CLKTR_CLKP_MASK 0xC0000000
+#define SDRAM_CLKTR_CLKP_0_DEG 0x00000000
+#define SDRAM_CLKTR_CLKP_180_DEG_ADV 0x80000000
+
+/*-----------------------------------------------------------------------------+
+| SDRAM Write Timing Register
++-----------------------------------------------------------------------------*/
+#define SDRAM_WRDTR_LLWP_MASK 0x10000000
+#define SDRAM_WRDTR_LLWP_DIS 0x10000000
+#define SDRAM_WRDTR_LLWP_1_CYC 0x00000000
+#define SDRAM_WRDTR_WTR_MASK 0x0E000000
+#define SDRAM_WRDTR_WTR_0_DEG 0x06000000
+#define SDRAM_WRDTR_WTR_180_DEG_ADV 0x02000000
+#define SDRAM_WRDTR_WTR_270_DEG_ADV 0x00000000
+
+/*-----------------------------------------------------------------------------+
+| SDRAM SDTR1 Options
++-----------------------------------------------------------------------------*/
+#define SDRAM_SDTR1_LDOF_MASK 0x80000000
+#define SDRAM_SDTR1_LDOF_1_CLK 0x00000000
+#define SDRAM_SDTR1_LDOF_2_CLK 0x80000000
+#define SDRAM_SDTR1_RTW_MASK 0x00F00000
+#define SDRAM_SDTR1_RTW_2_CLK 0x00200000
+#define SDRAM_SDTR1_RTW_3_CLK 0x00300000
+#define SDRAM_SDTR1_WTWO_MASK 0x000F0000
+#define SDRAM_SDTR1_WTWO_0_CLK 0x00000000
+#define SDRAM_SDTR1_WTWO_1_CLK 0x00010000
+#define SDRAM_SDTR1_RTRO_MASK 0x0000F000
+#define SDRAM_SDTR1_RTRO_1_CLK 0x00001000
+#define SDRAM_SDTR1_RTRO_2_CLK 0x00002000
+
+/*-----------------------------------------------------------------------------+
+| SDRAM SDTR2 Options
++-----------------------------------------------------------------------------*/
+#define SDRAM_SDTR2_RCD_MASK 0xF0000000
+#define SDRAM_SDTR2_RCD_1_CLK 0x10000000
+#define SDRAM_SDTR2_RCD_2_CLK 0x20000000
+#define SDRAM_SDTR2_RCD_3_CLK 0x30000000
+#define SDRAM_SDTR2_RCD_4_CLK 0x40000000
+#define SDRAM_SDTR2_RCD_5_CLK 0x50000000
+#define SDRAM_SDTR2_WTR_MASK 0x0F000000
+#define SDRAM_SDTR2_WTR_1_CLK 0x01000000
+#define SDRAM_SDTR2_WTR_2_CLK 0x02000000
+#define SDRAM_SDTR2_WTR_3_CLK 0x03000000
+#define SDRAM_SDTR2_WTR_4_CLK 0x04000000
+#define SDRAM_SDTR3_WTR_ENCODE(n) ((((unsigned long)(n))&0xF)<<24)
+#define SDRAM_SDTR2_XSNR_MASK 0x00FF0000
+#define SDRAM_SDTR2_XSNR_8_CLK 0x00080000
+#define SDRAM_SDTR2_XSNR_16_CLK 0x00100000
+#define SDRAM_SDTR2_XSNR_32_CLK 0x00200000
+#define SDRAM_SDTR2_XSNR_64_CLK 0x00400000
+#define SDRAM_SDTR2_WPC_MASK 0x0000F000
+#define SDRAM_SDTR2_WPC_2_CLK 0x00002000
+#define SDRAM_SDTR2_WPC_3_CLK 0x00003000
+#define SDRAM_SDTR2_WPC_4_CLK 0x00004000
+#define SDRAM_SDTR2_WPC_5_CLK 0x00005000
+#define SDRAM_SDTR2_WPC_6_CLK 0x00006000
+#define SDRAM_SDTR3_WPC_ENCODE(n) ((((unsigned long)(n))&0xF)<<12)
+#define SDRAM_SDTR2_RPC_MASK 0x00000F00
+#define SDRAM_SDTR2_RPC_2_CLK 0x00000200
+#define SDRAM_SDTR2_RPC_3_CLK 0x00000300
+#define SDRAM_SDTR2_RPC_4_CLK 0x00000400
+#define SDRAM_SDTR2_RP_MASK 0x000000F0
+#define SDRAM_SDTR2_RP_3_CLK 0x00000030
+#define SDRAM_SDTR2_RP_4_CLK 0x00000040
+#define SDRAM_SDTR2_RP_5_CLK 0x00000050
+#define SDRAM_SDTR2_RP_6_CLK 0x00000060
+#define SDRAM_SDTR2_RP_7_CLK 0x00000070
+#define SDRAM_SDTR2_RRD_MASK 0x0000000F
+#define SDRAM_SDTR2_RRD_2_CLK 0x00000002
+#define SDRAM_SDTR2_RRD_3_CLK 0x00000003
+
+/*-----------------------------------------------------------------------------+
+| SDRAM SDTR3 Options
++-----------------------------------------------------------------------------*/
+#define SDRAM_SDTR3_RAS_MASK 0x1F000000
+#define SDRAM_SDTR3_RAS_ENCODE(n) ((((unsigned long)(n))&0x1F)<<24)
+#define SDRAM_SDTR3_RC_MASK 0x001F0000
+#define SDRAM_SDTR3_RC_ENCODE(n) ((((unsigned long)(n))&0x1F)<<16)
+#define SDRAM_SDTR3_XCS_MASK 0x00001F00
+#define SDRAM_SDTR3_XCS 0x00000D00
+#define SDRAM_SDTR3_RFC_MASK 0x0000003F
+#define SDRAM_SDTR3_RFC_ENCODE(n) ((((unsigned long)(n))&0x3F)<<0)
+
+/*-----------------------------------------------------------------------------+
+| Memory Bank 0-1 configuration
++-----------------------------------------------------------------------------*/
+#define SDRAM_BXCF_M_AM_MASK 0x00000F00 /* Addressing mode */
+#define SDRAM_BXCF_M_AM_0 0x00000000 /* Mode 0 */
+#define SDRAM_BXCF_M_AM_1 0x00000100 /* Mode 1 */
+#define SDRAM_BXCF_M_AM_2 0x00000200 /* Mode 2 */
+#define SDRAM_BXCF_M_AM_3 0x00000300 /* Mode 3 */
+#define SDRAM_BXCF_M_AM_4 0x00000400 /* Mode 4 */
+#define SDRAM_BXCF_M_AM_5 0x00000500 /* Mode 5 */
+#define SDRAM_BXCF_M_AM_6 0x00000600 /* Mode 6 */
+#define SDRAM_BXCF_M_AM_7 0x00000700 /* Mode 7 */
+#define SDRAM_BXCF_M_AM_8 0x00000800 /* Mode 8 */
+#define SDRAM_BXCF_M_AM_9 0x00000900 /* Mode 9 */
+#define SDRAM_BXCF_M_BE_MASK 0x00000001 /* Memory Bank Enable */
+#define SDRAM_BXCF_M_BE_DISABLE 0x00000000 /* Memory Bank Enable */
+#define SDRAM_BXCF_M_BE_ENABLE 0x00000001 /* Memory Bank Enable */
+#endif /* CONFIG_440SPE */
+
/*-----------------------------------------------------------------------------
| External Bus Controller
+----------------------------------------------------------------------------*/
@@ -503,7 +1050,7 @@
/*-----------------------------------------------------------------------------
| L2 Cache
+----------------------------------------------------------------------------*/
-#if defined (CONFIG_440GX) || defined(CONFIG_440SP)
+#if defined (CONFIG_440GX) || defined(CONFIG_440SP) || defined(CONFIG_440SPE)
#define L2_CACHE_BASE 0x030
#define l2_cache_cfg (L2_CACHE_BASE+0x00) /* L2 Cache Config */
#define l2_cache_cmd (L2_CACHE_BASE+0x01) /* L2 Cache Command */
@@ -526,7 +1073,7 @@
| Clocking, Power Management and Chip Control
+----------------------------------------------------------------------------*/
#define CNTRL_DCR_BASE 0x0b0
-#if defined(CONFIG_440GX) || defined(CONFIG_440SP)
+#if defined(CONFIG_440GX) || defined(CONFIG_440SP) || defined(CONFIG_440SPE)
#define cpc0_er (CNTRL_DCR_BASE+0x00) /* CPM enable register */
#define cpc0_fr (CNTRL_DCR_BASE+0x01) /* CPM force register */
#define cpc0_sr (CNTRL_DCR_BASE+0x02) /* CPM status register */
@@ -574,6 +1121,30 @@
#define uic1vr (UIC1_DCR_BASE+0x7) /* UIC1 vector */
#define uic1vcr (UIC1_DCR_BASE+0x8) /* UIC1 vector configuration */
+#if defined(CONFIG_440SPE)
+#define UIC2_DCR_BASE 0xe0
+#define uic2sr (UIC0_DCR_BASE+0x0) /* UIC2 status-Read Clear */
+#define uic2srs (UIC0_DCR_BASE+0x1) /* UIC2 status-Read Set */
+#define uic2er (UIC0_DCR_BASE+0x2) /* UIC2 enable */
+#define uic2cr (UIC0_DCR_BASE+0x3) /* UIC2 critical */
+#define uic2pr (UIC0_DCR_BASE+0x4) /* UIC2 polarity */
+#define uic2tr (UIC0_DCR_BASE+0x5) /* UIC2 triggering */
+#define uic2msr (UIC0_DCR_BASE+0x6) /* UIC2 masked status */
+#define uic2vr (UIC0_DCR_BASE+0x7) /* UIC2 vector */
+#define uic2vcr (UIC0_DCR_BASE+0x8) /* UIC2 vector configuration */
+
+#define UIC3_DCR_BASE 0xf0
+#define uic3sr (UIC1_DCR_BASE+0x0) /* UIC3 status-Read Clear */
+#define uic3srs (UIC0_DCR_BASE+0x1) /* UIC3 status-Read Set */
+#define uic3er (UIC1_DCR_BASE+0x2) /* UIC3 enable */
+#define uic3cr (UIC1_DCR_BASE+0x3) /* UIC3 critical */
+#define uic3pr (UIC1_DCR_BASE+0x4) /* UIC3 polarity */
+#define uic3tr (UIC1_DCR_BASE+0x5) /* UIC3 triggering */
+#define uic3msr (UIC1_DCR_BASE+0x6) /* UIC3 masked status */
+#define uic3vr (UIC1_DCR_BASE+0x7) /* UIC3 vector */
+#define uic3vcr (UIC1_DCR_BASE+0x8) /* UIC3 vector configuration */
+#endif /* CONFIG_440SPE */
+
#if defined(CONFIG_440GX)
#define UIC2_DCR_BASE 0x210
#define uic2sr (UIC2_DCR_BASE+0x0) /* UIC2 status */
@@ -607,6 +1178,103 @@
#define uicvr uic0vr
#define uicvcr uic0vcr
+#if defined(CONFIG_440SPE)
+/*----------------------------------------------------------------------------+
+| Clock / Power-on-reset DCR's.
++----------------------------------------------------------------------------*/
+#define CPR0_CFGADDR 0x00C
+#define CPR0_CFGDATA 0x00D
+
+#define CPR0_CLKUPD 0x20
+#define CPR0_CLKUPD_BSY_MASK 0x80000000
+#define CPR0_CLKUPD_BSY_COMPLETED 0x00000000
+#define CPR0_CLKUPD_BSY_BUSY 0x80000000
+#define CPR0_CLKUPD_CUI_MASK 0x80000000
+#define CPR0_CLKUPD_CUI_DISABLE 0x00000000
+#define CPR0_CLKUPD_CUI_ENABLE 0x80000000
+#define CPR0_CLKUPD_CUD_MASK 0x40000000
+#define CPR0_CLKUPD_CUD_DISABLE 0x00000000
+#define CPR0_CLKUPD_CUD_ENABLE 0x40000000
+
+#define CPR0_PLLC 0x40
+#define CPR0_PLLC_RST_MASK 0x80000000
+#define CPR0_PLLC_RST_PLLLOCKED 0x00000000
+#define CPR0_PLLC_RST_PLLRESET 0x80000000
+#define CPR0_PLLC_ENG_MASK 0x40000000
+#define CPR0_PLLC_ENG_DISABLE 0x00000000
+#define CPR0_PLLC_ENG_ENABLE 0x40000000
+#define CPR0_PLLC_ENG_ENCODE(n) ((((unsigned long)(n))&0x01)<<30)
+#define CPR0_PLLC_ENG_DECODE(n) ((((unsigned long)(n))>>30)&0x01)
+#define CPR0_PLLC_SRC_MASK 0x20000000
+#define CPR0_PLLC_SRC_PLLOUTA 0x00000000
+#define CPR0_PLLC_SRC_PLLOUTB 0x20000000
+#define CPR0_PLLC_SRC_ENCODE(n) ((((unsigned long)(n))&0x01)<<29)
+#define CPR0_PLLC_SRC_DECODE(n) ((((unsigned long)(n))>>29)&0x01)
+#define CPR0_PLLC_SEL_MASK 0x07000000
+#define CPR0_PLLC_SEL_PLLOUT 0x00000000
+#define CPR0_PLLC_SEL_CPU 0x01000000
+#define CPR0_PLLC_SEL_EBC 0x05000000
+#define CPR0_PLLC_SEL_ENCODE(n) ((((unsigned long)(n))&0x07)<<24)
+#define CPR0_PLLC_SEL_DECODE(n) ((((unsigned long)(n))>>24)&0x07)
+#define CPR0_PLLC_TUNE_MASK 0x000003FF
+#define CPR0_PLLC_TUNE_ENCODE(n) ((((unsigned long)(n))&0x3FF)<<0)
+#define CPR0_PLLC_TUNE_DECODE(n) ((((unsigned long)(n))>>0)&0x3FF)
+
+#define CPR0_PLLD 0x60
+#define CPR0_PLLD_FBDV_MASK 0x1F000000
+#define CPR0_PLLD_FBDV_ENCODE(n) ((((unsigned long)(n))&0x1F)<<24)
+#define CPR0_PLLD_FBDV_DECODE(n) ((((((unsigned long)(n))>>24)-1)&0x1F)+1)
+#define CPR0_PLLD_FWDVA_MASK 0x000F0000
+#define CPR0_PLLD_FWDVA_ENCODE(n) ((((unsigned long)(n))&0x0F)<<16)
+#define CPR0_PLLD_FWDVA_DECODE(n) ((((((unsigned long)(n))>>16)-1)&0x0F)+1)
+#define CPR0_PLLD_FWDVB_MASK 0x00000700
+#define CPR0_PLLD_FWDVB_ENCODE(n) ((((unsigned long)(n))&0x07)<<8)
+#define CPR0_PLLD_FWDVB_DECODE(n) ((((((unsigned long)(n))>>8)-1)&0x07)+1)
+#define CPR0_PLLD_LFBDV_MASK 0x0000003F
+#define CPR0_PLLD_LFBDV_ENCODE(n) ((((unsigned long)(n))&0x3F)<<0)
+#define CPR0_PLLD_LFBDV_DECODE(n) ((((((unsigned long)(n))>>0)-1)&0x3F)+1)
+
+#define CPR0_PRIMAD 0x80
+#define CPR0_PRIMAD_PRADV0_MASK 0x07000000
+#define CPR0_PRIMAD_PRADV0_ENCODE(n) ((((unsigned long)(n))&0x07)<<24)
+#define CPR0_PRIMAD_PRADV0_DECODE(n) ((((((unsigned long)(n))>>24)-1)&0x07)+1)
+
+#define CPR0_PRIMBD 0xA0
+#define CPR0_PRIMBD_PRBDV0_MASK 0x07000000
+#define CPR0_PRIMBD_PRBDV0_ENCODE(n) ((((unsigned long)(n))&0x07)<<24)
+#define CPR0_PRIMBD_PRBDV0_DECODE(n) ((((((unsigned long)(n))>>24)-1)&0x07)+1)
+
+#define CPR0_OPBD 0xC0
+#define CPR0_OPBD_OPBDV0_MASK 0x03000000
+#define CPR0_OPBD_OPBDV0_ENCODE(n) ((((unsigned long)(n))&0x03)<<24)
+#define CPR0_OPBD_OPBDV0_DECODE(n) ((((((unsigned long)(n))>>24)-1)&0x03)+1)
+
+#define CPR0_PERD 0xE0
+#define CPR0_PERD_PERDV0_MASK 0x03000000
+#define CPR0_PERD_PERDV0_ENCODE(n) ((((unsigned long)(n))&0x03)<<24)
+#define CPR0_PERD_PERDV0_DECODE(n) ((((((unsigned long)(n))>>24)-1)&0x03)+1)
+
+#define CPR0_MALD 0x100
+#define CPR0_MALD_MALDV0_MASK 0x03000000
+#define CPR0_MALD_MALDV0_ENCODE(n) ((((unsigned long)(n))&0x03)<<24)
+#define CPR0_MALD_MALDV0_DECODE(n) ((((((unsigned long)(n))>>24)-1)&0x03)+1)
+
+#define CPR0_ICFG 0x140
+#define CPR0_ICFG_RLI_MASK 0x80000000
+#define CPR0_ICFG_RLI_RESETCPR 0x00000000
+#define CPR0_ICFG_RLI_PRESERVECPR 0x80000000
+#define CPR0_ICFG_ICS_MASK 0x00000007
+#define CPR0_ICFG_ICS_ENCODE(n) ((((unsigned long)(n))&0x3F)<<0)
+#define CPR0_ICFG_ICS_DECODE(n) ((((((unsigned long)(n))>>0)-1)&0x3F)+1)
+
+/************************/
+/* IIC defines */
+/************************/
+#define IIC0_MMIO_BASE 0xA0000400
+#define IIC1_MMIO_BASE 0xA0000500
+
+#endif /* CONFIG_440SP */
+
/*-----------------------------------------------------------------------------
| DMA
+----------------------------------------------------------------------------*/
@@ -722,7 +1390,7 @@
#define UIC_GPTCT 0x00000004 /* GPT count timer */
#define UIC_UIC1NC 0x00000002 /* UIC1 non-critical interrupt */
#define UIC_UIC1C 0x00000001 /* UIC1 critical interrupt */
-#else /* CONFIG_440SP */
+#elif defined(CONFIG_440GX) || defined(CONFIG_440EP)
#define UIC_U0 0x80000000 /* UART 0 */
#define UIC_U1 0x40000000 /* UART 1 */
#define UIC_IIC0 0x20000000 /* IIC */
@@ -755,7 +1423,40 @@
#define UIC_EIR6 0x00000004 /* External interrupt 6 */
#define UIC_UIC1NC 0x00000002 /* UIC1 non-critical interrupt */
#define UIC_UIC1C 0x00000001 /* UIC1 critical interrupt */
-#endif /* CONFIG_440SP */
+#elif !defined(CONFIG_440SPE)
+#define UIC_U0 0x80000000 /* UART 0 */
+#define UIC_U1 0x40000000 /* UART 1 */
+#define UIC_IIC0 0x20000000 /* IIC */
+#define UIC_IIC1 0x10000000 /* IIC */
+#define UIC_PIM 0x08000000 /* PCI inbound message */
+#define UIC_PCRW 0x04000000 /* PCI command register write */
+#define UIC_PPM 0x02000000 /* PCI power management */
+#define UIC_MSI0 0x01000000 /* PCI MSI level 0 */
+#define UIC_MSI1 0x00800000 /* PCI MSI level 1 */
+#define UIC_MSI2 0x00400000 /* PCI MSI level 2 */
+#define UIC_MTE 0x00200000 /* MAL TXEOB */
+#define UIC_MRE 0x00100000 /* MAL RXEOB */
+#define UIC_D0 0x00080000 /* DMA channel 0 */
+#define UIC_D1 0x00040000 /* DMA channel 1 */
+#define UIC_D2 0x00020000 /* DMA channel 2 */
+#define UIC_D3 0x00010000 /* DMA channel 3 */
+#define UIC_RSVD0 0x00008000 /* Reserved */
+#define UIC_RSVD1 0x00004000 /* Reserved */
+#define UIC_CT0 0x00002000 /* GPT compare timer 0 */
+#define UIC_CT1 0x00001000 /* GPT compare timer 1 */
+#define UIC_CT2 0x00000800 /* GPT compare timer 2 */
+#define UIC_CT3 0x00000400 /* GPT compare timer 3 */
+#define UIC_CT4 0x00000200 /* GPT compare timer 4 */
+#define UIC_EIR0 0x00000100 /* External interrupt 0 */
+#define UIC_EIR1 0x00000080 /* External interrupt 1 */
+#define UIC_EIR2 0x00000040 /* External interrupt 2 */
+#define UIC_EIR3 0x00000020 /* External interrupt 3 */
+#define UIC_EIR4 0x00000010 /* External interrupt 4 */
+#define UIC_EIR5 0x00000008 /* External interrupt 5 */
+#define UIC_EIR6 0x00000004 /* External interrupt 6 */
+#define UIC_UIC1NC 0x00000002 /* UIC1 non-critical interrupt */
+#define UIC_UIC1C 0x00000001 /* UIC1 critical interrupt */
+#endif /* CONFIG_440GX */
/* For compatibility with 405 code */
#define UIC_MAL_TXEOB UIC_MTE
@@ -797,7 +1498,40 @@
#define UIC_EWU0 0x00000004 /* Ethernet 0 wakeup */
#define UIC_ETH1 0x00000002 /* Reserved */
#define UIC_XOR 0x00000001 /* XOR */
-#else /* CONFIG_440SP */
+#elif defined(CONFIG_440GX) || defined(CONFIG_440EP)
+#define UIC_MS 0x80000000 /* MAL SERR */
+#define UIC_MTDE 0x40000000 /* MAL TXDE */
+#define UIC_MRDE 0x20000000 /* MAL RXDE */
+#define UIC_DEUE 0x10000000 /* DDR SDRAM ECC uncorrectible error*/
+#define UIC_DECE 0x08000000 /* DDR SDRAM correctible error */
+#define UIC_EBCO 0x04000000 /* EBCO interrupt status */
+#define UIC_EBMI 0x02000000 /* EBMI interrupt status */
+#define UIC_OPB 0x01000000 /* OPB to PLB bridge interrupt stat */
+#define UIC_MSI3 0x00800000 /* PCI MSI level 3 */
+#define UIC_MSI4 0x00400000 /* PCI MSI level 4 */
+#define UIC_MSI5 0x00200000 /* PCI MSI level 5 */
+#define UIC_MSI6 0x00100000 /* PCI MSI level 6 */
+#define UIC_MSI7 0x00080000 /* PCI MSI level 7 */
+#define UIC_MSI8 0x00040000 /* PCI MSI level 8 */
+#define UIC_MSI9 0x00020000 /* PCI MSI level 9 */
+#define UIC_MSI10 0x00010000 /* PCI MSI level 10 */
+#define UIC_MSI11 0x00008000 /* PCI MSI level 11 */
+#define UIC_PPMI 0x00004000 /* PPM interrupt status */
+#define UIC_EIR7 0x00002000 /* External interrupt 7 */
+#define UIC_EIR8 0x00001000 /* External interrupt 8 */
+#define UIC_EIR9 0x00000800 /* External interrupt 9 */
+#define UIC_EIR10 0x00000400 /* External interrupt 10 */
+#define UIC_EIR11 0x00000200 /* External interrupt 11 */
+#define UIC_EIR12 0x00000100 /* External interrupt 12 */
+#define UIC_SRE 0x00000080 /* Serial ROM error */
+#define UIC_RSVD2 0x00000040 /* Reserved */
+#define UIC_RSVD3 0x00000020 /* Reserved */
+#define UIC_PAE 0x00000010 /* PCI asynchronous error */
+#define UIC_ETH0 0x00000008 /* Ethernet 0 */
+#define UIC_EWU0 0x00000004 /* Ethernet 0 wakeup */
+#define UIC_ETH1 0x00000002 /* Ethernet 1 */
+#define UIC_EWU1 0x00000001 /* Ethernet 1 wakeup */
+#elif !defined(CONFIG_440SPE)
#define UIC_MS 0x80000000 /* MAL SERR */
#define UIC_MTDE 0x40000000 /* MAL TXDE */
#define UIC_MRDE 0x20000000 /* MAL RXDE */
@@ -890,6 +1624,117 @@
#define UICB0_ALL (UICB0_UIC0CI | UICB0_UIC0NCI | UICB0_UIC1CI | \
UICB0_UIC1NCI | UICB0_UIC2CI | UICB0_UIC2NCI)
#endif /* CONFIG_440GX */
+/*---------------------------------------------------------------------------+
+| Universal interrupt controller interrupts
++---------------------------------------------------------------------------*/
+#if defined(CONFIG_440SPE)
+/*#define UICB0_UIC0CI 0x80000000*/ /* UIC0 Critical Interrupt */
+/*#define UICB0_UIC0NCI 0x40000000*/ /* UIC0 Noncritical Interrupt */
+#define UICB0_UIC1CI 0x00000002 /* UIC1 Critical Interrupt */
+#define UICB0_UIC1NCI 0x00000001 /* UIC1 Noncritical Interrupt */
+#define UICB0_UIC2CI 0x00200000 /* UIC2 Critical Interrupt */
+#define UICB0_UIC2NCI 0x00100000 /* UIC2 Noncritical Interrupt */
+#define UICB0_UIC3CI 0x00008000 /* UIC3 Critical Interrupt */
+#define UICB0_UIC3NCI 0x00004000 /* UIC3 Noncritical Interrupt */
+
+#define UICB0_ALL (UICB0_UIC1CI | UICB0_UIC1NCI | UICB0_UIC2CI | \
+ UICB0_UIC2NCI | UICB0_UIC3CI | UICB0_UIC3NCI)
+/*---------------------------------------------------------------------------+
+| Universal interrupt controller 0 interrupts (UIC0)
++---------------------------------------------------------------------------*/
+#define UIC_U0 0x80000000 /* UART 0 */
+#define UIC_U1 0x40000000 /* UART 1 */
+#define UIC_IIC0 0x20000000 /* IIC */
+#define UIC_IIC1 0x10000000 /* IIC */
+#define UIC_PIM 0x08000000 /* PCI inbound message */
+#define UIC_PCRW 0x04000000 /* PCI command register write */
+#define UIC_PPM 0x02000000 /* PCI power management */
+#define UIC_PVPDA 0x01000000 /* PCIx 0 vpd access */
+#define UIC_MSI0 0x00800000 /* PCIx MSI level 0 */
+#define UIC_EIR15 0x00400000 /* External intp 15 */
+#define UIC_PEMSI0 0x00080000 /* PCIe MSI level 0 */
+#define UIC_PEMSI1 0x00040000 /* PCIe MSI level 1 */
+#define UIC_PEMSI2 0x00020000 /* PCIe MSI level 2 */
+#define UIC_PEMSI3 0x00010000 /* PCIe MSI level 3 */
+#define UIC_EIR14 0x00002000 /* External interrupt 14 */
+#define UIC_D0CPFF 0x00001000 /* DMA0 cp fifo full */
+#define UIC_D0CSNS 0x00000800 /* DMA0 cs fifo needs service */
+#define UIC_D1CPFF 0x00000400 /* DMA1 cp fifo full */
+#define UIC_D1CSNS 0x00000200 /* DMA1 cs fifo needs service */
+#define UIC_I2OID 0x00000100 /* I2O inbound door bell */
+#define UIC_I2OLNE 0x00000080 /* I2O Inbound Post List FIFO Not Empty */
+#define UIC_I20R0LL 0x00000040 /* I2O Region 0 Low Latency PLB Write */
+#define UIC_I2OR1LL 0x00000020 /* I2O Region 1 Low Latency PLB Write */
+#define UIC_I20R0HB 0x00000010 /* I2O Region 0 High Bandwidth PLB Write */
+#define UIC_I2OR1HB 0x00000008 /* I2O Region 1 High Bandwidth PLB Write */
+#define UIC_CPTCNT 0x00000004 /* GPT Count Timer */
+/*---------------------------------------------------------------------------+
+| Universal interrupt controller 1 interrupts (UIC1)
++---------------------------------------------------------------------------*/
+#define UIC_EIR13 0x80000000 /* externei intp 13 */
+#define UIC_MS 0x40000000 /* MAL SERR */
+#define UIC_MTDE 0x20000000 /* MAL TXDE */
+#define UIC_MRDE 0x10000000 /* MAL RXDE */
+#define UIC_DEUE 0x08000000 /* DDR SDRAM ECC correct/uncorrectable error */
+#define UIC_EBCO 0x04000000 /* EBCO interrupt status */
+#define UIC_MTE 0x02000000 /* MAL TXEOB */
+#define UIC_MRE 0x01000000 /* MAL RXEOB */
+#define UIC_MSI1 0x00800000 /* PCI MSI level 1 */
+#define UIC_MSI2 0x00400000 /* PCI MSI level 2 */
+#define UIC_MSI3 0x00200000 /* PCI MSI level 3 */
+#define UIC_L2C 0x00100000 /* L2 cache */
+#define UIC_CT0 0x00080000 /* GPT compare timer 0 */
+#define UIC_CT1 0x00040000 /* GPT compare timer 1 */
+#define UIC_CT2 0x00020000 /* GPT compare timer 2 */
+#define UIC_CT3 0x00010000 /* GPT compare timer 3 */
+#define UIC_CT4 0x00008000 /* GPT compare timer 4 */
+#define UIC_EIR12 0x00004000 /* External interrupt 12 */
+#define UIC_EIR11 0x00002000 /* External interrupt 11 */
+#define UIC_EIR10 0x00001000 /* External interrupt 10 */
+#define UIC_EIR9 0x00000800 /* External interrupt 9 */
+#define UIC_EIR8 0x00000400 /* External interrupt 8 */
+#define UIC_DMAE 0x00000200 /* dma error */
+#define UIC_I2OE 0x00000100 /* i2o error */
+#define UIC_SRE 0x00000080 /* Serial ROM error */
+#define UIC_PCIXAE 0x00000040 /* Pcix0 async error */
+#define UIC_EIR7 0x00000020 /* External interrupt 7 */
+#define UIC_EIR6 0x00000010 /* External interrupt 6 */
+#define UIC_ETH0 0x00000008 /* Ethernet 0 */
+#define UIC_EWU0 0x00000004 /* Ethernet 0 wakeup */
+#define UIC_ETH1 0x00000002 /* reserved */
+#define UIC_XOR 0x00000001 /* xor */
+
+/*---------------------------------------------------------------------------+
+| Universal interrupt controller 2 interrupts (UIC2)
++---------------------------------------------------------------------------*/
+#define UIC_PEOAL 0x80000000 /* PE0 AL */
+#define UIC_PEOVA 0x40000000 /* PE0 VPD access */
+#define UIC_PEOHRR 0x20000000 /* PE0 Host reset request rising */
+#define UIC_PE0HRF 0x10000000 /* PE0 Host reset request falling */
+#define UIC_PE0TCR 0x08000000 /* PE0 TCR */
+#define UIC_PE0BVCO 0x04000000 /* PE0 Busmaster VCO */
+#define UIC_PE0DCRE 0x02000000 /* PE0 DCR error */
+#define UIC_PE1AL 0x00800000 /* PE1 AL */
+#define UIC_PE1VA 0x00400000 /* PE1 VPD access */
+#define UIC_PE1HRR 0x00200000 /* PE1 Host reset request rising */
+#define UIC_PE1HRF 0x00100000 /* PE1 Host reset request falling */
+#define UIC_PE1TCR 0x00080000 /* PE1 TCR */
+#define UIC_PE1BVCO 0x00040000 /* PE1 Busmaster VCO */
+#define UIC_PE1DCRE 0x00020000 /* PE1 DCR error */
+#define UIC_PE2AL 0x00008000 /* PE2 AL */
+#define UIC_PE2VA 0x00004000 /* PE2 VPD access */
+#define UIC_PE2HRR 0x00002000 /* PE2 Host reset request rising */
+#define UIC_PE2HRF 0x00001000 /* PE2 Host reset request falling */
+#define UIC_PE2TCR 0x00000800 /* PE2 TCR */
+#define UIC_PE2BVCO 0x00000400 /* PE2 Busmaster VCO */
+#define UIC_PE2DCRE 0x00000200 /* PE2 DCR error */
+#define UIC_EIR5 0x00000080 /* External interrupt 5 */
+#define UIC_EIR4 0x00000040 /* External interrupt 4 */
+#define UIC_EIR3 0x00000020 /* External interrupt 3 */
+#define UIC_EIR2 0x00000010 /* External interrupt 2 */
+#define UIC_EIR1 0x00000008 /* External interrupt 1 */
+#define UIC_EIR0 0x00000004 /* External interrupt 0 */
+#endif /* CONFIG_440SPE */
/*-----------------------------------------------------------------------------+
| External Bus Controller Bit Settings
@@ -981,6 +1826,432 @@
/*-----------------------------------------------------------------------------+
| SDR0 Bit Settings
+-----------------------------------------------------------------------------*/
+#if defined(CONFIG_440SPE)
+#define SDR0_CP440 0x0180
+#define SDR0_CP440_ERPN_MASK 0x30000000
+#define SDR0_CP440_ERPN_MASK_HI 0x3000
+#define SDR0_CP440_ERPN_MASK_LO 0x0000
+#define SDR0_CP440_ERPN_EBC 0x10000000
+#define SDR0_CP440_ERPN_EBC_HI 0x1000
+#define SDR0_CP440_ERPN_EBC_LO 0x0000
+#define SDR0_CP440_ERPN_PCI 0x20000000
+#define SDR0_CP440_ERPN_PCI_HI 0x2000
+#define SDR0_CP440_ERPN_PCI_LO 0x0000
+#define SDR0_CP440_ERPN_ENCODE(n) ((((unsigned long)(n))&0x03)<<28)
+#define SDR0_CP440_ERPN_DECODE(n) ((((unsigned long)(n))>>28)&0x03)
+#define SDR0_CP440_NTO1_MASK 0x00000002
+#define SDR0_CP440_NTO1_NTOP 0x00000000
+#define SDR0_CP440_NTO1_NTO1 0x00000002
+#define SDR0_CP440_NTO1_ENCODE(n) ((((unsigned long)(n))&0x01)<<1)
+#define SDR0_CP440_NTO1_DECODE(n) ((((unsigned long)(n))>>1)&0x01)
+#define SDR0_CFGADDR 0x00E /*already defined line 277 */
+#define SDR0_CFGDATA 0x00F
+
+
+#define SDR0_SDSTP0 0x0020
+#define SDR0_SDSTP0_ENG_MASK 0x80000000
+#define SDR0_SDSTP0_ENG_PLLDIS 0x00000000
+#define SDR0_SDSTP0_ENG_PLLENAB 0x80000000
+#define SDR0_SDSTP0_ENG_ENCODE(n) ((((unsigned long)(n))&0x01)<<31)
+#define SDR0_SDSTP0_ENG_DECODE(n) ((((unsigned long)(n))>>31)&0x01)
+#define SDR0_SDSTP0_SRC_MASK 0x40000000
+#define SDR0_SDSTP0_SRC_PLLOUTA 0x00000000
+#define SDR0_SDSTP0_SRC_PLLOUTB 0x40000000
+#define SDR0_SDSTP0_SRC_ENCODE(n) ((((unsigned long)(n))&0x01)<<30)
+#define SDR0_SDSTP0_SRC_DECODE(n) ((((unsigned long)(n))>>30)&0x01)
+#define SDR0_SDSTP0_SEL_MASK 0x38000000
+#define SDR0_SDSTP0_SEL_PLLOUT 0x00000000
+#define SDR0_SDSTP0_SEL_CPU 0x08000000
+#define SDR0_SDSTP0_SEL_EBC 0x28000000
+#define SDR0_SDSTP0_SEL_ENCODE(n) ((((unsigned long)(n))&0x07)<<27)
+#define SDR0_SDSTP0_SEL_DECODE(n) ((((unsigned long)(n))>>27)&0x07)
+#define SDR0_SDSTP0_TUNE_MASK 0x07FE0000
+#define SDR0_SDSTP0_TUNE_ENCODE(n) ((((unsigned long)(n))&0x3FF)<<17)
+#define SDR0_SDSTP0_TUNE_DECODE(n) ((((unsigned long)(n))>>17)&0x3FF)
+#define SDR0_SDSTP0_FBDV_MASK 0x0001F000
+#define SDR0_SDSTP0_FBDV_ENCODE(n) ((((unsigned long)(n))&0x1F)<<12)
+#define SDR0_SDSTP0_FBDV_DECODE(n) ((((((unsigned long)(n))>>12)-1)&0x1F)+1)
+#define SDR0_SDSTP0_FWDVA_MASK 0x00000F00
+#define SDR0_SDSTP0_FWDVA_ENCODE(n) ((((unsigned long)(n))&0x0F)<<8)
+#define SDR0_SDSTP0_FWDVA_DECODE(n) ((((((unsigned long)(n))>>8)-1)&0x0F)+1)
+#define SDR0_SDSTP0_FWDVB_MASK 0x000000E0
+#define SDR0_SDSTP0_FWDVB_ENCODE(n) ((((unsigned long)(n))&0x07)<<5)
+#define SDR0_SDSTP0_FWDVB_DECODE(n) ((((((unsigned long)(n))>>5)-1)&0x07)+1)
+#define SDR0_SDSTP0_PRBDV0_MASK 0x0000001C
+#define SDR0_SDSTP0_PRBDV0_ENCODE(n) ((((unsigned long)(n))&0x07)<<2)
+#define SDR0_SDSTP0_PRBDV0_DECODE(n) ((((((unsigned long)(n))>>2)-1)&0x07)+1)
+#define SDR0_SDSTP0_OPBDV0_MASK 0x00000003
+#define SDR0_SDSTP0_OPBDV0_ENCODE(n) ((((unsigned long)(n))&0x03)<<0)
+#define SDR0_SDSTP0_OPBDV0_DECODE(n) ((((((unsigned long)(n))>>0)-1)&0x03)+1)
+
+
+#define SDR0_SDSTP1 0x0021
+#define SDR0_SDSTP1_LFBDV_MASK 0xFC000000
+#define SDR0_SDSTP1_LFBDV_ENCODE(n) ((((unsigned long)(n))&0x3F)<<26)
+#define SDR0_SDSTP1_LFBDV_DECODE(n) ((((unsigned long)(n))>>26)&0x3F)
+#define SDR0_SDSTP1_PERDV0_MASK 0x03000000
+#define SDR0_SDSTP1_PERDV0_ENCODE(n) ((((unsigned long)(n))&0x03)<<24)
+#define SDR0_SDSTP1_PERDV0_DECODE(n) ((((unsigned long)(n))>>24)&0x03)
+#define SDR0_SDSTP1_MALDV0_MASK 0x00C00000
+#define SDR0_SDSTP1_MALDV0_ENCODE(n) ((((unsigned long)(n))&0x03)<<22)
+#define SDR0_SDSTP1_MALDV0_DECODE(n) ((((unsigned long)(n))>>22)&0x03)
+#define SDR0_SDSTP1_DDR_MODE_MASK 0x00300000
+#define SDR0_SDSTP1_DDR1_MODE 0x00100000
+#define SDR0_SDSTP1_DDR2_MODE 0x00200000
+#define SDR0_SDSTP1_DDR_ENCODE(n) ((((unsigned long)(n))&0x03)<<20)
+#define SDR0_SDSTP1_DDR_DECODE(n) ((((unsigned long)(n))>>20)&0x03)
+#define SDR0_SDSTP1_ERPN_MASK 0x00080000
+#define SDR0_SDSTP1_ERPN_EBC 0x00000000
+#define SDR0_SDSTP1_ERPN_PCI 0x00080000
+#define SDR0_SDSTP1_PAE_MASK 0x00040000
+#define SDR0_SDSTP1_PAE_DISABLE 0x00000000
+#define SDR0_SDSTP1_PAE_ENABLE 0x00040000
+#define SDR0_SDSTP1_PAE_ENCODE(n) ((((unsigned long)(n))&0x01)<<18)
+#define SDR0_SDSTP1_PAE_DECODE(n) ((((unsigned long)(n))>>18)&0x01)
+#define SDR0_SDSTP1_PHCE_MASK 0x00020000
+#define SDR0_SDSTP1_PHCE_DISABLE 0x00000000
+#define SDR0_SDSTP1_PHCE_ENABLE 0x00020000
+#define SDR0_SDSTP1_PHCE_ENCODE(n) ((((unsigned long)(n))&0x01)<<17)
+#define SDR0_SDSTP1_PHCE_DECODE(n) ((((unsigned long)(n))>>17)&0x01)
+#define SDR0_SDSTP1_PISE_MASK 0x00010000
+#define SDR0_SDSTP1_PISE_DISABLE 0x00000000
+#define SDR0_SDSTP1_PISE_ENABLE 0x00001000
+#define SDR0_SDSTP1_PISE_ENCODE(n) ((((unsigned long)(n))&0x01)<<16)
+#define SDR0_SDSTP1_PISE_DECODE(n) ((((unsigned long)(n))>>16)&0x01)
+#define SDR0_SDSTP1_PCWE_MASK 0x00008000
+#define SDR0_SDSTP1_PCWE_DISABLE 0x00000000
+#define SDR0_SDSTP1_PCWE_ENABLE 0x00008000
+#define SDR0_SDSTP1_PCWE_ENCODE(n) ((((unsigned long)(n))&0x01)<<15)
+#define SDR0_SDSTP1_PCWE_DECODE(n) ((((unsigned long)(n))>>15)&0x01)
+#define SDR0_SDSTP1_PPIM_MASK 0x00007800
+#define SDR0_SDSTP1_PPIM_ENCODE(n) ((((unsigned long)(n))&0x0F)<<11)
+#define SDR0_SDSTP1_PPIM_DECODE(n) ((((unsigned long)(n))>>11)&0x0F)
+#define SDR0_SDSTP1_PR64E_MASK 0x00000400
+#define SDR0_SDSTP1_PR64E_DISABLE 0x00000000
+#define SDR0_SDSTP1_PR64E_ENABLE 0x00000400
+#define SDR0_SDSTP1_PR64E_ENCODE(n) ((((unsigned long)(n))&0x01)<<10)
+#define SDR0_SDSTP1_PR64E_DECODE(n) ((((unsigned long)(n))>>10)&0x01)
+#define SDR0_SDSTP1_PXFS_MASK 0x00000300
+#define SDR0_SDSTP1_PXFS_100_133 0x00000000
+#define SDR0_SDSTP1_PXFS_66_100 0x00000100
+#define SDR0_SDSTP1_PXFS_50_66 0x00000200
+#define SDR0_SDSTP1_PXFS_0_50 0x00000300
+#define SDR0_SDSTP1_PXFS_ENCODE(n) ((((unsigned long)(n))&0x03)<<8)
+#define SDR0_SDSTP1_PXFS_DECODE(n) ((((unsigned long)(n))>>8)&0x03)
+#define SDR0_SDSTP1_EBCW_MASK 0x00000080 /* SOP */
+#define SDR0_SDSTP1_EBCW_8_BITS 0x00000000 /* SOP */
+#define SDR0_SDSTP1_EBCW_16_BITS 0x00000080 /* SOP */
+#define SDR0_SDSTP1_DBGEN_MASK 0x00000030 /* $218C */
+#define SDR0_SDSTP1_DBGEN_FUNC 0x00000000
+#define SDR0_SDSTP1_DBGEN_TRACE 0x00000010
+#define SDR0_SDSTP1_DBGEN_ENCODE(n) ((((unsigned long)(n))&0x03)<<4) /* $218C */
+#define SDR0_SDSTP1_DBGEN_DECODE(n) ((((unsigned long)(n))>>4)&0x03) /* $218C */
+#define SDR0_SDSTP1_ETH_MASK 0x00000004
+#define SDR0_SDSTP1_ETH_10_100 0x00000000
+#define SDR0_SDSTP1_ETH_GIGA 0x00000004
+#define SDR0_SDSTP1_ETH_ENCODE(n) ((((unsigned long)(n))&0x01)<<2)
+#define SDR0_SDSTP1_ETH_DECODE(n) ((((unsigned long)(n))>>2)&0x01)
+#define SDR0_SDSTP1_NTO1_MASK 0x00000001
+#define SDR0_SDSTP1_NTO1_DISABLE 0x00000000
+#define SDR0_SDSTP1_NTO1_ENABLE 0x00000001
+#define SDR0_SDSTP1_NTO1_ENCODE(n) ((((unsigned long)(n))&0x01)<<0)
+#define SDR0_SDSTP1_NTO1_DECODE(n) ((((unsigned long)(n))>>0)&0x01)
+
+#define SDR0_SDSTP2 0x0022
+#define SDR0_SDSTP2_P1AE_MASK 0x80000000
+#define SDR0_SDSTP2_P1AE_DISABLE 0x00000000
+#define SDR0_SDSTP2_P1AE_ENABLE 0x80000000
+#define SDR0_SDSTP2_P1AE_ENCODE(n) ((((unsigned long)(n))&0x01)<<31)
+#define SDR0_SDSTP2_P1AE_DECODE(n) ((((unsigned long)(n))>>31)&0x01)
+#define SDR0_SDSTP2_P1HCE_MASK 0x40000000
+#define SDR0_SDSTP2_P1HCE_DISABLE 0x00000000
+#define SDR0_SDSTP2_P1HCE_ENABLE 0x40000000
+#define SDR0_SDSTP2_P1HCE_ENCODE(n) ((((unsigned long)(n))&0x01)<<30)
+#define SDR0_SDSTP2_P1HCE_DECODE(n) ((((unsigned long)(n))>>30)&0x01)
+#define SDR0_SDSTP2_P1ISE_MASK 0x20000000
+#define SDR0_SDSTP2_P1ISE_DISABLE 0x00000000
+#define SDR0_SDSTP2_P1ISE_ENABLE 0x20000000
+#define SDR0_SDSTP2_P1ISE_ENCODE(n) ((((unsigned long)(n))&0x01)<<29)
+#define SDR0_SDSTP2_P1ISE_DECODE(n) ((((unsigned long)(n))>>29)&0x01)
+#define SDR0_SDSTP2_P1CWE_MASK 0x10000000
+#define SDR0_SDSTP2_P1CWE_DISABLE 0x00000000
+#define SDR0_SDSTP2_P1CWE_ENABLE 0x10000000
+#define SDR0_SDSTP2_P1CWE_ENCODE(n) ((((unsigned long)(n))&0x01)<<28)
+#define SDR0_SDSTP2_P1CWE_DECODE(n) ((((unsigned long)(n))>>28)&0x01)
+#define SDR0_SDSTP2_P1PIM_MASK 0x0F000000
+#define SDR0_SDSTP2_P1PIM_ENCODE(n) ((((unsigned long)(n))&0x0F)<<24)
+#define SDR0_SDSTP2_P1PIM_DECODE(n) ((((unsigned long)(n))>>24)&0x0F)
+#define SDR0_SDSTP2_P1R64E_MASK 0x00800000
+#define SDR0_SDSTP2_P1R64E_DISABLE 0x00000000
+#define SDR0_SDSTP2_P1R64E_ENABLE 0x00800000
+#define SDR0_SDSTP2_P1R64E_ENCODE(n) ((((unsigned long)(n))&0x01)<<23)
+#define SDR0_SDSTP2_P1R64E_DECODE(n) ((((unsigned long)(n))>>23)&0x01)
+#define SDR0_SDSTP2_P1XFS_MASK 0x00600000
+#define SDR0_SDSTP2_P1XFS_100_133 0x00000000
+#define SDR0_SDSTP2_P1XFS_66_100 0x00200000
+#define SDR0_SDSTP2_P1XFS_50_66 0x00400000
+#define SDR0_SDSTP2_P1XFS_0_50 0x00600000
+#define SDR0_SDSTP2_P1XFS_ENCODE(n) ((((unsigned long)(n))&0x03)<<21)
+#define SDR0_SDSTP2_P1XFS_DECODE(n) ((((unsigned long)(n))>>21)&0x03)
+#define SDR0_SDSTP2_P2AE_MASK 0x00040000
+#define SDR0_SDSTP2_P2AE_DISABLE 0x00000000
+#define SDR0_SDSTP2_P2AE_ENABLE 0x00040000
+#define SDR0_SDSTP2_P2AE_ENCODE(n) ((((unsigned long)(n))&0x01)<<18)
+#define SDR0_SDSTP2_P2AE_DECODE(n) ((((unsigned long)(n))>>18)&0x01)
+#define SDR0_SDSTP2_P2HCE_MASK 0x00020000
+#define SDR0_SDSTP2_P2HCE_DISABLE 0x00000000
+#define SDR0_SDSTP2_P2HCE_ENABLE 0x00020000
+#define SDR0_SDSTP2_P2HCE_ENCODE(n) ((((unsigned long)(n))&0x01)<<17)
+#define SDR0_SDSTP2_P2HCE_DECODE(n) ((((unsigned long)(n))>>17)&0x01)
+#define SDR0_SDSTP2_P2ISE_MASK 0x00010000
+#define SDR0_SDSTP2_P2ISE_DISABLE 0x00000000
+#define SDR0_SDSTP2_P2ISE_ENABLE 0x00010000
+#define SDR0_SDSTP2_P2ISE_ENCODE(n) ((((unsigned long)(n))&0x01)<<16)
+#define SDR0_SDSTP2_P2ISE_DECODE(n) ((((unsigned long)(n))>>16)&0x01)
+#define SDR0_SDSTP2_P2CWE_MASK 0x00008000
+#define SDR0_SDSTP2_P2CWE_DISABLE 0x00000000
+#define SDR0_SDSTP2_P2CWE_ENABLE 0x00008000
+#define SDR0_SDSTP2_P2CWE_ENCODE(n) ((((unsigned long)(n))&0x01)<<15)
+#define SDR0_SDSTP2_P2CWE_DECODE(n) ((((unsigned long)(n))>>15)&0x01)
+#define SDR0_SDSTP2_P2PIM_MASK 0x00007800
+#define SDR0_SDSTP2_P2PIM_ENCODE(n) ((((unsigned long)(n))&0x0F)<<11)
+#define SDR0_SDSTP2_P2PIM_DECODE(n) ((((unsigned long)(n))>>11)&0x0F)
+#define SDR0_SDSTP2_P2XFS_MASK 0x00000300
+#define SDR0_SDSTP2_P2XFS_100_133 0x00000000
+#define SDR0_SDSTP2_P2XFS_66_100 0x00000100
+#define SDR0_SDSTP2_P2XFS_50_66 0x00000200
+#define SDR0_SDSTP2_P2XFS_0_50 0x00000100
+#define SDR0_SDSTP2_P2XFS_ENCODE(n) ((((unsigned long)(n))&0x03)<<8)
+#define SDR0_SDSTP2_P2XFS_DECODE(n) ((((unsigned long)(n))>>8)&0x03)
+
+#define SDR0_SDSTP3 0x0023
+
+#define SDR0_PINSTP 0x0040
+#define SDR0_PINSTP_BOOTSTRAP_MASK 0xC0000000 /* Strap Bits */
+#define SDR0_PINSTP_BOOTSTRAP_SETTINGS0 0x00000000 /* Default strap settings 0 (EBC boot) */
+#define SDR0_PINSTP_BOOTSTRAP_SETTINGS1 0x40000000 /* Default strap settings 1 (PCI boot) */
+#define SDR0_PINSTP_BOOTSTRAP_IIC_54_EN 0x80000000 /* Serial Device Enabled - Addr = 0x54 */
+#define SDR0_PINSTP_BOOTSTRAP_IIC_50_EN 0xC0000000 /* Serial Device Enabled - Addr = 0x50 */
+#define SDR0_SDCS 0x0060
+#define SDR0_ECID0 0x0080
+#define SDR0_ECID1 0x0081
+#define SDR0_ECID2 0x0082
+#define SDR0_JTAG 0x00C0
+
+#define SDR0_DDR0 0x00E1
+#define SDR0_DDR0_DPLLRST 0x80000000
+#define SDR0_DDR0_DDRM_MASK 0x60000000
+#define SDR0_DDR0_DDRM_DDR1 0x20000000
+#define SDR0_DDR0_DDRM_DDR2 0x40000000
+#define SDR0_DDR0_DDRM_ENCODE(n) ((((unsigned long)(n))&0x03)<<29)
+#define SDR0_DDR0_DDRM_DECODE(n) ((((unsigned long)(n))>>29)&0x03)
+#define SDR0_DDR0_TUNE_ENCODE(n) ((((unsigned long)(n))&0x2FF)<<0)
+#define SDR0_DDR0_TUNE_DECODE(n) ((((unsigned long)(n))>>0)&0x2FF)
+
+#define SDR0_UART0 0x0120
+#define SDR0_UART1 0x0121
+#define SDR0_UART2 0x0122
+#define SDR0_UARTX_UXICS_MASK 0xF0000000
+#define SDR0_UARTX_UXICS_PLB 0x20000000
+#define SDR0_UARTX_UXEC_MASK 0x00800000
+#define SDR0_UARTX_UXEC_INT 0x00000000
+#define SDR0_UARTX_UXEC_EXT 0x00800000
+#define SDR0_UARTX_UXDIV_MASK 0x000000FF
+#define SDR0_UARTX_UXDIV_ENCODE(n) ((((unsigned long)(n))&0xFF)<<0)
+#define SDR0_UARTX_UXDIV_DECODE(n) ((((((unsigned long)(n))>>0)-1)&0xFF)+1)
+
+#define SDR0_CP440 0x0180
+#define SDR0_CP440_ERPN_MASK 0x30000000
+#define SDR0_CP440_ERPN_MASK_HI 0x3000
+#define SDR0_CP440_ERPN_MASK_LO 0x0000
+#define SDR0_CP440_ERPN_EBC 0x10000000
+#define SDR0_CP440_ERPN_EBC_HI 0x1000
+#define SDR0_CP440_ERPN_EBC_LO 0x0000
+#define SDR0_CP440_ERPN_PCI 0x20000000
+#define SDR0_CP440_ERPN_PCI_HI 0x2000
+#define SDR0_CP440_ERPN_PCI_LO 0x0000
+#define SDR0_CP440_ERPN_ENCODE(n) ((((unsigned long)(n))&0x03)<<28)
+#define SDR0_CP440_ERPN_DECODE(n) ((((unsigned long)(n))>>28)&0x03)
+#define SDR0_CP440_NTO1_MASK 0x00000002
+#define SDR0_CP440_NTO1_NTOP 0x00000000
+#define SDR0_CP440_NTO1_NTO1 0x00000002
+#define SDR0_CP440_NTO1_ENCODE(n) ((((unsigned long)(n))&0x01)<<1)
+#define SDR0_CP440_NTO1_DECODE(n) ((((unsigned long)(n))>>1)&0x01)
+
+#define SDR0_XCR0 0x01C0
+#define SDR0_XCR1 0x01C3
+#define SDR0_XCR2 0x01C6
+#define SDR0_XCRn_PAE_MASK 0x80000000
+#define SDR0_XCRn_PAE_DISABLE 0x00000000
+#define SDR0_XCRn_PAE_ENABLE 0x80000000
+#define SDR0_XCRn_PAE_ENCODE(n) ((((unsigned long)(n))&0x01)<<31)
+#define SDR0_XCRn_PAE_DECODE(n) ((((unsigned long)(n))>>31)&0x01)
+#define SDR0_XCRn_PHCE_MASK 0x40000000
+#define SDR0_XCRn_PHCE_DISABLE 0x00000000
+#define SDR0_XCRn_PHCE_ENABLE 0x40000000
+#define SDR0_XCRn_PHCE_ENCODE(n) ((((unsigned long)(n))&0x01)<<30)
+#define SDR0_XCRn_PHCE_DECODE(n) ((((unsigned long)(n))>>30)&0x01)
+#define SDR0_XCRn_PISE_MASK 0x20000000
+#define SDR0_XCRn_PISE_DISABLE 0x00000000
+#define SDR0_XCRn_PISE_ENABLE 0x20000000
+#define SDR0_XCRn_PISE_ENCODE(n) ((((unsigned long)(n))&0x01)<<29)
+#define SDR0_XCRn_PISE_DECODE(n) ((((unsigned long)(n))>>29)&0x01)
+#define SDR0_XCRn_PCWE_MASK 0x10000000
+#define SDR0_XCRn_PCWE_DISABLE 0x00000000
+#define SDR0_XCRn_PCWE_ENABLE 0x10000000
+#define SDR0_XCRn_PCWE_ENCODE(n) ((((unsigned long)(n))&0x01)<<28)
+#define SDR0_XCRn_PCWE_DECODE(n) ((((unsigned long)(n))>>28)&0x01)
+#define SDR0_XCRn_PPIM_MASK 0x0F000000
+#define SDR0_XCRn_PPIM_ENCODE(n) ((((unsigned long)(n))&0x0F)<<24)
+#define SDR0_XCRn_PPIM_DECODE(n) ((((unsigned long)(n))>>24)&0x0F)
+#define SDR0_XCRn_PR64E_MASK 0x00800000
+#define SDR0_XCRn_PR64E_DISABLE 0x00000000
+#define SDR0_XCRn_PR64E_ENABLE 0x00800000
+#define SDR0_XCRn_PR64E_ENCODE(n) ((((unsigned long)(n))&0x01)<<23)
+#define SDR0_XCRn_PR64E_DECODE(n) ((((unsigned long)(n))>>23)&0x01)
+#define SDR0_XCRn_PXFS_MASK 0x00600000
+#define SDR0_XCRn_PXFS_100_133 0x00000000
+#define SDR0_XCRn_PXFS_66_100 0x00200000
+#define SDR0_XCRn_PXFS_50_66 0x00400000
+#define SDR0_XCRn_PXFS_0_33 0x00600000
+#define SDR0_XCRn_PXFS_ENCODE(n) ((((unsigned long)(n))&0x03)<<21)
+#define SDR0_XCRn_PXFS_DECODE(n) ((((unsigned long)(n))>>21)&0x03)
+
+#define SDR0_XPLLC0 0x01C1
+#define SDR0_XPLLD0 0x01C2
+#define SDR0_XPLLC1 0x01C4
+#define SDR0_XPLLD1 0x01C5
+#define SDR0_XPLLC2 0x01C7
+#define SDR0_XPLLD2 0x01C8
+#define SDR0_SRST 0x0200
+#define SDR0_SLPIPE 0x0220
+
+#define SDR0_AMP0 0x0240
+#define SDR0_AMP0_PRIORITY 0xFFFF0000
+#define SDR0_AMP0_ALTERNATE_PRIORITY 0x0000FF00
+#define SDR0_AMP0_RESERVED_BITS_MASK 0x000000FF
+
+#define SDR0_AMP1 0x0241
+#define SDR0_AMP1_PRIORITY 0xFC000000
+#define SDR0_AMP1_ALTERNATE_PRIORITY 0x0000E000
+#define SDR0_AMP1_RESERVED_BITS_MASK 0x03FF1FFF
+
+#define SDR0_MIRQ0 0x0260
+#define SDR0_MIRQ1 0x0261
+#define SDR0_MALTBL 0x0280
+#define SDR0_MALRBL 0x02A0
+#define SDR0_MALTBS 0x02C0
+#define SDR0_MALRBS 0x02E0
+
+/* Reserved for Customer Use */
+#define SDR0_CUST0 0x4000
+#define SDR0_CUST0_AUTONEG_MASK 0x8000000
+#define SDR0_CUST0_NO_AUTONEG 0x0000000
+#define SDR0_CUST0_AUTONEG 0x8000000
+#define SDR0_CUST0_ETH_FORCE_MASK 0x6000000
+#define SDR0_CUST0_ETH_FORCE_10MHZ 0x0000000
+#define SDR0_CUST0_ETH_FORCE_100MHZ 0x2000000
+#define SDR0_CUST0_ETH_FORCE_1000MHZ 0x4000000
+#define SDR0_CUST0_ETH_DUPLEX_MASK 0x1000000
+#define SDR0_CUST0_ETH_HALF_DUPLEX 0x0000000
+#define SDR0_CUST0_ETH_FULL_DUPLEX 0x1000000
+
+#define SDR0_SDSTP4 0x4001
+#define SDR0_CUST1 0x4002
+#define SDR0_SDSTP5 0x4003
+#define SDR0_CUST2 0x4004
+#define SDR0_SDSTP6 0x4005
+#define SDR0_CUST3 0x4006
+#define SDR0_SDSTP7 0x4007
+
+#define SDR0_PFC0 0x4100
+#define SDR0_PFC0_GPIO_0 0x80000000
+#define SDR0_PFC0_PCIX0REQ2_N 0x00000000
+#define SDR0_PFC0_GPIO_1 0x40000000
+#define SDR0_PFC0_PCIX0REQ3_N 0x00000000
+#define SDR0_PFC0_GPIO_2 0x20000000
+#define SDR0_PFC0_PCIX0GNT2_N 0x00000000
+#define SDR0_PFC0_GPIO_3 0x10000000
+#define SDR0_PFC0_PCIX0GNT3_N 0x00000000
+#define SDR0_PFC0_GPIO_4 0x08000000
+#define SDR0_PFC0_PCIX1REQ2_N 0x00000000
+#define SDR0_PFC0_GPIO_5 0x04000000
+#define SDR0_PFC0_PCIX1REQ3_N 0x00000000
+#define SDR0_PFC0_GPIO_6 0x02000000
+#define SDR0_PFC0_PCIX1GNT2_N 0x00000000
+#define SDR0_PFC0_GPIO_7 0x01000000
+#define SDR0_PFC0_PCIX1GNT3_N 0x00000000
+#define SDR0_PFC0_GPIO_8 0x00800000
+#define SDR0_PFC0_PERREADY 0x00000000
+#define SDR0_PFC0_GPIO_9 0x00400000
+#define SDR0_PFC0_PERCS1_N 0x00000000
+#define SDR0_PFC0_GPIO_10 0x00200000
+#define SDR0_PFC0_PERCS2_N 0x00000000
+#define SDR0_PFC0_GPIO_11 0x00100000
+#define SDR0_PFC0_IRQ0 0x00000000
+#define SDR0_PFC0_GPIO_12 0x00080000
+#define SDR0_PFC0_IRQ1 0x00000000
+#define SDR0_PFC0_GPIO_13 0x00040000
+#define SDR0_PFC0_IRQ2 0x00000000
+#define SDR0_PFC0_GPIO_14 0x00020000
+#define SDR0_PFC0_IRQ3 0x00000000
+#define SDR0_PFC0_GPIO_15 0x00010000
+#define SDR0_PFC0_IRQ4 0x00000000
+#define SDR0_PFC0_GPIO_16 0x00008000
+#define SDR0_PFC0_IRQ5 0x00000000
+#define SDR0_PFC0_GPIO_17 0x00004000
+#define SDR0_PFC0_PERBE0_N 0x00000000
+#define SDR0_PFC0_GPIO_18 0x00002000
+#define SDR0_PFC0_PCI0GNT0_N 0x00000000
+#define SDR0_PFC0_GPIO_19 0x00001000
+#define SDR0_PFC0_PCI0GNT1_N 0x00000000
+#define SDR0_PFC0_GPIO_20 0x00000800
+#define SDR0_PFC0_PCI0REQ0_N 0x00000000
+#define SDR0_PFC0_GPIO_21 0x00000400
+#define SDR0_PFC0_PCI0REQ1_N 0x00000000
+#define SDR0_PFC0_GPIO_22 0x00000200
+#define SDR0_PFC0_PCI1GNT0_N 0x00000000
+#define SDR0_PFC0_GPIO_23 0x00000100
+#define SDR0_PFC0_PCI1GNT1_N 0x00000000
+#define SDR0_PFC0_GPIO_24 0x00000080
+#define SDR0_PFC0_PCI1REQ0_N 0x00000000
+#define SDR0_PFC0_GPIO_25 0x00000040
+#define SDR0_PFC0_PCI1REQ1_N 0x00000000
+#define SDR0_PFC0_GPIO_26 0x00000020
+#define SDR0_PFC0_PCI2GNT0_N 0x00000000
+#define SDR0_PFC0_GPIO_27 0x00000010
+#define SDR0_PFC0_PCI2GNT1_N 0x00000000
+#define SDR0_PFC0_GPIO_28 0x00000008
+#define SDR0_PFC0_PCI2REQ0_N 0x00000000
+#define SDR0_PFC0_GPIO_29 0x00000004
+#define SDR0_PFC0_PCI2REQ1_N 0x00000000
+#define SDR0_PFC0_GPIO_30 0x00000002
+#define SDR0_PFC0_UART1RX 0x00000000
+#define SDR0_PFC0_GPIO_31 0x00000001
+#define SDR0_PFC0_UART1TX 0x00000000
+
+#define SDR0_PFC1 0x4101
+#define SDR0_PFC1_UART1_CTS_RTS_MASK 0x02000000
+#define SDR0_PFC1_UART1_DSR_DTR 0x00000000
+#define SDR0_PFC1_UART1_CTS_RTS 0x02000000
+#define SDR0_PFC1_UART2_IN_SERVICE_MASK 0x01000000
+#define SDR0_PFC1_UART2_NOT_IN_SERVICE 0x00000000
+#define SDR0_PFC1_UART2_IN_SERVICE 0x01000000
+#define SDR0_PFC1_ETH_GIGA_MASK 0x00200000
+#define SDR0_PFC1_ETH_10_100 0x00000000
+#define SDR0_PFC1_ETH_GIGA 0x00200000
+#define SDR0_PFC1_ETH_GIGA_ENCODE(n) ((((unsigned long)(n))&0x1)<<21)
+#define SDR0_PFC1_ETH_GIGA_DECODE(n) ((((unsigned long)(n))>>21)&0x01)
+#define SDR0_PFC1_CPU_TRACE_MASK 0x00180000 /* $218C */
+#define SDR0_PFC1_CPU_NO_TRACE 0x00000000
+#define SDR0_PFC1_CPU_TRACE 0x00080000
+#define SDR0_PFC1_CPU_TRACE_ENCODE(n) ((((unsigned long)(n))&0x3)<<19) /* $218C */
+#define SDR0_PFC1_CPU_TRACE_DECODE(n) ((((unsigned long)(n))>>19)&0x03) /* $218C */
+
+#define SDR0_MFR 0x4300
+#endif /* CONFIG_440SPE */
+
+
#define SDR0_SDCS_SDD (0x80000000 >> 31)
#if defined(CONFIG_440GP)
@@ -1159,7 +2430,7 @@
/*-----------------------------------------------------------------------------+
| Clocking
+-----------------------------------------------------------------------------*/
-#if !defined (CONFIG_440GX) && !defined(CONFIG_440EP) && !defined(CONFIG_440GR) && !defined(CONFIG_440SP)
+#if !defined (CONFIG_440GX) && !defined(CONFIG_440EP) && !defined(CONFIG_440GR) && !defined(CONFIG_440SP) && !defined(CONFIG_440SPE)
#define PLLSYS0_TUNE_MASK 0xffc00000 /* PLL TUNE bits */
#define PLLSYS0_FB_DIV_MASK 0x003c0000 /* Feedback divisor */
#define PLLSYS0_FWD_DIV_A_MASK 0x00038000 /* Forward divisor A */
@@ -1357,56 +2628,106 @@
/******************************************************************************
* GPIO macro register defines
******************************************************************************/
+#define GPIO0 0
+#define GPIO1 1
+
#if defined(CONFIG_440GP)
-#define GPIO_BASE0 (CFG_PERIPHERAL_BASE+0x00000700)
+#define GPIO0_BASE (CFG_PERIPHERAL_BASE+0x00000700)
-#define GPIO0_OR (GPIO_BASE0+0x0)
-#define GPIO0_TCR (GPIO_BASE0+0x4)
-#define GPIO0_ODR (GPIO_BASE0+0x18)
-#define GPIO0_IR (GPIO_BASE0+0x1C)
+#define GPIO0_OR (GPIO0_BASE+0x0)
+#define GPIO0_TCR (GPIO0_BASE+0x4)
+#define GPIO0_ODR (GPIO0_BASE+0x18)
+#define GPIO0_IR (GPIO0_BASE+0x1C)
#endif /* CONFIG_440GP */
#if defined(CONFIG_440EP) || defined(CONFIG_440GR)
-#define GPIO_BASE0 (CFG_PERIPHERAL_BASE+0x00000B00)
-#define GPIO_BASE1 (CFG_PERIPHERAL_BASE+0x00000C00)
-
-#define GPIO0_OR (GPIO_BASE0+0x0)
-#define GPIO0_TCR (GPIO_BASE0+0x4)
-#define GPIO0_OSRL (GPIO_BASE0+0x8)
-#define GPIO0_OSRH (GPIO_BASE0+0xC)
-#define GPIO0_TSRL (GPIO_BASE0+0x10)
-#define GPIO0_TSRH (GPIO_BASE0+0x14)
-#define GPIO0_ODR (GPIO_BASE0+0x18)
-#define GPIO0_IR (GPIO_BASE0+0x1C)
-#define GPIO0_RR1 (GPIO_BASE0+0x20)
-#define GPIO0_RR2 (GPIO_BASE0+0x24)
-#define GPIO0_RR3 (GPIO_BASE0+0x28)
-#define GPIO0_ISR1L (GPIO_BASE0+0x30)
-#define GPIO0_ISR1H (GPIO_BASE0+0x34)
-#define GPIO0_ISR2L (GPIO_BASE0+0x38)
-#define GPIO0_ISR2H (GPIO_BASE0+0x3C)
-#define GPIO0_ISR3L (GPIO_BASE0+0x40)
-#define GPIO0_ISR3H (GPIO_BASE0+0x44)
-
-#define GPIO1_OR (GPIO_BASE1+0x0)
-#define GPIO1_TCR (GPIO_BASE1+0x4)
-#define GPIO1_OSRL (GPIO_BASE1+0x8)
-#define GPIO1_OSRH (GPIO_BASE1+0xC)
-#define GPIO1_TSRL (GPIO_BASE1+0x10)
-#define GPIO1_TSRH (GPIO_BASE1+0x14)
-#define GPIO1_ODR (GPIO_BASE1+0x18)
-#define GPIO1_IR (GPIO_BASE1+0x1C)
-#define GPIO1_RR1 (GPIO_BASE1+0x20)
-#define GPIO1_RR2 (GPIO_BASE1+0x24)
-#define GPIO1_RR3 (GPIO_BASE1+0x28)
-#define GPIO1_ISR1L (GPIO_BASE1+0x30)
-#define GPIO1_ISR1H (GPIO_BASE1+0x34)
-#define GPIO1_ISR2L (GPIO_BASE1+0x38)
-#define GPIO1_ISR2H (GPIO_BASE1+0x3C)
-#define GPIO1_ISR3L (GPIO_BASE1+0x40)
-#define GPIO1_ISR3H (GPIO_BASE1+0x44)
+#define GPIO0_BASE (CFG_PERIPHERAL_BASE+0x00000B00)
+#define GPIO1_BASE (CFG_PERIPHERAL_BASE+0x00000C00)
+
+/* Offsets */
+#define GPIOx_OR 0x00 /* GPIO Output Register */
+#define GPIOx_TCR 0x04 /* GPIO Three-State Control Register */
+#define GPIOx_OSL 0x08 /* GPIO Output Select Register (Bits 0-31) */
+#define GPIOx_OSH 0x0C /* GPIO Ouput Select Register (Bits 32-63) */
+#define GPIOx_TSL 0x10 /* GPIO Three-State Select Register (Bits 0-31) */
+#define GPIOx_TSH 0x14 /* GPIO Three-State Select Register (Bits 32-63) */
+#define GPIOx_ODR 0x18 /* GPIO Open drain Register */
+#define GPIOx_IR 0x1C /* GPIO Input Register */
+#define GPIOx_RR1 0x20 /* GPIO Receive Register 1 */
+#define GPIOx_RR2 0x24 /* GPIO Receive Register 2 */
+#define GPIOx_RR3 0x28 /* GPIO Receive Register 3 */
+#define GPIOx_IS1L 0x30 /* GPIO Input Select Register 1 (Bits 0-31) */
+#define GPIOx_IS1H 0x34 /* GPIO Input Select Register 1 (Bits 32-63) */
+#define GPIOx_IS2L 0x38 /* GPIO Input Select Register 2 (Bits 0-31) */
+#define GPIOx_IS2H 0x3C /* GPIO Input Select Register 2 (Bits 32-63) */
+#define GPIOx_IS3L 0x40 /* GPIO Input Select Register 3 (Bits 0-31) */
+#define GPIOx_IS3H 0x44 /* GPIO Input Select Register 3 (Bits 32-63) */
+
+#define GPIO_OS(x) (x+GPIOx_OSL) /* GPIO Output Register High or Low */
+#define GPIO_TS(x) (x+GPIOx_TSL) /* GPIO Three-state Control Reg High or Low */
+#define GPIO_IS1(x) (x+GPIOx_IS1L) /* GPIO Input register1 High or Low */
+#define GPIO_IS2(x) (x+GPIOx_IS2L) /* GPIO Input register2 High or Low */
+#define GPIO_IS3(x) (x+GPIOx_IS3L) /* GPIO Input register3 High or Low */
+
+#define GPIO0_OR (GPIO0_BASE+0x0)
+#define GPIO0_TCR (GPIO0_BASE+0x4)
+#define GPIO0_OSRL (GPIO0_BASE+0x8)
+#define GPIO0_OSRH (GPIO0_BASE+0xC)
+#define GPIO0_TSRL (GPIO0_BASE+0x10)
+#define GPIO0_TSRH (GPIO0_BASE+0x14)
+#define GPIO0_ODR (GPIO0_BASE+0x18)
+#define GPIO0_IR (GPIO0_BASE+0x1C)
+#define GPIO0_RR1 (GPIO0_BASE+0x20)
+#define GPIO0_RR2 (GPIO0_BASE+0x24)
+#define GPIO0_RR3 (GPIO0_BASE+0x28)
+#define GPIO0_ISR1L (GPIO0_BASE+0x30)
+#define GPIO0_ISR1H (GPIO0_BASE+0x34)
+#define GPIO0_ISR2L (GPIO0_BASE+0x38)
+#define GPIO0_ISR2H (GPIO0_BASE+0x3C)
+#define GPIO0_ISR3L (GPIO0_BASE+0x40)
+#define GPIO0_ISR3H (GPIO0_BASE+0x44)
+
+#define GPIO1_OR (GPIO1_BASE+0x0)
+#define GPIO1_TCR (GPIO1_BASE+0x4)
+#define GPIO1_OSRL (GPIO1_BASE+0x8)
+#define GPIO1_OSRH (GPIO1_BASE+0xC)
+#define GPIO1_TSRL (GPIO1_BASE+0x10)
+#define GPIO1_TSRH (GPIO1_BASE+0x14)
+#define GPIO1_ODR (GPIO1_BASE+0x18)
+#define GPIO1_IR (GPIO1_BASE+0x1C)
+#define GPIO1_RR1 (GPIO1_BASE+0x20)
+#define GPIO1_RR2 (GPIO1_BASE+0x24)
+#define GPIO1_RR3 (GPIO1_BASE+0x28)
+#define GPIO1_ISR1L (GPIO1_BASE+0x30)
+#define GPIO1_ISR1H (GPIO1_BASE+0x34)
+#define GPIO1_ISR2L (GPIO1_BASE+0x38)
+#define GPIO1_ISR2H (GPIO1_BASE+0x3C)
+#define GPIO1_ISR3L (GPIO1_BASE+0x40)
+#define GPIO1_ISR3H (GPIO1_BASE+0x44)
#endif
+#define GPIO_GROUP_MAX 2
+#define GPIO_MAX 32
+#define GPIO_ALT1_SEL 0x40000000 /* GPIO_OUT value put in GPIO_TSx for the GPIO nb 0 */
+#define GPIO_ALT2_SEL 0x80000000 /* GPIO_OUT value put in GPIO_TSx for the GPIO nb 1 */
+#define GPIO_ALT3_SEL 0xC0000000 /* GPIO_OUT value put in GPIO_TSx for the GPIO nb 2 */
+#define GPIO_MASK 0xC0000000 /* GPIO_MASK */
+#define GPIO_IN_SEL 0x40000000 /* GPIO_IN value put in GPIO_ISx for the GPIO nb 0 */
+ /* For the other GPIO number, you must shift */
+
+#ifndef __ASSEMBLY__
+
+typedef enum gpio_select { GPIO_SEL, GPIO_ALT1, GPIO_ALT2, GPIO_ALT3 } gpio_select_t;
+typedef enum gpio_driver { GPIO_DIS, GPIO_IN, GPIO_OUT, GPIO_BI } gpio_driver_t;
+
+typedef struct { unsigned long add; /* gpio core base address */
+ gpio_driver_t in_out; /* Driver Setting */
+ gpio_select_t alt_nb; /* Selected Alternate */
+} gpio_param_s;
+
+
+#endif /* __ASSEMBLY__ */
+
/*
* Macros for accessing the indirect EBC registers
*/
@@ -1448,6 +2769,9 @@ typedef struct {
unsigned long freqOPB;
unsigned long freqEPB;
unsigned long freqPCI;
+#ifdef CONFIG_440SPE
+ unsigned long freqDDR;
+#endif
unsigned long pciIntArbEn; /* Internal PCI arbiter is enabled */
unsigned long pciClkSync; /* PCI clock is synchronous */
} PPC440_SYS_INFO;
diff --git a/include/ppc4xx_enet.h b/include/ppc4xx_enet.h
index d6d33b6957..ec2e3629bb 100644
--- a/include/ppc4xx_enet.h
+++ b/include/ppc4xx_enet.h
@@ -133,12 +133,21 @@ typedef struct emac_4xx_hw_st {
#define EMAC_NUM_DEV 4
#elif (defined(CONFIG_440) || defined(CONFIG_405EP)) && \
defined(CONFIG_NET_MULTI) && \
- !defined(CONFIG_440SP)
+ !defined(CONFIG_440SP) && !defined(CONFIG_440SPE)
#define EMAC_NUM_DEV 2
#else
#define EMAC_NUM_DEV 1
#endif
+#ifdef CONFIG_IBM_EMAC4_V4 /* EMAC4 V4 changed bit setting */
+#define EMAC_STACR_OC_MASK (0x00008000)
+#else
+#define EMAC_STACR_OC_MASK (0x00000000)
+#endif
+
+#if defined(CONFIG_440SP) || defined(CONFIG_440SPE)
+#define SDR0_PFC1_EM_1000 (0x00200000)
+#endif
/*ZMII Bridge Register addresses */
#if defined(CONFIG_440EP) || defined(CONFIG_440GR)
@@ -323,7 +332,7 @@ typedef struct emac_4xx_hw_st {
#define EMAC_M0_WKE (0x04000000)
/* on 440GX EMAC_MR1 has a different layout! */
-#if defined(CONFIG_440GX) || defined(CONFIG_440SP)
+#if defined(CONFIG_440GX) || defined(CONFIG_440SP) || defined(CONFIG_440SPE)
/* MODE Reg 1 */
#define EMAC_M1_FDE (0x80000000)
#define EMAC_M1_ILE (0x40000000)
@@ -424,8 +433,21 @@ typedef struct emac_4xx_hw_st {
/* STA CONTROL REG */
#define EMAC_STACR_OC (0x00008000)
#define EMAC_STACR_PHYE (0x00004000)
+
+#ifdef CONFIG_IBM_EMAC4_V4 /* EMAC4 V4 changed bit setting */
+#define EMAC_STACR_INDIRECT_MODE (0x00002000)
+#define EMAC_STACR_WRITE (0x00000800) /* $BUC */
+#define EMAC_STACR_READ (0x00001000) /* $BUC */
+#define EMAC_STACR_OP_MASK (0x00001800)
+#define EMAC_STACR_MDIO_ADDR (0x00000000)
+#define EMAC_STACR_MDIO_WRITE (0x00000800)
+#define EMAC_STACR_MDIO_READ (0x00001800)
+#define EMAC_STACR_MDIO_READ_INC (0x00001000)
+#else
#define EMAC_STACR_WRITE (0x00002000)
#define EMAC_STACR_READ (0x00001000)
+#endif
+
#define EMAC_STACR_CLK_83MHZ (0x00000800) /* 0's for 50Mhz */
#define EMAC_STACR_CLK_66MHZ (0x00000400)
#define EMAC_STACR_CLK_100MHZ (0x00000C00)
diff --git a/include/s3c2400.h b/include/s3c2400.h
index bc1f1e94bf..4fdc62ec11 100644
--- a/include/s3c2400.h
+++ b/include/s3c2400.h
@@ -63,71 +63,71 @@ typedef enum {
#include <s3c24x0.h>
-static inline S3C24X0_MEMCTL * const S3C24X0_GetBase_MEMCTL(void)
+static inline S3C24X0_MEMCTL * S3C24X0_GetBase_MEMCTL(void)
{
return (S3C24X0_MEMCTL * const)S3C24X0_MEMCTL_BASE;
}
-static inline S3C24X0_USB_HOST * const S3C24X0_GetBase_USB_HOST(void)
+static inline S3C24X0_USB_HOST * S3C24X0_GetBase_USB_HOST(void)
{
return (S3C24X0_USB_HOST * const)S3C24X0_USB_HOST_BASE;
}
-static inline S3C24X0_INTERRUPT * const S3C24X0_GetBase_INTERRUPT(void)
+static inline S3C24X0_INTERRUPT * S3C24X0_GetBase_INTERRUPT(void)
{
return (S3C24X0_INTERRUPT * const)S3C24X0_INTERRUPT_BASE;
}
-static inline S3C24X0_DMAS * const S3C24X0_GetBase_DMAS(void)
+static inline S3C24X0_DMAS * S3C24X0_GetBase_DMAS(void)
{
return (S3C24X0_DMAS * const)S3C24X0_DMA_BASE;
}
-static inline S3C24X0_CLOCK_POWER * const S3C24X0_GetBase_CLOCK_POWER(void)
+static inline S3C24X0_CLOCK_POWER * S3C24X0_GetBase_CLOCK_POWER(void)
{
return (S3C24X0_CLOCK_POWER * const)S3C24X0_CLOCK_POWER_BASE;
}
-static inline S3C24X0_LCD * const S3C24X0_GetBase_LCD(void)
+static inline S3C24X0_LCD * S3C24X0_GetBase_LCD(void)
{
return (S3C24X0_LCD * const)S3C24X0_LCD_BASE;
}
-static inline S3C24X0_UART * const S3C24X0_GetBase_UART(S3C24X0_UARTS_NR nr)
+static inline S3C24X0_UART * S3C24X0_GetBase_UART(S3C24X0_UARTS_NR nr)
{
return (S3C24X0_UART * const)(S3C24X0_UART_BASE + (nr * 0x4000));
}
-static inline S3C24X0_TIMERS * const S3C24X0_GetBase_TIMERS(void)
+static inline S3C24X0_TIMERS * S3C24X0_GetBase_TIMERS(void)
{
return (S3C24X0_TIMERS * const)S3C24X0_TIMER_BASE;
}
-static inline S3C24X0_USB_DEVICE * const S3C24X0_GetBase_USB_DEVICE(void)
+static inline S3C24X0_USB_DEVICE * S3C24X0_GetBase_USB_DEVICE(void)
{
return (S3C24X0_USB_DEVICE * const)S3C24X0_USB_DEVICE_BASE;
}
-static inline S3C24X0_WATCHDOG * const S3C24X0_GetBase_WATCHDOG(void)
+static inline S3C24X0_WATCHDOG * S3C24X0_GetBase_WATCHDOG(void)
{
return (S3C24X0_WATCHDOG * const)S3C24X0_WATCHDOG_BASE;
}
-static inline S3C24X0_I2C * const S3C24X0_GetBase_I2C(void)
+static inline S3C24X0_I2C * S3C24X0_GetBase_I2C(void)
{
return (S3C24X0_I2C * const)S3C24X0_I2C_BASE;
}
-static inline S3C24X0_I2S * const S3C24X0_GetBase_I2S(void)
+static inline S3C24X0_I2S * S3C24X0_GetBase_I2S(void)
{
return (S3C24X0_I2S * const)S3C24X0_I2S_BASE;
}
-static inline S3C24X0_GPIO * const S3C24X0_GetBase_GPIO(void)
+static inline S3C24X0_GPIO * S3C24X0_GetBase_GPIO(void)
{
return (S3C24X0_GPIO * const)S3C24X0_GPIO_BASE;
}
-static inline S3C24X0_RTC * const S3C24X0_GetBase_RTC(void)
+static inline S3C24X0_RTC * S3C24X0_GetBase_RTC(void)
{
return (S3C24X0_RTC * const)S3C24X0_RTC_BASE;
}
-static inline S3C2400_ADC * const S3C2400_GetBase_ADC(void)
+static inline S3C2400_ADC * S3C2400_GetBase_ADC(void)
{
return (S3C2400_ADC * const)S3C24X0_ADC_BASE;
}
-static inline S3C24X0_SPI * const S3C24X0_GetBase_SPI(void)
+static inline S3C24X0_SPI * S3C24X0_GetBase_SPI(void)
{
return (S3C24X0_SPI * const)S3C24X0_SPI_BASE;
}
-static inline S3C2400_MMC * const S3C2400_GetBase_MMC(void)
+static inline S3C2400_MMC * S3C2400_GetBase_MMC(void)
{
return (S3C2400_MMC * const)S3C2400_MMC_BASE;
}
diff --git a/include/serial.h b/include/serial.h
index c8abb72e1f..8c7b1c26c1 100644
--- a/include/serial.h
+++ b/include/serial.h
@@ -23,7 +23,7 @@ extern struct serial_device serial_scc_device;
extern struct serial_device * default_serial_console (void);
#if defined(CONFIG_405GP) || defined(CONFIG_405CR) || defined(CONFIG_440) \
- || defined(CONFIG_405EP)
+ || defined(CONFIG_405EP) || defined(CONFIG_MPC5xxx)
extern struct serial_device serial0_device;
extern struct serial_device serial1_device;
#endif
diff --git a/include/spd_sdram.h b/include/spd_sdram.h
index 4e754ec9e3..a2be96c1aa 100644
--- a/include/spd_sdram.h
+++ b/include/spd_sdram.h
@@ -1,6 +1,6 @@
#ifndef _SPD_SDRAM_H_
#define _SPD_SDRAM_H_
-long int spd_sdram(int(read_spd)(uint addr));
+long int spd_sdram(void);
#endif
diff --git a/include/usb.h b/include/usb.h
index 39d7f23cc7..bf71554041 100644
--- a/include/usb.h
+++ b/include/usb.h
@@ -108,6 +108,7 @@ struct usb_interface_descriptor {
unsigned char iInterface;
unsigned char no_of_ep;
+ unsigned char num_altsetting;
unsigned char act_altsetting;
struct usb_endpoint_descriptor ep_desc[USB_MAXENDPOINTS];
} __attribute__ ((packed));
diff --git a/include/version.h b/include/version.h
index 4f8b498cf3..b56d2e9900 100644
--- a/include/version.h
+++ b/include/version.h
@@ -1,5 +1,5 @@
/*
- * (C) Copyright 2000-2003
+ * (C) Copyright 2000-2006
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
@@ -24,6 +24,6 @@
#ifndef __VERSION_H__
#define __VERSION_H__
-#define U_BOOT_VERSION "U-Boot 1.1.4"
+#include "version_autogenerated.h"
#endif /* __VERSION_H__ */
diff --git a/include/xyzModem.h b/include/xyzModem.h
new file mode 100644
index 0000000000..f437bbd0bd
--- /dev/null
+++ b/include/xyzModem.h
@@ -0,0 +1,117 @@
+/*
+ *==========================================================================
+ *
+ * xyzModem.h
+ *
+ * RedBoot stream handler for xyzModem protocol
+ *
+ *==========================================================================
+ *####ECOSGPLCOPYRIGHTBEGIN####
+ * -------------------------------------------
+ * This file is part of eCos, the Embedded Configurable Operating System.
+ * Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
+ * Copyright (C) 2002 Gary Thomas
+ *
+ * eCos is free software; you can redistribute it and/or modify it under
+ * the terms of the GNU General Public License as published by the Free
+ * Software Foundation; either version 2 or (at your option) any later version.
+ *
+ * eCos is distributed in the hope that it will be useful, but WITHOUT ANY
+ * WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with eCos; if not, write to the Free Software Foundation, Inc.,
+ * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+ *
+ * As a special exception, if other files instantiate templates or use macros
+ * or inline functions from this file, or you compile this file and link it
+ * with other works to produce a work based on this file, this file does not
+ * by itself cause the resulting work to be covered by the GNU General Public
+ * License. However the source code for this file must still be made available
+ * in accordance with section (3) of the GNU General Public License.
+ *
+ * This exception does not invalidate any other reasons why a work based on
+ * this file might be covered by the GNU General Public License.
+ *
+ * Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
+ * at http: *sources.redhat.com/ecos/ecos-license/
+ * -------------------------------------------
+ *####ECOSGPLCOPYRIGHTEND####
+ *==========================================================================
+ *#####DESCRIPTIONBEGIN####
+ *
+ * Author(s): gthomas
+ * Contributors: gthomas
+ * Date: 2000-07-14
+ * Purpose:
+ * Description:
+ *
+ * This code is part of RedBoot (tm).
+ *
+ *####DESCRIPTIONEND####
+ *
+ *==========================================================================
+ */
+
+#ifndef _XYZMODEM_H_
+#define _XYZMODEM_H_
+
+#define xyzModem_xmodem 1
+#define xyzModem_ymodem 2
+/* Don't define this until the protocol support is in place */
+/*#define xyzModem_zmodem 3 */
+
+#define xyzModem_access -1
+#define xyzModem_noZmodem -2
+#define xyzModem_timeout -3
+#define xyzModem_eof -4
+#define xyzModem_cancel -5
+#define xyzModem_frame -6
+#define xyzModem_cksum -7
+#define xyzModem_sequence -8
+
+#define xyzModem_close 1
+#define xyzModem_abort 2
+
+
+#ifdef REDBOOT
+extern getc_io_funcs_t xyzModem_io;
+#else
+#define CYGNUM_CALL_IF_SET_COMM_ID_QUERY_CURRENT
+#define CYGACC_CALL_IF_SET_CONSOLE_COMM(x)
+
+#define diag_vprintf vprintf
+#define diag_printf printf
+#define diag_vsprintf vsprintf
+
+#define CYGACC_CALL_IF_DELAY_US(x) udelay(x)
+
+typedef struct {
+ char *filename;
+ int mode;
+ int chan;
+#ifdef CYGPKG_REDBOOT_NETWORKING
+ struct sockaddr_in *server;
+#endif
+} connection_info_t;
+
+#ifndef BOOL_WAS_DEFINED
+#define BOOL_WAS_DEFINED
+typedef unsigned int bool;
+#endif
+
+#define false 0
+#define true 1
+
+#endif
+
+
+int xyzModem_stream_open(connection_info_t *info, int *err);
+void xyzModem_stream_close(int *err);
+void xyzModem_stream_terminate(bool method, int (*getc)(void));
+int xyzModem_stream_read(char *buf, int size, int *err);
+char *xyzModem_error(int err);
+
+#endif /* _XYZMODEM_H_ */
diff --git a/lib_arm/Makefile b/lib_arm/Makefile
index de5e5dd9ab..e56e06b1b3 100644
--- a/lib_arm/Makefile
+++ b/lib_arm/Makefile
@@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk
LIB = lib$(ARCH).a
-AOBJS = _udivsi3.o _umodsi3.o
+AOBJS = _ashldi3.o _ashrdi3.o _divsi3.o _modsi3.o _udivsi3.o _umodsi3.o
COBJS = armlinux.o board.o \
cache.o div0.o
diff --git a/lib_arm/_ashldi3.S b/lib_arm/_ashldi3.S
new file mode 100644
index 0000000000..de4403d632
--- /dev/null
+++ b/lib_arm/_ashldi3.S
@@ -0,0 +1,46 @@
+/* Copyright 1995, 1996, 1998, 1999, 2000, 2003, 2004, 2005
+ Free Software Foundation, Inc.
+
+This file is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 2, or (at your option) any
+later version.
+
+In addition to the permissions in the GNU General Public License, the
+Free Software Foundation gives you unlimited permission to link the
+compiled version of this file into combinations with other programs,
+and to distribute those combinations without any restriction coming
+from the use of this file. (The General Public License restrictions
+do apply in other respects; for example, they cover modification of
+the file, and distribution when not linked into a combine
+executable.)
+
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; see the file COPYING. If not, write to
+the Free Software Foundation, 51 Franklin Street, Fifth Floor,
+Boston, MA 02110-1301, USA. */
+
+
+#ifdef __ARMEB__
+#define al r1
+#define ah r0
+#else
+#define al r0
+#define ah r1
+#endif
+
+.globl __ashldi3
+__ashldi3:
+
+ subs r3, r2, #32
+ rsb ip, r2, #32
+ movmi ah, ah, lsl r2
+ movpl ah, al, lsl r3
+ orrmi ah, ah, al, lsr ip
+ mov al, al, lsl r2
+ mov pc, lr
diff --git a/lib_arm/_ashrdi3.S b/lib_arm/_ashrdi3.S
new file mode 100644
index 0000000000..5edbcb3ae7
--- /dev/null
+++ b/lib_arm/_ashrdi3.S
@@ -0,0 +1,46 @@
+/* Copyright 1995, 1996, 1998, 1999, 2000, 2003, 2004, 2005
+ Free Software Foundation, Inc.
+
+This file is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 2, or (at your option) any
+later version.
+
+In addition to the permissions in the GNU General Public License, the
+Free Software Foundation gives you unlimited permission to link the
+compiled version of this file into combinations with other programs,
+and to distribute those combinations without any restriction coming
+from the use of this file. (The General Public License restrictions
+do apply in other respects; for example, they cover modification of
+the file, and distribution when not linked into a combine
+executable.)
+
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; see the file COPYING. If not, write to
+the Free Software Foundation, 51 Franklin Street, Fifth Floor,
+Boston, MA 02110-1301, USA. */
+
+
+#ifdef __ARMEB__
+#define al r1
+#define ah r0
+#else
+#define al r0
+#define ah r1
+#endif
+
+.globl __ashrdi3
+__ashrdi3:
+
+ subs r3, r2, #32
+ rsb ip, r2, #32
+ movmi al, al, lsr r2
+ movpl al, ah, asr r3
+ orrmi al, al, ah, lsl ip
+ mov ah, ah, asr r2
+ mov pc, lr
diff --git a/lib_arm/_divsi3.S b/lib_arm/_divsi3.S
new file mode 100644
index 0000000000..9dc15f6d6b
--- /dev/null
+++ b/lib_arm/_divsi3.S
@@ -0,0 +1,140 @@
+
+.macro ARM_DIV_BODY dividend, divisor, result, curbit
+
+#if __LINUX_ARM_ARCH__ >= 5
+
+ clz \curbit, \divisor
+ clz \result, \dividend
+ sub \result, \curbit, \result
+ mov \curbit, #1
+ mov \divisor, \divisor, lsl \result
+ mov \curbit, \curbit, lsl \result
+ mov \result, #0
+
+#else
+
+ @ Initially shift the divisor left 3 bits if possible,
+ @ set curbit accordingly. This allows for curbit to be located
+ @ at the left end of each 4 bit nibbles in the division loop
+ @ to save one loop in most cases.
+ tst \divisor, #0xe0000000
+ moveq \divisor, \divisor, lsl #3
+ moveq \curbit, #8
+ movne \curbit, #1
+
+ @ Unless the divisor is very big, shift it up in multiples of
+ @ four bits, since this is the amount of unwinding in the main
+ @ division loop. Continue shifting until the divisor is
+ @ larger than the dividend.
+1: cmp \divisor, #0x10000000
+ cmplo \divisor, \dividend
+ movlo \divisor, \divisor, lsl #4
+ movlo \curbit, \curbit, lsl #4
+ blo 1b
+
+ @ For very big divisors, we must shift it a bit at a time, or
+ @ we will be in danger of overflowing.
+1: cmp \divisor, #0x80000000
+ cmplo \divisor, \dividend
+ movlo \divisor, \divisor, lsl #1
+ movlo \curbit, \curbit, lsl #1
+ blo 1b
+
+ mov \result, #0
+
+#endif
+
+ @ Division loop
+1: cmp \dividend, \divisor
+ subhs \dividend, \dividend, \divisor
+ orrhs \result, \result, \curbit
+ cmp \dividend, \divisor, lsr #1
+ subhs \dividend, \dividend, \divisor, lsr #1
+ orrhs \result, \result, \curbit, lsr #1
+ cmp \dividend, \divisor, lsr #2
+ subhs \dividend, \dividend, \divisor, lsr #2
+ orrhs \result, \result, \curbit, lsr #2
+ cmp \dividend, \divisor, lsr #3
+ subhs \dividend, \dividend, \divisor, lsr #3
+ orrhs \result, \result, \curbit, lsr #3
+ cmp \dividend, #0 @ Early termination?
+ movnes \curbit, \curbit, lsr #4 @ No, any more bits to do?
+ movne \divisor, \divisor, lsr #4
+ bne 1b
+
+.endm
+
+.macro ARM_DIV2_ORDER divisor, order
+
+#if __LINUX_ARM_ARCH__ >= 5
+
+ clz \order, \divisor
+ rsb \order, \order, #31
+
+#else
+
+ cmp \divisor, #(1 << 16)
+ movhs \divisor, \divisor, lsr #16
+ movhs \order, #16
+ movlo \order, #0
+
+ cmp \divisor, #(1 << 8)
+ movhs \divisor, \divisor, lsr #8
+ addhs \order, \order, #8
+
+ cmp \divisor, #(1 << 4)
+ movhs \divisor, \divisor, lsr #4
+ addhs \order, \order, #4
+
+ cmp \divisor, #(1 << 2)
+ addhi \order, \order, #3
+ addls \order, \order, \divisor, lsr #1
+
+#endif
+
+.endm
+
+ .align 5
+.globl __divsi3
+__divsi3:
+ cmp r1, #0
+ eor ip, r0, r1 @ save the sign of the result.
+ beq Ldiv0
+ rsbmi r1, r1, #0 @ loops below use unsigned.
+ subs r2, r1, #1 @ division by 1 or -1 ?
+ beq 10f
+ movs r3, r0
+ rsbmi r3, r0, #0 @ positive dividend value
+ cmp r3, r1
+ bls 11f
+ tst r1, r2 @ divisor is power of 2 ?
+ beq 12f
+
+ ARM_DIV_BODY r3, r1, r0, r2
+
+ cmp ip, #0
+ rsbmi r0, r0, #0
+ mov pc, lr
+
+10: teq ip, r0 @ same sign ?
+ rsbmi r0, r0, #0
+ mov pc, lr
+
+11: movlo r0, #0
+ moveq r0, ip, asr #31
+ orreq r0, r0, #1
+ mov pc, lr
+
+12: ARM_DIV2_ORDER r1, r2
+
+ cmp ip, #0
+ mov r0, r3, lsr r2
+ rsbmi r0, r0, #0
+ mov pc, lr
+
+Ldiv0:
+
+ str lr, [sp, #-4]!
+ bl __div0
+ mov r0, #0 @ About as wrong as it could be.
+ ldr pc, [sp], #4
diff --git a/lib_arm/_modsi3.S b/lib_arm/_modsi3.S
new file mode 100644
index 0000000000..539c584997
--- /dev/null
+++ b/lib_arm/_modsi3.S
@@ -0,0 +1,99 @@
+
+.macro ARM_MOD_BODY dividend, divisor, order, spare
+
+#if __LINUX_ARM_ARCH__ >= 5
+
+ clz \order, \divisor
+ clz \spare, \dividend
+ sub \order, \order, \spare
+ mov \divisor, \divisor, lsl \order
+
+#else
+
+ mov \order, #0
+
+ @ Unless the divisor is very big, shift it up in multiples of
+ @ four bits, since this is the amount of unwinding in the main
+ @ division loop. Continue shifting until the divisor is
+ @ larger than the dividend.
+1: cmp \divisor, #0x10000000
+ cmplo \divisor, \dividend
+ movlo \divisor, \divisor, lsl #4
+ addlo \order, \order, #4
+ blo 1b
+
+ @ For very big divisors, we must shift it a bit at a time, or
+ @ we will be in danger of overflowing.
+1: cmp \divisor, #0x80000000
+ cmplo \divisor, \dividend
+ movlo \divisor, \divisor, lsl #1
+ addlo \order, \order, #1
+ blo 1b
+
+#endif
+
+ @ Perform all needed substractions to keep only the reminder.
+ @ Do comparisons in batch of 4 first.
+ subs \order, \order, #3 @ yes, 3 is intended here
+ blt 2f
+
+1: cmp \dividend, \divisor
+ subhs \dividend, \dividend, \divisor
+ cmp \dividend, \divisor, lsr #1
+ subhs \dividend, \dividend, \divisor, lsr #1
+ cmp \dividend, \divisor, lsr #2
+ subhs \dividend, \dividend, \divisor, lsr #2
+ cmp \dividend, \divisor, lsr #3
+ subhs \dividend, \dividend, \divisor, lsr #3
+ cmp \dividend, #1
+ mov \divisor, \divisor, lsr #4
+ subges \order, \order, #4
+ bge 1b
+
+ tst \order, #3
+ teqne \dividend, #0
+ beq 5f
+
+ @ Either 1, 2 or 3 comparison/substractions are left.
+2: cmn \order, #2
+ blt 4f
+ beq 3f
+ cmp \dividend, \divisor
+ subhs \dividend, \dividend, \divisor
+ mov \divisor, \divisor, lsr #1
+3: cmp \dividend, \divisor
+ subhs \dividend, \dividend, \divisor
+ mov \divisor, \divisor, lsr #1
+4: cmp \dividend, \divisor
+ subhs \dividend, \dividend, \divisor
+5:
+.endm
+
+ .align 5
+.globl __modsi3
+__modsi3:
+ cmp r1, #0
+ beq Ldiv0
+ rsbmi r1, r1, #0 @ loops below use unsigned.
+ movs ip, r0 @ preserve sign of dividend
+ rsbmi r0, r0, #0 @ if negative make positive
+ subs r2, r1, #1 @ compare divisor with 1
+ cmpne r0, r1 @ compare dividend with divisor
+ moveq r0, #0
+ tsthi r1, r2 @ see if divisor is power of 2
+ andeq r0, r0, r2
+ bls 10f
+
+ ARM_MOD_BODY r0, r1, r2, r3
+
+10: cmp ip, #0
+ rsbmi r0, r0, #0
+ mov pc, lr
+
+
+Ldiv0:
+
+ str lr, [sp, #-4]!
+ bl __div0
+ mov r0, #0 @ About as wrong as it could be.
+ ldr pc, [sp], #4
diff --git a/lib_arm/armlinux.c b/lib_arm/armlinux.c
index ca630b377e..56b7fca833 100644
--- a/lib_arm/armlinux.c
+++ b/lib_arm/armlinux.c
@@ -30,6 +30,8 @@
#include <dataflash.h>
#endif
+DECLARE_GLOBAL_DATA_PTR;
+
/*cmd_boot.c*/
extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
@@ -77,8 +79,6 @@ extern image_header_t header; /* from cmd_bootm.c */
void do_bootm_linux (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[],
ulong addr, ulong *len_ptr, int verify)
{
- DECLARE_GLOBAL_DATA_PTR;
-
ulong len = 0, checksum;
ulong initrd_start, initrd_end;
ulong data;
@@ -124,7 +124,7 @@ void do_bootm_linux (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[],
checksum = ntohl (hdr->ih_hcrc);
hdr->ih_hcrc = 0;
- if (crc32 (0, (char *) data, len) != checksum) {
+ if (crc32 (0, (unsigned char *) data, len) != checksum) {
printf ("Bad Header Checksum\n");
SHOW_BOOT_PROGRESS (-11);
do_reset (cmdtp, flag, argc, argv);
@@ -148,7 +148,7 @@ void do_bootm_linux (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[],
ulong csum = 0;
printf (" Verifying Checksum ... ");
- csum = crc32 (0, (char *) data, len);
+ csum = crc32 (0, (unsigned char *) data, len);
if (csum != ntohl (hdr->ih_dcrc)) {
printf ("Bad Data CRC\n");
SHOW_BOOT_PROGRESS (-12);
diff --git a/lib_arm/board.c b/lib_arm/board.c
index fa3c92e094..055e96e90c 100644
--- a/lib_arm/board.c
+++ b/lib_arm/board.c
@@ -1,5 +1,5 @@
/*
- * (C) Copyright 2002
+ * (C) Copyright 2002-2006
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* (C) Copyright 2002
@@ -25,6 +25,19 @@
* MA 02111-1307 USA
*/
+/*
+ * To match the U-Boot user interface on ARM platforms to the U-Boot
+ * standard (as on PPC platforms), some messages with debug character
+ * are removed from the default U-Boot build.
+ *
+ * Define DEBUG here if you want additional info as shown below
+ * printed upon startup:
+ *
+ * U-Boot code: 00F00000 -> 00F3C774 BSS: -> 00FC3274
+ * IRQ Stack: 00ebff7c
+ * FIQ Stack: 00ebef7c
+ */
+
#include <common.h>
#include <command.h>
#include <malloc.h>
@@ -39,10 +52,28 @@
#include "../drivers/lan91c96.h"
#endif
+DECLARE_GLOBAL_DATA_PTR;
+
#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+#ifdef ENV_IS_VARIABLE
+extern u8 is_nand;
+#endif
void nand_init (void);
#endif
+#if (CONFIG_COMMANDS & CFG_CMD_FLASH)
+#ifdef ENV_IS_VARIABLE
+extern u8 is_flash;
+#endif
+#endif
+
+#if (CONFIG_COMMANDS & CFG_CMD_ONENAND)
+#ifdef ENV_IS_VARIABLE
+extern u8 is_onenand;
+#endif
+void onenand_init(void);
+#endif
+
ulong monitor_flash_len;
#ifdef CONFIG_HAS_DATAFLASH
@@ -106,9 +137,7 @@ void *sbrk (ptrdiff_t increment)
static int init_baudrate (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
- uchar tmp[64]; /* long enough for environment variables */
+ char tmp[64]; /* long enough for environment variables */
int i = getenv_r ("baudrate", tmp, sizeof (tmp));
gd->bd->bi_baudrate = gd->baudrate = (i > 0)
? (int) simple_strtoul (tmp, NULL, 10)
@@ -120,14 +149,14 @@ static int init_baudrate (void)
static int display_banner (void)
{
printf ("\n\n%s\n\n", version_string);
- printf ("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n",
- _armboot_start, _bss_start, _bss_end);
+ debug ("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n",
+ _armboot_start, _bss_start, _bss_end);
#ifdef CONFIG_MODEM_SUPPORT
- puts ("Modem Support enabled\n");
+ debug ("Modem Support enabled\n");
#endif
#ifdef CONFIG_USE_IRQ
- printf ("IRQ Stack: %08lx\n", IRQ_STACK_START);
- printf ("FIQ Stack: %08lx\n", FIQ_STACK_START);
+ debug ("IRQ Stack: %08lx\n", IRQ_STACK_START);
+ debug ("FIQ Stack: %08lx\n", FIQ_STACK_START);
#endif
return (0);
@@ -142,24 +171,35 @@ static int display_banner (void)
*/
static int display_dram_config (void)
{
- DECLARE_GLOBAL_DATA_PTR;
int i;
+#ifdef DEBUG
puts ("RAM Configuration:\n");
for(i=0; i<CONFIG_NR_DRAM_BANKS; i++) {
printf ("Bank #%d: %08lx ", i, gd->bd->bi_dram[i].start);
print_size (gd->bd->bi_dram[i].size, "\n");
}
+#else
+ ulong size = 0;
+
+ for (i=0; i<CONFIG_NR_DRAM_BANKS; i++) {
+ size += gd->bd->bi_dram[i].size;
+ }
+ puts("DRAM: ");
+ print_size(size, "\n");
+#endif
return (0);
}
+#ifndef CFG_NO_FLASH
static void display_flash_config (ulong size)
{
puts ("Flash: ");
print_size (size, "\n");
}
+#endif /* CFG_NO_FLASH */
/*
@@ -187,6 +227,8 @@ static void display_flash_config (ulong size)
*/
typedef int (init_fnc_t) (void);
+int print_cpuinfo (void); /* test-only */
+
init_fnc_t *init_sequence[] = {
cpu_init, /* basic cpu dependent setup */
board_init, /* basic board dependent setup */
@@ -196,21 +238,24 @@ init_fnc_t *init_sequence[] = {
serial_init, /* serial communications setup */
console_init_f, /* stage 1 init of console */
display_banner, /* say that we are here */
+#if defined(CONFIG_DISPLAY_CPUINFO)
+ print_cpuinfo, /* display cpu info (and speed) */
+#endif
+#if defined(CONFIG_DISPLAY_BOARDINFO)
+ checkboard, /* display board info */
+#endif
dram_init, /* configure available RAM banks */
display_dram_config,
-#if defined(CONFIG_VCMA9) || defined (CONFIG_CMC_PU2)
- checkboard,
-#endif
NULL,
};
void start_armboot (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
- ulong size;
init_fnc_t **init_fnc_ptr;
char *s;
+#ifndef CFG_NO_FLASH
+ ulong size = 0;
+#endif
#if defined(CONFIG_VFD) || defined(CONFIG_LCD)
unsigned long addr;
#endif
@@ -232,9 +277,14 @@ void start_armboot (void)
}
}
+#ifndef CFG_NO_FLASH
/* configure available FLASH banks */
+#ifdef ENV_IS_VARIABLE
+ if (is_flash)
+#endif
size = flash_init ();
display_flash_config (size);
+#endif /* CFG_NO_FLASH */
#ifdef CONFIG_VFD
# ifndef PAGE_SIZE
@@ -266,8 +316,20 @@ void start_armboot (void)
mem_malloc_init (_armboot_start - CFG_MALLOC_LEN);
#if (CONFIG_COMMANDS & CFG_CMD_NAND)
- puts ("NAND:");
- nand_init(); /* go init the NAND */
+#ifdef ENV_IS_VARIABLE
+ if (is_nand)
+#endif
+ {
+ puts ("NAND:");
+ nand_init(); /* go init the NAND */
+ }
+#endif
+
+#if (CONFIG_COMMANDS & CFG_CMD_ONENAND)
+#ifdef ENV_IS_VARIABLE
+ if (is_onenand)
+#endif
+ onenand_init();
#endif
#ifdef CONFIG_HAS_DATAFLASH
@@ -291,7 +353,7 @@ void start_armboot (void)
int i;
ulong reg;
char *s, *e;
- uchar tmp[64];
+ char tmp[64];
i = getenv_r ("ethaddr", tmp, sizeof (tmp));
s = (i > 0) ? tmp : NULL;
@@ -301,6 +363,17 @@ void start_armboot (void)
if (s)
s = (*e) ? e + 1 : e;
}
+
+#ifdef CONFIG_HAS_ETH1
+ i = getenv_r ("eth1addr", tmp, sizeof (tmp));
+ s = (i > 0) ? tmp : NULL;
+
+ for (reg = 0; reg < 6; ++reg) {
+ gd->bd->bi_enet1addr[reg] = s ? simple_strtoul (s, &e, 16) : 0;
+ if (s)
+ s = (*e) ? e + 1 : e;
+ }
+#endif
}
devices_init (); /* get the devices list going. */
@@ -366,6 +439,8 @@ void hang (void)
}
#ifdef CONFIG_MODEM_SUPPORT
+static inline void mdm_readline(char *buf, int bufsiz);
+
/* called from main loop (common/main.c) */
extern void dbg(const char *fmt, ...);
int mdm_init (void)
@@ -374,7 +449,6 @@ int mdm_init (void)
char *init_str;
int i;
extern char console_buffer[];
- static inline void mdm_readline(char *buf, int bufsiz);
extern void enable_putc(void);
extern int hwflow_onoff(int);
diff --git a/lib_arm/cache.c b/lib_arm/cache.c
index 61ee9d3b13..4a81f5b80e 100644
--- a/lib_arm/cache.c
+++ b/lib_arm/cache.c
@@ -27,10 +27,10 @@
void flush_cache (unsigned long dummy1, unsigned long dummy2)
{
-#ifdef CONFIG_OMAP2420
- void arm1136_cache_flush(void);
+#if defined(CONFIG_OMAP24XX) || defined(CONFIG_OMAP34XX)
+ void arm_cache_flush(void);
- arm1136_cache_flush();
+ arm_cache_flush();
#endif
return;
}
diff --git a/lib_blackfin/Makefile b/lib_blackfin/Makefile
new file mode 100644
index 0000000000..bc280d01f8
--- /dev/null
+++ b/lib_blackfin/Makefile
@@ -0,0 +1,47 @@
+#
+# U-boot Makefile
+#
+# Copyright (c) 2005 blackfin.uclinux.org
+#
+# (C) Copyright 2000-2004
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = lib$(ARCH).a
+
+AOBJS =
+
+COBJS = board.o bf533_linux.o bf533_string.o cache.o muldi3.o
+OBJS = $(AOBJS) $(COBJS)
+
+$(LIB): .depend $(OBJS)
+ $(AR) crv $@ $(OBJS)
+
+#########################################################################
+
+.depend: Makefile $(AOBJS:.o=.S) $(COBJS:.o=.c)
+ $(CC) -M $(CFLAGS) $(AOBJS:.o=.S) $(COBJS:.o=.c) > $@
+
+sinclude .depend
+
+#########################################################################
diff --git a/lib_blackfin/bf533_linux.c b/lib_blackfin/bf533_linux.c
new file mode 100644
index 0000000000..88b4da29df
--- /dev/null
+++ b/lib_blackfin/bf533_linux.c
@@ -0,0 +1,91 @@
+/*
+ * U-boot - bf533_linux.c
+ *
+ * Copyright (c) 2005 blackfin.uclinux.org
+ *
+ * (C) Copyright 2000-2004
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/* Dummy functions, currently not in Use */
+
+#include <common.h>
+#include <command.h>
+#include <image.h>
+#include <zlib.h>
+#include <asm/byteorder.h>
+
+#define LINUX_MAX_ENVS 256
+#define LINUX_MAX_ARGS 256
+
+#ifdef CONFIG_SHOW_BOOT_PROGRESS
+#include <status_led.h>
+#define SHOW_BOOT_PROGRESS(arg) show_boot_progress(arg)
+#else
+#define SHOW_BOOT_PROGRESS(arg)
+#endif
+
+#define CMD_LINE_ADDR 0xFF900000 /* L1 scratchpad */
+
+#ifdef SHARED_RESOURCES
+ extern void swap_to(int device_id);
+#endif
+
+static char *make_command_line(void);
+
+extern image_header_t header;
+extern int do_reset(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]);
+void do_bootm_linux(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[],
+ ulong addr, ulong * len_ptr, int verify)
+{
+ int (*appl)(char *cmdline);
+ char *cmdline;
+
+#ifdef SHARED_RESOURCES
+ swap_to(FLASH);
+#endif
+
+ appl = (int (*)(char *))ntohl(header.ih_ep);
+ printf("Starting Kernel at = %x\n", appl);
+ cmdline = make_command_line();
+ if(icache_status()){
+ flush_instruction_cache();
+ icache_disable();
+ }
+ if(dcache_status()){
+ flush_data_cache();
+ dcache_disable();
+ }
+ (*appl)(cmdline);
+}
+
+char *make_command_line(void)
+{
+ char *dest = (char *) CMD_LINE_ADDR;
+ char *bootargs;
+
+ if ( (bootargs = getenv("bootargs")) == NULL )
+ return NULL;
+
+ strncpy(dest, bootargs, 0x1000);
+ dest[0xfff] = 0;
+ return dest;
+}
diff --git a/lib_blackfin/bf533_string.c b/lib_blackfin/bf533_string.c
new file mode 100644
index 0000000000..c8b1a3a983
--- /dev/null
+++ b/lib_blackfin/bf533_string.c
@@ -0,0 +1,185 @@
+/*
+ * U-boot - bf533_string.c Contains library routines.
+ *
+ * Copyright (c) 2005 blackfin.uclinux.org
+ *
+ * (C) Copyright 2000-2004
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/setup.h>
+#include <asm/page.h>
+#include <asm/cpu/defBF533.h>
+
+void *dma_memcpy(void *,const void *,size_t);
+
+char *strcpy(char *dest, const char *src)
+{
+ char *xdest = dest;
+ char temp = 0;
+
+ __asm__ __volatile__
+ ("1:\t%2 = B [%1++] (Z);\n\t"
+ "B [%0++] = %2;\n\t"
+ "CC = %2;\n\t"
+ "if cc jump 1b (bp);\n":"=a"(dest), "=a"(src), "=d"(temp)
+ :"0"(dest), "1"(src), "2"(temp):"memory");
+
+ return xdest;
+}
+
+char *strncpy(char *dest, const char *src, size_t n)
+{
+ char *xdest = dest;
+ char temp = 0;
+
+ if (n == 0)
+ return xdest;
+
+ __asm__ __volatile__
+ ("1:\t%3 = B [%1++] (Z);\n\t"
+ "B [%0++] = %3;\n\t"
+ "CC = %3;\n\t"
+ "if ! cc jump 2f;\n\t"
+ "%2 += -1;\n\t"
+ "CC = %2 == 0;\n\t"
+ "if ! cc jump 1b (bp);\n"
+ "2:\n":"=a"(dest), "=a"(src), "=da"(n), "=d"(temp)
+ :"0"(dest), "1"(src), "2"(n), "3"(temp)
+ :"memory");
+
+ return xdest;
+}
+
+int strcmp(const char *cs, const char *ct)
+{
+ char __res1, __res2;
+
+ __asm__
+ ("1:\t%2 = B[%0++] (Z);\n\t" /* get *cs */
+ "%3 = B[%1++] (Z);\n\t" /* get *ct */
+ "CC = %2 == %3;\n\t" /* compare a byte */
+ "if ! cc jump 2f;\n\t" /* not equal, break out */
+ "CC = %2;\n\t" /* at end of cs? */
+ "if cc jump 1b (bp);\n\t" /* no, keep going */
+ "jump.s 3f;\n" /* strings are equal */
+ "2:\t%2 = %2 - %3;\n" /* *cs - *ct */
+ "3:\n": "=a"(cs), "=a"(ct), "=d"(__res1),
+ "=d"(__res2)
+ : "0"(cs), "1"(ct));
+
+ return __res1;
+}
+
+int strncmp(const char *cs, const char *ct, size_t count)
+{
+ char __res1, __res2;
+
+ if (!count)
+ return 0;
+
+ __asm__
+ ("1:\t%3 = B[%0++] (Z);\n\t" /* get *cs */
+ "%4 = B[%1++] (Z);\n\t" /* get *ct */
+ "CC = %3 == %4;\n\t" /* compare a byte */
+ "if ! cc jump 3f;\n\t" /* not equal, break out */
+ "CC = %3;\n\t" /* at end of cs? */
+ "if ! cc jump 4f;\n\t" /* yes, all done */
+ "%2 += -1;\n\t" /* no, adjust count */
+ "CC = %2 == 0;\n\t" "if ! cc jump 1b;\n" /* more to do, keep going */
+ "2:\t%3 = 0;\n\t" /* strings are equal */
+ "jump.s 4f;\n" "3:\t%3 = %3 - %4;\n" /* *cs - *ct */
+ "4:": "=a"(cs), "=a"(ct), "=da"(count), "=d"(__res1),
+ "=d"(__res2)
+ : "0"(cs), "1"(ct), "2"(count));
+
+ return __res1;
+}
+
+/*
+ * memcpy - Copy one area of memory to another
+ * @dest: Where to copy to
+ * @src: Where to copy from
+ * @count: The size of the area.
+ *
+ * You should not use this function to access IO space, use memcpy_toio()
+ * or memcpy_fromio() instead.
+ */
+void * memcpy(void * dest,const void *src,size_t count)
+{
+ char *tmp = (char *) dest, *s = (char *) src;
+
+/* Turn off the cache, if destination in the L1 memory */
+ if ( (tmp >= (char *)L1_ISRAM) && (tmp < (char *)L1_ISRAM_END)
+ || (tmp >= (char *)DATA_BANKA_SRAM) && (tmp < DATA_BANKA_SRAM_END)
+ || (tmp >= (char *)DATA_BANKB_SRAM) && (tmp < DATA_BANKB_SRAM_END) ){
+ if(icache_status()){
+ blackfin_icache_flush_range(src, src+count);
+ icache_disable();
+ }
+ if(dcache_status()){
+ blackfin_dcache_flush_range(src, src+count);
+ dcache_disable();
+ }
+ dma_memcpy(dest,src,count);
+ }else{
+ while(count--)
+ *tmp++ = *s++;
+ }
+ return dest;
+}
+
+void *dma_memcpy(void * dest,const void *src,size_t count)
+{
+
+ *pMDMA_D0_IRQ_STATUS = DMA_DONE | DMA_ERR;
+
+ /* Copy sram functions from sdram to sram */
+ /* Setup destination start address */
+ *pMDMA_D0_START_ADDR = (volatile void **)dest;
+ /* Setup destination xcount */
+ *pMDMA_D0_X_COUNT = count ;
+ /* Setup destination xmodify */
+ *pMDMA_D0_X_MODIFY = 1;
+
+ /* Setup Source start address */
+ *pMDMA_S0_START_ADDR = (volatile void **)src;
+ /* Setup Source xcount */
+ *pMDMA_S0_X_COUNT = count;
+ /* Setup Source xmodify */
+ *pMDMA_S0_X_MODIFY = 1;
+
+ /* Enable source DMA */
+ *pMDMA_S0_CONFIG = (DMAEN);
+ asm("ssync;");
+
+ *pMDMA_D0_CONFIG = ( WNR | DMAEN);
+
+ while(*pMDMA_D0_IRQ_STATUS & DMA_RUN){
+ *pMDMA_D0_IRQ_STATUS |= (DMA_DONE | DMA_ERR);
+ }
+ *pMDMA_D0_IRQ_STATUS |= (DMA_DONE | DMA_ERR);
+
+ dest += count;
+ src += count;
+ return dest;
+}
diff --git a/lib_blackfin/blackfin_board.h b/lib_blackfin/blackfin_board.h
new file mode 100644
index 0000000000..31c16a20fe
--- /dev/null
+++ b/lib_blackfin/blackfin_board.h
@@ -0,0 +1,62 @@
+/*
+ * U-boot - blackfin_board.h
+ *
+ * Copyright (c) 2005 blackfin.uclinux.org
+ *
+ * (C) Copyright 2000-2004
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __BLACKFIN_BOARD_H__
+#define __BLACKFIN_BOARD_H__
+
+extern void timer_init(void);
+extern void init_IRQ(void);
+extern void rtc_init(void);
+
+extern ulong uboot_end_data;
+extern ulong uboot_end;
+
+ulong monitor_flash_len;
+
+
+#define VERSION_STRING_SIZE 150 /* including 40 bytes buffer to change any string */
+#define VERSION_STRING_FORMAT "%s (%s - %s)\n"
+#define VERSION_STRING U_BOOT_VERSION, __DATE__, __TIME__
+
+char version_string[VERSION_STRING_SIZE];
+
+int *g_addr;
+static ulong mem_malloc_start;
+static ulong mem_malloc_end;
+static ulong mem_malloc_brk;
+extern char _sram_in_sdram_start[];
+extern char _sram_inst_size[];
+#ifdef DEBUG
+static void display_global_data(void);
+#endif
+
+/* definitions used to check the SMC card availability */
+#define SMC_BASE_ADDRESS CONFIG_SMC91111_BASE
+#define UPPER_BYTE_MASK 0xFF00
+#define SMC_IDENT 0x3300
+
+#endif
diff --git a/lib_blackfin/board.c b/lib_blackfin/board.c
new file mode 100644
index 0000000000..d9dc2b6d0c
--- /dev/null
+++ b/lib_blackfin/board.c
@@ -0,0 +1,279 @@
+/*
+ * U-boot - board.c First C file to be called contains init routines
+ *
+ * Copyright (c) 2005 blackfin.uclinux.org
+ *
+ * (C) Copyright 2000-2004
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <command.h>
+#include <malloc.h>
+#include <devices.h>
+#include <version.h>
+#include <net.h>
+#include <environment.h>
+#include "blackfin_board.h"
+#include "../drivers/smc91111.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+extern flash_info_t flash_info[];
+
+
+static void mem_malloc_init(void)
+{
+ mem_malloc_start = CFG_MALLOC_BASE;
+ mem_malloc_end = (CFG_MALLOC_BASE + CFG_MALLOC_LEN);
+ mem_malloc_brk = mem_malloc_start;
+ memset((void *) mem_malloc_start, 0,
+ mem_malloc_end - mem_malloc_start);
+}
+
+void *sbrk(ptrdiff_t increment)
+{
+ ulong old = mem_malloc_brk;
+ ulong new = old + increment;
+
+ if ((new < mem_malloc_start) || (new > mem_malloc_end)) {
+ return (NULL);
+ }
+ mem_malloc_brk = new;
+
+ return ((void *) old);
+}
+
+static int display_banner(void)
+{
+ sprintf(version_string, VERSION_STRING_FORMAT, VERSION_STRING);
+ printf("%s\n", version_string);
+ return (0);
+}
+
+static void display_flash_config(ulong size)
+{
+ puts("FLASH: ");
+ print_size(size, "\n");
+ return;
+}
+
+static int init_baudrate(void)
+{
+ uchar tmp[64];
+ int i = getenv_r("baudrate", tmp, sizeof(tmp));
+ gd->bd->bi_baudrate = gd->baudrate = (i > 0)
+ ? (int) simple_strtoul(tmp, NULL, 10)
+ : CONFIG_BAUDRATE;
+ return (0);
+}
+
+#ifdef DEBUG
+static void display_global_data(void)
+{
+ bd_t *bd;
+ bd = gd->bd;
+ printf("--flags:%x\n", gd->flags);
+ printf("--board_type:%x\n", gd->board_type);
+ printf("--baudrate:%x\n", gd->baudrate);
+ printf("--have_console:%x\n", gd->have_console);
+ printf("--ram_size:%x\n", gd->ram_size);
+ printf("--reloc_off:%x\n", gd->reloc_off);
+ printf("--env_addr:%x\n", gd->env_addr);
+ printf("--env_valid:%x\n", gd->env_valid);
+ printf("--bd:%x %x\n", gd->bd, bd);
+ printf("---bi_baudrate:%x\n", bd->bi_baudrate);
+ printf("---bi_ip_addr:%x\n", bd->bi_ip_addr);
+ printf("---bi_enetaddr:%x %x %x %x %x %x\n",
+ bd->bi_enetaddr[0],
+ bd->bi_enetaddr[1],
+ bd->bi_enetaddr[2],
+ bd->bi_enetaddr[3],
+ bd->bi_enetaddr[4],
+ bd->bi_enetaddr[5]);
+ printf("---bi_arch_number:%x\n", bd->bi_arch_number);
+ printf("---bi_boot_params:%x\n", bd->bi_boot_params);
+ printf("---bi_memstart:%x\n", bd->bi_memstart);
+ printf("---bi_memsize:%x\n", bd->bi_memsize);
+ printf("---bi_flashstart:%x\n", bd->bi_flashstart);
+ printf("---bi_flashsize:%x\n", bd->bi_flashsize);
+ printf("---bi_flashoffset:%x\n", bd->bi_flashoffset);
+ printf("--jt:%x *:%x\n", gd->jt, *(gd->jt));
+}
+#endif
+
+/*
+ * All attempts to come up with a "common" initialization sequence
+ * that works for all boards and architectures failed: some of the
+ * requirements are just _too_ different. To get rid of the resulting
+ * mess of board dependend #ifdef'ed code we now make the whole
+ * initialization sequence configurable to the user.
+ *
+ * The requirements for any new initalization function is simple: it
+ * receives a pointer to the "global data" structure as it's only
+ * argument, and returns an integer return code, where 0 means
+ * "continue" and != 0 means "fatal error, hang the system".
+ */
+
+void board_init_f(ulong bootflag)
+{
+ ulong addr;
+ bd_t *bd;
+
+ gd = (gd_t *) (CFG_GBL_DATA_ADDR);
+ memset((void *) gd, 0, sizeof(gd_t));
+
+ /* Board data initialization */
+ addr = (CFG_GBL_DATA_ADDR + sizeof(gd_t));
+
+ /* Align to 4 byte boundary */
+ addr &= ~(4 - 1);
+ bd = (bd_t*)addr;
+ gd->bd = bd;
+ memset((void *) bd, 0, sizeof(bd_t));
+
+ /* Initialize */
+ init_IRQ();
+ env_init(); /* initialize environment */
+ init_baudrate(); /* initialze baudrate settings */
+ serial_init(); /* serial communications setup */
+ console_init_f();
+ display_banner(); /* say that we are here */
+ checkboard();
+#if defined(CONFIG_RTC_BF533) && (CONFIG_COMMANDS & CFG_CMD_DATE)
+ rtc_init();
+#endif
+ timer_init();
+ printf("Clock: VCO: %lu MHz, Core: %lu MHz, System: %lu MHz\n", \
+ CONFIG_VCO_HZ/1000000, CONFIG_CCLK_HZ/1000000, CONFIG_SCLK_HZ/1000000);
+ printf("SDRAM: ");
+ print_size(initdram(0), "\n");
+ board_init_r((gd_t *) gd, 0x20000010);
+}
+
+void board_init_r(gd_t * id, ulong dest_addr)
+{
+ ulong size;
+ extern void malloc_bin_reloc(void);
+ char *s, *e;
+ bd_t *bd;
+ int i;
+ gd = id;
+ gd->flags |= GD_FLG_RELOC; /* tell others: relocation done */
+ bd = gd->bd;
+
+#if CONFIG_STAMP
+ /* There are some other pointer constants we must deal with */
+ /* configure available FLASH banks */
+ size = flash_init();
+ display_flash_config(size);
+ flash_protect(FLAG_PROTECT_SET, CFG_FLASH_BASE, CFG_FLASH_BASE + 0x1ffff, &flash_info[0]);
+ bd->bi_flashstart = CFG_FLASH_BASE;
+ bd->bi_flashsize = size;
+ bd->bi_flashoffset = 0;
+#else
+ bd->bi_flashstart = 0;
+ bd->bi_flashsize = 0;
+ bd->bi_flashoffset = 0;
+#endif
+ /* initialize malloc() area */
+ mem_malloc_init();
+ malloc_bin_reloc();
+
+ /* relocate environment function pointers etc. */
+ env_relocate();
+
+ /* board MAC address */
+ s = getenv("ethaddr");
+ for (i = 0; i < 6; ++i) {
+ bd->bi_enetaddr[i] = s ? simple_strtoul(s, &e, 16) : 0;
+ if (s)
+ s = (*e) ? e + 1 : e;
+ }
+
+ /* IP Address */
+ bd->bi_ip_addr = getenv_IPaddr("ipaddr");
+
+ /* Initialize devices */
+ devices_init();
+ jumptable_init();
+
+ /* Initialize the console (after the relocation and devices init) */
+ console_init_r();
+
+ /* Initialize from environment */
+ if ((s = getenv("loadaddr")) != NULL) {
+ load_addr = simple_strtoul(s, NULL, 16);
+ }
+#if (CONFIG_COMMANDS & CFG_CMD_NET)
+ if ((s = getenv("bootfile")) != NULL) {
+ copy_filename(BootFile, s, sizeof(BootFile));
+ }
+#endif
+#if defined(CONFIG_MISC_INIT_R)
+ /* miscellaneous platform dependent initialisations */
+ misc_init_r();
+#endif
+
+#ifdef CONFIG_DRIVER_SMC91111
+#ifdef SHARED_RESOURCES
+ /* Switch to Ethernet */
+ swap_to(ETHERNET);
+#endif
+ if ( (SMC_inw(BANK_SELECT) & UPPER_BYTE_MASK) != SMC_IDENT ) {
+ printf("ERROR: Can't find SMC91111 at address %x\n", SMC_BASE_ADDRESS);
+ } else {
+ printf("Net: SMC91111 at 0x%08X\n", SMC_BASE_ADDRESS);
+ }
+
+#ifdef SHARED_RESOURCES
+ swap_to(FLASH);
+#endif
+#endif
+#ifdef CONFIG_SOFT_I2C
+ init_func_i2c();
+#endif
+
+#ifdef DEBUG
+ display_global_data(void);
+#endif
+
+ /* main_loop() can return to retry autoboot, if so just run it again. */
+ for (;;) {
+ main_loop();
+ }
+}
+
+#ifdef CONFIG_SOFT_I2C
+static int init_func_i2c (void)
+{
+ puts ("I2C: ");
+ i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
+ puts ("ready\n");
+ return (0);
+}
+#endif
+
+void hang(void)
+{
+ puts("### ERROR ### Please RESET the board ###\n");
+ for (;;);
+}
diff --git a/lib_blackfin/cache.c b/lib_blackfin/cache.c
new file mode 100644
index 0000000000..847278d226
--- /dev/null
+++ b/lib_blackfin/cache.c
@@ -0,0 +1,40 @@
+/*
+ * U-boot - cache.c
+ *
+ * Copyright (c) 2005 blackfin.uclinux.org
+ *
+ * (C) Copyright 2000-2004
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/* for now: just dummy functions to satisfy the linker */
+extern void blackfin_icache_range (unsigned long *, unsigned long *);
+extern void blackfin_dcache_range (unsigned long *, unsigned long *);
+void flush_cache (unsigned long dummy1, unsigned long dummy2)
+{
+ if (icache_status ()) {
+ blackfin_icache_flush_range (dummy1, dummy1 + dummy2);
+ }
+ if (dcache_status ()) {
+ blackfin_dcache_flush_range (dummy1, dummy1 + dummy2);
+ }
+ return;
+}
diff --git a/lib_blackfin/muldi3.c b/lib_blackfin/muldi3.c
new file mode 100644
index 0000000000..1fc34e3d93
--- /dev/null
+++ b/lib_blackfin/muldi3.c
@@ -0,0 +1,92 @@
+/*
+ * U-boot - muldi3.c contains routines for mult and div
+ *
+ * Copyright (c) 2005 blackfin.uclinux.org
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/* Generic function got from GNU gcc package, libgcc2.c */
+#ifndef SI_TYPE_SIZE
+#define SI_TYPE_SIZE 32
+#endif
+#define __ll_B (1L << (SI_TYPE_SIZE / 2))
+#define __ll_lowpart(t) ((USItype) (t) % __ll_B)
+#define __ll_highpart(t) ((USItype) (t) / __ll_B)
+#define BITS_PER_UNIT 8
+
+#if !defined (umul_ppmm)
+#define umul_ppmm(w1, w0, u, v) \
+do { \
+ USItype __x0, __x1, __x2, __x3; \
+ USItype __ul, __vl, __uh, __vh; \
+ \
+ __ul = __ll_lowpart (u); \
+ __uh = __ll_highpart (u); \
+ __vl = __ll_lowpart (v); \
+ __vh = __ll_highpart (v); \
+ \
+ __x0 = (USItype) __ul * __vl; \
+ __x1 = (USItype) __ul * __vh; \
+ __x2 = (USItype) __uh * __vl; \
+ __x3 = (USItype) __uh * __vh; \
+ \
+ __x1 += __ll_highpart (__x0);/* this can't give carry */ \
+ __x1 += __x2; /* but this indeed can */ \
+ if (__x1 < __x2) /* did we get it? */ \
+ __x3 += __ll_B; /* yes, add it in the proper pos. */ \
+ \
+ (w1) = __x3 + __ll_highpart (__x1); \
+ (w0) = __ll_lowpart (__x1) * __ll_B + __ll_lowpart (__x0); \
+} while (0)
+#endif
+
+#if !defined (__umulsidi3)
+#define __umulsidi3(u, v) \
+ ({DIunion __w; \
+ umul_ppmm (__w.s.high, __w.s.low, u, v); \
+ __w.ll; })
+#endif
+
+typedef unsigned int USItype __attribute__ ((mode (SI)));
+typedef int SItype __attribute__ ((mode (SI)));
+typedef int DItype __attribute__ ((mode (DI)));
+typedef int word_type __attribute__ ((mode (__word__)));
+
+struct DIstruct {SItype low, high;};
+typedef union
+{
+ struct DIstruct s;
+ DItype ll;
+} DIunion;
+
+DItype __muldi3 (DItype u, DItype v)
+{
+ DIunion w;
+ DIunion uu, vv;
+
+ uu.ll = u,
+ vv.ll = v;
+ /* panic("kernel panic for __muldi3"); */
+ w.ll = __umulsidi3 (uu.s.low, vv.s.low);
+ w.s.high += ((USItype) uu.s.low * (USItype) vv.s.high
+ + (USItype) uu.s.high * (USItype) vv.s.low);
+
+ return w.ll;
+}
diff --git a/lib_generic/string.c b/lib_generic/string.c
index 0e99d1b2b5..e0b793abbe 100644
--- a/lib_generic/string.c
+++ b/lib_generic/string.c
@@ -21,7 +21,7 @@
#include <malloc.h>
-#ifndef __HAVE_ARCH_STRNICMP
+#if 0 /* not used - was: #ifndef __HAVE_ARCH_STRNICMP */
/**
* strnicmp - Case insensitive, length-limited string comparison
* @s1: One string
diff --git a/lib_i386/bios_setup.c b/lib_i386/bios_setup.c
index bc9781550d..75f04a01fe 100644
--- a/lib_i386/bios_setup.c
+++ b/lib_i386/bios_setup.c
@@ -36,6 +36,8 @@
#include <asm/realmode.h>
#include <asm/io.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#define NUMVECTS 256
#define BIOS_DATA ((char*)0x400)
@@ -136,7 +138,6 @@ static void setvector(int vector, u16 segment, void *handler)
int bios_setup(void)
{
- DECLARE_GLOBAL_DATA_PTR;
static int done=0;
int vector;
struct pci_controller *pri_hose;
diff --git a/lib_i386/board.c b/lib_i386/board.c
index e90eb6e569..4175fdb1c4 100644
--- a/lib_i386/board.c
+++ b/lib_i386/board.c
@@ -38,6 +38,8 @@
#include <ide.h>
#include <asm/u-boot-i386.h>
+DECLARE_GLOBAL_DATA_PTR;
+
extern long _i386boot_start;
extern long _i386boot_end;
extern long _i386boot_romdata_start;
@@ -80,8 +82,6 @@ static ulong mem_malloc_brk = 0;
static int mem_malloc_init(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
/* start malloc area right after the stack */
mem_malloc_start = i386boot_bss_start +
i386boot_bss_size + CFG_STACK_SIZE;
@@ -130,8 +130,6 @@ char *strmhz (char *buf, long hz)
*/
static int init_baudrate (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
char tmp[64]; /* long enough for environment variables */
int i = getenv_r("baudrate", tmp, 64);
@@ -167,7 +165,6 @@ static int display_banner (void)
*/
static int display_dram_config (void)
{
- DECLARE_GLOBAL_DATA_PTR;
int i;
puts ("DRAM Configuration:\n");
@@ -233,7 +230,6 @@ gd_t *global_data;
void start_i386boot (void)
{
- DECLARE_GLOBAL_DATA_PTR;
char *s;
int i;
ulong size;
diff --git a/lib_i386/i386_linux.c b/lib_i386/i386_linux.c
index e5d8eea4b8..b4a6f5a3cd 100644
--- a/lib_i386/i386_linux.c
+++ b/lib_i386/i386_linux.c
@@ -151,6 +151,12 @@ void do_bootm_linux(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[],
initrd_end = 0;
}
+ /* if multi-part image, we need to advance base ptr */
+ if ((hdr->ih_type==IH_TYPE_MULTI) && (len_ptr[1])) {
+ int i;
+ for (i=0, addr+=sizeof(int); len_ptr[i++]; addr+=sizeof(int));
+ }
+
base_ptr = load_zimage((void*)addr + sizeof(image_header_t), ntohl(hdr->ih_size),
initrd_start, initrd_end-initrd_start, 0);
diff --git a/lib_m68k/board.c b/lib_m68k/board.c
index 6b3edd61bb..6aaf60991c 100644
--- a/lib_m68k/board.c
+++ b/lib_m68k/board.c
@@ -60,6 +60,8 @@
#include <i2c.h>
#endif
+DECLARE_GLOBAL_DATA_PTR;
+
static char *failed = "*** failed ***\n";
#ifdef CONFIG_PCU_E
@@ -111,8 +113,6 @@ static ulong mem_malloc_brk = 0;
*/
static void mem_malloc_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
ulong dest_addr = CFG_MONITOR_BASE + gd->reloc_off;
mem_malloc_end = dest_addr;
@@ -177,8 +177,6 @@ typedef int (init_fnc_t) (void);
static int init_baudrate (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
uchar tmp[64]; /* long enough for environment variables */
int i = getenv_r ("baudrate", tmp, sizeof (tmp));
@@ -192,8 +190,6 @@ static int init_baudrate (void)
static int init_func_ram (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
int board_type = 0; /* use dummy arg */
puts ("DRAM: ");
@@ -263,10 +259,9 @@ init_fnc_t *init_sequence[] = {
void
board_init_f (ulong bootflag)
{
- DECLARE_GLOBAL_DATA_PTR;
-
bd_t *bd;
ulong len, addr, addr_sp;
+ ulong *paddr;
gd_t *id;
init_fnc_t **init_fnc_ptr;
#ifdef CONFIG_PRAM
@@ -363,8 +358,12 @@ board_init_f (ulong bootflag)
*/
addr_sp -= 16;
addr_sp &= ~0xF;
- *((ulong *) addr_sp)-- = 0;
- *((ulong *) addr_sp)-- = 0;
+
+ paddr = (ulong *)addr_sp;
+ *paddr-- = 0;
+ *paddr-- = 0;
+ addr_sp = (ulong)paddr;
+
debug ("Stack Pointer at: %08lx\n", addr_sp);
/*
@@ -414,7 +413,6 @@ board_init_f (ulong bootflag)
*/
void board_init_r (gd_t *id, ulong dest_addr)
{
- DECLARE_GLOBAL_DATA_PTR;
cmd_tbl_t *cmdtp;
char *s, *e;
bd_t *bd;
@@ -638,7 +636,7 @@ void board_init_r (gd_t *id, ulong dest_addr)
#if (CONFIG_COMMANDS & CFG_CMD_NAND)
WATCHDOG_RESET ();
- puts ("NAND:");
+ puts ("NAND: ");
nand_init(); /* go init the NAND */
#endif
diff --git a/lib_m68k/m68k_linux.c b/lib_m68k/m68k_linux.c
index a32de1a907..f87f56ea8f 100644
--- a/lib_m68k/m68k_linux.c
+++ b/lib_m68k/m68k_linux.c
@@ -27,6 +27,8 @@
#include <zlib.h>
#include <asm/byteorder.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#define PHYSADDR(x) x
#define LINUX_MAX_ENVS 256
@@ -56,8 +58,6 @@ static void linux_env_set (char *env_name, char *env_val);
void do_bootm_linux (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[],
ulong addr, ulong * len_ptr, int verify)
{
- DECLARE_GLOBAL_DATA_PTR;
-
ulong len = 0, checksum;
ulong initrd_start, initrd_end;
ulong data;
diff --git a/lib_m68k/time.c b/lib_m68k/time.c
index 1d6d29736f..d45e470aeb 100644
--- a/lib_m68k/time.c
+++ b/lib_m68k/time.c
@@ -27,6 +27,11 @@
#include <asm/mcftimer.h>
+#ifdef CONFIG_M5271
+#include <asm/m5271.h>
+#include <asm/immap_5271.h>
+#endif
+
#ifdef CONFIG_M5272
#include <asm/m5272.h>
#include <asm/immap_5272.h>
@@ -43,7 +48,7 @@
static ulong timestamp;
-#ifdef CONFIG_M5282
+#if defined(CONFIG_M5282) || defined(CONFIG_M5271)
static unsigned short lastinc;
#endif
@@ -127,7 +132,7 @@ void set_timer (ulong t)
}
#endif
-#if defined(CONFIG_M5282)
+#if defined(CONFIG_M5282) || defined(CONFIG_M5271)
void udelay(unsigned long usec)
{
diff --git a/lib_microblaze/board.c b/lib_microblaze/board.c
index bc987a3380..026d247e54 100644
--- a/lib_microblaze/board.c
+++ b/lib_microblaze/board.c
@@ -28,6 +28,8 @@
#include <version.h>
#include <watchdog.h>
+DECLARE_GLOBAL_DATA_PTR;
+
const char version_string[] =
U_BOOT_VERSION" (" __DATE__ " - " __TIME__ ")";
@@ -72,8 +74,6 @@ init_fnc_t *init_sequence[] = {
void board_init(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
bd_t *bd;
init_fnc_t **init_fnc_ptr;
diff --git a/lib_mips/mips_linux.c b/lib_mips/mips_linux.c
index 12e84359c9..952d5a90ee 100644
--- a/lib_mips/mips_linux.c
+++ b/lib_mips/mips_linux.c
@@ -28,6 +28,8 @@
#include <asm/byteorder.h>
#include <asm/addrspace.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#define LINUX_MAX_ENVS 256
#define LINUX_MAX_ARGS 256
@@ -56,8 +58,6 @@ static void linux_env_set (char * env_name, char * env_val);
void do_bootm_linux (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[],
ulong addr, ulong * len_ptr, int verify)
{
- DECLARE_GLOBAL_DATA_PTR;
-
ulong len = 0, checksum;
ulong initrd_start, initrd_end;
ulong data;
diff --git a/lib_nios/board.c b/lib_nios/board.c
index e6cda521ed..0a0d2e38fd 100644
--- a/lib_nios/board.c
+++ b/lib_nios/board.c
@@ -32,6 +32,7 @@
#include <status_led.h>
#endif
+DECLARE_GLOBAL_DATA_PTR;
/*
* All attempts to come up with a "common" initialization sequence
@@ -106,8 +107,6 @@ init_fnc_t *init_sequence[] = {
/***********************************************************************/
void board_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
bd_t *bd;
init_fnc_t **init_fnc_ptr;
char *s, *e;
diff --git a/lib_nios2/board.c b/lib_nios2/board.c
index 0e0b042449..7ffb3f019b 100644
--- a/lib_nios2/board.c
+++ b/lib_nios2/board.c
@@ -31,7 +31,11 @@
#ifdef CONFIG_STATUS_LED
#include <status_led.h>
#endif
+#if defined(CFG_NIOS_EPCSBASE)
+#include <nios2-epcs.h>
+#endif
+DECLARE_GLOBAL_DATA_PTR;
/*
* All attempts to come up with a "common" initialization sequence
@@ -92,6 +96,9 @@ init_fnc_t *init_sequence[] = {
#if defined(CONFIG_BOARD_EARLY_INIT_F)
board_early_init_f, /* Call board-specific init code early.*/
#endif
+#if defined(CFG_NIOS_EPCSBASE)
+ epcs_reset,
+#endif
env_init,
serial_init,
@@ -106,8 +113,6 @@ init_fnc_t *init_sequence[] = {
/***********************************************************************/
void board_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
bd_t *bd;
init_fnc_t **init_fnc_ptr;
char *s, *e;
@@ -166,6 +171,10 @@ void board_init (void)
WATCHDOG_RESET ();
interrupt_init ();
+#if defined(CONFIG_BOARD_LATE_INIT)
+ board_late_init ();
+#endif
+
/* main_loop */
for (;;) {
WATCHDOG_RESET ();
diff --git a/lib_ppc/board.c b/lib_ppc/board.c
index f40bb253b8..db80f77560 100644
--- a/lib_ppc/board.c
+++ b/lib_ppc/board.c
@@ -90,6 +90,7 @@ extern flash_info_t flash_info[];
#endif
#include <environment.h>
+
DECLARE_GLOBAL_DATA_PTR;
#if defined(CFG_ENV_IS_EMBEDDED)
@@ -269,7 +270,8 @@ init_fnc_t *init_sequence[] = {
#if !defined(CONFIG_8xx_CPUCLK_DEFAULT)
get_clocks, /* get CPU and bus clocks (etc.) */
-#if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M)
+#if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
+ && !defined(CONFIG_TQM885D)
adjust_sdram_tbs_8xx,
#endif
init_timebase,
@@ -609,6 +611,11 @@ void board_init_r (gd_t *id, ulong dest_addr)
bd = gd->bd;
gd->flags |= GD_FLG_RELOC; /* tell others: relocation done */
+ gd->reloc_off = dest_addr - CFG_MONITOR_BASE;
+
+#ifdef CONFIG_SERIAL_MULTI
+ serial_initialize();
+#endif
debug ("Now running in RAM - U-Boot at: %08lx\n", dest_addr);
@@ -618,14 +625,8 @@ void board_init_r (gd_t *id, ulong dest_addr)
board_early_init_r ();
#endif
- gd->reloc_off = dest_addr - CFG_MONITOR_BASE;
-
monitor_flash_len = (ulong)&__init_end - dest_addr;
-#ifdef CONFIG_SERIAL_MULTI
- serial_initialize();
-#endif
-
/*
* We have to relocate the command table manually
*/
@@ -670,7 +671,8 @@ void board_init_r (gd_t *id, ulong dest_addr)
WATCHDOG_RESET();
-#if defined(CONFIG_IP860) || defined(CONFIG_PCU_E) || defined (CONFIG_FLAGADM)
+#if defined(CONFIG_IP860) || defined(CONFIG_PCU_E) || \
+ defined (CONFIG_FLAGADM) || defined(CONFIG_MPC83XX)
icache_enable (); /* it's time to enable the instruction cache */
#endif
diff --git a/mkconfig b/mkconfig
index 54775d31df..4fe6e448be 100755
--- a/mkconfig
+++ b/mkconfig
@@ -9,19 +9,23 @@
#
APPEND=no # Default: Create new config file
+BOARD_NAME="" # Name to print in make output
while [ $# -gt 0 ] ; do
case "$1" in
--) shift ; break ;;
-a) shift ; APPEND=yes ;;
+ -n) shift ; BOARD_NAME="${1%%_config}" ; shift ;;
*) break ;;
esac
done
+[ "${BOARD_NAME}" ] || BOARD_NAME="$1"
+
[ $# -lt 4 ] && exit 1
[ $# -gt 6 ] && exit 1
-echo "Configuring for $1 board..."
+echo "Configuring for ${BOARD_NAME} board..."
cd ./include
diff --git a/net/bootp.c b/net/bootp.c
index 8c56c0845f..669d74a6a5 100644
--- a/net/bootp.c
+++ b/net/bootp.c
@@ -715,7 +715,7 @@ BootpRequest (void)
}
#if (CONFIG_COMMANDS & CFG_CMD_DHCP)
-static void DhcpOptionsProcess (uchar * popt)
+static void DhcpOptionsProcess (uchar * popt, Bootp_t *bp)
{
uchar *end = popt + BOOTP_HDR_SIZE;
int oplen, size;
@@ -772,6 +772,34 @@ static void DhcpOptionsProcess (uchar * popt)
break;
case 59: /* Ignore Rebinding Time Option */
break;
+ case 66: /* Ignore TFTP server name */
+ break;
+ case 67: /* vendor opt bootfile */
+ /*
+ * I can't use dhcp_vendorex_proc here because I need
+ * to write into the bootp packet - even then I had to
+ * pass the bootp packet pointer into here as the
+ * second arg
+ */
+ size = truncate_sz ("Opt Boot File",
+ sizeof(bp->bp_file),
+ oplen);
+ if (bp->bp_file[0] == '\0' && size > 0) {
+ /*
+ * only use vendor boot file if we didn't
+ * receive a boot file in the main non-vendor
+ * part of the packet - god only knows why
+ * some vendors chose not to use this perfectly
+ * good spot to store the boot file (join on
+ * Tru64 Unix) it seems mind bogglingly crazy
+ * to me
+ */
+ printf("*** WARNING: using vendor "
+ "optional boot file\n");
+ memcpy(bp->bp_file, popt + 2, size);
+ bp->bp_file[size] = '\0';
+ }
+ break;
default:
#if (CONFIG_BOOTP_MASK & CONFIG_BOOTP_VENDOREX)
if (dhcp_vendorex_proc (popt))
@@ -882,7 +910,7 @@ DhcpHandler(uchar * pkt, unsigned dest, unsigned src, unsigned len)
dhcp_state = REQUESTING;
if (NetReadLong((ulong*)&bp->bp_vend[0]) == htonl(BOOTP_VENDOR_MAGIC))
- DhcpOptionsProcess((u8 *)&bp->bp_vend[4]);
+ DhcpOptionsProcess((u8 *)&bp->bp_vend[4], bp);
BootpCopyNetParams(bp); /* Store net params from reply */
@@ -901,7 +929,7 @@ DhcpHandler(uchar * pkt, unsigned dest, unsigned src, unsigned len)
char *s;
if (NetReadLong((ulong*)&bp->bp_vend[0]) == htonl(BOOTP_VENDOR_MAGIC))
- DhcpOptionsProcess((u8 *)&bp->bp_vend[4]);
+ DhcpOptionsProcess((u8 *)&bp->bp_vend[4], bp);
BootpCopyNetParams(bp); /* Store net params from reply */
dhcp_state = BOUND;
puts ("DHCP client bound to address ");
diff --git a/net/eth.c b/net/eth.c
index 9341e20e95..6f48aacaf9 100644
--- a/net/eth.c
+++ b/net/eth.c
@@ -53,6 +53,7 @@ extern int rtl8169_initialize(bd_t*);
extern int scc_initialize(bd_t*);
extern int skge_initialize(bd_t*);
extern int tsec_initialize(bd_t*, int, char *);
+extern int npe_initialize(bd_t *);
static struct eth_device *eth_devices, *eth_current;
@@ -201,6 +202,9 @@ int eth_initialize(bd_t *bis)
#if defined(CONFIG_AU1X00)
au1x00_enet_initialize(bis);
#endif
+#if defined(CONFIG_IXP4XX_NPE)
+ npe_initialize(bis);
+#endif
#ifdef CONFIG_E1000
e1000_initialize(bis);
#endif
diff --git a/net/net.c b/net/net.c
index 37c5fb698e..1d1c98f3c2 100644
--- a/net/net.c
+++ b/net/net.c
@@ -92,6 +92,8 @@
#if (CONFIG_COMMANDS & CFG_CMD_NET)
+DECLARE_GLOBAL_DATA_PTR;
+
#define ARP_TIMEOUT 5 /* Seconds before trying ARP again */
#ifndef CONFIG_NET_RETRY_COUNT
# define ARP_TIMEOUT_COUNT 5 /* # of timeouts before giving up */
@@ -222,8 +224,10 @@ void ArpRequest (void)
(NetOurIP & NetOurSubnetMask)) {
if (NetOurGatewayIP == 0) {
puts ("## Warning: gatewayip needed but not set\n");
+ NetArpWaitReplyIP = NetArpWaitPacketIP;
+ } else {
+ NetArpWaitReplyIP = NetOurGatewayIP;
}
- NetArpWaitReplyIP = NetOurGatewayIP;
} else {
NetArpWaitReplyIP = NetArpWaitPacketIP;
}
@@ -264,8 +268,6 @@ void ArpTimeoutCheck(void)
int
NetLoop(proto_t protocol)
{
- DECLARE_GLOBAL_DATA_PTR;
-
bd_t *bd = gd->bd;
#ifdef CONFIG_NET_MULTI
@@ -570,9 +572,6 @@ startAgainHandler(uchar * pkt, unsigned dest, unsigned src, unsigned len)
void NetStartAgain (void)
{
-#ifdef CONFIG_NET_MULTI
- DECLARE_GLOBAL_DATA_PTR;
-#endif
char *nretry;
int noretry = 0, once = 0;
diff --git a/nios2_config.mk b/nios2_config.mk
index 03253a364f..3f23b56c93 100644
--- a/nios2_config.mk
+++ b/nios2_config.mk
@@ -23,4 +23,4 @@
#
PLATFORM_CPPFLAGS += -DCONFIG_NIOS2 -D__NIOS2__
-PLATFORM_CPPFLAGS += -ffixed-r15
+PLATFORM_CPPFLAGS += -ffixed-r15 -G0
diff --git a/post/ether.c b/post/ether.c
index 660620e8f6..8c87b5927e 100644
--- a/post/ether.c
+++ b/post/ether.c
@@ -51,6 +51,8 @@
#include <net.h>
#include <serial.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#define MIN_PACKET_LENGTH 64
#define MAX_PACKET_LENGTH 256
#define TEST_NUM 1
@@ -109,7 +111,6 @@ static RTXBD *rtx;
static void scc_init (int scc_index)
{
- DECLARE_GLOBAL_DATA_PTR;
bd_t *bd = gd->bd;
static int proff[] =
diff --git a/post/memory.c b/post/memory.c
index a10bc502d3..a2c088bad8 100644
--- a/post/memory.c
+++ b/post/memory.c
@@ -157,6 +157,8 @@
#if CONFIG_POST & CFG_POST_MEMORY
+DECLARE_GLOBAL_DATA_PTR;
+
/*
* Define INJECT_*_ERRORS for testing error detection in the presence of
* _good_ hardware.
@@ -455,7 +457,6 @@ static int memory_post_tests (unsigned long start, unsigned long size)
int memory_post_test (int flags)
{
int ret = 0;
- DECLARE_GLOBAL_DATA_PTR;
bd_t *bd = gd->bd;
unsigned long memsize = (bd->bi_memsize >= 256 << 20 ?
256 << 20 : bd->bi_memsize) - (1 << 20);
diff --git a/post/post.c b/post/post.c
index b3df91aa5c..e1066da6bd 100644
--- a/post/post.c
+++ b/post/post.c
@@ -32,14 +32,14 @@
#ifdef CONFIG_POST
+DECLARE_GLOBAL_DATA_PTR;
+
#define POST_MAX_NUMBER 32
#define BOOTMODE_MAGIC 0xDEAD0000
int post_init_f (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
int res = 0;
unsigned int i;
@@ -62,7 +62,6 @@ int post_init_f (void)
void post_bootmode_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
int bootmode = post_bootmode_get (0);
int newword;
@@ -110,20 +109,17 @@ int post_bootmode_get (unsigned int *last_test)
/* POST tests run before relocation only mark status bits .... */
static void post_log_mark_start ( unsigned long testid )
{
- DECLARE_GLOBAL_DATA_PTR;
gd->post_log_word |= (testid)<<16;
}
static void post_log_mark_succ ( unsigned long testid )
{
- DECLARE_GLOBAL_DATA_PTR;
gd->post_log_word |= testid;
}
/* ... and the messages are output once we are relocated */
void post_output_backlog ( void )
{
- DECLARE_GLOBAL_DATA_PTR;
int j;
for (j = 0; j < post_list_size; j++) {
@@ -379,8 +375,6 @@ int post_log (char *format, ...)
void post_reloc (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
unsigned int i;
/*
diff --git a/post/sysmon.c b/post/sysmon.c
index 72fcac3850..f61d598244 100644
--- a/post/sysmon.c
+++ b/post/sysmon.c
@@ -52,6 +52,8 @@
#if CONFIG_POST & CFG_POST_SYSMON
+DECLARE_GLOBAL_DATA_PTR;
+
static int sysmon_temp_invalid = 0;
/* #define DEBUG */
@@ -159,8 +161,6 @@ int sysmon_init_f (void)
void sysmon_reloc (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
sysmon_t ** l;
sysmon_table_t * t;
@@ -281,8 +281,6 @@ static void sysmon_ccfl_enable (sysmon_table_t * this)
int sysmon_post_test (int flags)
{
- DECLARE_GLOBAL_DATA_PTR;
-
int res = 0;
sysmon_table_t * t;
uint val;
diff --git a/post/uart.c b/post/uart.c
index 23bf036ba4..fd97e3899e 100644
--- a/post/uart.c
+++ b/post/uart.c
@@ -50,6 +50,8 @@
#include <command.h>
#include <serial.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#define CTLR_SMC 0
#define CTLR_SCC 1
@@ -82,8 +84,6 @@ static int proff_scc[] =
static void smc_init (int smc_index)
{
- DECLARE_GLOBAL_DATA_PTR;
-
static int cpm_cr_ch[] = { CPM_CR_CH_SMC1, CPM_CR_CH_SMC2 };
volatile immap_t *im = (immap_t *) CFG_IMMR;
@@ -288,8 +288,6 @@ static int smc_getc (int smc_index)
static void scc_init (int scc_index)
{
- DECLARE_GLOBAL_DATA_PTR;
-
static int cpm_cr_ch[] = {
CPM_CR_CH_SCC1,
CPM_CR_CH_SCC2,
diff --git a/rtc/Makefile b/rtc/Makefile
index 4ceac76933..2c5d099fee 100644
--- a/rtc/Makefile
+++ b/rtc/Makefile
@@ -28,8 +28,8 @@ include $(TOPDIR)/config.mk
LIB = librtc.a
OBJS = date.o \
- ds12887.o ds1302.o ds1306.o ds1307.o ds1337.o \
- ds1556.o ds164x.o ds174x.o \
+ bf533_rtc.o ds12887.o ds1302.o ds1306.o ds1307.o \
+ ds1337.o ds1374.o ds1556.o ds164x.o ds174x.o \
m41t11.o max6900.o m48t35ax.o mc146818.o mk48t59.o \
mpc5xxx.o mpc8xx.o pcf8563.o s3c24x0_rtc.o rs5c372.o
diff --git a/rtc/bf533_rtc.c b/rtc/bf533_rtc.c
new file mode 100644
index 0000000000..948be64102
--- /dev/null
+++ b/rtc/bf533_rtc.c
@@ -0,0 +1,145 @@
+/*
+ * (C) Copyright 2001
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ * Real Time Clock interface of ADI21535 (Blackfin) for uCLinux
+ *
+ * Copyright (C) 2003 Motorola Corporation. All rights reserved.
+ * Richard Xiao (A2590C@email.mot.com)
+ *
+ * Copyright (C) 1996 Paul Gortmaker
+ *
+ *
+ * Based on other minimal char device drivers, like Alan's
+ * watchdog, Ted's random, etc. etc.
+ *
+ * 1.07 Paul Gortmaker.
+ * 1.08 Miquel van Smoorenburg: disallow certain things on the
+ * DEC Alpha as the CMOS clock is also used for other things.
+ * 1.09 Nikita Schmidt: epoch support and some Alpha cleanup.
+ * 1.09a Pete Zaitcev: Sun SPARC
+ * 1.09b Jeff Garzik: Modularize, init cleanup
+ * 1.09c Jeff Garzik: SMP cleanup
+ * 1.10 Paul Barton-Davis: add support for async I/O
+ * 1.10a Andrea Arcangeli: Alpha updates
+ * 1.10b Andrew Morton: SMP lock fix
+ * 1.10c Cesar Barros: SMP locking fixes and cleanup
+ * 1.10d Paul Gortmaker: delete paranoia check in rtc_exit
+ * 1.10e LG Soft India: Register access is different in BF533.
+ */
+
+#include <common.h>
+#include <command.h>
+#include <rtc.h>
+
+#if defined(CONFIG_RTC_BF533) && (CONFIG_COMMANDS & CFG_CMD_DATE)
+
+#include <asm/blackfin.h>
+#include <asm/cpu/bf533_rtc.h>
+
+void rtc_reset (void)
+{
+ return; /* nothing to do */
+}
+
+/* Wait for pending writes to complete */
+void wait_for_complete (void)
+{
+ while (!(*(volatile unsigned short *) RTC_ISTAT & 0x8000)) {
+ printf ("");
+ }
+ *(volatile unsigned short *) RTC_ISTAT = 0x8000;
+}
+
+/* Enable the RTC prescaler enable register */
+void rtc_init ()
+{
+ *(volatile unsigned short *) RTC_PREN = 0x1;
+ wait_for_complete ();
+}
+
+/* Set the time. Get the time_in_secs which is the number of seconds since Jan 1970 and set the RTC registers
+ * based on this value.
+ */
+void rtc_set (struct rtc_time *tmp)
+{
+ unsigned long n_days_1970 = 0;
+ unsigned long n_secs_rem = 0;
+ unsigned long n_hrs = 0;
+ unsigned long n_mins = 0;
+ unsigned long n_secs = 0;
+ unsigned long time_in_secs;
+
+ if (tmp == NULL) {
+ printf ("Error setting the date/time \n");
+ return;
+ }
+
+ time_in_secs =
+ mktime (tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_hour,
+ tmp->tm_min, tmp->tm_sec);
+
+ /* Compute no. of days since 1970 */
+ n_days_1970 = (unsigned long) (time_in_secs / (NUM_SECS_IN_DAY));
+
+ /* From the remining secs, compute the hrs(0-23), mins(0-59) and secs(0-59) */
+ n_secs_rem = (unsigned long) (time_in_secs % (NUM_SECS_IN_DAY));
+ n_hrs = n_secs_rem / (NUM_SECS_IN_HOUR);
+ n_secs_rem = n_secs_rem % (NUM_SECS_IN_HOUR);
+ n_mins = n_secs_rem / (NUM_SECS_IN_MIN);
+ n_secs = n_secs_rem % (NUM_SECS_IN_MIN);
+
+ /* Store the new time in the RTC_STAT register */
+ *(volatile unsigned long *) RTC_STAT =
+ ((n_days_1970 << DAY_BITS_OFF) | (n_hrs << HOUR_BITS_OFF) |
+ (n_mins << MIN_BITS_OFF) | (n_secs << SEC_BITS_OFF));
+
+ wait_for_complete ();
+}
+
+/* Read the time from the RTC_STAT. time_in_seconds is seconds since Jan 1970 */
+void rtc_get (struct rtc_time *tmp)
+{
+ unsigned long cur_rtc_stat = 0;
+ unsigned long time_in_sec;
+ unsigned long tm_sec = 0, tm_min = 0, tm_hour = 0, tm_day = 0;
+
+ if (tmp == NULL) {
+ printf ("Error getting the date/time \n");
+ return;
+ }
+
+ /* Read the RTC_STAT register */
+ cur_rtc_stat = *(volatile unsigned long *) RTC_STAT;
+
+ /* Get the secs (0-59), mins (0-59), hrs (0-23) and the days since Jan 1970 */
+ tm_sec = (cur_rtc_stat >> SEC_BITS_OFF) & 0x3f;
+ tm_min = (cur_rtc_stat >> MIN_BITS_OFF) & 0x3f;
+ tm_hour = (cur_rtc_stat >> HOUR_BITS_OFF) & 0x1f;
+ tm_day = (cur_rtc_stat >> DAY_BITS_OFF) & 0x7fff;
+
+ /* Calculate the total number of seconds since Jan 1970 */
+ time_in_sec = (tm_sec) +
+ MIN_TO_SECS (tm_min) +
+ HRS_TO_SECS (tm_hour) +
+ DAYS_TO_SECS (tm_day);
+ to_tm (time_in_sec, tmp);
+}
+#endif /* CONFIG_RTC_BF533 && CFG_CMD_DATE */
diff --git a/rtc/ds1306.c b/rtc/ds1306.c
index e143bf7a3d..e01e1ceae9 100644
--- a/rtc/ds1306.c
+++ b/rtc/ds1306.c
@@ -360,13 +360,13 @@ void rtc_set (struct rtc_time *tmp)
tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
- rtc_write (RTC_YEAR, bin2bcd (tmp->tm_year - 2000));
- rtc_write (RTC_MONTH, bin2bcd (tmp->tm_mon));
- rtc_write (RTC_DATE_OF_MONTH, bin2bcd (tmp->tm_mday));
- rtc_write (RTC_DAY_OF_WEEK, bin2bcd (tmp->tm_wday + 1));
- rtc_write (RTC_HOURS, bin2bcd (tmp->tm_hour));
- rtc_write (RTC_MINUTES, bin2bcd (tmp->tm_min));
rtc_write (RTC_SECONDS, bin2bcd (tmp->tm_sec));
+ rtc_write (RTC_MINUTES, bin2bcd (tmp->tm_min));
+ rtc_write (RTC_HOURS, bin2bcd (tmp->tm_hour));
+ rtc_write (RTC_DAY_OF_WEEK, bin2bcd (tmp->tm_wday + 1));
+ rtc_write (RTC_DATE_OF_MONTH, bin2bcd (tmp->tm_mday));
+ rtc_write (RTC_MONTH, bin2bcd (tmp->tm_mon));
+ rtc_write (RTC_YEAR, bin2bcd (tmp->tm_year - 2000));
}
/* ------------------------------------------------------------------------- */
diff --git a/rtc/ds1374.c b/rtc/ds1374.c
new file mode 100644
index 0000000000..50a996c5cb
--- /dev/null
+++ b/rtc/ds1374.c
@@ -0,0 +1,253 @@
+/*
+ * (C) Copyright 2001, 2002, 2003
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ * Keith Outwater, keith_outwater@mvis.com`
+ * Steven Scholz, steven.scholz@imc-berlin.de
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * Date & Time support (no alarms) for Dallas Semiconductor (now Maxim)
+ * DS1374 Real Time Clock (RTC).
+ *
+ * based on ds1337.c
+ */
+
+#include <common.h>
+#include <command.h>
+#include <rtc.h>
+#include <i2c.h>
+
+#if (defined(CONFIG_RTC_DS1374)) && (CONFIG_COMMANDS & CFG_CMD_DATE)
+
+/*---------------------------------------------------------------------*/
+#undef DEBUG_RTC
+#define DEBUG_RTC
+
+#ifdef DEBUG_RTC
+#define DEBUGR(fmt,args...) printf(fmt ,##args)
+#else
+#define DEBUGR(fmt,args...)
+#endif
+/*---------------------------------------------------------------------*/
+
+#ifndef CFG_I2C_RTC_ADDR
+# define CFG_I2C_RTC_ADDR 0x68
+#endif
+
+#if defined(CONFIG_RTC_DS1374) && (CFG_I2C_SPEED > 400000)
+# error The DS1374 is specified up to 400kHz in fast mode!
+#endif
+
+/*
+ * RTC register addresses
+ */
+#define RTC_TOD_CNT_BYTE0_ADDR 0x00 /* TimeOfDay */
+#define RTC_TOD_CNT_BYTE1_ADDR 0x01
+#define RTC_TOD_CNT_BYTE2_ADDR 0x02
+#define RTC_TOD_CNT_BYTE3_ADDR 0x03
+
+#define RTC_WD_ALM_CNT_BYTE0_ADDR 0x04
+#define RTC_WD_ALM_CNT_BYTE1_ADDR 0x05
+#define RTC_WD_ALM_CNT_BYTE2_ADDR 0x06
+
+#define RTC_CTL_ADDR 0x07 /* RTC-CoNTrol-register */
+#define RTC_SR_ADDR 0x08 /* RTC-StatusRegister */
+#define RTC_TCS_DS_ADDR 0x09 /* RTC-TrickleChargeSelect DiodeSelect-register */
+
+#define RTC_CTL_BIT_AIE (1<<0) /* Bit 0 - Alarm Interrupt enable */
+#define RTC_CTL_BIT_RS1 (1<<1) /* Bit 1/2 - Rate Select square wave output */
+#define RTC_CTL_BIT_RS2 (1<<2) /* Bit 2/2 - Rate Select square wave output */
+#define RTC_CTL_BIT_WDSTR (1<<3) /* Bit 3 - Watchdog Reset Steering */
+#define RTC_CTL_BIT_BBSQW (1<<4) /* Bit 4 - Battery-Backed Square-Wave */
+#define RTC_CTL_BIT_WD_ALM (1<<5) /* Bit 5 - Watchdoc/Alarm Counter Select */
+#define RTC_CTL_BIT_WACE (1<<6) /* Bit 6 - Watchdog/Alarm Counter Enable WACE*/
+#define RTC_CTL_BIT_EN_OSC (1<<7) /* Bit 7 - Enable Oscilator */
+
+#define RTC_SR_BIT_AF 0x01 /* Bit 0 = Alarm Flag */
+#define RTC_SR_BIT_OSF 0x80 /* Bit 7 - Osc Stop Flag */
+
+typedef unsigned char boolean_t;
+
+#ifndef TRUE
+#define TRUE ((boolean_t)(0==0))
+#endif
+#ifndef FALSE
+#define FALSE (!TRUE)
+#endif
+
+const char RtcTodAddr[] = {
+ RTC_TOD_CNT_BYTE0_ADDR,
+ RTC_TOD_CNT_BYTE1_ADDR,
+ RTC_TOD_CNT_BYTE2_ADDR,
+ RTC_TOD_CNT_BYTE3_ADDR
+};
+
+static uchar rtc_read (uchar reg);
+static void rtc_write (uchar reg, uchar val, boolean_t set);
+static void rtc_write_raw (uchar reg, uchar val);
+
+/*
+ * Get the current time from the RTC
+ */
+void rtc_get (struct rtc_time *tm){
+
+ unsigned long time1, time2;
+ unsigned int limit;
+ unsigned char tmp;
+ unsigned int i;
+
+ /*
+ * Since the reads are being performed one byte at a time,
+ * there is a chance that a carry will occur during the read.
+ * To detect this, 2 reads are performed and compared.
+ */
+ limit = 10;
+ do {
+ i = 4;
+ time1 = 0;
+ while (i--) {
+ tmp = rtc_read(RtcTodAddr[i]);
+ time1 = (time1 << 8) | (tmp & 0xff);
+ }
+
+ i = 4;
+ time2 = 0;
+ while (i--) {
+ tmp = rtc_read(RtcTodAddr[i]);
+ time2 = (time2 << 8) | (tmp & 0xff);
+ }
+ } while ((time1 != time2) && limit--);
+
+ if (time1 != time2) {
+ printf("can't get consistent time from rtc chip\n");
+ }
+
+ DEBUGR ("Get RTC s since 1.1.1970: %d\n", time1);
+
+ to_tm(time1, tm); /* To Gregorian Date */
+
+ if (rtc_read(RTC_SR_ADDR) & RTC_SR_BIT_OSF)
+ printf ("### Warning: RTC oscillator has stopped\n");
+
+ DEBUGR ("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
+ tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday,
+ tm->tm_hour, tm->tm_min, tm->tm_sec);
+}
+
+/*
+ * Set the RTC
+ */
+void rtc_set (struct rtc_time *tmp){
+
+ unsigned long time;
+ unsigned i;
+
+ DEBUGR ("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
+ tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
+ tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
+
+ if (tmp->tm_year < 1970 || tmp->tm_year > 2069)
+ printf("WARNING: year should be between 1970 and 2069!\n");
+
+ time = mktime(tmp->tm_year, tmp->tm_mon,
+ tmp->tm_mday, tmp->tm_hour,
+ tmp->tm_min, tmp->tm_sec);
+
+ DEBUGR ("Set RTC s since 1.1.1970: %d (0x%02x)\n", time, time);
+
+ /* write to RTC_TOD_CNT_BYTEn_ADDR */
+ for (i = 0; i <= 3; i++) {
+ rtc_write_raw(RtcTodAddr[i], (unsigned char)(time & 0xff));
+ time = time >> 8;
+ }
+
+ /* Start clock */
+ rtc_write(RTC_CTL_ADDR, RTC_CTL_BIT_EN_OSC, FALSE);
+}
+
+/*
+ * Reset the RTC. We setting the date back to 1970-01-01.
+ * We also enable the oscillator output on the SQW/OUT pin and program
+ * it for 32,768 Hz output. Note that according to the datasheet, turning
+ * on the square wave output increases the current drain on the backup
+ * battery to something between 480nA and 800nA.
+ */
+void rtc_reset (void){
+
+ struct rtc_time tmp;
+
+ /* clear status flags */
+ rtc_write (RTC_SR_ADDR, (RTC_SR_BIT_AF|RTC_SR_BIT_OSF), FALSE); /* clearing OSF and AF */
+
+ /* Initialise DS1374 oriented to MPC8349E-ADS */
+ rtc_write (RTC_CTL_ADDR, (RTC_CTL_BIT_EN_OSC
+ |RTC_CTL_BIT_WACE
+ |RTC_CTL_BIT_AIE), FALSE);/* start osc, disable WACE, clear AIE
+ - set to 0 */
+ rtc_write (RTC_CTL_ADDR, (RTC_CTL_BIT_WD_ALM
+ |RTC_CTL_BIT_WDSTR
+ |RTC_CTL_BIT_RS1
+ |RTC_CTL_BIT_RS2
+ |RTC_CTL_BIT_BBSQW), TRUE);/* disable WD/ALM, WDSTR set to INT-pin,
+ set BBSQW and SQW to 32k
+ - set to 1 */
+ tmp.tm_year = 1970;
+ tmp.tm_mon = 1;
+ tmp.tm_mday= 1;
+ tmp.tm_hour = 0;
+ tmp.tm_min = 0;
+ tmp.tm_sec = 0;
+
+ rtc_set(&tmp);
+
+ printf("RTC: %4d-%02d-%02d %2d:%02d:%02d UTC\n",
+ tmp.tm_year, tmp.tm_mon, tmp.tm_mday,
+ tmp.tm_hour, tmp.tm_min, tmp.tm_sec);
+
+ rtc_write(RTC_WD_ALM_CNT_BYTE2_ADDR,0xAC, TRUE);
+ rtc_write(RTC_WD_ALM_CNT_BYTE1_ADDR,0xDE, TRUE);
+ rtc_write(RTC_WD_ALM_CNT_BYTE2_ADDR,0xAD, TRUE);
+}
+
+/*
+ * Helper functions
+ */
+static uchar rtc_read (uchar reg)
+{
+ return (i2c_reg_read (CFG_I2C_RTC_ADDR, reg));
+}
+
+static void rtc_write (uchar reg, uchar val, boolean_t set)
+{
+ if (set == TRUE) {
+ val |= i2c_reg_read (CFG_I2C_RTC_ADDR, reg);
+ i2c_reg_write (CFG_I2C_RTC_ADDR, reg, val);
+ } else {
+ val = i2c_reg_read (CFG_I2C_RTC_ADDR, reg) & ~val;
+ i2c_reg_write (CFG_I2C_RTC_ADDR, reg, val);
+ }
+}
+
+static void rtc_write_raw (uchar reg, uchar val)
+{
+ i2c_reg_write (CFG_I2C_RTC_ADDR, reg, val);
+}
+#endif /* (CONFIG_RTC_DS1374) && (CFG_COMMANDS & CFG_CMD_DATE) */
diff --git a/rtc/rs5c372.c b/rtc/rs5c372.c
index 87f38c42bb..b56808b8ba 100644
--- a/rtc/rs5c372.c
+++ b/rtc/rs5c372.c
@@ -73,7 +73,7 @@ static unsigned bcd2bin (uchar c);
static int setup_done = 0;
static int
-rs5c372_readram(char *buf, int len)
+rs5c372_readram(unsigned char *buf, int len)
{
int ret;
@@ -128,7 +128,7 @@ rs5c372_enable(void)
}
static void
-rs5c372_convert_to_time(struct rtc_time *dt, char *buf)
+rs5c372_convert_to_time(struct rtc_time *dt, unsigned char *buf)
{
/* buf[0] is register 15 */
dt->tm_sec = bcd2bin(buf[1]);
diff --git a/tools/env/fw_env.c b/tools/env/fw_env.c
index 74c0498d5a..f723b5bca1 100644
--- a/tools/env/fw_env.c
+++ b/tools/env/fw_env.c
@@ -614,8 +614,7 @@ static int env_init (void)
if (!crc1_ok) {
fprintf (stderr,
"Warning: Bad CRC, using default environment\n");
- environment.data = default_environment;
- free (addr1);
+ memcpy(environment.data, default_environment, sizeof default_environment);
}
} else {
flag1 = environment.flags;
@@ -652,9 +651,8 @@ static int env_init (void)
} else if (!crc1_ok && !crc2_ok) {
fprintf (stderr,
"Warning: Bad CRC, using default environment\n");
- environment.data = default_environment;
+ memcpy(environment.data, default_environment, sizeof default_environment);
curdev = 0;
- free (addr2);
free (addr1);
} else if (flag1 == active_flag && flag2 == obsolete_flag) {
environment.data = addr1;
diff --git a/tools/envcrc.c b/tools/envcrc.c
index 7b7718324e..2910a2dcc0 100644
--- a/tools/envcrc.c
+++ b/tools/envcrc.c
@@ -48,7 +48,7 @@
# if defined(CFG_ENV_ADDR_REDUND) && !defined(CFG_ENV_SIZE_REDUND)
# define CFG_ENV_SIZE_REDUND CFG_ENV_SIZE
# endif
-# if (CFG_ENV_ADDR >= CFG_MONITOR_BASE) && \
+# if ((!defined (ENV_IS_VARIABLE)) || !ENV_IS_VARIABLE) && (CFG_ENV_ADDR >= CFG_MONITOR_BASE) && \
((CFG_ENV_ADDR + CFG_ENV_SIZE) <= (CFG_MONITOR_BASE + CFG_MONITOR_LEN))
# define ENV_IS_EMBEDDED 1
# endif
diff --git a/tools/mkimage.c b/tools/mkimage.c
index fbc1a12549..fea3e5bc6b 100644
--- a/tools/mkimage.c
+++ b/tools/mkimage.c
@@ -93,6 +93,7 @@ table_entry_t arch_name[] = {
{ IH_CPU_SH, "sh", "SuperH", },
{ IH_CPU_SPARC, "sparc", "SPARC", },
{ IH_CPU_SPARC64, "sparc64", "SPARC 64 Bit", },
+ { IH_CPU_BLACKFIN, "blackfin", "Blackfin", },
{ -1, "", "", },
};
@@ -276,7 +277,8 @@ NXTARG: ;
*/
if (xflag) {
if (ep != addr + sizeof(image_header_t)) {
- fprintf (stderr, "%s: For XIP, the entry point must be the load addr + %lu\n",
+ fprintf (stderr,
+ "%s: For XIP, the entry point must be the load addr + %lu\n",
cmdname,
(unsigned long)sizeof(image_header_t));
exit (EXIT_FAILURE);
@@ -346,8 +348,9 @@ NXTARG: ;
if (crc32 (0, data, len) != checksum) {
fprintf (stderr,
- "*** Warning: \"%s\" has bad header checksum!\n",
- imagefile);
+ "%s: ERROR: \"%s\" has bad header checksum!\n",
+ cmdname, imagefile);
+ exit (EXIT_FAILURE);
}
data = (char *)(ptr + sizeof(image_header_t));
@@ -355,8 +358,9 @@ NXTARG: ;
if (crc32 (0, data, len) != ntohl(hdr->ih_dcrc)) {
fprintf (stderr,
- "*** Warning: \"%s\" has corrupted data!\n",
- imagefile);
+ "%s: ERROR: \"%s\" has corrupted data!\n",
+ cmdname, imagefile);
+ exit (EXIT_FAILURE);
}
/* for multi-file images we need the data part, too */
@@ -383,7 +387,7 @@ NXTARG: ;
if (opt_type == IH_TYPE_MULTI || opt_type == IH_TYPE_SCRIPT) {
char *file = datafile;
- unsigned long size;
+ uint32_t size;
for (;;) {
char *sep = NULL;
diff --git a/tools/setlocalversion b/tools/setlocalversion
new file mode 100644
index 0000000000..9a23825218
--- /dev/null
+++ b/tools/setlocalversion
@@ -0,0 +1,22 @@
+#!/bin/sh
+# Print additional version information for non-release trees.
+
+usage() {
+ echo "Usage: $0 [srctree]" >&2
+ exit 1
+}
+
+cd "${1:-.}" || usage
+
+# Check for git and a git repo.
+if head=`git rev-parse --verify HEAD 2>/dev/null`; then
+ # Do we have an untagged version?
+ if [ "`git name-rev --tags HEAD`" = "HEAD undefined" ]; then
+ printf '%s%s' -g `echo "$head" | cut -c1-8`
+ fi
+
+ # Are there uncommitted changes?
+ if git diff-files | read dummy; then
+ printf '%s' -dirty
+ fi
+fi